commit 885d5e4e58f92de0013dfb4d9149fb00a0559f5d
Author: Weber Ko 柯韋臺 (中光電) <weber.ko@coretronic.com>
Date:   Wed Sep 28 17:52:06 2022 +0800

    Fixed HDMI color error

diff --git a/u-boot/drivers/video/drm/rockchip_dw_hdmi.c b/u-boot/drivers/video/drm/rockchip_dw_hdmi.c
old mode 100644
new mode 100755
index 3bf3b2f60d..44f427812f
--- a/u-boot/drivers/video/drm/rockchip_dw_hdmi.c
+++ b/u-boot/drivers/video/drm/rockchip_dw_hdmi.c
@@ -355,7 +355,8 @@ void drm_rk_selete_output(struct hdmi_edid_data *edid_data,
 	if (dev_type == RK3288_HDMI || output_bus_format_rgb)
 		*bus_format = MEDIA_BUS_FMT_RGB888_1X24;
 	else
-		*bus_format = MEDIA_BUS_FMT_YUV8_1X24;
+		*bus_format = MEDIA_BUS_FMT_RGB888_1X24;
+		//*bus_format = MEDIA_BUS_FMT_YUV8_1X24;
 
 	if (!base2_parameter) {
 		dev_desc = rockchip_get_bootdev();

commit efaa845a74bb6c72186a9faeff7e889d936b5eb0
Author: Weber Ko 柯韋臺 (中光電) <weber.ko@coretronic.com>
Date:   Wed May 25 17:48:28 2022 +0800

    1.Restore UI Mode to 1
    2.update BT firmware
    3.Restore to TV Launcher

diff --git a/u-boot/configs/evb-rk3328_defconfig b/u-boot/configs/evb-rk3328_defconfig
old mode 100644
new mode 100755
index 3e55505686..2992a6e6be
--- a/u-boot/configs/evb-rk3328_defconfig
+++ b/u-boot/configs/evb-rk3328_defconfig
@@ -74,7 +74,7 @@ CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
 CONFIG_ROCKCHIP_SDRAM_COMMON=y
 CONFIG_DM_RESET=y
-CONFIG_BAUDRATE=1500000
+CONFIG_BAUDRATE=115200
 CONFIG_DEBUG_UART_BASE=0xFF130000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2


commit e24e903303b124424172b0c43a66a803574d4274
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Mon Jan 24 11:21:17 2022 +0800

    video/drm: vop2: set lineflag trigger time
    
    lineflag0: maybe used for PSR panel, we sent at the last active line;
    lineflag1: for current dmc policy, lineflag1 no need to advanced 3 ms;
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: I24d1ca68d433adf31009a07e6f3278ca92c565c6

diff --git a/drivers/video/drm/rockchip_vop2.c b/drivers/video/drm/rockchip_vop2.c
index a39eeb1331..159a2715e4 100644
--- a/drivers/video/drm/rockchip_vop2.c
+++ b/drivers/video/drm/rockchip_vop2.c
@@ -957,11 +957,6 @@ static inline u32 vop2_grf_readl(struct vop2 *vop, void *grf_base, u32 offset,
 	return (readl(grf_base + offset) >> shift) & mask;
 }
 
-static inline int us_to_vertical_line(struct drm_display_mode *mode, int us)
-{
-	return us * mode->clock / mode->htotal / 1000;
-}
-
 static char* get_output_if_name(u32 output_if, char *name)
 {
 	if (output_if & VOP_OUTPUT_IF_RGB)
@@ -2428,9 +2423,9 @@ static int rockchip_vop2_init(struct display_state *state)
 	}
 
 	vop2_mask_write(vop2, RK3568_SYS_CTRL_LINE_FLAG0 + line_flag_offset, LINE_FLAG_NUM_MASK,
-			RK3568_DSP_LINE_FLAG_NUM0_SHIFT, act_end - 3, false);
+			RK3568_DSP_LINE_FLAG_NUM0_SHIFT, act_end, false);
 	vop2_mask_write(vop2, RK3568_SYS_CTRL_LINE_FLAG0 + line_flag_offset, LINE_FLAG_NUM_MASK,
-			RK3568_DSP_LINE_FLAG_NUM1_SHIFT, act_end - us_to_vertical_line(mode, 1000), false);
+			RK3568_DSP_LINE_FLAG_NUM1_SHIFT, act_end, false);
 
 	return 0;
 }

commit 55b28e7dc040becde0932ca5d10e6ee8f9af18f5
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Mon Feb 14 14:52:44 2022 +0800

    video/drm: phy-rockchip-samsung-hdptx-hdmi: Register phy pll as child device
    
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
    Change-Id: Ifd27057bca766aaab5b02280d6ffdc2828cef691

diff --git a/drivers/video/drm/phy-rockchip-samsung-hdptx-hdmi.c b/drivers/video/drm/phy-rockchip-samsung-hdptx-hdmi.c
index 8463f4226a..395846f471 100644
--- a/drivers/video/drm/phy-rockchip-samsung-hdptx-hdmi.c
+++ b/drivers/video/drm/phy-rockchip-samsung-hdptx-hdmi.c
@@ -15,6 +15,7 @@
 #include <linux/bitfield.h>
 #include <linux/iopoll.h>
 #include <asm/arch/clock.h>
+#include <dm/lists.h>
 #include <dm/of_access.h>
 
 #include "rockchip_display.h"
@@ -1775,7 +1776,8 @@ static int rockchip_hdptx_phy_hdmi_probe(struct udevice *dev)
 {
 	struct rockchip_hdptx_phy *hdptx = dev_get_priv(dev);
 	struct rockchip_phy *phy;
-	struct udevice *syscon;
+	struct udevice *syscon, *sys_child;
+	char name[30], *str;
 	int ret;
 
 	hdptx->id = of_alias_get_id(ofnode_to_np(dev->node), "hdptxhdmi");
@@ -1847,6 +1849,15 @@ static int rockchip_hdptx_phy_hdmi_probe(struct udevice *dev)
 		return ret;
 	}
 
+	sprintf(name, "hdmiphypll_clk%d", hdptx->id);
+	str = strdup(name);
+	/* The phy pll driver does not have a device node, so bind it here */
+	ret = device_bind_driver(dev, "clk_hdptx", str, &sys_child);
+	if (ret) {
+		dev_err(dev, "Warning: No phy pll driver: ret=%d\n", ret);
+		return ret;
+	}
+
 	return 0;
 }
 
@@ -1867,7 +1878,7 @@ U_BOOT_DRIVER(rockchip_hdptx_phy_hdmi) = {
 
 static struct rockchip_hdptx_phy *get_hdptx(struct udevice *dev)
 {
-	if (!strcmp(dev->name, "hdptxphy_hdmi0_uboot"))
+	if (!strcmp(dev->name, "hdmiphypll_clk0"))
 		return g_hdptx0;
 
 	return g_hdptx1;
@@ -1910,11 +1921,6 @@ static int hdptx_clk_probe(struct udevice *dev)
 	return 0;
 }
 
-static const struct udevice_id hdptx_clk_ids[] = {
-	{ .compatible = "hdmiphy-clock" },
-	{ }
-};
-
 /*
  * In order for other display interfaces to use hdmiphy as source
  * for dclk, hdmiphy must register a virtual clock driver
@@ -1922,7 +1928,6 @@ static const struct udevice_id hdptx_clk_ids[] = {
 U_BOOT_DRIVER(clk_hdptx) = {
 	.name		= "clk_hdptx",
 	.id		= UCLASS_CLK,
-	.of_match	= hdptx_clk_ids,
 	.priv_auto_alloc_size = sizeof(struct clk_hdptx),
 	.ops		= &hdptx_clk_ops,
 	.probe		= hdptx_clk_probe,

commit 02b00901bfb1cbc6af7d5a3156947de47bf28f71
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Mon Feb 14 14:52:03 2022 +0800

    clk: rockchip: rk3588: Identify the dclk's parent by device name
    
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
    Change-Id: I6cb07de419eb0702a2b4445a059f96a44b7856c8

diff --git a/drivers/clk/rockchip/clk_rk3588.c b/drivers/clk/rockchip/clk_rk3588.c
index 57cb4fe9ea..841fb76153 100644
--- a/drivers/clk/rockchip/clk_rk3588.c
+++ b/drivers/clk/rockchip/clk_rk3588.c
@@ -1847,18 +1847,7 @@ static int __maybe_unused rk3588_dclk_vop_set_parent(struct clk *clk,
 	struct rk3588_clk_priv *priv = dev_get_priv(clk->dev);
 	struct rk3588_cru *cru = priv->cru;
 	u32 sel;
-	const char *clock_output_name;
-	char v0pll_name[] = "v0pll";
-	int ret = 0;
-
-	if (parent->id == PLL_V0PLL) {
-		clock_output_name = v0pll_name;
-	} else {
-		ret = dev_read_string_index(parent->dev, "clock-output-names",
-					    parent->id, &clock_output_name);
-		if (ret < 0)
-			return -ENODATA;
-	}
+	const char *clock_dev_name = parent->dev->name;
 
 	if (parent->id == PLL_V0PLL)
 		sel = 2;
@@ -1887,9 +1876,9 @@ static int __maybe_unused rk3588_dclk_vop_set_parent(struct clk *clk,
 			     sel << DCLK3_VOP_SRC_SEL_SHIFT);
 		break;
 	case DCLK_VOP0:
-		if (!strcmp(clock_output_name, "hdmiphypll0"))
+		if (!strcmp(clock_dev_name, "hdmiphypll_clk0"))
 			sel = 1;
-		else if (!strcmp(clock_output_name, "hdmiphypll1"))
+		else if (!strcmp(clock_dev_name, "hdmiphypll_clk1"))
 			sel = 2;
 		else
 			sel = 0;
@@ -1897,9 +1886,9 @@ static int __maybe_unused rk3588_dclk_vop_set_parent(struct clk *clk,
 			     sel << DCLK0_VOP_SEL_SHIFT);
 		break;
 	case DCLK_VOP1:
-		if (!strcmp(clock_output_name, "hdmiphypll0"))
+		if (!strcmp(clock_dev_name, "hdmiphypll_clk0"))
 			sel = 1;
-		else if (!strcmp(clock_output_name, "hdmiphypll1"))
+		else if (!strcmp(clock_dev_name, "hdmiphypll_clk1"))
 			sel = 2;
 		else
 			sel = 0;
@@ -1907,9 +1896,9 @@ static int __maybe_unused rk3588_dclk_vop_set_parent(struct clk *clk,
 			     sel << DCLK1_VOP_SEL_SHIFT);
 		break;
 	case DCLK_VOP2:
-		if (!strcmp(clock_output_name, "hdmiphypll0"))
+		if (!strcmp(clock_dev_name, "hdmiphypll_clk0"))
 			sel = 1;
-		else if (!strcmp(clock_output_name, "hdmiphypll1"))
+		else if (!strcmp(clock_dev_name, "hdmiphypll_clk1"))
 			sel = 2;
 		else
 			sel = 0;

commit 545a0218d667b18e7af1a187f743e82151b44a36
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Mon Feb 14 14:41:28 2022 +0800

    video/drm: vop2: Get hdmi phy pll by name
    
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
    Change-Id: Ibbb0789e8f430677eb58488a7458ff36aaebc820

diff --git a/drivers/video/drm/rockchip_vop2.c b/drivers/video/drm/rockchip_vop2.c
index fe2bc8f349..a39eeb1331 100644
--- a/drivers/video/drm/rockchip_vop2.c
+++ b/drivers/video/drm/rockchip_vop2.c
@@ -2387,17 +2387,19 @@ static int rockchip_vop2_init(struct display_state *state)
 		return ret;
 	}
 
-	ret = clk_get_by_name(cstate->dev, "hdmi0_phy_pll_uboot", &hdmi0_phy_pll);
+	ret = uclass_get_device_by_name(UCLASS_CLK, "hdmiphypll_clk0",
+					&hdmi0_phy_pll.dev);
 	if (ret) {
 		hdmi0_phy_pll.dev = NULL;
-		printf("%s:No hdmi0_phy_pll_uboot clk found, use system clk\n",
+		printf("%s:No hdmiphypll clk0 found, use system clk\n",
 		       __func__);
 	}
 
-	ret = clk_get_by_name(cstate->dev, "hdmi1_phy_pll_uboot", &hdmi1_phy_pll);
+	ret = uclass_get_device_by_name(UCLASS_CLK, "hdmiphypll_clk1",
+					&hdmi1_phy_pll.dev);
 	if (ret) {
-		hdmi0_phy_pll.dev = NULL;
-		printf("%s:No hdmi1_phy_pll_uboot clk found, use system clk\n",
+		hdmi1_phy_pll.dev = NULL;
+		printf("%s:No hdmiphypll clk1 found, use system clk\n",
 		       __func__);
 	}
 

commit 059758c5c86491177481e0eb5b6b1dfd96fb3cef
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Feb 15 06:54:39 2022 +0000

    configs: rk3588: resync with make savedefconfig
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I275e403e0ba1dbd4dbbe1b340015330c50526a1b

diff --git a/configs/rk3588_defconfig b/configs/rk3588_defconfig
index 0639d10a73..13a0de69f9 100644
--- a/configs/rk3588_defconfig
+++ b/configs/rk3588_defconfig
@@ -1,5 +1,4 @@
 CONFIG_ARM=y
-CONFIG_ARM_CPU_SUSPEND=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
@@ -141,10 +140,11 @@ CONFIG_DWC_ETH_QOS=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX=y
-CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX_HDMI=y
 CONFIG_PHY_ROCKCHIP_USBDP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
+CONFIG_DM_FUEL_GAUGE=y
+CONFIG_POWER_FG_CW201X=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_SPI_RK8XX=y
 CONFIG_DM_POWER_DELIVERY=y
@@ -157,13 +157,11 @@ CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
 CONFIG_REGULATOR_RK860X=y
 CONFIG_REGULATOR_RK806=y
-CONFIG_PWM_ROCKCHIP=y
-CONFIG_DM_CHARGE_DISPLAY=y
-CONFIG_DM_FUEL_GAUGE=y
 CONFIG_CHARGER_BQ25700=y
 CONFIG_CHARGER_BQ25890=y
-CONFIG_POWER_FG_CW201X=y
+CONFIG_DM_CHARGE_DISPLAY=y
 CONFIG_CHARGE_ANIMATION=y
+CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
@@ -202,6 +200,7 @@ CONFIG_DRM_ROCKCHIP_DW_HDMI_QP=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI2=y
 CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
 CONFIG_DRM_ROCKCHIP_SAMSUNG_MIPI_DCPHY=y
+CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX_HDMI=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_LIB_RAND=y
 CONFIG_SPL_TINY_MEMSET=y

commit a7552f1a6ff7e50a32618fd173f435d37e17ca22
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Mon Feb 14 18:03:51 2022 +0800

    rockchip: rk3588: save gpio4_d0~d5 iomux config
    
    If not boot from sdmmc, restore the iomux config with the save value.
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: Ie7bbdb93637d3140129552137b65bcba6eb3bb5d

diff --git a/arch/arm/mach-rockchip/rk3588/rk3588.c b/arch/arm/mach-rockchip/rk3588/rk3588.c
index 453a58e3a3..32c0493915 100644
--- a/arch/arm/mach-rockchip/rk3588/rk3588.c
+++ b/arch/arm/mach-rockchip/rk3588/rk3588.c
@@ -778,6 +778,20 @@ void rockchip_stimer_init(void)
 	writel(0x1, CONFIG_ROCKCHIP_STIMER_BASE + 0x4);
 }
 
+static u32 gpio4d_iomux_sel_l = 0xffffffff;
+static u32 gpio4d_iomux_sel_h;
+static u32 gpio0a_iomux_sel_h;
+
+void spl_board_sd_iomux_save(void)
+{
+	struct rk3588_bus_ioc * const bus_ioc = (void *)BUS_IOC_BASE;
+	struct rk3588_pmu1_ioc * const pmu1_ioc = (void *)PMU1_IOC_BASE;
+
+	gpio4d_iomux_sel_l = readl(&bus_ioc->gpio4d_iomux_sel_l);
+	gpio4d_iomux_sel_h = readl(&bus_ioc->gpio4d_iomux_sel_h);
+	gpio0a_iomux_sel_h = readl(&pmu1_ioc->gpio0a_iomux_sel_h);
+}
+
 void spl_board_storages_fixup(struct spl_image_loader *loader)
 {
 	int ret = 0;
@@ -785,7 +799,7 @@ void spl_board_storages_fixup(struct spl_image_loader *loader)
 	if (!loader)
 		return;
 
-	if (loader->boot_device == BOOT_DEVICE_MMC2) {
+	if (loader->boot_device == BOOT_DEVICE_MMC2 && gpio4d_iomux_sel_l != 0xffffffff) {
 		struct rk3588_bus_ioc * const bus_ioc = (void *)BUS_IOC_BASE;
 		struct rk3588_pmu1_ioc * const pmu1_ioc = (void *)PMU1_IOC_BASE;
 		struct mmc *mmc = NULL;
@@ -797,9 +811,9 @@ void spl_board_storages_fixup(struct spl_image_loader *loader)
 
 		no_card = mmc_getcd(mmc) == 0;
 		if (no_card) {
-			writel(0xffff00aa, &bus_ioc->gpio4d_iomux_sel_l);
-			writel(0xffff0000, &bus_ioc->gpio4d_iomux_sel_h);
-			writel(0xffff0000, &pmu1_ioc->gpio0a_iomux_sel_h);
+			writel(0xffffuL << 16 | gpio4d_iomux_sel_l, &bus_ioc->gpio4d_iomux_sel_l);
+			writel(0xffffuL << 16 | gpio4d_iomux_sel_h, &bus_ioc->gpio4d_iomux_sel_h);
+			writel(0xffffuL << 16 | gpio0a_iomux_sel_h, &pmu1_ioc->gpio0a_iomux_sel_h);
 		}
 	}
 }
@@ -888,6 +902,8 @@ int arch_cpu_init(void)
 	/* Assert hdptxphy init,cmn,lane reset */
 	writel(0xb800b800, PMU1CRU_BASE + PMU1CRU_SOFTRST_CON03);
 	writel(0x00030003, PMU1CRU_BASE + PMU1CRU_SOFTRST_CON04);
+
+	spl_board_sd_iomux_save();
 #endif
 	/* Select usb otg0 phy status to 0 that make rockusb can work at high-speed */
 	writel(0x00080008, USBGRF_BASE + USB_GRF_USB3OTG0_CON1);

commit 834f150196fbdd21a3aca15b2f46893f98c7e4b9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jan 24 09:37:27 2022 +0000

    configs: rk3588: define CONFIG_OF_U_BOOT_REMOVE_PROPS
    
    Adding "pinctrl-0 pinctrl-names" base on CONFIG_OF_SPL_REMOVE_PROPS content.
    
    UART2_M1 and SDMMC is a group iomux and all mmc devices are scaned
    by mmc framework through mmc_initialize() even SPL pass the "mmc 0"
    as boot device. That makes UART2_M1 debug port can't output any more.
    
    Actually, U-Boot don't need sdmmc pinctrl control, because it can be
    auto switched by hardware when detect sd insert or initialized by SPL.
    So let's remove pinctrl property from u-boot.dtb for SDMMC/UART2_M1.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ibbf4eafe27d15d1f6ea9eb1936757a69be8d00c4

diff --git a/configs/rk3588_defconfig b/configs/rk3588_defconfig
index 166ecd5059..0639d10a73 100644
--- a/configs/rk3588_defconfig
+++ b/configs/rk3588_defconfig
@@ -82,6 +82,7 @@ CONFIG_SPL_OF_CONTROL=y
 CONFIG_SPL_DTB_MINIMUM=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_U_BOOT_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 # CONFIG_NET_TFTP_VARS is not set
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y

commit 9732565d31c6821b913668e051aad98b4fefbb28
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Feb 15 02:11:52 2022 +0000

    spl: enable U-Boot jump message
    
    This is friendly for us to know what SPL does.
    
    RV1126 boot message:
    
      U-Boot SPL 2017.09-g4f0c5b5663-220210-dirty #cjh (Feb 15 2022 - 02:10:33)
      ......
      ## Verified-boot: 0
      ## Checking uboot 0x00600000 ... sha256(3d716084f7...) + OK
      ## Checking fdt 0x006ba8e0 ... sha256(80f00e7967...) + OK
      Jumping to U-Boot(0x00600000)
    
      U-Boot 2017.09-g4f0c5b5663-220210-dirty #cjh (Feb 15 2022 - 02:11:31 +0000)
    
      Model: Rockchip RV1126 Evaluation Board
      PreSerial: 2, raw, 0xff570000
      ......
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I27f97924a22563b872a47bafffbf2fc9c749c9db

diff --git a/common/spl/spl.c b/common/spl/spl.c
index 4f4f4016e8..271749a3d2 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -618,7 +618,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 		debug("Failed to stash bootstage: err=%d\n", ret);
 #endif
 
-	debug("loaded - jumping to U-Boot...\n");
+	printf("Jumping to U-Boot(0x%08lx)\n", spl_image.entry_point);
 	spl_board_prepare_for_boot();
 	jump_to_image_no_args(&spl_image);
 }

commit 49cbb0fac06f924da3e27372c0f5476c47165338
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Mon Feb 14 10:17:15 2022 +0800

    drivers: crypto: v2: rk_hash_direct_calc mask lockstep
    
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
    Change-Id: Idb85f68bf99d61214aafc5ad3c24d94bedf51443

diff --git a/drivers/crypto/rockchip/crypto_v2.c b/drivers/crypto/rockchip/crypto_v2.c
index aa19ac0482..1551d5ca7f 100644
--- a/drivers/crypto/rockchip/crypto_v2.c
+++ b/drivers/crypto/rockchip/crypto_v2.c
@@ -381,8 +381,8 @@ static int rk_hash_direct_calc(void *hw_data, const u8 *data,
 	tmp = crypto_read(CRYPTO_DMA_INT_ST);
 	crypto_write(tmp, CRYPTO_DMA_INT_ST);
 
-	if (tmp != CRYPTO_SRC_ITEM_DONE_INT_ST &&
-	    tmp != CRYPTO_ZERO_LEN_INT_ST) {
+	if ((tmp & mask) != CRYPTO_SRC_ITEM_DONE_INT_ST &&
+	    (tmp & mask) != CRYPTO_ZERO_LEN_INT_ST) {
 		debug("[%s] %d: CRYPTO_DMA_INT_ST = 0x%x\n",
 		      __func__, __LINE__, tmp);
 		goto exit;

commit d6a0e942bb6fbdd079cd589b9f1ad62289cfba66
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Mon Feb 14 11:23:49 2022 +0800

    clk: rockchip: rk3588: fix up dclk_vop3 setting error
    
    Change-Id: I345a254f9adaf44d6dcd2bf37b4f429676643e44
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3588.c b/drivers/clk/rockchip/clk_rk3588.c
index f47773016d..57cb4fe9ea 100644
--- a/drivers/clk/rockchip/clk_rk3588.c
+++ b/drivers/clk/rockchip/clk_rk3588.c
@@ -1090,9 +1090,9 @@ static ulong rk3588_dclk_vop_set_clk(struct rk3588_clk_priv *priv,
 		conid = 113;
 		con = readl(&cru->clksel_con[113]);
 		sel = (con & DCLK3_VOP_SRC_SEL_MASK) >> DCLK3_VOP_SRC_SEL_SHIFT;
-		mask = DCLK2_VOP_SRC_SEL_MASK | DCLK2_VOP_SRC_DIV_MASK;
-		div_shift = DCLK2_VOP_SRC_DIV_SHIFT;
-		sel_shift = DCLK1_VOP_SRC_SEL_SHIFT;
+		mask = DCLK3_VOP_SRC_SEL_MASK | DCLK3_VOP_SRC_DIV_MASK;
+		div_shift = DCLK3_VOP_SRC_DIV_SHIFT;
+		sel_shift = DCLK3_VOP_SRC_SEL_SHIFT;
 		break;
 	default:
 		return -ENOENT;

commit 083ae6f200c1755249af4758c1b0fff98c7c3449
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Feb 15 02:37:42 2022 +0000

    make.sh: Allow no tee.bin
    
    It allows there is not tee.bin within that uboot.img
    generated by arch/arm/mach-rockchip/make_fit_uboot.sh.
    
    NOTE: please providing a empty trust ini file.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Id74316e7c031923de0552339cc4e87486789cb0e

diff --git a/make.sh b/make.sh
index f02fab33dd..2276712cb3 100755
--- a/make.sh
+++ b/make.sh
@@ -548,8 +548,7 @@ function pack_uboot_itb_image()
 		elif [ ! -z "${TOS}" ]; then
 			cp ${RKBIN}/${TOS}   tee.bin
 		else
-			echo "ERROR: No tee bin"
-			exit 1
+			echo "WARN: No tee bin"
 		fi
 
 		TEE_OFFSET=`sed -n "/ADDR=/s/ADDR=//p" ${INI} | tr -d '\r'`

commit f7d83d10b49009e94221a92e04f74cb01f1fc5b0
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Feb 10 10:32:02 2022 +0000

    rockchip: fit: Add make_fit_uboot.sh
    
    Only adding U-Boot proper for the bootflow: SPL => U-Boot(secure).
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I06750a6ce6b3e8eee5fc3bce8156d52dc93f48b5

diff --git a/arch/arm/mach-rockchip/fit_nodes.sh b/arch/arm/mach-rockchip/fit_nodes.sh
index db230e251e..da31ce60fb 100755
--- a/arch/arm/mach-rockchip/fit_nodes.sh
+++ b/arch/arm/mach-rockchip/fit_nodes.sh
@@ -179,6 +179,8 @@ function gen_bl32_node()
 			};
 		};"
 	LOADABLE_OPTEE=", \"optee\""
+	FIRMWARE_OPTEE="firmware = \"optee\";"
+	FIRMWARE_SIGN=", \"firmware\""
 }
 
 function gen_mcu_node()
@@ -342,7 +344,7 @@ echo "	};
 		conf {
 			description = \"${PLATFORM}\";
 			rollback-index = <0x0>;
-			firmware = \"optee\";
+			${FIRMWARE_OPTEE}
 			loadables = \"uboot\"${LOADABLE_OTHER};
 			${STANDALONE_MCU}
 			fdt = \"fdt\"${PROP_KERN_DTB};
@@ -350,7 +352,7 @@ echo "	};
 				algo = \"sha256,rsa2048\";
 				${ALGO_PADDING}
 				key-name-hint = \"dev\";
-				sign-images = \"fdt\", \"firmware\", \"loadables\"${STANDALONE_SIGN};
+				sign-images = \"fdt\", \"loadables\"${FIRMWARE_SIGN}${STANDALONE_SIGN};
 			};
 		};
 	};
diff --git a/arch/arm/mach-rockchip/make_fit_uboot.sh b/arch/arm/mach-rockchip/make_fit_uboot.sh
new file mode 100755
index 0000000000..1d0b2cfa03
--- /dev/null
+++ b/arch/arm/mach-rockchip/make_fit_uboot.sh
@@ -0,0 +1,13 @@
+#!/bin/bash
+#
+# Copyright (C) 2022 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+source ./${srctree}/arch/arm/mach-rockchip/fit_nodes.sh
+gen_header
+gen_uboot_node
+gen_fdt_node
+gen_arm_configurations
+

commit 3e344c46b838e2318caac2202ddad26b08140d43
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Feb 11 10:20:06 2022 +0800

    common: android: add ANDROID_AVB_ROLLBACK_INDEX
    
    Add ANDROID_AVB_ROLLBACK_INDEX to support the android verified
    boot rollback index.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I324fc251e4680fed48672bcec15a59a74f529e62

diff --git a/common/Kconfig b/common/Kconfig
index bfb614b720..2de87b3090 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -636,6 +636,12 @@ config ANDROID_AVB
 	  to verify the boot images. The vbmeta must be matched with images,
 	  if not, verify failed.
 
+config ANDROID_AVB_ROLLBACK_INDEX
+	bool"Support Android Verified Boot Rollback Index"
+	default n
+	help
+	  If enabled, support the android verified boot rollback index.
+
 config ANDROID_KEYMASTER_CA
 	bool "Support Keymaster CA"
 	default y
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index be93410f1b..772e6bf0d8 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -568,10 +568,10 @@ retry_verify:
 	    (unlocked & LOCK_MASK)) {
 		int len = 0;
 		char *bootargs, *newbootargs;
-
+#ifdef CONFIG_ANDROID_AVB_ROLLBACK_INDEX
 		if (rk_avb_update_stored_rollback_indexes_for_slot(ops, slot_data[0]))
 			printf("Fail to update the rollback indexes.\n");
-
+#endif
 		if (*slot_data[0]->cmdline) {
 			debug("Kernel command line: %s\n", slot_data[0]->cmdline);
 			len += strlen(slot_data[0]->cmdline);

commit b5236b6b662f5d6aaa7730234e54ffc4ebb545b2
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Jan 14 16:40:43 2022 +0800

    drivers: rkflash: Fix XM25QH128C configuration
    
    Change-Id: Ifb9a67eac3f1a76e0e4f1e9af8adf7aad13795d1
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/sfc_nor.c b/drivers/rkflash/sfc_nor.c
index dbef45a0e2..c5f4d97f0d 100644
--- a/drivers/rkflash/sfc_nor.c
+++ b/drivers/rkflash/sfc_nor.c
@@ -80,7 +80,7 @@ static struct flash_info spi_flash_tbl[] = {
 	/* XM25QH64C */
 	{ 0x204017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0 },
 	/* XM25QH128C */
-	{ 0x204018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 15, 6, 0 },
+	{ 0x204018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x05, 15, 9, 0 },
 	/* XM25QH256C */
 	{ 0x204019, 128, 8, 0x13, 0x12, 0x6C, 0x34, 0x21, 0xDC, 0x1C, 16, 9, 0 },
 	/* XM25QH64B */

commit 3e59c137b5b3c7039faf6cbcff35ee2985731051
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Tue Feb 8 09:17:31 2022 +0800

    video/drm: vop2: add support uv swap for some bt1120 busformat
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: Ia485413f7dffc114f3cec227fadd47fbe1fc4fd5

diff --git a/drivers/video/drm/rockchip_vop2.c b/drivers/video/drm/rockchip_vop2.c
index f7781826d8..fe2bc8f349 100644
--- a/drivers/video/drm/rockchip_vop2.c
+++ b/drivers/video/drm/rockchip_vop2.c
@@ -1084,10 +1084,14 @@ static bool is_uv_swap(u32 bus_format, u32 output_mode)
 	 *
 	 * From H/W testing, YUV444 mode need a rb swap.
 	 */
-	if ((bus_format == MEDIA_BUS_FMT_YUV8_1X24 ||
+	if (bus_format == MEDIA_BUS_FMT_YVYU8_1X16 ||
+	    bus_format == MEDIA_BUS_FMT_VYUY8_1X16 ||
+	    bus_format == MEDIA_BUS_FMT_YVYU8_2X8 ||
+	    bus_format == MEDIA_BUS_FMT_VYUY8_2X8 ||
+	    ((bus_format == MEDIA_BUS_FMT_YUV8_1X24 ||
 	     bus_format == MEDIA_BUS_FMT_YUV10_1X30) &&
 	    (output_mode == ROCKCHIP_OUT_MODE_AAAA ||
-	     output_mode == ROCKCHIP_OUT_MODE_P888))
+	     output_mode == ROCKCHIP_OUT_MODE_P888)))
 		return true;
 	else
 		return false;

commit a331db510387a5279ca7131e5ac30e3daeb7ccc7
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Thu Jan 27 18:03:23 2022 +0800

    configs: rk3588: enable PHY_ROCKCHIP_USBDP
    
    Enable CONFIG_PHY_ROCKCHIP_USBDP to support usb3 otg 1 host function
    for RK3588 SoCs.
    
    Change-Id: Ibbca9fce730b158a76778eb61fb9a326b4a9ce4a
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/configs/rk3588_defconfig b/configs/rk3588_defconfig
index 20783d2193..166ecd5059 100644
--- a/configs/rk3588_defconfig
+++ b/configs/rk3588_defconfig
@@ -141,6 +141,7 @@ CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX=y
 CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX_HDMI=y
+CONFIG_PHY_ROCKCHIP_USBDP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_DM_PMIC=y

commit fb929110ea1b43783b160c6ccc091b30d96a9b92
Author: Chen Shunqing <csq@rock-chips.com>
Date:   Fri Jan 28 12:17:20 2022 +0800

    power: bq25890: fix pg_stat no detection
    
    Signed-off-by: Chen Shunqing <csq@rock-chips.com>
    Change-Id: Ie8cdb703e2c6e03c8e171190bbd9be4baa7cdad7

diff --git a/drivers/power/charge/bq25890_charger.c b/drivers/power/charge/bq25890_charger.c
index 23554d4056..ded5498c4a 100644
--- a/drivers/power/charge/bq25890_charger.c
+++ b/drivers/power/charge/bq25890_charger.c
@@ -58,6 +58,7 @@ struct bq25890 {
 	u32 ichg;
 	u32 chip_id;
 	struct udevice *pd;
+	bool pd_online;
 };
 
 /* Thermal Regulation Threshold lookup table, in degrees Celsius */
@@ -159,9 +160,18 @@ static bool bq25890_charger_status(struct bq25890 *charger)
 {
 	int state_of_charger;
 	u16 value;
+	int i = 0;
 
+__retry:
 	value = bq25890_read(charger, BQ25890_CHARGERSTAUS_REG);
 	state_of_charger = value & 0x04;
+	if (!state_of_charger && charger->pd_online) {
+		if (i < 3) {
+			i++;
+			mdelay(20);
+			goto __retry;
+		}
+	}
 
 	return state_of_charger;
 }
@@ -205,6 +215,7 @@ static int bq25890_get_pd_output_val(struct bq25890 *charger,
 
 	*vol = pd_data.voltage;
 	*cur = pd_data.current;
+	charger->pd_online = pd_data.online;
 
 	return 0;
 }

commit 0f0dc534e71124cad7055cdaac5f6986dfcbbc15
Author: Chen Shunqing <csq@rock-chips.com>
Date:   Fri Jan 28 10:14:29 2022 +0800

    power: bq25890: disable auto dp/dm detection when pd in
    
    Signed-off-by: Chen Shunqing <csq@rock-chips.com>
    Change-Id: I38ce8bfdf5313c8f04acaa18d71fc2dcb8d7f135

diff --git a/drivers/power/charge/bq25890_charger.c b/drivers/power/charge/bq25890_charger.c
index 3e9b77328a..23554d4056 100644
--- a/drivers/power/charge/bq25890_charger.c
+++ b/drivers/power/charge/bq25890_charger.c
@@ -28,6 +28,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define BQ25890_CHARGERSTAUS_REG		0x0B
 #define BQ25890_INPUTVOLTAGE_REG		0x0D
 #define BQ25890_INPUTCURREN_REG			0x00
+#define BQ25890_AUTO_DPDM_REG			0x02
 
 /*
  * Most of the val -> idx conversions can be computed, given the minimum,
@@ -208,6 +209,16 @@ static int bq25890_get_pd_output_val(struct bq25890 *charger,
 	return 0;
 }
 
+static void bq25890_set_auto_dpdm_detect(struct bq25890 *charger, bool enable)
+{
+	u8 value;
+
+	value = bq25890_read(charger, BQ25890_AUTO_DPDM_REG);
+	value &= 0xfe;
+	value |= enable;
+	bq25890_write(charger, BQ25890_AUTO_DPDM_REG, value);
+}
+
 static void bq25890_charger_current_init(struct bq25890 *charger)
 {
 	u8 charge_current =  bq25890_find_idx(BQ25890_CHARGE_CURRENT_1500MA * 1000, TBL_ICHG);
@@ -233,6 +244,7 @@ static void bq25890_charger_current_init(struct bq25890 *charger)
 					   TBL_IINLIM);
 		cur_idx  = cur_idx << 8;
 		if (pd_inputcurrent != 0) {
+			bq25890_set_auto_dpdm_detect(charger, false);
 			bq25890_write(charger, BQ25890_INPUTCURREN_REG,
 				      cur_idx);
 			if (vol_idx)

commit 31fc367059a592ae885d46e04d199d0004cb0b90
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Feb 9 06:42:11 2022 +0000

    configs: rk3368: set uboot.img size 2MB*2
    
    Fix compile error:
        ERROR: pack uboot failed! u-boot.bin actual: 1064456 bytes, max limit: 1046528 bytes
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I8415c052a9ade9302150468ce59fac6a599a29ee

diff --git a/configs/rk3368_defconfig b/configs/rk3368_defconfig
index 939a1d472a..027517f83f 100644
--- a/configs/rk3368_defconfig
+++ b/configs/rk3368_defconfig
@@ -6,6 +6,8 @@ CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_CHIP_NAME="RK3368H"
 CONFIG_LOADER_INI="RK3368HMINIALL.ini"
 CONFIG_TRUST_INI="RK3368HTRUST.ini"
+CONFIG_UBOOT_SIZE_KB=2048
+CONFIG_UBOOT_NUM=2
 CONFIG_TRUST_SHA_MODE=2
 CONFIG_TARGET_EVB_RK3368=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3368-evb"

commit 5035821e25b4216a5f34d7a4da91c9a35822312e
Author: Chen Shunqing <csq@rock-chips.com>
Date:   Thu Jan 27 14:16:04 2022 +0800

    power: bq25700: fix pd can't charge
    
    Signed-off-by: Chen Shunqing <csq@rock-chips.com>
    Change-Id: Id09bc428e356a64e70b54a3dbf7916774a4fec1c

diff --git a/drivers/power/charge/bq25700_charger.c b/drivers/power/charge/bq25700_charger.c
index 2564b54e90..382be6be86 100644
--- a/drivers/power/charge/bq25700_charger.c
+++ b/drivers/power/charge/bq25700_charger.c
@@ -181,15 +181,17 @@ static int bq25700_get_pd_output_val(struct bq25700 *charger,
 				     int *vol, int *cur)
 {
 	struct power_delivery_data pd_data;
+	int ret;
 
 	if (!charger->pd)
-		return -1;
+		return -EINVAL;
 
 	memset(&pd_data, 0, sizeof(pd_data));
-	if (!power_delivery_get_data(charger->pd, &pd_data))
-		return -1;
+	ret = power_delivery_get_data(charger->pd, &pd_data);
+	if (ret)
+		return ret;
 	if (!pd_data.online || !pd_data.voltage || !pd_data.current)
-		return -1;
+		return -EINVAL;
 
 	*vol = pd_data.voltage;
 	*cur = pd_data.current;

commit 3eaaed7c453325494b9ae268ae5b23fe19975d68
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Thu Jan 27 11:21:27 2022 +0800

    rockchip: rk3588: set emmc io drive strength
    
    - data and cmd: 50ohm
    - clock: 25ohm
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: I68c47651f07e400a743ae4e8f8c4b7e91cd43a97

diff --git a/arch/arm/mach-rockchip/rk3588/rk3588.c b/arch/arm/mach-rockchip/rk3588/rk3588.c
index ec8c7e2ef7..453a58e3a3 100644
--- a/arch/arm/mach-rockchip/rk3588/rk3588.c
+++ b/arch/arm/mach-rockchip/rk3588/rk3588.c
@@ -851,6 +851,15 @@ int arch_cpu_init(void)
 		writel(0x00070002, EMMC_IOC_BASE + EMMC_IOC_GPIO2A_DS_L);
 		writel(0x77772222, EMMC_IOC_BASE + EMMC_IOC_GPIO2D_DS_L);
 		writel(0x07000200, EMMC_IOC_BASE + EMMC_IOC_GPIO2D_DS_H);
+	} else if (readl(BUS_IOC_BASE + BUS_IOC_GPIO2D_IOMUX_SEL_L) == 0x1111) {
+		/*
+		 * set the emmc io drive strength:
+		 * data and cmd: 50ohm
+		 * clock: 25ohm
+		 */
+		writel(0x00770052, EMMC_IOC_BASE + EMMC_IOC_GPIO2A_DS_L);
+		writel(0x77772222, EMMC_IOC_BASE + EMMC_IOC_GPIO2D_DS_L);
+		writel(0x77772222, EMMC_IOC_BASE + EMMC_IOC_GPIO2D_DS_H);
 	} else if ((readl(BUS_IOC_BASE + BUS_IOC_GPIO2B_IOMUX_SEL_L) & 0xf0ff) == 0x3033) {
 		writel(0x33002200, VCCIO3_5_IOC_BASE + IOC_VCCIO3_5_GPIO2A_DS_H);
 		writel(0x30332022, VCCIO3_5_IOC_BASE + IOC_VCCIO3_5_GPIO2B_DS_L);

commit 2480f5dad8a1742e0eb59734b8c6d4fd62286559
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Tue Nov 30 14:57:36 2021 +0800

    phy: rockchip: add usbdp combo phy driver
    
    This adds a new USBDP combo PHY with Samsung IP block driver.
    
    Porting from Linux develop-5.10 commit ab40e563be81 ("phy: rockchip:
    add usbdp combo phy driver").
    
    Change-Id: I241de62e1c19ad7ad0474b6b73898e8ee3a1ef2b
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index af2befe522..092a8a3eb0 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -108,6 +108,14 @@ config PHY_ROCKCHIP_SNPS_PCIE3
 	help
 	  Support for Rockchip PCIe3 PHY with Synopsys IP block.
 
+config PHY_ROCKCHIP_USBDP
+	tristate "Rockchip USBDP COMBO PHY Driver"
+	depends on ARCH_ROCKCHIP
+	select PHY
+	help
+	  Enable this to support the Rockchip USB3.0/DP
+	  combo PHY with Samsung IP block.
+
 config PHY_ROCKCHIP_TYPEC
 	bool "Support Rockchip TYPEC PHY Driver"
 	depends on ARCH_ROCKCHIP
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index a861bc48af..27c423e97b 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -14,6 +14,7 @@ obj-$(CONFIG_PHY_ROCKCHIP_NANENG_EDP) += phy-rockchip-naneng-edp.o
 obj-$(CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX) += phy-rockchip-samsung-hdptx.o
 obj-$(CONFIG_PHY_ROCKCHIP_SNPS_PCIE3) += phy-rockchip-snps-pcie3.o
 obj-$(CONFIG_PHY_ROCKCHIP_TYPEC) += phy-rockchip-typec.o
+obj-$(CONFIG_PHY_ROCKCHIP_USBDP) += phy-rockchip-usbdp.o
 obj-$(CONFIG_PHY_SANDBOX) += sandbox-phy.o
 obj-$(CONFIG_$(SPL_)PIPE3_PHY) += ti-pipe3-phy.o
 obj-$(CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY) += phy-rockchip-naneng-combphy.o
diff --git a/drivers/phy/phy-rockchip-usbdp.c b/drivers/phy/phy-rockchip-usbdp.c
new file mode 100644
index 0000000000..3782659b10
--- /dev/null
+++ b/drivers/phy/phy-rockchip-usbdp.c
@@ -0,0 +1,865 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Rockchip USBDP Combo PHY with Samsung IP block driver
+ *
+ * Copyright (C) 2021 Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <dm/lists.h>
+#include <dm/of.h>
+#include <dm/of_access.h>
+#include <generic-phy.h>
+#include <linux/bitfield.h>
+#include <linux/usb/ch9.h>
+#include <linux/usb/otg.h>
+#include <regmap.h>
+#include <reset.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cpu.h>
+
+#include <linux/usb/phy-rockchip-usbdp.h>
+
+#define BIT_WRITEABLE_SHIFT	16
+
+enum {
+	UDPHY_MODE_NONE		= 0,
+	UDPHY_MODE_USB		= BIT(0),
+	UDPHY_MODE_DP		= BIT(1),
+	UDPHY_MODE_DP_USB	= BIT(1) | BIT(0),
+};
+
+struct udphy_grf_reg {
+	unsigned int	offset;
+	unsigned int	bitend;
+	unsigned int	bitstart;
+	unsigned int	disable;
+	unsigned int	enable;
+};
+
+/**
+ * struct reg_sequence - An individual write from a sequence of writes.
+ *
+ * @reg: Register address.
+ * @def: Register value.
+ * @delay_us: Delay to be applied after the register write in microseconds
+ *
+ * Register/value pairs for sequences of writes with an optional delay in
+ * microseconds to be applied after each write.
+ */
+struct reg_sequence {
+	unsigned int reg;
+	unsigned int def;
+	unsigned int delay_us;
+};
+
+struct udphy_grf_cfg {
+	/* u2phy-grf */
+	struct udphy_grf_reg	bvalid_phy_con;
+	struct udphy_grf_reg	bvalid_grf_con;
+
+	/* usb-grf */
+	struct udphy_grf_reg	usb3otg0_cfg;
+	struct udphy_grf_reg	usb3otg1_cfg;
+
+	/* usbdpphy-grf */
+	struct udphy_grf_reg	low_pwrn;
+	struct udphy_grf_reg	rx_lfps;
+};
+
+struct rockchip_udphy;
+
+struct rockchip_udphy_cfg {
+	/* resets to be requested */
+	const char * const *rst_list;
+	int num_rsts;
+
+	struct udphy_grf_cfg grfcfg;
+	int (*combophy_init)(struct rockchip_udphy *udphy);
+};
+
+struct rockchip_udphy {
+	struct udevice *dev;
+	struct regmap *pma_regmap;
+	struct regmap *u2phygrf;
+	struct regmap *udphygrf;
+	struct regmap *usbgrf;
+	struct regmap *vogrf;
+//	struct typec_switch *sw;
+//	struct typec_mux *mux;
+
+	/* clocks and rests */
+	struct reset_ctl *rsts;
+
+	/* PHY status management */
+	bool flip;
+	bool mode_change;
+	u8 mode;
+	u8 status;
+
+	/* utilized for USB */
+	bool hs; /* flag for high-speed */
+
+	/* utilized for DP */
+	struct gpio_desc *sbu1_dc_gpio;
+	struct gpio_desc *sbu2_dc_gpio;
+	u32 lane_mux_sel[4];
+	u32 dp_lane_sel[4];
+	u32 dp_aux_dout_sel;
+	u32 dp_aux_din_sel;
+	int id;
+
+	/* PHY const config */
+	const struct rockchip_udphy_cfg *cfgs;
+};
+
+static const struct reg_sequence rk3588_udphy_24m_refclk_cfg[] = {
+	{0x0090, 0x68}, {0x0094, 0x68},
+	{0x0128, 0x24}, {0x012c, 0x44},
+	{0x0130, 0x3f}, {0x0134, 0x44},
+	{0x015c, 0xa9}, {0x0160, 0x71},
+	{0x0164, 0x71}, {0x0168, 0xa9},
+	{0x0174, 0xa9}, {0x0178, 0x71},
+	{0x017c, 0x71}, {0x0180, 0xa9},
+	{0x018c, 0x41}, {0x0190, 0x00},
+	{0x0194, 0x05}, {0x01ac, 0x2a},
+	{0x01b0, 0x17}, {0x01b4, 0x17},
+	{0x01b8, 0x2a}, {0x01c8, 0x04},
+	{0x01cc, 0x08}, {0x01d0, 0x08},
+	{0x01d4, 0x04}, {0x01d8, 0x20},
+	{0x01dc, 0x01}, {0x01e0, 0x09},
+	{0x01e4, 0x03}, {0x01f0, 0x29},
+	{0x01f4, 0x02}, {0x01f8, 0x02},
+	{0x01fc, 0x29}, {0x0208, 0x2a},
+	{0x020c, 0x17}, {0x0210, 0x17},
+	{0x0214, 0x2a}, {0x0224, 0x20},
+	{0x03f0, 0x0d}, {0x03f4, 0x09},
+	{0x03f8, 0x09}, {0x03fc, 0x0d},
+	{0x0404, 0x0e}, {0x0408, 0x14},
+	{0x040c, 0x14}, {0x0410, 0x3b},
+	{0x0ce0, 0x68}, {0x0ce8, 0xd0},
+	{0x0cf0, 0x87}, {0x0cf8, 0x70},
+	{0x0d00, 0x70}, {0x0d08, 0xa9},
+	{0x1ce0, 0x68}, {0x1ce8, 0xd0},
+	{0x1cf0, 0x87}, {0x1cf8, 0x70},
+	{0x1d00, 0x70}, {0x1d08, 0xa9},
+	{0x0a3c, 0xd0}, {0x0a44, 0xd0},
+	{0x0a48, 0x01}, {0x0a4c, 0x0d},
+	{0x0a54, 0xe0}, {0x0a5c, 0xe0},
+	{0x0a64, 0xa8}, {0x1a3c, 0xd0},
+	{0x1a44, 0xd0}, {0x1a48, 0x01},
+	{0x1a4c, 0x0d}, {0x1a54, 0xe0},
+	{0x1a5c, 0xe0}, {0x1a64, 0xa8}
+};
+
+static const struct reg_sequence rk3588_udphy_init_sequence[] = {
+	{0x0104, 0x44}, {0x0234, 0xE8},
+	{0x0248, 0x44}, {0x028C, 0x18},
+	{0x081C, 0xE5}, {0x0878, 0x00},
+	{0x0994, 0x1C}, {0x0AF0, 0x00},
+	{0x181C, 0xE5}, {0x1878, 0x00},
+	{0x1994, 0x1C}, {0x1AF0, 0x00},
+	{0x0428, 0x60}, {0x0D58, 0x33},
+	{0x1D58, 0x33}, {0x0990, 0x74},
+	{0x0D64, 0x17}, {0x08C8, 0x13},
+	{0x1990, 0x74}, {0x1D64, 0x17},
+	{0x18C8, 0x13}, {0x0D90, 0x40},
+	{0x0DA8, 0x40}, {0x0DC0, 0x40},
+	{0x0DD8, 0x40}, {0x1D90, 0x40},
+	{0x1DA8, 0x40}, {0x1DC0, 0x40},
+	{0x1DD8, 0x40}, {0x03C0, 0x30},
+	{0x03C4, 0x06}, {0x0E10, 0x00},
+	{0x1E10, 0x00}, {0x043C, 0x0F},
+	{0x0D2C, 0xFF}, {0x1D2C, 0xFF},
+	{0x0D34, 0x0F}, {0x1D34, 0x0F},
+	{0x08FC, 0x2A}, {0x0914, 0x28},
+	{0x0A30, 0x03}, {0x0E38, 0x05},
+	{0x0ECC, 0x27}, {0x0ED0, 0x22},
+	{0x0ED4, 0x26}, {0x18FC, 0x2A},
+	{0x1914, 0x28}, {0x1A30, 0x03},
+	{0x1E38, 0x05}, {0x1ECC, 0x27},
+	{0x1ED0, 0x22}, {0x1ED4, 0x26},
+	{0x0048, 0x0F}, {0x0060, 0x3C},
+	{0x0064, 0xF7}, {0x006C, 0x20},
+	{0x0070, 0x7D}, {0x0074, 0x68},
+	{0x0AF4, 0x1A}, {0x1AF4, 0x1A},
+	{0x0440, 0x3F}, {0x10D4, 0x08},
+	{0x20D4, 0x08}, {0x00D4, 0x30},
+	{0x0024, 0x6e},
+};
+
+static inline int grfreg_write(struct regmap *base,
+			       const struct udphy_grf_reg *reg, bool en)
+{
+	u32 val, mask, tmp;
+
+	tmp = en ? reg->enable : reg->disable;
+	mask = GENMASK(reg->bitend, reg->bitstart);
+	val = (tmp << reg->bitstart) | (mask << BIT_WRITEABLE_SHIFT);
+
+	return regmap_write(base, reg->offset, val);
+}
+
+static int __regmap_multi_reg_write(struct regmap *map,
+				     const struct reg_sequence *regs, int num_regs)
+{
+	int i, ret = 0;
+
+	for (i = 0; i < num_regs; i++) {
+		ret = regmap_write(map, regs[i].reg, regs[i].def);
+
+		if (regs[i].delay_us)
+			udelay(regs[i].delay_us);
+	}
+
+	return ret;
+}
+
+static int udphy_clk_init(struct rockchip_udphy *udphy, struct udevice *dev)
+{
+	return 0;
+}
+
+static int udphy_reset_init(struct rockchip_udphy *udphy, struct udevice *dev)
+{
+	const struct rockchip_udphy_cfg *cfg = udphy->cfgs;
+	int idx;
+	int ret;
+
+	udphy->rsts = devm_kcalloc(dev, cfg->num_rsts,
+				   sizeof(*udphy->rsts), GFP_KERNEL);
+	if (!udphy->rsts)
+		return -ENOMEM;
+
+	for (idx = 0; idx < cfg->num_rsts; idx++) {
+		const char *name = cfg->rst_list[idx];
+
+		ret = reset_get_by_name(dev, name, &udphy->rsts[idx]);
+		if (ret) {
+			dev_err(dev, "failed to get %s reset\n", name);
+			goto err;
+		}
+
+		reset_assert(&udphy->rsts[idx]);
+	}
+
+	return 0;
+
+err:
+	devm_kfree(dev, udphy->rsts);
+	return ret;
+}
+
+static int udphy_get_rst_idx(const char * const *list, int num, char *name)
+{
+	int idx;
+
+	for (idx = 0; idx < num; idx++) {
+		if (!strcmp(list[idx], name))
+			return idx;
+	}
+
+	return -EINVAL;
+}
+
+static int udphy_reset_assert(struct rockchip_udphy *udphy, char *name)
+{
+	const struct rockchip_udphy_cfg *cfg = udphy->cfgs;
+	int idx;
+
+	idx = udphy_get_rst_idx(cfg->rst_list, cfg->num_rsts, name);
+	if (idx < 0)
+		return idx;
+
+	return reset_assert(&udphy->rsts[idx]);
+}
+
+static int udphy_reset_deassert(struct rockchip_udphy *udphy, char *name)
+{
+	const struct rockchip_udphy_cfg *cfg = udphy->cfgs;
+	int idx;
+
+	idx = udphy_get_rst_idx(cfg->rst_list, cfg->num_rsts, name);
+	if (idx < 0)
+		return idx;
+
+	return reset_deassert(&udphy->rsts[idx]);
+}
+
+static void udphy_u3_port_disable(struct rockchip_udphy *udphy, u8 disable)
+{
+	const struct rockchip_udphy_cfg *cfg = udphy->cfgs;
+	const struct udphy_grf_reg *preg;
+
+	preg = udphy->id ? &cfg->grfcfg.usb3otg1_cfg : &cfg->grfcfg.usb3otg0_cfg;
+	grfreg_write(udphy->usbgrf, preg, disable);
+}
+
+__maybe_unused
+static void udphy_usb_bvalid_enable(struct rockchip_udphy *udphy, u8 enable)
+{
+	const struct rockchip_udphy_cfg *cfg = udphy->cfgs;
+
+	grfreg_write(udphy->u2phygrf, &cfg->grfcfg.bvalid_phy_con, enable);
+	grfreg_write(udphy->u2phygrf, &cfg->grfcfg.bvalid_grf_con, enable);
+}
+
+/*
+ * In usb/dp combo phy driver, here are 2 ways to mapping lanes.
+ *
+ * 1 Type-C Mapping table (DP_Alt_Mode V1.0b remove ABF pin mapping)
+ * ---------------------------------------------------------------------------
+ * Type-C Pin   B11-B10       A2-A3       A11-A10       B2-B3
+ * PHY Pad      ln0(tx/rx)    ln1(tx)     ln2(tx/rx)    ln3(tx)
+ * C/E(Normal)  dpln3         dpln2       dpln0         dpln1
+ * C/E(Flip  )  dpln0         dpln1       dpln3         dpln2
+ * D/F(Normal)  usbrx         usbtx       dpln0         dpln1
+ * D/F(Flip  )  dpln0         dpln1       usbrx         usbtx
+ * A(Normal  )  dpln3         dpln1       dpln2         dpln0
+ * A(Flip    )  dpln2         dpln0       dpln3         dpln1
+ * B(Normal  )  usbrx         usbtx       dpln1         dpln0
+ * B(Flip    )  dpln1         dpln0       usbrx         usbtx
+ * ---------------------------------------------------------------------------
+ *
+ * 2 Mapping the lanes in dtsi
+ * if all 4 lane assignment for dp function, define rockchip,dp-lane-mux = <x x x x>;
+ * sample as follow:
+ * ---------------------------------------------------------------------------
+ *                        B11-B10       A2-A3       A11-A10       B2-B3
+ * rockchip,dp-lane-mux   ln0(tx/rx)    ln1(tx)     ln2(tx/rx)    ln3(tx)
+ * <0 1 2 3>              dpln0         dpln1       dpln2         dpln3
+ * <2 3 0 1>              dpln2         dpln3       dpln0         dpln1
+ * ---------------------------------------------------------------------------
+ * if 2 lane for dp function, 2 lane for usb function, define rockchip,dp-lane-mux = <x x>;
+ * sample as follow:
+ * ---------------------------------------------------------------------------
+ *                        B11-B10       A2-A3       A11-A10       B2-B3
+ * rockchip,dp-lane-mux   ln0(tx/rx)    ln1(tx)     ln2(tx/rx)    ln3(tx)
+ * <0 1>                  dpln0         dpln1       usbrx         usbtx
+ * <2 3>                  usbrx         usbtx       dpln0         dpln1
+ * ---------------------------------------------------------------------------
+ */
+
+__maybe_unused
+static int upphy_set_typec_default_mapping(struct rockchip_udphy *udphy)
+{
+	if (udphy->flip) {
+		udphy->dp_lane_sel[0] = 0;
+		udphy->dp_lane_sel[1] = 1;
+		udphy->dp_lane_sel[2] = 3;
+		udphy->dp_lane_sel[3] = 2;
+		udphy->lane_mux_sel[0] = PHY_LANE_MUX_DP;
+		udphy->lane_mux_sel[1] = PHY_LANE_MUX_DP;
+		udphy->lane_mux_sel[2] = PHY_LANE_MUX_USB;
+		udphy->lane_mux_sel[3] = PHY_LANE_MUX_USB;
+		udphy->dp_aux_dout_sel = PHY_AUX_DP_DATA_POL_INVERT;
+		udphy->dp_aux_din_sel = PHY_AUX_DP_DATA_POL_INVERT;
+	} else {
+		udphy->dp_lane_sel[0] = 2;
+		udphy->dp_lane_sel[1] = 3;
+		udphy->dp_lane_sel[2] = 1;
+		udphy->dp_lane_sel[3] = 0;
+		udphy->lane_mux_sel[0] = PHY_LANE_MUX_USB;
+		udphy->lane_mux_sel[1] = PHY_LANE_MUX_USB;
+		udphy->lane_mux_sel[2] = PHY_LANE_MUX_DP;
+		udphy->lane_mux_sel[3] = PHY_LANE_MUX_DP;
+		udphy->dp_aux_dout_sel = PHY_AUX_DP_DATA_POL_NORMAL;
+		udphy->dp_aux_din_sel = PHY_AUX_DP_DATA_POL_NORMAL;
+	}
+
+	udphy->mode = UDPHY_MODE_DP_USB;
+
+	return 0;
+}
+
+static int udphy_setup(struct rockchip_udphy *udphy)
+{
+	const struct rockchip_udphy_cfg *cfg = udphy->cfgs;
+	int ret = 0;
+
+	if (cfg->combophy_init) {
+		ret = cfg->combophy_init(udphy);
+		if (ret)
+			dev_err(udphy->dev, "failed to init combophy\n");
+	}
+
+	return ret;
+}
+
+static int udphy_disable(struct rockchip_udphy *udphy)
+{
+	const struct rockchip_udphy_cfg *cfg = udphy->cfgs;
+	int i;
+
+	for (i = 0; i < cfg->num_rsts; i++)
+		reset_assert(&udphy->rsts[i]);
+
+	return 0;
+}
+
+static int udphy_parse_lane_mux_data(struct rockchip_udphy *udphy, const struct device_node *np)
+{
+	struct property *prop;
+	int ret, i, len, num_lanes;
+
+	prop = of_find_property(np, "rockchip,dp-lane-mux", &len);
+	if (!prop) {
+		dev_dbg(udphy->dev, "failed to find dp lane mux, following dp alt mode\n");
+		udphy->mode = UDPHY_MODE_USB;
+		return 0;
+	}
+
+	num_lanes = len / sizeof(u32);
+
+	if (num_lanes != 2 && num_lanes != 4) {
+		dev_err(udphy->dev, "invalid number of lane mux\n");
+		return -EINVAL;
+	}
+
+	ret = of_read_u32_array(np, "rockchip,dp-lane-mux", udphy->dp_lane_sel, num_lanes);
+	if (ret) {
+		dev_err(udphy->dev, "get dp lane mux failed\n");
+		return -EINVAL;
+	}
+
+	for (i = 0; i < num_lanes; i++) {
+		int j;
+
+		if (udphy->dp_lane_sel[i] > 3) {
+			dev_err(udphy->dev, "lane mux between 0 and 3, exceeding the range\n");
+			return -EINVAL;
+		}
+
+		udphy->lane_mux_sel[udphy->dp_lane_sel[i]] = PHY_LANE_MUX_DP;
+
+		for (j = i + 1; j < num_lanes; j++) {
+			if (udphy->dp_lane_sel[i] == udphy->dp_lane_sel[j]) {
+				dev_err(udphy->dev, "set repeat lane mux value\n");
+				return -EINVAL;
+			}
+		}
+	}
+
+	udphy->mode = UDPHY_MODE_DP;
+	if (num_lanes == 2)
+		udphy->mode |= UDPHY_MODE_USB;
+
+	return 0;
+}
+
+static int udphy_parse_dt(struct rockchip_udphy *udphy, struct udevice *dev)
+{
+	const struct device_node *np = ofnode_to_np(dev->node);
+	enum usb_device_speed maximum_speed;
+	int ret;
+
+	udphy->u2phygrf = syscon_regmap_lookup_by_phandle(dev, "rockchip,u2phy-grf");
+	if (IS_ERR(udphy->u2phygrf)) {
+		if (PTR_ERR(udphy->u2phygrf) == -ENODEV) {
+			dev_warn(dev, "missing u2phy-grf dt node\n");
+			udphy->u2phygrf = NULL;
+		} else {
+			return PTR_ERR(udphy->u2phygrf);
+		}
+	}
+
+	udphy->udphygrf = syscon_regmap_lookup_by_phandle(dev, "rockchip,usbdpphy-grf");
+	if (IS_ERR(udphy->udphygrf)) {
+		if (PTR_ERR(udphy->udphygrf) == -ENODEV) {
+			dev_warn(dev, "missing usbdpphy-grf dt node\n");
+			udphy->udphygrf = NULL;
+		} else {
+			return PTR_ERR(udphy->udphygrf);
+		}
+	}
+
+	udphy->usbgrf = syscon_regmap_lookup_by_phandle(dev, "rockchip,usb-grf");
+	if (IS_ERR(udphy->usbgrf)) {
+		if (PTR_ERR(udphy->usbgrf) == -ENODEV) {
+			dev_warn(dev, "missing usb-grf dt node\n");
+			udphy->usbgrf = NULL;
+		} else {
+			return PTR_ERR(udphy->usbgrf);
+		}
+	}
+
+	udphy->vogrf = syscon_regmap_lookup_by_phandle(dev, "rockchip,vo-grf");
+	if (IS_ERR(udphy->vogrf)) {
+		if (PTR_ERR(udphy->vogrf) == -ENODEV) {
+			dev_warn(dev, "missing vo-grf dt node\n");
+			udphy->vogrf = NULL;
+		} else {
+			return PTR_ERR(udphy->vogrf);
+		}
+	}
+
+	ret = udphy_parse_lane_mux_data(udphy, np);
+	if (ret)
+		return ret;
+
+	if (dev_read_prop(dev, "maximum-speed", NULL)) {
+		maximum_speed = usb_get_maximum_speed(dev->node);
+		udphy->hs = maximum_speed <= USB_SPEED_HIGH ? true : false;
+	}
+
+	ret = udphy_clk_init(udphy, dev);
+	if (ret)
+		return ret;
+
+	ret = udphy_reset_init(udphy, dev);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
+static int udphy_power_on(struct rockchip_udphy *udphy, u8 mode)
+{
+	int ret;
+
+	if (!(udphy->mode & mode)) {
+		dev_info(udphy->dev, "mode 0x%02x is not support\n", mode);
+		return 0;
+	}
+
+	if (udphy->status == UDPHY_MODE_NONE) {
+		udphy->mode_change = false;
+		ret = udphy_setup(udphy);
+		if (ret)
+			return ret;
+
+		if (udphy->mode & UDPHY_MODE_USB)
+			udphy_u3_port_disable(udphy, false);
+	} else if (udphy->mode_change) {
+		udphy->mode_change = false;
+		udphy->status = UDPHY_MODE_NONE;
+		if (udphy->mode == UDPHY_MODE_DP)
+			udphy_u3_port_disable(udphy, true);
+
+		ret = udphy_disable(udphy);
+		if (ret)
+			return ret;
+		ret = udphy_setup(udphy);
+		if (ret)
+			return ret;
+	}
+
+	udphy->status |= mode;
+
+	return 0;
+}
+
+static int udphy_power_off(struct rockchip_udphy *udphy, u8 mode)
+{
+	int ret;
+
+	if (!(udphy->mode & mode)) {
+		dev_info(udphy->dev, "mode 0x%02x is not support\n", mode);
+		return 0;
+	}
+
+	if (!udphy->status)
+		return 0;
+
+	udphy->status &= ~mode;
+
+	if (udphy->status == UDPHY_MODE_NONE) {
+		ret = udphy_disable(udphy);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+static int rockchip_u3phy_init(struct phy *phy)
+{
+	struct udevice *parent = phy->dev->parent;
+	struct rockchip_udphy *udphy = dev_get_priv(parent);
+
+	/* DP only or high-speed, disable U3 port */
+	if (!(udphy->mode & UDPHY_MODE_USB) || udphy->hs) {
+		udphy_u3_port_disable(udphy, true);
+		return 0;
+	}
+
+	return udphy_power_on(udphy, UDPHY_MODE_USB);
+}
+
+static int rockchip_u3phy_exit(struct phy *phy)
+{
+	struct udevice *parent = phy->dev->parent;
+	struct rockchip_udphy *udphy = dev_get_priv(parent);
+
+	/* DP only or high-speed */
+	if (!(udphy->mode & UDPHY_MODE_USB) || udphy->hs)
+		return 0;
+
+	return udphy_power_off(udphy, UDPHY_MODE_USB);
+}
+
+static const struct phy_ops rockchip_u3phy_ops = {
+	.init		= rockchip_u3phy_init,
+	.exit		= rockchip_u3phy_exit,
+};
+
+int rockchip_u3phy_uboot_init(void)
+{
+	struct udevice *udev;
+	struct rockchip_udphy *udphy;
+	int ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_PHY,
+					  DM_GET_DRIVER(rockchip_udphy_u3_port),
+					  &udev);
+	if (ret) {
+		pr_err("%s: get u3-port failed: %d\n", __func__, ret);
+		return ret;
+	}
+
+	/* DP only or high-speed, disable U3 port */
+	udphy = dev_get_priv(udev->parent);
+	if (!(udphy->mode & UDPHY_MODE_USB) || udphy->hs) {
+		udphy_u3_port_disable(udphy, true);
+		return 0;
+	}
+
+	return udphy_power_on(udphy, UDPHY_MODE_USB);
+}
+
+static int rockchip_udphy_probe(struct udevice *dev)
+{
+	const struct device_node *np = ofnode_to_np(dev->node);
+	struct rockchip_udphy *udphy = dev_get_priv(dev);
+	const struct rockchip_udphy_cfg *phy_cfgs;
+	int id, ret;
+
+	udphy->dev = dev;
+
+	id = of_alias_get_id(np, "usbdp");
+	if (id < 0)
+		id = 0;
+	udphy->id = id;
+
+	phy_cfgs = (const struct rockchip_udphy_cfg *) dev_get_driver_data(dev);
+	if (!phy_cfgs) {
+		dev_err(dev, "unable to get phy_cfgs\n");
+		return -EINVAL;
+	}
+	udphy->cfgs = phy_cfgs;
+
+	ret = regmap_init_mem(dev, &udphy->pma_regmap);
+	if (ret)
+		return ret;
+	udphy->pma_regmap->base += UDPHY_PMA;
+
+	ret = udphy_parse_dt(udphy, dev);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
+static int rockchip_udphy_bind(struct udevice *parent)
+{
+	struct udevice *child;
+	ofnode subnode;
+	const char *node_name;
+	int ret;
+
+	dev_for_each_subnode(subnode, parent) {
+		if (!ofnode_valid(subnode)) {
+			printf("%s: no subnode for %s", __func__, parent->name);
+			return -ENXIO;
+		}
+
+		node_name = ofnode_get_name(subnode);
+		debug("%s: subnode %s\n", __func__, node_name);
+
+		if (!strcasecmp(node_name, "u3-port")) {
+			ret = device_bind_driver_to_node(parent,
+							 "rockchip_udphy_u3_port",
+							 node_name, subnode, &child);
+			if (ret) {
+				printf("%s: '%s' cannot bind its driver\n",
+				       __func__, node_name);
+				return ret;
+			}
+		}
+	}
+
+	return 0;
+}
+
+static int rk3588_udphy_refclk_set(struct rockchip_udphy *udphy)
+{
+	int ret;
+
+	/* configure phy reference clock */
+	ret = __regmap_multi_reg_write(udphy->pma_regmap, rk3588_udphy_24m_refclk_cfg,
+				       ARRAY_SIZE(rk3588_udphy_24m_refclk_cfg));
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
+static int rk3588_udphy_status_check(struct rockchip_udphy *udphy)
+{
+	unsigned int val;
+	int ret;
+
+	/* LCPLL check */
+	if (udphy->mode & UDPHY_MODE_USB) {
+		ret = regmap_read_poll_timeout(udphy->pma_regmap, CMN_ANA_LCPLL_DONE_OFFSET,
+					       val, (val & CMN_ANA_LCPLL_AFC_DONE) &&
+					       (val & CMN_ANA_LCPLL_LOCK_DONE), 200, 100);
+		if (ret) {
+			dev_err(udphy->dev, "cmn ana lcpll lock timeout\n");
+			return ret;
+		}
+	}
+
+	if (udphy->mode & UDPHY_MODE_USB) {
+		if (!udphy->flip) {
+			ret = regmap_read_poll_timeout(udphy->pma_regmap,
+						       TRSV_LN0_MON_RX_CDR_DONE_OFFSET, val,
+						       val & TRSV_LN0_MON_RX_CDR_LOCK_DONE,
+						       200, 100);
+			if (ret)
+				dev_err(udphy->dev, "trsv ln0 mon rx cdr lock timeout\n");
+		} else {
+			ret = regmap_read_poll_timeout(udphy->pma_regmap,
+						       TRSV_LN2_MON_RX_CDR_DONE_OFFSET, val,
+						       val & TRSV_LN2_MON_RX_CDR_LOCK_DONE,
+						       200, 100);
+			if (ret)
+				dev_err(udphy->dev, "trsv ln2 mon rx cdr lock timeout\n");
+		}
+	}
+
+	return 0;
+}
+
+static int rk3588_udphy_init(struct rockchip_udphy *udphy)
+{
+	const struct rockchip_udphy_cfg *cfg = udphy->cfgs;
+	int ret;
+
+	/* enable rx lfps for usb */
+	if (udphy->mode & UDPHY_MODE_USB)
+		grfreg_write(udphy->udphygrf, &cfg->grfcfg.rx_lfps, true);
+
+	/* Step 1: power on pma and deassert apb rstn */
+	grfreg_write(udphy->udphygrf, &cfg->grfcfg.low_pwrn, true);
+
+	udphy_reset_deassert(udphy, "pma_apb");
+	udphy_reset_deassert(udphy, "pcs_apb");
+
+	/* Step 2: set init sequence and phy refclk */
+	ret = __regmap_multi_reg_write(udphy->pma_regmap, rk3588_udphy_init_sequence,
+				       ARRAY_SIZE(rk3588_udphy_init_sequence));
+	if (ret) {
+		dev_err(udphy->dev, "init sequence set error %d\n", ret);
+		goto assert_apb;
+	}
+
+	ret = rk3588_udphy_refclk_set(udphy);
+	if (ret) {
+		dev_err(udphy->dev, "refclk set error %d\n", ret);
+		goto assert_apb;
+	}
+
+	/* Step 3: configure lane mux */
+	regmap_update_bits(udphy->pma_regmap, CMN_LANE_MUX_AND_EN_OFFSET,
+			   CMN_DP_LANE_MUX_ALL | CMN_DP_LANE_EN_ALL,
+			   FIELD_PREP(CMN_DP_LANE_MUX_N(3), udphy->lane_mux_sel[3]) |
+			   FIELD_PREP(CMN_DP_LANE_MUX_N(2), udphy->lane_mux_sel[2]) |
+			   FIELD_PREP(CMN_DP_LANE_MUX_N(1), udphy->lane_mux_sel[1]) |
+			   FIELD_PREP(CMN_DP_LANE_MUX_N(0), udphy->lane_mux_sel[0]) |
+			   FIELD_PREP(CMN_DP_LANE_EN_ALL, 0));
+
+	/* Step 4: deassert init rstn and wait for 200ns from datasheet */
+	if (udphy->mode & UDPHY_MODE_USB)
+		udphy_reset_deassert(udphy, "init");
+
+	if (udphy->mode & UDPHY_MODE_DP) {
+		regmap_update_bits(udphy->pma_regmap, CMN_DP_RSTN_OFFSET,
+				   CMN_DP_INIT_RSTN,
+				   FIELD_PREP(CMN_DP_INIT_RSTN, 0x1));
+	}
+
+	udelay(1);
+
+	/*  Step 5: deassert cmn/lane rstn */
+	if (udphy->mode & UDPHY_MODE_USB) {
+		udphy_reset_deassert(udphy, "cmn");
+		udphy_reset_deassert(udphy, "lane");
+	}
+
+	/*  Step 6: wait for lock done of pll */
+	ret = rk3588_udphy_status_check(udphy);
+	if (ret)
+		goto assert_phy;
+
+	return 0;
+
+assert_phy:
+	udphy_reset_assert(udphy, "init");
+	udphy_reset_assert(udphy, "cmn");
+	udphy_reset_assert(udphy, "lane");
+
+assert_apb:
+	udphy_reset_assert(udphy, "pma_apb");
+	udphy_reset_assert(udphy, "pcs_apb");
+	return ret;
+}
+
+static const char * const rk3588_udphy_rst_l[] = {
+	"init", "cmn", "lane", "pcs_apb", "pma_apb"
+};
+
+static const struct rockchip_udphy_cfg rk3588_udphy_cfgs = {
+	.num_rsts = ARRAY_SIZE(rk3588_udphy_rst_l),
+	.rst_list = rk3588_udphy_rst_l,
+	.grfcfg	= {
+		/* u2phy-grf */
+		.bvalid_phy_con		= { 0x0008, 1, 0, 0x2, 0x3 },
+		.bvalid_grf_con		= { 0x0010, 3, 2, 0x2, 0x3 },
+
+		/* usb-grf */
+		.usb3otg0_cfg		= { 0x001c, 15, 0, 0x1100, 0x0188 },
+		.usb3otg1_cfg		= { 0x0034, 15, 0, 0x1100, 0x0188 },
+
+		/* usbdpphy-grf */
+		.low_pwrn		= { 0x0004, 13, 13, 0, 1 },
+		.rx_lfps		= { 0x0004, 14, 14, 0, 1 },
+	},
+	.combophy_init = rk3588_udphy_init,
+};
+
+static const struct udevice_id rockchip_udphy_dt_match[] = {
+	{
+		.compatible = "rockchip,rk3588-usbdp-phy",
+		.data = (ulong)&rk3588_udphy_cfgs
+	},
+	{ /* sentinel */ }
+};
+
+U_BOOT_DRIVER(rockchip_udphy_u3_port) = {
+	.name		= "rockchip_udphy_u3_port",
+	.id		= UCLASS_PHY,
+	.ops		= &rockchip_u3phy_ops,
+};
+
+U_BOOT_DRIVER(rockchip_udphy) = {
+	.name		= "rockchip_udphy",
+	.id		= UCLASS_PHY,
+	.of_match	= rockchip_udphy_dt_match,
+	.probe		= rockchip_udphy_probe,
+	.bind		= rockchip_udphy_bind,
+	.priv_auto_alloc_size = sizeof(struct rockchip_udphy),
+};
diff --git a/include/linux/usb/phy-rockchip-usbdp.h b/include/linux/usb/phy-rockchip-usbdp.h
new file mode 100644
index 0000000000..8acfa6ddf5
--- /dev/null
+++ b/include/linux/usb/phy-rockchip-usbdp.h
@@ -0,0 +1,70 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Rockchip USBDP Combo PHY with Samsung IP block driver
+ *
+ * Copyright (C) 2021 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef __PHY_ROCKCHIP_USBDP_H_
+#define __PHY_ROCKCHIP_USBDP_H_
+
+#include <linux/bitops.h>
+
+/* RK3588 USBDP PHY Register Definitions */
+
+#define UDPHY_PCS				0x4000
+#define UDPHY_PMA				0x8000
+
+/* VO0 GRF Registers */
+#define RK3588_GRF_VO0_CON0			0x0000
+#define RK3588_GRF_VO0_CON2			0x0008
+#define DP_SINK_HPD_CFG				BIT(11)
+#define DP_SINK_HPD_SEL				BIT(10)
+#define DP_AUX_DIN_SEL				BIT(9)
+#define DP_AUX_DOUT_SEL				BIT(8)
+#define DP_LANE_SEL_N(n)			GENMASK(2 * (n) + 1, 2 * (n))
+#define DP_LANE_SEL_ALL				GENMASK(7, 0)
+#define PHY_AUX_DP_DATA_POL_NORMAL		0
+#define PHY_AUX_DP_DATA_POL_INVERT		1
+
+/* PMA CMN Registers */
+#define CMN_LANE_MUX_AND_EN_OFFSET		0x0288	/* cmn_reg00A2 */
+#define CMN_DP_LANE_MUX_N(n)			BIT((n) + 4)
+#define CMN_DP_LANE_EN_N(n)			BIT(n)
+#define CMN_DP_LANE_MUX_ALL			GENMASK(7, 4)
+#define CMN_DP_LANE_EN_ALL			GENMASK(3, 0)
+#define PHY_LANE_MUX_USB			0
+#define PHY_LANE_MUX_DP				1
+
+#define CMN_DP_LINK_OFFSET			0x28c	/*cmn_reg00A3 */
+#define CMN_DP_TX_LINK_BW			GENMASK(6, 5)
+#define CMN_DP_TX_LANE_SWAP_EN			BIT(2)
+
+#define CMN_SSC_EN_OFFSET			0x2d0	/* cmn_reg00B4 */
+#define CMN_ROPLL_SSC_EN			BIT(1)
+#define CMN_LCPLL_SSC_EN			BIT(0)
+
+#define CMN_ANA_LCPLL_DONE_OFFSET		0x0350	/* cmn_reg00D4 */
+#define CMN_ANA_LCPLL_LOCK_DONE			BIT(7)
+#define CMN_ANA_LCPLL_AFC_DONE			BIT(6)
+
+#define CMN_ANA_ROPLL_DONE_OFFSET		0x0354	/* cmn_reg00D5 */
+#define CMN_ANA_ROPLL_LOCK_DONE			BIT(1)
+#define CMN_ANA_ROPLL_AFC_DONE			BIT(0)
+
+#define CMN_DP_RSTN_OFFSET			0x038c	/* cmn_reg00E3 */
+#define CMN_DP_INIT_RSTN			BIT(3)
+#define CMN_DP_CMN_RSTN				BIT(2)
+#define CMN_CDR_WTCHDG_EN			BIT(1)
+#define CMN_CDR_WTCHDG_MSK_CDR_EN		BIT(0)
+
+#define TRSV_ANA_TX_CLK_OFFSET_N(n)		(0x854 + (n) * 0x800)	/* trsv_reg0215 */
+#define LN_ANA_TX_SER_TXCLK_INV			BIT(1)
+
+#define TRSV_LN0_MON_RX_CDR_DONE_OFFSET		0x0b84	/* trsv_reg02E1 */
+#define TRSV_LN0_MON_RX_CDR_LOCK_DONE		BIT(0)
+
+#define TRSV_LN2_MON_RX_CDR_DONE_OFFSET		0x1b84	/* trsv_reg06E1 */
+#define TRSV_LN2_MON_RX_CDR_LOCK_DONE		BIT(0)
+
+#endif

commit 330bb42b0d83484ea3bd31831e31b8d327ad4bbf
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Sat Jan 22 16:38:22 2022 +0800

    configs: rk3588: Enable dw-hdmi-qp and hdptx-phy-hdmi
    
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
    Change-Id: Ie9f9ecb1497ac96bca26ff6b3eda77cebcccf649

diff --git a/configs/rk3588_defconfig b/configs/rk3588_defconfig
index 11817c18cd..20783d2193 100644
--- a/configs/rk3588_defconfig
+++ b/configs/rk3588_defconfig
@@ -140,6 +140,7 @@ CONFIG_DWC_ETH_QOS=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX=y
+CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX_HDMI=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_DM_PMIC=y
@@ -195,6 +196,7 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_DW_HDMI_QP=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI2=y
 CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
 CONFIG_DRM_ROCKCHIP_SAMSUNG_MIPI_DCPHY=y

commit b890760e6441257fceb3ded503ff27af92a8549e
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Sat Jan 22 16:36:34 2022 +0800

    drm/rockchip: vop2: Support RK3588 hdmi logo
    
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
    Change-Id: I7e6373435bb3f19a61cd23c39ccca75430faa53e

diff --git a/drivers/video/drm/rockchip_vop2.c b/drivers/video/drm/rockchip_vop2.c
index aecb2c6694..f7781826d8 100644
--- a/drivers/video/drm/rockchip_vop2.c
+++ b/drivers/video/drm/rockchip_vop2.c
@@ -10,6 +10,7 @@
 #include <malloc.h>
 #include <fdtdec.h>
 #include <fdt_support.h>
+#include <regmap.h>
 #include <asm/arch/cpu.h>
 #include <asm/unaligned.h>
 #include <asm/io.h>
@@ -609,6 +610,11 @@
 #define RK3588_GRF_EDP1_ENABLE_SHIFT		3
 #define RK3588_GRF_HDMITX1_ENABLE_SHIFT		4
 
+#define RK3588_GRF_VO1_CON0			0x0000
+#define HDMI_SYNC_POL_MASK			0x3
+#define HDMI0_SYNC_POL_SHIFT			5
+#define HDMI1_SYNC_POL_SHIFT			7
+
 #define RK3588_PMU_BISR_CON3			0x20C
 #define RK3588_PD_CLUSTER0_REPAIR_EN_SHIFT	9
 #define RK3588_PD_CLUSTER1_REPAIR_EN_SHIFT	10
@@ -1659,14 +1665,17 @@ static int rockchip_vop2_preinit(struct display_state *state)
 		rockchip_vop2->version = vop2_data->version;
 		rockchip_vop2->data = vop2_data;
 		if (rockchip_vop2->version == VOP_VERSION_RK3588) {
+			struct regmap *map;
+
 			rockchip_vop2->vop_grf = syscon_get_first_range(ROCKCHIP_SYSCON_VOP_GRF);
 			if (rockchip_vop2->vop_grf <= 0)
 				printf("%s: Get syscon vop_grf failed (ret=%p)\n", __func__, rockchip_vop2->vop_grf);
-			rockchip_vop2->vo1_grf = syscon_get_first_range(ROCKCHIP_SYSCON_VO_GRF);
+			map = syscon_regmap_lookup_by_phandle(cstate->dev, "rockchip,vo1-grf");
+			rockchip_vop2->vo1_grf = regmap_get_range(map, 0);
 			if (rockchip_vop2->vo1_grf <= 0)
 				printf("%s: Get syscon vo1_grf failed (ret=%p)\n", __func__, rockchip_vop2->vo1_grf);
 			rockchip_vop2->sys_pmu = syscon_get_first_range(ROCKCHIP_SYSCON_PMU);
-			if (rockchip_vop2->vo1_grf <= 0)
+			if (rockchip_vop2->sys_pmu <= 0)
 				printf("%s: Get syscon sys_pmu failed (ret=%p)\n", __func__, rockchip_vop2->sys_pmu);
 		}
 	}
@@ -1726,8 +1735,10 @@ static unsigned long vop2_calc_cru_cfg(struct display_state *state,
 		 * K = 2: dclk_core = if_pixclk_rate > if_dclk_rate
 		 * K = 1: dclk_core = hdmie_edp_dclk > if_pixclk_rate
 		 */
-		if (output_mode == ROCKCHIP_OUT_MODE_YUV420)
+		if (output_mode == ROCKCHIP_OUT_MODE_YUV420) {
+			dclk_rate = dclk_rate >> 1;
 			K = 2;
+		}
 		if (conn_state->dsc_enable) {
 			if_pixclk_rate = conn_state->dsc_cds_clk << 1;
 			if_dclk_rate = conn_state->dsc_cds_clk;
@@ -1736,7 +1747,6 @@ static unsigned long vop2_calc_cru_cfg(struct display_state *state,
 			if_dclk_rate = dclk_core_rate / K;
 		}
 
-		dclk_rate = vop2_calc_dclk(if_pixclk_rate, vop2->data->vp_data->max_dclk);
 		if (!dclk_rate) {
 			printf("DP if_pixclk_rate out of range(max_dclk: %d KHZ, dclk_core: %lld KHZ)\n",
 			       vop2->data->vp_data->max_dclk, if_pixclk_rate);
@@ -1744,7 +1754,9 @@ static unsigned long vop2_calc_cru_cfg(struct display_state *state,
 		}
 		*if_pixclk_div = dclk_rate / if_pixclk_rate;
 		*if_dclk_div = dclk_rate / if_dclk_rate;
-
+		*dclk_core_div = dclk_rate / dclk_core_rate;
+		printf("dclk:%lu,if_pixclk_div;%d,if_dclk_div:%d\n",
+		       dclk_rate, *if_pixclk_div, *if_dclk_div);
 	} else if (output_type == DRM_MODE_CONNECTOR_eDP) {
 		/* edp_pixclk = edp_dclk > dclk_core */
 		if_pixclk_rate = v_pixclk / K;
@@ -1838,8 +1850,13 @@ static unsigned long rk3588_vop2_if_cfg(struct display_state *state)
 	unsigned long dclk_rate;
 	u32 val;
 
-	val = (mode->flags & DRM_MODE_FLAG_NHSYNC) ? 0 : BIT(HSYNC_POSITIVE);
-	val |= (mode->flags & DRM_MODE_FLAG_NVSYNC) ? 0 : BIT(VSYNC_POSITIVE);
+	if (output_if & (VOP_OUTPUT_IF_HDMI0 | VOP_OUTPUT_IF_HDMI1)) {
+		val = (mode->flags & DRM_MODE_FLAG_NHSYNC) ? BIT(HSYNC_POSITIVE) : 0;
+		val |= (mode->flags & DRM_MODE_FLAG_NVSYNC) ? BIT(VSYNC_POSITIVE) : 0;
+	} else {
+		val = (mode->flags & DRM_MODE_FLAG_NHSYNC) ? 0 : BIT(HSYNC_POSITIVE);
+		val |= (mode->flags & DRM_MODE_FLAG_NVSYNC) ? 0 : BIT(VSYNC_POSITIVE);
+	}
 
 	if (conn_state->dsc_enable) {
 		if (!vop2->data->nr_dscs) {
@@ -1975,6 +1992,12 @@ static unsigned long rk3588_vop2_if_cfg(struct display_state *state)
 
 		vop2_mask_write(vop2, RK3568_DSP_IF_CTRL, 3, HDMI_EDP0_PIXCLK_DIV_SHIFT,
 				if_pixclk_div, false);
+
+		vop2_grf_writel(vop2, vop2->vop_grf, RK3588_GRF_VOP_CON2, EN_MASK,
+				RK3588_GRF_HDMITX0_ENABLE_SHIFT, 1);
+		vop2_grf_writel(vop2, vop2->vo1_grf, RK3588_GRF_VO1_CON0,
+				HDMI_SYNC_POL_MASK,
+				HDMI0_SYNC_POL_SHIFT, val);
 	}
 
 	if (output_if & VOP_OUTPUT_IF_HDMI1) {
@@ -1987,6 +2010,12 @@ static unsigned long rk3588_vop2_if_cfg(struct display_state *state)
 
 		vop2_mask_write(vop2, RK3568_DSP_IF_CTRL, 3, HDMI_EDP1_PIXCLK_DIV_SHIFT,
 				if_pixclk_div, false);
+
+		vop2_grf_writel(vop2, vop2->vop_grf, RK3588_GRF_VOP_CON2, EN_MASK,
+				RK3588_GRF_HDMITX1_ENABLE_SHIFT, 1);
+		vop2_grf_writel(vop2, vop2->vo1_grf, RK3588_GRF_VO1_CON0,
+				HDMI_SYNC_POL_MASK,
+				HDMI1_SYNC_POL_SHIFT, val);
 	}
 
 	if (output_if & VOP_OUTPUT_IF_DP0) {
@@ -2166,6 +2195,29 @@ static void vop2_post_color_swap(struct display_state *state)
 			DATA_SWAP_MASK, DATA_SWAP_SHIFT, data_swap, false);
 }
 
+static void vop2_clk_set_parent(struct clk *clk, struct clk *parent)
+{
+	int ret = 0;
+
+	if (parent->dev)
+		ret = clk_set_parent(clk, parent);
+	if (ret < 0)
+		debug("failed to set %s as parent for %s\n",
+		      parent->dev->name, clk->dev->name);
+}
+
+static ulong vop2_clk_set_rate(struct clk *clk, ulong rate)
+{
+	int ret = 0;
+
+	if (clk->dev)
+		ret = clk_set_rate(clk, rate);
+	if (ret < 0)
+		debug("failed to set %s rate %lu \n", clk->dev->name, rate);
+
+	return ret;
+}
+
 static int rockchip_vop2_init(struct display_state *state)
 {
 	struct crtc_state *cstate = &state->crtc_state;
@@ -2191,6 +2243,8 @@ static int rockchip_vop2_init(struct display_state *state)
 	char output_type_name[30] = {0};
 	char dclk_name[9];
 	struct clk dclk;
+	struct clk hdmi0_phy_pll;
+	struct clk hdmi1_phy_pll;
 	unsigned long dclk_rate;
 	int ret;
 
@@ -2324,8 +2378,43 @@ static int rockchip_vop2_init(struct display_state *state)
 
 	snprintf(dclk_name, sizeof(dclk_name), "dclk_vp%d", cstate->crtc_id);
 	ret = clk_get_by_name(cstate->dev, dclk_name, &dclk);
-	if (!ret)
-		ret = clk_set_rate(&dclk, dclk_rate * 1000);
+	if (ret) {
+		printf("%s: Failed to get dclk ret=%d\n", __func__, ret);
+		return ret;
+	}
+
+	ret = clk_get_by_name(cstate->dev, "hdmi0_phy_pll_uboot", &hdmi0_phy_pll);
+	if (ret) {
+		hdmi0_phy_pll.dev = NULL;
+		printf("%s:No hdmi0_phy_pll_uboot clk found, use system clk\n",
+		       __func__);
+	}
+
+	ret = clk_get_by_name(cstate->dev, "hdmi1_phy_pll_uboot", &hdmi1_phy_pll);
+	if (ret) {
+		hdmi0_phy_pll.dev = NULL;
+		printf("%s:No hdmi1_phy_pll_uboot clk found, use system clk\n",
+		       __func__);
+	}
+
+	if (conn_state->output_if & VOP_OUTPUT_IF_HDMI0)
+		vop2_clk_set_parent(&dclk, &hdmi0_phy_pll);
+	else if (conn_state->output_if & VOP_OUTPUT_IF_HDMI1)
+		vop2_clk_set_parent(&dclk, &hdmi1_phy_pll);
+
+	/*
+	 * uboot clk driver won't set dclk parent's rate when use
+	 * hdmi phypll as dclk source.
+	 * So set dclk rate is meaningless. Set hdmi phypll rate
+	 * directly.
+	 */
+	if ((conn_state->output_if & VOP_OUTPUT_IF_HDMI0) && hdmi0_phy_pll.dev)
+		ret = vop2_clk_set_rate(&hdmi0_phy_pll, dclk_rate * 1000);
+	else if ((conn_state->output_if & VOP_OUTPUT_IF_HDMI1) && hdmi1_phy_pll.dev)
+		ret = vop2_clk_set_rate(&hdmi1_phy_pll, dclk_rate * 1000);
+	else
+		ret = vop2_clk_set_rate(&dclk, dclk_rate * 1000);
+
 	if (IS_ERR_VALUE(ret)) {
 		printf("%s: Failed to set vp%d dclk[%ld KHZ] ret=%d\n",
 		       __func__, cstate->crtc_id, dclk_rate, ret);
@@ -3105,7 +3194,7 @@ static struct vop2_win_data rk3588_win_data[8] = {
 static struct vop2_vp_data rk3588_vp_data[4] = {
 	{
 		.feature = VOP_FEATURE_OUTPUT_10BIT,
-		.pre_scan_max_dly = 42,
+		.pre_scan_max_dly = 54,
 		.max_dclk = 600000,
 		.max_output = {7680, 4320},
 	},

commit 28671edac2b0ba95184189128e8e8a20a17bd2b0
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Sat Jan 22 16:29:04 2022 +0800

    video/drm: dw-hdmi-qp: Support dw-hdmi-qp
    
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
    Change-Id: I63477c492a3f570f06c958f2aec3bd5c7cbdca25

diff --git a/drivers/video/drm/Kconfig b/drivers/video/drm/Kconfig
index 150e1b77c3..a313353823 100644
--- a/drivers/video/drm/Kconfig
+++ b/drivers/video/drm/Kconfig
@@ -33,6 +33,14 @@ config DRM_ROCKCHIP_DW_HDMI
 	 for the Synopsys DesignWare HDMI driver. If you want to
 	 enable HDMI on, you should selet this option.
 
+config DRM_ROCKCHIP_DW_HDMI_QP
+	bool "Rockchip specific extensions for Synopsys DW HDMI QP"
+	depends on DRM_ROCKCHIP
+	help
+	 This selects support for Rockchip SoC specific extensions
+	 for the Synopsys DesignWare HDMI QP driver. If you want to
+	 enable HDMI on, you should select this option.
+
 config DRM_ROCKCHIP_INNO_HDMI
 	bool "Rockchip specific extensions for INNO HDMI"
 	depends on DRM_ROCKCHIP
diff --git a/drivers/video/drm/Makefile b/drivers/video/drm/Makefile
index db5a3b7f9e..b647b12b1c 100644
--- a/drivers/video/drm/Makefile
+++ b/drivers/video/drm/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_DRM_DP_HELPER) += drm_dp_helper.o
 obj-$(CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI) += dw_mipi_dsi.o
 obj-$(CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI2) += dw_mipi_dsi2.o
 obj-$(CONFIG_DRM_ROCKCHIP_DW_HDMI) += rockchip_dw_hdmi.o dw_hdmi.o
+obj-$(CONFIG_DRM_ROCKCHIP_DW_HDMI_QP) += rockchip_dw_hdmi_qp.o dw_hdmi_qp.o
 obj-$(CONFIG_ROCKCHIP_INNO_HDMI_PHY) += rockchip-inno-hdmi-phy.o
 obj-$(CONFIG_DRM_ROCKCHIP_INNO_HDMI) += inno_hdmi.o
 obj-$(CONFIG_DRM_ROCKCHIP_INNO_MIPI_PHY) += inno_mipi_phy.o
diff --git a/drivers/video/drm/dw_hdmi_qp.c b/drivers/video/drm/dw_hdmi_qp.c
new file mode 100644
index 0000000000..089f70a267
--- /dev/null
+++ b/drivers/video/drm/dw_hdmi_qp.c
@@ -0,0 +1,1190 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2021 Fuzhou Rockchip Electronics Co., Ltd
+ * Author: Algea Cao <algea.cao@rock-chips.com>
+ */
+
+#include <common.h>
+#include <malloc.h>
+#include <syscon.h>
+#include <asm/arch-rockchip/clock.h>
+#include <asm/arch/vendor.h>
+#include <edid.h>
+#include <dm/device.h>
+#include <dm/of_access.h>
+#include <dm/ofnode.h>
+#include <dm/read.h>
+#include <linux/hdmi.h>
+#include <linux/media-bus-format.h>
+#include <linux/dw_hdmi.h>
+#include <asm/io.h>
+#include "rockchip_display.h"
+#include "rockchip_crtc.h"
+#include "rockchip_connector.h"
+#include "dw_hdmi_qp.h"
+#include "rockchip_phy.h"
+
+enum frl_mask {
+	FRL_3GBPS_3LANE = 1,
+	FRL_6GBPS_3LANE,
+	FRL_6GBPS_4LANE,
+	FRL_8GBPS_4LANE,
+	FRL_10GBPS_4LANE,
+	FRL_12GBPS_4LANE,
+};
+
+#define DDC_CI_ADDR		0x37
+#define DDC_SEGMENT_ADDR	0x30
+
+#define HDMI_EDID_LEN		512
+
+/* DW-HDMI Controller >= 0x200a are at least compliant with SCDC version 1 */
+#define SCDC_MIN_SOURCE_VERSION	0x1
+
+#define HDMI14_MAX_TMDSCLK	340000000
+
+struct hdmi_vmode {
+	bool mdataenablepolarity;
+
+	unsigned int mpixelclock;
+	unsigned int mpixelrepetitioninput;
+	unsigned int mpixelrepetitionoutput;
+	unsigned int mtmdsclock;
+};
+
+struct hdmi_data_info {
+	unsigned int enc_in_bus_format;
+	unsigned int enc_out_bus_format;
+	unsigned int enc_in_encoding;
+	unsigned int enc_out_encoding;
+	unsigned int quant_range;
+	unsigned int pix_repet_factor;
+	struct hdmi_vmode video_mode;
+};
+
+struct dw_hdmi_phy_data {
+	enum dw_hdmi_phy_type type;
+	const char *name;
+	unsigned int gen;
+	bool has_svsret;
+	int (*configure)(struct dw_hdmi *hdmi,
+			 const struct dw_hdmi_plat_data *pdata,
+			 unsigned long mpixelclock);
+};
+
+struct dw_hdmi_i2c {
+	u8			slave_reg;
+	bool			is_regaddr;
+	bool			is_segment;
+
+	unsigned int		scl_high_ns;
+	unsigned int		scl_low_ns;
+};
+
+struct dw_hdmi_qp {
+	enum dw_hdmi_devtype dev_type;
+	unsigned int version;
+	struct hdmi_data_info hdmi_data;
+	struct hdmi_edid_data edid_data;
+	const struct dw_hdmi_plat_data *plat_data;
+	struct ddc_adapter adap;
+
+	int vic;
+	int id;
+
+	unsigned long bus_format;
+	bool cable_plugin;
+	bool sink_is_hdmi;
+	bool sink_has_audio;
+	void *regs;
+	void *rk_hdmi;
+	struct dw_hdmi_i2c *i2c;
+
+	struct {
+		const struct dw_hdmi_qp_phy_ops *ops;
+		const char *name;
+		void *data;
+		bool enabled;
+	} phy;
+
+	struct drm_display_mode previous_mode;
+
+	unsigned int sample_rate;
+	unsigned int audio_cts;
+	unsigned int audio_n;
+	bool audio_enable;
+	bool scramble_low_rates;
+
+	void (*write)(struct dw_hdmi_qp *hdmi, u32 val, int offset);
+	u8 (*read)(struct dw_hdmi_qp *hdmi, int offset);
+
+	bool hdcp1x_enable;
+	bool output_bus_format_rgb;
+};
+
+static inline void hdmi_writel(struct dw_hdmi_qp *hdmi, u32 val, int offset)
+{
+	writel(val, hdmi->regs + offset);
+}
+
+static inline u32 hdmi_readl(struct dw_hdmi_qp *hdmi, int offset)
+{
+	return readl(hdmi->regs + offset);
+}
+
+static void
+hdmi_modb(struct dw_hdmi_qp *hdmi, u32 data, u32 mask, unsigned int reg)
+{
+	u32 val = hdmi_readl(hdmi, reg) & ~mask;
+
+	val |= data & mask;
+	hdmi_writel(hdmi, val, reg);
+}
+
+static bool hdmi_bus_fmt_is_rgb(unsigned int bus_format)
+{
+	switch (bus_format) {
+	case MEDIA_BUS_FMT_RGB888_1X24:
+	case MEDIA_BUS_FMT_RGB101010_1X30:
+	case MEDIA_BUS_FMT_RGB121212_1X36:
+	case MEDIA_BUS_FMT_RGB161616_1X48:
+		return true;
+
+	default:
+		return false;
+	}
+}
+
+static bool hdmi_bus_fmt_is_yuv444(unsigned int bus_format)
+{
+	switch (bus_format) {
+	case MEDIA_BUS_FMT_YUV8_1X24:
+	case MEDIA_BUS_FMT_YUV10_1X30:
+	case MEDIA_BUS_FMT_YUV12_1X36:
+	case MEDIA_BUS_FMT_YUV16_1X48:
+		return true;
+
+	default:
+		return false;
+	}
+}
+
+static bool hdmi_bus_fmt_is_yuv422(unsigned int bus_format)
+{
+	switch (bus_format) {
+	case MEDIA_BUS_FMT_UYVY8_1X16:
+	case MEDIA_BUS_FMT_UYVY10_1X20:
+	case MEDIA_BUS_FMT_UYVY12_1X24:
+		return true;
+
+	default:
+		return false;
+	}
+}
+
+static bool hdmi_bus_fmt_is_yuv420(unsigned int bus_format)
+{
+	switch (bus_format) {
+	case MEDIA_BUS_FMT_UYYVYY8_0_5X24:
+	case MEDIA_BUS_FMT_UYYVYY10_0_5X30:
+	case MEDIA_BUS_FMT_UYYVYY12_0_5X36:
+	case MEDIA_BUS_FMT_UYYVYY16_0_5X48:
+		return true;
+
+	default:
+		return false;
+	}
+}
+
+static int hdmi_bus_fmt_color_depth(unsigned int bus_format)
+{
+	switch (bus_format) {
+	case MEDIA_BUS_FMT_RGB888_1X24:
+	case MEDIA_BUS_FMT_YUV8_1X24:
+	case MEDIA_BUS_FMT_UYVY8_1X16:
+	case MEDIA_BUS_FMT_UYYVYY8_0_5X24:
+		return 8;
+
+	case MEDIA_BUS_FMT_RGB101010_1X30:
+	case MEDIA_BUS_FMT_YUV10_1X30:
+	case MEDIA_BUS_FMT_UYVY10_1X20:
+	case MEDIA_BUS_FMT_UYYVYY10_0_5X30:
+		return 10;
+
+	case MEDIA_BUS_FMT_RGB121212_1X36:
+	case MEDIA_BUS_FMT_YUV12_1X36:
+	case MEDIA_BUS_FMT_UYVY12_1X24:
+	case MEDIA_BUS_FMT_UYYVYY12_0_5X36:
+		return 12;
+
+	case MEDIA_BUS_FMT_RGB161616_1X48:
+	case MEDIA_BUS_FMT_YUV16_1X48:
+	case MEDIA_BUS_FMT_UYYVYY16_0_5X48:
+		return 16;
+
+	default:
+		return 0;
+	}
+}
+
+static bool drm_scdc_set_scrambling(struct ddc_adapter *adapter, bool enable)
+{
+	u8 config;
+	int ret;
+
+	ret = drm_scdc_readb(adapter, SCDC_TMDS_CONFIG, &config);
+	if (ret < 0) {
+		debug("Failed to read TMDS config: %d\n", ret);
+		return false;
+	}
+
+	if (enable)
+		config |= SCDC_SCRAMBLING_ENABLE;
+	else
+		config &= ~SCDC_SCRAMBLING_ENABLE;
+
+	ret = drm_scdc_writeb(adapter, SCDC_TMDS_CONFIG, config);
+	if (ret < 0) {
+		debug("Failed to enable scrambling: %d\n", ret);
+		return false;
+	}
+
+	return true;
+}
+
+static bool
+drm_scdc_set_high_tmds_clock_ratio(struct ddc_adapter *adapter, bool set)
+{
+	u8 config;
+	int ret;
+
+	ret = drm_scdc_readb(adapter, SCDC_TMDS_CONFIG, &config);
+	if (ret < 0) {
+		debug("Failed to read TMDS config: %d\n", ret);
+		return false;
+	}
+
+	if (set)
+		config |= SCDC_TMDS_BIT_CLOCK_RATIO_BY_40;
+	else
+		config &= ~SCDC_TMDS_BIT_CLOCK_RATIO_BY_40;
+
+	ret = drm_scdc_writeb(adapter, SCDC_TMDS_CONFIG, config);
+	if (ret < 0) {
+		debug("Failed to set TMDS clock ratio: %d\n", ret);
+		return false;
+	}
+
+	/*
+	 * The spec says that a source should wait minimum 1ms and maximum
+	 * 100ms after writing the TMDS config for clock ratio. Lets allow a
+	 * wait of up to 2ms here.
+	 */
+	udelay(2000);
+	return true;
+}
+
+static void dw_hdmi_i2c_init(struct dw_hdmi_qp *hdmi)
+{
+	/* Software reset */
+	hdmi_writel(hdmi, 0x01, I2CM_CONTROL0);
+
+	hdmi_writel(hdmi, 0x085c085c, I2CM_FM_SCL_CONFIG0);
+
+	hdmi_modb(hdmi, 0, I2CM_FM_EN, I2CM_INTERFACE_CONTROL0);
+
+	/* Clear DONE and ERROR interrupts */
+	hdmi_writel(hdmi, I2CM_OP_DONE_CLEAR | I2CM_NACK_RCVD_CLEAR,
+		    MAINUNIT_1_INT_CLEAR);
+}
+
+static int dw_hdmi_i2c_read(struct dw_hdmi_qp *hdmi,
+			    unsigned char *buf, unsigned int length)
+{
+	struct dw_hdmi_i2c *i2c = hdmi->i2c;
+	int i = 20;
+	u32 intr = 0;
+
+	if (!i2c->is_regaddr) {
+		printf("set read register address to 0\n");
+		i2c->slave_reg = 0x00;
+		i2c->is_regaddr = true;
+	}
+
+	while (length--) {
+		hdmi_modb(hdmi, i2c->slave_reg++ << 12, I2CM_ADDR,
+			  I2CM_INTERFACE_CONTROL0);
+
+		hdmi_modb(hdmi, I2CM_FM_READ, I2CM_WR_MASK,
+			  I2CM_INTERFACE_CONTROL0);
+
+		while (i--) {
+			udelay(1000);
+			intr = hdmi_readl(hdmi, MAINUNIT_1_INT_STATUS) &
+				(I2CM_OP_DONE_IRQ | I2CM_READ_REQUEST_IRQ |
+				 I2CM_NACK_RCVD_IRQ);
+			if (intr) {
+				hdmi_writel(hdmi, intr, MAINUNIT_1_INT_CLEAR);
+				break;
+			}
+		}
+
+		if (!i) {
+			printf("i2c read time out!\n");
+			hdmi_writel(hdmi, 0x01, I2CM_CONTROL0);
+			return -EAGAIN;
+		}
+
+		/* Check for error condition on the bus */
+		if (intr & I2CM_NACK_RCVD_IRQ) {
+			printf("i2c read err!\n");
+			hdmi_writel(hdmi, 0x01, I2CM_CONTROL0);
+			return -EIO;
+		}
+
+		*buf++ = hdmi_readl(hdmi, I2CM_INTERFACE_RDDATA_0_3) & 0xff;
+		hdmi_modb(hdmi, 0, I2CM_WR_MASK, I2CM_INTERFACE_CONTROL0);
+		i = 20;
+	}
+	i2c->is_segment = false;
+
+	return 0;
+}
+
+static int dw_hdmi_i2c_write(struct dw_hdmi_qp *hdmi,
+			     unsigned char *buf, unsigned int length)
+{
+	struct dw_hdmi_i2c *i2c = hdmi->i2c;
+	int i = 20;
+	u32 intr = 0;
+
+	if (!i2c->is_regaddr) {
+		/* Use the first write byte as register address */
+		i2c->slave_reg = buf[0];
+		length--;
+		buf++;
+		i2c->is_regaddr = true;
+	}
+
+	while (length--) {
+		hdmi_writel(hdmi, *buf++, I2CM_INTERFACE_WRDATA_0_3);
+		hdmi_modb(hdmi, i2c->slave_reg++ << 12, I2CM_ADDR,
+			  I2CM_INTERFACE_CONTROL0);
+		hdmi_modb(hdmi, I2CM_FM_WRITE, I2CM_WR_MASK,
+			  I2CM_INTERFACE_CONTROL0);
+
+		while (i--) {
+			udelay(1000);
+			intr = hdmi_readl(hdmi, MAINUNIT_1_INT_STATUS) &
+				(I2CM_OP_DONE_IRQ | I2CM_READ_REQUEST_IRQ |
+				 I2CM_NACK_RCVD_IRQ);
+			if (intr) {
+				hdmi_writel(hdmi, intr, MAINUNIT_1_INT_CLEAR);
+				break;
+			}
+		}
+
+		if (!i) {
+			printf("i2c write time out!\n");
+			hdmi_writel(hdmi, 0x01, I2CM_CONTROL0);
+			return -EAGAIN;
+		}
+
+		/* Check for error condition on the bus */
+		if (intr & I2CM_NACK_RCVD_IRQ) {
+			printf("i2c write nack!\n");
+			hdmi_writel(hdmi, 0x01, I2CM_CONTROL0);
+			return -EIO;
+		}
+		hdmi_modb(hdmi, 0, I2CM_WR_MASK, I2CM_INTERFACE_CONTROL0);
+		i = 20;
+	}
+
+	return 0;
+}
+
+static int dw_hdmi_i2c_xfer(struct ddc_adapter *adap,
+			    struct i2c_msg *msgs, int num)
+{
+	struct dw_hdmi_qp *hdmi = container_of(adap, struct dw_hdmi_qp, adap);
+	struct dw_hdmi_i2c *i2c = hdmi->i2c;
+	u8 addr = msgs[0].addr;
+	int i, ret = 0;
+
+	debug("i2c xfer: num: %d, addr: %#x\n", num, addr);
+
+	for (i = 0; i < num; i++) {
+		if (msgs[i].len == 0) {
+			printf("unsupported transfer %d/%d, no data\n",
+			       i + 1, num);
+			return -EOPNOTSUPP;
+		}
+	}
+
+	/* Unmute DONE and ERROR interrupts */
+	hdmi_modb(hdmi, I2CM_NACK_RCVD_MASK_N | I2CM_OP_DONE_MASK_N,
+		  I2CM_NACK_RCVD_MASK_N | I2CM_OP_DONE_MASK_N,
+		  MAINUNIT_1_INT_MASK_N);
+
+	/* Set slave device address taken from the first I2C message */
+	if (addr == DDC_SEGMENT_ADDR && msgs[0].len == 1)
+		addr = DDC_ADDR;
+
+	hdmi_modb(hdmi, addr << 5, I2CM_SLVADDR, I2CM_INTERFACE_CONTROL0);
+
+	/* Set slave device register address on transfer */
+	i2c->is_regaddr = false;
+
+	/* Set segment pointer for I2C extended read mode operation */
+	i2c->is_segment = false;
+
+	for (i = 0; i < num; i++) {
+		debug("xfer: num: %d/%d, len: %d, flags: %#x\n",
+		      i + 1, num, msgs[i].len, msgs[i].flags);
+
+		if (msgs[i].addr == DDC_SEGMENT_ADDR && msgs[i].len == 1) {
+			i2c->is_segment = true;
+			hdmi_modb(hdmi, DDC_SEGMENT_ADDR, I2CM_SEG_ADDR,
+				  I2CM_INTERFACE_CONTROL1);
+			hdmi_modb(hdmi, *msgs[i].buf, I2CM_SEG_PTR,
+				  I2CM_INTERFACE_CONTROL1);
+		} else {
+			if (msgs[i].flags & I2C_M_RD)
+				ret = dw_hdmi_i2c_read(hdmi, msgs[i].buf,
+						       msgs[i].len);
+			else
+				ret = dw_hdmi_i2c_write(hdmi, msgs[i].buf,
+							msgs[i].len);
+		}
+		if (ret < 0)
+			break;
+	}
+
+	if (!ret)
+		ret = num;
+
+	/* Mute DONE and ERROR interrupts */
+	hdmi_modb(hdmi, 0, I2CM_OP_DONE_MASK_N | I2CM_NACK_RCVD_MASK_N,
+		  MAINUNIT_1_INT_MASK_N);
+
+	return ret;
+}
+
+static int dw_hdmi_detect_phy(struct dw_hdmi_qp *hdmi)
+{
+	/* Vendor PHYs require support from the glue layer. */
+	if (!hdmi->plat_data->qp_phy_ops || !hdmi->plat_data->phy_name) {
+		dev_err(hdmi->dev,
+			"Vendor HDMI PHY not supported by glue layer\n");
+		return -ENODEV;
+	}
+
+	hdmi->phy.ops = hdmi->plat_data->qp_phy_ops;
+	hdmi->phy.data = hdmi->plat_data->phy_data;
+	hdmi->phy.name = hdmi->plat_data->phy_name;
+
+	return 0;
+}
+
+static unsigned int
+hdmi_get_tmdsclock(struct dw_hdmi_qp *hdmi, unsigned long mpixelclock)
+{
+	unsigned int tmdsclock = mpixelclock;
+	unsigned int depth =
+		hdmi_bus_fmt_color_depth(hdmi->hdmi_data.enc_out_bus_format);
+
+	if (!hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format)) {
+		switch (depth) {
+		case 16:
+			tmdsclock = mpixelclock * 2;
+			break;
+		case 12:
+			tmdsclock = mpixelclock * 3 / 2;
+			break;
+		case 10:
+			tmdsclock = mpixelclock * 5 / 4;
+			break;
+		default:
+			break;
+		}
+	}
+
+	return tmdsclock;
+}
+
+static void hdmi_config_AVI(struct dw_hdmi_qp *hdmi, struct drm_display_mode *mode)
+{
+	struct hdmi_avi_infoframe frame;
+	u32 val, i, j;
+	u8 buff[17];
+	bool is_hdmi2 = false;
+	enum hdmi_quantization_range rgb_quant_range =
+		hdmi->hdmi_data.quant_range;
+
+	if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format) ||
+	    hdmi->edid_data.display_info.hdmi.scdc.supported)
+		is_hdmi2 = true;
+	/* Initialise info frame from DRM mode */
+	drm_hdmi_avi_infoframe_from_display_mode(&frame, mode, is_hdmi2);
+
+	/*
+	 * Ignore monitor selectable quantization, use quantization set
+	 * by the user
+	 */
+	drm_hdmi_avi_infoframe_quant_range(&frame, mode, rgb_quant_range,
+					   true);
+	if (hdmi_bus_fmt_is_yuv444(hdmi->hdmi_data.enc_out_bus_format))
+		frame.colorspace = HDMI_COLORSPACE_YUV444;
+	else if (hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format))
+		frame.colorspace = HDMI_COLORSPACE_YUV422;
+	else if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format))
+		frame.colorspace = HDMI_COLORSPACE_YUV420;
+	else
+		frame.colorspace = HDMI_COLORSPACE_RGB;
+
+	/* Set up colorimetry */
+	if (!hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format)) {
+		switch (hdmi->hdmi_data.enc_out_encoding) {
+		case V4L2_YCBCR_ENC_601:
+			if (hdmi->hdmi_data.enc_in_encoding == V4L2_YCBCR_ENC_XV601)
+				frame.colorimetry = HDMI_COLORIMETRY_EXTENDED;
+			else
+				frame.colorimetry = HDMI_COLORIMETRY_ITU_601;
+			frame.extended_colorimetry =
+					HDMI_EXTENDED_COLORIMETRY_XV_YCC_601;
+			break;
+		case V4L2_YCBCR_ENC_709:
+			if (hdmi->hdmi_data.enc_in_encoding == V4L2_YCBCR_ENC_XV709)
+				frame.colorimetry = HDMI_COLORIMETRY_EXTENDED;
+			else
+				frame.colorimetry = HDMI_COLORIMETRY_ITU_709;
+			frame.extended_colorimetry =
+					HDMI_EXTENDED_COLORIMETRY_XV_YCC_709;
+			break;
+		default: /* Carries no data */
+			frame.colorimetry = HDMI_COLORIMETRY_ITU_601;
+			frame.extended_colorimetry =
+					HDMI_EXTENDED_COLORIMETRY_XV_YCC_601;
+			break;
+		}
+	}
+
+	frame.scan_mode = HDMI_SCAN_MODE_NONE;
+
+	hdmi_avi_infoframe_pack_only(&frame, buff, 17);
+
+	/*
+	 * The Designware IP uses a different byte format from standard
+	 * AVI info frames, though generally the bits are in the correct
+	 * bytes.
+	 */
+
+	val = (frame.version << 8) | (frame.length << 16);
+	hdmi_writel(hdmi, val, PKT_AVI_CONTENTS0);
+
+	for (i = 0; i < 4; i++) {
+		for (j = 0; j < 4; j++) {
+			if (i * 4 + j >= 14)
+				break;
+			if (!j)
+				val = buff[i * 4 + j + 3];
+			val |= buff[i * 4 + j + 3] << (8 * j);
+		}
+
+		hdmi_writel(hdmi, val, PKT_AVI_CONTENTS1 + i * 4);
+	}
+
+	hdmi_modb(hdmi, PKTSCHED_AVI_TX_EN | PKTSCHED_GCP_TX_EN,
+		  PKTSCHED_AVI_TX_EN | PKTSCHED_GCP_TX_EN,
+		  PKTSCHED_PKT_EN);
+}
+
+static void hdmi_config_CVTEM(struct dw_hdmi_qp *hdmi,
+			      struct dw_hdmi_link_config *link_cfg)
+{
+	u8 ds_type = 0;
+	u8 sync = 1;
+	u8 vfr = 1;
+	u8 afr = 0;
+	u8 new = 1;
+	u8 end = 0;
+	u8 data_set_length = 136;
+	u8 hb1[6] = { 0x80, 0, 0, 0, 0, 0x40 };
+	u8 *pps_body;
+	u32 val, i, reg;
+	struct drm_display_mode *mode = &hdmi->previous_mode;
+	int hsync, hfront, hback;
+
+	hdmi_modb(hdmi, 0, PKTSCHED_EMP_CVTEM_TX_EN, PKTSCHED_PKT_EN);
+
+	if (!link_cfg->dsc_mode) {
+		printf("don't use dsc mode\n");
+		return;
+	}
+
+	pps_body = link_cfg->pps_payload;
+
+	hsync = mode->hsync_end - mode->hsync_start;
+	hback = mode->htotal - mode->hsync_end;
+	hfront = mode->hsync_start - mode->hdisplay;
+
+	for (i = 0; i < 6; i++) {
+		val = i << 16 | hb1[i] << 8;
+		hdmi_writel(hdmi, val, PKT0_EMP_CVTEM_CONTENTS0 + i * 0x20);
+	}
+
+	val = new << 7 | end << 6 | ds_type << 4 | afr << 3 |
+	      vfr << 2 | sync << 1;
+	hdmi_writel(hdmi, val, PKT0_EMP_CVTEM_CONTENTS1);
+
+	val = data_set_length << 16 | pps_body[0] << 24;
+	hdmi_writel(hdmi, val, PKT0_EMP_CVTEM_CONTENTS2);
+
+	reg = PKT0_EMP_CVTEM_CONTENTS3;
+	for (i = 1; i < 125; i++) {
+		if (reg == PKT1_EMP_CVTEM_CONTENTS0 ||
+		    reg == PKT2_EMP_CVTEM_CONTENTS0 ||
+		    reg == PKT3_EMP_CVTEM_CONTENTS0 ||
+		    reg == PKT4_EMP_CVTEM_CONTENTS0 ||
+		    reg == PKT5_EMP_CVTEM_CONTENTS0) {
+			reg += 4;
+			i--;
+			continue;
+		}
+		if (i % 4 == 1)
+			val = pps_body[i];
+		if (i % 4 == 2)
+			val |= pps_body[i] << 8;
+		if (i % 4 == 3)
+			val |= pps_body[i] << 16;
+		if (!(i % 4)) {
+			val |= pps_body[i] << 24;
+			hdmi_writel(hdmi, val, reg);
+			reg += 4;
+		}
+	}
+
+	val = (hfront & 0xff) << 24 | pps_body[127] << 16 |
+	      pps_body[126] << 8 | pps_body[125];
+	hdmi_writel(hdmi, val, PKT4_EMP_CVTEM_CONTENTS6);
+
+	val = (hback & 0xff) << 24 | ((hsync >> 8) & 0xff) << 16 |
+	      (hsync & 0xff) << 8 | ((hfront >> 8) & 0xff);
+	hdmi_writel(hdmi, val, PKT4_EMP_CVTEM_CONTENTS7);
+
+	val = link_cfg->hcactive << 8 | ((hback >> 8) & 0xff);
+	hdmi_writel(hdmi, val, PKT5_EMP_CVTEM_CONTENTS1);
+
+	for (i = PKT5_EMP_CVTEM_CONTENTS2; i <= PKT5_EMP_CVTEM_CONTENTS7; i += 4)
+		hdmi_writel(hdmi, 0, i);
+
+	hdmi_modb(hdmi, PKTSCHED_EMP_CVTEM_TX_EN, PKTSCHED_EMP_CVTEM_TX_EN,
+		  PKTSCHED_PKT_EN);
+}
+
+static int hdmi_set_frl_mask(int frl_rate)
+{
+	switch (frl_rate) {
+	case 48:
+		return FRL_12GBPS_4LANE;
+	case 40:
+		return FRL_10GBPS_4LANE;
+	case 32:
+		return FRL_8GBPS_4LANE;
+	case 24:
+		return FRL_6GBPS_4LANE;
+	case 18:
+		return FRL_6GBPS_3LANE;
+	case 9:
+		return FRL_3GBPS_3LANE;
+	}
+
+	return 0;
+}
+
+static int hdmi_start_flt(struct dw_hdmi_qp *hdmi, u8 rate)
+{
+	u8 val;
+	u32 value;
+	u8 ffe_lv = 0;
+	int i = 0;
+	bool ltsp = false;
+
+	hdmi_modb(hdmi, BIT(6), BIT(6), 0x44);
+	/* FLT_READY & FFE_LEVELS read */
+	for (i = 0; i < 20; i++) {
+		drm_scdc_readb(&hdmi->adap, SCDC_STATUS_FLAGS_0, &val);
+		if (val & BIT(6))
+			break;
+		mdelay(20);
+	}
+
+	if (i == 20) {
+		dev_err(hdmi->dev, "sink flt isn't ready\n");
+		return -EINVAL;
+	}
+
+	/* max ffe level 3 */
+	val = 0 << 4 | hdmi_set_frl_mask(rate);
+	drm_scdc_writeb(&hdmi->adap, 0x31, val);
+
+	/* select FRL_RATE & FFE_LEVELS */
+	hdmi_writel(hdmi, ffe_lv, FLT_CONFIG0);
+
+	while (1) {
+		mdelay(4);
+		drm_scdc_readb(&hdmi->adap, 0x10, &val);
+
+		if (!(val & 0x30))
+			continue;
+
+		if (val & BIT(5)) {
+			u8 reg_val, ln0, ln1, ln2, ln3;
+
+			drm_scdc_readb(&hdmi->adap, 0x41, &reg_val);
+			ln0 = reg_val & 0xf;
+			ln1 = (reg_val >> 4) & 0xf;
+
+			drm_scdc_readb(&hdmi->adap, 0x42, &reg_val);
+			ln2 = reg_val & 0xf;
+			ln3 = (reg_val >> 4) & 0xf;
+
+			if (!ln0 && !ln1 && !ln2 && !ln3) {
+				printf("ltsp!\n");
+				ltsp = true;
+				hdmi_writel(hdmi, 0, FLT_CONFIG1);
+			} else if ((ln0 == 0xf) | (ln1 == 0xf) | (ln2 == 0xf) | (ln3 == 0xf)) {
+				printf("lts4!\n");
+				break;
+			} else if ((ln0 == 0xe) | (ln1 == 0xe) | (ln2 == 0xe) | (ln3 == 0xe)) {
+				printf("ffe!\n");
+				break;
+			} else {
+				value = (ln3 << 16) | (ln2 << 12) | (ln1 << 8) | (ln0 << 4) | 0xf;
+				hdmi_writel(hdmi, value, FLT_CONFIG1);
+			}
+		}
+
+		drm_scdc_writeb(&hdmi->adap, 0x10, val);
+
+		if ((val & BIT(4)) && ltsp) {
+			printf("flt success\n");
+			break;
+		}
+	}
+
+	hdmi_modb(hdmi, 0, BIT(6), 0x44);
+	return 0;
+}
+
+#define HDMI_MODE_FRL_MASK     BIT(30)
+
+static void hdmi_set_op_mode(struct dw_hdmi_qp *hdmi,
+			     struct dw_hdmi_link_config *link_cfg,
+			     bool scdc_support)
+{
+	int frl_rate;
+
+	hdmi_writel(hdmi, 0, FLT_CONFIG0);
+	if (scdc_support)
+		drm_scdc_writeb(&hdmi->adap, 0x31, 0);
+	mdelay(200);
+	if (!link_cfg->frl_mode) {
+		printf("dw hdmi qp use tmds mode\n");
+		hdmi_modb(hdmi, 0, OPMODE_FRL, LINK_CONFIG0);
+		hdmi_modb(hdmi, 0, OPMODE_FRL_4LANES, LINK_CONFIG0);
+		return;
+	}
+
+	if (link_cfg->frl_lanes == 4)
+		hdmi_modb(hdmi, OPMODE_FRL_4LANES, OPMODE_FRL_4LANES,
+			  LINK_CONFIG0);
+	else
+		hdmi_modb(hdmi, 0, OPMODE_FRL_4LANES, LINK_CONFIG0);
+
+	hdmi_modb(hdmi, 1, OPMODE_FRL, LINK_CONFIG0);
+
+	frl_rate = link_cfg->frl_lanes * link_cfg->rate_per_lane;
+	hdmi_start_flt(hdmi, frl_rate);
+}
+
+static int dw_hdmi_setup(struct dw_hdmi_qp *hdmi,
+			 struct drm_display_mode *mode,
+			 struct display_state *state)
+{
+	int ret;
+	void *data = hdmi->plat_data->phy_data;
+	struct dw_hdmi_link_config *link_cfg;
+	struct drm_hdmi_info *hdmi_info = &hdmi->edid_data.display_info.hdmi;
+	struct hdmi_vmode *vmode = &hdmi->hdmi_data.video_mode;
+	u8 bytes = 0;
+
+	if (!hdmi->vic)
+		printf("Non-CEA mode used in HDMI\n");
+	else
+		printf("CEA mode used vic=%d\n", hdmi->vic);
+
+	vmode->mpixelclock = mode->crtc_clock * 1000;
+	vmode->mtmdsclock = hdmi_get_tmdsclock(hdmi, vmode->mpixelclock);
+	if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format))
+		vmode->mtmdsclock /= 2;
+	printf("mtmdsclock:%d\n", vmode->mtmdsclock);
+
+	if (hdmi->plat_data->get_enc_out_encoding)
+		hdmi->hdmi_data.enc_out_encoding =
+			hdmi->plat_data->get_enc_out_encoding(data);
+	else if (hdmi->vic == 6 || hdmi->vic == 7 ||
+		 hdmi->vic == 21 || hdmi->vic == 22 ||
+		 hdmi->vic == 2 || hdmi->vic == 3 ||
+		 hdmi->vic == 17 || hdmi->vic == 18)
+		hdmi->hdmi_data.enc_out_encoding = V4L2_YCBCR_ENC_601;
+	else
+		hdmi->hdmi_data.enc_out_encoding = V4L2_YCBCR_ENC_709;
+
+	if (mode->flags & DRM_MODE_FLAG_DBLCLK) {
+		hdmi->hdmi_data.video_mode.mpixelrepetitionoutput = 1;
+		hdmi->hdmi_data.video_mode.mpixelrepetitioninput = 1;
+	} else {
+		hdmi->hdmi_data.video_mode.mpixelrepetitionoutput = 0;
+		hdmi->hdmi_data.video_mode.mpixelrepetitioninput = 0;
+	}
+
+	/* TOFIX: Get input encoding from plat data or fallback to none */
+	if (hdmi->plat_data->get_enc_in_encoding)
+		hdmi->hdmi_data.enc_in_encoding =
+			hdmi->plat_data->get_enc_in_encoding(data);
+	else if (hdmi->plat_data->input_bus_encoding)
+		hdmi->hdmi_data.enc_in_encoding =
+			hdmi->plat_data->input_bus_encoding;
+	else
+		hdmi->hdmi_data.enc_in_encoding = V4L2_YCBCR_ENC_DEFAULT;
+
+	if (hdmi->plat_data->get_quant_range)
+		hdmi->hdmi_data.quant_range =
+			hdmi->plat_data->get_quant_range(data);
+	else
+		hdmi->hdmi_data.quant_range = HDMI_QUANTIZATION_RANGE_DEFAULT;
+
+	/*
+	 * According to the dw-hdmi specification 6.4.2
+	 * vp_pr_cd[3:0]:
+	 * 0000b: No pixel repetition (pixel sent only once)
+	 * 0001b: Pixel sent two times (pixel repeated once)
+	 */
+	hdmi->hdmi_data.pix_repet_factor =
+		(mode->flags & DRM_MODE_FLAG_DBLCLK) ? 1 : 0;
+	hdmi->hdmi_data.video_mode.mdataenablepolarity = true;
+
+	/* HDMI Initialization Step B.2 */
+	ret = hdmi->phy.ops->init(hdmi->rk_hdmi, state);
+	if (ret)
+		return ret;
+	hdmi->phy.enabled = true;
+
+	rk3588_set_grf_cfg(hdmi->rk_hdmi);
+	link_cfg = dw_hdmi_rockchip_get_link_cfg(hdmi->rk_hdmi);
+
+	/* not for DVI mode */
+	if (hdmi->sink_is_hdmi) {
+		printf("%s HDMI mode\n", __func__);
+		hdmi_modb(hdmi, 0, OPMODE_DVI, LINK_CONFIG0);
+		hdmi_modb(hdmi, HDCP2_BYPASS, HDCP2_BYPASS, HDCP2LOGIC_CONFIG0);
+		if (!link_cfg->frl_mode) {
+			if (vmode->mtmdsclock > HDMI14_MAX_TMDSCLK) {
+				drm_scdc_readb(&hdmi->adap, SCDC_SINK_VERSION, &bytes);
+				drm_scdc_writeb(&hdmi->adap, SCDC_SOURCE_VERSION,
+						min_t(u8, bytes, SCDC_MIN_SOURCE_VERSION));
+				drm_scdc_set_high_tmds_clock_ratio(&hdmi->adap, 1);
+				drm_scdc_set_scrambling(&hdmi->adap, 1);
+				hdmi_writel(hdmi, 1, SCRAMB_CONFIG0);
+			} else {
+				if (hdmi_info->scdc.supported) {
+					drm_scdc_set_high_tmds_clock_ratio(&hdmi->adap, 0);
+					drm_scdc_set_scrambling(&hdmi->adap, 0);
+				}
+				hdmi_writel(hdmi, 0, SCRAMB_CONFIG0);
+			}
+		}
+		/* HDMI Initialization Step F - Configure AVI InfoFrame */
+		hdmi_config_AVI(hdmi, mode);
+		hdmi_config_CVTEM(hdmi, link_cfg);
+		hdmi_set_op_mode(hdmi, link_cfg, hdmi_info->scdc.supported);
+	} else {
+		hdmi_modb(hdmi, OPMODE_DVI, OPMODE_DVI, LINK_CONFIG0);
+		printf("%s DVI mode\n", __func__);
+	}
+
+	return 0;
+}
+
+int dw_hdmi_detect_hotplug(struct dw_hdmi_qp *hdmi,
+			   struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	int ret;
+
+	ret = hdmi->phy.ops->read_hpd(hdmi->rk_hdmi);
+	if (ret) {
+		if (!hdmi->id)
+			conn_state->output_if |= VOP_OUTPUT_IF_HDMI0;
+		else
+			conn_state->output_if |= VOP_OUTPUT_IF_HDMI1;
+	}
+
+	return ret;
+}
+
+int rockchip_dw_hdmi_qp_pre_init(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+
+	conn_state->type = DRM_MODE_CONNECTOR_HDMIA;
+
+	return 0;
+}
+
+int rockchip_dw_hdmi_qp_init(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	const struct rockchip_connector *connector = conn_state->connector;
+	const struct dw_hdmi_plat_data *pdata = connector->data;
+	void *rk_hdmi = dev_get_priv(conn_state->dev);
+	struct dw_hdmi_qp *hdmi;
+	struct drm_display_mode *mode_buf;
+	ofnode hdmi_node = conn_state->node;
+	struct device_node *ddc_node;
+
+	hdmi = malloc(sizeof(struct dw_hdmi_qp));
+	if (!hdmi)
+		return -ENOMEM;
+
+	memset(hdmi, 0, sizeof(struct dw_hdmi_qp));
+	mode_buf = malloc(MODE_LEN * sizeof(struct drm_display_mode));
+	if (!mode_buf)
+		return -ENOMEM;
+
+	hdmi->rk_hdmi = rk_hdmi;
+	hdmi->id = of_alias_get_id(ofnode_to_np(hdmi_node), "hdmi");
+	if (hdmi->id < 0)
+		hdmi->id = 0;
+	conn_state->disp_info = rockchip_get_disp_info(conn_state->type, hdmi->id);
+
+	memset(mode_buf, 0, MODE_LEN * sizeof(struct drm_display_mode));
+
+	hdmi->regs = dev_read_addr_ptr(conn_state->dev);
+
+	ddc_node = of_parse_phandle(ofnode_to_np(hdmi_node), "ddc-i2c-bus", 0);
+	if (ddc_node) {
+		uclass_get_device_by_ofnode(UCLASS_I2C, np_to_ofnode(ddc_node),
+					    &hdmi->adap.i2c_bus);
+		if (hdmi->adap.i2c_bus)
+			hdmi->adap.ops = i2c_get_ops(hdmi->adap.i2c_bus);
+	}
+
+	hdmi->i2c = malloc(sizeof(struct dw_hdmi_i2c));
+	if (!hdmi->i2c)
+		return -ENOMEM;
+	hdmi->adap.ddc_xfer = dw_hdmi_i2c_xfer;
+
+	/*
+	 * Read high and low time from device tree. If not available use
+	 * the default timing scl clock rate is about 99.6KHz.
+	 */
+	hdmi->i2c->scl_high_ns =
+		ofnode_read_s32_default(hdmi_node,
+					"ddc-i2c-scl-high-time-ns", 4708);
+	hdmi->i2c->scl_low_ns =
+		ofnode_read_s32_default(hdmi_node,
+					"ddc-i2c-scl-low-time-ns", 4916);
+
+	dw_hdmi_i2c_init(hdmi);
+	conn_state->output_mode = ROCKCHIP_OUT_MODE_AAAA;
+
+	hdmi->dev_type = pdata->dev_type;
+	hdmi->plat_data = pdata;
+	hdmi->edid_data.mode_buf = mode_buf;
+
+	conn_state->private = hdmi;
+
+	dw_hdmi_detect_phy(hdmi);
+	hdmi_writel(hdmi, 0, MAINUNIT_0_INT_MASK_N);
+	hdmi_writel(hdmi, 0, MAINUNIT_1_INT_MASK_N);
+	hdmi_writel(hdmi, 428571429, TIMER_BASE_CONFIG0);
+
+	dw_hdmi_qp_set_iomux(hdmi->rk_hdmi);
+
+	return 0;
+}
+
+void rockchip_dw_hdmi_qp_deinit(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct dw_hdmi_qp *hdmi = conn_state->private;
+
+	if (hdmi->i2c)
+		free(hdmi->i2c);
+	if (hdmi->edid_data.mode_buf)
+		free(hdmi->edid_data.mode_buf);
+	if (hdmi)
+		free(hdmi);
+}
+
+int rockchip_dw_hdmi_qp_prepare(struct display_state *state)
+{
+	return 0;
+}
+
+static void dw_hdmi_disable(struct dw_hdmi_qp *hdmi, struct display_state *state)
+{
+	if (hdmi->phy.enabled) {
+		hdmi->phy.ops->disable(hdmi->rk_hdmi, state);
+		hdmi->phy.enabled = false;
+	}
+}
+
+int rockchip_dw_hdmi_qp_enable(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct drm_display_mode *mode = &conn_state->mode;
+	struct dw_hdmi_qp *hdmi = conn_state->private;
+
+	if (!hdmi)
+		return -EFAULT;
+
+	/* Store the display mode for plugin/DKMS poweron events */
+	memcpy(&hdmi->previous_mode, mode, sizeof(hdmi->previous_mode));
+
+	dw_hdmi_setup(hdmi, mode, state);
+
+	return 0;
+}
+
+int rockchip_dw_hdmi_qp_disable(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct dw_hdmi_qp *hdmi = conn_state->private;
+
+	dw_hdmi_disable(hdmi, state);
+	return 0;
+}
+
+int rockchip_dw_hdmi_qp_get_timing(struct display_state *state)
+{
+	int ret, i;
+	struct connector_state *conn_state = &state->conn_state;
+	struct drm_display_mode *mode = &conn_state->mode;
+	struct dw_hdmi_qp *hdmi = conn_state->private;
+	struct edid *edid = (struct edid *)conn_state->edid;
+	unsigned int bus_format;
+	unsigned long enc_out_encoding;
+	struct overscan *overscan = &conn_state->overscan;
+	const u8 def_modes_vic[6] = {4, 16, 2, 17, 31, 19};
+
+	if (!hdmi)
+		return -EFAULT;
+
+	ret = drm_do_get_edid(&hdmi->adap, conn_state->edid);
+	if (!ret) {
+		hdmi->sink_is_hdmi =
+			drm_detect_hdmi_monitor(edid);
+		hdmi->sink_has_audio = drm_detect_monitor_audio(edid);
+		ret = drm_add_edid_modes(&hdmi->edid_data, conn_state->edid);
+	}
+	if (ret < 0) {
+		hdmi->sink_is_hdmi = true;
+		hdmi->sink_has_audio = true;
+		do_cea_modes(&hdmi->edid_data, def_modes_vic,
+			     sizeof(def_modes_vic));
+		hdmi->edid_data.preferred_mode = &hdmi->edid_data.mode_buf[0];
+		printf("failed to get edid\n");
+	}
+	drm_rk_filter_whitelist(&hdmi->edid_data);
+	if (hdmi->phy.ops->mode_valid)
+		hdmi->phy.ops->mode_valid(hdmi->rk_hdmi, state);
+	drm_mode_max_resolution_filter(&hdmi->edid_data,
+				       &state->crtc_state.max_output);
+	if (!drm_mode_prune_invalid(&hdmi->edid_data)) {
+		printf("can't find valid hdmi mode\n");
+		return -EINVAL;
+	}
+
+	for (i = 0; i < hdmi->edid_data.modes; i++)
+		hdmi->edid_data.mode_buf[i].vrefresh =
+			drm_mode_vrefresh(&hdmi->edid_data.mode_buf[i]);
+
+	drm_mode_sort(&hdmi->edid_data);
+	dw_hdmi_qp_selete_output(&hdmi->edid_data, conn_state, &bus_format,
+				 overscan, hdmi->dev_type,
+				 hdmi->output_bus_format_rgb, hdmi->rk_hdmi);
+
+	*mode = *hdmi->edid_data.preferred_mode;
+	hdmi->vic = drm_match_cea_mode(mode);
+
+	printf("mode:%dx%d bus_format:0x%x\n", mode->hdisplay, mode->vdisplay, bus_format);
+	if (state->force_output)
+		bus_format = state->force_bus_format;
+	conn_state->bus_format = bus_format;
+	hdmi->hdmi_data.enc_in_bus_format = bus_format;
+	hdmi->hdmi_data.enc_out_bus_format = bus_format;
+
+	switch (bus_format) {
+	case MEDIA_BUS_FMT_UYVY10_1X20:
+		conn_state->bus_format = MEDIA_BUS_FMT_YUV10_1X30;
+		hdmi->hdmi_data.enc_in_bus_format =
+			MEDIA_BUS_FMT_YUV10_1X30;
+		break;
+	case MEDIA_BUS_FMT_UYVY8_1X16:
+		conn_state->bus_format = MEDIA_BUS_FMT_YUV8_1X24;
+		hdmi->hdmi_data.enc_in_bus_format =
+			MEDIA_BUS_FMT_YUV8_1X24;
+		break;
+	case MEDIA_BUS_FMT_UYYVYY8_0_5X24:
+	case MEDIA_BUS_FMT_UYYVYY10_0_5X30:
+		conn_state->output_mode = ROCKCHIP_OUT_MODE_YUV420;
+		break;
+	}
+
+	if (hdmi->vic == 6 || hdmi->vic == 7 || hdmi->vic == 21 ||
+	    hdmi->vic == 22 || hdmi->vic == 2 || hdmi->vic == 3 ||
+	    hdmi->vic == 17 || hdmi->vic == 18)
+		enc_out_encoding = V4L2_YCBCR_ENC_601;
+	else
+		enc_out_encoding = V4L2_YCBCR_ENC_709;
+
+	if (enc_out_encoding == V4L2_YCBCR_ENC_BT2020)
+		conn_state->color_space = V4L2_COLORSPACE_BT2020;
+	else if (bus_format == MEDIA_BUS_FMT_RGB888_1X24 ||
+		 bus_format == MEDIA_BUS_FMT_RGB101010_1X30)
+		conn_state->color_space = V4L2_COLORSPACE_DEFAULT;
+	else if (enc_out_encoding == V4L2_YCBCR_ENC_709)
+		conn_state->color_space = V4L2_COLORSPACE_REC709;
+	else
+		conn_state->color_space = V4L2_COLORSPACE_SMPTE170M;
+
+	return 0;
+}
+
+int rockchip_dw_hdmi_qp_detect(struct display_state *state)
+{
+	int ret;
+	struct connector_state *conn_state = &state->conn_state;
+	struct dw_hdmi_qp *hdmi = conn_state->private;
+
+	if (!hdmi)
+		return -EFAULT;
+
+	ret = dw_hdmi_detect_hotplug(hdmi, state);
+
+	return ret;
+}
+
+int rockchip_dw_hdmi_qp_get_edid(struct display_state *state)
+{
+	int ret;
+	struct connector_state *conn_state = &state->conn_state;
+	struct dw_hdmi_qp *hdmi = conn_state->private;
+
+	ret = drm_do_get_edid(&hdmi->adap, conn_state->edid);
+
+	return ret;
+}
diff --git a/drivers/video/drm/dw_hdmi_qp.h b/drivers/video/drm/dw_hdmi_qp.h
new file mode 100644
index 0000000000..b20084ffaa
--- /dev/null
+++ b/drivers/video/drm/dw_hdmi_qp.h
@@ -0,0 +1,936 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2022 Fuzhou Rockchip Electronics Co., Ltd
+ */
+#ifndef __DW_HDMI_QP_H__
+#define __DW_HDMI_QP_H__
+/* Main Unit Registers */
+#define CORE_ID						0x0
+#define VER_NUMBER					0x4
+#define VER_TYPE					0x8
+#define CONFIG_REG					0xc
+#define CONFIG_CEC					BIT(28)
+#define CONFIG_AUD_UD					BIT(23)
+#define CORE_TIMESTAMP_HHMM				0x14
+#define CORE_TIMESTAMP_MMDD				0x18
+#define CORE_TIMESTAMP_YYYY				0x1c
+/* Reset Manager Registers */
+#define GLOBAL_SWRESET_REQUEST				0x40
+#define EARCRX_CMDC_SWINIT_P				BIT(27)
+#define AVP_DATAPATH_PACKET_AUDIO_SWINIT_P		BIT(10)
+#define GLOBAL_SWDISABLE				0x44
+#define CEC_SWDISABLE					BIT(17)
+#define AVP_DATAPATH_PACKET_AUDIO_SWDISABLE		BIT(10)
+#define AVP_DATAPATH_VIDEO_SWDISABLE			BIT(6)
+#define RESET_MANAGER_CONFIG0				0x48
+#define RESET_MANAGER_STATUS0				0x50
+#define RESET_MANAGER_STATUS1				0x54
+#define RESET_MANAGER_STATUS2				0x58
+/* Timer Base Registers */
+#define TIMER_BASE_CONFIG0				0x80
+#define TIMER_BASE_STATUS0				0x84
+/* CMU Registers */
+#define CMU_CONFIG0					0xa0
+#define CMU_CONFIG1					0xa4
+#define CMU_CONFIG2					0xa8
+#define CMU_CONFIG3					0xac
+#define CMU_STATUS					0xb0
+#define EARC_BPCLK_OFF					BIT(9)
+#define AUDCLK_OFF					BIT(7)
+#define LINKQPCLK_OFF					BIT(5)
+#define VIDQPCLK_OFF					BIT(3)
+#define IPI_CLK_OFF					BIT(1)
+#define CMU_IPI_CLK_FREQ				0xb4
+#define CMU_VIDQPCLK_FREQ				0xb8
+#define CMU_LINKQPCLK_FREQ				0xbc
+#define CMU_AUDQPCLK_FREQ				0xc0
+#define CMU_EARC_BPCLK_FREQ				0xc4
+/* I2CM Registers */
+#define I2CM_SM_SCL_CONFIG0				0xe0
+#define I2CM_FM_SCL_CONFIG0				0xe4
+#define I2CM_CONFIG0					0xe8
+#define I2CM_CONTROL0					0xec
+#define I2CM_STATUS0					0xf0
+#define I2CM_INTERFACE_CONTROL0				0xf4
+#define I2CM_ADDR					0xff000
+#define I2CM_SLVADDR					0xfe0
+#define I2CM_WR_MASK					0x1e
+#define I2CM_EXT_READ					BIT(4)
+#define I2CM_SHORT_READ					BIT(3)
+#define I2CM_FM_READ					BIT(2)
+#define I2CM_FM_WRITE					BIT(1)
+#define I2CM_FM_EN					BIT(0)
+#define I2CM_INTERFACE_CONTROL1				0xf8
+#define I2CM_SEG_PTR					0x7f80
+#define I2CM_SEG_ADDR					0x7f
+#define I2CM_INTERFACE_WRDATA_0_3			0xfc
+#define I2CM_INTERFACE_WRDATA_4_7			0x100
+#define I2CM_INTERFACE_WRDATA_8_11			0x104
+#define I2CM_INTERFACE_WRDATA_12_15			0x108
+#define I2CM_INTERFACE_RDDATA_0_3			0x10c
+#define I2CM_INTERFACE_RDDATA_4_7			0x110
+#define I2CM_INTERFACE_RDDATA_8_11			0x114
+#define I2CM_INTERFACE_RDDATA_12_15			0x118
+/* SCDC Registers */
+#define SCDC_CONFIG0					0x140
+#define SCDC_I2C_FM_EN					BIT(12)
+#define SCDC_UPD_FLAGS_AUTO_CLR				BIT(6)
+#define SCDC_UPD_FLAGS_POLL_EN				BIT(4)
+#define SCDC_CONTROL0					0x148
+#define SCDC_STATUS0					0x150
+#define STATUS_UPDATE					BIT(0)
+#define FRL_START					BIT(4)
+#define FLT_UPDATE					BIT(5)
+/* FLT Registers */
+#define FLT_CONFIG0					0x160
+#define FLT_CONFIG1					0x164
+#define FLT_CONFIG2					0x168
+#define FLT_CONTROL0					0x170
+/*  Main Unit 2 Registers */
+#define MAINUNIT_STATUS0				0x180
+/* Video Interface Registers */
+#define VIDEO_INTERFACE_CONFIG0				0x800
+#define VIDEO_INTERFACE_CONFIG1				0x804
+#define VIDEO_INTERFACE_CONFIG2				0x808
+#define VIDEO_INTERFACE_CONTROL0			0x80c
+#define VIDEO_INTERFACE_STATUS0				0x814
+/* Video Packing Registers */
+#define VIDEO_PACKING_CONFIG0				0x81c
+/* Audio Interface Registers */
+#define AUDIO_INTERFACE_CONFIG0				0x820
+#define AUD_IF_SEL_MSK					0x3
+#define AUD_IF_SPDIF					0x2
+#define AUD_IF_I2S					0x1
+#define AUD_IF_PAI					0x0
+#define AUD_FIFO_INIT_ON_OVF_MSK			BIT(2)
+#define AUD_FIFO_INIT_ON_OVF_EN				BIT(2)
+#define I2S_LINES_EN_MSK				GENMASK(7, 4)
+#define I2S_LINES_EN(x)					BIT((x) + 4)
+#define I2S_BPCUV_RCV_MSK				BIT(12)
+#define I2S_BPCUV_RCV_EN				BIT(12)
+#define I2S_BPCUV_RCV_DIS				0
+#define SPDIF_LINES_EN					GENMASK(19, 16)
+#define AUD_FORMAT_MSK					GENMASK(26, 24)
+#define AUD_3DOBA					(0x7 << 24)
+#define AUD_3DASP					(0x6 << 24)
+#define AUD_MSOBA					(0x5 << 24)
+#define AUD_MSASP					(0x4 << 24)
+#define AUD_HBR						(0x3 << 24)
+#define AUD_DST						(0x2 << 24)
+#define AUD_OBA						(0x1 << 24)
+#define AUD_ASP						(0x0 << 24)
+#define AUDIO_INTERFACE_CONFIG1				0x824
+#define AUDIO_INTERFACE_CONTROL0			0x82c
+#define AUDIO_FIFO_CLR_P				BIT(0)
+#define AUDIO_INTERFACE_STATUS0				0x834
+/* Frame Composer Registers */
+#define FRAME_COMPOSER_CONFIG0				0x840
+#define FRAME_COMPOSER_CONFIG1				0x844
+#define FRAME_COMPOSER_CONFIG2				0x848
+#define FRAME_COMPOSER_CONFIG3				0x84c
+#define FRAME_COMPOSER_CONFIG4				0x850
+#define FRAME_COMPOSER_CONFIG5				0x854
+#define FRAME_COMPOSER_CONFIG6				0x858
+#define FRAME_COMPOSER_CONFIG7				0x85c
+#define FRAME_COMPOSER_CONFIG8				0x860
+#define FRAME_COMPOSER_CONFIG9				0x864
+#define FRAME_COMPOSER_CONTROL0				0x86c
+/* Video Monitor Registers */
+#define VIDEO_MONITOR_CONFIG0				0x880
+#define VIDEO_MONITOR_STATUS0				0x884
+#define VIDEO_MONITOR_STATUS1				0x888
+#define VIDEO_MONITOR_STATUS2				0x88c
+#define VIDEO_MONITOR_STATUS3				0x890
+#define VIDEO_MONITOR_STATUS4				0x894
+#define VIDEO_MONITOR_STATUS5				0x898
+#define VIDEO_MONITOR_STATUS6				0x89c
+/* HDCP2 Logic Registers */
+#define HDCP2LOGIC_CONFIG0				0x8e0
+#define HDCP2_BYPASS					BIT(0)
+#define HDCP2LOGIC_ESM_GPIO_IN				0x8e4
+#define HDCP2LOGIC_ESM_GPIO_OUT				0x8e8
+/* HDCP14 Registers */
+#define HDCP14_CONFIG0					0x900
+#define HDCP14_CONFIG1					0x904
+#define HDCP14_CONFIG2					0x908
+#define HDCP14_CONFIG3					0x90c
+#define HDCP14_KEY_SEED					0x914
+#define HDCP14_KEY_H					0x918
+#define HDCP14_KEY_L					0x91c
+#define HDCP14_KEY_STATUS				0x920
+#define HDCP14_AKSV_H					0x924
+#define HDCP14_AKSV_L					0x928
+#define HDCP14_AN_H					0x92c
+#define HDCP14_AN_L					0x930
+#define HDCP14_STATUS0					0x934
+#define HDCP14_STATUS1					0x938
+/* Scrambler Registers */
+#define SCRAMB_CONFIG0					0x960
+/* Video Configuration Registers */
+#define LINK_CONFIG0					0x968
+#define OPMODE_FRL_4LANES				BIT(8)
+#define OPMODE_DVI					BIT(4)
+#define OPMODE_FRL					BIT(0)
+/* TMDS FIFO Registers */
+#define TMDS_FIFO_CONFIG0				0x970
+#define TMDS_FIFO_CONTROL0				0x974
+/* FRL RSFEC Registers */
+#define FRL_RSFEC_CONFIG0				0xa20
+#define FRL_RSFEC_STATUS0				0xa30
+/* FRL Packetizer Registers */
+#define FRL_PKTZ_CONFIG0				0xa40
+#define FRL_PKTZ_CONTROL0				0xa44
+#define FRL_PKTZ_CONTROL1				0xa50
+#define FRL_PKTZ_STATUS1				0xa54
+/* Packet Scheduler Registers */
+#define PKTSCHED_CONFIG0				0xa80
+#define PKTSCHED_PRQUEUE0_CONFIG0			0xa84
+#define PKTSCHED_PRQUEUE1_CONFIG0			0xa88
+#define PKTSCHED_PRQUEUE2_CONFIG0			0xa8c
+#define PKTSCHED_PRQUEUE2_CONFIG1			0xa90
+#define PKTSCHED_PRQUEUE2_CONFIG2			0xa94
+#define PKTSCHED_PKT_CONFIG0				0xa98
+#define PKTSCHED_PKT_CONFIG1				0xa9c
+#define PKTSCHED_PKT_CONFIG2				0xaa0
+#define PKTSCHED_PKT_CONFIG3				0xaa4
+#define PKTSCHED_PKT_EN					0xaa8
+#define PKTSCHED_DRMI_TX_EN				BIT(17)
+#define PKTSCHED_AUDI_TX_EN				BIT(15)
+#define PKTSCHED_AVI_TX_EN				BIT(13)
+#define PKTSCHED_EMP_CVTEM_TX_EN			BIT(10)
+#define PKTSCHED_AMD_TX_EN				BIT(8)
+#define PKTSCHED_GCP_TX_EN				BIT(3)
+#define PKTSCHED_AUDS_TX_EN				BIT(2)
+#define PKTSCHED_ACR_TX_EN				BIT(1)
+#define PKTSCHED_PKT_CONTROL0				0xaac
+#define PKTSCHED_PKT_SEND				0xab0
+#define PKTSCHED_PKT_STATUS0				0xab4
+#define PKTSCHED_PKT_STATUS1				0xab8
+#define PKT_NULL_CONTENTS0				0xb00
+#define PKT_NULL_CONTENTS1				0xb04
+#define PKT_NULL_CONTENTS2				0xb08
+#define PKT_NULL_CONTENTS3				0xb0c
+#define PKT_NULL_CONTENTS4				0xb10
+#define PKT_NULL_CONTENTS5				0xb14
+#define PKT_NULL_CONTENTS6				0xb18
+#define PKT_NULL_CONTENTS7				0xb1c
+#define PKT_ACP_CONTENTS0				0xb20
+#define PKT_ACP_CONTENTS1				0xb24
+#define PKT_ACP_CONTENTS2				0xb28
+#define PKT_ACP_CONTENTS3				0xb2c
+#define PKT_ACP_CONTENTS4				0xb30
+#define PKT_ACP_CONTENTS5				0xb34
+#define PKT_ACP_CONTENTS6				0xb38
+#define PKT_ACP_CONTENTS7				0xb3c
+#define PKT_ISRC1_CONTENTS0				0xb40
+#define PKT_ISRC1_CONTENTS1				0xb44
+#define PKT_ISRC1_CONTENTS2				0xb48
+#define PKT_ISRC1_CONTENTS3				0xb4c
+#define PKT_ISRC1_CONTENTS4				0xb50
+#define PKT_ISRC1_CONTENTS5				0xb54
+#define PKT_ISRC1_CONTENTS6				0xb58
+#define PKT_ISRC1_CONTENTS7				0xb5c
+#define PKT_ISRC2_CONTENTS0				0xb60
+#define PKT_ISRC2_CONTENTS1				0xb64
+#define PKT_ISRC2_CONTENTS2				0xb68
+#define PKT_ISRC2_CONTENTS3				0xb6c
+#define PKT_ISRC2_CONTENTS4				0xb70
+#define PKT_ISRC2_CONTENTS5				0xb74
+#define PKT_ISRC2_CONTENTS6				0xb78
+#define PKT_ISRC2_CONTENTS7				0xb7c
+#define PKT_GMD_CONTENTS0				0xb80
+#define PKT_GMD_CONTENTS1				0xb84
+#define PKT_GMD_CONTENTS2				0xb88
+#define PKT_GMD_CONTENTS3				0xb8c
+#define PKT_GMD_CONTENTS4				0xb90
+#define PKT_GMD_CONTENTS5				0xb94
+#define PKT_GMD_CONTENTS6				0xb98
+#define PKT_GMD_CONTENTS7				0xb9c
+#define PKT_AMD_CONTENTS0				0xba0
+#define PKT_AMD_CONTENTS1				0xba4
+#define PKT_AMD_CONTENTS2				0xba8
+#define PKT_AMD_CONTENTS3				0xbac
+#define PKT_AMD_CONTENTS4				0xbb0
+#define PKT_AMD_CONTENTS5				0xbb4
+#define PKT_AMD_CONTENTS6				0xbb8
+#define PKT_AMD_CONTENTS7				0xbbc
+#define PKT_VSI_CONTENTS0				0xbc0
+#define PKT_VSI_CONTENTS1				0xbc4
+#define PKT_VSI_CONTENTS2				0xbc8
+#define PKT_VSI_CONTENTS3				0xbcc
+#define PKT_VSI_CONTENTS4				0xbd0
+#define PKT_VSI_CONTENTS5				0xbd4
+#define PKT_VSI_CONTENTS6				0xbd8
+#define PKT_VSI_CONTENTS7				0xbdc
+#define PKT_AVI_CONTENTS0				0xbe0
+#define HDMI_FC_AVICONF0_ACTIVE_FMT_INFO_PRESENT	BIT(4)
+#define HDMI_FC_AVICONF0_BAR_DATA_VERT_BAR		0x04
+#define HDMI_FC_AVICONF0_BAR_DATA_HORIZ_BAR		0x08
+#define HDMI_FC_AVICONF2_IT_CONTENT_VALID		0x80
+#define PKT_AVI_CONTENTS1				0xbe4
+#define PKT_AVI_CONTENTS2				0xbe8
+#define PKT_AVI_CONTENTS3				0xbec
+#define PKT_AVI_CONTENTS4				0xbf0
+#define PKT_AVI_CONTENTS5				0xbf4
+#define PKT_AVI_CONTENTS6				0xbf8
+#define PKT_AVI_CONTENTS7				0xbfc
+#define PKT_SPDI_CONTENTS0				0xc00
+#define PKT_SPDI_CONTENTS1				0xc04
+#define PKT_SPDI_CONTENTS2				0xc08
+#define PKT_SPDI_CONTENTS3				0xc0c
+#define PKT_SPDI_CONTENTS4				0xc10
+#define PKT_SPDI_CONTENTS5				0xc14
+#define PKT_SPDI_CONTENTS6				0xc18
+#define PKT_SPDI_CONTENTS7				0xc1c
+#define PKT_AUDI_CONTENTS0				0xc20
+#define PKT_AUDI_CONTENTS1				0xc24
+#define PKT_AUDI_CONTENTS2				0xc28
+#define PKT_AUDI_CONTENTS3				0xc2c
+#define PKT_AUDI_CONTENTS4				0xc30
+#define PKT_AUDI_CONTENTS5				0xc34
+#define PKT_AUDI_CONTENTS6				0xc38
+#define PKT_AUDI_CONTENTS7				0xc3c
+#define PKT_NVI_CONTENTS0				0xc40
+#define PKT_NVI_CONTENTS1				0xc44
+#define PKT_NVI_CONTENTS2				0xc48
+#define PKT_NVI_CONTENTS3				0xc4c
+#define PKT_NVI_CONTENTS4				0xc50
+#define PKT_NVI_CONTENTS5				0xc54
+#define PKT_NVI_CONTENTS6				0xc58
+#define PKT_NVI_CONTENTS7				0xc5c
+#define PKT_DRMI_CONTENTS0				0xc60
+#define PKT_DRMI_CONTENTS1				0xc64
+#define PKT_DRMI_CONTENTS2				0xc68
+#define PKT_DRMI_CONTENTS3				0xc6c
+#define PKT_DRMI_CONTENTS4				0xc70
+#define PKT_DRMI_CONTENTS5				0xc74
+#define PKT_DRMI_CONTENTS6				0xc78
+#define PKT_DRMI_CONTENTS7				0xc7c
+#define PKT_GHDMI1_CONTENTS0				0xc80
+#define PKT_GHDMI1_CONTENTS1				0xc84
+#define PKT_GHDMI1_CONTENTS2				0xc88
+#define PKT_GHDMI1_CONTENTS3				0xc8c
+#define PKT_GHDMI1_CONTENTS4				0xc90
+#define PKT_GHDMI1_CONTENTS5				0xc94
+#define PKT_GHDMI1_CONTENTS6				0xc98
+#define PKT_GHDMI1_CONTENTS7				0xc9c
+#define PKT_GHDMI2_CONTENTS0				0xca0
+#define PKT_GHDMI2_CONTENTS1				0xca4
+#define PKT_GHDMI2_CONTENTS2				0xca8
+#define PKT_GHDMI2_CONTENTS3				0xcac
+#define PKT_GHDMI2_CONTENTS4				0xcb0
+#define PKT_GHDMI2_CONTENTS5				0xcb4
+#define PKT_GHDMI2_CONTENTS6				0xcb8
+#define PKT_GHDMI2_CONTENTS7				0xcbc
+/* EMP Packetizer Registers */
+#define PKT_EMP_CONFIG0					0xce0
+#define PKT_EMP_CONTROL0				0xcec
+#define PKT_EMP_CONTROL1				0xcf0
+#define PKT_EMP_CONTROL2				0xcf4
+#define PKT_EMP_VTEM_CONTENTS0				0xd00
+#define PKT_EMP_VTEM_CONTENTS1				0xd04
+#define PKT_EMP_VTEM_CONTENTS2				0xd08
+#define PKT_EMP_VTEM_CONTENTS3				0xd0c
+#define PKT_EMP_VTEM_CONTENTS4				0xd10
+#define PKT_EMP_VTEM_CONTENTS5				0xd14
+#define PKT_EMP_VTEM_CONTENTS6				0xd18
+#define PKT_EMP_VTEM_CONTENTS7				0xd1c
+#define PKT0_EMP_CVTEM_CONTENTS0			0xd20
+#define PKT0_EMP_CVTEM_CONTENTS1			0xd24
+#define PKT0_EMP_CVTEM_CONTENTS2			0xd28
+#define PKT0_EMP_CVTEM_CONTENTS3			0xd2c
+#define PKT0_EMP_CVTEM_CONTENTS4			0xd30
+#define PKT0_EMP_CVTEM_CONTENTS5			0xd34
+#define PKT0_EMP_CVTEM_CONTENTS6			0xd38
+#define PKT0_EMP_CVTEM_CONTENTS7			0xd3c
+#define PKT1_EMP_CVTEM_CONTENTS0			0xd40
+#define PKT1_EMP_CVTEM_CONTENTS1			0xd44
+#define PKT1_EMP_CVTEM_CONTENTS2			0xd48
+#define PKT1_EMP_CVTEM_CONTENTS3			0xd4c
+#define PKT1_EMP_CVTEM_CONTENTS4			0xd50
+#define PKT1_EMP_CVTEM_CONTENTS5			0xd54
+#define PKT1_EMP_CVTEM_CONTENTS6			0xd58
+#define PKT1_EMP_CVTEM_CONTENTS7			0xd5c
+#define PKT2_EMP_CVTEM_CONTENTS0			0xd60
+#define PKT2_EMP_CVTEM_CONTENTS1			0xd64
+#define PKT2_EMP_CVTEM_CONTENTS2			0xd68
+#define PKT2_EMP_CVTEM_CONTENTS3			0xd6c
+#define PKT2_EMP_CVTEM_CONTENTS4			0xd70
+#define PKT2_EMP_CVTEM_CONTENTS5			0xd74
+#define PKT2_EMP_CVTEM_CONTENTS6			0xd78
+#define PKT2_EMP_CVTEM_CONTENTS7			0xd7c
+#define PKT3_EMP_CVTEM_CONTENTS0			0xd80
+#define PKT3_EMP_CVTEM_CONTENTS1			0xd84
+#define PKT3_EMP_CVTEM_CONTENTS2			0xd88
+#define PKT3_EMP_CVTEM_CONTENTS3			0xd8c
+#define PKT3_EMP_CVTEM_CONTENTS4			0xd90
+#define PKT3_EMP_CVTEM_CONTENTS5			0xd94
+#define PKT3_EMP_CVTEM_CONTENTS6			0xd98
+#define PKT3_EMP_CVTEM_CONTENTS7			0xd9c
+#define PKT4_EMP_CVTEM_CONTENTS0			0xda0
+#define PKT4_EMP_CVTEM_CONTENTS1			0xda4
+#define PKT4_EMP_CVTEM_CONTENTS2			0xda8
+#define PKT4_EMP_CVTEM_CONTENTS3			0xdac
+#define PKT4_EMP_CVTEM_CONTENTS4			0xdb0
+#define PKT4_EMP_CVTEM_CONTENTS5			0xdb4
+#define PKT4_EMP_CVTEM_CONTENTS6			0xdb8
+#define PKT4_EMP_CVTEM_CONTENTS7			0xdbc
+#define PKT5_EMP_CVTEM_CONTENTS0			0xdc0
+#define PKT5_EMP_CVTEM_CONTENTS1			0xdc4
+#define PKT5_EMP_CVTEM_CONTENTS2			0xdc8
+#define PKT5_EMP_CVTEM_CONTENTS3			0xdcc
+#define PKT5_EMP_CVTEM_CONTENTS4			0xdd0
+#define PKT5_EMP_CVTEM_CONTENTS5			0xdd4
+#define PKT5_EMP_CVTEM_CONTENTS6			0xdd8
+#define PKT5_EMP_CVTEM_CONTENTS7			0xddc
+/* Audio Packetizer Registers */
+#define AUDPKT_CONTROL0					0xe20
+#define AUDPKT_CHSTATUS_OVR_EN_MASK			BIT(0)
+#define AUDPKT_CHSTATUS_OVR_EN				BIT(0)
+#define AUDPKT_CONTROL1					0xe24
+#define AUDPKT_ACR_CONTROL0				0xe40
+#define AUDPKT_ACR_N_VALUE				0xfffff
+#define AUDPKT_ACR_CONTROL1				0xe44
+#define AUDPKT_ACR_CTS_OVR_VAL_MSK			GENMASK(23, 4)
+#define AUDPKT_ACR_CTS_OVR_VAL(x)			((x) << 4)
+#define AUDPKT_ACR_CTS_OVR_EN_MSK			BIT(1)
+#define AUDPKT_ACR_CTS_OVR_EN				BIT(1)
+#define AUDPKT_ACR_STATUS0				0xe4c
+#define AUDPKT_CHSTATUS_OVR0				0xe60
+#define AUDPKT_CHSTATUS_OVR1				0xe64
+/* IEC60958 Byte 3: Sampleing frenuency Bits 24 to 27 */
+#define AUDPKT_CHSTATUS_SR_MASK				GENMASK(3, 0)
+#define AUDPKT_CHSTATUS_SR_22050			0x4
+#define AUDPKT_CHSTATUS_SR_24000			0x6
+#define AUDPKT_CHSTATUS_SR_32000			0x3
+#define AUDPKT_CHSTATUS_SR_44100			0x0
+#define AUDPKT_CHSTATUS_SR_48000			0x2
+#define AUDPKT_CHSTATUS_SR_88200			0x8
+#define AUDPKT_CHSTATUS_SR_96000			0xa
+#define AUDPKT_CHSTATUS_SR_176400			0xc
+#define AUDPKT_CHSTATUS_SR_192000			0xe
+#define AUDPKT_CHSTATUS_SR_768000			0x9
+#define AUDPKT_CHSTATUS_SR_NOT_INDICATED		0x1
+/* IEC60958 Byte 4: Original Sampleing frenuency Bits 36 to 39 */
+#define AUDPKT_CHSTATUS_0SR_MASK			GENMASK(15, 12)
+#define AUDPKT_CHSTATUS_OSR_8000			0x6
+#define AUDPKT_CHSTATUS_OSR_11025			0xa
+#define AUDPKT_CHSTATUS_OSR_12000			0x2
+#define AUDPKT_CHSTATUS_OSR_16000			0x8
+#define AUDPKT_CHSTATUS_OSR_22050			0xb
+#define AUDPKT_CHSTATUS_OSR_24000			0x9
+#define AUDPKT_CHSTATUS_OSR_32000			0xc
+#define AUDPKT_CHSTATUS_OSR_44100			0xf
+#define AUDPKT_CHSTATUS_OSR_48000			0xd
+#define AUDPKT_CHSTATUS_OSR_88200			0x7
+#define AUDPKT_CHSTATUS_OSR_96000			0x5
+#define AUDPKT_CHSTATUS_OSR_176400			0x3
+#define AUDPKT_CHSTATUS_OSR_192000			0x1
+#define AUDPKT_CHSTATUS_OSR_NOT_INDICATED		0x0
+#define AUDPKT_CHSTATUS_OVR2				0xe68
+#define AUDPKT_CHSTATUS_OVR3				0xe6c
+#define AUDPKT_CHSTATUS_OVR4				0xe70
+#define AUDPKT_CHSTATUS_OVR5				0xe74
+#define AUDPKT_CHSTATUS_OVR6				0xe78
+#define AUDPKT_CHSTATUS_OVR7				0xe7c
+#define AUDPKT_CHSTATUS_OVR8				0xe80
+#define AUDPKT_CHSTATUS_OVR9				0xe84
+#define AUDPKT_CHSTATUS_OVR10				0xe88
+#define AUDPKT_CHSTATUS_OVR11				0xe8c
+#define AUDPKT_CHSTATUS_OVR12				0xe90
+#define AUDPKT_CHSTATUS_OVR13				0xe94
+#define AUDPKT_CHSTATUS_OVR14				0xe98
+#define AUDPKT_USRDATA_OVR_MSG_GENERIC0			0xea0
+#define AUDPKT_USRDATA_OVR_MSG_GENERIC1			0xea4
+#define AUDPKT_USRDATA_OVR_MSG_GENERIC2			0xea8
+#define AUDPKT_USRDATA_OVR_MSG_GENERIC3			0xeac
+#define AUDPKT_USRDATA_OVR_MSG_GENERIC4			0xeb0
+#define AUDPKT_USRDATA_OVR_MSG_GENERIC5			0xeb4
+#define AUDPKT_USRDATA_OVR_MSG_GENERIC6			0xeb8
+#define AUDPKT_USRDATA_OVR_MSG_GENERIC7			0xebc
+#define AUDPKT_USRDATA_OVR_MSG_GENERIC8			0xec0
+#define AUDPKT_USRDATA_OVR_MSG_GENERIC9			0xec4
+#define AUDPKT_USRDATA_OVR_MSG_GENERIC10		0xec8
+#define AUDPKT_USRDATA_OVR_MSG_GENERIC11		0xecc
+#define AUDPKT_USRDATA_OVR_MSG_GENERIC12		0xed0
+#define AUDPKT_USRDATA_OVR_MSG_GENERIC13		0xed4
+#define AUDPKT_USRDATA_OVR_MSG_GENERIC14		0xed8
+#define AUDPKT_USRDATA_OVR_MSG_GENERIC15		0xedc
+#define AUDPKT_USRDATA_OVR_MSG_GENERIC16		0xee0
+#define AUDPKT_USRDATA_OVR_MSG_GENERIC17		0xee4
+#define AUDPKT_USRDATA_OVR_MSG_GENERIC18		0xee8
+#define AUDPKT_USRDATA_OVR_MSG_GENERIC19		0xeec
+#define AUDPKT_USRDATA_OVR_MSG_GENERIC20		0xef0
+#define AUDPKT_USRDATA_OVR_MSG_GENERIC21		0xef4
+#define AUDPKT_USRDATA_OVR_MSG_GENERIC22		0xef8
+#define AUDPKT_USRDATA_OVR_MSG_GENERIC23		0xefc
+#define AUDPKT_USRDATA_OVR_MSG_GENERIC24		0xf00
+#define AUDPKT_USRDATA_OVR_MSG_GENERIC25		0xf04
+#define AUDPKT_USRDATA_OVR_MSG_GENERIC26		0xf08
+#define AUDPKT_USRDATA_OVR_MSG_GENERIC27		0xf0c
+#define AUDPKT_USRDATA_OVR_MSG_GENERIC28		0xf10
+#define AUDPKT_USRDATA_OVR_MSG_GENERIC29		0xf14
+#define AUDPKT_USRDATA_OVR_MSG_GENERIC30		0xf18
+#define AUDPKT_USRDATA_OVR_MSG_GENERIC31		0xf1c
+#define AUDPKT_USRDATA_OVR_MSG_GENERIC32		0xf20
+#define AUDPKT_VBIT_OVR0				0xf24
+/* CEC Registers */
+#define CEC_TX_CONTROL					0x1000
+#define CEC_STATUS					0x1004
+#define CEC_CONFIG					0x1008
+#define CEC_ADDR					0x100c
+#define CEC_TX_COUNT					0x1020
+#define CEC_TX_DATA3_0					0x1024
+#define CEC_TX_DATA7_4					0x1028
+#define CEC_TX_DATA11_8					0x102c
+#define CEC_TX_DATA15_12				0x1030
+#define CEC_RX_COUNT_STATUS				0x1040
+#define CEC_RX_DATA3_0					0x1044
+#define CEC_RX_DATA7_4					0x1048
+#define CEC_RX_DATA11_8					0x104c
+#define CEC_RX_DATA15_12				0x1050
+#define CEC_LOCK_CONTROL				0x1054
+#define CEC_RXQUAL_BITTIME_CONFIG			0x1060
+#define CEC_RX_BITTIME_CONFIG				0x1064
+#define CEC_TX_BITTIME_CONFIG				0x1068
+/* eARC RX CMDC Registers */
+#define EARCRX_CMDC_CONFIG0				0x1800
+#define EARCRX_XACTREAD_STOP_CFG			BIT(26)
+#define EARCRX_XACTREAD_RETRY_CFG			BIT(25)
+#define EARCRX_CMDC_DSCVR_EARCVALID0_TO_DISC1		BIT(24)
+#define EARCRX_CMDC_XACT_RESTART_EN			BIT(18)
+#define EARCRX_CMDC_CONFIG1				0x1804
+#define EARCRX_CMDC_CONTROL				0x1808
+#define EARCRX_CMDC_HEARTBEAT_LOSS_EN			BIT(4)
+#define EARCRX_CMDC_DISCOVERY_EN			BIT(3)
+#define EARCRX_CONNECTOR_HPD				BIT(1)
+#define EARCRX_CMDC_WHITELIST0_CONFIG			0x180c
+#define EARCRX_CMDC_WHITELIST1_CONFIG			0x1810
+#define EARCRX_CMDC_WHITELIST2_CONFIG			0x1814
+#define EARCRX_CMDC_WHITELIST3_CONFIG			0x1818
+#define EARCRX_CMDC_STATUS				0x181c
+#define EARCRX_CMDC_XACT_INFO				0x1820
+#define EARCRX_CMDC_XACT_ACTION				0x1824
+#define EARCRX_CMDC_HEARTBEAT_RXSTAT_SE			0x1828
+#define EARCRX_CMDC_HEARTBEAT_STATUS			0x182c
+#define EARCRX_CMDC_XACT_WR0				0x1840
+#define EARCRX_CMDC_XACT_WR1				0x1844
+#define EARCRX_CMDC_XACT_WR2				0x1848
+#define EARCRX_CMDC_XACT_WR3				0x184c
+#define EARCRX_CMDC_XACT_WR4				0x1850
+#define EARCRX_CMDC_XACT_WR5				0x1854
+#define EARCRX_CMDC_XACT_WR6				0x1858
+#define EARCRX_CMDC_XACT_WR7				0x185c
+#define EARCRX_CMDC_XACT_WR8				0x1860
+#define EARCRX_CMDC_XACT_WR9				0x1864
+#define EARCRX_CMDC_XACT_WR10				0x1868
+#define EARCRX_CMDC_XACT_WR11				0x186c
+#define EARCRX_CMDC_XACT_WR12				0x1870
+#define EARCRX_CMDC_XACT_WR13				0x1874
+#define EARCRX_CMDC_XACT_WR14				0x1878
+#define EARCRX_CMDC_XACT_WR15				0x187c
+#define EARCRX_CMDC_XACT_WR16				0x1880
+#define EARCRX_CMDC_XACT_WR17				0x1884
+#define EARCRX_CMDC_XACT_WR18				0x1888
+#define EARCRX_CMDC_XACT_WR19				0x188c
+#define EARCRX_CMDC_XACT_WR20				0x1890
+#define EARCRX_CMDC_XACT_WR21				0x1894
+#define EARCRX_CMDC_XACT_WR22				0x1898
+#define EARCRX_CMDC_XACT_WR23				0x189c
+#define EARCRX_CMDC_XACT_WR24				0x18a0
+#define EARCRX_CMDC_XACT_WR25				0x18a4
+#define EARCRX_CMDC_XACT_WR26				0x18a8
+#define EARCRX_CMDC_XACT_WR27				0x18ac
+#define EARCRX_CMDC_XACT_WR28				0x18b0
+#define EARCRX_CMDC_XACT_WR29				0x18b4
+#define EARCRX_CMDC_XACT_WR30				0x18b8
+#define EARCRX_CMDC_XACT_WR31				0x18bc
+#define EARCRX_CMDC_XACT_WR32				0x18c0
+#define EARCRX_CMDC_XACT_WR33				0x18c4
+#define EARCRX_CMDC_XACT_WR34				0x18c8
+#define EARCRX_CMDC_XACT_WR35				0x18cc
+#define EARCRX_CMDC_XACT_WR36				0x18d0
+#define EARCRX_CMDC_XACT_WR37				0x18d4
+#define EARCRX_CMDC_XACT_WR38				0x18d8
+#define EARCRX_CMDC_XACT_WR39				0x18dc
+#define EARCRX_CMDC_XACT_WR40				0x18e0
+#define EARCRX_CMDC_XACT_WR41				0x18e4
+#define EARCRX_CMDC_XACT_WR42				0x18e8
+#define EARCRX_CMDC_XACT_WR43				0x18ec
+#define EARCRX_CMDC_XACT_WR44				0x18f0
+#define EARCRX_CMDC_XACT_WR45				0x18f4
+#define EARCRX_CMDC_XACT_WR46				0x18f8
+#define EARCRX_CMDC_XACT_WR47				0x18fc
+#define EARCRX_CMDC_XACT_WR48				0x1900
+#define EARCRX_CMDC_XACT_WR49				0x1904
+#define EARCRX_CMDC_XACT_WR50				0x1908
+#define EARCRX_CMDC_XACT_WR51				0x190c
+#define EARCRX_CMDC_XACT_WR52				0x1910
+#define EARCRX_CMDC_XACT_WR53				0x1914
+#define EARCRX_CMDC_XACT_WR54				0x1918
+#define EARCRX_CMDC_XACT_WR55				0x191c
+#define EARCRX_CMDC_XACT_WR56				0x1920
+#define EARCRX_CMDC_XACT_WR57				0x1924
+#define EARCRX_CMDC_XACT_WR58				0x1928
+#define EARCRX_CMDC_XACT_WR59				0x192c
+#define EARCRX_CMDC_XACT_WR60				0x1930
+#define EARCRX_CMDC_XACT_WR61				0x1934
+#define EARCRX_CMDC_XACT_WR62				0x1938
+#define EARCRX_CMDC_XACT_WR63				0x193c
+#define EARCRX_CMDC_XACT_WR64				0x1940
+#define EARCRX_CMDC_XACT_RD0				0x1960
+#define EARCRX_CMDC_XACT_RD1				0x1964
+#define EARCRX_CMDC_XACT_RD2				0x1968
+#define EARCRX_CMDC_XACT_RD3				0x196c
+#define EARCRX_CMDC_XACT_RD4				0x1970
+#define EARCRX_CMDC_XACT_RD5				0x1974
+#define EARCRX_CMDC_XACT_RD6				0x1978
+#define EARCRX_CMDC_XACT_RD7				0x197c
+#define EARCRX_CMDC_XACT_RD8				0x1980
+#define EARCRX_CMDC_XACT_RD9				0x1984
+#define EARCRX_CMDC_XACT_RD10				0x1988
+#define EARCRX_CMDC_XACT_RD11				0x198c
+#define EARCRX_CMDC_XACT_RD12				0x1990
+#define EARCRX_CMDC_XACT_RD13				0x1994
+#define EARCRX_CMDC_XACT_RD14				0x1998
+#define EARCRX_CMDC_XACT_RD15				0x199c
+#define EARCRX_CMDC_XACT_RD16				0x19a0
+#define EARCRX_CMDC_XACT_RD17				0x19a4
+#define EARCRX_CMDC_XACT_RD18				0x19a8
+#define EARCRX_CMDC_XACT_RD19				0x19ac
+#define EARCRX_CMDC_XACT_RD20				0x19b0
+#define EARCRX_CMDC_XACT_RD21				0x19b4
+#define EARCRX_CMDC_XACT_RD22				0x19b8
+#define EARCRX_CMDC_XACT_RD23				0x19bc
+#define EARCRX_CMDC_XACT_RD24				0x19c0
+#define EARCRX_CMDC_XACT_RD25				0x19c4
+#define EARCRX_CMDC_XACT_RD26				0x19c8
+#define EARCRX_CMDC_XACT_RD27				0x19cc
+#define EARCRX_CMDC_XACT_RD28				0x19d0
+#define EARCRX_CMDC_XACT_RD29				0x19d4
+#define EARCRX_CMDC_XACT_RD30				0x19d8
+#define EARCRX_CMDC_XACT_RD31				0x19dc
+#define EARCRX_CMDC_XACT_RD32				0x19e0
+#define EARCRX_CMDC_XACT_RD33				0x19e4
+#define EARCRX_CMDC_XACT_RD34				0x19e8
+#define EARCRX_CMDC_XACT_RD35				0x19ec
+#define EARCRX_CMDC_XACT_RD36				0x19f0
+#define EARCRX_CMDC_XACT_RD37				0x19f4
+#define EARCRX_CMDC_XACT_RD38				0x19f8
+#define EARCRX_CMDC_XACT_RD39				0x19fc
+#define EARCRX_CMDC_XACT_RD40				0x1a00
+#define EARCRX_CMDC_XACT_RD41				0x1a04
+#define EARCRX_CMDC_XACT_RD42				0x1a08
+#define EARCRX_CMDC_XACT_RD43				0x1a0c
+#define EARCRX_CMDC_XACT_RD44				0x1a10
+#define EARCRX_CMDC_XACT_RD45				0x1a14
+#define EARCRX_CMDC_XACT_RD46				0x1a18
+#define EARCRX_CMDC_XACT_RD47				0x1a1c
+#define EARCRX_CMDC_XACT_RD48				0x1a20
+#define EARCRX_CMDC_XACT_RD49				0x1a24
+#define EARCRX_CMDC_XACT_RD50				0x1a28
+#define EARCRX_CMDC_XACT_RD51				0x1a2c
+#define EARCRX_CMDC_XACT_RD52				0x1a30
+#define EARCRX_CMDC_XACT_RD53				0x1a34
+#define EARCRX_CMDC_XACT_RD54				0x1a38
+#define EARCRX_CMDC_XACT_RD55				0x1a3c
+#define EARCRX_CMDC_XACT_RD56				0x1a40
+#define EARCRX_CMDC_XACT_RD57				0x1a44
+#define EARCRX_CMDC_XACT_RD58				0x1a48
+#define EARCRX_CMDC_XACT_RD59				0x1a4c
+#define EARCRX_CMDC_XACT_RD60				0x1a50
+#define EARCRX_CMDC_XACT_RD61				0x1a54
+#define EARCRX_CMDC_XACT_RD62				0x1a58
+#define EARCRX_CMDC_XACT_RD63				0x1a5c
+#define EARCRX_CMDC_XACT_RD64				0x1a60
+#define EARCRX_CMDC_SYNC_CONFIG				0x1b00
+/* eARC RX DMAC Registers */
+#define EARCRX_DMAC_PHY_CONTROL				0x1c00
+#define EARCRX_DMAC_CONFIG				0x1c08
+#define EARCRX_DMAC_CONTROL0				0x1c0c
+#define EARCRX_DMAC_AUDIO_EN				BIT(1)
+#define EARCRX_DMAC_EN					BIT(0)
+#define EARCRX_DMAC_CONTROL1				0x1c10
+#define EARCRX_DMAC_STATUS				0x1c14
+#define EARCRX_DMAC_CHSTATUS0				0x1c18
+#define EARCRX_DMAC_CHSTATUS1				0x1c1c
+#define EARCRX_DMAC_CHSTATUS2				0x1c20
+#define EARCRX_DMAC_CHSTATUS3				0x1c24
+#define EARCRX_DMAC_CHSTATUS4				0x1c28
+#define EARCRX_DMAC_CHSTATUS5				0x1c2c
+#define EARCRX_DMAC_USRDATA_MSG_HDMI_AC0		0x1c30
+#define EARCRX_DMAC_USRDATA_MSG_HDMI_AC1		0x1c34
+#define EARCRX_DMAC_USRDATA_MSG_HDMI_AC2		0x1c38
+#define EARCRX_DMAC_USRDATA_MSG_HDMI_AC3		0x1c3c
+#define EARCRX_DMAC_USRDATA_MSG_HDMI_AC4		0x1c40
+#define EARCRX_DMAC_USRDATA_MSG_HDMI_AC5		0x1c44
+#define EARCRX_DMAC_USRDATA_MSG_HDMI_AC6		0x1c48
+#define EARCRX_DMAC_USRDATA_MSG_HDMI_AC7		0x1c4c
+#define EARCRX_DMAC_USRDATA_MSG_HDMI_AC8		0x1c50
+#define EARCRX_DMAC_USRDATA_MSG_HDMI_AC9		0x1c54
+#define EARCRX_DMAC_USRDATA_MSG_HDMI_AC10		0x1c58
+#define EARCRX_DMAC_USRDATA_MSG_HDMI_AC11		0x1c5c
+#define EARCRX_DMAC_USRDATA_MSG_HDMI_ISRC1_PKT0		0x1c60
+#define EARCRX_DMAC_USRDATA_MSG_HDMI_ISRC1_PKT1		0x1c64
+#define EARCRX_DMAC_USRDATA_MSG_HDMI_ISRC1_PKT2		0x1c68
+#define EARCRX_DMAC_USRDATA_MSG_HDMI_ISRC1_PKT3		0x1c6c
+#define EARCRX_DMAC_USRDATA_MSG_HDMI_ISRC1_PKT4		0x1c70
+#define EARCRX_DMAC_USRDATA_MSG_HDMI_ISRC1_PKT5		0x1c74
+#define EARCRX_DMAC_USRDATA_MSG_HDMI_ISRC1_PKT6		0x1c78
+#define EARCRX_DMAC_USRDATA_MSG_HDMI_ISRC1_PKT7		0x1c7c
+#define EARCRX_DMAC_USRDATA_MSG_HDMI_ISRC1_PKT8		0x1c80
+#define EARCRX_DMAC_USRDATA_MSG_HDMI_ISRC1_PKT9		0x1c84
+#define EARCRX_DMAC_USRDATA_MSG_HDMI_ISRC1_PKT10	0x1c88
+#define EARCRX_DMAC_USRDATA_MSG_HDMI_ISRC1_PKT11	0x1c8c
+#define EARCRX_DMAC_USRDATA_MSG_HDMI_ISRC2_PKT0		0x1c90
+#define EARCRX_DMAC_USRDATA_MSG_HDMI_ISRC2_PKT1		0x1c94
+#define EARCRX_DMAC_USRDATA_MSG_HDMI_ISRC2_PKT2		0x1c98
+#define EARCRX_DMAC_USRDATA_MSG_HDMI_ISRC2_PKT3		0x1c9c
+#define EARCRX_DMAC_USRDATA_MSG_HDMI_ISRC2_PKT4		0x1ca0
+#define EARCRX_DMAC_USRDATA_MSG_HDMI_ISRC2_PKT5		0x1ca4
+#define EARCRX_DMAC_USRDATA_MSG_HDMI_ISRC2_PKT6		0x1ca8
+#define EARCRX_DMAC_USRDATA_MSG_HDMI_ISRC2_PKT7		0x1cac
+#define EARCRX_DMAC_USRDATA_MSG_HDMI_ISRC2_PKT8		0x1cb0
+#define EARCRX_DMAC_USRDATA_MSG_HDMI_ISRC2_PKT9		0x1cb4
+#define EARCRX_DMAC_USRDATA_MSG_HDMI_ISRC2_PKT10	0x1cb8
+#define EARCRX_DMAC_USRDATA_MSG_HDMI_ISRC2_PKT11	0x1cbc
+#define EARCRX_DMAC_USRDATA_MSG_GENERIC0		0x1cc0
+#define EARCRX_DMAC_USRDATA_MSG_GENERIC1		0x1cc4
+#define EARCRX_DMAC_USRDATA_MSG_GENERIC2		0x1cc8
+#define EARCRX_DMAC_USRDATA_MSG_GENERIC3		0x1ccc
+#define EARCRX_DMAC_USRDATA_MSG_GENERIC4		0x1cd0
+#define EARCRX_DMAC_USRDATA_MSG_GENERIC5		0x1cd4
+#define EARCRX_DMAC_USRDATA_MSG_GENERIC6		0x1cd8
+#define EARCRX_DMAC_USRDATA_MSG_GENERIC7		0x1cdc
+#define EARCRX_DMAC_USRDATA_MSG_GENERIC8		0x1ce0
+#define EARCRX_DMAC_USRDATA_MSG_GENERIC9		0x1ce4
+#define EARCRX_DMAC_USRDATA_MSG_GENERIC10		0x1ce8
+#define EARCRX_DMAC_USRDATA_MSG_GENERIC11		0x1cec
+#define EARCRX_DMAC_USRDATA_MSG_GENERIC12		0x1cf0
+#define EARCRX_DMAC_USRDATA_MSG_GENERIC13		0x1cf4
+#define EARCRX_DMAC_USRDATA_MSG_GENERIC14		0x1cf8
+#define EARCRX_DMAC_USRDATA_MSG_GENERIC15		0x1cfc
+#define EARCRX_DMAC_USRDATA_MSG_GENERIC16		0x1d00
+#define EARCRX_DMAC_USRDATA_MSG_GENERIC17		0x1d04
+#define EARCRX_DMAC_USRDATA_MSG_GENERIC18		0x1d08
+#define EARCRX_DMAC_USRDATA_MSG_GENERIC19		0x1d0c
+#define EARCRX_DMAC_USRDATA_MSG_GENERIC20		0x1d10
+#define EARCRX_DMAC_USRDATA_MSG_GENERIC21		0x1d14
+#define EARCRX_DMAC_USRDATA_MSG_GENERIC22		0x1d18
+#define EARCRX_DMAC_USRDATA_MSG_GENERIC23		0x1d1c
+#define EARCRX_DMAC_USRDATA_MSG_GENERIC24		0x1d20
+#define EARCRX_DMAC_USRDATA_MSG_GENERIC25		0x1d24
+#define EARCRX_DMAC_USRDATA_MSG_GENERIC26		0x1d28
+#define EARCRX_DMAC_USRDATA_MSG_GENERIC27		0x1d2c
+#define EARCRX_DMAC_USRDATA_MSG_GENERIC28		0x1d30
+#define EARCRX_DMAC_USRDATA_MSG_GENERIC29		0x1d34
+#define EARCRX_DMAC_USRDATA_MSG_GENERIC30		0x1d38
+#define EARCRX_DMAC_USRDATA_MSG_GENERIC31		0x1d3c
+#define EARCRX_DMAC_USRDATA_MSG_GENERIC32		0x1d40
+#define EARCRX_DMAC_CHSTATUS_STREAMER0			0x1d44
+#define EARCRX_DMAC_CHSTATUS_STREAMER1			0x1d48
+#define EARCRX_DMAC_CHSTATUS_STREAMER2			0x1d4c
+#define EARCRX_DMAC_CHSTATUS_STREAMER3			0x1d50
+#define EARCRX_DMAC_CHSTATUS_STREAMER4			0x1d54
+#define EARCRX_DMAC_CHSTATUS_STREAMER5			0x1d58
+#define EARCRX_DMAC_CHSTATUS_STREAMER6			0x1d5c
+#define EARCRX_DMAC_CHSTATUS_STREAMER7			0x1d60
+#define EARCRX_DMAC_CHSTATUS_STREAMER8			0x1d64
+#define EARCRX_DMAC_CHSTATUS_STREAMER9			0x1d68
+#define EARCRX_DMAC_CHSTATUS_STREAMER10			0x1d6c
+#define EARCRX_DMAC_CHSTATUS_STREAMER11			0x1d70
+#define EARCRX_DMAC_CHSTATUS_STREAMER12			0x1d74
+#define EARCRX_DMAC_CHSTATUS_STREAMER13			0x1d78
+#define EARCRX_DMAC_CHSTATUS_STREAMER14			0x1d7c
+#define EARCRX_DMAC_USRDATA_STREAMER0			0x1d80
+/* Main Unit Interrupt Registers */
+#define MAIN_INTVEC_INDEX				0x3000
+#define MAINUNIT_0_INT_STATUS				0x3010
+#define MAINUNIT_0_INT_MASK_N				0x3014
+#define MAINUNIT_0_INT_CLEAR				0x3018
+#define MAINUNIT_0_INT_FORCE				0x301c
+#define MAINUNIT_1_INT_STATUS				0x3020
+#define FLT_EXIT_TO_LTSL_IRQ				BIT(22)
+#define FLT_EXIT_TO_LTS4_IRQ				BIT(21)
+#define FLT_EXIT_TO_LTSP_IRQ				BIT(20)
+#define SCDC_NACK_RCVD_IRQ				BIT(12)
+#define SCDC_RR_REPLY_STOP_IRQ				BIT(11)
+#define SCDC_UPD_FLAGS_CLR_IRQ				BIT(10)
+#define SCDC_UPD_FLAGS_CHG_IRQ				BIT(9)
+#define SCDC_UPD_FLAGS_RD_IRQ				BIT(8)
+#define I2CM_NACK_RCVD_IRQ				BIT(2)
+#define I2CM_READ_REQUEST_IRQ				BIT(1)
+#define I2CM_OP_DONE_IRQ				BIT(0)
+#define MAINUNIT_1_INT_MASK_N				0x3024
+#define I2CM_NACK_RCVD_MASK_N				BIT(2)
+#define I2CM_READ_REQUEST_MASK_N			BIT(1)
+#define I2CM_OP_DONE_MASK_N				BIT(0)
+#define MAINUNIT_1_INT_CLEAR				0x3028
+#define I2CM_NACK_RCVD_CLEAR				BIT(2)
+#define I2CM_READ_REQUEST_CLEAR				BIT(1)
+#define I2CM_OP_DONE_CLEAR				BIT(0)
+#define MAINUNIT_1_INT_FORCE				0x302c
+/* AVPUNIT Interrupt Registers */
+#define AVP_INTVEC_INDEX				0x3800
+#define AVP_0_INT_STATUS				0x3810
+#define AVP_0_INT_MASK_N				0x3814
+#define AVP_0_INT_CLEAR					0x3818
+#define AVP_0_INT_FORCE					0x381c
+#define AVP_1_INT_STATUS				0x3820
+#define AVP_1_INT_MASK_N				0x3824
+#define HDCP14_AUTH_CHG_MASK_N				BIT(6)
+#define AVP_1_INT_CLEAR					0x3828
+#define AVP_1_INT_FORCE					0x382c
+#define AVP_2_INT_STATUS				0x3830
+#define AVP_2_INT_MASK_N				0x3834
+#define AVP_2_INT_CLEAR					0x3838
+#define AVP_2_INT_FORCE					0x383c
+#define AVP_3_INT_STATUS				0x3840
+#define AVP_3_INT_MASK_N				0x3844
+#define AVP_3_INT_CLEAR					0x3848
+#define AVP_3_INT_FORCE					0x384c
+#define AVP_4_INT_STATUS				0x3850
+#define AVP_4_INT_MASK_N				0x3854
+#define AVP_4_INT_CLEAR					0x3858
+#define AVP_4_INT_FORCE					0x385c
+#define AVP_5_INT_STATUS				0x3860
+#define AVP_5_INT_MASK_N				0x3864
+#define AVP_5_INT_CLEAR					0x3868
+#define AVP_5_INT_FORCE					0x386c
+#define AVP_6_INT_STATUS				0x3870
+#define AVP_6_INT_MASK_N				0x3874
+#define AVP_6_INT_CLEAR					0x3878
+#define AVP_6_INT_FORCE					0x387c
+/* CEC Interrupt Registers */
+#define CEC_INT_STATUS					0x4000
+#define CEC_INT_MASK_N					0x4004
+#define CEC_INT_CLEAR					0x4008
+#define CEC_INT_FORCE					0x400c
+/* eARC RX Interrupt Registers  */
+#define EARCRX_INTVEC_INDEX				0x4800
+#define EARCRX_0_INT_STATUS				0x4810
+#define EARCRX_CMDC_DISCOVERY_TIMEOUT_IRQ		BIT(9)
+#define EARCRX_CMDC_DISCOVERY_DONE_IRQ			BIT(8)
+#define EARCRX_0_INT_MASK_N				0x4814
+#define EARCRX_0_INT_CLEAR				0x4818
+#define EARCRX_0_INT_FORCE				0x481c
+#define EARCRX_1_INT_STATUS				0x4820
+#define EARCRX_1_INT_MASK_N				0x4824
+#define EARCRX_1_INT_CLEAR				0x4828
+#define EARCRX_1_INT_FORCE				0x482c
+
+/* SCDC Registers */
+#define SCDC_SINK_VERSION 0x01
+#define SCDC_SOURCE_VERSION 0x02
+
+#define SCDC_UPDATE_0 0x10
+#define SCDC_READ_REQUEST_TEST BIT(2)
+#define SCDC_CED_UPDATE BIT(1)
+#define SCDC_STATUS_UPDATE BIT(0)
+#define SCDC_UPDATE_1 0x11
+
+#define SCDC_TMDS_CONFIG 0x20
+#define SCDC_TMDS_BIT_CLOCK_RATIO_BY_40 BIT(1)
+#define SCDC_TMDS_BIT_CLOCK_RATIO_BY_10 (0 << 1)
+#define SCDC_SCRAMBLING_ENABLE BIT(0)
+#define SCDC_SCRAMBLER_STATUS 0x21
+#define SCDC_SCRAMBLING_STATUS BIT(0)
+
+#define SCDC_CONFIG_0 0x30
+#define SCDC_READ_REQUEST_ENABLE BIT(0)
+
+#define SCDC_STATUS_FLAGS_0 0x40
+#define SCDC_CH2_LOCK BIT(3)
+#define SCDC_CH1_LOCK BIT(2)
+#define SCDC_CH0_LOCK BIT(1)
+#define SCDC_CH_LOCK_MASK (SCDC_CH2_LOCK | SCDC_CH1_LOCK | SCDC_CH0_LOCK)
+#define SCDC_CLOCK_DETECT BIT(0)
+#define SCDC_STATUS_FLAGS_1 0x41
+
+#define SCDC_ERR_DET_0_L 0x50
+#define SCDC_ERR_DET_0_H 0x51
+#define SCDC_ERR_DET_1_L 0x52
+#define SCDC_ERR_DET_1_H 0x53
+#define SCDC_ERR_DET_2_L 0x54
+#define SCDC_ERR_DET_2_H 0x55
+#define SCDC_CHANNEL_VALID BIT(7)
+#define SCDC_ERR_DET_CHECKSUM 0x56
+
+#define SCDC_TEST_CONFIG_0 0xc0
+#define SCDC_TEST_READ_REQUEST BIT(7)
+#define SCDC_TEST_READ_REQUEST_DELAY(x) ((x) & 0x7f)
+
+#define SCDC_MANUFACTURER_IEEE_OUI 0xd0
+#define SCDC_MANUFACTURER_IEEE_OUI_SIZE 3
+#define SCDC_DEVICE_ID 0xd3
+#define SCDC_DEVICE_ID_SIZE 8
+#define SCDC_DEVICE_HARDWARE_REVISION 0xdb
+#define SCDC_DEVICE_HARDWARE_REVISION_MAJOR(x) (((x) >> 4) & 0xf)
+#define SCDC_DEVICE_HARDWARE_REVISION_MINOR(x) (((x) >> 0) & 0xf)
+#define SCDC_DEVICE_SOFTWARE_MAJOR_REVISION 0xdc
+#define SCDC_DEVICE_SOFTWARE_MINOR_REVISION 0xdd
+
+#define SCDC_MANUFACTURER_SPECIFIC 0xde
+#define SCDC_MANUFACTURER_SPECIFIC_SIZE 34
+
+enum v4l2_ycbcr_encoding {
+	/*
+	 * Mapping of V4L2_YCBCR_ENC_DEFAULT to actual encodings for the
+	 * various colorspaces:
+	 *
+	 * V4L2_COLORSPACE_SMPTE170M, V4L2_COLORSPACE_470_SYSTEM_M,
+	 * V4L2_COLORSPACE_470_SYSTEM_BG, V4L2_COLORSPACE_ADOBERGB and
+	 * V4L2_COLORSPACE_JPEG: V4L2_YCBCR_ENC_601
+	 *
+	 * V4L2_COLORSPACE_REC709 and V4L2_COLORSPACE_DCI_P3: V4L2_YCBCR_ENC_709
+	 *
+	 * V4L2_COLORSPACE_SRGB: V4L2_YCBCR_ENC_SYCC
+	 *
+	 * V4L2_COLORSPACE_BT2020: V4L2_YCBCR_ENC_BT2020
+	 *
+	 * V4L2_COLORSPACE_SMPTE240M: V4L2_YCBCR_ENC_SMPTE240M
+	 */
+	V4L2_YCBCR_ENC_DEFAULT        = 0,
+
+	/* ITU-R 601 -- SDTV */
+	V4L2_YCBCR_ENC_601            = 1,
+
+	/* Rec. 709 -- HDTV */
+	V4L2_YCBCR_ENC_709            = 2,
+
+	/* ITU-R 601/EN 61966-2-4 Extended Gamut -- SDTV */
+	V4L2_YCBCR_ENC_XV601          = 3,
+
+	/* Rec. 709/EN 61966-2-4 Extended Gamut -- HDTV */
+	V4L2_YCBCR_ENC_XV709          = 4,
+
+	/* sYCC (Y'CbCr encoding of sRGB) */
+	V4L2_YCBCR_ENC_SYCC           = 5,
+
+	/* BT.2020 Non-constant Luminance Y'CbCr */
+	V4L2_YCBCR_ENC_BT2020         = 6,
+
+	/* BT.2020 Constant Luminance Y'CbcCrc */
+	V4L2_YCBCR_ENC_BT2020_CONST_LUM = 7,
+
+	/* SMPTE 240M -- Obsolete HDTV */
+	V4L2_YCBCR_ENC_SMPTE240M      = 8,
+};
+
+enum drm_connector_status {
+	connector_status_disconnected = 0,
+	connector_status_connected = 1,
+};
+
+void rk3588_set_grf_cfg(void *data);
+void dw_hdmi_qp_set_iomux(void *data);
+struct dw_hdmi_link_config *dw_hdmi_rockchip_get_link_cfg(void *data);
+void dw_hdmi_qp_selete_output(struct hdmi_edid_data *edid_data,
+			      struct connector_state *conn_state,
+			      unsigned int *bus_format,
+			      struct overscan *overscan,
+			      enum dw_hdmi_devtype dev_type,
+			      bool output_bus_format_rgb,
+			      void *data);
+
+#endif /* __DW_HDMI_QP_H__ */
diff --git a/drivers/video/drm/rockchip_dw_hdmi.h b/drivers/video/drm/rockchip_dw_hdmi.h
index aa1201baf0..4071af05a0 100644
--- a/drivers/video/drm/rockchip_dw_hdmi.h
+++ b/drivers/video/drm/rockchip_dw_hdmi.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:	GPL-2.0+
+ * (C) Copyright 2021 Fuzhou Rockchip Electronics Co., Ltd
  */
 #ifndef _ROCKCHIP_DW_HDMI_REG_H_
 #define _ROCKCHIP_DW_HDMI_REG_H_
diff --git a/drivers/video/drm/rockchip_dw_hdmi_qp.c b/drivers/video/drm/rockchip_dw_hdmi_qp.c
new file mode 100644
index 0000000000..ba48a581ad
--- /dev/null
+++ b/drivers/video/drm/rockchip_dw_hdmi_qp.c
@@ -0,0 +1,1330 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2021 Fuzhou Rockchip Electronics Co., Ltd
+ * Author: Algea Cao <algea.cao@rock-chips.com>
+ */
+
+#include <common.h>
+#include <boot_rkimg.h>
+#include <fdtdec.h>
+#include <regmap.h>
+#include <syscon.h>
+#include <asm/arch-rockchip/clock.h>
+#include <asm/io.h>
+#include <asm-generic/gpio.h>
+#include <dm/of_access.h>
+#include <dm/device.h>
+#include <linux/dw_hdmi.h>
+#include <linux/hdmi.h>
+#include <linux/media-bus-format.h>
+#include "rockchip_display.h"
+#include "rockchip_crtc.h"
+#include "rockchip_connector.h"
+#include "rockchip_phy.h"
+#include "dw_hdmi_qp.h"
+#include "rockchip_dw_hdmi_qp.h"
+
+#define HIWORD_UPDATE(val, mask)	((val) | (mask) << 16)
+
+#define RK3588_GRF_SOC_CON2		0x0308
+#define RK3588_HDMI1_HPD_INT_MSK	BIT(15)
+#define RK3588_HDMI1_HPD_INT_CLR	BIT(14)
+#define RK3588_HDMI0_HPD_INT_MSK	BIT(13)
+#define RK3588_HDMI0_HPD_INT_CLR	BIT(12)
+#define RK3588_GRF_SOC_CON7		0x031c
+#define RK3588_SET_HPD_PATH_MASK	(0x3 << 12)
+#define RK3588_GRF_SOC_STATUS1		0x0384
+#define RK3588_HDMI0_LOW_MORETHAN100MS	BIT(20)
+#define RK3588_HDMI0_HPD_PORT_LEVEL	BIT(19)
+#define RK3588_HDMI0_IHPD_PORT		BIT(18)
+#define RK3588_HDMI0_OHPD_INT		BIT(17)
+#define RK3588_HDMI0_LEVEL_INT		BIT(16)
+#define RK3588_HDMI0_INTR_CHANGE_CNT	(0x7 << 13)
+#define RK3588_HDMI1_LOW_MORETHAN100MS	BIT(28)
+#define RK3588_HDMI1_HPD_PORT_LEVEL	BIT(27)
+#define RK3588_HDMI1_IHPD_PORT		BIT(26)
+#define RK3588_HDMI1_OHPD_INT		BIT(25)
+#define RK3588_HDMI1_LEVEL_INT		BIT(24)
+#define RK3588_HDMI1_INTR_CHANGE_CNT	(0x7 << 21)
+
+#define RK3588_GRF_VO1_CON3		0x000c
+#define RK3588_COLOR_FORMAT_MASK	0xf
+#define RK3588_YUV444			0x2
+#define RK3588_YUV420			0x3
+#define RK3588_COMPRESSED_DATA		0xb
+#define RK3588_COLOR_DEPTH_MASK		(0xf << 4)
+#define RK3588_8BPC			(0x5 << 4)
+#define RK3588_10BPC			(0x6 << 4)
+#define RK3588_CECIN_MASK		BIT(8)
+#define RK3588_SCLIN_MASK		BIT(9)
+#define RK3588_SDAIN_MASK		BIT(10)
+#define RK3588_MODE_MASK		BIT(11)
+#define RK3588_COMPRESS_MODE_MASK	BIT(12)
+#define RK3588_I2S_SEL_MASK		BIT(13)
+#define RK3588_SPDIF_SEL_MASK		BIT(14)
+#define RK3588_GRF_VO1_CON4		0x0010
+#define RK3588_HDMI21_MASK		BIT(0)
+#define RK3588_GRF_VO1_CON9		0x0024
+#define RK3588_HDMI0_GRANT_SEL		BIT(10)
+#define RK3588_HDMI0_GRANT_SW		BIT(11)
+#define RK3588_HDMI1_GRANT_SEL		BIT(12)
+#define RK3588_HDMI1_GRANT_SW		BIT(13)
+#define RK3588_GRF_VO1_CON6		0x0018
+#define RK3588_GRF_VO1_CON7		0x001c
+
+#define PPS_TABLE_LEN 8
+
+#define COLOR_DEPTH_10BIT		BIT(31)
+#define HDMI_FRL_MODE			BIT(30)
+#define HDMI_EARC_MODE			BIT(29)
+
+#define HDMI20_MAX_RATE			600000
+#define HDMI_8K60_RATE			2376000
+
+enum device_type {
+	RK3588_HDMI
+};
+
+struct pps_data {
+	u32 pic_width;
+	u32 pic_height;
+	u32 slice_width;
+	u32 slice_height;
+	bool convert_rgb;
+	u8 bpc;
+	u8 bpp;
+	u8 raw_pps[128];
+};
+
+enum hdmi_frl_rate_per_lane {
+	FRL_12G_PER_LANE = 12,
+	FRL_10G_PER_LANE = 10,
+	FRL_8G_PER_LANE = 8,
+	FRL_6G_PER_LANE = 6,
+	FRL_3G_PER_LANE = 3,
+};
+
+struct rockchip_hdmi {
+	int id;
+	struct udevice *dev;
+	struct regmap *regmap;
+	struct regmap *vo1_regmap;
+	void *grf;
+	void *vo1_grf;
+
+	unsigned long bus_format;
+	unsigned long output_bus_format;
+	unsigned long enc_out_encoding;
+
+	u8 max_frl_rate_per_lane;
+	u8 max_lanes;
+	u32 bus_width;
+	struct drm_hdmi_dsc_cap dsc_cap;
+	struct dw_hdmi_link_config link_cfg;
+
+	struct gpio_desc enable_gpio;
+};
+
+/*
+ * Selected Rate Control Related Parameter Recommended Values
+ * from DSC_v1.11 spec & C Model release: DSC_model_20161212
+ */
+static struct pps_data pps_datas[PPS_TABLE_LEN] = {
+	{
+		/* 7680x4320/960X96 rgb 8bpc 12bpp */
+		7680, 4320, 960, 96, 1, 8, 192,
+		{
+			0x12, 0x00, 0x00, 0x8d, 0x30, 0xc0, 0x10, 0xe0,
+			0x1e, 0x00, 0x00, 0x60, 0x03, 0xc0, 0x05, 0xa0,
+			0x01, 0x55, 0x03, 0x90, 0x00, 0x0a, 0x05, 0xc9,
+			0x00, 0xa0, 0x00, 0x0f, 0x01, 0x44, 0x01, 0xaa,
+			0x08, 0x00, 0x10, 0xf4, 0x03, 0x0c, 0x20, 0x00,
+			0x06, 0x0b, 0x0b, 0x33, 0x0e, 0x1c, 0x2a, 0x38,
+			0x46, 0x54, 0x62, 0x69, 0x70, 0x77, 0x79, 0x7b,
+			0x7d, 0x7e, 0x00, 0x82, 0x00, 0xc0, 0x09, 0x00,
+			0x09, 0x7e, 0x19, 0xbc, 0x19, 0xba, 0x19, 0xf8,
+			0x1a, 0x38, 0x1a, 0x38, 0x1a, 0x76, 0x2a, 0x76,
+			0x2a, 0x76, 0x2a, 0x74, 0x3a, 0xb4, 0x52, 0xf4,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+		},
+	},
+	{
+		/* 7680x4320/960X96 rgb 8bpc 11bpp */
+		7680, 4320, 960, 96, 1, 8, 176,
+		{
+			0x12, 0x00, 0x00, 0x8d, 0x30, 0xb0, 0x10, 0xe0,
+			0x1e, 0x00, 0x00, 0x60, 0x03, 0xc0, 0x05, 0x28,
+			0x01, 0x74, 0x03, 0x40, 0x00, 0x0f, 0x06, 0xe0,
+			0x00, 0x2d, 0x00, 0x0f, 0x01, 0x44, 0x01, 0x33,
+			0x0f, 0x00, 0x10, 0xf4, 0x03, 0x0c, 0x20, 0x00,
+			0x06, 0x0b, 0x0b, 0x33, 0x0e, 0x1c, 0x2a, 0x38,
+			0x46, 0x54, 0x62, 0x69, 0x70, 0x77, 0x79, 0x7b,
+			0x7d, 0x7e, 0x00, 0x82, 0x01, 0x00, 0x09, 0x40,
+			0x09, 0xbe, 0x19, 0xfc, 0x19, 0xfa, 0x19, 0xf8,
+			0x1a, 0x38, 0x1a, 0x38, 0x1a, 0x76, 0x2a, 0x76,
+			0x2a, 0x76, 0x2a, 0xb4, 0x3a, 0xb4, 0x52, 0xf4,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+		},
+	},
+	{
+		/* 7680x4320/960X96 rgb 8bpc 10bpp */
+		7680, 4320, 960, 96, 1, 8, 160,
+		{
+			0x12, 0x00, 0x00, 0x8d, 0x30, 0xa0, 0x10, 0xe0,
+			0x1e, 0x00, 0x00, 0x60, 0x03, 0xc0, 0x04, 0xb0,
+			0x01, 0x9a, 0x02, 0xe0, 0x00, 0x19, 0x09, 0xb0,
+			0x00, 0x12, 0x00, 0x0f, 0x01, 0x44, 0x00, 0xbb,
+			0x16, 0x00, 0x10, 0xec, 0x03, 0x0c, 0x20, 0x00,
+			0x06, 0x0b, 0x0b, 0x33, 0x0e, 0x1c, 0x2a, 0x38,
+			0x46, 0x54, 0x62, 0x69, 0x70, 0x77, 0x79, 0x7b,
+			0x7d, 0x7e, 0x00, 0xc2, 0x01, 0x00, 0x09, 0x40,
+			0x09, 0xbe, 0x19, 0xfc, 0x19, 0xfa, 0x19, 0xf8,
+			0x1a, 0x38, 0x1a, 0x78, 0x1a, 0x76, 0x2a, 0xb6,
+			0x2a, 0xb6, 0x2a, 0xf4, 0x3a, 0xf4, 0x5b, 0x34,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+		},
+	},
+	{
+		/* 7680x4320/960X96 rgb 8bpc 9bpp */
+		7680, 4320, 960, 96, 1, 8, 144,
+		{
+			0x12, 0x00, 0x00, 0x8d, 0x30, 0x90, 0x10, 0xe0,
+			0x1e, 0x00, 0x00, 0x60, 0x03, 0xc0, 0x04, 0x38,
+			0x01, 0xc7, 0x03, 0x16, 0x00, 0x1c, 0x08, 0xc7,
+			0x00, 0x10, 0x00, 0x0f, 0x01, 0x44, 0x00, 0xaa,
+			0x17, 0x00, 0x10, 0xf1, 0x03, 0x0c, 0x20, 0x00,
+			0x06, 0x0b, 0x0b, 0x33, 0x0e, 0x1c, 0x2a, 0x38,
+			0x46, 0x54, 0x62, 0x69, 0x70, 0x77, 0x79, 0x7b,
+			0x7d, 0x7e, 0x00, 0xc2, 0x01, 0x00, 0x09, 0x40,
+			0x09, 0xbe, 0x19, 0xfc, 0x19, 0xfa, 0x19, 0xf8,
+			0x1a, 0x38, 0x1a, 0x78, 0x1a, 0x76, 0x2a, 0xb6,
+			0x2a, 0xb6, 0x2a, 0xf4, 0x3a, 0xf4, 0x63, 0x74,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+		},
+	},
+	{
+		/* 7680x4320/960X96 rgb 10bpc 12bpp */
+		7680, 4320, 960, 96, 1, 10, 192,
+		{
+			0x12, 0x00, 0x00, 0xad, 0x30, 0xc0, 0x10, 0xe0,
+			0x1e, 0x00, 0x00, 0x60, 0x03, 0xc0, 0x05, 0xa0,
+			0x01, 0x55, 0x03, 0x90, 0x00, 0x0a, 0x05, 0xc9,
+			0x00, 0xa0, 0x00, 0x0f, 0x01, 0x44, 0x01, 0xaa,
+			0x08, 0x00, 0x10, 0xf4, 0x07, 0x10, 0x20, 0x00,
+			0x06, 0x0f, 0x0f, 0x33, 0x0e, 0x1c, 0x2a, 0x38,
+			0x46, 0x54, 0x62, 0x69, 0x70, 0x77, 0x79, 0x7b,
+			0x7d, 0x7e, 0x01, 0x02, 0x11, 0x80, 0x22, 0x00,
+			0x22, 0x7e, 0x32, 0xbc, 0x32, 0xba, 0x3a, 0xf8,
+			0x3b, 0x38, 0x3b, 0x38, 0x3b, 0x76, 0x4b, 0x76,
+			0x4b, 0x76, 0x4b, 0x74, 0x5b, 0xb4, 0x73, 0xf4,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+		},
+	},
+	{
+		/* 7680x4320/960X96 rgb 10bpc 11bpp */
+		7680, 4320, 960, 96, 1, 10, 176,
+		{
+			0x12, 0x00, 0x00, 0xad, 0x30, 0xb0, 0x10, 0xe0,
+			0x1e, 0x00, 0x00, 0x60, 0x03, 0xc0, 0x05, 0x28,
+			0x01, 0x74, 0x03, 0x40, 0x00, 0x0f, 0x06, 0xe0,
+			0x00, 0x2d, 0x00, 0x0f, 0x01, 0x44, 0x01, 0x33,
+			0x0f, 0x00, 0x10, 0xf4, 0x07, 0x10, 0x20, 0x00,
+			0x06, 0x0f, 0x0f, 0x33, 0x0e, 0x1c, 0x2a, 0x38,
+			0x46, 0x54, 0x62, 0x69, 0x70, 0x77, 0x79, 0x7b,
+			0x7d, 0x7e, 0x01, 0x42, 0x19, 0xc0, 0x2a, 0x40,
+			0x2a, 0xbe, 0x3a, 0xfc, 0x3a, 0xfa, 0x3a, 0xf8,
+			0x3b, 0x38, 0x3b, 0x38, 0x3b, 0x76, 0x4b, 0x76,
+			0x4b, 0x76, 0x4b, 0xb4, 0x5b, 0xb4, 0x73, 0xf4,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+		},
+	},
+	{
+		/* 7680x4320/960X96 rgb 10bpc 10bpp */
+		7680, 4320, 960, 96, 1, 10, 160,
+		{
+			0x12, 0x00, 0x00, 0xad, 0x30, 0xa0, 0x10, 0xe0,
+			0x1e, 0x00, 0x00, 0x60, 0x03, 0xc0, 0x04, 0xb0,
+			0x01, 0x9a, 0x02, 0xe0, 0x00, 0x19, 0x09, 0xb0,
+			0x00, 0x12, 0x00, 0x0f, 0x01, 0x44, 0x00, 0xbb,
+			0x16, 0x00, 0x10, 0xec, 0x07, 0x10, 0x20, 0x00,
+			0x06, 0x0f, 0x0f, 0x33, 0x0e, 0x1c, 0x2a, 0x38,
+			0x46, 0x54, 0x62, 0x69, 0x70, 0x77, 0x79, 0x7b,
+			0x7d, 0x7e, 0x01, 0xc2, 0x22, 0x00, 0x2a, 0x40,
+			0x2a, 0xbe, 0x3a, 0xfc, 0x3a, 0xfa, 0x3a, 0xf8,
+			0x3b, 0x38, 0x3b, 0x78, 0x3b, 0x76, 0x4b, 0xb6,
+			0x4b, 0xb6, 0x4b, 0xf4, 0x63, 0xf4, 0x7c, 0x34,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+		},
+	},
+	{
+		/* 7680x4320/960X96 rgb 10bpc 9bpp */
+		7680, 4320, 960, 96, 1, 10, 144,
+		{
+			0x12, 0x00, 0x00, 0xad, 0x30, 0x90, 0x10, 0xe0,
+			0x1e, 0x00, 0x00, 0x60, 0x03, 0xc0, 0x04, 0x38,
+			0x01, 0xc7, 0x03, 0x16, 0x00, 0x1c, 0x08, 0xc7,
+			0x00, 0x10, 0x00, 0x0f, 0x01, 0x44, 0x00, 0xaa,
+			0x17, 0x00, 0x10, 0xf1, 0x07, 0x10, 0x20, 0x00,
+			0x06, 0x0f, 0x0f, 0x33, 0x0e, 0x1c, 0x2a, 0x38,
+			0x46, 0x54, 0x62, 0x69, 0x70, 0x77, 0x79, 0x7b,
+			0x7d, 0x7e, 0x01, 0xc2, 0x22, 0x00, 0x2a, 0x40,
+			0x2a, 0xbe, 0x3a, 0xfc, 0x3a, 0xfa, 0x3a, 0xf8,
+			0x3b, 0x38, 0x3b, 0x78, 0x3b, 0x76, 0x4b, 0xb6,
+			0x4b, 0xb6, 0x4b, 0xf4, 0x63, 0xf4, 0x84, 0x74,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+		},
+	},
+};
+
+static bool hdmi_bus_fmt_is_rgb(unsigned int bus_format)
+{
+	switch (bus_format) {
+	case MEDIA_BUS_FMT_RGB888_1X24:
+	case MEDIA_BUS_FMT_RGB101010_1X30:
+	case MEDIA_BUS_FMT_RGB121212_1X36:
+	case MEDIA_BUS_FMT_RGB161616_1X48:
+		return true;
+
+	default:
+		return false;
+	}
+}
+
+static bool hdmi_bus_fmt_is_yuv444(unsigned int bus_format)
+{
+	switch (bus_format) {
+	case MEDIA_BUS_FMT_YUV8_1X24:
+	case MEDIA_BUS_FMT_YUV10_1X30:
+	case MEDIA_BUS_FMT_YUV12_1X36:
+	case MEDIA_BUS_FMT_YUV16_1X48:
+		return true;
+
+	default:
+		return false;
+	}
+}
+
+static bool hdmi_bus_fmt_is_yuv422(unsigned int bus_format)
+{
+	switch (bus_format) {
+	case MEDIA_BUS_FMT_UYVY8_1X16:
+	case MEDIA_BUS_FMT_UYVY10_1X20:
+	case MEDIA_BUS_FMT_UYVY12_1X24:
+		return true;
+
+	default:
+		return false;
+	}
+}
+
+static bool hdmi_bus_fmt_is_yuv420(unsigned int bus_format)
+{
+	switch (bus_format) {
+	case MEDIA_BUS_FMT_UYYVYY8_0_5X24:
+	case MEDIA_BUS_FMT_UYYVYY10_0_5X30:
+	case MEDIA_BUS_FMT_UYYVYY12_0_5X36:
+	case MEDIA_BUS_FMT_UYYVYY16_0_5X48:
+		return true;
+
+	default:
+	return false;
+	}
+}
+
+static int hdmi_bus_fmt_color_depth(unsigned int bus_format)
+{
+	switch (bus_format) {
+	case MEDIA_BUS_FMT_RGB888_1X24:
+	case MEDIA_BUS_FMT_YUV8_1X24:
+	case MEDIA_BUS_FMT_UYVY8_1X16:
+	case MEDIA_BUS_FMT_UYYVYY8_0_5X24:
+		return 8;
+
+	case MEDIA_BUS_FMT_RGB101010_1X30:
+	case MEDIA_BUS_FMT_YUV10_1X30:
+	case MEDIA_BUS_FMT_UYVY10_1X20:
+	case MEDIA_BUS_FMT_UYYVYY10_0_5X30:
+		return 10;
+
+	case MEDIA_BUS_FMT_RGB121212_1X36:
+	case MEDIA_BUS_FMT_YUV12_1X36:
+	case MEDIA_BUS_FMT_UYVY12_1X24:
+	case MEDIA_BUS_FMT_UYYVYY12_0_5X36:
+		return 12;
+
+	case MEDIA_BUS_FMT_RGB161616_1X48:
+	case MEDIA_BUS_FMT_YUV16_1X48:
+	case MEDIA_BUS_FMT_UYYVYY16_0_5X48:
+		return 16;
+
+	default:
+		return 0;
+	}
+}
+
+static unsigned int
+hdmi_get_tmdsclock(struct rockchip_hdmi *hdmi, unsigned long pixelclock)
+{
+	unsigned int tmdsclock = pixelclock;
+	unsigned int depth =
+		hdmi_bus_fmt_color_depth(hdmi->output_bus_format);
+
+	if (!hdmi_bus_fmt_is_yuv422(hdmi->output_bus_format)) {
+		switch (depth) {
+		case 16:
+			tmdsclock = pixelclock * 2;
+			break;
+		case 12:
+			tmdsclock = pixelclock * 3 / 2;
+			break;
+		case 10:
+			tmdsclock = pixelclock * 5 / 4;
+			break;
+		default:
+			break;
+		}
+	}
+
+	return tmdsclock;
+}
+
+static void hdmi_select_link_config(struct rockchip_hdmi *hdmi,
+				    struct drm_display_mode *mode,
+				    unsigned int tmdsclk)
+{
+	int max_lanes, max_rate_per_lane;
+	int max_dsc_lanes, max_dsc_rate_per_lane;
+	unsigned long max_frl_rate;
+
+	max_lanes = hdmi->max_lanes;
+	max_rate_per_lane = hdmi->max_frl_rate_per_lane;
+	max_frl_rate = max_lanes * max_rate_per_lane * 1000000;
+
+	hdmi->link_cfg.dsc_mode = false;
+	hdmi->link_cfg.frl_lanes = max_lanes;
+	hdmi->link_cfg.rate_per_lane = max_rate_per_lane;
+
+	if (!max_frl_rate || tmdsclk < HDMI20_MAX_RATE) {
+		printf("%s use tmds mode\n", __func__);
+		hdmi->link_cfg.frl_mode = false;
+		return;
+	}
+
+	hdmi->link_cfg.frl_mode = true;
+
+	if (!hdmi->dsc_cap.v_1p2)
+		return;
+
+	max_dsc_lanes = hdmi->dsc_cap.max_lanes;
+	max_dsc_rate_per_lane =
+		hdmi->dsc_cap.max_frl_rate_per_lane;
+
+	if (mode->clock >= HDMI_8K60_RATE &&
+	    !hdmi_bus_fmt_is_yuv420(hdmi->bus_format) &&
+	    !hdmi_bus_fmt_is_yuv422(hdmi->bus_format)) {
+		hdmi->link_cfg.dsc_mode = true;
+		hdmi->link_cfg.frl_lanes = max_dsc_lanes;
+		hdmi->link_cfg.rate_per_lane = max_dsc_rate_per_lane;
+	} else {
+		hdmi->link_cfg.dsc_mode = false;
+		hdmi->link_cfg.frl_lanes = max_lanes;
+		hdmi->link_cfg.rate_per_lane = max_rate_per_lane;
+	}
+}
+
+/////////////////////////////////////////////////////////////////////////////////////
+
+static int hdmi_dsc_get_slice_height(int vactive)
+{
+	int slice_height;
+
+	/*
+	 * Slice Height determination : HDMI2.1 Section 7.7.5.2
+	 * Select smallest slice height >=96, that results in a valid PPS and
+	 * requires minimum padding lines required for final slice.
+	 *
+	 * Assumption : Vactive is even.
+	 */
+	for (slice_height = 96; slice_height <= vactive; slice_height += 2)
+		if (vactive % slice_height == 0)
+			return slice_height;
+
+	return 0;
+}
+
+static int hdmi_dsc_get_num_slices(struct rockchip_hdmi *hdmi,
+				   struct drm_display_mode *mode,
+				   int src_max_slices, int src_max_slice_width,
+				   int hdmi_max_slices, int hdmi_throughput)
+{
+/* Pixel rates in KPixels/sec */
+#define HDMI_DSC_PEAK_PIXEL_RATE		2720000
+/*
+ * Rates at which the source and sink are required to process pixels in each
+ * slice, can be two levels: either at least 340000KHz or at least 40000KHz.
+ */
+#define HDMI_DSC_MAX_ENC_THROUGHPUT_0		340000
+#define HDMI_DSC_MAX_ENC_THROUGHPUT_1		400000
+
+/* Spec limits the slice width to 2720 pixels */
+#define MAX_HDMI_SLICE_WIDTH			2720
+	int kslice_adjust;
+	int adjusted_clk_khz;
+	int min_slices;
+	int target_slices;
+	int max_throughput; /* max clock freq. in khz per slice */
+	int max_slice_width;
+	int slice_width;
+	int pixel_clock = mode->clock;
+
+	if (!hdmi_throughput)
+		return 0;
+
+	/*
+	 * Slice Width determination : HDMI2.1 Section 7.7.5.1
+	 * kslice_adjust factor for 4:2:0, and 4:2:2 formats is 0.5, where as
+	 * for 4:4:4 is 1.0. Multiplying these factors by 10 and later
+	 * dividing adjusted clock value by 10.
+	 */
+	if (hdmi_bus_fmt_is_yuv444(hdmi->output_bus_format) ||
+	    hdmi_bus_fmt_is_rgb(hdmi->output_bus_format))
+		kslice_adjust = 10;
+	else
+		kslice_adjust = 5;
+
+	/*
+	 * As per spec, the rate at which the source and the sink process
+	 * the pixels per slice are at two levels: at least 340Mhz or 400Mhz.
+	 * This depends upon the pixel clock rate and output formats
+	 * (kslice adjust).
+	 * If pixel clock * kslice adjust >= 2720MHz slices can be processed
+	 * at max 340MHz, otherwise they can be processed at max 400MHz.
+	 */
+
+	adjusted_clk_khz = DIV_ROUND_UP(kslice_adjust * pixel_clock, 10);
+
+	if (adjusted_clk_khz <= HDMI_DSC_PEAK_PIXEL_RATE)
+		max_throughput = HDMI_DSC_MAX_ENC_THROUGHPUT_0;
+	else
+		max_throughput = HDMI_DSC_MAX_ENC_THROUGHPUT_1;
+
+	/*
+	 * Taking into account the sink's capability for maximum
+	 * clock per slice (in MHz) as read from HF-VSDB.
+	 */
+	max_throughput = min(max_throughput, hdmi_throughput * 1000);
+
+	min_slices = DIV_ROUND_UP(adjusted_clk_khz, max_throughput);
+	max_slice_width = min(MAX_HDMI_SLICE_WIDTH, src_max_slice_width);
+
+	/*
+	 * Keep on increasing the num of slices/line, starting from min_slices
+	 * per line till we get such a number, for which the slice_width is
+	 * just less than max_slice_width. The slices/line selected should be
+	 * less than or equal to the max horizontal slices that the combination
+	 * of PCON encoder and HDMI decoder can support.
+	 */
+	do {
+		if (min_slices <= 1 && src_max_slices >= 1 && hdmi_max_slices >= 1)
+			target_slices = 1;
+		else if (min_slices <= 2 && src_max_slices >= 2 && hdmi_max_slices >= 2)
+			target_slices = 2;
+		else if (min_slices <= 4 && src_max_slices >= 4 && hdmi_max_slices >= 4)
+			target_slices = 4;
+		else if (min_slices <= 8 && src_max_slices >= 8 && hdmi_max_slices >= 8)
+			target_slices = 8;
+		else if (min_slices <= 12 && src_max_slices >= 12 && hdmi_max_slices >= 12)
+			target_slices = 12;
+		else if (min_slices <= 16 && src_max_slices >= 16 && hdmi_max_slices >= 16)
+			target_slices = 16;
+		else
+			return 0;
+
+		slice_width = DIV_ROUND_UP(mode->hdisplay, target_slices);
+		if (slice_width > max_slice_width)
+			min_slices = target_slices + 1;
+	} while (slice_width > max_slice_width);
+
+	return target_slices;
+}
+
+static int hdmi_dsc_slices(struct rockchip_hdmi *hdmi,
+			   struct drm_display_mode *mode)
+{
+	int hdmi_throughput = hdmi->dsc_cap.clk_per_slice;
+	int hdmi_max_slices = hdmi->dsc_cap.max_slices;
+	int rk_max_slices = 8;
+	int rk_max_slice_width = 2048;
+
+	return hdmi_dsc_get_num_slices(hdmi, mode, rk_max_slices,
+				       rk_max_slice_width,
+				       hdmi_max_slices, hdmi_throughput);
+}
+
+static int
+hdmi_dsc_get_bpp(struct rockchip_hdmi *hdmi, int src_fractional_bpp,
+		 int slice_width, int num_slices, bool hdmi_all_bpp,
+		 int hdmi_max_chunk_bytes)
+{
+	int max_dsc_bpp, min_dsc_bpp;
+	int target_bytes;
+	bool bpp_found = false;
+	int bpp_decrement_x16;
+	int bpp_target;
+	int bpp_target_x16;
+
+	/*
+	 * Get min bpp and max bpp as per Table 7.23, in HDMI2.1 spec
+	 * Start with the max bpp and keep on decrementing with
+	 * fractional bpp, if supported by PCON DSC encoder
+	 *
+	 * for each bpp we check if no of bytes can be supported by HDMI sink
+	 */
+
+	/* only 9\10\12 bpp was tested */
+	min_dsc_bpp = 9;
+	max_dsc_bpp = 12;
+
+	/*
+	 * Taking into account if all dsc_all_bpp supported by HDMI2.1 sink
+	 * Section 7.7.34 : Source shall not enable compressed Video
+	 * Transport with bpp_target settings above 12 bpp unless
+	 * DSC_all_bpp is set to 1.
+	 */
+	if (!hdmi_all_bpp)
+		max_dsc_bpp = min(max_dsc_bpp, 12);
+
+	/*
+	 * The Sink has a limit of compressed data in bytes for a scanline,
+	 * as described in max_chunk_bytes field in HFVSDB block of edid.
+	 * The no. of bytes depend on the target bits per pixel that the
+	 * source configures. So we start with the max_bpp and calculate
+	 * the target_chunk_bytes. We keep on decrementing the target_bpp,
+	 * till we get the target_chunk_bytes just less than what the sink's
+	 * max_chunk_bytes, or else till we reach the min_dsc_bpp.
+	 *
+	 * The decrement is according to the fractional support from PCON DSC
+	 * encoder. For fractional BPP we use bpp_target as a multiple of 16.
+	 *
+	 * bpp_target_x16 = bpp_target * 16
+	 * So we need to decrement by {1, 2, 4, 8, 16} for fractional bpps
+	 * {1/16, 1/8, 1/4, 1/2, 1} respectively.
+	 */
+
+	bpp_target = max_dsc_bpp;
+
+	/* src does not support fractional bpp implies decrement by 16 for bppx16 */
+	if (!src_fractional_bpp)
+		src_fractional_bpp = 1;
+	bpp_decrement_x16 = DIV_ROUND_UP(16, src_fractional_bpp);
+	bpp_target_x16 = bpp_target * 16;
+
+	while (bpp_target_x16 > (min_dsc_bpp * 16)) {
+		int bpp;
+
+		bpp = DIV_ROUND_UP(bpp_target_x16, 16);
+		target_bytes = DIV_ROUND_UP((num_slices * slice_width * bpp), 8);
+		if (target_bytes <= hdmi_max_chunk_bytes) {
+			bpp_found = true;
+			break;
+		}
+		bpp_target_x16 -= bpp_decrement_x16;
+	}
+	if (bpp_found)
+		return bpp_target_x16;
+
+	return 0;
+}
+
+static int
+dw_hdmi_dsc_bpp(struct rockchip_hdmi *hdmi,
+		int num_slices, int slice_width)
+{
+	bool hdmi_all_bpp = hdmi->dsc_cap.all_bpp;
+	int fractional_bpp = 0;
+	int hdmi_max_chunk_bytes = hdmi->dsc_cap.total_chunk_kbytes * 1024;
+
+	return hdmi_dsc_get_bpp(hdmi, fractional_bpp, slice_width,
+				num_slices, hdmi_all_bpp,
+				hdmi_max_chunk_bytes);
+}
+
+static int dw_hdmi_qp_set_link_cfg(struct rockchip_hdmi *hdmi,
+				   u16 pic_width, u16 pic_height,
+				   u16 slice_width, u16 slice_height,
+				   u16 bits_per_pixel, u8 bits_per_component)
+{
+	int i;
+
+	for (i = 0; i < PPS_TABLE_LEN; i++)
+		if (pic_width == pps_datas[i].pic_width &&
+		    pic_height == pps_datas[i].pic_height &&
+		    slice_width == pps_datas[i].slice_width &&
+		    slice_height == pps_datas[i].slice_height &&
+		    bits_per_component == pps_datas[i].bpc &&
+		    bits_per_pixel == pps_datas[i].bpp &&
+		    hdmi_bus_fmt_is_rgb(hdmi->output_bus_format) == pps_datas[i].convert_rgb)
+			break;
+
+	if (i == PPS_TABLE_LEN) {
+		dev_err(hdmi->dev, "can't find pps cfg!\n");
+		return -EINVAL;
+	}
+
+	memcpy(hdmi->link_cfg.pps_payload, pps_datas[i].raw_pps, 128);
+	hdmi->link_cfg.hcactive = DIV_ROUND_UP(slice_width * (bits_per_pixel / 16), 8) *
+		(pic_width / slice_width);
+
+	return 0;
+}
+
+static void dw_hdmi_qp_dsc_configure(struct rockchip_hdmi *hdmi,
+				     struct drm_display_mode *mode)
+{
+	int ret;
+	int slice_height;
+	int slice_width;
+	int bits_per_pixel;
+	int slice_count;
+	bool hdmi_is_dsc_1_2;
+	unsigned int depth = hdmi_bus_fmt_color_depth(hdmi->output_bus_format);
+
+	hdmi_is_dsc_1_2 = hdmi->dsc_cap.v_1p2;
+
+	if (!hdmi_is_dsc_1_2)
+		return;
+
+	slice_height = hdmi_dsc_get_slice_height(mode->vdisplay);
+	if (!slice_height)
+		return;
+
+	slice_count = hdmi_dsc_slices(hdmi, mode);
+	if (!slice_count)
+		return;
+
+	slice_width = DIV_ROUND_UP(mode->hdisplay, slice_count);
+
+	bits_per_pixel = dw_hdmi_dsc_bpp(hdmi, slice_count, slice_width);
+	if (!bits_per_pixel)
+		return;
+
+	ret = dw_hdmi_qp_set_link_cfg(hdmi, mode->hdisplay,
+				      mode->vdisplay, slice_width,
+				      slice_height, bits_per_pixel, depth);
+
+	if (ret) {
+		dev_err(hdmi->dev, "set vdsc cfg failed\n");
+		return;
+	}
+	printf("dsc_enable\n");
+}
+
+static unsigned int drm_rk_select_color(struct hdmi_edid_data *edid_data,
+					struct base_screen_info *screen_info,
+					enum dw_hdmi_devtype dev_type,
+					bool output_bus_format_rgb)
+{
+	struct drm_display_info *info = &edid_data->display_info;
+	struct drm_display_mode *mode = edid_data->preferred_mode;
+	int max_tmds_clock = info->max_tmds_clock;
+	bool support_dc = false;
+	bool mode_420 = drm_mode_is_420(info, mode);
+	unsigned int color_depth = 8;
+	unsigned int base_color = DRM_HDMI_OUTPUT_DEFAULT_RGB;
+	unsigned int color_format = DRM_HDMI_OUTPUT_DEFAULT_RGB;
+	unsigned long tmdsclock, pixclock = mode->clock;
+
+	if (screen_info)
+		base_color = screen_info->format;
+
+	switch (base_color) {
+	case DRM_HDMI_OUTPUT_YCBCR_HQ:
+		if (info->color_formats & DRM_COLOR_FORMAT_YCRCB444)
+			color_format = DRM_HDMI_OUTPUT_YCBCR444;
+		else if (info->color_formats & DRM_COLOR_FORMAT_YCRCB422)
+			color_format = DRM_HDMI_OUTPUT_YCBCR422;
+		else if (mode_420)
+			color_format = DRM_HDMI_OUTPUT_YCBCR420;
+		break;
+	case DRM_HDMI_OUTPUT_YCBCR_LQ:
+		if (mode_420)
+			color_format = DRM_HDMI_OUTPUT_YCBCR420;
+		else if (info->color_formats & DRM_COLOR_FORMAT_YCRCB422)
+			color_format = DRM_HDMI_OUTPUT_YCBCR422;
+		else if (info->color_formats & DRM_COLOR_FORMAT_YCRCB444)
+			color_format = DRM_HDMI_OUTPUT_YCBCR444;
+		break;
+	case DRM_HDMI_OUTPUT_YCBCR420:
+		if (mode_420)
+			color_format = DRM_HDMI_OUTPUT_YCBCR420;
+		break;
+	case DRM_HDMI_OUTPUT_YCBCR422:
+		if (info->color_formats & DRM_COLOR_FORMAT_YCRCB422)
+			color_format = DRM_HDMI_OUTPUT_YCBCR422;
+		break;
+	case DRM_HDMI_OUTPUT_YCBCR444:
+		if (info->color_formats & DRM_COLOR_FORMAT_YCRCB444)
+			color_format = DRM_HDMI_OUTPUT_YCBCR444;
+		break;
+	case DRM_HDMI_OUTPUT_DEFAULT_RGB:
+	default:
+		break;
+	}
+
+	if (output_bus_format_rgb)
+		color_format = DRM_HDMI_OUTPUT_DEFAULT_RGB;
+
+	if (pixclock > 340000)
+		color_format = DRM_HDMI_OUTPUT_YCBCR420;
+
+	if (color_format == DRM_HDMI_OUTPUT_DEFAULT_RGB &&
+	    info->edid_hdmi_dc_modes & DRM_EDID_HDMI_DC_30)
+		support_dc = true;
+	if (color_format == DRM_HDMI_OUTPUT_YCBCR444 &&
+	    (info->edid_hdmi_dc_modes &
+	     (DRM_EDID_HDMI_DC_Y444 | DRM_EDID_HDMI_DC_30)))
+		support_dc = true;
+	if (color_format == DRM_HDMI_OUTPUT_YCBCR422)
+		support_dc = true;
+	if (color_format == DRM_HDMI_OUTPUT_YCBCR420 &&
+	    info->hdmi.y420_dc_modes & DRM_EDID_YCBCR420_DC_30)
+		support_dc = true;
+
+	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
+		pixclock *= 2;
+
+	if (screen_info && screen_info->depth == 10)
+		color_depth = screen_info->depth;
+
+	if (color_format == DRM_HDMI_OUTPUT_YCBCR422 || color_depth == 8)
+		tmdsclock = pixclock;
+	else
+		tmdsclock = pixclock * color_depth / 8;
+
+	if (color_format == DRM_HDMI_OUTPUT_YCBCR420)
+		tmdsclock /= 2;
+
+	if (!max_tmds_clock)
+		max_tmds_clock = 340000;
+
+	if (tmdsclock > max_tmds_clock) {
+		if (max_tmds_clock >= 594000) {
+			color_depth = 8;
+		} else if (max_tmds_clock > 340000) {
+			if (drm_mode_is_420(info, mode))
+				color_format = DRM_HDMI_OUTPUT_YCBCR420;
+		} else {
+			color_depth = 8;
+			if (drm_mode_is_420(info, mode))
+				color_format = DRM_HDMI_OUTPUT_YCBCR420;
+		}
+	}
+
+	printf("color_format:%x\n", color_format);
+	if (color_depth > 8 && support_dc) {
+		switch (color_format) {
+		case DRM_HDMI_OUTPUT_YCBCR444:
+			return MEDIA_BUS_FMT_YUV10_1X30;
+		case DRM_HDMI_OUTPUT_YCBCR422:
+			return MEDIA_BUS_FMT_UYVY10_1X20;
+		case DRM_HDMI_OUTPUT_YCBCR420:
+			return MEDIA_BUS_FMT_UYYVYY10_0_5X30;
+		default:
+			return MEDIA_BUS_FMT_RGB101010_1X30;
+		}
+	} else {
+		switch (color_format) {
+		case DRM_HDMI_OUTPUT_YCBCR444:
+			return MEDIA_BUS_FMT_YUV8_1X24;
+		case DRM_HDMI_OUTPUT_YCBCR422:
+			return MEDIA_BUS_FMT_UYVY8_1X16;
+		case DRM_HDMI_OUTPUT_YCBCR420:
+			return MEDIA_BUS_FMT_UYYVYY8_0_5X24;
+		default:
+			return MEDIA_BUS_FMT_RGB888_1X24;
+		}
+	}
+}
+
+void dw_hdmi_qp_selete_output(struct hdmi_edid_data *edid_data,
+			      struct connector_state *conn_state,
+			      unsigned int *bus_format,
+			      struct overscan *overscan,
+			      enum dw_hdmi_devtype dev_type,
+			      bool output_bus_format_rgb,
+			      void *data)
+{
+	struct rockchip_hdmi *hdmi = (struct rockchip_hdmi *)data;
+	struct drm_hdmi_info *hdmi_info = &edid_data->display_info.hdmi;
+	int ret, i, screen_size;
+	struct base_disp_info base_parameter;
+	struct base2_disp_info *base2_parameter = conn_state->disp_info;
+	const struct base_overscan *scan;
+	struct base_screen_info *screen_info = NULL;
+	struct base2_screen_info *screen_info2 = NULL;
+	int max_scan = 100;
+	int min_scan = 51;
+	int offset = 0;
+	int color_depth;
+	unsigned int tmdsclk;
+	unsigned int pixel_clk;
+	bool found = false;
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+	char baseparameter_buf[8 * RK_BLK_SIZE] __aligned(ARCH_DMA_MINALIGN);
+
+	overscan->left_margin = max_scan;
+	overscan->right_margin = max_scan;
+	overscan->top_margin = max_scan;
+	overscan->bottom_margin = max_scan;
+
+	hdmi->max_frl_rate_per_lane = hdmi_info->max_frl_rate_per_lane;
+	hdmi->max_lanes = hdmi_info->max_lanes;
+	memcpy(&hdmi->dsc_cap, &hdmi_info->dsc_cap, sizeof(struct drm_hdmi_dsc_cap));
+
+	if (output_bus_format_rgb)
+		*bus_format = MEDIA_BUS_FMT_RGB888_1X24;
+	else
+		*bus_format = MEDIA_BUS_FMT_YUV8_1X24;
+
+	if (!base2_parameter) {
+		dev_desc = rockchip_get_bootdev();
+		if (!dev_desc) {
+			printf("%s: Could not find device\n", __func__);
+			goto null_basep;
+		}
+
+		ret = part_get_info_by_name(dev_desc, "baseparameter",
+					    &part_info);
+		if (ret < 0) {
+			printf("Could not find baseparameter partition\n");
+			goto null_basep;
+		}
+
+read_aux:
+		ret = blk_dread(dev_desc, part_info.start + offset, 1,
+				(void *)baseparameter_buf);
+		if (ret < 0) {
+			printf("read baseparameter failed\n");
+			goto null_basep;
+		}
+
+		memcpy(&base_parameter, baseparameter_buf,
+		       sizeof(base_parameter));
+		scan = &base_parameter.scan;
+
+		screen_size = sizeof(base_parameter.screen_list) /
+			sizeof(base_parameter.screen_list[0]);
+
+		for (i = 0; i < screen_size; i++) {
+			if (base_parameter.screen_list[i].type ==
+			    DRM_MODE_CONNECTOR_HDMIA) {
+				found = true;
+				screen_info = &base_parameter.screen_list[i];
+				break;
+			}
+		}
+
+		if (!found && !offset) {
+			printf("hdmi info isn't saved in main block\n");
+			offset += 16;
+			goto read_aux;
+		}
+	} else {
+		scan = &base2_parameter->overscan_info;
+		screen_size = sizeof(base2_parameter->screen_info) /
+			sizeof(base2_parameter->screen_info[0]);
+
+		for (i = 0; i < screen_size; i++) {
+			if (base2_parameter->screen_info[i].type ==
+			    DRM_MODE_CONNECTOR_HDMIA) {
+				screen_info2 =
+					&base2_parameter->screen_info[i];
+				break;
+			}
+		}
+		screen_info = malloc(sizeof(*screen_info));
+
+		screen_info->type = screen_info2->type;
+		screen_info->mode = screen_info2->resolution;
+		screen_info->format = screen_info2->format;
+		screen_info->depth = screen_info2->depthc;
+		screen_info->feature = screen_info2->feature;
+	}
+
+	if (scan->leftscale < min_scan && scan->leftscale > 0)
+		overscan->left_margin = min_scan;
+	else if (scan->leftscale < max_scan && scan->leftscale > 0)
+		overscan->left_margin = scan->leftscale;
+
+	if (scan->rightscale < min_scan && scan->rightscale > 0)
+		overscan->right_margin = min_scan;
+	else if (scan->rightscale < max_scan && scan->rightscale > 0)
+		overscan->right_margin = scan->rightscale;
+
+	if (scan->topscale < min_scan && scan->topscale > 0)
+		overscan->top_margin = min_scan;
+	else if (scan->topscale < max_scan && scan->topscale > 0)
+		overscan->top_margin = scan->topscale;
+
+	if (scan->bottomscale < min_scan && scan->bottomscale > 0)
+		overscan->bottom_margin = min_scan;
+	else if (scan->bottomscale < max_scan && scan->bottomscale > 0)
+		overscan->bottom_margin = scan->bottomscale;
+
+null_basep:
+
+	if (screen_info)
+		printf("base_parameter.mode:%dx%d\n",
+		       screen_info->mode.hdisplay,
+		       screen_info->mode.vdisplay);
+	drm_rk_select_mode(edid_data, screen_info);
+
+	*bus_format = drm_rk_select_color(edid_data, screen_info,
+					  dev_type, output_bus_format_rgb);
+
+	hdmi->bus_format = *bus_format;
+	color_depth = hdmi_bus_fmt_color_depth(*bus_format);
+	pixel_clk = edid_data->preferred_mode->clock;
+	tmdsclk = hdmi_get_tmdsclock(hdmi, pixel_clk);
+	if (hdmi_bus_fmt_is_yuv420(hdmi->output_bus_format))
+		tmdsclk /= 2;
+	hdmi_select_link_config(hdmi, edid_data->preferred_mode, tmdsclk);
+	dw_hdmi_qp_dsc_configure(hdmi, edid_data->preferred_mode);
+	if (hdmi->link_cfg.frl_mode) {
+		dm_gpio_set_value(&hdmi->enable_gpio, 0);
+		/* in the current version, support max 40G frl */
+		if (hdmi->link_cfg.rate_per_lane >= 10) {
+			hdmi->link_cfg.frl_lanes = 4;
+			hdmi->link_cfg.rate_per_lane = 10;
+		}
+		hdmi->bus_width = hdmi->link_cfg.frl_lanes *
+			hdmi->link_cfg.rate_per_lane * 1000000;
+		/* 10 bit color depth and frl mode */
+		if (color_depth == 10)
+			hdmi->bus_width |=
+				COLOR_DEPTH_10BIT | HDMI_FRL_MODE;
+		else
+			hdmi->bus_width |= HDMI_FRL_MODE;
+	} else {
+		dm_gpio_set_value(&hdmi->enable_gpio, 1);
+		hdmi->bus_width =
+			hdmi_get_tmdsclock(hdmi, pixel_clk * 10);
+		if (hdmi_bus_fmt_is_yuv420(*bus_format))
+			hdmi->bus_width /= 2;
+
+		if (color_depth == 10)
+			hdmi->bus_width |= COLOR_DEPTH_10BIT;
+	}
+}
+
+static void rk3588_set_link_mode(struct rockchip_hdmi *hdmi)
+{
+	int val;
+	bool is_hdmi0;
+
+	if (!hdmi->id)
+		is_hdmi0 = true;
+	else
+		is_hdmi0 = false;
+
+	if (!hdmi->link_cfg.frl_mode) {
+		val = HIWORD_UPDATE(0, RK3588_HDMI21_MASK);
+		if (is_hdmi0)
+			writel(val, hdmi->vo1_grf + RK3588_GRF_VO1_CON4);
+		else
+			writel(val, hdmi->vo1_grf + RK3588_GRF_VO1_CON7);
+
+		val = HIWORD_UPDATE(0, RK3588_COMPRESS_MODE_MASK | RK3588_COLOR_FORMAT_MASK);
+		if (is_hdmi0)
+			writel(val, hdmi->vo1_grf + RK3588_GRF_VO1_CON3);
+		else
+			writel(val, hdmi->vo1_grf + RK3588_GRF_VO1_CON6);
+
+		return;
+	}
+
+	val = HIWORD_UPDATE(RK3588_HDMI21_MASK, RK3588_HDMI21_MASK);
+	if (is_hdmi0)
+		writel(val, hdmi->vo1_grf + RK3588_GRF_VO1_CON4);
+	else
+		writel(val, hdmi->vo1_grf + RK3588_GRF_VO1_CON7);
+
+	if (hdmi->link_cfg.dsc_mode) {
+		val = HIWORD_UPDATE(RK3588_COMPRESS_MODE_MASK | RK3588_COMPRESSED_DATA,
+				    RK3588_COMPRESS_MODE_MASK | RK3588_COLOR_FORMAT_MASK);
+		if (is_hdmi0)
+			writel(val, hdmi->vo1_grf + RK3588_GRF_VO1_CON3);
+		else
+			writel(val, hdmi->vo1_grf + RK3588_GRF_VO1_CON6);
+	} else {
+		val = HIWORD_UPDATE(0, RK3588_COMPRESS_MODE_MASK | RK3588_COLOR_FORMAT_MASK);
+		if (is_hdmi0)
+			writel(val, hdmi->vo1_grf + RK3588_GRF_VO1_CON3);
+		else
+			writel(val, hdmi->vo1_grf + RK3588_GRF_VO1_CON6);
+	}
+}
+
+static void rk3588_set_color_format(struct rockchip_hdmi *hdmi, u64 bus_format,
+				    u32 depth)
+{
+	u32 val = 0;
+
+	switch (bus_format) {
+	case MEDIA_BUS_FMT_RGB888_1X24:
+	case MEDIA_BUS_FMT_RGB101010_1X30:
+		val = HIWORD_UPDATE(0, RK3588_COLOR_FORMAT_MASK);
+		break;
+	case MEDIA_BUS_FMT_UYYVYY8_0_5X24:
+	case MEDIA_BUS_FMT_UYYVYY10_0_5X30:
+		val = HIWORD_UPDATE(RK3588_YUV420, RK3588_COLOR_FORMAT_MASK);
+		break;
+	case MEDIA_BUS_FMT_YUV8_1X24:
+	case MEDIA_BUS_FMT_YUV10_1X30:
+		val = HIWORD_UPDATE(RK3588_YUV444, RK3588_COLOR_FORMAT_MASK);
+		break;
+	default:
+		dev_err(hdmi->dev, "can't set correct color format\n");
+		return;
+	}
+
+	if (hdmi->link_cfg.dsc_mode)
+		val = HIWORD_UPDATE(RK3588_COMPRESSED_DATA, RK3588_COLOR_FORMAT_MASK);
+
+	if (depth == 8)
+		val |= HIWORD_UPDATE(RK3588_8BPC, RK3588_COLOR_DEPTH_MASK);
+	else
+		val |= HIWORD_UPDATE(RK3588_10BPC, RK3588_COLOR_DEPTH_MASK);
+
+	if (!hdmi->id)
+		writel(val, hdmi->vo1_grf + RK3588_GRF_VO1_CON3);
+	else
+		writel(val, hdmi->vo1_grf + RK3588_GRF_VO1_CON6);
+}
+
+void rk3588_set_grf_cfg(void *data)
+{
+	struct rockchip_hdmi *hdmi = (struct rockchip_hdmi *)data;
+	int color_depth;
+
+	rk3588_set_link_mode(hdmi);
+	color_depth = hdmi_bus_fmt_color_depth(hdmi->bus_format);
+	rk3588_set_color_format(hdmi, hdmi->bus_format, color_depth);
+}
+
+void dw_hdmi_qp_set_iomux(void *data)
+{
+	struct rockchip_hdmi *hdmi = (struct rockchip_hdmi *)data;
+	u32 val;
+
+	if (!hdmi->id) {
+		val = HIWORD_UPDATE(RK3588_SCLIN_MASK, RK3588_SCLIN_MASK) |
+		      HIWORD_UPDATE(RK3588_SDAIN_MASK, RK3588_SDAIN_MASK) |
+		      HIWORD_UPDATE(RK3588_MODE_MASK, RK3588_MODE_MASK) |
+		      HIWORD_UPDATE(RK3588_I2S_SEL_MASK, RK3588_I2S_SEL_MASK);
+		writel(val, hdmi->vo1_grf + RK3588_GRF_VO1_CON3);
+
+		val = HIWORD_UPDATE(RK3588_SET_HPD_PATH_MASK,
+				    RK3588_SET_HPD_PATH_MASK);
+		writel(val, hdmi->grf + RK3588_GRF_SOC_CON7);
+
+		val = HIWORD_UPDATE(RK3588_HDMI0_GRANT_SEL,
+				    RK3588_HDMI0_GRANT_SEL);
+		writel(val, hdmi->vo1_grf + RK3588_GRF_VO1_CON9);
+	} else {
+		val = HIWORD_UPDATE(RK3588_SCLIN_MASK, RK3588_SCLIN_MASK) |
+		      HIWORD_UPDATE(RK3588_SDAIN_MASK, RK3588_SDAIN_MASK) |
+		      HIWORD_UPDATE(RK3588_MODE_MASK, RK3588_MODE_MASK) |
+		      HIWORD_UPDATE(RK3588_I2S_SEL_MASK, RK3588_I2S_SEL_MASK);
+		writel(val, hdmi->vo1_grf + RK3588_GRF_VO1_CON6);
+
+		val = HIWORD_UPDATE(RK3588_SET_HPD_PATH_MASK,
+				    RK3588_SET_HPD_PATH_MASK);
+		writel(val, hdmi->grf + RK3588_GRF_SOC_CON7);
+
+		val = HIWORD_UPDATE(RK3588_HDMI1_GRANT_SEL,
+				    RK3588_HDMI1_GRANT_SEL);
+		writel(val, hdmi->vo1_grf + RK3588_GRF_VO1_CON9);
+	}
+}
+
+struct dw_hdmi_link_config *dw_hdmi_rockchip_get_link_cfg(void *data)
+{
+	struct rockchip_hdmi *hdmi = (struct rockchip_hdmi *)data;
+
+	return &hdmi->link_cfg;
+}
+
+static void dw_hdmi_qp_rockchip_phy_disable(void *data, void *state)
+{
+	struct display_state *display_state = (struct display_state *)state;
+	struct connector_state *conn_state = &display_state->conn_state;
+
+	rockchip_phy_power_off(conn_state->phy);
+}
+
+static int dw_hdmi_qp_rockchip_genphy_init(void *data, void *state)
+{
+	struct rockchip_hdmi *hdmi = (struct rockchip_hdmi *)data;
+	struct display_state *display_state = (struct display_state *)state;
+	struct connector_state *conn_state = &display_state->conn_state;
+
+	dw_hdmi_qp_rockchip_phy_disable(data, state);
+
+	rockchip_phy_set_bus_width(conn_state->phy, hdmi->bus_width);
+
+	return rockchip_phy_power_on(conn_state->phy);
+}
+
+static enum drm_connector_status dw_hdmi_rk3588_read_hpd(void *data)
+{
+	u32 val;
+	int ret;
+	struct rockchip_hdmi *hdmi = (struct rockchip_hdmi *)data;
+
+	val = readl(hdmi->grf + RK3588_GRF_SOC_STATUS1);
+
+	if (!hdmi->id) {
+		if (val & RK3588_HDMI0_LEVEL_INT)
+			ret = connector_status_connected;
+		else
+			ret = connector_status_disconnected;
+	} else {
+		if (val & RK3588_HDMI1_LEVEL_INT)
+			ret = connector_status_connected;
+		else
+			ret = connector_status_disconnected;
+	}
+
+	return ret;
+}
+
+static void dw_hdmi_rk3588_set_pll(void *data, void *state)
+{
+	struct rockchip_hdmi *hdmi = (struct rockchip_hdmi *)data;
+	struct display_state *display_state = (struct display_state *)state;
+	struct connector_state *conn_state = &display_state->conn_state;
+	struct drm_display_mode *mode = &conn_state->mode;
+
+	if (hdmi_bus_fmt_is_yuv420(hdmi->bus_format))
+		rockchip_phy_set_pll(conn_state->phy, mode->clock / 2 * 1000);
+	else
+		rockchip_phy_set_pll(conn_state->phy, mode->clock * 1000);
+}
+
+static const struct dw_hdmi_qp_phy_ops rk3588_hdmi_phy_ops = {
+	.init = dw_hdmi_qp_rockchip_genphy_init,
+	.disable = dw_hdmi_qp_rockchip_phy_disable,
+	.read_hpd = dw_hdmi_rk3588_read_hpd,
+	.set_pll = dw_hdmi_rk3588_set_pll,
+};
+
+static const struct rockchip_connector_funcs rockchip_dw_hdmi_qp_funcs = {
+	.pre_init = rockchip_dw_hdmi_qp_pre_init,
+	.init = rockchip_dw_hdmi_qp_init,
+	.deinit = rockchip_dw_hdmi_qp_deinit,
+	.prepare = rockchip_dw_hdmi_qp_prepare,
+	.enable = rockchip_dw_hdmi_qp_enable,
+	.disable = rockchip_dw_hdmi_qp_disable,
+	.get_timing = rockchip_dw_hdmi_qp_get_timing,
+	.detect = rockchip_dw_hdmi_qp_detect,
+	.get_edid = rockchip_dw_hdmi_qp_get_edid,
+};
+
+const struct dw_hdmi_plat_data rk3588_hdmi_drv_data = {
+	.qp_phy_ops    = &rk3588_hdmi_phy_ops,
+	.phy_name   = "samsung_hdptx_phy",
+	.dev_type   = RK3588_HDMI,
+};
+
+static int rockchip_dw_hdmi_qp_probe(struct udevice *dev)
+{
+	int ret;
+	struct regmap *map;
+	struct rockchip_hdmi *hdmi = dev_get_priv(dev);
+
+	hdmi->dev = dev;
+
+	hdmi->id = of_alias_get_id(ofnode_to_np(dev->node), "hdmi");
+	if (hdmi->id < 0)
+		hdmi->id = 0;
+
+	hdmi->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
+	if (hdmi->grf <= 0) {
+		dev_err(dev, "%s: Get syscon grf failed (ret=%p)\n",
+			__func__, hdmi->grf);
+		return -ENXIO;
+	}
+
+	map = syscon_regmap_lookup_by_phandle(dev, "rockchip,vo1_grf");
+	hdmi->vo1_grf = regmap_get_range(map, 0);
+
+	if (hdmi->vo1_grf <= 0) {
+		dev_err(dev, "%s: Get syscon vo1 grf failed (ret=%p)\n",
+			__func__, hdmi->vo1_grf);
+		return -ENXIO;
+	}
+
+	ret = gpio_request_by_name(dev, "enable-gpios", 0,
+				   &hdmi->enable_gpio, GPIOD_IS_OUT);
+	if (ret) {
+		dev_err(dev, "Cannot get enable GPIO: %d\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static const struct rockchip_connector rk3588_dw_hdmi_qp_data = {
+	.funcs = &rockchip_dw_hdmi_qp_funcs,
+	.data = &rk3588_hdmi_drv_data,
+};
+
+static const struct udevice_id rockchip_dw_hdmi_qp_ids[] = {
+	{
+	 .compatible = "rockchip,rk3588-dw-hdmi",
+	 .data = (ulong)&rk3588_dw_hdmi_qp_data,
+	}, {}
+};
+
+U_BOOT_DRIVER(rockchip_dw_hdmi_qp) = {
+	.name = "rockchip_dw_hdmi_qp",
+	.id = UCLASS_DISPLAY,
+	.of_match = rockchip_dw_hdmi_qp_ids,
+	.probe	= rockchip_dw_hdmi_qp_probe,
+	.priv_auto_alloc_size = sizeof(struct rockchip_hdmi),
+};
diff --git a/drivers/video/drm/rockchip_dw_hdmi_qp.h b/drivers/video/drm/rockchip_dw_hdmi_qp.h
new file mode 100644
index 0000000000..8f3bde445e
--- /dev/null
+++ b/drivers/video/drm/rockchip_dw_hdmi_qp.h
@@ -0,0 +1,22 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2022 Fuzhou Rockchip Electronics Co., Ltd
+ */
+#ifndef _ROCKCHIP_DW_HDMI_QP_H_
+#define _ROCKCHIP_DW_HDMI_QP_H_
+
+/*
+ * Rockchip connector callbacks.
+ * If you want to know the details, please refer to rockchip_connector.h
+ */
+int rockchip_dw_hdmi_qp_pre_init(struct display_state *state);
+int rockchip_dw_hdmi_qp_init(struct display_state *state);
+void rockchip_dw_hdmi_qp_deinit(struct display_state *state);
+int rockchip_dw_hdmi_qp_prepare(struct display_state *state);
+int rockchip_dw_hdmi_qp_enable(struct display_state *state);
+int rockchip_dw_hdmi_qp_disable(struct display_state *state);
+int rockchip_dw_hdmi_qp_get_timing(struct display_state *state);
+int rockchip_dw_hdmi_qp_detect(struct display_state *state);
+int rockchip_dw_hdmi_qp_get_edid(struct display_state *state);
+
+#endif /* _ROCKCHIP_DW_HDMI_QP_H_ */
diff --git a/include/linux/dw_hdmi.h b/include/linux/dw_hdmi.h
index 974a4f837c..b769054a2c 100644
--- a/include/linux/dw_hdmi.h
+++ b/include/linux/dw_hdmi.h
@@ -140,6 +140,23 @@ struct dw_hdmi_phy_ops {
 	void (*mode_valid)(struct dw_hdmi *hdmi, void *data);
 };
 
+struct dw_hdmi_qp_phy_ops {
+	int (*init)(void *hdmi, void *data);
+	void (*disable)(void *hdmi, void *data);
+	enum drm_connector_status (*read_hpd)(void *data);
+	void (*mode_valid)(void *hdmi, void *data);
+	void (*set_pll)(void *hdmi, void *data);
+};
+
+struct dw_hdmi_link_config {
+	bool dsc_mode;
+	bool frl_mode;
+	int frl_lanes;
+	int rate_per_lane;
+	int hcactive;
+	u8 pps_payload[128];
+};
+
 struct dw_hdmi_plat_data {
 	enum dw_hdmi_devtype dev_type;
 	unsigned long input_bus_format;
@@ -148,9 +165,11 @@ struct dw_hdmi_plat_data {
 	u32 grf_vop_sel_reg;
 	/* Vendor PHY support */
 	const struct dw_hdmi_phy_ops *phy_ops;
+	const struct dw_hdmi_qp_phy_ops *qp_phy_ops;
 	const struct dw_hdmi_audio_tmds_n *tmds_n_table;
 	const char *phy_name;
 	void *phy_data;
+	void *hdmi;
 
 	/* Synopsys PHY support */
 	const struct dw_hdmi_mpll_config *mpll_cfg;
diff --git a/include/linux/hdmi.h b/include/linux/hdmi.h
index d33ae37d2b..d977eabadd 100644
--- a/include/linux/hdmi.h
+++ b/include/linux/hdmi.h
@@ -360,6 +360,8 @@ ssize_t hdmi_vendor_infoframe_pack(struct hdmi_vendor_infoframe *frame,
 int
 drm_hdmi_vendor_infoframe_from_display_mode(struct hdmi_vendor_infoframe *frame,
 					    struct drm_display_mode *mode);
+ssize_t hdmi_avi_infoframe_pack_only(const struct hdmi_avi_infoframe *frame,
+				     void *buffer, size_t size);
 int
 drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame,
 					 struct drm_display_mode *mode,

commit fea6cfaa5aac5a8d2d4a4017903a4fd1fd18814f
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Sat Jan 22 16:13:33 2022 +0800

    video/drm: Add samsung combphy hdmi driver
    
    HDMI phy-pll may be used as dclk source.
    
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
    Change-Id: Id61ac5a9a04a8ec7068329c02567c33f3a2fe7c5

diff --git a/drivers/video/drm/Kconfig b/drivers/video/drm/Kconfig
index a02cafa159..150e1b77c3 100644
--- a/drivers/video/drm/Kconfig
+++ b/drivers/video/drm/Kconfig
@@ -149,6 +149,13 @@ config DRM_ROCKCHIP_SAMSUNG_MIPI_DCPHY
 	  Enable this to support the Rockchip MIPI DCPHY
 	  with SAMSUNG IP block.
 
+config PHY_ROCKCHIP_SAMSUNG_HDPTX_HDMI
+	bool "Rockchip Samsung HDMI/DP Combo PHY HDMI driver"
+	depends on DRM_ROCKCHIP
+	help
+	  Support for Rockchip HDMI/DP Combo PHY HDMI with Samsung
+	  IP block.
+
 config ROCKCHIP_DRM_TVE
 	bool "Rockchip TVE Support"
 	depends on DRM_ROCKCHIP
diff --git a/drivers/video/drm/Makefile b/drivers/video/drm/Makefile
index 09746f40db..db5a3b7f9e 100644
--- a/drivers/video/drm/Makefile
+++ b/drivers/video/drm/Makefile
@@ -17,6 +17,7 @@ obj-$(CONFIG_DRM_ROCKCHIP_INNO_HDMI) += inno_hdmi.o
 obj-$(CONFIG_DRM_ROCKCHIP_INNO_MIPI_PHY) += inno_mipi_phy.o
 obj-$(CONFIG_DRM_ROCKCHIP_INNO_VIDEO_PHY) += inno_video_phy.o
 obj-$(CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY) += inno_video_combo_phy.o
+obj-$(CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX_HDMI) += phy-rockchip-samsung-hdptx-hdmi.o
 obj-$(CONFIG_ROCKCHIP_DRM_TVE) += rockchip_drm_tve.o
 obj-$(CONFIG_DRM_ROCKCHIP_ANALOGIX_DP) += analogix_dp.o analogix_dp_reg.o
 obj-$(CONFIG_DRM_ROCKCHIP_LVDS) += rockchip_lvds.o
diff --git a/drivers/video/drm/phy-rockchip-samsung-hdptx-hdmi.c b/drivers/video/drm/phy-rockchip-samsung-hdptx-hdmi.c
new file mode 100644
index 0000000000..8463f4226a
--- /dev/null
+++ b/drivers/video/drm/phy-rockchip-samsung-hdptx-hdmi.c
@@ -0,0 +1,1929 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Rockchip HDMI/DP Combo PHY with Samsung IP block
+ *
+ * Copyright (c) 2021 Rockchip Electronics Co. Ltd.
+ */
+
+#include <common.h>
+#include <clk-uclass.h>
+#include <dm.h>
+#include <reset.h>
+#include <regmap.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <linux/bitfield.h>
+#include <linux/iopoll.h>
+#include <asm/arch/clock.h>
+#include <dm/of_access.h>
+
+#include "rockchip_display.h"
+#include "rockchip_crtc.h"
+#include "rockchip_phy.h"
+
+#define UPDATE(x, h, l)		(((x) << (l)) & GENMASK((h), (l)))
+
+#define GRF_HDPTX_CON0			0x00
+#define HDPTX_I_PLL_EN			BIT(7)
+#define HDPTX_I_BIAS_EN			BIT(6)
+#define HDPTX_I_BGR_EN			BIT(5)
+#define GRF_HDPTX_STATUS		0x80
+#define HDPTX_O_PLL_LOCK_DONE		BIT(3)
+#define HDPTX_O_PHY_CLK_RDY		BIT(2)
+#define HDPTX_O_PHY_RDY			BIT(1)
+#define HDPTX_O_SB_RDY			BIT(0)
+
+#define CMN_REG0000			0x0000
+#define CMN_REG0001			0x0004
+#define CMN_REG0002			0x0008
+#define CMN_REG0003			0x000C
+#define CMN_REG0004			0x0010
+#define CMN_REG0005			0x0014
+#define CMN_REG0006			0x0018
+#define CMN_REG0007			0x001C
+#define CMN_REG0008			0x0020
+#define LCPLL_EN_MASK			BIT(6)
+#define LCPLL_EN(x)			UPDATE(x, 4, 4)
+#define LCPLL_LCVCO_MODE_EN_MASK	BIT(4)
+#define LCPLL_LCVCO_MODE_EN(x)		UPDATE(x, 4, 4)
+#define CMN_REG0009			0x0024
+#define CMN_REG000A			0x0028
+#define CMN_REG000B			0x002C
+#define CMN_REG000C			0x0030
+#define CMN_REG000D			0x0034
+#define CMN_REG000E			0x0038
+#define CMN_REG000F			0x003C
+#define CMN_REG0010			0x0040
+#define CMN_REG0011			0x0044
+#define CMN_REG0012			0x0048
+#define CMN_REG0013			0x004C
+#define CMN_REG0014			0x0050
+#define CMN_REG0015			0x0054
+#define CMN_REG0016			0x0058
+#define CMN_REG0017			0x005C
+#define CMN_REG0018			0x0060
+#define CMN_REG0019			0x0064
+#define CMN_REG001A			0x0068
+#define CMN_REG001B			0x006C
+#define CMN_REG001C			0x0070
+#define CMN_REG001D			0x0074
+#define CMN_REG001E			0x0078
+#define LCPLL_PI_EN_MASK		BIT(5)
+#define LCPLL_PI_EN(x)			UPDATE(x, 5, 5)
+#define LCPLL_100M_CLK_EN_MASK		BIT(0)
+#define LCPLL_100M_CLK_EN(x)		UPDATE(x, 0, 0)
+#define CMN_REG001F			0x007C
+#define CMN_REG0020			0x0080
+#define CMN_REG0021			0x0084
+#define CMN_REG0022			0x0088
+#define CMN_REG0023			0x008C
+#define CMN_REG0024			0x0090
+#define CMN_REG0025			0x0094
+#define LCPLL_PMS_IQDIV_RSTN		BIT(4)
+#define CMN_REG0026			0x0098
+#define CMN_REG0027			0x009C
+#define CMN_REG0028			0x00A0
+#define LCPLL_SDC_FRAC_EN		BIT(2)
+#define LCPLL_SDC_FRAC_RSTN		BIT(0)
+#define CMN_REG0029			0x00A4
+#define CMN_REG002A			0x00A8
+#define CMN_REG002B			0x00AC
+#define CMN_REG002C			0x00B0
+#define CMN_REG002D			0x00B4
+#define LCPLL_SDC_N_MASK		GENMASK(3, 1)
+#define LCPLL_SDC_N(x)			UPDATE(x, 3, 1)
+#define CMN_REG002E			0x00B8
+#define LCPLL_SDC_NUMBERATOR_MASK	GENMASK(5, 0)
+#define LCPLL_SDC_NUMBERATOR(x)		UPDATE(x, 5, 0)
+#define CMN_REG002F			0x00BC
+#define LCPLL_SDC_DENOMINATOR_MASK	GENMASK(7, 2)
+#define LCPLL_SDC_DENOMINATOR(x)	UPDATE(x, 7, 2)
+#define LCPLL_SDC_NDIV_RSTN		BIT(0)
+#define CMN_REG0030			0x00C0
+#define CMN_REG0031			0x00C4
+#define CMN_REG0032			0x00C8
+#define CMN_REG0033			0x00CC
+#define CMN_REG0034			0x00D0
+#define CMN_REG0035			0x00D4
+#define CMN_REG0036			0x00D8
+#define CMN_REG0037			0x00DC
+#define CMN_REG0038			0x00E0
+#define CMN_REG0039			0x00E4
+#define CMN_REG003A			0x00E8
+#define CMN_REG003B			0x00EC
+#define CMN_REG003C			0x00F0
+#define CMN_REG003D			0x00F4
+#define ROPLL_LCVCO_EN			BIT(4)
+#define CMN_REG003E			0x00F8
+#define CMN_REG003F			0x00FC
+#define CMN_REG0040			0x0100
+#define CMN_REG0041			0x0104
+#define CMN_REG0042			0x0108
+#define CMN_REG0043			0x010C
+#define CMN_REG0044			0x0110
+#define CMN_REG0045			0x0114
+#define CMN_REG0046			0x0118
+#define CMN_REG0047			0x011C
+#define CMN_REG0048			0x0120
+#define CMN_REG0049			0x0124
+#define CMN_REG004A			0x0128
+#define CMN_REG004B			0x012C
+#define CMN_REG004C			0x0130
+#define CMN_REG004D			0x0134
+#define CMN_REG004E			0x0138
+#define ROPLL_PI_EN			BIT(5)
+#define CMN_REG004F			0x013C
+#define CMN_REG0050			0x0140
+#define CMN_REG0051			0x0144
+#define CMN_REG0052			0x0148
+#define CMN_REG0053			0x014C
+#define CMN_REG0054			0x0150
+#define CMN_REG0055			0x0154
+#define CMN_REG0056			0x0158
+#define CMN_REG0057			0x015C
+#define CMN_REG0058			0x0160
+#define CMN_REG0059			0x0164
+#define CMN_REG005A			0x0168
+#define CMN_REG005B			0x016C
+#define CMN_REG005C			0x0170
+#define ROPLL_PMS_IQDIV_RSTN		BIT(5)
+#define CMN_REG005D			0x0174
+#define CMN_REG005E			0x0178
+#define ROPLL_SDM_EN_MASK		BIT(6)
+#define ROPLL_SDM_EN(x)			UPDATE(x, 6, 6)
+#define ROPLL_SDM_FRAC_EN_RBR		BIT(3)
+#define ROPLL_SDM_FRAC_EN_HBR		BIT(2)
+#define ROPLL_SDM_FRAC_EN_HBR2		BIT(1)
+#define ROPLL_SDM_FRAC_EN_HBR3		BIT(0)
+#define CMN_REG005F			0x017C
+#define CMN_REG0060			0x0180
+#define CMN_REG0061			0x0184
+#define CMN_REG0062			0x0188
+#define CMN_REG0063			0x018C
+#define CMN_REG0064			0x0190
+#define ROPLL_SDM_NUM_SIGN_RBR_MASK	BIT(3)
+#define ROPLL_SDM_NUM_SIGN_RBR(x)	UPDATE(x, 3, 3)
+#define CMN_REG0065			0x0194
+#define CMN_REG0066			0x0198
+#define CMN_REG0067			0x019C
+#define CMN_REG0068			0x01A0
+#define CMN_REG0069			0x01A4
+#define ROPLL_SDC_N_RBR_MASK		GENMASK(2, 0)
+#define ROPLL_SDC_N_RBR(x)		UPDATE(x, 2, 0)
+#define CMN_REG006A			0x01A8
+#define CMN_REG006B			0x01AC
+#define CMN_REG006C			0x01B0
+#define CMN_REG006D			0x01B4
+#define CMN_REG006E			0x01B8
+#define CMN_REG006F			0x01BC
+#define CMN_REG0070			0x01C0
+#define CMN_REG0071			0x01C4
+#define CMN_REG0072			0x01C8
+#define CMN_REG0073			0x01CC
+#define CMN_REG0074			0x01D0
+#define ROPLL_SDC_NDIV_RSTN		BIT(2)
+#define ROPLL_SSC_EN			BIT(0)
+#define CMN_REG0075			0x01D4
+#define CMN_REG0076			0x01D8
+#define CMN_REG0077			0x01DC
+#define CMN_REG0078			0x01E0
+#define CMN_REG0079			0x01E4
+#define CMN_REG007A			0x01E8
+#define CMN_REG007B			0x01EC
+#define CMN_REG007C			0x01F0
+#define CMN_REG007D			0x01F4
+#define CMN_REG007E			0x01F8
+#define CMN_REG007F			0x01FC
+#define CMN_REG0080			0x0200
+#define CMN_REG0081			0x0204
+#define OVRD_PLL_CD_CLK_EN		BIT(8)
+#define PLL_CD_HSCLK_EAST_EN		BIT(0)
+#define CMN_REG0082			0x0208
+#define CMN_REG0083			0x020C
+#define CMN_REG0084			0x0210
+#define CMN_REG0085			0x0214
+#define CMN_REG0086			0x0218
+#define PLL_PCG_POSTDIV_SEL_MASK	GENMASK(7, 4)
+#define PLL_PCG_POSTDIV_SEL(x)		UPDATE(x, 7, 4)
+#define PLL_PCG_CLK_SEL_MASK		GENMASK(3, 1)
+#define PLL_PCG_CLK_SEL(x)		UPDATE(x, 3, 1)
+#define PLL_PCG_CLK_EN			BIT(0)
+#define CMN_REG0087			0x021C
+#define PLL_FRL_MODE_EN			BIT(3)
+#define PLL_TX_HS_CLK_EN		BIT(2)
+#define CMN_REG0088			0x0220
+#define CMN_REG0089			0x0224
+#define LCPLL_ALONE_MODE		BIT(1)
+#define CMN_REG008A			0x0228
+#define CMN_REG008B			0x022C
+#define CMN_REG008C			0x0230
+#define CMN_REG008D			0x0234
+#define CMN_REG008E			0x0238
+#define CMN_REG008F			0x023C
+#define CMN_REG0090			0x0240
+#define CMN_REG0091			0x0244
+#define CMN_REG0092			0x0248
+#define CMN_REG0093			0x024C
+#define CMN_REG0094			0x0250
+#define CMN_REG0095			0x0254
+#define CMN_REG0096			0x0258
+#define CMN_REG0097			0x025C
+#define DIG_CLK_SEL			BIT(1)
+#define ROPLL_REF			BIT(1)
+#define LCPLL_REF			0
+#define CMN_REG0098			0x0260
+#define CMN_REG0099			0x0264
+#define CMN_ROPLL_ALONE_MODE		BIT(2)
+#define ROPLL_ALONE_MODE		BIT(2)
+#define CMN_REG009A			0x0268
+#define HS_SPEED_SEL			BIT(0)
+#define DIV_10_CLOCK			BIT(0)
+#define CMN_REG009B			0x026C
+#define IS_SPEED_SEL			BIT(4)
+#define LINK_SYMBOL_CLOCK		BIT(4)
+#define LINK_SYMBOL_CLOCK1_2		0
+#define CMN_REG009C			0x0270
+#define CMN_REG009D			0x0274
+#define CMN_REG009E			0x0278
+#define CMN_REG009F			0x027C
+#define CMN_REG00A0			0x0280
+#define CMN_REG00A1			0x0284
+#define CMN_REG00A2			0x0288
+#define CMN_REG00A3			0x028C
+#define CMN_REG00AD			0x0290
+#define CMN_REG00A5			0x0294
+#define CMN_REG00A6			0x0298
+#define CMN_REG00A7			0x029C
+#define SB_REG0100			0x0400
+#define SB_REG0101			0x0404
+#define SB_REG0102			0x0408
+#define OVRD_SB_RXTERM_EN_MASK		BIT(5)
+#define OVRD_SB_RXTERM_EN(x)		UPDATE(x, 5, 5)
+#define SB_RXTERM_EN_MASK		BIT(4)
+#define SB_RXTERM_EN(x)			UPDATE(x, 4, 4)
+#define ANA_SB_RXTERM_OFFSP_MASK	GENMASK(3, 0)
+#define ANA_SB_RXTERM_OFFSP(x)		UPDATE(x, 3, 0)
+#define SB_REG0103			0x040C
+#define ANA_SB_RXTERM_OFFSN_MASK	GENMASK(6, 3)
+#define ANA_SB_RXTERM_OFFSN(x)		UPDATE(x, 6, 3)
+#define OVRD_SB_RX_RESCAL_DONE_MASK	BIT(1)
+#define OVRD_SB_RX_RESCAL_DONE(x)	UPDATE(x, 1, 1)
+#define SB_RX_RESCAL_DONE_MASK		BIT(0)
+#define SB_RX_RESCAL_DONE(x)		UPDATE(x, 0, 0)
+#define SB_REG0104			0x0410
+#define OVRD_SB_EN_MASK			BIT(5)
+#define OVRD_SB_EN(x)			UPDATE(x, 5, 5)
+#define SB_EN_MASK			BIT(4)
+#define SB_EN(x)			UPDATE(x, 4, 4)
+#define SB_REG0105			0x0414
+#define OVRD_SB_EARC_CMDC_EN_MASK	BIT(6)
+#define OVRD_SB_EARC_CMDC_EN(x)		UPDATE(x, 6, 6)
+#define SB_EARC_CMDC_EN_MASK		BIT(5)
+#define SB_EARC_CMDC_EN(x)		UPDATE(x, 5, 5)
+#define ANA_SB_TX_HLVL_PROG_MASK	GENMASK(2, 0)
+#define ANA_SB_TX_HLVL_PROG(x)		UPDATE(x, 2, 0)
+#define SB_REG0106			0x0418
+#define ANA_SB_TX_LLVL_PROG_MASK	GENMASK(6, 4)
+#define ANA_SB_TX_LLVL_PROG(x)		UPDATE(x, 6, 4)
+#define SB_REG0107			0x041C
+#define SB_REG0108			0x0420
+#define SB_REG0109			0x0424
+#define ANA_SB_DMRX_AFC_DIV_RATIO_MASK	GENMASK(2, 0)
+#define ANA_SB_DMRX_AFC_DIV_RATIO(x)	UPDATE(x, 2, 0)
+#define SB_REG010A			0x0428
+#define SB_REG010B			0x042C
+#define SB_REG010C			0x0430
+#define SB_REG010D			0x0434
+#define SB_REG010E			0x0438
+#define SB_REG010F			0x043C
+#define OVRD_SB_VREG_EN_MASK		BIT(7)
+#define OVRD_SB_VREG_EN(x)		UPDATE(x, 7, 7)
+#define SB_VREG_EN_MASK			BIT(6)
+#define SB_VREG_EN(x)			UPDATE(x, 6, 6)
+#define OVRD_SB_VREG_LPF_BYPASS_MASK	BIT(5)
+#define OVRD_SB_VREG_LPF_BYPASS(x)	UPDATE(x, 5, 5)
+#define SB_VREG_LPF_BYPASS_MASK		BIT(4)
+#define SB_VREG_LPF_BYPASS(x)		UPDATE(x, 4, 4)
+#define ANA_SB_VREG_GAIN_CTRL_MASK	GENMASK(3, 0)
+#define ANA_SB_VREG_GAIN_CTRL(x)	UPDATE(x, 3, 0)
+#define SB_REG0110			0x0440
+#define ANA_SB_VREG_REF_SEL_MASK	BIT(0)
+#define ANA_SB_VREG_REF_SEL(x)		UPDATE(x, 0, 0)
+#define SB_REG0111			0x0444
+#define SB_REG0112			0x0448
+#define SB_REG0113			0x044C
+#define SB_RX_RCAL_OPT_CODE_MASK	GENMASK(5, 4)
+#define SB_RX_RCAL_OPT_CODE(x)		UPDATE(x, 5, 4)
+#define SB_RX_RTERM_CTRL_MASK		GENMASK(3, 0)
+#define SB_RX_RTERM_CTRL(x)		UPDATE(x, 3, 0)
+#define SB_REG0114			0x0450
+#define SB_TG_SB_EN_DELAY_TIME_MASK	GENMASK(5, 3)
+#define SB_TG_SB_EN_DELAY_TIME(x)	UPDATE(x, 5, 3)
+#define SB_TG_RXTERM_EN_DELAY_TIME_MASK	GENMASK(2, 0)
+#define SB_TG_RXTERM_EN_DELAY_TIME(x)	UPDATE(x, 2, 0)
+#define SB_REG0115			0x0454
+#define SB_READY_DELAY_TIME_MASK	GENMASK(5, 3)
+#define SB_READY_DELAY_TIME(x)		UPDATE(x, 5, 3)
+#define SB_TG_OSC_EN_DELAY_TIME_MASK	GENMASK(2, 0)
+#define SB_TG_OSC_EN_DELAY_TIME(x)	UPDATE(x, 2, 0)
+#define SB_REG0116			0x0458
+#define AFC_RSTN_DELAY_TIME_MASK	GENMASK(6, 4)
+#define AFC_RSTN_DELAY_TIME(x)		UPDATE(x, 6, 4)
+#define SB_REG0117			0x045C
+#define FAST_PULSE_TIME_MASK		GENMASK(3, 0)
+#define FAST_PULSE_TIME(x)		UPDATE(x, 3, 0)
+#define SB_REG0118			0x0460
+#define SB_REG0119			0x0464
+#define SB_REG011A			0x0468
+#define SB_REG011B			0x046C
+#define SB_EARC_SIG_DET_BYPASS_MASK	BIT(4)
+#define SB_EARC_SIG_DET_BYPASS(x)	UPDATE(x, 4, 4)
+#define SB_AFC_TOL_MASK			GENMASK(3, 0)
+#define SB_AFC_TOL(x)			UPDATE(x, 3, 0)
+#define SB_REG011C			0x0470
+#define SB_REG011D			0x0474
+#define SB_REG011E			0x0478
+#define SB_REG011F			0x047C
+#define SB_PWM_AFC_CTRL_MASK		GENMASK(7, 2)
+#define SB_PWM_AFC_CTRL(x)		UPDATE(x, 7, 2)
+#define SB_RCAL_RSTN_MASK		BIT(1)
+#define SB_RCAL_RSTN(x)			UPDATE(x, 1, 1)
+#define SB_REG0120			0x0480
+#define SB_EARC_EN_MASK			BIT(1)
+#define SB_EARC_EN(x)			UPDATE(x, 1, 1)
+#define SB_EARC_AFC_EN_MASK		BIT(2)
+#define SB_EARC_AFC_EN(x)		UPDATE(x, 2, 2)
+#define SB_REG0121			0x0484
+#define SB_REG0122			0x0488
+#define SB_REG0123			0x048C
+#define OVRD_SB_READY_MASK		BIT(5)
+#define OVRD_SB_READY(x)		UPDATE(x, 5, 5)
+#define SB_READY_MASK			BIT(4)
+#define SB_READY(x)			UPDATE(x, 4, 4)
+#define SB_REG0124			0x0490
+#define SB_REG0125			0x0494
+#define SB_REG0126			0x0498
+#define SB_REG0127			0x049C
+#define SB_REG0128			0x04A0
+#define SB_REG0129			0x04AD
+#define LNTOP_REG0200			0x0800
+#define PROTOCOL_SEL			BIT(2)
+#define HDMI_MODE			BIT(2)
+#define HDMI_TMDS_FRL_SEL		BIT(1)
+#define LNTOP_REG0201			0x0804
+#define LNTOP_REG0202			0x0808
+#define LNTOP_REG0203			0x080C
+#define LNTOP_REG0204			0x0810
+#define LNTOP_REG0205			0x0814
+#define LNTOP_REG0206			0x0818
+#define DATA_BUS_WIDTH			(0x3 << 1)
+#define WIDTH_40BIT			(0x3 << 1)
+#define WIDTH_36BIT			(0x2 << 1)
+#define DATA_BUS_SEL			BIT(0)
+#define DATA_BUS_36_40			BIT(0)
+#define LNTOP_REG0207			0x081C
+#define LANE_EN				0xf
+#define ALL_LANE_EN			0xf
+#define LNTOP_REG0208			0x0820
+#define LNTOP_REG0209			0x0824
+#define LNTOP_REG020A			0x0828
+#define LNTOP_REG020B			0x082C
+#define LNTOP_REG020C			0x0830
+#define LNTOP_REG020D			0x0834
+#define LNTOP_REG020E			0x0838
+#define LNTOP_REG020F			0x083C
+#define LNTOP_REG0210			0x0840
+#define LNTOP_REG0211			0x0844
+#define LNTOP_REG0212			0x0848
+#define LNTOP_REG0213			0x084C
+#define LNTOP_REG0214			0x0850
+#define LNTOP_REG0215			0x0854
+#define LNTOP_REG0216			0x0858
+#define LNTOP_REG0217			0x085C
+#define LNTOP_REG0218			0x0860
+#define LNTOP_REG0219			0x0864
+#define LNTOP_REG021A			0x0868
+#define LNTOP_REG021B			0x086C
+#define LNTOP_REG021C			0x0870
+#define LNTOP_REG021D			0x0874
+#define LNTOP_REG021E			0x0878
+#define LNTOP_REG021F			0x087C
+#define LNTOP_REG0220			0x0880
+#define LNTOP_REG0221			0x0884
+#define LNTOP_REG0222			0x0888
+#define LNTOP_REG0223			0x088C
+#define LNTOP_REG0224			0x0890
+#define LNTOP_REG0225			0x0894
+#define LNTOP_REG0226			0x0898
+#define LNTOP_REG0227			0x089C
+#define LNTOP_REG0228			0x08A0
+#define LNTOP_REG0229			0x08A4
+#define LANE_REG0300			0x0C00
+#define LANE_REG0301			0x0C04
+#define LANE_REG0302			0x0C08
+#define LANE_REG0303			0x0C0C
+#define LANE_REG0304			0x0C10
+#define LANE_REG0305			0x0C14
+#define LANE_REG0306			0x0C18
+#define LANE_REG0307			0x0C1C
+#define LANE_REG0308			0x0C20
+#define LANE_REG0309			0x0C24
+#define LANE_REG030A			0x0C28
+#define LANE_REG030B			0x0C2C
+#define LANE_REG030C			0x0C30
+#define LANE_REG030D			0x0C34
+#define LANE_REG030E			0x0C38
+#define LANE_REG030F			0x0C3C
+#define LANE_REG0310			0x0C40
+#define LANE_REG0311			0x0C44
+#define LANE_REG0312			0x0C48
+#define LN0_TX_SER_RATE_SEL_RBR		BIT(5)
+#define LN0_TX_SER_RATE_SEL_HBR		BIT(4)
+#define LN0_TX_SER_RATE_SEL_HBR2	BIT(3)
+#define LN0_TX_SER_RATE_SEL_HBR3	BIT(2)
+#define LANE_REG0313			0x0C4C
+#define LANE_REG0314			0x0C50
+#define LANE_REG0315			0x0C54
+#define LANE_REG0316			0x0C58
+#define LANE_REG0317			0x0C5C
+#define LANE_REG0318			0x0C60
+#define LANE_REG0319			0x0C64
+#define LANE_REG031A			0x0C68
+#define LANE_REG031B			0x0C6C
+#define LANE_REG031C			0x0C70
+#define LANE_REG031D			0x0C74
+#define LANE_REG031E			0x0C78
+#define LANE_REG031F			0x0C7C
+#define LANE_REG0320			0x0C80
+#define LANE_REG0321			0x0C84
+#define LANE_REG0322			0x0C88
+#define LANE_REG0323			0x0C8C
+#define LANE_REG0324			0x0C90
+#define LANE_REG0325			0x0C94
+#define LANE_REG0326			0x0C98
+#define LANE_REG0327			0x0C9C
+#define LANE_REG0328			0x0CA0
+#define LANE_REG0329			0x0CA4
+#define LANE_REG032A			0x0CA8
+#define LANE_REG032B			0x0CAC
+#define LANE_REG032C			0x0CB0
+#define LANE_REG032D			0x0CB4
+#define LANE_REG0400			0x1000
+#define LANE_REG0401			0x1004
+#define LANE_REG0402			0x1008
+#define LANE_REG0403			0x100C
+#define LANE_REG0404			0x1010
+#define LANE_REG0405			0x1014
+#define LANE_REG0406			0x1018
+#define LANE_REG0407			0x101C
+#define LANE_REG0408			0x1020
+#define LANE_REG0409			0x1024
+#define LANE_REG040A			0x1028
+#define LANE_REG040B			0x102C
+#define LANE_REG040C			0x1030
+#define LANE_REG040D			0x1034
+#define LANE_REG040E			0x1038
+#define LANE_REG040F			0x103C
+#define LANE_REG0410			0x1040
+#define LANE_REG0411			0x1044
+#define LANE_REG0412			0x1048
+#define LN1_TX_SER_RATE_SEL_RBR		BIT(5)
+#define LN1_TX_SER_RATE_SEL_HBR		BIT(4)
+#define LN1_TX_SER_RATE_SEL_HBR2	BIT(3)
+#define LN1_TX_SER_RATE_SEL_HBR3	BIT(2)
+#define LANE_REG0413			0x104C
+#define LANE_REG0414			0x1050
+#define LANE_REG0415			0x1054
+#define LANE_REG0416			0x1058
+#define LANE_REG0417			0x105C
+#define LANE_REG0418			0x1060
+#define LANE_REG0419			0x1064
+#define LANE_REG041A			0x1068
+#define LANE_REG041B			0x106C
+#define LANE_REG041C			0x1070
+#define LANE_REG041D			0x1074
+#define LANE_REG041E			0x1078
+#define LANE_REG041F			0x107C
+#define LANE_REG0420			0x1080
+#define LANE_REG0421			0x1084
+#define LANE_REG0422			0x1088
+#define LANE_REG0423			0x108C
+#define LANE_REG0424			0x1090
+#define LANE_REG0425			0x1094
+#define LANE_REG0426			0x1098
+#define LANE_REG0427			0x109C
+#define LANE_REG0428			0x10A0
+#define LANE_REG0429			0x10A4
+#define LANE_REG042A			0x10A8
+#define LANE_REG042B			0x10AC
+#define LANE_REG042C			0x10B0
+#define LANE_REG042D			0x10B4
+#define LANE_REG0500			0x1400
+#define LANE_REG0501			0x1404
+#define LANE_REG0502			0x1408
+#define LANE_REG0503			0x140C
+#define LANE_REG0504			0x1410
+#define LANE_REG0505			0x1414
+#define LANE_REG0506			0x1418
+#define LANE_REG0507			0x141C
+#define LANE_REG0508			0x1420
+#define LANE_REG0509			0x1424
+#define LANE_REG050A			0x1428
+#define LANE_REG050B			0x142C
+#define LANE_REG050C			0x1430
+#define LANE_REG050D			0x1434
+#define LANE_REG050E			0x1438
+#define LANE_REG050F			0x143C
+#define LANE_REG0510			0x1440
+#define LANE_REG0511			0x1444
+#define LANE_REG0512			0x1448
+#define LN2_TX_SER_RATE_SEL_RBR		BIT(5)
+#define LN2_TX_SER_RATE_SEL_HBR		BIT(4)
+#define LN2_TX_SER_RATE_SEL_HBR2	BIT(3)
+#define LN2_TX_SER_RATE_SEL_HBR3	BIT(2)
+#define LANE_REG0513			0x144C
+#define LANE_REG0514			0x1450
+#define LANE_REG0515			0x1454
+#define LANE_REG0516			0x1458
+#define LANE_REG0517			0x145C
+#define LANE_REG0518			0x1460
+#define LANE_REG0519			0x1464
+#define LANE_REG051A			0x1468
+#define LANE_REG051B			0x146C
+#define LANE_REG051C			0x1470
+#define LANE_REG051D			0x1474
+#define LANE_REG051E			0x1478
+#define LANE_REG051F			0x147C
+#define LANE_REG0520			0x1480
+#define LANE_REG0521			0x1484
+#define LANE_REG0522			0x1488
+#define LANE_REG0523			0x148C
+#define LANE_REG0524			0x1490
+#define LANE_REG0525			0x1494
+#define LANE_REG0526			0x1498
+#define LANE_REG0527			0x149C
+#define LANE_REG0528			0x14A0
+#define LANE_REG0529			0x14AD
+#define LANE_REG052A			0x14A8
+#define LANE_REG052B			0x14AC
+#define LANE_REG052C			0x14B0
+#define LANE_REG052D			0x14B4
+#define LANE_REG0600			0x1800
+#define LANE_REG0601			0x1804
+#define LANE_REG0602			0x1808
+#define LANE_REG0603			0x180C
+#define LANE_REG0604			0x1810
+#define LANE_REG0605			0x1814
+#define LANE_REG0606			0x1818
+#define LANE_REG0607			0x181C
+#define LANE_REG0608			0x1820
+#define LANE_REG0609			0x1824
+#define LANE_REG060A			0x1828
+#define LANE_REG060B			0x182C
+#define LANE_REG060C			0x1830
+#define LANE_REG060D			0x1834
+#define LANE_REG060E			0x1838
+#define LANE_REG060F			0x183C
+#define LANE_REG0610			0x1840
+#define LANE_REG0611			0x1844
+#define LANE_REG0612			0x1848
+#define LN3_TX_SER_RATE_SEL_RBR		BIT(5)
+#define LN3_TX_SER_RATE_SEL_HBR		BIT(4)
+#define LN3_TX_SER_RATE_SEL_HBR2	BIT(3)
+#define LN3_TX_SER_RATE_SEL_HBR3	BIT(2)
+#define LANE_REG0613			0x184C
+#define LANE_REG0614			0x1850
+#define LANE_REG0615			0x1854
+#define LANE_REG0616			0x1858
+#define LANE_REG0617			0x185C
+#define LANE_REG0618			0x1860
+#define LANE_REG0619			0x1864
+#define LANE_REG061A			0x1868
+#define LANE_REG061B			0x186C
+#define LANE_REG061C			0x1870
+#define LANE_REG061D			0x1874
+#define LANE_REG061E			0x1878
+#define LANE_REG061F			0x187C
+#define LANE_REG0620			0x1880
+#define LANE_REG0621			0x1884
+#define LANE_REG0622			0x1888
+#define LANE_REG0623			0x188C
+#define LANE_REG0624			0x1890
+#define LANE_REG0625			0x1894
+#define LANE_REG0626			0x1898
+#define LANE_REG0627			0x189C
+#define LANE_REG0628			0x18A0
+#define LANE_REG0629			0x18A4
+#define LANE_REG062A			0x18A8
+#define LANE_REG062B			0x18AC
+#define LANE_REG062C			0x18B0
+#define LANE_REG062D			0x18B4
+
+#define DATA_RATE_MASK 0xFFFFFFF
+#define COLOR_DEPTH_MASK BIT(31)
+#define HDMI_MODE_MASK BIT(30)
+#define HDMI_EARC_MASK BIT(29)
+
+struct lcpll_config {
+	u32 bit_rate;
+	u8 lcvco_mode_en;
+	u8 pi_en;
+	u8 clk_en_100m;
+	u8 pms_mdiv;
+	u8 pms_mdiv_afc;
+	u8 pms_pdiv;
+	u8 pms_refdiv;
+	u8 pms_sdiv;
+	u8 pi_cdiv_rstn;
+	u8 pi_cdiv_sel;
+	u8 sdm_en;
+	u8 sdm_rstn;
+	u8 sdc_frac_en;
+	u8 sdc_rstn;
+	u8 sdm_deno;
+	u8 sdm_num_sign;
+	u8 sdm_num;
+	u8 sdc_n;
+	u8 sdc_n2;
+	u8 sdc_num;
+	u8 sdc_deno;
+	u8 sdc_ndiv_rstn;
+	u8 ssc_en;
+	u8 ssc_fm_dev;
+	u8 ssc_fm_freq;
+	u8 ssc_clk_div_sel;
+	u8 cd_tx_ser_rate_sel;
+};
+
+struct ropll_config {
+	u32 bit_rate;
+	u8 pms_mdiv;
+	u8 pms_mdiv_afc;
+	u8 pms_pdiv;
+	u8 pms_refdiv;
+	u8 pms_sdiv;
+	u8 pms_iqdiv_rstn;
+	u8 ref_clk_sel;
+	u8 sdm_en;
+	u8 sdm_rstn;
+	u8 sdc_frac_en;
+	u8 sdc_rstn;
+	u8 sdm_clk_div;
+	u8 sdm_deno;
+	u8 sdm_num_sign;
+	u8 sdm_num;
+	u8 sdc_n;
+	u8 sdc_num;
+	u8 sdc_deno;
+	u8 sdc_ndiv_rstn;
+	u8 ssc_en;
+	u8 ssc_fm_dev;
+	u8 ssc_fm_freq;
+	u8 ssc_clk_div_sel;
+	u8 ana_cpp_ctrl;
+	u8 ana_lpf_c_sel;
+	u8 cd_tx_ser_rate_sel;
+};
+
+struct rockchip_hdptx_phy {
+	struct udevice *dev;
+	void __iomem *base;
+	struct regmap *grf;
+
+	int id;
+	bool dclk_en;
+	bool pll_locked;
+
+	unsigned long rate;
+	u32 bus_width;
+
+	struct reset_ctl apb_reset;
+	struct reset_ctl cmn_reset;
+	struct reset_ctl init_reset;
+	struct reset_ctl lane_reset;
+	struct reset_ctl phy_reset;
+	struct reset_ctl ropll_reset;
+	struct reset_ctl lcpll_reset;
+};
+
+struct clk_hdptx {
+	struct udevice *dev;
+	ulong rate;
+};
+
+/* global variables are used to pass reource from phy drivers to clk driver */
+static struct rockchip_hdptx_phy *g_hdptx0;
+static struct rockchip_hdptx_phy *g_hdptx1;
+
+struct lcpll_config lcpll_cfg[] = {
+	{ 48000000, 1, 0, 0, 0x7d, 0x7d, 1, 1, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 2,
+		0, 0x13, 0x18, 1, 0, 0x20, 0x0c, 1, 0,
+	},
+	{ 40000000, 1, 1, 0, 0x68, 0x68, 1, 1, 0, 0, 0, 1, 1, 1, 1, 9, 0, 1, 1,
+		0, 2, 3, 1, 0, 0x20, 0x0c, 1, 0,
+	},
+	{ 32000000, 1, 1, 1, 0x6b, 0x6b, 1, 1, 0, 1, 2, 1, 1, 1, 1, 9, 1, 2, 1,
+		0, 0x0d, 0x18, 1, 0, 0x20, 0x0c, 1, 1,
+	},
+	{ ~0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+		0, 0, 0, 0, 0, 0,
+	},
+};
+
+struct ropll_config ropll_frl_cfg[] = {
+	{ 24000000, 0x19, 0x19, 1, 1, 0, 1, 2, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 1, 0,
+		0, 0x20, 0x0c, 1, 0x0e, 0, 0,
+	},
+	{ 18000000, 0x7d, 0x7d, 1, 1, 0, 1, 1, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 1, 0,
+		0, 0x20, 0x0c, 1, 0x0e, 0, 0,
+	},
+	{ 9000000, 0x7d, 0x7d, 1, 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 1, 0,
+		0, 0x20, 0x0c, 1, 0x0e, 0, 0,
+	},
+	{ ~0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+		0, 0, 0, 0,
+	},
+};
+
+struct ropll_config ropll_tmds_cfg[] = {
+	{ 5940000, 124, 124, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0,
+		1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0,
+	},
+	{ 3712500, 155, 155, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0,
+		1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0,
+	},
+	{ 2970000, 124, 124, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0,
+		1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0,
+	},
+	{ 1620000, 135, 135, 1, 1, 3, 1, 1, 0, 1, 1, 1, 1, 4, 0, 3, 5, 5, 0x10,
+		1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0,
+	},
+	{ 1856250, 155, 155, 1, 1, 3, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0,
+		1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0,
+	},
+	{ 1485000, 0x7b, 0x7b, 1, 1, 3, 1, 1, 1, 1, 1, 1, 1, 4, 0, 3, 5, 5, 0x10,
+		1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0,
+	},
+	{ 1462500, 122, 122, 1, 1, 4, 1, 1, 1, 1, 1, 1, 1, 244, 1, 16, 1, 0, 1,
+		1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0,
+	},
+	{ 1065000, 89, 89, 1, 1, 3, 1, 1, 1, 1, 1, 1, 1, 89, 1, 16, 1, 0, 1,
+		1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0,
+	},
+	{ 1080000, 135, 135, 1, 1, 5, 1, 1, 0, 1, 0, 1, 1, 0x9, 0, 0x05, 0, 0x14,
+		0x18, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0,
+	},
+	{ 855000, 125, 125, 1, 1, 6, 1, 1, 1, 1, 1, 1, 1, 80, 1, 16, 2, 0,
+		1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0,
+	},
+	{ 835000, 105, 105, 1, 1, 5, 1, 1, 1, 1, 1, 1, 1, 42, 1, 16, 1, 0,
+		1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0,
+	},
+	{ 928125, 155, 155, 1, 1, 7, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0,
+		1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0,
+	},
+	{ 742500, 124, 124, 1, 1, 7, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0,
+		1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0,
+	},
+	{ 650000, 162, 162, 1, 1, 11, 1, 1, 1, 1, 1, 1, 1, 54, 0, 16, 4, 1,
+		1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0,
+	},
+	{ 337500, 0x70, 0x70, 1, 1, 0xf, 1, 1, 1, 1, 1, 1, 1, 0x2, 0, 0x01, 5, 1,
+		1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0,
+	},
+	{ 400000, 100, 100, 1, 1, 11, 1, 1, 0, 1, 0, 1, 1, 0x9, 0, 0x05, 0, 0x14,
+		0x18, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0,
+	},
+	{ 270000, 0x5a, 0x5a, 1, 1, 0xf, 1, 1, 0, 1, 0, 1, 1, 0x9, 0, 0x05, 0, 0x14,
+		0x18, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0,
+	},
+	{ 251750, 84, 84, 1, 1, 0xf, 1, 1, 1, 1, 1, 1, 1, 168, 1, 16, 4, 1,
+		1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0,
+	},
+	{ ~0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+		0, 0, 0, 0,
+	},
+};
+
+static inline void hdptx_write(struct rockchip_hdptx_phy *hdptx, uint reg,
+			       uint val)
+{
+	writel(val, hdptx->base + reg);
+}
+
+static inline uint hdptx_read(struct rockchip_hdptx_phy *hdptx, uint reg)
+{
+	return readl(hdptx->base + reg);
+}
+
+static void hdptx_update_bits(struct rockchip_hdptx_phy *hdptx, uint reg,
+			      uint mask, uint val)
+{
+	uint orig, tmp;
+
+	orig = hdptx_read(hdptx, reg);
+	tmp = orig & ~mask;
+	tmp |= val & mask;
+	hdptx_write(hdptx, reg, tmp);
+}
+
+static void hdptx_grf_write(struct rockchip_hdptx_phy *hdptx, uint reg,
+			    uint val)
+{
+	regmap_write(hdptx->grf, reg, val);
+}
+
+static uint hdptx_grf_read(struct rockchip_hdptx_phy *hdptx, uint reg)
+{
+	uint val;
+	int ret;
+
+	ret = regmap_read(hdptx->grf, reg, &val);
+	if (ret)
+		dev_err(hdptx->dev, "regmap_read err:%d", ret);
+
+	return val;
+}
+
+static void hdptx_pre_power_up(struct rockchip_hdptx_phy *hdptx)
+{
+	u32 val = 0;
+
+	reset_assert(&hdptx->apb_reset);
+	udelay(20);
+	reset_deassert(&hdptx->apb_reset);
+
+	reset_assert(&hdptx->lane_reset);
+	reset_assert(&hdptx->cmn_reset);
+	reset_assert(&hdptx->init_reset);
+
+	val = (HDPTX_I_PLL_EN | HDPTX_I_BIAS_EN | HDPTX_I_BGR_EN) << 16;
+	hdptx_grf_write(hdptx, GRF_HDPTX_CON0, val);
+}
+
+static int hdptx_post_enable_lane(struct rockchip_hdptx_phy *hdptx)
+{
+	u32 val = 0;
+	int i;
+
+	reset_deassert(&hdptx->lane_reset);
+
+	val = (HDPTX_I_BIAS_EN | HDPTX_I_BGR_EN) << 16 | HDPTX_I_BIAS_EN |
+		HDPTX_I_BGR_EN;
+	hdptx_grf_write(hdptx, GRF_HDPTX_CON0, val);
+
+	val = 0;
+	for (i = 0; i < 20; i++) {
+		val = hdptx_grf_read(hdptx, GRF_HDPTX_STATUS);
+
+		if (val & HDPTX_O_PHY_RDY && val & HDPTX_O_PLL_LOCK_DONE)
+			break;
+		udelay(100);
+	}
+
+	if (i == 20) {
+		dev_err(hdptx->dev, "hdptx phy lane can't ready!\n");
+		return -EINVAL;
+	}
+
+	dev_err(hdptx->dev, "hdptx phy lane locked!\n");
+
+	return 0;
+}
+
+static int hdptx_post_enable_pll(struct rockchip_hdptx_phy *hdptx)
+{
+	u32 val = 0;
+	int i;
+
+	val = (HDPTX_I_BIAS_EN | HDPTX_I_BGR_EN) << 16 | HDPTX_I_BIAS_EN |
+		HDPTX_I_BGR_EN;
+	hdptx_grf_write(hdptx, GRF_HDPTX_CON0, val);
+	udelay(10);
+	reset_deassert(&hdptx->init_reset);
+	udelay(10);
+	val = HDPTX_I_PLL_EN << 16 | HDPTX_I_PLL_EN;
+	hdptx_grf_write(hdptx, GRF_HDPTX_CON0, val);
+	udelay(10);
+	reset_deassert(&hdptx->cmn_reset);
+
+	val = 0;
+	for (i = 0; i < 20; i++) {
+		val = hdptx_grf_read(hdptx, GRF_HDPTX_STATUS);
+
+		if (val & HDPTX_O_PHY_CLK_RDY)
+			break;
+		udelay(20);
+	}
+
+	if (i == 20) {
+		dev_err(hdptx->dev, "hdptx phy pll can't lock!\n");
+		return -EINVAL;
+	}
+
+	hdptx->pll_locked = true;
+	dev_err(hdptx->dev, "hdptx phy pll locked!\n");
+
+	return 0;
+}
+
+static int hdptx_post_power_up(struct rockchip_hdptx_phy *hdptx)
+{
+	u32 val = 0;
+	int i;
+
+	val = (HDPTX_I_BIAS_EN | HDPTX_I_BGR_EN) << 16 | HDPTX_I_BIAS_EN |
+		HDPTX_I_BGR_EN;
+	hdptx_grf_write(hdptx, GRF_HDPTX_CON0, val);
+	udelay(10);
+	reset_deassert(&hdptx->init_reset);
+	udelay(10);
+	val = HDPTX_I_PLL_EN << 16 | HDPTX_I_PLL_EN;
+	hdptx_grf_write(hdptx, GRF_HDPTX_CON0, val);
+	udelay(10);
+	reset_deassert(&hdptx->cmn_reset);
+
+	for (i = 0; i < 20; i++) {
+		val = hdptx_grf_read(hdptx, GRF_HDPTX_STATUS);
+
+		if (val & HDPTX_O_PLL_LOCK_DONE)
+			break;
+		udelay(20);
+	}
+
+	if (i == 20) {
+		dev_err(hdptx->dev, "hdptx phy can't lock!\n");
+		return -EINVAL;
+	}
+
+	udelay(20);
+
+	reset_deassert(&hdptx->lane_reset);
+
+	for (i = 0; i < 20; i++) {
+		val = hdptx_grf_read(hdptx, GRF_HDPTX_STATUS);
+
+		if (val & HDPTX_O_PHY_RDY)
+			break;
+		udelay(100);
+	}
+
+	if (i == 20) {
+		dev_err(hdptx->dev, "hdptx phy can't ready!\n");
+		return -EINVAL;
+	}
+
+	dev_err(hdptx->dev, "hdptx phy locked!\n");
+
+	return 0;
+}
+
+static int hdptx_ropll_cmn_config(struct rockchip_hdptx_phy *hdptx, unsigned long bit_rate)
+{
+	int bus_width = hdptx->bus_width;
+	u8 color_depth = (bus_width & COLOR_DEPTH_MASK) ? 1 : 0;
+	struct ropll_config *cfg = ropll_tmds_cfg;
+
+	printf("%s bus_width:%x rate:%lu\n", __func__, bus_width, bit_rate);
+	hdptx->rate = bit_rate * 100;
+
+	for (; cfg->bit_rate != ~0; cfg++)
+		if (bit_rate == cfg->bit_rate)
+			break;
+
+	if (cfg->bit_rate == ~0) {
+		dev_err(hdptx->dev, "%s can't find pll cfg\n", __func__);
+		return -EINVAL;
+	}
+
+	hdptx_pre_power_up(hdptx);
+
+	reset_assert(&hdptx->ropll_reset);
+	udelay(20);
+	reset_deassert(&hdptx->ropll_reset);
+
+	hdptx_write(hdptx, CMN_REG0008, 0x00);
+	hdptx_write(hdptx, CMN_REG0009, 0x0c);
+	hdptx_write(hdptx, CMN_REG000A, 0x83);
+	hdptx_write(hdptx, CMN_REG000B, 0x06);
+	hdptx_write(hdptx, CMN_REG000C, 0x20);
+	hdptx_write(hdptx, CMN_REG000D, 0xb8);
+	hdptx_write(hdptx, CMN_REG000E, 0x0f);
+	hdptx_write(hdptx, CMN_REG000F, 0x0f);
+	hdptx_write(hdptx, CMN_REG0010, 0x04);
+	hdptx_write(hdptx, CMN_REG0011, 0x01);
+	hdptx_write(hdptx, CMN_REG0012, 0x26);
+	hdptx_write(hdptx, CMN_REG0013, 0x22);
+	hdptx_write(hdptx, CMN_REG0014, 0x24);
+	hdptx_write(hdptx, CMN_REG0015, 0x77);
+	hdptx_write(hdptx, CMN_REG0016, 0x08);
+	hdptx_write(hdptx, CMN_REG0017, 0x20);
+	hdptx_write(hdptx, CMN_REG0018, 0x04);
+	hdptx_write(hdptx, CMN_REG0019, 0x48);
+	hdptx_write(hdptx, CMN_REG001A, 0x01);
+	hdptx_write(hdptx, CMN_REG001B, 0x00);
+	hdptx_write(hdptx, CMN_REG001C, 0x01);
+	hdptx_write(hdptx, CMN_REG001D, 0x64);
+	hdptx_write(hdptx, CMN_REG001E, 0x14);
+	hdptx_write(hdptx, CMN_REG001F, 0x00);
+	hdptx_write(hdptx, CMN_REG0020, 0x00);
+	hdptx_write(hdptx, CMN_REG0021, 0x00);
+	hdptx_write(hdptx, CMN_REG0022, 0x11);
+	hdptx_write(hdptx, CMN_REG0023, 0x00);
+	hdptx_write(hdptx, CMN_REG0024, 0x00);
+	hdptx_write(hdptx, CMN_REG0025, 0x53);
+	hdptx_write(hdptx, CMN_REG0026, 0x00);
+	hdptx_write(hdptx, CMN_REG0027, 0x00);
+	hdptx_write(hdptx, CMN_REG0028, 0x01);
+	hdptx_write(hdptx, CMN_REG0029, 0x01);
+	hdptx_write(hdptx, CMN_REG002A, 0x00);
+	hdptx_write(hdptx, CMN_REG002B, 0x00);
+	hdptx_write(hdptx, CMN_REG002C, 0x00);
+	hdptx_write(hdptx, CMN_REG002D, 0x00);
+	hdptx_write(hdptx, CMN_REG002E, 0x04);
+	hdptx_write(hdptx, CMN_REG002F, 0x00);
+	hdptx_write(hdptx, CMN_REG0030, 0x20);
+	hdptx_write(hdptx, CMN_REG0031, 0x30);
+	hdptx_write(hdptx, CMN_REG0032, 0x0b);
+	hdptx_write(hdptx, CMN_REG0033, 0x23);
+	hdptx_write(hdptx, CMN_REG0034, 0x00);
+	hdptx_write(hdptx, CMN_REG0035, 0x00);
+	hdptx_write(hdptx, CMN_REG0038, 0x00);
+	hdptx_write(hdptx, CMN_REG0039, 0x00);
+	hdptx_write(hdptx, CMN_REG003A, 0x00);
+	hdptx_write(hdptx, CMN_REG003B, 0x00);
+	hdptx_write(hdptx, CMN_REG003C, 0x80);
+	hdptx_write(hdptx, CMN_REG003D, 0x40);
+	hdptx_write(hdptx, CMN_REG003E, 0x0c);
+	hdptx_write(hdptx, CMN_REG003F, 0x83);
+	hdptx_write(hdptx, CMN_REG0040, 0x06);
+	hdptx_write(hdptx, CMN_REG0041, 0x20);
+	hdptx_write(hdptx, CMN_REG0042, 0x78);
+	hdptx_write(hdptx, CMN_REG0043, 0x00);
+	hdptx_write(hdptx, CMN_REG0044, 0x46);
+	hdptx_write(hdptx, CMN_REG0045, 0x24);
+	hdptx_write(hdptx, CMN_REG0046, 0xff);
+	hdptx_write(hdptx, CMN_REG0047, 0x00);
+	hdptx_write(hdptx, CMN_REG0048, 0x44);
+	hdptx_write(hdptx, CMN_REG0049, 0xfa);
+	hdptx_write(hdptx, CMN_REG004A, 0x08);
+	hdptx_write(hdptx, CMN_REG004B, 0x00);
+	hdptx_write(hdptx, CMN_REG004C, 0x01);
+	hdptx_write(hdptx, CMN_REG004D, 0x64);
+	hdptx_write(hdptx, CMN_REG004E, 0x34);
+	hdptx_write(hdptx, CMN_REG004F, 0x00);
+	hdptx_write(hdptx, CMN_REG0050, 0x00);
+
+	hdptx_write(hdptx, CMN_REG0051, cfg->pms_mdiv);
+	hdptx_write(hdptx, CMN_REG0055, cfg->pms_mdiv_afc);
+
+	hdptx_write(hdptx, CMN_REG0059, (cfg->pms_pdiv << 4) | cfg->pms_refdiv);
+
+	hdptx_write(hdptx, CMN_REG005A, (cfg->pms_sdiv << 4));
+
+	hdptx_write(hdptx, CMN_REG005C, 0x25);
+	hdptx_write(hdptx, CMN_REG005D, 0x0c);
+	hdptx_write(hdptx, CMN_REG005E, 0x4f);
+	hdptx_update_bits(hdptx, CMN_REG005E, ROPLL_SDM_EN_MASK,
+			  ROPLL_SDM_EN(cfg->sdm_en));
+	if (!cfg->sdm_en)
+		hdptx_update_bits(hdptx, CMN_REG005E, 0xf, 0);
+
+	hdptx_write(hdptx, CMN_REG005F, 0x01);
+
+	hdptx_update_bits(hdptx, CMN_REG0064, ROPLL_SDM_NUM_SIGN_RBR_MASK,
+			  ROPLL_SDM_NUM_SIGN_RBR(cfg->sdm_num_sign));
+	hdptx_write(hdptx, CMN_REG0065, cfg->sdm_num);
+	hdptx_write(hdptx, CMN_REG0060, cfg->sdm_deno);
+
+	hdptx_update_bits(hdptx, CMN_REG0069, ROPLL_SDC_N_RBR_MASK,
+			  ROPLL_SDC_N_RBR(cfg->sdc_n));
+
+	hdptx_write(hdptx, CMN_REG006C, cfg->sdc_num);
+	hdptx_write(hdptx, CMN_REG0070, cfg->sdc_deno);
+
+	hdptx_write(hdptx, CMN_REG006B, 0x04);
+
+	hdptx_write(hdptx, CMN_REG0073, 0x30);
+	hdptx_write(hdptx, CMN_REG0074, 0x04);
+	hdptx_write(hdptx, CMN_REG0075, 0x20);
+	hdptx_write(hdptx, CMN_REG0076, 0x30);
+	hdptx_write(hdptx, CMN_REG0077, 0x08);
+	hdptx_write(hdptx, CMN_REG0078, 0x0c);
+	hdptx_write(hdptx, CMN_REG0079, 0x00);
+	hdptx_write(hdptx, CMN_REG007B, 0x00);
+	hdptx_write(hdptx, CMN_REG007C, 0x00);
+	hdptx_write(hdptx, CMN_REG007D, 0x00);
+	hdptx_write(hdptx, CMN_REG007E, 0x00);
+	hdptx_write(hdptx, CMN_REG007F, 0x00);
+	hdptx_write(hdptx, CMN_REG0080, 0x00);
+	hdptx_write(hdptx, CMN_REG0081, 0x01);
+	hdptx_write(hdptx, CMN_REG0082, 0x04);
+	hdptx_write(hdptx, CMN_REG0083, 0x24);
+	hdptx_write(hdptx, CMN_REG0084, 0x20);
+	hdptx_write(hdptx, CMN_REG0085, 0x03);
+
+	hdptx_update_bits(hdptx, CMN_REG0086, PLL_PCG_POSTDIV_SEL_MASK,
+			  PLL_PCG_POSTDIV_SEL(cfg->pms_sdiv));
+
+	hdptx_update_bits(hdptx, CMN_REG0086, PLL_PCG_CLK_SEL_MASK,
+			  PLL_PCG_CLK_SEL(color_depth));
+
+	hdptx_update_bits(hdptx, CMN_REG0086, PLL_PCG_CLK_EN, PLL_PCG_CLK_EN);
+
+	hdptx_write(hdptx, CMN_REG0087, 0x04);
+	hdptx_write(hdptx, CMN_REG0089, 0x00);
+	hdptx_write(hdptx, CMN_REG008A, 0x55);
+	hdptx_write(hdptx, CMN_REG008B, 0x25);
+	hdptx_write(hdptx, CMN_REG008C, 0x2c);
+	hdptx_write(hdptx, CMN_REG008D, 0x22);
+	hdptx_write(hdptx, CMN_REG008E, 0x14);
+	hdptx_write(hdptx, CMN_REG008F, 0x20);
+	hdptx_write(hdptx, CMN_REG0090, 0x00);
+	hdptx_write(hdptx, CMN_REG0091, 0x00);
+	hdptx_write(hdptx, CMN_REG0092, 0x00);
+	hdptx_write(hdptx, CMN_REG0093, 0x00);
+	hdptx_write(hdptx, CMN_REG0095, 0x00);
+	hdptx_write(hdptx, CMN_REG0097, 0x02);
+	hdptx_write(hdptx, CMN_REG0099, 0x04);
+	hdptx_write(hdptx, CMN_REG009A, 0x11);
+	hdptx_write(hdptx, CMN_REG009B, 0x00);
+
+	return hdptx_post_enable_pll(hdptx);
+}
+
+static int hdptx_ropll_tmds_mode_config(struct rockchip_hdptx_phy *hdptx, u32 rate)
+{
+	u32 bit_rate = rate & DATA_RATE_MASK;
+
+	if (!hdptx->pll_locked) {
+		int ret;
+
+		ret = hdptx_ropll_cmn_config(hdptx, bit_rate);
+		if (ret)
+			return ret;
+	}
+
+	hdptx_write(hdptx, SB_REG0114, 0x00);
+	hdptx_write(hdptx, SB_REG0115, 0x00);
+	hdptx_write(hdptx, SB_REG0116, 0x00);
+	hdptx_write(hdptx, SB_REG0117, 0x00);
+	hdptx_write(hdptx, LNTOP_REG0200, 0x06);
+
+	if (bit_rate >= 3400000) {
+		/* For 1/40 bitrate clk */
+		hdptx_write(hdptx, LNTOP_REG0201, 0x00);
+		hdptx_write(hdptx, LNTOP_REG0202, 0x00);
+		hdptx_write(hdptx, LNTOP_REG0203, 0x0f);
+		hdptx_write(hdptx, LNTOP_REG0204, 0xff);
+		hdptx_write(hdptx, LNTOP_REG0205, 0xff);
+	} else {
+		/* For 1/10 bitrate clk */
+		hdptx_write(hdptx, LNTOP_REG0201, 0x07);
+		hdptx_write(hdptx, LNTOP_REG0202, 0xc1);
+		hdptx_write(hdptx, LNTOP_REG0203, 0xf0);
+		hdptx_write(hdptx, LNTOP_REG0204, 0x7c);
+		hdptx_write(hdptx, LNTOP_REG0205, 0x1f);
+	}
+
+	hdptx_write(hdptx, LNTOP_REG0206, 0x07);
+	hdptx_write(hdptx, LNTOP_REG0207, 0x0f);
+	hdptx_write(hdptx, LANE_REG0303, 0x0c);
+	hdptx_write(hdptx, LANE_REG0307, 0x20);
+	hdptx_write(hdptx, LANE_REG030A, 0x17);
+	hdptx_write(hdptx, LANE_REG030B, 0x77);
+	hdptx_write(hdptx, LANE_REG030C, 0x77);
+	hdptx_write(hdptx, LANE_REG030D, 0x77);
+	hdptx_write(hdptx, LANE_REG030E, 0x38);
+	hdptx_write(hdptx, LANE_REG0310, 0x03);
+	hdptx_write(hdptx, LANE_REG0311, 0x0f);
+	hdptx_write(hdptx, LANE_REG0312, 0x00);
+	hdptx_write(hdptx, LANE_REG0316, 0x02);
+	hdptx_write(hdptx, LANE_REG031B, 0x01);
+	hdptx_write(hdptx, LANE_REG031E, 0x00);
+	hdptx_write(hdptx, LANE_REG031F, 0x15);
+	hdptx_write(hdptx, LANE_REG0320, 0xa0);
+	hdptx_write(hdptx, LANE_REG0403, 0x0c);
+	hdptx_write(hdptx, LANE_REG0407, 0x20);
+	hdptx_write(hdptx, LANE_REG040A, 0x17);
+	hdptx_write(hdptx, LANE_REG040B, 0x77);
+	hdptx_write(hdptx, LANE_REG040C, 0x77);
+	hdptx_write(hdptx, LANE_REG040D, 0x77);
+	hdptx_write(hdptx, LANE_REG040E, 0x38);
+	hdptx_write(hdptx, LANE_REG0410, 0x03);
+	hdptx_write(hdptx, LANE_REG0411, 0x0f);
+	hdptx_write(hdptx, LANE_REG0412, 0x00);
+	hdptx_write(hdptx, LANE_REG0416, 0x02);
+	hdptx_write(hdptx, LANE_REG041B, 0x01);
+	hdptx_write(hdptx, LANE_REG041E, 0x00);
+	hdptx_write(hdptx, LANE_REG041F, 0x15);
+	hdptx_write(hdptx, LANE_REG0420, 0xa0);
+	hdptx_write(hdptx, LANE_REG0503, 0x0c);
+	hdptx_write(hdptx, LANE_REG0507, 0x20);
+	hdptx_write(hdptx, LANE_REG050A, 0x17);
+	hdptx_write(hdptx, LANE_REG050B, 0x77);
+	hdptx_write(hdptx, LANE_REG050C, 0x77);
+	hdptx_write(hdptx, LANE_REG050D, 0x77);
+	hdptx_write(hdptx, LANE_REG050E, 0x38);
+	hdptx_write(hdptx, LANE_REG0510, 0x03);
+	hdptx_write(hdptx, LANE_REG0511, 0x0f);
+	hdptx_write(hdptx, LANE_REG0512, 0x00);
+	hdptx_write(hdptx, LANE_REG0516, 0x02);
+	hdptx_write(hdptx, LANE_REG051B, 0x01);
+	hdptx_write(hdptx, LANE_REG051E, 0x00);
+	hdptx_write(hdptx, LANE_REG051F, 0x15);
+	hdptx_write(hdptx, LANE_REG0520, 0xa0);
+	hdptx_write(hdptx, LANE_REG0603, 0x0c);
+	hdptx_write(hdptx, LANE_REG0607, 0x20);
+	hdptx_write(hdptx, LANE_REG060A, 0x17);
+	hdptx_write(hdptx, LANE_REG060B, 0x77);
+	hdptx_write(hdptx, LANE_REG060C, 0x77);
+	hdptx_write(hdptx, LANE_REG060D, 0x77);
+	hdptx_write(hdptx, LANE_REG060E, 0x38);
+	hdptx_write(hdptx, LANE_REG0610, 0x03);
+	hdptx_write(hdptx, LANE_REG0611, 0x0f);
+	hdptx_write(hdptx, LANE_REG0612, 0x00);
+	hdptx_write(hdptx, LANE_REG0616, 0x02);
+	hdptx_write(hdptx, LANE_REG061B, 0x01);
+	hdptx_write(hdptx, LANE_REG061E, 0x08);
+	hdptx_write(hdptx, LANE_REG061F, 0x15);
+	hdptx_write(hdptx, LANE_REG0620, 0xa0);
+
+	return hdptx_post_enable_lane(hdptx);
+}
+
+static int hdptx_ropll_frl_mode_config(struct rockchip_hdptx_phy *hdptx, u32 rate)
+{
+	u32 bit_rate = rate & DATA_RATE_MASK;
+	u8 color_depth = (rate & COLOR_DEPTH_MASK) ? 1 : 0;
+	struct ropll_config *cfg = ropll_frl_cfg;
+
+	for (; cfg->bit_rate != ~0; cfg++)
+		if (bit_rate == cfg->bit_rate)
+			break;
+
+	if (cfg->bit_rate == ~0) {
+		dev_err(hdptx->dev, "%s can't find pll cfg\n", __func__);
+		return -EINVAL;
+	}
+
+	hdptx_pre_power_up(hdptx);
+
+	reset_assert(&hdptx->ropll_reset);
+	udelay(20);
+	reset_deassert(&hdptx->ropll_reset);
+
+	hdptx_write(hdptx, CMN_REG0008, 0x00);
+	hdptx_write(hdptx, CMN_REG0009, 0x0c);
+	hdptx_write(hdptx, CMN_REG000A, 0x83);
+	hdptx_write(hdptx, CMN_REG000B, 0x06);
+	hdptx_write(hdptx, CMN_REG000C, 0x20);
+	hdptx_write(hdptx, CMN_REG000D, 0xb8);
+	hdptx_write(hdptx, CMN_REG000E, 0x0f);
+	hdptx_write(hdptx, CMN_REG000F, 0x0f);
+	hdptx_write(hdptx, CMN_REG0010, 0x04);
+	hdptx_write(hdptx, CMN_REG0011, 0x00);
+	hdptx_write(hdptx, CMN_REG0012, 0x26);
+	hdptx_write(hdptx, CMN_REG0013, 0x22);
+	hdptx_write(hdptx, CMN_REG0014, 0x24);
+	hdptx_write(hdptx, CMN_REG0015, 0x77);
+	hdptx_write(hdptx, CMN_REG0016, 0x08);
+	hdptx_write(hdptx, CMN_REG0017, 0x00);
+	hdptx_write(hdptx, CMN_REG0018, 0x04);
+	hdptx_write(hdptx, CMN_REG0019, 0x48);
+	hdptx_write(hdptx, CMN_REG001A, 0x01);
+	hdptx_write(hdptx, CMN_REG001B, 0x00);
+	hdptx_write(hdptx, CMN_REG001C, 0x01);
+	hdptx_write(hdptx, CMN_REG001D, 0x64);
+	hdptx_write(hdptx, CMN_REG001E, 0x14);
+	hdptx_write(hdptx, CMN_REG001F, 0x00);
+	hdptx_write(hdptx, CMN_REG0020, 0x00);
+	hdptx_write(hdptx, CMN_REG0021, 0x00);
+	hdptx_write(hdptx, CMN_REG0022, 0x11);
+	hdptx_write(hdptx, CMN_REG0023, 0x00);
+	hdptx_write(hdptx, CMN_REG0025, 0x00);
+	hdptx_write(hdptx, CMN_REG0026, 0x53);
+	hdptx_write(hdptx, CMN_REG0027, 0x00);
+	hdptx_write(hdptx, CMN_REG0028, 0x00);
+	hdptx_write(hdptx, CMN_REG0029, 0x01);
+	hdptx_write(hdptx, CMN_REG002A, 0x01);
+	hdptx_write(hdptx, CMN_REG002B, 0x00);
+	hdptx_write(hdptx, CMN_REG002C, 0x00);
+	hdptx_write(hdptx, CMN_REG002D, 0x00);
+	hdptx_write(hdptx, CMN_REG002E, 0x00);
+	hdptx_write(hdptx, CMN_REG002F, 0x04);
+	hdptx_write(hdptx, CMN_REG0030, 0x00);
+	hdptx_write(hdptx, CMN_REG0031, 0x20);
+	hdptx_write(hdptx, CMN_REG0032, 0x30);
+	hdptx_write(hdptx, CMN_REG0033, 0x0b);
+	hdptx_write(hdptx, CMN_REG0034, 0x23);
+	hdptx_write(hdptx, CMN_REG0035, 0x00);
+	hdptx_write(hdptx, CMN_REG0038, 0x00);
+	hdptx_write(hdptx, CMN_REG0039, 0x00);
+	hdptx_write(hdptx, CMN_REG003A, 0x00);
+	hdptx_write(hdptx, CMN_REG003B, 0x00);
+	hdptx_write(hdptx, CMN_REG003C, 0x80);
+	hdptx_write(hdptx, CMN_REG003D, 0x40);
+	hdptx_write(hdptx, CMN_REG003E, 0x0c);
+	hdptx_write(hdptx, CMN_REG003F, 0x83);
+	hdptx_write(hdptx, CMN_REG0040, 0x06);
+	hdptx_write(hdptx, CMN_REG0041, 0x20);
+	hdptx_write(hdptx, CMN_REG0042, 0xb8);
+	hdptx_write(hdptx, CMN_REG0043, 0x00);
+	hdptx_write(hdptx, CMN_REG0044, 0x46);
+	hdptx_write(hdptx, CMN_REG0045, 0x24);
+	hdptx_write(hdptx, CMN_REG0046, 0xff);
+	hdptx_write(hdptx, CMN_REG0047, 0x00);
+	hdptx_write(hdptx, CMN_REG0048, 0x44);
+	hdptx_write(hdptx, CMN_REG0049, 0xfa);
+	hdptx_write(hdptx, CMN_REG004A, 0x08);
+	hdptx_write(hdptx, CMN_REG004B, 0x00);
+	hdptx_write(hdptx, CMN_REG004C, 0x01);
+	hdptx_write(hdptx, CMN_REG004D, 0x64);
+	hdptx_write(hdptx, CMN_REG004E, 0x14);
+	hdptx_write(hdptx, CMN_REG004F, 0x00);
+	hdptx_write(hdptx, CMN_REG0050, 0x00);
+	hdptx_write(hdptx, CMN_REG0051, cfg->pms_mdiv);
+	hdptx_write(hdptx, CMN_REG0055, cfg->pms_mdiv_afc);
+	hdptx_write(hdptx, CMN_REG0059, (cfg->pms_pdiv << 4) | cfg->pms_refdiv);
+	hdptx_write(hdptx, CMN_REG005A, (cfg->pms_sdiv << 4));
+	hdptx_write(hdptx, CMN_REG005C, 0x25);
+	hdptx_write(hdptx, CMN_REG005D, 0x0c);
+	hdptx_update_bits(hdptx, CMN_REG005E, ROPLL_SDM_EN_MASK,
+			  ROPLL_SDM_EN(cfg->sdm_en));
+	if (!cfg->sdm_en)
+		hdptx_update_bits(hdptx, CMN_REG005E, 0xf, 0);
+	hdptx_write(hdptx, CMN_REG005F, 0x01);
+	hdptx_update_bits(hdptx, CMN_REG0064, ROPLL_SDM_NUM_SIGN_RBR_MASK,
+			  ROPLL_SDM_NUM_SIGN_RBR(cfg->sdm_num_sign));
+	hdptx_write(hdptx, CMN_REG0065, cfg->sdm_num);
+	hdptx_write(hdptx, CMN_REG0060, cfg->sdm_deno);
+	hdptx_update_bits(hdptx, CMN_REG0069, ROPLL_SDC_N_RBR_MASK,
+			  ROPLL_SDC_N_RBR(cfg->sdc_n));
+	hdptx_write(hdptx, CMN_REG006C, cfg->sdc_num);
+	hdptx_write(hdptx, CMN_REG0070, cfg->sdc_deno);
+	hdptx_write(hdptx, CMN_REG006B, 0x04);
+	hdptx_write(hdptx, CMN_REG0073, 0x30);
+	hdptx_write(hdptx, CMN_REG0074, 0x00);
+	hdptx_write(hdptx, CMN_REG0075, 0x20);
+	hdptx_write(hdptx, CMN_REG0076, 0x30);
+	hdptx_write(hdptx, CMN_REG0077, 0x08);
+	hdptx_write(hdptx, CMN_REG0078, 0x0c);
+	hdptx_write(hdptx, CMN_REG0079, 0x00);
+	hdptx_write(hdptx, CMN_REG007B, 0x00);
+	hdptx_write(hdptx, CMN_REG007C, 0x00);
+	hdptx_write(hdptx, CMN_REG007D, 0x00);
+	hdptx_write(hdptx, CMN_REG007E, 0x00);
+	hdptx_write(hdptx, CMN_REG007F, 0x00);
+	hdptx_write(hdptx, CMN_REG0080, 0x00);
+	hdptx_write(hdptx, CMN_REG0081, 0x09);
+	hdptx_write(hdptx, CMN_REG0082, 0x04);
+	hdptx_write(hdptx, CMN_REG0083, 0x24);
+	hdptx_write(hdptx, CMN_REG0084, 0x20);
+	hdptx_write(hdptx, CMN_REG0085, 0x03);
+	hdptx_write(hdptx, CMN_REG0086, 0x01);
+	hdptx_update_bits(hdptx, CMN_REG0086, PLL_PCG_POSTDIV_SEL_MASK,
+			  PLL_PCG_POSTDIV_SEL(cfg->pms_sdiv));
+	hdptx_update_bits(hdptx, CMN_REG0086, PLL_PCG_CLK_SEL_MASK,
+			  PLL_PCG_CLK_SEL(color_depth));
+	hdptx_write(hdptx, CMN_REG0087, 0x0c);
+	hdptx_write(hdptx, CMN_REG0089, 0x00);
+	hdptx_write(hdptx, CMN_REG008A, 0x55);
+	hdptx_write(hdptx, CMN_REG008B, 0x25);
+	hdptx_write(hdptx, CMN_REG008C, 0x2c);
+	hdptx_write(hdptx, CMN_REG008D, 0x22);
+	hdptx_write(hdptx, CMN_REG008E, 0x14);
+	hdptx_write(hdptx, CMN_REG008F, 0x20);
+	hdptx_write(hdptx, CMN_REG0090, 0x00);
+	hdptx_write(hdptx, CMN_REG0091, 0x00);
+	hdptx_write(hdptx, CMN_REG0092, 0x00);
+	hdptx_write(hdptx, CMN_REG0093, 0x00);
+	hdptx_write(hdptx, CMN_REG0094, 0x00);
+	hdptx_write(hdptx, CMN_REG0097, 0x02);
+	hdptx_write(hdptx, CMN_REG0099, 0x04);
+	hdptx_write(hdptx, CMN_REG009A, 0x11);
+	hdptx_write(hdptx, CMN_REG009B, 0x10);
+	hdptx_write(hdptx, SB_REG0114, 0x00);
+	hdptx_write(hdptx, SB_REG0115, 0x00);
+	hdptx_write(hdptx, SB_REG0116, 0x00);
+	hdptx_write(hdptx, SB_REG0117, 0x00);
+	hdptx_write(hdptx, LNTOP_REG0200, 0x04);
+	hdptx_write(hdptx, LNTOP_REG0201, 0x00);
+	hdptx_write(hdptx, LNTOP_REG0202, 0x00);
+	hdptx_write(hdptx, LNTOP_REG0203, 0xf0);
+	hdptx_write(hdptx, LNTOP_REG0204, 0xff);
+	hdptx_write(hdptx, LNTOP_REG0205, 0xff);
+	hdptx_write(hdptx, LNTOP_REG0206, 0x05);
+	hdptx_write(hdptx, LNTOP_REG0207, 0x0f);
+	hdptx_write(hdptx, LANE_REG0303, 0x0c);
+	hdptx_write(hdptx, LANE_REG0307, 0x20);
+	hdptx_write(hdptx, LANE_REG030A, 0x17);
+	hdptx_write(hdptx, LANE_REG030B, 0x77);
+	hdptx_write(hdptx, LANE_REG030C, 0x77);
+	hdptx_write(hdptx, LANE_REG030D, 0x77);
+	hdptx_write(hdptx, LANE_REG030E, 0x38);
+	hdptx_write(hdptx, LANE_REG0310, 0x03);
+	hdptx_write(hdptx, LANE_REG0311, 0x0f);
+	hdptx_write(hdptx, LANE_REG0312, 0x3c);
+	hdptx_write(hdptx, LANE_REG0316, 0x02);
+	hdptx_write(hdptx, LANE_REG031B, 0x01);
+	hdptx_write(hdptx, LANE_REG031F, 0x15);
+	hdptx_write(hdptx, LANE_REG0320, 0xa0);
+	hdptx_write(hdptx, LANE_REG0403, 0x0c);
+	hdptx_write(hdptx, LANE_REG0407, 0x20);
+	hdptx_write(hdptx, LANE_REG040A, 0x17);
+	hdptx_write(hdptx, LANE_REG040B, 0x77);
+	hdptx_write(hdptx, LANE_REG040C, 0x77);
+	hdptx_write(hdptx, LANE_REG040D, 0x77);
+	hdptx_write(hdptx, LANE_REG040E, 0x38);
+	hdptx_write(hdptx, LANE_REG0410, 0x03);
+	hdptx_write(hdptx, LANE_REG0411, 0x0f);
+	hdptx_write(hdptx, LANE_REG0412, 0x3c);
+	hdptx_write(hdptx, LANE_REG0416, 0x02);
+	hdptx_write(hdptx, LANE_REG041B, 0x01);
+	hdptx_write(hdptx, LANE_REG041F, 0x15);
+	hdptx_write(hdptx, LANE_REG0420, 0xa0);
+	hdptx_write(hdptx, LANE_REG0503, 0x0c);
+	hdptx_write(hdptx, LANE_REG0507, 0x20);
+	hdptx_write(hdptx, LANE_REG050A, 0x17);
+	hdptx_write(hdptx, LANE_REG050B, 0x77);
+	hdptx_write(hdptx, LANE_REG050C, 0x77);
+	hdptx_write(hdptx, LANE_REG050D, 0x77);
+	hdptx_write(hdptx, LANE_REG050E, 0x38);
+	hdptx_write(hdptx, LANE_REG0510, 0x03);
+	hdptx_write(hdptx, LANE_REG0511, 0x0f);
+	hdptx_write(hdptx, LANE_REG0512, 0x3c);
+	hdptx_write(hdptx, LANE_REG0516, 0x02);
+	hdptx_write(hdptx, LANE_REG051B, 0x01);
+	hdptx_write(hdptx, LANE_REG051F, 0x15);
+	hdptx_write(hdptx, LANE_REG0520, 0xa0);
+	hdptx_write(hdptx, LANE_REG0603, 0x0c);
+	hdptx_write(hdptx, LANE_REG0607, 0x20);
+	hdptx_write(hdptx, LANE_REG060A, 0x17);
+	hdptx_write(hdptx, LANE_REG060B, 0x77);
+	hdptx_write(hdptx, LANE_REG060C, 0x77);
+	hdptx_write(hdptx, LANE_REG060D, 0x77);
+	hdptx_write(hdptx, LANE_REG060E, 0x38);
+	hdptx_write(hdptx, LANE_REG0610, 0x03);
+	hdptx_write(hdptx, LANE_REG0611, 0x0f);
+	hdptx_write(hdptx, LANE_REG0612, 0x3c);
+	hdptx_write(hdptx, LANE_REG0616, 0x02);
+	hdptx_write(hdptx, LANE_REG061B, 0x01);
+	hdptx_write(hdptx, LANE_REG061F, 0x15);
+	hdptx_write(hdptx, LANE_REG0620, 0xa0);
+
+	return hdptx_post_power_up(hdptx);
+}
+
+static int hdptx_lcpll_frl_mode_config(struct rockchip_hdptx_phy *hdptx, u32 rate)
+{
+	u32 bit_rate = rate & DATA_RATE_MASK;
+	u8 color_depth = (rate & COLOR_DEPTH_MASK) ? 1 : 0;
+	struct lcpll_config *cfg = lcpll_cfg;
+
+	for (; cfg->bit_rate != ~0; cfg++)
+		if (bit_rate == cfg->bit_rate)
+			break;
+
+	if (cfg->bit_rate == ~0)
+		return -EINVAL;
+
+	hdptx_pre_power_up(hdptx);
+
+	hdptx_update_bits(hdptx, CMN_REG0008, LCPLL_EN_MASK |
+		       LCPLL_LCVCO_MODE_EN_MASK, LCPLL_EN(1) |
+		       LCPLL_LCVCO_MODE_EN(cfg->lcvco_mode_en));
+	hdptx_write(hdptx, CMN_REG0009, 0x0c);
+	hdptx_write(hdptx, CMN_REG000A, 0x83);
+	hdptx_write(hdptx, CMN_REG000B, 0x06);
+	hdptx_write(hdptx, CMN_REG000C, 0x20);
+	hdptx_write(hdptx, CMN_REG000D, 0xb8);
+	hdptx_write(hdptx, CMN_REG000E, 0x0f);
+	hdptx_write(hdptx, CMN_REG000F, 0x0f);
+	hdptx_write(hdptx, CMN_REG0010, 0x04);
+	hdptx_write(hdptx, CMN_REG0011, 0x00);
+	hdptx_write(hdptx, CMN_REG0012, 0x26);
+	hdptx_write(hdptx, CMN_REG0013, 0x22);
+	hdptx_write(hdptx, CMN_REG0014, 0x24);
+	hdptx_write(hdptx, CMN_REG0015, 0x77);
+	hdptx_write(hdptx, CMN_REG0016, 0x08);
+	hdptx_write(hdptx, CMN_REG0017, 0x00);
+	hdptx_write(hdptx, CMN_REG0018, 0x04);
+	hdptx_write(hdptx, CMN_REG0019, 0x48);
+	hdptx_write(hdptx, CMN_REG001A, 0x01);
+	hdptx_write(hdptx, CMN_REG001B, 0x00);
+	hdptx_write(hdptx, CMN_REG001C, 0x01);
+	hdptx_write(hdptx, CMN_REG001D, 0x64);
+	hdptx_update_bits(hdptx, CMN_REG001E, LCPLL_PI_EN_MASK |
+		       LCPLL_100M_CLK_EN_MASK,
+		       LCPLL_PI_EN(cfg->pi_en) |
+		       LCPLL_100M_CLK_EN(cfg->clk_en_100m));
+	hdptx_write(hdptx, CMN_REG001F, 0x00);
+	hdptx_write(hdptx, CMN_REG0020, cfg->pms_mdiv);
+	hdptx_write(hdptx, CMN_REG0021, cfg->pms_mdiv_afc);
+	hdptx_write(hdptx, CMN_REG0022, (cfg->pms_pdiv << 4) | cfg->pms_refdiv);
+	hdptx_write(hdptx, CMN_REG0023, (cfg->pms_sdiv << 4) | cfg->pms_sdiv);
+	hdptx_write(hdptx, CMN_REG0025, 0x10);
+	hdptx_write(hdptx, CMN_REG0026, 0x53);
+	hdptx_write(hdptx, CMN_REG0027, 0x01);
+	hdptx_write(hdptx, CMN_REG0028, 0x0d);
+	hdptx_write(hdptx, CMN_REG0029, 0x01);
+	hdptx_write(hdptx, CMN_REG002A, cfg->sdm_deno);
+	hdptx_write(hdptx, CMN_REG002B, cfg->sdm_num_sign);
+	hdptx_write(hdptx, CMN_REG002C, cfg->sdm_num);
+	hdptx_update_bits(hdptx, CMN_REG002D, LCPLL_SDC_N_MASK,
+			  LCPLL_SDC_N(cfg->sdc_n));
+	hdptx_write(hdptx, CMN_REG002E, 0x02);
+	hdptx_write(hdptx, CMN_REG002F, 0x0d);
+	hdptx_write(hdptx, CMN_REG0030, 0x00);
+	hdptx_write(hdptx, CMN_REG0031, 0x20);
+	hdptx_write(hdptx, CMN_REG0032, 0x30);
+	hdptx_write(hdptx, CMN_REG0033, 0x0b);
+	hdptx_write(hdptx, CMN_REG0034, 0x23);
+	hdptx_write(hdptx, CMN_REG0035, 0x00);
+	hdptx_write(hdptx, CMN_REG0038, 0x00);
+	hdptx_write(hdptx, CMN_REG0039, 0x00);
+	hdptx_write(hdptx, CMN_REG003A, 0x00);
+	hdptx_write(hdptx, CMN_REG003B, 0x00);
+	hdptx_write(hdptx, CMN_REG003C, 0x80);
+	hdptx_write(hdptx, CMN_REG003D, 0x00);
+	hdptx_write(hdptx, CMN_REG003E, 0x0c);
+	hdptx_write(hdptx, CMN_REG003F, 0x83);
+	hdptx_write(hdptx, CMN_REG0040, 0x06);
+	hdptx_write(hdptx, CMN_REG0041, 0x20);
+	hdptx_write(hdptx, CMN_REG0042, 0xb8);
+	hdptx_write(hdptx, CMN_REG0043, 0x00);
+	hdptx_write(hdptx, CMN_REG0044, 0x46);
+	hdptx_write(hdptx, CMN_REG0045, 0x24);
+	hdptx_write(hdptx, CMN_REG0046, 0xff);
+	hdptx_write(hdptx, CMN_REG0047, 0x00);
+	hdptx_write(hdptx, CMN_REG0048, 0x44);
+	hdptx_write(hdptx, CMN_REG0049, 0xfa);
+	hdptx_write(hdptx, CMN_REG004A, 0x08);
+	hdptx_write(hdptx, CMN_REG004B, 0x00);
+	hdptx_write(hdptx, CMN_REG004C, 0x01);
+	hdptx_write(hdptx, CMN_REG004D, 0x64);
+	hdptx_write(hdptx, CMN_REG004E, 0x14);
+	hdptx_write(hdptx, CMN_REG004F, 0x00);
+	hdptx_write(hdptx, CMN_REG0050, 0x00);
+	hdptx_write(hdptx, CMN_REG0051, 0x00);
+	hdptx_write(hdptx, CMN_REG0055, 0x00);
+	hdptx_write(hdptx, CMN_REG0059, 0x11);
+	hdptx_write(hdptx, CMN_REG005A, 0x03);
+	hdptx_write(hdptx, CMN_REG005C, 0x05);
+	hdptx_write(hdptx, CMN_REG005D, 0x0c);
+	hdptx_write(hdptx, CMN_REG005E, 0x07);
+	hdptx_write(hdptx, CMN_REG005F, 0x01);
+	hdptx_write(hdptx, CMN_REG0060, 0x01);
+	hdptx_write(hdptx, CMN_REG0064, 0x07);
+	hdptx_write(hdptx, CMN_REG0065, 0x00);
+	hdptx_write(hdptx, CMN_REG0069, 0x00);
+	hdptx_write(hdptx, CMN_REG006B, 0x04);
+	hdptx_write(hdptx, CMN_REG006C, 0x00);
+	hdptx_write(hdptx, CMN_REG0070, 0x01);
+	hdptx_write(hdptx, CMN_REG0073, 0x30);
+	hdptx_write(hdptx, CMN_REG0074, 0x00);
+	hdptx_write(hdptx, CMN_REG0075, 0x20);
+	hdptx_write(hdptx, CMN_REG0076, 0x30);
+	hdptx_write(hdptx, CMN_REG0077, 0x08);
+	hdptx_write(hdptx, CMN_REG0078, 0x0c);
+	hdptx_write(hdptx, CMN_REG0079, 0x00);
+	hdptx_write(hdptx, CMN_REG007B, 0x00);
+	hdptx_write(hdptx, CMN_REG007C, 0x00);
+	hdptx_write(hdptx, CMN_REG007D, 0x00);
+	hdptx_write(hdptx, CMN_REG007E, 0x00);
+	hdptx_write(hdptx, CMN_REG007F, 0x00);
+	hdptx_write(hdptx, CMN_REG0080, 0x00);
+	hdptx_write(hdptx, CMN_REG0081, 0x09);
+	hdptx_write(hdptx, CMN_REG0082, 0x04);
+	hdptx_write(hdptx, CMN_REG0083, 0x24);
+	hdptx_write(hdptx, CMN_REG0084, 0x20);
+	hdptx_write(hdptx, CMN_REG0085, 0x03);
+	hdptx_write(hdptx, CMN_REG0086, 0x01);
+	hdptx_update_bits(hdptx, CMN_REG0086, PLL_PCG_POSTDIV_SEL_MASK,
+			  PLL_PCG_POSTDIV_SEL(cfg->pms_sdiv));
+	hdptx_update_bits(hdptx, CMN_REG0086, PLL_PCG_CLK_SEL_MASK,
+			  PLL_PCG_CLK_SEL(color_depth));
+	hdptx_write(hdptx, CMN_REG0087, 0x0c);
+	hdptx_write(hdptx, CMN_REG0089, 0x02);
+	hdptx_write(hdptx, CMN_REG008A, 0x55);
+	hdptx_write(hdptx, CMN_REG008B, 0x25);
+	hdptx_write(hdptx, CMN_REG008C, 0x2c);
+	hdptx_write(hdptx, CMN_REG008D, 0x22);
+	hdptx_write(hdptx, CMN_REG008E, 0x14);
+	hdptx_write(hdptx, CMN_REG008F, 0x20);
+	hdptx_write(hdptx, CMN_REG0090, 0x00);
+	hdptx_write(hdptx, CMN_REG0091, 0x00);
+	hdptx_write(hdptx, CMN_REG0092, 0x00);
+	hdptx_write(hdptx, CMN_REG0093, 0x00);
+	hdptx_write(hdptx, CMN_REG0095, 0x00);
+	hdptx_write(hdptx, CMN_REG0097, 0x00);
+	hdptx_write(hdptx, CMN_REG0099, 0x00);
+	hdptx_write(hdptx, CMN_REG009A, 0x11);
+	hdptx_write(hdptx, CMN_REG009B, 0x10);
+	hdptx_write(hdptx, SB_REG0114, 0x00);
+	hdptx_write(hdptx, SB_REG0115, 0x00);
+	hdptx_write(hdptx, SB_REG0116, 0x00);
+	hdptx_write(hdptx, SB_REG0117, 0x00);
+	hdptx_write(hdptx, LNTOP_REG0200, 0x04);
+	hdptx_write(hdptx, LNTOP_REG0201, 0x00);
+	hdptx_write(hdptx, LNTOP_REG0202, 0x00);
+	hdptx_write(hdptx, LNTOP_REG0203, 0xf0);
+	hdptx_write(hdptx, LNTOP_REG0204, 0xff);
+	hdptx_write(hdptx, LNTOP_REG0205, 0xff);
+	hdptx_write(hdptx, LNTOP_REG0206, 0x05);
+	hdptx_write(hdptx, LNTOP_REG0207, 0x0f);
+	hdptx_write(hdptx, LANE_REG0303, 0x0c);
+	hdptx_write(hdptx, LANE_REG0307, 0x20);
+	hdptx_write(hdptx, LANE_REG030A, 0x17);
+	hdptx_write(hdptx, LANE_REG030B, 0x77);
+	hdptx_write(hdptx, LANE_REG030C, 0x77);
+	hdptx_write(hdptx, LANE_REG030D, 0x77);
+	hdptx_write(hdptx, LANE_REG030E, 0x38);
+	hdptx_write(hdptx, LANE_REG0310, 0x03);
+	hdptx_write(hdptx, LANE_REG0311, 0x0f);
+	hdptx_write(hdptx, LANE_REG0312, 0x3c);
+	hdptx_write(hdptx, LANE_REG0316, 0x02);
+	hdptx_write(hdptx, LANE_REG031B, 0x01);
+	hdptx_write(hdptx, LANE_REG031F, 0x15);
+	hdptx_write(hdptx, LANE_REG0320, 0xa0);
+	hdptx_write(hdptx, LANE_REG0403, 0x0c);
+	hdptx_write(hdptx, LANE_REG0407, 0x20);
+	hdptx_write(hdptx, LANE_REG040A, 0x17);
+	hdptx_write(hdptx, LANE_REG040B, 0x77);
+	hdptx_write(hdptx, LANE_REG040C, 0x77);
+	hdptx_write(hdptx, LANE_REG040D, 0x77);
+	hdptx_write(hdptx, LANE_REG040E, 0x38);
+	hdptx_write(hdptx, LANE_REG0410, 0x03);
+	hdptx_write(hdptx, LANE_REG0411, 0x0f);
+	hdptx_write(hdptx, LANE_REG0412, 0x3c);
+	hdptx_write(hdptx, LANE_REG0416, 0x02);
+	hdptx_write(hdptx, LANE_REG041B, 0x01);
+	hdptx_write(hdptx, LANE_REG041F, 0x15);
+	hdptx_write(hdptx, LANE_REG0420, 0xa0);
+	hdptx_write(hdptx, LANE_REG0503, 0x0c);
+	hdptx_write(hdptx, LANE_REG0507, 0x20);
+	hdptx_write(hdptx, LANE_REG050A, 0x17);
+	hdptx_write(hdptx, LANE_REG050B, 0x77);
+	hdptx_write(hdptx, LANE_REG050C, 0x77);
+	hdptx_write(hdptx, LANE_REG050D, 0x77);
+	hdptx_write(hdptx, LANE_REG050E, 0x38);
+	hdptx_write(hdptx, LANE_REG0510, 0x03);
+	hdptx_write(hdptx, LANE_REG0511, 0x0f);
+	hdptx_write(hdptx, LANE_REG0512, 0x3c);
+	hdptx_write(hdptx, LANE_REG0516, 0x02);
+	hdptx_write(hdptx, LANE_REG051B, 0x01);
+	hdptx_write(hdptx, LANE_REG051F, 0x15);
+	hdptx_write(hdptx, LANE_REG0520, 0xa0);
+	hdptx_write(hdptx, LANE_REG0603, 0x0c);
+	hdptx_write(hdptx, LANE_REG0607, 0x20);
+	hdptx_write(hdptx, LANE_REG060A, 0x17);
+	hdptx_write(hdptx, LANE_REG060B, 0x77);
+	hdptx_write(hdptx, LANE_REG060C, 0x77);
+	hdptx_write(hdptx, LANE_REG060D, 0x77);
+	hdptx_write(hdptx, LANE_REG060E, 0x38);
+	hdptx_write(hdptx, LANE_REG0610, 0x03);
+	hdptx_write(hdptx, LANE_REG0611, 0x0f);
+	hdptx_write(hdptx, LANE_REG0612, 0x3c);
+	hdptx_write(hdptx, LANE_REG0616, 0x02);
+	hdptx_write(hdptx, LANE_REG061B, 0x01);
+	hdptx_write(hdptx, LANE_REG061F, 0x15);
+	hdptx_write(hdptx, LANE_REG0620, 0xa0);
+
+	return hdptx_post_power_up(hdptx);
+}
+
+static int rockchip_hdptx_phy_power_on(struct rockchip_phy *phy)
+{
+	struct rockchip_hdptx_phy *hdptx = dev_get_priv(phy->dev);
+	int bus_width = hdptx->bus_width;
+	int bit_rate = bus_width & DATA_RATE_MASK;
+
+	printf("bus_width:0x%x,bit_rate:%d\n", bus_width, bit_rate);
+
+	if (bus_width & HDMI_MODE_MASK)
+		if (bit_rate > 24000000)
+			return hdptx_lcpll_frl_mode_config(hdptx, bus_width);
+		else
+			return hdptx_ropll_frl_mode_config(hdptx, bus_width);
+	else
+		return hdptx_ropll_tmds_mode_config(hdptx, bus_width);
+}
+
+static int rockchip_hdptx_phy_power_off(struct rockchip_phy *phy)
+{
+	return 0;
+}
+
+static long rockchip_hdptx_phy_clk_round_rate(struct rockchip_phy *phy,
+					      unsigned long rate)
+{
+	struct ropll_config *cfg = ropll_tmds_cfg;
+	u32 bit_rate = rate / 100;
+
+	for (; cfg->bit_rate != ~0; cfg++)
+		if (bit_rate == cfg->bit_rate)
+			break;
+
+	if (cfg->bit_rate == ~0)
+		return -EINVAL;
+
+	return rate;
+}
+
+static unsigned long rockchip_hdptx_phy_clk_set_rate(struct rockchip_phy *phy,
+						     unsigned long rate)
+{
+	struct rockchip_hdptx_phy *hdptx = dev_get_priv(phy->dev);
+	int bus_width = hdptx->bus_width;
+	u8 color_depth = (bus_width & COLOR_DEPTH_MASK) ? 1 : 0;
+
+	if (color_depth)
+		rate = (rate / 100) * 5 / 4;
+	else
+		rate = rate / 100;
+	return hdptx_ropll_cmn_config(hdptx, rate);
+}
+
+static int
+rockchip_hdptx_phy_set_bus_width(struct rockchip_phy *phy, u32 bus_width)
+{
+	struct rockchip_hdptx_phy *hdptx = dev_get_priv(phy->dev);
+
+	hdptx->bus_width = bus_width;
+
+	return 0;
+}
+
+const struct rockchip_phy_funcs hdptx_hdmi_phy_funcs = {
+	.power_on = rockchip_hdptx_phy_power_on,
+	.power_off = rockchip_hdptx_phy_power_off,
+	.set_pll = rockchip_hdptx_phy_clk_set_rate,
+	.set_bus_width = rockchip_hdptx_phy_set_bus_width,
+	.round_rate = rockchip_hdptx_phy_clk_round_rate,
+};
+
+static struct rockchip_phy hdptx_hdmi_phy_driver_data0 = {
+	 .funcs = &hdptx_hdmi_phy_funcs,
+};
+
+static struct rockchip_phy hdptx_hdmi_phy_driver_data1 = {
+	 .funcs = &hdptx_hdmi_phy_funcs,
+};
+
+static int rockchip_hdptx_phy_hdmi_probe(struct udevice *dev)
+{
+	struct rockchip_hdptx_phy *hdptx = dev_get_priv(dev);
+	struct rockchip_phy *phy;
+	struct udevice *syscon;
+	int ret;
+
+	hdptx->id = of_alias_get_id(ofnode_to_np(dev->node), "hdptxhdmi");
+	if (hdptx->id < 0)
+		hdptx->id = 0;
+
+	if (!hdptx->id) {
+		g_hdptx0 = hdptx;
+		dev->driver_data = (ulong)&hdptx_hdmi_phy_driver_data0;
+		phy = &hdptx_hdmi_phy_driver_data0;
+	} else {
+		g_hdptx1 = hdptx;
+		dev->driver_data = (ulong)&hdptx_hdmi_phy_driver_data1;
+		phy = &hdptx_hdmi_phy_driver_data1;
+	}
+
+	hdptx->base = dev_read_addr_ptr(dev);
+	if (!hdptx->base)
+		return -ENOENT;
+
+	ret = uclass_get_device_by_phandle(UCLASS_SYSCON, dev, "rockchip,grf",
+					   &syscon);
+	if (ret)
+		return ret;
+
+	hdptx->grf = syscon_get_regmap(syscon);
+	if (IS_ERR(hdptx->grf)) {
+		ret = PTR_ERR(hdptx->grf);
+		dev_err(dev, "unable to find regmap: %d\n", ret);
+		return ret;
+	}
+
+	hdptx->dev = dev;
+	phy->dev = dev;
+
+	ret = reset_get_by_name(dev, "apb", &hdptx->apb_reset);
+	if (ret < 0) {
+		dev_err(dev, "failed to get apb reset: %d\n", ret);
+		return ret;
+	}
+
+	ret = reset_get_by_name(dev, "init", &hdptx->init_reset);
+	if (ret < 0) {
+		dev_err(dev, "failed to get init reset: %d\n", ret);
+		return ret;
+	}
+
+	ret = reset_get_by_name(dev, "cmn", &hdptx->cmn_reset);
+	if (ret < 0) {
+		dev_err(dev, "failed to get cmn reset: %d\n", ret);
+		return ret;
+	}
+
+	ret = reset_get_by_name(dev, "lane", &hdptx->lane_reset);
+	if (ret < 0) {
+		dev_err(dev, "failed to get lane reset: %d\n", ret);
+		return ret;
+	}
+
+	ret = reset_get_by_name(dev, "ropll", &hdptx->ropll_reset);
+	if (ret < 0) {
+		dev_err(dev, "failed to get ropll reset: %d\n", ret);
+		return ret;
+	}
+
+	ret = reset_get_by_name(dev, "lcpll", &hdptx->lcpll_reset);
+	if (ret < 0) {
+		dev_err(dev, "failed to get lane reset: %d\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static const struct udevice_id rockchip_hdptx_phy_hdmi_ids[] = {
+	{ .compatible = "rockchip,rk3588-hdptx-phy-hdmi",
+	  .data = (ulong)&hdptx_hdmi_phy_driver_data0,
+	},
+	{}
+};
+
+U_BOOT_DRIVER(rockchip_hdptx_phy_hdmi) = {
+	.name		= "rockchip_hdptx_phy_hdmi",
+	.id		= UCLASS_PHY,
+	.of_match	= rockchip_hdptx_phy_hdmi_ids,
+	.probe		= rockchip_hdptx_phy_hdmi_probe,
+	.priv_auto_alloc_size = sizeof(struct rockchip_hdptx_phy),
+};
+
+static struct rockchip_hdptx_phy *get_hdptx(struct udevice *dev)
+{
+	if (!strcmp(dev->name, "hdptxphy_hdmi0_uboot"))
+		return g_hdptx0;
+
+	return g_hdptx1;
+}
+
+static ulong hdptx_clk_get_rate(struct clk *clk)
+{
+	struct clk_hdptx *priv = dev_get_priv(clk->dev);
+
+	return priv->rate;
+}
+
+static ulong hdptx_clk_set_rate(struct clk *clk, ulong rate)
+{
+	struct clk_hdptx *priv = dev_get_priv(clk->dev);
+	struct rockchip_hdptx_phy *hdptx = get_hdptx(clk->dev);
+	int bus_width = hdptx->bus_width;
+	u8 color_depth = (bus_width & COLOR_DEPTH_MASK) ? 1 : 0;
+	ulong new_rate = -ENOENT;
+
+	if (color_depth)
+		rate = (rate / 100) * 5 / 4;
+	else
+		rate = rate / 100;
+	if (!hdptx_ropll_cmn_config(hdptx, rate)) {
+		new_rate = rate;
+		priv->rate = rate;
+	}
+
+	return new_rate;
+}
+
+static const struct clk_ops hdptx_clk_ops = {
+	.get_rate	= hdptx_clk_get_rate,
+	.set_rate	= hdptx_clk_set_rate,
+};
+
+static int hdptx_clk_probe(struct udevice *dev)
+{
+	return 0;
+}
+
+static const struct udevice_id hdptx_clk_ids[] = {
+	{ .compatible = "hdmiphy-clock" },
+	{ }
+};
+
+/*
+ * In order for other display interfaces to use hdmiphy as source
+ * for dclk, hdmiphy must register a virtual clock driver
+ */
+U_BOOT_DRIVER(clk_hdptx) = {
+	.name		= "clk_hdptx",
+	.id		= UCLASS_CLK,
+	.of_match	= hdptx_clk_ids,
+	.priv_auto_alloc_size = sizeof(struct clk_hdptx),
+	.ops		= &hdptx_clk_ops,
+	.probe		= hdptx_clk_probe,
+};

commit 916434d9d80a706f273a2a3880a6d6f7b4df547a
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Sat Jan 22 15:56:07 2022 +0800

    edid: Support hdmi2.1
    
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
    Change-Id: I1e40cfa01b7ffab32f1a1f8adcec8355eba01686

diff --git a/common/edid.c b/common/edid.c
index d210f54fb3..e14997ba83 100644
--- a/common/edid.c
+++ b/common/edid.c
@@ -1209,6 +1209,10 @@ static const struct base_drm_display_mode resolution_white[] = {
 			798, 858, 480, 489, 495, 525, 0,
 			DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 1024x768@60Hz */
+	{ DRM_BASE_MODE(65000, 1024, 1048,
+			1184, 1344, 768, 771, 777, 806, 0,
+			DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 2. vic:4 - 1280x720@60Hz */
 	{ DRM_BASE_MODE(74250, 1280, 1390,
 			1430, 1650, 720, 725, 730, 750, 0,
@@ -2854,6 +2858,41 @@ static void drm_parse_y420cmdb_bitmap(struct hdmi_edid_data *data,
 	hdmi->y420_cmdb_map = map;
 }
 
+static
+void drm_get_max_frl_rate(int max_frl_rate, u8 *max_lanes, u8 *max_rate_per_lane)
+{
+	switch (max_frl_rate) {
+	case 1:
+		*max_lanes = 3;
+		*max_rate_per_lane = 3;
+		break;
+	case 2:
+		*max_lanes = 3;
+		*max_rate_per_lane = 6;
+		break;
+	case 3:
+		*max_lanes = 4;
+		*max_rate_per_lane = 6;
+		break;
+	case 4:
+		*max_lanes = 4;
+		*max_rate_per_lane = 8;
+		break;
+	case 5:
+		*max_lanes = 4;
+		*max_rate_per_lane = 10;
+		break;
+	case 6:
+		*max_lanes = 4;
+		*max_rate_per_lane = 12;
+		break;
+	case 0:
+	default:
+		*max_lanes = 0;
+		*max_rate_per_lane = 0;
+	}
+}
+
 static void drm_parse_ycbcr420_deep_color_info(struct hdmi_edid_data *data,
 					       const u8 *db)
 {
@@ -2905,6 +2944,75 @@ static void drm_parse_hdmi_forum_vsdb(struct hdmi_edid_data *data,
 		}
 	}
 
+	if (hf_vsdb[7]) {
+		u8 max_frl_rate;
+		u8 dsc_max_frl_rate;
+		u8 dsc_max_slices;
+		struct drm_hdmi_dsc_cap *hdmi_dsc = &hdmi->dsc_cap;
+
+		debug("hdmi_21 sink detected. parsing edid\n");
+		max_frl_rate = (hf_vsdb[7] & DRM_EDID_MAX_FRL_RATE_MASK) >> 4;
+		drm_get_max_frl_rate(max_frl_rate, &hdmi->max_lanes,
+				     &hdmi->max_frl_rate_per_lane);
+		hdmi_dsc->v_1p2 = hf_vsdb[11] & DRM_EDID_DSC_1P2;
+
+		if (hdmi_dsc->v_1p2) {
+			hdmi_dsc->native_420 = hf_vsdb[11] & DRM_EDID_DSC_NATIVE_420;
+			hdmi_dsc->all_bpp = hf_vsdb[11] & DRM_EDID_DSC_ALL_BPP;
+
+			if (hf_vsdb[11] & DRM_EDID_DSC_16BPC)
+				hdmi_dsc->bpc_supported = 16;
+			else if (hf_vsdb[11] & DRM_EDID_DSC_12BPC)
+				hdmi_dsc->bpc_supported = 12;
+			else if (hf_vsdb[11] & DRM_EDID_DSC_10BPC)
+				hdmi_dsc->bpc_supported = 10;
+			else
+				hdmi_dsc->bpc_supported = 0;
+
+			dsc_max_frl_rate = (hf_vsdb[12] & DRM_EDID_DSC_MAX_FRL_RATE_MASK) >> 4;
+			drm_get_max_frl_rate(dsc_max_frl_rate, &hdmi_dsc->max_lanes,
+					     &hdmi_dsc->max_frl_rate_per_lane);
+			hdmi_dsc->total_chunk_kbytes =
+				hf_vsdb[13] & DRM_EDID_DSC_TOTAL_CHUNK_KBYTES;
+
+			dsc_max_slices = hf_vsdb[12] & DRM_EDID_DSC_MAX_SLICES;
+			switch (dsc_max_slices) {
+			case 1:
+				hdmi_dsc->max_slices = 1;
+				hdmi_dsc->clk_per_slice = 340;
+				break;
+			case 2:
+				hdmi_dsc->max_slices = 2;
+				hdmi_dsc->clk_per_slice = 340;
+				break;
+			case 3:
+				hdmi_dsc->max_slices = 4;
+				hdmi_dsc->clk_per_slice = 340;
+				break;
+			case 4:
+				hdmi_dsc->max_slices = 8;
+				hdmi_dsc->clk_per_slice = 340;
+				break;
+			case 5:
+				hdmi_dsc->max_slices = 8;
+				hdmi_dsc->clk_per_slice = 400;
+				break;
+			case 6:
+				hdmi_dsc->max_slices = 12;
+				hdmi_dsc->clk_per_slice = 400;
+				break;
+			case 7:
+				hdmi_dsc->max_slices = 16;
+				hdmi_dsc->clk_per_slice = 400;
+				break;
+			case 0:
+			default:
+				hdmi_dsc->max_slices = 0;
+				hdmi_dsc->clk_per_slice = 0;
+			}
+		}
+	}
+
 	drm_parse_ycbcr420_deep_color_info(data, hf_vsdb);
 }
 
@@ -5294,6 +5402,8 @@ drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame,
 		frame->picture_aspect = drm_get_cea_aspect_ratio(
 						frame->video_code);
 
+	if (frame->picture_aspect > HDMI_PICTURE_ASPECT_16_9)
+		frame->picture_aspect = HDMI_PICTURE_ASPECT_NONE;
 	frame->active_aspect = HDMI_ACTIVE_ASPECT_PICTURE;
 	frame->scan_mode = HDMI_SCAN_MODE_UNDERSCAN;
 
@@ -5548,6 +5658,122 @@ ssize_t hdmi_avi_infoframe_pack(struct hdmi_avi_infoframe *frame, void *buffer,
 }
 EXPORT_SYMBOL(hdmi_avi_infoframe_pack);
 
+static int hdmi_avi_infoframe_check_only(const struct hdmi_avi_infoframe *frame)
+{
+	if (frame->type != HDMI_INFOFRAME_TYPE_AVI ||
+	    frame->version != 2 ||
+	    frame->length != HDMI_AVI_INFOFRAME_SIZE)
+		return -EINVAL;
+
+	if (frame->picture_aspect > HDMI_PICTURE_ASPECT_16_9)
+		return -EINVAL;
+
+	return 0;
+}
+
+/**
+ * hdmi_avi_infoframe_check() - check a HDMI AVI infoframe
+ * @frame: HDMI AVI infoframe
+ *
+ * Validates that the infoframe is consistent and updates derived fields
+ * (eg. length) based on other fields.
+ *
+ * Returns 0 on success or a negative error code on failure.
+ */
+int hdmi_avi_infoframe_check(struct hdmi_avi_infoframe *frame)
+{
+	return hdmi_avi_infoframe_check_only(frame);
+}
+EXPORT_SYMBOL(hdmi_avi_infoframe_check);
+
+/**
+ * hdmi_avi_infoframe_pack_only() - write HDMI AVI infoframe to binary buffer
+ * @frame: HDMI AVI infoframe
+ * @buffer: destination buffer
+ * @size: size of buffer
+ *
+ * Packs the information contained in the @frame structure into a binary
+ * representation that can be written into the corresponding controller
+ * registers. Also computes the checksum as required by section 5.3.5 of
+ * the HDMI 1.4 specification.
+ *
+ * Returns the number of bytes packed into the binary buffer or a negative
+ * error code on failure.
+ */
+ssize_t hdmi_avi_infoframe_pack_only(const struct hdmi_avi_infoframe *frame,
+				     void *buffer, size_t size)
+{
+	u8 *ptr = buffer;
+	size_t length;
+	int ret;
+
+	ret = hdmi_avi_infoframe_check_only(frame);
+	if (ret)
+		return ret;
+
+	length = HDMI_INFOFRAME_HEADER_SIZE + frame->length;
+
+	if (size < length)
+		return -ENOSPC;
+
+	memset(buffer, 0, size);
+
+	ptr[0] = frame->type;
+	ptr[1] = frame->version;
+	ptr[2] = frame->length;
+	ptr[3] = 0; /* checksum */
+
+	/* start infoframe payload */
+	ptr += HDMI_INFOFRAME_HEADER_SIZE;
+
+	ptr[0] = ((frame->colorspace & 0x3) << 5) | (frame->scan_mode & 0x3);
+
+	/*
+	 * Data byte 1, bit 4 has to be set if we provide the active format
+	 * aspect ratio
+	 */
+	if (frame->active_aspect & 0xf)
+		ptr[0] |= BIT(4);
+
+	/* Bit 3 and 2 indicate if we transmit horizontal/vertical bar data */
+	if (frame->top_bar || frame->bottom_bar)
+		ptr[0] |= BIT(3);
+
+	if (frame->left_bar || frame->right_bar)
+		ptr[0] |= BIT(2);
+
+	ptr[1] = ((frame->colorimetry & 0x3) << 6) |
+		 ((frame->picture_aspect & 0x3) << 4) |
+		 (frame->active_aspect & 0xf);
+
+	ptr[2] = ((frame->extended_colorimetry & 0x7) << 4) |
+		 ((frame->quantization_range & 0x3) << 2) |
+		 (frame->nups & 0x3);
+
+	if (frame->itc)
+		ptr[2] |= BIT(7);
+
+	ptr[3] = frame->video_code & 0xff;
+
+	ptr[4] = ((frame->ycc_quantization_range & 0x3) << 6) |
+		 ((frame->content_type & 0x3) << 4) |
+		 (frame->pixel_repeat & 0xf);
+
+	ptr[5] = frame->top_bar & 0xff;
+	ptr[6] = (frame->top_bar >> 8) & 0xff;
+	ptr[7] = frame->bottom_bar & 0xff;
+	ptr[8] = (frame->bottom_bar >> 8) & 0xff;
+	ptr[9] = frame->left_bar & 0xff;
+	ptr[10] = (frame->left_bar >> 8) & 0xff;
+	ptr[11] = frame->right_bar & 0xff;
+	ptr[12] = (frame->right_bar >> 8) & 0xff;
+
+	hdmi_infoframe_set_checksum(buffer, length);
+
+	return length;
+}
+EXPORT_SYMBOL(hdmi_avi_infoframe_pack_only);
+
 /**
  * hdmi_spd_infoframe_init() - initialize an HDMI SPD infoframe
  * @frame: HDMI SPD infoframe
diff --git a/include/edid.h b/include/edid.h
index 6dc5564366..72af0322b7 100644
--- a/include/edid.h
+++ b/include/edid.h
@@ -351,6 +351,36 @@ struct edid_monitor_descriptor {
 				    DRM_EDID_YCBCR420_DC_36 | \
 				    DRM_EDID_YCBCR420_DC_30)
 
+/* HDMI 2.1 additional fields */
+#define DRM_EDID_MAX_FRL_RATE_MASK		0xf0
+#define DRM_EDID_FAPA_START_LOCATION		BIT(0)
+#define DRM_EDID_ALLM				BIT(1)
+#define DRM_EDID_FVA				BIT(2)
+
+/* Deep Color specific */
+#define DRM_EDID_DC_30BIT_420			BIT(0)
+#define DRM_EDID_DC_36BIT_420			BIT(1)
+#define DRM_EDID_DC_48BIT_420			BIT(2)
+
+/* VRR specific */
+#define DRM_EDID_CNMVRR				BIT(3)
+#define DRM_EDID_CINEMA_VRR			BIT(4)
+#define DRM_EDID_MDELTA				BIT(5)
+#define DRM_EDID_VRR_MAX_UPPER_MASK		0xc0
+#define DRM_EDID_VRR_MAX_LOWER_MASK		0xff
+#define DRM_EDID_VRR_MIN_MASK			0x3f
+
+/* DSC specific */
+#define DRM_EDID_DSC_10BPC			BIT(0)
+#define DRM_EDID_DSC_12BPC			BIT(1)
+#define DRM_EDID_DSC_16BPC			BIT(2)
+#define DRM_EDID_DSC_ALL_BPP			BIT(3)
+#define DRM_EDID_DSC_NATIVE_420			BIT(6)
+#define DRM_EDID_DSC_1P2			BIT(7)
+#define DRM_EDID_DSC_MAX_FRL_RATE_MASK		0xf0
+#define DRM_EDID_DSC_MAX_SLICES			0xf
+#define DRM_EDID_DSC_TOTAL_CHUNK_KBYTES		0x3f
+
 struct edid1_info {
 	unsigned char header[8];
 	unsigned char manufacturer_name[2];
@@ -589,6 +619,47 @@ struct drm_scdc {
 	struct drm_scrambling scrambling;
 };
 
+/**
+ * struct drm_hdmi_dsc_cap - DSC capabilities of HDMI sink
+ *
+ * Describes the DSC support provided by HDMI 2.1 sink.
+ * The information is fetched fom additional HFVSDB blocks defined
+ * for HDMI 2.1.
+ */
+struct drm_hdmi_dsc_cap {
+	/** @v_1p2: flag for dsc1.2 version support by sink */
+	bool v_1p2;
+
+	/** @native_420: Does sink support DSC with 4:2:0 compression */
+	bool native_420;
+
+	/**
+	 * @all_bpp: Does sink support all bpp with 4:4:4: or 4:2:2
+	 * compressed formats
+	 */
+	bool all_bpp;
+
+	/**
+	 * @bpc_supported: compressed bpc supported by sink : 10, 12 or 16 bpc
+	 */
+	u8 bpc_supported;
+
+	/** @max_slices: maximum number of Horizontal slices supported by */
+	u8 max_slices;
+
+	/** @clk_per_slice : max pixel clock in MHz supported per slice */
+	int clk_per_slice;
+
+	/** @max_lanes : dsc max lanes supported for Fixed rate Link training */
+	u8 max_lanes;
+
+	/** @max_frl_rate_per_lane : maximum frl rate with DSC per lane */
+	u8 max_frl_rate_per_lane;
+
+	/** @total_chunk_kbytes: max size of chunks in KBs supported per line*/
+	u8 total_chunk_kbytes;
+};
+
 /**
  * struct drm_hdmi_info - runtime information about the connected HDMI sink
  *
@@ -619,6 +690,15 @@ struct drm_hdmi_info {
 
 	/** @y420_dc_modes: bitmap of deep color support index */
 	u8 y420_dc_modes;
+
+	/** @max_frl_rate_per_lane: support fixed rate link */
+	u8 max_frl_rate_per_lane;
+
+	/** @max_lanes: supported by sink */
+	u8 max_lanes;
+
+	/** @dsc_cap: DSC capabilities of the sink */
+	struct drm_hdmi_dsc_cap dsc_cap;
 };
 
 enum subpixel_order {

commit da48e0249a5c06603da03ea5bc368cb995bfaf38
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Sat Jan 22 15:54:03 2022 +0800

    clk: rockchip: rk3588: Support hdmiphy pll
    
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
    Change-Id: I4fa787ed2b6057579985ab8469adef888eee1ee7

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3588.h b/arch/arm/include/asm/arch-rockchip/cru_rk3588.h
index 7659092687..4b3da3aeb9 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3588.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3588.h
@@ -361,6 +361,12 @@ enum {
 	DCLK0_VOP_SRC_DIV_MASK			= 0x7f << DCLK0_VOP_SRC_DIV_SHIFT,
 
 	/* CRU_CLK_SEL112_CON */
+	DCLK2_VOP_SEL_SHIFT			= 11,
+	DCLK2_VOP_SEL_MASK			= 3 << DCLK2_VOP_SEL_SHIFT,
+	DCLK1_VOP_SEL_SHIFT			= 9,
+	DCLK1_VOP_SEL_MASK			= 3 << DCLK1_VOP_SEL_SHIFT,
+	DCLK0_VOP_SEL_SHIFT			= 7,
+	DCLK0_VOP_SEL_MASK			= 3 << DCLK0_VOP_SEL_SHIFT,
 	DCLK2_VOP_SRC_SEL_SHIFT			= 5,
 	DCLK2_VOP_SRC_SEL_MASK			= 3 << DCLK2_VOP_SRC_SEL_SHIFT,
 	DCLK2_VOP_SRC_DIV_SHIFT			= 0,
diff --git a/drivers/clk/rockchip/clk_rk3588.c b/drivers/clk/rockchip/clk_rk3588.c
index 2be8403848..f47773016d 100644
--- a/drivers/clk/rockchip/clk_rk3588.c
+++ b/drivers/clk/rockchip/clk_rk3588.c
@@ -1847,6 +1847,18 @@ static int __maybe_unused rk3588_dclk_vop_set_parent(struct clk *clk,
 	struct rk3588_clk_priv *priv = dev_get_priv(clk->dev);
 	struct rk3588_cru *cru = priv->cru;
 	u32 sel;
+	const char *clock_output_name;
+	char v0pll_name[] = "v0pll";
+	int ret = 0;
+
+	if (parent->id == PLL_V0PLL) {
+		clock_output_name = v0pll_name;
+	} else {
+		ret = dev_read_string_index(parent->dev, "clock-output-names",
+					    parent->id, &clock_output_name);
+		if (ret < 0)
+			return -ENODATA;
+	}
 
 	if (parent->id == PLL_V0PLL)
 		sel = 2;
@@ -1874,6 +1886,36 @@ static int __maybe_unused rk3588_dclk_vop_set_parent(struct clk *clk,
 		rk_clrsetreg(&cru->clksel_con[113], DCLK3_VOP_SRC_SEL_MASK,
 			     sel << DCLK3_VOP_SRC_SEL_SHIFT);
 		break;
+	case DCLK_VOP0:
+		if (!strcmp(clock_output_name, "hdmiphypll0"))
+			sel = 1;
+		else if (!strcmp(clock_output_name, "hdmiphypll1"))
+			sel = 2;
+		else
+			sel = 0;
+		rk_clrsetreg(&cru->clksel_con[112], DCLK0_VOP_SEL_MASK,
+			     sel << DCLK0_VOP_SEL_SHIFT);
+		break;
+	case DCLK_VOP1:
+		if (!strcmp(clock_output_name, "hdmiphypll0"))
+			sel = 1;
+		else if (!strcmp(clock_output_name, "hdmiphypll1"))
+			sel = 2;
+		else
+			sel = 0;
+		rk_clrsetreg(&cru->clksel_con[112], DCLK1_VOP_SEL_MASK,
+			     sel << DCLK1_VOP_SEL_SHIFT);
+		break;
+	case DCLK_VOP2:
+		if (!strcmp(clock_output_name, "hdmiphypll0"))
+			sel = 1;
+		else if (!strcmp(clock_output_name, "hdmiphypll1"))
+			sel = 2;
+		else
+			sel = 0;
+		rk_clrsetreg(&cru->clksel_con[112], DCLK2_VOP_SEL_MASK,
+			     sel << DCLK2_VOP_SEL_SHIFT);
+		break;
 	default:
 		return -EINVAL;
 	}
@@ -1886,6 +1928,9 @@ static int rk3588_clk_set_parent(struct clk *clk, struct clk *parent)
 	case DCLK_VOP0_SRC:
 	case DCLK_VOP1_SRC:
 	case DCLK_VOP2_SRC:
+	case DCLK_VOP0:
+	case DCLK_VOP1:
+	case DCLK_VOP2:
 	case DCLK_VOP3:
 		return rk3588_dclk_vop_set_parent(clk, parent);
 	default:

commit 43108afae31deb165ea5a5eafc31780e9ad48077
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Thu Jan 27 10:23:07 2022 +0800

    mtd: spinand: macronix: Support more devices
    
    MX35LF1G24AD,MX35LF2G24AD,MX35LF4G24AD,MX31LF1GE4BC,
    MX31UF1GE4BC,MX35LF2G14AC,MX35UF4G24AD,MX35UF4GE4AD,
    MX35UF2G14AC,MX35UF2G24AD,MX35UF2GE4AD,MX35UF1G14AC,
    MX35UF1G24AD,MX35UF1GE4AD,MX35UF1GE4AC
    
    Change-Id: If04e442cbcd7d1bad4116e175f0a75834d968e13
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/macronix.c b/drivers/mtd/nand/spi/macronix.c
index dbb1d5079f..1a1d044576 100644
--- a/drivers/mtd/nand/spi/macronix.c
+++ b/drivers/mtd/nand/spi/macronix.c
@@ -51,23 +51,6 @@ static const struct mtd_ooblayout_ops mx35lfxge4ab_ooblayout = {
 	.rfree = mx35lfxge4ab_ooblayout_free,
 };
 
-static int mx35ufxge4ac_ooblayout_free(struct mtd_info *mtd, int section,
-				       struct mtd_oob_region *region)
-{
-	if (section > 3)
-		return -ERANGE;
-
-	region->offset = (16 * section) + 2;
-	region->length = 14;
-
-	return 0;
-}
-
-static const struct mtd_ooblayout_ops mx35ufxge4ac_ooblayout = {
-	.ecc = mx35lfxge4ab_ooblayout_ecc,
-	.rfree = mx35ufxge4ac_ooblayout_free,
-};
-
 static int mx35lf1ge4ab_get_eccsr(struct spinand_device *spinand, u8 *eccsr)
 {
 	struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(0x7c, 1),
@@ -139,7 +122,7 @@ static const struct spinand_info macronix_spinand_table[] = {
 		     SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL)),
 	SPINAND_INFO("MX35LF2GE4AD",
 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x26),
-		     NAND_MEMORG(1, 2048, 64, 64, 2048, 2, 1, 1),
+		     NAND_MEMORG(1, 2048, 64, 64, 2048, 1, 1, 1),
 		     NAND_ECCREQ(8, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
 					      &write_cache_variants,
@@ -149,7 +132,7 @@ static const struct spinand_info macronix_spinand_table[] = {
 				     mx35lf1ge4ab_ecc_get_status)),
 	SPINAND_INFO("MX35LF4GE4AD",
 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x37),
-		     NAND_MEMORG(1, 4096, 128, 64, 2048, 2, 1, 1),
+		     NAND_MEMORG(1, 4096, 128, 64, 2048, 1, 1, 1),
 		     NAND_ECCREQ(8, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
 					      &write_cache_variants,
@@ -157,26 +140,165 @@ static const struct spinand_info macronix_spinand_table[] = {
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
 				     mx35lf1ge4ab_ecc_get_status)),
-	SPINAND_INFO("MX35UF1GE4AC",
-		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x92),
+	SPINAND_INFO("MX35LF1G24AD",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x14),
+		     NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL)),
+	SPINAND_INFO("MX35LF2G24AD",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x24),
+		     NAND_MEMORG(1, 2048, 128, 64, 2048, 2, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL)),
+	SPINAND_INFO("MX35LF4G24AD",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x35),
+		     NAND_MEMORG(1, 4096, 256, 64, 2048, 2, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL)),
+	SPINAND_INFO("MX31LF1GE4BC",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x1e),
 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+				     mx35lf1ge4ab_ecc_get_status)),
+	SPINAND_INFO("MX31UF1GE4BC",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x9e),
+		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+				     mx35lf1ge4ab_ecc_get_status)),
+
+	SPINAND_INFO("MX35LF2G14AC",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x20),
+		     NAND_MEMORG(1, 2048, 64, 64, 2048, 2, 1, 1),
 		     NAND_ECCREQ(4, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
 					      &write_cache_variants,
 					      &update_cache_variants),
 		     SPINAND_HAS_QE_BIT,
-		     SPINAND_ECCINFO(&mx35ufxge4ac_ooblayout,
+		     SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+				     mx35lf1ge4ab_ecc_get_status)),
+	SPINAND_INFO("MX35UF4G24AD",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xb5),
+		     NAND_MEMORG(1, 4096, 256, 64, 2048, 2, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+				     mx35lf1ge4ab_ecc_get_status)),
+	SPINAND_INFO("MX35UF4GE4AD",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xb7),
+		     NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+				     mx35lf1ge4ab_ecc_get_status)),
+	SPINAND_INFO("MX35UF2G14AC",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xa0),
+		     NAND_MEMORG(1, 2048, 64, 64, 2048, 2, 1, 1),
+		     NAND_ECCREQ(4, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+				     mx35lf1ge4ab_ecc_get_status)),
+	SPINAND_INFO("MX35UF2G24AD",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xa4),
+		     NAND_MEMORG(1, 2048, 128, 64, 2048, 2, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+				     mx35lf1ge4ab_ecc_get_status)),
+	SPINAND_INFO("MX35UF2GE4AD",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xa6),
+		     NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
 				     mx35lf1ge4ab_ecc_get_status)),
 	SPINAND_INFO("MX35UF2GE4AC",
-		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xA2),
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xa2),
 		     NAND_MEMORG(1, 2048, 64, 64, 2048, 1, 1, 1),
 		     NAND_ECCREQ(4, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
 					      &write_cache_variants,
 					      &update_cache_variants),
 		     SPINAND_HAS_QE_BIT,
-		     SPINAND_ECCINFO(&mx35ufxge4ac_ooblayout,
+		     SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+				     mx35lf1ge4ab_ecc_get_status)),
+	SPINAND_INFO("MX35UF1G14AC",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x90),
+		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
+		     NAND_ECCREQ(4, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+				     mx35lf1ge4ab_ecc_get_status)),
+	SPINAND_INFO("MX35UF1G24AD",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x94),
+		     NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+				     mx35lf1ge4ab_ecc_get_status)),
+	SPINAND_INFO("MX35UF1GE4AD",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x96),
+		     NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+				     mx35lf1ge4ab_ecc_get_status)),
+	SPINAND_INFO("MX35UF1GE4AC",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x92),
+		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
+		     NAND_ECCREQ(4, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
 				     mx35lf1ge4ab_ecc_get_status)),
+
 };
 
 static const struct spinand_manufacturer_ops macronix_spinand_manuf_ops = {

commit 3a9e62610d98880bc0172db30a87752f3f2b2a60
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Thu Jan 27 10:20:56 2022 +0800

    mtd: spinand: gigadevice: Support more devices
    
    GD5F1GQ4xA,GD5F2GQ4xA,GD5F4GQ4xA,GD5F4GQ4RC,GD5F4GQ4UC,GD5F1GQ4UFxxG
    
    Change-Id: I5413308c168092a10790415c914e5e8066856caa
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/gigadevice.c b/drivers/mtd/nand/spi/gigadevice.c
index f47a3acfb2..2c6aea2ec3 100644
--- a/drivers/mtd/nand/spi/gigadevice.c
+++ b/drivers/mtd/nand/spi/gigadevice.c
@@ -13,19 +13,36 @@
 #include <linux/mtd/spinand.h>
 
 #define SPINAND_MFR_GIGADEVICE			0xC8
-#define GD5FXGQ4XA_STATUS_ECC_BELOW_BITFLIPS	(1 << 4)
-#define GD5FXGQ4XA_STATUS_ECC_MAX_BITFLIPS	(3 << 4)
 
-#define GD5FXGQ4XEXXG_REG_STATUS2		0xf0
+#define GD5FXGQ4XA_STATUS_ECC_1_7_BITFLIPS	(1 << 4)
+#define GD5FXGQ4XA_STATUS_ECC_8_BITFLIPS	(3 << 4)
+
+#define GD5FXGQ5XE_STATUS_ECC_1_4_BITFLIPS	(1 << 4)
+#define GD5FXGQ5XE_STATUS_ECC_4_BITFLIPS	(3 << 4)
+
+#define GD5FXGQXXEXXG_REG_STATUS2		0xf0
+
+#define GD5FXGQ4UXFXXG_STATUS_ECC_MASK		(7 << 4)
+#define GD5FXGQ4UXFXXG_STATUS_ECC_NO_BITFLIPS	(0 << 4)
+#define GD5FXGQ4UXFXXG_STATUS_ECC_1_3_BITFLIPS	(1 << 4)
+#define GD5FXGQ4UXFXXG_STATUS_ECC_UNCOR_ERROR	(7 << 4)
 
 static SPINAND_OP_VARIANTS(read_cache_variants,
-		SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 1, NULL, 0),
 		SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
 		SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
 		SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
 		SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
 		SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
 
+static SPINAND_OP_VARIANTS(read_cache_variants_f,
+		SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_X4_OP_3A(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_X2_OP_3A(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_OP_3A(true, 0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_OP_3A(false, 0, 0, NULL, 0));
+
 static SPINAND_OP_VARIANTS(write_cache_variants,
 		SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
 		SPINAND_PROG_LOAD(true, 0, NULL, 0));
@@ -34,7 +51,65 @@ static SPINAND_OP_VARIANTS(update_cache_variants,
 		SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
 		SPINAND_PROG_LOAD(false, 0, NULL, 0));
 
-static int gd5fxgq4xexxg_ooblayout_ecc(struct mtd_info *mtd, int section,
+static int gd5fxgq4xa_ooblayout_ecc(struct mtd_info *mtd, int section,
+				  struct mtd_oob_region *region)
+{
+	if (section > 3)
+		return -ERANGE;
+
+	region->offset = (16 * section) + 8;
+	region->length = 8;
+
+	return 0;
+}
+
+static int gd5fxgq4xa_ooblayout_free(struct mtd_info *mtd, int section,
+				   struct mtd_oob_region *region)
+{
+	if (section > 3)
+		return -ERANGE;
+
+	if (section) {
+		region->offset = 16 * section;
+		region->length = 8;
+	} else {
+		/* section 0 has one byte reserved for bad block mark */
+		region->offset = 1;
+		region->length = 7;
+	}
+	return 0;
+}
+
+static const struct mtd_ooblayout_ops gd5fxgq4xa_ooblayout = {
+	.ecc = gd5fxgq4xa_ooblayout_ecc,
+	.rfree = gd5fxgq4xa_ooblayout_free,
+};
+
+static int gd5fxgq4xa_ecc_get_status(struct spinand_device *spinand,
+					 u8 status)
+{
+	switch (status & STATUS_ECC_MASK) {
+	case STATUS_ECC_NO_BITFLIPS:
+		return 0;
+
+	case GD5FXGQ4XA_STATUS_ECC_1_7_BITFLIPS:
+		/* 1-7 bits are flipped. return the maximum. */
+		return 7;
+
+	case GD5FXGQ4XA_STATUS_ECC_8_BITFLIPS:
+		return 8;
+
+	case STATUS_ECC_UNCOR_ERROR:
+		return -EBADMSG;
+
+	default:
+		break;
+	}
+
+	return -EINVAL;
+}
+
+static int gd5fxgqx_variant2_ooblayout_ecc(struct mtd_info *mtd, int section,
 				       struct mtd_oob_region *region)
 {
 	if (section)
@@ -46,7 +121,61 @@ static int gd5fxgq4xexxg_ooblayout_ecc(struct mtd_info *mtd, int section,
 	return 0;
 }
 
-static int gd5fxgq4xexxg_ooblayout_free(struct mtd_info *mtd, int section,
+static int gd5fxgqx_variant2_ooblayout_free(struct mtd_info *mtd, int section,
+					struct mtd_oob_region *region)
+{
+	if (section)
+		return -ERANGE;
+
+	/* Reserve 1 bytes for the BBM. */
+	region->offset = 1;
+	region->length = 63;
+
+	return 0;
+}
+
+/* Valid for Q4/Q5 and Q6 (untested) devices */
+static const struct mtd_ooblayout_ops gd5fxgqx_variant2_ooblayout = {
+	.ecc = gd5fxgqx_variant2_ooblayout_ecc,
+	.rfree = gd5fxgqx_variant2_ooblayout_free,
+};
+
+static int gd5fxgq4xc_ooblayout_256_ecc(struct mtd_info *mtd, int section,
+					struct mtd_oob_region *oobregion)
+{
+	if (section)
+		return -ERANGE;
+
+	oobregion->offset = 128;
+	oobregion->length = 128;
+
+	return 0;
+}
+
+static int gd5fxgq4xc_ooblayout_256_free(struct mtd_info *mtd, int section,
+					 struct mtd_oob_region *oobregion)
+{
+	if (section)
+		return -ERANGE;
+
+	oobregion->offset = 1;
+	oobregion->length = 127;
+
+	return 0;
+}
+
+static const struct mtd_ooblayout_ops gd5fxgq4xc_oob_256_ops = {
+	.ecc = gd5fxgq4xc_ooblayout_256_ecc,
+	.rfree = gd5fxgq4xc_ooblayout_256_free,
+};
+
+static int gd5fxgqx_variant3_ooblayout_ecc(struct mtd_info *mtd, int section,
+				       struct mtd_oob_region *region)
+{
+	return -ERANGE;
+}
+
+static int gd5fxgqx_variant3_ooblayout_free(struct mtd_info *mtd, int section,
 					struct mtd_oob_region *region)
 {
 	if (section)
@@ -59,11 +188,16 @@ static int gd5fxgq4xexxg_ooblayout_free(struct mtd_info *mtd, int section,
 	return 0;
 }
 
-static int gd5f1gq4xexxg_ecc_get_status(struct spinand_device *spinand,
+static const struct mtd_ooblayout_ops gd5fxgqx_variant3_ooblayout = {
+	.ecc = gd5fxgqx_variant3_ooblayout_ecc,
+	.rfree = gd5fxgqx_variant3_ooblayout_free,
+};
+
+static int gd5fxgq4uexxg_ecc_get_status(struct spinand_device *spinand,
 					u8 status)
 {
 	u8 status2;
-	struct spi_mem_op op = SPINAND_GET_FEATURE_OP(GD5FXGQ4XEXXG_REG_STATUS2,
+	struct spi_mem_op op = SPINAND_GET_FEATURE_OP(GD5FXGQXXEXXG_REG_STATUS2,
 						      &status2);
 	int ret;
 
@@ -71,7 +205,7 @@ static int gd5f1gq4xexxg_ecc_get_status(struct spinand_device *spinand,
 	case STATUS_ECC_NO_BITFLIPS:
 		return 0;
 
-	case GD5FXGQ4XA_STATUS_ECC_BELOW_BITFLIPS:
+	case GD5FXGQ4XA_STATUS_ECC_1_7_BITFLIPS:
 		/*
 		 * Read status2 register to determine a more fine grained
 		 * bit error status
@@ -88,7 +222,7 @@ static int gd5f1gq4xexxg_ecc_get_status(struct spinand_device *spinand,
 		return ((status & STATUS_ECC_MASK) >> 2) |
 			((status2 & STATUS_ECC_MASK) >> 4);
 
-	case GD5FXGQ4XA_STATUS_ECC_MAX_BITFLIPS:
+	case GD5FXGQ4XA_STATUS_ECC_8_BITFLIPS:
 		return 8;
 
 	case STATUS_ECC_UNCOR_ERROR:
@@ -105,7 +239,7 @@ static int gd5fxgq5xexxg_ecc_get_status(struct spinand_device *spinand,
 					u8 status)
 {
 	u8 status2;
-	struct spi_mem_op op = SPINAND_GET_FEATURE_OP(GD5FXGQ4XEXXG_REG_STATUS2,
+	struct spi_mem_op op = SPINAND_GET_FEATURE_OP(GD5FXGQXXEXXG_REG_STATUS2,
 						      &status2);
 	int ret;
 
@@ -113,7 +247,7 @@ static int gd5fxgq5xexxg_ecc_get_status(struct spinand_device *spinand,
 	case STATUS_ECC_NO_BITFLIPS:
 		return 0;
 
-	case GD5FXGQ4XA_STATUS_ECC_BELOW_BITFLIPS:
+	case GD5FXGQ5XE_STATUS_ECC_1_4_BITFLIPS:
 		/*
 		 * Read status2 register to determine a more fine grained
 		 * bit error status
@@ -123,15 +257,10 @@ static int gd5fxgq5xexxg_ecc_get_status(struct spinand_device *spinand,
 			return ret;
 
 		/*
-		 * 1 ... 4 bits are flipped (1..4 can't be detected, so
-		 * report the maximum of 4 in this case
+		 * 1 ... 4 bits are flipped (and corrected)
 		 */
-		/* bits sorted this way (3...0): ECCS1,ECCS0,ECCSE1,ECCSE0 */
-		return (((status & STATUS_ECC_MASK) >> 2) |
-			((status2 & STATUS_ECC_MASK) >> 4)) - 3;
-
-	case GD5FXGQ4XA_STATUS_ECC_MAX_BITFLIPS:
-		return -EBADMSG;
+		/* bits sorted this way (1...0): ECCSE1, ECCSE0 */
+		return ((status2 & STATUS_ECC_MASK) >> 4) + 1;
 
 	case STATUS_ECC_UNCOR_ERROR:
 		return -EBADMSG;
@@ -143,36 +272,77 @@ static int gd5fxgq5xexxg_ecc_get_status(struct spinand_device *spinand,
 	return -EINVAL;
 }
 
-static const struct mtd_ooblayout_ops gd5fxgq4xexxg_ooblayout = {
-	.ecc = gd5fxgq4xexxg_ooblayout_ecc,
-	.rfree = gd5fxgq4xexxg_ooblayout_free,
-};
-
-static int gd5fxgq4xexxh_ooblayout_ecc(struct mtd_info *mtd, int section,
-				       struct mtd_oob_region *region)
+static int gd5fxgq4ufxxg_ecc_get_status(struct spinand_device *spinand,
+					u8 status)
 {
-	return -ERANGE;
-}
+	switch (status & GD5FXGQ4UXFXXG_STATUS_ECC_MASK) {
+	case GD5FXGQ4UXFXXG_STATUS_ECC_NO_BITFLIPS:
+		return 0;
 
-static int gd5fxgq4xexxh_ooblayout_free(struct mtd_info *mtd, int section,
-					struct mtd_oob_region *region)
-{
-	if (section)
-		return -ERANGE;
+	case GD5FXGQ4UXFXXG_STATUS_ECC_1_3_BITFLIPS:
+		return 3;
 
-	/* Reserve 1 bytes for the BBM. */
-	region->offset = 1;
-	region->length = 63;
+	case GD5FXGQ4UXFXXG_STATUS_ECC_UNCOR_ERROR:
+		return -EBADMSG;
 
-	return 0;
-}
+	default: /* (2 << 4) through (6 << 4) are 4-8 corrected errors */
+		return ((status & GD5FXGQ4UXFXXG_STATUS_ECC_MASK) >> 4) + 2;
+	}
 
-static const struct mtd_ooblayout_ops gd5fxgq4xexxh_ooblayout = {
-	.ecc = gd5fxgq4xexxh_ooblayout_ecc,
-	.rfree = gd5fxgq4xexxh_ooblayout_free,
-};
+	return -EINVAL;
+}
 
 static const struct spinand_info gigadevice_spinand_table[] = {
+	SPINAND_INFO("GD5F1GQ4xA",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0xf1),
+		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&gd5fxgq4xa_ooblayout,
+				     gd5fxgq4xa_ecc_get_status)),
+	SPINAND_INFO("GD5F2GQ4xA",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0xf2),
+		     NAND_MEMORG(1, 2048, 64, 64, 2048, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&gd5fxgq4xa_ooblayout,
+				     gd5fxgq4xa_ecc_get_status)),
+	SPINAND_INFO("GD5F4GQ4xA",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0xf4),
+		     NAND_MEMORG(1, 2048, 64, 64, 4096, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&gd5fxgq4xa_ooblayout,
+				     gd5fxgq4xa_ecc_get_status)),
+	SPINAND_INFO("GD5F4GQ4RC",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE, 0xa4, 0x68),
+		     NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants_f,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&gd5fxgq4xc_oob_256_ops,
+				     gd5fxgq4ufxxg_ecc_get_status)),
+	SPINAND_INFO("GD5F4GQ4UC",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE, 0xb4, 0x68),
+		     NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants_f,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&gd5fxgq4xc_oob_256_ops,
+				     gd5fxgq4ufxxg_ecc_get_status)),
 	SPINAND_INFO("GD5F1GQ4UExxG",
 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0xd1),
 		     NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
@@ -181,17 +351,27 @@ static const struct spinand_info gigadevice_spinand_table[] = {
 					      &write_cache_variants,
 					      &update_cache_variants),
 		     SPINAND_HAS_QE_BIT,
-		     SPINAND_ECCINFO(&gd5fxgq4xexxg_ooblayout,
-				     gd5f1gq4xexxg_ecc_get_status)),
+		     SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout,
+				     gd5fxgq4uexxg_ecc_get_status)),
+	SPINAND_INFO("GD5F1GQ4UFxxG",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE, 0xb1, 0x48),
+		     NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants_f,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout,
+				     gd5fxgq4ufxxg_ecc_get_status)),
 	SPINAND_INFO("GD5F1GQ5UExxG",
-		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x51),
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x51),
 		     NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
 		     NAND_ECCREQ(4, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
 					      &write_cache_variants,
 					      &update_cache_variants),
 		     SPINAND_HAS_QE_BIT,
-		     SPINAND_ECCINFO(&gd5fxgq4xexxg_ooblayout,
+		     SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout,
 				     gd5fxgq5xexxg_ecc_get_status)),
 	SPINAND_INFO("GD5F2GQ5UExxG",
 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x52),
@@ -201,7 +381,7 @@ static const struct spinand_info gigadevice_spinand_table[] = {
 					      &write_cache_variants,
 					      &update_cache_variants),
 		     SPINAND_HAS_QE_BIT,
-		     SPINAND_ECCINFO(&gd5fxgq4xexxg_ooblayout,
+		     SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout,
 				     gd5fxgq5xexxg_ecc_get_status)),
 	SPINAND_INFO("GD5F2GQ4UBxxG",
 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0xd2),
@@ -211,8 +391,8 @@ static const struct spinand_info gigadevice_spinand_table[] = {
 					      &write_cache_variants,
 					      &update_cache_variants),
 		     SPINAND_HAS_QE_BIT,
-		     SPINAND_ECCINFO(&gd5fxgq4xexxg_ooblayout,
-				     gd5f1gq4xexxg_ecc_get_status)),
+		     SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout,
+				     gd5fxgq4xa_ecc_get_status)),
 	SPINAND_INFO("GD5F4GQ6UExxG",
 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x55),
 		     NAND_MEMORG(1, 2048, 128, 64, 4096, 1, 1, 1),
@@ -221,7 +401,7 @@ static const struct spinand_info gigadevice_spinand_table[] = {
 					      &write_cache_variants,
 					      &update_cache_variants),
 		     SPINAND_HAS_QE_BIT,
-		     SPINAND_ECCINFO(&gd5fxgq4xexxg_ooblayout,
+		     SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout,
 				     gd5fxgq5xexxg_ecc_get_status)),
 	SPINAND_INFO("GD5F1GQ4UExxH",
 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0xd9),
@@ -231,8 +411,8 @@ static const struct spinand_info gigadevice_spinand_table[] = {
 					      &write_cache_variants,
 					      &update_cache_variants),
 		     SPINAND_HAS_QE_BIT,
-		     SPINAND_ECCINFO(&gd5fxgq4xexxh_ooblayout,
-				     gd5f1gq4xexxg_ecc_get_status)),
+		     SPINAND_ECCINFO(&gd5fxgqx_variant3_ooblayout,
+				     gd5fxgq4xa_ecc_get_status)),
 	SPINAND_INFO("GD5F1GQ5RExxG",
 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x41),
 		     NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
@@ -241,7 +421,7 @@ static const struct spinand_info gigadevice_spinand_table[] = {
 					      &write_cache_variants,
 					      &update_cache_variants),
 		     SPINAND_HAS_QE_BIT,
-		     SPINAND_ECCINFO(&gd5fxgq4xexxg_ooblayout,
+		     SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout,
 				     gd5fxgq5xexxg_ecc_get_status)),
 	SPINAND_INFO("GD5F2GQ5RExxG",
 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x42),
@@ -251,7 +431,7 @@ static const struct spinand_info gigadevice_spinand_table[] = {
 					      &write_cache_variants,
 					      &update_cache_variants),
 		     SPINAND_HAS_QE_BIT,
-		     SPINAND_ECCINFO(&gd5fxgq4xexxg_ooblayout,
+		     SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout,
 				     gd5fxgq5xexxg_ecc_get_status)),
 	SPINAND_INFO("GD5F2GM7RxG",
 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x82),
@@ -261,8 +441,8 @@ static const struct spinand_info gigadevice_spinand_table[] = {
 					      &write_cache_variants,
 					      &update_cache_variants),
 		     SPINAND_HAS_QE_BIT,
-		     SPINAND_ECCINFO(&gd5fxgq4xexxg_ooblayout,
-				     gd5f1gq4xexxg_ecc_get_status)),
+		     SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout,
+				     gd5fxgq4xa_ecc_get_status)),
 	SPINAND_INFO("GD5F2GM7UxG",
 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x92),
 		     NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
@@ -271,8 +451,8 @@ static const struct spinand_info gigadevice_spinand_table[] = {
 					      &write_cache_variants,
 					      &update_cache_variants),
 		     SPINAND_HAS_QE_BIT,
-		     SPINAND_ECCINFO(&gd5fxgq4xexxg_ooblayout,
-				     gd5f1gq4xexxg_ecc_get_status)),
+		     SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout,
+				     gd5fxgq4xa_ecc_get_status)),
 };
 
 static const struct spinand_manufacturer_ops gigadevice_spinand_manuf_ops = {

commit dfb28694645ec1892115fc4c386bdf1d34cb734b
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Thu Jan 27 10:06:58 2022 +0800

    UPSTREAM: mtd: spinand: Define macros for page-read ops with three-byte addresses
    
    The GigaDevice GD5F1GQ4UFxxG SPI NAND utilizes three-byte addresses
    for its page-read ops.
    
    http://www.gigadevice.com/datasheet/gd5f1gq4xfxxg/
    Signed-off-by: Jeff Kletsky <git-commits@allycomm.com>
    Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    
    Change-Id: Ica4e6307a8bcb55ba544837f525ddf85e6bbf0a4
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from linux for-next branch commit bded033062396e67ffbb3111084cf7ea202473d5)

diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
index 012d622a39..07e5134ec6 100644
--- a/include/linux/mtd/spinand.h
+++ b/include/linux/mtd/spinand.h
@@ -75,30 +75,60 @@
 		   SPI_MEM_OP_DUMMY(ndummy, 1),				\
 		   SPI_MEM_OP_DATA_IN(len, buf, 1))
 
+#define SPINAND_PAGE_READ_FROM_CACHE_OP_3A(fast, addr, ndummy, buf, len) \
+	SPI_MEM_OP(SPI_MEM_OP_CMD(fast ? 0x0b : 0x03, 1),		\
+		   SPI_MEM_OP_ADDR(3, addr, 1),				\
+		   SPI_MEM_OP_DUMMY(ndummy, 1),				\
+		   SPI_MEM_OP_DATA_IN(len, buf, 1))
+
 #define SPINAND_PAGE_READ_FROM_CACHE_X2_OP(addr, ndummy, buf, len)	\
 	SPI_MEM_OP(SPI_MEM_OP_CMD(0x3b, 1),				\
 		   SPI_MEM_OP_ADDR(2, addr, 1),				\
 		   SPI_MEM_OP_DUMMY(ndummy, 1),				\
 		   SPI_MEM_OP_DATA_IN(len, buf, 2))
 
+#define SPINAND_PAGE_READ_FROM_CACHE_X2_OP_3A(addr, ndummy, buf, len)	\
+	SPI_MEM_OP(SPI_MEM_OP_CMD(0x3b, 1),				\
+		   SPI_MEM_OP_ADDR(3, addr, 1),				\
+		   SPI_MEM_OP_DUMMY(ndummy, 1),				\
+		   SPI_MEM_OP_DATA_IN(len, buf, 2))
+
 #define SPINAND_PAGE_READ_FROM_CACHE_X4_OP(addr, ndummy, buf, len)	\
 	SPI_MEM_OP(SPI_MEM_OP_CMD(0x6b, 1),				\
 		   SPI_MEM_OP_ADDR(2, addr, 1),				\
 		   SPI_MEM_OP_DUMMY(ndummy, 1),				\
 		   SPI_MEM_OP_DATA_IN(len, buf, 4))
 
+#define SPINAND_PAGE_READ_FROM_CACHE_X4_OP_3A(addr, ndummy, buf, len)	\
+	SPI_MEM_OP(SPI_MEM_OP_CMD(0x6b, 1),				\
+		   SPI_MEM_OP_ADDR(3, addr, 1),				\
+		   SPI_MEM_OP_DUMMY(ndummy, 1),				\
+		   SPI_MEM_OP_DATA_IN(len, buf, 4))
+
 #define SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(addr, ndummy, buf, len)	\
 	SPI_MEM_OP(SPI_MEM_OP_CMD(0xbb, 1),				\
 		   SPI_MEM_OP_ADDR(2, addr, 2),				\
 		   SPI_MEM_OP_DUMMY(ndummy, 2),				\
 		   SPI_MEM_OP_DATA_IN(len, buf, 2))
 
+#define SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP_3A(addr, ndummy, buf, len) \
+	SPI_MEM_OP(SPI_MEM_OP_CMD(0xbb, 1),				\
+		   SPI_MEM_OP_ADDR(3, addr, 2),				\
+		   SPI_MEM_OP_DUMMY(ndummy, 2),				\
+		   SPI_MEM_OP_DATA_IN(len, buf, 2))
+
 #define SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(addr, ndummy, buf, len)	\
 	SPI_MEM_OP(SPI_MEM_OP_CMD(0xeb, 1),				\
 		   SPI_MEM_OP_ADDR(2, addr, 4),				\
 		   SPI_MEM_OP_DUMMY(ndummy, 4),				\
 		   SPI_MEM_OP_DATA_IN(len, buf, 4))
 
+#define SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP_3A(addr, ndummy, buf, len) \
+	SPI_MEM_OP(SPI_MEM_OP_CMD(0xeb, 1),				\
+		   SPI_MEM_OP_ADDR(3, addr, 4),				\
+		   SPI_MEM_OP_DUMMY(ndummy, 4),				\
+		   SPI_MEM_OP_DATA_IN(len, buf, 4))
+
 #define SPINAND_PROG_EXEC_OP(addr)					\
 	SPI_MEM_OP(SPI_MEM_OP_CMD(0x10, 1),				\
 		   SPI_MEM_OP_ADDR(3, addr, 1),				\

commit 1e349be16473656c4277bdc014bb4ad01843f285
Author: Chen Shunqing <csq@rock-chips.com>
Date:   Wed Jan 19 11:27:05 2022 +0800

    power: add bq25890 support
    
    Signed-off-by: Chen Shunqing <csq@rock-chips.com>
    Change-Id: Ib108752bc99eea3c6699fdfe3bc22577e7757a00

diff --git a/drivers/power/charge/Kconfig b/drivers/power/charge/Kconfig
index d3ea8a66b3..2f2d6c781d 100644
--- a/drivers/power/charge/Kconfig
+++ b/drivers/power/charge/Kconfig
@@ -4,3 +4,8 @@ config CHARGER_BQ25700
 	help
 	  This adds support for BQ25700 charger support.
 
+config CHARGER_BQ25890
+	bool "BQ25890 charger support"
+	depends on DM_FUEL_GAUGE
+	help
+	  This adds support for BQ25890 charger support.
diff --git a/drivers/power/charge/Makefile b/drivers/power/charge/Makefile
index 0fc2e0eeef..2ce1d2393a 100644
--- a/drivers/power/charge/Makefile
+++ b/drivers/power/charge/Makefile
@@ -5,3 +5,4 @@
 #
 
 obj-$(CONFIG_CHARGER_BQ25700) += bq25700_charger.o
+obj-$(CONFIG_CHARGER_BQ25890) += bq25890_charger.o
diff --git a/drivers/power/charge/bq25890_charger.c b/drivers/power/charge/bq25890_charger.c
new file mode 100644
index 0000000000..3e9b77328a
--- /dev/null
+++ b/drivers/power/charge/bq25890_charger.c
@@ -0,0 +1,307 @@
+/*
+ * (C) Copyright 2022 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/device.h>
+#include <dm/uclass.h>
+#include <power/fuel_gauge.h>
+#include <power/pmic.h>
+#include <power/power_delivery/power_delivery.h>
+#include <linux/usb/phy-rockchip-usb2.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define BQ25890_CHARGE_CURRENT_1500MA		1500
+#define BQ25890_SDP_INPUT_CURRENT_500MA		0x45
+#define BQ25890_DCP_INPUT_CURRENT_1500MA	0x4f
+#define BQ25890_DCP_INPUT_CURRENT_2000MA	0x54
+#define BQ25890_DCP_INPUT_CURRENT_3000MA	0x5e
+
+#define WATCHDOG_ENSABLE			(0x03 << 4)
+
+#define BQ25890_CHARGEOPTION0_REG		0x07
+#define BQ25890_CHARGECURREN_REG		0x04
+#define BQ25890_CHARGERSTAUS_REG		0x0B
+#define BQ25890_INPUTVOLTAGE_REG		0x0D
+#define BQ25890_INPUTCURREN_REG			0x00
+
+/*
+ * Most of the val -> idx conversions can be computed, given the minimum,
+ * maximum and the step between values. For the rest of conversions, we use
+ * lookup tables.
+ */
+enum bq25890_table_ids {
+	/* range tables */
+	TBL_ICHG,
+	TBL_ITERM,
+	TBL_IPRECHG,
+	TBL_VREG,
+	TBL_BATCMP,
+	TBL_VCLAMP,
+	TBL_BOOSTV,
+	TBL_SYSVMIN,
+	TBL_VINDPM,
+	TBL_IINLIM,
+
+	/* lookup tables */
+	TBL_TREG,
+	TBL_BOOSTI,
+};
+
+struct bq25890 {
+	struct udevice *dev;
+	u32 ichg;
+	u32 chip_id;
+	struct udevice *pd;
+};
+
+/* Thermal Regulation Threshold lookup table, in degrees Celsius */
+static const u32 bq25890_treg_tbl[] = { 60, 80, 100, 120 };
+
+#define BQ25890_TREG_TBL_SIZE		ARRAY_SIZE(bq25890_treg_tbl)
+
+/* Boost mode current limit lookup table, in uA */
+static const u32 bq25890_boosti_tbl[] = {
+	500000, 700000, 1100000, 1300000, 1600000, 1800000, 2100000, 2400000
+};
+
+#define BQ25890_BOOSTI_TBL_SIZE		ARRAY_SIZE(bq25890_boosti_tbl)
+
+struct bq25890_range {
+	u32 min;
+	u32 max;
+	u32 step;
+};
+
+struct bq25890_lookup {
+	const u32 *tbl;
+	u32 size;
+};
+
+static const union {
+	struct bq25890_range  rt;
+	struct bq25890_lookup lt;
+} bq25890_tables[] = {
+	/* range tables */
+	[TBL_ICHG] =	{ .rt = {0,	  5056000, 64000} },	 /* uA */
+	[TBL_ITERM] =	{ .rt = {64000,   1024000, 64000} },	 /* uA */
+	[TBL_VREG] =	{ .rt = {3840000, 4608000, 16000} },	 /* uV */
+	[TBL_BATCMP] =	{ .rt = {0,	  140,     20} },	 /* mOhm */
+	[TBL_VCLAMP] =	{ .rt = {0,	  224000,  32000} },	 /* uV */
+	[TBL_BOOSTV] =	{ .rt = {4550000, 5510000, 64000} },	 /* uV */
+	[TBL_SYSVMIN] = { .rt = {3000000, 3700000, 100000} },	 /* uV */
+	[TBL_VINDPM] = { .rt = {2600000, 15300000, 100000} }, /* uV */
+	[TBL_IINLIM] = { .rt = {100, 3250000, 100000} }, /* uA */
+
+	/* lookup tables */
+	[TBL_TREG] =	{ .lt = {bq25890_treg_tbl, BQ25890_TREG_TBL_SIZE} },
+	[TBL_BOOSTI] =	{ .lt = {bq25890_boosti_tbl, BQ25890_BOOSTI_TBL_SIZE} }
+};
+
+static int bq25890_read(struct bq25890 *charger, uint reg)
+{
+	u16 val;
+	int ret;
+
+	ret = dm_i2c_read(charger->dev, reg, (u8 *)&val, 1);
+	if (ret) {
+		printf("bq25890: read %#x error, ret=%d", reg, ret);
+		return ret;
+	}
+
+	return val;
+}
+
+static int bq25890_write(struct bq25890 *charger, uint reg, u16 val)
+{
+	int ret;
+
+	ret = dm_i2c_write(charger->dev, reg, (u8 *)&val, 1);
+	if (ret) {
+		printf("bq25890: write %#x error, ret=%d", reg, ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static u8 bq25890_find_idx(u32 value, enum bq25890_table_ids id)
+{
+	u8 idx;
+
+	if (id >= TBL_TREG) {
+		const u32 *tbl = bq25890_tables[id].lt.tbl;
+		u32 tbl_size = bq25890_tables[id].lt.size;
+
+		for (idx = 1; idx < tbl_size && tbl[idx] <= value; idx++)
+			;
+	} else {
+		const struct bq25890_range *rtbl = &bq25890_tables[id].rt;
+		u8 rtbl_size;
+
+		rtbl_size = (rtbl->max - rtbl->min) / rtbl->step + 1;
+
+		for (idx = 1;
+		     idx < rtbl_size && (idx * rtbl->step + rtbl->min <= value);
+		     idx++)
+			;
+	}
+
+	return idx - 1;
+}
+
+static bool bq25890_charger_status(struct bq25890 *charger)
+{
+	int state_of_charger;
+	u16 value;
+
+	value = bq25890_read(charger, BQ25890_CHARGERSTAUS_REG);
+	state_of_charger = value & 0x04;
+
+	return state_of_charger;
+}
+
+static bool bq257xx_charger_status(struct udevice *dev)
+{
+	struct bq25890 *charger = dev_get_priv(dev);
+
+	return bq25890_charger_status(charger);
+}
+
+static int bq25890_charger_capability(struct udevice *dev)
+{
+	return FG_CAP_CHARGER;
+}
+
+static int bq25890_get_usb_type(void)
+{
+#ifdef CONFIG_PHY_ROCKCHIP_INNO_USB2
+	return rockchip_chg_get_type();
+#else
+	return 0;
+#endif
+}
+
+static int bq25890_get_pd_output_val(struct bq25890 *charger,
+				     int *vol, int *cur)
+{
+	struct power_delivery_data pd_data;
+	int ret;
+
+	if (!charger->pd)
+		return -EINVAL;
+
+	memset(&pd_data, 0, sizeof(pd_data));
+	ret = power_delivery_get_data(charger->pd, &pd_data);
+	if (ret)
+		return ret;
+	if (!pd_data.online || !pd_data.voltage || !pd_data.current)
+		return -EINVAL;
+
+	*vol = pd_data.voltage;
+	*cur = pd_data.current;
+
+	return 0;
+}
+
+static void bq25890_charger_current_init(struct bq25890 *charger)
+{
+	u8 charge_current =  bq25890_find_idx(BQ25890_CHARGE_CURRENT_1500MA * 1000, TBL_ICHG);
+	u8 sdp_inputcurrent = BQ25890_SDP_INPUT_CURRENT_500MA;
+	u8 dcp_inputcurrent = BQ25890_DCP_INPUT_CURRENT_1500MA;
+	int pd_inputvol,  pd_inputcurrent;
+	u16 vol_idx = 0, cur_idx;
+	u8 temp;
+
+	temp = bq25890_read(charger, BQ25890_CHARGEOPTION0_REG);
+	temp &= (~WATCHDOG_ENSABLE);
+	bq25890_write(charger, BQ25890_CHARGEOPTION0_REG, temp);
+
+	if (!bq25890_get_pd_output_val(charger, &pd_inputvol,
+				       &pd_inputcurrent)) {
+		printf("bq25890: pd charge %duV, %duA\n", pd_inputvol, pd_inputcurrent);
+		if (pd_inputvol > 5000000) {
+			vol_idx = bq25890_find_idx((pd_inputvol - 1280000 - 3200000),
+						   TBL_VINDPM);
+			vol_idx = vol_idx << 6;
+		}
+		cur_idx = bq25890_find_idx(pd_inputcurrent,
+					   TBL_IINLIM);
+		cur_idx  = cur_idx << 8;
+		if (pd_inputcurrent != 0) {
+			bq25890_write(charger, BQ25890_INPUTCURREN_REG,
+				      cur_idx);
+			if (vol_idx)
+				bq25890_write(charger, BQ25890_INPUTVOLTAGE_REG,
+					      vol_idx);
+			charge_current = bq25890_find_idx(charger->ichg,
+							  TBL_ICHG);
+		}
+	} else {
+		if (bq25890_get_usb_type() > 1)
+			bq25890_write(charger, BQ25890_INPUTCURREN_REG,
+				      dcp_inputcurrent);
+		else
+			bq25890_write(charger, BQ25890_INPUTCURREN_REG,
+				      sdp_inputcurrent);
+	}
+
+	if (bq25890_charger_status(charger))
+		bq25890_write(charger, BQ25890_CHARGECURREN_REG,
+			      charge_current);
+}
+
+static int bq25890_ofdata_to_platdata(struct udevice *dev)
+{
+	struct bq25890 *charger = dev_get_priv(dev);
+
+	charger->dev = dev;
+	charger->ichg = dev_read_u32_default(dev, "ti,charge-current", 0);
+
+	return 0;
+}
+
+static int bq25890_probe(struct udevice *dev)
+{
+	struct bq25890 *charger = dev_get_priv(dev);
+	int ret;
+
+	ret = uclass_get_device(UCLASS_PD, 0, &charger->pd);
+	if (ret) {
+		if (ret == -ENODEV)
+			printf("Can't find PD\n");
+		else
+			printf("Get UCLASS PD failed: %d\n", ret);
+
+		charger->pd = NULL;
+	}
+
+	bq25890_charger_current_init(charger);
+
+	return 0;
+}
+
+static const struct udevice_id charger_ids[] = {
+	{ .compatible = "ti,bq25890" },
+	{ .compatible = "sy,sy6970" },
+	{ },
+};
+
+static struct dm_fuel_gauge_ops charger_ops = {
+	.get_chrg_online = bq257xx_charger_status,
+	.capability = bq25890_charger_capability,
+};
+
+U_BOOT_DRIVER(bq25890_charger) = {
+	.name = "bq25890_charger",
+	.id = UCLASS_FG,
+	.probe = bq25890_probe,
+	.of_match = charger_ids,
+	.ops = &charger_ops,
+	.ofdata_to_platdata = bq25890_ofdata_to_platdata,
+	.priv_auto_alloc_size = sizeof(struct bq25890),
+};

commit 70515256a67966e68924c0deedeb6722b8af0907
Author: Chen Shunqing <csq@rock-chips.com>
Date:   Wed Jan 19 11:27:54 2022 +0800

    configs: rk3588: enable bq25890
    
    Signed-off-by: Chen Shunqing <csq@rock-chips.com>
    Change-Id: I4f9a19387da62fbeffe80a53934b6e88ae7d24c8

diff --git a/configs/rk3588_defconfig b/configs/rk3588_defconfig
index adab250441..11817c18cd 100644
--- a/configs/rk3588_defconfig
+++ b/configs/rk3588_defconfig
@@ -158,6 +158,7 @@ CONFIG_PWM_ROCKCHIP=y
 CONFIG_DM_CHARGE_DISPLAY=y
 CONFIG_DM_FUEL_GAUGE=y
 CONFIG_CHARGER_BQ25700=y
+CONFIG_CHARGER_BQ25890=y
 CONFIG_POWER_FG_CW201X=y
 CONFIG_CHARGE_ANIMATION=y
 CONFIG_RAM=y

commit 477e465d8f5f9135950c170e1c3c42a7b4098ab3
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Fri Jan 21 18:00:17 2022 +0800

    clk: rockchip: rk3588: support aclk_vop to 850M
    
    Change-Id: I1a42434e63e6fb6d55dc80827304e2c78ef3dcf1
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3588.c b/drivers/clk/rockchip/clk_rk3588.c
index cd902fb45f..2be8403848 100644
--- a/drivers/clk/rockchip/clk_rk3588.c
+++ b/drivers/clk/rockchip/clk_rk3588.c
@@ -893,6 +893,7 @@ static ulong rk3588_aclk_vop_get_clk(struct rk3588_clk_priv *priv, ulong clk_id)
 
 	switch (clk_id) {
 	case ACLK_VOP_ROOT:
+	case ACLK_VOP:
 		con = readl(&cru->clksel_con[110]);
 		div = (con & ACLK_VOP_ROOT_DIV_MASK) >> ACLK_VOP_ROOT_DIV_SHIFT;
 		sel = (con & ACLK_VOP_ROOT_SEL_MASK) >> ACLK_VOP_ROOT_SEL_SHIFT;
@@ -943,7 +944,17 @@ static ulong rk3588_aclk_vop_set_clk(struct rk3588_clk_priv *priv,
 
 	switch (clk_id) {
 	case ACLK_VOP_ROOT:
-		if (!(priv->cpll_hz % rate)) {
+	case ACLK_VOP:
+		if (rate >= 850 * MHz) {
+			src_clk = ACLK_VOP_ROOT_SEL_NPLL;
+			div = 1;
+		} else if (rate >= 750 * MHz) {
+			src_clk = ACLK_VOP_ROOT_SEL_CPLL;
+			div = 2;
+		} else if (rate >= 700 * MHz) {
+			src_clk = ACLK_VOP_ROOT_SEL_SPLL;
+			div = 1;
+		} else if (!(priv->cpll_hz % rate)) {
 			src_clk = ACLK_VOP_ROOT_SEL_CPLL;
 			div = DIV_ROUND_UP(priv->cpll_hz, rate);
 		} else {
@@ -1526,6 +1537,7 @@ static ulong rk3588_clk_get_rate(struct clk *clk)
 		break;
 #ifndef CONFIG_SPL_BUILD
 	case ACLK_VOP_ROOT:
+	case ACLK_VOP:
 	case ACLK_VOP_LOW_ROOT:
 	case HCLK_VOP_ROOT:
 		rate = rk3588_aclk_vop_get_clk(priv, clk->id);
@@ -1667,6 +1679,7 @@ static ulong rk3588_clk_set_rate(struct clk *clk, ulong rate)
 		break;
 #ifndef CONFIG_SPL_BUILD
 	case ACLK_VOP_ROOT:
+	case ACLK_VOP:
 	case ACLK_VOP_LOW_ROOT:
 	case HCLK_VOP_ROOT:
 		ret = rk3588_aclk_vop_set_clk(priv, clk->id, rate);

commit 134d55e16fcb8f68c37b37ce9008ab0136068e3d
Author: Jianwei Zheng <jianwei.zheng@rock-chips.com>
Date:   Mon Jan 24 20:02:12 2022 +0800

    phy: rockchip-inno-usb2: support px30s/rk3326s phy tuning
    
    px30s/rk3326s may have some problem during loader because of poor signal
    quality,so phy tuning must be done for px30s/rk3326s.
    
    Signed-off-by: Jianwei Zheng <jianwei.zheng@rock-chips.com>
    Change-Id: I3f46500b3192285c06f61082359f46e2fc089479

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index 528b93f401..f69b63f929 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -740,6 +740,75 @@ static int rk3308_usb2phy_tuning(struct rockchip_usb2phy *rphy)
 	return 0;
 }
 
+static int rk3328_usb2phy_tuning(struct rockchip_usb2phy *rphy)
+{
+	struct regmap *base = get_reg_base(rphy);
+	unsigned int tmp, orig;
+	int ret;
+
+	if (soc_is_px30s()) {
+		/* Enable otg/host port pre-emphasis during non-chirp phase */
+		ret = regmap_read(base, 0x8000, &orig);
+		if (ret)
+			return ret;
+		tmp = orig & ~GENMASK(2, 0);
+		tmp |= BIT(2) & GENMASK(2, 0);
+		ret = regmap_write(base, 0x8000, tmp);
+		if (ret)
+			return ret;
+
+		/* Set otg port squelch trigger point configure to 100mv */
+		ret = regmap_read(base, 0x8004, &orig);
+		if (ret)
+			return ret;
+		tmp = orig & ~GENMASK(7, 5);
+		tmp |= 0x40 & GENMASK(7, 5);
+		ret = regmap_write(base, 0x8004, tmp);
+		if (ret)
+			return ret;
+
+		ret = regmap_read(base, 0x8008, &orig);
+		if (ret)
+			return ret;
+		tmp = orig & ~BIT(0);
+		tmp |= 0x1 & BIT(0);
+		ret = regmap_write(base, 0x8008, tmp);
+		if (ret)
+			return ret;
+
+		/* Enable host port pre-emphasis during non-chirp phase */
+		ret = regmap_read(base, 0x8400, &orig);
+		if (ret)
+			return ret;
+		tmp = orig & ~GENMASK(2, 0);
+		tmp |= BIT(2) & GENMASK(2, 0);
+		ret = regmap_write(base, 0x8400, tmp);
+		if (ret)
+			return ret;
+
+		/* Set host port squelch trigger point configure to 100mv */
+		ret = regmap_read(base, 0x8404, &orig);
+		if (ret)
+			return ret;
+		tmp = orig & ~GENMASK(7, 5);
+		tmp |= 0x40 & GENMASK(7, 5);
+		ret = regmap_write(base, 0x8404, tmp);
+		if (ret)
+			return ret;
+
+		ret = regmap_read(base, 0x8408, &orig);
+		if (ret)
+			return ret;
+		tmp = orig & ~BIT(0);
+		tmp |= 0x1 & BIT(0);
+		ret = regmap_write(base, 0x8408, tmp);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
 static int rk3588_usb2phy_tuning(struct rockchip_usb2phy *rphy)
 {
 	struct regmap *base = get_reg_base(rphy);
@@ -1006,6 +1075,7 @@ static const struct rockchip_usb2phy_cfg rk3328_phy_cfgs[] = {
 	{
 		.reg = 0x100,
 		.num_ports	= 2,
+		.phy_tuning = rk3328_usb2phy_tuning,
 		.clkout_ctl	= { 0x108, 4, 4, 1, 0 },
 		.port_cfgs	= {
 			[USB2PHY_PORT_OTG] = {

commit 25a706d21ee8c9ae9b9b90bc2ee30594da7013f8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 12 03:08:23 2022 +0000

    rockchip: fit: make resource code can be disabled
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ia7f9721efb45d95ea46a1e16c6259249a1c61a09

diff --git a/arch/arm/include/asm/arch-rockchip/fit.h b/arch/arm/include/asm/arch-rockchip/fit.h
index 6d8d8546ae..d10d2f294d 100644
--- a/arch/arm/include/asm/arch-rockchip/fit.h
+++ b/arch/arm/include/asm/arch-rockchip/fit.h
@@ -15,5 +15,6 @@ void *fit_image_load_bootables(ulong *size);
 int fit_image_pre_process(const void *fit);
 int fit_image_fail_process(const void *fit);
 int fit_image_init_resource(void);
+int fit_image_read_dtb(void *fdt_addr);
 
 #endif
diff --git a/arch/arm/include/asm/arch-rockchip/resource_img.h b/arch/arm/include/asm/arch-rockchip/resource_img.h
index 53e04c0420..8b6701cbb0 100644
--- a/arch/arm/include/asm/arch-rockchip/resource_img.h
+++ b/arch/arm/include/asm/arch-rockchip/resource_img.h
@@ -96,11 +96,6 @@ struct resource_file *resource_read_hwid_dtb(void);
  */
 int resource_is_empty(void);
 
-/*
- * resource_populate_dtb() - read fdt from this image: android/fit.
- */
-int resource_populate_dtb(void *img, void *fdt);
-
 /*
  * resource_traverse_init_list() - traverse all image(android/fit/uimage)
  */
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 46c3ce9386..197e21ae55 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -841,7 +841,7 @@ int bootm_image_populate_dtb(void *img)
 	else
 		gd->fdt_blob = (void *)env_get_ulong("fdt_addr_r", 16, 0);
 
-	return resource_populate_dtb(img, (void *)gd->fdt_blob);
+	return rockchip_ram_read_dtb_file(img, (void *)gd->fdt_blob);
 }
 
 /*
@@ -890,7 +890,7 @@ int board_do_bootm(int argc, char * const argv[])
 
 		ret = bootm_image_populate_dtb(img);
 		if (ret) {
-			printf("bootm can't read dtb\n");
+			printf("bootm can't read dtb, ret=%d\n", ret);
 			return ret;
 		}
 
@@ -914,7 +914,7 @@ int board_do_bootm(int argc, char * const argv[])
 
 		ret = bootm_image_populate_dtb(img);
 		if (ret) {
-			printf("bootm can't read dtb\n");
+			printf("bootm can't read dtb, ret=%d\n", ret);
 			return ret;
 		}
 		snprintf(boot_cmd, sizeof(boot_cmd), "boot_fit %s", argv[1]);
diff --git a/arch/arm/mach-rockchip/boot_rkimg.c b/arch/arm/mach-rockchip/boot_rkimg.c
index fb44f88143..71d7434ed2 100644
--- a/arch/arm/mach-rockchip/boot_rkimg.c
+++ b/arch/arm/mach-rockchip/boot_rkimg.c
@@ -537,58 +537,178 @@ static int rockchip_read_distro_dtb(void *fdt_addr)
 }
 #endif
 
-int rockchip_read_dtb_file(void *fdt_addr)
+enum {
+	LOCATE_DISTRO,
+	LOCATE_RESOURCE,
+	LOCATE_FIT,
+	LOCATE_END,
+};
+
+static int rkimg_traverse_read_dtb(void *fdt, int where)
 {
-	int hash_size = 0;
-	int ret = -1;
-	u32 fdt_size = 0;
-	char *hash;
-
-	/* init from storage if resource list is empty */
-	resource_traverse_init_list();
-
-	/* distro */
+	if (where == LOCATE_DISTRO) {
 #ifdef CONFIG_ROCKCHIP_EARLY_DISTRO_DTB
-	ret = rockchip_read_distro_dtb(fdt_addr);
-	if (!ret) {
-		fdt_size = fdt_totalsize(fdt_addr);
-		if (!sysmem_alloc_base(MEM_FDT, (phys_addr_t)fdt_addr,
-		     ALIGN(fdt_size, RK_BLK_SIZE) + CONFIG_SYS_FDT_PAD))
-			return -ENOMEM;
+		return rockchip_read_distro_dtb(fdt);
+#endif
+	} else if (where == LOCATE_RESOURCE) {
+#ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
+		int hash_size = 0;
+		char *hash;
+		u32 ret;
+
+		ret = rockchip_read_resource_dtb(fdt, &hash, &hash_size);
+		if (ret) {
+			printf("Failed to load DTB, ret=%d\n", ret);
+			return ret;
+		}
 
+		if (fdt_check_header(fdt)) {
+			printf("Invalid DTB magic !\n");
+			return -EBADF;
+		}
+#ifdef CONFIG_ROCKCHIP_DTB_VERIFY
+		if (hash_size && fdt_check_hash(fdt,
+			fdt_totalsize(fdt), hash, hash_size)) {
+			printf("Invalid DTB hash !\n");
+			return -EBADF;
+		}
+#endif
 		return 0;
+#endif
+	} else if (where == LOCATE_FIT) {
+#if defined(CONFIG_ROCKCHIP_FIT_IMAGE) && !defined(CONFIG_ROCKCHIP_RESOURCE_IMAGE)
+		return fit_image_read_dtb(fdt);
+#endif
 	}
+
+	return -EINVAL;
+}
+
+int rockchip_read_dtb_file(void *fdt)
+{
+	int locate, ret;
+	int size;
+
+	/* init resource list */
+#ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
+	resource_traverse_init_list();
 #endif
-	/* others(android/fit/uimage) */
-	ret = rockchip_read_resource_dtb(fdt_addr, &hash, &hash_size);
+
+	/* traverse location */
+	for (locate = 0; locate < LOCATE_END; locate++) {
+		ret = rkimg_traverse_read_dtb(fdt, locate);
+		if (!ret)
+			break;
+	}
 	if (ret) {
-		printf("Failed to load DTB, ret=%d\n", ret);
+		printf("No find valid DTB, ret=%d\n", ret);
 		return ret;
 	}
 
-	if (fdt_check_header(fdt_addr)) {
-		printf("Invalid DTB magic !\n");
-		return -EBADF;
-	}
-
-	fdt_size = fdt_totalsize(fdt_addr);
-#ifdef CONFIG_ROCKCHIP_DTB_VERIFY
-	if (hash_size && fdt_check_hash(fdt_addr, fdt_size, hash, hash_size)) {
-		printf("Invalid DTB hash !\n");
-		return -EBADF;
-	}
-#endif
-	if (!sysmem_alloc_base(MEM_FDT, (phys_addr_t)fdt_addr,
-			       ALIGN(fdt_size, RK_BLK_SIZE) +
-			       CONFIG_SYS_FDT_PAD))
+	/* reserved memory */
+	size = fdt_totalsize(fdt);
+	if (!sysmem_alloc_base(MEM_FDT, (phys_addr_t)fdt,
+		ALIGN(size, RK_BLK_SIZE) + CONFIG_SYS_FDT_PAD))
 		return -ENOMEM;
 
-	rk_board_early_fdt_fixup(fdt_addr);
-
+	/* fixup/overlay */
+	rk_board_early_fdt_fixup(fdt);
 #if defined(CONFIG_ANDROID_BOOT_IMAGE) && defined(CONFIG_OF_LIBFDT_OVERLAY)
-	android_fdt_overlay_apply((void *)fdt_addr);
+	android_fdt_overlay_apply((void *)fdt);
 #endif
 
 	return 0;
 }
 #endif
+
+int rockchip_ram_read_dtb_file(void *img, void *fdt)
+{
+	int format;
+	int ret;
+
+	format = (genimg_get_format(img));
+#ifdef CONFIG_ANDROID_BOOT_IMAGE
+	if (format == IMAGE_FORMAT_ANDROID) {
+		struct andr_img_hdr *hdr = img;
+		struct blk_desc *dev_desc;
+		ulong offset;
+
+		dev_desc = rockchip_get_bootdev();
+		if (!dev_desc)
+			return -ENODEV;
+
+		offset = hdr->page_size + ALIGN(hdr->kernel_size, hdr->page_size) +
+			ALIGN(hdr->ramdisk_size, hdr->page_size);
+#ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
+		ret = resource_create_ram_list(dev_desc, (void *)hdr + offset);
+		if (ret)
+			return ret;
+
+		return rockchip_read_dtb_file((void *)fdt);
+#else
+		if (fdt_check_header((void *)offset))
+			return -EINVAL;
+
+		memcpy(fdt, (char *)offset, fdt_totalsize(offset));
+		if (!sysmem_alloc_base(MEM_FDT, (phys_addr_t)fdt,
+			ALIGN(fdt_totalsize(fdt), RK_BLK_SIZE) + CONFIG_SYS_FDT_PAD))
+			return -ENOMEM;
+
+		return 0;
+#endif
+	}
+#endif
+#if IMAGE_ENABLE_FIT
+	if (format == IMAGE_FORMAT_FIT) {
+		const void *data;
+		size_t size;
+		int noffset;
+#ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
+		const char *path = "/images/resource";
+#else
+		const char *path = "/images/fdt";
+#endif
+
+		noffset = fdt_path_offset(img, path);
+		if (noffset < 0)
+			return noffset;
+
+#ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
+		ret = fit_image_get_data(img, noffset, &data, &size);
+		if (ret < 0)
+			return ret;
+
+		dev_desc = rockchip_get_bootdev();
+		if (!dev_desc)
+			return -ENODEV;
+
+		ret = resource_create_ram_list(dev_desc, (void *)data);
+		if (ret) {
+			printf("resource_create_ram_list fail, ret=%d\n", ret);
+			return ret;
+		}
+
+		return rockchip_read_dtb_file((void *)fdt);
+#else
+
+		ret = fit_image_get_data(img, noffset, &data, &size);
+		if (ret)
+			return ret;
+
+		if (fdt_check_header(data))
+			return -EINVAL;
+
+		memcpy(fdt, data, size);
+		if (!sysmem_alloc_base(MEM_FDT, (phys_addr_t)fdt,
+			ALIGN(fdt_totalsize(fdt), RK_BLK_SIZE) + CONFIG_SYS_FDT_PAD))
+			return -ENOMEM;
+
+		printf("Load DTB from 'images/fdt'\n");
+
+		return 0;
+#endif
+	}
+#endif
+
+	return -EINVAL;
+}
diff --git a/arch/arm/mach-rockchip/fit.c b/arch/arm/mach-rockchip/fit.c
index 1a2ac03376..9348c76bda 100644
--- a/arch/arm/mach-rockchip/fit.c
+++ b/arch/arm/mach-rockchip/fit.c
@@ -54,19 +54,6 @@ static int fit_sig_require_conf(const void *fit, const void *sig_blob)
 	return 0;
 }
 
-static int fit_image_get_subnode(const void *fit, int noffset, const char *name)
-{
-	int sub_noffset;
-
-	fdt_for_each_subnode(sub_noffset, fit, noffset) {
-		if (!strncmp(fit_get_name(fit, sub_noffset, NULL),
-			     name, strlen(name)))
-			return sub_noffset;
-	}
-
-	return -ENOENT;
-}
-
 int fit_default_conf_get_node(const void *fit, const char *prop_name)
 {
 	int conf_noffset;
@@ -149,17 +136,33 @@ static int fit_image_get_param(const void *fit, const char *prop_name,
 	return fdt_image_get_load(fit, prop_name, load);
 }
 
-static void *fit_get_blob(struct blk_desc *dev_desc, disk_partition_t *part)
+static void *fit_get_blob(struct blk_desc *dev_desc,
+			  disk_partition_t *out_part,
+			  bool verify)
 {
+	__maybe_unused int conf_noffset;
+	disk_partition_t part;
+	char *part_name;
 	void *fit, *fdt;
 	int blk_num;
 
+	if (rockchip_get_boot_mode() == BOOT_MODE_RECOVERY)
+		part_name = PART_RECOVERY;
+	else
+		part_name = PART_BOOT;
+
+	if (part_get_info_by_name(dev_desc, part_name, &part) < 0) {
+		FIT_I("No %s partition\n", part_name);
+		return NULL;
+	}
+
+	*out_part = part;
 	blk_num = DIV_ROUND_UP(sizeof(struct fdt_header), dev_desc->blksz);
 	fdt = memalign(ARCH_DMA_MINALIGN, blk_num * dev_desc->blksz);
 	if (!fdt)
 		return NULL;
 
-	if (blk_dread(dev_desc, part->start, blk_num, fdt) != blk_num) {
+	if (blk_dread(dev_desc, part.start, blk_num, fdt) != blk_num) {
 		debug("Failed to read fdt header\n");
 		goto fail;
 	}
@@ -181,12 +184,28 @@ static void *fit_get_blob(struct blk_desc *dev_desc, disk_partition_t *part)
 		goto fail;
 	}
 
-	if (blk_dread(dev_desc, part->start, blk_num, fit) != blk_num) {
+	if (blk_dread(dev_desc, part.start, blk_num, fit) != blk_num) {
 		free(fit);
 		debug("Failed to read fit blob\n");
 		goto fail;
 	}
 
+#ifdef CONFIG_FIT_SIGNATURE
+	if (!verify)
+		return fit;
+
+	conf_noffset = fit_conf_get_node(fit, NULL); /* NULL for default conf */
+	if (conf_noffset < 0)
+		goto fail;
+
+	printf("%s: ", fdt_get_name(fit, conf_noffset, NULL));
+	if (fit_config_verify(fit, conf_noffset)) {
+		puts("\n");
+		run_command("download", 0);
+		hang();
+	}
+	puts("\n");
+#endif
 	return fit;
 
 fail:
@@ -260,6 +279,19 @@ int fit_image_fail_process(const void *fit)
 	return 0;
 }
 
+static int fit_image_get_subnode(const void *fit, int noffset, const char *name)
+{
+	int sub_noffset;
+
+	fdt_for_each_subnode(sub_noffset, fit, noffset) {
+		if (!strncmp(fit_get_name(fit, sub_noffset, NULL),
+			     name, strlen(name)))
+			return sub_noffset;
+	}
+
+	return -ENOENT;
+}
+
 static int fit_image_load_one(const void *fit, struct blk_desc *dev_desc,
 			      disk_partition_t *part, char *prop_name,
 			      void *data, int check_hash)
@@ -301,29 +333,6 @@ static int fit_image_load_one(const void *fit, struct blk_desc *dev_desc,
 	return 0;
 }
 
-#ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
-static int fit_image_load_resource(const void *fit, struct blk_desc *dev_desc,
-				   disk_partition_t *part, ulong *addr)
-{
-	int offset, size;
-	int ret;
-	void *data;
-
-	ret = fdt_image_get_offset_size(fit, FIT_MULTI_PROP, &offset, &size);
-	if (ret)
-		return ret;
-
-	data = malloc(ALIGN(size, dev_desc->blksz));
-	if (!data)
-		return -ENOMEM;
-
-	*addr = (ulong)data;
-
-	return fit_image_load_one(fit, dev_desc, part, FIT_MULTI_PROP,
-				  data, IS_ENABLED(CONFIG_FIT_SIGNATURE));
-}
-#endif
-
 /* Calculate what we really need */
 ulong fit_image_get_bootables_size(const void *fit)
 {
@@ -355,7 +364,6 @@ void *fit_image_load_bootables(ulong *size)
 {
 	struct blk_desc *dev_desc;
 	disk_partition_t part;
-	char *part_name;
 	int blk_num;
 	void *fit;
 
@@ -363,17 +371,7 @@ void *fit_image_load_bootables(ulong *size)
 	if (!dev_desc)
 		return NULL;
 
-	if (rockchip_get_boot_mode() == BOOT_MODE_RECOVERY)
-		part_name = PART_RECOVERY;
-	else
-		part_name = PART_BOOT;
-
-	if (part_get_info_by_name(dev_desc, part_name, &part) < 0) {
-		FIT_I("No %s partition\n", part_name);
-		return NULL;
-	}
-
-	fit = fit_get_blob(dev_desc, &part);
+	fit = fit_get_blob(dev_desc, &part, false);
 	if (!fit) {
 		FIT_I("No fit blob\n");
 		return NULL;
@@ -405,15 +403,34 @@ static void fit_msg(const void *fit)
 	      fit_sig_require_conf(fit, gd_fdt_blob()) ? "" : "no ");
 }
 
+#ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
+static int fit_image_load_resource(const void *fit, struct blk_desc *dev_desc,
+				   disk_partition_t *part, ulong *addr)
+{
+	int offset, size;
+	int ret;
+	void *data;
+
+	ret = fdt_image_get_offset_size(fit, FIT_MULTI_PROP, &offset, &size);
+	if (ret)
+		return ret;
+
+	data = malloc(ALIGN(size, dev_desc->blksz));
+	if (!data)
+		return -ENOMEM;
+
+	*addr = (ulong)data;
+
+	return fit_image_load_one(fit, dev_desc, part, FIT_MULTI_PROP,
+				  data, IS_ENABLED(CONFIG_FIT_SIGNATURE));
+}
+
 int fit_image_init_resource(void)
 {
-	int conf_noffset __maybe_unused;
-	ulong rsce __maybe_unused;
 	struct blk_desc *dev_desc;
 	disk_partition_t part;
-	char *part_name;
+	int ret = 0;
 	void *fit;
-	int ret;
 
 	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {
@@ -421,55 +438,52 @@ int fit_image_init_resource(void)
 		return -ENODEV;
 	}
 
-	if (rockchip_get_boot_mode() == BOOT_MODE_RECOVERY)
-		part_name = PART_RECOVERY;
-	else
-		part_name = PART_BOOT;
-
-	ret = part_get_info_by_name(dev_desc, part_name, &part);
-	if (ret < 0) {
-		FIT_I("No %s partition\n", part_name);
-		return ret;
-	}
-
-	fit = fit_get_blob(dev_desc, &part);
-	if (!fit) {
-		FIT_I("No fdt blob\n");
+	fit = fit_get_blob(dev_desc, &part, true);
+	if (!fit)
 		return -EINVAL;
-	}
-
-#ifdef CONFIG_FIT_SIGNATURE
-	conf_noffset = fit_conf_get_node(fit, NULL); /* NULL for default conf */
-	if (conf_noffset < 0)
-		return conf_noffset;
-
-	printf("%s: ", fdt_get_name(fit, conf_noffset, NULL));
-	if (fit_config_verify(fit, conf_noffset)) {
-		puts("\n");
-		run_command("download", 0);
-		hang();
-	}
-	puts("\n");
-#endif
 
 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
+	ulong rsce;
+
 	ret = fit_image_load_resource(fit, dev_desc, &part, &rsce);
 	if (ret) {
 		FIT_I("Failed to load resource\n");
-		goto out;
+		free(fit);
+		return ret;
 	}
 
 	ret = resource_create_ram_list(dev_desc, (void *)rsce);
 	if (ret) {
 		FIT_I("Failed to create resource list\n");
-		goto out;
+		free(fit);
+		return ret;
 	}
 #endif
-
 	fit_msg(fit);
-out:
 	free(fit);
 
 	return ret;
 }
+#else
+int fit_image_read_dtb(void *fdt_addr)
+{
+	struct blk_desc *dev_desc;
+	disk_partition_t part;
+	void *fit;
 
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		FIT_I("No dev_desc!\n");
+		return -ENODEV;;
+	}
+
+	fit = fit_get_blob(dev_desc, &part, true);
+	if (!fit)
+		return -EINVAL;
+
+	fit_msg(fit);
+
+	return fit_image_load_one(fit, dev_desc, &part, FIT_FDT_PROP,
+				  (void *)fdt_addr, 1);
+}
+#endif
diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 23bef1d43a..50a7490eca 100644
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -330,12 +330,7 @@ static int read_dtb_from_android(struct blk_desc *dev_desc,
 	 * we don't need to verify DTB hash from resource.img file entry.
 	 */
 	dtb_offset = DIV_ROUND_UP(dtb_offset, dev_desc->blksz);
-#ifndef CONFIG_ROCKCHIP_DTB_VERIFY
-	if (replace_resource_entry(DEFAULT_DTB_FILE, rsce_base, dtb_offset, dtb_size))
-		printf("Failed to load dtb from v2 dtb position\n");
-	else
-#endif
-		env_update("bootargs", "androidboot.dtb_idx=0");
+	env_update("bootargs", "androidboot.dtb_idx=0");
 
 	return 0;
 }
@@ -579,62 +574,6 @@ int rockchip_read_resource_dtb(void *fdt_addr, char **hash, int *hash_size)
 	return 0;
 }
 
-int resource_populate_dtb(void *img, void *fdt)
-{
-	struct blk_desc *dev_desc;
-	int format;
-	int ret;
-
-	format = (genimg_get_format(img));
-#ifdef CONFIG_ANDROID_BOOT_IMAGE
-	if (format == IMAGE_FORMAT_ANDROID) {
-		struct andr_img_hdr *hdr = img;
-		ulong offset;
-
-		dev_desc = rockchip_get_bootdev();
-		if (!dev_desc)
-			return -ENODEV;
-
-		offset = hdr->page_size + ALIGN(hdr->kernel_size, hdr->page_size) +
-			ALIGN(hdr->ramdisk_size, hdr->page_size);
-		ret = resource_create_ram_list(dev_desc, (void *)hdr + offset);
-		if (ret)
-			return ret;
-
-		return rockchip_read_dtb_file((void *)fdt);
-	}
-#endif
-#if IMAGE_ENABLE_FIT
-	if (format == IMAGE_FORMAT_FIT) {
-		const void *data;
-		size_t size;
-		int noffset;
-
-		noffset = fdt_path_offset(img, "/images/resource");
-		if (noffset < 0)
-			return noffset;
-
-		ret = fit_image_get_data(img, noffset, &data, &size);
-		if (ret < 0)
-			return ret;
-
-		dev_desc = rockchip_get_bootdev();
-		if (!dev_desc)
-			return -ENODEV;
-
-		ret = resource_create_ram_list(dev_desc, (void *)data);
-		if (ret) {
-			printf("resource_create_ram_list fail, ret=%d\n", ret);
-			return ret;
-		}
-
-		return rockchip_read_dtb_file((void *)fdt);
-	}
-#endif
-
-	return -EINVAL;
-}
-
 int resource_traverse_init_list(void)
 {
 	if (!resource_is_empty())
diff --git a/include/boot_rkimg.h b/include/boot_rkimg.h
index 4e9643b3b1..64d36f65d5 100644
--- a/include/boot_rkimg.h
+++ b/include/boot_rkimg.h
@@ -69,6 +69,7 @@ void board_run_recovery_wipe_data(void);
 void setup_download_mode(void);
 int get_bcb_recovery_msg(void);
 int rockchip_read_dtb_file(void *fdt_addr);
+int rockchip_ram_read_dtb_file(void *img, void *fdt_addr);
 int init_kernel_dtb(void);
 int fit_write_trusty_rollback_index(u32 trusty_index);
 

commit ade0ccd7b88f48a7b49b6841e064227eb3416063
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 13 03:34:16 2022 +0000

    rockchip: fit_misc: support decompress lzma image
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ibe242892f33c0a6590b8d5ba101b34b912ce5636

diff --git a/arch/arm/mach-rockchip/fit_misc.c b/arch/arm/mach-rockchip/fit_misc.c
index 54e995b5d9..baff27a21e 100644
--- a/arch/arm/mach-rockchip/fit_misc.c
+++ b/arch/arm/mach-rockchip/fit_misc.c
@@ -10,6 +10,7 @@
 #ifdef CONFIG_SPL_BUILD
 #include <spl.h>
 #endif
+#include <lzma/LzmaTools.h>
 #include <optee_include/OpteeClientInterface.h>
 #include <optee_include/tee_api_defines.h>
 
@@ -43,21 +44,17 @@ static int fit_image_check_uncomp_hash(const void *fit, int parent_noffset,
 	return 0;
 }
 
-static int fit_gunzip_image(void *fit, int node, ulong *load_addr,
+static int fit_decomp_image(void *fit, int node, ulong *load_addr,
 			    ulong **src_addr, size_t *src_len, void *spec)
 {
-#if CONFIG_IS_ENABLED(MISC_DECOMPRESS)
-	const void *prop;
-	u32 flags = 0;
-#endif
 	u64 len = *src_len;
-	int ret;
+	int ret = -ENOSYS;
 	u8 comp;
 
 	if (fit_image_get_comp(fit, node, &comp))
 		return 0;
 
-	if (comp != IH_COMP_GZIP)
+	if (comp != IH_COMP_GZIP && comp != IH_COMP_LZMA)
 		return 0;
 
 #ifndef CONFIG_SPL_BUILD
@@ -86,18 +83,44 @@ static int fit_gunzip_image(void *fit, int node, ulong *load_addr,
 		}
 	}
 #endif
-	/*
-	 * For smaller spl size, we don't use misc_decompress_process()
-	 * inside the gunzip().
-	 */
+	if (comp == IH_COMP_LZMA) {
+#if CONFIG_IS_ENABLED(LZMA)
+		SizeT lzma_len = ALIGN(len, FIT_MAX_SPL_IMAGE_SZ);
+		SizeT src_lenp;
+		const fdt32_t *val;
+
+		val = fdt_getprop(fit, node, "raw-size", NULL);
+		if (!val)
+			return -ENOENT;
+		src_lenp = fdt32_to_cpu(*val);
+		ret = lzmaBuffToBuffDecompress((uchar *)(*load_addr), &lzma_len,
+					       (uchar *)(*src_addr), src_lenp);
+		len = lzma_len;
+#endif
+	} else if (comp == IH_COMP_GZIP) {
+		/*
+		 * For smaller spl size, we don't use misc_decompress_process()
+		 * inside the gunzip().
+		 */
 #if CONFIG_IS_ENABLED(MISC_DECOMPRESS)
-	ret = misc_decompress_process((ulong)(*load_addr),
-				      (ulong)(*src_addr), (ulong)(*src_len),
-				      DECOM_GZIP, true, &len, flags);
+		const void *prop;
+		u32 flags = 0;
+
+		ret = misc_decompress_process((ulong)(*load_addr),
+					      (ulong)(*src_addr), (ulong)(*src_len),
+					      DECOM_GZIP, true, &len, flags);
+		/* mark for misc_decompress_cleanup() */
+		prop = fdt_getprop(fit, node, "decomp-async", NULL);
+		if (prop)
+			misc_decompress_async(comp);
+		else
+			misc_decompress_sync(comp);
 #else
-	ret = gunzip((void *)(*load_addr), ALIGN(len, FIT_MAX_SPL_IMAGE_SZ),
-		     (void *)(*src_addr), (void *)(&len));
+		ret = gunzip((void *)(*load_addr), ALIGN(len, FIT_MAX_SPL_IMAGE_SZ),
+			     (void *)(*src_addr), (void *)(&len));
 #endif
+	}
+
 	if (ret) {
 		printf("%s: decompress error, ret=%d\n",
 		       fdt_get_name(fit, node, NULL), ret);
@@ -114,15 +137,6 @@ static int fit_gunzip_image(void *fit, int node, ulong *load_addr,
 	*src_addr = (ulong *)*load_addr;
 	*src_len = len;
 
-#if CONFIG_IS_ENABLED(MISC_DECOMPRESS)
-	/* mark for misc_decompress_cleanup() */
-	prop = fdt_getprop(fit, node, "decomp-async", NULL);
-	if (prop)
-		misc_decompress_async(comp);
-	else
-		misc_decompress_sync(comp);
-#endif
-
 	return 0;
 }
 #endif
@@ -131,7 +145,7 @@ void board_fit_image_post_process(void *fit, int node, ulong *load_addr,
 				  ulong **src_addr, size_t *src_len, void *spec)
 {
 #if CONFIG_IS_ENABLED(MISC_DECOMPRESS) || CONFIG_IS_ENABLED(GZIP)
-	fit_gunzip_image(fit, node, load_addr, src_addr, src_len, spec);
+	fit_decomp_image(fit, node, load_addr, src_addr, src_len, spec);
 #endif
 
 #if CONFIG_IS_ENABLED(USING_KERNEL_DTB)
@@ -147,7 +161,6 @@ void board_fit_image_post_process(void *fit, int node, ulong *load_addr,
 #endif
 }
 #endif /* FIT_IMAGE_POST_PROCESS */
-
 /*
  * Override __weak fit_rollback_index_verify() for SPL & U-Boot proper.
  */

commit d3d5b888dc23b69dad3314f87e5663055f4af238
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 13 03:13:38 2022 +0000

    rockchip: fit_nodes: support lzma compression
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I33a7781789f479fc673710960ad821b0ccd9005f

diff --git a/arch/arm/mach-rockchip/fit_nodes.sh b/arch/arm/mach-rockchip/fit_nodes.sh
index 253a6d097c..db230e251e 100755
--- a/arch/arm/mach-rockchip/fit_nodes.sh
+++ b/arch/arm/mach-rockchip/fit_nodes.sh
@@ -13,6 +13,9 @@ rm -f ${srctree}/*.digest ${srctree}/*.bin.gz ${srctree}/bl31_0x*.bin
 if [ "${COMPRESSION}" == "gzip" ]; then
 	SUFFIX=".gz"
 	CMD="gzip"
+elif [ "${COMPRESSION}" == "lzma" ]; then
+	SUFFIX=".lzma"
+	CMD="lzma"
 else
 	COMPRESSION="none"
 	SUFFIX=

commit ad971574f344f975c0c5b2bfe9f1be243e649611
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 13 02:36:57 2022 +0000

    rockchip: fit_nodes: add "raw-size" property
    
    It's used for decomp module to know the orignal size of binary.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ibade154006fb1f025c6267c3399073f6d593d442

diff --git a/arch/arm/mach-rockchip/fit_nodes.sh b/arch/arm/mach-rockchip/fit_nodes.sh
index 9490667841..253a6d097c 100755
--- a/arch/arm/mach-rockchip/fit_nodes.sh
+++ b/arch/arm/mach-rockchip/fit_nodes.sh
@@ -33,12 +33,14 @@ function gen_uboot_node()
 	if [ "${COMPRESSION}" != "none" ]; then
 		openssl dgst -sha256 -binary -out ${UBOOT}.digest ${UBOOT}
 		UBOOT_SZ=`ls -l ${UBOOT} | awk '{ print $5 }'`
+		RAW_SIZE=`wc -c ${UBOOT} | awk '{ printf "0x%x", $1 }'`
 		if [ ${UBOOT_SZ} -gt 0 ]; then
 			${CMD} -k -f -9 ${srctree}/${UBOOT}
 		else
 			touch ${srctree}/${UBOOT}${SUFFIX}
 		fi
-		echo "			digest {
+		echo "			raw-size = <${RAW_SIZE}>;
+			digest {
 				value = /incbin/(\"./${UBOOT}.digest\");
 				algo = \"sha256\";
 			};"
@@ -160,9 +162,11 @@ function gen_bl32_node()
 			${ENTRY}
 			load = <"0x${TEE_LOAD_ADDR}">;"
 	if [ "${COMPRESSION}" != "none" ]; then
+		RAW_SIZE=`wc -c ${TEE} | awk '{ printf "0x%x", $1 }'`
 		openssl dgst -sha256 -binary -out ${TEE}.digest ${TEE}
 		${CMD} -k -f -9 ${TEE}
-		echo "			digest {
+		echo "			raw-size = <${RAW_SIZE}>;
+			digest {
 				value = /incbin/(\"./${TEE}.digest\");
 				algo = \"sha256\";
 			};"
@@ -204,7 +208,9 @@ function gen_mcu_node()
 		if [ "${COMPRESSION}" != "none" ]; then
 			openssl dgst -sha256 -binary -out ${MCU}.bin.digest ${MCU}.bin
 			${CMD} -k -f -9 ${MCU}.bin
-			echo "			digest {
+			RAW_SIZE=`wc -c ${MCU}.bin | awk '{ printf "0x%x", $1 }'`
+		echo "			raw-size = <${RAW_SIZE}>;
+			digest {
 				value = /incbin/(\"./${MCU}.bin.digest\");
 				algo = \"sha256\";
 			};"
@@ -256,7 +262,9 @@ function gen_loadable_node()
 		if [ "${COMPRESSION}" != "none" ]; then
 			openssl dgst -sha256 -binary -out ${LOAD}.bin.digest ${LOAD}.bin
 			${CMD} -k -f -9 ${LOAD}.bin
-			echo "			digest {
+			RAW_SIZE=`wc -c ${LOAD}.bin | awk '{ printf "0x%x", $1 }'`
+	echo "			raw-size = <${RAW_SIZE}>;
+			digest {
 				value = /incbin/(\"./${LOAD}.bin.digest\");
 				algo = \"sha256\";
 			};"

commit 1e70309a8ee4afbe6503c0ef285e2cb23c2b58c0
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 13 03:18:46 2022 +0000

    rockchip: fit_nodes: update coding style
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ic1be537e0edf6e70a868ef72c2df894748162c14

diff --git a/arch/arm/mach-rockchip/fit_nodes.sh b/arch/arm/mach-rockchip/fit_nodes.sh
index 663ee75a22..9490667841 100755
--- a/arch/arm/mach-rockchip/fit_nodes.sh
+++ b/arch/arm/mach-rockchip/fit_nodes.sh
@@ -12,6 +12,7 @@ rm -f ${srctree}/*.digest ${srctree}/*.bin.gz ${srctree}/bl31_0x*.bin
 # compression
 if [ "${COMPRESSION}" == "gzip" ]; then
 	SUFFIX=".gz"
+	CMD="gzip"
 else
 	COMPRESSION="none"
 	SUFFIX=
@@ -20,31 +21,32 @@ fi
 # nodes
 function gen_uboot_node()
 {
+	UBOOT="u-boot-nodtb.bin"
 	echo "		uboot {
 			description = \"U-Boot\";
-			data = /incbin/(\"./u-boot-nodtb.bin${SUFFIX}\");
+			data = /incbin/(\"${UBOOT}${SUFFIX}\");
 			type = \"standalone\";
 			arch = \"${U_ARCH}\";
 			os = \"U-Boot\";
 			compression = \"${COMPRESSION}\";
-			load = <"${UBOOT_LOAD_ADDR}">;
-			hash {
-				algo = \"sha256\";
-			};"
-	if [ "${COMPRESSION}" == "gzip" ]; then
-		echo "			digest {
-				value = /incbin/(\"./u-boot-nodtb.bin.digest\");
-				algo = \"sha256\";
-			};"
-		openssl dgst -sha256 -binary -out u-boot-nodtb.bin.digest u-boot-nodtb.bin
-		UBOOT_SZ=`ls -l u-boot-nodtb.bin | awk '{ print $5 }'`
+			load = <"${UBOOT_LOAD_ADDR}">;"
+	if [ "${COMPRESSION}" != "none" ]; then
+		openssl dgst -sha256 -binary -out ${UBOOT}.digest ${UBOOT}
+		UBOOT_SZ=`ls -l ${UBOOT} | awk '{ print $5 }'`
 		if [ ${UBOOT_SZ} -gt 0 ]; then
-			gzip -k -f -9 ${srctree}/u-boot-nodtb.bin
+			${CMD} -k -f -9 ${srctree}/${UBOOT}
 		else
-			touch ${srctree}/u-boot-nodtb.bin.gz
+			touch ${srctree}/${UBOOT}${SUFFIX}
 		fi
+		echo "			digest {
+				value = /incbin/(\"./${UBOOT}.digest\");
+				algo = \"sha256\";
+			};"
 	fi
-	echo "		};"
+	echo "			hash {
+				algo = \"sha256\";
+			};
+		};"
 }
 
 function gen_fdt_node()
@@ -58,8 +60,7 @@ function gen_fdt_node()
 			hash {
 				algo = \"sha256\";
 			};
-		};
-	};"
+		};"
 };
 
 function gen_kfdt_node()
@@ -89,17 +90,17 @@ function gen_bl31_node()
 	${srctree}/arch/arm/mach-rockchip/decode_bl31.py
 
 	NUM=1
-	for NAME in `ls -l bl31_0x*.bin | sort --key=5 -nr | awk '{ print $9 }'`
+	for ATF in `ls -l bl31_0x*.bin | sort --key=5 -nr | awk '{ print $9 }'`
 	do
-		ATF_LOAD_ADDR=`echo ${NAME} | awk -F "_" '{ printf $2 }' | awk -F "." '{ printf $1 }'`
+		ATF_LOAD_ADDR=`echo ${ATF} | awk -F "_" '{ printf $2 }' | awk -F "." '{ printf $1 }'`
 		# only atf-1 support compress
-		if [ "${COMPRESSION}" == "gzip" -a ${NUM} -eq 1  ]; then
-			openssl dgst -sha256 -binary -out ${NAME}.digest ${NAME}
-			gzip -k -f -9 ${NAME}
+		if [ "${COMPRESSION}" != "none" -a ${NUM} -eq 1  ]; then
+			openssl dgst -sha256 -binary -out ${ATF}.digest ${ATF}
+			${CMD} -k -f -9 ${ATF}
 
 			echo "		atf-${NUM} {
 			description = \"ARM Trusted Firmware\";
-			data = /incbin/(\"./${NAME}${SUFFIX}\");
+			data = /incbin/(\"./${ATF}${SUFFIX}\");
 			type = \"firmware\";
 			arch = \"${ARCH}\";
 			os = \"arm-trusted-firmware\";
@@ -109,14 +110,14 @@ function gen_bl31_node()
 				algo = \"sha256\";
 			};
 			digest {
-				value = /incbin/(\"./${NAME}.digest\");
+				value = /incbin/(\"./${ATF}.digest\");
 				algo = \"sha256\";
 			};
 		};"
 		else
 			echo "		atf-${NUM} {
 			description = \"ARM Trusted Firmware\";
-			data = /incbin/(\"./${NAME}\");
+			data = /incbin/(\"./${ATF}\");
 			type = \"firmware\";
 			arch = \"${ARCH}\";
 			os = \"arm-trusted-firmware\";
@@ -147,29 +148,30 @@ function gen_bl32_node()
 			ENTRY="entry = <0x${TEE_LOAD_ADDR}>;"
 		fi
 	fi
+
+	TEE="tee.bin"
 	echo "		optee {
 			description = \"OP-TEE\";
-			data = /incbin/(\"./tee.bin${SUFFIX}\");
+			data = /incbin/(\"${TEE}${SUFFIX}\");
 			type = \"firmware\";
 			arch = \"${ARCH}\";
 			os = \"op-tee\";
 			compression = \"${COMPRESSION}\";
-			load = <"0x${TEE_LOAD_ADDR}">;
 			${ENTRY}
-			hash {
-				algo = \"sha256\";
-			};"
-	if [ "${COMPRESSION}" == "gzip" ]; then
+			load = <"0x${TEE_LOAD_ADDR}">;"
+	if [ "${COMPRESSION}" != "none" ]; then
+		openssl dgst -sha256 -binary -out ${TEE}.digest ${TEE}
+		${CMD} -k -f -9 ${TEE}
 		echo "			digest {
-				value = /incbin/(\"./tee.bin.digest\");
+				value = /incbin/(\"./${TEE}.digest\");
 				algo = \"sha256\";
 			};"
-		openssl dgst -sha256 -binary -out tee.bin.digest tee.bin
-		gzip -k -f -9 tee.bin
 	fi
-
+	echo "			hash {
+				algo = \"sha256\";
+			};
+		};"
 	LOADABLE_OPTEE=", \"optee\""
-	echo "		};"
 }
 
 function gen_mcu_node()
@@ -198,19 +200,20 @@ function gen_mcu_node()
 			arch = \"riscv\";
 			data = /incbin/(\"./${MCU}.bin${SUFFIX}\");
 			compression = \"${COMPRESSION}\";
-			load = <0x"${MCU_ADDR}">;
-			hash {
-				algo = \"sha256\";
-			};"
-		if [ "${COMPRESSION}" == "gzip" ]; then
+			load = <0x"${MCU_ADDR}">;"
+		if [ "${COMPRESSION}" != "none" ]; then
+			openssl dgst -sha256 -binary -out ${MCU}.bin.digest ${MCU}.bin
+			${CMD} -k -f -9 ${MCU}.bin
 			echo "			digest {
 				value = /incbin/(\"./${MCU}.bin.digest\");
 				algo = \"sha256\";
 			};"
-			openssl dgst -sha256 -binary -out ${MCU}.bin.digest ${MCU}.bin
-			gzip -k -f -9 ${MCU}.bin
 		fi
-		echo "		};"
+		echo "			hash {
+				algo = \"sha256\";
+			};
+		};"
+
 		if [ ${n} -eq 0 ]; then
 			STANDALONE_LIST=${STANDALONE_LIST}"\"${MCU}\""
 		else
@@ -249,19 +252,19 @@ function gen_loadable_node()
 			arch = \"${ARCH}\";
 			data = /incbin/(\"./${LOAD}.bin${SUFFIX}\");
 			compression = \"${COMPRESSION}\";
-			load = <0x"${LOAD_ADDR}">;
-			hash {
-				algo = \"sha256\";
-			};"
-		if [ "${COMPRESSION}" == "gzip" ]; then
+			load = <0x"${LOAD_ADDR}">;"
+		if [ "${COMPRESSION}" != "none" ]; then
+			openssl dgst -sha256 -binary -out ${LOAD}.bin.digest ${LOAD}.bin
+			${CMD} -k -f -9 ${LOAD}.bin
 			echo "			digest {
 				value = /incbin/(\"./${LOAD}.bin.digest\");
 				algo = \"sha256\";
 			};"
-			openssl dgst -sha256 -binary -out ${LOAD}.bin.digest ${LOAD}.bin
-			gzip -k -f -9 ${LOAD}.bin
 		fi
-		echo "		};"
+		echo "			hash {
+				algo = \"sha256\";
+			};
+		};"
 
 		LOADABLE_OTHER=${LOADABLE_OTHER}", \"${LOAD}\""
 	done
@@ -292,7 +295,8 @@ PLATFORM=`sed -n "/CONFIG_DEFAULT_DEVICE_TREE/p" .config | awk -F "=" '{ print $
 if grep  -q '^CONFIG_FIT_ENABLE_RSASSA_PSS_SUPPORT=y' .config ; then
 	ALGO_PADDING="				padding = \"pss\";"
 fi
-echo "
+echo "	};
+
 	configurations {
 		default = \"conf\";
 		conf {
@@ -320,7 +324,8 @@ PLATFORM=`sed -n "/CONFIG_DEFAULT_DEVICE_TREE/p" .config | awk -F "=" '{ print $
 if grep  -q '^CONFIG_FIT_ENABLE_RSASSA_PSS_SUPPORT=y' .config ; then
         ALGO_PADDING="                          padding = \"pss\";"
 fi
-echo "
+echo "	};
+
 	configurations {
 		default = \"conf\";
 		conf {

commit 8cc0d0688e5e8548643a7f84cc8bc3b3f3bf8f90
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jan 17 08:11:58 2022 +0000

    rockchip: sdram: support parse bank with CONFIG_BIDRAM disabled
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ied2eddfbd980a1f139e1a0921134fbe95f91aba9

diff --git a/arch/arm/mach-rockchip/sdram.c b/arch/arm/mach-rockchip/sdram.c
index 53e356ce60..0fd6968688 100644
--- a/arch/arm/mach-rockchip/sdram.c
+++ b/arch/arm/mach-rockchip/sdram.c
@@ -171,14 +171,21 @@ unsigned int get_ddr_bw(void)
 #if defined(CONFIG_SPL_FRAMEWORK) || !defined(CONFIG_SPL_OF_PLATDATA)
 int dram_init_banksize(void)
 {
+#ifdef CONFIG_BIDRAM
 	bidram_gen_gd_bi_dram();
-
+#else
+	param_simple_parse_ddr_mem(1);
+#endif
 	return 0;
 }
 
 int dram_init(void)
 {
+#ifdef CONFIG_BIDRAM
 	gd->ram_size = bidram_get_ram_size();
+#else
+	gd->ram_size = param_simple_parse_ddr_mem(0);
+#endif
 	if (!gd->ram_size)
 		return -ENOMEM;
 

commit 1a4d12c4271b60f01ed038b8985c070887976c70
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jan 17 08:09:40 2022 +0000

    rockchip: param: add param_simple_parse_ddr_mem()
    
    Active if no define CONFIG_BIDRAM. Mainly used on critical
    size platform.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ib361ecde6db54c9a0b534ef62a634b0e4155bc28

diff --git a/arch/arm/include/asm/arch-rockchip/param.h b/arch/arm/include/asm/arch-rockchip/param.h
index 1357f657ed..0ecd0c2f65 100644
--- a/arch/arm/include/asm/arch-rockchip/param.h
+++ b/arch/arm/include/asm/arch-rockchip/param.h
@@ -17,6 +17,13 @@
  */
 struct memblock *param_parse_ddr_mem(int *out_count);
 
+/**
+ * param_simple_parse_ddr_mem() - Simple parse ddr memory region
+ */
+#ifndef CONFIG_BIDRAM
+phys_size_t param_simple_parse_ddr_mem(int init_bank);
+#endif
+
 /**
  * param_parse_atf_mem() - Parse atf memory region
  *
diff --git a/arch/arm/mach-rockchip/param.c b/arch/arm/mach-rockchip/param.c
index 9656e6dc42..9c0a9bed39 100644
--- a/arch/arm/mach-rockchip/param.c
+++ b/arch/arm/mach-rockchip/param.c
@@ -345,6 +345,46 @@ struct memblock *param_parse_ddr_mem(int *out_count)
 	return mem;
 }
 
+#ifndef CONFIG_BIDRAM
+/*
+ * init_bank=0: called from dram_init_banksize()
+ * init_bank=0: called from dram_init()
+ */
+phys_size_t param_simple_parse_ddr_mem(int init_bank)
+{
+	struct memblock *list;
+	int i, count;
+
+	list = param_parse_ddr_mem(&count);
+	if (!list) {
+		printf("Can't get dram banks\n");
+		return 0;
+	}
+
+	if (count > CONFIG_NR_DRAM_BANKS) {
+		printf("Dram banks num=%d, over %d\n", count, CONFIG_NR_DRAM_BANKS);
+		return 0;
+	}
+
+	if (!init_bank) {
+		i = count - 1;
+		return ddr_mem_get_usable_size(list[i].base, list[i].size);
+	}
+
+	for (i = 0; i < count; i++) {
+		gd->bd->bi_dram[i].start = list[i].base;
+		gd->bd->bi_dram[i].size =
+			ddr_mem_get_usable_size(list[i].base, list[i].size);
+		debug("bank[%d]: 0x%08lx - 0x%08lx\n", i,
+		      (ulong)gd->bd->bi_dram[i].start,
+		      (ulong)gd->bd->bi_dram[i].start +
+		      (ulong)gd->bd->bi_dram[i].size);
+	}
+
+	return 0;
+}
+#endif
+
 int param_parse_pre_serial(void)
 {
 #if defined(CONFIG_ROCKCHIP_PRELOADER_SERIAL) && \

commit c9a034c47f05eb6693c085d570e2dd1c1db2b9e3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jan 17 08:22:39 2022 +0000

    rockchip: board: add sn and ethaddr init control
    
    Allow them to be disabled for critial size platform.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I97089563196585a2846463bf61e8450e9fd66ba8

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 14f7d739be..22b10a307f 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -881,6 +881,14 @@ config ROCKCHIP_SFC_IOMUX
 	help
 	  This enable U-Boot to config SFC iomux.
 
+config ROCKCHIP_SET_SN
+	bool "Rockchip set serial number"
+	default y
+
+config ROCKCHIP_SET_ETHADDR
+	bool "Rockchip set eth address"
+	default y
+
 config BASE_DEFCONFIG
 	string "Base defconfig of config fragment"
 	default ""
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 76759417ee..46c3ce9386 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -81,6 +81,7 @@ __weak int rk_board_init(void)
 	return 0;
 }
 
+#ifdef CONFIG_ROCKCHIP_SET_ETHADDR
 /*
  * define serialno max length, the max length is 512 Bytes
  * The remaining bytes are used to ensure that the first 512 bytes
@@ -140,7 +141,9 @@ static int rockchip_set_ethaddr(void)
 
 	return 0;
 }
+#endif
 
+#ifdef CONFIG_ROCKCHIP_SET_SN
 static int rockchip_set_serialno(void)
 {
 	u8 low[CPUID_LEN / 2], high[CPUID_LEN / 2];
@@ -214,6 +217,8 @@ static int rockchip_set_serialno(void)
 
 	return ret;
 }
+#endif
+
 
 #if defined(CONFIG_USB_FUNCTION_FASTBOOT)
 int fb_set_reboot_flag(void)
@@ -362,8 +367,12 @@ static void cmdline_handle(void)
 
 int board_late_init(void)
 {
+#ifdef CONFIG_ROCKCHIP_SET_ETHADDR
 	rockchip_set_ethaddr();
+#endif
+#ifdef CONFIG_ROCKCHIP_SET_SN
 	rockchip_set_serialno();
+#endif
 	setup_download_mode();
 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0)
 	setup_boot_mode();

commit 5b879fbfa5a1c620365a5f834d6662df75ae3388
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jan 17 08:13:23 2022 +0000

    rockchip: board: fix compile error
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Id6ea8b4156e8f6745993cffba93f21d450731ce5

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 446b945fa8..76759417ee 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -657,6 +657,7 @@ int board_bidram_reserve(struct bidram *bidram)
 	return 0;
 }
 
+#ifdef CONFIG_SYSMEM
 int board_sysmem_reserve(struct sysmem *sysmem)
 {
 #ifdef CONFIG_SKIP_RELOCATE_UBOOT
@@ -668,6 +669,7 @@ int board_sysmem_reserve(struct sysmem *sysmem)
 #endif
 	return 0;
 }
+#endif
 
 parse_fn_t board_bidram_parse_fn(void)
 {

commit cdc0f037fe73f9eaf76ede181e0827b4d1b35077
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jan 17 08:10:51 2022 +0000

    make.sh: nm command ignore bss section symbol
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If41623be0c22d0f3693797413dea170060e460b8

diff --git a/make.sh b/make.sh
index fb1ee3a794..f02fab33dd 100755
--- a/make.sh
+++ b/make.sh
@@ -394,7 +394,7 @@ function sub_commands()
 		elf|nm)
 			if [ "${CMD}" == "nm" ]; then
 				echo -e "\n${ELF}:     file format elf\n"
-				${TOOLCHAIN_NM} -r --size ${ELF} | less
+				${TOOLCHAIN_NM} -r --size ${ELF} | grep -iv 'b' | less
 			else
 				if [ "${CMD}" == "elf" -a "${ARG}" == "elf" ]; then
 					ARG=D # default

commit c35c12b6a789bac53edb052e9df5c1c3d3dd833e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jan 17 08:09:02 2022 +0000

    arm: Kconfig: rockchip imply DM_GPIO
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Icb24fba527a4d8e895b93b5cae89bcf52644dbb6

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 28dcd19c19..f1deb5a31a 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1142,7 +1142,7 @@ config ARCH_ROCKCHIP
 	select SYS_MALLOC_F
 	select SYS_THUMB_BUILD if !ARM64
 	select SPL_SYS_MALLOC_SIMPLE if SPL
-	select DM_GPIO
+	imply DM_GPIO
 	select DM_SERIAL
 	select DM_SPI
 	select DM_SPI_FLASH

commit 4425319b6748b4e9d21ac7fac0569fcbb8851c5e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 13 03:16:56 2022 +0000

    lib: Add CONFIG_SPL_LZMA option
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I258a738157ecbc4f754098c9faf6aface57847be

diff --git a/lib/Kconfig b/lib/Kconfig
index 87befbf257..6335e8f96a 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -229,6 +229,14 @@ config LZMA
 	  ratio and fairly fast decompression speed. See also
 	  CONFIG_CMD_LZMADEC which provides a decode command.
 
+config SPL_LZMA
+	bool "Enable LZMA decompression support in SPL"
+	depends on SPL
+	help
+	  This enables support for LZMA (Lempel-Ziv-Markov chain algorithm),
+	  a dictionary compression algorithm that provides a high compression
+	  ratio and fairly fast decompression speed. See also
+
 config LZO
 	bool "Enable LZO decompression support"
 	help
diff --git a/lib/Makefile b/lib/Makefile
index 16ed7a111b..b4a78ad94c 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -9,7 +9,6 @@ ifndef CONFIG_SPL_BUILD
 
 obj-$(CONFIG_EFI) += efi/
 obj-$(CONFIG_EFI_LOADER) += efi_loader/
-obj-$(CONFIG_LZMA) += lzma/
 obj-$(CONFIG_BZIP2) += bzip2/
 obj-$(CONFIG_TIZEN) += tizen/
 obj-$(CONFIG_FIT) += libfdt/
@@ -59,6 +58,7 @@ obj-$(CONFIG_SHA1) += sha1.o
 obj-$(CONFIG_SHA256) += sha256.o
 obj-$(CONFIG_SHA512) += sha512.o
 
+obj-$(CONFIG_$(SPL_)LZMA) += lzma/
 obj-$(CONFIG_$(SPL_)ZLIB) += zlib/
 obj-$(CONFIG_$(SPL_)GZIP) += gunzip.o
 obj-$(CONFIG_$(SPL_)LZO) += lzo/
diff --git a/lib/lzma/LzmaTools.c b/lib/lzma/LzmaTools.c
index 5e2baba336..02814cee12 100644
--- a/lib/lzma/LzmaTools.c
+++ b/lib/lzma/LzmaTools.c
@@ -22,7 +22,7 @@
 #include <common.h>
 #include <watchdog.h>
 
-#ifdef CONFIG_LZMA
+#if CONFIG_IS_ENABLED(LZMA)
 
 #define LZMA_PROPERTIES_OFFSET 0
 #define LZMA_SIZE_OFFSET       LZMA_PROPS_SIZE

commit 2d2cbe25dbdb9258491942e6982c6c468633aed4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 12 10:15:20 2022 +0000

    scripts: android2distro: fix non integer error
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I3f37e6c8ddede51e04c107d1aed0bb0d199ca99a

diff --git a/scripts/android2distro.sh b/scripts/android2distro.sh
index 15360b77d9..0741ac3b30 100755
--- a/scripts/android2distro.sh
+++ b/scripts/android2distro.sh
@@ -66,7 +66,8 @@ function android2distro()
 	echo "    append ${BOOTARGS}" >> boot/extlinux/extlinux.conf
 
 	SIZE_KB=`ls -lh ${BOOT_IMG} | awk '{ print $5 }' | tr -d 'M'`
-	SIZE_KB=`expr ${SIZE_KB} + 2`
+	SIZE_KB=`echo "scale=0;$SIZE_KB/1"|bc -l` # for align down integer
+	SIZE_KB=`expr ${SIZE_KB} + 2 + 1`
 	SIZE_BYTE=$((${SIZE_KB}*1024))
 	genext2fs -b ${SIZE_BYTE} -B 1024 -d boot/ -i 8192 -U ${DISTRO_IMG}
 

commit eebee7ab33a449e823adff2d12c2769be59ccff2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 12 09:47:38 2022 +0000

    common: android: fix error: "ANDROID_ARG_FDT_FILENAME" redefined
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I703e45aecdfc5da1b1d7d0dfba8fbdd68652d074

diff --git a/common/image-android.c b/common/image-android.c
index acd5a536b7..6c86c9350d 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -28,7 +28,6 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 #define ANDROID_IMAGE_DEFAULT_KERNEL_ADDR	0x10008000
-#define ANDROID_ARG_FDT_FILENAME		"rk-kernel.dtb"
 #define ANDROID_Q_VER				10
 #define ANDROID_PARTITION_VENDOR_BOOT		"vendor_boot"
 

commit 41ebb2b6fc3baeac5f489f4ae9ef3ceb413d6eae
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 12 02:48:58 2022 +0000

    rockchip: rv1126: use imply for SPL/TPL
    
    Allow them to be disabled in defconfig.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I1904c288cbe7471d1c7f6ff27b3d80a5fd6b488a

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index f01070b681..14f7d739be 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -496,9 +496,9 @@ endif
 config ROCKCHIP_RV1126
 	bool "Support Rockchip RV1126"
 	select CPU_V7
-	select SUPPORT_TPL
-	select SUPPORT_SPL
-	select TPL_TINY_FRAMEWORK if TPL
+	imply SUPPORT_TPL
+	imply SUPPORT_SPL
+	imply TPL_TINY_FRAMEWORK if TPL
 	select DEBUG_UART_BOARD_INIT
 	imply TPL
 	imply SPL

commit b11db21efa2d08fcc73fe38d4ddb3faa0465a722
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 12 02:47:21 2022 +0000

    Kconfig: add depends on for SPL options
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I066114702ef6442434969096cdc4e4156887c164

diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 9aa54e0559..b921f78b61 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -36,7 +36,7 @@ config SERIAL_PRESENT
 
 config SPL_SERIAL_PRESENT
 	bool "Provide a serial driver in SPL"
-	depends on DM_SERIAL
+	depends on SPL_DM_SERIAL
 	default y
 	help
 	  In very space-constrained devices even the full UART driver is too
@@ -81,8 +81,8 @@ config SERIAL_RX_BUFFER_SIZE
 
 config SPL_DM_SERIAL
 	bool "Enable Driver Model for serial drivers in SPL"
-	depends on DM_SERIAL
-	default y if SPL && DM_SERIAL
+	depends on DM_SERIAL && SPL
+	default y
 	help
 	  Enable driver model for serial in SPL. This replaces
 	  drivers/serial/serial.c with the serial uclass, which
@@ -91,8 +91,8 @@ config SPL_DM_SERIAL
 
 config TPL_DM_SERIAL
 	bool "Enable Driver Model for serial drivers in TPL"
-	depends on DM_SERIAL
-	default y if TPL && DM_SERIAL
+	depends on DM_SERIAL && TPL
+	default y
 	help
 	  Enable driver model for serial in TPL. This replaces
 	  drivers/serial/serial.c with the serial uclass, which
diff --git a/lib/Kconfig b/lib/Kconfig
index 64d8a3b07c..87befbf257 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -77,6 +77,7 @@ config LIB_RAND
 
 config SPL_TINY_MEMSET
 	bool "Use a very small memset() in SPL"
+	depends on SPL
 	help
 	  The faster memset() is the arch-specific one (if available) enabled
 	  by CONFIG_USE_ARCH_MEMSET. If that is not enabled, we can still get

commit 67be2ffcf023cd75b5a7299a9fdfab736d3ad282
Author: Damon Ding <damon.ding@rock-chips.com>
Date:   Fri Jan 14 18:06:19 2022 +0800

    drm/rockchip: vop2: fix the core_dclk_div_sel setting
    
    When the display interface is BT656. the register of
    core_dclk_div_sel should always be set 1. Not only 'i'
    modes like 480i and 576i, but also 'p' modes like 720p,
    both need this setting.
    
    As for BT1120 and other interfaces, this bit should be
    1 when display mode belongs to 'i', and 0 when display
    mode belongs to 'p'.
    
    Only RK3568 has the core_dclk_div_sel control bit, which
    has been removed on RK3588.
    
    Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
    Change-Id: Ifdd3aef5541f4170eb5085da01a0820f1d713971

diff --git a/drivers/video/drm/rockchip_vop2.c b/drivers/video/drm/rockchip_vop2.c
index 3faec21918..aecb2c6694 100644
--- a/drivers/video/drm/rockchip_vop2.c
+++ b/drivers/video/drm/rockchip_vop2.c
@@ -2292,9 +2292,16 @@ static int rockchip_vop2_init(struct display_state *state)
 	}
 	vop2_writel(vop2, RK3568_VP0_DSP_VTOTAL_VS_END + vp_offset,
 		    (vtotal << 16) | vsync_len);
-	val = !!(mode->flags & DRM_MODE_FLAG_DBLCLK);
-	vop2_mask_write(vop2, RK3568_VP0_DSP_CTRL + vp_offset, EN_MASK,
-			CORE_DCLK_DIV_EN_SHIFT, val, false);
+
+	if (vop2->version == VOP_VERSION_RK3568) {
+		if (mode->flags & DRM_MODE_FLAG_DBLCLK ||
+		    conn_state->output_if & VOP_OUTPUT_IF_BT656)
+			vop2_mask_write(vop2, RK3568_VP0_DSP_CTRL + vp_offset, EN_MASK,
+					CORE_DCLK_DIV_EN_SHIFT, 1, false);
+		else
+			vop2_mask_write(vop2, RK3568_VP0_DSP_CTRL + vp_offset, EN_MASK,
+					CORE_DCLK_DIV_EN_SHIFT, 0, false);
+	}
 
 	if (conn_state->output_mode == ROCKCHIP_OUT_MODE_YUV420)
 		vop2_mask_write(vop2, RK3568_VP0_MIPI_CTRL + vp_offset,

commit 65747de77033933e3a36c979f5c491c0bd927680
Author: Damon Ding <damon.ding@rock-chips.com>
Date:   Mon Jan 17 09:38:10 2022 +0800

    drm/rockchip: vop2: set rg swap for rk3588 hdmi/dp yuv444 output
    
    Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
    Change-Id: I6c25872d179349d904d6a7e0ce210e8a16269cf7

diff --git a/drivers/video/drm/rockchip_vop2.c b/drivers/video/drm/rockchip_vop2.c
index 6771e0dac8..3faec21918 100644
--- a/drivers/video/drm/rockchip_vop2.c
+++ b/drivers/video/drm/rockchip_vop2.c
@@ -186,7 +186,10 @@
 #define OUT_MODE_SHIFT				0
 #define DATA_SWAP_MASK				0x1f
 #define DATA_SWAP_SHIFT				8
-#define DSP_RB_SWAP				2
+#define DSP_BG_SWAP				0x1
+#define DSP_RB_SWAP				0x2
+#define DSP_RG_SWAP				0x4
+#define DSP_DELTA_SWAP				0x8
 #define CORE_DCLK_DIV_EN_SHIFT			4
 #define P2I_EN_SHIFT				5
 #define DSP_FILED_POL				6
@@ -2140,6 +2143,29 @@ static unsigned long rk3568_vop2_if_cfg(struct display_state *state)
 	return mode->clock;
 }
 
+static void vop2_post_color_swap(struct display_state *state)
+{
+	struct crtc_state *cstate = &state->crtc_state;
+	struct connector_state *conn_state = &state->conn_state;
+	struct vop2 *vop2 = cstate->private;
+	u32 vp_offset = (cstate->crtc_id * 0x100);
+	u32 output_type = conn_state->type;
+	u32 data_swap = 0;
+
+	if (is_uv_swap(conn_state->bus_format, conn_state->output_mode))
+		data_swap = DSP_RB_SWAP;
+
+	if (vop2->version == VOP_VERSION_RK3588 &&
+	    (output_type == DRM_MODE_CONNECTOR_HDMIA ||
+	     output_type == DRM_MODE_CONNECTOR_eDP) &&
+	    (conn_state->bus_format == MEDIA_BUS_FMT_YUV8_1X24 ||
+	     conn_state->bus_format == MEDIA_BUS_FMT_YUV10_1X30))
+		data_swap |= DSP_RG_SWAP;
+
+	vop2_mask_write(vop2, RK3568_VP0_DSP_CTRL + vp_offset,
+			DATA_SWAP_MASK, DATA_SWAP_SHIFT, data_swap, false);
+}
+
 static int rockchip_vop2_init(struct display_state *state)
 {
 	struct crtc_state *cstate = &state->crtc_state;
@@ -2185,14 +2211,7 @@ static int rockchip_vop2_init(struct display_state *state)
 	    !(cstate->feature & VOP_FEATURE_OUTPUT_10BIT))
 		conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
 
-	if (is_uv_swap(conn_state->bus_format, conn_state->output_mode))
-		vop2_mask_write(vop2, RK3568_VP0_DSP_CTRL + vp_offset,
-				DATA_SWAP_MASK, DATA_SWAP_SHIFT, DSP_RB_SWAP,
-				false);
-	else
-		vop2_mask_write(vop2, RK3568_VP0_DSP_CTRL + vp_offset,
-				DATA_SWAP_MASK, DATA_SWAP_SHIFT, 0,
-				false);
+	vop2_post_color_swap(state);
 
 	vop2_mask_write(vop2, RK3568_VP0_DSP_CTRL + vp_offset, OUT_MODE_MASK,
 			OUT_MODE_SHIFT, conn_state->output_mode, false);

commit b3e1cbdebe10a75444db7e0208c5da597b650ff9
Author: Damon Ding <damon.ding@rock-chips.com>
Date:   Sat Jan 22 13:49:34 2022 +0800

    drm/rockchip: display: modify the log of getting base2_disp_info
    
    Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
    Change-Id: I3fda2a2921403f1413cece758d5025e4570fdb25

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 6c84af40a3..e42d579e15 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -169,7 +169,7 @@ struct base2_disp_info *rockchip_get_disp_info(int type, int id)
 	disp_info = base_parameter_addr + offset;
 	if (disp_info->screen_info[0].type != type ||
 	    disp_info->screen_info[0].id != id) {
-		printf("connector type or id is error, type:%d, id:%d\n",
+		printf("base2_disp_info couldn't be found, screen_info type[%d] or id[%d] mismatched\n",
 		       disp_info->screen_info[0].type,
 		       disp_info->screen_info[0].id);
 		return NULL;

commit 52403065d5d86508068eab3361ab50c2cf485819
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Fri Jan 21 16:54:18 2022 +0800

    rockchip: px30: fixup pcfg drive-strength for px30s
    
    Traversing max depth2 of all nodes from root path "/".
    
    Time-Stat example: cpu on 816Mhz spends about 7ms on
    traversing total 272 nodes, including fixup some of them.
    
    Change-Id: I9121111f270dc9af97c8ed05cdfdd63dc6e82b4c
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c
index a294d50cb8..df2d825329 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -460,6 +460,49 @@ static int fdt_fixup_gpu_opp_table(const void *blob)
 	return 0;
 }
 
+static void fixup_pcfg_drive_strength(const void *blob, int noffset)
+{
+	u32 *ds, *dss;
+	u32 val;
+
+	dss = (u32 *)fdt_getprop(blob, noffset, "drive-strength-s", NULL);
+	if (!dss)
+		return;
+
+	val = dss[0];
+	ds = (u32 *)fdt_getprop(blob, noffset, "drive-strength", NULL);
+	if (ds) {
+		ds[0] = val;
+	} else {
+		if (fdt_setprop((void *)blob, noffset,
+				"drive-strength", &val, 4) < 0)
+			printf("Failed to add drive-strength prop\n");
+	}
+}
+
+static int fdt_fixup_pcfg(const void *blob)
+{
+	int depth1_node;
+	int depth2_node;
+	int root_node;
+
+	root_node = fdt_path_offset(blob, "/");
+	if (root_node < 0)
+		return root_node;
+
+	fdt_for_each_subnode(depth1_node, blob, root_node) {
+		debug("depth1: %s\n", fdt_get_name(blob, depth2_node, NULL));
+		fixup_pcfg_drive_strength(blob, depth1_node);
+		fdt_for_each_subnode(depth2_node, blob, depth1_node) {
+			debug("    depth2: %s\n",
+			      fdt_get_name(blob, depth2_node, NULL));
+			fixup_pcfg_drive_strength(blob, depth2_node);
+		}
+	}
+
+	return 0;
+}
+
 static int fdt_fixup_bus_apll(const void *blob)
 {
 	char path[] = "/bus-apll";
@@ -566,6 +609,7 @@ int rk_board_fdt_fixup(const void *blob)
 		fdt_fixup_cpu_opp_table(blob);
 		fdt_fixup_dmc_opp_table(blob);
 		fdt_fixup_gpu_opp_table(blob);
+		fdt_fixup_pcfg(blob);
 		fdt_fixup_bus_apll(blob);
 		fdt_fixup_cpu_gpu_clk(blob);
 		fdt_fixup_i2s_soft_reset(blob);

commit cf6c7688466a2e3ecb089e1adef8b54e372f71f4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 20 07:27:50 2022 +0000

    arm: crt0_64.S: don't require stack align access
    
    That's too strict and it doesn't bring some benifits, let's disable it.
    Stack align access issue was found in cpu_suspend().
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I9442257b7bb1cf6bafa9de0b7da51d6ddb6ac150

diff --git a/arch/arm/lib/crt0_64.S b/arch/arm/lib/crt0_64.S
index 05df8491f5..27e22f9d0a 100644
--- a/arch/arm/lib/crt0_64.S
+++ b/arch/arm/lib/crt0_64.S
@@ -71,9 +71,9 @@ ENTRY(_main)
 	 * data access alignment checks and SError.
 	 */
 #ifdef CONFIG_SPL_BUILD
-	mov x1, #(CR_SA | CR_I)
+	mov x1, #CR_I
 #else
-	mov x1, #(CR_SA)
+	mov x1, #0
 #endif
 	switch_el x2, 3f, 2f, 1f
 3:	mrs	x0, sctlr_el3

commit ca51d12a525137f3a5c9f5b1dec9f8e6c8573d5c
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Thu Dec 23 18:48:40 2021 +0800

    configs: px30(rk3326): enable dmc fsp and set uboot 2MB size
    
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
    Change-Id: Ia8dd7624dfc02f4a49dcac8c9039e94184817a9f

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index bfeee9cfc5..0d454c81d3 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -7,6 +7,8 @@ CONFIG_ROCKCHIP_PX30=y
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_DM_DMC=y
+CONFIG_ROCKCHIP_DMC_FSP=y
 CONFIG_TRUST_RSA_MODE=3
 CONFIG_TARGET_EVB_PX30=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
@@ -94,6 +96,8 @@ CONFIG_DEBUG_UART_BASE=0xFF160000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_UBOOT_SIZE_KB=2048
+CONFIG_UBOOT_NUM=2
 CONFIG_SOUND=y
 CONFIG_I2S_ROCKCHIP=y
 CONFIG_SOUND_RK817=y
diff --git a/configs/evb-rk3326_defconfig b/configs/evb-rk3326_defconfig
index a3bef0a85e..4b8a1dbec5 100644
--- a/configs/evb-rk3326_defconfig
+++ b/configs/evb-rk3326_defconfig
@@ -8,6 +8,8 @@ CONFIG_ROCKCHIP_RK3326=y
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_DM_DMC=y
+CONFIG_ROCKCHIP_DMC_FSP=y
 CONFIG_TRUST_RSA_MODE=3
 CONFIG_CHIP_NAME="RK3326"
 CONFIG_TARGET_EVB_PX30=y
@@ -30,6 +32,8 @@ CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_UBOOT_SIZE_KB=2048
+CONFIG_UBOOT_NUM=2
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
diff --git a/configs/px30_defconfig b/configs/px30_defconfig
index ac5f58e948..edd77f754a 100644
--- a/configs/px30_defconfig
+++ b/configs/px30_defconfig
@@ -7,6 +7,8 @@ CONFIG_ROCKCHIP_PX30=y
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_DM_DMC=y
+CONFIG_ROCKCHIP_DMC_FSP=y
 CONFIG_TRUST_RSA_MODE=3
 CONFIG_TARGET_EVB_PX30=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
@@ -102,6 +104,8 @@ CONFIG_SOUND=y
 CONFIG_I2S_ROCKCHIP=y
 CONFIG_SOUND_RK817=y
 CONFIG_SOUND_ROCKCHIP=y
+CONFIG_UBOOT_SIZE_KB=2048
+CONFIG_UBOOT_NUM=2
 CONFIG_SYSRESET=y
 CONFIG_DM_THERMAL=y
 CONFIG_ROCKCHIP_THERMAL=y
diff --git a/configs/rk3326-aarch32_defconfig b/configs/rk3326-aarch32_defconfig
index e6bae29ce1..9c0737c5b7 100644
--- a/configs/rk3326-aarch32_defconfig
+++ b/configs/rk3326-aarch32_defconfig
@@ -6,6 +6,8 @@ CONFIG_ROCKCHIP_RK3326=y
 CONFIG_ARM64_BOOT_AARCH32=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_DM_DMC=y
+CONFIG_ROCKCHIP_DMC_FSP=y
 CONFIG_LOADER_INI="RK3326AARCH32MINIALL.ini"
 CONFIG_TRUST_RSA_MODE=3
 CONFIG_CHIP_NAME="RK3326"
@@ -82,6 +84,8 @@ CONFIG_DEBUG_UART_BASE=0xFF160000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_UBOOT_SIZE_KB=2048
+CONFIG_UBOOT_NUM=2
 CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/rk3326_defconfig b/configs/rk3326_defconfig
index 05323e6541..d39a4a582c 100644
--- a/configs/rk3326_defconfig
+++ b/configs/rk3326_defconfig
@@ -8,6 +8,8 @@ CONFIG_ROCKCHIP_RK3326=y
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_DM_DMC=y
+CONFIG_ROCKCHIP_DMC_FSP=y
 CONFIG_TRUST_RSA_MODE=3
 CONFIG_CHIP_NAME="RK3326"
 CONFIG_TARGET_EVB_PX30=y
@@ -99,6 +101,8 @@ CONFIG_DEBUG_UART_BASE=0xFF160000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_UBOOT_SIZE_KB=2048
+CONFIG_UBOOT_NUM=2
 CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y

commit e0857de63c9dcfe7cd8b355ce6e40438f78a269d
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Fri Jan 14 15:55:33 2022 +0800

    rockchip: px30s: set the emmc drive strength
    
    - set the emmc data(GPIO1A0-A7) drive strength to 14.2ma
    - set the emmc clock(GPIO1B1) drive strength to 23.7ma
    - set the emmc cmd(GPIO1B2) drive strength to 14.2ma
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: I2ec02d514069f606c4660be85c9d4eefee54b5d8

diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c
index 358e7d964e..a294d50cb8 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -66,6 +66,11 @@ struct mm_region *mem_map = px30_mem_map;
 
 #define QOS_PRIORITY_LEVEL(h, l)	((((h) & 3) << 8) | ((l) & 3))
 
+#define GRF_GPIO1A_DS2			0x0090
+#define GRF_GPIO1B_DS2			0x0094
+#define GRF_GPIO1A_E			0x00F0
+#define GRF_GPIO1B_E			0x00F4
+
 /* GRF_GPIO1CL_IOMUX */
 enum {
 	GPIO1C1_SHIFT		= 4,
@@ -196,6 +201,16 @@ int arch_cpu_init(void)
 	/* We do some SoC one time setting here. */
 	/* Disable the ddr secure region setting to make it non-secure */
 	writel(0x0, FW_DDR_CON_REG);
+
+	if (soc_is_px30s()) {
+		/* set the emmc data(GPIO1A0-A7) drive strength to 14.2ma */
+		writel(0xFFFF0000, GRF_BASE + GRF_GPIO1A_DS2);
+		writel(0xFFFFFFFF, GRF_BASE + GRF_GPIO1A_E);
+		/* set the emmc clock(GPIO1B1) drive strength to 23.7ma */
+		/* set the emmc cmd(GPIO1B2) drive strength to 14.2ma */
+		writel(0x00060002, GRF_BASE + GRF_GPIO1B_DS2);
+		writel(0x003C0038, GRF_BASE + GRF_GPIO1B_E);
+	}
 #endif
 	/* Enable PD_VO (default disable at reset) */
 	rk_clrreg(PMU_PWRDN_CON, 1 << 13);

commit 3dbbc74119cfde4384af7d1c7ae0f856a3280d1a
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Thu Dec 23 20:12:18 2021 +0800

    rockchip: px30: add dmc fsp support for px30s
    
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
    Change-Id: I0cf05272ef5debae8436eb4b3765d9219df27b63

diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c
index 1e55320a46..358e7d964e 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -565,3 +565,19 @@ int rk_board_early_fdt_fixup(const void *blob)
 
 	return 0;
 }
+
+#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_ROCKCHIP_DMC_FSP)
+int rk_board_init(void)
+{
+	struct udevice *dev;
+	u32 ret = 0;
+
+	ret = uclass_get_device_by_driver(UCLASS_DMC, DM_GET_DRIVER(dmc_fsp), &dev);
+	if (ret) {
+		printf("dmc_fsp failed, ret=%d\n", ret);
+		return 0;
+	}
+
+	return 0;
+}
+#endif

commit 9aff8079b35d47fd72914a3c85274f293006eb3c
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Thu Dec 23 20:11:05 2021 +0800

    ram: rockchip: dmc_fsp: add support de-skew
    
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
    Change-Id: Ia212fd3f6ad86c7192b0aa60ca01b178a5c688c6

diff --git a/drivers/ram/rockchip/dmc_fsp.c b/drivers/ram/rockchip/dmc_fsp.c
index 1e89fab068..0499639fa5 100644
--- a/drivers/ram/rockchip/dmc_fsp.c
+++ b/drivers/ram/rockchip/dmc_fsp.c
@@ -27,9 +27,16 @@
 
 #define PMUGRF_OS_REG(n)			(0x200 + (n) * 4)
 
+struct rk3326_ddr_de_skew_setting {
+	unsigned int ca_de_skew[30];
+	unsigned int cs0_de_skew[84];
+	unsigned int cs1_de_skew[84];
+};
+
 /* there is a matching relationship, modify it with caution */
 static char *dmc_fsp_params[] = {
 	"debug_print_level",
+	"phy_de_skew_en",
 	/* if need, add parameter after */
 };
 
@@ -125,6 +132,216 @@ static char *ddr_params_v1[] = {
 	/* if need, add parameter after and change the minor version. */
 };
 
+/* the version V1.01 will add skew info */
+static char *rk3326_dts_de_skew[] = {
+	"ddr3a1_ddr4a9_de-skew",
+	"ddr3a0_ddr4a10_de-skew",
+	"ddr3a3_ddr4a6_de-skew",
+	"ddr3a2_ddr4a4_de-skew",
+	"ddr3a5_ddr4a8_de-skew",
+	"ddr3a4_ddr4a5_de-skew",
+	"ddr3a7_ddr4a11_de-skew",
+	"ddr3a6_ddr4a7_de-skew",
+	"ddr3a9_ddr4a0_de-skew",
+	"ddr3a8_ddr4a13_de-skew",
+	"ddr3a11_ddr4a3_de-skew",
+	"ddr3a10_ddr4cs0_de-skew",
+	"ddr3a13_ddr4a2_de-skew",
+	"ddr3a12_ddr4ba1_de-skew",
+	"ddr3a15_ddr4odt0_de-skew",
+	"ddr3a14_ddr4a1_de-skew",
+	"ddr3ba1_ddr4a15_de-skew",
+	"ddr3ba0_ddr4bg0_de-skew",
+	"ddr3ras_ddr4cke_de-skew",
+	"ddr3ba2_ddr4ba0_de-skew",
+	"ddr3we_ddr4bg1_de-skew",
+	"ddr3cas_ddr4a12_de-skew",
+	"ddr3ckn_ddr4ckn_de-skew",
+	"ddr3ckp_ddr4ckp_de-skew",
+	"ddr3cke_ddr4a16_de-skew",
+	"ddr3odt0_ddr4a14_de-skew",
+	"ddr3cs0_ddr4act_de-skew",
+	"ddr3reset_ddr4reset_de-skew",
+	"ddr3cs1_ddr4cs1_de-skew",
+	"ddr3odt1_ddr4odt1_de-skew",
+
+	"cs0_dm0_rx_de-skew",
+	"cs0_dm0_tx_de-skew",
+	"cs0_dq0_rx_de-skew",
+	"cs0_dq0_tx_de-skew",
+	"cs0_dq1_rx_de-skew",
+	"cs0_dq1_tx_de-skew",
+	"cs0_dq2_rx_de-skew",
+	"cs0_dq2_tx_de-skew",
+	"cs0_dq3_rx_de-skew",
+	"cs0_dq3_tx_de-skew",
+	"cs0_dq4_rx_de-skew",
+	"cs0_dq4_tx_de-skew",
+	"cs0_dq5_rx_de-skew",
+	"cs0_dq5_tx_de-skew",
+	"cs0_dq6_rx_de-skew",
+	"cs0_dq6_tx_de-skew",
+	"cs0_dq7_rx_de-skew",
+	"cs0_dq7_tx_de-skew",
+	"cs0_dqs0_rx_de-skew",
+	"cs0_dqs0p_tx_de-skew",
+	"cs0_dqs0n_tx_de-skew",
+
+	"cs0_dm1_rx_de-skew",
+	"cs0_dm1_tx_de-skew",
+	"cs0_dq8_rx_de-skew",
+	"cs0_dq8_tx_de-skew",
+	"cs0_dq9_rx_de-skew",
+	"cs0_dq9_tx_de-skew",
+	"cs0_dq10_rx_de-skew",
+	"cs0_dq10_tx_de-skew",
+	"cs0_dq11_rx_de-skew",
+	"cs0_dq11_tx_de-skew",
+	"cs0_dq12_rx_de-skew",
+	"cs0_dq12_tx_de-skew",
+	"cs0_dq13_rx_de-skew",
+	"cs0_dq13_tx_de-skew",
+	"cs0_dq14_rx_de-skew",
+	"cs0_dq14_tx_de-skew",
+	"cs0_dq15_rx_de-skew",
+	"cs0_dq15_tx_de-skew",
+	"cs0_dqs1_rx_de-skew",
+	"cs0_dqs1p_tx_de-skew",
+	"cs0_dqs1n_tx_de-skew",
+
+	"cs0_dm2_rx_de-skew",
+	"cs0_dm2_tx_de-skew",
+	"cs0_dq16_rx_de-skew",
+	"cs0_dq16_tx_de-skew",
+	"cs0_dq17_rx_de-skew",
+	"cs0_dq17_tx_de-skew",
+	"cs0_dq18_rx_de-skew",
+	"cs0_dq18_tx_de-skew",
+	"cs0_dq19_rx_de-skew",
+	"cs0_dq19_tx_de-skew",
+	"cs0_dq20_rx_de-skew",
+	"cs0_dq20_tx_de-skew",
+	"cs0_dq21_rx_de-skew",
+	"cs0_dq21_tx_de-skew",
+	"cs0_dq22_rx_de-skew",
+	"cs0_dq22_tx_de-skew",
+	"cs0_dq23_rx_de-skew",
+	"cs0_dq23_tx_de-skew",
+	"cs0_dqs2_rx_de-skew",
+	"cs0_dqs2p_tx_de-skew",
+	"cs0_dqs2n_tx_de-skew",
+
+	"cs0_dm3_rx_de-skew",
+	"cs0_dm3_tx_de-skew",
+	"cs0_dq24_rx_de-skew",
+	"cs0_dq24_tx_de-skew",
+	"cs0_dq25_rx_de-skew",
+	"cs0_dq25_tx_de-skew",
+	"cs0_dq26_rx_de-skew",
+	"cs0_dq26_tx_de-skew",
+	"cs0_dq27_rx_de-skew",
+	"cs0_dq27_tx_de-skew",
+	"cs0_dq28_rx_de-skew",
+	"cs0_dq28_tx_de-skew",
+	"cs0_dq29_rx_de-skew",
+	"cs0_dq29_tx_de-skew",
+	"cs0_dq30_rx_de-skew",
+	"cs0_dq30_tx_de-skew",
+	"cs0_dq31_rx_de-skew",
+	"cs0_dq31_tx_de-skew",
+	"cs0_dqs3_rx_de-skew",
+	"cs0_dqs3p_tx_de-skew",
+	"cs0_dqs3n_tx_de-skew",
+
+	"cs1_dm0_rx_de-skew",
+	"cs1_dm0_tx_de-skew",
+	"cs1_dq0_rx_de-skew",
+	"cs1_dq0_tx_de-skew",
+	"cs1_dq1_rx_de-skew",
+	"cs1_dq1_tx_de-skew",
+	"cs1_dq2_rx_de-skew",
+	"cs1_dq2_tx_de-skew",
+	"cs1_dq3_rx_de-skew",
+	"cs1_dq3_tx_de-skew",
+	"cs1_dq4_rx_de-skew",
+	"cs1_dq4_tx_de-skew",
+	"cs1_dq5_rx_de-skew",
+	"cs1_dq5_tx_de-skew",
+	"cs1_dq6_rx_de-skew",
+	"cs1_dq6_tx_de-skew",
+	"cs1_dq7_rx_de-skew",
+	"cs1_dq7_tx_de-skew",
+	"cs1_dqs0_rx_de-skew",
+	"cs1_dqs0p_tx_de-skew",
+	"cs1_dqs0n_tx_de-skew",
+
+	"cs1_dm1_rx_de-skew",
+	"cs1_dm1_tx_de-skew",
+	"cs1_dq8_rx_de-skew",
+	"cs1_dq8_tx_de-skew",
+	"cs1_dq9_rx_de-skew",
+	"cs1_dq9_tx_de-skew",
+	"cs1_dq10_rx_de-skew",
+	"cs1_dq10_tx_de-skew",
+	"cs1_dq11_rx_de-skew",
+	"cs1_dq11_tx_de-skew",
+	"cs1_dq12_rx_de-skew",
+	"cs1_dq12_tx_de-skew",
+	"cs1_dq13_rx_de-skew",
+	"cs1_dq13_tx_de-skew",
+	"cs1_dq14_rx_de-skew",
+	"cs1_dq14_tx_de-skew",
+	"cs1_dq15_rx_de-skew",
+	"cs1_dq15_tx_de-skew",
+	"cs1_dqs1_rx_de-skew",
+	"cs1_dqs1p_tx_de-skew",
+	"cs1_dqs1n_tx_de-skew",
+
+	"cs1_dm2_rx_de-skew",
+	"cs1_dm2_tx_de-skew",
+	"cs1_dq16_rx_de-skew",
+	"cs1_dq16_tx_de-skew",
+	"cs1_dq17_rx_de-skew",
+	"cs1_dq17_tx_de-skew",
+	"cs1_dq18_rx_de-skew",
+	"cs1_dq18_tx_de-skew",
+	"cs1_dq19_rx_de-skew",
+	"cs1_dq19_tx_de-skew",
+	"cs1_dq20_rx_de-skew",
+	"cs1_dq20_tx_de-skew",
+	"cs1_dq21_rx_de-skew",
+	"cs1_dq21_tx_de-skew",
+	"cs1_dq22_rx_de-skew",
+	"cs1_dq22_tx_de-skew",
+	"cs1_dq23_rx_de-skew",
+	"cs1_dq23_tx_de-skew",
+	"cs1_dqs2_rx_de-skew",
+	"cs1_dqs2p_tx_de-skew",
+	"cs1_dqs2n_tx_de-skew",
+
+	"cs1_dm3_rx_de-skew",
+	"cs1_dm3_tx_de-skew",
+	"cs1_dq24_rx_de-skew",
+	"cs1_dq24_tx_de-skew",
+	"cs1_dq25_rx_de-skew",
+	"cs1_dq25_tx_de-skew",
+	"cs1_dq26_rx_de-skew",
+	"cs1_dq26_tx_de-skew",
+	"cs1_dq27_rx_de-skew",
+	"cs1_dq27_tx_de-skew",
+	"cs1_dq28_rx_de-skew",
+	"cs1_dq28_tx_de-skew",
+	"cs1_dq29_rx_de-skew",
+	"cs1_dq29_tx_de-skew",
+	"cs1_dq30_rx_de-skew",
+	"cs1_dq30_tx_de-skew",
+	"cs1_dq31_rx_de-skew",
+	"cs1_dq31_tx_de-skew",
+	"cs1_dqs3_rx_de-skew",
+	"cs1_dqs3p_tx_de-skew",
+	"cs1_dqs3n_tx_de-skew",
+};
+
 static int get_atf_version(void)
 {
 	struct arm_smccc_res res;
@@ -139,7 +356,7 @@ static int get_atf_version(void)
 
 static int dmc_fsp_probe(struct udevice *dev)
 {
-	struct device_node *np_params;
+	struct device_node *np_params, *np_tim;
 	struct arm_smccc_res res;
 	void *pmugrf_base;
 	int *p = NULL;
@@ -148,6 +365,7 @@ static int dmc_fsp_probe(struct udevice *dev)
 	int ddr_params_version;
 	u32 dram_type, os_reg2_val, os_reg3_val;
 	u32 i = 0, count = 0, size = 0;
+	u32 phy_de_skew_en;
 	ulong atf_version_limit;
 
 	atf_version_limit = dev_get_driver_data(dev);
@@ -198,12 +416,20 @@ static int dmc_fsp_probe(struct udevice *dev)
 	    (ddr_params_version & 0xffff) <= 0x100) {
 		count = ARRAY_SIZE(ddr_params_v1);
 		ddr_params = ddr_params_v1;
+	} else if ((ddr_params_version & 0xff00) == 0x100 &&
+		   (ddr_params_version & 0xffff) <= 0x101) {
+		count = ARRAY_SIZE(ddr_params_v1) + ARRAY_SIZE(rk3326_dts_de_skew);
+		ddr_params = ddr_params_v1;
 	} else {
 		printf("%s: ddr_params_version=0x%x unsupported\n", __func__, ddr_params_version);
 		return -EINVAL;
 	}
-
-	size = count * 4;
+	/*
+	 * page 0 is used for share param
+	 * page 1~N is uesd for dmc_fsp param
+	 * page N + 1 is uesd for de-skew param
+	 */
+	size = count * 4 + 4096;
 	res = sip_smc_request_share_mem(DIV_ROUND_UP(size, 4096) + 1, SHARE_PAGE_TYPE_DDRFSP);
 	if (res.a0 != 0) {
 		printf("%s:no share memory for init\n", __func__);
@@ -215,11 +441,25 @@ static int dmc_fsp_probe(struct udevice *dev)
 	for (i = 0; i < ARRAY_SIZE(dmc_fsp_params); i++)
 		p[i] = dev_read_u32_default(dev, dmc_fsp_params[i], PARAMS_INVALID_VAL);
 
+	phy_de_skew_en = p[1];
+
 	p = (int *)(res.a1 + DTS_PAR_OFFSET / 4);
-	for (i = 0; i < count; i++) {
+	for (i = 0; i < ARRAY_SIZE(ddr_params_v1); i++) {
 		p[i] = ofnode_read_u32_default(np_to_ofnode(np_params), ddr_params[i],
 					       PARAMS_INVALID_VAL);
 	}
+	if (phy_de_skew_en) {
+		phandle_name = "ddr_timing";
+		np_tim = of_parse_phandle(ofnode_to_np(dev_ofnode(dev)), phandle_name, 0);
+		if (!np_tim) {
+			printf("%s: of_parse_phandle %s error!\n", __func__, phandle_name);
+			return -EINVAL;
+		}
+		for (i = ARRAY_SIZE(ddr_params_v1); i < count; i++) {
+			p[i] = ofnode_read_u32_default(np_to_ofnode(np_tim), rk3326_dts_de_skew[i - ARRAY_SIZE(ddr_params_v1)],
+						       PARAMS_INVALID_VAL);
+		}
+	}
 
 	flush_cache((unsigned long)(res.a1), (DIV_ROUND_UP(size, 4096) + 1) * 0x1000);
 	res = sip_smc_dram(SHARE_PAGE_TYPE_DDRFSP, 0, ROCKCHIP_SIP_CONFIG_DRAM_FSP_INIT);
@@ -233,6 +473,7 @@ static int dmc_fsp_probe(struct udevice *dev)
 
 static const struct udevice_id rockchip_dmc_fsp_ids[] = {
 	{ .compatible = "rockchip,rk3568-dmc-fsp", .data = 0x102},
+	{ .compatible = "rockchip,px30s-dmc-fsp", .data = 0x106},
 	{ }
 };
 

commit 629c727b9970d81769a90abc98747d0a33d42da1
Author: Guochun Huang <hero.huang@rock-chips.com>
Date:   Wed Dec 15 20:50:23 2021 +0800

    video/drm: rockchip_phy: update for px30s
    
    - px30s: add support 2.5Gsps lane rate
    - disable pin_txclkesc inverting
    - reset digital logic before select phy lvds mode
    - reset digital logic before select TTL mode
    
    Change-Id: I6d5c1e94fe995d386e45484805c753dbdf70128e
    Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>

diff --git a/drivers/video/drm/inno_video_combo_phy.c b/drivers/video/drm/inno_video_combo_phy.c
index 726e75877f..23718cc32c 100644
--- a/drivers/video/drm/inno_video_combo_phy.c
+++ b/drivers/video/drm/inno_video_combo_phy.c
@@ -5,6 +5,7 @@
  * Author: Wyon Bi <bivvy.bi@rock-chips.com>
  */
 
+#include <asm/arch/cpu.h>
 #include <config.h>
 #include <common.h>
 #include <errno.h>
@@ -195,6 +196,14 @@
 #define DSI_PHY_STATUS			0xb0
 #define PHY_LOCK			BIT(0)
 
+enum soc_type {
+	PX30_VIDEO_PHY,
+	PX30S_VIDEO_PHY,
+	RK3128_VIDEO_PHY,
+	RK3368_VIDEO_PHY,
+	RK3568_VIDEO_PHY,
+};
+
 enum phy_max_rate {
 	MAX_1GHZ,
 	MAX_2_5GHZ,
@@ -291,6 +300,7 @@ struct mipi_dphy_timing {
 };
 
 struct inno_video_phy {
+	struct udevice *dev;
 	enum phy_mode mode;
 	const struct inno_video_mipi_dphy_info *mipi_dphy_info;
 	struct resource phy;
@@ -592,10 +602,18 @@ static void inno_mipi_dphy_lane_enable(struct inno_video_phy *inno)
 
 static void inno_video_phy_mipi_mode_enable(struct inno_video_phy *inno)
 {
+	struct rockchip_phy *phy =
+		(struct rockchip_phy *)dev_get_driver_data(inno->dev);
+
 	/* Select MIPI mode */
 	phy_update_bits(inno, REGISTER_PART_LVDS, 0x03,
 			MODE_ENABLE_MASK, MIPI_MODE_ENABLE);
 
+	/* set px30 pin_txclkesc_0 invert disable */
+	if (phy->soc_type == PX30_VIDEO_PHY || phy->soc_type == PX30S_VIDEO_PHY)
+		phy_update_bits(inno, REGISTER_PART_DIGITAL, 0x01,
+				INVERT_TXCLKESC_MASK, INVERT_TXCLKESC_DISABLE);
+
 	if (inno->mipi_dphy_info->phy_max_rate == MAX_2_5GHZ)
 		inno_mipi_dphy_max_2_5GHz_pll_enable(inno);
 	else
@@ -618,9 +636,19 @@ static void inno_video_phy_lvds_mode_enable(struct inno_video_phy *inno)
 			SAMPLE_CLOCK_DIRECTION_MASK | LOWFRE_EN_MASK,
 			SAMPLE_CLOCK_DIRECTION_REVERSE |
 			PLL_OUTPUT_FREQUENCY_DIV_BY_1);
+
+	/* Reset LVDS digital logic */
+	phy_update_bits(inno, REGISTER_PART_LVDS, 0x00,
+			LVDS_DIGITAL_INTERNAL_RESET_MASK,
+			LVDS_DIGITAL_INTERNAL_RESET_ENABLE);
+	phy_update_bits(inno, REGISTER_PART_LVDS, 0x00,
+			LVDS_DIGITAL_INTERNAL_RESET_MASK,
+			LVDS_DIGITAL_INTERNAL_RESET_DISABLE);
+
 	/* Select LVDS mode */
 	phy_update_bits(inno, REGISTER_PART_LVDS, 0x03,
 			MODE_ENABLE_MASK, LVDS_MODE_ENABLE);
+
 	/* Configure PLL */
 	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x03,
 			REG_PREDIV_MASK, REG_PREDIV(prediv));
@@ -629,6 +657,7 @@ static void inno_video_phy_lvds_mode_enable(struct inno_video_phy *inno)
 	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x04,
 			REG_FBDIV_LO_MASK, REG_FBDIV_LO(fbdiv));
 	phy_update_bits(inno, REGISTER_PART_LVDS, 0x08, 0xff, 0xfc);
+
 	/* Enable PLL and Bandgap */
 	phy_update_bits(inno, REGISTER_PART_LVDS, 0x0b,
 			LVDS_PLL_POWER_MASK | LVDS_BANDGAP_POWER_MASK,
@@ -643,13 +672,6 @@ static void inno_video_phy_lvds_mode_enable(struct inno_video_phy *inno)
 	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x1e,
 			PLL_MODE_SEL_MASK, PLL_MODE_SEL_LVDS_MODE);
 
-	/* Reset LVDS digital logic */
-	phy_update_bits(inno, REGISTER_PART_LVDS, 0x00,
-			LVDS_DIGITAL_INTERNAL_RESET_MASK,
-			LVDS_DIGITAL_INTERNAL_RESET_ENABLE);
-	phy_update_bits(inno, REGISTER_PART_LVDS, 0x00,
-			LVDS_DIGITAL_INTERNAL_RESET_MASK,
-			LVDS_DIGITAL_INTERNAL_RESET_DISABLE);
 	/* Enable LVDS digital logic */
 	phy_update_bits(inno, REGISTER_PART_LVDS, 0x01,
 			LVDS_DIGITAL_INTERNAL_ENABLE_MASK,
@@ -663,9 +685,6 @@ static void inno_video_phy_lvds_mode_enable(struct inno_video_phy *inno)
 
 static void inno_video_phy_ttl_mode_enable(struct inno_video_phy *inno)
 {
-	/* Select TTL mode */
-	phy_update_bits(inno, REGISTER_PART_LVDS, 0x03,
-			MODE_ENABLE_MASK, TTL_MODE_ENABLE);
 	/* Reset digital logic */
 	phy_update_bits(inno, REGISTER_PART_LVDS, 0x00,
 			LVDS_DIGITAL_INTERNAL_RESET_MASK,
@@ -673,6 +692,10 @@ static void inno_video_phy_ttl_mode_enable(struct inno_video_phy *inno)
 	phy_update_bits(inno, REGISTER_PART_LVDS, 0x00,
 			LVDS_DIGITAL_INTERNAL_RESET_MASK,
 			LVDS_DIGITAL_INTERNAL_RESET_DISABLE);
+
+	/* Select TTL mode */
+	phy_update_bits(inno, REGISTER_PART_LVDS, 0x03,
+			MODE_ENABLE_MASK, TTL_MODE_ENABLE);
 	/* Enable digital logic */
 	phy_update_bits(inno, REGISTER_PART_LVDS, 0x01,
 			LVDS_DIGITAL_INTERNAL_ENABLE_MASK,
@@ -861,7 +884,11 @@ static int inno_video_phy_probe(struct udevice *dev)
 	dev->driver_data = (ulong)phy;
 	memcpy(phy, tmp_phy, sizeof(*phy));
 
+	inno->dev = dev;
 	inno->mipi_dphy_info = phy->data;
+	if (soc_is_px30s())
+		inno->mipi_dphy_info = &inno_video_mipi_dphy_max_2_5GHz;
+
 	inno->lanes = ofnode_read_u32_default(dev->node, "inno,lanes", 4);
 
 	ret = dev_read_resource(dev, 0, &inno->phy);
@@ -889,13 +916,33 @@ static const struct rockchip_phy_funcs inno_video_phy_funcs = {
 };
 
 static struct rockchip_phy px30_inno_video_phy_driver_data = {
-	 .funcs = &inno_video_phy_funcs,
-	 .data = &inno_video_mipi_dphy_max_1GHz,
+	.soc_type = PX30_VIDEO_PHY,
+	.funcs = &inno_video_phy_funcs,
+	.data = &inno_video_mipi_dphy_max_1GHz,
+};
+
+static struct rockchip_phy px30s_inno_video_phy_driver_data = {
+	.soc_type = PX30S_VIDEO_PHY,
+	.funcs = &inno_video_phy_funcs,
+	.data = &inno_video_mipi_dphy_max_2_5GHz,
+};
+
+static struct rockchip_phy rk3128_inno_video_phy_driver_data = {
+	.soc_type = RK3128_VIDEO_PHY,
+	.funcs = &inno_video_phy_funcs,
+	.data = &inno_video_mipi_dphy_max_1GHz,
+};
+
+static struct rockchip_phy rk3368_inno_video_phy_driver_data = {
+	.soc_type = RK3368_VIDEO_PHY,
+	.funcs = &inno_video_phy_funcs,
+	.data = &inno_video_mipi_dphy_max_1GHz,
 };
 
 static struct rockchip_phy rk3568_inno_video_phy_driver_data = {
-	 .funcs = &inno_video_phy_funcs,
-	 .data = &inno_video_mipi_dphy_max_2_5GHz,
+	.soc_type = RK3568_VIDEO_PHY,
+	.funcs = &inno_video_phy_funcs,
+	.data = &inno_video_mipi_dphy_max_2_5GHz,
 };
 
 static const struct udevice_id inno_video_phy_ids[] = {
@@ -903,22 +950,22 @@ static const struct udevice_id inno_video_phy_ids[] = {
 		.compatible = "rockchip,px30-video-phy",
 		.data = (ulong)&px30_inno_video_phy_driver_data,
 	},
+	{
+		.compatible = "rockchip,px30s-video-phy",
+		.data = (ulong)&px30s_inno_video_phy_driver_data,
+	},
 	{
 		.compatible = "rockchip,rk3128-video-phy",
-		.data = (ulong)&px30_inno_video_phy_driver_data,
+		.data = (ulong)&rk3128_inno_video_phy_driver_data,
 	},
 	{
 		.compatible = "rockchip,rk3368-video-phy",
-		.data = (ulong)&px30_inno_video_phy_driver_data,
+		.data = (ulong)&rk3368_inno_video_phy_driver_data,
 	},
 	{
 		.compatible = "rockchip,rk3568-video-phy",
 		.data = (ulong)&rk3568_inno_video_phy_driver_data,
 	},
-	{
-		.compatible = "rockchip,rk3568-dsi-dphy",
-		.data = (ulong)&rk3568_inno_video_phy_driver_data,
-	},
 	{}
 };
 

commit 021839c702044116a9a73b17a17348964514a8dc
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Mon Oct 25 18:30:21 2021 +0800

    rockchip: px30: fixup some fdt nodes for px30s
    
    1. fixup opp table.
    2. fixup bus apll.
    3. use scmi_clk.
    4. fixup i2s soft reset num.
    
    Change-Id: I0fb660ea9066e8ec9b8b8c88228171d98e0d9bfb
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c
index 1e93c504e4..1e55320a46 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -6,12 +6,14 @@
 #include <common.h>
 #include <clk.h>
 #include <dm.h>
+#include <fdt_support.h>
 #include <asm/io.h>
 #include <asm/arch/cru_px30.h>
 #include <asm/arch/grf_px30.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/uart.h>
 #include <asm/arch/clock.h>
+#include <asm/arch/cpu.h>
 #include <asm/arch/cru_px30.h>
 #include <dt-bindings/clock/px30-cru.h>
 
@@ -339,3 +341,227 @@ int set_armclk_rate(void)
 
 	return 0;
 }
+
+static int fdt_fixup_cpu_opp_table(const void *blob)
+{
+	int opp_node, cpu_node, sub_node;
+	int len;
+	u32 phandle;
+	u32 *pp;
+
+	/* Replace opp table */
+	opp_node = fdt_path_offset(blob, "/px30s-cpu0-opp-table");
+	if (opp_node < 0) {
+		printf("Failed to get px30s-cpu0-opp-table node\n");
+		return -EINVAL;
+	}
+
+	phandle = fdt_get_phandle(blob, opp_node);
+	if (!phandle) {
+		printf("Failed to get cpu opp table phandle\n");
+		return -EINVAL;
+	}
+
+	cpu_node = fdt_path_offset(blob, "/cpus");
+	if (cpu_node < 0) {
+		printf("Failed to get cpus node\n");
+		return -EINVAL;
+	}
+
+	fdt_for_each_subnode(sub_node, blob, cpu_node) {
+		pp = (u32 *)fdt_getprop(blob, sub_node, "operating-points-v2",
+					&len);
+		if (!pp)
+			continue;
+		pp[0] = cpu_to_fdt32(phandle);
+	}
+
+	return 0;
+}
+
+static int fdt_fixup_dmc_opp_table(const void *blob)
+{
+	int opp_node, dmc_node;
+	int len;
+	u32 phandle;
+	u32 *pp;
+
+	opp_node = fdt_path_offset(blob, "/px30s-dmc-opp-table");
+	if (opp_node < 0) {
+		printf("Failed to get px30s-dmc-opp-table node\n");
+		return -EINVAL;
+	}
+
+	phandle = fdt_get_phandle(blob, opp_node);
+	if (!phandle) {
+		printf("Failed to get dmc opp table phandle\n");
+		return -EINVAL;
+	}
+
+	dmc_node = fdt_path_offset(blob, "/dmc");
+	if (dmc_node < 0) {
+		printf("Failed to get dmc node\n");
+		return -EINVAL;
+	}
+
+	pp = (u32 *)fdt_getprop(blob, dmc_node, "operating-points-v2", &len);
+	if (!pp)
+		return 0;
+	pp[0] = cpu_to_fdt32(phandle);
+
+	return 0;
+}
+
+static int fdt_fixup_gpu_opp_table(const void *blob)
+{
+	int opp_node, gpu_node;
+	int len;
+	u32 phandle;
+	u32 *pp;
+
+	opp_node = fdt_path_offset(blob, "/px30s-gpu-opp-table");
+	if (opp_node < 0) {
+		printf("Failed to get px30s-gpu-opp-table node\n");
+		return -EINVAL;
+	}
+
+	phandle = fdt_get_phandle(blob, opp_node);
+	if (!phandle) {
+		printf("Failed to get gpu opp table phandle\n");
+		return -EINVAL;
+	}
+
+	gpu_node = fdt_path_offset(blob, "/gpu@ff400000");
+	if (gpu_node < 0) {
+		printf("Failed to get gpu node\n");
+		return -EINVAL;
+	}
+
+	pp = (u32 *)fdt_getprop(blob, gpu_node, "operating-points-v2", &len);
+	if (!pp)
+		return 0;
+	pp[0] = cpu_to_fdt32(phandle);
+
+	return 0;
+}
+
+static int fdt_fixup_bus_apll(const void *blob)
+{
+	char path[] = "/bus-apll";
+
+	do_fixup_by_path((void *)blob, path, "status", "disabled", sizeof("disabled"), 0);
+
+	return 0;
+}
+
+static int fdt_fixup_cpu_gpu_clk(const void *blob)
+{
+	int cpu_node, gpu_node, scmi_clk_node;
+	int len;
+	u32 phandle;
+	u32 *pp;
+
+	scmi_clk_node = fdt_path_offset(blob, "/firmware/scmi/protocol@14");
+	if (scmi_clk_node < 0) {
+		printf("Failed to get px30s scmi clk node\n");
+		return -EINVAL;
+	}
+
+	phandle = fdt_get_phandle(blob, scmi_clk_node);
+	if (!phandle)
+		return 0;
+
+	cpu_node = fdt_path_offset(blob, "/cpus/cpu@0");
+	if (cpu_node < 0) {
+		printf("Failed to get px30s cpu node\n");
+		return -EINVAL;
+	}
+	/*
+	 * before fixed:
+	 *	clocks = <&cru ARMCLK>;
+	 * after fixed:
+	 *	clocks = <&scmi_clk 0>;
+	 */
+	pp = (u32 *)fdt_getprop(blob, cpu_node,
+				"clocks",
+				&len);
+	if (!pp)
+		return 0;
+	if ((len / 8) >= 1) {
+		pp[0] = cpu_to_fdt32(phandle);
+		pp[1] = cpu_to_fdt32(0);
+	}
+
+	gpu_node = fdt_path_offset(blob, "/gpu@ff400000");
+	if (gpu_node < 0) {
+		printf("Failed to get px30s gpu node\n");
+		return -EINVAL;
+	}
+	/*
+	 * before fixed:
+	 *	clocks = <&cru SCLK_GPU>;
+	 * after fixed:
+	 *	clocks = <&scmi_clk 1>;
+	 */
+	pp = (u32 *)fdt_getprop(blob, gpu_node,
+				"clocks",
+				&len);
+	if (!pp)
+		return 0;
+	if ((len / 8) >= 1) {
+		pp[0] = cpu_to_fdt32(phandle);
+		pp[1] = cpu_to_fdt32(1);
+	}
+	return 0;
+}
+
+static int fdt_fixup_i2s_soft_reset(const void *blob)
+{
+	int node;
+	int len;
+	u32 *pp;
+
+	node = fdt_path_offset(blob, "/i2s@ff060000");
+	if (node < 0) {
+		printf("Failed to get px30s i2s node\n");
+		return -EINVAL;
+	}
+
+	/*
+	 * before fixed:
+	 *	resets = <&cru SRST_I2S0_TX>, <&cru SRST_I2S0_RX>;
+	 * after fixed:
+	 *	resets = <&cru SRST_I2S0_TX>, <&cru 128>;
+	 */
+	pp = (u32 *)fdt_getprop(blob, node,
+				"resets",
+				&len);
+	if (!pp)
+		return 0;
+	if ((len / 8) >= 2)
+		pp[3] = cpu_to_fdt32(128);
+
+	return 0;
+}
+
+int rk_board_fdt_fixup(const void *blob)
+{
+	if (soc_is_px30s()) {
+		fdt_increase_size((void *)blob, SZ_8K);
+		fdt_fixup_cpu_opp_table(blob);
+		fdt_fixup_dmc_opp_table(blob);
+		fdt_fixup_gpu_opp_table(blob);
+		fdt_fixup_bus_apll(blob);
+		fdt_fixup_cpu_gpu_clk(blob);
+		fdt_fixup_i2s_soft_reset(blob);
+	}
+
+	return 0;
+}
+
+int rk_board_early_fdt_fixup(const void *blob)
+{
+	rk_board_fdt_fixup(blob);
+
+	return 0;
+}

commit 01dba696feedc6e68d034c997cfe2ec97500ab3d
Author: Liang Chen <cl@rock-chips.com>
Date:   Tue Oct 26 09:42:10 2021 +0800

    rockchip: add soc version for px30s
    
    Change-Id: Ia567a7be7c20d2f399a0124f12afcb822150cccf
    Signed-off-by: Liang Chen <cl@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cpu.h b/arch/arm/include/asm/arch-rockchip/cpu.h
index d22bb7bb69..8057814138 100644
--- a/arch/arm/include/asm/arch-rockchip/cpu.h
+++ b/arch/arm/include/asm/arch-rockchip/cpu.h
@@ -11,6 +11,7 @@
 #include <dm/device.h>
 
 #define ROCKCHIP_CPU_MASK       0xffff0000
+#define ROCKCHIP_CPU_PX30	0x33260000
 #define ROCKCHIP_CPU_RK312X     0x31260000
 #define ROCKCHIP_CPU_RK3288     0x32880000
 #define ROCKCHIP_CPU_RK3308	0x33080000
@@ -18,6 +19,8 @@
 #define ROCKCHIP_CPU_RK3568	0x35680000
 
 #define ROCKCHIP_SOC_MASK	(ROCKCHIP_CPU_MASK | 0xff)
+#define ROCKCHIP_SOC_PX30	(ROCKCHIP_CPU_PX30 | 0x00)
+#define ROCKCHIP_SOC_PX30S	(ROCKCHIP_CPU_PX30 | 0x01)
 #define ROCKCHIP_SOC_RK3126     (ROCKCHIP_CPU_RK312X | 0x00)
 #define ROCKCHIP_SOC_RK3126B    (ROCKCHIP_CPU_RK312X | 0x10)
 #define ROCKCHIP_SOC_RK3126C    (ROCKCHIP_CPU_RK312X | 0x20)
@@ -45,7 +48,18 @@ static inline unsigned long rockchip_get_cpu_version(void)
 
 static inline int rockchip_soc_id(void)
 {
-#if defined(CONFIG_ROCKCHIP_RK3288)
+#if defined(CONFIG_ROCKCHIP_PX30)
+	u32 v = readl(0xFF630004);
+
+	/* The CHIP_ID is stored in DDRGRF CON1[15:14]
+	 * PX30:  0x00
+	 * PX30S: 0x03
+	 */
+	if (((v >> 14) & 0x03) == 0x03)
+		return ROCKCHIP_SOC_PX30S;
+	else
+		return ROCKCHIP_SOC_PX30;
+#elif defined(CONFIG_ROCKCHIP_RK3288)
 	/* RK3288W HDMI Revision ID is 0x1A */
 	if (readl(0xFF980004) == 0x1A)
 		return ROCKCHIP_SOC_RK3288W;
@@ -85,6 +99,8 @@ static inline bool soc_is_##id(void) \
 	return false; \
 }
 
+ROCKCHIP_SOC(px30, PX30)
+ROCKCHIP_SOC(px30s, PX30S)
 ROCKCHIP_SOC(rk3126, RK3126)
 ROCKCHIP_SOC(rk3126b, RK3126B)
 ROCKCHIP_SOC(rk3126c, RK3126C)

commit e54e81e85cdf4f8e4fb0bfa371b7943f1fa6a23c
Author: Damon Ding <damon.ding@rock-chips.com>
Date:   Thu Jan 20 20:10:04 2022 +0800

    drm/rockchip: display: modify the check of logo->bpp
    
    The bmp format pictures which belong to 16 and 32 bpp
    can be showed directly, but the others should be decoded.
    
    Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
    Change-Id: If8c5eeb5da1c4326af15739e9ccc99ab882c06ad

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 939beb9387..6c84af40a3 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -311,7 +311,7 @@ static unsigned long get_cubic_memory_size(void)
 
 bool can_direct_logo(int bpp)
 {
-	return bpp == 24 || bpp == 32;
+	return bpp == 16 || bpp == 32;
 }
 
 static int connector_phy_init(struct display_state *state,

commit 8bcae395556af5970e3cf151d1c123d7cf6a8e6b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 19 09:15:05 2022 +0000

    rockchip: rk3588: use PMU0_GRF_OS_REG8 as boot mode register
    
    If use PMU1 register, BL31 can't assert NPOR when reboot.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ic9be355864106bfc19546e16ecf5554f27530a01

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 8530e88cee..f01070b681 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -570,7 +570,7 @@ config ROCKCHIP_BOOT_MODE_REG
 	default 0xff738200 if ROCKCHIP_RK3368
 	default 0xff320300 if ROCKCHIP_RK3399
 	default 0xfdc20200 if ROCKCHIP_RK3568
-	default 0xfd58a200 if ROCKCHIP_RK3588
+	default 0xfd588080 if ROCKCHIP_RK3588
 	default 0xfe020200 if ROCKCHIP_RK1808
 	default 0x10300580 if ROCKCHIP_RV1108
 	default 0xfe020200 if ROCKCHIP_RV1126

commit 467c0e518ba64c55c91a46c3cd0b22eb940a3e3d
Author: shengfei Xu <xsf@rock-chips.com>
Date:   Thu Jan 20 02:32:50 2022 +0000

    power: pmic: rk806: config reset function by dts
    
    Signed-off-by: shengfei Xu <xsf@rock-chips.com>
    Change-Id: I422a340e528ef8b2f463e47ac4d0a4a1286cfaac

diff --git a/drivers/power/pmic/rk8xx_spi.c b/drivers/power/pmic/rk8xx_spi.c
index 3718253740..b4b2e5e768 100644
--- a/drivers/power/pmic/rk8xx_spi.c
+++ b/drivers/power/pmic/rk8xx_spi.c
@@ -35,6 +35,8 @@ DECLARE_GLOBAL_DATA_PTR;
 #define RK806_IRQ_PWRON_FALL_MSK	BIT(0)
 #define RK806_IRQ_PWRON_RISE_MSK	BIT(1)
 #define RK806_DEV_OFF			BIT(0)
+#define RK806_RST_MODE1			0x01
+#define RK806_RST_MODE2			0x02
 #define VERSION_AB			0x01
 
 #if CONFIG_IS_ENABLED(IRQ)
@@ -181,6 +183,8 @@ static int rk8xx_spi_ofdata_to_platdata(struct udevice *dev)
 	u32 interrupt, phandle;
 	int ret;
 
+	rk8xx->rst_fun = dev_read_u32_default(dev, "pmic-reset-func", 0);
+
 	phandle = dev_read_u32_default(dev, "interrupt-parent", -ENODATA);
 	if (phandle == -ENODATA) {
 		printf("Read 'interrupt-parent' failed, ret=%d\n", phandle);
@@ -287,6 +291,18 @@ static int rk8xx_spi_probe(struct udevice *dev)
 		rk806_spi_write(dev, RK806_SYS_CFG1, &value, 1);
 	}
 
+	if (priv->rst_fun) {
+		rk806_spi_read(dev, RK806_SYS_CFG3, &value, 1);
+		value &= 0x3f;
+		if (priv->rst_fun == RK806_RST_MODE1) {
+			value |= (RK806_RST_MODE1 << 6);
+			rk806_spi_write(dev, RK806_SYS_CFG3, &value, 1);
+		} else if (priv->rst_fun == RK806_RST_MODE2) {
+			value |= (RK806_RST_MODE2 << 6);
+			rk806_spi_write(dev, RK806_SYS_CFG3, &value, 1);
+		}
+	}
+
 	rk8xx_spi_irq_chip_init(dev);
 
 	return 0;
diff --git a/include/power/rk8xx_pmic.h b/include/power/rk8xx_pmic.h
index a4ea964cc7..aa51e887e4 100644
--- a/include/power/rk8xx_pmic.h
+++ b/include/power/rk8xx_pmic.h
@@ -285,6 +285,7 @@ struct rk8xx_priv {
 	int lp_off_time;
 	int lp_action;
 	uint8_t sleep_pin;
+	uint8_t rst_fun;
 	int not_save_power_en;
 };
 

commit 40801113c52a15d7cb24c76657ef35a2ff60c2be
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Wed Dec 15 17:42:15 2021 +0800

    clk: rockchip: rk3588: Use scmi clk for cpub
    
    Change-Id: Iac761088bd65d14f906fb0fe212d307b00f5d6c7
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3588.c b/drivers/clk/rockchip/clk_rk3588.c
index 3d46a121c1..cd902fb45f 100644
--- a/drivers/clk/rockchip/clk_rk3588.c
+++ b/drivers/clk/rockchip/clk_rk3588.c
@@ -1905,10 +1905,6 @@ static void rk3588_clk_init(struct rk3588_clk_priv *priv)
 			rockchip_pll_get_rate(&rk3588_pll_clks[LPLL],
 					      priv->cru, LPLL);
 		priv->armclk_init_hz = priv->armclk_enter_hz;
-		ret = rockchip_pll_set_rate(&rk3588_pll_clks[B0PLL], priv->cru,
-					    B0PLL, LPLL_HZ);
-		ret = rockchip_pll_set_rate(&rk3588_pll_clks[B1PLL], priv->cru,
-					    B1PLL, LPLL_HZ);
 	}
 
 	div = DIV_ROUND_UP(GPLL_HZ, 300 * MHz);
@@ -1954,6 +1950,15 @@ static int rk3588_clk_probe(struct udevice *dev)
 		printf("Failed to set spll\n");
 	}
 
+	clk.id = SCMI_CLK_CPUB01;
+	ret = clk_set_rate(&clk, LPLL_HZ);
+	if (ret < 0)
+		printf("Failed to set cpub01\n");
+	clk.id = SCMI_CLK_CPUB23;
+	ret = clk_set_rate(&clk, LPLL_HZ);
+	if (ret < 0)
+		printf("Failed to set cpub23\n");
+
 	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 	if (IS_ERR(priv->grf))
 		return PTR_ERR(priv->grf);

commit e6ebf032141b6c8ebef549a1c6ddbb7662739ee3
Author: Wyon bi <bivvy.bi@rock-chips.com>
Date:   Tue Jan 18 12:07:37 2022 +0800

    rockchip: rk3588: Assert hdptxphy init,cmn,lane reset
    
    Fixes: 4a99c239e09e ("rockchip: rk3588: disable hdptxphy by default")
    Signed-off-by: Wyon bi <bivvy.bi@rock-chips.com>
    Change-Id: I93e2f384ebbc39008f3391bb36b1279f4817d70d

diff --git a/arch/arm/mach-rockchip/rk3588/rk3588.c b/arch/arm/mach-rockchip/rk3588/rk3588.c
index 72a7af2599..ec8c7e2ef7 100644
--- a/arch/arm/mach-rockchip/rk3588/rk3588.c
+++ b/arch/arm/mach-rockchip/rk3588/rk3588.c
@@ -66,12 +66,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #define PMU1CRU_BASE			0xfd7f0000
 #define PMU1CRU_SOFTRST_CON03		0x0a0c
-
-#define HDPTXPHY0_BASE			0xfed60000
-#define HDPTXPHY_LANE_REG0301		0x0c04
-#define HDPTXPHY_LANE_REG0401		0x1004
-#define HDPTXPHY_LANE_REG0501		0x1404
-#define HDPTXPHY_LANE_REG0601		0x1804
+#define PMU1CRU_SOFTRST_CON04		0x0a10
 
 #ifdef CONFIG_ARM64
 #include <asm/armv8/mmu.h>
@@ -881,13 +876,9 @@ int arch_cpu_init(void)
 	writel(0x20002000, USB2PHY2_GRF_BASE + USB2PHY_GRF_CON2);
 	writel(0x20002000, USB2PHY3_GRF_BASE + USB2PHY_GRF_CON2);
 
-	/* Disable hdptxphy by default */
-	writel(0x38003800, PMU1CRU_BASE + PMU1CRU_SOFTRST_CON03);
-	writel(0x80, HDPTXPHY0_BASE + HDPTXPHY_LANE_REG0301);
-	writel(0x80, HDPTXPHY0_BASE + HDPTXPHY_LANE_REG0401);
-	writel(0x80, HDPTXPHY0_BASE + HDPTXPHY_LANE_REG0501);
-	writel(0x80, HDPTXPHY0_BASE + HDPTXPHY_LANE_REG0601);
-
+	/* Assert hdptxphy init,cmn,lane reset */
+	writel(0xb800b800, PMU1CRU_BASE + PMU1CRU_SOFTRST_CON03);
+	writel(0x00030003, PMU1CRU_BASE + PMU1CRU_SOFTRST_CON04);
 #endif
 	/* Select usb otg0 phy status to 0 that make rockusb can work at high-speed */
 	writel(0x00080008, USBGRF_BASE + USB_GRF_USB3OTG0_CON1);

commit 8abdd51c2b5ceb1860564818af8f6b310ae36f23
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Wed Jan 19 10:32:54 2022 +0800

    usb: dwc3: gadget: start new transfer on XFER_COMPLETE
    
    In current code, the next transfer in dwc3 queue needs to wait for a
    following XFERNOTREADY event coming after the current transfer is
    completed. However, the gadget in U-Boot awlays uses polling method
    to check the DWC3 interrupt, so the gadget class driver is required
    to poll dwc3 interrupt twice to check the XFERCOMPLETE and XFERNOTREADY
    event separately in ping-pong buffer usage scenario.
    
    So let start the new transfer in dwc3 request list right away when the
    time we get to XFERCOMPLETE event for non-sync transfer, instead of
    waiting for the following XFER_NOT_READY event.
    
    Change-Id: I113c6551606acd4fc0d0fbafb84d066179eec587
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index cc27509e01..183df9c39b 100644
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -1813,12 +1813,17 @@ static void dwc3_endpoint_transfer_complete(struct dwc3 *dwc,
 {
 	unsigned		status = 0;
 	int			clean_busy;
+	u32			is_xfer_complete;
+	int			ret;
+
+	is_xfer_complete = (event->endpoint_event == DWC3_DEPEVT_XFERCOMPLETE);
 
 	if (event->status & DEPEVT_STATUS_BUSERR)
 		status = -ECONNRESET;
 
 	clean_busy = dwc3_cleanup_done_reqs(dwc, dep, event, status);
-	if (clean_busy)
+	if (clean_busy && (is_xfer_complete ||
+			   usb_endpoint_xfer_isoc(dep->endpoint.desc)))
 		dep->flags &= ~DWC3_EP_BUSY;
 
 	/*
@@ -1845,6 +1850,12 @@ static void dwc3_endpoint_transfer_complete(struct dwc3 *dwc,
 
 		dwc->u1u2 = 0;
 	}
+
+	if (!usb_endpoint_xfer_isoc(dep->endpoint.desc)) {
+		ret = __dwc3_gadget_kick_transfer(dep, 0, is_xfer_complete);
+		if (!ret || ret == -EBUSY)
+			return;
+	}
 }
 
 static void dwc3_endpoint_interrupt(struct dwc3 *dwc,

commit dd0862ace4ca4c5e503039300fd13f8869a312fb
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Wed Jan 19 09:56:34 2022 +0800

    mmc: rockchip_sdhci: remove SDHCI_QUIRK_WAIT_SEND_CMD config
    
    The SDHCI controller build in RK3399, RK3568 and RK3588 have
    no broken features and no need to set SDHCI_QUIRK_WAIT_SEND_CMD.
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: I48770f93bfc71cf3bad02f982fdc7845c12d4624

diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index e02630f382..1bbab943a7 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -485,7 +485,6 @@ static int rockchip_sdhci_probe(struct udevice *dev)
 
 	host->ops = &rockchip_sdhci_ops;
 
-	host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD;
 	host->max_clk = max_frequency;
 
 	if (dev_read_bool(dev, "mmc-hs200-1_8v"))

commit 9deb34f60c696b35f58b914c019f52de1aa0d773
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Thu Jan 13 19:50:39 2022 +0800

    lib: optee_clientApi: support check oem otp key is written
    
    Change-Id: I33787b77b18175f5e52b315d8052fc56edc439e3
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/include/optee_include/OpteeClientInterface.h b/include/optee_include/OpteeClientInterface.h
index fceaf29b46..2db881fa2c 100644
--- a/include/optee_include/OpteeClientInterface.h
+++ b/include/optee_include/OpteeClientInterface.h
@@ -95,6 +95,7 @@ uint32_t trusty_write_oem_ns_otp(uint32_t byte_off, uint8_t *byte_buf, uint32_t
 uint32_t trusty_read_oem_ns_otp(uint32_t byte_off, uint8_t *byte_buf, uint32_t byte_len);
 uint32_t trusty_write_oem_otp_key(enum RK_OEM_OTP_KEYID key_id,
 				  uint8_t *byte_buf, uint32_t byte_len);
+uint32_t trusty_oem_otp_key_is_written(enum RK_OEM_OTP_KEYID key_id, uint8_t *value);
 uint32_t trusty_set_oem_hr_otp_read_lock(enum RK_OEM_OTP_KEYID key_id);
 uint32_t trusty_oem_otp_key_cipher(enum RK_OEM_OTP_KEYID key_id, rk_cipher_config *config,
 				   uint32_t src_phys_addr, uint32_t dst_phys_addr,
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index 6755b5ea34..c16a4607a4 100644
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -28,6 +28,7 @@
 #define STORAGE_CMD_READ_OEM_NS_OTP		13
 #define STORAGE_CMD_WRITE_OEM_OTP_KEY		14
 #define STORAGE_CMD_SET_OEM_HR_OTP_READ_LOCK	15
+#define STORAGE_CMD_OEM_OTP_KEY_IS_WRITTEN	16
 
 #define CRYPTO_SERVICE_CMD_OEM_OTP_KEY_PHYS_CIPHER	0x00000002
 
@@ -815,6 +816,58 @@ exit:
 	return TeecResult;
 }
 
+uint32_t trusty_oem_otp_key_is_written(enum RK_OEM_OTP_KEYID key_id, uint8_t *value)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+
+	*value = 0xFF;
+
+	TEEC_UUID tempuuid = { 0x2d26d8a8, 0x5134, 0x4dd8,
+			{ 0xb3, 0x2f, 0xb3, 0x4b, 0xce, 0xeb, 0xc4, 0x71 } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				&TeecSession,
+				TeecUuid,
+				TEEC_LOGIN_PUBLIC,
+				NULL,
+				NULL,
+				&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
+
+	TeecOperation.params[0].value.a = key_id;
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INOUT,
+						    TEEC_NONE,
+						    TEEC_NONE,
+						    TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					STORAGE_CMD_OEM_OTP_KEY_IS_WRITTEN,
+					&TeecOperation,
+					&ErrorOrigin);
+	if (TeecResult == TEEC_SUCCESS)
+		*value = TeecOperation.params[0].value.b;
+
+	TEEC_CloseSession(&TeecSession);
+	TEEC_FinalizeContext(&TeecContext);
+
+	return TeecResult;
+}
+
 uint32_t trusty_set_oem_hr_otp_read_lock(enum RK_OEM_OTP_KEYID key_id)
 {
 	TEEC_Result TeecResult;

commit 0cf7e0d5dd62470b7fc0b0b52ffb405fef7e3ef8
Author: Chen Shunqing <csq@rock-chips.com>
Date:   Sat Jan 8 11:17:07 2022 +0800

    configs: rk3588: enable uboot charge
    
    Signed-off-by: Chen Shunqing <csq@rock-chips.com>
    Change-Id: Ib4b2e0cfec8aa9f013c1935756a2d227818c6da5

diff --git a/configs/rk3588_defconfig b/configs/rk3588_defconfig
index f2525812ee..adab250441 100644
--- a/configs/rk3588_defconfig
+++ b/configs/rk3588_defconfig
@@ -155,6 +155,11 @@ CONFIG_DM_REGULATOR_GPIO=y
 CONFIG_REGULATOR_RK860X=y
 CONFIG_REGULATOR_RK806=y
 CONFIG_PWM_ROCKCHIP=y
+CONFIG_DM_CHARGE_DISPLAY=y
+CONFIG_DM_FUEL_GAUGE=y
+CONFIG_CHARGER_BQ25700=y
+CONFIG_POWER_FG_CW201X=y
+CONFIG_CHARGE_ANIMATION=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y

commit 947a1b4780c92ce5406693a895e1caf3a3e2ce57
Author: Shunqing Chen <csq@rock-chips.com>
Date:   Wed Nov 24 17:08:43 2021 +0800

    power: bq25700: support pd charge
    
    Signed-off-by: Shunqing Chen <csq@rock-chips.com>
    Change-Id: I1017bcc9958407264b568c9175a9f5f009a4cad2

diff --git a/drivers/Makefile b/drivers/Makefile
index a46f59ae76..3a9a55ad84 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -35,6 +35,7 @@ obj-$(CONFIG_SPL_POWER_SUPPORT) += power/
 obj-$(CONFIG_SPL_DM_PMIC) += power/pmic/
 obj-$(CONFIG_SPL_DM_REGULATOR) += power/regulator/
 obj-$(CONFIG_SPL_DM_FUEL_GAUGE) += power/fuel_gauge/
+obj-$(CONFIG_SPL_DM_FUEL_GAUGE) += power/charge/
 obj-$(CONFIG_SPL_PWM_SUPPORT) += pwm/
 obj-$(CONFIG_SPL_MTD_SUPPORT) += mtd/
 obj-$(CONFIG_SPL_ONENAND_SUPPORT) += mtd/onenand/
diff --git a/drivers/power/charge/bq25700_charger.c b/drivers/power/charge/bq25700_charger.c
index bd921371ed..2564b54e90 100644
--- a/drivers/power/charge/bq25700_charger.c
+++ b/drivers/power/charge/bq25700_charger.c
@@ -7,8 +7,10 @@
 #include <common.h>
 #include <asm/gpio.h>
 #include <dm/device.h>
+#include <dm/uclass.h>
 #include <power/fuel_gauge.h>
 #include <power/pmic.h>
+#include <power/power_delivery/power_delivery.h>
 #include <linux/usb/phy-rockchip-usb2.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -54,10 +56,9 @@ enum bq25700_table_ids {
 
 struct bq25700 {
 	struct udevice *dev;
-	struct gpio_desc typec0_enable_gpio;
-	struct gpio_desc typec1_enable_gpio;
 	u32 ichg;
 	u32 chip_id;
+	struct udevice *pd;
 };
 
 struct bq25700_range {
@@ -95,7 +96,6 @@ static int bq25700_write(struct bq25700 *charger, uint reg, u16 val)
 	return 0;
 }
 
-#if defined(CONFIG_POWER_FUSB302)
 static const union {
 	struct bq25700_range  rt;
 } bq25700_tables[] = {
@@ -130,51 +130,26 @@ static u32 bq25700_find_idx(u32 value, enum bq25700_table_ids id)
 
 	return idx - 1;
 }
-#endif
 
 static bool bq25700_charger_status(struct bq25700 *charger)
 {
-#if defined(CONFIG_POWER_FUSB302)
-	static u16 charge_flag;
-#endif
 	int state_of_charger;
 	u16 value;
 
 	value = bq25700_read(charger, BQ25700_CHARGERSTAUS_REG);
 	state_of_charger = value >> 15;
 
-#if defined(CONFIG_POWER_FUSB302)
-	if (state_of_charger) {
-		charge_flag = 1;
-	} else if (!state_of_charger && charge_flag == 1) {
-		typec_discharge();
-		charge_flag = 0;
-	}
-#endif
-
 	return state_of_charger;
 }
 
 static bool bq25703_charger_status(struct bq25700 *charger)
 {
-#if defined(CONFIG_POWER_FUSB302)
-	static u16 charge_flag;
-#endif
 	int state_of_charger;
 	u16 value;
 
 	value = bq25700_read(charger, BQ25703_CHARGERSTAUS_REG);
 	state_of_charger = value >> 15;
 
-#if defined(CONFIG_POWER_FUSB302)
-	if (state_of_charger) {
-		charge_flag = 1;
-	} else if (!state_of_charger && charge_flag == 1) {
-		typec_discharge();
-		charge_flag = 0;
-	}
-#endif
-
 	return state_of_charger;
 }
 
@@ -202,44 +177,62 @@ static int bq25700_get_usb_type(void)
 #endif
 }
 
+static int bq25700_get_pd_output_val(struct bq25700 *charger,
+				     int *vol, int *cur)
+{
+	struct power_delivery_data pd_data;
+
+	if (!charger->pd)
+		return -1;
+
+	memset(&pd_data, 0, sizeof(pd_data));
+	if (!power_delivery_get_data(charger->pd, &pd_data))
+		return -1;
+	if (!pd_data.online || !pd_data.voltage || !pd_data.current)
+		return -1;
+
+	*vol = pd_data.voltage;
+	*cur = pd_data.current;
+
+	return 0;
+}
+
 static void bq25700_charger_current_init(struct bq25700 *charger)
 {
 	u16 charge_current = BQ25700_CHARGE_CURRENT_1500MA;
 	u16 sdp_inputcurrent = BQ25700_SDP_INPUT_CURRENT_500MA;
 	u16 dcp_inputcurrent = BQ25700_DCP_INPUT_CURRENT_1500MA;
-	u32 pd_inputcurrent = 0;
-#if defined(CONFIG_POWER_FUSB302)
-	u16 vol_idx, cur_idx, pd_inputvol;
-#endif
+	int pd_inputvol, pd_inputcurrent;
+	u16 vol_idx = 0, cur_idx;
 	u16 temp;
 
 	temp = bq25700_read(charger, BQ25700_CHARGEOPTION0_REG);
 	temp &= (~WATCHDOG_ENSABLE);
 	bq25700_write(charger, BQ25700_CHARGEOPTION0_REG, temp);
 
-#if defined(CONFIG_POWER_FUSB302)
-	if (!get_pd_output_val(&pd_inputvol, &pd_inputcurrent)) {
-		printf("%s pd charge input vol:%dmv current:%dma\n",
+	if (!bq25700_get_pd_output_val(charger, &pd_inputvol,
+				       &pd_inputcurrent)) {
+		printf("%s pd charge input vol:%duv current:%dua\n",
 		       __func__, pd_inputvol, pd_inputcurrent);
-		vol_idx = bq25700_find_idx((pd_inputvol - 1280) * 1000,
-					   TBL_INPUTVOL);
-		cur_idx = bq25700_find_idx(pd_inputcurrent * 1000,
+		if (pd_inputvol > 5000000) {
+			vol_idx = bq25700_find_idx((pd_inputvol - 1280000 - 3200000),
+						   TBL_INPUTVOL);
+			vol_idx = vol_idx << 6;
+		}
+		cur_idx = bq25700_find_idx(pd_inputcurrent,
 					   TBL_INPUTCUR);
 		cur_idx  = cur_idx << 8;
-		vol_idx = vol_idx << 6;
 		if (pd_inputcurrent != 0) {
 			bq25700_write(charger, BQ25700_INPUTCURREN_REG,
 				      cur_idx);
-			bq25700_write(charger, BQ25700_INPUTVOLTAGE_REG,
-				      vol_idx);
-			charge_current = bq25700_find_idx(charger.ichg,
+			if (vol_idx)
+				bq25700_write(charger, BQ25700_INPUTVOLTAGE_REG,
+					      vol_idx);
+			charge_current = bq25700_find_idx(charger->ichg,
 							  TBL_ICHG);
 			charge_current = charge_current << 8;
 		}
-	}
-#endif
-
-	if (pd_inputcurrent == 0) {
+	} else {
 		if (bq25700_get_usb_type() > 1)
 			bq25700_write(charger, BQ25700_INPUTCURREN_REG,
 				      dcp_inputcurrent);
@@ -258,39 +251,37 @@ static void bq25703_charger_current_init(struct bq25700 *charger)
 	u16 charge_current = BQ25700_CHARGE_CURRENT_1500MA;
 	u16 sdp_inputcurrent = BQ25700_SDP_INPUT_CURRENT_500MA;
 	u16 dcp_inputcurrent = BQ25700_DCP_INPUT_CURRENT_1500MA;
-	u32 pd_inputcurrent = 0;
-#if defined(CONFIG_POWER_FUSB302)
-	u16 vol_idx, cur_idx, pd_inputvol;
-#endif
+	int pd_inputvol,  pd_inputcurrent;
+	u16 vol_idx = 0, cur_idx;
 	u16 temp;
 
 	temp = bq25700_read(charger, BQ25703_CHARGEOPTION0_REG);
 	temp &= (~WATCHDOG_ENSABLE);
 	bq25700_write(charger, BQ25703_CHARGEOPTION0_REG, temp);
 
-#if defined(CONFIG_POWER_FUSB302)
-	if (!get_pd_output_val(&pd_inputvol, &pd_inputcurrent)) {
-		printf("%s pd charge input vol:%dmv current:%dma\n",
+	if (!bq25700_get_pd_output_val(charger, &pd_inputvol,
+				       &pd_inputcurrent)) {
+		printf("%s pd charge input vol:%duv current:%dua\n",
 		       __func__, pd_inputvol, pd_inputcurrent);
-		vol_idx = bq25700_find_idx((pd_inputvol - 1280) * 1000,
-					   TBL_INPUTVOL);
-		cur_idx = bq25700_find_idx(pd_inputcurrent * 1000,
+		if (pd_inputvol > 5000000) {
+			vol_idx = bq25700_find_idx(pd_inputvol - 1280000 - 3200000,
+						   TBL_INPUTVOL);
+			vol_idx = vol_idx << 6;
+		}
+		cur_idx = bq25700_find_idx(pd_inputcurrent,
 					   TBL_INPUTCUR);
 		cur_idx  = cur_idx << 8;
-		vol_idx = vol_idx << 6;
 		if (pd_inputcurrent != 0) {
 			bq25700_write(charger, BQ25703_INPUTCURREN_REG,
 				      cur_idx);
-			bq25700_write(charger, BQ25703_INPUTVOLTAGE_REG,
-				      vol_idx);
-			charge_current = bq25700_find_idx(charger.ichg,
+			if (vol_idx)
+				bq25700_write(charger, BQ25703_INPUTVOLTAGE_REG,
+					      vol_idx);
+			charge_current = bq25700_find_idx(charger->ichg,
 							  TBL_ICHG);
 			charge_current = charge_current << 8;
 		}
-	}
-#endif
-
-	if (pd_inputcurrent == 0) {
+	} else {
 		if (bq25700_get_usb_type() > 1)
 			bq25700_write(charger, BQ25703_INPUTCURREN_REG,
 				      dcp_inputcurrent);
@@ -309,9 +300,6 @@ static int bq25700_ofdata_to_platdata(struct udevice *dev)
 	struct bq25700 *charger = dev_get_priv(dev);
 	const void *blob = gd->fdt_blob;
 	int node, node1;
-#if defined(CONFIG_POWER_FUSB302)
-	int port_num;
-#endif
 
 	charger->dev = dev;
 
@@ -331,34 +319,23 @@ static int bq25700_ofdata_to_platdata(struct udevice *dev)
 
 	charger->ichg = fdtdec_get_int(blob, node, "ti,charge-current", 0);
 
-#if defined(CONFIG_POWER_FUSB302)
-	gpio_request_by_name(dev, "typec0-enable-gpios", 0,
-			     &charger.typec0_enable_gpio);
-	gpio_request_by_name(dev, "typec1-enable-gpios", 0,
-			     &charger.typec1_enable_gpio);
-
-	if (dm_gpio_is_valid(charger.typec1_enable_gpio.gpio) &&
-	    dm_gpio_is_valid(charger.typec0_enable_gpio.gpio)) {
-		port_num = get_pd_port_num();
-		if (port_num == 0) {
-			printf("fusb0 charge typec0:1 typec1:0\n");
-			dm_gpio_set_value(&charger.typec0_enable_gpio.gpio, 1);
-			dm_gpio_set_value(&charger.typec1_enable_gpio.gpio, 0);
-		} else if (port_num == 1) {
-			printf("fusb1 charge typec0:0 typec1:1\n");
-			dm_gpio_set_value(&charger.typec0_enable_gpio.gpio, 0);
-			dm_gpio_set_value(&charger.typec1_enable_gpio.gpio, 1);
-		}
-		udelay(1000 * 200);
-	}
-#endif
-
 	return 0;
 }
 
 static int bq25700_probe(struct udevice *dev)
 {
 	struct bq25700 *charger = dev_get_priv(dev);
+	int ret;
+
+	ret = uclass_get_device(UCLASS_PD, 0, &charger->pd);
+	if (ret) {
+		if (ret == -ENODEV)
+			printf("Can't find PMIC\n");
+		else
+			printf("Get UCLASS PMIC failed: %d\n", ret);
+
+		charger->pd = NULL;
+	}
 
 	if (charger->chip_id == BQ25700_ID)
 		bq25700_charger_current_init(charger);

commit af14d1060e5d758381109108511b5f0209e4ad20
Author: Chen Shunqing <csq@rock-chips.com>
Date:   Sat Jan 8 10:39:21 2022 +0800

    power: fg_cw201x: compatible with kernel5.10
    
    Signed-off-by: Chen Shunqing <csq@rock-chips.com>
    Change-Id: I4ef4d46be72ee5021359b5e4c7629fe76b680f26

diff --git a/drivers/power/fuel_gauge/fg_cw201x.c b/drivers/power/fuel_gauge/fg_cw201x.c
old mode 100755
new mode 100644
index 6829290600..6f2c406916
--- a/drivers/power/fuel_gauge/fg_cw201x.c
+++ b/drivers/power/fuel_gauge/fg_cw201x.c
@@ -58,6 +58,7 @@ struct cw201x_info {
 	int support_dc_adp;
 	struct gpio_desc dc_det_gpio;
 	int dc_det_flag;
+	bool dual_cell;
 };
 
 static u8 cw201x_read(struct cw201x_info *cw201x, u8 reg)
@@ -101,12 +102,12 @@ static u16 cw201x_read_half_word(struct cw201x_info *cw201x, int reg)
 	return val;
 }
 
-static int cw201x_ofdata_to_platdata(struct udevice *dev)
+static int cw201x_parse_config_info(struct cw201x_info *cw201x)
 {
-	struct cw201x_info *cw201x = dev_get_priv(dev);
 	int ret;
-	int len, size;
-	int hw_id0_val, hw_id1_val;
+	int i, len, size;
+	const u8 *info;
+	struct udevice *dev = cw201x->dev;
 
 	if (dev_read_prop(dev, "bat_config_info", &len)) {
 		len /= sizeof(u32);
@@ -122,8 +123,47 @@ static int cw201x_ofdata_to_platdata(struct udevice *dev)
 			debug("fdtdec_get cw_bat_config_info fail\n");
 			return -EINVAL;
 		}
+
+		return 0;
+	}
+
+	if (!dev_read_prop(dev, "cellwise,battery-profile", &len))
+		return -EINVAL;
+
+	size = sizeof(*cw201x->cw_bat_config_info) * len;
+	cw201x->cw_bat_config_info = calloc(size, 1);
+	if (!cw201x->cw_bat_config_info) {
+		debug("calloc cw_bat_config_info fail\n");
+		return -EINVAL;
+	}
+
+	info = dev_read_u8_array_ptr(dev, "cellwise,battery-profile", len);
+	if (!info) {
+		debug("fdtdec_get battery profile fail\n");
+		return -EINVAL;
+	}
+	for (i = 0; i < len; i++) {
+		cw201x->cw_bat_config_info[i] = info[i];
+		debug("%#x ", cw201x->cw_bat_config_info[i]);
+		if ((i+1) % 8 == 0)
+			debug("\n");
 	}
 
+	return 0;
+}
+
+static int cw201x_ofdata_to_platdata(struct udevice *dev)
+{
+	struct cw201x_info *cw201x = dev_get_priv(dev);
+	int ret;
+	int hw_id0_val, hw_id1_val;
+
+	cw201x->dev = dev;
+	ret = cw201x_parse_config_info(cw201x);
+	if (ret)
+		return ret;
+
+	cw201x->dual_cell = dev_read_bool(dev, "cellwise,dual-cell");
 	ret = gpio_request_by_name_nodev(dev_ofnode(dev), "dc_det_gpio",
 					 0, &cw201x->dc_det_gpio, GPIOD_IS_IN);
 	if (!ret) {
@@ -165,7 +205,9 @@ static int cw201x_get_vol(struct cw201x_info *cw201x)
 	u16 value16, value16_1, value16_2, value16_3;
 	int voltage;
 	int res1, res2;
+	int retry = 0;
 
+__retry:
 	value16 = cw201x_read_half_word(cw201x, REG_VCELL);
 	if (value16 < 0)
 		return -1;
@@ -197,6 +239,11 @@ static int cw201x_get_vol(struct cw201x_info *cw201x)
 	}
 
 	voltage = value16_1 * 312 / 1024;
+	if (voltage <= 0 && retry < 10) {
+		retry++;
+		mdelay(20);
+		goto __retry;
+	}
 
 	if (cw201x->divider_res1 &&
 	    cw201x->divider_res2) {
@@ -205,6 +252,9 @@ static int cw201x_get_vol(struct cw201x_info *cw201x)
 		voltage = voltage * (res1 + res2) / res2;
 	}
 
+	if (cw201x->dual_cell)
+		voltage *= 2;
+
 	debug("the cw201x voltage=%d\n", voltage);
 	return voltage;
 }
@@ -262,13 +312,18 @@ static bool cw201x_check_charge(struct cw201x_info *cw201x)
 
 static int cw201x_get_soc(struct cw201x_info *cw201x)
 {
-	int cap;
-
-	cap = cw201x_read(cw201x, REG_SOC);
-	if ((cap < 0) || (cap > 100))
-		cap = cw201x->capacity;
-
+	int cap, i = 0;
+
+	while (i < 10) {
+		cap = cw201x_read(cw201x, REG_SOC);
+		if ((cap < 0) || (cap > 100))
+			cap = cw201x->capacity;
+		i++;
+		if (cap)
+			break;
+	}
 	cw201x->capacity = cap;
+
 	return cw201x->capacity;
 }
 
@@ -286,6 +341,11 @@ static int cw201x_update_get_voltage(struct udevice *dev)
 	return cw201x_get_vol(cw201x);
 }
 
+static int cw201x_update_get_current(struct udevice *dev)
+{
+	return 0;
+}
+
 static bool cw201x_update_get_chrg_online(struct udevice *dev)
 {
 	struct cw201x_info *cw201x = dev_get_priv(dev);
@@ -302,6 +362,7 @@ static struct dm_fuel_gauge_ops cw201x_fg_ops = {
 	.capability = cw201x_capability,
 	.get_soc = cw201x_update_get_soc,
 	.get_voltage = cw201x_update_get_voltage,
+	.get_current = cw201x_update_get_current,
 	.get_chrg_online = cw201x_update_get_chrg_online,
 };
 
@@ -338,6 +399,7 @@ static int cw201x_fg_probe(struct udevice *dev)
 
 static const struct udevice_id cw201x_ids[] = {
 	{ .compatible = "cw201x" },
+	{ .compatible = "cellwise,cw2015" },
 	{ }
 };
 

commit d0d19ce567b80fd20136b16231fc24ae079c91f5
Author: Wang Jie <dave.wang@rock-chips.com>
Date:   Fri Jan 14 15:11:25 2022 +0800

    power: power_delivery: redeclare the power_delivery_get_data()
    
    If enable charge ic, but not enable CONFIG_DM_POWER_DELIVERY, it
    will compile error.
    
    Fixes: a2c816168781 ("power: add pd chip driver")
    Signed-off-by: Wang Jie <dave.wang@rock-chips.com>
    Change-Id: I59d7d8335439459011a5cefba8b5227a83394460

diff --git a/include/power/power_delivery/power_delivery.h b/include/power/power_delivery/power_delivery.h
index 36383b7f8a..019ace02fa 100644
--- a/include/power/power_delivery/power_delivery.h
+++ b/include/power/power_delivery/power_delivery.h
@@ -23,6 +23,13 @@ struct power_delivery_data {
 	int online;
 };
 
-int power_delivery_init(void);
+#ifdef CONFIG_DM_POWER_DELIVERY
 int power_delivery_get_data(struct udevice *dev, struct power_delivery_data *pd_data);
+#else
+inline int power_delivery_get_data(struct udevice *dev,
+				   struct power_delivery_data *pd_data)
+{
+	return -ENOSYS;
+}
+#endif
 #endif

commit ed7979939a7749025a7e20bebaf8b36c76bd5d27
Author: Damon Ding <damon.ding@rock-chips.com>
Date:   Tue Jan 4 11:32:53 2022 +0800

    drm/rockchip: display: modify the compatibility of get_crtc_id()
    
    vopb/vopl/vop doesn't has the node of vpx in dts, but
    vop2 does.
    
    Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
    Change-Id: Ic403668a600c06dede9b9725bad9d5ce619e3561

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 117d0c61f0..939beb9387 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -1126,17 +1126,34 @@ static int display_logo(struct display_state *state)
 	return 0;
 }
 
-static int get_crtc_id(struct device_node *connect)
+static int get_crtc_id(ofnode connect, bool is_ports_node)
 {
 	struct device_node *port_node;
+	struct device_node *remote;
+	int phandle;
 	int val;
 
-	port_node = of_get_parent(connect);
-	if (!port_node)
-		goto err;
-	val = ofnode_read_u32_default(np_to_ofnode(port_node), "reg", -1);
-	if (val < 0)
-		goto err;
+	if (is_ports_node) {
+		port_node = of_get_parent(connect.np);
+		if (!port_node)
+			goto err;
+
+		val = ofnode_read_u32_default(np_to_ofnode(port_node), "reg", -1);
+		if (val < 0)
+			goto err;
+	} else {
+		phandle = ofnode_read_u32_default(connect, "remote-endpoint", -1);
+		if (phandle < 0)
+			goto err;
+
+		remote = of_find_node_by_phandle(phandle);
+		if (!remote)
+			goto err;
+
+		val = ofnode_read_u32_default(np_to_ofnode(remote), "reg", -1);
+		if (val < 0)
+			goto err;
+	}
 
 	return val;
 err:
@@ -1804,7 +1821,7 @@ static int rockchip_display_probe(struct udevice *dev)
 		s->crtc_state.node = np_to_ofnode(vop_node);
 		s->crtc_state.dev = crtc_dev;
 		s->crtc_state.crtc = crtc;
-		s->crtc_state.crtc_id = get_crtc_id(ep_node);
+		s->crtc_state.crtc_id = get_crtc_id(np_to_ofnode(ep_node), is_ports_node);
 		s->node = node;
 
 		if (is_ports_node) { /* only vop2 will get into here */

commit 66724b9c37b02d34e638d54acf365dfb67b7e372
Author: Damon Ding <damon.ding@rock-chips.com>
Date:   Mon Dec 20 15:31:40 2021 +0800

    drm/rockchip: vop2: add line flag setting function
    
    Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
    Change-Id: I095e3c04e6679d989901d052c3336381ab34ac8b

diff --git a/drivers/video/drm/rockchip_vop2.c b/drivers/video/drm/rockchip_vop2.c
index dd279d6562..6771e0dac8 100644
--- a/drivers/video/drm/rockchip_vop2.c
+++ b/drivers/video/drm/rockchip_vop2.c
@@ -143,6 +143,11 @@
 #define RK3588_CLUSTER3_PD_STATUS_SHIFT		11
 #define RK3588_ESMART_PD_STATUS_SHIFT		15
 
+#define RK3568_SYS_CTRL_LINE_FLAG0		0x70
+#define LINE_FLAG_NUM_MASK			0x1fff
+#define RK3568_DSP_LINE_FLAG_NUM0_SHIFT		0
+#define RK3568_DSP_LINE_FLAG_NUM1_SHIFT		16
+
 /* Overlay registers definition    */
 #define RK3568_OVL_CTRL				0x600
 #define OVL_PORT_MUX_REG_DONE_IMD_SHIFT		28
@@ -2153,7 +2158,8 @@ static int rockchip_vop2_init(struct display_state *state)
 	u16 vact_end = vact_st + vdisplay;
 	bool yuv_overlay = false;
 	u32 vp_offset = (cstate->crtc_id * 0x100);
-	u32 val;
+	u32 line_flag_offset = (cstate->crtc_id * 4);
+	u32 val, act_end;
 	u8 dither_down_en = 0;
 	u8 pre_dither_down_en = 0;
 	char output_type_name[30] = {0};
@@ -2257,11 +2263,13 @@ static int rockchip_vop2_init(struct display_state *state)
 		vop2_mask_write(vop2, RK3568_VP0_DSP_CTRL + vp_offset, EN_MASK,
 				P2I_EN_SHIFT, 1, false);
 		vtotal += vtotal + 1;
+		act_end = vact_end_f1;
 	} else {
 		vop2_mask_write(vop2, RK3568_VP0_DSP_CTRL + vp_offset, EN_MASK,
 				INTERLACE_EN_SHIFT, 0, false);
 		vop2_mask_write(vop2, RK3568_VP0_DSP_CTRL + vp_offset, EN_MASK,
 				P2I_EN_SHIFT, 0, false);
+		act_end = vact_end;
 	}
 	vop2_writel(vop2, RK3568_VP0_DSP_VTOTAL_VS_END + vp_offset,
 		    (vtotal << 16) | vsync_len);
@@ -2298,6 +2306,11 @@ static int rockchip_vop2_init(struct display_state *state)
 		return ret;
 	}
 
+	vop2_mask_write(vop2, RK3568_SYS_CTRL_LINE_FLAG0 + line_flag_offset, LINE_FLAG_NUM_MASK,
+			RK3568_DSP_LINE_FLAG_NUM0_SHIFT, act_end - 3, false);
+	vop2_mask_write(vop2, RK3568_SYS_CTRL_LINE_FLAG0 + line_flag_offset, LINE_FLAG_NUM_MASK,
+			RK3568_DSP_LINE_FLAG_NUM1_SHIFT, act_end - us_to_vertical_line(mode, 1000), false);
+
 	return 0;
 }
 

commit 7a86f4011e4f7b156f5bd258a2130dc9bcd0630d
Author: shengfei Xu <xsf@rock-chips.com>
Date:   Tue Jan 11 03:04:38 2022 +0000

    configs: rk3588: enable CONFIG_RK8XX_PWRKEY
    
    Signed-off-by: shengfei Xu <xsf@rock-chips.com>
    Change-Id: I7af35034384762dfc689fd7b74ecc26deee93c22

diff --git a/configs/rk3588_defconfig b/configs/rk3588_defconfig
index 1f503eab68..f2525812ee 100644
--- a/configs/rk3588_defconfig
+++ b/configs/rk3588_defconfig
@@ -105,6 +105,7 @@ CONFIG_ROCKCHIP_GPIO=y
 CONFIG_ROCKCHIP_GPIO_V2=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y
+CONFIG_RK8XX_PWRKEY=y
 CONFIG_ADC_KEY=y
 CONFIG_MISC=y
 CONFIG_SPL_MISC=y

commit 4213f3e09fe1edaa6ee8a665d6442805efb487a8
Author: shengfei Xu <xsf@rock-chips.com>
Date:   Mon Jan 10 11:42:50 2022 +0000

    power: pmic: add powerkey function
    
    Signed-off-by: shengfei Xu <xsf@rock-chips.com>
    Change-Id: I1a2bf30b6d76c7fb3bc7fa1c94ba6496aac65bf5

diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig
index ab432429aa..a32ed55c9f 100644
--- a/drivers/input/Kconfig
+++ b/drivers/input/Kconfig
@@ -94,8 +94,8 @@ config I8042_KEYB
 	  handled by the keyboard itself.
 
 config RK8XX_PWRKEY
-	bool "Enable RK805/816/817 pwrkey support"
-	depends on DM_KEY && PMIC_RK8XX && IRQ
+	bool "Enable RK805/rk806/816/817 pwrkey support"
+	depends on DM_KEY && (PMIC_RK8XX || PMIC_SPI_RK8XX) && IRQ
 	help
 	  This adds a driver for the RK805/816/817 pwrkey support.
 
diff --git a/drivers/power/pmic/rk8xx_spi.c b/drivers/power/pmic/rk8xx_spi.c
index 5ef07b28db..3718253740 100644
--- a/drivers/power/pmic/rk8xx_spi.c
+++ b/drivers/power/pmic/rk8xx_spi.c
@@ -24,6 +24,43 @@ DECLARE_GLOBAL_DATA_PTR;
 #define RK806_CMD_LEN_MSK		0x0f
 #define RK806_REG_H			0x00
 
+#define RK806_SYS_CFG1			0x5f
+#define RK806_SYS_CFG3			0x72
+#define RK806_PWRON_KEY			0x76
+#define RK806_INT_STS0			0x77
+#define RK806_INT_MSK0			0x78
+#define RK806_INT_STS1			0x79
+#define RK806_INT_MSK1			0x7A
+#define RK806_GPIO_INT_CONFIG		0x7B
+#define RK806_IRQ_PWRON_FALL_MSK	BIT(0)
+#define RK806_IRQ_PWRON_RISE_MSK	BIT(1)
+#define RK806_DEV_OFF			BIT(0)
+#define VERSION_AB			0x01
+
+#if CONFIG_IS_ENABLED(IRQ)
+/* RK805 */
+static const struct virq_reg rk806_irqs[] = {
+	[RK8XX_IRQ_PWRON_FALL] = {
+		.mask = RK806_IRQ_PWRON_FALL_MSK,
+		.reg_offset = 0,
+	},
+	[RK8XX_IRQ_PWRON_RISE] = {
+		.mask = RK806_IRQ_PWRON_RISE_MSK,
+		.reg_offset = 0,
+	},
+};
+
+static struct virq_chip rk806_irq_chip = {
+	.status_base		= RK806_INT_STS0,
+	.mask_base		= RK806_INT_MSK0,
+	.num_regs		= 1,
+	.read			= pmic_reg_read,
+	.write			= pmic_reg_write,
+	.irqs			= rk806_irqs,
+	.num_irqs		= ARRAY_SIZE(rk806_irqs),
+};
+#endif
+
 static const struct pmic_child_info pmic_children_info[] = {
 	{ .prefix = "DCDC", .driver = "rk8xx_spi_buck"},
 	{ .prefix = "NLDO", .driver = "rk8xx_spi_ldo"},
@@ -31,6 +68,11 @@ static const struct pmic_child_info pmic_children_info[] = {
 	{ },
 };
 
+static const struct pmic_child_info power_key_info[] = {
+	{ .prefix = "pwrkey", .driver = "rk8xx_pwrkey"},
+	{ },
+};
+
 static int _spi_read(struct udevice *dev, u32 reg, u8 *buffer, int len)
 {
 	struct rk8xx_priv *priv = dev_get_priv(dev);
@@ -125,6 +167,76 @@ static int rk8xx_spi_bind(struct udevice *dev)
 	if (!children)
 		debug("%s: %s - no child found\n", __func__, dev->name);
 
+	children = pmic_bind_children(dev, dev->node, power_key_info);
+	if (!children)
+		debug("%s: %s - no child found\n", __func__, dev->name);
+
+	return 0;
+}
+#endif
+#if CONFIG_IS_ENABLED(IRQ)
+static int rk8xx_spi_ofdata_to_platdata(struct udevice *dev)
+{
+	struct rk8xx_priv *rk8xx = dev_get_priv(dev);
+	u32 interrupt, phandle;
+	int ret;
+
+	phandle = dev_read_u32_default(dev, "interrupt-parent", -ENODATA);
+	if (phandle == -ENODATA) {
+		printf("Read 'interrupt-parent' failed, ret=%d\n", phandle);
+		return phandle;
+	}
+
+	ret = dev_read_u32_array(dev, "interrupts", &interrupt, 1);
+	if (ret) {
+		printf("Read 'interrupts' failed, ret=%d\n", ret);
+		return ret;
+	}
+
+	rk8xx->irq = phandle_gpio_to_irq(phandle, interrupt);
+	if (rk8xx->irq < 0)
+		printf("Failed to request rk8xx irq, ret=%d\n", rk8xx->irq);
+
+	return 0;
+}
+
+static int rk8xx_spi_irq_chip_init(struct udevice *dev)
+{
+	struct rk8xx_priv *priv = dev_get_priv(dev);
+	struct virq_chip *irq_chip = NULL;
+	u8 value;
+	int ret;
+
+	value = 0xff;
+	rk806_spi_write(dev, RK806_INT_STS0, &value, 1);
+	rk806_spi_write(dev, RK806_INT_STS1, &value, 1);
+	rk806_spi_write(dev, RK806_INT_MSK0, &value, 1);
+	rk806_spi_write(dev, RK806_INT_MSK1, &value, 1);
+	value = 0x00;
+	rk806_spi_write(dev, RK806_GPIO_INT_CONFIG, &value, 1);
+
+	irq_chip = &rk806_irq_chip;
+
+	if (irq_chip && priv->irq > 0) {
+		ret = virq_add_chip(dev, irq_chip, priv->irq);
+		if (ret) {
+			printf("Failed to add irqchip(irq=%d), ret=%d\n",
+			       priv->irq, ret);
+			return ret;
+		}
+		priv->irq_chip = irq_chip;
+	}
+
+	return 0;
+}
+#else
+static inline int rk8xx_spi_ofdata_to_platdata(struct udevice *dev)
+{
+	return 0;
+}
+
+static inline int rk8xx_spi_irq_chip_init(struct udevice *dev)
+{
 	return 0;
 }
 #endif
@@ -135,7 +247,7 @@ static int rk8xx_spi_probe(struct udevice *dev)
 	struct rk8xx_priv *priv = dev_get_priv(dev);
 	struct udevice *spi = dev_get_parent(dev);
 	struct spi_slave *slave = NULL;
-	u8 msb, lsb;
+	u8 msb, lsb, value;
 	int ret;
 
 	if (spi->seq < 0) {
@@ -151,13 +263,13 @@ static int rk8xx_spi_probe(struct udevice *dev)
 
 	/* read Chip variant */
 	ret = rk806_spi_read(dev, RK806_CHIP_NAME, &msb, 1);
-	if (msb < 0) {
+	if (ret) {
 		dev_err(dev, "rk806 name read error: %d\n", ret);
 		return ret;
 	}
 
 	ret = rk806_spi_read(dev, RK806_CHIP_VER, &lsb, 1);
-	if (lsb < 0) {
+	if (ret) {
 		dev_err(dev, "rk806 version read error: %d\n", ret);
 		return ret;
 	}
@@ -165,6 +277,40 @@ static int rk8xx_spi_probe(struct udevice *dev)
 	priv->variant = ((msb << 8) | lsb) & RK8XX_ID_MSK;
 	printf("spi%d: RK%x%x: %d\n", spi->seq, msb, (lsb >> 4), lsb & 0x0f);
 
+	if ((lsb & 0x0f) == VERSION_AB) {
+		ret = rk806_spi_read(dev, RK806_SYS_CFG1, &value, 1);
+		if (ret) {
+			dev_err(dev, "rk806 RK806_SYS_CFG1 read error: %d\n", ret);
+			return ret;
+		}
+		value |= 0x80;
+		rk806_spi_write(dev, RK806_SYS_CFG1, &value, 1);
+	}
+
+	rk8xx_spi_irq_chip_init(dev);
+
+	return 0;
+}
+
+static int rk8xx_spi_shutdown(struct udevice *dev)
+{
+	u8 dev_off;
+	int ret = 0;
+
+	ret = rk806_spi_read(dev, RK806_SYS_CFG3, &dev_off, 1);
+	if (ret)
+		return ret;
+
+	dev_off |= RK806_DEV_OFF;
+	ret = rk806_spi_write(dev, RK806_SYS_CFG3, &dev_off, 1);
+	if (ret) {
+		dev_err(dev, "rk806 shutdown error: %d\n", ret);
+		return ret;
+	}
+
+	while (1)
+		;
+
 	return 0;
 }
 
@@ -172,6 +318,7 @@ static struct dm_pmic_ops rk8xx_spi_ops = {
 	.reg_count = rk8xx_spi_reg_count,
 	.read = rk806_spi_read,
 	.write = rk806_spi_write,
+	.shutdown = rk8xx_spi_shutdown,
 };
 
 static const struct udevice_id rk8xx_spi_ids[] = {
@@ -186,6 +333,7 @@ U_BOOT_DRIVER(pmic_rk8xx_spi) = {
 #if CONFIG_IS_ENABLED(PMIC_CHILDREN)
 	.bind = rk8xx_spi_bind,
 #endif
+	.ofdata_to_platdata = rk8xx_spi_ofdata_to_platdata,
 	.priv_auto_alloc_size = sizeof(struct rk8xx_priv),
 	.probe = rk8xx_spi_probe,
 	.ops = &rk8xx_spi_ops,

commit 65ccc81fab62e27a033f9bb217aedda1dee59224
Author: Zorro Liu <lyx@rock-chips.com>
Date:   Thu Jan 13 18:01:54 2022 +0800

    drivers: rk_eink: add more waveform version for pvi
    
    Signed-off-by: Zorro Liu <lyx@rock-chips.com>
    Change-Id: I45eba43c626e616c33363bf64abe2c8505eb9f81

diff --git a/drivers/video/rk_eink/epdlut/pvi_waveform.S b/drivers/video/rk_eink/epdlut/pvi_waveform.S
index 30137c0617..e05330eb5d 100644
--- a/drivers/video/rk_eink/epdlut/pvi_waveform.S
+++ b/drivers/video/rk_eink/epdlut/pvi_waveform.S
@@ -3,6 +3,7 @@
  *
  * SPDX-License-Identifier:     GPL-2.0+
  */
+
 	.arch armv8-a+nosimd
 	.file	"pvi_waveform.c"
 	.text
@@ -12,9 +13,9 @@
 	.align	2
 	.type	get_wf_mode_index, %function
 get_wf_mode_index:
-.LFB213:
+.LFB215:
 	.file 1 "drivers/video/rk_eink/epdlut/pvi_waveform.c"
-	.loc 1 263 0
+	.loc 1 274 0
 	.cfi_startproc
 .LVL0:
 	stp	x29, x30, [sp, -32]!
@@ -26,9 +27,9 @@ get_wf_mode_index:
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -16
 	.cfi_offset 20, -8
-	.loc 1 263 0
+	.loc 1 274 0
 	mov	w20, w0
-	.loc 1 264 0
+	.loc 1 275 0
 	adrp	x0, .LANCHOR0
 .LVL1:
 	adrp	x19, .LANCHOR1
@@ -47,121 +48,145 @@ get_wf_mode_index:
 	cmp	w1, 9
 	beq	.L7
 .L2:
-	.loc 1 245 0
+	.loc 1 256 0
 	add	x0, x19, :lo12:.LANCHOR1
-	.loc 1 246 0
+	.loc 1 257 0
 	mov	w3, 1
-	.loc 1 251 0
+	.loc 1 262 0
 	mov	w4, 5
-	.loc 1 245 0
+	.loc 1 256 0
 	str	wzr, [x19, #:lo12:.LANCHOR1]
-	.loc 1 247 0
+	.loc 1 258 0
 	stp	w3, w3, [x0, 4]
-	.loc 1 248 0
+	.loc 1 259 0
 	mov	w3, 2
 	str	w3, [x0, 12]
-	.loc 1 249 0
+	.loc 1 260 0
 	mov	w3, 3
-	.loc 1 251 0
+	.loc 1 262 0
 	str	w4, [x0, 24]
-	.loc 1 252 0
+	.loc 1 263 0
 	mov	w4, 6
-	.loc 1 249 0
+	.loc 1 260 0
 	str	w3, [x0, 16]
-	.loc 1 250 0
+	.loc 1 261 0
 	mov	w3, 4
-	.loc 1 252 0
+	.loc 1 263 0
 	str	w4, [x0, 28]
-	.loc 1 250 0
+	.loc 1 261 0
 	str	w3, [x0, 20]
-	.loc 1 253 0
+	.loc 1 264 0
 	str	w3, [x0, 32]
-	.loc 1 254 0
+	.loc 1 265 0
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	ldrb	w2, [x2, 22]
 .LVL3:
 	bl	printf
 .LVL4:
-	b	.L13
+	b	.L14
 .LVL5:
 .L6:
 	.loc 1 164 0
 	cmp	w1, 22
 	beq	.L8
 	cmp	w1, 24
-.L41:
 	bne	.L2
-	.loc 1 189 0
+.L9:
+	.loc 1 200 0
 	add	x0, x19, :lo12:.LANCHOR1
-	.loc 1 190 0
+	.loc 1 201 0
 	mov	w1, 1
-	.loc 1 189 0
+	.loc 1 200 0
 	str	wzr, [x19, #:lo12:.LANCHOR1]
-	.loc 1 190 0
+	.loc 1 201 0
 	str	w1, [x0, 4]
-.L45:
-	.loc 1 214 0
+.L46:
+	.loc 1 225 0
 	str	w1, [x0, 8]
-	.loc 1 215 0
+	.loc 1 226 0
 	mov	w1, 2
-	.loc 1 218 0
+	.loc 1 229 0
 	mov	w2, 5
 .LVL6:
-	.loc 1 215 0
+	.loc 1 226 0
 	str	w1, [x0, 12]
-	.loc 1 216 0
+	.loc 1 227 0
 	mov	w1, 3
-	.loc 1 218 0
+	.loc 1 229 0
 	str	w2, [x0, 24]
-	.loc 1 216 0
+	.loc 1 227 0
 	str	w1, [x0, 16]
-	.loc 1 219 0
+	.loc 1 230 0
 	mov	w2, 6
-	.loc 1 217 0
+	.loc 1 228 0
 	mov	w1, 4
 	str	w1, [x0, 20]
-	b	.L43
+	b	.L44
 .LVL7:
 .L4:
 	.loc 1 164 0
-	cmp	w1, 35
-	beq	.L10
-	bhi	.L11
-	cmp	w1, 32
-	b	.L41
-.L11:
 	cmp	w1, 67
 	beq	.L3
+	bhi	.L10
+	cmp	w1, 32
+	beq	.L9
+	cmp	w1, 35
+	bne	.L2
+	.loc 1 245 0
+	add	x0, x19, :lo12:.LANCHOR1
+	.loc 1 246 0
+	mov	w1, 1
+	.loc 1 245 0
+	str	wzr, [x19, #:lo12:.LANCHOR1]
+	.loc 1 246 0
+	str	w1, [x0, 4]
+	.loc 1 247 0
+	mov	w1, 5
+	str	w1, [x0, 8]
+	.loc 1 248 0
+	mov	w1, 2
+	str	w1, [x0, 12]
+	.loc 1 249 0
+	mov	w1, 3
+	.loc 1 250 0
+	stp	w1, w1, [x0, 16]
+	.loc 1 251 0
+	str	w1, [x0, 24]
+	b	.L43
+.L10:
+	.loc 1 164 0
+	cmp	w1, 72
+	beq	.L12
 	cmp	w1, 84
 	bne	.L2
-	.loc 1 200 0
+	.loc 1 211 0
 	add	x0, x19, :lo12:.LANCHOR1
-	.loc 1 201 0
+	.loc 1 212 0
 	mov	w1, 1
-	.loc 1 200 0
+	.loc 1 211 0
 	str	wzr, [x19, #:lo12:.LANCHOR1]
-	.loc 1 207 0
+	.loc 1 218 0
 	mov	w2, 5
 .LVL8:
-	.loc 1 202 0
+	.loc 1 213 0
 	stp	w1, w1, [x0, 4]
-	.loc 1 203 0
+	.loc 1 214 0
 	mov	w1, 2
 	str	w1, [x0, 12]
-	.loc 1 204 0
+	.loc 1 215 0
 	mov	w1, 3
 	str	w1, [x0, 16]
-	.loc 1 205 0
+	.loc 1 216 0
 	mov	w1, 4
-	.loc 1 206 0
+	.loc 1 217 0
 	stp	w1, w1, [x0, 20]
-.L43:
-	.loc 1 242 0
+.L44:
+	.loc 1 253 0
 	stp	w2, w1, [x0, 28]
-	b	.L13
+	b	.L14
 .LVL9:
-.L7:
+.L12:
 	.loc 1 166 0
 	add	x0, x19, :lo12:.LANCHOR1
 	.loc 1 167 0
@@ -175,199 +200,197 @@ get_wf_mode_index:
 	str	w1, [x0, 12]
 	.loc 1 170 0
 	mov	w1, 3
+	str	w1, [x0, 16]
 	.loc 1 171 0
-	stp	w1, w1, [x0, 16]
+	mov	w1, 4
 	.loc 1 172 0
+	stp	w1, w1, [x0, 20]
+.L45:
+	.loc 1 195 0
+	str	w1, [x0, 32]
+	.loc 1 196 0
+	mov	w1, 6
+	b	.L42
+.L7:
+	.loc 1 177 0
+	add	x0, x19, :lo12:.LANCHOR1
+	.loc 1 178 0
+	mov	w1, 1
+	.loc 1 177 0
+	str	wzr, [x19, #:lo12:.LANCHOR1]
+	.loc 1 179 0
+	stp	w1, w1, [x0, 4]
+	.loc 1 180 0
+	mov	w1, 2
+	str	w1, [x0, 12]
+	.loc 1 181 0
+	mov	w1, 3
+	.loc 1 182 0
+	stp	w1, w1, [x0, 16]
+	.loc 1 183 0
 	str	w1, [x0, 24]
-	.loc 1 173 0
+	.loc 1 184 0
 	str	w1, [x0, 32]
-	.loc 1 174 0
+	.loc 1 185 0
 	mov	w1, 4
 .L42:
-	.loc 1 185 0
 	str	w1, [x0, 28]
 .LVL10:
-.L13:
+.L14:
 .LBE43:
 .LBE42:
-	.loc 1 270 0
+	.loc 1 281 0
 	cmp	w20, 5
-	beq	.L27
-	.loc 1 273 0
+	beq	.L28
+	.loc 1 284 0
 	cmp	w20, 2
-	beq	.L27
-	.loc 1 276 0
+	beq	.L28
+	.loc 1 287 0
 	sub	w20, w20, #1
 .LVL11:
 	cmp	w20, 9
-	bhi	.L15
-	adrp	x0, .L17
-	add	x0, x0, :lo12:.L17
+	bhi	.L16
+	adrp	x0, .L18
+	add	x0, x0, :lo12:.L18
 	ldrb	w0, [x0,w20,uxtw]
-	adr	x1, .Lrtx17
+	adr	x1, .Lrtx18
 	add	x0, x1, w0, sxtb #2
 	br	x0
-.Lrtx17:
+.Lrtx18:
 	.section	.rodata.get_wf_mode_index,"a",@progbits
 	.align	0
 	.align	2
-.L17:
-	.byte	(.L16 - .Lrtx17) / 4
-	.byte	(.L15 - .Lrtx17) / 4
-	.byte	(.L18 - .Lrtx17) / 4
-	.byte	(.L19 - .Lrtx17) / 4
-	.byte	(.L15 - .Lrtx17) / 4
-	.byte	(.L20 - .Lrtx17) / 4
-	.byte	(.L27 - .Lrtx17) / 4
-	.byte	(.L21 - .Lrtx17) / 4
-	.byte	(.L22 - .Lrtx17) / 4
-	.byte	(.L23 - .Lrtx17) / 4
+.L18:
+	.byte	(.L17 - .Lrtx18) / 4
+	.byte	(.L16 - .Lrtx18) / 4
+	.byte	(.L19 - .Lrtx18) / 4
+	.byte	(.L20 - .Lrtx18) / 4
+	.byte	(.L16 - .Lrtx18) / 4
+	.byte	(.L21 - .Lrtx18) / 4
+	.byte	(.L28 - .Lrtx18) / 4
+	.byte	(.L22 - .Lrtx18) / 4
+	.byte	(.L23 - .Lrtx18) / 4
+	.byte	(.L24 - .Lrtx18) / 4
 	.section	.text.get_wf_mode_index
 .LVL12:
 .L8:
 .LBB45:
 .LBB44:
-	.loc 1 177 0
+	.loc 1 188 0
 	add	x0, x19, :lo12:.LANCHOR1
-	.loc 1 178 0
+	.loc 1 189 0
 	mov	w1, 1
-	.loc 1 177 0
+	.loc 1 188 0
 	str	wzr, [x19, #:lo12:.LANCHOR1]
-	.loc 1 179 0
+	.loc 1 190 0
 	stp	w1, w1, [x0, 4]
-	.loc 1 180 0
+	.loc 1 191 0
 	mov	w1, 2
 	str	w1, [x0, 12]
-	.loc 1 181 0
+	.loc 1 192 0
 	mov	w1, 3
 	str	w1, [x0, 16]
-	.loc 1 182 0
+	.loc 1 193 0
 	mov	w1, 4
-	.loc 1 183 0
+	.loc 1 194 0
 	stp	w1, w1, [x0, 20]
-	.loc 1 184 0
+	.loc 1 195 0
 	mov	w1, 5
-	str	w1, [x0, 32]
-	.loc 1 185 0
-	mov	w1, 6
-	b	.L42
-.L3:
-	.loc 1 212 0
-	add	x0, x19, :lo12:.LANCHOR1
-	.loc 1 213 0
-	mov	w1, 1
-	.loc 1 212 0
-	str	wzr, [x19, #:lo12:.LANCHOR1]
-	.loc 1 213 0
-	str	w1, [x0, 4]
-	.loc 1 214 0
-	mov	w1, 7
 	b	.L45
-.L5:
+.L3:
 	.loc 1 223 0
 	add	x0, x19, :lo12:.LANCHOR1
 	.loc 1 224 0
 	mov	w1, 1
-	.loc 1 229 0
-	mov	w2, 6
-.LVL13:
 	.loc 1 223 0
 	str	wzr, [x19, #:lo12:.LANCHOR1]
 	.loc 1 224 0
 	str	w1, [x0, 4]
 	.loc 1 225 0
 	mov	w1, 7
-	str	w1, [x0, 8]
-	.loc 1 226 0
-	mov	w1, 3
-	.loc 1 229 0
-	str	w2, [x0, 24]
-	.loc 1 227 0
-	stp	w1, w1, [x0, 12]
-	.loc 1 228 0
-	mov	w1, 5
-	str	w1, [x0, 20]
-.L44:
-	.loc 1 241 0
-	mov	w2, 4
-	b	.L43
-.LVL14:
-.L10:
+	b	.L46
+.L5:
 	.loc 1 234 0
 	add	x0, x19, :lo12:.LANCHOR1
 	.loc 1 235 0
 	mov	w1, 1
+	.loc 1 240 0
+	mov	w2, 6
+.LVL13:
 	.loc 1 234 0
 	str	wzr, [x19, #:lo12:.LANCHOR1]
 	.loc 1 235 0
 	str	w1, [x0, 4]
 	.loc 1 236 0
-	mov	w1, 5
+	mov	w1, 7
 	str	w1, [x0, 8]
 	.loc 1 237 0
-	mov	w1, 2
-	str	w1, [x0, 12]
-	.loc 1 238 0
 	mov	w1, 3
-	.loc 1 239 0
-	stp	w1, w1, [x0, 16]
 	.loc 1 240 0
-	str	w1, [x0, 24]
+	str	w2, [x0, 24]
+	.loc 1 238 0
+	stp	w1, w1, [x0, 12]
+	.loc 1 239 0
+	mov	w1, 5
+	str	w1, [x0, 20]
+.L43:
+	.loc 1 252 0
+	mov	w2, 4
 	b	.L44
-.LVL15:
-.L16:
+.LVL14:
+.L17:
 .LBE44:
 .LBE45:
-	.loc 1 281 0
+	.loc 1 292 0
 	mov	w0, 0
-.LVL16:
-.L14:
-	.loc 1 306 0
+.LVL15:
+.L15:
+	.loc 1 317 0
 	add	x19, x19, :lo12:.LANCHOR1
 	ldr	w0, [x19, w0, sxtw 2]
-.LVL17:
+.LVL16:
 	b	.L1
-.LVL18:
-.L21:
-	.loc 1 287 0
-	mov	w0, 4
-	.loc 1 288 0
-	b	.L14
-.LVL19:
+.LVL17:
 .L22:
-	.loc 1 290 0
-	mov	w0, 5
-	.loc 1 291 0
-	b	.L14
-.LVL20:
+	.loc 1 298 0
+	mov	w0, 4
+	.loc 1 299 0
+	b	.L15
+.LVL18:
 .L23:
-	.loc 1 293 0
+	.loc 1 301 0
+	mov	w0, 5
+	.loc 1 302 0
+	b	.L15
+.LVL19:
+.L24:
+	.loc 1 304 0
 	mov	w0, 6
-	.loc 1 294 0
-	b	.L14
-.LVL21:
-.L18:
-	.loc 1 296 0
-	mov	w0, 2
-	.loc 1 297 0
-	b	.L14
-.LVL22:
+	.loc 1 305 0
+	b	.L15
+.LVL20:
 .L19:
-	.loc 1 299 0
+	.loc 1 307 0
+	mov	w0, 2
+	.loc 1 308 0
+	b	.L15
+.LVL21:
+.L20:
+	.loc 1 310 0
 	mov	w0, 1
-	.loc 1 300 0
-	b	.L14
-.LVL23:
-.L15:
-	.loc 1 302 0
+	.loc 1 311 0
+	b	.L15
+.LVL22:
+.L16:
+	.loc 1 313 0
 	adrp	x0, .LC1
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL24:
-	.loc 1 303 0
+.LVL23:
+	.loc 1 314 0
 	mov	w0, -1
 .L1:
-	.loc 1 307 0
+	.loc 1 318 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	.cfi_remember_state
@@ -377,117 +400,117 @@ get_wf_mode_index:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL25:
-.L20:
+.LVL24:
+.L21:
 	.cfi_restore_state
-	.loc 1 278 0
+	.loc 1 289 0
 	mov	w0, 7
-	b	.L14
-.LVL26:
-.L27:
-	.loc 1 284 0
+	b	.L15
+.LVL25:
+.L28:
+	.loc 1 295 0
 	mov	w0, 3
-	b	.L14
+	b	.L15
 	.cfi_endproc
-.LFE213:
+.LFE215:
 	.size	get_wf_mode_index, .-get_wf_mode_index
 	.section	.text.get_lut_gray16_data,"ax",@progbits
 	.align	2
 	.type	get_lut_gray16_data, %function
 get_lut_gray16_data:
-.LFB222:
-	.loc 1 530 0
+.LFB224:
+	.loc 1 542 0
 	.cfi_startproc
-.LVL27:
+.LVL26:
 	stp	x29, x30, [sp, -48]!
 	.cfi_def_cfa_offset 48
 	.cfi_offset 29, -48
 	.cfi_offset 30, -40
-	.loc 1 536 0
+	.loc 1 548 0
 	mov	x2, 19200
-	.loc 1 530 0
+	.loc 1 542 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -32
 	.cfi_offset 20, -24
-	.loc 1 536 0
+	.loc 1 548 0
 	adrp	x19, gray_data
-	.loc 1 530 0
+	.loc 1 542 0
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -16
 	.cfi_offset 22, -8
-	.loc 1 536 0
+	.loc 1 548 0
 	add	x21, x19, :lo12:gray_data
-	.loc 1 530 0
+	.loc 1 542 0
 	mov	x22, x0
 	mov	w20, w1
-	.loc 1 536 0
+	.loc 1 548 0
 	mov	x0, x21
-.LVL28:
+.LVL27:
 	mov	w1, 0
-.LVL29:
+.LVL28:
 	bl	memset
-.LVL30:
+.LVL29:
 	adrp	x0, waveformdata
 	add	x0, x0, :lo12:waveformdata
 	mov	x4, 0
-.LVL31:
-.L47:
+.LVL30:
+.L48:
 	lsl	w8, w4, 1
-	.loc 1 530 0
+	.loc 1 542 0
 	mov	x3, 0
-	b	.L52
-.LVL32:
-.L48:
+	b	.L53
+.LVL31:
+.L49:
 .LBB46:
 .LBB47:
 	.loc 1 157 0
 	lsl	x2, x5, 10
 	add	x7, x21, x5, lsl 6
 	add	x5, x5, 1
-.LVL33:
+.LVL32:
 .LBE47:
 .LBE46:
-	.loc 1 541 0
+	.loc 1 553 0
 	ldrb	w2, [x1, x2]
 	lsl	w6, w2, w8
 	ldr	w2, [x7, x3]
 	orr	w2, w2, w6
 	str	w2, [x7, x3]
-.L50:
-.LVL34:
-	.loc 1 539 0 discriminator 1
+.L51:
+.LVL33:
+	.loc 1 551 0 discriminator 1
 	cmp	w20, w5
-	bgt	.L48
+	bgt	.L49
 	add	x3, x3, 4
-	.loc 1 538 0 discriminator 2
+	.loc 1 550 0 discriminator 2
 	cmp	x3, 64
-	beq	.L49
-.LVL35:
-.L52:
+	beq	.L50
+.LVL34:
+.L53:
 	add	x1, x4, x3, lsl 3
-	.loc 1 530 0
+	.loc 1 542 0
 	mov	x5, 0
 	add	x1, x1, x0
-	b	.L50
-.LVL36:
-.L49:
+	b	.L51
+.LVL35:
+.L50:
 	add	x4, x4, 1
-.LVL37:
-	.loc 1 537 0 discriminator 2
+.LVL36:
+	.loc 1 549 0 discriminator 2
 	cmp	x4, 16
-	bne	.L47
-	.loc 1 546 0
+	bne	.L48
+	.loc 1 558 0
 	lsl	w2, w20, 6
 	add	x1, x19, :lo12:gray_data
 	mov	x0, x22
 	sxtw	x2, w2
-	.loc 1 547 0
+	.loc 1 559 0
 	ldp	x19, x20, [sp, 16]
-.LVL38:
+.LVL37:
 	ldp	x21, x22, [sp, 32]
-.LVL39:
+.LVL38:
 	ldp	x29, x30, [sp], 48
 	.cfi_restore 30
 	.cfi_restore 29
@@ -496,59 +519,59 @@ get_lut_gray16_data:
 	.cfi_restore 19
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
-	.loc 1 546 0
+	.loc 1 558 0
 	b	memcpy
-.LVL40:
+.LVL39:
 	.cfi_endproc
-.LFE222:
+.LFE224:
 	.size	get_lut_gray16_data, .-get_lut_gray16_data
 	.section	.text.get_lut_gray2_data,"ax",@progbits
 	.align	2
 	.type	get_lut_gray2_data, %function
 get_lut_gray2_data:
-.LFB220:
-	.loc 1 485 0
+.LFB222:
+	.loc 1 497 0
 	.cfi_startproc
-.LVL41:
+.LVL40:
 	stp	x29, x30, [sp, -48]!
 	.cfi_def_cfa_offset 48
 	.cfi_offset 29, -48
 	.cfi_offset 30, -40
-	.loc 1 490 0
+	.loc 1 502 0
 	mov	x2, 2400
-	.loc 1 485 0
+	.loc 1 497 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -32
 	.cfi_offset 20, -24
-	.loc 1 490 0
+	.loc 1 502 0
 	adrp	x20, .LANCHOR2
 	add	x19, x20, :lo12:.LANCHOR2
-	.loc 1 485 0
+	.loc 1 497 0
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -16
 	.cfi_offset 22, -8
-	.loc 1 485 0
+	.loc 1 497 0
 	mov	x22, x0
 	mov	w21, w1
-	.loc 1 490 0
+	.loc 1 502 0
 	mov	x0, x19
-.LVL42:
+.LVL41:
 	mov	w1, 0
-.LVL43:
+.LVL42:
 	bl	memset
-.LVL44:
+.LVL43:
 	adrp	x3, waveformdata+15
 	add	x0, x19, 4
 	add	x3, x3, :lo12:waveformdata+15
-	.loc 1 491 0
+	.loc 1 503 0
 	mov	w2, 0
-.LVL45:
-.L55:
-	.loc 1 491 0 is_stmt 0 discriminator 1
+.LVL44:
+.L56:
+	.loc 1 503 0 is_stmt 0 discriminator 1
 	cmp	w2, w21
-	bge	.L56
+	bge	.L57
 	ldr	w1, [x0, -4]
 .LBB48:
 .LBB49:
@@ -558,10 +581,10 @@ get_lut_gray2_data:
 .LBE50:
 .LBE49:
 .LBE48:
-	.loc 1 491 0
+	.loc 1 503 0
 	mov	x4, 0
-.L57:
-.LVL46:
+.L58:
+.LVL45:
 .LBB53:
 .LBB52:
 .LBB51:
@@ -569,55 +592,55 @@ get_lut_gray2_data:
 	lsl	x5, x4, 5
 .LBE51:
 .LBE52:
-	.loc 1 496 0
+	.loc 1 508 0
 	lsl	w6, w4, 1
 	add	x4, x4, 1
-.LVL47:
+.LVL46:
 .LBE53:
-	.loc 1 493 0
+	.loc 1 505 0
 	cmp	x4, 16
 .LBB54:
-	.loc 1 496 0
+	.loc 1 508 0
 	ldrb	w5, [x7, x5]
 	lsl	w5, w5, w6
 	orr	w1, w1, w5
 .LBE54:
-	.loc 1 493 0
-	bne	.L57
+	.loc 1 505 0
+	bne	.L58
 	ldr	w4, [x0]
 	mov	x6, x3
 	str	w1, [x0, -4]
 	mov	w1, 0
-.L58:
+.L59:
 .LBB55:
-	.loc 1 496 0
+	.loc 1 508 0
 	ldrb	w5, [x6], 32
 	lsl	w5, w5, w1
 	add	w1, w1, 2
 	orr	w4, w4, w5
 .LBE55:
-	.loc 1 493 0
+	.loc 1 505 0
 	cmp	w1, 32
-	bne	.L58
+	bne	.L59
 	str	w4, [x0], 8
-.LVL48:
-	.loc 1 491 0 discriminator 1
+.LVL47:
+	.loc 1 503 0 discriminator 1
 	add	w2, w2, 1
-.LVL49:
+.LVL48:
 	add	x3, x3, 1024
-	b	.L55
-.LVL50:
-.L56:
-	.loc 1 501 0
+	b	.L56
+.LVL49:
+.L57:
+	.loc 1 513 0
 	lsl	w2, w21, 3
-.LVL51:
+.LVL50:
 	add	x1, x20, :lo12:.LANCHOR2
 	mov	x0, x22
 	sxtw	x2, w2
-	.loc 1 502 0
+	.loc 1 514 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-.LVL52:
+.LVL51:
 	ldp	x29, x30, [sp], 48
 	.cfi_restore 30
 	.cfi_restore 29
@@ -626,30 +649,30 @@ get_lut_gray2_data:
 	.cfi_restore 19
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
-	.loc 1 501 0
+	.loc 1 513 0
 	b	memcpy
-.LVL53:
+.LVL52:
 	.cfi_endproc
-.LFE220:
+.LFE222:
 	.size	get_lut_gray2_data, .-get_lut_gray2_data
 	.section	.text.decodewaveform,"ax",@progbits
 	.align	2
 	.global	decodewaveform
 	.type	decodewaveform, %function
 decodewaveform:
-.LFB210:
+.LFB212:
 	.loc 1 50 0
 	.cfi_startproc
-.LVL54:
+.LVL53:
 	.loc 1 58 0
 	cmp	w1, 32
 	ccmp	w1, 16, 4, ne
-	beq	.L65
+	beq	.L66
 	.loc 1 58 0 is_stmt 0 discriminator 1
 	cmp	w2, 32
 	ccmp	w2, 16, 4, ne
-	bne	.L81
-.L65:
+	bne	.L82
+.L66:
 	.loc 1 50 0 is_stmt 1
 	stp	x29, x30, [sp, -64]!
 	.cfi_def_cfa_offset 64
@@ -677,13 +700,13 @@ decodewaveform:
 	mov	x23, x0
 	.loc 1 61 0
 	mov	x2, 524288
-.LVL55:
+.LVL54:
 	mov	w1, 0
-.LVL56:
+.LVL55:
 	mov	x0, x24
-.LVL57:
+.LVL56:
 	bl	memset
-.LVL58:
+.LVL57:
 	.loc 1 118 0
 	mov	x5, x24
 	.loc 1 56 0
@@ -695,22 +718,22 @@ decodewaveform:
 	.loc 1 51 0
 	mov	w3, 0
 	mov	w6, 0
-.LVL59:
-.L67:
+.LVL58:
+.L68:
 	.loc 1 69 0
 	ldrb	w1, [x23, w0, uxtw]
 	cmp	w1, 255
-	beq	.L68
+	beq	.L69
 	.loc 1 74 0
 	cmp	w1, 252
-	bne	.L69
+	bne	.L70
 	.loc 1 75 0
 	eor	w10, w10, 1
-.LVL60:
+.LVL59:
 	.loc 1 76 0
 	add	w0, w0, 1
-.LVL61:
-.L69:
+.LVL60:
+.L70:
 	uxtw	x7, w3
 	add	w2, w3, 1
 	add	w12, w3, 3
@@ -721,12 +744,12 @@ decodewaveform:
 	uxtw	x4, w19
 	add	w3, w3, 4
 	.loc 1 79 0
-	cbz	w10, .L70
+	cbz	w10, .L71
 	.loc 1 82 0
 	lsl	x4, x4, 5
 	.loc 1 80 0
 	ldrb	w16, [x23, x13]
-.LVL62:
+.LVL61:
 	.loc 1 82 0
 	add	x7, x4, x7
 	.loc 1 83 0
@@ -747,7 +770,7 @@ decodewaveform:
 	strb	w13, [x7, x8]
 	.loc 1 83 0
 	strb	w14, [x2, x8]
-.LVL63:
+.LVL62:
 	.loc 1 84 0
 	add	x2, x4, x1, uxtw
 	add	x2, x5, x2, lsl 5
@@ -757,76 +780,76 @@ decodewaveform:
 	lsr	w1, w16, 6
 	.loc 1 84 0
 	strb	w15, [x2, x8]
-.LVL64:
+.LVL63:
 	.loc 1 85 0
 	strb	w1, [x4, x8]
-.LVL65:
+.LVL64:
 	.loc 1 89 0
-	bcc	.L71
-.LVL66:
+	bcc	.L72
+.LVL65:
 	.loc 1 91 0
 	add	w6, w6, 1
-.LVL67:
+.LVL66:
 	cmp	w21, w6
-	bhi	.L82
-.LVL68:
+	bhi	.L83
+.LVL67:
 	.loc 1 93 0
 	add	w19, w19, 1
-.LVL69:
+.LVL68:
 	.loc 1 90 0
 	mov	w3, 0
 	.loc 1 92 0
 	mov	w6, 0
-.LVL70:
-.L71:
+.LVL69:
+.L72:
 	.loc 1 97 0
 	ldrb	w4, [x23, w11, uxtw]
-.LVL71:
-.L72:
+.LVL70:
+.L73:
 	.loc 1 98 0 discriminator 1
-	cbnz	w4, .L74
+	cbnz	w4, .L75
 	.loc 1 113 0
 	add	w0, w0, 2
+.LVL71:
+	b	.L76
 .LVL72:
-	b	.L75
-.LVL73:
-.L84:
+.L85:
 	.loc 1 126 0
 	mov	w3, 0
-.LVL74:
-.L75:
+.LVL73:
+.L76:
 	.loc 1 64 0
 	cmp	w19, 511
-	bls	.L67
+	bls	.L68
 	.loc 1 65 0
 	adrp	x0, .LC2
-.LVL75:
+.LVL74:
 	add	x0, x0, :lo12:.LC2
 	bl	printf
-.LVL76:
-.L68:
+.LVL75:
+.L69:
 	.loc 1 135 0
 	cmp	w21, 32
 	ccmp	w20, 16, 0, eq
-	bne	.L76
+	bne	.L77
 	add	x22, x22, :lo12:waveformdata
 	mov	w0, 0
-.L77:
-.LVL77:
+.L78:
+.LVL76:
 	.loc 1 137 0 discriminator 1
 	cmp	w0, w19
-	bcc	.L85
-.LVL78:
-.L76:
+	bcc	.L86
+.LVL77:
+.L77:
 	.loc 1 152 0
 	mov	w0, w19
 	.loc 1 153 0
 	ldp	x19, x20, [sp, 16]
-.LVL79:
+.LVL78:
 	ldp	x21, x22, [sp, 32]
-.LVL80:
+.LVL79:
 	ldp	x23, x24, [sp, 48]
-.LVL81:
+.LVL80:
 	ldp	x29, x30, [sp], 64
 	.cfi_remember_state
 	.cfi_restore 30
@@ -839,14 +862,14 @@ decodewaveform:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL82:
-.L82:
+.LVL81:
+.L83:
 	.cfi_restore_state
 	.loc 1 90 0
 	mov	w3, 0
-	b	.L71
-.LVL83:
-.L74:
+	b	.L72
+.LVL82:
+.L75:
 	.loc 1 99 0
 	ubfiz	x11, x19, 5, 32
 	.loc 1 100 0
@@ -862,7 +885,7 @@ decodewaveform:
 	strb	w13, [x7, x2]
 	.loc 1 101 0
 	add	w7, w3, 3
-.LVL84:
+.LVL83:
 	.loc 1 100 0
 	strb	w14, [x8, x2]
 	.loc 1 101 0
@@ -870,56 +893,56 @@ decodewaveform:
 	add	x8, x11, x8
 	.loc 1 102 0
 	add	x7, x11, x7, uxtw
-.LVL85:
+.LVL84:
 	.loc 1 101 0
 	add	x8, x5, x8, lsl 5
 	.loc 1 102 0
 	add	x7, x5, x7, lsl 5
 	add	w3, w3, 4
-.LVL86:
+.LVL85:
 	.loc 1 104 0
 	cmp	w21, w3
 	.loc 1 101 0
 	strb	w15, [x8, x2]
-.LVL87:
+.LVL86:
 	.loc 1 102 0
 	strb	w1, [x7, x2]
 	.loc 1 104 0
-	bhi	.L73
-.LVL88:
+	bhi	.L74
+.LVL87:
 	.loc 1 106 0
 	add	w6, w6, 1
-.LVL89:
+.LVL88:
 	cmp	w21, w6
-	bhi	.L83
-.LVL90:
+	bhi	.L84
+.LVL89:
 	.loc 1 108 0
 	add	w19, w19, 1
-.LVL91:
+.LVL90:
 	.loc 1 105 0
 	mov	w3, 0
 	.loc 1 107 0
 	mov	w6, 0
-.LVL92:
-.L73:
+.LVL91:
+.L74:
 	.loc 1 98 0
 	sub	w4, w4, #1
-.LVL93:
+.LVL92:
 	and	w4, w4, 255
+.LVL93:
+	b	.L73
 .LVL94:
-	b	.L72
-.LVL95:
-.L83:
+.L84:
 	.loc 1 105 0
 	mov	w3, 0
-	b	.L73
-.LVL96:
-.L70:
+	b	.L74
+.LVL95:
+.L71:
 	.loc 1 118 0
 	lsl	x4, x4, 5
 	.loc 1 116 0
 	ldrb	w0, [x23, x13]
-.LVL97:
+.LVL96:
 	.loc 1 118 0
 	add	x7, x4, x7
 	.loc 1 119 0
@@ -943,80 +966,80 @@ decodewaveform:
 	.loc 1 119 0
 	ubfx	x7, x0, 2, 2
 	strb	w7, [x2, x8]
-.LVL98:
+.LVL97:
 	.loc 1 120 0
 	ubfx	x2, x0, 4, 2
 	strb	w2, [x1, x8]
-.LVL99:
+.LVL98:
 	.loc 1 121 0
 	lsr	w0, w0, 6
-.LVL100:
+.LVL99:
 	strb	w0, [x4, x8]
 	.loc 1 125 0
 	cmp	w3, w21
 	.loc 1 123 0
 	mov	w0, w11
-.LVL101:
+.LVL100:
 	.loc 1 125 0
-	bcc	.L75
-.LVL102:
+	bcc	.L76
+.LVL101:
 	.loc 1 127 0
 	add	w6, w6, 1
-.LVL103:
+.LVL102:
 	cmp	w21, w6
-	bhi	.L84
-.LVL104:
+	bhi	.L85
+.LVL103:
 	.loc 1 129 0
 	add	w19, w19, 1
-.LVL105:
+.LVL104:
 	.loc 1 126 0
 	mov	w3, 0
 	.loc 1 128 0
 	mov	w6, 0
-	b	.L75
-.LVL106:
-.L85:
+	b	.L76
+.LVL105:
+.L86:
 	.loc 1 145 0
 	sbfiz	x5, x0, 5, 32
 	mov	x2, 0
-.L80:
-.LVL107:
+.L81:
+.LVL106:
 	and	x1, x2, 2147483647
 	add	x4, x2, x0, uxtw 4
 	add	x1, x5, x1
 	add	x4, x22, x4, lsl 6
 	add	x1, x22, x1, lsl 5
 	mov	x3, 0
-.LVL108:
-.L78:
+.LVL107:
+.L79:
 	.loc 1 144 0 discriminator 3
 	lsl	x6, x3, 1
 	ldrb	w7, [x4, x6]
-.LVL109:
+.LVL108:
 	.loc 1 145 0 discriminator 3
 	and	x6, x3, 2147483647
 	add	x3, x3, 1
-.LVL110:
+.LVL109:
 	.loc 1 139 0 discriminator 3
 	cmp	x3, 16
 	.loc 1 145 0 discriminator 3
 	strb	w7, [x1, x6]
 	.loc 1 139 0 discriminator 3
-	bne	.L78
-.LVL111:
+	bne	.L79
+.LVL110:
 	add	x2, x2, 1
-.LVL112:
+.LVL111:
 	.loc 1 138 0 discriminator 2
 	cmp	x2, 16
-	bne	.L80
+	bne	.L81
 	.loc 1 137 0 discriminator 2
 	add	w0, w0, 1
-.LVL113:
+.LVL112:
 	and	w0, w0, 255
+.LVL113:
+	b	.L78
 .LVL114:
-	b	.L77
-.LVL115:
-.L81:
+.L82:
 	.cfi_def_cfa 31, 0
 	.cfi_restore 19
 	.cfi_restore 20
@@ -1028,67 +1051,67 @@ decodewaveform:
 	.cfi_restore 30
 	.loc 1 59 0
 	mov	w0, -22
-.LVL116:
+.LVL115:
 	ret
 	.cfi_endproc
-.LFE210:
+.LFE212:
 	.size	decodewaveform, .-decodewaveform
 	.section	.text.get_wf_frm_num,"ax",@progbits
 	.align	2
 	.type	get_wf_frm_num, %function
 get_wf_frm_num:
-.LFB215:
-	.loc 1 330 0
+.LFB217:
+	.loc 1 341 0
 	.cfi_startproc
-.LVL117:
+.LVL116:
 	stp	x29, x30, [sp, -16]!
 	.cfi_def_cfa_offset 16
 	.cfi_offset 29, -16
 	.cfi_offset 30, -8
-	.loc 1 331 0
+	.loc 1 342 0
 	adrp	x3, .LANCHOR0
-	.loc 1 330 0
+	.loc 1 341 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	.loc 1 331 0
+	.loc 1 342 0
 	ldr	x4, [x3, #:lo12:.LANCHOR0]
-.LVL118:
-	.loc 1 336 0
+.LVL117:
+	.loc 1 347 0
 	ldrb	w3, [x4, 32]
 	add	w0, w3, w0, lsl 2
-.LVL119:
-	.loc 1 338 0
+.LVL118:
+	.loc 1 349 0
 	sxtw	x0, w0
 	ldrb	w8, [x4, x0]
-.LVL120:
-	.loc 1 339 0
+.LVL119:
+	.loc 1 350 0
 	add	x0, x4, x0
-.LVL121:
+.LVL120:
 	ldrb	w5, [x0, 1]
-.LVL122:
-	.loc 1 340 0
+.LVL121:
+	.loc 1 351 0
 	ldrb	w6, [x0, 2]
-.LVL123:
-	.loc 1 341 0
+.LVL122:
+	.loc 1 352 0
 	ldrb	w3, [x0, 3]
-	.loc 1 342 0
+	.loc 1 353 0
 	add	w0, w5, w6
 	add	w0, w0, w8
 	cmp	w3, w0, uxtb
-	beq	.L101
-	.loc 1 343 0
-	mov	w2, 343
-.LVL124:
-.L111:
-	.loc 1 357 0
+	beq	.L102
+	.loc 1 354 0
+	mov	w2, 354
+.LVL123:
+.L112:
+	.loc 1 368 0
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC3
 	add	x1, x1, :lo12:.LANCHOR3
 	add	x0, x0, :lo12:.LC3
 	bl	printf
-.LVL125:
-.L100:
-	.loc 1 379 0
+.LVL124:
+.L101:
+	.loc 1 391 0
 	mov	w0, -22
 	ldp	x29, x30, [sp], 16
 	.cfi_remember_state
@@ -1096,96 +1119,97 @@ get_wf_frm_num:
 	.cfi_restore 29
 	.cfi_def_cfa 31, 0
 	ret
-.LVL126:
-.L101:
+.LVL125:
+.L102:
 	.cfi_restore_state
-	.loc 1 347 0
+	.loc 1 358 0
 	lsl	w3, w6, 16
 	orr	w3, w3, w5, lsl 8
 	orr	w3, w3, w8
-.LVL127:
-	.loc 1 349 0
+.LVL126:
+	.loc 1 360 0
 	add	w3, w3, w1, lsl 2
-.LVL128:
-	.loc 1 351 0
+.LVL127:
+	.loc 1 362 0
 	sxtw	x3, w3
 	ldrb	w6, [x4, x3]
-.LVL129:
-	.loc 1 352 0
+.LVL128:
+	.loc 1 363 0
 	add	x3, x4, x3
-.LVL130:
+.LVL129:
 	ldrb	w1, [x3, 1]
-.LVL131:
-	.loc 1 353 0
+.LVL130:
+	.loc 1 364 0
 	ldrb	w5, [x3, 2]
-.LVL132:
-	.loc 1 354 0
+.LVL131:
+	.loc 1 365 0
 	ldrb	w0, [x3, 3]
-	.loc 1 356 0
+	.loc 1 367 0
 	add	w3, w1, w5
 	add	w3, w3, w6
 	cmp	w0, w3, uxtb
-	beq	.L103
-	.loc 1 357 0
-	mov	w2, 357
+	beq	.L104
+	.loc 1 368 0
+	mov	w2, 368
+.LVL132:
+	b	.L112
 .LVL133:
-	b	.L111
-.LVL134:
-.L103:
-	.loc 1 361 0
+.L104:
+	.loc 1 372 0
 	lsl	w0, w5, 16
 	mov	w7, w2
 	orr	w0, w0, w1, lsl 8
 	ldrb	w1, [x4, 16]
-.LVL135:
+.LVL134:
 	orr	w0, w0, w6
-.LVL136:
+.LVL135:
 	sub	w1, w1, #22
 	and	w1, w1, 255
-	cmp	w1, 45
-	bhi	.L104
+	cmp	w1, 50
+	bhi	.L105
 	mov	x3, 1
 	lsl	x1, x3, x1
 	mov	x3, 1037
 	movk	x3, 0x2000, lsl 32
+	movk	x3, 0x4, lsl 48
 	tst	x1, x3
-	beq	.L104
-	.loc 1 369 0
+	beq	.L105
+	.loc 1 381 0
 	mov	w1, 32
-.LVL137:
-.L112:
-	.loc 1 379 0
+.LVL136:
+.L113:
+	.loc 1 391 0
 	ldp	x29, x30, [sp], 16
 	.cfi_remember_state
 	.cfi_restore 30
 	.cfi_restore 29
 	.cfi_def_cfa 31, 0
-	.loc 1 374 0
+	.loc 1 386 0
 	add	x0, x4, x0
-.LVL138:
+.LVL137:
 	b	decodewaveform
-.LVL139:
-.L104:
+.LVL138:
+.L105:
 	.cfi_restore_state
-	.loc 1 372 0
+	.loc 1 384 0
 	cmp	w7, 32
-	beq	.L100
-	.loc 1 374 0
+	beq	.L101
+	.loc 1 386 0
 	mov	w2, 16
-.LVL140:
+.LVL139:
 	mov	w1, w2
-	b	.L112
+	b	.L113
 	.cfi_endproc
-.LFE215:
+.LFE217:
 	.size	get_wf_frm_num, .-get_wf_frm_num
 	.section	.text.parse_wf_gray16_with_lut_type,"ax",@progbits
 	.align	2
 	.type	parse_wf_gray16_with_lut_type, %function
 parse_wf_gray16_with_lut_type:
-.LFB227:
-	.loc 1 638 0
+.LFB229:
+	.loc 1 650 0
 	.cfi_startproc
-.LVL141:
+.LVL140:
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
@@ -1195,52 +1219,52 @@ parse_wf_gray16_with_lut_type:
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -16
 	.cfi_offset 20, -8
-	.loc 1 638 0
+	.loc 1 650 0
 	mov	x20, x0
 	mov	w19, w1
-	.loc 1 642 0
+	.loc 1 654 0
 	mov	w0, w2
-.LVL142:
+.LVL141:
 	bl	get_wf_mode_index
-.LVL143:
-	.loc 1 643 0
+.LVL142:
+	.loc 1 655 0
 	mov	w1, w19
 	mov	w2, 16
 	bl	get_wf_frm_num
-.LVL144:
-	.loc 1 645 0
+.LVL143:
+	.loc 1 657 0
 	str	w0, [x20]
-	.loc 1 643 0
+	.loc 1 655 0
 	mov	w19, w0
-.LVL145:
-	.loc 1 646 0
+.LVL144:
+	.loc 1 658 0
 	lsl	w0, w0, 6
-.LVL146:
+.LVL145:
 .LBB56:
 .LBB57:
 	.file 2 "include/linux/compat.h"
 	.loc 2 58 0
 	mov	w1, 32768
 	sxtw	x0, w0
-.LVL147:
+.LVL146:
 	bl	kmalloc
-.LVL148:
+.LVL147:
 .LBE57:
 .LBE56:
-	.loc 1 646 0
+	.loc 1 658 0
 	str	x0, [x20, 8]
-	.loc 1 647 0
-	cbz	x0, .L115
-	.loc 1 650 0
+	.loc 1 659 0
+	cbz	x0, .L116
+	.loc 1 662 0
 	mov	w1, w19
 	bl	get_lut_gray16_data
-.LVL149:
-	.loc 1 652 0
+.LVL148:
+	.loc 1 664 0
 	mov	w0, 0
-.L113:
-	.loc 1 653 0
+.L114:
+	.loc 1 665 0
 	ldp	x19, x20, [sp, 16]
-.LVL150:
+.LVL149:
 	ldp	x29, x30, [sp], 32
 	.cfi_remember_state
 	.cfi_restore 30
@@ -1249,23 +1273,23 @@ parse_wf_gray16_with_lut_type:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL151:
-.L115:
+.LVL150:
+.L116:
 	.cfi_restore_state
-	.loc 1 648 0
+	.loc 1 660 0
 	mov	w0, -12
-	b	.L113
+	b	.L114
 	.cfi_endproc
-.LFE227:
+.LFE229:
 	.size	parse_wf_gray16_with_lut_type, .-parse_wf_gray16_with_lut_type
 	.section	.text.parse_wf_gray2,"ax",@progbits
 	.align	2
 	.type	parse_wf_gray2, %function
 parse_wf_gray2:
-.LFB224:
-	.loc 1 576 0
+.LFB226:
+	.loc 1 588 0
 	.cfi_startproc
-.LVL152:
+.LVL151:
 	stp	x29, x30, [sp, -48]!
 	.cfi_def_cfa_offset 48
 	.cfi_offset 29, -48
@@ -1278,47 +1302,47 @@ parse_wf_gray2:
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -32
 	.cfi_offset 20, -24
-	.loc 1 581 0
+	.loc 1 593 0
 	mov	w0, 4
-.LVL153:
-	.loc 1 576 0
+.LVL152:
+	.loc 1 588 0
 	mov	w19, w1
-	.loc 1 581 0
+	.loc 1 593 0
 	bl	get_wf_mode_index
-.LVL154:
-	.loc 1 582 0
+.LVL153:
+	.loc 1 594 0
 	mov	w1, w19
 	mov	w2, 16
 	bl	get_wf_frm_num
-.LVL155:
-	.loc 1 584 0
+.LVL154:
+	.loc 1 596 0
 	str	w0, [x21]
-	.loc 1 582 0
+	.loc 1 594 0
 	mov	w19, w0
-.LVL156:
-	.loc 1 585 0
+.LVL155:
+	.loc 1 597 0
 	lsl	w0, w0, 3
-.LVL157:
+.LVL156:
 .LBB66:
 .LBB67:
 	.loc 2 58 0
 	mov	w1, 32768
 	sxtw	x0, w0
-.LVL158:
+.LVL157:
 	bl	kmalloc
-.LVL159:
+.LVL158:
 .LBE67:
 .LBE66:
-	.loc 1 586 0
-	cbz	x0, .L123
+	.loc 1 598 0
+	cbz	x0, .L124
 	mov	x20, x0
-	.loc 1 589 0
+	.loc 1 601 0
 	mov	w1, w19
 	bl	get_lut_gray2_data
-.LVL160:
-	.loc 1 593 0
+.LVL159:
+	.loc 1 605 0
 	str	w19, [x21]
-.LVL161:
+.LVL160:
 .LBB68:
 .LBB69:
 .LBB70:
@@ -1326,44 +1350,44 @@ parse_wf_gray2:
 	.loc 2 58 0
 	mov	w1, 32768
 	lsl	w0, w19, 6
-.LVL162:
+.LVL161:
 	bl	kmalloc
-.LVL163:
+.LVL162:
 .LBE71:
 .LBE70:
-	.loc 1 426 0
-	cbz	x0, .L124
+	.loc 1 438 0
+	cbz	x0, .L125
 	mov	x5, x0
 	mov	x4, x20
 	mov	w3, 0
+.LVL163:
+.L121:
+	.loc 1 441 0
+	cmp	w19, w3
+	bgt	.L123
 .LVL164:
 .L120:
-	.loc 1 429 0
-	cmp	w19, w3
-	bgt	.L122
-.LVL165:
-.L119:
 .LBE69:
 .LBE68:
-	.loc 1 594 0
+	.loc 1 606 0
 	str	x0, [x21, 8]
-.LVL166:
+.LVL165:
 .LBB73:
 .LBB74:
 	.loc 2 81 0
 	mov	x0, x20
 	bl	free
-.LVL167:
+.LVL166:
 .LBE74:
 .LBE73:
-	.loc 1 598 0
+	.loc 1 610 0
 	mov	w0, 0
-.L117:
-	.loc 1 599 0
+.L118:
+	.loc 1 611 0
 	ldp	x19, x20, [sp, 16]
-.LVL168:
+.LVL167:
 	ldr	x21, [sp, 32]
-.LVL169:
+.LVL168:
 	ldp	x29, x30, [sp], 48
 	.cfi_remember_state
 	.cfi_restore 30
@@ -1373,84 +1397,84 @@ parse_wf_gray2:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL170:
-.L122:
+.LVL169:
+.L123:
 	.cfi_restore_state
 .LBB75:
 .LBB72:
-	.loc 1 430 0
+	.loc 1 442 0
 	ldr	w8, [x4], 8
-.LVL171:
-	.loc 1 431 0
+.LVL170:
+	.loc 1 443 0
 	mov	x2, 0
 	ldr	w7, [x4, -4]
-.LVL172:
-.L121:
+.LVL171:
+.L122:
 	lsl	w1, w2, 1
-.LVL173:
-	.loc 1 434 0
+.LVL172:
+	.loc 1 446 0
 	asr	w6, w8, w1
 	and	w6, w6, 3
-	.loc 1 435 0
+	.loc 1 447 0
 	asr	w1, w7, w1
-.LVL174:
-	.loc 1 436 0
+.LVL173:
+	.loc 1 448 0
 	orr	w1, w6, w1, lsl 30
-	.loc 1 437 0
+	.loc 1 449 0
 	str	w1, [x5, x2, lsl 2]
-.LVL175:
+.LVL174:
 	add	x2, x2, 1
-.LVL176:
-	.loc 1 433 0
+.LVL175:
+	.loc 1 445 0
 	cmp	x2, 16
-	bne	.L121
-	.loc 1 429 0
+	bne	.L122
+	.loc 1 441 0
 	add	w3, w3, 1
-.LVL177:
+.LVL176:
 	add	x5, x5, 64
+	b	.L121
+.LVL177:
+.L125:
+	.loc 1 439 0
+	mov	x0, 0
 	b	.L120
 .LVL178:
 .L124:
-	.loc 1 427 0
-	mov	x0, 0
-	b	.L119
-.LVL179:
-.L123:
 .LBE72:
 .LBE75:
-	.loc 1 587 0
+	.loc 1 599 0
 	mov	w0, -12
-	b	.L117
+	b	.L118
 	.cfi_endproc
-.LFE224:
+.LFE226:
 	.size	parse_wf_gray2, .-parse_wf_gray2
 	.section	.text.pvi_wf_get_lut,"ax",@progbits
 	.align	2
 	.global	pvi_wf_get_lut
 	.type	pvi_wf_get_lut, %function
 pvi_wf_get_lut:
-.LFB230:
-	.loc 1 715 0
+.LFB232:
+	.loc 1 727 0
 	.cfi_startproc
-.LVL180:
-	.loc 1 721 0
+.LVL179:
+	.loc 1 733 0
 	adrp	x3, .LANCHOR0
 	ldr	x4, [x3, #:lo12:.LANCHOR0]
-	cbz	x4, .L171
-	.loc 1 724 0
-	cbz	x0, .L172
-	.loc 1 728 0
+	cbz	x4, .L172
+	.loc 1 736 0
+	cbz	x0, .L173
+	.loc 1 740 0
 	adrp	x3, .LANCHOR4
 	ldr	w5, [x3, #:lo12:.LANCHOR4]
 	cmp	w5, w2
 	adrp	x5, .LANCHOR5
-	bne	.L129
-	.loc 1 728 0 is_stmt 0 discriminator 1
+	bne	.L130
+	.loc 1 740 0 is_stmt 0 discriminator 1
 	ldr	w6, [x5, #:lo12:.LANCHOR5]
 	cmp	w6, w1
-	beq	.L173
-.L129:
-	.loc 1 715 0 is_stmt 1
+	beq	.L174
+.L130:
+	.loc 1 727 0 is_stmt 1
 	stp	x29, x30, [sp, -80]!
 	.cfi_def_cfa_offset 80
 	.cfi_offset 29, -80
@@ -1468,160 +1492,160 @@ pvi_wf_get_lut:
 	.cfi_offset 23, -32
 	.cfi_offset 24, -24
 	.cfi_offset 25, -16
-	.loc 1 731 0
+	.loc 1 743 0
 	str	w2, [x3, #:lo12:.LANCHOR4]
 .LBB121:
 .LBB122:
-	.loc 1 312 0
+	.loc 1 323 0
 	mov	x3, 0
 	ldrb	w20, [x4, 38]
 .LBE122:
 .LBE121:
-	.loc 1 732 0
+	.loc 1 744 0
 	str	w1, [x5, #:lo12:.LANCHOR5]
-.LVL181:
-.L130:
+.LVL180:
+.L131:
 	mov	w5, w3
-.LVL182:
+.LVL181:
 .LBB125:
 .LBB123:
-	.loc 1 316 0
+	.loc 1 327 0
 	cmp	w20, w3
-	bgt	.L132
-	.loc 1 323 0
+	bgt	.L133
+	.loc 1 334 0
 	cmp	w20, w3
-	bne	.L174
-	.loc 1 324 0
+	bne	.L175
+	.loc 1 335 0
 	sub	w20, w20, #1
+.LVL182:
+	b	.L132
 .LVL183:
-	b	.L131
-.LVL184:
-.L132:
-	.loc 1 317 0
+.L133:
+	.loc 1 328 0
 	add	x6, x4, x3
 	add	x3, x3, 1
-.LVL185:
+.LVL184:
 	ldrb	w6, [x6, 48]
 	cmp	w2, w6
-	bge	.L130
-	.loc 1 318 0
+	bge	.L131
+	.loc 1 329 0
 	sub	w20, w5, #1
-.LVL186:
-.L131:
+.LVL185:
+.L132:
 	mov	x19, x0
-.LVL187:
+.LVL186:
 .LBE123:
 .LBE125:
-	.loc 1 737 0
+	.loc 1 749 0
 	ldr	x0, [x0, 8]
-.LVL188:
+.LVL187:
 	mov	w21, w1
-	cbz	x0, .L133
-.LVL189:
+	cbz	x0, .L134
+.LVL188:
 .LBB126:
 .LBB127:
 	.loc 2 81 0
 	bl	free
-.LVL190:
+.LVL189:
 .LBE127:
 .LBE126:
-	.loc 1 739 0
+	.loc 1 751 0
 	str	xzr, [x19, 8]
-.L133:
-	.loc 1 743 0
+.L134:
+	.loc 1 755 0
 	sub	w1, w21, #1
 	cmp	w1, 11
-	bhi	.L157
-	adrp	x0, .L135
-	add	x0, x0, :lo12:.L135
+	bhi	.L158
+	adrp	x0, .L136
+	add	x0, x0, :lo12:.L136
 	ldrh	w0, [x0,w1,uxtw #1]
-	adr	x1, .Lrtx135
+	adr	x1, .Lrtx136
 	add	x0, x1, w0, sxth #2
 	br	x0
-.Lrtx135:
+.Lrtx136:
 	.section	.rodata.pvi_wf_get_lut,"a",@progbits
 	.align	0
 	.align	2
-.L135:
-	.2byte	(.L134 - .Lrtx135) / 4
-	.2byte	(.L136 - .Lrtx135) / 4
-	.2byte	(.L137 - .Lrtx135) / 4
-	.2byte	(.L201 - .Lrtx135) / 4
-	.2byte	(.L139 - .Lrtx135) / 4
-	.2byte	(.L140 - .Lrtx135) / 4
-	.2byte	(.L141 - .Lrtx135) / 4
-	.2byte	(.L142 - .Lrtx135) / 4
-	.2byte	(.L143 - .Lrtx135) / 4
-	.2byte	(.L144 - .Lrtx135) / 4
-	.2byte	(.L145 - .Lrtx135) / 4
-	.2byte	(.L146 - .Lrtx135) / 4
+.L136:
+	.2byte	(.L135 - .Lrtx136) / 4
+	.2byte	(.L137 - .Lrtx136) / 4
+	.2byte	(.L138 - .Lrtx136) / 4
+	.2byte	(.L202 - .Lrtx136) / 4
+	.2byte	(.L140 - .Lrtx136) / 4
+	.2byte	(.L141 - .Lrtx136) / 4
+	.2byte	(.L142 - .Lrtx136) / 4
+	.2byte	(.L143 - .Lrtx136) / 4
+	.2byte	(.L144 - .Lrtx136) / 4
+	.2byte	(.L145 - .Lrtx136) / 4
+	.2byte	(.L146 - .Lrtx136) / 4
+	.2byte	(.L147 - .Lrtx136) / 4
 	.section	.text.pvi_wf_get_lut
-.LVL191:
-.L174:
+.LVL190:
+.L175:
 .LBB128:
 .LBB124:
-	.loc 1 313 0
+	.loc 1 324 0
 	mov	w20, -1
+.LVL191:
+	b	.L132
 .LVL192:
-	b	.L131
-.LVL193:
-.L134:
+.L135:
 .LBE124:
 .LBE128:
 .LBB129:
 .LBB130:
-	.loc 1 555 0
+	.loc 1 567 0
 	mov	w0, 1
 	bl	get_wf_mode_index
-.LVL194:
-	.loc 1 556 0
+.LVL193:
+	.loc 1 568 0
 	mov	w1, w20
 	mov	w2, 16
 	bl	get_wf_frm_num
-.LVL195:
-	.loc 1 558 0
+.LVL194:
+	.loc 1 570 0
 	add	w21, w0, 3
-.LVL196:
+.LVL195:
 	mov	w20, 4
-.LVL197:
-	.loc 1 556 0
+.LVL196:
+	.loc 1 568 0
 	mov	w22, w0
-.LVL198:
+.LVL197:
 .LBB131:
 .LBB132:
 	.loc 2 58 0
 	mov	w1, 32768
 .LBE132:
 .LBE131:
-	.loc 1 558 0
+	.loc 1 570 0
 	sdiv	w20, w21, w20
 	sxtw	x20, w20
-.LVL199:
+.LVL198:
 .LBB134:
 .LBB133:
 	.loc 2 58 0
 	mov	x0, x20
-.LVL200:
+.LVL199:
 	bl	kmalloc
-.LVL201:
+.LVL200:
 	mov	x24, x0
-.LVL202:
+.LVL201:
 .LBE133:
 .LBE134:
-	.loc 1 559 0
-	cbz	x0, .L157
-.LVL203:
+	.loc 1 571 0
+	cbz	x0, .L158
+.LVL202:
 .LBB135:
 .LBB136:
-	.loc 1 475 0
+	.loc 1 487 0
 	adrp	x25, .LANCHOR6
 	add	x23, x25, :lo12:.LANCHOR6
 	mov	x2, 1200
 	mov	w1, 0
 	mov	x0, x23
-.LVL204:
+.LVL203:
 	bl	memset
-.LVL205:
+.LVL204:
 .LBB137:
 .LBB138:
 	.loc 1 157 0
@@ -1629,64 +1653,64 @@ pvi_wf_get_lut:
 	add	x4, x4, :lo12:waveformdata
 .LBE138:
 .LBE137:
-	.loc 1 475 0
+	.loc 1 487 0
 	mov	x3, 0
-	.loc 1 478 0
+	.loc 1 490 0
 	mov	w5, 16
-.LVL206:
-.L148:
+.LVL205:
+.L149:
 	mov	w2, w3
-.LVL207:
-	.loc 1 476 0
+.LVL206:
+	.loc 1 488 0
 	cmp	w22, w3
-	bgt	.L149
-	.loc 1 481 0
+	bgt	.L150
+	.loc 1 493 0
 	mov	x2, x20
-.LVL208:
+.LVL207:
 	add	x1, x25, :lo12:.LANCHOR6
 	mov	x0, x24
 	bl	memcpy
-.LVL209:
+.LVL208:
 .LBE136:
 .LBE135:
-	.loc 1 566 0
+	.loc 1 578 0
 	str	w22, [x19]
-.LVL210:
+.LVL209:
 .LBB142:
 .LBB143:
-	.loc 1 389 0
+	.loc 1 401 0
 	lsr	w21, w21, 2
-.LVL211:
+.LVL210:
 .LBB144:
 .LBB145:
 	.loc 2 58 0
 	mov	w1, 32768
 	lsl	w0, w22, 10
 	bl	kmalloc
-.LVL212:
+.LVL211:
 .LBE145:
 .LBE144:
-	.loc 1 393 0
-	cbz	x0, .L176
+	.loc 1 405 0
+	cbz	x0, .L177
 	mov	x2, 0
+.LVL212:
+.L152:
+	.loc 1 408 0
+	cmp	w21, w2
+	bgt	.L156
 .LVL213:
 .L151:
-	.loc 1 396 0
-	cmp	w21, w2
-	bgt	.L155
-.LVL214:
-.L150:
 .LBE143:
 .LBE142:
-	.loc 1 568 0
+	.loc 1 580 0
 	str	x0, [x19, 8]
-.LVL215:
+.LVL214:
 .LBB148:
 .LBB149:
 	.loc 2 81 0
 	mov	x0, x24
-.LVL216:
-.L204:
+.LVL215:
+.L205:
 .LBE149:
 .LBE148:
 .LBE130:
@@ -1696,10 +1720,10 @@ pvi_wf_get_lut:
 .LBB155:
 .LBB156:
 	bl	free
+.LVL216:
+	b	.L201
 .LVL217:
-	b	.L200
-.LVL218:
-.L149:
+.L150:
 .LBE156:
 .LBE155:
 .LBE154:
@@ -1708,7 +1732,7 @@ pvi_wf_get_lut:
 .LBB152:
 .LBB150:
 .LBB141:
-	.loc 1 478 0
+	.loc 1 490 0
 	sdiv	w1, w3, w5
 .LBB140:
 .LBB139:
@@ -1716,13 +1740,13 @@ pvi_wf_get_lut:
 	lsl	x0, x3, 10
 .LBE139:
 .LBE140:
-	.loc 1 478 0
+	.loc 1 490 0
 	negs	w2, w2
-.LVL219:
+.LVL218:
 	and	w6, w3, 15
 	and	w2, w2, 15
 	add	x3, x3, 1
-.LVL220:
+.LVL219:
 	ldrb	w0, [x0, x4]
 	csneg	w2, w6, w2, mi
 	sxtw	x1, w1
@@ -1731,150 +1755,150 @@ pvi_wf_get_lut:
 	ldr	w0, [x23, x1, lsl 2]
 	orr	w2, w2, w0
 	str	w2, [x23, x1, lsl 2]
-	b	.L148
-.LVL221:
-.L155:
+	b	.L149
+.LVL220:
+.L156:
 .LBE141:
 .LBE150:
 .LBB151:
 .LBB147:
-	.loc 1 397 0
+	.loc 1 409 0
 	ldr	w6, [x24, x2, lsl 2]
-.LVL222:
+.LVL221:
 	lsl	x7, x2, 8
 	mov	x3, 0
-.LVL223:
-.L154:
+.LVL222:
+.L155:
 .LBB146:
-	.loc 1 399 0
+	.loc 1 411 0
 	lsl	w1, w3, 1
 	mov	w4, 0
 	asr	w1, w6, w1
 	and	w1, w1, 3
-.LVL224:
-	.loc 1 400 0
+.LVL223:
+	.loc 1 412 0
 	mov	w5, w1
-.LVL225:
-.L152:
-	.loc 1 403 0
+.LVL224:
+.L153:
+	.loc 1 415 0
 	lsl	w8, w1, w4
 	add	w4, w4, 2
 	orr	w5, w5, w8
-.LVL226:
-	.loc 1 402 0
+.LVL225:
+	.loc 1 414 0
 	cmp	w4, 32
-	bne	.L152
+	bne	.L153
 	add	x4, x7, x3, lsl 4
 	mov	x1, 0
-.LVL227:
+.LVL226:
 	add	x4, x0, x4, lsl 2
-.LVL228:
-.L153:
-	.loc 1 406 0
+.LVL227:
+.L154:
+	.loc 1 418 0
 	str	w5, [x4, x1, lsl 2]
-.LVL229:
+.LVL228:
 	add	x1, x1, 1
-.LVL230:
-	.loc 1 405 0
+.LVL229:
+	.loc 1 417 0
 	cmp	x1, 16
-	bne	.L153
-.LVL231:
+	bne	.L154
+.LVL230:
 	add	x3, x3, 1
-.LVL232:
+.LVL231:
 .LBE146:
-	.loc 1 398 0
+	.loc 1 410 0
 	cmp	x3, 16
-	bne	.L154
-.LVL233:
+	bne	.L155
+.LVL232:
 	add	x2, x2, 1
+.LVL233:
+	b	.L152
 .LVL234:
+.L177:
+	.loc 1 406 0
+	mov	x0, 0
 	b	.L151
 .LVL235:
-.L176:
-	.loc 1 394 0
-	mov	x0, 0
-	b	.L150
-.LVL236:
-.L136:
+.L137:
 .LBE147:
 .LBE151:
 .LBE152:
 .LBE176:
 .LBB177:
 .LBB178:
-	.loc 1 624 0
+	.loc 1 636 0
 	mov	w0, 2
 	bl	get_wf_mode_index
-.LVL237:
-	.loc 1 625 0
+.LVL236:
+	.loc 1 637 0
 	mov	w1, w20
 	mov	w2, 16
 	bl	get_wf_frm_num
-.LVL238:
+.LVL237:
 	mov	w20, w0
-.LVL239:
-	.loc 1 627 0
+.LVL238:
+	.loc 1 639 0
 	str	w20, [x19]
-.LVL240:
-	.loc 1 628 0
+.LVL239:
+	.loc 1 640 0
 	lsl	w0, w0, 6
-.LVL241:
+.LVL240:
 .LBB179:
 .LBB180:
 	.loc 2 58 0
 	mov	w1, 32768
 	sxtw	x0, w0
-.LVL242:
+.LVL241:
 	bl	kmalloc
-.LVL243:
+.LVL242:
 .LBE180:
 .LBE179:
-	.loc 1 628 0
+	.loc 1 640 0
 	str	x0, [x19, 8]
-	.loc 1 629 0
-	cbnz	x0, .L156
-.LVL244:
-.L157:
+	.loc 1 641 0
+	cbnz	x0, .L157
+.LVL243:
+.L158:
 .LBE178:
 .LBE177:
-	.loc 1 799 0
+	.loc 1 811 0
 	mov	w0, -1
-	b	.L127
-.LVL245:
-.L156:
+	b	.L128
+.LVL244:
+.L157:
 .LBB182:
 .LBB181:
-	.loc 1 632 0
+	.loc 1 644 0
 	mov	w1, w20
-.LVL246:
-.L205:
+.LVL245:
+.L206:
 .LBE181:
 .LBE182:
 .LBB183:
 .LBB184:
-	.loc 1 671 0
+	.loc 1 683 0
 	bl	get_lut_gray16_data
+.LVL246:
+	b	.L201
 .LVL247:
-	b	.L200
-.LVL248:
-.L141:
+.L142:
 .LBE184:
 .LBE183:
-	.loc 1 757 0
+	.loc 1 769 0
 	mov	w2, 7
-.L203:
-	.loc 1 781 0
+.L204:
+	.loc 1 793 0
 	mov	w1, w20
 	mov	x0, x19
 	bl	parse_wf_gray16_with_lut_type
-.LVL249:
-.L202:
-	.loc 1 804 0
+.LVL248:
+.L203:
+	.loc 1 816 0
 	cmp	w0, 0
 	csetm	w0, ne
-.LVL250:
-.L127:
-	.loc 1 817 0
+.LVL249:
+.L128:
+	.loc 1 829 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -1892,301 +1916,301 @@ pvi_wf_get_lut:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL251:
-.L142:
+.LVL250:
+.L143:
 	.cfi_restore_state
-	.loc 1 763 0
+	.loc 1 775 0
 	mov	w2, 8
-	b	.L203
-.L143:
-	.loc 1 769 0
-	mov	w2, 9
-	b	.L203
+	b	.L204
 .L144:
-	.loc 1 775 0
-	mov	w2, 10
-	b	.L203
-.L145:
 	.loc 1 781 0
-	mov	w2, 11
-	b	.L203
-.L137:
+	mov	w2, 9
+	b	.L204
+.L145:
 	.loc 1 787 0
+	mov	w2, 10
+	b	.L204
+.L146:
+	.loc 1 793 0
+	mov	w2, 11
+	b	.L204
+.L138:
+	.loc 1 799 0
 	adrp	x0, .LC4
 	add	x0, x0, :lo12:.LC4
 	bl	printf
-.LVL252:
-.L200:
-	.loc 1 816 0
+.LVL251:
+.L201:
+	.loc 1 828 0
 	mov	w0, 0
-	b	.L127
-.LVL253:
-.L139:
+	b	.L128
+.LVL252:
+.L140:
 .LBB188:
 .LBB173:
-	.loc 1 683 0
+	.loc 1 695 0
 	mov	w0, 5
 	bl	get_wf_mode_index
-.LVL254:
-	.loc 1 684 0
+.LVL253:
+	.loc 1 696 0
 	mov	w2, 16
 	mov	w1, w20
 	bl	get_wf_frm_num
-.LVL255:
+.LVL254:
 	mov	w21, w0
-.LVL256:
-	.loc 1 686 0
+.LVL255:
+	.loc 1 698 0
 	str	w21, [x19]
-.LVL257:
-	.loc 1 687 0
+.LVL256:
+	.loc 1 699 0
 	lsl	w0, w0, 6
-.LVL258:
+.LVL257:
 .LBB158:
 .LBB159:
 	.loc 2 58 0
 	mov	w1, 32768
 	sxtw	x0, w0
-.LVL259:
+.LVL258:
 	bl	kmalloc
-.LVL260:
+.LVL259:
 .LBE159:
 .LBE158:
-	.loc 1 687 0
+	.loc 1 699 0
 	str	x0, [x19, 8]
-	.loc 1 688 0
-	cbz	x0, .L157
-	.loc 1 691 0
+	.loc 1 700 0
+	cbz	x0, .L158
+	.loc 1 703 0
 	mov	w1, w21
 	bl	get_lut_gray16_data
-.LVL261:
-	.loc 1 694 0
+.LVL260:
+	.loc 1 706 0
 	mov	w0, 4
 	bl	get_wf_mode_index
-.LVL262:
-	.loc 1 695 0
+.LVL261:
+	.loc 1 707 0
 	mov	w1, w20
 	mov	w2, 16
 	bl	get_wf_frm_num
-.LVL263:
+.LVL262:
 	mov	w20, w0
-.LVL264:
-	.loc 1 698 0
+.LVL263:
+	.loc 1 710 0
 	ldr	w0, [x19]
-.LVL265:
+.LVL264:
 .LBB160:
 .LBB161:
 	.loc 2 58 0
 	mov	w1, 32768
 .LBE161:
 .LBE160:
-	.loc 1 698 0
+	.loc 1 710 0
 	orr	w0, w0, w20, lsl 8
 	str	w0, [x19]
-.LVL266:
-	.loc 1 700 0
+.LVL265:
+	.loc 1 712 0
 	lsl	w0, w20, 3
 .LBB163:
 .LBB162:
 	.loc 2 58 0
 	sxtw	x0, w0
-.LVL267:
+.LVL266:
 	bl	kmalloc
-.LVL268:
+.LVL267:
 	mov	x21, x0
-.LVL269:
+.LVL268:
 .LBE162:
 .LBE163:
-	.loc 1 701 0
-	cbz	x0, .L157
-	.loc 1 704 0
+	.loc 1 713 0
+	cbz	x0, .L158
+	.loc 1 716 0
 	mov	w1, w20
 	bl	get_lut_gray2_data
-.LVL270:
+.LVL269:
 	mov	x0, 4
 	ldr	x3, [x19, 8]
-.LVL271:
+.LVL270:
 	add	x20, x0, x20, uxtw 3
-.LVL272:
+.LVL271:
 	add	x2, x21, 4
 	add	x20, x21, x20
-.LVL273:
-.L158:
+.LVL272:
+.L159:
 .LBB164:
 .LBB165:
-	.loc 1 456 0
+	.loc 1 468 0
 	cmp	x2, x20
-	bne	.L160
-.LVL274:
+	bne	.L161
+.LVL273:
 .LBE165:
 .LBE164:
 .LBB169:
 .LBB157:
 	.loc 2 81 0
 	mov	x0, x21
-	b	.L204
-.LVL275:
-.L160:
+	b	.L205
+.LVL274:
+.L161:
 .LBE157:
 .LBE169:
 .LBB170:
 .LBB166:
-	.loc 1 458 0
+	.loc 1 470 0
 	ldp	w7, w6, [x2, -4]
-.LVL276:
+.LVL275:
 	mov	x1, 0
-.LVL277:
-.L159:
-	.loc 1 460 0
+.LVL276:
+.L160:
+	.loc 1 472 0
 	ldr	w0, [x3, x1, lsl 2]
-.LVL278:
-	.loc 1 461 0
+.LVL277:
+	.loc 1 473 0
 	and	w4, w0, 1073741820
-.LVL279:
+.LVL278:
 	lsl	w0, w1, 1
-.LVL280:
-	.loc 1 462 0
+.LVL279:
+	.loc 1 474 0
 	asr	w5, w7, w0
 	and	w5, w5, 3
-	.loc 1 463 0
+	.loc 1 475 0
 	asr	w0, w6, w0
-.LVL281:
-	.loc 1 462 0
+.LVL280:
+	.loc 1 474 0
 	orr	w0, w5, w0, lsl 30
 	orr	w0, w0, w4
-	.loc 1 464 0
+	.loc 1 476 0
 	str	w0, [x3, x1, lsl 2]
-.LVL282:
+.LVL281:
 	add	x1, x1, 1
-.LVL283:
-	.loc 1 459 0
+.LVL282:
+	.loc 1 471 0
 	cmp	x1, 16
-	bne	.L159
+	bne	.L160
 	add	x3, x3, 64
-.LVL284:
+.LVL283:
 	add	x2, x2, 8
+.LVL284:
+	b	.L159
 .LVL285:
-	b	.L158
-.LVL286:
-.L140:
+.L141:
 .LBE166:
 .LBE170:
 .LBE173:
 .LBE188:
 .LBB189:
 .LBB187:
-	.loc 1 660 0
+	.loc 1 672 0
 	mov	w0, 6
 	bl	get_wf_mode_index
-.LVL287:
-	.loc 1 661 0
+.LVL286:
+	.loc 1 673 0
 	mov	w2, 16
 	mov	w1, w20
 	bl	get_wf_frm_num
-.LVL288:
+.LVL287:
 	mov	w21, w0
-.LVL289:
-	.loc 1 663 0
+.LVL288:
+	.loc 1 675 0
 	cmp	w0, 0
-	bgt	.L161
-.LVL290:
-.L201:
-	.loc 1 664 0
+	bgt	.L162
+.LVL289:
+.L202:
+	.loc 1 676 0
 	mov	w1, w20
 	mov	x0, x19
 	bl	parse_wf_gray2
+.LVL290:
+	b	.L203
 .LVL291:
-	b	.L202
-.LVL292:
-.L161:
-	.loc 1 666 0
+.L162:
+	.loc 1 678 0
 	str	w21, [x19]
-.LVL293:
-	.loc 1 667 0
+.LVL292:
+	.loc 1 679 0
 	lsl	w0, w0, 6
-.LVL294:
+.LVL293:
 .LBB185:
 .LBB186:
 	.loc 2 58 0
 	mov	w1, 32768
 	sxtw	x0, w0
 	bl	kmalloc
-.LVL295:
+.LVL294:
 .LBE186:
 .LBE185:
-	.loc 1 667 0
+	.loc 1 679 0
 	str	x0, [x19, 8]
-	.loc 1 668 0
-	cbz	x0, .L157
-	.loc 1 671 0
+	.loc 1 680 0
+	cbz	x0, .L158
+	.loc 1 683 0
 	mov	w1, w21
-	b	.L205
-.LVL296:
-.L146:
+	b	.L206
+.LVL295:
+.L147:
 .LBE187:
 .LBE189:
 .LBB190:
 .LBB191:
-	.loc 1 606 0
+	.loc 1 618 0
 	mov	w0, 7
 	bl	get_wf_mode_index
-.LVL297:
-	.loc 1 607 0
+.LVL296:
+	.loc 1 619 0
 	mov	w1, w20
 	mov	w2, 32
 	bl	get_wf_frm_num
-.LVL298:
+.LVL297:
 	mov	w23, w0
-.LVL299:
-	.loc 1 610 0
+.LVL298:
+	.loc 1 622 0
 	lsl	w20, w0, 8
-.LVL300:
-	.loc 1 609 0
+.LVL299:
+	.loc 1 621 0
 	str	w23, [x19]
-	.loc 1 610 0
+	.loc 1 622 0
 	sxtw	x20, w20
-.LVL301:
+.LVL300:
 .LBB192:
 .LBB193:
 	.loc 2 58 0
 	mov	w1, 32768
 	mov	x0, x20
-.LVL302:
+.LVL301:
 	bl	kmalloc
-.LVL303:
+.LVL302:
 .LBE193:
 .LBE192:
-	.loc 1 610 0
+	.loc 1 622 0
 	str	x0, [x19, 8]
 .LBB195:
 .LBB194:
 	.loc 2 58 0
 	mov	x22, x0
-.LVL304:
+.LVL303:
 .LBE194:
 .LBE195:
-	.loc 1 611 0
-	cbz	x0, .L157
-.LVL305:
+	.loc 1 623 0
+	cbz	x0, .L158
+.LVL304:
 .LBB196:
 .LBB197:
-	.loc 1 511 0
+	.loc 1 523 0
 	adrp	x21, gray32_data
-.LVL306:
+.LVL305:
 	mov	x2, 11264
 	add	x19, x21, :lo12:gray32_data
-.LVL307:
+.LVL306:
 	mov	w1, 0
 	movk	x2, 0x1, lsl 16
 	mov	x0, x19
-.LVL308:
+.LVL307:
 	bl	memset
-.LVL309:
+.LVL308:
 	adrp	x5, waveformdata
 	add	x5, x5, :lo12:waveformdata
 	mov	w1, -32
 	mov	x3, 0
-.LVL310:
-.L163:
+.LVL309:
+.L164:
 	lsl	w12, w3, 1
 .LBE197:
 .LBE196:
@@ -2196,11 +2220,11 @@ pvi_wf_get_lut:
 .LBB174:
 .LBB171:
 .LBB167:
-	.loc 1 458 0
+	.loc 1 470 0
 	mov	x2, 0
-	b	.L170
-.LVL311:
-.L166:
+	b	.L171
+.LVL310:
+.L167:
 .LBE167:
 .LBE171:
 .LBE174:
@@ -2216,37 +2240,37 @@ pvi_wf_get_lut:
 	add	x11, x0, x19
 .LBE199:
 .LBE198:
-	.loc 1 516 0
+	.loc 1 528 0
 	cmp	x3, 15
 .LBB201:
 .LBB200:
 	.loc 1 157 0
 	ldrb	w4, [x7, x4]
-.LVL312:
+.LVL311:
 .LBE200:
 .LBE201:
-	.loc 1 516 0
-	bhi	.L164
-	.loc 1 517 0
+	.loc 1 528 0
+	bhi	.L165
+	.loc 1 529 0
 	ldr	w8, [x11, x2]
 	lsl	w4, w4, w12
 	orr	w4, w8, w4
 	str	w4, [x11, x2]
-.L165:
-	.loc 1 514 0
+.L166:
+	.loc 1 526 0
 	add	w6, w6, 1
-.LVL313:
+.LVL312:
 	add	x0, x0, 256
-.LVL314:
-.L168:
+.LVL313:
+.L169:
 	cmp	w23, w6
-	bgt	.L166
+	bgt	.L167
 	add	x2, x2, 8
-	.loc 1 513 0
+	.loc 1 525 0
 	cmp	x2, 256
-	beq	.L167
-.LVL315:
-.L170:
+	beq	.L168
+.LVL314:
+.L171:
 	add	x7, x3, x2, lsl 2
 .LBE202:
 .LBE204:
@@ -2256,14 +2280,14 @@ pvi_wf_get_lut:
 .LBB175:
 .LBB172:
 .LBB168:
-	.loc 1 458 0
+	.loc 1 470 0
 	mov	x0, 0
 	add	x7, x7, x5
 	mov	w6, 0
 	add	x10, x2, 4
-	b	.L168
-.LVL316:
-.L164:
+	b	.L169
+.LVL315:
+.L165:
 .LBE168:
 .LBE172:
 .LBE175:
@@ -2272,29 +2296,29 @@ pvi_wf_get_lut:
 .LBB207:
 .LBB205:
 .LBB203:
-	.loc 1 520 0
+	.loc 1 532 0
 	ldr	w8, [x11, x10]
 	lsl	w4, w4, w1
 	orr	w4, w8, w4
 	str	w4, [x11, x10]
-	b	.L165
-.L167:
-.LVL317:
+	b	.L166
+.L168:
+.LVL316:
 	add	x3, x3, 1
-.LVL318:
+.LVL317:
 	add	w1, w1, 2
-	.loc 1 512 0
+	.loc 1 524 0
 	cmp	x3, 32
-	bne	.L163
-	.loc 1 526 0
+	bne	.L164
+	.loc 1 538 0
 	mov	x2, x20
 	add	x1, x21, :lo12:gray32_data
 	mov	x0, x22
 	bl	memcpy
+.LVL318:
+	b	.L201
 .LVL319:
-	b	.L200
-.LVL320:
-.L171:
+.L172:
 	.cfi_def_cfa 31, 0
 	.cfi_restore 19
 	.cfi_restore 20
@@ -2309,143 +2333,145 @@ pvi_wf_get_lut:
 .LBE205:
 .LBE207:
 .LBE211:
-	.loc 1 722 0
+	.loc 1 734 0
 	mov	w0, -19
-.LVL321:
+.LVL320:
 	ret
-.LVL322:
-.L172:
-	.loc 1 725 0
+.LVL321:
+.L173:
+	.loc 1 737 0
 	mov	w0, -22
-.LVL323:
+.LVL322:
 	ret
-.LVL324:
-.L173:
-	.loc 1 729 0
+.LVL323:
+.L174:
+	.loc 1 741 0
 	mov	w0, 0
-.LVL325:
+.LVL324:
 	ret
 	.cfi_endproc
-.LFE230:
+.LFE232:
 	.size	pvi_wf_get_lut, .-pvi_wf_get_lut
 	.section	.text.pvi_wf_input,"ax",@progbits
 	.align	2
 	.global	pvi_wf_input
 	.type	pvi_wf_input, %function
 pvi_wf_input:
-.LFB231:
-	.loc 1 827 0
+.LFB233:
+	.loc 1 839 0
 	.cfi_startproc
-.LVL326:
-	.loc 1 830 0
+.LVL325:
+	.loc 1 842 0
 	adrp	x1, .LANCHOR0
 	ldr	x3, [x1, #:lo12:.LANCHOR0]
-	cbnz	x3, .L212
+	cbnz	x3, .L213
 	mov	x2, x1
-	.loc 1 834 0
+	.loc 1 846 0
 	ldrb	w1, [x0, 16]
 	cmp	w1, 25
-	bhi	.L209
+	bhi	.L210
 	cmp	w1, 24
-	bcs	.L210
+	bcs	.L211
 	cmp	w1, 18
-	beq	.L210
+	beq	.L211
 	cmp	w1, 22
-	beq	.L210
+	beq	.L211
 	cmp	w1, 9
-.L237:
-	beq	.L210
-	.loc 1 827 0
+.L241:
+	beq	.L211
+	.loc 1 839 0
 	stp	x29, x30, [sp, -16]!
 	.cfi_def_cfa_offset 16
 	.cfi_offset 29, -16
 	.cfi_offset 30, -8
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	.loc 1 846 0
+	.loc 1 859 0
 	ldrb	w2, [x0, 22]
 	adrp	x0, .LC5
-.LVL327:
+.LVL326:
 	add	x0, x0, :lo12:.LC5
 	bl	printf
-.LVL328:
-	.loc 1 848 0
+.LVL327:
+	.loc 1 861 0
 	mov	w0, -8
-	.loc 1 854 0
+	.loc 1 867 0
 	ldp	x29, x30, [sp], 16
 	.cfi_restore 30
 	.cfi_restore 29
 	.cfi_def_cfa 31, 0
 	ret
-.LVL329:
-.L209:
-	.loc 1 834 0
-	cmp	w1, 35
-	beq	.L210
-	bhi	.L211
-	cmp	w1, 32
-	b	.L237
-.L211:
+.LVL328:
+.L210:
+	.loc 1 846 0
 	cmp	w1, 67
-	beq	.L210
+	beq	.L211
+	bhi	.L212
+	cmp	w1, 32
+	beq	.L211
+	cmp	w1, 35
+	b	.L241
+.L212:
+	cmp	w1, 72
+	beq	.L211
 	cmp	w1, 84
-	b	.L237
-.L210:
-	.loc 1 851 0
+	b	.L241
+.L211:
+	.loc 1 864 0
 	str	x0, [x2, #:lo12:.LANCHOR0]
-	.loc 1 853 0
+	.loc 1 866 0
 	mov	w0, 0
-.LVL330:
+.LVL329:
 	ret
-.LVL331:
-.L212:
-	.loc 1 831 0
+.LVL330:
+.L213:
+	.loc 1 843 0
 	mov	w0, -16
-.LVL332:
+.LVL331:
 	ret
 	.cfi_endproc
-.LFE231:
+.LFE233:
 	.size	pvi_wf_input, .-pvi_wf_input
 	.section	.text.pvi_wf_get_version,"ax",@progbits
 	.align	2
 	.global	pvi_wf_get_version
 	.type	pvi_wf_get_version, %function
 pvi_wf_get_version:
-.LFB232:
-	.loc 1 864 0
+.LFB234:
+	.loc 1 877 0
 	.cfi_startproc
-	.loc 1 865 0
+	.loc 1 878 0
 	adrp	x0, .LANCHOR0
 	ldr	x2, [x0, #:lo12:.LANCHOR0]
-.LVL333:
-	.loc 1 869 0
-	cbz	x2, .L242
-	.loc 1 873 0 discriminator 3
+.LVL332:
+	.loc 1 882 0
+	cbz	x2, .L246
+	.loc 1 886 0 discriminator 3
 	adrp	x0, .LANCHOR7
 	add	x0, x0, :lo12:.LANCHOR7
 	mov	x1, 0
-.L241:
-.LVL334:
+.L245:
+.LVL333:
 	add	x3, x2, x1
 	ldrb	w3, [x3, 65]
 	strb	w3, [x1, x0]
-.LVL335:
+.LVL334:
 	add	x1, x1, 1
-.LVL336:
-	.loc 1 872 0 discriminator 3
+.LVL335:
+	.loc 1 885 0 discriminator 3
 	cmp	x1, 31
-	bne	.L241
-	.loc 1 875 0
+	bne	.L245
+	.loc 1 888 0
 	strb	wzr, [x0, 31]
-	.loc 1 877 0
+	.loc 1 890 0
 	ret
-.L242:
-	.loc 1 870 0
+.L246:
+	.loc 1 883 0
 	mov	x0, 0
-	.loc 1 878 0
+	.loc 1 891 0
 	ret
 	.cfi_endproc
-.LFE232:
+.LFE234:
 	.size	pvi_wf_get_version, .-pvi_wf_get_version
 	.section	.bss.global_waveform,"aw",@nobits
 	.align	3
@@ -2473,12 +2499,12 @@ gray_2_data:
 	.size	gray_data, 19200
 gray_data:
 	.zero	19200
-	.section	.bss.pvi_modes.5991,"aw",@nobits
+	.section	.bss.pvi_modes.6051,"aw",@nobits
 	.align	3
 	.set	.LANCHOR1,. + 0
-	.type	pvi_modes.5991, %object
-	.size	pvi_modes.5991, 36
-pvi_modes.5991:
+	.type	pvi_modes.6051, %object
+	.size	pvi_modes.6051, 36
+pvi_modes.6051:
 	.zero	36
 	.section	.bss.reset_data,"aw",@nobits
 	.align	3
@@ -2487,12 +2513,12 @@ pvi_modes.5991:
 	.size	reset_data, 1200
 reset_data:
 	.zero	1200
-	.section	.bss.spi_id_buffer.6260,"aw",@nobits
+	.section	.bss.spi_id_buffer.6323,"aw",@nobits
 	.align	3
 	.set	.LANCHOR7,. + 0
-	.type	spi_id_buffer.6260, %object
-	.size	spi_id_buffer.6260, 32
-spi_id_buffer.6260:
+	.type	spi_id_buffer.6323, %object
+	.size	spi_id_buffer.6323, 32
+spi_id_buffer.6323:
 	.zero	32
 	.section	.bss.waveformdata,"aw",@nobits
 	.align	3
@@ -2500,26 +2526,26 @@ spi_id_buffer.6260:
 	.size	waveformdata, 524288
 waveformdata:
 	.zero	524288
-	.section	.data.sftemp.6224,"aw",@progbits
+	.section	.data.sftemp.6286,"aw",@progbits
 	.align	2
 	.set	.LANCHOR4,. + 0
-	.type	sftemp.6224, %object
-	.size	sftemp.6224, 4
-sftemp.6224:
+	.type	sftemp.6286, %object
+	.size	sftemp.6286, 4
+sftemp.6286:
 	.word	-1
-	.section	.data.stype.6223,"aw",@progbits
+	.section	.data.stype.6285,"aw",@progbits
 	.align	2
 	.set	.LANCHOR5,. + 0
-	.type	stype.6223, %object
-	.size	stype.6223, 4
-stype.6223:
+	.type	stype.6285, %object
+	.size	stype.6285, 4
+stype.6285:
 	.word	13
-	.section	.rodata.__func__.6041,"a",@progbits
+	.section	.rodata.__func__.6102,"a",@progbits
 	.align	3
 	.set	.LANCHOR3,. + 0
-	.type	__func__.6041, %object
-	.size	__func__.6041, 15
-__func__.6041:
+	.type	__func__.6102, %object
+	.size	__func__.6102, 15
+__func__.6102:
 	.string	"get_wf_frm_num"
 	.section	.rodata.decodewaveform.str1.1,"aMS",@progbits,1
 .LC2:
@@ -2565,15 +2591,15 @@ __func__.6041:
 	.file 25 "include/log.h"
 	.section	.debug_info,"",@progbits
 .Ldebug_info0:
-	.4byte	0x2766
+	.4byte	0x2756
 	.2byte	0x4
 	.4byte	.Ldebug_abbrev0
 	.byte	0x8
 	.uleb128 0x1
-	.4byte	.LASF411
-	.byte	0xc
-	.4byte	.LASF412
 	.4byte	.LASF413
+	.byte	0xc
+	.4byte	.LASF414
+	.4byte	.LASF415
 	.4byte	.Ldebug_ranges0+0x450
 	.8byte	0
 	.4byte	.Ldebug_line0
@@ -2816,7 +2842,7 @@ __func__.6041:
 	.uleb128 0x4
 	.4byte	.LASF32
 	.byte	0xb
-	.byte	0xce
+	.byte	0xdf
 	.4byte	0x211
 	.uleb128 0x13
 	.2byte	0x1220
@@ -2875,7 +2901,7 @@ __func__.6041:
 	.2byte	0x1ff
 	.byte	0
 	.uleb128 0x17
-	.4byte	.LASF414
+	.4byte	.LASF416
 	.uleb128 0x8
 	.byte	0x8
 	.4byte	0x297
@@ -3609,12 +3635,12 @@ __func__.6041:
 	.2byte	0x198
 	.4byte	0x88f
 	.uleb128 0x24
-	.4byte	.LASF269
+	.4byte	.LASF271
 	.byte	0x4
 	.4byte	0x54
 	.byte	0x15
 	.byte	0xe
-	.4byte	0xaf8
+	.4byte	0xb0a
 	.uleb128 0x25
 	.4byte	.LASF140
 	.byte	0
@@ -3900,8 +3926,17 @@ __func__.6041:
 	.uleb128 0x25
 	.4byte	.LASF234
 	.byte	0x5e
-	.uleb128 0x26
+	.uleb128 0x25
 	.4byte	.LASF235
+	.byte	0x5f
+	.uleb128 0x25
+	.4byte	.LASF236
+	.byte	0x60
+	.uleb128 0x25
+	.4byte	.LASF237
+	.byte	0x61
+	.uleb128 0x26
+	.4byte	.LASF238
 	.sleb128 -1
 	.byte	0
 	.uleb128 0x27
@@ -3909,61 +3944,61 @@ __func__.6041:
 	.4byte	0x84
 	.byte	0x19
 	.byte	0xf6
-	.4byte	0xb0b
+	.4byte	0xb1d
 	.uleb128 0x25
-	.4byte	.LASF236
+	.4byte	.LASF239
 	.byte	0x5
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xec
-	.4byte	0xb1b
+	.4byte	0xb2d
 	.uleb128 0xe
 	.4byte	0xdf
 	.byte	0x1f
 	.byte	0
 	.uleb128 0x4
-	.4byte	.LASF237
+	.4byte	.LASF240
 	.byte	0x3
 	.byte	0xad
 	.4byte	0x126
 	.uleb128 0xa
 	.4byte	0x99
-	.4byte	0xb31
+	.4byte	0xb43
 	.uleb128 0xb
 	.byte	0
 	.uleb128 0x4
-	.4byte	.LASF238
+	.4byte	.LASF241
 	.byte	0x3
 	.byte	0xaf
-	.4byte	0xb26
+	.4byte	0xb38
 	.uleb128 0x4
-	.4byte	.LASF239
+	.4byte	.LASF242
 	.byte	0x3
 	.byte	0xb0
-	.4byte	0xb26
+	.4byte	0xb38
 	.uleb128 0x4
-	.4byte	.LASF240
+	.4byte	.LASF243
 	.byte	0x3
 	.byte	0xfe
 	.4byte	0x126
 	.uleb128 0x4
-	.4byte	.LASF241
+	.4byte	.LASF244
 	.byte	0x3
 	.byte	0xff
 	.4byte	0x126
 	.uleb128 0xc
-	.4byte	.LASF242
+	.4byte	.LASF245
 	.byte	0x3
 	.2byte	0x100
 	.4byte	0x126
 	.uleb128 0xf
-	.4byte	.LASF243
+	.4byte	.LASF246
 	.byte	0x4
 	.byte	0x14
 	.byte	0x2e
-	.4byte	0xb82
+	.4byte	0xb94
 	.uleb128 0x10
-	.4byte	.LASF244
+	.4byte	.LASF247
 	.byte	0x14
 	.byte	0x2f
 	.4byte	0x13c
@@ -3972,219 +4007,204 @@ __func__.6041:
 	.uleb128 0x8
 	.byte	0x8
 	.4byte	0x29
-	.uleb128 0x28
-	.4byte	0xb98
-	.uleb128 0x12
-	.4byte	0x152
-	.uleb128 0x12
-	.4byte	0x54
-	.byte	0
-	.uleb128 0xc
-	.4byte	.LASF245
-	.byte	0x14
-	.2byte	0x11e
-	.4byte	0xba4
-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0xb88
 	.uleb128 0xa
 	.4byte	0x99
-	.4byte	0xbba
+	.4byte	0xbaa
 	.uleb128 0xe
 	.4byte	0xdf
 	.byte	0x5
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF246
+	.4byte	.LASF248
 	.byte	0x14
 	.2byte	0x1fd
-	.4byte	0xb69
+	.4byte	0xb7b
 	.uleb128 0xc
-	.4byte	.LASF247
+	.4byte	.LASF249
 	.byte	0x14
 	.2byte	0x1fe
-	.4byte	0xb69
+	.4byte	0xb7b
 	.uleb128 0xc
-	.4byte	.LASF248
+	.4byte	.LASF250
 	.byte	0x14
 	.2byte	0x200
-	.4byte	0xb69
+	.4byte	0xb7b
 	.uleb128 0xc
-	.4byte	.LASF249
+	.4byte	.LASF251
 	.byte	0x14
 	.2byte	0x205
-	.4byte	0xb0b
+	.4byte	0xb1d
 	.uleb128 0xc
-	.4byte	.LASF250
+	.4byte	.LASF252
 	.byte	0x14
 	.2byte	0x206
-	.4byte	0xb0b
+	.4byte	0xb1d
 	.uleb128 0xa
 	.4byte	0xec
-	.4byte	0xc06
+	.4byte	0xbf6
 	.uleb128 0xe
 	.4byte	0xdf
 	.byte	0x3f
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF251
+	.4byte	.LASF253
 	.byte	0x14
 	.2byte	0x207
-	.4byte	0xbf6
+	.4byte	0xbe6
 	.uleb128 0xc
-	.4byte	.LASF252
+	.4byte	.LASF254
 	.byte	0x14
 	.2byte	0x209
-	.4byte	0xbaa
+	.4byte	0xb9a
 	.uleb128 0xc
-	.4byte	.LASF253
+	.4byte	.LASF255
 	.byte	0x14
 	.2byte	0x20a
-	.4byte	0xbaa
+	.4byte	0xb9a
 	.uleb128 0xc
-	.4byte	.LASF254
+	.4byte	.LASF256
 	.byte	0x14
 	.2byte	0x20b
-	.4byte	0xb69
+	.4byte	0xb7b
 	.uleb128 0xc
-	.4byte	.LASF255
+	.4byte	.LASF257
 	.byte	0x14
 	.2byte	0x20c
-	.4byte	0xb69
+	.4byte	0xb7b
 	.uleb128 0xc
-	.4byte	.LASF256
+	.4byte	.LASF258
 	.byte	0x14
 	.2byte	0x20d
-	.4byte	0xb82
+	.4byte	0xb94
 	.uleb128 0xa
-	.4byte	0xb82
-	.4byte	0xc5e
+	.4byte	0xb94
+	.4byte	0xc4e
 	.uleb128 0xe
 	.4byte	0xdf
 	.byte	0x3
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF257
+	.4byte	.LASF259
 	.byte	0x14
 	.2byte	0x20e
-	.4byte	0xc4e
+	.4byte	0xc3e
 	.uleb128 0xc
-	.4byte	.LASF258
+	.4byte	.LASF260
 	.byte	0x14
 	.2byte	0x20f
-	.4byte	0xb82
+	.4byte	0xb94
 	.uleb128 0xc
-	.4byte	.LASF259
+	.4byte	.LASF261
 	.byte	0x14
 	.2byte	0x210
 	.4byte	0x54
 	.uleb128 0xa
 	.4byte	0xa3
-	.4byte	0xc92
+	.4byte	0xc82
 	.uleb128 0xe
 	.4byte	0xdf
 	.byte	0x5
 	.byte	0
 	.uleb128 0x6
-	.4byte	0xc82
+	.4byte	0xc72
 	.uleb128 0xc
-	.4byte	.LASF260
+	.4byte	.LASF262
 	.byte	0x14
 	.2byte	0x211
-	.4byte	0xc92
+	.4byte	0xc82
 	.uleb128 0xc
-	.4byte	.LASF261
+	.4byte	.LASF263
 	.byte	0x14
 	.2byte	0x212
-	.4byte	0xc92
+	.4byte	0xc82
 	.uleb128 0xc
-	.4byte	.LASF262
+	.4byte	.LASF264
 	.byte	0x14
 	.2byte	0x216
 	.4byte	0x11b
 	.uleb128 0xc
-	.4byte	.LASF263
+	.4byte	.LASF265
 	.byte	0x14
 	.2byte	0x217
 	.4byte	0x11b
 	.uleb128 0xc
-	.4byte	.LASF264
+	.4byte	.LASF266
 	.byte	0x14
 	.2byte	0x219
 	.4byte	0x54
 	.uleb128 0xa
 	.4byte	0xec
-	.4byte	0xce4
+	.4byte	0xcd4
 	.uleb128 0x16
 	.4byte	0xdf
 	.2byte	0x3ff
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF265
+	.4byte	.LASF267
 	.byte	0x14
 	.2byte	0x220
-	.4byte	0xcd3
+	.4byte	0xcc3
 	.uleb128 0xc
-	.4byte	.LASF266
+	.4byte	.LASF268
 	.byte	0x14
 	.2byte	0x222
 	.4byte	0xb3
 	.uleb128 0xc
-	.4byte	.LASF267
+	.4byte	.LASF269
 	.byte	0x14
 	.2byte	0x224
 	.4byte	0xb3
 	.uleb128 0xc
-	.4byte	.LASF268
+	.4byte	.LASF270
 	.byte	0x14
 	.2byte	0x230
-	.4byte	0xb69
-	.uleb128 0x29
-	.4byte	.LASF270
+	.4byte	0xb7b
+	.uleb128 0x28
+	.4byte	.LASF272
 	.byte	0x4
 	.4byte	0x84
 	.byte	0x14
 	.2byte	0x286
-	.4byte	0xd3e
+	.4byte	0xd2e
 	.uleb128 0x25
-	.4byte	.LASF271
+	.4byte	.LASF273
 	.byte	0
 	.uleb128 0x25
-	.4byte	.LASF272
+	.4byte	.LASF274
 	.byte	0x1
 	.uleb128 0x25
-	.4byte	.LASF273
+	.4byte	.LASF275
 	.byte	0x2
 	.uleb128 0x25
-	.4byte	.LASF274
+	.4byte	.LASF276
 	.byte	0x3
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF275
+	.4byte	.LASF277
 	.byte	0x14
 	.2byte	0x28c
-	.4byte	0xd14
+	.4byte	0xd04
 	.uleb128 0xc
-	.4byte	.LASF276
+	.4byte	.LASF278
 	.byte	0x16
 	.2byte	0x3ba
 	.4byte	0x126
 	.uleb128 0xc
-	.4byte	.LASF277
+	.4byte	.LASF279
 	.byte	0x16
 	.2byte	0x3bb
 	.4byte	0x126
 	.uleb128 0xc
-	.4byte	.LASF278
+	.4byte	.LASF280
 	.byte	0x16
 	.2byte	0x3bc
 	.4byte	0x126
 	.uleb128 0xf
-	.4byte	.LASF279
+	.4byte	.LASF281
 	.byte	0x4
 	.byte	0x2
 	.byte	0xd
-	.4byte	0xd87
+	.4byte	0xd77
 	.uleb128 0x19
 	.string	"pid"
 	.byte	0x2
@@ -4193,115 +4213,115 @@ __func__.6041:
 	.byte	0
 	.byte	0
 	.uleb128 0x4
-	.4byte	.LASF280
+	.4byte	.LASF282
 	.byte	0x2
 	.byte	0x11
-	.4byte	0xd92
+	.4byte	0xd82
 	.uleb128 0x8
 	.byte	0x8
-	.4byte	0xd6e
+	.4byte	0xd5e
 	.uleb128 0x24
-	.4byte	.LASF281
+	.4byte	.LASF283
 	.byte	0x4
 	.4byte	0x84
 	.byte	0x17
 	.byte	0x14
-	.4byte	0xdf7
+	.4byte	0xde7
 	.uleb128 0x25
-	.4byte	.LASF282
+	.4byte	.LASF284
 	.byte	0x1
 	.uleb128 0x25
-	.4byte	.LASF283
+	.4byte	.LASF285
 	.byte	0x2
 	.uleb128 0x25
-	.4byte	.LASF284
+	.4byte	.LASF286
 	.byte	0x3
 	.uleb128 0x25
-	.4byte	.LASF285
+	.4byte	.LASF287
 	.byte	0x4
 	.uleb128 0x25
-	.4byte	.LASF286
+	.4byte	.LASF288
 	.byte	0x5
 	.uleb128 0x25
-	.4byte	.LASF287
+	.4byte	.LASF289
 	.byte	0x6
 	.uleb128 0x25
-	.4byte	.LASF288
+	.4byte	.LASF290
 	.byte	0x7
 	.uleb128 0x25
-	.4byte	.LASF289
+	.4byte	.LASF291
 	.byte	0x8
 	.uleb128 0x25
-	.4byte	.LASF290
+	.4byte	.LASF292
 	.byte	0x9
 	.uleb128 0x25
-	.4byte	.LASF291
+	.4byte	.LASF293
 	.byte	0xa
 	.uleb128 0x25
-	.4byte	.LASF292
+	.4byte	.LASF294
 	.byte	0xb
 	.uleb128 0x25
-	.4byte	.LASF293
+	.4byte	.LASF295
 	.byte	0xc
 	.uleb128 0x25
-	.4byte	.LASF294
+	.4byte	.LASF296
 	.byte	0xd
 	.byte	0
 	.uleb128 0x24
-	.4byte	.LASF295
+	.4byte	.LASF297
 	.byte	0x4
 	.4byte	0x84
 	.byte	0x17
 	.byte	0x2a
-	.4byte	0xe44
+	.4byte	0xe34
 	.uleb128 0x25
-	.4byte	.LASF296
+	.4byte	.LASF298
 	.byte	0
 	.uleb128 0x25
-	.4byte	.LASF297
+	.4byte	.LASF299
 	.byte	0x1
 	.uleb128 0x25
-	.4byte	.LASF298
+	.4byte	.LASF300
 	.byte	0x2
 	.uleb128 0x25
-	.4byte	.LASF299
+	.4byte	.LASF301
 	.byte	0x3
 	.uleb128 0x25
-	.4byte	.LASF300
+	.4byte	.LASF302
 	.byte	0x4
 	.uleb128 0x25
-	.4byte	.LASF301
+	.4byte	.LASF303
 	.byte	0x5
 	.uleb128 0x25
-	.4byte	.LASF302
+	.4byte	.LASF304
 	.byte	0x6
 	.uleb128 0x25
-	.4byte	.LASF303
+	.4byte	.LASF305
 	.byte	0x7
 	.uleb128 0x25
-	.4byte	.LASF304
+	.4byte	.LASF306
 	.byte	0x8
 	.uleb128 0x25
-	.4byte	.LASF305
+	.4byte	.LASF307
 	.byte	0x9
 	.byte	0
 	.uleb128 0xf
-	.4byte	.LASF306
+	.4byte	.LASF308
 	.byte	0x10
 	.byte	0x17
 	.byte	0x43
-	.4byte	0xe69
+	.4byte	0xe59
 	.uleb128 0x10
-	.4byte	.LASF307
+	.4byte	.LASF309
 	.byte	0x17
 	.byte	0x44
 	.4byte	0x84
 	.byte	0
 	.uleb128 0x10
-	.4byte	.LASF308
+	.4byte	.LASF310
 	.byte	0x17
 	.byte	0x45
-	.4byte	0xe69
+	.4byte	0xe59
 	.byte	0x8
 	.byte	0
 	.uleb128 0x8
@@ -4309,93 +4329,93 @@ __func__.6041:
 	.4byte	0x84
 	.uleb128 0x8
 	.byte	0x8
-	.4byte	0xe44
+	.4byte	0xe34
 	.uleb128 0xf
-	.4byte	.LASF309
+	.4byte	.LASF311
 	.byte	0x30
 	.byte	0x1
 	.byte	0xc
-	.4byte	0xf8a
+	.4byte	0xf7a
 	.uleb128 0x10
-	.4byte	.LASF310
+	.4byte	.LASF312
 	.byte	0x1
 	.byte	0xd
 	.4byte	0xb3
 	.byte	0
 	.uleb128 0x10
-	.4byte	.LASF311
+	.4byte	.LASF313
 	.byte	0x1
 	.byte	0xe
 	.4byte	0xb3
 	.byte	0x4
 	.uleb128 0x10
-	.4byte	.LASF312
+	.4byte	.LASF314
 	.byte	0x1
 	.byte	0xf
 	.4byte	0xb3
 	.byte	0x8
 	.uleb128 0x10
-	.4byte	.LASF313
+	.4byte	.LASF315
 	.byte	0x1
 	.byte	0x10
 	.4byte	0x99
 	.byte	0xc
 	.uleb128 0x10
-	.4byte	.LASF314
+	.4byte	.LASF316
 	.byte	0x1
 	.byte	0x11
 	.4byte	0x99
 	.byte	0xd
 	.uleb128 0x10
-	.4byte	.LASF315
+	.4byte	.LASF317
 	.byte	0x1
 	.byte	0x12
 	.4byte	0xa8
 	.byte	0xe
 	.uleb128 0x10
-	.4byte	.LASF316
+	.4byte	.LASF318
 	.byte	0x1
 	.byte	0x13
 	.4byte	0x99
 	.byte	0x10
 	.uleb128 0x10
-	.4byte	.LASF317
+	.4byte	.LASF319
 	.byte	0x1
 	.byte	0x14
 	.4byte	0x99
 	.byte	0x11
 	.uleb128 0x10
-	.4byte	.LASF318
+	.4byte	.LASF320
 	.byte	0x1
 	.byte	0x15
 	.4byte	0x99
 	.byte	0x12
 	.uleb128 0x10
-	.4byte	.LASF319
+	.4byte	.LASF321
 	.byte	0x1
 	.byte	0x16
 	.4byte	0x99
 	.byte	0x13
 	.uleb128 0x10
-	.4byte	.LASF320
+	.4byte	.LASF322
 	.byte	0x1
 	.byte	0x17
 	.4byte	0x99
 	.byte	0x14
 	.uleb128 0x10
-	.4byte	.LASF321
+	.4byte	.LASF323
 	.byte	0x1
 	.byte	0x18
 	.4byte	0x99
 	.byte	0x15
 	.uleb128 0x10
-	.4byte	.LASF322
+	.4byte	.LASF324
 	.byte	0x1
 	.byte	0x19
 	.4byte	0x99
 	.byte	0x16
 	.uleb128 0x10
-	.4byte	.LASF323
+	.4byte	.LASF325
 	.byte	0x1
 	.byte	0x1a
 	.4byte	0x99
@@ -4407,16 +4427,16 @@ __func__.6041:
 	.4byte	0xb3
 	.byte	0x18
 	.uleb128 0x10
-	.4byte	.LASF324
+	.4byte	.LASF326
 	.byte	0x1
 	.byte	0x1c
 	.4byte	0x99
 	.byte	0x1c
 	.uleb128 0x10
-	.4byte	.LASF325
+	.4byte	.LASF327
 	.byte	0x1
 	.byte	0x1d
-	.4byte	0xf8a
+	.4byte	0xf7a
 	.byte	0x1d
 	.uleb128 0x19
 	.string	"sc1"
@@ -4425,54 +4445,54 @@ __func__.6041:
 	.4byte	0x99
 	.byte	0x20
 	.uleb128 0x10
-	.4byte	.LASF326
+	.4byte	.LASF328
 	.byte	0x1
 	.byte	0x1f
-	.4byte	0xf9a
+	.4byte	0xf8a
 	.byte	0x21
 	.uleb128 0x10
-	.4byte	.LASF327
+	.4byte	.LASF329
 	.byte	0x1
 	.byte	0x20
 	.4byte	0x99
 	.byte	0x25
 	.uleb128 0x10
-	.4byte	.LASF328
+	.4byte	.LASF330
 	.byte	0x1
 	.byte	0x21
 	.4byte	0x99
 	.byte	0x26
 	.uleb128 0x10
-	.4byte	.LASF329
+	.4byte	.LASF331
 	.byte	0x1
 	.byte	0x22
-	.4byte	0xfaa
+	.4byte	0xf9a
 	.byte	0x27
 	.byte	0
 	.uleb128 0xa
 	.4byte	0x99
-	.4byte	0xf9a
+	.4byte	0xf8a
 	.uleb128 0xe
 	.4byte	0xdf
 	.byte	0x2
 	.byte	0
 	.uleb128 0xa
 	.4byte	0x99
-	.4byte	0xfaa
+	.4byte	0xf9a
 	.uleb128 0xe
 	.4byte	0xdf
 	.byte	0x3
 	.byte	0
 	.uleb128 0xa
 	.4byte	0x99
-	.4byte	0xfba
+	.4byte	0xfaa
 	.uleb128 0xe
 	.4byte	0xdf
 	.byte	0x8
 	.byte	0
 	.uleb128 0xa
 	.4byte	0x34
-	.4byte	0xfd7
+	.4byte	0xfc7
 	.uleb128 0x16
 	.4byte	0xdf
 	.2byte	0x1ff
@@ -4483,17 +4503,17 @@ __func__.6041:
 	.4byte	0xdf
 	.byte	0x1f
 	.byte	0
-	.uleb128 0x2a
-	.4byte	.LASF330
+	.uleb128 0x29
+	.4byte	.LASF332
 	.byte	0x1
 	.byte	0x2a
-	.4byte	0xfba
+	.4byte	0xfaa
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	waveformdata
 	.uleb128 0xa
 	.4byte	0x84
-	.4byte	0x1003
+	.4byte	0xff3
 	.uleb128 0x16
 	.4byte	0xdf
 	.2byte	0x12b
@@ -4501,32 +4521,32 @@ __func__.6041:
 	.4byte	0xdf
 	.byte	0xf
 	.byte	0
-	.uleb128 0x2a
-	.4byte	.LASF331
+	.uleb128 0x29
+	.4byte	.LASF333
 	.byte	0x1
 	.byte	0x2b
-	.4byte	0xfec
+	.4byte	0xfdc
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	gray_data
 	.uleb128 0xa
 	.4byte	0x84
-	.4byte	0x1029
+	.4byte	0x1019
 	.uleb128 0x16
 	.4byte	0xdf
 	.2byte	0x12b
 	.byte	0
-	.uleb128 0x2a
-	.4byte	.LASF332
+	.uleb128 0x29
+	.4byte	.LASF334
 	.byte	0x1
 	.byte	0x2c
-	.4byte	0x1018
+	.4byte	0x1008
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	reset_data
 	.uleb128 0xa
 	.4byte	0x84
-	.4byte	0x1055
+	.4byte	0x1045
 	.uleb128 0x16
 	.4byte	0xdf
 	.2byte	0x12b
@@ -4534,17 +4554,17 @@ __func__.6041:
 	.4byte	0xdf
 	.byte	0x1
 	.byte	0
-	.uleb128 0x2a
-	.4byte	.LASF333
+	.uleb128 0x29
+	.4byte	.LASF335
 	.byte	0x1
 	.byte	0x2d
-	.4byte	0x103e
+	.4byte	0x102e
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	gray_2_data
 	.uleb128 0xa
 	.4byte	0x84
-	.4byte	0x1081
+	.4byte	0x1071
 	.uleb128 0x16
 	.4byte	0xdf
 	.2byte	0x12b
@@ -4552,83 +4572,83 @@ __func__.6041:
 	.4byte	0xdf
 	.byte	0x3f
 	.byte	0
-	.uleb128 0x2a
-	.4byte	.LASF334
+	.uleb128 0x29
+	.4byte	.LASF336
 	.byte	0x1
 	.byte	0x2e
-	.4byte	0x106a
+	.4byte	0x105a
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	gray32_data
-	.uleb128 0x2a
-	.4byte	.LASF335
+	.uleb128 0x29
+	.4byte	.LASF337
 	.byte	0x1
 	.byte	0x2f
-	.4byte	0x10ab
+	.4byte	0x109b
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	global_waveform
 	.uleb128 0x8
 	.byte	0x8
-	.4byte	0xe75
-	.uleb128 0x2b
-	.4byte	.LASF338
+	.4byte	0xe65
+	.uleb128 0x2a
+	.4byte	.LASF340
 	.byte	0x1
-	.2byte	0x35f
+	.2byte	0x36c
 	.4byte	0xe6
-	.8byte	.LFB232
-	.8byte	.LFE232-.LFB232
+	.8byte	.LFB234
+	.8byte	.LFE234-.LFB234
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1106
-	.uleb128 0x2c
-	.4byte	.LASF336
+	.4byte	0x10f6
+	.uleb128 0x2b
+	.4byte	.LASF338
 	.byte	0x1
-	.2byte	0x361
+	.2byte	0x36e
 	.4byte	0xe6
 	.uleb128 0x1
 	.byte	0x52
-	.uleb128 0x2c
-	.4byte	.LASF337
+	.uleb128 0x2b
+	.4byte	.LASF339
 	.byte	0x1
-	.2byte	0x362
-	.4byte	0xb0b
+	.2byte	0x36f
+	.4byte	0xb1d
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	spi_id_buffer.6260
-	.uleb128 0x2d
+	.8byte	spi_id_buffer.6323
+	.uleb128 0x2c
 	.string	"i"
 	.byte	0x1
-	.2byte	0x363
+	.2byte	0x370
 	.4byte	0x54
 	.4byte	.LLST135
 	.byte	0
-	.uleb128 0x2b
-	.4byte	.LASF339
+	.uleb128 0x2a
+	.4byte	.LASF341
 	.byte	0x1
-	.2byte	0x33a
+	.2byte	0x346
 	.4byte	0x54
-	.8byte	.LFB231
-	.8byte	.LFE231-.LFB231
+	.8byte	.LFB233
+	.8byte	.LFE233-.LFB233
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1164
-	.uleb128 0x2e
-	.4byte	.LASF342
+	.4byte	0x1154
+	.uleb128 0x2d
+	.4byte	.LASF344
 	.byte	0x1
-	.2byte	0x33a
+	.2byte	0x346
 	.4byte	0x152
 	.4byte	.LLST133
-	.uleb128 0x2f
-	.4byte	.LASF340
+	.uleb128 0x2e
+	.4byte	.LASF342
 	.byte	0x1
-	.2byte	0x33c
-	.4byte	0x10ab
+	.2byte	0x348
+	.4byte	0x109b
 	.4byte	.LLST134
+	.uleb128 0x2f
+	.8byte	.LVL327
+	.4byte	0x271f
 	.uleb128 0x30
-	.8byte	.LVL328
-	.4byte	0x272f
-	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
@@ -4636,146 +4656,146 @@ __func__.6041:
 	.8byte	.LC5
 	.byte	0
 	.byte	0
-	.uleb128 0x2b
-	.4byte	.LASF341
+	.uleb128 0x2a
+	.4byte	.LASF343
 	.byte	0x1
-	.2byte	0x2ca
+	.2byte	0x2d6
 	.4byte	0x54
-	.8byte	.LFB230
-	.8byte	.LFE230-.LFB230
+	.8byte	.LFB232
+	.8byte	.LFE232-.LFB232
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1a83
-	.uleb128 0x2e
-	.4byte	.LASF343
+	.4byte	0x1a73
+	.uleb128 0x2d
+	.4byte	.LASF345
 	.byte	0x1
-	.2byte	0x2ca
-	.4byte	0xe6f
+	.2byte	0x2d6
+	.4byte	0xe5f
 	.4byte	.LLST60
-	.uleb128 0x2e
-	.4byte	.LASF344
+	.uleb128 0x2d
+	.4byte	.LASF346
 	.byte	0x1
-	.2byte	0x2ca
-	.4byte	0xd98
+	.2byte	0x2d6
+	.4byte	0xd88
 	.4byte	.LLST61
-	.uleb128 0x2e
-	.4byte	.LASF345
+	.uleb128 0x2d
+	.4byte	.LASF347
 	.byte	0x1
-	.2byte	0x2ca
+	.2byte	0x2d6
 	.4byte	0x54
 	.4byte	.LLST62
-	.uleb128 0x2c
-	.4byte	.LASF346
+	.uleb128 0x2b
+	.4byte	.LASF348
 	.byte	0x1
-	.2byte	0x2cc
-	.4byte	0xd98
+	.2byte	0x2d8
+	.4byte	0xd88
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	stype.6223
-	.uleb128 0x2c
-	.4byte	.LASF347
+	.8byte	stype.6285
+	.uleb128 0x2b
+	.4byte	.LASF349
 	.byte	0x1
-	.2byte	0x2cd
+	.2byte	0x2d9
 	.4byte	0x54
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	sftemp.6224
-	.uleb128 0x32
-	.4byte	.LASF348
+	.8byte	sftemp.6286
+	.uleb128 0x31
+	.4byte	.LASF350
 	.byte	0x1
-	.2byte	0x2ce
+	.2byte	0x2da
 	.4byte	0x54
-	.uleb128 0x33
+	.uleb128 0x32
 	.string	"ret"
 	.byte	0x1
-	.2byte	0x2cf
+	.2byte	0x2db
 	.4byte	0x54
-	.uleb128 0x34
-	.4byte	0x246a
+	.uleb128 0x33
+	.4byte	0x245a
 	.8byte	.LBB121
 	.4byte	.Ldebug_ranges0+0xe0
 	.byte	0x1
-	.2byte	0x2de
-	.4byte	0x1246
-	.uleb128 0x35
-	.4byte	0x247b
+	.2byte	0x2ea
+	.4byte	0x1236
+	.uleb128 0x34
+	.4byte	0x246b
 	.4byte	.LLST63
-	.uleb128 0x36
+	.uleb128 0x35
 	.4byte	.Ldebug_ranges0+0xe0
-	.uleb128 0x37
-	.4byte	0x2487
+	.uleb128 0x36
+	.4byte	0x2477
 	.4byte	.LLST64
-	.uleb128 0x37
-	.4byte	0x2493
+	.uleb128 0x36
+	.4byte	0x2483
 	.4byte	.LLST65
-	.uleb128 0x37
-	.4byte	0x249f
+	.uleb128 0x36
+	.4byte	0x248f
 	.4byte	.LLST66
-	.uleb128 0x37
-	.4byte	0x24ab
+	.uleb128 0x36
+	.4byte	0x249b
 	.4byte	.LLST67
 	.byte	0
 	.byte	0
-	.uleb128 0x38
-	.4byte	0x26f0
+	.uleb128 0x37
+	.4byte	0x26e0
 	.8byte	.LBB126
 	.8byte	.LBE126-.LBB126
 	.byte	0x1
-	.2byte	0x2e2
-	.4byte	0x1279
-	.uleb128 0x35
-	.4byte	0x26fc
+	.2byte	0x2ee
+	.4byte	0x1269
+	.uleb128 0x34
+	.4byte	0x26ec
 	.4byte	.LLST68
-	.uleb128 0x39
-	.8byte	.LVL190
-	.4byte	0x273a
+	.uleb128 0x38
+	.8byte	.LVL189
+	.4byte	0x272a
 	.byte	0
-	.uleb128 0x34
-	.4byte	0x1ec4
+	.uleb128 0x33
+	.4byte	0x1eb4
 	.8byte	.LBB129
 	.4byte	.Ldebug_ranges0+0x120
 	.byte	0x1
-	.2byte	0x2e9
-	.4byte	0x14f6
-	.uleb128 0x35
-	.4byte	0x1ee1
+	.2byte	0x2f5
+	.4byte	0x14e6
+	.uleb128 0x34
+	.4byte	0x1ed1
 	.4byte	.LLST69
-	.uleb128 0x35
-	.4byte	0x1ed5
+	.uleb128 0x34
+	.4byte	0x1ec5
 	.4byte	.LLST70
-	.uleb128 0x36
+	.uleb128 0x35
 	.4byte	.Ldebug_ranges0+0x120
-	.uleb128 0x3a
-	.4byte	0x1eed
-	.uleb128 0x37
-	.4byte	0x1ef9
+	.uleb128 0x39
+	.4byte	0x1edd
+	.uleb128 0x36
+	.4byte	0x1ee9
 	.4byte	.LLST71
-	.uleb128 0x37
-	.4byte	0x1f05
+	.uleb128 0x36
+	.4byte	0x1ef5
 	.4byte	.LLST72
-	.uleb128 0x34
-	.4byte	0x2708
+	.uleb128 0x33
+	.4byte	0x26f8
 	.8byte	.LBB131
 	.4byte	.Ldebug_ranges0+0x150
 	.byte	0x1
-	.2byte	0x22e
-	.4byte	0x1305
-	.uleb128 0x35
-	.4byte	0x2723
+	.2byte	0x23a
+	.4byte	0x12f5
+	.uleb128 0x34
+	.4byte	0x2713
 	.4byte	.LLST73
-	.uleb128 0x35
-	.4byte	0x2718
+	.uleb128 0x34
+	.4byte	0x2708
 	.4byte	.LLST74
+	.uleb128 0x2f
+	.8byte	.LVL200
+	.4byte	0x2736
 	.uleb128 0x30
-	.8byte	.LVL201
-	.4byte	0x2746
-	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x84
 	.sleb128 0
-	.uleb128 0x31
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x3
@@ -4783,78 +4803,78 @@ __func__.6041:
 	.2byte	0x8000
 	.byte	0
 	.byte	0
-	.uleb128 0x34
-	.4byte	0x215c
+	.uleb128 0x33
+	.4byte	0x214c
 	.8byte	.LBB135
 	.4byte	.Ldebug_ranges0+0x180
 	.byte	0x1
-	.2byte	0x232
-	.4byte	0x13b7
-	.uleb128 0x35
-	.4byte	0x2175
+	.2byte	0x23e
+	.4byte	0x13a7
+	.uleb128 0x34
+	.4byte	0x2165
 	.4byte	.LLST75
-	.uleb128 0x35
-	.4byte	0x2169
+	.uleb128 0x34
+	.4byte	0x2159
 	.4byte	.LLST76
-	.uleb128 0x36
+	.uleb128 0x35
 	.4byte	.Ldebug_ranges0+0x180
-	.uleb128 0x3a
-	.4byte	0x2181
-	.uleb128 0x37
-	.4byte	0x218d
+	.uleb128 0x39
+	.4byte	0x2171
+	.uleb128 0x36
+	.4byte	0x217d
 	.4byte	.LLST77
-	.uleb128 0x34
-	.4byte	0x25c9
+	.uleb128 0x33
+	.4byte	0x25b9
 	.8byte	.LBB137
 	.4byte	.Ldebug_ranges0+0x1b0
 	.byte	0x1
-	.2byte	0x1dd
-	.4byte	0x136a
-	.uleb128 0x3b
-	.4byte	0x25ef
-	.uleb128 0x3b
-	.4byte	0x25e4
-	.uleb128 0x3b
-	.4byte	0x25d9
+	.2byte	0x1e9
+	.4byte	0x135a
+	.uleb128 0x3a
+	.4byte	0x25df
+	.uleb128 0x3a
+	.4byte	0x25d4
+	.uleb128 0x3a
+	.4byte	0x25c9
 	.byte	0
-	.uleb128 0x3c
-	.8byte	.LVL205
-	.4byte	0x2751
-	.4byte	0x138e
-	.uleb128 0x31
+	.uleb128 0x3b
+	.8byte	.LVL204
+	.4byte	0x2741
+	.4byte	0x137e
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x87
 	.sleb128 0
-	.uleb128 0x31
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x1
 	.byte	0x30
-	.uleb128 0x31
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
 	.2byte	0x4b0
 	.byte	0
+	.uleb128 0x2f
+	.8byte	.LVL208
+	.4byte	0x274d
 	.uleb128 0x30
-	.8byte	.LVL209
-	.4byte	0x275d
-	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x88
 	.sleb128 0
-	.uleb128 0x31
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	.LANCHOR6
-	.uleb128 0x31
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
@@ -4863,60 +4883,60 @@ __func__.6041:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x34
-	.4byte	0x22ae
+	.uleb128 0x33
+	.4byte	0x229e
 	.8byte	.LBB142
 	.4byte	.Ldebug_ranges0+0x1e0
 	.byte	0x1
-	.2byte	0x238
-	.4byte	0x149e
-	.uleb128 0x35
-	.4byte	0x22bf
+	.2byte	0x244
+	.4byte	0x148e
+	.uleb128 0x34
+	.4byte	0x22af
 	.4byte	.LLST78
-	.uleb128 0x36
+	.uleb128 0x35
 	.4byte	.Ldebug_ranges0+0x1e0
-	.uleb128 0x37
-	.4byte	0x22cb
+	.uleb128 0x36
+	.4byte	0x22bb
 	.4byte	.LLST79
-	.uleb128 0x3a
-	.4byte	0x22d7
-	.uleb128 0x37
-	.4byte	0x22e3
+	.uleb128 0x39
+	.4byte	0x22c7
+	.uleb128 0x36
+	.4byte	0x22d3
 	.4byte	.LLST80
-	.uleb128 0x37
-	.4byte	0x22ed
+	.uleb128 0x36
+	.4byte	0x22dd
 	.4byte	.LLST81
-	.uleb128 0x37
-	.4byte	0x22f7
+	.uleb128 0x36
+	.4byte	0x22e7
 	.4byte	.LLST82
-	.uleb128 0x37
-	.4byte	0x2301
+	.uleb128 0x36
+	.4byte	0x22f1
 	.4byte	.LLST83
-	.uleb128 0x37
-	.4byte	0x230b
+	.uleb128 0x36
+	.4byte	0x22fb
 	.4byte	.LLST84
-	.uleb128 0x37
-	.4byte	0x2317
+	.uleb128 0x36
+	.4byte	0x2307
 	.4byte	.LLST85
-	.uleb128 0x37
-	.4byte	0x2323
+	.uleb128 0x36
+	.4byte	0x2313
 	.4byte	.LLST86
-	.uleb128 0x38
-	.4byte	0x2708
+	.uleb128 0x37
+	.4byte	0x26f8
 	.8byte	.LBB144
 	.8byte	.LBE144-.LBB144
 	.byte	0x1
-	.2byte	0x188
-	.4byte	0x1478
-	.uleb128 0x35
-	.4byte	0x2723
+	.2byte	0x194
+	.4byte	0x1468
+	.uleb128 0x34
+	.4byte	0x2713
 	.4byte	.LLST87
-	.uleb128 0x3b
-	.4byte	0x2718
+	.uleb128 0x3a
+	.4byte	0x2708
+	.uleb128 0x2f
+	.8byte	.LVL211
+	.4byte	0x2736
 	.uleb128 0x30
-	.8byte	.LVL212
-	.4byte	0x2746
-	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0xa
@@ -4927,7 +4947,7 @@ __func__.6041:
 	.byte	0xc
 	.4byte	0xffffffff
 	.byte	0x1a
-	.uleb128 0x31
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x3
@@ -4935,49 +4955,49 @@ __func__.6041:
 	.2byte	0x8000
 	.byte	0
 	.byte	0
-	.uleb128 0x3d
+	.uleb128 0x3c
 	.8byte	.LBB146
 	.8byte	.LBE146-.LBB146
-	.uleb128 0x37
-	.4byte	0x2330
+	.uleb128 0x36
+	.4byte	0x2320
 	.4byte	.LLST88
-	.uleb128 0x37
-	.4byte	0x233c
+	.uleb128 0x36
+	.4byte	0x232c
 	.4byte	.LLST89
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x38
-	.4byte	0x26f0
+	.uleb128 0x37
+	.4byte	0x26e0
 	.8byte	.LBB148
 	.8byte	.LBE148-.LBB148
 	.byte	0x1
-	.2byte	0x23a
-	.4byte	0x14c4
-	.uleb128 0x35
-	.4byte	0x26fc
+	.2byte	0x246
+	.4byte	0x14b4
+	.uleb128 0x34
+	.4byte	0x26ec
 	.4byte	.LLST90
 	.byte	0
-	.uleb128 0x3c
-	.8byte	.LVL194
-	.4byte	0x24b6
-	.4byte	0x14db
-	.uleb128 0x31
+	.uleb128 0x3b
+	.8byte	.LVL193
+	.4byte	0x24a6
+	.4byte	0x14cb
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x1
 	.byte	0x31
 	.byte	0
+	.uleb128 0x2f
+	.8byte	.LVL194
+	.4byte	0x233a
 	.uleb128 0x30
-	.8byte	.LVL195
-	.4byte	0x234a
-	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x84
 	.sleb128 0
-	.uleb128 0x31
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x1
@@ -4985,60 +5005,60 @@ __func__.6041:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x34
-	.4byte	0x1a83
+	.uleb128 0x33
+	.4byte	0x1a73
 	.8byte	.LBB153
 	.4byte	.Ldebug_ranges0+0x210
 	.byte	0x1
-	.2byte	0x31d
-	.4byte	0x1715
-	.uleb128 0x35
-	.4byte	0x1aa0
+	.2byte	0x329
+	.4byte	0x1705
+	.uleb128 0x34
+	.4byte	0x1a90
 	.4byte	.LLST91
-	.uleb128 0x35
-	.4byte	0x1a94
+	.uleb128 0x34
+	.4byte	0x1a84
 	.4byte	.LLST92
-	.uleb128 0x36
+	.uleb128 0x35
 	.4byte	.Ldebug_ranges0+0x210
-	.uleb128 0x3a
-	.4byte	0x1aac
-	.uleb128 0x37
-	.4byte	0x1ab8
+	.uleb128 0x39
+	.4byte	0x1a9c
+	.uleb128 0x36
+	.4byte	0x1aa8
 	.4byte	.LLST93
-	.uleb128 0x37
-	.4byte	0x1ac4
+	.uleb128 0x36
+	.4byte	0x1ab4
 	.4byte	.LLST94
-	.uleb128 0x34
-	.4byte	0x26f0
+	.uleb128 0x33
+	.4byte	0x26e0
 	.8byte	.LBB155
 	.4byte	.Ldebug_ranges0+0x260
 	.byte	0x1
-	.2byte	0x2c5
-	.4byte	0x156b
-	.uleb128 0x35
-	.4byte	0x26fc
+	.2byte	0x2d1
+	.4byte	0x155b
+	.uleb128 0x34
+	.4byte	0x26ec
 	.4byte	.LLST95
-	.uleb128 0x39
-	.8byte	.LVL217
-	.4byte	0x273a
-	.byte	0
 	.uleb128 0x38
-	.4byte	0x2708
+	.8byte	.LVL216
+	.4byte	0x272a
+	.byte	0
+	.uleb128 0x37
+	.4byte	0x26f8
 	.8byte	.LBB158
 	.8byte	.LBE158-.LBB158
 	.byte	0x1
-	.2byte	0x2af
-	.4byte	0x15bd
-	.uleb128 0x35
-	.4byte	0x2723
+	.2byte	0x2bb
+	.4byte	0x15ad
+	.uleb128 0x34
+	.4byte	0x2713
 	.4byte	.LLST96
-	.uleb128 0x35
-	.4byte	0x2718
+	.uleb128 0x34
+	.4byte	0x2708
 	.4byte	.LLST97
+	.uleb128 0x2f
+	.8byte	.LVL259
+	.4byte	0x2736
 	.uleb128 0x30
-	.8byte	.LVL260
-	.4byte	0x2746
-	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0xa
@@ -5052,7 +5072,7 @@ __func__.6041:
 	.byte	0x8
 	.byte	0x20
 	.byte	0x26
-	.uleb128 0x31
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x3
@@ -5060,23 +5080,23 @@ __func__.6041:
 	.2byte	0x8000
 	.byte	0
 	.byte	0
-	.uleb128 0x34
-	.4byte	0x2708
+	.uleb128 0x33
+	.4byte	0x26f8
 	.8byte	.LBB160
 	.4byte	.Ldebug_ranges0+0x290
 	.byte	0x1
-	.2byte	0x2bc
-	.4byte	0x160b
-	.uleb128 0x35
-	.4byte	0x2723
+	.2byte	0x2c8
+	.4byte	0x15fb
+	.uleb128 0x34
+	.4byte	0x2713
 	.4byte	.LLST98
-	.uleb128 0x35
-	.4byte	0x2718
+	.uleb128 0x34
+	.4byte	0x2708
 	.4byte	.LLST99
+	.uleb128 0x2f
+	.8byte	.LVL267
+	.4byte	0x2736
 	.uleb128 0x30
-	.8byte	.LVL268
-	.4byte	0x2746
-	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0xa
@@ -5090,7 +5110,7 @@ __func__.6041:
 	.byte	0x8
 	.byte	0x20
 	.byte	0x26
-	.uleb128 0x31
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x3
@@ -5098,118 +5118,118 @@ __func__.6041:
 	.2byte	0x8000
 	.byte	0
 	.byte	0
-	.uleb128 0x34
-	.4byte	0x2198
+	.uleb128 0x33
+	.4byte	0x2188
 	.8byte	.LBB164
 	.4byte	.Ldebug_ranges0+0x2c0
 	.byte	0x1
-	.2byte	0x2c3
-	.4byte	0x1679
-	.uleb128 0x35
-	.4byte	0x21b1
+	.2byte	0x2cf
+	.4byte	0x1669
+	.uleb128 0x34
+	.4byte	0x21a1
 	.4byte	.LLST100
-	.uleb128 0x35
-	.4byte	0x21a5
+	.uleb128 0x34
+	.4byte	0x2195
 	.4byte	.LLST101
-	.uleb128 0x36
+	.uleb128 0x35
 	.4byte	.Ldebug_ranges0+0x2c0
-	.uleb128 0x37
-	.4byte	0x21bd
+	.uleb128 0x36
+	.4byte	0x21ad
 	.4byte	.LLST102
-	.uleb128 0x3e
-	.4byte	0x21c9
+	.uleb128 0x3d
+	.4byte	0x21b9
 	.uleb128 0x1
 	.byte	0x57
-	.uleb128 0x37
-	.4byte	0x21d5
+	.uleb128 0x36
+	.4byte	0x21c5
 	.4byte	.LLST103
-	.uleb128 0x37
-	.4byte	0x21e1
+	.uleb128 0x36
+	.4byte	0x21d1
 	.4byte	.LLST104
-	.uleb128 0x37
-	.4byte	0x21ed
+	.uleb128 0x36
+	.4byte	0x21dd
 	.4byte	.LLST105
-	.uleb128 0x37
-	.4byte	0x21f9
+	.uleb128 0x36
+	.4byte	0x21e9
 	.4byte	.LLST106
-	.uleb128 0x37
-	.4byte	0x2205
+	.uleb128 0x36
+	.4byte	0x21f5
 	.4byte	.LLST107
 	.byte	0
 	.byte	0
-	.uleb128 0x3c
-	.8byte	.LVL254
-	.4byte	0x24b6
-	.4byte	0x1690
-	.uleb128 0x31
+	.uleb128 0x3b
+	.8byte	.LVL253
+	.4byte	0x24a6
+	.4byte	0x1680
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x1
 	.byte	0x35
 	.byte	0
-	.uleb128 0x3c
-	.8byte	.LVL255
-	.4byte	0x234a
-	.4byte	0x16ad
-	.uleb128 0x31
+	.uleb128 0x3b
+	.8byte	.LVL254
+	.4byte	0x233a
+	.4byte	0x169d
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x84
 	.sleb128 0
-	.uleb128 0x31
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x1
 	.byte	0x40
 	.byte	0
-	.uleb128 0x3c
-	.8byte	.LVL261
-	.4byte	0x1f12
-	.4byte	0x16c5
-	.uleb128 0x31
+	.uleb128 0x3b
+	.8byte	.LVL260
+	.4byte	0x1f02
+	.4byte	0x16b5
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x85
 	.sleb128 0
 	.byte	0
-	.uleb128 0x3c
-	.8byte	.LVL262
-	.4byte	0x24b6
-	.4byte	0x16dc
-	.uleb128 0x31
+	.uleb128 0x3b
+	.8byte	.LVL261
+	.4byte	0x24a6
+	.4byte	0x16cc
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x1
 	.byte	0x34
 	.byte	0
-	.uleb128 0x3c
-	.8byte	.LVL263
-	.4byte	0x234a
-	.4byte	0x16f9
-	.uleb128 0x31
+	.uleb128 0x3b
+	.8byte	.LVL262
+	.4byte	0x233a
+	.4byte	0x16e9
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x84
 	.sleb128 0
-	.uleb128 0x31
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x1
 	.byte	0x40
 	.byte	0
+	.uleb128 0x2f
+	.8byte	.LVL269
+	.4byte	0x2050
 	.uleb128 0x30
-	.8byte	.LVL270
-	.4byte	0x2060
-	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x85
 	.sleb128 0
-	.uleb128 0x31
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
@@ -5218,44 +5238,44 @@ __func__.6041:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x34
-	.4byte	0x1c22
+	.uleb128 0x33
+	.4byte	0x1c12
 	.8byte	.LBB177
 	.4byte	.Ldebug_ranges0+0x310
 	.byte	0x1
-	.2byte	0x2ef
-	.4byte	0x17da
-	.uleb128 0x35
-	.4byte	0x1c3f
+	.2byte	0x2fb
+	.4byte	0x17ca
+	.uleb128 0x34
+	.4byte	0x1c2f
 	.4byte	.LLST108
-	.uleb128 0x35
-	.4byte	0x1c33
+	.uleb128 0x34
+	.4byte	0x1c23
 	.4byte	.LLST109
-	.uleb128 0x36
+	.uleb128 0x35
 	.4byte	.Ldebug_ranges0+0x310
-	.uleb128 0x37
-	.4byte	0x1c4b
+	.uleb128 0x36
+	.4byte	0x1c3b
 	.4byte	.LLST110
-	.uleb128 0x37
-	.4byte	0x1c57
+	.uleb128 0x36
+	.4byte	0x1c47
 	.4byte	.LLST111
-	.uleb128 0x38
-	.4byte	0x2708
+	.uleb128 0x37
+	.4byte	0x26f8
 	.8byte	.LBB179
 	.8byte	.LBE179-.LBB179
 	.byte	0x1
-	.2byte	0x274
-	.4byte	0x17a8
-	.uleb128 0x35
-	.4byte	0x2723
-	.4byte	.LLST112
-	.uleb128 0x35
-	.4byte	0x2718
+	.2byte	0x280
+	.4byte	0x1798
+	.uleb128 0x34
+	.4byte	0x2713
+	.4byte	.LLST112
+	.uleb128 0x34
+	.4byte	0x2708
 	.4byte	.LLST113
+	.uleb128 0x2f
+	.8byte	.LVL242
+	.4byte	0x2736
 	.uleb128 0x30
-	.8byte	.LVL243
-	.4byte	0x2746
-	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0xa
@@ -5269,7 +5289,7 @@ __func__.6041:
 	.byte	0x8
 	.byte	0x20
 	.byte	0x26
-	.uleb128 0x31
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x3
@@ -5277,26 +5297,26 @@ __func__.6041:
 	.2byte	0x8000
 	.byte	0
 	.byte	0
-	.uleb128 0x3c
-	.8byte	.LVL237
-	.4byte	0x24b6
-	.4byte	0x17bf
-	.uleb128 0x31
+	.uleb128 0x3b
+	.8byte	.LVL236
+	.4byte	0x24a6
+	.4byte	0x17af
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x1
 	.byte	0x32
 	.byte	0
+	.uleb128 0x2f
+	.8byte	.LVL237
+	.4byte	0x233a
 	.uleb128 0x30
-	.8byte	.LVL238
-	.4byte	0x234a
-	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x84
 	.sleb128 0
-	.uleb128 0x31
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x1
@@ -5304,44 +5324,44 @@ __func__.6041:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x34
-	.4byte	0x1ad1
+	.uleb128 0x33
+	.4byte	0x1ac1
 	.8byte	.LBB183
 	.4byte	.Ldebug_ranges0+0x340
 	.byte	0x1
-	.2byte	0x323
-	.4byte	0x18ca
-	.uleb128 0x35
-	.4byte	0x1aee
+	.2byte	0x32f
+	.4byte	0x18ba
+	.uleb128 0x34
+	.4byte	0x1ade
 	.4byte	.LLST114
-	.uleb128 0x35
-	.4byte	0x1ae2
+	.uleb128 0x34
+	.4byte	0x1ad2
 	.4byte	.LLST115
-	.uleb128 0x36
+	.uleb128 0x35
 	.4byte	.Ldebug_ranges0+0x340
-	.uleb128 0x37
-	.4byte	0x1afa
+	.uleb128 0x36
+	.4byte	0x1aea
 	.4byte	.LLST116
-	.uleb128 0x37
-	.4byte	0x1b06
+	.uleb128 0x36
+	.4byte	0x1af6
 	.4byte	.LLST117
-	.uleb128 0x38
-	.4byte	0x2708
+	.uleb128 0x37
+	.4byte	0x26f8
 	.8byte	.LBB185
 	.8byte	.LBE185-.LBB185
 	.byte	0x1
-	.2byte	0x29b
-	.4byte	0x186d
-	.uleb128 0x35
-	.4byte	0x2723
+	.2byte	0x2a7
+	.4byte	0x185d
+	.uleb128 0x34
+	.4byte	0x2713
 	.4byte	.LLST118
-	.uleb128 0x35
-	.4byte	0x2718
+	.uleb128 0x34
+	.4byte	0x2708
 	.4byte	.LLST119
+	.uleb128 0x2f
+	.8byte	.LVL294
+	.4byte	0x2736
 	.uleb128 0x30
-	.8byte	.LVL295
-	.4byte	0x2746
-	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0xa
@@ -5355,7 +5375,7 @@ __func__.6041:
 	.byte	0x8
 	.byte	0x20
 	.byte	0x26
-	.uleb128 0x31
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x3
@@ -5363,45 +5383,45 @@ __func__.6041:
 	.2byte	0x8000
 	.byte	0
 	.byte	0
-	.uleb128 0x39
-	.8byte	.LVL247
-	.4byte	0x1f12
-	.uleb128 0x3c
-	.8byte	.LVL287
-	.4byte	0x24b6
-	.4byte	0x1891
-	.uleb128 0x31
+	.uleb128 0x38
+	.8byte	.LVL246
+	.4byte	0x1f02
+	.uleb128 0x3b
+	.8byte	.LVL286
+	.4byte	0x24a6
+	.4byte	0x1881
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x1
 	.byte	0x36
 	.byte	0
-	.uleb128 0x3c
-	.8byte	.LVL288
-	.4byte	0x234a
-	.4byte	0x18ae
-	.uleb128 0x31
+	.uleb128 0x3b
+	.8byte	.LVL287
+	.4byte	0x233a
+	.4byte	0x189e
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x84
 	.sleb128 0
-	.uleb128 0x31
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x1
 	.byte	0x40
 	.byte	0
+	.uleb128 0x2f
+	.8byte	.LVL290
+	.4byte	0x1c96
 	.uleb128 0x30
-	.8byte	.LVL291
-	.4byte	0x1ca6
-	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x83
 	.sleb128 0
-	.uleb128 0x31
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
@@ -5410,50 +5430,50 @@ __func__.6041:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x34
-	.4byte	0x1c64
+	.uleb128 0x33
+	.4byte	0x1c54
 	.8byte	.LBB190
 	.4byte	.Ldebug_ranges0+0x370
 	.byte	0x1
-	.2byte	0x328
-	.4byte	0x1a49
-	.uleb128 0x35
-	.4byte	0x1c81
+	.2byte	0x334
+	.4byte	0x1a39
+	.uleb128 0x34
+	.4byte	0x1c71
 	.4byte	.LLST120
-	.uleb128 0x35
-	.4byte	0x1c75
+	.uleb128 0x34
+	.4byte	0x1c65
 	.4byte	.LLST121
-	.uleb128 0x36
+	.uleb128 0x35
 	.4byte	.Ldebug_ranges0+0x370
-	.uleb128 0x37
-	.4byte	0x1c8d
+	.uleb128 0x36
+	.4byte	0x1c7d
 	.4byte	.LLST122
-	.uleb128 0x37
-	.4byte	0x1c99
+	.uleb128 0x36
+	.4byte	0x1c89
 	.4byte	.LLST123
-	.uleb128 0x34
-	.4byte	0x2708
+	.uleb128 0x33
+	.4byte	0x26f8
 	.8byte	.LBB192
 	.4byte	.Ldebug_ranges0+0x3b0
 	.byte	0x1
-	.2byte	0x262
-	.4byte	0x1951
-	.uleb128 0x35
-	.4byte	0x2723
+	.2byte	0x26e
+	.4byte	0x1941
+	.uleb128 0x34
+	.4byte	0x2713
 	.4byte	.LLST124
-	.uleb128 0x35
-	.4byte	0x2718
+	.uleb128 0x34
+	.4byte	0x2708
 	.4byte	.LLST125
+	.uleb128 0x2f
+	.8byte	.LVL302
+	.4byte	0x2736
 	.uleb128 0x30
-	.8byte	.LVL303
-	.4byte	0x2746
-	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x84
 	.sleb128 0
-	.uleb128 0x31
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x3
@@ -5461,80 +5481,80 @@ __func__.6041:
 	.2byte	0x8000
 	.byte	0
 	.byte	0
-	.uleb128 0x34
-	.4byte	0x200c
+	.uleb128 0x33
+	.4byte	0x1ffc
 	.8byte	.LBB196
 	.4byte	.Ldebug_ranges0+0x3e0
 	.byte	0x1
-	.2byte	0x266
-	.4byte	0x1a16
-	.uleb128 0x35
-	.4byte	0x2025
+	.2byte	0x272
+	.4byte	0x1a06
+	.uleb128 0x34
+	.4byte	0x2015
 	.4byte	.LLST126
-	.uleb128 0x35
-	.4byte	0x2019
+	.uleb128 0x34
+	.4byte	0x2009
 	.4byte	.LLST127
-	.uleb128 0x36
+	.uleb128 0x35
 	.4byte	.Ldebug_ranges0+0x3e0
-	.uleb128 0x3a
-	.4byte	0x2031
-	.uleb128 0x37
-	.4byte	0x203d
+	.uleb128 0x39
+	.4byte	0x2021
+	.uleb128 0x36
+	.4byte	0x202d
 	.4byte	.LLST128
-	.uleb128 0x37
-	.4byte	0x2049
+	.uleb128 0x36
+	.4byte	0x2039
 	.4byte	.LLST129
-	.uleb128 0x37
-	.4byte	0x2055
+	.uleb128 0x36
+	.4byte	0x2045
 	.4byte	.LLST130
-	.uleb128 0x34
-	.4byte	0x25c9
+	.uleb128 0x33
+	.4byte	0x25b9
 	.8byte	.LBB198
 	.4byte	.Ldebug_ranges0+0x420
 	.byte	0x1
-	.2byte	0x203
-	.4byte	0x19d0
-	.uleb128 0x35
-	.4byte	0x25ef
+	.2byte	0x20f
+	.4byte	0x19c0
+	.uleb128 0x34
+	.4byte	0x25df
 	.4byte	.LLST131
-	.uleb128 0x3b
-	.4byte	0x25e4
-	.uleb128 0x35
-	.4byte	0x25d9
+	.uleb128 0x3a
+	.4byte	0x25d4
+	.uleb128 0x34
+	.4byte	0x25c9
 	.4byte	.LLST132
 	.byte	0
-	.uleb128 0x3c
-	.8byte	.LVL309
-	.4byte	0x2751
-	.4byte	0x19ed
-	.uleb128 0x31
+	.uleb128 0x3b
+	.8byte	.LVL308
+	.4byte	0x2741
+	.4byte	0x19dd
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x83
 	.sleb128 0
-	.uleb128 0x31
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x1
 	.byte	0x30
 	.byte	0
+	.uleb128 0x2f
+	.8byte	.LVL318
+	.4byte	0x274d
 	.uleb128 0x30
-	.8byte	.LVL319
-	.4byte	0x275d
-	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x86
 	.sleb128 0
-	.uleb128 0x31
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	gray32_data
-	.uleb128 0x31
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
@@ -5543,26 +5563,26 @@ __func__.6041:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x3c
-	.8byte	.LVL297
-	.4byte	0x24b6
-	.4byte	0x1a2d
-	.uleb128 0x31
+	.uleb128 0x3b
+	.8byte	.LVL296
+	.4byte	0x24a6
+	.4byte	0x1a1d
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x1
 	.byte	0x37
 	.byte	0
+	.uleb128 0x2f
+	.8byte	.LVL297
+	.4byte	0x233a
 	.uleb128 0x30
-	.8byte	.LVL298
-	.4byte	0x234a
-	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x84
 	.sleb128 0
-	.uleb128 0x31
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
@@ -5571,27 +5591,27 @@ __func__.6041:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x3c
-	.8byte	.LVL249
-	.4byte	0x1b13
-	.4byte	0x1a67
-	.uleb128 0x31
+	.uleb128 0x3b
+	.8byte	.LVL248
+	.4byte	0x1b03
+	.4byte	0x1a57
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x83
 	.sleb128 0
-	.uleb128 0x31
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x84
 	.sleb128 0
 	.byte	0
+	.uleb128 0x2f
+	.8byte	.LVL251
+	.4byte	0x271f
 	.uleb128 0x30
-	.8byte	.LVL252
-	.4byte	0x272f
-	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
@@ -5599,124 +5619,124 @@ __func__.6041:
 	.8byte	.LC4
 	.byte	0
 	.byte	0
-	.uleb128 0x3f
-	.4byte	.LASF351
+	.uleb128 0x3e
+	.4byte	.LASF353
 	.byte	0x1
-	.2byte	0x2a4
+	.2byte	0x2b0
 	.4byte	0x54
 	.byte	0x1
-	.4byte	0x1ad1
-	.uleb128 0x40
-	.4byte	.LASF343
+	.4byte	0x1ac1
+	.uleb128 0x3f
+	.4byte	.LASF345
 	.byte	0x1
-	.2byte	0x2a4
-	.4byte	0xe6f
-	.uleb128 0x40
-	.4byte	.LASF348
+	.2byte	0x2b0
+	.4byte	0xe5f
+	.uleb128 0x3f
+	.4byte	.LASF350
 	.byte	0x1
-	.2byte	0x2a4
+	.2byte	0x2b0
 	.4byte	0x54
-	.uleb128 0x32
-	.4byte	.LASF349
+	.uleb128 0x31
+	.4byte	.LASF351
 	.byte	0x1
-	.2byte	0x2a6
-	.4byte	0xe44
-	.uleb128 0x32
-	.4byte	.LASF350
+	.2byte	0x2b2
+	.4byte	0xe34
+	.uleb128 0x31
+	.4byte	.LASF352
 	.byte	0x1
-	.2byte	0x2a7
+	.2byte	0x2b3
 	.4byte	0x54
-	.uleb128 0x32
-	.4byte	.LASF307
+	.uleb128 0x31
+	.4byte	.LASF309
 	.byte	0x1
-	.2byte	0x2a8
+	.2byte	0x2b4
 	.4byte	0x54
 	.byte	0
-	.uleb128 0x3f
-	.4byte	.LASF352
+	.uleb128 0x3e
+	.4byte	.LASF354
 	.byte	0x1
-	.2byte	0x28f
+	.2byte	0x29b
 	.4byte	0x54
 	.byte	0x1
-	.4byte	0x1b13
-	.uleb128 0x40
-	.4byte	.LASF343
+	.4byte	0x1b03
+	.uleb128 0x3f
+	.4byte	.LASF345
 	.byte	0x1
-	.2byte	0x28f
-	.4byte	0xe6f
-	.uleb128 0x40
-	.4byte	.LASF348
+	.2byte	0x29b
+	.4byte	0xe5f
+	.uleb128 0x3f
+	.4byte	.LASF350
 	.byte	0x1
-	.2byte	0x28f
+	.2byte	0x29b
 	.4byte	0x54
-	.uleb128 0x32
-	.4byte	.LASF350
+	.uleb128 0x31
+	.4byte	.LASF352
 	.byte	0x1
-	.2byte	0x291
+	.2byte	0x29d
 	.4byte	0x54
-	.uleb128 0x32
-	.4byte	.LASF307
+	.uleb128 0x31
+	.4byte	.LASF309
 	.byte	0x1
-	.2byte	0x292
+	.2byte	0x29e
 	.4byte	0x54
 	.byte	0
-	.uleb128 0x41
-	.4byte	.LASF355
+	.uleb128 0x40
+	.4byte	.LASF357
 	.byte	0x1
-	.2byte	0x27d
+	.2byte	0x289
 	.4byte	0x54
-	.8byte	.LFB227
-	.8byte	.LFE227-.LFB227
+	.8byte	.LFB229
+	.8byte	.LFE229-.LFB229
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1c22
-	.uleb128 0x2e
-	.4byte	.LASF343
+	.4byte	0x1c12
+	.uleb128 0x2d
+	.4byte	.LASF345
 	.byte	0x1
-	.2byte	0x27d
-	.4byte	0xe6f
+	.2byte	0x289
+	.4byte	0xe5f
 	.4byte	.LLST33
-	.uleb128 0x2e
-	.4byte	.LASF348
+	.uleb128 0x2d
+	.4byte	.LASF350
 	.byte	0x1
-	.2byte	0x27d
+	.2byte	0x289
 	.4byte	0x54
 	.4byte	.LLST34
-	.uleb128 0x2e
-	.4byte	.LASF344
+	.uleb128 0x2d
+	.4byte	.LASF346
 	.byte	0x1
-	.2byte	0x27d
-	.4byte	0xd98
+	.2byte	0x289
+	.4byte	0xd88
 	.4byte	.LLST35
-	.uleb128 0x2f
-	.4byte	.LASF350
+	.uleb128 0x2e
+	.4byte	.LASF352
 	.byte	0x1
-	.2byte	0x27f
+	.2byte	0x28b
 	.4byte	0x54
 	.4byte	.LLST36
-	.uleb128 0x2f
-	.4byte	.LASF307
+	.uleb128 0x2e
+	.4byte	.LASF309
 	.byte	0x1
-	.2byte	0x280
+	.2byte	0x28c
 	.4byte	0x54
 	.4byte	.LLST37
-	.uleb128 0x38
-	.4byte	0x2708
+	.uleb128 0x37
+	.4byte	0x26f8
 	.8byte	.LBB56
 	.8byte	.LBE56-.LBB56
 	.byte	0x1
-	.2byte	0x286
-	.4byte	0x1bd7
-	.uleb128 0x35
-	.4byte	0x2723
+	.2byte	0x292
+	.4byte	0x1bc7
+	.uleb128 0x34
+	.4byte	0x2713
 	.4byte	.LLST38
-	.uleb128 0x35
-	.4byte	0x2718
+	.uleb128 0x34
+	.4byte	0x2708
 	.4byte	.LLST39
+	.uleb128 0x2f
+	.8byte	.LVL147
+	.4byte	0x2736
 	.uleb128 0x30
-	.8byte	.LVL148
-	.4byte	0x2746
-	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0xa
@@ -5730,7 +5750,7 @@ __func__.6041:
 	.byte	0x8
 	.byte	0x20
 	.byte	0x26
-	.uleb128 0x31
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x3
@@ -5738,11 +5758,11 @@ __func__.6041:
 	.2byte	0x8000
 	.byte	0
 	.byte	0
-	.uleb128 0x3c
-	.8byte	.LVL143
-	.4byte	0x24b6
-	.4byte	0x1bf0
-	.uleb128 0x31
+	.uleb128 0x3b
+	.8byte	.LVL142
+	.4byte	0x24a6
+	.4byte	0x1be0
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x3
@@ -5750,26 +5770,26 @@ __func__.6041:
 	.uleb128 0x1
 	.byte	0x52
 	.byte	0
-	.uleb128 0x3c
-	.8byte	.LVL144
-	.4byte	0x234a
-	.4byte	0x1c0d
-	.uleb128 0x31
+	.uleb128 0x3b
+	.8byte	.LVL143
+	.4byte	0x233a
+	.4byte	0x1bfd
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x83
 	.sleb128 0
-	.uleb128 0x31
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x1
 	.byte	0x40
 	.byte	0
+	.uleb128 0x2f
+	.8byte	.LVL148
+	.4byte	0x1f02
 	.uleb128 0x30
-	.8byte	.LVL149
-	.4byte	0x1f12
-	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
@@ -5777,118 +5797,118 @@ __func__.6041:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x3f
-	.4byte	.LASF353
+	.uleb128 0x3e
+	.4byte	.LASF355
 	.byte	0x1
-	.2byte	0x26b
+	.2byte	0x277
 	.4byte	0x54
 	.byte	0x1
-	.4byte	0x1c64
-	.uleb128 0x40
-	.4byte	.LASF343
+	.4byte	0x1c54
+	.uleb128 0x3f
+	.4byte	.LASF345
 	.byte	0x1
-	.2byte	0x26b
-	.4byte	0xe6f
-	.uleb128 0x40
-	.4byte	.LASF348
+	.2byte	0x277
+	.4byte	0xe5f
+	.uleb128 0x3f
+	.4byte	.LASF350
 	.byte	0x1
-	.2byte	0x26b
+	.2byte	0x277
 	.4byte	0x54
-	.uleb128 0x32
-	.4byte	.LASF350
+	.uleb128 0x31
+	.4byte	.LASF352
 	.byte	0x1
-	.2byte	0x26d
+	.2byte	0x279
 	.4byte	0x54
-	.uleb128 0x32
-	.4byte	.LASF307
+	.uleb128 0x31
+	.4byte	.LASF309
 	.byte	0x1
-	.2byte	0x26e
+	.2byte	0x27a
 	.4byte	0x54
 	.byte	0
-	.uleb128 0x3f
-	.4byte	.LASF354
+	.uleb128 0x3e
+	.4byte	.LASF356
 	.byte	0x1
-	.2byte	0x259
+	.2byte	0x265
 	.4byte	0x54
 	.byte	0x1
-	.4byte	0x1ca6
-	.uleb128 0x40
-	.4byte	.LASF343
+	.4byte	0x1c96
+	.uleb128 0x3f
+	.4byte	.LASF345
 	.byte	0x1
-	.2byte	0x259
-	.4byte	0xe6f
-	.uleb128 0x40
-	.4byte	.LASF348
+	.2byte	0x265
+	.4byte	0xe5f
+	.uleb128 0x3f
+	.4byte	.LASF350
 	.byte	0x1
-	.2byte	0x259
+	.2byte	0x265
 	.4byte	0x54
-	.uleb128 0x32
-	.4byte	.LASF350
+	.uleb128 0x31
+	.4byte	.LASF352
 	.byte	0x1
-	.2byte	0x25b
+	.2byte	0x267
 	.4byte	0x54
-	.uleb128 0x32
-	.4byte	.LASF307
+	.uleb128 0x31
+	.4byte	.LASF309
 	.byte	0x1
-	.2byte	0x25c
+	.2byte	0x268
 	.4byte	0x54
 	.byte	0
-	.uleb128 0x41
-	.4byte	.LASF356
+	.uleb128 0x40
+	.4byte	.LASF358
 	.byte	0x1
-	.2byte	0x23f
+	.2byte	0x24b
 	.4byte	0x54
-	.8byte	.LFB224
-	.8byte	.LFE224-.LFB224
+	.8byte	.LFB226
+	.8byte	.LFE226-.LFB226
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1ec4
-	.uleb128 0x2e
-	.4byte	.LASF343
+	.4byte	0x1eb4
+	.uleb128 0x2d
+	.4byte	.LASF345
 	.byte	0x1
-	.2byte	0x23f
-	.4byte	0xe6f
+	.2byte	0x24b
+	.4byte	0xe5f
 	.4byte	.LLST40
-	.uleb128 0x2e
-	.4byte	.LASF348
+	.uleb128 0x2d
+	.4byte	.LASF350
 	.byte	0x1
-	.2byte	0x23f
+	.2byte	0x24b
 	.4byte	0x54
 	.4byte	.LLST41
-	.uleb128 0x32
-	.4byte	.LASF349
+	.uleb128 0x31
+	.4byte	.LASF351
 	.byte	0x1
-	.2byte	0x241
-	.4byte	0xe44
-	.uleb128 0x2f
-	.4byte	.LASF350
+	.2byte	0x24d
+	.4byte	0xe34
+	.uleb128 0x2e
+	.4byte	.LASF352
 	.byte	0x1
-	.2byte	0x242
+	.2byte	0x24e
 	.4byte	0x54
 	.4byte	.LLST42
-	.uleb128 0x2f
-	.4byte	.LASF307
+	.uleb128 0x2e
+	.4byte	.LASF309
 	.byte	0x1
-	.2byte	0x243
+	.2byte	0x24f
 	.4byte	0x54
 	.4byte	.LLST43
-	.uleb128 0x38
-	.4byte	0x2708
+	.uleb128 0x37
+	.4byte	0x26f8
 	.8byte	.LBB66
 	.8byte	.LBE66-.LBB66
 	.byte	0x1
-	.2byte	0x249
-	.4byte	0x1d66
-	.uleb128 0x35
-	.4byte	0x2723
+	.2byte	0x255
+	.4byte	0x1d56
+	.uleb128 0x34
+	.4byte	0x2713
 	.4byte	.LLST44
-	.uleb128 0x35
-	.4byte	0x2718
+	.uleb128 0x34
+	.4byte	0x2708
 	.4byte	.LLST45
+	.uleb128 0x2f
+	.8byte	.LVL158
+	.4byte	0x2736
 	.uleb128 0x30
-	.8byte	.LVL159
-	.4byte	0x2746
-	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0xa
@@ -5902,7 +5922,7 @@ __func__.6041:
 	.byte	0x8
 	.byte	0x20
 	.byte	0x26
-	.uleb128 0x31
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x3
@@ -5910,66 +5930,66 @@ __func__.6041:
 	.2byte	0x8000
 	.byte	0
 	.byte	0
-	.uleb128 0x34
-	.4byte	0x2210
+	.uleb128 0x33
+	.4byte	0x2200
 	.8byte	.LBB68
 	.4byte	.Ldebug_ranges0+0xb0
 	.byte	0x1
-	.2byte	0x252
-	.4byte	0x1e3b
-	.uleb128 0x35
-	.4byte	0x2221
+	.2byte	0x25e
+	.4byte	0x1e2b
+	.uleb128 0x34
+	.4byte	0x2211
 	.4byte	.LLST46
-	.uleb128 0x36
+	.uleb128 0x35
 	.4byte	.Ldebug_ranges0+0xb0
-	.uleb128 0x37
-	.4byte	0x222d
+	.uleb128 0x36
+	.4byte	0x221d
 	.4byte	.LLST47
-	.uleb128 0x3a
-	.4byte	0x2239
-	.uleb128 0x37
-	.4byte	0x2245
+	.uleb128 0x39
+	.4byte	0x2229
+	.uleb128 0x36
+	.4byte	0x2235
 	.4byte	.LLST48
-	.uleb128 0x37
-	.4byte	0x2251
+	.uleb128 0x36
+	.4byte	0x2241
 	.4byte	.LLST49
-	.uleb128 0x37
-	.4byte	0x225d
+	.uleb128 0x36
+	.4byte	0x224d
 	.4byte	.LLST50
-	.uleb128 0x37
-	.4byte	0x2269
+	.uleb128 0x36
+	.4byte	0x2259
 	.4byte	.LLST51
-	.uleb128 0x37
-	.4byte	0x2275
+	.uleb128 0x36
+	.4byte	0x2265
 	.4byte	.LLST52
-	.uleb128 0x37
-	.4byte	0x2281
+	.uleb128 0x36
+	.4byte	0x2271
 	.4byte	.LLST53
-	.uleb128 0x37
-	.4byte	0x228d
+	.uleb128 0x36
+	.4byte	0x227d
 	.4byte	.LLST54
-	.uleb128 0x37
-	.4byte	0x2297
+	.uleb128 0x36
+	.4byte	0x2287
 	.4byte	.LLST55
-	.uleb128 0x37
-	.4byte	0x22a1
+	.uleb128 0x36
+	.4byte	0x2291
 	.4byte	.LLST56
-	.uleb128 0x42
-	.4byte	0x2708
+	.uleb128 0x41
+	.4byte	0x26f8
 	.8byte	.LBB70
 	.8byte	.LBE70-.LBB70
 	.byte	0x1
-	.2byte	0x1a9
-	.uleb128 0x35
-	.4byte	0x2723
+	.2byte	0x1b5
+	.uleb128 0x34
+	.4byte	0x2713
 	.4byte	.LLST57
-	.uleb128 0x35
-	.4byte	0x2718
+	.uleb128 0x34
+	.4byte	0x2708
 	.4byte	.LLST58
+	.uleb128 0x2f
+	.8byte	.LVL162
+	.4byte	0x2736
 	.uleb128 0x30
-	.8byte	.LVL163
-	.4byte	0x2746
-	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0xa
@@ -5980,7 +6000,7 @@ __func__.6041:
 	.byte	0xc
 	.4byte	0xffffffff
 	.byte	0x1a
-	.uleb128 0x31
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x3
@@ -5990,20 +6010,20 @@ __func__.6041:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x38
-	.4byte	0x26f0
+	.uleb128 0x37
+	.4byte	0x26e0
 	.8byte	.LBB73
 	.8byte	.LBE73-.LBB73
 	.byte	0x1
-	.2byte	0x254
-	.4byte	0x1e75
-	.uleb128 0x35
-	.4byte	0x26fc
+	.2byte	0x260
+	.4byte	0x1e65
+	.uleb128 0x34
+	.4byte	0x26ec
 	.4byte	.LLST59
+	.uleb128 0x2f
+	.8byte	.LVL166
+	.4byte	0x272a
 	.uleb128 0x30
-	.8byte	.LVL167
-	.4byte	0x273a
-	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
@@ -6011,42 +6031,42 @@ __func__.6041:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x3c
-	.8byte	.LVL154
-	.4byte	0x24b6
-	.4byte	0x1e8c
-	.uleb128 0x31
+	.uleb128 0x3b
+	.8byte	.LVL153
+	.4byte	0x24a6
+	.4byte	0x1e7c
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x1
 	.byte	0x34
 	.byte	0
-	.uleb128 0x3c
-	.8byte	.LVL155
-	.4byte	0x234a
-	.4byte	0x1ea9
-	.uleb128 0x31
+	.uleb128 0x3b
+	.8byte	.LVL154
+	.4byte	0x233a
+	.4byte	0x1e99
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x83
 	.sleb128 0
-	.uleb128 0x31
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x1
 	.byte	0x40
 	.byte	0
+	.uleb128 0x2f
+	.8byte	.LVL159
+	.4byte	0x2050
 	.uleb128 0x30
-	.8byte	.LVL160
-	.4byte	0x2060
-	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x84
 	.sleb128 0
-	.uleb128 0x31
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
@@ -6054,136 +6074,136 @@ __func__.6041:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x3f
-	.4byte	.LASF357
+	.uleb128 0x3e
+	.4byte	.LASF359
 	.byte	0x1
-	.2byte	0x225
+	.2byte	0x231
 	.4byte	0x54
 	.byte	0x1
-	.4byte	0x1f12
-	.uleb128 0x40
-	.4byte	.LASF343
+	.4byte	0x1f02
+	.uleb128 0x3f
+	.4byte	.LASF345
 	.byte	0x1
-	.2byte	0x225
-	.4byte	0xe6f
-	.uleb128 0x40
-	.4byte	.LASF348
+	.2byte	0x231
+	.4byte	0xe5f
+	.uleb128 0x3f
+	.4byte	.LASF350
 	.byte	0x1
-	.2byte	0x225
+	.2byte	0x231
 	.4byte	0x54
-	.uleb128 0x32
-	.4byte	.LASF349
+	.uleb128 0x31
+	.4byte	.LASF351
 	.byte	0x1
-	.2byte	0x227
-	.4byte	0xe44
-	.uleb128 0x32
-	.4byte	.LASF350
+	.2byte	0x233
+	.4byte	0xe34
+	.uleb128 0x31
+	.4byte	.LASF352
 	.byte	0x1
-	.2byte	0x228
+	.2byte	0x234
 	.4byte	0x54
-	.uleb128 0x32
-	.4byte	.LASF307
+	.uleb128 0x31
+	.4byte	.LASF309
 	.byte	0x1
-	.2byte	0x229
+	.2byte	0x235
 	.4byte	0x54
 	.byte	0
-	.uleb128 0x43
-	.4byte	.LASF360
+	.uleb128 0x42
+	.4byte	.LASF362
 	.byte	0x1
-	.2byte	0x211
-	.8byte	.LFB222
-	.8byte	.LFE222-.LFB222
+	.2byte	0x21d
+	.8byte	.LFB224
+	.8byte	.LFE224-.LFB224
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x200c
-	.uleb128 0x44
+	.4byte	0x1ffc
+	.uleb128 0x43
 	.string	"dst"
 	.byte	0x1
-	.2byte	0x211
-	.4byte	0xe69
+	.2byte	0x21d
+	.4byte	0xe59
 	.4byte	.LLST4
-	.uleb128 0x2e
-	.4byte	.LASF307
+	.uleb128 0x2d
+	.4byte	.LASF309
 	.byte	0x1
-	.2byte	0x211
+	.2byte	0x21d
 	.4byte	0x54
 	.4byte	.LLST5
-	.uleb128 0x32
-	.4byte	.LASF308
+	.uleb128 0x31
+	.4byte	.LASF310
 	.byte	0x1
-	.2byte	0x213
+	.2byte	0x21f
 	.4byte	0x34
-	.uleb128 0x2f
-	.4byte	.LASF358
+	.uleb128 0x2e
+	.4byte	.LASF360
 	.byte	0x1
-	.2byte	0x214
+	.2byte	0x220
 	.4byte	0x54
 	.4byte	.LLST6
-	.uleb128 0x2f
-	.4byte	.LASF359
+	.uleb128 0x2e
+	.4byte	.LASF361
 	.byte	0x1
-	.2byte	0x215
+	.2byte	0x221
 	.4byte	0x54
 	.4byte	.LLST7
-	.uleb128 0x2d
+	.uleb128 0x2c
 	.string	"j"
 	.byte	0x1
-	.2byte	0x216
+	.2byte	0x222
 	.4byte	0x54
 	.4byte	.LLST8
-	.uleb128 0x38
-	.4byte	0x25c9
+	.uleb128 0x37
+	.4byte	0x25b9
 	.8byte	.LBB46
 	.8byte	.LBE46-.LBB46
 	.byte	0x1
-	.2byte	0x21c
-	.4byte	0x1fb6
-	.uleb128 0x3b
-	.4byte	0x25ef
-	.uleb128 0x3b
-	.4byte	0x25e4
-	.uleb128 0x3b
-	.4byte	0x25d9
+	.2byte	0x228
+	.4byte	0x1fa6
+	.uleb128 0x3a
+	.4byte	0x25df
+	.uleb128 0x3a
+	.4byte	0x25d4
+	.uleb128 0x3a
+	.4byte	0x25c9
 	.byte	0
-	.uleb128 0x3c
-	.8byte	.LVL30
-	.4byte	0x2751
-	.4byte	0x1fda
-	.uleb128 0x31
+	.uleb128 0x3b
+	.8byte	.LVL29
+	.4byte	0x2741
+	.4byte	0x1fca
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x85
 	.sleb128 0
-	.uleb128 0x31
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x1
 	.byte	0x30
-	.uleb128 0x31
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
 	.2byte	0x4b00
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL40
-	.4byte	0x275d
-	.uleb128 0x31
+	.uleb128 0x44
+	.8byte	.LVL39
+	.4byte	0x274d
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x3
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x31
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	gray_data
-	.uleb128 0x31
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0xb
@@ -6200,143 +6220,143 @@ __func__.6041:
 	.byte	0x26
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF362
+	.uleb128 0x45
+	.4byte	.LASF364
 	.byte	0x1
-	.2byte	0x1f8
+	.2byte	0x204
 	.byte	0x1
-	.4byte	0x2060
-	.uleb128 0x47
+	.4byte	0x2050
+	.uleb128 0x46
 	.string	"dst"
 	.byte	0x1
-	.2byte	0x1f8
-	.4byte	0xe69
-	.uleb128 0x40
-	.4byte	.LASF307
+	.2byte	0x204
+	.4byte	0xe59
+	.uleb128 0x3f
+	.4byte	.LASF309
 	.byte	0x1
-	.2byte	0x1f8
+	.2byte	0x204
 	.4byte	0x54
-	.uleb128 0x32
-	.4byte	.LASF308
+	.uleb128 0x31
+	.4byte	.LASF310
 	.byte	0x1
-	.2byte	0x1fa
+	.2byte	0x206
 	.4byte	0x34
-	.uleb128 0x32
-	.4byte	.LASF358
+	.uleb128 0x31
+	.4byte	.LASF360
 	.byte	0x1
-	.2byte	0x1fb
+	.2byte	0x207
 	.4byte	0x54
-	.uleb128 0x32
-	.4byte	.LASF359
+	.uleb128 0x31
+	.4byte	.LASF361
 	.byte	0x1
-	.2byte	0x1fc
+	.2byte	0x208
 	.4byte	0x54
-	.uleb128 0x33
+	.uleb128 0x32
 	.string	"j"
 	.byte	0x1
-	.2byte	0x1fd
+	.2byte	0x209
 	.4byte	0x54
 	.byte	0
-	.uleb128 0x43
-	.4byte	.LASF361
+	.uleb128 0x42
+	.4byte	.LASF363
 	.byte	0x1
-	.2byte	0x1e4
-	.8byte	.LFB220
-	.8byte	.LFE220-.LFB220
+	.2byte	0x1f0
+	.8byte	.LFB222
+	.8byte	.LFE222-.LFB222
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x215c
-	.uleb128 0x44
+	.4byte	0x214c
+	.uleb128 0x43
 	.string	"dst"
 	.byte	0x1
-	.2byte	0x1e4
-	.4byte	0xe69
+	.2byte	0x1f0
+	.4byte	0xe59
 	.4byte	.LLST9
-	.uleb128 0x2e
-	.4byte	.LASF307
+	.uleb128 0x2d
+	.4byte	.LASF309
 	.byte	0x1
-	.2byte	0x1e4
+	.2byte	0x1f0
 	.4byte	0x54
 	.4byte	.LLST10
-	.uleb128 0x2f
-	.4byte	.LASF358
+	.uleb128 0x2e
+	.4byte	.LASF360
 	.byte	0x1
-	.2byte	0x1e6
+	.2byte	0x1f2
 	.4byte	0x54
 	.4byte	.LLST11
-	.uleb128 0x2f
-	.4byte	.LASF359
+	.uleb128 0x2e
+	.4byte	.LASF361
 	.byte	0x1
-	.2byte	0x1e7
+	.2byte	0x1f3
 	.4byte	0x54
 	.4byte	.LLST12
-	.uleb128 0x2d
+	.uleb128 0x2c
 	.string	"j"
 	.byte	0x1
-	.2byte	0x1e8
+	.2byte	0x1f4
 	.4byte	0x54
 	.4byte	.LLST13
-	.uleb128 0x48
+	.uleb128 0x47
 	.4byte	.Ldebug_ranges0+0x30
-	.4byte	0x2106
-	.uleb128 0x32
-	.4byte	.LASF308
+	.4byte	0x20f6
+	.uleb128 0x31
+	.4byte	.LASF310
 	.byte	0x1
-	.2byte	0x1ee
+	.2byte	0x1fa
 	.4byte	0x34
-	.uleb128 0x49
-	.4byte	0x25c9
+	.uleb128 0x48
+	.4byte	0x25b9
 	.8byte	.LBB49
 	.4byte	.Ldebug_ranges0+0x80
 	.byte	0x1
-	.2byte	0x1ef
-	.uleb128 0x3b
-	.4byte	0x25ef
-	.uleb128 0x3b
-	.4byte	0x25e4
-	.uleb128 0x3b
-	.4byte	0x25d9
+	.2byte	0x1fb
+	.uleb128 0x3a
+	.4byte	0x25df
+	.uleb128 0x3a
+	.4byte	0x25d4
+	.uleb128 0x3a
+	.4byte	0x25c9
 	.byte	0
 	.byte	0
-	.uleb128 0x3c
-	.8byte	.LVL44
-	.4byte	0x2751
-	.4byte	0x212a
-	.uleb128 0x31
+	.uleb128 0x3b
+	.8byte	.LVL43
+	.4byte	0x2741
+	.4byte	0x211a
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x83
 	.sleb128 0
-	.uleb128 0x31
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x1
 	.byte	0x30
-	.uleb128 0x31
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
 	.2byte	0x960
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL53
-	.4byte	0x275d
-	.uleb128 0x31
+	.uleb128 0x44
+	.8byte	.LVL52
+	.4byte	0x274d
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x3
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x31
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	.LANCHOR2
-	.uleb128 0x31
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0xb
@@ -6353,415 +6373,415 @@ __func__.6041:
 	.byte	0x26
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF363
+	.uleb128 0x45
+	.4byte	.LASF365
 	.byte	0x1
-	.2byte	0x1d6
+	.2byte	0x1e2
 	.byte	0x1
-	.4byte	0x2198
-	.uleb128 0x47
+	.4byte	0x2188
+	.uleb128 0x46
 	.string	"dst"
 	.byte	0x1
-	.2byte	0x1d6
-	.4byte	0xe69
-	.uleb128 0x40
-	.4byte	.LASF307
+	.2byte	0x1e2
+	.4byte	0xe59
+	.uleb128 0x3f
+	.4byte	.LASF309
 	.byte	0x1
-	.2byte	0x1d6
+	.2byte	0x1e2
 	.4byte	0x54
-	.uleb128 0x32
-	.4byte	.LASF308
+	.uleb128 0x31
+	.4byte	.LASF310
 	.byte	0x1
-	.2byte	0x1d8
+	.2byte	0x1e4
 	.4byte	0x34
-	.uleb128 0x33
+	.uleb128 0x32
 	.string	"j"
 	.byte	0x1
-	.2byte	0x1d9
+	.2byte	0x1e5
 	.4byte	0x54
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF364
-	.byte	0x1
-	.2byte	0x1bd
-	.byte	0x1
-	.4byte	0x2210
-	.uleb128 0x40
-	.4byte	.LASF349
+	.uleb128 0x45
+	.4byte	.LASF366
 	.byte	0x1
-	.2byte	0x1bd
-	.4byte	0xe6f
-	.uleb128 0x40
-	.4byte	.LASF343
+	.2byte	0x1c9
 	.byte	0x1
-	.2byte	0x1be
-	.4byte	0xe6f
-	.uleb128 0x32
-	.4byte	.LASF365
+	.4byte	0x2200
+	.uleb128 0x3f
+	.4byte	.LASF351
 	.byte	0x1
-	.2byte	0x1c0
-	.4byte	0x54
-	.uleb128 0x32
-	.4byte	.LASF366
+	.2byte	0x1c9
+	.4byte	0xe5f
+	.uleb128 0x3f
+	.4byte	.LASF345
 	.byte	0x1
-	.2byte	0x1c0
-	.4byte	0x54
-	.uleb128 0x32
+	.2byte	0x1ca
+	.4byte	0xe5f
+	.uleb128 0x31
 	.4byte	.LASF367
 	.byte	0x1
-	.2byte	0x1c0
+	.2byte	0x1cc
 	.4byte	0x54
-	.uleb128 0x32
+	.uleb128 0x31
 	.4byte	.LASF368
 	.byte	0x1
-	.2byte	0x1c1
-	.4byte	0xe69
-	.uleb128 0x32
+	.2byte	0x1cc
+	.4byte	0x54
+	.uleb128 0x31
 	.4byte	.LASF369
 	.byte	0x1
-	.2byte	0x1c1
-	.4byte	0xe69
-	.uleb128 0x32
+	.2byte	0x1cc
+	.4byte	0x54
+	.uleb128 0x31
 	.4byte	.LASF370
 	.byte	0x1
-	.2byte	0x1c2
+	.2byte	0x1cd
+	.4byte	0xe59
+	.uleb128 0x31
+	.4byte	.LASF371
+	.byte	0x1
+	.2byte	0x1cd
+	.4byte	0xe59
+	.uleb128 0x31
+	.4byte	.LASF372
+	.byte	0x1
+	.2byte	0x1ce
 	.4byte	0x54
-	.uleb128 0x33
+	.uleb128 0x32
 	.string	"i"
 	.byte	0x1
-	.2byte	0x1c3
+	.2byte	0x1cf
 	.4byte	0x54
 	.byte	0
+	.uleb128 0x3e
+	.4byte	.LASF373
+	.byte	0x1
+	.2byte	0x1a9
+	.4byte	0xe59
+	.byte	0x1
+	.4byte	0x229e
 	.uleb128 0x3f
-	.4byte	.LASF371
+	.4byte	.LASF351
 	.byte	0x1
-	.2byte	0x19d
-	.4byte	0xe69
+	.2byte	0x1a9
+	.4byte	0xe5f
+	.uleb128 0x31
+	.4byte	.LASF370
 	.byte	0x1
-	.4byte	0x22ae
-	.uleb128 0x40
-	.4byte	.LASF349
+	.2byte	0x1ab
+	.4byte	0xe59
+	.uleb128 0x31
+	.4byte	.LASF371
 	.byte	0x1
-	.2byte	0x19d
-	.4byte	0xe6f
-	.uleb128 0x32
+	.2byte	0x1ab
+	.4byte	0xe59
+	.uleb128 0x31
 	.4byte	.LASF368
 	.byte	0x1
-	.2byte	0x19f
-	.4byte	0xe69
-	.uleb128 0x32
+	.2byte	0x1ac
+	.4byte	0x54
+	.uleb128 0x31
 	.4byte	.LASF369
 	.byte	0x1
-	.2byte	0x19f
-	.4byte	0xe69
-	.uleb128 0x32
-	.4byte	.LASF366
-	.byte	0x1
-	.2byte	0x1a0
+	.2byte	0x1ac
 	.4byte	0x54
-	.uleb128 0x32
-	.4byte	.LASF367
+	.uleb128 0x31
+	.4byte	.LASF374
 	.byte	0x1
-	.2byte	0x1a0
+	.2byte	0x1ac
 	.4byte	0x54
-	.uleb128 0x32
-	.4byte	.LASF372
+	.uleb128 0x31
+	.4byte	.LASF375
 	.byte	0x1
-	.2byte	0x1a0
+	.2byte	0x1ad
 	.4byte	0x54
-	.uleb128 0x32
-	.4byte	.LASF373
+	.uleb128 0x31
+	.4byte	.LASF376
 	.byte	0x1
-	.2byte	0x1a1
+	.2byte	0x1ad
 	.4byte	0x54
 	.uleb128 0x32
-	.4byte	.LASF374
-	.byte	0x1
-	.2byte	0x1a1
-	.4byte	0x54
-	.uleb128 0x33
 	.string	"num"
 	.byte	0x1
-	.2byte	0x1a2
+	.2byte	0x1ae
 	.4byte	0x54
-	.uleb128 0x33
+	.uleb128 0x32
 	.string	"i"
 	.byte	0x1
-	.2byte	0x1a3
+	.2byte	0x1af
 	.4byte	0x54
-	.uleb128 0x33
+	.uleb128 0x32
 	.string	"j"
 	.byte	0x1
-	.2byte	0x1a3
+	.2byte	0x1af
 	.4byte	0x54
-	.uleb128 0x33
+	.uleb128 0x32
 	.string	"len"
 	.byte	0x1
-	.2byte	0x1a4
+	.2byte	0x1b0
 	.4byte	0x54
 	.byte	0
-	.uleb128 0x3f
-	.4byte	.LASF375
+	.uleb128 0x3e
+	.4byte	.LASF377
 	.byte	0x1
-	.2byte	0x17d
-	.4byte	0xe69
+	.2byte	0x189
+	.4byte	0xe59
 	.byte	0x1
-	.4byte	0x234a
-	.uleb128 0x40
-	.4byte	.LASF349
+	.4byte	0x233a
+	.uleb128 0x3f
+	.4byte	.LASF351
 	.byte	0x1
-	.2byte	0x17d
-	.4byte	0xe6f
-	.uleb128 0x32
-	.4byte	.LASF368
+	.2byte	0x189
+	.4byte	0xe5f
+	.uleb128 0x31
+	.4byte	.LASF370
 	.byte	0x1
-	.2byte	0x17f
-	.4byte	0xe69
-	.uleb128 0x32
-	.4byte	.LASF369
+	.2byte	0x18b
+	.4byte	0xe59
+	.uleb128 0x31
+	.4byte	.LASF371
 	.byte	0x1
-	.2byte	0x17f
-	.4byte	0xe69
-	.uleb128 0x33
+	.2byte	0x18b
+	.4byte	0xe59
+	.uleb128 0x32
 	.string	"i"
 	.byte	0x1
-	.2byte	0x180
+	.2byte	0x18c
 	.4byte	0x54
-	.uleb128 0x33
+	.uleb128 0x32
 	.string	"j"
 	.byte	0x1
-	.2byte	0x180
+	.2byte	0x18c
 	.4byte	0x54
-	.uleb128 0x33
+	.uleb128 0x32
 	.string	"k"
 	.byte	0x1
-	.2byte	0x180
+	.2byte	0x18c
 	.4byte	0x54
-	.uleb128 0x33
+	.uleb128 0x32
 	.string	"h"
 	.byte	0x1
-	.2byte	0x180
+	.2byte	0x18c
 	.4byte	0x54
-	.uleb128 0x32
-	.4byte	.LASF376
+	.uleb128 0x31
+	.4byte	.LASF378
 	.byte	0x1
-	.2byte	0x181
+	.2byte	0x18d
 	.4byte	0x54
-	.uleb128 0x33
+	.uleb128 0x32
 	.string	"num"
 	.byte	0x1
-	.2byte	0x182
+	.2byte	0x18e
 	.4byte	0x54
-	.uleb128 0x33
+	.uleb128 0x32
 	.string	"len"
 	.byte	0x1
-	.2byte	0x183
+	.2byte	0x18f
 	.4byte	0x54
-	.uleb128 0x4a
-	.uleb128 0x32
-	.4byte	.LASF370
+	.uleb128 0x49
+	.uleb128 0x31
+	.4byte	.LASF372
 	.byte	0x1
-	.2byte	0x18f
+	.2byte	0x19b
 	.4byte	0x54
-	.uleb128 0x32
-	.4byte	.LASF377
+	.uleb128 0x31
+	.4byte	.LASF379
 	.byte	0x1
-	.2byte	0x190
+	.2byte	0x19c
 	.4byte	0x54
 	.byte	0
 	.byte	0
-	.uleb128 0x41
-	.4byte	.LASF378
+	.uleb128 0x40
+	.4byte	.LASF380
 	.byte	0x1
-	.2byte	0x149
+	.2byte	0x154
 	.4byte	0x54
-	.8byte	.LFB215
-	.8byte	.LFE215-.LFB215
+	.8byte	.LFB217
+	.8byte	.LFE217-.LFB217
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2455
-	.uleb128 0x2e
-	.4byte	.LASF379
+	.4byte	0x2445
+	.uleb128 0x2d
+	.4byte	.LASF381
 	.byte	0x1
-	.2byte	0x149
+	.2byte	0x154
 	.4byte	0x54
 	.4byte	.LLST24
-	.uleb128 0x2e
-	.4byte	.LASF348
+	.uleb128 0x2d
+	.4byte	.LASF350
 	.byte	0x1
-	.2byte	0x149
+	.2byte	0x154
 	.4byte	0x54
 	.4byte	.LLST25
-	.uleb128 0x2e
-	.4byte	.LASF380
+	.uleb128 0x2d
+	.4byte	.LASF382
 	.byte	0x1
-	.2byte	0x149
+	.2byte	0x154
 	.4byte	0x54
 	.4byte	.LLST26
-	.uleb128 0x2f
-	.4byte	.LASF336
+	.uleb128 0x2e
+	.4byte	.LASF338
 	.byte	0x1
-	.2byte	0x14b
+	.2byte	0x156
 	.4byte	0x4ea
 	.4byte	.LLST27
-	.uleb128 0x2f
-	.4byte	.LASF377
+	.uleb128 0x2e
+	.4byte	.LASF379
 	.byte	0x1
-	.2byte	0x14c
+	.2byte	0x157
 	.4byte	0x84
 	.4byte	.LLST28
-	.uleb128 0x2f
-	.4byte	.LASF381
+	.uleb128 0x2e
+	.4byte	.LASF383
 	.byte	0x1
-	.2byte	0x14c
+	.2byte	0x157
 	.4byte	0x84
 	.4byte	.LLST29
-	.uleb128 0x2f
-	.4byte	.LASF382
+	.uleb128 0x2e
+	.4byte	.LASF384
 	.byte	0x1
-	.2byte	0x14c
+	.2byte	0x157
 	.4byte	0x84
 	.4byte	.LLST30
-	.uleb128 0x2f
-	.4byte	.LASF383
+	.uleb128 0x2e
+	.4byte	.LASF385
 	.byte	0x1
-	.2byte	0x14c
+	.2byte	0x157
 	.4byte	0x84
 	.4byte	.LLST31
-	.uleb128 0x32
-	.4byte	.LASF384
+	.uleb128 0x31
+	.4byte	.LASF386
 	.byte	0x1
-	.2byte	0x14d
+	.2byte	0x158
 	.4byte	0x84
-	.uleb128 0x2f
-	.4byte	.LASF385
+	.uleb128 0x2e
+	.4byte	.LASF387
 	.byte	0x1
-	.2byte	0x14e
+	.2byte	0x159
 	.4byte	0x54
 	.4byte	.LLST32
-	.uleb128 0x4b
-	.4byte	.LASF386
-	.4byte	0x2465
+	.uleb128 0x4a
+	.4byte	.LASF388
+	.4byte	0x2455
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6041
-	.uleb128 0x3c
-	.8byte	.LVL125
-	.4byte	0x272f
-	.4byte	0x2447
-	.uleb128 0x31
+	.8byte	__func__.6102
+	.uleb128 0x3b
+	.8byte	.LVL124
+	.4byte	0x271f
+	.4byte	0x2437
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	.LC3
-	.uleb128 0x31
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	.LANCHOR3
 	.byte	0
-	.uleb128 0x4c
-	.8byte	.LVL139
-	.4byte	0x25fb
+	.uleb128 0x4b
+	.8byte	.LVL138
+	.4byte	0x25eb
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xf3
-	.4byte	0x2465
+	.4byte	0x2455
 	.uleb128 0xe
 	.4byte	0xdf
 	.byte	0xe
 	.byte	0
 	.uleb128 0x6
-	.4byte	0x2455
-	.uleb128 0x3f
-	.4byte	.LASF387
+	.4byte	0x2445
+	.uleb128 0x3e
+	.4byte	.LASF389
 	.byte	0x1
-	.2byte	0x135
+	.2byte	0x140
 	.4byte	0x54
 	.byte	0x1
-	.4byte	0x24b6
-	.uleb128 0x40
-	.4byte	.LASF345
+	.4byte	0x24a6
+	.uleb128 0x3f
+	.4byte	.LASF347
 	.byte	0x1
-	.2byte	0x135
+	.2byte	0x140
 	.4byte	0x54
-	.uleb128 0x32
-	.4byte	.LASF336
+	.uleb128 0x31
+	.4byte	.LASF338
 	.byte	0x1
-	.2byte	0x137
+	.2byte	0x142
 	.4byte	0x4ea
-	.uleb128 0x32
-	.4byte	.LASF388
+	.uleb128 0x31
+	.4byte	.LASF390
 	.byte	0x1
-	.2byte	0x138
+	.2byte	0x143
 	.4byte	0x54
-	.uleb128 0x32
-	.4byte	.LASF389
+	.uleb128 0x31
+	.4byte	.LASF391
 	.byte	0x1
-	.2byte	0x139
+	.2byte	0x144
 	.4byte	0x54
-	.uleb128 0x33
+	.uleb128 0x32
 	.string	"i"
 	.byte	0x1
-	.2byte	0x13a
+	.2byte	0x145
 	.4byte	0x54
 	.byte	0
-	.uleb128 0x41
-	.4byte	.LASF390
+	.uleb128 0x40
+	.4byte	.LASF392
 	.byte	0x1
-	.2byte	0x106
+	.2byte	0x111
 	.4byte	0x54
-	.8byte	.LFB213
-	.8byte	.LFE213-.LFB213
+	.8byte	.LFB215
+	.8byte	.LFE215-.LFB215
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2582
-	.uleb128 0x2e
-	.4byte	.LASF344
+	.4byte	0x2572
+	.uleb128 0x2d
+	.4byte	.LASF346
 	.byte	0x1
-	.2byte	0x106
-	.4byte	0xd98
+	.2byte	0x111
+	.4byte	0xd88
 	.4byte	.LLST0
-	.uleb128 0x2f
-	.4byte	.LASF336
+	.uleb128 0x2e
+	.4byte	.LASF338
 	.byte	0x1
-	.2byte	0x108
-	.4byte	0x10ab
+	.2byte	0x113
+	.4byte	0x109b
 	.4byte	.LLST1
-	.uleb128 0x32
-	.4byte	.LASF391
+	.uleb128 0x31
+	.4byte	.LASF393
 	.byte	0x1
-	.2byte	0x109
-	.4byte	0x2582
-	.uleb128 0x2f
-	.4byte	.LASF379
+	.2byte	0x114
+	.4byte	0x2572
+	.uleb128 0x2e
+	.4byte	.LASF381
 	.byte	0x1
-	.2byte	0x10a
+	.2byte	0x115
 	.4byte	0x54
 	.4byte	.LLST2
-	.uleb128 0x34
-	.4byte	0x2588
+	.uleb128 0x33
+	.4byte	0x2578
 	.8byte	.LBB42
 	.4byte	.Ldebug_ranges0+0
 	.byte	0x1
-	.2byte	0x10c
-	.4byte	0x2566
-	.uleb128 0x35
-	.4byte	0x2598
+	.2byte	0x117
+	.4byte	0x2556
+	.uleb128 0x34
+	.4byte	0x2588
 	.4byte	.LLST1
-	.uleb128 0x36
+	.uleb128 0x35
 	.4byte	.Ldebug_ranges0+0
-	.uleb128 0x3e
-	.4byte	0x25a3
+	.uleb128 0x3d
+	.4byte	0x2593
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	pvi_modes.5991
-	.uleb128 0x30
+	.8byte	pvi_modes.6051
+	.uleb128 0x2f
 	.8byte	.LVL4
-	.4byte	0x272f
-	.uleb128 0x31
+	.4byte	0x271f
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
@@ -6770,10 +6790,10 @@ __func__.6041:
 	.byte	0
 	.byte	0
 	.byte	0
+	.uleb128 0x2f
+	.8byte	.LVL23
+	.4byte	0x271f
 	.uleb128 0x30
-	.8byte	.LVL24
-	.4byte	0x272f
-	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
@@ -6784,143 +6804,143 @@ __func__.6041:
 	.uleb128 0x8
 	.byte	0x8
 	.4byte	0x5b
-	.uleb128 0x4d
-	.4byte	.LASF392
+	.uleb128 0x4c
+	.4byte	.LASF394
 	.byte	0x1
 	.byte	0xa0
-	.4byte	0x2582
+	.4byte	0x2572
 	.byte	0x1
-	.4byte	0x25b9
-	.uleb128 0x4e
-	.4byte	.LASF336
+	.4byte	0x25a9
+	.uleb128 0x4d
+	.4byte	.LASF338
 	.byte	0x1
 	.byte	0xa0
-	.4byte	0x10ab
-	.uleb128 0x2a
-	.4byte	.LASF391
+	.4byte	0x109b
+	.uleb128 0x29
+	.4byte	.LASF393
 	.byte	0x1
 	.byte	0xa2
-	.4byte	0x25b9
+	.4byte	0x25a9
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	pvi_modes.5991
+	.8byte	pvi_modes.6051
 	.byte	0
 	.uleb128 0xa
 	.4byte	0x54
-	.4byte	0x25c9
+	.4byte	0x25b9
 	.uleb128 0xe
 	.4byte	0xdf
 	.byte	0x8
 	.byte	0
-	.uleb128 0x4d
-	.4byte	.LASF393
+	.uleb128 0x4c
+	.4byte	.LASF395
 	.byte	0x1
 	.byte	0x9b
 	.4byte	0x34
 	.byte	0x1
-	.4byte	0x25fb
-	.uleb128 0x4e
-	.4byte	.LASF394
+	.4byte	0x25eb
+	.uleb128 0x4d
+	.4byte	.LASF396
 	.byte	0x1
 	.byte	0x9b
 	.4byte	0x54
-	.uleb128 0x4e
-	.4byte	.LASF358
+	.uleb128 0x4d
+	.4byte	.LASF360
 	.byte	0x1
 	.byte	0x9b
 	.4byte	0x54
-	.uleb128 0x4e
-	.4byte	.LASF359
+	.uleb128 0x4d
+	.4byte	.LASF361
 	.byte	0x1
 	.byte	0x9b
 	.4byte	0x54
 	.byte	0
-	.uleb128 0x4f
-	.4byte	.LASF395
+	.uleb128 0x4e
+	.4byte	.LASF397
 	.byte	0x1
 	.byte	0x31
 	.4byte	0x54
-	.8byte	.LFB210
-	.8byte	.LFE210-.LFB210
+	.8byte	.LFB212
+	.8byte	.LFE212-.LFB212
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x26f0
-	.uleb128 0x50
-	.4byte	.LASF308
+	.4byte	0x26e0
+	.uleb128 0x4f
+	.4byte	.LASF310
 	.byte	0x1
 	.byte	0x31
 	.4byte	0x4ea
 	.4byte	.LLST14
-	.uleb128 0x50
-	.4byte	.LASF396
+	.uleb128 0x4f
+	.4byte	.LASF398
 	.byte	0x1
 	.byte	0x31
 	.4byte	0x54
 	.4byte	.LLST15
-	.uleb128 0x50
-	.4byte	.LASF380
+	.uleb128 0x4f
+	.4byte	.LASF382
 	.byte	0x1
 	.byte	0x31
 	.4byte	0x54
 	.4byte	.LLST16
-	.uleb128 0x51
-	.4byte	.LASF397
+	.uleb128 0x50
+	.4byte	.LASF399
 	.byte	0x1
 	.byte	0x33
 	.4byte	0x84
 	.4byte	.LLST17
-	.uleb128 0x51
-	.4byte	.LASF398
+	.uleb128 0x50
+	.4byte	.LASF400
 	.byte	0x1
 	.byte	0x33
 	.4byte	0x84
 	.4byte	.LLST18
-	.uleb128 0x51
-	.4byte	.LASF399
+	.uleb128 0x50
+	.4byte	.LASF401
 	.byte	0x1
 	.byte	0x34
 	.4byte	0x84
 	.4byte	.LLST19
-	.uleb128 0x51
-	.4byte	.LASF385
+	.uleb128 0x50
+	.4byte	.LASF387
 	.byte	0x1
 	.byte	0x35
 	.4byte	0x84
 	.4byte	.LLST20
-	.uleb128 0x51
-	.4byte	.LASF400
+	.uleb128 0x50
+	.4byte	.LASF402
 	.byte	0x1
 	.byte	0x36
 	.4byte	0x34
 	.4byte	.LLST21
-	.uleb128 0x52
+	.uleb128 0x51
 	.string	"i"
 	.byte	0x1
 	.byte	0x37
 	.4byte	0x34
 	.4byte	.LLST22
-	.uleb128 0x51
-	.4byte	.LASF401
+	.uleb128 0x50
+	.4byte	.LASF403
 	.byte	0x1
 	.byte	0x38
 	.4byte	0x15f
 	.4byte	.LLST23
-	.uleb128 0x3c
-	.8byte	.LVL58
-	.4byte	0x2751
-	.4byte	0x26d4
-	.uleb128 0x31
+	.uleb128 0x3b
+	.8byte	.LVL57
+	.4byte	0x2741
+	.4byte	0x26c4
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x88
 	.sleb128 0
-	.uleb128 0x31
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x1
 	.byte	0x30
-	.uleb128 0x31
+	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
@@ -6928,10 +6948,10 @@ __func__.6041:
 	.byte	0x3f
 	.byte	0x24
 	.byte	0
+	.uleb128 0x2f
+	.8byte	.LVL75
+	.4byte	0x271f
 	.uleb128 0x30
-	.8byte	.LVL76
-	.4byte	0x272f
-	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
@@ -6939,59 +6959,59 @@ __func__.6041:
 	.8byte	.LC2
 	.byte	0
 	.byte	0
-	.uleb128 0x53
-	.4byte	.LASF402
+	.uleb128 0x52
+	.4byte	.LASF404
 	.byte	0x2
 	.byte	0x4f
 	.byte	0x3
-	.4byte	0x2708
-	.uleb128 0x4e
-	.4byte	.LASF403
+	.4byte	0x26f8
+	.uleb128 0x4d
+	.4byte	.LASF405
 	.byte	0x2
 	.byte	0x4f
 	.4byte	0x195
 	.byte	0
-	.uleb128 0x4d
-	.4byte	.LASF404
+	.uleb128 0x4c
+	.4byte	.LASF406
 	.byte	0x2
 	.byte	0x38
 	.4byte	0x152
 	.byte	0x3
-	.4byte	0x272f
-	.uleb128 0x4e
+	.4byte	0x271f
+	.uleb128 0x4d
 	.4byte	.LASF33
 	.byte	0x2
 	.byte	0x38
 	.4byte	0x110
-	.uleb128 0x4e
-	.4byte	.LASF405
+	.uleb128 0x4d
+	.4byte	.LASF407
 	.byte	0x2
 	.byte	0x38
 	.4byte	0x147
 	.byte	0
-	.uleb128 0x54
-	.4byte	.LASF406
-	.4byte	.LASF406
+	.uleb128 0x53
+	.4byte	.LASF408
+	.4byte	.LASF408
 	.byte	0x18
 	.byte	0x13
-	.uleb128 0x55
-	.4byte	.LASF407
-	.4byte	.LASF407
+	.uleb128 0x54
+	.4byte	.LASF409
+	.4byte	.LASF409
 	.byte	0x16
 	.2byte	0x399
-	.uleb128 0x54
-	.4byte	.LASF408
-	.4byte	.LASF408
+	.uleb128 0x53
+	.4byte	.LASF410
+	.4byte	.LASF410
 	.byte	0x2
 	.byte	0x36
-	.uleb128 0x55
-	.4byte	.LASF409
-	.4byte	.LASF409
+	.uleb128 0x54
+	.4byte	.LASF411
+	.4byte	.LASF411
 	.byte	0x16
 	.2byte	0x16c
-	.uleb128 0x55
-	.4byte	.LASF410
-	.4byte	.LASF410
+	.uleb128 0x54
+	.4byte	.LASF412
+	.4byte	.LASF412
 	.byte	0x16
 	.2byte	0x16d
 	.byte	0
@@ -7487,15 +7507,6 @@ __func__.6041:
 	.byte	0
 	.byte	0
 	.uleb128 0x28
-	.uleb128 0x15
-	.byte	0x1
-	.uleb128 0x27
-	.uleb128 0x19
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x29
 	.uleb128 0x4
 	.byte	0x1
 	.uleb128 0x3
@@ -7512,7 +7523,7 @@ __func__.6041:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x2a
+	.uleb128 0x29
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7527,7 +7538,7 @@ __func__.6041:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x2b
+	.uleb128 0x2a
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -7554,7 +7565,7 @@ __func__.6041:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x2c
+	.uleb128 0x2b
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7569,7 +7580,7 @@ __func__.6041:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x2d
+	.uleb128 0x2c
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7584,7 +7595,7 @@ __func__.6041:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x2e
+	.uleb128 0x2d
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -7599,7 +7610,7 @@ __func__.6041:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x2f
+	.uleb128 0x2e
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7614,7 +7625,7 @@ __func__.6041:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x30
+	.uleb128 0x2f
 	.uleb128 0x4109
 	.byte	0x1
 	.uleb128 0x11
@@ -7623,7 +7634,7 @@ __func__.6041:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x31
+	.uleb128 0x30
 	.uleb128 0x410a
 	.byte	0
 	.uleb128 0x2
@@ -7632,7 +7643,7 @@ __func__.6041:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x32
+	.uleb128 0x31
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7645,7 +7656,7 @@ __func__.6041:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x33
+	.uleb128 0x32
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7658,7 +7669,7 @@ __func__.6041:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x34
+	.uleb128 0x33
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -7675,7 +7686,7 @@ __func__.6041:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x35
+	.uleb128 0x34
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
@@ -7684,14 +7695,14 @@ __func__.6041:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x36
+	.uleb128 0x35
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x55
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x37
+	.uleb128 0x36
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -7700,7 +7711,7 @@ __func__.6041:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x38
+	.uleb128 0x37
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -7717,7 +7728,7 @@ __func__.6041:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x38
 	.uleb128 0x4109
 	.byte	0
 	.uleb128 0x11
@@ -7726,21 +7737,21 @@ __func__.6041:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3a
+	.uleb128 0x39
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3b
+	.uleb128 0x3a
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x3b
 	.uleb128 0x4109
 	.byte	0x1
 	.uleb128 0x11
@@ -7751,7 +7762,7 @@ __func__.6041:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3d
+	.uleb128 0x3c
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x11
@@ -7760,7 +7771,7 @@ __func__.6041:
 	.uleb128 0x7
 	.byte	0
 	.byte	0
-	.uleb128 0x3e
+	.uleb128 0x3d
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -7769,7 +7780,7 @@ __func__.6041:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x3f
+	.uleb128 0x3e
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -7788,7 +7799,7 @@ __func__.6041:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x40
+	.uleb128 0x3f
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -7801,7 +7812,7 @@ __func__.6041:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x41
+	.uleb128 0x40
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -7826,7 +7837,7 @@ __func__.6041:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x42
+	.uleb128 0x41
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -7841,7 +7852,7 @@ __func__.6041:
 	.uleb128 0x5
 	.byte	0
 	.byte	0
-	.uleb128 0x43
+	.uleb128 0x42
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -7864,7 +7875,7 @@ __func__.6041:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x44
+	.uleb128 0x43
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -7879,7 +7890,7 @@ __func__.6041:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x45
+	.uleb128 0x44
 	.uleb128 0x4109
 	.byte	0x1
 	.uleb128 0x11
@@ -7890,7 +7901,7 @@ __func__.6041:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x46
+	.uleb128 0x45
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -7907,7 +7918,7 @@ __func__.6041:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x47
+	.uleb128 0x46
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -7920,7 +7931,7 @@ __func__.6041:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x48
+	.uleb128 0x47
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x55
@@ -7929,7 +7940,7 @@ __func__.6041:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x49
+	.uleb128 0x48
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -7944,12 +7955,12 @@ __func__.6041:
 	.uleb128 0x5
 	.byte	0
 	.byte	0
-	.uleb128 0x4a
+	.uleb128 0x49
 	.uleb128 0xb
 	.byte	0x1
 	.byte	0
 	.byte	0
-	.uleb128 0x4b
+	.uleb128 0x4a
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7962,7 +7973,7 @@ __func__.6041:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x4c
+	.uleb128 0x4b
 	.uleb128 0x4109
 	.byte	0
 	.uleb128 0x11
@@ -7973,7 +7984,7 @@ __func__.6041:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4d
+	.uleb128 0x4c
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -7992,7 +8003,7 @@ __func__.6041:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4e
+	.uleb128 0x4d
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -8005,7 +8016,7 @@ __func__.6041:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4f
+	.uleb128 0x4e
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -8032,7 +8043,7 @@ __func__.6041:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x50
+	.uleb128 0x4f
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -8047,7 +8058,7 @@ __func__.6041:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x51
+	.uleb128 0x50
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -8062,7 +8073,7 @@ __func__.6041:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x52
+	.uleb128 0x51
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -8077,7 +8088,7 @@ __func__.6041:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x53
+	.uleb128 0x52
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -8094,7 +8105,7 @@ __func__.6041:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x54
+	.uleb128 0x53
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -8111,7 +8122,7 @@ __func__.6041:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x55
+	.uleb128 0x54
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -8132,12 +8143,12 @@ __func__.6041:
 	.section	.debug_loc,"",@progbits
 .Ldebug_loc0:
 .LLST135:
+	.8byte	.LVL333
 	.8byte	.LVL334
-	.8byte	.LVL335
 	.2byte	0x1
 	.byte	0x51
+	.8byte	.LVL334
 	.8byte	.LVL335
-	.8byte	.LVL336
 	.2byte	0x3
 	.byte	0x71
 	.sleb128 1
@@ -8145,32 +8156,32 @@ __func__.6041:
 	.8byte	0
 	.8byte	0
 .LLST133:
+	.8byte	.LVL325
 	.8byte	.LVL326
-	.8byte	.LVL327
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL327
-	.8byte	.LVL329
+	.8byte	.LVL326
+	.8byte	.LVL328
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
+	.8byte	.LVL328
 	.8byte	.LVL329
-	.8byte	.LVL330
 	.2byte	0x1
 	.byte	0x50
+	.8byte	.LVL329
 	.8byte	.LVL330
-	.8byte	.LVL331
 	.2byte	0x9
 	.byte	0x3
 	.8byte	global_waveform
+	.8byte	.LVL330
 	.8byte	.LVL331
-	.8byte	.LVL332
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL332
-	.8byte	.LFE231
+	.8byte	.LVL331
+	.8byte	.LFE233
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -8179,32 +8190,32 @@ __func__.6041:
 	.8byte	0
 	.8byte	0
 .LLST134:
+	.8byte	.LVL325
 	.8byte	.LVL326
-	.8byte	.LVL327
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL327
-	.8byte	.LVL329
+	.8byte	.LVL326
+	.8byte	.LVL328
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
+	.8byte	.LVL328
 	.8byte	.LVL329
-	.8byte	.LVL330
 	.2byte	0x1
 	.byte	0x50
+	.8byte	.LVL329
 	.8byte	.LVL330
-	.8byte	.LVL331
 	.2byte	0x9
 	.byte	0x3
 	.8byte	global_waveform
+	.8byte	.LVL330
 	.8byte	.LVL331
-	.8byte	.LVL332
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL332
-	.8byte	.LFE231
+	.8byte	.LVL331
+	.8byte	.LFE233
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -8213,79 +8224,79 @@ __func__.6041:
 	.8byte	0
 	.8byte	0
 .LLST60:
-	.8byte	.LVL180
-	.8byte	.LVL188
+	.8byte	.LVL179
+	.8byte	.LVL187
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL188
-	.8byte	.LVL191
+	.8byte	.LVL187
+	.8byte	.LVL190
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL191
-	.8byte	.LVL193
+	.8byte	.LVL190
+	.8byte	.LVL192
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL193
-	.8byte	.LVL250
+	.8byte	.LVL192
+	.8byte	.LVL249
 	.2byte	0x1
 	.byte	0x63
+	.8byte	.LVL249
 	.8byte	.LVL250
-	.8byte	.LVL251
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
+	.8byte	.LVL250
 	.8byte	.LVL251
-	.8byte	.LVL252
 	.2byte	0x1
 	.byte	0x63
+	.8byte	.LVL251
 	.8byte	.LVL252
-	.8byte	.LVL253
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL253
-	.8byte	.LVL307
+	.8byte	.LVL252
+	.8byte	.LVL306
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL307
-	.8byte	.LVL320
+	.8byte	.LVL306
+	.8byte	.LVL319
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
+	.8byte	.LVL319
 	.8byte	.LVL320
-	.8byte	.LVL321
 	.2byte	0x1
 	.byte	0x50
+	.8byte	.LVL320
 	.8byte	.LVL321
-	.8byte	.LVL322
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
+	.8byte	.LVL321
 	.8byte	.LVL322
-	.8byte	.LVL323
 	.2byte	0x1
 	.byte	0x50
+	.8byte	.LVL322
 	.8byte	.LVL323
-	.8byte	.LVL324
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
+	.8byte	.LVL323
 	.8byte	.LVL324
-	.8byte	.LVL325
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL325
-	.8byte	.LFE230
+	.8byte	.LVL324
+	.8byte	.LFE232
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -8294,180 +8305,180 @@ __func__.6041:
 	.8byte	0
 	.8byte	0
 .LLST61:
-	.8byte	.LVL180
-	.8byte	.LVL190-1
+	.8byte	.LVL179
+	.8byte	.LVL189-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL190-1
-	.8byte	.LVL191
+	.8byte	.LVL189-1
+	.8byte	.LVL190
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL191
-	.8byte	.LVL193
+	.8byte	.LVL190
+	.8byte	.LVL192
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL193
-	.8byte	.LVL196
+	.8byte	.LVL192
+	.8byte	.LVL195
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL196
-	.8byte	.LVL236
+	.8byte	.LVL195
+	.8byte	.LVL235
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL236
-	.8byte	.LVL244
+	.8byte	.LVL235
+	.8byte	.LVL243
 	.2byte	0x1
 	.byte	0x65
+	.8byte	.LVL243
 	.8byte	.LVL244
-	.8byte	.LVL245
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
+	.8byte	.LVL244
 	.8byte	.LVL245
-	.8byte	.LVL246
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL246
-	.8byte	.LVL248
+	.8byte	.LVL245
+	.8byte	.LVL247
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
+	.8byte	.LVL247
 	.8byte	.LVL248
-	.8byte	.LVL249
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL249
-	.8byte	.LVL251
+	.8byte	.LVL248
+	.8byte	.LVL250
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
+	.8byte	.LVL250
 	.8byte	.LVL251
-	.8byte	.LVL252
 	.2byte	0x1
 	.byte	0x65
+	.8byte	.LVL251
 	.8byte	.LVL252
-	.8byte	.LVL253
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL253
-	.8byte	.LVL256
+	.8byte	.LVL252
+	.8byte	.LVL255
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL256
-	.8byte	.LVL286
+	.8byte	.LVL255
+	.8byte	.LVL285
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL286
-	.8byte	.LVL289
+	.8byte	.LVL285
+	.8byte	.LVL288
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL289
-	.8byte	.LVL296
+	.8byte	.LVL288
+	.8byte	.LVL295
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL296
-	.8byte	.LVL306
+	.8byte	.LVL295
+	.8byte	.LVL305
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL306
-	.8byte	.LVL320
+	.8byte	.LVL305
+	.8byte	.LVL319
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL320
-	.8byte	.LFE230
+	.8byte	.LVL319
+	.8byte	.LFE232
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
 	.8byte	0
 .LLST62:
-	.8byte	.LVL180
-	.8byte	.LVL190-1
+	.8byte	.LVL179
+	.8byte	.LVL189-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL190-1
-	.8byte	.LVL191
+	.8byte	.LVL189-1
+	.8byte	.LVL190
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x52
-	.byte	0x9f
-	.8byte	.LVL191
-	.8byte	.LVL193
+	.byte	0x9f
+	.8byte	.LVL190
+	.8byte	.LVL192
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL193
-	.8byte	.LVL320
+	.8byte	.LVL192
+	.8byte	.LVL319
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x52
 	.byte	0x9f
-	.8byte	.LVL320
-	.8byte	.LFE230
+	.8byte	.LVL319
+	.8byte	.LFE232
 	.2byte	0x1
 	.byte	0x52
 	.8byte	0
 	.8byte	0
 .LLST63:
-	.8byte	.LVL181
-	.8byte	.LVL187
+	.8byte	.LVL180
+	.8byte	.LVL186
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL191
-	.8byte	.LVL193
+	.8byte	.LVL190
+	.8byte	.LVL192
 	.2byte	0x1
 	.byte	0x52
 	.8byte	0
 	.8byte	0
 .LLST64:
-	.8byte	.LVL181
-	.8byte	.LVL187
+	.8byte	.LVL180
+	.8byte	.LVL186
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL191
-	.8byte	.LVL193
+	.8byte	.LVL190
+	.8byte	.LVL192
 	.2byte	0x1
 	.byte	0x54
 	.8byte	0
 	.8byte	0
 .LLST65:
-	.8byte	.LVL181
-	.8byte	.LVL183
+	.8byte	.LVL180
+	.8byte	.LVL182
 	.2byte	0x1
 	.byte	0x64
+	.8byte	.LVL182
 	.8byte	.LVL183
-	.8byte	.LVL184
 	.2byte	0x3
 	.byte	0x84
 	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL184
-	.8byte	.LVL186
+	.8byte	.LVL183
+	.8byte	.LVL185
 	.2byte	0x1
 	.byte	0x64
+	.8byte	.LVL185
 	.8byte	.LVL186
-	.8byte	.LVL187
 	.2byte	0x8
 	.byte	0x74
 	.sleb128 38
@@ -8477,12 +8488,12 @@ __func__.6041:
 	.byte	0xff
 	.byte	0x1a
 	.byte	0x9f
+	.8byte	.LVL190
 	.8byte	.LVL191
-	.8byte	.LVL192
 	.2byte	0x1
 	.byte	0x64
+	.8byte	.LVL191
 	.8byte	.LVL192
-	.8byte	.LVL193
 	.2byte	0x8
 	.byte	0x74
 	.sleb128 38
@@ -8495,24 +8506,24 @@ __func__.6041:
 	.8byte	0
 	.8byte	0
 .LLST66:
-	.8byte	.LVL181
-	.8byte	.LVL183
+	.8byte	.LVL180
+	.8byte	.LVL182
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
+	.8byte	.LVL182
 	.8byte	.LVL183
-	.8byte	.LVL184
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL184
-	.8byte	.LVL186
+	.8byte	.LVL183
+	.8byte	.LVL185
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL191
-	.8byte	.LVL193
+	.8byte	.LVL190
+	.8byte	.LVL192
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
@@ -8520,154 +8531,154 @@ __func__.6041:
 	.8byte	0
 	.8byte	0
 .LLST67:
-	.8byte	.LVL182
-	.8byte	.LVL185
+	.8byte	.LVL181
+	.8byte	.LVL184
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL185
-	.8byte	.LVL187
+	.8byte	.LVL184
+	.8byte	.LVL186
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL191
-	.8byte	.LVL193
+	.8byte	.LVL190
+	.8byte	.LVL192
 	.2byte	0x1
 	.byte	0x53
 	.8byte	0
 	.8byte	0
 .LLST68:
-	.8byte	.LVL189
-	.8byte	.LVL190-1
+	.8byte	.LVL188
+	.8byte	.LVL189-1
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
 .LLST69:
-	.8byte	.LVL193
-	.8byte	.LVL197
+	.8byte	.LVL192
+	.8byte	.LVL196
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
 .LLST70:
-	.8byte	.LVL193
-	.8byte	.LVL216
+	.8byte	.LVL192
+	.8byte	.LVL215
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL218
-	.8byte	.LVL236
+	.8byte	.LVL217
+	.8byte	.LVL235
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
 .LLST71:
-	.8byte	.LVL194
-	.8byte	.LVL195-1
+	.8byte	.LVL193
+	.8byte	.LVL194-1
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
 .LLST72:
-	.8byte	.LVL198
-	.8byte	.LVL200
+	.8byte	.LVL197
+	.8byte	.LVL199
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL200
-	.8byte	.LVL216
+	.8byte	.LVL199
+	.8byte	.LVL215
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL218
-	.8byte	.LVL236
+	.8byte	.LVL217
+	.8byte	.LVL235
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
 .LLST73:
-	.8byte	.LVL199
-	.8byte	.LVL202
+	.8byte	.LVL198
+	.8byte	.LVL201
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
 .LLST74:
-	.8byte	.LVL199
-	.8byte	.LVL202
+	.8byte	.LVL198
+	.8byte	.LVL201
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
 .LLST75:
-	.8byte	.LVL203
-	.8byte	.LVL209
+	.8byte	.LVL202
+	.8byte	.LVL208
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL218
-	.8byte	.LVL221
+	.8byte	.LVL217
+	.8byte	.LVL220
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
 .LLST76:
+	.8byte	.LVL202
 	.8byte	.LVL203
-	.8byte	.LVL204
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL204
-	.8byte	.LVL209
+	.8byte	.LVL203
+	.8byte	.LVL208
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL218
-	.8byte	.LVL221
+	.8byte	.LVL217
+	.8byte	.LVL220
 	.2byte	0x1
 	.byte	0x68
 	.8byte	0
 	.8byte	0
 .LLST77:
+	.8byte	.LVL204
 	.8byte	.LVL205
-	.8byte	.LVL206
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
+	.8byte	.LVL206
 	.8byte	.LVL207
-	.8byte	.LVL208
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL208
-	.8byte	.LVL209-1
+	.8byte	.LVL207
+	.8byte	.LVL208-1
 	.2byte	0x1
 	.byte	0x53
+	.8byte	.LVL217
 	.8byte	.LVL218
-	.8byte	.LVL219
 	.2byte	0x1
 	.byte	0x52
+	.8byte	.LVL218
 	.8byte	.LVL219
-	.8byte	.LVL220
 	.2byte	0x1
 	.byte	0x53
 	.8byte	0
 	.8byte	0
 .LLST78:
-	.8byte	.LVL210
-	.8byte	.LVL214
+	.8byte	.LVL209
+	.8byte	.LVL213
 	.2byte	0x6
 	.byte	0xf2
-	.4byte	.Ldebug_info0+4776
+	.4byte	.Ldebug_info0+4760
 	.sleb128 0
-	.8byte	.LVL221
-	.8byte	.LVL236
+	.8byte	.LVL220
+	.8byte	.LVL235
 	.2byte	0x6
 	.byte	0xf2
-	.4byte	.Ldebug_info0+4776
+	.4byte	.Ldebug_info0+4760
 	.sleb128 0
 	.8byte	0
 	.8byte	0
 .LLST79:
-	.8byte	.LVL211
-	.8byte	.LVL213
+	.8byte	.LVL210
+	.8byte	.LVL212
 	.2byte	0x1
 	.byte	0x68
+	.8byte	.LVL212
 	.8byte	.LVL213
-	.8byte	.LVL214
 	.2byte	0x8
 	.byte	0x72
 	.sleb128 0
@@ -8677,8 +8688,8 @@ __func__.6041:
 	.sleb128 0
 	.byte	0x22
 	.byte	0x9f
-	.8byte	.LVL221
-	.8byte	.LVL234
+	.8byte	.LVL220
+	.8byte	.LVL233
 	.2byte	0x8
 	.byte	0x72
 	.sleb128 1
@@ -8688,8 +8699,8 @@ __func__.6041:
 	.sleb128 0
 	.byte	0x22
 	.byte	0x9f
+	.8byte	.LVL233
 	.8byte	.LVL234
-	.8byte	.LVL235
 	.2byte	0x8
 	.byte	0x72
 	.sleb128 0
@@ -8699,23 +8710,23 @@ __func__.6041:
 	.sleb128 0
 	.byte	0x22
 	.byte	0x9f
+	.8byte	.LVL234
 	.8byte	.LVL235
-	.8byte	.LVL236
 	.2byte	0x1
 	.byte	0x68
 	.8byte	0
 	.8byte	0
 .LLST80:
+	.8byte	.LVL212
 	.8byte	.LVL213
-	.8byte	.LVL214
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL221
-	.8byte	.LVL233
+	.8byte	.LVL220
+	.8byte	.LVL232
 	.2byte	0x1
 	.byte	0x52
+	.8byte	.LVL232
 	.8byte	.LVL233
-	.8byte	.LVL234
 	.2byte	0x3
 	.byte	0x72
 	.sleb128 1
@@ -8723,17 +8734,17 @@ __func__.6041:
 	.8byte	0
 	.8byte	0
 .LLST81:
+	.8byte	.LVL221
 	.8byte	.LVL222
-	.8byte	.LVL223
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL223
-	.8byte	.LVL231
+	.8byte	.LVL222
+	.8byte	.LVL230
 	.2byte	0x1
 	.byte	0x53
+	.8byte	.LVL230
 	.8byte	.LVL231
-	.8byte	.LVL232
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 1
@@ -8741,20 +8752,20 @@ __func__.6041:
 	.8byte	0
 	.8byte	0
 .LLST82:
+	.8byte	.LVL223
 	.8byte	.LVL224
-	.8byte	.LVL225
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
 .LLST83:
+	.8byte	.LVL227
 	.8byte	.LVL228
-	.8byte	.LVL229
 	.2byte	0x1
 	.byte	0x51
+	.8byte	.LVL228
 	.8byte	.LVL229
-	.8byte	.LVL230
 	.2byte	0x3
 	.byte	0x71
 	.sleb128 1
@@ -8762,36 +8773,36 @@ __func__.6041:
 	.8byte	0
 	.8byte	0
 .LLST84:
-	.8byte	.LVL222
-	.8byte	.LVL235
+	.8byte	.LVL221
+	.8byte	.LVL234
 	.2byte	0x1
 	.byte	0x56
 	.8byte	0
 	.8byte	0
 .LLST85:
-	.8byte	.LVL210
-	.8byte	.LVL213
+	.8byte	.LVL209
+	.8byte	.LVL212
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
+	.8byte	.LVL212
 	.8byte	.LVL213
-	.8byte	.LVL214
 	.2byte	0x5
 	.byte	0x72
 	.sleb128 0
 	.byte	0x38
 	.byte	0x24
 	.byte	0x9f
-	.8byte	.LVL221
-	.8byte	.LVL223
+	.8byte	.LVL220
+	.8byte	.LVL222
 	.2byte	0x5
 	.byte	0x72
 	.sleb128 0
 	.byte	0x38
 	.byte	0x24
 	.byte	0x9f
-	.8byte	.LVL223
-	.8byte	.LVL228
+	.8byte	.LVL222
+	.8byte	.LVL227
 	.2byte	0xa
 	.byte	0x73
 	.sleb128 0
@@ -8803,8 +8814,8 @@ __func__.6041:
 	.byte	0x24
 	.byte	0x22
 	.byte	0x9f
+	.8byte	.LVL227
 	.8byte	.LVL228
-	.8byte	.LVL229
 	.2byte	0xd
 	.byte	0x73
 	.sleb128 0
@@ -8819,8 +8830,8 @@ __func__.6041:
 	.sleb128 0
 	.byte	0x22
 	.byte	0x9f
+	.8byte	.LVL228
 	.8byte	.LVL229
-	.8byte	.LVL230
 	.2byte	0xf
 	.byte	0x73
 	.sleb128 0
@@ -8837,8 +8848,8 @@ __func__.6041:
 	.byte	0x23
 	.uleb128 0x1
 	.byte	0x9f
+	.8byte	.LVL230
 	.8byte	.LVL231
-	.8byte	.LVL232
 	.2byte	0xc
 	.byte	0x73
 	.sleb128 0
@@ -8852,39 +8863,39 @@ __func__.6041:
 	.byte	0x23
 	.uleb128 0x10
 	.byte	0x9f
+	.8byte	.LVL234
 	.8byte	.LVL235
-	.8byte	.LVL236
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
 .LLST86:
-	.8byte	.LVL211
-	.8byte	.LVL214
+	.8byte	.LVL210
+	.8byte	.LVL213
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL221
-	.8byte	.LVL236
+	.8byte	.LVL220
+	.8byte	.LVL235
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
 .LLST87:
+	.8byte	.LVL210
 	.8byte	.LVL211
-	.8byte	.LVL212
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
 .LLST88:
-	.8byte	.LVL224
-	.8byte	.LVL227
+	.8byte	.LVL223
+	.8byte	.LVL226
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL227
-	.8byte	.LVL232
+	.8byte	.LVL226
+	.8byte	.LVL231
 	.2byte	0xd
 	.byte	0x76
 	.sleb128 0
@@ -8902,85 +8913,85 @@ __func__.6041:
 	.8byte	0
 	.8byte	0
 .LLST89:
+	.8byte	.LVL223
 	.8byte	.LVL224
-	.8byte	.LVL225
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL225
-	.8byte	.LVL235
+	.8byte	.LVL224
+	.8byte	.LVL234
 	.2byte	0x1
 	.byte	0x55
 	.8byte	0
 	.8byte	0
 .LLST90:
+	.8byte	.LVL214
 	.8byte	.LVL215
-	.8byte	.LVL216
 	.2byte	0x1
 	.byte	0x68
 	.8byte	0
 	.8byte	0
 .LLST91:
-	.8byte	.LVL253
-	.8byte	.LVL264
+	.8byte	.LVL252
+	.8byte	.LVL263
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
 .LLST92:
-	.8byte	.LVL253
-	.8byte	.LVL286
+	.8byte	.LVL252
+	.8byte	.LVL285
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
 .LLST93:
-	.8byte	.LVL254
-	.8byte	.LVL255-1
+	.8byte	.LVL253
+	.8byte	.LVL254-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL262
-	.8byte	.LVL263-1
+	.8byte	.LVL261
+	.8byte	.LVL262-1
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
 .LLST94:
-	.8byte	.LVL256
-	.8byte	.LVL258
+	.8byte	.LVL255
+	.8byte	.LVL257
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL258
-	.8byte	.LVL264
+	.8byte	.LVL257
+	.8byte	.LVL263
 	.2byte	0x1
 	.byte	0x65
+	.8byte	.LVL263
 	.8byte	.LVL264
-	.8byte	.LVL265
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL265
-	.8byte	.LVL272
+	.8byte	.LVL264
+	.8byte	.LVL271
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
 .LLST95:
+	.8byte	.LVL273
 	.8byte	.LVL274
-	.8byte	.LVL275
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
 .LLST96:
-	.8byte	.LVL257
-	.8byte	.LVL260
+	.8byte	.LVL256
+	.8byte	.LVL259
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
 .LLST97:
+	.8byte	.LVL256
 	.8byte	.LVL257
-	.8byte	.LVL258
 	.2byte	0xb
 	.byte	0x70
 	.sleb128 0
@@ -8993,8 +9004,8 @@ __func__.6041:
 	.byte	0x20
 	.byte	0x26
 	.byte	0x9f
+	.8byte	.LVL257
 	.8byte	.LVL258
-	.8byte	.LVL259
 	.2byte	0xb
 	.byte	0x85
 	.sleb128 0
@@ -9007,12 +9018,12 @@ __func__.6041:
 	.byte	0x20
 	.byte	0x26
 	.byte	0x9f
-	.8byte	.LVL259
-	.8byte	.LVL260-1
+	.8byte	.LVL258
+	.8byte	.LVL259-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL260-1
-	.8byte	.LVL260
+	.8byte	.LVL259-1
+	.8byte	.LVL259
 	.2byte	0xb
 	.byte	0x85
 	.sleb128 0
@@ -9028,16 +9039,16 @@ __func__.6041:
 	.8byte	0
 	.8byte	0
 .LLST98:
-	.8byte	.LVL266
-	.8byte	.LVL269
+	.8byte	.LVL265
+	.8byte	.LVL268
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
 .LLST99:
+	.8byte	.LVL265
 	.8byte	.LVL266
-	.8byte	.LVL267
 	.2byte	0xb
 	.byte	0x84
 	.sleb128 0
@@ -9050,12 +9061,12 @@ __func__.6041:
 	.byte	0x20
 	.byte	0x26
 	.byte	0x9f
-	.8byte	.LVL267
-	.8byte	.LVL268-1
+	.8byte	.LVL266
+	.8byte	.LVL267-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL268-1
-	.8byte	.LVL269
+	.8byte	.LVL267-1
+	.8byte	.LVL268
 	.2byte	0xb
 	.byte	0x84
 	.sleb128 0
@@ -9071,39 +9082,39 @@ __func__.6041:
 	.8byte	0
 	.8byte	0
 .LLST100:
-	.8byte	.LVL271
-	.8byte	.LVL286
+	.8byte	.LVL270
+	.8byte	.LVL285
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
 .LLST101:
-	.8byte	.LVL271
-	.8byte	.LVL274
+	.8byte	.LVL270
+	.8byte	.LVL273
 	.2byte	0x6
 	.byte	0xf2
-	.4byte	.Ldebug_info0+5413
+	.4byte	.Ldebug_info0+5397
 	.sleb128 0
-	.8byte	.LVL275
-	.8byte	.LVL286
+	.8byte	.LVL274
+	.8byte	.LVL285
 	.2byte	0x6
 	.byte	0xf2
-	.4byte	.Ldebug_info0+5413
+	.4byte	.Ldebug_info0+5397
 	.sleb128 0
 	.8byte	0
 	.8byte	0
 .LLST102:
+	.8byte	.LVL275
 	.8byte	.LVL276
-	.8byte	.LVL277
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL277
-	.8byte	.LVL282
+	.8byte	.LVL276
+	.8byte	.LVL281
 	.2byte	0x1
 	.byte	0x51
+	.8byte	.LVL281
 	.8byte	.LVL282
-	.8byte	.LVL283
 	.2byte	0x3
 	.byte	0x71
 	.sleb128 1
@@ -9111,29 +9122,29 @@ __func__.6041:
 	.8byte	0
 	.8byte	0
 .LLST103:
-	.8byte	.LVL276
-	.8byte	.LVL286
+	.8byte	.LVL275
+	.8byte	.LVL285
 	.2byte	0x1
 	.byte	0x56
 	.8byte	0
 	.8byte	0
 .LLST104:
-	.8byte	.LVL271
-	.8byte	.LVL273
+	.8byte	.LVL270
+	.8byte	.LVL272
 	.2byte	0x1
 	.byte	0x65
+	.8byte	.LVL272
 	.8byte	.LVL273
-	.8byte	.LVL274
 	.2byte	0x3
 	.byte	0x72
 	.sleb128 -4
 	.byte	0x9f
-	.8byte	.LVL275
-	.8byte	.LVL285
+	.8byte	.LVL274
+	.8byte	.LVL284
 	.2byte	0x1
 	.byte	0x52
+	.8byte	.LVL284
 	.8byte	.LVL285
-	.8byte	.LVL286
 	.2byte	0x3
 	.byte	0x72
 	.sleb128 -8
@@ -9141,16 +9152,16 @@ __func__.6041:
 	.8byte	0
 	.8byte	0
 .LLST105:
-	.8byte	.LVL271
-	.8byte	.LVL274
+	.8byte	.LVL270
+	.8byte	.LVL273
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL275
-	.8byte	.LVL277
+	.8byte	.LVL274
+	.8byte	.LVL276
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL277
-	.8byte	.LVL282
+	.8byte	.LVL276
+	.8byte	.LVL281
 	.2byte	0x8
 	.byte	0x71
 	.sleb128 0
@@ -9160,8 +9171,8 @@ __func__.6041:
 	.sleb128 0
 	.byte	0x22
 	.byte	0x9f
+	.8byte	.LVL281
 	.8byte	.LVL282
-	.8byte	.LVL283
 	.2byte	0x8
 	.byte	0x71
 	.sleb128 1
@@ -9171,8 +9182,8 @@ __func__.6041:
 	.sleb128 0
 	.byte	0x22
 	.byte	0x9f
+	.8byte	.LVL282
 	.8byte	.LVL283
-	.8byte	.LVL284
 	.2byte	0x8
 	.byte	0x71
 	.sleb128 0
@@ -9182,8 +9193,8 @@ __func__.6041:
 	.sleb128 0
 	.byte	0x22
 	.byte	0x9f
-	.8byte	.LVL284
-	.8byte	.LVL286
+	.8byte	.LVL283
+	.8byte	.LVL285
 	.2byte	0xb
 	.byte	0x71
 	.sleb128 0
@@ -9199,16 +9210,16 @@ __func__.6041:
 	.8byte	0
 	.8byte	0
 .LLST106:
+	.8byte	.LVL277
 	.8byte	.LVL278
-	.8byte	.LVL279
 	.2byte	0x1
 	.byte	0x50
+	.8byte	.LVL278
 	.8byte	.LVL279
-	.8byte	.LVL280
 	.2byte	0x1
 	.byte	0x54
+	.8byte	.LVL279
 	.8byte	.LVL280
-	.8byte	.LVL281
 	.2byte	0x13
 	.byte	0x77
 	.sleb128 0
@@ -9229,8 +9240,8 @@ __func__.6041:
 	.sleb128 0
 	.byte	0x21
 	.byte	0x9f
-	.8byte	.LVL281
-	.8byte	.LVL283
+	.8byte	.LVL280
+	.8byte	.LVL282
 	.2byte	0x17
 	.byte	0x77
 	.sleb128 0
@@ -9258,64 +9269,64 @@ __func__.6041:
 	.8byte	0
 	.8byte	0
 .LLST107:
-	.8byte	.LVL271
-	.8byte	.LVL273
+	.8byte	.LVL270
+	.8byte	.LVL272
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
 .LLST108:
-	.8byte	.LVL236
-	.8byte	.LVL239
+	.8byte	.LVL235
+	.8byte	.LVL238
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
 .LLST109:
-	.8byte	.LVL236
-	.8byte	.LVL244
+	.8byte	.LVL235
+	.8byte	.LVL243
 	.2byte	0x1
 	.byte	0x63
+	.8byte	.LVL244
 	.8byte	.LVL245
-	.8byte	.LVL246
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
 .LLST110:
-	.8byte	.LVL237
-	.8byte	.LVL238-1
+	.8byte	.LVL236
+	.8byte	.LVL237-1
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
 .LLST111:
-	.8byte	.LVL239
-	.8byte	.LVL241
+	.8byte	.LVL238
+	.8byte	.LVL240
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL241
-	.8byte	.LVL244
+	.8byte	.LVL240
+	.8byte	.LVL243
 	.2byte	0x1
 	.byte	0x64
+	.8byte	.LVL244
 	.8byte	.LVL245
-	.8byte	.LVL246
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
 .LLST112:
-	.8byte	.LVL240
-	.8byte	.LVL243
+	.8byte	.LVL239
+	.8byte	.LVL242
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
 .LLST113:
+	.8byte	.LVL239
 	.8byte	.LVL240
-	.8byte	.LVL241
 	.2byte	0xb
 	.byte	0x70
 	.sleb128 0
@@ -9328,8 +9339,8 @@ __func__.6041:
 	.byte	0x20
 	.byte	0x26
 	.byte	0x9f
+	.8byte	.LVL240
 	.8byte	.LVL241
-	.8byte	.LVL242
 	.2byte	0xb
 	.byte	0x84
 	.sleb128 0
@@ -9342,12 +9353,12 @@ __func__.6041:
 	.byte	0x20
 	.byte	0x26
 	.byte	0x9f
-	.8byte	.LVL242
-	.8byte	.LVL243-1
+	.8byte	.LVL241
+	.8byte	.LVL242-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL243-1
-	.8byte	.LVL243
+	.8byte	.LVL242-1
+	.8byte	.LVL242
 	.2byte	0xb
 	.byte	0x84
 	.sleb128 0
@@ -9363,60 +9374,60 @@ __func__.6041:
 	.8byte	0
 	.8byte	0
 .LLST114:
-	.8byte	.LVL286
-	.8byte	.LVL290
+	.8byte	.LVL285
+	.8byte	.LVL289
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL292
-	.8byte	.LVL296
+	.8byte	.LVL291
+	.8byte	.LVL295
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
 .LLST115:
-	.8byte	.LVL286
-	.8byte	.LVL290
+	.8byte	.LVL285
+	.8byte	.LVL289
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL292
-	.8byte	.LVL296
+	.8byte	.LVL291
+	.8byte	.LVL295
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
 .LLST116:
-	.8byte	.LVL287
-	.8byte	.LVL288-1
+	.8byte	.LVL286
+	.8byte	.LVL287-1
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
 .LLST117:
+	.8byte	.LVL288
 	.8byte	.LVL289
-	.8byte	.LVL290
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL292
-	.8byte	.LVL294
+	.8byte	.LVL291
+	.8byte	.LVL293
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL294
-	.8byte	.LVL296
+	.8byte	.LVL293
+	.8byte	.LVL295
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
 .LLST118:
-	.8byte	.LVL293
-	.8byte	.LVL295
+	.8byte	.LVL292
+	.8byte	.LVL294
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
 .LLST119:
-	.8byte	.LVL293
-	.8byte	.LVL295-1
+	.8byte	.LVL292
+	.8byte	.LVL294-1
 	.2byte	0xd
 	.byte	0x83
 	.sleb128 0
@@ -9431,8 +9442,8 @@ __func__.6041:
 	.byte	0x20
 	.byte	0x26
 	.byte	0x9f
-	.8byte	.LVL295-1
-	.8byte	.LVL295
+	.8byte	.LVL294-1
+	.8byte	.LVL294
 	.2byte	0xb
 	.byte	0x85
 	.sleb128 0
@@ -9448,19 +9459,19 @@ __func__.6041:
 	.8byte	0
 	.8byte	0
 .LLST120:
-	.8byte	.LVL296
-	.8byte	.LVL300
+	.8byte	.LVL295
+	.8byte	.LVL299
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
 .LLST121:
-	.8byte	.LVL296
-	.8byte	.LVL307
+	.8byte	.LVL295
+	.8byte	.LVL306
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL307
-	.8byte	.LVL320
+	.8byte	.LVL306
+	.8byte	.LVL319
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9469,76 +9480,76 @@ __func__.6041:
 	.8byte	0
 	.8byte	0
 .LLST122:
-	.8byte	.LVL297
-	.8byte	.LVL298-1
+	.8byte	.LVL296
+	.8byte	.LVL297-1
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
 .LLST123:
-	.8byte	.LVL299
-	.8byte	.LVL302
+	.8byte	.LVL298
+	.8byte	.LVL301
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL302
-	.8byte	.LVL320
+	.8byte	.LVL301
+	.8byte	.LVL319
 	.2byte	0x1
 	.byte	0x67
 	.8byte	0
 	.8byte	0
 .LLST124:
-	.8byte	.LVL301
-	.8byte	.LVL304
+	.8byte	.LVL300
+	.8byte	.LVL303
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
 .LLST125:
-	.8byte	.LVL301
-	.8byte	.LVL304
+	.8byte	.LVL300
+	.8byte	.LVL303
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
 .LLST126:
-	.8byte	.LVL305
-	.8byte	.LVL320
+	.8byte	.LVL304
+	.8byte	.LVL319
 	.2byte	0x1
 	.byte	0x67
 	.8byte	0
 	.8byte	0
 .LLST127:
-	.8byte	.LVL305
-	.8byte	.LVL308
+	.8byte	.LVL304
+	.8byte	.LVL307
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL308
-	.8byte	.LVL320
+	.8byte	.LVL307
+	.8byte	.LVL319
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
 .LLST128:
+	.8byte	.LVL309
 	.8byte	.LVL310
-	.8byte	.LVL311
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
 .LLST129:
+	.8byte	.LVL308
 	.8byte	.LVL309
-	.8byte	.LVL310
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL310
-	.8byte	.LVL317
+	.8byte	.LVL309
+	.8byte	.LVL316
 	.2byte	0x1
 	.byte	0x53
+	.8byte	.LVL316
 	.8byte	.LVL317
-	.8byte	.LVL318
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 1
@@ -9546,63 +9557,63 @@ __func__.6041:
 	.8byte	0
 	.8byte	0
 .LLST130:
-	.8byte	.LVL311
-	.8byte	.LVL315
+	.8byte	.LVL310
+	.8byte	.LVL314
 	.2byte	0x1
 	.byte	0x56
-	.8byte	.LVL316
-	.8byte	.LVL319-1
+	.8byte	.LVL315
+	.8byte	.LVL318-1
 	.2byte	0x1
 	.byte	0x56
 	.8byte	0
 	.8byte	0
 .LLST131:
+	.8byte	.LVL310
 	.8byte	.LVL311
-	.8byte	.LVL312
 	.2byte	0x1
 	.byte	0x53
 	.8byte	0
 	.8byte	0
 .LLST132:
+	.8byte	.LVL310
 	.8byte	.LVL311
-	.8byte	.LVL312
 	.2byte	0x1
 	.byte	0x56
 	.8byte	0
 	.8byte	0
 .LLST33:
+	.8byte	.LVL140
 	.8byte	.LVL141
-	.8byte	.LVL142
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL142
-	.8byte	.LVL150
+	.8byte	.LVL141
+	.8byte	.LVL149
 	.2byte	0x1
 	.byte	0x64
+	.8byte	.LVL149
 	.8byte	.LVL150
-	.8byte	.LVL151
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL151
-	.8byte	.LFE227
+	.8byte	.LVL150
+	.8byte	.LFE229
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
 .LLST34:
-	.8byte	.LVL141
-	.8byte	.LVL143-1
+	.8byte	.LVL140
+	.8byte	.LVL142-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL143-1
-	.8byte	.LVL145
+	.8byte	.LVL142-1
+	.8byte	.LVL144
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL145
-	.8byte	.LFE227
+	.8byte	.LVL144
+	.8byte	.LFE229
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9611,12 +9622,12 @@ __func__.6041:
 	.8byte	0
 	.8byte	0
 .LLST35:
-	.8byte	.LVL141
-	.8byte	.LVL143-1
+	.8byte	.LVL140
+	.8byte	.LVL142-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL143-1
-	.8byte	.LFE227
+	.8byte	.LVL142-1
+	.8byte	.LFE229
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9625,38 +9636,38 @@ __func__.6041:
 	.8byte	0
 	.8byte	0
 .LLST36:
-	.8byte	.LVL143
-	.8byte	.LVL144-1
+	.8byte	.LVL142
+	.8byte	.LVL143-1
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
 .LLST37:
+	.8byte	.LVL144
 	.8byte	.LVL145
-	.8byte	.LVL146
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL146
-	.8byte	.LVL150
+	.8byte	.LVL145
+	.8byte	.LVL149
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL151
-	.8byte	.LFE227
+	.8byte	.LVL150
+	.8byte	.LFE229
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
 .LLST38:
-	.8byte	.LVL145
-	.8byte	.LVL148
+	.8byte	.LVL144
+	.8byte	.LVL147
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
 .LLST39:
+	.8byte	.LVL144
 	.8byte	.LVL145
-	.8byte	.LVL146
 	.2byte	0xb
 	.byte	0x70
 	.sleb128 0
@@ -9669,8 +9680,8 @@ __func__.6041:
 	.byte	0x20
 	.byte	0x26
 	.byte	0x9f
+	.8byte	.LVL145
 	.8byte	.LVL146
-	.8byte	.LVL147
 	.2byte	0xb
 	.byte	0x83
 	.sleb128 0
@@ -9683,12 +9694,12 @@ __func__.6041:
 	.byte	0x20
 	.byte	0x26
 	.byte	0x9f
-	.8byte	.LVL147
-	.8byte	.LVL148-1
+	.8byte	.LVL146
+	.8byte	.LVL147-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL148-1
-	.8byte	.LVL148
+	.8byte	.LVL147-1
+	.8byte	.LVL147
 	.2byte	0xb
 	.byte	0x83
 	.sleb128 0
@@ -9704,38 +9715,38 @@ __func__.6041:
 	.8byte	0
 	.8byte	0
 .LLST40:
+	.8byte	.LVL151
 	.8byte	.LVL152
-	.8byte	.LVL153
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL153
-	.8byte	.LVL169
+	.8byte	.LVL152
+	.8byte	.LVL168
 	.2byte	0x1
 	.byte	0x65
+	.8byte	.LVL168
 	.8byte	.LVL169
-	.8byte	.LVL170
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL170
-	.8byte	.LFE224
+	.8byte	.LVL169
+	.8byte	.LFE226
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
 .LLST41:
-	.8byte	.LVL152
-	.8byte	.LVL154-1
+	.8byte	.LVL151
+	.8byte	.LVL153-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL154-1
-	.8byte	.LVL156
+	.8byte	.LVL153-1
+	.8byte	.LVL155
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL156
-	.8byte	.LFE224
+	.8byte	.LVL155
+	.8byte	.LFE226
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9744,38 +9755,38 @@ __func__.6041:
 	.8byte	0
 	.8byte	0
 .LLST42:
-	.8byte	.LVL154
-	.8byte	.LVL155-1
+	.8byte	.LVL153
+	.8byte	.LVL154-1
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
 .LLST43:
+	.8byte	.LVL155
 	.8byte	.LVL156
-	.8byte	.LVL157
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL157
-	.8byte	.LVL168
+	.8byte	.LVL156
+	.8byte	.LVL167
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL170
-	.8byte	.LFE224
+	.8byte	.LVL169
+	.8byte	.LFE226
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
 .LLST44:
-	.8byte	.LVL156
-	.8byte	.LVL159
+	.8byte	.LVL155
+	.8byte	.LVL158
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
 .LLST45:
+	.8byte	.LVL155
 	.8byte	.LVL156
-	.8byte	.LVL157
 	.2byte	0xb
 	.byte	0x70
 	.sleb128 0
@@ -9788,8 +9799,8 @@ __func__.6041:
 	.byte	0x20
 	.byte	0x26
 	.byte	0x9f
+	.8byte	.LVL156
 	.8byte	.LVL157
-	.8byte	.LVL158
 	.2byte	0xb
 	.byte	0x83
 	.sleb128 0
@@ -9802,12 +9813,12 @@ __func__.6041:
 	.byte	0x20
 	.byte	0x26
 	.byte	0x9f
-	.8byte	.LVL158
-	.8byte	.LVL159-1
+	.8byte	.LVL157
+	.8byte	.LVL158-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL159-1
-	.8byte	.LVL159
+	.8byte	.LVL158-1
+	.8byte	.LVL158
 	.2byte	0xb
 	.byte	0x83
 	.sleb128 0
@@ -9823,48 +9834,48 @@ __func__.6041:
 	.8byte	0
 	.8byte	0
 .LLST46:
-	.8byte	.LVL161
-	.8byte	.LVL165
+	.8byte	.LVL160
+	.8byte	.LVL164
 	.2byte	0x6
 	.byte	0xf2
-	.4byte	.Ldebug_info0+7400
+	.4byte	.Ldebug_info0+7384
 	.sleb128 0
-	.8byte	.LVL170
-	.8byte	.LVL179
+	.8byte	.LVL169
+	.8byte	.LVL178
 	.2byte	0x6
 	.byte	0xf2
-	.4byte	.Ldebug_info0+7400
+	.4byte	.Ldebug_info0+7384
 	.sleb128 0
 	.8byte	0
 	.8byte	0
 .LLST47:
-	.8byte	.LVL161
-	.8byte	.LVL164
+	.8byte	.LVL160
+	.8byte	.LVL163
 	.2byte	0x1
 	.byte	0x64
+	.8byte	.LVL163
 	.8byte	.LVL164
-	.8byte	.LVL165
 	.2byte	0x1
 	.byte	0x54
+	.8byte	.LVL169
 	.8byte	.LVL170
-	.8byte	.LVL171
 	.2byte	0x3
 	.byte	0x74
 	.sleb128 4
 	.byte	0x9f
-	.8byte	.LVL171
-	.8byte	.LVL178
+	.8byte	.LVL170
+	.8byte	.LVL177
 	.2byte	0x1
 	.byte	0x54
+	.8byte	.LVL177
 	.8byte	.LVL178
-	.8byte	.LVL179
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
 .LLST48:
+	.8byte	.LVL172
 	.8byte	.LVL173
-	.8byte	.LVL174
 	.2byte	0x8
 	.byte	0x78
 	.sleb128 0
@@ -9874,8 +9885,8 @@ __func__.6041:
 	.byte	0x33
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL174
-	.8byte	.LVL176
+	.8byte	.LVL173
+	.8byte	.LVL175
 	.2byte	0xa
 	.byte	0x78
 	.sleb128 0
@@ -9890,8 +9901,8 @@ __func__.6041:
 	.8byte	0
 	.8byte	0
 .LLST49:
+	.8byte	.LVL172
 	.8byte	.LVL173
-	.8byte	.LVL174
 	.2byte	0x8
 	.byte	0x77
 	.sleb128 0
@@ -9901,8 +9912,8 @@ __func__.6041:
 	.byte	0x33
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL174
-	.8byte	.LVL176
+	.8byte	.LVL173
+	.8byte	.LVL175
 	.2byte	0xa
 	.byte	0x77
 	.sleb128 0
@@ -9917,8 +9928,8 @@ __func__.6041:
 	.8byte	0
 	.8byte	0
 .LLST50:
+	.8byte	.LVL172
 	.8byte	.LVL173
-	.8byte	.LVL174
 	.2byte	0x10
 	.byte	0x78
 	.sleb128 0
@@ -9936,8 +9947,8 @@ __func__.6041:
 	.byte	0x24
 	.byte	0x21
 	.byte	0x9f
-	.8byte	.LVL174
-	.8byte	.LVL176
+	.8byte	.LVL173
+	.8byte	.LVL175
 	.2byte	0x14
 	.byte	0x78
 	.sleb128 0
@@ -9962,43 +9973,43 @@ __func__.6041:
 	.8byte	0
 	.8byte	0
 .LLST51:
-	.8byte	.LVL171
-	.8byte	.LVL178
+	.8byte	.LVL170
+	.8byte	.LVL177
 	.2byte	0x1
 	.byte	0x58
 	.8byte	0
 	.8byte	0
 .LLST52:
-	.8byte	.LVL172
-	.8byte	.LVL178
+	.8byte	.LVL171
+	.8byte	.LVL177
 	.2byte	0x1
 	.byte	0x57
 	.8byte	0
 	.8byte	0
 .LLST53:
-	.8byte	.LVL161
-	.8byte	.LVL164
+	.8byte	.LVL160
+	.8byte	.LVL163
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
+	.8byte	.LVL163
 	.8byte	.LVL164
-	.8byte	.LVL165
 	.2byte	0x5
 	.byte	0x73
 	.sleb128 0
 	.byte	0x34
 	.byte	0x24
 	.byte	0x9f
-	.8byte	.LVL170
-	.8byte	.LVL172
+	.8byte	.LVL169
+	.8byte	.LVL171
 	.2byte	0x5
 	.byte	0x73
 	.sleb128 0
 	.byte	0x34
 	.byte	0x24
 	.byte	0x9f
-	.8byte	.LVL172
-	.8byte	.LVL175
+	.8byte	.LVL171
+	.8byte	.LVL174
 	.2byte	0x8
 	.byte	0x73
 	.sleb128 0
@@ -10008,8 +10019,8 @@ __func__.6041:
 	.sleb128 0
 	.byte	0x22
 	.byte	0x9f
+	.8byte	.LVL174
 	.8byte	.LVL175
-	.8byte	.LVL176
 	.2byte	0xa
 	.byte	0x73
 	.sleb128 0
@@ -10021,31 +10032,31 @@ __func__.6041:
 	.byte	0x23
 	.uleb128 0x1
 	.byte	0x9f
+	.8byte	.LVL177
 	.8byte	.LVL178
-	.8byte	.LVL179
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
 .LLST54:
+	.8byte	.LVL163
 	.8byte	.LVL164
-	.8byte	.LVL165
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL170
-	.8byte	.LVL178
+	.8byte	.LVL169
+	.8byte	.LVL177
 	.2byte	0x1
 	.byte	0x53
 	.8byte	0
 	.8byte	0
 .LLST55:
-	.8byte	.LVL172
-	.8byte	.LVL175
+	.8byte	.LVL171
+	.8byte	.LVL174
 	.2byte	0x1
 	.byte	0x52
+	.8byte	.LVL174
 	.8byte	.LVL175
-	.8byte	.LVL176
 	.2byte	0x3
 	.byte	0x72
 	.sleb128 1
@@ -10053,27 +10064,27 @@ __func__.6041:
 	.8byte	0
 	.8byte	0
 .LLST56:
-	.8byte	.LVL161
-	.8byte	.LVL165
+	.8byte	.LVL160
+	.8byte	.LVL164
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL170
-	.8byte	.LVL179
+	.8byte	.LVL169
+	.8byte	.LVL178
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
 .LLST57:
-	.8byte	.LVL161
-	.8byte	.LVL163
+	.8byte	.LVL160
+	.8byte	.LVL162
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
 .LLST58:
+	.8byte	.LVL160
 	.8byte	.LVL161
-	.8byte	.LVL162
 	.2byte	0xb
 	.byte	0x83
 	.sleb128 0
@@ -10083,12 +10094,12 @@ __func__.6041:
 	.4byte	0xffffffff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL162
-	.8byte	.LVL163-1
+	.8byte	.LVL161
+	.8byte	.LVL162-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL163-1
-	.8byte	.LVL163
+	.8byte	.LVL162-1
+	.8byte	.LVL162
 	.2byte	0xb
 	.byte	0x83
 	.sleb128 0
@@ -10101,27 +10112,27 @@ __func__.6041:
 	.8byte	0
 	.8byte	0
 .LLST59:
+	.8byte	.LVL165
 	.8byte	.LVL166
-	.8byte	.LVL167
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
 .LLST4:
+	.8byte	.LVL26
 	.8byte	.LVL27
-	.8byte	.LVL28
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL28
-	.8byte	.LVL39
+	.8byte	.LVL27
+	.8byte	.LVL38
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL39
-	.8byte	.LVL40-1
+	.8byte	.LVL38
+	.8byte	.LVL39-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL40-1
-	.8byte	.LFE222
+	.8byte	.LVL39-1
+	.8byte	.LFE224
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -10130,16 +10141,16 @@ __func__.6041:
 	.8byte	0
 	.8byte	0
 .LLST5:
-	.8byte	.LVL27
-	.8byte	.LVL29
+	.8byte	.LVL26
+	.8byte	.LVL28
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL29
-	.8byte	.LVL38
+	.8byte	.LVL28
+	.8byte	.LVL37
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL38
-	.8byte	.LFE222
+	.8byte	.LVL37
+	.8byte	.LFE224
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -10148,25 +10159,25 @@ __func__.6041:
 	.8byte	0
 	.8byte	0
 .LLST6:
+	.8byte	.LVL30
 	.8byte	.LVL31
-	.8byte	.LVL32
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
 .LLST7:
+	.8byte	.LVL29
 	.8byte	.LVL30
-	.8byte	.LVL31
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL31
-	.8byte	.LVL36
+	.8byte	.LVL30
+	.8byte	.LVL35
 	.2byte	0x1
 	.byte	0x54
+	.8byte	.LVL35
 	.8byte	.LVL36
-	.8byte	.LVL37
 	.2byte	0x3
 	.byte	0x74
 	.sleb128 1
@@ -10174,35 +10185,35 @@ __func__.6041:
 	.8byte	0
 	.8byte	0
 .LLST8:
+	.8byte	.LVL31
 	.8byte	.LVL32
-	.8byte	.LVL33
 	.2byte	0x1
 	.byte	0x55
+	.8byte	.LVL33
 	.8byte	.LVL34
-	.8byte	.LVL35
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL36
-	.8byte	.LVL40-1
+	.8byte	.LVL35
+	.8byte	.LVL39-1
 	.2byte	0x1
 	.byte	0x55
 	.8byte	0
 	.8byte	0
 .LLST9:
+	.8byte	.LVL40
 	.8byte	.LVL41
-	.8byte	.LVL42
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL42
-	.8byte	.LVL52
+	.8byte	.LVL41
+	.8byte	.LVL51
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL52
-	.8byte	.LVL53-1
+	.8byte	.LVL51
+	.8byte	.LVL52-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL53-1
-	.8byte	.LFE220
+	.8byte	.LVL52-1
+	.8byte	.LFE222
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -10211,16 +10222,16 @@ __func__.6041:
 	.8byte	0
 	.8byte	0
 .LLST10:
-	.8byte	.LVL41
-	.8byte	.LVL43
+	.8byte	.LVL40
+	.8byte	.LVL42
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL43
-	.8byte	.LVL52
+	.8byte	.LVL42
+	.8byte	.LVL51
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL52
-	.8byte	.LFE220
+	.8byte	.LVL51
+	.8byte	.LFE222
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -10229,39 +10240,39 @@ __func__.6041:
 	.8byte	0
 	.8byte	0
 .LLST11:
-	.8byte	.LVL48
-	.8byte	.LVL50
+	.8byte	.LVL47
+	.8byte	.LVL49
 	.2byte	0x2
 	.byte	0x32
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
 .LLST12:
+	.8byte	.LVL45
 	.8byte	.LVL46
-	.8byte	.LVL47
 	.2byte	0x1
 	.byte	0x54
 	.8byte	0
 	.8byte	0
 .LLST13:
+	.8byte	.LVL43
 	.8byte	.LVL44
-	.8byte	.LVL45
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL45
-	.8byte	.LVL51
+	.8byte	.LVL44
+	.8byte	.LVL50
 	.2byte	0x1
 	.byte	0x52
 	.8byte	0
 	.8byte	0
 .LLST24:
-	.8byte	.LVL117
-	.8byte	.LVL119
+	.8byte	.LVL116
+	.8byte	.LVL118
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL119
-	.8byte	.LFE215
+	.8byte	.LVL118
+	.8byte	.LFE217
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -10270,23 +10281,23 @@ __func__.6041:
 	.8byte	0
 	.8byte	0
 .LLST25:
-	.8byte	.LVL117
-	.8byte	.LVL124
+	.8byte	.LVL116
+	.8byte	.LVL123
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL124
-	.8byte	.LVL126
+	.8byte	.LVL123
+	.8byte	.LVL125
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL126
-	.8byte	.LVL131
+	.8byte	.LVL125
+	.8byte	.LVL130
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL131
-	.8byte	.LFE215
+	.8byte	.LVL130
+	.8byte	.LFE217
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -10295,102 +10306,102 @@ __func__.6041:
 	.8byte	0
 	.8byte	0
 .LLST26:
-	.8byte	.LVL117
-	.8byte	.LVL124
+	.8byte	.LVL116
+	.8byte	.LVL123
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL124
-	.8byte	.LVL126
+	.8byte	.LVL123
+	.8byte	.LVL125
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x52
 	.byte	0x9f
-	.8byte	.LVL126
-	.8byte	.LVL133
+	.8byte	.LVL125
+	.8byte	.LVL132
 	.2byte	0x1
 	.byte	0x52
+	.8byte	.LVL132
 	.8byte	.LVL133
-	.8byte	.LVL134
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x52
 	.byte	0x9f
-	.8byte	.LVL134
-	.8byte	.LVL137
+	.8byte	.LVL133
+	.8byte	.LVL136
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL137
-	.8byte	.LVL139-1
+	.8byte	.LVL136
+	.8byte	.LVL138-1
 	.2byte	0x1
 	.byte	0x57
-	.8byte	.LVL139-1
-	.8byte	.LVL139
+	.8byte	.LVL138-1
+	.8byte	.LVL138
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x52
 	.byte	0x9f
+	.8byte	.LVL138
 	.8byte	.LVL139
-	.8byte	.LVL140
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL140
-	.8byte	.LFE215
+	.8byte	.LVL139
+	.8byte	.LFE217
 	.2byte	0x1
 	.byte	0x57
 	.8byte	0
 	.8byte	0
 .LLST27:
-	.8byte	.LVL118
-	.8byte	.LVL125-1
+	.8byte	.LVL117
+	.8byte	.LVL124-1
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL126
-	.8byte	.LVL139-1
+	.8byte	.LVL125
+	.8byte	.LVL138-1
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL139
-	.8byte	.LFE215
+	.8byte	.LVL138
+	.8byte	.LFE217
 	.2byte	0x1
 	.byte	0x54
 	.8byte	0
 	.8byte	0
 .LLST28:
-	.8byte	.LVL120
-	.8byte	.LVL124
+	.8byte	.LVL119
+	.8byte	.LVL123
 	.2byte	0x1
 	.byte	0x58
-	.8byte	.LVL126
-	.8byte	.LVL129
+	.8byte	.LVL125
+	.8byte	.LVL128
 	.2byte	0x1
 	.byte	0x58
-	.8byte	.LVL129
-	.8byte	.LVL139-1
+	.8byte	.LVL128
+	.8byte	.LVL138-1
 	.2byte	0x1
 	.byte	0x56
-	.8byte	.LVL139
-	.8byte	.LFE215
+	.8byte	.LVL138
+	.8byte	.LFE217
 	.2byte	0x1
 	.byte	0x56
 	.8byte	0
 	.8byte	0
 .LLST29:
-	.8byte	.LVL122
-	.8byte	.LVL124
+	.8byte	.LVL121
+	.8byte	.LVL123
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL126
-	.8byte	.LVL131
+	.8byte	.LVL125
+	.8byte	.LVL130
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL131
-	.8byte	.LVL135
+	.8byte	.LVL130
+	.8byte	.LVL134
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL135
-	.8byte	.LVL139-1
+	.8byte	.LVL134
+	.8byte	.LVL138-1
 	.2byte	0x59
 	.byte	0xf3
 	.uleb128 0x1
@@ -10481,8 +10492,8 @@ __func__.6041:
 	.byte	0xff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL139
-	.8byte	.LFE215
+	.8byte	.LVL138
+	.8byte	.LFE217
 	.2byte	0x59
 	.byte	0xf3
 	.uleb128 0x1
@@ -10576,16 +10587,16 @@ __func__.6041:
 	.8byte	0
 	.8byte	0
 .LLST30:
+	.8byte	.LVL122
 	.8byte	.LVL123
-	.8byte	.LVL124
 	.2byte	0x1
 	.byte	0x56
-	.8byte	.LVL126
-	.8byte	.LVL129
+	.8byte	.LVL125
+	.8byte	.LVL128
 	.2byte	0x1
 	.byte	0x56
-	.8byte	.LVL129
-	.8byte	.LVL132
+	.8byte	.LVL128
+	.8byte	.LVL131
 	.2byte	0x1e
 	.byte	0xf3
 	.uleb128 0x1
@@ -10617,19 +10628,19 @@ __func__.6041:
 	.byte	0xff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL132
-	.8byte	.LVL139-1
+	.8byte	.LVL131
+	.8byte	.LVL138-1
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL139
-	.8byte	.LFE215
+	.8byte	.LVL138
+	.8byte	.LFE217
 	.2byte	0x1
 	.byte	0x55
 	.8byte	0
 	.8byte	0
 .LLST31:
+	.8byte	.LVL122
 	.8byte	.LVL123
-	.8byte	.LVL124
 	.2byte	0x1e
 	.byte	0xf3
 	.uleb128 0x1
@@ -10661,8 +10672,8 @@ __func__.6041:
 	.byte	0xff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL126
-	.8byte	.LVL132
+	.8byte	.LVL125
+	.8byte	.LVL131
 	.2byte	0x1e
 	.byte	0xf3
 	.uleb128 0x1
@@ -10694,8 +10705,8 @@ __func__.6041:
 	.byte	0xff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL132
-	.8byte	.LVL139-1
+	.8byte	.LVL131
+	.8byte	.LVL138-1
 	.2byte	0x59
 	.byte	0xf3
 	.uleb128 0x1
@@ -10786,8 +10797,8 @@ __func__.6041:
 	.byte	0xff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL139
-	.8byte	.LFE215
+	.8byte	.LVL138
+	.8byte	.LFE217
 	.2byte	0x59
 	.byte	0xf3
 	.uleb128 0x1
@@ -10881,8 +10892,8 @@ __func__.6041:
 	.8byte	0
 	.8byte	0
 .LLST32:
+	.8byte	.LVL117
 	.8byte	.LVL118
-	.8byte	.LVL119
 	.2byte	0xd
 	.byte	0x70
 	.sleb128 0
@@ -10897,12 +10908,12 @@ __func__.6041:
 	.byte	0x1a
 	.byte	0x22
 	.byte	0x9f
-	.8byte	.LVL119
-	.8byte	.LVL121
+	.8byte	.LVL118
+	.8byte	.LVL120
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL121
-	.8byte	.LVL124
+	.8byte	.LVL120
+	.8byte	.LVL123
 	.2byte	0xe
 	.byte	0xf3
 	.uleb128 0x1
@@ -10918,8 +10929,8 @@ __func__.6041:
 	.byte	0x1a
 	.byte	0x22
 	.byte	0x9f
+	.8byte	.LVL125
 	.8byte	.LVL126
-	.8byte	.LVL127
 	.2byte	0xe
 	.byte	0xf3
 	.uleb128 0x1
@@ -10935,8 +10946,8 @@ __func__.6041:
 	.byte	0x1a
 	.byte	0x22
 	.byte	0x9f
+	.8byte	.LVL126
 	.8byte	.LVL127
-	.8byte	.LVL128
 	.2byte	0x8
 	.byte	0x71
 	.sleb128 0
@@ -10946,12 +10957,12 @@ __func__.6041:
 	.sleb128 0
 	.byte	0x22
 	.byte	0x9f
-	.8byte	.LVL128
-	.8byte	.LVL130
+	.8byte	.LVL127
+	.8byte	.LVL129
 	.2byte	0x1
 	.byte	0x53
+	.8byte	.LVL129
 	.8byte	.LVL130
-	.8byte	.LVL131
 	.2byte	0x2d
 	.byte	0x75
 	.sleb128 0
@@ -10998,8 +11009,8 @@ __func__.6041:
 	.byte	0x24
 	.byte	0x22
 	.byte	0x9f
+	.8byte	.LVL130
 	.8byte	.LVL131
-	.8byte	.LVL132
 	.2byte	0x2e
 	.byte	0x75
 	.sleb128 0
@@ -11047,8 +11058,8 @@ __func__.6041:
 	.byte	0x24
 	.byte	0x22
 	.byte	0x9f
-	.8byte	.LVL132
-	.8byte	.LVL136
+	.8byte	.LVL131
+	.8byte	.LVL135
 	.2byte	0x49
 	.byte	0xf3
 	.uleb128 0x1
@@ -11123,12 +11134,12 @@ __func__.6041:
 	.byte	0x24
 	.byte	0x22
 	.byte	0x9f
-	.8byte	.LVL136
-	.8byte	.LVL138
+	.8byte	.LVL135
+	.8byte	.LVL137
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL138
-	.8byte	.LVL139-1
+	.8byte	.LVL137
+	.8byte	.LVL138-1
 	.2byte	0x63
 	.byte	0xf3
 	.uleb128 0x1
@@ -11229,8 +11240,8 @@ __func__.6041:
 	.sleb128 0
 	.byte	0x21
 	.byte	0x9f
-	.8byte	.LVL139
-	.8byte	.LFE215
+	.8byte	.LVL138
+	.8byte	.LFE217
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
@@ -11251,43 +11262,43 @@ __func__.6041:
 	.sleb128 1
 	.byte	0x9f
 	.8byte	.LVL12
-	.8byte	.LVL15
+	.8byte	.LVL14
 	.2byte	0x1
 	.byte	0x64
+	.8byte	.LVL14
 	.8byte	.LVL15
-	.8byte	.LVL16
 	.2byte	0x3
 	.byte	0x84
 	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL16
-	.8byte	.LVL18
+	.8byte	.LVL15
+	.8byte	.LVL17
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL18
-	.8byte	.LVL23
+	.8byte	.LVL17
+	.8byte	.LVL22
 	.2byte	0x3
 	.byte	0x84
 	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL23
-	.8byte	.LVL25
+	.8byte	.LVL22
+	.8byte	.LVL24
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
+	.8byte	.LVL24
 	.8byte	.LVL25
-	.8byte	.LVL26
 	.2byte	0x3
 	.byte	0x84
 	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL26
-	.8byte	.LFE213
+	.8byte	.LVL25
+	.8byte	.LFE215
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -11336,70 +11347,66 @@ __func__.6041:
 	.2byte	0x9
 	.byte	0x3
 	.8byte	global_waveform
-	.8byte	.LVL14
-	.8byte	.LVL15
-	.2byte	0x1
-	.byte	0x52
 	.8byte	0
 	.8byte	0
 .LLST2:
+	.8byte	.LVL15
 	.8byte	.LVL16
-	.8byte	.LVL17
 	.2byte	0x1
 	.byte	0x50
+	.8byte	.LVL17
 	.8byte	.LVL18
-	.8byte	.LVL19
 	.2byte	0x2
 	.byte	0x34
 	.byte	0x9f
+	.8byte	.LVL18
 	.8byte	.LVL19
-	.8byte	.LVL20
 	.2byte	0x2
 	.byte	0x35
 	.byte	0x9f
+	.8byte	.LVL19
 	.8byte	.LVL20
-	.8byte	.LVL21
 	.2byte	0x2
 	.byte	0x36
 	.byte	0x9f
+	.8byte	.LVL20
 	.8byte	.LVL21
-	.8byte	.LVL22
 	.2byte	0x2
 	.byte	0x32
 	.byte	0x9f
+	.8byte	.LVL21
 	.8byte	.LVL22
-	.8byte	.LVL23
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
 .LLST14:
-	.8byte	.LVL54
-	.8byte	.LVL57
+	.8byte	.LVL53
+	.8byte	.LVL56
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL57
-	.8byte	.LVL81
+	.8byte	.LVL56
+	.8byte	.LVL80
 	.2byte	0x1
 	.byte	0x67
+	.8byte	.LVL80
 	.8byte	.LVL81
-	.8byte	.LVL82
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL82
-	.8byte	.LVL115
+	.8byte	.LVL81
+	.8byte	.LVL114
 	.2byte	0x1
 	.byte	0x67
+	.8byte	.LVL114
 	.8byte	.LVL115
-	.8byte	.LVL116
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL116
-	.8byte	.LFE210
+	.8byte	.LVL115
+	.8byte	.LFE212
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -11408,351 +11415,351 @@ __func__.6041:
 	.8byte	0
 	.8byte	0
 .LLST15:
-	.8byte	.LVL54
-	.8byte	.LVL56
+	.8byte	.LVL53
+	.8byte	.LVL55
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL56
-	.8byte	.LVL80
+	.8byte	.LVL55
+	.8byte	.LVL79
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL80
-	.8byte	.LVL82
+	.8byte	.LVL79
+	.8byte	.LVL81
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL82
-	.8byte	.LVL115
+	.8byte	.LVL81
+	.8byte	.LVL114
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL115
-	.8byte	.LFE210
+	.8byte	.LVL114
+	.8byte	.LFE212
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
 	.8byte	0
 .LLST16:
+	.8byte	.LVL53
 	.8byte	.LVL54
-	.8byte	.LVL55
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL55
-	.8byte	.LVL79
+	.8byte	.LVL54
+	.8byte	.LVL78
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL79
-	.8byte	.LVL82
+	.8byte	.LVL78
+	.8byte	.LVL81
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x52
 	.byte	0x9f
-	.8byte	.LVL82
-	.8byte	.LVL115
+	.8byte	.LVL81
+	.8byte	.LVL114
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL115
-	.8byte	.LFE210
+	.8byte	.LVL114
+	.8byte	.LFE212
 	.2byte	0x1
 	.byte	0x52
 	.8byte	0
 	.8byte	0
 .LLST17:
-	.8byte	.LVL54
-	.8byte	.LVL59
+	.8byte	.LVL53
+	.8byte	.LVL58
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL59
-	.8byte	.LVL68
+	.8byte	.LVL58
+	.8byte	.LVL67
 	.2byte	0x1
 	.byte	0x56
-	.8byte	.LVL68
-	.8byte	.LVL70
+	.8byte	.LVL67
+	.8byte	.LVL69
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL70
-	.8byte	.LVL76-1
+	.8byte	.LVL69
+	.8byte	.LVL75-1
 	.2byte	0x1
 	.byte	0x56
-	.8byte	.LVL82
-	.8byte	.LVL90
+	.8byte	.LVL81
+	.8byte	.LVL89
 	.2byte	0x1
 	.byte	0x56
-	.8byte	.LVL90
-	.8byte	.LVL92
+	.8byte	.LVL89
+	.8byte	.LVL91
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL92
-	.8byte	.LVL104
+	.8byte	.LVL91
+	.8byte	.LVL103
 	.2byte	0x1
 	.byte	0x56
-	.8byte	.LVL104
-	.8byte	.LVL106
+	.8byte	.LVL103
+	.8byte	.LVL105
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
+	.8byte	.LVL106
 	.8byte	.LVL107
-	.8byte	.LVL108
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL108
-	.8byte	.LVL110
+	.8byte	.LVL107
+	.8byte	.LVL109
 	.2byte	0x5
 	.byte	0x73
 	.sleb128 0
 	.byte	0x31
 	.byte	0x24
 	.byte	0x9f
-	.8byte	.LVL115
-	.8byte	.LFE210
+	.8byte	.LVL114
+	.8byte	.LFE212
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
 .LLST18:
-	.8byte	.LVL54
-	.8byte	.LVL59
+	.8byte	.LVL53
+	.8byte	.LVL58
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
+	.8byte	.LVL62
 	.8byte	.LVL63
-	.8byte	.LVL64
 	.2byte	0x1
 	.byte	0x5c
-	.8byte	.LVL64
-	.8byte	.LVL66
+	.8byte	.LVL63
+	.8byte	.LVL65
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL66
-	.8byte	.LVL70
+	.8byte	.LVL65
+	.8byte	.LVL69
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
+	.8byte	.LVL72
 	.8byte	.LVL73
-	.8byte	.LVL74
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
+	.8byte	.LVL81
 	.8byte	.LVL82
-	.8byte	.LVL83
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
+	.8byte	.LVL83
 	.8byte	.LVL84
-	.8byte	.LVL85
 	.2byte	0x1
 	.byte	0x57
+	.8byte	.LVL84
 	.8byte	.LVL85
-	.8byte	.LVL86
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 3
 	.byte	0x9f
+	.8byte	.LVL85
 	.8byte	.LVL86
-	.8byte	.LVL87
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL88
-	.8byte	.LVL92
+	.8byte	.LVL87
+	.8byte	.LVL91
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
+	.8byte	.LVL94
 	.8byte	.LVL95
-	.8byte	.LVL96
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
+	.8byte	.LVL97
 	.8byte	.LVL98
-	.8byte	.LVL99
 	.2byte	0x1
 	.byte	0x5c
-	.8byte	.LVL99
-	.8byte	.LVL102
+	.8byte	.LVL98
+	.8byte	.LVL101
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL102
-	.8byte	.LVL106
+	.8byte	.LVL101
+	.8byte	.LVL105
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL107
-	.8byte	.LVL111
+	.8byte	.LVL106
+	.8byte	.LVL110
 	.2byte	0x5
 	.byte	0x72
 	.sleb128 0
 	.byte	0x31
 	.byte	0x24
 	.byte	0x9f
+	.8byte	.LVL110
 	.8byte	.LVL111
-	.8byte	.LVL112
 	.2byte	0x5
 	.byte	0x72
 	.sleb128 1
 	.byte	0x31
 	.byte	0x24
 	.byte	0x9f
-	.8byte	.LVL115
-	.8byte	.LFE210
+	.8byte	.LVL114
+	.8byte	.LFE212
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
 .LLST19:
-	.8byte	.LVL54
-	.8byte	.LVL59
+	.8byte	.LVL53
+	.8byte	.LVL58
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL59
-	.8byte	.LVL79
+	.8byte	.LVL58
+	.8byte	.LVL78
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL79
-	.8byte	.LVL82
+	.8byte	.LVL78
+	.8byte	.LVL81
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL82
-	.8byte	.LVL115
+	.8byte	.LVL81
+	.8byte	.LVL114
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL115
-	.8byte	.LFE210
+	.8byte	.LVL114
+	.8byte	.LFE212
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
 .LLST20:
-	.8byte	.LVL54
-	.8byte	.LVL59
+	.8byte	.LVL53
+	.8byte	.LVL58
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL59
-	.8byte	.LVL65
+	.8byte	.LVL58
+	.8byte	.LVL64
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL65
-	.8byte	.LVL71
+	.8byte	.LVL64
+	.8byte	.LVL70
 	.2byte	0x1
 	.byte	0x5b
+	.8byte	.LVL70
 	.8byte	.LVL71
-	.8byte	.LVL72
 	.2byte	0x3
 	.byte	0x70
 	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL72
-	.8byte	.LVL75
+	.8byte	.LVL71
+	.8byte	.LVL74
 	.2byte	0x1
 	.byte	0x50
+	.8byte	.LVL81
 	.8byte	.LVL82
-	.8byte	.LVL83
 	.2byte	0x1
 	.byte	0x5b
-	.8byte	.LVL83
-	.8byte	.LVL96
+	.8byte	.LVL82
+	.8byte	.LVL95
 	.2byte	0x3
 	.byte	0x70
 	.sleb128 1
 	.byte	0x9f
+	.8byte	.LVL95
 	.8byte	.LVL96
-	.8byte	.LVL97
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL97
-	.8byte	.LVL101
+	.8byte	.LVL96
+	.8byte	.LVL100
 	.2byte	0x3
 	.byte	0x7b
 	.sleb128 -1
 	.byte	0x9f
+	.8byte	.LVL100
 	.8byte	.LVL101
-	.8byte	.LVL102
 	.2byte	0x1
 	.byte	0x5b
-	.8byte	.LVL102
-	.8byte	.LVL106
+	.8byte	.LVL101
+	.8byte	.LVL105
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL115
-	.8byte	.LFE210
+	.8byte	.LVL114
+	.8byte	.LFE212
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
 .LLST21:
-	.8byte	.LVL62
-	.8byte	.LVL73
+	.8byte	.LVL61
+	.8byte	.LVL72
 	.2byte	0x1
 	.byte	0x60
-	.8byte	.LVL82
-	.8byte	.LVL96
+	.8byte	.LVL81
+	.8byte	.LVL95
 	.2byte	0x1
 	.byte	0x60
-	.8byte	.LVL97
-	.8byte	.LVL100
+	.8byte	.LVL96
+	.8byte	.LVL99
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL109
-	.8byte	.LVL115
+	.8byte	.LVL108
+	.8byte	.LVL114
 	.2byte	0x1
 	.byte	0x57
 	.8byte	0
 	.8byte	0
 .LLST22:
-	.8byte	.LVL71
-	.8byte	.LVL73
+	.8byte	.LVL70
+	.8byte	.LVL72
 	.2byte	0x1
 	.byte	0x54
+	.8byte	.LVL76
 	.8byte	.LVL77
-	.8byte	.LVL78
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL83
-	.8byte	.LVL93
+	.8byte	.LVL82
+	.8byte	.LVL92
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL94
-	.8byte	.LVL96
+	.8byte	.LVL93
+	.8byte	.LVL95
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL106
-	.8byte	.LVL113
+	.8byte	.LVL105
+	.8byte	.LVL112
 	.2byte	0x1
 	.byte	0x50
+	.8byte	.LVL113
 	.8byte	.LVL114
-	.8byte	.LVL115
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
 .LLST23:
-	.8byte	.LVL54
-	.8byte	.LVL59
+	.8byte	.LVL53
+	.8byte	.LVL58
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.8byte	.LVL59
-	.8byte	.LVL76-1
+	.8byte	.LVL58
+	.8byte	.LVL75-1
 	.2byte	0x1
 	.byte	0x5a
-	.8byte	.LVL82
-	.8byte	.LVL106
+	.8byte	.LVL81
+	.8byte	.LVL105
 	.2byte	0x1
 	.byte	0x5a
-	.8byte	.LVL115
-	.8byte	.LFE210
+	.8byte	.LVL114
+	.8byte	.LFE212
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
@@ -11766,26 +11773,26 @@ __func__.6041:
 	.byte	0
 	.2byte	0
 	.2byte	0
-	.8byte	.LFB213
-	.8byte	.LFE213-.LFB213
-	.8byte	.LFB222
-	.8byte	.LFE222-.LFB222
-	.8byte	.LFB220
-	.8byte	.LFE220-.LFB220
-	.8byte	.LFB210
-	.8byte	.LFE210-.LFB210
 	.8byte	.LFB215
 	.8byte	.LFE215-.LFB215
-	.8byte	.LFB227
-	.8byte	.LFE227-.LFB227
 	.8byte	.LFB224
 	.8byte	.LFE224-.LFB224
-	.8byte	.LFB230
-	.8byte	.LFE230-.LFB230
-	.8byte	.LFB231
-	.8byte	.LFE231-.LFB231
+	.8byte	.LFB222
+	.8byte	.LFE222-.LFB222
+	.8byte	.LFB212
+	.8byte	.LFE212-.LFB212
+	.8byte	.LFB217
+	.8byte	.LFE217-.LFB217
+	.8byte	.LFB229
+	.8byte	.LFE229-.LFB229
+	.8byte	.LFB226
+	.8byte	.LFE226-.LFB226
 	.8byte	.LFB232
 	.8byte	.LFE232-.LFB232
+	.8byte	.LFB233
+	.8byte	.LFE233-.LFB233
+	.8byte	.LFB234
+	.8byte	.LFE234-.LFB234
 	.8byte	0
 	.8byte	0
 	.section	.debug_ranges,"",@progbits
@@ -11928,34 +11935,34 @@ __func__.6041:
 	.8byte	.LBE201
 	.8byte	0
 	.8byte	0
-	.8byte	.LFB213
-	.8byte	.LFE213
-	.8byte	.LFB222
-	.8byte	.LFE222
-	.8byte	.LFB220
-	.8byte	.LFE220
-	.8byte	.LFB210
-	.8byte	.LFE210
 	.8byte	.LFB215
 	.8byte	.LFE215
-	.8byte	.LFB227
-	.8byte	.LFE227
 	.8byte	.LFB224
 	.8byte	.LFE224
-	.8byte	.LFB230
-	.8byte	.LFE230
-	.8byte	.LFB231
-	.8byte	.LFE231
+	.8byte	.LFB222
+	.8byte	.LFE222
+	.8byte	.LFB212
+	.8byte	.LFE212
+	.8byte	.LFB217
+	.8byte	.LFE217
+	.8byte	.LFB229
+	.8byte	.LFE229
+	.8byte	.LFB226
+	.8byte	.LFE226
 	.8byte	.LFB232
 	.8byte	.LFE232
+	.8byte	.LFB233
+	.8byte	.LFE233
+	.8byte	.LFB234
+	.8byte	.LFE234
 	.8byte	0
 	.8byte	0
 	.section	.debug_line,"",@progbits
 .Ldebug_line0:
 	.section	.debug_str,"MS",@progbits,1
-.LASF389:
+.LASF391:
 	.string	"level"
-.LASF367:
+.LASF369:
 	.string	"white"
 .LASF82:
 	.string	"off_mem_rsvmap"
@@ -11971,35 +11978,33 @@ __func__.6041:
 	.string	"UCLASS_I2C"
 .LASF13:
 	.string	"sizetype"
-.LASF250:
+.LASF252:
 	.string	"net_hostname"
-.LASF245:
-	.string	"push_packet"
 .LASF36:
 	.string	"start"
-.LASF204:
+.LASF205:
 	.string	"UCLASS_SPI"
 .LASF168:
 	.string	"UCLASS_I2S"
-.LASF272:
+.LASF274:
 	.string	"NETLOOP_RESTART"
-.LASF355:
+.LASF357:
 	.string	"parse_wf_gray16_with_lut_type"
-.LASF341:
+.LASF343:
 	.string	"pvi_wf_get_lut"
 .LASF166:
 	.string	"UCLASS_I2C_GENERIC"
-.LASF372:
+.LASF374:
 	.string	"total"
 .LASF178:
 	.string	"UCLASS_MOD_EXP"
-.LASF227:
+.LASF228:
 	.string	"UCLASS_IO_DOMAIN"
-.LASF289:
+.LASF291:
 	.string	"WF_TYPE_GL16"
-.LASF339:
+.LASF341:
 	.string	"pvi_wf_input"
-.LASF300:
+.LASF302:
 	.string	"PVI_WF_GL16"
 .LASF199:
 	.string	"UCLASS_RKNAND"
@@ -12009,21 +12014,21 @@ __func__.6041:
 	.string	"ih_magic"
 .LASF145:
 	.string	"UCLASS_TEST_PROBE"
-.LASF223:
+.LASF224:
 	.string	"UCLASS_KEY"
 .LASF62:
 	.string	"bi_intfreq"
-.LASF386:
+.LASF388:
 	.string	"__func__"
 .LASF11:
 	.string	"phys_addr_t"
-.LASF412:
+.LASF414:
 	.string	"drivers/video/rk_eink/epdlut/pvi_waveform.c"
 .LASF5:
 	.string	"__u8"
-.LASF271:
+.LASF273:
 	.string	"NETLOOP_CONTINUE"
-.LASF207:
+.LASF208:
 	.string	"UCLASS_SPI_GENERIC"
 .LASF38:
 	.string	"flash_info_t"
@@ -12037,11 +12042,11 @@ __func__.6041:
 	.string	"state"
 .LASF158:
 	.string	"UCLASS_CROS_EC"
-.LASF413:
+.LASF415:
 	.string	"/home/lyx/rk3566-11-eink/u-boot"
 .LASF56:
 	.string	"bi_dsp_freq"
-.LASF363:
+.LASF365:
 	.string	"get_lut_reset_data"
 .LASF104:
 	.string	"image_start"
@@ -12049,49 +12054,49 @@ __func__.6041:
 	.string	"UCLASS_TEST_FDT"
 .LASF47:
 	.string	"bd_info"
-.LASF356:
+.LASF358:
 	.string	"parse_wf_gray2"
-.LASF269:
+.LASF271:
 	.string	"uclass_id"
-.LASF295:
+.LASF297:
 	.string	"pvi_wf_mode"
 .LASF94:
 	.string	"ih_load"
-.LASF239:
+.LASF242:
 	.string	"__dtb_dt_spl_begin"
-.LASF311:
+.LASF313:
 	.string	"file_length"
-.LASF319:
+.LASF321:
 	.string	"wf_type"
 .LASF7:
 	.string	"__u32"
 .LASF148:
 	.string	"UCLASS_PCI_EMUL"
-.LASF387:
+.LASF389:
 	.string	"get_wf_temp_index"
-.LASF306:
+.LASF308:
 	.string	"epd_lut_data"
-.LASF256:
+.LASF258:
 	.string	"net_tx_packet"
-.LASF222:
+.LASF223:
 	.string	"UCLASS_FG"
-.LASF255:
+.LASF257:
 	.string	"net_server_ip"
-.LASF353:
+.LASF355:
 	.string	"parse_wf_gray16"
-.LASF302:
+.LASF304:
 	.string	"PVI_WF_GLD16"
-.LASF263:
+.LASF265:
 	.string	"net_native_vlan"
-.LASF220:
+.LASF221:
 	.string	"UCLASS_VIDEO_CRTC"
-.LASF391:
+.LASF393:
 	.string	"pvi_modes"
-.LASF282:
+.LASF284:
 	.string	"WF_TYPE_RESET"
 .LASF157:
 	.string	"UCLASS_CODEC"
-.LASF411:
+.LASF413:
 	.ascii	"GNU C11 6.3.1 20170404 -ms"
 	.string	"trict-align -march=armv8-a+nosimd -mlittle-endian -mabi=lp64 -g -Os -fno-builtin -ffreestanding -fshort-wchar -fno-stack-protector -fno-delete-null-pointer-checks -fstack-usage -fno-pic -ffunction-sections -fdata-sections -ffixed-r9 -fno-common -ffixed-x18"
 .LASF23:
@@ -12106,13 +12111,13 @@ __func__.6041:
 	.string	"IRQ_STACK_START_IN"
 .LASF86:
 	.string	"size_dt_strings"
-.LASF217:
+.LASF218:
 	.string	"UCLASS_VIDEO"
-.LASF397:
+.LASF399:
 	.string	"oldpic"
-.LASF266:
+.LASF268:
 	.string	"net_boot_file_size"
-.LASF354:
+.LASF356:
 	.string	"parse_wf_gray32"
 .LASF96:
 	.string	"ih_dcrc"
@@ -12120,13 +12125,13 @@ __func__.6041:
 	.string	"bi_ethspeed"
 .LASF140:
 	.string	"UCLASS_ROOT"
-.LASF378:
+.LASF380:
 	.string	"get_wf_frm_num"
 .LASF29:
 	.string	"ide_bus_offset"
-.LASF362:
+.LASF364:
 	.string	"get_lut_gray32_data"
-.LASF253:
+.LASF255:
 	.string	"net_server_ethaddr"
 .LASF64:
 	.string	"bi_arch_number"
@@ -12136,25 +12141,25 @@ __func__.6041:
 	.string	"UCLASS_KEYBOARD"
 .LASF20:
 	.string	"uint8_t"
-.LASF330:
+.LASF332:
 	.string	"waveformdata"
 .LASF98:
 	.string	"ih_arch"
 .LASF79:
 	.string	"totalsize"
-.LASF399:
+.LASF401:
 	.string	"frame_tmp"
 .LASF91:
 	.string	"ih_hcrc"
-.LASF368:
+.LASF370:
 	.string	"idata"
 .LASF106:
 	.string	"load"
-.LASF288:
+.LASF290:
 	.string	"WF_TYPE_GC16"
-.LASF212:
+.LASF213:
 	.string	"UCLASS_TPM"
-.LASF299:
+.LASF301:
 	.string	"PVI_WF_GC16"
 .LASF41:
 	.string	"lmb_property"
@@ -12166,7 +12171,7 @@ __func__.6041:
 	.string	"bi_andr_version"
 .LASF139:
 	.string	"images"
-.LASF226:
+.LASF227:
 	.string	"UCLASS_DVFS"
 .LASF57:
 	.string	"bi_ddr_freq"
@@ -12174,35 +12179,37 @@ __func__.6041:
 	.string	"UCLASS_LED"
 .LASF93:
 	.string	"ih_size"
-.LASF398:
+.LASF400:
 	.string	"newpic"
-.LASF230:
+.LASF202:
+	.string	"UCLASS_SCMI_AGENT"
+.LASF231:
 	.string	"UCLASS_MDIO"
 .LASF25:
 	.string	"_Bool"
-.LASF275:
+.LASF277:
 	.string	"net_state"
-.LASF337:
+.LASF339:
 	.string	"spi_id_buffer"
 .LASF167:
 	.string	"UCLASS_I2C_MUX"
-.LASF307:
+.LASF309:
 	.string	"frame_num"
 .LASF14:
 	.string	"char"
 .LASF27:
 	.string	"_binary_u_boot_bin_start"
-.LASF216:
+.LASF217:
 	.string	"UCLASS_USB_GADGET_GENERIC"
-.LASF273:
+.LASF275:
 	.string	"NETLOOP_SUCCESS"
-.LASF343:
+.LASF345:
 	.string	"output"
-.LASF279:
+.LASF281:
 	.string	"p_current"
-.LASF270:
+.LASF272:
 	.string	"net_loop_state"
-.LASF298:
+.LASF300:
 	.string	"PVI_WF_DU4"
 .LASF156:
 	.string	"UCLASS_AMP"
@@ -12210,15 +12217,15 @@ __func__.6041:
 	.string	"UCLASS_PWRSEQ"
 .LASF122:
 	.string	"fit_hdr_fdt"
-.LASF264:
+.LASF266:
 	.string	"net_restart_wrap"
-.LASF252:
+.LASF254:
 	.string	"net_ethaddr"
-.LASF405:
+.LASF407:
 	.string	"flags"
-.LASF365:
+.LASF367:
 	.string	"gray"
-.LASF395:
+.LASF397:
 	.string	"decodewaveform"
 .LASF99:
 	.string	"ih_type"
@@ -12226,7 +12233,7 @@ __func__.6041:
 	.string	"off_dt_struct"
 .LASF52:
 	.string	"bi_flashoffset"
-.LASF265:
+.LASF267:
 	.string	"net_boot_file_name"
 .LASF142:
 	.string	"UCLASS_TEST"
@@ -12238,93 +12245,93 @@ __func__.6041:
 	.string	"UCLASS_ETH"
 .LASF103:
 	.string	"image_info"
-.LASF218:
+.LASF219:
 	.string	"UCLASS_VIDEO_BRIDGE"
-.LASF376:
+.LASF378:
 	.string	"temp_data"
 .LASF109:
 	.string	"arch"
-.LASF349:
+.LASF351:
 	.string	"input"
-.LASF370:
+.LASF372:
 	.string	"temp"
 .LASF31:
 	.string	"select_hwpart"
-.LASF257:
+.LASF259:
 	.string	"net_rx_packets"
-.LASF276:
+.LASF278:
 	.string	"mem_malloc_start"
 .LASF74:
 	.string	"_datarelro_start_ofs"
 .LASF19:
 	.string	"ulong"
-.LASF351:
+.LASF353:
 	.string	"parse_wf_auto"
 .LASF95:
 	.string	"ih_ep"
 .LASF43:
 	.string	"lmb_region"
-.LASF336:
+.LASF338:
 	.string	"waveform"
-.LASF406:
+.LASF408:
 	.string	"printf"
 .LASF117:
 	.string	"fit_uname_os"
 .LASF58:
 	.string	"bi_bootflags"
-.LASF254:
+.LASF256:
 	.string	"net_ip"
-.LASF248:
+.LASF250:
 	.string	"net_dns_server"
-.LASF268:
+.LASF270:
 	.string	"net_ping_ip"
 .LASF45:
 	.string	"memory"
-.LASF334:
+.LASF336:
 	.string	"gray32_data"
-.LASF361:
+.LASF363:
 	.string	"get_lut_gray2_data"
 .LASF77:
 	.string	"fdt_header"
-.LASF277:
+.LASF279:
 	.string	"mem_malloc_end"
-.LASF328:
+.LASF330:
 	.string	"temperaturenumber"
 .LASF174:
 	.string	"UCLASS_MAILBOX"
 .LASF129:
 	.string	"rd_end"
-.LASF304:
+.LASF306:
 	.string	"PVI_WF_GCC16"
 .LASF134:
 	.string	"cmdline_start"
-.LASF345:
+.LASF347:
 	.string	"temperture"
-.LASF369:
+.LASF371:
 	.string	"odata"
-.LASF202:
+.LASF203:
 	.string	"UCLASS_SCSI"
-.LASF214:
+.LASF215:
 	.string	"UCLASS_USB_DEV_GENERIC"
 .LASF175:
 	.string	"UCLASS_MASS_STORAGE"
-.LASF404:
+.LASF406:
 	.string	"kzalloc"
 .LASF1:
 	.string	"long unsigned int"
 .LASF150:
 	.string	"UCLASS_SIMPLE_BUS"
-.LASF249:
+.LASF251:
 	.string	"net_nis_domain"
-.LASF284:
+.LASF286:
 	.string	"WF_TYPE_GRAY4"
 .LASF124:
 	.string	"fit_noffset_fdt"
-.LASF274:
+.LASF276:
 	.string	"NETLOOP_FAIL"
-.LASF221:
+.LASF222:
 	.string	"UCLASS_WDT"
-.LASF396:
+.LASF398:
 	.string	"maxpic"
 .LASF53:
 	.string	"bi_sramstart"
@@ -12334,17 +12341,17 @@ __func__.6041:
 	.string	"boot_cpuid_phys"
 .LASF120:
 	.string	"fit_uname_rd"
-.LASF350:
+.LASF352:
 	.string	"mode_index"
-.LASF208:
+.LASF209:
 	.string	"UCLASS_SYSCON"
 .LASF115:
 	.string	"fit_uname_cfg"
-.LASF203:
+.LASF204:
 	.string	"UCLASS_SERIAL"
-.LASF262:
+.LASF264:
 	.string	"net_our_vlan"
-.LASF312:
+.LASF314:
 	.string	"serial"
 .LASF153:
 	.string	"UCLASS_BLK"
@@ -12352,15 +12359,15 @@ __func__.6041:
 	.string	"image_info_t"
 .LASF149:
 	.string	"UCLASS_USB_EMUL"
-.LASF305:
+.LASF307:
 	.string	"PVI_WF_MAX"
-.LASF324:
+.LASF326:
 	.string	"vcom_offset"
 .LASF187:
 	.string	"UCLASS_PCI_GENERIC"
-.LASF335:
+.LASF337:
 	.string	"global_waveform"
-.LASF325:
+.LASF327:
 	.string	"xwia"
 .LASF105:
 	.string	"image_len"
@@ -12368,21 +12375,21 @@ __func__.6041:
 	.string	"bi_ip_addr"
 .LASF189:
 	.string	"UCLASS_PINCONFIG"
-.LASF375:
+.LASF377:
 	.string	"decode_wf_reset"
-.LASF210:
+.LASF211:
 	.string	"UCLASS_THERMAL"
 .LASF113:
 	.string	"legacy_hdr_os_copy"
 .LASF9:
 	.string	"long long int"
-.LASF380:
+.LASF382:
 	.string	"want_pic"
-.LASF290:
+.LASF292:
 	.string	"WF_TYPE_GLR16"
 .LASF24:
 	.string	"___strtok"
-.LASF267:
+.LASF269:
 	.string	"net_boot_file_expected_size_in_blocks"
 .LASF16:
 	.string	"__kernel_size_t"
@@ -12392,85 +12399,85 @@ __func__.6041:
 	.string	"bootm_headers"
 .LASF37:
 	.string	"protect"
-.LASF213:
+.LASF214:
 	.string	"UCLASS_USB"
-.LASF224:
+.LASF225:
 	.string	"UCLASS_RC"
 .LASF159:
 	.string	"UCLASS_DISPLAY"
-.LASF261:
+.LASF263:
 	.string	"net_null_ethaddr"
-.LASF327:
+.LASF329:
 	.string	"modenumber"
 .LASF71:
 	.string	"_datarel_start_ofs"
-.LASF225:
+.LASF226:
 	.string	"UCLASS_CHARGE_DISPLAY"
-.LASF240:
+.LASF243:
 	.string	"load_addr"
 .LASF116:
 	.string	"fit_hdr_os"
 .LASF72:
 	.string	"_datarelrolocal_start_ofs"
-.LASF313:
+.LASF315:
 	.string	"run_type"
 .LASF8:
 	.string	"unsigned int"
 .LASF18:
 	.string	"ushort"
-.LASF320:
+.LASF322:
 	.string	"panel_size"
-.LASF377:
+.LASF379:
 	.string	"temp1"
-.LASF322:
+.LASF324:
 	.string	"wfm_rev"
-.LASF293:
+.LASF295:
 	.string	"WF_TYPE_GRAY32"
-.LASF394:
+.LASF396:
 	.string	"frame"
 .LASF191:
 	.string	"UCLASS_PMIC"
-.LASF348:
+.LASF350:
 	.string	"temp_index"
 .LASF112:
 	.string	"legacy_hdr_os"
 .LASF81:
 	.string	"off_dt_strings"
-.LASF237:
+.LASF240:
 	.string	"monitor_flash_len"
 .LASF176:
 	.string	"UCLASS_MISC"
 .LASF49:
 	.string	"bi_memsize"
-.LASF296:
+.LASF298:
 	.string	"PVI_WF_RESET"
-.LASF326:
+.LASF328:
 	.string	"unknown1"
-.LASF329:
+.LASF331:
 	.string	"unknown2"
 .LASF26:
 	.string	"image_base"
-.LASF209:
+.LASF210:
 	.string	"UCLASS_SYSRESET"
-.LASF286:
+.LASF288:
 	.string	"WF_TYPE_AUTO"
-.LASF280:
+.LASF282:
 	.string	"current"
 .LASF163:
 	.string	"UCLASS_FIRMWARE"
 .LASF173:
 	.string	"UCLASS_LPC"
-.LASF381:
+.LASF383:
 	.string	"temp2"
-.LASF382:
+.LASF384:
 	.string	"temp3"
-.LASF383:
+.LASF385:
 	.string	"temp4"
 .LASF169:
 	.string	"UCLASS_IDE"
-.LASF401:
-	.string	"israr"
 .LASF403:
+	.string	"israr"
+.LASF405:
 	.string	"block"
 .LASF138:
 	.string	"bootm_headers_t"
@@ -12482,7 +12489,7 @@ __func__.6041:
 	.string	"type"
 .LASF119:
 	.string	"fit_hdr_rd"
-.LASF303:
+.LASF305:
 	.string	"PVI_WF_A2"
 .LASF54:
 	.string	"bi_sramsize"
@@ -12492,7 +12499,7 @@ __func__.6041:
 	.string	"UCLASS_PWM"
 .LASF40:
 	.string	"long double"
-.LASF400:
+.LASF402:
 	.string	"tempdata"
 .LASF128:
 	.string	"rd_start"
@@ -12500,27 +12507,27 @@ __func__.6041:
 	.string	"UCLASS_POWER_DOMAIN"
 .LASF196:
 	.string	"UCLASS_REGULATOR"
-.LASF323:
+.LASF325:
 	.string	"frame_rate"
-.LASF242:
+.LASF245:
 	.string	"save_size"
 .LASF154:
 	.string	"UCLASS_CLK"
-.LASF310:
+.LASF312:
 	.string	"checksum"
-.LASF338:
+.LASF340:
 	.string	"pvi_wf_get_version"
 .LASF101:
 	.string	"ih_name"
 .LASF97:
 	.string	"ih_os"
-.LASF291:
+.LASF293:
 	.string	"WF_TYPE_GLD16"
 .LASF135:
 	.string	"cmdline_end"
-.LASF258:
+.LASF260:
 	.string	"net_rx_packet"
-.LASF236:
+.LASF239:
 	.string	"LOGF_MAX_CATEGORIES"
 .LASF33:
 	.string	"size"
@@ -12528,7 +12535,7 @@ __func__.6041:
 	.string	"long long unsigned int"
 .LASF89:
 	.string	"image_header"
-.LASF285:
+.LASF287:
 	.string	"WF_TYPE_GRAY2"
 .LASF21:
 	.string	"__be32"
@@ -12538,19 +12545,19 @@ __func__.6041:
 	.string	"fit_noffset_os"
 .LASF177:
 	.string	"UCLASS_MMC"
-.LASF235:
+.LASF238:
 	.string	"UCLASS_INVALID"
-.LASF215:
+.LASF216:
 	.string	"UCLASS_USB_HUB"
-.LASF360:
+.LASF362:
 	.string	"get_lut_gray16_data"
-.LASF317:
+.LASF319:
 	.string	"wf_version"
-.LASF231:
+.LASF232:
 	.string	"UCLASS_EBC"
-.LASF294:
+.LASF296:
 	.string	"WF_TYPE_MAX"
-.LASF409:
+.LASF411:
 	.string	"memset"
 .LASF39:
 	.string	"flash_info"
@@ -12560,45 +12567,45 @@ __func__.6041:
 	.string	"region"
 .LASF87:
 	.string	"size_dt_struct"
-.LASF297:
+.LASF299:
 	.string	"PVI_WF_DU"
-.LASF233:
+.LASF234:
 	.string	"UCLASS_RNG"
 .LASF179:
 	.string	"UCLASS_MTD"
-.LASF371:
+.LASF373:
 	.string	"decode_wf_gray2"
 .LASF76:
 	.string	"fdt32_t"
-.LASF344:
+.LASF346:
 	.string	"lut_type"
 .LASF181:
 	.string	"UCLASS_NORTHBRIDGE"
 .LASF60:
 	.string	"bi_enetaddr"
-.LASF314:
+.LASF316:
 	.string	"fpl_platform"
-.LASF414:
+.LASF416:
 	.string	"mtd_info"
-.LASF373:
+.LASF375:
 	.string	"_data"
-.LASF243:
+.LASF246:
 	.string	"in_addr"
-.LASF259:
+.LASF261:
 	.string	"net_rx_packet_len"
-.LASF332:
+.LASF334:
 	.string	"reset_data"
-.LASF346:
+.LASF348:
 	.string	"stype"
-.LASF321:
+.LASF323:
 	.string	"amepd_part_number"
-.LASF385:
+.LASF387:
 	.string	"offset"
-.LASF238:
+.LASF241:
 	.string	"__dtb_dt_begin"
-.LASF388:
+.LASF390:
 	.string	"temp_num"
-.LASF366:
+.LASF368:
 	.string	"black"
 .LASF198:
 	.string	"UCLASS_RESET"
@@ -12608,7 +12615,7 @@ __func__.6041:
 	.string	"UCLASS_AHCI"
 .LASF12:
 	.string	"phys_size_t"
-.LASF384:
+.LASF386:
 	.string	"frm_num"
 .LASF155:
 	.string	"UCLASS_CPU"
@@ -12618,105 +12625,109 @@ __func__.6041:
 	.string	"verify"
 .LASF30:
 	.string	"name"
-.LASF392:
+.LASF394:
 	.string	"parse_mode_version"
-.LASF408:
+.LASF410:
 	.string	"kmalloc"
-.LASF232:
+.LASF233:
 	.string	"UCLASS_EINK_DISPLAY"
 .LASF184:
 	.string	"UCLASS_PANEL_BACKLIGHT"
-.LASF340:
+.LASF342:
 	.string	"pvi_wf"
-.LASF211:
+.LASF212:
 	.string	"UCLASS_TIMER"
-.LASF206:
+.LASF207:
 	.string	"UCLASS_SPI_FLASH"
 .LASF63:
 	.string	"bi_busfreq"
 .LASF6:
 	.string	"short int"
-.LASF359:
+.LASF361:
 	.string	"oldgray"
 .LASF190:
 	.string	"UCLASS_PINCTRL"
 .LASF200:
 	.string	"UCLASS_RAMDISK"
-.LASF379:
+.LASF381:
 	.string	"mode"
 .LASF147:
 	.string	"UCLASS_I2C_EMUL"
-.LASF205:
+.LASF206:
 	.string	"UCLASS_SPMI"
 .LASF144:
 	.string	"UCLASS_TEST_BUS"
-.LASF241:
+.LASF244:
 	.string	"save_addr"
-.LASF352:
+.LASF354:
 	.string	"parse_wf_a2"
 .LASF133:
 	.string	"initrd_end"
-.LASF402:
+.LASF404:
 	.string	"kfree"
-.LASF357:
+.LASF359:
 	.string	"parse_wf_reset"
 .LASF73:
 	.string	"_datarellocal_start_ofs"
-.LASF358:
+.LASF360:
 	.string	"newgray"
-.LASF234:
+.LASF237:
 	.string	"UCLASS_COUNT"
-.LASF318:
+.LASF320:
 	.string	"wf_subversion"
 .LASF32:
 	.string	"block_drvr"
-.LASF410:
+.LASF412:
 	.string	"memcpy"
 .LASF22:
 	.string	"gfp_t"
 .LASF35:
 	.string	"flash_id"
-.LASF228:
+.LASF229:
 	.string	"UCLASS_CRYPTO"
 .LASF127:
 	.string	"fit_noffset_setup"
 .LASF88:
 	.string	"working_fdt"
-.LASF251:
+.LASF253:
 	.string	"net_root_path"
 .LASF160:
 	.string	"UCLASS_DMA"
 .LASF68:
 	.string	"bd_t"
-.LASF244:
+.LASF235:
+	.string	"UCLASS_DMC"
+.LASF247:
 	.string	"s_addr"
-.LASF260:
+.LASF262:
 	.string	"net_bcast_ethaddr"
 .LASF65:
 	.string	"bi_boot_params"
-.LASF347:
+.LASF349:
 	.string	"sftemp"
-.LASF278:
+.LASF280:
 	.string	"mem_malloc_brk"
-.LASF246:
+.LASF248:
 	.string	"net_gateway"
 .LASF48:
 	.string	"bi_memstart"
-.LASF281:
+.LASF283:
 	.string	"epd_lut_type"
-.LASF219:
+.LASF220:
 	.string	"UCLASS_VIDEO_CONSOLE"
-.LASF287:
+.LASF289:
 	.string	"WF_TYPE_A2"
-.LASF315:
+.LASF317:
 	.string	"fpl_lot"
 .LASF46:
 	.string	"reserved"
-.LASF407:
+.LASF409:
 	.string	"free"
-.LASF393:
+.LASF236:
+	.string	"UCLASS_PD"
+.LASF395:
 	.string	"getwaveformdata"
-.LASF309:
+.LASF311:
 	.string	"pvi_waveform"
 .LASF67:
 	.string	"bi_dram"
@@ -12726,7 +12737,7 @@ __func__.6041:
 	.string	"magic"
 .LASF125:
 	.string	"fit_hdr_setup"
-.LASF292:
+.LASF294:
 	.string	"WF_TYPE_GCC16"
 .LASF114:
 	.string	"legacy_hdr_valid"
@@ -12738,27 +12749,27 @@ __func__.6041:
 	.string	"sector_count"
 .LASF100:
 	.string	"ih_comp"
-.LASF283:
+.LASF285:
 	.string	"WF_TYPE_GRAY16"
-.LASF301:
+.LASF303:
 	.string	"PVI_WF_GLR16"
-.LASF374:
+.LASF376:
 	.string	"_data1"
-.LASF333:
+.LASF335:
 	.string	"gray_2_data"
 .LASF130:
 	.string	"ft_addr"
-.LASF229:
+.LASF230:
 	.string	"UCLASS_ETH_PHY"
-.LASF331:
+.LASF333:
 	.string	"gray_data"
-.LASF316:
+.LASF318:
 	.string	"mode_version"
 .LASF4:
 	.string	"uchar"
 .LASF131:
 	.string	"ft_len"
-.LASF308:
+.LASF310:
 	.string	"data"
 .LASF180:
 	.string	"UCLASS_NOP"
@@ -12768,19 +12779,19 @@ __func__.6041:
 	.string	"UCLASS_PCH"
 .LASF186:
 	.string	"UCLASS_PCI"
-.LASF247:
+.LASF249:
 	.string	"net_netmask"
 .LASF69:
 	.string	"IRQ_STACK_START"
 .LASF151:
 	.string	"UCLASS_ADC"
-.LASF390:
+.LASF392:
 	.string	"get_wf_mode_index"
-.LASF342:
+.LASF344:
 	.string	"waveform_file"
 .LASF146:
 	.string	"UCLASS_SPI_EMUL"
-.LASF364:
+.LASF366:
 	.string	"decode_wf_auto"
 .LASF123:
 	.string	"fit_uname_fdt"
diff --git a/drivers/video/rk_eink/epdlut/rkf_waveform.S b/drivers/video/rk_eink/epdlut/rkf_waveform.S
index 3c5798257b..0ed9605bbf 100644
--- a/drivers/video/rk_eink/epdlut/rkf_waveform.S
+++ b/drivers/video/rk_eink/epdlut/rkf_waveform.S
@@ -3,6 +3,7 @@
  *
  * SPDX-License-Identifier:     GPL-2.0+
  */
+
 	.arch armv8-a+nosimd
 	.file	"rkf_waveform.c"
 	.text
@@ -12,7 +13,7 @@
 	.align	2
 	.type	get_wf_buf, %function
 get_wf_buf:
-.LFB217:
+.LFB219:
 	.file 1 "drivers/video/rk_eink/epdlut/rkf_waveform.c"
 	.loc 1 193 0
 	.cfi_startproc
@@ -183,13 +184,13 @@ get_wf_buf:
 	.loc 1 239 0
 	ret
 	.cfi_endproc
-.LFE217:
+.LFE219:
 	.size	get_wf_buf, .-get_wf_buf
 	.section	.text.decode_wf_data,"ax",@progbits
 	.align	2
 	.type	decode_wf_data, %function
 decode_wf_data:
-.LFB219:
+.LFB221:
 	.loc 1 248 0
 	.cfi_startproc
 .LVL33:
@@ -252,13 +253,13 @@ decode_wf_data:
 	.cfi_def_cfa 31, 0
 	ret
 	.cfi_endproc
-.LFE219:
+.LFE221:
 	.size	decode_wf_data, .-decode_wf_data
 	.section	.text.parse_wf_gray16,"ax",@progbits
 	.align	2
 	.type	parse_wf_gray16, %function
 parse_wf_gray16:
-.LFB223:
+.LFB225:
 	.loc 1 349 0
 	.cfi_startproc
 .LVL42:
@@ -305,14 +306,14 @@ parse_wf_gray16:
 	csel	w0, w0, wzr, eq
 	ret
 	.cfi_endproc
-.LFE223:
+.LFE225:
 	.size	parse_wf_gray16, .-parse_wf_gray16
 	.section	.text.rkf_wf_input,"ax",@progbits
 	.align	2
 	.global	rkf_wf_input
 	.type	rkf_wf_input, %function
 rkf_wf_input:
-.LFB214:
+.LFB216:
 	.loc 1 129 0
 	.cfi_startproc
 .LVL51:
@@ -540,14 +541,14 @@ rkf_wf_input:
 	.loc 1 152 0
 	b	.L28
 	.cfi_endproc
-.LFE214:
+.LFE216:
 	.size	rkf_wf_input, .-rkf_wf_input
 	.section	.text.rkf_wf_get_version,"ax",@progbits
 	.align	2
 	.global	rkf_wf_get_version
 	.type	rkf_wf_get_version, %function
 rkf_wf_get_version:
-.LFB215:
+.LFB217:
 	.loc 1 163 0
 	.cfi_startproc
 	.loc 1 164 0
@@ -560,14 +561,14 @@ rkf_wf_get_version:
 	csel	x0, x0, xzr, ne
 	ret
 	.cfi_endproc
-.LFE215:
+.LFE217:
 	.size	rkf_wf_get_version, .-rkf_wf_get_version
 	.section	.text.rkf_wf_get_lut,"ax",@progbits
 	.align	2
 	.global	rkf_wf_get_lut
 	.type	rkf_wf_get_lut, %function
 rkf_wf_get_lut:
-.LFB227:
+.LFB229:
 	.loc 1 462 0
 	.cfi_startproc
 .LVL77:
@@ -1033,7 +1034,7 @@ rkf_wf_get_lut:
 .LVL159:
 	ret
 	.cfi_endproc
-.LFE227:
+.LFE229:
 	.size	rkf_wf_get_lut, .-rkf_wf_get_lut
 	.section	.bss.crc32_table,"aw",@nobits
 	.align	3
@@ -1049,19 +1050,19 @@ crc32_table:
 	.size	global_waveform, 8
 global_waveform:
 	.zero	8
-	.section	.data.sftemp.6130,"aw",@progbits
+	.section	.data.sftemp.6190,"aw",@progbits
 	.align	2
 	.set	.LANCHOR2,. + 0
-	.type	sftemp.6130, %object
-	.size	sftemp.6130, 4
-sftemp.6130:
+	.type	sftemp.6190, %object
+	.size	sftemp.6190, 4
+sftemp.6190:
 	.word	-1
-	.section	.data.stype.6129,"aw",@progbits
+	.section	.data.stype.6189,"aw",@progbits
 	.align	2
 	.set	.LANCHOR3,. + 0
-	.type	stype.6129, %object
-	.size	stype.6129, 4
-stype.6129:
+	.type	stype.6189, %object
+	.size	stype.6189, 4
+stype.6189:
 	.word	13
 	.section	.rodata.rkf_wf_input.str1.1,"aMS",@progbits,1
 .LC0:
@@ -1103,15 +1104,15 @@ stype.6129:
 	.file 25 "include/log.h"
 	.section	.debug_info,"",@progbits
 .Ldebug_info0:
-	.4byte	0x1d8c
+	.4byte	0x1d7c
 	.2byte	0x4
 	.4byte	.Ldebug_abbrev0
 	.byte	0x8
 	.uleb128 0x1
-	.4byte	.LASF388
-	.byte	0xc
-	.4byte	.LASF389
 	.4byte	.LASF390
+	.byte	0xc
+	.4byte	.LASF391
+	.4byte	.LASF392
 	.4byte	.Ldebug_ranges0+0x210
 	.8byte	0
 	.4byte	.Ldebug_line0
@@ -1349,7 +1350,7 @@ stype.6129:
 	.uleb128 0x5
 	.4byte	.LASF32
 	.byte	0xb
-	.byte	0xce
+	.byte	0xdf
 	.4byte	0x206
 	.uleb128 0x13
 	.2byte	0x1220
@@ -1408,7 +1409,7 @@ stype.6129:
 	.2byte	0x1ff
 	.byte	0
 	.uleb128 0x17
-	.4byte	.LASF391
+	.4byte	.LASF393
 	.uleb128 0x8
 	.byte	0x8
 	.4byte	0x28c
@@ -2145,12 +2146,12 @@ stype.6129:
 	.2byte	0x198
 	.4byte	0x88a
 	.uleb128 0x24
-	.4byte	.LASF269
+	.4byte	.LASF271
 	.byte	0x4
 	.4byte	0x59
 	.byte	0x15
 	.byte	0xe
-	.4byte	0xaf3
+	.4byte	0xb05
 	.uleb128 0x25
 	.4byte	.LASF140
 	.byte	0
@@ -2436,8 +2437,17 @@ stype.6129:
 	.uleb128 0x25
 	.4byte	.LASF234
 	.byte	0x5e
-	.uleb128 0x26
+	.uleb128 0x25
 	.4byte	.LASF235
+	.byte	0x5f
+	.uleb128 0x25
+	.4byte	.LASF236
+	.byte	0x60
+	.uleb128 0x25
+	.4byte	.LASF237
+	.byte	0x61
+	.uleb128 0x26
+	.4byte	.LASF238
 	.sleb128 -1
 	.byte	0
 	.uleb128 0x27
@@ -2445,61 +2455,61 @@ stype.6129:
 	.4byte	0x84
 	.byte	0x19
 	.byte	0xf6
-	.4byte	0xb06
+	.4byte	0xb18
 	.uleb128 0x25
-	.4byte	.LASF236
+	.4byte	.LASF239
 	.byte	0x5
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xe1
-	.4byte	0xb16
+	.4byte	0xb28
 	.uleb128 0xe
 	.4byte	0xd4
 	.byte	0x1f
 	.byte	0
 	.uleb128 0x5
-	.4byte	.LASF237
+	.4byte	.LASF240
 	.byte	0x3
 	.byte	0xad
 	.4byte	0x11b
 	.uleb128 0xa
 	.4byte	0x99
-	.4byte	0xb2c
+	.4byte	0xb3e
 	.uleb128 0xb
 	.byte	0
 	.uleb128 0x5
-	.4byte	.LASF238
+	.4byte	.LASF241
 	.byte	0x3
 	.byte	0xaf
-	.4byte	0xb21
+	.4byte	0xb33
 	.uleb128 0x5
-	.4byte	.LASF239
+	.4byte	.LASF242
 	.byte	0x3
 	.byte	0xb0
-	.4byte	0xb21
+	.4byte	0xb33
 	.uleb128 0x5
-	.4byte	.LASF240
+	.4byte	.LASF243
 	.byte	0x3
 	.byte	0xfe
 	.4byte	0x11b
 	.uleb128 0x5
-	.4byte	.LASF241
+	.4byte	.LASF244
 	.byte	0x3
 	.byte	0xff
 	.4byte	0x11b
 	.uleb128 0xc
-	.4byte	.LASF242
+	.4byte	.LASF245
 	.byte	0x3
 	.2byte	0x100
 	.4byte	0x11b
 	.uleb128 0xf
-	.4byte	.LASF243
+	.4byte	.LASF246
 	.byte	0x4
 	.byte	0x14
 	.byte	0x2e
-	.4byte	0xb7d
+	.4byte	0xb8f
 	.uleb128 0x10
-	.4byte	.LASF244
+	.4byte	.LASF247
 	.byte	0x14
 	.byte	0x2f
 	.4byte	0x131
@@ -2508,219 +2518,204 @@ stype.6129:
 	.uleb128 0x8
 	.byte	0x8
 	.4byte	0x29
-	.uleb128 0x28
-	.4byte	0xb93
-	.uleb128 0x12
-	.4byte	0x147
-	.uleb128 0x12
-	.4byte	0x59
-	.byte	0
-	.uleb128 0xc
-	.4byte	.LASF245
-	.byte	0x14
-	.2byte	0x11e
-	.4byte	0xb9f
-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0xb83
 	.uleb128 0xa
 	.4byte	0x99
-	.4byte	0xbb5
+	.4byte	0xba5
 	.uleb128 0xe
 	.4byte	0xd4
 	.byte	0x5
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF246
+	.4byte	.LASF248
 	.byte	0x14
 	.2byte	0x1fd
-	.4byte	0xb64
+	.4byte	0xb76
 	.uleb128 0xc
-	.4byte	.LASF247
+	.4byte	.LASF249
 	.byte	0x14
 	.2byte	0x1fe
-	.4byte	0xb64
+	.4byte	0xb76
 	.uleb128 0xc
-	.4byte	.LASF248
+	.4byte	.LASF250
 	.byte	0x14
 	.2byte	0x200
-	.4byte	0xb64
+	.4byte	0xb76
 	.uleb128 0xc
-	.4byte	.LASF249
+	.4byte	.LASF251
 	.byte	0x14
 	.2byte	0x205
-	.4byte	0xb06
+	.4byte	0xb18
 	.uleb128 0xc
-	.4byte	.LASF250
+	.4byte	.LASF252
 	.byte	0x14
 	.2byte	0x206
-	.4byte	0xb06
+	.4byte	0xb18
 	.uleb128 0xa
 	.4byte	0xe1
-	.4byte	0xc01
+	.4byte	0xbf1
 	.uleb128 0xe
 	.4byte	0xd4
 	.byte	0x3f
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF251
+	.4byte	.LASF253
 	.byte	0x14
 	.2byte	0x207
-	.4byte	0xbf1
+	.4byte	0xbe1
 	.uleb128 0xc
-	.4byte	.LASF252
+	.4byte	.LASF254
 	.byte	0x14
 	.2byte	0x209
-	.4byte	0xba5
+	.4byte	0xb95
 	.uleb128 0xc
-	.4byte	.LASF253
+	.4byte	.LASF255
 	.byte	0x14
 	.2byte	0x20a
-	.4byte	0xba5
+	.4byte	0xb95
 	.uleb128 0xc
-	.4byte	.LASF254
+	.4byte	.LASF256
 	.byte	0x14
 	.2byte	0x20b
-	.4byte	0xb64
+	.4byte	0xb76
 	.uleb128 0xc
-	.4byte	.LASF255
+	.4byte	.LASF257
 	.byte	0x14
 	.2byte	0x20c
-	.4byte	0xb64
+	.4byte	0xb76
 	.uleb128 0xc
-	.4byte	.LASF256
+	.4byte	.LASF258
 	.byte	0x14
 	.2byte	0x20d
-	.4byte	0xb7d
+	.4byte	0xb8f
 	.uleb128 0xa
-	.4byte	0xb7d
-	.4byte	0xc59
+	.4byte	0xb8f
+	.4byte	0xc49
 	.uleb128 0xe
 	.4byte	0xd4
 	.byte	0x3
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF257
+	.4byte	.LASF259
 	.byte	0x14
 	.2byte	0x20e
-	.4byte	0xc49
+	.4byte	0xc39
 	.uleb128 0xc
-	.4byte	.LASF258
+	.4byte	.LASF260
 	.byte	0x14
 	.2byte	0x20f
-	.4byte	0xb7d
+	.4byte	0xb8f
 	.uleb128 0xc
-	.4byte	.LASF259
+	.4byte	.LASF261
 	.byte	0x14
 	.2byte	0x210
 	.4byte	0x59
 	.uleb128 0xa
 	.4byte	0xa3
-	.4byte	0xc8d
+	.4byte	0xc7d
 	.uleb128 0xe
 	.4byte	0xd4
 	.byte	0x5
 	.byte	0
 	.uleb128 0x4
-	.4byte	0xc7d
+	.4byte	0xc6d
 	.uleb128 0xc
-	.4byte	.LASF260
+	.4byte	.LASF262
 	.byte	0x14
 	.2byte	0x211
-	.4byte	0xc8d
+	.4byte	0xc7d
 	.uleb128 0xc
-	.4byte	.LASF261
+	.4byte	.LASF263
 	.byte	0x14
 	.2byte	0x212
-	.4byte	0xc8d
+	.4byte	0xc7d
 	.uleb128 0xc
-	.4byte	.LASF262
+	.4byte	.LASF264
 	.byte	0x14
 	.2byte	0x216
 	.4byte	0x110
 	.uleb128 0xc
-	.4byte	.LASF263
+	.4byte	.LASF265
 	.byte	0x14
 	.2byte	0x217
 	.4byte	0x110
 	.uleb128 0xc
-	.4byte	.LASF264
+	.4byte	.LASF266
 	.byte	0x14
 	.2byte	0x219
 	.4byte	0x59
 	.uleb128 0xa
 	.4byte	0xe1
-	.4byte	0xcdf
+	.4byte	0xccf
 	.uleb128 0x16
 	.4byte	0xd4
 	.2byte	0x3ff
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF265
+	.4byte	.LASF267
 	.byte	0x14
 	.2byte	0x220
-	.4byte	0xcce
+	.4byte	0xcbe
 	.uleb128 0xc
-	.4byte	.LASF266
+	.4byte	.LASF268
 	.byte	0x14
 	.2byte	0x222
 	.4byte	0xa8
 	.uleb128 0xc
-	.4byte	.LASF267
+	.4byte	.LASF269
 	.byte	0x14
 	.2byte	0x224
 	.4byte	0xa8
 	.uleb128 0xc
-	.4byte	.LASF268
+	.4byte	.LASF270
 	.byte	0x14
 	.2byte	0x230
-	.4byte	0xb64
-	.uleb128 0x29
-	.4byte	.LASF270
+	.4byte	0xb76
+	.uleb128 0x28
+	.4byte	.LASF272
 	.byte	0x4
 	.4byte	0x84
 	.byte	0x14
 	.2byte	0x286
-	.4byte	0xd39
+	.4byte	0xd29
 	.uleb128 0x25
-	.4byte	.LASF271
+	.4byte	.LASF273
 	.byte	0
 	.uleb128 0x25
-	.4byte	.LASF272
+	.4byte	.LASF274
 	.byte	0x1
 	.uleb128 0x25
-	.4byte	.LASF273
+	.4byte	.LASF275
 	.byte	0x2
 	.uleb128 0x25
-	.4byte	.LASF274
+	.4byte	.LASF276
 	.byte	0x3
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF275
+	.4byte	.LASF277
 	.byte	0x14
 	.2byte	0x28c
-	.4byte	0xd0f
+	.4byte	0xcff
 	.uleb128 0xc
-	.4byte	.LASF276
+	.4byte	.LASF278
 	.byte	0x16
 	.2byte	0x3ba
 	.4byte	0x11b
 	.uleb128 0xc
-	.4byte	.LASF277
+	.4byte	.LASF279
 	.byte	0x16
 	.2byte	0x3bb
 	.4byte	0x11b
 	.uleb128 0xc
-	.4byte	.LASF278
+	.4byte	.LASF280
 	.byte	0x16
 	.2byte	0x3bc
 	.4byte	0x11b
 	.uleb128 0xf
-	.4byte	.LASF279
+	.4byte	.LASF281
 	.byte	0x4
 	.byte	0x2
 	.byte	0xd
-	.4byte	0xd82
+	.4byte	0xd72
 	.uleb128 0x19
 	.string	"pid"
 	.byte	0x2
@@ -2729,77 +2724,77 @@ stype.6129:
 	.byte	0
 	.byte	0
 	.uleb128 0x5
-	.4byte	.LASF280
+	.4byte	.LASF282
 	.byte	0x2
 	.byte	0x11
-	.4byte	0xd8d
+	.4byte	0xd7d
 	.uleb128 0x8
 	.byte	0x8
-	.4byte	0xd69
+	.4byte	0xd59
 	.uleb128 0x24
-	.4byte	.LASF281
+	.4byte	.LASF283
 	.byte	0x4
 	.4byte	0x84
 	.byte	0x17
 	.byte	0x14
-	.4byte	0xdf2
+	.4byte	0xde2
 	.uleb128 0x25
-	.4byte	.LASF282
+	.4byte	.LASF284
 	.byte	0x1
 	.uleb128 0x25
-	.4byte	.LASF283
+	.4byte	.LASF285
 	.byte	0x2
 	.uleb128 0x25
-	.4byte	.LASF284
+	.4byte	.LASF286
 	.byte	0x3
 	.uleb128 0x25
-	.4byte	.LASF285
+	.4byte	.LASF287
 	.byte	0x4
 	.uleb128 0x25
-	.4byte	.LASF286
+	.4byte	.LASF288
 	.byte	0x5
 	.uleb128 0x25
-	.4byte	.LASF287
+	.4byte	.LASF289
 	.byte	0x6
 	.uleb128 0x25
-	.4byte	.LASF288
+	.4byte	.LASF290
 	.byte	0x7
 	.uleb128 0x25
-	.4byte	.LASF289
+	.4byte	.LASF291
 	.byte	0x8
 	.uleb128 0x25
-	.4byte	.LASF290
+	.4byte	.LASF292
 	.byte	0x9
 	.uleb128 0x25
-	.4byte	.LASF291
+	.4byte	.LASF293
 	.byte	0xa
 	.uleb128 0x25
-	.4byte	.LASF292
+	.4byte	.LASF294
 	.byte	0xb
 	.uleb128 0x25
-	.4byte	.LASF293
+	.4byte	.LASF295
 	.byte	0xc
 	.uleb128 0x25
-	.4byte	.LASF294
+	.4byte	.LASF296
 	.byte	0xd
 	.byte	0
 	.uleb128 0xf
-	.4byte	.LASF295
+	.4byte	.LASF297
 	.byte	0x10
 	.byte	0x17
 	.byte	0x43
-	.4byte	0xe17
+	.4byte	0xe07
 	.uleb128 0x10
-	.4byte	.LASF296
+	.4byte	.LASF298
 	.byte	0x17
 	.byte	0x44
 	.4byte	0x84
 	.byte	0
 	.uleb128 0x10
-	.4byte	.LASF297
+	.4byte	.LASF299
 	.byte	0x17
 	.byte	0x45
-	.4byte	0xe17
+	.4byte	0xe07
 	.byte	0x8
 	.byte	0
 	.uleb128 0x8
@@ -2807,354 +2802,354 @@ stype.6129:
 	.4byte	0x84
 	.uleb128 0x8
 	.byte	0x8
-	.4byte	0xdf2
+	.4byte	0xde2
 	.uleb128 0x24
-	.4byte	.LASF298
+	.4byte	.LASF300
 	.byte	0x4
 	.4byte	0x84
 	.byte	0x1
 	.byte	0x15
-	.4byte	0xe5e
+	.4byte	0xe4e
 	.uleb128 0x25
-	.4byte	.LASF299
+	.4byte	.LASF301
 	.byte	0
 	.uleb128 0x25
-	.4byte	.LASF300
+	.4byte	.LASF302
 	.byte	0x1
 	.uleb128 0x25
-	.4byte	.LASF301
+	.4byte	.LASF303
 	.byte	0x2
 	.uleb128 0x25
-	.4byte	.LASF302
+	.4byte	.LASF304
 	.byte	0x3
 	.uleb128 0x25
-	.4byte	.LASF303
+	.4byte	.LASF305
 	.byte	0x4
 	.uleb128 0x25
-	.4byte	.LASF304
+	.4byte	.LASF306
 	.byte	0x5
 	.uleb128 0x25
-	.4byte	.LASF305
+	.4byte	.LASF307
 	.byte	0x6
 	.byte	0
 	.uleb128 0x18
-	.4byte	.LASF306
+	.4byte	.LASF308
 	.2byte	0x954
 	.byte	0x1
 	.byte	0x1f
-	.4byte	0xf74
+	.4byte	0xf64
 	.uleb128 0x10
-	.4byte	.LASF307
+	.4byte	.LASF309
 	.byte	0x1
 	.byte	0x20
 	.4byte	0x59
 	.byte	0
 	.uleb128 0x10
-	.4byte	.LASF308
+	.4byte	.LASF310
 	.byte	0x1
 	.byte	0x21
-	.4byte	0xf74
+	.4byte	0xf64
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF83
 	.byte	0x1
 	.byte	0x22
-	.4byte	0xf74
+	.4byte	0xf64
 	.byte	0x14
 	.uleb128 0x10
-	.4byte	.LASF309
+	.4byte	.LASF311
 	.byte	0x1
 	.byte	0x23
-	.4byte	0xf74
+	.4byte	0xf64
 	.byte	0x24
 	.uleb128 0x10
-	.4byte	.LASF310
+	.4byte	.LASF312
 	.byte	0x1
 	.byte	0x24
-	.4byte	0xf74
+	.4byte	0xf64
 	.byte	0x34
 	.uleb128 0x10
-	.4byte	.LASF311
+	.4byte	.LASF313
 	.byte	0x1
 	.byte	0x25
-	.4byte	0xf74
+	.4byte	0xf64
 	.byte	0x44
 	.uleb128 0x10
-	.4byte	.LASF312
+	.4byte	.LASF314
 	.byte	0x1
 	.byte	0x26
-	.4byte	0xbf1
+	.4byte	0xbe1
 	.byte	0x54
 	.uleb128 0x10
-	.4byte	.LASF313
+	.4byte	.LASF315
 	.byte	0x1
 	.byte	0x27
-	.4byte	0xbf1
+	.4byte	0xbe1
 	.byte	0x94
 	.uleb128 0x10
-	.4byte	.LASF314
+	.4byte	.LASF316
 	.byte	0x1
 	.byte	0x28
-	.4byte	0xbf1
+	.4byte	0xbe1
 	.byte	0xd4
 	.uleb128 0x14
-	.4byte	.LASF315
+	.4byte	.LASF317
 	.byte	0x1
 	.byte	0x29
-	.4byte	0xbf1
+	.4byte	0xbe1
 	.2byte	0x114
 	.uleb128 0x14
-	.4byte	.LASF316
+	.4byte	.LASF318
 	.byte	0x1
 	.byte	0x2a
-	.4byte	0xbf1
+	.4byte	0xbe1
 	.2byte	0x154
 	.uleb128 0x14
-	.4byte	.LASF317
+	.4byte	.LASF319
 	.byte	0x1
 	.byte	0x2b
-	.4byte	0xbf1
+	.4byte	0xbe1
 	.2byte	0x194
 	.uleb128 0x14
-	.4byte	.LASF318
+	.4byte	.LASF320
 	.byte	0x1
 	.byte	0x2c
-	.4byte	0xbf1
+	.4byte	0xbe1
 	.2byte	0x1d4
 	.uleb128 0x14
-	.4byte	.LASF319
+	.4byte	.LASF321
 	.byte	0x1
 	.byte	0x2d
-	.4byte	0xbf1
+	.4byte	0xbe1
 	.2byte	0x214
 	.uleb128 0x14
-	.4byte	.LASF320
+	.4byte	.LASF322
 	.byte	0x1
 	.byte	0x2e
-	.4byte	0xf84
+	.4byte	0xf74
 	.2byte	0x254
 	.uleb128 0x14
-	.4byte	.LASF321
+	.4byte	.LASF323
 	.byte	0x1
 	.byte	0x2f
-	.4byte	0xf84
+	.4byte	0xf74
 	.2byte	0x354
 	.uleb128 0x14
-	.4byte	.LASF322
+	.4byte	.LASF324
 	.byte	0x1
 	.byte	0x30
-	.4byte	0xf84
+	.4byte	0xf74
 	.2byte	0x454
 	.uleb128 0x14
-	.4byte	.LASF323
+	.4byte	.LASF325
 	.byte	0x1
 	.byte	0x31
-	.4byte	0xf84
+	.4byte	0xf74
 	.2byte	0x554
 	.uleb128 0x14
-	.4byte	.LASF324
+	.4byte	.LASF326
 	.byte	0x1
 	.byte	0x32
-	.4byte	0xf84
+	.4byte	0xf74
 	.2byte	0x654
 	.uleb128 0x14
-	.4byte	.LASF325
+	.4byte	.LASF327
 	.byte	0x1
 	.byte	0x33
-	.4byte	0xf84
+	.4byte	0xf74
 	.2byte	0x754
 	.uleb128 0x14
-	.4byte	.LASF326
+	.4byte	.LASF328
 	.byte	0x1
 	.byte	0x34
-	.4byte	0xf84
+	.4byte	0xf74
 	.2byte	0x854
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xe1
-	.4byte	0xf84
+	.4byte	0xf74
 	.uleb128 0xe
 	.4byte	0xd4
 	.byte	0xf
 	.byte	0
 	.uleb128 0xa
 	.4byte	0x84
-	.4byte	0xf94
+	.4byte	0xf84
 	.uleb128 0xe
 	.4byte	0xd4
 	.byte	0x3f
 	.byte	0
-	.uleb128 0x2a
-	.4byte	.LASF327
+	.uleb128 0x29
+	.4byte	.LASF329
 	.byte	0x1
 	.byte	0x38
-	.4byte	0xfa9
+	.4byte	0xf99
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	global_waveform
 	.uleb128 0x8
 	.byte	0x8
-	.4byte	0xe5e
+	.4byte	0xe4e
 	.uleb128 0xa
 	.4byte	0x84
-	.4byte	0xfbf
+	.4byte	0xfaf
 	.uleb128 0xe
 	.4byte	0xd4
 	.byte	0xff
 	.byte	0
-	.uleb128 0x2a
-	.4byte	.LASF328
+	.uleb128 0x29
+	.4byte	.LASF330
 	.byte	0x1
 	.byte	0x39
-	.4byte	0xfaf
+	.4byte	0xf9f
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	crc32_table
-	.uleb128 0x2b
-	.4byte	.LASF362
+	.uleb128 0x2a
+	.4byte	.LASF364
 	.byte	0x1
 	.2byte	0x1cd
 	.4byte	0x59
-	.8byte	.LFB227
-	.8byte	.LFE227-.LFB227
+	.8byte	.LFB229
+	.8byte	.LFE229-.LFB229
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x14f4
-	.uleb128 0x2c
-	.4byte	.LASF329
+	.4byte	0x14e4
+	.uleb128 0x2b
+	.4byte	.LASF331
 	.byte	0x1
 	.2byte	0x1cd
-	.4byte	0xe1d
+	.4byte	0xe0d
 	.4byte	.LLST35
-	.uleb128 0x2c
-	.4byte	.LASF330
+	.uleb128 0x2b
+	.4byte	.LASF332
 	.byte	0x1
 	.2byte	0x1cd
-	.4byte	0xd93
+	.4byte	0xd83
 	.4byte	.LLST36
-	.uleb128 0x2c
-	.4byte	.LASF331
+	.uleb128 0x2b
+	.4byte	.LASF333
 	.byte	0x1
 	.2byte	0x1cd
 	.4byte	0x59
 	.4byte	.LLST37
-	.uleb128 0x2d
-	.4byte	.LASF332
+	.uleb128 0x2c
+	.4byte	.LASF334
 	.byte	0x1
 	.2byte	0x1cf
-	.4byte	0xd93
+	.4byte	0xd83
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	stype.6129
-	.uleb128 0x2d
-	.4byte	.LASF333
+	.8byte	stype.6189
+	.uleb128 0x2c
+	.4byte	.LASF335
 	.byte	0x1
 	.2byte	0x1d0
 	.4byte	0x59
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	sftemp.6130
-	.uleb128 0x2e
+	.8byte	sftemp.6190
+	.uleb128 0x2d
 	.string	"ret"
 	.byte	0x1
 	.2byte	0x1d1
 	.4byte	0x59
 	.4byte	.LLST38
-	.uleb128 0x2f
-	.4byte	0x1d0b
+	.uleb128 0x2e
+	.4byte	0x1cfb
 	.8byte	.LBB104
 	.8byte	.LBE104-.LBB104
 	.byte	0x1
 	.2byte	0x1e2
-	.4byte	0x1095
-	.uleb128 0x30
-	.4byte	0x1d17
+	.4byte	0x1085
+	.uleb128 0x2f
+	.4byte	0x1d07
 	.4byte	.LLST39
-	.uleb128 0x31
+	.uleb128 0x30
 	.8byte	.LVL80
-	.4byte	0x1d4a
+	.4byte	0x1d3a
 	.byte	0
-	.uleb128 0x32
-	.4byte	0x169a
+	.uleb128 0x31
+	.4byte	0x168a
 	.8byte	.LBB106
 	.4byte	.Ldebug_ranges0+0x180
 	.byte	0x1
 	.2byte	0x1ef
-	.4byte	0x125c
-	.uleb128 0x30
-	.4byte	0x16b7
+	.4byte	0x124c
+	.uleb128 0x2f
+	.4byte	0x16a7
 	.4byte	.LLST40
-	.uleb128 0x30
-	.4byte	0x16ab
+	.uleb128 0x2f
+	.4byte	0x169b
 	.4byte	.LLST41
-	.uleb128 0x33
+	.uleb128 0x32
 	.4byte	.Ldebug_ranges0+0x180
+	.uleb128 0x33
+	.4byte	0x16b3
 	.uleb128 0x34
-	.4byte	0x16c3
-	.uleb128 0x35
-	.4byte	0x16cf
+	.4byte	0x16bf
 	.4byte	.LLST42
-	.uleb128 0x35
-	.4byte	0x16db
+	.uleb128 0x34
+	.4byte	0x16cb
 	.4byte	.LLST43
-	.uleb128 0x35
-	.4byte	0x16e7
+	.uleb128 0x34
+	.4byte	0x16d7
 	.4byte	.LLST44
-	.uleb128 0x32
-	.4byte	0x1760
+	.uleb128 0x31
+	.4byte	0x1750
 	.8byte	.LBB108
 	.4byte	.Ldebug_ranges0+0x1b0
 	.byte	0x1
 	.2byte	0x152
-	.4byte	0x11cd
-	.uleb128 0x30
-	.4byte	0x1771
+	.4byte	0x11bd
+	.uleb128 0x2f
+	.4byte	0x1761
 	.4byte	.LLST45
-	.uleb128 0x33
+	.uleb128 0x32
 	.4byte	.Ldebug_ranges0+0x1b0
-	.uleb128 0x35
-	.4byte	0x177d
+	.uleb128 0x34
+	.4byte	0x176d
 	.4byte	.LLST46
+	.uleb128 0x33
+	.4byte	0x1779
 	.uleb128 0x34
-	.4byte	0x1789
-	.uleb128 0x35
-	.4byte	0x1795
+	.4byte	0x1785
 	.4byte	.LLST47
-	.uleb128 0x35
-	.4byte	0x179f
+	.uleb128 0x34
+	.4byte	0x178f
 	.4byte	.LLST48
-	.uleb128 0x35
-	.4byte	0x17a9
+	.uleb128 0x34
+	.4byte	0x1799
 	.4byte	.LLST49
-	.uleb128 0x35
-	.4byte	0x17b3
+	.uleb128 0x34
+	.4byte	0x17a3
 	.4byte	.LLST50
-	.uleb128 0x35
-	.4byte	0x17bd
+	.uleb128 0x34
+	.4byte	0x17ad
 	.4byte	.LLST51
-	.uleb128 0x35
-	.4byte	0x17c9
+	.uleb128 0x34
+	.4byte	0x17b9
 	.4byte	.LLST52
-	.uleb128 0x35
-	.4byte	0x17d5
+	.uleb128 0x34
+	.4byte	0x17c5
 	.4byte	.LLST53
-	.uleb128 0x2f
-	.4byte	0x1d23
+	.uleb128 0x2e
+	.4byte	0x1d13
 	.8byte	.LBB110
 	.8byte	.LBE110-.LBB110
 	.byte	0x1
 	.2byte	0x10f
-	.4byte	0x11a7
-	.uleb128 0x30
-	.4byte	0x1d3e
+	.4byte	0x1197
+	.uleb128 0x2f
+	.4byte	0x1d2e
 	.4byte	.LLST54
-	.uleb128 0x30
-	.4byte	0x1d33
+	.uleb128 0x2f
+	.4byte	0x1d23
 	.4byte	.LLST55
-	.uleb128 0x36
+	.uleb128 0x35
 	.8byte	.LVL91
-	.4byte	0x1d56
-	.uleb128 0x37
+	.4byte	0x1d46
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x8
@@ -3165,7 +3160,7 @@ stype.6129:
 	.byte	0xa
 	.2byte	0x7c00
 	.byte	0x1a
-	.uleb128 0x37
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x3
@@ -3173,32 +3168,32 @@ stype.6129:
 	.2byte	0x8000
 	.byte	0
 	.byte	0
-	.uleb128 0x38
+	.uleb128 0x37
 	.8byte	.LBB112
 	.8byte	.LBE112-.LBB112
-	.uleb128 0x35
-	.4byte	0x17e2
+	.uleb128 0x34
+	.4byte	0x17d2
 	.4byte	.LLST56
-	.uleb128 0x35
-	.4byte	0x17ee
+	.uleb128 0x34
+	.4byte	0x17de
 	.4byte	.LLST57
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x2f
-	.4byte	0x1d0b
+	.uleb128 0x2e
+	.4byte	0x1cfb
 	.8byte	.LBB114
 	.8byte	.LBE114-.LBB114
 	.byte	0x1
 	.2byte	0x154
-	.4byte	0x1207
-	.uleb128 0x30
-	.4byte	0x1d17
+	.4byte	0x11f7
+	.uleb128 0x2f
+	.4byte	0x1d07
 	.4byte	.LLST58
-	.uleb128 0x36
+	.uleb128 0x35
 	.8byte	.LVL95
-	.4byte	0x1d4a
-	.uleb128 0x37
+	.4byte	0x1d3a
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
@@ -3206,31 +3201,31 @@ stype.6129:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x2f
-	.4byte	0x1d0b
+	.uleb128 0x2e
+	.4byte	0x1cfb
 	.8byte	.LBB117
 	.8byte	.LBE117-.LBB117
 	.byte	0x1
 	.2byte	0x158
-	.4byte	0x122d
-	.uleb128 0x30
-	.4byte	0x1d17
+	.4byte	0x121d
+	.uleb128 0x2f
+	.4byte	0x1d07
 	.4byte	.LLST59
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x38
 	.8byte	.LVL83
-	.4byte	0x18c8
-	.4byte	0x1244
-	.uleb128 0x37
+	.4byte	0x18b8
+	.4byte	0x1234
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x1
 	.byte	0x30
 	.byte	0
-	.uleb128 0x36
+	.uleb128 0x35
 	.8byte	.LVL87
-	.4byte	0x17fc
-	.uleb128 0x37
+	.4byte	0x17ec
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x4
@@ -3241,131 +3236,131 @@ stype.6129:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x32
-	.4byte	0x1542
+	.uleb128 0x31
+	.4byte	0x1532
 	.8byte	.LBB121
 	.4byte	.Ldebug_ranges0+0x1e0
 	.byte	0x1
 	.2byte	0x219
-	.4byte	0x13d6
-	.uleb128 0x30
-	.4byte	0x155f
+	.4byte	0x13c6
+	.uleb128 0x2f
+	.4byte	0x154f
 	.4byte	.LLST60
-	.uleb128 0x30
-	.4byte	0x1553
+	.uleb128 0x2f
+	.4byte	0x1543
 	.4byte	.LLST61
-	.uleb128 0x33
+	.uleb128 0x32
 	.4byte	.Ldebug_ranges0+0x1e0
+	.uleb128 0x33
+	.4byte	0x155b
 	.uleb128 0x34
-	.4byte	0x156b
-	.uleb128 0x35
-	.4byte	0x1577
+	.4byte	0x1567
 	.4byte	.LLST62
-	.uleb128 0x35
-	.4byte	0x1583
+	.uleb128 0x34
+	.4byte	0x1573
 	.4byte	.LLST63
-	.uleb128 0x35
-	.4byte	0x158f
+	.uleb128 0x34
+	.4byte	0x157f
 	.4byte	.LLST64
-	.uleb128 0x2f
-	.4byte	0x1d0b
+	.uleb128 0x2e
+	.4byte	0x1cfb
 	.8byte	.LBB123
 	.8byte	.LBE123-.LBB123
 	.byte	0x1
 	.2byte	0x1aa
-	.4byte	0x12de
-	.uleb128 0x30
-	.4byte	0x1d17
+	.4byte	0x12ce
+	.uleb128 0x2f
+	.4byte	0x1d07
 	.4byte	.LLST65
-	.uleb128 0x31
+	.uleb128 0x30
 	.8byte	.LVL113
-	.4byte	0x1d4a
+	.4byte	0x1d3a
 	.byte	0
-	.uleb128 0x2f
-	.4byte	0x18ac
+	.uleb128 0x2e
+	.4byte	0x189c
 	.8byte	.LBB125
 	.8byte	.LBE125-.LBB125
 	.byte	0x1
 	.2byte	0x19c
-	.4byte	0x1304
-	.uleb128 0x30
-	.4byte	0x18bc
+	.4byte	0x12f4
+	.uleb128 0x2f
+	.4byte	0x18ac
 	.4byte	.LLST66
 	.byte	0
-	.uleb128 0x2f
-	.4byte	0x16f4
+	.uleb128 0x2e
+	.4byte	0x16e4
 	.8byte	.LBB127
 	.8byte	.LBE127-.LBB127
 	.byte	0x1
 	.2byte	0x1a8
-	.4byte	0x1377
-	.uleb128 0x30
-	.4byte	0x170d
+	.4byte	0x1367
+	.uleb128 0x2f
+	.4byte	0x16fd
 	.4byte	.LLST67
-	.uleb128 0x30
-	.4byte	0x1701
+	.uleb128 0x2f
+	.4byte	0x16f1
 	.4byte	.LLST68
-	.uleb128 0x38
+	.uleb128 0x37
 	.8byte	.LBB128
 	.8byte	.LBE128-.LBB128
+	.uleb128 0x33
+	.4byte	0x1709
 	.uleb128 0x34
-	.4byte	0x1719
-	.uleb128 0x35
-	.4byte	0x1725
+	.4byte	0x1715
 	.4byte	.LLST69
-	.uleb128 0x35
-	.4byte	0x1731
+	.uleb128 0x34
+	.4byte	0x1721
 	.4byte	.LLST70
-	.uleb128 0x35
-	.4byte	0x173d
+	.uleb128 0x34
+	.4byte	0x172d
 	.4byte	.LLST71
-	.uleb128 0x35
-	.4byte	0x1749
+	.uleb128 0x34
+	.4byte	0x1739
 	.4byte	.LLST72
-	.uleb128 0x35
-	.4byte	0x1755
+	.uleb128 0x34
+	.4byte	0x1745
 	.4byte	.LLST73
 	.byte	0
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x38
 	.8byte	.LVL128
-	.4byte	0x18c8
-	.4byte	0x1394
-	.uleb128 0x37
+	.4byte	0x18b8
+	.4byte	0x1384
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x84
 	.sleb128 0
-	.uleb128 0x37
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x1
 	.byte	0x32
 	.byte	0
-	.uleb128 0x31
+	.uleb128 0x30
 	.8byte	.LVL132
-	.4byte	0x17fc
-	.uleb128 0x39
+	.4byte	0x17ec
+	.uleb128 0x38
 	.8byte	.LVL133
-	.4byte	0x18c8
-	.4byte	0x13be
-	.uleb128 0x37
+	.4byte	0x18b8
+	.4byte	0x13ae
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x84
 	.sleb128 0
-	.uleb128 0x37
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x1
 	.byte	0x31
 	.byte	0
-	.uleb128 0x36
+	.uleb128 0x35
 	.8byte	.LVL137
-	.4byte	0x17fc
-	.uleb128 0x37
+	.4byte	0x17ec
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x4
@@ -3376,45 +3371,45 @@ stype.6129:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x2f
-	.4byte	0x159c
+	.uleb128 0x2e
+	.4byte	0x158c
 	.8byte	.LBB130
 	.8byte	.LBE130-.LBB130
 	.byte	0x1
 	.2byte	0x213
-	.4byte	0x145f
-	.uleb128 0x30
-	.4byte	0x15b9
+	.4byte	0x144f
+	.uleb128 0x2f
+	.4byte	0x15a9
 	.4byte	.LLST74
-	.uleb128 0x30
-	.4byte	0x15ad
+	.uleb128 0x2f
+	.4byte	0x159d
 	.4byte	.LLST75
-	.uleb128 0x38
+	.uleb128 0x37
 	.8byte	.LBB131
 	.8byte	.LBE131-.LBB131
-	.uleb128 0x35
-	.4byte	0x15c5
+	.uleb128 0x34
+	.4byte	0x15b5
 	.4byte	.LLST76
-	.uleb128 0x35
-	.4byte	0x15d1
+	.uleb128 0x34
+	.4byte	0x15c1
 	.4byte	.LLST77
-	.uleb128 0x35
-	.4byte	0x15dd
+	.uleb128 0x34
+	.4byte	0x15cd
 	.4byte	.LLST78
-	.uleb128 0x39
+	.uleb128 0x38
 	.8byte	.LVL121
-	.4byte	0x18c8
-	.4byte	0x1447
-	.uleb128 0x37
+	.4byte	0x18b8
+	.4byte	0x1437
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x1
 	.byte	0x31
 	.byte	0
-	.uleb128 0x36
+	.uleb128 0x35
 	.8byte	.LVL124
-	.4byte	0x17fc
-	.uleb128 0x37
+	.4byte	0x17ec
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x4
@@ -3425,50 +3420,50 @@ stype.6129:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x2f
-	.4byte	0x14f4
+	.uleb128 0x2e
+	.4byte	0x14e4
 	.8byte	.LBB133
 	.8byte	.LBE133-.LBB133
 	.byte	0x1
 	.2byte	0x21f
-	.4byte	0x14df
-	.uleb128 0x30
-	.4byte	0x1511
+	.4byte	0x14cf
+	.uleb128 0x2f
+	.4byte	0x1501
 	.4byte	.LLST79
-	.uleb128 0x30
-	.4byte	0x1505
+	.uleb128 0x2f
+	.4byte	0x14f5
 	.4byte	.LLST80
-	.uleb128 0x38
+	.uleb128 0x37
 	.8byte	.LBB134
 	.8byte	.LBE134-.LBB134
-	.uleb128 0x35
-	.4byte	0x151d
+	.uleb128 0x34
+	.4byte	0x150d
 	.4byte	.LLST81
-	.uleb128 0x35
-	.4byte	0x1529
+	.uleb128 0x34
+	.4byte	0x1519
 	.4byte	.LLST82
-	.uleb128 0x35
-	.4byte	0x1535
+	.uleb128 0x34
+	.4byte	0x1525
 	.4byte	.LLST83
-	.uleb128 0x39
+	.uleb128 0x38
 	.8byte	.LVL151
-	.4byte	0x18c8
-	.4byte	0x14d0
-	.uleb128 0x37
+	.4byte	0x18b8
+	.4byte	0x14c0
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x1
 	.byte	0x36
 	.byte	0
-	.uleb128 0x31
+	.uleb128 0x30
 	.8byte	.LVL155
-	.4byte	0x17fc
+	.4byte	0x17ec
 	.byte	0
 	.byte	0
-	.uleb128 0x36
+	.uleb128 0x35
 	.8byte	.LVL115
-	.4byte	0x15ea
-	.uleb128 0x37
+	.4byte	0x15da
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
@@ -3476,168 +3471,168 @@ stype.6129:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF336
+	.uleb128 0x39
+	.4byte	.LASF338
 	.byte	0x1
 	.2byte	0x1af
 	.4byte	0x59
 	.byte	0x1
-	.4byte	0x1542
-	.uleb128 0x3b
-	.4byte	.LASF329
+	.4byte	0x1532
+	.uleb128 0x3a
+	.4byte	.LASF331
 	.byte	0x1
 	.2byte	0x1af
-	.4byte	0xe1d
-	.uleb128 0x3b
-	.4byte	.LASF334
+	.4byte	0xe0d
+	.uleb128 0x3a
+	.4byte	.LASF336
 	.byte	0x1
 	.2byte	0x1af
 	.4byte	0x59
-	.uleb128 0x3c
-	.4byte	.LASF335
+	.uleb128 0x3b
+	.4byte	.LASF337
 	.byte	0x1
 	.2byte	0x1b1
 	.4byte	0x4df
-	.uleb128 0x3c
-	.4byte	.LASF296
+	.uleb128 0x3b
+	.4byte	.LASF298
 	.byte	0x1
 	.2byte	0x1b2
 	.4byte	0x84
-	.uleb128 0x3c
-	.4byte	.LASF307
+	.uleb128 0x3b
+	.4byte	.LASF309
 	.byte	0x1
 	.2byte	0x1b3
 	.4byte	0x84
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF337
+	.uleb128 0x39
+	.4byte	.LASF339
 	.byte	0x1
 	.2byte	0x186
 	.4byte	0x59
 	.byte	0x1
-	.4byte	0x159c
-	.uleb128 0x3b
-	.4byte	.LASF329
+	.4byte	0x158c
+	.uleb128 0x3a
+	.4byte	.LASF331
 	.byte	0x1
 	.2byte	0x186
-	.4byte	0xe1d
-	.uleb128 0x3b
-	.4byte	.LASF334
+	.4byte	0xe0d
+	.uleb128 0x3a
+	.4byte	.LASF336
 	.byte	0x1
 	.2byte	0x186
 	.4byte	0x59
-	.uleb128 0x3c
-	.4byte	.LASF338
+	.uleb128 0x3b
+	.4byte	.LASF340
 	.byte	0x1
 	.2byte	0x188
-	.4byte	0xdf2
-	.uleb128 0x3c
-	.4byte	.LASF335
+	.4byte	0xde2
+	.uleb128 0x3b
+	.4byte	.LASF337
 	.byte	0x1
 	.2byte	0x189
 	.4byte	0x4df
-	.uleb128 0x3c
-	.4byte	.LASF296
+	.uleb128 0x3b
+	.4byte	.LASF298
 	.byte	0x1
 	.2byte	0x18a
 	.4byte	0x84
-	.uleb128 0x3c
-	.4byte	.LASF307
+	.uleb128 0x3b
+	.4byte	.LASF309
 	.byte	0x1
 	.2byte	0x18b
 	.4byte	0x84
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF339
+	.uleb128 0x39
+	.4byte	.LASF341
 	.byte	0x1
 	.2byte	0x171
 	.4byte	0x59
 	.byte	0x1
-	.4byte	0x15ea
-	.uleb128 0x3b
-	.4byte	.LASF329
+	.4byte	0x15da
+	.uleb128 0x3a
+	.4byte	.LASF331
 	.byte	0x1
 	.2byte	0x171
-	.4byte	0xe1d
-	.uleb128 0x3b
-	.4byte	.LASF334
+	.4byte	0xe0d
+	.uleb128 0x3a
+	.4byte	.LASF336
 	.byte	0x1
 	.2byte	0x171
 	.4byte	0x59
-	.uleb128 0x3c
-	.4byte	.LASF335
+	.uleb128 0x3b
+	.4byte	.LASF337
 	.byte	0x1
 	.2byte	0x173
 	.4byte	0x4df
-	.uleb128 0x3c
-	.4byte	.LASF296
+	.uleb128 0x3b
+	.4byte	.LASF298
 	.byte	0x1
 	.2byte	0x174
 	.4byte	0x84
-	.uleb128 0x3c
-	.4byte	.LASF307
+	.uleb128 0x3b
+	.4byte	.LASF309
 	.byte	0x1
 	.2byte	0x175
 	.4byte	0x84
 	.byte	0
-	.uleb128 0x3d
-	.4byte	.LASF347
+	.uleb128 0x3c
+	.4byte	.LASF349
 	.byte	0x1
 	.2byte	0x15c
 	.4byte	0x59
-	.8byte	.LFB223
-	.8byte	.LFE223-.LFB223
+	.8byte	.LFB225
+	.8byte	.LFE225-.LFB225
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x169a
-	.uleb128 0x2c
-	.4byte	.LASF329
+	.4byte	0x168a
+	.uleb128 0x2b
+	.4byte	.LASF331
 	.byte	0x1
 	.2byte	0x15c
-	.4byte	0xe1d
+	.4byte	0xe0d
 	.4byte	.LLST16
-	.uleb128 0x2c
-	.4byte	.LASF334
+	.uleb128 0x2b
+	.4byte	.LASF336
 	.byte	0x1
 	.2byte	0x15c
 	.4byte	0x59
 	.4byte	.LLST17
-	.uleb128 0x2c
-	.4byte	.LASF330
+	.uleb128 0x2b
+	.4byte	.LASF332
 	.byte	0x1
 	.2byte	0x15c
-	.4byte	0xe23
+	.4byte	0xe13
 	.4byte	.LLST18
-	.uleb128 0x3e
-	.4byte	.LASF335
+	.uleb128 0x3d
+	.4byte	.LASF337
 	.byte	0x1
 	.2byte	0x15e
 	.4byte	0x4df
 	.4byte	.LLST19
-	.uleb128 0x3e
-	.4byte	.LASF296
+	.uleb128 0x3d
+	.4byte	.LASF298
 	.byte	0x1
 	.2byte	0x15f
 	.4byte	0x84
 	.4byte	.LLST20
-	.uleb128 0x3e
-	.4byte	.LASF307
+	.uleb128 0x3d
+	.4byte	.LASF309
 	.byte	0x1
 	.2byte	0x160
 	.4byte	0x84
 	.4byte	.LLST21
-	.uleb128 0x39
+	.uleb128 0x38
 	.8byte	.LVL45
-	.4byte	0x18c8
-	.4byte	0x168c
-	.uleb128 0x37
+	.4byte	0x18b8
+	.4byte	0x167c
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x3
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x37
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x3
@@ -3645,215 +3640,215 @@ stype.6129:
 	.uleb128 0x1
 	.byte	0x52
 	.byte	0
-	.uleb128 0x31
+	.uleb128 0x30
 	.8byte	.LVL49
-	.4byte	0x17fc
+	.4byte	0x17ec
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF340
+	.uleb128 0x39
+	.4byte	.LASF342
 	.byte	0x1
 	.2byte	0x13d
 	.4byte	0x59
 	.byte	0x1
-	.4byte	0x16f4
-	.uleb128 0x3b
-	.4byte	.LASF329
+	.4byte	0x16e4
+	.uleb128 0x3a
+	.4byte	.LASF331
 	.byte	0x1
 	.2byte	0x13d
-	.4byte	0xe1d
-	.uleb128 0x3b
-	.4byte	.LASF334
+	.4byte	0xe0d
+	.uleb128 0x3a
+	.4byte	.LASF336
 	.byte	0x1
 	.2byte	0x13d
 	.4byte	0x59
-	.uleb128 0x3c
-	.4byte	.LASF338
+	.uleb128 0x3b
+	.4byte	.LASF340
 	.byte	0x1
 	.2byte	0x13f
-	.4byte	0xdf2
-	.uleb128 0x3c
-	.4byte	.LASF335
+	.4byte	0xde2
+	.uleb128 0x3b
+	.4byte	.LASF337
 	.byte	0x1
 	.2byte	0x140
 	.4byte	0x4df
-	.uleb128 0x3c
-	.4byte	.LASF296
+	.uleb128 0x3b
+	.4byte	.LASF298
 	.byte	0x1
 	.2byte	0x141
 	.4byte	0x84
-	.uleb128 0x3c
-	.4byte	.LASF307
+	.uleb128 0x3b
+	.4byte	.LASF309
 	.byte	0x1
 	.2byte	0x142
 	.4byte	0x84
 	.byte	0
-	.uleb128 0x3f
-	.4byte	.LASF373
+	.uleb128 0x3e
+	.4byte	.LASF375
 	.byte	0x1
 	.2byte	0x124
 	.byte	0x1
-	.4byte	0x1760
-	.uleb128 0x3b
-	.4byte	.LASF338
+	.4byte	0x1750
+	.uleb128 0x3a
+	.4byte	.LASF340
 	.byte	0x1
 	.2byte	0x124
-	.4byte	0xe1d
-	.uleb128 0x3b
-	.4byte	.LASF329
+	.4byte	0xe0d
+	.uleb128 0x3a
+	.4byte	.LASF331
 	.byte	0x1
 	.2byte	0x125
-	.4byte	0xe1d
-	.uleb128 0x3c
-	.4byte	.LASF341
+	.4byte	0xe0d
+	.uleb128 0x3b
+	.4byte	.LASF343
 	.byte	0x1
 	.2byte	0x127
 	.4byte	0x59
-	.uleb128 0x3c
-	.4byte	.LASF342
+	.uleb128 0x3b
+	.4byte	.LASF344
 	.byte	0x1
 	.2byte	0x128
-	.4byte	0xe17
-	.uleb128 0x3c
-	.4byte	.LASF343
+	.4byte	0xe07
+	.uleb128 0x3b
+	.4byte	.LASF345
 	.byte	0x1
 	.2byte	0x128
-	.4byte	0xe17
-	.uleb128 0x3c
-	.4byte	.LASF334
+	.4byte	0xe07
+	.uleb128 0x3b
+	.4byte	.LASF336
 	.byte	0x1
 	.2byte	0x129
 	.4byte	0x59
-	.uleb128 0x3c
-	.4byte	.LASF344
+	.uleb128 0x3b
+	.4byte	.LASF346
 	.byte	0x1
 	.2byte	0x129
 	.4byte	0x59
-	.uleb128 0x40
+	.uleb128 0x3f
 	.string	"i"
 	.byte	0x1
 	.2byte	0x12a
 	.4byte	0x59
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LASF345
+	.uleb128 0x39
+	.4byte	.LASF347
 	.byte	0x1
 	.2byte	0x104
-	.4byte	0xe17
+	.4byte	0xe07
 	.byte	0x1
-	.4byte	0x17fc
-	.uleb128 0x3b
-	.4byte	.LASF338
+	.4byte	0x17ec
+	.uleb128 0x3a
+	.4byte	.LASF340
 	.byte	0x1
 	.2byte	0x104
-	.4byte	0xe1d
-	.uleb128 0x3c
-	.4byte	.LASF342
+	.4byte	0xe0d
+	.uleb128 0x3b
+	.4byte	.LASF344
 	.byte	0x1
 	.2byte	0x106
-	.4byte	0xe17
-	.uleb128 0x3c
-	.4byte	.LASF343
+	.4byte	0xe07
+	.uleb128 0x3b
+	.4byte	.LASF345
 	.byte	0x1
 	.2byte	0x106
-	.4byte	0xe17
-	.uleb128 0x40
+	.4byte	0xe07
+	.uleb128 0x3f
 	.string	"i"
 	.byte	0x1
 	.2byte	0x107
 	.4byte	0x59
-	.uleb128 0x40
+	.uleb128 0x3f
 	.string	"j"
 	.byte	0x1
 	.2byte	0x107
 	.4byte	0x59
-	.uleb128 0x40
+	.uleb128 0x3f
 	.string	"k"
 	.byte	0x1
 	.2byte	0x107
 	.4byte	0x59
-	.uleb128 0x40
+	.uleb128 0x3f
 	.string	"h"
 	.byte	0x1
 	.2byte	0x107
 	.4byte	0x59
-	.uleb128 0x3c
-	.4byte	.LASF346
+	.uleb128 0x3b
+	.4byte	.LASF348
 	.byte	0x1
 	.2byte	0x108
 	.4byte	0x59
-	.uleb128 0x40
+	.uleb128 0x3f
 	.string	"num"
 	.byte	0x1
 	.2byte	0x109
 	.4byte	0x59
-	.uleb128 0x40
+	.uleb128 0x3f
 	.string	"len"
 	.byte	0x1
 	.2byte	0x10a
 	.4byte	0x59
-	.uleb128 0x41
-	.uleb128 0x3c
-	.4byte	.LASF334
+	.uleb128 0x40
+	.uleb128 0x3b
+	.4byte	.LASF336
 	.byte	0x1
 	.2byte	0x116
 	.4byte	0x59
-	.uleb128 0x3c
-	.4byte	.LASF344
+	.uleb128 0x3b
+	.4byte	.LASF346
 	.byte	0x1
 	.2byte	0x117
 	.4byte	0x59
 	.byte	0
 	.byte	0
-	.uleb128 0x42
-	.4byte	.LASF348
+	.uleb128 0x41
+	.4byte	.LASF350
 	.byte	0x1
 	.byte	0xf6
-	.4byte	0xe17
-	.8byte	.LFB219
-	.8byte	.LFE219-.LFB219
+	.4byte	0xe07
+	.8byte	.LFB221
+	.8byte	.LFE221-.LFB221
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x18ac
-	.uleb128 0x43
-	.4byte	.LASF335
+	.4byte	0x189c
+	.uleb128 0x42
+	.4byte	.LASF337
 	.byte	0x1
 	.byte	0xf6
 	.4byte	0x4df
 	.4byte	.LLST12
-	.uleb128 0x43
-	.4byte	.LASF307
+	.uleb128 0x42
+	.4byte	.LASF309
 	.byte	0x1
 	.byte	0xf7
 	.4byte	0x84
 	.4byte	.LLST13
-	.uleb128 0x44
+	.uleb128 0x43
 	.string	"out"
 	.byte	0x1
 	.byte	0xf9
 	.4byte	0x4e5
-	.uleb128 0x45
-	.4byte	0x1d23
+	.uleb128 0x44
+	.4byte	0x1d13
 	.8byte	.LBB39
 	.4byte	.Ldebug_ranges0+0x90
 	.byte	0x1
 	.byte	0xfb
-	.4byte	0x188b
-	.uleb128 0x30
-	.4byte	0x1d3e
+	.4byte	0x187b
+	.uleb128 0x2f
+	.4byte	0x1d2e
 	.4byte	.LLST14
-	.uleb128 0x30
-	.4byte	0x1d33
+	.uleb128 0x2f
+	.4byte	0x1d23
 	.4byte	.LLST15
-	.uleb128 0x36
+	.uleb128 0x35
 	.8byte	.LVL37
-	.4byte	0x1d56
-	.uleb128 0x37
+	.4byte	0x1d46
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x84
 	.sleb128 0
-	.uleb128 0x37
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x3
@@ -3861,22 +3856,22 @@ stype.6129:
 	.2byte	0x8000
 	.byte	0
 	.byte	0
-	.uleb128 0x36
+	.uleb128 0x35
 	.8byte	.LVL39
-	.4byte	0x1d61
-	.uleb128 0x37
+	.4byte	0x1d51
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x83
 	.sleb128 0
-	.uleb128 0x37
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x85
 	.sleb128 4
-	.uleb128 0x37
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
@@ -3884,242 +3879,242 @@ stype.6129:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF349
+	.uleb128 0x45
+	.4byte	.LASF351
 	.byte	0x1
 	.byte	0xf1
 	.4byte	0x34
 	.byte	0x3
-	.4byte	0x18c8
-	.uleb128 0x47
-	.4byte	.LASF335
+	.4byte	0x18b8
+	.uleb128 0x46
+	.4byte	.LASF337
 	.byte	0x1
 	.byte	0xf1
 	.4byte	0x4df
 	.byte	0
-	.uleb128 0x42
-	.4byte	.LASF350
+	.uleb128 0x41
+	.4byte	.LASF352
 	.byte	0x1
 	.byte	0xc0
 	.4byte	0x4df
-	.8byte	.LFB217
-	.8byte	.LFE217-.LFB217
+	.8byte	.LFB219
+	.8byte	.LFE219-.LFB219
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x19c5
-	.uleb128 0x43
-	.4byte	.LASF334
+	.4byte	0x19b5
+	.uleb128 0x42
+	.4byte	.LASF336
 	.byte	0x1
 	.byte	0xc0
 	.4byte	0x59
 	.4byte	.LLST0
-	.uleb128 0x43
-	.4byte	.LASF351
+	.uleb128 0x42
+	.4byte	.LASF353
 	.byte	0x1
 	.byte	0xc0
 	.4byte	0x59
 	.4byte	.LLST1
-	.uleb128 0x2a
-	.4byte	.LASF352
+	.uleb128 0x29
+	.4byte	.LASF354
 	.byte	0x1
 	.byte	0xc2
-	.4byte	0xfa9
+	.4byte	0xf99
 	.uleb128 0x1
 	.byte	0x52
-	.uleb128 0x48
-	.4byte	.LASF353
+	.uleb128 0x47
+	.4byte	.LASF355
 	.byte	0x1
 	.byte	0xc3
-	.4byte	0xe17
+	.4byte	0xe07
 	.4byte	.LLST2
-	.uleb128 0x48
-	.4byte	.LASF354
+	.uleb128 0x47
+	.4byte	.LASF356
 	.byte	0x1
 	.byte	0xc4
 	.4byte	0xff
 	.4byte	.LLST3
-	.uleb128 0x48
-	.4byte	.LASF355
+	.uleb128 0x47
+	.4byte	.LASF357
 	.byte	0x1
 	.byte	0xc5
 	.4byte	0x84
 	.4byte	.LLST4
-	.uleb128 0x49
+	.uleb128 0x48
 	.string	"pt"
 	.byte	0x1
 	.byte	0xc6
 	.4byte	0x84
 	.4byte	.LLST5
-	.uleb128 0x4a
-	.4byte	.LASF335
+	.uleb128 0x49
+	.4byte	.LASF337
 	.byte	0x1
 	.byte	0xc7
 	.4byte	0x147
-	.uleb128 0x4b
-	.4byte	0x19c5
+	.uleb128 0x4a
+	.4byte	0x19b5
 	.8byte	.LBB31
 	.4byte	.Ldebug_ranges0+0
 	.byte	0x1
 	.byte	0xea
-	.uleb128 0x30
-	.4byte	0x19e0
+	.uleb128 0x2f
+	.4byte	0x19d0
 	.4byte	.LLST6
-	.uleb128 0x30
-	.4byte	0x19d5
+	.uleb128 0x2f
+	.4byte	0x19c5
 	.4byte	.LLST7
-	.uleb128 0x33
+	.uleb128 0x32
 	.4byte	.Ldebug_ranges0+0
-	.uleb128 0x35
-	.4byte	0x19eb
+	.uleb128 0x34
+	.4byte	0x19db
 	.4byte	.LLST8
-	.uleb128 0x35
-	.4byte	0x19f6
+	.uleb128 0x34
+	.4byte	0x19e6
 	.4byte	.LLST9
-	.uleb128 0x4c
+	.uleb128 0x4b
 	.4byte	.Ldebug_ranges0+0x30
-	.4byte	0x19aa
-	.uleb128 0x34
-	.4byte	0x1a04
-	.uleb128 0x34
-	.4byte	0x1a0f
-	.byte	0
+	.4byte	0x199a
+	.uleb128 0x33
+	.4byte	0x19f4
 	.uleb128 0x33
+	.4byte	0x19ff
+	.byte	0
+	.uleb128 0x32
 	.4byte	.Ldebug_ranges0+0x60
-	.uleb128 0x35
-	.4byte	0x1a1c
+	.uleb128 0x34
+	.4byte	0x1a0c
 	.4byte	.LLST10
-	.uleb128 0x35
-	.4byte	0x1a27
+	.uleb128 0x34
+	.4byte	0x1a17
 	.4byte	.LLST11
 	.byte	0
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF356
+	.uleb128 0x45
+	.4byte	.LASF358
 	.byte	0x1
 	.byte	0xab
 	.4byte	0x59
 	.byte	0x1
-	.4byte	0x1a34
-	.uleb128 0x47
-	.4byte	.LASF353
+	.4byte	0x1a24
+	.uleb128 0x46
+	.4byte	.LASF355
 	.byte	0x1
 	.byte	0xab
 	.4byte	0xff
-	.uleb128 0x47
-	.4byte	.LASF334
+	.uleb128 0x46
+	.4byte	.LASF336
 	.byte	0x1
 	.byte	0xab
 	.4byte	0x59
-	.uleb128 0x4a
-	.4byte	.LASF357
+	.uleb128 0x49
+	.4byte	.LASF359
 	.byte	0x1
 	.byte	0xad
 	.4byte	0x59
-	.uleb128 0x44
+	.uleb128 0x43
 	.string	"i"
 	.byte	0x1
 	.byte	0xae
 	.4byte	0x59
-	.uleb128 0x4d
-	.4byte	0x1a1b
-	.uleb128 0x4a
-	.4byte	.LASF358
+	.uleb128 0x4c
+	.4byte	0x1a0b
+	.uleb128 0x49
+	.4byte	.LASF360
 	.byte	0x1
 	.byte	0xb0
 	.4byte	0x59
-	.uleb128 0x4a
-	.4byte	.LASF359
+	.uleb128 0x49
+	.4byte	.LASF361
 	.byte	0x1
 	.byte	0xb0
 	.4byte	0x59
 	.byte	0
-	.uleb128 0x41
-	.uleb128 0x4a
-	.4byte	.LASF360
+	.uleb128 0x40
+	.uleb128 0x49
+	.4byte	.LASF362
 	.byte	0x1
 	.byte	0xb1
 	.4byte	0x59
-	.uleb128 0x4a
-	.4byte	.LASF361
+	.uleb128 0x49
+	.4byte	.LASF363
 	.byte	0x1
 	.byte	0xb1
 	.4byte	0x59
 	.byte	0
 	.byte	0
-	.uleb128 0x4e
-	.4byte	.LASF392
+	.uleb128 0x4d
+	.4byte	.LASF394
 	.byte	0x1
 	.byte	0xa2
 	.4byte	0xdb
-	.8byte	.LFB215
-	.8byte	.LFE215-.LFB215
+	.8byte	.LFB217
+	.8byte	.LFE217-.LFB217
 	.uleb128 0x1
 	.byte	0x9c
-	.uleb128 0x4f
-	.4byte	.LASF363
+	.uleb128 0x4e
+	.4byte	.LASF365
 	.byte	0x1
 	.byte	0x80
 	.4byte	0x59
-	.8byte	.LFB214
-	.8byte	.LFE214-.LFB214
+	.8byte	.LFB216
+	.8byte	.LFE216-.LFB216
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1c37
-	.uleb128 0x43
-	.4byte	.LASF364
+	.4byte	0x1c27
+	.uleb128 0x42
+	.4byte	.LASF366
 	.byte	0x1
 	.byte	0x80
 	.4byte	0x147
 	.4byte	.LLST22
-	.uleb128 0x44
+	.uleb128 0x43
 	.string	"ret"
 	.byte	0x1
 	.byte	0x82
 	.4byte	0x59
-	.uleb128 0x49
+	.uleb128 0x48
 	.string	"wf"
 	.byte	0x1
 	.byte	0x83
-	.4byte	0xfa9
+	.4byte	0xf99
 	.4byte	.LLST23
-	.uleb128 0x50
-	.4byte	0x1c69
+	.uleb128 0x4f
+	.4byte	0x1c59
 	.8byte	.LBB51
 	.8byte	.LBE51-.LBB51
 	.byte	0x1
 	.byte	0x88
-	.4byte	0x1b04
-	.uleb128 0x30
-	.4byte	0x1c79
+	.4byte	0x1af4
+	.uleb128 0x2f
+	.4byte	0x1c69
 	.4byte	.LLST24
-	.uleb128 0x39
+	.uleb128 0x38
 	.8byte	.LVL54
-	.4byte	0x1d6d
-	.4byte	0x1ae8
-	.uleb128 0x37
+	.4byte	0x1d5d
+	.4byte	0x1ad8
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x83
 	.sleb128 4
-	.uleb128 0x37
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	.LC0
-	.uleb128 0x37
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x1
 	.byte	0x3c
 	.byte	0
-	.uleb128 0x36
+	.uleb128 0x35
 	.8byte	.LVL55
-	.4byte	0x1d78
-	.uleb128 0x37
+	.4byte	0x1d68
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
@@ -4127,86 +4122,86 @@ stype.6129:
 	.8byte	.LC1
 	.byte	0
 	.byte	0
-	.uleb128 0x45
-	.4byte	0x1c37
+	.uleb128 0x44
+	.4byte	0x1c27
 	.8byte	.LBB53
 	.4byte	.Ldebug_ranges0+0xc0
 	.byte	0x1
 	.byte	0x8e
-	.4byte	0x1c08
-	.uleb128 0x30
-	.4byte	0x1c47
+	.4byte	0x1bf8
+	.uleb128 0x2f
+	.4byte	0x1c37
 	.4byte	.LLST25
-	.uleb128 0x33
+	.uleb128 0x32
 	.4byte	.Ldebug_ranges0+0xc0
+	.uleb128 0x33
+	.4byte	0x1c42
 	.uleb128 0x34
-	.4byte	0x1c52
-	.uleb128 0x35
-	.4byte	0x1c5d
+	.4byte	0x1c4d
 	.4byte	.LLST26
-	.uleb128 0x45
-	.4byte	0x1c85
+	.uleb128 0x44
+	.4byte	0x1c75
 	.8byte	.LBB55
 	.4byte	.Ldebug_ranges0+0xf0
 	.byte	0x1
 	.byte	0x6f
-	.4byte	0x1be5
-	.uleb128 0x30
-	.4byte	0x1ca0
+	.4byte	0x1bd5
+	.uleb128 0x2f
+	.4byte	0x1c90
 	.4byte	.LLST27
-	.uleb128 0x30
-	.4byte	0x1c95
+	.uleb128 0x2f
+	.4byte	0x1c85
 	.4byte	.LLST28
-	.uleb128 0x33
+	.uleb128 0x32
 	.4byte	.Ldebug_ranges0+0xf0
-	.uleb128 0x35
-	.4byte	0x1cab
+	.uleb128 0x34
+	.4byte	0x1c9b
 	.4byte	.LLST29
-	.uleb128 0x35
-	.4byte	0x1cb4
+	.uleb128 0x34
+	.4byte	0x1ca4
 	.4byte	.LLST30
-	.uleb128 0x45
-	.4byte	0x1cc0
+	.uleb128 0x44
+	.4byte	0x1cb0
 	.8byte	.LBB57
 	.4byte	.Ldebug_ranges0+0x130
 	.byte	0x1
 	.byte	0x55
-	.4byte	0x1bc3
-	.uleb128 0x51
-	.4byte	0x1ccc
-	.uleb128 0x51
-	.4byte	0x1cd7
-	.uleb128 0x33
+	.4byte	0x1bb3
+	.uleb128 0x50
+	.4byte	0x1cbc
+	.uleb128 0x50
+	.4byte	0x1cc7
+	.uleb128 0x32
 	.4byte	.Ldebug_ranges0+0x130
-	.uleb128 0x35
-	.4byte	0x1ce2
+	.uleb128 0x34
+	.4byte	0x1cd2
 	.4byte	.LLST31
-	.uleb128 0x35
-	.4byte	0x1ceb
+	.uleb128 0x34
+	.4byte	0x1cdb
 	.4byte	.LLST32
-	.uleb128 0x35
-	.4byte	0x1cf4
+	.uleb128 0x34
+	.4byte	0x1ce4
 	.4byte	.LLST33
-	.uleb128 0x35
-	.4byte	0x1cff
+	.uleb128 0x34
+	.4byte	0x1cef
 	.4byte	.LLST34
 	.byte	0
 	.byte	0
-	.uleb128 0x36
+	.uleb128 0x35
 	.8byte	.LVL64
-	.4byte	0x1d83
-	.uleb128 0x37
+	.4byte	0x1d73
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x87
 	.sleb128 0
-	.uleb128 0x37
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x1
 	.byte	0x30
-	.uleb128 0x37
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
@@ -4215,16 +4210,16 @@ stype.6129:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x36
+	.uleb128 0x35
 	.8byte	.LVL74
-	.4byte	0x1d78
-	.uleb128 0x37
+	.4byte	0x1d68
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	.LC3
-	.uleb128 0x37
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
@@ -4233,19 +4228,19 @@ stype.6129:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x31
+	.uleb128 0x30
 	.8byte	.LVL56
-	.4byte	0x1d78
-	.uleb128 0x36
+	.4byte	0x1d68
+	.uleb128 0x35
 	.8byte	.LVL76
-	.4byte	0x1d78
-	.uleb128 0x37
+	.4byte	0x1d68
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	.LC5
-	.uleb128 0x37
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
@@ -4253,165 +4248,165 @@ stype.6129:
 	.sleb128 20
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF365
+	.uleb128 0x45
+	.4byte	.LASF367
 	.byte	0x1
 	.byte	0x66
 	.4byte	0x59
 	.byte	0x1
-	.4byte	0x1c69
-	.uleb128 0x47
-	.4byte	.LASF352
+	.4byte	0x1c59
+	.uleb128 0x46
+	.4byte	.LASF354
 	.byte	0x1
 	.byte	0x66
-	.4byte	0xfa9
-	.uleb128 0x4a
-	.4byte	.LASF366
+	.4byte	0xf99
+	.uleb128 0x49
+	.4byte	.LASF368
 	.byte	0x1
 	.byte	0x68
 	.4byte	0xa8
-	.uleb128 0x4a
-	.4byte	.LASF367
+	.uleb128 0x49
+	.4byte	.LASF369
 	.byte	0x1
 	.byte	0x69
 	.4byte	0xa8
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF368
+	.uleb128 0x45
+	.4byte	.LASF370
 	.byte	0x1
 	.byte	0x5c
 	.4byte	0x59
 	.byte	0x1
-	.4byte	0x1c85
-	.uleb128 0x52
+	.4byte	0x1c75
+	.uleb128 0x51
 	.string	"buf"
 	.byte	0x1
 	.byte	0x5c
 	.4byte	0xff
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF369
+	.uleb128 0x45
+	.4byte	.LASF371
 	.byte	0x1
 	.byte	0x4f
 	.4byte	0x84
 	.byte	0x1
-	.4byte	0x1cc0
-	.uleb128 0x47
-	.4byte	.LASF370
+	.4byte	0x1cb0
+	.uleb128 0x46
+	.4byte	.LASF372
 	.byte	0x1
 	.byte	0x4f
 	.4byte	0x4e5
-	.uleb128 0x47
-	.4byte	.LASF371
+	.uleb128 0x46
+	.4byte	.LASF373
 	.byte	0x1
 	.byte	0x4f
 	.4byte	0x84
-	.uleb128 0x44
+	.uleb128 0x43
 	.string	"i"
 	.byte	0x1
 	.byte	0x51
 	.4byte	0x84
-	.uleb128 0x4a
-	.4byte	.LASF372
+	.uleb128 0x49
+	.4byte	.LASF374
 	.byte	0x1
 	.byte	0x52
 	.4byte	0x84
 	.byte	0
-	.uleb128 0x53
-	.4byte	.LASF374
+	.uleb128 0x52
+	.4byte	.LASF376
 	.byte	0x1
 	.byte	0x3b
 	.byte	0x1
-	.4byte	0x1d0b
-	.uleb128 0x47
-	.4byte	.LASF375
+	.4byte	0x1cfb
+	.uleb128 0x46
+	.4byte	.LASF377
 	.byte	0x1
 	.byte	0x3b
 	.4byte	0x84
-	.uleb128 0x47
-	.4byte	.LASF376
+	.uleb128 0x46
+	.4byte	.LASF378
 	.byte	0x1
 	.byte	0x3b
-	.4byte	0xe17
-	.uleb128 0x44
+	.4byte	0xe07
+	.uleb128 0x43
 	.string	"i"
 	.byte	0x1
 	.byte	0x3d
 	.4byte	0x84
-	.uleb128 0x44
+	.uleb128 0x43
 	.string	"j"
 	.byte	0x1
 	.byte	0x3d
 	.4byte	0x84
-	.uleb128 0x4a
-	.4byte	.LASF377
+	.uleb128 0x49
+	.4byte	.LASF379
 	.byte	0x1
 	.byte	0x3e
 	.4byte	0x84
-	.uleb128 0x4a
-	.4byte	.LASF372
+	.uleb128 0x49
+	.4byte	.LASF374
 	.byte	0x1
 	.byte	0x3f
 	.4byte	0x84
 	.byte	0
-	.uleb128 0x53
-	.4byte	.LASF378
+	.uleb128 0x52
+	.4byte	.LASF380
 	.byte	0x2
 	.byte	0x4f
 	.byte	0x3
-	.4byte	0x1d23
-	.uleb128 0x47
-	.4byte	.LASF379
+	.4byte	0x1d13
+	.uleb128 0x46
+	.4byte	.LASF381
 	.byte	0x2
 	.byte	0x4f
 	.4byte	0x18a
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF380
+	.uleb128 0x45
+	.4byte	.LASF382
 	.byte	0x2
 	.byte	0x38
 	.4byte	0x147
 	.byte	0x3
-	.4byte	0x1d4a
-	.uleb128 0x47
+	.4byte	0x1d3a
+	.uleb128 0x46
 	.4byte	.LASF33
 	.byte	0x2
 	.byte	0x38
 	.4byte	0x105
-	.uleb128 0x47
-	.4byte	.LASF381
+	.uleb128 0x46
+	.4byte	.LASF383
 	.byte	0x2
 	.byte	0x38
 	.4byte	0x13c
 	.byte	0
-	.uleb128 0x54
-	.4byte	.LASF382
-	.4byte	.LASF382
+	.uleb128 0x53
+	.4byte	.LASF384
+	.4byte	.LASF384
 	.byte	0x16
 	.2byte	0x399
-	.uleb128 0x55
-	.4byte	.LASF383
-	.4byte	.LASF383
+	.uleb128 0x54
+	.4byte	.LASF385
+	.4byte	.LASF385
 	.byte	0x2
 	.byte	0x36
-	.uleb128 0x54
-	.4byte	.LASF384
-	.4byte	.LASF384
+	.uleb128 0x53
+	.4byte	.LASF386
+	.4byte	.LASF386
 	.byte	0x16
 	.2byte	0x16d
-	.uleb128 0x55
-	.4byte	.LASF385
-	.4byte	.LASF385
+	.uleb128 0x54
+	.4byte	.LASF387
+	.4byte	.LASF387
 	.byte	0x8
 	.byte	0x2a
-	.uleb128 0x55
-	.4byte	.LASF386
-	.4byte	.LASF386
+	.uleb128 0x54
+	.4byte	.LASF388
+	.4byte	.LASF388
 	.byte	0x18
 	.byte	0x13
-	.uleb128 0x54
-	.4byte	.LASF387
-	.4byte	.LASF387
+	.uleb128 0x53
+	.4byte	.LASF389
+	.4byte	.LASF389
 	.byte	0x16
 	.2byte	0x16c
 	.byte	0
@@ -4907,15 +4902,6 @@ stype.6129:
 	.byte	0
 	.byte	0
 	.uleb128 0x28
-	.uleb128 0x15
-	.byte	0x1
-	.uleb128 0x27
-	.uleb128 0x19
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x29
 	.uleb128 0x4
 	.byte	0x1
 	.uleb128 0x3
@@ -4932,7 +4918,7 @@ stype.6129:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x2a
+	.uleb128 0x29
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -4947,7 +4933,7 @@ stype.6129:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x2b
+	.uleb128 0x2a
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -4974,7 +4960,7 @@ stype.6129:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x2c
+	.uleb128 0x2b
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -4989,7 +4975,7 @@ stype.6129:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x2d
+	.uleb128 0x2c
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -5004,7 +4990,7 @@ stype.6129:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x2e
+	.uleb128 0x2d
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -5019,7 +5005,7 @@ stype.6129:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x2f
+	.uleb128 0x2e
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -5036,7 +5022,7 @@ stype.6129:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x30
+	.uleb128 0x2f
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
@@ -5045,7 +5031,7 @@ stype.6129:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x31
+	.uleb128 0x30
 	.uleb128 0x4109
 	.byte	0
 	.uleb128 0x11
@@ -5054,7 +5040,7 @@ stype.6129:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x32
+	.uleb128 0x31
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -5071,21 +5057,21 @@ stype.6129:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x33
+	.uleb128 0x32
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x55
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x34
+	.uleb128 0x33
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x35
+	.uleb128 0x34
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -5094,7 +5080,7 @@ stype.6129:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x36
+	.uleb128 0x35
 	.uleb128 0x4109
 	.byte	0x1
 	.uleb128 0x11
@@ -5103,7 +5089,7 @@ stype.6129:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x37
+	.uleb128 0x36
 	.uleb128 0x410a
 	.byte	0
 	.uleb128 0x2
@@ -5112,7 +5098,7 @@ stype.6129:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x38
+	.uleb128 0x37
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x11
@@ -5121,7 +5107,7 @@ stype.6129:
 	.uleb128 0x7
 	.byte	0
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x38
 	.uleb128 0x4109
 	.byte	0x1
 	.uleb128 0x11
@@ -5132,7 +5118,7 @@ stype.6129:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3a
+	.uleb128 0x39
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -5151,7 +5137,7 @@ stype.6129:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3b
+	.uleb128 0x3a
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -5164,7 +5150,7 @@ stype.6129:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x3b
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -5177,7 +5163,7 @@ stype.6129:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3d
+	.uleb128 0x3c
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -5202,7 +5188,7 @@ stype.6129:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3e
+	.uleb128 0x3d
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -5217,7 +5203,7 @@ stype.6129:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x3f
+	.uleb128 0x3e
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -5234,7 +5220,7 @@ stype.6129:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x40
+	.uleb128 0x3f
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -5247,12 +5233,12 @@ stype.6129:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x41
+	.uleb128 0x40
 	.uleb128 0xb
 	.byte	0x1
 	.byte	0
 	.byte	0
-	.uleb128 0x42
+	.uleb128 0x41
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -5277,7 +5263,7 @@ stype.6129:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x43
+	.uleb128 0x42
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -5292,7 +5278,7 @@ stype.6129:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x44
+	.uleb128 0x43
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -5305,7 +5291,7 @@ stype.6129:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x45
+	.uleb128 0x44
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -5322,7 +5308,7 @@ stype.6129:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x46
+	.uleb128 0x45
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -5341,7 +5327,7 @@ stype.6129:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x47
+	.uleb128 0x46
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -5354,7 +5340,7 @@ stype.6129:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x48
+	.uleb128 0x47
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -5369,7 +5355,7 @@ stype.6129:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x49
+	.uleb128 0x48
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -5384,7 +5370,7 @@ stype.6129:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x4a
+	.uleb128 0x49
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -5397,7 +5383,7 @@ stype.6129:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4b
+	.uleb128 0x4a
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -5412,7 +5398,7 @@ stype.6129:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x4c
+	.uleb128 0x4b
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x55
@@ -5421,14 +5407,14 @@ stype.6129:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4d
+	.uleb128 0x4c
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x1
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4e
+	.uleb128 0x4d
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -5453,7 +5439,7 @@ stype.6129:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x4f
+	.uleb128 0x4e
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -5480,7 +5466,7 @@ stype.6129:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x50
+	.uleb128 0x4f
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -5497,14 +5483,14 @@ stype.6129:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x51
+	.uleb128 0x50
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x52
+	.uleb128 0x51
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -5517,7 +5503,7 @@ stype.6129:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x53
+	.uleb128 0x52
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -5534,7 +5520,7 @@ stype.6129:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x54
+	.uleb128 0x53
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -5551,7 +5537,7 @@ stype.6129:
 	.uleb128 0x5
 	.byte	0
 	.byte	0
-	.uleb128 0x55
+	.uleb128 0x54
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -5618,7 +5604,7 @@ stype.6129:
 	.2byte	0x1
 	.byte	0x50
 	.8byte	.LVL159
-	.8byte	.LFE227
+	.8byte	.LFE229
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -5694,7 +5680,7 @@ stype.6129:
 	.sleb128 1
 	.byte	0x9f
 	.8byte	.LVL156
-	.8byte	.LFE227
+	.8byte	.LFE229
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
@@ -5712,7 +5698,7 @@ stype.6129:
 	.byte	0x52
 	.byte	0x9f
 	.8byte	.LVL156
-	.8byte	.LFE227
+	.8byte	.LFE229
 	.2byte	0x1
 	.byte	0x52
 	.8byte	0
@@ -5736,7 +5722,7 @@ stype.6129:
 	.8byte	.LVL83-1
 	.2byte	0x9
 	.byte	0x3
-	.8byte	sftemp.6130
+	.8byte	sftemp.6190
 	.8byte	0
 	.8byte	0
 .LLST41:
@@ -5804,13 +5790,13 @@ stype.6129:
 	.8byte	.LVL93
 	.2byte	0x6
 	.byte	0xf2
-	.4byte	.Ldebug_info0+4292
+	.4byte	.Ldebug_info0+4276
 	.sleb128 0
 	.8byte	.LVL96
 	.8byte	.LVL111
 	.2byte	0x6
 	.byte	0xf2
-	.4byte	.Ldebug_info0+4292
+	.4byte	.Ldebug_info0+4276
 	.sleb128 0
 	.8byte	0
 	.8byte	0
@@ -6202,7 +6188,7 @@ stype.6129:
 	.8byte	.LVL150
 	.2byte	0x6
 	.byte	0xf2
-	.4byte	.Ldebug_info0+4747
+	.4byte	.Ldebug_info0+4731
 	.sleb128 0
 	.8byte	0
 	.8byte	0
@@ -6345,7 +6331,7 @@ stype.6129:
 	.8byte	.LVL121-1
 	.2byte	0x9
 	.byte	0x3
-	.8byte	sftemp.6130
+	.8byte	sftemp.6190
 	.8byte	0
 	.8byte	0
 .LLST75:
@@ -6397,7 +6383,7 @@ stype.6129:
 	.8byte	.LVL151-1
 	.2byte	0x9
 	.byte	0x3
-	.8byte	sftemp.6130
+	.8byte	sftemp.6190
 	.8byte	0
 	.8byte	0
 .LLST80:
@@ -6451,7 +6437,7 @@ stype.6129:
 	.2byte	0x1
 	.byte	0x63
 	.8byte	.LVL50
-	.8byte	.LFE223
+	.8byte	.LFE225
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -6469,7 +6455,7 @@ stype.6129:
 	.2byte	0x1
 	.byte	0x50
 	.8byte	.LVL45-1
-	.8byte	.LFE223
+	.8byte	.LFE225
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -6483,7 +6469,7 @@ stype.6129:
 	.2byte	0x1
 	.byte	0x52
 	.8byte	.LVL45-1
-	.8byte	.LFE223
+	.8byte	.LFE225
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -6535,7 +6521,7 @@ stype.6129:
 	.2byte	0x1
 	.byte	0x65
 	.8byte	.LVL40
-	.8byte	.LFE219
+	.8byte	.LFE221
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -6553,7 +6539,7 @@ stype.6129:
 	.2byte	0x1
 	.byte	0x64
 	.8byte	.LVL41
-	.8byte	.LFE219
+	.8byte	.LFE221
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -6604,7 +6590,7 @@ stype.6129:
 	.2byte	0x1
 	.byte	0x50
 	.8byte	.LVL32
-	.8byte	.LFE217
+	.8byte	.LFE219
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -6625,7 +6611,7 @@ stype.6129:
 	.byte	0x51
 	.byte	0x9f
 	.8byte	.LVL31
-	.8byte	.LFE217
+	.8byte	.LFE219
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
@@ -6897,7 +6883,7 @@ stype.6129:
 	.byte	0x50
 	.byte	0x9f
 	.8byte	.LVL62
-	.8byte	.LFE214
+	.8byte	.LFE216
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
@@ -6923,7 +6909,7 @@ stype.6129:
 	.byte	0x50
 	.byte	0x9f
 	.8byte	.LVL62
-	.8byte	.LFE214
+	.8byte	.LFE216
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
@@ -7153,18 +7139,18 @@ stype.6129:
 	.byte	0
 	.2byte	0
 	.2byte	0
-	.8byte	.LFB217
-	.8byte	.LFE217-.LFB217
 	.8byte	.LFB219
 	.8byte	.LFE219-.LFB219
-	.8byte	.LFB223
-	.8byte	.LFE223-.LFB223
-	.8byte	.LFB214
-	.8byte	.LFE214-.LFB214
-	.8byte	.LFB215
-	.8byte	.LFE215-.LFB215
-	.8byte	.LFB227
-	.8byte	.LFE227-.LFB227
+	.8byte	.LFB221
+	.8byte	.LFE221-.LFB221
+	.8byte	.LFB225
+	.8byte	.LFE225-.LFB225
+	.8byte	.LFB216
+	.8byte	.LFE216-.LFB216
+	.8byte	.LFB217
+	.8byte	.LFE217-.LFB217
+	.8byte	.LFB229
+	.8byte	.LFE229-.LFB229
 	.8byte	0
 	.8byte	0
 	.section	.debug_ranges,"",@progbits
@@ -7235,32 +7221,32 @@ stype.6129:
 	.8byte	.LBE132
 	.8byte	0
 	.8byte	0
-	.8byte	.LFB217
-	.8byte	.LFE217
 	.8byte	.LFB219
 	.8byte	.LFE219
-	.8byte	.LFB223
-	.8byte	.LFE223
-	.8byte	.LFB214
-	.8byte	.LFE214
-	.8byte	.LFB215
-	.8byte	.LFE215
-	.8byte	.LFB227
-	.8byte	.LFE227
+	.8byte	.LFB221
+	.8byte	.LFE221
+	.8byte	.LFB225
+	.8byte	.LFE225
+	.8byte	.LFB216
+	.8byte	.LFE216
+	.8byte	.LFB217
+	.8byte	.LFE217
+	.8byte	.LFB229
+	.8byte	.LFE229
 	.8byte	0
 	.8byte	0
 	.section	.debug_line,"",@progbits
 .Ldebug_line0:
 	.section	.debug_str,"MS",@progbits,1
-.LASF366:
+.LASF368:
 	.string	"crccheck"
-.LASF357:
+.LASF359:
 	.string	"level"
 .LASF82:
 	.string	"off_mem_rsvmap"
 .LASF165:
 	.string	"UCLASS_I2C_EEPROM"
-.LASF317:
+.LASF319:
 	.string	"gld16_temp_list"
 .LASF17:
 	.string	"size_t"
@@ -7272,55 +7258,53 @@ stype.6129:
 	.string	"UCLASS_I2C"
 .LASF13:
 	.string	"sizetype"
-.LASF250:
+.LASF252:
 	.string	"net_hostname"
-.LASF245:
-	.string	"push_packet"
 .LASF36:
 	.string	"start"
-.LASF204:
+.LASF205:
 	.string	"UCLASS_SPI"
 .LASF168:
 	.string	"UCLASS_I2S"
-.LASF272:
+.LASF274:
 	.string	"NETLOOP_RESTART"
 .LASF166:
 	.string	"UCLASS_I2C_GENERIC"
 .LASF178:
 	.string	"UCLASS_MOD_EXP"
-.LASF227:
+.LASF228:
 	.string	"UCLASS_IO_DOMAIN"
-.LASF289:
+.LASF291:
 	.string	"WF_TYPE_GL16"
 .LASF199:
 	.string	"UCLASS_RKNAND"
 .LASF141:
 	.string	"UCLASS_DEMO"
-.LASF322:
+.LASF324:
 	.string	"gl16_list"
 .LASF90:
 	.string	"ih_magic"
-.LASF319:
+.LASF321:
 	.string	"a2_temp_list"
 .LASF145:
 	.string	"UCLASS_TEST_PROBE"
-.LASF223:
+.LASF224:
 	.string	"UCLASS_KEY"
 .LASF62:
 	.string	"bi_intfreq"
 .LASF11:
 	.string	"phys_addr_t"
-.LASF218:
+.LASF219:
 	.string	"UCLASS_VIDEO_BRIDGE"
 .LASF5:
 	.string	"__u8"
-.LASF214:
+.LASF215:
 	.string	"UCLASS_USB_DEV_GENERIC"
-.LASF355:
+.LASF357:
 	.string	"wf_offset"
-.LASF271:
+.LASF273:
 	.string	"NETLOOP_CONTINUE"
-.LASF207:
+.LASF208:
 	.string	"UCLASS_SPI_GENERIC"
 .LASF38:
 	.string	"flash_info_t"
@@ -7334,7 +7318,7 @@ stype.6129:
 	.string	"state"
 .LASF158:
 	.string	"UCLASS_CROS_EC"
-.LASF390:
+.LASF392:
 	.string	"/home/lyx/rk3566-11-eink/u-boot"
 .LASF56:
 	.string	"bi_dsp_freq"
@@ -7344,44 +7328,44 @@ stype.6129:
 	.string	"UCLASS_TEST_FDT"
 .LASF47:
 	.string	"bd_info"
-.LASF339:
+.LASF341:
 	.string	"parse_wf_gray2"
-.LASF269:
+.LASF271:
 	.string	"uclass_id"
 .LASF94:
 	.string	"ih_load"
-.LASF239:
+.LASF242:
 	.string	"__dtb_dt_spl_begin"
-.LASF336:
+.LASF338:
 	.string	"parse_wf_a2"
 .LASF7:
 	.string	"__u32"
 .LASF148:
 	.string	"UCLASS_PCI_EMUL"
-.LASF295:
+.LASF297:
 	.string	"epd_lut_data"
-.LASF256:
+.LASF258:
 	.string	"net_tx_packet"
-.LASF222:
+.LASF223:
 	.string	"UCLASS_FG"
-.LASF255:
+.LASF257:
 	.string	"net_server_ip"
-.LASF347:
+.LASF349:
 	.string	"parse_wf_gray16"
-.LASF263:
+.LASF265:
 	.string	"net_native_vlan"
-.LASF220:
+.LASF221:
 	.string	"UCLASS_VIDEO_CRTC"
-.LASF282:
+.LASF284:
 	.string	"WF_TYPE_RESET"
 .LASF157:
 	.string	"UCLASS_CODEC"
-.LASF388:
+.LASF390:
 	.ascii	"GNU C11 6.3.1 20170404 -ms"
 	.string	"trict-align -march=armv8-a+nosimd -mlittle-endian -mabi=lp64 -g -Os -fno-builtin -ffreestanding -fshort-wchar -fno-stack-protector -fno-delete-null-pointer-checks -fstack-usage -fno-pic -ffunction-sections -fdata-sections -ffixed-r9 -fno-common -ffixed-x18"
 .LASF23:
 	.string	"errno"
-.LASF301:
+.LASF303:
 	.string	"RKF_WF_GC16"
 .LASF15:
 	.string	"long int"
@@ -7393,11 +7377,11 @@ stype.6129:
 	.string	"IRQ_STACK_START_IN"
 .LASF86:
 	.string	"size_dt_strings"
-.LASF217:
+.LASF218:
 	.string	"UCLASS_VIDEO"
-.LASF266:
+.LASF268:
 	.string	"net_boot_file_size"
-.LASF309:
+.LASF311:
 	.string	"timeandday"
 .LASF96:
 	.string	"ih_dcrc"
@@ -7405,11 +7389,11 @@ stype.6129:
 	.string	"bi_ethspeed"
 .LASF140:
 	.string	"UCLASS_ROOT"
-.LASF349:
+.LASF351:
 	.string	"get_wf_frm_num"
 .LASF29:
 	.string	"ide_bus_offset"
-.LASF253:
+.LASF255:
 	.string	"net_server_ethaddr"
 .LASF64:
 	.string	"bi_arch_number"
@@ -7425,13 +7409,13 @@ stype.6129:
 	.string	"totalsize"
 .LASF91:
 	.string	"ih_hcrc"
-.LASF342:
+.LASF344:
 	.string	"idata"
 .LASF106:
 	.string	"load"
-.LASF288:
+.LASF290:
 	.string	"WF_TYPE_GC16"
-.LASF212:
+.LASF213:
 	.string	"UCLASS_TPM"
 .LASF41:
 	.string	"lmb_property"
@@ -7443,7 +7427,7 @@ stype.6129:
 	.string	"bi_andr_version"
 .LASF139:
 	.string	"images"
-.LASF226:
+.LASF227:
 	.string	"UCLASS_DVFS"
 .LASF57:
 	.string	"bi_ddr_freq"
@@ -7451,37 +7435,39 @@ stype.6129:
 	.string	"UCLASS_LED"
 .LASF93:
 	.string	"ih_size"
-.LASF230:
+.LASF202:
+	.string	"UCLASS_SCMI_AGENT"
+.LASF231:
 	.string	"UCLASS_MDIO"
 .LASF25:
 	.string	"_Bool"
-.LASF275:
+.LASF277:
 	.string	"net_state"
 .LASF167:
 	.string	"UCLASS_I2C_MUX"
-.LASF296:
+.LASF298:
 	.string	"frame_num"
 .LASF14:
 	.string	"char"
 .LASF27:
 	.string	"_binary_u_boot_bin_start"
-.LASF387:
+.LASF389:
 	.string	"memset"
-.LASF216:
+.LASF217:
 	.string	"UCLASS_USB_GADGET_GENERIC"
-.LASF273:
+.LASF275:
 	.string	"NETLOOP_SUCCESS"
-.LASF329:
+.LASF331:
 	.string	"output"
-.LASF335:
+.LASF337:
 	.string	"pbuf"
-.LASF279:
+.LASF281:
 	.string	"p_current"
-.LASF270:
+.LASF272:
 	.string	"net_loop_state"
-.LASF354:
+.LASF356:
 	.string	"templist"
-.LASF303:
+.LASF305:
 	.string	"RKF_WF_GLR16"
 .LASF156:
 	.string	"UCLASS_AMP"
@@ -7489,15 +7475,15 @@ stype.6129:
 	.string	"UCLASS_PWRSEQ"
 .LASF122:
 	.string	"fit_hdr_fdt"
-.LASF264:
+.LASF266:
 	.string	"net_restart_wrap"
-.LASF252:
+.LASF254:
 	.string	"net_ethaddr"
-.LASF361:
+.LASF363:
 	.string	"_min2"
-.LASF381:
+.LASF383:
 	.string	"flags"
-.LASF341:
+.LASF343:
 	.string	"gray"
 .LASF99:
 	.string	"ih_type"
@@ -7505,15 +7491,15 @@ stype.6129:
 	.string	"off_dt_struct"
 .LASF52:
 	.string	"bi_flashoffset"
-.LASF265:
+.LASF267:
 	.string	"net_boot_file_name"
-.LASF365:
+.LASF367:
 	.string	"check_wf_crc"
 .LASF142:
 	.string	"UCLASS_TEST"
 .LASF92:
 	.string	"ih_time"
-.LASF356:
+.LASF358:
 	.string	"get_wf_level"
 .LASF195:
 	.string	"UCLASS_RAM"
@@ -7521,69 +7507,69 @@ stype.6129:
 	.string	"UCLASS_ETH"
 .LASF103:
 	.string	"image_info"
-.LASF346:
+.LASF348:
 	.string	"temp_data"
 .LASF109:
 	.string	"arch"
-.LASF326:
+.LASF328:
 	.string	"a2_list"
-.LASF338:
+.LASF340:
 	.string	"input"
-.LASF334:
+.LASF336:
 	.string	"temp"
 .LASF31:
 	.string	"select_hwpart"
-.LASF257:
+.LASF259:
 	.string	"net_rx_packets"
-.LASF276:
+.LASF278:
 	.string	"mem_malloc_start"
 .LASF74:
 	.string	"_datarelro_start_ofs"
 .LASF19:
 	.string	"ulong"
-.LASF337:
+.LASF339:
 	.string	"parse_wf_auto"
 .LASF95:
 	.string	"ih_ep"
 .LASF43:
 	.string	"lmb_region"
-.LASF352:
+.LASF354:
 	.string	"waveform"
-.LASF386:
+.LASF388:
 	.string	"printf"
 .LASF117:
 	.string	"fit_uname_os"
 .LASF58:
 	.string	"bi_bootflags"
-.LASF254:
+.LASF256:
 	.string	"net_ip"
-.LASF248:
+.LASF250:
 	.string	"net_dns_server"
-.LASF268:
+.LASF270:
 	.string	"net_ping_ip"
 .LASF45:
 	.string	"memory"
 .LASF77:
 	.string	"fdt_header"
-.LASF277:
+.LASF279:
 	.string	"mem_malloc_end"
 .LASF174:
 	.string	"UCLASS_MAILBOX"
 .LASF129:
 	.string	"rd_end"
-.LASF362:
+.LASF364:
 	.string	"rkf_wf_get_lut"
 .LASF134:
 	.string	"cmdline_start"
-.LASF331:
+.LASF333:
 	.string	"temperture"
-.LASF343:
+.LASF345:
 	.string	"odata"
-.LASF320:
+.LASF322:
 	.string	"reset_list"
-.LASF202:
+.LASF203:
 	.string	"UCLASS_SCSI"
-.LASF389:
+.LASF391:
 	.string	"drivers/video/rk_eink/epdlut/rkf_waveform.c"
 .LASF175:
 	.string	"UCLASS_MASS_STORAGE"
@@ -7591,23 +7577,23 @@ stype.6129:
 	.string	"long unsigned int"
 .LASF150:
 	.string	"UCLASS_SIMPLE_BUS"
-.LASF299:
+.LASF301:
 	.string	"RKF_WF_RESET"
-.LASF308:
+.LASF310:
 	.string	"format"
-.LASF249:
+.LASF251:
 	.string	"net_nis_domain"
-.LASF284:
+.LASF286:
 	.string	"WF_TYPE_GRAY4"
-.LASF358:
+.LASF360:
 	.string	"_max1"
-.LASF359:
+.LASF361:
 	.string	"_max2"
 .LASF124:
 	.string	"fit_noffset_fdt"
-.LASF274:
+.LASF276:
 	.string	"NETLOOP_FAIL"
-.LASF221:
+.LASF222:
 	.string	"UCLASS_WDT"
 .LASF53:
 	.string	"bi_sramstart"
@@ -7617,15 +7603,15 @@ stype.6129:
 	.string	"boot_cpuid_phys"
 .LASF120:
 	.string	"fit_uname_rd"
-.LASF318:
+.LASF320:
 	.string	"du_temp_list"
-.LASF208:
+.LASF209:
 	.string	"UCLASS_SYSCON"
 .LASF115:
 	.string	"fit_uname_cfg"
-.LASF203:
+.LASF204:
 	.string	"UCLASS_SERIAL"
-.LASF262:
+.LASF264:
 	.string	"net_our_vlan"
 .LASF153:
 	.string	"UCLASS_BLK"
@@ -7633,39 +7619,39 @@ stype.6129:
 	.string	"image_info_t"
 .LASF149:
 	.string	"UCLASS_USB_EMUL"
-.LASF383:
+.LASF385:
 	.string	"kmalloc"
-.LASF304:
+.LASF306:
 	.string	"RKF_WF_GLD16"
 .LASF187:
 	.string	"UCLASS_PCI_GENERIC"
-.LASF328:
+.LASF330:
 	.string	"crc32_table"
 .LASF105:
 	.string	"image_len"
-.LASF316:
+.LASF318:
 	.string	"glr16_temp_list"
 .LASF59:
 	.string	"bi_ip_addr"
-.LASF367:
+.LASF369:
 	.string	"readcrc"
 .LASF189:
 	.string	"UCLASS_PINCONFIG"
-.LASF345:
+.LASF347:
 	.string	"decode_wf_reset"
-.LASF210:
+.LASF211:
 	.string	"UCLASS_THERMAL"
 .LASF113:
 	.string	"legacy_hdr_os_copy"
 .LASF9:
 	.string	"long long int"
-.LASF348:
+.LASF350:
 	.string	"decode_wf_data"
-.LASF290:
+.LASF292:
 	.string	"WF_TYPE_GLR16"
 .LASF24:
 	.string	"___strtok"
-.LASF267:
+.LASF269:
 	.string	"net_boot_file_expected_size_in_blocks"
 .LASF16:
 	.string	"__kernel_size_t"
@@ -7675,23 +7661,23 @@ stype.6129:
 	.string	"bootm_headers"
 .LASF37:
 	.string	"protect"
-.LASF213:
+.LASF214:
 	.string	"UCLASS_USB"
-.LASF224:
+.LASF225:
 	.string	"UCLASS_RC"
 .LASF159:
 	.string	"UCLASS_DISPLAY"
-.LASF261:
+.LASF263:
 	.string	"net_null_ethaddr"
-.LASF325:
+.LASF327:
 	.string	"du_list"
-.LASF225:
+.LASF226:
 	.string	"UCLASS_CHARGE_DISPLAY"
-.LASF240:
+.LASF243:
 	.string	"load_addr"
 .LASF116:
 	.string	"fit_hdr_os"
-.LASF372:
+.LASF374:
 	.string	"n_accum"
 .LASF72:
 	.string	"_datarelrolocal_start_ofs"
@@ -7699,9 +7685,9 @@ stype.6129:
 	.string	"unsigned int"
 .LASF18:
 	.string	"ushort"
-.LASF344:
+.LASF346:
 	.string	"temp1"
-.LASF293:
+.LASF295:
 	.string	"WF_TYPE_GRAY32"
 .LASF191:
 	.string	"UCLASS_PMIC"
@@ -7709,27 +7695,27 @@ stype.6129:
 	.string	"legacy_hdr_os"
 .LASF81:
 	.string	"off_dt_strings"
-.LASF237:
+.LASF240:
 	.string	"monitor_flash_len"
 .LASF176:
 	.string	"UCLASS_MISC"
 .LASF49:
 	.string	"bi_memsize"
-.LASF306:
+.LASF308:
 	.string	"rkf_waveform"
-.LASF327:
+.LASF329:
 	.string	"global_waveform"
 .LASF26:
 	.string	"image_base"
-.LASF377:
+.LASF379:
 	.string	"n_data"
-.LASF209:
+.LASF210:
 	.string	"UCLASS_SYSRESET"
-.LASF286:
+.LASF288:
 	.string	"WF_TYPE_AUTO"
-.LASF280:
+.LASF282:
 	.string	"current"
-.LASF305:
+.LASF307:
 	.string	"RKF_WF_A2"
 .LASF163:
 	.string	"UCLASS_FIRMWARE"
@@ -7737,9 +7723,9 @@ stype.6129:
 	.string	"UCLASS_LPC"
 .LASF169:
 	.string	"UCLASS_IDE"
-.LASF353:
+.LASF355:
 	.string	"list"
-.LASF379:
+.LASF381:
 	.string	"block"
 .LASF138:
 	.string	"bootm_headers_t"
@@ -7753,7 +7739,7 @@ stype.6129:
 	.string	"fit_hdr_rd"
 .LASF54:
 	.string	"bi_sramsize"
-.LASF313:
+.LASF315:
 	.string	"reset_temp_list"
 .LASF162:
 	.string	"UCLASS_GPIO"
@@ -7761,9 +7747,9 @@ stype.6129:
 	.string	"UCLASS_PWM"
 .LASF40:
 	.string	"long double"
-.LASF385:
+.LASF387:
 	.string	"strncmp"
-.LASF323:
+.LASF325:
 	.string	"glr16_list"
 .LASF128:
 	.string	"rd_start"
@@ -7771,7 +7757,7 @@ stype.6129:
 	.string	"UCLASS_POWER_DOMAIN"
 .LASF196:
 	.string	"UCLASS_REGULATOR"
-.LASF242:
+.LASF245:
 	.string	"save_size"
 .LASF154:
 	.string	"UCLASS_CLK"
@@ -7781,15 +7767,15 @@ stype.6129:
 	.string	"ih_name"
 .LASF97:
 	.string	"ih_os"
-.LASF291:
+.LASF293:
 	.string	"WF_TYPE_GLD16"
 .LASF135:
 	.string	"cmdline_end"
-.LASF258:
+.LASF260:
 	.string	"net_rx_packet"
-.LASF236:
+.LASF239:
 	.string	"LOGF_MAX_CATEGORIES"
-.LASF371:
+.LASF373:
 	.string	"a_size"
 .LASF33:
 	.string	"size"
@@ -7797,9 +7783,9 @@ stype.6129:
 	.string	"long long unsigned int"
 .LASF89:
 	.string	"image_header"
-.LASF307:
+.LASF309:
 	.string	"length"
-.LASF285:
+.LASF287:
 	.string	"WF_TYPE_GRAY2"
 .LASF21:
 	.string	"__be32"
@@ -7807,21 +7793,21 @@ stype.6129:
 	.string	"bi_flashstart"
 .LASF118:
 	.string	"fit_noffset_os"
-.LASF360:
+.LASF362:
 	.string	"_min1"
 .LASF177:
 	.string	"UCLASS_MMC"
-.LASF235:
+.LASF238:
 	.string	"UCLASS_INVALID"
-.LASF300:
+.LASF302:
 	.string	"RKF_WF_DU"
-.LASF215:
+.LASF216:
 	.string	"UCLASS_USB_HUB"
-.LASF231:
+.LASF232:
 	.string	"UCLASS_EBC"
-.LASF294:
+.LASF296:
 	.string	"WF_TYPE_MAX"
-.LASF392:
+.LASF394:
 	.string	"rkf_wf_get_version"
 .LASF39:
 	.string	"flash_info"
@@ -7831,31 +7817,31 @@ stype.6129:
 	.string	"region"
 .LASF87:
 	.string	"size_dt_struct"
-.LASF233:
+.LASF234:
 	.string	"UCLASS_RNG"
 .LASF179:
 	.string	"UCLASS_MTD"
-.LASF376:
+.LASF378:
 	.string	"crc_table"
 .LASF76:
 	.string	"fdt32_t"
-.LASF330:
+.LASF332:
 	.string	"lut_type"
 .LASF181:
 	.string	"UCLASS_NORTHBRIDGE"
 .LASF60:
 	.string	"bi_enetaddr"
-.LASF380:
+.LASF382:
 	.string	"kzalloc"
-.LASF391:
+.LASF393:
 	.string	"mtd_info"
-.LASF243:
+.LASF246:
 	.string	"in_addr"
-.LASF259:
+.LASF261:
 	.string	"net_rx_packet_len"
-.LASF332:
+.LASF334:
 	.string	"stype"
-.LASF238:
+.LASF241:
 	.string	"__dtb_dt_begin"
 .LASF198:
 	.string	"UCLASS_RESET"
@@ -7873,15 +7859,15 @@ stype.6129:
 	.string	"verify"
 .LASF30:
 	.string	"name"
-.LASF232:
+.LASF233:
 	.string	"UCLASS_EINK_DISPLAY"
 .LASF184:
 	.string	"UCLASS_PANEL_BACKLIGHT"
-.LASF211:
+.LASF212:
 	.string	"UCLASS_TIMER"
-.LASF206:
+.LASF207:
 	.string	"UCLASS_SPI_FLASH"
-.LASF314:
+.LASF316:
 	.string	"gc16_temp_list"
 .LASF63:
 	.string	"bi_busfreq"
@@ -7891,97 +7877,101 @@ stype.6129:
 	.string	"UCLASS_PINCTRL"
 .LASF200:
 	.string	"UCLASS_RAMDISK"
-.LASF351:
+.LASF353:
 	.string	"mode"
-.LASF374:
+.LASF376:
 	.string	"crc_build_table32"
 .LASF147:
 	.string	"UCLASS_I2C_EMUL"
-.LASF205:
+.LASF206:
 	.string	"UCLASS_SPMI"
 .LASF144:
 	.string	"UCLASS_TEST_BUS"
-.LASF369:
+.LASF371:
 	.string	"crc_32"
-.LASF298:
+.LASF300:
 	.string	"rkf_waveform_type"
-.LASF241:
+.LASF244:
 	.string	"save_addr"
 .LASF133:
 	.string	"initrd_end"
-.LASF378:
+.LASF380:
 	.string	"kfree"
-.LASF340:
+.LASF342:
 	.string	"parse_wf_reset"
-.LASF324:
+.LASF326:
 	.string	"gld16_list"
 .LASF73:
 	.string	"_datarellocal_start_ofs"
-.LASF311:
+.LASF313:
 	.string	"panel_info"
-.LASF234:
+.LASF237:
 	.string	"UCLASS_COUNT"
 .LASF32:
 	.string	"block_drvr"
-.LASF384:
+.LASF386:
 	.string	"memcpy"
 .LASF22:
 	.string	"gfp_t"
 .LASF35:
 	.string	"flash_id"
-.LASF228:
+.LASF229:
 	.string	"UCLASS_CRYPTO"
 .LASF127:
 	.string	"fit_noffset_setup"
 .LASF88:
 	.string	"working_fdt"
-.LASF251:
+.LASF253:
 	.string	"net_root_path"
 .LASF160:
 	.string	"UCLASS_DMA"
 .LASF68:
 	.string	"bd_t"
-.LASF244:
+.LASF235:
+	.string	"UCLASS_DMC"
+.LASF247:
 	.string	"s_addr"
-.LASF350:
+.LASF352:
 	.string	"get_wf_buf"
-.LASF312:
+.LASF314:
 	.string	"full_version"
-.LASF260:
+.LASF262:
 	.string	"net_bcast_ethaddr"
 .LASF65:
 	.string	"bi_boot_params"
-.LASF333:
+.LASF335:
 	.string	"sftemp"
-.LASF278:
+.LASF280:
 	.string	"mem_malloc_brk"
-.LASF246:
+.LASF248:
 	.string	"net_gateway"
 .LASF48:
 	.string	"bi_memstart"
-.LASF281:
+.LASF283:
 	.string	"epd_lut_type"
-.LASF219:
+.LASF220:
 	.string	"UCLASS_VIDEO_CONSOLE"
-.LASF287:
+.LASF289:
 	.string	"WF_TYPE_A2"
 .LASF46:
 	.string	"reserved"
-.LASF382:
+.LASF384:
 	.string	"free"
+.LASF236:
+	.string	"UCLASS_PD"
 .LASF67:
 	.string	"bi_dram"
-.LASF375:
+.LASF377:
 	.string	"a_poly"
 .LASF2:
 	.string	"short unsigned int"
 .LASF78:
 	.string	"magic"
-.LASF370:
+.LASF372:
 	.string	"a_data"
 .LASF125:
 	.string	"fit_hdr_setup"
-.LASF292:
+.LASF294:
 	.string	"WF_TYPE_GCC16"
 .LASF114:
 	.string	"legacy_hdr_valid"
@@ -7993,27 +7983,27 @@ stype.6129:
 	.string	"sector_count"
 .LASF100:
 	.string	"ih_comp"
-.LASF283:
+.LASF285:
 	.string	"WF_TYPE_GRAY16"
 .LASF130:
 	.string	"ft_addr"
-.LASF229:
+.LASF230:
 	.string	"UCLASS_ETH_PHY"
-.LASF302:
+.LASF304:
 	.string	"RKF_WF_GL16"
-.LASF368:
+.LASF370:
 	.string	"check_wf_format"
-.LASF363:
+.LASF365:
 	.string	"rkf_wf_input"
 .LASF4:
 	.string	"uchar"
 .LASF131:
 	.string	"ft_len"
-.LASF373:
+.LASF375:
 	.string	"decode_wf_auto"
-.LASF315:
+.LASF317:
 	.string	"gl16_temp_list"
-.LASF297:
+.LASF299:
 	.string	"data"
 .LASF180:
 	.string	"UCLASS_NOP"
@@ -8023,19 +8013,19 @@ stype.6129:
 	.string	"UCLASS_PCH"
 .LASF186:
 	.string	"UCLASS_PCI"
-.LASF247:
+.LASF249:
 	.string	"net_netmask"
-.LASF321:
+.LASF323:
 	.string	"gc16_list"
 .LASF69:
 	.string	"IRQ_STACK_START"
 .LASF151:
 	.string	"UCLASS_ADC"
-.LASF364:
+.LASF366:
 	.string	"waveform_file"
 .LASF146:
 	.string	"UCLASS_SPI_EMUL"
-.LASF310:
+.LASF312:
 	.string	"panel_name"
 .LASF123:
 	.string	"fit_uname_fdt"

commit 0603e0bd3c89ac9411f664985d783201b54124cc
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed Jan 12 12:33:54 2022 +0800

    drivers: rkflash: Support more pp nand devices
    
    F59L4G81KA, GD9F4GxF2A, S34ML08G2, S34ML08G3, TC58NVG5H2HTAI0
    
    Change-Id: I31fe37e4ea62499fa3c14d75caeb4e2ccc9e716c
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/flash.c b/drivers/rkflash/flash.c
index 8d8da7b7c5..c038d5bae8 100644
--- a/drivers/rkflash/flash.c
+++ b/drivers/rkflash/flash.c
@@ -458,7 +458,7 @@ u32 nandc_flash_init(void __iomem *nandc_addr)
 				return FTL_UNSUPPORTED_FLASH;
 			}
 
-			if (id_byte[0][1] != 0xD7 && nandc_get_version() != 9) {
+			if (id_byte[0][1] == 0xD7 && nandc_get_version() != 9) {
 				pr_err("This device is not compatible, Insufficient ECC capability\n");
 
 				return FTL_UNSUPPORTED_FLASH;
@@ -478,7 +478,8 @@ u32 nandc_flash_init(void __iomem *nandc_addr)
 			nand_para.plane_per_die = 2;
 			nand_para.sec_per_page = 8;
 		} else if ((id_byte[0][0] == 0x98 && id_byte[0][3] == 0x26) ||
-			   (id_byte[0][0] == 0xC8 && ((id_byte[0][3] & 0x3) == 1))) {
+			   (id_byte[0][0] == 0xC8 && id_byte[0][2] == 0x80 && ((id_byte[0][3] & 0x3) == 1)) || /* F59L4G81KA (2R) */
+			   (id_byte[0][0] == 0xC8 && id_byte[0][2] == 0x90 && ((id_byte[0][3] & 0x3) == 2))) { /* GD9F4GxF2A */
 			nand_para.blk_per_plane = 1024;
 			nand_para.sec_per_page = 8;
 			nand_para.plane_per_die = 2;
@@ -492,11 +493,20 @@ u32 nandc_flash_init(void __iomem *nandc_addr)
 		nand_para.plane_per_die = 2;
 		nand_para.blk_per_plane = 2048;
 	} else if (id_byte[0][1] == 0xD3) {
-		nand_para.sec_per_page = 8;
-		nand_para.page_per_blk = 64;
-		nand_para.plane_per_die = 2;
-		nand_para.blk_per_plane = 2048;
-	} else if (id_byte[0][1] == 0xD7 && id_byte[0][3] == 0x32) {
+		if ((id_byte[0][2] == 0xD1 && id_byte[0][4] == 0x5a) || /* S34ML08G2 */
+		    (id_byte[0][3] == 0x05 && id_byte[0][4] == 0x04)) { /* S34ML08G3 */
+			nand_para.sec_per_page = 4;
+			nand_para.page_per_blk = 64;
+			nand_para.plane_per_die = 2;
+			nand_para.blk_per_plane = 4096;
+		} else {
+			nand_para.sec_per_page = 8;
+			nand_para.page_per_blk = 64;
+			nand_para.plane_per_die = 2;
+			nand_para.blk_per_plane = 2048;
+		}
+	} else if (id_byte[0][1] == 0xD7 && id_byte[0][3] == 0x32) { /* TC58NVG5H2HTAI0 */
+		nand_para.ecc_bits = 70;
 		nand_para.blk_per_plane = 2048;
 		nand_para.sec_per_page = 16;
 		nand_para.page_per_blk = 128;

commit 5d7a183bfbb1c6e706309cf2057a9b04779c3f53
Author: Wyon bi <bivvy.bi@rock-chips.com>
Date:   Mon Jan 10 14:44:33 2022 +0800

    phy: rockchip-samsung-hdptx: Update config for SI test
    
    Signed-off-by: Wyon bi <bivvy.bi@rock-chips.com>
    Change-Id: Ic951d1eaa9e03f35c5e6ac9a4bdaafb282555f2a

diff --git a/drivers/phy/phy-rockchip-samsung-hdptx.c b/drivers/phy/phy-rockchip-samsung-hdptx.c
index f5a733b0ef..e56cb450ee 100644
--- a/drivers/phy/phy-rockchip-samsung-hdptx.c
+++ b/drivers/phy/phy-rockchip-samsung-hdptx.c
@@ -181,11 +181,18 @@
 #define OVRD_SB_AUX_EN				BIT(1)
 #define SB_AUX_EN				BIT(0)
 
+/* sb_reg0105 */
+#define ANA_SB_TX_HLVL_PROG			GENMASK(2, 0)
+
+/* sb_reg0106 */
+#define ANA_SB_TX_LLVL_PROG			GENMASK(6, 4)
+
 /* sb_reg010D */
 #define ANA_SB_DMRX_LPBK_DATA			BIT(4)
 
 /* sb_reg010F */
 #define OVRD_SB_VREG_EN				BIT(7)
+#define SB_VREG_EN				BIT(6)
 #define ANA_SB_VREG_GAIN_CTRL			GENMASK(3, 0)
 
 /* sb_reg0110 */
@@ -193,7 +200,6 @@
 #define ANA_SB_VREG_REF_SEL			BIT(0)
 
 /* sb_reg0113 */
-#define SB_VREG_EN				BIT(6)
 #define SB_RX_RCAL_OPT_CODE			GENMASK(5, 4)
 #define SB_RX_RTERM_CTRL			GENMASK(3, 0)
 
@@ -251,6 +257,10 @@
 /* lntop_reg0207 */
 #define LANE_EN					GENMASK(3, 0)
 
+/* lane_reg0301 */
+#define OVRD_LN_TX_DRV_EI_EN			BIT(7)
+#define LN_TX_DRV_EI_EN				BIT(6)
+
 /* lane_reg0303 */
 #define OVRD_LN_TX_DRV_LVL_CTRL			BIT(5)
 #define LN_TX_DRV_LVL_CTRL			GENMASK(4, 0)
@@ -263,6 +273,15 @@
 #define OVRD_LN_TX_DRV_PRE_LVL_CTRL		BIT(6)
 #define LN_TX_DRV_PRE_LVL_CTRL			GENMASK(5, 2)
 
+/* lane_reg0306 */
+#define LN_ANA_TX_DRV_IDRV_IDN_CTRL		GENMASK(7, 5)
+#define LN_ANA_TX_DRV_IDRV_IUP_CTRL		GENMASK(4, 2)
+#define LN_ANA_TX_DRV_ACCDRV_EN			BIT(0)
+
+/* lane_reg0307 */
+#define LN_ANA_TX_DRV_ACCDRV_POL_SEL		BIT(6)
+#define LN_ANA_TX_DRV_ACCDRV_CTRL		GENMASK(5, 3)
+
 /* lane_reg030A */
 #define LN_ANA_TX_JEQ_EN			BIT(4)
 #define LN_TX_JEQ_EVEN_CTRL_RBR			GENMASK(3, 0)
@@ -282,10 +301,6 @@
 /* lane_reg030E */
 #define LN_TX_JEQ_ODD_CTRL_HBR3			GENMASK(7, 4)
 
-/* lane_reg0307 */
-#define LN_ANA_TX_DRV_ACCDRV_POL_SEL		BIT(6)
-#define LN_ANA_TX_DRV_ACCDRV_CTRL		GENMASK(5, 3)
-
 /* lane_reg0310 */
 #define LN_ANA_TX_SYNC_LOSS_DET_MODE		GENMASK(1, 0)
 
@@ -325,35 +340,96 @@ enum {
 	DP_BW_HBR3,
 };
 
-static struct {
-	u8 tx_amp;
-	u8 tx_de_emp;
-	u8 tx_pre_emp;
-} training_table[4][4] = {
+struct tx_drv_ctrl {
+	u8 tx_drv_lvl_ctrl;
+	u8 tx_drv_post_lvl_ctrl;
+	u8 ana_tx_drv_idrv_idn_ctrl;
+	u8 ana_tx_drv_idrv_iup_ctrl;
+	u8 ana_tx_drv_accdrv_en;
+	u8 ana_tx_drv_accdrv_ctrl;
+};
+
+static const struct tx_drv_ctrl tx_drv_ctrl_rbr[4][4] = {
+	/* voltage swing 0, pre-emphasis 0->3 */
+	{
+		{ 0x1, 0x0, 0x4, 0x6, 0x0, 0x4 },
+		{ 0x4, 0x3, 0x4, 0x6, 0x0, 0x4 },
+		{ 0x7, 0x6, 0x4, 0x6, 0x0, 0x4 },
+		{ 0xd, 0xb, 0x7, 0x7, 0x1, 0x7 },
+	},
+
+	/* voltage swing 1, pre-emphasis 0->2 */
+	{
+		{ 0x4, 0x0, 0x4, 0x6, 0x0, 0x4 },
+		{ 0xa, 0x5, 0x4, 0x6, 0x0, 0x4 },
+		{ 0xd, 0x8, 0x7, 0x7, 0x1, 0x7 },
+	},
+
+	/* voltage swing 2, pre-emphasis 0->1 */
+	{
+		{ 0x8, 0x0, 0x4, 0x6, 0x0, 0x4 },
+		{ 0xd, 0x5, 0x7, 0x7, 0x1, 0x7 },
+	},
+
+	/* voltage swing 3, pre-emphasis 0 */
+	{
+		{ 0xd, 0x0, 0x7, 0x7, 0x1, 0x4 },
+	}
+};
+
+static const struct tx_drv_ctrl tx_drv_ctrl_hbr[4][4] = {
+	/* voltage swing 0, pre-emphasis 0->3 */
+	{
+		{ 0x2, 0x1, 0x4, 0x6, 0x0, 0x4 },
+		{ 0x5, 0x4, 0x4, 0x6, 0x0, 0x4 },
+		{ 0x9, 0x8, 0x4, 0x6, 0x0, 0x4 },
+		{ 0xd, 0xb, 0x7, 0x7, 0x1, 0x7 },
+	},
+
+	/* voltage swing 1, pre-emphasis 0->2 */
+	{
+		{ 0x6, 0x1, 0x4, 0x6, 0x0, 0x4 },
+		{ 0xb, 0x6, 0x4, 0x6, 0x0, 0x4 },
+		{ 0xd, 0x8, 0x7, 0x7, 0x1, 0x7 },
+	},
+
+	/* voltage swing 2, pre-emphasis 0->1 */
+	{
+		{ 0x9, 0x1, 0x4, 0x6, 0x0, 0x4 },
+		{ 0xd, 0x6, 0x7, 0x7, 0x1, 0x7 },
+	},
+
+	/* voltage swing 3, pre-emphasis 0 */
+	{
+		{ 0xd, 0x1, 0x7, 0x7, 0x1, 0x4 },
+	}
+};
+
+static const struct tx_drv_ctrl tx_drv_ctrl_hbr2[4][4] = {
 	/* voltage swing 0, pre-emphasis 0->3 */
 	{
-		{ .tx_amp = 0x3, .tx_de_emp = 0x1, .tx_pre_emp = 0x1 },
-		{ .tx_amp = 0x9, .tx_de_emp = 0x7, .tx_pre_emp = 0x0 },
-		{ .tx_amp = 0xc, .tx_de_emp = 0xa, .tx_pre_emp = 0x0 },
-		{ .tx_amp = 0xd, .tx_de_emp = 0xc, .tx_pre_emp = 0x0 }
+		{ 0x2, 0x1, 0x4, 0x6, 0x0, 0x4 },
+		{ 0x5, 0x4, 0x4, 0x6, 0x0, 0x4 },
+		{ 0x9, 0x8, 0x4, 0x6, 0x1, 0x4 },
+		{ 0xd, 0xb, 0x7, 0x7, 0x1, 0x7 },
 	},
 
 	/* voltage swing 1, pre-emphasis 0->2 */
 	{
-		{ .tx_amp = 0x6, .tx_de_emp = 0x1, .tx_pre_emp = 0x1 },
-		{ .tx_amp = 0xc, .tx_de_emp = 0x7, .tx_pre_emp = 0x0 },
-		{ .tx_amp = 0xd, .tx_de_emp = 0x9, .tx_pre_emp = 0x0 },
+		{ 0x6, 0x1, 0x4, 0x6, 0x0, 0x4 },
+		{ 0xc, 0x7, 0x4, 0x6, 0x0, 0x4 },
+		{ 0xd, 0x8, 0x7, 0x7, 0x1, 0x7 },
 	},
 
 	/* voltage swing 2, pre-emphasis 0->1 */
 	{
-		{ .tx_amp = 0x9, .tx_de_emp = 0x1, .tx_pre_emp = 0x1 },
-		{ .tx_amp = 0xd, .tx_de_emp = 0x6, .tx_pre_emp = 0x0 },
+		{ 0x9, 0x1, 0x4, 0x6, 0x0, 0x4 },
+		{ 0xd, 0x6, 0x7, 0x7, 0x1, 0x7 },
 	},
 
 	/* voltage swing 3, pre-emphasis 0 */
 	{
-		{ .tx_amp = 0xd, .tx_de_emp = 0x1, .tx_pre_emp = 0x1 },
+		{ 0xd, 0x0, 0x7, 0x7, 0x1, 0x4 },
 	}
 };
 
@@ -433,13 +509,14 @@ static void rockchip_hdptx_phy_set_voltage(struct rockchip_hdptx_phy *hdptx,
 					   struct phy_configure_opts_dp *dp,
 					   u8 lane)
 {
-	u32 val;
+	const struct tx_drv_ctrl *ctrl;
 
 	phy_update_bits(hdptx, LANE_REG(lane, 0x0c28), LN_ANA_TX_JEQ_EN,
 			FIELD_PREP(LN_ANA_TX_JEQ_EN, 0x1));
 
 	switch (dp->link_rate) {
 	case 1620:
+		ctrl = &tx_drv_ctrl_rbr[dp->voltage[lane]][dp->pre[lane]];
 		phy_update_bits(hdptx, LANE_REG(lane, 0x0c28),
 				LN_TX_JEQ_EVEN_CTRL_RBR,
 				FIELD_PREP(LN_TX_JEQ_EVEN_CTRL_RBR, 0x7));
@@ -451,6 +528,7 @@ static void rockchip_hdptx_phy_set_voltage(struct rockchip_hdptx_phy *hdptx,
 				FIELD_PREP(LN_TX_SER_40BIT_EN_RBR, 0x1));
 		break;
 	case 2700:
+		ctrl = &tx_drv_ctrl_hbr[dp->voltage[lane]][dp->pre[lane]];
 		phy_update_bits(hdptx, LANE_REG(lane, 0x0c2c),
 				LN_TX_JEQ_EVEN_CTRL_HBR,
 				FIELD_PREP(LN_TX_JEQ_EVEN_CTRL_HBR, 0x7));
@@ -462,6 +540,8 @@ static void rockchip_hdptx_phy_set_voltage(struct rockchip_hdptx_phy *hdptx,
 				FIELD_PREP(LN_TX_SER_40BIT_EN_HBR, 0x1));
 		break;
 	case 5400:
+	default:
+		ctrl = &tx_drv_ctrl_hbr2[dp->voltage[lane]][dp->pre[lane]];
 		phy_update_bits(hdptx, LANE_REG(lane, 0x0c2c),
 				LN_TX_JEQ_EVEN_CTRL_HBR2,
 				FIELD_PREP(LN_TX_JEQ_EVEN_CTRL_HBR2, 0x7));
@@ -474,28 +554,32 @@ static void rockchip_hdptx_phy_set_voltage(struct rockchip_hdptx_phy *hdptx,
 		break;
 	}
 
-	val = training_table[dp->voltage[lane]][dp->pre[lane]].tx_amp;
 	phy_update_bits(hdptx, LANE_REG(lane, 0x0c0c),
 			OVRD_LN_TX_DRV_LVL_CTRL | LN_TX_DRV_LVL_CTRL,
 			FIELD_PREP(OVRD_LN_TX_DRV_LVL_CTRL, 0x1) |
-			FIELD_PREP(LN_TX_DRV_LVL_CTRL, val));
+			FIELD_PREP(LN_TX_DRV_LVL_CTRL, ctrl->tx_drv_lvl_ctrl));
 
-	val = training_table[dp->voltage[lane]][dp->pre[lane]].tx_de_emp;
 	phy_update_bits(hdptx, LANE_REG(lane, 0x0c10),
 			OVRD_LN_TX_DRV_POST_LVL_CTRL | LN_TX_DRV_POST_LVL_CTRL,
 			FIELD_PREP(OVRD_LN_TX_DRV_POST_LVL_CTRL, 0x1) |
-			FIELD_PREP(LN_TX_DRV_POST_LVL_CTRL, val));
-
-	val = training_table[dp->voltage[lane]][dp->pre[lane]].tx_pre_emp;
-	phy_update_bits(hdptx, LANE_REG(lane, 0x0c14),
-			OVRD_LN_TX_DRV_PRE_LVL_CTRL | LN_TX_DRV_PRE_LVL_CTRL,
-			FIELD_PREP(OVRD_LN_TX_DRV_PRE_LVL_CTRL, 0x1) |
-			FIELD_PREP(LN_TX_DRV_PRE_LVL_CTRL, val));
+			FIELD_PREP(LN_TX_DRV_POST_LVL_CTRL,
+				   ctrl->tx_drv_post_lvl_ctrl));
+
+	phy_update_bits(hdptx, LANE_REG(lane, 0x0c18),
+			LN_ANA_TX_DRV_IDRV_IDN_CTRL |
+			LN_ANA_TX_DRV_IDRV_IUP_CTRL | LN_ANA_TX_DRV_ACCDRV_EN,
+			FIELD_PREP(LN_ANA_TX_DRV_IDRV_IDN_CTRL,
+				   ctrl->ana_tx_drv_idrv_idn_ctrl) |
+			FIELD_PREP(LN_ANA_TX_DRV_IDRV_IUP_CTRL,
+				   ctrl->ana_tx_drv_idrv_iup_ctrl) |
+			FIELD_PREP(LN_ANA_TX_DRV_ACCDRV_EN,
+				   ctrl->ana_tx_drv_accdrv_en));
 
 	phy_update_bits(hdptx, LANE_REG(lane, 0x0c1c),
 			LN_ANA_TX_DRV_ACCDRV_POL_SEL | LN_ANA_TX_DRV_ACCDRV_CTRL,
 			FIELD_PREP(LN_ANA_TX_DRV_ACCDRV_POL_SEL, 0x1) |
-			FIELD_PREP(LN_ANA_TX_DRV_ACCDRV_CTRL, 0x4));
+			FIELD_PREP(LN_ANA_TX_DRV_ACCDRV_CTRL,
+				   ctrl->ana_tx_drv_accdrv_ctrl));
 	phy_update_bits(hdptx, LANE_REG(lane, 0x0c6c), LN_ANA_TX_RESERVED,
 			FIELD_PREP(LN_ANA_TX_RESERVED, 0x1));
 	phy_update_bits(hdptx, LANE_REG(lane, 0x0c58),
@@ -553,9 +637,9 @@ static int rockchip_hdptx_phy_set_rate(struct rockchip_hdptx_phy *hdptx,
 				FIELD_PREP(OVRD_ROPLL_SSC_EN, 0x1) |
 				FIELD_PREP(ROPLL_SSC_EN, 0x1));
 		phy_update_bits(hdptx, 0x01d4, ANA_ROPLL_SSC_FM_DEVIATION,
-				FIELD_PREP(ANA_ROPLL_SSC_FM_DEVIATION, 0xe));
+				FIELD_PREP(ANA_ROPLL_SSC_FM_DEVIATION, 0xc));
 		phy_update_bits(hdptx, 0x01d8, ANA_ROPLL_SSC_FM_FREQ,
-				FIELD_PREP(ANA_ROPLL_SSC_FM_FREQ, 0x1a));
+				FIELD_PREP(ANA_ROPLL_SSC_FM_FREQ, 0x1f));
 		phy_update_bits(hdptx, 0x0264, SSC_EN, FIELD_PREP(SSC_EN, 0x2));
 	} else {
 		phy_update_bits(hdptx, 0x01d0, OVRD_ROPLL_SSC_EN | ROPLL_SSC_EN,
@@ -755,6 +839,11 @@ static int rockchip_hdptx_phy_dp_aux_init(struct rockchip_hdptx_phy *hdptx)
 	u32 status;
 	int ret;
 
+	phy_update_bits(hdptx, 0x0414, ANA_SB_TX_HLVL_PROG,
+			FIELD_PREP(ANA_SB_TX_HLVL_PROG, 0x7));
+	phy_update_bits(hdptx, 0x0418, ANA_SB_TX_LLVL_PROG,
+			FIELD_PREP(ANA_SB_TX_LLVL_PROG, 0x7));
+
 	phy_update_bits(hdptx, 0x044c, SB_RX_RCAL_OPT_CODE | SB_RX_RTERM_CTRL,
 			FIELD_PREP(SB_RX_RCAL_OPT_CODE, 0x1) |
 			FIELD_PREP(SB_RX_RTERM_CTRL, 0x3));
@@ -848,10 +937,22 @@ static int rockchip_hdptx_phy_dp_aux_init(struct rockchip_hdptx_phy *hdptx)
 
 static void rockchip_hdptx_phy_reset(struct rockchip_hdptx_phy *hdptx)
 {
+	u32 lane;
+
 	reset_assert(&hdptx->lane_reset);
 	reset_assert(&hdptx->cmn_reset);
 	reset_assert(&hdptx->init_reset);
 
+	reset_assert(&hdptx->apb_reset);
+	udelay(10);
+	reset_deassert(&hdptx->apb_reset);
+
+	for (lane = 0; lane < 4; lane++)
+		phy_update_bits(hdptx, LANE_REG(lane, 0x0c04),
+				OVRD_LN_TX_DRV_EI_EN | LN_TX_DRV_EI_EN,
+				FIELD_PREP(OVRD_LN_TX_DRV_EI_EN, 1) |
+				FIELD_PREP(LN_TX_DRV_EI_EN, 0));
+
 	grf_write(hdptx, HDPTXPHY_GRF_CON0, PLL_EN, FIELD_PREP(PLL_EN, 0));
 	grf_write(hdptx, HDPTXPHY_GRF_CON0, BIAS_EN, FIELD_PREP(BIAS_EN, 0));
 	grf_write(hdptx, HDPTXPHY_GRF_CON0, BGR_EN, FIELD_PREP(BGR_EN, 0));
@@ -865,10 +966,6 @@ static int rockchip_hdptx_phy_power_on(struct phy *phy)
 
 	rockchip_hdptx_phy_reset(hdptx);
 
-	reset_assert(&hdptx->apb_reset);
-	udelay(10);
-	reset_deassert(&hdptx->apb_reset);
-
 	for (lane = 0; lane < 4; lane++) {
 		u32 invert = hdptx->lane_polarity_invert[lane];
 

commit e3ca3c3805cc60cc9e2fe2a4d78694907b49ee46
Author: Jeffy Chen <jeffy.chen@rock-chips.com>
Date:   Fri Jan 7 15:22:54 2022 +0800

    tools: rkcommon: add px3se and correct spl size for rk3128
    
    The px3se and rk3128 have 8KB sram, bootrom reserved 2KB as stack.
    
    Change-Id: I8f3891380c312279c5692602927bfd00d19df26a
    Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>

diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index fe49fefca0..1c4e62083b 100644
--- a/tools/rkcommon.c
+++ b/tools/rkcommon.c
@@ -124,7 +124,8 @@ struct spl_info {
 static struct spl_info spl_infos[] = {
 	{ "rk3036", "RK30", 0x1000, false, RK_HEADER_V1 },
 	{ "rk3066", "RK30", 0x8000, true, RK_HEADER_V1 },
-	{ "rk3128", "RK31", 0x1800, false, RK_HEADER_V1 },
+	{ "rk3128", "RK31", 0x2000 - 0x800, false, RK_HEADER_V1 },
+	{ "px3se", "RK31", 0x2000 - 0x800, false, RK_HEADER_V1 },
 	{ "rk3188", "RK31", 0x8000 - 0x800, true, RK_HEADER_V1 },
 	{ "rk322x", "RK32", 0x8000 - 0x1000, false, RK_HEADER_V1 },
 	{ "rk3288", "RK32", 0x8000, false, RK_HEADER_V1 },

commit 3bbe0d2f9129303e9f36d3ddfa3485653e188ecd
Author: Jeffy Chen <jeffy.chen@rock-chips.com>
Date:   Fri Jan 7 15:22:54 2022 +0800

    tools: rkcommon: add rk3326 and correct spl size for px30
    
    The rk3326 and px30 have 16KB sram, bootrom reserved 4KB as stack.
    
    Change-Id: Id486b47af01205f628a601c6e75f12ee499b765b
    Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>

diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index c460a956ba..fe49fefca0 100644
--- a/tools/rkcommon.c
+++ b/tools/rkcommon.c
@@ -132,7 +132,8 @@ static struct spl_info spl_infos[] = {
 	{ "rk3328", "RK32", 0x8000 - 0x800, false, RK_HEADER_V1 },
 	{ "rk3368", "RK33", 0x8000 - 0x1000, false, RK_HEADER_V1 },
 	{ "rk3399", "RK33", 0x30000 - 0x2000, false, RK_HEADER_V1 },
-	{ "px30", "RK33", 0x2800, false, RK_HEADER_V1 },
+	{ "rk3326", "RK33", 0x4000 - 0x1000, false, RK_HEADER_V1 },
+	{ "px30", "RK33", 0x4000 - 0x1000, false, RK_HEADER_V1 },
 	{ "rv1108", "RK11", 0x1800, false, RK_HEADER_V1 },
 	{ "rv1126", "110B", 0x10000 - 0x1000, false, RK_HEADER_V1 },
 	{ "rk1808", "RK18", 0x200000 - 0x2000, false, RK_HEADER_V1 },

commit cbca032016b0cfad1527abbe05c3696c32834ba5
Author: Stefano Babic <sbabic@denx.de>
Date:   Wed Mar 13 09:46:45 2019 +0100

    Add target to generate initial environment
    
    The initial environment is linked to the u-boot binary. Modifying the
    environment from User Space with the env tools requires that the tools
    are always built together with the bootloader to be sure that they
    contain the initial environment in case no environment is stored into
    persistent storage or when a board boots with just the default
    environment. This makes difficult for distros to provide a general
    package to access the environment. A simpler way is if the tools are
    generic for all boards and a configuration file is given to provide the
    initial environment.
    
    The patch just generates the initial environment by extracting it from
    the compiled object. This file can then be used for tools in user space
    to initialize the environment.
    
    Signed-off-by: Stefano Babic <sbabic@denx.de>
    (cherry picked from commit bdaa73a5b3923257add182b4ab8058dbfa33421b)
    
    Change-Id: I0968346510f814a12cb357c40c7785473a7aabfc
    Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>

diff --git a/Makefile b/Makefile
index 85c1a8cf4b..15ec80612b 100644
--- a/Makefile
+++ b/Makefile
@@ -1700,6 +1700,13 @@ endif
 	$(build)=$(build-dir) $(@:.ko=.o)
 	$(Q)$(MAKE) -f $(srctree)/scripts/Makefile.modpost
 
+quiet_cmd_genenv = GENENV $@
+cmd_genenv = $(OBJCOPY) --dump-section .rodata.default_environment=$@ env/common.o; \
+	sed --in-place -e 's/\x00/\x0A/g' $@
+
+u-boot-initial-env: u-boot.bin
+	$(call if_changed,genenv)
+
 # FIXME Should go into a make.lib or something
 # ===========================================================================
 

commit 25dca6d04b4fbb4a0424c943a24de393294de2b2
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Sun Sep 3 08:17:46 2017 +0200

    scripts/Makefile.lib: remove overridden target $(obj)/helloworld.so:
    
    The target
    $(obj)/helloworld.so:
    exists twice in Makefile.lib.
    
    If you add an echo command to each of the two recipes you get
    warnings like:
    
    scripts/Makefile.lib:383: warning:
    overriding recipe for target 'drivers/power/battery/helloworld.so'
    scripts/Makefile.lib:379: warning:
    ignoring old recipe for target 'drivers/power/battery/helloworld.so'
    
    This patch removes the obsolete target.
    
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Signed-off-by: Alexander Graf <agraf@suse.de>
    (cherry picked from commit d6507e6fd9e0a6f1a8dd28c18cd320c1f861269e)
    
    Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
    Change-Id: I6b9557fab36be314c7fda3988db6c80e8e1e0e92

diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index a384b41898..eaf86593a3 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -392,8 +392,6 @@ cmd_efi_ld = $(LD) -nostdlib -znocombreloc -T $(EFI_LDS_PATH) -shared \
 
 EFI_LDS_PATH = $(srctree)/arch/$(ARCH)/lib/$(EFI_LDS)
 
-$(obj)/helloworld.so: $(EFI_LDS_PATH)
-
 $(obj)/helloworld.so: $(obj)/helloworld.o arch/$(ARCH)/lib/$(EFI_CRT0) \
 		arch/$(ARCH)/lib/$(EFI_RELOC)
 	$(call cmd,efi_ld)

commit cc9b5ddaecd28ad8e29a8d4cbeff51f749335dcf
Author: Stefan Agner <stefan.agner@toradex.com>
Date:   Tue Nov 14 15:47:18 2017 +0100

    envtools: make sure version/timestamp header file are available
    
    With commit 84d46e7e8948 ("tools: env: allow to print U-Boot version")
    the fw_env utilities need the version.h header file. Building only
    the envtools in a pristine build directory will fail due to missing
    header files.
    
    Make sure the header files are a dependency of the envtools target.
    
    Fixes: 84d46e7e8948 ("tools: env: allow to print U-Boot version")
    Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
    Tested-by: Peter Robinson <pbrobinson@gmail.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    (cherry picked from commit ded84f90a1066eef5f34daa4539273de64f7b811)
    
    Change-Id: I9b019f1e757271fe19f8ef789d41a849619d699b
    Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>

diff --git a/Makefile b/Makefile
index 458b4b6915..85c1a8cf4b 100644
--- a/Makefile
+++ b/Makefile
@@ -1483,7 +1483,7 @@ checkarmreloc: u-boot
 		false; \
 	fi
 
-envtools: scripts_basic
+envtools: scripts_basic $(version_h) $(timestamp_h)
 	$(Q)$(MAKE) $(build)=tools/env
 
 tools-only: scripts_basic $(version_h) $(timestamp_h)

commit ae9738187eb128c7f1469f72001e8973d9c125ca
Author: Jeffy Chen <jeffy.chen@rock-chips.com>
Date:   Tue Apr 2 13:51:25 2019 +0800

    rockchip: vendor: Fix maybe-uninitialized
    
    arch/arm/mach-rockchip/vendor.c:663:6  error: 'item_num' may be used uninitialized in this function [-Werror=maybe-uninitialized]
      ret = vendor_storage_write(id, buffer, size);
      ~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    
    Change-Id: I26ed18aa5596ef18dcd708ed9bca0a0611f78aef
    Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/vendor.c b/arch/arm/mach-rockchip/vendor.c
index 048cb982e6..56e6ba019b 100644
--- a/arch/arm/mach-rockchip/vendor.c
+++ b/arch/arm/mach-rockchip/vendor.c
@@ -794,6 +794,7 @@ int vendor_storage_test(void)
 	default:
 		item_num = 0;
 		total_size = 0;
+		size = 0;
 		break;
 	}
 	/* Invalid bootdev? */

commit 5b0eed31b03573fdf5c59237ed6f3061c8d06abc
Author: Suneel Garapati <sgarapati@marvell.com>
Date:   Thu Mar 25 17:07:36 2021 -0700

    drivers: ata: ahci: update max id if it is more than available ports
    
    After check for maximum between max id and available ports, also check
    if available port count is less than max id and update.
    
    In the case of the CN8030 OcteonTX SoC max_id needs to be reduced to
    the number of ports found otherwise the following occurs on a scan:
    
    GW6404-B> scsi scan
    scanning bus for devices...
    Target spinup took 0 ms.
    AHCI 0001.0300 32 slots 1 ports 6 Gbps 0x1 impl SATA mode
    flags: 64bit ncq ilck stag pm led clo only pmp fbss pio slum part ccc
    apst
      Device 0: (0:0) Vendor: ATA Prod.: SanDisk SD8SFAT0 Rev: Z233
                Type: Hard Disk
                Capacity: 61057.3 MB = 59.6 GB (125045424 x 512)
    "Synchronous Abort" handler, esr 0x96000006
    elr: 000000000052f824 lr : 000000000052fa10 (reloc)
    elr: 000000007fee9824 lr : 000000007fee9a10
    x0 : 0000000000000001 x1 : 0000000000000001
    x2 : 000000007bea3528 x3 : 000000007bea3580
    x4 : 0000000000000200 x5 : 0000000000000000
    x6 : 0000000000000002 x7 : 000000007bea3540
    x8 : 00000000fffffff8 x9 : 0000000000000008
    x10: 00000000000186a0 x11: 000000000000000d
    x12: 0000000000000006 x13: 000000000001869f
    x14: 0000000000000007 x15: 00000000ffffffff
    x16: 000000007ff439a5 x17: 000000007ff5730c
    x18: 000000007bea9de0 x19: 000000007ff7a580
    x20: 000000007bec79f8 x21: 0000000000000000
    x22: 000000007bea3580 x23: 0000000000000000
    x24: 0000000000000000 x25: 000000007bec7a00
    x26: 00000000ffffffc0 x27: 000000007bec79d0
    x28: 000000007beb51c0 x29: 000000007bea3480
    
    Code: 91246800 940130c2 12800000 1400004f (b9402ae0)
    Resetting CPU ...
    
    Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
    Reviewed-by: Stefan Roese <sr@denx.de>
    Change-Id: I569bcd0943d7e2f02adc0d98a5b75f0c73e08bac

diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index f047e0c4b5..ad952f8ddf 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -1189,6 +1189,9 @@ int ahci_probe_scsi(struct udevice *ahci_dev, ulong base)
 	 */
 	uc_plat->max_id = max_t(unsigned long, uc_priv->n_ports,
 				uc_plat->max_id);
+	/* If port count is less than max_id, update max_id */
+	if (uc_priv->n_ports < uc_plat->max_id)
+		uc_plat->max_id = uc_priv->n_ports;
 
 	return 0;
 }

commit dde42ec6a2c0d2cdb20ef366963a0b673bac9a94
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 21 09:07:39 2021 +0000

    configs: add rk3588-aarch32.config
    
    Build command: ./make.sh rk3588-aarch32
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I0e1f11dd9d5ac56bb1d0f8f423e4c9922ac3ccd7

diff --git a/configs/rk3588-aarch32.config b/configs/rk3588-aarch32.config
new file mode 100644
index 0000000000..4230dcb89d
--- /dev/null
+++ b/configs/rk3588-aarch32.config
@@ -0,0 +1,27 @@
+CONFIG_ARM64_BOOT_AARCH32=y
+# CONFIG_ARM64_SUPPORT_AARCH32 is not set
+# CONFIG_ARMV7_LPAE is not set
+CONFIG_BASE_DEFCONFIG="rk3588_defconfig"
+CONFIG_BOOTP_PXE_CLIENTARCH=0x15
+CONFIG_BOOTP_VCI_STRING="U-Boot.armv7"
+CONFIG_CPU_V7=y
+# CONFIG_DEBUG_LL is not set
+# CONFIG_GICV3 is not set
+CONFIG_HAS_THUMB2=y
+CONFIG_HAS_VBAR=y
+CONFIG_HAVE_PRIVATE_LIBGCC=y
+# CONFIG_PHYS_64BIT is not set
+# CONFIG_SPL_DM_SERIAL is not set
+# CONFIG_SPL_OF_LIBFDT is not set
+CONFIG_SPL_SYS_THUMB_BUILD=y
+CONFIG_SPL_USE_ARCH_MEMCPY=y
+CONFIG_SPL_USE_ARCH_MEMSET=y
+CONFIG_SYS_ARM_ARCH=7
+CONFIG_SYS_CPU="armv7"
+CONFIG_SYS_THUMB_BUILD=y
+# CONFIG_TPL_DM_SERIAL is not set
+CONFIG_TPL_USE_ARCH_MEMCPY=y
+CONFIG_TPL_USE_ARCH_MEMSET=y
+CONFIG_USE_ARCH_MEMCPY=y
+CONFIG_USE_ARCH_MEMSET=y
+CONFIG_USE_PRIVATE_LIBGCC=y

commit 412df3709fcd59c91afab0a3b7e88b1343ae6005
Author: Wang Jie <dave.wang@rock-chips.com>
Date:   Wed Jan 5 17:40:46 2022 +0800

    configs: rk3588: enable fusb302 and husb311
    
    Signed-off-by: Wang Jie <dave.wang@rock-chips.com>
    Change-Id: Ife1870a4966aa10681e9b38c0f41faae3000af2d

diff --git a/configs/rk3588_defconfig b/configs/rk3588_defconfig
index 1a7162d53e..1f503eab68 100644
--- a/configs/rk3588_defconfig
+++ b/configs/rk3588_defconfig
@@ -143,6 +143,11 @@ CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_SPI_RK8XX=y
+CONFIG_DM_POWER_DELIVERY=y
+CONFIG_TYPEC_TCPM=y
+CONFIG_TYPEC_TCPCI=y
+CONFIG_TYPEC_HUSB311=y
+CONFIG_TYPEC_FUSB302=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y

commit eef83f7d36420a3483818799984e623cb1ee944d
Author: Wang Jie <dave.wang@rock-chips.com>
Date:   Thu Jan 6 17:00:12 2022 +0800

    dm: add power delivery uclass
    
    Signed-off-by: Wang Jie <dave.wang@rock-chips.com>
    Change-Id: I49611878c74990f9571dc847f9b4124b0e3a4726

diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index a192a71044..b4c0c645c8 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -112,6 +112,7 @@ enum uclass_id {
 	UCLASS_EINK_DISPLAY,	/* EINK screen display driver */
 	UCLASS_RNG,		/* Random Number Generator */
 	UCLASS_DMC,		/* Dynamic Memory Interface */
+	UCLASS_PD,		/* power delivery */
 	UCLASS_COUNT,
 	UCLASS_INVALID = -1,
 };

commit a2c816168781679673113f0036de72b906b415b6
Author: Wang Jie <dave.wang@rock-chips.com>
Date:   Wed Jan 5 10:44:44 2022 +0800

    drivers: power: add pd chip driver
    
    This temporary patch is to solve the problem that the rk3588s
    tablet can be turned on when the battery is out of power.
    This Type-C PD driver only supports PD fast charging function,
    compatible with PD fusb302 and husb311 chip. If DFP/UFP detection
    and dp altmode functions are added later, we will revert this patch.
    
    Signed-off-by: Wang Jie <dave.wang@rock-chips.com>
    Change-Id: Ic3411725ef6d9bcc4ca48b272ef67c4c9975077f

diff --git a/drivers/Makefile b/drivers/Makefile
index cccc60a049..a46f59ae76 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -90,6 +90,7 @@ obj-$(CONFIG_NVME) += nvme/
 obj-$(CONFIG_RKNAND) += rknand/
 obj-$(CONFIG_RKFLASH) += rkflash/
 obj-y += pcmcia/
+obj-$(CONFIG_DM_POWER_DELIVERY) += power/power_delivery/
 obj-y += dfu/
 obj-$(CONFIG_X86) += pch/
 obj-y += phy/marvell/
diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index a57d9c8934..8aacb5be89 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -8,6 +8,8 @@ source "drivers/power/io-domain/Kconfig"
 
 source "drivers/power/pmic/Kconfig"
 
+source "drivers/power/power_delivery/Kconfig"
+
 source "drivers/power/regulator/Kconfig"
 
 source "drivers/power/dvfs/Kconfig"
diff --git a/drivers/power/power_delivery/Kconfig b/drivers/power/power_delivery/Kconfig
new file mode 100644
index 0000000000..b320c92d69
--- /dev/null
+++ b/drivers/power/power_delivery/Kconfig
@@ -0,0 +1,40 @@
+# SPDX-License-Identifier: GPL-2.0
+
+config DM_POWER_DELIVERY
+	bool "Enable driver model power delivery support"
+	depends on DM
+	help
+	  This adds a simple uclass for power delivery.
+
+config TYPEC_TCPM
+	tristate "USB Type-C Port Controller Manager"
+	depends on DM && DM_POWER_DELIVERY
+	help
+	  The Type-C Port Controller Manager provides a USB PD and USB Type-C
+	  state machine for use with Type-C Port Controllers.
+
+config TYPEC_TCPCI
+	tristate "Type-C Port Controller Interface driver"
+	depends on DM && DM_POWER_DELIVERY && DM_I2C
+	help
+	  Type-C Port Controller driver for TCPCI-compliant controller.
+
+if TYPEC_TCPCI
+
+config TYPEC_HUSB311
+	tristate "Hynetek HUSB311 Type-C chip driver"
+	depends on DM && DM_POWER_DELIVERY && DM_I2C
+	help
+	  Hynetek HUSB311 Type-C chip driver that works with
+	  Type-C Port Controller Manager to provide USB PD and USB
+	  Type-C functionalities.
+
+endif # TYPEC_TCPCI
+
+config TYPEC_FUSB302
+	tristate "Fairchild FUSB302 Type-C chip driver"
+	depends on DM && DM_POWER_DELIVERY && DM_I2C
+	help
+	  The Fairchild FUSB302 Type-C chip driver that works with
+	  Type-C Port Controller Manager to provide USB PD and USB
+	  Type-C functionalities.
diff --git a/drivers/power/power_delivery/Makefile b/drivers/power/power_delivery/Makefile
new file mode 100644
index 0000000000..8a065e610a
--- /dev/null
+++ b/drivers/power/power_delivery/Makefile
@@ -0,0 +1,7 @@
+# SPDX-License-Identifier: GPL-2.0
+
+obj-$(CONFIG_$(SPL_)DM_POWER_DELIVERY) += power_delivery_uclass.o
+obj-$(CONFIG_TYPEC_TCPM) += tcpm.o
+obj-$(CONFIG_TYPEC_FUSB302) += fusb302.o
+obj-$(CONFIG_TYPEC_TCPCI) += tcpci.o
+obj-$(CONFIG_TYPEC_HUSB311) += tcpci_husb311.o
diff --git a/drivers/power/power_delivery/fusb302.c b/drivers/power/power_delivery/fusb302.c
new file mode 100644
index 0000000000..395455d06b
--- /dev/null
+++ b/drivers/power/power_delivery/fusb302.c
@@ -0,0 +1,1531 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2016-2017 Google, Inc
+ *
+ * Fairchild FUSB302 Type-C Chip Driver
+ */
+
+#include <dm.h>
+#include <i2c.h>
+#include <asm/gpio.h>
+#include <power/power_delivery/tcpm.h>
+#include <power/power_delivery/power_delivery.h>
+#include "fusb302_reg.h"
+
+/*
+ * When the device is SNK, BC_LVL interrupt is used to monitor cc pins
+ * for the current capability offered by the SRC. As FUSB302 chip fires
+ * the BC_LVL interrupt on PD signalings, cc lvl should be handled after
+ * a delay to avoid measuring on PD activities. The delay is slightly
+ * longer than PD_T_PD_DEBPUNCE (10-20ms).
+ */
+#define T_BC_LVL_DEBOUNCE_DELAY_MS 30
+#define msleep(a)	udelay(a * 1000)
+#define usleep_range(a, b) udelay((b))
+
+enum toggling_mode {
+	TOGGLING_MODE_OFF,
+	TOGGLING_MODE_DRP,
+	TOGGLING_MODE_SNK,
+	TOGGLING_MODE_SRC,
+};
+
+enum src_current_status {
+	SRC_CURRENT_DEFAULT,
+	SRC_CURRENT_MEDIUM,
+	SRC_CURRENT_HIGH,
+};
+
+static const u8 ra_mda_value[] = {
+	[SRC_CURRENT_DEFAULT] = 4,	/* 210mV */
+	[SRC_CURRENT_MEDIUM] = 9,	/* 420mV */
+	[SRC_CURRENT_HIGH] = 18,	/* 798mV */
+};
+
+static const u8 rd_mda_value[] = {
+	[SRC_CURRENT_DEFAULT] = 38,	/* 1638mV */
+	[SRC_CURRENT_MEDIUM] = 38,	/* 1638mV */
+	[SRC_CURRENT_HIGH] = 61,	/* 2604mV */
+};
+
+#define LOG_BUFFER_ENTRIES	1024
+#define LOG_BUFFER_ENTRY_SIZE	128
+
+struct fusb302_chip {
+	struct udevice *udev;
+	struct udevice *vbus_regulator;
+	struct ofnode *child_node;
+	struct tcpm_port *tcpm_port;
+	struct tcpc_dev tcpc_dev;
+	struct gpio_desc gpio_cc_int;
+
+	int irq;
+
+	enum toggling_mode toggling_mode;
+	enum src_current_status src_current_status;
+	bool intr_togdone;
+	bool intr_bc_lvl;
+	bool intr_comp_chng;
+
+	/* port status */
+	bool vconn_on;
+	bool vbus_on;
+	bool charge_on;
+	bool vbus_present;
+	bool gpio_cc_int_present;
+	enum typec_cc_polarity cc_polarity;
+	enum typec_cc_status cc1;
+	enum typec_cc_status cc2;
+};
+
+static int fusb302_i2c_write(struct fusb302_chip *chip,
+			     u8 address, u8 data)
+{
+	int ret = 0;
+
+	ret = dm_i2c_write(chip->udev, address, &data, 1);
+	if (ret)
+		printf("%s: cannot write 0x%02x to 0x%02x, ret=%d\n",
+			__func__, data, address, ret);
+
+	return ret;
+}
+
+static int fusb302_i2c_block_write(struct fusb302_chip *chip, u8 address,
+				   u8 length, const u8 *data)
+{
+	int ret = 0;
+
+	if (length <= 0)
+		return ret;
+
+	ret = dm_i2c_write(chip->udev, address, data, length);
+	if (ret)
+		printf("%s: cannot block write 0x%02x, len=%d, ret=%d\n",
+			__func__, address, length, ret);
+
+	return ret;
+}
+
+static int fusb302_i2c_read(struct fusb302_chip *chip,
+			    u8 address, u8 *data)
+{
+	int ret = 0;
+
+	ret = dm_i2c_read(chip->udev, address, data, 1);
+	if (ret)
+		printf("%s: cannot read %02x, ret=%d\n",
+			__func__, address, ret);
+
+	return ret;
+}
+
+static int fusb302_i2c_block_read(struct fusb302_chip *chip, u8 address,
+				  u8 length, u8 *data)
+{
+	int ret = 0;
+
+	if (length <= 0)
+		return ret;
+
+	ret = dm_i2c_read(chip->udev, address, data, length);
+	if (ret)
+		printf("%s: cannot block read 0x%02x, len=%d, ret=%d\n",
+			__func__, address, length, ret);
+	return ret;
+}
+
+static int fusb302_i2c_mask_write(struct fusb302_chip *chip, u8 address,
+				  u8 mask, u8 value)
+{
+	int ret = 0;
+	u8 data;
+
+	ret = fusb302_i2c_read(chip, address, &data);
+	if (ret)
+		return ret;
+	data &= ~mask;
+	data |= value;
+	ret = fusb302_i2c_write(chip, address, data);
+	if (ret)
+		return ret;
+
+	return ret;
+}
+
+static int fusb302_i2c_set_bits(struct fusb302_chip *chip, u8 address,
+				u8 set_bits)
+{
+	return fusb302_i2c_mask_write(chip, address, 0x00, set_bits);
+}
+
+static int fusb302_i2c_clear_bits(struct fusb302_chip *chip, u8 address,
+				  u8 clear_bits)
+{
+	return fusb302_i2c_mask_write(chip, address, clear_bits, 0x00);
+}
+
+static int fusb302_sw_reset(struct fusb302_chip *chip)
+{
+	int ret = 0;
+
+	ret = fusb302_i2c_write(chip, FUSB_REG_RESET,
+				FUSB_REG_RESET_SW_RESET);
+	if (ret)
+		printf("cannot sw reset the fusb302(%d)\n", ret);
+	else
+		debug("fusb302 sw reset finished\n");
+
+	return ret;
+}
+
+static int fusb302_enable_tx_auto_retries(struct fusb302_chip *chip, u8 retry_count)
+{
+	int ret = 0;
+
+	ret = fusb302_i2c_set_bits(chip, FUSB_REG_CONTROL3, retry_count |
+				   FUSB_REG_CONTROL3_AUTO_RETRY);
+
+	return ret;
+}
+
+/*
+ * mask all interrupt on the chip
+ */
+static int fusb302_mask_interrupt(struct fusb302_chip *chip)
+{
+	int ret = 0;
+
+	ret = fusb302_i2c_write(chip, FUSB_REG_MASK, 0xFF);
+	if (ret)
+		return ret;
+	ret = fusb302_i2c_write(chip, FUSB_REG_MASKA, 0xFF);
+	if (ret)
+		return ret;
+	ret = fusb302_i2c_write(chip, FUSB_REG_MASKB, 0xFF);
+	if (ret)
+		return ret;
+	ret = fusb302_i2c_set_bits(chip, FUSB_REG_CONTROL0,
+				   FUSB_REG_CONTROL0_INT_MASK);
+		return ret;
+}
+
+/*
+ * initialize interrupt on the chip
+ * - unmasked interrupt: VBUS_OK
+ */
+static int fusb302_init_interrupt(struct fusb302_chip *chip)
+{
+	int ret = 0;
+
+	ret = fusb302_i2c_write(chip, FUSB_REG_MASK,
+				0xFF & ~FUSB_REG_MASK_VBUSOK);
+	if (ret)
+		return ret;
+	ret = fusb302_i2c_write(chip, FUSB_REG_MASKA, 0xFF);
+	if (ret)
+		return ret;
+	ret = fusb302_i2c_write(chip, FUSB_REG_MASKB, 0xFF);
+	if (ret)
+		return ret;
+	ret = fusb302_i2c_clear_bits(chip, FUSB_REG_CONTROL0,
+				     FUSB_REG_CONTROL0_INT_MASK);
+	return ret;
+}
+
+static int fusb302_set_power_mode(struct fusb302_chip *chip, u8 power_mode)
+{
+	int ret = 0;
+
+	ret = fusb302_i2c_write(chip, FUSB_REG_POWER, power_mode);
+
+	return ret;
+}
+
+static int tcpm_init(struct tcpc_dev *dev)
+{
+	struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
+						 tcpc_dev);
+	int ret = 0;
+	u8 data;
+
+	ret = fusb302_sw_reset(chip);
+	if (ret)
+		return ret;
+	ret = fusb302_enable_tx_auto_retries(chip, FUSB_REG_CONTROL3_N_RETRIES_3);
+	if (ret)
+		return ret;
+	ret = fusb302_init_interrupt(chip);
+	if (ret)
+		return ret;
+	ret = fusb302_set_power_mode(chip, FUSB_REG_POWER_PWR_ALL);
+	if (ret)
+		return ret;
+	ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &data);
+	if (ret)
+		return ret;
+	chip->vbus_present = !!(data & FUSB_REG_STATUS0_VBUSOK);
+	ret = fusb302_i2c_read(chip, FUSB_REG_DEVICE_ID, &data);
+	if (ret)
+		return ret;
+	printf("fusb302 device ID: 0x%02x\n", data);
+
+	return ret;
+}
+
+static int tcpm_get_vbus(struct tcpc_dev *dev)
+{
+	struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
+						 tcpc_dev);
+	return chip->vbus_present ? 1 : 0;
+}
+
+#if 0
+static int tcpm_get_current_limit(struct tcpc_dev *dev)
+{
+
+	struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
+						 tcpc_dev);
+	int current_limit = 0;
+	unsigned long timeout;
+
+	if (!chip->extcon)
+		return 0;
+
+	/*
+	 * USB2 Charger detection may still be in progress when we get here,
+	 * this can take upto 600ms, wait 800ms max.
+	 */
+	timeout = jiffies + msecs_to_jiffies(800);
+	do {
+		if (extcon_get_state(chip->extcon, EXTCON_CHG_USB_SDP) == 1)
+			current_limit = 500;
+
+		if (extcon_get_state(chip->extcon, EXTCON_CHG_USB_CDP) == 1 ||
+		    extcon_get_state(chip->extcon, EXTCON_CHG_USB_ACA) == 1)
+			current_limit = 1500;
+
+		if (extcon_get_state(chip->extcon, EXTCON_CHG_USB_DCP) == 1)
+			current_limit = 2000;
+
+		msleep(50);
+	} while (current_limit == 0 && time_before(jiffies, timeout));
+
+	return current_limit;
+}
+#endif
+
+static int fusb302_set_src_current(struct fusb302_chip *chip,
+				   enum src_current_status status)
+{
+	int ret = 0;
+
+	chip->src_current_status = status;
+	switch (status) {
+	case SRC_CURRENT_DEFAULT:
+		ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL0,
+					     FUSB_REG_CONTROL0_HOST_CUR_MASK,
+					     FUSB_REG_CONTROL0_HOST_CUR_DEF);
+		break;
+	case SRC_CURRENT_MEDIUM:
+		ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL0,
+					     FUSB_REG_CONTROL0_HOST_CUR_MASK,
+					     FUSB_REG_CONTROL0_HOST_CUR_MED);
+		break;
+	case SRC_CURRENT_HIGH:
+		ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL0,
+					     FUSB_REG_CONTROL0_HOST_CUR_MASK,
+					     FUSB_REG_CONTROL0_HOST_CUR_HIGH);
+		break;
+	default:
+		break;
+	}
+
+	return ret;
+}
+
+static int fusb302_set_toggling(struct fusb302_chip *chip,
+				enum toggling_mode mode)
+{
+	int ret = 0;
+
+	/* first disable toggling */
+	ret = fusb302_i2c_clear_bits(chip, FUSB_REG_CONTROL2,
+				     FUSB_REG_CONTROL2_TOGGLE);
+	if (ret)
+		return ret;
+	/* mask interrupts for SRC or SNK */
+	ret = fusb302_i2c_set_bits(chip, FUSB_REG_MASK,
+				   FUSB_REG_MASK_BC_LVL |
+				   FUSB_REG_MASK_COMP_CHNG);
+	if (ret)
+		return ret;
+	chip->intr_bc_lvl = false;
+	chip->intr_comp_chng = false;
+	/* configure toggling mode: none/snk/src/drp */
+	switch (mode) {
+	case TOGGLING_MODE_OFF:
+		ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL2,
+					     FUSB_REG_CONTROL2_MODE_MASK,
+					     FUSB_REG_CONTROL2_MODE_NONE);
+		break;
+	case TOGGLING_MODE_SNK:
+		ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL2,
+					     FUSB_REG_CONTROL2_MODE_MASK,
+					     FUSB_REG_CONTROL2_MODE_UFP);
+		break;
+	case TOGGLING_MODE_SRC:
+		ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL2,
+					     FUSB_REG_CONTROL2_MODE_MASK,
+					     FUSB_REG_CONTROL2_MODE_DFP);
+		break;
+	case TOGGLING_MODE_DRP:
+		ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL2,
+					     FUSB_REG_CONTROL2_MODE_MASK,
+					     FUSB_REG_CONTROL2_MODE_DRP);
+		break;
+	default:
+		break;
+	}
+
+	if (ret)
+		return ret;
+
+	if (mode == TOGGLING_MODE_OFF) {
+		/* mask TOGDONE interrupt */
+		ret = fusb302_i2c_set_bits(chip, FUSB_REG_MASKA,
+					   FUSB_REG_MASKA_TOGDONE);
+		if (ret)
+			return ret;
+		chip->intr_togdone = false;
+	} else {
+		/* Datasheet says vconn MUST be off when toggling */
+		if (chip->vconn_on)
+			printf("%s: Vconn is on during toggle start\n", __func__);
+		/* unmask TOGDONE interrupt */
+		ret = fusb302_i2c_clear_bits(chip, FUSB_REG_MASKA,
+					     FUSB_REG_MASKA_TOGDONE);
+		if (ret)
+			return ret;
+		chip->intr_togdone = true;
+		/* start toggling */
+		ret = fusb302_i2c_set_bits(chip, FUSB_REG_CONTROL2,
+					   FUSB_REG_CONTROL2_TOGGLE);
+		if (ret)
+			return ret;
+		/* during toggling, consider cc as Open */
+		chip->cc1 = TYPEC_CC_OPEN;
+		chip->cc2 = TYPEC_CC_OPEN;
+	}
+	chip->toggling_mode = mode;
+
+	return ret;
+}
+
+static const char * const typec_cc_status_name[] = {
+	[TYPEC_CC_OPEN]		= "Open",
+	[TYPEC_CC_RA]		= "Ra",
+	[TYPEC_CC_RD]		= "Rd",
+	[TYPEC_CC_RP_DEF]	= "Rp-def",
+	[TYPEC_CC_RP_1_5]	= "Rp-1.5",
+	[TYPEC_CC_RP_3_0]	= "Rp-3.0",
+};
+
+static const enum src_current_status cc_src_current[] = {
+	[TYPEC_CC_OPEN]		= SRC_CURRENT_DEFAULT,
+	[TYPEC_CC_RA]		= SRC_CURRENT_DEFAULT,
+	[TYPEC_CC_RD]		= SRC_CURRENT_DEFAULT,
+	[TYPEC_CC_RP_DEF]	= SRC_CURRENT_DEFAULT,
+	[TYPEC_CC_RP_1_5]	= SRC_CURRENT_MEDIUM,
+	[TYPEC_CC_RP_3_0]	= SRC_CURRENT_HIGH,
+};
+
+static int tcpm_set_cc(struct tcpc_dev *dev, enum typec_cc_status cc)
+{
+	struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
+						 tcpc_dev);
+	u8 switches0_mask = FUSB_REG_SWITCHES0_CC1_PU_EN |
+			    FUSB_REG_SWITCHES0_CC2_PU_EN |
+			    FUSB_REG_SWITCHES0_CC1_PD_EN |
+			    FUSB_REG_SWITCHES0_CC2_PD_EN;
+	u8 rd_mda, switches0_data = 0x00;
+	int ret = 0;
+
+	switch (cc) {
+	case TYPEC_CC_OPEN:
+		break;
+	case TYPEC_CC_RD:
+		switches0_data |= FUSB_REG_SWITCHES0_CC1_PD_EN |
+				  FUSB_REG_SWITCHES0_CC2_PD_EN;
+		break;
+	case TYPEC_CC_RP_DEF:
+	case TYPEC_CC_RP_1_5:
+	case TYPEC_CC_RP_3_0:
+		switches0_data |= (chip->cc_polarity == TYPEC_POLARITY_CC1) ?
+				  FUSB_REG_SWITCHES0_CC1_PU_EN :
+				  FUSB_REG_SWITCHES0_CC2_PU_EN;
+		break;
+	default:
+		printf("%s: unsupported cc value %s\n",
+			__func__, typec_cc_status_name[cc]);
+		ret = -EINVAL;
+		goto done;
+	}
+
+	ret = fusb302_set_toggling(chip, TOGGLING_MODE_OFF);
+	if (ret) {
+		printf("%s: cannot set toggling mode(%d)\n", __func__, ret);
+		goto done;
+	}
+
+	ret = fusb302_i2c_mask_write(chip, FUSB_REG_SWITCHES0,
+				     switches0_mask, switches0_data);
+	if (ret) {
+		printf("%s: cannot set pull-up/-down(%d)\n", __func__, ret);
+		goto done;
+	}
+	/* reset the cc status */
+	chip->cc1 = TYPEC_CC_OPEN;
+	chip->cc2 = TYPEC_CC_OPEN;
+
+	/* adjust current for SRC */
+	ret = fusb302_set_src_current(chip, cc_src_current[cc]);
+	if (ret) {
+		printf("%s: cannot set src current %s(%d)\n",
+			__func__, typec_cc_status_name[cc], ret);
+		goto done;
+	}
+
+	/* enable/disable interrupts, BC_LVL for SNK and COMP_CHNG for SRC */
+	switch (cc) {
+	case TYPEC_CC_RP_DEF:
+	case TYPEC_CC_RP_1_5:
+	case TYPEC_CC_RP_3_0:
+		rd_mda = rd_mda_value[cc_src_current[cc]];
+		ret = fusb302_i2c_write(chip, FUSB_REG_MEASURE, rd_mda);
+		if (ret) {
+			printf("%s: cannot set SRC measure value(%d)\n",
+				__func__, ret);
+			goto done;
+		}
+		ret = fusb302_i2c_mask_write(chip, FUSB_REG_MASK,
+					     FUSB_REG_MASK_BC_LVL |
+					     FUSB_REG_MASK_COMP_CHNG,
+					     FUSB_REG_MASK_BC_LVL);
+		if (ret) {
+			printf("%s: cannot set SRC interrupt(%d)\n",
+				__func__, ret);
+			goto done;
+		}
+		chip->intr_comp_chng = true;
+		break;
+	case TYPEC_CC_RD:
+		ret = fusb302_i2c_mask_write(chip, FUSB_REG_MASK,
+					     FUSB_REG_MASK_BC_LVL |
+					     FUSB_REG_MASK_COMP_CHNG,
+					     FUSB_REG_MASK_COMP_CHNG);
+		if (ret) {
+			printf("%s: cannot set SRC interrupt(%d)\n",
+				__func__, ret);
+			goto done;
+		}
+		chip->intr_bc_lvl = true;
+		break;
+	default:
+		break;
+	}
+done:
+	return ret;
+}
+
+static int tcpm_get_cc(struct tcpc_dev *dev, enum typec_cc_status *cc1,
+		       enum typec_cc_status *cc2)
+{
+	struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
+						 tcpc_dev);
+
+	*cc1 = chip->cc1;
+	*cc2 = chip->cc2;
+	debug("get cc1 = %s, cc2 = %s\n", typec_cc_status_name[*cc1],
+	       typec_cc_status_name[*cc2]);
+
+	return 0;
+}
+
+static int tcpm_set_polarity(struct tcpc_dev *dev,
+			     enum typec_cc_polarity polarity)
+{
+	return 0;
+}
+
+static int tcpm_set_vconn(struct tcpc_dev *dev, bool on)
+{
+	struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
+						 tcpc_dev);
+	int ret = 0;
+	u8 switches0_data = 0x00;
+	u8 switches0_mask = FUSB_REG_SWITCHES0_VCONN_CC1 |
+			    FUSB_REG_SWITCHES0_VCONN_CC2;
+
+	if (chip->vconn_on == on) {
+		printf("vconn is already %s\n", on ? "On" : "Off");
+		goto done;
+	}
+	if (on) {
+		switches0_data = (chip->cc_polarity == TYPEC_POLARITY_CC1) ?
+				 FUSB_REG_SWITCHES0_VCONN_CC2 :
+				 FUSB_REG_SWITCHES0_VCONN_CC1;
+	}
+	ret = fusb302_i2c_mask_write(chip, FUSB_REG_SWITCHES0,
+				     switches0_mask, switches0_data);
+	if (ret)
+		goto done;
+	debug("%s: vconn := %s\n", __func__, on ? "On" : "Off");
+done:
+	return ret;
+}
+
+static int tcpm_set_vbus(struct tcpc_dev *dev, bool on, bool charge)
+{
+#if 0
+	struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
+						 tcpc_dev);
+	int ret = 0;
+
+	mutex_lock(&chip->lock);
+	if (chip->vbus_on == on) {
+		printf("%s: vbus is already %s\n", __func__, on ? "On" : "Off");
+	} else {
+		if (on)
+			ret = regulator_enable(chip->vbus);
+		else
+			ret = regulator_disable(chip->vbus);
+		if (ret < 0) {
+			printf("%s: cannot %s vbus regulator(%d)\n",
+				__func__, on ? "enable" : "disable", ret);
+			goto done;
+		}
+		chip->vbus_on = on;
+		debug("%s: vbus := %s\n", __func__, on ? "On" : "Off");
+	}
+	if (chip->charge_on == charge)
+		debug("%s: charge is already %s\n",
+			__func__, charge ? "On" : "Off");
+	else
+		chip->charge_on = charge;
+
+done:
+	mutex_unlock(&chip->lock);
+#endif
+
+	return 0;
+}
+
+static int fusb302_pd_tx_flush(struct fusb302_chip *chip)
+{
+	return fusb302_i2c_set_bits(chip, FUSB_REG_CONTROL0,
+				    FUSB_REG_CONTROL0_TX_FLUSH);
+}
+
+static int fusb302_pd_rx_flush(struct fusb302_chip *chip)
+{
+	return fusb302_i2c_set_bits(chip, FUSB_REG_CONTROL1,
+				    FUSB_REG_CONTROL1_RX_FLUSH);
+}
+
+static int fusb302_pd_set_auto_goodcrc(struct fusb302_chip *chip, bool on)
+{
+	if (on)
+		return fusb302_i2c_set_bits(chip, FUSB_REG_SWITCHES1,
+					    FUSB_REG_SWITCHES1_AUTO_GCRC);
+	return fusb302_i2c_clear_bits(chip, FUSB_REG_SWITCHES1,
+					    FUSB_REG_SWITCHES1_AUTO_GCRC);
+}
+
+static int fusb302_pd_set_interrupts(struct fusb302_chip *chip, bool on)
+{
+	int ret = 0;
+	u8 mask_interrupts = FUSB_REG_MASK_COLLISION;
+	u8 maska_interrupts = FUSB_REG_MASKA_RETRYFAIL |
+			      FUSB_REG_MASKA_HARDSENT |
+			      FUSB_REG_MASKA_TX_SUCCESS |
+			      FUSB_REG_MASKA_HARDRESET;
+	u8 maskb_interrupts = FUSB_REG_MASKB_GCRCSENT;
+
+	ret = on ?
+		fusb302_i2c_clear_bits(chip, FUSB_REG_MASK, mask_interrupts) :
+		fusb302_i2c_set_bits(chip, FUSB_REG_MASK, mask_interrupts);
+	if (ret)
+		return ret;
+	ret = on ?
+		fusb302_i2c_clear_bits(chip, FUSB_REG_MASKA, maska_interrupts) :
+		fusb302_i2c_set_bits(chip, FUSB_REG_MASKA, maska_interrupts);
+	if (ret)
+		return ret;
+	ret = on ?
+		fusb302_i2c_clear_bits(chip, FUSB_REG_MASKB, maskb_interrupts) :
+		fusb302_i2c_set_bits(chip, FUSB_REG_MASKB, maskb_interrupts);
+	return ret;
+}
+
+static int tcpm_set_pd_rx(struct tcpc_dev *dev, bool on)
+{
+	struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
+						 tcpc_dev);
+	int ret = 0;
+
+	ret = fusb302_pd_rx_flush(chip);
+	if (ret) {
+		printf("%s: cannot flush pd rx buffer(%d)\n", __func__, ret);
+		goto done;
+	}
+	ret = fusb302_pd_tx_flush(chip);
+	if (ret) {
+		printf("%s: cannot flush pd tx buffer(%d)\n", __func__, ret);
+		goto done;
+	}
+	ret = fusb302_pd_set_auto_goodcrc(chip, on);
+	if (ret) {
+		printf("%s: cannot turn %s auto GCRC(%d)\n",
+			__func__, on ? "on" : "off", ret);
+		goto done;
+	}
+	ret = fusb302_pd_set_interrupts(chip, on);
+	if (ret) {
+		printf("%s: cannot turn %s pd interrupts(%d)\n",
+			__func__, on ? "on" : "off", ret);
+		goto done;
+	}
+	debug("%s: pd := %s\n", __func__, on ? "on" : "off");
+done:
+	return ret;
+}
+
+static const char * const typec_role_name[] = {
+	[TYPEC_SINK]		= "Sink",
+	[TYPEC_SOURCE]		= "Source",
+};
+
+static const char * const typec_data_role_name[] = {
+	[TYPEC_DEVICE]		= "Device",
+	[TYPEC_HOST]		= "Host",
+};
+
+static int tcpm_set_roles(struct tcpc_dev *dev, bool attached,
+			  enum typec_role pwr, enum typec_data_role data)
+{
+	struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
+						 tcpc_dev);
+	int ret = 0;
+	u8 switches1_mask = FUSB_REG_SWITCHES1_POWERROLE |
+			    FUSB_REG_SWITCHES1_DATAROLE;
+	u8 switches1_data = 0x00;
+
+	if (pwr == TYPEC_SOURCE)
+		switches1_data |= FUSB_REG_SWITCHES1_POWERROLE;
+	if (data == TYPEC_HOST)
+		switches1_data |= FUSB_REG_SWITCHES1_DATAROLE;
+	ret = fusb302_i2c_mask_write(chip, FUSB_REG_SWITCHES1,
+				     switches1_mask, switches1_data);
+	if (ret) {
+		printf("unable to set pd header %s, %s, ret= %d\n",
+			typec_role_name[pwr], typec_data_role_name[data], ret);
+		goto done;
+	}
+	debug("%s: pd header : %s, %s\n", __func__, typec_role_name[pwr],
+		typec_data_role_name[data]);
+done:
+
+	return ret;
+}
+
+static int tcpm_start_toggling(struct tcpc_dev *dev,
+			       enum typec_port_type port_type,
+			       enum typec_cc_status cc)
+{
+	struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
+						 tcpc_dev);
+	enum toggling_mode mode = TOGGLING_MODE_OFF;
+	int ret = 0;
+
+	switch (port_type) {
+	case TYPEC_PORT_SRC:
+		mode = TOGGLING_MODE_SRC;
+		break;
+	case TYPEC_PORT_SNK:
+		mode = TOGGLING_MODE_SNK;
+		break;
+	case TYPEC_PORT_DRP:
+		mode = TOGGLING_MODE_DRP;
+		break;
+	}
+
+	ret = fusb302_set_src_current(chip, cc_src_current[cc]);
+	if (ret) {
+		printf("%s: unable to set src current %s, ret=%d",
+			__func__, typec_cc_status_name[cc], ret);
+		goto done;
+	}
+	ret = fusb302_set_toggling(chip, mode);
+	if (ret) {
+		printf("%s: unable to start drp toggling(%d)\n", __func__, ret);
+		goto done;
+	}
+	printf("fusb302 start drp toggling\n");
+done:
+
+	return ret;
+}
+
+static int fusb302_pd_send_message(struct fusb302_chip *chip,
+				   const struct pd_message *msg)
+{
+	int ret = 0;
+	u8 buf[40];
+	u8 pos = 0;
+	int len;
+
+	/* SOP tokens */
+	buf[pos++] = FUSB302_TKN_SYNC1;
+	buf[pos++] = FUSB302_TKN_SYNC1;
+	buf[pos++] = FUSB302_TKN_SYNC1;
+	buf[pos++] = FUSB302_TKN_SYNC2;
+
+	len = pd_header_cnt_le(msg->header) * 4;
+	/* plug 2 for header */
+	len += 2;
+	if (len > 0x1F) {
+		printf("PD message too long %d (incl. header)", len);
+		return -EINVAL;
+	}
+	/* packsym tells the FUSB302 chip that the next X bytes are payload */
+	buf[pos++] = FUSB302_TKN_PACKSYM | (len & 0x1F);
+	memcpy(&buf[pos], &msg->header, sizeof(msg->header));
+	pos += sizeof(msg->header);
+
+	len -= 2;
+	memcpy(&buf[pos], msg->payload, len);
+	pos += len;
+
+	/* CRC */
+	buf[pos++] = FUSB302_TKN_JAMCRC;
+	/* EOP */
+	buf[pos++] = FUSB302_TKN_EOP;
+	/* turn tx off after sending message */
+	buf[pos++] = FUSB302_TKN_TXOFF;
+	/* start transmission */
+	buf[pos++] = FUSB302_TKN_TXON;
+
+	ret = fusb302_i2c_block_write(chip, FUSB_REG_FIFOS, pos, buf);
+	if (ret)
+		return ret;
+	debug("sending PD message header: %x\n", msg->header);
+	debug("sending PD message len: %d\n", len);
+
+	return ret;
+}
+
+static int fusb302_pd_send_hardreset(struct fusb302_chip *chip)
+{
+	return fusb302_i2c_set_bits(chip, FUSB_REG_CONTROL3,
+				    FUSB_REG_CONTROL3_SEND_HARDRESET);
+}
+
+static const char * const transmit_type_name[] = {
+	[TCPC_TX_SOP]			= "SOP",
+	[TCPC_TX_SOP_PRIME]		= "SOP'",
+	[TCPC_TX_SOP_PRIME_PRIME]	= "SOP''",
+	[TCPC_TX_SOP_DEBUG_PRIME]	= "DEBUG'",
+	[TCPC_TX_SOP_DEBUG_PRIME_PRIME]	= "DEBUG''",
+	[TCPC_TX_HARD_RESET]		= "HARD_RESET",
+	[TCPC_TX_CABLE_RESET]		= "CABLE_RESET",
+	[TCPC_TX_BIST_MODE_2]		= "BIST_MODE_2",
+};
+
+static int tcpm_pd_transmit(struct tcpc_dev *dev, enum tcpm_transmit_type type,
+			    const struct pd_message *msg, unsigned int negotiated_rev)
+{
+	struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
+						 tcpc_dev);
+	int ret = 0;
+
+	switch (type) {
+	case TCPC_TX_SOP:
+		/* nRetryCount 3 in P2.0 spec, whereas 2 in PD3.0 spec */
+		ret = fusb302_enable_tx_auto_retries(chip, negotiated_rev > PD_REV20 ?
+						     FUSB_REG_CONTROL3_N_RETRIES_2 :
+						     FUSB_REG_CONTROL3_N_RETRIES_3);
+		if (ret)
+			printf("%s: Cannot update retry count(%d)\n",
+				__func__, ret);
+
+		ret = fusb302_pd_send_message(chip, msg);
+		if (ret)
+			printf("%s: cannot send PD message(%d)\n",
+				__func__, ret);
+		break;
+	case TCPC_TX_HARD_RESET:
+		ret = fusb302_pd_send_hardreset(chip);
+		if (ret)
+			printf("%s: cannot send hardreset(%d)\n",
+				__func__, ret);
+		break;
+	default:
+		printf("%s: type %s not supported",
+			__func__, transmit_type_name[type]);
+		ret = -EINVAL;
+	}
+
+	return ret;
+}
+
+static enum typec_cc_status fusb302_bc_lvl_to_cc(u8 bc_lvl)
+{
+	if (bc_lvl == FUSB_REG_STATUS0_BC_LVL_1230_MAX)
+		return TYPEC_CC_RP_3_0;
+	if (bc_lvl == FUSB_REG_STATUS0_BC_LVL_600_1230)
+		return TYPEC_CC_RP_1_5;
+	if (bc_lvl == FUSB_REG_STATUS0_BC_LVL_200_600)
+		return TYPEC_CC_RP_DEF;
+	return TYPEC_CC_OPEN;
+}
+
+static void fusb302_bc_lvl_handler(struct fusb302_chip *chip)
+{
+	int ret = 0;
+	u8 status0;
+	u8 bc_lvl;
+	enum typec_cc_status cc_status;
+
+	if (!chip->intr_bc_lvl) {
+		printf("BC_LVL interrupt is turned off, abort\n");
+		goto done;
+	}
+	ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &status0);
+	if (ret)
+		goto done;
+
+	debug("BC_LVL handler, status0 = 0x%02x\n", status0);
+	if (status0 & FUSB_REG_STATUS0_ACTIVITY)
+		printf("CC activities detected, delay handling\n");
+	bc_lvl = status0 & FUSB_REG_STATUS0_BC_LVL_MASK;
+	cc_status = fusb302_bc_lvl_to_cc(bc_lvl);
+	if (chip->cc_polarity == TYPEC_POLARITY_CC1) {
+		if (chip->cc1 != cc_status) {
+			debug("cc1: %s -> %s\n",
+				typec_cc_status_name[chip->cc1],
+				typec_cc_status_name[cc_status]);
+			chip->cc1 = cc_status;
+			tcpm_cc_change(chip->tcpm_port);
+		}
+	} else {
+		if (chip->cc2 != cc_status) {
+			debug("cc2: %s -> %s\n",
+				typec_cc_status_name[chip->cc2],
+				typec_cc_status_name[cc_status]);
+			chip->cc2 = cc_status;
+			tcpm_cc_change(chip->tcpm_port);
+		}
+	}
+
+done:
+	return;
+}
+
+static void fusb302_interrupt_handle(struct fusb302_chip *chip);
+static void fusb302_poll_event(struct tcpc_dev *dev)
+{
+	struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
+						 tcpc_dev);
+
+	fusb302_interrupt_handle(chip);
+}
+
+static int fusb302_enter_low_power_mode(struct tcpc_dev *dev,
+					bool attached, bool pd_capable)
+{
+	struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
+						 tcpc_dev);
+	int ret = 0;
+	unsigned int reg;
+
+	ret = fusb302_mask_interrupt(chip);
+	if (ret)
+		return ret;
+	if (attached && pd_capable)
+		reg = FUSB_REG_POWER_PWR_MEDIUM;
+	else if (attached)
+		reg = FUSB_REG_POWER_PWR_LOW;
+	else
+		reg = 0;
+
+	return fusb302_set_power_mode(chip, reg);
+}
+
+static void init_tcpc_dev(struct tcpc_dev *fusb302_tcpc_dev)
+{
+	fusb302_tcpc_dev->init = tcpm_init;
+	fusb302_tcpc_dev->get_vbus = tcpm_get_vbus;
+	//fusb302_tcpc_dev->get_current_limit = tcpm_get_current_limit;
+	fusb302_tcpc_dev->set_cc = tcpm_set_cc;
+	fusb302_tcpc_dev->get_cc = tcpm_get_cc;
+	fusb302_tcpc_dev->set_polarity = tcpm_set_polarity;
+	fusb302_tcpc_dev->set_vconn = tcpm_set_vconn;
+	fusb302_tcpc_dev->set_vbus = tcpm_set_vbus;
+	fusb302_tcpc_dev->set_pd_rx = tcpm_set_pd_rx;
+	fusb302_tcpc_dev->set_roles = tcpm_set_roles;
+	fusb302_tcpc_dev->start_toggling = tcpm_start_toggling;
+	fusb302_tcpc_dev->pd_transmit = tcpm_pd_transmit;
+	fusb302_tcpc_dev->poll_event = fusb302_poll_event;
+	fusb302_tcpc_dev->enter_low_power_mode = fusb302_enter_low_power_mode;
+}
+
+static const char * const cc_polarity_name[] = {
+	[TYPEC_POLARITY_CC1]	= "Polarity_CC1",
+	[TYPEC_POLARITY_CC2]	= "Polarity_CC2",
+};
+
+static int fusb302_set_cc_polarity_and_pull(struct fusb302_chip *chip,
+					    enum typec_cc_polarity cc_polarity,
+					    bool pull_up, bool pull_down)
+{
+	int ret = 0;
+	u8 switches0_data = 0x00;
+	u8 switches1_mask = FUSB_REG_SWITCHES1_TXCC1_EN |
+			    FUSB_REG_SWITCHES1_TXCC2_EN;
+	u8 switches1_data = 0x00;
+
+	if (pull_down)
+		switches0_data |= FUSB_REG_SWITCHES0_CC1_PD_EN |
+				  FUSB_REG_SWITCHES0_CC2_PD_EN;
+
+	if (cc_polarity == TYPEC_POLARITY_CC1) {
+		switches0_data |= FUSB_REG_SWITCHES0_MEAS_CC1;
+		if (chip->vconn_on)
+			switches0_data |= FUSB_REG_SWITCHES0_VCONN_CC2;
+		if (pull_up)
+			switches0_data |= FUSB_REG_SWITCHES0_CC1_PU_EN;
+		switches1_data = FUSB_REG_SWITCHES1_TXCC1_EN;
+	} else {
+		switches0_data |= FUSB_REG_SWITCHES0_MEAS_CC2;
+		if (chip->vconn_on)
+			switches0_data |= FUSB_REG_SWITCHES0_VCONN_CC1;
+		if (pull_up)
+			switches0_data |= FUSB_REG_SWITCHES0_CC2_PU_EN;
+		switches1_data = FUSB_REG_SWITCHES1_TXCC2_EN;
+	}
+	ret = fusb302_i2c_write(chip, FUSB_REG_SWITCHES0, switches0_data);
+	if (ret)
+		return ret;
+	ret = fusb302_i2c_mask_write(chip, FUSB_REG_SWITCHES1,
+				     switches1_mask, switches1_data);
+	if (ret)
+		return ret;
+	chip->cc_polarity = cc_polarity;
+
+	return ret;
+}
+
+static int fusb302_handle_togdone_snk(struct fusb302_chip *chip,
+				      u8 togdone_result)
+{
+	int ret = 0;
+	u8 status0;
+	u8 bc_lvl;
+	enum typec_cc_polarity cc_polarity;
+	enum typec_cc_status cc_status_active, cc1, cc2;
+
+	/* set polarity and pull_up, pull_down */
+	cc_polarity = (togdone_result == FUSB_REG_STATUS1A_TOGSS_SNK1) ?
+		      TYPEC_POLARITY_CC1 : TYPEC_POLARITY_CC2;
+	ret = fusb302_set_cc_polarity_and_pull(chip, cc_polarity, false, true);
+	if (ret) {
+		printf("cannot set cc polarity %s, ret = %d\n",
+			cc_polarity_name[cc_polarity], ret);
+		return ret;
+	}
+	/* fusb302_set_cc_polarity() has set the correct measure block */
+	ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &status0);
+	if (ret < 0)
+		return ret;
+	bc_lvl = status0 & FUSB_REG_STATUS0_BC_LVL_MASK;
+	cc_status_active = fusb302_bc_lvl_to_cc(bc_lvl);
+	/* restart toggling if the cc status on the active line is OPEN */
+	if (cc_status_active == TYPEC_CC_OPEN) {
+		printf("restart toggling as CC_OPEN detected\n");
+		ret = fusb302_set_toggling(chip, chip->toggling_mode);
+		return ret;
+	}
+	/* update tcpm with the new cc value */
+	cc1 = (cc_polarity == TYPEC_POLARITY_CC1) ?
+	      cc_status_active : TYPEC_CC_OPEN;
+	cc2 = (cc_polarity == TYPEC_POLARITY_CC2) ?
+	      cc_status_active : TYPEC_CC_OPEN;
+	if ((chip->cc1 != cc1) || (chip->cc2 != cc2)) {
+		chip->cc1 = cc1;
+		chip->cc2 = cc2;
+		tcpm_cc_change(chip->tcpm_port);
+	}
+	/* turn off toggling */
+	ret = fusb302_set_toggling(chip, TOGGLING_MODE_OFF);
+	if (ret) {
+		printf("cannot set toggling mode off, ret=%d\n", ret);
+		return ret;
+	}
+	/* unmask bc_lvl interrupt */
+	ret = fusb302_i2c_clear_bits(chip, FUSB_REG_MASK, FUSB_REG_MASK_BC_LVL);
+	if (ret) {
+		printf("cannot unmask bc_lcl interrupt, ret=%d\n", ret);
+		return ret;
+	}
+	chip->intr_bc_lvl = true;
+	debug("detected cc1=%s, cc2=%s\n",
+		typec_cc_status_name[cc1],
+		typec_cc_status_name[cc2]);
+
+	return ret;
+}
+
+/* On error returns < 0, otherwise a typec_cc_status value */
+static int fusb302_get_src_cc_status(struct fusb302_chip *chip,
+				     enum typec_cc_polarity cc_polarity,
+				     enum typec_cc_status *cc)
+{
+	u8 ra_mda = ra_mda_value[chip->src_current_status];
+	u8 rd_mda = rd_mda_value[chip->src_current_status];
+	u8 switches0_data, status0;
+	int ret;
+
+	/* Step 1: Set switches so that we measure the right CC pin */
+	switches0_data = (cc_polarity == TYPEC_POLARITY_CC1) ?
+		FUSB_REG_SWITCHES0_CC1_PU_EN | FUSB_REG_SWITCHES0_MEAS_CC1 :
+		FUSB_REG_SWITCHES0_CC2_PU_EN | FUSB_REG_SWITCHES0_MEAS_CC2;
+	ret = fusb302_i2c_write(chip, FUSB_REG_SWITCHES0, switches0_data);
+	if (ret < 0)
+		return ret;
+
+	fusb302_i2c_read(chip, FUSB_REG_SWITCHES0, &status0);
+	debug("get_src_cc_status switches: 0x%0x", status0);
+
+	/* Step 2: Set compararator volt to differentiate between Open and Rd */
+	ret = fusb302_i2c_write(chip, FUSB_REG_MEASURE, rd_mda);
+	if (ret)
+		return ret;
+
+	usleep_range(50, 100);
+	ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &status0);
+	if (ret)
+		return ret;
+
+	debug("get_src_cc_status rd_mda status0: 0x%0x", status0);
+	if (status0 & FUSB_REG_STATUS0_COMP) {
+		*cc = TYPEC_CC_OPEN;
+		return 0;
+	}
+
+	/* Step 3: Set compararator input to differentiate between Rd and Ra. */
+	ret = fusb302_i2c_write(chip, FUSB_REG_MEASURE, ra_mda);
+	if (ret)
+		return ret;
+
+	usleep_range(50, 100);
+	ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &status0);
+	if (ret)
+		return ret;
+
+	debug("get_src_cc_status ra_mda status0: 0x%0x", status0);
+	if (status0 & FUSB_REG_STATUS0_COMP)
+		*cc = TYPEC_CC_RD;
+	else
+		*cc = TYPEC_CC_RA;
+
+	return 0;
+}
+
+static int fusb302_handle_togdone_src(struct fusb302_chip *chip,
+				      u8 togdone_result)
+{
+	/*
+	 * - set polarity (measure cc, vconn, tx)
+	 * - set pull_up, pull_down
+	 * - set cc1, cc2, and update to tcpm_port
+	 * - set I_COMP interrupt on
+	 */
+	int ret = 0;
+	u8 rd_mda = rd_mda_value[chip->src_current_status];
+	enum toggling_mode toggling_mode = chip->toggling_mode;
+	enum typec_cc_polarity cc_polarity;
+	enum typec_cc_status cc1, cc2;
+
+	/*
+	 * The toggle-engine will stop in a src state if it sees either Ra or
+	 * Rd. Determine the status for both CC pins, starting with the one
+	 * where toggling stopped, as that is where the switches point now.
+	 */
+	if (togdone_result == FUSB_REG_STATUS1A_TOGSS_SRC1)
+		ret = fusb302_get_src_cc_status(chip, TYPEC_POLARITY_CC1, &cc1);
+	else
+		ret = fusb302_get_src_cc_status(chip, TYPEC_POLARITY_CC2, &cc2);
+	if (ret)
+		return ret;
+	/* we must turn off toggling before we can measure the other pin */
+	ret = fusb302_set_toggling(chip, TOGGLING_MODE_OFF);
+	if (ret) {
+		printf("cannot set toggling mode off, ret=%d\n", ret);
+		return ret;
+	}
+	/* get the status of the other pin */
+	if (togdone_result == FUSB_REG_STATUS1A_TOGSS_SRC1)
+		ret = fusb302_get_src_cc_status(chip, TYPEC_POLARITY_CC2, &cc2);
+	else
+		ret = fusb302_get_src_cc_status(chip, TYPEC_POLARITY_CC1, &cc1);
+	if (ret)
+		return ret;
+
+	/* determine polarity based on the status of both pins */
+	if (cc1 == TYPEC_CC_RD &&
+			(cc2 == TYPEC_CC_OPEN || cc2 == TYPEC_CC_RA)) {
+		cc_polarity = TYPEC_POLARITY_CC1;
+	} else if (cc2 == TYPEC_CC_RD &&
+		    (cc1 == TYPEC_CC_OPEN || cc1 == TYPEC_CC_RA)) {
+		cc_polarity = TYPEC_POLARITY_CC2;
+	} else {
+		printf("unexpected CC status cc1=%s, cc2=%s, restarting toggling\n",
+			typec_cc_status_name[cc1],
+			typec_cc_status_name[cc2]);
+		return fusb302_set_toggling(chip, toggling_mode);
+	}
+	/* set polarity and pull_up, pull_down */
+	ret = fusb302_set_cc_polarity_and_pull(chip, cc_polarity, true, false);
+	if (ret < 0) {
+		printf("cannot set cc polarity %s, ret=%d\n",
+			cc_polarity_name[cc_polarity], ret);
+		return ret;
+	}
+	/* update tcpm with the new cc value */
+	if ((chip->cc1 != cc1) || (chip->cc2 != cc2)) {
+		chip->cc1 = cc1;
+		chip->cc2 = cc2;
+		tcpm_cc_change(chip->tcpm_port);
+	}
+	/* set MDAC to Rd threshold, and unmask I_COMP for unplug detection */
+	ret = fusb302_i2c_write(chip, FUSB_REG_MEASURE, rd_mda);
+	if (ret)
+		return ret;
+	/* unmask comp_chng interrupt */
+	ret = fusb302_i2c_clear_bits(chip, FUSB_REG_MASK,
+				     FUSB_REG_MASK_COMP_CHNG);
+	if (ret) {
+		printf("cannot unmask comp_chng interrupt, ret=%d\n", ret);
+		return ret;
+	}
+	chip->intr_comp_chng = true;
+	debug("detected cc1=%s, cc2=%s\n",
+		typec_cc_status_name[cc1],
+		typec_cc_status_name[cc2]);
+
+	return ret;
+}
+
+static int fusb302_handle_togdone(struct fusb302_chip *chip)
+{
+	int ret = 0;
+	u8 status1a;
+	u8 togdone_result;
+
+	ret = fusb302_i2c_read(chip, FUSB_REG_STATUS1A, &status1a);
+	if (ret < 0)
+		return ret;
+	togdone_result = (status1a >> FUSB_REG_STATUS1A_TOGSS_POS) &
+			 FUSB_REG_STATUS1A_TOGSS_MASK;
+	switch (togdone_result) {
+	case FUSB_REG_STATUS1A_TOGSS_SNK1:
+	case FUSB_REG_STATUS1A_TOGSS_SNK2:
+		return fusb302_handle_togdone_snk(chip, togdone_result);
+	case FUSB_REG_STATUS1A_TOGSS_SRC1:
+	case FUSB_REG_STATUS1A_TOGSS_SRC2:
+		return fusb302_handle_togdone_src(chip, togdone_result);
+	case FUSB_REG_STATUS1A_TOGSS_AA:
+		/* doesn't support */
+		printf("AudioAccessory not supported\n");
+		fusb302_set_toggling(chip, chip->toggling_mode);
+		break;
+	default:
+		printf("TOGDONE with an invalid state: %d\n", togdone_result);
+		fusb302_set_toggling(chip, chip->toggling_mode);
+		break;
+	}
+	return ret;
+}
+
+static int fusb302_pd_reset(struct fusb302_chip *chip)
+{
+	return fusb302_i2c_set_bits(chip, FUSB_REG_RESET,
+				    FUSB_REG_RESET_PD_RESET);
+}
+
+static int fusb302_pd_read_message(struct fusb302_chip *chip,
+				   struct pd_message *msg)
+{
+	int ret = 0;
+	u8 token;
+	u8 crc[4];
+	int len;
+
+	/* first SOP token */
+	ret = fusb302_i2c_read(chip, FUSB_REG_FIFOS, &token);
+	if (ret)
+		return ret;
+	ret = fusb302_i2c_block_read(chip, FUSB_REG_FIFOS, 2,
+				     (u8 *)&msg->header);
+	if (ret)
+		return ret;
+	len = pd_header_cnt_le(msg->header) * 4;
+	/* add 4 to length to include the CRC */
+	if (len > PD_MAX_PAYLOAD * 4) {
+		printf("%s: PD message too long %d\n", __func__, len);
+		return -EINVAL;
+	}
+	if (len > 0) {
+		ret = fusb302_i2c_block_read(chip, FUSB_REG_FIFOS, len,
+					     (u8 *)msg->payload);
+		if (ret)
+			return ret;
+	}
+	/* another 4 bytes to read CRC out */
+	ret = fusb302_i2c_block_read(chip, FUSB_REG_FIFOS, 4, crc);
+	if (ret)
+		return ret;
+	debug("%s: PD message header: %x\n", __func__, msg->header);
+	debug("%s: PD message len: %d\n", __func__, len);
+
+	/*
+	 * Check if we've read off a GoodCRC message. If so then indicate to
+	 * TCPM that the previous transmission has completed. Otherwise we pass
+	 * the received message over to TCPM for processing.
+	 *
+	 * We make this check here instead of basing the reporting decision on
+	 * the IRQ event type, as it's possible for the chip to report the
+	 * TX_SUCCESS and GCRCSENT events out of order on occasion, so we need
+	 * to check the message type to ensure correct reporting to TCPM.
+	 */
+	if ((!len) && (pd_header_type_le(msg->header) == PD_CTRL_GOOD_CRC))
+		tcpm_pd_transmit_complete(chip->tcpm_port, TCPC_TX_SUCCESS);
+	else
+		tcpm_pd_receive(chip->tcpm_port, msg);
+
+	return ret;
+}
+
+static void fusb302_interrupt_handle(struct fusb302_chip *chip)
+{
+	int ret = 0;
+	u8 interrupt;
+	u8 interrupta;
+	u8 interruptb;
+	u8 status0;
+	bool vbus_present;
+	bool comp_result;
+	bool intr_togdone;
+	bool intr_bc_lvl;
+	bool intr_comp_chng;
+	struct pd_message pd_msg;
+
+	/* grab a snapshot of intr flags */
+	intr_togdone = chip->intr_togdone;
+	intr_bc_lvl = chip->intr_bc_lvl;
+	intr_comp_chng = chip->intr_comp_chng;
+
+	if (chip->gpio_cc_int_present)
+		if (!dm_gpio_get_value(&chip->gpio_cc_int))
+			return;
+
+	ret = fusb302_i2c_read(chip, FUSB_REG_INTERRUPT, &interrupt);
+	if (ret)
+		return;
+	ret = fusb302_i2c_read(chip, FUSB_REG_INTERRUPTA, &interrupta);
+	if (ret)
+		return;
+	ret = fusb302_i2c_read(chip, FUSB_REG_INTERRUPTB, &interruptb);
+	if (ret)
+		return;
+	ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &status0);
+	if (ret)
+		return;
+	debug("IRQ: 0x%02x, a: 0x%02x, b: 0x%02x, status0: 0x%02x\n",
+		interrupt, interrupta, interruptb, status0);
+
+	if (interrupt & FUSB_REG_INTERRUPT_VBUSOK) {
+		vbus_present = !!(status0 & FUSB_REG_STATUS0_VBUSOK);
+		debug("IRQ: VBUS_OK, vbus=%s\n", vbus_present ? "On" : "Off");
+		if (vbus_present != chip->vbus_present) {
+			chip->vbus_present = vbus_present;
+			tcpm_vbus_change(chip->tcpm_port);
+		}
+	}
+
+	if ((interrupta & FUSB_REG_INTERRUPTA_TOGDONE) && intr_togdone) {
+		debug("IRQ: TOGDONE\n");
+		ret = fusb302_handle_togdone(chip);
+		if (ret) {
+			printf("%s: handle togdone error(%d)\n", __func__, ret);
+			return;
+		}
+	}
+
+	if ((interrupt & FUSB_REG_INTERRUPT_BC_LVL) && intr_bc_lvl) {
+		debug("IRQ: BC_LVL, handler pending\n");
+		/*
+		 * as BC_LVL interrupt can be affected by PD activity,
+		 * apply delay to for the handler to wait for the PD
+		 * signaling to finish.
+		 */
+		//msleep(T_BC_LVL_DEBOUNCE_DELAY_MS);
+		fusb302_bc_lvl_handler(chip);
+	}
+
+	if ((interrupt & FUSB_REG_INTERRUPT_COMP_CHNG) && intr_comp_chng) {
+		comp_result = !!(status0 & FUSB_REG_STATUS0_COMP);
+		debug("IRQ: COMP_CHNG, comp=%s\n", comp_result ? "true" : "false");
+		if (comp_result) {
+			/* cc level > Rd_threshold, detach */
+			chip->cc1 = TYPEC_CC_OPEN;
+			chip->cc2 = TYPEC_CC_OPEN;
+			tcpm_cc_change(chip->tcpm_port);
+		}
+	}
+
+	if (interrupt & FUSB_REG_INTERRUPT_COLLISION) {
+		debug("IRQ: PD collision\n");
+		tcpm_pd_transmit_complete(chip->tcpm_port, TCPC_TX_FAILED);
+	}
+
+	if (interrupta & FUSB_REG_INTERRUPTA_RETRYFAIL) {
+		debug("IRQ: PD retry failed\n");
+		tcpm_pd_transmit_complete(chip->tcpm_port, TCPC_TX_FAILED);
+	}
+
+	if (interrupta & FUSB_REG_INTERRUPTA_HARDSENT) {
+		debug("IRQ: PD hardreset sent\n");
+		ret = fusb302_pd_reset(chip);
+		if (ret) {
+			printf("cannot PD reset, ret=%d\n", ret);
+			return;
+		}
+		tcpm_pd_transmit_complete(chip->tcpm_port, TCPC_TX_SUCCESS);
+	}
+
+	if (interrupta & FUSB_REG_INTERRUPTA_TX_SUCCESS) {
+		debug("IRQ: PD tx success\n");
+		ret = fusb302_pd_read_message(chip, &pd_msg);
+		if (ret) {
+			printf("cannot read in PD message, ret=%d\n", ret);
+			return;
+		}
+	}
+
+	if (interrupta & FUSB_REG_INTERRUPTA_HARDRESET) {
+		debug("IRQ: PD received hardreset\n");
+		ret = fusb302_pd_reset(chip);
+		if (ret) {
+			printf("cannot PD reset, ret=%d\n", ret);
+			return;
+		}
+		tcpm_pd_hard_reset(chip->tcpm_port);
+	}
+
+	if (interruptb & FUSB_REG_INTERRUPTB_GCRCSENT) {
+		debug("IRQ: PD sent good CRC\n");
+		ret = fusb302_pd_read_message(chip, &pd_msg);
+		if (ret) {
+			printf("cannot read in PD message, ret=%d\n", ret);
+			return;
+		}
+	}
+}
+
+static int fusb302_probe(struct udevice *dev)
+{
+	struct fusb302_chip *chip = dev_get_priv(dev);
+	int ret = 0;
+
+	chip->udev = dev;
+
+#if 0
+	/* get vbus regulator */
+	ret = regulator_get_by_platname("vbus5v0_typec", chip->vbus_regulator);
+	if (ret) {
+		printf("Can get the regulator: vbus5v0_typec (err=%d)\n", ret);
+		chip->vbus_regulator = NULL;
+	}
+#endif
+
+	chip->tcpc_dev.connector_node = dev_read_subnode(dev, "connector");
+	if (!ofnode_valid(chip->tcpc_dev.connector_node)) {
+		printf("%s: 'connector' node is not found\n", __func__);
+		return -ENODEV;
+	}
+
+	init_tcpc_dev(&chip->tcpc_dev);
+
+	ret = gpio_request_by_name(dev, "int-n-gpios", 0,
+				   &chip->gpio_cc_int, GPIOD_IS_IN);
+	if (ret) {
+		printf("%s: fail to get int GPIO: ret=%d\n", __func__, ret);
+		chip->gpio_cc_int_present = false;
+	} else {
+		chip->gpio_cc_int_present = true;
+	}
+
+	chip->tcpm_port = tcpm_port_init(dev, &chip->tcpc_dev);
+	if (IS_ERR(chip->tcpm_port)) {
+		printf("%s: failed to tcpm port init\n", __func__);
+		return PTR_ERR(chip->tcpm_port);
+	}
+
+	tcpm_poll_event(chip->tcpm_port);
+
+	return 0;
+}
+
+
+static int fusb302_get_voltage(struct udevice *dev)
+{
+	struct fusb302_chip *chip = dev_get_priv(dev);
+
+	return tcpm_get_voltage(chip->tcpm_port);
+}
+
+static int fusb302_get_current(struct udevice *dev)
+{
+	struct fusb302_chip *chip = dev_get_priv(dev);
+
+	return tcpm_get_current(chip->tcpm_port);
+}
+
+static int fusb302_get_online(struct udevice *dev)
+{
+	struct fusb302_chip *chip = dev_get_priv(dev);
+
+	return tcpm_get_online(chip->tcpm_port);
+}
+
+static struct dm_power_delivery_ops fusb302_ops = {
+	.get_voltage = fusb302_get_voltage,
+	.get_current = fusb302_get_current,
+	.get_online = fusb302_get_online,
+};
+
+static const struct udevice_id fusb302_ids[] = {
+	{ .compatible = "fcs,fusb302" },
+	{ }
+};
+
+U_BOOT_DRIVER(fusb302) = {
+	.name = "fusb302",
+	.id = UCLASS_PD,
+	.of_match = fusb302_ids,
+	.ops = &fusb302_ops,
+	.probe = fusb302_probe,
+	.priv_auto_alloc_size = sizeof(struct fusb302_chip),
+};
diff --git a/drivers/power/power_delivery/fusb302_reg.h b/drivers/power/power_delivery/fusb302_reg.h
new file mode 100644
index 0000000000..edc0e4b0f1
--- /dev/null
+++ b/drivers/power/power_delivery/fusb302_reg.h
@@ -0,0 +1,177 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2016-2017 Google, Inc
+ *
+ * Fairchild FUSB302 Type-C Chip Driver
+ */
+
+#ifndef FUSB302_REG_H
+#define FUSB302_REG_H
+
+#define FUSB_REG_DEVICE_ID			0x01
+#define FUSB_REG_SWITCHES0			0x02
+#define FUSB_REG_SWITCHES0_CC2_PU_EN		BIT(7)
+#define FUSB_REG_SWITCHES0_CC1_PU_EN		BIT(6)
+#define FUSB_REG_SWITCHES0_VCONN_CC2		BIT(5)
+#define FUSB_REG_SWITCHES0_VCONN_CC1		BIT(4)
+#define FUSB_REG_SWITCHES0_MEAS_CC2		BIT(3)
+#define FUSB_REG_SWITCHES0_MEAS_CC1		BIT(2)
+#define FUSB_REG_SWITCHES0_CC2_PD_EN		BIT(1)
+#define FUSB_REG_SWITCHES0_CC1_PD_EN		BIT(0)
+#define FUSB_REG_SWITCHES1			0x03
+#define FUSB_REG_SWITCHES1_POWERROLE		BIT(7)
+#define FUSB_REG_SWITCHES1_SPECREV1		BIT(6)
+#define FUSB_REG_SWITCHES1_SPECREV0		BIT(5)
+#define FUSB_REG_SWITCHES1_DATAROLE		BIT(4)
+#define FUSB_REG_SWITCHES1_AUTO_GCRC		BIT(2)
+#define FUSB_REG_SWITCHES1_TXCC2_EN		BIT(1)
+#define FUSB_REG_SWITCHES1_TXCC1_EN		BIT(0)
+#define FUSB_REG_MEASURE			0x04
+#define FUSB_REG_MEASURE_MDAC5			BIT(7)
+#define FUSB_REG_MEASURE_MDAC4			BIT(6)
+#define FUSB_REG_MEASURE_MDAC3			BIT(5)
+#define FUSB_REG_MEASURE_MDAC2			BIT(4)
+#define FUSB_REG_MEASURE_MDAC1			BIT(3)
+#define FUSB_REG_MEASURE_MDAC0			BIT(2)
+#define FUSB_REG_MEASURE_VBUS			BIT(1)
+#define FUSB_REG_MEASURE_XXXX5			BIT(0)
+#define FUSB_REG_CONTROL0			0x06
+#define FUSB_REG_CONTROL0_TX_FLUSH		BIT(6)
+#define FUSB_REG_CONTROL0_INT_MASK		BIT(5)
+#define FUSB_REG_CONTROL0_HOST_CUR_MASK		(0xC)
+#define FUSB_REG_CONTROL0_HOST_CUR_HIGH		(0xC)
+#define FUSB_REG_CONTROL0_HOST_CUR_MED		(0x8)
+#define FUSB_REG_CONTROL0_HOST_CUR_DEF		(0x4)
+#define FUSB_REG_CONTROL0_TX_START		BIT(0)
+#define FUSB_REG_CONTROL1			0x07
+#define FUSB_REG_CONTROL1_ENSOP2DB		BIT(6)
+#define FUSB_REG_CONTROL1_ENSOP1DB		BIT(5)
+#define FUSB_REG_CONTROL1_BIST_MODE2		BIT(4)
+#define FUSB_REG_CONTROL1_RX_FLUSH		BIT(2)
+#define FUSB_REG_CONTROL1_ENSOP2		BIT(1)
+#define FUSB_REG_CONTROL1_ENSOP1		BIT(0)
+#define FUSB_REG_CONTROL2			0x08
+#define FUSB_REG_CONTROL2_MODE			BIT(1)
+#define FUSB_REG_CONTROL2_MODE_MASK		(0x6)
+#define FUSB_REG_CONTROL2_MODE_DFP		(0x6)
+#define FUSB_REG_CONTROL2_MODE_UFP		(0x4)
+#define FUSB_REG_CONTROL2_MODE_DRP		(0x2)
+#define FUSB_REG_CONTROL2_MODE_NONE		(0x0)
+#define FUSB_REG_CONTROL2_TOGGLE		BIT(0)
+#define FUSB_REG_CONTROL3			0x09
+#define FUSB_REG_CONTROL3_SEND_HARDRESET	BIT(6)
+#define FUSB_REG_CONTROL3_BIST_TMODE		BIT(5)	/* 302B Only */
+#define FUSB_REG_CONTROL3_AUTO_HARDRESET	BIT(4)
+#define FUSB_REG_CONTROL3_AUTO_SOFTRESET	BIT(3)
+#define FUSB_REG_CONTROL3_N_RETRIES		BIT(1)
+#define FUSB_REG_CONTROL3_N_RETRIES_MASK	(0x6)
+#define FUSB_REG_CONTROL3_N_RETRIES_3		(0x6)
+#define FUSB_REG_CONTROL3_N_RETRIES_2		(0x4)
+#define FUSB_REG_CONTROL3_N_RETRIES_1		(0x2)
+#define FUSB_REG_CONTROL3_AUTO_RETRY		BIT(0)
+#define FUSB_REG_MASK				0x0A
+#define FUSB_REG_MASK_VBUSOK			BIT(7)
+#define FUSB_REG_MASK_ACTIVITY			BIT(6)
+#define FUSB_REG_MASK_COMP_CHNG			BIT(5)
+#define FUSB_REG_MASK_CRC_CHK			BIT(4)
+#define FUSB_REG_MASK_ALERT			BIT(3)
+#define FUSB_REG_MASK_WAKE			BIT(2)
+#define FUSB_REG_MASK_COLLISION			BIT(1)
+#define FUSB_REG_MASK_BC_LVL			BIT(0)
+#define FUSB_REG_POWER				0x0B
+#define FUSB_REG_POWER_PWR			BIT(0)
+#define FUSB_REG_POWER_PWR_LOW			0x1
+#define FUSB_REG_POWER_PWR_MEDIUM		0x3
+#define FUSB_REG_POWER_PWR_HIGH			0x7
+#define FUSB_REG_POWER_PWR_ALL			0xF
+#define FUSB_REG_RESET				0x0C
+#define FUSB_REG_RESET_PD_RESET			BIT(1)
+#define FUSB_REG_RESET_SW_RESET			BIT(0)
+#define FUSB_REG_MASKA				0x0E
+#define FUSB_REG_MASKA_OCP_TEMP			BIT(7)
+#define FUSB_REG_MASKA_TOGDONE			BIT(6)
+#define FUSB_REG_MASKA_SOFTFAIL			BIT(5)
+#define FUSB_REG_MASKA_RETRYFAIL		BIT(4)
+#define FUSB_REG_MASKA_HARDSENT			BIT(3)
+#define FUSB_REG_MASKA_TX_SUCCESS		BIT(2)
+#define FUSB_REG_MASKA_SOFTRESET		BIT(1)
+#define FUSB_REG_MASKA_HARDRESET		BIT(0)
+#define FUSB_REG_MASKB				0x0F
+#define FUSB_REG_MASKB_GCRCSENT			BIT(0)
+#define FUSB_REG_STATUS0A			0x3C
+#define FUSB_REG_STATUS0A_SOFTFAIL		BIT(5)
+#define FUSB_REG_STATUS0A_RETRYFAIL		BIT(4)
+#define FUSB_REG_STATUS0A_POWER			BIT(2)
+#define FUSB_REG_STATUS0A_RX_SOFT_RESET		BIT(1)
+#define FUSB_REG_STATUS0A_RX_HARD_RESET		BIT(0)
+#define FUSB_REG_STATUS1A			0x3D
+#define FUSB_REG_STATUS1A_TOGSS			BIT(3)
+#define FUSB_REG_STATUS1A_TOGSS_RUNNING		0x0
+#define FUSB_REG_STATUS1A_TOGSS_SRC1		0x1
+#define FUSB_REG_STATUS1A_TOGSS_SRC2		0x2
+#define FUSB_REG_STATUS1A_TOGSS_SNK1		0x5
+#define FUSB_REG_STATUS1A_TOGSS_SNK2		0x6
+#define FUSB_REG_STATUS1A_TOGSS_AA		0x7
+#define FUSB_REG_STATUS1A_TOGSS_POS		(3)
+#define FUSB_REG_STATUS1A_TOGSS_MASK		(0x7)
+#define FUSB_REG_STATUS1A_RXSOP2DB		BIT(2)
+#define FUSB_REG_STATUS1A_RXSOP1DB		BIT(1)
+#define FUSB_REG_STATUS1A_RXSOP			BIT(0)
+#define FUSB_REG_INTERRUPTA			0x3E
+#define FUSB_REG_INTERRUPTA_OCP_TEMP		BIT(7)
+#define FUSB_REG_INTERRUPTA_TOGDONE		BIT(6)
+#define FUSB_REG_INTERRUPTA_SOFTFAIL		BIT(5)
+#define FUSB_REG_INTERRUPTA_RETRYFAIL		BIT(4)
+#define FUSB_REG_INTERRUPTA_HARDSENT		BIT(3)
+#define FUSB_REG_INTERRUPTA_TX_SUCCESS		BIT(2)
+#define FUSB_REG_INTERRUPTA_SOFTRESET		BIT(1)
+#define FUSB_REG_INTERRUPTA_HARDRESET		BIT(0)
+#define FUSB_REG_INTERRUPTB			0x3F
+#define FUSB_REG_INTERRUPTB_GCRCSENT		BIT(0)
+#define FUSB_REG_STATUS0			0x40
+#define FUSB_REG_STATUS0_VBUSOK			BIT(7)
+#define FUSB_REG_STATUS0_ACTIVITY		BIT(6)
+#define FUSB_REG_STATUS0_COMP			BIT(5)
+#define FUSB_REG_STATUS0_CRC_CHK		BIT(4)
+#define FUSB_REG_STATUS0_ALERT			BIT(3)
+#define FUSB_REG_STATUS0_WAKE			BIT(2)
+#define FUSB_REG_STATUS0_BC_LVL_MASK		0x03
+#define FUSB_REG_STATUS0_BC_LVL_0_200		0x0
+#define FUSB_REG_STATUS0_BC_LVL_200_600		0x1
+#define FUSB_REG_STATUS0_BC_LVL_600_1230	0x2
+#define FUSB_REG_STATUS0_BC_LVL_1230_MAX	0x3
+#define FUSB_REG_STATUS0_BC_LVL1		BIT(1)
+#define FUSB_REG_STATUS0_BC_LVL0		BIT(0)
+#define FUSB_REG_STATUS1			0x41
+#define FUSB_REG_STATUS1_RXSOP2			BIT(7)
+#define FUSB_REG_STATUS1_RXSOP1			BIT(6)
+#define FUSB_REG_STATUS1_RX_EMPTY		BIT(5)
+#define FUSB_REG_STATUS1_RX_FULL		BIT(4)
+#define FUSB_REG_STATUS1_TX_EMPTY		BIT(3)
+#define FUSB_REG_STATUS1_TX_FULL		BIT(2)
+#define FUSB_REG_INTERRUPT			0x42
+#define FUSB_REG_INTERRUPT_VBUSOK		BIT(7)
+#define FUSB_REG_INTERRUPT_ACTIVITY		BIT(6)
+#define FUSB_REG_INTERRUPT_COMP_CHNG		BIT(5)
+#define FUSB_REG_INTERRUPT_CRC_CHK		BIT(4)
+#define FUSB_REG_INTERRUPT_ALERT		BIT(3)
+#define FUSB_REG_INTERRUPT_WAKE			BIT(2)
+#define FUSB_REG_INTERRUPT_COLLISION		BIT(1)
+#define FUSB_REG_INTERRUPT_BC_LVL		BIT(0)
+#define FUSB_REG_FIFOS				0x43
+
+/* Tokens defined for the FUSB302 TX FIFO */
+enum fusb302_txfifo_tokens {
+	FUSB302_TKN_TXON = 0xA1,
+	FUSB302_TKN_SYNC1 = 0x12,
+	FUSB302_TKN_SYNC2 = 0x13,
+	FUSB302_TKN_SYNC3 = 0x1B,
+	FUSB302_TKN_RST1 = 0x15,
+	FUSB302_TKN_RST2 = 0x16,
+	FUSB302_TKN_PACKSYM = 0x80,
+	FUSB302_TKN_JAMCRC = 0xFF,
+	FUSB302_TKN_EOP = 0x14,
+	FUSB302_TKN_TXOFF = 0xFE,
+};
+
+#endif
diff --git a/drivers/power/power_delivery/power_delivery_uclass.c b/drivers/power/power_delivery/power_delivery_uclass.c
new file mode 100644
index 0000000000..a6acf4c9bf
--- /dev/null
+++ b/drivers/power/power_delivery/power_delivery_uclass.c
@@ -0,0 +1,31 @@
+/*
+ * (C) Copyright 2022 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <errno.h>
+#include <dm.h>
+#include <dm/device-internal.h>
+#include <power/power_delivery/power_delivery.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int power_delivery_get_data(struct udevice *dev, struct power_delivery_data *pd_data)
+{
+	const struct dm_power_delivery_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->get_current || !ops->get_voltage || !ops->get_online)
+		return -ENOSYS;
+
+	pd_data->voltage = ops->get_voltage(dev);
+	pd_data->current = ops->get_current(dev);
+	pd_data->online = ops->get_online(dev);
+
+	return 0;
+}
+
+UCLASS_DRIVER(power_delivery) = {
+	.id		= UCLASS_PD,
+	.name		= "power_delivery",
+};
diff --git a/drivers/power/power_delivery/tcpci.c b/drivers/power/power_delivery/tcpci.c
new file mode 100644
index 0000000000..e9fbb8d217
--- /dev/null
+++ b/drivers/power/power_delivery/tcpci.c
@@ -0,0 +1,779 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2015-2017 Google, Inc
+ *
+ * USB Type-C Port Controller Interface.
+ */
+
+#include <dm.h>
+#include <i2c.h>
+#include <asm/gpio.h>
+#include <power/power_delivery/pd.h>
+#include <power/power_delivery/tcpm.h>
+#include <power/power_delivery/typec.h>
+#include <power/power_delivery/power_delivery.h>
+
+#include "tcpci.h"
+
+#define PD_RETRY_COUNT 3
+
+#define tcpc_presenting_cc1_rd(reg) \
+	(!(TCPC_ROLE_CTRL_DRP & (reg)) && \
+	 (((reg) & (TCPC_ROLE_CTRL_CC1_MASK << TCPC_ROLE_CTRL_CC1_SHIFT)) == \
+	  (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC1_SHIFT)))
+#define tcpc_presenting_cc2_rd(reg) \
+	(!(TCPC_ROLE_CTRL_DRP & (reg)) && \
+	 (((reg) & (TCPC_ROLE_CTRL_CC2_MASK << TCPC_ROLE_CTRL_CC2_SHIFT)) == \
+	  (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC2_SHIFT)))
+
+struct tcpci {
+	struct udevice *dev;
+
+	struct tcpm_port *port;
+
+	bool controls_vbus;
+	bool gpio_cc_int_present;
+
+	struct tcpc_dev tcpc;
+	struct tcpci_data *data;
+	struct gpio_desc gpio_cc_int;
+};
+
+struct tcpci_chip {
+	struct udevice *udev;
+	struct tcpci *tcpci;
+	struct tcpci_data data;
+};
+
+static inline struct tcpci *tcpc_to_tcpci(struct tcpc_dev *tcpc)
+{
+	return container_of(tcpc, struct tcpci, tcpc);
+}
+
+static int tcpci_read16(struct tcpci *tcpci, unsigned int reg, u16 *val)
+{
+	int ret = 0;
+	u8 buffer[2];
+
+	ret = dm_i2c_read(tcpci->dev, reg, buffer, 2);
+	if (ret) {
+		printf("%s: cannot read %02x, ret=%d\n",
+			__func__, reg, ret);
+		return ret;
+	}
+
+	*val = ((buffer[1] << 8) & 0xFF00) | (buffer[0] & 0xFF);
+
+	return ret;
+}
+
+static int tcpci_block_read(struct tcpci *tcpci, unsigned int reg,
+			    u8 *data, u8 length)
+{
+	int ret = 0;
+
+	ret = dm_i2c_read(tcpci->dev, reg, data, length);
+	if (ret)
+		printf("%s: cannot block read 0x%02x, len=%d, ret=%d\n",
+			__func__, reg, length, ret);
+
+	return ret;
+}
+
+static int tcpci_write16(struct tcpci *tcpci, unsigned int reg, u16 val)
+{
+	int ret = 0;
+	u8 buffer[2];
+
+	buffer[0] = val & 0xFF;
+	buffer[1] = (val >> 8) & 0xFF;
+	ret = dm_i2c_write(tcpci->dev, reg, buffer, 2);
+	if (ret)
+		printf("%s: cannot write 0x%02x, ret=%d\n",
+			__func__, reg, ret);
+
+	return ret;
+}
+
+static int tcpci_block_write(struct tcpci *tcpci, unsigned int reg,
+			     u8 *data, u8 length)
+{
+	int ret = 0;
+
+	ret = dm_i2c_write(tcpci->dev, reg, data, length);
+	if (ret)
+		printf("%s: cannot block write 0x%02x, len=%d, ret=%d\n",
+			__func__, reg, length, ret);
+
+	return ret;
+}
+
+static int tcpci_set_cc(struct tcpc_dev *tcpc, enum typec_cc_status cc)
+{
+	struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
+	unsigned int reg;
+	int ret;
+
+	switch (cc) {
+	case TYPEC_CC_RA:
+		reg = (TCPC_ROLE_CTRL_CC_RA << TCPC_ROLE_CTRL_CC1_SHIFT) |
+			(TCPC_ROLE_CTRL_CC_RA << TCPC_ROLE_CTRL_CC2_SHIFT);
+		break;
+	case TYPEC_CC_RD:
+		reg = (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC1_SHIFT) |
+			(TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC2_SHIFT);
+		break;
+	case TYPEC_CC_RP_DEF:
+		reg = (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) |
+			(TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT) |
+			(TCPC_ROLE_CTRL_RP_VAL_DEF <<
+			 TCPC_ROLE_CTRL_RP_VAL_SHIFT);
+		break;
+	case TYPEC_CC_RP_1_5:
+		reg = (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) |
+			(TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT) |
+			(TCPC_ROLE_CTRL_RP_VAL_1_5 <<
+			 TCPC_ROLE_CTRL_RP_VAL_SHIFT);
+		break;
+	case TYPEC_CC_RP_3_0:
+		reg = (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) |
+			(TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT) |
+			(TCPC_ROLE_CTRL_RP_VAL_3_0 <<
+			 TCPC_ROLE_CTRL_RP_VAL_SHIFT);
+		break;
+	case TYPEC_CC_OPEN:
+	default:
+		reg = (TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC1_SHIFT) |
+			(TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC2_SHIFT);
+		break;
+	}
+
+	ret = dm_i2c_reg_write(tcpci->dev, TCPC_ROLE_CTRL, reg);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
+static int tcpci_start_toggling(struct tcpc_dev *tcpc,
+				enum typec_port_type port_type,
+				enum typec_cc_status cc)
+{
+	int ret;
+	struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
+	unsigned int reg = TCPC_ROLE_CTRL_DRP;
+
+	if (port_type != TYPEC_PORT_DRP)
+		return -EOPNOTSUPP;
+
+	/* Handle vendor drp toggling */
+	if (tcpci->data->start_drp_toggling) {
+		ret = tcpci->data->start_drp_toggling(tcpci, tcpci->data, cc);
+		if (ret < 0)
+			return ret;
+	}
+
+	switch (cc) {
+	default:
+	case TYPEC_CC_RP_DEF:
+		reg |= (TCPC_ROLE_CTRL_RP_VAL_DEF <<
+			TCPC_ROLE_CTRL_RP_VAL_SHIFT);
+		break;
+	case TYPEC_CC_RP_1_5:
+		reg |= (TCPC_ROLE_CTRL_RP_VAL_1_5 <<
+			TCPC_ROLE_CTRL_RP_VAL_SHIFT);
+		break;
+	case TYPEC_CC_RP_3_0:
+		reg |= (TCPC_ROLE_CTRL_RP_VAL_3_0 <<
+			TCPC_ROLE_CTRL_RP_VAL_SHIFT);
+		break;
+	}
+
+	if (cc == TYPEC_CC_RD)
+		reg |= (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC1_SHIFT) |
+			   (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC2_SHIFT);
+	else
+		reg |= (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) |
+			   (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT);
+	ret = dm_i2c_reg_write(tcpci->dev, TCPC_ROLE_CTRL, reg);
+	if (ret < 0)
+		return ret;
+	return dm_i2c_reg_write(tcpci->dev, TCPC_COMMAND,
+				TCPC_CMD_LOOK4CONNECTION);
+}
+
+static enum typec_cc_status tcpci_to_typec_cc(unsigned int cc, bool sink)
+{
+	switch (cc) {
+	case 0x1:
+		return sink ? TYPEC_CC_RP_DEF : TYPEC_CC_RA;
+	case 0x2:
+		return sink ? TYPEC_CC_RP_1_5 : TYPEC_CC_RD;
+	case 0x3:
+		if (sink)
+			return TYPEC_CC_RP_3_0;
+		/* fall through */
+	case 0x0:
+	default:
+		return TYPEC_CC_OPEN;
+	}
+}
+
+static int tcpci_get_cc(struct tcpc_dev *tcpc,
+			enum typec_cc_status *cc1, enum typec_cc_status *cc2)
+{
+	struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
+	unsigned int reg, role_control;
+
+	role_control = dm_i2c_reg_read(tcpci->dev, TCPC_ROLE_CTRL);
+	if (role_control < 0)
+		return role_control;
+
+	reg = dm_i2c_reg_read(tcpci->dev, TCPC_CC_STATUS);
+	if (reg < 0)
+		return reg;
+
+	*cc1 = tcpci_to_typec_cc((reg >> TCPC_CC_STATUS_CC1_SHIFT) &
+				 TCPC_CC_STATUS_CC1_MASK,
+				 reg & TCPC_CC_STATUS_TERM ||
+				 tcpc_presenting_cc1_rd(role_control));
+	*cc2 = tcpci_to_typec_cc((reg >> TCPC_CC_STATUS_CC2_SHIFT) &
+				 TCPC_CC_STATUS_CC2_MASK,
+				 reg & TCPC_CC_STATUS_TERM ||
+				 tcpc_presenting_cc2_rd(role_control));
+
+	return 0;
+}
+
+static int tcpci_set_polarity(struct tcpc_dev *tcpc,
+			      enum typec_cc_polarity polarity)
+{
+	struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
+	unsigned int reg;
+	int ret;
+	enum typec_cc_status cc1, cc2;
+
+	/* Obtain Rp setting from role control */
+	reg = dm_i2c_reg_read(tcpci->dev, TCPC_ROLE_CTRL);
+	if (reg < 0)
+		return reg;
+
+	ret = tcpci_get_cc(tcpc, &cc1, &cc2);
+	if (ret < 0)
+		return ret;
+
+	/*
+	 * When port has drp toggling enabled, ROLE_CONTROL would only have the initial
+	 * terminations for the toggling and does not indicate the final cc
+	 * terminations when ConnectionResult is 0 i.e. drp toggling stops and
+	 * the connection is resolbed. Infer port role from TCPC_CC_STATUS based on the
+	 * terminations seen. The port role is then used to set the cc terminations.
+	 */
+	if (reg & TCPC_ROLE_CTRL_DRP) {
+		/* Disable DRP for the OPEN setting to take effect */
+		reg = reg & ~TCPC_ROLE_CTRL_DRP;
+
+		if (polarity == TYPEC_POLARITY_CC2) {
+			reg &= ~(TCPC_ROLE_CTRL_CC2_MASK << TCPC_ROLE_CTRL_CC2_SHIFT);
+			/* Local port is source */
+			if (cc2 == TYPEC_CC_RD)
+				/* Role control would have the Rp setting when DRP was enabled */
+				reg |= TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT;
+			else
+				reg |= TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC2_SHIFT;
+		} else {
+			reg &= ~(TCPC_ROLE_CTRL_CC1_MASK << TCPC_ROLE_CTRL_CC1_SHIFT);
+			/* Local port is source */
+			if (cc1 == TYPEC_CC_RD)
+				/* Role control would have the Rp setting when DRP was enabled */
+				reg |= TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT;
+			else
+				reg |= TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC1_SHIFT;
+		}
+	}
+
+	if (polarity == TYPEC_POLARITY_CC2)
+		reg |= TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC1_SHIFT;
+	else
+		reg |= TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC2_SHIFT;
+	ret = dm_i2c_reg_write(tcpci->dev, TCPC_ROLE_CTRL, reg);
+	if (ret < 0)
+		return ret;
+
+	return dm_i2c_reg_write(tcpci->dev, TCPC_TCPC_CTRL,
+			(polarity == TYPEC_POLARITY_CC2) ?
+			 TCPC_TCPC_CTRL_ORIENTATION : 0);
+}
+
+static int tcpci_set_vconn(struct tcpc_dev *tcpc, bool enable)
+{
+	struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
+	int ret;
+	unsigned int reg;
+
+	/* Handle vendor set vconn */
+	if (tcpci->data->set_vconn) {
+		ret = tcpci->data->set_vconn(tcpci, tcpci->data, enable);
+		if (ret < 0)
+			return ret;
+	}
+
+	reg = dm_i2c_reg_read(tcpci->dev, TCPC_POWER_CTRL);
+	if (reg)
+		return reg;
+	reg &= ~TCPC_POWER_CTRL_VCONN_ENABLE;
+	reg |= enable ? TCPC_POWER_CTRL_VCONN_ENABLE : 0;
+	return dm_i2c_reg_write(tcpci->dev, TCPC_POWER_CTRL, reg);
+}
+
+static int tcpci_set_roles(struct tcpc_dev *tcpc, bool attached,
+			   enum typec_role role, enum typec_data_role data)
+{
+	struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
+	unsigned int reg;
+	int ret;
+
+	reg = PD_REV20 << TCPC_MSG_HDR_INFO_REV_SHIFT;
+	if (role == TYPEC_SOURCE)
+		reg |= TCPC_MSG_HDR_INFO_PWR_ROLE;
+	if (data == TYPEC_HOST)
+		reg |= TCPC_MSG_HDR_INFO_DATA_ROLE;
+	ret = dm_i2c_reg_write(tcpci->dev, TCPC_MSG_HDR_INFO, reg);
+	if (ret < 0)
+		return ret;
+
+	return 0;
+}
+
+static int tcpci_set_pd_rx(struct tcpc_dev *tcpc, bool enable)
+{
+	struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
+	unsigned int reg = 0;
+	int ret;
+
+	if (enable)
+		reg = TCPC_RX_DETECT_SOP | TCPC_RX_DETECT_HARD_RESET;
+	ret = dm_i2c_reg_write(tcpci->dev, TCPC_RX_DETECT, reg);
+	if (ret < 0)
+		return ret;
+
+	return 0;
+}
+
+static int tcpci_get_vbus(struct tcpc_dev *tcpc)
+{
+	struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
+	unsigned int reg;
+
+	reg = dm_i2c_reg_read(tcpci->dev, TCPC_POWER_STATUS);
+	if (reg < 0)
+		return reg;
+
+	return !!(reg & TCPC_POWER_STATUS_VBUS_PRES);
+}
+
+static int tcpci_set_vbus(struct tcpc_dev *tcpc, bool source, bool sink)
+{
+	struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
+	int ret;
+
+	/* Disable both source and sink first before enabling anything */
+
+	if (!source) {
+		ret = dm_i2c_reg_write(tcpci->dev, TCPC_COMMAND,
+				       TCPC_CMD_DISABLE_SRC_VBUS);
+		if (ret < 0)
+			return ret;
+	}
+
+	if (!sink) {
+		ret = dm_i2c_reg_write(tcpci->dev, TCPC_COMMAND,
+				       TCPC_CMD_DISABLE_SINK_VBUS);
+		if (ret < 0)
+			return ret;
+	}
+
+	if (source) {
+		ret = dm_i2c_reg_write(tcpci->dev, TCPC_COMMAND,
+				       TCPC_CMD_SRC_VBUS_DEFAULT);
+		if (ret < 0)
+			return ret;
+	}
+
+	if (sink) {
+		ret = dm_i2c_reg_write(tcpci->dev, TCPC_COMMAND,
+				       TCPC_CMD_SINK_VBUS);
+		if (ret < 0)
+			return ret;
+	}
+
+	return 0;
+}
+
+static int tcpci_pd_transmit(struct tcpc_dev *tcpc,
+			     enum tcpm_transmit_type type,
+			     const struct pd_message *msg,
+			     unsigned int negotiated_rev)
+{
+	struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
+	u16 header = msg ? le16_to_cpu(msg->header) : 0;
+	unsigned int reg, cnt;
+	int ret;
+
+	cnt = msg ? pd_header_cnt(header) * 4 : 0;
+	ret = dm_i2c_reg_write(tcpci->dev, TCPC_TX_BYTE_CNT, cnt + 2);
+	if (ret < 0)
+		return ret;
+
+	ret = tcpci_write16(tcpci, TCPC_TX_HDR, header);
+	if (ret < 0)
+		return ret;
+
+	if (cnt > 0) {
+		ret = tcpci_block_write(tcpci, TCPC_TX_DATA,
+				       (u8 *)&msg->payload, cnt);
+		if (ret < 0)
+			return ret;
+	}
+
+	reg = (PD_RETRY_COUNT << TCPC_TRANSMIT_RETRY_SHIFT) |
+		(type << TCPC_TRANSMIT_TYPE_SHIFT);
+	ret = dm_i2c_reg_write(tcpci->dev, TCPC_TRANSMIT, reg);
+	if (ret < 0)
+		return ret;
+
+	return 0;
+}
+
+static int tcpci_init(struct tcpc_dev *tcpc)
+{
+	struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
+	unsigned int timeout = 0; /* XXX */
+	unsigned int reg;
+	int ret;
+
+	while (timeout < 100) {
+		reg = dm_i2c_reg_read(tcpci->dev, TCPC_POWER_STATUS);
+		if (reg < 0)
+			return reg;
+		if (!(reg & TCPC_POWER_STATUS_UNINIT))
+			break;
+		timeout++;
+		udelay(200);
+	}
+	if (timeout >= 100)
+		return -ETIMEDOUT;
+
+	/* Handle vendor init */
+	if (tcpci->data->init) {
+		ret = tcpci->data->init(tcpci, tcpci->data);
+		if (ret < 0)
+			return ret;
+	}
+
+	/* Clear all events */
+	ret = tcpci_write16(tcpci, TCPC_ALERT, 0xffff);
+	if (ret < 0)
+		return ret;
+
+	if (tcpci->controls_vbus)
+		reg = TCPC_POWER_STATUS_VBUS_PRES;
+	else
+		reg = 0;
+	ret = dm_i2c_reg_write(tcpci->dev, TCPC_POWER_STATUS_MASK, reg);
+	if (ret < 0)
+		return ret;
+
+	/* Enable Vbus detection */
+	ret = dm_i2c_reg_write(tcpci->dev, TCPC_COMMAND,
+			       TCPC_CMD_ENABLE_VBUS_DETECT);
+	if (ret < 0)
+		return ret;
+
+	reg = TCPC_ALERT_TX_SUCCESS | TCPC_ALERT_TX_FAILED |
+		TCPC_ALERT_TX_DISCARDED | TCPC_ALERT_RX_STATUS |
+		TCPC_ALERT_RX_HARD_RST | TCPC_ALERT_CC_STATUS;
+	if (tcpci->controls_vbus)
+		reg |= TCPC_ALERT_POWER_STATUS;
+	return tcpci_write16(tcpci, TCPC_ALERT_MASK, reg);
+}
+
+static void tcpci_poll_event(struct tcpc_dev *tcpc)
+{
+	u16 status;
+	struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
+
+	if (tcpci->gpio_cc_int_present)
+		if (!dm_gpio_get_value(&tcpci->gpio_cc_int))
+			return;
+
+	tcpci_read16(tcpci, TCPC_ALERT, &status);
+
+	/*
+	 * Clear alert status for everything except RX_STATUS, which shouldn't
+	 * be cleared until we have successfully retrieved message.
+	 */
+	if (status & ~TCPC_ALERT_RX_STATUS)
+		tcpci_write16(tcpci, TCPC_ALERT,
+			      status & ~TCPC_ALERT_RX_STATUS);
+
+	if (status & TCPC_ALERT_CC_STATUS)
+		tcpm_cc_change(tcpci->port);
+
+	if (status & TCPC_ALERT_POWER_STATUS) {
+		unsigned int reg;
+
+		reg = dm_i2c_reg_read(tcpci->dev, TCPC_POWER_STATUS_MASK);
+		if (reg < 0)
+			return;
+
+		/*
+		 * If power status mask has been reset, then the TCPC
+		 * has reset.
+		 */
+		if (reg == 0xff)
+			tcpm_tcpc_reset(tcpci->port);
+		else
+			tcpm_vbus_change(tcpci->port);
+	}
+
+	if (status & TCPC_ALERT_RX_STATUS) {
+		struct pd_message msg;
+		unsigned int cnt, payload_cnt;
+		u16 header;
+
+		cnt = dm_i2c_reg_read(tcpci->dev, TCPC_RX_BYTE_CNT);
+		if (cnt < 0)
+			return;
+		/*
+		 * 'cnt' corresponds to READABLE_BYTE_COUNT in section 4.4.14
+		 * of the TCPCI spec [Rev 2.0 Ver 1.0 October 2017] and is
+		 * defined in table 4-36 as one greater than the number of
+		 * bytes received. And that number includes the header. So:
+		 */
+		if (cnt > 3)
+			payload_cnt = cnt - (1 + sizeof(msg.header));
+		else
+			payload_cnt = 0;
+
+		tcpci_read16(tcpci, TCPC_RX_HDR, &header);
+		msg.header = cpu_to_le16(header);
+
+		if (WARN_ON(payload_cnt > sizeof(msg.payload)))
+			payload_cnt = sizeof(msg.payload);
+
+		if (payload_cnt > 0)
+			tcpci_block_read(tcpci, TCPC_RX_DATA,
+					(u8 *)&msg.payload, payload_cnt);
+
+		/* Read complete, clear RX status alert bit */
+		tcpci_write16(tcpci, TCPC_ALERT, TCPC_ALERT_RX_STATUS);
+
+		tcpm_pd_receive(tcpci->port, &msg);
+	}
+
+	if (status & TCPC_ALERT_RX_HARD_RST)
+		tcpm_pd_hard_reset(tcpci->port);
+
+	if (status & TCPC_ALERT_TX_SUCCESS)
+		tcpm_pd_transmit_complete(tcpci->port, TCPC_TX_SUCCESS);
+	else if (status & TCPC_ALERT_TX_DISCARDED)
+		tcpm_pd_transmit_complete(tcpci->port, TCPC_TX_DISCARDED);
+	else if (status & TCPC_ALERT_TX_FAILED)
+		tcpm_pd_transmit_complete(tcpci->port, TCPC_TX_FAILED);
+}
+
+static int tcpci_enter_low_power_mode(struct tcpc_dev *tcpc,
+				      bool attached, bool pd_capable)
+{
+	int ret;
+	struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
+	unsigned int reg;
+
+	/* Disable chip interrupts before unregistering port */
+	ret = tcpci_write16(tcpci, TCPC_ALERT_MASK, 0);
+	if (ret < 0)
+		return ret;
+
+	reg = dm_i2c_reg_read(tcpci->dev, TCPC_BMCIO_CTRL);
+	if (reg < 0)
+		return reg;
+	/*
+	 * For Type-C devices with PD capability, Only disable VBUS detect,
+	 * do not diable 24M oscillator for BMC communication. Otherwise,
+	 * data packets cannot be received.
+	 */
+	if (attached && pd_capable)
+		reg &= ~TCPC_BMCIO_VBUS_DETECT_MASK;
+	else
+		reg &= ~(TCPC_BMCIO_VBUS_DETECT_MASK | TCPC_BMCIO_24M_OSC_MASK);
+	return dm_i2c_reg_write(tcpci->dev, TCPC_BMCIO_CTRL, reg);
+}
+
+static int tcpci_parse_config(struct tcpci *tcpci)
+{
+	tcpci->controls_vbus = true; /* XXX */
+
+	tcpci->tcpc.connector_node = dev_read_subnode(tcpci->dev, "connector");
+	if (!ofnode_valid(tcpci->tcpc.connector_node)) {
+		printf("%s: 'connector' node is not found\n", __func__);
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+struct tcpci *tcpci_register_port(struct udevice *dev, struct tcpci_data *data)
+{
+	struct tcpci *tcpci;
+	int err;
+
+	tcpci = devm_kzalloc(dev, sizeof(*tcpci), GFP_KERNEL);
+	if (!tcpci)
+		return ERR_PTR(-ENOMEM);
+
+	err = gpio_request_by_name(dev, "int-n-gpios", 0, &tcpci->gpio_cc_int, GPIOD_IS_IN);
+	if (err) {
+		printf("%s: fail to get int GPIO: err=%d\n", __func__, err);
+		tcpci->gpio_cc_int_present = false;
+	} else {
+		tcpci->gpio_cc_int_present = true;
+	}
+
+	tcpci->dev = dev;
+	tcpci->data = data;
+
+	tcpci->tcpc.init = tcpci_init;
+	tcpci->tcpc.get_vbus = tcpci_get_vbus;
+	tcpci->tcpc.set_vbus = tcpci_set_vbus;
+	tcpci->tcpc.set_cc = tcpci_set_cc;
+	tcpci->tcpc.get_cc = tcpci_get_cc;
+	tcpci->tcpc.set_polarity = tcpci_set_polarity;
+	tcpci->tcpc.set_vconn = tcpci_set_vconn;
+	tcpci->tcpc.start_toggling = tcpci_start_toggling;
+
+	tcpci->tcpc.set_pd_rx = tcpci_set_pd_rx;
+	tcpci->tcpc.set_roles = tcpci_set_roles;
+	tcpci->tcpc.pd_transmit = tcpci_pd_transmit;
+	tcpci->tcpc.poll_event = tcpci_poll_event;
+	tcpci->tcpc.enter_low_power_mode = tcpci_enter_low_power_mode;
+
+	err = tcpci_parse_config(tcpci);
+	if (err < 0)
+		return ERR_PTR(err);
+
+	tcpci->port = tcpm_port_init(tcpci->dev, &tcpci->tcpc);
+	if (IS_ERR(tcpci->port)) {
+		printf("%s: failed to tcpm port init\n", __func__);
+		return ERR_CAST(tcpci->port);
+	}
+
+	tcpm_poll_event(tcpci->port);
+
+	return tcpci;
+}
+EXPORT_SYMBOL_GPL(tcpci_register_port);
+
+void tcpci_unregister_port(struct tcpci *tcpci)
+{
+	tcpm_uninit_port(tcpci->port);
+}
+EXPORT_SYMBOL_GPL(tcpci_unregister_port);
+
+int tcpci_get_voltage_fun(struct tcpci *tcpci)
+{
+	return tcpm_get_voltage(tcpci->port);
+}
+EXPORT_SYMBOL_GPL(tcpci_get_voltage_fun);
+
+int tcpci_get_current_fun(struct tcpci *tcpci)
+{
+	return tcpm_get_current(tcpci->port);
+}
+EXPORT_SYMBOL_GPL(tcpci_get_current_fun);
+
+int tcpci_get_online_fun(struct tcpci *tcpci)
+{
+	return tcpm_get_online(tcpci->port);
+}
+EXPORT_SYMBOL_GPL(tcpci_get_online_fun);
+
+static int tcpci_probe(struct udevice *dev)
+{
+	struct tcpci_chip *chip = dev_get_priv(dev);
+	int err;
+	u16 val = 0;
+
+	chip->udev = dev;
+
+	/* Disable chip interrupts before requesting irq */
+	err = tcpci_write16(chip->tcpci, TCPC_ALERT_MASK, val);
+	if (err < 0)
+		return err;
+
+	chip->tcpci = tcpci_register_port(chip->udev, &chip->data);
+	if (IS_ERR(chip->tcpci))
+		return PTR_ERR(chip->tcpci);
+
+	return 0;
+}
+
+static int tcpci_remove(struct udevice *dev)
+{
+	struct tcpci_chip *chip = dev_get_priv(dev);
+	int err;
+
+	/* Disable chip interrupts before unregistering port */
+	err = tcpci_write16(chip->tcpci, TCPC_ALERT_MASK, 0);
+	if (err < 0)
+		return err;
+
+	tcpci_unregister_port(chip->tcpci);
+
+	return 0;
+}
+
+static int tcpci_get_voltage(struct udevice *dev)
+{
+	struct tcpci_chip *chip = dev_get_priv(dev);
+
+	return tcpm_get_voltage(chip->tcpci->port);
+}
+
+static int tcpci_get_current(struct udevice *dev)
+{
+	struct tcpci_chip *chip = dev_get_priv(dev);
+
+	return tcpm_get_current(chip->tcpci->port);
+}
+
+static int tcpci_get_online(struct udevice *dev)
+{
+	struct tcpci_chip *chip = dev_get_priv(dev);
+
+	return tcpm_get_online(chip->tcpci->port);
+}
+
+static struct dm_power_delivery_ops tcpci_ops = {
+	.get_voltage = tcpci_get_voltage,
+	.get_current = tcpci_get_current,
+	.get_online = tcpci_get_online,
+};
+
+static const struct udevice_id tcpci_ids[] = {
+	{ .compatible = "nxp,ptn5110", },
+	{},
+};
+
+U_BOOT_DRIVER(tcpci) = {
+	.name = "tcpci",
+	.id = UCLASS_PD,
+	.of_match = tcpci_ids,
+	.ops = &tcpci_ops,
+	.probe = tcpci_probe,
+	.remove = tcpci_remove,
+	.priv_auto_alloc_size = sizeof(struct tcpci_chip),
+}
+
+MODULE_DESCRIPTION("USB Type-C Port Controller Interface driver");
+MODULE_LICENSE("GPL");
diff --git a/drivers/power/power_delivery/tcpci.h b/drivers/power/power_delivery/tcpci.h
new file mode 100644
index 0000000000..ae25052664
--- /dev/null
+++ b/drivers/power/power_delivery/tcpci.h
@@ -0,0 +1,150 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2015-2017 Google, Inc
+ *
+ * USB Type-C Port Controller Interface.
+ */
+
+#ifndef __LINUX_USB_TCPCI_H
+#define __LINUX_USB_TCPCI_H
+
+#define TCPC_VENDOR_ID			0x0
+#define TCPC_PRODUCT_ID			0x2
+#define TCPC_BCD_DEV			0x4
+#define TCPC_TC_REV			0x6
+#define TCPC_PD_REV			0x8
+#define TCPC_PD_INT_REV			0xa
+
+#define TCPC_ALERT			0x10
+#define TCPC_ALERT_VBUS_DISCNCT		BIT(11)
+#define TCPC_ALERT_RX_BUF_OVF		BIT(10)
+#define TCPC_ALERT_FAULT		BIT(9)
+#define TCPC_ALERT_V_ALARM_LO		BIT(8)
+#define TCPC_ALERT_V_ALARM_HI		BIT(7)
+#define TCPC_ALERT_TX_SUCCESS		BIT(6)
+#define TCPC_ALERT_TX_DISCARDED		BIT(5)
+#define TCPC_ALERT_TX_FAILED		BIT(4)
+#define TCPC_ALERT_RX_HARD_RST		BIT(3)
+#define TCPC_ALERT_RX_STATUS		BIT(2)
+#define TCPC_ALERT_POWER_STATUS		BIT(1)
+#define TCPC_ALERT_CC_STATUS		BIT(0)
+
+#define TCPC_ALERT_MASK			0x12
+#define TCPC_POWER_STATUS_MASK		0x14
+#define TCPC_FAULT_STATUS_MASK		0x15
+#define TCPC_CONFIG_STD_OUTPUT		0x18
+
+#define TCPC_TCPC_CTRL			0x19
+#define TCPC_TCPC_CTRL_ORIENTATION	BIT(0)
+
+#define TCPC_ROLE_CTRL			0x1a
+#define TCPC_ROLE_CTRL_DRP		BIT(6)
+#define TCPC_ROLE_CTRL_RP_VAL_SHIFT	4
+#define TCPC_ROLE_CTRL_RP_VAL_MASK	0x3
+#define TCPC_ROLE_CTRL_RP_VAL_DEF	0x0
+#define TCPC_ROLE_CTRL_RP_VAL_1_5	0x1
+#define TCPC_ROLE_CTRL_RP_VAL_3_0	0x2
+#define TCPC_ROLE_CTRL_CC2_SHIFT	2
+#define TCPC_ROLE_CTRL_CC2_MASK		0x3
+#define TCPC_ROLE_CTRL_CC1_SHIFT	0
+#define TCPC_ROLE_CTRL_CC1_MASK		0x3
+#define TCPC_ROLE_CTRL_CC_RA		0x0
+#define TCPC_ROLE_CTRL_CC_RP		0x1
+#define TCPC_ROLE_CTRL_CC_RD		0x2
+#define TCPC_ROLE_CTRL_CC_OPEN		0x3
+
+#define TCPC_FAULT_CTRL			0x1b
+
+#define TCPC_POWER_CTRL			0x1c
+#define TCPC_POWER_CTRL_VCONN_ENABLE	BIT(0)
+
+#define TCPC_CC_STATUS			0x1d
+#define TCPC_CC_STATUS_TOGGLING		BIT(5)
+#define TCPC_CC_STATUS_TERM		BIT(4)
+#define TCPC_CC_STATUS_CC2_SHIFT	2
+#define TCPC_CC_STATUS_CC2_MASK		0x3
+#define TCPC_CC_STATUS_CC1_SHIFT	0
+#define TCPC_CC_STATUS_CC1_MASK		0x3
+
+#define TCPC_POWER_STATUS		0x1e
+#define TCPC_POWER_STATUS_UNINIT	BIT(6)
+#define TCPC_POWER_STATUS_VBUS_DET	BIT(3)
+#define TCPC_POWER_STATUS_VBUS_PRES	BIT(2)
+
+#define TCPC_FAULT_STATUS		0x1f
+
+#define TCPC_COMMAND			0x23
+#define TCPC_CMD_WAKE_I2C		0x11
+#define TCPC_CMD_DISABLE_VBUS_DETECT	0x22
+#define TCPC_CMD_ENABLE_VBUS_DETECT	0x33
+#define TCPC_CMD_DISABLE_SINK_VBUS	0x44
+#define TCPC_CMD_SINK_VBUS		0x55
+#define TCPC_CMD_DISABLE_SRC_VBUS	0x66
+#define TCPC_CMD_SRC_VBUS_DEFAULT	0x77
+#define TCPC_CMD_SRC_VBUS_HIGH		0x88
+#define TCPC_CMD_LOOK4CONNECTION	0x99
+#define TCPC_CMD_RXONEMORE		0xAA
+#define TCPC_CMD_I2C_IDLE		0xFF
+
+#define TCPC_DEV_CAP_1			0x24
+#define TCPC_DEV_CAP_2			0x26
+#define TCPC_STD_INPUT_CAP		0x28
+#define TCPC_STD_OUTPUT_CAP		0x29
+
+#define TCPC_MSG_HDR_INFO		0x2e
+#define TCPC_MSG_HDR_INFO_DATA_ROLE	BIT(3)
+#define TCPC_MSG_HDR_INFO_PWR_ROLE	BIT(0)
+#define TCPC_MSG_HDR_INFO_REV_SHIFT	1
+#define TCPC_MSG_HDR_INFO_REV_MASK	0x3
+
+#define TCPC_RX_DETECT			0x2f
+#define TCPC_RX_DETECT_HARD_RESET	BIT(5)
+#define TCPC_RX_DETECT_SOP		BIT(0)
+
+#define TCPC_RX_BYTE_CNT		0x30
+#define TCPC_RX_BUF_FRAME_TYPE		0x31
+#define TCPC_RX_HDR			0x32
+#define TCPC_RX_DATA			0x34 /* through 0x4f */
+
+#define TCPC_TRANSMIT			0x50
+#define TCPC_TRANSMIT_RETRY_SHIFT	4
+#define TCPC_TRANSMIT_RETRY_MASK	0x3
+#define TCPC_TRANSMIT_TYPE_SHIFT	0
+#define TCPC_TRANSMIT_TYPE_MASK		0x7
+
+#define TCPC_TX_BYTE_CNT		0x51
+#define TCPC_TX_HDR			0x52
+#define TCPC_TX_DATA			0x54 /* through 0x6f */
+
+#define TCPC_VBUS_VOLTAGE			0x70
+#define TCPC_VBUS_SINK_DISCONNECT_THRESH	0x72
+#define TCPC_VBUS_STOP_DISCHARGE_THRESH		0x74
+#define TCPC_VBUS_VOLTAGE_ALARM_HI_CFG		0x76
+#define TCPC_VBUS_VOLTAGE_ALARM_LO_CFG		0x78
+
+#define TCPC_BMCIO_CTRL				0x90
+#define TCPC_BMCIO_VBUS_DETECT_MASK		BIT(1)
+#define TCPC_BMCIO_VBUS_DETECT_ENABLE		BIT(1)
+#define TCPC_BMCIO_VBUS_DETECT_DISABLE		0
+#define TCPC_BMCIO_24M_OSC_MASK                 BIT(0)
+#define TCPC_BMCIO_ENABLE_24M_OSC		BIT(0)
+#define TCPC_BMCIO_DISABLE_24M_OSC		0
+
+struct tcpci;
+struct tcpci_data {
+	struct regmap *regmap;
+	int (*init)(struct tcpci *tcpci, struct tcpci_data *data);
+	int (*set_vconn)(struct tcpci *tcpci, struct tcpci_data *data,
+			 bool enable);
+	int (*start_drp_toggling)(struct tcpci *tcpci, struct tcpci_data *data,
+				  enum typec_cc_status cc);
+};
+
+struct tcpci *tcpci_register_port(struct udevice *dev, struct tcpci_data *data);
+void tcpci_unregister_port(struct tcpci *tcpci);
+int tcpci_get_voltage_fun(struct tcpci *tcpci);
+int tcpci_get_current_fun(struct tcpci *tcpci);
+int tcpci_get_online_fun(struct tcpci *tcpci);
+irqreturn_t tcpci_irq(struct tcpci *tcpci);
+
+#endif /* __LINUX_USB_TCPCI_H */
diff --git a/drivers/power/power_delivery/tcpci_husb311.c b/drivers/power/power_delivery/tcpci_husb311.c
new file mode 100644
index 0000000000..cb2a5145ec
--- /dev/null
+++ b/drivers/power/power_delivery/tcpci_husb311.c
@@ -0,0 +1,229 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2021 Rockchip Co.,Ltd.
+ * Author: Wang Jie <dave.wang@rock-chips.com>
+ *
+ * Hynetek Husb311 Type-C Chip Driver
+ */
+
+#include <dm.h>
+#include <i2c.h>
+#include <asm/gpio.h>
+#include <power/power_delivery/tcpm.h>
+#include <power/power_delivery/power_delivery.h>
+#include "tcpci.h"
+
+#define HUSB311_VID		0x2E99
+#define HUSB311_PID		0x0311
+#define HUSB311_TCPC_I2C_RESET	0x9E
+#define HUSB311_TCPC_SOFTRESET	0xA0
+#define HUSB311_TCPC_FILTER	0xA1
+#define HUSB311_TCPC_TDRP	0xA2
+#define HUSB311_TCPC_DCSRCDRP	0xA3
+#define HUSB311_I2C_RETRY_MAX_CNT 3
+
+struct husb311_chip {
+	struct udevice *udev;
+	struct tcpci_data data;
+	struct tcpci *tcpci;
+};
+
+static int husb311_read16(struct husb311_chip *chip, unsigned int reg)
+{
+	int ret = 0;
+	u8 buffer[2];
+
+	ret = dm_i2c_read(chip->udev, reg, buffer, 2);
+	if (ret < 0) {
+		printf("%s: cannot read %02x, ret=%d\n",
+			__func__, reg, ret);
+		return ret;
+	}
+	ret = ((buffer[1] << 8) & 0xFF00) + (buffer[0] & 0xFF);
+
+	return ret;
+}
+
+static int husb311_write8(struct husb311_chip *chip, unsigned int reg, u8 val)
+{
+	int ret = 0;
+	int i;
+
+	for (i = 0; i < HUSB311_I2C_RETRY_MAX_CNT; i++) {
+		ret = dm_i2c_write(chip->udev, reg, &val, 1);
+		if (!ret)
+			break;
+		else
+			udelay(200);
+	}
+
+	if (ret)
+		printf("%s: cannot write 0x%02x to 0x%02x, ret=%d\n",
+			__func__, val, reg, ret);
+
+	return ret;
+}
+
+static int husb311_write16(struct husb311_chip *chip, unsigned int reg, u16 val)
+{
+	int ret = 0;
+	u8 buffer[2];
+
+	buffer[0] = val & 0xFF;
+	buffer[1] = (val >> 8) & 0xFF;
+	ret = dm_i2c_write(chip->udev, reg, buffer, 2);
+	if (ret)
+		printf("%s: cannot write 0x%02x, len=%d, ret=%d\n",
+			__func__, reg, 2, ret);
+
+	return ret;
+}
+
+static struct husb311_chip *tdata_to_husb311(struct tcpci_data *tdata)
+{
+	return container_of(tdata, struct husb311_chip, data);
+}
+
+static int husb311_sw_reset(struct husb311_chip *chip)
+{
+	/* soft reset */
+	return husb311_write8(chip, HUSB311_TCPC_SOFTRESET, 0x01);
+}
+
+static int husb311_init(struct tcpci *tcpci, struct tcpci_data *tdata)
+{
+	int ret;
+	struct husb311_chip *chip = tdata_to_husb311(tdata);
+
+	/* I2C reset : (val + 1) * 12.5ms */
+	ret = husb311_write8(chip, HUSB311_TCPC_I2C_RESET, 0x8F);
+	/* tTCPCfilter : (26.7 * val) us */
+	ret |= husb311_write8(chip, HUSB311_TCPC_FILTER, 0x0F);
+	/* tDRP : (51.2 + 6.4 * val) ms */
+	ret |= husb311_write8(chip, HUSB311_TCPC_TDRP, 0x04);
+	/* dcSRC.DRP : 33% */
+	ret |= husb311_write16(chip, HUSB311_TCPC_DCSRCDRP, 330);
+
+	if (ret)
+		printf("%s: fail to init registers(%d)\n", __func__, ret);
+
+	return ret;
+}
+
+static int husb311_check_revision(struct husb311_chip *chip)
+{
+	int ret;
+
+	ret = husb311_read16(chip, TCPC_VENDOR_ID);
+	if (ret < 0) {
+		printf("%s: fail to read Vendor id(%d)\n", __func__, ret);
+		return ret;
+	}
+
+	if (ret != HUSB311_VID) {
+		printf("%s: vid is not correct, 0x%04x\n", __func__, ret);
+		return -ENODEV;
+	}
+
+	ret = husb311_read16(chip, TCPC_PRODUCT_ID);
+	if (ret < 0) {
+		printf("%s: fail to read Product id(%d)\n", __func__, ret);
+		return ret;
+	}
+
+	if (ret != HUSB311_PID) {
+		printf("%s: pid is not correct, 0x%04x\n", __func__, ret);
+		return -ENODEV;
+	}
+
+	return 0;
+}
+
+static int husb311_probe(struct udevice *dev)
+{
+	int ret;
+	struct husb311_chip *chip = dev_get_priv(dev);
+
+	chip->udev = dev;
+
+	ret = husb311_check_revision(chip);
+	if (ret < 0) {
+		printf("%s: check vid/pid fail(%d)\n", __func__, ret);
+		return ret;
+	}
+
+	ret = husb311_sw_reset(chip);
+	if (ret) {
+		printf("%s: fail to soft reset, ret = %d\n", __func__, ret);
+		return ret;
+	}
+
+	chip->data.init = husb311_init;
+	chip->tcpci = tcpci_register_port(chip->udev, &chip->data);
+	if (IS_ERR(chip->tcpci))
+		return PTR_ERR(chip->tcpci);
+
+	return 0;
+}
+
+static int husb311_remove(struct udevice *dev)
+{
+	struct husb311_chip *chip = dev_get_priv(dev);
+	int ret = 0;
+
+	printf("PD chip husb311 remove\n");
+	/* Disable chip interrupts before unregistering port */
+	ret = husb311_write16(chip, TCPC_ALERT_MASK, 0);
+	if (ret < 0)
+		return ret;
+
+	tcpci_unregister_port(chip->tcpci);
+
+	return 0;
+}
+
+static int husb311_get_voltage(struct udevice *dev)
+{
+	struct husb311_chip *chip = dev_get_priv(dev);
+
+	return tcpci_get_voltage_fun(chip->tcpci);
+}
+
+static int husb311_get_current(struct udevice *dev)
+{
+	struct husb311_chip *chip = dev_get_priv(dev);
+
+	return tcpci_get_current_fun(chip->tcpci);
+}
+
+static int husb311_get_online(struct udevice *dev)
+{
+	struct husb311_chip *chip = dev_get_priv(dev);
+
+	return tcpci_get_online_fun(chip->tcpci);
+}
+
+static struct dm_power_delivery_ops husb311_ops = {
+	.get_voltage = husb311_get_voltage,
+	.get_current = husb311_get_current,
+	.get_online = husb311_get_online,
+};
+
+static const struct udevice_id husb311_ids[] = {
+	{ .compatible = "hynetek,husb311" },
+	{},
+};
+
+U_BOOT_DRIVER(husb311) = {
+	.name = "husb311",
+	.id = UCLASS_PD,
+	.of_match = husb311_ids,
+	.ops = &husb311_ops,
+	.probe = husb311_probe,
+	.remove = husb311_remove,
+	.priv_auto_alloc_size = sizeof(struct husb311_chip),
+};
+
+MODULE_AUTHOR("Wang Jie <dave.wang@rock-chips.com>");
+MODULE_DESCRIPTION("Husb311 USB Type-C Port Controller Interface Driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/power/power_delivery/tcpm.c b/drivers/power/power_delivery/tcpm.c
new file mode 100644
index 0000000000..22334c6230
--- /dev/null
+++ b/drivers/power/power_delivery/tcpm.c
@@ -0,0 +1,3532 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2015-2017 Google, Inc
+ *
+ * USB Power Delivery protocol stack.
+ */
+
+#include <asm/io.h>
+#include <common.h>
+#include <dm.h>
+#include <asm/gpio.h>
+#include <irq-generic.h>
+#include <rk_timer_irq.h>
+#include <power/power_delivery/tcpm.h>
+#include <power/power_delivery/pd_vdo.h>
+
+#define FOREACH_STATE(S)			\
+	S(INVALID_STATE),			\
+	S(TOGGLING),			\
+	S(SRC_UNATTACHED),			\
+	S(SRC_ATTACH_WAIT),			\
+	S(SRC_ATTACHED),			\
+	S(SRC_STARTUP),				\
+	S(SRC_SEND_CAPABILITIES),		\
+	S(SRC_SEND_CAPABILITIES_TIMEOUT),	\
+	S(SRC_NEGOTIATE_CAPABILITIES),		\
+	S(SRC_TRANSITION_SUPPLY),		\
+	S(SRC_READY),				\
+	S(SRC_WAIT_NEW_CAPABILITIES),		\
+						\
+	S(SNK_UNATTACHED),			\
+	S(SNK_ATTACH_WAIT),			\
+	S(SNK_DEBOUNCED),			\
+	S(SNK_ATTACHED),			\
+	S(SNK_STARTUP),				\
+	S(SNK_DISCOVERY),			\
+	S(SNK_DISCOVERY_DEBOUNCE),		\
+	S(SNK_DISCOVERY_DEBOUNCE_DONE),		\
+	S(SNK_WAIT_CAPABILITIES),		\
+	S(SNK_NEGOTIATE_CAPABILITIES),		\
+	S(SNK_NEGOTIATE_PPS_CAPABILITIES),	\
+	S(SNK_TRANSITION_SINK),			\
+	S(SNK_TRANSITION_SINK_VBUS),		\
+	S(SNK_READY),				\
+						\
+	S(ACC_UNATTACHED),			\
+	S(DEBUG_ACC_ATTACHED),			\
+	S(AUDIO_ACC_ATTACHED),			\
+	S(AUDIO_ACC_DEBOUNCE),			\
+						\
+	S(HARD_RESET_SEND),			\
+	S(HARD_RESET_START),			\
+	S(SRC_HARD_RESET_VBUS_OFF),		\
+	S(SRC_HARD_RESET_VBUS_ON),		\
+	S(SNK_HARD_RESET_SINK_OFF),		\
+	S(SNK_HARD_RESET_WAIT_VBUS),		\
+	S(SNK_HARD_RESET_SINK_ON),		\
+						\
+	S(SOFT_RESET),				\
+	S(SRC_SOFT_RESET_WAIT_SNK_TX),		\
+	S(SNK_SOFT_RESET),			\
+	S(SOFT_RESET_SEND),			\
+						\
+	S(DR_SWAP_ACCEPT),			\
+	S(DR_SWAP_SEND),			\
+	S(DR_SWAP_SEND_TIMEOUT),		\
+	S(DR_SWAP_CANCEL),			\
+	S(DR_SWAP_CHANGE_DR),			\
+						\
+	S(PR_SWAP_ACCEPT),			\
+	S(PR_SWAP_SEND),			\
+	S(PR_SWAP_SEND_TIMEOUT),		\
+	S(PR_SWAP_CANCEL),			\
+	S(PR_SWAP_START),			\
+	S(PR_SWAP_SRC_SNK_TRANSITION_OFF),	\
+	S(PR_SWAP_SRC_SNK_SOURCE_OFF),		\
+	S(PR_SWAP_SRC_SNK_SOURCE_OFF_CC_DEBOUNCED), \
+	S(PR_SWAP_SRC_SNK_SINK_ON),		\
+	S(PR_SWAP_SNK_SRC_SINK_OFF),		\
+	S(PR_SWAP_SNK_SRC_SOURCE_ON),		\
+	S(PR_SWAP_SNK_SRC_SOURCE_ON_VBUS_RAMPED_UP),    \
+						\
+	S(VCONN_SWAP_ACCEPT),			\
+	S(VCONN_SWAP_SEND),			\
+	S(VCONN_SWAP_SEND_TIMEOUT),		\
+	S(VCONN_SWAP_CANCEL),			\
+	S(VCONN_SWAP_START),			\
+	S(VCONN_SWAP_WAIT_FOR_VCONN),		\
+	S(VCONN_SWAP_TURN_ON_VCONN),		\
+	S(VCONN_SWAP_TURN_OFF_VCONN),		\
+						\
+	S(FR_SWAP_SEND),			\
+	S(FR_SWAP_SEND_TIMEOUT),		\
+	S(FR_SWAP_SNK_SRC_TRANSITION_TO_OFF),			\
+	S(FR_SWAP_SNK_SRC_NEW_SINK_READY),		\
+	S(FR_SWAP_SNK_SRC_SOURCE_VBUS_APPLIED),	\
+	S(FR_SWAP_CANCEL),			\
+						\
+	S(SNK_TRY),				\
+	S(SNK_TRY_WAIT),			\
+	S(SNK_TRY_WAIT_DEBOUNCE),               \
+	S(SNK_TRY_WAIT_DEBOUNCE_CHECK_VBUS),    \
+	S(SRC_TRYWAIT),				\
+	S(SRC_TRYWAIT_DEBOUNCE),		\
+	S(SRC_TRYWAIT_UNATTACHED),		\
+						\
+	S(SRC_TRY),				\
+	S(SRC_TRY_WAIT),                        \
+	S(SRC_TRY_DEBOUNCE),			\
+	S(SNK_TRYWAIT),				\
+	S(SNK_TRYWAIT_DEBOUNCE),		\
+	S(SNK_TRYWAIT_VBUS),			\
+	S(BIST_RX),				\
+						\
+	S(GET_STATUS_SEND),			\
+	S(GET_STATUS_SEND_TIMEOUT),		\
+	S(GET_PPS_STATUS_SEND),			\
+	S(GET_PPS_STATUS_SEND_TIMEOUT),		\
+						\
+	S(GET_SINK_CAP),			\
+	S(GET_SINK_CAP_TIMEOUT),		\
+						\
+	S(ERROR_RECOVERY),			\
+	S(PORT_RESET),				\
+	S(PORT_RESET_WAIT_OFF),			\
+						\
+	S(AMS_START),				\
+	S(CHUNK_NOT_SUPP)
+
+#define FOREACH_AMS(S)				\
+	S(NONE_AMS),				\
+	S(POWER_NEGOTIATION),			\
+	S(GOTOMIN),				\
+	S(SOFT_RESET_AMS),			\
+	S(HARD_RESET),				\
+	S(CABLE_RESET),				\
+	S(GET_SOURCE_CAPABILITIES),		\
+	S(GET_SINK_CAPABILITIES),		\
+	S(POWER_ROLE_SWAP),			\
+	S(FAST_ROLE_SWAP),			\
+	S(DATA_ROLE_SWAP),			\
+	S(VCONN_SWAP),				\
+	S(SOURCE_ALERT),			\
+	S(GETTING_SOURCE_EXTENDED_CAPABILITIES),\
+	S(GETTING_SOURCE_SINK_STATUS),		\
+	S(GETTING_BATTERY_CAPABILITIES),	\
+	S(GETTING_BATTERY_STATUS),		\
+	S(GETTING_MANUFACTURER_INFORMATION),	\
+	S(SECURITY),				\
+	S(FIRMWARE_UPDATE),			\
+	S(DISCOVER_IDENTITY),			\
+	S(SOURCE_STARTUP_CABLE_PLUG_DISCOVER_IDENTITY),	\
+	S(DISCOVER_SVIDS),			\
+	S(DISCOVER_MODES),			\
+	S(DFP_TO_UFP_ENTER_MODE),		\
+	S(DFP_TO_UFP_EXIT_MODE),		\
+	S(DFP_TO_CABLE_PLUG_ENTER_MODE),	\
+	S(DFP_TO_CABLE_PLUG_EXIT_MODE),		\
+	S(ATTENTION),				\
+	S(BIST),				\
+	S(UNSTRUCTURED_VDMS),			\
+	S(STRUCTURED_VDMS),			\
+	S(COUNTRY_INFO),			\
+	S(COUNTRY_CODES)
+
+#define GENERATE_ENUM(e)	e
+#define GENERATE_STRING(s)	#s
+#define TCPM_POLL_EVENT_TIME_OUT 2000
+
+enum tcpm_state {
+	FOREACH_STATE(GENERATE_ENUM)
+};
+
+static const char * const tcpm_states[] = {
+	FOREACH_STATE(GENERATE_STRING)
+};
+
+enum tcpm_ams {
+	FOREACH_AMS(GENERATE_ENUM)
+};
+
+static const char * const tcpm_ams_str[] = {
+	FOREACH_AMS(GENERATE_STRING)
+};
+
+enum vdm_states {
+	VDM_STATE_ERR_BUSY = -3,
+	VDM_STATE_ERR_SEND = -2,
+	VDM_STATE_ERR_TMOUT = -1,
+	VDM_STATE_DONE = 0,
+	/* Anything >0 represents an active state */
+	VDM_STATE_READY = 1,
+	VDM_STATE_BUSY = 2,
+	VDM_STATE_WAIT_RSP_BUSY = 3,
+	VDM_STATE_SEND_MESSAGE = 4,
+};
+
+enum pd_msg_request {
+	PD_MSG_NONE = 0,
+	PD_MSG_CTRL_REJECT,
+	PD_MSG_CTRL_WAIT,
+	PD_MSG_CTRL_NOT_SUPP,
+	PD_MSG_DATA_SINK_CAP,
+	PD_MSG_DATA_SOURCE_CAP,
+};
+
+enum adev_actions {
+	ADEV_NONE = 0,
+	ADEV_NOTIFY_USB_AND_QUEUE_VDM,
+	ADEV_QUEUE_VDM,
+	ADEV_QUEUE_VDM_SEND_EXIT_MODE_ON_FAIL,
+	ADEV_ATTENTION,
+};
+
+/*
+ * Initial current capability of the new source when vSafe5V is applied during PD3.0 Fast Role Swap.
+ * Based on "Table 6-14 Fixed Supply PDO - Sink" of "USB Power Delivery Specification Revision 3.0,
+ * Version 1.2"
+ */
+enum frs_typec_current {
+	FRS_NOT_SUPPORTED,
+	FRS_DEFAULT_POWER,
+	FRS_5V_1P5A,
+	FRS_5V_3A,
+};
+
+/* Events from low level driver */
+
+#define TCPM_CC_EVENT		BIT(0)
+#define TCPM_VBUS_EVENT		BIT(1)
+#define TCPM_RESET_EVENT	BIT(2)
+#define TCPM_FRS_EVENT		BIT(3)
+#define TCPM_SOURCING_VBUS	BIT(4)
+
+#define LOG_BUFFER_ENTRIES	1024
+#define LOG_BUFFER_ENTRY_SIZE	128
+
+/* Alternate mode support */
+
+#define SVID_DISCOVERY_MAX	16
+#define ALTMODE_DISCOVERY_MAX	(SVID_DISCOVERY_MAX * MODE_DISCOVERY_MAX)
+
+#define GET_SINK_CAP_RETRY_MS	100
+#define SEND_DISCOVER_RETRY_MS	100
+
+/*
+ * @min_volt: Actual min voltage at the local port
+ * @req_min_volt: Requested min voltage to the port partner
+ * @max_volt: Actual max voltage at the local port
+ * @req_max_volt: Requested max voltage to the port partner
+ * @max_curr: Actual max current at the local port
+ * @req_max_curr: Requested max current of the port partner
+ * @req_out_volt: Requested output voltage to the port partner
+ * @req_op_curr: Requested operating current to the port partner
+ * @supported: Parter has atleast one APDO hence supports PPS
+ * @active: PPS mode is active
+ */
+struct pd_pps_data {
+	u32 min_volt;
+	u32 req_min_volt;
+	u32 max_volt;
+	u32 req_max_volt;
+	u32 max_curr;
+	u32 req_max_curr;
+	u32 req_out_volt;
+	u32 req_op_curr;
+	bool supported;
+	bool active;
+};
+
+enum power_supply_usb_type {
+	POWER_SUPPLY_USB_TYPE_UNKNOWN = 0,
+	POWER_SUPPLY_USB_TYPE_SDP,              /* Standard Downstream Port */
+	POWER_SUPPLY_USB_TYPE_DCP,              /* Dedicated Charging Port */
+	POWER_SUPPLY_USB_TYPE_CDP,              /* Charging Downstream Port */
+	POWER_SUPPLY_USB_TYPE_ACA,              /* Accessory Charger Adapters */
+	POWER_SUPPLY_USB_TYPE_C,                /* Type C Port */
+	POWER_SUPPLY_USB_TYPE_PD,               /* Power Delivery Port */
+	POWER_SUPPLY_USB_TYPE_PD_DRP,           /* PD Dual Role Port */
+	POWER_SUPPLY_USB_TYPE_PD_PPS,           /* PD Programmable Power Supply */
+	POWER_SUPPLY_USB_TYPE_APPLE_BRICK_ID,   /* Apple Charging Method */
+};
+
+struct tcpm_port {
+	struct udevice *dev;
+	struct typec_capability typec_caps;
+	struct tcpc_dev	*tcpc;
+
+	enum typec_role vconn_role;
+	enum typec_role pwr_role;
+	enum typec_data_role data_role;
+	enum typec_pwr_opmode pwr_opmode;
+
+	struct usb_pd_identity partner_ident;
+	struct typec_partner_desc partner_desc;
+	struct typec_partner *partner;
+
+	enum typec_cc_status cc_req;
+
+	enum typec_cc_status cc1;
+	enum typec_cc_status cc2;
+	enum typec_cc_polarity polarity;
+
+	bool attached;
+	bool connected;
+	int poll_event_cnt;
+	enum typec_port_type port_type;
+
+	/*
+	 * Set to true when vbus is greater than VSAFE5V min.
+	 * Set to false when vbus falls below vSinkDisconnect max threshold.
+	 */
+	bool vbus_present;
+
+	/*
+	 * Set to true when vbus is less than VSAFE0V max.
+	 * Set to false when vbus is greater than VSAFE0V max.
+	 */
+	bool vbus_vsafe0v;
+
+	bool vbus_never_low;
+	bool vbus_source;
+	bool vbus_charge;
+
+	/* Set to true when Discover_Identity Command is expected to be sent in Ready states. */
+	bool send_discover;
+	bool op_vsafe5v;
+
+	int try_role;
+	int try_snk_count;
+	int try_src_count;
+
+	enum pd_msg_request queued_message;
+
+	enum tcpm_state enter_state;
+	enum tcpm_state prev_state;
+	enum tcpm_state state;
+	enum tcpm_state delayed_state;
+	unsigned long delay_ms;
+
+	spinlock_t pd_event_lock;
+	u32 pd_events;
+
+	bool state_machine_running;
+	/* Set to true when VDM State Machine has following actions. */
+	bool vdm_sm_running;
+
+	bool tx_complete;
+	enum tcpm_transmit_status tx_status;
+
+	struct mutex swap_lock;		/* swap command lock */
+	bool swap_pending;
+	bool non_pd_role_swap;
+	int swap_status;
+
+	unsigned int negotiated_rev;
+	unsigned int message_id;
+	unsigned int caps_count;
+	unsigned int hard_reset_count;
+	bool pd_capable;
+	bool explicit_contract;
+	unsigned int rx_msgid;
+
+	/* Partner capabilities/requests */
+	u32 sink_request;
+	u32 source_caps[PDO_MAX_OBJECTS];
+	unsigned int nr_source_caps;
+	u32 sink_caps[PDO_MAX_OBJECTS];
+	unsigned int nr_sink_caps;
+
+	/*
+	 * whether to wait for the Type-C device to send the DR_SWAP Message flag
+	 * For Type-C device with Dual-Role Power and Dual-Role Data, the port side
+	 * is used as sink + ufp, then the tcpm framework needs to wait for Type-C
+	 * device to initiate DR_swap Message.
+	 */
+	bool wait_dr_swap_Message;
+
+	/* Local capabilities */
+	u32 src_pdo[PDO_MAX_OBJECTS];
+	unsigned int nr_src_pdo;
+	u32 snk_pdo[PDO_MAX_OBJECTS];
+	unsigned int nr_snk_pdo;
+	u32 snk_vdo_v1[VDO_MAX_OBJECTS];
+	unsigned int nr_snk_vdo_v1;
+	u32 snk_vdo[VDO_MAX_OBJECTS];
+	unsigned int nr_snk_vdo;
+
+	unsigned int operating_snk_mw;
+	bool update_sink_caps;
+
+	/* Requested current / voltage to the port partner */
+	u32 req_current_limit;
+	u32 req_supply_voltage;
+	/* Actual current / voltage limit of the local port */
+	u32 current_limit;
+	u32 supply_voltage;
+
+	enum power_supply_usb_type usb_type;
+
+	u32 bist_request;
+
+	/* PD state for Vendor Defined Messages */
+	enum vdm_states vdm_state;
+	u32 vdm_retries;
+	/* next Vendor Defined Message to send */
+	u32 vdo_data[VDO_MAX_SIZE];
+	u8 vdo_count;
+	/* VDO to retry if UFP responder replied busy */
+	u32 vdo_retry;
+
+	/* PPS */
+	struct pd_pps_data pps_data;
+	bool pps_pending;
+	int pps_status;
+
+	/* Deadline in jiffies to exit src_try_wait state */
+	unsigned long max_wait;
+
+	/* port belongs to a self powered device */
+	bool self_powered;
+
+	/* Sink FRS */
+	enum frs_typec_current new_source_frs_current;
+
+	/* Sink caps have been queried */
+	bool sink_cap_done;
+
+	/* Port is still in tCCDebounce */
+	bool debouncing;
+
+	/* Collision Avoidance and Atomic Message Sequence */
+	enum tcpm_state upcoming_state;
+	enum tcpm_ams ams;
+	enum tcpm_ams next_ams;
+	bool in_ams;
+
+	/* Auto vbus discharge status */
+	bool auto_vbus_discharge_enabled;
+
+	/*
+	 * When set, port requests PD_P_SNK_STDBY_MW upon entering SNK_DISCOVERY and
+	 * the actual currrent limit after RX of PD_CTRL_PSRDY for PD link,
+	 * SNK_READY for non-pd link.
+	 */
+	bool slow_charger_loop;
+#ifdef CONFIG_DEBUG_FS
+	struct dentry *dentry;
+	struct mutex logbuffer_lock;	/* log buffer access lock */
+	int logbuffer_head;
+	int logbuffer_tail;
+	u8 *logbuffer[LOG_BUFFER_ENTRIES];
+#endif
+};
+
+struct pd_rx_event {
+	struct tcpm_port *port;
+	struct pd_message msg;
+};
+
+static const char * const pd_rev[] = {
+	[PD_REV10]		= "rev1",
+	[PD_REV20]		= "rev2",
+	[PD_REV30]		= "rev3",
+};
+
+#define tcpm_cc_is_sink(cc) \
+	((cc) == TYPEC_CC_RP_DEF || (cc) == TYPEC_CC_RP_1_5 || \
+	 (cc) == TYPEC_CC_RP_3_0)
+
+#define tcpm_port_is_sink(port) \
+	((tcpm_cc_is_sink((port)->cc1) && !tcpm_cc_is_sink((port)->cc2)) || \
+	 (tcpm_cc_is_sink((port)->cc2) && !tcpm_cc_is_sink((port)->cc1)))
+
+#define tcpm_cc_is_source(cc) ((cc) == TYPEC_CC_RD)
+#define tcpm_cc_is_audio(cc) ((cc) == TYPEC_CC_RA)
+#define tcpm_cc_is_open(cc) ((cc) == TYPEC_CC_OPEN)
+
+#define tcpm_port_is_source(port) \
+	((tcpm_cc_is_source((port)->cc1) && \
+	 !tcpm_cc_is_source((port)->cc2)) || \
+	 (tcpm_cc_is_source((port)->cc2) && \
+	  !tcpm_cc_is_source((port)->cc1)))
+
+#define tcpm_port_is_debug(port) \
+	(tcpm_cc_is_source((port)->cc1) && tcpm_cc_is_source((port)->cc2))
+
+#define tcpm_port_is_audio(port) \
+	(tcpm_cc_is_audio((port)->cc1) && tcpm_cc_is_audio((port)->cc2))
+
+#define tcpm_port_is_audio_detached(port) \
+	((tcpm_cc_is_audio((port)->cc1) && tcpm_cc_is_open((port)->cc2)) || \
+	 (tcpm_cc_is_audio((port)->cc2) && tcpm_cc_is_open((port)->cc1)))
+
+#define tcpm_try_snk(port) \
+	((port)->try_snk_count == 0 && (port)->try_role == TYPEC_SINK && \
+	(port)->port_type == TYPEC_PORT_DRP)
+
+#define tcpm_try_src(port) \
+	((port)->try_src_count == 0 && (port)->try_role == TYPEC_SOURCE && \
+	(port)->port_type == TYPEC_PORT_DRP)
+
+#define tcpm_data_role_for_source(port) \
+	((port)->typec_caps.data == TYPEC_PORT_UFP ? \
+	TYPEC_DEVICE : TYPEC_HOST)
+
+#define tcpm_data_role_for_sink(port) \
+	((port)->typec_caps.data == TYPEC_PORT_DFP ? \
+	TYPEC_HOST : TYPEC_DEVICE)
+
+static enum tcpm_state tcpm_default_state(struct tcpm_port *port)
+{
+	if (port->port_type == TYPEC_PORT_DRP) {
+		if (port->try_role == TYPEC_SINK)
+			return SNK_UNATTACHED;
+		else if (port->try_role == TYPEC_SOURCE)
+			return SRC_UNATTACHED;
+		/* Fall through to return SRC_UNATTACHED */
+	} else if (port->port_type == TYPEC_PORT_SNK) {
+		return SNK_UNATTACHED;
+	}
+	return SRC_UNATTACHED;
+}
+
+static bool tcpm_port_is_disconnected(struct tcpm_port *port)
+{
+	return (!port->attached && port->cc1 == TYPEC_CC_OPEN &&
+		port->cc2 == TYPEC_CC_OPEN) ||
+	       (port->attached && ((port->polarity == TYPEC_POLARITY_CC1 &&
+				    port->cc1 == TYPEC_CC_OPEN) ||
+				   (port->polarity == TYPEC_POLARITY_CC2 &&
+				    port->cc2 == TYPEC_CC_OPEN)));
+}
+
+static void tcpm_set_cc(struct tcpm_port *port, enum typec_cc_status cc)
+{
+	debug("%s: cc = %d", __func__, cc);
+	port->cc_req = cc;
+	port->tcpc->set_cc(port->tcpc, cc);
+}
+
+/*
+ * Determine RP value to set based on maximum current supported
+ * by a port if configured as source.
+ * Returns CC value to report to link partner.
+ */
+static enum typec_cc_status tcpm_rp_cc(struct tcpm_port *port)
+{
+	const u32 *src_pdo = port->src_pdo;
+	int nr_pdo = port->nr_src_pdo;
+	int i;
+
+	/*
+	 * Search for first entry with matching voltage.
+	 * It should report the maximum supported current.
+	 */
+	for (i = 0; i < nr_pdo; i++) {
+		const u32 pdo = src_pdo[i];
+
+		if (pdo_type(pdo) == PDO_TYPE_FIXED &&
+		    pdo_fixed_voltage(pdo) == 5000) {
+			unsigned int curr = pdo_max_current(pdo);
+
+			if (curr >= 3000)
+				return TYPEC_CC_RP_3_0;
+			else if (curr >= 1500)
+				return TYPEC_CC_RP_1_5;
+			return TYPEC_CC_RP_DEF;
+		}
+	}
+
+	return TYPEC_CC_RP_DEF;
+}
+
+static int tcpm_pd_transmit(struct tcpm_port *port,
+			    enum tcpm_transmit_type type,
+			    const struct pd_message *msg)
+{
+	int ret;
+	int timeout = PD_T_TCPC_TX_TIMEOUT;
+
+	if (msg)
+		debug("PD TX, header: %#x\n", le16_to_cpu(msg->header));
+	else
+		debug("PD TX, type: %#x\n", type);
+
+	port->tx_complete = false;
+	ret = port->tcpc->pd_transmit(port->tcpc, type, msg, port->negotiated_rev);
+	if (ret < 0)
+		return ret;
+
+	while ((timeout > 0) && (!port->tx_complete)) {
+		port->tcpc->poll_event(port->tcpc);
+		udelay(1000);
+		timeout--;
+	}
+
+	if (!timeout) {
+		printf("%s: pd transmit data timeout\n", __func__);
+		return -ETIMEDOUT;
+	}
+
+	switch (port->tx_status) {
+	case TCPC_TX_SUCCESS:
+		port->message_id = (port->message_id + 1) & PD_HEADER_ID_MASK;
+		break;
+	case TCPC_TX_DISCARDED:
+		ret = -EAGAIN;
+		break;
+	case TCPC_TX_FAILED:
+	default:
+		ret = -EIO;
+		break;
+	}
+
+	return ret;
+}
+
+void tcpm_pd_transmit_complete(struct tcpm_port *port,
+			       enum tcpm_transmit_status status)
+{
+	debug("%s: PD TX complete, status: %u\n", __func__, status);
+	port->poll_event_cnt = 0;
+	port->tx_status = status;
+	port->tx_complete = true;
+}
+EXPORT_SYMBOL_GPL(tcpm_pd_transmit_complete);
+
+static int tcpm_set_polarity(struct tcpm_port *port,
+			     enum typec_cc_polarity polarity)
+{
+	int ret;
+
+	debug("%s: polarity %d\n", __func__, polarity);
+
+	ret = port->tcpc->set_polarity(port->tcpc, polarity);
+	if (ret < 0)
+		return ret;
+
+	port->polarity = polarity;
+
+	return 0;
+}
+
+static int tcpm_set_vconn(struct tcpm_port *port, bool enable)
+{
+	int ret;
+
+	debug("%s: vconn = %d\n", __func__, enable);
+
+	ret = port->tcpc->set_vconn(port->tcpc, enable);
+	if (!ret)
+		port->vconn_role = enable ? TYPEC_SOURCE : TYPEC_SINK;
+
+	return ret;
+}
+
+static u32 tcpm_get_current_limit(struct tcpm_port *port)
+{
+	enum typec_cc_status cc;
+	u32 limit;
+
+	cc = port->polarity ? port->cc2 : port->cc1;
+	switch (cc) {
+	case TYPEC_CC_RP_1_5:
+		limit = 1500;
+		break;
+	case TYPEC_CC_RP_3_0:
+		limit = 3000;
+		break;
+	case TYPEC_CC_RP_DEF:
+	default:
+		if (port->tcpc->get_current_limit)
+			limit = port->tcpc->get_current_limit(port->tcpc);
+		else
+			limit = 0;
+		break;
+	}
+
+	return limit;
+}
+
+static int tcpm_set_current_limit(struct tcpm_port *port, u32 max_ma, u32 mv)
+{
+	int ret = -EOPNOTSUPP;
+
+	debug("Setting voltage/current limit %u mV %u mA\n", mv, max_ma);
+
+	port->supply_voltage = mv;
+	port->current_limit = max_ma;
+
+	if (port->tcpc->set_current_limit)
+		ret = port->tcpc->set_current_limit(port->tcpc, max_ma, mv);
+
+	return ret;
+}
+
+static int tcpm_set_attached_state(struct tcpm_port *port, bool attached)
+{
+	return port->tcpc->set_roles(port->tcpc, attached, port->pwr_role,
+				     port->data_role);
+}
+
+static int tcpm_set_roles(struct tcpm_port *port, bool attached,
+			  enum typec_role role, enum typec_data_role data)
+{
+#if 0
+	enum typec_orientation orientation;
+	enum usb_role usb_role;
+#endif
+	int ret;
+
+#if 0
+	if (port->polarity == TYPEC_POLARITY_CC1)
+		orientation = TYPEC_ORIENTATION_NORMAL;
+	else
+		orientation = TYPEC_ORIENTATION_REVERSE;
+
+	if (data == TYPEC_HOST)
+		usb_role = USB_ROLE_HOST;
+	else
+		usb_role = USB_ROLE_DEVICE;
+
+	ret = tcpm_mux_set(port, TYPEC_STATE_USB, usb_role, orientation);
+	if (ret < 0)
+		return ret;
+#endif
+
+	ret = port->tcpc->set_roles(port->tcpc, attached, role, data);
+	if (ret < 0)
+		return ret;
+
+	port->pwr_role = role;
+	port->data_role = data;
+#if 0
+	typec_set_data_role(port->typec_port, data);
+	typec_set_pwr_role(port->typec_port, role);
+#endif
+
+	return 0;
+}
+
+static int tcpm_pd_send_source_caps(struct tcpm_port *port)
+{
+	struct pd_message msg;
+	int i;
+
+	memset(&msg, 0, sizeof(msg));
+
+	if (!port->nr_src_pdo) {
+		/* No source capabilities defined, sink only */
+		msg.header = PD_HEADER_LE(PD_CTRL_REJECT,
+					  port->pwr_role,
+					  port->data_role,
+					  port->negotiated_rev,
+					  port->message_id, 0);
+	} else {
+		msg.header = PD_HEADER_LE(PD_DATA_SOURCE_CAP,
+					  port->pwr_role,
+					  port->data_role,
+					  port->negotiated_rev,
+					  port->message_id,
+					  port->nr_src_pdo);
+	}
+
+	for (i = 0; i < port->nr_src_pdo; i++)
+		msg.payload[i] = cpu_to_le32(port->src_pdo[i]);
+
+	return tcpm_pd_transmit(port, TCPC_TX_SOP, &msg);
+}
+
+static int tcpm_pd_send_sink_caps(struct tcpm_port *port)
+{
+	struct pd_message msg;
+	unsigned int i;
+
+	memset(&msg, 0, sizeof(msg));
+
+	if (!port->nr_snk_pdo) {
+		/* No sink capabilities defined, source only */
+		msg.header = PD_HEADER_LE(PD_CTRL_REJECT,
+					  port->pwr_role,
+					  port->data_role,
+					  port->negotiated_rev,
+					  port->message_id, 0);
+	} else {
+		msg.header = PD_HEADER_LE(PD_DATA_SINK_CAP,
+					  port->pwr_role,
+					  port->data_role,
+					  port->negotiated_rev,
+					  port->message_id,
+					  port->nr_snk_pdo);
+	}
+
+	for (i = 0; i < port->nr_snk_pdo; i++)
+		msg.payload[i] = cpu_to_le32(port->snk_pdo[i]);
+
+	return tcpm_pd_transmit(port, TCPC_TX_SOP, &msg);
+}
+
+static void tcpm_state_machine(struct tcpm_port *port);
+static void tcpm_timer_uninit(struct tcpm_port *port);
+static void tcpm_timer_irq(int irq, void *data)
+{
+	struct tcpm_port *port = data;
+
+	writel(TIMER_CLR_INT, TIMER_BASE + TIMER_INTSTATUS);
+	tcpm_timer_uninit(port);
+	tcpm_state_machine(port);
+}
+
+static void tcpm_timer_init(struct tcpm_port *port, uint32_t ms)
+{
+	uint64_t period = 24000ULL * ms;
+
+	/* Disable before conifg */
+	writel(0, TIMER_BASE + TIMER_CTRL);
+
+	/* Config */
+	writel((uint32_t)period, TIMER_BASE + TIMER_LOAD_COUNT0);
+	writel((uint32_t)(period >> 32), TIMER_BASE + TIMER_LOAD_COUNT1);
+	writel(TIMER_CLR_INT, TIMER_BASE + TIMER_INTSTATUS);
+	writel(TIMER_EN | TIMER_INT_EN, TIMER_BASE + TIMER_CTRL);
+
+	/* IRQ */
+	irq_install_handler(TIMER_IRQ,
+			   (interrupt_handler_t *)tcpm_timer_irq, port);
+	irq_handler_enable(TIMER_IRQ);
+}
+
+static void tcpm_timer_uninit(struct tcpm_port *port)
+{
+	writel(0, TIMER_BASE + TIMER_CTRL);
+
+	irq_handler_disable(TIMER_IRQ);
+	irq_free_handler(TIMER_IRQ);
+}
+
+static void mod_tcpm_delayed_work(struct tcpm_port *port, unsigned int delay_ms)
+{
+	if (delay_ms) {
+		tcpm_timer_init(port, delay_ms);
+	} else {
+		tcpm_timer_uninit(port);
+		tcpm_state_machine(port);
+	}
+}
+
+static void tcpm_set_state(struct tcpm_port *port, enum tcpm_state state,
+			   unsigned int delay_ms)
+{
+	debug("%s: line = %d, delay_ms = %d, set state = %s\n",
+		 __func__, __LINE__, delay_ms, tcpm_states[state]);
+
+	if (delay_ms) {
+		debug("pending state change %s -> %s @ %u ms [%s]\n",
+			 tcpm_states[port->state], tcpm_states[state], delay_ms,
+			 pd_rev[port->negotiated_rev]);
+		port->delayed_state = state;
+		mod_tcpm_delayed_work(port, delay_ms);
+		port->delay_ms = delay_ms;
+	} else {
+		debug("state change %s -> %s\n",
+			 tcpm_states[port->state], tcpm_states[state]);
+		port->delayed_state = INVALID_STATE;
+		port->prev_state = port->state;
+		port->state = state;
+		/*
+		 * Don't re-queue the state machine work item if we're currently
+		 * in the state machine and we're immediately changing states.
+		 * tcpm_state_machine_work() will continue running the state
+		 * machine.
+		 */
+		if (!port->state_machine_running)
+			mod_tcpm_delayed_work(port, 0);
+	}
+}
+
+static void tcpm_set_state_cond(struct tcpm_port *port, enum tcpm_state state,
+				unsigned int delay_ms)
+{
+	if (port->enter_state == port->state)
+		tcpm_set_state(port, state, delay_ms);
+	else
+		debug("skipped %sstate change %s -> %s [%u ms], context state %s [%s %s]\n",
+			delay_ms ? "delayed " : "",
+			tcpm_states[port->state], tcpm_states[state],
+			delay_ms, tcpm_states[port->enter_state],
+			pd_rev[port->negotiated_rev], tcpm_ams_str[port->ams]);
+}
+
+static void tcpm_queue_message(struct tcpm_port *port,
+			       enum pd_msg_request message)
+{
+	port->queued_message = message;
+	mod_tcpm_delayed_work(port, 0);
+}
+
+#if 0
+static void tcpm_pd_handle_msg(struct tcpm_port *port,
+			       enum pd_msg_request message,
+			       enum tcpm_ams ams);
+#endif
+
+enum pdo_err {
+	PDO_NO_ERR,
+	PDO_ERR_NO_VSAFE5V,
+	PDO_ERR_VSAFE5V_NOT_FIRST,
+	PDO_ERR_PDO_TYPE_NOT_IN_ORDER,
+	PDO_ERR_FIXED_NOT_SORTED,
+	PDO_ERR_VARIABLE_BATT_NOT_SORTED,
+	PDO_ERR_DUPE_PDO,
+	PDO_ERR_PPS_APDO_NOT_SORTED,
+	PDO_ERR_DUPE_PPS_APDO,
+};
+
+static const char * const pdo_err_msg[] = {
+	[PDO_ERR_NO_VSAFE5V] =
+	" err: source/sink caps should atleast have vSafe5V",
+	[PDO_ERR_VSAFE5V_NOT_FIRST] =
+	" err: vSafe5V Fixed Supply Object Shall always be the first object",
+	[PDO_ERR_PDO_TYPE_NOT_IN_ORDER] =
+	" err: PDOs should be in the following order: Fixed; Battery; Variable",
+	[PDO_ERR_FIXED_NOT_SORTED] =
+	" err: Fixed supply pdos should be in increasing order of their fixed voltage",
+	[PDO_ERR_VARIABLE_BATT_NOT_SORTED] =
+	" err: Variable/Battery supply pdos should be in increasing order of their minimum voltage",
+	[PDO_ERR_DUPE_PDO] =
+	" err: Variable/Batt supply pdos cannot have same min/max voltage",
+	[PDO_ERR_PPS_APDO_NOT_SORTED] =
+	" err: Programmable power supply apdos should be in increasing order of their maximum voltage",
+	[PDO_ERR_DUPE_PPS_APDO] =
+	" err: Programmable power supply apdos cannot have same min/max voltage and max current",
+};
+
+static enum pdo_err tcpm_caps_err(struct tcpm_port *port, const u32 *pdo,
+				  unsigned int nr_pdo)
+{
+	unsigned int i;
+
+	/* Should at least contain vSafe5v */
+	if (nr_pdo < 1)
+		return PDO_ERR_NO_VSAFE5V;
+
+	/* The vSafe5V Fixed Supply Object Shall always be the first object */
+	if (pdo_type(pdo[0]) != PDO_TYPE_FIXED ||
+	    pdo_fixed_voltage(pdo[0]) != VSAFE5V)
+		return PDO_ERR_VSAFE5V_NOT_FIRST;
+
+	for (i = 1; i < nr_pdo; i++) {
+		if (pdo_type(pdo[i]) < pdo_type(pdo[i - 1])) {
+			return PDO_ERR_PDO_TYPE_NOT_IN_ORDER;
+		} else if (pdo_type(pdo[i]) == pdo_type(pdo[i - 1])) {
+			enum pd_pdo_type type = pdo_type(pdo[i]);
+
+			switch (type) {
+			/*
+			 * The remaining Fixed Supply Objects, if
+			 * present, shall be sent in voltage order;
+			 * lowest to highest.
+			 */
+			case PDO_TYPE_FIXED:
+				if (pdo_fixed_voltage(pdo[i]) <=
+				    pdo_fixed_voltage(pdo[i - 1]))
+					return PDO_ERR_FIXED_NOT_SORTED;
+				break;
+			/*
+			 * The Battery Supply Objects and Variable
+			 * supply, if present shall be sent in Minimum
+			 * Voltage order; lowest to highest.
+			 */
+			case PDO_TYPE_VAR:
+			case PDO_TYPE_BATT:
+				if (pdo_min_voltage(pdo[i]) <
+				    pdo_min_voltage(pdo[i - 1]))
+					return PDO_ERR_VARIABLE_BATT_NOT_SORTED;
+				else if ((pdo_min_voltage(pdo[i]) ==
+					  pdo_min_voltage(pdo[i - 1])) &&
+					 (pdo_max_voltage(pdo[i]) ==
+					  pdo_max_voltage(pdo[i - 1])))
+					return PDO_ERR_DUPE_PDO;
+				break;
+			/*
+			 * The Programmable Power Supply APDOs, if present,
+			 * shall be sent in Maximum Voltage order;
+			 * lowest to highest.
+			 */
+			case PDO_TYPE_APDO:
+				if (pdo_apdo_type(pdo[i]) != APDO_TYPE_PPS)
+					break;
+
+				if (pdo_pps_apdo_max_voltage(pdo[i]) <
+				    pdo_pps_apdo_max_voltage(pdo[i - 1]))
+					return PDO_ERR_PPS_APDO_NOT_SORTED;
+				else if (pdo_pps_apdo_min_voltage(pdo[i]) ==
+					  pdo_pps_apdo_min_voltage(pdo[i - 1]) &&
+					 pdo_pps_apdo_max_voltage(pdo[i]) ==
+					  pdo_pps_apdo_max_voltage(pdo[i - 1]) &&
+					 pdo_pps_apdo_max_current(pdo[i]) ==
+					  pdo_pps_apdo_max_current(pdo[i - 1]))
+					return PDO_ERR_DUPE_PPS_APDO;
+				break;
+			default:
+				printf("%s: Unknown pdo type\n", __func__);
+			}
+		}
+	}
+
+	return PDO_NO_ERR;
+}
+
+static int tcpm_validate_caps(struct tcpm_port *port, const u32 *pdo,
+			      unsigned int nr_pdo)
+{
+	enum pdo_err err_index = tcpm_caps_err(port, pdo, nr_pdo);
+
+	if (err_index != PDO_NO_ERR) {
+		printf("%s", pdo_err_msg[err_index]);
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+/*
+ * PD (data, control) command handling functions
+ */
+static inline enum tcpm_state ready_state(struct tcpm_port *port)
+{
+	if (port->pwr_role == TYPEC_SOURCE)
+		return SRC_READY;
+	else
+		return SNK_READY;
+}
+
+static int tcpm_pd_send_control(struct tcpm_port *port,
+				enum pd_ctrl_msg_type type);
+
+#if 0
+static void tcpm_pd_handle_msg(struct tcpm_port *port,
+			       enum pd_msg_request message,
+			       enum tcpm_ams ams)
+{
+	switch (port->state) {
+	case SRC_READY:
+	case SNK_READY:
+		port->ams = ams;
+		tcpm_queue_message(port, message);
+		break;
+	/* PD 3.0 Spec 8.3.3.4.1.1 and 6.8.1 */
+	case SNK_TRANSITION_SINK:
+	case SNK_TRANSITION_SINK_VBUS:
+	case SRC_TRANSITION_SUPPLY:
+		tcpm_set_state(port, HARD_RESET_SEND, 0);
+		break;
+	default:
+		if (!tcpm_ams_interruptible(port)) {
+			tcpm_set_state(port, port->pwr_role == TYPEC_SOURCE ?
+				       SRC_SOFT_RESET_WAIT_SNK_TX :
+				       SNK_SOFT_RESET,
+				       0);
+		} else {
+			port->next_ams = ams;
+			tcpm_set_state(port, ready_state(port), 0);
+			/* 6.8.1 process the Message */
+			tcpm_queue_message(port, message);
+		}
+		break;
+	}
+}
+#endif
+
+static void tcpm_pd_data_request(struct tcpm_port *port,
+				 const struct pd_message *msg)
+{
+	enum pd_data_msg_type type = pd_header_type_le(msg->header);
+	unsigned int cnt = pd_header_cnt_le(msg->header);
+	unsigned int rev = pd_header_rev_le(msg->header);
+	unsigned int i;
+
+	switch (type) {
+	case PD_DATA_SOURCE_CAP:
+		for (i = 0; i < cnt; i++)
+			port->source_caps[i] = le32_to_cpu(msg->payload[i]);
+
+		port->nr_source_caps = cnt;
+
+		tcpm_validate_caps(port, port->source_caps,
+				   port->nr_source_caps);
+
+		/*
+		 * Adjust revision in subsequent message headers, as required,
+		 * to comply with 6.2.1.1.5 of the USB PD 3.0 spec. We don't
+		 * support Rev 1.0 so just do nothing in that scenario.
+		 */
+		if (rev == PD_REV10) {
+			break;
+		}
+
+		if (rev < PD_MAX_REV)
+			port->negotiated_rev = rev;
+
+		if ((pdo_type(port->source_caps[0]) == PDO_TYPE_FIXED) &&
+		     (port->source_caps[0] & PDO_FIXED_DUAL_ROLE) &&
+		     (port->source_caps[0] & PDO_FIXED_DATA_SWAP)) {
+			/* Dual role power and data, eg: self-powered Type-C */
+			port->wait_dr_swap_Message = true;
+		} else {
+			/* Non-Dual role power, eg: adapter */
+			port->wait_dr_swap_Message = false;
+		}
+
+		/*
+		 * This message may be received even if VBUS is not
+		 * present. This is quite unexpected; see USB PD
+		 * specification, sections 8.3.3.6.3.1 and 8.3.3.6.3.2.
+		 * However, at the same time, we must be ready to
+		 * receive this message and respond to it 15ms after
+		 * receiving PS_RDY during power swap operations, no matter
+		 * if VBUS is available or not (USB PD specification,
+		 * section 6.5.9.2).
+		 * So we need to accept the message either way,
+		 * but be prepared to keep waiting for VBUS after it was
+		 * handled.
+		 */
+		tcpm_set_state(port, SNK_NEGOTIATE_CAPABILITIES, 0);
+		break;
+	case PD_DATA_REQUEST:
+		/*
+		 * Adjust revision in subsequent message headers, as required,
+		 * to comply with 6.2.1.1.5 of the USB PD 3.0 spec. We don't
+		 * support Rev 1.0 so just reject in that scenario.
+		 */
+		if (rev == PD_REV10) {
+			tcpm_queue_message(port, PD_MSG_CTRL_REJECT);
+			break;
+		}
+
+		if (rev < PD_MAX_REV)
+			port->negotiated_rev = rev;
+
+		port->sink_request = le32_to_cpu(msg->payload[0]);
+
+		tcpm_set_state(port, SRC_NEGOTIATE_CAPABILITIES, 0);
+		break;
+	case PD_DATA_SINK_CAP:
+		/* We don't do anything with this at the moment... */
+		for (i = 0; i < cnt; i++)
+			port->sink_caps[i] = le32_to_cpu(msg->payload[i]);
+
+		port->nr_sink_caps = cnt;
+		break;
+	default:
+		break;
+	}
+}
+
+static void tcpm_pd_ctrl_request(struct tcpm_port *port,
+				 const struct pd_message *msg)
+{
+	enum pd_ctrl_msg_type type = pd_header_type_le(msg->header);
+	enum tcpm_state next_state;
+
+	switch (type) {
+	case PD_CTRL_GOOD_CRC:
+	case PD_CTRL_PING:
+		break;
+	case PD_CTRL_GET_SOURCE_CAP:
+		switch (port->state) {
+		case SRC_READY:
+		case SNK_READY:
+			tcpm_queue_message(port, PD_MSG_DATA_SOURCE_CAP);
+			break;
+		default:
+			tcpm_queue_message(port, PD_MSG_CTRL_REJECT);
+			break;
+		}
+		break;
+	case PD_CTRL_GET_SINK_CAP:
+		switch (port->state) {
+		case SRC_READY:
+		case SNK_READY:
+			tcpm_queue_message(port, PD_MSG_DATA_SINK_CAP);
+			break;
+		default:
+			tcpm_queue_message(port, PD_MSG_CTRL_REJECT);
+			break;
+		}
+		break;
+	case PD_CTRL_GOTO_MIN:
+		break;
+	case PD_CTRL_PS_RDY:
+		switch (port->state) {
+		case SNK_TRANSITION_SINK:
+			if (port->vbus_present) {
+				tcpm_set_current_limit(port,
+						       port->req_current_limit,
+						       port->req_supply_voltage);
+				port->explicit_contract = true;
+				tcpm_set_state(port, SNK_READY, 0);
+			} else {
+				/*
+				 * Seen after power swap. Keep waiting for VBUS
+				 * in a transitional state.
+				 */
+				tcpm_set_state(port,
+					       SNK_TRANSITION_SINK_VBUS, 0);
+			}
+			break;
+		default:
+			break;
+		}
+		break;
+	case PD_CTRL_REJECT:
+	case PD_CTRL_WAIT:
+	case PD_CTRL_NOT_SUPP:
+		switch (port->state) {
+		case SNK_NEGOTIATE_CAPABILITIES:
+			/* USB PD specification, Figure 8-43 */
+			if (port->explicit_contract)
+				next_state = SNK_READY;
+			else
+				next_state = SNK_WAIT_CAPABILITIES;
+
+			tcpm_set_state(port, next_state, 0);
+			break;
+		case SNK_NEGOTIATE_PPS_CAPABILITIES:
+			/* Revert data back from any requested PPS updates */
+			port->pps_data.req_out_volt = port->supply_voltage;
+			port->pps_data.req_op_curr = port->current_limit;
+			port->pps_status = (type == PD_CTRL_WAIT ?
+					    -EAGAIN : -EOPNOTSUPP);
+			tcpm_set_state(port, SNK_READY, 0);
+			break;
+		default:
+			break;
+		}
+		break;
+	case PD_CTRL_ACCEPT:
+		switch (port->state) {
+		case SNK_NEGOTIATE_CAPABILITIES:
+			port->pps_data.active = false;
+			tcpm_set_state(port, SNK_TRANSITION_SINK, 0);
+			break;
+		case SNK_NEGOTIATE_PPS_CAPABILITIES:
+			port->pps_data.active = true;
+			/* ???? */
+			port->pps_data.min_volt = port->pps_data.req_min_volt;
+			port->pps_data.max_volt = port->pps_data.req_max_volt;
+			port->pps_data.max_curr = port->pps_data.req_max_curr;
+			port->req_supply_voltage = port->pps_data.req_out_volt;
+			port->req_current_limit = port->pps_data.req_op_curr;
+			tcpm_set_state(port, SNK_TRANSITION_SINK, 0);
+			break;
+		case SOFT_RESET_SEND:
+			port->message_id = 0;
+			port->rx_msgid = -1;
+			if (port->pwr_role == TYPEC_SOURCE)
+				next_state = SRC_SEND_CAPABILITIES;
+			else
+				next_state = SNK_WAIT_CAPABILITIES;
+			tcpm_set_state(port, next_state, 0);
+			break;
+		default:
+			break;
+		}
+		break;
+	case PD_CTRL_SOFT_RESET:
+		tcpm_set_state(port, SOFT_RESET, 0);
+		break;
+	case PD_CTRL_DR_SWAP:
+		if (port->port_type != TYPEC_PORT_DRP) {
+			tcpm_queue_message(port, PD_MSG_CTRL_REJECT);
+			break;
+		}
+		/*
+		 * XXX
+		 * 6.3.9: If an alternate mode is active, a request to swap
+		 * alternate modes shall trigger a port reset.
+		 */
+		switch (port->state) {
+		case SRC_READY:
+		case SNK_READY:
+#if 0
+			if (port->vdm_sm_running) {
+				tcpm_queue_message(port, PD_MSG_CTRL_WAIT);
+				break;
+			}
+#endif
+			tcpm_set_state(port, DR_SWAP_ACCEPT, 0);
+			break;
+		default:
+			tcpm_queue_message(port, PD_MSG_CTRL_WAIT);
+			break;
+		}
+		break;
+	case PD_CTRL_PR_SWAP:
+	case PD_CTRL_VCONN_SWAP:
+	case PD_CTRL_GET_SOURCE_CAP_EXT:
+	case PD_CTRL_GET_STATUS:
+	case PD_CTRL_FR_SWAP:
+	case PD_CTRL_GET_PPS_STATUS:
+	case PD_CTRL_GET_COUNTRY_CODES:
+		/* Currently not supported */
+		printf("Currently not supported type %#x \n", type);
+		tcpm_queue_message(port, PD_MSG_CTRL_NOT_SUPP);
+		break;
+	default:
+		printf("Unrecognized ctrl message type %#x\n", type);
+		break;
+	}
+}
+
+#if 0
+static void tcpm_pd_ext_msg_request(struct tcpm_port *port,
+				    const struct pd_message *msg)
+{
+	enum pd_ext_msg_type type = pd_header_type_le(msg->header);
+	unsigned int data_size = pd_ext_header_data_size_le(msg->ext_msg.header);
+
+	if (!(le16_to_cpu(msg->ext_msg.header) & PD_EXT_HDR_CHUNKED)) {
+		tcpm_pd_handle_msg(port, PD_MSG_CTRL_NOT_SUPP, NONE_AMS);
+		printf("Unchunked extended messages unsupported\n");
+		return;
+	}
+
+	if (data_size > PD_EXT_MAX_CHUNK_DATA) {
+		tcpm_pd_handle_state(port, CHUNK_NOT_SUPP, NONE_AMS, PD_T_CHUNK_NOT_SUPP);
+		printf("Chunk handling not yet supported\n");
+		return;
+	}
+
+	switch (type) {
+	case PD_EXT_STATUS:
+	case PD_EXT_PPS_STATUS:
+			tcpm_set_state(port, ready_state(port), 0);
+		}
+		break;
+	case PD_EXT_SOURCE_CAP_EXT:
+	case PD_EXT_GET_BATT_CAP:
+	case PD_EXT_GET_BATT_STATUS:
+	case PD_EXT_BATT_CAP:
+	case PD_EXT_GET_MANUFACTURER_INFO:
+	case PD_EXT_MANUFACTURER_INFO:
+	case PD_EXT_SECURITY_REQUEST:
+	case PD_EXT_SECURITY_RESPONSE:
+	case PD_EXT_FW_UPDATE_REQUEST:
+	case PD_EXT_FW_UPDATE_RESPONSE:
+	case PD_EXT_COUNTRY_INFO:
+	case PD_EXT_COUNTRY_CODES:
+		tcpm_pd_handle_msg(port, PD_MSG_CTRL_NOT_SUPP, NONE_AMS);
+		break;
+	default:
+		tcpm_pd_handle_msg(port, PD_MSG_CTRL_NOT_SUPP, NONE_AMS);
+		printf("Unrecognized extended message type %#x\n", type);
+		break;
+	}
+}
+#endif
+
+static void tcpm_pd_rx_handler(struct tcpm_port *port,
+			       struct pd_rx_event *event)
+{
+	const struct pd_message *msg = &event->msg;
+	unsigned int cnt = pd_header_cnt_le(msg->header);
+
+	debug("PD RX, header: %#x [%d]\n", le16_to_cpu(msg->header),
+	      port->attached);
+
+	if (port->attached) {
+		enum pd_ctrl_msg_type type = pd_header_type_le(msg->header);
+		unsigned int msgid = pd_header_msgid_le(msg->header);
+
+		/*
+		 * USB PD standard, 6.6.1.2:
+		 * "... if MessageID value in a received Message is the
+		 * same as the stored value, the receiver shall return a
+		 * GoodCRC Message with that MessageID value and drop
+		 * the Message (this is a retry of an already received
+		 * Message). Note: this shall not apply to the Soft_Reset
+		 * Message which always has a MessageID value of zero."
+		 */
+		if (msgid == port->rx_msgid && type != PD_CTRL_SOFT_RESET)
+			goto done;
+		port->rx_msgid = msgid;
+
+		/*
+		 * If both ends believe to be DFP/host, we have a data role
+		 * mismatch.
+		 */
+		if (!!(le16_to_cpu(msg->header) & PD_HEADER_DATA_ROLE) ==
+		    (port->data_role == TYPEC_HOST)) {
+			printf("Data role mismatch, initiating error recovery\n");
+			tcpm_set_state(port, ERROR_RECOVERY, 0);
+		} else {
+			if (cnt)
+				tcpm_pd_data_request(port, msg);
+			else
+				tcpm_pd_ctrl_request(port, msg);
+		}
+	}
+
+done:
+	kfree(event);
+}
+
+void tcpm_pd_receive(struct tcpm_port *port, const struct pd_message *msg)
+{
+	struct pd_rx_event *event;
+
+	port->poll_event_cnt = 0;
+	event = kzalloc(sizeof(*event), GFP_ATOMIC);
+	if (!event)
+		return;
+
+	event->port = port;
+	memcpy(&event->msg, msg, sizeof(*msg));
+	tcpm_pd_rx_handler(port, event);
+}
+EXPORT_SYMBOL_GPL(tcpm_pd_receive);
+
+static int tcpm_pd_send_control(struct tcpm_port *port,
+				enum pd_ctrl_msg_type type)
+{
+	struct pd_message msg;
+
+	memset(&msg, 0, sizeof(msg));
+	msg.header = PD_HEADER_LE(type, port->pwr_role,
+				  port->data_role,
+				  port->negotiated_rev,
+				  port->message_id, 0);
+
+	return tcpm_pd_transmit(port, TCPC_TX_SOP, &msg);
+}
+
+/*
+ * Send queued message without affecting state.
+ * Return true if state machine should go back to sleep,
+ * false otherwise.
+ */
+static bool tcpm_send_queued_message(struct tcpm_port *port)
+{
+	enum pd_msg_request queued_message;
+
+	do {
+		queued_message = port->queued_message;
+		port->queued_message = PD_MSG_NONE;
+
+		switch (queued_message) {
+		case PD_MSG_CTRL_WAIT:
+			tcpm_pd_send_control(port, PD_CTRL_WAIT);
+			break;
+		case PD_MSG_CTRL_REJECT:
+			tcpm_pd_send_control(port, PD_CTRL_REJECT);
+			break;
+		case PD_MSG_CTRL_NOT_SUPP:
+			tcpm_pd_send_control(port, PD_CTRL_NOT_SUPP);
+			break;
+		case PD_MSG_DATA_SINK_CAP:
+			tcpm_pd_send_sink_caps(port);
+			break;
+		case PD_MSG_DATA_SOURCE_CAP:
+			tcpm_pd_send_source_caps(port);
+			break;
+		default:
+			break;
+		}
+	} while (port->queued_message != PD_MSG_NONE);
+
+#if 0
+	/* ??? */
+	if (port->delayed_state != INVALID_STATE) {
+		if (ktime_after(port->delayed_runtime, ktime_get())) {
+			mod_tcpm_delayed_work(port, ktime_to_ms(ktime_sub(port->delayed_runtime,
+									  ktime_get())));
+			return true;
+		}
+		port->delayed_state = INVALID_STATE;
+	}
+#endif
+	return false;
+}
+
+static int tcpm_pd_check_request(struct tcpm_port *port)
+{
+	u32 pdo, rdo = port->sink_request;
+	unsigned int max, op, pdo_max, index;
+	enum pd_pdo_type type;
+
+	index = rdo_index(rdo);
+	if (!index || index > port->nr_src_pdo)
+		return -EINVAL;
+
+	pdo = port->src_pdo[index - 1];
+	type = pdo_type(pdo);
+	switch (type) {
+	case PDO_TYPE_FIXED:
+	case PDO_TYPE_VAR:
+		max = rdo_max_current(rdo);
+		op = rdo_op_current(rdo);
+		pdo_max = pdo_max_current(pdo);
+
+		if (op > pdo_max)
+			return -EINVAL;
+		if (max > pdo_max && !(rdo & RDO_CAP_MISMATCH))
+			return -EINVAL;
+
+		if (type == PDO_TYPE_FIXED)
+			debug("Requested %u mV, %u mA for %u / %u mA\n",
+			      pdo_fixed_voltage(pdo), pdo_max, op, max);
+		else
+			debug("Requested %u -> %u mV, %u mA for %u / %u mA\n",
+			      pdo_min_voltage(pdo), pdo_max_voltage(pdo),
+			      pdo_max, op, max);
+		break;
+	case PDO_TYPE_BATT:
+		max = rdo_max_power(rdo);
+		op = rdo_op_power(rdo);
+		pdo_max = pdo_max_power(pdo);
+
+		if (op > pdo_max)
+			return -EINVAL;
+		if (max > pdo_max && !(rdo & RDO_CAP_MISMATCH))
+			return -EINVAL;
+		printf("Requested %u -> %u mV, %u mW for %u / %u mW\n",
+		       pdo_min_voltage(pdo), pdo_max_voltage(pdo),
+		       pdo_max, op, max);
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	port->op_vsafe5v = index == 1;
+
+	return 0;
+}
+
+#define min_power(x, y) min(pdo_max_power(x), pdo_max_power(y))
+#define min_current(x, y) min(pdo_max_current(x), pdo_max_current(y))
+
+static int tcpm_pd_select_pdo(struct tcpm_port *port, int *sink_pdo,
+			      int *src_pdo)
+{
+	unsigned int i, j, max_src_mv = 0, min_src_mv = 0, max_mw = 0,
+		     max_mv = 0, src_mw = 0, src_ma = 0, max_snk_mv = 0,
+		     min_snk_mv = 0;
+	int ret = -EINVAL;
+
+	port->pps_data.supported = false;
+	port->usb_type = POWER_SUPPLY_USB_TYPE_PD;
+
+	/*
+	 * Select the source PDO providing the most power which has a
+	 * matchig sink cap.
+	 */
+	for (i = 0; i < port->nr_source_caps; i++) {
+		u32 pdo = port->source_caps[i];
+		enum pd_pdo_type type = pdo_type(pdo);
+
+		switch (type) {
+		case PDO_TYPE_FIXED:
+			max_src_mv = pdo_fixed_voltage(pdo);
+			min_src_mv = max_src_mv;
+			break;
+		case PDO_TYPE_BATT:
+		case PDO_TYPE_VAR:
+			max_src_mv = pdo_max_voltage(pdo);
+			min_src_mv = pdo_min_voltage(pdo);
+			break;
+		case PDO_TYPE_APDO:
+			if (pdo_apdo_type(pdo) == APDO_TYPE_PPS) {
+				port->pps_data.supported = true;
+				port->usb_type =
+					POWER_SUPPLY_USB_TYPE_PD_PPS;
+			}
+			continue;
+		default:
+			printf("Invalid source PDO type, ignoring\n");
+			continue;
+		}
+
+		switch (type) {
+		case PDO_TYPE_FIXED:
+		case PDO_TYPE_VAR:
+			src_ma = pdo_max_current(pdo);
+			src_mw = src_ma * min_src_mv / 1000;
+			break;
+		case PDO_TYPE_BATT:
+			src_mw = pdo_max_power(pdo);
+			break;
+		case PDO_TYPE_APDO:
+			continue;
+		default:
+			printf("Invalid source PDO type, ignoring\n");
+			continue;
+		}
+
+		for (j = 0; j < port->nr_snk_pdo; j++) {
+			pdo = port->snk_pdo[j];
+
+			switch (pdo_type(pdo)) {
+			case PDO_TYPE_FIXED:
+				max_snk_mv = pdo_fixed_voltage(pdo);
+				min_snk_mv = max_snk_mv;
+				break;
+			case PDO_TYPE_BATT:
+			case PDO_TYPE_VAR:
+				max_snk_mv = pdo_max_voltage(pdo);
+				min_snk_mv = pdo_min_voltage(pdo);
+				break;
+			case PDO_TYPE_APDO:
+				continue;
+			default:
+				printf("Invalid sink PDO type, ignoring\n");
+				continue;
+			}
+
+			if (max_src_mv <= max_snk_mv &&
+				min_src_mv >= min_snk_mv) {
+				/* Prefer higher voltages if available */
+				if ((src_mw == max_mw && min_src_mv > max_mv) ||
+							src_mw > max_mw) {
+					*src_pdo = i;
+					*sink_pdo = j;
+					max_mw = src_mw;
+					max_mv = min_src_mv;
+					ret = 0;
+				}
+			}
+		}
+	}
+
+	return ret;
+}
+
+#define min_pps_apdo_current(x, y)	\
+	min(pdo_pps_apdo_max_current(x), pdo_pps_apdo_max_current(y))
+
+static unsigned int tcpm_pd_select_pps_apdo(struct tcpm_port *port)
+{
+	unsigned int i, j, max_mw = 0, max_mv = 0;
+	unsigned int min_src_mv, max_src_mv, src_ma, src_mw;
+	unsigned int min_snk_mv, max_snk_mv;
+	unsigned int max_op_mv;
+	u32 pdo, src, snk;
+	unsigned int src_pdo = 0, snk_pdo = 0;
+
+	/*
+	 * Select the source PPS APDO providing the most power while staying
+	 * within the board's limits. We skip the first PDO as this is always
+	 * 5V 3A.
+	 */
+	for (i = 1; i < port->nr_source_caps; ++i) {
+		pdo = port->source_caps[i];
+
+		switch (pdo_type(pdo)) {
+		case PDO_TYPE_APDO:
+			if (pdo_apdo_type(pdo) != APDO_TYPE_PPS) {
+				printf("Not PPS APDO (source), ignoring\n");
+				continue;
+			}
+
+			min_src_mv = pdo_pps_apdo_min_voltage(pdo);
+			max_src_mv = pdo_pps_apdo_max_voltage(pdo);
+			src_ma = pdo_pps_apdo_max_current(pdo);
+			src_mw = (src_ma * max_src_mv) / 1000;
+
+			/*
+			 * Now search through the sink PDOs to find a matching
+			 * PPS APDO. Again skip the first sink PDO as this will
+			 * always be 5V 3A.
+			 */
+			for (j = 1; j < port->nr_snk_pdo; j++) {
+				pdo = port->snk_pdo[j];
+
+				switch (pdo_type(pdo)) {
+				case PDO_TYPE_APDO:
+					if (pdo_apdo_type(pdo) != APDO_TYPE_PPS) {
+						printf("Not PPS APDO (sink), ignoring\n");
+						continue;
+					}
+
+					min_snk_mv =
+						pdo_pps_apdo_min_voltage(pdo);
+					max_snk_mv =
+						pdo_pps_apdo_max_voltage(pdo);
+					break;
+				default:
+					printf("Not APDO type (sink), ignoring\n");
+					continue;
+				}
+
+				if (min_src_mv <= max_snk_mv &&
+				    max_src_mv >= min_snk_mv) {
+					max_op_mv = min(max_src_mv, max_snk_mv);
+					src_mw = (max_op_mv * src_ma) / 1000;
+					/* Prefer higher voltages if available */
+					if ((src_mw == max_mw &&
+					     max_op_mv > max_mv) ||
+					    src_mw > max_mw) {
+						src_pdo = i;
+						snk_pdo = j;
+						max_mw = src_mw;
+						max_mv = max_op_mv;
+					}
+				}
+			}
+
+			break;
+		default:
+			printf("Not APDO type (source), ignoring\n");
+			continue;
+		}
+	}
+
+	if (src_pdo) {
+		src = port->source_caps[src_pdo];
+		snk = port->snk_pdo[snk_pdo];
+
+		port->pps_data.req_min_volt = max(pdo_pps_apdo_min_voltage(src),
+						  pdo_pps_apdo_min_voltage(snk));
+		port->pps_data.req_max_volt = min(pdo_pps_apdo_max_voltage(src),
+						  pdo_pps_apdo_max_voltage(snk));
+		port->pps_data.req_max_curr = min_pps_apdo_current(src, snk);
+		port->pps_data.req_out_volt = min(port->pps_data.req_max_volt,
+						  max(port->pps_data.req_min_volt,
+						      port->pps_data.req_out_volt));
+		port->pps_data.req_op_curr = min(port->pps_data.req_max_curr,
+						 port->pps_data.req_op_curr);
+	}
+
+	return src_pdo;
+}
+
+static int tcpm_pd_build_request(struct tcpm_port *port, u32 *rdo)
+{
+	unsigned int mv, ma, mw, flags;
+	unsigned int max_ma, max_mw;
+	enum pd_pdo_type type;
+	u32 pdo, matching_snk_pdo;
+	int src_pdo_index = 0;
+	int snk_pdo_index = 0;
+	int ret;
+
+	ret = tcpm_pd_select_pdo(port, &snk_pdo_index, &src_pdo_index);
+	if (ret < 0)
+		return ret;
+
+	pdo = port->source_caps[src_pdo_index];
+	matching_snk_pdo = port->snk_pdo[snk_pdo_index];
+	type = pdo_type(pdo);
+
+	switch (type) {
+	case PDO_TYPE_FIXED:
+		mv = pdo_fixed_voltage(pdo);
+		break;
+	case PDO_TYPE_BATT:
+	case PDO_TYPE_VAR:
+		mv = pdo_min_voltage(pdo);
+		break;
+	default:
+		printf("Invalid PDO selected!\n");
+		return -EINVAL;
+	}
+
+	/* Select maximum available current within the sink pdo's limit */
+	if (type == PDO_TYPE_BATT) {
+		mw = min_power(pdo, matching_snk_pdo);
+		ma = 1000 * mw / mv;
+	} else {
+		ma = min_current(pdo, matching_snk_pdo);
+		mw = ma * mv / 1000;
+	}
+
+	flags = RDO_USB_COMM | RDO_NO_SUSPEND;
+
+	/* Set mismatch bit if offered power is less than operating power */
+	max_ma = ma;
+	max_mw = mw;
+	if (mw < port->operating_snk_mw) {
+		flags |= RDO_CAP_MISMATCH;
+		if (type == PDO_TYPE_BATT &&
+		    (pdo_max_power(matching_snk_pdo) > pdo_max_power(pdo)))
+			max_mw = pdo_max_power(matching_snk_pdo);
+		else if (pdo_max_current(matching_snk_pdo) >
+			 pdo_max_current(pdo))
+			max_ma = pdo_max_current(matching_snk_pdo);
+	}
+
+	debug("cc=%d cc1=%d cc2=%d vbus=%d vconn=%s polarity=%d\n",
+	      port->cc_req, port->cc1, port->cc2, port->vbus_source,
+	      port->vconn_role == TYPEC_SOURCE ? "source" : "sink",
+	      port->polarity);
+
+	if (type == PDO_TYPE_BATT) {
+		*rdo = RDO_BATT(src_pdo_index + 1, mw, max_mw, flags);
+
+		printf("Requesting PDO %d: %u mV, %u mW%s\n",
+		       src_pdo_index, mv, mw,
+		       flags & RDO_CAP_MISMATCH ? " [mismatch]" : "");
+	} else {
+		*rdo = RDO_FIXED(src_pdo_index + 1, ma, max_ma, flags);
+
+		printf("Requesting PDO %d: %u mV, %u mA%s\n",
+			src_pdo_index, mv, ma,
+			flags & RDO_CAP_MISMATCH ? " [mismatch]" : "");
+	}
+
+	port->req_current_limit = ma;
+	port->req_supply_voltage = mv;
+
+	return 0;
+}
+
+static int tcpm_pd_send_request(struct tcpm_port *port)
+{
+	struct pd_message msg;
+	int ret;
+	u32 rdo;
+
+	ret = tcpm_pd_build_request(port, &rdo);
+	if (ret < 0)
+		return ret;
+
+	memset(&msg, 0, sizeof(msg));
+	msg.header = PD_HEADER_LE(PD_DATA_REQUEST,
+				  port->pwr_role,
+				  port->data_role,
+				  port->negotiated_rev,
+				  port->message_id, 1);
+	msg.payload[0] = cpu_to_le32(rdo);
+
+	return tcpm_pd_transmit(port, TCPC_TX_SOP, &msg);
+}
+
+static int tcpm_pd_build_pps_request(struct tcpm_port *port, u32 *rdo)
+{
+	unsigned int out_mv, op_ma, op_mw, max_mv, max_ma, flags;
+	enum pd_pdo_type type;
+	unsigned int src_pdo_index;
+	u32 pdo;
+
+	src_pdo_index = tcpm_pd_select_pps_apdo(port);
+	if (!src_pdo_index)
+		return -EOPNOTSUPP;
+
+	pdo = port->source_caps[src_pdo_index];
+	type = pdo_type(pdo);
+
+	switch (type) {
+	case PDO_TYPE_APDO:
+		if (pdo_apdo_type(pdo) != APDO_TYPE_PPS) {
+			printf("Invalid APDO selected!\n");
+			return -EINVAL;
+		}
+		max_mv = port->pps_data.req_max_volt;
+		max_ma = port->pps_data.req_max_curr;
+		out_mv = port->pps_data.req_out_volt;
+		op_ma = port->pps_data.req_op_curr;
+		break;
+	default:
+		printf("Invalid PDO selected!\n");
+		return -EINVAL;
+	}
+
+	flags = RDO_USB_COMM | RDO_NO_SUSPEND;
+
+	op_mw = (op_ma * out_mv) / 1000;
+	if (op_mw < port->operating_snk_mw) {
+		/*
+		 * Try raising current to meet power needs. If that's not enough
+		 * then try upping the voltage. If that's still not enough
+		 * then we've obviously chosen a PPS APDO which really isn't
+		 * suitable so abandon ship.
+		 */
+		op_ma = (port->operating_snk_mw * 1000) / out_mv;
+		if ((port->operating_snk_mw * 1000) % out_mv)
+			++op_ma;
+		op_ma += RDO_PROG_CURR_MA_STEP - (op_ma % RDO_PROG_CURR_MA_STEP);
+
+		if (op_ma > max_ma) {
+			op_ma = max_ma;
+			out_mv = (port->operating_snk_mw * 1000) / op_ma;
+			if ((port->operating_snk_mw * 1000) % op_ma)
+				++out_mv;
+			out_mv += RDO_PROG_VOLT_MV_STEP -
+				  (out_mv % RDO_PROG_VOLT_MV_STEP);
+
+			if (out_mv > max_mv) {
+				printf("Invalid PPS APDO selected!\n");
+				return -EINVAL;
+			}
+		}
+	}
+
+	debug("cc=%d cc1=%d cc2=%d vbus=%d vconn=%s polarity=%d\n",
+	      port->cc_req, port->cc1, port->cc2, port->vbus_source,
+	      port->vconn_role == TYPEC_SOURCE ? "source" : "sink",
+	      port->polarity);
+
+	*rdo = RDO_PROG(src_pdo_index + 1, out_mv, op_ma, flags);
+
+	printf("Requesting APDO %d: %u mV, %u mA\n",
+	       src_pdo_index, out_mv, op_ma);
+
+	port->pps_data.req_op_curr = op_ma;
+	port->pps_data.req_out_volt = out_mv;
+
+	return 0;
+}
+
+static int tcpm_pd_send_pps_request(struct tcpm_port *port)
+{
+	struct pd_message msg;
+	int ret;
+	u32 rdo;
+
+	ret = tcpm_pd_build_pps_request(port, &rdo);
+	if (ret < 0)
+		return ret;
+
+	memset(&msg, 0, sizeof(msg));
+	msg.header = PD_HEADER_LE(PD_DATA_REQUEST,
+				  port->pwr_role,
+				  port->data_role,
+				  port->negotiated_rev,
+				  port->message_id, 1);
+	msg.payload[0] = cpu_to_le32(rdo);
+
+	return tcpm_pd_transmit(port, TCPC_TX_SOP, &msg);
+}
+
+static int tcpm_set_vbus(struct tcpm_port *port, bool enable)
+{
+	int ret;
+
+	if (enable && port->vbus_charge)
+		return -EINVAL;
+
+	debug("vbus = %d charge = %d\n", enable, port->vbus_charge);
+
+	ret = port->tcpc->set_vbus(port->tcpc, enable, port->vbus_charge);
+	if (ret < 0)
+		return ret;
+
+	port->vbus_source = enable;
+	return 0;
+}
+
+static int tcpm_set_charge(struct tcpm_port *port, bool charge)
+{
+	int ret;
+
+	if (charge && port->vbus_source)
+		return -EINVAL;
+
+	if (charge != port->vbus_charge) {
+		debug("vbus = %d charge = %d\n", port->vbus_source, charge);
+		ret = port->tcpc->set_vbus(port->tcpc, port->vbus_source,
+					   charge);
+		if (ret < 0)
+			return ret;
+	}
+	port->vbus_charge = charge;
+	return 0;
+}
+
+static bool tcpm_start_toggling(struct tcpm_port *port, enum typec_cc_status cc)
+{
+	int ret;
+
+	if (!port->tcpc->start_toggling)
+		return false;
+
+	printf("Start toggling\n");
+	ret = port->tcpc->start_toggling(port->tcpc, port->port_type, cc);
+	return ret == 0;
+}
+
+static int tcpm_init_vbus(struct tcpm_port *port)
+{
+	int ret;
+
+	ret = port->tcpc->set_vbus(port->tcpc, false, false);
+	port->vbus_source = false;
+	port->vbus_charge = false;
+	return ret;
+}
+
+static int tcpm_init_vconn(struct tcpm_port *port)
+{
+	int ret;
+
+	ret = port->tcpc->set_vconn(port->tcpc, false);
+	port->vconn_role = TYPEC_SINK;
+	return ret;
+}
+
+static void tcpm_typec_connect(struct tcpm_port *port)
+{
+	if (!port->connected) {
+		port->connected = true;
+	}
+}
+
+static int tcpm_src_attach(struct tcpm_port *port)
+{
+	enum typec_cc_polarity polarity =
+				port->cc2 == TYPEC_CC_RD ? TYPEC_POLARITY_CC2
+							 : TYPEC_POLARITY_CC1;
+	int ret;
+
+	if (port->attached)
+		return 0;
+
+	ret = tcpm_set_polarity(port, polarity);
+	if (ret < 0)
+		return ret;
+
+	ret = tcpm_set_roles(port, true, TYPEC_SOURCE, TYPEC_HOST);
+	if (ret < 0)
+		return ret;
+
+	ret = port->tcpc->set_pd_rx(port->tcpc, true);
+	if (ret < 0)
+		goto out_disable_mux;
+
+	/*
+	 * USB Type-C specification, version 1.2,
+	 * chapter 4.5.2.2.8.1 (Attached.SRC Requirements)
+	 * Enable VCONN only if the non-RD port is set to RA.
+	 */
+	if ((polarity == TYPEC_POLARITY_CC1 && port->cc2 == TYPEC_CC_RA) ||
+	    (polarity == TYPEC_POLARITY_CC2 && port->cc1 == TYPEC_CC_RA)) {
+		ret = tcpm_set_vconn(port, true);
+		if (ret < 0)
+			goto out_disable_pd;
+	}
+
+	ret = tcpm_set_vbus(port, true);
+	if (ret < 0)
+		goto out_disable_vconn;
+
+	port->pd_capable = false;
+
+	port->partner = NULL;
+
+	port->attached = true;
+	port->debouncing = false;
+	//port->send_discover = true;
+
+	return 0;
+
+out_disable_vconn:
+	tcpm_set_vconn(port, false);
+out_disable_pd:
+	port->tcpc->set_pd_rx(port->tcpc, false);
+out_disable_mux:
+	printf("CC connected in %s as DFP\n",
+		polarity ? "CC2" : "CC1");
+	return 0;
+}
+
+static void tcpm_typec_disconnect(struct tcpm_port *port)
+{
+	if (port->connected) {
+		port->partner = NULL;
+		port->connected = false;
+	}
+}
+
+static void tcpm_reset_port(struct tcpm_port *port)
+{
+	tcpm_timer_uninit(port);
+	tcpm_typec_disconnect(port);
+	port->poll_event_cnt = 0;
+	port->wait_dr_swap_Message = false;
+	port->attached = false;
+	port->pd_capable = false;
+	port->pps_data.supported = false;
+
+	/*
+	 * First Rx ID should be 0; set this to a sentinel of -1 so that
+	 * we can check tcpm_pd_rx_handler() if we had seen it before.
+	 */
+	port->rx_msgid = -1;
+
+	port->tcpc->set_pd_rx(port->tcpc, false);
+	tcpm_init_vbus(port);	/* also disables charging */
+	tcpm_init_vconn(port);
+	tcpm_set_current_limit(port, 0, 0);
+	tcpm_set_polarity(port, TYPEC_POLARITY_CC1);
+	tcpm_set_attached_state(port, false);
+	port->usb_type = POWER_SUPPLY_USB_TYPE_C;
+	port->nr_sink_caps = 0;
+	port->sink_cap_done = false;
+}
+
+static void tcpm_detach(struct tcpm_port *port)
+{
+	if (tcpm_port_is_disconnected(port))
+		port->hard_reset_count = 0;
+
+	if (!port->attached)
+		return;
+
+	tcpm_reset_port(port);
+}
+
+static void tcpm_src_detach(struct tcpm_port *port)
+{
+	tcpm_detach(port);
+}
+
+static int tcpm_snk_attach(struct tcpm_port *port)
+{
+	int ret;
+
+	if (port->attached)
+		return 0;
+
+	ret = tcpm_set_polarity(port, port->cc2 != TYPEC_CC_OPEN ?
+				TYPEC_POLARITY_CC2 : TYPEC_POLARITY_CC1);
+	if (ret < 0)
+		return ret;
+
+	ret = tcpm_set_roles(port, true, TYPEC_SINK, TYPEC_DEVICE);
+	if (ret < 0)
+		return ret;
+
+	port->pd_capable = false;
+
+	port->partner = NULL;
+
+	port->attached = true;
+	port->debouncing = false;
+	printf("CC connected in %s as UFP\n",
+		port->cc1 != TYPEC_CC_OPEN ? "CC1" : "CC2");
+
+	return 0;
+}
+
+static void tcpm_snk_detach(struct tcpm_port *port)
+{
+	tcpm_detach(port);
+}
+
+static int tcpm_acc_attach(struct tcpm_port *port)
+{
+	int ret;
+
+	if (port->attached)
+		return 0;
+
+	ret = tcpm_set_roles(port, true, TYPEC_SOURCE, TYPEC_HOST);
+	if (ret < 0)
+		return ret;
+
+	port->partner = NULL;
+
+	tcpm_typec_connect(port);
+
+	port->attached = true;
+
+	dev_info(port->dev, "CC connected as Audio Accessory\n");
+
+	return 0;
+}
+
+static void tcpm_acc_detach(struct tcpm_port *port)
+{
+	tcpm_detach(port);
+}
+
+static inline enum tcpm_state hard_reset_state(struct tcpm_port *port)
+{
+	if (port->hard_reset_count < PD_N_HARD_RESET_COUNT)
+		return HARD_RESET_SEND;
+	if (port->pd_capable)
+		return ERROR_RECOVERY;
+	if (port->pwr_role == TYPEC_SOURCE)
+		return SRC_UNATTACHED;
+	if (port->state == SNK_WAIT_CAPABILITIES)
+		return SNK_READY;
+	return SNK_UNATTACHED;
+}
+
+static inline enum tcpm_state unattached_state(struct tcpm_port *port)
+{
+	if (port->port_type == TYPEC_PORT_DRP) {
+		if (port->pwr_role == TYPEC_SOURCE)
+			return SRC_UNATTACHED;
+		else
+			return SNK_UNATTACHED;
+	} else if (port->port_type == TYPEC_PORT_SRC) {
+		return SRC_UNATTACHED;
+	}
+
+	return SNK_UNATTACHED;
+}
+
+bool tcpm_is_toggling(struct tcpm_port *port)
+{
+	if (port->port_type == TYPEC_PORT_DRP)
+		return port->state == SRC_UNATTACHED || port->state == SNK_UNATTACHED ||
+			port->state == TOGGLING;
+
+	return false;
+}
+EXPORT_SYMBOL_GPL(tcpm_is_toggling);
+
+static void run_state_machine(struct tcpm_port *port)
+{
+	int ret;
+
+	port->enter_state = port->state;
+	switch (port->state) {
+	case TOGGLING:
+		break;
+	/* SRC states */
+	case SRC_UNATTACHED:
+		tcpm_src_detach(port);
+		if (tcpm_start_toggling(port, tcpm_rp_cc(port))) {
+			tcpm_set_state(port, TOGGLING, 0);
+			break;
+		}
+		tcpm_set_cc(port, tcpm_rp_cc(port));
+		if (port->port_type == TYPEC_PORT_DRP)
+			tcpm_set_state(port, SNK_UNATTACHED, PD_T_DRP_SNK);
+		break;
+	case SRC_ATTACH_WAIT:
+		if (tcpm_port_is_debug(port))
+			tcpm_set_state(port, DEBUG_ACC_ATTACHED,
+				       PD_T_CC_DEBOUNCE);
+		else if (tcpm_port_is_audio(port))
+			tcpm_set_state(port, AUDIO_ACC_ATTACHED,
+				       PD_T_CC_DEBOUNCE);
+		else if (tcpm_port_is_source(port))
+			tcpm_set_state(port, SRC_ATTACHED, PD_T_CC_DEBOUNCE);
+		break;
+
+	case SRC_ATTACHED:
+		ret = tcpm_src_attach(port);
+		/*
+		 * Currently, vbus control is not implemented,
+		 * and the SRC detection process cannot be fully implemented.
+		 */
+		tcpm_set_state(port, SRC_READY, 0);
+#if 0
+		tcpm_set_state(port, SRC_UNATTACHED,
+			       ret < 0 ? 0 : PD_T_PS_SOURCE_ON);
+#endif
+		break;
+	case SRC_STARTUP:
+		port->caps_count = 0;
+		port->negotiated_rev = PD_MAX_REV;
+		port->message_id = 0;
+		port->rx_msgid = -1;
+		port->explicit_contract = false;
+		tcpm_set_state(port, SRC_SEND_CAPABILITIES, 0);
+		break;
+	case SRC_SEND_CAPABILITIES:
+		port->caps_count++;
+		if (port->caps_count > PD_N_CAPS_COUNT) {
+			tcpm_set_state(port, SRC_READY, 0);
+			break;
+		}
+		ret = tcpm_pd_send_source_caps(port);
+		if (ret < 0) {
+			tcpm_set_state(port, SRC_SEND_CAPABILITIES,
+				       PD_T_SEND_SOURCE_CAP);
+		} else {
+			/*
+			 * Per standard, we should clear the reset counter here.
+			 * However, that can result in state machine hang-ups.
+			 * Reset it only in READY state to improve stability.
+			 */
+			/* port->hard_reset_count = 0; */
+			port->caps_count = 0;
+			port->pd_capable = true;
+			tcpm_set_state_cond(port, SRC_SEND_CAPABILITIES_TIMEOUT,
+					    PD_T_SEND_SOURCE_CAP);
+		}
+		break;
+	case SRC_SEND_CAPABILITIES_TIMEOUT:
+		/*
+		 * Error recovery for a PD_DATA_SOURCE_CAP reply timeout.
+		 *
+		 * PD 2.0 sinks are supposed to accept src-capabilities with a
+		 * 3.0 header and simply ignore any src PDOs which the sink does
+		 * not understand such as PPS but some 2.0 sinks instead ignore
+		 * the entire PD_DATA_SOURCE_CAP message, causing contract
+		 * negotiation to fail.
+		 *
+		 * After PD_N_HARD_RESET_COUNT hard-reset attempts, we try
+		 * sending src-capabilities with a lower PD revision to
+		 * make these broken sinks work.
+		 */
+		if (port->hard_reset_count < PD_N_HARD_RESET_COUNT) {
+			tcpm_set_state(port, HARD_RESET_SEND, 0);
+		} else if (port->negotiated_rev > PD_REV20) {
+			port->negotiated_rev--;
+			port->hard_reset_count = 0;
+			tcpm_set_state(port, SRC_SEND_CAPABILITIES, 0);
+		} else {
+			tcpm_set_state(port, hard_reset_state(port), 0);
+		}
+		break;
+	case SRC_NEGOTIATE_CAPABILITIES:
+		ret = tcpm_pd_check_request(port);
+		if (ret < 0) {
+			tcpm_pd_send_control(port, PD_CTRL_REJECT);
+			if (!port->explicit_contract) {
+				tcpm_set_state(port,
+					       SRC_WAIT_NEW_CAPABILITIES, 0);
+			} else {
+				tcpm_set_state(port, SRC_READY, 0);
+			}
+		} else {
+			tcpm_pd_send_control(port, PD_CTRL_ACCEPT);
+			tcpm_set_state(port, SRC_TRANSITION_SUPPLY,
+				       PD_T_SRC_TRANSITION);
+		}
+		break;
+	case SRC_TRANSITION_SUPPLY:
+		/* XXX: regulator_set_voltage(vbus, ...) */
+		tcpm_pd_send_control(port, PD_CTRL_PS_RDY);
+		port->explicit_contract = true;
+		tcpm_set_state_cond(port, SRC_READY, 0);
+		break;
+	case SRC_READY:
+#if 1
+		port->hard_reset_count = 0;
+#endif
+		port->try_src_count = 0;
+
+		tcpm_typec_connect(port);
+		break;
+	case SRC_WAIT_NEW_CAPABILITIES:
+		/* Nothing to do... */
+		break;
+
+	/* SNK states */
+	case SNK_UNATTACHED:
+		tcpm_snk_detach(port);
+		if (tcpm_start_toggling(port, TYPEC_CC_RD)) {
+			tcpm_set_state(port, TOGGLING, 0);
+			break;
+		}
+		tcpm_set_cc(port, TYPEC_CC_RD);
+		if (port->port_type == TYPEC_PORT_DRP)
+			tcpm_set_state(port, SRC_UNATTACHED, PD_T_DRP_SRC);
+		break;
+	case SNK_ATTACH_WAIT:
+		if ((port->cc1 == TYPEC_CC_OPEN &&
+		     port->cc2 != TYPEC_CC_OPEN) ||
+		    (port->cc1 != TYPEC_CC_OPEN &&
+		     port->cc2 == TYPEC_CC_OPEN))
+			tcpm_set_state(port, SNK_DEBOUNCED,
+				       PD_T_CC_DEBOUNCE);
+		else if (tcpm_port_is_disconnected(port))
+			tcpm_set_state(port, SNK_UNATTACHED,
+				       PD_T_CC_DEBOUNCE);
+		break;
+	case SNK_DEBOUNCED:
+		if (tcpm_port_is_disconnected(port)) {
+			tcpm_set_state(port, SNK_UNATTACHED,
+				       PD_T_PD_DEBOUNCE);
+		} else if (port->vbus_present)
+			tcpm_set_state(port, SNK_ATTACHED, 0);
+		else
+			/* Wait for VBUS, but not forever */
+			tcpm_set_state(port, PORT_RESET, PD_T_PS_SOURCE_ON);
+		break;
+
+	case SNK_ATTACHED:
+		ret = tcpm_snk_attach(port);
+		if (ret < 0)
+			tcpm_set_state(port, SNK_UNATTACHED, 0);
+		else
+			tcpm_set_state(port, SNK_STARTUP, 0);
+		break;
+	case SNK_STARTUP:
+		port->negotiated_rev = PD_MAX_REV;
+		port->message_id = 0;
+		port->rx_msgid = -1;
+		port->explicit_contract = false;
+		tcpm_set_state(port, SNK_DISCOVERY, 0);
+		break;
+	case SNK_DISCOVERY:
+		if (port->vbus_present) {
+			tcpm_set_current_limit(port,
+					       tcpm_get_current_limit(port),
+					       5000);
+			tcpm_set_charge(port, true);
+			tcpm_set_state(port, SNK_WAIT_CAPABILITIES, 0);
+			break;
+		}
+		/*
+		 * For DRP, timeouts differ. Also, handling is supposed to be
+		 * different and much more complex (dead battery detection;
+		 * see USB power delivery specification, section 8.3.3.6.1.5.1).
+		 */
+		tcpm_set_state(port, hard_reset_state(port),
+			       port->port_type == TYPEC_PORT_DRP ?
+					PD_T_DB_DETECT : PD_T_NO_RESPONSE);
+		break;
+	case SNK_DISCOVERY_DEBOUNCE:
+		tcpm_set_state(port, SNK_DISCOVERY_DEBOUNCE_DONE,
+			       PD_T_CC_DEBOUNCE);
+		break;
+	case SNK_DISCOVERY_DEBOUNCE_DONE:
+#if 0
+		if (!tcpm_port_is_disconnected(port) &&
+		    tcpm_port_is_sink(port) &&
+		    ktime_after(port->delayed_runtime, ktime_get())) {
+			tcpm_set_state(port, SNK_DISCOVERY,
+				       ktime_to_ms(ktime_sub(port->delayed_runtime, ktime_get())));
+			break;
+		}
+#endif
+		tcpm_set_state(port, unattached_state(port), 0);
+		break;
+	case SNK_WAIT_CAPABILITIES:
+		ret = port->tcpc->set_pd_rx(port->tcpc, true);
+		if (ret < 0) {
+			tcpm_set_state(port, SNK_READY, 0);
+			break;
+		}
+		/*
+		 * If VBUS has never been low, and we time out waiting
+		 * for source cap, try a soft reset first, in case we
+		 * were already in a stable contract before this boot.
+		 * Do this only once.
+		 */
+		if (port->vbus_never_low) {
+			port->vbus_never_low = false;
+			tcpm_set_state(port, SOFT_RESET_SEND,
+				       PD_T_SINK_WAIT_CAP);
+		} else {
+			tcpm_set_state(port, hard_reset_state(port),
+				       PD_T_SINK_WAIT_CAP);
+		}
+		break;
+	case SNK_NEGOTIATE_CAPABILITIES:
+		port->pd_capable = true;
+		port->hard_reset_count = 0;
+		ret = tcpm_pd_send_request(port);
+		if (ret < 0) {
+			/* Let the Source send capabilities again. */
+			tcpm_set_state(port, SNK_WAIT_CAPABILITIES, 0);
+		} else {
+			tcpm_set_state_cond(port, hard_reset_state(port),
+					    PD_T_SENDER_RESPONSE);
+		}
+		break;
+	case SNK_NEGOTIATE_PPS_CAPABILITIES:
+		ret = tcpm_pd_send_pps_request(port);
+		if (ret < 0) {
+			port->pps_status = ret;
+			/*
+			 * If this was called due to updates to sink
+			 * capabilities, and pps is no longer valid, we should
+			 * safely fall back to a standard PDO.
+			 */
+			if (port->update_sink_caps)
+				tcpm_set_state(port, SNK_NEGOTIATE_CAPABILITIES, 0);
+			else
+				tcpm_set_state(port, SNK_READY, 0);
+		} else {
+			tcpm_set_state_cond(port, hard_reset_state(port),
+					    PD_T_SENDER_RESPONSE);
+		}
+		break;
+	case SNK_TRANSITION_SINK:
+	case SNK_TRANSITION_SINK_VBUS:
+		tcpm_set_state(port, hard_reset_state(port),
+			       PD_T_PS_TRANSITION);
+		break;
+	case SNK_READY:
+		port->try_snk_count = 0;
+		port->update_sink_caps = false;
+		tcpm_typec_connect(port);
+		/*
+		 * Here poll_event_cnt is cleared, waiting for self-powered Type-C devices
+		 * to send DR_swap Messge until 1s (TCPM_POLL_EVENT_TIME_OUT * 500us)timeout
+		 */
+		if (port->wait_dr_swap_Message)
+			port->poll_event_cnt = 0;
+
+		break;
+
+	/* Accessory states */
+	case ACC_UNATTACHED:
+		tcpm_acc_detach(port);
+		tcpm_set_state(port, SRC_UNATTACHED, 0);
+		break;
+	case DEBUG_ACC_ATTACHED:
+	case AUDIO_ACC_ATTACHED:
+		ret = tcpm_acc_attach(port);
+		if (ret < 0)
+			tcpm_set_state(port, ACC_UNATTACHED, 0);
+		break;
+	case AUDIO_ACC_DEBOUNCE:
+		tcpm_set_state(port, ACC_UNATTACHED, PD_T_CC_DEBOUNCE);
+		break;
+
+	/* Hard_Reset states */
+	case HARD_RESET_SEND:
+		tcpm_pd_transmit(port, TCPC_TX_HARD_RESET, NULL);
+		tcpm_set_state(port, HARD_RESET_START, 0);
+		port->wait_dr_swap_Message = false;
+		break;
+	case HARD_RESET_START:
+		port->hard_reset_count++;
+		port->tcpc->set_pd_rx(port->tcpc, false);
+		port->nr_sink_caps = 0;
+		port->send_discover = true;
+		if (port->pwr_role == TYPEC_SOURCE)
+			tcpm_set_state(port, SRC_HARD_RESET_VBUS_OFF,
+				       PD_T_PS_HARD_RESET);
+		else
+			tcpm_set_state(port, SNK_HARD_RESET_SINK_OFF, 0);
+		break;
+	case SRC_HARD_RESET_VBUS_OFF:
+		tcpm_set_vconn(port, true);
+		tcpm_set_vbus(port, false);
+		tcpm_set_roles(port, port->self_powered, TYPEC_SOURCE,
+			       TYPEC_HOST);
+		tcpm_set_state(port, SRC_HARD_RESET_VBUS_ON, PD_T_SRC_RECOVER);
+		break;
+	case SRC_HARD_RESET_VBUS_ON:
+		tcpm_set_vconn(port, true);
+		tcpm_set_vbus(port, true);
+		port->tcpc->set_pd_rx(port->tcpc, true);
+		tcpm_set_attached_state(port, true);
+		tcpm_set_state(port, SRC_UNATTACHED, PD_T_PS_SOURCE_ON);
+		break;
+	case SNK_HARD_RESET_SINK_OFF:
+		memset(&port->pps_data, 0, sizeof(port->pps_data));
+		tcpm_set_vconn(port, false);
+		if (port->pd_capable)
+			tcpm_set_charge(port, false);
+		tcpm_set_roles(port, port->self_powered, TYPEC_SINK,
+			       TYPEC_DEVICE);
+		/*
+		 * VBUS may or may not toggle, depending on the adapter.
+		 * If it doesn't toggle, transition to SNK_HARD_RESET_SINK_ON
+		 * directly after timeout.
+		 */
+		tcpm_set_state(port, SNK_HARD_RESET_SINK_ON, PD_T_SAFE_0V);
+		break;
+	case SNK_HARD_RESET_WAIT_VBUS:
+		/* Assume we're disconnected if VBUS doesn't come back. */
+		tcpm_set_state(port, SNK_UNATTACHED,
+			       PD_T_SRC_RECOVER_MAX + PD_T_SRC_TURN_ON);
+		break;
+	case SNK_HARD_RESET_SINK_ON:
+		/* Note: There is no guarantee that VBUS is on in this state */
+		/*
+		 * XXX:
+		 * The specification suggests that dual mode ports in sink
+		 * mode should transition to state PE_SRC_Transition_to_default.
+		 * See USB power delivery specification chapter 8.3.3.6.1.3.
+		 * This would mean to to
+		 * - turn off VCONN, reset power supply
+		 * - request hardware reset
+		 * - turn on VCONN
+		 * - Transition to state PE_Src_Startup
+		 * SNK only ports shall transition to state Snk_Startup
+		 * (see chapter 8.3.3.3.8).
+		 * Similar, dual-mode ports in source mode should transition
+		 * to PE_SNK_Transition_to_default.
+		 */
+		if (port->pd_capable) {
+			tcpm_set_current_limit(port,
+					       tcpm_get_current_limit(port),
+					       5000);
+			tcpm_set_charge(port, true);
+		}
+		tcpm_set_attached_state(port, true);
+		tcpm_set_state(port, SNK_STARTUP, 0);
+		break;
+
+	/* Soft_Reset states */
+	case SOFT_RESET:
+		port->message_id = 0;
+		port->rx_msgid = -1;
+		tcpm_pd_send_control(port, PD_CTRL_ACCEPT);
+		if (port->pwr_role == TYPEC_SOURCE) {
+			tcpm_set_state(port, SRC_SEND_CAPABILITIES, 0);
+		} else {
+			tcpm_set_state(port, SNK_WAIT_CAPABILITIES, 0);
+		}
+		break;
+	case SOFT_RESET_SEND:
+		port->message_id = 0;
+		port->rx_msgid = -1;
+		if (tcpm_pd_send_control(port, PD_CTRL_SOFT_RESET))
+			tcpm_set_state_cond(port, hard_reset_state(port), 0);
+		else
+			tcpm_set_state_cond(port, hard_reset_state(port),
+					    PD_T_SENDER_RESPONSE);
+		break;
+
+	/* DR_Swap states */
+	case DR_SWAP_SEND:
+		tcpm_pd_send_control(port, PD_CTRL_DR_SWAP);
+		tcpm_set_state_cond(port, DR_SWAP_SEND_TIMEOUT,
+				    PD_T_SENDER_RESPONSE);
+		break;
+	case DR_SWAP_ACCEPT:
+		tcpm_pd_send_control(port, PD_CTRL_ACCEPT);
+#if 0
+		/* Set VDM state machine running flag ASAP */
+		if (port->data_role == TYPEC_DEVICE && port->send_discover)
+			port->vdm_sm_running = true;
+#endif
+		tcpm_set_state_cond(port, DR_SWAP_CHANGE_DR, 0);
+		break;
+	case DR_SWAP_SEND_TIMEOUT:
+		//tcpm_swap_complete(port, -ETIMEDOUT);
+		tcpm_set_state(port, ready_state(port), 0);
+		break;
+	case DR_SWAP_CHANGE_DR:
+		if (port->data_role == TYPEC_HOST) {
+			//tcpm_unregister_altmodes(port);
+			tcpm_set_roles(port, true, port->pwr_role,
+				       TYPEC_DEVICE);
+		} else {
+			tcpm_set_roles(port, true, port->pwr_role,
+				       TYPEC_HOST);
+			//port->send_discover = true;
+		}
+		/* DR_swap process complete, wait_dr_swap_Message is cleared */
+		port->wait_dr_swap_Message = false;
+		tcpm_set_state(port, ready_state(port), 0);
+		break;
+
+#if 0
+
+	/* PR_Swap states */
+	case PR_SWAP_ACCEPT:
+		tcpm_pd_send_control(port, PD_CTRL_ACCEPT);
+		tcpm_set_state(port, PR_SWAP_START, 0);
+		break;
+	case PR_SWAP_SEND:
+		tcpm_pd_send_control(port, PD_CTRL_PR_SWAP);
+		tcpm_set_state_cond(port, PR_SWAP_SEND_TIMEOUT,
+				    PD_T_SENDER_RESPONSE);
+		break;
+	case PR_SWAP_SEND_TIMEOUT:
+		tcpm_set_state(port, ready_state(port), 0);
+		break;
+	case PR_SWAP_START:
+		tcpm_apply_rc(port);
+		if (port->pwr_role == TYPEC_SOURCE)
+			tcpm_set_state(port, PR_SWAP_SRC_SNK_TRANSITION_OFF,
+				       PD_T_SRC_TRANSITION);
+		else
+			tcpm_set_state(port, PR_SWAP_SNK_SRC_SINK_OFF, 0);
+		break;
+	case PR_SWAP_SRC_SNK_TRANSITION_OFF:
+		/*
+		 * Prevent vbus discharge circuit from turning on during PR_SWAP
+		 * as this is not a disconnect.
+		 */
+		tcpm_set_vbus(port, false);
+		port->explicit_contract = false;
+		/* allow time for Vbus discharge, must be < tSrcSwapStdby */
+		tcpm_set_state(port, PR_SWAP_SRC_SNK_SOURCE_OFF,
+			       PD_T_SRCSWAPSTDBY);
+		break;
+	case PR_SWAP_SRC_SNK_SOURCE_OFF:
+		timer_val_msecs = PD_T_CC_DEBOUNCE;
+		trace_android_vh_typec_tcpm_get_timer(tcpm_states[PR_SWAP_SRC_SNK_SOURCE_OFF],
+						      CC_DEBOUNCE, &timer_val_msecs);
+		tcpm_set_cc(port, TYPEC_CC_RD);
+		/* allow CC debounce */
+		tcpm_set_state(port, PR_SWAP_SRC_SNK_SOURCE_OFF_CC_DEBOUNCED,
+			       timer_val_msecs);
+		break;
+	case PR_SWAP_SRC_SNK_SOURCE_OFF_CC_DEBOUNCED:
+		/*
+		 * USB-PD standard, 6.2.1.4, Port Power Role:
+		 * "During the Power Role Swap Sequence, for the initial Source
+		 * Port, the Port Power Role field shall be set to Sink in the
+		 * PS_RDY Message indicating that the initial Source’s power
+		 * supply is turned off"
+		 */
+		tcpm_set_pwr_role(port, TYPEC_SINK);
+		if (tcpm_pd_send_control(port, PD_CTRL_PS_RDY)) {
+			tcpm_set_state(port, ERROR_RECOVERY, 0);
+			break;
+		}
+		tcpm_set_state(port, ERROR_RECOVERY, PD_T_PS_SOURCE_ON_PRS);
+		break;
+	case PR_SWAP_SRC_SNK_SINK_ON:
+		tcpm_enable_auto_vbus_discharge(port, true);
+		/* Set the vbus disconnect threshold for implicit contract */
+		tcpm_set_auto_vbus_discharge_threshold(port, TYPEC_PWR_MODE_USB, false, VSAFE5V);
+		tcpm_set_state(port, SNK_STARTUP, 0);
+		break;
+	case PR_SWAP_SNK_SRC_SINK_OFF:
+		timer_val_msecs = PD_T_PS_SOURCE_OFF;
+		trace_android_vh_typec_tcpm_get_timer(tcpm_states[PR_SWAP_SNK_SRC_SINK_OFF],
+						      SOURCE_OFF, &timer_val_msecs);
+		/*
+		 * Prevent vbus discharge circuit from turning on during PR_SWAP
+		 * as this is not a disconnect.
+		 */
+		tcpm_set_auto_vbus_discharge_threshold(port, TYPEC_PWR_MODE_USB,
+						       port->pps_data.active, 0);
+		tcpm_set_charge(port, false);
+		tcpm_set_state(port, hard_reset_state(port), timer_val_msecs);
+		break;
+	case PR_SWAP_SNK_SRC_SOURCE_ON:
+		tcpm_enable_auto_vbus_discharge(port, true);
+		tcpm_set_cc(port, tcpm_rp_cc(port));
+		tcpm_set_vbus(port, true);
+		/*
+		 * allow time VBUS ramp-up, must be < tNewSrc
+		 * Also, this window overlaps with CC debounce as well.
+		 * So, Wait for the max of two which is PD_T_NEWSRC
+		 */
+		tcpm_set_state(port, PR_SWAP_SNK_SRC_SOURCE_ON_VBUS_RAMPED_UP,
+			       PD_T_NEWSRC);
+		break;
+	case PR_SWAP_SNK_SRC_SOURCE_ON_VBUS_RAMPED_UP:
+		/*
+		 * USB PD standard, 6.2.1.4:
+		 * "Subsequent Messages initiated by the Policy Engine,
+		 * such as the PS_RDY Message sent to indicate that Vbus
+		 * is ready, will have the Port Power Role field set to
+		 * Source."
+		 */
+		tcpm_set_pwr_role(port, TYPEC_SOURCE);
+		tcpm_pd_send_control(port, PD_CTRL_PS_RDY);
+		tcpm_set_state(port, SRC_STARTUP, PD_T_SWAP_SRC_START);
+		break;
+#endif
+	case GET_STATUS_SEND:
+		tcpm_pd_send_control(port, PD_CTRL_GET_STATUS);
+		tcpm_set_state(port, GET_STATUS_SEND_TIMEOUT,
+			       PD_T_SENDER_RESPONSE);
+		break;
+	case GET_STATUS_SEND_TIMEOUT:
+		tcpm_set_state(port, ready_state(port), 0);
+		break;
+	case GET_PPS_STATUS_SEND:
+		tcpm_pd_send_control(port, PD_CTRL_GET_PPS_STATUS);
+		tcpm_set_state(port, GET_PPS_STATUS_SEND_TIMEOUT,
+			       PD_T_SENDER_RESPONSE);
+		break;
+	case GET_PPS_STATUS_SEND_TIMEOUT:
+		tcpm_set_state(port, ready_state(port), 0);
+		break;
+	case GET_SINK_CAP:
+		tcpm_pd_send_control(port, PD_CTRL_GET_SINK_CAP);
+		tcpm_set_state(port, GET_SINK_CAP_TIMEOUT, PD_T_SENDER_RESPONSE);
+		break;
+	case GET_SINK_CAP_TIMEOUT:
+		tcpm_set_state(port, ready_state(port), 0);
+		break;
+	case ERROR_RECOVERY:
+		tcpm_set_state(port, PORT_RESET, 0);
+		break;
+	case PORT_RESET:
+		tcpm_reset_port(port);
+		tcpm_set_cc(port, TYPEC_CC_OPEN);
+		tcpm_set_state(port, PORT_RESET_WAIT_OFF,
+			       PD_T_ERROR_RECOVERY);
+		break;
+	case PORT_RESET_WAIT_OFF:
+		tcpm_set_state(port,
+			       tcpm_default_state(port),
+			       port->vbus_present ? PD_T_PS_SOURCE_OFF : 0);
+		break;
+	default:
+		printf("Unexpected port state %d\n", port->state);
+		break;
+	}
+}
+
+static void tcpm_state_machine(struct tcpm_port *port)
+{
+	enum tcpm_state prev_state;
+
+	mutex_lock(&port->lock);
+	port->state_machine_running = true;
+
+	if (port->queued_message && tcpm_send_queued_message(port))
+		goto done;
+
+	/* If we were queued due to a delayed state change, update it now */
+	if (port->delayed_state) {
+		debug("state change %s -> %s [delayed %ld ms]\n",
+			 tcpm_states[port->state],
+			 tcpm_states[port->delayed_state], port->delay_ms);
+		port->prev_state = port->state;
+		port->state = port->delayed_state;
+		port->delayed_state = INVALID_STATE;
+	}
+
+	/*
+	 * Continue running as long as we have (non-delayed) state changes
+	 * to make.
+	 */
+	do {
+		prev_state = port->state;
+		run_state_machine(port);
+		if (port->queued_message)
+			tcpm_send_queued_message(port);
+	} while (port->state != prev_state && !port->delayed_state);
+
+done:
+	port->state_machine_running = false;
+	mutex_unlock(&port->lock);
+}
+
+static void _tcpm_cc_change(struct tcpm_port *port, enum typec_cc_status cc1,
+			    enum typec_cc_status cc2)
+{
+	enum typec_cc_status old_cc1, old_cc2;
+	enum tcpm_state new_state;
+
+	old_cc1 = port->cc1;
+	old_cc2 = port->cc2;
+	port->cc1 = cc1;
+	port->cc2 = cc2;
+
+	debug("CC1: %u -> %u, CC2: %u -> %u [state %s, polarity %d, %s]\n",
+	      old_cc1, cc1, old_cc2, cc2, tcpm_states[port->state],
+	      port->polarity,
+	      tcpm_port_is_disconnected(port) ? "disconnected" : "connected");
+
+	switch (port->state) {
+	case TOGGLING:
+		if (tcpm_port_is_debug(port) || tcpm_port_is_audio(port) ||
+		    tcpm_port_is_source(port))
+			tcpm_set_state(port, SRC_ATTACH_WAIT, 0);
+		else if (tcpm_port_is_sink(port))
+			tcpm_set_state(port, SNK_ATTACH_WAIT, 0);
+		break;
+	case SRC_UNATTACHED:
+	case ACC_UNATTACHED:
+		if (tcpm_port_is_debug(port) || tcpm_port_is_audio(port) ||
+		    tcpm_port_is_source(port))
+			tcpm_set_state(port, SRC_ATTACH_WAIT, 0);
+		break;
+	case SRC_ATTACH_WAIT:
+		if (tcpm_port_is_disconnected(port) ||
+		    tcpm_port_is_audio_detached(port))
+			tcpm_set_state(port, SRC_UNATTACHED, 0);
+		else if (cc1 != old_cc1 || cc2 != old_cc2)
+			tcpm_set_state(port, SRC_ATTACH_WAIT, 0);
+		break;
+	case SRC_ATTACHED:
+	case SRC_SEND_CAPABILITIES:
+	case SRC_READY:
+		if (tcpm_port_is_disconnected(port) ||
+		    !tcpm_port_is_source(port))
+			tcpm_set_state(port, SRC_UNATTACHED, 0);
+		break;
+	case SNK_UNATTACHED:
+		if (tcpm_port_is_sink(port))
+			tcpm_set_state(port, SNK_ATTACH_WAIT, 0);
+		break;
+	case SNK_ATTACH_WAIT:
+		if ((port->cc1 == TYPEC_CC_OPEN &&
+		     port->cc2 != TYPEC_CC_OPEN) ||
+		    (port->cc1 != TYPEC_CC_OPEN &&
+		     port->cc2 == TYPEC_CC_OPEN))
+			new_state = SNK_DEBOUNCED;
+		else if (tcpm_port_is_disconnected(port))
+			new_state = SNK_UNATTACHED;
+		else
+			break;
+		if (new_state != port->delayed_state)
+			tcpm_set_state(port, SNK_ATTACH_WAIT, 0);
+		break;
+	case SNK_DEBOUNCED:
+		if (tcpm_port_is_disconnected(port))
+			new_state = SNK_UNATTACHED;
+		else if (port->vbus_present)
+			new_state = tcpm_try_src(port) ? SRC_TRY : SNK_ATTACHED;
+		else
+			new_state = SNK_UNATTACHED;
+		if (new_state != port->delayed_state)
+			tcpm_set_state(port, SNK_DEBOUNCED, 0);
+		break;
+	case SNK_READY:
+		if (tcpm_port_is_disconnected(port))
+			tcpm_set_state(port, unattached_state(port), 0);
+		else if (!port->pd_capable &&
+			 (cc1 != old_cc1 || cc2 != old_cc2))
+			tcpm_set_current_limit(port,
+					       tcpm_get_current_limit(port),
+					       5000);
+		break;
+
+	case AUDIO_ACC_ATTACHED:
+		if (cc1 == TYPEC_CC_OPEN || cc2 == TYPEC_CC_OPEN)
+			tcpm_set_state(port, AUDIO_ACC_DEBOUNCE, 0);
+		break;
+	case AUDIO_ACC_DEBOUNCE:
+		if (tcpm_port_is_audio(port))
+			tcpm_set_state(port, AUDIO_ACC_ATTACHED, 0);
+		break;
+
+	case DEBUG_ACC_ATTACHED:
+		if (cc1 == TYPEC_CC_OPEN || cc2 == TYPEC_CC_OPEN)
+			tcpm_set_state(port, ACC_UNATTACHED, 0);
+		break;
+
+	case SNK_TRY:
+		/* Do nothing, waiting for timeout */
+		break;
+
+	case SNK_DISCOVERY:
+		/* CC line is unstable, wait for debounce */
+		if (tcpm_port_is_disconnected(port))
+			tcpm_set_state(port, SNK_DISCOVERY_DEBOUNCE, 0);
+		break;
+	case SNK_DISCOVERY_DEBOUNCE:
+		break;
+
+	case SRC_TRYWAIT:
+		/* Hand over to state machine if needed */
+		if (!port->vbus_present && tcpm_port_is_source(port))
+			tcpm_set_state(port, SRC_TRYWAIT_DEBOUNCE, 0);
+		break;
+	case SRC_TRYWAIT_DEBOUNCE:
+		if (port->vbus_present || !tcpm_port_is_source(port))
+			tcpm_set_state(port, SRC_TRYWAIT, 0);
+		break;
+	case SNK_TRY_WAIT_DEBOUNCE:
+		if (!tcpm_port_is_sink(port)) {
+			port->max_wait = 0;
+			tcpm_set_state(port, SRC_TRYWAIT, 0);
+		}
+		break;
+	case SRC_TRY_WAIT:
+		if (tcpm_port_is_source(port))
+			tcpm_set_state(port, SRC_TRY_DEBOUNCE, 0);
+		break;
+	case SRC_TRY_DEBOUNCE:
+		tcpm_set_state(port, SRC_TRY_WAIT, 0);
+		break;
+	case SNK_TRYWAIT_DEBOUNCE:
+		if (tcpm_port_is_sink(port))
+			tcpm_set_state(port, SNK_TRYWAIT_VBUS, 0);
+		break;
+	case SNK_TRYWAIT_VBUS:
+		if (!tcpm_port_is_sink(port))
+			tcpm_set_state(port, SNK_TRYWAIT_DEBOUNCE, 0);
+		break;
+	case SNK_TRYWAIT:
+		/* Do nothing, waiting for tCCDebounce */
+		break;
+	case PR_SWAP_SNK_SRC_SINK_OFF:
+	case PR_SWAP_SRC_SNK_TRANSITION_OFF:
+	case PR_SWAP_SRC_SNK_SOURCE_OFF:
+	case PR_SWAP_SRC_SNK_SOURCE_OFF_CC_DEBOUNCED:
+	case PR_SWAP_SNK_SRC_SOURCE_ON:
+		/*
+		 * CC state change is expected in PR_SWAP
+		 * Ignore it.
+		 */
+		break;
+
+	case PORT_RESET:
+	case PORT_RESET_WAIT_OFF:
+		/*
+		 * State set back to default mode once the timer completes.
+		 * Ignore CC changes here.
+		 */
+		break;
+	default:
+		/*
+		 * While acting as sink and auto vbus discharge is enabled, Allow disconnect
+		 * to be driven by vbus disconnect.
+		 */
+		if (tcpm_port_is_disconnected(port))
+			tcpm_set_state(port, unattached_state(port), 0);
+		break;
+	}
+}
+
+static void _tcpm_pd_vbus_on(struct tcpm_port *port)
+{
+	debug("%s: VBUS on\n", __func__);
+	port->vbus_present = true;
+	/*
+	 * When vbus_present is true i.e. Voltage at VBUS is greater than VSAFE5V implicitly
+	 * states that vbus is not at VSAFE0V, hence clear the vbus_vsafe0v flag here.
+	 */
+	port->vbus_vsafe0v = false;
+
+	switch (port->state) {
+	case SNK_TRANSITION_SINK_VBUS:
+		port->explicit_contract = true;
+		tcpm_set_state(port, SNK_READY, 0);
+		break;
+	case SNK_DISCOVERY:
+		tcpm_set_state(port, SNK_DISCOVERY, 0);
+		break;
+	case SNK_DEBOUNCED:
+		tcpm_set_state(port, SNK_ATTACHED, 0);
+		break;
+	case SNK_HARD_RESET_WAIT_VBUS:
+		tcpm_set_state(port, SNK_HARD_RESET_SINK_ON, 0);
+		break;
+	case SRC_ATTACHED:
+		tcpm_set_state(port, SRC_STARTUP, 0);
+		break;
+	case SRC_HARD_RESET_VBUS_ON:
+		tcpm_set_state(port, SRC_STARTUP, 0);
+		break;
+
+	case SNK_TRY:
+		/* Do nothing, waiting for timeout */
+		break;
+	case SRC_TRYWAIT:
+		/* Do nothing, Waiting for Rd to be detected */
+		break;
+	case SRC_TRYWAIT_DEBOUNCE:
+		tcpm_set_state(port, SRC_TRYWAIT, 0);
+		break;
+	case SNK_TRY_WAIT_DEBOUNCE:
+		/* Do nothing, waiting for PD_DEBOUNCE to do be done */
+		break;
+	case SNK_TRYWAIT:
+		/* Do nothing, waiting for tCCDebounce */
+		break;
+	case SNK_TRYWAIT_VBUS:
+		if (tcpm_port_is_sink(port))
+			tcpm_set_state(port, SNK_ATTACHED, 0);
+		break;
+	case SNK_TRYWAIT_DEBOUNCE:
+		/* Do nothing, waiting for Rp */
+		break;
+	case SRC_TRY_WAIT:
+	case SRC_TRY_DEBOUNCE:
+		/* Do nothing, waiting for sink detection */
+		break;
+
+	case PORT_RESET:
+	case PORT_RESET_WAIT_OFF:
+		/*
+		 * State set back to default mode once the timer completes.
+		 * Ignore vbus changes here.
+		 */
+		break;
+
+	default:
+		break;
+	}
+}
+
+static void _tcpm_pd_vbus_off(struct tcpm_port *port)
+{
+	debug("%s: VBUS off\n", __func__);
+	port->vbus_present = false;
+	port->vbus_never_low = false;
+	switch (port->state) {
+	case SNK_HARD_RESET_SINK_OFF:
+		tcpm_set_state(port, SNK_HARD_RESET_WAIT_VBUS, 0);
+		break;
+	case HARD_RESET_SEND:
+		break;
+	case SNK_TRY:
+		/* Do nothing, waiting for timeout */
+		break;
+	case SRC_TRYWAIT:
+		/* Hand over to state machine if needed */
+		if (tcpm_port_is_source(port))
+			tcpm_set_state(port, SRC_TRYWAIT_DEBOUNCE, 0);
+		break;
+	case SNK_TRY_WAIT_DEBOUNCE:
+		/* Do nothing, waiting for PD_DEBOUNCE to do be done */
+		break;
+	case SNK_TRYWAIT:
+	case SNK_TRYWAIT_VBUS:
+	case SNK_TRYWAIT_DEBOUNCE:
+		break;
+	case SNK_ATTACH_WAIT:
+		port->debouncing = false;
+		tcpm_set_state(port, SNK_UNATTACHED, 0);
+		break;
+
+	case SNK_NEGOTIATE_CAPABILITIES:
+		break;
+
+	case PR_SWAP_SRC_SNK_TRANSITION_OFF:
+		tcpm_set_state(port, PR_SWAP_SRC_SNK_SOURCE_OFF, 0);
+		break;
+
+	case PR_SWAP_SNK_SRC_SINK_OFF:
+		/* Do nothing, expected */
+		break;
+
+	case PR_SWAP_SNK_SRC_SOURCE_ON:
+		/*
+		 * Do nothing when vbus off notification is received.
+		 * TCPM can wait for PD_T_NEWSRC in PR_SWAP_SNK_SRC_SOURCE_ON
+		 * for the vbus source to ramp up.
+		 */
+		break;
+
+	case PORT_RESET_WAIT_OFF:
+		tcpm_set_state(port, tcpm_default_state(port), 0);
+		break;
+
+	case SRC_TRY_WAIT:
+	case SRC_TRY_DEBOUNCE:
+		/* Do nothing, waiting for sink detection */
+		break;
+
+	case PORT_RESET:
+		/*
+		 * State set back to default mode once the timer completes.
+		 * Ignore vbus changes here.
+		 */
+		break;
+
+	default:
+		if (port->pwr_role == TYPEC_SINK && port->attached)
+			tcpm_set_state(port, SNK_UNATTACHED, 0);
+		break;
+	}
+}
+
+static void _tcpm_pd_hard_reset(struct tcpm_port *port)
+{
+	debug("Received hard reset\n");
+	port->poll_event_cnt = 0;
+
+	/* If a hard reset message is received during the port reset process,
+	 * we should ignore it, that is, do not set port->state to HARD_RESET_START.
+	 */
+	if (port->state == PORT_RESET || port->state == PORT_RESET_WAIT_OFF)
+		return ;
+
+	/*
+	 * If we keep receiving hard reset requests, executing the hard reset
+	 * must have failed. Revert to error recovery if that happens.
+	 */
+	tcpm_set_state(port,
+		       port->hard_reset_count < PD_N_HARD_RESET_COUNT ?
+				HARD_RESET_START : ERROR_RECOVERY,
+		       0);
+}
+
+#if 0
+static void tcpm_pd_event_handler(struct tcpm_port *port)
+{
+	u32 events;
+
+	while (port->pd_events) {
+		events = port->pd_events;
+		port->pd_events = 0;
+		if (events & TCPM_RESET_EVENT)
+			_tcpm_pd_hard_reset(port);
+		if (events & TCPM_VBUS_EVENT) {
+			bool vbus;
+
+			vbus = port->tcpc->get_vbus(port->tcpc);
+			if (vbus) {
+				_tcpm_pd_vbus_on(port);
+			} else {
+				_tcpm_pd_vbus_off(port);
+				/*
+				 * When TCPC does not support detecting vsafe0v voltage level,
+				 * treat vbus absent as vsafe0v. Else invoke is_vbus_vsafe0v
+				 * to see if vbus has discharge to VSAFE0V.
+				 */
+				if (!port->tcpc->is_vbus_vsafe0v ||
+				    port->tcpc->is_vbus_vsafe0v(port->tcpc))
+					_tcpm_pd_vbus_vsafe0v(port);
+			}
+		}
+		if (events & TCPM_CC_EVENT) {
+			enum typec_cc_status cc1, cc2;
+
+			if (port->tcpc->get_cc(port->tcpc, &cc1, &cc2) == 0)
+				_tcpm_cc_change(port, cc1, cc2);
+		}
+		if (events & TCPM_FRS_EVENT) {
+			if (port->state == SNK_READY) {
+				int ret;
+
+				port->upcoming_state = FR_SWAP_SEND;
+				ret = tcpm_ams_start(port, FAST_ROLE_SWAP);
+				if (ret == -EAGAIN)
+					port->upcoming_state = INVALID_STATE;
+			} else {
+				tcpm_log(port, "Discarding FRS_SIGNAL! Not in sink ready");
+			}
+		}
+		if (events & TCPM_SOURCING_VBUS) {
+			tcpm_log(port, "sourcing vbus");
+			/*
+			 * In fast role swap case TCPC autonomously sources vbus. Set vbus_source
+			 * true as TCPM wouldn't have called tcpm_set_vbus.
+			 *
+			 * When vbus is sourced on the command on TCPM i.e. TCPM called
+			 * tcpm_set_vbus to source vbus, vbus_source would already be true.
+			 */
+			port->vbus_source = true;
+			_tcpm_pd_vbus_on(port);
+		}
+	}
+}
+#endif
+
+void tcpm_cc_change(struct tcpm_port *port)
+{
+	enum typec_cc_status cc1, cc2;
+
+	port->poll_event_cnt = 0;
+	if (port->tcpc->get_cc(port->tcpc, &cc1, &cc2) == 0)
+		_tcpm_cc_change(port, cc1, cc2);
+}
+EXPORT_SYMBOL_GPL(tcpm_cc_change);
+
+void tcpm_vbus_change(struct tcpm_port *port)
+{
+	bool vbus;
+
+	port->poll_event_cnt = 0;
+	vbus = port->tcpc->get_vbus(port->tcpc);
+	if (vbus)
+		_tcpm_pd_vbus_on(port);
+	else
+		_tcpm_pd_vbus_off(port);
+}
+EXPORT_SYMBOL_GPL(tcpm_vbus_change);
+
+void tcpm_pd_hard_reset(struct tcpm_port *port)
+{
+	port->poll_event_cnt = 0;
+	_tcpm_pd_hard_reset(port);
+}
+EXPORT_SYMBOL_GPL(tcpm_pd_hard_reset);
+
+static void tcpm_init(struct tcpm_port *port)
+{
+	enum typec_cc_status cc1, cc2;
+
+	port->tcpc->init(port->tcpc);
+
+	tcpm_reset_port(port);
+
+	/*
+	 * XXX
+	 * Should possibly wait for VBUS to settle if it was enabled locally
+	 * since tcpm_reset_port() will disable VBUS.
+	 */
+	port->vbus_present = port->tcpc->get_vbus(port->tcpc);
+	if (port->vbus_present)
+		port->vbus_never_low = true;
+
+	/*
+	 * 1. When vbus_present is true, voltage on VBUS is already at VSAFE5V.
+	 * So implicitly vbus_vsafe0v = false.
+	 *
+	 * 2. When vbus_present is false and TCPC does NOT support querying
+	 * vsafe0v status, then, it's best to assume vbus is at VSAFE0V i.e.
+	 * vbus_vsafe0v is true.
+	 *
+	 * 3. When vbus_present is false and TCPC does support querying vsafe0v,
+	 * then, query tcpc for vsafe0v status.
+	 */
+	if (port->vbus_present)
+		port->vbus_vsafe0v = false;
+	else if (!port->tcpc->is_vbus_vsafe0v)
+		port->vbus_vsafe0v = true;
+	else
+		port->vbus_vsafe0v = port->tcpc->is_vbus_vsafe0v(port->tcpc);
+
+	tcpm_set_state(port, tcpm_default_state(port), 0);
+
+	if (port->tcpc->get_cc(port->tcpc, &cc1, &cc2) == 0)
+		_tcpm_cc_change(port, cc1, cc2);
+}
+
+void tcpm_tcpc_reset(struct tcpm_port *port)
+{
+	mutex_lock(&port->lock);
+	/* XXX: Maintain PD connection if possible? */
+	tcpm_init(port);
+	mutex_unlock(&port->lock);
+}
+EXPORT_SYMBOL_GPL(tcpm_tcpc_reset);
+
+static int tcpm_fw_get_caps(struct tcpm_port *port)
+{
+	const char *cap_str;
+	ofnode node = port->tcpc->connector_node;
+	int ret;
+	u32 mw, frs_current;
+
+#if 0
+	/* USB data support is optional */
+	cap_str = ofnode_read_string(node, "data-role");
+	if (cap_str) {
+		ret = typec_find_port_data_role(cap_str);
+		if (ret < 0)
+			return ret;
+		port->typec_caps.data = ret;
+	}
+#endif
+
+	cap_str = ofnode_read_string(node, "power-role");
+	if (!cap_str) {
+		return -EINVAL;
+	} else {
+		if (!strcmp("dual", cap_str))
+			port->typec_caps.type = TYPEC_PORT_DRP;
+		else if (!strcmp("source", cap_str))
+			port->typec_caps.type = TYPEC_PORT_SRC;
+		else if (!strcmp("sink", cap_str))
+			port->typec_caps.type = TYPEC_PORT_SNK;
+		else
+			return EINVAL;
+	}
+
+	port->port_type = port->typec_caps.type;
+
+	port->slow_charger_loop = ofnode_read_bool(node, "slow-charger-loop");
+	if (port->port_type == TYPEC_PORT_SNK)
+		goto sink;
+
+	/* Get source pdos */
+	ret = ofnode_read_size(node, "source-pdos") / sizeof(u32);
+	if (ret <= 0)
+		return -EINVAL;
+
+	port->nr_src_pdo = min(ret, PDO_MAX_OBJECTS);
+	ret = ofnode_read_u32_array(node, "source-pdos",
+				    port->src_pdo, port->nr_src_pdo);
+	if (ret || tcpm_validate_caps(port, port->src_pdo,
+					    port->nr_src_pdo))
+		return -EINVAL;
+
+	if (port->port_type == TYPEC_PORT_SRC)
+		return 0;
+
+	/* Get the preferred power role for DRP */
+	cap_str = ofnode_read_string(node, "try-power-role");
+	if (!cap_str) {
+		return -EINVAL;
+	} else {
+		if (!strcmp("sink", cap_str))
+			port->typec_caps.prefer_role = TYPEC_SINK;
+		else if (!strcmp("source", cap_str))
+			port->typec_caps.prefer_role = TYPEC_SOURCE;
+		else
+			return -EINVAL;
+	}
+	if (port->typec_caps.prefer_role < 0)
+		return -EINVAL;
+sink:
+	/* Get sink pdos */
+	ret = ofnode_read_size(node, "sink-pdos") / sizeof(u32);
+	if (ret <= 0)
+		return -EINVAL;
+
+	port->nr_snk_pdo = min(ret, PDO_MAX_OBJECTS);
+	ret = ofnode_read_u32_array(node, "sink-pdos",
+				    port->snk_pdo, port->nr_snk_pdo);
+	if (ret || tcpm_validate_caps(port, port->snk_pdo,
+					    port->nr_snk_pdo))
+		return -EINVAL;
+
+	if (ofnode_read_u32_array(node, "op-sink-microwatt", &mw, 1))
+		return -EINVAL;
+	port->operating_snk_mw = mw / 1000;
+
+	port->self_powered = ofnode_read_bool(node, "self-powered");
+
+	/* FRS can only be supported by DRP ports */
+	if (port->port_type == TYPEC_PORT_DRP) {
+		ret = ofnode_read_u32_array(node, "new-source-frs-typec-current",
+					    &frs_current, 1);
+		if (ret >= 0 && frs_current <= FRS_5V_3A)
+			port->new_source_frs_current = frs_current;
+	}
+
+	/* sink-vdos is optional */
+	ret = ofnode_read_size(node, "sink-vdos") / sizeof(u32);
+	if (ret < 0)
+		ret = 0;
+
+	port->nr_snk_vdo = min(ret, VDO_MAX_OBJECTS);
+	if (port->nr_snk_vdo) {
+		ret = ofnode_read_u32_array(node, "sink-vdos",
+					    port->snk_vdo, port->nr_snk_vdo);
+		if (ret)
+			return ret;
+	}
+
+	/* If sink-vdos is found, sink-vdos-v1 is expected for backward compatibility. */
+	if (port->nr_snk_vdo) {
+		ret = ofnode_read_size(node, "sink-vdos-v1") / sizeof(u32);
+		if (ret < 0)
+			return ret;
+		else if (ret == 0)
+			return -ENODATA;
+
+		port->nr_snk_vdo_v1 = min(ret, VDO_MAX_OBJECTS);
+		ret = ofnode_read_u32_array(node, "sink-vdos-v1",
+					    port->snk_vdo_v1,
+					    port->nr_snk_vdo_v1);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+struct tcpm_port *tcpm_port_init(struct udevice *dev, struct tcpc_dev *tcpc)
+{
+	struct tcpm_port *port;
+	int err;
+
+	if (!dev || !tcpc ||
+	    !tcpc->get_vbus || !tcpc->set_cc || !tcpc->get_cc ||
+	    !tcpc->set_polarity || !tcpc->set_vconn || !tcpc->set_vbus ||
+	    !tcpc->set_pd_rx || !tcpc->set_roles || !tcpc->pd_transmit)
+		return ERR_PTR(-EINVAL);
+
+	port = devm_kzalloc(dev, sizeof(*port), GFP_KERNEL);
+	if (!port)
+		return ERR_PTR(-ENOMEM);
+
+	port->dev = dev;
+	port->tcpc = tcpc;
+
+	err = tcpm_fw_get_caps(port);
+	if (err < 0) {
+		printf("%s: please check the dts config of %s node(%d)\n",
+			__func__, dev_read_name(dev), err);
+		return ERR_PTR(err);
+	}
+
+	port->try_role = port->typec_caps.prefer_role;
+
+	port->typec_caps.revision = 0x0120;	/* Type-C spec release 1.2 */
+	port->typec_caps.pd_revision = 0x0300;	/* USB-PD spec release 3.0 */
+	port->typec_caps.svdm_version = SVDM_VER_2_0;
+	port->typec_caps.driver_data = port;
+	port->typec_caps.orientation_aware = 1;
+
+	port->port_type = port->typec_caps.type;
+
+	tcpm_init(port);
+
+	printf("%s: init finished\n", dev_read_name(dev));
+
+	return port;
+}
+EXPORT_SYMBOL_GPL(tcpm_port_init);
+
+void tcpm_poll_event(struct tcpm_port *port)
+{
+	if (!port->tcpc->get_vbus(port->tcpc))
+		return ;
+
+	while (port->poll_event_cnt < TCPM_POLL_EVENT_TIME_OUT) {
+		if (!port->wait_dr_swap_Message &&
+		    ((port->state == SNK_READY) ||
+		    (port->state == SRC_READY) ||
+		    (port->state == DEBUG_ACC_ATTACHED) ||
+		    (port->state == AUDIO_ACC_ATTACHED)))
+		    break;
+
+		port->tcpc->poll_event(port->tcpc);
+		port->poll_event_cnt++;
+		udelay(500);
+	}
+
+	/*
+	 * At this time, call the callback function of the respective pd chip
+	 * to enter the low-power mode. In order to reduce the time spent on
+	 * the PD chip driver as much as possible, the tcpm framework does not
+	 * fully process the communication initiated by the device,so it should
+	 * be noted that we can disable the internal oscillator, etc., but do
+	 * not turn off the power of the transceiver module, otherwise the
+	 * self-powered Type-C device will initiate a Message(eg: self-powered
+	 * Type-C hub initiates a SINK capability request(PD_CTRL_GET_SINK_CAP))
+	 * and the pd chip cannot reply to GoodCRC, causing the self-powered Type-C
+	 * device to switch vbus to vSafe5v, or even turn off vbus.
+	 */
+	if (port->tcpc->enter_low_power_mode) {
+		if (port->tcpc->enter_low_power_mode(port->tcpc,
+						     port->attached,
+						     port->pd_capable))
+			printf("failed to enter low power\n");
+		else
+			printf("PD chip enter low power mode\n");
+	}
+}
+EXPORT_SYMBOL_GPL(tcpm_poll_event);
+
+int tcpm_get_voltage(struct tcpm_port *port)
+{
+	return port->supply_voltage * 1000;
+}
+EXPORT_SYMBOL_GPL(tcpm_get_voltage);
+
+int tcpm_get_current(struct tcpm_port *port)
+{
+	return port->current_limit * 1000;
+}
+EXPORT_SYMBOL_GPL(tcpm_get_voltage);
+
+int tcpm_get_online(struct tcpm_port *port)
+{
+	if (port->state == SNK_READY)
+		return 1;
+	else
+		return 0;
+}
+EXPORT_SYMBOL_GPL(tcpm_get_online);
+
+void tcpm_uninit_port(struct tcpm_port *port)
+{
+	tcpm_reset_port(port);
+}
+EXPORT_SYMBOL_GPL(tcpm_unregister_port);
diff --git a/include/power/power_delivery/pd.h b/include/power/power_delivery/pd.h
new file mode 100644
index 0000000000..3c9886b0b9
--- /dev/null
+++ b/include/power/power_delivery/pd.h
@@ -0,0 +1,498 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Copyright 2015-2017 Google, Inc
+ */
+
+#ifndef __LINUX_USB_PD_H
+#define __LINUX_USB_PD_H
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include "typec.h"
+
+/* USB PD Messages */
+enum pd_ctrl_msg_type {
+	/* 0 Reserved */
+	PD_CTRL_GOOD_CRC = 1,
+	PD_CTRL_GOTO_MIN = 2,
+	PD_CTRL_ACCEPT = 3,
+	PD_CTRL_REJECT = 4,
+	PD_CTRL_PING = 5,
+	PD_CTRL_PS_RDY = 6,
+	PD_CTRL_GET_SOURCE_CAP = 7,
+	PD_CTRL_GET_SINK_CAP = 8,
+	PD_CTRL_DR_SWAP = 9,
+	PD_CTRL_PR_SWAP = 10,
+	PD_CTRL_VCONN_SWAP = 11,
+	PD_CTRL_WAIT = 12,
+	PD_CTRL_SOFT_RESET = 13,
+	/* 14-15 Reserved */
+	PD_CTRL_NOT_SUPP = 16,
+	PD_CTRL_GET_SOURCE_CAP_EXT = 17,
+	PD_CTRL_GET_STATUS = 18,
+	PD_CTRL_FR_SWAP = 19,
+	PD_CTRL_GET_PPS_STATUS = 20,
+	PD_CTRL_GET_COUNTRY_CODES = 21,
+	/* 22-31 Reserved */
+};
+
+enum pd_data_msg_type {
+	/* 0 Reserved */
+	PD_DATA_SOURCE_CAP = 1,
+	PD_DATA_REQUEST = 2,
+	PD_DATA_BIST = 3,
+	PD_DATA_SINK_CAP = 4,
+	PD_DATA_BATT_STATUS = 5,
+	PD_DATA_ALERT = 6,
+	PD_DATA_GET_COUNTRY_INFO = 7,
+	PD_DATA_ENTER_USB = 8,
+	/* 9-14 Reserved */
+	PD_DATA_VENDOR_DEF = 15,
+	/* 16-31 Reserved */
+};
+
+enum pd_ext_msg_type {
+	/* 0 Reserved */
+	PD_EXT_SOURCE_CAP_EXT = 1,
+	PD_EXT_STATUS = 2,
+	PD_EXT_GET_BATT_CAP = 3,
+	PD_EXT_GET_BATT_STATUS = 4,
+	PD_EXT_BATT_CAP = 5,
+	PD_EXT_GET_MANUFACTURER_INFO = 6,
+	PD_EXT_MANUFACTURER_INFO = 7,
+	PD_EXT_SECURITY_REQUEST = 8,
+	PD_EXT_SECURITY_RESPONSE = 9,
+	PD_EXT_FW_UPDATE_REQUEST = 10,
+	PD_EXT_FW_UPDATE_RESPONSE = 11,
+	PD_EXT_PPS_STATUS = 12,
+	PD_EXT_COUNTRY_INFO = 13,
+	PD_EXT_COUNTRY_CODES = 14,
+	/* 15-31 Reserved */
+};
+
+#define PD_REV10	0x0
+#define PD_REV20	0x1
+#define PD_REV30	0x2
+#define PD_MAX_REV	PD_REV30
+
+#define PD_HEADER_EXT_HDR	BIT(15)
+#define PD_HEADER_CNT_SHIFT	12
+#define PD_HEADER_CNT_MASK	0x7
+#define PD_HEADER_ID_SHIFT	9
+#define PD_HEADER_ID_MASK	0x7
+#define PD_HEADER_PWR_ROLE	BIT(8)
+#define PD_HEADER_REV_SHIFT	6
+#define PD_HEADER_REV_MASK	0x3
+#define PD_HEADER_DATA_ROLE	BIT(5)
+#define PD_HEADER_TYPE_SHIFT	0
+#define PD_HEADER_TYPE_MASK	0x1f
+
+#define PD_HEADER(type, pwr, data, rev, id, cnt, ext_hdr)		\
+	((((type) & PD_HEADER_TYPE_MASK) << PD_HEADER_TYPE_SHIFT) |	\
+	 ((pwr) == TYPEC_SOURCE ? PD_HEADER_PWR_ROLE : 0) |		\
+	 ((data) == TYPEC_HOST ? PD_HEADER_DATA_ROLE : 0) |		\
+	 (rev << PD_HEADER_REV_SHIFT) |					\
+	 (((id) & PD_HEADER_ID_MASK) << PD_HEADER_ID_SHIFT) |		\
+	 (((cnt) & PD_HEADER_CNT_MASK) << PD_HEADER_CNT_SHIFT) |	\
+	 ((ext_hdr) ? PD_HEADER_EXT_HDR : 0))
+
+#define PD_HEADER_LE(type, pwr, data, rev, id, cnt) \
+	cpu_to_le16(PD_HEADER((type), (pwr), (data), (rev), (id), (cnt), (0)))
+
+static inline unsigned int pd_header_cnt(u16 header)
+{
+	return (header >> PD_HEADER_CNT_SHIFT) & PD_HEADER_CNT_MASK;
+}
+
+static inline unsigned int pd_header_cnt_le(__le16 header)
+{
+	return pd_header_cnt(le16_to_cpu(header));
+}
+
+static inline unsigned int pd_header_type(u16 header)
+{
+	return (header >> PD_HEADER_TYPE_SHIFT) & PD_HEADER_TYPE_MASK;
+}
+
+static inline unsigned int pd_header_type_le(__le16 header)
+{
+	return pd_header_type(le16_to_cpu(header));
+}
+
+static inline unsigned int pd_header_msgid(u16 header)
+{
+	return (header >> PD_HEADER_ID_SHIFT) & PD_HEADER_ID_MASK;
+}
+
+static inline unsigned int pd_header_msgid_le(__le16 header)
+{
+	return pd_header_msgid(le16_to_cpu(header));
+}
+
+static inline unsigned int pd_header_rev(u16 header)
+{
+	return (header >> PD_HEADER_REV_SHIFT) & PD_HEADER_REV_MASK;
+}
+
+static inline unsigned int pd_header_rev_le(__le16 header)
+{
+	return pd_header_rev(le16_to_cpu(header));
+}
+
+#define PD_EXT_HDR_CHUNKED		BIT(15)
+#define PD_EXT_HDR_CHUNK_NUM_SHIFT	11
+#define PD_EXT_HDR_CHUNK_NUM_MASK	0xf
+#define PD_EXT_HDR_REQ_CHUNK		BIT(10)
+#define PD_EXT_HDR_DATA_SIZE_SHIFT	0
+#define PD_EXT_HDR_DATA_SIZE_MASK	0x1ff
+
+#define PD_EXT_HDR(data_size, req_chunk, chunk_num, chunked)				\
+	((((data_size) & PD_EXT_HDR_DATA_SIZE_MASK) << PD_EXT_HDR_DATA_SIZE_SHIFT) |	\
+	 ((req_chunk) ? PD_EXT_HDR_REQ_CHUNK : 0) |					\
+	 (((chunk_num) & PD_EXT_HDR_CHUNK_NUM_MASK) << PD_EXT_HDR_CHUNK_NUM_SHIFT) |	\
+	 ((chunked) ? PD_EXT_HDR_CHUNKED : 0))
+
+#define PD_EXT_HDR_LE(data_size, req_chunk, chunk_num, chunked) \
+	cpu_to_le16(PD_EXT_HDR((data_size), (req_chunk), (chunk_num), (chunked)))
+
+static inline unsigned int pd_ext_header_chunk_num(u16 ext_header)
+{
+	return (ext_header >> PD_EXT_HDR_CHUNK_NUM_SHIFT) &
+		PD_EXT_HDR_CHUNK_NUM_MASK;
+}
+
+static inline unsigned int pd_ext_header_data_size(u16 ext_header)
+{
+	return (ext_header >> PD_EXT_HDR_DATA_SIZE_SHIFT) &
+		PD_EXT_HDR_DATA_SIZE_MASK;
+}
+
+static inline unsigned int pd_ext_header_data_size_le(__le16 ext_header)
+{
+	return pd_ext_header_data_size(le16_to_cpu(ext_header));
+}
+
+#define PD_MAX_PAYLOAD		7
+#define PD_EXT_MAX_CHUNK_DATA	26
+
+/**
+  * struct pd_chunked_ext_message_data - PD chunked extended message data as
+  *					 seen on wire
+  * @header:    PD extended message header
+  * @data:      PD extended message data
+  */
+struct pd_chunked_ext_message_data {
+	__le16 header;
+	u8 data[PD_EXT_MAX_CHUNK_DATA];
+} __packed;
+
+/**
+  * struct pd_message - PD message as seen on wire
+  * @header:    PD message header
+  * @payload:   PD message payload
+  * @ext_msg:   PD message chunked extended message data
+  */
+struct pd_message {
+	__le16 header;
+	union {
+		__le32 payload[PD_MAX_PAYLOAD];
+		struct pd_chunked_ext_message_data ext_msg;
+	};
+} __packed;
+
+/* PDO: Power Data Object */
+#define PDO_MAX_OBJECTS		7
+
+enum pd_pdo_type {
+	PDO_TYPE_FIXED = 0,
+	PDO_TYPE_BATT = 1,
+	PDO_TYPE_VAR = 2,
+	PDO_TYPE_APDO = 3,
+};
+
+#define PDO_TYPE_SHIFT		30
+#define PDO_TYPE_MASK		0x3
+
+#define PDO_TYPE(t)	((t) << PDO_TYPE_SHIFT)
+
+#define PDO_VOLT_MASK		0x3ff
+#define PDO_CURR_MASK		0x3ff
+#define PDO_PWR_MASK		0x3ff
+
+#define PDO_FIXED_DUAL_ROLE		BIT(29)	/* Power role swap supported */
+#define PDO_FIXED_SUSPEND		BIT(28) /* USB Suspend supported (Source) */
+#define PDO_FIXED_HIGHER_CAP		BIT(28) /* Requires more than vSafe5V (Sink) */
+#define PDO_FIXED_EXTPOWER		BIT(27) /* Externally powered */
+#define PDO_FIXED_USB_COMM		BIT(26) /* USB communications capable */
+#define PDO_FIXED_DATA_SWAP		BIT(25) /* Data role swap supported */
+#define PDO_FIXED_UNCHUNK_EXT		BIT(24) /* Unchunked Extended Message supported (Source) */
+#define PDO_FIXED_FRS_CURR_MASK		(BIT(24) | BIT(23)) /* FR_Swap Current (Sink) */
+#define PDO_FIXED_FRS_CURR_SHIFT	23
+#define PDO_FIXED_VOLT_SHIFT		10	/* 50mV units */
+#define PDO_FIXED_CURR_SHIFT		0	/* 10mA units */
+
+#define PDO_FIXED_VOLT(mv)	((((mv) / 50) & PDO_VOLT_MASK) << PDO_FIXED_VOLT_SHIFT)
+#define PDO_FIXED_CURR(ma)	((((ma) / 10) & PDO_CURR_MASK) << PDO_FIXED_CURR_SHIFT)
+
+#define PDO_FIXED(mv, ma, flags)			\
+	(PDO_TYPE(PDO_TYPE_FIXED) | (flags) |		\
+	 PDO_FIXED_VOLT(mv) | PDO_FIXED_CURR(ma))
+
+#define VSAFE5V 5000 /* mv units */
+
+#define PDO_BATT_MAX_VOLT_SHIFT	20	/* 50mV units */
+#define PDO_BATT_MIN_VOLT_SHIFT	10	/* 50mV units */
+#define PDO_BATT_MAX_PWR_SHIFT	0	/* 250mW units */
+
+#define PDO_BATT_MIN_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_BATT_MIN_VOLT_SHIFT)
+#define PDO_BATT_MAX_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_BATT_MAX_VOLT_SHIFT)
+#define PDO_BATT_MAX_POWER(mw) ((((mw) / 250) & PDO_PWR_MASK) << PDO_BATT_MAX_PWR_SHIFT)
+
+#define PDO_BATT(min_mv, max_mv, max_mw)			\
+	(PDO_TYPE(PDO_TYPE_BATT) | PDO_BATT_MIN_VOLT(min_mv) |	\
+	 PDO_BATT_MAX_VOLT(max_mv) | PDO_BATT_MAX_POWER(max_mw))
+
+#define PDO_VAR_MAX_VOLT_SHIFT	20	/* 50mV units */
+#define PDO_VAR_MIN_VOLT_SHIFT	10	/* 50mV units */
+#define PDO_VAR_MAX_CURR_SHIFT	0	/* 10mA units */
+
+#define PDO_VAR_MIN_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_VAR_MIN_VOLT_SHIFT)
+#define PDO_VAR_MAX_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_VAR_MAX_VOLT_SHIFT)
+#define PDO_VAR_MAX_CURR(ma) ((((ma) / 10) & PDO_CURR_MASK) << PDO_VAR_MAX_CURR_SHIFT)
+
+#define PDO_VAR(min_mv, max_mv, max_ma)				\
+	(PDO_TYPE(PDO_TYPE_VAR) | PDO_VAR_MIN_VOLT(min_mv) |	\
+	 PDO_VAR_MAX_VOLT(max_mv) | PDO_VAR_MAX_CURR(max_ma))
+
+enum pd_apdo_type {
+	APDO_TYPE_PPS = 0,
+};
+
+#define PDO_APDO_TYPE_SHIFT	28	/* Only valid value currently is 0x0 - PPS */
+#define PDO_APDO_TYPE_MASK	0x3
+
+#define PDO_APDO_TYPE(t)	((t) << PDO_APDO_TYPE_SHIFT)
+
+#define PDO_PPS_APDO_MAX_VOLT_SHIFT	17	/* 100mV units */
+#define PDO_PPS_APDO_MIN_VOLT_SHIFT	8	/* 100mV units */
+#define PDO_PPS_APDO_MAX_CURR_SHIFT	0	/* 50mA units */
+
+#define PDO_PPS_APDO_VOLT_MASK	0xff
+#define PDO_PPS_APDO_CURR_MASK	0x7f
+
+#define PDO_PPS_APDO_MIN_VOLT(mv)	\
+	((((mv) / 100) & PDO_PPS_APDO_VOLT_MASK) << PDO_PPS_APDO_MIN_VOLT_SHIFT)
+#define PDO_PPS_APDO_MAX_VOLT(mv)	\
+	((((mv) / 100) & PDO_PPS_APDO_VOLT_MASK) << PDO_PPS_APDO_MAX_VOLT_SHIFT)
+#define PDO_PPS_APDO_MAX_CURR(ma)	\
+	((((ma) / 50) & PDO_PPS_APDO_CURR_MASK) << PDO_PPS_APDO_MAX_CURR_SHIFT)
+
+#define PDO_PPS_APDO(min_mv, max_mv, max_ma)				\
+	(PDO_TYPE(PDO_TYPE_APDO) | PDO_APDO_TYPE(APDO_TYPE_PPS) |	\
+	PDO_PPS_APDO_MIN_VOLT(min_mv) | PDO_PPS_APDO_MAX_VOLT(max_mv) |	\
+	PDO_PPS_APDO_MAX_CURR(max_ma))
+
+static inline enum pd_pdo_type pdo_type(u32 pdo)
+{
+	return (pdo >> PDO_TYPE_SHIFT) & PDO_TYPE_MASK;
+}
+
+static inline unsigned int pdo_fixed_voltage(u32 pdo)
+{
+	return ((pdo >> PDO_FIXED_VOLT_SHIFT) & PDO_VOLT_MASK) * 50;
+}
+
+static inline unsigned int pdo_min_voltage(u32 pdo)
+{
+	return ((pdo >> PDO_VAR_MIN_VOLT_SHIFT) & PDO_VOLT_MASK) * 50;
+}
+
+static inline unsigned int pdo_max_voltage(u32 pdo)
+{
+	return ((pdo >> PDO_VAR_MAX_VOLT_SHIFT) & PDO_VOLT_MASK) * 50;
+}
+
+static inline unsigned int pdo_max_current(u32 pdo)
+{
+	return ((pdo >> PDO_VAR_MAX_CURR_SHIFT) & PDO_CURR_MASK) * 10;
+}
+
+static inline unsigned int pdo_max_power(u32 pdo)
+{
+	return ((pdo >> PDO_BATT_MAX_PWR_SHIFT) & PDO_PWR_MASK) * 250;
+}
+
+static inline enum pd_apdo_type pdo_apdo_type(u32 pdo)
+{
+	return (pdo >> PDO_APDO_TYPE_SHIFT) & PDO_APDO_TYPE_MASK;
+}
+
+static inline unsigned int pdo_pps_apdo_min_voltage(u32 pdo)
+{
+	return ((pdo >> PDO_PPS_APDO_MIN_VOLT_SHIFT) &
+		PDO_PPS_APDO_VOLT_MASK) * 100;
+}
+
+static inline unsigned int pdo_pps_apdo_max_voltage(u32 pdo)
+{
+	return ((pdo >> PDO_PPS_APDO_MAX_VOLT_SHIFT) &
+		PDO_PPS_APDO_VOLT_MASK) * 100;
+}
+
+static inline unsigned int pdo_pps_apdo_max_current(u32 pdo)
+{
+	return ((pdo >> PDO_PPS_APDO_MAX_CURR_SHIFT) &
+		PDO_PPS_APDO_CURR_MASK) * 50;
+}
+
+/* RDO: Request Data Object */
+#define RDO_OBJ_POS_SHIFT	28
+#define RDO_OBJ_POS_MASK	0x7
+#define RDO_GIVE_BACK		BIT(27)	/* Supports reduced operating current */
+#define RDO_CAP_MISMATCH	BIT(26) /* Not satisfied by source caps */
+#define RDO_USB_COMM		BIT(25) /* USB communications capable */
+#define RDO_NO_SUSPEND		BIT(24) /* USB Suspend not supported */
+
+#define RDO_PWR_MASK			0x3ff
+#define RDO_CURR_MASK			0x3ff
+
+#define RDO_FIXED_OP_CURR_SHIFT		10
+#define RDO_FIXED_MAX_CURR_SHIFT	0
+
+#define RDO_OBJ(idx) (((idx) & RDO_OBJ_POS_MASK) << RDO_OBJ_POS_SHIFT)
+
+#define PDO_FIXED_OP_CURR(ma) ((((ma) / 10) & RDO_CURR_MASK) << RDO_FIXED_OP_CURR_SHIFT)
+#define PDO_FIXED_MAX_CURR(ma) ((((ma) / 10) & RDO_CURR_MASK) << RDO_FIXED_MAX_CURR_SHIFT)
+
+#define RDO_FIXED(idx, op_ma, max_ma, flags)			\
+	(RDO_OBJ(idx) | (flags) |				\
+	 PDO_FIXED_OP_CURR(op_ma) | PDO_FIXED_MAX_CURR(max_ma))
+
+#define RDO_BATT_OP_PWR_SHIFT		10	/* 250mW units */
+#define RDO_BATT_MAX_PWR_SHIFT		0	/* 250mW units */
+
+#define RDO_BATT_OP_PWR(mw) ((((mw) / 250) & RDO_PWR_MASK) << RDO_BATT_OP_PWR_SHIFT)
+#define RDO_BATT_MAX_PWR(mw) ((((mw) / 250) & RDO_PWR_MASK) << RDO_BATT_MAX_PWR_SHIFT)
+
+#define RDO_BATT(idx, op_mw, max_mw, flags)			\
+	(RDO_OBJ(idx) | (flags) |				\
+	 RDO_BATT_OP_PWR(op_mw) | RDO_BATT_MAX_PWR(max_mw))
+
+#define RDO_PROG_VOLT_MASK	0x7ff
+#define RDO_PROG_CURR_MASK	0x7f
+
+#define RDO_PROG_VOLT_SHIFT	9
+#define RDO_PROG_CURR_SHIFT	0
+
+#define RDO_PROG_VOLT_MV_STEP	20
+#define RDO_PROG_CURR_MA_STEP	50
+
+#define PDO_PROG_OUT_VOLT(mv)	\
+	((((mv) / RDO_PROG_VOLT_MV_STEP) & RDO_PROG_VOLT_MASK) << RDO_PROG_VOLT_SHIFT)
+#define PDO_PROG_OP_CURR(ma)	\
+	((((ma) / RDO_PROG_CURR_MA_STEP) & RDO_PROG_CURR_MASK) << RDO_PROG_CURR_SHIFT)
+
+#define RDO_PROG(idx, out_mv, op_ma, flags)			\
+	(RDO_OBJ(idx) | (flags) |				\
+	 PDO_PROG_OUT_VOLT(out_mv) | PDO_PROG_OP_CURR(op_ma))
+
+static inline unsigned int rdo_index(u32 rdo)
+{
+	return (rdo >> RDO_OBJ_POS_SHIFT) & RDO_OBJ_POS_MASK;
+}
+
+static inline unsigned int rdo_op_current(u32 rdo)
+{
+	return ((rdo >> RDO_FIXED_OP_CURR_SHIFT) & RDO_CURR_MASK) * 10;
+}
+
+static inline unsigned int rdo_max_current(u32 rdo)
+{
+	return ((rdo >> RDO_FIXED_MAX_CURR_SHIFT) &
+		RDO_CURR_MASK) * 10;
+}
+
+static inline unsigned int rdo_op_power(u32 rdo)
+{
+	return ((rdo >> RDO_BATT_OP_PWR_SHIFT) & RDO_PWR_MASK) * 250;
+}
+
+static inline unsigned int rdo_max_power(u32 rdo)
+{
+	return ((rdo >> RDO_BATT_MAX_PWR_SHIFT) & RDO_PWR_MASK) * 250;
+}
+
+/* Enter_USB Data Object */
+#define EUDO_USB_MODE_MASK		GENMASK(30, 28)
+#define EUDO_USB_MODE_SHIFT		28
+#define   EUDO_USB_MODE_USB2		0
+#define   EUDO_USB_MODE_USB3		1
+#define   EUDO_USB_MODE_USB4		2
+#define EUDO_USB4_DRD			BIT(26)
+#define EUDO_USB3_DRD			BIT(25)
+#define EUDO_CABLE_SPEED_MASK		GENMASK(23, 21)
+#define EUDO_CABLE_SPEED_SHIFT		21
+#define   EUDO_CABLE_SPEED_USB2		0
+#define   EUDO_CABLE_SPEED_USB3_GEN1	1
+#define   EUDO_CABLE_SPEED_USB4_GEN2	2
+#define   EUDO_CABLE_SPEED_USB4_GEN3	3
+#define EUDO_CABLE_TYPE_MASK		GENMASK(20, 19)
+#define EUDO_CABLE_TYPE_SHIFT		19
+#define   EUDO_CABLE_TYPE_PASSIVE	0
+#define   EUDO_CABLE_TYPE_RE_TIMER	1
+#define   EUDO_CABLE_TYPE_RE_DRIVER	2
+#define   EUDO_CABLE_TYPE_OPTICAL	3
+#define EUDO_CABLE_CURRENT_MASK		GENMASK(18, 17)
+#define EUDO_CABLE_CURRENT_SHIFT	17
+#define   EUDO_CABLE_CURRENT_NOTSUPP	0
+#define   EUDO_CABLE_CURRENT_3A		2
+#define   EUDO_CABLE_CURRENT_5A		3
+#define EUDO_PCIE_SUPPORT		BIT(16)
+#define EUDO_DP_SUPPORT			BIT(15)
+#define EUDO_TBT_SUPPORT		BIT(14)
+#define EUDO_HOST_PRESENT		BIT(13)
+
+/* USB PD timers and counters */
+#define PD_T_NO_RESPONSE	5000	/* 4.5 - 5.5 seconds */
+#define PD_T_DB_DETECT		10000	/* 10 - 15 seconds */
+#define PD_T_SEND_SOURCE_CAP	150	/* 100 - 200 ms */
+#define PD_T_SENDER_RESPONSE	60	/* 24 - 30 ms, relaxed */
+#define PD_T_RECEIVER_RESPONSE	15	/* 15ms max */
+#define PD_T_SOURCE_ACTIVITY	45
+#define PD_T_SINK_ACTIVITY	135
+#define PD_T_SINK_WAIT_CAP	310	/* 310 - 620 ms */
+#define PD_T_PS_TRANSITION	500
+#define PD_T_SRC_TRANSITION	35
+#define PD_T_DRP_SNK		40
+#define PD_T_DRP_SRC		30
+#define PD_T_PS_SOURCE_OFF	920
+#define PD_T_PS_SOURCE_ON	480
+#define PD_T_PS_SOURCE_ON_PRS	450	/* 390 - 480ms */
+#define PD_T_PS_HARD_RESET	30
+#define PD_T_SRC_RECOVER	760
+#define PD_T_SRC_RECOVER_MAX	1000
+#define PD_T_SRC_TURN_ON	275
+#define PD_T_SAFE_0V		650
+#define PD_T_VCONN_SOURCE_ON	100
+#define PD_T_SINK_REQUEST	100	/* 100 ms minimum */
+#define PD_T_ERROR_RECOVERY	100	/* minimum 25 is insufficient */
+#define PD_T_SRCSWAPSTDBY	625	/* Maximum of 650ms */
+#define PD_T_NEWSRC		250	/* Maximum of 275ms */
+#define PD_T_SWAP_SRC_START	20	/* Minimum of 20ms */
+#define PD_T_BIST_CONT_MODE	50	/* 30 - 60 ms */
+#define PD_T_SINK_TX		16	/* 16 - 20 ms */
+#define PD_T_CHUNK_NOT_SUPP	42	/* 40 - 50 ms */
+
+#define PD_T_DRP_TRY		100	/* 75 - 150 ms */
+#define PD_T_DRP_TRYWAIT	600	/* 400 - 800 ms */
+
+#define PD_T_CC_DEBOUNCE	200	/* 100 - 200 ms */
+#define PD_T_PD_DEBOUNCE	20	/* 10 - 20 ms */
+#define PD_T_TRY_CC_DEBOUNCE	15	/* 10 - 20 ms */
+
+#define PD_N_CAPS_COUNT		(PD_T_NO_RESPONSE / PD_T_SEND_SOURCE_CAP)
+#define PD_N_HARD_RESET_COUNT	1
+
+#define PD_P_SNK_STDBY_MW	2500	/* 2500 mW */
+
+#endif /* __LINUX_USB_PD_H */
diff --git a/include/power/power_delivery/pd_vdo.h b/include/power/power_delivery/pd_vdo.h
new file mode 100644
index 0000000000..7f5e330a68
--- /dev/null
+++ b/include/power/power_delivery/pd_vdo.h
@@ -0,0 +1,518 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Copyright 2015-2017 Google, Inc
+ */
+
+#ifndef __LINUX_USB_PD_VDO_H
+#define __LINUX_USB_PD_VDO_H
+
+#include "pd.h"
+
+/*
+ * VDO : Vendor Defined Message Object
+ * VDM object is minimum of VDM header + 6 additional data objects.
+ */
+
+#define VDO_MAX_OBJECTS		6
+#define VDO_MAX_SIZE		(VDO_MAX_OBJECTS + 1)
+
+/*
+ * VDM header
+ * ----------
+ * <31:16>  :: SVID
+ * <15>     :: VDM type ( 1b == structured, 0b == unstructured )
+ * <14:13>  :: Structured VDM version
+ * <12:11>  :: reserved
+ * <10:8>   :: object position (1-7 valid ... used for enter/exit mode only)
+ * <7:6>    :: command type (SVDM only?)
+ * <5>      :: reserved (SVDM), command type (UVDM)
+ * <4:0>    :: command
+ */
+#define VDO(vid, type, ver, custom)			\
+	(((vid) << 16) |				\
+	 ((type) << 15) |				\
+	 ((ver) << 13) |				\
+	 ((custom) & 0x7FFF))
+
+#define VDO_SVDM_TYPE		(1 << 15)
+#define VDO_SVDM_VERS(x)	((x) << 13)
+#define VDO_OPOS(x)		((x) << 8)
+#define VDO_CMDT(x)		((x) << 6)
+#define VDO_SVDM_VERS_MASK	VDO_SVDM_VERS(0x3)
+#define VDO_OPOS_MASK		VDO_OPOS(0x7)
+#define VDO_CMDT_MASK		VDO_CMDT(0x3)
+
+#define CMDT_INIT		0
+#define CMDT_RSP_ACK		1
+#define CMDT_RSP_NAK		2
+#define CMDT_RSP_BUSY		3
+
+/* reserved for SVDM ... for Google UVDM */
+#define VDO_SRC_INITIATOR	(0 << 5)
+#define VDO_SRC_RESPONDER	(1 << 5)
+
+#define CMD_DISCOVER_IDENT	1
+#define CMD_DISCOVER_SVID	2
+#define CMD_DISCOVER_MODES	3
+#define CMD_ENTER_MODE		4
+#define CMD_EXIT_MODE		5
+#define CMD_ATTENTION		6
+
+#define VDO_CMD_VENDOR(x)    (((0x10 + (x)) & 0x1f))
+
+/* ChromeOS specific commands */
+#define VDO_CMD_VERSION		VDO_CMD_VENDOR(0)
+#define VDO_CMD_SEND_INFO	VDO_CMD_VENDOR(1)
+#define VDO_CMD_READ_INFO	VDO_CMD_VENDOR(2)
+#define VDO_CMD_REBOOT		VDO_CMD_VENDOR(5)
+#define VDO_CMD_FLASH_ERASE	VDO_CMD_VENDOR(6)
+#define VDO_CMD_FLASH_WRITE	VDO_CMD_VENDOR(7)
+#define VDO_CMD_ERASE_SIG	VDO_CMD_VENDOR(8)
+#define VDO_CMD_PING_ENABLE	VDO_CMD_VENDOR(10)
+#define VDO_CMD_CURRENT		VDO_CMD_VENDOR(11)
+#define VDO_CMD_FLIP		VDO_CMD_VENDOR(12)
+#define VDO_CMD_GET_LOG		VDO_CMD_VENDOR(13)
+#define VDO_CMD_CCD_EN		VDO_CMD_VENDOR(14)
+
+#define PD_VDO_VID(vdo)		((vdo) >> 16)
+#define PD_VDO_SVDM(vdo)	(((vdo) >> 15) & 1)
+#define PD_VDO_SVDM_VER(vdo)	(((vdo) >> 13) & 0x3)
+#define PD_VDO_OPOS(vdo)	(((vdo) >> 8) & 0x7)
+#define PD_VDO_CMD(vdo)		((vdo) & 0x1f)
+#define PD_VDO_CMDT(vdo)	(((vdo) >> 6) & 0x3)
+
+/*
+ * SVDM Identity request -> response
+ *
+ * Request is simply properly formatted SVDM header
+ *
+ * Response is 4 data objects:
+ * [0] :: SVDM header
+ * [1] :: Identitiy header
+ * [2] :: Cert Stat VDO
+ * [3] :: (Product | Cable) VDO
+ * [4] :: AMA VDO
+ *
+ */
+#define VDO_INDEX_HDR		0
+#define VDO_INDEX_IDH		1
+#define VDO_INDEX_CSTAT		2
+#define VDO_INDEX_CABLE		3
+#define VDO_INDEX_PRODUCT	3
+#define VDO_INDEX_AMA		4
+
+/*
+ * SVDM Identity Header
+ * --------------------
+ * <31>     :: data capable as a USB host
+ * <30>     :: data capable as a USB device
+ * <29:27>  :: product type (UFP / Cable / VPD)
+ * <26>     :: modal operation supported (1b == yes)
+ * <25:23>  :: product type (DFP) (SVDM version 2.0+ only; set to zero in version 1.0)
+ * <22:21>  :: connector type (SVDM version 2.0+ only; set to zero in version 1.0)
+ * <20:16>  :: Reserved, Shall be set to zero
+ * <15:0>   :: USB-IF assigned VID for this cable vendor
+ */
+
+/* PD Rev2.0 definition */
+#define IDH_PTYPE_UNDEF		0
+
+/* SOP Product Type (UFP) */
+#define IDH_PTYPE_NOT_UFP	0
+#define IDH_PTYPE_HUB		1
+#define IDH_PTYPE_PERIPH	2
+#define IDH_PTYPE_PSD		3
+#define IDH_PTYPE_AMA		5
+
+/* SOP' Product Type (Cable Plug / VPD) */
+#define IDH_PTYPE_NOT_CABLE	0
+#define IDH_PTYPE_PCABLE	3
+#define IDH_PTYPE_ACABLE	4
+#define IDH_PTYPE_VPD		6
+
+/* SOP Product Type (DFP) */
+#define IDH_PTYPE_NOT_DFP	0
+#define IDH_PTYPE_DFP_HUB	1
+#define IDH_PTYPE_DFP_HOST	2
+#define IDH_PTYPE_DFP_PB	3
+
+/* ID Header Mask */
+#define IDH_DFP_MASK		GENMASK(25, 23)
+#define IDH_CONN_MASK		GENMASK(22, 21)
+
+#define VDO_IDH(usbh, usbd, ufp_cable, is_modal, dfp, conn, vid)		\
+	((usbh) << 31 | (usbd) << 30 | ((ufp_cable) & 0x7) << 27		\
+	 | (is_modal) << 26 | ((dfp) & 0x7) << 23 | ((conn) & 0x3) << 21	\
+	 | ((vid) & 0xffff))
+
+#define PD_IDH_PTYPE(vdo)	(((vdo) >> 27) & 0x7)
+#define PD_IDH_VID(vdo)		((vdo) & 0xffff)
+#define PD_IDH_MODAL_SUPP(vdo)	((vdo) & (1 << 26))
+#define PD_IDH_DFP_PTYPE(vdo)	(((vdo) >> 23) & 0x7)
+#define PD_IDH_CONN_TYPE(vdo)	(((vdo) >> 21) & 0x3)
+
+/*
+ * Cert Stat VDO
+ * -------------
+ * <31:0>  : USB-IF assigned XID for this cable
+ */
+#define PD_CSTAT_XID(vdo)	(vdo)
+#define VDO_CERT(xid)		((xid) & 0xffffffff)
+
+/*
+ * Product VDO
+ * -----------
+ * <31:16> : USB Product ID
+ * <15:0>  : USB bcdDevice
+ */
+#define VDO_PRODUCT(pid, bcd)	(((pid) & 0xffff) << 16 | ((bcd) & 0xffff))
+#define PD_PRODUCT_PID(vdo)	(((vdo) >> 16) & 0xffff)
+
+/*
+ * UFP VDO (PD Revision 3.0+ only)
+ * --------
+ * <31:29> :: UFP VDO version
+ * <28>    :: Reserved
+ * <27:24> :: Device capability
+ * <23:22> :: Connector type (10b == receptacle, 11b == captive plug)
+ * <21:11> :: Reserved
+ * <10:8>  :: Vconn power (AMA only)
+ * <7>     :: Vconn required (AMA only, 0b == no, 1b == yes)
+ * <6>     :: Vbus required (AMA only, 0b == yes, 1b == no)
+ * <5:3>   :: Alternate modes
+ * <2:0>   :: USB highest speed
+ */
+#define PD_VDO_UFP_DEVCAP(vdo)	(((vdo) & GENMASK(27, 24)) >> 24)
+
+/* UFP VDO Version */
+#define UFP_VDO_VER1_2		2
+
+/* Device Capability */
+#define DEV_USB2_CAPABLE	BIT(0)
+#define DEV_USB2_BILLBOARD	BIT(1)
+#define DEV_USB3_CAPABLE	BIT(2)
+#define DEV_USB4_CAPABLE	BIT(3)
+
+/* Connector Type */
+#define UFP_RECEPTACLE		2
+#define UFP_CAPTIVE		3
+
+/* Vconn Power (AMA only, set to AMA_VCONN_NOT_REQ if Vconn is not required) */
+#define AMA_VCONN_PWR_1W	0
+#define AMA_VCONN_PWR_1W5	1
+#define AMA_VCONN_PWR_2W	2
+#define AMA_VCONN_PWR_3W	3
+#define AMA_VCONN_PWR_4W	4
+#define AMA_VCONN_PWR_5W	5
+#define AMA_VCONN_PWR_6W	6
+
+/* Vconn Required (AMA only) */
+#define AMA_VCONN_NOT_REQ	0
+#define AMA_VCONN_REQ		1
+
+/* Vbus Required (AMA only) */
+#define AMA_VBUS_REQ		0
+#define AMA_VBUS_NOT_REQ	1
+
+/* Alternate Modes */
+#define UFP_ALTMODE_NOT_SUPP	0
+#define UFP_ALTMODE_TBT3	BIT(0)
+#define UFP_ALTMODE_RECFG	BIT(1)
+#define UFP_ALTMODE_NO_RECFG	BIT(2)
+
+/* USB Highest Speed */
+#define UFP_USB2_ONLY		0
+#define UFP_USB32_GEN1		1
+#define UFP_USB32_4_GEN2	2
+#define UFP_USB4_GEN3		3
+
+#define VDO_UFP(ver, cap, conn, vcpwr, vcr, vbr, alt, spd)			\
+	(((ver) & 0x7) << 29 | ((cap) & 0xf) << 24 | ((conn) & 0x3) << 22	\
+	 | ((vcpwr) & 0x7) << 8 | (vcr) << 7 | (vbr) << 6 | ((alt) & 0x7) << 3	\
+	 | ((spd) & 0x7))
+
+/*
+ * DFP VDO (PD Revision 3.0+ only)
+ * --------
+ * <31:29> :: DFP VDO version
+ * <28:27> :: Reserved
+ * <26:24> :: Host capability
+ * <23:22> :: Connector type (10b == receptacle, 11b == captive plug)
+ * <21:5>  :: Reserved
+ * <4:0>   :: Port number
+ */
+#define PD_VDO_DFP_HOSTCAP(vdo)	(((vdo) & GENMASK(26, 24)) >> 24)
+
+#define DFP_VDO_VER1_1		1
+#define HOST_USB2_CAPABLE	BIT(0)
+#define HOST_USB3_CAPABLE	BIT(1)
+#define HOST_USB4_CAPABLE	BIT(2)
+#define DFP_RECEPTACLE		2
+#define DFP_CAPTIVE		3
+
+#define VDO_DFP(ver, cap, conn, pnum)						\
+	(((ver) & 0x7) << 29 | ((cap) & 0x7) << 24 | ((conn) & 0x3) << 22	\
+	 | ((pnum) & 0x1f))
+
+/*
+ * Cable VDO (for both Passive and Active Cable VDO in PD Rev2.0)
+ * ---------
+ * <31:28> :: Cable HW version
+ * <27:24> :: Cable FW version
+ * <23:20> :: Reserved, Shall be set to zero
+ * <19:18> :: type-C to Type-A/B/C/Captive (00b == A, 01 == B, 10 == C, 11 == Captive)
+ * <17>    :: Reserved, Shall be set to zero
+ * <16:13> :: cable latency (0001 == <10ns(~1m length))
+ * <12:11> :: cable termination type (11b == both ends active VCONN req)
+ * <10>    :: SSTX1 Directionality support (0b == fixed, 1b == cfgable)
+ * <9>     :: SSTX2 Directionality support
+ * <8>     :: SSRX1 Directionality support
+ * <7>     :: SSRX2 Directionality support
+ * <6:5>   :: Vbus current handling capability (01b == 3A, 10b == 5A)
+ * <4>     :: Vbus through cable (0b == no, 1b == yes)
+ * <3>     :: SOP" controller present? (0b == no, 1b == yes)
+ * <2:0>   :: USB SS Signaling support
+ *
+ * Passive Cable VDO (PD Rev3.0+)
+ * ---------
+ * <31:28> :: Cable HW version
+ * <27:24> :: Cable FW version
+ * <23:21> :: VDO version
+ * <20>    :: Reserved, Shall be set to zero
+ * <19:18> :: Type-C to Type-C/Captive (10b == C, 11b == Captive)
+ * <17>    :: Reserved, Shall be set to zero
+ * <16:13> :: cable latency (0001 == <10ns(~1m length))
+ * <12:11> :: cable termination type (10b == Vconn not req, 01b == Vconn req)
+ * <10:9>  :: Maximum Vbus voltage (00b == 20V, 01b == 30V, 10b == 40V, 11b == 50V)
+ * <8:7>   :: Reserved, Shall be set to zero
+ * <6:5>   :: Vbus current handling capability (01b == 3A, 10b == 5A)
+ * <4:3>   :: Reserved, Shall be set to zero
+ * <2:0>   :: USB highest speed
+ *
+ * Active Cable VDO 1 (PD Rev3.0+)
+ * ---------
+ * <31:28> :: Cable HW version
+ * <27:24> :: Cable FW version
+ * <23:21> :: VDO version
+ * <20>    :: Reserved, Shall be set to zero
+ * <19:18> :: Connector type (10b == C, 11b == Captive)
+ * <17>    :: Reserved, Shall be set to zero
+ * <16:13> :: cable latency (0001 == <10ns(~1m length))
+ * <12:11> :: cable termination type (10b == one end active, 11b == both ends active VCONN req)
+ * <10:9>  :: Maximum Vbus voltage (00b == 20V, 01b == 30V, 10b == 40V, 11b == 50V)
+ * <8>     :: SBU supported (0b == supported, 1b == not supported)
+ * <7>     :: SBU type (0b == passive, 1b == active)
+ * <6:5>   :: Vbus current handling capability (01b == 3A, 10b == 5A)
+ * <2:0>   :: USB highest speed
+ */
+/* Cable VDO Version */
+#define CABLE_VDO_VER1_0	0
+#define CABLE_VDO_VER1_3	3
+
+/* Connector Type (_ATYPE and _BTYPE are for PD Rev2.0 only) */
+#define CABLE_ATYPE		0
+#define CABLE_BTYPE		1
+#define CABLE_CTYPE		2
+#define CABLE_CAPTIVE		3
+
+/* Cable Latency */
+#define CABLE_LATENCY_1M	1
+#define CABLE_LATENCY_2M	2
+#define CABLE_LATENCY_3M	3
+#define CABLE_LATENCY_4M	4
+#define CABLE_LATENCY_5M	5
+#define CABLE_LATENCY_6M	6
+#define CABLE_LATENCY_7M	7
+#define CABLE_LATENCY_7M_PLUS	8
+
+/* Cable Termination Type */
+#define PCABLE_VCONN_NOT_REQ	0
+#define PCABLE_VCONN_REQ	1
+#define ACABLE_ONE_END		2
+#define ACABLE_BOTH_END		3
+
+/* Maximum Vbus Voltage */
+#define CABLE_MAX_VBUS_20V	0
+#define CABLE_MAX_VBUS_30V	1
+#define CABLE_MAX_VBUS_40V	2
+#define CABLE_MAX_VBUS_50V	3
+
+/* Active Cable SBU Supported/Type */
+#define ACABLE_SBU_SUPP		0
+#define ACABLE_SBU_NOT_SUPP	1
+#define ACABLE_SBU_PASSIVE	0
+#define ACABLE_SBU_ACTIVE	1
+
+/* Vbus Current Handling Capability */
+#define CABLE_CURR_DEF		0
+#define CABLE_CURR_3A		1
+#define CABLE_CURR_5A		2
+
+/* USB SuperSpeed Signaling Support (PD Rev2.0) */
+#define CABLE_USBSS_U2_ONLY	0
+#define CABLE_USBSS_U31_GEN1	1
+#define CABLE_USBSS_U31_GEN2	2
+
+/* USB Highest Speed */
+#define CABLE_USB2_ONLY		0
+#define CABLE_USB32_GEN1	1
+#define CABLE_USB32_4_GEN2	2
+#define CABLE_USB4_GEN3		3
+
+#define VDO_CABLE(hw, fw, cbl, lat, term, tx1d, tx2d, rx1d, rx2d, cur, vps, sopp, usbss) \
+	(((hw) & 0x7) << 28 | ((fw) & 0x7) << 24 | ((cbl) & 0x3) << 18		\
+	 | ((lat) & 0x7) << 13 | ((term) & 0x3) << 11 | (tx1d) << 10		\
+	 | (tx2d) << 9 | (rx1d) << 8 | (rx2d) << 7 | ((cur) & 0x3) << 5		\
+	 | (vps) << 4 | (sopp) << 3 | ((usbss) & 0x7))
+#define VDO_PCABLE(hw, fw, ver, conn, lat, term, vbm, cur, spd)			\
+	(((hw) & 0xf) << 28 | ((fw) & 0xf) << 24 | ((ver) & 0x7) << 21		\
+	 | ((conn) & 0x3) << 18 | ((lat) & 0xf) << 13 | ((term) & 0x3) << 11	\
+	 | ((vbm) & 0x3) << 9 | ((cur) & 0x3) << 5 | ((spd) & 0x7))
+#define VDO_ACABLE1(hw, fw, ver, conn, lat, term, vbm, sbu, sbut, cur, vbt, sopp, spd) \
+	(((hw) & 0xf) << 28 | ((fw) & 0xf) << 24 | ((ver) & 0x7) << 21		\
+	 | ((conn) & 0x3) << 18	| ((lat) & 0xf) << 13 | ((term) & 0x3) << 11	\
+	 | ((vbm) & 0x3) << 9 | (sbu) << 8 | (sbut) << 7 | ((cur) & 0x3) << 5	\
+	 | (vbt) << 4 | (sopp) << 3 | ((spd) & 0x7))
+
+#define VDO_TYPEC_CABLE_TYPE(vdo)	(((vdo) >> 18) & 0x3)
+
+/*
+ * Active Cable VDO 2
+ * ---------
+ * <31:24> :: Maximum operating temperature
+ * <23:16> :: Shutdown temperature
+ * <15>    :: Reserved, Shall be set to zero
+ * <14:12> :: U3/CLd power
+ * <11>    :: U3 to U0 transition mode (0b == direct, 1b == through U3S)
+ * <10>    :: Physical connection (0b == copper, 1b == optical)
+ * <9>     :: Active element (0b == redriver, 1b == retimer)
+ * <8>     :: USB4 supported (0b == yes, 1b == no)
+ * <7:6>   :: USB2 hub hops consumed
+ * <5>     :: USB2 supported (0b == yes, 1b == no)
+ * <4>     :: USB3.2 supported (0b == yes, 1b == no)
+ * <3>     :: USB lanes supported (0b == one lane, 1b == two lanes)
+ * <2>     :: Optically isolated active cable (0b == no, 1b == yes)
+ * <1>     :: Reserved, Shall be set to zero
+ * <0>     :: USB gen (0b == gen1, 1b == gen2+)
+ */
+
+/* U3/CLd Power*/
+#define ACAB2_U3_CLD_10MW_PLUS	0
+#define ACAB2_U3_CLD_10MW	1
+#define ACAB2_U3_CLD_5MW	2
+#define ACAB2_U3_CLD_1MW	3
+#define ACAB2_U3_CLD_500UW	4
+#define ACAB2_U3_CLD_200UW	5
+#define ACAB2_U3_CLD_50UW	6
+
+/* Other Active Cable VDO 2 Fields */
+#define ACAB2_U3U0_DIRECT	0
+#define ACAB2_U3U0_U3S		1
+#define ACAB2_PHY_COPPER	0
+#define ACAB2_PHY_OPTICAL	1
+#define ACAB2_REDRIVER		0
+#define ACAB2_RETIMER		1
+#define ACAB2_USB4_SUPP		0
+#define ACAB2_USB4_NOT_SUPP	1
+#define ACAB2_USB2_SUPP		0
+#define ACAB2_USB2_NOT_SUPP	1
+#define ACAB2_USB32_SUPP	0
+#define ACAB2_USB32_NOT_SUPP	1
+#define ACAB2_LANES_ONE		0
+#define ACAB2_LANES_TWO		1
+#define ACAB2_OPT_ISO_NO	0
+#define ACAB2_OPT_ISO_YES	1
+#define ACAB2_GEN_1		0
+#define ACAB2_GEN_2_PLUS	1
+
+#define VDO_ACABLE2(mtemp, stemp, u3p, trans, phy, ele, u4, hops, u2, u32, lane, iso, gen)	\
+	(((mtemp) & 0xff) << 24 | ((stemp) & 0xff) << 16 | ((u3p) & 0x7) << 12	\
+	 | (trans) << 11 | (phy) << 10 | (ele) << 9 | (u4) << 8			\
+	 | ((hops) & 0x3) << 6 | (u2) << 5 | (u32) << 4 | (lane) << 3		\
+	 | (iso) << 2 | (gen))
+
+/*
+ * AMA VDO (PD Rev2.0)
+ * ---------
+ * <31:28> :: Cable HW version
+ * <27:24> :: Cable FW version
+ * <23:12> :: Reserved, Shall be set to zero
+ * <11>    :: SSTX1 Directionality support (0b == fixed, 1b == cfgable)
+ * <10>    :: SSTX2 Directionality support
+ * <9>     :: SSRX1 Directionality support
+ * <8>     :: SSRX2 Directionality support
+ * <7:5>   :: Vconn power
+ * <4>     :: Vconn power required
+ * <3>     :: Vbus power required
+ * <2:0>   :: USB SS Signaling support
+ */
+#define VDO_AMA(hw, fw, tx1d, tx2d, rx1d, rx2d, vcpwr, vcr, vbr, usbss) \
+	(((hw) & 0x7) << 28 | ((fw) & 0x7) << 24			\
+	 | (tx1d) << 11 | (tx2d) << 10 | (rx1d) << 9 | (rx2d) << 8	\
+	 | ((vcpwr) & 0x7) << 5 | (vcr) << 4 | (vbr) << 3		\
+	 | ((usbss) & 0x7))
+
+#define PD_VDO_AMA_VCONN_REQ(vdo)	(((vdo) >> 4) & 1)
+#define PD_VDO_AMA_VBUS_REQ(vdo)	(((vdo) >> 3) & 1)
+
+#define AMA_USBSS_U2_ONLY	0
+#define AMA_USBSS_U31_GEN1	1
+#define AMA_USBSS_U31_GEN2	2
+#define AMA_USBSS_BBONLY	3
+
+/*
+ * VPD VDO
+ * ---------
+ * <31:28> :: HW version
+ * <27:24> :: FW version
+ * <23:21> :: VDO version
+ * <20:17> :: Reserved, Shall be set to zero
+ * <16:15> :: Maximum Vbus voltage (00b == 20V, 01b == 30V, 10b == 40V, 11b == 50V)
+ * <14>    :: Charge through current support (0b == 3A, 1b == 5A)
+ * <13>    :: Reserved, Shall be set to zero
+ * <12:7>  :: Vbus impedance
+ * <6:1>   :: Ground impedance
+ * <0>     :: Charge through support (0b == no, 1b == yes)
+ */
+#define VPD_VDO_VER1_0		0
+#define VPD_MAX_VBUS_20V	0
+#define VPD_MAX_VBUS_30V	1
+#define VPD_MAX_VBUS_40V	2
+#define VPD_MAX_VBUS_50V	3
+#define VPDCT_CURR_3A		0
+#define VPDCT_CURR_5A		1
+#define VPDCT_NOT_SUPP		0
+#define VPDCT_SUPP		1
+
+#define VDO_VPD(hw, fw, ver, vbm, curr, vbi, gi, ct)			\
+	(((hw) & 0xf) << 28 | ((fw) & 0xf) << 24 | ((ver) & 0x7) << 21	\
+	 | ((vbm) & 0x3) << 15 | (curr) << 14 | ((vbi) & 0x3f) << 7	\
+	 | ((gi) & 0x3f) << 1 | (ct))
+
+/*
+ * SVDM Discover SVIDs request -> response
+ *
+ * Request is properly formatted VDM Header with discover SVIDs command.
+ * Response is a set of SVIDs of all supported SVIDs with all zero's to
+ * mark the end of SVIDs.  If more than 12 SVIDs are supported command SHOULD be
+ * repeated.
+ */
+#define VDO_SVID(svid0, svid1)	(((svid0) & 0xffff) << 16 | ((svid1) & 0xffff))
+#define PD_VDO_SVID_SVID0(vdo)	((vdo) >> 16)
+#define PD_VDO_SVID_SVID1(vdo)	((vdo) & 0xffff)
+
+/* USB-IF SIDs */
+#define USB_SID_PD		0xff00 /* power delivery */
+#define USB_SID_DISPLAYPORT	0xff01
+#define USB_SID_MHL		0xff02	/* Mobile High-Definition Link */
+
+/* VDM command timeouts (in ms) */
+
+#define PD_T_VDM_UNSTRUCTURED	500
+#define PD_T_VDM_BUSY		100
+#define PD_T_VDM_WAIT_MODE_E	100
+#define PD_T_VDM_SNDR_RSP	30
+#define PD_T_VDM_E_MODE		25
+#define PD_T_VDM_RCVR_RSP	15
+
+#endif /* __LINUX_USB_PD_VDO_H */
diff --git a/include/power/power_delivery/power_delivery.h b/include/power/power_delivery/power_delivery.h
new file mode 100644
index 0000000000..36383b7f8a
--- /dev/null
+++ b/include/power/power_delivery/power_delivery.h
@@ -0,0 +1,28 @@
+/*
+ * (C) Copyright 2020 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _power_delivery_H_
+#define _power_delivery_H_
+
+/* Capability */
+#define FG_CAP_FUEL_GAUGE	BIT(0)
+#define FG_CAP_CHARGER		BIT(1)
+
+struct dm_power_delivery_ops {
+	int (*get_voltage)(struct udevice *dev);
+	int (*get_current)(struct udevice *dev);
+	int (*get_online)(struct udevice *dev);
+};
+
+struct power_delivery_data {
+	int voltage;
+	int current;
+	int online;
+};
+
+int power_delivery_init(void);
+int power_delivery_get_data(struct udevice *dev, struct power_delivery_data *pd_data);
+#endif
diff --git a/include/power/power_delivery/tcpm.h b/include/power/power_delivery/tcpm.h
new file mode 100644
index 0000000000..0049682106
--- /dev/null
+++ b/include/power/power_delivery/tcpm.h
@@ -0,0 +1,194 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Copyright 2015-2017 Google, Inc
+ */
+
+#ifndef __LINUX_USB_TCPM_H
+#define __LINUX_USB_TCPM_H
+
+#include <linux/bitops.h>
+#include "typec.h"
+#include "pd.h"
+
+enum typec_cc_status {
+	TYPEC_CC_OPEN,
+	TYPEC_CC_RA,
+	TYPEC_CC_RD,
+	TYPEC_CC_RP_DEF,
+	TYPEC_CC_RP_1_5,
+	TYPEC_CC_RP_3_0,
+};
+
+/* Collision Avoidance */
+#define SINK_TX_NG	TYPEC_CC_RP_1_5
+#define SINK_TX_OK	TYPEC_CC_RP_3_0
+
+enum typec_cc_polarity {
+	TYPEC_POLARITY_CC1,
+	TYPEC_POLARITY_CC2,
+};
+
+/* Time to wait for TCPC to complete transmit */
+#define PD_T_TCPC_TX_TIMEOUT	100		/* in ms	*/
+#define PD_ROLE_SWAP_TIMEOUT	(MSEC_PER_SEC * 10)
+#define PD_PPS_CTRL_TIMEOUT	(MSEC_PER_SEC * 10)
+
+enum tcpm_transmit_status {
+	TCPC_TX_SUCCESS = 0,
+	TCPC_TX_DISCARDED = 1,
+	TCPC_TX_FAILED = 2,
+};
+
+enum tcpm_transmit_type {
+	TCPC_TX_SOP = 0,
+	TCPC_TX_SOP_PRIME = 1,
+	TCPC_TX_SOP_PRIME_PRIME = 2,
+	TCPC_TX_SOP_DEBUG_PRIME = 3,
+	TCPC_TX_SOP_DEBUG_PRIME_PRIME = 4,
+	TCPC_TX_HARD_RESET = 5,
+	TCPC_TX_CABLE_RESET = 6,
+	TCPC_TX_BIST_MODE_2 = 7
+};
+
+/* Mux state attributes */
+#define TCPC_MUX_USB_ENABLED		BIT(0)	/* USB enabled */
+#define TCPC_MUX_DP_ENABLED		BIT(1)	/* DP enabled */
+#define TCPC_MUX_POLARITY_INVERTED	BIT(2)	/* Polarity inverted */
+
+/**
+ * struct tcpc_dev - Port configuration and callback functions
+ * @fwnode:	Pointer to port fwnode
+ * @get_vbus:	Called to read current VBUS state
+ * @get_current_limit:
+ *		Optional; called by the tcpm core when configured as a snk
+ *		and cc=Rp-def. This allows the tcpm to provide a fallback
+ *		current-limit detection method for the cc=Rp-def case.
+ *		For example, some tcpcs may include BC1.2 charger detection
+ *		and use that in this case.
+ * @set_cc:	Called to set value of CC pins
+ * @apply_rc:	Optional; Needed to move TCPCI based chipset to APPLY_RC state
+ *		as stated by the TCPCI specification.
+ * @get_cc:	Called to read current CC pin values
+ * @set_polarity:
+ *		Called to set polarity
+ * @set_vconn:	Called to enable or disable VCONN
+ * @set_vbus:	Called to enable or disable VBUS
+ * @set_current_limit:
+ *		Optional; called to set current limit as negotiated
+ *		with partner.
+ * @set_pd_rx:	Called to enable or disable reception of PD messages
+ * @set_roles:	Called to set power and data roles
+ * @start_toggling:
+ *		Optional; if supported by hardware, called to start dual-role
+ *		toggling or single-role connection detection. Toggling stops
+ *		automatically if a connection is established.
+ * @try_role:	Optional; called to set a preferred role
+ * @pd_transmit:Called to transmit PD message
+ * @set_bist_data: Turn on/off bist data mode for compliance testing
+ * @enable_frs:
+ *		Optional; Called to enable/disable PD 3.0 fast role swap.
+ *		Enabling frs is accessory dependent as not all PD3.0
+ *		accessories support fast role swap.
+ * @frs_sourcing_vbus:
+ *		Optional; Called to notify that vbus is now being sourced.
+ *		Low level drivers can perform chip specific operations, if any.
+ * @enable_auto_vbus_discharge:
+ *		Optional; TCPCI spec based TCPC implementations can optionally
+ *		support hardware to autonomously dischrge vbus upon disconnecting
+ *		as sink or source. TCPM signals TCPC to enable the mechanism upon
+ *		entering connected state and signals disabling upon disconnect.
+ * @set_auto_vbus_discharge_threshold:
+ *		Mandatory when enable_auto_vbus_discharge is implemented. TCPM
+ *		calls this function to allow lower levels drivers to program the
+ *		vbus threshold voltage below which the vbus discharge circuit
+ *		will be turned on. requested_vbus_voltage is set to 0 when vbus
+ *		is going to disappear knowingly i.e. during PR_SWAP and
+ *		HARD_RESET etc.
+ * @is_vbus_vsafe0v:
+ *		Optional; TCPCI spec based TCPC implementations are expected to
+ *		detect VSAFE0V voltage level at vbus. When detection of VSAFE0V
+ *		is supported by TCPC, set this callback for TCPM to query
+ *		whether vbus is at VSAFE0V when needed.
+ *		Returns true when vbus is at VSAFE0V, false otherwise.
+ * @set_partner_usb_comm_capable:
+ *              Optional; The USB Communications Capable bit indicates if port
+ *              partner is capable of communication over the USB data lines
+ *              (e.g. D+/- or SS Tx/Rx). Called to notify the status of the bit.
+ * @check_contaminant:
+ *		Optional; The callback is called when CC pins report open status
+ *		at the end of the toggling period. Chip level drivers are
+ *		expected to check for contaminant and re-enable toggling if
+ *		needed. When 0 is not returned, check_contaminant is expected to
+ *		restart toggling after checking the connector for contaminant.
+ *		This forces the TCPM state machine to tranistion to TOGGLING state
+ *		without calling start_toggling callback.
+ * @poll_event:
+ * 		After the PD chip driver is loaded, the callback function will be
+ * 		called to poll what events have been triggered.
+ * @enter_low_power_mode:
+ * 		Optional; the pd chip enters low power mode.
+ */
+struct tcpc_dev {
+	ofnode connector_node;
+	int (*init)(struct tcpc_dev *dev);
+	int (*get_vbus)(struct tcpc_dev *dev);
+	int (*get_current_limit)(struct tcpc_dev *dev);
+	int (*set_cc)(struct tcpc_dev *dev, enum typec_cc_status cc);
+	int (*apply_rc)(struct tcpc_dev *dev, enum typec_cc_status cc,
+			enum typec_cc_polarity polarity);
+	int (*get_cc)(struct tcpc_dev *dev, enum typec_cc_status *cc1,
+		      enum typec_cc_status *cc2);
+	int (*set_polarity)(struct tcpc_dev *dev,
+			    enum typec_cc_polarity polarity);
+	int (*set_vconn)(struct tcpc_dev *dev, bool on);
+	int (*set_vbus)(struct tcpc_dev *dev, bool on, bool charge);
+	int (*set_current_limit)(struct tcpc_dev *dev, u32 max_ma, u32 mv);
+	int (*set_pd_rx)(struct tcpc_dev *dev, bool on);
+	int (*set_roles)(struct tcpc_dev *dev, bool attached,
+			 enum typec_role role, enum typec_data_role data);
+	int (*start_toggling)(struct tcpc_dev *dev,
+			      enum typec_port_type port_type,
+			      enum typec_cc_status cc);
+	int (*try_role)(struct tcpc_dev *dev, int role);
+	int (*pd_transmit)(struct tcpc_dev *dev, enum tcpm_transmit_type type,
+			   const struct pd_message *msg, unsigned int negotiated_rev);
+	int (*set_bist_data)(struct tcpc_dev *dev, bool on);
+	int (*enable_frs)(struct tcpc_dev *dev, bool enable);
+	void (*frs_sourcing_vbus)(struct tcpc_dev *dev);
+	int (*enable_auto_vbus_discharge)(struct tcpc_dev *dev, bool enable);
+	int (*set_auto_vbus_discharge_threshold)(struct tcpc_dev *dev, enum typec_pwr_opmode mode,
+						 bool pps_active, u32 requested_vbus_voltage);
+	int (*check_contaminant)(struct tcpc_dev *dev);
+	bool (*is_vbus_vsafe0v)(struct tcpc_dev *dev);
+	void (*set_partner_usb_comm_capable)(struct tcpc_dev *dev, bool enable);
+	void (*poll_event)(struct tcpc_dev *dev);
+	int (*enter_low_power_mode)(struct tcpc_dev *dev, bool attached, bool pd_capable);
+};
+
+struct tcpm_port;
+
+struct tcpm_port *tcpm_port_init(struct udevice *dev, struct tcpc_dev *tcpc);
+void tcpm_poll_event(struct tcpm_port *port);
+int tcpm_get_voltage(struct tcpm_port *port);
+int tcpm_get_current(struct tcpm_port *port);
+int tcpm_get_online(struct tcpm_port *port);
+void tcpm_uninit_port(struct tcpm_port *port);
+
+int tcpm_update_sink_capabilities(struct tcpm_port *port, const u32 *pdo,
+				  unsigned int nr_pdo,
+				  unsigned int operating_snk_mw);
+
+void tcpm_vbus_change(struct tcpm_port *port);
+void tcpm_cc_change(struct tcpm_port *port);
+void tcpm_sink_frs(struct tcpm_port *port);
+void tcpm_sourcing_vbus(struct tcpm_port *port);
+void tcpm_pd_receive(struct tcpm_port *port,
+		     const struct pd_message *msg);
+void tcpm_pd_transmit_complete(struct tcpm_port *port,
+			       enum tcpm_transmit_status status);
+void tcpm_pd_hard_reset(struct tcpm_port *port);
+void tcpm_tcpc_reset(struct tcpm_port *port);
+bool tcpm_is_debouncing(struct tcpm_port *tcpm);
+bool tcpm_is_toggling(struct tcpm_port *port);
+
+#endif /* __LINUX_USB_TCPM_H */
diff --git a/include/power/power_delivery/typec.h b/include/power/power_delivery/typec.h
new file mode 100644
index 0000000000..a5e685dd6d
--- /dev/null
+++ b/include/power/power_delivery/typec.h
@@ -0,0 +1,315 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+#ifndef __LINUX_USB_TYPEC_H
+#define __LINUX_USB_TYPEC_H
+
+#include <linux/types.h>
+
+/* USB Type-C Specification releases */
+#define USB_TYPEC_REV_1_0	0x100 /* 1.0 */
+#define USB_TYPEC_REV_1_1	0x110 /* 1.1 */
+#define USB_TYPEC_REV_1_2	0x120 /* 1.2 */
+#define USB_TYPEC_REV_1_3	0x130 /* 1.3 */
+#define USB_TYPEC_REV_1_4	0x140 /* 1.4 */
+#define USB_TYPEC_REV_2_0	0x200 /* 2.0 */
+
+struct typec_partner;
+struct typec_cable;
+struct typec_plug;
+struct typec_port;
+struct typec_altmode_ops;
+
+struct fwnode_handle;
+struct device;
+
+enum typec_port_type {
+	TYPEC_PORT_SRC,
+	TYPEC_PORT_SNK,
+	TYPEC_PORT_DRP,
+};
+
+enum typec_port_data {
+	TYPEC_PORT_DFP,
+	TYPEC_PORT_UFP,
+	TYPEC_PORT_DRD,
+};
+
+enum typec_plug_type {
+	USB_PLUG_NONE,
+	USB_PLUG_TYPE_A,
+	USB_PLUG_TYPE_B,
+	USB_PLUG_TYPE_C,
+	USB_PLUG_CAPTIVE,
+};
+
+enum typec_data_role {
+	TYPEC_DEVICE,
+	TYPEC_HOST,
+};
+
+enum typec_role {
+	TYPEC_SINK,
+	TYPEC_SOURCE,
+};
+
+enum typec_pwr_opmode {
+	TYPEC_PWR_MODE_USB,
+	TYPEC_PWR_MODE_1_5A,
+	TYPEC_PWR_MODE_3_0A,
+	TYPEC_PWR_MODE_PD,
+};
+
+enum typec_accessory {
+	TYPEC_ACCESSORY_NONE,
+	TYPEC_ACCESSORY_AUDIO,
+	TYPEC_ACCESSORY_DEBUG,
+};
+
+#define TYPEC_MAX_ACCESSORY	3
+
+enum typec_orientation {
+	TYPEC_ORIENTATION_NONE,
+	TYPEC_ORIENTATION_NORMAL,
+	TYPEC_ORIENTATION_REVERSE,
+};
+
+/*
+ * struct enter_usb_data - Enter_USB Message details
+ * @eudo: Enter_USB Data Object
+ * @active_link_training: Active Cable Plug Link Training
+ *
+ * @active_link_training is a flag that should be set with uni-directional SBRX
+ * communication, and left 0 with passive cables and with bi-directional SBRX
+ * communication.
+ */
+struct enter_usb_data {
+	u32			eudo;
+	unsigned char		active_link_training:1;
+};
+
+/*
+ * struct usb_pd_identity - USB Power Delivery identity data
+ * @id_header: ID Header VDO
+ * @cert_stat: Cert Stat VDO
+ * @product: Product VDO
+ * @vdo: Product Type Specific VDOs
+ *
+ * USB power delivery Discover Identity command response data.
+ *
+ * REVISIT: This is USB Power Delivery specific information, so this structure
+ * probable belongs to USB Power Delivery header file once we have them.
+ */
+struct usb_pd_identity {
+	u32			id_header;
+	u32			cert_stat;
+	u32			product;
+	u32			vdo[3];
+};
+
+int typec_partner_set_identity(struct typec_partner *partner);
+int typec_cable_set_identity(struct typec_cable *cable);
+
+/*
+ * struct typec_altmode_desc - USB Type-C Alternate Mode Descriptor
+ * @svid: Standard or Vendor ID
+ * @mode: Index of the Mode
+ * @vdo: VDO returned by Discover Modes USB PD command
+ * @roles: Only for ports. DRP if the mode is available in both roles
+ *
+ * Description of an Alternate Mode which a connector, cable plug or partner
+ * supports.
+ */
+struct typec_altmode_desc {
+	u16			svid;
+	u8			mode;
+	u32			vdo;
+	/* Only used with ports */
+	enum typec_port_data	roles;
+};
+
+void typec_partner_set_pd_revision(struct typec_partner *partner, u16 pd_revision);
+int typec_partner_set_num_altmodes(struct typec_partner *partner, int num_altmodes);
+struct typec_altmode
+*typec_partner_register_altmode(struct typec_partner *partner,
+				const struct typec_altmode_desc *desc);
+int typec_plug_set_num_altmodes(struct typec_plug *plug, int num_altmodes);
+struct typec_altmode
+*typec_plug_register_altmode(struct typec_plug *plug,
+			     const struct typec_altmode_desc *desc);
+struct typec_altmode
+*typec_port_register_altmode(struct typec_port *port,
+			     const struct typec_altmode_desc *desc);
+
+#ifdef CONFIG_NO_GKI
+void typec_port_register_altmodes(struct typec_port *port,
+	const struct typec_altmode_ops *ops, void *drvdata,
+	struct typec_altmode **altmodes, size_t n);
+#else
+static inline void typec_port_register_altmodes(struct typec_port *port,
+	const struct typec_altmode_ops *ops, void *drvdata,
+	struct typec_altmode **altmodes, size_t n)
+{
+}
+#endif
+
+void typec_unregister_altmode(struct typec_altmode *altmode);
+
+struct typec_port *typec_altmode2port(struct typec_altmode *alt);
+
+void typec_altmode_update_active(struct typec_altmode *alt, bool active);
+
+enum typec_plug_index {
+	TYPEC_PLUG_SOP_P,
+	TYPEC_PLUG_SOP_PP,
+};
+
+/*
+ * struct typec_plug_desc - USB Type-C Cable Plug Descriptor
+ * @index: SOP Prime for the plug connected to DFP and SOP Double Prime for the
+ *         plug connected to UFP
+ *
+ * Represents USB Type-C Cable Plug.
+ */
+struct typec_plug_desc {
+	enum typec_plug_index	index;
+};
+
+/*
+ * struct typec_cable_desc - USB Type-C Cable Descriptor
+ * @type: The plug type from USB PD Cable VDO
+ * @active: Is the cable active or passive
+ * @identity: Result of Discover Identity command
+ * @pd_revision: USB Power Delivery Specification revision if supported
+ *
+ * Represents USB Type-C Cable attached to USB Type-C port.
+ */
+struct typec_cable_desc {
+	enum typec_plug_type	type;
+	unsigned int		active:1;
+	struct usb_pd_identity	*identity;
+	u16			pd_revision; /* 0300H = "3.0" */
+
+};
+
+/*
+ * struct typec_partner_desc - USB Type-C Partner Descriptor
+ * @usb_pd: USB Power Delivery support
+ * @accessory: Audio, Debug or none.
+ * @identity: Discover Identity command data
+ * @pd_revision: USB Power Delivery Specification Revision if supported
+ *
+ * Details about a partner that is attached to USB Type-C port. If @identity
+ * member exists when partner is registered, a directory named "identity" is
+ * created to sysfs for the partner device.
+ *
+ * @pd_revision is based on the setting of the "Specification Revision" field
+ * in the message header on the initial "Source Capabilities" message received
+ * from the partner, or a "Request" message received from the partner, depending
+ * on whether our port is a Sink or a Source.
+ */
+struct typec_partner_desc {
+	unsigned int		usb_pd:1;
+	enum typec_accessory	accessory;
+	struct usb_pd_identity	*identity;
+	u16			pd_revision; /* 0300H = "3.0" */
+};
+
+/**
+ * struct typec_operations - USB Type-C Port Operations
+ * @try_role: Set data role preference for DRP port
+ * @dr_set: Set Data Role
+ * @pr_set: Set Power Role
+ * @vconn_set: Source VCONN
+ * @port_type_set: Set port type
+ */
+struct typec_operations {
+	int (*try_role)(struct typec_port *port, int role);
+	int (*dr_set)(struct typec_port *port, enum typec_data_role role);
+	int (*pr_set)(struct typec_port *port, enum typec_role role);
+	int (*vconn_set)(struct typec_port *port, enum typec_role role);
+	int (*port_type_set)(struct typec_port *port,
+			     enum typec_port_type type);
+};
+
+enum usb_pd_svdm_ver {
+	SVDM_VER_1_0 = 0,
+	SVDM_VER_2_0 = 1,
+	SVDM_VER_MAX = SVDM_VER_2_0,
+};
+
+/*
+ * struct typec_capability - USB Type-C Port Capabilities
+ * @type: Supported power role of the port
+ * @data: Supported data role of the port
+ * @revision: USB Type-C Specification release. Binary coded decimal
+ * @pd_revision: USB Power Delivery Specification revision if supported
+ * @svdm_version: USB PD Structured VDM version if supported
+ * @prefer_role: Initial role preference (DRP ports).
+ * @accessory: Supported Accessory Modes
+ * @fwnode: Optional fwnode of the port
+ * @driver_data: Private pointer for driver specific info
+ * @ops: Port operations vector
+ *
+ * Static capabilities of a single USB Type-C port.
+ */
+struct typec_capability {
+	enum typec_port_type	type;
+	enum typec_port_data	data;
+	u16			revision; /* 0120H = "1.2" */
+	u16			pd_revision; /* 0300H = "3.0" */
+	enum usb_pd_svdm_ver	svdm_version;
+	int			prefer_role;
+	enum typec_accessory	accessory[TYPEC_MAX_ACCESSORY];
+	unsigned int		orientation_aware:1;
+
+	struct fwnode_handle	*fwnode;
+	void			*driver_data;
+
+	const struct typec_operations	*ops;
+};
+
+/* Specific to try_role(). Indicates the user want's to clear the preference. */
+#define TYPEC_NO_PREFERRED_ROLE	(-1)
+
+struct typec_port *typec_register_port(struct device *parent,
+				       const struct typec_capability *cap);
+void typec_unregister_port(struct typec_port *port);
+
+struct typec_partner *typec_register_partner(struct typec_port *port,
+					     struct typec_partner_desc *desc);
+void typec_unregister_partner(struct typec_partner *partner);
+
+struct typec_cable *typec_register_cable(struct typec_port *port,
+					 struct typec_cable_desc *desc);
+void typec_unregister_cable(struct typec_cable *cable);
+
+struct typec_cable *typec_cable_get(struct typec_port *port);
+void typec_cable_put(struct typec_cable *cable);
+int typec_cable_is_active(struct typec_cable *cable);
+
+struct typec_plug *typec_register_plug(struct typec_cable *cable,
+				       struct typec_plug_desc *desc);
+void typec_unregister_plug(struct typec_plug *plug);
+
+void typec_set_data_role(struct typec_port *port, enum typec_data_role role);
+void typec_set_pwr_role(struct typec_port *port, enum typec_role role);
+void typec_set_vconn_role(struct typec_port *port, enum typec_role role);
+void typec_set_pwr_opmode(struct typec_port *port, enum typec_pwr_opmode mode);
+
+int typec_set_orientation(struct typec_port *port,
+			  enum typec_orientation orientation);
+enum typec_orientation typec_get_orientation(struct typec_port *port);
+int typec_set_mode(struct typec_port *port, int mode);
+
+void *typec_get_drvdata(struct typec_port *port);
+
+int typec_find_pwr_opmode(const char *name);
+int typec_find_orientation(const char *name);
+int typec_find_port_power_role(const char *name);
+int typec_find_power_role(const char *name);
+int typec_find_port_data_role(const char *name);
+
+void typec_partner_set_svdm_version(struct typec_partner *partner,
+				    enum usb_pd_svdm_ver svdm_version);
+int typec_get_negotiated_svdm_version(struct typec_port *port);
+#endif /* __LINUX_USB_TYPEC_H */

commit 6bd5597c9804e934d69d789c2cb7aaeac2a246fd
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Dec 14 11:39:30 2021 +0800

    rockchip: rk3588: restore gpio4_d0~d5 iomux
    
    If not boot from sdmmc, restore the iomux for jtag or uart2_m1.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I6a0b1123f6c884337d243767c15fe5d252fedc77

diff --git a/arch/arm/mach-rockchip/rk3588/rk3588.c b/arch/arm/mach-rockchip/rk3588/rk3588.c
index 2405802fe9..72a7af2599 100644
--- a/arch/arm/mach-rockchip/rk3588/rk3588.c
+++ b/arch/arm/mach-rockchip/rk3588/rk3588.c
@@ -4,6 +4,8 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 #include <common.h>
+#include <mmc.h>
+#include <spl.h>
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/hardware.h>
@@ -780,6 +782,32 @@ void rockchip_stimer_init(void)
 	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 0x18);
 	writel(0x1, CONFIG_ROCKCHIP_STIMER_BASE + 0x4);
 }
+
+void spl_board_storages_fixup(struct spl_image_loader *loader)
+{
+	int ret = 0;
+
+	if (!loader)
+		return;
+
+	if (loader->boot_device == BOOT_DEVICE_MMC2) {
+		struct rk3588_bus_ioc * const bus_ioc = (void *)BUS_IOC_BASE;
+		struct rk3588_pmu1_ioc * const pmu1_ioc = (void *)PMU1_IOC_BASE;
+		struct mmc *mmc = NULL;
+		bool no_card;
+
+		ret = spl_mmc_find_device(&mmc, BOOT_DEVICE_MMC2);
+		if (ret)
+			return;
+
+		no_card = mmc_getcd(mmc) == 0;
+		if (no_card) {
+			writel(0xffff00aa, &bus_ioc->gpio4d_iomux_sel_l);
+			writel(0xffff0000, &bus_ioc->gpio4d_iomux_sel_h);
+			writel(0xffff0000, &pmu1_ioc->gpio0a_iomux_sel_h);
+		}
+	}
+}
 #endif
 
 #ifndef CONFIG_TPL_BUILD

commit a786ab7a858d5954493c33e55a491a97d94ca0cc
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Dec 14 11:36:49 2021 +0800

    spl: mmc: extern spl_mmc_find_device()
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I27dc7a5332c10f637325d8d7225e79a7018cec7d

diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c
index 56c370420d..d1be98b8ae 100644
--- a/common/spl/spl_mmc.c
+++ b/common/spl/spl_mmc.c
@@ -121,7 +121,7 @@ static int spl_mmc_get_device_index(u32 boot_device)
 	return -ENODEV;
 }
 
-static int spl_mmc_find_device(struct mmc **mmcp, u32 boot_device)
+int spl_mmc_find_device(struct mmc **mmcp, u32 boot_device)
 {
 	int err, mmc_dev;
 
diff --git a/include/spl.h b/include/spl.h
index 4238d8da27..2246ba8409 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -8,6 +8,7 @@
 #define	_SPL_H_
 
 /* Platform-specific defines */
+#include <mmc.h>
 #include <linux/compiler.h>
 #include <asm/spl.h>
 
@@ -280,6 +281,7 @@ bool spl_was_boot_source(void);
  */
 int spl_dfu_cmd(int usbctrl, char *dfu_alt_info, char *interface, char *devstr);
 
+int spl_mmc_find_device(struct mmc **mmcp, u32 boot_device);
 int spl_mmc_load_image(struct spl_image_info *spl_image,
 		       struct spl_boot_device *bootdev);
 

commit 2ba7d841b43411bd1a4bc5657938bec6f2cf9b27
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Dec 14 11:34:50 2021 +0800

    spl: add spl_board_storages_fixup()
    
    This function may be used to fix storages problem, like iomux.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ia4d7cd3374ec1f97f052b7359c7e6f616e986c99

diff --git a/common/spl/spl.c b/common/spl/spl.c
index e8cb7b76c9..4f4f4016e8 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -94,6 +94,12 @@ int __weak spl_board_prepare_for_jump(struct spl_image_info *spl_image)
 	return 0;
 }
 
+/* Fix storages, like iomux  */
+__weak void spl_board_storages_fixup(struct spl_image_loader *loader)
+{
+	/* Nothing to do! */
+}
+
 void spl_fixup_fdt(void)
 {
 #if defined(CONFIG_SPL_OF_LIBFDT) && defined(CONFIG_SYS_SPL_ARGS_ADDR)
@@ -449,6 +455,8 @@ static int boot_from_devices(struct spl_image_info *spl_image,
 			spl_image->boot_device = spl_boot_list[i];
 			return 0;
 		}
+
+		spl_board_storages_fixup(loader);
 	}
 
 	return -ENODEV;

commit 850d604a76efa1927abd80caf7d601aec5d30764
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jan 5 14:52:48 2022 +0800

    mmc: dw_mmc: call dm_gpio_free() to free the gpio device
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I9a0ab224bce7767f4d165ecc8dbf12ec8134cdbc

diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 994774072f..756ebc188f 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -804,6 +804,7 @@ static int dwmci_get_cd(struct udevice *dev)
 	}
 
 	ret = !dm_gpio_get_value(&detect);
+	dm_gpio_free(dev, &detect);
 #endif
 	return ret;
 }

commit 2f8c34bd023b185492eb39e34775115fc3891b4a
Author: xb.wang <xb.wang@rock-chips.com>
Date:   Tue Dec 28 20:19:44 2021 +0800

    lib: optee_clientApi: support oem otp key cipher api
    
    Since the memory of uboot is physical, we provide a cipher api
    based on physical memory and remove the cipher api based on
    virtual memory.
    
    Signed-off-by: xb.wang <xb.wang@rock-chips.com>
    Change-Id: Iba3faba41815e14fd748e4f793acc4e69184e84c

diff --git a/include/optee_include/OpteeClientInterface.h b/include/optee_include/OpteeClientInterface.h
index 03f56382dc..fceaf29b46 100644
--- a/include/optee_include/OpteeClientInterface.h
+++ b/include/optee_include/OpteeClientInterface.h
@@ -14,6 +14,7 @@ enum RK_OEM_OTP_KEYID {
 	RK_OEM_OTP_KEY1 = 1,
 	RK_OEM_OTP_KEY2 = 2,
 	RK_OEM_OTP_KEY3 = 3,
+	RK_OEM_OTP_KEY_FW = 10,	//keyid of fw_encryption_key
 	RK_OEM_OTP_KEYMAX
 };
 
@@ -95,9 +96,9 @@ uint32_t trusty_read_oem_ns_otp(uint32_t byte_off, uint8_t *byte_buf, uint32_t b
 uint32_t trusty_write_oem_otp_key(enum RK_OEM_OTP_KEYID key_id,
 				  uint8_t *byte_buf, uint32_t byte_len);
 uint32_t trusty_set_oem_hr_otp_read_lock(enum RK_OEM_OTP_KEYID key_id);
-uint32_t trusty_oem_otp_key_cipher(enum RK_OEM_OTP_KEYID key_id,
-				   rk_cipher_config *config,
-				   uint8_t *src, uint8_t *dest, uint32_t len);
+uint32_t trusty_oem_otp_key_cipher(enum RK_OEM_OTP_KEYID key_id, rk_cipher_config *config,
+				   uint32_t src_phys_addr, uint32_t dst_phys_addr,
+				   uint32_t len);
 uint32_t trusty_attest_dh(uint8_t *dh, uint32_t *dh_size);
 uint32_t trusty_attest_uuid(uint8_t *uuid, uint32_t *uuid_size);
 uint32_t trusty_attest_get_ca
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index 95f2b2afcb..6755b5ea34 100644
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -29,7 +29,7 @@
 #define STORAGE_CMD_WRITE_OEM_OTP_KEY		14
 #define STORAGE_CMD_SET_OEM_HR_OTP_READ_LOCK	15
 
-#define CRYPTO_SERVICE_CMD_OEM_OTP_KEY_CIPHER	0x00000001
+#define CRYPTO_SERVICE_CMD_OEM_OTP_KEY_PHYS_CIPHER	0x00000002
 
 #define RK_CRYPTO_SERVICE_UUID	{ 0x0cacdb5d, 0x4fea, 0x466c, \
 		{ 0x97, 0x16, 0x3d, 0x54, 0x16, 0x52, 0x83, 0x0f } }
@@ -58,6 +58,20 @@ static uint32_t b2hs(uint8_t *b, uint8_t *hs, uint32_t blen, uint32_t hslen)
 	return blen * 2;
 }
 
+static void crypto_flush_cacheline(uint32_t addr, uint32_t size)
+{
+	ulong alignment = CONFIG_SYS_CACHELINE_SIZE;
+	ulong aligned_input, aligned_len;
+
+	if (!addr || !size)
+		return;
+
+	/* Must flush dcache before crypto DMA fetch data region */
+	aligned_input = round_down(addr, alignment);
+	aligned_len = round_up(size + (addr - aligned_input), alignment);
+	flush_cache(aligned_input, aligned_len);
+}
+
 static uint32_t trusty_base_write_security_data(char *filename,
 						uint32_t filename_size,
 						uint8_t *data,
@@ -852,9 +866,9 @@ exit:
 	return TeecResult;
 }
 
-uint32_t trusty_oem_otp_key_cipher(enum RK_OEM_OTP_KEYID key_id,
-				   rk_cipher_config *config,
-				   uint8_t *src, uint8_t *dest, uint32_t len)
+uint32_t trusty_oem_otp_key_cipher(enum RK_OEM_OTP_KEYID key_id, rk_cipher_config *config,
+				   uint32_t src_phys_addr, uint32_t dst_phys_addr,
+				   uint32_t len)
 {
 	TEEC_Result TeecResult;
 	TEEC_Context TeecContext;
@@ -863,12 +877,15 @@ uint32_t trusty_oem_otp_key_cipher(enum RK_OEM_OTP_KEYID key_id,
 	uint32_t ErrorOrigin;
 	TEEC_UUID uuid = RK_CRYPTO_SERVICE_UUID;
 	TEEC_SharedMemory SharedMem_config = {0};
-	TEEC_SharedMemory SharedMem_inout = {0};
 
-	if (key_id >= RK_OEM_OTP_KEYMAX)
+	if (key_id != RK_OEM_OTP_KEY0 &&
+	    key_id != RK_OEM_OTP_KEY1 &&
+	    key_id != RK_OEM_OTP_KEY2 &&
+	    key_id != RK_OEM_OTP_KEY3 &&
+	    key_id != RK_OEM_OTP_KEY_FW)
 		return TEEC_ERROR_BAD_PARAMETERS;
 
-	if (!config || !src || !dest)
+	if (!config)
 		return TEEC_ERROR_BAD_PARAMETERS;
 
 	if (config->algo != RK_ALGO_AES && config->algo != RK_ALGO_SM4)
@@ -886,11 +903,21 @@ uint32_t trusty_oem_otp_key_cipher(enum RK_OEM_OTP_KEYID key_id,
 	    config->key_len != 32)
 		return TEEC_ERROR_BAD_PARAMETERS;
 
+	if (key_id == RK_OEM_OTP_KEY_FW && config->key_len != 16)
+		return TEEC_ERROR_BAD_PARAMETERS;
+
+#if defined(CONFIG_ROCKCHIP_RV1126)
+	if (config->key_len == 24)
+		return TEEC_ERROR_BAD_PARAMETERS;
+#endif
+
 	if (len % AES_BLOCK_SIZE ||
-	    len > RK_CRYPTO_MAX_DATA_LEN ||
 	    len == 0)
 		return TEEC_ERROR_BAD_PARAMETERS;
 
+	if (!src_phys_addr || !dst_phys_addr)
+		return TEEC_ERROR_BAD_PARAMETERS;
+
 	TeecResult = OpteeClientApiLibInitialize();
 	if (TeecResult != TEEC_SUCCESS)
 		return TeecResult;
@@ -914,34 +941,28 @@ uint32_t trusty_oem_otp_key_cipher(enum RK_OEM_OTP_KEYID key_id,
 	if (TeecResult != TEEC_SUCCESS)
 		goto exit;
 
-	SharedMem_inout.size = len;
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem_inout);
-	if (TeecResult != TEEC_SUCCESS)
-		goto exit;
-
 	memcpy(SharedMem_config.buffer, config, sizeof(rk_cipher_config));
-	memcpy(SharedMem_inout.buffer, src, len);
 	TeecOperation.params[0].value.a       = key_id;
 	TeecOperation.params[1].tmpref.buffer = SharedMem_config.buffer;
 	TeecOperation.params[1].tmpref.size   = SharedMem_config.size;
-	TeecOperation.params[2].tmpref.buffer = SharedMem_inout.buffer;
-	TeecOperation.params[2].tmpref.size   = SharedMem_inout.size;
+	TeecOperation.params[2].value.a       = src_phys_addr;
+	TeecOperation.params[2].value.b       = len;
+	TeecOperation.params[3].value.a       = dst_phys_addr;
 	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
 						    TEEC_MEMREF_TEMP_INPUT,
-						    TEEC_MEMREF_TEMP_INOUT,
-						    TEEC_NONE);
+						    TEEC_VALUE_INPUT,
+						    TEEC_VALUE_INPUT);
+
+	crypto_flush_cacheline(src_phys_addr, len);
+	crypto_flush_cacheline(dst_phys_addr, len);
+
 	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					CRYPTO_SERVICE_CMD_OEM_OTP_KEY_CIPHER,
+					CRYPTO_SERVICE_CMD_OEM_OTP_KEY_PHYS_CIPHER,
 					&TeecOperation,
 					&ErrorOrigin);
-	if (TeecResult != TEEC_SUCCESS)
-		goto exit;
-
-	memcpy(dest, SharedMem_inout.buffer, SharedMem_inout.size);
 
 exit:
 	TEEC_ReleaseSharedMemory(&SharedMem_config);
-	TEEC_ReleaseSharedMemory(&SharedMem_inout);
 	TEEC_CloseSession(&TeecSession);
 	TEEC_FinalizeContext(&TeecContext);
 	return TeecResult;

commit 90e849a024b7af2dfcaa70022fd3f387f9d91017
Author: xb.wang <xb.wang@rock-chips.com>
Date:   Tue Dec 28 10:48:45 2021 +0800

    lib: optee_clientApi: rename the api of oem otp key
    
    Make api have better applicability, such as for platforms
    that without OEM_HR_OTP.
    
    Signed-off-by: xb.wang <xb.wang@rock-chips.com>
    Change-Id: Ib4981bffcaeeb1afa272f3081b92b1fbbe105f1f

diff --git a/include/optee_include/OpteeClientInterface.h b/include/optee_include/OpteeClientInterface.h
index c924b7ba0f..03f56382dc 100644
--- a/include/optee_include/OpteeClientInterface.h
+++ b/include/optee_include/OpteeClientInterface.h
@@ -9,12 +9,12 @@
 
 #include <optee_include/tee_client_api.h>
 
-enum RK_OEM_HR_OTP_KEYID {
-	RK_OEM_HR_OTP_KEY0 = 0,		/* keyladder key0 */
-	RK_OEM_HR_OTP_KEY1 = 1,		/* keyladder key1 */
-	RK_OEM_HR_OTP_KEY2 = 2,		/* keyladder key2 */
-	RK_OEM_HR_OTP_KEY3 = 3,		/* keyladder key3 */
-	RK_OEM_HR_OTP_KEYMAX
+enum RK_OEM_OTP_KEYID {
+	RK_OEM_OTP_KEY0 = 0,
+	RK_OEM_OTP_KEY1 = 1,
+	RK_OEM_OTP_KEY2 = 2,
+	RK_OEM_OTP_KEY3 = 3,
+	RK_OEM_OTP_KEYMAX
 };
 
 /* Crypto mode */
@@ -92,12 +92,12 @@ uint32_t trusty_read_permanent_attributes_flag(uint8_t *attributes);
 uint32_t trusty_write_permanent_attributes_flag(uint8_t attributes);
 uint32_t trusty_write_oem_ns_otp(uint32_t byte_off, uint8_t *byte_buf, uint32_t byte_len);
 uint32_t trusty_read_oem_ns_otp(uint32_t byte_off, uint8_t *byte_buf, uint32_t byte_len);
-uint32_t trusty_write_oem_hr_otp(enum RK_OEM_HR_OTP_KEYID key_id,
-				 uint8_t *byte_buf, uint32_t byte_len);
-uint32_t trusty_set_oem_hr_otp_read_lock(enum RK_OEM_HR_OTP_KEYID key_id);
-uint32_t trusty_keylad_cipher(enum RK_OEM_HR_OTP_KEYID key_id,
-			      rk_cipher_config *config,
-			      uint8_t *src, uint8_t *dest, uint32_t len);
+uint32_t trusty_write_oem_otp_key(enum RK_OEM_OTP_KEYID key_id,
+				  uint8_t *byte_buf, uint32_t byte_len);
+uint32_t trusty_set_oem_hr_otp_read_lock(enum RK_OEM_OTP_KEYID key_id);
+uint32_t trusty_oem_otp_key_cipher(enum RK_OEM_OTP_KEYID key_id,
+				   rk_cipher_config *config,
+				   uint8_t *src, uint8_t *dest, uint32_t len);
 uint32_t trusty_attest_dh(uint8_t *dh, uint32_t *dh_size);
 uint32_t trusty_attest_uuid(uint8_t *uuid, uint32_t *uuid_size);
 uint32_t trusty_attest_get_ca
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index 4900eaf415..95f2b2afcb 100644
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -26,10 +26,10 @@
 #define STORAGE_CMD_WRITE_OEM_HUK		11
 #define STORAGE_CMD_WRITE_OEM_NS_OTP		12
 #define STORAGE_CMD_READ_OEM_NS_OTP		13
-#define STORAGE_CMD_WRITE_OEM_HR_OTP		14
+#define STORAGE_CMD_WRITE_OEM_OTP_KEY		14
 #define STORAGE_CMD_SET_OEM_HR_OTP_READ_LOCK	15
 
-#define CRYPTO_SERVICE_CMD_KEYLAD_CIPHER	0x00000001
+#define CRYPTO_SERVICE_CMD_OEM_OTP_KEY_CIPHER	0x00000001
 
 #define RK_CRYPTO_SERVICE_UUID	{ 0x0cacdb5d, 0x4fea, 0x466c, \
 		{ 0x97, 0x16, 0x3d, 0x54, 0x16, 0x52, 0x83, 0x0f } }
@@ -735,8 +735,8 @@ exit:
 	return TeecResult;
 }
 
-uint32_t trusty_write_oem_hr_otp(enum RK_OEM_HR_OTP_KEYID key_id,
-				 uint8_t *byte_buf, uint32_t byte_len)
+uint32_t trusty_write_oem_otp_key(enum RK_OEM_OTP_KEYID key_id,
+				  uint8_t *byte_buf, uint32_t byte_len)
 {
 	TEEC_Result TeecResult;
 	TEEC_Context TeecContext;
@@ -787,7 +787,7 @@ uint32_t trusty_write_oem_hr_otp(enum RK_OEM_HR_OTP_KEYID key_id,
 						    TEEC_NONE);
 
 	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					STORAGE_CMD_WRITE_OEM_HR_OTP,
+					STORAGE_CMD_WRITE_OEM_OTP_KEY,
 					&TeecOperation,
 					&ErrorOrigin);
 	if (TeecResult != TEEC_SUCCESS)
@@ -801,7 +801,7 @@ exit:
 	return TeecResult;
 }
 
-uint32_t trusty_set_oem_hr_otp_read_lock(enum RK_OEM_HR_OTP_KEYID key_id)
+uint32_t trusty_set_oem_hr_otp_read_lock(enum RK_OEM_OTP_KEYID key_id)
 {
 	TEEC_Result TeecResult;
 	TEEC_Context TeecContext;
@@ -852,9 +852,9 @@ exit:
 	return TeecResult;
 }
 
-uint32_t trusty_keylad_cipher(enum RK_OEM_HR_OTP_KEYID key_id,
-			      rk_cipher_config *config,
-			      uint8_t *src, uint8_t *dest, uint32_t len)
+uint32_t trusty_oem_otp_key_cipher(enum RK_OEM_OTP_KEYID key_id,
+				   rk_cipher_config *config,
+				   uint8_t *src, uint8_t *dest, uint32_t len)
 {
 	TEEC_Result TeecResult;
 	TEEC_Context TeecContext;
@@ -865,7 +865,7 @@ uint32_t trusty_keylad_cipher(enum RK_OEM_HR_OTP_KEYID key_id,
 	TEEC_SharedMemory SharedMem_config = {0};
 	TEEC_SharedMemory SharedMem_inout = {0};
 
-	if (key_id >= RK_OEM_HR_OTP_KEYMAX)
+	if (key_id >= RK_OEM_OTP_KEYMAX)
 		return TEEC_ERROR_BAD_PARAMETERS;
 
 	if (!config || !src || !dest)
@@ -931,7 +931,7 @@ uint32_t trusty_keylad_cipher(enum RK_OEM_HR_OTP_KEYID key_id,
 						    TEEC_MEMREF_TEMP_INOUT,
 						    TEEC_NONE);
 	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					CRYPTO_SERVICE_CMD_KEYLAD_CIPHER,
+					CRYPTO_SERVICE_CMD_OEM_OTP_KEY_CIPHER,
 					&TeecOperation,
 					&ErrorOrigin);
 	if (TeecResult != TEEC_SUCCESS)

commit 727db197f557938bb9978b71aac56416ee4edf75
Author: Guochun Huang <hero.huang@rock-chips.com>
Date:   Tue Jan 4 02:13:58 2022 +0000

    video/drm: dsi2: reduce time when sending cmd
    
    Change-Id: Iaf973a7a1dca51f76da6151c6ed797f1dfdf6b03
    Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>

diff --git a/drivers/video/drm/dw_mipi_dsi2.c b/drivers/video/drm/dw_mipi_dsi2.c
index 88e967350c..685a14a602 100644
--- a/drivers/video/drm/dw_mipi_dsi2.c
+++ b/drivers/video/drm/dw_mipi_dsi2.c
@@ -160,7 +160,7 @@
 #define DSI2_INT_FORCE_CRI		0x0468
 #define DSI2_MAX_REGISGER		DSI2_INT_FORCE_CRI
 
-#define CMD_PKT_STATUS_TIMEOUT_US	20000
+#define CMD_PKT_STATUS_TIMEOUT_US	1000
 #define MODE_STATUS_TIMEOUT_US		20000
 #define SYS_CLK				351000L
 #define PSEC_PER_SEC			1000000000000LL

commit 06bd192314bf68b5048590217982d0a2eb23ada0
Author: Guochun Huang <hero.huang@rock-chips.com>
Date:   Tue Jan 4 01:46:40 2022 +0000

    video/drm: phy: dcphy: reduce time when phy power up
    
    Change-Id: If05c651c930167a03ab17484e6cadcc00bfb0e7c
    Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>

diff --git a/drivers/video/drm/samsung_mipi_dcphy.c b/drivers/video/drm/samsung_mipi_dcphy.c
index 681b7ab727..3f1689d0d3 100644
--- a/drivers/video/drm/samsung_mipi_dcphy.c
+++ b/drivers/video/drm/samsung_mipi_dcphy.c
@@ -182,6 +182,7 @@ struct samsung_mipi_dcphy {
 	enum phy_mode mode;
 	void *base;
 	void *grf;
+	int lanes;
 	bool c_option;
 	struct reset_ctl phy_rst;
 
@@ -1432,45 +1433,32 @@ static void samsung_mipi_dcphy_pll_disable(struct samsung_mipi_dcphy *samsung)
 
 static void samsung_mipi_dphy_lane_enable(struct samsung_mipi_dcphy *samsung)
 {
-	u32 sts;
-	int ret;
-
 	phy_write(samsung, DPHY_MC_GNR_CON1, T_PHY_READY(0x2000));
-	phy_write(samsung, COMBO_MD0_GNR_CON1, T_PHY_READY(0x2000));
-	phy_write(samsung, COMBO_MD1_GNR_CON1, T_PHY_READY(0x2000));
-	phy_write(samsung, COMBO_MD2_GNR_CON1, T_PHY_READY(0x2000));
-	phy_write(samsung, DPHY_MD3_GNR_CON1, T_PHY_READY(0x2000));
-
 	phy_update_bits(samsung, DPHY_MC_GNR_CON0, PHY_ENABLE, PHY_ENABLE);
-	phy_update_bits(samsung, COMBO_MD0_GNR_CON0, PHY_ENABLE, PHY_ENABLE);
-	phy_update_bits(samsung, COMBO_MD1_GNR_CON0, PHY_ENABLE, PHY_ENABLE);
-	phy_update_bits(samsung, COMBO_MD2_GNR_CON0, PHY_ENABLE, PHY_ENABLE);
-	phy_update_bits(samsung, DPHY_MD3_GNR_CON0, PHY_ENABLE, PHY_ENABLE);
-
-	ret = readl_poll_timeout(samsung->base + DPHY_MC_GNR_CON0,
-				 sts, (sts & PHY_READY), 2000);
-	if (ret < 0)
-		dev_err(samsung->dev, "D-PHY clk lane is not locked\n");
-
-	ret = readl_poll_timeout(samsung->base + COMBO_MD0_GNR_CON0,
-				 sts, (sts & PHY_READY), 2000);
-	if (ret < 0)
-		dev_err(samsung->dev, "D-PHY Data0 lane is not locked\n");
-
-	ret = readl_poll_timeout(samsung->base + COMBO_MD1_GNR_CON0,
-				 sts, (sts & PHY_READY), 2000);
-	if (ret < 0)
-		dev_err(samsung->dev, "D-PHY Data1 lane is not locked\n");
-
-	ret = readl_poll_timeout(samsung->base + COMBO_MD2_GNR_CON0,
-				 sts, (sts & PHY_READY), 2000);
-	if (ret < 0)
-		dev_err(samsung->dev, "D-PHY Data2 lane is not locked\n");
 
-	ret = readl_poll_timeout(samsung->base + DPHY_MD3_GNR_CON0,
-				 sts, (sts & PHY_READY), 2000);
-	if (ret < 0)
-		dev_err(samsung->dev, "D-PHY Data3 lane is not locked\n");
+	switch (samsung->lanes) {
+	case 4:
+		phy_write(samsung, DPHY_MD3_GNR_CON1, T_PHY_READY(0x2000));
+		phy_update_bits(samsung, DPHY_MD3_GNR_CON0,
+				PHY_ENABLE, PHY_ENABLE);
+		//fallthrough;
+	case 3:
+		phy_write(samsung, COMBO_MD2_GNR_CON1, T_PHY_READY(0x2000));
+		phy_update_bits(samsung, COMBO_MD2_GNR_CON0,
+				PHY_ENABLE, PHY_ENABLE);
+		//fallthrough;
+	case 2:
+		phy_write(samsung, COMBO_MD1_GNR_CON1, T_PHY_READY(0x2000));
+		phy_update_bits(samsung, COMBO_MD1_GNR_CON0,
+				PHY_ENABLE, PHY_ENABLE);
+		//fallthrough;
+	case 1:
+	default:
+		phy_write(samsung, COMBO_MD0_GNR_CON1, T_PHY_READY(0x2000));
+		phy_update_bits(samsung, COMBO_MD0_GNR_CON0,
+				PHY_ENABLE, PHY_ENABLE);
+		break;
+	}
 }
 
 static void samsung_mipi_cphy_timing_init(struct samsung_mipi_dcphy *samsung)
@@ -1521,9 +1509,6 @@ static void samsung_mipi_cphy_timing_init(struct samsung_mipi_dcphy *samsung)
 
 static void samsung_mipi_cphy_lane_enable(struct samsung_mipi_dcphy *samsung)
 {
-	u32 sts;
-	int ret;
-
 	phy_write(samsung, COMBO_MD0_GNR_CON1, T_PHY_READY(0x2000));
 	phy_write(samsung, COMBO_MD1_GNR_CON1, T_PHY_READY(0x2000));
 	phy_write(samsung, COMBO_MD2_GNR_CON1, T_PHY_READY(0x2000));
@@ -1531,22 +1516,6 @@ static void samsung_mipi_cphy_lane_enable(struct samsung_mipi_dcphy *samsung)
 	phy_update_bits(samsung, COMBO_MD0_GNR_CON0, PHY_ENABLE, PHY_ENABLE);
 	phy_update_bits(samsung, COMBO_MD1_GNR_CON0, PHY_ENABLE, PHY_ENABLE);
 	phy_update_bits(samsung, COMBO_MD2_GNR_CON0, PHY_ENABLE, PHY_ENABLE);
-
-	/* 200us is needed for locking the PLL */
-	ret = readl_poll_timeout(samsung->base + COMBO_MD0_GNR_CON0,
-				 sts, (sts & PHY_READY), 2000);
-	if (ret < 0)
-		dev_err(samsung->dev, "C-PHY Data0 lane is not locked\n");
-
-	ret = readl_poll_timeout(samsung->base + COMBO_MD1_GNR_CON0,
-				 sts, (sts & PHY_READY), 2000);
-	if (ret < 0)
-		dev_err(samsung->dev, "C-PHY Data1 lane is not locked\n");
-
-	ret = readl_poll_timeout(samsung->base + COMBO_MD2_GNR_CON0,
-				 sts, (sts & PHY_READY), 2000);
-	if (ret < 0)
-		dev_err(samsung->dev, "C-PHY Data2 lane is not locked\n");
 }
 
 static void
@@ -1823,6 +1792,8 @@ static int samsung_mipi_dcphy_probe(struct udevice *dev)
 	dev->driver_data = (ulong)phy;
 	memcpy(phy, tmp_phy, sizeof(*phy));
 
+	samsung->lanes = ofnode_read_u32_default(dev->node, "samsung,lanes", 4);
+
 	samsung->base = dev_read_addr_ptr(dev);
 	if (IS_ERR(samsung->base)) {
 		dev_err(dev, "resource \"phy\" not found\n");

commit 4a99c239e09e320ca0c82a36115f6e3fc3687b3e
Author: Wyon bi <bivvy.bi@rock-chips.com>
Date:   Sat Dec 25 10:57:49 2021 +0800

    rockchip: rk3588: disable hdptxphy by default
    
    By default the hdptxphy should be disable when
    not being used to save power.
    
    Signed-off-by: Wyon bi <bivvy.bi@rock-chips.com>
    Change-Id: I155b515cf55cfd32db62a2d49fcc66cc0fc824fd

diff --git a/arch/arm/mach-rockchip/rk3588/rk3588.c b/arch/arm/mach-rockchip/rk3588/rk3588.c
index a99c5ecb5e..2405802fe9 100644
--- a/arch/arm/mach-rockchip/rk3588/rk3588.c
+++ b/arch/arm/mach-rockchip/rk3588/rk3588.c
@@ -62,6 +62,15 @@ DECLARE_GLOBAL_DATA_PTR;
 #define CRU_BASE			0xfd7c0000
 #define CRU_SOFTRST_CON77		0x0b34
 
+#define PMU1CRU_BASE			0xfd7f0000
+#define PMU1CRU_SOFTRST_CON03		0x0a0c
+
+#define HDPTXPHY0_BASE			0xfed60000
+#define HDPTXPHY_LANE_REG0301		0x0c04
+#define HDPTXPHY_LANE_REG0401		0x1004
+#define HDPTXPHY_LANE_REG0501		0x1404
+#define HDPTXPHY_LANE_REG0601		0x1804
+
 #ifdef CONFIG_ARM64
 #include <asm/armv8/mmu.h>
 
@@ -843,6 +852,14 @@ int arch_cpu_init(void)
 	writel(0x20002000, USB2PHY1_GRF_BASE + USB2PHY_GRF_CON2);
 	writel(0x20002000, USB2PHY2_GRF_BASE + USB2PHY_GRF_CON2);
 	writel(0x20002000, USB2PHY3_GRF_BASE + USB2PHY_GRF_CON2);
+
+	/* Disable hdptxphy by default */
+	writel(0x38003800, PMU1CRU_BASE + PMU1CRU_SOFTRST_CON03);
+	writel(0x80, HDPTXPHY0_BASE + HDPTXPHY_LANE_REG0301);
+	writel(0x80, HDPTXPHY0_BASE + HDPTXPHY_LANE_REG0401);
+	writel(0x80, HDPTXPHY0_BASE + HDPTXPHY_LANE_REG0501);
+	writel(0x80, HDPTXPHY0_BASE + HDPTXPHY_LANE_REG0601);
+
 #endif
 	/* Select usb otg0 phy status to 0 that make rockusb can work at high-speed */
 	writel(0x00080008, USBGRF_BASE + USB_GRF_USB3OTG0_CON1);

commit 1ca40e22ee9380e83a4a6ec1ff5abdb53d9d2cab
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Dec 30 15:02:55 2021 +0800

    clk: rockchip: rk3288: add clk_test setting
    
    Change-Id: I3c3696d96e83cfad88ad417b322f65f079f1d702
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index 2f45dcfce3..9800997ec1 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -193,6 +193,13 @@ enum {
 	CLK_HEVC_CABAC_DIV_CON_SHIFT	= 0,
 	CLK_HEVC_CABAC_DIV_CON_MASK	= 0x1f << CLK_HEVC_CABAC_DIV_CON_SHIFT,
 
+	/* MISC */
+	CLK_TEST_SRC_SEL_SHIFT		= 8,
+	CLK_TEST_SRC_SEL_MASK		= 0xf << CLK_TEST_SRC_SEL_SHIFT,
+	CLK_TEST_SRC_SEL_24M		= 8,
+	CLK_TEST_SRC_SEL_27M,
+	CLK_TEST_SRC_SEL_32k,
+
 	SOCSTS_DPLL_LOCK	= 1 << 5,
 	SOCSTS_APLL_LOCK	= 1 << 6,
 	SOCSTS_CPLL_LOCK	= 1 << 7,
@@ -1024,6 +1031,48 @@ static ulong rk3288_alive_get_clk(struct rk3288_cru *cru, uint gclk_rate)
 	parent = gclk_rate;
 	return DIV_TO_RATE(parent, div);
 }
+
+static ulong rockchip_test_get_clk(struct rk3288_cru *cru, int id)
+{
+	u32 src, val;
+
+	val = readl(&cru->cru_misc_con);
+	src = (val & CLK_TEST_SRC_SEL_MASK) >> CLK_TEST_SRC_SEL_SHIFT;
+	switch (src) {
+	case CLK_TEST_SRC_SEL_24M:
+		return 24000000;
+	case CLK_TEST_SRC_SEL_27M:
+		return 27000000;
+	case CLK_TEST_SRC_SEL_32k:
+		return 32768;
+	default:
+		return -ENOENT;
+	}
+}
+
+static ulong rockchip_test_set_clk(struct rk3288_cru *cru, int id, uint hz)
+{
+	int src = 0;
+
+	switch (hz) {
+	case 24000000:
+		src = 8;
+		break;
+	case 27000000:
+		src = 9;
+		break;
+	case 32768:
+		src = 10;
+		break;
+	default:
+		return -EINVAL;
+	}
+	rk_clrsetreg(&cru->cru_misc_con,
+		     CLK_TEST_SRC_SEL_MASK,
+		     src << CLK_TEST_SRC_SEL_SHIFT);
+
+	return rockchip_test_get_clk(cru, id);
+}
 #endif
 
 static ulong rk3288_clk_get_rate(struct clk *clk)
@@ -1086,6 +1135,10 @@ static ulong rk3288_clk_get_rate(struct clk *clk)
 	case PCLK_WDT:
 		new_rate = rk3288_alive_get_clk(priv->cru, gclk_rate);
 		break;
+	case SCLK_TESTOUT_SRC:
+	case SCLK_TESTOUT:
+		new_rate = rockchip_test_get_clk(priv->cru, clk->id);
+		break;
 #endif
 	default:
 		return -ENOENT;
@@ -1158,6 +1211,10 @@ static ulong rk3288_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_CRYPTO:
 		new_rate = rockchip_crypto_set_clk(priv->cru, rate);
 		break;
+	case SCLK_TESTOUT_SRC:
+	case SCLK_TESTOUT:
+		new_rate = rockchip_test_set_clk(priv->cru, clk->id, rate);
+		break;
 #endif
 	case SCLK_SARADC:
 		new_rate = rockchip_saradc_set_clk(priv->cru, rate);

commit 9ab8649d28d0f1d652fc9d4003fd5711c1fa2bb8
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Dec 30 15:00:58 2021 +0800

    rockchip: dts: rk3288: Resync from kernel-4.19
    
    Resync from kernel-4.19:
    (e7b6652a08486 UPSTREAM: USB-PD tcpm: bad warning+size, PPS adapters)
    
    Change-Id: Ie837a585fa4d9320e70997b0ba0faffb34dfafa4
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/include/dt-bindings/clock/rk3288-cru.h b/include/dt-bindings/clock/rk3288-cru.h
index c41745d28b..f7a5e2eb5a 100644
--- a/include/dt-bindings/clock/rk3288-cru.h
+++ b/include/dt-bindings/clock/rk3288-cru.h
@@ -77,10 +77,20 @@
 #define SCLK_PVTM_GPU		124
 #define SCLK_CRYPTO		125
 #define SCLK_MIPIDSI_24M	126
+#define SCLK_VIP_OUT		127
+#define SCLK_DDRCLK		128
+#define SCLK_I2S_SRC		129
+#define SCLK_TSPOUT		130
+#define SCLK_TSP		131
+#define SCLK_HSADC0_TSP		132
+#define SCLK_HSADC1_TSP		133
+#define SCLK_27M_TSP		134
 
 #define SCLK_MAC_PLL		150
 #define SCLK_MAC		151
 #define SCLK_MACREF_OUT		152
+#define SCLK_TESTOUT_SRC	153
+#define SCLK_TESTOUT		154
 
 #define DCLK_VOP0		190
 #define DCLK_VOP1		191
@@ -158,6 +168,13 @@
 #define PCLK_DDRUPCTL1		366
 #define PCLK_PUBL1		367
 #define PCLK_WDT		368
+#define PCLK_EFUSE256		369
+#define PCLK_EFUSE1024		370
+#define PCLK_ISP_IN		371
+#define PCLK_VIP		372
+#define PCLK_VIP_IN		373
+#define PCLK_PD_ALIVE		374
+#define PCLK_PD_PMU		375
 
 /* hclk gates */
 #define HCLK_GPS		448
@@ -191,8 +208,10 @@
 #define HCLK_VCODEC		476
 #define HCLK_CPU		477
 #define HCLK_PERI		478
+#define HCLK_USB_PERI		479
+#define HCLK_VIO		480
 
-#define CLK_NR_CLKS		(HCLK_PERI + 1)
+#define CLK_NR_CLKS		(HCLK_VIO + 1)
 
 /* soft-reset indices */
 #define SRST_CORE0		0

commit cf7d9af37e463cc0ab77b8b9501594096769bae0
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Thu Dec 30 15:34:27 2021 +0800

    drm/rockchip: display: fix get edid failed
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: I23313b269e4f1d96f94b7aa606c6fa13c1a82bd6

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 35c5585e5e..117d0c61f0 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -745,7 +745,7 @@ static int display_get_edid_mode(struct display_state *state)
 	struct drm_display_mode *mode = &conn_state->mode;
 	int bpc;
 
-	ret = edid_get_drm_mode(conn_state->edid, ret, mode, &bpc);
+	ret = edid_get_drm_mode(conn_state->edid, sizeof(conn_state->edid), mode, &bpc);
 	if (!ret) {
 		conn_state->bpc = bpc;
 		edid_print_info((void *)&conn_state->edid);

commit c006d2b7df3511ebaabbe6d5db4122078b295e03
Author: William Wu <william.wu@rock-chips.com>
Date:   Tue Jan 4 20:10:32 2022 +0800

    rockchip: rk3588: set the usb2 phy1/2/3 in iddq mode
    
    This patch sets the USB 2.0 PHY1/2/3 in IDDQ mode to
    power down all analog block to save power. And the
    PHY0 for OTG0 interface still in normal mode.
    
    Signed-off-by: William Wu <william.wu@rock-chips.com>
    Change-Id: I1878e336cb897b01c7fb99a30428c2d518172454

diff --git a/arch/arm/mach-rockchip/rk3588/rk3588.c b/arch/arm/mach-rockchip/rk3588/rk3588.c
index 5253356c69..a99c5ecb5e 100644
--- a/arch/arm/mach-rockchip/rk3588/rk3588.c
+++ b/arch/arm/mach-rockchip/rk3588/rk3588.c
@@ -33,6 +33,11 @@ DECLARE_GLOBAL_DATA_PTR;
 #define PMU_BASE			0xfd8d0000
 #define PMU_PWR_GATE_SFTCON1		0x8150
 
+#define USB2PHY1_GRF_BASE		0xfd5d4000
+#define USB2PHY2_GRF_BASE		0xfd5d8000
+#define USB2PHY3_GRF_BASE		0xfd5dc000
+#define USB2PHY_GRF_CON2		0x0008
+
 #define PMU1_IOC_BASE			0xfd5f0000
 #define PMU2_IOC_BASE			0xfd5f4000
 
@@ -829,6 +834,15 @@ int arch_cpu_init(void)
 	 * and de-assert reset them in Kernel combphy driver.
 	 */
 	writel(0x01c001c0, CRU_BASE + CRU_SOFTRST_CON77);
+
+	/*
+	 * Assert SIDDQ for USB 2.0 PHY1, PHY2 and PHY3 to
+	 * power down all analog block to save power. And
+	 * PHY0 for OTG0 interface still in normal mode.
+	 */
+	writel(0x20002000, USB2PHY1_GRF_BASE + USB2PHY_GRF_CON2);
+	writel(0x20002000, USB2PHY2_GRF_BASE + USB2PHY_GRF_CON2);
+	writel(0x20002000, USB2PHY3_GRF_BASE + USB2PHY_GRF_CON2);
 #endif
 	/* Select usb otg0 phy status to 0 that make rockusb can work at high-speed */
 	writel(0x00080008, USBGRF_BASE + USB_GRF_USB3OTG0_CON1);

commit 4367cef240ca8d008c5d67af3310814e199411ec
Author: William Wu <william.wu@rock-chips.com>
Date:   Tue Jan 4 20:06:10 2022 +0800

    phy: rockchip: inno-usb2: add phy reset and tuning for rk3588
    
    Deassert SIDDQ to power on analog block and reset phy
    firstly, and tuning the high speed Tx signal for the
    four independent USB2.0 PHYs of RK3588.
    
    1. Adjust the HS DC level voltage from design default
       4'b0110:0 to 4'b1001:+5.89%.
    2. Adjust the HS Transmitter pre-emphasis current control
       from design default 2'b00 disabled pre-emphasis to
       2'b10 2x pre-emphasis current.
    
    Signed-off-by: William Wu <william.wu@rock-chips.com>
    Change-Id: I3d74e8ee028a6f3f052a39fa4071f9ee505940a3

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index 204ff1cae1..528b93f401 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -15,6 +15,7 @@
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/cpu.h>
+#include <reset-uclass.h>
 
 #include "../usb/gadget/dwc2_udc_otg_priv.h"
 
@@ -148,6 +149,7 @@ struct rockchip_usb2phy_cfg {
  *		     primary stage.
  * @grf: General Register Files register base.
  * @usbgrf_base : USB General Register Files register base.
+ * @phy_rst: phy reset control.
  * @phy_cfg: phy register configuration, assigned by driver data.
  */
 struct rockchip_usb2phy {
@@ -156,6 +158,7 @@ struct rockchip_usb2phy {
 	struct regmap	*grf_base;
 	struct regmap	*usbgrf_base;
 	struct udevice	*vbus_supply[USB2PHY_NUM_PORTS];
+	struct reset_ctl phy_rst;
 	const struct rockchip_usb2phy_cfg	*phy_cfg;
 };
 
@@ -411,6 +414,31 @@ static struct udevice *rockchip_usb2phy_check_vbus(struct phy *phy)
 	return vbus;
 }
 
+static int rockchip_usb2phy_reset(struct rockchip_usb2phy *rphy)
+{
+	int ret;
+
+	if (rphy->phy_rst.dev) {
+		ret = reset_assert(&rphy->phy_rst);
+		if (ret < 0) {
+			pr_err("u2phy assert reset failed: %d", ret);
+			return ret;
+		}
+
+		udelay(20);
+
+		ret = reset_deassert(&rphy->phy_rst);
+		if (ret < 0) {
+			pr_err("u2phy deassert reset failed: %d", ret);
+			return ret;
+		}
+
+		udelay(100);
+	}
+
+	return 0;
+}
+
 static int rockchip_usb2phy_init(struct phy *phy)
 {
 	struct udevice *parent = phy->dev->parent;
@@ -599,6 +627,10 @@ static int rockchip_usb2phy_probe(struct udevice *dev)
 		return -EINVAL;
 	}
 
+	ret = reset_get_by_name(dev, "phy", &rphy->phy_rst);
+	if (ret)
+		dev_dbg(dev, "no u2phy reset control specified\n");
+
 	phy_cfgs =
 		(const struct rockchip_usb2phy_cfg *)dev_get_driver_data(dev);
 	if (!phy_cfgs) {
@@ -708,6 +740,34 @@ static int rk3308_usb2phy_tuning(struct rockchip_usb2phy *rphy)
 	return 0;
 }
 
+static int rk3588_usb2phy_tuning(struct rockchip_usb2phy *rphy)
+{
+	struct regmap *base = get_reg_base(rphy);
+	int ret;
+
+	/* Deassert SIDDQ to power on analog block */
+	ret = regmap_write(base, 0x0008, GENMASK(29, 29) | 0x0000);
+	if (ret)
+		return ret;
+
+	/* Do reset after exit IDDQ mode */
+	ret = rockchip_usb2phy_reset(rphy);
+	if (ret)
+		return ret;
+
+	/* HS DC Voltage Level Adjustment 4'b1001 : +5.89% */
+	ret = regmap_write(base, 0x0004, GENMASK(27, 24) | 0x0900);
+	if (ret)
+		return ret;
+
+	/* HS Transmitter Pre-Emphasis Current Control 2'b10 : 2x */
+	ret = regmap_write(base, 0x0008, GENMASK(20, 19) | 0x0010);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
 static struct phy_ops rockchip_usb2phy_ops = {
 	.init = rockchip_usb2phy_init,
 	.exit = rockchip_usb2phy_exit,
@@ -1254,6 +1314,7 @@ static const struct rockchip_usb2phy_cfg rk3588_phy_cfgs[] = {
 	{
 		.reg = 0x0000,
 		.num_ports	= 1,
+		.phy_tuning	= rk3588_usb2phy_tuning,
 		.clkout_ctl	= { 0x0000, 0, 0, 1, 0 },
 		.port_cfgs	= {
 			[USB2PHY_PORT_OTG] = {
@@ -1280,6 +1341,7 @@ static const struct rockchip_usb2phy_cfg rk3588_phy_cfgs[] = {
 	{
 		.reg = 0x4000,
 		.num_ports	= 1,
+		.phy_tuning	= rk3588_usb2phy_tuning,
 		.clkout_ctl	= { 0x0000, 0, 0, 1, 0 },
 		.port_cfgs	= {
 			/* Select suspend control from controller */
@@ -1295,6 +1357,7 @@ static const struct rockchip_usb2phy_cfg rk3588_phy_cfgs[] = {
 	{
 		.reg = 0x8000,
 		.num_ports	= 1,
+		.phy_tuning	= rk3588_usb2phy_tuning,
 		.clkout_ctl	= { 0x0000, 0, 0, 1, 0 },
 		.port_cfgs	= {
 			[USB2PHY_PORT_HOST] = {
@@ -1309,6 +1372,7 @@ static const struct rockchip_usb2phy_cfg rk3588_phy_cfgs[] = {
 	{
 		.reg = 0xc000,
 		.num_ports	= 1,
+		.phy_tuning	= rk3588_usb2phy_tuning,
 		.clkout_ctl	= { 0x0000, 0, 0, 1, 0 },
 		.port_cfgs	= {
 			[USB2PHY_PORT_HOST] = {

commit 2d08457fe5a5a391dbcfc11ae4de5cc0c6826ac1
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Dec 31 09:13:32 2021 +0800

    mtd: nand: rockchip: Support TC58NVG5H2HTAI0
    
    Change-Id: I800c63308d85bc8573b644690cd3108d9ff0f756
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/raw/rockchip_nand_spl_v9.c b/drivers/mtd/nand/raw/rockchip_nand_spl_v9.c
index 3073def1c4..bde06daad8 100644
--- a/drivers/mtd/nand/raw/rockchip_nand_spl_v9.c
+++ b/drivers/mtd/nand/raw/rockchip_nand_spl_v9.c
@@ -346,7 +346,7 @@ static int rockchip_nandc_probe(struct udevice *dev)
 	    id[1] == 0xDA || id[1] == 0xAC ||
 	    id[1] == 0xDC || id[1] == 0xA3 ||
 	    id[1] == 0xD3 || id[1] == 0x95 ||
-	    id[1] == 0x48) {
+	    id[1] == 0x48 || id[1] == 0xD7) {
 		nand_page_size = 2048;
 		nand_page_num = 64;
 		nand_block_num = 1024;
@@ -375,8 +375,11 @@ static int rockchip_nandc_probe(struct udevice *dev)
 				nand_page_size = 4096;
 				nand_block_num = 4096;
 			}
+		} else if (id[1] == 0xd7 && id[3] == 0x32) { /* TC58NVG5H2HTAI0 */
+			nand_page_size = 8192;
+			nand_page_num = 128;
+			nand_block_num = 4096;
 		}
-
 		g_rk_nand->chipnr = 1;
 		g_rk_nand->databuf = kzalloc(nand_page_size, GFP_KERNEL);
 		if (!g_rk_nand)
@@ -499,7 +502,7 @@ void board_nand_init(void)
 	    g_rk_nand->id[1] == 0xDA || g_rk_nand->id[1] == 0xAC ||
 	    g_rk_nand->id[1] == 0xDC || g_rk_nand->id[1] == 0xA3 ||
 	    g_rk_nand->id[1] == 0xD3 || g_rk_nand->id[1] == 0x95 ||
-	    g_rk_nand->id[1] == 0x48) {
+	    g_rk_nand->id[1] == 0x48 || g_rk_nand->id[1] == 0xD7) {
 		g_rk_nand->chipnr = 1;
 		return;
 	}

commit a8e46bc88881cfbdf114e8759ea33e0c5206dbb2
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Dec 31 09:10:28 2021 +0800

    mtd: nand: raw: Add TC58NVG5H2 id table
    
    Change-Id: Ibdda1ffc950d2a7b646a409d2dfefe4ad18276df
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/raw/nand_ids.c b/drivers/mtd/nand/raw/nand_ids.c
index 126610a056..209a149ae8 100644
--- a/drivers/mtd/nand/raw/nand_ids.c
+++ b/drivers/mtd/nand/raw/nand_ids.c
@@ -55,6 +55,9 @@ struct nand_flash_dev nand_flash_ids[] = {
 	{"TC58NVG5D2 32G 3.3V 8-bit",
 		{ .id = {0x98, 0xd7, 0x94, 0x32, 0x76, 0x56, 0x09, 0x00} },
 		  SZ_8K, SZ_4K, SZ_1M, 0, 8, 640, NAND_ECC_INFO(40, SZ_1K) },
+	{"TC58NVG5H2 32G 3.3V 24-bit",
+		{ .id = {0x98, 0xd7, 0xa0, 0x32, 0x76, 0x56, 0x08, 0x08} },
+		  SZ_8K, SZ_4K, SZ_1M, 0, 8, 1024, NAND_ECC_INFO(24, SZ_1K) },
 	{"TC58NVG6D2 64G 3.3V 8-bit",
 		{ .id = {0x98, 0xde, 0x94, 0x82, 0x76, 0x56, 0x04, 0x20} },
 		  SZ_8K, SZ_8K, SZ_2M, 0, 8, 640, NAND_ECC_INFO(40, SZ_1K) },

commit 2d7abb1bbefa32877d69f5ba9ec97b20db200fce
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Thu Dec 30 14:49:04 2021 +0800

    rockchip: px30: Enable mtd flash
    
    Change-Id: I7298f789fd68a9b48bff7d037980d0a2ad0021fc
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/dts/px30-u-boot.dtsi b/arch/arm/dts/px30-u-boot.dtsi
index 81ed249076..d282ce9561 100644
--- a/arch/arm/dts/px30-u-boot.dtsi
+++ b/arch/arm/dts/px30-u-boot.dtsi
@@ -102,3 +102,48 @@
 	u-boot,dm-spl;
 	status = "okay";
 };
+
+&sfc {
+	u-boot,dm-spl;
+	/delete-property/ pinctrl-names;
+	/delete-property/ pinctrl-0;
+	/delete-property/ assigned-clocks;
+	/delete-property/ assigned-clock-rates;
+	status = "okay";
+
+	#address-cells = <1>;
+	#size-cells = <0>;
+	spi_nand: flash@0 {
+		u-boot,dm-spl;
+		compatible = "spi-nand";
+		reg = <0>;
+		spi-tx-bus-width = <1>;
+		spi-rx-bus-width = <4>;
+		spi-max-frequency = <75000000>;
+	};
+
+	spi_nor: flash@1 {
+		u-boot,dm-spl;
+		compatible = "jedec,spi-nor";
+		label = "sfc_nor";
+		reg = <0>;
+		spi-tx-bus-width = <1>;
+		spi-rx-bus-width = <4>;
+		spi-max-frequency = <100000000>;
+	};
+};
+
+&nandc0 {
+	u-boot,dm-spl;
+	status = "okay";
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	nand@0 {
+		u-boot,dm-spl;
+		reg = <0>;
+		nand-ecc-mode = "hw_syndrome";
+		nand-ecc-strength = <16>;
+		nand-ecc-step-size = <1024>;
+	};
+};

commit c2a2a9e02f2d0aef983ff6c9add6d502bf4f0cf0
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Thu Dec 30 14:46:09 2021 +0800

    rockchip: px30: Support for mtd nand flash
    
    Change-Id: Ifba61951ba43684327ee56cdea72ae3e6a69935d
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index c0733bd0a1..cf39c8ffb6 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -46,6 +46,9 @@
 #define CONFIG_PREBOOT
 #endif
 
+/* Nand */
+#define CONFIG_SYS_MAX_NAND_DEVICE	1
+#define CONFIG_SYS_NAND_ONFI_DETECTION
 #ifndef CONFIG_SPL_BUILD
 
 /* usb mass storage */

commit e822fb7e3990bc0e0c5bc2fe84b1754b20c8a716
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Tue Jan 4 17:11:18 2022 +0800

    mtd: nand: rockchip: fix 70 bits bch fail issue
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: Icf6a8b45ae73fbf9c9fdca9f14da5d51f417b47a

diff --git a/drivers/mtd/nand/raw/rockchip_nand_v9.c b/drivers/mtd/nand/raw/rockchip_nand_v9.c
index 17e2926943..81ecd1f36a 100644
--- a/drivers/mtd/nand/raw/rockchip_nand_v9.c
+++ b/drivers/mtd/nand/raw/rockchip_nand_v9.c
@@ -67,6 +67,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define NANDC_V9_FL_XFER_COUNT	BIT(5)
 #define NANDC_V9_FL_ACORRECT	BIT(10)
 #define NANDC_V9_FL_XFER_READY	BIT(20)
+#define NANDC_V9_FL_ASYNC_TOG_MIX	BIT(29)
 
 /* BCHCTL */
 #define NAND_V9_BCH_MODE_S	25
@@ -253,7 +254,7 @@ static void rockchip_nand_pio_xfer_start(struct rk_nand *rknand,
 
 	reg = (dir << NANDC_V9_FL_DIR_S) | (st_buf << NANDC_V9_FL_ST_BUF_S) |
 	      NANDC_V9_FL_XFER_EN | NANDC_V9_FL_XFER_COUNT |
-	      NANDC_V9_FL_ACORRECT;
+	      NANDC_V9_FL_ACORRECT | NANDC_V9_FL_ASYNC_TOG_MIX;
 	writel(reg, rknand->regs + NANDC_REG_V9_FLCTL);
 
 	reg |= NANDC_V9_FL_XFER_START;

commit 7ad3d56782ea430c5b03fc7e28428e5ee332b3e6
Author: Neil Armstrong <narmstrong@baylibre.com>
Date:   Fri Apr 27 11:56:14 2018 +0200

    UPSTREAM: regmap: add regmap_update_bits() helper
    
    Add the regmap_update_bits() to simply the read/modify/write of registers
    in a single command. The function is taken from Linux regmap
    implementation.
    
    Change-Id: I54aa5e4482369a5f36723005b82bda9b5b7b5499
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    (cherry picked from commit 285cbcf97f2b1dcadedb6835b3e9662c7fba0fe2)

diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c
index 9d844c1090..ab1f6a4964 100644
--- a/drivers/core/regmap.c
+++ b/drivers/core/regmap.c
@@ -145,3 +145,17 @@ int regmap_write(struct regmap *map, uint offset, uint val)
 
 	return 0;
 }
+
+int regmap_update_bits(struct regmap *map, uint offset, uint mask, uint val)
+{
+	uint reg;
+	int ret;
+
+	ret = regmap_read(map, offset, &reg);
+	if (ret)
+		return ret;
+
+	reg &= ~mask;
+
+	return regmap_write(map, offset, reg | val);
+}
diff --git a/include/regmap.h b/include/regmap.h
index 4be3043fdd..f515f27e03 100644
--- a/include/regmap.h
+++ b/include/regmap.h
@@ -84,6 +84,16 @@ int regmap_read(struct regmap *map, uint offset, uint *valp);
 	__ret ?: ((cond) ? 0 : -ETIMEDOUT); \
 })
 
+/**
+ * regmap_update_bits() - Perform a read/modify/write using a mask
+ *
+ * @map:	The map returned by regmap_init_mem*()
+ * @offset:	Offset of the memory
+ * @mask:	Mask to apply to the read value
+ * @val:	Value to apply to the value to write
+ */
+int regmap_update_bits(struct regmap *map, uint offset, uint mask, uint val);
+
 /**
  * regmap_init_mem() - Set up a new register map that uses memory access
  *

commit 1f1e8631d30f1c69821da45cfca29acab5d2d1dd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 21 09:07:15 2021 +0000

    rockchip: rk3588: support aarch32 build
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ieb9f1f8000838d0de43f3a6b5060a4cecfd12fee

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index c24b950990..8530e88cee 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -411,16 +411,16 @@ endif
 
 config ROCKCHIP_RK3588
 	bool "Support Rockchip RK3588"
-	select ARM64
+	select ARM64 if !ARM64_BOOT_AARCH32
 	select ARM_SMCCC
 	select DEBUG_UART_BOARD_INIT
-	select GICV3
+	select GICV3 if !ARM64_BOOT_AARCH32 && !SUPPORT_USBPLUG
 	select ROCKCHIP_BROM_HELPER
-	select SPL
-	select SUPPORT_SPL
-	select TPL
-	select SUPPORT_TPL
+	select SUPPORT_SPL if !ARM64_BOOT_AARCH32
+	select SUPPORT_TPL if !ARM64_BOOT_AARCH32
 	select TPL_TINY_FRAMEWORK if TPL
+	imply TPL if !ARM64_BOOT_AARCH32
+	imply SPL if !ARM64_BOOT_AARCH32
 	imply TPL_SERIAL_SUPPORT
 	select DEBUG_UART_BOARD_INIT
 	help
diff --git a/arch/arm/mach-rockchip/rk3588/rk3588.c b/arch/arm/mach-rockchip/rk3588/rk3588.c
index 9158460007..5253356c69 100644
--- a/arch/arm/mach-rockchip/rk3588/rk3588.c
+++ b/arch/arm/mach-rockchip/rk3588/rk3588.c
@@ -12,8 +12,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#include <asm/armv8/mmu.h>
-
 #define FIREWALL_DDR_BASE		0xfe030000
 #define FW_DDR_MST5_REG			0x54
 #define FW_DDR_MST13_REG		0x74
@@ -59,6 +57,9 @@ DECLARE_GLOBAL_DATA_PTR;
 #define CRU_BASE			0xfd7c0000
 #define CRU_SOFTRST_CON77		0x0b34
 
+#ifdef CONFIG_ARM64
+#include <asm/armv8/mmu.h>
+
 static struct mm_region rk3588_mem_map[] = {
 	{
 		.virt = 0x0UL,
@@ -87,6 +88,7 @@ static struct mm_region rk3588_mem_map[] = {
 };
 
 struct mm_region *mem_map = rk3588_mem_map;
+#endif
 
 /* GPIO0B_IOMUX_SEL_L */
 enum {

commit 9188b54b6bfdd78c55a401d35d7ae6b5e6111f51
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 21 09:56:49 2021 +0000

    arm: bootm: parse nonboot cpu mpidr from fdt
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I0aca7766016911aa8fd7afde00e121ece5e17b16

diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index a9c053785b..53f7444b93 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -320,21 +320,50 @@ static void switch_to_el1(void)
 #endif
 
 #ifdef CONFIG_ARM64_SWITCH_TO_AARCH32
-int arm64_switch_aarch32(bootm_headers_t *images)
+static int arm64_switch_aarch32(bootm_headers_t *images)
 {
-	int es_flag;
-	int ret = 0;
-
-	images->os.arch = IH_ARCH_ARM;
+	void *fdt = images->ft_addr;
+	ulong mpidr;
+	int ret, es_flag;
+	int nodeoff, tmp;
+	int num = -1;
 
 	/* arm aarch32 SVC */
+	images->os.arch = IH_ARCH_ARM;
 	es_flag = PE_STATE(0, 0, 0, 0);
-	ret |= sip_smc_amp_cfg(AMP_PE_STATE, 0x100, es_flag);
-	ret |= sip_smc_amp_cfg(AMP_PE_STATE, 0x200, es_flag);
-	ret |= sip_smc_amp_cfg(AMP_PE_STATE, 0x300, es_flag);
-	if (ret) {
-		printf("ARM64 switch aarch32 SiP call failed, ret=%d\n", ret);
-		return 0;
+
+	nodeoff = fdt_path_offset(fdt, "/cpus");
+	if (nodeoff < 0) {
+		printf("couldn't find /cpus\n");
+		return nodeoff;
+	}
+
+	/* config all nonboot cpu state */
+	for (tmp = fdt_first_subnode(fdt, nodeoff);
+	     tmp >= 0;
+	     tmp = fdt_next_subnode(fdt, tmp)) {
+		const struct fdt_property *prop;
+		int len;
+
+		prop = fdt_get_property(fdt, tmp, "device_type", &len);
+		if (!prop)
+			continue;
+		if (len < 4)
+			continue;
+		if (strcmp(prop->data, "cpu"))
+			continue;
+		/* skip boot(first) cpu */
+		num++;
+		if (num == 0)
+			continue;
+
+		mpidr = (ulong)fdtdec_get_addr_size_auto_parent(fdt,
+					nodeoff, tmp, "reg", 0, NULL, false);
+		ret = sip_smc_amp_cfg(AMP_PE_STATE, mpidr, es_flag, 0);
+		if (ret) {
+			printf("CPU@%lx init AArch32 failed: %d\n", mpidr, ret);
+			continue;
+		}
 	}
 
 	return es_flag;

commit 990e82c153793d6a5dc933cf6c3e46a884438886
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Dec 24 01:54:55 2021 +0000

    rockchip: fit: optimse aarch32 support
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ia3e7e45d3b3db52e6414a87f7079ddd0b0c6be76

diff --git a/arch/arm/mach-rockchip/fit_args.sh b/arch/arm/mach-rockchip/fit_args.sh
index e1c5561874..3fd9299a91 100755
--- a/arch/arm/mach-rockchip/fit_args.sh
+++ b/arch/arm/mach-rockchip/fit_args.sh
@@ -108,8 +108,14 @@ fi
 # Base
 DARM_BASE=`sed -n "/CONFIG_SYS_SDRAM_BASE=/s/CONFIG_SYS_SDRAM_BASE=//p" ${srctree}/include/autoconf.mk|tr -d '\r'`
 UBOOT_LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${srctree}/include/autoconf.mk|tr -d '\r'`
+
+# ARCH
+U_ARCH="arm"
 if grep -q '^CONFIG_ARM64=y' .config ; then
 	ARCH="arm64"
+	U_ARCH="arm64"
+elif grep -q '^CONFIG_ARM64_BOOT_AARCH32=y' .config ; then
+	ARCH="arm64"
 else
 	ARCH="arm"
 fi
diff --git a/arch/arm/mach-rockchip/fit_nodes.sh b/arch/arm/mach-rockchip/fit_nodes.sh
index 538a000d7d..663ee75a22 100755
--- a/arch/arm/mach-rockchip/fit_nodes.sh
+++ b/arch/arm/mach-rockchip/fit_nodes.sh
@@ -24,7 +24,7 @@ function gen_uboot_node()
 			description = \"U-Boot\";
 			data = /incbin/(\"./u-boot-nodtb.bin${SUFFIX}\");
 			type = \"standalone\";
-			arch = \"${ARCH}\";
+			arch = \"${U_ARCH}\";
 			os = \"U-Boot\";
 			compression = \"${COMPRESSION}\";
 			load = <"${UBOOT_LOAD_ADDR}">;
@@ -53,7 +53,7 @@ function gen_fdt_node()
 			description = \"U-Boot dtb\";
 			data = /incbin/(\"./u-boot.dtb\");
 			type = \"flat_dt\";
-			arch = \"${ARCH}\";
+			arch = \"${U_ARCH}\";
 			compression = \"none\";
 			hash {
 				algo = \"sha256\";
@@ -75,7 +75,7 @@ function gen_kfdt_node()
 			description = \"${KERN_DTB}\";
 			data = /incbin/(\"${KERN_DTB}\");
 			type = \"flat_dt\";
-			arch = \"${ARCH}\";
+			arch = \"${U_ARCH}\";
 			compression = \"none\";
 			hash {
 				algo = \"sha256\";
@@ -142,7 +142,10 @@ function gen_bl32_node()
 	fi
 
 	if [ "${ARCH}" == "arm" ]; then
-		ENTRY="entry = <0x${TEE_LOAD_ADDR}>;"
+		# If not AArch32 mode
+		if ! grep  -q '^CONFIG_ARM64_BOOT_AARCH32=y' .config ; then
+			ENTRY="entry = <0x${TEE_LOAD_ADDR}>;"
+		fi
 	fi
 	echo "		optee {
 			description = \"OP-TEE\";

commit b0692428aecd4786cec04d39ebdd00f32baf5474
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Dec 24 13:19:43 2021 +0000

    arm: v7: u-boot.lds: promise 8 byte align
    
    When AArch64 bl31 uses u-boot.dtb passed from SPL, it requires
    this fdt in a 8-byte aligned address, otherwise it causes a
    unaligned access exception.
    
    If the u-boot is built with AArch32 mode, it's size maybe
    not 8-byte aligned, so does the fdt address.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Icb6797336122f23ef5e82aec731faceb3f54242d

diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds
index cc02615043..87b57bc18d 100644
--- a/arch/arm/cpu/u-boot.lds
+++ b/arch/arm/cpu/u-boot.lds
@@ -182,7 +182,7 @@ SECTIONS
 		*(.__efi_runtime_rel_stop)
 	}
 
-	. = ALIGN(4);
+	. = ALIGN(8);
 
 	.image_copy_end :
 	{
@@ -205,6 +205,7 @@ SECTIONS
 
 	.end :
 	{
+		. = ALIGN(8);
 		*(.__end)
 	}
 

commit 045d3eaac75a08e101afa64b6de8ae5341cc4330
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Dec 31 08:24:13 2021 +0000

    rockchip: param: move atags parse code to param.c
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I5a832267824debbe31a8e8dd40607fd8b30dd7f4

diff --git a/arch/arm/include/asm/arch-rockchip/param.h b/arch/arm/include/asm/arch-rockchip/param.h
index dbfb1fb27f..1357f657ed 100644
--- a/arch/arm/include/asm/arch-rockchip/param.h
+++ b/arch/arm/include/asm/arch-rockchip/param.h
@@ -48,4 +48,18 @@ struct memblock param_parse_common_resv_mem(void);
  */
 int param_parse_bootdev(char **devtype, char **devtnum);
 
+/**
+ * param_parse_pre_serial() - Parse and Init serial according to pre-loader serial.
+ *
+ * @return 0 on success, otherwise failed.
+ */
+int param_parse_pre_serial(void);
+
+/**
+ * param_parse_pubkey_fuse_programmed() - Parse and pass fuse programmed state.
+ *
+ * @return 0 on success, otherwise failed.
+ */
+int param_parse_pubkey_fuse_programmed(void);
+
 #endif
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 1414b99a8e..446b945fa8 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -342,18 +342,8 @@ static void cmdline_handle(void)
 {
 	struct blk_desc *dev_desc;
 
-#ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
-	struct tag *t;
+	param_parse_pubkey_fuse_programmed();
 
-	t = atags_get_tag(ATAG_PUB_KEY);
-	if (t) {
-		/* Pass if efuse/otp programmed */
-		if (t->u.pub_key.flag == PUBKEY_FUSE_PROGRAMMED)
-			env_update("bootargs", "fuse.programmed=1");
-		else
-			env_update("bootargs", "fuse.programmed=0");
-	}
-#endif
 	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc)
 		return;
@@ -689,31 +679,10 @@ int board_init_f_boot_flags(void)
 {
 	int boot_flags = 0;
 
-	/* pre-loader serial */
-#if defined(CONFIG_ROCKCHIP_PRELOADER_SERIAL) && \
-    defined(CONFIG_ROCKCHIP_PRELOADER_ATAGS)
-	struct tag *t;
-
-	t = atags_get_tag(ATAG_SERIAL);
-	if (t) {
-		gd->serial.using_pre_serial = 1;
-		gd->serial.enable = t->u.serial.enable;
-		gd->serial.baudrate = t->u.serial.baudrate;
-		gd->serial.addr = t->u.serial.addr;
-		gd->serial.id = t->u.serial.id;
-		gd->baudrate = CONFIG_BAUDRATE;
-		if (!t->u.serial.enable)
-			boot_flags |= GD_FLG_DISABLE_CONSOLE;
-		debug("preloader: enable=%d, addr=0x%lx, baudrate=%d, id=%d\n",
-		      gd->serial.enable, gd->serial.addr,
-		      gd->serial.baudrate, gd->serial.id);
-	} else
-#endif
-	{
-		gd->baudrate = CONFIG_BAUDRATE;
-		gd->serial.baudrate = CONFIG_BAUDRATE;
-		gd->serial.addr = CONFIG_DEBUG_UART_BASE;
-	}
+	param_parse_pre_serial();
+
+	if (!gd->serial.enable)
+		boot_flags |= GD_FLG_DISABLE_CONSOLE;
 
 	/* The highest priority to turn off (override) console */
 #if defined(CONFIG_DISABLE_CONSOLE)
diff --git a/arch/arm/mach-rockchip/param.c b/arch/arm/mach-rockchip/param.c
index 21a45705f0..9656e6dc42 100644
--- a/arch/arm/mach-rockchip/param.c
+++ b/arch/arm/mach-rockchip/param.c
@@ -344,3 +344,49 @@ struct memblock *param_parse_ddr_mem(int *out_count)
 	*out_count = count;
 	return mem;
 }
+
+int param_parse_pre_serial(void)
+{
+#if defined(CONFIG_ROCKCHIP_PRELOADER_SERIAL) && \
+    defined(CONFIG_ROCKCHIP_PRELOADER_ATAGS)
+	struct tag *t;
+
+	t = atags_get_tag(ATAG_SERIAL);
+	if (t) {
+		gd->serial.using_pre_serial = 1;
+		gd->serial.enable = t->u.serial.enable;
+		gd->serial.baudrate = t->u.serial.baudrate;
+		gd->serial.addr = t->u.serial.addr;
+		gd->serial.id = t->u.serial.id;
+		gd->baudrate = CONFIG_BAUDRATE;
+		debug("preloader: enable=%d, addr=0x%lx, baudrate=%d, id=%d\n",
+		      gd->serial.enable, gd->serial.addr,
+		      gd->serial.baudrate, gd->serial.id);
+	} else
+#endif
+	{
+		gd->baudrate = CONFIG_BAUDRATE;
+		gd->serial.baudrate = CONFIG_BAUDRATE;
+		gd->serial.addr = CONFIG_DEBUG_UART_BASE;
+	}
+
+	return 0;
+}
+
+int param_parse_pubkey_fuse_programmed(void)
+{
+#ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
+	struct tag *t;
+
+	t = atags_get_tag(ATAG_PUB_KEY);
+	if (t) {
+		/* Pass if efuse/otp programmed */
+		if (t->u.pub_key.flag == PUBKEY_FUSE_PROGRAMMED)
+			env_update("bootargs", "fuse.programmed=1");
+		else
+			env_update("bootargs", "fuse.programmed=0");
+	}
+#endif
+	return 0;
+}
+

commit a8db0a45a449d03211c2eacc167f58c15610f375
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Dec 23 06:21:34 2021 +0000

    rockchip: resource: delete node from dtbs list
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I829a35ca83c87e5230aa97cfb2afd9d098ca398d

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 1ae1503e8a..23bef1d43a 100644
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -188,6 +188,7 @@ int resource_replace_entry(const char *f_name, uint32_t base,
 		file = list_entry(node, struct resource_file, link);
 		if (!strcmp(file->name, entry->name)) {
 			list_del(&file->link);
+			list_del(&file->dtbs);
 			free(file);
 			break;
 		}

commit c853440b29b546ed59e1cd6f27fee87e0f35946f
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Thu Dec 30 15:33:22 2021 +0800

    rockchip: dts: rk3588: add u2phy dm-pre-reloc
    
    This adds "u-boot,dm-pre-reloc" property for u2phy to support
    USB download (rockusb) without Kernel DTB.
    
    Change-Id: Ia6f4ea92ee59810b1e9e55b6a284f2bd73771fd4
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/arch/arm/dts/rk3588-u-boot.dtsi b/arch/arm/dts/rk3588-u-boot.dtsi
index 28fb85c08b..b73c8a718a 100644
--- a/arch/arm/dts/rk3588-u-boot.dtsi
+++ b/arch/arm/dts/rk3588-u-boot.dtsi
@@ -178,6 +178,20 @@
 	status = "okay";
 };
 
+&usb2phy0_grf {
+	u-boot,dm-pre-reloc;
+};
+
+&u2phy0 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&u2phy0_otg {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 /* Support SPL-PINCTRL:
  * 1. ioc
  * 2. pinctrl(sdmmc)

commit 9e92aaf04b2c54e4eca98a000d3b196608f8fe0d
Author: Guochun Huang <hero.huang@rock-chips.com>
Date:   Wed Dec 22 01:21:18 2021 +0000

    video/drm: dsi2: add support dsi2 cmd mode
    
    Change-Id: I10138d32fedbb64abe90e2873f9c61d411255859
    Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>

diff --git a/drivers/video/drm/dw_mipi_dsi2.c b/drivers/video/drm/dw_mipi_dsi2.c
index 35f5c7cbf4..88e967350c 100644
--- a/drivers/video/drm/dw_mipi_dsi2.c
+++ b/drivers/video/drm/dw_mipi_dsi2.c
@@ -689,6 +689,11 @@ static int dw_mipi_dsi2_connector_init(struct display_state *state)
 	conn_state->output_if |=
 		dsi2->id ? VOP_OUTPUT_IF_MIPI1 : VOP_OUTPUT_IF_MIPI0;
 
+	if (!(dsi2->mode_flags & MIPI_DSI_MODE_VIDEO)) {
+		conn_state->output_flags |= ROCKCHIP_OUTPUT_MIPI_DS_MODE;
+		conn_state->hold_mode = true;
+	}
+
 	if (dsi2->lanes > 4) {
 		ret = uclass_get_device_by_name(UCLASS_DISPLAY,
 						"dsi@fde30000",
@@ -706,7 +711,7 @@ static int dw_mipi_dsi2_connector_init(struct display_state *state)
 		dsi2->slave->format = dsi2->format;
 		dsi2->slave->mode_flags = dsi2->mode_flags;
 		dsi2->slave->channel = dsi2->channel;
-		conn_state->output_flags =
+		conn_state->output_flags |=
 				ROCKCHIP_OUTPUT_DUAL_CHANNEL_LEFT_RIGHT_MODE;
 		if (dsi2->data_swap)
 			conn_state->output_flags |= ROCKCHIP_OUTPUT_DATA_SWAP;

commit 41874944a639d1fbf78d5ac6f8c7aa671a99a181
Author: Guochun Huang <hero.huang@rock-chips.com>
Date:   Wed Dec 22 01:25:30 2021 +0000

    drm/rockchip: vop2: add support mipi dsi cmd mode panel
    
    Change-Id: Ia46706a05132f8a20c4788ccf0d5d956c34d96ee
    Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index 28c2c825e3..b40986b50b 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -181,6 +181,14 @@ struct connector_state {
 	int dsc_enable;
 	unsigned int bpc;
 
+	/**
+	 * @hold_mode: enabled when it's:
+	 * (1) mcu hold mode
+	 * (2) mipi dsi cmd mode
+	 * (3) edp psr mode
+	 */
+	bool hold_mode;
+
 	struct base2_disp_info *disp_info; /* disp_info from baseparameter 2.0 */
 
 	u8 dsc_id;
diff --git a/drivers/video/drm/rockchip_vop2.c b/drivers/video/drm/rockchip_vop2.c
index ef3e759bc4..dd279d6562 100644
--- a/drivers/video/drm/rockchip_vop2.c
+++ b/drivers/video/drm/rockchip_vop2.c
@@ -79,6 +79,10 @@
 #define LVDS_DUAL_EN_SHIFT			0
 #define LVDS_DUAL_LEFT_RIGHT_EN_SHIFT		1
 #define LVDS_DUAL_SWAP_EN_SHIFT			2
+#define RK3568_MIPI_DUAL_EN_SHIFT		10
+#define RK3588_MIPI_DSI0_MODE_SEL_SHIFT		11
+#define RK3588_MIPI_DSI1_MODE_SEL_SHIFT		12
+
 #define RK3568_DSP_IF_POL			0x030
 #define IF_CTRL_REG_DONE_IMD_MASK		1
 #define IF_CTRL_REG_DONE_IMD_SHIFT		28
@@ -106,9 +110,6 @@
 #define RK3568_SYS_LUT_PORT_SEL			0x58
 #define GAMMA_PORT_SEL_MASK			0x3
 #define GAMMA_PORT_SEL_SHIFT			0
-#define RK3568_MIPI_DUAL_EN_SHIFT		10
-#define RK3588_MIPI_DSI0_MODE_SEL_SHIFT		11
-#define RK3588_MIPI_DSI1_MODE_SEL_SHIFT		12
 
 #define RK3568_SYS_PD_CTRL			0x034
 #define RK3568_VP0_LINE_FLAG			0x70
@@ -197,6 +198,10 @@
 #define DCLK_DIV2_MASK				0x3
 #define MIPI_DUAL_EN_SHIFT			20
 #define MIPI_DUAL_SWAP_EN_SHIFT			21
+#define EDPI_TE_EN				28
+#define EDPI_WMS_HOLD_EN			30
+#define EDPI_WMS_FS				31
+
 
 #define RK3568_VP0_COLOR_BAR_CTRL		0xC08
 #define RK3568_VP0_3D_LUT_CTRL			0xC10
@@ -1862,14 +1867,24 @@ static unsigned long rk3588_vop2_if_cfg(struct display_state *state)
 			val = 0;
 		else
 			val = 1;
+
 		if (conn_state->output_flags & ROCKCHIP_OUTPUT_MIPI_DS_MODE)
-			vop2_mask_write(vop2, RK3568_DSP_IF_EN, EN_MASK, RK3588_MIPI_DSI0_MODE_SEL_SHIFT,
-					1, false);
+			vop2_mask_write(vop2, RK3568_DSP_IF_CTRL, EN_MASK,
+					RK3588_MIPI_DSI0_MODE_SEL_SHIFT, 1, false);
+
 		vop2_mask_write(vop2, RK3568_DSP_IF_EN, EN_MASK, RK3588_MIPI0_EN_SHIFT,
 				1, false);
 		vop2_mask_write(vop2, RK3568_DSP_IF_EN, 1, RK3588_MIPI0_MUX_SHIFT, val, false);
 		vop2_mask_write(vop2, RK3568_DSP_IF_CTRL, 3, MIPI0_PIXCLK_DIV_SHIFT,
 				if_pixclk_div, false);
+
+		if (conn_state->hold_mode) {
+			vop2_mask_write(vop2, RK3568_VP0_MIPI_CTRL + vp_offset,
+					EN_MASK, EDPI_TE_EN, 1, false);
+
+			vop2_mask_write(vop2, RK3568_VP0_MIPI_CTRL + vp_offset,
+					EN_MASK, EDPI_WMS_HOLD_EN, 1, false);
+		}
 	}
 
 	if (output_if & VOP_OUTPUT_IF_MIPI1) {
@@ -1880,14 +1895,28 @@ static unsigned long rk3588_vop2_if_cfg(struct display_state *state)
 		else
 			val = 3; /*VP1*/
 		if (conn_state->output_flags & ROCKCHIP_OUTPUT_MIPI_DS_MODE)
-			vop2_mask_write(vop2, RK3568_DSP_IF_EN, EN_MASK, RK3588_MIPI_DSI1_MODE_SEL_SHIFT,
-					1, false);
+			vop2_mask_write(vop2, RK3568_DSP_IF_CTRL, EN_MASK,
+					RK3588_MIPI_DSI1_MODE_SEL_SHIFT, 1, false);
+
 		vop2_mask_write(vop2, RK3568_DSP_IF_EN, EN_MASK, RK3588_MIPI1_EN_SHIFT,
 				1, false);
 		vop2_mask_write(vop2, RK3568_DSP_IF_EN, IF_MUX_MASK, MIPI1_MUX_SHIFT,
 				val, false);
 		vop2_mask_write(vop2, RK3568_DSP_IF_CTRL, 3, MIPI1_PIXCLK_DIV_SHIFT,
 				if_pixclk_div, false);
+
+		if (conn_state->hold_mode) {
+			/* UNDO: RK3588 VP1->DSC1->DSI1 only can support soft TE mode */
+			if (vop2->version == VOP_VERSION_RK3588 && val == 3)
+				vop2_mask_write(vop2, RK3568_VP0_MIPI_CTRL + vp_offset,
+						EN_MASK, EDPI_TE_EN, 0, false);
+			else
+				vop2_mask_write(vop2, RK3568_VP0_MIPI_CTRL + vp_offset,
+						EN_MASK, EDPI_TE_EN, 1, false);
+
+			vop2_mask_write(vop2, RK3568_VP0_MIPI_CTRL + vp_offset,
+					EN_MASK, EDPI_WMS_HOLD_EN, 1, false);
+		}
 	}
 
 	if (conn_state->output_flags & ROCKCHIP_OUTPUT_DUAL_CHANNEL_LEFT_RIGHT_MODE) {

commit 75d08e7b06adcd69939509f46f39e9ffd5b27c65
Author: Guochun Huang <hero.huang@rock-chips.com>
Date:   Fri Dec 24 01:19:35 2021 +0000

    video/drm: phy: fix samsung mipi cphy configuration err
    
    Change-Id: I5ed8e59fdb56e4aad915d3956423f5be8cf4a4de
    Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>

diff --git a/drivers/video/drm/samsung_mipi_dcphy.c b/drivers/video/drm/samsung_mipi_dcphy.c
index 13fefb7934..681b7ab727 100644
--- a/drivers/video/drm/samsung_mipi_dcphy.c
+++ b/drivers/video/drm/samsung_mipi_dcphy.c
@@ -16,6 +16,7 @@
 #include <linux/iopoll.h>
 #include <linux/math64.h>
 #include <reset.h>
+#include <regmap.h>
 #include <syscon.h>
 
 #include "rockchip_phy.h"
@@ -29,6 +30,9 @@
 #define BIAS_CON0		0x0000
 #define BIAS_CON1		0x0004
 #define BIAS_CON2		0x0008
+#define BIAS_CON4		0x0010
+#define I_MUX_SEL_MASK		GENMASK(6, 5)
+#define I_MUX_SEL(x)		UPDATE(x, 6, 5)
 
 #define PLL_CON0		0x0100
 #define PLL_EN			BIT(12)
@@ -1213,7 +1217,7 @@ static inline void phy_update_bits(struct samsung_mipi_dcphy *samsung,
 static inline void grf_write(struct samsung_mipi_dcphy *samsung,
 			     u32 reg, u32 val)
 {
-	writel(val, samsung->grf + reg);
+	regmap_write(samsung->grf, reg, val);
 }
 
 static const struct samsung_mipi_dphy_timing *
@@ -1263,6 +1267,9 @@ static void samsung_mipi_dcphy_bias_block_enable(struct samsung_mipi_dcphy *sams
 	phy_write(samsung, BIAS_CON0, 0x0010);
 	phy_write(samsung, BIAS_CON1, 0x0110);
 	phy_write(samsung, BIAS_CON2, 0x3223);
+
+	if (samsung->c_option)
+		phy_update_bits(samsung, BIAS_CON4, I_MUX_SEL_MASK, I_MUX_SEL(2));
 }
 
 static void samsung_mipi_dcphy_bias_block_disable(struct samsung_mipi_dcphy *samsung)
@@ -1597,13 +1604,10 @@ static int samsung_mipi_dcphy_power_on(struct rockchip_phy *phy)
 {
 	struct samsung_mipi_dcphy *samsung = dev_get_priv(phy->dev);
 
-	switch (samsung->mode) {
-	case PHY_MODE_MIPI_DPHY:
+	if (samsung->mode == PHY_MODE_MIPI_DPHY)
 		samsung_mipi_dphy_power_on(samsung);
-		break;
-	default:
+	else
 		samsung_mipi_cphy_power_on(samsung);
-	}
 
 	return 0;
 }
@@ -1612,13 +1616,10 @@ static int samsung_mipi_dcphy_power_off(struct rockchip_phy *phy)
 {
 	struct samsung_mipi_dcphy *samsung = dev_get_priv(phy->dev);
 
-	switch (samsung->mode) {
-	case PHY_MODE_MIPI_DPHY:
+	if (samsung->mode == PHY_MODE_MIPI_DPHY)
 		samsung_mipi_dphy_lane_disable(samsung);
-		break;
-	default:
+	else
 		samsung_mipi_cphy_lane_disable(samsung);
-	}
 
 	samsung_mipi_dcphy_pll_disable(samsung);
 	samsung_mipi_dcphy_bias_block_disable(samsung);
@@ -1626,7 +1627,6 @@ static int samsung_mipi_dcphy_power_off(struct rockchip_phy *phy)
 	return 0;
 }
 
-
 static int
 samsung_mipi_dcphy_pll_ssc_modulation_calc(struct samsung_mipi_dcphy *samsung,
 					   u8 *mfr, u8 *mrr)
@@ -1760,14 +1760,14 @@ static unsigned long samsung_mipi_dcphy_set_pll(struct rockchip_phy *phy,
 						unsigned long rate)
 {
 	struct samsung_mipi_dcphy *samsung = dev_get_priv(phy->dev);
-	unsigned long fin, fout;
+	unsigned long fin = 24000000, fout;
 	u8 scaler = 0, mfr = 0, mrr = 0;
 	u16 fbdiv = 1;
 	u8 prediv = 1;
 	int dsm = 0;
 	int ret;
 
-	fin = 24000000;
+	samsung->c_option = (samsung->mode == PHY_MODE_MIPI_DPHY) ? false : true;
 	fout = samsung_mipi_dcphy_pll_round_rate(samsung, fin, rate, &prediv,
 						 &fbdiv, &dsm, &scaler);
 
@@ -1803,7 +1803,6 @@ static int samsung_mipi_dcphy_set_mode(struct rockchip_phy *phy,
 	struct samsung_mipi_dcphy *samsung = dev_get_priv(phy->dev);
 
 	samsung->mode = mode;
-	samsung->c_option = (mode == PHY_MODE_MIPI_DPHY) ? false : true;
 
 	return 0;
 }
@@ -1813,6 +1812,7 @@ static int samsung_mipi_dcphy_probe(struct udevice *dev)
 	struct samsung_mipi_dcphy *samsung = dev_get_priv(dev);
 	struct rockchip_phy *tmp_phy;
 	struct rockchip_phy *phy;
+	struct udevice *syscon;
 	int ret;
 
 	phy = calloc(1, sizeof(*phy));
@@ -1829,10 +1829,12 @@ static int samsung_mipi_dcphy_probe(struct udevice *dev)
 		return PTR_ERR(samsung->base);
 	}
 
-	samsung->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	if (IS_ERR(samsung->grf)) {
-		dev_err(dev, "resource \"grf\" not found\n");
-		return PTR_ERR(samsung->grf);
+	ret = uclass_get_device_by_phandle(UCLASS_SYSCON, dev, "rockchip,grf",
+					   &syscon);
+	if (!ret) {
+		samsung->grf = syscon_get_regmap(syscon);
+		if (!samsung->grf)
+			return -ENODEV;
 	}
 
 	ret = reset_get_by_name(dev, "phy", &samsung->phy_rst);

commit 29fa9b450837899e12684251b4081efb5d407731
Author: Guochun Huang <hero.huang@rock-chips.com>
Date:   Fri Dec 24 01:08:05 2021 +0000

    video/drm: dsi2: fix config grf field does not take effect
    
    Change-Id: I7c984a0f3555ebeb84bee70ea717467b7dac4058
    Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>

diff --git a/drivers/video/drm/dw_mipi_dsi2.c b/drivers/video/drm/dw_mipi_dsi2.c
index 938fa063a6..35f5c7cbf4 100644
--- a/drivers/video/drm/dw_mipi_dsi2.c
+++ b/drivers/video/drm/dw_mipi_dsi2.c
@@ -17,6 +17,7 @@
 #include <dm/device.h>
 #include <dm/read.h>
 #include <dm/of_access.h>
+#include <regmap.h>
 #include <syscon.h>
 #include <asm/arch-rockchip/clock.h>
 #include <linux/iopoll.h>
@@ -320,7 +321,7 @@ static void grf_field_write(struct dw_mipi_dsi2 *dsi2, enum grf_reg_fields index
 	lsb = (field >>  8) & 0xff;
 	msb = (field >>  0) & 0xff;
 
-	rk_clrsetreg(dsi2->grf + reg, GENMASK(msb, lsb), val << lsb);
+	regmap_write(dsi2->grf, reg, GENMASK(msb, lsb) << 16 | val << lsb);
 }
 
 static unsigned long dw_mipi_dsi2_get_lane_rate(struct dw_mipi_dsi2 *dsi2)
@@ -623,7 +624,6 @@ static void dw_mipi_dsi2_set_cmd_mode(struct dw_mipi_dsi2 *dsi2)
 		printf("failed to enter cmd mode\n");
 }
 
-
 static void dw_mipi_dsi2_enable(struct dw_mipi_dsi2 *dsi2)
 {
 	dw_mipi_dsi2_ipi_set(dsi2);
@@ -788,6 +788,10 @@ int mipi_dphy_get_default_config(unsigned long long hs_clk_rate,
 static void dw_mipi_dsi2_set_hs_clk(struct dw_mipi_dsi2 *dsi2, unsigned long rate)
 {
 	mipi_dphy_get_default_config(rate, &dsi2->mipi_dphy_cfg);
+
+	if (!dsi2->c_option)
+		rockchip_phy_set_mode(dsi2->dcphy.phy, PHY_MODE_MIPI_DPHY);
+
 	rate = rockchip_phy_set_pll(dsi2->dcphy.phy, rate);
 	dsi2->lane_hs_rate = rate / 1000 / 1000;
 }
@@ -829,8 +833,8 @@ static void dw_mipi_dsi2_phy_clk_mode_cfg(struct dw_mipi_dsi2 *dsi2)
 	if (dsi2->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS)
 		val |= NON_CONTINUOUS_CLK;
 
-	/* The maximum value of the escape clock frequency is 20MHz */
-	esc_clk_div = DIV_ROUND_UP(sys_clk, 20 * 2);
+	/* The Escape clock ranges from 1MHz to 20MHz. */
+	esc_clk_div = DIV_ROUND_UP(sys_clk, 10 * 2);
 	val |= PHY_LPTX_CLK_DIV(esc_clk_div);
 
 	dsi_write(dsi2, DSI2_PHY_CLK_CFG, val);
@@ -839,8 +843,7 @@ static void dw_mipi_dsi2_phy_clk_mode_cfg(struct dw_mipi_dsi2 *dsi2)
 static void dw_mipi_dsi2_phy_ratio_cfg(struct dw_mipi_dsi2 *dsi2)
 {
 	struct drm_display_mode *mode = &dsi2->mode;
-	u32 pixel_clk, ipi_clk, phy_hsclk;
-	u64 tmp;
+	u64 pixel_clk, ipi_clk, phy_hsclk, tmp;
 
 	/*
 	 * in DPHY mode, the phy_hstx_clk is exactly 1/16 the Lane high-speed
@@ -849,6 +852,7 @@ static void dw_mipi_dsi2_phy_ratio_cfg(struct dw_mipi_dsi2 *dsi2)
 	 */
 	if (dsi2->c_option)
 		phy_hsclk = DIV_ROUND_CLOSEST(dsi2->lane_hs_rate * MSEC_PER_SEC, 7);
+
 	else
 		phy_hsclk = DIV_ROUND_CLOSEST(dsi2->lane_hs_rate * MSEC_PER_SEC, 16);
 
@@ -954,9 +958,6 @@ static void mipi_dcphy_power_on(struct dw_mipi_dsi2 *dsi2)
 	if (!dsi2->dcphy.phy)
 		return;
 
-	if (!dsi2->c_option)
-		rockchip_phy_set_mode(dsi2->dcphy.phy, PHY_MODE_MIPI_DPHY);
-
 	rockchip_phy_power_on(dsi2->dcphy.phy);
 }
 
@@ -1052,12 +1053,18 @@ static int dw_mipi_dsi2_probe(struct udevice *dev)
 	const struct rockchip_connector *connector =
 		(const struct rockchip_connector *)dev_get_driver_data(dev);
 	const struct dw_mipi_dsi2_plat_data *pdata = connector->data;
-	int id;
+	struct udevice *syscon;
+	int id, ret;
 
 	dsi2->base = dev_read_addr_ptr(dev);
-	dsi2->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	if (IS_ERR(dsi2->grf))
-		return PTR_ERR(dsi2->grf);
+
+	ret = uclass_get_device_by_phandle(UCLASS_SYSCON, dev, "rockchip,grf",
+					   &syscon);
+	if (!ret) {
+		dsi2->grf = syscon_get_regmap(syscon);
+		if (!dsi2->grf)
+			return -ENODEV;
+	}
 
 	id = of_alias_get_id(ofnode_to_np(dev->node), "dsi");
 	if (id < 0)

commit 3091368d159df0c08fb8664802abd7525ffe83bf
Author: Guochun Huang <hero.huang@rock-chips.com>
Date:   Fri Dec 24 01:31:45 2021 +0000

    video/drm: rockchip_phy: rename PHY_MODE_VIDEO_MIPI to PHY_MODE_MIPI_DPHY
    
    Change-Id: Ie2d7c7dd5adedfa6a4621e0ec5d5838e6974a761
    Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>

diff --git a/drivers/video/drm/dw_mipi_dsi.c b/drivers/video/drm/dw_mipi_dsi.c
index 3d257311e6..ca2671d79a 100644
--- a/drivers/video/drm/dw_mipi_dsi.c
+++ b/drivers/video/drm/dw_mipi_dsi.c
@@ -469,7 +469,7 @@ static int mipi_dphy_power_on(struct dw_mipi_dsi *dsi)
 	mdelay(2);
 
 	if (dsi->dphy.phy) {
-		rockchip_phy_set_mode(dsi->dphy.phy, PHY_MODE_VIDEO_MIPI);
+		rockchip_phy_set_mode(dsi->dphy.phy, PHY_MODE_MIPI_DPHY);
 		rockchip_phy_power_on(dsi->dphy.phy);
 	}
 
diff --git a/drivers/video/drm/inno_video_combo_phy.c b/drivers/video/drm/inno_video_combo_phy.c
index ce2232ca05..726e75877f 100644
--- a/drivers/video/drm/inno_video_combo_phy.c
+++ b/drivers/video/drm/inno_video_combo_phy.c
@@ -698,7 +698,7 @@ static int inno_video_phy_power_on(struct rockchip_phy *phy)
 			POWER_WORK_MASK, POWER_WORK_ENABLE);
 
 	switch (inno->mode) {
-	case PHY_MODE_VIDEO_MIPI:
+	case PHY_MODE_MIPI_DPHY:
 		inno_video_phy_mipi_mode_enable(inno);
 		break;
 	case PHY_MODE_VIDEO_LVDS:
@@ -834,7 +834,7 @@ static int inno_video_phy_set_mode(struct rockchip_phy *phy,
 	struct inno_video_phy *inno = dev_get_priv(phy->dev);
 
 	switch (mode) {
-	case PHY_MODE_VIDEO_MIPI:
+	case PHY_MODE_MIPI_DPHY:
 	case PHY_MODE_VIDEO_LVDS:
 	case PHY_MODE_VIDEO_TTL:
 		inno->mode = mode;
diff --git a/drivers/video/drm/rockchip_phy.h b/drivers/video/drm/rockchip_phy.h
index de4983dd6c..b9091b7ae8 100644
--- a/drivers/video/drm/rockchip_phy.h
+++ b/drivers/video/drm/rockchip_phy.h
@@ -9,7 +9,7 @@
 
 enum phy_mode {
 	PHY_MODE_INVALID,
-	PHY_MODE_VIDEO_MIPI,
+	PHY_MODE_MIPI_DPHY,
 	PHY_MODE_VIDEO_LVDS,
 	PHY_MODE_VIDEO_TTL,
 };

commit 9e3ffb10e190c85a96f83e608d42ddebf374a148
Author: Guochun Huang <hero.huang@rock-chips.com>
Date:   Fri Dec 24 11:46:16 2021 +0800

    Revert "video/drm: rockchip_phy: simplify PHY mode type"
    
    This reverts commit 5a7ad828056a52df2c7e539d5c2fca9e9d45b8b1.
    
    Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
    Change-Id: Ibda62f6d8b9a5ff172fca92cc267b367d24ba978

diff --git a/drivers/video/drm/dw_mipi_dsi.c b/drivers/video/drm/dw_mipi_dsi.c
index ca2671d79a..3d257311e6 100644
--- a/drivers/video/drm/dw_mipi_dsi.c
+++ b/drivers/video/drm/dw_mipi_dsi.c
@@ -469,7 +469,7 @@ static int mipi_dphy_power_on(struct dw_mipi_dsi *dsi)
 	mdelay(2);
 
 	if (dsi->dphy.phy) {
-		rockchip_phy_set_mode(dsi->dphy.phy, PHY_MODE_MIPI_DPHY);
+		rockchip_phy_set_mode(dsi->dphy.phy, PHY_MODE_VIDEO_MIPI);
 		rockchip_phy_power_on(dsi->dphy.phy);
 	}
 
diff --git a/drivers/video/drm/inno_video_combo_phy.c b/drivers/video/drm/inno_video_combo_phy.c
index a7e5ab2842..ce2232ca05 100644
--- a/drivers/video/drm/inno_video_combo_phy.c
+++ b/drivers/video/drm/inno_video_combo_phy.c
@@ -698,14 +698,17 @@ static int inno_video_phy_power_on(struct rockchip_phy *phy)
 			POWER_WORK_MASK, POWER_WORK_ENABLE);
 
 	switch (inno->mode) {
-	case PHY_MODE_MIPI_DPHY:
+	case PHY_MODE_VIDEO_MIPI:
 		inno_video_phy_mipi_mode_enable(inno);
 		break;
-	case PHY_MODE_LVDS:
+	case PHY_MODE_VIDEO_LVDS:
 		inno_video_phy_lvds_mode_enable(inno);
 		break;
-	default:
+	case PHY_MODE_VIDEO_TTL:
 		inno_video_phy_ttl_mode_enable(inno);
+		break;
+	default:
+		return -EINVAL;
 	}
 
 	return 0;
@@ -831,10 +834,13 @@ static int inno_video_phy_set_mode(struct rockchip_phy *phy,
 	struct inno_video_phy *inno = dev_get_priv(phy->dev);
 
 	switch (mode) {
-	case PHY_MODE_MIPI_DPHY:
-	case PHY_MODE_LVDS:
+	case PHY_MODE_VIDEO_MIPI:
+	case PHY_MODE_VIDEO_LVDS:
+	case PHY_MODE_VIDEO_TTL:
 		inno->mode = mode;
 		break;
+	default:
+		return -EINVAL;
 	}
 
 	return 0;
diff --git a/drivers/video/drm/inno_video_phy.c b/drivers/video/drm/inno_video_phy.c
index 08e8bb8d0c..d2f63da65e 100644
--- a/drivers/video/drm/inno_video_phy.c
+++ b/drivers/video/drm/inno_video_phy.c
@@ -124,7 +124,7 @@ static int inno_video_phy_power_on(struct rockchip_phy *phy)
 	int ret;
 
 	switch (inno->mode) {
-	case PHY_MODE_LVDS:
+	case PHY_MODE_VIDEO_LVDS:
 		if (inno->dual_channel) {
 			wseq = lvds_mode_dual_channel;
 			nregs = ARRAY_SIZE(lvds_mode_dual_channel);
@@ -133,9 +133,12 @@ static int inno_video_phy_power_on(struct rockchip_phy *phy)
 			nregs = ARRAY_SIZE(lvds_mode_single_channel);
 		}
 		break;
-	default:
+	case PHY_MODE_VIDEO_TTL:
 		wseq = ttl_mode;
 		nregs = ARRAY_SIZE(ttl_mode);
+		break;
+	default:
+		return -EINVAL;
 	}
 
 	phy_multi_write(inno, wseq, nregs);
@@ -168,7 +171,14 @@ static int inno_video_phy_set_mode(struct rockchip_phy *phy,
 {
 	struct inno_video_phy *inno = dev_get_priv(phy->dev);
 
-	inno->mode = mode;
+	switch (mode) {
+	case PHY_MODE_VIDEO_LVDS:
+	case PHY_MODE_VIDEO_TTL:
+		inno->mode = mode;
+		break;
+	default:
+		return -EINVAL;
+	}
 
 	return 0;
 }
diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index 2ca13884ed..7d24403386 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -172,7 +172,7 @@ static int rockchip_lvds_connector_enable(struct display_state *state)
 	if (lvds->funcs->enable)
 		lvds->funcs->enable(lvds, pipe);
 
-	ret = rockchip_phy_set_mode(lvds->phy, PHY_MODE_LVDS);
+	ret = rockchip_phy_set_mode(lvds->phy, PHY_MODE_VIDEO_LVDS);
 	if (ret) {
 		dev_err(lvds->dev, "failed to set phy mode: %d\n", ret);
 		return ret;
diff --git a/drivers/video/drm/rockchip_phy.h b/drivers/video/drm/rockchip_phy.h
index b042103e9b..de4983dd6c 100644
--- a/drivers/video/drm/rockchip_phy.h
+++ b/drivers/video/drm/rockchip_phy.h
@@ -8,8 +8,10 @@
 #define _ROCKCHIP_PHY_H_
 
 enum phy_mode {
-	PHY_MODE_MIPI_DPHY,
-	PHY_MODE_LVDS,
+	PHY_MODE_INVALID,
+	PHY_MODE_VIDEO_MIPI,
+	PHY_MODE_VIDEO_LVDS,
+	PHY_MODE_VIDEO_TTL,
 };
 
 struct rockchip_phy;
diff --git a/drivers/video/drm/rockchip_rgb.c b/drivers/video/drm/rockchip_rgb.c
index b2e5aaa7b1..0778c8e632 100644
--- a/drivers/video/drm/rockchip_rgb.c
+++ b/drivers/video/drm/rockchip_rgb.c
@@ -74,15 +74,22 @@ static int rockchip_rgb_connector_prepare(struct display_state *state)
 	struct rockchip_rgb *rgb = state_to_rgb(state);
 	struct crtc_state *crtc_state = &state->crtc_state;
 	int pipe = crtc_state->crtc_id;
+	int ret;
 
 	pinctrl_select_state(rgb->dev, "default");
 
 	if (rgb->funcs && rgb->funcs->prepare)
 		rgb->funcs->prepare(rgb, pipe);
 
-	if (rgb->phy)
-		rockchip_phy_power_on(rgb->phy);
+	if (rgb->phy) {
+		ret = rockchip_phy_set_mode(rgb->phy, PHY_MODE_VIDEO_TTL);
+		if (ret) {
+			dev_err(rgb->dev, "failed to set phy mode: %d\n", ret);
+			return ret;
+		}
 
+		rockchip_phy_power_on(rgb->phy);
+	}
 
 	return 0;
 }

commit 859daaec043d5643a2c96651bd2893b1efde043f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 21 09:14:45 2021 +0000

    rockchip: rk3588: fix compile error on aarch32 build
    
    arch/arm/mach-rockchip/rk3588/rk3588.c: In function ‘board_debug_uart_init’:
    arch/arm/mach-rockchip/rk3588/rk3588.c:501:39: error: unused variable ‘bus_ioc’ [-Werror=unused-variable]
      static struct rk3588_bus_ioc * const bus_ioc = (void *)BUS_IOC_BASE;
                                                                               ^~~~~~~
    At top level:
    arch/arm/mach-rockchip/rk3588/rk3588.c:501:39: error: ‘bus_ioc’ defined but not used [-Werror=unused-const-variable=]
    cc1: all warnings being treated as errors
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I6ed450508fcb7be0da30393ac36c69d46163c799

diff --git a/arch/arm/mach-rockchip/rk3588/rk3588.c b/arch/arm/mach-rockchip/rk3588/rk3588.c
index c74e488ca9..9158460007 100644
--- a/arch/arm/mach-rockchip/rk3588/rk3588.c
+++ b/arch/arm/mach-rockchip/rk3588/rk3588.c
@@ -419,6 +419,8 @@ enum {
 
 void board_debug_uart_init(void)
 {
+	__maybe_unused static struct rk3588_bus_ioc * const bus_ioc = (void *)BUS_IOC_BASE;
+
 /* UART 0 */
 #if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xfd890000)
 
@@ -444,7 +446,6 @@ void board_debug_uart_init(void)
 
 #elif defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
 	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 2)
-	static struct rk3588_bus_ioc * const bus_ioc = (void *)BUS_IOC_BASE;
 
 	/* UART0_M2 Switch iomux */
 	rk_clrsetreg(&bus_ioc->gpio4a_iomux_sel_h,
@@ -458,8 +459,6 @@ void board_debug_uart_init(void)
 
 /* UART 1 */
 #elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xfeb40000)
-	static struct rk3588_bus_ioc * const bus_ioc = (void *)BUS_IOC_BASE;
-
 #if defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
 	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 0)
 
@@ -499,8 +498,6 @@ void board_debug_uart_init(void)
 
 /* UART 2 */
 #elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xfeb50000)
-	static struct rk3588_bus_ioc * const bus_ioc = (void *)BUS_IOC_BASE;
-
 #if defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
 	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 0)
 
@@ -540,8 +537,6 @@ void board_debug_uart_init(void)
 
 /* UART 3 */
 #elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xfeb60000)
-	static struct rk3588_bus_ioc * const bus_ioc = (void *)BUS_IOC_BASE;
-
 #if defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
 	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 0)
 
@@ -573,8 +568,6 @@ void board_debug_uart_init(void)
 
 /* UART 4 */
 #elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xfeb70000)
-	static struct rk3588_bus_ioc * const bus_ioc = (void *)BUS_IOC_BASE;
-
 #if defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
 	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 0)
 
@@ -606,8 +599,6 @@ void board_debug_uart_init(void)
 
 /* UART 5 */
 #elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xfeb80000)
-	static struct rk3588_bus_ioc * const bus_ioc = (void *)BUS_IOC_BASE;
-
 #if defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
 	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 0)
 
@@ -639,8 +630,6 @@ void board_debug_uart_init(void)
 
 /* UART 6 */
 #elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xfeb90000)
-	static struct rk3588_bus_ioc * const bus_ioc = (void *)BUS_IOC_BASE;
-
 #if defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
 	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 0)
 
@@ -672,8 +661,6 @@ void board_debug_uart_init(void)
 
 /* UART 7 */
 #elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xfeba0000)
-	static struct rk3588_bus_ioc * const bus_ioc = (void *)BUS_IOC_BASE;
-
 #if defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
 	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 0)
 
@@ -705,8 +692,6 @@ void board_debug_uart_init(void)
 
 /* UART 8 */
 #elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xfebb0000)
-	static struct rk3588_bus_ioc * const bus_ioc = (void *)BUS_IOC_BASE;
-
 #if defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
 	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 0)
 
@@ -729,8 +714,6 @@ void board_debug_uart_init(void)
 
 /* UART 9 */
 #elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xfebc0000)
-	static struct rk3588_bus_ioc * const bus_ioc = (void *)BUS_IOC_BASE;
-
 #if defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
 	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 0)
 

commit 68cdac84e119cb1120806f8ad962c44cbb203ceb
Author: Steven Liu <steven.liu@rock-chips.com>
Date:   Fri Dec 24 15:50:16 2021 +0800

    pwm: rockchip: make sure to get pwm clock
    
    Signed-off-by: Steven Liu <steven.liu@rock-chips.com>
    Change-Id: If5444666ff9e4eb15ffb819a52060d1f03127bf7

diff --git a/drivers/pwm/rk_pwm.c b/drivers/pwm/rk_pwm.c
index b22630be92..cb1ff80c93 100644
--- a/drivers/pwm/rk_pwm.c
+++ b/drivers/pwm/rk_pwm.c
@@ -156,7 +156,12 @@ static int rk_pwm_probe(struct udevice *dev)
 		return -EINVAL;
 	}
 
-	priv->freq = clk_get_rate(&clk);
+	ret = clk_get_rate(&clk);
+	if (ret < 0) {
+		debug("%s pwm get clock rate fail!\n", __func__);
+		return -EINVAL;
+	}
+	priv->freq = ret;
 	priv->data = (struct rockchip_pwm_data *)dev_get_driver_data(dev);
 
 	if (priv->data->supports_polarity)

commit 6fe016839513ad89cd82835bfeb720746ae62072
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Fri Dec 24 09:33:51 2021 +0800

    clk: rockchip: rk3588: add clk for clk_pmu1pwm
    
    Change-Id: I40d2f22bf5ed6c586cf087beccbbf9e7e05abde6
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3588.h b/arch/arm/include/asm/arch-rockchip/cru_rk3588.h
index f565b15e67..7659092687 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3588.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3588.h
@@ -425,6 +425,10 @@ enum {
 	CLK_PCIE_PHY2_PLL_DIV_SHIFT		= 0,
 	CLK_PCIE_PHY2_PLL_DIV_MASK		= 0x3f << CLK_PCIE_PHY2_PLL_DIV_SHIFT,
 
+	/* PMUCRU_CLK_SEL2_CON */
+	CLK_PMU1PWM_SEL_SHIFT			= 9,
+	CLK_PMU1PWM_SEL_MASK			= 3 << CLK_PMU1PWM_SEL_SHIFT,
+
 	/* PMUCRU_CLK_SEL3_CON */
 	CLK_I2C0_SEL_SHIFT			= 6,
 	CLK_I2C0_SEL_MASK			= 1 << CLK_I2C0_SEL_SHIFT,
diff --git a/drivers/clk/rockchip/clk_rk3588.c b/drivers/clk/rockchip/clk_rk3588.c
index 68472cd4c7..3d46a121c1 100644
--- a/drivers/clk/rockchip/clk_rk3588.c
+++ b/drivers/clk/rockchip/clk_rk3588.c
@@ -580,6 +580,10 @@ static ulong rk3588_pwm_get_clk(struct rk3588_clk_priv *priv, ulong clk_id)
 		con = readl(&cru->clksel_con[60]);
 		sel = (con & CLK_PWM3_SEL_MASK) >> CLK_PWM3_SEL_SHIFT;
 		break;
+	case CLK_PMU1PWM:
+		con = readl(&cru->pmuclksel_con[2]);
+		sel = (con & CLK_PMU1PWM_SEL_MASK) >> CLK_PMU1PWM_SEL_SHIFT;
+		break;
 	default:
 		return -ENOENT;
 	}
@@ -625,6 +629,11 @@ static ulong rk3588_pwm_set_clk(struct rk3588_clk_priv *priv,
 			     CLK_PWM3_SEL_MASK,
 			     src_clk << CLK_PWM3_SEL_SHIFT);
 		break;
+	case CLK_PMU1PWM:
+		rk_clrsetreg(&cru->pmuclksel_con[2],
+			     CLK_PMU1PWM_SEL_MASK,
+			     src_clk << CLK_PMU1PWM_SEL_SHIFT);
+		break;
 	default:
 		return -ENOENT;
 	}
@@ -1501,6 +1510,7 @@ static ulong rk3588_clk_get_rate(struct clk *clk)
 	case CLK_PWM1:
 	case CLK_PWM2:
 	case CLK_PWM3:
+	case CLK_PMU1PWM:
 		rate = rk3588_pwm_get_clk(priv, clk->id);
 		break;
 	case CLK_SARADC:
@@ -1641,6 +1651,7 @@ static ulong rk3588_clk_set_rate(struct clk *clk, ulong rate)
 	case CLK_PWM1:
 	case CLK_PWM2:
 	case CLK_PWM3:
+	case CLK_PMU1PWM:
 		ret = rk3588_pwm_set_clk(priv, clk->id, rate);
 		break;
 	case CLK_SARADC:

commit 9faa1b5cfa12449ba29e70f83b73939c76881e2d
Author: YouMin Chen <cym@rock-chips.com>
Date:   Wed Aug 25 10:59:57 2021 +0800

    rockchip: rk3568: add support initialize DMC FSP
    
    Add support initialize DMC frequency set point for rk3568,
    and set CONFIG_ROCKCHIP_DMC_FSP=y in defconfig if need enable it.
    
    Signed-off-by: YouMin Chen <cym@rock-chips.com>
    Change-Id: Iad1d0c4a4543a1c2d4302d0a6852da35d32eb26d

diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c
index 22b725ebab..b60f740fe4 100644
--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
@@ -5,6 +5,7 @@
  */
 #include <common.h>
 #include <clk.h>
+#include <dm.h>
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/hardware.h>
@@ -1179,3 +1180,19 @@ int rk_board_fdt_fixup(const void *blob)
 
 	return 0;
 }
+
+#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_ROCKCHIP_DMC_FSP)
+int rk_board_init(void)
+{
+	struct udevice *dev;
+	u32 ret = 0;
+
+	ret = uclass_get_device_by_driver(UCLASS_DMC, DM_GET_DRIVER(dmc_fsp), &dev);
+	if (ret) {
+		printf("dmc_fsp failed, ret=%d\n", ret);
+		return 0;
+	}
+
+	return 0;
+}
+#endif

commit d8e26cc8fb2365d0eb393f5466a00d7e2c83db4d
Author: YouMin Chen <cym@rock-chips.com>
Date:   Wed Aug 25 10:58:19 2021 +0800

    ram: rockchip: add support initialize DMC FSP
    
    Add support initialize DMC frequency set point.
    
    Signed-off-by: YouMin Chen <cym@rock-chips.com>
    Change-Id: I5f7a38dcafcd5737cdbb76b9a13e295d0ed22f0b

diff --git a/drivers/ram/rockchip/Kconfig b/drivers/ram/rockchip/Kconfig
index 7f24646dff..c37cc6e8cd 100644
--- a/drivers/ram/rockchip/Kconfig
+++ b/drivers/ram/rockchip/Kconfig
@@ -3,6 +3,13 @@ config ROCKCHIP_DMC
 	help
 	  This enable dram devfreq driver.
 
+config ROCKCHIP_DMC_FSP
+	bool "Rockchip initialize DMC FSP"
+	depends on DM_DMC && ROCKCHIP_SMCCC
+	help
+	  This enable support for Rockchip initialize frequency set point of dynamic memory
+	  interface.
+
 config ROCKCHIP_SDRAM_COMMON
 	bool "Enable rockchip sdram common driver"
 	depends on TPL_RAM || SPL_RAM
diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index 0f8ec3db8f..81dc894cf4 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -25,4 +25,5 @@ obj-$(CONFIG_ROCKCHIP_RK3036) += rockchip_sdram.o
 obj-$(CONFIG_ROCKCHIP_RK3308) += rockchip_sdram.o
 ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
 obj-$(CONFIG_ROCKCHIP_DMC) += rockchip_dmc.o
+obj-$(CONFIG_ROCKCHIP_DMC_FSP) += dmc_fsp.o
 endif
diff --git a/drivers/ram/rockchip/dmc_fsp.c b/drivers/ram/rockchip/dmc_fsp.c
new file mode 100644
index 0000000000..1e89fab068
--- /dev/null
+++ b/drivers/ram/rockchip/dmc_fsp.c
@@ -0,0 +1,244 @@
+// SPDX-License-Identifier:     GPL-2.0+
+/*
+ * (C) Copyright 2021 Rockchip Electronics Co., Ltd.
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <dm/of_access.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/rockchip_smccc.h>
+#include <asm/arch/sdram.h>
+#include <asm/arch/sdram_common.h>
+
+#define DDR2_PARAMS_PHANDLE_NAME		"ddr2_params"
+#define DDR3_PARAMS_PHANDLE_NAME		"ddr3_params"
+#define DDR4_PARAMS_PHANDLE_NAME		"ddr4_params"
+#define LPDDR2_PARAMS_PHANDLE_NAME		"lpddr2_params"
+#define LPDDR3_PARAMS_PHANDLE_NAME		"lpddr3_params"
+#define LPDDR4_PARAMS_PHANDLE_NAME		"lpddr4_params"
+#define LPDDR4X_PARAMS_PHANDLE_NAME		"lpddr4x_params"
+#define LPDDR5_PARAMS_PHANDLE_NAME		"lpddr5_params"
+
+#define DTS_PAR_OFFSET				(4096)
+#define PARAMS_INVALID_VAL			(0xff00aa99)
+
+#define PMUGRF_OS_REG(n)			(0x200 + (n) * 4)
+
+/* there is a matching relationship, modify it with caution */
+static char *dmc_fsp_params[] = {
+	"debug_print_level",
+	/* if need, add parameter after */
+};
+
+/* there is a matching relationship, modify it with caution */
+static char *ddr_params_v1[] = {
+	/* version information V1.00 */
+	"version",
+	"expanded_version",
+	"reserved",
+	/* freq info, freq_0 is final frequency, unit: MHz */
+	"freq_0",
+	"freq_1",
+	"freq_2",
+	"freq_3",
+	"freq_4",
+	"freq_5",
+	/* power save setting */
+	"pd_idle",
+	"sr_idle",
+	"sr_mc_gate_idle",
+	"srpd_lite_idle",
+	"standby_idle",
+	"pd_dis_freq",
+	"sr_dis_freq",
+	"dram_dll_dis_freq",
+	"phy_dll_dis_freq",
+	/* drv when odt on */
+	"phy_dq_drv_odten",
+	"phy_ca_drv_odten",
+	"phy_clk_drv_odten",
+	"dram_dq_drv_odten",
+	/* drv when odt off */
+	"phy_dq_drv_odtoff",
+	"phy_ca_drv_odtoff",
+	"phy_clk_drv_odtoff",
+	"dram_dq_drv_odtoff",
+	/* odt info */
+	"dram_odt",
+	"phy_odt",
+	"phy_odt_puup_en",
+	"phy_odt_pudn_en",
+	/* odt enable freq */
+	"dram_dq_odt_en_freq",
+	"phy_odt_en_freq",
+	/* slew rate when odt enable */
+	"phy_dq_sr_odten",
+	"phy_ca_sr_odten",
+	"phy_clk_sr_odten",
+	/* slew rate when odt disable */
+	"phy_dq_sr_odtoff",
+	"phy_ca_sr_odtoff",
+	"phy_clk_sr_odtoff",
+	/* ssmod setting*/
+	"ssmod_downspread",
+	"ssmod_div",
+	"ssmod_spread",
+	/* 2T mode */
+	"mode_2t",
+	/* speed bin */
+	"speed_bin",
+	/* dram extended temperature support */
+	"dram_ext_temp",
+	/* byte map */
+	"byte_map",
+	/* dq map */
+	"dq_map_cs0_dq_l",
+	"dq_map_cs0_dq_h",
+	"dq_map_cs1_dq_l",
+	"dq_map_cs1_dq_h",
+	/* for LPDDR4 and LPDDR4X */
+	/* odt info */
+	"lp4_ca_odt",
+	"lp4_drv_pu_cal_odten",
+	"lp4_drv_pu_cal_odtoff",
+	"phy_lp4_drv_pulldown_en_odten",
+	"phy_lp4_drv_pulldown_en_odtoff",
+	/* odt enable freq */
+	"lp4_ca_odt_en_freq",
+	/* lp4 cs drv info and ca odt info */
+	"phy_lp4_cs_drv_odten",
+	"phy_lp4_cs_drv_odtoff",
+	"lp4_odte_ck_en",
+	"lp4_odte_cs_en",
+	"lp4_odtd_ca_en",
+	/* lp4 vref info when odt enable */
+	"phy_lp4_dq_vref_odten",
+	"lp4_dq_vref_odten",
+	"lp4_ca_vref_odten",
+	/* lp4 vref info when odt disable */
+	"phy_lp4_dq_vref_odtoff",
+	"lp4_dq_vref_odtoff",
+	"lp4_ca_vref_odtoff",
+	/* if need, add parameter after and change the minor version. */
+};
+
+static int get_atf_version(void)
+{
+	struct arm_smccc_res res;
+
+	res = sip_smc_dram(0, 0, ROCKCHIP_SIP_CONFIG_DRAM_GET_VERSION);
+
+	if (res.a0)
+		return -ENOMEM;
+	else
+		return res.a1;
+}
+
+static int dmc_fsp_probe(struct udevice *dev)
+{
+	struct device_node *np_params;
+	struct arm_smccc_res res;
+	void *pmugrf_base;
+	int *p = NULL;
+	char *phandle_name = NULL;
+	char **ddr_params;
+	int ddr_params_version;
+	u32 dram_type, os_reg2_val, os_reg3_val;
+	u32 i = 0, count = 0, size = 0;
+	ulong atf_version_limit;
+
+	atf_version_limit = dev_get_driver_data(dev);
+	if (get_atf_version() < atf_version_limit) {
+		printf("%s: trusted firmware need to update or is invalid!\n", __func__);
+		printf("%s: current ATF version 0x%x, required version 0x%lx\n",
+		       __func__, get_atf_version(), atf_version_limit);
+		return 0;
+	}
+
+	pmugrf_base = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
+	os_reg2_val = readl(pmugrf_base + PMUGRF_OS_REG(2));
+	os_reg3_val = readl(pmugrf_base + PMUGRF_OS_REG(3));
+	dram_type = SYS_REG_DEC_DDRTYPE_V3(os_reg2_val, os_reg3_val);
+
+	if (dram_type == DDR2)
+		phandle_name = DDR2_PARAMS_PHANDLE_NAME;
+	else if (dram_type == DDR3)
+		phandle_name = DDR3_PARAMS_PHANDLE_NAME;
+	else if (dram_type == DDR4)
+		phandle_name = DDR4_PARAMS_PHANDLE_NAME;
+	else if (dram_type == LPDDR2)
+		phandle_name = LPDDR2_PARAMS_PHANDLE_NAME;
+	else if (dram_type == LPDDR3)
+		phandle_name = LPDDR3_PARAMS_PHANDLE_NAME;
+	else if (dram_type == LPDDR4)
+		phandle_name = LPDDR4_PARAMS_PHANDLE_NAME;
+	else if (dram_type == LPDDR4X)
+		phandle_name = LPDDR4X_PARAMS_PHANDLE_NAME;
+	else if (dram_type == LPDDR5)
+		phandle_name = LPDDR5_PARAMS_PHANDLE_NAME;
+	else
+		printf("%s: dram_type unsupported\n", __func__);
+
+	np_params = of_parse_phandle(ofnode_to_np(dev_ofnode(dev)), phandle_name, 0);
+	if (!np_params) {
+		printf("%s: of_parse_phandle %s error!\n", __func__, phandle_name);
+		return -EINVAL;
+	}
+
+	ddr_params_version = ofnode_read_u32_default(np_to_ofnode(np_params), "version", -1);
+	if (ddr_params_version < 0) {
+		printf("%s: get ddr_params_version error\n", __func__);
+		return -EINVAL;
+	}
+
+	if ((ddr_params_version & 0xff00) == 0x100 &&
+	    (ddr_params_version & 0xffff) <= 0x100) {
+		count = ARRAY_SIZE(ddr_params_v1);
+		ddr_params = ddr_params_v1;
+	} else {
+		printf("%s: ddr_params_version=0x%x unsupported\n", __func__, ddr_params_version);
+		return -EINVAL;
+	}
+
+	size = count * 4;
+	res = sip_smc_request_share_mem(DIV_ROUND_UP(size, 4096) + 1, SHARE_PAGE_TYPE_DDRFSP);
+	if (res.a0 != 0) {
+		printf("%s:no share memory for init\n", __func__);
+		return -ENOMEM;
+	}
+
+	/* fill share memory and pass to the atf */
+	p = (int *)(res.a1);
+	for (i = 0; i < ARRAY_SIZE(dmc_fsp_params); i++)
+		p[i] = dev_read_u32_default(dev, dmc_fsp_params[i], PARAMS_INVALID_VAL);
+
+	p = (int *)(res.a1 + DTS_PAR_OFFSET / 4);
+	for (i = 0; i < count; i++) {
+		p[i] = ofnode_read_u32_default(np_to_ofnode(np_params), ddr_params[i],
+					       PARAMS_INVALID_VAL);
+	}
+
+	flush_cache((unsigned long)(res.a1), (DIV_ROUND_UP(size, 4096) + 1) * 0x1000);
+	res = sip_smc_dram(SHARE_PAGE_TYPE_DDRFSP, 0, ROCKCHIP_SIP_CONFIG_DRAM_FSP_INIT);
+	if (res.a0) {
+		printf("%s: rockchip_sip_config_dram_fsp_init error:%lx\n", __func__, res.a0);
+		return -ENOMEM;
+	}
+
+	return 0;
+}
+
+static const struct udevice_id rockchip_dmc_fsp_ids[] = {
+	{ .compatible = "rockchip,rk3568-dmc-fsp", .data = 0x102},
+	{ }
+};
+
+U_BOOT_DRIVER(dmc_fsp) = {
+	.name = "rockchip_dmc_fsp",
+	.id = UCLASS_DMC,
+	.probe = dmc_fsp_probe,
+	.of_match = rockchip_dmc_fsp_ids,
+};

commit 7c9f74b31ea5f7bedd1786499a2bb5e2f942a634
Author: YouMin Chen <cym@rock-chips.com>
Date:   Wed Oct 13 17:21:38 2021 +0800

    rockchip: smccc: add support ROCKCHIP_SIP_CONFIG_DRAM_FSP_INIT
    
    Signed-off-by: YouMin Chen <cym@rock-chips.com>
    Change-Id: I826f88fcf2dc3caf1af1cffcb93bbfdeb6e5e16d

diff --git a/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h b/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
index e64fe64047..3d2d422dd7 100644
--- a/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
+++ b/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
@@ -38,6 +38,13 @@
 #define ROCKCHIP_SIP_CONFIG_DRAM_CLR_IRQ	0x06
 #define ROCKCHIP_SIP_CONFIG_DRAM_SET_PARAM	0x07
 #define ROCKCHIP_SIP_CONFIG_DRAM_GET_VERSION	0x08
+#define ROCKCHIP_SIP_CONFIG_DRAM_POST_SET_RATE	0x09
+#define ROCKCHIP_SIP_CONFIG_DRAM_SET_NOC_RL	0x0a
+#define ROCKCHIP_SIP_CONFIG_DRAM_DEBUG		0x0b
+#define ROCKCHIP_SIP_CONFIG_DRAM_MCU_START	0x0c
+#define ROCKCHIP_SIP_CONFIG_DRAM_ECC		0x0d
+#define ROCKCHIP_SIP_CONFIG_DRAM_GET_FREQ_INFO	0x0e
+#define ROCKCHIP_SIP_CONFIG_DRAM_FSP_INIT	0x0f
 
 /* Rockchip Sip version */
 #define SIP_IMPLEMENT_V1                (1)
@@ -67,6 +74,10 @@ typedef enum {
 	SHARE_PAGE_TYPE_INVALID = 0,
 	SHARE_PAGE_TYPE_UARTDBG,
 	SHARE_PAGE_TYPE_DDR,
+	SHARE_PAGE_TYPE_DDRDBG,
+	SHARE_PAGE_TYPE_DDRECC,
+	SHARE_PAGE_TYPE_DDRFSP,
+	SHARE_PAGE_TYPE_LAST_LOG,
 	SHARE_PAGE_TYPE_MAX,
 } share_page_type_t;
 

commit a0d3d9719ce9d6285155fc07f6fbb153627d127b
Author: YouMin Chen <cym@rock-chips.com>
Date:   Thu Oct 14 14:27:10 2021 +0800

    dm: add dmc uclass for Dynamic Memory Interface drivers
    
    Signed-off-by: YouMin Chen <cym@rock-chips.com>
    Change-Id: I2e48b4dbbd087e2a73341a0152075e76756271e9

diff --git a/drivers/ram/Kconfig b/drivers/ram/Kconfig
index e54235cf5e..60b50de313 100644
--- a/drivers/ram/Kconfig
+++ b/drivers/ram/Kconfig
@@ -48,4 +48,10 @@ config RAMDISK_RO
 	help
 	  This enables the read only ramdisk support.
 
+config DM_DMC
+	bool "Enable Driver Model for DMC drivers"
+	depends on DM
+	help
+	  This config enables the driver-model DMC support.
+
 source "drivers/ram/rockchip/Kconfig"
diff --git a/drivers/ram/Makefile b/drivers/ram/Makefile
index 287cb08be9..39b9cadc35 100644
--- a/drivers/ram/Makefile
+++ b/drivers/ram/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_ARCH_BMIPS) += bmips_ram.o
 obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
 
 ifndef CONFIG_SPL_BUILD
+obj-$(CONFIG_DM_DMC) += dmc-uclass.o
 obj-$(CONFIG_DM_RAMDISK) += ramdisk-uclass.o
 obj-$(CONFIG_RAMDISK_RO) += ramdisk_ro.o
 endif
diff --git a/drivers/ram/dmc-uclass.c b/drivers/ram/dmc-uclass.c
new file mode 100644
index 0000000000..73095c2be7
--- /dev/null
+++ b/drivers/ram/dmc-uclass.c
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier:     GPL-2.0+
+/*
+ * (C) Copyright 2021 Rockchip Electronics Co., Ltd.
+ */
+
+#include <dm.h>
+
+UCLASS_DRIVER(dmc) = {
+	.id		= UCLASS_DMC,
+	.name		= "dmc",
+};
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 213bab72ce..a192a71044 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -111,6 +111,7 @@ enum uclass_id {
 	UCLASS_EBC,		/* EBC Controller for eink screen */
 	UCLASS_EINK_DISPLAY,	/* EINK screen display driver */
 	UCLASS_RNG,		/* Random Number Generator */
+	UCLASS_DMC,		/* Dynamic Memory Interface */
 	UCLASS_COUNT,
 	UCLASS_INVALID = -1,
 };

commit 504ca0d4dbce98f73b8f70db3124b16aa277cecc
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Thu Dec 23 14:39:11 2021 +0800

    pinctrl: rockchip: rk3588 fix schmitt 8 pins per register
    
    Change-Id: I74cd24adefc88eb2ba3bd2c8458629644bee6009
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3588.c b/drivers/pinctrl/rockchip/pinctrl-rk3588.c
index 1f90c76b54..bdf628b56e 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3588.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3588.c
@@ -218,7 +218,7 @@ static void rk3588_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
 }
 
 #define RK3588_SMT_BITS_PER_PIN		1
-#define RK3588_SMT_PINS_PER_REG		16
+#define RK3588_SMT_PINS_PER_REG		8
 
 static int rk3588_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank,
 					   int pin_num, struct regmap **regmap,

commit 586105f927f774ada7bbba4eed15c0f84091d832
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Wed Dec 22 17:57:22 2021 +0800

    rockchip: rk3588: assert reset the pipephys to save power
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: I6c6d5257274bec471ffb1cc6feb34e99187ee291

diff --git a/arch/arm/mach-rockchip/rk3588/rk3588.c b/arch/arm/mach-rockchip/rk3588/rk3588.c
index 86f866cf9d..c74e488ca9 100644
--- a/arch/arm/mach-rockchip/rk3588/rk3588.c
+++ b/arch/arm/mach-rockchip/rk3588/rk3588.c
@@ -56,6 +56,9 @@ DECLARE_GLOBAL_DATA_PTR;
 #define EMMC_IOC_GPIO2D_DS_L		0x58
 #define EMMC_IOC_GPIO2D_DS_H		0x5c
 
+#define CRU_BASE			0xfd7c0000
+#define CRU_SOFTRST_CON77		0x0b34
+
 static struct mm_region rk3588_mem_map[] = {
 	{
 		.virt = 0x0UL,
@@ -835,6 +838,12 @@ int arch_cpu_init(void)
 		writel(0x00700020, VCCIO3_5_IOC_BASE + IOC_VCCIO3_5_GPIO3A_DS_H);
 		writel(0x00070002, VCCIO3_5_IOC_BASE + IOC_VCCIO3_5_GPIO3C_DS_H);
 	}
+
+	/*
+	 * Assert reset the pipephy0, pipephy1 and pipephy2,
+	 * and de-assert reset them in Kernel combphy driver.
+	 */
+	writel(0x01c001c0, CRU_BASE + CRU_SOFTRST_CON77);
 #endif
 	/* Select usb otg0 phy status to 0 that make rockusb can work at high-speed */
 	writel(0x00080008, USBGRF_BASE + USB_GRF_USB3OTG0_CON1);

commit 67bee0b5661c674f793d13b4db5a43630946de15
Author: Xiao Ya peng <yp.xiao@rock-chips.com>
Date:   Thu Dec 23 11:46:42 2021 +0800

    rockchip: board: fix compiler error.
    
    error: implicit declaration of function ‘fdt_find_or_add_subnode’
    [-Werror=implicit-function-declaration]
    
    Signed-off-by: Xiao Ya peng <yp.xiao@rock-chips.com>
    Change-Id: Ib50f9e7cd52c6f476f15f3542b4ca961857210c8

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index d8f610d828..1414b99a8e 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -17,6 +17,7 @@
 #include <debug_uart.h>
 #include <dm.h>
 #include <dvfs.h>
+#include <fdt_support.h>
 #include <io-domain.h>
 #include <image.h>
 #include <key.h>

commit 5edd0d92d13fd1a81472cd0dec85b0bdee697d8f
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue Dec 21 11:36:14 2021 +0800

    drivers: rkflash: Support TC58NVG5H2HTAI0
    
    Change-Id: I4dae9c0efab5103b90ebb83028fc73144e1d3337
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/flash.c b/drivers/rkflash/flash.c
index 0bb38d9cc4..8d8da7b7c5 100644
--- a/drivers/rkflash/flash.c
+++ b/drivers/rkflash/flash.c
@@ -451,8 +451,18 @@ u32 nandc_flash_init(void __iomem *nandc_addr)
 			    id_byte[0][1] != 0xA1 &&
 			    id_byte[0][1] != 0xAA &&
 			    id_byte[0][1] != 0xAC &&
-			    id_byte[0][1] != 0x6A)
+			    id_byte[0][1] != 0x6A &&
+			    id_byte[0][1] != 0xD7) {
+				pr_err("The device not support yet!\n");
+
+				return FTL_UNSUPPORTED_FLASH;
+			}
+
+			if (id_byte[0][1] != 0xD7 && nandc_get_version() != 9) {
+				pr_err("This device is not compatible, Insufficient ECC capability\n");
+
 				return FTL_UNSUPPORTED_FLASH;
+			}
 		}
 	}
 	if (id_byte[0][0] == 0x98 && (id_byte[0][4] & 0x80))
@@ -486,6 +496,11 @@ u32 nandc_flash_init(void __iomem *nandc_addr)
 		nand_para.page_per_blk = 64;
 		nand_para.plane_per_die = 2;
 		nand_para.blk_per_plane = 2048;
+	} else if (id_byte[0][1] == 0xD7 && id_byte[0][3] == 0x32) {
+		nand_para.blk_per_plane = 2048;
+		nand_para.sec_per_page = 16;
+		nand_para.page_per_blk = 128;
+		nand_para.plane_per_die = 2;
 	}
 	flash_die_info_init();
 	flash_bch_sel(nand_para.ecc_bits);

commit 3df6e59ea1560f0f85757e8906aa4857e4c78276
Author: Damon Ding <damon.ding@rock-chips.com>
Date:   Tue Dec 21 09:26:26 2021 +0800

    drm/rockchip: vop2: add support for dsi dual_channel mode
    
    Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
    Change-Id: Icdbb7401a32acee6658d06767fe60a1586bccec7

diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index 685e42d51b..28c2c825e3 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -26,6 +26,7 @@
 #define ROCKCHIP_OUTPUT_DUAL_CHANNEL_LEFT_RIGHT_MODE	BIT(0)
 #define ROCKCHIP_OUTPUT_DUAL_CHANNEL_ODD_EVEN_MODE	BIT(1)
 #define ROCKCHIP_OUTPUT_DATA_SWAP			BIT(2)
+#define ROCKCHIP_OUTPUT_MIPI_DS_MODE			BIT(3)
 
 #define ROCKCHIP_DSC_PPS_SIZE_BYTE			88
 
diff --git a/drivers/video/drm/rockchip_vop2.c b/drivers/video/drm/rockchip_vop2.c
index 4dc04ce24d..ef3e759bc4 100644
--- a/drivers/video/drm/rockchip_vop2.c
+++ b/drivers/video/drm/rockchip_vop2.c
@@ -107,6 +107,8 @@
 #define GAMMA_PORT_SEL_MASK			0x3
 #define GAMMA_PORT_SEL_SHIFT			0
 #define RK3568_MIPI_DUAL_EN_SHIFT		10
+#define RK3588_MIPI_DSI0_MODE_SEL_SHIFT		11
+#define RK3588_MIPI_DSI1_MODE_SEL_SHIFT		12
 
 #define RK3568_SYS_PD_CTRL			0x034
 #define RK3568_VP0_LINE_FLAG			0x70
@@ -1860,6 +1862,9 @@ static unsigned long rk3588_vop2_if_cfg(struct display_state *state)
 			val = 0;
 		else
 			val = 1;
+		if (conn_state->output_flags & ROCKCHIP_OUTPUT_MIPI_DS_MODE)
+			vop2_mask_write(vop2, RK3568_DSP_IF_EN, EN_MASK, RK3588_MIPI_DSI0_MODE_SEL_SHIFT,
+					1, false);
 		vop2_mask_write(vop2, RK3568_DSP_IF_EN, EN_MASK, RK3588_MIPI0_EN_SHIFT,
 				1, false);
 		vop2_mask_write(vop2, RK3568_DSP_IF_EN, 1, RK3588_MIPI0_MUX_SHIFT, val, false);
@@ -1874,6 +1879,9 @@ static unsigned long rk3588_vop2_if_cfg(struct display_state *state)
 			val = 1;
 		else
 			val = 3; /*VP1*/
+		if (conn_state->output_flags & ROCKCHIP_OUTPUT_MIPI_DS_MODE)
+			vop2_mask_write(vop2, RK3568_DSP_IF_EN, EN_MASK, RK3588_MIPI_DSI1_MODE_SEL_SHIFT,
+					1, false);
 		vop2_mask_write(vop2, RK3568_DSP_IF_EN, EN_MASK, RK3588_MIPI1_EN_SHIFT,
 				1, false);
 		vop2_mask_write(vop2, RK3568_DSP_IF_EN, IF_MUX_MASK, MIPI1_MUX_SHIFT,
@@ -1885,6 +1893,8 @@ static unsigned long rk3588_vop2_if_cfg(struct display_state *state)
 	if (conn_state->output_flags & ROCKCHIP_OUTPUT_DUAL_CHANNEL_LEFT_RIGHT_MODE) {
 		vop2_mask_write(vop2, RK3568_DSP_IF_CTRL, EN_MASK,
 				RK3568_MIPI_DUAL_EN_SHIFT, 1, false);
+		vop2_mask_write(vop2, RK3568_VP0_MIPI_CTRL + vp_offset, EN_MASK,
+				MIPI_DUAL_EN_SHIFT, 1, false);
 		if (conn_state->output_flags & ROCKCHIP_OUTPUT_DATA_SWAP)
 			vop2_mask_write(vop2, RK3568_VP0_MIPI_CTRL + vp_offset,
 					EN_MASK, MIPI_DUAL_SWAP_EN_SHIFT, 1,

commit 0db2c64b683e41ed6d4882dca47455a2bc54f757
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 21 03:46:55 2021 +0000

    rockchip: fit: stop booting if rsa verify failed
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ie0452f13134e7530d0162d25b2a41a103570d29c

diff --git a/arch/arm/mach-rockchip/fit.c b/arch/arm/mach-rockchip/fit.c
index e8dea27897..1a2ac03376 100644
--- a/arch/arm/mach-rockchip/fit.c
+++ b/arch/arm/mach-rockchip/fit.c
@@ -444,9 +444,11 @@ int fit_image_init_resource(void)
 		return conf_noffset;
 
 	printf("%s: ", fdt_get_name(fit, conf_noffset, NULL));
-	if (fit_config_verify(fit, conf_noffset))
-		return -EACCES;
-
+	if (fit_config_verify(fit, conf_noffset)) {
+		puts("\n");
+		run_command("download", 0);
+		hang();
+	}
 	puts("\n");
 #endif
 

commit 1659f9af6b88f0729ce110544b3cca99a104f898
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 21 02:38:40 2021 +0000

    scripts: fit: check dev.pubkey and sign result
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I9ee14f685a11827da6dc472f2c85bd4b13c1e657

diff --git a/scripts/fit.sh b/scripts/fit.sh
index 891d1a202c..b4c01bcad7 100755
--- a/scripts/fit.sh
+++ b/scripts/fit.sh
@@ -33,7 +33,8 @@ CHECK_SIGN="./tools/fit_check_sign"
 # key
 KEY_DIR="keys/"
 RSA_PRI_KEY="keys/dev.key"
-RSA_PUB_KEY="keys/dev.crt"
+RSA_PUB_KEY="keys/dev.pubkey"
+RSA_CRT_KEY="keys/dev.crt"
 SIGNATURE_KEY_NODE="/signature/key-dev"
 SPL_DTB="spl/u-boot-spl.dtb"
 UBOOT_DTB="u-boot.dtb"
@@ -95,6 +96,20 @@ function check_its()
 	done
 }
 
+function check_rsa_keys()
+{
+	if [ ! -f ${RSA_PRI_KEY} ]; then
+		echo "ERROR: No ${RSA_PRI_KEY} "
+		exit 1
+	elif [ ! -f ${RSA_PUB_KEY} ]; then
+		echo "ERROR: No ${RSA_PUB_KEY} "
+		exit 1
+	elif [ ! -f ${RSA_CRT_KEY} ]; then
+		echo "ERROR: No ${RSA_CRT_KEY} "
+		exit 1
+	fi
+}
+
 function validate_arg()
 {
 	case $1 in
@@ -228,13 +243,7 @@ function fit_gen_uboot_itb()
 			./make.sh loader ${ARG_INI_LOADER}
 		fi
 	else
-		if [ ! -f ${RSA_PRI_KEY} ]; then
-			echo "ERROR: No ${RSA_PRI_KEY} "
-			exit 1
-		elif [ ! -f ${RSA_PUB_KEY} ]; then
-			echo "ERROR: No ${RSA_PUB_KEY} "
-			exit 1
-		fi
+		check_rsa_keys
 
 		if ! grep -q '^CONFIG_SPL_FIT_SIGNATURE=y' .config ; then
 			echo "ERROR: CONFIG_SPL_FIT_SIGNATURE is disabled"
@@ -368,13 +377,7 @@ function fit_gen_boot_itb()
 	if [ "${ARG_SIGN}" != "y" ]; then
 		${MKIMAGE} -f ${ITS_BOOT} -E -p ${OFFS_DATA} ${ITB_BOOT} -v ${ARG_VER_BOOT}
 	else
-		if [ ! -f ${RSA_PRI_KEY}  ]; then
-			echo "ERROR: No ${RSA_PRI_KEY}"
-			exit 1
-		elif [ ! -f ${RSA_PUB_KEY}  ]; then
-			echo "ERROR: No ${RSA_PUB_KEY}"
-			exit 1
-		fi
+		check_rsa_keys
 
 		if ! grep -q '^CONFIG_FIT_SIGNATURE=y' .config ; then
 			echo "ERROR: CONFIG_FIT_SIGNATURE is disabled"
@@ -456,13 +459,7 @@ function fit_gen_recovery_itb()
 	if [ "${ARG_SIGN}" != "y" ]; then
 		${MKIMAGE} -f ${ITS_RECOVERY} -E -p ${OFFS_DATA} ${ITB_RECOVERY} -v ${ARG_VER_RECOVERY}
 	else
-		if [ ! -f ${RSA_PRI_KEY}  ]; then
-			echo "ERROR: No ${RSA_PRI_KEY}"
-			exit 1
-		elif [ ! -f ${RSA_PUB_KEY}  ]; then
-			echo "ERROR: No ${RSA_PUB_KEY}"
-			exit 1
-		fi
+		check_rsa_keys
 
 		if ! grep -q '^CONFIG_FIT_SIGNATURE=y' .config ; then
 			echo "ERROR: CONFIG_FIT_SIGNATURE is disabled"
@@ -587,7 +584,11 @@ function fit_gen_loader()
 {
 	if grep -Eq '^CONFIG_FIT_SIGNATURE=y' .config ; then
 		${RK_SIGN_TOOL} cc --chip ${ARG_CHIP: 2: 6}
-		${RK_SIGN_TOOL} sl --key ./keys/dev.key --pubkey ./keys/dev.pubkey --loader *_loader_*.bin
+		${RK_SIGN_TOOL} sl --key ${RSA_PRI_KEY} --pubkey ${RSA_PUB_KEY} --loader *_loader_*.bin
+		if [ $? -ne 0 ]; then
+			echo "ERROR: ${RK_SIGN_TOOL} failed to sign loader"
+			exit 1
+		fi
 	fi
 }
 

commit ee147fea37b5216568bf52e551c2df499ebd777c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 21 02:30:48 2021 +0000

    scripts: fit-resign: add comment to generate dev.pubkey
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I76c2c45a5b98dc79f7bbb791d5c25d6d6f0e5f30

diff --git a/scripts/fit-resign.sh b/scripts/fit-resign.sh
index 4cd87a04a1..ff70c68072 100755
--- a/scripts/fit-resign.sh
+++ b/scripts/fit-resign.sh
@@ -10,6 +10,7 @@ set -e
 #	mkdir -p keys
 #	openssl genpkey -algorithm RSA -out keys/dev.key -pkeyopt rsa_keygen_bits:2048 -pkeyopt rsa_keygen_pubexp:65537
 #	openssl req -batch -new -x509 -key keys/dev.key -out keys/dev.crt
+#	openssl rsa -in keys/dev.key -pubout -out keys/dev.pubkey
 # [Sign]
 #	openssl dgst -sha256 -sign keys/dev.key -sigopt rsa_padding_mode:pss -out sha256-rsa2048.sign fit/boot.data2sign
 

commit 9e0761d60c75125cefe21f6f4ced0030248c57d1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Dec 20 08:49:04 2021 +0000

    tools: rkcommon: add rk3588 support
    
    Sram total size is 1MB and 4KB is used as bootrom stack.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I094b511c8701259424308b959495b2d11e148f69

diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index fe5adeecf2..c460a956ba 100644
--- a/tools/rkcommon.c
+++ b/tools/rkcommon.c
@@ -137,6 +137,7 @@ static struct spl_info spl_infos[] = {
 	{ "rv1126", "110B", 0x10000 - 0x1000, false, RK_HEADER_V1 },
 	{ "rk1808", "RK18", 0x200000 - 0x2000, false, RK_HEADER_V1 },
 	{ "rk3568", "RK35", 0x10000 - 0x1000, false, RK_HEADER_V2 },
+	{ "rk3588", "RK35", 0x100000 - 0x1000, false, RK_HEADER_V2 },
 };
 
 /**

commit 2094c12f471c7b9e85538e4e6f1a0d3a8c5f559b
Author: Damon Ding <damon.ding@rock-chips.com>
Date:   Tue Dec 21 10:59:59 2021 +0800

    drm/rockchip: vop2: delete temp pd setting
    
    The vop2 related pd setting has been set in trust.
    
    Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
    Change-Id: I52121465a3732be1103da224b84b3f81aac44862

diff --git a/drivers/video/drm/rockchip_vop2.c b/drivers/video/drm/rockchip_vop2.c
index 5d8098d414..4dc04ce24d 100644
--- a/drivers/video/drm/rockchip_vop2.c
+++ b/drivers/video/drm/rockchip_vop2.c
@@ -1444,12 +1444,6 @@ static void vop2_global_initial(struct vop2 *vop2, struct display_state *state)
 	if (vop2->global_init)
 		return;
 
-	/*
-	 * Open the global pd(temp)
-	 */
-	writel(0xffff0000, 0xfd8d8150);
-	udelay(50);
-
 	/* OTP must enable at the first time, otherwise mirror layer register is error */
 	if (soc_is_rk3566())
 		vop2_mask_write(vop2, RK3568_SYS_OTP_WIN_EN, EN_MASK,

commit dccbd009a631d38ed945409e872c2707cae74028
Author: Addy Ke <addy.ke@rock-chips.com>
Date:   Mon Dec 20 20:24:04 2021 +0800

    configs: add toybrick for rk3588
    
    Signed-off-by: Addy Ke <addy.ke@rock-chips.com>
    Change-Id: I089f95c1bb9e8dfba998043cfb9de66a420b83b5

diff --git a/configs/rk3588-toybrick.config b/configs/rk3588-toybrick.config
new file mode 100644
index 0000000000..c89406a020
--- /dev/null
+++ b/configs/rk3588-toybrick.config
@@ -0,0 +1,3 @@
+CONFIG_BASE_DEFCONFIG="rk3588_defconfig"
+CONFIG_ROCKCHIP_EARLY_DISTRO_DTB=y
+CONFIG_ROCKCHIP_EARLY_DISTRO_DTB_PATH="/extlinux/toybrick.dtb"

commit b8ceb0bc6e629b6b768f38b116f1d23b7fd7b390
Author: Addy Ke <addy.ke@rock-chips.com>
Date:   Mon Dec 20 20:24:35 2021 +0800

    configs: add toybrick for rk3568
    
    Signed-off-by: Addy Ke <addy.ke@rock-chips.com>
    Change-Id: I6f1a59cefb0ce9f9a2c4ce318de59e07f6dafc4e

diff --git a/configs/rk3568-toybrick.config b/configs/rk3568-toybrick.config
new file mode 100644
index 0000000000..0ae523e6a3
--- /dev/null
+++ b/configs/rk3568-toybrick.config
@@ -0,0 +1,3 @@
+CONFIG_BASE_DEFCONFIG="rk3568_defconfig"
+CONFIG_ROCKCHIP_EARLY_DISTRO_DTB=y
+CONFIG_ROCKCHIP_EARLY_DISTRO_DTB_PATH="/extlinux/toybrick.dtb"

commit fc3694d6f37c82d0a9bf334fbcb18a079566631a
Author: xb.wang <xb.wang@rock-chips.com>
Date:   Thu Dec 9 16:50:15 2021 +0800

    lib: optee_clientApi: support keyladder cipher api
    
    Signed-off-by: xb.wang <xb.wang@rock-chips.com>
    Change-Id: Ia30f3438719a2b88a1f27205b89e62c69e54bba6

diff --git a/include/optee_include/OpteeClientInterface.h b/include/optee_include/OpteeClientInterface.h
index 037f6d6a3e..c924b7ba0f 100644
--- a/include/optee_include/OpteeClientInterface.h
+++ b/include/optee_include/OpteeClientInterface.h
@@ -17,6 +17,49 @@ enum RK_OEM_HR_OTP_KEYID {
 	RK_OEM_HR_OTP_KEYMAX
 };
 
+/* Crypto mode */
+enum RK_CIPIHER_MODE {
+	RK_CIPHER_MODE_ECB = 0,
+	RK_CIPHER_MODE_CBC = 1,
+	RK_CIPHER_MODE_CTS = 2,
+	RK_CIPHER_MODE_CTR = 3,
+	RK_CIPHER_MODE_CFB = 4,
+	RK_CIPHER_MODE_OFB = 5,
+	RK_CIPHER_MODE_XTS = 6,
+	RK_CIPHER_MODE_CCM = 7,
+	RK_CIPHER_MODE_GCM = 8,
+	RK_CIPHER_MODE_CMAC = 9,
+	RK_CIPHER_MODE_CBC_MAC = 10,
+	RK_CIPHER_MODE_MAX
+};
+
+/* Crypto algorithm */
+enum RK_CRYPTO_ALGO {
+	RK_ALGO_AES = 1,
+	RK_ALGO_DES,
+	RK_ALGO_TDES,
+	RK_ALGO_SM4,
+	RK_ALGO_ALGO_MAX
+};
+
+typedef struct {
+	uint32_t	algo;
+	uint32_t	mode;
+	uint32_t	operation;
+	uint8_t		key[64];
+	uint32_t	key_len;
+	uint8_t		iv[16];
+	void		*reserved;
+} rk_cipher_config;
+
+/* Crypto operation */
+#define RK_MODE_ENCRYPT			1
+#define RK_MODE_DECRYPT			0
+
+#define AES_BLOCK_SIZE			16
+#define SM4_BLOCK_SIZE			16
+#define RK_CRYPTO_MAX_DATA_LEN		(1 * 1024 * 1024)
+
 #define ATAP_HEX_UUID_LEN 32
 #define ATTEST_DH_SIZE     8
 #define ATTEST_UUID_SIZE     (ATAP_HEX_UUID_LEN+1)
@@ -52,6 +95,9 @@ uint32_t trusty_read_oem_ns_otp(uint32_t byte_off, uint8_t *byte_buf, uint32_t b
 uint32_t trusty_write_oem_hr_otp(enum RK_OEM_HR_OTP_KEYID key_id,
 				 uint8_t *byte_buf, uint32_t byte_len);
 uint32_t trusty_set_oem_hr_otp_read_lock(enum RK_OEM_HR_OTP_KEYID key_id);
+uint32_t trusty_keylad_cipher(enum RK_OEM_HR_OTP_KEYID key_id,
+			      rk_cipher_config *config,
+			      uint8_t *src, uint8_t *dest, uint32_t len);
 uint32_t trusty_attest_dh(uint8_t *dh, uint32_t *dh_size);
 uint32_t trusty_attest_uuid(uint8_t *uuid, uint32_t *uuid_size);
 uint32_t trusty_attest_get_ca
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index fcc791766c..4900eaf415 100644
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -29,6 +29,11 @@
 #define STORAGE_CMD_WRITE_OEM_HR_OTP		14
 #define STORAGE_CMD_SET_OEM_HR_OTP_READ_LOCK	15
 
+#define CRYPTO_SERVICE_CMD_KEYLAD_CIPHER	0x00000001
+
+#define RK_CRYPTO_SERVICE_UUID	{ 0x0cacdb5d, 0x4fea, 0x466c, \
+		{ 0x97, 0x16, 0x3d, 0x54, 0x16, 0x52, 0x83, 0x0f } }
+
 static uint8_t b2hs_add_base(uint8_t in)
 {
 	if (in > 9)
@@ -847,6 +852,101 @@ exit:
 	return TeecResult;
 }
 
+uint32_t trusty_keylad_cipher(enum RK_OEM_HR_OTP_KEYID key_id,
+			      rk_cipher_config *config,
+			      uint8_t *src, uint8_t *dest, uint32_t len)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	TEEC_Operation TeecOperation = {0};
+	uint32_t ErrorOrigin;
+	TEEC_UUID uuid = RK_CRYPTO_SERVICE_UUID;
+	TEEC_SharedMemory SharedMem_config = {0};
+	TEEC_SharedMemory SharedMem_inout = {0};
+
+	if (key_id >= RK_OEM_HR_OTP_KEYMAX)
+		return TEEC_ERROR_BAD_PARAMETERS;
+
+	if (!config || !src || !dest)
+		return TEEC_ERROR_BAD_PARAMETERS;
+
+	if (config->algo != RK_ALGO_AES && config->algo != RK_ALGO_SM4)
+		return TEEC_ERROR_BAD_PARAMETERS;
+
+	if (config->mode >= RK_CIPHER_MODE_XTS)
+		return TEEC_ERROR_BAD_PARAMETERS;
+
+	if (config->operation != RK_MODE_ENCRYPT &&
+	    config->operation != RK_MODE_DECRYPT)
+		return TEEC_ERROR_BAD_PARAMETERS;
+
+	if (config->key_len != 16 &&
+	    config->key_len != 24 &&
+	    config->key_len != 32)
+		return TEEC_ERROR_BAD_PARAMETERS;
+
+	if (len % AES_BLOCK_SIZE ||
+	    len > RK_CRYPTO_MAX_DATA_LEN ||
+	    len == 0)
+		return TEEC_ERROR_BAD_PARAMETERS;
+
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				      &TeecSession,
+				      &uuid,
+				      TEEC_LOGIN_PUBLIC,
+				      NULL,
+				      NULL,
+				      &ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
+
+	SharedMem_config.size = sizeof(rk_cipher_config);
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem_config);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
+
+	SharedMem_inout.size = len;
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem_inout);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
+
+	memcpy(SharedMem_config.buffer, config, sizeof(rk_cipher_config));
+	memcpy(SharedMem_inout.buffer, src, len);
+	TeecOperation.params[0].value.a       = key_id;
+	TeecOperation.params[1].tmpref.buffer = SharedMem_config.buffer;
+	TeecOperation.params[1].tmpref.size   = SharedMem_config.size;
+	TeecOperation.params[2].tmpref.buffer = SharedMem_inout.buffer;
+	TeecOperation.params[2].tmpref.size   = SharedMem_inout.size;
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						    TEEC_MEMREF_TEMP_INPUT,
+						    TEEC_MEMREF_TEMP_INOUT,
+						    TEEC_NONE);
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					CRYPTO_SERVICE_CMD_KEYLAD_CIPHER,
+					&TeecOperation,
+					&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
+
+	memcpy(dest, SharedMem_inout.buffer, SharedMem_inout.size);
+
+exit:
+	TEEC_ReleaseSharedMemory(&SharedMem_config);
+	TEEC_ReleaseSharedMemory(&SharedMem_inout);
+	TEEC_CloseSession(&TeecSession);
+	TEEC_FinalizeContext(&TeecContext);
+	return TeecResult;
+}
+
 uint32_t trusty_attest_dh(uint8_t *dh, uint32_t *dh_size)
 {
 	TEEC_Result TeecResult;

commit 4892004a11eaf1f6937c625b5270c2bda968391d
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Fri Dec 17 15:47:38 2021 +0800

    clk: rockchip: rk3588: add 786432000 and 722534400 for aupll setting
    
    Change-Id: I12928e2c258fbe7e6546a78b31c6789a38ca92cc
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3588.c b/drivers/clk/rockchip/clk_rk3588.c
index d8c2317ccf..68472cd4c7 100644
--- a/drivers/clk/rockchip/clk_rk3588.c
+++ b/drivers/clk/rockchip/clk_rk3588.c
@@ -31,7 +31,9 @@ static struct rockchip_pll_rate_table rk3588_pll_rates[] = {
 	RK3588_PLL_RATE(900000000, 2, 300, 2, 0),
 	RK3588_PLL_RATE(850000000, 3, 425, 2, 0),
 	RK3588_PLL_RATE(816000000, 2, 272, 2, 0),
+	RK3588_PLL_RATE(786432000, 2, 262, 2, 9437),
 	RK3588_PLL_RATE(786000000, 1, 131, 2, 0),
+	RK3588_PLL_RATE(722534400, 8, 963, 2, 24850),
 	RK3588_PLL_RATE(600000000, 2, 200, 2, 0),
 	RK3588_PLL_RATE(594000000, 2, 198, 2, 0),
 	RK3588_PLL_RATE(200000000, 3, 400, 4, 0),

commit 02c35d15a0427902d28d64300a2c288b11b72933
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Dec 17 07:56:32 2021 +0000

    tool: trust_merger: use p_paddr property to filter segments
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I9b2aacb98976337d4e491312e506c99271e5b425

diff --git a/tools/rockchip/trust_merger.c b/tools/rockchip/trust_merger.c
index b6e8ab6a3f..99350b77f9 100644
--- a/tools/rockchip/trust_merger.c
+++ b/tools/rockchip/trust_merger.c
@@ -443,7 +443,7 @@ bool filter_elf(uint32_t index, uint8_t *pMeta, uint32_t *pMetaNum,
 				pEntry->size = (uint32_t) pElfProgram64->p_filesz;
 				pEntry->offset = (uint32_t) pElfProgram64->p_offset;
 				pEntry->align_size = DO_ALIGN(pEntry->size, ENTRY_ALIGN);
-				pEntry->addr = (uint32_t) pElfProgram64->p_vaddr;
+				pEntry->addr = (uint32_t) pElfProgram64->p_paddr;
 				if (pEntry->align_size > BL3X_FILESIZE_MAX) {
 					LOGE("elf_file %s too large,segment=%d.\n", pEntry->path, i);
 					goto exit_fileter_elf;
@@ -466,7 +466,7 @@ bool filter_elf(uint32_t index, uint8_t *pMeta, uint32_t *pMetaNum,
 				pEntry->size = pElfProgram32->p_filesz;
 				pEntry->offset = pElfProgram32->p_offset;
 				pEntry->align_size = DO_ALIGN(pEntry->size, ENTRY_ALIGN);
-				pEntry->addr = pElfProgram32->p_vaddr;
+				pEntry->addr = pElfProgram32->p_paddr;
 				if (pEntry->align_size > BL3X_FILESIZE_MAX) {
 					LOGE("elf_file %s too large,segment=%d.\n", pEntry->path, i);
 					goto exit_fileter_elf;

commit 10427e2df5a90fdf95a3ef373e36c5dd49ba07ad
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Thu Nov 29 10:57:37 2018 +0100

    UPSTREAM: syscon: dm: Add a new method to get a regmap from DTS
    
    syscon_regmap_lookup_by_phandle() can be used to get the regmap of a syscon
    device from a reference in the DTS. It operates similarly to the linux
    version of the namesake function.
    
    Change-Id: I04fa5cce5de5847184d6a951f36c640fd12b14a8
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
    (cherry picked from commit 6c3af1f24e4b8ccbef20bc00b9529f4a325583f2)

diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 25e9b41783..bb6935fa76 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -341,6 +341,8 @@
 
 		test4 {
 			compatible = "denx,u-boot-probe-test";
+			first-syscon = <&syscon0>;
+			second-sys-ctrl = <&another_system_controller>;
 		};
 	};
 
@@ -410,12 +412,12 @@
 		};
 	};
 
-	syscon@0 {
+	syscon0: syscon@0 {
 		compatible = "sandbox,syscon0";
 		reg = <0x10 4>;
 	};
 
-	syscon@1 {
+	another_system_controller: syscon@1 {
 		compatible = "sandbox,syscon1";
 		reg = <0x20 5
 			0x28 6
diff --git a/drivers/core/syscon-uclass.c b/drivers/core/syscon-uclass.c
index a69937e63c..5f5a9f8f42 100644
--- a/drivers/core/syscon-uclass.c
+++ b/drivers/core/syscon-uclass.c
@@ -45,6 +45,25 @@ static int syscon_pre_probe(struct udevice *dev)
 #endif
 }
 
+struct regmap *syscon_regmap_lookup_by_phandle(struct udevice *dev,
+					       const char *name)
+{
+	struct udevice *syscon;
+	struct regmap *r;
+	int err;
+
+	err = uclass_get_device_by_phandle(UCLASS_SYSCON, dev,
+					   name, &syscon);
+	if (err)
+		return ERR_PTR(err);
+
+	r = syscon_get_regmap(syscon);
+	if (!r)
+		return ERR_PTR(-ENODEV);
+
+	return r;
+}
+
 int syscon_get_by_driver_data(ulong driver_data, struct udevice **devp)
 {
 	struct udevice *dev;
diff --git a/include/syscon.h b/include/syscon.h
index 5d52b1cc3c..23d257ad80 100644
--- a/include/syscon.h
+++ b/include/syscon.h
@@ -73,6 +73,19 @@ int syscon_get_by_driver_data(ulong driver_data, struct udevice **devp);
  */
 struct regmap *syscon_get_regmap_by_driver_data(ulong driver_data);
 
+/**
+ * syscon_regmap_lookup_by_phandle() - Look up a controller by a phandle
+ *
+ * This operates by looking up the given name in the device (device
+ * tree property) of the device using the system controller.
+ *
+ * @dev:	Device using the system controller
+ * @name:	Name of property referring to the system controller
+ * @return	A pointer to the regmap if found, ERR_PTR(-ve) on error
+ */
+struct regmap *syscon_regmap_lookup_by_phandle(struct udevice *dev,
+					       const char *name);
+
 /**
  * syscon_get_first_range() - get the first memory range from a syscon regmap
  *
diff --git a/test/dm/syscon.c b/test/dm/syscon.c
index c40f5fc09d..f2ac2e06c8 100644
--- a/test/dm/syscon.c
+++ b/test/dm/syscon.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <dm.h>
 #include <syscon.h>
+#include <regmap.h>
 #include <asm/test.h>
 #include <dm/test.h>
 #include <test/ut.h>
@@ -46,3 +47,31 @@ static int dm_test_syscon_by_driver_data(struct unit_test_state *uts)
 	return 0;
 }
 DM_TEST(dm_test_syscon_by_driver_data, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+
+/* Test system controller by phandle */
+static int dm_test_syscon_by_phandle(struct unit_test_state *uts)
+{
+	struct udevice *dev;
+	struct regmap *map;
+
+	ut_assertok(uclass_get_device_by_name(UCLASS_TEST_PROBE, "test4",
+					      &dev));
+
+	ut_assertok_ptr(syscon_regmap_lookup_by_phandle(dev, "first-syscon"));
+	map = syscon_regmap_lookup_by_phandle(dev, "first-syscon");
+	ut_assert(map);
+	ut_assert(!IS_ERR(map));
+	ut_asserteq(1, map->range_count);
+
+	ut_assertok_ptr(syscon_regmap_lookup_by_phandle(dev,
+							"second-sys-ctrl"));
+	map = syscon_regmap_lookup_by_phandle(dev, "second-sys-ctrl");
+	ut_assert(map);
+	ut_assert(!IS_ERR(map));
+	ut_asserteq(4, map->range_count);
+
+	ut_assert(IS_ERR(syscon_regmap_lookup_by_phandle(dev, "not-present")));
+
+	return 0;
+}
+DM_TEST(dm_test_syscon_by_phandle, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);

commit b08714cb515dc860db9d7d6caa6caa2d8b571780
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 15 10:09:33 2021 +0000

    input: keys: update adc range and margin
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I7be78c5fde447e60f2a63efadf42e90eda4d8ef2

diff --git a/drivers/input/adc_key.c b/drivers/input/adc_key.c
index 1624a93acd..391e324fd6 100644
--- a/drivers/input/adc_key.c
+++ b/drivers/input/adc_key.c
@@ -14,9 +14,9 @@ static int adc_key_ofdata_to_platdata(struct udevice *dev)
 	u32 chn[2], mV;
 	int vref, ret;
 #ifdef CONFIG_SARADC_ROCKCHIP_V2
-	int range = 4096;
+	int range = 4096;	/* 12-bit adc */
 #else
-	int range = 1024;
+	int range = 1024;	/* 10-bit adc */
 #endif
 
 	uc_key = dev_get_uclass_platdata(dev);
diff --git a/drivers/input/key-uclass.c b/drivers/input/key-uclass.c
index b3c6fc1866..df3fb91c9c 100644
--- a/drivers/input/key-uclass.c
+++ b/drivers/input/key-uclass.c
@@ -255,9 +255,12 @@ int key_bind_children(struct udevice *dev, const char *drv_name)
 static int key_post_probe(struct udevice *dev)
 {
 	struct dm_key_uclass_platdata *uc_key;
-	int margin = 30;
 	int ret;
-
+#ifdef CONFIG_SARADC_ROCKCHIP_V2
+	int margin = 120;
+#else
+	int margin = 30;
+#endif
 	uc_key = dev_get_uclass_platdata(dev);
 	if (!uc_key)
 		return -ENXIO;
diff --git a/drivers/input/spl_adc_key.c b/drivers/input/spl_adc_key.c
index be234c6a2e..60e0394d06 100644
--- a/drivers/input/spl_adc_key.c
+++ b/drivers/input/spl_adc_key.c
@@ -17,10 +17,17 @@ int key_read(int code)
 	int cd, channel, adc;
 	int ret, vref, mv;
 	int min, max;
-	int margin = 30;
+	int margin;
+	int range;
 	uint val;
 	u32 chn[2];
-
+#ifdef CONFIG_SARADC_ROCKCHIP_V2
+	range = 4096;	/* 12-bit adc */
+	margin = 120;
+#else
+	range = 1024;	/* 10-bit adc */
+	margin = 30;
+#endif
 	adc_node = fdt_node_offset_by_compatible(fdt_blob, 0, "adc-keys");
 	if (adc_node < 0) {
 		debug("No 'adc-keys' node, ret=%d\n", adc_node);
@@ -55,7 +62,7 @@ int key_read(int code)
 				return 0;
 			}
 
-			adc = mv / (vref / 1024); /* 10-bit adc */
+			adc = mv / (vref / range);
 			max = adc + margin;
 			min = adc > margin ? adc - margin : 0;
 			ret = adc_channel_single_shot("saradc", channel, &val);

commit cb09e3b0876a4911af031f289152b157b91f09e5
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Dec 1 18:45:45 2021 +0800

    configs: rk3588: enable CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX
    
    Change-Id: I27eab062e3c5a29293ff9cfacbf3a03095f1339d
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/configs/rk3588_defconfig b/configs/rk3588_defconfig
index a9b24e3575..1a7162d53e 100644
--- a/configs/rk3588_defconfig
+++ b/configs/rk3588_defconfig
@@ -138,6 +138,7 @@ CONFIG_DM_ETH_PHY=y
 CONFIG_DWC_ETH_QOS=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_DM_PMIC=y

commit 7adc0066c40ae64b2fc9ccf6e095f0b3002b9142
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Thu Nov 11 10:04:30 2021 +0800

    video/drm: analogix_dp: Add support for rk3588
    
    Change-Id: I4cbfc252fefa6819e74d74e59ffd4ab7494f4001
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/analogix_dp.c b/drivers/video/drm/analogix_dp.c
index 98c388ded7..e8b093b9ef 100644
--- a/drivers/video/drm/analogix_dp.c
+++ b/drivers/video/drm/analogix_dp.c
@@ -13,6 +13,7 @@
 #include <dm/device.h>
 #include <dm/of_access.h>
 #include <dm/read.h>
+#include <linux/bitfield.h>
 #include <linux/list.h>
 #include <syscon.h>
 #include <asm/arch-rockchip/clock.h>
@@ -23,6 +24,10 @@
 #include "rockchip_connector.h"
 #include "analogix_dp.h"
 
+#define RK3588_GRF_VO1_CON0	0x0000
+#define EDP_MODE		BIT(0)
+#define RK3588_GRF_VO1_CON1	0x0004
+
 /**
  * struct rockchip_dp_chip_data - splite the grf setting of kind of chips
  * @lcdsel_grf_reg: grf register offset of lcdc select
@@ -37,6 +42,9 @@ struct rockchip_dp_chip_data {
 	u32	lcdsel_lit;
 	u32	chip_type;
 	bool    ssc;
+
+	u32 max_link_rate;
+	u32 max_lane_count;
 };
 
 static void
@@ -234,11 +242,25 @@ static void analogix_dp_get_adjust_training_lane(struct analogix_dp_device *dp,
 	}
 }
 
+static bool analogix_dp_tps3_supported(struct analogix_dp_device *dp)
+{
+	bool source_tps3_supported, sink_tps3_supported;
+	u8 dpcd = 0;
+
+	source_tps3_supported =
+		dp->video_info.max_link_rate == DP_LINK_BW_5_4;
+	analogix_dp_read_byte_from_dpcd(dp, DP_MAX_LANE_COUNT, &dpcd);
+	sink_tps3_supported = dpcd & DP_TPS3_SUPPORTED;
+
+	return source_tps3_supported && sink_tps3_supported;
+}
+
 static int analogix_dp_process_clock_recovery(struct analogix_dp_device *dp)
 {
 	int lane, lane_count, retval;
 	u8 voltage_swing, pre_emphasis, training_lane;
 	u8 link_status[2], adjust_request[2];
+	u8 training_pattern = TRAINING_PTN2;
 
 	udelay(101);
 
@@ -255,13 +277,16 @@ static int analogix_dp_process_clock_recovery(struct analogix_dp_device *dp)
 		return retval;
 
 	if (analogix_dp_clock_recovery_ok(link_status, lane_count) == 0) {
-		/* set training pattern 2 for EQ */
-		analogix_dp_set_training_pattern(dp, TRAINING_PTN2);
+		if (analogix_dp_tps3_supported(dp))
+			training_pattern = TRAINING_PTN3;
+
+		/* set training pattern for EQ */
+		analogix_dp_set_training_pattern(dp, training_pattern);
 
 		retval = analogix_dp_write_byte_to_dpcd(dp,
 				DP_TRAINING_PATTERN_SET,
-				DP_LINK_SCRAMBLING_DISABLE |
-				DP_TRAINING_PATTERN_2);
+				(training_pattern == TRAINING_PTN3 ?
+				 DP_TRAINING_PATTERN_3 : DP_TRAINING_PATTERN_2));
 		if (retval)
 			return retval;
 
@@ -745,7 +770,7 @@ static int analogix_dp_connector_init(struct display_state *state)
 	struct connector_state *conn_state = &state->conn_state;
 	struct analogix_dp_device *dp = dev_get_priv(conn_state->dev);
 
-	conn_state->output_if |= VOP_OUTPUT_IF_eDP0;
+	conn_state->output_if |= dp->id ? VOP_OUTPUT_IF_eDP1 : VOP_OUTPUT_IF_eDP0;
 	conn_state->output_mode = ROCKCHIP_OUT_MODE_AAAA;
 	conn_state->color_space = V4L2_COLORSPACE_DEFAULT;
 
@@ -754,6 +779,7 @@ static int analogix_dp_connector_init(struct display_state *state)
 	reset_deassert_bulk(&dp->resets);
 
 	conn_state->disp_info  = rockchip_get_disp_info(conn_state->type, dp->id);
+	generic_phy_set_mode(&dp->phy, PHY_MODE_DP);
 	generic_phy_power_on(&dp->phy);
 	analogix_dp_init_dp(dp);
 
@@ -794,9 +820,13 @@ static int analogix_dp_connector_enable(struct display_state *state)
 		else
 			val = pdata->lcdsel_big;
 
-		writel(val, syscon_get_first_range(ROCKCHIP_SYSCON_GRF) + pdata->lcdsel_grf_reg);
+		regmap_write(dp->grf, pdata->lcdsel_grf_reg, val);
 	}
 
+	if (pdata->chip_type == RK3588_EDP)
+		regmap_write(dp->grf, dp->id ? RK3588_GRF_VO1_CON1 : RK3588_GRF_VO1_CON0,
+			     EDP_MODE << 16 | FIELD_PREP(EDP_MODE, 1));
+
 	switch (conn_state->bpc) {
 	case 12:
 		video->color_depth = COLOR_12;
@@ -836,7 +866,14 @@ static int analogix_dp_connector_enable(struct display_state *state)
 
 static int analogix_dp_connector_disable(struct display_state *state)
 {
-	/* TODO */
+	struct connector_state *conn_state = &state->conn_state;
+	const struct rockchip_connector *connector = conn_state->connector;
+	const struct rockchip_dp_chip_data *pdata = connector->data;
+	struct analogix_dp_device *dp = dev_get_priv(conn_state->dev);
+
+	if (pdata->chip_type == RK3588_EDP)
+		regmap_write(dp->grf, dp->id ? RK3588_GRF_VO1_CON1 : RK3588_GRF_VO1_CON0,
+			     EDP_MODE << 16 | FIELD_PREP(EDP_MODE, 0));
 
 	return 0;
 }
@@ -864,6 +901,7 @@ static int analogix_dp_probe(struct udevice *dev)
 	const struct rockchip_connector *connector =
 		(const struct rockchip_connector *)dev_get_driver_data(dev);
 	const struct rockchip_dp_chip_data *pdata = connector->data;
+	struct udevice *syscon;
 	int ret;
 
 	dp->reg_base = dev_read_addr_ptr(dev);
@@ -871,6 +909,15 @@ static int analogix_dp_probe(struct udevice *dev)
 	dp->id = of_alias_get_id(ofnode_to_np(dev->node), "edp");
 	if (dp->id < 0)
 		dp->id = 0;
+
+	ret = uclass_get_device_by_phandle(UCLASS_SYSCON, dev, "rockchip,grf",
+					   &syscon);
+	if (!ret) {
+		dp->grf = syscon_get_regmap(syscon);
+		if (!dp->grf)
+			return -ENODEV;
+	}
+
 	ret = reset_get_bulk(dev, &dp->resets);
 	if (ret) {
 		dev_err(dev, "failed to get reset control: %d\n", ret);
@@ -891,12 +938,9 @@ static int analogix_dp_probe(struct udevice *dev)
 	dp->plat_data.dev_type = ROCKCHIP_DP;
 	dp->plat_data.subdev_type = pdata->chip_type;
 	dp->plat_data.ssc = pdata->ssc;
-	/*
-	 * Like Rockchip DisplayPort TRM indicate that "Main link
-	 * containing 4 physical lanes of 2.7/1.62 Gbps/lane".
-	 */
-	dp->video_info.max_link_rate = 0x0A;
-	dp->video_info.max_lane_count = 0x04;
+
+	dp->video_info.max_link_rate = pdata->max_link_rate;
+	dp->video_info.max_lane_count = pdata->max_lane_count;
 
 	dp->dev = dev;
 
@@ -908,6 +952,9 @@ static const struct rockchip_dp_chip_data rk3288_edp_platform_data = {
 	.lcdsel_big = 0 | BIT(21),
 	.lcdsel_lit = BIT(5) | BIT(21),
 	.chip_type = RK3288_DP,
+
+	.max_link_rate = DP_LINK_BW_2_7,
+	.max_lane_count = 4,
 };
 
 static const struct rockchip_connector rk3288_edp_driver_data = {
@@ -917,6 +964,9 @@ static const struct rockchip_connector rk3288_edp_driver_data = {
 
 static const struct rockchip_dp_chip_data rk3368_edp_platform_data = {
 	.chip_type = RK3368_EDP,
+
+	.max_link_rate = DP_LINK_BW_2_7,
+	.max_lane_count = 4,
 };
 
 static const struct rockchip_connector rk3368_edp_driver_data = {
@@ -929,6 +979,9 @@ static const struct rockchip_dp_chip_data rk3399_edp_platform_data = {
 	.lcdsel_big = 0 | BIT(21),
 	.lcdsel_lit = BIT(5) | BIT(21),
 	.chip_type = RK3399_EDP,
+
+	.max_link_rate = DP_LINK_BW_2_7,
+	.max_lane_count = 4,
 };
 
 static const struct rockchip_connector rk3399_edp_driver_data = {
@@ -939,6 +992,9 @@ static const struct rockchip_connector rk3399_edp_driver_data = {
 static const struct rockchip_dp_chip_data rk3568_edp_platform_data = {
 	.chip_type = RK3568_EDP,
 	.ssc = true,
+
+	.max_link_rate = DP_LINK_BW_2_7,
+	.max_lane_count = 4,
 };
 
 static const struct rockchip_connector rk3568_edp_driver_data = {
@@ -946,6 +1002,19 @@ static const struct rockchip_connector rk3568_edp_driver_data = {
 	 .data = &rk3568_edp_platform_data,
 };
 
+static const struct rockchip_dp_chip_data rk3588_edp_platform_data = {
+	.chip_type = RK3588_EDP,
+	.ssc = true,
+
+	.max_link_rate = DP_LINK_BW_5_4,
+	.max_lane_count = 4,
+};
+
+static const struct rockchip_connector rk3588_edp_driver_data = {
+	 .funcs = &analogix_dp_connector_funcs,
+	 .data = &rk3588_edp_platform_data,
+};
+
 static const struct udevice_id analogix_dp_ids[] = {
 	{
 		.compatible = "rockchip,rk3288-dp",
@@ -959,6 +1028,9 @@ static const struct udevice_id analogix_dp_ids[] = {
 	}, {
 		.compatible = "rockchip,rk3568-edp",
 		.data = (ulong)&rk3568_edp_driver_data,
+	}, {
+		.compatible = "rockchip,rk3588-edp",
+		.data = (ulong)&rk3588_edp_driver_data,
 	},
 	{}
 };
diff --git a/drivers/video/drm/analogix_dp.h b/drivers/video/drm/analogix_dp.h
index 70e4577de3..26815c79f5 100644
--- a/drivers/video/drm/analogix_dp.h
+++ b/drivers/video/drm/analogix_dp.h
@@ -8,6 +8,7 @@
 #define __DRM_ANALOGIX_DP_H__
 
 #include <generic-phy.h>
+#include <regmap.h>
 #include <reset.h>
 
 #include <drm/drm_dp_helper.h>
@@ -295,6 +296,7 @@
 #define LINK_QUAL_PATTERN_SET_D10_2		(0x1 << 2)
 #define LINK_QUAL_PATTERN_SET_DISABLE		(0x0 << 2)
 #define SW_TRAINING_PATTERN_SET_MASK		(0x3 << 0)
+#define SW_TRAINING_PATTERN_SET_PTN3		(0x3 << 0)
 #define SW_TRAINING_PATTERN_SET_PTN2		(0x2 << 0)
 #define SW_TRAINING_PATTERN_SET_PTN1		(0x1 << 0)
 #define SW_TRAINING_PATTERN_SET_NORMAL		(0x0 << 0)
@@ -436,6 +438,7 @@ enum pattern_set {
 	D10_2,
 	TRAINING_PTN1,
 	TRAINING_PTN2,
+	TRAINING_PTN3,
 	DP_NONE
 };
 
@@ -532,6 +535,7 @@ enum analogix_dp_sub_devtype {
 	RK3368_EDP,
 	RK3399_EDP,
 	RK3568_EDP,
+	RK3588_EDP
 };
 
 struct analogix_dp_plat_data {
@@ -544,6 +548,7 @@ struct analogix_dp_device {
 	int id;
 	struct udevice *dev;
 	void *reg_base;
+	struct regmap *grf;
 	struct phy phy;
 	struct reset_ctl_bulk resets;
 	struct gpio_desc hpd_gpio;
diff --git a/drivers/video/drm/analogix_dp_reg.c b/drivers/video/drm/analogix_dp_reg.c
index 927b3cf54f..8bc68653b5 100644
--- a/drivers/video/drm/analogix_dp_reg.c
+++ b/drivers/video/drm/analogix_dp_reg.c
@@ -916,12 +916,10 @@ bool analogix_dp_ssc_supported(struct analogix_dp_device *dp)
 void analogix_dp_set_link_bandwidth(struct analogix_dp_device *dp, u32 bwtype)
 {
 	union phy_configure_opts phy_cfg;
-	u32 reg, status;
+	u32 status;
 	int ret;
 
-	reg = bwtype;
-	if ((bwtype == DP_LINK_BW_2_7) || (bwtype == DP_LINK_BW_1_62))
-		analogix_dp_write(dp, ANALOGIX_DP_LINK_BW_SET, reg);
+	analogix_dp_write(dp, ANALOGIX_DP_LINK_BW_SET, bwtype);
 
 	phy_cfg.dp.lanes = dp->link_train.lane_count;
 	phy_cfg.dp.link_rate =
@@ -1006,6 +1004,8 @@ void analogix_dp_set_lane_link_training(struct analogix_dp_device *dp)
 	}
 
 	phy_cfg.dp.lanes = dp->link_train.lane_count;
+	phy_cfg.dp.link_rate =
+		drm_dp_bw_code_to_link_rate(dp->link_train.link_rate) / 100;
 	phy_cfg.dp.set_lanes = false;
 	phy_cfg.dp.set_rate = false;
 	phy_cfg.dp.set_voltages = true;
@@ -1061,6 +1061,10 @@ void analogix_dp_set_training_pattern(struct analogix_dp_device *dp,
 		reg = SCRAMBLING_DISABLE | SW_TRAINING_PATTERN_SET_PTN2;
 		analogix_dp_write(dp, ANALOGIX_DP_TRAINING_PTN_SET, reg);
 		break;
+	case TRAINING_PTN3:
+		reg = SCRAMBLING_DISABLE | SW_TRAINING_PATTERN_SET_PTN3;
+		analogix_dp_write(dp, ANALOGIX_DP_TRAINING_PTN_SET, reg);
+		break;
 	case DP_NONE:
 		reg = SCRAMBLING_ENABLE |
 			LINK_QUAL_PATTERN_SET_DISABLE |

commit 21069358ef335c0693ff5748e02ab7e0f50de589
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Thu Dec 2 14:59:00 2021 +0800

    video/drm: analogix_dp: Link training retry for abort case
    
    Change-Id: I936543e5e0a96a087b80916a5d5a334e7c07ea23
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/analogix_dp.c b/drivers/video/drm/analogix_dp.c
index 76673689cf..98c388ded7 100644
--- a/drivers/video/drm/analogix_dp.c
+++ b/drivers/video/drm/analogix_dp.c
@@ -485,21 +485,21 @@ static int analogix_dp_sw_link_training(struct analogix_dp_device *dp)
 static int analogix_dp_set_link_train(struct analogix_dp_device *dp,
 				      u32 count, u32 bwtype)
 {
-	int ret;
+	int i, ret;
 
-	ret = analogix_dp_init_training(dp, count, bwtype);
-	if (ret < 0) {
-		dev_err(dp->dev, "failed to init training\n");
-		return ret;
-	}
+	for (i = 0; i < 5; i++) {
+		ret = analogix_dp_init_training(dp, count, bwtype);
+		if (ret < 0) {
+			dev_err(dp->dev, "failed to init training\n");
+			return ret;
+		}
 
-	ret = analogix_dp_sw_link_training(dp);
-	if (ret < 0) {
-		dev_err(dp->dev, "failed to do sw link training\n");
-		return ret;
+		ret = analogix_dp_sw_link_training(dp);
+		if (!ret)
+			break;
 	}
 
-	return 0;
+	return ret;
 }
 
 static int analogix_dp_config_video(struct analogix_dp_device *dp)

commit 5b2919b9eed7c2fba8e0be9ea904f869d468c685
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Thu Nov 11 11:43:42 2021 +0800

    phy: Add support for Samsung HDMI/DP Combo PHY
    
    Add a new driver for Samsung HDPTX Combo transmit-PHY IP used
    in Rockchip RK3588 SoC. The HDPTX is a PHY hardmacro to
    support HDMI and DP interfaces.
    
    Currently, it supports only DP mode.
    
    Change-Id: Iab9a699fd27fd94f0388b2af36f89eaf42c9a62f
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index d86a2cafe5..af2befe522 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -94,6 +94,13 @@ config PHY_ROCKCHIP_NANENG_EDP
 	help
 	  Support for Rockchip eDP Transmitter PHY with Naneng IP block.
 
+config PHY_ROCKCHIP_SAMSUNG_HDPTX
+	bool "Rockchip Samsung HDMI/DP Combo PHY driver"
+	depends on ARCH_ROCKCHIP
+	select PHY
+	help
+	  Support for Rockchip HDMI/DP Combo PHY with Samsung IP block.
+
 config PHY_ROCKCHIP_SNPS_PCIE3
 	bool "Rockchip Snps PCIe3 PHY Driver"
 	depends on ARCH_ROCKCHIP
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index 58798fc588..a861bc48af 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -11,6 +11,7 @@ obj-$(CONFIG_PHY_ROCKCHIP_INNO_USB2) += phy-rockchip-inno-usb2.o
 obj-$(CONFIG_PHY_ROCKCHIP_NANENG_USB2) += phy-rockchip-naneng-usb2.o
 obj-$(CONFIG_PHY_ROCKCHIP_INNO_USB3) += phy-rockchip-inno-usb3.o
 obj-$(CONFIG_PHY_ROCKCHIP_NANENG_EDP) += phy-rockchip-naneng-edp.o
+obj-$(CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX) += phy-rockchip-samsung-hdptx.o
 obj-$(CONFIG_PHY_ROCKCHIP_SNPS_PCIE3) += phy-rockchip-snps-pcie3.o
 obj-$(CONFIG_PHY_ROCKCHIP_TYPEC) += phy-rockchip-typec.o
 obj-$(CONFIG_PHY_SANDBOX) += sandbox-phy.o
diff --git a/drivers/phy/phy-rockchip-samsung-hdptx.c b/drivers/phy/phy-rockchip-samsung-hdptx.c
new file mode 100644
index 0000000000..f5a733b0ef
--- /dev/null
+++ b/drivers/phy/phy-rockchip-samsung-hdptx.c
@@ -0,0 +1,985 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Rockchip HDMI/DP Combo PHY with Samsung IP block
+ *
+ * Copyright (c) 2021 Rockchip Electronics Co. Ltd.
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <generic-phy.h>
+#include <reset.h>
+#include <regmap.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <linux/bitfield.h>
+#include <linux/iopoll.h>
+#include <asm/arch/clock.h>
+
+#define HDPTXPHY_GRF_CON0			0x0000
+#define RO_REF_CLK_SEL				GENMASK(11, 10)
+#define LC_REF_CLK_SEL				GENMASK(9, 8)
+#define PLL_EN					BIT(7)
+#define BIAS_EN					BIT(6)
+#define BGR_EN					BIT(5)
+#define HDPTX_MODE_SEL				BIT(0)
+#define HDPTXPHY_GRF_STATUS0			0x0080
+#define PLL_LOCK_DONE				BIT(3)
+#define PHY_CLK_RDY				BIT(2)
+#define PHY_RDY					BIT(1)
+#define SB_RDY					BIT(0)
+
+/* cmn_reg0008 */
+#define OVRD_LCPLL_EN				BIT(7)
+#define LCPLL_EN				BIT(6)
+
+/* cmn_reg003C */
+#define ANA_LCPLL_RESERVED7			BIT(7)
+
+/* cmn_reg003D */
+#define OVRD_ROPLL_EN				BIT(7)
+#define ROPLL_EN				BIT(6)
+
+/* cmn_reg0046 */
+#define ROPLL_ANA_CPP_CTRL_COARSE		GENMASK(7, 4)
+#define ROPLL_ANA_CPP_CTRL_FINE			GENMASK(3, 0)
+
+/* cmn_reg0047 */
+#define ROPLL_ANA_LPF_C_SEL_COARSE		GENMASK(5, 3)
+#define ROPLL_ANA_LPF_C_SEL_FINE		GENMASK(2, 0)
+
+/* cmn_reg004E */
+#define ANA_ROPLL_PI_EN				BIT(5)
+
+/* cmn_reg0051 */
+#define ROPLL_PMS_MDIV				GENMASK(7, 0)
+
+/* cmn_reg0055 */
+#define ROPLL_PMS_MDIV_AFC			GENMASK(7, 0)
+
+/* cmn_reg0059 */
+#define ANA_ROPLL_PMS_PDIV			GENMASK(7, 4)
+#define ANA_ROPLL_PMS_REFDIV			GENMASK(3, 0)
+
+/* cmn_reg005A */
+#define ROPLL_PMS_SDIV_RBR			GENMASK(7, 4)
+#define ROPLL_PMS_SDIV_HBR			GENMASK(3, 0)
+
+/* cmn_reg005B */
+#define ROPLL_PMS_SDIV_HBR2			GENMASK(7, 4)
+#define ROPLL_PMS_SDIV_HBR3			GENMASK(3, 0)
+
+/* cmn_reg005D */
+#define OVRD_ROPLL_REF_CLK_SEL			BIT(5)
+#define ROPLL_REF_CLK_SEL			GENMASK(4, 3)
+
+/* cmn_reg005E */
+#define ANA_ROPLL_SDM_EN			BIT(6)
+#define OVRD_ROPLL_SDM_RSTN			BIT(5)
+#define ROPLL_SDM_RSTN				BIT(4)
+#define ROPLL_SDC_FRACTIONAL_EN_RBR		BIT(3)
+#define ROPLL_SDC_FRACTIONAL_EN_HBR		BIT(2)
+#define ROPLL_SDC_FRACTIONAL_EN_HBR2		BIT(1)
+#define ROPLL_SDC_FRACTIONAL_EN_HBR3		BIT(0)
+
+/* cmn_reg005F */
+#define OVRD_ROPLL_SDC_RSTN			BIT(5)
+#define ROPLL_SDC_RSTN				BIT(4)
+
+/* cmn_reg0060 */
+#define ROPLL_SDM_DENOMINATOR			GENMASK(7, 0)
+
+/* cmn_reg0064 */
+#define ROPLL_SDM_NUMERATOR_SIGN_RBR		BIT(3)
+#define ROPLL_SDM_NUMERATOR_SIGN_HBR		BIT(2)
+#define ROPLL_SDM_NUMERATOR_SIGN_HBR2		BIT(1)
+#define ROPLL_SDM_NUMERATOR_SIGN_HBR3		BIT(0)
+
+/* cmn_reg0065 */
+#define ROPLL_SDM_NUMERATOR			GENMASK(7, 0)
+
+/* cmn_reg0069 */
+#define ROPLL_SDC_N_RBR				GENMASK(2, 0)
+
+/* cmn_reg006A */
+#define ROPLL_SDC_N_HBR				GENMASK(5, 3)
+#define ROPLL_SDC_N_HBR2			GENMASK(2, 0)
+
+/* cmn_reg006B */
+#define ROPLL_SDC_N_HBR3			GENMASK(3, 1)
+
+/* cmn_reg006C */
+#define ROPLL_SDC_NUMERATOR			GENMASK(5, 0)
+
+/* cmn_reg0070 */
+#define ROPLL_SDC_DENOMINATOR			GENMASK(5, 0)
+
+/* cmn_reg0074 */
+#define OVRD_ROPLL_SDC_NDIV_RSTN		BIT(3)
+#define ROPLL_SDC_NDIV_RSTN			BIT(2)
+#define OVRD_ROPLL_SSC_EN			BIT(1)
+#define ROPLL_SSC_EN				BIT(0)
+
+/* cmn_reg0075 */
+#define ANA_ROPLL_SSC_FM_DEVIATION		GENMASK(5, 0)
+
+/* cmn_reg0076 */
+#define ANA_ROPLL_SSC_FM_FREQ			GENMASK(6, 2)
+
+/* cmn_reg0077 */
+#define ANA_ROPLL_SSC_CLK_DIV_SEL		GENMASK(6, 3)
+
+/* cmn_reg0081 */
+#define ANA_PLL_CD_TX_SER_RATE_SEL		BIT(3)
+#define ANA_PLL_CD_HSCLK_WEST_EN		BIT(1)
+#define ANA_PLL_CD_HSCLK_EAST_EN		BIT(0)
+
+/* cmn_reg0082 */
+#define ANA_PLL_CD_VREG_GAIN_CTRL		GENMASK(3, 0)
+
+/* cmn_reg0083 */
+#define ANA_PLL_CD_VREG_ICTRL			GENMASK(6, 5)
+
+/* cmn_reg0084 */
+#define PLL_LCRO_CLK_SEL			BIT(5)
+
+/* cmn_reg0085 */
+#define ANA_PLL_SYNC_LOSS_DET_MODE		GENMASK(1, 0)
+
+/* cmn_reg0087 */
+#define ANA_PLL_TX_HS_CLK_EN			BIT(2)
+
+/* cmn_reg0095 */
+#define DP_TX_LINK_BW				GENMASK(1, 0)
+
+/* cmn_reg0097 */
+#define DIG_CLK_SEL				BIT(1)
+
+/* cmn_reg0099 */
+#define SSC_EN					GENMASK(7, 6)
+#define CMN_ROPLL_ALONE_MODE			BIT(2)
+
+/* cmn_reg009A */
+#define HS_SPEED_SEL				BIT(0)
+
+/* cmn_reg009B */
+#define LS_SPEED_SEL				BIT(4)
+
+/* sb_reg0102 */
+#define OVRD_SB_RXTERM_EN			BIT(5)
+#define SB_RXRERM_EN				BIT(4)
+#define ANA_SB_RXTERM_OFFSP			GENMASK(3, 0)
+
+/* sb_reg0103 */
+#define ANA_SB_RXTERM_OFFSN			GENMASK(6, 3)
+#define OVRD_SB_RX_RESCAL_DONE			BIT(1)
+#define SB_RX_RESCAL_DONE			BIT(0)
+
+/* sb_reg0104 */
+#define OVRD_SB_EN				BIT(5)
+#define SB_EN					BIT(4)
+#define OVRD_SB_AUX_EN				BIT(1)
+#define SB_AUX_EN				BIT(0)
+
+/* sb_reg010D */
+#define ANA_SB_DMRX_LPBK_DATA			BIT(4)
+
+/* sb_reg010F */
+#define OVRD_SB_VREG_EN				BIT(7)
+#define ANA_SB_VREG_GAIN_CTRL			GENMASK(3, 0)
+
+/* sb_reg0110 */
+#define ANA_SB_VREG_OUT_SEL			BIT(1)
+#define ANA_SB_VREG_REF_SEL			BIT(0)
+
+/* sb_reg0113 */
+#define SB_VREG_EN				BIT(6)
+#define SB_RX_RCAL_OPT_CODE			GENMASK(5, 4)
+#define SB_RX_RTERM_CTRL			GENMASK(3, 0)
+
+/* sb_reg0114 */
+#define SB_TG_SB_EN_DELAY_TIME			GENMASK(5, 3)
+#define SB_TG_RXTERN_EN_DELAY_TIME		GENMASK(2, 0)
+
+/* sb_reg0115 */
+#define SB_READY_DELAY_TIME			GENMASK(5, 3)
+#define SB_TG_OSC_EN_DELAY_TIME			GENMASK(2, 0)
+
+/* sb_reg0116 */
+#define SB_TG_OSC_EN_TO_AFC_RSTN_DELAT_TIME	GENMASK(6, 4)
+
+/* sb_reg0117 */
+#define SB_TG_PLL_CD_VREG_FAST_PULSE_TIME	GENMASK(3, 0)
+
+/* sb_reg0118 */
+#define SB_TG_EARC_DMRX_RECVRD_CLK_CNT		GENMASK(7, 0)
+
+/* sb_reg011A */
+#define SB_TG_CNT_RUN_NO_7_0			GENMASK(7, 0)
+
+/* sb_reg011B */
+#define SB_EARC_SIG_DET_BYPASS			BIT(4)
+#define SB_AFC_TOL				GENMASK(3, 0)
+
+/* sb_reg011C */
+#define SB_AFC_STB_NUM				GENMASK(3, 0)
+
+/* sb_reg011D */
+#define SB_TG_OSC_CNT_MIN			GENMASK(7, 0)
+
+/* sb_reg011E */
+#define SB_TG_OSC_CNT_MAX			GENMASK(7, 0)
+
+/* sb_reg011F */
+#define SB_PWM_AFC_CTRL				GENMASK(7, 2)
+#define SB_RCAL_RSTN				BIT(1)
+
+/* sb_reg0120 */
+#define SB_AUX_EN_IN				BIT(7)
+
+/* sb_reg0123 */
+#define OVRD_SB_READY				BIT(5)
+#define SB_READY				BIT(4)
+
+/* lntop_reg0200 */
+#define PROTOCOL_SEL				BIT(2)
+
+/* lntop_reg0206 */
+#define DATA_BUS_WIDTH				GENMASK(2, 1)
+#define BUS_WIDTH_SEL				BIT(0)
+
+/* lntop_reg0207 */
+#define LANE_EN					GENMASK(3, 0)
+
+/* lane_reg0303 */
+#define OVRD_LN_TX_DRV_LVL_CTRL			BIT(5)
+#define LN_TX_DRV_LVL_CTRL			GENMASK(4, 0)
+
+/* lane_reg0304 */
+#define OVRD_LN_TX_DRV_POST_LVL_CTRL		BIT(4)
+#define LN_TX_DRV_POST_LVL_CTRL			GENMASK(3, 0)
+
+/* lane_reg0305 */
+#define OVRD_LN_TX_DRV_PRE_LVL_CTRL		BIT(6)
+#define LN_TX_DRV_PRE_LVL_CTRL			GENMASK(5, 2)
+
+/* lane_reg030A */
+#define LN_ANA_TX_JEQ_EN			BIT(4)
+#define LN_TX_JEQ_EVEN_CTRL_RBR			GENMASK(3, 0)
+
+/* lane_reg030B */
+#define LN_TX_JEQ_EVEN_CTRL_HBR			GENMASK(7, 4)
+#define LN_TX_JEQ_EVEN_CTRL_HBR2		GENMASK(3, 0)
+
+/* lane_reg030C */
+#define LN_TX_JEQ_EVEN_CTRL_HBR3		GENMASK(7, 4)
+#define LN_TX_JEQ_ODD_CTRL_RBR			GENMASK(3, 0)
+
+/* lane_reg030D */
+#define LN_TX_JEQ_ODD_CTRL_HBR			GENMASK(7, 4)
+#define LN_TX_JEQ_ODD_CTRL_HBR2			GENMASK(3, 0)
+
+/* lane_reg030E */
+#define LN_TX_JEQ_ODD_CTRL_HBR3			GENMASK(7, 4)
+
+/* lane_reg0307 */
+#define LN_ANA_TX_DRV_ACCDRV_POL_SEL		BIT(6)
+#define LN_ANA_TX_DRV_ACCDRV_CTRL		GENMASK(5, 3)
+
+/* lane_reg0310 */
+#define LN_ANA_TX_SYNC_LOSS_DET_MODE		GENMASK(1, 0)
+
+/* lane_reg0311 */
+#define LN_TX_SER_40BIT_EN_RBR			BIT(3)
+#define LN_TX_SER_40BIT_EN_HBR			BIT(2)
+#define LN_TX_SER_40BIT_EN_HBR2			BIT(1)
+#define LN_TX_SER_40BIT_EN_HBR3			BIT(0)
+
+/* lane_reg0316 */
+#define LN_ANA_TX_SER_VREG_GAIN_CTRL		GENMASK(3, 0)
+
+/* lane_reg031B */
+#define LN_ANA_TX_RESERVED			GENMASK(7, 0)
+
+/* lane_reg031E */
+#define LN_POLARITY_INV				BIT(2)
+
+#define LANE_REG(lane, offset)			(0x400 * (lane) + (offset))
+
+struct rockchip_hdptx_phy {
+	struct udevice *dev;
+	void __iomem *base;
+	struct regmap *grf;
+
+	struct reset_ctl apb_reset;
+	struct reset_ctl cmn_reset;
+	struct reset_ctl init_reset;
+	struct reset_ctl lane_reset;
+	u32 lane_polarity_invert[4];
+};
+
+enum {
+	DP_BW_RBR,
+	DP_BW_HBR,
+	DP_BW_HBR2,
+	DP_BW_HBR3,
+};
+
+static struct {
+	u8 tx_amp;
+	u8 tx_de_emp;
+	u8 tx_pre_emp;
+} training_table[4][4] = {
+	/* voltage swing 0, pre-emphasis 0->3 */
+	{
+		{ .tx_amp = 0x3, .tx_de_emp = 0x1, .tx_pre_emp = 0x1 },
+		{ .tx_amp = 0x9, .tx_de_emp = 0x7, .tx_pre_emp = 0x0 },
+		{ .tx_amp = 0xc, .tx_de_emp = 0xa, .tx_pre_emp = 0x0 },
+		{ .tx_amp = 0xd, .tx_de_emp = 0xc, .tx_pre_emp = 0x0 }
+	},
+
+	/* voltage swing 1, pre-emphasis 0->2 */
+	{
+		{ .tx_amp = 0x6, .tx_de_emp = 0x1, .tx_pre_emp = 0x1 },
+		{ .tx_amp = 0xc, .tx_de_emp = 0x7, .tx_pre_emp = 0x0 },
+		{ .tx_amp = 0xd, .tx_de_emp = 0x9, .tx_pre_emp = 0x0 },
+	},
+
+	/* voltage swing 2, pre-emphasis 0->1 */
+	{
+		{ .tx_amp = 0x9, .tx_de_emp = 0x1, .tx_pre_emp = 0x1 },
+		{ .tx_amp = 0xd, .tx_de_emp = 0x6, .tx_pre_emp = 0x0 },
+	},
+
+	/* voltage swing 3, pre-emphasis 0 */
+	{
+		{ .tx_amp = 0xd, .tx_de_emp = 0x1, .tx_pre_emp = 0x1 },
+	}
+};
+
+static inline void phy_write(struct rockchip_hdptx_phy *hdptx, uint reg,
+			     uint val)
+{
+	writel(val, hdptx->base + reg);
+}
+
+static inline uint phy_read(struct rockchip_hdptx_phy *hdptx, uint reg)
+{
+	return readl(hdptx->base + reg);
+}
+
+static void phy_update_bits(struct rockchip_hdptx_phy *hdptx, uint reg,
+			    uint mask, uint val)
+{
+	uint orig, tmp;
+
+	orig = phy_read(hdptx, reg);
+	tmp = orig & ~mask;
+	tmp |= val & mask;
+	phy_write(hdptx, reg, tmp);
+}
+
+static void grf_write(struct rockchip_hdptx_phy *hdptx, uint reg,
+		      uint mask, uint val)
+{
+	regmap_write(hdptx->grf, reg, (mask << 16) | (val & mask));
+}
+
+static int rockchip_hdptx_phy_set_mode(struct phy *phy, enum phy_mode mode,
+				       int submode)
+{
+	return 0;
+}
+
+static int rockchip_hdptx_phy_verify_config(struct rockchip_hdptx_phy *hdptx,
+					    struct phy_configure_opts_dp *dp)
+{
+	int i;
+
+	if (dp->set_rate) {
+		switch (dp->link_rate) {
+		case 1620:
+		case 2700:
+		case 5400:
+			break;
+		default:
+			return -EINVAL;
+		}
+	}
+
+	switch (dp->lanes) {
+	case 1:
+	case 2:
+	case 4:
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	if (dp->set_voltages) {
+		for (i = 0; i < dp->lanes; i++) {
+			if (dp->voltage[i] > 3 || dp->pre[i] > 3)
+				return -EINVAL;
+
+			if (dp->voltage[i] + dp->pre[i] > 3)
+				return -EINVAL;
+		}
+	}
+
+	return 0;
+}
+
+static void rockchip_hdptx_phy_set_voltage(struct rockchip_hdptx_phy *hdptx,
+					   struct phy_configure_opts_dp *dp,
+					   u8 lane)
+{
+	u32 val;
+
+	phy_update_bits(hdptx, LANE_REG(lane, 0x0c28), LN_ANA_TX_JEQ_EN,
+			FIELD_PREP(LN_ANA_TX_JEQ_EN, 0x1));
+
+	switch (dp->link_rate) {
+	case 1620:
+		phy_update_bits(hdptx, LANE_REG(lane, 0x0c28),
+				LN_TX_JEQ_EVEN_CTRL_RBR,
+				FIELD_PREP(LN_TX_JEQ_EVEN_CTRL_RBR, 0x7));
+		phy_update_bits(hdptx, LANE_REG(lane, 0x0c30),
+				LN_TX_JEQ_ODD_CTRL_RBR,
+				FIELD_PREP(LN_TX_JEQ_ODD_CTRL_RBR, 0x7));
+		phy_update_bits(hdptx, LANE_REG(lane, 0x0c44),
+				LN_TX_SER_40BIT_EN_RBR,
+				FIELD_PREP(LN_TX_SER_40BIT_EN_RBR, 0x1));
+		break;
+	case 2700:
+		phy_update_bits(hdptx, LANE_REG(lane, 0x0c2c),
+				LN_TX_JEQ_EVEN_CTRL_HBR,
+				FIELD_PREP(LN_TX_JEQ_EVEN_CTRL_HBR, 0x7));
+		phy_update_bits(hdptx, LANE_REG(lane, 0x0c34),
+				LN_TX_JEQ_ODD_CTRL_HBR,
+				FIELD_PREP(LN_TX_JEQ_ODD_CTRL_HBR, 0x7));
+		phy_update_bits(hdptx, LANE_REG(lane, 0x0c44),
+				LN_TX_SER_40BIT_EN_HBR,
+				FIELD_PREP(LN_TX_SER_40BIT_EN_HBR, 0x1));
+		break;
+	case 5400:
+		phy_update_bits(hdptx, LANE_REG(lane, 0x0c2c),
+				LN_TX_JEQ_EVEN_CTRL_HBR2,
+				FIELD_PREP(LN_TX_JEQ_EVEN_CTRL_HBR2, 0x7));
+		phy_update_bits(hdptx, LANE_REG(lane, 0x0c34),
+				LN_TX_JEQ_ODD_CTRL_HBR2,
+				FIELD_PREP(LN_TX_JEQ_ODD_CTRL_HBR2, 0x7));
+		phy_update_bits(hdptx, LANE_REG(lane, 0x0c44),
+				LN_TX_SER_40BIT_EN_HBR2,
+				FIELD_PREP(LN_TX_SER_40BIT_EN_HBR2, 0x1));
+		break;
+	}
+
+	val = training_table[dp->voltage[lane]][dp->pre[lane]].tx_amp;
+	phy_update_bits(hdptx, LANE_REG(lane, 0x0c0c),
+			OVRD_LN_TX_DRV_LVL_CTRL | LN_TX_DRV_LVL_CTRL,
+			FIELD_PREP(OVRD_LN_TX_DRV_LVL_CTRL, 0x1) |
+			FIELD_PREP(LN_TX_DRV_LVL_CTRL, val));
+
+	val = training_table[dp->voltage[lane]][dp->pre[lane]].tx_de_emp;
+	phy_update_bits(hdptx, LANE_REG(lane, 0x0c10),
+			OVRD_LN_TX_DRV_POST_LVL_CTRL | LN_TX_DRV_POST_LVL_CTRL,
+			FIELD_PREP(OVRD_LN_TX_DRV_POST_LVL_CTRL, 0x1) |
+			FIELD_PREP(LN_TX_DRV_POST_LVL_CTRL, val));
+
+	val = training_table[dp->voltage[lane]][dp->pre[lane]].tx_pre_emp;
+	phy_update_bits(hdptx, LANE_REG(lane, 0x0c14),
+			OVRD_LN_TX_DRV_PRE_LVL_CTRL | LN_TX_DRV_PRE_LVL_CTRL,
+			FIELD_PREP(OVRD_LN_TX_DRV_PRE_LVL_CTRL, 0x1) |
+			FIELD_PREP(LN_TX_DRV_PRE_LVL_CTRL, val));
+
+	phy_update_bits(hdptx, LANE_REG(lane, 0x0c1c),
+			LN_ANA_TX_DRV_ACCDRV_POL_SEL | LN_ANA_TX_DRV_ACCDRV_CTRL,
+			FIELD_PREP(LN_ANA_TX_DRV_ACCDRV_POL_SEL, 0x1) |
+			FIELD_PREP(LN_ANA_TX_DRV_ACCDRV_CTRL, 0x4));
+	phy_update_bits(hdptx, LANE_REG(lane, 0x0c6c), LN_ANA_TX_RESERVED,
+			FIELD_PREP(LN_ANA_TX_RESERVED, 0x1));
+	phy_update_bits(hdptx, LANE_REG(lane, 0x0c58),
+			LN_ANA_TX_SER_VREG_GAIN_CTRL,
+			FIELD_PREP(LN_ANA_TX_SER_VREG_GAIN_CTRL, 0x2));
+	phy_update_bits(hdptx, LANE_REG(lane, 0x0c40),
+			LN_ANA_TX_SYNC_LOSS_DET_MODE,
+			FIELD_PREP(LN_ANA_TX_SYNC_LOSS_DET_MODE, 0x3));
+}
+
+static int rockchip_hdptx_phy_set_voltages(struct rockchip_hdptx_phy *hdptx,
+					   struct phy_configure_opts_dp *dp)
+{
+	u8 lane;
+
+	for (lane = 0; lane < dp->lanes; lane++)
+		rockchip_hdptx_phy_set_voltage(hdptx, dp, lane);
+
+	return 0;
+}
+
+static int rockchip_hdptx_phy_set_rate(struct rockchip_hdptx_phy *hdptx,
+				       struct phy_configure_opts_dp *dp)
+{
+	u32 bw, status;
+	int ret;
+
+	reset_assert(&hdptx->lane_reset);
+	udelay(10);
+	reset_assert(&hdptx->cmn_reset);
+	udelay(10);
+	grf_write(hdptx, HDPTXPHY_GRF_CON0, PLL_EN, FIELD_PREP(PLL_EN, 0x0));
+	udelay(10);
+	phy_update_bits(hdptx, 0x081c, LANE_EN, FIELD_PREP(LANE_EN, 0x0));
+
+	switch (dp->link_rate) {
+	case 1620:
+		bw = DP_BW_RBR;
+		break;
+	case 2700:
+		bw = DP_BW_HBR;
+		break;
+	case 5400:
+		bw = DP_BW_HBR2;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	phy_update_bits(hdptx, 0x0254, DP_TX_LINK_BW,
+			FIELD_PREP(DP_TX_LINK_BW, bw));
+
+	if (dp->ssc) {
+		phy_update_bits(hdptx, 0x01d0, OVRD_ROPLL_SSC_EN | ROPLL_SSC_EN,
+				FIELD_PREP(OVRD_ROPLL_SSC_EN, 0x1) |
+				FIELD_PREP(ROPLL_SSC_EN, 0x1));
+		phy_update_bits(hdptx, 0x01d4, ANA_ROPLL_SSC_FM_DEVIATION,
+				FIELD_PREP(ANA_ROPLL_SSC_FM_DEVIATION, 0xe));
+		phy_update_bits(hdptx, 0x01d8, ANA_ROPLL_SSC_FM_FREQ,
+				FIELD_PREP(ANA_ROPLL_SSC_FM_FREQ, 0x1a));
+		phy_update_bits(hdptx, 0x0264, SSC_EN, FIELD_PREP(SSC_EN, 0x2));
+	} else {
+		phy_update_bits(hdptx, 0x01d0, OVRD_ROPLL_SSC_EN | ROPLL_SSC_EN,
+				FIELD_PREP(OVRD_ROPLL_SSC_EN, 0x1) |
+				FIELD_PREP(ROPLL_SSC_EN, 0x0));
+		phy_update_bits(hdptx, 0x01d4, ANA_ROPLL_SSC_FM_DEVIATION,
+				FIELD_PREP(ANA_ROPLL_SSC_FM_DEVIATION, 0x20));
+		phy_update_bits(hdptx, 0x01d8, ANA_ROPLL_SSC_FM_FREQ,
+				FIELD_PREP(ANA_ROPLL_SSC_FM_FREQ, 0xc));
+		phy_update_bits(hdptx, 0x0264, SSC_EN, FIELD_PREP(SSC_EN, 0x0));
+	}
+
+	grf_write(hdptx, HDPTXPHY_GRF_CON0, PLL_EN, FIELD_PREP(PLL_EN, 0x1));
+	udelay(10);
+	reset_deassert(&hdptx->cmn_reset);
+	udelay(10);
+
+	ret = regmap_read_poll_timeout(hdptx->grf, HDPTXPHY_GRF_STATUS0,
+				       status, FIELD_GET(PLL_LOCK_DONE, status),
+				       50, 1000);
+	if (ret) {
+		dev_err(hdptx->dev, "timeout waiting for pll_lock_done\n");
+		return ret;
+	}
+
+	phy_update_bits(hdptx, 0x081c, LANE_EN,
+			FIELD_PREP(LANE_EN, GENMASK(dp->lanes - 1, 0)));
+
+	reset_deassert(&hdptx->lane_reset);
+	udelay(10);
+
+	ret = regmap_read_poll_timeout(hdptx->grf, HDPTXPHY_GRF_STATUS0,
+				       status, FIELD_GET(PHY_RDY, status),
+				       50, 1000);
+	if (ret) {
+		dev_err(hdptx->dev, "timeout waiting for phy_rdy\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+static int rockchip_hdptx_phy_configure(struct phy *phy,
+					union phy_configure_opts *opts)
+{
+	struct rockchip_hdptx_phy *hdptx = dev_get_priv(phy->dev);
+	enum phy_mode mode = generic_phy_get_mode(phy);
+	int ret;
+
+	if (mode != PHY_MODE_DP)
+		return -EINVAL;
+
+	ret = rockchip_hdptx_phy_verify_config(hdptx, &opts->dp);
+	if (ret) {
+		dev_err(hdptx->dev, "invalid params for phy configure\n");
+		return ret;
+	}
+
+	if (opts->dp.set_rate) {
+		ret = rockchip_hdptx_phy_set_rate(hdptx, &opts->dp);
+		if (ret) {
+			dev_err(hdptx->dev, "failed to set rate: %d\n", ret);
+			return ret;
+		}
+	}
+
+	if (opts->dp.set_voltages) {
+		ret = rockchip_hdptx_phy_set_voltages(hdptx, &opts->dp);
+		if (ret) {
+			dev_err(hdptx->dev, "failed to set voltages: %d\n",
+				ret);
+			return ret;
+		}
+	}
+
+	return 0;
+}
+
+static void rockchip_hdptx_phy_dp_pll_init(struct rockchip_hdptx_phy *hdptx)
+{
+	phy_update_bits(hdptx, 0x0020, OVRD_LCPLL_EN | LCPLL_EN,
+			FIELD_PREP(OVRD_LCPLL_EN, 0x1) |
+			FIELD_PREP(LCPLL_EN, 0x0));
+	phy_update_bits(hdptx, 0x00f4, OVRD_ROPLL_EN | ROPLL_EN,
+			FIELD_PREP(OVRD_ROPLL_EN, 0x1) |
+			FIELD_PREP(ROPLL_EN, 0x1));
+	phy_update_bits(hdptx, 0x0138, ANA_ROPLL_PI_EN,
+			FIELD_PREP(ANA_ROPLL_PI_EN, 0x1));
+
+	phy_write(hdptx, 0x0144, FIELD_PREP(ROPLL_PMS_MDIV, 0x87));
+	phy_write(hdptx, 0x0148, FIELD_PREP(ROPLL_PMS_MDIV, 0x71));
+	phy_write(hdptx, 0x014c, FIELD_PREP(ROPLL_PMS_MDIV, 0x71));
+
+	phy_write(hdptx, 0x0154, FIELD_PREP(ROPLL_PMS_MDIV_AFC, 0x87));
+	phy_write(hdptx, 0x0158, FIELD_PREP(ROPLL_PMS_MDIV_AFC, 0x71));
+	phy_write(hdptx, 0x015c, FIELD_PREP(ROPLL_PMS_MDIV_AFC, 0x71));
+
+	phy_write(hdptx, 0x0164, FIELD_PREP(ANA_ROPLL_PMS_PDIV, 0x1) |
+		  FIELD_PREP(ANA_ROPLL_PMS_REFDIV, 0x1));
+
+	phy_write(hdptx, 0x0168, FIELD_PREP(ROPLL_PMS_SDIV_RBR, 0x3) |
+		  FIELD_PREP(ROPLL_PMS_SDIV_HBR, 0x1));
+	phy_update_bits(hdptx, 0x016c, ROPLL_PMS_SDIV_HBR2,
+			FIELD_PREP(ROPLL_PMS_SDIV_HBR2, 0x0));
+
+	phy_update_bits(hdptx, 0x0178, ANA_ROPLL_SDM_EN,
+			FIELD_PREP(ANA_ROPLL_SDM_EN, 0x1));
+	phy_update_bits(hdptx, 0x0178, OVRD_ROPLL_SDM_RSTN | ROPLL_SDM_RSTN,
+			FIELD_PREP(OVRD_ROPLL_SDM_RSTN, 0x1) |
+			FIELD_PREP(ROPLL_SDM_RSTN, 0x1));
+	phy_update_bits(hdptx, 0x0178, ROPLL_SDC_FRACTIONAL_EN_RBR,
+			FIELD_PREP(ROPLL_SDC_FRACTIONAL_EN_RBR, 0x1));
+	phy_update_bits(hdptx, 0x0178, ROPLL_SDC_FRACTIONAL_EN_HBR,
+			FIELD_PREP(ROPLL_SDC_FRACTIONAL_EN_HBR, 0x1));
+	phy_update_bits(hdptx, 0x0178, ROPLL_SDC_FRACTIONAL_EN_HBR2,
+			FIELD_PREP(ROPLL_SDC_FRACTIONAL_EN_HBR2, 0x1));
+	phy_update_bits(hdptx, 0x017c, OVRD_ROPLL_SDC_RSTN | ROPLL_SDC_RSTN,
+			FIELD_PREP(OVRD_ROPLL_SDC_RSTN, 0x1) |
+			FIELD_PREP(ROPLL_SDC_RSTN, 0x1));
+
+	phy_write(hdptx, 0x0180, FIELD_PREP(ROPLL_SDM_DENOMINATOR, 0x21));
+	phy_write(hdptx, 0x0184, FIELD_PREP(ROPLL_SDM_DENOMINATOR, 0x27));
+	phy_write(hdptx, 0x0188, FIELD_PREP(ROPLL_SDM_DENOMINATOR, 0x27));
+
+	phy_update_bits(hdptx, 0x0190, ROPLL_SDM_NUMERATOR_SIGN_RBR |
+			ROPLL_SDM_NUMERATOR_SIGN_HBR |
+			ROPLL_SDM_NUMERATOR_SIGN_HBR2,
+			FIELD_PREP(ROPLL_SDM_NUMERATOR_SIGN_RBR, 0x0) |
+			FIELD_PREP(ROPLL_SDM_NUMERATOR_SIGN_HBR, 0x1) |
+			FIELD_PREP(ROPLL_SDM_NUMERATOR_SIGN_HBR2, 0x1));
+
+	phy_write(hdptx, 0x0194, FIELD_PREP(ROPLL_SDM_NUMERATOR, 0x0));
+	phy_write(hdptx, 0x0198, FIELD_PREP(ROPLL_SDM_NUMERATOR, 0xd));
+	phy_write(hdptx, 0x019c, FIELD_PREP(ROPLL_SDM_NUMERATOR, 0xd));
+
+	phy_update_bits(hdptx, 0x01a4, ROPLL_SDC_N_RBR,
+			FIELD_PREP(ROPLL_SDC_N_RBR, 0x2));
+	phy_update_bits(hdptx, 0x01a8, ROPLL_SDC_N_HBR | ROPLL_SDC_N_HBR2,
+			FIELD_PREP(ROPLL_SDC_N_HBR, 0x1) |
+			FIELD_PREP(ROPLL_SDC_N_HBR2, 0x1));
+
+	phy_write(hdptx, 0x01b0, FIELD_PREP(ROPLL_SDC_NUMERATOR, 0x3));
+	phy_write(hdptx, 0x01b4, FIELD_PREP(ROPLL_SDC_NUMERATOR, 0x7));
+	phy_write(hdptx, 0x01b8, FIELD_PREP(ROPLL_SDC_NUMERATOR, 0x7));
+
+	phy_write(hdptx, 0x01c0, FIELD_PREP(ROPLL_SDC_DENOMINATOR, 0x8));
+	phy_write(hdptx, 0x01c4, FIELD_PREP(ROPLL_SDC_DENOMINATOR, 0x18));
+	phy_write(hdptx, 0x01c8, FIELD_PREP(ROPLL_SDC_DENOMINATOR, 0x18));
+
+	phy_update_bits(hdptx, 0x01d0, OVRD_ROPLL_SDC_NDIV_RSTN |
+			ROPLL_SDC_NDIV_RSTN,
+			FIELD_PREP(OVRD_ROPLL_SDC_NDIV_RSTN, 0x1) |
+			FIELD_PREP(ROPLL_SDC_NDIV_RSTN, 0x1));
+	phy_update_bits(hdptx, 0x01dc, ANA_ROPLL_SSC_CLK_DIV_SEL,
+			FIELD_PREP(ANA_ROPLL_SSC_CLK_DIV_SEL, 0x1));
+
+	phy_update_bits(hdptx, 0x0118, ROPLL_ANA_CPP_CTRL_COARSE |
+			ROPLL_ANA_CPP_CTRL_FINE,
+			FIELD_PREP(ROPLL_ANA_CPP_CTRL_COARSE, 0xe) |
+			FIELD_PREP(ROPLL_ANA_CPP_CTRL_FINE, 0xe));
+	phy_update_bits(hdptx, 0x011c, ROPLL_ANA_LPF_C_SEL_COARSE |
+			ROPLL_ANA_LPF_C_SEL_FINE,
+			FIELD_PREP(ROPLL_ANA_LPF_C_SEL_COARSE, 0x4) |
+			FIELD_PREP(ROPLL_ANA_LPF_C_SEL_FINE, 0x4));
+
+	phy_update_bits(hdptx, 0x0204, ANA_PLL_CD_TX_SER_RATE_SEL,
+			FIELD_PREP(ANA_PLL_CD_TX_SER_RATE_SEL, 0x0));
+
+	phy_update_bits(hdptx, 0x025c, DIG_CLK_SEL,
+			FIELD_PREP(DIG_CLK_SEL, 0x1));
+	phy_update_bits(hdptx, 0x021c, ANA_PLL_TX_HS_CLK_EN,
+			FIELD_PREP(ANA_PLL_TX_HS_CLK_EN, 0x1));
+	phy_update_bits(hdptx, 0x0204, ANA_PLL_CD_HSCLK_EAST_EN |
+			ANA_PLL_CD_HSCLK_WEST_EN,
+			FIELD_PREP(ANA_PLL_CD_HSCLK_EAST_EN, 0x1) |
+			FIELD_PREP(ANA_PLL_CD_HSCLK_WEST_EN, 0x0));
+	phy_update_bits(hdptx, 0x0264, CMN_ROPLL_ALONE_MODE,
+			FIELD_PREP(CMN_ROPLL_ALONE_MODE, 0x1));
+	phy_update_bits(hdptx, 0x0208, ANA_PLL_CD_VREG_GAIN_CTRL,
+			FIELD_PREP(ANA_PLL_CD_VREG_GAIN_CTRL, 0x4));
+	phy_update_bits(hdptx, 0x00f0, ANA_LCPLL_RESERVED7,
+			FIELD_PREP(ANA_LCPLL_RESERVED7, 0x1));
+	phy_update_bits(hdptx, 0x020c, ANA_PLL_CD_VREG_ICTRL,
+			FIELD_PREP(ANA_PLL_CD_VREG_ICTRL, 0x1));
+	phy_update_bits(hdptx, 0x0214, ANA_PLL_SYNC_LOSS_DET_MODE,
+			FIELD_PREP(ANA_PLL_SYNC_LOSS_DET_MODE, 0x3));
+	phy_update_bits(hdptx, 0x0210, PLL_LCRO_CLK_SEL,
+			FIELD_PREP(PLL_LCRO_CLK_SEL, 0x1));
+	phy_update_bits(hdptx, 0x0268, HS_SPEED_SEL,
+			FIELD_PREP(HS_SPEED_SEL, 0x1));
+	phy_update_bits(hdptx, 0x026c, LS_SPEED_SEL,
+			FIELD_PREP(LS_SPEED_SEL, 0x1));
+}
+
+static int rockchip_hdptx_phy_dp_aux_init(struct rockchip_hdptx_phy *hdptx)
+{
+	u32 status;
+	int ret;
+
+	phy_update_bits(hdptx, 0x044c, SB_RX_RCAL_OPT_CODE | SB_RX_RTERM_CTRL,
+			FIELD_PREP(SB_RX_RCAL_OPT_CODE, 0x1) |
+			FIELD_PREP(SB_RX_RTERM_CTRL, 0x3));
+	phy_update_bits(hdptx, 0x0450, SB_TG_SB_EN_DELAY_TIME |
+			SB_TG_RXTERN_EN_DELAY_TIME,
+			FIELD_PREP(SB_TG_SB_EN_DELAY_TIME, 0x2) |
+			FIELD_PREP(SB_TG_RXTERN_EN_DELAY_TIME, 0x2));
+	phy_update_bits(hdptx, 0x0454, SB_READY_DELAY_TIME |
+			SB_TG_OSC_EN_DELAY_TIME,
+			FIELD_PREP(SB_READY_DELAY_TIME, 0x2) |
+			FIELD_PREP(SB_TG_OSC_EN_DELAY_TIME, 0x2));
+	phy_update_bits(hdptx, 0x0458, SB_TG_OSC_EN_TO_AFC_RSTN_DELAT_TIME,
+			FIELD_PREP(SB_TG_OSC_EN_TO_AFC_RSTN_DELAT_TIME, 0x2));
+	phy_update_bits(hdptx, 0x045c, SB_TG_PLL_CD_VREG_FAST_PULSE_TIME,
+			FIELD_PREP(SB_TG_PLL_CD_VREG_FAST_PULSE_TIME, 0x4));
+	phy_update_bits(hdptx, 0x0460, SB_TG_EARC_DMRX_RECVRD_CLK_CNT,
+			FIELD_PREP(SB_TG_EARC_DMRX_RECVRD_CLK_CNT, 0xa));
+	phy_update_bits(hdptx, 0x0468, SB_TG_CNT_RUN_NO_7_0,
+			FIELD_PREP(SB_TG_CNT_RUN_NO_7_0, 0x3));
+	phy_update_bits(hdptx, 0x046c, SB_EARC_SIG_DET_BYPASS | SB_AFC_TOL,
+			FIELD_PREP(SB_EARC_SIG_DET_BYPASS, 0x1) |
+			FIELD_PREP(SB_AFC_TOL, 0x3));
+	phy_update_bits(hdptx, 0x0470, SB_AFC_STB_NUM,
+			FIELD_PREP(SB_AFC_STB_NUM, 0x4));
+	phy_update_bits(hdptx, 0x0474, SB_TG_OSC_CNT_MIN,
+			FIELD_PREP(SB_TG_OSC_CNT_MIN, 0x67));
+	phy_update_bits(hdptx, 0x0478, SB_TG_OSC_CNT_MAX,
+			FIELD_PREP(SB_TG_OSC_CNT_MAX, 0x6a));
+	phy_update_bits(hdptx, 0x047c, SB_PWM_AFC_CTRL,
+			FIELD_PREP(SB_PWM_AFC_CTRL, 0x5));
+	phy_update_bits(hdptx, 0x0434, ANA_SB_DMRX_LPBK_DATA,
+			FIELD_PREP(ANA_SB_DMRX_LPBK_DATA, 0x1));
+	phy_update_bits(hdptx, 0x0440, ANA_SB_VREG_OUT_SEL |
+			ANA_SB_VREG_REF_SEL,
+			FIELD_PREP(ANA_SB_VREG_OUT_SEL, 0x1) |
+			FIELD_PREP(ANA_SB_VREG_REF_SEL, 0x1));
+	phy_update_bits(hdptx, 0x043c, ANA_SB_VREG_GAIN_CTRL,
+			FIELD_PREP(ANA_SB_VREG_GAIN_CTRL, 0x0));
+	phy_update_bits(hdptx, 0x0408, ANA_SB_RXTERM_OFFSP,
+			FIELD_PREP(ANA_SB_RXTERM_OFFSP, 0x3));
+	phy_update_bits(hdptx, 0x040c, ANA_SB_RXTERM_OFFSN,
+			FIELD_PREP(ANA_SB_RXTERM_OFFSN, 0x3));
+	phy_update_bits(hdptx, 0x047c, SB_RCAL_RSTN,
+			FIELD_PREP(SB_RCAL_RSTN, 0x1));
+	phy_update_bits(hdptx, 0x0410, SB_AUX_EN,
+			FIELD_PREP(SB_AUX_EN, 0x1));
+	phy_update_bits(hdptx, 0x0480, SB_AUX_EN_IN,
+			FIELD_PREP(SB_AUX_EN_IN, 0x1));
+	phy_update_bits(hdptx, 0x040c, OVRD_SB_RX_RESCAL_DONE,
+			FIELD_PREP(OVRD_SB_RX_RESCAL_DONE, 0x1));
+	phy_update_bits(hdptx, 0x0410, OVRD_SB_EN,
+			FIELD_PREP(OVRD_SB_EN, 0x1));
+	phy_update_bits(hdptx, 0x0408, OVRD_SB_RXTERM_EN,
+			FIELD_PREP(OVRD_SB_RXTERM_EN, 0x1));
+	phy_update_bits(hdptx, 0x043c, OVRD_SB_VREG_EN,
+			FIELD_PREP(OVRD_SB_VREG_EN, 0x1));
+	phy_update_bits(hdptx, 0x0410, OVRD_SB_AUX_EN,
+			FIELD_PREP(OVRD_SB_AUX_EN, 0x1));
+
+	grf_write(hdptx, HDPTXPHY_GRF_CON0, BGR_EN, FIELD_PREP(BGR_EN, 0x1));
+	grf_write(hdptx, HDPTXPHY_GRF_CON0, BIAS_EN, FIELD_PREP(BIAS_EN, 0x1));
+	udelay(10);
+	reset_deassert(&hdptx->init_reset);
+	udelay(1000);
+	reset_deassert(&hdptx->cmn_reset);
+	udelay(20);
+
+	phy_update_bits(hdptx, 0x040c, SB_RX_RESCAL_DONE,
+			FIELD_PREP(SB_RX_RESCAL_DONE, 0x1));
+	udelay(100);
+	phy_update_bits(hdptx, 0x0410, SB_EN, FIELD_PREP(SB_EN, 0x1));
+	udelay(100);
+	phy_update_bits(hdptx, 0x0408, SB_RXRERM_EN,
+			FIELD_PREP(SB_RXRERM_EN, 0x1));
+	udelay(10);
+	phy_update_bits(hdptx, 0x043c, SB_VREG_EN, FIELD_PREP(SB_VREG_EN, 0x1));
+	udelay(10);
+	phy_update_bits(hdptx, 0x0410, SB_AUX_EN, FIELD_PREP(SB_AUX_EN, 0x1));
+	udelay(100);
+
+	ret = regmap_read_poll_timeout(hdptx->grf, HDPTXPHY_GRF_STATUS0,
+				       status, FIELD_GET(SB_RDY, status),
+				       50, 1000);
+	if (ret) {
+		dev_err(hdptx->dev, "timeout waiting for sb_rdy\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+static void rockchip_hdptx_phy_reset(struct rockchip_hdptx_phy *hdptx)
+{
+	reset_assert(&hdptx->lane_reset);
+	reset_assert(&hdptx->cmn_reset);
+	reset_assert(&hdptx->init_reset);
+
+	grf_write(hdptx, HDPTXPHY_GRF_CON0, PLL_EN, FIELD_PREP(PLL_EN, 0));
+	grf_write(hdptx, HDPTXPHY_GRF_CON0, BIAS_EN, FIELD_PREP(BIAS_EN, 0));
+	grf_write(hdptx, HDPTXPHY_GRF_CON0, BGR_EN, FIELD_PREP(BGR_EN, 0));
+}
+
+static int rockchip_hdptx_phy_power_on(struct phy *phy)
+{
+	struct rockchip_hdptx_phy *hdptx = dev_get_priv(phy->dev);
+	enum phy_mode mode = generic_phy_get_mode(phy);
+	u32 lane;
+
+	rockchip_hdptx_phy_reset(hdptx);
+
+	reset_assert(&hdptx->apb_reset);
+	udelay(10);
+	reset_deassert(&hdptx->apb_reset);
+
+	for (lane = 0; lane < 4; lane++) {
+		u32 invert = hdptx->lane_polarity_invert[lane];
+
+		phy_update_bits(hdptx, LANE_REG(lane, 0x0c78), LN_POLARITY_INV,
+				FIELD_PREP(LN_POLARITY_INV, invert));
+	}
+
+	if (mode == PHY_MODE_DP) {
+		grf_write(hdptx, HDPTXPHY_GRF_CON0, HDPTX_MODE_SEL,
+			  FIELD_PREP(HDPTX_MODE_SEL, 0x1));
+
+		phy_update_bits(hdptx, 0x0800, PROTOCOL_SEL,
+				FIELD_PREP(PROTOCOL_SEL, 0x0));
+		phy_update_bits(hdptx, 0x0818, DATA_BUS_WIDTH,
+				FIELD_PREP(DATA_BUS_WIDTH, 0x1));
+		phy_update_bits(hdptx, 0x0818, BUS_WIDTH_SEL,
+				FIELD_PREP(BUS_WIDTH_SEL, 0x0));
+
+		rockchip_hdptx_phy_dp_pll_init(hdptx);
+		rockchip_hdptx_phy_dp_aux_init(hdptx);
+	} else {
+		grf_write(hdptx, HDPTXPHY_GRF_CON0, HDPTX_MODE_SEL,
+			  FIELD_PREP(HDPTX_MODE_SEL, 0x0));
+
+		phy_update_bits(hdptx, 0x0800, PROTOCOL_SEL,
+				FIELD_PREP(PROTOCOL_SEL, 0x1));
+	}
+
+	return 0;
+}
+
+static int rockchip_hdptx_phy_power_off(struct phy *phy)
+{
+	struct rockchip_hdptx_phy *hdptx = dev_get_priv(phy->dev);
+
+	rockchip_hdptx_phy_reset(hdptx);
+
+	return 0;
+}
+
+static const struct phy_ops rockchip_hdptx_phy_ops = {
+	.set_mode	= rockchip_hdptx_phy_set_mode,
+	.configure	= rockchip_hdptx_phy_configure,
+	.power_on	= rockchip_hdptx_phy_power_on,
+	.power_off	= rockchip_hdptx_phy_power_off,
+};
+
+static int rockchip_hdptx_phy_probe(struct udevice *dev)
+{
+	struct rockchip_hdptx_phy *hdptx = dev_get_priv(dev);
+	struct udevice *syscon;
+	int ret;
+
+	hdptx->base = dev_read_addr_ptr(dev);
+	if (!hdptx->base)
+		return -ENOENT;
+
+	ret = uclass_get_device_by_phandle(UCLASS_SYSCON, dev, "rockchip,grf",
+					   &syscon);
+	if (ret)
+		return ret;
+
+	hdptx->grf = syscon_get_regmap(syscon);
+	if (IS_ERR(hdptx->grf)) {
+		ret = PTR_ERR(hdptx->grf);
+		dev_err(dev, "unable to find regmap: %d\n", ret);
+		return ret;
+	}
+
+	hdptx->dev = dev;
+
+	ret = reset_get_by_name(dev, "apb", &hdptx->apb_reset);
+	if (ret < 0) {
+		dev_err(dev, "failed to get apb reset: %d\n", ret);
+		return ret;
+	}
+
+	ret = reset_get_by_name(dev, "init", &hdptx->init_reset);
+	if (ret < 0) {
+		dev_err(dev, "failed to get init reset: %d\n", ret);
+		return ret;
+	}
+
+	ret = reset_get_by_name(dev, "cmn", &hdptx->cmn_reset);
+	if (ret < 0) {
+		dev_err(dev, "failed to get cmn reset: %d\n", ret);
+		return ret;
+	}
+
+	ret = reset_get_by_name(dev, "lane", &hdptx->lane_reset);
+	if (ret < 0) {
+		dev_err(dev, "failed to get lane reset: %d\n", ret);
+		return ret;
+	}
+
+	dev_read_u32_array(dev, "lane-polarity-invert",
+			   hdptx->lane_polarity_invert, 4);
+
+	return 0;
+}
+
+static const struct udevice_id rockchip_hdptx_phy_ids[] = {
+	{ .compatible = "rockchip,rk3588-hdptx-phy", },
+	{}
+};
+
+U_BOOT_DRIVER(rockchip_hdptx_phy) = {
+	.name		= "rockchip_hdptx_phy",
+	.id		= UCLASS_PHY,
+	.ops		= &rockchip_hdptx_phy_ops,
+	.of_match	= rockchip_hdptx_phy_ids,
+	.probe		= rockchip_hdptx_phy_probe,
+	.priv_auto_alloc_size = sizeof(struct rockchip_hdptx_phy),
+};

commit e9c6c0e2da670f7da222c2c7b1f992fda0ffb66a
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Thu Nov 11 11:37:39 2021 +0800

    phy: Add set_mode callback
    
    The initial use for this is for PHYs that have a mode related to USB
    OTG. There are several SoCs (e.g. TI OMAP and DA8xx) that have a mode
    setting in the USB PHY to override OTG VBUS and ID signals.
    
    Of course, the enum can be expaned in the future to include modes for
    other types of PHYs as well.
    
    Change-Id: Ic8b5f33f928341a88132cb203b65f156f75d18b6
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/phy/phy-uclass.c b/drivers/phy/phy-uclass.c
index 77a105cfe8..b0d918f326 100644
--- a/drivers/phy/phy-uclass.c
+++ b/drivers/phy/phy-uclass.c
@@ -174,6 +174,25 @@ int generic_phy_validate(struct phy *phy, enum phy_mode mode, int submode,
 	return ops->validate ? ops->validate(phy, mode, submode, opts) : 0;
 }
 
+int generic_phy_set_mode_ext(struct phy *phy, enum phy_mode mode, int submode)
+{
+	struct phy_ops const *ops;
+	int ret;
+
+	if (!generic_phy_valid(phy))
+		return 0;
+	ops = phy_dev_ops(phy->dev);
+
+	if (!ops->set_mode)
+		return 0;
+
+	ret = ops->set_mode(phy, mode, submode);
+	if (!ret)
+		phy->attrs.mode = mode;
+
+	return ret;
+}
+
 UCLASS_DRIVER(phy) = {
 	.id		= UCLASS_PHY,
 	.name		= "phy",
diff --git a/include/generic-phy.h b/include/generic-phy.h
index 0392d5fe60..ac70cf50aa 100644
--- a/include/generic-phy.h
+++ b/include/generic-phy.h
@@ -31,6 +31,18 @@ union phy_configure_opts {
 	struct phy_configure_opts_pcie		pcie;
 };
 
+/**
+ * struct phy_attrs - represents phy attributes
+ * @bus_width: Data path width implemented by PHY
+ * @max_link_rate: Maximum link rate supported by PHY (in Mbps)
+ * @mode: PHY mode
+ */
+struct phy_attrs {
+	u32			bus_width;
+	u32			max_link_rate;
+	enum phy_mode		mode;
+};
+
 /**
  * struct phy - A handle to (allowing control of) a single phy port.
  *
@@ -46,6 +58,7 @@ union phy_configure_opts {
 struct phy {
 	struct udevice *dev;
 	unsigned long id;
+	struct phy_attrs attrs;
 };
 
 /*
@@ -55,6 +68,7 @@ struct phy {
  * @reset: reset the phy (optional).
  * @power_on: powering on the phy (optional)
  * @power_off: powering off the phy (optional)
+ * @set_mode: set the mode of the phy
  */
 struct phy_ops {
 	/**
@@ -173,6 +187,8 @@ struct phy_ops {
 	* @return 0 if OK, or a negative error code
 	*/
 	int	(*power_off)(struct phy *phy);
+
+	int     (*set_mode)(struct phy *phy, enum phy_mode mode, int submode);
 };
 
 #ifdef CONFIG_PHY
@@ -234,6 +250,14 @@ int generic_phy_power_on(struct phy *phy);
  */
 int generic_phy_power_off(struct phy *phy);
 
+int generic_phy_set_mode_ext(struct phy *phy, enum phy_mode mode, int submode);
+#define generic_phy_set_mode(phy, mode) \
+	generic_phy_set_mode_ext(phy, mode, 0)
+
+static inline enum phy_mode generic_phy_get_mode(struct phy *phy)
+{
+	return phy->attrs.mode;
+}
 
 /**
  * generic_phy_get_by_index() - Get a PHY device by integer index.
@@ -343,6 +367,15 @@ static inline int generic_phy_get_by_name(struct udevice *user, const char *phy_
 	return 0;
 }
 
+static inline int generic_phy_set_mode_ext(struct phy *phy, enum phy_mode mode,
+					   int submode)
+{
+	return 0;
+}
+
+#define generic_phy_set_mode(phy, mode) \
+	generic_phy_set_mode_ext(phy, mode, 0)
+
 #endif /* CONFIG_PHY */
 
 /**

commit 9ae51bb5ba14ec434750f73ae28328fb344d81aa
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Thu Dec 2 08:54:35 2021 +0800

    video/drm: rockchip_crtc: Support set clock defaults for vp node
    
    Parse and set assigned clocks configuration at the child node level.
    
    Change-Id: Ia8f2069e7be51797116372e3ac4a01fd82df41de
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_crtc.c b/drivers/video/drm/rockchip_crtc.c
index ed20ca6fd3..a0f3958f5b 100644
--- a/drivers/video/drm/rockchip_crtc.c
+++ b/drivers/video/drm/rockchip_crtc.c
@@ -4,6 +4,7 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
+#include <clk.h>
 #include <config.h>
 #include <common.h>
 #include <errno.h>
@@ -12,11 +13,24 @@
 #include <linux/list.h>
 #include <dm/device.h>
 #include <dm.h>
+#include <dm/device-internal.h>
+#include <dm/lists.h>
 
 #include "rockchip_display.h"
 #include "rockchip_crtc.h"
 #include "rockchip_connector.h"
 
+static const struct udevice_id rockchip_vp_ids[] = {
+	{ .compatible = "rockchip-vp" },
+	{ }
+};
+
+U_BOOT_DRIVER(rockchip_vp) = {
+	.name		= "rockchip-vp",
+	.id		= UCLASS_VIDEO_CRTC,
+	.of_match	= rockchip_vp_ids,
+};
+
 static const struct rockchip_crtc rk3036_vop_data = {
 	.funcs = &rockchip_vop_funcs,
 	.data = &rk3036_vop,
@@ -162,11 +176,44 @@ static const struct udevice_id rockchip_vop_ids[] = {
 
 static int rockchip_vop_probe(struct udevice *dev)
 {
+	struct udevice *child;
+	int ret;
+
+	for (device_find_first_child(dev, &child);
+	     child;
+	     device_find_next_child(&child)) {
+		ret = device_probe(child);
+		if (ret)
+			return ret;
+
+		ret = clk_set_defaults(child);
+		if (ret)
+			return ret;
+	}
+
 	return 0;
 }
 
 static int rockchip_vop_bind(struct udevice *dev)
 {
+	ofnode ports, node;
+	int ret;
+
+	ports = dev_read_subnode(dev, "ports");
+	if (!ofnode_valid(ports))
+		return 0;
+
+	ofnode_for_each_subnode(node, ports) {
+		const char *name = ofnode_get_name(node);
+
+		ret = device_bind_driver_to_node(dev, "rockchip-vp", name,
+						 node, NULL);
+		if (ret) {
+			dev_err(dev, "unable to bind vp device node: %d\n", ret);
+			return ret;
+		}
+	}
+
 	return 0;
 }
 

commit aaa1902cfbc3ffefc8832139ad6a7768cd4263c1
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Dec 6 19:10:21 2021 +0800

    clk/rockchip: pll: Use UL for FREQ definition to avoid integer overflow
    
    Fixes: 7f3ced6dec69 ("rockchip: clk: pll: add pll_rk3588 type for RK3588 Soc")
    Change-Id: I38526a0f3426603968f9f400d25d814d241a61bc
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_pll.c b/drivers/clk/rockchip/clk_pll.c
index 91466619f5..83fa0603f0 100644
--- a/drivers/clk/rockchip/clk_pll.c
+++ b/drivers/clk/rockchip/clk_pll.c
@@ -34,20 +34,19 @@ static struct rockchip_pll_rate_table rockchip_auto_table;
 
 #define MHZ		1000000
 #define KHZ		1000
-enum {
-	OSC_HZ			= 24 * 1000000,
-	VCO_MAX_HZ	= 3200U * 1000000,
-	VCO_MIN_HZ	= 800 * 1000000,
-	OUTPUT_MAX_HZ	= 3200U * 1000000,
-	OUTPUT_MIN_HZ	= 24 * 1000000,
-	RK3588_VCO_MIN_HZ = 2250U * 1000000,
-	RK3588_VCO_MAX_HZ = 4500U * 1000000,
-	RK3588_FOUT_MIN_HZ = 37U * 1000000,
-	RK3588_FOUT_MAX_HZ = 4500U * 1000000,
-};
-
-#define MIN_FOUTVCO_FREQ	(800 * MHZ)
-#define MAX_FOUTVCO_FREQ	(2000 * MHZ)
+
+#define OSC_HZ			(24UL * MHZ)
+#define VCO_MAX_HZ		(3200UL * MHZ)
+#define VCO_MIN_HZ		(800UL * MHZ)
+#define OUTPUT_MAX_HZ		(3200UL * MHZ)
+#define OUTPUT_MIN_HZ		(24UL * MHZ)
+#define MIN_FOUTVCO_FREQ	(800UL * MHZ)
+#define MAX_FOUTVCO_FREQ	(2000UL * MHZ)
+
+#define RK3588_VCO_MIN_HZ	(2250UL * MHZ)
+#define RK3588_VCO_MAX_HZ	(4500UL * MHZ)
+#define RK3588_FOUT_MIN_HZ	(37UL * MHZ)
+#define RK3588_FOUT_MAX_HZ	(4500UL * MHZ)
 
 int gcd(int m, int n)
 {

commit fd928c4d160f5581ebf59a5eb0a8f3d3b9070b16
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Thu Dec 2 10:03:55 2021 +0800

    clk/rockchip: rk3588: Fix dclk_vop2_src sel shift
    
    Change-Id: Ia30d5165d8ad395509e9c7de679c446d23c408d6
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3588.c b/drivers/clk/rockchip/clk_rk3588.c
index 06a7e64820..d8c2317ccf 100644
--- a/drivers/clk/rockchip/clk_rk3588.c
+++ b/drivers/clk/rockchip/clk_rk3588.c
@@ -1062,7 +1062,7 @@ static ulong rk3588_dclk_vop_set_clk(struct rk3588_clk_priv *priv,
 		sel = (con & DCLK2_VOP_SRC_SEL_MASK) >> DCLK2_VOP_SRC_SEL_SHIFT;
 		mask = DCLK2_VOP_SRC_SEL_MASK | DCLK2_VOP_SRC_DIV_MASK;
 		div_shift = DCLK2_VOP_SRC_DIV_SHIFT;
-		sel_shift = DCLK1_VOP_SRC_SEL_SHIFT;
+		sel_shift = DCLK2_VOP_SRC_SEL_SHIFT;
 		break;
 	case DCLK_VOP3:
 		conid = 113;
@@ -1080,6 +1080,7 @@ static ulong rk3588_dclk_vop_set_clk(struct rk3588_clk_priv *priv,
 		div = DIV_ROUND_UP(RK3588_VOP_PLL_LIMIT_FREQ, rate);
 		rk_clrsetreg(&cru->clksel_con[conid],
 			     mask,
+			     DCLK_VOP_SRC_SEL_V0PLL << sel_shift |
 			     ((div - 1) << div_shift));
 		rockchip_pll_set_rate(&rk3588_pll_clks[V0PLL],
 				      priv->cru, V0PLL, div * rate);

commit cd4cabecceff35a4cf2436fc6e7a2972d6f41b57
Author: Neil Armstrong <narmstrong@baylibre.com>
Date:   Thu Nov 22 11:01:03 2018 +0100

    UPSTREAM: regmap: add regmap_read_poll_timeout() helper
    
    Add the regmap_read_poll_timeout() macro based on the Linux implementation
    to simplify register polling with configurable timeout and sleep.
    
    Change-Id: I7d8b575e99d4a828c04dddd8db2db378c377fd5e
    Tested-by: Jerome Brunet <jbrunet@baylibre.com>
    Acked-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
    (cherry picked from commit d13801ef1d14fe46f97630b56e01200b337dad6c)

diff --git a/include/regmap.h b/include/regmap.h
index 493a5d8eff..4be3043fdd 100644
--- a/include/regmap.h
+++ b/include/regmap.h
@@ -46,6 +46,44 @@ int regmap_read(struct regmap *map, uint offset, uint *valp);
 #define regmap_read32(map, ptr, member, valp) \
 	regmap_read(map, (uint32_t *)(ptr)->member - (uint32_t *)(ptr), valp)
 
+/**
+ * regmap_read_poll_timeout - Poll until a condition is met or a timeout occurs
+ *
+ * @map:	Regmap to read from
+ * @addr:	Offset to poll
+ * @val:	Unsigned integer variable to read the value into
+ * @cond:	Break condition (usually involving @val)
+ * @sleep_us:	Maximum time to sleep between reads in us (0 tight-loops).
+ * @timeout_ms:	Timeout in ms, 0 means never timeout
+ *
+ * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_read
+ * error return value in case of a error read. In the two former cases,
+ * the last read value at @addr is stored in @val. Must not be called
+ * from atomic context if sleep_us or timeout_us are used.
+ *
+ * This is modelled after the regmap_read_poll_timeout macros in linux but
+ * with millisecond timeout.
+ */
+#define regmap_read_poll_timeout(map, addr, val, cond, sleep_us, timeout_ms) \
+({ \
+	unsigned long __start = get_timer(0); \
+	int __ret; \
+	for (;;) { \
+		__ret = regmap_read((map), (addr), &(val)); \
+		if (__ret) \
+			break; \
+		if (cond) \
+			break; \
+		if ((timeout_ms) && get_timer(__start) > (timeout_ms)) { \
+			__ret = regmap_read((map), (addr), &(val)); \
+			break; \
+		} \
+		if ((sleep_us)) \
+			udelay((sleep_us)); \
+	} \
+	__ret ?: ((cond) ? 0 : -ETIMEDOUT); \
+})
+
 /**
  * regmap_init_mem() - Set up a new register map that uses memory access
  *

commit 8995df606659e7e020c758384948de029f728242
Author: Guochun Huang <hero.huang@rock-chips.com>
Date:   Wed Nov 10 08:56:54 2021 +0000

    video/drm: phy: add samsung mipi dcphy drivers
    
    Change-Id: Ia222750d581421a1b6ffa867b252743c04276a8c
    Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>

diff --git a/drivers/video/drm/Kconfig b/drivers/video/drm/Kconfig
index 27bd801aeb..a02cafa159 100644
--- a/drivers/video/drm/Kconfig
+++ b/drivers/video/drm/Kconfig
@@ -142,6 +142,13 @@ config DRM_ROCKCHIP_RK1000
 	  Choose this option to enable support for Rockchip RK1000 display
 	  bridge chips driver. say Y to enable its driver.
 
+config DRM_ROCKCHIP_SAMSUNG_MIPI_DCPHY
+	tristate "Rockchip SAMSUNG MIPI DCPHY driver"
+	depends on DRM_ROCKCHIP
+	help
+	  Enable this to support the Rockchip MIPI DCPHY
+	  with SAMSUNG IP block.
+
 config ROCKCHIP_DRM_TVE
 	bool "Rockchip TVE Support"
 	depends on DRM_ROCKCHIP
diff --git a/drivers/video/drm/Makefile b/drivers/video/drm/Makefile
index c71749463d..09746f40db 100644
--- a/drivers/video/drm/Makefile
+++ b/drivers/video/drm/Makefile
@@ -24,3 +24,4 @@ obj-$(CONFIG_DRM_ROCKCHIP_RGB) += rockchip_rgb.o
 obj-$(CONFIG_DRM_ROCKCHIP_PANEL) += rockchip_panel.o
 obj-$(CONFIG_DRM_ROCKCHIP_RK618) += rk618.o rk618_lvds.o rk618_dsi.o
 obj-$(CONFIG_DRM_ROCKCHIP_RK1000) += rk1000.o rk1000_tve.o
+obj-$(CONFIG_DRM_ROCKCHIP_SAMSUNG_MIPI_DCPHY) += samsung_mipi_dcphy.o
diff --git a/drivers/video/drm/samsung_mipi_dcphy.c b/drivers/video/drm/samsung_mipi_dcphy.c
new file mode 100644
index 0000000000..13fefb7934
--- /dev/null
+++ b/drivers/video/drm/samsung_mipi_dcphy.c
@@ -0,0 +1,1874 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2008-2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * Author: Guochun Huang <hero.huang@rock-chips.com>
+ */
+
+#include <config.h>
+#include <common.h>
+#include <errno.h>
+#include <dm.h>
+#include <div64.h>
+#include <asm/io.h>
+#include <asm/arch-rockchip/clock.h>
+#include <linux/ioport.h>
+#include <linux/iopoll.h>
+#include <linux/math64.h>
+#include <reset.h>
+#include <syscon.h>
+
+#include "rockchip_phy.h"
+
+#define USEC_PER_SEC	1000000LL
+#define PSEC_PER_SEC	1000000000000LL
+
+#define UPDATE(x, h, l)	(((x) << (l)) & GENMASK((h), (l)))
+#define HIWORD_UPDATE(v, h, l)	(((v) << (l)) | (GENMASK((h), (l)) << 16))
+
+#define BIAS_CON0		0x0000
+#define BIAS_CON1		0x0004
+#define BIAS_CON2		0x0008
+
+#define PLL_CON0		0x0100
+#define PLL_EN			BIT(12)
+#define S_MASK			GENMASK(10, 8)
+#define S(x)			UPDATE(x, 10, 8)
+#define P_MASK			GENMASK(5, 0)
+#define P(x)			UPDATE(x, 5, 0)
+#define PLL_CON1		0x0104
+#define PLL_CON2		0x0108
+#define M_MASK			GENMASK(9, 0)
+#define M(x)			UPDATE(x, 9, 0)
+#define PLL_CON3		0x010c
+#define MRR_MASK		GENMASK(13, 8)
+#define MRR(x)			UPDATE(x, 13, 8)
+#define MFR_MASK                GENMASK(7, 0)
+#define MFR(x)			UPDATE(x, 7, 0)
+#define PLL_CON4		0x0110
+#define SSCG_EN			BIT(11)
+#define PLL_CON5		0x0114
+#define RESET_N_SEL		BIT(10)
+#define PLL_ENABLE_SEL		BIT(8)
+#define PLL_CON6		0x0118
+#define PLL_CON7		0x011c
+#define PLL_LOCK_CNT(x)		UPDATE(x, 15, 0)
+#define PLL_CON8		0x0120
+#define PLL_STB_CNT(x)		UPDATE(x, 15, 0)
+#define PLL_STAT0		0x0140
+#define PLL_LOCK		BIT(0)
+
+#define DPHY_MC_GNR_CON0	0x0300
+#define PHY_READY		BIT(1)
+#define PHY_ENABLE		BIT(0)
+#define DPHY_MC_GNR_CON1	0x0304
+#define T_PHY_READY(x)		UPDATE(x, 15, 0)
+#define DPHY_MC_ANA_CON0	0x0308
+#define DPHY_MC_ANA_CON1	0x030c
+#define DPHY_MC_ANA_CON2	0x0310
+#define HS_VREG_AMP_ICON(x)	UPDATE(x, 1, 0)
+#define DPHY_MC_TIME_CON0	0x0330
+#define HSTX_CLK_SEL		BIT(12)
+#define T_LPX(x)		UPDATE(x, 11, 4)
+#define DPHY_MC_TIME_CON1	0x0334
+#define T_CLK_ZERO(x)		UPDATE(x, 15, 8)
+#define T_CLK_PREPARE(x)	UPDATE(x, 7, 0)
+#define DPHY_MC_TIME_CON2	0x0338
+#define T_HS_EXIT(x)		UPDATE(x, 15, 8)
+#define T_CLK_TRAIL(x)		UPDATE(x, 7, 0)
+#define DPHY_MC_TIME_CON3	0x033c
+#define T_CLK_POST(x)		UPDATE(x, 7, 0)
+#define DPHY_MC_TIME_CON4	0x0340
+#define T_ULPS_EXIT(x)		UPDATE(x, 9, 0)
+#define DPHY_MC_DESKEW_CON0	0x0350
+#define SKEW_CAL_RUN_TIME(x)	UPDATE(x, 15, 12)
+
+#define SKEW_CAL_INIT_RUN_TIME(x)	UPDATE(x, 11, 8)
+#define SKEW_CAL_INIT_WAIT_TIME(x)	UPDATE(x, 7, 4)
+#define SKEW_CAL_EN			BIT(0)
+
+#define COMBO_MD0_GNR_CON0	0x0400
+#define COMBO_MD0_GNR_CON1	0x0404
+#define COMBO_MD0_ANA_CON0	0x0408
+#define COMBO_MD0_ANA_CON1      0x040C
+#define COMBO_MD0_ANA_CON2	0x0410
+
+#define COMBO_MD0_TIME_CON0	0x0430
+#define COMBO_MD0_TIME_CON1	0x0434
+#define COMBO_MD0_TIME_CON2	0x0438
+#define COMBO_MD0_TIME_CON3	0x043C
+#define COMBO_MD0_TIME_CON4	0x0440
+#define COMBO_MD0_DATA_CON0	0x0444
+
+#define COMBO_MD1_GNR_CON0	0x0500
+#define COMBO_MD1_GNR_CON1	0x0504
+#define COMBO_MD1_ANA_CON0	0x0508
+#define COMBO_MD1_ANA_CON1	0x050c
+#define COMBO_MD1_ANA_CON2	0x0510
+#define COMBO_MD1_TIME_CON0	0x0530
+#define COMBO_MD1_TIME_CON1	0x0534
+#define COMBO_MD1_TIME_CON2	0x0538
+#define COMBO_MD1_TIME_CON3	0x053C
+#define COMBO_MD1_TIME_CON4	0x0540
+#define COMBO_MD1_DATA_CON0	0x0544
+
+#define COMBO_MD2_GNR_CON0	0x0600
+#define COMBO_MD2_GNR_CON1	0x0604
+#define COMBO_MD2_ANA_CON0	0X0608
+#define COMBO_MD2_ANA_CON1	0X060C
+#define COMBO_MD2_ANA_CON2	0X0610
+#define COMBO_MD2_TIME_CON0	0x0630
+#define COMBO_MD2_TIME_CON1	0x0634
+#define COMBO_MD2_TIME_CON2	0x0638
+#define COMBO_MD2_TIME_CON3	0x063C
+#define COMBO_MD2_TIME_CON4	0x0640
+#define COMBO_MD2_DATA_CON0	0x0644
+
+#define DPHY_MD3_GNR_CON0	0x0700
+#define DPHY_MD3_GNR_CON1	0x0704
+#define DPHY_MD3_ANA_CON0	0X0708
+#define DPHY_MD3_ANA_CON1	0X070C
+#define DPHY_MD3_ANA_CON2	0X0710
+#define DPHY_MD3_TIME_CON0	0x0730
+#define DPHY_MD3_TIME_CON1	0x0734
+#define DPHY_MD3_TIME_CON2	0x0738
+#define DPHY_MD3_TIME_CON3	0x073C
+#define DPHY_MD3_TIME_CON4	0x0740
+#define DPHY_MD3_DATA_CON0	0x0744
+
+#define T_LP_EXIT_SKEW(x)	UPDATE(x, 3, 2)
+#define T_LP_ENTRY_SKEW(x)	UPDATE(x, 1, 0)
+#define T_HS_ZERO(x)		UPDATE(x, 15, 8)
+#define T_HS_PREPARE(x)		UPDATE(x, 7, 0)
+#define T_HS_EXIT(x)		UPDATE(x, 15, 8)
+#define T_HS_TRAIL(x)		UPDATE(x, 7, 0)
+#define T_TA_GET(x)		UPDATE(x, 7, 4)
+#define T_TA_GO(x)		UPDATE(x, 3, 0)
+
+/* MIPI_CDPHY_GRF registers */
+#define MIPI_DCPHY_GRF_CON0	0x0000
+#define S_CPHY_MODE		HIWORD_UPDATE(1, 3, 3)
+#define M_CPHY_MODE		HIWORD_UPDATE(1, 0, 0)
+
+struct samsung_mipi_dphy_timing {
+	unsigned int max_lane_mbps;
+	u8 clk_prepare;
+	u8 clk_zero;
+	u8 clk_post;
+	u8 clk_trail_eot;
+	u8 hs_prepare;
+	u8 hs_zero;
+	u8 hs_trail_eot;
+	u8 lpx;
+	u8 hs_exit;
+	u8 hs_settle;
+};
+
+struct samsung_mipi_cphy_timing {
+	unsigned int max_lane_msps;
+	u8 prepare_3;
+	u8 prebegin_3;
+	u8 post_3;
+	u8 lpx;
+	u8 hs_exit;
+	u8 settle_3;
+};
+
+struct samsung_mipi_dcphy {
+	enum phy_mode mode;
+	void *base;
+	void *grf;
+	bool c_option;
+	struct reset_ctl phy_rst;
+
+	struct {
+		unsigned long long rate;
+		u8 prediv;
+		u16 fbdiv;
+		long dsm;
+		u8 scaler;
+
+		bool ssc_en;
+		u8 mfr;
+		u8 mrr;
+	} pll;
+};
+
+static const
+struct samsung_mipi_dphy_timing samsung_mipi_dphy_timing_table[] = {
+	{6500, 32, 117, 31, 28, 30, 56, 27, 24, 44, 37},
+	{6490, 32, 116, 31, 28, 30, 56, 27, 24, 44, 37},
+	{6480, 32, 116, 31, 28, 30, 56, 27, 24, 44, 37},
+	{6470, 32, 116, 31, 28, 30, 56, 27, 24, 44, 37},
+	{6460, 32, 116, 31, 28, 30, 56, 27, 24, 44, 37},
+	{6450, 32, 115, 31, 28, 30, 56, 27, 24, 44, 37},
+	{6440, 32, 115, 31, 28, 30, 56, 27, 24, 44, 37},
+	{6430, 31, 116, 31, 28, 30, 55, 27, 24, 44, 37},
+	{6420, 31, 116, 31, 28, 30, 55, 27, 24, 44, 37},
+	{6410, 31, 116, 31, 27, 30, 55, 27, 24, 44, 37},
+	{6400, 31, 115, 30, 27, 30, 55, 27, 23, 43, 36},
+	{6390, 31, 115, 30, 27, 30, 55, 27, 23, 43, 36},
+	{6380, 31, 115, 30, 27, 30, 55, 27, 23, 43, 36},
+	{6370, 31, 115, 30, 27, 30, 55, 26, 23, 43, 36},
+	{6360, 31, 114, 30, 27, 30, 54, 26, 23, 43, 36},
+	{6350, 31, 114, 30, 27, 30, 54, 26, 23, 43, 36},
+	{6340, 31, 114, 30, 27, 30, 54, 26, 23, 43, 36},
+	{6330, 31, 114, 30, 27, 30, 54, 26, 23, 43, 36},
+	{6320, 31, 113, 30, 27, 30, 54, 26, 23, 43, 36},
+	{6310, 31, 113, 30, 27, 30, 54, 26, 23, 43, 36},
+	{6300, 31, 113, 30, 27, 30, 54, 26, 23, 43, 36},
+	{6290, 31, 113, 30, 27, 29, 54, 26, 23, 43, 36},
+	{6280, 31, 112, 30, 27, 29, 54, 26, 23, 43, 36},
+	{6270, 31, 112, 30, 27, 29, 54, 26, 23, 43, 36},
+	{6260, 31, 112, 30, 27, 29, 54, 26, 23, 43, 36},
+	{6250, 31, 112, 30, 27, 29, 54, 26, 23, 42, 36},
+	{6240, 30, 113, 30, 27, 29, 54, 26, 23, 42, 36},
+	{6230, 30, 112, 30, 27, 29, 54, 26, 23, 42, 35},
+	{6220, 30, 112, 30, 27, 29, 53, 26, 23, 42, 35},
+	{6210, 30, 112, 30, 27, 29, 53, 26, 23, 42, 35},
+	{6200, 30, 112, 29, 27, 29, 53, 26, 23, 42, 35},
+	{6190, 30, 111, 29, 27, 29, 53, 26, 23, 42, 35},
+	{6180, 30, 111, 29, 27, 29, 53, 26, 23, 42, 35},
+	{6170, 30, 111, 29, 26, 29, 53, 26, 23, 42, 35},
+	{6160, 30, 111, 29, 26, 29, 53, 26, 23, 42, 35},
+	{6150, 30, 110, 29, 26, 29, 53, 26, 23, 42, 35},
+	{6140, 30, 110, 29, 26, 29, 52, 26, 23, 42, 35},
+	{6130, 30, 110, 29, 26, 29, 52, 25, 22, 42, 35},
+	{6120, 30, 110, 29, 26, 29, 52, 25, 22, 42, 35},
+	{6110, 30, 110, 29, 26, 29, 52, 25, 22, 42, 35},
+	{6100, 30, 109, 29, 26, 29, 52, 25, 22, 41, 35},
+	{6090, 30, 109, 29, 26, 29, 52, 25, 22, 41, 35},
+	{6080, 30, 109, 29, 26, 28, 53, 25, 22, 41, 35},
+	{6070, 30, 109, 29, 26, 28, 52, 25, 22, 41, 34},
+	{6060, 30, 108, 29, 26, 28, 52, 25, 22, 41, 34},
+	{6050, 30, 108, 29, 26, 28, 52, 25, 22, 41, 34},
+	{6040, 29, 109, 29, 26, 28, 52, 25, 22, 41, 34},
+	{6030, 29, 109, 29, 26, 28, 52, 25, 22, 41, 34},
+	{6020, 29, 108, 29, 26, 28, 52, 25, 22, 41, 34},
+	{6010, 29, 108, 29, 26, 28, 52, 25, 22, 41, 34},
+	{6000, 29, 108, 28, 26, 28, 51, 25, 22, 41, 34},
+	{5990, 29, 108, 28, 26, 28, 51, 25, 22, 41, 34},
+	{5980, 29, 107, 28, 26, 28, 51, 25, 22, 41, 34},
+	{5970, 29, 107, 28, 26, 28, 51, 25, 22, 41, 34},
+	{5960, 29, 107, 28, 26, 28, 51, 25, 22, 40, 34},
+	{5950, 29, 107, 28, 26, 28, 51, 25, 22, 40, 34},
+	{5940, 29, 107, 28, 25, 28, 51, 25, 22, 40, 34},
+	{5930, 29, 106, 28, 25, 28, 50, 25, 22, 40, 34},
+	{5920, 29, 106, 28, 25, 28, 50, 25, 22, 40, 34},
+	{5910, 29, 106, 28, 25, 28, 50, 25, 22, 40, 34},
+	{5900, 29, 106, 28, 25, 28, 50, 24, 22, 40, 33},
+	{5890, 29, 105, 28, 25, 28, 50, 24, 22, 40, 33},
+	{5880, 29, 105, 28, 25, 28, 50, 24, 22, 40, 33},
+	{5870, 29, 105, 28, 25, 27, 51, 24, 22, 40, 33},
+	{5860, 29, 105, 28, 25, 27, 51, 24, 21, 40, 33},
+	{5850, 29, 104, 28, 25, 27, 50, 24, 21, 40, 33},
+	{5840, 28, 105, 28, 25, 27, 50, 24, 21, 40, 33},
+	{5830, 28, 105, 28, 25, 27, 50, 24, 21, 40, 33},
+	{5820, 28, 105, 28, 25, 27, 50, 24, 21, 40, 33},
+	{5810, 28, 104, 28, 25, 27, 50, 24, 21, 39, 33},
+	{5800, 28, 104, 27, 25, 27, 50, 24, 21, 39, 33},
+	{5790, 28, 104, 27, 25, 27, 50, 24, 21, 39, 33},
+	{5780, 28, 104, 27, 25, 27, 49, 24, 21, 39, 33},
+	{5770, 28, 104, 27, 25, 27, 49, 24, 21, 39, 33},
+	{5760, 28, 103, 27, 25, 27, 49, 24, 21, 39, 33},
+	{5750, 28, 103, 27, 25, 27, 49, 24, 21, 39, 33},
+	{5740, 28, 103, 27, 25, 27, 49, 24, 21, 39, 33},
+	{5730, 28, 103, 27, 25, 27, 49, 24, 21, 39, 32},
+	{5720, 28, 102, 27, 25, 27, 49, 24, 21, 39, 32},
+	{5710, 28, 102, 27, 25, 27, 48, 24, 21, 39, 32},
+	{5700, 28, 102, 27, 24, 27, 48, 24, 21, 39, 32},
+	{5690, 28, 102, 27, 24, 27, 48, 24, 21, 39, 32},
+	{5680, 28, 101, 27, 24, 27, 48, 24, 21, 39, 32},
+	{5670, 28, 101, 27, 24, 27, 48, 23, 21, 38, 32},
+	{5660, 28, 101, 27, 24, 26, 49, 23, 21, 38, 32},
+	{5650, 28, 101, 27, 24, 26, 49, 23, 21, 38, 32},
+	{5640, 27, 101, 27, 24, 26, 48, 23, 21, 38, 32},
+	{5630, 27, 101, 27, 24, 26, 48, 23, 21, 38, 32},
+	{5620, 27, 101, 27, 24, 26, 48, 23, 21, 38, 32},
+	{5610, 27, 101, 27, 24, 26, 48, 23, 21, 38, 32},
+	{5600, 27, 101, 26, 24, 26, 48, 23, 20, 38, 32},
+	{5590, 27, 100, 26, 24, 26, 48, 23, 20, 38, 32},
+	{5580, 27, 100, 26, 24, 26, 48, 23, 20, 38, 32},
+	{5570, 27, 100, 26, 24, 26, 48, 23, 20, 38, 31},
+	{5560, 27, 100, 26, 24, 26, 47, 23, 20, 38, 31},
+	{5550, 27,  99, 26, 24, 26, 47, 23, 20, 38, 31},
+	{5540, 27,  99, 26, 24, 26, 47, 23, 20, 38, 31},
+	{5530, 27,  99, 26, 24, 26, 47, 23, 20, 38, 31},
+	{5520, 27,  99, 26, 24, 26, 47, 23, 20, 37, 31},
+	{5510, 27,  98, 26, 24, 26, 47, 23, 20, 37, 31},
+	{5500, 27,  98, 26, 24, 26, 47, 23, 20, 37, 31},
+	{5490, 27,  98, 26, 24, 26, 46, 23, 20, 37, 31},
+	{5480, 27,  98, 26, 24, 26, 46, 23, 20, 37, 31},
+	{5470, 27,  97, 26, 23, 26, 46, 23, 20, 37, 31},
+	{5460, 27,  97, 26, 23, 26, 46, 23, 20, 37, 31},
+	{5450, 27,  97, 26, 23, 25, 47, 23, 20, 37, 31},
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+	{ 160,  5,   0,  0, 31,  8,  0, 24,  4,  0,  9},
+	{ 150,  5,   0,  0, 31,  8,  0, 24,  5,  0,  9},
+	{ 140,  5,   0,  0, 31,  8,  0, 24,  5,  0,  8},
+	{ 130,  4,   0,  0, 30,  6,  0, 23,  3,  0,  8},
+	{ 120,  4,   0,  0, 30,  6,  0, 23,  3,  0,  7},
+	{ 110,  3,   0,  0, 30,  6,  0, 23,  3,  0,  7},
+	{ 100,  3,   0,  0, 29,  5,  0, 22,  2,  0,  6},
+	{  90,  3,   0,  0, 29,  5,  0, 22,  2,  0,  6},
+	{  80,  2,   0,  0, 28,  5,  0, 22,  2,  0,  5},
+};
+
+static const
+struct samsung_mipi_cphy_timing samsung_mipi_cphy_timing_table[] = {
+	{ 3500, 39, 50, 25, 29, 54, 1 },
+	{ 3490, 39, 50, 25, 29, 54, 1 },
+	{ 3480, 39, 50, 25, 29, 54, 1 },
+	{ 3470, 39, 50, 25, 29, 54, 1 },
+	{ 3460, 39, 50, 25, 29, 54, 1 },
+	{ 3450, 39, 50, 25, 29, 54, 1 },
+	{ 3440, 38, 50, 25, 29, 54, 1 },
+	{ 3430, 38, 50, 25, 29, 53, 1 },
+	{ 3420, 38, 50, 25, 29, 53, 1 },
+	{ 3410, 38, 50, 25, 29, 53, 1 },
+	{ 3400, 38, 50, 25, 29, 53, 1 },
+	{ 3390, 38, 50, 25, 29, 53, 1 },
+	{ 3380, 38, 50, 25, 28, 53, 1 },
+	{ 3370, 38, 50, 25, 28, 52, 1 },
+	{ 3360, 37, 50, 25, 28, 52, 1 },
+	{ 3350, 37, 50, 25, 28, 52, 1 },
+	{ 3340, 37, 50, 25, 28, 52, 1 },
+	{ 3330, 37, 50, 25, 28, 52, 1 },
+	{ 3320, 37, 50, 25, 28, 52, 1 },
+	{ 3310, 37, 50, 25, 28, 52, 1 },
+	{ 3300, 37, 50, 25, 28, 51, 1 },
+	{ 3290, 37, 50, 25, 28, 51, 1 },
+	{ 3280, 37, 50, 25, 28, 51, 1 },
+	{ 3270, 36, 50, 25, 28, 51, 1 },
+	{ 3260, 36, 50, 25, 27, 51, 1 },
+	{ 3250, 36, 50, 25, 27, 51, 1 },
+	{ 3240, 36, 50, 25, 27, 50, 1 },
+	{ 3230, 36, 50, 25, 27, 50, 1 },
+	{ 3220, 36, 50, 25, 27, 50, 1 },
+	{ 3210, 36, 50, 25, 27, 50, 1 },
+	{ 3200, 36, 50, 25, 27, 50, 1 },
+	{ 3190, 36, 50, 25, 27, 50, 1 },
+	{ 3180, 35, 50, 25, 27, 49, 1 },
+	{ 3170, 35, 50, 25, 27, 49, 1 },
+	{ 3160, 35, 50, 25, 27, 49, 1 },
+	{ 3150, 35, 50, 25, 26, 49, 1 },
+	{ 3140, 35, 50, 25, 26, 49, 1 },
+	{ 3130, 35, 50, 25, 26, 49, 1 },
+	{ 3120, 35, 50, 25, 26, 49, 1 },
+	{ 3110, 35, 50, 25, 26, 48, 1 },
+	{ 3100, 34, 50, 25, 26, 48, 1 },
+	{ 3090, 34, 50, 25, 26, 48, 1 },
+	{ 3080, 34, 50, 25, 26, 48, 1 },
+	{ 3070, 34, 50, 25, 26, 48, 1 },
+	{ 3060, 34, 50, 25, 26, 48, 1 },
+	{ 3050, 34, 50, 25, 26, 47, 1 },
+	{ 3040, 34, 50, 25, 26, 47, 1 },
+	{ 3030, 34, 50, 25, 25, 47, 1 },
+	{ 3020, 34, 50, 25, 25, 47, 1 },
+	{ 3010, 33, 50, 25, 25, 47, 1 },
+	{ 3000, 33, 50, 25, 25, 47, 1 },
+	{ 2990, 33, 50, 25, 25, 46, 1 },
+	{ 2980, 33, 50, 25, 25, 46, 1 },
+	{ 2970, 33, 50, 25, 25, 46, 1 },
+	{ 2960, 33, 50, 25, 25, 46, 1 },
+	{ 2950, 33, 50, 25, 25, 46, 1 },
+	{ 2940, 33, 50, 25, 25, 46, 1 },
+	{ 2930, 33, 50, 25, 25, 46, 1 },
+	{ 2920, 32, 50, 25, 25, 45, 1 },
+	{ 2910, 32, 50, 25, 24, 45, 1 },
+	{ 2900, 32, 50, 25, 24, 45, 1 },
+	{ 2890, 32, 50, 25, 24, 45, 1 },
+	{ 2880, 32, 50, 25, 24, 45, 1 },
+	{ 2870, 32, 50, 25, 24, 45, 1 },
+	{ 2860, 32, 50, 25, 24, 44, 1 },
+	{ 2850, 32, 50, 25, 24, 44, 1 },
+	{ 2840, 31, 50, 25, 24, 44, 1 },
+	{ 2830, 31, 50, 25, 24, 44, 1 },
+	{ 2820, 31, 50, 25, 24, 44, 1 },
+	{ 2810, 31, 50, 25, 24, 44, 1 },
+	{ 2800, 31, 50, 25, 23, 43, 1 },
+	{ 2790, 31, 50, 25, 23, 43, 1 },
+	{ 2780, 31, 50, 25, 23, 43, 1 },
+	{ 2770, 31, 50, 25, 23, 43, 1 },
+	{ 2760, 31, 50, 25, 23, 43, 1 },
+	{ 2750, 30, 50, 25, 23, 43, 1 },
+	{ 2740, 30, 50, 25, 23, 43, 1 },
+	{ 2730, 30, 50, 25, 23, 42, 1 },
+	{ 2720, 30, 50, 25, 23, 42, 1 },
+	{ 2710, 30, 50, 25, 23, 42, 1 },
+	{ 2700, 30, 50, 25, 23, 42, 1 },
+	{ 2690, 30, 50, 25, 23, 42, 1 },
+	{ 2680, 30, 50, 25, 22, 42, 1 },
+	{ 2670, 30, 50, 25, 22, 41, 1 },
+	{ 2660, 29, 50, 25, 22, 41, 1 },
+	{ 2650, 29, 50, 25, 22, 41, 1 },
+	{ 2640, 29, 50, 25, 22, 41, 1 },
+	{ 2630, 29, 50, 25, 22, 41, 1 },
+	{ 2620, 29, 50, 25, 22, 41, 1 },
+	{ 2610, 29, 50, 25, 22, 41, 1 },
+	{ 2600, 29, 50, 25, 22, 40, 1 },
+	{ 2590, 29, 50, 25, 22, 40, 1 },
+	{ 2580, 28, 50, 25, 22, 40, 1 },
+	{ 2570, 28, 50, 25, 22, 40, 1 },
+	{ 2560, 28, 50, 25, 21, 40, 1 },
+	{ 2550, 28, 50, 25, 21, 40, 1 },
+	{ 2540, 28, 50, 25, 21, 39, 1 },
+	{ 2530, 28, 50, 25, 21, 39, 1 },
+	{ 2520, 28, 50, 25, 21, 39, 1 },
+	{ 2510, 28, 50, 25, 21, 39, 1 },
+	{ 2500, 28, 50, 25, 21, 39, 1 },
+	{ 2490, 27, 50, 25, 21, 39, 1 },
+	{ 2480, 27, 50, 25, 21, 38, 1 },
+	{ 2470, 27, 50, 25, 21, 38, 1 },
+	{ 2460, 27, 50, 25, 21, 38, 1 },
+	{ 2450, 27, 50, 25, 20, 38, 1 },
+	{ 2440, 27, 50, 25, 20, 38, 1 },
+	{ 2430, 27, 50, 25, 20, 38, 1 },
+	{ 2420, 27, 50, 25, 20, 38, 1 },
+	{ 2410, 27, 50, 25, 20, 37, 1 },
+	{ 2400, 26, 50, 25, 20, 37, 1 },
+	{ 2390, 26, 50, 25, 20, 37, 1 },
+	{ 2380, 26, 50, 25, 20, 37, 1 },
+	{ 2370, 26, 50, 25, 20, 37, 1 },
+	{ 2360, 26, 50, 25, 20, 37, 1 },
+	{ 2350, 26, 50, 25, 20, 36, 1 },
+	{ 2340, 26, 50, 25, 20, 36, 1 },
+	{ 2330, 26, 50, 25, 19, 36, 1 },
+	{ 2320, 25, 50, 25, 19, 36, 1 },
+	{ 2310, 25, 50, 25, 19, 36, 1 },
+	{ 2300, 25, 50, 25, 19, 36, 1 },
+	{ 2290, 25, 50, 25, 19, 35, 1 },
+	{ 2280, 25, 50, 25, 19, 35, 1 },
+	{ 2270, 25, 50, 25, 19, 35, 1 },
+	{ 2260, 25, 50, 25, 19, 35, 1 },
+	{ 2250, 25, 50, 25, 19, 35, 1 },
+	{ 2240, 25, 50, 25, 19, 35, 1 },
+	{ 2230, 24, 50, 25, 19, 35, 1 },
+	{ 2220, 24, 50, 25, 19, 34, 1 },
+	{ 2210, 24, 50, 25, 18, 34, 1 },
+	{ 2200, 24, 50, 25, 18, 34, 1 },
+	{ 2190, 24, 50, 25, 18, 34, 1 },
+	{ 2180, 24, 50, 25, 18, 34, 1 },
+	{ 2170, 24, 50, 25, 18, 34, 1 },
+	{ 2160, 24, 50, 25, 18, 33, 1 },
+	{ 2150, 24, 50, 25, 18, 33, 1 },
+	{ 2140, 23, 50, 25, 18, 33, 1 },
+	{ 2130, 23, 50, 25, 18, 33, 1 },
+	{ 2120, 23, 50, 25, 18, 33, 1 },
+	{ 2110, 23, 50, 25, 18, 33, 1 },
+	{ 2100, 23, 50, 25, 17, 32, 1 },
+	{ 2090, 23, 50, 25, 17, 32, 1 },
+	{ 2080, 23, 50, 25, 17, 32, 1 },
+	{ 2070, 23, 50, 25, 17, 32, 1 },
+	{ 2060, 22, 50, 25, 17, 32, 1 },
+	{ 2050, 22, 50, 25, 17, 32, 1 },
+	{ 2040, 22, 50, 25, 17, 32, 1 },
+	{ 2030, 22, 50, 25, 17, 31, 1 },
+	{ 2020, 22, 50, 25, 17, 31, 1 },
+	{ 2010, 22, 50, 25, 17, 31, 1 },
+	{ 2000, 22, 50, 25, 17, 31, 1 },
+	{ 1990, 22, 50, 25, 17, 31, 1 },
+	{ 1980, 22, 50, 25, 16, 31, 1 },
+	{ 1970, 21, 50, 25, 16, 30, 1 },
+	{ 1960, 21, 50, 25, 16, 30, 1 },
+	{ 1950, 21, 50, 25, 16, 30, 1 },
+	{ 1940, 21, 50, 25, 16, 30, 1 },
+	{ 1930, 21, 50, 25, 16, 30, 1 },
+	{ 1920, 21, 50, 25, 16, 30, 1 },
+	{ 1910, 21, 50, 25, 16, 30, 1 },
+	{ 1900, 21, 50, 25, 16, 29, 1 },
+	{ 1890, 21, 50, 25, 16, 29, 1 },
+	{ 1880, 20, 50, 25, 16, 29, 1 },
+	{ 1870, 20, 50, 25, 16, 29, 1 },
+	{ 1860, 20, 50, 25, 15, 29, 1 },
+	{ 1850, 20, 50, 25, 15, 29, 1 },
+	{ 1840, 20, 50, 25, 15, 28, 1 },
+	{ 1830, 20, 50, 25, 15, 28, 1 },
+	{ 1820, 20, 50, 25, 15, 28, 1 },
+	{ 1810, 20, 50, 25, 15, 28, 1 },
+	{ 1800, 19, 50, 25, 15, 28, 1 },
+	{ 1790, 19, 50, 25, 15, 28, 1 },
+	{ 1780, 19, 50, 25, 15, 27, 1 },
+	{ 1770, 19, 50, 25, 15, 27, 1 },
+	{ 1760, 19, 50, 25, 15, 27, 1 },
+	{ 1750, 19, 50, 25, 14, 27, 1 },
+	{ 1740, 19, 50, 25, 14, 27, 1 },
+	{ 1730, 19, 50, 25, 14, 27, 1 },
+	{ 1720, 19, 50, 25, 14, 27, 1 },
+	{ 1710, 18, 50, 25, 14, 26, 1 },
+	{ 1700, 18, 50, 25, 14, 26, 1 },
+	{ 1690, 18, 50, 25, 14, 26, 1 },
+	{ 1680, 18, 50, 25, 14, 26, 1 },
+	{ 1670, 18, 50, 25, 14, 26, 1 },
+	{ 1660, 18, 50, 25, 14, 26, 1 },
+	{ 1650, 18, 50, 25, 14, 25, 1 },
+	{ 1640, 18, 50, 25, 14, 25, 1 },
+	{ 1630, 18, 50, 25, 13, 25, 1 },
+	{ 1620, 17, 50, 25, 13, 25, 1 },
+	{ 1610, 17, 50, 25, 13, 25, 1 },
+	{ 1600, 17, 50, 25, 13, 25, 1 },
+	{ 1590, 17, 50, 25, 13, 24, 1 },
+	{ 1580, 17, 50, 25, 13, 24, 1 },
+	{ 1570, 17, 50, 25, 13, 24, 1 },
+	{ 1560, 17, 50, 25, 13, 24, 1 },
+	{ 1550, 17, 50, 25, 13, 24, 1 },
+	{ 1540, 16, 50, 25, 13, 24, 1 },
+	{ 1530, 16, 50, 25, 13, 24, 1 },
+	{ 1520, 16, 50, 25, 13, 23, 1 },
+	{ 1510, 16, 50, 25, 12, 23, 1 },
+	{ 1500, 16, 50, 25, 12, 23, 1 },
+	{ 1490, 16, 50, 25, 12, 23, 1 },
+	{ 1480, 16, 50, 25, 12, 23, 1 },
+	{ 1470, 16, 50, 25, 12, 23, 1 },
+	{ 1460, 16, 50, 25, 12, 22, 1 },
+	{ 1450, 15, 50, 25, 12, 22, 1 },
+	{ 1440, 15, 50, 25, 12, 22, 1 },
+	{ 1430, 15, 50, 25, 12, 22, 1 },
+	{ 1420, 15, 50, 25, 12, 22, 1 },
+	{ 1410, 15, 50, 25, 12, 22, 1 },
+	{ 1400, 15, 50, 25, 11, 21, 1 },
+	{ 1390, 15, 50, 25, 11, 21, 1 },
+	{ 1380, 15, 50, 25, 11, 21, 1 },
+	{ 1370, 15, 50, 25, 11, 21, 1 },
+	{ 1360, 14, 50, 25, 11, 21, 1 },
+	{ 1350, 14, 50, 25, 11, 21, 1 },
+	{ 1340, 14, 50, 25, 11, 21, 1 },
+	{ 1330, 14, 50, 25, 11, 20, 1 },
+	{ 1320, 14, 50, 25, 11, 20, 1 },
+	{ 1310, 14, 50, 25, 11, 20, 1 },
+	{ 1300, 14, 50, 25, 11, 20, 1 },
+	{ 1290, 14, 50, 25, 11, 20, 1 },
+	{ 1280, 13, 50, 25, 10, 20, 1 },
+	{ 1270, 13, 50, 25, 10, 19, 1 },
+	{ 1260, 13, 50, 25, 10, 19, 1 },
+	{ 1250, 13, 50, 25, 10, 19, 1 },
+	{ 1240, 13, 50, 25, 10, 19, 1 },
+	{ 1230, 13, 50, 25, 10, 19, 1 },
+	{ 1220, 13, 50, 25, 10, 19, 1 },
+	{ 1210, 13, 50, 25, 10, 19, 1 },
+	{ 1200, 13, 50, 25, 10, 18, 1 },
+	{ 1190, 12, 50, 25, 10, 18, 1 },
+	{ 1180, 12, 50, 25, 10, 18, 1 },
+	{ 1170, 12, 50, 25, 10, 18, 1 },
+	{ 1160, 12, 50, 25,  9, 18, 1 },
+	{ 1150, 12, 50, 25,  9, 18, 1 },
+	{ 1140, 12, 50, 25,  9, 17, 1 },
+	{ 1130, 12, 50, 25,  9, 17, 1 },
+	{ 1120, 12, 50, 25,  9, 17, 1 },
+	{ 1110, 12, 50, 25,  9, 17, 1 },
+	{ 1100, 11, 50, 25,  9, 17, 1 },
+	{ 1090, 11, 50, 25,  9, 17, 1 },
+	{ 1080, 11, 50, 25,  9, 16, 1 },
+	{ 1070, 11, 50, 25,  9, 16, 1 },
+	{ 1060, 11, 50, 25,  9, 16, 1 },
+	{ 1050, 11, 50, 25,  8, 16, 1 },
+	{ 1040, 11, 50, 25,  8, 16, 1 },
+	{ 1030, 11, 50, 25,  8, 16, 1 },
+	{ 1020, 10, 50, 25,  8, 16, 1 },
+	{ 1010, 10, 50, 25,  8, 15, 1 },
+	{ 1000, 10, 50, 25,  8, 15, 1 },
+	{  990, 10, 50, 25,  8, 15, 2 },
+	{  980, 10, 50, 25,  8, 15, 2 },
+	{  970, 10, 50, 25,  8, 15, 2 },
+	{  960, 10, 50, 25,  8, 15, 2 },
+	{  950, 10, 50, 25,  8, 14, 2 },
+	{  940, 10, 50, 25,  8, 14, 2 },
+	{  930,  9, 50, 25,  7, 14, 2 },
+	{  920,  9, 50, 25,  7, 14, 2 },
+	{  910,  9, 50, 25,  7, 14, 2 },
+	{  900,  9, 50, 25,  7, 14, 2 },
+	{  890,  9, 50, 25,  7, 13, 2 },
+	{  880,  9, 50, 25,  7, 13, 2 },
+	{  870,  9, 50, 25,  7, 13, 2 },
+	{  860,  9, 50, 25,  7, 13, 2 },
+	{  850,  9, 50, 25,  7, 13, 2 },
+	{  840,  8, 50, 25,  7, 13, 2 },
+	{  830,  8, 50, 25,  7, 13, 2 },
+	{  820,  8, 50, 25,  7, 12, 2 },
+	{  810,  8, 50, 25,  6, 12, 2 },
+	{  800,  8, 50, 25,  6, 12, 2 },
+	{  790,  8, 50, 25,  6, 12, 2 },
+	{  780,  8, 50, 25,  6, 12, 2 },
+	{  770,  8, 50, 25,  6, 12, 2 },
+	{  760,  7, 50, 25,  6, 11, 2 },
+	{  750,  7, 50, 25,  6, 11, 2 },
+	{  740,  7, 50, 25,  6, 11, 2 },
+	{  730,  7, 50, 25,  6, 11, 2 },
+	{  720,  7, 50, 25,  6, 11, 2 },
+	{  710,  7, 50, 25,  6, 11, 2 },
+	{  700,  7, 50, 25,  5, 10, 2 },
+	{  690,  7, 50, 25,  5, 10, 2 },
+	{  680,  7, 50, 25,  5, 10, 2 },
+	{  670,  6, 50, 25,  5, 10, 2 },
+	{  660,  6, 50, 25,  5, 10, 2 },
+	{  650,  6, 50, 25,  5, 10, 2 },
+	{  640,  6, 50, 25,  5, 10, 2 },
+	{  630,  6, 50, 25,  5,  9, 2 },
+	{  620,  6, 50, 25,  5,  9, 2 },
+	{  610,  6, 50, 25,  5,  9, 2 },
+	{  600,  6, 50, 25,  5,  9, 2 },
+	{  590,  6, 50, 25,  5,  9, 2 },
+	{  580,  5, 50, 25,  4,  9, 2 },
+	{  570,  5, 50, 25,  4,  8, 2 },
+	{  560,  5, 50, 25,  4,  8, 2 },
+	{  550,  5, 50, 25,  4,  8, 2 },
+	{  540,  5, 50, 25,  4,  8, 2 },
+	{  530,  5, 50, 25,  4,  8, 2 },
+	{  520,  5, 50, 25,  4,  8, 2 },
+	{  510,  5, 50, 25,  4,  8, 2 },
+	{  500,  4, 50, 25,  4,  7, 2 },
+	{  490, 18, 50, 25, 14,  6, 2 },
+	{  480, 17, 50, 25, 14,  6, 2 },
+	{  470, 17, 50, 25, 14,  6, 2 },
+	{  460, 17, 50, 25, 13,  6, 2 },
+	{  450, 16, 50, 25, 13,  6, 2 },
+	{  440, 16, 50, 25, 13,  6, 2 },
+	{  430, 15, 50, 25, 12,  6, 2 },
+	{  420, 15, 50, 25, 12,  5, 2 },
+	{  410, 15, 50, 25, 12,  5, 2 },
+	{  400, 14, 50, 25, 11,  5, 2 },
+	{  390, 14, 50, 25, 11,  5, 2 },
+	{  380, 13, 50, 25, 11,  5, 2 },
+	{  370, 13, 50, 25, 11,  5, 2 },
+	{  360, 13, 50, 25, 10,  4, 2 },
+	{  350, 12, 50, 25, 10,  4, 2 },
+	{  340, 12, 50, 25, 10,  4, 2 },
+	{  330, 11, 50, 25,  9,  4, 2 },
+	{  320, 11, 50, 25,  9,  4, 2 },
+	{  310, 11, 50, 25,  9,  4, 2 },
+	{  300, 10, 50, 25,  8,  3, 2 },
+	{  290, 10, 50, 25,  8,  3, 2 },
+	{  280,  9, 50, 25,  8,  3, 2 },
+	{  270,  9, 50, 25,  8,  3, 2 },
+	{  260,  8, 50, 25,  7,  3, 2 },
+	{  250,  8, 50, 25,  7,  3, 2 },
+	{  240,  8, 50, 25,  7,  3, 2 },
+	{  230,  7, 50, 25,  6,  2, 2 },
+	{  220,  7, 50, 25,  6,  2, 2 },
+	{  210,  6, 50, 25,  6,  2, 2 },
+	{  200,  6, 50, 25,  5,  2, 2 },
+	{  190,  6, 50, 25,  5,  2, 2 },
+	{  180,  5, 50, 25,  5,  2, 2 },
+	{  170,  5, 50, 25,  5,  1, 2 },
+	{  160,  4, 50, 25,  4,  1, 2 },
+	{  150,  4, 50, 25,  4,  1, 2 },
+	{  140,  4, 50, 25,  4,  1, 2 },
+	{  130,  3, 50, 25,  3,  1, 2 },
+	{  120,  3, 50, 25,  3,  1, 2 },
+	{  110,  2, 50, 25,  3,  1, 2 },
+	{  100,  2, 50, 25,  2,  0, 2 },
+	{   90,  2, 50, 25,  2,  0, 2 },
+	{   80,  1, 50, 25,  2,  0, 2 },
+};
+
+static inline void
+phy_write(struct samsung_mipi_dcphy *samsung, u32 reg, u32 val)
+{
+	writel(val, samsung->base + reg);
+}
+
+static inline u32 phy_read(struct samsung_mipi_dcphy *samsung, u32 reg)
+{
+	return readl(samsung->base + reg);
+}
+
+static inline void phy_update_bits(struct samsung_mipi_dcphy *samsung,
+				   u32 reg, u32 mask, u32 val)
+{
+	u32 orig, tmp;
+
+	orig = phy_read(samsung, reg);
+	tmp = orig & ~mask;
+	tmp |= val & mask;
+	phy_write(samsung, reg, tmp);
+}
+
+static inline void grf_write(struct samsung_mipi_dcphy *samsung,
+			     u32 reg, u32 val)
+{
+	writel(val, samsung->grf + reg);
+}
+
+static const struct samsung_mipi_dphy_timing *
+samsung_mipi_dphy_get_timing(struct samsung_mipi_dcphy *samsung)
+{
+	const struct samsung_mipi_dphy_timing *timings;
+	unsigned int num_timings;
+	unsigned int lane_mbps = samsung->pll.rate / USEC_PER_SEC;
+	unsigned int i;
+
+	timings = samsung_mipi_dphy_timing_table;
+	num_timings = ARRAY_SIZE(samsung_mipi_dphy_timing_table);
+
+	for (i = num_timings; i > 0; i--)
+		if (lane_mbps <= timings[i - 1].max_lane_mbps)
+			break;
+
+	if (i == 0)
+		++i;
+
+	return &timings[i - 1];
+}
+
+static const struct samsung_mipi_cphy_timing *
+samsung_mipi_cphy_get_timing(struct samsung_mipi_dcphy *samsung)
+{
+	const struct samsung_mipi_cphy_timing *timings;
+	unsigned int num_timings;
+	unsigned int lane_msps = div64_ul(samsung->pll.rate, USEC_PER_SEC);
+	unsigned int i;
+
+	timings = samsung_mipi_cphy_timing_table;
+	num_timings = ARRAY_SIZE(samsung_mipi_cphy_timing_table);
+
+	for (i = num_timings; i > 0; i--)
+		if (lane_msps <= timings[i - 1].max_lane_msps)
+			break;
+
+	if (i == 0)
+		++i;
+
+	return &timings[i - 1];
+}
+
+static void samsung_mipi_dcphy_bias_block_enable(struct samsung_mipi_dcphy *samsung)
+{
+	phy_write(samsung, BIAS_CON0, 0x0010);
+	phy_write(samsung, BIAS_CON1, 0x0110);
+	phy_write(samsung, BIAS_CON2, 0x3223);
+}
+
+static void samsung_mipi_dcphy_bias_block_disable(struct samsung_mipi_dcphy *samsung)
+{
+}
+
+static void samsung_mipi_dcphy_pll_configure(struct samsung_mipi_dcphy *samsung)
+{
+	phy_update_bits(samsung, PLL_CON0, S_MASK | P_MASK,
+			S(samsung->pll.scaler) | P(samsung->pll.prediv));
+
+	if (samsung->pll.dsm < 0) {
+		u16 dsm_tmp;
+
+		/* Using opposite number subtraction to find complement */
+		dsm_tmp = abs(samsung->pll.dsm);
+		dsm_tmp = dsm_tmp - 1;
+		dsm_tmp ^= 0xffff;
+		phy_write(samsung, PLL_CON1, dsm_tmp);
+	} else {
+		phy_write(samsung, PLL_CON1, samsung->pll.dsm);
+	}
+
+	phy_update_bits(samsung, PLL_CON2, M_MASK, M(samsung->pll.fbdiv));
+
+	if (samsung->pll.ssc_en) {
+		phy_write(samsung, PLL_CON3,
+			  MRR(samsung->pll.mrr) | MFR(samsung->pll.mfr));
+		phy_update_bits(samsung, PLL_CON4, SSCG_EN, SSCG_EN);
+	}
+
+	phy_write(samsung, PLL_CON5, RESET_N_SEL | PLL_ENABLE_SEL);
+	phy_write(samsung, PLL_CON7, PLL_LOCK_CNT(0xf000));
+	phy_write(samsung, PLL_CON8, PLL_STB_CNT(0xf000));
+}
+
+static void
+samsung_mipi_dphy_clk_lane_timing_init(struct samsung_mipi_dcphy *samsung)
+{
+	const struct samsung_mipi_dphy_timing *timing;
+	unsigned int lane_hs_rate = div64_ul(samsung->pll.rate, USEC_PER_SEC);
+	u32 val = 0;
+
+	timing = samsung_mipi_dphy_get_timing(samsung);
+	phy_write(samsung, DPHY_MC_GNR_CON0, 0xf000);
+	phy_write(samsung, DPHY_MC_ANA_CON0, 0x7133);
+
+	if (lane_hs_rate >= 4500)
+		phy_write(samsung, DPHY_MC_ANA_CON1, 0x0001);
+
+	/*
+	 * Divide-by-2 Clock from Serial Clock. Use this when data rate is under
+	 * 1500Mbps, otherwise divide-by-16 Clock from Serial Clock
+	 */
+	if (lane_hs_rate < 1500)
+		val = HSTX_CLK_SEL;
+
+	val |= T_LPX(timing->lpx);
+	/*  T_LP_EXIT_SKEW/T_LP_ENTRY_SKEW unconfig */
+	phy_write(samsung, DPHY_MC_TIME_CON0, val);
+
+	val = T_CLK_ZERO(timing->clk_zero) | T_CLK_PREPARE(timing->clk_prepare);
+	phy_write(samsung, DPHY_MC_TIME_CON1, val);
+
+	val = T_HS_EXIT(timing->hs_exit) | T_CLK_TRAIL(timing->clk_trail_eot);
+	phy_write(samsung, DPHY_MC_TIME_CON2, val);
+
+	val = T_CLK_POST(timing->clk_post);
+	phy_write(samsung, DPHY_MC_TIME_CON3, val);
+
+	/* Escape Clock is 20.00MHz */
+	phy_write(samsung, DPHY_MC_TIME_CON4, 0x1f4);
+
+	/*
+	 * skew calibration should be off, if the operation data rate is
+	 * under 1.5Gbps or equal to 1.5Gbps.
+	 */
+	if (lane_hs_rate > 1500)
+		phy_write(samsung, DPHY_MC_DESKEW_CON0, 0x9cb1);
+}
+
+static void
+samsung_mipi_dphy_data_lane_timing_init(struct samsung_mipi_dcphy *samsung)
+{
+	const struct samsung_mipi_dphy_timing *timing;
+	unsigned int lane_hs_rate = div64_ul(samsung->pll.rate, USEC_PER_SEC);
+	u32 val = 0;
+
+	timing = samsung_mipi_dphy_get_timing(samsung);
+
+	phy_write(samsung, COMBO_MD0_ANA_CON0, 0x7133);
+	phy_write(samsung, COMBO_MD1_ANA_CON0, 0x7133);
+	phy_write(samsung, COMBO_MD2_ANA_CON0, 0x7133);
+	phy_write(samsung, DPHY_MD3_ANA_CON0, 0x7133);
+
+	if (lane_hs_rate >= 1500) {
+		phy_write(samsung, COMBO_MD0_ANA_CON1, 0x0001);
+		phy_write(samsung, COMBO_MD1_ANA_CON1, 0x0001);
+		phy_write(samsung, COMBO_MD2_ANA_CON1, 0x0001);
+		phy_write(samsung, DPHY_MD3_ANA_CON1, 0x0001);
+	}
+
+	/*
+	 * Divide-by-2 Clock from Serial Clock. Use this when data rate is under
+	 * 1500Mbps, otherwise divide-by-16 Clock from Serial Clock
+	 */
+	if (lane_hs_rate < 1500)
+		val = HSTX_CLK_SEL;
+
+	val |= T_LPX(timing->lpx);
+	/*  T_LP_EXIT_SKEW/T_LP_ENTRY_SKEW unconfig */
+	phy_write(samsung, COMBO_MD0_TIME_CON0, val);
+	phy_write(samsung, COMBO_MD1_TIME_CON0, val);
+	phy_write(samsung, COMBO_MD2_TIME_CON0, val);
+	phy_write(samsung, DPHY_MD3_TIME_CON0, val);
+
+	val = T_HS_ZERO(timing->hs_zero) | T_HS_PREPARE(timing->hs_prepare);
+	phy_write(samsung, COMBO_MD0_TIME_CON1, val);
+	phy_write(samsung, COMBO_MD1_TIME_CON1, val);
+	phy_write(samsung, COMBO_MD2_TIME_CON1, val);
+	phy_write(samsung, DPHY_MD3_TIME_CON1, val);
+
+	val = T_HS_EXIT(timing->hs_exit) | T_HS_TRAIL(timing->hs_trail_eot);
+	phy_write(samsung, COMBO_MD0_TIME_CON2, val);
+	phy_write(samsung, COMBO_MD1_TIME_CON2, val);
+	phy_write(samsung, COMBO_MD2_TIME_CON2, val);
+	phy_write(samsung, DPHY_MD3_TIME_CON2, val);
+
+	/* TTA-GET/TTA-GO Timing Counter register use default value */
+	val = T_TA_GET(0x3) | T_TA_GO(0x0);
+	phy_write(samsung, COMBO_MD0_TIME_CON3, val);
+	phy_write(samsung, COMBO_MD1_TIME_CON3, val);
+	phy_write(samsung, COMBO_MD2_TIME_CON3, val);
+	phy_write(samsung, DPHY_MD3_TIME_CON3, val);
+
+	/* Escape Clock is 20.00MHz */
+	phy_write(samsung, COMBO_MD0_TIME_CON4, 0x1f4);
+	phy_write(samsung, COMBO_MD1_TIME_CON4, 0x1f4);
+	phy_write(samsung, COMBO_MD2_TIME_CON4, 0x1f4);
+	phy_write(samsung, DPHY_MD3_TIME_CON4, 0x1f4);
+}
+
+static void samsung_mipi_dcphy_pll_enable(struct samsung_mipi_dcphy *samsung)
+{
+	u32 sts;
+	int ret;
+
+	phy_update_bits(samsung, PLL_CON0, PLL_EN, PLL_EN);
+
+	ret = readl_poll_timeout(samsung->base + PLL_STAT0,
+				 sts, (sts & PLL_LOCK), 20000);
+	if (ret < 0)
+		dev_err(samsung->dev, "DC-PHY pll is not locked\n");
+}
+
+static void samsung_mipi_dcphy_pll_disable(struct samsung_mipi_dcphy *samsung)
+{
+	phy_update_bits(samsung, PLL_CON0, PLL_EN, 0);
+}
+
+static void samsung_mipi_dphy_lane_enable(struct samsung_mipi_dcphy *samsung)
+{
+	u32 sts;
+	int ret;
+
+	phy_write(samsung, DPHY_MC_GNR_CON1, T_PHY_READY(0x2000));
+	phy_write(samsung, COMBO_MD0_GNR_CON1, T_PHY_READY(0x2000));
+	phy_write(samsung, COMBO_MD1_GNR_CON1, T_PHY_READY(0x2000));
+	phy_write(samsung, COMBO_MD2_GNR_CON1, T_PHY_READY(0x2000));
+	phy_write(samsung, DPHY_MD3_GNR_CON1, T_PHY_READY(0x2000));
+
+	phy_update_bits(samsung, DPHY_MC_GNR_CON0, PHY_ENABLE, PHY_ENABLE);
+	phy_update_bits(samsung, COMBO_MD0_GNR_CON0, PHY_ENABLE, PHY_ENABLE);
+	phy_update_bits(samsung, COMBO_MD1_GNR_CON0, PHY_ENABLE, PHY_ENABLE);
+	phy_update_bits(samsung, COMBO_MD2_GNR_CON0, PHY_ENABLE, PHY_ENABLE);
+	phy_update_bits(samsung, DPHY_MD3_GNR_CON0, PHY_ENABLE, PHY_ENABLE);
+
+	ret = readl_poll_timeout(samsung->base + DPHY_MC_GNR_CON0,
+				 sts, (sts & PHY_READY), 2000);
+	if (ret < 0)
+		dev_err(samsung->dev, "D-PHY clk lane is not locked\n");
+
+	ret = readl_poll_timeout(samsung->base + COMBO_MD0_GNR_CON0,
+				 sts, (sts & PHY_READY), 2000);
+	if (ret < 0)
+		dev_err(samsung->dev, "D-PHY Data0 lane is not locked\n");
+
+	ret = readl_poll_timeout(samsung->base + COMBO_MD1_GNR_CON0,
+				 sts, (sts & PHY_READY), 2000);
+	if (ret < 0)
+		dev_err(samsung->dev, "D-PHY Data1 lane is not locked\n");
+
+	ret = readl_poll_timeout(samsung->base + COMBO_MD2_GNR_CON0,
+				 sts, (sts & PHY_READY), 2000);
+	if (ret < 0)
+		dev_err(samsung->dev, "D-PHY Data2 lane is not locked\n");
+
+	ret = readl_poll_timeout(samsung->base + DPHY_MD3_GNR_CON0,
+				 sts, (sts & PHY_READY), 2000);
+	if (ret < 0)
+		dev_err(samsung->dev, "D-PHY Data3 lane is not locked\n");
+}
+
+static void samsung_mipi_cphy_timing_init(struct samsung_mipi_dcphy *samsung)
+{
+	const struct samsung_mipi_cphy_timing *timing;
+	unsigned int lane_hs_rate = div64_ul(samsung->pll.rate, USEC_PER_SEC);
+	u32 val = 0;
+
+	timing = samsung_mipi_cphy_get_timing(samsung);
+
+	/*
+	 * Divide-by-2 Clock from Serial Clock. Use this when data rate is under
+	 * 1500Mbps, otherwise divide-by-16 Clock from Serial Clock
+	 */
+	if (lane_hs_rate < 1500)
+		val = HSTX_CLK_SEL;
+
+	val |= T_LPX(timing->lpx);
+	/*  T_LP_EXIT_SKEW/T_LP_ENTRY_SKEW unconfig */
+	phy_write(samsung, COMBO_MD0_TIME_CON0, val);
+	phy_write(samsung, COMBO_MD1_TIME_CON0, val);
+	phy_write(samsung, COMBO_MD2_TIME_CON0, val);
+
+	val = T_HS_ZERO(timing->prebegin_3) | T_HS_PREPARE(timing->prepare_3);
+	phy_write(samsung, COMBO_MD0_TIME_CON1, val);
+	phy_write(samsung, COMBO_MD1_TIME_CON1, val);
+	phy_write(samsung, COMBO_MD2_TIME_CON1, val);
+
+	val = T_HS_EXIT(timing->hs_exit) | T_HS_TRAIL(timing->post_3);
+	phy_write(samsung, DPHY_MD3_TIME_CON2, val);
+	phy_write(samsung, COMBO_MD0_TIME_CON2, val);
+	phy_write(samsung, COMBO_MD1_TIME_CON2, val);
+	phy_write(samsung, COMBO_MD2_TIME_CON2, val);
+
+	/* TTA-GET/TTA-GO Timing Counter register use default value */
+	val = T_TA_GET(0x3) | T_TA_GO(0x0);
+	phy_write(samsung, COMBO_MD0_TIME_CON3, val);
+	phy_write(samsung, COMBO_MD1_TIME_CON3, val);
+	phy_write(samsung, COMBO_MD2_TIME_CON3, val);
+
+	/* Escape Clock is 20.00MHz */
+	phy_write(samsung, COMBO_MD0_TIME_CON4, 0x1f4);
+	phy_write(samsung, COMBO_MD1_TIME_CON4, 0x1f4);
+	phy_write(samsung, COMBO_MD2_TIME_CON4, 0x1f4);
+
+	/* set T_ERR_SOT_SYNC default value */
+}
+
+static void samsung_mipi_cphy_lane_enable(struct samsung_mipi_dcphy *samsung)
+{
+	u32 sts;
+	int ret;
+
+	phy_write(samsung, COMBO_MD0_GNR_CON1, T_PHY_READY(0x2000));
+	phy_write(samsung, COMBO_MD1_GNR_CON1, T_PHY_READY(0x2000));
+	phy_write(samsung, COMBO_MD2_GNR_CON1, T_PHY_READY(0x2000));
+
+	phy_update_bits(samsung, COMBO_MD0_GNR_CON0, PHY_ENABLE, PHY_ENABLE);
+	phy_update_bits(samsung, COMBO_MD1_GNR_CON0, PHY_ENABLE, PHY_ENABLE);
+	phy_update_bits(samsung, COMBO_MD2_GNR_CON0, PHY_ENABLE, PHY_ENABLE);
+
+	/* 200us is needed for locking the PLL */
+	ret = readl_poll_timeout(samsung->base + COMBO_MD0_GNR_CON0,
+				 sts, (sts & PHY_READY), 2000);
+	if (ret < 0)
+		dev_err(samsung->dev, "C-PHY Data0 lane is not locked\n");
+
+	ret = readl_poll_timeout(samsung->base + COMBO_MD1_GNR_CON0,
+				 sts, (sts & PHY_READY), 2000);
+	if (ret < 0)
+		dev_err(samsung->dev, "C-PHY Data1 lane is not locked\n");
+
+	ret = readl_poll_timeout(samsung->base + COMBO_MD2_GNR_CON0,
+				 sts, (sts & PHY_READY), 2000);
+	if (ret < 0)
+		dev_err(samsung->dev, "C-PHY Data2 lane is not locked\n");
+}
+
+static void
+samsung_mipi_dcphy_hs_vreg_amp_config(struct samsung_mipi_dcphy *samsung)
+{
+	phy_write(samsung, DPHY_MC_ANA_CON2, HS_VREG_AMP_ICON(2));
+}
+
+static void samsung_mipi_dphy_power_on(struct samsung_mipi_dcphy *samsung)
+{
+	reset_assert(&samsung->phy_rst);
+
+	samsung_mipi_dcphy_bias_block_enable(samsung);
+	samsung_mipi_dcphy_pll_configure(samsung);
+	samsung_mipi_dphy_clk_lane_timing_init(samsung);
+	samsung_mipi_dphy_data_lane_timing_init(samsung);
+	samsung_mipi_dcphy_pll_enable(samsung);
+	samsung_mipi_dphy_lane_enable(samsung);
+
+	reset_deassert(&samsung->phy_rst);
+}
+
+static void samsung_mipi_cphy_power_on(struct samsung_mipi_dcphy *samsung)
+{
+	grf_write(samsung, MIPI_DCPHY_GRF_CON0, M_CPHY_MODE);
+	reset_assert(&samsung->phy_rst);
+
+	samsung_mipi_dcphy_bias_block_enable(samsung);
+	samsung_mipi_dcphy_hs_vreg_amp_config(samsung);
+	samsung_mipi_dcphy_pll_configure(samsung);
+	samsung_mipi_cphy_timing_init(samsung);
+	samsung_mipi_dcphy_pll_enable(samsung);
+	samsung_mipi_cphy_lane_enable(samsung);
+
+	reset_deassert(&samsung->phy_rst);
+}
+
+static void samsung_mipi_dphy_lane_disable(struct samsung_mipi_dcphy *samsung)
+{
+	phy_update_bits(samsung, DPHY_MC_GNR_CON0, PHY_ENABLE, 0);
+	phy_update_bits(samsung, COMBO_MD0_GNR_CON0, PHY_ENABLE, 0);
+	phy_update_bits(samsung, COMBO_MD1_GNR_CON0, PHY_ENABLE, 0);
+	phy_update_bits(samsung, COMBO_MD2_GNR_CON0, PHY_ENABLE, 0);
+	phy_update_bits(samsung, DPHY_MD3_GNR_CON0, PHY_ENABLE, 0);
+}
+
+static void samsung_mipi_cphy_lane_disable(struct samsung_mipi_dcphy *samsung)
+{
+	phy_update_bits(samsung, COMBO_MD0_GNR_CON0, PHY_ENABLE, 0);
+	phy_update_bits(samsung, COMBO_MD1_GNR_CON0, PHY_ENABLE, 0);
+	phy_update_bits(samsung, COMBO_MD2_GNR_CON0, PHY_ENABLE, 0);
+}
+
+static int samsung_mipi_dcphy_power_on(struct rockchip_phy *phy)
+{
+	struct samsung_mipi_dcphy *samsung = dev_get_priv(phy->dev);
+
+	switch (samsung->mode) {
+	case PHY_MODE_MIPI_DPHY:
+		samsung_mipi_dphy_power_on(samsung);
+		break;
+	default:
+		samsung_mipi_cphy_power_on(samsung);
+	}
+
+	return 0;
+}
+
+static int samsung_mipi_dcphy_power_off(struct rockchip_phy *phy)
+{
+	struct samsung_mipi_dcphy *samsung = dev_get_priv(phy->dev);
+
+	switch (samsung->mode) {
+	case PHY_MODE_MIPI_DPHY:
+		samsung_mipi_dphy_lane_disable(samsung);
+		break;
+	default:
+		samsung_mipi_cphy_lane_disable(samsung);
+	}
+
+	samsung_mipi_dcphy_pll_disable(samsung);
+	samsung_mipi_dcphy_bias_block_disable(samsung);
+
+	return 0;
+}
+
+
+static int
+samsung_mipi_dcphy_pll_ssc_modulation_calc(struct samsung_mipi_dcphy *samsung,
+					   u8 *mfr, u8 *mrr)
+{
+	unsigned long fin = 24000;
+	u16 prediv = samsung->pll.prediv;
+	u16 fbdiv = samsung->pll.fbdiv;
+	u16 min_mfr, max_mfr;
+	u16 _mfr, best_mfr = 0;
+	u16 mr, _mrr, best_mrr = 0;
+
+	/* 20KHz ≤ MF ≤ 150KHz */
+	max_mfr = DIV_ROUND_UP(fin, (20 * prediv) << 5);
+	min_mfr = div64_ul(fin, ((150 * prediv) << 5));
+	/*0 ≤ mfr ≤ 255 */
+	if (max_mfr > 256)
+		max_mfr = 256;
+
+	for (_mfr = min_mfr; _mfr < max_mfr; _mfr++) {
+		/* 1 ≤ mrr ≤ 31 */
+		for (_mrr = 1; _mrr < 32; _mrr++) {
+			mr = DIV_ROUND_UP(_mfr * _mrr * 100, fbdiv << 6);
+			/* 0 ≤ MR ≤ 5% */
+			if (mr > 5)
+				continue;
+
+			if (_mfr * _mrr < 513) {
+				best_mfr = _mfr;
+				best_mrr = _mrr;
+				break;
+			}
+		}
+	}
+
+	if (best_mrr) {
+		*mfr = best_mfr & 0xff;
+		*mrr = best_mrr & 0x3f;
+	} else {
+		dev_err(samsung->dev, "failed to calc ssc parameter mfr and mrr\n");
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static unsigned long
+samsung_mipi_dcphy_pll_round_rate(struct samsung_mipi_dcphy *samsung,
+				  unsigned long prate, unsigned long rate,
+				  u8 *prediv, u16 *fbdiv, int *dsm, u8 *scaler)
+{
+	unsigned int max_fout = samsung->c_option ? 4500 : 2000;
+	unsigned long best_freq = 0;
+	unsigned int fin, fvco, fout;
+	u8 min_prediv, max_prediv;
+	u8 _prediv, best_prediv = 1;
+	u16 _fbdiv, best_fbdiv = 1;
+	u8 _scaler, best_scaler = 0;
+	long _dsm, best_dsm = 0;
+	u32 min_delta = 0xffffffff;
+
+	/*
+	 * The PLL output frequency can be calculated using a simple formula:
+	 * Fvco = ((m+k/65536) x 2 x Fin) / p
+	 * Fout = ((m+k/65536) x 2 x Fin) / (p x 2^s)
+	 */
+	fin = div64_ul(prate, USEC_PER_SEC);
+
+	while (!best_freq) {
+		fout = div64_ul(rate, USEC_PER_SEC);
+		if (fout > max_fout)
+			fout = max_fout;
+
+		/* 0 ≤ S[2:0] ≤ 6 */
+		for (_scaler = 0; _scaler < 7; _scaler++) {
+			fvco = fout << _scaler;
+
+			/*
+			 * 2600MHz ≤ FVCO ≤ 6600MHz
+			 */
+			if (fvco < 2600 || fvco > 6600)
+				continue;
+
+			/* 6MHz ≤ Fref(Fin / p) ≤ 30MHz */
+			min_prediv = DIV_ROUND_UP(fin, 30);
+			max_prediv = fin / 6;
+
+			for (_prediv = min_prediv; _prediv <= max_prediv; _prediv++) {
+				u32 delta, tmp;
+
+				_fbdiv = DIV_ROUND_CLOSEST(fvco * _prediv, 2 * fin);
+
+				 /* 64 ≤ M[9:0] ≤ 1023 */
+				if ((_fbdiv < 64) || (_fbdiv > 1023))
+					continue;
+
+				/* -32767 ≤ K[15:0] ≤ 32767 */
+				_dsm = ((_prediv * fvco) - (2 * _fbdiv * fin));
+				_dsm = DIV_ROUND_UP(_dsm << 15, fin);
+				if (abs(_dsm) > 32767)
+					continue;
+
+				tmp = DIV_ROUND_CLOSEST((_fbdiv * fin * 2 * 1000), _prediv);
+				tmp += DIV_ROUND_CLOSEST((_dsm * fin * 1000), _prediv << 15);
+
+				delta = abs(fvco - tmp);
+				if (delta < min_delta) {
+					best_prediv = _prediv;
+					best_fbdiv = _fbdiv;
+					best_dsm = _dsm;
+					best_scaler = _scaler;
+					min_delta = delta;
+					best_freq = DIV_ROUND_CLOSEST(tmp, 1000) * USEC_PER_SEC;
+				}
+			}
+		}
+
+		rate += USEC_PER_SEC;
+	}
+
+	*prediv = best_prediv;
+	*fbdiv = best_fbdiv;
+	*dsm = (int)best_dsm & 0xffff;
+	*scaler = best_scaler;
+	dev_info(samsung->dev, "p: %d, m: %d, dsm:%ld, scaler: %d\n",
+		 best_prediv, best_fbdiv, best_dsm, best_scaler);
+
+	return best_freq >> best_scaler;
+}
+
+static unsigned long samsung_mipi_dcphy_set_pll(struct rockchip_phy *phy,
+						unsigned long rate)
+{
+	struct samsung_mipi_dcphy *samsung = dev_get_priv(phy->dev);
+	unsigned long fin, fout;
+	u8 scaler = 0, mfr = 0, mrr = 0;
+	u16 fbdiv = 1;
+	u8 prediv = 1;
+	int dsm = 0;
+	int ret;
+
+	fin = 24000000;
+	fout = samsung_mipi_dcphy_pll_round_rate(samsung, fin, rate, &prediv,
+						 &fbdiv, &dsm, &scaler);
+
+	dev_info(samsung->dev, "fin=%lu, req_rate=%lu\n", fin, rate);
+	dev_info(samsung->dev, "fout=%lu, prediv=%u, fbdiv=%u\n", fout, prediv, fbdiv);
+
+	samsung->pll.prediv = prediv;
+	samsung->pll.fbdiv = fbdiv;
+	samsung->pll.dsm = dsm;
+	samsung->pll.scaler = scaler;
+	samsung->pll.rate = fout;
+
+	/*
+	 * All DPHY 2.0 compliant Transmitters shall support SSC operating above
+	 * 2.5 Gbps
+	 */
+	if (fout > 2500000000LL) {
+		ret = samsung_mipi_dcphy_pll_ssc_modulation_calc(samsung,
+								 &mfr, &mrr);
+		if (!ret) {
+			samsung->pll.ssc_en = true;
+			samsung->pll.mfr = mfr;
+			samsung->pll.mrr = mrr;
+		}
+	}
+
+	return fout;
+}
+
+static int samsung_mipi_dcphy_set_mode(struct rockchip_phy *phy,
+				       enum phy_mode mode)
+{
+	struct samsung_mipi_dcphy *samsung = dev_get_priv(phy->dev);
+
+	samsung->mode = mode;
+	samsung->c_option = (mode == PHY_MODE_MIPI_DPHY) ? false : true;
+
+	return 0;
+}
+
+static int samsung_mipi_dcphy_probe(struct udevice *dev)
+{
+	struct samsung_mipi_dcphy *samsung = dev_get_priv(dev);
+	struct rockchip_phy *tmp_phy;
+	struct rockchip_phy *phy;
+	int ret;
+
+	phy = calloc(1, sizeof(*phy));
+	if (!phy)
+		return -ENOMEM;
+
+	tmp_phy = (struct rockchip_phy *)dev_get_driver_data(dev);
+	dev->driver_data = (ulong)phy;
+	memcpy(phy, tmp_phy, sizeof(*phy));
+
+	samsung->base = dev_read_addr_ptr(dev);
+	if (IS_ERR(samsung->base)) {
+		dev_err(dev, "resource \"phy\" not found\n");
+		return PTR_ERR(samsung->base);
+	}
+
+	samsung->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	if (IS_ERR(samsung->grf)) {
+		dev_err(dev, "resource \"grf\" not found\n");
+		return PTR_ERR(samsung->grf);
+	}
+
+	ret = reset_get_by_name(dev, "phy", &samsung->phy_rst);
+	if (ret) {
+		pr_err("reset_get_by_name(phy) failed: %d\n", ret);
+		return ret;
+	}
+
+	phy->dev = dev;
+
+	return 0;
+}
+
+static const struct rockchip_phy_funcs samsung_mipi_dcphy_funcs = {
+	.power_on = samsung_mipi_dcphy_power_on,
+	.power_off = samsung_mipi_dcphy_power_off,
+	.set_pll = samsung_mipi_dcphy_set_pll,
+	.set_mode = samsung_mipi_dcphy_set_mode,
+};
+
+static struct rockchip_phy rk3588_samsung_mipi_dcphy_driver_data = {
+	 .funcs = &samsung_mipi_dcphy_funcs,
+};
+
+static const struct udevice_id samsung_mipi_dcphy_ids[] = {
+	{
+		.compatible = "rockchip,rk3588-mipi-dcphy",
+		.data = (ulong)&rk3588_samsung_mipi_dcphy_driver_data,
+	},
+	{}
+};
+
+U_BOOT_DRIVER(samsung_mipi_dcphy) = {
+	.name = "samsung-mipi-dcphy",
+	.id = UCLASS_PHY,
+	.of_match = samsung_mipi_dcphy_ids,
+	.probe = samsung_mipi_dcphy_probe,
+	.priv_auto_alloc_size = sizeof(struct samsung_mipi_dcphy),
+};

commit 1fa095fbbe359963a174ad16519ea70002e8f201
Author: Guochun Huang <hero.huang@rock-chips.com>
Date:   Tue Nov 9 09:00:28 2021 +0000

    video/drm: dsi2: add dsi2 drivers
    
    Change-Id: I06a355b67d4fb722dac8b4d87854a33fdc7aa2c7
    Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>

diff --git a/drivers/video/drm/Kconfig b/drivers/video/drm/Kconfig
index 4e1d9288d4..27bd801aeb 100644
--- a/drivers/video/drm/Kconfig
+++ b/drivers/video/drm/Kconfig
@@ -85,6 +85,17 @@ config DRM_ROCKCHIP_DW_MIPI_DSI
 	 enable MIPI DSI on RK3288 based SoC, you should selet this
 	 option.
 
+config DRM_ROCKCHIP_DW_MIPI_DSI2
+	tristate "Rockchip specific extensions for Synopsys DW MIPI DSI2"
+	depends on DRM_ROCKCHIP
+	select DRM_MIPI_DSI
+	select DRM_ROCKCHIP_PANEL
+	help
+	 This selects support for Rockchip SoC specific extensions
+	 for the Synopsys DesignWare MIPI DSI2 driver. If you want to
+	 enable MIPI DSI2 on RK3588 based SoC, you should selet this
+	 option.
+
 config DRM_ROCKCHIP_ANALOGIX_DP
 	bool "Rockchip specific extensions for Analogix DP driver"
 	depends on DRM_ROCKCHIP
diff --git a/drivers/video/drm/Makefile b/drivers/video/drm/Makefile
index a1af938ee4..c71749463d 100644
--- a/drivers/video/drm/Makefile
+++ b/drivers/video/drm/Makefile
@@ -10,6 +10,7 @@ obj-y += rockchip_display.o rockchip_crtc.o rockchip_phy.o rockchip_bridge.o \
 obj-$(CONFIG_DRM_MIPI_DSI) += drm_mipi_dsi.o
 obj-$(CONFIG_DRM_DP_HELPER) += drm_dp_helper.o
 obj-$(CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI) += dw_mipi_dsi.o
+obj-$(CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI2) += dw_mipi_dsi2.o
 obj-$(CONFIG_DRM_ROCKCHIP_DW_HDMI) += rockchip_dw_hdmi.o dw_hdmi.o
 obj-$(CONFIG_ROCKCHIP_INNO_HDMI_PHY) += rockchip-inno-hdmi-phy.o
 obj-$(CONFIG_DRM_ROCKCHIP_INNO_HDMI) += inno_hdmi.o
diff --git a/drivers/video/drm/dw_mipi_dsi2.c b/drivers/video/drm/dw_mipi_dsi2.c
new file mode 100644
index 0000000000..938fa063a6
--- /dev/null
+++ b/drivers/video/drm/dw_mipi_dsi2.c
@@ -0,0 +1,1229 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ *
+ * Author: Guochun Huang <hero.huang@rock-chips.com>
+ */
+
+#include <drm/drm_mipi_dsi.h>
+
+#include <config.h>
+#include <common.h>
+#include <errno.h>
+#include <asm/unaligned.h>
+#include <asm/io.h>
+#include <asm/hardware.h>
+#include <dm/device.h>
+#include <dm/read.h>
+#include <dm/of_access.h>
+#include <syscon.h>
+#include <asm/arch-rockchip/clock.h>
+#include <linux/iopoll.h>
+
+#include "rockchip_display.h"
+#include "rockchip_crtc.h"
+#include "rockchip_connector.h"
+#include "rockchip_panel.h"
+#include "rockchip_phy.h"
+
+#define UPDATE(v, h, l)		(((v) << (l)) & GENMASK((h), (l)))
+
+#define DSI2_PWR_UP			0x000c
+#define RESET				0
+#define POWER_UP			BIT(0)
+#define CMD_TX_MODE(x)			UPDATE(x,  24,  24)
+#define DSI2_SOFT_RESET			0x0010
+#define SYS_RSTN			BIT(2)
+#define PHY_RSTN			BIT(1)
+#define IPI_RSTN			BIT(0)
+#define INT_ST_MAIN			0x0014
+#define DSI2_MODE_CTRL			0x0018
+#define DSI2_MODE_STATUS		0x001c
+#define DSI2_CORE_STATUS		0x0020
+#define PRI_RD_DATA_AVAIL		BIT(26)
+#define PRI_FIFOS_NOT_EMPTY		BIT(25)
+#define PRI_BUSY			BIT(24)
+#define CRI_RD_DATA_AVAIL		BIT(18)
+#define CRT_FIFOS_NOT_EMPTY		BIT(17)
+#define CRI_BUSY			BIT(16)
+#define IPI_FIFOS_NOT_EMPTY		BIT(9)
+#define IPI_BUSY			BIT(8)
+#define CORE_FIFOS_NOT_EMPTY		BIT(1)
+#define CORE_BUSY			BIT(0)
+#define MANUAL_MODE_CFG			0x0024
+#define MANUAL_MODE_EN			BIT(0)
+#define DSI2_TIMEOUT_HSTX_CFG		0x0048
+#define TO_HSTX(x)			UPDATE(x, 15, 0)
+#define DSI2_TIMEOUT_HSTXRDY_CFG	0x004c
+#define TO_HSTXRDY(x)			UPDATE(x, 15, 0)
+#define DSI2_TIMEOUT_LPRX_CFG		0x0050
+#define TO_LPRXRDY(x)			UPDATE(x, 15, 0)
+#define DSI2_TIMEOUT_LPTXRDY_CFG	0x0054
+#define TO_LPTXRDY(x)			UPDATE(x, 15, 0)
+#define DSI2_TIMEOUT_LPTXTRIG_CFG	0x0058
+#define TO_LPTXTRIG(x)			UPDATE(x, 15, 0)
+#define DSI2_TIMEOUT_LPTXULPS_CFG	0x005c
+#define TO_LPTXULPS(x)			UPDATE(x, 15, 0)
+#define DSI2_TIMEOUT_BTA_CFG		0x60
+#define TO_BTA(x)			UPDATE(x, 15, 0)
+
+#define DSI2_PHY_MODE_CFG		0x0100
+#define PPI_WIDTH(x)			UPDATE(x, 9, 8)
+#define PHY_LANES(x)			UPDATE(x - 1, 5, 4)
+#define PHY_TYPE(x)			UPDATE(x, 0, 0)
+#define DSI2_PHY_CLK_CFG		0X0104
+#define PHY_LPTX_CLK_DIV(x)		UPDATE(x, 12, 8)
+#define NON_CONTINUOUS_CLK		BIT(0)
+#define DSI2_PHY_LP2HS_MAN_CFG		0x010c
+#define PHY_LP2HS_TIME(x)		UPDATE(x, 28, 0)
+#define DSI2_PHY_HS2LP_MAN_CFG		0x0114
+#define PHY_HS2LP_TIME(x)		UPDATE(x, 28, 0)
+#define DSI2_PHY_MAX_RD_T_MAN_CFG	0x011c
+#define PHY_MAX_RD_TIME(x)		UPDATE(x, 26, 0)
+#define DSI2_PHY_ESC_CMD_T_MAN_CFG	0x0124
+#define PHY_ESC_CMD_TIME(x)		UPDATE(x, 28, 0)
+#define DSI2_PHY_ESC_BYTE_T_MAN_CFG	0x012c
+#define PHY_ESC_BYTE_TIME(x)		UPDATE(x, 28, 0)
+
+#define DSI2_PHY_IPI_RATIO_MAN_CFG	0x0134
+#define PHY_IPI_RATIO(x)		UPDATE(x, 21, 0)
+#define DSI2_PHY_SYS_RATIO_MAN_CFG	0x013C
+#define PHY_SYS_RATIO(x)		UPDATE(x, 16, 0)
+
+#define DSI2_DSI_GENERAL_CFG		0x0200
+#define BTA_EN				BIT(1)
+#define EOTP_TX_EN			BIT(0)
+#define DSI2_DSI_VCID_CFG		0x0204
+#define TX_VCID(x)			UPDATE(x, 1, 0)
+#define DSI2_DSI_SCRAMBLING_CFG		0x0208
+#define SCRAMBLING_SEED(x)		UPDATE(x, 31, 16)
+#define SCRAMBLING_EN			BIT(0)
+#define DSI2_DSI_VID_TX_CFG		0x020c
+#define LPDT_DISPLAY_CMD_EN		BIT(20)
+#define BLK_VFP_HS_EN			BIT(14)
+#define BLK_VBP_HS_EN			BIT(13)
+#define BLK_VSA_HS_EN			BIT(12)
+#define BLK_HFP_HS_EN			BIT(6)
+#define BLK_HBP_HS_EN			BIT(5)
+#define BLK_HSA_HS_EN			BIT(4)
+#define VID_MODE_TYPE(x)		UPDATE(x, 1, 0)
+#define DSI2_CRI_TX_HDR			0x02c0
+#define CMD_TX_MODE(x)			UPDATE(x, 24, 24)
+#define DSI2_CRI_TX_PLD			0x02c4
+#define DSI2_CRI_RX_HDR			0x02c8
+#define DSI2_CRI_RX_PLD			0x02cc
+
+#define DSI2_IPI_COLOR_MAN_CFG		0x0300
+#define IPI_DEPTH(x)			UPDATE(x, 7, 4)
+#define IPI_DEPTH_5_6_5_BITS		0x02
+#define IPI_DEPTH_6_BITS		0x03
+#define IPI_DEPTH_8_BITS		0x05
+#define IPI_DEPTH_10_BITS		0x06
+#define IPI_FORMAT(x)			UPDATE(x, 3, 0)
+#define IPI_FORMAT_RGB			0x0
+#define IPI_FORMAT_DSC			0x0b
+#define DSI2_IPI_VID_HSA_MAN_CFG	0x0304
+#define VID_HSA_TIME(x)			UPDATE(x, 29, 0)
+#define DSI2_IPI_VID_HBP_MAN_CFG	0x030c
+#define VID_HBP_TIME(x)			UPDATE(x, 29, 0)
+#define DSI2_IPI_VID_HACT_MAN_CFG	0x0314
+#define VID_HACT_TIME(x)		UPDATE(x, 29, 0)
+#define DSI2_IPI_VID_HLINE_MAN_CFG	0x031c
+#define VID_HLINE_TIME(x)		UPDATE(x, 29, 0)
+#define DSI2_IPI_VID_VSA_MAN_CFG	0x0324
+#define VID_VSA_LINES(x)		UPDATE(x, 9, 0)
+#define DSI2_IPI_VID_VBP_MAN_CFG	0X032C
+#define VID_VBP_LINES(x)		UPDATE(x, 9, 0)
+#define DSI2_IPI_VID_VACT_MAN_CFG	0X0334
+#define VID_VACT_LINES(x)		UPDATE(x, 13, 0)
+#define DSI2_IPI_VID_VFP_MAN_CFG	0X033C
+#define VID_VFP_LINES(x)		UPDATE(x, 9, 0)
+#define DSI2_IPI_PIX_PKT_CFG		0x0344
+#define MAX_PIX_PKT(x)			UPDATE(x, 15, 0)
+
+#define DSI2_INT_ST_PHY			0x0400
+#define DSI2_INT_MASK_PHY		0x0404
+#define DSI2_INT_ST_TO			0x0410
+#define DSI2_INT_MASK_TO		0x0414
+#define DSI2_INT_ST_ACK			0x0420
+#define DSI2_INT_MASK_ACK		0x0424
+#define DSI2_INT_ST_IPI			0x0430
+#define DSI2_INT_MASK_IPI		0x0434
+#define DSI2_INT_ST_FIFO		0x0440
+#define DSI2_INT_MASK_FIFO		0x0444
+#define DSI2_INT_ST_PRI			0x0450
+#define DSI2_INT_MASK_PRI		0x0454
+#define DSI2_INT_ST_CRI			0x0460
+#define DSI2_INT_MASK_CRI		0x0464
+#define DSI2_INT_FORCE_CRI		0x0468
+#define DSI2_MAX_REGISGER		DSI2_INT_FORCE_CRI
+
+#define CMD_PKT_STATUS_TIMEOUT_US	20000
+#define MODE_STATUS_TIMEOUT_US		20000
+#define SYS_CLK				351000L
+#define PSEC_PER_SEC			1000000000000LL
+#define USEC_PER_SEC			1000000L
+#define MSEC_PER_SEC			1000L
+
+#define GRF_REG_FIELD(reg, lsb, msb)	(((reg) << 16) | ((lsb) << 8) | (msb))
+
+enum vid_mode_type {
+	VID_MODE_TYPE_NON_BURST_SYNC_PULSES,
+	VID_MODE_TYPE_NON_BURST_SYNC_EVENTS,
+	VID_MODE_TYPE_BURST,
+};
+
+enum mode_ctrl {
+	IDLE_MODE,
+	AUTOCALC_MODE,
+	COMMAND_MODE,
+	VIDEO_MODE,
+	DATA_STREAM_MODE,
+	VIDE_TEST_MODE,
+	DATA_STREAM_TEST_MODE,
+};
+
+enum grf_reg_fields {
+	TXREQCLKHS_EN,
+	GATING_EN,
+	IPI_SHUTDN,
+	IPI_COLORM,
+	IPI_COLOR_DEPTH,
+	IPI_FORMAT,
+	MAX_FIELDS,
+};
+
+enum phy_type {
+	DPHY,
+	CPHY,
+};
+
+enum ppi_width {
+	PPI_WIDTH_8_BITS,
+	PPI_WIDTH_16_BITS,
+	PPI_WIDTH_32_BITS,
+};
+
+struct dw_mipi_dsi2_plat_data {
+	const u32 *dsi0_grf_reg_fields;
+	const u32 *dsi1_grf_reg_fields;
+	unsigned long long dphy_max_bit_rate_per_lane;
+	unsigned long long cphy_max_symbol_rate_per_lane;
+};
+
+struct mipi_dcphy {
+	/* Non-SNPS PHY */
+	struct rockchip_phy *phy;
+
+	u16 input_div;
+	u16 feedback_div;
+};
+
+/**
+ * struct mipi_dphy_configure - MIPI D-PHY configuration set
+ *
+ * This structure is used to represent the configuration state of a
+ * MIPI D-PHY phy.
+ */
+struct mipi_dphy_configure {
+	unsigned int		clk_miss;
+	unsigned int		clk_post;
+	unsigned int		clk_pre;
+	unsigned int		clk_prepare;
+	unsigned int		clk_settle;
+	unsigned int		clk_term_en;
+	unsigned int		clk_trail;
+	unsigned int		clk_zero;
+	unsigned int		d_term_en;
+	unsigned int		eot;
+	unsigned int		hs_exit;
+	unsigned int		hs_prepare;
+	unsigned int		hs_settle;
+	unsigned int		hs_skip;
+	unsigned int		hs_trail;
+	unsigned int		hs_zero;
+	unsigned int		init;
+	unsigned int		lpx;
+	unsigned int		ta_get;
+	unsigned int		ta_go;
+	unsigned int		ta_sure;
+	unsigned int		wakeup;
+	unsigned long		hs_clk_rate;
+	unsigned long		lp_clk_rate;
+	unsigned char		lanes;
+};
+
+struct dw_mipi_dsi2 {
+	struct udevice *dev;
+	void *base;
+	void *grf;
+	int id;
+	struct dw_mipi_dsi2 *master;
+	struct dw_mipi_dsi2 *slave;
+	bool prepared;
+
+	bool c_option;
+	bool dsc_enable;
+	bool scrambling_en;
+	unsigned int slice_width;
+	unsigned int slice_height;
+	u32 version_major;
+	u32 version_minor;
+
+	unsigned int lane_hs_rate; /* per lane */
+	u32 channel;
+	u32 lanes;
+	u32 format;
+	u32 mode_flags;
+	struct mipi_dcphy dcphy;
+	struct drm_display_mode mode;
+	bool data_swap;
+
+	struct mipi_dphy_configure mipi_dphy_cfg;
+	const struct dw_mipi_dsi2_plat_data *pdata;
+};
+
+static inline void dsi_write(struct dw_mipi_dsi2 *dsi2, u32 reg, u32 val)
+{
+	writel(val, dsi2->base + reg);
+}
+
+static inline u32 dsi_read(struct dw_mipi_dsi2 *dsi2, u32 reg)
+{
+	return readl(dsi2->base + reg);
+}
+
+static inline void dsi_update_bits(struct dw_mipi_dsi2 *dsi2,
+				   u32 reg, u32 mask, u32 val)
+{
+	u32 orig, tmp;
+
+	orig = dsi_read(dsi2, reg);
+	tmp = orig & ~mask;
+	tmp |= val & mask;
+	dsi_write(dsi2, reg, tmp);
+}
+
+static void grf_field_write(struct dw_mipi_dsi2 *dsi2, enum grf_reg_fields index,
+			    unsigned int val)
+{
+	const u32 field = dsi2->id ? dsi2->pdata->dsi1_grf_reg_fields[index] :
+			  dsi2->pdata->dsi0_grf_reg_fields[index];
+	u16 reg;
+	u8 msb, lsb;
+
+	if (!field)
+		return;
+
+	reg = (field >> 16) & 0xffff;
+	lsb = (field >>  8) & 0xff;
+	msb = (field >>  0) & 0xff;
+
+	rk_clrsetreg(dsi2->grf + reg, GENMASK(msb, lsb), val << lsb);
+}
+
+static unsigned long dw_mipi_dsi2_get_lane_rate(struct dw_mipi_dsi2 *dsi2)
+{
+	const struct drm_display_mode *mode = &dsi2->mode;
+	u64 max_lane_rate, lane_rate;
+	unsigned int value;
+	int bpp, lanes;
+	u64 tmp;
+
+	max_lane_rate = (dsi2->c_option) ?
+			dsi2->pdata->cphy_max_symbol_rate_per_lane :
+			dsi2->pdata->dphy_max_bit_rate_per_lane;
+
+	/* optional override of the desired bandwidth */
+	value = dev_read_u32_default(dsi2->dev, "rockchip,lane-rate", 0);
+	if (value > 0)
+		return value * 1000 * 1000;
+
+	bpp = mipi_dsi_pixel_format_to_bpp(dsi2->format);
+	if (bpp < 0)
+		bpp = 24;
+
+	lanes = dsi2->slave ? dsi2->lanes * 2 : dsi2->lanes;
+	tmp = (u64)mode->clock * 1000 * bpp;
+	do_div(tmp, lanes);
+
+	if (dsi2->c_option)
+		tmp = DIV_ROUND_CLOSEST(tmp * 100, 228);
+
+	/* take 1 / 0.9, since mbps must big than bandwidth of RGB */
+	tmp *= 10;
+	do_div(tmp, 9);
+
+	if (tmp > max_lane_rate)
+		lane_rate = max_lane_rate;
+	else
+		lane_rate = tmp;
+
+	return lane_rate;
+}
+
+static int cri_fifos_wait_avail(struct dw_mipi_dsi2 *dsi2)
+{
+	u32 sts, mask;
+	int ret;
+
+	mask = CRI_BUSY | CRT_FIFOS_NOT_EMPTY;
+	ret = readl_poll_timeout(dsi2->base + DSI2_CORE_STATUS,
+				 sts, !(sts & mask),
+				 CMD_PKT_STATUS_TIMEOUT_US);
+	if (ret < 0) {
+		printf("command interface is busy: 0x%x\n", sts);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int dw_mipi_dsi2_read_from_fifo(struct dw_mipi_dsi2 *dsi2,
+				      const struct mipi_dsi_msg *msg)
+{
+	u8 *payload = msg->rx_buf;
+	u8 data_type;
+	u16 wc;
+	int i, j, ret, len = msg->rx_len;
+	unsigned int vrefresh = drm_mode_vrefresh(&dsi2->mode);
+	u32 val;
+
+	ret = readl_poll_timeout(dsi2->base + DSI2_CORE_STATUS,
+				 val, val & CRI_RD_DATA_AVAIL,
+				 DIV_ROUND_UP(1000000, vrefresh));
+	if (ret) {
+		printf("CRI has no available read data\n");
+		return ret;
+	}
+
+	val = dsi_read(dsi2, DSI2_CRI_RX_HDR);
+	data_type = val & 0x3f;
+
+	if (mipi_dsi_packet_format_is_short(data_type)) {
+		for (i = 0; i < len && i < 2; i++)
+			payload[i] = (val >> (8 * (i + 1))) & 0xff;
+
+		return 0;
+	}
+
+	wc = (val >> 8) & 0xffff;
+	/* Receive payload */
+	for (i = 0; i < len && i < wc; i += 4) {
+		val = dsi_read(dsi2, DSI2_CRI_RX_PLD);
+		for (j = 0; j < 4 && j + i < len && j + i < wc; j++)
+			payload[i + j] = val >> (8 * j);
+	}
+
+	return 0;
+}
+
+static ssize_t dw_mipi_dsi2_transfer(struct dw_mipi_dsi2 *dsi2,
+				    const struct mipi_dsi_msg *msg)
+{
+	struct mipi_dsi_packet packet;
+	int ret;
+	int val;
+	u32 mode;
+
+	dsi_update_bits(dsi2, DSI2_DSI_VID_TX_CFG, LPDT_DISPLAY_CMD_EN,
+			msg->flags & MIPI_DSI_MSG_USE_LPM ?
+			LPDT_DISPLAY_CMD_EN : 0);
+
+	/* create a packet to the DSI protocol */
+	ret = mipi_dsi_create_packet(&packet, msg);
+	if (ret) {
+		printf("failed to create packet: %d\n", ret);
+		return ret;
+	}
+
+	/* check cri interface is not busy */
+	ret = cri_fifos_wait_avail(dsi2);
+	if (ret)
+		return ret;
+
+	/* Send payload */
+	while (DIV_ROUND_UP(packet.payload_length, 4)) {
+		if (packet.payload_length < 4) {
+			/* send residu payload */
+			val = 0;
+			memcpy(&val, packet.payload, packet.payload_length);
+			dsi_write(dsi2, DSI2_CRI_TX_PLD, val);
+			packet.payload_length = 0;
+		} else {
+			val = get_unaligned_le32(packet.payload);
+			dsi_write(dsi2, DSI2_CRI_TX_PLD, val);
+			packet.payload += 4;
+			packet.payload_length -= 4;
+		}
+	}
+
+	/* Send packet header */
+	mode = CMD_TX_MODE(msg->flags & MIPI_DSI_MSG_USE_LPM ? 1 : 0);
+	val = get_unaligned_le32(packet.header);
+	dsi_write(dsi2, DSI2_CRI_TX_HDR, mode | val);
+
+	ret = cri_fifos_wait_avail(dsi2);
+	if (ret)
+		return ret;
+
+	if (msg->rx_len) {
+		ret = dw_mipi_dsi2_read_from_fifo(dsi2, msg);
+		if (ret < 0)
+			return ret;
+	}
+
+	if (dsi2->slave) {
+		ret = dw_mipi_dsi2_transfer(dsi2->slave, msg);
+		if (ret < 0)
+			return ret;
+	}
+
+	return msg->rx_len ? msg->rx_len : msg->tx_len;
+}
+
+static void dw_mipi_dsi2_ipi_color_coding_cfg(struct dw_mipi_dsi2 *dsi2)
+{
+	u32 val, color_depth;
+
+	switch (dsi2->format) {
+	case MIPI_DSI_FMT_RGB666:
+	case MIPI_DSI_FMT_RGB666_PACKED:
+		color_depth = IPI_DEPTH_6_BITS;
+		break;
+	case MIPI_DSI_FMT_RGB565:
+		color_depth = IPI_DEPTH_5_6_5_BITS;
+		break;
+	case MIPI_DSI_FMT_RGB888:
+	default:
+		color_depth = IPI_DEPTH_8_BITS;
+		break;
+	}
+
+	val = IPI_DEPTH(color_depth) |
+	      IPI_FORMAT(dsi2->dsc_enable ? IPI_FORMAT_DSC : IPI_FORMAT_RGB);
+	dsi_write(dsi2, DSI2_IPI_COLOR_MAN_CFG, val);
+	grf_field_write(dsi2, IPI_COLOR_DEPTH, color_depth);
+
+	if (dsi2->dsc_enable)
+		grf_field_write(dsi2, IPI_FORMAT, IPI_FORMAT_DSC);
+}
+
+static void dw_mipi_dsi2_ipi_set(struct dw_mipi_dsi2 *dsi2)
+{
+	struct drm_display_mode *mode = &dsi2->mode;
+	u32 hline, hsa, hbp, hact;
+	u64 hline_time, hsa_time, hbp_time, hact_time, tmp;
+	u32 vact, vsa, vfp, vbp;
+	u32 pixel_clk, phy_hs_clk;
+	u16 val;
+
+	if (dsi2->slave || dsi2->master)
+		val = mode->hdisplay / 2;
+	else
+		val = mode->hdisplay;
+
+	dsi_write(dsi2, DSI2_IPI_PIX_PKT_CFG, MAX_PIX_PKT(val));
+
+	dw_mipi_dsi2_ipi_color_coding_cfg(dsi2);
+
+	/*
+	 * if the controller is intended to operate in data stream mode,
+	 * no more steps are required.
+	 */
+	if (!(dsi2->mode_flags & MIPI_DSI_MODE_VIDEO))
+		return;
+
+	vact = mode->vdisplay;
+	vsa = mode->vsync_end - mode->vsync_start;
+	vfp = mode->vsync_start - mode->vdisplay;
+	vbp = mode->vtotal - mode->vsync_end;
+	hact = mode->hdisplay;
+	hsa = mode->hsync_end - mode->hsync_start;
+	hbp = mode->htotal - mode->hsync_end;
+	hline = mode->htotal;
+
+	pixel_clk = mode->clock / 1000;
+
+	if (dsi2->c_option)
+		phy_hs_clk = DIV_ROUND_CLOSEST(dsi2->lane_hs_rate, 7);
+	else
+		phy_hs_clk = DIV_ROUND_CLOSEST(dsi2->lane_hs_rate, 16);
+
+	tmp = hsa * phy_hs_clk;
+	hsa_time = DIV_ROUND_CLOSEST(tmp << 16, pixel_clk);
+	dsi_write(dsi2, DSI2_IPI_VID_HSA_MAN_CFG, VID_HSA_TIME(hsa_time));
+
+	tmp = hbp * phy_hs_clk;
+	hbp_time = DIV_ROUND_CLOSEST(tmp << 16, pixel_clk);
+	dsi_write(dsi2, DSI2_IPI_VID_HBP_MAN_CFG, VID_HBP_TIME(hbp_time));
+
+	tmp = hact * phy_hs_clk;
+	hact_time = DIV_ROUND_CLOSEST(tmp << 16, pixel_clk);
+	dsi_write(dsi2, DSI2_IPI_VID_HACT_MAN_CFG, VID_HACT_TIME(hact_time));
+
+	tmp = hline * phy_hs_clk;
+	hline_time = DIV_ROUND_CLOSEST(tmp << 16, pixel_clk);
+	dsi_write(dsi2, DSI2_IPI_VID_HLINE_MAN_CFG, VID_HLINE_TIME(hline_time));
+
+	dsi_write(dsi2, DSI2_IPI_VID_VSA_MAN_CFG, VID_VSA_LINES(vsa));
+	dsi_write(dsi2, DSI2_IPI_VID_VBP_MAN_CFG, VID_VBP_LINES(vbp));
+	dsi_write(dsi2, DSI2_IPI_VID_VACT_MAN_CFG, VID_VACT_LINES(vact));
+	dsi_write(dsi2, DSI2_IPI_VID_VFP_MAN_CFG, VID_VFP_LINES(vfp));
+}
+
+static void dw_mipi_dsi2_set_vid_mode(struct dw_mipi_dsi2 *dsi2)
+{
+	u32 val = 0, mode;
+	int ret;
+
+	if (dsi2->mode_flags & MIPI_DSI_MODE_VIDEO_BURST)
+		val |= VID_MODE_TYPE_BURST;
+	else if (dsi2->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE)
+		val |= VID_MODE_TYPE_NON_BURST_SYNC_PULSES;
+
+	else
+		val |= VID_MODE_TYPE_NON_BURST_SYNC_EVENTS;
+
+	dsi_write(dsi2, DSI2_DSI_VID_TX_CFG, val);
+
+
+	dsi_write(dsi2, DSI2_MODE_CTRL, VIDEO_MODE);
+	ret = readl_poll_timeout(dsi2->base + DSI2_MODE_STATUS,
+				 mode, mode & VIDEO_MODE,
+				 MODE_STATUS_TIMEOUT_US);
+	if (ret < 0)
+		printf("failed to enter video mode\n");
+}
+
+static void dw_mipi_dsi2_set_data_stream_mode(struct dw_mipi_dsi2 *dsi2)
+{
+	u32 mode;
+	int ret;
+
+	dsi_write(dsi2, DSI2_MODE_CTRL, DATA_STREAM_MODE);
+	ret = readl_poll_timeout(dsi2->base + DSI2_MODE_STATUS,
+				 mode, mode & DATA_STREAM_MODE,
+				 MODE_STATUS_TIMEOUT_US);
+	if (ret < 0)
+		printf("failed to enter data stream mode\n");
+}
+
+static void dw_mipi_dsi2_set_cmd_mode(struct dw_mipi_dsi2 *dsi2)
+{
+	u32 mode;
+	int ret;
+
+	dsi_write(dsi2, DSI2_MODE_CTRL, COMMAND_MODE);
+	ret = readl_poll_timeout(dsi2->base + DSI2_MODE_STATUS,
+				 mode, mode & COMMAND_MODE,
+				 MODE_STATUS_TIMEOUT_US);
+	if (ret < 0)
+		printf("failed to enter cmd mode\n");
+}
+
+
+static void dw_mipi_dsi2_enable(struct dw_mipi_dsi2 *dsi2)
+{
+	dw_mipi_dsi2_ipi_set(dsi2);
+
+	if (dsi2->mode_flags & MIPI_DSI_MODE_VIDEO)
+		dw_mipi_dsi2_set_vid_mode(dsi2);
+	else
+		dw_mipi_dsi2_set_data_stream_mode(dsi2);
+
+	if (dsi2->slave)
+		dw_mipi_dsi2_enable(dsi2->slave);
+}
+
+static void dw_mipi_dsi2_disable(struct dw_mipi_dsi2 *dsi2)
+{
+	dsi_write(dsi2, DSI2_IPI_PIX_PKT_CFG, 0);
+	dw_mipi_dsi2_set_cmd_mode(dsi2);
+
+	if (dsi2->slave)
+		dw_mipi_dsi2_disable(dsi2->slave);
+}
+
+static void dw_mipi_dsi2_post_disable(struct dw_mipi_dsi2 *dsi2)
+{
+	if (!dsi2->prepared)
+		return;
+
+	dsi_write(dsi2, DSI2_PWR_UP, RESET);
+
+	if (dsi2->dcphy.phy)
+		rockchip_phy_power_off(dsi2->dcphy.phy);
+
+	dsi2->prepared = false;
+
+	if (dsi2->slave)
+		dw_mipi_dsi2_post_disable(dsi2->slave);
+}
+
+static int dw_mipi_dsi2_connector_pre_init(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+
+	conn_state->type = DRM_MODE_CONNECTOR_DSI;
+
+	return 0;
+}
+
+static int dw_mipi_dsi2_connector_init(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct dw_mipi_dsi2 *dsi2 = dev_get_priv(conn_state->dev);
+	struct rockchip_phy *phy = NULL;
+	struct udevice *phy_dev;
+	struct udevice *dev;
+	int ret;
+
+
+	conn_state->disp_info  = rockchip_get_disp_info(conn_state->type, dsi2->id);
+	dsi2->dcphy.phy = conn_state->phy;
+
+	conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
+	conn_state->color_space = V4L2_COLORSPACE_DEFAULT;
+	conn_state->output_if |=
+		dsi2->id ? VOP_OUTPUT_IF_MIPI1 : VOP_OUTPUT_IF_MIPI0;
+
+	if (dsi2->lanes > 4) {
+		ret = uclass_get_device_by_name(UCLASS_DISPLAY,
+						"dsi@fde30000",
+						&dev);
+		if (ret)
+			return ret;
+
+		dsi2->slave = dev_get_priv(dev);
+		if (!dsi2->slave)
+			return -ENODEV;
+
+		dsi2->slave->master = dsi2;
+		dsi2->lanes /= 2;
+		dsi2->slave->lanes = dsi2->lanes;
+		dsi2->slave->format = dsi2->format;
+		dsi2->slave->mode_flags = dsi2->mode_flags;
+		dsi2->slave->channel = dsi2->channel;
+		conn_state->output_flags =
+				ROCKCHIP_OUTPUT_DUAL_CHANNEL_LEFT_RIGHT_MODE;
+		if (dsi2->data_swap)
+			conn_state->output_flags |= ROCKCHIP_OUTPUT_DATA_SWAP;
+
+		conn_state->output_if |= VOP_OUTPUT_IF_MIPI1;
+
+		ret = uclass_get_device_by_phandle(UCLASS_PHY, dev,
+						   "phys", &phy_dev);
+		if (ret)
+			return -ENODEV;
+
+		phy = (struct rockchip_phy *)dev_get_driver_data(phy_dev);
+		if (!phy)
+			return -ENODEV;
+
+		dsi2->slave->dcphy.phy = phy;
+		if (phy->funcs && phy->funcs->init)
+			return phy->funcs->init(phy);
+	}
+
+	return 0;
+}
+
+/*
+ * Minimum D-PHY timings based on MIPI D-PHY specification. Derived
+ * from the valid ranges specified in Section 6.9, Table 14, Page 41
+ * of the D-PHY specification (v2.1).
+ */
+int mipi_dphy_get_default_config(unsigned long long hs_clk_rate,
+				 struct mipi_dphy_configure *cfg)
+{
+	unsigned long long ui;
+
+	if (!cfg)
+		return -EINVAL;
+
+	ui = ALIGN(PSEC_PER_SEC, hs_clk_rate);
+	do_div(ui, hs_clk_rate);
+
+	cfg->clk_miss = 0;
+	cfg->clk_post = 60000 + 52 * ui;
+	cfg->clk_pre = 8000;
+	cfg->clk_prepare = 38000;
+	cfg->clk_settle = 95000;
+	cfg->clk_term_en = 0;
+	cfg->clk_trail = 60000;
+	cfg->clk_zero = 262000;
+	cfg->d_term_en = 0;
+	cfg->eot = 0;
+	cfg->hs_exit = 100000;
+	cfg->hs_prepare = 40000 + 4 * ui;
+	cfg->hs_zero = 105000 + 6 * ui;
+	cfg->hs_settle = 85000 + 6 * ui;
+	cfg->hs_skip = 40000;
+
+	/*
+	 * The MIPI D-PHY specification (Section 6.9, v1.2, Table 14, Page 40)
+	 * contains this formula as:
+	 *
+	 *     T_HS-TRAIL = max(n * 8 * ui, 60 + n * 4 * ui)
+	 *
+	 * where n = 1 for forward-direction HS mode and n = 4 for reverse-
+	 * direction HS mode. There's only one setting and this function does
+	 * not parameterize on anything other that ui, so this code will
+	 * assumes that reverse-direction HS mode is supported and uses n = 4.
+	 */
+	cfg->hs_trail = max(4 * 8 * ui, 60000 + 4 * 4 * ui);
+
+	cfg->init = 100;
+	cfg->lpx = 60000;
+	cfg->ta_get = 5 * cfg->lpx;
+	cfg->ta_go = 4 * cfg->lpx;
+	cfg->ta_sure = 2 * cfg->lpx;
+	cfg->wakeup = 1000;
+
+	return 0;
+}
+
+static void dw_mipi_dsi2_set_hs_clk(struct dw_mipi_dsi2 *dsi2, unsigned long rate)
+{
+	mipi_dphy_get_default_config(rate, &dsi2->mipi_dphy_cfg);
+	rate = rockchip_phy_set_pll(dsi2->dcphy.phy, rate);
+	dsi2->lane_hs_rate = rate / 1000 / 1000;
+}
+
+static void dw_mipi_dsi2_host_softrst(struct dw_mipi_dsi2 *dsi2)
+{
+	dsi_write(dsi2, DSI2_SOFT_RESET, 0X0);
+	udelay(100);
+	dsi_write(dsi2, DSI2_SOFT_RESET, SYS_RSTN | PHY_RSTN | IPI_RSTN);
+}
+
+static void
+dw_mipi_dsi2_work_mode(struct dw_mipi_dsi2 *dsi2, u32 mode)
+{
+	/*
+	 * select controller work in Manual mode
+	 * Manual: MANUAL_MODE_EN
+	 * Automatic: 0
+	 */
+	dsi_write(dsi2, MANUAL_MODE_CFG, mode);
+}
+
+static void dw_mipi_dsi2_phy_mode_cfg(struct dw_mipi_dsi2 *dsi2)
+{
+	u32 val = 0;
+
+	/* PPI width is fixed to 16 bits in DCPHY */
+	val |= PPI_WIDTH(PPI_WIDTH_16_BITS) | PHY_LANES(dsi2->lanes);
+	val |= PHY_TYPE(dsi2->c_option ? CPHY : DPHY);
+	dsi_write(dsi2, DSI2_PHY_MODE_CFG, val);
+}
+
+static void dw_mipi_dsi2_phy_clk_mode_cfg(struct dw_mipi_dsi2 *dsi2)
+{
+	u32 sys_clk = SYS_CLK / MSEC_PER_SEC;
+	u32 esc_clk_div;
+	u32 val = 0;
+
+	if (dsi2->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS)
+		val |= NON_CONTINUOUS_CLK;
+
+	/* The maximum value of the escape clock frequency is 20MHz */
+	esc_clk_div = DIV_ROUND_UP(sys_clk, 20 * 2);
+	val |= PHY_LPTX_CLK_DIV(esc_clk_div);
+
+	dsi_write(dsi2, DSI2_PHY_CLK_CFG, val);
+}
+
+static void dw_mipi_dsi2_phy_ratio_cfg(struct dw_mipi_dsi2 *dsi2)
+{
+	struct drm_display_mode *mode = &dsi2->mode;
+	u32 pixel_clk, ipi_clk, phy_hsclk;
+	u64 tmp;
+
+	/*
+	 * in DPHY mode, the phy_hstx_clk is exactly 1/16 the Lane high-speed
+	 * data rate; In CPHY mode, the phy_hstx_clk is exactly 1/7 the trio
+	 * high speed symbol rate.
+	 */
+	if (dsi2->c_option)
+		phy_hsclk = DIV_ROUND_CLOSEST(dsi2->lane_hs_rate * MSEC_PER_SEC, 7);
+	else
+		phy_hsclk = DIV_ROUND_CLOSEST(dsi2->lane_hs_rate * MSEC_PER_SEC, 16);
+
+	/* IPI_RATIO_MAN_CFG = PHY_HSTX_CLK / IPI_CLK */
+	pixel_clk = mode->clock;
+	ipi_clk = pixel_clk / 4;
+
+	tmp = DIV_ROUND_CLOSEST(phy_hsclk << 16, ipi_clk);
+	dsi_write(dsi2, DSI2_PHY_IPI_RATIO_MAN_CFG, PHY_IPI_RATIO(tmp));
+
+	/*
+	 * SYS_RATIO_MAN_CFG = MIPI_DCPHY_HSCLK_Freq / MIPI_DCPHY_HSCLK_Freq
+	 */
+	tmp = DIV_ROUND_CLOSEST(phy_hsclk << 16, SYS_CLK);
+	dsi_write(dsi2, DSI2_PHY_SYS_RATIO_MAN_CFG, PHY_SYS_RATIO(tmp));
+}
+
+static void dw_mipi_dsi2_lp2hs_or_hs2lp_cfg(struct dw_mipi_dsi2 *dsi2)
+{
+	struct mipi_dphy_configure *cfg = &dsi2->mipi_dphy_cfg;
+	unsigned long long tmp, ui;
+	unsigned long long hstx_clk;
+
+	hstx_clk = DIV_ROUND_CLOSEST(dsi2->lane_hs_rate * USEC_PER_SEC, 16);
+
+	ui = ALIGN(PSEC_PER_SEC, hstx_clk);
+	do_div(ui, hstx_clk);
+
+	/* PHY_LP2HS_TIME = (TLPX + THS-PREPARE + THS-ZERO) / Tphy_hstx_clk */
+	tmp = cfg->lpx + cfg->hs_prepare + cfg->hs_zero;
+	tmp = DIV_ROUND_CLOSEST(tmp << 16, ui);
+	dsi_write(dsi2, DSI2_PHY_LP2HS_MAN_CFG, PHY_LP2HS_TIME(tmp));
+
+	/* PHY_HS2LP_TIME = (THS-TRAIL + THS-EXIT) / Tphy_hstx_clk */
+	tmp = cfg->hs_trail + cfg->hs_exit;
+	tmp = DIV_ROUND_CLOSEST(tmp << 16, ui);
+	dsi_write(dsi2, DSI2_PHY_HS2LP_MAN_CFG, PHY_HS2LP_TIME(tmp));
+}
+
+static void dw_mipi_dsi2_phy_init(struct dw_mipi_dsi2 *dsi2)
+{
+	dw_mipi_dsi2_phy_mode_cfg(dsi2);
+	dw_mipi_dsi2_phy_clk_mode_cfg(dsi2);
+	dw_mipi_dsi2_phy_ratio_cfg(dsi2);
+	dw_mipi_dsi2_lp2hs_or_hs2lp_cfg(dsi2);
+
+	/* phy configuration 8 - 10 */
+}
+
+static void dw_mipi_dsi2_tx_option_set(struct dw_mipi_dsi2 *dsi2)
+{
+	u32 val;
+
+	val = BTA_EN | EOTP_TX_EN;
+
+	if (dsi2->mode_flags & MIPI_DSI_MODE_EOT_PACKET)
+		val &= ~EOTP_TX_EN;
+
+	dsi_write(dsi2, DSI2_DSI_GENERAL_CFG, val);
+	dsi_write(dsi2, DSI2_DSI_VCID_CFG, TX_VCID(dsi2->channel));
+
+	if (dsi2->scrambling_en)
+		dsi_write(dsi2, DSI2_DSI_SCRAMBLING_CFG, SCRAMBLING_EN);
+
+	val = 0;
+	if (dsi2->mode_flags & MIPI_DSI_MODE_VIDEO_HFP)
+		val |= BLK_HFP_HS_EN;
+
+	if (dsi2->mode_flags & MIPI_DSI_MODE_VIDEO_HBP)
+		val |= BLK_HBP_HS_EN;
+
+	if (dsi2->mode_flags & MIPI_DSI_MODE_VIDEO_HSA)
+		val |= BLK_HSA_HS_EN;
+
+	dsi_write(dsi2, DSI2_DSI_VID_TX_CFG, val);
+
+	/* configure the maximum return packet size that periphera can send */
+}
+
+static void dw_mipi_dsi2_irq_enable(struct dw_mipi_dsi2 *dsi2, bool enable)
+{
+	if (enable) {
+		dsi_write(dsi2, DSI2_INT_MASK_PHY, 0x1);
+		dsi_write(dsi2, DSI2_INT_MASK_TO, 0xf);
+		dsi_write(dsi2, DSI2_INT_MASK_ACK, 0x1);
+		dsi_write(dsi2, DSI2_INT_MASK_IPI, 0x1);
+		dsi_write(dsi2, DSI2_INT_MASK_FIFO, 0x1);
+		dsi_write(dsi2, DSI2_INT_MASK_PRI, 0x1);
+		dsi_write(dsi2, DSI2_INT_MASK_CRI, 0x1);
+	} else {
+		dsi_write(dsi2, DSI2_INT_MASK_PHY, 0x0);
+		dsi_write(dsi2, DSI2_INT_MASK_TO, 0x0);
+		dsi_write(dsi2, DSI2_INT_MASK_ACK, 0x0);
+		dsi_write(dsi2, DSI2_INT_MASK_IPI, 0x0);
+		dsi_write(dsi2, DSI2_INT_MASK_FIFO, 0x0);
+		dsi_write(dsi2, DSI2_INT_MASK_PRI, 0x0);
+		dsi_write(dsi2, DSI2_INT_MASK_CRI, 0x0);
+	};
+}
+
+static void mipi_dcphy_power_on(struct dw_mipi_dsi2 *dsi2)
+{
+	if (!dsi2->dcphy.phy)
+		return;
+
+	if (!dsi2->c_option)
+		rockchip_phy_set_mode(dsi2->dcphy.phy, PHY_MODE_MIPI_DPHY);
+
+	rockchip_phy_power_on(dsi2->dcphy.phy);
+}
+
+static void dw_mipi_dsi2_pre_enable(struct dw_mipi_dsi2 *dsi2)
+{
+	if (dsi2->prepared)
+		return;
+
+	dw_mipi_dsi2_host_softrst(dsi2);
+	dsi_write(dsi2, DSI2_PWR_UP, RESET);
+
+	dw_mipi_dsi2_work_mode(dsi2, MANUAL_MODE_EN);
+	dw_mipi_dsi2_phy_init(dsi2);
+	dw_mipi_dsi2_tx_option_set(dsi2);
+	dw_mipi_dsi2_irq_enable(dsi2, 0);
+	mipi_dcphy_power_on(dsi2);
+	dsi_write(dsi2, DSI2_PWR_UP, POWER_UP);
+	dw_mipi_dsi2_set_cmd_mode(dsi2);
+
+	dsi2->prepared = true;
+
+	if (dsi2->slave)
+		dw_mipi_dsi2_pre_enable(dsi2->slave);
+}
+
+static int dw_mipi_dsi2_connector_prepare(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct dw_mipi_dsi2 *dsi2 = dev_get_priv(conn_state->dev);
+	unsigned long lane_rate;
+
+	memcpy(&dsi2->mode, &conn_state->mode, sizeof(struct drm_display_mode));
+	if (dsi2->slave)
+		memcpy(&dsi2->slave->mode, &dsi2->mode,
+		       sizeof(struct drm_display_mode));
+
+	lane_rate = dw_mipi_dsi2_get_lane_rate(dsi2);
+	if (dsi2->dcphy.phy)
+		dw_mipi_dsi2_set_hs_clk(dsi2, lane_rate);
+
+	if (dsi2->slave && dsi2->slave->dcphy.phy)
+		dw_mipi_dsi2_set_hs_clk(dsi2->slave, lane_rate);
+
+	printf("final DSI-Link bandwidth: %u %s x %d\n",
+	       dsi2->lane_hs_rate, dsi2->c_option ? "Msps" : "Mbps",
+	       dsi2->slave ? dsi2->lanes * 2 : dsi2->lanes);
+
+	dw_mipi_dsi2_pre_enable(dsi2);
+
+	return 0;
+}
+
+static void dw_mipi_dsi2_connector_unprepare(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct dw_mipi_dsi2 *dsi2 = dev_get_priv(conn_state->dev);
+
+	dw_mipi_dsi2_post_disable(dsi2);
+}
+
+static int dw_mipi_dsi2_connector_enable(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct dw_mipi_dsi2 *dsi2 = dev_get_priv(conn_state->dev);
+
+	dw_mipi_dsi2_enable(dsi2);
+
+	return 0;
+}
+
+static int dw_mipi_dsi2_connector_disable(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct dw_mipi_dsi2 *dsi2 = dev_get_priv(conn_state->dev);
+
+	dw_mipi_dsi2_disable(dsi2);
+
+	return 0;
+}
+
+static const struct rockchip_connector_funcs dw_mipi_dsi2_connector_funcs = {
+	.pre_init = dw_mipi_dsi2_connector_pre_init,
+	.init = dw_mipi_dsi2_connector_init,
+	.prepare = dw_mipi_dsi2_connector_prepare,
+	.unprepare = dw_mipi_dsi2_connector_unprepare,
+	.enable = dw_mipi_dsi2_connector_enable,
+	.disable = dw_mipi_dsi2_connector_disable,
+};
+
+static int dw_mipi_dsi2_probe(struct udevice *dev)
+{
+	struct dw_mipi_dsi2 *dsi2 = dev_get_priv(dev);
+	const struct rockchip_connector *connector =
+		(const struct rockchip_connector *)dev_get_driver_data(dev);
+	const struct dw_mipi_dsi2_plat_data *pdata = connector->data;
+	int id;
+
+	dsi2->base = dev_read_addr_ptr(dev);
+	dsi2->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	if (IS_ERR(dsi2->grf))
+		return PTR_ERR(dsi2->grf);
+
+	id = of_alias_get_id(ofnode_to_np(dev->node), "dsi");
+	if (id < 0)
+		id = 0;
+
+	dsi2->dev = dev;
+	dsi2->pdata = pdata;
+	dsi2->id = id;
+	dsi2->data_swap = dev_read_bool(dsi2->dev, "rockchip,data-swap");
+
+	return 0;
+}
+
+static const u32 rk3588_dsi0_grf_reg_fields[MAX_FIELDS] = {
+	[TXREQCLKHS_EN]		= GRF_REG_FIELD(0x0000, 11, 11),
+	[GATING_EN]		= GRF_REG_FIELD(0x0000, 10, 10),
+	[IPI_SHUTDN]		= GRF_REG_FIELD(0x0000,  9,  9),
+	[IPI_COLORM]		= GRF_REG_FIELD(0x0000,  8,  8),
+	[IPI_COLOR_DEPTH]	= GRF_REG_FIELD(0x0000,  4,  7),
+	[IPI_FORMAT]		= GRF_REG_FIELD(0x0000,  0,  3),
+};
+
+static const u32 rk3588_dsi1_grf_reg_fields[MAX_FIELDS] = {
+	[TXREQCLKHS_EN]		= GRF_REG_FIELD(0x0004, 11, 11),
+	[GATING_EN]		= GRF_REG_FIELD(0x0004, 10, 10),
+	[IPI_SHUTDN]		= GRF_REG_FIELD(0x0004,  9,  9),
+	[IPI_COLORM]		= GRF_REG_FIELD(0x0004,  8,  8),
+	[IPI_COLOR_DEPTH]	= GRF_REG_FIELD(0x0004,  4,  7),
+	[IPI_FORMAT]		= GRF_REG_FIELD(0x0004,  0,  3),
+};
+
+static const struct dw_mipi_dsi2_plat_data rk3588_mipi_dsi2_plat_data = {
+	.dsi0_grf_reg_fields = rk3588_dsi0_grf_reg_fields,
+	.dsi1_grf_reg_fields = rk3588_dsi1_grf_reg_fields,
+	.dphy_max_bit_rate_per_lane = 4500000000ULL,
+	.cphy_max_symbol_rate_per_lane = 2000000000ULL,
+};
+static const struct rockchip_connector rk3588_mipi_dsi2_driver_data = {
+	 .funcs = &dw_mipi_dsi2_connector_funcs,
+	 .data = &rk3588_mipi_dsi2_plat_data,
+};
+
+static const struct udevice_id dw_mipi_dsi2_ids[] = {
+	{
+		.compatible = "rockchip,rk3588-mipi-dsi2",
+		.data = (ulong)&rk3588_mipi_dsi2_driver_data,
+	},
+	{}
+};
+
+static ssize_t dw_mipi_dsi2_host_transfer(struct mipi_dsi_host *host,
+					 const struct mipi_dsi_msg *msg)
+{
+	struct dw_mipi_dsi2 *dsi2 = dev_get_priv(host->dev);
+
+	return dw_mipi_dsi2_transfer(dsi2, msg);
+}
+
+static int dw_mipi_dsi2_get_dsc_params_from_sink(struct dw_mipi_dsi2 *dsi2)
+{
+	struct udevice *dev = NULL;
+	int ret;
+
+	ret = device_find_first_child(dsi2->dev, &dev);
+	if (ret)
+		return ret;
+
+	dsi2->c_option = dev_read_bool(dev, "phy-c-option");
+	dsi2->scrambling_en = dev_read_bool(dev, "scrambling-enable");
+	dsi2->dsc_enable = dev_read_bool(dev, "compressed-data");
+
+	if (dsi2->slave) {
+		dsi2->slave->c_option = dsi2->c_option;
+		dsi2->slave->scrambling_en = dsi2->scrambling_en;
+		dsi2->slave->dsc_enable = dsi2->dsc_enable;
+	}
+
+	dsi2->slice_width = dev_read_u32_default(dev, "slice_width", 0);
+	dsi2->slice_height = dev_read_u32_default(dev, "slice_height", 0);
+	dsi2->version_major = dev_read_u32_default(dev, "version_major", 0);
+	dsi2->version_minor = dev_read_u32_default(dev, "version_minor", 0);
+
+	return 0;
+}
+
+static int dw_mipi_dsi2_host_attach(struct mipi_dsi_host *host,
+				   struct mipi_dsi_device *device)
+{
+	struct dw_mipi_dsi2 *dsi2 = dev_get_priv(host->dev);
+
+	if (device->lanes < 1 || device->lanes > 8)
+		return -EINVAL;
+
+	dsi2->lanes = device->lanes;
+	dsi2->channel = device->channel;
+	dsi2->format = device->format;
+	dsi2->mode_flags = device->mode_flags;
+
+	dw_mipi_dsi2_get_dsc_params_from_sink(dsi2);
+
+	return 0;
+}
+
+static const struct mipi_dsi_host_ops dw_mipi_dsi2_host_ops = {
+	.attach = dw_mipi_dsi2_host_attach,
+	.transfer = dw_mipi_dsi2_host_transfer,
+};
+
+static int dw_mipi_dsi2_bind(struct udevice *dev)
+{
+	struct mipi_dsi_host *host = dev_get_platdata(dev);
+
+	host->dev = dev;
+	host->ops = &dw_mipi_dsi2_host_ops;
+
+	return dm_scan_fdt_dev(dev);
+}
+
+static int dw_mipi_dsi2_child_post_bind(struct udevice *dev)
+{
+	struct mipi_dsi_host *host = dev_get_platdata(dev->parent);
+	struct mipi_dsi_device *device = dev_get_parent_platdata(dev);
+	char name[20];
+
+	sprintf(name, "%s.%d", host->dev->name, device->channel);
+	device_set_name(dev, name);
+
+	device->dev = dev;
+	device->host = host;
+	device->lanes = dev_read_u32_default(dev, "dsi,lanes", 4);
+	device->format = dev_read_u32_default(dev, "dsi,format",
+					      MIPI_DSI_FMT_RGB888);
+	device->mode_flags = dev_read_u32_default(dev, "dsi,flags",
+						  MIPI_DSI_MODE_VIDEO |
+						  MIPI_DSI_MODE_VIDEO_BURST |
+						  MIPI_DSI_MODE_VIDEO_HBP |
+						  MIPI_DSI_MODE_LPM |
+						  MIPI_DSI_MODE_EOT_PACKET);
+	device->channel = dev_read_u32_default(dev, "reg", 0);
+
+	return 0;
+}
+
+static int dw_mipi_dsi2_child_pre_probe(struct udevice *dev)
+{
+	struct mipi_dsi_device *device = dev_get_parent_platdata(dev);
+	int ret;
+
+	ret = mipi_dsi_attach(device);
+	if (ret) {
+		dev_err(dev, "mipi_dsi_attach() failed: %d\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+U_BOOT_DRIVER(dw_mipi_dsi2) = {
+	.name = "dw_mipi_dsi2",
+	.id = UCLASS_DISPLAY,
+	.of_match = dw_mipi_dsi2_ids,
+	.probe = dw_mipi_dsi2_probe,
+	.bind = dw_mipi_dsi2_bind,
+	.priv_auto_alloc_size = sizeof(struct dw_mipi_dsi2),
+	.per_child_platdata_auto_alloc_size = sizeof(struct mipi_dsi_device),
+	.platdata_auto_alloc_size = sizeof(struct mipi_dsi_host),
+	.child_post_bind = dw_mipi_dsi2_child_post_bind,
+	.child_pre_probe = dw_mipi_dsi2_child_pre_probe,
+};

commit 5a7ad828056a52df2c7e539d5c2fca9e9d45b8b1
Author: Guochun Huang <hero.huang@rock-chips.com>
Date:   Wed Nov 10 03:03:15 2021 +0000

    video/drm: rockchip_phy: simplify PHY mode type
    
    Change-Id: I7da80c97b7f8e1bc82d00558adcc2aff44537fd5
    Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>

diff --git a/drivers/video/drm/dw_mipi_dsi.c b/drivers/video/drm/dw_mipi_dsi.c
index 3d257311e6..ca2671d79a 100644
--- a/drivers/video/drm/dw_mipi_dsi.c
+++ b/drivers/video/drm/dw_mipi_dsi.c
@@ -469,7 +469,7 @@ static int mipi_dphy_power_on(struct dw_mipi_dsi *dsi)
 	mdelay(2);
 
 	if (dsi->dphy.phy) {
-		rockchip_phy_set_mode(dsi->dphy.phy, PHY_MODE_VIDEO_MIPI);
+		rockchip_phy_set_mode(dsi->dphy.phy, PHY_MODE_MIPI_DPHY);
 		rockchip_phy_power_on(dsi->dphy.phy);
 	}
 
diff --git a/drivers/video/drm/inno_video_combo_phy.c b/drivers/video/drm/inno_video_combo_phy.c
index ce2232ca05..a7e5ab2842 100644
--- a/drivers/video/drm/inno_video_combo_phy.c
+++ b/drivers/video/drm/inno_video_combo_phy.c
@@ -698,17 +698,14 @@ static int inno_video_phy_power_on(struct rockchip_phy *phy)
 			POWER_WORK_MASK, POWER_WORK_ENABLE);
 
 	switch (inno->mode) {
-	case PHY_MODE_VIDEO_MIPI:
+	case PHY_MODE_MIPI_DPHY:
 		inno_video_phy_mipi_mode_enable(inno);
 		break;
-	case PHY_MODE_VIDEO_LVDS:
+	case PHY_MODE_LVDS:
 		inno_video_phy_lvds_mode_enable(inno);
 		break;
-	case PHY_MODE_VIDEO_TTL:
-		inno_video_phy_ttl_mode_enable(inno);
-		break;
 	default:
-		return -EINVAL;
+		inno_video_phy_ttl_mode_enable(inno);
 	}
 
 	return 0;
@@ -834,13 +831,10 @@ static int inno_video_phy_set_mode(struct rockchip_phy *phy,
 	struct inno_video_phy *inno = dev_get_priv(phy->dev);
 
 	switch (mode) {
-	case PHY_MODE_VIDEO_MIPI:
-	case PHY_MODE_VIDEO_LVDS:
-	case PHY_MODE_VIDEO_TTL:
+	case PHY_MODE_MIPI_DPHY:
+	case PHY_MODE_LVDS:
 		inno->mode = mode;
 		break;
-	default:
-		return -EINVAL;
 	}
 
 	return 0;
diff --git a/drivers/video/drm/inno_video_phy.c b/drivers/video/drm/inno_video_phy.c
index d2f63da65e..08e8bb8d0c 100644
--- a/drivers/video/drm/inno_video_phy.c
+++ b/drivers/video/drm/inno_video_phy.c
@@ -124,7 +124,7 @@ static int inno_video_phy_power_on(struct rockchip_phy *phy)
 	int ret;
 
 	switch (inno->mode) {
-	case PHY_MODE_VIDEO_LVDS:
+	case PHY_MODE_LVDS:
 		if (inno->dual_channel) {
 			wseq = lvds_mode_dual_channel;
 			nregs = ARRAY_SIZE(lvds_mode_dual_channel);
@@ -133,12 +133,9 @@ static int inno_video_phy_power_on(struct rockchip_phy *phy)
 			nregs = ARRAY_SIZE(lvds_mode_single_channel);
 		}
 		break;
-	case PHY_MODE_VIDEO_TTL:
+	default:
 		wseq = ttl_mode;
 		nregs = ARRAY_SIZE(ttl_mode);
-		break;
-	default:
-		return -EINVAL;
 	}
 
 	phy_multi_write(inno, wseq, nregs);
@@ -171,14 +168,7 @@ static int inno_video_phy_set_mode(struct rockchip_phy *phy,
 {
 	struct inno_video_phy *inno = dev_get_priv(phy->dev);
 
-	switch (mode) {
-	case PHY_MODE_VIDEO_LVDS:
-	case PHY_MODE_VIDEO_TTL:
-		inno->mode = mode;
-		break;
-	default:
-		return -EINVAL;
-	}
+	inno->mode = mode;
 
 	return 0;
 }
diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index 7d24403386..2ca13884ed 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -172,7 +172,7 @@ static int rockchip_lvds_connector_enable(struct display_state *state)
 	if (lvds->funcs->enable)
 		lvds->funcs->enable(lvds, pipe);
 
-	ret = rockchip_phy_set_mode(lvds->phy, PHY_MODE_VIDEO_LVDS);
+	ret = rockchip_phy_set_mode(lvds->phy, PHY_MODE_LVDS);
 	if (ret) {
 		dev_err(lvds->dev, "failed to set phy mode: %d\n", ret);
 		return ret;
diff --git a/drivers/video/drm/rockchip_phy.h b/drivers/video/drm/rockchip_phy.h
index de4983dd6c..b042103e9b 100644
--- a/drivers/video/drm/rockchip_phy.h
+++ b/drivers/video/drm/rockchip_phy.h
@@ -8,10 +8,8 @@
 #define _ROCKCHIP_PHY_H_
 
 enum phy_mode {
-	PHY_MODE_INVALID,
-	PHY_MODE_VIDEO_MIPI,
-	PHY_MODE_VIDEO_LVDS,
-	PHY_MODE_VIDEO_TTL,
+	PHY_MODE_MIPI_DPHY,
+	PHY_MODE_LVDS,
 };
 
 struct rockchip_phy;
diff --git a/drivers/video/drm/rockchip_rgb.c b/drivers/video/drm/rockchip_rgb.c
index 0778c8e632..b2e5aaa7b1 100644
--- a/drivers/video/drm/rockchip_rgb.c
+++ b/drivers/video/drm/rockchip_rgb.c
@@ -74,22 +74,15 @@ static int rockchip_rgb_connector_prepare(struct display_state *state)
 	struct rockchip_rgb *rgb = state_to_rgb(state);
 	struct crtc_state *crtc_state = &state->crtc_state;
 	int pipe = crtc_state->crtc_id;
-	int ret;
 
 	pinctrl_select_state(rgb->dev, "default");
 
 	if (rgb->funcs && rgb->funcs->prepare)
 		rgb->funcs->prepare(rgb, pipe);
 
-	if (rgb->phy) {
-		ret = rockchip_phy_set_mode(rgb->phy, PHY_MODE_VIDEO_TTL);
-		if (ret) {
-			dev_err(rgb->dev, "failed to set phy mode: %d\n", ret);
-			return ret;
-		}
-
+	if (rgb->phy)
 		rockchip_phy_power_on(rgb->phy);
-	}
+
 
 	return 0;
 }

commit 6357085bdd836bfddac9f08654ce6ca9964e869d
Author: Damon Ding <damon.ding@rock-chips.com>
Date:   Tue Nov 23 21:31:35 2021 +0800

    configs: rk3588_defconfig: select the configs of display-subsystem
    
    Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
    Change-Id: I8964cfabd438a221498b11c63f844d2e9f8da78e

diff --git a/configs/rk3588_defconfig b/configs/rk3588_defconfig
index 78a9f80dae..a9b24e3575 100644
--- a/configs/rk3588_defconfig
+++ b/configs/rk3588_defconfig
@@ -147,6 +147,7 @@ CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
 CONFIG_REGULATOR_RK860X=y
 CONFIG_REGULATOR_RK806=y
+CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
@@ -178,6 +179,12 @@ CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
 CONFIG_USB_GADGET_VENDOR_NUM=0x2207
 CONFIG_USB_GADGET_PRODUCT_NUM=0x350a
 CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI2=y
+CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
+CONFIG_DRM_ROCKCHIP_SAMSUNG_MIPI_DCPHY=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_LIB_RAND=y
 CONFIG_SPL_TINY_MEMSET=y

commit 60e469f53ec0165a19b4aa068ce15d0d3ff923b1
Author: Damon Ding <damon.ding@rock-chips.com>
Date:   Wed Dec 8 19:41:41 2021 +0800

    drm/rockchip: vop2: add support for pd switch
    
    Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
    Change-Id: I6516ea8314400e244f83d09785a52bfc37de531f

diff --git a/drivers/video/drm/rockchip_vop2.c b/drivers/video/drm/rockchip_vop2.c
index 54b67448fd..5d8098d414 100644
--- a/drivers/video/drm/rockchip_vop2.c
+++ b/drivers/video/drm/rockchip_vop2.c
@@ -24,6 +24,7 @@
 #include <dm/read.h>
 #include <fixp-arith.h>
 #include <syscon.h>
+#include <linux/iopoll.h>
 
 #include "rockchip_display.h"
 #include "rockchip_crtc.h"
@@ -126,6 +127,18 @@
 #define RK3568_VP2_INT_EN			0xC0
 #define RK3568_VP2_INT_CLR			0xC4
 #define RK3568_VP2_INT_STATUS			0xC8
+#define RK3588_CLUSTER0_PD_EN_SHIFT		0
+#define RK3588_CLUSTER1_PD_EN_SHIFT		1
+#define RK3588_CLUSTER2_PD_EN_SHIFT		2
+#define RK3588_CLUSTER3_PD_EN_SHIFT		3
+#define RK3588_ESMART_PD_EN_SHIFT		7
+
+#define RK3568_SYS_STATUS0			0x60
+#define RK3588_CLUSTER0_PD_STATUS_SHIFT		8
+#define RK3588_CLUSTER1_PD_STATUS_SHIFT		9
+#define RK3588_CLUSTER2_PD_STATUS_SHIFT		10
+#define RK3588_CLUSTER3_PD_STATUS_SHIFT		11
+#define RK3588_ESMART_PD_STATUS_SHIFT		15
 
 /* Overlay registers definition    */
 #define RK3568_OVL_CTRL				0x600
@@ -581,6 +594,20 @@
 #define RK3588_GRF_EDP1_ENABLE_SHIFT		3
 #define RK3588_GRF_HDMITX1_ENABLE_SHIFT		4
 
+#define RK3588_PMU_BISR_CON3			0x20C
+#define RK3588_PD_CLUSTER0_REPAIR_EN_SHIFT	9
+#define RK3588_PD_CLUSTER1_REPAIR_EN_SHIFT	10
+#define RK3588_PD_CLUSTER2_REPAIR_EN_SHIFT	11
+#define RK3588_PD_CLUSTER3_REPAIR_EN_SHIFT	12
+#define RK3588_PD_ESMART_REPAIR_EN_SHIFT	15
+
+#define RK3588_PMU_BISR_STATUS5			0x294
+#define RK3588_PD_CLUSTER0_PWR_STAT_SHIFI	9
+#define RK3588_PD_CLUSTER1_PWR_STAT_SHIFI	10
+#define RK3588_PD_CLUSTER2_PWR_STAT_SHIFI	11
+#define RK3588_PD_CLUSTER3_PWR_STAT_SHIFI	12
+#define RK3588_PD_ESMART_PWR_STAT_SHIFI		15
+
 #define VOP2_LAYER_MAX				8
 
 #define VOP_FEATURE_OUTPUT_10BIT		BIT(0)
@@ -678,6 +705,15 @@ struct vop2_layer {
 	u8 win_phys_id;
 };
 
+struct vop2_power_domain_data {
+	bool is_parent_needed;
+	u8 pd_en_shift;
+	u8 pd_status_shift;
+	u8 pmu_status_shift;
+	u8 bisr_en_status_shift;
+	u8 parent_phy_id;
+};
+
 struct vop2_win_data {
 	char *name;
 	u8 phys_id;
@@ -685,6 +721,7 @@ struct vop2_win_data {
 	u8 win_sel_port_offset;
 	u8 layer_sel_win_id;
 	u32 reg_offset;
+	struct vop2_power_domain_data *pd_data;
 };
 
 struct vop2_vp_data {
@@ -727,6 +764,7 @@ struct vop2 {
 	void *grf;
 	void *vop_grf;
 	void *vo1_grf;
+	void *sys_pmu;
 	u32 reg_len;
 	u32 version;
 	bool global_init;
@@ -892,6 +930,12 @@ static inline void vop2_grf_writel(struct vop2 *vop, void *grf_base, u32 offset,
 	writel(val, grf_base + offset);
 }
 
+static inline u32 vop2_grf_readl(struct vop2 *vop, void *grf_base, u32 offset,
+				  u32 mask, u32 shift)
+{
+	return (readl(grf_base + offset) >> shift) & mask;
+}
+
 static inline int us_to_vertical_line(struct drm_display_mode *mode, int us)
 {
 	return us * mode->clock / mode->htotal / 1000;
@@ -1326,18 +1370,60 @@ static void vop2_post_config(struct display_state *state, struct vop2 *vop2)
 	vop2_writel(vop2, RK3568_VP0_PRE_SCAN_HTIMING + vp_offset, pre_scan_dly);
 }
 
+static int vop2_wait_power_domain_on(struct vop2 *vop2, struct vop2_power_domain_data *pd_data)
+{
+	int val = 0;
+	int shift = 0;
+	bool is_bisr_en = false;
+
+	is_bisr_en = vop2_grf_readl(vop2, vop2->sys_pmu, RK3588_PMU_BISR_CON3, EN_MASK,
+				    pd_data->bisr_en_status_shift);
+	if (is_bisr_en) {
+		shift = pd_data->pmu_status_shift;
+		return readl_poll_timeout(vop2->sys_pmu + RK3588_PMU_BISR_STATUS5, val,
+					  !((val >> shift) & 0x1), 50 * 1000);
+	} else {
+		shift = pd_data->pd_status_shift;
+		return readl_poll_timeout(vop2->regs + RK3568_SYS_STATUS0, val,
+					  !((val >> shift) & 0x1), 50 * 1000);
+	}
+}
+
+static int vop2_power_domain_on(struct vop2 *vop2, int plane_id)
+{
+	struct vop2_win_data *win_data;
+	struct vop2_power_domain_data *pd_data;
+	int ret = 0;
+
+	win_data = vop2_find_win_by_phys_id(vop2, plane_id);
+	if (!win_data) {
+		printf("can't find win_data by phys_id\n");
+		return -EINVAL;
+	}
+	pd_data = win_data->pd_data;
+	if (pd_data->is_parent_needed) {
+		ret = vop2_power_domain_on(vop2, pd_data->parent_phy_id);
+		if (ret) {
+			printf("can't open parent power domain\n");
+			return -EINVAL;
+		}
+	}
+
+	vop2_mask_write(vop2, RK3568_SYS_PD_CTRL, EN_MASK, pd_data->pd_en_shift, 0, false);
+	ret = vop2_wait_power_domain_on(vop2, pd_data);
+	if (ret) {
+		printf("wait vop2 power domain timeout\n");
+		return ret;
+	}
+
+	return 0;
+}
+
 static void rk3588_vop2_regsbak(struct vop2 *vop2)
 {
 	u32 *base = vop2->regs;
 	int i = 0;
 
-	/*
-	 * Open the global pd
-	 */
-	writel(0xffff0000, 0xfd8d8150);
-	udelay(500);
-	vop2_writel(vop2, RK3568_SYS_PD_CTRL, 0x0);
-
 	/*
 	 * No need to backup HDR/DSC/GAMMA_LUT/BPP_LUT/MMU
 	 */
@@ -1358,20 +1444,17 @@ static void vop2_global_initial(struct vop2 *vop2, struct display_state *state)
 	if (vop2->global_init)
 		return;
 
+	/*
+	 * Open the global pd(temp)
+	 */
+	writel(0xffff0000, 0xfd8d8150);
+	udelay(50);
+
 	/* OTP must enable at the first time, otherwise mirror layer register is error */
 	if (soc_is_rk3566())
 		vop2_mask_write(vop2, RK3568_SYS_OTP_WIN_EN, EN_MASK,
 				OTP_WIN_EN_SHIFT, 1, false);
 
-	if (vop2->version == VOP_VERSION_RK3588)
-		rk3588_vop2_regsbak(vop2);
-	else
-		memcpy(vop2->regsbak, vop2->regs, vop2->reg_len);
-	vop2_mask_write(vop2, RK3568_OVL_CTRL, EN_MASK,
-			OVL_PORT_MUX_REG_DONE_IMD_SHIFT, 1, false);
-	vop2_mask_write(vop2, RK3568_DSP_IF_POL, EN_MASK,
-			IF_CTRL_REG_DONE_IMD_SHIFT, 1, false);
-
 	if (cstate->crtc->assign_plane) {/* dts assign plane */
 		u32 plane_mask;
 		int primary_plane_id;
@@ -1450,6 +1533,25 @@ static void vop2_global_initial(struct vop2 *vop2, struct display_state *state)
 		}
 	}
 
+	if (vop2->version == VOP_VERSION_RK3588) {
+		for (i = 0; i < vop2->data->nr_vps; i++) {
+			if (cstate->crtc->vps[i].enable) {
+				if (vop2_power_domain_on(vop2, vop2->vp_plane_mask[i].primary_plane_id))
+					printf("open vp[%d] plane pd fail\n", i);
+			}
+		}
+	}
+
+	if (vop2->version == VOP_VERSION_RK3588)
+		rk3588_vop2_regsbak(vop2);
+	else
+		memcpy(vop2->regsbak, vop2->regs, vop2->reg_len);
+
+	vop2_mask_write(vop2, RK3568_OVL_CTRL, EN_MASK,
+			OVL_PORT_MUX_REG_DONE_IMD_SHIFT, 1, false);
+	vop2_mask_write(vop2, RK3568_DSP_IF_POL, EN_MASK,
+			IF_CTRL_REG_DONE_IMD_SHIFT, 1, false);
+
 	for (i = 0; i < vop2->data->nr_vps; i++) {
 		printf("vp%d have layer nr:%d[", i, vop2->vp_plane_mask[i].attached_layers_nr);
 		for (j = 0; j < vop2->vp_plane_mask[i].attached_layers_nr; j++)
@@ -1554,6 +1656,9 @@ static int rockchip_vop2_preinit(struct display_state *state)
 			rockchip_vop2->vo1_grf = syscon_get_first_range(ROCKCHIP_SYSCON_VO_GRF);
 			if (rockchip_vop2->vo1_grf <= 0)
 				printf("%s: Get syscon vo1_grf failed (ret=%p)\n", __func__, rockchip_vop2->vo1_grf);
+			rockchip_vop2->sys_pmu = syscon_get_first_range(ROCKCHIP_SYSCON_PMU);
+			if (rockchip_vop2->vo1_grf <= 0)
+				printf("%s: Get syscon sys_pmu failed (ret=%p)\n", __func__, rockchip_vop2->sys_pmu);
 		}
 	}
 
@@ -2802,6 +2907,47 @@ static struct vop2_vp_plane_mask rk3588_vp_plane_mask[VOP2_VP_MAX][VOP2_VP_MAX]
 
 };
 
+static struct vop2_power_domain_data rk3588_cluster0_pd_data = {
+	.pd_en_shift = RK3588_CLUSTER0_PD_EN_SHIFT,
+	.pd_status_shift = RK3588_CLUSTER0_PD_STATUS_SHIFT,
+	.pmu_status_shift = RK3588_PD_CLUSTER0_PWR_STAT_SHIFI,
+	.bisr_en_status_shift = RK3588_PD_CLUSTER0_REPAIR_EN_SHIFT,
+};
+
+static struct vop2_power_domain_data rk3588_cluster1_pd_data = {
+	.is_parent_needed = true,
+	.pd_en_shift = RK3588_CLUSTER1_PD_EN_SHIFT,
+	.pd_status_shift = RK3588_CLUSTER1_PD_STATUS_SHIFT,
+	.pmu_status_shift = RK3588_PD_CLUSTER1_PWR_STAT_SHIFI,
+	.bisr_en_status_shift = RK3588_PD_CLUSTER1_REPAIR_EN_SHIFT,
+	.parent_phy_id = ROCKCHIP_VOP2_CLUSTER0,
+};
+
+static struct vop2_power_domain_data rk3588_cluster2_pd_data = {
+	.is_parent_needed = true,
+	.pd_en_shift = RK3588_CLUSTER2_PD_EN_SHIFT,
+	.pd_status_shift = RK3588_CLUSTER2_PD_STATUS_SHIFT,
+	.pmu_status_shift = RK3588_PD_CLUSTER2_PWR_STAT_SHIFI,
+	.bisr_en_status_shift = RK3588_PD_CLUSTER2_REPAIR_EN_SHIFT,
+	.parent_phy_id = ROCKCHIP_VOP2_CLUSTER0,
+};
+
+static struct vop2_power_domain_data rk3588_cluster3_pd_data = {
+	.is_parent_needed = true,
+	.pd_en_shift = RK3588_CLUSTER3_PD_EN_SHIFT,
+	.pd_status_shift = RK3588_CLUSTER3_PD_STATUS_SHIFT,
+	.pmu_status_shift = RK3588_PD_CLUSTER3_PWR_STAT_SHIFI,
+	.bisr_en_status_shift = RK3588_PD_CLUSTER3_REPAIR_EN_SHIFT,
+	.parent_phy_id = ROCKCHIP_VOP2_CLUSTER0,
+};
+
+static struct vop2_power_domain_data rk3588_esmart_pd_data = {
+	.pd_en_shift = RK3588_ESMART_PD_EN_SHIFT,
+	.pd_status_shift = RK3588_ESMART_PD_STATUS_SHIFT,
+	.pmu_status_shift = RK3588_PD_ESMART_PWR_STAT_SHIFI,
+	.bisr_en_status_shift = RK3588_PD_ESMART_REPAIR_EN_SHIFT,
+};
+
 static struct vop2_win_data rk3588_win_data[8] = {
 	{
 		.name = "Cluster0",
@@ -2810,6 +2956,7 @@ static struct vop2_win_data rk3588_win_data[8] = {
 		.win_sel_port_offset = 0,
 		.layer_sel_win_id = 0,
 		.reg_offset = 0,
+		.pd_data = &rk3588_cluster0_pd_data,
 	},
 
 	{
@@ -2819,6 +2966,7 @@ static struct vop2_win_data rk3588_win_data[8] = {
 		.win_sel_port_offset = 1,
 		.layer_sel_win_id = 1,
 		.reg_offset = 0x200,
+		.pd_data = &rk3588_cluster1_pd_data,
 	},
 
 	{
@@ -2828,6 +2976,7 @@ static struct vop2_win_data rk3588_win_data[8] = {
 		.win_sel_port_offset = 2,
 		.layer_sel_win_id = 4,
 		.reg_offset = 0x400,
+		.pd_data = &rk3588_cluster2_pd_data,
 	},
 
 	{
@@ -2837,6 +2986,7 @@ static struct vop2_win_data rk3588_win_data[8] = {
 		.win_sel_port_offset = 3,
 		.layer_sel_win_id = 5,
 		.reg_offset = 0x600,
+		.pd_data = &rk3588_cluster3_pd_data,
 	},
 
 	{
@@ -2846,6 +2996,7 @@ static struct vop2_win_data rk3588_win_data[8] = {
 		.win_sel_port_offset = 4,
 		.layer_sel_win_id = 2,
 		.reg_offset = 0,
+		.pd_data = &rk3588_esmart_pd_data,
 	},
 
 	{
@@ -2855,6 +3006,7 @@ static struct vop2_win_data rk3588_win_data[8] = {
 		.win_sel_port_offset = 5,
 		.layer_sel_win_id = 3,
 		.reg_offset = 0x200,
+		.pd_data = &rk3588_esmart_pd_data,
 	},
 
 	{
@@ -2864,6 +3016,7 @@ static struct vop2_win_data rk3588_win_data[8] = {
 		.win_sel_port_offset = 6,
 		.layer_sel_win_id = 6,
 		.reg_offset = 0x400,
+		.pd_data = &rk3588_esmart_pd_data,
 	},
 
 	{
@@ -2873,6 +3026,7 @@ static struct vop2_win_data rk3588_win_data[8] = {
 		.win_sel_port_offset = 7,
 		.layer_sel_win_id = 7,
 		.reg_offset = 0x600,
+		.pd_data = &rk3588_esmart_pd_data,
 	},
 };
 

commit 78f88dd586f44038851fe1cc107999d96615b2d4
Author: Damon Ding <damon.ding@rock-chips.com>
Date:   Fri Dec 10 21:31:32 2021 +0800

    rockchip: rk3588: add the pmu syscon
    
    Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
    Change-Id: Iaf3441e6c3e66e335f0a612c43e4d34b244dd5ef

diff --git a/arch/arm/mach-rockchip/rk3588/syscon_rk3588.c b/arch/arm/mach-rockchip/rk3588/syscon_rk3588.c
index 442ab86053..4cf5e39cc3 100644
--- a/arch/arm/mach-rockchip/rk3588/syscon_rk3588.c
+++ b/arch/arm/mach-rockchip/rk3588/syscon_rk3588.c
@@ -18,6 +18,7 @@ static const struct udevice_id rk3588_syscon_ids[] = {
 	{ .compatible = "rockchip,pipe-phy-grf",   .data = ROCKCHIP_SYSCON_PIPE_PHY0_GRF },
 	{ .compatible = "rockchip,pipe-phy-grf",   .data = ROCKCHIP_SYSCON_PIPE_PHY1_GRF },
 	{ .compatible = "rockchip,pipe-phy-grf",   .data = ROCKCHIP_SYSCON_PIPE_PHY2_GRF },
+	{ .compatible = "rockchip,rk3588-pmu",     .data = ROCKCHIP_SYSCON_PMU },
 	{ }
 };
 

commit 90269a178baac8baa70b344fb8491918e7aaa466
Author: Damon Ding <damon.ding@rock-chips.com>
Date:   Thu Dec 2 20:12:29 2021 +0800

    clk: rockchip: modify the func rk3588_dclk_vop_set_clk()
    
    Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
    Change-Id: I578fb85027b2a88fb45662bf1c3b035b059488df

diff --git a/drivers/clk/rockchip/clk_rk3588.c b/drivers/clk/rockchip/clk_rk3588.c
index 0484a5d12c..06a7e64820 100644
--- a/drivers/clk/rockchip/clk_rk3588.c
+++ b/drivers/clk/rockchip/clk_rk3588.c
@@ -1095,6 +1095,9 @@ static ulong rk3588_dclk_vop_set_clk(struct rk3588_clk_priv *priv,
 			case DCLK_VOP_SRC_SEL_AUPLL:
 				pll_rate = priv->aupll_hz;
 				break;
+			case DCLK_VOP_SRC_SEL_V0PLL:
+				pll_rate = 0;
+				break;
 			default:
 				printf("do not support this vop pll sel\n");
 				return -EINVAL;

commit ecc31b6ea0e9424e35c5aa9ab741ba1a8a9a2ec3
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Sat Oct 16 17:36:31 2021 +0800

    drm/rockchip: vop2: Add support for rk3588
    
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
    Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
    Change-Id: Ia0d0430124123fb0710bbba6adacbdfb55d7a149

diff --git a/drivers/video/drm/rockchip_crtc.c b/drivers/video/drm/rockchip_crtc.c
index bd4935664b..ed20ca6fd3 100644
--- a/drivers/video/drm/rockchip_crtc.c
+++ b/drivers/video/drm/rockchip_crtc.c
@@ -97,6 +97,11 @@ static const struct rockchip_crtc rk3568_vop_data = {
 	.data = &rk3568_vop,
 };
 
+static const struct rockchip_crtc rk3588_vop_data = {
+	.funcs = &rockchip_vop2_funcs,
+	.data = &rk3588_vop,
+};
+
 static const struct udevice_id rockchip_vop_ids[] = {
 	{
 		.compatible = "rockchip,rk3036-vop",
@@ -149,6 +154,9 @@ static const struct udevice_id rockchip_vop_ids[] = {
 	}, {
 		.compatible = "rockchip,rk3568-vop",
 		.data = (ulong)&rk3568_vop_data,
+	}, {
+		.compatible = "rockchip,rk3588-vop",
+		.data = (ulong)&rk3588_vop_data,
 	}, { }
 };
 
diff --git a/drivers/video/drm/rockchip_crtc.h b/drivers/video/drm/rockchip_crtc.h
index 6feb5baf5f..0645bd1eb8 100644
--- a/drivers/video/drm/rockchip_crtc.h
+++ b/drivers/video/drm/rockchip_crtc.h
@@ -60,4 +60,5 @@ extern const struct vop_data rk3328_vop;
 extern const struct vop_data rv1108_vop;
 extern const struct vop_data rv1126_vop;
 extern const struct vop2_data rk3568_vop;
+extern const struct vop2_data rk3588_vop;
 #endif
diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index 50318a4bdd..685e42d51b 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -12,10 +12,23 @@
 #include <edid.h>
 #include <dm/ofnode.h>
 
+/*
+ * major: IP major vertion, used for IP structure
+ * minor: big feature change under same structure
+ */
+#define VOP_VERSION(major, minor)	((major) << 8 | (minor))
+#define VOP_MAJOR(version)		((version) >> 8)
+#define VOP_MINOR(version)		((version) & 0xff)
+
+#define VOP_VERSION_RK3568		VOP_VERSION(0x40, 0x15)
+#define VOP_VERSION_RK3588		VOP_VERSION(0x40, 0x17)
+
 #define ROCKCHIP_OUTPUT_DUAL_CHANNEL_LEFT_RIGHT_MODE	BIT(0)
 #define ROCKCHIP_OUTPUT_DUAL_CHANNEL_ODD_EVEN_MODE	BIT(1)
 #define ROCKCHIP_OUTPUT_DATA_SWAP			BIT(2)
 
+#define ROCKCHIP_DSC_PPS_SIZE_BYTE			88
+
 enum data_format {
 	ROCKCHIP_FMT_ARGB8888 = 0,
 	ROCKCHIP_FMT_RGB888,
@@ -84,6 +97,27 @@ struct vop_rect {
 	int height;
 };
 
+struct rockchip_dsc_sink_cap {
+	/**
+	 * @slice_width: the number of pixel columns that comprise the slice width
+	 * @slice_height: the number of pixel rows that comprise the slice height
+	 * @block_pred: Does block prediction
+	 * @native_420: Does sink support DSC with 4:2:0 compression
+	 * @bpc_supported: compressed bpc supported by sink : 10, 12 or 16 bpc
+	 * @version_major: DSC major version
+	 * @version_minor: DSC minor version
+	 * @target_bits_per_pixel_x16: bits num after compress and multiply 16
+	 */
+	u16 slice_width;
+	u16 slice_height;
+	bool block_pred;
+	bool native_420;
+	u8 bpc_supported;
+	u8 version_major;
+	u8 version_minor;
+	u16 target_bits_per_pixel_x16;
+};
+
 struct crtc_state {
 	struct udevice *dev;
 	struct rockchip_crtc *crtc;
@@ -143,10 +177,19 @@ struct connector_state {
 	int output_if;
 	int output_flags;
 	int color_space;
+	int dsc_enable;
 	unsigned int bpc;
 
 	struct base2_disp_info *disp_info; /* disp_info from baseparameter 2.0 */
 
+	u8 dsc_id;
+	u8 dsc_slice_num;
+	u8 dsc_pixel_num;
+	u64 dsc_txp_clk;
+	u64 dsc_pxl_clk;
+	u64 dsc_cds_clk;
+	struct rockchip_dsc_sink_cap dsc_sink_cap;
+
 	struct {
 		u32 *lut;
 		int size;
diff --git a/drivers/video/drm/rockchip_vop.h b/drivers/video/drm/rockchip_vop.h
index 1ff22a1df0..abf9bffde3 100644
--- a/drivers/video/drm/rockchip_vop.h
+++ b/drivers/video/drm/rockchip_vop.h
@@ -9,13 +9,6 @@
 #include "rockchip_display.h"
 #include <asm/gpio.h>
 
-/*
- * major: IP major vertion, used for IP structure
- * minor: big feature change under same structure
- */
-#define VOP_VERSION(major, minor)	((major) << 8 | (minor))
-#define VOP_MAJOR(version) 	((version) >> 8)
-#define VOP_MINOR(version) 	((version) & 0xff)
 
 #define VOP_REG_SUPPORT(vop, reg) \
 		(reg.mask && \
diff --git a/drivers/video/drm/rockchip_vop2.c b/drivers/video/drm/rockchip_vop2.c
index 58bddfc03f..54b67448fd 100644
--- a/drivers/video/drm/rockchip_vop2.c
+++ b/drivers/video/drm/rockchip_vop2.c
@@ -14,6 +14,7 @@
 #include <asm/unaligned.h>
 #include <asm/io.h>
 #include <linux/list.h>
+#include <linux/log2.h>
 #include <linux/media-bus-format.h>
 #include <clk.h>
 #include <asm/arch/clock.h>
@@ -42,10 +43,19 @@
 
 #define RK3568_DSP_IF_EN			0x028
 #define RGB_EN_SHIFT				0
+#define RK3588_DP0_EN_SHIFT			0
+#define RK3588_DP1_EN_SHIFT			1
+#define RK3588_RGB_EN_SHIFT			8
 #define HDMI0_EN_SHIFT				1
 #define EDP0_EN_SHIFT				3
+#define RK3588_EDP0_EN_SHIFT			2
+#define RK3588_HDMI0_EN_SHIFT			3
 #define MIPI0_EN_SHIFT				4
+#define RK3588_EDP1_EN_SHIFT			4
+#define RK3588_HDMI1_EN_SHIFT			5
+#define RK3588_MIPI0_EN_SHIFT                   6
 #define MIPI1_EN_SHIFT				20
+#define RK3588_MIPI1_EN_SHIFT                   7
 #define LVDS0_EN_SHIFT				5
 #define LVDS1_EN_SHIFT				24
 #define BT1120_EN_SHIFT				6
@@ -53,8 +63,13 @@
 #define IF_MUX_MASK				3
 #define RGB_MUX_SHIFT				8
 #define HDMI0_MUX_SHIFT				10
+#define RK3588_DP0_MUX_SHIFT			12
+#define RK3588_DP1_MUX_SHIFT			14
 #define EDP0_MUX_SHIFT				14
+#define RK3588_HDMI_EDP0_MUX_SHIFT		16
+#define RK3588_HDMI_EDP1_MUX_SHIFT		18
 #define MIPI0_MUX_SHIFT				16
+#define RK3588_MIPI0_MUX_SHIFT			20
 #define MIPI1_MUX_SHIFT				21
 #define LVDS0_MUX_SHIFT				18
 #define LVDS1_MUX_SHIFT				25
@@ -71,13 +86,28 @@
 #define IF_CRTL_HDMI_DCLK_POL_SHIT		7
 #define IF_CRTL_HDMI_PIN_POL_MASK		0x7
 #define IF_CRTL_HDMI_PIN_POL_SHIT		4
+
+#define RK3588_DP0_PIN_POL_SHIFT		8
+#define RK3588_DP1_PIN_POL_SHIFT		12
+#define RK3588_IF_PIN_POL_MASK			0x7
+
 #define IF_CRTL_RGB_LVDS_DCLK_POL_SHIT		3
+
+#define HDMI_EDP0_DCLK_DIV_SHIFT		16
+#define HDMI_EDP0_PIXCLK_DIV_SHIFT		18
+#define HDMI_EDP1_DCLK_DIV_SHIFT		20
+#define HDMI_EDP1_PIXCLK_DIV_SHIFT		22
+#define MIPI0_PIXCLK_DIV_SHIFT			24
+#define MIPI1_PIXCLK_DIV_SHIFT			26
+
 #define RK3568_SYS_OTP_WIN_EN			0x50
 #define OTP_WIN_EN_SHIFT			0
 #define RK3568_SYS_LUT_PORT_SEL			0x58
 #define GAMMA_PORT_SEL_MASK			0x3
 #define GAMMA_PORT_SEL_SHIFT			0
+#define RK3568_MIPI_DUAL_EN_SHIFT		10
 
+#define RK3568_SYS_PD_CTRL			0x034
 #define RK3568_VP0_LINE_FLAG			0x70
 #define RK3568_VP1_LINE_FLAG			0x74
 #define RK3568_VP2_LINE_FLAG			0x78
@@ -158,6 +188,10 @@
 #define VP0_3D_LUT_EN_SHIFT				0
 #define VP0_3D_LUT_UPDATE_SHIFT			2
 
+#define RK3588_VP0_CLK_CTRL			0xC0C
+#define DCLK_CORE_DIV_SHIFT			0
+#define DCLK_OUT_DIV_SHIFT			2
+
 #define RK3568_VP0_3D_LUT_MST			0xC20
 
 #define RK3568_VP0_DSP_BG			0xC2C
@@ -242,7 +276,14 @@
 
 /* Cluster0 register definition */
 #define RK3568_CLUSTER0_WIN0_CTRL0		0x1000
+#define CLUSTER_YUV2RGB_EN_SHIFT		8
+#define CLUSTER_RGB2YUV_EN_SHIFT		9
+#define CLUSTER_CSC_MODE_SHIFT			10
+#define CLUSTER_YRGB_XSCL_MODE_SHIFT		12
+#define CLUSTER_YRGB_YSCL_MODE_SHIFT		14
 #define RK3568_CLUSTER0_WIN0_CTRL1		0x1004
+#define CLUSTER_YRGB_GT2_SHIFT			28
+#define CLUSTER_YRGB_GT4_SHIFT			29
 #define RK3568_CLUSTER0_WIN0_YRGB_MST		0x1010
 #define RK3568_CLUSTER0_WIN0_CBR_MST		0x1014
 #define RK3568_CLUSTER0_WIN0_VIR		0x1018
@@ -276,6 +317,7 @@
 #define RK3568_CLUSTER0_WIN1_AFBCD_CTRL		0x10EC
 
 #define RK3568_CLUSTER0_CTRL			0x1100
+#define CLUSTER_EN_SHIFT			0
 
 #define RK3568_CLUSTER1_WIN0_CTRL0		0x1200
 #define RK3568_CLUSTER1_WIN0_CTRL1		0x1204
@@ -533,6 +575,12 @@
 #define GRF_BT1120_CLK_INV_SHIFT		2
 #define GRF_RGB_DCLK_INV_SHIFT			3
 
+#define RK3588_GRF_VOP_CON2			0x0008
+#define RK3588_GRF_EDP0_ENABLE_SHIFT		0
+#define RK3588_GRF_HDMITX0_ENABLE_SHIFT		1
+#define RK3588_GRF_EDP1_ENABLE_SHIFT		3
+#define RK3588_GRF_HDMITX1_ENABLE_SHIFT		4
+
 #define VOP2_LAYER_MAX				8
 
 #define VOP_FEATURE_OUTPUT_10BIT		BIT(0)
@@ -633,6 +681,7 @@ struct vop2_layer {
 struct vop2_win_data {
 	char *name;
 	u8 phys_id;
+	enum vop2_layer_type type;
 	u8 win_sel_port_offset;
 	u8 layer_sel_win_id;
 	u32 reg_offset;
@@ -642,6 +691,7 @@ struct vop2_vp_data {
 	u32 feature;
 	u8 pre_scan_max_dly;
 	struct vop_rect max_output;
+	u32 max_dclk;
 };
 
 struct vop2_plane_table {
@@ -667,12 +717,16 @@ struct vop2_data {
 	u8 nr_layers;
 	u8 nr_mixers;
 	u8 nr_gammas;
+	u8 nr_dscs;
+	u32 reg_len;
 };
 
 struct vop2 {
 	u32 *regsbak;
 	void *regs;
 	void *grf;
+	void *vop_grf;
+	void *vo1_grf;
 	u32 reg_len;
 	u32 version;
 	bool global_init;
@@ -749,7 +803,14 @@ static inline enum scale_mode scl_get_scl_mode(int src, int dst)
 	return SCALE_NONE;
 }
 
-static u8 vop2_vp_primary_plane_order[VOP2_VP_MAX] = {
+static u8 rk3588_vop2_vp_primary_plane_order[VOP2_VP_MAX] = {
+	ROCKCHIP_VOP2_ESMART0,
+	ROCKCHIP_VOP2_ESMART1,
+	ROCKCHIP_VOP2_ESMART2,
+	ROCKCHIP_VOP2_ESMART3,
+};
+
+static u8 rk3568_vop2_vp_primary_plane_order[VOP2_VP_MAX] = {
 	ROCKCHIP_VOP2_SMART0,
 	ROCKCHIP_VOP2_SMART1,
 	ROCKCHIP_VOP2_ESMART1,
@@ -763,13 +824,23 @@ static inline int interpolate(int x1, int y1, int x2, int y2, int x)
 static int vop2_get_primary_plane(struct vop2 *vop2, u32 plane_mask)
 {
 	int i = 0;
+	u8 *vop2_vp_primary_plane_order;
+	u8 default_primary_plane;
+
+	if (vop2->version == VOP_VERSION_RK3588) {
+		vop2_vp_primary_plane_order = rk3588_vop2_vp_primary_plane_order;
+		default_primary_plane = ROCKCHIP_VOP2_ESMART0;
+	} else {
+		vop2_vp_primary_plane_order = rk3568_vop2_vp_primary_plane_order;
+		default_primary_plane = ROCKCHIP_VOP2_SMART0;
+	}
 
 	for (i = 0; i < vop2->data->nr_vps; i++) {
 		if (plane_mask & BIT(vop2_vp_primary_plane_order[i]))
 			return vop2_vp_primary_plane_order[i];
 	}
 
-	return ROCKCHIP_VOP2_SMART0;
+	return default_primary_plane;
 }
 
 static inline u16 scl_cal_scale(int src, int dst, int shift)
@@ -812,13 +883,13 @@ static inline void vop2_mask_write(struct vop2 *vop2, u32 offset,
 	writel(v, vop2->regs + offset);
 }
 
-static inline void vop2_grf_writel(struct vop2 *vop, u32 offset,
+static inline void vop2_grf_writel(struct vop2 *vop, void *grf_base, u32 offset,
 				   u32 mask, u32 shift, u32 v)
 {
 	u32 val = 0;
 
 	val = (v << shift) | (mask << (shift + 16));
-	writel(val, vop->grf + offset);
+	writel(val, grf_base + offset);
 }
 
 static inline int us_to_vertical_line(struct drm_display_mode *mode, int us)
@@ -972,6 +1043,18 @@ static inline bool is_hot_plug_devices(int output_type)
 	}
 }
 
+static struct vop2_win_data *vop2_find_win_by_phys_id(struct vop2 *vop2, int phys_id)
+{
+	int i = 0;
+
+	for (i = 0; i < vop2->data->nr_layers; i++) {
+		if (vop2->data->win_data[i].phys_id == phys_id)
+			return &vop2->data->win_data[i];
+	}
+
+	return NULL;
+}
+
 static int rockchip_vop2_gamma_lut_init(struct vop2 *vop2,
 					struct display_state *state)
 {
@@ -1235,12 +1318,33 @@ static void vop2_post_config(struct display_state *state, struct vop2 *vop2)
 	bg_dly =  vop2->data->vp_data[cstate->crtc_id].pre_scan_max_dly;
 	bg_dly -= bg_ovl_dly;
 	pre_scan_dly = bg_dly + (hdisplay >> 1) - 1;
+	if (vop2->version == VOP_VERSION_RK3588 && hsync_len < 8)
+		hsync_len = 8;
 	pre_scan_dly = (pre_scan_dly << 16) | hsync_len;
 	vop2_mask_write(vop2, RK3568_VP0_BG_MIX_CTRL + cstate->crtc_id * 4,
 			BG_MIX_CTRL_MASK, BG_MIX_CTRL_SHIFT, bg_dly, false);
 	vop2_writel(vop2, RK3568_VP0_PRE_SCAN_HTIMING + vp_offset, pre_scan_dly);
 }
 
+static void rk3588_vop2_regsbak(struct vop2 *vop2)
+{
+	u32 *base = vop2->regs;
+	int i = 0;
+
+	/*
+	 * Open the global pd
+	 */
+	writel(0xffff0000, 0xfd8d8150);
+	udelay(500);
+	vop2_writel(vop2, RK3568_SYS_PD_CTRL, 0x0);
+
+	/*
+	 * No need to backup HDR/DSC/GAMMA_LUT/BPP_LUT/MMU
+	 */
+	for (i = 0; i < (vop2->reg_len >> 2); i++)
+		vop2->regsbak[i] = base[i];
+}
+
 static void vop2_global_initial(struct vop2 *vop2, struct display_state *state)
 {
 	struct crtc_state *cstate = &state->crtc_state;
@@ -1259,7 +1363,10 @@ static void vop2_global_initial(struct vop2 *vop2, struct display_state *state)
 		vop2_mask_write(vop2, RK3568_SYS_OTP_WIN_EN, EN_MASK,
 				OTP_WIN_EN_SHIFT, 1, false);
 
-	memcpy(vop2->regsbak, vop2->regs, vop2->reg_len);
+	if (vop2->version == VOP_VERSION_RK3588)
+		rk3588_vop2_regsbak(vop2);
+	else
+		memcpy(vop2->regsbak, vop2->regs, vop2->reg_len);
 	vop2_mask_write(vop2, RK3568_OVL_CTRL, EN_MASK,
 			OVL_PORT_MUX_REG_DONE_IMD_SHIFT, 1, false);
 	vop2_mask_write(vop2, RK3568_DSP_IF_POL, EN_MASK,
@@ -1356,7 +1463,7 @@ static void vop2_global_initial(struct vop2 *vop2, struct display_state *state)
 		layer_nr = vop2->vp_plane_mask[i].attached_layers_nr;
 		for (j = 0; j < layer_nr; j++) {
 			layer_phy_id = vop2->vp_plane_mask[i].attached_layers[j];
-			win_data = &vop2->data->win_data[layer_phy_id];
+			win_data = vop2_find_win_by_phys_id(vop2, layer_phy_id);
 			vop2_mask_write(vop2, RK3568_OVL_LAYER_SEL, LAYER_SEL_MASK,
 					shift, win_data->layer_sel_win_id, false);
 			shift += 4;
@@ -1367,10 +1474,10 @@ static void vop2_global_initial(struct vop2 *vop2, struct display_state *state)
 	for (i = 0; i < vop2->data->nr_vps; i++) {
 		layer_nr = vop2->vp_plane_mask[i].attached_layers_nr;
 		for (j = 0; j < layer_nr; j++) {
-			if (!cstate->crtc->vps[i].enable)
+			if (!vop2->vp_plane_mask[i].attached_layers[j])
 				continue;
 			layer_phy_id = vop2->vp_plane_mask[i].attached_layers[j];
-			win_data = &vop2->data->win_data[layer_phy_id];
+			win_data = vop2_find_win_by_phys_id(vop2, layer_phy_id);
 			shift = win_data->win_sel_port_offset * 2;
 			vop2_mask_write(vop2, RK3568_OVL_PORT_SEL, LAYER_SEL_PORT_MASK,
 					LAYER_SEL_PORT_SHIFT + shift, i, false);
@@ -1382,7 +1489,7 @@ static void vop2_global_initial(struct vop2 *vop2, struct display_state *state)
 	 */
 	for (i = 0; i < vop2->data->nr_vps; i++) {
 		shift = i * 4;
-		if (cstate->crtc->vps[i].enable) {
+		if (vop2->vp_plane_mask[i].attached_layers_nr) {
 			total_used_layer += vop2->vp_plane_mask[i].attached_layers_nr;
 			port_mux = total_used_layer - 1;
 		} else {
@@ -1397,7 +1504,8 @@ static void vop2_global_initial(struct vop2 *vop2, struct display_state *state)
 				PORT_MUX_SHIFT + shift, port_mux, false);
 	}
 
-	vop2_writel(vop2, RK3568_AUTO_GATING_CTRL, 0);
+	if (vop2->version == VOP_VERSION_RK3568)
+		vop2_writel(vop2, RK3568_AUTO_GATING_CTRL, 0);
 
 	vop2->global_init = true;
 }
@@ -1405,25 +1513,12 @@ static void vop2_global_initial(struct vop2 *vop2, struct display_state *state)
 static int vop2_initial(struct vop2 *vop2, struct display_state *state)
 {
 	struct crtc_state *cstate = &state->crtc_state;
-	struct connector_state *conn_state = &state->conn_state;
-	struct drm_display_mode *mode = &conn_state->mode;
-	char dclk_name[9];
-	struct clk dclk;
 	int ret;
 
 	/* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
 	ret = clk_set_defaults(cstate->dev);
 	if (ret)
 		debug("%s clk_set_defaults failed %d\n", __func__, ret);
-	snprintf(dclk_name, sizeof(dclk_name), "dclk_vp%d", cstate->crtc_id);
-	ret = clk_get_by_name(cstate->dev, dclk_name, &dclk);
-	if (!ret)
-		ret = clk_set_rate(&dclk, mode->clock * 1000);
-	if (IS_ERR_VALUE(ret)) {
-		printf("%s: Failed to set vp%d dclk[%d khz]: ret=%d\n",
-		       __func__, cstate->crtc_id, mode->clock, ret);
-		return ret;
-	}
 
 	rockchip_vop2_gamma_lut_init(vop2, state);
 	rockchip_vop2_cubic_lut_init(vop2, state);
@@ -1450,9 +1545,16 @@ static int rockchip_vop2_preinit(struct display_state *state)
 		rockchip_vop2->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 		if (rockchip_vop2->grf <= 0)
 			printf("%s: Get syscon grf failed (ret=%p)\n", __func__, rockchip_vop2->grf);
-
 		rockchip_vop2->version = vop2_data->version;
 		rockchip_vop2->data = vop2_data;
+		if (rockchip_vop2->version == VOP_VERSION_RK3588) {
+			rockchip_vop2->vop_grf = syscon_get_first_range(ROCKCHIP_SYSCON_VOP_GRF);
+			if (rockchip_vop2->vop_grf <= 0)
+				printf("%s: Get syscon vop_grf failed (ret=%p)\n", __func__, rockchip_vop2->vop_grf);
+			rockchip_vop2->vo1_grf = syscon_get_first_range(ROCKCHIP_SYSCON_VO_GRF);
+			if (rockchip_vop2->vo1_grf <= 0)
+				printf("%s: Get syscon vo1_grf failed (ret=%p)\n", __func__, rockchip_vop2->vo1_grf);
+		}
 	}
 
 	cstate->private = rockchip_vop2;
@@ -1464,38 +1566,319 @@ static int rockchip_vop2_preinit(struct display_state *state)
 	return 0;
 }
 
-static int rockchip_vop2_init(struct display_state *state)
+/*
+ * calc the dclk on rk3588
+ * the available div of dclk is 1, 2, 4
+ *
+ */
+static unsigned long vop2_calc_dclk(unsigned long child_clk, unsigned long max_dclk)
+{
+	if (child_clk * 4 <= max_dclk)
+		return child_clk * 4;
+	else if (child_clk * 2 <= max_dclk)
+		return child_clk * 2;
+	else if (child_clk <= max_dclk)
+		return child_clk;
+	else
+		return 0;
+}
+
+/*
+ * 4 pixclk/cycle on rk3588
+ * RGB/eDP/HDMI: if_pixclk >= dclk_core
+ * DP: dp_pixclk = dclk_out <= dclk_core
+ * DSI: mipi_pixclk <= dclk_out <= dclk_core
+ */
+static unsigned long vop2_calc_cru_cfg(struct display_state *state,
+				       int *dclk_core_div, int *dclk_out_div,
+				       int *if_pixclk_div, int *if_dclk_div)
 {
 	struct crtc_state *cstate = &state->crtc_state;
 	struct connector_state *conn_state = &state->conn_state;
 	struct drm_display_mode *mode = &conn_state->mode;
 	struct vop2 *vop2 = cstate->private;
-	u16 hsync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
-	u16 hdisplay = mode->crtc_hdisplay;
-	u16 htotal = mode->crtc_htotal;
-	u16 hact_st = mode->crtc_htotal - mode->crtc_hsync_start;
-	u16 hact_end = hact_st + hdisplay;
-	u16 vdisplay = mode->crtc_vdisplay;
-	u16 vtotal = mode->crtc_vtotal;
-	u16 vsync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
-	u16 vact_st = mode->crtc_vtotal - mode->crtc_vsync_start;
-	u16 vact_end = vact_st + vdisplay;
-	bool yuv_overlay = false;
+	unsigned long v_pixclk = mode->clock;
+	unsigned long dclk_core_rate = v_pixclk >> 2;
+	unsigned long dclk_rate = v_pixclk;
+	unsigned long dclk_out_rate;
+	u64 if_dclk_rate;
+	u64 if_pixclk_rate;
+	int output_type = conn_state->type;
+	int output_mode = conn_state->output_mode;
+	int K = 1;
+
+	if (output_type == DRM_MODE_CONNECTOR_HDMIA) {
+		/*
+		 * K = 2: dclk_core = if_pixclk_rate > if_dclk_rate
+		 * K = 1: dclk_core = hdmie_edp_dclk > if_pixclk_rate
+		 */
+		if (output_mode == ROCKCHIP_OUT_MODE_YUV420)
+			K = 2;
+		if (conn_state->dsc_enable) {
+			if_pixclk_rate = conn_state->dsc_cds_clk << 1;
+			if_dclk_rate = conn_state->dsc_cds_clk;
+		} else {
+			if_pixclk_rate = (dclk_core_rate << 1) / K;
+			if_dclk_rate = dclk_core_rate / K;
+		}
+
+		dclk_rate = vop2_calc_dclk(if_pixclk_rate, vop2->data->vp_data->max_dclk);
+		if (!dclk_rate) {
+			printf("DP if_pixclk_rate out of range(max_dclk: %d KHZ, dclk_core: %lld KHZ)\n",
+			       vop2->data->vp_data->max_dclk, if_pixclk_rate);
+			return -EINVAL;
+		}
+		*if_pixclk_div = dclk_rate / if_pixclk_rate;
+		*if_dclk_div = dclk_rate / if_dclk_rate;
+
+	} else if (output_type == DRM_MODE_CONNECTOR_eDP) {
+		/* edp_pixclk = edp_dclk > dclk_core */
+		if_pixclk_rate = v_pixclk / K;
+		if_dclk_rate = v_pixclk / K;
+		dclk_rate = if_pixclk_rate * K;
+		*dclk_core_div = dclk_rate / dclk_core_rate;
+		*if_pixclk_div = dclk_rate / if_pixclk_rate;
+		*if_dclk_div = *if_pixclk_div;
+	} else if (output_type == DRM_MODE_CONNECTOR_DisplayPort) {
+		if (output_mode == ROCKCHIP_OUT_MODE_YUV420)
+			dclk_out_rate = v_pixclk >> 3;
+		else
+			dclk_out_rate = v_pixclk >> 2;
+
+		dclk_rate = vop2_calc_dclk(dclk_core_rate, vop2->data->vp_data->max_dclk);
+		if (!dclk_rate) {
+			printf("DP dclk_core out of range(max_dclk: %d KHZ, dclk_core: %ld KHZ)\n",
+			       vop2->data->vp_data->max_dclk, dclk_core_rate);
+			return -EINVAL;
+		}
+		*dclk_out_div = dclk_rate / dclk_out_rate;
+		*dclk_core_div = dclk_rate / dclk_core_rate;
+
+	} else if (output_type == DRM_MODE_CONNECTOR_DSI) {
+		if (conn_state->output_flags & ROCKCHIP_OUTPUT_DUAL_CHANNEL_LEFT_RIGHT_MODE)
+			K = 2;
+		if (conn_state->dsc_enable)
+			if_pixclk_rate = conn_state->dsc_cds_clk >> 1;
+		else
+			if_pixclk_rate = dclk_core_rate / K;
+		/* dclk_core = dclk_out * K = if_pixclk * K = v_pixclk / 4 */
+		dclk_out_rate = if_pixclk_rate;
+		/* dclk_rate = N * dclk_core_rate N = (1,2,4 ), we get a little factor here */
+		dclk_rate = dclk_core_rate;
+		*dclk_out_div = dclk_rate / dclk_out_rate;
+		*dclk_core_div = dclk_rate / dclk_core_rate;
+		*if_pixclk_div = 1;       /*mipi pixclk == dclk_out*/
+
+	} else if (output_type == DRM_MODE_CONNECTOR_DPI) {
+		dclk_rate = v_pixclk;
+		*dclk_core_div = dclk_rate / dclk_core_rate;
+	}
+
+	*if_pixclk_div = ilog2(*if_pixclk_div);
+	*if_dclk_div = ilog2(*if_dclk_div);
+	*dclk_core_div = ilog2(*dclk_core_div);
+	*dclk_out_div = ilog2(*dclk_out_div);
+
+	return dclk_rate;
+}
+
+static int vop2_calc_dsc_clk(struct connector_state *conn_state)
+{
+	struct drm_display_mode *mode = &conn_state->mode;
+	u64 v_pixclk = mode->clock * 1000LL; /* video timing pixclk */
+	u8 k = 1;
+
+	if (conn_state->output_flags & ROCKCHIP_OUTPUT_DUAL_CHANNEL_LEFT_RIGHT_MODE)
+		k = 2;
+
+	conn_state->dsc_pxl_clk = v_pixclk;
+	do_div(conn_state->dsc_pxl_clk, (conn_state->dsc_slice_num * k));
+
+	conn_state->dsc_txp_clk = v_pixclk;
+	do_div(conn_state->dsc_txp_clk, (conn_state->dsc_pixel_num * k));
+
+	/* dsc_cds = crtc_clock / (cds_dat_width / bits_per_pixel)
+	 * cds_dat_width = 96;
+	 * bits_per_pixel = [8-12];
+	 * As only support 1/2/4 div, so we set dsc_cds = crtc_clock / 8;
+	 */
+	conn_state->dsc_cds_clk = mode->crtc_clock / 8 * 1000;
+
+	return 0;
+}
+
+static unsigned long rk3588_vop2_if_cfg(struct display_state *state)
+{
+	struct crtc_state *cstate = &state->crtc_state;
+	struct connector_state *conn_state = &state->conn_state;
+	struct drm_display_mode *mode = &conn_state->mode;
+	struct rockchip_dsc_sink_cap *dsc_sink_cap = &conn_state->dsc_sink_cap;
+	struct vop2 *vop2 = cstate->private;
 	u32 vp_offset = (cstate->crtc_id * 0x100);
+	u16 hdisplay = mode->crtc_hdisplay;
+	int output_if = conn_state->output_if;
+	int dclk_core_div = 0;
+	int dclk_out_div = 0;
+	int if_pixclk_div = 0;
+	int if_dclk_div = 0;
+	unsigned long dclk_rate;
 	u32 val;
-	bool dclk_inv;
-	u8 dither_down_en = 0;
-	u8 pre_dither_down_en = 0;
-	char output_type_name[30] = {0};
 
-	printf("VOP update mode to: %dx%d%s%d, type:%s for VP%d\n",
-	       mode->hdisplay, mode->vdisplay,
-	       mode->flags & DRM_MODE_FLAG_INTERLACE ? "i" : "p",
-	       mode->vscan,
-	       get_output_if_name(conn_state->output_if, output_type_name),
-	       cstate->crtc_id);
+	val = (mode->flags & DRM_MODE_FLAG_NHSYNC) ? 0 : BIT(HSYNC_POSITIVE);
+	val |= (mode->flags & DRM_MODE_FLAG_NVSYNC) ? 0 : BIT(VSYNC_POSITIVE);
+
+	if (conn_state->dsc_enable) {
+		if (!vop2->data->nr_dscs) {
+			printf("No DSC\n");
+			return 0;
+		}
+		conn_state->dsc_id = output_if & (VOP_OUTPUT_IF_MIPI0 | VOP_OUTPUT_IF_HDMI0) ? 0 : 1;
+		conn_state->dsc_slice_num = hdisplay / dsc_sink_cap->slice_width;
+		conn_state->dsc_pixel_num = conn_state->dsc_slice_num >= 4 ?
+					    4 : conn_state->dsc_slice_num >= 2 ? 2 : 1;
+		vop2_calc_dsc_clk(conn_state);
+	}
+
+	dclk_rate = vop2_calc_cru_cfg(state, &dclk_core_div, &dclk_out_div, &if_pixclk_div, &if_dclk_div);
+
+	if (output_if & VOP_OUTPUT_IF_RGB) {
+		vop2_mask_write(vop2, RK3568_DSP_IF_EN, 0x7, RK3588_RGB_EN_SHIFT,
+				4, false);
+	}
+
+	if (output_if & VOP_OUTPUT_IF_BT1120) {
+		vop2_mask_write(vop2, RK3568_DSP_IF_EN, 0x7, RK3588_RGB_EN_SHIFT,
+				3, false);
+	}
+
+	if (output_if & VOP_OUTPUT_IF_BT656) {
+		vop2_mask_write(vop2, RK3568_DSP_IF_EN, 0x7, RK3588_RGB_EN_SHIFT,
+				2, false);
+	}
+
+	if (output_if & VOP_OUTPUT_IF_MIPI0) {
+		if (cstate->crtc_id == 2)
+			val = 0;
+		else
+			val = 1;
+		vop2_mask_write(vop2, RK3568_DSP_IF_EN, EN_MASK, RK3588_MIPI0_EN_SHIFT,
+				1, false);
+		vop2_mask_write(vop2, RK3568_DSP_IF_EN, 1, RK3588_MIPI0_MUX_SHIFT, val, false);
+		vop2_mask_write(vop2, RK3568_DSP_IF_CTRL, 3, MIPI0_PIXCLK_DIV_SHIFT,
+				if_pixclk_div, false);
+	}
+
+	if (output_if & VOP_OUTPUT_IF_MIPI1) {
+		if (cstate->crtc_id == 2)
+			val = 0;
+		else if (cstate->crtc_id == 3)
+			val = 1;
+		else
+			val = 3; /*VP1*/
+		vop2_mask_write(vop2, RK3568_DSP_IF_EN, EN_MASK, RK3588_MIPI1_EN_SHIFT,
+				1, false);
+		vop2_mask_write(vop2, RK3568_DSP_IF_EN, IF_MUX_MASK, MIPI1_MUX_SHIFT,
+				val, false);
+		vop2_mask_write(vop2, RK3568_DSP_IF_CTRL, 3, MIPI1_PIXCLK_DIV_SHIFT,
+				if_pixclk_div, false);
+	}
+
+	if (conn_state->output_flags & ROCKCHIP_OUTPUT_DUAL_CHANNEL_LEFT_RIGHT_MODE) {
+		vop2_mask_write(vop2, RK3568_DSP_IF_CTRL, EN_MASK,
+				RK3568_MIPI_DUAL_EN_SHIFT, 1, false);
+		if (conn_state->output_flags & ROCKCHIP_OUTPUT_DATA_SWAP)
+			vop2_mask_write(vop2, RK3568_VP0_MIPI_CTRL + vp_offset,
+					EN_MASK, MIPI_DUAL_SWAP_EN_SHIFT, 1,
+					false);
+	}
+
+	if (output_if & VOP_OUTPUT_IF_eDP0) {
+		vop2_mask_write(vop2, RK3568_DSP_IF_EN, EN_MASK, RK3588_EDP0_EN_SHIFT,
+				1, false);
+		vop2_mask_write(vop2, RK3568_DSP_IF_EN, IF_MUX_MASK, RK3588_HDMI_EDP0_MUX_SHIFT,
+				cstate->crtc_id, false);
+		vop2_mask_write(vop2, RK3568_DSP_IF_CTRL, 3, HDMI_EDP0_DCLK_DIV_SHIFT,
+				if_dclk_div, false);
+
+		vop2_mask_write(vop2, RK3568_DSP_IF_CTRL, 3, HDMI_EDP0_PIXCLK_DIV_SHIFT,
+				if_pixclk_div, false);
+
+		vop2_grf_writel(vop2, vop2->vop_grf, RK3588_GRF_VOP_CON2, EN_MASK,
+				RK3588_GRF_EDP0_ENABLE_SHIFT, 1);
+	}
+
+	if (output_if & VOP_OUTPUT_IF_eDP1) {
+		vop2_mask_write(vop2, RK3568_DSP_IF_EN, EN_MASK, RK3588_EDP1_EN_SHIFT,
+				1, false);
+		vop2_mask_write(vop2, RK3568_DSP_IF_EN, IF_MUX_MASK, RK3588_HDMI_EDP1_MUX_SHIFT,
+				cstate->crtc_id, false);
+		vop2_mask_write(vop2, RK3568_DSP_IF_CTRL, 3, HDMI_EDP1_DCLK_DIV_SHIFT,
+				if_dclk_div, false);
+
+		vop2_mask_write(vop2, RK3568_DSP_IF_CTRL, 3, HDMI_EDP1_PIXCLK_DIV_SHIFT,
+				if_pixclk_div, false);
+	}
+
+	if (output_if & VOP_OUTPUT_IF_HDMI0) {
+		vop2_mask_write(vop2, RK3568_DSP_IF_EN, EN_MASK, RK3588_HDMI0_EN_SHIFT,
+				1, false);
+		vop2_mask_write(vop2, RK3568_DSP_IF_EN, IF_MUX_MASK, RK3588_HDMI_EDP0_MUX_SHIFT,
+				cstate->crtc_id, false);
+		vop2_mask_write(vop2, RK3568_DSP_IF_CTRL, 3, HDMI_EDP0_DCLK_DIV_SHIFT,
+				if_dclk_div, false);
+
+		vop2_mask_write(vop2, RK3568_DSP_IF_CTRL, 3, HDMI_EDP0_PIXCLK_DIV_SHIFT,
+				if_pixclk_div, false);
+	}
+
+	if (output_if & VOP_OUTPUT_IF_HDMI1) {
+		vop2_mask_write(vop2, RK3568_DSP_IF_EN, EN_MASK, RK3588_HDMI1_EN_SHIFT,
+				1, false);
+		vop2_mask_write(vop2, RK3568_DSP_IF_EN, IF_MUX_MASK, RK3588_HDMI_EDP1_MUX_SHIFT,
+				cstate->crtc_id, false);
+		vop2_mask_write(vop2, RK3568_DSP_IF_CTRL, 3, HDMI_EDP1_DCLK_DIV_SHIFT,
+				if_dclk_div, false);
+
+		vop2_mask_write(vop2, RK3568_DSP_IF_CTRL, 3, HDMI_EDP1_PIXCLK_DIV_SHIFT,
+				if_pixclk_div, false);
+	}
+
+	if (output_if & VOP_OUTPUT_IF_DP0) {
+		vop2_mask_write(vop2, RK3568_DSP_IF_EN, EN_MASK, RK3588_DP0_EN_SHIFT,
+				1, false);
+		vop2_mask_write(vop2, RK3568_DSP_IF_EN, IF_MUX_MASK, RK3588_DP0_MUX_SHIFT,
+				cstate->crtc_id, false);
+		vop2_mask_write(vop2, RK3568_DSP_IF_POL, RK3588_IF_PIN_POL_MASK,
+				RK3588_DP0_PIN_POL_SHIFT, val, false);
+	}
+
+	if (output_if & VOP_OUTPUT_IF_DP1) {
+		vop2_mask_write(vop2, RK3568_DSP_IF_EN, EN_MASK, RK3588_HDMI1_EN_SHIFT,
+				1, false);
+		vop2_mask_write(vop2, RK3568_DSP_IF_EN, IF_MUX_MASK, RK3588_DP1_MUX_SHIFT,
+				cstate->crtc_id, false);
+		vop2_mask_write(vop2, RK3568_DSP_IF_POL, RK3588_IF_PIN_POL_MASK,
+				RK3588_DP1_PIN_POL_SHIFT, val, false);
+	}
+
+	vop2_mask_write(vop2, RK3588_VP0_CLK_CTRL + vp_offset, 0x3,
+			DCLK_CORE_DIV_SHIFT, dclk_core_div, false);
+	vop2_mask_write(vop2, RK3588_VP0_CLK_CTRL + vp_offset, 0x3,
+			DCLK_OUT_DIV_SHIFT, dclk_out_div, false);
+
+	return dclk_rate;
+}
+
+static unsigned long rk3568_vop2_if_cfg(struct display_state *state)
+{
+	struct crtc_state *cstate = &state->crtc_state;
+	struct connector_state *conn_state = &state->conn_state;
+	struct drm_display_mode *mode = &conn_state->mode;
+	struct vop2 *vop2 = cstate->private;
+	u32 vp_offset = (cstate->crtc_id * 0x100);
+	bool dclk_inv;
+	u32 val;
 
-	vop2_initial(vop2, state);
 	dclk_inv = (mode->flags & DRM_MODE_FLAG_PPIXDATA) ? 0 : 1;
 	val = (mode->flags & DRM_MODE_FLAG_NHSYNC) ? 0 : BIT(HSYNC_POSITIVE);
 	val |= (mode->flags & DRM_MODE_FLAG_NVSYNC) ? 0 : BIT(VSYNC_POSITIVE);
@@ -1505,7 +1888,7 @@ static int rockchip_vop2_init(struct display_state *state)
 				1, false);
 		vop2_mask_write(vop2, RK3568_DSP_IF_EN, IF_MUX_MASK,
 				RGB_MUX_SHIFT, cstate->crtc_id, false);
-		vop2_grf_writel(vop2, RK3568_GRF_VO_CON1, EN_MASK,
+		vop2_grf_writel(vop2, vop2->grf, RK3568_GRF_VO_CON1, EN_MASK,
 				GRF_RGB_DCLK_INV_SHIFT, dclk_inv);
 	}
 
@@ -1516,7 +1899,7 @@ static int rockchip_vop2_init(struct display_state *state)
 				BT1120_EN_SHIFT, 1, false);
 		vop2_mask_write(vop2, RK3568_DSP_IF_EN, IF_MUX_MASK,
 				RGB_MUX_SHIFT, cstate->crtc_id, false);
-		vop2_grf_writel(vop2, RK3568_GRF_VO_CON1, EN_MASK,
+		vop2_grf_writel(vop2, vop2->grf, RK3568_GRF_VO_CON1, EN_MASK,
 				GRF_BT1120_CLK_INV_SHIFT, !dclk_inv);
 	}
 
@@ -1525,7 +1908,7 @@ static int rockchip_vop2_init(struct display_state *state)
 				1, false);
 		vop2_mask_write(vop2, RK3568_DSP_IF_EN, IF_MUX_MASK,
 				RGB_MUX_SHIFT, cstate->crtc_id, false);
-		vop2_grf_writel(vop2, RK3568_GRF_VO_CON1, EN_MASK,
+		vop2_grf_writel(vop2, vop2->grf, RK3568_GRF_VO_CON1, EN_MASK,
 				GRF_BT656_CLK_INV_SHIFT, !dclk_inv);
 	}
 
@@ -1611,6 +1994,49 @@ static int rockchip_vop2_init(struct display_state *state)
 				IF_CRTL_HDMI_PIN_POL_SHIT, val, false);
 	}
 
+	return mode->clock;
+}
+
+static int rockchip_vop2_init(struct display_state *state)
+{
+	struct crtc_state *cstate = &state->crtc_state;
+	struct connector_state *conn_state = &state->conn_state;
+	struct drm_display_mode *mode = &conn_state->mode;
+	struct vop2 *vop2 = cstate->private;
+	u16 hsync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
+	u16 hdisplay = mode->crtc_hdisplay;
+	u16 htotal = mode->crtc_htotal;
+	u16 hact_st = mode->crtc_htotal - mode->crtc_hsync_start;
+	u16 hact_end = hact_st + hdisplay;
+	u16 vdisplay = mode->crtc_vdisplay;
+	u16 vtotal = mode->crtc_vtotal;
+	u16 vsync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
+	u16 vact_st = mode->crtc_vtotal - mode->crtc_vsync_start;
+	u16 vact_end = vact_st + vdisplay;
+	bool yuv_overlay = false;
+	u32 vp_offset = (cstate->crtc_id * 0x100);
+	u32 val;
+	u8 dither_down_en = 0;
+	u8 pre_dither_down_en = 0;
+	char output_type_name[30] = {0};
+	char dclk_name[9];
+	struct clk dclk;
+	unsigned long dclk_rate;
+	int ret;
+
+	printf("VOP update mode to: %dx%d%s%d, type:%s for VP%d\n",
+	       mode->hdisplay, mode->vdisplay,
+	       mode->flags & DRM_MODE_FLAG_INTERLACE ? "i" : "p",
+	       mode->vscan,
+	       get_output_if_name(conn_state->output_if, output_type_name),
+	       cstate->crtc_id);
+
+	vop2_initial(vop2, state);
+	if (vop2->version == VOP_VERSION_RK3588)
+		dclk_rate = rk3588_vop2_if_cfg(state);
+	else
+		dclk_rate = rk3568_vop2_if_cfg(state);
+
 	if (conn_state->output_mode == ROCKCHIP_OUT_MODE_AAAA &&
 	    !(cstate->feature & VOP_FEATURE_OUTPUT_10BIT))
 		conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
@@ -1724,10 +2150,20 @@ static int rockchip_vop2_init(struct display_state *state)
 	vop2_tv_config_update(state, vop2);
 	vop2_post_config(state, vop2);
 
+	snprintf(dclk_name, sizeof(dclk_name), "dclk_vp%d", cstate->crtc_id);
+	ret = clk_get_by_name(cstate->dev, dclk_name, &dclk);
+	if (!ret)
+		ret = clk_set_rate(&dclk, dclk_rate * 1000);
+	if (IS_ERR_VALUE(ret)) {
+		printf("%s: Failed to set vp%d dclk[%ld KHZ] ret=%d\n",
+		       __func__, cstate->crtc_id, dclk_rate, ret);
+		return ret;
+	}
+
 	return 0;
 }
 
-static void vop2_setup_scale(struct vop2 *vop2, uint32_t win_offset,
+static void vop2_setup_scale(struct vop2 *vop2, struct vop2_win_data *win,
 			     uint32_t src_w, uint32_t src_h, uint32_t dst_w,
 			     uint32_t dst_h)
 {
@@ -1739,6 +2175,7 @@ static void vop2_setup_scale(struct vop2 *vop2, uint32_t win_offset,
 	uint16_t hsd_filter_mode = VOP2_SCALE_DOWN_BIL;
 	uint16_t vsu_filter_mode = VOP2_SCALE_UP_BIL;
 	uint16_t vsd_filter_mode = VOP2_SCALE_DOWN_BIL;
+	u32 win_offset = win->reg_offset;
 
 	if (src_h >= (4 * dst_h))
 		gt4 = 1;
@@ -1774,33 +2211,49 @@ static void vop2_setup_scale(struct vop2 *vop2, uint32_t win_offset,
 
 	xfac = vop2_scale_factor(yrgb_hor_scl_mode, hscl_filter_mode, src_w, dst_w);
 	yfac = vop2_scale_factor(yrgb_ver_scl_mode, vscl_filter_mode, src_h, dst_h);
-	vop2_writel(vop2, RK3568_ESMART0_REGION0_SCL_FACTOR_YRGB + win_offset,
-		    yfac << 16 | xfac);
 
-	vop2_mask_write(vop2, RK3568_ESMART0_REGION0_CTRL + win_offset,
-			YRGB_GT2_MASK, YRGB_GT2_SHIFT, gt2, false);
-	vop2_mask_write(vop2, RK3568_ESMART0_REGION0_CTRL + win_offset,
-			YRGB_GT4_MASK, YRGB_GT4_SHIFT, gt4, false);
-
-	vop2_mask_write(vop2, RK3568_ESMART0_REGION0_SCL_CTRL + win_offset,
-			YRGB_XSCL_MODE_MASK, YRGB_XSCL_MODE_SHIFT, yrgb_hor_scl_mode, false);
-	vop2_mask_write(vop2, RK3568_ESMART0_REGION0_SCL_CTRL + win_offset,
-			YRGB_YSCL_MODE_MASK, YRGB_YSCL_MODE_SHIFT, yrgb_ver_scl_mode, false);
-
-	vop2_mask_write(vop2, RK3568_ESMART0_REGION0_SCL_CTRL + win_offset,
-			YRGB_XSCL_FILTER_MODE_MASK, YRGB_XSCL_FILTER_MODE_SHIFT,
-			hscl_filter_mode, false);
-	vop2_mask_write(vop2, RK3568_ESMART0_REGION0_SCL_CTRL + win_offset,
-			YRGB_YSCL_FILTER_MODE_MASK, YRGB_YSCL_FILTER_MODE_SHIFT,
-			vscl_filter_mode, false);
+	if (win->type == CLUSTER_LAYER) {
+		vop2_writel(vop2, RK3568_CLUSTER0_WIN0_SCL_FACTOR_YRGB + win_offset,
+			    yfac << 16 | xfac);
+
+		vop2_mask_write(vop2, RK3568_CLUSTER0_WIN0_CTRL1 + win_offset,
+				YRGB_GT2_MASK, CLUSTER_YRGB_GT2_SHIFT, gt2, false);
+		vop2_mask_write(vop2, RK3568_CLUSTER0_WIN0_CTRL1 + win_offset,
+				YRGB_GT4_MASK, CLUSTER_YRGB_GT4_SHIFT, gt4, false);
+
+		vop2_mask_write(vop2, RK3568_CLUSTER0_WIN0_CTRL1 + win_offset,
+				YRGB_XSCL_MODE_MASK, CLUSTER_YRGB_XSCL_MODE_SHIFT, yrgb_hor_scl_mode, false);
+		vop2_mask_write(vop2, RK3568_CLUSTER0_WIN0_CTRL1 + win_offset,
+				YRGB_YSCL_MODE_MASK, CLUSTER_YRGB_YSCL_MODE_SHIFT, yrgb_ver_scl_mode, false);
+
+	} else {
+		vop2_writel(vop2, RK3568_ESMART0_REGION0_SCL_FACTOR_YRGB + win_offset,
+			    yfac << 16 | xfac);
+
+		vop2_mask_write(vop2, RK3568_ESMART0_REGION0_CTRL + win_offset,
+				YRGB_GT2_MASK, YRGB_GT2_SHIFT, gt2, false);
+		vop2_mask_write(vop2, RK3568_ESMART0_REGION0_CTRL + win_offset,
+				YRGB_GT4_MASK, YRGB_GT4_SHIFT, gt4, false);
+
+		vop2_mask_write(vop2, RK3568_ESMART0_REGION0_SCL_CTRL + win_offset,
+				YRGB_XSCL_MODE_MASK, YRGB_XSCL_MODE_SHIFT, yrgb_hor_scl_mode, false);
+		vop2_mask_write(vop2, RK3568_ESMART0_REGION0_SCL_CTRL + win_offset,
+				YRGB_YSCL_MODE_MASK, YRGB_YSCL_MODE_SHIFT, yrgb_ver_scl_mode, false);
+
+		vop2_mask_write(vop2, RK3568_ESMART0_REGION0_SCL_CTRL + win_offset,
+				YRGB_XSCL_FILTER_MODE_MASK, YRGB_XSCL_FILTER_MODE_SHIFT,
+				hscl_filter_mode, false);
+		vop2_mask_write(vop2, RK3568_ESMART0_REGION0_SCL_CTRL + win_offset,
+				YRGB_YSCL_FILTER_MODE_MASK, YRGB_YSCL_FILTER_MODE_SHIFT,
+				vscl_filter_mode, false);
+	}
 }
 
-static int rockchip_vop2_set_plane(struct display_state *state)
+static void vop2_set_cluster_win(struct display_state *state, struct vop2_win_data *win)
 {
 	struct crtc_state *cstate = &state->crtc_state;
 	struct connector_state *conn_state = &state->conn_state;
 	struct drm_display_mode *mode = &conn_state->mode;
-	u32 act_info, dsp_info, dsp_st, dsp_stx, dsp_sty;
 	struct vop2 *vop2 = cstate->private;
 	int src_w = cstate->src_w;
 	int src_h = cstate->src_h;
@@ -1811,17 +2264,71 @@ static int rockchip_vop2_set_plane(struct display_state *state)
 	int xvir = cstate->xvir;
 	int y_mirror = 0;
 	int csc_mode;
-	u32 win_offset;
-	u32 cfg_done = CFG_DONE_EN | BIT(cstate->crtc_id);
-	u8 primary_plane_id = vop2->vp_plane_mask[cstate->crtc_id].primary_plane_id;
-	char plane_name[10] = {0};
+	u32 act_info, dsp_info, dsp_st, dsp_stx, dsp_sty;
+	u32 win_offset = win->reg_offset;
+	u32 cfg_done = CFG_DONE_EN | BIT(cstate->crtc_id) | (BIT(cstate->crtc_id) << 16);
 
-	win_offset = vop2->data->win_data[primary_plane_id].reg_offset;
-	if (crtc_w > cstate->max_output.width) {
-		printf("ERROR: output w[%d] exceeded max width[%d]\n",
-		       crtc_w, cstate->max_output.width);
-		return -EINVAL;
-	}
+	act_info = (src_h - 1) << 16;
+	act_info |= (src_w - 1) & 0xffff;
+
+	dsp_info = (crtc_h - 1) << 16;
+	dsp_info |= (crtc_w - 1) & 0xffff;
+
+	dsp_stx = crtc_x;
+	dsp_sty = crtc_y;
+	dsp_st = dsp_sty << 16 | (dsp_stx & 0xffff);
+
+	if (mode->flags & DRM_MODE_FLAG_YMIRROR)
+		y_mirror = 1;
+	else
+		y_mirror = 0;
+
+	vop2_setup_scale(vop2, win, src_w, src_h, crtc_w, crtc_h);
+
+	if (y_mirror)
+		printf("WARN: y mirror is unsupported by cluster window\n");
+
+	vop2_mask_write(vop2, RK3568_CLUSTER0_WIN0_CTRL0 + win_offset,
+			WIN_FORMAT_MASK, WIN_FORMAT_SHIFT, cstate->format,
+			false);
+	vop2_writel(vop2, RK3568_CLUSTER0_WIN0_VIR + win_offset, xvir);
+	vop2_writel(vop2, RK3568_CLUSTER0_WIN0_YRGB_MST + win_offset, cstate->dma_addr);
+
+	vop2_writel(vop2, RK3568_CLUSTER0_WIN0_ACT_INFO + win_offset, act_info);
+	vop2_writel(vop2, RK3568_CLUSTER0_WIN0_DSP_INFO + win_offset, dsp_info);
+	vop2_writel(vop2, RK3568_CLUSTER0_WIN0_DSP_ST + win_offset, dsp_st);
+
+	vop2_mask_write(vop2, RK3568_CLUSTER0_WIN0_CTRL0 + win_offset, EN_MASK, WIN_EN_SHIFT, 1, false);
+
+	csc_mode = vop2_convert_csc_mode(conn_state->color_space);
+	vop2_mask_write(vop2, RK3568_CLUSTER0_WIN0_CTRL0 + win_offset, EN_MASK,
+			CLUSTER_RGB2YUV_EN_SHIFT,
+			is_yuv_output(conn_state->bus_format), false);
+	vop2_mask_write(vop2, RK3568_CLUSTER0_WIN0_CTRL0 + win_offset, CSC_MODE_MASK,
+			CLUSTER_CSC_MODE_SHIFT, csc_mode, false);
+	vop2_mask_write(vop2, RK3568_CLUSTER0_CTRL + win_offset, EN_MASK, CLUSTER_EN_SHIFT, 1, false);
+
+	vop2_writel(vop2, RK3568_REG_CFG_DONE, cfg_done);
+}
+
+static void vop2_set_smart_win(struct display_state *state, struct vop2_win_data *win)
+{
+	struct crtc_state *cstate = &state->crtc_state;
+	struct connector_state *conn_state = &state->conn_state;
+	struct drm_display_mode *mode = &conn_state->mode;
+	struct vop2 *vop2 = cstate->private;
+	int src_w = cstate->src_w;
+	int src_h = cstate->src_h;
+	int crtc_x = cstate->crtc_x;
+	int crtc_y = cstate->crtc_y;
+	int crtc_w = cstate->crtc_w;
+	int crtc_h = cstate->crtc_h;
+	int xvir = cstate->xvir;
+	int y_mirror = 0;
+	int csc_mode;
+	u32 act_info, dsp_info, dsp_st, dsp_stx, dsp_sty;
+	u32 win_offset = win->reg_offset;
+	u32 cfg_done = CFG_DONE_EN | BIT(cstate->crtc_id) | (BIT(cstate->crtc_id) << 16);
 
 	/*
 	 * This is workaround solution for IC design:
@@ -1847,7 +2354,7 @@ static int rockchip_vop2_set_plane(struct display_state *state)
 	else
 		y_mirror = 0;
 
-	vop2_setup_scale(vop2, win_offset, src_w, src_h, crtc_w, crtc_h);
+	vop2_setup_scale(vop2, win, src_w, src_h, crtc_w, crtc_h);
 
 	if (y_mirror)
 		cstate->dma_addr += (src_h - 1) * xvir * 4;
@@ -1878,10 +2385,37 @@ static int rockchip_vop2_set_plane(struct display_state *state)
 			CSC_MODE_SHIFT, csc_mode, false);
 
 	vop2_writel(vop2, RK3568_REG_CFG_DONE, cfg_done);
+}
+
+static int rockchip_vop2_set_plane(struct display_state *state)
+{
+	struct crtc_state *cstate = &state->crtc_state;
+	struct vop2 *vop2 = cstate->private;
+	struct vop2_win_data *win_data;
+	u8 primary_plane_id = vop2->vp_plane_mask[cstate->crtc_id].primary_plane_id;
+	char plane_name[10] = {0};
+
+	if (cstate->crtc_w > cstate->max_output.width) {
+		printf("ERROR: output w[%d] exceeded max width[%d]\n",
+		       cstate->crtc_w, cstate->max_output.width);
+		return -EINVAL;
+	}
+
+	win_data = vop2_find_win_by_phys_id(vop2, primary_plane_id);
+	if (!win_data) {
+		printf("invalid win id %d\n", primary_plane_id);
+		return -ENODEV;
+	}
+
+	if (win_data->type == CLUSTER_LAYER)
+		vop2_set_cluster_win(state, win_data);
+	else
+		vop2_set_smart_win(state, win_data);
 
 	printf("VOP VP%d enable %s[%dx%d->%dx%d@%dx%d] fmt[%d] addr[0x%x]\n",
 		cstate->crtc_id, get_plane_name(primary_plane_id, plane_name),
-		src_w, src_h, crtc_w, crtc_h, crtc_x, crtc_y, cstate->format,
+		cstate->src_w, cstate->src_h, cstate->crtc_w, cstate->crtc_h,
+		cstate->crtc_x, cstate->crtc_y, cstate->format,
 		cstate->dma_addr);
 
 	return 0;
@@ -1897,7 +2431,7 @@ static int rockchip_vop2_enable(struct display_state *state)
 	struct crtc_state *cstate = &state->crtc_state;
 	struct vop2 *vop2 = cstate->private;
 	u32 vp_offset = (cstate->crtc_id * 0x100);
-	u32 cfg_done = CFG_DONE_EN | BIT(cstate->crtc_id);
+	u32 cfg_done = CFG_DONE_EN | BIT(cstate->crtc_id) | (BIT(cstate->crtc_id) << 16);
 
 	vop2_mask_write(vop2, RK3568_VP0_DSP_CTRL + vp_offset, EN_MASK,
 			STANDBY_EN_SHIFT, 0, false);
@@ -1911,7 +2445,7 @@ static int rockchip_vop2_disable(struct display_state *state)
 	struct crtc_state *cstate = &state->crtc_state;
 	struct vop2 *vop2 = cstate->private;
 	u32 vp_offset = (cstate->crtc_id * 0x100);
-	u32 cfg_done = CFG_DONE_EN | BIT(cstate->crtc_id);
+	u32 cfg_done = CFG_DONE_EN | BIT(cstate->crtc_id) | (BIT(cstate->crtc_id) << 16);
 
 	vop2_mask_write(vop2, RK3568_VP0_DSP_CTRL + vp_offset, EN_MASK,
 			STANDBY_EN_SHIFT, 1, false);
@@ -2083,6 +2617,7 @@ static struct vop2_win_data rk3568_win_data[6] = {
 	{
 		.name = "Cluster0",
 		.phys_id = ROCKCHIP_VOP2_CLUSTER0,
+		.type = CLUSTER_LAYER,
 		.win_sel_port_offset = 0,
 		.layer_sel_win_id = 0,
 		.reg_offset = 0,
@@ -2091,6 +2626,7 @@ static struct vop2_win_data rk3568_win_data[6] = {
 	{
 		.name = "Cluster1",
 		.phys_id = ROCKCHIP_VOP2_CLUSTER1,
+		.type = CLUSTER_LAYER,
 		.win_sel_port_offset = 1,
 		.layer_sel_win_id = 1,
 		.reg_offset = 0x200,
@@ -2099,6 +2635,7 @@ static struct vop2_win_data rk3568_win_data[6] = {
 	{
 		.name = "Esmart0",
 		.phys_id = ROCKCHIP_VOP2_ESMART0,
+		.type = ESMART_LAYER,
 		.win_sel_port_offset = 4,
 		.layer_sel_win_id = 2,
 		.reg_offset = 0,
@@ -2107,6 +2644,7 @@ static struct vop2_win_data rk3568_win_data[6] = {
 	{
 		.name = "Esmart1",
 		.phys_id = ROCKCHIP_VOP2_ESMART1,
+		.type = ESMART_LAYER,
 		.win_sel_port_offset = 5,
 		.layer_sel_win_id = 6,
 		.reg_offset = 0x200,
@@ -2115,6 +2653,7 @@ static struct vop2_win_data rk3568_win_data[6] = {
 	{
 		.name = "Smart0",
 		.phys_id = ROCKCHIP_VOP2_SMART0,
+		.type = SMART_LAYER,
 		.win_sel_port_offset = 6,
 		.layer_sel_win_id = 3,
 		.reg_offset = 0x400,
@@ -2123,6 +2662,7 @@ static struct vop2_win_data rk3568_win_data[6] = {
 	{
 		.name = "Smart1",
 		.phys_id = ROCKCHIP_VOP2_SMART1,
+		.type = SMART_LAYER,
 		.win_sel_port_offset = 7,
 		.layer_sel_win_id = 7,
 		.reg_offset = 0x600,
@@ -2148,6 +2688,7 @@ static struct vop2_vp_data rk3568_vp_data[3] = {
 };
 
 const struct vop2_data rk3568_vop = {
+	.version = VOP_VERSION_RK3568,
 	.nr_vps = 3,
 	.vp_data = rk3568_vp_data,
 	.win_data = rk3568_win_data,
@@ -2158,6 +2699,223 @@ const struct vop2_data rk3568_vop = {
 	.nr_gammas = 1,
 };
 
+static struct vop2_plane_table rk3588_plane_table[ROCKCHIP_VOP2_LAYER_MAX] = {
+	{ROCKCHIP_VOP2_CLUSTER0, CLUSTER_LAYER},
+	{ROCKCHIP_VOP2_CLUSTER1, CLUSTER_LAYER},
+	{ROCKCHIP_VOP2_CLUSTER2, CLUSTER_LAYER},
+	{ROCKCHIP_VOP2_CLUSTER3, CLUSTER_LAYER},
+	{ROCKCHIP_VOP2_ESMART0, ESMART_LAYER},
+	{ROCKCHIP_VOP2_ESMART1, ESMART_LAYER},
+	{ROCKCHIP_VOP2_ESMART2, ESMART_LAYER},
+	{ROCKCHIP_VOP2_ESMART3, ESMART_LAYER},
+};
+
+static struct vop2_vp_plane_mask rk3588_vp_plane_mask[VOP2_VP_MAX][VOP2_VP_MAX] = {
+	{ /* one display policy */
+		{/* main display */
+			.primary_plane_id = ROCKCHIP_VOP2_CLUSTER0,
+			.attached_layers_nr = 8,
+			.attached_layers = {
+				  ROCKCHIP_VOP2_CLUSTER0, ROCKCHIP_VOP2_ESMART0, ROCKCHIP_VOP2_ESMART2,
+				  ROCKCHIP_VOP2_CLUSTER1, ROCKCHIP_VOP2_ESMART1, ROCKCHIP_VOP2_ESMART3,
+				  ROCKCHIP_VOP2_CLUSTER2, ROCKCHIP_VOP2_CLUSTER3
+			},
+		},
+		{/* second display */},
+		{/* third  display */},
+		{/* fourth display */},
+	},
+
+	{ /* two display policy */
+		{/* main display */
+			.primary_plane_id = ROCKCHIP_VOP2_CLUSTER0,
+			.attached_layers_nr = 4,
+			.attached_layers = {
+				  ROCKCHIP_VOP2_CLUSTER0, ROCKCHIP_VOP2_ESMART0,
+				  ROCKCHIP_VOP2_CLUSTER1, ROCKCHIP_VOP2_ESMART1
+			},
+		},
+
+		{/* second display */
+			.primary_plane_id = ROCKCHIP_VOP2_CLUSTER2,
+			.attached_layers_nr = 4,
+			.attached_layers = {
+				  ROCKCHIP_VOP2_CLUSTER2, ROCKCHIP_VOP2_ESMART2,
+				  ROCKCHIP_VOP2_CLUSTER3, ROCKCHIP_VOP2_ESMART3
+			},
+		},
+		{/* third  display */},
+		{/* fourth display */},
+	},
+
+	{ /* three display policy */
+		{/* main display */
+			.primary_plane_id = ROCKCHIP_VOP2_CLUSTER0,
+			.attached_layers_nr = 3,
+			.attached_layers = {
+				  ROCKCHIP_VOP2_CLUSTER0, ROCKCHIP_VOP2_CLUSTER1, ROCKCHIP_VOP2_ESMART0
+			},
+		},
+
+		{/* second display */
+			.primary_plane_id = ROCKCHIP_VOP2_CLUSTER2,
+			.attached_layers_nr = 3,
+			.attached_layers = {
+				  ROCKCHIP_VOP2_CLUSTER2, ROCKCHIP_VOP2_CLUSTER3, ROCKCHIP_VOP2_ESMART1
+			},
+		},
+
+		{/* third  display */
+			.primary_plane_id = ROCKCHIP_VOP2_ESMART2,
+			.attached_layers_nr = 2,
+			.attached_layers = { ROCKCHIP_VOP2_ESMART2, ROCKCHIP_VOP2_ESMART3 },
+		},
+
+		{/* fourth display */},
+	},
+
+	{ /* four display policy */
+		{/* main display */
+			.primary_plane_id = ROCKCHIP_VOP2_CLUSTER0,
+			.attached_layers_nr = 2,
+			.attached_layers = { ROCKCHIP_VOP2_CLUSTER0, ROCKCHIP_VOP2_ESMART0 },
+		},
+
+		{/* second display */
+			.primary_plane_id = ROCKCHIP_VOP2_CLUSTER1,
+			.attached_layers_nr = 2,
+			.attached_layers = { ROCKCHIP_VOP2_CLUSTER1, ROCKCHIP_VOP2_ESMART1 },
+		},
+
+		{/* third  display */
+			.primary_plane_id = ROCKCHIP_VOP2_CLUSTER2,
+			.attached_layers_nr = 2,
+			.attached_layers = { ROCKCHIP_VOP2_CLUSTER2, ROCKCHIP_VOP2_ESMART2 },
+		},
+
+		{/* fourth display */
+			.primary_plane_id = ROCKCHIP_VOP2_CLUSTER3,
+			.attached_layers_nr = 2,
+			.attached_layers = { ROCKCHIP_VOP2_CLUSTER3, ROCKCHIP_VOP2_ESMART3 },
+		},
+	},
+
+};
+
+static struct vop2_win_data rk3588_win_data[8] = {
+	{
+		.name = "Cluster0",
+		.phys_id = ROCKCHIP_VOP2_CLUSTER0,
+		.type = CLUSTER_LAYER,
+		.win_sel_port_offset = 0,
+		.layer_sel_win_id = 0,
+		.reg_offset = 0,
+	},
+
+	{
+		.name = "Cluster1",
+		.phys_id = ROCKCHIP_VOP2_CLUSTER1,
+		.type = CLUSTER_LAYER,
+		.win_sel_port_offset = 1,
+		.layer_sel_win_id = 1,
+		.reg_offset = 0x200,
+	},
+
+	{
+		.name = "Cluster2",
+		.phys_id = ROCKCHIP_VOP2_CLUSTER2,
+		.type = CLUSTER_LAYER,
+		.win_sel_port_offset = 2,
+		.layer_sel_win_id = 4,
+		.reg_offset = 0x400,
+	},
+
+	{
+		.name = "Cluster3",
+		.phys_id = ROCKCHIP_VOP2_CLUSTER3,
+		.type = CLUSTER_LAYER,
+		.win_sel_port_offset = 3,
+		.layer_sel_win_id = 5,
+		.reg_offset = 0x600,
+	},
+
+	{
+		.name = "Esmart0",
+		.phys_id = ROCKCHIP_VOP2_ESMART0,
+		.type = ESMART_LAYER,
+		.win_sel_port_offset = 4,
+		.layer_sel_win_id = 2,
+		.reg_offset = 0,
+	},
+
+	{
+		.name = "Esmart1",
+		.phys_id = ROCKCHIP_VOP2_ESMART1,
+		.type = ESMART_LAYER,
+		.win_sel_port_offset = 5,
+		.layer_sel_win_id = 3,
+		.reg_offset = 0x200,
+	},
+
+	{
+		.name = "Esmart2",
+		.phys_id = ROCKCHIP_VOP2_ESMART2,
+		.type = ESMART_LAYER,
+		.win_sel_port_offset = 6,
+		.layer_sel_win_id = 6,
+		.reg_offset = 0x400,
+	},
+
+	{
+		.name = "Esmart3",
+		.phys_id = ROCKCHIP_VOP2_ESMART3,
+		.type = ESMART_LAYER,
+		.win_sel_port_offset = 7,
+		.layer_sel_win_id = 7,
+		.reg_offset = 0x600,
+	},
+};
+
+static struct vop2_vp_data rk3588_vp_data[4] = {
+	{
+		.feature = VOP_FEATURE_OUTPUT_10BIT,
+		.pre_scan_max_dly = 42,
+		.max_dclk = 600000,
+		.max_output = {7680, 4320},
+	},
+	{
+		.feature = VOP_FEATURE_OUTPUT_10BIT,
+		.pre_scan_max_dly = 40,
+		.max_dclk = 600000,
+		.max_output = {4096, 2304},
+	},
+	{
+		.feature = VOP_FEATURE_OUTPUT_10BIT,
+		.pre_scan_max_dly = 52,
+		.max_dclk = 600000,
+		.max_output = {4096, 2304},
+	},
+	{
+		.feature = 0,
+		.pre_scan_max_dly = 52,
+		.max_dclk = 200000,
+		.max_output = {1920, 1080},
+	},
+};
+
+const struct vop2_data rk3588_vop = {
+	.version = VOP_VERSION_RK3588,
+	.nr_vps = 4,
+	.vp_data = rk3588_vp_data,
+	.win_data = rk3588_win_data,
+	.plane_mask = rk3588_vp_plane_mask[0],
+	.plane_table = rk3588_plane_table,
+	.nr_layers = 8,
+	.nr_mixers = 7,
+	.nr_gammas = 4,
+	.nr_dscs = 2,
+};
+
 const struct rockchip_crtc_funcs rockchip_vop2_funcs = {
 	.preinit = rockchip_vop2_preinit,
 	.prepare = rockchip_vop2_prepare,
diff --git a/include/drm_modes.h b/include/drm_modes.h
index 2aa5374839..2421cf1655 100644
--- a/include/drm_modes.h
+++ b/include/drm_modes.h
@@ -80,6 +80,7 @@
 #define DRM_MODE_CONNECTOR_eDP		14
 #define DRM_MODE_CONNECTOR_VIRTUAL      15
 #define DRM_MODE_CONNECTOR_DSI		16
+#define DRM_MODE_CONNECTOR_DPI		17
 
 #define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1)
 #define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2)

commit 2bf72cbb7ad8dc4a82a3feb155099dde044cfdb1
Author: Damon Ding <damon.ding@rock-chips.com>
Date:   Thu Dec 2 19:58:55 2021 +0800

    drm/rockchip: display: modify the check of get_crtc_id()
    
    Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
    Change-Id: I93aa27c28f81d63478e2822a4d6a5b0b0ad55da6

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index cdadbeb3f1..35c5585e5e 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -1126,17 +1126,15 @@ static int display_logo(struct display_state *state)
 	return 0;
 }
 
-static int get_crtc_id(ofnode connect)
+static int get_crtc_id(struct device_node *connect)
 {
-	int phandle;
-	struct device_node *remote;
+	struct device_node *port_node;
 	int val;
 
-	phandle = ofnode_read_u32_default(connect, "remote-endpoint", -1);
-	if (phandle < 0)
+	port_node = of_get_parent(connect);
+	if (!port_node)
 		goto err;
-	remote = of_find_node_by_phandle(phandle);
-	val = ofnode_read_u32_default(np_to_ofnode(remote), "reg", -1);
+	val = ofnode_read_u32_default(np_to_ofnode(port_node), "reg", -1);
 	if (val < 0)
 		goto err;
 
@@ -1806,7 +1804,7 @@ static int rockchip_display_probe(struct udevice *dev)
 		s->crtc_state.node = np_to_ofnode(vop_node);
 		s->crtc_state.dev = crtc_dev;
 		s->crtc_state.crtc = crtc;
-		s->crtc_state.crtc_id = get_crtc_id(np_to_ofnode(ep_node));
+		s->crtc_state.crtc_id = get_crtc_id(ep_node);
 		s->node = node;
 
 		if (is_ports_node) { /* only vop2 will get into here */

commit 86b248b47bf24e82e4e2fa1b28c65a55cbe6cf7b
Author: Damon Ding <damon.ding@rock-chips.com>
Date:   Sun Dec 5 15:20:22 2021 +0800

    rockchip: rk3588: add the vop related grf syscon
    
    Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
    Change-Id: I2fc73052602898dcdcf9ebda7c7f7d476d3f7c62

diff --git a/arch/arm/include/asm/arch-rockchip/clock.h b/arch/arm/include/asm/arch-rockchip/clock.h
index dcbb83f0fd..fcba1545ab 100644
--- a/arch/arm/include/asm/arch-rockchip/clock.h
+++ b/arch/arm/include/asm/arch-rockchip/clock.h
@@ -27,6 +27,8 @@ enum {
 	ROCKCHIP_SYSCON_PIPE_PHY0_GRF,
 	ROCKCHIP_SYSCON_PIPE_PHY1_GRF,
 	ROCKCHIP_SYSCON_PIPE_PHY2_GRF,
+	ROCKCHIP_SYSCON_VOP_GRF,
+	ROCKCHIP_SYSCON_VO_GRF,
 };
 
 /* Standard Rockchip clock numbers */
diff --git a/arch/arm/mach-rockchip/rk3588/syscon_rk3588.c b/arch/arm/mach-rockchip/rk3588/syscon_rk3588.c
index 91410b9e3e..442ab86053 100644
--- a/arch/arm/mach-rockchip/rk3588/syscon_rk3588.c
+++ b/arch/arm/mach-rockchip/rk3588/syscon_rk3588.c
@@ -11,6 +11,8 @@
 
 static const struct udevice_id rk3588_syscon_ids[] = {
 	{ .compatible = "rockchip,rk3588-sys-grf", .data = ROCKCHIP_SYSCON_GRF },
+	{ .compatible = "rockchip,rk3588-vop-grf", .data = ROCKCHIP_SYSCON_VOP_GRF },
+	{ .compatible = "rockchip,rk3588-vo-grf",  .data = ROCKCHIP_SYSCON_VO_GRF },
 	{ .compatible = "rockchip,pcie30-phy-grf", .data = ROCKCHIP_SYSCON_PCIE30_PHY_GRF },
 	{ .compatible = "rockchip,rk3588-php-grf", .data = ROCKCHIP_SYSCON_PHP_GRF },
 	{ .compatible = "rockchip,pipe-phy-grf",   .data = ROCKCHIP_SYSCON_PIPE_PHY0_GRF },

commit 6295402c6cbab93632134ec3700b38b1a170a8f0
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Oct 20 10:19:53 2021 +0000

    rockchip: rk3308: early fixup kernel fdt
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I96115de0ee7545daf223e2c889c0de7b3ce02f4a

diff --git a/arch/arm/mach-rockchip/rk3308/rk3308.c b/arch/arm/mach-rockchip/rk3308/rk3308.c
index 4dfc7460db..290a4b580c 100644
--- a/arch/arm/mach-rockchip/rk3308/rk3308.c
+++ b/arch/arm/mach-rockchip/rk3308/rk3308.c
@@ -544,3 +544,11 @@ int rk_board_fdt_fixup(const void *blob)
 
 	return 0;
 }
+
+int rk_board_early_fdt_fixup(const void *blob)
+{
+	rk_board_fdt_fixup(blob);
+
+	return 0;
+}
+

commit e3f2a979ebc4d252a12c7824a648bde0727657c5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 15 06:44:56 2021 +0000

    rockchip: rkimg: add rk_board_early_fdt_fixup()
    
    In order to fixup kernel fdt immediately after read.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Idba6a9b3fad512f602808e9c5f15a68f3ac28518

diff --git a/arch/arm/mach-rockchip/boot_rkimg.c b/arch/arm/mach-rockchip/boot_rkimg.c
index 7af3a3c749..fb44f88143 100644
--- a/arch/arm/mach-rockchip/boot_rkimg.c
+++ b/arch/arm/mach-rockchip/boot_rkimg.c
@@ -37,6 +37,11 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+__weak int rk_board_early_fdt_fixup(void *blob)
+{
+	return 0;
+}
+
 static void boot_devtype_init(void)
 {
 	const char *devtype_num_set = "run rkimg_bootdev";
@@ -578,6 +583,8 @@ int rockchip_read_dtb_file(void *fdt_addr)
 			       CONFIG_SYS_FDT_PAD))
 		return -ENOMEM;
 
+	rk_board_early_fdt_fixup(fdt_addr);
+
 #if defined(CONFIG_ANDROID_BOOT_IMAGE) && defined(CONFIG_OF_LIBFDT_OVERLAY)
 	android_fdt_overlay_apply((void *)fdt_addr);
 #endif

commit 9b8bd39966d6de9764274bde8b13a3e9e2d0e0c8
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed Dec 15 09:59:44 2021 +0800

    drivers: rkflash: Fix XM25QH64C
    
    Change-Id: I5dfb96b38261c750f7bee31b3bdb5f7e7a797868
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/sfc_nor.c b/drivers/rkflash/sfc_nor.c
index 713ce69f26..dbef45a0e2 100644
--- a/drivers/rkflash/sfc_nor.c
+++ b/drivers/rkflash/sfc_nor.c
@@ -78,7 +78,7 @@ static struct flash_info spi_flash_tbl[] = {
 	/* XM25QH32C */
 	{ 0x204016, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 13, 9, 0 },
 	/* XM25QH64C */
-	{ 0x204017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 14, 6, 0 },
+	{ 0x204017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0 },
 	/* XM25QH128C */
 	{ 0x204018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 15, 6, 0 },
 	/* XM25QH256C */

commit 9fc85156114bf374ddc561dded483f42488ae6bf
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue Dec 14 15:14:44 2021 +0800

    rockchip: rk3588: Fix fspi io ds level to 55ohm
    
    This value is the best for FSPI signal test.
    
    Change-Id: I7b9331a45bc81726f8ecf6311f5dbdb55c5034cb
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3588/rk3588.c b/arch/arm/mach-rockchip/rk3588/rk3588.c
index 08c13b1d7e..86f866cf9d 100644
--- a/arch/arm/mach-rockchip/rk3588/rk3588.c
+++ b/arch/arm/mach-rockchip/rk3588/rk3588.c
@@ -14,26 +14,47 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #include <asm/armv8/mmu.h>
 
-#define FIREWALL_DDR_BASE	0xfe030000
-#define FW_DDR_MST5_REG		0x54
-#define FW_DDR_MST13_REG	0x74
-#define FW_DDR_MST21_REG	0x94
-#define FW_DDR_MST26_REG	0xa8
-#define FW_DDR_MST27_REG	0xac
-#define FIREWALL_SYSMEM_BASE	0xfe038000
-#define FW_SYSM_MST5_REG	0x54
-#define FW_SYSM_MST13_REG	0x74
-#define FW_SYSM_MST21_REG	0x94
-#define FW_SYSM_MST26_REG	0xa8
-#define FW_SYSM_MST27_REG	0xac
-#define SYS_GRF_BASE		0xfd58c000
-#define SYS_GRF_SOC_CON6	0x0318
-#define USBGRF_BASE		0xfd5ac000
-#define USB_GRF_USB3OTG0_CON1	0x001c
-#define BUS_SGRF_BASE		0xfd586000
-#define BUS_SGRF_FIREWALL_CON18	0x288
-#define PMU_BASE		0xfd8d0000
-#define PMU_PWR_GATE_SFTCON1	0x8150
+#define FIREWALL_DDR_BASE		0xfe030000
+#define FW_DDR_MST5_REG			0x54
+#define FW_DDR_MST13_REG		0x74
+#define FW_DDR_MST21_REG		0x94
+#define FW_DDR_MST26_REG		0xa8
+#define FW_DDR_MST27_REG		0xac
+#define FIREWALL_SYSMEM_BASE		0xfe038000
+#define FW_SYSM_MST5_REG		0x54
+#define FW_SYSM_MST13_REG		0x74
+#define FW_SYSM_MST21_REG		0x94
+#define FW_SYSM_MST26_REG		0xa8
+#define FW_SYSM_MST27_REG		0xac
+#define SYS_GRF_BASE			0xfd58c000
+#define SYS_GRF_SOC_CON6		0x0318
+#define USBGRF_BASE			0xfd5ac000
+#define USB_GRF_USB3OTG0_CON1		0x001c
+#define BUS_SGRF_BASE			0xfd586000
+#define BUS_SGRF_FIREWALL_CON18		0x288
+#define PMU_BASE			0xfd8d0000
+#define PMU_PWR_GATE_SFTCON1		0x8150
+
+#define PMU1_IOC_BASE			0xfd5f0000
+#define PMU2_IOC_BASE			0xfd5f4000
+
+#define BUS_IOC_BASE			0xfd5f8000
+#define BUS_IOC_GPIO2B_IOMUX_SEL_L	0x48
+#define BUS_IOC_GPIO2D_IOMUX_SEL_L	0x58
+#define BUS_IOC_GPIO3A_IOMUX_SEL_L	0x60
+
+#define VCCIO3_5_IOC_BASE		0xfd5fa000
+#define IOC_VCCIO3_5_GPIO2A_DS_H	0x44
+#define IOC_VCCIO3_5_GPIO2B_DS_L	0x48
+#define IOC_VCCIO3_5_GPIO2B_DS_H	0x4c
+#define IOC_VCCIO3_5_GPIO3A_DS_L	0x60
+#define IOC_VCCIO3_5_GPIO3A_DS_H	0x64
+#define IOC_VCCIO3_5_GPIO3C_DS_H	0x74
+
+#define EMMC_IOC_BASE			0xfd5fd000
+#define EMMC_IOC_GPIO2A_DS_L		0x40
+#define EMMC_IOC_GPIO2D_DS_L		0x58
+#define EMMC_IOC_GPIO2D_DS_H		0x5c
 
 static struct mm_region rk3588_mem_map[] = {
 	{
@@ -393,10 +414,6 @@ enum {
 	GPIO4D5_UART5_TX_M0	= 10,
 };
 
-#define PMU1_IOC_BASE	0xfd5f0000
-#define PMU2_IOC_BASE	0xfd5f4000
-#define BUS_IOC_BASE	0xfd5f8000
-
 void board_debug_uart_init(void)
 {
 /* UART 0 */
@@ -804,6 +821,20 @@ int arch_cpu_init(void)
 
 	/* Select clk_tx source as default for i2s2/i2s3 */
 	writel(0x03400340, SYS_GRF_BASE + SYS_GRF_SOC_CON6);
+
+	if (readl(BUS_IOC_BASE + BUS_IOC_GPIO2D_IOMUX_SEL_L) == 0x2222) {
+		writel(0x00070002, EMMC_IOC_BASE + EMMC_IOC_GPIO2A_DS_L);
+		writel(0x77772222, EMMC_IOC_BASE + EMMC_IOC_GPIO2D_DS_L);
+		writel(0x07000200, EMMC_IOC_BASE + EMMC_IOC_GPIO2D_DS_H);
+	} else if ((readl(BUS_IOC_BASE + BUS_IOC_GPIO2B_IOMUX_SEL_L) & 0xf0ff) == 0x3033) {
+		writel(0x33002200, VCCIO3_5_IOC_BASE + IOC_VCCIO3_5_GPIO2A_DS_H);
+		writel(0x30332022, VCCIO3_5_IOC_BASE + IOC_VCCIO3_5_GPIO2B_DS_L);
+		writel(0x00030002, VCCIO3_5_IOC_BASE + IOC_VCCIO3_5_GPIO2B_DS_H);
+	} else if (readl(BUS_IOC_BASE + BUS_IOC_GPIO3A_IOMUX_SEL_L) == 0x5555) {
+		writel(0x77772222, VCCIO3_5_IOC_BASE + IOC_VCCIO3_5_GPIO3A_DS_L);
+		writel(0x00700020, VCCIO3_5_IOC_BASE + IOC_VCCIO3_5_GPIO3A_DS_H);
+		writel(0x00070002, VCCIO3_5_IOC_BASE + IOC_VCCIO3_5_GPIO3C_DS_H);
+	}
 #endif
 	/* Select usb otg0 phy status to 0 that make rockusb can work at high-speed */
 	writel(0x00080008, USBGRF_BASE + USB_GRF_USB3OTG0_CON1);

commit fde4d5d26f06957e3c7e6f87b55d25b3f378523e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 18 12:19:05 2021 +0000

    misc: decompress: correct error code as -ETIMEDOUT
    
    -ETIMEDOUT is better for timeout wait failure.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I1c625491b6552f1a57ac7e221aeb4dc1fb1b73de

diff --git a/drivers/misc/misc_decompress.c b/drivers/misc/misc_decompress.c
index 2c6efcb4bc..f1817f9ef8 100644
--- a/drivers/misc/misc_decompress.c
+++ b/drivers/misc/misc_decompress.c
@@ -173,7 +173,7 @@ static int misc_decompress_finish(struct udevice *dev, u32 comp)
 
 	while (!misc_decompress_is_complete(dev)) {
 		if (timeout < 0)
-			return -EIO;
+			return -ETIMEDOUT;
 		timeout--;
 		udelay(10);
 	}

commit f07e1686b88062b32d38b5b1b7bfd4685ae29a67
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Wed Dec 1 15:28:08 2021 +0800

    lib: optee_clientApi: set flag to zero if not enable vboot
    
    Change-Id: Ic8a53227f104531a8da38320775e5911fa373c2a
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index 2685b74a6b..fcc791766c 100644
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -541,6 +541,8 @@ uint32_t trusty_read_vbootkey_enable_flag(uint8_t *flag)
 	uint32_t bootflag;
 	TEEC_Result TeecResult;
 
+	*flag = 0;
+
 	TeecResult = trusty_base_efuse_or_otp_operation(STORAGE_CMD_READ_ENABLE_FLAG,
 							false, &bootflag, 1);
 

commit 45d70d47bf6f9724f83cfda5b0c2eac409dcaf43
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Dec 8 19:59:21 2021 +0800

    configs: rk3588: enable gmac support
    
    Change-Id: I22093d93e69ab8bc64126938d722068a81c0b2a8
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/configs/rk3588_defconfig b/configs/rk3588_defconfig
index 6c95a68609..78a9f80dae 100644
--- a/configs/rk3588_defconfig
+++ b/configs/rk3588_defconfig
@@ -70,6 +70,9 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_TFTP_BOOTM=y
+CONFIG_CMD_TFTP_FLASH=y
 # CONFIG_CMD_MISC is not set
 CONFIG_CMD_MTD_BLK=y
 # CONFIG_SPL_DOS_PARTITION is not set
@@ -130,6 +133,10 @@ CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SPI_FLASH_XMC=y
 CONFIG_SPI_FLASH_XTX=y
 CONFIG_SPI_FLASH_MTD=y
+CONFIG_DM_ETH=y
+CONFIG_DM_ETH_PHY=y
+CONFIG_DWC_ETH_QOS=y
+CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y

commit a116113dcd78d29eee847334543457a59cd9e95c
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Dec 14 16:12:38 2021 +0800

    net: rockchip: Fix rgmii 100M link setting for rk3588
    
    Change-Id: I3d89662226345b98dbad448f7d94e10b14c8daf5
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/net/gmac_rockchip.c b/drivers/net/gmac_rockchip.c
index 5b20c83d9d..fa6a650f30 100644
--- a/drivers/net/gmac_rockchip.c
+++ b/drivers/net/gmac_rockchip.c
@@ -515,7 +515,7 @@ static int rk3588_set_rgmii_speed(struct gmac_rockchip_platdata *pdata,
 		RK3588_GMAC_CLK_RGMII_DIV_SHIFT = 2,
 		RK3588_GMAC_CLK_RGMII_DIV_MASK = GENMASK(3, 2),
 		RK3588_GMAC_CLK_RGMII_DIV1 = 0,
-		RK3588_GMAC_CLK_RGMII_DIV5 = BIT(2),
+		RK3588_GMAC_CLK_RGMII_DIV5 = GENMASK(3, 2),
 		RK3588_GMAC_CLK_RGMII_DIV50 = BIT(3),
 		RK3588_GMA_CLK_RMII_DIV2 = BIT(2),
 		RK3588_GMAC_CLK_RMII_DIV20 = 0,

commit 0c546838bd7a5148cbfbb81016392b0eb42b7c55
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Dec 10 07:37:46 2021 +0000

    common: android: support soft sha1 verify for image
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ib61924b8f5c4e55320a370c7f7ed9a95a9588627

diff --git a/common/image-android.c b/common/image-android.c
index 96eb0c32c0..acd5a536b7 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -310,7 +310,7 @@ int android_image_get_fdt(const struct andr_img_hdr *hdr,
 	return 0;
 }
 
-#if defined(CONFIG_DM_CRYPTO) && defined(CONFIG_ANDROID_BOOT_IMAGE_HASH)
+#ifdef CONFIG_ANDROID_BOOT_IMAGE_HASH
 static void print_hash(const char *label, u8 *hash, int len)
 {
 	int i;
@@ -334,6 +334,10 @@ typedef enum {
 	IMG_MAX,
 } img_t;
 
+#if defined(CONFIG_ANDROID_BOOT_IMAGE_HASH) && !defined(CONFIG_DM_CRYPTO)
+static sha1_context sha1_ctx;
+#endif
+
 static int image_load(img_t img, struct andr_img_hdr *hdr,
 		      ulong blkstart, void *ram_base,
 		      struct udevice *crypto)
@@ -528,17 +532,20 @@ static int image_load(img_t img, struct andr_img_hdr *hdr,
 		memmove((char *)memmove_dst, buffer, length);
 
 crypto_calc:
+	if (img == IMG_KERNEL) {
+		buffer += pgsz;
+		length -= pgsz;
+	}
+
 	/* sha1 */
+#ifdef CONFIG_ANDROID_BOOT_IMAGE_HASH
 #ifdef CONFIG_DM_CRYPTO
-	if (crypto) {
-		if (img == IMG_KERNEL) {
-			buffer += pgsz;
-			length -= pgsz;
-		}
-
-		crypto_sha_update(crypto, (u32 *)buffer, length);
-		crypto_sha_update(crypto, (u32 *)&length, typesz);
-	}
+	crypto_sha_update(crypto, (u32 *)buffer, length);
+	crypto_sha_update(crypto, (u32 *)&length, typesz);
+#else
+	sha1_update(&sha1_ctx, (void *)buffer, length);
+	sha1_update(&sha1_ctx, (void *)&length, typesz);
+#endif
 #endif
 
 	return 0;
@@ -596,11 +603,12 @@ static int android_image_separate(struct andr_img_hdr *hdr,
 	if (image_load(IMG_RK_DTB, hdr, bstart, ram_base, NULL))
 		return -1;
 
-#if defined(CONFIG_DM_CRYPTO) && defined(CONFIG_ANDROID_BOOT_IMAGE_HASH)
+#ifdef CONFIG_ANDROID_BOOT_IMAGE_HASH
 	if (hdr->header_version < 3) {
-		struct udevice *dev;
-		sha_context ctx;
+		struct udevice *dev = NULL;
 		uchar hash[20];
+#ifdef CONFIG_DM_CRYPTO
+		sha_context ctx;
 
 		ctx.length = 0;
 		ctx.algo = CRYPTO_SHA1;
@@ -619,13 +627,19 @@ static int android_image_separate(struct andr_img_hdr *hdr,
 						sizeof(hdr->recovery_dtbo_size);
 		if (hdr->header_version > 1)
 			ctx.length += hdr->dtb_size + sizeof(hdr->dtb_size);
-
 		crypto_sha_init(dev, &ctx);
+#else
+		sha1_starts(&sha1_ctx);
+#endif
 		ret = images_load_verify(hdr, bstart, ram_base, dev);
 		if (ret)
 			return ret;
-		crypto_sha_final(dev, &ctx, hash);
 
+#ifdef CONFIG_DM_CRYPTO
+		crypto_sha_final(dev, &ctx, hash);
+#else
+		sha1_finish(&sha1_ctx, hash);
+#endif
 		if (memcmp(hash, hdr->id, 20)) {
 			print_hash("Hash from header", (u8 *)hdr->id, 20);
 			print_hash("Hash real", (u8 *)hash, 20);

commit 9b1b7db2c6668c9dbead18bbfc6eb99c656713eb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 14 11:20:08 2021 +0000

    Revert "rockchip: fit misc: print msg once"
    
    This reverts commit 460c790ea66d9f2131be7c4d9ab4796b71fc254c.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I6b6301267ea5afd6798b09a56a2e5352a1583d46

diff --git a/arch/arm/mach-rockchip/fit_misc.c b/arch/arm/mach-rockchip/fit_misc.c
index c08b70c536..54e995b5d9 100644
--- a/arch/arm/mach-rockchip/fit_misc.c
+++ b/arch/arm/mach-rockchip/fit_misc.c
@@ -186,7 +186,6 @@ int fit_rollback_index_verify(const void *fit, uint32_t rollback_fd,
  */
 int fit_board_verify_required_sigs(void)
 {
-	static int showed = 0;
 	uint8_t vboot = 0;
 
 #ifdef CONFIG_SPL_BUILD
@@ -216,10 +215,7 @@ int fit_board_verify_required_sigs(void)
 #endif
 #endif /* CONFIG_SPL_BUILD*/
 
-	if (!showed) {
-		printf("## Verified-boot: %d\n", vboot);
-		showed = 1;
-	}
+	printf("## Verified-boot: %d\n", vboot);
 
 	return vboot;
 }

commit 998fbff641a7c7f212c3781764c1649132ca1f6d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 14 08:55:01 2021 +0000

    include: global_data: fix compile error
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I7d9bd5ef3d2217b6993ce873d66384fa0a0e281e

diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index c6875a02f5..fa1e7f919d 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -88,12 +88,10 @@ typedef struct global_data {
 	unsigned long fdt_size;		/* Space reserved for relocated FDT */
 #ifdef CONFIG_OF_LIVE
 	struct device_node *of_root;
-#ifdef CONFIG_USING_KERNEL_DTB
-	const void *ufdt_blob;		/* Our U-Boot device tree, NULL if none */
-	const void *fdt_blob_kern;	/* Kernel dtb at the tail of u-boot.bin */
 	struct device_node *of_root_f;  /* U-Boot of-root instance */
 #endif
-#endif
+	const void *ufdt_blob;		/* Our U-Boot device tree, NULL if none */
+	const void *fdt_blob_kern;	/* Kernel dtb at the tail of u-boot.bin */
 	struct jt_funcs *jt;		/* jump table */
 	char env_buf[32];		/* buffer for env_get() before reloc. */
 #ifdef CONFIG_TRACE

commit bc8b6c9dba3c534a50765f515ca77ed43822f088
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 1 01:26:44 2021 +0000

    configs: rk3588: enable more modules
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If8bc14402c4aaf3b95f2a03077fa802e2b414a2a

diff --git a/configs/rk3588_defconfig b/configs/rk3588_defconfig
index 6e3a09a3dc..6c95a68609 100644
--- a/configs/rk3588_defconfig
+++ b/configs/rk3588_defconfig
@@ -1,29 +1,36 @@
 CONFIG_ARM=y
 CONFIG_ARM_CPU_SUSPEND=y
 CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x80000
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.sh"
 CONFIG_ROCKCHIP_RK3588=y
 CONFIG_ROCKCHIP_FIT_IMAGE=y
+CONFIG_ROCKCHIP_HWID_DTB=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_USING_KERNEL_DTB_V2=y
 CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y
+CONFIG_ROCKCHIP_NEW_IDB=y
 CONFIG_LOADER_INI="RK3588MINIALL.ini"
 CONFIG_TRUST_INI="RK3588TRUST.ini"
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_TARGET_EVB_RK3588=y
 CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3588-evb"
 CONFIG_DEBUG_UART=y
-CONFIG_ANDROID_BOOT_IMAGE=y
 CONFIG_FIT=y
 CONFIG_FIT_IMAGE_POST_PROCESS=y
+CONFIG_FIT_HW_CRYPTO=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
+CONFIG_SPL_FIT_HW_CRYPTO=y
 # CONFIG_SPL_SYS_DCACHE_OFF is not set
-CONFIG_BOOTDELAY=5
+CONFIG_BOOTDELAY=0
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
@@ -36,8 +43,12 @@ CONFIG_SPL_SEPARATE_BSS=y
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x1
 CONFIG_SPL_MMC_WRITE=y
+CONFIG_SPL_MTD_SUPPORT=y
 CONFIG_SPL_ATF=y
-# CONFIG_FASTBOOT is not set
+CONFIG_FASTBOOT_BUF_ADDR=0xc00800
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_DTIMG=y
 # CONFIG_CMD_ELF is not set
@@ -53,15 +64,19 @@ CONFIG_CMD_GPT=y
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_MISC is not set
+CONFIG_CMD_MTD_BLK=y
 # CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_ISO_PARTITION is not set
 CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_SPL_OF_CONTROL=y
+CONFIG_SPL_DTB_MINIMUM=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 # CONFIG_NET_TFTP_VARS is not set
@@ -69,20 +84,62 @@ CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_SPL_SYSCON=y
+# CONFIG_SARADC_ROCKCHIP is not set
+CONFIG_SARADC_ROCKCHIP_V2=y
 CONFIG_CLK=y
 CONFIG_SPL_CLK=y
+CONFIG_CLK_SCMI=y
+CONFIG_SPL_CLK_SCMI=y
+CONFIG_DM_CRYPTO=y
+CONFIG_SPL_DM_CRYPTO=y
+CONFIG_ROCKCHIP_CRYPTO_V2=y
+CONFIG_SPL_ROCKCHIP_CRYPTO_V2=y
+CONFIG_DM_RNG=y
+CONFIG_RNG_ROCKCHIP=y
 CONFIG_SCMI_FIRMWARE=y
+CONFIG_SPL_SCMI_FIRMWARE=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_ROCKCHIP_GPIO_V2=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_ADC_KEY=y
 CONFIG_MISC=y
 CONFIG_SPL_MISC=y
+CONFIG_MISC_DECOMPRESS=y
+CONFIG_SPL_MISC_DECOMPRESS=y
+CONFIG_ROCKCHIP_HW_DECOMPRESS=y
+CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS=y
+CONFIG_SPL_ROCKCHIP_SECURE_OTP=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_SDMA=y
 CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_MTD=y
+CONFIG_MTD_BLK=y
+CONFIG_MTD_DEVICE=y
+CONFIG_NAND=y
+CONFIG_MTD_SPI_NAND=y
+CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=80000000
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPI_FLASH_XMC=y
+CONFIG_SPI_FLASH_XTX=y
+CONFIG_SPI_FLASH_MTD=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_SPI_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_REGULATOR_RK860X=y
+CONFIG_REGULATOR_RK806=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
@@ -95,6 +152,8 @@ CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFEB50000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_ROCKCHIP_SPI=y
+CONFIG_ROCKCHIP_SFC=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
@@ -115,7 +174,12 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_LIB_RAND=y
 CONFIG_SPL_TINY_MEMSET=y
-CONFIG_SHA512=y
+CONFIG_RSA=y
+CONFIG_SPL_RSA=y
+CONFIG_RSA_N_SIZE=0x200
+CONFIG_RSA_E_SIZE=0x10
+CONFIG_RSA_C_SIZE=0x20
+CONFIG_LZ4=y
 CONFIG_ERRNO_STR=y
 # CONFIG_EFI_LOADER is not set
 CONFIG_AVB_LIBAVB=y
@@ -123,3 +187,6 @@ CONFIG_AVB_LIBAVB_AB=y
 CONFIG_AVB_LIBAVB_ATX=y
 CONFIG_AVB_LIBAVB_USER=y
 CONFIG_RK_AVB_LIBAVB_USER=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V2=y
+CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y

commit 2322cbe14d29788ce56a8432b551243a334e8738
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Tue Dec 14 11:48:01 2021 +0800

    phy: rockchip: inno-usb2: fix charger detection for rk3588
    
    Fixing the charger detection fail on DCD stage and the wrong opmode
    configured previously for RK3588 SoCs.
    
    Change-Id: I84d21a15b3b45130250dfd3b6469177f05e4bff4
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index 8cad232455..204ff1cae1 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -1257,7 +1257,7 @@ static const struct rockchip_usb2phy_cfg rk3588_phy_cfgs[] = {
 		.clkout_ctl	= { 0x0000, 0, 0, 1, 0 },
 		.port_cfgs	= {
 			[USB2PHY_PORT_OTG] = {
-				.phy_sus	= { 0x000c, 11, 11, 0, 0 },
+				.phy_sus	= { 0x000c, 11, 11, 0, 1 },
 				.ls_det_en	= { 0x0080, 0, 0, 0, 1 },
 				.ls_det_st	= { 0x0084, 0, 0, 0, 1 },
 				.ls_det_clr	= { 0x0088, 0, 0, 0, 1 },
@@ -1265,10 +1265,10 @@ static const struct rockchip_usb2phy_cfg rk3588_phy_cfgs[] = {
 			}
 		},
 		.chg_det = {
-			.opmode		= { 0x0008, 2, 2, 0, 1 },
+			.opmode		= { 0x0008, 2, 2, 1, 0 },
 			.cp_det		= { 0x00c0, 0, 0, 0, 1 },
 			.dcp_det	= { 0x00c0, 0, 0, 0, 1 },
-			.dp_det		= { 0x00c0, 1, 1, 0, 1 },
+			.dp_det		= { 0x00c0, 1, 1, 1, 0 },
 			.idm_sink_en	= { 0x0008, 5, 5, 1, 0 },
 			.idp_sink_en	= { 0x0008, 5, 5, 0, 1 },
 			.idp_src_en	= { 0x0008, 14, 14, 0, 1 },

commit bf0e94d0ef2f74eeab2fe14837f96e5a887896a6
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Dec 8 19:57:22 2021 +0800

    net: gmac_rockchip: Add rk3588 gmac support
    
    Change-Id: I77705b92900b0785f8301d1e851d9bd57a39e1a7
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/net/gmac_rockchip.c b/drivers/net/gmac_rockchip.c
index dce6fad304..5b20c83d9d 100644
--- a/drivers/net/gmac_rockchip.c
+++ b/drivers/net/gmac_rockchip.c
@@ -18,6 +18,7 @@
 #include <asm/arch/hardware.h>
 #ifdef CONFIG_DWC_ETH_QOS
 #include <asm/arch/grf_rk3568.h>
+#include <asm/arch/grf_rk3588.h>
 #include <asm/arch/grf_rv1126.h>
 #include "dwc_eth_qos.h"
 #else
@@ -75,6 +76,7 @@ struct rk_gmac_ops {
 			     struct rockchip_eth_dev *dev);
 	void (*set_to_rmii)(struct gmac_rockchip_platdata *pdata);
 	void (*set_to_rgmii)(struct gmac_rockchip_platdata *pdata);
+	void (*set_clock_selection)(struct gmac_rockchip_platdata *pdata);
 	void (*integrated_phy_powerup)(struct gmac_rockchip_platdata *pdata);
 };
 
@@ -502,6 +504,59 @@ static int rv1108_set_rmii_speed(struct gmac_rockchip_platdata *pdata,
 	return 0;
 }
 #else
+static int rk3588_set_rgmii_speed(struct gmac_rockchip_platdata *pdata,
+				  struct rockchip_eth_dev *dev)
+{
+	struct eqos_priv *priv = &dev->eqos;
+	struct rk3588_php_grf *php_grf;
+	unsigned int div, div_mask;
+
+	enum {
+		RK3588_GMAC_CLK_RGMII_DIV_SHIFT = 2,
+		RK3588_GMAC_CLK_RGMII_DIV_MASK = GENMASK(3, 2),
+		RK3588_GMAC_CLK_RGMII_DIV1 = 0,
+		RK3588_GMAC_CLK_RGMII_DIV5 = BIT(2),
+		RK3588_GMAC_CLK_RGMII_DIV50 = BIT(3),
+		RK3588_GMA_CLK_RMII_DIV2 = BIT(2),
+		RK3588_GMAC_CLK_RMII_DIV20 = 0,
+	};
+
+	php_grf = syscon_get_first_range(ROCKCHIP_SYSCON_PHP_GRF);
+
+	switch (priv->phy->speed) {
+	case 10:
+		if (pdata->phy_interface == PHY_INTERFACE_MODE_RMII)
+			div = RK3588_GMAC_CLK_RMII_DIV20;
+		else
+			div = RK3588_GMAC_CLK_RGMII_DIV50;
+		break;
+	case 100:
+		if (pdata->phy_interface == PHY_INTERFACE_MODE_RMII)
+			div = RK3588_GMA_CLK_RMII_DIV2;
+		else
+			div = RK3588_GMAC_CLK_RGMII_DIV5;
+		break;
+	case 1000:
+		if (pdata->phy_interface != PHY_INTERFACE_MODE_RMII)
+			div = RK3588_GMAC_CLK_RGMII_DIV1;
+		else
+			return -EINVAL;
+		break;
+	default:
+		debug("Unknown phy speed: %d\n", priv->phy->speed);
+		return -EINVAL;
+	}
+
+	if (pdata->bus_id == 1) {
+		div <<= 5;
+		div_mask = RK3588_GMAC_CLK_RGMII_DIV_MASK << 5;
+	}
+
+	rk_clrsetreg(&php_grf->clk_con1, div_mask, div);
+
+	return 0;
+}
+
 static int rv1126_set_rgmii_speed(struct gmac_rockchip_platdata *pdata,
 				  struct rockchip_eth_dev *dev)
 {
@@ -1034,6 +1089,125 @@ static void rk3568_set_to_rgmii(struct gmac_rockchip_platdata *pdata)
 		     RK3568_GMAC_PHY_INTF_SEL_RGMII);
 }
 
+static void rk3588_set_to_rmii(struct gmac_rockchip_platdata *pdata)
+{
+	unsigned int intf_sel, intf_sel_mask;
+	unsigned int clk_mode, clk_mode_mask;
+	struct rk3588_php_grf *php_grf;
+
+	enum {
+		RK3588_GMAC_PHY_INTF_SEL_SHIFT = 3,
+		RK3588_GMAC_PHY_INTF_SEL_MASK = GENMASK(5, 3),
+		RK3588_GMAC_PHY_INTF_SEL_RMII = BIT(5),
+	};
+
+	enum {
+		RK3588_GMAC_CLK_RMII_MODE_SHIFT = 0x0,
+		RK3588_GMAC_CLK_RMII_MODE_MASK = BIT(0),
+		RK3588_GMAC_CLK_RMII_MODE = 0x1,
+	};
+
+	php_grf = syscon_get_first_range(ROCKCHIP_SYSCON_PHP_GRF);
+
+	if (pdata->bus_id == 1) {
+		intf_sel = RK3588_GMAC_PHY_INTF_SEL_RMII << 6;
+		intf_sel_mask = RK3588_GMAC_PHY_INTF_SEL_MASK << 6;
+		clk_mode = RK3588_GMAC_CLK_RMII_MODE << 5;
+		clk_mode_mask = RK3588_GMAC_CLK_RMII_MODE_MASK << 5;
+	} else {
+		intf_sel = RK3588_GMAC_PHY_INTF_SEL_RMII;
+		intf_sel_mask = RK3588_GMAC_PHY_INTF_SEL_MASK;
+		clk_mode = RK3588_GMAC_CLK_RMII_MODE;
+		clk_mode_mask = RK3588_GMAC_CLK_RMII_MODE_MASK;
+	}
+
+	rk_clrsetreg(&php_grf->gmac_con0, intf_sel_mask, intf_sel);
+	rk_clrsetreg(&php_grf->clk_con1, clk_mode_mask, clk_mode);
+}
+
+static void rk3588_set_to_rgmii(struct gmac_rockchip_platdata *pdata)
+{
+	unsigned int rx_enable, rx_enable_mask, tx_enable, tx_enable_mask;
+	unsigned int intf_sel, intf_sel_mask;
+	unsigned int clk_mode, clk_mode_mask;
+	unsigned int rx_delay;
+	struct rk3588_php_grf *php_grf;
+	struct rk3588_sys_grf *grf;
+	void *offset_con;
+
+	enum {
+		RK3588_GMAC_PHY_INTF_SEL_SHIFT = 3,
+		RK3588_GMAC_PHY_INTF_SEL_MASK = GENMASK(5, 3),
+		RK3588_GMAC_PHY_INTF_SEL_RGMII = BIT(3),
+
+		RK3588_RXCLK_DLY_ENA_GMAC_MASK = BIT(3),
+		RK3588_RXCLK_DLY_ENA_GMAC_DISABLE = 0,
+		RK3588_RXCLK_DLY_ENA_GMAC_ENABLE = BIT(3),
+
+		RK3588_TXCLK_DLY_ENA_GMAC_MASK = BIT(2),
+		RK3588_TXCLK_DLY_ENA_GMAC_DISABLE = 0,
+		RK3588_TXCLK_DLY_ENA_GMAC_ENABLE = BIT(2),
+	};
+
+	enum {
+		RK3588_CLK_RX_DL_CFG_GMAC_SHIFT = 0x8,
+		RK3588_CLK_RX_DL_CFG_GMAC_MASK = GENMASK(15, 8),
+
+		RK3588_CLK_TX_DL_CFG_GMAC_SHIFT = 0x0,
+		RK3588_CLK_TX_DL_CFG_GMAC_MASK = GENMASK(7, 0),
+	};
+
+	enum {
+		RK3588_GMAC_CLK_RGMII_MODE_SHIFT = 0x0,
+		RK3588_GMAC_CLK_RGMII_MODE_MASK = BIT(0),
+		RK3588_GMAC_CLK_RGMII_MODE = 0x0,
+	};
+
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	php_grf = syscon_get_first_range(ROCKCHIP_SYSCON_PHP_GRF);
+
+	if (pdata->rx_delay < 0) {
+		rx_enable = RK3588_RXCLK_DLY_ENA_GMAC_DISABLE;
+		rx_delay = 0;
+	} else {
+		rx_enable = RK3588_RXCLK_DLY_ENA_GMAC_ENABLE;
+		rx_delay = pdata->rx_delay << RK3588_CLK_RX_DL_CFG_GMAC_SHIFT;
+	}
+
+	if (pdata->bus_id == 1) {
+		offset_con = &grf->soc_con9;
+		rx_enable = rx_delay << 2;
+		rx_enable_mask = RK3588_RXCLK_DLY_ENA_GMAC_MASK << 2;
+		tx_enable = RK3588_TXCLK_DLY_ENA_GMAC_ENABLE << 2;
+		tx_enable_mask = RK3588_TXCLK_DLY_ENA_GMAC_MASK << 2;
+		intf_sel = RK3588_GMAC_PHY_INTF_SEL_RGMII << 6;
+		intf_sel_mask = RK3588_GMAC_PHY_INTF_SEL_MASK << 6;
+		clk_mode = RK3588_GMAC_CLK_RGMII_MODE << 5;
+		clk_mode_mask = RK3588_GMAC_CLK_RGMII_MODE_MASK << 5;
+	} else {
+		offset_con = &grf->soc_con8;
+		rx_enable_mask = RK3588_RXCLK_DLY_ENA_GMAC_MASK;
+		tx_enable = RK3588_TXCLK_DLY_ENA_GMAC_ENABLE;
+		tx_enable_mask = RK3588_TXCLK_DLY_ENA_GMAC_MASK;
+		intf_sel = RK3588_GMAC_PHY_INTF_SEL_RGMII;
+		intf_sel_mask = RK3588_GMAC_PHY_INTF_SEL_MASK;
+		clk_mode = RK3588_GMAC_CLK_RGMII_MODE;
+		clk_mode_mask = RK3588_GMAC_CLK_RGMII_MODE_MASK;
+	}
+
+	rk_clrsetreg(offset_con,
+		     RK3588_CLK_TX_DL_CFG_GMAC_MASK |
+		     RK3588_CLK_RX_DL_CFG_GMAC_MASK,
+		     pdata->tx_delay << RK3588_CLK_TX_DL_CFG_GMAC_SHIFT |
+		     rx_delay);
+
+	rk_clrsetreg(&grf->soc_con7, tx_enable_mask | rx_enable_mask,
+		     tx_enable | rx_enable);
+
+	rk_clrsetreg(&php_grf->gmac_con0, intf_sel_mask, intf_sel);
+	rk_clrsetreg(&php_grf->clk_con1, clk_mode_mask, clk_mode);
+}
+
 static void rv1126_set_to_rmii(struct gmac_rockchip_platdata *pdata)
 {
 	struct rv1126_grf *grf;
@@ -1119,6 +1293,33 @@ static void rv1126_set_to_rgmii(struct gmac_rockchip_platdata *pdata)
 }
 #endif
 
+#ifdef CONFIG_DWC_ETH_QOS
+static void rk3588_set_clock_selection(struct gmac_rockchip_platdata *pdata)
+{
+	struct rk3588_php_grf *php_grf;
+	unsigned int val, mask;
+
+	enum {
+		RK3588_GMAC_CLK_SELET_SHIFT = 0x4,
+		RK3588_GMAC_CLK_SELET_MASK = BIT(4),
+		RK3588_GMAC_CLK_SELET_CRU = BIT(4),
+		RK3588_GMAC_CLK_SELET_IO = 0,
+	};
+
+	php_grf = syscon_get_first_range(ROCKCHIP_SYSCON_PHP_GRF);
+	val = pdata->clock_input ? RK3588_GMAC_CLK_SELET_IO :
+				   RK3588_GMAC_CLK_SELET_CRU;
+	mask = RK3588_GMAC_CLK_SELET_MASK;
+
+	if (pdata->bus_id == 1) {
+		val <<= 5;
+		mask <<= 5;
+	}
+
+	rk_clrsetreg(&php_grf->clk_con1, mask, val);
+}
+#endif
+
 static int gmac_rockchip_probe(struct udevice *dev)
 {
 	struct gmac_rockchip_platdata *pdata = dev_get_platdata(dev);
@@ -1155,11 +1356,15 @@ static int gmac_rockchip_probe(struct udevice *dev)
 
 	pdata->phy_interface = eth_pdata->phy_interface;
 
+	if (ops->set_clock_selection)
+		ops->set_clock_selection(pdata);
+
 	if (pdata->integrated_phy && ops->integrated_phy_powerup)
 		ops->integrated_phy_powerup(pdata);
 
 	switch (eth_pdata->phy_interface) {
 	case PHY_INTERFACE_MODE_RGMII:
+	case PHY_INTERFACE_MODE_RGMII_RXID:
 		/*
 		 * If the gmac clock is from internal pll, need to set and
 		 * check the return value for gmac clock at RGMII mode. If
@@ -1172,6 +1377,9 @@ static int gmac_rockchip_probe(struct udevice *dev)
 				return -EINVAL;
 		}
 
+		if (eth_pdata->phy_interface == PHY_INTERFACE_MODE_RGMII_RXID)
+			pdata->rx_delay = -1;
+
 		/* Set to RGMII mode */
 		if (ops->set_to_rgmii)
 			ops->set_to_rgmii(pdata);
@@ -1356,6 +1564,13 @@ const struct rk_gmac_ops rk3568_gmac_ops = {
 	.set_to_rmii = rk3568_set_to_rmii,
 };
 
+const struct rk_gmac_ops rk3588_gmac_ops = {
+	.fix_mac_speed = rk3588_set_rgmii_speed,
+	.set_to_rgmii = rk3588_set_to_rgmii,
+	.set_to_rmii = rk3588_set_to_rmii,
+	.set_clock_selection = rk3588_set_clock_selection,
+};
+
 const struct rk_gmac_ops rv1126_gmac_ops = {
 	.fix_mac_speed = rv1126_set_rgmii_speed,
 	.set_to_rgmii = rv1126_set_to_rgmii,
@@ -1415,6 +1630,11 @@ static const struct udevice_id rockchip_gmac_ids[] = {
 	  .data = (ulong)&rk3568_gmac_ops },
 #endif
 
+#ifdef CONFIG_ROCKCHIP_RK3588
+	{ .compatible = "rockchip,rk3588-gmac",
+	  .data = (ulong)&rk3588_gmac_ops },
+#endif
+
 #ifdef CONFIG_ROCKCHIP_RV1126
 	{ .compatible = "rockchip,rv1126-gmac",
 	  .data = (ulong)&rv1126_gmac_ops },

commit b3fe4c5765b7f7a9d9ec5cef76ba381d1fe311b9
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Dec 8 19:55:25 2021 +0800

    clk: rockchip: rk3588: Fix clk id for gmac 125M
    
    Change-Id: Ie7d530b502aa9d58b83048a0cefdd76e85a7236c
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3588.c b/drivers/clk/rockchip/clk_rk3588.c
index f75c5f55a6..0484a5d12c 100644
--- a/drivers/clk/rockchip/clk_rk3588.c
+++ b/drivers/clk/rockchip/clk_rk3588.c
@@ -1174,6 +1174,7 @@ static ulong rk3588_gmac_set_clk(struct rk3588_clk_priv *priv,
 			     CLK_GMAC1_PTP_SEL_CPLL << CLK_GMAC1_PTP_SEL_SHIFT |
 			     (div - 1) << CLK_GMAC1_PTP_DIV_SHIFT);
 		break;
+
 	case CLK_GMAC_125M:
 		rk_clrsetreg(&cru->clksel_con[83],
 			     CLK_GMAC_125M_DIV_MASK | CLK_GMAC_125M_SEL_MASK,
@@ -1666,7 +1667,7 @@ static ulong rk3588_clk_set_rate(struct clk *clk, ulong rate)
 	case CLK_GMAC1_PTP_REF:
 	case CLK_GMAC_125M:
 	case CLK_GMAC_50M:
-		ret = rk3588_gmac_set_clk(priv, 0, rate);
+		ret = rk3588_gmac_set_clk(priv, clk->id, rate);
 		break;
 	case SCLK_UART1:
 	case SCLK_UART2:

commit 66fe7ee310c971407144aad92afc4abc961664d2
Author: shengfei Xu <xsf@rock-chips.com>
Date:   Mon Dec 13 03:33:10 2021 +0000

    regulator: rk806: fix the pldo register offset error
    
    Signed-off-by: shengfei Xu <xsf@rock-chips.com>
    Change-Id: I0ffa04eda4aeb16829acf0328d021321e4b25030

diff --git a/drivers/power/regulator/rk806.c b/drivers/power/regulator/rk806.c
index 7212e02a46..57d4360a22 100644
--- a/drivers/power/regulator/rk806.c
+++ b/drivers/power/regulator/rk806.c
@@ -51,6 +51,10 @@
 #define RK806_RAMP_RATE_1LSB_PER_13CLK	0x06/* LDO 1.9mV/uS buck 961mV/us */
 #define RK806_RAMP_RATE_1LSB_PER_32CLK	0x07/* LDO 0.78mV/uS buck 0.39mV/us */
 
+#define RK806_PLDO0_2_MSK(pldo)		(BIT(pldo + 5))
+#define RK806_PLDO0_2_SET(pldo)		(BIT(pldo + 1) | RK806_PLDO0_2_MSK(pldo))
+#define RK806_PLDO0_2_CLR(pldo)		RK806_PLDO0_2_MSK(pldo)
+
 struct rk8xx_reg_info {
 	uint min_uv;
 	uint step_uv;
@@ -385,7 +389,7 @@ static int _ldo_get_enable(struct udevice *pmic, int ldo)
 			ret = pmic_reg_read(pmic, RK806_NLDO_EN(ldo / 4));
 		} else {
 			mask = 1 << 2;
-			 ret = pmic_reg_read(pmic, RK806_NLDO_EN(2));
+			ret = pmic_reg_read(pmic, RK806_NLDO_EN(2));
 		}
 		break;
 	default:
@@ -429,7 +433,7 @@ static int _ldo_set_enable(struct udevice *pmic, int ldo, bool enable)
 	return ret;
 }
 
-static int _pldo_get_enable(struct udevice *pmic, int ldo)
+static int _pldo_get_enable(struct udevice *pmic, int pldo)
 {
 	struct rk8xx_priv *priv = dev_get_priv(pmic);
 	uint mask = 0, en_reg;
@@ -437,10 +441,22 @@ static int _pldo_get_enable(struct udevice *pmic, int ldo)
 
 	switch (priv->variant) {
 	case RK806_ID:
-		en_reg = RK806_PLDO_EN(ldo / 4);
-		mask = 1 << ldo % 4;
-		ret = pmic_reg_read(pmic, en_reg);
+		if ((pldo < 3) || (pldo == 5)) {
+			en_reg = RK806_PLDO_EN(0);
+			mask = RK806_PLDO0_2_SET(pldo);
+			if (pldo == 5)
+				mask = (1 << 0);
+			ret = pmic_reg_read(pmic, en_reg);
+		} else if ((pldo == 3) || (pldo == 4)) {
+			en_reg = RK806_PLDO_EN(1);
+			if (pldo == 3)
+				mask = (1 << 0);
+			else
+				mask = (1 << 1);
+			ret = pmic_reg_read(pmic, en_reg);
+		}
 		break;
+
 	default:
 		return -EINVAL;
 	}
@@ -451,7 +467,7 @@ static int _pldo_get_enable(struct udevice *pmic, int ldo)
 	return ret & mask ? true : false;
 }
 
-static int _pldo_set_enable(struct udevice *pmic, int ldo, bool enable)
+static int _pldo_set_enable(struct udevice *pmic, int pldo, bool enable)
 {
 	struct rk8xx_priv *priv = dev_get_priv(pmic);
 	uint value, en_reg;
@@ -459,12 +475,36 @@ static int _pldo_set_enable(struct udevice *pmic, int ldo, bool enable)
 
 	switch (priv->variant) {
 	case RK806_ID:
-		en_reg = RK806_PLDO_EN(ldo / 4);
-		if (enable)
-			value = ((1 << ldo % 4) | (1 << (ldo % 4 + 4)));
-		else
-			value = ((0 << ldo % 4) | (1 << (ldo % 4 + 4)));
-		ret = pmic_reg_write(pmic, en_reg, value);
+		if (pldo < 3) {
+			en_reg = RK806_PLDO_EN(0);
+			if (enable)
+				value = RK806_PLDO0_2_SET(pldo);
+			else
+				value = RK806_PLDO0_2_CLR(pldo);
+			ret = pmic_reg_write(pmic, en_reg, value);
+		} else if (pldo == 3) {
+			en_reg = RK806_PLDO_EN(1);
+			if (enable)
+				value = ((1 << 0) | (1 << 4));
+			else
+				value = (1 << 4);
+			ret = pmic_reg_write(pmic, en_reg, value);
+		} else if (pldo == 4) {
+			en_reg = RK806_PLDO_EN(1);
+			if (enable)
+				value = ((1 << 1) | (1 << 5));
+			else
+				value = ((0 << 1) | (1 << 5));
+			ret = pmic_reg_write(pmic, en_reg, value);
+		} else if (pldo == 5) {
+			en_reg = RK806_PLDO_EN(0);
+			if (enable)
+				value = ((1 << 0) | (1 << 4));
+			else
+				value = ((0 << 0) | (1 << 4));
+			ret = pmic_reg_write(pmic, en_reg, value);
+		}
+
 		break;
 	default:
 		return -EINVAL;

commit 64993c879660fa70969be56806ebaf6e5bbd1234
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Nov 26 18:10:58 2021 +0800

    spi: rk_spi: Support rx sample delay
    
    Adding a number of spi_clk cycles delay for rx sample.
    
    Change-Id: I4b5e71f1d5d11a085cf54eafd4299b0ca290b642
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/spi/rk_spi.c b/drivers/spi/rk_spi.c
index a4d361bc4d..860f7b1671 100644
--- a/drivers/spi/rk_spi.c
+++ b/drivers/spi/rk_spi.c
@@ -49,9 +49,11 @@ struct rockchip_spi_priv {
 	unsigned int last_speed_hz;
 	uint input_rate;
 	uint cr0;
+	u32 rsd;			/* Rx sample delay cycles */
 };
 
 #define SPI_FIFO_DEPTH		32
+#define SPI_CR0_RSD_MAX		0x3
 
 static void rkspi_dump_regs(struct rockchip_spi *regs)
 {
@@ -182,6 +184,7 @@ static int rockchip_spi_ofdata_to_platdata(struct udevice *bus)
 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
 	struct rockchip_spi_platdata *plat = dev_get_platdata(bus);
 	struct rockchip_spi_priv *priv = dev_get_priv(bus);
+	u32 rsd_nsecs;
 	int ret;
 
 	plat->base = dev_read_addr(bus);
@@ -200,9 +203,26 @@ static int rockchip_spi_ofdata_to_platdata(struct udevice *bus)
 	plat->activate_delay_us =
 		dev_read_u32_default(bus, "spi-activate-delay", 0);
 
-	debug("%s: base=%x, max-frequency=%d, deactivate_delay=%d\n",
+	rsd_nsecs = dev_read_u32_default(bus, "rx-sample-delay-ns", 0);
+	if (rsd_nsecs > 0) {
+		u32 spi_clk, rsd;
+
+		spi_clk = clk_get_rate(&priv->clk);
+		/* rx sample delay is expressed in parent clock cycles (max 3) */
+		rsd = DIV_ROUND_CLOSEST(rsd_nsecs * (spi_clk >> 8), 1000000000 >> 8);
+		if (!rsd) {
+			pr_err("SPI spi_clk %dHz are too slow to express %u ns delay\n", spi_clk, rsd_nsecs);
+		} else if (rsd > SPI_CR0_RSD_MAX) {
+			rsd = SPI_CR0_RSD_MAX;
+			pr_err("SPI spi_clk %dHz are too fast to express %u ns delay, clamping at %u ns\n",
+			       spi_clk, rsd_nsecs, SPI_CR0_RSD_MAX * 1000000000U / spi_clk);
+		}
+		priv->rsd = rsd;
+	}
+
+	debug("%s: base=%x, max-frequency=%d, deactivate_delay=%d rsd=%d\n",
 	      __func__, (uint)plat->base, plat->frequency,
-	      plat->deactivate_delay_us);
+	      plat->deactivate_delay_us, priv->rsd);
 #endif
 
 	return 0;
@@ -330,7 +350,7 @@ static int rockchip_spi_claim_bus(struct udevice *dev)
 	ctrlr0 |= spi_tf << HALF_WORD_TX_SHIFT;
 
 	/* Rxd Sample Delay */
-	ctrlr0 |= 0 << RXDSD_SHIFT;
+	ctrlr0 |= priv->rsd << RXDSD_SHIFT;
 
 	/* Frame Format */
 	ctrlr0 |= FRF_SPI << FRF_SHIFT;

commit 81a1596c5e8793c5720fedf4fe92c307a14b25cb
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Nov 15 19:26:36 2021 +0800

    rockchip: drivers: spi: Support read only
    
    Change-Id: Ib99db168d9ba3566c9e038986af202023a4a5daa
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/spi/rk_spi.c b/drivers/spi/rk_spi.c
index 9e64e6cca2..a4d361bc4d 100644
--- a/drivers/spi/rk_spi.c
+++ b/drivers/spi/rk_spi.c
@@ -47,8 +47,8 @@ struct rockchip_spi_priv {
 	u8 n_bytes;
 	unsigned int speed_hz;
 	unsigned int last_speed_hz;
-	unsigned int tmode;
 	uint input_rate;
+	uint cr0;
 };
 
 #define SPI_FIFO_DEPTH		32
@@ -267,7 +267,6 @@ static int rockchip_spi_probe(struct udevice *bus)
 	priv->input_rate = ret;
 	debug("%s: rate = %u\n", __func__, priv->input_rate);
 	priv->bits_per_word = 8;
-	priv->tmode = TMOD_TR; /* Tx & Rx */
 
 	return 0;
 }
@@ -336,14 +335,31 @@ static int rockchip_spi_claim_bus(struct udevice *dev)
 	/* Frame Format */
 	ctrlr0 |= FRF_SPI << FRF_SHIFT;
 
-	/* Tx and Rx mode */
-	ctrlr0 |= (priv->tmode & TMOD_MASK) << TMOD_SHIFT;
+	/* Save static configuration */
+	priv->cr0 = ctrlr0;
 
 	writel(ctrlr0, &regs->ctrlr0);
 
 	return 0;
 }
 
+static int rockchip_spi_config(struct rockchip_spi_priv *priv, const void *dout)
+{
+	struct rockchip_spi *regs = priv->regs;
+	uint ctrlr0 = priv->cr0;
+	u32 tmod;
+
+	if (dout)
+		tmod = TMOD_TR;
+	else
+		tmod = TMOD_RO;
+
+	ctrlr0 |= (tmod & TMOD_MASK) << TMOD_SHIFT;
+	writel(ctrlr0, &regs->ctrlr0);
+
+	return 0;
+}
+
 static int rockchip_spi_release_bus(struct udevice *dev)
 {
 	struct udevice *bus = dev->parent;
@@ -367,6 +383,8 @@ static int rockchip_spi_xfer(struct udevice *dev, unsigned int bitlen,
 	int toread, towrite;
 	int ret;
 
+	rockchip_spi_config(priv, dout);
+
 	debug("%s: dout=%p, din=%p, len=%x, flags=%lx\n", __func__, dout, din,
 	      len, flags);
 	if (DEBUG_RK_SPI)

commit 8d8829dd85bee6867dfe6b90e327a56d51aef36c
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Fri Dec 10 10:10:02 2021 +0800

    mmc: Add retry for failed sending command
    
    Once sending command has failed, retry 3 times to fix it.
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: Id3fffb86733c46c4dd3b71d8b68e8bf12299f102

diff --git a/drivers/mmc/mmc-uclass.c b/drivers/mmc/mmc-uclass.c
index 4c89eb45bf..d52345a638 100644
--- a/drivers/mmc/mmc-uclass.c
+++ b/drivers/mmc/mmc-uclass.c
@@ -20,8 +20,9 @@ int dm_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
 {
 	struct mmc *mmc = mmc_get_mmc_dev(dev);
 	struct dm_mmc_ops *ops = mmc_get_ops(dev);
-	int ret;
+	int ret, retry_time = 3;
 
+retry:
 	mmmc_trace_before_send(mmc, cmd);
 	if (ops->send_cmd)
 		ret = ops->send_cmd(dev, cmd, data);
@@ -30,8 +31,11 @@ int dm_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
 	mmmc_trace_after_send(mmc, cmd, ret);
 
 	if (ret && cmd->cmdidx != SD_CMD_SEND_IF_COND
-	    && cmd->cmdidx != MMC_CMD_APP_CMD)
-		printf("MMC error: The cmd index is %d, ret is %d\n", cmd->cmdidx, ret);
+	    && cmd->cmdidx != MMC_CMD_APP_CMD) {
+		if (retry_time-- > 0)
+			goto retry;
+		printf("MMC error: The cmd index is %d, ret is %d.....\n", cmd->cmdidx, ret);
+	}
 
 	return ret;
 }

commit 9a7b7f26ec66fca6fc43ff0ea333e16b2f6317f8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 25 13:14:25 2021 +0000

    dm: regulator: skip probed pre-reloc regulators
    
    Some regulator like fixed/gpio regultor applies a default
    output state when probed. It maybe reverse the state which
    was set by the pre-reloc regulator. Example: vcc3v3_pcie.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I47c191013b0467d57d709705c8e069a804a1c526

diff --git a/drivers/core/device.c b/drivers/core/device.c
index a8803ee42c..e0e9ca12f0 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -97,6 +97,8 @@ static int device_bind_common(struct udevice *parent, const struct driver *drv,
 					debug("%s do not delete uboot dev: %s\n",
 					      __func__, dev->name);
 					return 0;
+				} else if (drv->id == UCLASS_REGULATOR) {
+					/* stay in dm tree, in order to handle exclusion */
 				} else {
 					list_del_init(&dev->uclass_node);
 				}
diff --git a/drivers/power/regulator/regulator-uclass.c b/drivers/power/regulator/regulator-uclass.c
index 0c692bbcf5..4679249b38 100644
--- a/drivers/power/regulator/regulator-uclass.c
+++ b/drivers/power/regulator/regulator-uclass.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <errno.h>
 #include <dm.h>
+#include <dm/device-internal.h>
 #include <dm/uclass-internal.h>
 #include <power/pmic.h>
 #include <power/regulator.h>
@@ -412,10 +413,16 @@ static int regulator_post_bind(struct udevice *dev)
 	if (regulator_name_is_unique(dev, uc_pdata->name))
 		return 0;
 
+#ifdef CONFIG_USING_KERNEL_DTB
+	printf("Pre-reloc: %s\n", uc_pdata->name);
+
+	return 0;
+#else
 	debug("'%s' of dev: '%s', has nonunique value: '%s\n",
 	      property, dev->name, uc_pdata->name);
 
 	return -EINVAL;
+#endif
 }
 
 static int regulator_pre_probe(struct udevice *dev)
@@ -498,6 +505,90 @@ int regulators_enable_state_mem(bool verbose)
 	return ret;
 }
 
+#ifdef CONFIG_USING_KERNEL_DTB
+/*
+ * Skip probed pre-reloc regulators.
+ *
+ * Some regulator like fixed/gpio regultor applies a default output state
+ * when probed. It maybe reverse the state which was set by the pre-reloc
+ * regulator. Example: vcc3v3_pcie.
+ */
+int regulators_enable_boot_on(bool verbose)
+{
+	struct dm_regulator_uclass_platdata *uc_pdata;
+	struct udevice *dev;
+	struct uclass *uc;
+	char **pre_probed = NULL;
+	int i = 0, num = 0;
+	int ret;
+	bool skip;
+
+	ret = uclass_get(UCLASS_REGULATOR, &uc);
+	if (ret)
+		return ret;
+
+	/* find probed pre-reloc regulators */
+	for (uclass_find_first_device(UCLASS_REGULATOR, &dev);
+	     dev;
+	     uclass_find_next_device(&dev)) {
+		if (!(dev->flags & DM_FLAG_KNRL_DTB) &&
+		    (dev->flags & DM_FLAG_ACTIVATED))
+			num++;
+	}
+	if (num) {
+		pre_probed = calloc(num, sizeof(char *));
+		if (!pre_probed)
+			return -ENOMEM;
+
+		for (uclass_find_first_device(UCLASS_REGULATOR, &dev);
+		     dev;
+		     uclass_find_next_device(&dev)) {
+			if (!(dev->flags & DM_FLAG_KNRL_DTB) &&
+			    (dev->flags & DM_FLAG_ACTIVATED)) {
+				uc_pdata = dev_get_uclass_platdata(dev);
+				pre_probed[i++] = (char *)uc_pdata->name;
+			}
+		}
+	}
+
+	/* Skip kernel regulators whose name matches probed pre-reloc regulators */
+	for (uclass_find_first_device(UCLASS_REGULATOR, &dev);
+	     dev;
+	     uclass_find_next_device(&dev)) {
+		uc_pdata = dev_get_uclass_platdata(dev);
+		debug("%s: %s%s\n", __func__, uc_pdata->name,
+		      dev->flags & DM_FLAG_KNRL_DTB ? "" : "*");
+		if (dev->flags & DM_FLAG_KNRL_DTB) {
+			for (i = 0, skip = false; i < num; i++) {
+				if (!strcmp(pre_probed[i], uc_pdata->name)) {
+					skip = true;
+					break;
+				}
+			}
+			if (skip)
+				continue;
+		}
+
+		/* Probe and init */
+		ret = device_probe(dev);
+		if (ret)
+			continue;
+		ret = regulator_autoset(dev);
+		if (ret == -EMEDIUMTYPE)
+			ret = 0;
+		if (verbose)
+			regulator_show(dev, ret);
+		if (ret == -ENOSYS)
+			ret = 0;
+	}
+
+	if (pre_probed)
+		free(pre_probed);
+
+	return ret;
+}
+
+#else
 int regulators_enable_boot_on(bool verbose)
 {
 	struct udevice *dev;
@@ -522,6 +613,7 @@ int regulators_enable_boot_on(bool verbose)
 
 	return ret;
 }
+#endif
 
 UCLASS_DRIVER(regulator) = {
 	.id		= UCLASS_REGULATOR,

commit 34ce33c49fc90e40b4e8ce87c09fa4241a8987c9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 1 07:37:58 2021 +0000

    rockchip: rk3568: use default RKIMG_BOOTCOMMAND
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I667e253cf458a3128a08c0197a4675b54379c19e

diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h
index f98ae421b7..1b71a78a9a 100644
--- a/include/configs/rk3568_common.h
+++ b/include/configs/rk3568_common.h
@@ -88,12 +88,6 @@
 	ROCKCHIP_DEVICE_SETTINGS \
 	RKIMG_DET_BOOTDEV \
 	BOOTENV
-
-#undef RKIMG_BOOTCOMMAND
-#define RKIMG_BOOTCOMMAND		\
-	"boot_fit;"			\
-	"boot_android ${devtype} ${devnum};" \
-	"run distro_bootcmd;"
 #endif
 
 /* rockchip ohci host driver */

commit 96372e585fa38b0df5330d4e4c4c45b5660ebc67
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 1 07:37:33 2021 +0000

    rockchip: rk3588: use default RKIMG_BOOTCOMMAND
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I36492dca772047a52660d00bc8cda4ec51e72ce3

diff --git a/include/configs/rk3588_common.h b/include/configs/rk3588_common.h
index 782347285d..7a3c049677 100644
--- a/include/configs/rk3588_common.h
+++ b/include/configs/rk3588_common.h
@@ -71,12 +71,6 @@
 	ROCKCHIP_DEVICE_SETTINGS \
 	RKIMG_DET_BOOTDEV \
 	BOOTENV
-
-#undef RKIMG_BOOTCOMMAND
-#define RKIMG_BOOTCOMMAND		\
-	"boot_fit;"			\
-	"boot_android ${devtype} ${devnum};" \
-	"run distro_bootcmd;"
 #endif
 
 /* rockchip ohci host driver */

commit 0018e93e955b30d8ad4d0ec01d7d2422fc9ba56b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 1 07:37:05 2021 +0000

    rockchip: common: add boot fit command
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Iadbe2dcd62044ca94659a7473ce05837c911aa9b

diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index 366b51dc06..f1f22ff3a0 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -138,9 +138,13 @@
 #if defined(CONFIG_AVB_VBMETA_PUBLIC_KEY_VALIDATE)
 #define RKIMG_BOOTCOMMAND			\
 	"boot_android ${devtype} ${devnum};"
+#elif defined(CONFIG_FIT_SIGNATURE)
+#define RKIMG_BOOTCOMMAND			\
+	"boot_fit;"
 #else
 #define RKIMG_BOOTCOMMAND			\
 	"boot_android ${devtype} ${devnum};"	\
+	"boot_fit;"				\
 	"bootrkp;"				\
 	"run distro_bootcmd;"
 #endif

commit 460c790ea66d9f2131be7c4d9ab4796b71fc254c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 1 03:24:11 2021 +0000

    rockchip: fit misc: print msg once
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Icd726aa3d8517139d7e4d90d2cc18c537fc0ba85

diff --git a/arch/arm/mach-rockchip/fit_misc.c b/arch/arm/mach-rockchip/fit_misc.c
index 54e995b5d9..c08b70c536 100644
--- a/arch/arm/mach-rockchip/fit_misc.c
+++ b/arch/arm/mach-rockchip/fit_misc.c
@@ -186,6 +186,7 @@ int fit_rollback_index_verify(const void *fit, uint32_t rollback_fd,
  */
 int fit_board_verify_required_sigs(void)
 {
+	static int showed = 0;
 	uint8_t vboot = 0;
 
 #ifdef CONFIG_SPL_BUILD
@@ -215,7 +216,10 @@ int fit_board_verify_required_sigs(void)
 #endif
 #endif /* CONFIG_SPL_BUILD*/
 
-	printf("## Verified-boot: %d\n", vboot);
+	if (!showed) {
+		printf("## Verified-boot: %d\n", vboot);
+		showed = 1;
+	}
 
 	return vboot;
 }

commit 509fe56709a7f6ae2efaa72469c1aebf8382a935
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 1 06:40:31 2021 +0000

    common: image-sig: use static sha1/256 prefix array data
    
    So that we can disable CONFIG_SHA1/256.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I6a570df186cdceba9d5edc0a266f316159bfdca4

diff --git a/common/image-sig.c b/common/image-sig.c
index d40fa1c100..a872ce0f57 100644
--- a/common/image-sig.c
+++ b/common/image-sig.c
@@ -31,12 +31,23 @@ void *image_get_host_blob(void)
 }
 #endif
 
+static const uint8_t sha1_der_prefix_data[SHA1_DER_LEN] = {
+	0x30, 0x21, 0x30, 0x09, 0x06, 0x05, 0x2b, 0x0e,
+	0x03, 0x02, 0x1a, 0x05, 0x00, 0x04, 0x14
+};
+
+static const uint8_t sha256_der_prefix_data[SHA256_DER_LEN] = {
+	0x30, 0x31, 0x30, 0x0d, 0x06, 0x09, 0x60, 0x86,
+	0x48, 0x01, 0x65, 0x03, 0x04, 0x02, 0x01, 0x05,
+	0x00, 0x04, 0x20
+};
+
 struct checksum_algo checksum_algos[] = {
 	{
 		.name = "sha1",
 		.checksum_len = SHA1_SUM_LEN,
 		.der_len = SHA1_DER_LEN,
-		.der_prefix = sha1_der_prefix,
+		.der_prefix = sha1_der_prefix_data,
 #if IMAGE_ENABLE_SIGN
 		.calculate_sign = EVP_sha1,
 #endif
@@ -46,7 +57,7 @@ struct checksum_algo checksum_algos[] = {
 		.name = "sha256",
 		.checksum_len = SHA256_SUM_LEN,
 		.der_len = SHA256_DER_LEN,
-		.der_prefix = sha256_der_prefix,
+		.der_prefix = sha256_der_prefix_data,
 #if IMAGE_ENABLE_SIGN
 		.calculate_sign = EVP_sha256,
 #endif

commit b30b0946900fc96ab469d332ef1b12d8f2fbed41
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Tue Nov 30 14:26:16 2021 +0800

    phy: rockchip-inno-usb2: add usb2 phy support for rk3588
    
    Porting from Kernel develop-5.10 commit 0221f1547fab ("phy: rockchip:
    inno-usb2: Add usb2 phy support for rk3588").
    
    Change-Id: Ic4d5b7be7347bd381de8fae728dcc3dbbaeae043
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index e7077ed266..8cad232455 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -608,13 +608,13 @@ static int rockchip_usb2phy_probe(struct udevice *dev)
 
 	/* find out a proper config which can be matched with dt. */
 	index = 0;
-	while (phy_cfgs[index].reg) {
+	do {
 		if (phy_cfgs[index].reg == reg) {
 			rphy->phy_cfg = &phy_cfgs[index];
 			break;
 		}
 		++index;
-	}
+	} while (phy_cfgs[index].reg);
 
 	if (!rphy->phy_cfg) {
 		dev_err(dev, "no phy-config can be matched\n");
@@ -1249,6 +1249,80 @@ static const struct rockchip_usb2phy_cfg rk3568_phy_cfgs[] = {
 	},
 	{ /* sentinel */ }
 };
+
+static const struct rockchip_usb2phy_cfg rk3588_phy_cfgs[] = {
+	{
+		.reg = 0x0000,
+		.num_ports	= 1,
+		.clkout_ctl	= { 0x0000, 0, 0, 1, 0 },
+		.port_cfgs	= {
+			[USB2PHY_PORT_OTG] = {
+				.phy_sus	= { 0x000c, 11, 11, 0, 0 },
+				.ls_det_en	= { 0x0080, 0, 0, 0, 1 },
+				.ls_det_st	= { 0x0084, 0, 0, 0, 1 },
+				.ls_det_clr	= { 0x0088, 0, 0, 0, 1 },
+				.utmi_ls	= { 0x00c0, 10, 9, 0, 1 },
+			}
+		},
+		.chg_det = {
+			.opmode		= { 0x0008, 2, 2, 0, 1 },
+			.cp_det		= { 0x00c0, 0, 0, 0, 1 },
+			.dcp_det	= { 0x00c0, 0, 0, 0, 1 },
+			.dp_det		= { 0x00c0, 1, 1, 0, 1 },
+			.idm_sink_en	= { 0x0008, 5, 5, 1, 0 },
+			.idp_sink_en	= { 0x0008, 5, 5, 0, 1 },
+			.idp_src_en	= { 0x0008, 14, 14, 0, 1 },
+			.rdm_pdwn_en	= { 0x0008, 14, 14, 0, 1 },
+			.vdm_src_en	= { 0x0008, 7, 6, 0, 3 },
+			.vdp_src_en	= { 0x0008, 7, 6, 0, 3 },
+		},
+	},
+	{
+		.reg = 0x4000,
+		.num_ports	= 1,
+		.clkout_ctl	= { 0x0000, 0, 0, 1, 0 },
+		.port_cfgs	= {
+			/* Select suspend control from controller */
+			[USB2PHY_PORT_OTG] = {
+				.phy_sus	= { 0x000c, 11, 11, 0, 0 },
+				.ls_det_en	= { 0x0080, 0, 0, 0, 1 },
+				.ls_det_st	= { 0x0084, 0, 0, 0, 1 },
+				.ls_det_clr	= { 0x0088, 0, 0, 0, 1 },
+				.utmi_ls	= { 0x00c0, 10, 9, 0, 1 },
+			}
+		},
+	},
+	{
+		.reg = 0x8000,
+		.num_ports	= 1,
+		.clkout_ctl	= { 0x0000, 0, 0, 1, 0 },
+		.port_cfgs	= {
+			[USB2PHY_PORT_HOST] = {
+				.phy_sus	= { 0x0008, 2, 2, 0, 1 },
+				.ls_det_en	= { 0x0080, 0, 0, 0, 1 },
+				.ls_det_st	= { 0x0084, 0, 0, 0, 1 },
+				.ls_det_clr	= { 0x0088, 0, 0, 0, 1 },
+				.utmi_ls	= { 0x00c0, 10, 9, 0, 1 },
+			}
+		},
+	},
+	{
+		.reg = 0xc000,
+		.num_ports	= 1,
+		.clkout_ctl	= { 0x0000, 0, 0, 1, 0 },
+		.port_cfgs	= {
+			[USB2PHY_PORT_HOST] = {
+				.phy_sus	= { 0x0008, 2, 2, 0, 1 },
+				.ls_det_en	= { 0x0080, 0, 0, 0, 1 },
+				.ls_det_st	= { 0x0084, 0, 0, 0, 1 },
+				.ls_det_clr	= { 0x0088, 0, 0, 0, 1 },
+				.utmi_ls	= { 0x00c0, 10, 9, 0, 1 },
+			}
+		},
+	},
+	{ /* sentinel */ }
+};
+
 static const struct udevice_id rockchip_usb2phy_ids[] = {
 	{ .compatible = "rockchip,rk1808-usb2phy", .data = (ulong)&rk1808_phy_cfgs },
 	{ .compatible = "rockchip,rk3128-usb2phy", .data = (ulong)&rk312x_phy_cfgs },
@@ -1258,6 +1332,7 @@ static const struct udevice_id rockchip_usb2phy_ids[] = {
 	{ .compatible = "rockchip,rk3368-usb2phy", .data = (ulong)&rk3368_phy_cfgs },
 	{ .compatible = "rockchip,rk3399-usb2phy", .data = (ulong)&rk3399_phy_cfgs },
 	{ .compatible = "rockchip,rk3568-usb2phy", .data = (ulong)&rk3568_phy_cfgs },
+	{ .compatible = "rockchip,rk3588-usb2phy", .data = (ulong)&rk3588_phy_cfgs },
 	{ .compatible = "rockchip,rv1108-usb2phy", .data = (ulong)&rv1108_phy_cfgs },
 	{ }
 };

commit dd5acf09337c40556b55f0d262c46a20dad6b4f3
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Nov 30 19:28:31 2021 +0800

    rockchip: fit_misc: set synchronous decompression in spl
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I40f0374c9f96f5518633c0215e5e4042b602f15b

diff --git a/arch/arm/mach-rockchip/fit_misc.c b/arch/arm/mach-rockchip/fit_misc.c
index f3459ea81a..54e995b5d9 100644
--- a/arch/arm/mach-rockchip/fit_misc.c
+++ b/arch/arm/mach-rockchip/fit_misc.c
@@ -93,7 +93,7 @@ static int fit_gunzip_image(void *fit, int node, ulong *load_addr,
 #if CONFIG_IS_ENABLED(MISC_DECOMPRESS)
 	ret = misc_decompress_process((ulong)(*load_addr),
 				      (ulong)(*src_addr), (ulong)(*src_len),
-				      DECOM_GZIP, false, &len, flags);
+				      DECOM_GZIP, true, &len, flags);
 #else
 	ret = gunzip((void *)(*load_addr), ALIGN(len, FIT_MAX_SPL_IMAGE_SZ),
 		     (void *)(*src_addr), (void *)(&len));

commit d8968f57b7a77ce854065e4e0092b9a9b13a68f1
Author: William Wu <william.wu@rock-chips.com>
Date:   Mon Nov 29 17:19:16 2021 +0800

    phy: rockchip: naneng-combphy: Add config for rk3588 usb3
    
    This patch aims to configure usb for better compatibility.
    1. Set ssc downward spread spectrum.
    2. Enable the adaptive Continuous Time Linear Equalizer (CTLE).
    3. Adjusts the PLL the parameters for USB Rx to pass the
       Receiver Jitter Tolerance Test, and it's helpful to
       improve the USB 3.0 signal compatibility.
    
    Signed-off-by: William Wu <william.wu@rock-chips.com>
    Change-Id: I9c8c7db29178074b0b906012accc26ccf7202a34

diff --git a/drivers/phy/phy-rockchip-naneng-combphy.c b/drivers/phy/phy-rockchip-naneng-combphy.c
index 7e6107cc45..7a3c3958e5 100644
--- a/drivers/phy/phy-rockchip-naneng-combphy.c
+++ b/drivers/phy/phy-rockchip-naneng-combphy.c
@@ -439,6 +439,7 @@ static const struct rockchip_combphy_cfg rk3568_combphy_cfgs = {
 static int rk3588_combphy_cfg(struct rockchip_combphy_priv *priv)
 {
 	const struct rockchip_combphy_grfcfg *cfg = priv->cfg->grfcfg;
+	u32 val;
 
 	switch (priv->mode) {
 	case PHY_TYPE_PCIE:
@@ -448,6 +449,39 @@ static int rk3588_combphy_cfg(struct rockchip_combphy_priv *priv)
 		param_write(priv->phy_grf, &cfg->con3_for_pcie, true);
 		break;
 	case PHY_TYPE_USB3:
+		/* Set SSC downward spread spectrum */
+		val = readl(priv->mmio + (0x1f << 2));
+		val &= ~GENMASK(5, 4);
+		val |= 0x01 << 4;
+		writel(val, priv->mmio + 0x7c);
+
+		/* Enable adaptive CTLE for USB3.0 Rx */
+		val = readl(priv->mmio + (0x0e << 2));
+		val &= ~GENMASK(0, 0);
+		val |= 0x01;
+		writel(val, priv->mmio + (0x0e << 2));
+
+		/* Set PLL KVCO fine tuning signals */
+		val = readl(priv->mmio + (0x20 << 2));
+		val &= ~(0x7 << 2);
+		val |= 0x2 << 2;
+		writel(val, priv->mmio + (0x20 << 2));
+
+		/* Set PLL LPF R1 to su_trim[10:7]=1001 */
+		writel(0x4, priv->mmio + (0xb << 2));
+
+		/* Set PLL input clock divider 1/2 */
+		val = readl(priv->mmio + (0x5 << 2));
+		val &= ~(0x3 << 6);
+		val |= 0x1 << 6;
+		writel(val, priv->mmio + (0x5 << 2));
+
+		/* Set PLL loop divider */
+		writel(0x32, priv->mmio + (0x11 << 2));
+
+		/* Set PLL KVCO to min and set PLL charge pump current to max */
+		writel(0xf0, priv->mmio + (0xa << 2));
+
 		param_write(priv->phy_grf, &cfg->pipe_txcomp_sel, false);
 		param_write(priv->phy_grf, &cfg->pipe_txelec_sel, false);
 		param_write(priv->phy_grf, &cfg->usb_mode_set, true);

commit 54fa28628cbb5701b9787d574409f0dae52cc559
Author: shengfei Xu <xsf@rock-chips.com>
Date:   Fri Nov 12 03:02:10 2021 +0000

    regulator: rk806: fix compile error
    
    fixes compile error:
    drivers/power/regulator/rk806.c: In function ‘_buck_set_ramp_delay’:
    drivers/power/regulator/rk806.c:269:14: error: statement will never be
    executed [-Werror=switch-unreachable]
       ramp_value = RK806_RAMP_RATE_1LSB_PER_32CLK;
    
    Signed-off-by: shengfei Xu <xsf@rock-chips.com>
    Change-Id: I3bb37e6503da16fecce8393d0031c86ae57839de

diff --git a/drivers/power/regulator/rk806.c b/drivers/power/regulator/rk806.c
index a0d2d8ab7c..7212e02a46 100644
--- a/drivers/power/regulator/rk806.c
+++ b/drivers/power/regulator/rk806.c
@@ -266,7 +266,6 @@ static int _buck_set_ramp_delay(struct udevice *pmic, int buck, u32 ramp_delay)
 	switch (priv->variant) {
 	case RK806_ID:
 		switch (ramp_delay) {
-		ramp_value = RK806_RAMP_RATE_1LSB_PER_32CLK;
 		case 1 ... 390:
 			ramp_value = RK806_RAMP_RATE_1LSB_PER_32CLK;
 			break;

commit 17d678b9250706e7e60eebb78f5ba7087921eee3
Author: shengfei Xu <xsf@rock-chips.com>
Date:   Tue Nov 16 03:07:56 2021 +0000

    power: regulator: update rk860 compatible
    
    Signed-off-by: shengfei Xu <xsf@rock-chips.com>
    Change-Id: Id10e7bc0e8fceeb2585c7cbb0b41ded3c833c3db

diff --git a/drivers/power/regulator/rk860x_regulator.c b/drivers/power/regulator/rk860x_regulator.c
index 08720872cb..0dd1749a5d 100644
--- a/drivers/power/regulator/rk860x_regulator.c
+++ b/drivers/power/regulator/rk860x_regulator.c
@@ -386,7 +386,16 @@ static int rk860x_regulator_probe(struct udevice *dev)
 
 static const struct udevice_id rk860x_id[] = {
 	{
-		.compatible = "rockchip,rk860x",
+		.compatible = "rockchip,rk8600",
+	},
+	{
+		.compatible = "rockchip,rk8601",
+	},
+	{
+		.compatible = "rockchip,rk8602",
+	},
+	{
+		.compatible = "rockchip,rk8603",
 	},
 	{ },
 };

commit 7e0fdcc6d30cb8a8bdb1076347ea006496de1ff9
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Fri Nov 26 10:49:49 2021 +0800

    mmc: rockchip_sdhci: RX src clock change to rxclk_i
    
    It probability fail to send the command while select the
    txclk_dll_muc for the RX source clock，so can only use
    rxclk_i for the RX source clock.
    
    Fix bug:
    MMC error: The cmd index is 6, ret is -70
    MMC error: The cmd index is 6, ret is -70
    MMC error: The cmd index is 6, ret is -70
    mmc_init: -70, time 83
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: Idab0557fe9e8bf08b1a8ffd2da1a9447ef161a0e

diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index 8b11e064cd..e02630f382 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -371,7 +371,8 @@ static int dwcmshc_sdhci_emmc_set_clock(struct sdhci_host *host, unsigned int cl
 
 		/* reset the clock phase when the frequency is lower than 100MHz */
 		sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_CTRL);
-		sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_RXCLK);
+		extra = DLL_RXCLK_NO_INVERTER << DWCMSHC_EMMC_DLL_RXCLK_SRCSEL;
+		sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_RXCLK);
 		sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_TXCLK);
 		sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_STRBIN);
 		sdhci_writel(host, 0, DECMSHC_EMMC_DLL_CMDOUT);
@@ -537,7 +538,7 @@ static const struct sdhci_data rk3588_data = {
 	.emmc_set_clock = dwcmshc_sdhci_emmc_set_clock,
 	.get_phy = dwcmshc_emmc_get_phy,
 	.set_ios_post = dwcmshc_sdhci_set_ios_post,
-	.flags = RK_DLL_CMD_OUT,
+	.flags = RK_DLL_CMD_OUT | RK_RXCLK_NO_INVERTER,
 };
 
 static const struct udevice_id sdhci_ids[] = {

commit e56bff5b358874c5da2e9c1dd9c5bfa3a4bd113a
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Nov 24 21:28:14 2021 +0800

    mmc: change the clock firstly in hs400 mode
    
    In U-Boot, if change MMC device to hs400, it has to change to hs200
    firstly. Then change to hs ddr mode. This may occur error that change
    the mode firstly since the clock is higher than the hs ddr mode needed.
    So change the clock firstly before change to hs ddr mode.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ic564579cbd7dad9376a27b2102c83c802c702dbd

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 245f97f8db..1401777897 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -1002,6 +1002,9 @@ static int mmc_select_hs400(struct mmc *mmc)
 {
 	int ret;
 
+	/* Reduce frequency to HS frequency */
+	mmc_set_clock(mmc, MMC_HIGH_52_MAX_DTR);
+
 	/* Switch card to HS mode */
 	ret = __mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
 			   EXT_CSD_HS_TIMING, EXT_CSD_TIMING_HS, false);
@@ -1011,9 +1014,6 @@ static int mmc_select_hs400(struct mmc *mmc)
 	/* Set host controller to HS timing */
 	mmc_set_timing(mmc, MMC_TIMING_MMC_HS);
 
-	/* Reduce frequency to HS frequency */
-	mmc_set_clock(mmc, MMC_HIGH_52_MAX_DTR);
-
 	ret = mmc_send_status(mmc, 1000);
 	if (ret)
 		return ret;

commit 7622db4147578827cd5cd7b4f929ef32f55994a5
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Sat Nov 20 15:46:36 2021 +0800

    clk: rockchip: pll: rk3588: set core div after pll setting
    
    Change-Id: Ied1fcf8637080ad6ab3d1bc28e9f21f6ad1c23dc
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_pll.c b/drivers/clk/rockchip/clk_pll.c
index a8299d69a0..91466619f5 100644
--- a/drivers/clk/rockchip/clk_pll.c
+++ b/drivers/clk/rockchip/clk_pll.c
@@ -383,6 +383,11 @@ static ulong rk3036_pll_get_rate(struct rockchip_pll_clock *pll,
 #define RK3588_B0PLL_CLKSEL_CON(i)	((i) * 0x4 + 0x50000 + 0x300)
 #define RK3588_B1PLL_CLKSEL_CON(i)	((i) * 0x4 + 0x52000 + 0x300)
 #define RK3588_LPLL_CLKSEL_CON(i)	((i) * 0x4 + 0x58000 + 0x300)
+#define RK3588_CORE_DIV_MASK		0x1f
+#define RK3588_CORE_L02_DIV_SHIFT	0
+#define RK3588_CORE_L13_DIV_SHIFT	7
+#define RK3588_CORE_B02_DIV_SHIFT	8
+#define RK3588_CORE_B13_DIV_SHIFT	0
 
 static int rk3588_pll_set_rate(struct rockchip_pll_clock *pll,
 			       void __iomem *base, ulong pll_id,
@@ -452,18 +457,43 @@ static int rk3588_pll_set_rate(struct rockchip_pll_clock *pll,
 
 	rk_clrsetreg(base + pll->mode_offset, pll->mode_mask << pll->mode_shift,
 		     RKCLK_PLL_MODE_NORMAL << pll->mode_shift);
-	if (pll_id == 0)
+	if (pll_id == 0) {
 		rk_clrsetreg(base + RK3588_B0PLL_CLKSEL_CON(0),
 			     pll->mode_mask << 6,
 			     2 << 6);
-	else if (pll_id == 1)
 		rk_clrsetreg(base + RK3588_B0PLL_CLKSEL_CON(0),
+			     RK3588_CORE_DIV_MASK << RK3588_CORE_B02_DIV_SHIFT,
+			     0 << RK3588_CORE_B02_DIV_SHIFT);
+		rk_clrsetreg(base + RK3588_B0PLL_CLKSEL_CON(1),
+			     RK3588_CORE_DIV_MASK << RK3588_CORE_B13_DIV_SHIFT,
+			     0 << RK3588_CORE_B13_DIV_SHIFT);
+	} else if (pll_id == 1) {
+		rk_clrsetreg(base + RK3588_B1PLL_CLKSEL_CON(0),
 			     pll->mode_mask << 6,
 			     2 << 6);
-	else if (pll_id == 2)
+		rk_clrsetreg(base + RK3588_B1PLL_CLKSEL_CON(0),
+			     RK3588_CORE_DIV_MASK << RK3588_CORE_B02_DIV_SHIFT,
+			     0 << RK3588_CORE_B02_DIV_SHIFT);
+		rk_clrsetreg(base + RK3588_B1PLL_CLKSEL_CON(1),
+			     RK3588_CORE_DIV_MASK << RK3588_CORE_B13_DIV_SHIFT,
+			     0 << RK3588_CORE_B13_DIV_SHIFT);
+	} else if (pll_id == 2) {
 		rk_clrsetreg(base + RK3588_LPLL_CLKSEL_CON(5),
 			     pll->mode_mask << 14,
 			     2 << 14);
+		rk_clrsetreg(base + RK3588_LPLL_CLKSEL_CON(6),
+			     RK3588_CORE_DIV_MASK << RK3588_CORE_L13_DIV_SHIFT,
+			     0 << RK3588_CORE_L13_DIV_SHIFT);
+		rk_clrsetreg(base + RK3588_LPLL_CLKSEL_CON(6),
+			     RK3588_CORE_DIV_MASK << RK3588_CORE_L02_DIV_SHIFT,
+			     0 << RK3588_CORE_L02_DIV_SHIFT);
+		rk_clrsetreg(base + RK3588_LPLL_CLKSEL_CON(7),
+			     RK3588_CORE_DIV_MASK << RK3588_CORE_L13_DIV_SHIFT,
+			     0 << RK3588_CORE_L13_DIV_SHIFT);
+		rk_clrsetreg(base + RK3588_LPLL_CLKSEL_CON(7),
+			     RK3588_CORE_DIV_MASK << RK3588_CORE_L02_DIV_SHIFT,
+			     0 << RK3588_CORE_L02_DIV_SHIFT);
+	}
 
 	if (pll_id == 3)
 		rk_clrsetreg(base + 0x84c, 0x1 << 1, 0);

commit 6ee1fad06d12fff7f1f3b2398aa6c9bc8e1c9c26
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Sat Nov 20 15:47:29 2021 +0800

    rockchip: clk: rk3588: modify LPP_HZ from 816M to 1200M
    
    Change-Id: Ief08613007e8506cc1ffa4d25f4121f5c59a5cf5
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3588.h b/arch/arm/include/asm/arch-rockchip/cru_rk3588.h
index 5e5d3262e5..f565b15e67 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3588.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3588.h
@@ -11,7 +11,7 @@
 #define KHz		1000
 #define OSC_HZ		(24 * MHz)
 
-#define LPLL_HZ		(816 * MHz)
+#define LPLL_HZ		(1200 * MHz)
 #define GPLL_HZ		(1188 * MHz)
 #define CPLL_HZ		(1500 * MHz)
 #define NPLL_HZ         (850 * MHz)

commit 1e23913940021dce22763b6a4171d25406de4f14
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Nov 23 11:23:16 2021 +0800

    clk: rockchip: rk3588: set SPLL to 702M
    
    Change-Id: I71724c3da73da9ee5277f41500ea72bc7bb8e635
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3588.c b/drivers/clk/rockchip/clk_rk3588.c
index e7ae4a9222..f75c5f55a6 100644
--- a/drivers/clk/rockchip/clk_rk3588.c
+++ b/drivers/clk/rockchip/clk_rk3588.c
@@ -1923,6 +1923,18 @@ static int rk3588_clk_probe(struct udevice *dev)
 {
 	struct rk3588_clk_priv *priv = dev_get_priv(dev);
 	int ret;
+	struct clk clk;
+
+	ret = rockchip_get_scmi_clk(&clk.dev);
+	if (ret) {
+		printf("Failed to get scmi clk dev\n");
+		return ret;
+	}
+	clk.id = SCMI_SPLL;
+	ret = clk_set_rate(&clk, 702000000);
+	if (ret < 0) {
+		printf("Failed to set spll\n");
+	}
 
 	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 	if (IS_ERR(priv->grf))

commit 372f827ab0dae4a06d60388cb723f3eb8ad62d8f
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Nov 23 09:44:25 2021 +0800

    clk: rockchip: rk3588: set spll 702M for spl
    
    Change-Id: I21820cbe1bbecf5908a74582b23cd2d9fed6cd17
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3588.c b/drivers/clk/rockchip/clk_rk3588.c
index 07107ea7c1..e7ae4a9222 100644
--- a/drivers/clk/rockchip/clk_rk3588.c
+++ b/drivers/clk/rockchip/clk_rk3588.c
@@ -2124,12 +2124,25 @@ static ulong rk3588_clk_scmi_set_rate(struct clk *clk, ulong rate)
 {
 	u32 src, div;
 
+	if ((readl(BUSSCRU_BASE + RK3588_PLL_CON(137)) & 0x01c0) == 0xc0) {
+		writel(BITS_WITH_WMASK(0, 0x3U, 0),
+			BUSSCRU_BASE + RK3588_MODE_CON0);
+		writel(BITS_WITH_WMASK(2, 0x7U, 6),
+			BUSSCRU_BASE + RK3588_PLL_CON(137));
+		writel(BITS_WITH_WMASK(1, 0x3U, 0),
+		       BUSSCRU_BASE + RK3588_MODE_CON0);
+	}
+
 	switch (clk->id) {
 	case SCMI_SPLL:
 		if (rate >= 700 * MHz)
 			src = 1;
 		else
 			src = 0;
+		writel(BITS_WITH_WMASK(0, 0x3U, 0),
+			BUSSCRU_BASE + RK3588_MODE_CON0);
+		writel(BITS_WITH_WMASK(2, 0x7U, 6),
+			BUSSCRU_BASE + RK3588_PLL_CON(137));
 		writel(BITS_WITH_WMASK(src, 0x3U, 0),
 		       BUSSCRU_BASE + RK3588_MODE_CON0);
 		break;

commit eb6fc1c20bb3c2177dc69cd048b7996242b0f6d3
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Sun Nov 21 12:28:58 2021 +0800

    phy: phy-rockchip-snps-pcie3: Add pcie3_phymode setting
    
    rk3588 pcie3 phy has a pcie3_phymode to decide how to use the four
    lanes, add support in dts so that we can customize in dts.
    
    The phy has two port and each port has two lane:
    pcie30_phy_mode[2:0]
    2: aggregation
    1: bifurcation for port 1
    0: bifurcation for port 0
    
    Change-Id: I0bdf75b8df7c927f8a59ddb7ec3739b3c9f33a49
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/include/dt-bindings/phy/phy-snps-pcie3.h b/include/dt-bindings/phy/phy-snps-pcie3.h
new file mode 100644
index 0000000000..5006947f22
--- /dev/null
+++ b/include/dt-bindings/phy/phy-snps-pcie3.h
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
+/*
+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
+ */
+
+#ifndef _DT_BINDINGS_PHY_SNPS_PCIE3
+#define _DT_BINDINGS_PHY_SNPS_PCIE3
+
+/*
+ * pcie30_phy_mode[2:0]
+ * bit2: aggregation
+ * bit1: bifurcation for port 1
+ * bit0: bifurcation for port 0
+ */
+#define PHY_MODE_PCIE_AGGREGATION 4	/* PCIe3x4 */
+#define PHY_MODE_PCIE_NANBNB	0	/* P1:PCIe3x2  +  P0:PCIe3x2 */
+#define PHY_MODE_PCIE_NANBBI	1	/* P1:PCIe3x2  +  P0:PCIe3x1*2 */
+#define PHY_MODE_PCIE_NABINB	2	/* P1:PCIe3x1*2 + P0:PCIe3x2 */
+#define PHY_MODE_PCIE_NABIBI	3	/* P1:PCIe3x1*2 + P0:PCIe3x1*2 */
+
+#endif /* _DT_BINDINGS_PHY_SNPS_PCIE3 */

commit 7cc442221ad3b7d7e36b815e2f5845325eed0c52
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Sun Nov 21 12:19:58 2021 +0800

    phy: rockchip: naneng-combphy: Add config option for pcie1ln-sel
    
    Add dts decode to support the pcie2x1l0 and pcie2x1l1 setting, which is
    in PHP_GRF_PCIESEL_CON.
    pcie1l0_sel
    Select the signal form PHY to PCIe1l0
    1'b0: Select comb PHY
    1'b1: Select PCIE3 PHY
    
    Change-Id: I2410e7e0298ec7f01cc12b00a1d543fbe0cb50d0
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/phy/phy-rockchip-naneng-combphy.c b/drivers/phy/phy-rockchip-naneng-combphy.c
index 37613b0678..7e6107cc45 100644
--- a/drivers/phy/phy-rockchip-naneng-combphy.c
+++ b/drivers/phy/phy-rockchip-naneng-combphy.c
@@ -234,6 +234,7 @@ static int rockchip_combphy_parse_dt(struct udevice *dev,
 {
 	struct udevice *syscon;
 	int ret;
+	u32 vals[4];
 
 	ret = uclass_get_device_by_phandle(UCLASS_SYSCON, dev, "rockchip,pipe-grf", &syscon);
 	if (ret) {
@@ -261,6 +262,11 @@ static int rockchip_combphy_parse_dt(struct udevice *dev,
 		return ret;
 	}
 
+	if (!dev_read_u32_array(dev, "rockchip,pcie1ln-sel-bits",
+				vals, ARRAY_SIZE(vals)))
+		regmap_write(priv->pipe_grf, vals[0],
+			     (GENMASK(vals[2], vals[1]) << 16) | vals[3]);
+
 	return 0;
 }
 

commit c72d402c5679fffe0697fd673666e3d99317a4a7
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Nov 19 20:57:22 2021 +0800

    phy: rockchip: naneng-combphy: Using 100M refclk for rk3588 combo-phy
    
    100MHz refclock signal is good, so it is fixed as this frequency point.
    
    Change-Id: I99117de28980066833e43ee417f3390d30c6f291
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/phy/phy-rockchip-naneng-combphy.c b/drivers/phy/phy-rockchip-naneng-combphy.c
index beed15ee36..37613b0678 100644
--- a/drivers/phy/phy-rockchip-naneng-combphy.c
+++ b/drivers/phy/phy-rockchip-naneng-combphy.c
@@ -461,6 +461,8 @@ static int rk3588_combphy_cfg(struct rockchip_combphy_priv *priv)
 		return -EINVAL;
 	}
 
+	/* 100MHz refclock signal is good */
+	clk_set_rate(&priv->ref_clk, 100000000);
 	param_write(priv->phy_grf, &cfg->pipe_clk_100m, true);
 
 	return 0;

commit 36ae398162ff7d053c9413c7468669b5b8ab5d2c
Author: Shawn Lin <shawn.lin@rock-chips.com>
Date:   Wed Nov 17 09:15:36 2021 +0800

    drivers: pci: Add RK3588 PCIe3 phy support
    
    Change-Id: I19d6ee0e2f6ece2aee10c26aefae580f9033b9fd
    Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/phy/phy-rockchip-snps-pcie3.c b/drivers/phy/phy-rockchip-snps-pcie3.c
index afe38bf5a1..d94810c37e 100644
--- a/drivers/phy/phy-rockchip-snps-pcie3.c
+++ b/drivers/phy/phy-rockchip-snps-pcie3.c
@@ -16,19 +16,122 @@
 #include <regmap.h>
 #include <reset-uclass.h>
 
-#define GRF_PCIE30PHY_CON1 0x4
-#define GRF_PCIE30PHY_CON6 0x18
-#define GRF_PCIE30PHY_CON9 0x24
+/* Register for RK3568 */
+#define GRF_PCIE30PHY_RK3568_CON1 0x4
+#define GRF_PCIE30PHY_RK3568_CON6 0x18
+#define GRF_PCIE30PHY_RK3568_CON9 0x24
+
+/* Register for RK3588 */
+#define PHP_GRF_PCIESEL_CON 0x100
+#define RK3588_PCIE3PHY_GRF_CMN_CON0 0x0
+#define RK3588_PCIE3PHY_GRF_PHY0_STATUS1 0x904
+#define RK3588_PCIE3PHY_GRF_PHY1_STATUS1 0xa04
+
+/*
+ * pcie30_phy_mode[2:0]
+ * bit2: aggregation
+ * bit1: bifurcation for port 1
+ * bit0: bifurcation for port 0
+ */
+#define PHY_MODE_PCIE_AGGREGATION 4     /* PCIe3x4 */
+#define PHY_MODE_PCIE_NANBNB    0       /* P1:PCIe3x2  +  P0:PCIe3x2 */
+#define PHY_MODE_PCIE_NANBBI    1       /* P1:PCIe3x2  +  P0:PCIe3x1*2 */
+#define PHY_MODE_PCIE_NABINB    2       /* P1:PCIe3x1*2 + P0:PCIe3x2 */
+#define PHY_MODE_PCIE_NABIBI    3       /* P1:PCIe3x1*2 + P0:PCIe3x1*2 */
+
+struct rockchip_p3phy_ops;
 
 struct rockchip_p3phy_priv {
+	const struct rockchip_p3phy_ops *ops;
+	struct clk_bulk clks;
 	void __iomem *mmio;
 	int mode;
 	struct regmap *phy_grf;
+	struct regmap *pipe_grf;
 	struct reset_ctl p30phy;
-	struct clk ref_clk_m;
-	struct clk ref_clk_n;
-	struct clk pclk;
 	bool is_bifurcation;
+	/* pcie30_phymode: Aggregation, Bifurcation */
+	int pcie30_phymode;
+};
+
+struct rockchip_p3phy_ops {
+	int (*phy_init)(struct rockchip_p3phy_priv *priv);
+};
+
+static int rockchip_p3phy_rk3568_init(struct rockchip_p3phy_priv *priv)
+{
+	/* Deassert PCIe PMA output clamp mode */
+	regmap_write(priv->phy_grf, GRF_PCIE30PHY_RK3568_CON9,
+		     (0x1 << 15) | (0x1 << 31));
+
+	/* Set bifurcation if needed */
+	if (priv->is_bifurcation) {
+		regmap_write(priv->phy_grf, GRF_PCIE30PHY_RK3568_CON6,
+			     0x1 | (0xf << 16));
+		regmap_write(priv->phy_grf, GRF_PCIE30PHY_RK3568_CON1,
+			     (0x1 << 15) | (0x1 << 31));
+	}
+
+	return 0;
+}
+
+static const struct rockchip_p3phy_ops rk3568_ops = {
+	.phy_init = &rockchip_p3phy_rk3568_init,
+};
+
+static int rockchip_p3phy_rk3588_init(struct rockchip_p3phy_priv *priv)
+{
+	u32 reg;
+	u32 timeout;
+
+	/* Deassert PCIe PMA output clamp mode */
+	regmap_write(priv->phy_grf, RK3588_PCIE3PHY_GRF_CMN_CON0,
+		     (0x1 << 8) | (0x1 << 24));
+
+	/* Select correct pcie30_phymode */
+	if (priv->pcie30_phymode > 4)
+		priv->pcie30_phymode = PHY_MODE_PCIE_AGGREGATION;
+
+	regmap_write(priv->phy_grf, RK3588_PCIE3PHY_GRF_CMN_CON0,
+		     (0x7<<16) | priv->pcie30_phymode);
+
+	/* Set pcie1ln_sel in PHP_GRF_PCIESEL_CON */
+	reg = priv->pcie30_phymode & 3;
+	if (reg)
+		regmap_write(priv->pipe_grf, PHP_GRF_PCIESEL_CON,
+			     (reg << 16) | reg);
+
+	timeout = 500;
+	while (timeout--) {
+		regmap_read(priv->phy_grf, RK3588_PCIE3PHY_GRF_PHY0_STATUS1, &reg);
+		if (reg & 0x1)
+			break;
+		udelay(1);
+	}
+
+	if (timeout <= 0) {
+		pr_err("%s: phy0 lock failed, check input refclk and power supply\n", __func__);
+		return -ETIMEDOUT;
+	}
+
+	timeout = 500;
+	while (timeout--) {
+		regmap_read(priv->phy_grf, RK3588_PCIE3PHY_GRF_PHY1_STATUS1, &reg);
+		if (reg & 0x1)
+			break;
+		udelay(1);
+	}
+
+	if (timeout <= 0) {
+		pr_err("%s: phy1 lock failed, check input refclk and power supply\n", __func__);
+		return -ETIMEDOUT;
+	}
+
+	return 0;
+}
+
+static const struct rockchip_p3phy_ops rk3588_ops = {
+	.phy_init = &rockchip_p3phy_rk3588_init,
 };
 
 static int rochchip_p3phy_init(struct phy *phy)
@@ -36,51 +139,35 @@ static int rochchip_p3phy_init(struct phy *phy)
 	struct rockchip_p3phy_priv *priv = dev_get_priv(phy->dev);
 	int ret;
 
-	ret = clk_enable(&priv->ref_clk_m);
-	if (ret < 0 && ret != -ENOSYS)
+	ret = clk_enable_bulk(&priv->clks);
+	if (ret) {
+		pr_err("failed to enable clks (ret=%d)\n", ret);
 		return ret;
-
-	ret = clk_enable(&priv->ref_clk_n);
-	if (ret < 0 && ret != -ENOSYS)
-		goto err_ref;
-
-	ret = clk_enable(&priv->pclk);
-	if (ret < 0 && ret != -ENOSYS)
-		goto err_pclk;
+	}
 
 	reset_assert(&priv->p30phy);
 	udelay(1);
 
-	/* Deassert PCIe PMA output clamp mode */
-	regmap_write(priv->phy_grf, GRF_PCIE30PHY_CON9,
-		     (0x1 << 15) | (0x1 << 31));
+	if (priv->ops->phy_init) {
+		ret = priv->ops->phy_init(priv);
+		if (ret) {
+			clk_disable_bulk(&priv->clks);
+			return ret;
+		}
 
-	/* Set bifurcation if needed */
-	if (priv->is_bifurcation) {
-		regmap_write(priv->phy_grf, GRF_PCIE30PHY_CON6,
-			     0x1 | (0xf << 16));
-		regmap_write(priv->phy_grf, GRF_PCIE30PHY_CON1,
-			     (0x1 << 15) | (0x1 << 31));
 	}
 
 	reset_deassert(&priv->p30phy);
-	udelay(1);
+	udelay(5);
 
 	return 0;
-err_pclk:
-	clk_disable(&priv->ref_clk_n);
-err_ref:
-	clk_disable(&priv->ref_clk_m);
-	return ret;
 }
 
 static int rochchip_p3phy_exit(struct phy *phy)
 {
 	struct rockchip_p3phy_priv *priv = dev_get_priv(phy->dev);
 
-	clk_disable(&priv->ref_clk_m);
-	clk_disable(&priv->ref_clk_n);
-	clk_disable(&priv->pclk);
+	clk_disable_bulk(&priv->clks);
 	reset_assert(&priv->p30phy);
 	return 0;
 }
@@ -88,6 +175,7 @@ static int rochchip_p3phy_exit(struct phy *phy)
 static int rockchip_p3phy_probe(struct udevice *dev)
 {
 	struct rockchip_p3phy_priv *priv = dev_get_priv(dev);
+	dev_get_driver_data(dev);
 	struct udevice *syscon;
 	int ret;
 
@@ -95,6 +183,12 @@ static int rockchip_p3phy_probe(struct udevice *dev)
 	if ((fdt_addr_t)priv->mmio == FDT_ADDR_T_NONE)
 		return -EINVAL;
 
+	priv->ops = (struct rockchip_p3phy_ops *)dev_get_driver_data(dev);
+	if (!priv->ops) {
+		dev_err(dev, "no of match data provided\n");
+		return -EINVAL;
+	}
+
 	ret = uclass_get_device_by_phandle(UCLASS_SYSCON, dev,
 					   "rockchip,phy-grf",  &syscon);
 	if (ret) {
@@ -110,28 +204,32 @@ static int rockchip_p3phy_probe(struct udevice *dev)
 
 	dev_dbg(priv->dev, "phy_grf is 0x%llx\n", priv->phy_grf->base);
 
-	ret = reset_get_by_name(dev, "phy", &priv->p30phy);
+	ret = uclass_get_device_by_phandle(UCLASS_SYSCON, dev,
+					   "rockchip,pipe-grf",  &syscon);
 	if (ret) {
-		dev_err(dev, "no phy reset control specified\n");
-		return ret;
+		/* It's optional, rk3568 doesn't need it */
+		priv->pipe_grf = NULL;
+		pr_err("unable to get syscon device for rockchip,pipe-grf\n");
+		goto skip_pipe_grf;
 	}
 
-	ret = clk_get_by_index(dev, 0, &priv->ref_clk_m);
-	if (ret) {
-		dev_err(dev, "failed to find ref clock M\n");
-		return PTR_ERR(&priv->ref_clk_m);
-	}
+	priv->pipe_grf = syscon_get_regmap(syscon);
+	if (IS_ERR(priv->pipe_grf))
+		dev_err(dev, "failed to find rockchip,pipe_grf regmap\n");
+
+
+	priv->pcie30_phymode = dev_read_u32_default(dev, "rockchip,pcie30-phymode", PHY_MODE_PCIE_AGGREGATION);
 
-	ret = clk_get_by_index(dev, 1, &priv->ref_clk_n);
+skip_pipe_grf:
+	ret = reset_get_by_name(dev, "phy", &priv->p30phy);
 	if (ret) {
-		dev_err(dev, "failed to find ref clock N\n");
-		return PTR_ERR(&priv->ref_clk_n);
+		dev_err(dev, "no phy reset control specified\n");
+		return ret;
 	}
 
-	ret = clk_get_by_index(dev, 2, &priv->pclk);
 	if (ret) {
-		dev_err(dev, "failed to find pclk\n");
-		return PTR_ERR(&priv->pclk);
+		dev_err(dev, "Can't get clock: %d\n", ret);
+		return ret;
 	}
 
 	return 0;
@@ -153,7 +251,8 @@ static struct phy_ops rochchip_p3phy_ops = {
 };
 
 static const struct udevice_id rockchip_p3phy_of_match[] = {
-	{ .compatible = "rockchip,rk3568-pcie3-phy" },
+	{ .compatible = "rockchip,rk3568-pcie3-phy", .data = (ulong)&rk3568_ops},
+	{ .compatible = "rockchip,rk3588-pcie3-phy", .data = (ulong)&rk3588_ops },
 	{ },
 };
 

commit 921abd278e3de0f2c243c59e8e4ccde653c48561
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Fri Nov 19 16:11:01 2021 +0800

    clk: rockchip: rk3588: add clk_pciephy
    
    Change-Id: I29075c82c684f02e33caa1b70bdd4e633ee15fcb
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3588.h b/arch/arm/include/asm/arch-rockchip/cru_rk3588.h
index e1f701106d..5e5d3262e5 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3588.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3588.h
@@ -407,6 +407,24 @@ enum {
 	CCLK_SDIO_SRC_DIV_SHIFT			= 2,
 	CCLK_SDIO_SRC_DIV_MASK			= 0x3f << CCLK_SDIO_SRC_DIV_SHIFT,
 
+	/* CRU_CLK_SEL176_CON */
+	CLK_PCIE_PHY1_PLL_DIV_SHIFT		= 6,
+	CLK_PCIE_PHY1_PLL_DIV_MASK		= 0x3f << CLK_PCIE_PHY1_PLL_DIV_SHIFT,
+	CLK_PCIE_PHY0_PLL_DIV_SHIFT		= 0,
+	CLK_PCIE_PHY0_PLL_DIV_MASK		= 0x3f << CLK_PCIE_PHY0_PLL_DIV_SHIFT,
+
+	/* CRU_CLK_SEL177_CON */
+	CLK_PCIE_PHY2_REF_SEL_SHIFT		= 8,
+	CLK_PCIE_PHY2_REF_SEL_MASK		= 1 << CLK_PCIE_PHY2_REF_SEL_SHIFT,
+	CLK_PCIE_PHY1_REF_SEL_SHIFT		= 7,
+	CLK_PCIE_PHY1_REF_SEL_MASK		= 1 << CLK_PCIE_PHY1_REF_SEL_SHIFT,
+	CLK_PCIE_PHY0_REF_SEL_SHIFT		= 6,
+	CLK_PCIE_PHY0_REF_SEL_MASK		= 1 << CLK_PCIE_PHY0_REF_SEL_SHIFT,
+	CLK_PCIE_PHY_REF_SEL_24M		= 0,
+	CLK_PCIE_PHY_REF_SEL_PPLL,
+	CLK_PCIE_PHY2_PLL_DIV_SHIFT		= 0,
+	CLK_PCIE_PHY2_PLL_DIV_MASK		= 0x3f << CLK_PCIE_PHY2_PLL_DIV_SHIFT,
+
 	/* PMUCRU_CLK_SEL3_CON */
 	CLK_I2C0_SEL_SHIFT			= 6,
 	CLK_I2C0_SEL_MASK			= 1 << CLK_I2C0_SEL_SHIFT,
diff --git a/drivers/clk/rockchip/clk_rk3588.c b/drivers/clk/rockchip/clk_rk3588.c
index ce00dd3a4d..07107ea7c1 100644
--- a/drivers/clk/rockchip/clk_rk3588.c
+++ b/drivers/clk/rockchip/clk_rk3588.c
@@ -1329,6 +1329,85 @@ static ulong rk3588_uart_set_rate(struct rk3588_clk_priv *priv,
 
 	return rk3588_uart_get_rate(priv, clk_id);
 }
+
+static ulong rk3588_pciephy_get_rate(struct rk3588_clk_priv *priv, ulong clk_id)
+{
+	struct rk3588_cru *cru = priv->cru;
+	u32 con, div, src;
+
+	switch (clk_id) {
+	case CLK_REF_PIPE_PHY0:
+		con = readl(&cru->clksel_con[177]);
+		src = (con & CLK_PCIE_PHY0_REF_SEL_MASK) >> CLK_PCIE_PHY0_REF_SEL_SHIFT;
+		con = readl(&cru->clksel_con[176]);
+		div = (con & CLK_PCIE_PHY0_PLL_DIV_MASK) >> CLK_PCIE_PHY0_PLL_DIV_SHIFT;
+		break;
+	case CLK_REF_PIPE_PHY1:
+		con = readl(&cru->clksel_con[177]);
+		src = (con & CLK_PCIE_PHY1_REF_SEL_MASK) >> CLK_PCIE_PHY1_REF_SEL_SHIFT;
+		con = readl(&cru->clksel_con[176]);
+		div = (con & CLK_PCIE_PHY1_PLL_DIV_MASK) >> CLK_PCIE_PHY1_PLL_DIV_SHIFT;
+		break;
+	case CLK_REF_PIPE_PHY2:
+		con = readl(&cru->clksel_con[177]);
+		src = (con & CLK_PCIE_PHY2_REF_SEL_MASK) >> CLK_PCIE_PHY2_REF_SEL_SHIFT;
+		div = (con & CLK_PCIE_PHY2_PLL_DIV_MASK) >> CLK_PCIE_PHY2_PLL_DIV_SHIFT;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	if (src == CLK_PCIE_PHY_REF_SEL_PPLL) {
+		return DIV_TO_RATE(priv->ppll_hz, div);
+	} else {
+		return OSC_HZ;
+	}
+}
+
+static ulong rk3588_pciephy_set_rate(struct rk3588_clk_priv *priv,
+				  ulong clk_id, ulong rate)
+{
+	struct rk3588_cru *cru = priv->cru;
+	u32 clk_src, div;
+
+	if (rate == OSC_HZ) {
+		clk_src = CLK_PCIE_PHY_REF_SEL_24M;
+		div = 1;
+	} else {
+		clk_src = CLK_PCIE_PHY_REF_SEL_PPLL;
+		div = DIV_ROUND_UP(priv->ppll_hz, rate);
+	}
+
+	switch (clk_id) {
+	case CLK_REF_PIPE_PHY0:
+		rk_clrsetreg(&cru->clksel_con[177],
+		     CLK_PCIE_PHY0_REF_SEL_MASK,
+		     (clk_src << CLK_PCIE_PHY0_REF_SEL_SHIFT));
+		rk_clrsetreg(&cru->clksel_con[176],
+		     CLK_PCIE_PHY0_PLL_DIV_MASK,
+		     ((div - 1) << CLK_PCIE_PHY0_PLL_DIV_SHIFT));
+		break;
+	case CLK_REF_PIPE_PHY1:
+		rk_clrsetreg(&cru->clksel_con[177],
+		     CLK_PCIE_PHY1_REF_SEL_MASK,
+		     (clk_src << CLK_PCIE_PHY1_REF_SEL_SHIFT));
+		rk_clrsetreg(&cru->clksel_con[176],
+		     CLK_PCIE_PHY1_PLL_DIV_MASK,
+		     ((div - 1) << CLK_PCIE_PHY1_PLL_DIV_SHIFT));
+		break;
+	case CLK_REF_PIPE_PHY2:
+		rk_clrsetreg(&cru->clksel_con[177],
+		     CLK_PCIE_PHY2_REF_SEL_MASK |
+		     CLK_PCIE_PHY2_PLL_DIV_MASK,
+		     (clk_src << CLK_PCIE_PHY2_REF_SEL_SHIFT) |
+		     ((div - 1) << CLK_PCIE_PHY2_PLL_DIV_SHIFT));
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return rk3588_pciephy_get_rate(priv, clk_id);
+}
 #endif
 
 static ulong rk3588_clk_get_rate(struct clk *clk)
@@ -1341,6 +1420,11 @@ static ulong rk3588_clk_get_rate(struct clk *clk)
 		return -ENOENT;
 	}
 
+	if (!priv->ppll_hz) {
+		priv->ppll_hz = rockchip_pll_get_rate(&rk3588_pll_clks[PPLL],
+						      priv->cru, PPLL);
+	}
+
 	switch (clk->id) {
 	case PLL_LPLL:
 		rate = rockchip_pll_get_rate(&rk3588_pll_clks[LPLL], priv->cru,
@@ -1455,6 +1539,11 @@ static ulong rk3588_clk_get_rate(struct clk *clk)
 	case SCLK_UART9:
 		rate = rk3588_uart_get_rate(priv, clk->id);
 		break;
+	case CLK_REF_PIPE_PHY0:
+	case CLK_REF_PIPE_PHY1:
+	case CLK_REF_PIPE_PHY2:
+		rate = rk3588_pciephy_get_rate(priv, clk->id);
+		break;
 #endif
 	default:
 		return -ENOENT;
@@ -1473,6 +1562,11 @@ static ulong rk3588_clk_set_rate(struct clk *clk, ulong rate)
 		return -ENOENT;
 	}
 
+	if (!priv->ppll_hz) {
+		priv->ppll_hz = rockchip_pll_get_rate(&rk3588_pll_clks[PPLL],
+						      priv->cru, PPLL);
+	}
+
 	switch (clk->id) {
 	case PLL_CPLL:
 		ret = rockchip_pll_set_rate(&rk3588_pll_clks[CPLL], priv->cru,
@@ -1585,6 +1679,11 @@ static ulong rk3588_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_UART9:
 		ret = rk3588_uart_set_rate(priv, clk->id, rate);
 		break;
+	case CLK_REF_PIPE_PHY0:
+	case CLK_REF_PIPE_PHY1:
+	case CLK_REF_PIPE_PHY2:
+		ret = rk3588_pciephy_set_rate(priv, clk->id, rate);
+		break;
 #endif
 	default:
 		return -ENOENT;

commit abcec002fa44ccf08835d5f31c5b633e2f7db761
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Nov 19 16:51:33 2021 +0800

    driver: pci: rockchip: Support max_link_speed dts property
    
    Change-Id: Ic549e3619e52b81ff951c7437532333aff4f3535
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/pci/pcie_dw_rockchip.c b/drivers/pci/pcie_dw_rockchip.c
index dfa65b8dd9..ac06500c54 100644
--- a/drivers/pci/pcie_dw_rockchip.c
+++ b/drivers/pci/pcie_dw_rockchip.c
@@ -36,6 +36,7 @@ struct rk_pcie {
 	struct pci_region	io;
 	struct pci_region	mem;
 	bool		is_bifurcation;
+	u32 gen;
 };
 
 enum {
@@ -607,7 +608,7 @@ static int rockchip_pcie_init_port(struct udevice *dev)
 	rk_pcie_writel_apb(priv, 0x0, 0xf00040);
 	rk_pcie_setup_host(priv);
 
-	ret = rk_pcie_link_up(priv, LINK_SPEED_GEN_3);
+	ret = rk_pcie_link_up(priv, priv->gen);
 	if (ret < 0)
 		goto err_link_up;
 
@@ -626,6 +627,7 @@ err_exit_phy:
 static int rockchip_pcie_parse_dt(struct udevice *dev)
 {
 	struct rk_pcie *priv = dev_get_priv(dev);
+	u32 max_link_speed;
 	int ret;
 
 	priv->dbi_base = (void *)dev_read_addr_index(dev, 0);
@@ -675,6 +677,12 @@ static int rockchip_pcie_parse_dt(struct udevice *dev)
 	if (dev_read_bool(dev, "rockchip,bifurcation"))
 		priv->is_bifurcation = true;
 
+	ret = ofnode_read_u32(dev->node, "max-link-speed", &max_link_speed);
+	if (ret < 0 || max_link_speed > 4)
+		priv->gen = 0;
+	else
+		priv->gen = max_link_speed;
+
 	return 0;
 }
 

commit cef4c53b25226c94a329d7141b0c58222a3c59bf
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Nov 19 16:04:43 2021 +0800

    rockchip: rkimg: Add pci_init before nvme scan
    
    board_r pci early init is too late.
    
    Change-Id: I3976c79cf8f03aa09880e28e57cc05103aa9e7cd
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_rkimg.c b/arch/arm/mach-rockchip/boot_rkimg.c
index 2be234378a..7af3a3c749 100644
--- a/arch/arm/mach-rockchip/boot_rkimg.c
+++ b/arch/arm/mach-rockchip/boot_rkimg.c
@@ -71,6 +71,7 @@ static void boot_devtype_init(void)
 #ifdef CONFIG_NVME
 	struct udevice *udev;
 
+	pci_init();
 	ret = nvme_scan_namespace();
 	if (!ret) {
 		ret = blk_get_device(IF_TYPE_NVME, 0, &udev);

commit 323eee11f16d4a02cb361bd32e141b4bfd3bdc31
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Nov 19 15:58:41 2021 +0800

    driver: pci: rockchip: Add rk3588 compatible
    
    Change-Id: I8585f45260354649c64c9ce69b26fadea0025d14
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/pci/pcie_dw_rockchip.c b/drivers/pci/pcie_dw_rockchip.c
index dfd56b6ad8..dfa65b8dd9 100644
--- a/drivers/pci/pcie_dw_rockchip.c
+++ b/drivers/pci/pcie_dw_rockchip.c
@@ -752,6 +752,7 @@ static const struct dm_pci_ops rockchip_pcie_ops = {
 
 static const struct udevice_id rockchip_pcie_ids[] = {
 	{ .compatible = "rockchip,rk3568-pcie" },
+	{ .compatible = "rockchip,rk3588-pcie" },
 	{ }
 };
 

commit cf3c44cb26fc80c5f1bd3c3fd57d2d4f4ab569b3
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Nov 19 15:55:04 2021 +0800

    phy: rockchip: naneng-combphy: Support rk3588
    
    The PHY clock is fixed at 100MHz
    
    Change-Id: I1331cf964ebf427f1d4def209c527158c96bfbe2
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/phy/phy-rockchip-naneng-combphy.c b/drivers/phy/phy-rockchip-naneng-combphy.c
index 611887b29c..beed15ee36 100644
--- a/drivers/phy/phy-rockchip-naneng-combphy.c
+++ b/drivers/phy/phy-rockchip-naneng-combphy.c
@@ -57,6 +57,7 @@ struct rockchip_combphy_grfcfg {
 	struct combphy_reg con2_for_sata;
 	struct combphy_reg con3_for_sata;
 	struct combphy_reg pipe_con0_for_sata;
+	struct combphy_reg pipe_con1_for_sata;
 	struct combphy_reg pipe_sgmii_mac_sel;
 	struct combphy_reg pipe_xpcs_phy_ready;
 	struct combphy_reg u3otg0_port_en;
@@ -236,7 +237,7 @@ static int rockchip_combphy_parse_dt(struct udevice *dev,
 
 	ret = uclass_get_device_by_phandle(UCLASS_SYSCON, dev, "rockchip,pipe-grf", &syscon);
 	if (ret) {
-		dev_err(dev, "failed to find peri_ctrl pipe-grf regmap");
+		dev_err(dev, "failed to find peri_ctrl pipe-grf regmap ret= %d\n", ret);
 		return ret;
 	}
 	priv->pipe_grf = syscon_get_regmap(syscon);
@@ -429,11 +430,83 @@ static const struct rockchip_combphy_cfg rk3568_combphy_cfgs = {
 	.combphy_cfg	= rk3568_combphy_cfg,
 };
 
+static int rk3588_combphy_cfg(struct rockchip_combphy_priv *priv)
+{
+	const struct rockchip_combphy_grfcfg *cfg = priv->cfg->grfcfg;
+
+	switch (priv->mode) {
+	case PHY_TYPE_PCIE:
+		param_write(priv->phy_grf, &cfg->con0_for_pcie, true);
+		param_write(priv->phy_grf, &cfg->con1_for_pcie, true);
+		param_write(priv->phy_grf, &cfg->con2_for_pcie, true);
+		param_write(priv->phy_grf, &cfg->con3_for_pcie, true);
+		break;
+	case PHY_TYPE_USB3:
+		param_write(priv->phy_grf, &cfg->pipe_txcomp_sel, false);
+		param_write(priv->phy_grf, &cfg->pipe_txelec_sel, false);
+		param_write(priv->phy_grf, &cfg->usb_mode_set, true);
+		break;
+	case PHY_TYPE_SATA:
+		param_write(priv->phy_grf, &cfg->con0_for_sata, true);
+		param_write(priv->phy_grf, &cfg->con1_for_sata, true);
+		param_write(priv->phy_grf, &cfg->con2_for_sata, true);
+		param_write(priv->phy_grf, &cfg->con3_for_sata, true);
+		param_write(priv->pipe_grf, &cfg->pipe_con0_for_sata, true);
+		param_write(priv->pipe_grf, &cfg->pipe_con1_for_sata, true);
+		break;
+	case PHY_TYPE_SGMII:
+	case PHY_TYPE_QSGMII:
+	default:
+		dev_err(priv->dev, "incompatible PHY type\n");
+		return -EINVAL;
+	}
+
+	param_write(priv->phy_grf, &cfg->pipe_clk_100m, true);
+
+	return 0;
+}
+
+static const struct rockchip_combphy_grfcfg rk3588_combphy_grfcfgs = {
+	/* pipe-phy-grf */
+	.pcie_mode_set		= { 0x0000, 5, 0, 0x00, 0x11 },
+	.usb_mode_set		= { 0x0000, 5, 0, 0x00, 0x04 },
+	.pipe_rxterm_set	= { 0x0000, 12, 12, 0x00, 0x01 },
+	.pipe_txelec_set	= { 0x0004, 1, 1, 0x00, 0x01 },
+	.pipe_txcomp_set	= { 0x0004, 4, 4, 0x00, 0x01 },
+	.pipe_clk_25m		= { 0x0004, 14, 13, 0x00, 0x01 },
+	.pipe_clk_100m		= { 0x0004, 14, 13, 0x00, 0x02 },
+	.pipe_rxterm_sel	= { 0x0008, 8, 8, 0x00, 0x01 },
+	.pipe_txelec_sel	= { 0x0008, 12, 12, 0x00, 0x01 },
+	.pipe_txcomp_sel	= { 0x0008, 15, 15, 0x00, 0x01 },
+	.pipe_clk_ext		= { 0x000c, 9, 8, 0x02, 0x01 },
+	.pipe_phy_status	= { 0x0034, 6, 6, 0x01, 0x00 },
+	.con0_for_pcie		= { 0x0000, 15, 0, 0x00, 0x1000 },
+	.con1_for_pcie		= { 0x0004, 15, 0, 0x00, 0x0000 },
+	.con2_for_pcie		= { 0x0008, 15, 0, 0x00, 0x0101 },
+	.con3_for_pcie		= { 0x000c, 15, 0, 0x00, 0x0200 },
+	.con0_for_sata		= { 0x0000, 15, 0, 0x00, 0x0129 },
+	.con1_for_sata		= { 0x0004, 15, 0, 0x00, 0x0040 },
+	.con2_for_sata		= { 0x0008, 15, 0, 0x00, 0x80c1 },
+	.con3_for_sata		= { 0x000c, 15, 0, 0x00, 0x0407 },
+	/* pipe-grf */
+	.pipe_con0_for_sata	= { 0x0000, 11, 5, 0x00, 0x22 },
+	.pipe_con1_for_sata	= { 0x0000, 2, 0, 0x00, 0x2 },
+};
+
+static const struct rockchip_combphy_cfg rk3588_combphy_cfgs = {
+	.grfcfg		= &rk3588_combphy_grfcfgs,
+	.combphy_cfg	= rk3588_combphy_cfg,
+};
+
 static const struct udevice_id rockchip_combphy_ids[] = {
 	{
 		.compatible = "rockchip,rk3568-naneng-combphy",
 		.data = (ulong)&rk3568_combphy_cfgs
 	},
+	{
+		.compatible = "rockchip,rk3588-naneng-combphy",
+		.data = (ulong)&rk3588_combphy_cfgs
+	},
 	{ }
 };
 

commit c8a22fb85e7897da3a0a3ede4705e54e9f18eba3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 18 12:06:58 2021 +0000

    scripts: sync repack-bootimg from kernel 5.10
    
    sync from commit:
    (1c21a1cc6b07 power: supply: cw2015: support dual cell)
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ie978d070152366b2899cbb4a3d717459b5b0e470

diff --git a/scripts/repack-bootimg b/scripts/repack-bootimg
index 643a2fef25..997dec00ea 100755
--- a/scripts/repack-bootimg
+++ b/scripts/repack-bootimg
@@ -3,8 +3,6 @@
 # Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd.
 set -e
 
-ARGC=$#
-
 usage() {
 	cat >&2 << USAGE
 usage: $0 [-h] [-z] --boot_img BOOT_IMG [--out OUT] [--kernel KERNEL] [--ramdisk RAMDISK] [--second SECOND] [--dtb DTB ] [--recovery_dtbo RECOVERY_DTBO] -o OUTPUT
@@ -120,32 +118,11 @@ log="$out/unpack.log"
 mkdir -p $out
 $srctree/scripts/unpack_bootimg --boot_img $boot_img --out $out > $log
 
-if [ $ARGC -eq 4 ]; then
-	$srctree/scripts/unpack_resource.sh $second out/resource/ > /dev/null
-	$srctree/tools/resource_tool --root=out/resource --image=$second out/resource/* > /dev/null
-fi
-
 cmdline=$(grep -a "^command line args: " $log | tr '\0' '\n'| sed "s/^command line args: //")
 extra_cmdline=$(grep -a "^additional command line args: " $log | tr '\0' '\n'| sed "s/^additional command line args: //")
 version=$(grep -a "^boot image header version: " $log | sed "s/^boot image header version: //")
-
-os_version_patch_level=$(grep -a "^os version and patch level: " $log | sed "s/^os version and patch level: //")
-
-v=$(($os_version_patch_level >> 11))
-a=$(($v >> 14))
-b=$((($v >> 7) & 0x7f))
-c=$(($v & 0x7f))
-os_version=$(printf '%d.%d.%d' $a $b $c)
-
-v=$(($os_version_patch_level & 0x7ff))
-y=$((($v >> 4) + 2000))
-m=$((($v & 15)))
-
-if [ $m -eq 0 ]; then
-	m=1
-fi
-
-os_patch_level=$(printf '%d-%02d-01' $y $m)
+os_version=$(grep -a "^os version: " $log | sed "s/^os version: //")
+os_patch_level=$(grep -a "^os patch level: " $log | sed "s/^os patch level: //")
 
 dtb_size=$(grep -a "^dtb size: " $log | sed "s/^dtb size: //")
 dtb_size=${dtb_size:-0}
@@ -159,9 +136,13 @@ if [ $recovery_dtbo_size -gt 0 -a -e "$recovery_dtbo" ]; then
 	RECOVERY_DTBO="--recovery_dtbo $recovery_dtbo"
 fi
 
+if [ $version -lt 3 ]; then
+	SECOND="--second $second"
+fi
+
 $srctree/scripts/mkbootimg \
 --kernel $kernel \
---second $second \
+$SECOND \
 --ramdisk $ramdisk \
 $DTB \
 $RECOVERY_DTBO \
@@ -170,5 +151,3 @@ $RECOVERY_DTBO \
 --os_version $os_version \
 --os_patch_level $os_patch_level \
 --output $output
-
-echo -e "\nRepack Image is ready: $output\n"

commit b04be81515602e2af96abd3a3ed627814b839722
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Nov 18 21:02:54 2021 +0800

    rockchip: otp: add rk3588 secure otp driver
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Iaa4b0193c3e2c673e4caba868e624a076a4d4d2d

diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index a7ee3c79e2..bfc9f371a9 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -75,4 +75,8 @@ ifdef CONFIG_ROCKCHIP_RV1126
 obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_SECURE_OTP) += rv1126-secure-otp.o
 endif
 
+ifdef CONFIG_ROCKCHIP_RK3588
+obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_SECURE_OTP) += rk3588-secure-otp.o
+endif
+
 obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_HW_DECOMPRESS) += rockchip_decompress.o
diff --git a/drivers/misc/rk3588-secure-otp.S b/drivers/misc/rk3588-secure-otp.S
new file mode 100644
index 0000000000..9a7cd56ca2
--- /dev/null
+++ b/drivers/misc/rk3588-secure-otp.S
@@ -0,0 +1,7874 @@
+	.arch armv8-a+nosimd
+	.file	"rk3588-secure-otp.c"
+	.text
+.Ltext0:
+	.cfi_sections	.debug_frame
+	.section	.text.secure_otp_ioctl,"ax",@progbits
+	.align	2
+	.type	secure_otp_ioctl, %function
+secure_otp_ioctl:
+.LFB274:
+	.file 1 "drivers/misc/rk3588-secure-otp.c"
+	.loc 1 232 0
+	.cfi_startproc
+.LVL0:
+	.loc 1 235 0
+	mov	x0, 27908
+.LVL1:
+	cmp	x1, x0
+	bne	.L5
+.LVL2:
+.LBB14:
+.LBB15:
+	.loc 1 224 0
+	mov	w0, 8
+	str	w0, [x2]
+.LVL3:
+.LBE15:
+.LBE14:
+	.loc 1 237 0
+	mov	w0, 0
+	.loc 1 238 0
+	ret
+.LVL4:
+.L5:
+	.loc 1 233 0
+	mov	w0, -22
+	.loc 1 244 0
+	ret
+	.cfi_endproc
+.LFE274:
+	.size	secure_otp_ioctl, .-secure_otp_ioctl
+	.section	.text.secure_otp_write,"ax",@progbits
+	.align	2
+	.type	secure_otp_write, %function
+secure_otp_write:
+.LFB272:
+	.loc 1 216 0
+	.cfi_startproc
+.LVL5:
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	mov	x19, x0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -16
+	.cfi_offset 22, -8
+	.loc 1 216 0
+	mov	w20, w1
+	mov	x21, x2
+	mov	w22, w3
+	.loc 1 217 0
+	bl	dev_get_driver_data
+.LVL6:
+	.loc 1 219 0
+	ldr	x4, [x0, 8]
+	mov	w3, w22
+	mov	x2, x21
+	mov	w1, w20
+	mov	x0, x19
+.LVL7:
+	.loc 1 220 0
+	ldp	x21, x22, [sp, 32]
+.LVL8:
+	ldp	x19, x20, [sp, 16]
+.LVL9:
+	ldp	x29, x30, [sp], 48
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	.loc 1 219 0
+	br	x4
+.LVL10:
+	.cfi_endproc
+.LFE272:
+	.size	secure_otp_write, .-secure_otp_write
+	.section	.text.secure_otp_read,"ax",@progbits
+	.align	2
+	.type	secure_otp_read, %function
+secure_otp_read:
+.LFB271:
+	.loc 1 208 0
+	.cfi_startproc
+.LVL11:
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	mov	x19, x0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -16
+	.cfi_offset 22, -8
+	.loc 1 208 0
+	mov	w20, w1
+	mov	x21, x2
+	mov	w22, w3
+	.loc 1 209 0
+	bl	dev_get_driver_data
+.LVL12:
+	.loc 1 211 0
+	ldr	x4, [x0]
+	mov	w3, w22
+	mov	x2, x21
+	mov	w1, w20
+	mov	x0, x19
+.LVL13:
+	.loc 1 212 0
+	ldp	x21, x22, [sp, 32]
+.LVL14:
+	ldp	x19, x20, [sp, 16]
+.LVL15:
+	ldp	x29, x30, [sp], 48
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	.loc 1 211 0
+	br	x4
+.LVL16:
+	.cfi_endproc
+.LFE271:
+	.size	secure_otp_read, .-secure_otp_read
+	.section	.text.rockchip_secure_otp_ofdata_to_platdata,"ax",@progbits
+	.align	2
+	.type	rockchip_secure_otp_ofdata_to_platdata, %function
+rockchip_secure_otp_ofdata_to_platdata:
+.LFB275:
+	.loc 1 253 0
+	.cfi_startproc
+.LVL17:
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -16
+	.cfi_offset 20, -8
+	.loc 1 253 0
+	mov	x20, x0
+	.loc 1 254 0
+	bl	dev_get_platdata
+.LVL18:
+	mov	x19, x0
+.LVL19:
+	.loc 1 256 0
+	mov	x0, x20
+.LVL20:
+	bl	dev_read_addr_ptr
+.LVL21:
+	.loc 1 257 0
+	mov	w2, 0
+	adrp	x1, .LC0
+	.loc 1 256 0
+	str	x0, [x19]
+	.loc 1 257 0
+	add	x1, x1, :lo12:.LC0
+	mov	x0, x20
+	bl	dev_read_u32_default
+.LVL22:
+	.loc 1 258 0
+	uxtw	x0, w0
+	str	x0, [x19, 8]
+	.loc 1 259 0
+	mov	w2, 0
+	mov	x0, x20
+	adrp	x1, .LC1
+	add	x1, x1, :lo12:.LC1
+	bl	dev_read_u32_default
+.LVL23:
+	.loc 1 260 0
+	uxtw	x0, w0
+	str	x0, [x19, 16]
+	.loc 1 261 0
+	mov	w2, 0
+	mov	x0, x20
+	adrp	x1, .LC2
+	add	x1, x1, :lo12:.LC2
+	bl	dev_read_u32_default
+.LVL24:
+	.loc 1 262 0
+	uxtw	x0, w0
+	str	x0, [x19, 24]
+	.loc 1 265 0
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+.LVL25:
+	ldp	x29, x30, [sp], 32
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE275:
+	.size	rockchip_secure_otp_ofdata_to_platdata, .-rockchip_secure_otp_ofdata_to_platdata
+	.section	.text.rk3588_secure_otp_read_byte.isra.0,"ax",@progbits
+	.align	2
+	.type	rk3588_secure_otp_read_byte.isra.0, %function
+rk3588_secure_otp_read_byte.isra.0:
+.LFB276:
+	.loc 1 62 0
+	.cfi_startproc
+.LVL26:
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	mov	x20, x0
+.LBB16:
+	.loc 1 68 0
+	mov	w0, 4
+.LBE16:
+	.loc 1 62 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -16
+	.cfi_offset 22, -8
+	.loc 1 62 0
+	mov	w19, w2
+	mov	x22, x1
+.LBB17:
+	.loc 1 68 0
+	sdiv	w0, w2, w0
+	lsl	w0, w0, 16
+	orr	w0, w0, 256
+.LVL27:
+#APP
+// 68 "drivers/misc/rk3588-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x1, [x20]
+.LVL28:
+	str	w0, [x1, 4]
+.LVL29:
+.LBE17:
+.LBB18:
+	.loc 1 69 0
+#APP
+// 69 "drivers/misc/rk3588-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x20]
+.LVL30:
+	mov	w1, 1
+.LVL31:
+	mov	w21, 10001
+	str	w1, [x0, 8]
+.LVL32:
+.L16:
+.LBE18:
+.LBB19:
+	.loc 1 74 0
+	ldr	x0, [x20]
+	ldr	w1, [x0, 132]
+.LVL33:
+#APP
+// 74 "drivers/misc/rk3588-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+.LVL34:
+#NO_APP
+.LBE19:
+	.loc 1 75 0
+	tbz	x1, 1, .L13
+.LVL35:
+.LBB20:
+	.loc 1 76 0
+#APP
+// 76 "drivers/misc/rk3588-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x20]
+	str	w1, [x0, 132]
+.LBE20:
+	.loc 1 86 0
+	cbnz	x22, .L14
+.LVL36:
+.L19:
+	.loc 1 91 0
+	mov	w0, 0
+.LVL37:
+.L12:
+	.loc 1 94 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+.LVL38:
+	ldp	x29, x30, [sp], 48
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL39:
+.L13:
+	.cfi_restore_state
+	.loc 1 80 0
+	subs	w21, w21, #1
+.LVL40:
+	beq	.L17
+	.loc 1 83 0
+	mov	x0, 1
+	bl	udelay
+.LVL41:
+	b	.L16
+.LVL42:
+.L14:
+.LBB21:
+	.loc 1 87 0
+	ldr	w3, [x0, 32]
+.LVL43:
+#APP
+// 87 "drivers/misc/rk3588-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+.LVL44:
+#NO_APP
+.LBE21:
+	.loc 1 88 0
+	negs	w0, w19
+	and	w19, w19, 3
+.LVL45:
+	and	w2, w0, 3
+	csneg	w2, w19, w2, mi
+	lsl	w2, w2, 3
+	lsr	w2, w3, w2
+	strb	w2, [x22]
+	b	.L19
+.LVL46:
+.L17:
+.L15:
+	.loc 1 65 0
+	mov	w0, -1
+	b	.L12
+	.cfi_endproc
+.LFE276:
+	.size	rk3588_secure_otp_read_byte.isra.0, .-rk3588_secure_otp_read_byte.isra.0
+	.section	.text.rk3588_secure_otp_read,"ax",@progbits
+	.align	2
+	.type	rk3588_secure_otp_read, %function
+rk3588_secure_otp_read:
+.LFB267:
+	.loc 1 98 0
+	.cfi_startproc
+.LVL47:
+	stp	x29, x30, [sp, -64]!
+	.cfi_def_cfa_offset 64
+	.cfi_offset 29, -64
+	.cfi_offset 30, -56
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -16
+	.cfi_offset 24, -8
+	mov	x24, x2
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -48
+	.cfi_offset 20, -40
+	mov	w20, w1
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -32
+	.cfi_offset 22, -24
+	.loc 1 98 0
+	mov	w22, w3
+	.loc 1 99 0
+	bl	dev_get_platdata
+.LVL48:
+	mov	x23, x0
+.LVL49:
+	.loc 1 102 0
+	cmp	w20, 32
+	sub	w0, w20, #336
+.LVL50:
+	ccmp	w0, 7, 0, ne
+	bls	.L26
+	.loc 1 102 0 is_stmt 0 discriminator 1
+	sub	w0, w20, #2496
+	cmp	w0, 63
+	bls	.L26
+	.loc 1 102 0 discriminator 2
+	sub	w0, w20, #416
+	mov	x19, 0
+	cmp	w0, 95
+	bls	.L23
+	.loc 1 106 0 is_stmt 1
+	mov	w21, -1
+	.loc 1 105 0
+	mov	w1, w20
+	adrp	x0, .LC3
+	add	x0, x0, :lo12:.LC3
+	bl	printf
+.LVL51:
+.L20:
+	.loc 1 118 0
+	mov	w0, w21
+	ldp	x19, x20, [sp, 16]
+.LVL52:
+	ldp	x21, x22, [sp, 32]
+.LVL53:
+	ldp	x23, x24, [sp, 48]
+.LVL54:
+	ldp	x29, x30, [sp], 64
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL55:
+.L24:
+	.cfi_restore_state
+	.loc 1 110 0
+	add	w2, w20, w19
+	add	x1, x24, x19
+	mov	x0, x23
+	add	x19, x19, 1
+.LVL56:
+	bl	rk3588_secure_otp_read_byte.isra.0
+.LVL57:
+	mov	w21, w0
+.LVL58:
+	.loc 1 111 0
+	cbz	w0, .L23
+	.loc 1 112 0
+	adrp	x0, .LC4
+.LVL59:
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+.LVL60:
+	.loc 1 113 0
+	b	.L20
+.LVL61:
+.L26:
+	mov	x19, 0
+.L23:
+.LVL62:
+	.loc 1 109 0 discriminator 1
+	cmp	w22, w19
+	bgt	.L24
+	.loc 1 117 0
+	mov	w21, 0
+	b	.L20
+	.cfi_endproc
+.LFE267:
+	.size	rk3588_secure_otp_read, .-rk3588_secure_otp_read
+	.section	.text.rk3588_secure_otp_write,"ax",@progbits
+	.align	2
+	.type	rk3588_secure_otp_write, %function
+rk3588_secure_otp_write:
+.LFB270:
+	.loc 1 167 0
+	.cfi_startproc
+.LVL63:
+	stp	x29, x30, [sp, -112]!
+	.cfi_def_cfa_offset 112
+	.cfi_offset 29, -112
+	.cfi_offset 30, -104
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -80
+	.cfi_offset 22, -72
+	mov	x21, x2
+	stp	x19, x20, [sp, 16]
+	mov	w22, w3
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 19, -96
+	.cfi_offset 20, -88
+	.cfi_offset 25, -48
+	.cfi_offset 26, -40
+	.loc 1 172 0
+	sub	w20, w1, #336
+	.loc 1 167 0
+	mov	w25, w1
+	str	x27, [sp, 80]
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 27, -32
+	.cfi_offset 23, -64
+	.cfi_offset 24, -56
+	.loc 1 168 0
+	bl	dev_get_platdata
+.LVL64:
+	.loc 1 170 0
+	strb	wzr, [x29, 111]
+	.loc 1 172 0
+	cmp	w25, 32
+	.loc 1 168 0
+	mov	x27, x0
+.LVL65:
+	.loc 1 172 0
+	ccmp	w20, 7, 0, ne
+	bls	.L44
+	.loc 1 172 0 is_stmt 0 discriminator 1
+	sub	w0, w25, #2496
+.LVL66:
+	cmp	w0, 63
+	bls	.L44
+	.loc 1 172 0 discriminator 2
+	sub	w0, w25, #416
+	cmp	w0, 95
+	bhi	.L33
+.L44:
+	mov	x19, 0
+.LBB31:
+.LBB32:
+	.loc 1 162 0 is_stmt 1
+	mov	w23, 4
+.LBB33:
+.LBB34:
+.LBB35:
+	.loc 1 131 0
+	mov	w24, 1
+.L34:
+.LVL67:
+.LBE35:
+.LBE34:
+.LBE33:
+.LBE32:
+.LBE31:
+	.loc 1 179 0 discriminator 1
+	cmp	w22, w19
+	bgt	.L42
+	.loc 1 203 0
+	mov	w26, 0
+	b	.L31
+.LVL68:
+.L33:
+	.loc 1 175 0
+	adrp	x0, .LC3
+	mov	w1, w25
+	add	x0, x0, :lo12:.LC3
+	bl	printf
+.LVL69:
+.L53:
+	.loc 1 199 0
+	mov	w26, -1
+	b	.L31
+.LVL70:
+.L42:
+	.loc 1 180 0
+	cmp	w20, 7
+	bls	.L36
+	.loc 1 183 0
+	strb	wzr, [x29, 111]
+	.loc 1 184 0
+	add	w2, w25, w19
+	add	x1, x29, 111
+	mov	x0, x27
+	bl	rk3588_secure_otp_read_byte.isra.0
+.LVL71:
+	mov	w26, w0
+.LVL72:
+	.loc 1 185 0
+	cbz	w0, .L36
+	.loc 1 186 0
+	adrp	x0, .LC5
+.LVL73:
+	add	x0, x0, :lo12:.LC5
+	bl	printf
+.LVL74:
+.L31:
+	.loc 1 204 0
+	mov	w0, w26
+	ldr	x27, [sp, 80]
+.LVL75:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+.LVL76:
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+.LVL77:
+	ldp	x29, x30, [sp], 112
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL78:
+.L36:
+	.cfi_restore_state
+	.loc 1 191 0
+	ldrb	w0, [x29, 111]
+	cbz	w0, .L37
+	.loc 1 192 0
+	adrp	x0, .LC6
+	add	x0, x0, :lo12:.LC6
+.L52:
+	.loc 1 198 0
+	bl	printf
+.LVL79:
+	b	.L53
+.L37:
+	add	w0, w25, w19
+.LVL80:
+.LBB46:
+.LBB45:
+	.loc 1 160 0
+	ldrb	w2, [x21, x19]
+.LVL81:
+	.loc 1 162 0
+	negs	w1, w0
+	and	w3, w0, 3
+	and	w1, w1, 3
+	csneg	w1, w3, w1, mi
+	lsl	w1, w1, 3
+	lsl	w1, w2, w1
+.LVL82:
+.LBB43:
+.LBB41:
+	.loc 1 126 0
+	cbz	w1, .L38
+.LBE41:
+.LBE43:
+	.loc 1 162 0
+	sdiv	w0, w0, w23
+.LVL83:
+.LBB44:
+.LBB42:
+.LBB36:
+	.loc 1 129 0
+	lsl	w0, w0, 16
+	orr	w0, w0, 2
+.LVL84:
+#APP
+// 129 "drivers/misc/rk3588-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x2, [x27]
+.LVL85:
+	str	w0, [x2, 4]
+.LVL86:
+.LBE36:
+.LBB37:
+	.loc 1 130 0
+#APP
+// 130 "drivers/misc/rk3588-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LVL87:
+	str	w1, [x0, 16]
+.LVL88:
+.LBE37:
+.LBB38:
+	.loc 1 131 0
+#APP
+// 131 "drivers/misc/rk3588-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w26, 10001
+	str	w24, [x0, 8]
+.LVL89:
+.L41:
+.LBE38:
+.LBB39:
+	.loc 1 139 0
+	ldr	x0, [x27]
+	ldr	w0, [x0, 132]
+.LVL90:
+#APP
+// 139 "drivers/misc/rk3588-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+.LVL91:
+#NO_APP
+.LBE39:
+	.loc 1 140 0
+	tbz	x0, 3, .L39
+.LVL92:
+.LBB40:
+	.loc 1 141 0
+#APP
+// 141 "drivers/misc/rk3588-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x1, [x27]
+	str	w0, [x1, 132]
+.LVL93:
+.L38:
+	add	x19, x19, 1
+.LVL94:
+	b	.L34
+.LVL95:
+.L39:
+.LBE40:
+	.loc 1 146 0
+	subs	w26, w26, #1
+.LVL96:
+	beq	.L40
+	.loc 1 150 0
+	mov	x0, 1
+.LVL97:
+	bl	udelay
+.LVL98:
+	b	.L41
+.LVL99:
+.L40:
+.LBE42:
+.LBE44:
+.LBE45:
+.LBE46:
+	.loc 1 198 0
+	adrp	x0, .LC7
+	add	x0, x0, :lo12:.LC7
+	b	.L52
+	.cfi_endproc
+.LFE270:
+	.size	rk3588_secure_otp_write, .-rk3588_secure_otp_write
+	.global	_u_boot_list_2_driver_2_rockchip_secure_otp
+	.section	.rodata.rk3588_data,"a",@progbits
+	.align	3
+	.type	rk3588_data, %object
+	.size	rk3588_data, 32
+rk3588_data:
+	.xword	rk3588_secure_otp_read
+	.xword	rk3588_secure_otp_write
+	.zero	16
+	.section	.rodata.rk3588_secure_otp_read.str1.1,"aMS",@progbits,1
+.LC3:
+	.string	"Please input correct addr, offset is %x\n"
+.LC4:
+	.string	"Read secure otp fail."
+	.section	.rodata.rk3588_secure_otp_write.str1.1,"aMS",@progbits,1
+.LC5:
+	.string	"Read secure otp fail.\n"
+.LC6:
+	.string	"The region has been written.\n"
+.LC7:
+	.string	"Write secure otp fail.\n"
+	.section	.rodata.rockchip_otp_ids,"a",@progbits
+	.align	3
+	.type	rockchip_otp_ids, %object
+	.size	rockchip_otp_ids, 32
+rockchip_otp_ids:
+	.xword	.LC9
+	.xword	rk3588_data
+	.zero	16
+	.section	.rodata.rockchip_secure_otp_ofdata_to_platdata.str1.1,"aMS",@progbits,1
+.LC0:
+	.string	"secure_conf"
+.LC1:
+	.string	"mask_addr"
+.LC2:
+	.string	"cru_rst_addr"
+	.section	.rodata.rockchip_secure_otp_ops,"a",@progbits
+	.align	3
+	.type	rockchip_secure_otp_ops, %object
+	.size	rockchip_secure_otp_ops, 32
+rockchip_secure_otp_ops:
+	.xword	secure_otp_read
+	.xword	secure_otp_write
+	.xword	secure_otp_ioctl
+	.zero	8
+	.section	.rodata.str1.1,"aMS",@progbits,1
+.LC8:
+	.string	"rockchip_secure_otp"
+.LC9:
+	.string	"rockchip,rk3588-secure-otp"
+	.section	.u_boot_list_2_driver_2_rockchip_secure_otp,"aw",@progbits
+	.align	2
+	.type	_u_boot_list_2_driver_2_rockchip_secure_otp, %object
+	.size	_u_boot_list_2_driver_2_rockchip_secure_otp, 120
+_u_boot_list_2_driver_2_rockchip_secure_otp:
+	.8byte	.LC8
+	.word	36
+	.zero	4
+	.8byte	rockchip_otp_ids
+	.zero	32
+	.8byte	rockchip_secure_otp_ofdata_to_platdata
+	.zero	28
+	.word	32
+	.zero	8
+	.8byte	rockchip_secure_otp_ops
+	.zero	8
+	.text
+.Letext0:
+	.file 2 "include/common.h"
+	.file 3 "./arch/arm/include/asm/types.h"
+	.file 4 "include/linux/types.h"
+	.file 5 "include/errno.h"
+	.file 6 "include/linux/string.h"
+	.file 7 "include/efi.h"
+	.file 8 "include/dm/device.h"
+	.file 9 "include/ide.h"
+	.file 10 "include/linux/list.h"
+	.file 11 "include/part.h"
+	.file 12 "include/flash.h"
+	.file 13 "include/lmb.h"
+	.file 14 "include/asm-generic/u-boot.h"
+	.file 15 "./arch/arm/include/asm/u-boot-arm.h"
+	.file 16 "include/linux/libfdt_env.h"
+	.file 17 "include/linux/../../scripts/dtc/libfdt/fdt.h"
+	.file 18 "include/linux/libfdt.h"
+	.file 19 "include/image.h"
+	.file 20 "include/u-boot/sha1.h"
+	.file 21 "include/u-boot/sha256.h"
+	.file 22 "./arch/arm/include/asm/global_data.h"
+	.file 23 "include/asm-generic/global_data.h"
+	.file 24 "include/dm/of.h"
+	.file 25 "include/net.h"
+	.file 26 "include/dm/uclass-id.h"
+	.file 27 "include/dm/ofnode.h"
+	.file 28 "include/malloc.h"
+	.file 29 "include/linux/compat.h"
+	.file 30 "include/dm/uclass.h"
+	.file 31 "include/asm-generic/ioctl.h"
+	.file 32 "include/misc.h"
+	.file 33 "include/dm/read.h"
+	.file 34 "include/linux/delay.h"
+	.file 35 "include/stdio.h"
+	.file 36 "include/log.h"
+	.section	.debug_info,"",@progbits
+.Ldebug_info0:
+	.4byte	0x2180
+	.2byte	0x4
+	.4byte	.Ldebug_abbrev0
+	.byte	0x8
+	.uleb128 0x1
+	.4byte	.LASF451
+	.byte	0xc
+	.4byte	.LASF452
+	.4byte	.LASF453
+	.4byte	.Ldebug_ranges0+0xd0
+	.8byte	0
+	.4byte	.Ldebug_line0
+	.uleb128 0x2
+	.4byte	.LASF4
+	.byte	0x2
+	.byte	0xd
+	.4byte	0x34
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x8
+	.4byte	.LASF0
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF1
+	.uleb128 0x3
+	.byte	0x2
+	.byte	0x7
+	.4byte	.LASF2
+	.uleb128 0x4
+	.4byte	.LASF21
+	.byte	0x5
+	.byte	0xc
+	.4byte	0x54
+	.uleb128 0x5
+	.byte	0x4
+	.byte	0x5
+	.string	"int"
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x6
+	.4byte	.LASF3
+	.uleb128 0x2
+	.4byte	.LASF5
+	.byte	0x3
+	.byte	0xc
+	.4byte	0x34
+	.uleb128 0x3
+	.byte	0x2
+	.byte	0x5
+	.4byte	.LASF6
+	.uleb128 0x2
+	.4byte	.LASF7
+	.byte	0x3
+	.byte	0x12
+	.4byte	0x7f
+	.uleb128 0x3
+	.byte	0x4
+	.byte	0x7
+	.4byte	.LASF8
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x5
+	.4byte	.LASF9
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF10
+	.uleb128 0x6
+	.string	"u8"
+	.byte	0x3
+	.byte	0x1f
+	.4byte	0x34
+	.uleb128 0x7
+	.4byte	0x94
+	.uleb128 0x6
+	.string	"u32"
+	.byte	0x3
+	.byte	0x25
+	.4byte	0x7f
+	.uleb128 0x6
+	.string	"u64"
+	.byte	0x3
+	.byte	0x28
+	.4byte	0x8d
+	.uleb128 0x2
+	.4byte	.LASF11
+	.byte	0x3
+	.byte	0x31
+	.4byte	0x8d
+	.uleb128 0x2
+	.4byte	.LASF12
+	.byte	0x3
+	.byte	0x32
+	.4byte	0x8d
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF13
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0xe3
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x8
+	.4byte	.LASF14
+	.uleb128 0x7
+	.4byte	0xdc
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x5
+	.4byte	.LASF15
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0xdc
+	.uleb128 0x2
+	.4byte	.LASF16
+	.byte	0x4
+	.byte	0x59
+	.4byte	0x42
+	.uleb128 0x2
+	.4byte	.LASF17
+	.byte	0x4
+	.byte	0x5b
+	.4byte	0x3b
+	.uleb128 0x2
+	.4byte	.LASF18
+	.byte	0x4
+	.byte	0x69
+	.4byte	0x62
+	.uleb128 0x7
+	.4byte	0x10b
+	.uleb128 0x2
+	.4byte	.LASF19
+	.byte	0x4
+	.byte	0x6b
+	.4byte	0x74
+	.uleb128 0x2
+	.4byte	.LASF20
+	.byte	0x4
+	.byte	0x97
+	.4byte	0x74
+	.uleb128 0x9
+	.byte	0x8
+	.uleb128 0x4
+	.4byte	.LASF22
+	.byte	0x6
+	.byte	0xb
+	.4byte	0xef
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x2
+	.4byte	.LASF23
+	.uleb128 0xa
+	.4byte	0xdc
+	.4byte	0x150
+	.uleb128 0xb
+	.byte	0
+	.uleb128 0xc
+	.4byte	.LASF24
+	.byte	0x7
+	.2byte	0x140
+	.4byte	0x145
+	.uleb128 0xc
+	.4byte	.LASF25
+	.byte	0x7
+	.2byte	0x143
+	.4byte	0x145
+	.uleb128 0xc
+	.4byte	.LASF26
+	.byte	0x7
+	.2byte	0x143
+	.4byte	0x145
+	.uleb128 0xd
+	.4byte	.LASF45
+	.byte	0xa0
+	.byte	0x8
+	.byte	0x83
+	.4byte	0x259
+	.uleb128 0xe
+	.4byte	.LASF27
+	.byte	0x8
+	.byte	0x84
+	.4byte	0x148e
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF28
+	.byte	0x8
+	.byte	0x85
+	.4byte	0xd6
+	.byte	0x8
+	.uleb128 0xe
+	.4byte	.LASF29
+	.byte	0x8
+	.byte	0x86
+	.4byte	0x131
+	.byte	0x10
+	.uleb128 0xe
+	.4byte	.LASF30
+	.byte	0x8
+	.byte	0x87
+	.4byte	0x131
+	.byte	0x18
+	.uleb128 0xe
+	.4byte	.LASF31
+	.byte	0x8
+	.byte	0x88
+	.4byte	0x131
+	.byte	0x20
+	.uleb128 0xe
+	.4byte	.LASF32
+	.byte	0x8
+	.byte	0x89
+	.4byte	0x1435
+	.byte	0x28
+	.uleb128 0xe
+	.4byte	.LASF33
+	.byte	0x8
+	.byte	0x8a
+	.4byte	0x100
+	.byte	0x30
+	.uleb128 0xe
+	.4byte	.LASF34
+	.byte	0x8
+	.byte	0x8b
+	.4byte	0x259
+	.byte	0x38
+	.uleb128 0xe
+	.4byte	.LASF35
+	.byte	0x8
+	.byte	0x8c
+	.4byte	0x131
+	.byte	0x40
+	.uleb128 0xe
+	.4byte	.LASF36
+	.byte	0x8
+	.byte	0x8d
+	.4byte	0x14dd
+	.byte	0x48
+	.uleb128 0xe
+	.4byte	.LASF37
+	.byte	0x8
+	.byte	0x8e
+	.4byte	0x131
+	.byte	0x50
+	.uleb128 0xe
+	.4byte	.LASF38
+	.byte	0x8
+	.byte	0x8f
+	.4byte	0x131
+	.byte	0x58
+	.uleb128 0xe
+	.4byte	.LASF39
+	.byte	0x8
+	.byte	0x90
+	.4byte	0x28c
+	.byte	0x60
+	.uleb128 0xe
+	.4byte	.LASF40
+	.byte	0x8
+	.byte	0x91
+	.4byte	0x28c
+	.byte	0x70
+	.uleb128 0xe
+	.4byte	.LASF41
+	.byte	0x8
+	.byte	0x92
+	.4byte	0x28c
+	.byte	0x80
+	.uleb128 0xe
+	.4byte	.LASF42
+	.byte	0x8
+	.byte	0x93
+	.4byte	0x11b
+	.byte	0x90
+	.uleb128 0xe
+	.4byte	.LASF43
+	.byte	0x8
+	.byte	0x94
+	.4byte	0x54
+	.byte	0x94
+	.uleb128 0xf
+	.string	"seq"
+	.byte	0x8
+	.byte	0x95
+	.4byte	0x54
+	.byte	0x98
+	.byte	0
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x174
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x265
+	.uleb128 0x10
+	.uleb128 0xa
+	.4byte	0x100
+	.4byte	0x271
+	.uleb128 0xb
+	.byte	0
+	.uleb128 0x4
+	.4byte	.LASF44
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+	.uleb128 0xa
+	.4byte	0x34
+	.4byte	0x28c
+	.uleb128 0x11
+	.4byte	0xcf
+	.byte	0x5
+	.byte	0
+	.uleb128 0xd
+	.4byte	.LASF46
+	.byte	0x10
+	.byte	0xa
+	.byte	0x16
+	.4byte	0x2b1
+	.uleb128 0xe
+	.4byte	.LASF47
+	.byte	0xa
+	.byte	0x17
+	.4byte	0x2b1
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF48
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+	.byte	0x17
+	.4byte	0x2b1
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+	.byte	0
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x28c
+	.uleb128 0xd
+	.4byte	.LASF49
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+	.byte	0xb
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+	.4byte	0x2dc
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+	.byte	0xb
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+	.4byte	0xef
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+	.uleb128 0xe
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+	.uleb128 0xe
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+	.4byte	.LASF55
+	.byte	0xc
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+	.4byte	0x37b
+	.2byte	0x1018
+	.uleb128 0x16
+	.string	"mtd"
+	.byte	0xc
+	.byte	0x31
+	.4byte	0x391
+	.2byte	0x1218
+	.byte	0
+	.uleb128 0xa
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+	.4byte	0x37b
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+	.4byte	0xcf
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+	.byte	0
+	.uleb128 0xa
+	.4byte	0x29
+	.4byte	0x38c
+	.uleb128 0x17
+	.4byte	0xcf
+	.2byte	0x1ff
+	.byte	0
+	.uleb128 0x18
+	.4byte	.LASF315
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x38c
+	.uleb128 0x2
+	.4byte	.LASF56
+	.byte	0xc
+	.byte	0x37
+	.4byte	0x316
+	.uleb128 0xa
+	.4byte	0x397
+	.4byte	0x3ad
+	.uleb128 0xb
+	.byte	0
+	.uleb128 0x4
+	.4byte	.LASF57
+	.byte	0xc
+	.byte	0x39
+	.4byte	0x3a2
+	.uleb128 0x3
+	.byte	0x10
+	.byte	0x4
+	.4byte	.LASF58
+	.uleb128 0xd
+	.4byte	.LASF59
+	.byte	0x10
+	.byte	0xd
+	.byte	0x10
+	.4byte	0x3e4
+	.uleb128 0xe
+	.4byte	.LASF60
+	.byte	0xd
+	.byte	0x11
+	.4byte	0xb9
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF51
+	.byte	0xd
+	.byte	0x12
+	.4byte	0xc4
+	.byte	0x8
+	.byte	0
+	.uleb128 0x19
+	.4byte	.LASF61
+	.2byte	0x120
+	.byte	0xd
+	.byte	0x15
+	.4byte	0x416
+	.uleb128 0xf
+	.string	"cnt"
+	.byte	0xd
+	.byte	0x16
+	.4byte	0x3b
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF51
+	.byte	0xd
+	.byte	0x17
+	.4byte	0xc4
+	.byte	0x8
+	.uleb128 0xe
+	.4byte	.LASF62
+	.byte	0xd
+	.byte	0x18
+	.4byte	0x416
+	.byte	0x10
+	.byte	0
+	.uleb128 0xa
+	.4byte	0x3bf
+	.4byte	0x426
+	.uleb128 0x11
+	.4byte	0xcf
+	.byte	0x10
+	.byte	0
+	.uleb128 0x1a
+	.string	"lmb"
+	.2byte	0x240
+	.byte	0xd
+	.byte	0x1b
+	.4byte	0x44d
+	.uleb128 0xe
+	.4byte	.LASF63
+	.byte	0xd
+	.byte	0x1c
+	.4byte	0x3e4
+	.byte	0
+	.uleb128 0x15
+	.4byte	.LASF64
+	.byte	0xd
+	.byte	0x1d
+	.4byte	0x3e4
+	.2byte	0x120
+	.byte	0
+	.uleb128 0x1b
+	.string	"lmb"
+	.byte	0xd
+	.byte	0x20
+	.4byte	0x426
+	.uleb128 0x1c
+	.byte	0x10
+	.byte	0xe
+	.byte	0x5d
+	.4byte	0x479
+	.uleb128 0xe
+	.4byte	.LASF54
+	.byte	0xe
+	.byte	0x5e
+	.4byte	0xae
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+	.uleb128 0xe
+	.4byte	.LASF51
+	.byte	0xe
+	.byte	0x5f
+	.4byte	0xae
+	.byte	0x8
+	.byte	0
+	.uleb128 0xd
+	.4byte	.LASF65
+	.byte	0xb0
+	.byte	0xe
+	.byte	0x1b
+	.4byte	0x576
+	.uleb128 0xe
+	.4byte	.LASF66
+	.byte	0xe
+	.byte	0x1c
+	.4byte	0x3b
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF67
+	.byte	0xe
+	.byte	0x1d
+	.4byte	0xc4
+	.byte	0x8
+	.uleb128 0xe
+	.4byte	.LASF68
+	.byte	0xe
+	.byte	0x1e
+	.4byte	0x3b
+	.byte	0x10
+	.uleb128 0xe
+	.4byte	.LASF69
+	.byte	0xe
+	.byte	0x1f
+	.4byte	0x3b
+	.byte	0x18
+	.uleb128 0xe
+	.4byte	.LASF70
+	.byte	0xe
+	.byte	0x20
+	.4byte	0x3b
+	.byte	0x20
+	.uleb128 0xe
+	.4byte	.LASF71
+	.byte	0xe
+	.byte	0x21
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+	.uleb128 0x25
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+	.uleb128 0x25
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+	.uleb128 0x25
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+	.uleb128 0x25
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+	.uleb128 0x25
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+	.uleb128 0x25
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+	.uleb128 0x25
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+	.uleb128 0x25
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+	.uleb128 0x25
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+	.uleb128 0x25
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+	.uleb128 0x25
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+	.uleb128 0x25
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+	.uleb128 0x25
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+	.uleb128 0x25
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+	.uleb128 0x25
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+	.uleb128 0x25
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+	.uleb128 0x25
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+	.uleb128 0x25
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+	.uleb128 0x25
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+	.uleb128 0x25
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+	.uleb128 0x25
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+	.uleb128 0x25
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+	.byte	0x5b
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+	.uleb128 0x25
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+	.uleb128 0x25
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+	.uleb128 0x25
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+	.byte	0x5f
+	.uleb128 0x26
+	.4byte	.LASF256
+	.sleb128 -1
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+	.uleb128 0x27
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+	.4byte	0x7f
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+	.byte	0xf6
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+	.uleb128 0x25
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+	.uleb128 0xe
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+	.byte	0
+	.uleb128 0xf
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+	.byte	0x23
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+	.byte	0x8
+	.uleb128 0xf
+	.string	"tbl"
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+	.4byte	0x3b
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+	.uleb128 0xe
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+	.uleb128 0xe
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+	.byte	0x28
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+	.uleb128 0xe
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+	.uleb128 0xe
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+	.byte	0x16
+	.byte	0x2b
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+	.uleb128 0xe
+	.4byte	.LASF265
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+	.byte	0x2c
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+	.byte	0x38
+	.byte	0
+	.uleb128 0xd
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+	.byte	0x22
+	.4byte	0xce6
+	.uleb128 0xe
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+	.uleb128 0xe
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+	.4byte	0xa3
+	.byte	0x4
+	.uleb128 0xf
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+	.uleb128 0xe
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+	.byte	0x17
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+	.4byte	0xa3
+	.byte	0xc
+	.uleb128 0xe
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+	.byte	0x27
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+	.byte	0x10
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+	.uleb128 0xf
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+	.uleb128 0xe
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+	.uleb128 0x15
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+	.uleb128 0x15
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+	.uleb128 0x15
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+	.uleb128 0x15
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+	.uleb128 0xe
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+	.uleb128 0xe
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+	.uleb128 0xe
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+	.uleb128 0x12
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+	.byte	0x1
+	.byte	0x2e
+	.4byte	0x16e5
+	.byte	0x8
+	.uleb128 0xe
+	.4byte	.LASF417
+	.byte	0x1
+	.byte	0x2f
+	.4byte	0x179a
+	.byte	0x10
+	.uleb128 0xe
+	.4byte	.LASF418
+	.byte	0x1
+	.byte	0x32
+	.4byte	0x179a
+	.byte	0x18
+	.byte	0
+	.uleb128 0x7
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+	.4byte	0x1794
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+	.uleb128 0x13
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+	.byte	0
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x7f
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x177a
+	.uleb128 0xd
+	.4byte	.LASF419
+	.byte	0x20
+	.byte	0x1
+	.byte	0x37
+	.4byte	0x17dd
+	.uleb128 0xe
+	.4byte	.LASF60
+	.byte	0x1
+	.byte	0x38
+	.4byte	0x131
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF420
+	.byte	0x1
+	.byte	0x39
+	.4byte	0x3b
+	.byte	0x8
+	.uleb128 0xe
+	.4byte	.LASF421
+	.byte	0x1
+	.byte	0x3a
+	.4byte	0x3b
+	.byte	0x10
+	.uleb128 0xe
+	.4byte	.LASF422
+	.byte	0x1
+	.byte	0x3b
+	.4byte	0x3b
+	.byte	0x18
+	.byte	0
+	.uleb128 0x2f
+	.4byte	.LASF423
+	.byte	0x1
+	.byte	0xf6
+	.4byte	0x169e
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	rockchip_secure_otp_ops
+	.uleb128 0x30
+	.4byte	.LASF424
+	.byte	0x1
+	.2byte	0x10b
+	.4byte	0x1775
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	rk3588_data
+	.uleb128 0xa
+	.4byte	0x1508
+	.4byte	0x1818
+	.uleb128 0x11
+	.4byte	0xcf
+	.byte	0x1
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x1808
+	.uleb128 0x30
+	.4byte	.LASF425
+	.byte	0x1
+	.2byte	0x110
+	.4byte	0x1818
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	rockchip_otp_ids
+	.uleb128 0x31
+	.4byte	.LASF426
+	.byte	0x1
+	.2byte	0x118
+	.4byte	0x12cf
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	_u_boot_list_2_driver_2_rockchip_secure_otp
+	.uleb128 0x32
+	.4byte	.LASF427
+	.byte	0x1
+	.byte	0xfc
+	.4byte	0x54
+	.8byte	.LFB275
+	.8byte	.LFE275-.LFB275
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x1933
+	.uleb128 0x33
+	.string	"dev"
+	.byte	0x1
+	.byte	0xfc
+	.4byte	0x259
+	.4byte	.LLST13
+	.uleb128 0x34
+	.string	"otp"
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+	.byte	0xfe
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+	.4byte	.LLST14
+	.uleb128 0x35
+	.8byte	.LVL18
+	.4byte	0x213f
+	.4byte	0x18a0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x35
+	.8byte	.LVL21
+	.4byte	0x214b
+	.4byte	0x18b8
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x35
+	.8byte	.LVL22
+	.4byte	0x2156
+	.4byte	0x18e2
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x35
+	.8byte	.LVL23
+	.4byte	0x2156
+	.4byte	0x190c
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x37
+	.8byte	.LVL24
+	.4byte	0x2156
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
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+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x17a0
+	.uleb128 0x32
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+	.byte	0x1
+	.byte	0xe5
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+	.8byte	.LFB274
+	.8byte	.LFE274-.LFB274
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x19b4
+	.uleb128 0x33
+	.string	"dev"
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+	.byte	0xe5
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+	.4byte	.LLST0
+	.uleb128 0x38
+	.4byte	.LASF429
+	.byte	0x1
+	.byte	0xe6
+	.4byte	0x3b
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x39
+	.string	"buf"
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+	.byte	0xe7
+	.4byte	0x131
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x34
+	.string	"ret"
+	.byte	0x1
+	.byte	0xe9
+	.4byte	0x54
+	.4byte	.LLST1
+	.uleb128 0x3a
+	.4byte	0x19b4
+	.8byte	.LBB14
+	.8byte	.LBE14-.LBB14
+	.byte	0x1
+	.byte	0xed
+	.uleb128 0x3b
+	.4byte	0x19c4
+	.4byte	.LLST2
+	.byte	0
+	.byte	0
+	.uleb128 0x3c
+	.4byte	.LASF436
+	.byte	0x1
+	.byte	0xde
+	.4byte	0x54
+	.byte	0x1
+	.4byte	0x19d0
+	.uleb128 0x3d
+	.string	"buf"
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+	.byte	0xde
+	.4byte	0x12c9
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LASF430
+	.byte	0x1
+	.byte	0xd6
+	.4byte	0x54
+	.8byte	.LFB272
+	.8byte	.LFE272-.LFB272
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x1a7b
+	.uleb128 0x33
+	.string	"dev"
+	.byte	0x1
+	.byte	0xd6
+	.4byte	0x259
+	.4byte	.LLST3
+	.uleb128 0x3e
+	.4byte	.LASF431
+	.byte	0x1
+	.byte	0xd6
+	.4byte	0x54
+	.4byte	.LLST4
+	.uleb128 0x33
+	.string	"buf"
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+	.byte	0xd7
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+	.4byte	.LLST5
+	.uleb128 0x3e
+	.4byte	.LASF51
+	.byte	0x1
+	.byte	0xd7
+	.4byte	0x54
+	.4byte	.LLST6
+	.uleb128 0x3f
+	.4byte	.LASF432
+	.byte	0x1
+	.byte	0xd9
+	.4byte	0x1a7b
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+	.uleb128 0x35
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+	.uleb128 0x1
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+	.uleb128 0x2
+	.byte	0x83
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+	.uleb128 0x1
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+	.uleb128 0x1
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+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
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+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x1738
+	.uleb128 0x32
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+	.byte	0x1
+	.byte	0xce
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+	.8byte	.LFB271
+	.8byte	.LFE271-.LFB271
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x1b2c
+	.uleb128 0x33
+	.string	"dev"
+	.byte	0x1
+	.byte	0xce
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+	.4byte	.LLST8
+	.uleb128 0x3e
+	.4byte	.LASF431
+	.byte	0x1
+	.byte	0xce
+	.4byte	0x54
+	.4byte	.LLST9
+	.uleb128 0x33
+	.string	"buf"
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+	.byte	0xcf
+	.4byte	0x131
+	.4byte	.LLST10
+	.uleb128 0x3e
+	.4byte	.LASF51
+	.byte	0x1
+	.byte	0xcf
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+	.4byte	.LLST11
+	.uleb128 0x3f
+	.4byte	.LASF432
+	.byte	0x1
+	.byte	0xd1
+	.4byte	0x1a7b
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+	.uleb128 0x35
+	.8byte	.LVL12
+	.4byte	0x2161
+	.4byte	0x1b05
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
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+	.uleb128 0x1
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+	.uleb128 0x3
+	.byte	0xf3
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+	.uleb128 0x1
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+	.uleb128 0x1
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+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
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+	.byte	0
+	.uleb128 0x32
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+	.byte	0x1
+	.byte	0xa5
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+	.8byte	.LFB270
+	.8byte	.LFE270-.LFB270
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x1d94
+	.uleb128 0x33
+	.string	"dev"
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+	.byte	0xa5
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+	.4byte	.LLST31
+	.uleb128 0x3e
+	.4byte	.LASF431
+	.byte	0x1
+	.byte	0xa5
+	.4byte	0x54
+	.4byte	.LLST32
+	.uleb128 0x33
+	.string	"buf"
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+	.4byte	0x25f
+	.4byte	.LLST33
+	.uleb128 0x3e
+	.4byte	.LASF51
+	.byte	0x1
+	.byte	0xa6
+	.4byte	0x54
+	.4byte	.LLST34
+	.uleb128 0x34
+	.string	"otp"
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+	.byte	0xa8
+	.4byte	0x1933
+	.4byte	.LLST35
+	.uleb128 0x34
+	.string	"i"
+	.byte	0x1
+	.byte	0xa9
+	.4byte	0x54
+	.4byte	.LLST36
+	.uleb128 0x34
+	.string	"ret"
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+	.byte	0xa9
+	.4byte	0x54
+	.4byte	.LLST37
+	.uleb128 0x2f
+	.4byte	.LASF435
+	.byte	0x1
+	.byte	0xaa
+	.4byte	0xdc
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -1
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+	.4byte	.Ldebug_ranges0+0x30
+	.byte	0x1
+	.byte	0xc4
+	.4byte	0x1cf9
+	.uleb128 0x3b
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+	.uleb128 0x3b
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+	.uleb128 0x3b
+	.4byte	0x1da4
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+	.uleb128 0x42
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+	.uleb128 0x43
+	.4byte	0x1dc5
+	.4byte	.LLST41
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+	.4byte	0x1dd1
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+	.uleb128 0x42
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+	.4byte	0x1c85
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+	.4byte	0x1e2f
+	.4byte	.LLST48
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+	.4byte	.LLST50
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+	.4byte	0x1e6f
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+	.uleb128 0x1
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+	.uleb128 0x38
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x21
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0xb
+	.uleb128 0x5
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x22
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x23
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x24
+	.uleb128 0x4
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x25
+	.uleb128 0x28
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x1c
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x26
+	.uleb128 0x28
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x1c
+	.uleb128 0xd
+	.byte	0
+	.byte	0
+	.uleb128 0x27
+	.uleb128 0x4
+	.byte	0x1
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x28
+	.uleb128 0x35
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x29
+	.uleb128 0x15
+	.byte	0x1
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x2a
+	.uleb128 0x4
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x2b
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3f
+	.uleb128 0x19
+	.byte	0
+	.byte	0
+	.uleb128 0x2c
+	.uleb128 0x17
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x2d
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x2e
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x2f
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x30
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x32
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x33
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x34
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x35
+	.uleb128 0x4109
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x36
+	.uleb128 0x410a
+	.byte	0
+	.uleb128 0x2
+	.uleb128 0x18
+	.uleb128 0x2111
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x37
+	.uleb128 0x4109
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x38
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x39
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x3a
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x3b
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x3c
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x20
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x3d
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x3e
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x40
+	.uleb128 0x4109
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x2115
+	.uleb128 0x19
+	.byte	0
+	.byte	0
+	.uleb128 0x41
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x52
+	.uleb128 0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x42
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x43
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x52
+	.uleb128 0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.uleb128 0xa
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x47
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x48
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x410a
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2111
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x4a
+	.uleb128 0x4109
+	.byte	0
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x4b
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x4c
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x4d
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x4e
+	.uleb128 0xa
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x4f
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x50
+	.uleb128 0xb
+	.byte	0x1
+	.byte	0
+	.byte	0
+	.uleb128 0x51
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x52
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x53
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x1c
+	.uleb128 0xd
+	.byte	0
+	.byte	0
+	.uleb128 0x54
+	.uleb128 0xa
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.byte	0
+	.byte	0
+	.uleb128 0x55
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x1c
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x56
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x57
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.byte	0
+	.section	.debug_loc,"",@progbits
+.Ldebug_loc0:
+.LLST13:
+	.8byte	.LVL17
+	.8byte	.LVL18-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL18-1
+	.8byte	.LVL25
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL25
+	.8byte	.LFE275
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST14:
+	.8byte	.LVL19
+	.8byte	.LVL20
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL20
+	.8byte	.LVL25
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST0:
+	.8byte	.LVL0
+	.8byte	.LVL1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1
+	.8byte	.LFE274
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST1:
+	.8byte	.LVL0
+	.8byte	.LVL3
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xea
+	.byte	0x9f
+	.8byte	.LVL4
+	.8byte	.LFE274
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xea
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST2:
+	.8byte	.LVL2
+	.8byte	.LVL3
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST3:
+	.8byte	.LVL5
+	.8byte	.LVL6-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL6-1
+	.8byte	.LVL9
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL9
+	.8byte	.LVL10-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL10-1
+	.8byte	.LFE272
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST4:
+	.8byte	.LVL5
+	.8byte	.LVL6-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL6-1
+	.8byte	.LVL9
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL9
+	.8byte	.LVL10-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL10-1
+	.8byte	.LFE272
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST5:
+	.8byte	.LVL5
+	.8byte	.LVL6-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL6-1
+	.8byte	.LVL8
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL8
+	.8byte	.LVL10-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL10-1
+	.8byte	.LFE272
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST6:
+	.8byte	.LVL5
+	.8byte	.LVL6-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL6-1
+	.8byte	.LVL8
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL8
+	.8byte	.LVL10-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL10-1
+	.8byte	.LFE272
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST7:
+	.8byte	.LVL6
+	.8byte	.LVL7
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST8:
+	.8byte	.LVL11
+	.8byte	.LVL12-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL12-1
+	.8byte	.LVL15
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL15
+	.8byte	.LVL16-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL16-1
+	.8byte	.LFE271
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST9:
+	.8byte	.LVL11
+	.8byte	.LVL12-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL12-1
+	.8byte	.LVL15
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL15
+	.8byte	.LVL16-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL16-1
+	.8byte	.LFE271
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST10:
+	.8byte	.LVL11
+	.8byte	.LVL12-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL12-1
+	.8byte	.LVL14
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL14
+	.8byte	.LVL16-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL16-1
+	.8byte	.LFE271
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST11:
+	.8byte	.LVL11
+	.8byte	.LVL12-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL12-1
+	.8byte	.LVL14
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL14
+	.8byte	.LVL16-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL16-1
+	.8byte	.LFE271
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST12:
+	.8byte	.LVL12
+	.8byte	.LVL13
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST31:
+	.8byte	.LVL63
+	.8byte	.LVL64-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL64-1
+	.8byte	.LFE270
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST32:
+	.8byte	.LVL63
+	.8byte	.LVL64-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL64-1
+	.8byte	.LVL77
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL77
+	.8byte	.LVL78
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL78
+	.8byte	.LFE270
+	.2byte	0x1
+	.byte	0x69
+	.8byte	0
+	.8byte	0
+.LLST33:
+	.8byte	.LVL63
+	.8byte	.LVL64-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL64-1
+	.8byte	.LVL76
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL76
+	.8byte	.LVL78
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	.LVL78
+	.8byte	.LFE270
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST34:
+	.8byte	.LVL63
+	.8byte	.LVL64-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL64-1
+	.8byte	.LVL76
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL76
+	.8byte	.LVL78
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL78
+	.8byte	.LFE270
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST35:
+	.8byte	.LVL65
+	.8byte	.LVL66
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL66
+	.8byte	.LVL75
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL78
+	.8byte	.LFE270
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	0
+	.8byte	0
+.LLST36:
+	.8byte	.LVL67
+	.8byte	.LVL68
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL70
+	.8byte	.LVL74
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL78
+	.8byte	.LVL93
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL93
+	.8byte	.LVL94
+	.2byte	0x3
+	.byte	0x83
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL95
+	.8byte	.LFE270
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST37:
+	.8byte	.LVL72
+	.8byte	.LVL73
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL73
+	.8byte	.LVL74
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	0
+	.8byte	0
+.LLST38:
+	.8byte	.LVL80
+	.8byte	.LVL86
+	.2byte	0x5
+	.byte	0x85
+	.sleb128 0
+	.byte	0x83
+	.sleb128 0
+	.byte	0x22
+	.8byte	0
+	.8byte	0
+.LLST39:
+	.8byte	.LVL80
+	.8byte	.LVL83
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL83
+	.8byte	.LVL93
+	.2byte	0x6
+	.byte	0x89
+	.sleb128 0
+	.byte	0x83
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.8byte	.LVL95
+	.8byte	.LVL99
+	.2byte	0x6
+	.byte	0x89
+	.sleb128 0
+	.byte	0x83
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST40:
+	.8byte	.LVL80
+	.8byte	.LVL93
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL95
+	.8byte	.LVL99
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	0
+	.8byte	0
+.LLST41:
+	.8byte	.LVL80
+	.8byte	.LVL81
+	.2byte	0xb
+	.byte	0x85
+	.sleb128 0
+	.byte	0x83
+	.sleb128 0
+	.byte	0x22
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	.LVL81
+	.8byte	.LVL85
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL85
+	.8byte	.LVL86
+	.2byte	0xb
+	.byte	0x85
+	.sleb128 0
+	.byte	0x83
+	.sleb128 0
+	.byte	0x22
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST42:
+	.8byte	.LVL82
+	.8byte	.LVL89
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST43:
+	.8byte	.LVL82
+	.8byte	.LVL83
+	.2byte	0x5
+	.byte	0x70
+	.sleb128 0
+	.byte	0x34
+	.byte	0x1b
+	.byte	0x9f
+	.8byte	.LVL83
+	.8byte	.LVL93
+	.2byte	0x8
+	.byte	0x89
+	.sleb128 0
+	.byte	0x83
+	.sleb128 0
+	.byte	0x22
+	.byte	0x34
+	.byte	0x1b
+	.byte	0x9f
+	.8byte	.LVL95
+	.8byte	.LVL99
+	.2byte	0x8
+	.byte	0x89
+	.sleb128 0
+	.byte	0x83
+	.sleb128 0
+	.byte	0x22
+	.byte	0x34
+	.byte	0x1b
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST44:
+	.8byte	.LVL91
+	.8byte	.LVL93
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL95
+	.8byte	.LVL97
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST45:
+	.8byte	.LVL89
+	.8byte	.LVL93
+	.2byte	0x3
+	.byte	0x8a
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL95
+	.8byte	.LVL96
+	.2byte	0x3
+	.byte	0x8a
+	.sleb128 -2
+	.byte	0x9f
+	.8byte	.LVL96
+	.8byte	.LVL99
+	.2byte	0x3
+	.byte	0x8a
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST46:
+	.8byte	.LVL82
+	.8byte	.LVL93
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL95
+	.8byte	.LFE270
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST47:
+	.8byte	.LVL88
+	.8byte	.LVL93
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL95
+	.8byte	.LFE270
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST48:
+	.8byte	.LVL84
+	.8byte	.LVL87
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL87
+	.8byte	.LVL88
+	.2byte	0x2
+	.byte	0x72
+	.sleb128 4
+	.8byte	.LVL88
+	.8byte	.LVL93
+	.2byte	0xd
+	.byte	0x89
+	.sleb128 0
+	.byte	0x83
+	.sleb128 0
+	.byte	0x22
+	.byte	0x87
+	.sleb128 0
+	.byte	0x1b
+	.byte	0x40
+	.byte	0x24
+	.byte	0x32
+	.byte	0x21
+	.byte	0x9f
+	.8byte	.LVL95
+	.8byte	.LVL99
+	.2byte	0xd
+	.byte	0x89
+	.sleb128 0
+	.byte	0x83
+	.sleb128 0
+	.byte	0x22
+	.byte	0x87
+	.sleb128 0
+	.byte	0x1b
+	.byte	0x40
+	.byte	0x24
+	.byte	0x32
+	.byte	0x21
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST49:
+	.8byte	.LVL86
+	.8byte	.LVL89
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST50:
+	.8byte	.LVL90
+	.8byte	.LVL93
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL95
+	.8byte	.LVL97
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST51:
+	.8byte	.LVL92
+	.8byte	.LVL93
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST24:
+	.8byte	.LVL47
+	.8byte	.LVL48-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL48-1
+	.8byte	.LFE267
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST25:
+	.8byte	.LVL47
+	.8byte	.LVL48-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL48-1
+	.8byte	.LVL52
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL52
+	.8byte	.LVL55
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL55
+	.8byte	.LFE267
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST26:
+	.8byte	.LVL47
+	.8byte	.LVL48-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL48-1
+	.8byte	.LVL54
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL54
+	.8byte	.LVL55
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	.LVL55
+	.8byte	.LFE267
+	.2byte	0x1
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST27:
+	.8byte	.LVL47
+	.8byte	.LVL48-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL48-1
+	.8byte	.LVL53
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL53
+	.8byte	.LVL55
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL55
+	.8byte	.LFE267
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST28:
+	.8byte	.LVL49
+	.8byte	.LVL50
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL50
+	.8byte	.LVL54
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL55
+	.8byte	.LFE267
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST29:
+	.8byte	.LVL55
+	.8byte	.LVL56
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL62
+	.8byte	.LFE267
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST30:
+	.8byte	.LVL58
+	.8byte	.LVL59
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL59
+	.8byte	.LVL61
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST15:
+	.8byte	.LVL26
+	.8byte	.LVL28
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL28
+	.8byte	.LVL38
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL38
+	.8byte	.LVL39
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL39
+	.8byte	.LFE276
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST16:
+	.8byte	.LVL26
+	.8byte	.LVL32
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL32
+	.8byte	.LVL36
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL36
+	.8byte	.LVL39
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	.LVL39
+	.8byte	.LVL45
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL45
+	.8byte	.LVL46
+	.2byte	0x4
+	.byte	0x70
+	.sleb128 0
+	.byte	0x1f
+	.byte	0x9f
+	.8byte	.LVL46
+	.8byte	.LFE276
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST17:
+	.8byte	.LVL32
+	.8byte	.LVL37
+	.2byte	0x3
+	.byte	0x85
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL39
+	.8byte	.LVL40
+	.2byte	0x3
+	.byte	0x85
+	.sleb128 -2
+	.byte	0x9f
+	.8byte	.LVL40
+	.8byte	.LFE276
+	.2byte	0x3
+	.byte	0x85
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST18:
+	.8byte	.LVL34
+	.8byte	.LVL41-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL42
+	.8byte	.LFE276
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST19:
+	.8byte	.LVL44
+	.8byte	.LVL46
+	.2byte	0x1
+	.byte	0x53
+	.8byte	0
+	.8byte	0
+.LLST20:
+	.8byte	.LVL27
+	.8byte	.LVL30
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL30
+	.8byte	.LVL31
+	.2byte	0x2
+	.byte	0x71
+	.sleb128 4
+	.8byte	.LVL31
+	.8byte	.LVL32
+	.2byte	0x5
+	.byte	0x84
+	.sleb128 0
+	.byte	0x6
+	.byte	0x23
+	.uleb128 0x4
+	.8byte	.LVL32
+	.8byte	.LVL36
+	.2byte	0xb
+	.byte	0x83
+	.sleb128 0
+	.byte	0x34
+	.byte	0x1b
+	.byte	0x40
+	.byte	0x24
+	.byte	0xa
+	.2byte	0x100
+	.byte	0x21
+	.byte	0x9f
+	.8byte	.LVL36
+	.8byte	.LVL39
+	.2byte	0xc
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x34
+	.byte	0x1b
+	.byte	0x40
+	.byte	0x24
+	.byte	0xa
+	.2byte	0x100
+	.byte	0x21
+	.byte	0x9f
+	.8byte	.LVL39
+	.8byte	.LVL45
+	.2byte	0xb
+	.byte	0x83
+	.sleb128 0
+	.byte	0x34
+	.byte	0x1b
+	.byte	0x40
+	.byte	0x24
+	.byte	0xa
+	.2byte	0x100
+	.byte	0x21
+	.byte	0x9f
+	.8byte	.LVL45
+	.8byte	.LVL46
+	.2byte	0xc
+	.byte	0x70
+	.sleb128 0
+	.byte	0x1f
+	.byte	0x34
+	.byte	0x1b
+	.byte	0x40
+	.byte	0x24
+	.byte	0xa
+	.2byte	0x100
+	.byte	0x21
+	.byte	0x9f
+	.8byte	.LVL46
+	.8byte	.LFE276
+	.2byte	0xb
+	.byte	0x83
+	.sleb128 0
+	.byte	0x34
+	.byte	0x1b
+	.byte	0x40
+	.byte	0x24
+	.byte	0xa
+	.2byte	0x100
+	.byte	0x21
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST21:
+	.8byte	.LVL33
+	.8byte	.LVL41-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL42
+	.8byte	.LFE276
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST22:
+	.8byte	.LVL35
+	.8byte	.LVL37
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL42
+	.8byte	.LVL46
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST23:
+	.8byte	.LVL43
+	.8byte	.LVL46
+	.2byte	0x1
+	.byte	0x53
+	.8byte	0
+	.8byte	0
+	.section	.debug_aranges,"",@progbits
+	.4byte	0x8c
+	.2byte	0x2
+	.4byte	.Ldebug_info0
+	.byte	0x8
+	.byte	0
+	.2byte	0
+	.2byte	0
+	.8byte	.LFB274
+	.8byte	.LFE274-.LFB274
+	.8byte	.LFB272
+	.8byte	.LFE272-.LFB272
+	.8byte	.LFB271
+	.8byte	.LFE271-.LFB271
+	.8byte	.LFB275
+	.8byte	.LFE275-.LFB275
+	.8byte	.LFB276
+	.8byte	.LFE276-.LFB276
+	.8byte	.LFB267
+	.8byte	.LFE267-.LFB267
+	.8byte	.LFB270
+	.8byte	.LFE270-.LFB270
+	.8byte	0
+	.8byte	0
+	.section	.debug_ranges,"",@progbits
+.Ldebug_ranges0:
+	.8byte	.LBB16
+	.8byte	.LBE16
+	.8byte	.LBB17
+	.8byte	.LBE17
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB31
+	.8byte	.LBE31
+	.8byte	.LBB46
+	.8byte	.LBE46
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB33
+	.8byte	.LBE33
+	.8byte	.LBB43
+	.8byte	.LBE43
+	.8byte	.LBB44
+	.8byte	.LBE44
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB35
+	.8byte	.LBE35
+	.8byte	.LBB38
+	.8byte	.LBE38
+	.8byte	0
+	.8byte	0
+	.8byte	.LFB274
+	.8byte	.LFE274
+	.8byte	.LFB272
+	.8byte	.LFE272
+	.8byte	.LFB271
+	.8byte	.LFE271
+	.8byte	.LFB275
+	.8byte	.LFE275
+	.8byte	.LFB276
+	.8byte	.LFE276
+	.8byte	.LFB267
+	.8byte	.LFE267
+	.8byte	.LFB270
+	.8byte	.LFE270
+	.8byte	0
+	.8byte	0
+	.section	.debug_line,"",@progbits
+.Ldebug_line0:
+	.section	.debug_str,"MS",@progbits,1
+.LASF30:
+	.string	"parent_platdata"
+.LASF100:
+	.string	"off_mem_rsvmap"
+.LASF185:
+	.string	"UCLASS_I2C_EEPROM"
+.LASF316:
+	.string	"jt_funcs"
+.LASF190:
+	.string	"UCLASS_IRQ"
+.LASF150:
+	.string	"initrd_start"
+.LASF184:
+	.string	"UCLASS_I2C"
+.LASF13:
+	.string	"sizetype"
+.LASF340:
+	.string	"net_hostname"
+.LASF54:
+	.string	"start"
+.LASF225:
+	.string	"UCLASS_SPI"
+.LASF313:
+	.string	"child"
+.LASF188:
+	.string	"UCLASS_I2S"
+.LASF362:
+	.string	"NETLOOP_RESTART"
+.LASF432:
+	.string	"otp_data"
+.LASF186:
+	.string	"UCLASS_I2C_GENERIC"
+.LASF198:
+	.string	"UCLASS_MOD_EXP"
+.LASF248:
+	.string	"UCLASS_IO_DOMAIN"
+.LASF267:
+	.string	"using_pre_serial"
+.LASF37:
+	.string	"uclass_priv"
+.LASF219:
+	.string	"UCLASS_RKNAND"
+.LASF161:
+	.string	"UCLASS_DEMO"
+.LASF409:
+	.string	"OTP_S"
+.LASF108:
+	.string	"ih_magic"
+.LASF46:
+	.string	"list_head"
+.LASF373:
+	.string	"child_pre_probe"
+.LASF427:
+	.string	"rockchip_secure_otp_ofdata_to_platdata"
+.LASF304:
+	.string	"pm_ctx_phys"
+.LASF165:
+	.string	"UCLASS_TEST_PROBE"
+.LASF311:
+	.string	"full_name"
+.LASF244:
+	.string	"UCLASS_KEY"
+.LASF80:
+	.string	"bi_intfreq"
+.LASF11:
+	.string	"phys_addr_t"
+.LASF413:
+	.string	"write"
+.LASF239:
+	.string	"UCLASS_VIDEO_BRIDGE"
+.LASF5:
+	.string	"__u8"
+.LASF361:
+	.string	"NETLOOP_CONTINUE"
+.LASF228:
+	.string	"UCLASS_SPI_GENERIC"
+.LASF300:
+	.string	"malloc_base"
+.LASF446:
+	.string	"dev_read_addr_ptr"
+.LASF56:
+	.string	"flash_info_t"
+.LASF203:
+	.string	"UCLASS_PANEL"
+.LASF125:
+	.string	"comp"
+.LASF120:
+	.string	"image_header_t"
+.LASF155:
+	.string	"state"
+.LASF178:
+	.string	"UCLASS_CROS_EC"
+.LASF74:
+	.string	"bi_dsp_freq"
+.LASF425:
+	.string	"rockchip_otp_ids"
+.LASF122:
+	.string	"image_start"
+.LASF163:
+	.string	"UCLASS_TEST_FDT"
+.LASF65:
+	.string	"bd_info"
+.LASF359:
+	.string	"uclass_id"
+.LASF435:
+	.string	"read_data"
+.LASF112:
+	.string	"ih_load"
+.LASF407:
+	.string	"DECOM_GZIP"
+.LASF320:
+	.string	"__dtb_dt_spl_begin"
+.LASF400:
+	.string	"pre_remove"
+.LASF391:
+	.string	"u_boot_dev_head"
+.LASF439:
+	.string	"rk3588_secure_otp_write_word"
+.LASF433:
+	.string	"secure_otp_read"
+.LASF7:
+	.string	"__u32"
+.LASF35:
+	.string	"priv"
+.LASF303:
+	.string	"cur_serial_dev"
+.LASF346:
+	.string	"net_tx_packet"
+.LASF243:
+	.string	"UCLASS_FG"
+.LASF345:
+	.string	"net_server_ip"
+.LASF454:
+	.string	"ofnode_union"
+.LASF353:
+	.string	"net_native_vlan"
+.LASF241:
+	.string	"UCLASS_VIDEO_CRTC"
+.LASF177:
+	.string	"UCLASS_CODEC"
+.LASF297:
+	.string	"env_buf"
+.LASF21:
+	.string	"errno"
+.LASF15:
+	.string	"long int"
+.LASF404:
+	.string	"__invalid_size_argument_for_IOC"
+.LASF69:
+	.string	"bi_flashsize"
+.LASF29:
+	.string	"platdata"
+.LASF208:
+	.string	"UCLASS_PHY"
+.LASF430:
+	.string	"secure_otp_write"
+.LASF93:
+	.string	"IRQ_STACK_START_IN"
+.LASF104:
+	.string	"size_dt_strings"
+.LASF238:
+	.string	"UCLASS_VIDEO"
+.LASF280:
+	.string	"relocaddr"
+.LASF390:
+	.string	"dev_head"
+.LASF453:
+	.string	"/home/zzz/code/u-boot"
+.LASF356:
+	.string	"net_boot_file_size"
+.LASF114:
+	.string	"ih_dcrc"
+.LASF79:
+	.string	"bi_ethspeed"
+.LASF160:
+	.string	"UCLASS_ROOT"
+.LASF44:
+	.string	"ide_bus_offset"
+.LASF343:
+	.string	"net_server_ethaddr"
+.LASF82:
+	.string	"bi_arch_number"
+.LASF3:
+	.string	"signed char"
+.LASF191:
+	.string	"UCLASS_KEYBOARD"
+.LASF18:
+	.string	"uint8_t"
+.LASF426:
+	.string	"_u_boot_list_2_driver_2_rockchip_secure_otp"
+.LASF378:
+	.string	"per_child_platdata_auto_alloc_size"
+.LASF45:
+	.string	"udevice"
+.LASF449:
+	.string	"udelay"
+.LASF116:
+	.string	"ih_arch"
+.LASF97:
+	.string	"totalsize"
+.LASF109:
+	.string	"ih_hcrc"
+.LASF282:
+	.string	"mon_len"
+.LASF415:
+	.string	"call"
+.LASF124:
+	.string	"load"
+.LASF233:
+	.string	"UCLASS_TPM"
+.LASF59:
+	.string	"lmb_property"
+.LASF102:
+	.string	"last_comp_version"
+.LASF0:
+	.string	"unsigned char"
+.LASF84:
+	.string	"bi_andr_version"
+.LASF157:
+	.string	"images"
+.LASF247:
+	.string	"UCLASS_DVFS"
+.LASF75:
+	.string	"bi_ddr_freq"
+.LASF192:
+	.string	"UCLASS_LED"
+.LASF111:
+	.string	"ih_size"
+.LASF39:
+	.string	"uclass_node"
+.LASF222:
+	.string	"UCLASS_SCMI_AGENT"
+.LASF419:
+	.string	"rockchip_otp_platdata"
+.LASF251:
+	.string	"UCLASS_MDIO"
+.LASF23:
+	.string	"_Bool"
+.LASF379:
+	.string	"property"
+.LASF424:
+	.string	"rk3588_data"
+.LASF365:
+	.string	"net_state"
+.LASF381:
+	.string	"value"
+.LASF274:
+	.string	"pci_clk"
+.LASF187:
+	.string	"UCLASS_I2C_MUX"
+.LASF14:
+	.string	"char"
+.LASF25:
+	.string	"_binary_u_boot_bin_start"
+.LASF237:
+	.string	"UCLASS_USB_GADGET_GENERIC"
+.LASF363:
+	.string	"NETLOOP_SUCCESS"
+.LASF36:
+	.string	"uclass"
+.LASF387:
+	.string	"p_current"
+.LASF389:
+	.string	"uc_drv"
+.LASF360:
+	.string	"net_loop_state"
+.LASF434:
+	.string	"rk3588_secure_otp_write"
+.LASF43:
+	.string	"req_seq"
+.LASF314:
+	.string	"sibling"
+.LASF288:
+	.string	"dm_root_f"
+.LASF327:
+	.string	"enetaddr"
+.LASF176:
+	.string	"UCLASS_AMP"
+.LASF214:
+	.string	"UCLASS_PWRSEQ"
+.LASF382:
+	.string	"of_offset"
+.LASF140:
+	.string	"fit_hdr_fdt"
+.LASF354:
+	.string	"net_restart_wrap"
+.LASF342:
+	.string	"net_ethaddr"
+.LASF42:
+	.string	"flags"
+.LASF117:
+	.string	"ih_type"
+.LASF98:
+	.string	"off_dt_struct"
+.LASF70:
+	.string	"bi_flashoffset"
+.LASF355:
+	.string	"net_boot_file_name"
+.LASF393:
+	.string	"compatible"
+.LASF162:
+	.string	"UCLASS_TEST"
+.LASF110:
+	.string	"ih_time"
+.LASF273:
+	.string	"bus_clk"
+.LASF215:
+	.string	"UCLASS_RAM"
+.LASF181:
+	.string	"UCLASS_ETH"
+.LASF32:
+	.string	"node"
+.LASF121:
+	.string	"image_info"
+.LASF127:
+	.string	"arch"
+.LASF275:
+	.string	"mem_clk"
+.LASF452:
+	.string	"drivers/misc/rk3588-secure-otp.c"
+.LASF272:
+	.string	"cpu_clk"
+.LASF50:
+	.string	"select_hwpart"
+.LASF347:
+	.string	"net_rx_packets"
+.LASF384:
+	.string	"mem_malloc_start"
+.LASF92:
+	.string	"_datarelro_start_ofs"
+.LASF17:
+	.string	"ulong"
+.LASF113:
+	.string	"ih_ep"
+.LASF61:
+	.string	"lmb_region"
+.LASF398:
+	.string	"pre_probe"
+.LASF450:
+	.string	"printf"
+.LASF408:
+	.string	"DECOM_ZLIB"
+.LASF135:
+	.string	"fit_uname_os"
+.LASF76:
+	.string	"bi_bootflags"
+.LASF344:
+	.string	"net_ip"
+.LASF292:
+	.string	"fdt_size"
+.LASF338:
+	.string	"net_dns_server"
+.LASF358:
+	.string	"net_ping_ip"
+.LASF63:
+	.string	"memory"
+.LASF95:
+	.string	"fdt_header"
+.LASF385:
+	.string	"mem_malloc_end"
+.LASF194:
+	.string	"UCLASS_MAILBOX"
+.LASF147:
+	.string	"rd_end"
+.LASF367:
+	.string	"bind"
+.LASF283:
+	.string	"irq_sp"
+.LASF152:
+	.string	"cmdline_start"
+.LASF334:
+	.string	"index"
+.LASF271:
+	.string	"global_data"
+.LASF402:
+	.string	"per_device_auto_alloc_size"
+.LASF223:
+	.string	"UCLASS_SCSI"
+.LASF235:
+	.string	"UCLASS_USB_DEV_GENERIC"
+.LASF195:
+	.string	"UCLASS_MASS_STORAGE"
+.LASF1:
+	.string	"long unsigned int"
+.LASF170:
+	.string	"UCLASS_SIMPLE_BUS"
+.LASF317:
+	.string	"gd_t"
+.LASF339:
+	.string	"net_nis_domain"
+.LASF142:
+	.string	"fit_noffset_fdt"
+.LASF423:
+	.string	"rockchip_secure_otp_ops"
+.LASF364:
+	.string	"NETLOOP_FAIL"
+.LASF242:
+	.string	"UCLASS_WDT"
+.LASF261:
+	.string	"timer_reset_value"
+.LASF284:
+	.string	"start_addr_sp"
+.LASF71:
+	.string	"bi_sramstart"
+.LASF26:
+	.string	"_binary_u_boot_bin_end"
+.LASF285:
+	.string	"reloc_off"
+.LASF103:
+	.string	"boot_cpuid_phys"
+.LASF260:
+	.string	"lastinc"
+.LASF264:
+	.string	"tlb_fillptr"
+.LASF138:
+	.string	"fit_uname_rd"
+.LASF229:
+	.string	"UCLASS_SYSCON"
+.LASF175:
+	.string	"UCLASS_CPU"
+.LASF133:
+	.string	"fit_uname_cfg"
+.LASF224:
+	.string	"UCLASS_SERIAL"
+.LASF352:
+	.string	"net_our_vlan"
+.LASF305:
+	.string	"serial"
+.LASF368:
+	.string	"probe"
+.LASF173:
+	.string	"UCLASS_BLK"
+.LASF128:
+	.string	"image_info_t"
+.LASF169:
+	.string	"UCLASS_USB_EMUL"
+.LASF262:
+	.string	"tlb_addr"
+.LASF207:
+	.string	"UCLASS_PCI_GENERIC"
+.LASF123:
+	.string	"image_len"
+.LASF436:
+	.string	"rockchip_secure_otp_capability"
+.LASF77:
+	.string	"bi_ip_addr"
+.LASF209:
+	.string	"UCLASS_PINCONFIG"
+.LASF330:
+	.string	"send"
+.LASF231:
+	.string	"UCLASS_THERMAL"
+.LASF131:
+	.string	"legacy_hdr_os_copy"
+.LASF159:
+	.string	"sha256_der_prefix"
+.LASF9:
+	.string	"long long int"
+.LASF405:
+	.string	"misc_mode"
+.LASF291:
+	.string	"new_fdt"
+.LASF22:
+	.string	"___strtok"
+.LASF357:
+	.string	"net_boot_file_expected_size_in_blocks"
+.LASF268:
+	.string	"enable"
+.LASF366:
+	.string	"of_match"
+.LASF202:
+	.string	"UCLASS_NVME"
+.LASF265:
+	.string	"tlb_emerg"
+.LASF129:
+	.string	"bootm_headers"
+.LASF55:
+	.string	"protect"
+.LASF234:
+	.string	"UCLASS_USB"
+.LASF395:
+	.string	"uclass_driver"
+.LASF245:
+	.string	"UCLASS_RC"
+.LASF298:
+	.string	"timebase_h"
+.LASF299:
+	.string	"timebase_l"
+.LASF440:
+	.string	"prog_addr"
+.LASF179:
+	.string	"UCLASS_DISPLAY"
+.LASF351:
+	.string	"net_null_ethaddr"
+.LASF278:
+	.string	"env_valid"
+.LASF34:
+	.string	"parent"
+.LASF168:
+	.string	"UCLASS_PCI_EMUL"
+.LASF38:
+	.string	"parent_priv"
+.LASF410:
+	.string	"OTP_NS"
+.LASF246:
+	.string	"UCLASS_CHARGE_DISPLAY"
+.LASF321:
+	.string	"load_addr"
+.LASF134:
+	.string	"fit_hdr_os"
+.LASF90:
+	.string	"_datarelrolocal_start_ofs"
+.LASF441:
+	.string	"timeout"
+.LASF448:
+	.string	"dev_get_driver_data"
+.LASF418:
+	.string	"spl_rockchip_otp_stop"
+.LASF270:
+	.string	"addr"
+.LASF412:
+	.string	"read"
+.LASF8:
+	.string	"unsigned int"
+.LASF16:
+	.string	"ushort"
+.LASF326:
+	.string	"eth_device"
+.LASF414:
+	.string	"ioctl"
+.LASF447:
+	.string	"dev_read_u32_default"
+.LASF294:
+	.string	"ufdt_blob"
+.LASF375:
+	.string	"priv_auto_alloc_size"
+.LASF301:
+	.string	"malloc_limit"
+.LASF211:
+	.string	"UCLASS_PMIC"
+.LASF437:
+	.string	"rk3588_secure_otp_write_byte"
+.LASF130:
+	.string	"legacy_hdr_os"
+.LASF99:
+	.string	"off_dt_strings"
+.LASF318:
+	.string	"monitor_flash_len"
+.LASF196:
+	.string	"UCLASS_MISC"
+.LASF67:
+	.string	"bi_memsize"
+.LASF24:
+	.string	"image_base"
+.LASF230:
+	.string	"UCLASS_SYSRESET"
+.LASF388:
+	.string	"current"
+.LASF183:
+	.string	"UCLASS_FIRMWARE"
+.LASF193:
+	.string	"UCLASS_LPC"
+.LASF431:
+	.string	"offset"
+.LASF189:
+	.string	"UCLASS_IDE"
+.LASF411:
+	.string	"misc_ops"
+.LASF310:
+	.string	"phandle"
+.LASF296:
+	.string	"of_root_f"
+.LASF403:
+	.string	"per_device_platdata_auto_alloc_size"
+.LASF156:
+	.string	"bootm_headers_t"
+.LASF73:
+	.string	"bi_arm_freq"
+.LASF217:
+	.string	"UCLASS_REMOTEPROC"
+.LASF331:
+	.string	"recv"
+.LASF126:
+	.string	"type"
+.LASF137:
+	.string	"fit_hdr_rd"
+.LASF277:
+	.string	"env_addr"
+.LASF72:
+	.string	"bi_sramsize"
+.LASF289:
+	.string	"uclass_root"
+.LASF182:
+	.string	"UCLASS_GPIO"
+.LASF422:
+	.string	"otp_cru_rst_base"
+.LASF212:
+	.string	"UCLASS_PWM"
+.LASF58:
+	.string	"long double"
+.LASF279:
+	.string	"ram_top"
+.LASF442:
+	.string	"rk3588_secure_otp_read"
+.LASF307:
+	.string	"console_evt"
+.LASF146:
+	.string	"rd_start"
+.LASF213:
+	.string	"UCLASS_POWER_DOMAIN"
+.LASF216:
+	.string	"UCLASS_REGULATOR"
+.LASF323:
+	.string	"save_size"
+.LASF174:
+	.string	"UCLASS_CLK"
+.LASF31:
+	.string	"uclass_platdata"
+.LASF445:
+	.string	"dev_get_platdata"
+.LASF328:
+	.string	"iobase"
+.LASF89:
+	.string	"_datarel_start_ofs"
+.LASF266:
+	.string	"pre_serial"
+.LASF451:
+	.ascii	"GNU C11 6.3.1 201"
+	.string	"70404 -mstrict-align -march=armv8-a+nosimd -mlittle-endian -mabi=lp64 -g -Os -fno-builtin -ffreestanding -fshort-wchar -fno-stack-protector -fno-delete-null-pointer-checks -fstack-usage -ffunction-sections -fdata-sections -ffixed-r9 -fno-common -ffixed-x18"
+.LASF119:
+	.string	"ih_name"
+.LASF115:
+	.string	"ih_os"
+.LASF153:
+	.string	"cmdline_end"
+.LASF348:
+	.string	"net_rx_packet"
+.LASF257:
+	.string	"LOGF_MAX_CATEGORIES"
+.LASF290:
+	.string	"fdt_blob"
+.LASF392:
+	.string	"udevice_id"
+.LASF51:
+	.string	"size"
+.LASF10:
+	.string	"long long unsigned int"
+.LASF401:
+	.string	"destroy"
+.LASF107:
+	.string	"image_header"
+.LASF380:
+	.string	"length"
+.LASF20:
+	.string	"__be32"
+.LASF68:
+	.string	"bi_flashstart"
+.LASF136:
+	.string	"fit_noffset_os"
+.LASF197:
+	.string	"UCLASS_MMC"
+.LASF333:
+	.string	"write_hwaddr"
+.LASF256:
+	.string	"UCLASS_INVALID"
+.LASF236:
+	.string	"UCLASS_USB_HUB"
+.LASF374:
+	.string	"child_post_remove"
+.LASF41:
+	.string	"sibling_node"
+.LASF293:
+	.string	"of_root"
+.LASF252:
+	.string	"UCLASS_EBC"
+.LASF57:
+	.string	"flash_info"
+.LASF101:
+	.string	"version"
+.LASF332:
+	.string	"halt"
+.LASF62:
+	.string	"region"
+.LASF105:
+	.string	"size_dt_struct"
+.LASF287:
+	.string	"dm_root"
+.LASF254:
+	.string	"UCLASS_RNG"
+.LASF306:
+	.string	"sys_start_tick"
+.LASF312:
+	.string	"properties"
+.LASF199:
+	.string	"UCLASS_MTD"
+.LASF94:
+	.string	"fdt32_t"
+.LASF286:
+	.string	"new_gd"
+.LASF201:
+	.string	"UCLASS_NORTHBRIDGE"
+.LASF78:
+	.string	"bi_enetaddr"
+.LASF315:
+	.string	"mtd_info"
+.LASF372:
+	.string	"child_post_bind"
+.LASF444:
+	.string	"exit"
+.LASF324:
+	.string	"in_addr"
+.LASF349:
+	.string	"net_rx_packet_len"
+.LASF329:
+	.string	"init"
+.LASF319:
+	.string	"__dtb_dt_begin"
+.LASF218:
+	.string	"UCLASS_RESET"
+.LASF139:
+	.string	"fit_noffset_rd"
+.LASF172:
+	.string	"UCLASS_AHCI"
+.LASF12:
+	.string	"phys_size_t"
+.LASF27:
+	.string	"driver"
+.LASF88:
+	.string	"FIQ_STACK_START"
+.LASF154:
+	.string	"verify"
+.LASF383:
+	.string	"ofnode"
+.LASF28:
+	.string	"name"
+.LASF253:
+	.string	"UCLASS_EINK_DISPLAY"
+.LASF204:
+	.string	"UCLASS_PANEL_BACKLIGHT"
+.LASF232:
+	.string	"UCLASS_TIMER"
+.LASF227:
+	.string	"UCLASS_SPI_FLASH"
+.LASF276:
+	.string	"have_console"
+.LASF81:
+	.string	"bi_busfreq"
+.LASF6:
+	.string	"short int"
+.LASF421:
+	.string	"otp_mask_base"
+.LASF210:
+	.string	"UCLASS_PINCTRL"
+.LASF220:
+	.string	"UCLASS_RAMDISK"
+.LASF167:
+	.string	"UCLASS_I2C_EMUL"
+.LASF226:
+	.string	"UCLASS_SPMI"
+.LASF369:
+	.string	"remove"
+.LASF164:
+	.string	"UCLASS_TEST_BUS"
+.LASF322:
+	.string	"save_addr"
+.LASF377:
+	.string	"per_child_auto_alloc_size"
+.LASF302:
+	.string	"malloc_ptr"
+.LASF420:
+	.string	"secure_conf_base"
+.LASF151:
+	.string	"initrd_end"
+.LASF397:
+	.string	"pre_unbind"
+.LASF416:
+	.string	"secure_otp_data"
+.LASF269:
+	.string	"baudrate"
+.LASF91:
+	.string	"_datarellocal_start_ofs"
+.LASF40:
+	.string	"child_head"
+.LASF258:
+	.string	"arch_global_data"
+.LASF255:
+	.string	"UCLASS_COUNT"
+.LASF158:
+	.string	"sha1_der_prefix"
+.LASF49:
+	.string	"block_drvr"
+.LASF308:
+	.string	"rollback_index"
+.LASF53:
+	.string	"flash_id"
+.LASF249:
+	.string	"UCLASS_CRYPTO"
+.LASF309:
+	.string	"device_node"
+.LASF281:
+	.string	"ram_size"
+.LASF145:
+	.string	"fit_noffset_setup"
+.LASF106:
+	.string	"working_fdt"
+.LASF295:
+	.string	"fdt_blob_kern"
+.LASF341:
+	.string	"net_root_path"
+.LASF180:
+	.string	"UCLASS_DMA"
+.LASF86:
+	.string	"bd_t"
+.LASF325:
+	.string	"s_addr"
+.LASF429:
+	.string	"request"
+.LASF399:
+	.string	"post_probe"
+.LASF350:
+	.string	"net_bcast_ethaddr"
+.LASF83:
+	.string	"bi_boot_params"
+.LASF417:
+	.string	"spl_rockchip_otp_start"
+.LASF19:
+	.string	"uint32_t"
+.LASF386:
+	.string	"mem_malloc_brk"
+.LASF336:
+	.string	"net_gateway"
+.LASF376:
+	.string	"platdata_auto_alloc_size"
+.LASF66:
+	.string	"bi_memstart"
+.LASF443:
+	.string	"rk3588_secure_otp_read_byte"
+.LASF406:
+	.string	"DECOM_LZ4"
+.LASF240:
+	.string	"UCLASS_VIDEO_CONSOLE"
+.LASF335:
+	.string	"eth_current"
+.LASF371:
+	.string	"ofdata_to_platdata"
+.LASF64:
+	.string	"reserved"
+.LASF85:
+	.string	"bi_dram"
+.LASF2:
+	.string	"short unsigned int"
+.LASF96:
+	.string	"magic"
+.LASF143:
+	.string	"fit_hdr_setup"
+.LASF132:
+	.string	"legacy_hdr_valid"
+.LASF60:
+	.string	"base"
+.LASF221:
+	.string	"UCLASS_RTC"
+.LASF259:
+	.string	"timer_rate_hz"
+.LASF52:
+	.string	"sector_count"
+.LASF118:
+	.string	"ih_comp"
+.LASF396:
+	.string	"post_bind"
+.LASF438:
+	.string	"prog_data"
+.LASF370:
+	.string	"unbind"
+.LASF148:
+	.string	"ft_addr"
+.LASF250:
+	.string	"UCLASS_ETH_PHY"
+.LASF4:
+	.string	"uchar"
+.LASF149:
+	.string	"ft_len"
+.LASF47:
+	.string	"next"
+.LASF428:
+	.string	"secure_otp_ioctl"
+.LASF394:
+	.string	"data"
+.LASF200:
+	.string	"UCLASS_NOP"
+.LASF144:
+	.string	"fit_uname_setup"
+.LASF48:
+	.string	"prev"
+.LASF205:
+	.string	"UCLASS_PCH"
+.LASF206:
+	.string	"UCLASS_PCI"
+.LASF337:
+	.string	"net_netmask"
+.LASF33:
+	.string	"driver_data"
+.LASF87:
+	.string	"IRQ_STACK_START"
+.LASF171:
+	.string	"UCLASS_ADC"
+.LASF166:
+	.string	"UCLASS_SPI_EMUL"
+.LASF263:
+	.string	"tlb_size"
+.LASF141:
+	.string	"fit_uname_fdt"
+	.ident	"GCC: (Linaro GCC 6.3-2017.05) 6.3.1 20170404"
+	.section	.note.GNU-stack,"",@progbits

commit 9730632a558e883ca886c532d34384df441b98fb
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Nov 18 20:57:05 2021 +0800

    rockchip: rk3588: add some definitions of secure otp
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I77ceaa270454411a5a6435bc5f5d759f618801ab

diff --git a/include/configs/rk3588_common.h b/include/configs/rk3588_common.h
index a48cd40f65..782347285d 100644
--- a/include/configs/rk3588_common.h
+++ b/include/configs/rk3588_common.h
@@ -30,6 +30,15 @@
 #define GICR_BASE			0xfe680000
 #define GICC_BASE			0xfe600000
 
+/* secure otp */
+#define OTP_UBOOT_ROLLBACK_OFFSET	0x150
+#define OTP_UBOOT_ROLLBACK_WORDS	2	/* 64 bits, 2 words */
+#define OTP_ALL_ONES_NUM_BITS		32
+#define OTP_SECURE_BOOT_ENABLE_ADDR	0x20
+#define OTP_SECURE_BOOT_ENABLE_SIZE	1
+#define OTP_RSA_HASH_ADDR		0x9c0
+#define OTP_RSA_HASH_SIZE		32
+
 /* MMC/SD IP block */
 #define CONFIG_BOUNCE_BUFFER
 

commit a4de9eca49064b82bad4ae9502eaccd94996ccaa
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Sat Nov 13 18:00:50 2021 +0800

    mmc: rockchip_sdhci: enable HS400 for rk3588
    
    1. set CARD_IS_EMMC bit to enable Data Strobe for HS400
    2. config the transmit clock source (DLL TX) is original clock input
    3. config Command output source and Command output enable are from
    register output triggered by clock falling edge
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: Idcd78fa91a53995888bf692f09e3d442eab0a323

diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index 37e8e43189..8b11e064cd 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -40,6 +40,12 @@ DECLARE_GLOBAL_DATA_PTR;
 	PHYCTRL_DLLRDY_DONE)
 
 /* Rockchip specific Registers */
+#define DWCMSHC_CTRL_HS400		0x7
+#define DWCMSHC_CARD_IS_EMMC		BIT(0)
+#define DWCMSHC_ENHANCED_STROBE		BIT(8)
+
+#define DWCMSHC_HOST_CTRL3		0x508
+#define DWCMSHC_EMMC_CONTROL		0x52c
 #define DWCMSHC_EMMC_DLL_CTRL		0x800
 #define DWCMSHC_EMMC_DLL_CTRL_RESET	BIT(1)
 #define DWCMSHC_EMMC_DLL_RXCLK		0x804
@@ -55,10 +61,11 @@ DECLARE_GLOBAL_DATA_PTR;
 #define DWCMSHC_EMMC_DLL_INC_VALUE	2
 #define DWCMSHC_EMMC_DLL_INC		8
 #define DWCMSHC_EMMC_DLL_DLYENA		BIT(27)
-#define DLL_TXCLK_TAPNUM_DEFAULT	0x10
+#define DLL_TXCLK_TAPNUM_DEFAULT	0x8
 #define DLL_TXCLK_TAPNUM_90_DEGREES	0x8
 #define DLL_STRBIN_TAPNUM_DEFAULT	0x3
 #define DLL_TXCLK_TAPNUM_FROM_SW	BIT(24)
+#define DLL_TXCLK_NO_INVERTER		BIT(29)
 #define DWCMSHC_EMMC_DLL_LOCKED		BIT(8)
 #define DWCMSHC_EMMC_DLL_TIMEOUT	BIT(9)
 #define DLL_RXCLK_NO_INVERTER		1
@@ -66,6 +73,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define DLL_CMDOUT_TAPNUM_90_DEGREES	0x8
 #define DLL_CMDOUT_TAPNUM_FROM_SW	BIT(24)
 #define DLL_CMDOUT_SRC_CLK_NEG		BIT(28)
+#define DLL_CMDOUT_EN_SRC_CLK_NEG	BIT(29)
 
 #define DWCMSHC_ENHANCED_STROBE		BIT(8)
 #define DLL_LOCK_WO_TMOUT(x) \
@@ -97,6 +105,7 @@ struct rockchip_sdhc {
 
 struct sdhci_data {
 	int (*emmc_set_clock)(struct sdhci_host *host, unsigned int clock);
+	void (*set_ios_post)(struct sdhci_host *host);
 	int (*get_phy)(struct udevice *dev);
 	u32 flags;
 #define RK_DLL_CMD_OUT		BIT(1)
@@ -314,7 +323,7 @@ static int dwcmshc_sdhci_emmc_set_clock(struct sdhci_host *host, unsigned int cl
 {
 	struct rockchip_sdhc *priv = container_of(host, struct rockchip_sdhc, host);
 	struct sdhci_data *data = (struct sdhci_data *)dev_get_driver_data(priv->dev);
-	u32 txclk_tapnum = DLL_TXCLK_TAPNUM_DEFAULT, extra;
+	u32 txclk_tapnum = DLL_TXCLK_TAPNUM_90_DEGREES, extra;
 	int timeout = 500, ret;
 
 	ret = rockchip_emmc_set_clock(host, clock);
@@ -344,28 +353,22 @@ static int dwcmshc_sdhci_emmc_set_clock(struct sdhci_host *host, unsigned int cl
 			extra |= DLL_RXCLK_NO_INVERTER << DWCMSHC_EMMC_DLL_RXCLK_SRCSEL;
 		sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_RXCLK);
 
-		if ((data->flags & RK_DLL_CMD_OUT) &&
-		   (host->mmc->timing == MMC_TIMING_MMC_HS400 ||
-		    host->mmc->timing == MMC_TIMING_MMC_HS400ES)) {
-
-			txclk_tapnum = DLL_TXCLK_TAPNUM_90_DEGREES;
-
-			extra = DWCMSHC_EMMC_DLL_DLYENA |
-				DLL_CMDOUT_TAPNUM_90_DEGREES |
-				DLL_CMDOUT_TAPNUM_FROM_SW |
-				DLL_CMDOUT_SRC_CLK_NEG;
-			sdhci_writel(host, extra, DECMSHC_EMMC_DLL_CMDOUT);
-		}
-
 		extra = DWCMSHC_EMMC_DLL_DLYENA |
 			DLL_TXCLK_TAPNUM_FROM_SW |
+			DLL_TXCLK_NO_INVERTER|
 			txclk_tapnum;
+
 		sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_TXCLK);
 
 		extra = DWCMSHC_EMMC_DLL_DLYENA |
 			DLL_STRBIN_TAPNUM_DEFAULT;
 		sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_STRBIN);
 	} else {
+		/* Disable cmd conflict check */
+		extra = sdhci_readl(host, DWCMSHC_HOST_CTRL3);
+		extra &= ~BIT(0);
+		sdhci_writel(host, extra, DWCMSHC_HOST_CTRL3);
+
 		/* reset the clock phase when the frequency is lower than 100MHz */
 		sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_CTRL);
 		sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_RXCLK);
@@ -373,10 +376,32 @@ static int dwcmshc_sdhci_emmc_set_clock(struct sdhci_host *host, unsigned int cl
 		sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_STRBIN);
 		sdhci_writel(host, 0, DECMSHC_EMMC_DLL_CMDOUT);
 	}
-
 	return ret;
 }
 
+static void dwcmshc_sdhci_set_ios_post(struct sdhci_host *host)
+{
+	u16 ctrl;
+	u32 extra;
+	u32 timing = host->mmc->timing;
+
+	if (timing == MMC_TIMING_MMC_HS400 || timing == MMC_TIMING_MMC_HS400ES) {
+		ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2);
+		ctrl &= ~SDHCI_CTRL_UHS_MASK;
+		ctrl |= DWCMSHC_CTRL_HS400;
+		sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2);
+
+		/* set CARD_IS_EMMC bit to enable Data Strobe for HS400 */
+		ctrl = sdhci_readw(host, DWCMSHC_EMMC_CONTROL);
+		ctrl |= DWCMSHC_CARD_IS_EMMC;
+		sdhci_writew(host, ctrl, DWCMSHC_EMMC_CONTROL);
+
+		extra = DLL_CMDOUT_SRC_CLK_NEG |
+			DLL_CMDOUT_EN_SRC_CLK_NEG;
+		sdhci_writel(host, extra, DECMSHC_EMMC_DLL_CMDOUT);
+	}
+}
+
 static int dwcmshc_emmc_get_phy(struct udevice *dev)
 {
 	return 0;
@@ -393,8 +418,19 @@ static int rockchip_sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
 	return data->emmc_set_clock(host, clock);
 }
 
+static void rockchip_sdhci_set_ios_post(struct sdhci_host *host)
+{
+	struct rockchip_sdhc *priv =
+			container_of(host, struct rockchip_sdhc, host);
+	struct sdhci_data *data = (struct sdhci_data *)dev_get_driver_data(priv->dev);
+
+	if (data && data->set_ios_post)
+		data->set_ios_post(host);
+}
+
 static struct sdhci_ops rockchip_sdhci_ops = {
 	.set_clock	= rockchip_sdhci_set_clock,
+	.set_ios_post	= rockchip_sdhci_set_ios_post,
 };
 
 static int rockchip_sdhci_probe(struct udevice *dev)
@@ -500,6 +536,7 @@ static const struct sdhci_data rk3568_data = {
 static const struct sdhci_data rk3588_data = {
 	.emmc_set_clock = dwcmshc_sdhci_emmc_set_clock,
 	.get_phy = dwcmshc_emmc_get_phy,
+	.set_ios_post = dwcmshc_sdhci_set_ios_post,
 	.flags = RK_DLL_CMD_OUT,
 };
 

commit 64f7a6712439642175b7698af79c54271b3df35b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 15 09:40:54 2021 +0000

    rockchip: rk3568: add CLK_SCMI build control
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Iadeeef76cfd75d344b68fdaa832fe27da26ffaf7

diff --git a/arch/arm/mach-rockchip/rk3568/clk_rk3568.c b/arch/arm/mach-rockchip/rk3568/clk_rk3568.c
index fdafca7db4..0e2838d676 100644
--- a/arch/arm/mach-rockchip/rk3568/clk_rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/clk_rk3568.c
@@ -16,7 +16,7 @@ int rockchip_get_clk(struct udevice **devp)
 			DM_GET_DRIVER(rockchip_rk3568_cru), devp);
 }
 
-#ifdef CONFIG_CLK_SCMI
+#if CONFIG_IS_ENABLED(CLK_SCMI)
 int rockchip_get_scmi_clk(struct udevice **devp)
 {
 	return uclass_get_device_by_driver(UCLASS_CLK,
diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c
index e8caa3df85..22b725ebab 100644
--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
@@ -938,7 +938,7 @@ int spl_fit_standalone_release(char *id, uintptr_t entry_point)
 }
 #endif
 
-#ifdef CONFIG_CLK_SCMI
+#if CONFIG_IS_ENABLED(CLK_SCMI)
 #include <dm.h>
 /*
  * armclk: 1104M:

commit 16a1781ee1a7d4bf46e2fb6a1cdee1d5534cbeab
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Nov 16 07:41:10 2021 +0000

    rockchip: rk3588: clk use CONFIG_IS_ENABLED(CLK_SCMI)
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If3028dd10e45ef355561159e267603381ce3781f

diff --git a/arch/arm/mach-rockchip/rk3588/clk_rk3588.c b/arch/arm/mach-rockchip/rk3588/clk_rk3588.c
index b8223fa202..c2c8f1e65c 100644
--- a/arch/arm/mach-rockchip/rk3588/clk_rk3588.c
+++ b/arch/arm/mach-rockchip/rk3588/clk_rk3588.c
@@ -16,7 +16,7 @@ int rockchip_get_clk(struct udevice **devp)
 			DM_GET_DRIVER(rockchip_rk3588_cru), devp);
 }
 
-#ifdef CONFIG_CLK_SCMI
+#if CONFIG_IS_ENABLED(CLK_SCMI)
 int rockchip_get_scmi_clk(struct udevice **devp)
 {
 	return uclass_get_device_by_driver(UCLASS_CLK,

commit 09f31aed858c36a8a5ee20789712e65bb4762068
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Fri Nov 12 18:24:02 2021 +0800

    rockchip: rng: add trngv1 for rk3588
    
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
    Change-Id: Ifa5cfe6d99beba9912810253db67613a616519f1

diff --git a/drivers/rng/rockchip_rng.c b/drivers/rng/rockchip_rng.c
index 47fb140077..7287afd7a4 100644
--- a/drivers/rng/rockchip_rng.c
+++ b/drivers/rng/rockchip_rng.c
@@ -42,9 +42,41 @@
 #define CRYPTO_V2_RNG_DOUT_0			0x0410
 /* end of CRYPTO V2 register define */
 
+/* start of TRNG V1 register define */
+#define TRNG_V1_CTRL				0x0000
+#define TRNG_V1_CTRL_NOP			_SBF(0, 0x00)
+#define TRNG_V1_CTRL_RAND			_SBF(0, 0x01)
+#define TRNG_V1_CTRL_SEED			_SBF(0, 0x02)
+
+#define TRNG_V1_MODE				0x0008
+#define TRNG_V1_MODE_128_BIT			_SBF(3, 0x00)
+#define TRNG_V1_MODE_256_BIT			_SBF(3, 0x01)
+
+#define TRNG_V1_IE				0x0010
+#define TRNG_V1_IE_GLBL_EN			BIT(31)
+#define TRNG_V1_IE_SEED_DONE_EN			BIT(1)
+#define TRNG_V1_IE_RAND_RDY_EN			BIT(0)
+
+#define TRNG_V1_ISTAT				0x0014
+#define TRNG_V1_ISTAT_RAND_RDY			BIT(0)
+
+/* RAND0 ~ RAND7 */
+#define TRNG_V1_RAND0				0x0020
+#define TRNG_V1_RAND7				0x003C
+
+#define TRNG_V1_AUTO_RQSTS			0x0060
+
+#define TRNG_V1_VERSION				0x00F0
+#define TRNG_v1_VERSION_CODE			0x46BC
+/* end of TRNG V1 register define */
+
 #define RK_RNG_TIME_OUT	50000  /* max 50ms */
 
+#define trng_write(pdata, pos, val)	writel(val, (pdata)->base + (pos))
+#define trng_read(pdata, pos)		readl((pdata)->base + (pos))
+
 struct rk_rng_soc_data {
+	int (*rk_rng_init)(struct udevice *dev);
 	int (*rk_rng_read)(struct udevice *dev, void *data, size_t len);
 };
 
@@ -74,7 +106,7 @@ static int rk_rng_read_regs(fdt_addr_t addr, void *buf, size_t size)
 	return 0;
 }
 
-static int rk_v1_rng_read(struct udevice *dev, void *data, size_t len)
+static int rk_cryptov1_rng_read(struct udevice *dev, void *data, size_t len)
 {
 	struct rk_rng_platdata *pdata = dev_get_priv(dev);
 	u32 reg = 0;
@@ -105,7 +137,7 @@ exit:
 	return 0;
 }
 
-static int rk_v2_rng_read(struct udevice *dev, void *data, size_t len)
+static int rk_cryptov2_rng_read(struct udevice *dev, void *data, size_t len)
 {
 	struct rk_rng_platdata *pdata = dev_get_priv(dev);
 	u32 reg = 0;
@@ -139,6 +171,63 @@ exit:
 	return retval;
 }
 
+static int rk_trngv1_init(struct udevice *dev)
+{
+	u32 status, version;
+	u32 auto_reseed_cnt = 1000;
+	struct rk_rng_platdata *pdata = dev_get_priv(dev);
+
+	version = trng_read(pdata, TRNG_V1_VERSION);
+	if (version != TRNG_v1_VERSION_CODE) {
+		printf("wrong trng version, expected = %08x, actual = %08x",
+		       TRNG_V1_VERSION, version);
+		return -EFAULT;
+	}
+
+	/* wait in case of RND_RDY triggered at firs power on */
+	readl_poll_timeout(pdata->base + TRNG_V1_ISTAT, status,
+			   (status & TRNG_V1_ISTAT_RAND_RDY),
+			   RK_RNG_TIME_OUT);
+
+	/* clear RAND_RDY flag for first power on */
+	trng_write(pdata, TRNG_V1_ISTAT, status);
+
+	/* auto reseed after (auto_reseed_cnt * 16) byte rand generate */
+	trng_write(pdata, TRNG_V1_AUTO_RQSTS, auto_reseed_cnt);
+
+	return 0;
+}
+
+static int rk_trngv1_rng_read(struct udevice *dev, void *data, size_t len)
+{
+	struct rk_rng_platdata *pdata = dev_get_priv(dev);
+	u32 reg = 0;
+	int retval;
+
+	if (len > RK_HW_RNG_MAX)
+		return -EINVAL;
+
+	trng_write(pdata, TRNG_V1_MODE, TRNG_V1_MODE_256_BIT);
+	trng_write(pdata, TRNG_V1_CTRL, TRNG_V1_CTRL_RAND);
+
+	retval = readl_poll_timeout(pdata->base + TRNG_V1_ISTAT, reg,
+				    (reg & TRNG_V1_ISTAT_RAND_RDY),
+				    RK_RNG_TIME_OUT);
+	/* clear ISTAT */
+	trng_write(pdata, TRNG_V1_ISTAT, reg);
+
+	if (retval)
+		goto exit;
+
+	rk_rng_read_regs(pdata->base + TRNG_V1_RAND0, data, len);
+
+exit:
+	/* close TRNG */
+	trng_write(pdata, TRNG_V1_CTRL, TRNG_V1_CTRL_NOP);
+
+	return retval;
+}
+
 static int rockchip_rng_read(struct udevice *dev, void *data, size_t len)
 {
 	unsigned char *buf = data;
@@ -183,18 +272,27 @@ static int rockchip_rng_ofdata_to_platdata(struct udevice *dev)
 static int rockchip_rng_probe(struct udevice *dev)
 {
 	struct rk_rng_platdata *pdata = dev_get_priv(dev);
+	int ret = 0;
 
 	pdata->soc_data = (struct rk_rng_soc_data *)dev_get_driver_data(dev);
 
-	return 0;
+	if (pdata->soc_data->rk_rng_init)
+		ret = pdata->soc_data->rk_rng_init(dev);
+
+	return ret;
 }
 
-static const struct rk_rng_soc_data rk_rng_v1_soc_data = {
-	.rk_rng_read = rk_v1_rng_read,
+static const struct rk_rng_soc_data rk_cryptov1_soc_data = {
+	.rk_rng_read = rk_cryptov1_rng_read,
+};
+
+static const struct rk_rng_soc_data rk_cryptov2_soc_data = {
+	.rk_rng_read = rk_cryptov2_rng_read,
 };
 
-static const struct rk_rng_soc_data rk_rng_v2_soc_data = {
-	.rk_rng_read = rk_v2_rng_read,
+static const struct rk_rng_soc_data rk_trngv1_soc_data = {
+	.rk_rng_init = rk_trngv1_init,
+	.rk_rng_read = rk_trngv1_rng_read,
 };
 
 static const struct dm_rng_ops rockchip_rng_ops = {
@@ -204,11 +302,15 @@ static const struct dm_rng_ops rockchip_rng_ops = {
 static const struct udevice_id rockchip_rng_match[] = {
 	{
 		.compatible = "rockchip,cryptov1-rng",
-		.data = (ulong)&rk_rng_v1_soc_data,
+		.data = (ulong)&rk_cryptov1_soc_data,
 	},
 	{
 		.compatible = "rockchip,cryptov2-rng",
-		.data = (ulong)&rk_rng_v2_soc_data,
+		.data = (ulong)&rk_cryptov2_soc_data,
+	},
+	{
+		.compatible = "rockchip,trngv1",
+		.data = (ulong)&rk_trngv1_soc_data,
 	},
 	{},
 };

commit 54b0a818b9de426d7a3bcf9e55ab33507b217aee
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Nov 2 16:57:49 2021 +0800

    clk: rockchip: rk3588: add fake scmi clk for spl
    
    There is not smccc available for SPL, we need setup a
    fake scmi clk driver to take over the job from clk_scmi.c.
    
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I5c55a1dd3623acdfa1a4442cb2271a722414e526

diff --git a/drivers/clk/rockchip/clk_rk3588.c b/drivers/clk/rockchip/clk_rk3588.c
index a926abd3c8..ce00dd3a4d 100644
--- a/drivers/clk/rockchip/clk_rk3588.c
+++ b/drivers/clk/rockchip/clk_rk3588.c
@@ -1902,6 +1902,268 @@ U_BOOT_DRIVER(rockchip_rk3588_cru) = {
 	.probe		= rk3588_clk_probe,
 };
 
+#ifdef CONFIG_SPL_BUILD
+#define SCRU_BASE			0xfd7d0000
+#define BUSSCRU_BASE			0xfd7d8000
+#define GPLL_RATE			1188000000
+#define SPLL_RATE			702000000
+
+#ifndef BITS_WITH_WMASK
+#define BITS_WITH_WMASK(bits, msk, shift) \
+	((bits) << (shift)) | ((msk) << ((shift) + 16))
+#endif
+
+#define CLKDIV_6BITS_SHF(div, shift)	BITS_WITH_WMASK(div, 0x3fU, shift)
+#define CLKDIV_5BITS_SHF(div, shift)	BITS_WITH_WMASK(div, 0x1fU, shift)
+
+static ulong rk3588_clk_scmi_get_rate(struct clk *clk)
+{
+	u32 src, div;
+
+	switch (clk->id) {
+	case SCMI_SPLL:
+		src = readl(BUSSCRU_BASE + RK3588_MODE_CON0) & 0x3;
+		if (src == 0)
+			return OSC_HZ;
+		else if (src == 1)
+			return 702 * MHz;
+		else
+			return 32768;
+	case SCMI_CCLK_SD:
+		src = readl(SCRU_BASE + RK3588_CLKSEL_CON(3)) & 0x3000;
+		src = src >> 12;
+		div = readl(SCRU_BASE + RK3588_CLKSEL_CON(3)) & 0x0fc0;
+		div = div >> 6;
+		if (src == 1)
+			return SPLL_RATE / (div + 1);
+		else if (src == 2)
+			return OSC_HZ / (div + 1);
+		else
+			return GPLL_RATE / (div + 1);
+	case SCMI_DCLK_SD:
+		src = readl(SCRU_BASE + RK3588_CLKSEL_CON(3)) & 0x0020;
+		div = readl(SCRU_BASE + RK3588_CLKSEL_CON(3)) & 0x001f;
+		if (src)
+			return SPLL_RATE / (div + 1);
+		else
+			return GPLL_RATE / (div + 1);
+	case SCMI_CRYPTO_RNG:
+		src = readl(SCRU_BASE + RK3588_CLKSEL_CON(1)) & 0xc000;
+		src = src >> 14;
+		if (src == 0)
+			return 175 * MHz;
+		else if (src == 1)
+			return 116 * MHz;
+		else if (src == 2)
+			return 58 * MHz;
+		else
+			return OSC_HZ;
+	case SCMI_CRYPTO_CORE:
+		src = readl(SCRU_BASE + RK3588_CLKSEL_CON(1)) & 0x0c00;
+		src = src >> 10;
+		if (src == 0)
+			return 350 * MHz;
+		else if (src == 1)
+			return 233 * MHz;
+		else if (src == 2)
+			return 116 * MHz;
+		else
+			return OSC_HZ;
+	case SCMI_CRYPTO_PKA:
+		src = readl(SCRU_BASE + RK3588_CLKSEL_CON(1)) & 0x3000;
+		src = src >> 12;
+		if (src == 0)
+			return 350 * MHz;
+		else if (src == 1)
+			return 233 * MHz;
+		else if (src == 2)
+			return 116 * MHz;
+		else
+			return OSC_HZ;
+	case SCMI_KEYLADDER_CORE:
+		src = readl(SCRU_BASE + RK3588_CLKSEL_CON(2)) & 0x00c0;
+		src = src >> 6;
+		if (src == 0)
+			return 350 * MHz;
+		else if (src == 1)
+			return 233 * MHz;
+		else if (src == 2)
+			return 116 * MHz;
+		else
+			return OSC_HZ;
+	case SCMI_KEYLADDER_RNG:
+		src = readl(SCRU_BASE + RK3588_CLKSEL_CON(2)) & 0x0300;
+		src = src >> 8;
+		if (src == 0)
+			return 175 * MHz;
+		else if (src == 1)
+			return 116 * MHz;
+		else if (src == 2)
+			return 58 * MHz;
+		else
+			return OSC_HZ;
+	case SCMI_TCLK_WDT:
+		return OSC_HZ;
+	case SCMI_HCLK_SD:
+	case SCMI_HCLK_SECURE_NS:
+		src = readl(SCRU_BASE + RK3588_CLKSEL_CON(1)) & 0x000c;
+		src = src >> 2;
+		if (src == 0)
+			return 150 * MHz;
+		else if (src == 1)
+			return 100 * MHz;
+		else if (src == 2)
+			return 50 * MHz;
+		else
+			return OSC_HZ;
+	default:
+		return -ENOENT;
+	}
+};
+
+static ulong rk3588_clk_scmi_set_rate(struct clk *clk, ulong rate)
+{
+	u32 src, div;
+
+	switch (clk->id) {
+	case SCMI_SPLL:
+		if (rate >= 700 * MHz)
+			src = 1;
+		else
+			src = 0;
+		writel(BITS_WITH_WMASK(src, 0x3U, 0),
+		       BUSSCRU_BASE + RK3588_MODE_CON0);
+		break;
+	case SCMI_CCLK_SD:
+		if ((OSC_HZ % rate) == 0) {
+			div = DIV_ROUND_UP(OSC_HZ, rate);
+			writel(CLKDIV_6BITS_SHF(div - 1, 6) |
+			       BITS_WITH_WMASK(2U, 0x3U, 12),
+			       SCRU_BASE + RK3588_CLKSEL_CON(3));
+		} else if ((SPLL_RATE % rate) == 0) {
+			div = DIV_ROUND_UP(SPLL_RATE, rate);
+			writel(CLKDIV_6BITS_SHF(div - 1, 6) |
+			       BITS_WITH_WMASK(1U, 0x3U, 12),
+			       SCRU_BASE + RK3588_CLKSEL_CON(3));
+		} else {
+			div = DIV_ROUND_UP(GPLL_RATE, rate);
+			writel(CLKDIV_6BITS_SHF(div - 1, 6) |
+			       BITS_WITH_WMASK(0U, 0x3U, 12),
+			       SCRU_BASE + RK3588_CLKSEL_CON(3));
+		}
+		break;
+	case SCMI_DCLK_SD:
+		if ((SPLL_RATE % rate) == 0) {
+			div = DIV_ROUND_UP(SPLL_RATE, rate);
+			writel(CLKDIV_5BITS_SHF(div - 1, 0) |
+			       BITS_WITH_WMASK(1U, 0x1U, 5),
+			       SCRU_BASE + RK3588_CLKSEL_CON(3));
+		} else {
+			div = DIV_ROUND_UP(GPLL_RATE, rate);
+			writel(CLKDIV_5BITS_SHF(div - 1, 0) |
+			       BITS_WITH_WMASK(0U, 0x1U, 5),
+			       SCRU_BASE + RK3588_CLKSEL_CON(3));
+		}
+		break;
+	case SCMI_CRYPTO_RNG:
+		if (rate >= 175 * MHz)
+			src = 0;
+		else if (rate >= 116 * MHz)
+			src = 1;
+		else if (rate >= 58 * MHz)
+			src = 2;
+		else
+			src = 3;
+
+		writel(BITS_WITH_WMASK(src, 0x3U, 14),
+		       SCRU_BASE + RK3588_CLKSEL_CON(1));
+		break;
+	case SCMI_CRYPTO_CORE:
+		if (rate >= 350 * MHz)
+			src = 0;
+		else if (rate >= 233 * MHz)
+			src = 1;
+		else if (rate >= 116 * MHz)
+			src = 2;
+		else
+			src = 3;
+
+		writel(BITS_WITH_WMASK(src, 0x3U, 10),
+		       SCRU_BASE + RK3588_CLKSEL_CON(1));
+		break;
+	case SCMI_CRYPTO_PKA:
+		if (rate >= 350 * MHz)
+			src = 0;
+		else if (rate >= 233 * MHz)
+			src = 1;
+		else if (rate >= 116 * MHz)
+			src = 2;
+		else
+			src = 3;
+
+		writel(BITS_WITH_WMASK(src, 0x3U, 12),
+		       SCRU_BASE + RK3588_CLKSEL_CON(1));
+		break;
+	case SCMI_KEYLADDER_CORE:
+		if (rate >= 350 * MHz)
+			src = 0;
+		else if (rate >= 233 * MHz)
+			src = 1;
+		else if (rate >= 116 * MHz)
+			src = 2;
+		else
+			src = 3;
+
+		writel(BITS_WITH_WMASK(src, 0x3U, 6),
+		       SCRU_BASE + RK3588_CLKSEL_CON(2));
+		break;
+	case SCMI_KEYLADDER_RNG:
+		if (rate >= 175 * MHz)
+			src = 0;
+		else if (rate >= 116 * MHz)
+			src = 1;
+		else if (rate >= 58 * MHz)
+			src = 2;
+		else
+			src = 3;
+
+		writel(BITS_WITH_WMASK(src, 0x3U, 8),
+		       SCRU_BASE + RK3588_CLKSEL_CON(2));
+		break;
+	case SCMI_TCLK_WDT:
+		break;
+	case SCMI_HCLK_SD:
+	case SCMI_HCLK_SECURE_NS:
+		if (rate >= 150 * MHz)
+			src = 0;
+		else if (rate >= 100 * MHz)
+			src = 1;
+		else if (rate >= 50 * MHz)
+			src = 2;
+		else
+			src = 3;
+		writel(BITS_WITH_WMASK(src, 0x3U, 2),
+		       SCRU_BASE + RK3588_CLKSEL_CON(1));
+		break;
+	default:
+		return -ENOENT;
+	}
+	return 0;
+};
+
+/* A fake scmi driver for SPL/TPL where smccc agent is not available. */
+static const struct clk_ops scmi_clk_ops = {
+	.get_rate = rk3588_clk_scmi_get_rate,
+	.set_rate = rk3588_clk_scmi_set_rate,
+};
+
+U_BOOT_DRIVER(scmi_clock) = {
+	.name = "scmi_clk",
+	.id = UCLASS_CLK,
+	.ops = &scmi_clk_ops,
+};
+#endif
+
 #ifndef CONFIG_SPL_BUILD
 /**
  * soc_clk_dump() - Print clock frequencies

commit 0c30714b6fa9946050adb788919d3ca9195b4803
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Nov 12 07:49:31 2021 +0000

    dm: scmi: add build control for scmi smccc and clk
    
    There are not scmi clk and smccc agent available for SPL/TPL.
    
    But in SPL/TPL, we still need smccc agent driver to trigger
    scmi uclass to setup it's all protocols, then there should be
    a fake plat-specific scmi clk implementation to take over the
    clk get/set operation from clk_scmi.c.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ia0ebfa96b2aa6318083ddcd868af9381c74fb80c

diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 7ff5f7e3cf..8fd8ed88c4 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -69,6 +69,14 @@ config CLK_SCMI
 	  by a SCMI agent based on SCMI clock protocol communication
 	  with a SCMI server.
 
+config SPL_CLK_SCMI
+	bool "Enable SCMI clock driver in SPL"
+	depends on SPL_SCMI_FIRMWARE
+	help
+	  Enable this option in SPL if you want to support clock devices exposed
+	  by a SCMI agent based on SCMI clock protocol communication
+	  with a SCMI server.
+
 source "drivers/clk/tegra/Kconfig"
 source "drivers/clk/uniphier/Kconfig"
 source "drivers/clk/exynos/Kconfig"
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index a3c68d140b..92d3ad47b3 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -9,7 +9,9 @@ obj-$(CONFIG_$(SPL_TPL_)CLK) += clk-uclass.o clk_fixed_rate.o
 obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
 obj-$(CONFIG_SANDBOX) += clk_sandbox.o
 obj-$(CONFIG_SANDBOX) += clk_sandbox_test.o
+ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_CLK_SCMI) += clk_scmi.o
+endif
 obj-$(CONFIG_MACH_PIC32) += clk_pic32.o
 obj-$(CONFIG_CLK_RENESAS) += renesas/
 obj-$(CONFIG_CLK_ZYNQ) += clk_zynq.o
diff --git a/drivers/firmware/Makefile b/drivers/firmware/Makefile
index 59782dd325..eecae5b1ff 100644
--- a/drivers/firmware/Makefile
+++ b/drivers/firmware/Makefile
@@ -1,3 +1,3 @@
 obj-$(CONFIG_FIRMWARE)		+= firmware-uclass.o
 obj-$(CONFIG_ARM_PSCI_FW)	+= psci.o
-obj-$(CONFIG_SCMI_FIRMWARE)	+= scmi/
+obj-$(CONFIG_$(SPL_TPL_)SCMI_FIRMWARE)	+= scmi/
diff --git a/drivers/firmware/scmi/Kconfig b/drivers/firmware/scmi/Kconfig
index c3a109beac..3fbe7930c9 100644
--- a/drivers/firmware/scmi/Kconfig
+++ b/drivers/firmware/scmi/Kconfig
@@ -17,3 +17,11 @@ config SCMI_FIRMWARE
 	  based on message exchange. Messages can be exchange over tranport
 	  channels as a mailbox device or an Arm SMCCC service with some
 	  piece of identified shared memory.
+
+config SPL_SCMI_FIRMWARE
+	bool "Enable SPL SCMI support"
+	select FIRMWARE
+	select OF_TRANSLATE
+	depends on SANDBOX || DM_MAILBOX || ARM_SMCCC
+	help
+	  Ditto as SCMI_FIRMWARE.
diff --git a/drivers/firmware/scmi/smccc_agent.c b/drivers/firmware/scmi/smccc_agent.c
index 582ead5496..3491f7f9c1 100644
--- a/drivers/firmware/scmi/smccc_agent.c
+++ b/drivers/firmware/scmi/smccc_agent.c
@@ -27,6 +27,7 @@ struct scmi_smccc_channel {
 	struct scmi_smt smt;
 };
 
+#ifndef CONFIG_SPL_BUILD
 static int scmi_smccc_process_msg(struct udevice *dev, struct scmi_msg *msg)
 {
 	struct scmi_smccc_channel *chan = dev_get_priv(dev);
@@ -71,20 +72,23 @@ static int scmi_smccc_probe(struct udevice *dev)
 	return 0;
 }
 
+static const struct scmi_agent_ops scmi_smccc_ops = {
+	.process_msg = scmi_smccc_process_msg,
+};
+#endif
+
 static const struct udevice_id scmi_smccc_ids[] = {
 	{ .compatible = "arm,scmi-smc" },
 	{ }
 };
 
-static const struct scmi_agent_ops scmi_smccc_ops = {
-	.process_msg = scmi_smccc_process_msg,
-};
-
 U_BOOT_DRIVER(scmi_smccc) = {
 	.name		= "scmi-over-smccc",
 	.id		= UCLASS_SCMI_AGENT,
 	.of_match	= scmi_smccc_ids,
 	.priv_auto_alloc_size = sizeof(struct scmi_smccc_channel),
+#ifndef CONFIG_SPL_BUILD
 	.probe		= scmi_smccc_probe,
 	.ops		= &scmi_smccc_ops,
+#endif
 };

commit dfe24df30ae9908b9af6d7bd818a8619d02632cb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Nov 12 13:22:03 2021 +0000

    dm: firmware: bind "firmware" into DM with OF_LIVE disabled
    
    Do the same as commit:
    (5120375c5f dm: firmware: bind "firmware" into DM)
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ic574a44bf3abcb49b2559f6a5897167f638d1bab

diff --git a/drivers/core/root.c b/drivers/core/root.c
index ac18f3c4d8..c928256d12 100644
--- a/drivers/core/root.c
+++ b/drivers/core/root.c
@@ -241,6 +241,7 @@ static int dm_scan_fdt_live(struct udevice *parent,
 			debug("%s: ret=%d\n", np->name, ret);
 		}
 
+		/* There is no compatible in "/firmware", bind it by default. */
 		if (!pre_reloc_only && !strcmp(np->name, "firmware"))
 			ret = device_bind_driver_to_node(gd->dm_root,
 				"firmware", np->name, np_to_ofnode(np), NULL);
@@ -271,6 +272,7 @@ static int dm_scan_fdt_node(struct udevice *parent, const void *blob,
 			    int offset, bool pre_reloc_only)
 {
 	int ret = 0, err;
+	const char *name;
 
 	for (offset = fdt_first_subnode(blob, offset);
 	     offset > 0;
@@ -288,6 +290,12 @@ static int dm_scan_fdt_node(struct udevice *parent, const void *blob,
 			debug("%s: ret=%d\n", fdt_get_name(blob, offset, NULL),
 			      ret);
 		}
+
+		/* There is no compatible in "/firmware", bind it by default. */
+		name = fdt_get_name(blob, offset, NULL);
+		if (name && !strcmp(name, "firmware"))
+			ret = device_bind_driver_to_node(parent, "firmware",
+					name, offset_to_ofnode(offset), NULL);
 	}
 
 	if (ret)

commit d9da4b44281a549e13a5f3a136d1ffc16cd52f57
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Oct 8 02:22:50 2021 +0000

    dm: core: add kernel dtb version 2 mechanism support
    
    The V2 mechanism:
      - both of U-Boot and kernel's *ALL* devices are exist in dm tree.
      - put the necessary U-Boot devices in the head of device uclass list.
      - the both existence policy don't require phandle fixup any more.
      - it is for the next generation(rk3588 ...) or necessary platforms.
      - traverse u-boot fdt phandle if not found in kernel fdt, because
        the U-Boot framework gets phandle by of_root(from fdt) but not dm_root(from dm).
    The V1 mechanism(legacy):
      - U-Boot: only some necessary U-Boot devices(storage, crypto...) in dm tree.
      - kernel: all the devices(except the U-Boot only) in dm tree.
    
    The commit (bd3ad955a3 scripts/dtc: phandle index start from 0x1000000) is
    necessary for this v2 mechanism.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I0964f176a17725f9bb7c4e491373c278ed2bfcc5

diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
index 0746f6dabd..ec2b2e2c5e 100644
--- a/drivers/block/blk-uclass.c
+++ b/drivers/block/blk-uclass.c
@@ -566,7 +566,17 @@ static int blk_claim_devnum(enum if_type if_type, int devnum)
 
 			if (next < 0)
 				return next;
+#ifdef CONFIG_USING_KERNEL_DTB_V2
+			/*
+			 * Not allow devnum to be forced distributed.
+			 * See commit (e48eeb9ea3 dm: blk: Improve block device claiming).
+			 *
+			 * fix like: "Device 'dwmmc@fe2b0000': seq 0 is in use by 'sdhci@fe310000'"
+			 */
+			if (!(gd->flags & GD_FLG_KDTB_READY))
+#endif
 			desc->devnum = next;
+
 			return 0;
 		}
 	}
diff --git a/drivers/core/device.c b/drivers/core/device.c
index c3c775784e..a8803ee42c 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -37,6 +37,7 @@ static int device_bind_common(struct udevice *parent, const struct driver *drv,
 {
 	struct udevice *dev;
 	struct uclass *uc;
+	bool after_u_boot_dev = true;
 	int size, ret = 0;
 
 	if (devp)
@@ -50,7 +51,7 @@ static int device_bind_common(struct udevice *parent, const struct driver *drv,
 		return ret;
 	}
 
-#ifdef CONFIG_USING_KERNEL_DTB
+#if defined(CONFIG_USING_KERNEL_DTB) && !defined(CONFIG_USING_KERNEL_DTB_V2)
 	if (gd->flags & GD_FLG_RELOC) {
 		/* For mmc/nand/spiflash, just update from kernel dtb instead bind again*/
 		if (drv->id == UCLASS_MMC || drv->id == UCLASS_RKNAND ||
@@ -194,7 +195,59 @@ static int device_bind_common(struct udevice *parent, const struct driver *drv,
 	if (parent)
 		list_add_tail(&dev->sibling_node, &parent->child_head);
 
-	ret = uclass_bind_device(dev);
+#ifdef CONFIG_USING_KERNEL_DTB
+#ifdef CONFIG_USING_KERNEL_DTB_V2
+	/*
+	 * Put these U-Boot devices in the head of uclass device list for
+	 * the primary get by uclass_get_device_xxx().
+	 *
+	 * device-list: U0, U1, U2, ... K0, K1, K2, ... (prior u-boot dev)
+	 * device-list: K0, K1, K2, ... U0, U1, U2, ... (normal)
+	 *
+	 * U: u-boot dev
+	 * K: kernel dev
+	 */
+	u32 i, prior_u_boot_uclass_id[] = {
+		UCLASS_AHCI,		/* boot device */
+		UCLASS_BLK,
+		UCLASS_MMC,
+		UCLASS_MTD,
+		UCLASS_PCI,
+		UCLASS_RKNAND,
+		UCLASS_SPI_FLASH,
+
+		UCLASS_CRYPTO,		/* RSA security */
+		UCLASS_FIRMWARE,	/* psci sysreset */
+		UCLASS_RNG,		/* ramdom number */
+		UCLASS_SYSCON,		/* grf, pmugrf */
+		UCLASS_SYSRESET,	/* psci sysreset */
+		UCLASS_WDT,		/* reliable sysreset */
+	};
+
+	if (gd->flags & GD_FLG_KDTB_READY) {
+		after_u_boot_dev = false;
+		dev->flags |= DM_FLAG_KNRL_DTB;
+
+		for (i = 0; i < ARRAY_SIZE(prior_u_boot_uclass_id); i++) {
+			if (drv->id == prior_u_boot_uclass_id[i]) {
+				after_u_boot_dev = true;
+				break;
+			}
+		}
+
+		/* no u-boot dev ? */
+		if (!dev->uclass->u_boot_dev_head)
+			dev->uclass->u_boot_dev_head = &uc->dev_head;
+	} else {
+		if (!dev->uclass->u_boot_dev_head)
+			dev->uclass->u_boot_dev_head = &dev->uclass_node;
+	}
+#else
+	if (gd->flags & GD_FLG_KDTB_READY)
+		dev->flags |= DM_FLAG_KNRL_DTB;
+#endif
+#endif
+	ret = uclass_bind_device(dev, after_u_boot_dev);
 	if (ret)
 		goto fail_uclass_bind;
 
diff --git a/drivers/core/dump.c b/drivers/core/dump.c
index 3e6926a82b..1eb036c789 100644
--- a/drivers/core/dump.c
+++ b/drivers/core/dump.c
@@ -14,7 +14,6 @@ static void show_devices(struct udevice *dev, int depth, int last_flag)
 {
 	int i, is_last;
 	struct udevice *child;
-	int pre_reloc, remained;
 
 	/* print the first 11 characters to not break the tree-format. */
 	printf(" %08lx    %-10.10s [ %c ]   %-25.25s  ",
@@ -36,15 +35,15 @@ static void show_devices(struct udevice *dev, int depth, int last_flag)
 		}
 	}
 
-	pre_reloc = dev_read_bool(dev, "u-boot,dm-pre-reloc") ||
-		    dev_read_bool(dev, "u-boot,dm-spl");
-	if (pre_reloc)
-		remained = !list_empty(&dev->uclass_node);
-	else
-		remained = 0;
+#ifdef CONFIG_USING_KERNEL_DTB_V2
+	printf("%s %s\n", dev->name, dev->flags & DM_FLAG_KNRL_DTB ? "" : "*");
+#else
+	int pre_reloc, remained;
 
+	pre_reloc = dev->flags & DM_FLAG_KNRL_DTB ? 0 : 1;
+	remained = pre_reloc ? !list_empty(&dev->uclass_node) : 0;
 	printf("%s %s%s\n", dev->name, pre_reloc ? "*" : "", remained ? "*" : "");
-
+#endif
 	list_for_each_entry(child, &dev->child_head, sibling_node) {
 		is_last = list_is_last(&child->sibling_node, &dev->child_head);
 		show_devices(child, depth + 1, (last_flag << 1) | is_last);
@@ -72,13 +71,16 @@ void dm_dump_all(void)
  */
 static void dm_display_line(struct udevice *dev)
 {
-	printf("  %c [ %c ] %s @ %08lx",
-	       dev_read_bool(dev, "u-boot,dm-pre-pre_reloc") ||
-	       dev_read_bool(dev, "u-boot,dm-spl") ? '*' : ' ',
+	printf("  [ %c ] %s @ %08lx",
 	       dev->flags & DM_FLAG_ACTIVATED ? '+' : ' ',
 	       dev->name, (ulong)map_to_sysmem(dev));
 	if (dev->seq != -1 || dev->req_seq != -1)
 		printf(", seq %d, (req %d)", dev->seq, dev->req_seq);
+	if (dev->driver->id == UCLASS_BLK) {
+		struct blk_desc *desc = dev_get_uclass_platdata(dev);
+		printf(" | %s%d", blk_get_if_type_name(desc->if_type), desc->devnum);
+	}
+	printf(" %c", dev->flags & DM_FLAG_KNRL_DTB ? ' ' : '*');
 	puts("\n");
 }
 
diff --git a/drivers/core/of_access.c b/drivers/core/of_access.c
index 3729487387..a6d216fd70 100644
--- a/drivers/core/of_access.c
+++ b/drivers/core/of_access.c
@@ -387,6 +387,16 @@ struct device_node *of_find_node_by_phandle(phandle handle)
 	for_each_of_allnodes(np)
 		if (np->phandle == handle)
 			break;
+
+#ifdef CONFIG_USING_KERNEL_DTB_V2
+	/* If not find in kernel fdt, traverse u-boot fdt */
+	if (!np) {
+		for (np = gd->of_root_f; np; np = of_find_all_nodes(np)) {
+			if (np->phandle == handle)
+				break;
+		}
+	}
+#endif
 	(void)of_node_get(np);
 
 	return np;
diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c
index 096f0253f7..02f1bebd80 100644
--- a/drivers/core/uclass.c
+++ b/drivers/core/uclass.c
@@ -80,6 +80,9 @@ static int uclass_add(enum uclass_id id, struct uclass **ucp)
 		}
 	}
 	uc->uc_drv = uc_drv;
+#ifdef CONFIG_USING_KERNEL_DTB_V2
+	uc->u_boot_dev_head = NULL;
+#endif
 	INIT_LIST_HEAD(&uc->sibling_node);
 	INIT_LIST_HEAD(&uc->dev_head);
 	list_add(&uc->sibling_node, &DM_UCLASS_ROOT_NON_CONST);
@@ -564,14 +567,20 @@ int uclass_next_device_check(struct udevice **devp)
 	return device_probe(*devp);
 }
 
-int uclass_bind_device(struct udevice *dev)
+int uclass_bind_device(struct udevice *dev, bool after_u_boot_dev)
 {
 	struct uclass *uc;
 	int ret;
 
 	uc = dev->uclass;
+#ifdef CONFIG_USING_KERNEL_DTB_V2
+	if (after_u_boot_dev)
+		list_add_tail(&dev->uclass_node, &uc->dev_head);
+	else
+		list_add_tail(&dev->uclass_node, uc->u_boot_dev_head);
+#else
 	list_add_tail(&dev->uclass_node, &uc->dev_head);
-
+#endif
 	if (dev->parent) {
 		struct uclass_driver *uc_drv = dev->parent->uclass->uc_drv;
 
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index 508ba82242..c6875a02f5 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -91,6 +91,7 @@ typedef struct global_data {
 #ifdef CONFIG_USING_KERNEL_DTB
 	const void *ufdt_blob;		/* Our U-Boot device tree, NULL if none */
 	const void *fdt_blob_kern;	/* Kernel dtb at the tail of u-boot.bin */
+	struct device_node *of_root_f;  /* U-Boot of-root instance */
 #endif
 #endif
 	struct jt_funcs *jt;		/* jump table */
diff --git a/include/dm/device.h b/include/dm/device.h
index 813e49f330..4d7b2da0de 100644
--- a/include/dm/device.h
+++ b/include/dm/device.h
@@ -62,6 +62,9 @@ struct driver_info;
  */
 #define DM_FLAG_OS_PREPARE		(1 << 10)
 
+/* Device is from kernel dtb */
+#define DM_FLAG_KNRL_DTB		(1 << 31)
+
 /*
  * One or multiple of these flags are passed to device_remove() so that
  * a selective device removal as specified by the remove-stage and the
diff --git a/include/dm/uclass-internal.h b/include/dm/uclass-internal.h
index c086004318..5774fbb6fb 100644
--- a/include/dm/uclass-internal.h
+++ b/include/dm/uclass-internal.h
@@ -140,7 +140,7 @@ int uclass_find_device_by_ofnode(enum uclass_id id, ofnode node,
  * @dev:	Pointer to the device
  * #return 0 on success, -ve on error
  */
-int uclass_bind_device(struct udevice *dev);
+int uclass_bind_device(struct udevice *dev, bool after_u_boot_dev);
 
 /**
  * uclass_unbind_device() - Deassociate device with a uclass
diff --git a/include/dm/uclass.h b/include/dm/uclass.h
index b935a83b38..aafeb80c2c 100644
--- a/include/dm/uclass.h
+++ b/include/dm/uclass.h
@@ -37,6 +37,9 @@ struct uclass {
 	struct uclass_driver *uc_drv;
 	struct list_head dev_head;
 	struct list_head sibling_node;
+#ifdef CONFIG_USING_KERNEL_DTB_V2
+	struct list_head *u_boot_dev_head;
+#endif
 };
 
 struct driver;

commit 95eb462e2431638af60454b087d35e8b7af11f80
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Oct 8 02:24:09 2021 +0000

    rockchip: add kernel dtb version 2 mechanism support
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I592b53616685d4f27aa471a7bd88ba5680ee5ef4

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 1d6142c2e3..c24b950990 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -760,6 +760,20 @@ config USING_KERNEL_DTB
 	  the uart and emmc will still using U-Boot dtb, but other devices like
 	  regulator/pmic, display, usb will use dts node from kernel.
 
+config USING_KERNEL_DTB_V2
+	bool "Version 2 of kernel dtb mechanism"
+	depends on USING_KERNEL_DTB
+	default n
+	help
+	  The V2 mechanism:
+	    - both of U-Boot and kernel's *ALL* devices are exist in dm tree.
+	    - put the necessary U-Boot devices in the head of device uclass list.
+	    - the both existence policy don't require phandle fixup any more.
+	    - it is for the next generation(rk3588 ...) or necessary platforms.
+	  The V1 mechanism(legacy):
+	    - U-Boot: only some necessary U-Boot devices(storage, crypto...) in dm tree.
+	    - kernel: all the devices(except the U-Boot only) in dm tree.
+
 config EMBED_KERNEL_DTB_PATH
 	string "Embeded kernel dtb file path"
 	depends on USING_KERNEL_DTB
diff --git a/arch/arm/mach-rockchip/kernel_dtb.c b/arch/arm/mach-rockchip/kernel_dtb.c
index 53d7144a79..efe9c38a46 100644
--- a/arch/arm/mach-rockchip/kernel_dtb.c
+++ b/arch/arm/mach-rockchip/kernel_dtb.c
@@ -13,6 +13,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#ifndef CONFIG_USING_KERNEL_DTB_V2
 /* Here, only fixup cru phandle, pmucru is not included */
 static int phandles_fixup_cru(const void *fdt)
 {
@@ -193,6 +194,7 @@ static int phandles_fixup_gpio(const void *fdt, void *ufdt)
 
 	return 0;
 }
+#endif
 
 __weak int board_mmc_dm_reinit(struct udevice *dev)
 {
@@ -240,10 +242,17 @@ static int dtb_check_ok(void *kfdt, void *ufdt)
 
 int init_kernel_dtb(void)
 {
+#ifndef CONFIG_USING_KERNEL_DTB_V2
+	void *ufdt_blob = (void *)gd->fdt_blob;
+#endif
 	ulong fdt_addr = 0;
-	void *ufdt_blob;
 	int ret = -ENODEV;
 
+#ifdef CONFIG_USING_KERNEL_DTB_V2
+	printf("DM: v2\n");
+#else
+	printf("DM: v1\n");
+#endif
 	/*
 	 * If memory size <= 128MB, we firstly try to get "fdt_addr1_r".
 	 */
@@ -297,11 +306,10 @@ dtb_embed:
 	}
 
 dtb_okay:
-	ufdt_blob = (void *)gd->fdt_blob;
 	gd->fdt_blob = (void *)fdt_addr;
-
 	hotkey_run(HK_FDT);
 
+#ifndef CONFIG_USING_KERNEL_DTB_V2
 	/*
 	 * There is a phandle miss match between U-Boot and kernel dtb node,
 	 * we fixup it in U-Boot live dt nodes.
@@ -311,6 +319,7 @@ dtb_okay:
 	 */
 	phandles_fixup_cru((void *)gd->fdt_blob);
 	phandles_fixup_gpio((void *)gd->fdt_blob, (void *)ufdt_blob);
+#endif
 
 	gd->flags |= GD_FLG_KDTB_READY;
 	gd->of_root_f = gd->of_root;
@@ -330,3 +339,4 @@ dtb_okay:
 
 	return 0;
 }
+

commit d276a5eae5aa03f728a6d85c3ca4734dd76bda78
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Nov 13 10:12:01 2021 +0000

    rockchip: kernel dtb: init gd->of_root_f
    
    It is used in of_find_node_by_phandle().
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Iba3e9b486f3fa13c9de1da9e260f34956b0dbf80

diff --git a/arch/arm/mach-rockchip/kernel_dtb.c b/arch/arm/mach-rockchip/kernel_dtb.c
index 121c1c33ac..53d7144a79 100644
--- a/arch/arm/mach-rockchip/kernel_dtb.c
+++ b/arch/arm/mach-rockchip/kernel_dtb.c
@@ -313,6 +313,7 @@ dtb_okay:
 	phandles_fixup_gpio((void *)gd->fdt_blob, (void *)ufdt_blob);
 
 	gd->flags |= GD_FLG_KDTB_READY;
+	gd->of_root_f = gd->of_root;
 	of_live_build((void *)gd->fdt_blob, (struct device_node **)&gd->of_root);
 	dm_scan_fdt((void *)gd->fdt_blob, false);
 

commit fabd4de0b82789582a113830e37cf7042c6cbc2b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Nov 13 09:56:41 2021 +0000

    include: global_data: clean up
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I5368bd1f9e2de5641e1cae34cf18f1c4e6247632

diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index 0a0e439688..508ba82242 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -83,16 +83,15 @@ typedef struct global_data {
 #ifdef CONFIG_TIMER
 	struct udevice	*timer;		/* Timer instance for Driver Model */
 #endif
-	const void *fdt_blob_kern;	/* Kernel dtb at the tail of u-boot.bin */
 	const void *fdt_blob;		/* Our device tree, NULL if none */
-
-#ifdef CONFIG_USING_KERNEL_DTB
-	const void *ufdt_blob;		/* Our U-Boot device tree, NULL if none */
-#endif
 	void *new_fdt;			/* Relocated FDT */
 	unsigned long fdt_size;		/* Space reserved for relocated FDT */
 #ifdef CONFIG_OF_LIVE
 	struct device_node *of_root;
+#ifdef CONFIG_USING_KERNEL_DTB
+	const void *ufdt_blob;		/* Our U-Boot device tree, NULL if none */
+	const void *fdt_blob_kern;	/* Kernel dtb at the tail of u-boot.bin */
+#endif
 #endif
 	struct jt_funcs *jt;		/* jump table */
 	char env_buf[32];		/* buffer for env_get() before reloc. */

commit 6cebff1258ccc312a04260177a02130bdec39f2c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Nov 16 08:06:07 2021 +0000

    drivers: crypto: v2: use common api to get clk
    
    Phandle miss match between U-Boot and kernel has been solved,
    we use this common api to ignore clock difference about
    scmi clk and cru clk.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I9f53679ed38599261c8ecbfa36473543c566b4ed

diff --git a/drivers/crypto/rockchip/crypto_v2.c b/drivers/crypto/rockchip/crypto_v2.c
index 6d1b55c6d4..aa19ac0482 100644
--- a/drivers/crypto/rockchip/crypto_v2.c
+++ b/drivers/crypto/rockchip/crypto_v2.c
@@ -49,7 +49,6 @@ struct rk_crypto_soc_data {
 
 struct rockchip_crypto_priv {
 	fdt_addr_t			reg;
-	struct clk			clk;
 	u32				frequency;
 	char				*clocks;
 	u32				*frequencies;
@@ -1378,31 +1377,25 @@ exit:
 	return ret;
 }
 
-static int rk_crypto_set_clk(struct rockchip_crypto_priv *priv)
+static int rk_crypto_set_clk(struct udevice *dev)
 {
+	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
+	struct clk clk;
 	int i, ret;
-	u32* clocks;
 
 	if (!priv->clocks && priv->nclocks == 0)
 		return 0;
 
-#if CONFIG_IS_ENABLED(CLK_SCMI)
-	ret = rockchip_get_scmi_clk(&priv->clk.dev);
-#else
-	ret = rockchip_get_clk(&priv->clk.dev);
-#endif
-	if (priv->nclocks && ret) {
-		printf("Failed to get clk device, ret=%d\n", ret);
-		return ret;
-	}
-
-	clocks = (u32 *)priv->clocks;
 	for (i = 0; i < priv->nclocks; i++) {
-		priv->clk.id = clocks[i * 2 + 1];
-		ret = clk_set_rate(&priv->clk, priv->frequencies[i]);
+		ret = clk_get_by_index(dev, i, &clk);
+		if (ret < 0) {
+			printf("Failed to get clk index %d, ret=%d\n", i, ret);
+			return ret;
+		}
+		ret = clk_set_rate(&clk, priv->frequencies[i]);
 		if (ret < 0) {
 			printf("%s: Failed to set clk(%ld): ret=%d\n",
-			       __func__, priv->clk.id, ret);
+			       __func__, clk.id, ret);
 			return ret;
 		}
 	}
@@ -1424,7 +1417,7 @@ static int rockchip_crypto_probe(struct udevice *dev)
 	if (!priv->hw_ctx)
 		return -ENOMEM;
 
-	ret = rk_crypto_set_clk(priv);
+	ret = rk_crypto_set_clk(dev);
 	if (ret)
 		return ret;
 

commit 5c51263aff3d2d2520aa041c679a16ff0548e7e2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 15 08:59:43 2021 +0000

    drivers: crypto: v2: add CLK_SCMI build control
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I09e42bc9d88dd858d0cb35f15b7fa191d0babcee

diff --git a/drivers/crypto/rockchip/crypto_v2.c b/drivers/crypto/rockchip/crypto_v2.c
index d9b345cbd9..6d1b55c6d4 100644
--- a/drivers/crypto/rockchip/crypto_v2.c
+++ b/drivers/crypto/rockchip/crypto_v2.c
@@ -1386,7 +1386,7 @@ static int rk_crypto_set_clk(struct rockchip_crypto_priv *priv)
 	if (!priv->clocks && priv->nclocks == 0)
 		return 0;
 
-#ifdef CONFIG_CLK_SCMI
+#if CONFIG_IS_ENABLED(CLK_SCMI)
 	ret = rockchip_get_scmi_clk(&priv->clk.dev);
 #else
 	ret = rockchip_get_clk(&priv->clk.dev);

commit dbca2fe795da5dfc7d5d882c6a218f94e4783d58
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Fri Nov 12 14:42:40 2021 +0800

    drivers: crypto: v2: check whether memory is empty before freeing it
    
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
    Change-Id: Ie5ba9d982a03257466b90540dad66a7d63fd9492

diff --git a/drivers/crypto/rockchip/crypto_v2.c b/drivers/crypto/rockchip/crypto_v2.c
index f107d80734..d9b345cbd9 100644
--- a/drivers/crypto/rockchip/crypto_v2.c
+++ b/drivers/crypto/rockchip/crypto_v2.c
@@ -94,7 +94,7 @@ struct rockchip_crypto_priv {
 #define phys_to_virt(addr, area)	((unsigned long)addr)
 
 #define align_malloc(bytes, alignment)	memalign(alignment, bytes)
-#define align_free(addr)		free(addr)
+#define align_free(addr)		do {if (addr) free(addr);} while (0)
 
 #define ROUNDUP(size, alignment)	round_up(size, alignment)
 #define cache_op_inner(type, addr, size) \

commit fe0c4b199101f55d59623dc76b3d66fe25b43b26
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Fri Nov 12 14:37:46 2021 +0800

    drivers: crypto: v2: clear CRYPTO_DMA_INT_EN before calculating
    
    Disable all Crypto interrupts before calculating .
    
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
    Change-Id: I6d6467b510b2d8d513156b2fe40fb4d9d3ae192c

diff --git a/drivers/crypto/rockchip/crypto_v2.c b/drivers/crypto/rockchip/crypto_v2.c
index 959491c930..f107d80734 100644
--- a/drivers/crypto/rockchip/crypto_v2.c
+++ b/drivers/crypto/rockchip/crypto_v2.c
@@ -311,7 +311,7 @@ static int rk_hash_init(void *hw_ctx, u32 algo)
 	crypto_write(reg_ctrl | CRYPTO_WRITE_MASK_ALL, CRYPTO_FIFO_CTL);
 
 	/* enable src_item_done interrupt */
-	crypto_write(CRYPTO_SRC_ITEM_INT_EN, CRYPTO_DMA_INT_EN);
+	crypto_write(0, CRYPTO_DMA_INT_EN);
 
 	tmp_ctx->magic = RK_HASH_CTX_MAGIC;
 
@@ -813,8 +813,7 @@ static int hw_cipher_init(u32 chn, const u8 *key, const u8 *twk_key,
 
 	/* din_swap set 1, dout_swap set 1, default 1. */
 	crypto_write(0x00030003, CRYPTO_FIFO_CTL);
-	crypto_write(CRYPTO_LIST_DONE_INT_EN | CRYPTO_DST_ITEM_DONE_INT_EN,
-		     CRYPTO_DMA_INT_EN);
+	crypto_write(0, CRYPTO_DMA_INT_EN);
 
 	crypto_write(reg_ctrl | CRYPTO_WRITE_MASK_ALL, CRYPTO_BC_CTL);
 
@@ -958,8 +957,7 @@ static int hw_cipher_crypt(const u8 *in, u8 *out, u64 len,
 
 	/* din_swap set 1, dout_swap set 1, default 1. */
 	crypto_write(0x00030003, CRYPTO_FIFO_CTL);
-	crypto_write(CRYPTO_DST_ITEM_DONE_INT_EN | CRYPTO_LIST_DONE_INT_EN,
-		     CRYPTO_DMA_INT_EN);
+	crypto_write(0, CRYPTO_DMA_INT_EN);
 
 	reg_ctrl = crypto_read(CRYPTO_BC_CTL) | CRYPTO_BC_ENABLE;
 	crypto_write(reg_ctrl | CRYPTO_WRITE_MASK_ALL, CRYPTO_BC_CTL);

commit a24b2aebd37cd898e711ff941ec0b3f4d6e84e36
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Mon Nov 1 17:57:57 2021 +0800

    drivers: crypto: v2: support crypto without clock configuration
    
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
    Change-Id: Ia9d57efd9508cbe0420b884f351bdaf4064e2a8a

diff --git a/drivers/crypto/rockchip/crypto_v2.c b/drivers/crypto/rockchip/crypto_v2.c
index 766085b284..959491c930 100644
--- a/drivers/crypto/rockchip/crypto_v2.c
+++ b/drivers/crypto/rockchip/crypto_v2.c
@@ -1322,9 +1322,18 @@ static int rockchip_crypto_ofdata_to_platdata(struct udevice *dev)
 	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
 	int len, ret = -EINVAL;
 
+	memset(priv, 0x00, sizeof(*priv));
+
+	priv->reg = (fdt_addr_t)dev_read_addr_ptr(dev);
+	if (priv->reg == FDT_ADDR_T_NONE)
+		return -EINVAL;
+
+	crypto_base = priv->reg;
+
+	/* if there is no clocks in dts, just skip it */
 	if (!dev_read_prop(dev, "clocks", &len)) {
 		printf("Can't find \"clocks\" property\n");
-		return -EINVAL;
+		return 0;
 	}
 
 	memset(priv, 0x00, sizeof(*priv));
@@ -1360,10 +1369,6 @@ static int rockchip_crypto_ofdata_to_platdata(struct udevice *dev)
 		goto exit;
 	}
 
-	priv->reg = (fdt_addr_t)dev_read_addr_ptr(dev);
-
-	crypto_base = priv->reg;
-
 	return 0;
 exit:
 	if (priv->clocks)
@@ -1375,23 +1380,20 @@ exit:
 	return ret;
 }
 
-static int rockchip_crypto_probe(struct udevice *dev)
+static int rk_crypto_set_clk(struct rockchip_crypto_priv *priv)
 {
-	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
-	struct rk_crypto_soc_data *sdata;
-	int i, ret = 0;
+	int i, ret;
 	u32* clocks;
 
-	sdata = (struct rk_crypto_soc_data *)dev_get_driver_data(dev);
-	priv->soc_data = sdata;
-
-	priv->hw_ctx = memalign(LLI_ADDR_ALIGN_SIZE,
-				sizeof(struct rk_hash_ctx));
-	if (!priv->hw_ctx)
-		return -ENOMEM;
+	if (!priv->clocks && priv->nclocks == 0)
+		return 0;
 
+#ifdef CONFIG_CLK_SCMI
+	ret = rockchip_get_scmi_clk(&priv->clk.dev);
+#else
 	ret = rockchip_get_clk(&priv->clk.dev);
-	if (ret) {
+#endif
+	if (priv->nclocks && ret) {
 		printf("Failed to get clk device, ret=%d\n", ret);
 		return ret;
 	}
@@ -1407,6 +1409,27 @@ static int rockchip_crypto_probe(struct udevice *dev)
 		}
 	}
 
+	return 0;
+}
+
+static int rockchip_crypto_probe(struct udevice *dev)
+{
+	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
+	struct rk_crypto_soc_data *sdata;
+	int ret = 0;
+
+	sdata = (struct rk_crypto_soc_data *)dev_get_driver_data(dev);
+	priv->soc_data = sdata;
+
+	priv->hw_ctx = memalign(LLI_ADDR_ALIGN_SIZE,
+				sizeof(struct rk_hash_ctx));
+	if (!priv->hw_ctx)
+		return -ENOMEM;
+
+	ret = rk_crypto_set_clk(priv);
+	if (ret)
+		return ret;
+
 	hw_crypto_reset();
 
 	return 0;

commit 5b3e3895f59c6909e363b578ceab72bd172399a2
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Fri Jul 9 14:26:54 2021 +0800

    drivers: crypto: v2: add rk3588 support
    
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
    Change-Id: Ib9cf968803e3f7cb8df059be818655e51f529903

diff --git a/drivers/crypto/rockchip/crypto_v2.c b/drivers/crypto/rockchip/crypto_v2.c
index 8f21a016d5..766085b284 100644
--- a/drivers/crypto/rockchip/crypto_v2.c
+++ b/drivers/crypto/rockchip/crypto_v2.c
@@ -1486,6 +1486,10 @@ static const struct udevice_id rockchip_crypto_ids[] = {
 		.compatible = "rockchip,rk3568-crypto",
 		.data = (ulong)&soc_data_base_sm
 	},
+	{
+		.compatible = "rockchip,rk3588-crypto",
+		.data = (ulong)&soc_data_base_sm
+	},
 	{ }
 };
 

commit 41f62ac53730a9c89b1e30ee9f4ab14542c9fff2
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Nov 12 11:03:09 2021 +0800

    misc: rockchip decompress: change the interface of clock
    
    Use the clk_get_by_index() so that the device clock node can be
    removed in spl.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I1620ebdb5a4cf587ce5b27c6a2c8cb622f9e5dcb

diff --git a/drivers/misc/rockchip_decompress.c b/drivers/misc/rockchip_decompress.c
index 021adfd351..85edf6e9f2 100644
--- a/drivers/misc/rockchip_decompress.c
+++ b/drivers/misc/rockchip_decompress.c
@@ -247,7 +247,7 @@ static int rockchip_decom_probe(struct udevice *dev)
 	}
 #endif
 
-	ret = clk_get_by_name(dev, "dclk", &priv->dclk);
+	ret = clk_get_by_index(dev, 1, &priv->dclk);
 	if (ret < 0)
 		return ret;
 

commit 5eb3ca6344a9584d41a46efd1d103af2dab5d259
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Fri Nov 12 09:24:52 2021 +0800

    clk: rockchip: rk3588: add 786M for aupll
    
    Change-Id: I92b77ea4ffcf41e4f5ec3d7a99866b30edbd2c6c
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3588.c b/drivers/clk/rockchip/clk_rk3588.c
index 744a1c4869..a926abd3c8 100644
--- a/drivers/clk/rockchip/clk_rk3588.c
+++ b/drivers/clk/rockchip/clk_rk3588.c
@@ -31,6 +31,7 @@ static struct rockchip_pll_rate_table rk3588_pll_rates[] = {
 	RK3588_PLL_RATE(900000000, 2, 300, 2, 0),
 	RK3588_PLL_RATE(850000000, 3, 425, 2, 0),
 	RK3588_PLL_RATE(816000000, 2, 272, 2, 0),
+	RK3588_PLL_RATE(786000000, 1, 131, 2, 0),
 	RK3588_PLL_RATE(600000000, 2, 200, 2, 0),
 	RK3588_PLL_RATE(594000000, 2, 198, 2, 0),
 	RK3588_PLL_RATE(200000000, 3, 400, 4, 0),

commit d2b507bbde162510d1970b5222a3630a10090808
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Nov 11 21:55:13 2021 +0800

    clk: rockchip: rk3588: add clk for dclk_decom
    
    Change-Id: Iedeb11e0367d89aaa0d77338cd36c30e34df6f71
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3588.h b/arch/arm/include/asm/arch-rockchip/cru_rk3588.h
index 252e33e35e..e1f701106d 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3588.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3588.h
@@ -263,6 +263,14 @@ enum {
 	CLK_PWM_SEL_50M,
 	CLK_PWM_SEL_24M,
 
+	/* CRU_CLK_SEL62_CON */
+	DCLK_DECOM_SEL_SHIFT			= 5,
+	DCLK_DECOM_SEL_MASK			= 1 << DCLK_DECOM_SEL_SHIFT,
+	DCLK_DECOM_SEL_GPLL			= 0,
+	DCLK_DECOM_SEL_SPLL,
+	DCLK_DECOM_DIV_SHIFT			= 0,
+	DCLK_DECOM_DIV_MASK			= 0x1F << DCLK_DECOM_DIV_SHIFT,
+
 	/* CRU_CLK_SEL77_CON */
 	CCLK_EMMC_SEL_SHIFT			= 14,
 	CCLK_EMMC_SEL_MASK			= 3 << CCLK_EMMC_SEL_SHIFT,
diff --git a/drivers/clk/rockchip/clk_rk3588.c b/drivers/clk/rockchip/clk_rk3588.c
index b62949105b..744a1c4869 100644
--- a/drivers/clk/rockchip/clk_rk3588.c
+++ b/drivers/clk/rockchip/clk_rk3588.c
@@ -772,6 +772,16 @@ static ulong rk3588_mmc_get_clk(struct rk3588_clk_priv *priv, ulong clk_id)
 		else
 			prate = OSC_HZ;
 		return DIV_TO_RATE(prate, div);
+	case DCLK_DECOM:
+		con = readl(&cru->clksel_con[62]);
+		div = (con & DCLK_DECOM_DIV_MASK) >> DCLK_DECOM_DIV_SHIFT;
+		sel = (con & DCLK_DECOM_SEL_MASK) >>
+		      DCLK_DECOM_SEL_SHIFT;
+		if (sel == DCLK_DECOM_SEL_SPLL)
+			prate = 702 * MHz;
+		else
+			prate = priv->gpll_hz;
+		return DIV_TO_RATE(prate, div);
 	default:
 		return -ENOENT;
 	}
@@ -807,6 +817,15 @@ static ulong rk3588_mmc_set_clk(struct rk3588_clk_priv *priv,
 			div = DIV_ROUND_UP(priv->gpll_hz, rate);
 		}
 		break;
+	case DCLK_DECOM:
+		if (!(702 * MHz % rate)) {
+			src_clk = DCLK_DECOM_SEL_SPLL;
+			div = DIV_ROUND_UP(702 * MHz, rate);
+		} else {
+			src_clk = DCLK_DECOM_SEL_GPLL;
+			div = DIV_ROUND_UP(priv->gpll_hz, rate);
+		}
+		break;
 	default:
 		return -ENOENT;
 	}
@@ -840,6 +859,13 @@ static ulong rk3588_mmc_set_clk(struct rk3588_clk_priv *priv,
 			     (src_clk << SCLK_SFC_SEL_SHIFT) |
 			     (div - 1) << SCLK_SFC_DIV_SHIFT);
 		break;
+	case DCLK_DECOM:
+		rk_clrsetreg(&cru->clksel_con[62],
+			     DCLK_DECOM_DIV_MASK |
+			     DCLK_DECOM_SEL_MASK,
+			     (src_clk << DCLK_DECOM_SEL_SHIFT) |
+			     (div - 1) << DCLK_DECOM_DIV_SHIFT);
+		break;
 	default:
 		return -ENOENT;
 	}
@@ -1393,6 +1419,7 @@ static ulong rk3588_clk_get_rate(struct clk *clk)
 	case CCLK_EMMC:
 	case BCLK_EMMC:
 	case SCLK_SFC:
+	case DCLK_DECOM:
 		rate = rk3588_mmc_get_clk(priv, clk->id);
 		break;
 #ifndef CONFIG_SPL_BUILD
@@ -1522,6 +1549,7 @@ static ulong rk3588_clk_set_rate(struct clk *clk, ulong rate)
 	case CCLK_EMMC:
 	case BCLK_EMMC:
 	case SCLK_SFC:
+	case DCLK_DECOM:
 		ret = rk3588_mmc_set_clk(priv, clk->id, rate);
 		break;
 #ifndef CONFIG_SPL_BUILD

commit 7560cacdd3a68bb475f23b4249a98025c89064d4
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Nov 11 19:47:23 2021 +0800

    clk: rockchip: pll: enable clk_bisr after cpll setting
    
    Fixes: 09fc4831933d ("clk: rockchip: pll: fix cpll setting error")
    
    Change-Id: Idaebec5a07bffaf4902fe9cd0fdeb28a05e76e6b
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_pll.c b/drivers/clk/rockchip/clk_pll.c
index 3989830f9d..a8299d69a0 100644
--- a/drivers/clk/rockchip/clk_pll.c
+++ b/drivers/clk/rockchip/clk_pll.c
@@ -464,6 +464,10 @@ static int rk3588_pll_set_rate(struct rockchip_pll_clock *pll,
 		rk_clrsetreg(base + RK3588_LPLL_CLKSEL_CON(5),
 			     pll->mode_mask << 14,
 			     2 << 14);
+
+	if (pll_id == 3)
+		rk_clrsetreg(base + 0x84c, 0x1 << 1, 0);
+
 	debug("PLL at %p: con0=%x con1= %x con2= %x mode= %x\n",
 	      pll, readl(base + pll->con_offset),
 	      readl(base + pll->con_offset + 0x4),

commit bd11beba4f997b62809d24eba30a8713c8bbeb81
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Nov 11 18:28:43 2021 +0800

    clk: rockchip: pll: fix cpll setting error
    
    Change-Id: I1091f037b249a0e803ea1d6dd816a66258e7cd8e
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_pll.c b/drivers/clk/rockchip/clk_pll.c
index 4d4067808f..3989830f9d 100644
--- a/drivers/clk/rockchip/clk_pll.c
+++ b/drivers/clk/rockchip/clk_pll.c
@@ -403,6 +403,9 @@ static int rk3588_pll_set_rate(struct rockchip_pll_clock *pll,
 	 * When power on or changing PLL setting,
 	 * we must force PLL into slow mode to ensure output stable clock.
 	 */
+	if (pll_id == 3)
+		rk_clrsetreg(base + 0x84c, 0x1 << 1, 0x1 << 1);
+
 	rk_clrsetreg(base + pll->mode_offset,
 		     pll->mode_mask << pll->mode_shift,
 		     RKCLK_PLL_MODE_SLOW << pll->mode_shift);

commit 50b235ee8dec3344d371411cf1fb6213d78a82d5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Nov 26 10:11:38 2021 +0000

    input: adc keys: update adc range for saradc v2
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I49e37b3f22158574a2ae8397434980c4f31ac103

diff --git a/drivers/input/adc_key.c b/drivers/input/adc_key.c
index d3d7df911c..1624a93acd 100644
--- a/drivers/input/adc_key.c
+++ b/drivers/input/adc_key.c
@@ -13,6 +13,11 @@ static int adc_key_ofdata_to_platdata(struct udevice *dev)
 	struct dm_key_uclass_platdata *uc_key;
 	u32 chn[2], mV;
 	int vref, ret;
+#ifdef CONFIG_SARADC_ROCKCHIP_V2
+	int range = 4096;
+#else
+	int range = 1024;
+#endif
 
 	uc_key = dev_get_uclass_platdata(dev);
 	if (!uc_key)
@@ -50,7 +55,7 @@ static int adc_key_ofdata_to_platdata(struct udevice *dev)
 	}
 
 	uc_key->channel = chn[1];
-	uc_key->adcval = mV / (vref / 1024);
+	uc_key->adcval = mV / (vref / range);
 
 	return 0;
 }

commit 7777fe4eeb1066d392cd223d3487b2a832ae1d8e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Nov 9 02:15:28 2021 +0000

    drivers: adc: rockchip v2: do some fixes
    
    Signed-off-by: Simon Xue <xxm@rock-chips.com>
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ibe0249b7dcd5db32c4d1417347493925f2861c05

diff --git a/drivers/adc/rockchip-saradc-v2.c b/drivers/adc/rockchip-saradc-v2.c
index 6ba62ad914..c97142e9ca 100644
--- a/drivers/adc/rockchip-saradc-v2.c
+++ b/drivers/adc/rockchip-saradc-v2.c
@@ -11,6 +11,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <asm/io.h>
+#include <reset.h>
 
 #define SARADC2_EN_END_INT		BIT(0)
 #define SARADC2_START			BIT(4)
@@ -97,6 +98,7 @@ struct rockchip_saradc_priv {
 	struct rockchip_saradc_regs		*regs;
 	int					active_channel;
 	const struct rockchip_saradc_data	*data;
+	struct reset_ctl			rst;
 };
 
 static int rockchip_saradc_channel_data(struct udevice *dev, int channel,
@@ -104,7 +106,6 @@ static int rockchip_saradc_channel_data(struct udevice *dev, int channel,
 {
 	struct rockchip_saradc_priv *priv = dev_get_priv(dev);
 	struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
-	int offset;
 
 	if (channel != priv->active_channel) {
 		pr_err("Requested channel is not active!");
@@ -112,11 +113,9 @@ static int rockchip_saradc_channel_data(struct udevice *dev, int channel,
 	}
 
 	/* Clear irq */
-	writel(0x1, priv->regs->end_int_st);
+	writel(0x1, &priv->regs->end_int_st);
 
-	offset = priv->active_channel * 0x4;
-
-	*data = readl(priv->regs->data0 + offset);
+	*data = readl(&priv->regs->data0 + priv->active_channel);
 	*data &= uc_pdata->data_mask;
 
 	return 0;
@@ -132,10 +131,19 @@ static int rockchip_saradc_start_channel(struct udevice *dev, int channel)
 		return -EINVAL;
 	}
 
+#if CONFIG_IS_ENABLED(DM_RESET)
+	reset_assert(&priv->rst);
+	udelay(10);
+	reset_deassert(&priv->rst);
+#endif
+	writel(0x20, &priv->regs->t_pd_soc);
+	writel(0xc, &priv->regs->t_das_soc);
 	val = SARADC2_EN_END_INT << 16 | SARADC2_EN_END_INT;
-	writel(val, priv->regs->end_int_en);
+	writel(val, &priv->regs->end_int_en);
 	val = SARADC2_START | SARADC2_SINGLE_MODE | channel;
-	writel(val << 16 | val, priv->regs->conv_con);
+	writel(val << 16 | val, &priv->regs->conv_con);
+
+	udelay(100);
 
 	priv->active_channel = channel;
 
@@ -157,6 +165,14 @@ static int rockchip_saradc_probe(struct udevice *dev)
 	struct clk clk;
 	int ret;
 
+#if CONFIG_IS_ENABLED(DM_RESET)
+	ret = reset_get_by_name(dev, "saradc-apb", &priv->rst);
+	if (ret) {
+		debug("reset_get_by_name() failed: %d\n", ret);
+		return ret;
+	}
+#endif
+
 	ret = clk_get_by_index(dev, 0, &clk);
 	if (ret)
 		return ret;
@@ -205,7 +221,7 @@ static const struct rockchip_saradc_data rk3588_saradc_data = {
 };
 
 static const struct udevice_id rockchip_saradc_ids[] = {
-	{ .compatible = "rockchip,saradc-3588",
+	{ .compatible = "rockchip,rk3588-saradc",
 	  .data = (ulong)&rk3588_saradc_data },
 	{ }
 };

commit 36a14c2f3169661ea4348e4ce2ce4b9824341eb8
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Fri Oct 29 14:29:46 2021 +0800

    pinctrl: rockchip: support rk3588 pinctrl
    
    Change-Id: If309cb4ec1a264d149b6896667422c2d6718812e
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/drivers/pinctrl/rockchip/Makefile b/drivers/pinctrl/rockchip/Makefile
index 0b1c428d99..e41a1f2bac 100644
--- a/drivers/pinctrl/rockchip/Makefile
+++ b/drivers/pinctrl/rockchip/Makefile
@@ -13,5 +13,6 @@ obj-y += pinctrl-rockchip-core.o
 #obj-$(CONFIG_ROCKCHIP_RK3368) += pinctrl-rk3368.o
 #obj-$(CONFIG_ROCKCHIP_RK3399) += pinctrl-rk3399.o
 obj-$(CONFIG_ROCKCHIP_RK3568) += pinctrl-rk3568.o
+obj-$(CONFIG_ROCKCHIP_RK3588) += pinctrl-rk3588.o
 #obj-$(CONFIG_ROCKCHIP_RV1108) += pinctrl-rv1108.o
 obj-$(CONFIG_ROCKCHIP_RV1126) += pinctrl-rv1126.o
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3588.c b/drivers/pinctrl/rockchip/pinctrl-rk3588.c
new file mode 100644
index 0000000000..1f90c76b54
--- /dev/null
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3588.c
@@ -0,0 +1,340 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2021 Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <regmap.h>
+#include <syscon.h>
+
+#include "pinctrl-rockchip.h"
+
+static int rk3588_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	struct regmap *regmap;
+	int iomux_num = (pin / 8);
+	int reg, ret, mask;
+	u8 bit;
+	u32 data;
+
+	debug("setting mux of GPIO%d-%d to %d\n", bank->bank_num, pin, mux);
+
+	regmap = priv->regmap_base;
+	reg = bank->iomux[iomux_num].offset;
+	if ((pin % 8) >= 4)
+		reg += 0x4;
+	bit = (pin % 4) * 4;
+	mask = 0xf;
+
+	if (bank->bank_num == 0) {
+		if ((pin >= RK_PB4) && (pin <= RK_PD7)) {
+			if (mux < 8) {
+				reg += 0x4000 - 0xC; /* PMU2_IOC_BASE */
+				data = (mask << (bit + 16));
+				data |= (mux & mask) << bit;
+				ret = regmap_write(regmap, reg, data);
+			} else {
+				u32 reg0 = 0;
+
+				reg0 = reg + 0x4000 - 0xC; /* PMU2_IOC_BASE */
+				data = (mask << (bit + 16));
+				data |= 8 << bit;
+				ret = regmap_write(regmap, reg0, data);
+
+				reg0 = reg + 0x8000; /* BUS_IOC_BASE */
+				data = (mask << (bit + 16));
+				data |= mux << bit;
+				regmap = priv->regmap_base;
+				regmap_write(regmap, reg0, data);
+			}
+		} else {
+			data = (mask << (bit + 16));
+			data |= (mux & mask) << bit;
+			ret = regmap_write(regmap, reg, data);
+		}
+		return ret;
+	} else if (bank->bank_num > 0) {
+		reg += 0x8000; /* BUS_IOC_BASE */
+	}
+
+	data = (mask << (bit + 16));
+	data |= (mux & mask) << bit;
+
+	return regmap_write(regmap, reg, data);
+}
+
+#define rk3588_DRV_PMU_OFFSET		0x70
+#define rk3588_DRV_GRF_OFFSET		0x200
+#define rk3588_DRV_BITS_PER_PIN		8
+#define rk3588_DRV_PINS_PER_REG		2
+#define rk3588_DRV_BANK_STRIDE		0x40
+
+#define PMU1_IOC_REG		(0x0000)
+#define PMU2_IOC_REG		(0x4000)
+#define BUS_IOC_REG		(0x8000)
+#define VCCIO1_4_IOC_REG	(0x9000)
+#define VCCIO3_5_IOC_REG	(0xA000)
+#define VCCIO2_IOC_REG		(0xB000)
+#define VCCIO6_IOC_REG		(0xC000)
+#define EMMC_IOC_REG		(0xD000)
+
+static const u32 rk3588_ds_regs[][2] = {
+	{RK_GPIO0_A0, PMU1_IOC_REG + 0x0010},
+	{RK_GPIO0_A4, PMU1_IOC_REG + 0x0014},
+	{RK_GPIO0_B0, PMU1_IOC_REG + 0x0018},
+	{RK_GPIO0_B4, PMU2_IOC_REG + 0x0014},
+/*	{RK_GPIO0_C0, PMU2_IOC_REG + 0x0018},
+	{RK_GPIO0_C4, PMU2_IOC_REG + 0x001C},
+	{RK_GPIO0_D0, PMU2_IOC_REG + 0x0020},
+	{RK_GPIO0_D4, PMU2_IOC_REG + 0x0024},*/
+	{RK_GPIO1_A0, VCCIO1_4_IOC_REG + 0x0020},
+/*	{RK_GPIO1_A4, VCCIO1_4_IOC_REG + 0x0024},
+	{RK_GPIO1_B0, VCCIO1_4_IOC_REG + 0x0028},
+	{RK_GPIO1_B4, VCCIO1_4_IOC_REG + 0x002C},
+	{RK_GPIO1_C0, VCCIO1_4_IOC_REG + 0x0030},
+	{RK_GPIO1_C4, VCCIO1_4_IOC_REG + 0x0034},
+	{RK_GPIO1_D0, VCCIO1_4_IOC_REG + 0x0038},
+	{RK_GPIO1_D4, VCCIO1_4_IOC_REG + 0x003C},*/
+	{RK_GPIO2_A0, EMMC_IOC_REG + 0x0040},
+/*	{RK_GPIO2_A4, EMMC_IOC_REG + 0x0044},
+	{RK_GPIO2_B0, EMMC_IOC_REG + 0x0048},
+	{RK_GPIO2_B4, EMMC_IOC_REG + 0x004C},
+	{RK_GPIO2_C0, EMMC_IOC_REG + 0x0050},
+	{RK_GPIO2_C4, EMMC_IOC_REG + 0x0054},
+	{RK_GPIO2_D0, EMMC_IOC_REG + 0x0058},
+	{RK_GPIO2_D4, EMMC_IOC_REG + 0x005C},*/
+	{RK_GPIO3_A0, VCCIO3_5_IOC_REG + 0x0060},
+/*	{RK_GPIO3_A4, VCCIO3_5_IOC_REG + 0x0064},
+	{RK_GPIO3_B0, VCCIO3_5_IOC_REG + 0x0068},
+	{RK_GPIO3_B4, VCCIO3_5_IOC_REG + 0x006C},
+	{RK_GPIO3_C0, VCCIO3_5_IOC_REG + 0x0070},
+	{RK_GPIO3_C4, VCCIO3_5_IOC_REG + 0x0074},
+	{RK_GPIO3_D0, VCCIO3_5_IOC_REG + 0x0078},
+	{RK_GPIO3_D4, VCCIO3_5_IOC_REG + 0x007C},*/
+	{RK_GPIO4_A0, VCCIO6_IOC_REG + 0x0080},
+/*	{RK_GPIO4_A4, VCCIO6_IOC_REG + 0x0084},
+	{RK_GPIO4_B0, VCCIO6_IOC_REG + 0x0088},
+	{RK_GPIO4_B4, VCCIO6_IOC_REG + 0x008C},
+	{RK_GPIO4_C0, VCCIO6_IOC_REG + 0x0090},*/
+};
+
+static const u32 rk3588_p_regs[][2] = {
+	{RK_GPIO0_A0, PMU1_IOC_REG + 0x0020},
+	{RK_GPIO0_B0, PMU1_IOC_REG + 0x0024},
+	{RK_GPIO0_B5, PMU2_IOC_REG + 0x0028},
+	{RK_GPIO0_C0, PMU2_IOC_REG + 0x002C},
+	{RK_GPIO0_D0, PMU2_IOC_REG + 0x0030},
+	{RK_GPIO1_A0, VCCIO1_4_IOC_REG + 0x0110},
+/*	{RK_GPIO1_B0, VCCIO1_4_IOC_REG + 0x0114},
+	{RK_GPIO1_C0, VCCIO1_4_IOC_REG + 0x0118},
+	{RK_GPIO1_D0, VCCIO1_4_IOC_REG + 0x011C},*/
+	{RK_GPIO2_A0, EMMC_IOC_REG + 0x0120},
+/*	{RK_GPIO2_D0, EMMC_IOC_REG + 0x012C},*/
+	{RK_GPIO3_A0, VCCIO3_5_IOC_REG + 0x0130},
+/*	{RK_GPIO3_B0, VCCIO3_5_IOC_REG + 0x0134},
+	{RK_GPIO3_C0, VCCIO3_5_IOC_REG + 0x0138},
+	{RK_GPIO3_D0, VCCIO3_5_IOC_REG + 0x013C},*/
+	{RK_GPIO4_A0, VCCIO6_IOC_REG + 0x0140},
+/*	{RK_GPIO4_B0, VCCIO6_IOC_REG + 0x0144},
+	{RK_GPIO4_C0, VCCIO6_IOC_REG + 0x0148},
+	{RK_GPIO4_D0, VCCIO2_IOC_REG + 0x014C},*/
+};
+
+static const u32 rk3588_smt_regs[][2] = {
+	{RK_GPIO0_A0, PMU1_IOC_REG + 0x0030},
+	{RK_GPIO0_B0, PMU1_IOC_REG + 0x0034},
+	{RK_GPIO0_B5, PMU2_IOC_REG + 0x0040},
+	{RK_GPIO0_C0, PMU2_IOC_REG + 0x0044},
+	{RK_GPIO0_D0, PMU2_IOC_REG + 0x0048},
+	{RK_GPIO1_A0, VCCIO1_4_IOC_REG + 0x0210},
+/*	{RK_GPIO1_B0, VCCIO1_4_IOC_REG + 0x0214},
+	{RK_GPIO1_C0, VCCIO1_4_IOC_REG + 0x0218},
+	{RK_GPIO1_D0, VCCIO1_4_IOC_REG + 0x021C},*/
+	{RK_GPIO2_A0, EMMC_IOC_REG + 0x0220},
+	{RK_GPIO2_D0, EMMC_IOC_REG + 0x022C},
+	{RK_GPIO3_A0, VCCIO3_5_IOC_REG + 0x0230},
+/*	{RK_GPIO3_B0, VCCIO3_5_IOC_REG + 0x0234},
+	{RK_GPIO3_C0, VCCIO3_5_IOC_REG + 0x0238},
+	{RK_GPIO3_D0, VCCIO3_5_IOC_REG + 0x023C},*/
+	{RK_GPIO4_A0, VCCIO6_IOC_REG + 0x0240},
+/*	{RK_GPIO4_B0, VCCIO6_IOC_REG + 0x0244},
+	{RK_GPIO4_C0, VCCIO6_IOC_REG + 0x0248},
+	{RK_GPIO4_D0, VCCIO2_IOC_REG + 0x024C},*/
+};
+
+#define RK3588_PULL_BITS_PER_PIN		2
+#define RK3588_PULL_PINS_PER_REG		8
+
+static void rk3588_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
+					 int pin_num, struct regmap **regmap,
+					 int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *info = bank->priv;
+	u8 bank_num = bank->bank_num;
+	u32 pin = bank_num * 32 + pin_num;
+	int i;
+
+	for (i = ARRAY_SIZE(rk3588_p_regs) - 1; i >= 0; i--) {
+		if (pin >= rk3588_p_regs[i][0]) {
+			*reg = rk3588_p_regs[i][1];
+			break;
+		}
+		BUG_ON(i == 0);
+	}
+
+	*regmap = info->regmap_base;
+	*reg += ((pin - rk3588_p_regs[i][0]) / RK3588_PULL_PINS_PER_REG) * 4;
+	*bit = pin_num % RK3588_PULL_PINS_PER_REG;
+	*bit *= RK3588_PULL_BITS_PER_PIN;
+}
+
+#define RK3588_DRV_BITS_PER_PIN		4
+#define RK3588_DRV_PINS_PER_REG		4
+
+static void rk3588_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
+					int pin_num, struct regmap **regmap,
+					int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *info = bank->priv;
+	u8 bank_num = bank->bank_num;
+	u32 pin = bank_num * 32 + pin_num;
+	int i;
+
+	for (i = ARRAY_SIZE(rk3588_ds_regs) - 1; i >= 0; i--) {
+		if (pin >= rk3588_ds_regs[i][0]) {
+			*reg = rk3588_ds_regs[i][1];
+			break;
+		}
+		BUG_ON(i == 0);
+	}
+
+	*regmap = info->regmap_base;
+	*reg += ((pin - rk3588_ds_regs[i][0]) / RK3588_DRV_PINS_PER_REG) * 4;
+	*bit = pin_num % RK3588_DRV_PINS_PER_REG;
+	*bit *= RK3588_DRV_BITS_PER_PIN;
+}
+
+#define RK3588_SMT_BITS_PER_PIN		1
+#define RK3588_SMT_PINS_PER_REG		16
+
+static int rk3588_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank,
+					   int pin_num, struct regmap **regmap,
+					   int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *info = bank->priv;
+	u8 bank_num = bank->bank_num;
+	u32 pin = bank_num * 32 + pin_num;
+	int i;
+
+	for (i = ARRAY_SIZE(rk3588_smt_regs) - 1; i >= 0; i--) {
+		if (pin >= rk3588_smt_regs[i][0]) {
+			*reg = rk3588_smt_regs[i][1];
+			break;
+		}
+		BUG_ON(i == 0);
+	}
+
+	*regmap = info->regmap_base;
+	*reg += ((pin - rk3588_smt_regs[i][0]) / RK3588_SMT_PINS_PER_REG) * 4;
+	*bit = pin_num % RK3588_SMT_PINS_PER_REG;
+	*bit *= RK3588_SMT_BITS_PER_PIN;
+
+	return 0;
+}
+
+static int rk3588_set_pull(struct rockchip_pin_bank *bank,
+			   int pin_num, int pull)
+{
+	struct regmap *regmap;
+	int reg;
+	u32 data;
+	u8 bit;
+
+	rk3588_calc_pull_reg_and_bit(bank, pin_num, &regmap, &reg, &bit);
+
+	/* enable the write to the equivalent lower bits */
+	data = ((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << (bit + 16);
+	data |= (pull << bit);
+
+	return regmap_write(regmap, reg, data);
+}
+
+static int rk3588_set_drive(struct rockchip_pin_bank *bank,
+			    int pin_num, int strength)
+{
+	struct regmap *regmap;
+	int reg;
+	u32 data;
+	u8 bit;
+
+	rk3588_calc_drv_reg_and_bit(bank, pin_num, &regmap, &reg, &bit);
+
+	/* enable the write to the equivalent lower bits */
+	data = ((1 << rk3588_DRV_BITS_PER_PIN) - 1) << (bit + 16);
+	data |= (strength << bit);
+
+	return regmap_write(regmap, reg, data);
+}
+
+static int rk3588_set_schmitt(struct rockchip_pin_bank *bank,
+			      int pin_num, int enable)
+{
+	struct regmap *regmap;
+	int reg;
+	u32 data;
+	u8 bit;
+
+	rk3588_calc_schmitt_reg_and_bit(bank, pin_num, &regmap, &reg, &bit);
+
+	/* enable the write to the equivalent lower bits */
+	data = ((1 << RK3588_SMT_BITS_PER_PIN) - 1) << (bit + 16);
+	data |= (enable << bit);
+
+	return regmap_write(regmap, reg, data);
+}
+
+static struct rockchip_pin_bank rk3588_pin_banks[] = {
+	RK3588_PIN_BANK_FLAGS(0, 32, "gpio0",
+			      IOMUX_WIDTH_4BIT, PULL_TYPE_IO_1V8_ONLY),
+	RK3588_PIN_BANK_FLAGS(1, 32, "gpio1",
+			      IOMUX_WIDTH_4BIT, PULL_TYPE_IO_1V8_ONLY),
+	RK3588_PIN_BANK_FLAGS(2, 32, "gpio2",
+			      IOMUX_WIDTH_4BIT, PULL_TYPE_IO_1V8_ONLY),
+	RK3588_PIN_BANK_FLAGS(3, 32, "gpio3",
+			      IOMUX_WIDTH_4BIT, PULL_TYPE_IO_1V8_ONLY),
+	RK3588_PIN_BANK_FLAGS(4, 32, "gpio4",
+			      IOMUX_WIDTH_4BIT, PULL_TYPE_IO_1V8_ONLY),
+};
+
+static const struct rockchip_pin_ctrl rk3588_pin_ctrl = {
+	.pin_banks		= rk3588_pin_banks,
+	.nr_banks		= ARRAY_SIZE(rk3588_pin_banks),
+	.nr_pins		= 160,
+	.set_mux		= rk3588_set_mux,
+	.set_pull		= rk3588_set_pull,
+	.set_drive		= rk3588_set_drive,
+	.set_schmitt		= rk3588_set_schmitt,
+};
+
+static const struct udevice_id rk3588_pinctrl_ids[] = {
+	{
+		.compatible = "rockchip,rk3588-pinctrl",
+		.data = (ulong)&rk3588_pin_ctrl
+	},
+	{ }
+};
+
+U_BOOT_DRIVER(pinctrl_rk3588) = {
+	.name		= "rockchip_rk3588_pinctrl",
+	.id		= UCLASS_PINCTRL,
+	.of_match	= rk3588_pinctrl_ids,
+	.priv_auto_alloc_size = sizeof(struct rockchip_pinctrl_priv),
+	.ops		= &rockchip_pinctrl_ops,
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	.bind		= dm_scan_fdt_dev,
+#endif
+	.probe		= rockchip_pinctrl_probe,
+};
diff --git a/drivers/pinctrl/rockchip/pinctrl-rockchip.h b/drivers/pinctrl/rockchip/pinctrl-rockchip.h
index 7dfcaaab6c..3ea9488a19 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rockchip.h
+++ b/drivers/pinctrl/rockchip/pinctrl-rockchip.h
@@ -9,6 +9,171 @@
 #include <dt-bindings/pinctrl/rockchip.h>
 #include <linux/types.h>
 
+#define RK_GPIO0_A0	0
+#define RK_GPIO0_A1	1
+#define RK_GPIO0_A2	2
+#define RK_GPIO0_A3	3
+#define RK_GPIO0_A4	4
+#define RK_GPIO0_A5	5
+#define RK_GPIO0_A6	6
+#define RK_GPIO0_A7	7
+#define RK_GPIO0_B0	8
+#define RK_GPIO0_B1	9
+#define RK_GPIO0_B2	10
+#define RK_GPIO0_B3	11
+#define RK_GPIO0_B4	12
+#define RK_GPIO0_B5	13
+#define RK_GPIO0_B6	14
+#define RK_GPIO0_B7	15
+#define RK_GPIO0_C0	16
+#define RK_GPIO0_C1	17
+#define RK_GPIO0_C2	18
+#define RK_GPIO0_C3	19
+#define RK_GPIO0_C4	20
+#define RK_GPIO0_C5	21
+#define RK_GPIO0_C6	22
+#define RK_GPIO0_C7	23
+#define RK_GPIO0_D0	24
+#define RK_GPIO0_D1	25
+#define RK_GPIO0_D2	26
+#define RK_GPIO0_D3	27
+#define RK_GPIO0_D4	28
+#define RK_GPIO0_D5	29
+#define RK_GPIO0_D6	30
+#define RK_GPIO0_D7	31
+
+#define RK_GPIO1_A0	32
+#define RK_GPIO1_A1	33
+#define RK_GPIO1_A2	34
+#define RK_GPIO1_A3	35
+#define RK_GPIO1_A4	36
+#define RK_GPIO1_A5	37
+#define RK_GPIO1_A6	38
+#define RK_GPIO1_A7	39
+#define RK_GPIO1_B0	40
+#define RK_GPIO1_B1	41
+#define RK_GPIO1_B2	42
+#define RK_GPIO1_B3	43
+#define RK_GPIO1_B4	44
+#define RK_GPIO1_B5	45
+#define RK_GPIO1_B6	46
+#define RK_GPIO1_B7	47
+#define RK_GPIO1_C0	48
+#define RK_GPIO1_C1	49
+#define RK_GPIO1_C2	50
+#define RK_GPIO1_C3	51
+#define RK_GPIO1_C4	52
+#define RK_GPIO1_C5	53
+#define RK_GPIO1_C6	54
+#define RK_GPIO1_C7	55
+#define RK_GPIO1_D0	56
+#define RK_GPIO1_D1	57
+#define RK_GPIO1_D2	58
+#define RK_GPIO1_D3	59
+#define RK_GPIO1_D4	60
+#define RK_GPIO1_D5	61
+#define RK_GPIO1_D6	62
+#define RK_GPIO1_D7	63
+
+#define RK_GPIO2_A0	64
+#define RK_GPIO2_A1	65
+#define RK_GPIO2_A2	66
+#define RK_GPIO2_A3	67
+#define RK_GPIO2_A4	68
+#define RK_GPIO2_A5	69
+#define RK_GPIO2_A6	70
+#define RK_GPIO2_A7	71
+#define RK_GPIO2_B0	72
+#define RK_GPIO2_B1	73
+#define RK_GPIO2_B2	74
+#define RK_GPIO2_B3	75
+#define RK_GPIO2_B4	76
+#define RK_GPIO2_B5	77
+#define RK_GPIO2_B6	78
+#define RK_GPIO2_B7	79
+#define RK_GPIO2_C0	80
+#define RK_GPIO2_C1	81
+#define RK_GPIO2_C2	82
+#define RK_GPIO2_C3	83
+#define RK_GPIO2_C4	84
+#define RK_GPIO2_C5	85
+#define RK_GPIO2_C6	86
+#define RK_GPIO2_C7	87
+#define RK_GPIO2_D0	88
+#define RK_GPIO2_D1	89
+#define RK_GPIO2_D2	90
+#define RK_GPIO2_D3	91
+#define RK_GPIO2_D4	92
+#define RK_GPIO2_D5	93
+#define RK_GPIO2_D6	94
+#define RK_GPIO2_D7	95
+
+#define RK_GPIO3_A0	96
+#define RK_GPIO3_A1	97
+#define RK_GPIO3_A2	98
+#define RK_GPIO3_A3	99
+#define RK_GPIO3_A4	100
+#define RK_GPIO3_A5	101
+#define RK_GPIO3_A6	102
+#define RK_GPIO3_A7	103
+#define RK_GPIO3_B0	104
+#define RK_GPIO3_B1	105
+#define RK_GPIO3_B2	106
+#define RK_GPIO3_B3	107
+#define RK_GPIO3_B4	108
+#define RK_GPIO3_B5	109
+#define RK_GPIO3_B6	110
+#define RK_GPIO3_B7	111
+#define RK_GPIO3_C0	112
+#define RK_GPIO3_C1	113
+#define RK_GPIO3_C2	114
+#define RK_GPIO3_C3	115
+#define RK_GPIO3_C4	116
+#define RK_GPIO3_C5	117
+#define RK_GPIO3_C6	118
+#define RK_GPIO3_C7	119
+#define RK_GPIO3_D0	120
+#define RK_GPIO3_D1	121
+#define RK_GPIO3_D2	122
+#define RK_GPIO3_D3	123
+#define RK_GPIO3_D4	124
+#define RK_GPIO3_D5	125
+#define RK_GPIO3_D6	126
+#define RK_GPIO3_D7	127
+
+#define RK_GPIO4_A0	128
+#define RK_GPIO4_A1	129
+#define RK_GPIO4_A2	130
+#define RK_GPIO4_A3	131
+#define RK_GPIO4_A4	132
+#define RK_GPIO4_A5	133
+#define RK_GPIO4_A6	134
+#define RK_GPIO4_A7	135
+#define RK_GPIO4_B0	136
+#define RK_GPIO4_B1	137
+#define RK_GPIO4_B2	138
+#define RK_GPIO4_B3	139
+#define RK_GPIO4_B4	140
+#define RK_GPIO4_B5	141
+#define RK_GPIO4_B6	142
+#define RK_GPIO4_B7	143
+#define RK_GPIO4_C0	144
+#define RK_GPIO4_C1	145
+#define RK_GPIO4_C2	146
+#define RK_GPIO4_C3	147
+#define RK_GPIO4_C4	148
+#define RK_GPIO4_C5	149
+#define RK_GPIO4_C6	150
+#define RK_GPIO4_C7	151
+#define RK_GPIO4_D0	152
+#define RK_GPIO4_D1	153
+#define RK_GPIO4_D2	154
+#define RK_GPIO4_D3	155
+#define RK_GPIO4_D4	156
+#define RK_GPIO4_D5	157
+#define RK_GPIO4_D6	158
+#define RK_GPIO4_D7	159
+
 #define RK_GENMASK_VAL(h, l, v) \
 	(GENMASK(((h) + 16), ((l) + 16)) | (((v) << (l)) & GENMASK((h), (l))))
 
@@ -186,6 +351,25 @@ struct rockchip_pin_bank {
 		},							\
 	}
 
+#define PIN_BANK_IOMUX_FLAGS_PULL_FLAGS(id, pins, label, iom0, iom1,	\
+					iom2, iom3, pull0, pull1,	\
+					pull2, pull3)			\
+	{								\
+		.bank_num	= id,					\
+		.nr_pins	= pins,					\
+		.name		= label,				\
+		.iomux		= {					\
+			{ .type = iom0, .offset = -1 },			\
+			{ .type = iom1, .offset = -1 },			\
+			{ .type = iom2, .offset = -1 },			\
+			{ .type = iom3, .offset = -1 },			\
+		},							\
+		.pull_type[0] = pull0,					\
+		.pull_type[1] = pull1,					\
+		.pull_type[2] = pull2,					\
+		.pull_type[3] = pull3,					\
+	}
+
 #define PIN_BANK_DRV_FLAGS_PULL_FLAGS(id, pins, label, drv0, drv1,	\
 				      drv2, drv3, pull0, pull1,		\
 				      pull2, pull3)			\
@@ -306,6 +490,9 @@ struct rockchip_pin_bank {
 #define MR_PMUGRF(ID, PIN, FUNC, REG, VAL)	\
 	PIN_BANK_MUX_ROUTE_FLAGS(ID, PIN, FUNC, REG, VAL, ROUTE_TYPE_PMUGRF)
 
+#define RK3588_PIN_BANK_FLAGS(ID, PIN, LABEL, M, P)			\
+	PIN_BANK_IOMUX_FLAGS_PULL_FLAGS(ID, PIN, LABEL, M, M, M, M, P, P, P, P)
+
 /**
  * struct rockchip_mux_recalced_data: recalculate a pin iomux data.
  * @num: bank number.

commit f95279021a218e11aa47d2069d40a14cfff0befc
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Fri Aug 6 19:50:20 2021 +0800

    drivers: mmc: support for rk3588
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: Ic5a915f193cf807b534dbb1935bc5d7fcdd29923

diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index f97b05f2b4..37e8e43189 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -73,10 +73,6 @@ DECLARE_GLOBAL_DATA_PTR;
 	(((x) & DWCMSHC_EMMC_DLL_TIMEOUT) == 0))
 #define ROCKCHIP_MAX_CLKS		3
 
-#define ROCKCHIP_SOC_RK3399		1
-#define ROCKCHIP_SOC_RK3568		2
-#define ROCKCHIP_SOC_RK3588		3
-
 struct rockchip_sdhc_plat {
 #if CONFIG_IS_ENABLED(OF_PLATDATA)
 	struct dtd_rockchip_rk3399_sdhci_5_1 dtplat;
@@ -100,9 +96,11 @@ struct rockchip_sdhc {
 };
 
 struct sdhci_data {
-	int soc_id;
 	int (*emmc_set_clock)(struct sdhci_host *host, unsigned int clock);
 	int (*get_phy)(struct udevice *dev);
+	u32 flags;
+#define RK_DLL_CMD_OUT		BIT(1)
+#define RK_RXCLK_NO_INVERTER	BIT(2)
 };
 
 static void rk3399_emmc_phy_power_on(struct rockchip_emmc_phy *phy, u32 clock)
@@ -316,8 +314,8 @@ static int dwcmshc_sdhci_emmc_set_clock(struct sdhci_host *host, unsigned int cl
 {
 	struct rockchip_sdhc *priv = container_of(host, struct rockchip_sdhc, host);
 	struct sdhci_data *data = (struct sdhci_data *)dev_get_driver_data(priv->dev);
+	u32 txclk_tapnum = DLL_TXCLK_TAPNUM_DEFAULT, extra;
 	int timeout = 500, ret;
-	u32 extra;
 
 	ret = rockchip_emmc_set_clock(host, clock);
 
@@ -341,34 +339,29 @@ static int dwcmshc_sdhci_emmc_set_clock(struct sdhci_host *host, unsigned int cl
 			udelay(1);
 			timeout--;
 		}
+		extra = DWCMSHC_EMMC_DLL_DLYENA;
+		if (data->flags & RK_RXCLK_NO_INVERTER)
+			extra |= DLL_RXCLK_NO_INVERTER << DWCMSHC_EMMC_DLL_RXCLK_SRCSEL;
+		sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_RXCLK);
 
-		if (data->soc_id == ROCKCHIP_SOC_RK3588 && 
+		if ((data->flags & RK_DLL_CMD_OUT) &&
 		   (host->mmc->timing == MMC_TIMING_MMC_HS400 ||
 		    host->mmc->timing == MMC_TIMING_MMC_HS400ES)) {
-			extra = DWCMSHC_EMMC_DLL_DLYENA;
-			sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_RXCLK);
 
-			extra = DWCMSHC_EMMC_DLL_DLYENA |
-				DLL_TXCLK_TAPNUM_90_DEGREES |
-				DLL_TXCLK_TAPNUM_FROM_SW;
-			sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_TXCLK);
+			txclk_tapnum = DLL_TXCLK_TAPNUM_90_DEGREES;
 
 			extra = DWCMSHC_EMMC_DLL_DLYENA |
 				DLL_CMDOUT_TAPNUM_90_DEGREES |
 				DLL_CMDOUT_TAPNUM_FROM_SW |
 				DLL_CMDOUT_SRC_CLK_NEG;
 			sdhci_writel(host, extra, DECMSHC_EMMC_DLL_CMDOUT);
-		} else {
-			extra = DWCMSHC_EMMC_DLL_DLYENA |
-				DLL_RXCLK_NO_INVERTER << DWCMSHC_EMMC_DLL_RXCLK_SRCSEL;
-			sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_RXCLK);
-
-			extra = DWCMSHC_EMMC_DLL_DLYENA |
-				DLL_TXCLK_TAPNUM_DEFAULT |
-				DLL_TXCLK_TAPNUM_FROM_SW;
-			sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_TXCLK);
 		}
 
+		extra = DWCMSHC_EMMC_DLL_DLYENA |
+			DLL_TXCLK_TAPNUM_FROM_SW |
+			txclk_tapnum;
+		sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_TXCLK);
+
 		extra = DWCMSHC_EMMC_DLL_DLYENA |
 			DLL_STRBIN_TAPNUM_DEFAULT;
 		sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_STRBIN);
@@ -378,8 +371,7 @@ static int dwcmshc_sdhci_emmc_set_clock(struct sdhci_host *host, unsigned int cl
 		sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_RXCLK);
 		sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_TXCLK);
 		sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_STRBIN);
-		if (data->soc_id == ROCKCHIP_SOC_RK3588)
-			sdhci_writel(host, 0, DECMSHC_EMMC_DLL_CMDOUT);
+		sdhci_writel(host, 0, DECMSHC_EMMC_DLL_CMDOUT);
 	}
 
 	return ret;
@@ -495,21 +487,20 @@ static int rockchip_sdhci_bind(struct udevice *dev)
 }
 
 static const struct sdhci_data arasan_data = {
-	.soc_id = ROCKCHIP_SOC_RK3399,
 	.emmc_set_clock = rk3399_sdhci_emmc_set_clock,
 	.get_phy = rk3399_emmc_get_phy,
 };
 
 static const struct sdhci_data rk3568_data = {
-	.soc_id = ROCKCHIP_SOC_RK3568,
 	.emmc_set_clock = dwcmshc_sdhci_emmc_set_clock,
 	.get_phy = dwcmshc_emmc_get_phy,
+	.flags = RK_RXCLK_NO_INVERTER,
 };
 
 static const struct sdhci_data rk3588_data = {
-	.soc_id = ROCKCHIP_SOC_RK3588,
 	.emmc_set_clock = dwcmshc_sdhci_emmc_set_clock,
 	.get_phy = dwcmshc_emmc_get_phy,
+	.flags = RK_DLL_CMD_OUT,
 };
 
 static const struct udevice_id sdhci_ids[] = {
@@ -522,7 +513,7 @@ static const struct udevice_id sdhci_ids[] = {
 		.data = (ulong)&rk3568_data,
 	},
 	{
-		.compatible = "rk3588-snps,dwcmshc-sdhci",
+		.compatible = "rockchip,rk3588-dwcmshc",
 		.data = (ulong)&rk3588_data,
 	},
 	{ }

commit 0bcee30c11bd59ce89b0115358809e25708b74f9
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Mon Jul 5 15:10:18 2021 +0800

    drivers: mmc: rockchip_sdhci: add support for rk3588
    
    Add support for rk3588, here a short summary of the changes:
    - Add compatible for rk3588.
    - Add soc_id for runtime judgment soc.
    - Remove DLL_RXCLK_NO_INVERTER config for clock less than 100Mhz.
    - Add hs400 dll config for rk3588.
    - Add set_ios_post call back function.
    - Remove set_clock call back function.
    - Reorder header inclusion.
    - Remove phy_init call back function.
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: I2915162e784eedf516344f4174591ec79b338b7f

diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index 901445ce5b..f97b05f2b4 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -31,36 +31,52 @@ DECLARE_GLOBAL_DATA_PTR;
 #define PHYCTRL_DLLRDY_MASK		0x1
 #define PHYCTRL_DLLRDY_SHIFT		0x5
 #define PHYCTRL_DLLRDY_DONE		0x1
-#define PHYCTRL_FREQSEL_200M            0x0
-#define PHYCTRL_FREQSEL_50M             0x1
-#define PHYCTRL_FREQSEL_100M            0x2
-#define PHYCTRL_FREQSEL_150M            0x3
+#define PHYCTRL_FREQSEL_200M		0x0
+#define PHYCTRL_FREQSEL_50M		0x1
+#define PHYCTRL_FREQSEL_100M		0x2
+#define PHYCTRL_FREQSEL_150M		0x3
+#define PHYCTRL_DLL_LOCK_WO_TMOUT(x)	\
+	((((x) >> PHYCTRL_DLLRDY_SHIFT) & PHYCTRL_DLLRDY_MASK) ==\
+	PHYCTRL_DLLRDY_DONE)
 
 /* Rockchip specific Registers */
 #define DWCMSHC_EMMC_DLL_CTRL		0x800
+#define DWCMSHC_EMMC_DLL_CTRL_RESET	BIT(1)
 #define DWCMSHC_EMMC_DLL_RXCLK		0x804
 #define DWCMSHC_EMMC_DLL_TXCLK		0x808
 #define DWCMSHC_EMMC_DLL_STRBIN		0x80c
+#define DECMSHC_EMMC_DLL_CMDOUT		0x810
 #define DWCMSHC_EMMC_DLL_STATUS0	0x840
 #define DWCMSHC_EMMC_DLL_STATUS1	0x844
 #define DWCMSHC_EMMC_DLL_START		BIT(0)
 #define DWCMSHC_EMMC_DLL_RXCLK_SRCSEL	29
 #define DWCMSHC_EMMC_DLL_START_POINT	16
+#define DWCMSHC_EMMC_DLL_START_DEFAULT	5
+#define DWCMSHC_EMMC_DLL_INC_VALUE	2
 #define DWCMSHC_EMMC_DLL_INC		8
 #define DWCMSHC_EMMC_DLL_DLYENA		BIT(27)
 #define DLL_TXCLK_TAPNUM_DEFAULT	0x10
+#define DLL_TXCLK_TAPNUM_90_DEGREES	0x8
 #define DLL_STRBIN_TAPNUM_DEFAULT	0x3
 #define DLL_TXCLK_TAPNUM_FROM_SW	BIT(24)
 #define DWCMSHC_EMMC_DLL_LOCKED		BIT(8)
 #define DWCMSHC_EMMC_DLL_TIMEOUT	BIT(9)
 #define DLL_RXCLK_NO_INVERTER		1
 #define DLL_RXCLK_INVERTER		0
+#define DLL_CMDOUT_TAPNUM_90_DEGREES	0x8
+#define DLL_CMDOUT_TAPNUM_FROM_SW	BIT(24)
+#define DLL_CMDOUT_SRC_CLK_NEG		BIT(28)
+
 #define DWCMSHC_ENHANCED_STROBE		BIT(8)
 #define DLL_LOCK_WO_TMOUT(x) \
 	((((x) & DWCMSHC_EMMC_DLL_LOCKED) == DWCMSHC_EMMC_DLL_LOCKED) && \
 	(((x) & DWCMSHC_EMMC_DLL_TIMEOUT) == 0))
 #define ROCKCHIP_MAX_CLKS		3
 
+#define ROCKCHIP_SOC_RK3399		1
+#define ROCKCHIP_SOC_RK3568		2
+#define ROCKCHIP_SOC_RK3588		3
+
 struct rockchip_sdhc_plat {
 #if CONFIG_IS_ENABLED(OF_PLATDATA)
 	struct dtd_rockchip_rk3399_sdhci_5_1 dtplat;
@@ -84,16 +100,11 @@ struct rockchip_sdhc {
 };
 
 struct sdhci_data {
+	int soc_id;
 	int (*emmc_set_clock)(struct sdhci_host *host, unsigned int clock);
-	int (*emmc_phy_init)(struct udevice *dev);
 	int (*get_phy)(struct udevice *dev);
 };
 
-static int rk3399_emmc_phy_init(struct udevice *dev)
-{
-	return 0;
-}
-
 static void rk3399_emmc_phy_power_on(struct rockchip_emmc_phy *phy, u32 clock)
 {
 	u32 caldone, dllrdy, freqsel;
@@ -301,31 +312,24 @@ static int rk3399_sdhci_emmc_set_clock(struct sdhci_host *host, unsigned int clo
 	return 0;
 }
 
-static int rk3568_emmc_phy_init(struct udevice *dev)
-{
-	struct rockchip_sdhc *prv = dev_get_priv(dev);
-	struct sdhci_host *host = &prv->host;
-	u32 extra;
-
-	extra = DLL_RXCLK_NO_INVERTER << DWCMSHC_EMMC_DLL_RXCLK_SRCSEL;
-	sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_RXCLK);
-	return 0;
-}
-
-static int rk3568_sdhci_emmc_set_clock(struct sdhci_host *host, unsigned int clock)
+static int dwcmshc_sdhci_emmc_set_clock(struct sdhci_host *host, unsigned int clock)
 {
-	u32 extra;
+	struct rockchip_sdhc *priv = container_of(host, struct rockchip_sdhc, host);
+	struct sdhci_data *data = (struct sdhci_data *)dev_get_driver_data(priv->dev);
 	int timeout = 500, ret;
+	u32 extra;
 
 	ret = rockchip_emmc_set_clock(host, clock);
 
-	if (clock >= 50 * 1000000) {
-		sdhci_writel(host, BIT(1), DWCMSHC_EMMC_DLL_CTRL);
+	if (clock >= 100 * MHz) {
+		/* reset DLL */
+		sdhci_writel(host, DWCMSHC_EMMC_DLL_CTRL_RESET, DWCMSHC_EMMC_DLL_CTRL);
 		udelay(1);
 		sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_CTRL);
+
 		/* Init DLL settings */
-		extra = 0x5 << DWCMSHC_EMMC_DLL_START_POINT |
-			0x2 << DWCMSHC_EMMC_DLL_INC |
+		extra = DWCMSHC_EMMC_DLL_START_DEFAULT << DWCMSHC_EMMC_DLL_START_POINT |
+			DWCMSHC_EMMC_DLL_INC_VALUE << DWCMSHC_EMMC_DLL_INC |
 			DWCMSHC_EMMC_DLL_START;
 		sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_CTRL);
 
@@ -338,33 +342,50 @@ static int rk3568_sdhci_emmc_set_clock(struct sdhci_host *host, unsigned int clo
 			timeout--;
 		}
 
-		extra = DWCMSHC_EMMC_DLL_DLYENA |
-			DLL_RXCLK_NO_INVERTER << DWCMSHC_EMMC_DLL_RXCLK_SRCSEL;
-		sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_RXCLK);
-
-		extra = DWCMSHC_EMMC_DLL_DLYENA |
-			DLL_TXCLK_TAPNUM_DEFAULT |
-			DLL_TXCLK_TAPNUM_FROM_SW;
-		sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_TXCLK);
+		if (data->soc_id == ROCKCHIP_SOC_RK3588 && 
+		   (host->mmc->timing == MMC_TIMING_MMC_HS400 ||
+		    host->mmc->timing == MMC_TIMING_MMC_HS400ES)) {
+			extra = DWCMSHC_EMMC_DLL_DLYENA;
+			sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_RXCLK);
+
+			extra = DWCMSHC_EMMC_DLL_DLYENA |
+				DLL_TXCLK_TAPNUM_90_DEGREES |
+				DLL_TXCLK_TAPNUM_FROM_SW;
+			sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_TXCLK);
+
+			extra = DWCMSHC_EMMC_DLL_DLYENA |
+				DLL_CMDOUT_TAPNUM_90_DEGREES |
+				DLL_CMDOUT_TAPNUM_FROM_SW |
+				DLL_CMDOUT_SRC_CLK_NEG;
+			sdhci_writel(host, extra, DECMSHC_EMMC_DLL_CMDOUT);
+		} else {
+			extra = DWCMSHC_EMMC_DLL_DLYENA |
+				DLL_RXCLK_NO_INVERTER << DWCMSHC_EMMC_DLL_RXCLK_SRCSEL;
+			sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_RXCLK);
+
+			extra = DWCMSHC_EMMC_DLL_DLYENA |
+				DLL_TXCLK_TAPNUM_DEFAULT |
+				DLL_TXCLK_TAPNUM_FROM_SW;
+			sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_TXCLK);
+		}
 
 		extra = DWCMSHC_EMMC_DLL_DLYENA |
 			DLL_STRBIN_TAPNUM_DEFAULT;
 		sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_STRBIN);
-		udelay(1);
 	} else {
-		/* reset the clock phase when the frequency is lower than 52MHz */
+		/* reset the clock phase when the frequency is lower than 100MHz */
 		sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_CTRL);
-		extra = DLL_RXCLK_NO_INVERTER << DWCMSHC_EMMC_DLL_RXCLK_SRCSEL;
-		sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_RXCLK);
+		sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_RXCLK);
 		sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_TXCLK);
 		sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_STRBIN);
-		udelay(1);
+		if (data->soc_id == ROCKCHIP_SOC_RK3588)
+			sdhci_writel(host, 0, DECMSHC_EMMC_DLL_CMDOUT);
 	}
 
 	return ret;
 }
 
-static int rk3568_emmc_get_phy(struct udevice *dev)
+static int dwcmshc_emmc_get_phy(struct udevice *dev)
 {
 	return 0;
 }
@@ -433,10 +454,6 @@ static int rockchip_sdhci_probe(struct udevice *dev)
 	if (ret)
 		return ret;
 
-	ret = data->emmc_phy_init(dev);
-	if (ret)
-		return ret;
-
 	host->ops = &rockchip_sdhci_ops;
 
 	host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD;
@@ -478,15 +495,21 @@ static int rockchip_sdhci_bind(struct udevice *dev)
 }
 
 static const struct sdhci_data arasan_data = {
+	.soc_id = ROCKCHIP_SOC_RK3399,
 	.emmc_set_clock = rk3399_sdhci_emmc_set_clock,
 	.get_phy = rk3399_emmc_get_phy,
-	.emmc_phy_init = rk3399_emmc_phy_init,
 };
 
-static const struct sdhci_data snps_data = {
-	.emmc_set_clock = rk3568_sdhci_emmc_set_clock,
-	.get_phy = rk3568_emmc_get_phy,
-	.emmc_phy_init = rk3568_emmc_phy_init,
+static const struct sdhci_data rk3568_data = {
+	.soc_id = ROCKCHIP_SOC_RK3568,
+	.emmc_set_clock = dwcmshc_sdhci_emmc_set_clock,
+	.get_phy = dwcmshc_emmc_get_phy,
+};
+
+static const struct sdhci_data rk3588_data = {
+	.soc_id = ROCKCHIP_SOC_RK3588,
+	.emmc_set_clock = dwcmshc_sdhci_emmc_set_clock,
+	.get_phy = dwcmshc_emmc_get_phy,
 };
 
 static const struct udevice_id sdhci_ids[] = {
@@ -496,7 +519,11 @@ static const struct udevice_id sdhci_ids[] = {
 	},
 	{
 		.compatible = "snps,dwcmshc-sdhci",
-		.data = (ulong)&snps_data,
+		.data = (ulong)&rk3568_data,
+	},
+	{
+		.compatible = "rk3588-snps,dwcmshc-sdhci",
+		.data = (ulong)&rk3588_data,
 	},
 	{ }
 };

commit ca831a23eb289f75455499c4cedf218b943f1a6f
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Mon Jul 5 10:36:21 2021 +0800

    drivers: mmc: rockchip_sdhci: modify the prefix of some common function names to rockchip
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: I0f5206cc6ef746c9be2317853306dca93e50eaa4

diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index c7071d8165..901445ce5b 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -161,7 +161,7 @@ static void rk3399_emmc_phy_power_off(struct rockchip_emmc_phy *phy)
 	writel(RK_CLRSETBITS(1 << 1, 0), &phy->emmcphy_con[6]);
 }
 
-static int rk3399_emmc_set_clock(struct sdhci_host *host, unsigned int clock)
+static int rockchip_emmc_set_clock(struct sdhci_host *host, unsigned int clock)
 {
 	unsigned int div, clk = 0, timeout;
 	unsigned int input_clk;
@@ -293,7 +293,7 @@ static int rk3399_sdhci_emmc_set_clock(struct sdhci_host *host, unsigned int clo
 	if (cycle_phy)
 		rk3399_emmc_phy_power_off(priv->phy);
 
-	rk3399_emmc_set_clock(host, clock);
+	rockchip_emmc_set_clock(host, clock);
 
 	if (cycle_phy)
 		rk3399_emmc_phy_power_on(priv->phy, clock);
@@ -317,7 +317,7 @@ static int rk3568_sdhci_emmc_set_clock(struct sdhci_host *host, unsigned int clo
 	u32 extra;
 	int timeout = 500, ret;
 
-	ret = rk3399_emmc_set_clock(host, clock);
+	ret = rockchip_emmc_set_clock(host, clock);
 
 	if (clock >= 50 * 1000000) {
 		sdhci_writel(host, BIT(1), DWCMSHC_EMMC_DLL_CTRL);
@@ -369,7 +369,7 @@ static int rk3568_emmc_get_phy(struct udevice *dev)
 	return 0;
 }
 
-static int arasan_sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
+static int rockchip_sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
 {
 	struct rockchip_sdhc *priv =
 			container_of(host, struct rockchip_sdhc, host);
@@ -380,11 +380,11 @@ static int arasan_sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
 	return data->emmc_set_clock(host, clock);
 }
 
-static struct sdhci_ops arasan_sdhci_ops = {
-	.set_clock	= arasan_sdhci_set_clock,
+static struct sdhci_ops rockchip_sdhci_ops = {
+	.set_clock	= rockchip_sdhci_set_clock,
 };
 
-static int arasan_sdhci_probe(struct udevice *dev)
+static int rockchip_sdhci_probe(struct udevice *dev)
 {
 	struct sdhci_data *data = (struct sdhci_data *)dev_get_driver_data(dev);
 	struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
@@ -437,7 +437,7 @@ static int arasan_sdhci_probe(struct udevice *dev)
 	if (ret)
 		return ret;
 
-	host->ops = &arasan_sdhci_ops;
+	host->ops = &rockchip_sdhci_ops;
 
 	host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD;
 	host->max_clk = max_frequency;
@@ -458,7 +458,7 @@ static int arasan_sdhci_probe(struct udevice *dev)
 	return sdhci_probe(dev);
 }
 
-static int arasan_sdhci_ofdata_to_platdata(struct udevice *dev)
+static int rockchip_sdhci_of_to_plat(struct udevice *dev)
 {
 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
 	struct sdhci_host *host = dev_get_priv(dev);
@@ -489,7 +489,7 @@ static const struct sdhci_data snps_data = {
 	.emmc_phy_init = rk3568_emmc_phy_init,
 };
 
-static const struct udevice_id arasan_sdhci_ids[] = {
+static const struct udevice_id sdhci_ids[] = {
 	{
 		.compatible = "arasan,sdhci-5.1",
 		.data = (ulong)&arasan_data,
@@ -502,13 +502,13 @@ static const struct udevice_id arasan_sdhci_ids[] = {
 };
 
 U_BOOT_DRIVER(arasan_sdhci_drv) = {
-	.name		= "rockchip_rk3399_sdhci_5_1",
+	.name		= "rockchip_sdhci_5_1",
 	.id		= UCLASS_MMC,
-	.of_match	= arasan_sdhci_ids,
-	.ofdata_to_platdata = arasan_sdhci_ofdata_to_platdata,
+	.of_match	= sdhci_ids,
+	.ofdata_to_platdata = rockchip_sdhci_of_to_plat,
 	.ops		= &sdhci_ops,
 	.bind		= rockchip_sdhci_bind,
-	.probe		= arasan_sdhci_probe,
+	.probe		= rockchip_sdhci_probe,
 	.priv_auto_alloc_size = sizeof(struct rockchip_sdhc),
 	.platdata_auto_alloc_size = sizeof(struct rockchip_sdhc_plat),
 };

commit 937e62afccf7a18d6e840c7b693ddeb705da4e10
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jul 23 10:09:41 2021 +0800

    rockchip: rk3588: update plat configurations
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com
    Change-Id: I9ad090a1011a67b5cf2e68dcc7e924dae22b476e

diff --git a/arch/arm/mach-rockchip/rk3588/rk3588.c b/arch/arm/mach-rockchip/rk3588/rk3588.c
index 3ba847fc8b..08c13b1d7e 100644
--- a/arch/arm/mach-rockchip/rk3588/rk3588.c
+++ b/arch/arm/mach-rockchip/rk3588/rk3588.c
@@ -14,6 +14,27 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #include <asm/armv8/mmu.h>
 
+#define FIREWALL_DDR_BASE	0xfe030000
+#define FW_DDR_MST5_REG		0x54
+#define FW_DDR_MST13_REG	0x74
+#define FW_DDR_MST21_REG	0x94
+#define FW_DDR_MST26_REG	0xa8
+#define FW_DDR_MST27_REG	0xac
+#define FIREWALL_SYSMEM_BASE	0xfe038000
+#define FW_SYSM_MST5_REG	0x54
+#define FW_SYSM_MST13_REG	0x74
+#define FW_SYSM_MST21_REG	0x94
+#define FW_SYSM_MST26_REG	0xa8
+#define FW_SYSM_MST27_REG	0xac
+#define SYS_GRF_BASE		0xfd58c000
+#define SYS_GRF_SOC_CON6	0x0318
+#define USBGRF_BASE		0xfd5ac000
+#define USB_GRF_USB3OTG0_CON1	0x001c
+#define BUS_SGRF_BASE		0xfd586000
+#define BUS_SGRF_FIREWALL_CON18	0x288
+#define PMU_BASE		0xfd8d0000
+#define PMU_PWR_GATE_SFTCON1	0x8150
+
 static struct mm_region rk3588_mem_map[] = {
 	{
 		.virt = 0x0UL,
@@ -28,7 +49,14 @@ static struct mm_region rk3588_mem_map[] = {
 		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
 			 PTE_BLOCK_NON_SHARE |
 			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
-	}, {
+	},  {
+		.virt = 0x900000000,
+		.phys = 0x900000000,
+		.size = 0x150000000,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+			 PTE_BLOCK_NON_SHARE |
+			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
+	},  {
 		/* List terminator */
 		0,
 	}
@@ -719,9 +747,67 @@ void board_debug_uart_init(void)
 #endif
 }
 
+#ifdef CONFIG_SPL_BUILD
+void rockchip_stimer_init(void)
+{
+	/* If Timer already enabled, don't re-init it */
+	u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + 0x4);
+
+	if (reg & 0x1)
+		return;
+
+	asm volatile("msr CNTFRQ_EL0, %0" : : "r" (COUNTER_FREQUENCY));
+	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 0x14);
+	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 0x18);
+	writel(0x1, CONFIG_ROCKCHIP_STIMER_BASE + 0x4);
+}
+#endif
+
 #ifndef CONFIG_TPL_BUILD
 int arch_cpu_init(void)
 {
+#ifdef CONFIG_SPL_BUILD
+	int secure_reg;
+
+	/* Set the SDMMC eMMC crypto_ns FSPI access secure area */
+	secure_reg = readl(FIREWALL_DDR_BASE + FW_DDR_MST5_REG);
+	secure_reg &= 0xffff;
+	writel(secure_reg, FIREWALL_DDR_BASE + FW_DDR_MST5_REG);
+	secure_reg = readl(FIREWALL_DDR_BASE + FW_DDR_MST13_REG);
+	secure_reg &= 0xffff;
+	writel(secure_reg, FIREWALL_DDR_BASE + FW_DDR_MST13_REG);
+	secure_reg = readl(FIREWALL_DDR_BASE + FW_DDR_MST21_REG);
+	secure_reg &= 0xffff;
+	writel(secure_reg, FIREWALL_DDR_BASE + FW_DDR_MST21_REG);
+	secure_reg = readl(FIREWALL_DDR_BASE + FW_DDR_MST26_REG);
+	secure_reg &= 0xffff;
+	writel(secure_reg, FIREWALL_DDR_BASE + FW_DDR_MST26_REG);
+	secure_reg = readl(FIREWALL_DDR_BASE + FW_DDR_MST27_REG);
+	secure_reg &= 0xffff0000;
+	writel(secure_reg, FIREWALL_DDR_BASE + FW_DDR_MST27_REG);
+
+	secure_reg = readl(FIREWALL_SYSMEM_BASE + FW_SYSM_MST5_REG);
+	secure_reg &= 0xffff;
+	writel(secure_reg, FIREWALL_SYSMEM_BASE + FW_SYSM_MST5_REG);
+	secure_reg = readl(FIREWALL_SYSMEM_BASE + FW_SYSM_MST13_REG);
+	secure_reg &= 0xffff;
+	writel(secure_reg, FIREWALL_SYSMEM_BASE + FW_SYSM_MST13_REG);
+	secure_reg = readl(FIREWALL_SYSMEM_BASE + FW_SYSM_MST21_REG);
+	secure_reg &= 0xffff;
+	writel(secure_reg, FIREWALL_SYSMEM_BASE + FW_SYSM_MST21_REG);
+	secure_reg = readl(FIREWALL_SYSMEM_BASE + FW_SYSM_MST26_REG);
+	secure_reg &= 0xffff;
+	writel(secure_reg, FIREWALL_SYSMEM_BASE + FW_SYSM_MST26_REG);
+	secure_reg = readl(FIREWALL_SYSMEM_BASE + FW_SYSM_MST27_REG);
+	secure_reg &= 0xffff0000;
+	writel(secure_reg, FIREWALL_SYSMEM_BASE + FW_SYSM_MST27_REG);
+
+	/* Select clk_tx source as default for i2s2/i2s3 */
+	writel(0x03400340, SYS_GRF_BASE + SYS_GRF_SOC_CON6);
+#endif
+	/* Select usb otg0 phy status to 0 that make rockusb can work at high-speed */
+	writel(0x00080008, USBGRF_BASE + USB_GRF_USB3OTG0_CON1);
+
 	return 0;
 }
 #endif

commit eebc0615d10eda83b611aaaab6b9d0b5e379059c
Author: Steven Liu <steven.liu@rock-chips.com>
Date:   Thu Jul 15 22:17:24 2021 +0800

    rockchip: rk3588: Add debug uart iomux
    
    Signed-off-by: Steven Liu <steven.liu@rock-chips.com>
    Change-Id: Ic070614cee589a2cb13351b151eaaff03499c990

diff --git a/arch/arm/include/asm/arch-rockchip/ioc_rk3588.h b/arch/arm/include/asm/arch-rockchip/ioc_rk3588.h
index 177fe0b798..2fd47b5d1c 100644
--- a/arch/arm/include/asm/arch-rockchip/ioc_rk3588.h
+++ b/arch/arm/include/asm/arch-rockchip/ioc_rk3588.h
@@ -51,7 +51,7 @@ struct rk3588_bus_ioc {
 check_member(rk3588_bus_ioc, gpio4d_iomux_sel_h, 0x009C);
 
 
-struct rk3588_pmu0_ioc {
+struct rk3588_pmu1_ioc {
 	uint32_t gpio0a_iomux_sel_l;   /* Address Offset: 0x0000 */
 	uint32_t gpio0a_iomux_sel_h;   /* Address Offset: 0x0004 */
 	uint32_t gpio0b_iomux_sel_l;   /* Address Offset: 0x0008 */
@@ -70,9 +70,9 @@ struct rk3588_pmu0_ioc {
 	uint32_t gpio0b_pdis;          /* Address Offset: 0x003C */
 	uint32_t xin_con;              /* Address Offset: 0x0040 */
 };
-check_member(rk3588_pmu0_ioc, xin_con, 0x0040);
+check_member(rk3588_pmu1_ioc, xin_con, 0x0040);
 
-struct rk3588_pmu1_ioc {
+struct rk3588_pmu2_ioc {
 	uint32_t gpio0b_iomux_sel_h;  /* Address Offset: 0x0000 */
 	uint32_t gpio0c_iomux_sel_l;  /* Address Offset: 0x0004 */
 	uint32_t gpio0c_iomux_sel_h;  /* Address Offset: 0x0008 */
@@ -96,7 +96,7 @@ struct rk3588_pmu1_ioc {
 	uint32_t gpio0c_pdis;         /* Address Offset: 0x0050 */
 	uint32_t gpio0d_pdis;         /* Address Offset: 0x0054 */
 };
-check_member(rk3588_pmu1_ioc, gpio0d_pdis, 0x0054);
+check_member(rk3588_pmu2_ioc, gpio0d_pdis, 0x0054);
 
 #endif
 
diff --git a/arch/arm/mach-rockchip/rk3588/rk3588.c b/arch/arm/mach-rockchip/rk3588/rk3588.c
index 37d80b5a83..3ba847fc8b 100644
--- a/arch/arm/mach-rockchip/rk3588/rk3588.c
+++ b/arch/arm/mach-rockchip/rk3588/rk3588.c
@@ -36,6 +36,301 @@ static struct mm_region rk3588_mem_map[] = {
 
 struct mm_region *mem_map = rk3588_mem_map;
 
+/* GPIO0B_IOMUX_SEL_L */
+enum {
+	GPIO0B0_SHIFT		= 0,
+	GPIO0B0_MASK		= GENMASK(3, 0),
+	GPIO0B0_UART0_RX_M1	= 4,
+
+	GPIO0B1_SHIFT		= 4,
+	GPIO0B1_MASK		= GENMASK(7, 4),
+	GPIO0B1_UART0_TX_M1	= 4,
+};
+
+/* GPIO0C_IOMUX_SEL_H */
+enum {
+	GPIO0C4_SHIFT		= 0,
+	GPIO0C4_MASK		= GENMASK(3, 0),
+	GPIO0C4_UART0_RX_M0	= 4,
+
+	GPIO0C5_SHIFT		= 4,
+	GPIO0C5_MASK		= GENMASK(7, 4),
+	GPIO0C5_UART0_TX_M0	= 4,
+};
+
+/* GPIO0B_IOMUX_SEL_H */
+enum {
+	GPIO0B5_SHIFT		= 4,
+	GPIO0B5_MASK		= GENMASK(7, 4),
+	GPIO0B5_REFER		= 8,
+	GPIO0B5_UART2_TX_M0	= 10,
+
+	GPIO0B6_SHIFT		= 8,
+	GPIO0B6_MASK		= GENMASK(11, 8),
+	GPIO0B6_REFER		= 8,
+	GPIO0B6_UART2_RX_M0	= 10,
+};
+
+/* GPIO0D_IOMUX_SEL_L */
+enum {
+	GPIO0D1_SHIFT		= 4,
+	GPIO0D1_MASK		= GENMASK(7, 4),
+	GPIO0D1_REFER		= 8,
+	GPIO0D1_UART1_TX_M2	= 10,
+
+	GPIO0D2_SHIFT		= 8,
+	GPIO0D2_MASK		= GENMASK(11, 8),
+	GPIO0D2_REFER		= 8,
+	GPIO0D2_UART1_RX_M2	= 10,
+};
+
+/* GPIO1A_IOMUX_SEL_L */
+enum {
+	GPIO1A0_SHIFT		= 0,
+	GPIO1A0_MASK		= GENMASK(3, 0),
+	GPIO1A0_UART6_RX_M1	= 10,
+
+	GPIO1A1_SHIFT		= 4,
+	GPIO1A1_MASK		= GENMASK(7, 4),
+	GPIO1A1_UART6_TX_M1	= 10,
+};
+
+/* GPIO1B_IOMUX_SEL_L */
+enum {
+	GPIO1B2_SHIFT		= 8,
+	GPIO1B2_MASK		= GENMASK(11, 8),
+	GPIO1B2_UART4_RX_M2	= 10,
+
+	GPIO1B3_SHIFT		= 12,
+	GPIO1B3_MASK		= GENMASK(15, 12),
+	GPIO1B3_UART4_TX_M2	= 10,
+};
+
+/* GPIO1B_IOMUX_SEL_H */
+enum {
+	GPIO1B4_SHIFT		= 0,
+	GPIO1B4_MASK		= GENMASK(3, 0),
+	GPIO1B4_UART7_RX_M2	= 10,
+
+	GPIO1B5_SHIFT		= 4,
+	GPIO1B5_MASK		= GENMASK(7, 4),
+	GPIO1B5_UART7_TX_M2	= 10,
+
+	GPIO1B6_SHIFT		= 8,
+	GPIO1B6_MASK		= GENMASK(11, 8),
+	GPIO1B6_UART1_TX_M1	= 10,
+
+	GPIO1B7_SHIFT		= 12,
+	GPIO1B7_MASK		= GENMASK(15, 12),
+	GPIO1B7_UART1_RX_M1	= 10,
+};
+
+/* GPIO1C_IOMUX_SEL_L */
+enum {
+	GPIO1C0_SHIFT		= 0,
+	GPIO1C0_MASK		= GENMASK(3, 0),
+	GPIO1C0_UART3_RX_M0	= 10,
+
+	GPIO1C1_SHIFT		= 4,
+	GPIO1C1_MASK		= GENMASK(7, 4),
+	GPIO1C1_UART3_TX_M0	= 10,
+};
+
+/* GPIO1D_IOMUX_SEL_L */
+enum {
+	GPIO1D0_SHIFT		= 0,
+	GPIO1D0_MASK		= GENMASK(3, 0),
+	GPIO1D0_UART6_TX_M2	= 10,
+
+	GPIO1D1_SHIFT		= 4,
+	GPIO1D1_MASK		= GENMASK(7, 4),
+	GPIO1D1_UART6_RX_M2	= 10,
+
+	GPIO1D2_SHIFT		= 8,
+	GPIO1D2_MASK		= GENMASK(11, 8),
+	GPIO1D2_UART4_TX_M0	= 10,
+
+	GPIO1D3_SHIFT		= 12,
+	GPIO1D3_MASK		= GENMASK(15, 12),
+	GPIO1D3_UART4_RX_M0	= 10,
+};
+
+/* GPIO2A_IOMUX_SEL_H */
+enum {
+	GPIO2A6_SHIFT		= 8,
+	GPIO2A6_MASK		= GENMASK(11, 8),
+	GPIO2A6_UART6_RX_M0	= 10,
+
+	GPIO2A7_SHIFT		= 12,
+	GPIO2A7_MASK		= GENMASK(15, 12),
+	GPIO2A7_UART6_TX_M0	= 10,
+};
+
+/* GPIO2B_IOMUX_SEL_H */
+enum {
+	GPIO2B4_SHIFT		= 0,
+	GPIO2B4_MASK		= GENMASK(3, 0),
+	GPIO2B4_UART7_RX_M0	= 10,
+
+	GPIO2B5_SHIFT		= 4,
+	GPIO2B5_MASK		= GENMASK(7, 4),
+	GPIO2B5_UART7_TX_M0	= 10,
+
+	GPIO2B6_SHIFT		= 8,
+	GPIO2B6_MASK		= GENMASK(11, 8),
+	GPIO2B6_UART1_RX_M0	= 10,
+
+	GPIO2B7_SHIFT		= 12,
+	GPIO2B7_MASK		= GENMASK(15, 12),
+	GPIO2B7_UART1_TX_M0	= 10,
+};
+
+/* GPIO2C_IOMUX_SEL_L */
+enum {
+	GPIO2C2_SHIFT		= 8,
+	GPIO2C2_MASK		= GENMASK(11, 8),
+	GPIO2C2_UART9_TX_M0	= 10,
+};
+
+/* GPIO2C_IOMUX_SEL_H */
+enum {
+	GPIO2C4_SHIFT		= 0,
+	GPIO2C4_MASK		= GENMASK(3, 0),
+	GPIO2C4_UART9_RX_M0	= 10,
+};
+
+/* GPIO2D_IOMUX_SEL_H */
+enum {
+	GPIO2D4_SHIFT		= 0,
+	GPIO2D4_MASK		= GENMASK(3, 0),
+	GPIO2D4_UART5_RX_M2	= 10,
+
+	GPIO2D5_SHIFT		= 4,
+	GPIO2D5_MASK		= GENMASK(7, 4),
+	GPIO2D5_UART5_TX_M2	= 10,
+};
+
+/* GPIO3A_IOMUX_SEL_H */
+enum {
+	GPIO3A2_SHIFT		= 8,
+	GPIO3A2_MASK		= GENMASK(11, 8),
+	GPIO3A2_UART8_TX_M1	= 10,
+
+	GPIO3A3_SHIFT		= 12,
+	GPIO3A3_MASK		= GENMASK(15, 12),
+	GPIO3A3_UART8_RX_M1	= 10,
+};
+
+/* GPIO3B_IOMUX_SEL_L */
+enum {
+	GPIO3B1_SHIFT		= 4,
+	GPIO3B1_MASK		= GENMASK(7, 4),
+	GPIO3B1_UART2_TX_M2	= 10,
+
+	GPIO3B2_SHIFT		= 8,
+	GPIO3B2_MASK		= GENMASK(11, 8),
+	GPIO3B2_UART2_RX_M2	= 10,
+};
+
+/* GPIO3B_IOMUX_SEL_H */
+enum {
+	GPIO3B5_SHIFT		= 4,
+	GPIO3B5_MASK		= GENMASK(7, 4),
+	GPIO3B5_UART3_TX_M1	= 10,
+
+	GPIO3B6_SHIFT		= 8,
+	GPIO3B6_MASK		= GENMASK(11, 8),
+	GPIO3B6_UART3_RX_M1	= 10,
+};
+
+/* GPIO3C_IOMUX_SEL_L */
+enum {
+	GPIO3C0_SHIFT		= 0,
+	GPIO3C0_MASK		= GENMASK(3, 0),
+	GPIO3C0_UART7_TX_M1	= 10,
+
+	GPIO3C1_SHIFT		= 4,
+	GPIO3C1_MASK		= GENMASK(7, 4),
+	GPIO3C1_UART7_RX_M1	= 10,
+};
+
+/* GPIO3C_IOMUX_SEL_H */
+enum {
+	GPIO3C4_SHIFT		= 0,
+	GPIO3C4_MASK		= GENMASK(3, 0),
+	GPIO3C4_UART5_TX_M1	= 10,
+
+	GPIO3C5_SHIFT		= 4,
+	GPIO3C5_MASK		= GENMASK(7, 4),
+	GPIO3C5_UART5_RX_M1	= 10,
+};
+
+/* GPIO3D_IOMUX_SEL_L */
+enum {
+	GPIO3D0_SHIFT		= 0,
+	GPIO3D0_MASK		= GENMASK(3, 0),
+	GPIO3D0_UART4_RX_M1	= 10,
+
+	GPIO3D1_SHIFT		= 4,
+	GPIO3D1_MASK		= GENMASK(7, 4),
+	GPIO3D1_UART4_TX_M1	= 10,
+};
+
+/* GPIO3D_IOMUX_SEL_H */
+enum {
+	GPIO3D4_SHIFT		= 0,
+	GPIO3D4_MASK		= GENMASK(3, 0),
+	GPIO3D4_UART9_RX_M2	= 10,
+
+	GPIO3D5_SHIFT		= 4,
+	GPIO3D5_MASK		= GENMASK(7, 4),
+	GPIO3D5_UART9_TX_M2	= 10,
+};
+
+/* GPIO4A_IOMUX_SEL_L */
+enum {
+	GPIO4A3_SHIFT		= 12,
+	GPIO4A3_MASK		= GENMASK(15, 12),
+	GPIO4A3_UART0_TX_M2	= 10,
+};
+
+/* GPIO4A_IOMUX_SEL_H */
+enum {
+	GPIO4A4_SHIFT		= 0,
+	GPIO4A4_MASK		= GENMASK(3, 0),
+	GPIO4A4_UART0_RX_M2	= 10,
+
+	GPIO4A5_SHIFT		= 4,
+	GPIO4A5_MASK		= GENMASK(7, 4),
+	GPIO4A5_UART3_TX_M2	= 10,
+
+	GPIO4A6_SHIFT		= 8,
+	GPIO4A6_MASK		= GENMASK(11, 8),
+	GPIO4A6_UART3_RX_M2	= 10,
+};
+
+/* GPIO4B_IOMUX_SEL_L */
+enum {
+	GPIO4B0_SHIFT		= 0,
+	GPIO4B0_MASK		= GENMASK(3, 0),
+	GPIO4B0_UART8_TX_M0	= 10,
+
+	GPIO4B1_SHIFT		= 4,
+	GPIO4B1_MASK		= GENMASK(7, 4),
+	GPIO4B1_UART8_RX_M0	= 10,
+};
+
+/* GPIO4B_IOMUX_SEL_H */
+enum {
+	GPIO4B4_SHIFT		= 0,
+	GPIO4B4_MASK		= GENMASK(3, 0),
+	GPIO4B4_UART9_TX_M1	= 10,
+
+	GPIO4B5_SHIFT		= 4,
+	GPIO4B5_MASK		= GENMASK(7, 4),
+	GPIO4B5_UART9_RX_M1	= 10,
+};
+
 /* GPIO4D_IOMUX_SEL_L */
 enum {
 	GPIO4D0_SHIFT		= 0,
@@ -59,19 +354,369 @@ enum {
 	GPIO4D1_PWM9_M1		= 12,
 };
 
-#define GRF_BASE	0xfd58c000
+/* GPIO4D_IOMUX_SEL_H */
+enum {
+	GPIO4D4_SHIFT		= 0,
+	GPIO4D4_MASK		= GENMASK(3, 0),
+	GPIO4D4_UART5_RX_M0	= 10,
+
+	GPIO4D5_SHIFT		= 4,
+	GPIO4D5_MASK		= GENMASK(7, 4),
+	GPIO4D5_UART5_TX_M0	= 10,
+};
+
+#define PMU1_IOC_BASE	0xfd5f0000
+#define PMU2_IOC_BASE	0xfd5f4000
+#define BUS_IOC_BASE	0xfd5f8000
 
 void board_debug_uart_init(void)
 {
-	static struct rk3588_grf * const grf = (void *)GRF_BASE;
+/* UART 0 */
+#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xfd890000)
+
+#if defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 0)
+	static struct rk3588_pmu2_ioc * const pmu2_ioc = (void *)PMU2_IOC_BASE;
+
+	/* UART0_M0 Switch iomux */
+	rk_clrsetreg(&pmu2_ioc->gpio0c_iomux_sel_h,
+			GPIO0C4_MASK | GPIO0C5_MASK,
+			GPIO0C4_UART0_RX_M0 << GPIO0C4_SHIFT |
+			GPIO0C5_UART0_TX_M0 << GPIO0C5_SHIFT);
+
+#elif defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 1)
+	static struct rk3588_pmu1_ioc * const pmu1_ioc = (void *)PMU1_IOC_BASE;
+
+	/* UART0_M1 Switch iomux */
+	rk_clrsetreg(&pmu1_ioc->gpio0b_iomux_sel_l,
+			GPIO0B0_MASK | GPIO0B1_MASK,
+			GPIO0B0_UART0_RX_M1 << GPIO0B0_SHIFT |
+			GPIO0B1_UART0_TX_M1 << GPIO0B1_SHIFT);
+
+#elif defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 2)
+	static struct rk3588_bus_ioc * const bus_ioc = (void *)BUS_IOC_BASE;
+
+	/* UART0_M2 Switch iomux */
+	rk_clrsetreg(&bus_ioc->gpio4a_iomux_sel_h,
+			GPIO4A4_MASK,
+			GPIO4A4_UART0_RX_M2 << GPIO4A4_SHIFT);
+	rk_clrsetreg(&bus_ioc->gpio4a_iomux_sel_l,
+			GPIO4A3_MASK,
+			GPIO4A3_UART0_TX_M2 << GPIO4A3_SHIFT);
+
+#endif
+
+/* UART 1 */
+#elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xfeb40000)
+	static struct rk3588_bus_ioc * const bus_ioc = (void *)BUS_IOC_BASE;
+
+#if defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 0)
+
+	/* UART1_M0 Switch iomux */
+	rk_clrsetreg(&bus_ioc->gpio2b_iomux_sel_h,
+			GPIO2B6_MASK | GPIO2B7_MASK,
+			GPIO2B6_UART1_RX_M0 << GPIO2B6_SHIFT |
+			GPIO2B7_UART1_TX_M0 << GPIO2B7_SHIFT);
+
+#elif defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 1)
+
+	/* UART1_M1 Switch iomux */
+	rk_clrsetreg(&bus_ioc->gpio1b_iomux_sel_h,
+			GPIO1B7_MASK | GPIO1B6_MASK,
+			GPIO1B7_UART1_RX_M1 << GPIO1B7_SHIFT |
+			GPIO1B6_UART1_TX_M1 << GPIO1B6_SHIFT);
+
+#elif defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 2)
+
+	static struct rk3588_pmu2_ioc * const pmu2_ioc = (void *)PMU2_IOC_BASE;
+
+	/* Refer to BUS_IOC */
+	rk_clrsetreg(&pmu2_ioc->gpio0d_iomux_sel_l,
+			GPIO0D2_MASK | GPIO0D1_MASK,
+			GPIO0D2_REFER << GPIO0D2_SHIFT |
+			GPIO0D1_REFER << GPIO0D1_SHIFT);
+
+	/* UART1_M2 Switch iomux */
+	rk_clrsetreg(&bus_ioc->gpio0d_iomux_sel_l,
+			GPIO0D2_MASK | GPIO0D1_MASK,
+			GPIO0D2_UART1_RX_M2 << GPIO0D2_SHIFT |
+			GPIO0D1_UART1_TX_M2 << GPIO0D1_SHIFT);
+
+#endif
+
+/* UART 2 */
+#elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xfeb50000)
+	static struct rk3588_bus_ioc * const bus_ioc = (void *)BUS_IOC_BASE;
+
+#if defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 0)
+
+	static struct rk3588_pmu2_ioc * const pmu2_ioc = (void *)PMU2_IOC_BASE;
+
+	/* Refer to BUS_IOC */
+	rk_clrsetreg(&pmu2_ioc->gpio0b_iomux_sel_h,
+			GPIO0B6_MASK | GPIO0B5_MASK,
+			GPIO0B6_REFER << GPIO0B6_SHIFT |
+			GPIO0B5_REFER << GPIO0B5_SHIFT);
+
+	/* UART2_M0 Switch iomux */
+	rk_clrsetreg(&bus_ioc->gpio0b_iomux_sel_h,
+			GPIO0B6_MASK | GPIO0B5_MASK,
+			GPIO0B6_UART2_RX_M0 << GPIO0B6_SHIFT |
+			GPIO0B5_UART2_TX_M0 << GPIO0B5_SHIFT);
+
+#elif defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 1)
 
 	/* UART2_M1 Switch iomux */
-	rk_clrsetreg(&grf->gpio4d_iomux_sel_l,
-		     GPIO4D0_MASK | GPIO4D1_MASK,
-		     GPIO4D0_UART2_TX_M1 << GPIO4D0_SHIFT |
-		     GPIO4D1_UART2_RX_M1 << GPIO4D1_SHIFT);
+	rk_clrsetreg(&bus_ioc->gpio4d_iomux_sel_l,
+			GPIO4D1_MASK | GPIO4D0_MASK,
+			GPIO4D1_UART2_RX_M1 << GPIO4D1_SHIFT |
+			GPIO4D0_UART2_TX_M1 << GPIO4D0_SHIFT);
+
+#elif defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 2)
+
+	/* UART2_M2 Switch iomux */
+	rk_clrsetreg(&bus_ioc->gpio3b_iomux_sel_l,
+			GPIO3B2_MASK | GPIO3B1_MASK,
+			GPIO3B2_UART2_RX_M2 << GPIO3B2_SHIFT |
+			GPIO3B1_UART2_TX_M2 << GPIO3B1_SHIFT);
+
+#endif
+
+/* UART 3 */
+#elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xfeb60000)
+	static struct rk3588_bus_ioc * const bus_ioc = (void *)BUS_IOC_BASE;
+
+#if defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 0)
+
+	/* UART3_M0 Switch iomux */
+	rk_clrsetreg(&bus_ioc->gpio1c_iomux_sel_l,
+			GPIO1C0_MASK | GPIO1C1_MASK,
+			GPIO1C0_UART3_RX_M0 << GPIO1C0_SHIFT |
+			GPIO1C1_UART3_TX_M0 << GPIO1C1_SHIFT);
+
+#elif defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 1)
+
+	/* UART3_M1 Switch iomux */
+	rk_clrsetreg(&bus_ioc->gpio3b_iomux_sel_h,
+			GPIO3B6_MASK | GPIO3B5_MASK,
+			GPIO3B6_UART3_RX_M1 << GPIO3B6_SHIFT |
+			GPIO3B5_UART3_TX_M1 << GPIO3B5_SHIFT);
+
+#elif defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 2)
+
+	/* UART3_M2 Switch iomux */
+	rk_clrsetreg(&bus_ioc->gpio4a_iomux_sel_h,
+			GPIO4A6_MASK | GPIO4A5_MASK,
+			GPIO4A6_UART3_RX_M2 << GPIO4A6_SHIFT |
+			GPIO4A5_UART3_TX_M2 << GPIO4A5_SHIFT);
+
+#endif
+
+/* UART 4 */
+#elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xfeb70000)
+	static struct rk3588_bus_ioc * const bus_ioc = (void *)BUS_IOC_BASE;
+
+#if defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 0)
+
+	/* UART4_M0 Switch iomux */
+	rk_clrsetreg(&bus_ioc->gpio1d_iomux_sel_l,
+			GPIO1D3_MASK | GPIO1D2_MASK,
+			GPIO1D3_UART4_RX_M0 << GPIO1D3_SHIFT |
+			GPIO1D2_UART4_TX_M0 << GPIO1D2_SHIFT);
+
+#elif defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 1)
 
-	/* TODO: M1 select ? */
+	/* UART4_M1 Switch iomux */
+	rk_clrsetreg(&bus_ioc->gpio3d_iomux_sel_l,
+			GPIO3D0_MASK | GPIO3D1_MASK,
+			GPIO3D0_UART4_RX_M1 << GPIO3D0_SHIFT |
+			GPIO3D1_UART4_TX_M1 << GPIO3D1_SHIFT);
+
+#elif defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 2)
+
+	/* UART4_M2 Switch iomux */
+	rk_clrsetreg(&bus_ioc->gpio1b_iomux_sel_l,
+			GPIO1B2_MASK | GPIO1B3_MASK,
+			GPIO1B2_UART4_RX_M2 << GPIO1B2_SHIFT |
+			GPIO1B3_UART4_TX_M2 << GPIO1B3_SHIFT);
+
+#endif
+
+/* UART 5 */
+#elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xfeb80000)
+	static struct rk3588_bus_ioc * const bus_ioc = (void *)BUS_IOC_BASE;
+
+#if defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 0)
+
+	/* UART5_M0 Switch iomux */
+	rk_clrsetreg(&bus_ioc->gpio4d_iomux_sel_h,
+			GPIO4D4_MASK | GPIO4D5_MASK,
+			GPIO4D4_UART5_RX_M0 << GPIO4D4_SHIFT |
+			GPIO4D5_UART5_TX_M0 << GPIO4D5_SHIFT);
+
+#elif defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 1)
+
+	/* UART5_M1 Switch iomux */
+	rk_clrsetreg(&bus_ioc->gpio3c_iomux_sel_h,
+			GPIO3C5_MASK | GPIO3C4_MASK,
+			GPIO3C5_UART5_RX_M1 << GPIO3C5_SHIFT |
+			GPIO3C4_UART5_TX_M1 << GPIO3C4_SHIFT);
+
+#elif defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 2)
+
+	/* UART5_M2 Switch iomux */
+	rk_clrsetreg(&bus_ioc->gpio2d_iomux_sel_h,
+			GPIO2D4_MASK | GPIO2D5_MASK,
+			GPIO2D4_UART5_RX_M2 << GPIO2D4_SHIFT |
+			GPIO2D5_UART5_TX_M2 << GPIO2D5_SHIFT);
+
+#endif
+
+/* UART 6 */
+#elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xfeb90000)
+	static struct rk3588_bus_ioc * const bus_ioc = (void *)BUS_IOC_BASE;
+
+#if defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 0)
+
+	/* UART6_M0 Switch iomux */
+	rk_clrsetreg(&bus_ioc->gpio2a_iomux_sel_h,
+			GPIO2A6_MASK | GPIO2A7_MASK,
+			GPIO2A6_UART6_RX_M0 << GPIO2A6_SHIFT |
+			GPIO2A7_UART6_TX_M0 << GPIO2A7_SHIFT);
+
+#elif defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 1)
+
+	/* UART6_M1 Switch iomux */
+	rk_clrsetreg(&bus_ioc->gpio1a_iomux_sel_l,
+			GPIO1A0_MASK | GPIO1A1_MASK,
+			GPIO1A0_UART6_RX_M1 << GPIO1A0_SHIFT |
+			GPIO1A1_UART6_TX_M1 << GPIO1A1_SHIFT);
+
+#elif defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 2)
+
+	/* UART6_M2 Switch iomux */
+	rk_clrsetreg(&bus_ioc->gpio1d_iomux_sel_l,
+			GPIO1D1_MASK | GPIO1D0_MASK,
+			GPIO1D1_UART6_RX_M2 << GPIO1D1_SHIFT |
+			GPIO1D0_UART6_TX_M2 << GPIO1D0_SHIFT);
+
+#endif
+
+/* UART 7 */
+#elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xfeba0000)
+	static struct rk3588_bus_ioc * const bus_ioc = (void *)BUS_IOC_BASE;
+
+#if defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 0)
+
+	/* UART7_M0 Switch iomux */
+	rk_clrsetreg(&bus_ioc->gpio2b_iomux_sel_h,
+			GPIO2B4_MASK | GPIO2B5_MASK,
+			GPIO2B4_UART7_RX_M0 << GPIO2B4_SHIFT |
+			GPIO2B5_UART7_TX_M0 << GPIO2B5_SHIFT);
+
+#elif defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 1)
+
+	/* UART7_M1 Switch iomux */
+	rk_clrsetreg(&bus_ioc->gpio3c_iomux_sel_l,
+			GPIO3C1_MASK | GPIO3C0_MASK,
+			GPIO3C1_UART7_RX_M1 << GPIO3C1_SHIFT |
+			GPIO3C0_UART7_TX_M1 << GPIO3C0_SHIFT);
+
+#elif defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 2)
+
+	/* UART7_M2 Switch iomux */
+	rk_clrsetreg(&bus_ioc->gpio1b_iomux_sel_h,
+			GPIO1B4_MASK | GPIO1B5_MASK,
+			GPIO1B4_UART7_RX_M2 << GPIO1B4_SHIFT |
+			GPIO1B5_UART7_TX_M2 << GPIO1B5_SHIFT);
+
+#endif
+
+/* UART 8 */
+#elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xfebb0000)
+	static struct rk3588_bus_ioc * const bus_ioc = (void *)BUS_IOC_BASE;
+
+#if defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 0)
+
+	/* UART8_M0 Switch iomux */
+	rk_clrsetreg(&bus_ioc->gpio4b_iomux_sel_l,
+			GPIO4B1_MASK | GPIO4B0_MASK,
+			GPIO4B1_UART8_RX_M0 << GPIO4B1_SHIFT |
+			GPIO4B0_UART8_TX_M0 << GPIO4B0_SHIFT);
+
+#elif defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 1)
+
+	/* UART8_M1 Switch iomux */
+	rk_clrsetreg(&bus_ioc->gpio3a_iomux_sel_l,
+			GPIO3A3_MASK | GPIO3A2_MASK,
+			GPIO3A3_UART8_RX_M1 << GPIO3A3_SHIFT |
+			GPIO3A2_UART8_TX_M1 << GPIO3A2_SHIFT);
+
+#endif
+
+/* UART 9 */
+#elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xfebc0000)
+	static struct rk3588_bus_ioc * const bus_ioc = (void *)BUS_IOC_BASE;
+
+#if defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 0)
+
+	/* UART9_M0 Switch iomux */
+	rk_clrsetreg(&bus_ioc->gpio2c_iomux_sel_h,
+			GPIO2C4_MASK,
+			GPIO2C4_UART9_RX_M0 << GPIO2C4_SHIFT);
+
+	/* UART9_M0 Switch iomux */
+	rk_clrsetreg(&bus_ioc->gpio2c_iomux_sel_l,
+			GPIO2C2_MASK,
+			GPIO2C2_UART9_TX_M0 << GPIO2C2_SHIFT);
+
+#elif defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 1)
+
+	/* UART9_M1 Switch iomux */
+	rk_clrsetreg(&bus_ioc->gpio4b_iomux_sel_h,
+			GPIO4B5_MASK | GPIO4B4_MASK,
+			GPIO4B5_UART9_RX_M1 << GPIO4B5_SHIFT |
+			GPIO4B4_UART9_TX_M1 << GPIO4B4_SHIFT);
+
+#elif defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 2)
+
+	/* UART9_M2 Switch iomux */
+	rk_clrsetreg(&bus_ioc->gpio3d_iomux_sel_h,
+			GPIO3D4_MASK | GPIO3D5_MASK,
+			GPIO3D4_UART9_RX_M2 << GPIO3D4_SHIFT |
+			GPIO3D5_UART9_TX_M2 << GPIO3D5_SHIFT);
+
+#endif
+
+#endif
 }
 
 #ifndef CONFIG_TPL_BUILD

commit c20dcaebf1d1d2c8bfabe32aa465a17aa05cd794
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jul 16 18:39:07 2021 +0800

    irq: add rk3588 related definition
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I599097ad7a37e7d9fffedc198a5b981e4b51e2d4

diff --git a/include/irq-platform.h b/include/irq-platform.h
index a460dbbd52..594d892a1b 100644
--- a/include/irq-platform.h
+++ b/include/irq-platform.h
@@ -240,6 +240,25 @@
 #define IRQ_GPIO3			68
 #define IRQ_GPIO4			69
 
+#elif defined(CONFIG_ROCKCHIP_RK3588)
+#define GPIO0_PHYS			0xfd8a0000
+#define GPIO1_PHYS			0xfec20000
+#define GPIO2_PHYS			0xfec30000
+#define GPIO3_PHYS			0xfec40000
+#define GPIO4_PHYS			0xfec50000
+
+#define GIC_IRQS_NR			(455)
+#define GPIO_IRQS_NR			(5 * 32)
+
+#define GPIO_BANK_NUM			5
+#define GPIO_BANK_PINS			32
+
+#define IRQ_TIMER0			321
+#define IRQ_GPIO0			309
+#define IRQ_GPIO1			310
+#define IRQ_GPIO2			311
+#define IRQ_GPIO3			312
+#define IRQ_GPIO4			313
 #else
 "Missing define RIQ relative things"
 #endif
diff --git a/include/rk_timer_irq.h b/include/rk_timer_irq.h
index 5a17eedf68..ca1a265a56 100644
--- a/include/rk_timer_irq.h
+++ b/include/rk_timer_irq.h
@@ -67,6 +67,10 @@
 /* Only timer0 can wakeup system suspend */
 #define TIMER_BASE		(0xFE5F0000 + 0x00)	/* TIMER 1 */
 #define TIMER_IRQ		IRQ_TIMER0
+#elif defined(CONFIG_ROCKCHIP_RK3588)
+/* Only timer0 can wakeup system suspend */
+#define TIMER_BASE		(0xFEAE0000 + 0x00)	/* TIMER 0 */
+#define TIMER_IRQ		IRQ_TIMER0
 #else
 "Missing definitions of timer module test"
 #endif

commit b5d2ca4d58adb503867ff80d366c1368d59299b0
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 22 16:56:23 2021 +0800

    board: rockchip: Add rk3588 evb board support
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Idee75909bfdb97a94823b6e27347ecfec3e1ceb5

diff --git a/board/rockchip/evb_rk3588/Kconfig b/board/rockchip/evb_rk3588/Kconfig
new file mode 100644
index 0000000000..d38efe61d8
--- /dev/null
+++ b/board/rockchip/evb_rk3588/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_EVB_RK3588
+
+config SYS_BOARD
+	default "evb_rk3588"
+
+config SYS_VENDOR
+	default "rockchip"
+
+config SYS_CONFIG_NAME
+	default "evb_rk3588"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+
+endif
diff --git a/board/rockchip/evb_rk3588/Makefile b/board/rockchip/evb_rk3588/Makefile
new file mode 100644
index 0000000000..3946c3565e
--- /dev/null
+++ b/board/rockchip/evb_rk3588/Makefile
@@ -0,0 +1,7 @@
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+# Copyright (c) 2021 Rockchip Electronics Co., Ltd
+#
+
+obj-y	+= evb_rk3588.o
diff --git a/board/rockchip/evb_rk3588/evb_rk3588.c b/board/rockchip/evb_rk3588/evb_rk3588.c
new file mode 100644
index 0000000000..81c5089944
--- /dev/null
+++ b/board/rockchip/evb_rk3588/evb_rk3588.c
@@ -0,0 +1,33 @@
+/*
+ * SPDX-License-Identifier:     GPL-2.0+
+ *
+ * (C) Copyright 2021 Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <dwc3-uboot.h>
+#include <usb.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_USB_DWC3
+static struct dwc3_device dwc3_device_data = {
+	.maximum_speed = USB_SPEED_HIGH,
+	.base = 0xfc000000,
+	.dr_mode = USB_DR_MODE_PERIPHERAL,
+	.index = 0,
+	.dis_u2_susphy_quirk = 1,
+	.usb2_phyif_utmi_width = 16,
+};
+
+int usb_gadget_handle_interrupts(void)
+{
+	dwc3_uboot_handle_interrupt(0);
+	return 0;
+}
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+	return dwc3_uboot_init(&dwc3_device_data);
+}
+#endif
diff --git a/configs/rk3588_defconfig b/configs/rk3588_defconfig
new file mode 100644
index 0000000000..6e3a09a3dc
--- /dev/null
+++ b/configs/rk3588_defconfig
@@ -0,0 +1,125 @@
+CONFIG_ARM=y
+CONFIG_ARM_CPU_SUSPEND=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x80000
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.sh"
+CONFIG_ROCKCHIP_RK3588=y
+CONFIG_ROCKCHIP_FIT_IMAGE=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y
+CONFIG_LOADER_INI="RK3588MINIALL.ini"
+CONFIG_TRUST_INI="RK3588TRUST.ini"
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_TARGET_EVB_RK3588=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3588-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_FIT=y
+CONFIG_FIT_IMAGE_POST_PROCESS=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
+# CONFIG_SPL_SYS_DCACHE_OFF is not set
+CONFIG_BOOTDELAY=5
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_ANDROID_AVB=y
+CONFIG_ANDROID_BOOT_IMAGE_HASH=y
+CONFIG_SPL_BOARD_INIT=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_SPL_SEPARATE_BSS=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x1
+CONFIG_SPL_MMC_WRITE=y
+CONFIG_SPL_ATF=y
+# CONFIG_FASTBOOT is not set
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_DTIMG=y
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_LZMADEC is not set
+# CONFIG_CMD_UNZIP is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPT=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_ITEST is not set
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_MISC is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+# CONFIG_NET_TFTP_VARS is not set
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_SCMI_FIRMWARE=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_ROCKCHIP_GPIO_V2=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_SPL_MISC=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_PINCTRL=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
+CONFIG_ROCKCHIP_SDRAM_COMMON=y
+CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE=0
+CONFIG_DM_RESET=y
+CONFIG_SPL_DM_RESET=y
+CONFIG_SPL_RESET_ROCKCHIP=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0xFEB50000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x350a
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_LIB_RAND=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_SHA512=y
+CONFIG_ERRNO_STR=y
+# CONFIG_EFI_LOADER is not set
+CONFIG_AVB_LIBAVB=y
+CONFIG_AVB_LIBAVB_AB=y
+CONFIG_AVB_LIBAVB_ATX=y
+CONFIG_AVB_LIBAVB_USER=y
+CONFIG_RK_AVB_LIBAVB_USER=y
diff --git a/include/configs/evb_rk3588.h b/include/configs/evb_rk3588.h
new file mode 100644
index 0000000000..737ee68945
--- /dev/null
+++ b/include/configs/evb_rk3588.h
@@ -0,0 +1,25 @@
+/*
+ * SPDX-License-Identifier:     GPL-2.0+
+ *
+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef __CONFIGS_RK3588_EVB_H
+#define __CONFIGS_RK3588_EVB_H
+
+#include <configs/rk3588_common.h>
+
+#ifndef CONFIG_SPL_BUILD
+
+#undef ROCKCHIP_DEVICE_SETTINGS
+#define ROCKCHIP_DEVICE_SETTINGS \
+		"stdout=serial,vidconsole\0" \
+		"stderr=serial,vidconsole\0"
+
+#define CONFIG_SYS_MMC_ENV_DEV		0
+
+#undef CONFIG_BOOTCOMMAND
+#define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
+
+#endif
+#endif
\ No newline at end of file

commit 79d682203bbd3561d27c62b7995539c4a5e7d321
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 29 20:33:08 2021 +0800

    ram: rockchip: Add sdram driver for rk3588
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I3fdb24dbb5ed84e888fb15876eb49dec7d7a3b29

diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index 84fa5d6b69..0f8ec3db8f 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -16,6 +16,7 @@ obj-$(CONFIG_ROCKCHIP_RK3308) += sdram_rv1108_pctl_phy.o sdram_rk3308.o
 obj-$(CONFIG_ROCKCHIP_RK3328) += sdram_rk3328.o sdram_pctl_px30.o sdram_phy_px30.o
 obj-$(CONFIG_ROCKCHIP_RK3399) += sdram_rk3399.o
 obj-$(CONFIG_ROCKCHIP_RK3568) += sdram_rk3568.o
+obj-$(CONFIG_ROCKCHIP_RK3588) += sdram_rk3588.o
 obj-$(CONFIG_ROCKCHIP_PX30) += sdram_px30.o sdram_pctl_px30.o sdram_phy_px30.o
 obj-$(CONFIG_ROCKCHIP_PX30) += rockchip_sdram.o
 obj-$(CONFIG_ROCKCHIP_RK1808) += rockchip_sdram.o
diff --git a/drivers/ram/rockchip/sdram_rk3588.c b/drivers/ram/rockchip/sdram_rk3588.c
new file mode 100644
index 0000000000..ed31c2920f
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_rk3588.c
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * (C) Copyright 2021 Rockchip Electronics Co., Ltd.
+ */
+
+#include <common.h>
+#include <ram.h>
+
+#ifdef CONFIG_TPL_BUILD
+#ifndef CONFIG_TPL_TINY_FRAMEWORK
+#error please defined CONFIG_TPL_TINY_FRAMEWORK for RK3568 !!!
+#endif
+#endif
+
+#ifdef CONFIG_TPL_BUILD
+
+/* return: 0 = success, other = fail */
+int sdram_init(void)
+{
+	return (-1);
+}
+#endif /* CONFIG_TPL_BUILD */

commit e1cfe1c993bc94b4d54fa182829d9c6e3f999d38
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 22 16:55:20 2021 +0800

    rockchip: Add rk3588 core architecture
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I21b73a0f53c517ac0437c0ed5d32fcc6aa873ee0

diff --git a/arch/arm/include/asm/arch-rockchip/clock.h b/arch/arm/include/asm/arch-rockchip/clock.h
index 0b2ae2a2e8..dcbb83f0fd 100644
--- a/arch/arm/include/asm/arch-rockchip/clock.h
+++ b/arch/arm/include/asm/arch-rockchip/clock.h
@@ -22,6 +22,11 @@ enum {
 	ROCKCHIP_SYSCON_CIC,
 	ROCKCHIP_SYSCON_MSCH,
 	ROCKCHIP_SYSCON_USBGRF,
+	ROCKCHIP_SYSCON_PCIE30_PHY_GRF,
+	ROCKCHIP_SYSCON_PHP_GRF,
+	ROCKCHIP_SYSCON_PIPE_PHY0_GRF,
+	ROCKCHIP_SYSCON_PIPE_PHY1_GRF,
+	ROCKCHIP_SYSCON_PIPE_PHY2_GRF,
 };
 
 /* Standard Rockchip clock numbers */
diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3588.h b/arch/arm/include/asm/arch-rockchip/grf_rk3588.h
new file mode 100644
index 0000000000..679ea8b9b0
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3588.h
@@ -0,0 +1,182 @@
+/*
+ * (C) Copyright 2021 Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#ifndef _ASM_ARCH_GRF_RK3588_H
+#define _ASM_ARCH_GRF_RK3588_H
+
+#include <common.h>
+
+struct rk3588_sys_grf {
+	uint32_t wdt_con0;                       /* Address Offset: 0x0000 */
+	uint32_t reserved0004[3];                /* Address Offset: 0x0004 */
+	uint32_t uart_con0;                      /* Address Offset: 0x0010 */
+	uint32_t uart_con1;                      /* Address Offset: 0x0014 */
+	uint32_t reserved0018[42];               /* Address Offset: 0x0018 */
+	uint32_t gic_con0;                       /* Address Offset: 0x00C0 */
+	uint32_t reserved00c4[79];               /* Address Offset: 0x00C4 */
+	uint32_t memcfg_con0;                    /* Address Offset: 0x0200 */
+	uint32_t memcfg_con1;                    /* Address Offset: 0x0204 */
+	uint32_t memcfg_con2;                    /* Address Offset: 0x0208 */
+	uint32_t memcfg_con3;                    /* Address Offset: 0x020C */
+	uint32_t memcfg_con4;                    /* Address Offset: 0x0210 */
+	uint32_t memcfg_con5;                    /* Address Offset: 0x0214 */
+	uint32_t memcfg_con6;                    /* Address Offset: 0x0218 */
+	uint32_t memcfg_con7;                    /* Address Offset: 0x021C */
+	uint32_t memcfg_con8;                    /* Address Offset: 0x0220 */
+	uint32_t memcfg_con9;                    /* Address Offset: 0x0224 */
+	uint32_t memcfg_con10;                   /* Address Offset: 0x0228 */
+	uint32_t memcfg_con11;                   /* Address Offset: 0x022C */
+	uint32_t memcfg_con12;                   /* Address Offset: 0x0230 */
+	uint32_t memcfg_con13;                   /* Address Offset: 0x0234 */
+	uint32_t memcfg_con14;                   /* Address Offset: 0x0238 */
+	uint32_t memcfg_con15;                   /* Address Offset: 0x023C */
+	uint32_t memcfg_con16;                   /* Address Offset: 0x0240 */
+	uint32_t memcfg_con17;                   /* Address Offset: 0x0244 */
+	uint32_t memcfg_con18;                   /* Address Offset: 0x0248 */
+	uint32_t memcfg_con19;                   /* Address Offset: 0x024C */
+	uint32_t memcfg_con20;                   /* Address Offset: 0x0250 */
+	uint32_t memcfg_con21;                   /* Address Offset: 0x0254 */
+	uint32_t memcfg_con22;                   /* Address Offset: 0x0258 */
+	uint32_t memcfg_con23;                   /* Address Offset: 0x025C */
+	uint32_t memcfg_con24;                   /* Address Offset: 0x0260 */
+	uint32_t reserved0264;                   /* Address Offset: 0x0264 */
+	uint32_t memcfg_con26;                   /* Address Offset: 0x0268 */
+	uint32_t memcfg_con27;                   /* Address Offset: 0x026C */
+	uint32_t memcfg_con28;                   /* Address Offset: 0x0270 */
+	uint32_t memcfg_con29;                   /* Address Offset: 0x0274 */
+	uint32_t memcfg_con30;                   /* Address Offset: 0x0278 */
+	uint32_t memcfg_con31;                   /* Address Offset: 0x027C */
+	uint32_t reserved0280[33];               /* Address Offset: 0x0280 */
+	uint32_t soc_con1;                       /* Address Offset: 0x0304 */
+	uint32_t soc_con2;                       /* Address Offset: 0x0308 */
+	uint32_t soc_con3;                       /* Address Offset: 0x030C */
+	uint32_t reserved0310[2];                /* Address Offset: 0x0310 */
+	uint32_t soc_con6;                       /* Address Offset: 0x0318 */
+	uint32_t soc_con7;                       /* Address Offset: 0x031C */
+	uint32_t soc_con8;                       /* Address Offset: 0x0320 */
+	uint32_t soc_con9;                       /* Address Offset: 0x0324 */
+	uint32_t soc_con10;                      /* Address Offset: 0x0328 */
+	uint32_t soc_con11;                      /* Address Offset: 0x032C */
+	uint32_t soc_con12;                      /* Address Offset: 0x0330 */
+	uint32_t soc_con13;                      /* Address Offset: 0x0334 */
+	uint32_t reserved0338[18];               /* Address Offset: 0x0338 */
+	uint32_t soc_status0;                    /* Address Offset: 0x0380 */
+	uint32_t soc_status1;                    /* Address Offset: 0x0384 */
+	uint32_t soc_status2;                    /* Address Offset: 0x0388 */
+	uint32_t soc_status3;                    /* Address Offset: 0x038C */
+	uint32_t reserved0390[92];               /* Address Offset: 0x0390 */
+	uint32_t otp_key08;                      /* Address Offset: 0x0500 */
+	uint32_t otp_key0d;                      /* Address Offset: 0x0504 */
+	uint32_t otp_key0e;                      /* Address Offset: 0x0508 */
+	uint32_t reserved050c[61];               /* Address Offset: 0x050C */
+	uint32_t chip_id;                        /* Address Offset: 0x0600 */
+};
+check_member(rk3588_sys_grf, chip_id, 0x0600);
+
+struct rk3588_php_grf {
+	uint32_t php_con0;                       /* Address Offset: 0x0000 */
+	uint32_t php_con1;                       /* Address Offset: 0x0004 */
+	uint32_t gmac_con0;                      /* Address Offset: 0x0008 */
+	uint32_t reserved000c;                   /* Address Offset: 0x000C */
+	uint32_t sata_con0;                      /* Address Offset: 0x0010 */
+	uint32_t sata_con1;                      /* Address Offset: 0x0014 */
+	uint32_t sata_con2;                      /* Address Offset: 0x0018 */
+	uint32_t php_mmu_con0;                   /* Address Offset: 0x001C */
+	uint32_t php_mmu_con1;                   /* Address Offset: 0x0020 */
+	uint32_t php_mmu_con2;                   /* Address Offset: 0x0024 */
+	uint32_t its_taddr0;                     /* Address Offset: 0x0028 */
+	uint32_t its_taddr1;                     /* Address Offset: 0x002C */
+	uint32_t pcie_mmu_pciemode;              /* Address Offset: 0x0030 */
+	uint32_t pcie_mmu_con0;                  /* Address Offset: 0x0034 */
+	uint32_t pcie_mmu_con1;                  /* Address Offset: 0x0038 */
+	uint32_t pcie_mmu_con2;                  /* Address Offset: 0x003C */
+	uint32_t mem_con0;                       /* Address Offset: 0x0040 */
+	uint32_t php_st0;                        /* Address Offset: 0x0044 */
+	uint32_t php_st1;                        /* Address Offset: 0x0048 */
+	uint32_t php_st2;                        /* Address Offset: 0x004C */
+	uint32_t php_st3;                        /* Address Offset: 0x0050 */
+	uint32_t php_st4;                        /* Address Offset: 0x0054 */
+	uint32_t mmu_pmu_ack;                    /* Address Offset: 0x0058 */
+	uint32_t pcie_mmu_con6;                  /* Address Offset: 0x005C */
+	uint32_t pcie_mmu_con7;                  /* Address Offset: 0x0060 */
+	uint32_t mem_con5;                       /* Address Offset: 0x0064 */
+	uint32_t mem_con10;                      /* Address Offset: 0x0068 */
+	uint32_t reserved006c;                   /* Address Offset: 0x006C */
+	uint32_t clk_con1;                       /* Address Offset: 0x0070 */
+	uint32_t gmac0_sid_aw;                   /* Address Offset: 0x0074 */
+	uint32_t gmac0_ssid_aw;                  /* Address Offset: 0x0078 */
+	uint32_t gmac1_sid_aw;                   /* Address Offset: 0x007C */
+	uint32_t gmac1_ssid_aw;                  /* Address Offset: 0x0080 */
+	uint32_t sata0_sid_aw;                   /* Address Offset: 0x0084 */
+	uint32_t sata0_ssid_aw;                  /* Address Offset: 0x0088 */
+	uint32_t sata1_sid_aw;                   /* Address Offset: 0x008C */
+	uint32_t sata1_ssid_aw;                  /* Address Offset: 0x0090 */
+	uint32_t sata2_sid_aw;                   /* Address Offset: 0x0094 */
+	uint32_t sata2_ssid_aw;                  /* Address Offset: 0x0098 */
+	uint32_t gmac0_sid_ar;                   /* Address Offset: 0x009C */
+	uint32_t gmac0_ssid_ar;                  /* Address Offset: 0x00A0 */
+	uint32_t gmac1_sid_ar;                   /* Address Offset: 0x00A4 */
+	uint32_t gmac1_ssid_ar;                  /* Address Offset: 0x00A8 */
+	uint32_t sata0_sid_ar;                   /* Address Offset: 0x00AC */
+	uint32_t sata0_ssid_ar;                  /* Address Offset: 0x00B0 */
+	uint32_t sata1_sid_ar;                   /* Address Offset: 0x00B4 */
+	uint32_t sata1_ssid_ar;                  /* Address Offset: 0x00B8 */
+	uint32_t sata2_sid_ar;                   /* Address Offset: 0x00BC */
+	uint32_t sata2_ssid_ar;                  /* Address Offset: 0x00C0 */
+	uint32_t usb3otg_2_sid_ar;               /* Address Offset: 0x00C4 */
+	uint32_t usb3otg_2_ssid_ar;              /* Address Offset: 0x00C8 */
+	uint32_t usb3otg_2_sid_aw;               /* Address Offset: 0x00CC */
+	uint32_t usb3otg_2_ssid_aw;              /* Address Offset: 0x00D0 */
+	uint32_t gmac_con_pst;                   /* Address Offset: 0x00D4 */
+	uint32_t gmac0_cmd;                      /* Address Offset: 0x00D8 */
+	uint32_t gmac1_cmd;                      /* Address Offset: 0x00DC */
+	uint32_t mem_con11;                      /* Address Offset: 0x00E0 */
+	uint32_t usb3otg_2_con0;                 /* Address Offset: 0x00E4 */
+	uint32_t usb3otg_2_con1;                 /* Address Offset: 0x00E8 */
+	uint32_t usb3otg_2_intcon;               /* Address Offset: 0x00EC */
+	uint32_t usb3otg_2_st_lat0;              /* Address Offset: 0x00F0 */
+	uint32_t usb3otg_2_st_lat1;              /* Address Offset: 0x00F4 */
+	uint32_t usb3otg_2_st_cb;                /* Address Offset: 0x00F8 */
+	uint32_t usb3otg_2_st;                   /* Address Offset: 0x00FC */
+	uint32_t pciesel_con;                    /* Address Offset: 0x0100 */
+	uint32_t utmi_con;                       /* Address Offset: 0x0104 */
+	uint32_t reserved0108;                   /* Address Offset: 0x0108 */
+	uint32_t pcie4l_sid_aw;                  /* Address Offset: 0x010C */
+	uint32_t pcie4l_sid_ar;                  /* Address Offset: 0x0110 */
+	uint32_t pcie2l_sid_aw;                  /* Address Offset: 0x0114 */
+	uint32_t pcie2l_sid_ar;                  /* Address Offset: 0x0118 */
+	uint32_t pcie1l0_sid_aw;                 /* Address Offset: 0x011C */
+	uint32_t pcie1l0_sid_ar;                 /* Address Offset: 0x0120 */
+	uint32_t pcie1l1_sid_aw;                 /* Address Offset: 0x0124 */
+	uint32_t pcie1l1_sid_ar;                 /* Address Offset: 0x0128 */
+	uint32_t pcie1l2_sid_aw;                 /* Address Offset: 0x012C */
+	uint32_t pcie1l2_sid_ar;                 /* Address Offset: 0x0130 */
+	uint32_t reserved0134;                   /* Address Offset: 0x0134 */
+	uint32_t pcie_ats;                       /* Address Offset: 0x0138 */
+	uint32_t st_utmi;                        /* Address Offset: 0x013C */
+	uint32_t reserved0140;                   /* Address Offset: 0x0140 */
+	uint32_t pcie4l_ssid_aw;                 /* Address Offset: 0x0144 */
+	uint32_t pcie4l_ssid_ar;                 /* Address Offset: 0x0148 */
+	uint32_t pcie2l_ssid_aw;                 /* Address Offset: 0x014C */
+	uint32_t pcie2l_ssid_ar;                 /* Address Offset: 0x0150 */
+	uint32_t pcie1l0_ssid_aw;                /* Address Offset: 0x0154 */
+	uint32_t pcie1l0_ssid_ar;                /* Address Offset: 0x0158 */
+	uint32_t pcie1l1_ssid_aw;                /* Address Offset: 0x015C */
+	uint32_t pcie1l1_ssid_ar;                /* Address Offset: 0x0160 */
+	uint32_t pcie1l2_ssid_aw;                /* Address Offset: 0x0164 */
+	uint32_t pcie1l2_ssid_ar;                /* Address Offset: 0x0168 */
+	uint32_t pcie_ssid_v;                    /* Address Offset: 0x016C */
+	uint32_t reserved0170;                   /* Address Offset: 0x0170 */
+	uint32_t sata_pd_sel;                    /* Address Offset: 0x0174 */
+	uint32_t pcie_mmu_irq_clr;               /* Address Offset: 0x0178 */
+	uint32_t php_mmu_irq_clr;                /* Address Offset: 0x017C */
+	uint32_t pcie_mmu_st;                    /* Address Offset: 0x0180 */
+	uint32_t php_mmu_st;                     /* Address Offset: 0x0184 */
+	uint32_t reserved0188;                   /* Address Offset: 0x0188 */
+	uint32_t php_st0b;                       /* Address Offset: 0x018C */
+};
+check_member(rk3588_php_grf, php_st0b, 0x018c);
+
+#endif
diff --git a/arch/arm/include/asm/arch-rockchip/ioc_rk3588.h b/arch/arm/include/asm/arch-rockchip/ioc_rk3588.h
new file mode 100644
index 0000000000..177fe0b798
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/ioc_rk3588.h
@@ -0,0 +1,102 @@
+/*
+ * (C) Copyright 2021 Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#ifndef _ASM_ARCH_IOC_RK3588_H
+#define _ASM_ARCH_IOC_RK3588_H
+
+#include <common.h>
+
+struct rk3588_bus_ioc {
+	uint32_t reserved0000[3];      /* Address Offset: 0x0000 */
+	uint32_t gpio0b_iomux_sel_h;   /* Address Offset: 0x000C */
+	uint32_t gpio0c_iomux_sel_l;   /* Address Offset: 0x0010 */
+	uint32_t gpio0c_iomux_sel_h;   /* Address Offset: 0x0014 */
+	uint32_t gpio0d_iomux_sel_l;   /* Address Offset: 0x0018 */
+	uint32_t gpio0d_iomux_sel_h;   /* Address Offset: 0x001C */
+	uint32_t gpio1a_iomux_sel_l;   /* Address Offset: 0x0020 */
+	uint32_t gpio1a_iomux_sel_h;   /* Address Offset: 0x0024 */
+	uint32_t gpio1b_iomux_sel_l;   /* Address Offset: 0x0028 */
+	uint32_t gpio1b_iomux_sel_h;   /* Address Offset: 0x002C */
+	uint32_t gpio1c_iomux_sel_l;   /* Address Offset: 0x0030 */
+	uint32_t gpio1c_iomux_sel_h;   /* Address Offset: 0x0034 */
+	uint32_t gpio1d_iomux_sel_l;   /* Address Offset: 0x0038 */
+	uint32_t gpio1d_iomux_sel_h;   /* Address Offset: 0x003C */
+	uint32_t gpio2a_iomux_sel_l;   /* Address Offset: 0x0040 */
+	uint32_t gpio2a_iomux_sel_h;   /* Address Offset: 0x0044 */
+	uint32_t gpio2b_iomux_sel_l;   /* Address Offset: 0x0048 */
+	uint32_t gpio2b_iomux_sel_h;   /* Address Offset: 0x004C */
+	uint32_t gpio2c_iomux_sel_l;   /* Address Offset: 0x0050 */
+	uint32_t gpio2c_iomux_sel_h;   /* Address Offset: 0x0054 */
+	uint32_t gpio2d_iomux_sel_l;   /* Address Offset: 0x0058 */
+	uint32_t gpio2d_iomux_sel_h;   /* Address Offset: 0x005C */
+	uint32_t gpio3a_iomux_sel_l;   /* Address Offset: 0x0060 */
+	uint32_t gpio3a_iomux_sel_h;   /* Address Offset: 0x0064 */
+	uint32_t gpio3b_iomux_sel_l;   /* Address Offset: 0x0068 */
+	uint32_t gpio3b_iomux_sel_h;   /* Address Offset: 0x006C */
+	uint32_t gpio3c_iomux_sel_l;   /* Address Offset: 0x0070 */
+	uint32_t gpio3c_iomux_sel_h;   /* Address Offset: 0x0074 */
+	uint32_t gpio3d_iomux_sel_l;   /* Address Offset: 0x0078 */
+	uint32_t gpio3d_iomux_sel_h;   /* Address Offset: 0x007C */
+	uint32_t gpio4a_iomux_sel_l;   /* Address Offset: 0x0080 */
+	uint32_t gpio4a_iomux_sel_h;   /* Address Offset: 0x0084 */
+	uint32_t gpio4b_iomux_sel_l;   /* Address Offset: 0x0088 */
+	uint32_t gpio4b_iomux_sel_h;   /* Address Offset: 0x008C */
+	uint32_t gpio4c_iomux_sel_l;   /* Address Offset: 0x0090 */
+	uint32_t gpio4c_iomux_sel_h;   /* Address Offset: 0x0094 */
+	uint32_t gpio4d_iomux_sel_l;   /* Address Offset: 0x0098 */
+	uint32_t gpio4d_iomux_sel_h;   /* Address Offset: 0x009C */
+};
+check_member(rk3588_bus_ioc, gpio4d_iomux_sel_h, 0x009C);
+
+
+struct rk3588_pmu0_ioc {
+	uint32_t gpio0a_iomux_sel_l;   /* Address Offset: 0x0000 */
+	uint32_t gpio0a_iomux_sel_h;   /* Address Offset: 0x0004 */
+	uint32_t gpio0b_iomux_sel_l;   /* Address Offset: 0x0008 */
+	uint32_t reserved0012;         /* Address Offset: 0x000C */
+	uint32_t gpio0a_ds_l;          /* Address Offset: 0x0010 */
+	uint32_t gpio0a_ds_h;          /* Address Offset: 0x0014 */
+	uint32_t gpio0b_ds_l;          /* Address Offset: 0x0018 */
+	uint32_t reserved0028;         /* Address Offset: 0x001C */
+	uint32_t gpio0a_p;             /* Address Offset: 0x0020 */
+	uint32_t gpio0b_p;             /* Address Offset: 0x0024 */
+	uint32_t gpio0a_ie;            /* Address Offset: 0x0028 */
+	uint32_t gpio0b_ie;            /* Address Offset: 0x002C */
+	uint32_t gpio0a_smt;           /* Address Offset: 0x0030 */
+	uint32_t gpio0b_smt;           /* Address Offset: 0x0034 */
+	uint32_t gpio0a_pdis;          /* Address Offset: 0x0038 */
+	uint32_t gpio0b_pdis;          /* Address Offset: 0x003C */
+	uint32_t xin_con;              /* Address Offset: 0x0040 */
+};
+check_member(rk3588_pmu0_ioc, xin_con, 0x0040);
+
+struct rk3588_pmu1_ioc {
+	uint32_t gpio0b_iomux_sel_h;  /* Address Offset: 0x0000 */
+	uint32_t gpio0c_iomux_sel_l;  /* Address Offset: 0x0004 */
+	uint32_t gpio0c_iomux_sel_h;  /* Address Offset: 0x0008 */
+	uint32_t gpio0d_iomux_sel_l;  /* Address Offset: 0x000C */
+	uint32_t gpio0d_iomux_sel_h;  /* Address Offset: 0x0010 */
+	uint32_t gpio0b_ds_h;         /* Address Offset: 0x0014 */
+	uint32_t gpio0c_ds_l;         /* Address Offset: 0x0018 */
+	uint32_t gpio0c_ds_h;         /* Address Offset: 0x001C */
+	uint32_t gpio0d_ds_l;         /* Address Offset: 0x0020 */
+	uint32_t gpio0d_ds_h;         /* Address Offset: 0x0024 */
+	uint32_t gpio0b_p;            /* Address Offset: 0x0028 */
+	uint32_t gpio0c_p;            /* Address Offset: 0x002C */
+	uint32_t gpio0d_p;            /* Address Offset: 0x0030 */
+	uint32_t gpio0b_ie;           /* Address Offset: 0x0034 */
+	uint32_t gpio0c_ie;           /* Address Offset: 0x0038 */
+	uint32_t gpio0d_ie;           /* Address Offset: 0x003C */
+	uint32_t gpio0b_smt;          /* Address Offset: 0x0040 */
+	uint32_t gpio0c_smt;          /* Address Offset: 0x0044 */
+	uint32_t gpio0d_smt;          /* Address Offset: 0x0048 */
+	uint32_t gpio0b_pdis;         /* Address Offset: 0x004C */
+	uint32_t gpio0c_pdis;         /* Address Offset: 0x0050 */
+	uint32_t gpio0d_pdis;         /* Address Offset: 0x0054 */
+};
+check_member(rk3588_pmu1_ioc, gpio0d_pdis, 0x0054);
+
+#endif
+
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index dfa5a3ae5b..1d6142c2e3 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -409,6 +409,35 @@ config TPL_MAX_SIZE
 
 endif
 
+config ROCKCHIP_RK3588
+	bool "Support Rockchip RK3588"
+	select ARM64
+	select ARM_SMCCC
+	select DEBUG_UART_BOARD_INIT
+	select GICV3
+	select ROCKCHIP_BROM_HELPER
+	select SPL
+	select SUPPORT_SPL
+	select TPL
+	select SUPPORT_TPL
+	select TPL_TINY_FRAMEWORK if TPL
+	imply TPL_SERIAL_SUPPORT
+	select DEBUG_UART_BOARD_INIT
+	help
+	  The Rockchip RK3588 is a ARM-based SoC with a quad-core Cortex-A55.
+
+if ROCKCHIP_RK3588
+
+config TPL_LDSCRIPT
+	default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
+
+config TPL_TEXT_BASE
+	default 0xfdcc1000
+
+config TPL_MAX_SIZE
+	default 61440
+endif
+
 config ROCKCHIP_RK1808
 	bool "Support Rockchip RK1808"
 	select ARM64
@@ -541,6 +570,7 @@ config ROCKCHIP_BOOT_MODE_REG
 	default 0xff738200 if ROCKCHIP_RK3368
 	default 0xff320300 if ROCKCHIP_RK3399
 	default 0xfdc20200 if ROCKCHIP_RK3568
+	default 0xfd58a200 if ROCKCHIP_RK3588
 	default 0xfe020200 if ROCKCHIP_RK1808
 	default 0x10300580 if ROCKCHIP_RV1108
 	default 0xfe020200 if ROCKCHIP_RV1126
@@ -564,6 +594,7 @@ config ROCKCHIP_STIMER_BASE
 	default 0xff830020 if ROCKCHIP_RK3368
 	default 0xff8680a0 if ROCKCHIP_RK3399
 	default 0xfdd1c020 if ROCKCHIP_RK3568
+	default 0xfd8c8000 if ROCKCHIP_RK3588
 	default 0x10350020 if ROCKCHIP_RV1108
 	default 0xff670020 if ROCKCHIP_RV1126
 	default 0
@@ -584,6 +615,7 @@ config ROCKCHIP_IRAM_START_ADDR
 	default 0xff8c0000 if ROCKCHIP_RK3368
 	default 0xff8c0000 if ROCKCHIP_RK3399
 	default 0xfdcc0000 if ROCKCHIP_RK3568
+	default 0xff000000 if ROCKCHIP_RK3588
 	default 0x10080000 if ROCKCHIP_RV1108
 	default 0xff700000 if ROCKCHIP_RV1126
 	default 0
@@ -901,6 +933,7 @@ source "arch/arm/mach-rockchip/rk3328/Kconfig"
 source "arch/arm/mach-rockchip/rk3368/Kconfig"
 source "arch/arm/mach-rockchip/rk3399/Kconfig"
 source "arch/arm/mach-rockchip/rk3568/Kconfig"
+source "arch/arm/mach-rockchip/rk3588/Kconfig"
 source "arch/arm/mach-rockchip/rk1808/Kconfig"
 source "arch/arm/mach-rockchip/rv1108/Kconfig"
 source "arch/arm/mach-rockchip/rv1126/Kconfig"
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 467f1986f2..b8074f13f0 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -70,6 +70,7 @@ obj-$(CONFIG_ROCKCHIP_RK3328) += rk3328/
 obj-$(CONFIG_ROCKCHIP_RK3368) += rk3368/
 obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399/
 obj-$(CONFIG_ROCKCHIP_RK3568) += rk3568/
+obj-$(CONFIG_ROCKCHIP_RK3588) += rk3588/
 obj-$(CONFIG_ROCKCHIP_RK1808) += rk1808/
 obj-$(CONFIG_ROCKCHIP_RV1108) += rv1108/
 obj-$(CONFIG_ROCKCHIP_RV1126) += rv1126/
diff --git a/arch/arm/mach-rockchip/chip_info.c b/arch/arm/mach-rockchip/chip_info.c
index 90a22f2c63..bc2cac4ecd 100644
--- a/arch/arm/mach-rockchip/chip_info.c
+++ b/arch/arm/mach-rockchip/chip_info.c
@@ -65,6 +65,8 @@ static int rockchip_get_chip_info(unsigned int chip_info[])
 	chip_info[0] = 0x50583330;
 #elif defined(CONFIG_ROCKCHIP_RK3568)
 	chip_info[0] = 0x33353638;
+#elif defined(CONFIG_ROCKCHIP_RK3588)
+	chip_info[0] = 0x33353838;
 #endif
 
 	return 0;
diff --git a/arch/arm/mach-rockchip/rk3588/Kconfig b/arch/arm/mach-rockchip/rk3588/Kconfig
new file mode 100644
index 0000000000..dc97fd9ab3
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3588/Kconfig
@@ -0,0 +1,17 @@
+if ROCKCHIP_RK3588
+
+config TARGET_EVB_RK3588
+	bool "EVB_RK3588"
+	select BOARD_LATE_INIT
+	help
+	  RK3588 EVB is a evaluation board for Rockchp RK3588.
+
+config SYS_SOC
+	default "rockchip"
+
+config SYS_MALLOC_F_LEN
+	default 0x400
+
+source board/rockchip/evb_rk3588/Kconfig
+
+endif
diff --git a/arch/arm/mach-rockchip/rk3588/Makefile b/arch/arm/mach-rockchip/rk3588/Makefile
new file mode 100644
index 0000000000..8fda2d316a
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3588/Makefile
@@ -0,0 +1,11 @@
+#
+# (C) Copyright 2021 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+ifneq ($(CONFIG_TPL_BUILD)$(CONFIG_TPL_TINY_FRAMEWORK),yy)
+obj-y += syscon_rk3588.o
+endif
+obj-y += rk3588.o
+obj-y += clk_rk3588.o
diff --git a/arch/arm/mach-rockchip/rk3588/clk_rk3588.c b/arch/arm/mach-rockchip/rk3588/clk_rk3588.c
new file mode 100644
index 0000000000..b8223fa202
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3588/clk_rk3588.c
@@ -0,0 +1,41 @@
+/*
+ * (C) Copyright 2020 Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk3588.h>
+
+int rockchip_get_clk(struct udevice **devp)
+{
+	return uclass_get_device_by_driver(UCLASS_CLK,
+			DM_GET_DRIVER(rockchip_rk3588_cru), devp);
+}
+
+#ifdef CONFIG_CLK_SCMI
+int rockchip_get_scmi_clk(struct udevice **devp)
+{
+	return uclass_get_device_by_driver(UCLASS_CLK,
+			DM_GET_DRIVER(scmi_clock), devp);
+}
+#endif
+
+void *rockchip_get_cru(void)
+{
+	struct rk3588_clk_priv *priv;
+	struct udevice *dev;
+	int ret;
+
+	ret = rockchip_get_clk(&dev);
+	if (ret)
+		return ERR_PTR(ret);
+
+	priv = dev_get_priv(dev);
+
+	return priv->cru;
+}
+
diff --git a/arch/arm/mach-rockchip/rk3588/rk3588.c b/arch/arm/mach-rockchip/rk3588/rk3588.c
new file mode 100644
index 0000000000..37d80b5a83
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3588/rk3588.c
@@ -0,0 +1,82 @@
+/*
+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/cpu.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/ioc_rk3588.h>
+#include <dt-bindings/clock/rk3588-cru.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#include <asm/armv8/mmu.h>
+
+static struct mm_region rk3588_mem_map[] = {
+	{
+		.virt = 0x0UL,
+		.phys = 0x0UL,
+		.size = 0xf0000000UL,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+			 PTE_BLOCK_INNER_SHARE
+	}, {
+		.virt = 0xf0000000UL,
+		.phys = 0xf0000000UL,
+		.size = 0x10000000UL,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+			 PTE_BLOCK_NON_SHARE |
+			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
+	}, {
+		/* List terminator */
+		0,
+	}
+};
+
+struct mm_region *mem_map = rk3588_mem_map;
+
+/* GPIO4D_IOMUX_SEL_L */
+enum {
+	GPIO4D0_SHIFT		= 0,
+	GPIO4D0_MASK		= GENMASK(3, 0),
+	GPIO4D0_GPIO		= 0,
+	GPIO4D0_SDMMC_D0	= 1,
+	GPIO4D0_PDM1_SDI3_M0	= 2,
+	GPIO4D0_JTAG_TCK_M1	= 5,
+	GPIO4D0_I2C3_SCL_M4	= 9,
+	GPIO4D0_UART2_TX_M1	= 10,
+	GPIO4D0_PWM8_M1		= 12,
+
+	GPIO4D1_SHIFT		= 4,
+	GPIO4D1_MASK		= GENMASK(7, 4),
+	GPIO4D1_GPIO		= 0,
+	GPIO4D1_SDMMC_D1	= 1,
+	GPIO4D1_PDM1_SDI2_M0	= 2,
+	GPIO4D1_JTAG_TMS_M1	= 5,
+	GPIO4D1_I2C3_SDA_M4	= 9,
+	GPIO4D1_UART2_RX_M1	= 10,
+	GPIO4D1_PWM9_M1		= 12,
+};
+
+#define GRF_BASE	0xfd58c000
+
+void board_debug_uart_init(void)
+{
+	static struct rk3588_grf * const grf = (void *)GRF_BASE;
+
+	/* UART2_M1 Switch iomux */
+	rk_clrsetreg(&grf->gpio4d_iomux_sel_l,
+		     GPIO4D0_MASK | GPIO4D1_MASK,
+		     GPIO4D0_UART2_TX_M1 << GPIO4D0_SHIFT |
+		     GPIO4D1_UART2_RX_M1 << GPIO4D1_SHIFT);
+
+	/* TODO: M1 select ? */
+}
+
+#ifndef CONFIG_TPL_BUILD
+int arch_cpu_init(void)
+{
+	return 0;
+}
+#endif
diff --git a/arch/arm/mach-rockchip/rk3588/syscon_rk3588.c b/arch/arm/mach-rockchip/rk3588/syscon_rk3588.c
new file mode 100644
index 0000000000..91410b9e3e
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3588/syscon_rk3588.c
@@ -0,0 +1,29 @@
+/*
+ * (C) Copyright 2021 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+
+static const struct udevice_id rk3588_syscon_ids[] = {
+	{ .compatible = "rockchip,rk3588-sys-grf", .data = ROCKCHIP_SYSCON_GRF },
+	{ .compatible = "rockchip,pcie30-phy-grf", .data = ROCKCHIP_SYSCON_PCIE30_PHY_GRF },
+	{ .compatible = "rockchip,rk3588-php-grf", .data = ROCKCHIP_SYSCON_PHP_GRF },
+	{ .compatible = "rockchip,pipe-phy-grf",   .data = ROCKCHIP_SYSCON_PIPE_PHY0_GRF },
+	{ .compatible = "rockchip,pipe-phy-grf",   .data = ROCKCHIP_SYSCON_PIPE_PHY1_GRF },
+	{ .compatible = "rockchip,pipe-phy-grf",   .data = ROCKCHIP_SYSCON_PIPE_PHY2_GRF },
+	{ }
+};
+
+U_BOOT_DRIVER(syscon_rk3588) = {
+	.name = "rk3588_syscon",
+	.id = UCLASS_SYSCON,
+	.of_match = rk3588_syscon_ids,
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	.bind = dm_scan_fdt_dev,
+#endif
+};
diff --git a/include/configs/rk3588_common.h b/include/configs/rk3588_common.h
new file mode 100644
index 0000000000..a48cd40f65
--- /dev/null
+++ b/include/configs/rk3588_common.h
@@ -0,0 +1,80 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2021 Rockchip Electronics Co., Ltd
+ *
+ */
+
+#ifndef __CONFIG_RK3588_COMMON_H
+#define __CONFIG_RK3588_COMMON_H
+
+#include "rockchip-common.h"
+
+#define CONFIG_SPL_FRAMEWORK
+#define CONFIG_SPL_TEXT_BASE		0x00000000
+#define CONFIG_SPL_MAX_SIZE		0x00040000
+#define CONFIG_SPL_BSS_START_ADDR	0x03fe0000
+#define CONFIG_SPL_BSS_MAX_SIZE		0x00010000
+#define CONFIG_SPL_STACK		0x03fe0000
+
+#define CONFIG_SYS_MALLOC_LEN		(32 << 20)
+#define CONFIG_SYS_CBSIZE		1024
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_SYS_TEXT_BASE		0x00200000
+
+#define CONFIG_SYS_INIT_SP_ADDR		0x00400000
+#define CONFIG_SYS_LOAD_ADDR		0x00400800
+#define CONFIG_SYS_BOOTM_LEN		(64 << 20)	/* 64M */
+#define COUNTER_FREQUENCY		24000000
+
+#define GICD_BASE			0xfe600000
+#define GICR_BASE			0xfe680000
+#define GICC_BASE			0xfe600000
+
+/* MMC/SD IP block */
+#define CONFIG_BOUNCE_BUFFER
+
+#define CONFIG_SYS_SDRAM_BASE		0
+#define SDRAM_MAX_SIZE			0xf0000000
+#define CONFIG_SYS_NONCACHED_MEMORY	(1 << 20)	/* 1 MiB */
+
+#ifndef CONFIG_SPL_BUILD
+/* usb mass storage */
+#define CONFIG_USB_FUNCTION_MASS_STORAGE
+#define CONFIG_ROCKUSB_G_DNL_PID	0x350b
+
+/*
+ * decompressed kernel:  4M ~ 84M
+ * compressed kernel:   84M ~ 131M
+ */
+#define ENV_MEM_LAYOUT_SETTINGS \
+	"scriptaddr=0x00500000\0" \
+	"pxefile_addr_r=0x00600000\0" \
+	"fdt_addr_r=0x0a100000\0" \
+	"kernel_addr_r=0x00400000\0" \
+	"kernel_addr_c=0x05480000\0" \
+	"ramdisk_addr_r=0x0a200000\0"
+
+#include <config_distro_bootcmd.h>
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	ENV_MEM_LAYOUT_SETTINGS \
+	"partitions=" PARTS_RKIMG \
+	ROCKCHIP_DEVICE_SETTINGS \
+	RKIMG_DET_BOOTDEV \
+	BOOTENV
+
+#undef RKIMG_BOOTCOMMAND
+#define RKIMG_BOOTCOMMAND		\
+	"boot_fit;"			\
+	"boot_android ${devtype} ${devnum};" \
+	"run distro_bootcmd;"
+#endif
+
+/* rockchip ohci host driver */
+#define CONFIG_USB_OHCI_NEW
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	1
+
+#define CONFIG_PREBOOT
+#define CONFIG_LIB_HW_RAND
+
+#endif

commit 9a67c1296e48844f0aaf5ca6492f7828563ea408
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 22 16:54:30 2021 +0800

    rockchip: dts: Add rk3588 evb support
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ib20a8ec504ab644b8f9e1e1bef7ccaeeb8876aeb

diff --git a/arch/arm/dts/rk3588-evb.dts b/arch/arm/dts/rk3588-evb.dts
new file mode 100644
index 0000000000..ad750d5b74
--- /dev/null
+++ b/arch/arm/dts/rk3588-evb.dts
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd
+ *
+ */
+
+/dts-v1/;
+#include "rk3588.dtsi"
+#include "rk3588-u-boot.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Rockchip RK3588 Evaluation Board";
+	compatible = "rockchip,rk3588-evb", "rockchip,rk3588";
+
+	adc-keys {
+		compatible = "adc-keys";
+		io-channels = <&saradc 1>;
+		io-channel-names = "buttons";
+		keyup-threshold-microvolt = <1800000>;
+		u-boot,dm-pre-reloc;
+		status = "okay";
+
+		volumeup-key {
+			u-boot,dm-pre-reloc;
+			linux,code = <KEY_VOLUMEUP>;
+			label = "volume up";
+			press-threshold-microvolt = <1750>;
+		};
+	};
+};
diff --git a/arch/arm/dts/rk3588-u-boot.dtsi b/arch/arm/dts/rk3588-u-boot.dtsi
new file mode 100644
index 0000000000..28fb85c08b
--- /dev/null
+++ b/arch/arm/dts/rk3588-u-boot.dtsi
@@ -0,0 +1,249 @@
+/*
+ * (C) Copyright 2021 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+	aliases {
+		mmc0 = &sdhci;
+		mmc1 = &sdmmc;
+	};
+
+	chosen {
+		stdout-path = &uart2;
+		u-boot,spl-boot-order = &sdmmc, &sdhci, &spi_nand, &spi_nor;
+	};
+
+	secure-otp@fe3a0000 {
+		u-boot,dm-spl;
+		compatible = "rockchip,rk3588-secure-otp";
+		reg = <0x0 0xfe3a0000 0x0 0x4000>;
+	};
+};
+
+&firmware {
+	u-boot,dm-spl;
+};
+
+&gpio0 {
+	u-boot,dm-spl;
+	status = "okay";
+};
+&gpio1 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&gpio2 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+&gpio3 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&gpio4 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&scmi {
+	u-boot,dm-spl;
+};
+
+&scmi_clk {
+	u-boot,dm-spl;
+};
+
+&sram {
+	u-boot,dm-spl;
+};
+
+&scmi_shmem {
+	u-boot,dm-spl;
+};
+
+&xin24m {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&cru {
+	u-boot,dm-spl;
+	status = "okay";
+};
+
+&psci {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&crypto {
+	u-boot,dm-spl;
+	status = "okay";
+};
+
+&sys_grf {
+	u-boot,dm-spl;
+	status = "okay";
+};
+
+&pcie30_phy_grf {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&php_grf {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&pipe_phy0_grf {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&pipe_phy1_grf {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&pipe_phy2_grf {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&uart2 {
+	u-boot,dm-spl;
+	status = "okay";
+};
+
+&hw_decompress {
+	u-boot,dm-spl;
+	status = "okay";
+};
+
+&rng {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&sfc {
+	u-boot,dm-spl;
+	status = "okay";
+
+	#address-cells = <1>;
+	#size-cells = <0>;
+	spi_nand: flash@0 {
+		u-boot,dm-spl;
+		compatible = "spi-nand";
+		reg = <0>;
+		spi-tx-bus-width = <1>;
+		spi-rx-bus-width = <4>;
+		spi-max-frequency = <80000000>;
+	};
+
+	spi_nor: flash@1 {
+		u-boot,dm-spl;
+		compatible = "jedec,spi-nor";
+		label = "sfc_nor";
+		reg = <0>;
+		spi-tx-bus-width = <1>;
+		spi-rx-bus-width = <4>;
+		spi-max-frequency = <80000000>;
+	};
+};
+
+&saradc {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&sdmmc {
+	bus-width = <4>;
+	u-boot,dm-spl;
+	cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
+	status = "okay";
+};
+
+&sdhci {
+	bus-width = <8>;
+	u-boot,dm-spl;
+	mmc-hs400-1_8v;
+	non-removable;
+	status = "okay";
+};
+
+/* Support SPL-PINCTRL:
+ * 1. ioc
+ * 2. pinctrl(sdmmc)
+ * 3. gpio if need
+ */
+&ioc {
+	u-boot,dm-spl;
+};
+
+&pinctrl {
+	u-boot,dm-spl;
+	/delete-node/ sdmmc;
+	sdmmc {
+		u-boot,dm-spl;
+		sdmmc_bus4: sdmmc-bus4 {
+			u-boot,dm-spl;
+			rockchip,pins =
+				/* sdmmc_d0 */
+				<4 RK_PD0 1 &pcfg_pull_up_drv_level_2>,
+				/* sdmmc_d1 */
+				<4 RK_PD1 1 &pcfg_pull_up_drv_level_2>,
+				/* sdmmc_d2 */
+				<4 RK_PD2 1 &pcfg_pull_up_drv_level_2>,
+				/* sdmmc_d3 */
+				<4 RK_PD3 1 &pcfg_pull_up_drv_level_2>;
+		};
+
+		sdmmc_clk: sdmmc-clk {
+			u-boot,dm-spl;
+			rockchip,pins =
+				/* sdmmc_clk */
+				<4 RK_PD5 1 &pcfg_pull_up_drv_level_2>;
+		};
+
+		sdmmc_cmd: sdmmc-cmd {
+			u-boot,dm-spl;
+			rockchip,pins =
+				/* sdmmc_cmd */
+				<4 RK_PD4 1 &pcfg_pull_up_drv_level_2>;
+		};
+
+		sdmmc_det: sdmmc-det {
+			u-boot,dm-spl;
+			rockchip,pins =
+				/* sdmmc_det */
+				<0 RK_PA4 1 &pcfg_pull_up>;
+		};
+
+		sdmmc_pwren: sdmmc-pwren {
+			u-boot,dm-spl;
+			rockchip,pins =
+				/* sdmmc_pwren */
+				<0 RK_PA5 2 &pcfg_pull_none>;
+		};
+	};
+};
+
+&pcfg_pull_up_drv_level_2 {
+	u-boot,dm-spl;
+};
+
+&pcfg_pull_up {
+	u-boot,dm-spl;
+};
+
+&pcfg_pull_none
+{
+	u-boot,dm-spl;
+};
diff --git a/arch/arm/dts/rk3588-vccio3-pinctrl.dtsi b/arch/arm/dts/rk3588-vccio3-pinctrl.dtsi
new file mode 100644
index 0000000000..4af6878a16
--- /dev/null
+++ b/arch/arm/dts/rk3588-vccio3-pinctrl.dtsi
@@ -0,0 +1,453 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
+ */
+
+#include <dt-bindings/pinctrl/rockchip.h>
+
+/*
+ * This file is auto generated by pin2dts tool, please keep these code
+ * by adding changes at end of this file.
+ */
+&pinctrl {
+	clk32k {
+		clk32k_out1: clk32k-out1 {
+			rockchip,pins =
+				/* clk32k_out1 */
+				<2 RK_PC5 1 &pcfg_pull_none>;
+		};
+
+	};
+
+	eth0 {
+		eth0_pins: eth0-pins {
+			rockchip,pins =
+				/* eth0_refclko_25m */
+				<2 RK_PC3 1 &pcfg_pull_none>;
+		};
+
+	};
+
+	fspi {
+		fspim1_pins: fspim1-pins {
+			rockchip,pins =
+				/* fspi_clk_m1 */
+				<2 RK_PB3 3 &pcfg_pull_none>,
+				/* fspi_cs0n_m1 */
+				<2 RK_PB4 3 &pcfg_pull_none>,
+				/* fspi_d0_m1 */
+				<2 RK_PA6 3 &pcfg_pull_none>,
+				/* fspi_d1_m1 */
+				<2 RK_PA7 3 &pcfg_pull_none>,
+				/* fspi_d2_m1 */
+				<2 RK_PB0 3 &pcfg_pull_none>,
+				/* fspi_d3_m1 */
+				<2 RK_PB1 3 &pcfg_pull_none>;
+		};
+
+		fspim1_cs1: fspim1-cs1 {
+			rockchip,pins =
+				/* fspi_cs1n_m1 */
+				<2 RK_PB5 3 &pcfg_pull_up>;
+		};
+	};
+
+	gmac0 {
+		gmac0_miim: gmac0-miim {
+			rockchip,pins =
+				/* gmac0_mdc */
+				<4 RK_PC4 1 &pcfg_pull_none>,
+				/* gmac0_mdio */
+				<4 RK_PC5 1 &pcfg_pull_none>;
+		};
+
+		gmac0_clkinout: gmac0-clkinout {
+			rockchip,pins =
+				/* gmac0_mclkinout */
+				<4 RK_PC3 1 &pcfg_pull_none>;
+		};
+
+		gmac0_rx_bus2: gmac0-rx-bus2 {
+			rockchip,pins =
+				/* gmac0_rxd0 */
+				<2 RK_PC1 1 &pcfg_pull_none>,
+				/* gmac0_rxd1 */
+				<2 RK_PC2 1 &pcfg_pull_none>,
+				/* gmac0_rxdv_crs */
+				<4 RK_PC2 1 &pcfg_pull_none>;
+		};
+
+		gmac0_tx_bus2: gmac0-tx-bus2 {
+			rockchip,pins =
+				/* gmac0_txd0 */
+				<2 RK_PB6 1 &pcfg_pull_none>,
+				/* gmac0_txd1 */
+				<2 RK_PB7 1 &pcfg_pull_none>,
+				/* gmac0_txen */
+				<2 RK_PC0 1 &pcfg_pull_none>;
+		};
+
+		gmac0_rgmii_clk: gmac0-rgmii-clk {
+			rockchip,pins =
+				/* gmac0_rxclk */
+				<2 RK_PB0 1 &pcfg_pull_none>,
+				/* gmac0_txclk */
+				<2 RK_PB3 1 &pcfg_pull_none>;
+		};
+
+		gmac0_rgmii_bus: gmac0-rgmii-bus {
+			rockchip,pins =
+				/* gmac0_rxd2 */
+				<2 RK_PA6 1 &pcfg_pull_none>,
+				/* gmac0_rxd3 */
+				<2 RK_PA7 1 &pcfg_pull_none>,
+				/* gmac0_txd2 */
+				<2 RK_PB1 1 &pcfg_pull_none>,
+				/* gmac0_txd3 */
+				<2 RK_PB2 1 &pcfg_pull_none>;
+		};
+
+		gmac0_ppsclk: gmac0-ppsclk {
+			rockchip,pins =
+				/* gmac0_ppsclk */
+				<2 RK_PC4 1 &pcfg_pull_none>;
+		};
+
+		gmac0_ppstring: gmac0-ppstring {
+			rockchip,pins =
+				/* gmac0_ppstring */
+				<2 RK_PB5 1 &pcfg_pull_none>;
+		};
+
+		gmac0_ptp_refclk: gmac0-ptp-refclk {
+			rockchip,pins =
+				/* gmac0_ptp_refclk */
+				<2 RK_PB4 1 &pcfg_pull_none>;
+		};
+
+		gmac0_txer: gmac0-txer {
+			rockchip,pins =
+				/* gmac0_txer */
+				<4 RK_PC6 1 &pcfg_pull_none>;
+		};
+
+	};
+
+	hdmi {
+		hdmim0_pins: hdmim0-pins {
+			rockchip,pins =
+				/* hdmi_tx1_cec_m0 */
+				<2 RK_PC4 4 &pcfg_pull_none>,
+				/* hdmi_tx1_scl_m0 */
+				<2 RK_PB5 4 &pcfg_pull_none>,
+				/* hdmi_tx1_sda_m0 */
+				<2 RK_PB4 4 &pcfg_pull_none>;
+		};
+	};
+
+	i2c0 {
+		i2c0m1_xfer: i2c0m1-xfer {
+			rockchip,pins =
+				/* i2c0_scl_m1 */
+				<4 RK_PC5 9 &pcfg_pull_none_smt>,
+				/* i2c0_sda_m1 */
+				<4 RK_PC6 9 &pcfg_pull_none_smt>;
+		};
+	};
+
+	i2c2 {
+		i2c2m1_xfer: i2c2m1-xfer {
+			rockchip,pins =
+				/* i2c2_scl_m1 */
+				<2 RK_PC1 9 &pcfg_pull_none_smt>,
+				/* i2c2_sda_m1 */
+				<2 RK_PC0 9 &pcfg_pull_none_smt>;
+		};
+	};
+
+	i2c3 {
+		i2c3m3_xfer: i2c3m3-xfer {
+			rockchip,pins =
+				/* i2c3_scl_m3 */
+				<2 RK_PB2 9 &pcfg_pull_none_smt>,
+				/* i2c3_sda_m3 */
+				<2 RK_PB3 9 &pcfg_pull_none_smt>;
+		};
+	};
+
+	i2c4 {
+		i2c4m1_xfer: i2c4m1-xfer {
+			rockchip,pins =
+				/* i2c4_scl_m1 */
+				<2 RK_PB5 9 &pcfg_pull_none_smt>,
+				/* i2c4_sda_m1 */
+				<2 RK_PB4 9 &pcfg_pull_none_smt>;
+		};
+	};
+
+	i2c5 {
+		i2c5m4_xfer: i2c5m4-xfer {
+			rockchip,pins =
+				/* i2c5_scl_m4 */
+				<2 RK_PB6 9 &pcfg_pull_none_smt>,
+				/* i2c5_sda_m4 */
+				<2 RK_PB7 9 &pcfg_pull_none_smt>;
+		};
+	};
+
+	i2c6 {
+		i2c6m2_xfer: i2c6m2-xfer {
+			rockchip,pins =
+				/* i2c6_scl_m2 */
+				<2 RK_PC3 9 &pcfg_pull_none_smt>,
+				/* i2c6_sda_m2 */
+				<2 RK_PC2 9 &pcfg_pull_none_smt>;
+		};
+	};
+
+	i2c7 {
+		i2c7m1_xfer: i2c7m1-xfer {
+			rockchip,pins =
+				/* i2c7_scl_m1 */
+				<4 RK_PC3 9 &pcfg_pull_none_smt>,
+				/* i2c7_sda_m1 */
+				<4 RK_PC4 9 &pcfg_pull_none_smt>;
+		};
+	};
+
+	i2c8 {
+		i2c8m1_xfer: i2c8m1-xfer {
+			rockchip,pins =
+				/* i2c8_scl_m1 */
+				<2 RK_PB0 9 &pcfg_pull_none_smt>,
+				/* i2c8_sda_m1 */
+				<2 RK_PB1 9 &pcfg_pull_none_smt>;
+		};
+	};
+
+	i2s2 {
+		i2s2m0_lrck: i2s2m0-lrck {
+			rockchip,pins =
+				/* i2s2m0_lrck */
+				<2 RK_PC0 2 &pcfg_pull_none>;
+		};
+
+		i2s2m0_mclk: i2s2m0-mclk {
+			rockchip,pins =
+				/* i2s2m0_mclk */
+				<2 RK_PB6 2 &pcfg_pull_none>;
+		};
+
+		i2s2m0_sclk: i2s2m0-sclk {
+			rockchip,pins =
+				/* i2s2m0_sclk */
+				<2 RK_PB7 2 &pcfg_pull_none>;
+		};
+
+		i2s2m0_sdi: i2s2m0-sdi {
+			rockchip,pins =
+				/* i2s2m0_sdi */
+				<2 RK_PC3 2 &pcfg_pull_none>;
+		};
+
+		i2s2m0_sdo: i2s2m0-sdo {
+			rockchip,pins =
+				/* i2s2m0_sdo */
+				<4 RK_PC3 2 &pcfg_pull_none>;
+		};
+	};
+
+	pwm2 {
+		pwm2m2_pins: pwm2m2-pins {
+			rockchip,pins =
+				/* pwm2_m2 */
+				<4 RK_PC2 11 &pcfg_pull_none>;
+		};
+	};
+
+	pwm4 {
+		pwm4m1_pins: pwm4m1-pins {
+			rockchip,pins =
+				/* pwm4_m1 */
+				<4 RK_PC3 11 &pcfg_pull_none>;
+		};
+	};
+
+	pwm5 {
+		pwm5m2_pins: pwm5m2-pins {
+			rockchip,pins =
+				/* pwm5_m2 */
+				<4 RK_PC4 11 &pcfg_pull_none>;
+		};
+	};
+
+	pwm6 {
+		pwm6m2_pins: pwm6m2-pins {
+			rockchip,pins =
+				/* pwm6_m2 */
+				<4 RK_PC5 11 &pcfg_pull_none>;
+		};
+	};
+
+	pwm7 {
+		pwm7m3_pins: pwm7m3-pins {
+			rockchip,pins =
+				/* pwm7_ir_m3 */
+				<4 RK_PC6 11 &pcfg_pull_none>;
+		};
+	};
+
+	sdio {
+		sdiom0_pins: sdiom0-pins {
+			rockchip,pins =
+				/* sdio_clk_m0 */
+				<2 RK_PB3 2 &pcfg_pull_none>,
+				/* sdio_cmd_m0 */
+				<2 RK_PB2 2 &pcfg_pull_none>,
+				/* sdio_d0_m0 */
+				<2 RK_PA6 2 &pcfg_pull_none>,
+				/* sdio_d1_m0 */
+				<2 RK_PA7 2 &pcfg_pull_none>,
+				/* sdio_d2_m0 */
+				<2 RK_PB0 2 &pcfg_pull_none>,
+				/* sdio_d3_m0 */
+				<2 RK_PB1 2 &pcfg_pull_none>;
+		};
+	};
+
+	spi1 {
+		spi1m0_pins: spi1m0-pins {
+			rockchip,pins =
+				/* spi1_clk_m0 */
+				<2 RK_PC0 8 &pcfg_pull_none>,
+				/* spi1_miso_m0 */
+				<2 RK_PC1 8 &pcfg_pull_none>,
+				/* spi1_mosi_m0 */
+				<2 RK_PC2 8 &pcfg_pull_none>;
+		};
+
+		spi1m0_cs0: spi1m0-cs0 {
+			rockchip,pins =
+				/* spi1_cs0_m0 */
+				<2 RK_PC3 8 &pcfg_pull_none>;
+		};
+
+		spi1m0_cs1: spi1m0-cs1 {
+			rockchip,pins =
+				/* spi1_cs1_m0 */
+				<2 RK_PC4 8 &pcfg_pull_none>;
+		};
+	};
+
+	spi3 {
+		spi3m0_pins: spi3m0-pins {
+			rockchip,pins =
+				/* spi3_clk_m0 */
+				<4 RK_PC6 8 &pcfg_pull_none>,
+				/* spi3_miso_m0 */
+				<4 RK_PC4 8 &pcfg_pull_none>,
+				/* spi3_mosi_m0 */
+				<4 RK_PC5 8 &pcfg_pull_none>;
+		};
+
+		spi3m0_cs0: spi3m0-cs0 {
+			rockchip,pins =
+				/* spi3_cs0_m0 */
+				<4 RK_PC2 8 &pcfg_pull_none>;
+		};
+
+		spi3m0_cs1: spi3m0-cs1 {
+			rockchip,pins =
+				/* spi3_cs1_m0 */
+				<4 RK_PC3 8 &pcfg_pull_none>;
+		};
+	};
+
+	uart1 {
+		uart1m0_xfer: uart1m0-xfer {
+			rockchip,pins =
+				/* uart1_rx_m0 */
+				<2 RK_PB6 10 &pcfg_pull_up>,
+				/* uart1_tx_m0 */
+				<2 RK_PB7 10 &pcfg_pull_up>;
+		};
+
+		uart1m0_ctsn: uart1m0-ctsn {
+			rockchip,pins =
+				/* uart1m0_ctsn */
+				<2 RK_PC1 10 &pcfg_pull_none>;
+		};
+
+		uart1m0_rtsn: uart1m0-rtsn {
+			rockchip,pins =
+				/* uart1m0_rtsn */
+				<2 RK_PC0 10 &pcfg_pull_none>;
+		};
+	};
+
+	uart6 {
+		uart6m0_xfer: uart6m0-xfer {
+			rockchip,pins =
+				/* uart6_rx_m0 */
+				<2 RK_PA6 10 &pcfg_pull_up>,
+				/* uart6_tx_m0 */
+				<2 RK_PA7 10 &pcfg_pull_up>;
+		};
+
+		uart6m0_ctsn: uart6m0-ctsn {
+			rockchip,pins =
+				/* uart6m0_ctsn */
+				<2 RK_PB1 10 &pcfg_pull_none>;
+		};
+
+		uart6m0_rtsn: uart6m0-rtsn {
+			rockchip,pins =
+				/* uart6m0_rtsn */
+				<2 RK_PB0 10 &pcfg_pull_none>;
+		};
+	};
+
+	uart7 {
+		uart7m0_xfer: uart7m0-xfer {
+			rockchip,pins =
+				/* uart7_rx_m0 */
+				<2 RK_PB4 10 &pcfg_pull_up>,
+				/* uart7_tx_m0 */
+				<2 RK_PB5 10 &pcfg_pull_up>;
+		};
+
+		uart7m0_ctsn: uart7m0-ctsn {
+			rockchip,pins =
+				/* uart7m0_ctsn */
+				<4 RK_PC6 10 &pcfg_pull_none>;
+		};
+
+		uart7m0_rtsn: uart7m0-rtsn {
+			rockchip,pins =
+				/* uart7m0_rtsn */
+				<4 RK_PC2 10 &pcfg_pull_none>;
+		};
+	};
+
+	uart9 {
+		uart9m0_xfer: uart9m0-xfer {
+			rockchip,pins =
+				/* uart9_rx_m0 */
+				<2 RK_PC4 10 &pcfg_pull_up>,
+				/* uart9_tx_m0 */
+				<2 RK_PC2 10 &pcfg_pull_up>;
+		};
+
+		uart9m0_ctsn: uart9m0-ctsn {
+			rockchip,pins =
+				/* uart9m0_ctsn */
+				<4 RK_PC5 10 &pcfg_pull_none>;
+		};
+
+		uart9m0_rtsn: uart9m0-rtsn {
+			rockchip,pins =
+				/* uart9m0_rtsn */
+				<4 RK_PC4 10 &pcfg_pull_none>;
+		};
+	};
+};
diff --git a/arch/arm/dts/rk3588.dtsi b/arch/arm/dts/rk3588.dtsi
new file mode 100644
index 0000000000..3e1bcc83fe
--- /dev/null
+++ b/arch/arm/dts/rk3588.dtsi
@@ -0,0 +1,518 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
+ */
+
+#include <dt-bindings/phy/phy-snps-pcie3.h>
+#include "rk3588s.dtsi"
+#include "rk3588-vccio3-pinctrl.dtsi"
+
+/ {
+	aliases {
+		edp0 = &edp0;
+		edp1 = &edp1;
+		ethernet0 = &gmac0;
+		hdptx0 = &hdptxphy0;
+		hdptx1 = &hdptxphy1;
+	};
+
+	usbdrd3_1: usbdrd3_1 {
+		compatible = "rockchip,rk3588-dwc3", "rockchip,rk3399-dwc3";
+		clocks = <&cru REF_CLK_USB3OTG1>, <&cru SUSPEND_CLK_USB3OTG1>,
+			 <&cru ACLK_USB3OTG1>;
+		clock-names = "ref", "suspend", "bus";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+		status = "disabled";
+
+		usbdrd_dwc3_1: usb@fc400000 {
+			compatible = "snps,dwc3";
+			reg = <0x0 0xfc400000 0x0 0x400000>;
+			interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
+			power-domains = <&power RK3588_PD_USB>;
+			resets = <&cru SRST_A_USB3OTG1>;
+			reset-names = "usb3-otg";
+			dr_mode = "host";
+			phy_type = "utmi_wide";
+			snps,dis_enblslpm_quirk;
+			snps,dis-u2-freeclk-exists-quirk;
+			snps,dis-del-phy-power-chg-quirk;
+			snps,dis-tx-ipgap-linecheck-quirk;
+			status = "disabled";
+		};
+	};
+
+	pcie30_phy_grf: syscon@fd5b8000 {
+		compatible = "rockchip,pcie30-phy-grf", "syscon";
+		reg = <0x0 0xfd5b8000 0x0 0x10000>;
+	};
+
+	pipe_phy1_grf: syscon@fd5c0000 {
+		compatible = "rockchip,pipe-phy-grf", "syscon";
+		reg = <0x0 0xfd5c0000 0x0 0x100>;
+	};
+
+	usbdpphy1_grf: syscon@fd5cc000 {
+		compatible = "rockchip,rk3588-usbdpphy-grf", "syscon";
+		reg = <0x0 0xfd5cc000 0x0 0x4000>;
+	};
+
+	usb2phy1_grf: syscon@fd5d4000 {
+		compatible = "rockchip,rk3588-usb2phy-grf", "syscon",
+			     "simple-mfd";
+		reg = <0x0 0xfd5d4000 0x0 0x4000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		u2phy1: usb2-phy@4000 {
+			compatible = "rockchip,rk3588-usb2phy";
+			reg = <0x4000 0x10>;
+			interrupts = <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>;
+			clock-names = "phyclk";
+			#clock-cells = <0>;
+			status = "disabled";
+
+			u2phy1_otg: otg-port {
+				#phy-cells = <0>;
+				status = "disabled";
+			};
+		};
+	};
+
+	hdptxphy1_grf: syscon@fd5e4000 {
+		compatible = "rockchip,rk3588-hdptxphy-grf", "syscon";
+		reg = <0x0 0xfd5e4000 0x0 0x100>;
+	};
+
+	spdif_tx5: spdif-tx@fddb8000 {
+		compatible = "rockchip,rk3588-spdif", "rockchip,rk3568-spdif";
+		reg = <0x0 0xfddb8000 0x0 0x1000>;
+		interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>;
+		dmas = <&dmac1 22>;
+		dma-names = "tx";
+		clock-names = "mclk", "hclk";
+		clocks = <&cru MCLK_SPDIF5_DP1>, <&cru HCLK_SPDIF5_DP1>;
+		#sound-dai-cells = <0>;
+		status = "disabled";
+	};
+
+	i2s8_8ch: i2s@fddc8000 {
+		compatible = "rockchip,rk3588-i2s-tdm";
+		reg = <0x0 0xfddc8000 0x0 0x1000>;
+		interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru MCLK_I2S8_8CH_TX>, <&cru HCLK_I2S8_8CH>;
+		clock-names = "mclk_tx", "hclk";
+		dmas = <&dmac2 22>;
+		dma-names = "tx";
+		resets = <&cru SRST_M_I2S8_8CH_TX>;
+		reset-names = "tx-m";
+		#sound-dai-cells = <0>;
+		status = "disabled";
+	};
+
+	spdif_tx4: spdif-tx@fdde8000 {
+		compatible = "rockchip,rk3588-spdif", "rockchip,rk3568-spdif";
+		reg = <0x0 0xfdde8000 0x0 0x1000>;
+		interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
+		dmas = <&dmac1 8>;
+		dma-names = "tx";
+		clock-names = "mclk", "hclk";
+		clocks = <&cru MCLK_SPDIF4>, <&cru HCLK_SPDIF4>;
+		#sound-dai-cells = <0>;
+		status = "disabled";
+	};
+
+	i2s6_8ch: i2s@fddf4000 {
+		compatible = "rockchip,rk3588-i2s-tdm";
+		reg = <0x0 0xfddf4000 0x0 0x1000>;
+		interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru MCLK_I2S6_8CH_TX>, <&cru HCLK_I2S6_8CH>;
+		clock-names = "mclk_tx", "hclk";
+		dmas = <&dmac2 4>;
+		dma-names = "tx";
+		resets = <&cru SRST_M_I2S6_8CH_TX>;
+		reset-names = "tx-m";
+		#sound-dai-cells = <0>;
+		status = "disabled";
+	};
+
+	i2s7_8ch: i2s@fddf8000 {
+		compatible = "rockchip,rk3588-i2s-tdm";
+		reg = <0x0 0xfddf8000 0x0 0x1000>;
+		interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru MCLK_I2S7_8CH_RX>, <&cru HCLK_I2S7_8CH>;
+		clock-names = "mclk_rx", "hclk";
+		dmas = <&dmac2 21>;
+		dma-names = "rx";
+		resets = <&cru SRST_M_I2S7_8CH_RX>;
+		reset-names = "rx-m";
+		#sound-dai-cells = <0>;
+		status = "disabled";
+	};
+
+	i2s10_8ch: i2s@fde00000 {
+		compatible = "rockchip,rk3588-i2s-tdm";
+		reg = <0x0 0xfde00000 0x0 0x1000>;
+		interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru MCLK_I2S10_8CH_RX>, <&cru HCLK_I2S10_8CH>;
+		clock-names = "mclk_rx", "hclk";
+		dmas = <&dmac2 24>;
+		dma-names = "rx";
+		resets = <&cru SRST_M_I2S10_8CH_RX>;
+		reset-names = "rx-m";
+		#sound-dai-cells = <0>;
+		status = "disabled";
+	};
+
+	spdif_rx1: spdif-rx@fde10000 {
+		compatible = "rockchip,rk3588-spdifrx", "rockchip,rk3308-spdifrx";
+		reg = <0x0 0xfde10000 0x0 0x1000>;
+		interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru MCLK_SPDIFRX1>, <&cru HCLK_SPDIFRX1>;
+		clock-names = "mclk", "hclk";
+		dmas = <&dmac0 22>;
+		dma-names = "rx";
+		resets = <&cru SRST_M_SPDIFRX1>;
+		reset-names = "spdifrx-m";
+		#sound-dai-cells = <0>;
+		status = "disabled";
+	};
+
+	spdif_rx2: spdif-rx@fde18000 {
+		compatible = "rockchip,rk3588-spdifrx", "rockchip,rk3308-spdifrx";
+		reg = <0x0 0xfde18000 0x0 0x1000>;
+		interrupts = <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru MCLK_SPDIFRX2>, <&cru HCLK_SPDIFRX2>;
+		clock-names = "mclk", "hclk";
+		dmas = <&dmac0 23>;
+		dma-names = "rx";
+		resets = <&cru SRST_M_SPDIFRX2>;
+		reset-names = "spdifrx-m";
+		#sound-dai-cells = <0>;
+		status = "disabled";
+	};
+
+	edp1: edp@fded0000 {
+		compatible = "rockchip,rk3588-edp";
+		reg = <0x0 0xfded0000 0x0 0x1000>;
+		interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru CLK_EDP1_24M>, <&cru PCLK_EDP1>,
+			 <&cru CLK_EDP1_200M>;
+		clock-names = "dp", "pclk", "spdif";
+		resets = <&cru SRST_EDP1_24M>, <&cru SRST_P_EDP1>;
+		reset-names = "dp", "apb";
+		phys = <&hdptxphy1>;
+		phy-names = "dp";
+		power-domains = <&power RK3588_PD_VO1>;
+		rockchip,grf = <&vo1_grf>;
+		status = "disabled";
+	};
+
+	pcie3x4: pcie@fe150000 {
+		compatible = "rockchip,rk3588-pcie", "snps,dw-pcie";
+		#address-cells = <3>;
+		#size-cells = <2>;
+		bus-range = <0x00 0x0f>;
+		clocks = <&cru ACLK_PCIE_4L_MSTR>, <&cru ACLK_PCIE_4L_SLV>,
+			 <&cru ACLK_PCIE_4L_DBI>, <&cru PCLK_PCIE_4L>,
+			 <&cru CLK_PCIE_AUX0>;
+		clock-names = "aclk_mst", "aclk_slv",
+			      "aclk_dbi", "pclk", "aux";
+		device_type = "pci";
+		interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "sys", "pmc", "msg", "legacy", "err";
+		#interrupt-cells = <1>;
+		interrupt-map-mask = <0 0 0 7>;
+		interrupt-map = <0 0 0 1 &pcie3x4_intc 0>,
+				<0 0 0 2 &pcie3x4_intc 1>,
+				<0 0 0 3 &pcie3x4_intc 2>,
+				<0 0 0 4 &pcie3x4_intc 3>;
+		linux,pci-domain = <0>;
+		num-ib-windows = <16>;
+		num-ob-windows = <16>;
+		max-link-speed = <3>;
+		msi-map = <0x0000 &its 0x0000 0x1000>;
+		num-lanes = <4>;
+		phys = <&pcie30phy>;
+		phy-names = "pcie-phy";
+		power-domains = <&power RK3588_PD_PCIE>;
+		ranges = <0x00000800 0x0 0x80000000 0x9 0x00000000 0x0 0x800000
+			  0x81000000 0x0 0x80800000 0x9 0x00800000 0x0 0x100000
+			  0x83000000 0x0 0x80900000 0x9 0x00900000 0x0 0x3f700000>;
+		reg = <0xa 0x40000000 0x0 0x400000>,
+		      <0x0 0xfe150000 0x0 0x10000>;
+		reg-names = "pcie-dbi", "pcie-apb";
+		resets = <&cru SRST_PCIE0_POWER_UP>;
+		reset-names = "pipe";
+		status = "disabled";
+
+		pcie3x4_intc: legacy-interrupt-controller {
+			interrupt-controller;
+			#address-cells = <0>;
+			#interrupt-cells = <1>;
+			interrupt-parent = <&gic>;
+			interrupts = <GIC_SPI 260 IRQ_TYPE_EDGE_RISING>;
+		};
+	};
+
+	pcie3x2: pcie@fe160000 {
+		compatible = "rockchip,rk3588-pcie", "snps,dw-pcie";
+		#address-cells = <3>;
+		#size-cells = <2>;
+		bus-range = <0x10 0x1f>;
+		clocks = <&cru ACLK_PCIE_2L_MSTR>, <&cru ACLK_PCIE_2L_SLV>,
+			 <&cru ACLK_PCIE_2L_DBI>, <&cru PCLK_PCIE_2L>,
+			 <&cru CLK_PCIE_AUX1>;
+		clock-names = "aclk_mst", "aclk_slv",
+			      "aclk_dbi", "pclk", "aux";
+		device_type = "pci";
+		interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "sys", "pmc", "msg", "legacy", "err";
+		#interrupt-cells = <1>;
+		interrupt-map-mask = <0 0 0 7>;
+		interrupt-map = <0 0 0 1 &pcie3x2_intc 0>,
+				<0 0 0 2 &pcie3x2_intc 1>,
+				<0 0 0 3 &pcie3x2_intc 2>,
+				<0 0 0 4 &pcie3x2_intc 3>;
+		linux,pci-domain = <1>;
+		num-ib-windows = <16>;
+		num-ob-windows = <16>;
+		max-link-speed = <3>;
+		msi-map = <0x1000 &its 0x1000 0x1000>;
+		num-lanes = <2>;
+		phys = <&pcie30phy>;
+		phy-names = "pcie-phy";
+		power-domains = <&power RK3588_PD_PHP>;
+		ranges = <0x00000800 0x0 0x80000000 0x9 0x40000000 0x0 0x800000
+			  0x81000000 0x0 0x80800000 0x9 0x40800000 0x0 0x100000
+			  0x83000000 0x0 0x80900000 0x9 0x40900000 0x0 0x3f700000>;
+		reg = <0xa 0x40400000 0x0 0x400000>,
+		      <0x0 0xfe160000 0x0 0x10000>;
+		reg-names = "pcie-dbi", "pcie-apb";
+		resets = <&cru SRST_PCIE1_POWER_UP>;
+		reset-names = "pipe";
+		status = "disabled";
+
+		pcie3x2_intc: legacy-interrupt-controller {
+			interrupt-controller;
+			#address-cells = <0>;
+			#interrupt-cells = <1>;
+			interrupt-parent = <&gic>;
+			interrupts = <GIC_SPI 255 IRQ_TYPE_EDGE_RISING>;
+		};
+	};
+
+	pcie2x1l0: pcie@fe170000 {
+		compatible = "rockchip,rk3588-pcie", "snps,dw-pcie";
+		#address-cells = <3>;
+		#size-cells = <2>;
+		bus-range = <0x20 0x2f>;
+		clocks = <&cru ACLK_PCIE_1L0_MSTR>, <&cru ACLK_PCIE_1L0_SLV>,
+			 <&cru ACLK_PCIE_1L0_DBI>, <&cru PCLK_PCIE_1L0>,
+			 <&cru CLK_PCIE_AUX2>;
+		clock-names = "aclk_mst", "aclk_slv",
+			      "aclk_dbi", "pclk", "aux";
+		device_type = "pci";
+		interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "sys", "pmc", "msg", "legacy", "err";
+		#interrupt-cells = <1>;
+		interrupt-map-mask = <0 0 0 7>;
+		interrupt-map = <0 0 0 1 &pcie2x1l0_intc 0>,
+				<0 0 0 2 &pcie2x1l0_intc 1>,
+				<0 0 0 3 &pcie2x1l0_intc 2>,
+				<0 0 0 4 &pcie2x1l0_intc 3>;
+		linux,pci-domain = <2>;
+		num-ib-windows = <8>;
+		num-ob-windows = <8>;
+		max-link-speed = <2>;
+		msi-map = <0x2000 &its 0x2000 0x1000>;
+		num-lanes = <1>;
+		phys = <&combphy1_ps PHY_TYPE_PCIE>;
+		phy-names = "pcie-phy";
+		power-domains = <&power RK3588_PD_PHP>;
+		ranges = <0x00000800 0x0 0x80000000 0x9 0x80000000 0x0 0x800000
+			  0x81000000 0x0 0x80800000 0x9 0x80800000 0x0 0x100000
+			  0x83000000 0x0 0x80900000 0x9 0x80900000 0x0 0x3f700000>;
+		reg = <0xa 0x40800000 0x0 0x400000>,
+		      <0x0 0xfe170000 0x0 0x10000>;
+		reg-names = "pcie-dbi", "pcie-apb";
+		resets = <&cru SRST_PCIE2_POWER_UP>;
+		reset-names = "pipe";
+		status = "disabled";
+
+		pcie2x1l0_intc: legacy-interrupt-controller {
+			interrupt-controller;
+			#address-cells = <0>;
+			#interrupt-cells = <1>;
+			interrupt-parent = <&gic>;
+			interrupts = <GIC_SPI 240 IRQ_TYPE_EDGE_RISING>;
+		};
+	};
+
+	gmac0: ethernet@fe1b0000 {
+		compatible = "rockchip,rk3588-gmac", "snps,dwmac-4.20a";
+		reg = <0x0 0xfe1b0000 0x0 0x10000>;
+		interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "macirq", "eth_wake_irq";
+		rockchip,grf = <&sys_grf>;
+		rockchip,php_grf = <&php_grf>;
+		clocks = <&cru CLK_GMAC0>, <&cru ACLK_GMAC0>,
+			 <&cru PCLK_GMAC0>, <&cru CLK_GMAC0_PTP_REF>;
+		clock-names = "stmmaceth", "aclk_mac",
+			      "pclk_mac", "ptp_ref";
+		resets = <&cru SRST_A_GMAC0>;
+		reset-names = "stmmaceth";
+
+		snps,mixed-burst;
+		snps,tso;
+
+		snps,axi-config = <&gmac0_stmmac_axi_setup>;
+		snps,mtl-rx-config = <&gmac0_mtl_rx_setup>;
+		snps,mtl-tx-config = <&gmac0_mtl_tx_setup>;
+		status = "disabled";
+
+		mdio0: mdio {
+			compatible = "snps,dwmac-mdio";
+			#address-cells = <0x1>;
+			#size-cells = <0x0>;
+		};
+
+		gmac0_stmmac_axi_setup: stmmac-axi-config {
+			snps,wr_osr_lmt = <4>;
+			snps,rd_osr_lmt = <8>;
+			snps,blen = <0 0 0 0 16 8 4>;
+		};
+
+		gmac0_mtl_rx_setup: rx-queues-config {
+			snps,rx-queues-to-use = <2>;
+			queue0 {};
+			queue1 {};
+		};
+
+		gmac0_mtl_tx_setup: tx-queues-config {
+			snps,tx-queues-to-use = <2>;
+			queue0 {};
+			queue1 {};
+		};
+	};
+
+	sata1: sata@fe220000 {
+		compatible = "snps,dwc-ahci";
+		reg = <0 0xfe220000 0 0x1000>;
+		clocks = <&cru ACLK_SATA1>, <&cru CLK_PMALIVE1>,
+			 <&cru CLK_RXOOB1>, <&cru CLK_PIPEPHY1_REF>;
+		clock-names = "sata", "pmalive", "rxoob", "ref";
+		interrupts = <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "hostc";
+		phys = <&combphy1_ps PHY_TYPE_SATA>;
+		phy-names = "sata-phy";
+		ports-implemented = <0x1>;
+		power-domains = <&power RK3588_PD_PHP>;
+		status = "disabled";
+	};
+
+	crypto: crypto@fe370000 {
+		compatible = "rockchip,rk3588-crypto";
+		reg = <0x0 0xfe370000 0x0 0x4000>;
+		clocks = <&scmi_clk SCMI_CRYPTO_CORE>, <&scmi_clk SCMI_CRYPTO_PKA>;
+		clock-names = "sclk_crypto", "apkclk_crypto";
+		clock-frequency = <350000000>, <350000000>;
+		status = "disabled";
+	};
+
+	rng: rng@fe378000 {
+		compatible = "rockchip,trngv1";
+		reg = <0x0 0xfe378000 0x0 0x200>;
+		status = "disabled";
+	};
+
+	hdptxphy1: phy@fed70000 {
+		compatible = "rockchip,rk3588-hdptx-phy";
+		reg = <0x0 0xfed70000 0x0 0x2000>;
+		clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>, <&cru PCLK_HDPTX1>;
+		clock-names = "ref", "apb";
+		resets = <&cru SRST_HDPTX1>, <&cru SRST_P_HDPTX1>,
+			 <&cru SRST_HDPTX1_INIT>, <&cru SRST_HDPTX1_CMN>,
+			 <&cru SRST_HDPTX1_LANE>, <&cru SRST_HDPTX1_ROPLL>,
+			 <&cru SRST_HDPTX1_LCPLL>;
+		reset-names = "phy", "apb", "init", "cmn", "lane", "ropll",
+			      "lcpll";
+		rockchip,grf = <&hdptxphy1_grf>;
+		#phy-cells = <0>;
+		status = "disabled";
+	};
+
+	usbdp_phy1: phy@fed90000 {
+		compatible = "rockchip,rk3588-usbdp-phy";
+		reg = <0x0 0xfed90000 0x0 0x10000>;
+		rockchip,usb-grf = <&usb_grf>;
+		rockchip,usbdpphy-grf = <&usbdpphy1_grf>;
+		rockchip,vo-grf = <&vo0_grf>;
+		clocks = <&cru CLK_USBDPPHY_MIPIDCPPHY_REF>,
+			 <&cru CLK_USBDP_PHY1_IMMORTAL>,
+			 <&cru PCLK_USBDPPHY1>;
+		clock-names = "refclk", "immortal", "pclk";
+		resets = <&cru SRST_USBDP_COMBO_PHY1_INIT>,
+			 <&cru SRST_USBDP_COMBO_PHY1_CMN>,
+			 <&cru SRST_USBDP_COMBO_PHY1_LANE>,
+			 <&cru SRST_USBDP_COMBO_PHY1_PCS>,
+			 <&cru SRST_P_USBDPPHY1>;
+		reset-names = "init", "cmn", "lane", "pcs_apb", "pma_apb";
+		status = "disabled";
+
+		usbdp_phy1_dp: dp-port {
+			#phy-cells = <0>;
+			status = "disabled";
+		};
+
+		usbdp_phy1_u3: u3-port {
+			#phy-cells = <0>;
+			status = "disabled";
+		};
+	};
+
+	combphy1_ps: phy@fee10000 {
+		compatible = "rockchip,rk3588-naneng-combphy";
+		reg = <0x0 0xfee10000 0x0 0x100>;
+		#phy-cells = <1>;
+		clocks = <&cru CLK_REF_PIPE_PHY1>, <&cru PCLK_PCIE_COMBO_PIPE_PHY1>;
+		clock-names = "refclk", "apbclk";
+		assigned-clocks = <&cru CLK_REF_PIPE_PHY1>;
+		assigned-clock-rates = <100000000>;
+		resets = <&cru SRST_P_PCIE2_PHY1>, <&cru SRST_REF_PIPE_PHY1>;
+		reset-names = "combphy-apb", "combphy";
+		rockchip,pipe-grf = <&php_grf>;
+		rockchip,pipe-phy-grf = <&pipe_phy1_grf>;
+		rockchip,pcie1ln-sel-bits = <0x100 0 0 0>;
+		status = "disabled";
+	};
+
+	pcie30phy: phy@fee80000 {
+		compatible = "rockchip,rk3588-pcie3-phy";
+		reg = <0x0 0xfee80000 0x0 0x20000>;
+		#phy-cells = <0>;
+		clocks = <&cru PCLK_PCIE_COMBO_PIPE_PHY>;
+		clock-names = "pclk";
+		resets = <&cru SRST_PCIE30_PHY>;
+		reset-names = "phy";
+		rockchip,pipe-grf = <&php_grf>;
+		rockchip,phy-grf = <&pcie30_phy_grf>;
+		status = "disabled";
+	};
+
+};
diff --git a/arch/arm/dts/rk3588s-pinctrl.dtsi b/arch/arm/dts/rk3588s-pinctrl.dtsi
new file mode 100644
index 0000000000..64453012a8
--- /dev/null
+++ b/arch/arm/dts/rk3588s-pinctrl.dtsi
@@ -0,0 +1,3009 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
+ */
+
+#include <dt-bindings/pinctrl/rockchip.h>
+#include "rockchip-pinconf.dtsi"
+
+/*
+ * This file is auto generated by pin2dts tool, please keep these code
+ * by adding changes at end of this file.
+ */
+&pinctrl {
+	auddsm {
+		auddsm_pins: auddsm-pins {
+			rockchip,pins =
+				/* auddsm_ln */
+				<3 RK_PA1 4 &pcfg_pull_none>,
+				/* auddsm_lp */
+				<3 RK_PA2 4 &pcfg_pull_none>,
+				/* auddsm_rn */
+				<3 RK_PA3 4 &pcfg_pull_none>,
+				/* auddsm_rp */
+				<3 RK_PA4 4 &pcfg_pull_none>;
+		};
+	};
+
+	bt1120 {
+		bt1120_pins: bt1120-pins {
+			rockchip,pins =
+				/* bt1120_clkout */
+				<4 RK_PB0 2 &pcfg_pull_none>,
+				/* bt1120_d0 */
+				<4 RK_PA0 2 &pcfg_pull_none>,
+				/* bt1120_d1 */
+				<4 RK_PA1 2 &pcfg_pull_none>,
+				/* bt1120_d2 */
+				<4 RK_PA2 2 &pcfg_pull_none>,
+				/* bt1120_d3 */
+				<4 RK_PA3 2 &pcfg_pull_none>,
+				/* bt1120_d4 */
+				<4 RK_PA4 2 &pcfg_pull_none>,
+				/* bt1120_d5 */
+				<4 RK_PA5 2 &pcfg_pull_none>,
+				/* bt1120_d6 */
+				<4 RK_PA6 2 &pcfg_pull_none>,
+				/* bt1120_d7 */
+				<4 RK_PA7 2 &pcfg_pull_none>,
+				/* bt1120_d8 */
+				<4 RK_PB2 2 &pcfg_pull_none>,
+				/* bt1120_d9 */
+				<4 RK_PB3 2 &pcfg_pull_none>,
+				/* bt1120_d10 */
+				<4 RK_PB4 2 &pcfg_pull_none>,
+				/* bt1120_d11 */
+				<4 RK_PB5 2 &pcfg_pull_none>,
+				/* bt1120_d12 */
+				<4 RK_PB6 2 &pcfg_pull_none>,
+				/* bt1120_d13 */
+				<4 RK_PB7 2 &pcfg_pull_none>,
+				/* bt1120_d14 */
+				<4 RK_PC0 2 &pcfg_pull_none>,
+				/* bt1120_d15 */
+				<4 RK_PC1 2 &pcfg_pull_none>;
+		};
+	};
+
+	can0 {
+		can0m0_pins: can0m0-pins {
+			rockchip,pins =
+				/* can0_rx_m0 */
+				<0 RK_PC0 11 &pcfg_pull_none>,
+				/* can0_tx_m0 */
+				<0 RK_PB7 11 &pcfg_pull_none>;
+		};
+
+		can0m1_pins: can0m1-pins {
+			rockchip,pins =
+				/* can0_rx_m1 */
+				<4 RK_PD5 9 &pcfg_pull_none>,
+				/* can0_tx_m1 */
+				<4 RK_PD4 9 &pcfg_pull_none>;
+		};
+	};
+
+	can1 {
+		can1m0_pins: can1m0-pins {
+			rockchip,pins =
+				/* can1_rx_m0 */
+				<3 RK_PB5 9 &pcfg_pull_none>,
+				/* can1_tx_m0 */
+				<3 RK_PB6 9 &pcfg_pull_none>;
+		};
+
+		can1m1_pins: can1m1-pins {
+			rockchip,pins =
+				/* can1_rx_m1 */
+				<4 RK_PB2 12 &pcfg_pull_none>,
+				/* can1_tx_m1 */
+				<4 RK_PB3 12 &pcfg_pull_none>;
+		};
+	};
+
+	can2 {
+		can2m0_pins: can2m0-pins {
+			rockchip,pins =
+				/* can2_rx_m0 */
+				<3 RK_PC4 9 &pcfg_pull_none>,
+				/* can2_tx_m0 */
+				<3 RK_PC5 9 &pcfg_pull_none>;
+		};
+
+		can2m1_pins: can2m1-pins {
+			rockchip,pins =
+				/* can2_rx_m1 */
+				<0 RK_PD4 10 &pcfg_pull_none>,
+				/* can2_tx_m1 */
+				<0 RK_PD5 10 &pcfg_pull_none>;
+		};
+	};
+
+	cif {
+		cif_clk: cif-clk {
+			rockchip,pins =
+				/* cif_clkout */
+				<4 RK_PB4 1 &pcfg_pull_none>;
+		};
+
+		cif_dvp_clk: cif-dvp-clk {
+			rockchip,pins =
+				/* cif_clkin */
+				<4 RK_PB0 1 &pcfg_pull_none>,
+				/* cif_href */
+				<4 RK_PB2 1 &pcfg_pull_none>,
+				/* cif_vsync */
+				<4 RK_PB3 1 &pcfg_pull_none>;
+		};
+
+		cif_dvp_bus16: cif-dvp-bus16 {
+			rockchip,pins =
+				/* cif_d8 */
+				<3 RK_PC4 1 &pcfg_pull_none>,
+				/* cif_d9 */
+				<3 RK_PC5 1 &pcfg_pull_none>,
+				/* cif_d10 */
+				<3 RK_PC6 1 &pcfg_pull_none>,
+				/* cif_d11 */
+				<3 RK_PC7 1 &pcfg_pull_none>,
+				/* cif_d12 */
+				<3 RK_PD0 1 &pcfg_pull_none>,
+				/* cif_d13 */
+				<3 RK_PD1 1 &pcfg_pull_none>,
+				/* cif_d14 */
+				<3 RK_PD2 1 &pcfg_pull_none>,
+				/* cif_d15 */
+				<3 RK_PD3 1 &pcfg_pull_none>;
+		};
+
+		cif_dvp_bus8: cif-dvp-bus8 {
+			rockchip,pins =
+				/* cif_d0 */
+				<4 RK_PA0 1 &pcfg_pull_none>,
+				/* cif_d1 */
+				<4 RK_PA1 1 &pcfg_pull_none>,
+				/* cif_d2 */
+				<4 RK_PA2 1 &pcfg_pull_none>,
+				/* cif_d3 */
+				<4 RK_PA3 1 &pcfg_pull_none>,
+				/* cif_d4 */
+				<4 RK_PA4 1 &pcfg_pull_none>,
+				/* cif_d5 */
+				<4 RK_PA5 1 &pcfg_pull_none>,
+				/* cif_d6 */
+				<4 RK_PA6 1 &pcfg_pull_none>,
+				/* cif_d7 */
+				<4 RK_PA7 1 &pcfg_pull_none>;
+		};
+	};
+
+	clk32k {
+		clk32k_in: clk32k-in {
+			rockchip,pins =
+				/* clk32k_in */
+				<0 RK_PB2 1 &pcfg_pull_none>;
+		};
+
+		clk32k_out0: clk32k-out0 {
+			rockchip,pins =
+				/* clk32k_out0 */
+				<0 RK_PB2 2 &pcfg_pull_none>;
+		};
+	};
+
+	cpu {
+		cpu_pins: cpu-pins {
+			rockchip,pins =
+				/* cpu_big0_avs */
+				<0 RK_PD1 2 &pcfg_pull_none>,
+				/* cpu_big1_avs */
+				<0 RK_PD5 2 &pcfg_pull_none>;
+		};
+	};
+
+	ddrphych0 {
+		ddrphych0_pins: ddrphych0-pins {
+			rockchip,pins =
+				/* ddrphych0_dtb0 */
+				<4 RK_PA0 7 &pcfg_pull_none>,
+				/* ddrphych0_dtb1 */
+				<4 RK_PA1 7 &pcfg_pull_none>,
+				/* ddrphych0_dtb2 */
+				<4 RK_PA2 7 &pcfg_pull_none>,
+				/* ddrphych0_dtb3 */
+				<4 RK_PA3 7 &pcfg_pull_none>;
+		};
+	};
+
+	ddrphych1 {
+		ddrphych1_pins: ddrphych1-pins {
+			rockchip,pins =
+				/* ddrphych1_dtb0 */
+				<4 RK_PA4 7 &pcfg_pull_none>,
+				/* ddrphych1_dtb1 */
+				<4 RK_PA5 7 &pcfg_pull_none>,
+				/* ddrphych1_dtb2 */
+				<4 RK_PA6 7 &pcfg_pull_none>,
+				/* ddrphych1_dtb3 */
+				<4 RK_PA7 7 &pcfg_pull_none>;
+		};
+	};
+
+	ddrphych2 {
+		ddrphych2_pins: ddrphych2-pins {
+			rockchip,pins =
+				/* ddrphych2_dtb0 */
+				<4 RK_PB0 7 &pcfg_pull_none>,
+				/* ddrphych2_dtb1 */
+				<4 RK_PB1 7 &pcfg_pull_none>,
+				/* ddrphych2_dtb2 */
+				<4 RK_PB2 7 &pcfg_pull_none>,
+				/* ddrphych2_dtb3 */
+				<4 RK_PB3 7 &pcfg_pull_none>;
+		};
+	};
+
+	ddrphych3 {
+		ddrphych3_pins: ddrphych3-pins {
+			rockchip,pins =
+				/* ddrphych3_dtb0 */
+				<4 RK_PB4 7 &pcfg_pull_none>,
+				/* ddrphych3_dtb1 */
+				<4 RK_PB5 7 &pcfg_pull_none>,
+				/* ddrphych3_dtb2 */
+				<4 RK_PB6 7 &pcfg_pull_none>,
+				/* ddrphych3_dtb3 */
+				<4 RK_PB7 7 &pcfg_pull_none>;
+		};
+	};
+
+	dp0 {
+		dp0m0_pins: dp0m0-pins {
+			rockchip,pins =
+				/* dp0_hpdin_m0 */
+				<4 RK_PB4 5 &pcfg_pull_none>;
+		};
+
+		dp0m1_pins: dp0m1-pins {
+			rockchip,pins =
+				/* dp0_hpdin_m1 */
+				<0 RK_PC4 10 &pcfg_pull_none>;
+		};
+
+		dp0m2_pins: dp0m2-pins {
+			rockchip,pins =
+				/* dp0_hpdin_m2 */
+				<1 RK_PA0 5 &pcfg_pull_none>;
+		};
+	};
+
+	dp1 {
+		dp1m0_pins: dp1m0-pins {
+			rockchip,pins =
+				/* dp1_hpdin_m0 */
+				<3 RK_PD5 5 &pcfg_pull_none>;
+		};
+
+		dp1m1_pins: dp1m1-pins {
+			rockchip,pins =
+				/* dp1_hpdin_m1 */
+				<0 RK_PC5 10 &pcfg_pull_none>;
+		};
+
+		dp1m2_pins: dp1m2-pins {
+			rockchip,pins =
+				/* dp1_hpdin_m2 */
+				<1 RK_PA1 5 &pcfg_pull_none>;
+		};
+	};
+
+	emmc {
+		emmc_rstnout: emmc-rstnout {
+			rockchip,pins =
+				/* emmc_rstn */
+				<2 RK_PA3 1 &pcfg_pull_none>;
+		};
+
+		emmc_bus8: emmc-bus8 {
+			rockchip,pins =
+				/* emmc_d0 */
+				<2 RK_PD0 1 &pcfg_pull_up_drv_level_2>,
+				/* emmc_d1 */
+				<2 RK_PD1 1 &pcfg_pull_up_drv_level_2>,
+				/* emmc_d2 */
+				<2 RK_PD2 1 &pcfg_pull_up_drv_level_2>,
+				/* emmc_d3 */
+				<2 RK_PD3 1 &pcfg_pull_up_drv_level_2>,
+				/* emmc_d4 */
+				<2 RK_PD4 1 &pcfg_pull_up_drv_level_2>,
+				/* emmc_d5 */
+				<2 RK_PD5 1 &pcfg_pull_up_drv_level_2>,
+				/* emmc_d6 */
+				<2 RK_PD6 1 &pcfg_pull_up_drv_level_2>,
+				/* emmc_d7 */
+				<2 RK_PD7 1 &pcfg_pull_up_drv_level_2>;
+		};
+
+		emmc_clk: emmc-clk {
+			rockchip,pins =
+				/* emmc_clkout */
+				<2 RK_PA1 1 &pcfg_pull_up_drv_level_2>;
+		};
+
+		emmc_cmd: emmc-cmd {
+			rockchip,pins =
+				/* emmc_cmd */
+				<2 RK_PA0 1 &pcfg_pull_up_drv_level_2>;
+		};
+
+		emmc_data_strobe: emmc-data-strobe {
+			rockchip,pins =
+				/* emmc_data_strobe */
+				<2 RK_PA2 1 &pcfg_pull_none>;
+		};
+	};
+
+	eth1 {
+		eth1_pins: eth1-pins {
+			rockchip,pins =
+				/* eth1_refclko_25m */
+				<3 RK_PA6 1 &pcfg_pull_none>;
+		};
+	};
+
+	fspi {
+		fspim0_pins: fspim0-pins {
+			rockchip,pins =
+				/* fspi_clk_m0 */
+				<2 RK_PA0 2 &pcfg_pull_none>,
+				/* fspi_cs0n_m0 */
+				<2 RK_PD6 2 &pcfg_pull_none>,
+				/* fspi_d0_m0 */
+				<2 RK_PD0 2 &pcfg_pull_none>,
+				/* fspi_d1_m0 */
+				<2 RK_PD1 2 &pcfg_pull_none>,
+				/* fspi_d2_m0 */
+				<2 RK_PD2 2 &pcfg_pull_none>,
+				/* fspi_d3_m0 */
+				<2 RK_PD3 2 &pcfg_pull_none>;
+		};
+
+		fspim0_cs1: fspim0-cs1 {
+			rockchip,pins =
+				/* fspi_cs1n_m0 */
+				<2 RK_PD7 2 &pcfg_pull_up>;
+		};
+
+		fspim2_pins: fspim2-pins {
+			rockchip,pins =
+				/* fspi_clk_m2 */
+				<3 RK_PA5 5 &pcfg_pull_none>,
+				/* fspi_cs0n_m2 */
+				<3 RK_PC4 2 &pcfg_pull_none>,
+				/* fspi_d0_m2 */
+				<3 RK_PA0 5 &pcfg_pull_none>,
+				/* fspi_d1_m2 */
+				<3 RK_PA1 5 &pcfg_pull_none>,
+				/* fspi_d2_m2 */
+				<3 RK_PA2 5 &pcfg_pull_none>,
+				/* fspi_d3_m2 */
+				<3 RK_PA3 5 &pcfg_pull_none>;
+		};
+
+		fspim2_cs1: fspim2-cs1 {
+			rockchip,pins =
+				/* fspi_cs1n_m2 */
+				<3 RK_PC5 2 &pcfg_pull_up>;
+		};
+	};
+
+	gmac1 {
+		gmac1_miim: gmac1-miim {
+			rockchip,pins =
+				/* gmac1_mdc */
+				<3 RK_PC2 1 &pcfg_pull_none>,
+				/* gmac1_mdio */
+				<3 RK_PC3 1 &pcfg_pull_none>;
+		};
+
+		gmac1_clkinout: gmac1-clkinout {
+			rockchip,pins =
+				/* gmac1_mclkinout */
+				<3 RK_PB6 1 &pcfg_pull_none>;
+		};
+
+		gmac1_rx_bus2: gmac1-rx-bus2 {
+			rockchip,pins =
+				/* gmac1_rxd0 */
+				<3 RK_PA7 1 &pcfg_pull_none>,
+				/* gmac1_rxd1 */
+				<3 RK_PB0 1 &pcfg_pull_none>,
+				/* gmac1_rxdv_crs */
+				<3 RK_PB1 1 &pcfg_pull_none>;
+		};
+
+		gmac1_tx_bus2: gmac1-tx-bus2 {
+			rockchip,pins =
+				/* gmac1_txd0 */
+				<3 RK_PB3 1 &pcfg_pull_none>,
+				/* gmac1_txd1 */
+				<3 RK_PB4 1 &pcfg_pull_none>,
+				/* gmac1_txen */
+				<3 RK_PB5 1 &pcfg_pull_none>;
+		};
+
+		gmac1_rgmii_clk: gmac1-rgmii-clk {
+			rockchip,pins =
+				/* gmac1_rxclk */
+				<3 RK_PA5 1 &pcfg_pull_none>,
+				/* gmac1_txclk */
+				<3 RK_PA4 1 &pcfg_pull_none>;
+		};
+
+		gmac1_rgmii_bus: gmac1-rgmii-bus {
+			rockchip,pins =
+				/* gmac1_rxd2 */
+				<3 RK_PA2 1 &pcfg_pull_none>,
+				/* gmac1_rxd3 */
+				<3 RK_PA3 1 &pcfg_pull_none>,
+				/* gmac1_txd2 */
+				<3 RK_PA0 1 &pcfg_pull_none>,
+				/* gmac1_txd3 */
+				<3 RK_PA1 1 &pcfg_pull_none>;
+		};
+
+		gmac1_ppsclk: gmac1-ppsclk {
+			rockchip,pins =
+				/* gmac1_ppsclk */
+				<3 RK_PC1 1 &pcfg_pull_none>;
+		};
+
+		gmac1_ppstrig: gmac1-ppstrig {
+			rockchip,pins =
+				/* gmac1_ppstrig */
+				<3 RK_PC0 1 &pcfg_pull_none>;
+		};
+
+		gmac1_ptp_ref_clk: gmac1-ptp-ref-clk {
+			rockchip,pins =
+				/* gmac1_ptp_ref_clk */
+				<3 RK_PB7 1 &pcfg_pull_none>;
+		};
+
+		gmac1_txer: gmac1-txer {
+			rockchip,pins =
+				/* gmac1_txer */
+				<3 RK_PB2 1 &pcfg_pull_none>;
+		};
+	};
+
+	gpu {
+		gpu_pins: gpu-pins {
+			rockchip,pins =
+				/* gpu_avs */
+				<0 RK_PC5 2 &pcfg_pull_none>;
+		};
+	};
+
+	hdmi {
+		hdmim0_pins: hdmim0-pins {
+			rockchip,pins =
+				/* hdmi_rx_cec_m0 */
+				<4 RK_PB5 5 &pcfg_pull_none>,
+				/* hdmi_rx_hpdin_m0 */
+				<4 RK_PB6 5 &pcfg_pull_none>,
+				/* hdmi_rx_scl_m0 */
+				<0 RK_PD2 11 &pcfg_pull_none>,
+				/* hdmi_rx_sda_m0 */
+				<0 RK_PD1 11 &pcfg_pull_none>,
+				/* hdmi_tx0_cec_m0 */
+				<4 RK_PC1 5 &pcfg_pull_none>,
+				/* hdmi_tx0_hpd_m0 */
+				<1 RK_PA5 5 &pcfg_pull_none>,
+				/* hdmi_tx0_scl_m0 */
+				<4 RK_PB7 5 &pcfg_pull_none>,
+				/* hdmi_tx0_sda_m0 */
+				<4 RK_PC0 5 &pcfg_pull_none>,
+				/* hdmi_tx1_hpd_m0 */
+				<1 RK_PA6 5 &pcfg_pull_none>;
+		};
+
+		hdmim1_pins: hdmim1-pins {
+			rockchip,pins =
+				/* hdmi_rx_cec_m1 */
+				<3 RK_PD1 5 &pcfg_pull_none>,
+				/* hdmi_rx_hpdin_m1 */
+				<3 RK_PD4 5 &pcfg_pull_none>,
+				/* hdmi_rx_scl_m1 */
+				<3 RK_PD2 5 &pcfg_pull_none>,
+				/* hdmi_rx_sda_m1 */
+				<3 RK_PD3 5 &pcfg_pull_none>,
+				/* hdmi_tx0_cec_m1 */
+				<0 RK_PD1 13 &pcfg_pull_none>,
+				/* hdmi_tx0_hpd_m1 */
+				<3 RK_PD4 3 &pcfg_pull_none>,
+				/* hdmi_tx0_scl_m1 */
+				<0 RK_PD5 11 &pcfg_pull_none>,
+				/* hdmi_tx0_sda_m1 */
+				<0 RK_PD4 11 &pcfg_pull_none>,
+				/* hdmi_tx1_cec_m1 */
+				<0 RK_PD2 13 &pcfg_pull_none>,
+				/* hdmi_tx1_hpd_m1 */
+				<3 RK_PB7 5 &pcfg_pull_none>,
+				/* hdmi_tx1_scl_m1 */
+				<3 RK_PC6 5 &pcfg_pull_none>,
+				/* hdmi_tx1_sda_m1 */
+				<3 RK_PC5 5 &pcfg_pull_none>;
+		};
+
+		hdmim2_pins: hdmim2-pins {
+			rockchip,pins =
+				/* hdmi_rx_cec_m2 */
+				<1 RK_PB7 5 &pcfg_pull_none>,
+				/* hdmi_rx_hpdin_m2 */
+				<1 RK_PB6 5 &pcfg_pull_none>,
+				/* hdmi_rx_scl_m2 */
+				<1 RK_PD6 5 &pcfg_pull_none>,
+				/* hdmi_rx_sda_m2 */
+				<1 RK_PD7 5 &pcfg_pull_none>,
+				/* hdmi_tx0_scl_m2 */
+				<3 RK_PC7 5 &pcfg_pull_none>,
+				/* hdmi_tx0_sda_m2 */
+				<3 RK_PD0 5 &pcfg_pull_none>,
+				/* hdmi_tx1_cec_m2 */
+				<3 RK_PC4 5 &pcfg_pull_none>,
+				/* hdmi_tx1_scl_m2 */
+				<1 RK_PA4 5 &pcfg_pull_none>,
+				/* hdmi_tx1_sda_m2 */
+				<1 RK_PA3 5 &pcfg_pull_none>;
+		};
+
+		hdmi_debug0: hdmi-debug0 {
+			rockchip,pins =
+				/* hdmi_debug0 */
+				<1 RK_PA7 7 &pcfg_pull_none>;
+		};
+
+		hdmi_debug1: hdmi-debug1 {
+			rockchip,pins =
+				/* hdmi_debug1 */
+				<1 RK_PB0 7 &pcfg_pull_none>;
+		};
+
+		hdmi_debug2: hdmi-debug2 {
+			rockchip,pins =
+				/* hdmi_debug2 */
+				<1 RK_PB1 7 &pcfg_pull_none>;
+		};
+
+		hdmi_debug3: hdmi-debug3 {
+			rockchip,pins =
+				/* hdmi_debug3 */
+				<1 RK_PB2 7 &pcfg_pull_none>;
+		};
+
+		hdmi_debug4: hdmi-debug4 {
+			rockchip,pins =
+				/* hdmi_debug4 */
+				<1 RK_PB3 7 &pcfg_pull_none>;
+		};
+
+		hdmi_debug5: hdmi-debug5 {
+			rockchip,pins =
+				/* hdmi_debug5 */
+				<1 RK_PB4 7 &pcfg_pull_none>;
+		};
+
+		hdmi_debug6: hdmi-debug6 {
+			rockchip,pins =
+				/* hdmi_debug6 */
+				<1 RK_PA0 7 &pcfg_pull_none>;
+		};
+	};
+
+	i2c0 {
+		i2c0m0_xfer: i2c0m0-xfer {
+			rockchip,pins =
+				/* i2c0_scl_m0 */
+				<0 RK_PB3 2 &pcfg_pull_none_smt>,
+				/* i2c0_sda_m0 */
+				<0 RK_PA6 2 &pcfg_pull_none_smt>;
+		};
+
+		i2c0m2_xfer: i2c0m2-xfer {
+			rockchip,pins =
+				/* i2c0_scl_m2 */
+				<0 RK_PD1 3 &pcfg_pull_none_smt>,
+				/* i2c0_sda_m2 */
+				<0 RK_PD2 3 &pcfg_pull_none_smt>;
+		};
+	};
+
+	i2c1 {
+		i2c1m0_xfer: i2c1m0-xfer {
+			rockchip,pins =
+				/* i2c1_scl_m0 */
+				<0 RK_PB5 9 &pcfg_pull_none_smt>,
+				/* i2c1_sda_m0 */
+				<0 RK_PB6 9 &pcfg_pull_none_smt>;
+		};
+
+		i2c1m1_xfer: i2c1m1-xfer {
+			rockchip,pins =
+				/* i2c1_scl_m1 */
+				<0 RK_PB0 2 &pcfg_pull_none_smt>,
+				/* i2c1_sda_m1 */
+				<0 RK_PB1 2 &pcfg_pull_none_smt>;
+		};
+
+		i2c1m2_xfer: i2c1m2-xfer {
+			rockchip,pins =
+				/* i2c1_scl_m2 */
+				<0 RK_PD4 9 &pcfg_pull_none_smt>,
+				/* i2c1_sda_m2 */
+				<0 RK_PD5 9 &pcfg_pull_none_smt>;
+		};
+
+		i2c1m3_xfer: i2c1m3-xfer {
+			rockchip,pins =
+				/* i2c1_scl_m3 */
+				<2 RK_PD4 9 &pcfg_pull_none_smt>,
+				/* i2c1_sda_m3 */
+				<2 RK_PD5 9 &pcfg_pull_none_smt>;
+		};
+
+		i2c1m4_xfer: i2c1m4-xfer {
+			rockchip,pins =
+				/* i2c1_scl_m4 */
+				<1 RK_PD2 9 &pcfg_pull_none_smt>,
+				/* i2c1_sda_m4 */
+				<1 RK_PD3 9 &pcfg_pull_none_smt>;
+		};
+	};
+
+	i2c2 {
+		i2c2m0_xfer: i2c2m0-xfer {
+			rockchip,pins =
+				/* i2c2_scl_m0 */
+				<0 RK_PB7 9 &pcfg_pull_none_smt>,
+				/* i2c2_sda_m0 */
+				<0 RK_PC0 9 &pcfg_pull_none_smt>;
+		};
+
+		i2c2m2_xfer: i2c2m2-xfer {
+			rockchip,pins =
+				/* i2c2_scl_m2 */
+				<2 RK_PA3 9 &pcfg_pull_none_smt>,
+				/* i2c2_sda_m2 */
+				<2 RK_PA2 9 &pcfg_pull_none_smt>;
+		};
+
+		i2c2m3_xfer: i2c2m3-xfer {
+			rockchip,pins =
+				/* i2c2_scl_m3 */
+				<1 RK_PC5 9 &pcfg_pull_none_smt>,
+				/* i2c2_sda_m3 */
+				<1 RK_PC4 9 &pcfg_pull_none_smt>;
+		};
+
+		i2c2m4_xfer: i2c2m4-xfer {
+			rockchip,pins =
+				/* i2c2_scl_m4 */
+				<1 RK_PA1 9 &pcfg_pull_none_smt>,
+				/* i2c2_sda_m4 */
+				<1 RK_PA0 9 &pcfg_pull_none_smt>;
+		};
+	};
+
+	i2c3 {
+		i2c3m0_xfer: i2c3m0-xfer {
+			rockchip,pins =
+				/* i2c3_scl_m0 */
+				<1 RK_PC1 9 &pcfg_pull_none_smt>,
+				/* i2c3_sda_m0 */
+				<1 RK_PC0 9 &pcfg_pull_none_smt>;
+		};
+
+		i2c3m1_xfer: i2c3m1-xfer {
+			rockchip,pins =
+				/* i2c3_scl_m1 */
+				<3 RK_PB7 9 &pcfg_pull_none_smt>,
+				/* i2c3_sda_m1 */
+				<3 RK_PC0 9 &pcfg_pull_none_smt>;
+		};
+
+		i2c3m2_xfer: i2c3m2-xfer {
+			rockchip,pins =
+				/* i2c3_scl_m2 */
+				<4 RK_PA4 9 &pcfg_pull_none_smt>,
+				/* i2c3_sda_m2 */
+				<4 RK_PA5 9 &pcfg_pull_none_smt>;
+		};
+
+		i2c3m4_xfer: i2c3m4-xfer {
+			rockchip,pins =
+				/* i2c3_scl_m4 */
+				<4 RK_PD0 9 &pcfg_pull_none_smt>,
+				/* i2c3_sda_m4 */
+				<4 RK_PD1 9 &pcfg_pull_none_smt>;
+		};
+	};
+
+	i2c4 {
+		i2c4m0_xfer: i2c4m0-xfer {
+			rockchip,pins =
+				/* i2c4_scl_m0 */
+				<3 RK_PA6 9 &pcfg_pull_none_smt>,
+				/* i2c4_sda_m0 */
+				<3 RK_PA5 9 &pcfg_pull_none_smt>;
+		};
+
+		i2c4m2_xfer: i2c4m2-xfer {
+			rockchip,pins =
+				/* i2c4_scl_m2 */
+				<0 RK_PC5 9 &pcfg_pull_none_smt>,
+				/* i2c4_sda_m2 */
+				<0 RK_PC4 9 &pcfg_pull_none_smt>;
+		};
+
+		i2c4m3_xfer: i2c4m3-xfer {
+			rockchip,pins =
+				/* i2c4_scl_m3 */
+				<1 RK_PA3 9 &pcfg_pull_none_smt>,
+				/* i2c4_sda_m3 */
+				<1 RK_PA2 9 &pcfg_pull_none_smt>;
+		};
+
+		i2c4m4_xfer: i2c4m4-xfer {
+			rockchip,pins =
+				/* i2c4_scl_m4 */
+				<1 RK_PC7 9 &pcfg_pull_none_smt>,
+				/* i2c4_sda_m4 */
+				<1 RK_PC6 9 &pcfg_pull_none_smt>;
+		};
+	};
+
+	i2c5 {
+		i2c5m0_xfer: i2c5m0-xfer {
+			rockchip,pins =
+				/* i2c5_scl_m0 */
+				<3 RK_PC7 9 &pcfg_pull_none_smt>,
+				/* i2c5_sda_m0 */
+				<3 RK_PD0 9 &pcfg_pull_none_smt>;
+		};
+
+		i2c5m1_xfer: i2c5m1-xfer {
+			rockchip,pins =
+				/* i2c5_scl_m1 */
+				<4 RK_PB6 9 &pcfg_pull_none_smt>,
+				/* i2c5_sda_m1 */
+				<4 RK_PB7 9 &pcfg_pull_none_smt>;
+		};
+
+		i2c5m2_xfer: i2c5m2-xfer {
+			rockchip,pins =
+				/* i2c5_scl_m2 */
+				<4 RK_PA6 9 &pcfg_pull_none_smt>,
+				/* i2c5_sda_m2 */
+				<4 RK_PA7 9 &pcfg_pull_none_smt>;
+		};
+
+		i2c5m3_xfer: i2c5m3-xfer {
+			rockchip,pins =
+				/* i2c5_scl_m3 */
+				<1 RK_PB6 9 &pcfg_pull_none_smt>,
+				/* i2c5_sda_m3 */
+				<1 RK_PB7 9 &pcfg_pull_none_smt>;
+		};
+	};
+
+	i2c6 {
+		i2c6m0_xfer: i2c6m0-xfer {
+			rockchip,pins =
+				/* i2c6_scl_m0 */
+				<0 RK_PD0 9 &pcfg_pull_none_smt>,
+				/* i2c6_sda_m0 */
+				<0 RK_PC7 9 &pcfg_pull_none_smt>;
+		};
+
+		i2c6m1_xfer: i2c6m1-xfer {
+			rockchip,pins =
+				/* i2c6_scl_m1 */
+				<1 RK_PC3 9 &pcfg_pull_none_smt>,
+				/* i2c6_sda_m1 */
+				<1 RK_PC2 9 &pcfg_pull_none_smt>;
+		};
+
+		i2c6m3_xfer: i2c6m3-xfer {
+			rockchip,pins =
+				/* i2c6_scl_m3 */
+				<4 RK_PB1 9 &pcfg_pull_none_smt>,
+				/* i2c6_sda_m3 */
+				<4 RK_PB0 9 &pcfg_pull_none_smt>;
+		};
+
+		i2c6m4_xfer: i2c6m4-xfer {
+			rockchip,pins =
+				/* i2c6_scl_m4 */
+				<3 RK_PA1 9 &pcfg_pull_none_smt>,
+				/* i2c6_sda_m4 */
+				<3 RK_PA0 9 &pcfg_pull_none_smt>;
+		};
+	};
+
+	i2c7 {
+		i2c7m0_xfer: i2c7m0-xfer {
+			rockchip,pins =
+				/* i2c7_scl_m0 */
+				<1 RK_PD0 9 &pcfg_pull_none_smt>,
+				/* i2c7_sda_m0 */
+				<1 RK_PD1 9 &pcfg_pull_none_smt>;
+		};
+
+		i2c7m2_xfer: i2c7m2-xfer {
+			rockchip,pins =
+				/* i2c7_scl_m2 */
+				<3 RK_PD2 9 &pcfg_pull_none_smt>,
+				/* i2c7_sda_m2 */
+				<3 RK_PD3 9 &pcfg_pull_none_smt>;
+		};
+
+		i2c7m3_xfer: i2c7m3-xfer {
+			rockchip,pins =
+				/* i2c7_scl_m3 */
+				<4 RK_PB2 9 &pcfg_pull_none_smt>,
+				/* i2c7_sda_m3 */
+				<4 RK_PB3 9 &pcfg_pull_none_smt>;
+		};
+	};
+
+	i2c8 {
+		i2c8m0_xfer: i2c8m0-xfer {
+			rockchip,pins =
+				/* i2c8_scl_m0 */
+				<4 RK_PD2 9 &pcfg_pull_none_smt>,
+				/* i2c8_sda_m0 */
+				<4 RK_PD3 9 &pcfg_pull_none_smt>;
+		};
+
+		i2c8m2_xfer: i2c8m2-xfer {
+			rockchip,pins =
+				/* i2c8_scl_m2 */
+				<1 RK_PD6 9 &pcfg_pull_none_smt>,
+				/* i2c8_sda_m2 */
+				<1 RK_PD7 9 &pcfg_pull_none_smt>;
+		};
+
+		i2c8m3_xfer: i2c8m3-xfer {
+			rockchip,pins =
+				/* i2c8_scl_m3 */
+				<4 RK_PC0 9 &pcfg_pull_none_smt>,
+				/* i2c8_sda_m3 */
+				<4 RK_PC1 9 &pcfg_pull_none_smt>;
+		};
+
+		i2c8m4_xfer: i2c8m4-xfer {
+			rockchip,pins =
+				/* i2c8_scl_m4 */
+				<3 RK_PC2 9 &pcfg_pull_none_smt>,
+				/* i2c8_sda_m4 */
+				<3 RK_PC3 9 &pcfg_pull_none_smt>;
+		};
+	};
+
+	i2s0 {
+		i2s0_lrck: i2s0-lrck {
+			rockchip,pins =
+				/* i2s0_lrck */
+				<1 RK_PC5 1 &pcfg_pull_none>;
+		};
+
+		i2s0_mclk: i2s0-mclk {
+			rockchip,pins =
+				/* i2s0_mclk */
+				<1 RK_PC2 1 &pcfg_pull_none>;
+		};
+
+		i2s0_sclk: i2s0-sclk {
+			rockchip,pins =
+				/* i2s0_sclk */
+				<1 RK_PC3 1 &pcfg_pull_none>;
+		};
+
+		i2s0_sdi0: i2s0-sdi0 {
+			rockchip,pins =
+				/* i2s0_sdi0 */
+				<1 RK_PD4 2 &pcfg_pull_none>;
+		};
+
+		i2s0_sdi1: i2s0-sdi1 {
+			rockchip,pins =
+				/* i2s0_sdi1 */
+				<1 RK_PD3 2 &pcfg_pull_none>;
+		};
+
+		i2s0_sdi2: i2s0-sdi2 {
+			rockchip,pins =
+				/* i2s0_sdi2 */
+				<1 RK_PD2 2 &pcfg_pull_none>;
+		};
+
+		i2s0_sdi3: i2s0-sdi3 {
+			rockchip,pins =
+				/* i2s0_sdi3 */
+				<1 RK_PD1 2 &pcfg_pull_none>;
+		};
+
+		i2s0_sdo0: i2s0-sdo0 {
+			rockchip,pins =
+				/* i2s0_sdo0 */
+				<1 RK_PC7 1 &pcfg_pull_none>;
+		};
+
+		i2s0_sdo1: i2s0-sdo1 {
+			rockchip,pins =
+				/* i2s0_sdo1 */
+				<1 RK_PD0 1 &pcfg_pull_none>;
+		};
+
+		i2s0_sdo2: i2s0-sdo2 {
+			rockchip,pins =
+				/* i2s0_sdo2 */
+				<1 RK_PD1 1 &pcfg_pull_none>;
+		};
+
+		i2s0_sdo3: i2s0-sdo3 {
+			rockchip,pins =
+				/* i2s0_sdo3 */
+				<1 RK_PD2 1 &pcfg_pull_none>;
+		};
+	};
+
+	i2s1 {
+		i2s1m0_lrck: i2s1m0-lrck {
+			rockchip,pins =
+				/* i2s1m0_lrck */
+				<4 RK_PA2 3 &pcfg_pull_none>;
+		};
+
+		i2s1m0_mclk: i2s1m0-mclk {
+			rockchip,pins =
+				/* i2s1m0_mclk */
+				<4 RK_PA0 3 &pcfg_pull_none>;
+		};
+
+		i2s1m0_sclk: i2s1m0-sclk {
+			rockchip,pins =
+				/* i2s1m0_sclk */
+				<4 RK_PA1 3 &pcfg_pull_none>;
+		};
+
+		i2s1m0_sdi0: i2s1m0-sdi0 {
+			rockchip,pins =
+				/* i2s1m0_sdi0 */
+				<4 RK_PA5 3 &pcfg_pull_none>;
+		};
+
+		i2s1m0_sdi1: i2s1m0-sdi1 {
+			rockchip,pins =
+				/* i2s1m0_sdi1 */
+				<4 RK_PA6 3 &pcfg_pull_none>;
+		};
+
+		i2s1m0_sdi2: i2s1m0-sdi2 {
+			rockchip,pins =
+				/* i2s1m0_sdi2 */
+				<4 RK_PA7 3 &pcfg_pull_none>;
+		};
+
+		i2s1m0_sdi3: i2s1m0-sdi3 {
+			rockchip,pins =
+				/* i2s1m0_sdi3 */
+				<4 RK_PB0 3 &pcfg_pull_none>;
+		};
+
+		i2s1m0_sdo0: i2s1m0-sdo0 {
+			rockchip,pins =
+				/* i2s1m0_sdo0 */
+				<4 RK_PB1 3 &pcfg_pull_none>;
+		};
+
+		i2s1m0_sdo1: i2s1m0-sdo1 {
+			rockchip,pins =
+				/* i2s1m0_sdo1 */
+				<4 RK_PB2 3 &pcfg_pull_none>;
+		};
+
+		i2s1m0_sdo2: i2s1m0-sdo2 {
+			rockchip,pins =
+				/* i2s1m0_sdo2 */
+				<4 RK_PB3 3 &pcfg_pull_none>;
+		};
+
+		i2s1m0_sdo3: i2s1m0-sdo3 {
+			rockchip,pins =
+				/* i2s1m0_sdo3 */
+				<4 RK_PB4 3 &pcfg_pull_none>;
+		};
+		i2s1m1_lrck: i2s1m1-lrck {
+			rockchip,pins =
+				/* i2s1m1_lrck */
+				<0 RK_PB7 1 &pcfg_pull_none>;
+		};
+
+		i2s1m1_mclk: i2s1m1-mclk {
+			rockchip,pins =
+				/* i2s1m1_mclk */
+				<0 RK_PB5 1 &pcfg_pull_none>;
+		};
+
+		i2s1m1_sclk: i2s1m1-sclk {
+			rockchip,pins =
+				/* i2s1m1_sclk */
+				<0 RK_PB6 1 &pcfg_pull_none>;
+		};
+
+		i2s1m1_sdi0: i2s1m1-sdi0 {
+			rockchip,pins =
+				/* i2s1m1_sdi0 */
+				<0 RK_PC5 1 &pcfg_pull_none>;
+		};
+
+		i2s1m1_sdi1: i2s1m1-sdi1 {
+			rockchip,pins =
+				/* i2s1m1_sdi1 */
+				<0 RK_PC6 1 &pcfg_pull_none>;
+		};
+
+		i2s1m1_sdi2: i2s1m1-sdi2 {
+			rockchip,pins =
+				/* i2s1m1_sdi2 */
+				<0 RK_PC7 1 &pcfg_pull_none>;
+		};
+
+		i2s1m1_sdi3: i2s1m1-sdi3 {
+			rockchip,pins =
+				/* i2s1m1_sdi3 */
+				<0 RK_PD0 1 &pcfg_pull_none>;
+		};
+
+		i2s1m1_sdo0: i2s1m1-sdo0 {
+			rockchip,pins =
+				/* i2s1m1_sdo0 */
+				<0 RK_PD1 1 &pcfg_pull_none>;
+		};
+
+		i2s1m1_sdo1: i2s1m1-sdo1 {
+			rockchip,pins =
+				/* i2s1m1_sdo1 */
+				<0 RK_PD2 1 &pcfg_pull_none>;
+		};
+
+		i2s1m1_sdo2: i2s1m1-sdo2 {
+			rockchip,pins =
+				/* i2s1m1_sdo2 */
+				<0 RK_PD4 1 &pcfg_pull_none>;
+		};
+
+		i2s1m1_sdo3: i2s1m1-sdo3 {
+			rockchip,pins =
+				/* i2s1m1_sdo3 */
+				<0 RK_PD5 1 &pcfg_pull_none>;
+		};
+	};
+
+	i2s2 {
+		i2s2m1_lrck: i2s2m1-lrck {
+			rockchip,pins =
+				/* i2s2m1_lrck */
+				<3 RK_PB6 3 &pcfg_pull_none>;
+		};
+
+		i2s2m1_mclk: i2s2m1-mclk {
+			rockchip,pins =
+				/* i2s2m1_mclk */
+				<3 RK_PB4 3 &pcfg_pull_none>;
+		};
+
+		i2s2m1_sclk: i2s2m1-sclk {
+			rockchip,pins =
+				/* i2s2m1_sclk */
+				<3 RK_PB5 3 &pcfg_pull_none>;
+		};
+
+		i2s2m1_sdi: i2s2m1-sdi {
+			rockchip,pins =
+				/* i2s2m1_sdi */
+				<3 RK_PB2 3 &pcfg_pull_none>;
+		};
+
+		i2s2m1_sdo: i2s2m1-sdo {
+			rockchip,pins =
+				/* i2s2m1_sdo */
+				<3 RK_PB3 3 &pcfg_pull_none>;
+		};
+	};
+
+	i2s3 {
+		i2s3_lrck: i2s3-lrck {
+			rockchip,pins =
+				/* i2s3_lrck */
+				<3 RK_PA2 3 &pcfg_pull_none>;
+		};
+
+		i2s3_mclk: i2s3-mclk {
+			rockchip,pins =
+				/* i2s3_mclk */
+				<3 RK_PA0 3 &pcfg_pull_none>;
+		};
+
+		i2s3_sclk: i2s3-sclk {
+			rockchip,pins =
+				/* i2s3_sclk */
+				<3 RK_PA1 3 &pcfg_pull_none>;
+		};
+
+		i2s3_sdi: i2s3-sdi {
+			rockchip,pins =
+				/* i2s3_sdi */
+				<3 RK_PA4 3 &pcfg_pull_none>;
+		};
+
+		i2s3_sdo: i2s3-sdo {
+			rockchip,pins =
+				/* i2s3_sdo */
+				<3 RK_PA3 3 &pcfg_pull_none>;
+		};
+	};
+
+	jtag {
+		jtagm0_pins: jtagm0-pins {
+			rockchip,pins =
+				/* jtag_tck_m0 */
+				<4 RK_PD2 5 &pcfg_pull_none>,
+				/* jtag_tms_m0 */
+				<4 RK_PD3 5 &pcfg_pull_none>;
+		};
+
+		jtagm1_pins: jtagm1-pins {
+			rockchip,pins =
+				/* jtag_tck_m1 */
+				<4 RK_PD0 5 &pcfg_pull_none>,
+				/* jtag_tms_m1 */
+				<4 RK_PD1 5 &pcfg_pull_none>;
+		};
+
+		jtagm2_pins: jtagm2-pins {
+			rockchip,pins =
+				/* jtag_tck_m2 */
+				<0 RK_PB5 2 &pcfg_pull_none>,
+				/* jtag_tms_m2 */
+				<0 RK_PB6 2 &pcfg_pull_none>;
+		};
+	};
+
+	litcpu {
+		litcpu_pins: litcpu-pins {
+			rockchip,pins =
+				/* litcpu_avs */
+				<0 RK_PD3 1 &pcfg_pull_none>;
+		};
+	};
+
+	mcu {
+		mcum0_pins: mcum0-pins {
+			rockchip,pins =
+				/* mcu_jtag_tck_m0 */
+				<4 RK_PD4 5 &pcfg_pull_none>,
+				/* mcu_jtag_tms_m0 */
+				<4 RK_PD5 5 &pcfg_pull_none>;
+		};
+
+		mcum1_pins: mcum1-pins {
+			rockchip,pins =
+				/* mcu_jtag_tck_m1 */
+				<3 RK_PD4 6 &pcfg_pull_none>,
+				/* mcu_jtag_tms_m1 */
+				<3 RK_PD5 6 &pcfg_pull_none>;
+		};
+	};
+
+	mipi {
+		mipim0_pins: mipim0-pins {
+			rockchip,pins =
+				/* mipi_camera0_clk_m0 */
+				<4 RK_PB1 1 &pcfg_pull_none>,
+				/* mipi_camera1_clk_m0 */
+				<1 RK_PB6 2 &pcfg_pull_none>,
+				/* mipi_camera2_clk_m0 */
+				<1 RK_PB7 2 &pcfg_pull_none>,
+				/* mipi_camera3_clk_m0 */
+				<1 RK_PD6 2 &pcfg_pull_none>,
+				/* mipi_camera4_clk_m0 */
+				<1 RK_PD7 2 &pcfg_pull_none>;
+		};
+
+		mipim1_pins: mipim1-pins {
+			rockchip,pins =
+				/* mipi_camera0_clk_m1 */
+				<3 RK_PA5 4 &pcfg_pull_none>,
+				/* mipi_camera1_clk_m1 */
+				<3 RK_PA6 4 &pcfg_pull_none>,
+				/* mipi_camera2_clk_m1 */
+				<3 RK_PA7 4 &pcfg_pull_none>,
+				/* mipi_camera3_clk_m1 */
+				<3 RK_PB0 4 &pcfg_pull_none>,
+				/* mipi_camera4_clk_m1 */
+				<3 RK_PB1 4 &pcfg_pull_none>;
+		};
+
+		mipi_te0: mipi-te0 {
+			rockchip,pins =
+				/* mipi_te0 */
+				<3 RK_PC2 2 &pcfg_pull_none>;
+		};
+
+		mipi_te1: mipi-te1 {
+			rockchip,pins =
+				/* mipi_te1 */
+				<3 RK_PC3 2 &pcfg_pull_none>;
+		};
+	};
+
+	npu {
+		npu_pins: npu-pins {
+			rockchip,pins =
+				/* npu_avs */
+				<0 RK_PC6 2 &pcfg_pull_none>;
+		};
+	};
+
+	pcie20x1 {
+		pcie20x1m0_pins: pcie20x1m0-pins {
+			rockchip,pins =
+				/* pcie20x1_2_clkreqn_m0 */
+				<3 RK_PC7 4 &pcfg_pull_none>,
+				/* pcie20x1_2_perstn_m0 */
+				<3 RK_PD1 4 &pcfg_pull_none>,
+				/* pcie20x1_2_waken_m0 */
+				<3 RK_PD0 4 &pcfg_pull_none>;
+		};
+
+		pcie20x1m1_pins: pcie20x1m1-pins {
+			rockchip,pins =
+				/* pcie20x1_2_clkreqn_m1 */
+				<4 RK_PB7 4 &pcfg_pull_none>,
+				/* pcie20x1_2_perstn_m1 */
+				<4 RK_PC1 4 &pcfg_pull_none>,
+				/* pcie20x1_2_waken_m1 */
+				<4 RK_PC0 4 &pcfg_pull_none>;
+		};
+
+		pcie20x1_2_button_rstn: pcie20x1-2-button-rstn {
+			rockchip,pins =
+				/* pcie20x1_2_button_rstn */
+				<4 RK_PB3 4 &pcfg_pull_none>;
+		};
+	};
+
+	pcie30phy {
+		pcie30phy_pins: pcie30phy-pins {
+			rockchip,pins =
+				/* pcie30phy_dtb0 */
+				<1 RK_PC4 4 &pcfg_pull_none>,
+				/* pcie30phy_dtb1 */
+				<1 RK_PD1 4 &pcfg_pull_none>;
+		};
+	};
+
+	pcie30x1 {
+		pcie30x1m0_pins: pcie30x1m0-pins {
+			rockchip,pins =
+				/* pcie30x1_0_clkreqn_m0 */
+				<0 RK_PC0 12 &pcfg_pull_none>,
+				/* pcie30x1_0_perstn_m0 */
+				<0 RK_PC5 12 &pcfg_pull_none>,
+				/* pcie30x1_0_waken_m0 */
+				<0 RK_PC4 12 &pcfg_pull_none>,
+				/* pcie30x1_1_clkreqn_m0 */
+				<0 RK_PB5 12 &pcfg_pull_none>,
+				/* pcie30x1_1_perstn_m0 */
+				<0 RK_PB7 12 &pcfg_pull_none>,
+				/* pcie30x1_1_waken_m0 */
+				<0 RK_PB6 12 &pcfg_pull_none>;
+		};
+
+		pcie30x1m1_pins: pcie30x1m1-pins {
+			rockchip,pins =
+				/* pcie30x1_0_clkreqn_m1 */
+				<4 RK_PA3 4 &pcfg_pull_none>,
+				/* pcie30x1_0_perstn_m1 */
+				<4 RK_PA5 4 &pcfg_pull_none>,
+				/* pcie30x1_0_waken_m1 */
+				<4 RK_PA4 4 &pcfg_pull_none>,
+				/* pcie30x1_1_clkreqn_m1 */
+				<4 RK_PA0 4 &pcfg_pull_none>,
+				/* pcie30x1_1_perstn_m1 */
+				<4 RK_PA2 4 &pcfg_pull_none>,
+				/* pcie30x1_1_waken_m1 */
+				<4 RK_PA1 4 &pcfg_pull_none>;
+		};
+
+		pcie30x1m2_pins: pcie30x1m2-pins {
+			rockchip,pins =
+				/* pcie30x1_0_clkreqn_m2 */
+				<1 RK_PB5 4 &pcfg_pull_none>,
+				/* pcie30x1_0_perstn_m2 */
+				<1 RK_PB4 4 &pcfg_pull_none>,
+				/* pcie30x1_0_waken_m2 */
+				<1 RK_PB3 4 &pcfg_pull_none>,
+				/* pcie30x1_1_clkreqn_m2 */
+				<1 RK_PA0 4 &pcfg_pull_none>,
+				/* pcie30x1_1_perstn_m2 */
+				<1 RK_PA7 4 &pcfg_pull_none>,
+				/* pcie30x1_1_waken_m2 */
+				<1 RK_PA1 4 &pcfg_pull_none>;
+		};
+
+		pcie30x1_0_button_rstn: pcie30x1-0-button-rstn {
+			rockchip,pins =
+				/* pcie30x1_0_button_rstn */
+				<4 RK_PB1 4 &pcfg_pull_none>;
+		};
+
+		pcie30x1_1_button_rstn: pcie30x1-1-button-rstn {
+			rockchip,pins =
+				/* pcie30x1_1_button_rstn */
+				<4 RK_PB2 4 &pcfg_pull_none>;
+		};
+	};
+
+	pcie30x2 {
+		pcie30x2m0_pins: pcie30x2m0-pins {
+			rockchip,pins =
+				/* pcie30x2_clkreqn_m0 */
+				<0 RK_PD1 12 &pcfg_pull_none>,
+				/* pcie30x2_perstn_m0 */
+				<0 RK_PD4 12 &pcfg_pull_none>,
+				/* pcie30x2_waken_m0 */
+				<0 RK_PD2 12 &pcfg_pull_none>;
+		};
+
+		pcie30x2m1_pins: pcie30x2m1-pins {
+			rockchip,pins =
+				/* pcie30x2_clkreqn_m1 */
+				<4 RK_PA6 4 &pcfg_pull_none>,
+				/* pcie30x2_perstn_m1 */
+				<4 RK_PB0 4 &pcfg_pull_none>,
+				/* pcie30x2_waken_m1 */
+				<4 RK_PA7 4 &pcfg_pull_none>;
+		};
+
+		pcie30x2m2_pins: pcie30x2m2-pins {
+			rockchip,pins =
+				/* pcie30x2_clkreqn_m2 */
+				<3 RK_PD2 4 &pcfg_pull_none>,
+				/* pcie30x2_perstn_m2 */
+				<3 RK_PD4 4 &pcfg_pull_none>,
+				/* pcie30x2_waken_m2 */
+				<3 RK_PD3 4 &pcfg_pull_none>;
+		};
+
+		pcie30x2m3_pins: pcie30x2m3-pins {
+			rockchip,pins =
+				/* pcie30x2_clkreqn_m3 */
+				<1 RK_PD7 4 &pcfg_pull_none>,
+				/* pcie30x2_perstn_m3 */
+				<1 RK_PB7 4 &pcfg_pull_none>,
+				/* pcie30x2_waken_m3 */
+				<1 RK_PB6 4 &pcfg_pull_none>;
+		};
+
+		pcie30x2_button_rstn: pcie30x2-button-rstn {
+			rockchip,pins =
+				/* pcie30x2_button_rstn */
+				<3 RK_PC1 4 &pcfg_pull_none>;
+		};
+	};
+
+	pcie30x4 {
+		pcie30x4m0_pins: pcie30x4m0-pins {
+			rockchip,pins =
+				/* pcie30x4_clkreqn_m0 */
+				<0 RK_PC6 12 &pcfg_pull_none>,
+				/* pcie30x4_perstn_m0 */
+				<0 RK_PD0 12 &pcfg_pull_none>,
+				/* pcie30x4_waken_m0 */
+				<0 RK_PC7 12 &pcfg_pull_none>;
+		};
+
+		pcie30x4m1_pins: pcie30x4m1-pins {
+			rockchip,pins =
+				/* pcie30x4_clkreqn_m1 */
+				<4 RK_PB4 4 &pcfg_pull_none>,
+				/* pcie30x4_perstn_m1 */
+				<4 RK_PB6 4 &pcfg_pull_none>,
+				/* pcie30x4_waken_m1 */
+				<4 RK_PB5 4 &pcfg_pull_none>;
+		};
+
+		pcie30x4m2_pins: pcie30x4m2-pins {
+			rockchip,pins =
+				/* pcie30x4_clkreqn_m2 */
+				<3 RK_PC4 4 &pcfg_pull_none>,
+				/* pcie30x4_perstn_m2 */
+				<3 RK_PC6 4 &pcfg_pull_none>,
+				/* pcie30x4_waken_m2 */
+				<3 RK_PC5 4 &pcfg_pull_none>;
+		};
+
+		pcie30x4m3_pins: pcie30x4m3-pins {
+			rockchip,pins =
+				/* pcie30x4_clkreqn_m3 */
+				<1 RK_PB0 4 &pcfg_pull_none>,
+				/* pcie30x4_perstn_m3 */
+				<1 RK_PB2 4 &pcfg_pull_none>,
+				/* pcie30x4_waken_m3 */
+				<1 RK_PB1 4 &pcfg_pull_none>;
+		};
+
+		pcie30x4_button_rstn: pcie30x4-button-rstn {
+			rockchip,pins =
+				/* pcie30x4_button_rstn */
+				<3 RK_PD5 4 &pcfg_pull_none>;
+		};
+	};
+
+	pdm0 {
+		pdm0m0_clk: pdm0m0-clk {
+			rockchip,pins =
+				/* pdm0_clk0_m0 */
+				<1 RK_PC6 3 &pcfg_pull_none>;
+		};
+
+		pdm0m0_clk1: pdm0m0-clk1 {
+			rockchip,pins =
+				/* pdm0m0_clk1 */
+				<1 RK_PC4 3 &pcfg_pull_none>;
+		};
+
+		pdm0m0_sdi0: pdm0m0-sdi0 {
+			rockchip,pins =
+				/* pdm0m0_sdi0 */
+				<1 RK_PD5 3 &pcfg_pull_none>;
+		};
+
+		pdm0m0_sdi1: pdm0m0-sdi1 {
+			rockchip,pins =
+				/* pdm0m0_sdi1 */
+				<1 RK_PD1 3 &pcfg_pull_none>;
+		};
+
+		pdm0m0_sdi2: pdm0m0-sdi2 {
+			rockchip,pins =
+				/* pdm0m0_sdi2 */
+				<1 RK_PD2 3 &pcfg_pull_none>;
+		};
+
+		pdm0m0_sdi3: pdm0m0-sdi3 {
+			rockchip,pins =
+				/* pdm0m0_sdi3 */
+				<1 RK_PD3 3 &pcfg_pull_none>;
+		};
+		pdm0m1_clk: pdm0m1-clk {
+			rockchip,pins =
+				/* pdm0_clk0_m1 */
+				<0 RK_PC0 2 &pcfg_pull_none>;
+		};
+
+		pdm0m1_clk1: pdm0m1-clk1 {
+			rockchip,pins =
+				/* pdm0m1_clk1 */
+				<0 RK_PC4 2 &pcfg_pull_none>;
+		};
+
+		pdm0m1_sdi0: pdm0m1-sdi0 {
+			rockchip,pins =
+				/* pdm0m1_sdi0 */
+				<0 RK_PC7 2 &pcfg_pull_none>;
+		};
+
+		pdm0m1_sdi1: pdm0m1-sdi1 {
+			rockchip,pins =
+				/* pdm0m1_sdi1 */
+				<0 RK_PD0 2 &pcfg_pull_none>;
+		};
+
+		pdm0m1_sdi2: pdm0m1-sdi2 {
+			rockchip,pins =
+				/* pdm0m1_sdi2 */
+				<0 RK_PD4 2 &pcfg_pull_none>;
+		};
+
+		pdm0m1_sdi3: pdm0m1-sdi3 {
+			rockchip,pins =
+				/* pdm0m1_sdi3 */
+				<0 RK_PD6 2 &pcfg_pull_none>;
+		};
+	};
+
+	pdm1 {
+		pdm1m0_clk: pdm1m0-clk {
+			rockchip,pins =
+				/* pdm1_clk0_m0 */
+				<4 RK_PD5 2 &pcfg_pull_none>;
+		};
+
+		pdm1m0_clk1: pdm1m0-clk1 {
+			rockchip,pins =
+				/* pdm1m0_clk1 */
+				<4 RK_PD4 2 &pcfg_pull_none>;
+		};
+
+		pdm1m0_sdi0: pdm1m0-sdi0 {
+			rockchip,pins =
+				/* pdm1m0_sdi0 */
+				<4 RK_PD3 2 &pcfg_pull_none>;
+		};
+
+		pdm1m0_sdi1: pdm1m0-sdi1 {
+			rockchip,pins =
+				/* pdm1m0_sdi1 */
+				<4 RK_PD2 2 &pcfg_pull_none>;
+		};
+
+		pdm1m0_sdi2: pdm1m0-sdi2 {
+			rockchip,pins =
+				/* pdm1m0_sdi2 */
+				<4 RK_PD1 2 &pcfg_pull_none>;
+		};
+
+		pdm1m0_sdi3: pdm1m0-sdi3 {
+			rockchip,pins =
+				/* pdm1m0_sdi3 */
+				<4 RK_PD0 2 &pcfg_pull_none>;
+		};
+		pdm1m1_clk: pdm1m1-clk {
+			rockchip,pins =
+				/* pdm1_clk0_m1 */
+				<1 RK_PB4 2 &pcfg_pull_none>;
+		};
+
+		pdm1m1_clk1: pdm1m1-clk1 {
+			rockchip,pins =
+				/* pdm1m1_clk1 */
+				<1 RK_PB3 2 &pcfg_pull_none>;
+		};
+
+		pdm1m1_sdi0: pdm1m1-sdi0 {
+			rockchip,pins =
+				/* pdm1m1_sdi0 */
+				<1 RK_PA7 2 &pcfg_pull_none>;
+		};
+
+		pdm1m1_sdi1: pdm1m1-sdi1 {
+			rockchip,pins =
+				/* pdm1m1_sdi1 */
+				<1 RK_PB0 2 &pcfg_pull_none>;
+		};
+
+		pdm1m1_sdi2: pdm1m1-sdi2 {
+			rockchip,pins =
+				/* pdm1m1_sdi2 */
+				<1 RK_PB1 2 &pcfg_pull_none>;
+		};
+
+		pdm1m1_sdi3: pdm1m1-sdi3 {
+			rockchip,pins =
+				/* pdm1m1_sdi3 */
+				<1 RK_PB2 2 &pcfg_pull_none>;
+		};
+	};
+
+	pmic {
+		pmic_pins: pmic-pins {
+			rockchip,pins =
+				/* pmic_int_l */
+				<0 RK_PA7 1 &pcfg_pull_none>,
+				/* pmic_sleep1 */
+				<0 RK_PA2 1 &pcfg_pull_none>,
+				/* pmic_sleep2 */
+				<0 RK_PA3 1 &pcfg_pull_none>,
+				/* pmic_sleep3 */
+				<0 RK_PC1 1 &pcfg_pull_none>,
+				/* pmic_sleep4 */
+				<0 RK_PC2 1 &pcfg_pull_none>,
+				/* pmic_sleep5 */
+				<0 RK_PC3 1 &pcfg_pull_none>,
+				/* pmic_sleep6 */
+				<0 RK_PD6 1 &pcfg_pull_none>;
+		};
+	};
+
+	pmu {
+		pmu_pins: pmu-pins {
+			rockchip,pins =
+				/* pmu_debug */
+				<0 RK_PA5 3 &pcfg_pull_none>;
+		};
+	};
+
+	pwm0 {
+		pwm0m0_pins: pwm0m0-pins {
+			rockchip,pins =
+				/* pwm0_m0 */
+				<0 RK_PB7 3 &pcfg_pull_none>;
+		};
+
+		pwm0m1_pins: pwm0m1-pins {
+			rockchip,pins =
+				/* pwm0_m1 */
+				<1 RK_PD2 11 &pcfg_pull_none>;
+		};
+
+		pwm0m2_pins: pwm0m2-pins {
+			rockchip,pins =
+				/* pwm0_m2 */
+				<1 RK_PA2 11 &pcfg_pull_none>;
+		};
+	};
+
+	pwm1 {
+		pwm1m0_pins: pwm1m0-pins {
+			rockchip,pins =
+				/* pwm1_m0 */
+				<0 RK_PC0 3 &pcfg_pull_none>;
+		};
+
+		pwm1m1_pins: pwm1m1-pins {
+			rockchip,pins =
+				/* pwm1_m1 */
+				<1 RK_PD3 11 &pcfg_pull_none>;
+		};
+
+		pwm1m2_pins: pwm1m2-pins {
+			rockchip,pins =
+				/* pwm1_m2 */
+				<1 RK_PA3 11 &pcfg_pull_none>;
+		};
+	};
+
+	pwm2 {
+		pwm2m0_pins: pwm2m0-pins {
+			rockchip,pins =
+				/* pwm2_m0 */
+				<0 RK_PC4 3 &pcfg_pull_none>;
+		};
+
+		pwm2m1_pins: pwm2m1-pins {
+			rockchip,pins =
+				/* pwm2_m1 */
+				<3 RK_PB1 11 &pcfg_pull_none>;
+		};
+	};
+
+	pwm3 {
+		pwm3m0_pins: pwm3m0-pins {
+			rockchip,pins =
+				/* pwm3_ir_m0 */
+				<0 RK_PD4 3 &pcfg_pull_none>;
+		};
+
+		pwm3m1_pins: pwm3m1-pins {
+			rockchip,pins =
+				/* pwm3_ir_m1 */
+				<3 RK_PB2 11 &pcfg_pull_none>;
+		};
+
+		pwm3m2_pins: pwm3m2-pins {
+			rockchip,pins =
+				/* pwm3_ir_m2 */
+				<1 RK_PC2 11 &pcfg_pull_none>;
+		};
+
+		pwm3m3_pins: pwm3m3-pins {
+			rockchip,pins =
+				/* pwm3_ir_m3 */
+				<1 RK_PA7 11 &pcfg_pull_none>;
+		};
+	};
+
+	pwm4 {
+		pwm4m0_pins: pwm4m0-pins {
+			rockchip,pins =
+				/* pwm4_m0 */
+				<0 RK_PC5 11 &pcfg_pull_none>;
+		};
+	};
+
+	pwm5 {
+		pwm5m0_pins: pwm5m0-pins {
+			rockchip,pins =
+				/* pwm5_m0 */
+				<0 RK_PB1 3 &pcfg_pull_none>;
+		};
+
+		pwm5m1_pins: pwm5m1-pins {
+			rockchip,pins =
+				/* pwm5_m1 */
+				<0 RK_PC6 11 &pcfg_pull_none>;
+		};
+	};
+
+	pwm6 {
+		pwm6m0_pins: pwm6m0-pins {
+			rockchip,pins =
+				/* pwm6_m0 */
+				<0 RK_PC7 11 &pcfg_pull_none>;
+		};
+
+		pwm6m1_pins: pwm6m1-pins {
+			rockchip,pins =
+				/* pwm6_m1 */
+				<4 RK_PC1 11 &pcfg_pull_none>;
+		};
+	};
+
+	pwm7 {
+		pwm7m0_pins: pwm7m0-pins {
+			rockchip,pins =
+				/* pwm7_ir_m0 */
+				<0 RK_PD0 11 &pcfg_pull_none>;
+		};
+
+		pwm7m1_pins: pwm7m1-pins {
+			rockchip,pins =
+				/* pwm7_ir_m1 */
+				<4 RK_PD4 11 &pcfg_pull_none>;
+		};
+
+		pwm7m2_pins: pwm7m2-pins {
+			rockchip,pins =
+				/* pwm7_ir_m2 */
+				<1 RK_PC3 11 &pcfg_pull_none>;
+		};
+	};
+
+	pwm8 {
+		pwm8m0_pins: pwm8m0-pins {
+			rockchip,pins =
+				/* pwm8_m0 */
+				<3 RK_PA7 11 &pcfg_pull_none>;
+		};
+
+		pwm8m1_pins: pwm8m1-pins {
+			rockchip,pins =
+				/* pwm8_m1 */
+				<4 RK_PD0 11 &pcfg_pull_none>;
+		};
+
+		pwm8m2_pins: pwm8m2-pins {
+			rockchip,pins =
+				/* pwm8_m2 */
+				<3 RK_PD0 11 &pcfg_pull_none>;
+		};
+	};
+
+	pwm9 {
+		pwm9m0_pins: pwm9m0-pins {
+			rockchip,pins =
+				/* pwm9_m0 */
+				<3 RK_PB0 11 &pcfg_pull_none>;
+		};
+
+		pwm9m1_pins: pwm9m1-pins {
+			rockchip,pins =
+				/* pwm9_m1 */
+				<4 RK_PD1 11 &pcfg_pull_none>;
+		};
+
+		pwm9m2_pins: pwm9m2-pins {
+			rockchip,pins =
+				/* pwm9_m2 */
+				<3 RK_PD1 11 &pcfg_pull_none>;
+		};
+	};
+
+	pwm10 {
+		pwm10m0_pins: pwm10m0-pins {
+			rockchip,pins =
+				/* pwm10_m0 */
+				<3 RK_PA0 11 &pcfg_pull_none>;
+		};
+
+		pwm10m1_pins: pwm10m1-pins {
+			rockchip,pins =
+				/* pwm10_m1 */
+				<4 RK_PD3 11 &pcfg_pull_none>;
+		};
+
+		pwm10m2_pins: pwm10m2-pins {
+			rockchip,pins =
+				/* pwm10_m2 */
+				<3 RK_PD3 11 &pcfg_pull_none>;
+		};
+	};
+
+	pwm11 {
+		pwm11m0_pins: pwm11m0-pins {
+			rockchip,pins =
+				/* pwm11_ir_m0 */
+				<3 RK_PA1 11 &pcfg_pull_none>;
+		};
+
+		pwm11m1_pins: pwm11m1-pins {
+			rockchip,pins =
+				/* pwm11_ir_m1 */
+				<4 RK_PB4 11 &pcfg_pull_none>;
+		};
+
+		pwm11m2_pins: pwm11m2-pins {
+			rockchip,pins =
+				/* pwm11_ir_m2 */
+				<1 RK_PC4 11 &pcfg_pull_none>;
+		};
+
+		pwm11m3_pins: pwm11m3-pins {
+			rockchip,pins =
+				/* pwm11_ir_m3 */
+				<3 RK_PD5 11 &pcfg_pull_none>;
+		};
+	};
+
+	pwm12 {
+		pwm12m0_pins: pwm12m0-pins {
+			rockchip,pins =
+				/* pwm12_m0 */
+				<3 RK_PB5 11 &pcfg_pull_none>;
+		};
+
+		pwm12m1_pins: pwm12m1-pins {
+			rockchip,pins =
+				/* pwm12_m1 */
+				<4 RK_PB5 11 &pcfg_pull_none>;
+		};
+	};
+
+	pwm13 {
+		pwm13m0_pins: pwm13m0-pins {
+			rockchip,pins =
+				/* pwm13_m0 */
+				<3 RK_PB6 11 &pcfg_pull_none>;
+		};
+
+		pwm13m1_pins: pwm13m1-pins {
+			rockchip,pins =
+				/* pwm13_m1 */
+				<4 RK_PB6 11 &pcfg_pull_none>;
+		};
+
+		pwm13m2_pins: pwm13m2-pins {
+			rockchip,pins =
+				/* pwm13_m2 */
+				<1 RK_PB7 11 &pcfg_pull_none>;
+		};
+	};
+
+	pwm14 {
+		pwm14m0_pins: pwm14m0-pins {
+			rockchip,pins =
+				/* pwm14_m0 */
+				<3 RK_PC2 11 &pcfg_pull_none>;
+		};
+
+		pwm14m1_pins: pwm14m1-pins {
+			rockchip,pins =
+				/* pwm14_m1 */
+				<4 RK_PB2 11 &pcfg_pull_none>;
+		};
+
+		pwm14m2_pins: pwm14m2-pins {
+			rockchip,pins =
+				/* pwm14_m2 */
+				<1 RK_PD6 11 &pcfg_pull_none>;
+		};
+	};
+
+	pwm15 {
+		pwm15m0_pins: pwm15m0-pins {
+			rockchip,pins =
+				/* pwm15_ir_m0 */
+				<3 RK_PC3 11 &pcfg_pull_none>;
+		};
+
+		pwm15m1_pins: pwm15m1-pins {
+			rockchip,pins =
+				/* pwm15_ir_m1 */
+				<4 RK_PB3 11 &pcfg_pull_none>;
+		};
+
+		pwm15m2_pins: pwm15m2-pins {
+			rockchip,pins =
+				/* pwm15_ir_m2 */
+				<1 RK_PC6 11 &pcfg_pull_none>;
+		};
+
+		pwm15m3_pins: pwm15m3-pins {
+			rockchip,pins =
+				/* pwm15_ir_m3 */
+				<1 RK_PD7 11 &pcfg_pull_none>;
+		};
+	};
+
+	refclk {
+		refclk_pins: refclk-pins {
+			rockchip,pins =
+				/* refclk_out */
+				<0 RK_PA0 1 &pcfg_pull_none>;
+		};
+	};
+
+	sata {
+		sata_pins: sata-pins {
+			rockchip,pins =
+				/* sata_cp_pod */
+				<0 RK_PC6 13 &pcfg_pull_none>,
+				/* sata_cpdet */
+				<0 RK_PD4 13 &pcfg_pull_none>,
+				/* sata_mp_switch */
+				<0 RK_PD5 13 &pcfg_pull_none>;
+		};
+	};
+
+	sata0 {
+		sata0m0_pins: sata0m0-pins {
+			rockchip,pins =
+				/* sata0_act_led_m0 */
+				<4 RK_PB6 6 &pcfg_pull_none>;
+		};
+
+		sata0m1_pins: sata0m1-pins {
+			rockchip,pins =
+				/* sata0_act_led_m1 */
+				<1 RK_PB3 6 &pcfg_pull_none>;
+		};
+	};
+
+	sata1 {
+		sata1m0_pins: sata1m0-pins {
+			rockchip,pins =
+				/* sata1_act_led_m0 */
+				<4 RK_PB5 6 &pcfg_pull_none>;
+		};
+
+		sata1m1_pins: sata1m1-pins {
+			rockchip,pins =
+				/* sata1_act_led_m1 */
+				<1 RK_PA1 6 &pcfg_pull_none>;
+		};
+	};
+
+	sata2 {
+		sata2m0_pins: sata2m0-pins {
+			rockchip,pins =
+				/* sata2_act_led_m0 */
+				<4 RK_PB1 6 &pcfg_pull_none>;
+		};
+
+		sata2m1_pins: sata2m1-pins {
+			rockchip,pins =
+				/* sata2_act_led_m1 */
+				<1 RK_PB7 6 &pcfg_pull_none>;
+		};
+	};
+
+	sdio {
+		sdiom1_pins: sdiom1-pins {
+			rockchip,pins =
+				/* sdio_clk_m1 */
+				<3 RK_PA5 2 &pcfg_pull_none>,
+				/* sdio_cmd_m1 */
+				<3 RK_PA4 2 &pcfg_pull_none>,
+				/* sdio_d0_m1 */
+				<3 RK_PA0 2 &pcfg_pull_none>,
+				/* sdio_d1_m1 */
+				<3 RK_PA1 2 &pcfg_pull_none>,
+				/* sdio_d2_m1 */
+				<3 RK_PA2 2 &pcfg_pull_none>,
+				/* sdio_d3_m1 */
+				<3 RK_PA3 2 &pcfg_pull_none>;
+		};
+	};
+
+	sdmmc {
+		sdmmc_bus4: sdmmc-bus4 {
+			rockchip,pins =
+				/* sdmmc_d0 */
+				<4 RK_PD0 1 &pcfg_pull_up_drv_level_2>,
+				/* sdmmc_d1 */
+				<4 RK_PD1 1 &pcfg_pull_up_drv_level_2>,
+				/* sdmmc_d2 */
+				<4 RK_PD2 1 &pcfg_pull_up_drv_level_2>,
+				/* sdmmc_d3 */
+				<4 RK_PD3 1 &pcfg_pull_up_drv_level_2>;
+		};
+
+		sdmmc_clk: sdmmc-clk {
+			rockchip,pins =
+				/* sdmmc_clk */
+				<4 RK_PD5 1 &pcfg_pull_up_drv_level_2>;
+		};
+
+		sdmmc_cmd: sdmmc-cmd {
+			rockchip,pins =
+				/* sdmmc_cmd */
+				<4 RK_PD4 1 &pcfg_pull_up_drv_level_2>;
+		};
+
+		sdmmc_det: sdmmc-det {
+			rockchip,pins =
+				/* sdmmc_det */
+				<0 RK_PA4 1 &pcfg_pull_up>;
+		};
+
+		sdmmc_pwren: sdmmc-pwren {
+			rockchip,pins =
+				/* sdmmc_pwren */
+				<0 RK_PA5 2 &pcfg_pull_none>;
+		};
+	};
+
+	spdif0 {
+		spdif0m0_tx: spdif0m0-tx {
+			rockchip,pins =
+				/* spdif0m0_tx */
+				<1 RK_PB6 3 &pcfg_pull_none>;
+		};
+
+		spdif0m1_tx: spdif0m1-tx {
+			rockchip,pins =
+				/* spdif0m1_tx */
+				<4 RK_PB4 6 &pcfg_pull_none>;
+		};
+	};
+
+	spdif1 {
+		spdif1m0_tx: spdif1m0-tx {
+			rockchip,pins =
+				/* spdif1m0_tx */
+				<1 RK_PB7 3 &pcfg_pull_none>;
+		};
+
+		spdif1m1_tx: spdif1m1-tx {
+			rockchip,pins =
+				/* spdif1m1_tx */
+				<4 RK_PB1 2 &pcfg_pull_none>;
+		};
+
+		spdif1m2_tx: spdif1m2-tx {
+			rockchip,pins =
+				/* spdif1m2_tx */
+				<4 RK_PC1 3 &pcfg_pull_none>;
+		};
+	};
+
+	spi0 {
+		spi0m0_pins: spi0m0-pins {
+			rockchip,pins =
+				/* spi0_clk_m0 */
+				<0 RK_PC6 8 &pcfg_pull_none>,
+				/* spi0_miso_m0 */
+				<0 RK_PC7 8 &pcfg_pull_none>,
+				/* spi0_mosi_m0 */
+				<0 RK_PC0 8 &pcfg_pull_none>;
+		};
+
+		spi0m0_cs0: spi0m0-cs0 {
+			rockchip,pins =
+				/* spi0_cs0_m0 */
+				<0 RK_PD1 8 &pcfg_pull_none>;
+		};
+
+		spi0m0_cs1: spi0m0-cs1 {
+			rockchip,pins =
+				/* spi0_cs1_m0 */
+				<0 RK_PB7 8 &pcfg_pull_none>;
+		};
+		spi0m1_pins: spi0m1-pins {
+			rockchip,pins =
+				/* spi0_clk_m1 */
+				<4 RK_PA2 8 &pcfg_pull_none>,
+				/* spi0_miso_m1 */
+				<4 RK_PA0 8 &pcfg_pull_none>,
+				/* spi0_mosi_m1 */
+				<4 RK_PA1 8 &pcfg_pull_none>;
+		};
+
+		spi0m1_cs0: spi0m1-cs0 {
+			rockchip,pins =
+				/* spi0_cs0_m1 */
+				<4 RK_PB2 8 &pcfg_pull_none>;
+		};
+
+		spi0m1_cs1: spi0m1-cs1 {
+			rockchip,pins =
+				/* spi0_cs1_m1 */
+				<4 RK_PB1 8 &pcfg_pull_none>;
+		};
+		spi0m2_pins: spi0m2-pins {
+			rockchip,pins =
+				/* spi0_clk_m2 */
+				<1 RK_PB3 8 &pcfg_pull_none>,
+				/* spi0_miso_m2 */
+				<1 RK_PB1 8 &pcfg_pull_none>,
+				/* spi0_mosi_m2 */
+				<1 RK_PB2 8 &pcfg_pull_none>;
+		};
+
+		spi0m2_cs0: spi0m2-cs0 {
+			rockchip,pins =
+				/* spi0_cs0_m2 */
+				<1 RK_PB4 8 &pcfg_pull_none>;
+		};
+
+		spi0m2_cs1: spi0m2-cs1 {
+			rockchip,pins =
+				/* spi0_cs1_m2 */
+				<1 RK_PB5 8 &pcfg_pull_none>;
+		};
+		spi0m3_pins: spi0m3-pins {
+			rockchip,pins =
+				/* spi0_clk_m3 */
+				<3 RK_PD3 8 &pcfg_pull_none>,
+				/* spi0_miso_m3 */
+				<3 RK_PD1 8 &pcfg_pull_none>,
+				/* spi0_mosi_m3 */
+				<3 RK_PD2 8 &pcfg_pull_none>;
+		};
+
+		spi0m3_cs0: spi0m3-cs0 {
+			rockchip,pins =
+				/* spi0_cs0_m3 */
+				<3 RK_PD4 8 &pcfg_pull_none>;
+		};
+
+		spi0m3_cs1: spi0m3-cs1 {
+			rockchip,pins =
+				/* spi0_cs1_m3 */
+				<3 RK_PD5 8 &pcfg_pull_none>;
+		};
+	};
+
+	spi1 {
+		spi1m1_pins: spi1m1-pins {
+			rockchip,pins =
+				/* spi1_clk_m1 */
+				<3 RK_PC1 8 &pcfg_pull_none>,
+				/* spi1_miso_m1 */
+				<3 RK_PC0 8 &pcfg_pull_none>,
+				/* spi1_mosi_m1 */
+				<3 RK_PB7 8 &pcfg_pull_none>;
+		};
+
+		spi1m1_cs0: spi1m1-cs0 {
+			rockchip,pins =
+				/* spi1_cs0_m1 */
+				<3 RK_PC2 8 &pcfg_pull_none>;
+		};
+
+		spi1m1_cs1: spi1m1-cs1 {
+			rockchip,pins =
+				/* spi1_cs1_m1 */
+				<3 RK_PC3 8 &pcfg_pull_none>;
+		};
+
+		spi1m2_pins: spi1m2-pins {
+			rockchip,pins =
+				/* spi1_clk_m2 */
+				<1 RK_PD2 8 &pcfg_pull_none>,
+				/* spi1_miso_m2 */
+				<1 RK_PD0 8 &pcfg_pull_none>,
+				/* spi1_mosi_m2 */
+				<1 RK_PD1 8 &pcfg_pull_none>;
+		};
+
+		spi1m2_cs0: spi1m2-cs0 {
+			rockchip,pins =
+				/* spi1_cs0_m2 */
+				<1 RK_PD3 8 &pcfg_pull_none>;
+		};
+
+		spi1m2_cs1: spi1m2-cs1 {
+			rockchip,pins =
+				/* spi1_cs1_m2 */
+				<1 RK_PD5 8 &pcfg_pull_none>;
+		};
+	};
+
+	spi2 {
+		spi2m0_pins: spi2m0-pins {
+			rockchip,pins =
+				/* spi2_clk_m0 */
+				<1 RK_PA6 8 &pcfg_pull_none>,
+				/* spi2_miso_m0 */
+				<1 RK_PA4 8 &pcfg_pull_none>,
+				/* spi2_mosi_m0 */
+				<1 RK_PA5 8 &pcfg_pull_none>;
+		};
+
+		spi2m0_cs0: spi2m0-cs0 {
+			rockchip,pins =
+				/* spi2_cs0_m0 */
+				<1 RK_PA7 8 &pcfg_pull_none>;
+		};
+
+		spi2m0_cs1: spi2m0-cs1 {
+			rockchip,pins =
+				/* spi2_cs1_m0 */
+				<1 RK_PB0 8 &pcfg_pull_none>;
+		};
+
+		spi2m1_pins: spi2m1-pins {
+			rockchip,pins =
+				/* spi2_clk_m1 */
+				<4 RK_PA6 8 &pcfg_pull_none>,
+				/* spi2_miso_m1 */
+				<4 RK_PA4 8 &pcfg_pull_none>,
+				/* spi2_mosi_m1 */
+				<4 RK_PA5 8 &pcfg_pull_none>;
+		};
+
+		spi2m1_cs0: spi2m1-cs0 {
+			rockchip,pins =
+				/* spi2_cs0_m1 */
+				<4 RK_PA7 8 &pcfg_pull_none>;
+		};
+
+		spi2m1_cs1: spi2m1-cs1 {
+			rockchip,pins =
+				/* spi2_cs1_m1 */
+				<4 RK_PB0 8 &pcfg_pull_none>;
+		};
+
+		spi2m2_pins: spi2m2-pins {
+			rockchip,pins =
+				/* spi2_clk_m2 */
+				<0 RK_PA5 1 &pcfg_pull_none>,
+				/* spi2_miso_m2 */
+				<0 RK_PB3 1 &pcfg_pull_none>,
+				/* spi2_mosi_m2 */
+				<0 RK_PA6 1 &pcfg_pull_none>;
+		};
+
+		spi2m2_cs0: spi2m2-cs0 {
+			rockchip,pins =
+				/* spi2_cs0_m2 */
+				<0 RK_PB1 1 &pcfg_pull_none>;
+		};
+
+		spi2m2_cs1: spi2m2-cs1 {
+			rockchip,pins =
+				/* spi2_cs1_m2 */
+				<0 RK_PB0 1 &pcfg_pull_none>;
+		};
+	};
+
+	spi3 {
+		spi3m1_pins: spi3m1-pins {
+			rockchip,pins =
+				/* spi3_clk_m1 */
+				<4 RK_PB7 8 &pcfg_pull_none>,
+				/* spi3_miso_m1 */
+				<4 RK_PB5 8 &pcfg_pull_none>,
+				/* spi3_mosi_m1 */
+				<4 RK_PB6 8 &pcfg_pull_none>;
+		};
+
+		spi3m1_cs0: spi3m1-cs0 {
+			rockchip,pins =
+				/* spi3_cs0_m1 */
+				<4 RK_PC0 8 &pcfg_pull_none>;
+		};
+
+		spi3m1_cs1: spi3m1-cs1 {
+			rockchip,pins =
+				/* spi3_cs1_m1 */
+				<4 RK_PC1 8 &pcfg_pull_none>;
+		};
+
+		spi3m2_pins: spi3m2-pins {
+			rockchip,pins =
+				/* spi3_clk_m2 */
+				<0 RK_PD3 8 &pcfg_pull_none>,
+				/* spi3_miso_m2 */
+				<0 RK_PD0 8 &pcfg_pull_none>,
+				/* spi3_mosi_m2 */
+				<0 RK_PD2 8 &pcfg_pull_none>;
+		};
+
+		spi3m2_cs0: spi3m2-cs0 {
+			rockchip,pins =
+				/* spi3_cs0_m2 */
+				<0 RK_PD4 8 &pcfg_pull_none>;
+		};
+
+		spi3m2_cs1: spi3m2-cs1 {
+			rockchip,pins =
+				/* spi3_cs1_m2 */
+				<0 RK_PD5 8 &pcfg_pull_none>;
+		};
+
+		spi3m3_pins: spi3m3-pins {
+			rockchip,pins =
+				/* spi3_clk_m3 */
+				<3 RK_PD0 8 &pcfg_pull_none>,
+				/* spi3_miso_m3 */
+				<3 RK_PC6 8 &pcfg_pull_none>,
+				/* spi3_mosi_m3 */
+				<3 RK_PC7 8 &pcfg_pull_none>;
+		};
+
+		spi3m3_cs0: spi3m3-cs0 {
+			rockchip,pins =
+				/* spi3_cs0_m3 */
+				<3 RK_PC4 8 &pcfg_pull_none>;
+		};
+
+		spi3m3_cs1: spi3m3-cs1 {
+			rockchip,pins =
+				/* spi3_cs1_m3 */
+				<3 RK_PC5 8 &pcfg_pull_none>;
+		};
+	};
+
+	spi4 {
+		spi4m0_pins: spi4m0-pins {
+			rockchip,pins =
+				/* spi4_clk_m0 */
+				<1 RK_PC2 8 &pcfg_pull_none>,
+				/* spi4_miso_m0 */
+				<1 RK_PC0 8 &pcfg_pull_none>,
+				/* spi4_mosi_m0 */
+				<1 RK_PC1 8 &pcfg_pull_none>;
+		};
+
+		spi4m0_cs0: spi4m0-cs0 {
+			rockchip,pins =
+				/* spi4_cs0_m0 */
+				<1 RK_PC3 8 &pcfg_pull_none>;
+		};
+
+		spi4m0_cs1: spi4m0-cs1 {
+			rockchip,pins =
+				/* spi4_cs1_m0 */
+				<1 RK_PC4 8 &pcfg_pull_none>;
+		};
+
+		spi4m1_pins: spi4m1-pins {
+			rockchip,pins =
+				/* spi4_clk_m1 */
+				<3 RK_PA2 8 &pcfg_pull_none>,
+				/* spi4_miso_m1 */
+				<3 RK_PA0 8 &pcfg_pull_none>,
+				/* spi4_mosi_m1 */
+				<3 RK_PA1 8 &pcfg_pull_none>;
+		};
+
+		spi4m1_cs0: spi4m1-cs0 {
+			rockchip,pins =
+				/* spi4_cs0_m1 */
+				<3 RK_PA3 8 &pcfg_pull_none>;
+		};
+
+		spi4m1_cs1: spi4m1-cs1 {
+			rockchip,pins =
+				/* spi4_cs1_m1 */
+				<3 RK_PA4 8 &pcfg_pull_none>;
+		};
+
+		spi4m2_pins: spi4m2-pins {
+			rockchip,pins =
+				/* spi4_clk_m2 */
+				<1 RK_PA2 8 &pcfg_pull_none>,
+				/* spi4_miso_m2 */
+				<1 RK_PA0 8 &pcfg_pull_none>,
+				/* spi4_mosi_m2 */
+				<1 RK_PA1 8 &pcfg_pull_none>;
+		};
+
+		spi4m2_cs0: spi4m2-cs0 {
+			rockchip,pins =
+				/* spi4_cs0_m2 */
+				<1 RK_PA3 8 &pcfg_pull_none>;
+		};
+	};
+
+	tsadc {
+		tsadcm1_shut: tsadcm1-shut {
+			rockchip,pins =
+				/* tsadcm1_shut */
+				<0 RK_PA2 2 &pcfg_pull_none>;
+		};
+
+		tsadc_shut: tsadc-shut {
+			rockchip,pins =
+				/* tsadc_shut */
+				<0 RK_PA1 2 &pcfg_pull_none>;
+		};
+
+		tsadc_shut_org: tsadc-shut-org {
+			rockchip,pins =
+				/* tsadc_shut_org */
+				<0 RK_PA1 1 &pcfg_pull_none>;
+		};
+	};
+
+	uart0 {
+		uart0m0_xfer: uart0m0-xfer {
+			rockchip,pins =
+				/* uart0_rx_m0 */
+				<0 RK_PC4 4 &pcfg_pull_up>,
+				/* uart0_tx_m0 */
+				<0 RK_PC5 4 &pcfg_pull_up>;
+		};
+
+		uart0m1_xfer: uart0m1-xfer {
+			rockchip,pins =
+				/* uart0_rx_m1 */
+				<0 RK_PB0 4 &pcfg_pull_up>,
+				/* uart0_tx_m1 */
+				<0 RK_PB1 4 &pcfg_pull_up>;
+		};
+
+		uart0m2_xfer: uart0m2-xfer {
+			rockchip,pins =
+				/* uart0_rx_m2 */
+				<4 RK_PA4 10 &pcfg_pull_up>,
+				/* uart0_tx_m2 */
+				<4 RK_PA3 10 &pcfg_pull_up>;
+		};
+
+		uart0_ctsn: uart0-ctsn {
+			rockchip,pins =
+				/* uart0_ctsn */
+				<0 RK_PD1 4 &pcfg_pull_none>;
+		};
+
+		uart0_rtsn: uart0-rtsn {
+			rockchip,pins =
+				/* uart0_rtsn */
+				<0 RK_PC6 4 &pcfg_pull_none>;
+		};
+	};
+
+	uart1 {
+		uart1m1_xfer: uart1m1-xfer {
+			rockchip,pins =
+				/* uart1_rx_m1 */
+				<1 RK_PB7 10 &pcfg_pull_up>,
+				/* uart1_tx_m1 */
+				<1 RK_PB6 10 &pcfg_pull_up>;
+		};
+
+		uart1m1_ctsn: uart1m1-ctsn {
+			rockchip,pins =
+				/* uart1m1_ctsn */
+				<1 RK_PD7 10 &pcfg_pull_none>;
+		};
+
+		uart1m1_rtsn: uart1m1-rtsn {
+			rockchip,pins =
+				/* uart1m1_rtsn */
+				<1 RK_PD6 10 &pcfg_pull_none>;
+		};
+
+		uart1m2_xfer: uart1m2-xfer {
+			rockchip,pins =
+				/* uart1_rx_m2 */
+				<0 RK_PD2 10 &pcfg_pull_up>,
+				/* uart1_tx_m2 */
+				<0 RK_PD1 10 &pcfg_pull_up>;
+		};
+
+		uart1m2_ctsn: uart1m2-ctsn {
+			rockchip,pins =
+				/* uart1m2_ctsn */
+				<0 RK_PD0 10 &pcfg_pull_none>;
+		};
+
+		uart1m2_rtsn: uart1m2-rtsn {
+			rockchip,pins =
+				/* uart1m2_rtsn */
+				<0 RK_PC7 10 &pcfg_pull_none>;
+		};
+	};
+
+	uart2 {
+		uart2m0_xfer: uart2m0-xfer {
+			rockchip,pins =
+				/* uart2_rx_m0 */
+				<0 RK_PB6 10 &pcfg_pull_up>,
+				/* uart2_tx_m0 */
+				<0 RK_PB5 10 &pcfg_pull_up>;
+		};
+
+		uart2m1_xfer: uart2m1-xfer {
+			rockchip,pins =
+				/* uart2_rx_m1 */
+				<4 RK_PD1 10 &pcfg_pull_up>,
+				/* uart2_tx_m1 */
+				<4 RK_PD0 10 &pcfg_pull_up>;
+		};
+
+		uart2m2_xfer: uart2m2-xfer {
+			rockchip,pins =
+				/* uart2_rx_m2 */
+				<3 RK_PB2 10 &pcfg_pull_up>,
+				/* uart2_tx_m2 */
+				<3 RK_PB1 10 &pcfg_pull_up>;
+		};
+
+		uart2_ctsn: uart2-ctsn {
+			rockchip,pins =
+				/* uart2_ctsn */
+				<3 RK_PB4 10 &pcfg_pull_none>;
+		};
+
+		uart2_rtsn: uart2-rtsn {
+			rockchip,pins =
+				/* uart2_rtsn */
+				<3 RK_PB3 10 &pcfg_pull_none>;
+		};
+	};
+
+	uart3 {
+		uart3m0_xfer: uart3m0-xfer {
+			rockchip,pins =
+				/* uart3_rx_m0 */
+				<1 RK_PC0 10 &pcfg_pull_up>,
+				/* uart3_tx_m0 */
+				<1 RK_PC1 10 &pcfg_pull_up>;
+		};
+
+		uart3m1_xfer: uart3m1-xfer {
+			rockchip,pins =
+				/* uart3_rx_m1 */
+				<3 RK_PB6 10 &pcfg_pull_up>,
+				/* uart3_tx_m1 */
+				<3 RK_PB5 10 &pcfg_pull_up>;
+		};
+
+		uart3m2_xfer: uart3m2-xfer {
+			rockchip,pins =
+				/* uart3_rx_m2 */
+				<4 RK_PA6 10 &pcfg_pull_up>,
+				/* uart3_tx_m2 */
+				<4 RK_PA5 10 &pcfg_pull_up>;
+		};
+
+		uart3_ctsn: uart3-ctsn {
+			rockchip,pins =
+				/* uart3_ctsn */
+				<1 RK_PC3 10 &pcfg_pull_none>;
+		};
+
+		uart3_rtsn: uart3-rtsn {
+			rockchip,pins =
+				/* uart3_rtsn */
+				<1 RK_PC2 10 &pcfg_pull_none>;
+		};
+	};
+
+	uart4 {
+		uart4m0_xfer: uart4m0-xfer {
+			rockchip,pins =
+				/* uart4_rx_m0 */
+				<1 RK_PD3 10 &pcfg_pull_up>,
+				/* uart4_tx_m0 */
+				<1 RK_PD2 10 &pcfg_pull_up>;
+		};
+
+		uart4m1_xfer: uart4m1-xfer {
+			rockchip,pins =
+				/* uart4_rx_m1 */
+				<3 RK_PD0 10 &pcfg_pull_up>,
+				/* uart4_tx_m1 */
+				<3 RK_PD1 10 &pcfg_pull_up>;
+		};
+
+		uart4m2_xfer: uart4m2-xfer {
+			rockchip,pins =
+				/* uart4_rx_m2 */
+				<1 RK_PB2 10 &pcfg_pull_up>,
+				/* uart4_tx_m2 */
+				<1 RK_PB3 10 &pcfg_pull_up>;
+		};
+
+		uart4_ctsn: uart4-ctsn {
+			rockchip,pins =
+				/* uart4_ctsn */
+				<1 RK_PC7 10 &pcfg_pull_none>;
+		};
+
+		uart4_rtsn: uart4-rtsn {
+			rockchip,pins =
+				/* uart4_rtsn */
+				<1 RK_PC5 10 &pcfg_pull_none>;
+		};
+	};
+
+	uart5 {
+		uart5m0_xfer: uart5m0-xfer {
+			rockchip,pins =
+				/* uart5_rx_m0 */
+				<4 RK_PD4 10 &pcfg_pull_up>,
+				/* uart5_tx_m0 */
+				<4 RK_PD5 10 &pcfg_pull_up>;
+		};
+
+		uart5m0_ctsn: uart5m0-ctsn {
+			rockchip,pins =
+				/* uart5m0_ctsn */
+				<4 RK_PD2 10 &pcfg_pull_none>;
+		};
+
+		uart5m0_rtsn: uart5m0-rtsn {
+			rockchip,pins =
+				/* uart5m0_rtsn */
+				<4 RK_PD3 10 &pcfg_pull_none>;
+		};
+
+		uart5m1_xfer: uart5m1-xfer {
+			rockchip,pins =
+				/* uart5_rx_m1 */
+				<3 RK_PC5 10 &pcfg_pull_up>,
+				/* uart5_tx_m1 */
+				<3 RK_PC4 10 &pcfg_pull_up>;
+		};
+
+		uart5m1_ctsn: uart5m1-ctsn {
+			rockchip,pins =
+				/* uart5m1_ctsn */
+				<2 RK_PA2 10 &pcfg_pull_none>;
+		};
+
+		uart5m1_rtsn: uart5m1-rtsn {
+			rockchip,pins =
+				/* uart5m1_rtsn */
+				<2 RK_PA3 10 &pcfg_pull_none>;
+		};
+
+		uart5m2_xfer: uart5m2-xfer {
+			rockchip,pins =
+				/* uart5_rx_m2 */
+				<2 RK_PD4 10 &pcfg_pull_up>,
+				/* uart5_tx_m2 */
+				<2 RK_PD5 10 &pcfg_pull_up>;
+		};
+	};
+
+	uart6 {
+		uart6m1_xfer: uart6m1-xfer {
+			rockchip,pins =
+				/* uart6_rx_m1 */
+				<1 RK_PA0 10 &pcfg_pull_up>,
+				/* uart6_tx_m1 */
+				<1 RK_PA1 10 &pcfg_pull_up>;
+		};
+
+		uart6m1_ctsn: uart6m1-ctsn {
+			rockchip,pins =
+				/* uart6m1_ctsn */
+				<1 RK_PA3 10 &pcfg_pull_none>;
+		};
+
+		uart6m1_rtsn: uart6m1-rtsn {
+			rockchip,pins =
+				/* uart6m1_rtsn */
+				<1 RK_PA2 10 &pcfg_pull_none>;
+		};
+
+		uart6m2_xfer: uart6m2-xfer {
+			rockchip,pins =
+				/* uart6_rx_m2 */
+				<1 RK_PD1 10 &pcfg_pull_up>,
+				/* uart6_tx_m2 */
+				<1 RK_PD0 10 &pcfg_pull_up>;
+		};
+	};
+
+	uart7 {
+		uart7m1_xfer: uart7m1-xfer {
+			rockchip,pins =
+				/* uart7_rx_m1 */
+				<3 RK_PC1 10 &pcfg_pull_up>,
+				/* uart7_tx_m1 */
+				<3 RK_PC0 10 &pcfg_pull_up>;
+		};
+
+		uart7m1_ctsn: uart7m1-ctsn {
+			rockchip,pins =
+				/* uart7m1_ctsn */
+				<3 RK_PC3 10 &pcfg_pull_none>;
+		};
+
+		uart7m1_rtsn: uart7m1-rtsn {
+			rockchip,pins =
+				/* uart7m1_rtsn */
+				<3 RK_PC2 10 &pcfg_pull_none>;
+		};
+
+		uart7m2_xfer: uart7m2-xfer {
+			rockchip,pins =
+				/* uart7_rx_m2 */
+				<1 RK_PB4 10 &pcfg_pull_up>,
+				/* uart7_tx_m2 */
+				<1 RK_PB5 10 &pcfg_pull_up>;
+		};
+	};
+
+	uart8 {
+		uart8m0_xfer: uart8m0-xfer {
+			rockchip,pins =
+				/* uart8_rx_m0 */
+				<4 RK_PB1 10 &pcfg_pull_up>,
+				/* uart8_tx_m0 */
+				<4 RK_PB0 10 &pcfg_pull_up>;
+		};
+
+		uart8m0_ctsn: uart8m0-ctsn {
+			rockchip,pins =
+				/* uart8m0_ctsn */
+				<4 RK_PB3 10 &pcfg_pull_none>;
+		};
+
+		uart8m0_rtsn: uart8m0-rtsn {
+			rockchip,pins =
+				/* uart8m0_rtsn */
+				<4 RK_PB2 10 &pcfg_pull_none>;
+		};
+
+		uart8m1_xfer: uart8m1-xfer {
+			rockchip,pins =
+				/* uart8_rx_m1 */
+				<3 RK_PA3 10 &pcfg_pull_up>,
+				/* uart8_tx_m1 */
+				<3 RK_PA2 10 &pcfg_pull_up>;
+		};
+
+		uart8m1_ctsn: uart8m1-ctsn {
+			rockchip,pins =
+				/* uart8m1_ctsn */
+				<3 RK_PA5 10 &pcfg_pull_none>;
+		};
+
+		uart8m1_rtsn: uart8m1-rtsn {
+			rockchip,pins =
+				/* uart8m1_rtsn */
+				<3 RK_PA4 10 &pcfg_pull_none>;
+		};
+
+		uart8_xfer: uart8-xfer {
+			rockchip,pins =
+				/* uart8_rx_ */
+				<4 RK_PB1 10 &pcfg_pull_up>;
+		};
+	};
+
+	uart9 {
+		uart9m1_xfer: uart9m1-xfer {
+			rockchip,pins =
+				/* uart9_rx_m1 */
+				<4 RK_PB5 10 &pcfg_pull_up>,
+				/* uart9_tx_m1 */
+				<4 RK_PB4 10 &pcfg_pull_up>;
+		};
+
+		uart9m1_ctsn: uart9m1-ctsn {
+			rockchip,pins =
+				/* uart9m1_ctsn */
+				<4 RK_PA1 10 &pcfg_pull_none>;
+		};
+
+		uart9m1_rtsn: uart9m1-rtsn {
+			rockchip,pins =
+				/* uart9m1_rtsn */
+				<4 RK_PA0 10 &pcfg_pull_none>;
+		};
+
+		uart9m2_xfer: uart9m2-xfer {
+			rockchip,pins =
+				/* uart9_rx_m2 */
+				<3 RK_PD4 10 &pcfg_pull_up>,
+				/* uart9_tx_m2 */
+				<3 RK_PD5 10 &pcfg_pull_up>;
+		};
+
+		uart9m2_ctsn: uart9m2-ctsn {
+			rockchip,pins =
+				/* uart9m2_ctsn */
+				<3 RK_PD3 10 &pcfg_pull_none>;
+		};
+
+		uart9m2_rtsn: uart9m2-rtsn {
+			rockchip,pins =
+				/* uart9m2_rtsn */
+				<3 RK_PD2 10 &pcfg_pull_none>;
+		};
+	};
+
+	vop {
+		vop_pins: vop-pins {
+			rockchip,pins =
+				/* vop_post_empty */
+				<1 RK_PA2 1 &pcfg_pull_none>;
+		};
+	};
+};
+
+/*
+ * This part is edited handly.
+ */
+&pinctrl {
+	gpio-func {
+		tsadc_gpio_func: tsadc-gpio-func {
+			rockchip,pins =
+				<0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	spi0-hs {
+		spi0m0_pins_hs: spi0m0-pins {
+			rockchip,pins =
+				/* spi0_clk_m0 */
+				<0 RK_PC6 8 &pcfg_pull_up_drv_level_1>,
+				/* spi0_miso_m0 */
+				<0 RK_PC7 8 &pcfg_pull_up_drv_level_1>,
+				/* spi0_mosi_m0 */
+				<0 RK_PC0 8 &pcfg_pull_up_drv_level_1>;
+		};
+
+		spi0m1_pins_hs: spi0m1-pins {
+			rockchip,pins =
+				/* spi0_clk_m1 */
+				<4 RK_PA2 8 &pcfg_pull_up_drv_level_1>,
+				/* spi0_miso_m1 */
+				<4 RK_PA0 8 &pcfg_pull_up_drv_level_1>,
+				/* spi0_mosi_m1 */
+				<4 RK_PA1 8 &pcfg_pull_up_drv_level_1>;
+		};
+
+		spi0m2_pins_hs: spi0m2-pins {
+			rockchip,pins =
+				/* spi0_clk_m2 */
+				<1 RK_PB3 8 &pcfg_pull_up_drv_level_1>,
+				/* spi0_miso_m2 */
+				<1 RK_PB1 8 &pcfg_pull_up_drv_level_1>,
+				/* spi0_mosi_m2 */
+				<1 RK_PB2 8 &pcfg_pull_up_drv_level_1>;
+		};
+
+		spi0m3_pins_hs: spi0m3-pins {
+			rockchip,pins =
+				/* spi0_clk_m3 */
+				<3 RK_PD3 8 &pcfg_pull_up_drv_level_1>,
+				/* spi0_miso_m3 */
+				<3 RK_PD1 8 &pcfg_pull_up_drv_level_1>,
+				/* spi0_mosi_m3 */
+				<3 RK_PD2 8 &pcfg_pull_up_drv_level_1>;
+		};
+	};
+
+	spi1-hs {
+		spi1m1_pins_hs: spi1m1-pins {
+			rockchip,pins =
+				/* spi1_clk_m1 */
+				<3 RK_PC1 8 &pcfg_pull_up_drv_level_1>,
+				/* spi1_miso_m1 */
+				<3 RK_PC0 8 &pcfg_pull_up_drv_level_1>,
+				/* spi1_mosi_m1 */
+				<3 RK_PB7 8 &pcfg_pull_up_drv_level_1>;
+		};
+
+		spi1m2_pins_hs: spi1m2-pins {
+			rockchip,pins =
+				/* spi1_clk_m2 */
+				<1 RK_PD2 8 &pcfg_pull_up_drv_level_1>,
+				/* spi1_miso_m2 */
+				<1 RK_PD0 8 &pcfg_pull_up_drv_level_1>,
+				/* spi1_mosi_m2 */
+				<1 RK_PD1 8 &pcfg_pull_up_drv_level_1>;
+		};
+	};
+
+	spi2-hs {
+		spi2m0_pins_hs: spi2m0-pins {
+			rockchip,pins =
+				/* spi2_clk_m0 */
+				<1 RK_PA6 8 &pcfg_pull_up_drv_level_1>,
+				/* spi2_miso_m0 */
+				<1 RK_PA4 8 &pcfg_pull_up_drv_level_1>,
+				/* spi2_mosi_m0 */
+				<1 RK_PA5 8 &pcfg_pull_up_drv_level_1>;
+		};
+
+		spi2m1_pins_hs: spi2m1-pins {
+			rockchip,pins =
+				/* spi2_clk_m1 */
+				<4 RK_PA6 8 &pcfg_pull_up_drv_level_1>,
+				/* spi2_miso_m1 */
+				<4 RK_PA4 8 &pcfg_pull_up_drv_level_1>,
+				/* spi2_mosi_m1 */
+				<4 RK_PA5 8 &pcfg_pull_up_drv_level_1>;
+		};
+
+		spi2m2_pins_hs: spi2m2-pins {
+			rockchip,pins =
+				/* spi2_clk_m2 */
+				<0 RK_PA5 1 &pcfg_pull_up_drv_level_1>,
+				/* spi2_miso_m2 */
+				<0 RK_PB3 1 &pcfg_pull_up_drv_level_1>,
+				/* spi2_mosi_m2 */
+				<0 RK_PA6 1 &pcfg_pull_up_drv_level_1>;
+		};
+	};
+
+	spi3-hs {
+		spi3m1_pins_hs: spi3m1-pins {
+			rockchip,pins =
+				/* spi3_clk_m1 */
+				<4 RK_PB7 8 &pcfg_pull_up_drv_level_1>,
+				/* spi3_miso_m1 */
+				<4 RK_PB5 8 &pcfg_pull_up_drv_level_1>,
+				/* spi3_mosi_m1 */
+				<4 RK_PB6 8 &pcfg_pull_up_drv_level_1>;
+		};
+
+		spi3m2_pins_hs: spi3m2-pins {
+			rockchip,pins =
+				/* spi3_clk_m2 */
+				<0 RK_PD3 8 &pcfg_pull_up_drv_level_1>,
+				/* spi3_miso_m2 */
+				<0 RK_PD0 8 &pcfg_pull_up_drv_level_1>,
+				/* spi3_mosi_m2 */
+				<0 RK_PD2 8 &pcfg_pull_up_drv_level_1>;
+		};
+
+		spi3m3_pins_hs: spi3m3-pins {
+			rockchip,pins =
+				/* spi3_clk_m3 */
+				<3 RK_PD0 8 &pcfg_pull_up_drv_level_1>,
+				/* spi3_miso_m3 */
+				<3 RK_PC6 8 &pcfg_pull_up_drv_level_1>,
+				/* spi3_mosi_m3 */
+				<3 RK_PC7 8 &pcfg_pull_up_drv_level_1>;
+		};
+	};
+
+	spi4-hs {
+		spi4m0_pins_hs: spi4m0-pins {
+			rockchip,pins =
+				/* spi4_clk_m0 */
+				<1 RK_PC2 8 &pcfg_pull_up_drv_level_1>,
+				/* spi4_miso_m0 */
+				<1 RK_PC0 8 &pcfg_pull_up_drv_level_1>,
+				/* spi4_mosi_m0 */
+				<1 RK_PC1 8 &pcfg_pull_up_drv_level_1>;
+		};
+
+		spi4m1_pins_hs: spi4m1-pins {
+			rockchip,pins =
+				/* spi4_clk_m1 */
+				<3 RK_PA2 8 &pcfg_pull_up_drv_level_1>,
+				/* spi4_miso_m1 */
+				<3 RK_PA0 8 &pcfg_pull_up_drv_level_1>,
+				/* spi4_mosi_m1 */
+				<3 RK_PA1 8 &pcfg_pull_up_drv_level_1>;
+		};
+
+		spi4m2_pins_hs: spi4m2-pins {
+			rockchip,pins =
+				/* spi4_clk_m2 */
+				<1 RK_PA2 8 &pcfg_pull_up_drv_level_1>,
+				/* spi4_miso_m2 */
+				<1 RK_PA0 8 &pcfg_pull_up_drv_level_1>,
+				/* spi4_mosi_m2 */
+				<1 RK_PA1 8 &pcfg_pull_up_drv_level_1>;
+		};
+	};
+};
diff --git a/arch/arm/dts/rk3588s.dtsi b/arch/arm/dts/rk3588s.dtsi
new file mode 100644
index 0000000000..0bef66b201
--- /dev/null
+++ b/arch/arm/dts/rk3588s.dtsi
@@ -0,0 +1,2370 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
+ */
+
+#include <dt-bindings/clock/rk3588-cru.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/phy/phy.h>
+#include <dt-bindings/power/rk3588-power.h>
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+	compatible = "rockchip,rk3588";
+
+	interrupt-parent = <&gic>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	aliases {
+		ethernet1 = &gmac1;
+		i2c0 = &i2c0;
+		i2c1 = &i2c1;
+		i2c2 = &i2c2;
+		i2c3 = &i2c3;
+		i2c4 = &i2c4;
+		i2c5 = &i2c5;
+		i2c6 = &i2c6;
+		i2c7 = &i2c7;
+		i2c8 = &i2c8;
+		serial0 = &uart0;
+		serial1 = &uart1;
+		serial2 = &uart2;
+		serial3 = &uart3;
+		serial4 = &uart4;
+		serial5 = &uart5;
+		serial6 = &uart6;
+		serial7 = &uart7;
+		serial8 = &uart8;
+		serial9 = &uart9;
+		spi0 = &spi0;
+		spi1 = &spi1;
+		spi2 = &spi2;
+		spi3 = &spi3;
+		spi4 = &spi4;
+		spi5 = &sfc;
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu-map {
+			cluster0 {
+				core0 {
+					cpu = <&cpu_l0>;
+				};
+				core1 {
+					cpu = <&cpu_l1>;
+				};
+				core2 {
+					cpu = <&cpu_l2>;
+				};
+				core3 {
+					cpu = <&cpu_l3>;
+				};
+			};
+			cluster1 {
+				core0 {
+					cpu = <&cpu_b0>;
+				};
+				core1 {
+					cpu = <&cpu_b1>;
+				};
+			};
+			cluster2 {
+				core0 {
+					cpu = <&cpu_b2>;
+				};
+				core1 {
+					cpu = <&cpu_b3>;
+				};
+			};
+		};
+
+		cpu_l0: cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a55";
+			reg = <0x0>;
+			enable-method = "psci";
+			capacity-dmips-mhz = <530>;
+		};
+
+		cpu_l1: cpu@100 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a55";
+			reg = <0x100>;
+			enable-method = "psci";
+			capacity-dmips-mhz = <530>;
+		};
+
+		cpu_l2: cpu@200 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a55";
+			reg = <0x200>;
+			enable-method = "psci";
+			capacity-dmips-mhz = <530>;
+		};
+
+		cpu_l3: cpu@300 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a55";
+			reg = <0x300>;
+			enable-method = "psci";
+			capacity-dmips-mhz = <530>;
+		};
+
+		cpu_b0: cpu@400 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a76";
+			reg = <0x400>;
+			enable-method = "psci";
+			capacity-dmips-mhz = <1024>;
+		};
+
+		cpu_b1: cpu@500 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a76";
+			reg = <0x500>;
+			enable-method = "psci";
+			capacity-dmips-mhz = <1024>;
+		};
+
+		cpu_b2: cpu@600 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a76";
+			reg = <0x600>;
+			enable-method = "psci";
+			capacity-dmips-mhz = <1024>;
+		};
+
+		cpu_b3: cpu@700 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a76";
+			reg = <0x700>;
+			enable-method = "psci";
+			capacity-dmips-mhz = <1024>;
+		};
+	};
+
+	arm_pmu: arm-pmu {
+		compatible = "arm,armv8-pmuv3";
+		interrupts = <GIC_PPI 8 IRQ_TYPE_LEVEL_LOW>;
+		interrupt-affinity = <&cpu_l0>, <&cpu_l1>, <&cpu_l2>, <&cpu_l3>,
+				     <&cpu_b0>, <&cpu_b1>, <&cpu_b2>, <&cpu_b3>;
+	};
+
+	firmware: firmware {
+		optee: optee {
+			compatible = "linaro,optee-tz";
+			method = "smc";
+		};
+
+		scmi: scmi {
+			compatible = "arm,scmi-smc";
+			shmem = <&scmi_shmem>;
+			arm,smc-id = <0x82000010>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			scmi_clk: protocol@14 {
+				reg = <0x14>;
+				#clock-cells = <1>;
+
+				assigned-clocks = <&scmi_clk SCMI_SPLL>;
+				assigned-clock-rates = <700000000>;
+			};
+
+			scmi_reset: protocol@16 {
+				reg = <0x16>;
+				#reset-cells = <1>;
+			};
+		};
+
+		sdei: sdei {
+			compatible = "arm,sdei-1.0";
+			method = "smc";
+		};
+	};
+
+	psci: psci {
+		compatible = "arm,psci-1.0";
+		method = "smc";
+	};
+
+	spll: spll {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <702000000>;
+		clock-output-names = "spll";
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+	};
+
+	xin32k: xin32k {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <32768>;
+		clock-output-names = "xin32k";
+	};
+
+	xin24m: xin24m {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <24000000>;
+		clock-output-names = "xin24m";
+	};
+
+	sram: sram@10f000 {
+		compatible = "mmio-sram";
+		reg = <0x0 0x0010f000 0x0 0x100>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0x0 0x0010f000 0x100>;
+
+		scmi_shmem: scmi_shmem@0 {
+			compatible = "arm,scmi-shmem";
+			reg = <0x0 0x100>;
+		};
+	};
+
+	usbdrd3_0: usbdrd3_0 {
+		compatible = "rockchip,rk3588-dwc3", "rockchip,rk3399-dwc3";
+		clocks = <&cru REF_CLK_USB3OTG0>, <&cru SUSPEND_CLK_USB3OTG0>,
+			 <&cru ACLK_USB3OTG0>;
+		clock-names = "ref", "suspend", "bus";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+		status = "disabled";
+
+		usbdrd_dwc3_0: usb@fc000000 {
+			compatible = "snps,dwc3";
+			reg = <0x0 0xfc000000 0x0 0x400000>;
+			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
+			power-domains = <&power RK3588_PD_USB>;
+			resets = <&cru SRST_A_USB3OTG0>;
+			reset-names = "usb3-otg";
+			dr_mode = "otg";
+			phy_type = "utmi_wide";
+			snps,dis_enblslpm_quirk;
+			snps,dis-u1-entry-quirk;
+			snps,dis-u2-entry-quirk;
+			snps,dis-u2-freeclk-exists-quirk;
+			snps,dis-del-phy-power-chg-quirk;
+			snps,dis-tx-ipgap-linecheck-quirk;
+			status = "disabled";
+		};
+	};
+
+	usb_host0_ehci: usb@fc800000 {
+		compatible = "generic-ehci";
+		reg = <0x0 0xfc800000 0x0 0x40000>;
+		interrupts = <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST_ARB0>;
+		clock-names = "usbhost", "arbiter";
+		power-domains = <&power RK3588_PD_USB>;
+		status = "disabled";
+	};
+
+	usb_host0_ohci: usb@fc840000 {
+		compatible = "generic-ohci";
+		reg = <0x0 0xfc840000 0x0 0x40000>;
+		interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST_ARB0>;
+		clock-names = "usbhost", "arbiter";
+		power-domains = <&power RK3588_PD_USB>;
+		status = "disabled";
+	};
+
+	usb_host1_ehci: usb@fc880000 {
+		compatible = "generic-ehci";
+		reg = <0x0 0xfc880000 0x0 0x40000>;
+		interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST_ARB1>;
+		clock-names = "usbhost", "arbiter";
+		power-domains = <&power RK3588_PD_USB>;
+		status = "disabled";
+	};
+
+	usb_host1_ohci: usb@fc8c0000 {
+		compatible = "generic-ohci";
+		reg = <0x0 0xfc8c0000 0x0 0x40000>;
+		interrupts = <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST_ARB1>;
+		clock-names = "usbhost", "arbiter";
+		power-domains = <&power RK3588_PD_USB>;
+		status = "disabled";
+	};
+
+	mmu600_pcie: iommu@fc900000 {
+		compatible = "arm,smmu-v3";
+		reg = <0x0 0xfc900000 0x0 0x200000>;
+		interrupts = <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "eventq", "gerror", "priq", "cmdq-sync";
+		#iommu-cells = <1>;
+		status = "disabled";
+	};
+
+	mmu600_php: iommu@fcb00000 {
+		compatible = "arm,smmu-v3";
+		reg = <0x0 0xfcb00000 0x0 0x200000>;
+		interrupts = <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "eventq", "gerror", "priq", "cmdq-sync";
+		#iommu-cells = <1>;
+		status = "disabled";
+	};
+
+	usbhost3_0: usbhost3_0 {
+		compatible = "rockchip,rk3588-dwc3", "rockchip,rk3399-dwc3";
+		clocks = <&cru REF_CLK_USB3OTG2>, <&cru SUSPEND_CLK_USB3OTG2>,
+			 <&cru ACLK_USB3OTG2>, <&cru CLK_UTMI_OTG2>;
+		clock-names = "ref", "suspend", "bus", "utmi";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+		status = "disabled";
+
+		usbhost_dwc3_0: usb@fcd00000 {
+			compatible = "snps,dwc3";
+			reg = <0x0 0xfcd00000 0x0 0x400000>;
+			interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>;
+			power-domains = <&power RK3588_PD_PHP>;
+			resets = <&cru SRST_A_USB3OTG2>;
+			reset-names = "usb3-host";
+			dr_mode = "host";
+			phy_type = "utmi_wide";
+			snps,dis_enblslpm_quirk;
+			snps,dis-u2-freeclk-exists-quirk;
+			snps,dis-del-phy-power-chg-quirk;
+			snps,dis-tx-ipgap-linecheck-quirk;
+			status = "disabled";
+		};
+	};
+
+	sys_grf: syscon@fd58c000 {
+		compatible = "rockchip,rk3588-sys-grf", "syscon";
+		reg = <0x0 0xfd58c000 0x0 0x1000>;
+	};
+
+	vo0_grf: syscon@fd5a6000 {
+		compatible = "rockchip,rk3588-vo-grf", "syscon";
+		reg = <0x0 0xfd5a6000 0x0 0x2000>;
+	};
+
+	vo1_grf: syscon@fd5a8000 {
+		compatible = "rockchip,rk3588-vo-grf", "syscon";
+		reg = <0x0 0xfd5a8000 0x0 0x100>;
+	};
+
+	usb_grf: syscon@fd5ac000 {
+		compatible = "rockchip,rk3588-usb-grf", "syscon";
+		reg = <0x0 0xfd5ac000 0x0 0x4000>;
+	};
+
+	php_grf: syscon@fd5b0000 {
+		compatible = "rockchip,rk3588-php-grf", "syscon";
+		reg = <0x0 0xfd5b0000 0x0 0x1000>;
+	};
+
+	pipe_phy0_grf: syscon@fd5bc000 {
+		compatible = "rockchip,pipe-phy-grf", "syscon";
+		reg = <0x0 0xfd5bc000 0x0 0x100>;
+	};
+
+	pipe_phy2_grf: syscon@fd5c4000 {
+		compatible = "rockchip,pipe-phy-grf", "syscon";
+		reg = <0x0 0xfd5c4000 0x0 0x100>;
+	};
+
+	usbdpphy0_grf: syscon@fd5c8000 {
+		compatible = "rockchip,rk3588-usbdpphy-grf", "syscon";
+		reg = <0x0 0xfd5c8000 0x0 0x4000>;
+	};
+
+	usb2phy0_grf: syscon@fd5d0000 {
+		compatible = "rockchip,rk3588-usb2phy-grf", "syscon",
+			     "simple-mfd";
+		reg = <0x0 0xfd5d0000 0x0 0x4000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		u2phy0: usb2-phy@0 {
+			compatible = "rockchip,rk3588-usb2phy";
+			reg = <0x0 0x10>;
+			interrupts = <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>;
+			clock-names = "phyclk";
+			#clock-cells = <0>;
+			status = "disabled";
+
+			u2phy0_otg: otg-port {
+				#phy-cells = <0>;
+				status = "disabled";
+			};
+		};
+	};
+
+	usb2phy2_grf: syscon@fd5d8000 {
+		compatible = "rockchip,rk3588-usb2phy-grf", "syscon",
+			     "simple-mfd";
+		reg = <0x0 0xfd5d8000 0x0 0x4000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		u2phy2: usb2-phy@8000 {
+			compatible = "rockchip,rk3588-usb2phy";
+			reg = <0x8000 0x10>;
+			interrupts = <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>;
+			clock-names = "phyclk";
+			#clock-cells = <0>;
+			status = "disabled";
+
+			u2phy2_host: host-port {
+				#phy-cells = <0>;
+				status = "disabled";
+			};
+		};
+	};
+
+	usb2phy3_grf: syscon@fd5dc000 {
+		compatible = "rockchip,rk3588-usb2phy-grf", "syscon",
+			     "simple-mfd";
+		reg = <0x0 0xfd5dc000 0x0 0x4000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		u2phy3: usb2-phy@c000 {
+			compatible = "rockchip,rk3588-usb2phy";
+			reg = <0xc000 0x10>;
+			interrupts = <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>;
+			clock-names = "phyclk";
+			#clock-cells = <0>;
+			status = "disabled";
+
+			u2phy3_host: host-port {
+				#phy-cells = <0>;
+				status = "disabled";
+			};
+		};
+	};
+
+	hdptxphy0_grf: syscon@fd5e0000 {
+		compatible = "rockchip,rk3588-hdptxphy-grf", "syscon";
+		reg = <0x0 0xfd5e0000 0x0 0x100>;
+	};
+
+	ioc: syscon@fd5f0000 {
+		compatible = "rockchip,rk3588-ioc", "syscon";
+		reg = <0x0 0xfd5f0000 0x0 0x10000>;
+	};
+
+	syssram: sram@fd600000 {
+		compatible = "mmio-sram";
+		reg = <0x0 0xfd600000 0x0 0x100000>;
+
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0x0 0x0 0xfd600000 0x100000>;
+	};
+
+	cru: clock-controller@fd7c0000 {
+		compatible = "rockchip,rk3588-cru";
+		rockchip,grf = <&php_grf>;
+		reg = <0x0 0xfd7c0000 0x0 0x5c000>;
+		#clock-cells = <1>;
+		#reset-cells = <1>;
+
+		assigned-clocks =
+			<&cru PLL_PPLL>, <&cru PLL_CPLL>,
+			<&cru PLL_NPLL>, <&cru PLL_GPLL>,
+			<&cru ARMCLK_L>, <&cru ARMCLK_B01>,
+			<&cru ACLK_CENTER_ROOT>, <&cru PCLK_CENTER_ROOT>,
+			<&cru HCLK_CENTER_ROOT>, <&cru ACLK_CENTER_LOW_ROOT>,
+			<&cru ACLK_TOP_ROOT>, <&cru PCLK_TOP_ROOT>,
+			<&cru ACLK_LOW_TOP_ROOT>, <&cru PCLK_PMU0_ROOT>,
+			<&cru HCLK_PMU_CM0_ROOT>;
+		assigned-clock-rates =
+			<100000000>, <1500000000>,
+			<850000000>,  <1188000000>,
+			<816000000>, <1008000000>,
+			<600000000>, <200000000>,
+			<400000000>, <500000000>,
+			<800000000>, <100000000>,
+			<400000000>, <100000000>,
+			<200000000>;
+	};
+
+	i2c0: i2c@fd880000 {
+		compatible = "rockchip,rk3588-i2c", "rockchip,rk3399-i2c";
+		reg = <0x0 0xfd880000 0x0 0x1000>;
+		clocks = <&cru CLK_I2C0>, <&cru PCLK_I2C0>;
+		clock-names = "i2c", "pclk";
+		interrupts = <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c0m0_xfer>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	uart0: serial@fd890000 {
+		compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xfd890000 0x0 0x100>;
+		interrupts = <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac0 6>, <&dmac0 7>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart0m0_xfer>;
+		status = "disabled";
+	};
+
+	pwm0: pwm@fd8b0000 {
+		compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xfd8b0000 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm0m0_pins>;
+		clocks = <&cru CLK_PMU1PWM>, <&cru PCLK_PMU1PWM>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm1: pwm@fd8b0010 {
+		compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xfd8b0010 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm1m0_pins>;
+		clocks = <&cru CLK_PMU1PWM>, <&cru PCLK_PMU1PWM>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm2: pwm@fd8b0020 {
+		compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xfd8b0020 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm2m0_pins>;
+		clocks = <&cru CLK_PMU1PWM>, <&cru PCLK_PMU1PWM>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm3: pwm@fd8b0030 {
+		compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xfd8b0030 0x0 0x10>;
+		interrupts = <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm3m0_pins>;
+		clocks = <&cru CLK_PMU1PWM>, <&cru PCLK_PMU1PWM>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pmu: power-management@fd8d8000 {
+		compatible = "rockchip,rk3588-pmu", "syscon", "simple-mfd";
+		reg = <0x0 0xfd8d8000 0x0 0x400>;
+
+		power: power-controller {
+			compatible = "rockchip,rk3588-power-controller";
+			#power-domain-cells = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "okay";
+
+			/* These power domains are grouped by VD_NPU */
+			power-domain@RK3588_PD_NPU {
+				reg = <RK3588_PD_NPU>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				power-domain@RK3588_PD_NPUTOP {
+					reg = <RK3588_PD_NPUTOP>;
+					#address-cells = <1>;
+					#size-cells = <0>;
+
+					power-domain@RK3588_PD_NPU1 {
+						reg = <RK3588_PD_NPU1>;
+					};
+					power-domain@RK3588_PD_NPU2 {
+						reg = <RK3588_PD_NPU2>;
+					};
+				};
+			};
+			/* These power domains are grouped by VD_GPU */
+			power-domain@RK3588_PD_GPU {
+				reg = <RK3588_PD_GPU>;
+			};
+			/* These power domains are grouped by VD_VCODEC */
+			power-domain@RK3588_PD_VCODEC {
+				reg = <RK3588_PD_VCODEC>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				power-domain@RK3588_PD_RKVDEC0 {
+					reg = <RK3588_PD_RKVDEC0>;
+				};
+				power-domain@RK3588_PD_RKVDEC1 {
+					reg = <RK3588_PD_RKVDEC1>;
+				};
+				power-domain@RK3588_PD_VENC0 {
+					reg = <RK3588_PD_VENC0>;
+					#address-cells = <1>;
+					#size-cells = <0>;
+
+					power-domain@RK3588_PD_VENC1 {
+						reg = <RK3588_PD_VENC1>;
+					};
+				};
+			};
+			/* These power domains are grouped by VD_LOGIC */
+			power-domain@RK3588_PD_VDPU {
+				reg = <RK3588_PD_VDPU>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				power-domain@RK3588_PD_RGA30 {
+					reg = <RK3588_PD_RGA30>;
+				};
+				power-domain@RK3588_PD_av1 {
+					reg = <RK3588_PD_AV1>;
+				};
+			};
+			power-domain@RK3588_PD_VOP {
+				reg = <RK3588_PD_VOP>;
+			};
+			power-domain@RK3588_PD_VO0 {
+				reg = <RK3588_PD_VO0>;
+			};
+			power-domain@RK3588_PD_VO1 {
+				reg = <RK3588_PD_VO1>;
+			};
+			power-domain@RK3588_PD_VI {
+				reg = <RK3588_PD_VI>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				power-domain@RK3588_PD_ISP1 {
+					reg = <RK3588_PD_ISP1>;
+				};
+				power-domain@RK3588_PD_FEC {
+					reg = <RK3588_PD_FEC>;
+				};
+			};
+			power-domain@RK3588_PD_RGA31 {
+				reg = <RK3588_PD_RGA31>;
+			};
+			power-domain@RK3588_PD_USB {
+				reg = <RK3588_PD_USB>;
+			};
+			power-domain@RK3588_PD_PHP {
+				reg = <RK3588_PD_PHP>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				power-domain@RK3588_PD_GMAC {
+					reg = <RK3588_PD_GMAC>;
+				};
+				power-domain@RK3588_PD_PCIE {
+					reg = <RK3588_PD_PCIE>;
+				};
+			};
+			power-domain@RK3588_PD_NVM {
+				reg = <RK3588_PD_NVM>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				power-domain@RK3588_PD_NVM0 {
+					reg = <RK3588_PD_NVM0>;
+				};
+			};
+			power-domain@RK3588_PD_SDIO {
+				reg = <RK3588_PD_SDIO>;
+			};
+			power-domain@RK3588_PD_AUDIO {
+				reg = <RK3588_PD_AUDIO>;
+			};
+			power-domain@RK3588_PD_SDMMC {
+				reg = <RK3588_PD_SDMMC>;
+			};
+		};
+	};
+
+	pvtm@fda40000 {
+		compatible = "rockchip,rk3588-bigcore0-pvtm";
+		reg = <0x0 0xfda40000 0x0 0x100>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		pvtm@0 {
+			reg = <0>;
+			clocks = <&cru CLK_BIGCORE0_PVTM>, <&cru PCLK_BIGCORE0_PVTM>;
+			clock-names = "clk", "pclk";
+		};
+	};
+
+	pvtm@fda50000 {
+		compatible = "rockchip,rk3588-bigcore1-pvtm";
+		reg = <0x0 0xfda50000 0x0 0x100>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		pvtm@1 {
+			reg = <1>;
+			clocks = <&cru CLK_BIGCORE1_PVTM>, <&cru PCLK_BIGCORE1_PVTM>;
+			clock-names = "clk", "pclk";
+		};
+	};
+
+	pvtm@fda60000 {
+		compatible = "rockchip,rk3588-litcore-pvtm";
+		reg = <0x0 0xfda60000 0x0 0x100>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		pvtm@2 {
+			reg = <2>;
+			clocks = <&cru CLK_LITCORE_PVTM>, <&cru PCLK_LITCORE_PVTM>;
+			clock-names = "clk", "pclk";
+		};
+	};
+
+	pvtm@fdaf0000 {
+		compatible = "rockchip,rk3588-npu-pvtm";
+		reg = <0x0 0xfdaf0000 0x0 0x100>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		pvtm@3 {
+			reg = <3>;
+			clocks = <&cru CLK_NPU_PVTM>, <&cru PCLK_NPU_PVTM>;
+			clock-names = "clk", "pclk";
+			resets = <&cru SRST_NPU_PVTM>, <&cru SRST_P_NPU_PVTM>;
+			reset-names = "rts", "rst-p";
+		};
+	};
+
+	pvtm@fdb30000 {
+		compatible = "rockchip,rk3588-gpu-pvtm";
+		reg = <0x0 0xfdb30000 0x0 0x100>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		pvtm@4 {
+			reg = <4>;
+			clocks = <&cru CLK_GPU_PVTM>, <&cru PCLK_GPU_PVTM>;
+			clock-names = "clk", "pclk";
+			resets = <&cru SRST_GPU_PVTM>, <&cru SRST_P_GPU_PVTM>;
+			reset-names = "rts", "rst-p";
+		};
+	};
+
+	npu0_mmu: iommu@fdab9000 {
+		compatible = "rockchip,iommu-v2";
+		reg = <0x0 0xfdab9000 0x0 0x100>, <0x0 0xfdaba000 0x0 0x100>;
+		interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "npu0_mmu";
+		clocks = <&cru ACLK_NPU0>, <&cru HCLK_NPU0>;
+		clock-names = "aclk", "iface";
+		power-domains = <&power RK3588_PD_NPUTOP>;
+		#iommu-cells = <0>;
+		status = "disabled";
+	};
+
+	npu1_mmu: iommu@fdaca000 {
+		compatible = "rockchip,iommu-v2";
+		reg = <0x0 0xfdaca000 0x0 0x100>;
+		interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "npu1_mmu";
+		clocks = <&cru ACLK_NPU1>, <&cru HCLK_NPU1>;
+		clock-names = "aclk", "iface";
+		power-domains = <&power RK3588_PD_NPU1>;
+		#iommu-cells = <0>;
+		status = "disabled";
+	};
+
+	npu2_mmu: iommu@fdada000 {
+		compatible = "rockchip,iommu-v2";
+		reg = <0x0 0xfdada000 0x0 0x100>;
+		interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "npu2_mmu";
+		clocks = <&cru ACLK_NPU2>, <&cru HCLK_NPU2>;
+		clock-names = "aclk", "iface";
+		power-domains = <&power RK3588_PD_NPU2>;
+		#iommu-cells = <0>;
+		status = "disabled";
+	};
+
+	vdpu_mmu: iommu@fdb50800 {
+		compatible = "rockchip,iommu-v2";
+		reg = <0x0 0xfdb50800 0x0 0x40>;
+		interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "irq_vdpu_mmu";
+		clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
+		clock-names = "aclk", "iface";
+		power-domains = <&power RK3588_PD_VDPU>;
+		#iommu-cells = <0>;
+		status = "disabled";
+	};
+
+	rga3_0_mmu: iommu@fdb60f00 {
+		compatible = "rockchip,iommu-v2";
+		reg = <0x0 0xfdb60f00 0x0 0x100>;
+		interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "rga3_0_mmu";
+		clocks = <&cru ACLK_RGA3_0>, <&cru HCLK_RGA3_0>;
+		clock-names = "aclk", "iface";
+		power-domains = <&power RK3588_PD_RGA30>;
+		#iommu-cells = <0>;
+		status = "disabled";
+	};
+
+	rga3_1_mmu: iommu@fdb70f00 {
+		compatible = "rockchip,iommu-v2";
+		reg = <0x0 0xfdb70f00 0x0 0x100>;
+		interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "rga3_1_mmu";
+		clocks = <&cru ACLK_RGA3_1>, <&cru HCLK_RGA3_1>;
+		clock-names = "aclk", "iface";
+		power-domains = <&power RK3588_PD_RGA31>;
+		#iommu-cells = <0>;
+		status = "disabled";
+	};
+
+	jpegd_mmu: iommu@fdb90480 {
+		compatible = "rockchip,iommu-v2";
+		reg = <0x0 0xfdb90480 0x0 0x40>;
+		interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "irq_jpegd_mmu";
+		clocks = <&cru ACLK_JPEG_DECODER>, <&cru HCLK_JPEG_DECODER>;
+		clock-names = "aclk", "iface";
+		power-domains = <&power RK3588_PD_VDPU>;
+		#iommu-cells = <0>;
+		status = "disabled";
+	};
+
+	jpege0_mmu: iommu@fdba0800 {
+		compatible = "rockchip,iommu-v2";
+		reg = <0x0 0xfdba0800 0x0 0x40>;
+		interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "irq_jpege0_mmu";
+		clocks = <&cru ACLK_JPEG_ENCODER0>, <&cru HCLK_JPEG_ENCODER0>;
+		clock-names = "aclk", "iface";
+		power-domains = <&power RK3588_PD_VDPU>;
+		#iommu-cells = <0>;
+		status = "disabled";
+	};
+
+	jpege1_mmu: iommu@fdba4800 {
+		compatible = "rockchip,iommu-v2";
+		reg = <0x0 0xfdba4800 0x0 0x40>;
+		interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "irq_jpege1_mmu";
+		clocks = <&cru ACLK_JPEG_ENCODER1>, <&cru HCLK_JPEG_ENCODER1>;
+		clock-names = "aclk", "iface";
+		power-domains = <&power RK3588_PD_VDPU>;
+		#iommu-cells = <0>;
+		status = "disabled";
+	};
+
+	jpege2_mmu: iommu@fdba8800 {
+		compatible = "rockchip,iommu-v2";
+		reg = <0x0 0xfdba8800 0x0 0x40>;
+		interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "irq_jpege2_mmu";
+		clocks = <&cru ACLK_JPEG_ENCODER2>, <&cru HCLK_JPEG_ENCODER2>;
+		clock-names = "aclk", "iface";
+		power-domains = <&power RK3588_PD_VDPU>;
+		#iommu-cells = <0>;
+		status = "disabled";
+	};
+
+	jpege3_mmu: iommu@fdbac800 {
+		compatible = "rockchip,iommu-v2";
+		reg = <0x0 0xfdbac800 0x0 0x40>;
+		interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "irq_jpege3_mmu";
+		clocks = <&cru ACLK_JPEG_ENCODER3>, <&cru HCLK_JPEG_ENCODER3>;
+		clock-names = "aclk", "iface";
+		power-domains = <&power RK3588_PD_VDPU>;
+		#iommu-cells = <0>;
+		status = "disabled";
+	};
+
+	iep_mmu: iommu@fdbb0800 {
+		compatible = "rockchip,iommu-v2";
+		reg = <0x0 0xfdbb0800 0x0 0x100>;
+		interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "irq_iep_mmu";
+		clocks = <&cru ACLK_IEP2P0>, <&cru HCLK_IEP2P0>;
+		clock-names = "aclk", "iface";
+		#iommu-cells = <0>;
+		power-domains = <&power RK3588_PD_VDPU>;
+		status = "disabled";
+	};
+
+	rkvenc0_mmu: iommu@fdbdf000 {
+		compatible = "rockchip,iommu-v2";
+		reg = <0x0 0xfdbdf000 0x0 0x40>, <0x0 0xfdbdf040 0x0 0x40>;
+		interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "irq_rkvenc0_mmu0", "irq_rkvenc0_mmu1";
+		clocks = <&cru ACLK_RKVENC0>, <&cru HCLK_RKVENC0>;
+		clock-names = "aclk", "iface";
+		rockchip,disable-mmu-reset;
+		rockchip,enable-cmd-retry;
+		#iommu-cells = <0>;
+		power-domains = <&power RK3588_PD_VENC0>;
+		status = "disabled";
+	};
+
+	rkvenc1_mmu: iommu@fdbef000 {
+		compatible = "rockchip,iommu-v2";
+		reg = <0x0 0xfdbef000 0x0 0x40>, <0x0 0xfdbef040 0x0 0x40>;
+		interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "irq_rkvenc1_mmu0", "irq_rkvenc1_mmu1";
+		clocks = <&cru ACLK_RKVENC1>, <&cru HCLK_RKVENC1>;
+		lock-names = "aclk", "iface";
+		rockchip,disable-mmu-reset;
+		rockchip,enable-cmd-retry;
+		#iommu-cells = <0>;
+		power-domains = <&power RK3588_PD_VENC1>;
+		status = "disabled";
+	};
+
+	rkvdec0_mmu: iommu@fdc38700 {
+		compatible = "rockchip,iommu-v2";
+		reg = <0x0 0xfdc38700 0x0 0x40>, <0x0 0xfdc38740 0x0 0x40>;
+		interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "irq_rkvdec0_mmu";
+		locks = <&cru ACLK_RKVDEC0>, <&cru HCLK_RKVDEC0>;
+		clock-names = "aclk", "iface";
+		rockchip,disable-mmu-reset;
+		rockchip,enable-cmd-retry;
+		#iommu-cells = <0>;
+		power-domains = <&power RK3588_PD_RKVDEC0>;
+		status = "disabled";
+	};
+
+	rkvdec1_mmu: iommu@fdc48700 {
+		compatible = "rockchip,iommu-v2";
+		reg = <0x0 0xfdc48700 0x0 0x40>, <0x0 0xfdc48740 0x0 0x40>;
+		interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "irq_rkvdec1_mmu";
+		clocks = <&cru ACLK_RKVDEC1>, <&cru HCLK_RKVDEC1>;
+		clock-names = "aclk", "iface";
+		rockchip,disable-mmu-reset;
+		rockchip,enable-cmd-retry;
+		#iommu-cells = <0>;
+		power-domains = <&power RK3588_PD_RKVDEC1>;
+		status = "disabled";
+	};
+
+	isp0_mmu: iommu@fdcb7f00 {
+		compatible = "rockchip,iommu-v2";
+		reg = <0x0 0xfdcb7f00 0x0 0x100>;
+		interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "isp0_mmu";
+		clocks = <&cru ACLK_ISP0>, <&cru HCLK_ISP0>;
+		clock-names = "aclk", "iface";
+		power-domains = <&power RK3588_PD_VI>;
+		#iommu-cells = <0>;
+		rockchip,disable-mmu-reset;
+		status = "disabled";
+	};
+
+	isp1_mmu: iommu@fdcc7f00 {
+		compatible = "rockchip,iommu-v2";
+		reg = <0x0 0xfdcc7f00 0x0 0x100>;
+		interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "isp1_mmu";
+		clocks = <&cru ACLK_ISP1>, <&cru HCLK_ISP1>;
+		clock-names = "aclk", "iface";
+		power-domains = <&power RK3588_PD_ISP1>;
+		#iommu-cells = <0>;
+		rockchip,disable-mmu-reset;
+		status = "disabled";
+	};
+
+	fec0_mmu: iommu@fdcd0f00 {
+		compatible = "rockchip,iommu-v2";
+		reg = <0x0 0xfdcd0f00 0x0 0x100>;
+		interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "fec0_mmu";
+		clocks = <&cru ACLK_FISHEYE0>, <&cru HCLK_FISHEYE0>;
+		clock-names = "aclk", "iface";
+		power-domains = <&power RK3588_PD_FEC>;
+		#iommu-cells = <0>;
+		status = "disabled";
+	};
+
+	fec1_mmu: iommu@fdcd8f00 {
+		compatible = "rockchip,iommu-v2";
+		reg = <0x0 0xfdcd8f00 0x0 0x100>;
+		interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "fec1_mmu";
+		clocks = <&cru ACLK_FISHEYE1>, <&cru HCLK_FISHEYE1>;
+		clock-names = "aclk", "iface";
+		power-domains = <&power RK3588_PD_FEC>;
+		#iommu-cells = <0>;
+		status = "disabled";
+	};
+
+	vop_mmu: iommu@fdd97e00 {
+		compatible = "rockchip,iommu-v2";
+		reg = <0x0 0xfdd97e00 0x0 0x100>, <0x0 0xfdd97f00 0x0 0x100>;
+		interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "vop_mmu";
+		clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>;
+		clock-names = "aclk", "iface";
+		#iommu-cells = <0>;
+		rockchip,disable-device-link-resume;
+		status = "disabled";
+	};
+
+	spdif_tx2: spdif-tx@fddb0000 {
+		compatible = "rockchip,rk3588-spdif", "rockchip,rk3568-spdif";
+		reg = <0x0 0xfddb0000 0x0 0x1000>;
+		interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
+		dmas = <&dmac1 6>;
+		dma-names = "tx";
+		clock-names = "mclk", "hclk";
+		clocks = <&cru MCLK_SPDIF2_DP0>, <&cru HCLK_SPDIF2_DP0>;
+		#sound-dai-cells = <0>;
+		status = "disabled";
+	};
+
+	i2s4_8ch: i2s@fddc0000 {
+		compatible = "rockchip,rk3588-i2s-tdm";
+		reg = <0x0 0xfddc0000 0x0 0x1000>;
+		interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru MCLK_I2S4_8CH_TX>, <&cru HCLK_I2S4_8CH>;
+		clock-names = "mclk_tx", "hclk";
+		dmas = <&dmac2 0>;
+		dma-names = "tx";
+		resets = <&cru SRST_M_I2S4_8CH_TX>;
+		reset-names = "tx-m";
+		#sound-dai-cells = <0>;
+		status = "disabled";
+	};
+
+	spdif_tx3: spdif-tx@fdde0000 {
+		compatible = "rockchip,rk3588-spdif", "rockchip,rk3568-spdif";
+		reg = <0x0 0xfdde0000 0x0 0x1000>;
+		interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>;
+		dmas = <&dmac1 7>;
+		dma-names = "tx";
+		clock-names = "mclk", "hclk";
+		clocks = <&cru MCLK_SPDIF3>, <&cru HCLK_SPDIF3>;
+		#sound-dai-cells = <0>;
+		status = "disabled";
+	};
+
+	i2s5_8ch: i2s@fddf0000 {
+		compatible = "rockchip,rk3588-i2s-tdm";
+		reg = <0x0 0xfddf0000 0x0 0x1000>;
+		interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru MCLK_I2S5_8CH_TX>, <&cru HCLK_I2S5_8CH>;
+		clock-names = "mclk_tx", "hclk";
+		dmas = <&dmac2 2>;
+		dma-names = "tx";
+		resets = <&cru SRST_M_I2S5_8CH_TX>;
+		reset-names = "tx-m";
+		#sound-dai-cells = <0>;
+		status = "disabled";
+	};
+
+	i2s9_8ch: i2s@fddfc000 {
+		compatible = "rockchip,rk3588-i2s-tdm";
+		reg = <0x0 0xfddfc000 0x0 0x1000>;
+		interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru MCLK_I2S9_8CH_RX>, <&cru HCLK_I2S9_8CH>;
+		clock-names = "mclk_rx", "hclk";
+		dmas = <&dmac2 23>;
+		dma-names = "rx";
+		resets = <&cru SRST_M_I2S9_8CH_RX>;
+		reset-names = "rx-m";
+		#sound-dai-cells = <0>;
+		status = "disabled";
+	};
+
+	spdif_rx0: spdif-rx@fde08000 {
+		compatible = "rockchip,rk3588-spdifrx", "rockchip,rk3308-spdifrx";
+		reg = <0x0 0xfde08000 0x0 0x1000>;
+		interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru MCLK_SPDIFRX0>, <&cru HCLK_SPDIFRX0>;
+		clock-names = "mclk", "hclk";
+		dmas = <&dmac0 21>;
+		dma-names = "rx";
+		resets = <&cru SRST_M_SPDIFRX0>;
+		reset-names = "spdifrx-m";
+		#sound-dai-cells = <0>;
+		status = "disabled";
+	};
+
+	edp0: edp@fdec0000 {
+		compatible = "rockchip,rk3588-edp";
+		reg = <0x0 0xfdec0000 0x0 0x1000>;
+		interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru CLK_EDP0_24M>, <&cru PCLK_EDP0>,
+			 <&cru CLK_EDP0_200M>;
+		clock-names = "dp", "pclk", "spdif";
+		resets = <&cru SRST_EDP0_24M>, <&cru SRST_P_EDP0>;
+		reset-names = "dp", "apb";
+		phys = <&hdptxphy0>;
+		phy-names = "dp";
+		power-domains = <&power RK3588_PD_VO1>;
+		rockchip,grf = <&vo1_grf>;
+		status = "disabled";
+	};
+
+	pcie2x1l1: pcie@fe180000 {
+		compatible = "rockchip,rk3588-pcie", "snps,dw-pcie";
+		#address-cells = <3>;
+		#size-cells = <2>;
+		bus-range = <0x30 0x3f>;
+		clocks = <&cru ACLK_PCIE_1L1_MSTR>, <&cru ACLK_PCIE_1L1_SLV>,
+			 <&cru ACLK_PCIE_1L1_DBI>, <&cru PCLK_PCIE_1L1>,
+			 <&cru CLK_PCIE_AUX3>;
+		clock-names = "aclk_mst", "aclk_slv",
+			      "aclk_dbi", "pclk", "aux";
+		device_type = "pci";
+		interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "sys", "pmc", "msg", "legacy", "err";
+		#interrupt-cells = <1>;
+		interrupt-map-mask = <0 0 0 7>;
+		interrupt-map = <0 0 0 1 &pcie2x1l1_intc 0>,
+				<0 0 0 2 &pcie2x1l1_intc 1>,
+				<0 0 0 3 &pcie2x1l1_intc 2>,
+				<0 0 0 4 &pcie2x1l1_intc 3>;
+		linux,pci-domain = <3>;
+		num-ib-windows = <8>;
+		num-ob-windows = <8>;
+		max-link-speed = <2>;
+		msi-map = <0x3000 &its 0x3000 0x1000>;
+		num-lanes = <1>;
+		phys = <&combphy2_psu PHY_TYPE_PCIE>;
+		phy-names = "pcie-phy";
+		power-domains = <&power RK3588_PD_PHP>;
+		ranges = <0x00000800 0x0 0xc0000000 0x9 0xc0000000 0x0 0x100000
+			  0x81000000 0x0 0xc0100000 0x9 0xc0100000 0x0 0x100000
+			  0x83000000 0x0 0xc0200000 0x9 0xc0200000 0x0 0x3fe00000>;
+		reg = <0xa 0x40c00000 0x0 0x400000>,
+		      <0x0 0xfe180000 0x0 0x10000>;
+		reg-names = "pcie-dbi", "pcie-apb";
+		resets = <&cru SRST_PCIE3_POWER_UP>;
+		reset-names = "pipe";
+		status = "disabled";
+
+		pcie2x1l1_intc: legacy-interrupt-controller {
+			interrupt-controller;
+			#address-cells = <0>;
+			#interrupt-cells = <1>;
+			interrupt-parent = <&gic>;
+			interrupts = <GIC_SPI 245 IRQ_TYPE_EDGE_RISING>;
+		};
+	};
+
+	pcie2x1l2: pcie@fe190000 {
+		compatible = "rockchip,rk3588-pcie", "snps,dw-pcie";
+		#address-cells = <3>;
+		#size-cells = <2>;
+		bus-range = <0x40 0x4f>;
+		clocks = <&cru ACLK_PCIE_1L2_MSTR>, <&cru ACLK_PCIE_1L2_SLV>,
+			 <&cru ACLK_PCIE_1L2_DBI>, <&cru PCLK_PCIE_1L2>,
+			 <&cru CLK_PCIE_AUX4>;
+		clock-names = "aclk_mst", "aclk_slv",
+			      "aclk_dbi", "pclk", "aux";
+		device_type = "pci";
+		interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "sys", "pmc", "msg", "legacy", "err";
+		#interrupt-cells = <1>;
+		interrupt-map-mask = <0 0 0 7>;
+		interrupt-map = <0 0 0 1 &pcie2x1l2_intc 0>,
+				<0 0 0 2 &pcie2x1l2_intc 1>,
+				<0 0 0 3 &pcie2x1l2_intc 2>,
+				<0 0 0 4 &pcie2x1l2_intc 3>;
+		linux,pci-domain = <4>;
+		num-ib-windows = <8>;
+		num-ob-windows = <8>;
+		max-link-speed = <2>;
+		msi-map = <0x4000 &its 0x4000 0x1000>;
+		num-lanes = <1>;
+		phys = <&combphy0_ps PHY_TYPE_PCIE>;
+		phy-names = "pcie-phy";
+		power-domains = <&power RK3588_PD_PHP>;
+		ranges = <0x00000800 0x0 0xe0000000 0xa 0x00000000 0x0 0x100000
+			  0x81000000 0x0 0xe0100000 0xa 0x00100000 0x0 0x100000
+			  0x83000000 0x0 0xe0200000 0xa 0x00200000 0x0 0x3fe00000>;
+		reg = <0xa 0x41000000 0x0 0x400000>,
+		      <0x0 0xfe190000 0x0 0x10000>;
+		reg-names = "pcie-dbi", "pcie-apb";
+		resets = <&cru SRST_PCIE4_POWER_UP>;
+		reset-names = "pipe";
+		status = "disabled";
+
+		pcie2x1l2_intc: legacy-interrupt-controller {
+			interrupt-controller;
+			#address-cells = <0>;
+			#interrupt-cells = <1>;
+			interrupt-parent = <&gic>;
+			interrupts = <GIC_SPI 250 IRQ_TYPE_EDGE_RISING>;
+		};
+	};
+
+	gmac1: ethernet@fe1c0000 {
+		compatible = "rockchip,rk3588-gmac", "snps,dwmac-4.20a";
+		reg = <0x0 0xfe1c0000 0x0 0x10000>;
+		interrupts = <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "macirq", "eth_wake_irq";
+		rockchip,grf = <&sys_grf>;
+		rockchip,php_grf = <&php_grf>;
+		clocks = <&cru CLK_GMAC1>, <&cru ACLK_GMAC1>,
+			 <&cru PCLK_GMAC1>, <&cru CLK_GMAC1_PTP_REF>;
+		clock-names = "stmmaceth", "aclk_mac",
+			      "pclk_mac", "ptp_ref";
+		resets = <&cru SRST_A_GMAC1>;
+		reset-names = "stmmaceth";
+
+		snps,mixed-burst;
+		snps,tso;
+
+		snps,axi-config = <&gmac1_stmmac_axi_setup>;
+		snps,mtl-rx-config = <&gmac1_mtl_rx_setup>;
+		snps,mtl-tx-config = <&gmac1_mtl_tx_setup>;
+		status = "disabled";
+
+		mdio1: mdio {
+			compatible = "snps,dwmac-mdio";
+			#address-cells = <0x1>;
+			#size-cells = <0x0>;
+		};
+
+		gmac1_stmmac_axi_setup: stmmac-axi-config {
+			snps,wr_osr_lmt = <4>;
+			snps,rd_osr_lmt = <8>;
+			snps,blen = <0 0 0 0 16 8 4>;
+		};
+
+		gmac1_mtl_rx_setup: rx-queues-config {
+			snps,rx-queues-to-use = <2>;
+			queue0 {};
+			queue1 {};
+		};
+
+		gmac1_mtl_tx_setup: tx-queues-config {
+			snps,tx-queues-to-use = <2>;
+			queue0 {};
+			queue1 {};
+		};
+	};
+
+	sata0: sata@fe210000 {
+		compatible = "snps,dwc-ahci";
+		reg = <0 0xfe210000 0 0x1000>;
+		clocks = <&cru ACLK_SATA0>, <&cru CLK_PMALIVE0>,
+			 <&cru CLK_RXOOB0>, <&cru CLK_PIPEPHY0_REF>;
+		clock-names = "sata", "pmalive", "rxoob", "ref";
+		interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "hostc";
+		phys = <&combphy0_ps PHY_TYPE_SATA>;
+		phy-names = "sata-phy";
+		ports-implemented = <0x1>;
+		power-domains = <&power RK3588_PD_PHP>;
+		status = "disabled";
+	};
+
+	sata2: sata@fe230000 {
+		compatible = "snps,dwc-ahci";
+		reg = <0 0xfe230000 0 0x1000>;
+		clocks = <&cru ACLK_SATA2>, <&cru CLK_PMALIVE2>,
+			 <&cru CLK_RXOOB2>, <&cru CLK_PIPEPHY2_REF>;
+		clock-names = "sata", "pmalive", "rxoob", "ref";
+		interrupts = <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "hostc";
+		phys = <&combphy2_psu PHY_TYPE_SATA>;
+		phy-names = "sata-phy";
+		ports-implemented = <0x1>;
+		power-domains = <&power RK3588_PD_PHP>;
+		status = "disabled";
+	};
+
+	sfc: spi@fe2b0000 {
+		compatible = "rockchip,sfc";
+		reg = <0x0 0xfe2b0000 0x0 0x4000>;
+		interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
+		clock-names = "clk_sfc", "hclk_sfc";
+		assigned-clocks = <&cru SCLK_SFC>;
+		assigned-clock-rates = <100000000>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	sdmmc: mmc@fe2c0000 {
+		compatible = "rockchip,rk3588-dw-mshc", "rockchip,rk3288-dw-mshc";
+		reg = <0x0 0xfe2c0000 0x0 0x4000>;
+		interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&scmi_clk SCMI_CCLK_SD>, <&scmi_clk SCMI_HCLK_SD>,
+			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
+		clock-names = "ciu", "biu", "ciu-drive", "ciu-sample";
+		fifo-depth = <0x100>;
+		max-frequency = <200000000>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_det &sdmmc_bus4>;
+		status = "disabled";
+	};
+
+	sdio: mmc@fe2d0000 {
+		compatible = "rockchip,rk3588-dw-mshc", "rockchip,rk3288-dw-mshc";
+		reg = <0x0 0xfe2d0000 0x0 0x4000>;
+		interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_SDIO>, <&cru CCLK_SRC_SDIO>,
+			 <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
+		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
+		fifo-depth = <0x100>;
+		max-frequency = <200000000>;
+		status = "disabled";
+	};
+
+	sdhci: mmc@fe2e0000 {
+		compatible = "rockchip,rk3588-dwcmshc", "rockchip,dwcmshc-sdhci";
+		reg = <0x0 0xfe2e0000 0x0 0x10000>;
+		interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
+		assigned-clocks = <&cru BCLK_EMMC>, <&cru TMCLK_EMMC>;
+		assigned-clock-rates = <200000000>, <24000000>;
+		clocks = <&cru CCLK_EMMC>, <&cru HCLK_EMMC>,
+			 <&cru ACLK_EMMC>, <&cru BCLK_EMMC>,
+			 <&cru TMCLK_EMMC>;
+		clock-names = "core", "bus", "axi", "block", "timer";
+		max-frequency = <200000000>;
+		status = "disabled";
+	};
+
+	i2s0_8ch: i2s@fe470000 {
+		compatible = "rockchip,rk3588-i2s-tdm";
+		reg = <0x0 0xfe470000 0x0 0x1000>;
+		interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru MCLK_I2S0_8CH_TX>, <&cru MCLK_I2S0_8CH_RX>, <&cru HCLK_I2S0_8CH>;
+		clock-names = "mclk_tx", "mclk_rx", "hclk";
+		dmas = <&dmac0 0>, <&dmac0 1>;
+		dma-names = "tx", "rx";
+		resets = <&cru SRST_M_I2S0_8CH_TX>, <&cru SRST_M_I2S0_8CH_RX>;
+		reset-names = "tx-m", "rx-m";
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2s0_lrck
+			     &i2s0_sclk
+			     &i2s0_sdi0
+			     &i2s0_sdi1
+			     &i2s0_sdi2
+			     &i2s0_sdi3
+			     &i2s0_sdo0
+			     &i2s0_sdo1
+			     &i2s0_sdo2
+			     &i2s0_sdo3>;
+		#sound-dai-cells = <0>;
+		status = "disabled";
+	};
+
+	i2s1_8ch: i2s@fe480000 {
+		compatible = "rockchip,rk3588-i2s-tdm";
+		reg = <0x0 0xfe480000 0x0 0x1000>;
+		interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru MCLK_I2S1_8CH_TX>, <&cru MCLK_I2S1_8CH_RX>, <&cru HCLK_I2S1_8CH>;
+		clock-names = "mclk_tx", "mclk_rx", "hclk";
+		dmas = <&dmac0 2>, <&dmac0 3>;
+		dma-names = "tx", "rx";
+		resets = <&cru SRST_M_I2S1_8CH_TX>, <&cru SRST_M_I2S1_8CH_RX>;
+		reset-names = "tx-m", "rx-m";
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2s1m0_lrck
+			     &i2s1m0_sclk
+			     &i2s1m0_sdi0
+			     &i2s1m0_sdi1
+			     &i2s1m0_sdi2
+			     &i2s1m0_sdi3
+			     &i2s1m0_sdo0
+			     &i2s1m0_sdo1
+			     &i2s1m0_sdo2
+			     &i2s1m0_sdo3>;
+		#sound-dai-cells = <0>;
+		status = "disabled";
+	};
+
+	i2s2_2ch: i2s@fe490000 {
+		compatible = "rockchip,rk3588-i2s", "rockchip,rk3066-i2s";
+		reg = <0x0 0xfe490000 0x0 0x1000>;
+		interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru MCLK_I2S2_2CH>, <&cru HCLK_I2S2_2CH>;
+		clock-names = "i2s_clk", "i2s_hclk";
+		dmas = <&dmac1 0>, <&dmac1 1>;
+		dma-names = "tx", "rx";
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2s2m1_lrck
+			     &i2s2m1_sclk
+			     &i2s2m1_sdi
+			     &i2s2m1_sdo>;
+		#sound-dai-cells = <0>;
+		status = "disabled";
+	};
+
+	i2s3_2ch: i2s@fe4a0000 {
+		compatible = "rockchip,rk3588-i2s", "rockchip,rk3066-i2s";
+		reg = <0x0 0xfe4a0000 0x0 0x1000>;
+		interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru MCLK_I2S3_2CH>, <&cru HCLK_I2S3_2CH>;
+		clock-names = "i2s_clk", "i2s_hclk";
+		dmas = <&dmac1 2>, <&dmac1 3>;
+		dma-names = "tx", "rx";
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2s3_lrck
+			     &i2s3_sclk
+			     &i2s3_sdi
+			     &i2s3_sdo>;
+		#sound-dai-cells = <0>;
+		status = "disabled";
+	};
+
+	pdm0: pdm@fe4b0000 {
+		compatible = "rockchip,rk3588-pdm";
+		reg = <0x0 0xfe4b0000 0x0 0x1000>;
+		clocks = <&cru MCLK_PDM0>, <&cru HCLK_PDM0>;
+		clock-names = "pdm_clk", "pdm_hclk";
+		dmas = <&dmac0 4>;
+		dma-names = "rx";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pdm0m0_clk
+			     &pdm0m0_clk1
+			     &pdm0m0_sdi0
+			     &pdm0m0_sdi1
+			     &pdm0m0_sdi2
+			     &pdm0m0_sdi3>;
+		#sound-dai-cells = <0>;
+		status = "disabled";
+	};
+
+	pdm1: pdm@fe4c0000 {
+		compatible = "rockchip,rk3588-pdm";
+		reg = <0x0 0xfe4c0000 0x0 0x1000>;
+		clocks = <&cru MCLK_PDM1>, <&cru HCLK_PDM1>;
+		clock-names = "pdm_clk", "pdm_hclk";
+		dmas = <&dmac1 4>;
+		dma-names = "rx";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pdm1m0_clk
+			     &pdm1m0_clk1
+			     &pdm1m0_sdi0
+			     &pdm1m0_sdi1
+			     &pdm1m0_sdi2
+			     &pdm1m0_sdi3>;
+		#sound-dai-cells = <0>;
+		status = "disabled";
+	};
+
+	vad: vad@fe4d0000 {
+		compatible = "rockchip,rk3588-vad";
+		reg = <0x0 0xfe4d0000 0x0 0x1000>;
+		reg-names = "vad";
+		clocks = <&cru HCLK_VAD>;
+		clock-names = "hclk";
+		interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>;
+		rockchip,audio-src = <0>;
+		rockchip,det-channel = <0>;
+		rockchip,mode = <0>;
+		#sound-dai-cells = <0>;
+		status = "disabled";
+	};
+
+	spdif_tx0: spdif-tx@fe4e0000 {
+		compatible = "rockchip,rk3588-spdif", "rockchip,rk3568-spdif";
+		reg = <0x0 0xfe4e0000 0x0 0x1000>;
+		interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
+		dmas = <&dmac0 5>;
+		dma-names = "tx";
+		clock-names = "mclk", "hclk";
+		clocks = <&cru MCLK_SPDIF0>, <&cru HCLK_SPDIF0>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&spdif0m0_tx>;
+		#sound-dai-cells = <0>;
+		status = "disabled";
+	};
+
+	spdif_tx1: spdif-tx@fe4f0000 {
+		compatible = "rockchip,rk3588-spdif", "rockchip,rk3568-spdif";
+		reg = <0x0 0xfe4f0000 0x0 0x1000>;
+		interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
+		dmas = <&dmac1 5>;
+		dma-names = "tx";
+		clock-names = "mclk", "hclk";
+		clocks = <&cru MCLK_SPDIF1>, <&cru HCLK_SPDIF1>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&spdif1m0_tx>;
+		#sound-dai-cells = <0>;
+		status = "disabled";
+	};
+
+	acdcdig_dsm: codec-digital@fe500000 {
+		compatible = "rockchip,rk3588-codec-digital", "rockchip,codec-digital-v1";
+		reg = <0x0 0xfe500000 0x0 0x1000>;
+		clocks = <&cru CLK_DAC_ACDCDIG>, <&cru PCLK_ACDCDIG>;
+		clock-names = "dac", "pclk";
+		resets = <&cru SRST_DAC_ACDCDIG>;
+		reset-names = "reset" ;
+		rockchip,grf = <&sys_grf>;
+		rockchip,pwm-output-mode;
+		pinctrl-names = "default";
+		pinctrl-0 = <&auddsm_pins>;
+		#sound-dai-cells = <0>;
+		status = "disabled";
+	};
+
+	hwlock: hwspinlock@fe5a0000 {
+		compatible = "rockchip,hwspinlock";
+		reg = <0 0xfe5a0000 0 0x100>;
+		#hwlock-cells = <1>;
+	};
+
+	gic: interrupt-controller@fe600000 {
+		compatible = "arm,gic-v3";
+		#interrupt-cells = <3>;
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+		interrupt-controller;
+
+		reg = <0x0 0xfe600000 0 0x10000>, /* GICD */
+		      <0x0 0xfe680000 0 0x100000>; /* GICR */
+		interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
+		its: interrupt-controller@fe640000 {
+			compatible = "arm,gic-v3-its";
+			msi-controller;
+			#msi-cells = <1>;
+			reg = <0x0 0xfe640000 0x0 0x20000>;
+		};
+	};
+
+	dmac0: dma-controller@fea10000 {
+		compatible = "arm,pl330", "arm,primecell";
+		reg = <0x0 0xfea10000 0x0 0x4000>;
+		interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_DMAC0>;
+		clock-names = "apb_pclk";
+		#dma-cells = <1>;
+		arm,pl330-periph-burst;
+	};
+
+	dmac1: dma-controller@fea30000 {
+		compatible = "arm,pl330", "arm,primecell";
+		reg = <0x0 0xfea30000 0x0 0x4000>;
+		interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_DMAC1>;
+		clock-names = "apb_pclk";
+		#dma-cells = <1>;
+		arm,pl330-periph-burst;
+	};
+
+	can0: can@fea50000 {
+		compatible = "rockchip,canfd-1.0";
+		reg = <0x0 0xfea50000 0x0 0x1000>;
+		iinterrupts = <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru CLK_CAN0>, <&cru PCLK_CAN0>;
+		clock-names = "baudclk", "apb_pclk";
+		resets = <&cru SRST_CAN0>, <&cru SRST_P_CAN0>;
+		reset-names = "can", "can-apb";
+		pinctrl-names = "default";
+		pinctrl-0 = <&can0m0_pins>;
+		tx-fifo-depth = <1>;
+		rx-fifo-depth = <6>;
+		status = "disabled";
+	};
+
+	can1: can@fea60000 {
+		compatible = "rockchip,canfd-1.0";
+		reg = <0x0 0xfea60000 0x0 0x1000>;
+		interrupts = <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru CLK_CAN1>, <&cru PCLK_CAN1>;
+		clock-names = "baudclk", "apb_pclk";
+		resets = <&cru SRST_CAN1>, <&cru SRST_P_CAN1>;
+		reset-names = "can", "can-apb";
+		pinctrl-names = "default";
+		pinctrl-0 = <&can1m0_pins>;
+		tx-fifo-depth = <1>;
+		rx-fifo-depth = <6>;
+		status = "disabled";
+	};
+
+	can2: can@fea70000 {
+		compatible = "rockchip,canfd-1.0";
+		reg = <0x0 0xfea70000 0x0 0x1000>;
+		interrupts = <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru CLK_CAN2>, <&cru PCLK_CAN2>;
+		clock-names = "baudclk", "apb_pclk";
+		resets = <&cru SRST_CAN2>, <&cru SRST_P_CAN2>;
+		reset-names = "can", "can-apb";
+		pinctrl-names = "default";
+		pinctrl-0 = <&can2m0_pins>;
+		tx-fifo-depth = <1>;
+		rx-fifo-depth = <6>;
+		status = "disabled";
+	};
+
+	hw_decompress: decompress@fea80000 {
+		compatible = "rockchip,hw-decompress";
+		reg = <0x0 0xfea80000 0x0 0x1000>;
+		interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_DECOM>, <&cru DCLK_DECOM>, <&cru PCLK_DECOM>;
+		clock-names = "aclk", "dclk", "pclk";
+		resets = <&cru SRST_D_DECOM>;
+		reset-names = "dresetn";
+		status = "disabled";
+	};
+
+	i2c1: i2c@fea90000 {
+		compatible = "rockchip,rk3588-i2c", "rockchip,rk3399-i2c";
+		reg = <0x0 0xfea90000 0x0 0x1000>;
+		clocks = <&cru CLK_I2C1>, <&cru PCLK_I2C1>;
+		clock-names = "i2c", "pclk";
+		interrupts = <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c1m0_xfer>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	i2c2: i2c@feaa0000 {
+		compatible = "rockchip,rk3588-i2c", "rockchip,rk3399-i2c";
+		reg = <0x0 0xfeaa0000 0x0 0x1000>;
+		clocks = <&cru CLK_I2C2>, <&cru PCLK_I2C2>;
+		clock-names = "i2c", "pclk";
+		interrupts = <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c2m0_xfer>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	i2c3: i2c@feab0000 {
+		compatible = "rockchip,rk3588-i2c", "rockchip,rk3399-i2c";
+		reg = <0x0 0xfeab0000 0x0 0x1000>;
+		clocks = <&cru CLK_I2C3>, <&cru PCLK_I2C3>;
+		clock-names = "i2c", "pclk";
+		interrupts = <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c3m0_xfer>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	i2c4: i2c@feac0000 {
+		compatible = "rockchip,rk3588-i2c", "rockchip,rk3399-i2c";
+		reg = <0x0 0xfeac0000 0x0 0x1000>;
+		clocks = <&cru CLK_I2C4>, <&cru PCLK_I2C4>;
+		clock-names = "i2c", "pclk";
+		interrupts = <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c4m0_xfer>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	i2c5: i2c@fead0000 {
+		compatible = "rockchip,rk3588-i2c", "rockchip,rk3399-i2c";
+		reg = <0x0 0xfead0000 0x0 0x1000>;
+		clocks = <&cru CLK_I2C5>, <&cru PCLK_I2C5>;
+		clock-names = "i2c", "pclk";
+		interrupts = <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c5m0_xfer>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	rktimer: timer@feae0000 {
+		compatible = "rockchip,rk3588-timer", "rockchip,rk3288-timer";
+		reg = <0x0 0xfeae0000 0x0 0x20>;
+		interrupts = <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru PCLK_BUSTIMER0>, <&cru CLK_BUSTIMER0>;
+		clock-names = "pclk", "timer";
+	};
+
+	wdt: watchdog@feaf0000 {
+		compatible = "snps,dw-wdt";
+		reg = <0x0 0xfeaf0000 0x0 0x100>;
+		clocks = <&cru TCLK_WDT0>, <&cru PCLK_WDT0>;
+		clock-names = "tclk", "pclk";
+		interrupts = <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>;
+		status = "disabled";
+	};
+
+	spi0: spi@feb00000 {
+		compatible = "rockchip,rk3066-spi";
+		reg = <0x0 0xfeb00000 0x0 0x1000>;
+		interrupts = <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&cru CLK_SPI0>, <&cru PCLK_SPI0>;
+		clock-names = "spiclk", "apb_pclk";
+		dmas = <&dmac0 14>, <&dmac0 15>;
+		dma-names = "tx", "rx";
+		pinctrl-names = "default", "high_speed";
+		pinctrl-0 = <&spi0m0_cs0 &spi0m0_cs1 &spi0m0_pins>;
+		pinctrl-1 = <&spi0m0_cs0 &spi0m0_cs1 &spi0m0_pins_hs>;
+		num-cs = <2>;
+		status = "disabled";
+	};
+
+	spi1: spi@feb10000 {
+		compatible = "rockchip,rk3066-spi";
+		reg = <0x0 0xfeb10000 0x0 0x1000>;
+		interrupts = <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&cru CLK_SPI1>, <&cru PCLK_SPI1>;
+		clock-names = "spiclk", "apb_pclk";
+		dmas = <&dmac0 16>, <&dmac0 17>;
+		dma-names = "tx", "rx";
+		pinctrl-names = "default", "high_speed";
+		pinctrl-0 = <&spi1m1_cs0 &spi1m1_cs1 &spi1m1_pins>;
+		pinctrl-1 = <&spi1m1_cs0 &spi1m1_cs1 &spi1m1_pins_hs>;
+		num-cs = <2>;
+		status = "disabled";
+	};
+
+	spi2: spi@feb20000 {
+		compatible = "rockchip,rk3066-spi";
+		reg = <0x0 0xfeb20000 0x0 0x1000>;
+		interrupts = <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&cru CLK_SPI2>, <&cru PCLK_SPI2>;
+		clock-names = "spiclk", "apb_pclk";
+		dmas = <&dmac1 15>, <&dmac1 16>;
+		dma-names = "tx", "rx";
+		pinctrl-names = "default", "high_speed";
+		pinctrl-0 = <&spi2m0_cs0 &spi2m0_cs1 &spi2m0_pins>;
+		pinctrl-1 = <&spi2m0_cs0 &spi2m0_cs1 &spi2m0_pins_hs>;
+		num-cs = <2>;
+		status = "disabled";
+	};
+
+	spi3: spi@feb30000 {
+		compatible = "rockchip,rk3066-spi";
+		reg = <0x0 0xfeb30000 0x0 0x1000>;
+		interrupts = <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&cru CLK_SPI3>, <&cru PCLK_SPI3>;
+		clock-names = "spiclk", "apb_pclk";
+		dmas = <&dmac1 17>, <&dmac1 18>;
+		dma-names = "tx", "rx";
+		pinctrl-names = "default", "high_speed";
+		pinctrl-0 = <&spi3m1_cs0 &spi3m1_cs1 &spi3m1_pins>;
+		pinctrl-1 = <&spi3m1_cs0 &spi3m1_cs1 &spi3m1_pins_hs>;
+		num-cs = <2>;
+		status = "disabled";
+	};
+
+	uart1: serial@feb40000 {
+		compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xfeb40000 0x0 0x100>;
+		interrupts = <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac0 8>, <&dmac0 9>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart1m0_xfer>;
+		status = "disabled";
+	};
+
+	uart2: serial@feb50000 {
+		compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xfeb50000 0x0 0x100>;
+		interrupts = <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac0 10>, <&dmac0 11>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart2m0_xfer>;
+		status = "disabled";
+	};
+
+	uart3: serial@feb60000 {
+		compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xfeb60000 0x0 0x100>;
+		interrupts = <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac0 12>, <&dmac0 13>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart3m0_xfer>;
+		status = "disabled";
+	};
+
+	uart4: serial@feb70000 {
+		compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xfeb70000 0x0 0x100>;
+		interrupts = <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac1 9>, <&dmac1 10>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart4m0_xfer>;
+		status = "disabled";
+	};
+
+	uart5: serial@feb80000 {
+		compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xfeb80000 0x0 0x100>;
+		interrupts = <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART5>, <&cru PCLK_UART5>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac1 11>, <&dmac1 12>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart5m0_xfer>;
+		status = "disabled";
+	};
+
+	uart6: serial@feb90000 {
+		compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xfeb90000 0x0 0x100>;
+		interrupts = <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART6>, <&cru PCLK_UART6>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac1 13>, <&dmac1 14>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart6m0_xfer>;
+		status = "disabled";
+	};
+
+	uart7: serial@feba0000 {
+		compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xfeba0000 0x0 0x100>;
+		interrupts = <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART7>, <&cru PCLK_UART7>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac2 7>, <&dmac2 8>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart7m0_xfer>;
+		status = "disabled";
+	};
+
+	uart8: serial@febb0000 {
+		compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xfebb0000 0x0 0x100>;
+		interrupts = <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART8>, <&cru PCLK_UART8>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac2 9>, <&dmac2 10>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart8m0_xfer>;
+		status = "disabled";
+	};
+
+	uart9: serial@febc0000 {
+		compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xfebc0000 0x0 0x100>;
+		interrupts = <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART9>, <&cru PCLK_UART9>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac2 11>, <&dmac2 12>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart9m0_xfer>;
+		status = "disabled";
+	};
+
+	pwm4: pwm@febd0000 {
+		compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xfebd0000 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm4m0_pins>;
+		clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm5: pwm@febd0010 {
+		compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xfebd0010 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm5m0_pins>;
+		clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm6: pwm@febd0020 {
+		compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xfebd0020 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm6m0_pins>;
+		clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm7: pwm@febd0030 {
+		compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xfebd0030 0x0 0x10>;
+		interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm7m0_pins>;
+		clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm8: pwm@febe0000 {
+		compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xfebe0000 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm8m0_pins>;
+		clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm9: pwm@febe0010 {
+		compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xfebe0010 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm9m0_pins>;
+		clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm10: pwm@febe0020 {
+		compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xfebe0020 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm10m0_pins>;
+		clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm11: pwm@febe0030 {
+		compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xfebe0030 0x0 0x10>;
+		interrupts = <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm11m0_pins>;
+		clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm12: pwm@febf0000 {
+		compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xfebf0000 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm12m0_pins>;
+		clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm13: pwm@febf0010 {
+		compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xfebf0010 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm13m0_pins>;
+		clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm14: pwm@febf0020 {
+		compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xfebf0020 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm14m0_pins>;
+		clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm15: pwm@febf0030 {
+		compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xfebf0030 0x0 0x10>;
+		interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm15m0_pins>;
+		clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	tsadc: tsadc@fec00000 {
+		compatible = "rockchip,rk3588-tsadc";
+		reg = <0x0 0xfec00000 0x0 0x400>;
+		interrupts = <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru CLK_TSADC>, <&cru PCLK_TSADC>;
+		clock-names = "tsadc", "apb_pclk";
+		assigned-clocks = <&cru CLK_TSADC>;
+		assigned-clock-rates = <2000000>;
+		resets = <&cru SRST_TSADC>, <&cru SRST_P_TSADC>;
+		reset-names = "tsadc", "tsadc-apb";
+		#thermal-sensor-cells = <1>;
+		rockchip,hw-tshut-temp = <120000>;
+		rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
+		rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
+		pinctrl-names = "gpio", "otpout";
+		pinctrl-0 = <&tsadc_gpio_func>;
+		pinctrl-1 = <&tsadc_shut_org>;
+		status = "disabled";
+	};
+
+	saradc: saradc@fec10000 {
+		compatible = "rockchip,rk3588-saradc";
+		reg = <0x0 0xfec10000 0x0 0x10000>;
+		interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>;
+		#io-channel-cells = <1>;
+		clocks = <&cru CLK_SARADC>, <&cru PCLK_SARADC>;
+		clock-names = "saradc", "apb_pclk";
+		resets = <&cru SRST_P_SARADC>;
+		reset-names = "saradc-apb";
+		status = "disabled";
+	};
+
+	mailbox0: mailbox@fec60000 {
+		compatible = "rockchip,rk3588-mailbox",
+			     "rockchip,rk3368-mailbox";
+		reg = <0x0 0xfec60000 0x0 0x200>;
+		interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru PCLK_MAILBOX0>;
+		clock-names = "pclk_mailbox";
+		#mbox-cells = <1>;
+		status = "disabled";
+	};
+
+	mailbox1: mailbox@fec70000 {
+		compatible = "rockchip,rk3588-mailbox",
+			     "rockchip,rk3368-mailbox";
+		reg = <0x0 0xfec70000 0x0 0x200>;
+		interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru PCLK_MAILBOX1>;
+		clock-names = "pclk_mailbox";
+		#mbox-cells = <1>;
+		status = "disabled";
+	};
+
+	i2c6: i2c@fec80000 {
+		compatible = "rockchip,rk3588-i2c", "rockchip,rk3399-i2c";
+		reg = <0x0 0xfec80000 0x0 0x1000>;
+		clocks = <&cru CLK_I2C6>, <&cru PCLK_I2C6>;
+		clock-names = "i2c", "pclk";
+		interrupts = <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c6m0_xfer>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	i2c7: i2c@fec90000 {
+		compatible = "rockchip,rk3588-i2c", "rockchip,rk3399-i2c";
+		reg = <0x0 0xfec90000 0x0 0x1000>;
+		clocks = <&cru CLK_I2C7>, <&cru PCLK_I2C7>;
+		clock-names = "i2c", "pclk";
+		interrupts = <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c7m0_xfer>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	i2c8: i2c@feca0000 {
+		compatible = "rockchip,rk3588-i2c", "rockchip,rk3399-i2c";
+		reg = <0x0 0xfeca0000 0x0 0x1000>;
+		clocks = <&cru CLK_I2C8>, <&cru PCLK_I2C8>;
+		clock-names = "i2c", "pclk";
+		interrupts = <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c8m0_xfer>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	spi4: spi@fecb0000 {
+		compatible = "rockchip,rk3066-spi";
+		reg = <0x0 0xfecb0000 0x0 0x1000>;
+		interrupts = <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&cru CLK_SPI4>, <&cru PCLK_SPI4>;
+		clock-names = "spiclk", "apb_pclk";
+		dmas = <&dmac2 13>, <&dmac2 14>;
+		dma-names = "tx", "rx";
+		pinctrl-names = "default", "high_speed";
+		pinctrl-0 = <&spi4m0_cs0 &spi4m0_cs1 &spi4m0_pins>;
+		pinctrl-1 = <&spi4m0_cs0 &spi4m0_cs1 &spi4m0_pins_hs>;
+		num-cs = <2>;
+		status = "disabled";
+	};
+
+	otp: otp@fecc0000 {
+		compatible = "rockchip,rk3588-otp";
+		reg = <0x0 0xfecc0000 0x0 0x400>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		clocks = <&cru CLK_OTPC_NS>, <&cru PCLK_OTPC_NS>,
+			 <&cru CLK_OTPC_ARB>, <&cru CLK_OTP_PHY_G>;
+		clock-names = "otpc", "apb", "arb", "phy";
+		resets = <&cru SRST_OTPC_NS>, <&cru SRST_P_OTPC_NS>,
+			 <&cru SRST_OTPC_ARB>;
+		reset-names = "otpc", "apb", "arb";
+	};
+
+	mailbox2: mailbox@fece0000 {
+		compatible = "rockchip,rk3588-mailbox",
+			     "rockchip,rk3368-mailbox";
+		reg = <0x0 0xfece0000 0x0 0x200>;
+		interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru PCLK_MAILBOX2>;
+		clock-names = "pclk_mailbox";
+		#mbox-cells = <1>;
+		status = "disabled";
+	};
+
+	dmac2: dma-controller@fed10000 {
+		compatible = "arm,pl330", "arm,primecell";
+		reg = <0x0 0xfed10000 0x0 0x4000>;
+		interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_DMAC2>;
+		clock-names = "apb_pclk";
+		#dma-cells = <1>;
+		arm,pl330-periph-burst;
+	};
+
+	hdptxphy0: phy@fed60000 {
+		compatible = "rockchip,rk3588-hdptx-phy";
+		reg = <0x0 0xfed60000 0x0 0x2000>;
+		clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>, <&cru PCLK_HDPTX0>;
+		clock-names = "ref", "apb";
+		resets = <&cru SRST_HDPTX0>, <&cru SRST_P_HDPTX0>,
+			 <&cru SRST_HDPTX0_INIT>, <&cru SRST_HDPTX0_CMN>,
+			 <&cru SRST_HDPTX0_LANE>, <&cru SRST_HDPTX0_ROPLL>,
+			 <&cru SRST_HDPTX0_LCPLL>;
+		reset-names = "phy", "apb", "init", "cmn", "lane", "ropll",
+			      "lcpll";
+		rockchip,grf = <&hdptxphy0_grf>;
+		#phy-cells = <0>;
+		status = "disabled";
+	};
+
+	usbdp_phy0: phy@fed80000 {
+		compatible = "rockchip,rk3588-usbdp-phy";
+		reg = <0x0 0xfed80000 0x0 0x10000>;
+		rockchip,usb-grf = <&usb_grf>;
+		rockchip,usbdpphy-grf = <&usbdpphy0_grf>;
+		rockchip,vo-grf = <&vo0_grf>;
+		clocks = <&cru CLK_USBDPPHY_MIPIDCPPHY_REF>,
+			 <&cru CLK_USBDP_PHY0_IMMORTAL>,
+			 <&cru PCLK_USBDPPHY0>;
+		clock-names = "refclk", "immortal", "pclk";
+		resets = <&cru SRST_USBDP_COMBO_PHY0_INIT>,
+			 <&cru SRST_USBDP_COMBO_PHY0_CMN>,
+			 <&cru SRST_USBDP_COMBO_PHY0_LANE>,
+			 <&cru SRST_USBDP_COMBO_PHY0_PCS>,
+			 <&cru SRST_P_USBDPPHY0>;
+		reset-names = "init", "cmn", "lane", "pcs_apb", "pma_apb";
+		status = "disabled";
+
+		usbdp_phy0_dp: dp-port {
+			#phy-cells = <0>;
+			status = "disabled";
+		};
+
+		usbdp_phy0_u3: u3-port {
+			#phy-cells = <0>;
+			status = "disabled";
+		};
+	};
+
+	combphy0_ps: phy@fee00000 {
+		compatible = "rockchip,rk3588-naneng-combphy";
+		reg = <0x0 0xfee00000 0x0 0x100>;
+		#phy-cells = <1>;
+		clocks = <&cru CLK_REF_PIPE_PHY0>, <&cru PCLK_PCIE_COMBO_PIPE_PHY0>;
+		clock-names = "refclk", "apbclk";
+		assigned-clocks = <&cru CLK_REF_PIPE_PHY0>;
+		assigned-clock-rates = <100000000>;
+		resets = <&cru SRST_P_PCIE2_PHY0>, <&cru SRST_REF_PIPE_PHY0>;
+		reset-names = "combphy-apb", "combphy";
+		rockchip,pipe-grf = <&php_grf>;
+		rockchip,pipe-phy-grf = <&pipe_phy0_grf>;
+		status = "disabled";
+	};
+
+	combphy2_psu: phy@fee20000 {
+		compatible = "rockchip,rk3588-naneng-combphy";
+		reg = <0x0 0xfee20000 0x0 0x100>;
+		#phy-cells = <1>;
+		clocks = <&cru CLK_REF_PIPE_PHY2>, <&cru PCLK_PCIE_COMBO_PIPE_PHY2>;
+		clock-names = "refclk", "apbclk";
+		assigned-clocks = <&cru CLK_REF_PIPE_PHY2>;
+		assigned-clock-rates = <100000000>;
+		resets = <&cru SRST_P_PCIE2_PHY2>, <&cru SRST_REF_PIPE_PHY2>;
+		reset-names = "combphy-apb", "combphy";
+		rockchip,pipe-grf = <&php_grf>;
+		rockchip,pipe-phy-grf = <&pipe_phy2_grf>;
+		rockchip,pcie1ln-sel-bits = <0x100 1 1 0>;
+		status = "disabled";
+	};
+
+	pinctrl: pinctrl {
+		compatible = "rockchip,rk3588-pinctrl";
+		rockchip,grf = <&ioc>;
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		gpio0: gpio@fd8a0000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x0 0xfd8a0000 0x0 0x100>;
+			interrupts = <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru PCLK_GPIO0>, <&cru DBCLK_GPIO0>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+			gpio-ranges = <&pinctrl 0 0 32>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio1: gpio@fec20000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x0 0xfec20000 0x0 0x100>;
+			interrupts = <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+			gpio-ranges = <&pinctrl 0 32 32>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio2: gpio@fec30000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x0 0xfec30000 0x0 0x100>;
+			interrupts = <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+			gpio-ranges = <&pinctrl 0 64 32>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio3: gpio@fec40000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x0 0xfec40000 0x0 0x100>;
+			interrupts = <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+			gpio-ranges = <&pinctrl 0 96 32>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio4: gpio@fec50000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x0 0xfec50000 0x0 0x100>;
+			interrupts = <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+			gpio-ranges = <&pinctrl 0 128 32>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+	};
+};
+
+#include "rk3588s-pinctrl.dtsi"

commit 4bea194c62f52716b1096aaab7e80e8fead0cb9e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jun 25 15:06:38 2021 +0800

    clk: rockchip: pll: add lock timeout
    
    It's more friendly for FPGA board.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I8b6eb63ddf2b5c8742941e4e62444acba88feb31

diff --git a/drivers/clk/rockchip/clk_pll.c b/drivers/clk/rockchip/clk_pll.c
index ffc6df8fdf..4d4067808f 100644
--- a/drivers/clk/rockchip/clk_pll.c
+++ b/drivers/clk/rockchip/clk_pll.c
@@ -252,6 +252,7 @@ static int rk3036_pll_set_rate(struct rockchip_pll_clock *pll,
 			       ulong drate)
 {
 	const struct rockchip_pll_rate_table *rate;
+	int timeout = 100;
 
 	rate = rockchip_get_pll_settings(pll, drate);
 	if (!rate) {
@@ -301,11 +302,14 @@ static int rk3036_pll_set_rate(struct rockchip_pll_clock *pll,
 		  1 << RK3036_PLLCON1_PWRDOWN_SHIT);
 
 	/* waiting for pll lock */
-	while (!(readl(base + pll->con_offset + 0x4) & (1 << pll->lock_shift))) {
+	while ((timeout > 0) && !(readl(base + pll->con_offset + 0x4) & (1 << pll->lock_shift))) {
 		udelay(1);
-		debug("%s: wait pll lock, pll_id=%ld\n", __func__, pll_id);
+		timeout--;
 	}
 
+	if (!(readl(base + pll->con_offset + 0x4) & (1 << pll->lock_shift)))
+		printf("%s: wait pll lock timeout! pll_id=%ld\n", __func__, pll_id);
+
 	rk_clrsetreg(base + pll->mode_offset, pll->mode_mask << pll->mode_shift,
 		     RKCLK_PLL_MODE_NORMAL << pll->mode_shift);
 	debug("PLL at %p: con0=%x con1= %x con2= %x mode= %x\n",

commit 28d0997c6925978d99416351e00e40f01591b1f5
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Wed May 19 11:45:03 2021 +0800

    clk: rockchip: rk3588: Add clock driver
    
    Add basic clock for rk3588 which including top, peri, mmc,
    i2c, pwm, gmac ...clocks init.
    
    Change-Id: I0fb1695db483fc676c4ebc956aec66c143cc73e5
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3588.h b/arch/arm/include/asm/arch-rockchip/cru_rk3588.h
new file mode 100644
index 0000000000..252e33e35e
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3588.h
@@ -0,0 +1,408 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2020 Rockchip Electronics Co. Ltd.
+ * Author: Elaine Zhang <zhangqing@rock-chips.com>
+ */
+
+#ifndef _ASM_ARCH_CRU_RK3588_H
+#define _ASM_ARCH_CRU_RK3588_H
+
+#define MHz		1000000
+#define KHz		1000
+#define OSC_HZ		(24 * MHz)
+
+#define LPLL_HZ		(816 * MHz)
+#define GPLL_HZ		(1188 * MHz)
+#define CPLL_HZ		(1500 * MHz)
+#define NPLL_HZ         (850 * MHz)
+#define PPLL_HZ		(100 * MHz)
+
+/* RK3588 pll id */
+enum rk3588_pll_id {
+	B0PLL,
+	B1PLL,
+	LPLL,
+	CPLL,
+	GPLL,
+	NPLL,
+	V0PLL,
+	AUPLL,
+	PPLL,
+	PLL_COUNT,
+};
+
+struct rk3588_clk_info {
+	unsigned long id;
+	char *name;
+	bool is_cru;
+};
+
+struct rk3588_clk_priv {
+	struct rk3588_cru *cru;
+	struct rk3588_grf *grf;
+	ulong ppll_hz;
+	ulong gpll_hz;
+	ulong cpll_hz;
+	ulong npll_hz;
+	ulong v0pll_hz;
+	ulong aupll_hz;
+	ulong armclk_hz;
+	ulong armclk_enter_hz;
+	ulong armclk_init_hz;
+	bool sync_kernel;
+	bool set_armclk_rate;
+};
+
+struct rk3588_pll {
+	unsigned int con0;
+	unsigned int con1;
+	unsigned int con2;
+	unsigned int con3;
+	unsigned int con4;
+	unsigned int reserved0[3];
+};
+
+struct rk3588_cru {
+	struct rk3588_pll pll[18];
+	unsigned int reserved0[16];/* Address Offset: 0x0240 */
+	unsigned int mode_con00;/* Address Offset: 0x0280 */
+	unsigned int reserved1[31];/* Address Offset: 0x0284 */
+	unsigned int clksel_con[178]; /* Address Offset: 0x0300 */
+	unsigned int reserved2[142];/* Address Offset: 0x05c8 */
+	unsigned int clkgate_con[78];/* Address Offset: 0x0800 */
+	unsigned int reserved3[50];/* Address Offset: 0x0938 */
+	unsigned int softrst_con[78];/* Address Offset: 0x0400 */
+	unsigned int reserved4[50];/* Address Offset: 0x0b38 */
+	unsigned int glb_cnt_th;/* Address Offset: 0x0c00 */
+	unsigned int glb_rst_st;/* Address Offset: 0x0c04 */
+	unsigned int glb_srst_fst;/* Address Offset: 0x0c08 */
+	unsigned int glb_srsr_snd; /* Address Offset: 0x0c0c */
+	unsigned int glb_rst_con;/* Address Offset: 0x0c10 */
+	unsigned int reserved5[4];/* Address Offset: 0x0c14 */
+	unsigned int sdio_con[2];/* Address Offset: 0x0c24 */
+	unsigned int reserved7;/* Address Offset: 0x0c2c */
+	unsigned int sdmmc_con[2];/* Address Offset: 0x0c30 */
+	unsigned int reserved8[48562];/* Address Offset: 0x0c38 */
+	unsigned int pmuclksel_con[21]; /* Address Offset: 0x0100 */
+	unsigned int reserved9[299];/* Address Offset: 0x0c38 */
+	unsigned int pmuclkgate_con[9]; /* Address Offset: 0x0100 */
+};
+
+check_member(rk3588_cru, mode_con00, 0x280);
+check_member(rk3588_cru, pmuclksel_con[1], 0x30304);
+
+struct pll_rate_table {
+	unsigned long rate;
+	unsigned int m;
+	unsigned int p;
+	unsigned int s;
+	unsigned int k;
+};
+
+#define RK3588_PLL_CON(x)		((x) * 0x4)
+#define RK3588_MODE_CON			0x280
+
+#define RK3588_PHP_CRU_BASE		0x8000
+#define RK3588_PMU_CRU_BASE		0x30000
+#define RK3588_BIGCORE0_CRU_BASE	0x50000
+#define RK3588_BIGCORE1_CRU_BASE	0x52000
+#define RK3588_DSU_CRU_BASE		0x58000
+
+#define RK3588_PLL_CON(x)		((x) * 0x4)
+#define RK3588_MODE_CON0		0x280
+#define RK3588_CLKSEL_CON(x)		((x) * 0x4 + 0x300)
+#define RK3588_CLKGATE_CON(x)		((x) * 0x4 + 0x800)
+#define RK3588_SOFTRST_CON(x)		((x) * 0x4 + 0xa00)
+#define RK3588_GLB_CNT_TH		0xc00
+#define RK3588_GLB_SRST_FST		0xc08
+#define RK3588_GLB_SRST_SND		0xc0c
+#define RK3588_GLB_RST_CON		0xc10
+#define RK3588_GLB_RST_ST		0xc04
+#define RK3588_SDIO_CON0		0xC24
+#define RK3588_SDIO_CON1		0xC28
+#define RK3588_SDMMC_CON0		0xC30
+#define RK3588_SDMMC_CON1		0xC34
+
+#define RK3588_PHP_CLKGATE_CON(x)	((x) * 0x4 + RK3588_PHP_CRU_BASE + 0x800)
+#define RK3588_PHP_SOFTRST_CON(x)	((x) * 0x4 + RK3588_PHP_CRU_BASE + 0xa00)
+
+#define RK3588_PMU_PLL_CON(x)		((x) * 0x4 + RK3588_PHP_CRU_BASE)
+#define RK3588_PMU_CLKSEL_CON(x)	((x) * 0x4 + RK3588_PMU_CRU_BASE + 0x300)
+#define RK3588_PMU_CLKGATE_CON(x)	((x) * 0x4 + RK3588_PMU_CRU_BASE + 0x800)
+#define RK3588_PMU_SOFTRST_CON(x)	((x) * 0x4 + RK3588_PMU_CRU_BASE + 0xa00)
+
+#define RK3588_B0_PLL_CON(x)		((x) * 0x4 + RK3588_BIGCORE0_CRU_BASE)
+#define RK3588_B0_PLL_MODE_CON		(RK3588_BIGCORE0_CRU_BASE + 0x280)
+#define RK3588_BIGCORE0_CLKSEL_CON(x)	((x) * 0x4 + RK3588_BIGCORE0_CRU_BASE + 0x300)
+#define RK3588_BIGCORE0_CLKGATE_CON(x)	((x) * 0x4 + RK3588_BIGCORE0_CRU_BASE + 0x800)
+#define RK3588_BIGCORE0_SOFTRST_CON(x)	((x) * 0x4 + RK3588_BIGCORE0_CRU_BASE + 0xa00)
+#define RK3588_B1_PLL_CON(x)		((x) * 0x4 + RK3588_BIGCORE1_CRU_BASE)
+#define RK3588_B1_PLL_MODE_CON		(RK3588_BIGCORE1_CRU_BASE + 0x280)
+#define RK3588_BIGCORE1_CLKSEL_CON(x)	((x) * 0x4 + RK3588_BIGCORE1_CRU_BASE + 0x300)
+#define RK3588_BIGCORE1_CLKGATE_CON(x)	((x) * 0x4 + RK3588_BIGCORE1_CRU_BASE + 0x800)
+#define RK3588_BIGCORE1_SOFTRST_CON(x)	((x) * 0x4 + RK3588_BIGCORE1_CRU_BASE + 0xa00)
+#define RK3588_LPLL_CON(x)		((x) * 0x4 + RK3588_DSU_CRU_BASE)
+#define RK3588_LPLL_MODE_CON		(RK3588_DSU_CRU_BASE + 0x280)
+#define RK3588_DSU_CLKSEL_CON(x)	((x) * 0x4 + RK3588_DSU_CRU_BASE + 0x300)
+#define RK3588_DSU_CLKGATE_CON(x)	((x) * 0x4 + RK3588_DSU_CRU_BASE + 0x800)
+#define RK3588_DSU_SOFTRST_CON(x)	((x) * 0x4 + RK3588_DSU_CRU_BASE + 0xa00)
+
+enum {
+	/* CRU_CLK_SEL8_CON */
+	ACLK_LOW_TOP_ROOT_SRC_SEL_SHIFT		= 14,
+	ACLK_LOW_TOP_ROOT_SRC_SEL_MASK		= 1 << ACLK_LOW_TOP_ROOT_SRC_SEL_SHIFT,
+	ACLK_LOW_TOP_ROOT_SRC_SEL_GPLL		= 0,
+	ACLK_LOW_TOP_ROOT_SRC_SEL_CPLL,
+	ACLK_LOW_TOP_ROOT_DIV_SHIFT		= 9,
+	ACLK_LOW_TOP_ROOT_DIV_MASK		= 0x1f << ACLK_LOW_TOP_ROOT_DIV_SHIFT,
+	PCLK_TOP_ROOT_SEL_SHIFT			= 7,
+	PCLK_TOP_ROOT_SEL_MASK			= 3 << PCLK_TOP_ROOT_SEL_SHIFT,
+	PCLK_TOP_ROOT_SEL_100M			= 0,
+	PCLK_TOP_ROOT_SEL_50M,
+	PCLK_TOP_ROOT_SEL_24M,
+	ACLK_TOP_ROOT_SRC_SEL_SHIFT		= 5,
+	ACLK_TOP_ROOT_SRC_SEL_MASK		= 3 << ACLK_TOP_ROOT_SRC_SEL_SHIFT,
+	ACLK_TOP_ROOT_SRC_SEL_GPLL		= 0,
+	ACLK_TOP_ROOT_SRC_SEL_CPLL,
+	ACLK_TOP_ROOT_SRC_SEL_AUPLL,
+	ACLK_TOP_ROOT_DIV_SHIFT			= 0,
+	ACLK_TOP_ROOT_DIV_MASK			= 0x1f << ACLK_TOP_ROOT_DIV_SHIFT,
+
+	/* CRU_CLK_SEL9_CON */
+	ACLK_TOP_S400_SEL_SHIFT			= 8,
+	ACLK_TOP_S400_SEL_MASK			= 3 << ACLK_TOP_S400_SEL_SHIFT,
+	ACLK_TOP_S400_SEL_400M			= 0,
+	ACLK_TOP_S400_SEL_200M,
+	ACLK_TOP_S200_SEL_SHIFT			= 6,
+	ACLK_TOP_S200_SEL_MASK			= 3 << ACLK_TOP_S200_SEL_SHIFT,
+	ACLK_TOP_S200_SEL_200M			= 0,
+	ACLK_TOP_S200_SEL_100M,
+
+	/* CRU_CLK_SEL38_CON */
+	CLK_I2C8_SEL_SHIFT			= 13,
+	CLK_I2C8_SEL_MASK			= 1 << CLK_I2C8_SEL_SHIFT,
+	CLK_I2C7_SEL_SHIFT			= 12,
+	CLK_I2C7_SEL_MASK			= 1 << CLK_I2C7_SEL_SHIFT,
+	CLK_I2C6_SEL_SHIFT			= 11,
+	CLK_I2C6_SEL_MASK			= 1 << CLK_I2C6_SEL_SHIFT,
+	CLK_I2C5_SEL_SHIFT			= 10,
+	CLK_I2C5_SEL_MASK			= 1 << CLK_I2C5_SEL_SHIFT,
+	CLK_I2C4_SEL_SHIFT			= 9,
+	CLK_I2C4_SEL_MASK			= 1 << CLK_I2C4_SEL_SHIFT,
+	CLK_I2C3_SEL_SHIFT			= 8,
+	CLK_I2C3_SEL_MASK			= 1 << CLK_I2C3_SEL_SHIFT,
+	CLK_I2C2_SEL_SHIFT			= 7,
+	CLK_I2C2_SEL_MASK			= 1 << CLK_I2C2_SEL_SHIFT,
+	CLK_I2C1_SEL_SHIFT			= 6,
+	CLK_I2C1_SEL_MASK			= 1 << CLK_I2C1_SEL_SHIFT,
+	ACLK_BUS_ROOT_SEL_SHIFT			= 5,
+	ACLK_BUS_ROOT_SEL_MASK			= 3 << ACLK_BUS_ROOT_SEL_SHIFT,
+	ACLK_BUS_ROOT_SEL_GPLL			= 0,
+	ACLK_BUS_ROOT_SEL_CPLL,
+	ACLK_BUS_ROOT_DIV_SHIFT			= 0,
+	ACLK_BUS_ROOT_DIV_MASK			= 0x1f << ACLK_BUS_ROOT_DIV_SHIFT,
+
+	/* CRU_CLK_SEL40_CON */
+	CLK_SARADC_SEL_SHIFT			= 14,
+	CLK_SARADC_SEL_MASK			= 0x1 << CLK_SARADC_SEL_SHIFT,
+	CLK_SARADC_SEL_GPLL			= 0,
+	CLK_SARADC_SEL_24M,
+	CLK_SARADC_DIV_SHIFT			= 6,
+	CLK_SARADC_DIV_MASK			= 0xff << CLK_SARADC_DIV_SHIFT,
+
+	/* CRU_CLK_SEL41_CON */
+	CLK_UART_SRC_SEL_SHIFT			= 14,
+	CLK_UART_SRC_SEL_MASK			= 0x1 << CLK_UART_SRC_SEL_SHIFT,
+	CLK_UART_SRC_SEL_GPLL			= 0,
+	CLK_UART_SRC_SEL_CPLL,
+	CLK_UART_SRC_DIV_SHIFT			= 9,
+	CLK_UART_SRC_DIV_MASK			= 0x1f << CLK_UART_SRC_DIV_SHIFT,
+	CLK_TSADC_SEL_SHIFT			= 8,
+	CLK_TSADC_SEL_MASK			= 0x1 << CLK_TSADC_SEL_SHIFT,
+	CLK_TSADC_SEL_GPLL			= 0,
+	CLK_TSADC_SEL_24M,
+	CLK_TSADC_DIV_SHIFT			= 0,
+	CLK_TSADC_DIV_MASK			= 0xff << CLK_TSADC_DIV_SHIFT,
+
+	/* CRU_CLK_SEL42_CON */
+	CLK_UART_FRAC_NUMERATOR_SHIFT		= 16,
+	CLK_UART_FRAC_NUMERATOR_MASK		= 0xffff << 16,
+	CLK_UART_FRAC_DENOMINATOR_SHIFT		= 0,
+	CLK_UART_FRAC_DENOMINATOR_MASK		= 0xffff,
+
+	/* CRU_CLK_SEL43_CON */
+	CLK_UART_SEL_SHIFT			= 0,
+	CLK_UART_SEL_MASK			= 0x3 << CLK_UART_SEL_SHIFT,
+	CLK_UART_SEL_SRC			= 0,
+	CLK_UART_SEL_FRAC,
+	CLK_UART_SEL_XIN24M,
+
+	/* CRU_CLK_SEL59_CON */
+	CLK_PWM2_SEL_SHIFT			= 14,
+	CLK_PWM2_SEL_MASK			= 3 << CLK_PWM2_SEL_SHIFT,
+	CLK_PWM1_SEL_SHIFT			= 12,
+	CLK_PWM1_SEL_MASK			= 3 << CLK_PWM1_SEL_SHIFT,
+	CLK_SPI4_SEL_SHIFT			= 10,
+	CLK_SPI4_SEL_MASK			= 3 << CLK_SPI4_SEL_SHIFT,
+	CLK_SPI3_SEL_SHIFT			= 8,
+	CLK_SPI3_SEL_MASK			= 3 << CLK_SPI3_SEL_SHIFT,
+	CLK_SPI2_SEL_SHIFT			= 6,
+	CLK_SPI2_SEL_MASK			= 3 << CLK_SPI2_SEL_SHIFT,
+	CLK_SPI1_SEL_SHIFT			= 4,
+	CLK_SPI1_SEL_MASK			= 3 << CLK_SPI1_SEL_SHIFT,
+	CLK_SPI0_SEL_SHIFT			= 2,
+	CLK_SPI0_SEL_MASK			= 3 << CLK_SPI0_SEL_SHIFT,
+	CLK_SPI_SEL_200M			= 0,
+	CLK_SPI_SEL_150M,
+	CLK_SPI_SEL_24M,
+
+	/* CRU_CLK_SEL60_CON */
+	CLK_PWM3_SEL_SHIFT			= 0,
+	CLK_PWM3_SEL_MASK			= 3 << CLK_PWM3_SEL_SHIFT,
+	CLK_PWM_SEL_100M			= 0,
+	CLK_PWM_SEL_50M,
+	CLK_PWM_SEL_24M,
+
+	/* CRU_CLK_SEL77_CON */
+	CCLK_EMMC_SEL_SHIFT			= 14,
+	CCLK_EMMC_SEL_MASK			= 3 << CCLK_EMMC_SEL_SHIFT,
+	CCLK_EMMC_SEL_GPLL			= 0,
+	CCLK_EMMC_SEL_CPLL,
+	CCLK_EMMC_SEL_24M,
+	CCLK_EMMC_DIV_SHIFT			= 8,
+	CCLK_EMMC_DIV_MASK			= 0x3f << CCLK_EMMC_DIV_SHIFT,
+
+	/* CRU_CLK_SEL78_CON */
+	SCLK_SFC_SEL_SHIFT			= 12,
+	SCLK_SFC_SEL_MASK			= 3 << SCLK_SFC_SEL_SHIFT,
+	SCLK_SFC_SEL_GPLL			= 0,
+	SCLK_SFC_SEL_CPLL,
+	SCLK_SFC_SEL_24M,
+	SCLK_SFC_DIV_SHIFT			= 6,
+	SCLK_SFC_DIV_MASK			= 0x3f << SCLK_SFC_DIV_SHIFT,
+	BCLK_EMMC_SEL_SHIFT			= 5,
+	BCLK_EMMC_SEL_MASK			= 1 << BCLK_EMMC_SEL_SHIFT,
+	BCLK_EMMC_SEL_GPLL			= 0,
+	BCLK_EMMC_SEL_CPLL,
+	BCLK_EMMC_DIV_SHIFT			= 0,
+	BCLK_EMMC_DIV_MASK			= 0x1f << BCLK_EMMC_DIV_SHIFT,
+
+	/* CRU_CLK_SEL81_CON */
+	CLK_GMAC1_PTP_SEL_SHIFT			= 13,
+	CLK_GMAC1_PTP_SEL_MASK			= 1 << CLK_GMAC1_PTP_SEL_SHIFT,
+	CLK_GMAC1_PTP_SEL_CPLL			= 0,
+	CLK_GMAC1_PTP_DIV_SHIFT			= 7,
+	CLK_GMAC1_PTP_DIV_MASK			= 0x3f << CLK_GMAC1_PTP_DIV_SHIFT,
+	CLK_GMAC0_PTP_SEL_SHIFT			= 6,
+	CLK_GMAC0_PTP_SEL_MASK			= 1 << CLK_GMAC0_PTP_SEL_SHIFT,
+	CLK_GMAC0_PTP_SEL_CPLL			= 0,
+	CLK_GMAC0_PTP_DIV_SHIFT			= 0,
+	CLK_GMAC0_PTP_DIV_MASK			= 0x3f << CLK_GMAC0_PTP_DIV_SHIFT,
+
+	/* CRU_CLK_SEL83_CON */
+	CLK_GMAC_125M_SEL_SHIFT			= 15,
+	CLK_GMAC_125M_SEL_MASK			= 1 << CLK_GMAC_125M_SEL_SHIFT,
+	CLK_GMAC_125M_SEL_GPLL			= 0,
+	CLK_GMAC_125M_SEL_CPLL,
+	CLK_GMAC_125M_DIV_SHIFT			= 8,
+	CLK_GMAC_125M_DIV_MASK			= 0x7f << CLK_GMAC_125M_DIV_SHIFT,
+
+	/* CRU_CLK_SEL84_CON */
+	CLK_GMAC_50M_SEL_SHIFT			= 7,
+	CLK_GMAC_50M_SEL_MASK			= 1 << CLK_GMAC_50M_SEL_SHIFT,
+	CLK_GMAC_50M_SEL_GPLL			= 0,
+	CLK_GMAC_50M_SEL_CPLL,
+	CLK_GMAC_50M_DIV_SHIFT			= 0,
+	CLK_GMAC_50M_DIV_MASK			= 0x7f << CLK_GMAC_50M_DIV_SHIFT,
+
+	/* CRU_CLK_SEL110_CON */
+	HCLK_VOP_ROOT_SEL_SHIFT			= 10,
+	HCLK_VOP_ROOT_SEL_MASK			= 3 << HCLK_VOP_ROOT_SEL_SHIFT,
+	HCLK_VOP_ROOT_SEL_200M			= 0,
+	HCLK_VOP_ROOT_SEL_100M,
+	HCLK_VOP_ROOT_SEL_50M,
+	HCLK_VOP_ROOT_SEL_24M,
+	ACLK_VOP_LOW_ROOT_SEL_SHIFT		= 8,
+	ACLK_VOP_LOW_ROOT_SEL_MASK		= 3 << ACLK_VOP_LOW_ROOT_SEL_SHIFT,
+	ACLK_VOP_LOW_ROOT_SEL_400M		= 0,
+	ACLK_VOP_LOW_ROOT_SEL_200M,
+	ACLK_VOP_LOW_ROOT_SEL_100M,
+	ACLK_VOP_LOW_ROOT_SEL_24M,
+	ACLK_VOP_ROOT_SEL_SHIFT			= 5,
+	ACLK_VOP_ROOT_SEL_MASK			= 3 << ACLK_VOP_ROOT_SEL_SHIFT,
+	ACLK_VOP_ROOT_SEL_GPLL			= 0,
+	ACLK_VOP_ROOT_SEL_CPLL,
+	ACLK_VOP_ROOT_SEL_AUPLL,
+	ACLK_VOP_ROOT_SEL_NPLL,
+	ACLK_VOP_ROOT_SEL_SPLL,
+	ACLK_VOP_ROOT_DIV_SHIFT			= 0,
+	ACLK_VOP_ROOT_DIV_MASK			= 0x1f << ACLK_VOP_ROOT_DIV_SHIFT,
+
+	/* CRU_CLK_SEL111_CON */
+	DCLK1_VOP_SRC_SEL_SHIFT			= 14,
+	DCLK1_VOP_SRC_SEL_MASK			= 3 << DCLK1_VOP_SRC_SEL_SHIFT,
+	DCLK1_VOP_SRC_DIV_SHIFT			= 9,
+	DCLK1_VOP_SRC_DIV_MASK			= 0x1f << DCLK1_VOP_SRC_DIV_SHIFT,
+	DCLK0_VOP_SRC_SEL_SHIFT			= 7,
+	DCLK0_VOP_SRC_SEL_MASK			= 3 << DCLK0_VOP_SRC_SEL_SHIFT,
+	DCLK_VOP_SRC_SEL_GPLL			= 0,
+	DCLK_VOP_SRC_SEL_CPLL,
+	DCLK_VOP_SRC_SEL_V0PLL,
+	DCLK_VOP_SRC_SEL_AUPLL,
+	DCLK0_VOP_SRC_DIV_SHIFT			= 0,
+	DCLK0_VOP_SRC_DIV_MASK			= 0x7f << DCLK0_VOP_SRC_DIV_SHIFT,
+
+	/* CRU_CLK_SEL112_CON */
+	DCLK2_VOP_SRC_SEL_SHIFT			= 5,
+	DCLK2_VOP_SRC_SEL_MASK			= 3 << DCLK2_VOP_SRC_SEL_SHIFT,
+	DCLK2_VOP_SRC_DIV_SHIFT			= 0,
+	DCLK2_VOP_SRC_DIV_MASK			= 0x1f << DCLK2_VOP_SRC_DIV_SHIFT,
+
+	/* CRU_CLK_SEL113_CON */
+	DCLK3_VOP_SRC_SEL_SHIFT			= 7,
+	DCLK3_VOP_SRC_SEL_MASK			= 3 << DCLK3_VOP_SRC_SEL_SHIFT,
+	DCLK3_VOP_SRC_DIV_SHIFT			= 0,
+	DCLK3_VOP_SRC_DIV_MASK			= 0x7f << DCLK3_VOP_SRC_DIV_SHIFT,
+
+	/* CRU_CLK_SEL165_CON */
+	PCLK_CENTER_ROOT_SEL_SHIFT		= 6,
+	PCLK_CENTER_ROOT_SEL_MASK		= 3 << PCLK_CENTER_ROOT_SEL_SHIFT,
+	PCLK_CENTER_ROOT_SEL_200M		= 0,
+	PCLK_CENTER_ROOT_SEL_100M,
+	PCLK_CENTER_ROOT_SEL_50M,
+	PCLK_CENTER_ROOT_SEL_24M,
+	HCLK_CENTER_ROOT_SEL_SHIFT		= 4,
+	HCLK_CENTER_ROOT_SEL_MASK		= 3 << HCLK_CENTER_ROOT_SEL_SHIFT,
+	HCLK_CENTER_ROOT_SEL_400M		= 0,
+	HCLK_CENTER_ROOT_SEL_200M,
+	HCLK_CENTER_ROOT_SEL_100M,
+	HCLK_CENTER_ROOT_SEL_24M,
+	ACLK_CENTER_LOW_ROOT_SEL_SHIFT		= 2,
+	ACLK_CENTER_LOW_ROOT_SEL_MASK		= 3 << ACLK_CENTER_LOW_ROOT_SEL_SHIFT,
+	ACLK_CENTER_LOW_ROOT_SEL_500M		= 0,
+	ACLK_CENTER_LOW_ROOT_SEL_250M,
+	ACLK_CENTER_LOW_ROOT_SEL_100M,
+	ACLK_CENTER_LOW_ROOT_SEL_24M,
+	ACLK_CENTER_ROOT_SEL_SHIFT		= 0,
+	ACLK_CENTER_ROOT_SEL_MASK		= 3 << ACLK_CENTER_ROOT_SEL_SHIFT,
+	ACLK_CENTER_ROOT_SEL_700M		= 0,
+	ACLK_CENTER_ROOT_SEL_400M,
+	ACLK_CENTER_ROOT_SEL_200M,
+	ACLK_CENTER_ROOT_SEL_24M,
+
+	/* CRU_CLK_SEL172_CON */
+	CCLK_SDIO_SRC_SEL_SHIFT			= 8,
+	CCLK_SDIO_SRC_SEL_MASK			= 3 << CCLK_SDIO_SRC_SEL_SHIFT,
+	CCLK_SDIO_SRC_SEL_GPLL			= 0,
+	CCLK_SDIO_SRC_SEL_CPLL,
+	CCLK_SDIO_SRC_SEL_24M,
+	CCLK_SDIO_SRC_DIV_SHIFT			= 2,
+	CCLK_SDIO_SRC_DIV_MASK			= 0x3f << CCLK_SDIO_SRC_DIV_SHIFT,
+
+	/* PMUCRU_CLK_SEL3_CON */
+	CLK_I2C0_SEL_SHIFT			= 6,
+	CLK_I2C0_SEL_MASK			= 1 << CLK_I2C0_SEL_SHIFT,
+	CLK_I2C_SEL_200M			= 0,
+	CLK_I2C_SEL_100M,
+};
+#endif
diff --git a/drivers/clk/rockchip/Makefile b/drivers/clk/rockchip/Makefile
index dc773c84b9..f16f2e89dd 100644
--- a/drivers/clk/rockchip/Makefile
+++ b/drivers/clk/rockchip/Makefile
@@ -18,5 +18,6 @@ obj-$(CONFIG_ROCKCHIP_RK3328) += clk_rk3328.o
 obj-$(CONFIG_ROCKCHIP_RK3368) += clk_rk3368.o
 obj-$(CONFIG_ROCKCHIP_RK3399) += clk_rk3399.o
 obj-$(CONFIG_ROCKCHIP_RK3568) += clk_rk3568.o
+obj-$(CONFIG_ROCKCHIP_RK3588) += clk_rk3588.o
 obj-$(CONFIG_ROCKCHIP_RV1108) += clk_rv1108.o
 obj-$(CONFIG_ROCKCHIP_RV1126) += clk_rv1126.o
diff --git a/drivers/clk/rockchip/clk_rk3588.c b/drivers/clk/rockchip/clk_rk3588.c
new file mode 100644
index 0000000000..b62949105b
--- /dev/null
+++ b/drivers/clk/rockchip/clk_rk3588.c
@@ -0,0 +1,1939 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2021 Fuzhou Rockchip Electronics Co., Ltd
+ * Author: Elaine Zhang <zhangqing@rock-chips.com>
+ */
+
+#include <common.h>
+#include <bitfield.h>
+#include <clk-uclass.h>
+#include <dm.h>
+#include <errno.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk3588.h>
+#include <asm/arch/hardware.h>
+#include <asm/io.h>
+#include <dm/lists.h>
+#include <dt-bindings/clock/rk3588-cru.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define DIV_TO_RATE(input_rate, div)	((input_rate) / ((div) + 1))
+
+static struct rockchip_pll_rate_table rk3588_pll_rates[] = {
+	/* _mhz, _p, _m, _s, _k */
+	RK3588_PLL_RATE(1500000000, 2, 250, 1, 0),
+	RK3588_PLL_RATE(1200000000, 2, 200, 1, 0),
+	RK3588_PLL_RATE(1188000000, 2, 198, 1, 0),
+	RK3588_PLL_RATE(1008000000, 2, 336, 2, 0),
+	RK3588_PLL_RATE(1000000000, 3, 500, 2, 0),
+	RK3588_PLL_RATE(900000000, 2, 300, 2, 0),
+	RK3588_PLL_RATE(850000000, 3, 425, 2, 0),
+	RK3588_PLL_RATE(816000000, 2, 272, 2, 0),
+	RK3588_PLL_RATE(600000000, 2, 200, 2, 0),
+	RK3588_PLL_RATE(594000000, 2, 198, 2, 0),
+	RK3588_PLL_RATE(200000000, 3, 400, 4, 0),
+	RK3588_PLL_RATE(100000000, 3, 400, 5, 0),
+	{ /* sentinel */ },
+};
+
+static struct rockchip_pll_clock rk3588_pll_clks[] = {
+	[B0PLL] = PLL(pll_rk3588, PLL_B0PLL, RK3588_B0_PLL_CON(0),
+		      RK3588_B0_PLL_MODE_CON, 0, 15, 0,
+		      rk3588_pll_rates),
+	[B1PLL] = PLL(pll_rk3588, PLL_B1PLL, RK3588_B1_PLL_CON(8),
+		      RK3588_B1_PLL_MODE_CON, 0, 15, 0,
+		      rk3588_pll_rates),
+	[LPLL] = PLL(pll_rk3588, PLL_LPLL, RK3588_LPLL_CON(16),
+		     RK3588_LPLL_MODE_CON, 0, 15, 0, rk3588_pll_rates),
+	[V0PLL] = PLL(pll_rk3588, PLL_V0PLL, RK3588_PLL_CON(88),
+		      RK3588_MODE_CON0, 4, 15, 0, rk3588_pll_rates),
+	[AUPLL] = PLL(pll_rk3588, PLL_AUPLL, RK3588_PLL_CON(96),
+		      RK3588_MODE_CON0, 6, 15, 0, rk3588_pll_rates),
+	[CPLL] = PLL(pll_rk3588, PLL_CPLL, RK3588_PLL_CON(104),
+		     RK3588_MODE_CON0, 8, 15, 0, rk3588_pll_rates),
+	[GPLL] = PLL(pll_rk3588, PLL_GPLL, RK3588_PLL_CON(112),
+		     RK3588_MODE_CON0, 2, 15, 0, rk3588_pll_rates),
+	[NPLL] = PLL(pll_rk3588, PLL_NPLL, RK3588_PLL_CON(120),
+		     RK3588_MODE_CON0, 0, 15, 0, rk3588_pll_rates),
+	[PPLL] = PLL(pll_rk3588, PLL_PPLL, RK3588_PMU_PLL_CON(128),
+		     RK3588_MODE_CON0, 10, 15, 0, rk3588_pll_rates),
+};
+
+#ifndef CONFIG_SPL_BUILD
+#define RK3588_CLK_DUMP(_id, _name, _iscru)	\
+{						\
+	.id = _id,				\
+	.name = _name,				\
+	.is_cru = _iscru,			\
+}
+
+static const struct rk3588_clk_info clks_dump[] = {
+	RK3588_CLK_DUMP(PLL_B0PLL, "b0pll", true),
+	RK3588_CLK_DUMP(PLL_B1PLL, "b1pll", true),
+	RK3588_CLK_DUMP(PLL_LPLL, "lpll", true),
+	RK3588_CLK_DUMP(PLL_V0PLL, "v0pll", true),
+	RK3588_CLK_DUMP(PLL_AUPLL, "aupll", true),
+	RK3588_CLK_DUMP(PLL_CPLL, "cpll", true),
+	RK3588_CLK_DUMP(PLL_GPLL, "gpll", true),
+	RK3588_CLK_DUMP(PLL_NPLL, "npll", true),
+	RK3588_CLK_DUMP(PLL_PPLL, "ppll", true),
+	RK3588_CLK_DUMP(ACLK_CENTER_ROOT, "aclk_center_root", true),
+	RK3588_CLK_DUMP(PCLK_CENTER_ROOT, "pclk_center_root", true),
+	RK3588_CLK_DUMP(HCLK_CENTER_ROOT, "hclk_center_root", true),
+	RK3588_CLK_DUMP(ACLK_CENTER_LOW_ROOT, "aclk_center_low_root", true),
+	RK3588_CLK_DUMP(ACLK_TOP_ROOT, "aclk_top_root", true),
+	RK3588_CLK_DUMP(PCLK_TOP_ROOT, "pclk_top_root", true),
+	RK3588_CLK_DUMP(ACLK_LOW_TOP_ROOT, "aclk_low_top_root", true),
+};
+#endif
+
+#ifndef CONFIG_SPL_BUILD
+/*
+ *
+ * rational_best_approximation(31415, 10000,
+ *		(1 << 8) - 1, (1 << 5) - 1, &n, &d);
+ *
+ * you may look at given_numerator as a fixed point number,
+ * with the fractional part size described in given_denominator.
+ *
+ * for theoretical background, see:
+ * http://en.wikipedia.org/wiki/Continued_fraction
+ */
+static void rational_best_approximation(unsigned long given_numerator,
+					unsigned long given_denominator,
+					unsigned long max_numerator,
+					unsigned long max_denominator,
+					unsigned long *best_numerator,
+					unsigned long *best_denominator)
+{
+	unsigned long n, d, n0, d0, n1, d1;
+
+	n = given_numerator;
+	d = given_denominator;
+	n0 = 0;
+	d1 = 0;
+	n1 = 1;
+	d0 = 1;
+	for (;;) {
+		unsigned long t, a;
+
+		if (n1 > max_numerator || d1 > max_denominator) {
+			n1 = n0;
+			d1 = d0;
+			break;
+		}
+		if (d == 0)
+			break;
+		t = d;
+		a = n / d;
+		d = n % d;
+		n = t;
+		t = n0 + a * n1;
+		n0 = n1;
+		n1 = t;
+		t = d0 + a * d1;
+		d0 = d1;
+		d1 = t;
+	}
+	*best_numerator = n1;
+	*best_denominator = d1;
+}
+#endif
+
+static ulong rk3588_center_get_clk(struct rk3588_clk_priv *priv, ulong clk_id)
+{
+	struct rk3588_cru *cru = priv->cru;
+	u32 con, sel, rate;
+
+	switch (clk_id) {
+	case ACLK_CENTER_ROOT:
+		con = readl(&cru->clksel_con[165]);
+		sel = (con & ACLK_CENTER_ROOT_SEL_MASK) >>
+		      ACLK_CENTER_ROOT_SEL_SHIFT;
+		if (sel == ACLK_CENTER_ROOT_SEL_700M)
+			rate = 702 * MHz;
+		else if (sel == ACLK_CENTER_ROOT_SEL_400M)
+			rate = 396 * MHz;
+		else if (sel == ACLK_CENTER_ROOT_SEL_200M)
+			rate = 200 * MHz;
+		else
+			rate = OSC_HZ;
+		break;
+	case ACLK_CENTER_LOW_ROOT:
+		con = readl(&cru->clksel_con[165]);
+		sel = (con & ACLK_CENTER_LOW_ROOT_SEL_MASK) >>
+		      ACLK_CENTER_LOW_ROOT_SEL_SHIFT;
+		if (sel == ACLK_CENTER_LOW_ROOT_SEL_500M)
+			rate = 500 * MHz;
+		else if (sel == ACLK_CENTER_LOW_ROOT_SEL_250M)
+			rate = 250 * MHz;
+		else if (sel == ACLK_CENTER_LOW_ROOT_SEL_100M)
+			rate = 100 * MHz;
+		else
+			rate = OSC_HZ;
+		break;
+	case HCLK_CENTER_ROOT:
+		con = readl(&cru->clksel_con[165]);
+		sel = (con & HCLK_CENTER_ROOT_SEL_MASK) >>
+		      HCLK_CENTER_ROOT_SEL_SHIFT;
+		if (sel == HCLK_CENTER_ROOT_SEL_400M)
+			rate = 396 * MHz;
+		else if (sel == HCLK_CENTER_ROOT_SEL_200M)
+			rate = 200 * MHz;
+		else if (sel == HCLK_CENTER_ROOT_SEL_100M)
+			rate = 100 * MHz;
+		else
+			rate = OSC_HZ;
+		break;
+	case PCLK_CENTER_ROOT:
+		con = readl(&cru->clksel_con[165]);
+		sel = (con & PCLK_CENTER_ROOT_SEL_MASK) >>
+		      PCLK_CENTER_ROOT_SEL_SHIFT;
+		if (sel == PCLK_CENTER_ROOT_SEL_200M)
+			rate = 200 * MHz;
+		else if (sel == PCLK_CENTER_ROOT_SEL_100M)
+			rate = 100 * MHz;
+		else if (sel == PCLK_CENTER_ROOT_SEL_50M)
+			rate = 50 * MHz;
+		else
+			rate = OSC_HZ;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return rate;
+}
+
+static ulong rk3588_center_set_clk(struct rk3588_clk_priv *priv,
+				   ulong clk_id, ulong rate)
+{
+	struct rk3588_cru *cru = priv->cru;
+	int src_clk;
+
+	switch (clk_id) {
+	case ACLK_CENTER_ROOT:
+		if (rate >= 700 * MHz)
+			src_clk = ACLK_CENTER_ROOT_SEL_700M;
+		else if (rate >= 396 * MHz)
+			src_clk = ACLK_CENTER_ROOT_SEL_400M;
+		else if (rate >= 200 * MHz)
+			src_clk = ACLK_CENTER_ROOT_SEL_200M;
+		else
+			src_clk = ACLK_CENTER_ROOT_SEL_24M;
+		rk_clrsetreg(&cru->clksel_con[165],
+			     ACLK_CENTER_ROOT_SEL_MASK,
+			     src_clk << ACLK_CENTER_ROOT_SEL_SHIFT);
+		break;
+	case ACLK_CENTER_LOW_ROOT:
+		if (rate >= 500 * MHz)
+			src_clk = ACLK_CENTER_LOW_ROOT_SEL_500M;
+		else if (rate >= 250 * MHz)
+			src_clk = ACLK_CENTER_LOW_ROOT_SEL_250M;
+		else if (rate >= 99 * MHz)
+			src_clk = ACLK_CENTER_LOW_ROOT_SEL_100M;
+		else
+			src_clk = ACLK_CENTER_LOW_ROOT_SEL_24M;
+		rk_clrsetreg(&cru->clksel_con[165],
+			     ACLK_CENTER_LOW_ROOT_SEL_MASK,
+			     src_clk << ACLK_CENTER_LOW_ROOT_SEL_SHIFT);
+		break;
+	case HCLK_CENTER_ROOT:
+		if (rate >= 396 * MHz)
+			src_clk = HCLK_CENTER_ROOT_SEL_400M;
+		else if (rate >= 198 * MHz)
+			src_clk = HCLK_CENTER_ROOT_SEL_200M;
+		else if (rate >= 99 * MHz)
+			src_clk = HCLK_CENTER_ROOT_SEL_100M;
+		else
+			src_clk = HCLK_CENTER_ROOT_SEL_24M;
+		rk_clrsetreg(&cru->clksel_con[165],
+			     HCLK_CENTER_ROOT_SEL_MASK,
+			     src_clk << HCLK_CENTER_ROOT_SEL_SHIFT);
+		break;
+	case PCLK_CENTER_ROOT:
+		if (rate >= 198 * MHz)
+			src_clk = PCLK_CENTER_ROOT_SEL_200M;
+		else if (rate >= 99 * MHz)
+			src_clk = PCLK_CENTER_ROOT_SEL_100M;
+		else if (rate >= 50 * MHz)
+			src_clk = PCLK_CENTER_ROOT_SEL_50M;
+		else
+			src_clk = PCLK_CENTER_ROOT_SEL_24M;
+		rk_clrsetreg(&cru->clksel_con[165],
+			     PCLK_CENTER_ROOT_SEL_MASK,
+			     src_clk << PCLK_CENTER_ROOT_SEL_SHIFT);
+		break;
+	default:
+		printf("do not support this center freq\n");
+		return -EINVAL;
+	}
+
+	return rk3588_center_get_clk(priv, clk_id);
+}
+
+static ulong rk3588_top_get_clk(struct rk3588_clk_priv *priv, ulong clk_id)
+{
+	struct rk3588_cru *cru = priv->cru;
+	u32 con, sel, div, rate, prate;
+
+	switch (clk_id) {
+	case ACLK_TOP_ROOT:
+		con = readl(&cru->clksel_con[8]);
+		div = (con & ACLK_TOP_ROOT_DIV_MASK) >>
+		      ACLK_TOP_ROOT_DIV_SHIFT;
+		sel = (con & ACLK_TOP_ROOT_SRC_SEL_MASK) >>
+		      ACLK_TOP_ROOT_SRC_SEL_SHIFT;
+		if (sel == ACLK_TOP_ROOT_SRC_SEL_CPLL)
+			prate = priv->cpll_hz;
+		else
+			prate = priv->cpll_hz;
+		return DIV_TO_RATE(prate, div);
+	case ACLK_LOW_TOP_ROOT:
+		con = readl(&cru->clksel_con[8]);
+		div = (con & ACLK_LOW_TOP_ROOT_DIV_MASK) >>
+		      ACLK_LOW_TOP_ROOT_DIV_SHIFT;
+		sel = (con & ACLK_LOW_TOP_ROOT_SRC_SEL_MASK) >>
+		      ACLK_LOW_TOP_ROOT_SRC_SEL_SHIFT;
+		if (sel == ACLK_LOW_TOP_ROOT_SRC_SEL_CPLL)
+			prate = priv->cpll_hz;
+		else
+			prate = priv->gpll_hz;
+		return DIV_TO_RATE(prate, div);
+	case PCLK_TOP_ROOT:
+		con = readl(&cru->clksel_con[8]);
+		sel = (con & PCLK_TOP_ROOT_SEL_MASK) >> PCLK_TOP_ROOT_SEL_SHIFT;
+		if (sel == PCLK_TOP_ROOT_SEL_100M)
+			rate = 100 * MHz;
+		else if (sel == PCLK_TOP_ROOT_SEL_50M)
+			rate = 50 * MHz;
+		else
+			rate = OSC_HZ;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return rate;
+}
+
+static ulong rk3588_top_set_clk(struct rk3588_clk_priv *priv,
+				ulong clk_id, ulong rate)
+{
+	struct rk3588_cru *cru = priv->cru;
+	int src_clk, src_clk_div;
+
+	switch (clk_id) {
+	case ACLK_TOP_ROOT:
+		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);
+		assert(src_clk_div - 1 <= 31);
+		rk_clrsetreg(&cru->clksel_con[8],
+			     ACLK_TOP_ROOT_DIV_MASK |
+			     ACLK_TOP_ROOT_SRC_SEL_MASK,
+			     (ACLK_TOP_ROOT_SRC_SEL_GPLL <<
+			      ACLK_TOP_ROOT_SRC_SEL_SHIFT) |
+			     (src_clk_div - 1) << ACLK_TOP_ROOT_DIV_SHIFT);
+		break;
+	case ACLK_LOW_TOP_ROOT:
+		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);
+		assert(src_clk_div - 1 <= 31);
+		rk_clrsetreg(&cru->clksel_con[8],
+			     ACLK_LOW_TOP_ROOT_DIV_MASK |
+			     ACLK_LOW_TOP_ROOT_SRC_SEL_MASK,
+			     (ACLK_LOW_TOP_ROOT_SRC_SEL_GPLL <<
+			      ACLK_LOW_TOP_ROOT_SRC_SEL_SHIFT) |
+			     (src_clk_div - 1) << ACLK_LOW_TOP_ROOT_DIV_SHIFT);
+		break;
+	case PCLK_TOP_ROOT:
+		if (rate == 100 * MHz)
+			src_clk = PCLK_TOP_ROOT_SEL_100M;
+		else if (rate == 50 * MHz)
+			src_clk = PCLK_TOP_ROOT_SEL_50M;
+		else
+			src_clk = PCLK_TOP_ROOT_SEL_24M;
+		rk_clrsetreg(&cru->clksel_con[8],
+			     PCLK_TOP_ROOT_SEL_MASK,
+			     src_clk << PCLK_TOP_ROOT_SEL_SHIFT);
+		break;
+	default:
+		printf("do not support this top freq\n");
+		return -EINVAL;
+	}
+
+	return rk3588_top_get_clk(priv, clk_id);
+}
+
+static ulong rk3588_i2c_get_clk(struct rk3588_clk_priv *priv, ulong clk_id)
+{
+	struct rk3588_cru *cru = priv->cru;
+	u32 sel, con;
+	ulong rate;
+
+	switch (clk_id) {
+	case CLK_I2C0:
+		con = readl(&cru->pmuclksel_con[3]);
+		sel = (con & CLK_I2C0_SEL_MASK) >> CLK_I2C0_SEL_SHIFT;
+		break;
+	case CLK_I2C1:
+		con = readl(&cru->clksel_con[38]);
+		sel = (con & CLK_I2C1_SEL_MASK) >> CLK_I2C1_SEL_SHIFT;
+		break;
+	case CLK_I2C2:
+		con = readl(&cru->clksel_con[38]);
+		sel = (con & CLK_I2C2_SEL_MASK) >> CLK_I2C2_SEL_SHIFT;
+		break;
+	case CLK_I2C3:
+		con = readl(&cru->clksel_con[38]);
+		sel = (con & CLK_I2C3_SEL_MASK) >> CLK_I2C3_SEL_SHIFT;
+		break;
+	case CLK_I2C4:
+		con = readl(&cru->clksel_con[38]);
+		sel = (con & CLK_I2C4_SEL_MASK) >> CLK_I2C4_SEL_SHIFT;
+		break;
+	case CLK_I2C5:
+		con = readl(&cru->clksel_con[38]);
+		sel = (con & CLK_I2C5_SEL_MASK) >> CLK_I2C5_SEL_SHIFT;
+		break;
+	case CLK_I2C6:
+		con = readl(&cru->clksel_con[38]);
+		sel = (con & CLK_I2C6_SEL_MASK) >> CLK_I2C6_SEL_SHIFT;
+		break;
+	case CLK_I2C7:
+		con = readl(&cru->clksel_con[38]);
+		sel = (con & CLK_I2C7_SEL_MASK) >> CLK_I2C7_SEL_SHIFT;
+		break;
+	case CLK_I2C8:
+		con = readl(&cru->clksel_con[38]);
+		sel = (con & CLK_I2C8_SEL_MASK) >> CLK_I2C8_SEL_SHIFT;
+		break;
+	default:
+		return -ENOENT;
+	}
+	if (sel == CLK_I2C_SEL_200M)
+		rate = 200 * MHz;
+	else
+		rate = 100 * MHz;
+
+	return rate;
+}
+
+static ulong rk3588_i2c_set_clk(struct rk3588_clk_priv *priv, ulong clk_id,
+				ulong rate)
+{
+	struct rk3588_cru *cru = priv->cru;
+	int src_clk;
+
+	if (rate >= 198 * MHz)
+		src_clk = CLK_I2C_SEL_200M;
+	else
+		src_clk = CLK_I2C_SEL_100M;
+
+	switch (clk_id) {
+	case CLK_I2C0:
+		rk_clrsetreg(&cru->pmuclksel_con[3], CLK_I2C0_SEL_MASK,
+			     src_clk << CLK_I2C0_SEL_SHIFT);
+		break;
+	case CLK_I2C1:
+		rk_clrsetreg(&cru->clksel_con[38], CLK_I2C1_SEL_MASK,
+			     src_clk << CLK_I2C1_SEL_SHIFT);
+		break;
+	case CLK_I2C2:
+		rk_clrsetreg(&cru->clksel_con[38], CLK_I2C2_SEL_MASK,
+			     src_clk << CLK_I2C2_SEL_SHIFT);
+		break;
+	case CLK_I2C3:
+		rk_clrsetreg(&cru->clksel_con[38], CLK_I2C3_SEL_MASK,
+			     src_clk << CLK_I2C3_SEL_SHIFT);
+		break;
+	case CLK_I2C4:
+		rk_clrsetreg(&cru->clksel_con[38], CLK_I2C4_SEL_MASK,
+			     src_clk << CLK_I2C4_SEL_SHIFT);
+		break;
+	case CLK_I2C5:
+		rk_clrsetreg(&cru->clksel_con[38], CLK_I2C5_SEL_MASK,
+			     src_clk << CLK_I2C5_SEL_SHIFT);
+		break;
+	case CLK_I2C6:
+		rk_clrsetreg(&cru->clksel_con[38], CLK_I2C6_SEL_MASK,
+			     src_clk << CLK_I2C6_SEL_SHIFT);
+		break;
+	case CLK_I2C7:
+		rk_clrsetreg(&cru->clksel_con[38], CLK_I2C7_SEL_MASK,
+			     src_clk << CLK_I2C7_SEL_SHIFT);
+		break;
+	case CLK_I2C8:
+		rk_clrsetreg(&cru->clksel_con[38], CLK_I2C8_SEL_MASK,
+			     src_clk << CLK_I2C8_SEL_SHIFT);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return rk3588_i2c_get_clk(priv, clk_id);
+}
+
+static ulong rk3588_spi_get_clk(struct rk3588_clk_priv *priv, ulong clk_id)
+{
+	struct rk3588_cru *cru = priv->cru;
+	u32 sel, con;
+
+	con = readl(&cru->clksel_con[59]);
+
+	switch (clk_id) {
+	case CLK_SPI0:
+		sel = (con & CLK_SPI0_SEL_MASK) >> CLK_SPI0_SEL_SHIFT;
+		break;
+	case CLK_SPI1:
+		sel = (con & CLK_SPI1_SEL_MASK) >> CLK_SPI1_SEL_SHIFT;
+		break;
+	case CLK_SPI2:
+		sel = (con & CLK_SPI2_SEL_MASK) >> CLK_SPI2_SEL_SHIFT;
+		break;
+	case CLK_SPI3:
+		sel = (con & CLK_SPI3_SEL_MASK) >> CLK_SPI3_SEL_SHIFT;
+		break;
+	case CLK_SPI4:
+		sel = (con & CLK_SPI4_SEL_MASK) >> CLK_SPI4_SEL_SHIFT;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	switch (sel) {
+	case CLK_SPI_SEL_200M:
+		return 200 * MHz;
+	case CLK_SPI_SEL_150M:
+		return 150 * MHz;
+	case CLK_SPI_SEL_24M:
+		return OSC_HZ;
+	default:
+		return -ENOENT;
+	}
+}
+
+static ulong rk3588_spi_set_clk(struct rk3588_clk_priv *priv,
+				ulong clk_id, ulong rate)
+{
+	struct rk3588_cru *cru = priv->cru;
+	int src_clk;
+
+	if (rate >= 198 * MHz)
+		src_clk = CLK_SPI_SEL_200M;
+	else if (rate >= 140 * MHz)
+		src_clk = CLK_SPI_SEL_150M;
+	else
+		src_clk = CLK_SPI_SEL_24M;
+
+	switch (clk_id) {
+	case CLK_SPI0:
+		rk_clrsetreg(&cru->clksel_con[59],
+			     CLK_SPI0_SEL_MASK,
+			     src_clk << CLK_SPI0_SEL_SHIFT);
+		break;
+	case CLK_SPI1:
+		rk_clrsetreg(&cru->clksel_con[59],
+			     CLK_SPI1_SEL_MASK,
+			     src_clk << CLK_SPI1_SEL_SHIFT);
+		break;
+	case CLK_SPI2:
+		rk_clrsetreg(&cru->clksel_con[59],
+			     CLK_SPI2_SEL_MASK,
+			     src_clk << CLK_SPI2_SEL_SHIFT);
+		break;
+	case CLK_SPI3:
+		rk_clrsetreg(&cru->clksel_con[59],
+			     CLK_SPI3_SEL_MASK,
+			     src_clk << CLK_SPI3_SEL_SHIFT);
+		break;
+	case CLK_SPI4:
+		rk_clrsetreg(&cru->clksel_con[59],
+			     CLK_SPI4_SEL_MASK,
+			     src_clk << CLK_SPI4_SEL_SHIFT);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return rk3588_spi_get_clk(priv, clk_id);
+}
+
+static ulong rk3588_pwm_get_clk(struct rk3588_clk_priv *priv, ulong clk_id)
+{
+	struct rk3588_cru *cru = priv->cru;
+	u32 sel, con;
+
+	switch (clk_id) {
+	case CLK_PWM1:
+		con = readl(&cru->clksel_con[59]);
+		sel = (con & CLK_PWM1_SEL_MASK) >> CLK_PWM3_SEL_SHIFT;
+		break;
+	case CLK_PWM2:
+		con = readl(&cru->clksel_con[59]);
+		sel = (con & CLK_PWM2_SEL_MASK) >> CLK_PWM2_SEL_SHIFT;
+		break;
+	case CLK_PWM3:
+		con = readl(&cru->clksel_con[60]);
+		sel = (con & CLK_PWM3_SEL_MASK) >> CLK_PWM3_SEL_SHIFT;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	switch (sel) {
+	case CLK_PWM_SEL_100M:
+		return 100 * MHz;
+	case CLK_PWM_SEL_50M:
+		return 50 * MHz;
+	case CLK_PWM_SEL_24M:
+		return OSC_HZ;
+	default:
+		return -ENOENT;
+	}
+}
+
+static ulong rk3588_pwm_set_clk(struct rk3588_clk_priv *priv,
+				ulong clk_id, ulong rate)
+{
+	struct rk3588_cru *cru = priv->cru;
+	int src_clk;
+
+	if (rate >= 99 * MHz)
+		src_clk = CLK_PWM_SEL_100M;
+	else if (rate >= 50 * MHz)
+		src_clk = CLK_PWM_SEL_50M;
+	else
+		src_clk = CLK_PWM_SEL_24M;
+
+	switch (clk_id) {
+	case CLK_PWM1:
+		rk_clrsetreg(&cru->clksel_con[59],
+			     CLK_PWM1_SEL_MASK,
+			     src_clk << CLK_PWM1_SEL_SHIFT);
+		break;
+	case CLK_PWM2:
+		rk_clrsetreg(&cru->clksel_con[59],
+			     CLK_PWM2_SEL_MASK,
+			     src_clk << CLK_PWM2_SEL_SHIFT);
+		break;
+	case CLK_PWM3:
+		rk_clrsetreg(&cru->clksel_con[60],
+			     CLK_PWM3_SEL_MASK,
+			     src_clk << CLK_PWM3_SEL_SHIFT);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return rk3588_pwm_get_clk(priv, clk_id);
+}
+
+static ulong rk3588_adc_get_clk(struct rk3588_clk_priv *priv, ulong clk_id)
+{
+	struct rk3588_cru *cru = priv->cru;
+	u32 div, sel, con, prate;
+
+	switch (clk_id) {
+	case CLK_SARADC:
+		con = readl(&cru->clksel_con[40]);
+		div = (con & CLK_SARADC_DIV_MASK) >> CLK_SARADC_DIV_SHIFT;
+		sel = (con & CLK_SARADC_SEL_MASK) >>
+		      CLK_SARADC_SEL_SHIFT;
+		if (sel == CLK_SARADC_SEL_24M)
+			prate = OSC_HZ;
+		else
+			prate = priv->gpll_hz;
+		return DIV_TO_RATE(prate, div);
+	case CLK_TSADC:
+		con = readl(&cru->clksel_con[41]);
+		div = (con & CLK_TSADC_DIV_MASK) >>
+		      CLK_TSADC_DIV_SHIFT;
+		sel = (con & CLK_TSADC_SEL_MASK) >>
+		      CLK_TSADC_SEL_SHIFT;
+		if (sel == CLK_TSADC_SEL_24M)
+			prate = OSC_HZ;
+		else
+			prate = 100 * MHz;
+		return DIV_TO_RATE(prate, div);
+	default:
+		return -ENOENT;
+	}
+}
+
+static ulong rk3588_adc_set_clk(struct rk3588_clk_priv *priv,
+				ulong clk_id, ulong rate)
+{
+	struct rk3588_cru *cru = priv->cru;
+	int src_clk_div;
+
+	switch (clk_id) {
+	case CLK_SARADC:
+		if (!(OSC_HZ % rate)) {
+			src_clk_div = DIV_ROUND_UP(OSC_HZ, rate);
+			assert(src_clk_div - 1 <= 255);
+			rk_clrsetreg(&cru->clksel_con[40],
+				     CLK_SARADC_SEL_MASK |
+				     CLK_SARADC_DIV_MASK,
+				     (CLK_SARADC_SEL_24M <<
+				      CLK_SARADC_SEL_SHIFT) |
+				     (src_clk_div - 1) <<
+				     CLK_SARADC_DIV_SHIFT);
+		} else {
+			src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);
+			assert(src_clk_div - 1 <= 255);
+			rk_clrsetreg(&cru->clksel_con[40],
+				     CLK_SARADC_SEL_MASK |
+				     CLK_SARADC_DIV_MASK,
+				     (CLK_SARADC_SEL_GPLL <<
+				      CLK_SARADC_SEL_SHIFT) |
+				     (src_clk_div - 1) <<
+				     CLK_SARADC_DIV_SHIFT);
+		}
+		break;
+	case CLK_TSADC:
+		if (!(OSC_HZ % rate)) {
+			src_clk_div = DIV_ROUND_UP(OSC_HZ, rate);
+			assert(src_clk_div - 1 <= 255);
+			rk_clrsetreg(&cru->clksel_con[41],
+				     CLK_TSADC_SEL_MASK |
+				     CLK_TSADC_DIV_MASK,
+				     (CLK_TSADC_SEL_24M <<
+				      CLK_TSADC_SEL_SHIFT) |
+				     (src_clk_div - 1) <<
+				     CLK_TSADC_DIV_SHIFT);
+		} else {
+			src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);
+			assert(src_clk_div - 1 <= 7);
+			rk_clrsetreg(&cru->clksel_con[41],
+				     CLK_TSADC_SEL_MASK |
+				     CLK_TSADC_DIV_MASK,
+				     (CLK_TSADC_SEL_GPLL <<
+				      CLK_TSADC_SEL_SHIFT) |
+				     (src_clk_div - 1) <<
+				     CLK_TSADC_DIV_SHIFT);
+		}
+		break;
+	default:
+		return -ENOENT;
+	}
+	return rk3588_adc_get_clk(priv, clk_id);
+}
+
+static ulong rk3588_mmc_get_clk(struct rk3588_clk_priv *priv, ulong clk_id)
+{
+	struct rk3588_cru *cru = priv->cru;
+	u32 sel, con, div, prate;
+
+	switch (clk_id) {
+	case CCLK_SRC_SDIO:
+		con = readl(&cru->clksel_con[172]);
+		div = (con & CCLK_SDIO_SRC_DIV_MASK) >> CCLK_SDIO_SRC_DIV_SHIFT;
+		sel = (con & CCLK_SDIO_SRC_SEL_MASK) >>
+		      CCLK_SDIO_SRC_SEL_SHIFT;
+		if (sel == CCLK_SDIO_SRC_SEL_GPLL)
+			prate = priv->gpll_hz;
+		else if (sel == CCLK_SDIO_SRC_SEL_CPLL)
+			prate = priv->cpll_hz;
+		else
+			prate = OSC_HZ;
+		return DIV_TO_RATE(prate, div);
+	case CCLK_EMMC:
+		con = readl(&cru->clksel_con[77]);
+		div = (con & CCLK_EMMC_DIV_MASK) >> CCLK_EMMC_DIV_SHIFT;
+		sel = (con & CCLK_EMMC_SEL_MASK) >>
+		      CCLK_EMMC_SEL_SHIFT;
+		if (sel == CCLK_EMMC_SEL_GPLL)
+			prate = priv->gpll_hz;
+		else if (sel == CCLK_EMMC_SEL_CPLL)
+			prate = priv->cpll_hz;
+		else
+			prate = OSC_HZ;
+		return DIV_TO_RATE(prate, div);
+	case BCLK_EMMC:
+		con = readl(&cru->clksel_con[78]);
+		div = (con & BCLK_EMMC_DIV_MASK) >> BCLK_EMMC_DIV_SHIFT;
+		sel = (con & BCLK_EMMC_SEL_MASK) >>
+		      BCLK_EMMC_SEL_SHIFT;
+		if (sel == CCLK_EMMC_SEL_CPLL)
+			prate = priv->cpll_hz;
+		else
+			prate = priv->gpll_hz;
+		return DIV_TO_RATE(prate, div);
+	case SCLK_SFC:
+		con = readl(&cru->clksel_con[78]);
+		div = (con & SCLK_SFC_DIV_MASK) >> SCLK_SFC_DIV_SHIFT;
+		sel = (con & SCLK_SFC_SEL_MASK) >>
+		      SCLK_SFC_SEL_SHIFT;
+		if (sel == SCLK_SFC_SEL_GPLL)
+			prate = priv->gpll_hz;
+		else if (sel == SCLK_SFC_SEL_CPLL)
+			prate = priv->cpll_hz;
+		else
+			prate = OSC_HZ;
+		return DIV_TO_RATE(prate, div);
+	default:
+		return -ENOENT;
+	}
+}
+
+static ulong rk3588_mmc_set_clk(struct rk3588_clk_priv *priv,
+				ulong clk_id, ulong rate)
+{
+	struct rk3588_cru *cru = priv->cru;
+	int src_clk, div;
+
+	switch (clk_id) {
+	case CCLK_SRC_SDIO:
+	case CCLK_EMMC:
+	case SCLK_SFC:
+		if (!(OSC_HZ % rate)) {
+			src_clk = SCLK_SFC_SEL_24M;
+			div = DIV_ROUND_UP(OSC_HZ, rate);
+		} else if (!(priv->cpll_hz % rate)) {
+			src_clk = SCLK_SFC_SEL_CPLL;
+			div = DIV_ROUND_UP(priv->cpll_hz, rate);
+		} else {
+			src_clk = SCLK_SFC_SEL_GPLL;
+			div = DIV_ROUND_UP(priv->gpll_hz, rate);
+		}
+		break;
+	case BCLK_EMMC:
+		if (!(priv->cpll_hz % rate)) {
+			src_clk = CCLK_EMMC_SEL_CPLL;
+			div = DIV_ROUND_UP(priv->cpll_hz, rate);
+		} else {
+			src_clk = CCLK_EMMC_SEL_GPLL;
+			div = DIV_ROUND_UP(priv->gpll_hz, rate);
+		}
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	switch (clk_id) {
+	case CCLK_SRC_SDIO:
+		rk_clrsetreg(&cru->clksel_con[172],
+			     CCLK_SDIO_SRC_SEL_MASK |
+			     CCLK_SDIO_SRC_DIV_MASK,
+			     (src_clk << CCLK_SDIO_SRC_SEL_SHIFT) |
+			     (div - 1) << CCLK_SDIO_SRC_DIV_SHIFT);
+		break;
+	case CCLK_EMMC:
+		rk_clrsetreg(&cru->clksel_con[77],
+			     CCLK_EMMC_SEL_MASK |
+			     CCLK_EMMC_DIV_MASK,
+			     (src_clk << CCLK_EMMC_SEL_SHIFT) |
+			     (div - 1) << CCLK_EMMC_DIV_SHIFT);
+		break;
+	case BCLK_EMMC:
+		rk_clrsetreg(&cru->clksel_con[78],
+			     BCLK_EMMC_DIV_MASK |
+			     BCLK_EMMC_SEL_MASK,
+			     (src_clk << BCLK_EMMC_SEL_SHIFT) |
+			     (div - 1) << BCLK_EMMC_DIV_SHIFT);
+		break;
+	case SCLK_SFC:
+		rk_clrsetreg(&cru->clksel_con[78],
+			     SCLK_SFC_DIV_MASK |
+			     SCLK_SFC_SEL_MASK,
+			     (src_clk << SCLK_SFC_SEL_SHIFT) |
+			     (div - 1) << SCLK_SFC_DIV_SHIFT);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return rk3588_mmc_get_clk(priv, clk_id);
+}
+
+#ifndef CONFIG_SPL_BUILD
+static ulong rk3588_aclk_vop_get_clk(struct rk3588_clk_priv *priv, ulong clk_id)
+{
+	struct rk3588_cru *cru = priv->cru;
+	u32 div, sel, con, parent;
+
+	switch (clk_id) {
+	case ACLK_VOP_ROOT:
+		con = readl(&cru->clksel_con[110]);
+		div = (con & ACLK_VOP_ROOT_DIV_MASK) >> ACLK_VOP_ROOT_DIV_SHIFT;
+		sel = (con & ACLK_VOP_ROOT_SEL_MASK) >> ACLK_VOP_ROOT_SEL_SHIFT;
+		if (sel == ACLK_VOP_ROOT_SEL_GPLL)
+			parent = priv->gpll_hz;
+		else if (sel == ACLK_VOP_ROOT_SEL_CPLL)
+			parent = priv->cpll_hz;
+		else if (sel == ACLK_VOP_ROOT_SEL_AUPLL)
+			parent = priv->aupll_hz;
+		else if (sel == ACLK_VOP_ROOT_SEL_NPLL)
+			parent = priv->npll_hz;
+		else
+			parent = 702 * MHz;
+		return DIV_TO_RATE(parent, div);
+	case ACLK_VOP_LOW_ROOT:
+		con = readl(&cru->clksel_con[110]);
+		sel = (con & ACLK_VOP_LOW_ROOT_SEL_MASK) >>
+		      ACLK_VOP_LOW_ROOT_SEL_SHIFT;
+		if (sel == ACLK_VOP_LOW_ROOT_SEL_400M)
+			return 396 * MHz;
+		else if (sel == ACLK_VOP_LOW_ROOT_SEL_200M)
+			return 200 * MHz;
+		else if (sel == ACLK_VOP_LOW_ROOT_SEL_100M)
+			return 100 * MHz;
+		else
+			return OSC_HZ;
+	case HCLK_VOP_ROOT:
+		con = readl(&cru->clksel_con[110]);
+		sel = (con & HCLK_VOP_ROOT_SEL_MASK) >> HCLK_VOP_ROOT_SEL_SHIFT;
+		if (sel == HCLK_VOP_ROOT_SEL_200M)
+			return 200 * MHz;
+		else if (sel == HCLK_VOP_ROOT_SEL_100M)
+			return 100 * MHz;
+		else if (sel == HCLK_VOP_ROOT_SEL_50M)
+			return 50 * MHz;
+		else
+			return OSC_HZ;
+	default:
+		return -ENOENT;
+	}
+}
+
+static ulong rk3588_aclk_vop_set_clk(struct rk3588_clk_priv *priv,
+				     ulong clk_id, ulong rate)
+{
+	struct rk3588_cru *cru = priv->cru;
+	int src_clk, div;
+
+	switch (clk_id) {
+	case ACLK_VOP_ROOT:
+		if (!(priv->cpll_hz % rate)) {
+			src_clk = ACLK_VOP_ROOT_SEL_CPLL;
+			div = DIV_ROUND_UP(priv->cpll_hz, rate);
+		} else {
+			src_clk = ACLK_VOP_ROOT_SEL_GPLL;
+			div = DIV_ROUND_UP(priv->gpll_hz, rate);
+		}
+		rk_clrsetreg(&cru->clksel_con[110],
+			     ACLK_VOP_ROOT_DIV_MASK |
+			     ACLK_VOP_ROOT_SEL_MASK,
+			     (src_clk << ACLK_VOP_ROOT_SEL_SHIFT) |
+			     (div - 1) << ACLK_VOP_ROOT_DIV_SHIFT);
+		break;
+	case ACLK_VOP_LOW_ROOT:
+		if (rate == 400 * MHz || rate == 396 * MHz)
+			src_clk = ACLK_VOP_LOW_ROOT_SEL_400M;
+		else if (rate == 200 * MHz)
+			src_clk = ACLK_VOP_LOW_ROOT_SEL_200M;
+		else if (rate == 100 * MHz)
+			src_clk = ACLK_VOP_LOW_ROOT_SEL_100M;
+		else
+			src_clk = ACLK_VOP_LOW_ROOT_SEL_24M;
+		rk_clrsetreg(&cru->clksel_con[110],
+			     ACLK_VOP_LOW_ROOT_SEL_MASK,
+			     src_clk << ACLK_VOP_LOW_ROOT_SEL_SHIFT);
+		break;
+	case HCLK_VOP_ROOT:
+		if (rate == 200 * MHz)
+			src_clk = HCLK_VOP_ROOT_SEL_200M;
+		else if (rate == 100 * MHz)
+			src_clk = HCLK_VOP_ROOT_SEL_100M;
+		else if (rate == 50 * MHz)
+			src_clk = HCLK_VOP_ROOT_SEL_50M;
+		else
+			src_clk = HCLK_VOP_ROOT_SEL_24M;
+		rk_clrsetreg(&cru->clksel_con[110],
+			     HCLK_VOP_ROOT_SEL_MASK,
+			     src_clk << HCLK_VOP_ROOT_SEL_SHIFT);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return rk3588_aclk_vop_get_clk(priv, clk_id);
+}
+
+static ulong rk3588_dclk_vop_get_clk(struct rk3588_clk_priv *priv, ulong clk_id)
+{
+	struct rk3588_cru *cru = priv->cru;
+	u32 div, sel, con, parent;
+
+	switch (clk_id) {
+	case DCLK_VOP0:
+	case DCLK_VOP0_SRC:
+		con = readl(&cru->clksel_con[111]);
+		div = (con & DCLK0_VOP_SRC_DIV_MASK) >> DCLK0_VOP_SRC_DIV_SHIFT;
+		sel = (con & DCLK0_VOP_SRC_SEL_MASK) >> DCLK0_VOP_SRC_SEL_SHIFT;
+		break;
+	case DCLK_VOP1:
+	case DCLK_VOP1_SRC:
+		con = readl(&cru->clksel_con[111]);
+		div = (con & DCLK1_VOP_SRC_DIV_MASK) >> DCLK1_VOP_SRC_DIV_SHIFT;
+		sel = (con & DCLK1_VOP_SRC_SEL_MASK) >> DCLK1_VOP_SRC_SEL_SHIFT;
+		break;
+	case DCLK_VOP2:
+	case DCLK_VOP2_SRC:
+		con = readl(&cru->clksel_con[112]);
+		div = (con & DCLK2_VOP_SRC_DIV_MASK) >> DCLK2_VOP_SRC_DIV_SHIFT;
+		sel = (con & DCLK2_VOP_SRC_SEL_MASK) >> DCLK2_VOP_SRC_SEL_SHIFT;
+		break;
+	case DCLK_VOP3:
+		con = readl(&cru->clksel_con[113]);
+		div = (con & DCLK3_VOP_SRC_DIV_MASK) >> DCLK3_VOP_SRC_DIV_SHIFT;
+		sel = (con & DCLK3_VOP_SRC_SEL_MASK) >> DCLK3_VOP_SRC_SEL_SHIFT;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	if (sel == DCLK_VOP_SRC_SEL_AUPLL)
+		parent = priv->aupll_hz;
+	else if (sel == DCLK_VOP_SRC_SEL_V0PLL)
+		parent = rockchip_pll_get_rate(&rk3588_pll_clks[V0PLL],
+					       priv->cru, V0PLL);
+	else if (sel == DCLK_VOP_SRC_SEL_GPLL)
+		parent = priv->gpll_hz;
+	else if (sel == DCLK_VOP_SRC_SEL_CPLL)
+		parent = priv->cpll_hz;
+	else
+		return -ENOENT;
+
+	return DIV_TO_RATE(parent, div);
+}
+
+#define RK3588_VOP_PLL_LIMIT_FREQ 600000000
+
+static ulong rk3588_dclk_vop_set_clk(struct rk3588_clk_priv *priv,
+				     ulong clk_id, ulong rate)
+{
+	struct rk3588_cru *cru = priv->cru;
+	ulong pll_rate, now, best_rate = 0;
+	u32 i, conid, con, sel, div, best_div = 0, best_sel = 0;
+	u32 mask, div_shift, sel_shift;
+
+	switch (clk_id) {
+	case DCLK_VOP0:
+	case DCLK_VOP0_SRC:
+		conid = 111;
+		con = readl(&cru->clksel_con[111]);
+		sel = (con & DCLK0_VOP_SRC_SEL_MASK) >> DCLK0_VOP_SRC_SEL_SHIFT;
+		mask = DCLK0_VOP_SRC_SEL_MASK | DCLK0_VOP_SRC_DIV_MASK;
+		div_shift = DCLK0_VOP_SRC_DIV_SHIFT;
+		sel_shift = DCLK0_VOP_SRC_SEL_SHIFT;
+		break;
+	case DCLK_VOP1:
+	case DCLK_VOP1_SRC:
+		conid = 111;
+		con = readl(&cru->clksel_con[111]);
+		sel = (con & DCLK1_VOP_SRC_SEL_MASK) >> DCLK1_VOP_SRC_SEL_SHIFT;
+		mask = DCLK1_VOP_SRC_SEL_MASK | DCLK1_VOP_SRC_DIV_MASK;
+		div_shift = DCLK1_VOP_SRC_DIV_SHIFT;
+		sel_shift = DCLK1_VOP_SRC_SEL_SHIFT;
+		break;
+	case DCLK_VOP2:
+	case DCLK_VOP2_SRC:
+		conid = 112;
+		con = readl(&cru->clksel_con[112]);
+		sel = (con & DCLK2_VOP_SRC_SEL_MASK) >> DCLK2_VOP_SRC_SEL_SHIFT;
+		mask = DCLK2_VOP_SRC_SEL_MASK | DCLK2_VOP_SRC_DIV_MASK;
+		div_shift = DCLK2_VOP_SRC_DIV_SHIFT;
+		sel_shift = DCLK1_VOP_SRC_SEL_SHIFT;
+		break;
+	case DCLK_VOP3:
+		conid = 113;
+		con = readl(&cru->clksel_con[113]);
+		sel = (con & DCLK3_VOP_SRC_SEL_MASK) >> DCLK3_VOP_SRC_SEL_SHIFT;
+		mask = DCLK2_VOP_SRC_SEL_MASK | DCLK2_VOP_SRC_DIV_MASK;
+		div_shift = DCLK2_VOP_SRC_DIV_SHIFT;
+		sel_shift = DCLK1_VOP_SRC_SEL_SHIFT;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	if (sel == DCLK_VOP_SRC_SEL_V0PLL) {
+		div = DIV_ROUND_UP(RK3588_VOP_PLL_LIMIT_FREQ, rate);
+		rk_clrsetreg(&cru->clksel_con[conid],
+			     mask,
+			     ((div - 1) << div_shift));
+		rockchip_pll_set_rate(&rk3588_pll_clks[V0PLL],
+				      priv->cru, V0PLL, div * rate);
+	} else {
+		for (i = 0; i <= DCLK_VOP_SRC_SEL_AUPLL; i++) {
+			switch (i) {
+			case DCLK_VOP_SRC_SEL_GPLL:
+				pll_rate = priv->gpll_hz;
+				break;
+			case DCLK_VOP_SRC_SEL_CPLL:
+				pll_rate = priv->cpll_hz;
+				break;
+			case DCLK_VOP_SRC_SEL_AUPLL:
+				pll_rate = priv->aupll_hz;
+				break;
+			default:
+				printf("do not support this vop pll sel\n");
+				return -EINVAL;
+			}
+
+			div = DIV_ROUND_UP(pll_rate, rate);
+			if (div > 255)
+				continue;
+			now = pll_rate / div;
+			if (abs(rate - now) < abs(rate - best_rate)) {
+				best_rate = now;
+				best_div = div;
+				best_sel = i;
+			}
+			debug("p_rate=%lu, best_rate=%lu, div=%u, sel=%u\n",
+			      pll_rate, best_rate, best_div, best_sel);
+		}
+
+		if (best_rate) {
+			rk_clrsetreg(&cru->clksel_con[conid],
+				     mask,
+				     best_sel << sel_shift |
+				     (best_div - 1) << div_shift);
+		} else {
+			printf("do not support this vop freq %lu\n", rate);
+			return -EINVAL;
+		}
+	}
+	return rk3588_dclk_vop_get_clk(priv, clk_id);
+}
+
+static ulong rk3588_gmac_get_clk(struct rk3588_clk_priv *priv, ulong clk_id)
+{
+	struct rk3588_cru *cru = priv->cru;
+	u32 con, div;
+
+	switch (clk_id) {
+	case CLK_GMAC0_PTP_REF:
+		con = readl(&cru->clksel_con[81]);
+		div = (con & CLK_GMAC0_PTP_DIV_MASK) >> CLK_GMAC0_PTP_DIV_SHIFT;
+		return DIV_TO_RATE(priv->cpll_hz, div);
+	case CLK_GMAC1_PTP_REF:
+		con = readl(&cru->clksel_con[81]);
+		div = (con & CLK_GMAC1_PTP_DIV_MASK) >> CLK_GMAC1_PTP_DIV_SHIFT;
+		return DIV_TO_RATE(priv->cpll_hz, div);
+	case CLK_GMAC_125M:
+		con = readl(&cru->clksel_con[83]);
+		div = (con & CLK_GMAC_125M_DIV_MASK) >> CLK_GMAC_125M_DIV_SHIFT;
+		return DIV_TO_RATE(priv->cpll_hz, div);
+	case CLK_GMAC_50M:
+		con = readl(&cru->clksel_con[84]);
+		div = (con & CLK_GMAC_50M_DIV_MASK) >> CLK_GMAC_50M_DIV_SHIFT;
+		return DIV_TO_RATE(priv->cpll_hz, div);
+	default:
+		return -ENOENT;
+	}
+}
+
+static ulong rk3588_gmac_set_clk(struct rk3588_clk_priv *priv,
+				 ulong clk_id, ulong rate)
+{
+	struct rk3588_cru *cru = priv->cru;
+	int div;
+
+	div = DIV_ROUND_UP(priv->cpll_hz, rate);
+
+	switch (clk_id) {
+	case CLK_GMAC0_PTP_REF:
+		rk_clrsetreg(&cru->clksel_con[81],
+			     CLK_GMAC0_PTP_DIV_MASK | CLK_GMAC0_PTP_SEL_MASK,
+			     CLK_GMAC0_PTP_SEL_CPLL << CLK_GMAC0_PTP_SEL_SHIFT |
+			     (div - 1) << CLK_GMAC0_PTP_DIV_SHIFT);
+		break;
+	case CLK_GMAC1_PTP_REF:
+		rk_clrsetreg(&cru->clksel_con[81],
+			     CLK_GMAC1_PTP_DIV_MASK | CLK_GMAC1_PTP_SEL_MASK,
+			     CLK_GMAC1_PTP_SEL_CPLL << CLK_GMAC1_PTP_SEL_SHIFT |
+			     (div - 1) << CLK_GMAC1_PTP_DIV_SHIFT);
+		break;
+	case CLK_GMAC_125M:
+		rk_clrsetreg(&cru->clksel_con[83],
+			     CLK_GMAC_125M_DIV_MASK | CLK_GMAC_125M_SEL_MASK,
+			     CLK_GMAC_125M_SEL_CPLL << CLK_GMAC_125M_SEL_SHIFT |
+			     (div - 1) << CLK_GMAC_125M_DIV_SHIFT);
+		break;
+	case CLK_GMAC_50M:
+		rk_clrsetreg(&cru->clksel_con[84],
+			     CLK_GMAC_50M_DIV_MASK | CLK_GMAC_50M_SEL_MASK,
+			     CLK_GMAC_50M_SEL_CPLL << CLK_GMAC_50M_SEL_SHIFT |
+			     (div - 1) << CLK_GMAC_50M_DIV_SHIFT);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return rk3588_gmac_get_clk(priv, clk_id);
+}
+
+static ulong rk3588_uart_get_rate(struct rk3588_clk_priv *priv, ulong clk_id)
+{
+	struct rk3588_cru *cru = priv->cru;
+	u32 reg, con, fracdiv, div, src, p_src, p_rate;
+	unsigned long m, n;
+
+	switch (clk_id) {
+	case SCLK_UART1:
+		reg = 41;
+		break;
+	case SCLK_UART2:
+		reg = 43;
+		break;
+	case SCLK_UART3:
+		reg = 45;
+		break;
+	case SCLK_UART4:
+		reg = 47;
+		break;
+	case SCLK_UART5:
+		reg = 49;
+		break;
+	case SCLK_UART6:
+		reg = 51;
+		break;
+	case SCLK_UART7:
+		reg = 53;
+		break;
+	case SCLK_UART8:
+		reg = 55;
+		break;
+	case SCLK_UART9:
+		reg = 57;
+		break;
+	default:
+		return -ENOENT;
+	}
+	con = readl(&cru->clksel_con[reg + 2]);
+	src = (con & CLK_UART_SEL_MASK) >> CLK_UART_SEL_SHIFT;
+	con = readl(&cru->clksel_con[reg]);
+	div = (con & CLK_UART_SRC_DIV_MASK) >> CLK_UART_SRC_DIV_SHIFT;
+	p_src = (con & CLK_UART_SRC_SEL_MASK) >> CLK_UART_SRC_SEL_SHIFT;
+	if (p_src == CLK_UART_SRC_SEL_GPLL)
+		p_rate = priv->gpll_hz;
+	else
+		p_rate = priv->cpll_hz;
+
+	if (src == CLK_UART_SEL_SRC) {
+		return DIV_TO_RATE(p_rate, div);
+	} else if (src == CLK_UART_SEL_FRAC) {
+		fracdiv = readl(&cru->clksel_con[reg + 1]);
+		n = fracdiv & CLK_UART_FRAC_NUMERATOR_MASK;
+		n >>= CLK_UART_FRAC_NUMERATOR_SHIFT;
+		m = fracdiv & CLK_UART_FRAC_DENOMINATOR_MASK;
+		m >>= CLK_UART_FRAC_DENOMINATOR_SHIFT;
+		return DIV_TO_RATE(p_rate, div) * n / m;
+	} else {
+		return OSC_HZ;
+	}
+}
+
+static ulong rk3588_uart_set_rate(struct rk3588_clk_priv *priv,
+				  ulong clk_id, ulong rate)
+{
+	struct rk3588_cru *cru = priv->cru;
+	u32 reg, clk_src, uart_src, div;
+	unsigned long m = 0, n = 0, val;
+
+	if (priv->gpll_hz % rate == 0) {
+		clk_src = CLK_UART_SRC_SEL_GPLL;
+		uart_src = CLK_UART_SEL_SRC;
+		div = DIV_ROUND_UP(priv->gpll_hz, rate);
+	} else if (priv->cpll_hz % rate == 0) {
+		clk_src = CLK_UART_SRC_SEL_CPLL;
+		uart_src = CLK_UART_SEL_SRC;
+		div = DIV_ROUND_UP(priv->gpll_hz, rate);
+	} else if (rate == OSC_HZ) {
+		clk_src = CLK_UART_SRC_SEL_GPLL;
+		uart_src = CLK_UART_SEL_XIN24M;
+		div = 2;
+	} else {
+		clk_src = CLK_UART_SRC_SEL_GPLL;
+		uart_src = CLK_UART_SEL_FRAC;
+		div = 2;
+		rational_best_approximation(rate, priv->gpll_hz / div,
+					    GENMASK(16 - 1, 0),
+					    GENMASK(16 - 1, 0),
+					    &m, &n);
+	}
+
+	switch (clk_id) {
+	case SCLK_UART1:
+		reg = 41;
+		break;
+	case SCLK_UART2:
+		reg = 43;
+		break;
+	case SCLK_UART3:
+		reg = 45;
+		break;
+	case SCLK_UART4:
+		reg = 47;
+		break;
+	case SCLK_UART5:
+		reg = 49;
+		break;
+	case SCLK_UART6:
+		reg = 51;
+		break;
+	case SCLK_UART7:
+		reg = 53;
+		break;
+	case SCLK_UART8:
+		reg = 55;
+		break;
+	case SCLK_UART9:
+		reg = 57;
+		break;
+	default:
+		return -ENOENT;
+	}
+	rk_clrsetreg(&cru->clksel_con[reg],
+		     CLK_UART_SRC_SEL_MASK |
+		     CLK_UART_SRC_DIV_MASK,
+		     (clk_src << CLK_UART_SRC_SEL_SHIFT) |
+		     ((div - 1) << CLK_UART_SRC_DIV_SHIFT));
+	rk_clrsetreg(&cru->clksel_con[reg + 2],
+		     CLK_UART_SEL_MASK,
+		     (uart_src << CLK_UART_SEL_SHIFT));
+	if (m && n) {
+		val = m << CLK_UART_FRAC_NUMERATOR_SHIFT | n;
+		writel(val, &cru->clksel_con[reg + 1]);
+	}
+
+	return rk3588_uart_get_rate(priv, clk_id);
+}
+#endif
+
+static ulong rk3588_clk_get_rate(struct clk *clk)
+{
+	struct rk3588_clk_priv *priv = dev_get_priv(clk->dev);
+	ulong rate = 0;
+
+	if (!priv->gpll_hz) {
+		printf("%s gpll=%lu\n", __func__, priv->gpll_hz);
+		return -ENOENT;
+	}
+
+	switch (clk->id) {
+	case PLL_LPLL:
+		rate = rockchip_pll_get_rate(&rk3588_pll_clks[LPLL], priv->cru,
+					     LPLL);
+		break;
+	case PLL_B0PLL:
+		rate = rockchip_pll_get_rate(&rk3588_pll_clks[B0PLL], priv->cru,
+					     B0PLL);
+		break;
+	case PLL_B1PLL:
+		rate = rockchip_pll_get_rate(&rk3588_pll_clks[B1PLL], priv->cru,
+					     B1PLL);
+		break;
+	case PLL_GPLL:
+		rate = rockchip_pll_get_rate(&rk3588_pll_clks[GPLL], priv->cru,
+					     GPLL);
+		break;
+	case PLL_CPLL:
+		rate = rockchip_pll_get_rate(&rk3588_pll_clks[CPLL], priv->cru,
+					     CPLL);
+		break;
+	case PLL_NPLL:
+		rate = rockchip_pll_get_rate(&rk3588_pll_clks[NPLL], priv->cru,
+					     NPLL);
+		break;
+	case PLL_V0PLL:
+		rate = rockchip_pll_get_rate(&rk3588_pll_clks[V0PLL], priv->cru,
+					     V0PLL);
+		break;
+	case PLL_AUPLL:
+		rate = rockchip_pll_get_rate(&rk3588_pll_clks[AUPLL], priv->cru,
+					     AUPLL);
+		break;
+	case PLL_PPLL:
+		rate = rockchip_pll_get_rate(&rk3588_pll_clks[PPLL], priv->cru,
+					     PPLL);
+		break;
+	case ACLK_CENTER_ROOT:
+	case PCLK_CENTER_ROOT:
+	case HCLK_CENTER_ROOT:
+	case ACLK_CENTER_LOW_ROOT:
+		rate = rk3588_center_get_clk(priv, clk->id);
+		break;
+	case ACLK_TOP_ROOT:
+	case PCLK_TOP_ROOT:
+	case ACLK_LOW_TOP_ROOT:
+		rate = rk3588_top_get_clk(priv, clk->id);
+		break;
+	case CLK_I2C0:
+	case CLK_I2C1:
+	case CLK_I2C2:
+	case CLK_I2C3:
+	case CLK_I2C4:
+	case CLK_I2C5:
+	case CLK_I2C6:
+	case CLK_I2C7:
+	case CLK_I2C8:
+		rate = rk3588_i2c_get_clk(priv, clk->id);
+		break;
+	case CLK_SPI0:
+	case CLK_SPI1:
+	case CLK_SPI2:
+	case CLK_SPI3:
+	case CLK_SPI4:
+		rate = rk3588_spi_get_clk(priv, clk->id);
+		break;
+	case CLK_PWM1:
+	case CLK_PWM2:
+	case CLK_PWM3:
+		rate = rk3588_pwm_get_clk(priv, clk->id);
+		break;
+	case CLK_SARADC:
+	case CLK_TSADC:
+		rate = rk3588_adc_get_clk(priv, clk->id);
+		break;
+	case CCLK_SRC_SDIO:
+	case CCLK_EMMC:
+	case BCLK_EMMC:
+	case SCLK_SFC:
+		rate = rk3588_mmc_get_clk(priv, clk->id);
+		break;
+#ifndef CONFIG_SPL_BUILD
+	case ACLK_VOP_ROOT:
+	case ACLK_VOP_LOW_ROOT:
+	case HCLK_VOP_ROOT:
+		rate = rk3588_aclk_vop_get_clk(priv, clk->id);
+		break;
+	case DCLK_VOP0:
+	case DCLK_VOP0_SRC:
+	case DCLK_VOP1:
+	case DCLK_VOP1_SRC:
+	case DCLK_VOP2:
+	case DCLK_VOP2_SRC:
+	case DCLK_VOP3:
+		rate = rk3588_dclk_vop_get_clk(priv, clk->id);
+		break;
+	case CLK_GMAC0_PTP_REF:
+	case CLK_GMAC1_PTP_REF:
+	case CLK_GMAC_125M:
+	case CLK_GMAC_50M:
+		rate = rk3588_gmac_get_clk(priv, clk->id);
+		break;
+	case SCLK_UART1:
+	case SCLK_UART2:
+	case SCLK_UART3:
+	case SCLK_UART4:
+	case SCLK_UART5:
+	case SCLK_UART6:
+	case SCLK_UART7:
+	case SCLK_UART8:
+	case SCLK_UART9:
+		rate = rk3588_uart_get_rate(priv, clk->id);
+		break;
+#endif
+	default:
+		return -ENOENT;
+	}
+
+	return rate;
+};
+
+static ulong rk3588_clk_set_rate(struct clk *clk, ulong rate)
+{
+	struct rk3588_clk_priv *priv = dev_get_priv(clk->dev);
+	ulong ret = 0;
+
+	if (!priv->gpll_hz) {
+		printf("%s gpll=%lu\n", __func__, priv->gpll_hz);
+		return -ENOENT;
+	}
+
+	switch (clk->id) {
+	case PLL_CPLL:
+		ret = rockchip_pll_set_rate(&rk3588_pll_clks[CPLL], priv->cru,
+					    CPLL, rate);
+		priv->cpll_hz = rockchip_pll_get_rate(&rk3588_pll_clks[CPLL],
+						      priv->cru, CPLL);
+		break;
+	case PLL_GPLL:
+		ret = rockchip_pll_set_rate(&rk3588_pll_clks[GPLL], priv->cru,
+					    GPLL, rate);
+		priv->gpll_hz = rockchip_pll_get_rate(&rk3588_pll_clks[GPLL],
+						      priv->cru, GPLL);
+		break;
+	case PLL_NPLL:
+		ret = rockchip_pll_set_rate(&rk3588_pll_clks[NPLL], priv->cru,
+					    NPLL, rate);
+		break;
+	case PLL_V0PLL:
+		ret = rockchip_pll_set_rate(&rk3588_pll_clks[V0PLL], priv->cru,
+					    V0PLL, rate);
+		priv->v0pll_hz = rockchip_pll_get_rate(&rk3588_pll_clks[V0PLL],
+						       priv->cru, V0PLL);
+		break;
+	case PLL_AUPLL:
+		ret = rockchip_pll_set_rate(&rk3588_pll_clks[AUPLL], priv->cru,
+					    AUPLL, rate);
+		priv->aupll_hz = rockchip_pll_get_rate(&rk3588_pll_clks[AUPLL],
+						       priv->cru, AUPLL);
+		break;
+	case PLL_PPLL:
+		ret = rockchip_pll_set_rate(&rk3588_pll_clks[PPLL], priv->cru,
+					    PPLL, rate);
+		priv->ppll_hz = rockchip_pll_get_rate(&rk3588_pll_clks[PPLL],
+						      priv->cru, PPLL);
+		break;
+	case ACLK_CENTER_ROOT:
+	case PCLK_CENTER_ROOT:
+	case HCLK_CENTER_ROOT:
+	case ACLK_CENTER_LOW_ROOT:
+		ret = rk3588_center_set_clk(priv, clk->id, rate);
+		break;
+	case ACLK_TOP_ROOT:
+	case PCLK_TOP_ROOT:
+	case ACLK_LOW_TOP_ROOT:
+		ret = rk3588_top_set_clk(priv, clk->id, rate);
+		break;
+	case CLK_I2C0:
+	case CLK_I2C1:
+	case CLK_I2C2:
+	case CLK_I2C3:
+	case CLK_I2C4:
+	case CLK_I2C5:
+	case CLK_I2C6:
+	case CLK_I2C7:
+	case CLK_I2C8:
+		ret = rk3588_i2c_set_clk(priv, clk->id, rate);
+		break;
+	case CLK_SPI0:
+	case CLK_SPI1:
+	case CLK_SPI2:
+	case CLK_SPI3:
+	case CLK_SPI4:
+		ret = rk3588_spi_set_clk(priv, clk->id, rate);
+		break;
+	case CLK_PWM1:
+	case CLK_PWM2:
+	case CLK_PWM3:
+		ret = rk3588_pwm_set_clk(priv, clk->id, rate);
+		break;
+	case CLK_SARADC:
+	case CLK_TSADC:
+		ret = rk3588_adc_set_clk(priv, clk->id, rate);
+		break;
+	case CCLK_SRC_SDIO:
+	case CCLK_EMMC:
+	case BCLK_EMMC:
+	case SCLK_SFC:
+		ret = rk3588_mmc_set_clk(priv, clk->id, rate);
+		break;
+#ifndef CONFIG_SPL_BUILD
+	case ACLK_VOP_ROOT:
+	case ACLK_VOP_LOW_ROOT:
+	case HCLK_VOP_ROOT:
+		ret = rk3588_aclk_vop_set_clk(priv, clk->id, rate);
+		break;
+	case DCLK_VOP0:
+	case DCLK_VOP0_SRC:
+	case DCLK_VOP1:
+	case DCLK_VOP1_SRC:
+	case DCLK_VOP2:
+	case DCLK_VOP2_SRC:
+	case DCLK_VOP3:
+		ret = rk3588_dclk_vop_set_clk(priv, clk->id, rate);
+		break;
+	case CLK_GMAC0_PTP_REF:
+	case CLK_GMAC1_PTP_REF:
+	case CLK_GMAC_125M:
+	case CLK_GMAC_50M:
+		ret = rk3588_gmac_set_clk(priv, 0, rate);
+		break;
+	case SCLK_UART1:
+	case SCLK_UART2:
+	case SCLK_UART3:
+	case SCLK_UART4:
+	case SCLK_UART5:
+	case SCLK_UART6:
+	case SCLK_UART7:
+	case SCLK_UART8:
+	case SCLK_UART9:
+		ret = rk3588_uart_set_rate(priv, clk->id, rate);
+		break;
+#endif
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+};
+
+#define ROCKCHIP_MMC_DELAY_SEL		BIT(10)
+#define ROCKCHIP_MMC_DEGREE_MASK	0x3
+#define ROCKCHIP_MMC_DELAYNUM_OFFSET	2
+#define ROCKCHIP_MMC_DELAYNUM_MASK	(0xff << ROCKCHIP_MMC_DELAYNUM_OFFSET)
+
+#define PSECS_PER_SEC 1000000000000LL
+/*
+ * Each fine delay is between 44ps-77ps. Assume each fine delay is 60ps to
+ * simplify calculations. So 45degs could be anywhere between 33deg and 57.8deg.
+ */
+#define ROCKCHIP_MMC_DELAY_ELEMENT_PSEC 60
+
+int rk3588_mmc_get_phase(struct clk *clk)
+{
+	struct rk3588_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3588_cru *cru = priv->cru;
+	u32 raw_value, delay_num;
+	u16 degrees = 0;
+	ulong rate;
+
+	rate = rk3588_clk_get_rate(clk);
+	if (rate < 0)
+		return rate;
+
+	if (clk->id == SCLK_SDMMC_SAMPLE)
+		raw_value = readl(&cru->sdmmc_con[1]);
+	else
+		return 0;
+
+	raw_value >>= 1;
+	degrees = (raw_value & ROCKCHIP_MMC_DEGREE_MASK) * 90;
+
+	if (raw_value & ROCKCHIP_MMC_DELAY_SEL) {
+		/* degrees/delaynum * 10000 */
+		unsigned long factor = (ROCKCHIP_MMC_DELAY_ELEMENT_PSEC / 10) *
+					36 * (rate / 1000000);
+
+		delay_num = (raw_value & ROCKCHIP_MMC_DELAYNUM_MASK);
+		delay_num >>= ROCKCHIP_MMC_DELAYNUM_OFFSET;
+		degrees += DIV_ROUND_CLOSEST(delay_num * factor, 10000);
+	}
+
+	return degrees % 360;
+}
+
+int rk3588_mmc_set_phase(struct clk *clk, u32 degrees)
+{
+	struct rk3588_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3588_cru *cru = priv->cru;
+	u8 nineties, remainder, delay_num;
+	u32 raw_value, delay;
+	ulong rate;
+
+	rate = rk3588_clk_get_rate(clk);
+	if (rate < 0)
+		return rate;
+
+	nineties = degrees / 90;
+	remainder = (degrees % 90);
+
+	/*
+	 * Convert to delay; do a little extra work to make sure we
+	 * don't overflow 32-bit / 64-bit numbers.
+	 */
+	delay = 10000000; /* PSECS_PER_SEC / 10000 / 10 */
+	delay *= remainder;
+	delay = DIV_ROUND_CLOSEST(delay, (rate / 1000) * 36 *
+				  (ROCKCHIP_MMC_DELAY_ELEMENT_PSEC / 10));
+
+	delay_num = (u8)min_t(u32, delay, 255);
+
+	raw_value = delay_num ? ROCKCHIP_MMC_DELAY_SEL : 0;
+	raw_value |= delay_num << ROCKCHIP_MMC_DELAYNUM_OFFSET;
+	raw_value |= nineties;
+
+	raw_value <<= 1;
+	if (clk->id == SCLK_SDMMC_SAMPLE)
+		writel(raw_value | 0xffff0000, &cru->sdmmc_con[1]);
+
+	debug("mmc set_phase(%d) delay_nums=%u reg=%#x actual_degrees=%d\n",
+	      degrees, delay_num, raw_value, rk3588_mmc_get_phase(clk));
+
+	return 0;
+}
+
+static int rk3588_clk_get_phase(struct clk *clk)
+{
+	int ret;
+
+	debug("%s %ld\n", __func__, clk->id);
+	switch (clk->id) {
+	case SCLK_SDMMC_SAMPLE:
+		ret = rk3588_mmc_get_phase(clk);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+}
+
+static int rk3588_clk_set_phase(struct clk *clk, int degrees)
+{
+	int ret;
+
+	debug("%s %ld\n", __func__, clk->id);
+	switch (clk->id) {
+	case SCLK_SDMMC_SAMPLE:
+		ret = rk3588_mmc_set_phase(clk, degrees);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+}
+
+#if (IS_ENABLED(OF_CONTROL)) || (!IS_ENABLED(OF_PLATDATA))
+static int __maybe_unused rk3588_dclk_vop_set_parent(struct clk *clk,
+						     struct clk *parent)
+{
+	struct rk3588_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3588_cru *cru = priv->cru;
+	u32 sel;
+
+	if (parent->id == PLL_V0PLL)
+		sel = 2;
+	else if (parent->id == PLL_GPLL)
+		sel = 0;
+	else if (parent->id == PLL_CPLL)
+		sel = 1;
+	else
+		sel = 3;
+
+	switch (clk->id) {
+	case DCLK_VOP0_SRC:
+		rk_clrsetreg(&cru->clksel_con[111], DCLK0_VOP_SRC_SEL_MASK,
+			     sel << DCLK0_VOP_SRC_SEL_SHIFT);
+		break;
+	case DCLK_VOP1_SRC:
+		rk_clrsetreg(&cru->clksel_con[111], DCLK1_VOP_SRC_SEL_MASK,
+			     sel << DCLK1_VOP_SRC_SEL_SHIFT);
+		break;
+	case DCLK_VOP2_SRC:
+		rk_clrsetreg(&cru->clksel_con[112], DCLK2_VOP_SRC_SEL_MASK,
+			     sel << DCLK2_VOP_SRC_SEL_SHIFT);
+		break;
+	case DCLK_VOP3:
+		rk_clrsetreg(&cru->clksel_con[113], DCLK3_VOP_SRC_SEL_MASK,
+			     sel << DCLK3_VOP_SRC_SEL_SHIFT);
+		break;
+	default:
+		return -EINVAL;
+	}
+	return 0;
+}
+
+static int rk3588_clk_set_parent(struct clk *clk, struct clk *parent)
+{
+	switch (clk->id) {
+	case DCLK_VOP0_SRC:
+	case DCLK_VOP1_SRC:
+	case DCLK_VOP2_SRC:
+	case DCLK_VOP3:
+		return rk3588_dclk_vop_set_parent(clk, parent);
+	default:
+		return -ENOENT;
+	}
+
+	return 0;
+}
+#endif
+
+static struct clk_ops rk3588_clk_ops = {
+	.get_rate = rk3588_clk_get_rate,
+	.set_rate = rk3588_clk_set_rate,
+	.get_phase = rk3588_clk_get_phase,
+	.set_phase = rk3588_clk_set_phase,
+#if (IS_ENABLED(OF_CONTROL)) || (!IS_ENABLED(OF_PLATDATA))
+	.set_parent = rk3588_clk_set_parent,
+#endif
+};
+
+static void rk3588_clk_init(struct rk3588_clk_priv *priv)
+{
+	int ret, div;
+
+	priv->sync_kernel = false;
+	if (!priv->armclk_enter_hz) {
+		ret = rockchip_pll_set_rate(&rk3588_pll_clks[LPLL], priv->cru,
+					    LPLL, LPLL_HZ);
+		priv->armclk_enter_hz =
+			rockchip_pll_get_rate(&rk3588_pll_clks[LPLL],
+					      priv->cru, LPLL);
+		priv->armclk_init_hz = priv->armclk_enter_hz;
+		ret = rockchip_pll_set_rate(&rk3588_pll_clks[B0PLL], priv->cru,
+					    B0PLL, LPLL_HZ);
+		ret = rockchip_pll_set_rate(&rk3588_pll_clks[B1PLL], priv->cru,
+					    B1PLL, LPLL_HZ);
+	}
+
+	div = DIV_ROUND_UP(GPLL_HZ, 300 * MHz);
+	rk_clrsetreg(&priv->cru->clksel_con[38],
+		     ACLK_BUS_ROOT_SEL_MASK |
+		     ACLK_BUS_ROOT_DIV_MASK,
+		     div << ACLK_BUS_ROOT_DIV_SHIFT);
+
+	if (priv->cpll_hz != CPLL_HZ) {
+		ret = rockchip_pll_set_rate(&rk3588_pll_clks[CPLL], priv->cru,
+					    CPLL, CPLL_HZ);
+		if (!ret)
+			priv->cpll_hz = CPLL_HZ;
+	}
+	if (priv->gpll_hz != GPLL_HZ) {
+		ret = rockchip_pll_set_rate(&rk3588_pll_clks[GPLL], priv->cru,
+					    GPLL, GPLL_HZ);
+		if (!ret)
+			priv->gpll_hz = GPLL_HZ;
+	}
+
+	rk_clrsetreg(&priv->cru->clksel_con[9],
+		     ACLK_TOP_S400_SEL_MASK |
+		     ACLK_TOP_S200_SEL_MASK,
+		     (ACLK_TOP_S400_SEL_400M << ACLK_TOP_S400_SEL_SHIFT) |
+		     (ACLK_TOP_S200_SEL_200M << ACLK_TOP_S200_SEL_SHIFT));
+}
+
+static int rk3588_clk_probe(struct udevice *dev)
+{
+	struct rk3588_clk_priv *priv = dev_get_priv(dev);
+	int ret;
+
+	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	if (IS_ERR(priv->grf))
+		return PTR_ERR(priv->grf);
+
+	rk3588_clk_init(priv);
+
+	/* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
+	ret = clk_set_defaults(dev);
+	if (ret)
+		debug("%s clk_set_defaults failed %d\n", __func__, ret);
+	else
+		priv->sync_kernel = true;
+
+	return 0;
+}
+
+static int rk3588_clk_ofdata_to_platdata(struct udevice *dev)
+{
+	struct rk3588_clk_priv *priv = dev_get_priv(dev);
+
+	priv->cru = dev_read_addr_ptr(dev);
+
+	return 0;
+}
+
+static int rk3588_clk_bind(struct udevice *dev)
+{
+	int ret;
+	struct udevice *sys_child, *sf_child;
+	struct sysreset_reg *priv;
+	struct softreset_reg *sf_priv;
+
+	/* The reset driver does not have a device node, so bind it here */
+	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
+				 &sys_child);
+	if (ret) {
+		debug("Warning: No sysreset driver: ret=%d\n", ret);
+	} else {
+		priv = malloc(sizeof(struct sysreset_reg));
+		priv->glb_srst_fst_value = offsetof(struct rk3588_cru,
+						    glb_srst_fst);
+		priv->glb_srst_snd_value = offsetof(struct rk3588_cru,
+						    glb_srsr_snd);
+		sys_child->priv = priv;
+	}
+
+	ret = device_bind_driver_to_node(dev, "rockchip_reset", "reset",
+					 dev_ofnode(dev), &sf_child);
+	if (ret) {
+		debug("Warning: No rockchip reset driver: ret=%d\n", ret);
+	} else {
+		sf_priv = malloc(sizeof(struct softreset_reg));
+		sf_priv->sf_reset_offset = offsetof(struct rk3588_cru,
+						    softrst_con[0]);
+		sf_priv->sf_reset_num = 49158;
+		sf_child->priv = sf_priv;
+	}
+
+	return 0;
+}
+
+static const struct udevice_id rk3588_clk_ids[] = {
+	{ .compatible = "rockchip,rk3588-cru" },
+	{ }
+};
+
+U_BOOT_DRIVER(rockchip_rk3588_cru) = {
+	.name		= "rockchip_rk3588_cru",
+	.id		= UCLASS_CLK,
+	.of_match	= rk3588_clk_ids,
+	.priv_auto_alloc_size = sizeof(struct rk3588_clk_priv),
+	.ofdata_to_platdata = rk3588_clk_ofdata_to_platdata,
+	.ops		= &rk3588_clk_ops,
+	.bind		= rk3588_clk_bind,
+	.probe		= rk3588_clk_probe,
+};
+
+#ifndef CONFIG_SPL_BUILD
+/**
+ * soc_clk_dump() - Print clock frequencies
+ * Returns zero on success
+ *
+ * Implementation for the clk dump command.
+ */
+int soc_clk_dump(void)
+{
+	struct udevice *cru_dev;
+	struct rk3588_clk_priv *priv;
+	const struct rk3588_clk_info *clk_dump;
+	struct clk clk;
+	unsigned long clk_count = ARRAY_SIZE(clks_dump);
+	unsigned long rate;
+	int i, ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_CLK,
+					  DM_GET_DRIVER(rockchip_rk3588_cru),
+					  &cru_dev);
+	if (ret) {
+		printf("%s failed to get cru device\n", __func__);
+		return ret;
+	}
+
+	priv = dev_get_priv(cru_dev);
+	printf("CLK: (%s. arm: enter %lu KHz, init %lu KHz, kernel %lu%s)\n",
+	       priv->sync_kernel ? "sync kernel" : "uboot",
+	       priv->armclk_enter_hz / 1000,
+	       priv->armclk_init_hz / 1000,
+	       priv->set_armclk_rate ? priv->armclk_hz / 1000 : 0,
+	       priv->set_armclk_rate ? " KHz" : "N/A");
+	for (i = 0; i < clk_count; i++) {
+		clk_dump = &clks_dump[i];
+		if (clk_dump->name) {
+			clk.id = clk_dump->id;
+			if (clk_dump->is_cru)
+				ret = clk_request(cru_dev, &clk);
+			if (ret < 0)
+				return ret;
+
+			rate = clk_get_rate(&clk);
+			clk_free(&clk);
+			if (i == 0) {
+				if (rate < 0)
+					printf("  %s %s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("  %s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
+			} else {
+				if (rate < 0)
+					printf("  %s %s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("  %s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
+			}
+		}
+	}
+
+	return 0;
+}
+#endif

commit a962a5fdb4271e59bab38d4e9b59b4839b88656d
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Wed May 19 11:10:01 2021 +0800

    rockchip: clk: pll: add pll_rk3588 type for RK3588 Soc
    
    Change-Id: I8b38afb9f51847543da4df6305996dc5845d7876
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/clock.h b/arch/arm/include/asm/arch-rockchip/clock.h
index c141b813ad..0b2ae2a2e8 100644
--- a/arch/arm/include/asm/arch-rockchip/clock.h
+++ b/arch/arm/include/asm/arch-rockchip/clock.h
@@ -61,6 +61,15 @@ enum rk_clk_id {
 	.frac = _frac,						\
 }
 
+#define RK3588_PLL_RATE(_rate, _p, _m, _s, _k)			\
+{								\
+	.rate	= _rate##U,					\
+	.p = _p,						\
+	.m = _m,						\
+	.s = _s,						\
+	.k = _k,						\
+}
+
 struct rockchip_pll_rate_table {
 	unsigned long rate;
 	unsigned int nr;
@@ -74,6 +83,11 @@ struct rockchip_pll_rate_table {
 	unsigned int postdiv2;
 	unsigned int dsmpd;
 	unsigned int frac;
+	/* for RK3588 */
+	unsigned int m;
+	unsigned int p;
+	unsigned int s;
+	unsigned int k;
 };
 
 enum rockchip_pll_type {
@@ -82,6 +96,7 @@ enum rockchip_pll_type {
 	pll_rk3328,
 	pll_rk3366,
 	pll_rk3399,
+	pll_rk3588,
 };
 
 struct rockchip_pll_clock {
diff --git a/drivers/clk/rockchip/clk_pll.c b/drivers/clk/rockchip/clk_pll.c
index 6d309a801c..ffc6df8fdf 100644
--- a/drivers/clk/rockchip/clk_pll.c
+++ b/drivers/clk/rockchip/clk_pll.c
@@ -40,6 +40,10 @@ enum {
 	VCO_MIN_HZ	= 800 * 1000000,
 	OUTPUT_MAX_HZ	= 3200U * 1000000,
 	OUTPUT_MIN_HZ	= 24 * 1000000,
+	RK3588_VCO_MIN_HZ = 2250U * 1000000,
+	RK3588_VCO_MAX_HZ = 4500U * 1000000,
+	RK3588_FOUT_MIN_HZ = 37U * 1000000,
+	RK3588_FOUT_MAX_HZ = 4500U * 1000000,
 };
 
 #define MIN_FOUTVCO_FREQ	(800 * MHZ)
@@ -163,6 +167,66 @@ rockchip_pll_clk_set_by_auto(ulong fin_hz,
 	return rate_table;
 }
 
+static struct rockchip_pll_rate_table *
+rk3588_pll_clk_set_by_auto(unsigned long fin_hz,
+			   unsigned long fout_hz)
+{
+	struct rockchip_pll_rate_table *rate_table = &rockchip_auto_table;
+	u32 p, m, s;
+	ulong fvco, fref, fout, ffrac;
+
+	if (fin_hz == 0 || fout_hz == 0 || fout_hz == fin_hz)
+		return NULL;
+
+	if (fout_hz > RK3588_FOUT_MAX_HZ || fout_hz < RK3588_FOUT_MIN_HZ)
+		return NULL;
+
+	if (fin_hz / MHZ * MHZ == fin_hz && fout_hz / MHZ * MHZ == fout_hz) {
+		for (s = 0; s <= 6; s++) {
+			fvco = fout_hz << s;
+			if (fvco < RK3588_VCO_MIN_HZ ||
+			    fvco > RK3588_VCO_MAX_HZ)
+				continue;
+			for (p = 2; p <= 4; p++) {
+				for (m = 64; m <= 1023; m++) {
+					if (fvco == m * fin_hz / p) {
+						rate_table->p = p;
+						rate_table->m = m;
+						rate_table->s = s;
+						rate_table->k = 0;
+						return rate_table;
+					}
+				}
+			}
+		}
+		pr_err("CANNOT FIND Fout by auto,fout = %lu\n", fout_hz);
+	} else {
+		fout = (fout_hz / MHZ) * MHZ;
+		ffrac = (fout_hz % MHZ);
+		for (s = 0; s <= 6; s++) {
+			fvco = fout << s;
+			if (fvco < RK3588_VCO_MIN_HZ ||
+			    fvco > RK3588_VCO_MAX_HZ)
+				continue;
+			for (p = 1; p <= 4; p++) {
+				for (m = 64; m <= 1023; m++) {
+					if (fvco == m * fin_hz / p) {
+						rate_table->p = p;
+						rate_table->m = m;
+						rate_table->s = s;
+						fref = fin_hz / p;
+						fout = (ffrac << s) * 65535;
+						rate_table->k = fout / fref;
+						return rate_table;
+					}
+				}
+			}
+		}
+		pr_err("CANNOT FIND Fout by auto,fout = %lu\n", fout_hz);
+	}
+	return NULL;
+}
+
 static const struct rockchip_pll_rate_table *
 rockchip_get_pll_settings(struct rockchip_pll_clock *pll, ulong rate)
 {
@@ -173,10 +237,14 @@ rockchip_get_pll_settings(struct rockchip_pll_clock *pll, ulong rate)
 			break;
 		rate_table++;
 	}
-	if (rate_table->rate != rate)
-		return rockchip_pll_clk_set_by_auto(24 * MHZ, rate);
-	else
+	if (rate_table->rate != rate) {
+		if (pll->type == pll_rk3588)
+			return rk3588_pll_clk_set_by_auto(24 * MHZ, rate);
+		else
+			return rockchip_pll_clk_set_by_auto(24 * MHZ, rate);
+	} else {
 		return rate_table;
+	}
 }
 
 static int rk3036_pll_set_rate(struct rockchip_pll_clock *pll,
@@ -297,6 +365,155 @@ static ulong rk3036_pll_get_rate(struct rockchip_pll_clock *pll,
 	}
 }
 
+#define RK3588_PLLCON(i)		((i) * 0x4)
+#define RK3588_PLLCON0_M_MASK		0x3ff << 0
+#define RK3588_PLLCON0_M_SHIFT		0
+#define RK3588_PLLCON1_P_MASK		0x3f << 0
+#define RK3588_PLLCON1_P_SHIFT		0
+#define RK3588_PLLCON1_S_MASK		0x7 << 6
+#define RK3588_PLLCON1_S_SHIFT		6
+#define RK3588_PLLCON2_K_MASK		0xffff
+#define RK3588_PLLCON2_K_SHIFT		0
+#define RK3588_PLLCON1_PWRDOWN		BIT(13)
+#define RK3588_PLLCON6_LOCK_STATUS	BIT(15)
+#define RK3588_B0PLL_CLKSEL_CON(i)	((i) * 0x4 + 0x50000 + 0x300)
+#define RK3588_B1PLL_CLKSEL_CON(i)	((i) * 0x4 + 0x52000 + 0x300)
+#define RK3588_LPLL_CLKSEL_CON(i)	((i) * 0x4 + 0x58000 + 0x300)
+
+static int rk3588_pll_set_rate(struct rockchip_pll_clock *pll,
+			       void __iomem *base, ulong pll_id,
+			       ulong drate)
+{
+	const struct rockchip_pll_rate_table *rate;
+
+	rate = rockchip_get_pll_settings(pll, drate);
+	if (!rate) {
+		printf("%s unsupported rate\n", __func__);
+		return -EINVAL;
+	}
+
+	debug("%s: rate settings for %lu p: %d, m: %d, s: %d, k: %d\n",
+	      __func__, rate->rate, rate->p, rate->m, rate->s, rate->k);
+
+	/*
+	 * When power on or changing PLL setting,
+	 * we must force PLL into slow mode to ensure output stable clock.
+	 */
+	rk_clrsetreg(base + pll->mode_offset,
+		     pll->mode_mask << pll->mode_shift,
+		     RKCLK_PLL_MODE_SLOW << pll->mode_shift);
+	if (pll_id == 0)
+		rk_clrsetreg(base + RK3588_B0PLL_CLKSEL_CON(0),
+			     pll->mode_mask << 6,
+			     RKCLK_PLL_MODE_SLOW << 6);
+	else if (pll_id == 1)
+		rk_clrsetreg(base + RK3588_B1PLL_CLKSEL_CON(0),
+			     pll->mode_mask << 6,
+			     RKCLK_PLL_MODE_SLOW << 6);
+	else if (pll_id == 2)
+		rk_clrsetreg(base + RK3588_LPLL_CLKSEL_CON(5),
+			     pll->mode_mask << 14,
+			     RKCLK_PLL_MODE_SLOW << 14);
+
+	/* Power down */
+	rk_setreg(base + pll->con_offset + RK3588_PLLCON(1),
+		  RK3588_PLLCON1_PWRDOWN);
+
+	rk_clrsetreg(base + pll->con_offset,
+		     RK3588_PLLCON0_M_MASK,
+		     (rate->m << RK3588_PLLCON0_M_SHIFT));
+	rk_clrsetreg(base + pll->con_offset + RK3588_PLLCON(1),
+		     (RK3588_PLLCON1_P_MASK |
+		     RK3588_PLLCON1_S_MASK),
+		     (rate->p << RK3588_PLLCON1_P_SHIFT |
+		     rate->s << RK3588_PLLCON1_S_SHIFT));
+	if (!rate->k) {
+		rk_clrsetreg(base + pll->con_offset + RK3588_PLLCON(2),
+			     RK3588_PLLCON2_K_MASK,
+			     rate->k << RK3588_PLLCON2_K_SHIFT);
+	}
+	/* Power up */
+	rk_clrreg(base + pll->con_offset + RK3588_PLLCON(1),
+		  RK3588_PLLCON1_PWRDOWN);
+
+	/* waiting for pll lock */
+	while (!(readl(base + pll->con_offset + RK3588_PLLCON(6)) &
+		RK3588_PLLCON6_LOCK_STATUS)) {
+		udelay(1);
+		debug("%s: wait pll lock, pll_id=%ld\n", __func__, pll_id);
+	}
+
+	rk_clrsetreg(base + pll->mode_offset, pll->mode_mask << pll->mode_shift,
+		     RKCLK_PLL_MODE_NORMAL << pll->mode_shift);
+	if (pll_id == 0)
+		rk_clrsetreg(base + RK3588_B0PLL_CLKSEL_CON(0),
+			     pll->mode_mask << 6,
+			     2 << 6);
+	else if (pll_id == 1)
+		rk_clrsetreg(base + RK3588_B0PLL_CLKSEL_CON(0),
+			     pll->mode_mask << 6,
+			     2 << 6);
+	else if (pll_id == 2)
+		rk_clrsetreg(base + RK3588_LPLL_CLKSEL_CON(5),
+			     pll->mode_mask << 14,
+			     2 << 14);
+	debug("PLL at %p: con0=%x con1= %x con2= %x mode= %x\n",
+	      pll, readl(base + pll->con_offset),
+	      readl(base + pll->con_offset + 0x4),
+	      readl(base + pll->con_offset + 0x8),
+	      readl(base + pll->mode_offset));
+
+	return 0;
+}
+
+static ulong rk3588_pll_get_rate(struct rockchip_pll_clock *pll,
+				 void __iomem *base, ulong pll_id)
+{
+	u32 m, p, s, k;
+	u32 con = 0, shift, mode;
+	u64 rate, postdiv;
+
+	con = readl(base + pll->mode_offset);
+	shift = pll->mode_shift;
+	if (pll_id == 8)
+		mode = RKCLK_PLL_MODE_NORMAL;
+	else
+		mode = (con & (pll->mode_mask << shift)) >> shift;
+	switch (mode) {
+	case RKCLK_PLL_MODE_SLOW:
+		return OSC_HZ;
+	case RKCLK_PLL_MODE_NORMAL:
+		/* normal mode */
+		con = readl(base + pll->con_offset);
+		m = (con & RK3588_PLLCON0_M_MASK) >>
+			   RK3588_PLLCON0_M_SHIFT;
+		con = readl(base + pll->con_offset + RK3588_PLLCON(1));
+		p = (con & RK3588_PLLCON1_P_MASK) >>
+			   RK3036_PLLCON0_FBDIV_SHIFT;
+		s = (con & RK3588_PLLCON1_S_MASK) >>
+			 RK3588_PLLCON1_S_SHIFT;
+		con = readl(base + pll->con_offset + RK3588_PLLCON(2));
+		k = (con & RK3588_PLLCON2_K_MASK) >>
+			RK3588_PLLCON2_K_SHIFT;
+
+		rate = OSC_HZ / p;
+		rate *= m;
+		if (k) {
+			/* fractional mode */
+			u64 frac_rate64 = OSC_HZ * k;
+
+			postdiv = p * 65535;
+			do_div(frac_rate64, postdiv);
+			rate += frac_rate64;
+		}
+		rate = rate >> s;
+		return rate;
+	case RKCLK_PLL_MODE_DEEP:
+	default:
+		return 32768;
+	}
+}
+
 ulong rockchip_pll_get_rate(struct rockchip_pll_clock *pll,
 			    void __iomem *base,
 			    ulong pll_id)
@@ -312,6 +529,10 @@ ulong rockchip_pll_get_rate(struct rockchip_pll_clock *pll,
 		pll->mode_mask = PLL_RK3328_MODE_MASK;
 		rate = rk3036_pll_get_rate(pll, base, pll_id);
 		break;
+	case pll_rk3588:
+		pll->mode_mask = PLL_MODE_MASK;
+		rate = rk3588_pll_get_rate(pll, base, pll_id);
+		break;
 	default:
 		printf("%s: Unknown pll type for pll clk %ld\n",
 		       __func__, pll_id);
@@ -337,6 +558,10 @@ int rockchip_pll_set_rate(struct rockchip_pll_clock *pll,
 		pll->mode_mask = PLL_RK3328_MODE_MASK;
 		ret = rk3036_pll_set_rate(pll, base, pll_id, drate);
 		break;
+	case pll_rk3588:
+		pll->mode_mask = PLL_MODE_MASK;
+		ret = rk3588_pll_set_rate(pll, base, pll_id, drate);
+		break;
 	default:
 		printf("%s: Unknown pll type for pll clk %ld\n",
 		       __func__, pll_id);

commit b965fc5701e86089b2e6fc3370158f8172c2d663
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Wed May 19 11:11:56 2021 +0800

    dt-bindings: clock: rk3588: Add binding header for rk3588
    
    files origin from kernel.
    
    Change-Id: I5e9a9b556ee28c3f7d8365471d6e05a3f3c7e92c
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/include/dt-bindings/clock/rk3588-cru.h b/include/dt-bindings/clock/rk3588-cru.h
new file mode 100644
index 0000000000..b2522da9d2
--- /dev/null
+++ b/include/dt-bindings/clock/rk3588-cru.h
@@ -0,0 +1,1492 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2021 Rockchip Electronics Co. Ltd.
+ * Author: Elaine Zhang <zhangqing@rock-chips.com>
+ */
+
+#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3588_H
+#define _DT_BINDINGS_CLK_ROCKCHIP_RK3588_H
+
+/* cru-clocks indices */
+
+/* cru plls */
+#define PLL_B0PLL			1
+#define PLL_B1PLL			2
+#define PLL_LPLL			3
+#define PLL_V0PLL			4
+#define PLL_AUPLL			5
+#define PLL_CPLL			6
+#define PLL_GPLL			7
+#define PLL_NPLL			8
+#define PLL_PPLL			9
+#define ARMCLK_L			10
+#define ARMCLK_B01			11
+#define ARMCLK_B23			12
+
+/* cru clocks */
+#define PCLK_BIGCORE0_ROOT		20
+#define PCLK_BIGCORE0_PVTM		21
+#define PCLK_BIGCORE1_ROOT		22
+#define PCLK_BIGCORE1_PVTM		23
+#define PCLK_DSU_S_ROOT			24
+#define PCLK_DSU_ROOT			25
+#define PCLK_DSU_NS_ROOT		26
+#define PCLK_LITCORE_PVTM		27
+#define PCLK_DBG			28
+#define PCLK_DSU			29
+#define PCLK_S_DAPLITE			30
+#define PCLK_M_DAPLITE			31
+#define MBIST_MCLK_PDM1			32
+#define MBIST_CLK_ACDCDIG		33
+#define HCLK_I2S2_2CH			34
+#define HCLK_I2S3_2CH			35
+#define CLK_I2S2_2CH_SRC		36
+#define CLK_I2S2_2CH_FRAC		37
+#define CLK_I2S2_2CH			38
+#define MCLK_I2S2_2CH			39
+#define I2S2_2CH_MCLKOUT		40
+#define CLK_DAC_ACDCDIG			41
+#define CLK_I2S3_2CH_SRC		42
+#define CLK_I2S3_2CH_FRAC		43
+#define CLK_I2S3_2CH			44
+#define MCLK_I2S3_2CH			45
+#define I2S3_2CH_MCLKOUT		46
+#define PCLK_ACDCDIG			47
+#define HCLK_I2S0_8CH			48
+#define CLK_I2S0_8CH_TX_SRC		49
+#define CLK_I2S0_8CH_TX_FRAC		50
+#define MCLK_I2S0_8CH_TX		51
+#define CLK_I2S0_8CH_TX			52
+#define CLK_I2S0_8CH_RX_SRC		53
+#define CLK_I2S0_8CH_RX_FRAC		54
+#define MCLK_I2S0_8CH_RX		55
+#define CLK_I2S0_8CH_RX			56
+#define I2S0_8CH_MCLKOUT		57
+#define HCLK_PDM1			58
+#define MCLK_PDM1			59
+#define HCLK_AUDIO_ROOT			60
+#define PCLK_AUDIO_ROOT			61
+#define HCLK_SPDIF0			62
+#define CLK_SPDIF0_SRC			63
+#define CLK_SPDIF0_FRAC			64
+#define MCLK_SPDIF0			65
+#define CLK_SPDIF0			66
+#define CLK_SPDIF1			67
+#define HCLK_SPDIF1			68
+#define CLK_SPDIF1_SRC			69
+#define CLK_SPDIF1_FRAC			70
+#define MCLK_SPDIF1			71
+#define ACLK_AV1_ROOT			72
+#define ACLK_AV1			73
+#define PCLK_AV1_ROOT			74
+#define PCLK_AV1			75
+#define PCLK_MAILBOX0			76
+#define PCLK_MAILBOX1			77
+#define PCLK_MAILBOX2			78
+#define PCLK_PMU2			79
+#define PCLK_PMUCM0_INTMUX		80
+#define PCLK_DDRCM0_INTMUX		81
+#define PCLK_TOP			82
+#define PCLK_PWM1			83
+#define CLK_PWM1			84
+#define CLK_PWM1_CAPTURE		85
+#define PCLK_PWM2			86
+#define CLK_PWM2			87
+#define CLK_PWM2_CAPTURE		88
+#define PCLK_PWM3			89
+#define CLK_PWM3			90
+#define CLK_PWM3_CAPTURE		91
+#define PCLK_BUSTIMER0			92
+#define PCLK_BUSTIMER1			93
+#define CLK_BUS_TIMER_ROOT		94
+#define CLK_BUSTIMER0			95
+#define CLK_BUSTIMER1			96
+#define CLK_BUSTIMER2			97
+#define CLK_BUSTIMER3			98
+#define CLK_BUSTIMER4			99
+#define CLK_BUSTIMER5			100
+#define CLK_BUSTIMER6			101
+#define CLK_BUSTIMER7			102
+#define CLK_BUSTIMER8			103
+#define CLK_BUSTIMER9			104
+#define CLK_BUSTIMER10			105
+#define CLK_BUSTIMER11			106
+#define PCLK_WDT0			107
+#define TCLK_WDT0			108
+#define PCLK_CAN0			111
+#define CLK_CAN0			112
+#define PCLK_CAN1			113
+#define CLK_CAN1			114
+#define PCLK_CAN2			115
+#define CLK_CAN2			116
+#define ACLK_DECOM			117
+#define PCLK_DECOM			118
+#define DCLK_DECOM			119
+#define ACLK_DMAC0			120
+#define ACLK_DMAC1			121
+#define ACLK_DMAC2			122
+#define ACLK_BUS_ROOT			123
+#define ACLK_GIC			124
+#define PCLK_GPIO1			125
+#define DBCLK_GPIO1			126
+#define PCLK_GPIO2			127
+#define DBCLK_GPIO2			128
+#define PCLK_GPIO3			129
+#define DBCLK_GPIO3			130
+#define PCLK_GPIO4			131
+#define DBCLK_GPIO4			132
+#define PCLK_I2C1			133
+#define PCLK_I2C2			134
+#define PCLK_I2C3			135
+#define PCLK_I2C4			136
+#define PCLK_I2C5			137
+#define PCLK_I2C6			138
+#define PCLK_I2C7			139
+#define PCLK_I2C8			140
+#define CLK_I2C1			141
+#define CLK_I2C2			142
+#define CLK_I2C3			143
+#define CLK_I2C4			144
+#define CLK_I2C5			145
+#define CLK_I2C6			146
+#define CLK_I2C7			147
+#define CLK_I2C8			148
+#define PCLK_OTPC_NS			149
+#define CLK_OTPC_NS			150
+#define CLK_OTPC_ARB			151
+#define CLK_OTPC_AUTO_RD_G		152
+#define CLK_OTP_PHY_G			153
+#define PCLK_SARADC			156
+#define CLK_SARADC			157
+#define PCLK_SPI0			158
+#define PCLK_SPI1			159
+#define PCLK_SPI2			160
+#define PCLK_SPI3			161
+#define PCLK_SPI4			162
+#define CLK_SPI0			163
+#define CLK_SPI1			164
+#define CLK_SPI2			165
+#define CLK_SPI3			166
+#define CLK_SPI4			167
+#define ACLK_SPINLOCK			168
+#define PCLK_TSADC			169
+#define CLK_TSADC			170
+#define PCLK_UART1			171
+#define PCLK_UART2			172
+#define PCLK_UART3			173
+#define PCLK_UART4			174
+#define PCLK_UART5			175
+#define PCLK_UART6			176
+#define PCLK_UART7			177
+#define PCLK_UART8			178
+#define PCLK_UART9			179
+#define CLK_UART1_SRC			180
+#define CLK_UART1_FRAC			181
+#define CLK_UART1			182
+#define SCLK_UART1			183
+#define CLK_UART2_SRC			184
+#define CLK_UART2_FRAC			185
+#define CLK_UART2			186
+#define SCLK_UART2			187
+#define CLK_UART3_SRC			188
+#define CLK_UART3_FRAC			189
+#define CLK_UART3			190
+#define SCLK_UART3			191
+#define CLK_UART4_SRC			192
+#define CLK_UART4_FRAC			193
+#define CLK_UART4			194
+#define SCLK_UART4			195
+#define CLK_UART5_SRC			196
+#define CLK_UART5_FRAC			197
+#define CLK_UART5			198
+#define SCLK_UART5			199
+#define CLK_UART6_SRC			200
+#define CLK_UART6_FRAC			201
+#define CLK_UART6			202
+#define SCLK_UART6			203
+#define CLK_UART7_SRC			204
+#define CLK_UART7_FRAC			205
+#define CLK_UART7			206
+#define SCLK_UART7			207
+#define CLK_UART8_SRC			208
+#define CLK_UART8_FRAC			209
+#define CLK_UART8			210
+#define SCLK_UART8			211
+#define CLK_UART9_SRC			212
+#define CLK_UART9_FRAC			213
+#define CLK_UART9			214
+#define SCLK_UART9			215
+#define ACLK_CENTER_ROOT		216
+#define ACLK_CENTER_LOW_ROOT		217
+#define HCLK_CENTER_ROOT		218
+#define PCLK_CENTER_ROOT		219
+#define ACLK_DMA2DDR			220
+#define ACLK_DDR_SHAREMEM		221
+#define ACLK_CENTER_S200_ROOT		222
+#define ACLK_CENTER_S400_ROOT		223
+#define FCLK_DDR_CM0_CORE		224
+#define CLK_DDR_TIMER_ROOT		225
+#define CLK_DDR_TIMER0			226
+#define CLK_DDR_TIMER1			227
+#define TCLK_WDT_DDR			228
+#define CLK_DDR_CM0_RTC			228
+#define PCLK_WDT			230
+#define PCLK_TIMER			231
+#define PCLK_DMA2DDR			232
+#define PCLK_SHAREMEM			233
+#define CLK_50M_SRC			234
+#define CLK_100M_SRC			235
+#define CLK_150M_SRC			236
+#define CLK_200M_SRC			237
+#define CLK_250M_SRC			238
+#define CLK_300M_SRC			239
+#define CLK_350M_SRC			240
+#define CLK_400M_SRC			241
+#define CLK_450M_SRC			242
+#define CLK_500M_SRC			243
+#define CLK_600M_SRC			244
+#define CLK_650M_SRC			245
+#define CLK_700M_SRC			246
+#define CLK_800M_SRC			247
+#define CLK_1000M_SRC			248
+#define CLK_1200M_SRC			249
+#define ACLK_TOP_M300_ROOT		250
+#define ACLK_TOP_M500_ROOT		251
+#define ACLK_TOP_M400_ROOT		252
+#define ACLK_TOP_S200_ROOT		253
+#define ACLK_TOP_S400_ROOT		254
+#define CLK_MIPI_CAMARAOUT_M0		255
+#define CLK_MIPI_CAMARAOUT_M1		256
+#define CLK_MIPI_CAMARAOUT_M2		257
+#define CLK_MIPI_CAMARAOUT_M3		258
+#define CLK_MIPI_CAMARAOUT_M4		259
+#define MCLK_GMAC0_OUT			260
+#define REFCLKO25M_ETH0_OUT		261
+#define REFCLKO25M_ETH1_OUT		262
+#define CLK_CIFOUT_OUT			263
+#define PCLK_MIPI_DCPHY0		264
+#define PCLK_MIPI_DCPHY1		265
+#define PCLK_CSIPHY0			268
+#define PCLK_CSIPHY1			269
+#define ACLK_TOP_ROOT			270
+#define PCLK_TOP_ROOT			271
+#define ACLK_LOW_TOP_ROOT		272
+#define PCLK_CRU			273
+#define PCLK_GPU_ROOT			274
+#define CLK_GPU_SRC			275
+#define CLK_GPU				276
+#define CLK_GPU_COREGROUP		277
+#define CLK_GPU_STACKS			278
+#define PCLK_GPU_PVTM			279
+#define CLK_GPU_PVTM			280
+#define CLK_CORE_GPU_PVTM		281
+#define PCLK_GPU_GRF			282
+#define ACLK_ISP1_ROOT			283
+#define HCLK_ISP1_ROOT			284
+#define CLK_ISP1_CORE			285
+#define CLK_ISP1_CORE_MARVIN		286
+#define CLK_ISP1_CORE_VICAP		287
+#define ACLK_ISP1			288
+#define HCLK_ISP1			289
+#define ACLK_NPU1			290
+#define HCLK_NPU1			291
+#define ACLK_NPU2			292
+#define HCLK_NPU2			293
+#define HCLK_NPU_CM0_ROOT		294
+#define FCLK_NPU_CM0_CORE		295
+#define CLK_NPU_CM0_RTC			296
+#define PCLK_NPU_PVTM			297
+#define PCLK_NPU_GRF			298
+#define CLK_NPU_PVTM			299
+#define CLK_CORE_NPU_PVTM		300
+#define ACLK_NPU0			301
+#define HCLK_NPU0			302
+#define HCLK_NPU_ROOT			303
+#define CLK_NPU_DSU0			304
+#define PCLK_NPU_ROOT			305
+#define PCLK_NPU_TIMER			306
+#define CLK_NPUTIMER_ROOT		307
+#define CLK_NPUTIMER0			308
+#define CLK_NPUTIMER1			309
+#define PCLK_NPU_WDT			310
+#define TCLK_NPU_WDT			311
+#define HCLK_EMMC			312
+#define ACLK_EMMC			313
+#define CCLK_EMMC			314
+#define BCLK_EMMC			315
+#define TMCLK_EMMC			316
+#define SCLK_SFC			317
+#define HCLK_SFC			318
+#define HCLK_SFC_XIP			319
+#define HCLK_NVM_ROOT			320
+#define ACLK_NVM_ROOT			321
+#define CLK_GMAC0_PTP_REF		322
+#define CLK_GMAC1_PTP_REF		323
+#define CLK_GMAC_125M			324
+#define CLK_GMAC_50M			325
+#define ACLK_PHP_GIC_ITS		326
+#define ACLK_MMU_PCIE			327
+#define ACLK_MMU_PHP			328
+#define ACLK_PCIE_4L_DBI		329
+#define ACLK_PCIE_2L_DBI		330
+#define ACLK_PCIE_1L0_DBI		331
+#define ACLK_PCIE_1L1_DBI		332
+#define ACLK_PCIE_1L2_DBI		333
+#define ACLK_PCIE_4L_MSTR		334
+#define ACLK_PCIE_2L_MSTR		335
+#define ACLK_PCIE_1L0_MSTR		336
+#define ACLK_PCIE_1L1_MSTR		337
+#define ACLK_PCIE_1L2_MSTR		338
+#define ACLK_PCIE_4L_SLV		339
+#define ACLK_PCIE_2L_SLV		340
+#define ACLK_PCIE_1L0_SLV		341
+#define ACLK_PCIE_1L1_SLV		342
+#define ACLK_PCIE_1L2_SLV		343
+#define PCLK_PCIE_4L			344
+#define PCLK_PCIE_2L			345
+#define PCLK_PCIE_1L0			347
+#define PCLK_PCIE_1L1			348
+#define PCLK_PCIE_1L2			349
+#define CLK_PCIE_AUX0			350
+#define CLK_PCIE_AUX1			351
+#define CLK_PCIE_AUX2			352
+#define CLK_PCIE_AUX3			353
+#define CLK_PCIE_AUX4			354
+#define CLK_PIPEPHY0_REF		355
+#define CLK_PIPEPHY1_REF		356
+#define CLK_PIPEPHY2_REF		357
+#define PCLK_PHP_ROOT			358
+#define PCLK_GMAC0			359
+#define PCLK_GMAC1			360
+#define ACLK_PCIE_ROOT			361
+#define ACLK_PHP_ROOT			362
+#define ACLK_PCIE_BRIDGE		363
+#define ACLK_GMAC0			364
+#define ACLK_GMAC1			365
+#define CLK_PMALIVE0			366
+#define CLK_PMALIVE1			367
+#define CLK_PMALIVE2			368
+#define ACLK_SATA0			369
+#define ACLK_SATA1			370
+#define ACLK_SATA2			371
+#define CLK_RXOOB0			372
+#define CLK_RXOOB1			373
+#define CLK_RXOOB2			374
+#define ACLK_USB3OTG2			375
+#define SUSPEND_CLK_USB3OTG2		376
+#define REF_CLK_USB3OTG2		377
+#define CLK_UTMI_OTG2			378
+#define CLK_PIPEPHY0_PIPE_G		379
+#define CLK_PIPEPHY1_PIPE_G		380
+#define CLK_PIPEPHY2_PIPE_G		381
+#define CLK_PIPEPHY0_PIPE_ASIC_G	382
+#define CLK_PIPEPHY1_PIPE_ASIC_G	383
+#define CLK_PIPEPHY2_PIPE_ASIC_G	384
+#define CLK_PIPEPHY2_PIPE_U3_G		385
+#define CLK_PCIE1L2_PIPE		386
+#define CLK_PCIE4L_PIPE			387
+#define CLK_PCIE2L_PIPE			388
+#define PCLK_PCIE_COMBO_PIPE_PHY0	389
+#define PCLK_PCIE_COMBO_PIPE_PHY1	390
+#define PCLK_PCIE_COMBO_PIPE_PHY2	391
+#define PCLK_PCIE_COMBO_PIPE_PHY	392
+#define HCLK_RGA3_1			393
+#define ACLK_RGA3_1			394
+#define CLK_RGA3_1_CORE			395
+#define ACLK_RGA3_ROOT			396
+#define HCLK_RGA3_ROOT			397
+#define ACLK_RKVDEC_CCU			398
+#define HCLK_RKVDEC0			399
+#define ACLK_RKVDEC0			400
+#define CLK_RKVDEC0_CA			401
+#define CLK_RKVDEC0_HEVC_CA		402
+#define CLK_RKVDEC0_CORE		403
+#define HCLK_RKVDEC1			404
+#define ACLK_RKVDEC1			405
+#define CLK_RKVDEC1_CA			406
+#define CLK_RKVDEC1_HEVC_CA		407
+#define CLK_RKVDEC1_CORE		408
+#define HCLK_SDIO			409
+#define CCLK_SRC_SDIO			410
+#define ACLK_USB_ROOT			411
+#define HCLK_USB_ROOT			412
+#define HCLK_HOST0			413
+#define HCLK_HOST_ARB0			414
+#define HCLK_HOST1			415
+#define HCLK_HOST_ARB1			416
+#define ACLK_USB3OTG0			417
+#define SUSPEND_CLK_USB3OTG0		418
+#define REF_CLK_USB3OTG0		419
+#define ACLK_USB3OTG1			420
+#define SUSPEND_CLK_USB3OTG1		421
+#define REF_CLK_USB3OTG1		422
+#define UTMI_OHCI_CLK48_HOST0		423
+#define UTMI_OHCI_CLK48_HOST1		424
+#define HCLK_IEP2P0			425
+#define ACLK_IEP2P0			426
+#define CLK_IEP2P0_CORE			427
+#define ACLK_JPEG_ENCODER0		428
+#define HCLK_JPEG_ENCODER0		429
+#define ACLK_JPEG_ENCODER1		430
+#define HCLK_JPEG_ENCODER1		431
+#define ACLK_JPEG_ENCODER2		432
+#define HCLK_JPEG_ENCODER2		433
+#define ACLK_JPEG_ENCODER3		434
+#define HCLK_JPEG_ENCODER3		435
+#define ACLK_JPEG_DECODER		436
+#define HCLK_JPEG_DECODER		437
+#define HCLK_RGA2			438
+#define ACLK_RGA2			439
+#define CLK_RGA2_CORE			440
+#define HCLK_RGA3_0			441
+#define ACLK_RGA3_0			442
+#define CLK_RGA3_0_CORE			443
+#define ACLK_VDPU_ROOT			444
+#define ACLK_VDPU_LOW_ROOT		445
+#define HCLK_VDPU_ROOT			446
+#define ACLK_JPEG_DECODER_ROOT		447
+#define ACLK_VPU			448
+#define HCLK_VPU			449
+#define HCLK_RKVENC0_ROOT		450
+#define ACLK_RKVENC0_ROOT		451
+#define HCLK_RKVENC0			452
+#define ACLK_RKVENC0			453
+#define CLK_RKVENC0_CORE		454
+#define HCLK_RKVENC1_ROOT		455
+#define ACLK_RKVENC1_ROOT		456
+#define HCLK_RKVENC1			457
+#define ACLK_RKVENC1			458
+#define CLK_RKVENC1_CORE		459
+#define ICLK_CSIHOST01			460
+#define ICLK_CSIHOST0			461
+#define ICLK_CSIHOST1			462
+#define PCLK_CSI_HOST_0			463
+#define PCLK_CSI_HOST_1			464
+#define PCLK_CSI_HOST_2			465
+#define PCLK_CSI_HOST_3			466
+#define PCLK_CSI_HOST_4			467
+#define PCLK_CSI_HOST_5			468
+#define ACLK_FISHEYE0			469
+#define HCLK_FISHEYE0			470
+#define CLK_FISHEYE0_CORE		471
+#define ACLK_FISHEYE1			472
+#define HCLK_FISHEYE1			473
+#define CLK_FISHEYE1_CORE		474
+#define CLK_ISP0_CORE			475
+#define CLK_ISP0_CORE_MARVIN		476
+#define CLK_ISP0_CORE_VICAP		477
+#define ACLK_ISP0			478
+#define HCLK_ISP0			479
+#define ACLK_VI_ROOT			480
+#define HCLK_VI_ROOT			481
+#define PCLK_VI_ROOT			482
+#define DCLK_VICAP			483
+#define ACLK_VICAP			484
+#define HCLK_VICAP			485
+#define PCLK_DP0			486
+#define PCLK_DP1			487
+#define PCLK_S_DP0			488
+#define PCLK_S_DP1			489
+#define CLK_DP0				490
+#define CLK_DP1				491
+#define HCLK_HDCP_KEY0			492
+#define ACLK_HDCP0			493
+#define HCLK_HDCP0			494
+#define PCLK_HDCP0			495
+#define HCLK_I2S4_8CH			496
+#define ACLK_TRNG0			497
+#define PCLK_TRNG0			498
+#define ACLK_VO0_ROOT			499
+#define HCLK_VO0_ROOT			500
+#define HCLK_VO0_S_ROOT			501
+#define PCLK_VO0_ROOT			502
+#define PCLK_VO0_S_ROOT			503
+#define PCLK_VO0GRF			504
+#define CLK_I2S4_8CH_TX_SRC		505
+#define CLK_I2S4_8CH_TX_FRAC		506
+#define MCLK_I2S4_8CH_TX		507
+#define CLK_I2S4_8CH_TX			508
+#define HCLK_I2S8_8CH			510
+#define CLK_I2S8_8CH_TX_SRC		511
+#define CLK_I2S8_8CH_TX_FRAC		512
+#define MCLK_I2S8_8CH_TX		513
+#define CLK_I2S8_8CH_TX			514
+#define HCLK_SPDIF2_DP0			516
+#define CLK_SPDIF2_DP0_SRC		517
+#define CLK_SPDIF2_DP0_FRAC		518
+#define MCLK_SPDIF2_DP0			519
+#define CLK_SPDIF2_DP0			520
+#define MCLK_SPDIF2			521
+#define HCLK_SPDIF5_DP1			522
+#define CLK_SPDIF5_DP1_SRC		523
+#define CLK_SPDIF5_DP1_FRAC		524
+#define MCLK_SPDIF5_DP1			525
+#define CLK_SPDIF5_DP1			526
+#define MCLK_SPDIF5			527
+#define PCLK_EDP0			528
+#define CLK_EDP0_24M			529
+#define CLK_EDP0_200M			530
+#define PCLK_EDP1			531
+#define CLK_EDP1_24M			532
+#define CLK_EDP1_200M			533
+#define HCLK_HDCP_KEY1			534
+#define ACLK_HDCP1			535
+#define HCLK_HDCP1			536
+#define PCLK_HDCP1			537
+#define ACLK_HDMIRX			538
+#define PCLK_HDMIRX			539
+#define CLK_HDMIRX_REF			540
+#define CLK_HDMIRX_AUD_SRC		541
+#define CLK_HDMIRX_AUD_FRAC		542
+#define CLK_HDMIRX_AUD			543
+#define CLK_HDMIRX_AUD_P_MUX		544
+#define PCLK_HDMITX0			545
+#define CLK_HDMITX0_EARC		546
+#define CLK_HDMITX0_REF			547
+#define PCLK_HDMITX1			548
+#define CLK_HDMITX1_EARC		549
+#define CLK_HDMITX1_REF			550
+#define CLK_HDMITRX_REFSRC		551
+#define ACLK_TRNG1			552
+#define PCLK_TRNG1			553
+#define ACLK_HDCP1_ROOT			554
+#define ACLK_HDMIRX_ROOT		555
+#define HCLK_VO1_ROOT			556
+#define HCLK_VO1_S_ROOT			557
+#define PCLK_VO1_ROOT			558
+#define PCLK_VO1_S_ROOT			559
+#define PCLK_S_EDP0			560
+#define PCLK_S_EDP1			561
+#define PCLK_S_HDMIRX			562
+#define HCLK_I2S10_8CH			563
+#define CLK_I2S10_8CH_RX_SRC		564
+#define CLK_I2S10_8CH_RX_FRAC		565
+#define CLK_I2S10_8CH_RX		566
+#define MCLK_I2S10_8CH_RX		567
+#define HCLK_I2S7_8CH			568
+#define CLK_I2S7_8CH_RX_SRC		569
+#define CLK_I2S7_8CH_RX_FRAC		570
+#define CLK_I2S7_8CH_RX			571
+#define MCLK_I2S7_8CH_RX		572
+#define HCLK_I2S9_8CH			574
+#define CLK_I2S9_8CH_RX_SRC		575
+#define CLK_I2S9_8CH_RX_FRAC		576
+#define CLK_I2S9_8CH_RX			577
+#define MCLK_I2S9_8CH_RX		578
+#define CLK_I2S5_8CH_TX_SRC		579
+#define CLK_I2S5_8CH_TX_FRAC		580
+#define CLK_I2S5_8CH_TX			581
+#define MCLK_I2S5_8CH_TX		582
+#define HCLK_I2S5_8CH			584
+#define CLK_I2S6_8CH_TX_SRC		585
+#define CLK_I2S6_8CH_TX_FRAC		586
+#define CLK_I2S6_8CH_TX			587
+#define MCLK_I2S6_8CH_TX		588
+#define CLK_I2S6_8CH_RX_SRC		589
+#define CLK_I2S6_8CH_RX_FRAC		590
+#define CLK_I2S6_8CH_RX			591
+#define MCLK_I2S6_8CH_RX		592
+#define I2S6_8CH_MCLKOUT		593
+#define HCLK_I2S6_8CH			594
+#define HCLK_SPDIF3			595
+#define CLK_SPDIF3_SRC			596
+#define CLK_SPDIF3_FRAC			597
+#define CLK_SPDIF3			598
+#define MCLK_SPDIF3			599
+#define HCLK_SPDIF4			600
+#define CLK_SPDIF4_SRC			601
+#define CLK_SPDIF4_FRAC			602
+#define CLK_SPDIF4			603
+#define MCLK_SPDIF4			604
+#define HCLK_SPDIFRX0			605
+#define MCLK_SPDIFRX0			606
+#define HCLK_SPDIFRX1			607
+#define MCLK_SPDIFRX1			608
+#define HCLK_SPDIFRX2			609
+#define MCLK_SPDIFRX2			610
+#define ACLK_VO1USB_TOP_ROOT		611
+#define HCLK_VO1USB_TOP_ROOT		612
+#define CLK_HDMIHDP0			613
+#define CLK_HDMIHDP1			614
+#define PCLK_HDPTX0			615
+#define PCLK_HDPTX1			616
+#define PCLK_USBDPPHY0			617
+#define PCLK_USBDPPHY1			618
+#define ACLK_VOP_ROOT			619
+#define ACLK_VOP_LOW_ROOT		620
+#define HCLK_VOP_ROOT			621
+#define PCLK_VOP_ROOT			622
+#define HCLK_VOP			623
+#define ACLK_VOP			624
+#define DCLK_VOP0_SRC			625
+#define DCLK_VOP1_SRC			626
+#define DCLK_VOP2_SRC			627
+#define DCLK_VOP0			628
+#define DCLK_VOP1			629
+#define DCLK_VOP2			630
+#define DCLK_VOP3			631
+#define PCLK_DSIHOST0			632
+#define PCLK_DSIHOST1			633
+#define CLK_DSIHOST0			634
+#define CLK_DSIHOST1			635
+#define CLK_VOP_PMU			636
+#define ACLK_VOP_DOBY			637
+#define ACLK_VOP_SUB_SRC		638
+#define CLK_USBDP_PHY0_IMMORTAL		639
+#define CLK_USBDP_PHY1_IMMORTAL		640
+#define CLK_PMU0			641
+#define PCLK_PMU0			642
+#define PCLK_PMU0IOC			643
+#define PCLK_GPIO0			644
+#define DBCLK_GPIO0			645
+#define PCLK_I2C0			646
+#define CLK_I2C0			647
+#define HCLK_I2S1_8CH			648
+#define CLK_I2S1_8CH_TX_SRC		649
+#define CLK_I2S1_8CH_TX_FRAC		650
+#define CLK_I2S1_8CH_TX			651
+#define MCLK_I2S1_8CH_TX		652
+#define CLK_I2S1_8CH_RX_SRC		653
+#define CLK_I2S1_8CH_RX_FRAC		654
+#define CLK_I2S1_8CH_RX			655
+#define MCLK_I2S1_8CH_RX		656
+#define I2S1_8CH_MCLKOUT		657
+#define CLK_PMU1_50M_SRC		658
+#define CLK_PMU1_100M_SRC		659
+#define CLK_PMU1_200M_SRC		660
+#define CLK_PMU1_300M_SRC		661
+#define CLK_PMU1_400M_SRC		662
+#define HCLK_PMU1_ROOT			663
+#define PCLK_PMU1_ROOT			664
+#define PCLK_PMU0_ROOT			665
+#define HCLK_PMU_CM0_ROOT		666
+#define PCLK_PMU1			667
+#define CLK_DDR_FAIL_SAFE		668
+#define CLK_PMU1			669
+#define HCLK_PDM0			670
+#define MCLK_PDM0			671
+#define HCLK_VAD			672
+#define FCLK_PMU_CM0_CORE		673
+#define CLK_PMU_CM0_RTC			674
+#define PCLK_PMU1_IOC			675
+#define PCLK_PMU1PWM			676
+#define CLK_PMU1PWM			677
+#define CLK_PMU1PWM_CAPTURE		678
+#define PCLK_PMU1TIMER			679
+#define CLK_PMU1TIMER_ROOT		680
+#define CLK_PMU1TIMER0			681
+#define CLK_PMU1TIMER1			682
+#define CLK_UART0_SRC			683
+#define CLK_UART0_FRAC			684
+#define CLK_UART0			685
+#define SCLK_UART0			686
+#define PCLK_UART0			687
+#define PCLK_PMU1WDT			688
+#define TCLK_PMU1WDT			689
+#define CLK_CR_PARA			690
+#define CLK_GMAC0			691
+#define CLK_GMAC1			692
+#define CLK_USB2PHY_HDPTXRXPHY_REF	693
+#define CLK_USBDPPHY_MIPIDCPPHY_REF	694
+#define CLK_REF_PIPE_PHY0_OSC_SRC	695
+#define CLK_REF_PIPE_PHY1_OSC_SRC	696
+#define CLK_REF_PIPE_PHY2_OSC_SRC	697
+#define CLK_REF_PIPE_PHY0_PLL_SRC	698
+#define CLK_REF_PIPE_PHY1_PLL_SRC	699
+#define CLK_REF_PIPE_PHY2_PLL_SRC	700
+#define CLK_REF_PIPE_PHY0		701
+#define CLK_REF_PIPE_PHY1		702
+#define CLK_REF_PIPE_PHY2		703
+#define SCLK_SDIO_DRV			704
+#define SCLK_SDIO_SAMPLE		705
+#define SCLK_SDMMC_DRV			706
+#define SCLK_SDMMC_SAMPLE		707
+#define CLK_PCIE1L0_PIPE		708
+#define CLK_PCIE1L1_PIPE		709
+#define CLK_BIGCORE0_PVTM		710
+#define CLK_CORE_BIGCORE0_PVTM		711
+#define CLK_BIGCORE1_PVTM		712
+#define CLK_CORE_BIGCORE1_PVTM		713
+#define CLK_LITCORE_PVTM		714
+#define CLK_CORE_LITCORE_PVTM		715
+
+#define CLK_NR_CLKS			(CLK_CORE_LITCORE_PVTM + 1)
+
+/********Name=SOFTRST_CON01,Offset=0xA04********/
+#define SRST_A_TOP_BIU			19
+#define SRST_P_TOP_BIU			20
+#define SRST_P_CSIPHY0			22
+#define SRST_CSIPHY0			23
+#define SRST_P_CSIPHY1			24
+#define SRST_CSIPHY1			25
+#define SRST_A_TOP_M500_BIU		31
+/********Name=SOFTRST_CON02,Offset=0xA08********/
+#define SRST_A_TOP_M400_BIU		32
+#define SRST_A_TOP_S200_BIU		33
+#define SRST_A_TOP_S400_BIU		34
+#define SRST_A_TOP_M300_BIU		35
+#define SRST_USBDP_COMBO_PHY0_INIT	40
+#define SRST_USBDP_COMBO_PHY0_CMN	41
+#define SRST_USBDP_COMBO_PHY0_LANE	42
+#define SRST_USBDP_COMBO_PHY0_PCS	43
+#define SRST_USBDP_COMBO_PHY1_INIT	47
+/********Name=SOFTRST_CON03,Offset=0xA0C********/
+#define SRST_USBDP_COMBO_PHY1_CMN	48
+#define SRST_USBDP_COMBO_PHY1_LANE	49
+#define SRST_USBDP_COMBO_PHY1_PCS	50
+#define SRST_DCPHY0			59
+#define SRST_P_MIPI_DCPHY0		62
+#define SRST_P_MIPI_DCPHY0_GRF		63
+/********Name=SOFTRST_CON04,Offset=0xA10********/
+#define SRST_DCPHY1			64
+#define SRST_P_MIPI_DCPHY1		67
+#define SRST_P_MIPI_DCPHY1_GRF		68
+#define SRST_P_APB2ASB_SLV_CDPHY	69
+#define SRST_P_APB2ASB_SLV_CSIPHY	70
+#define SRST_P_APB2ASB_SLV_VCCIO3_5	71
+#define SRST_P_APB2ASB_SLV_VCCIO6	72
+#define SRST_P_APB2ASB_SLV_EMMCIO	73
+#define SRST_P_APB2ASB_SLV_IOC_TOP	74
+#define SRST_P_APB2ASB_SLV_IOC_RIGHT	75
+/********Name=SOFTRST_CON05,Offset=0xA14********/
+#define SRST_P_CRU			80
+#define SRST_A_CHANNEL_SECURE2VO1USB	87
+#define SRST_A_CHANNEL_SECURE2CENTER	88
+#define SRST_H_CHANNEL_SECURE2VO1USB	94
+#define SRST_H_CHANNEL_SECURE2CENTER	95
+/********Name=SOFTRST_CON06,Offset=0xA18********/
+#define SRST_P_CHANNEL_SECURE2VO1USB	96
+#define SRST_P_CHANNEL_SECURE2CENTER	97
+/********Name=SOFTRST_CON07,Offset=0xA1C********/
+#define SRST_H_AUDIO_BIU		114
+#define SRST_P_AUDIO_BIU		115
+#define SRST_H_I2S0_8CH			116
+#define SRST_M_I2S0_8CH_TX		119
+#define SRST_M_I2S0_8CH_RX		122
+#define SRST_P_ACDCDIG			123
+#define SRST_H_I2S2_2CH			124
+#define SRST_H_I2S3_2CH			125
+/********Name=SOFTRST_CON08,Offset=0xA20********/
+#define SRST_M_I2S2_2CH			128
+#define SRST_M_I2S3_2CH			131
+#define SRST_DAC_ACDCDIG		132
+#define SRST_H_SPDIF0			142
+/********Name=SOFTRST_CON09,Offset=0xA24********/
+#define SRST_M_SPDIF0			145
+#define SRST_H_SPDIF1			146
+#define SRST_M_SPDIF1			149
+#define SRST_H_PDM1			150
+#define SRST_PDM1			151
+/********Name=SOFTRST_CON10,Offset=0xA28********/
+#define SRST_A_BUS_BIU			161
+#define SRST_P_BUS_BIU			162
+#define SRST_A_GIC			163
+#define SRST_A_GIC_DBG			164
+#define SRST_A_DMAC0			165
+#define SRST_A_DMAC1			166
+#define SRST_A_DMAC2			167
+#define SRST_P_I2C1			168
+#define SRST_P_I2C2			169
+#define SRST_P_I2C3			170
+#define SRST_P_I2C4			171
+#define SRST_P_I2C5			172
+#define SRST_P_I2C6			173
+#define SRST_P_I2C7			174
+#define SRST_P_I2C8			175
+/********Name=SOFTRST_CON11,Offset=0xA2C********/
+#define SRST_I2C1			176
+#define SRST_I2C2			177
+#define SRST_I2C3			178
+#define SRST_I2C4			179
+#define SRST_I2C5			180
+#define SRST_I2C6			181
+#define SRST_I2C7			182
+#define SRST_I2C8			183
+#define SRST_P_CAN0			184
+#define SRST_CAN0			185
+#define SRST_P_CAN1			186
+#define SRST_CAN1			187
+#define SRST_P_CAN2			188
+#define SRST_CAN2			189
+#define SRST_P_SARADC			190
+/********Name=SOFTRST_CON12,Offset=0xA30********/
+#define SRST_P_TSADC			192
+#define SRST_TSADC			193
+#define SRST_P_UART1			194
+#define SRST_P_UART2			195
+#define SRST_P_UART3			196
+#define SRST_P_UART4			197
+#define SRST_P_UART5			198
+#define SRST_P_UART6			199
+#define SRST_P_UART7			200
+#define SRST_P_UART8			201
+#define SRST_P_UART9			202
+#define SRST_S_UART1			205
+/********Name=SOFTRST_CON13,Offset=0xA34********/
+#define SRST_S_UART2			208
+#define SRST_S_UART3			211
+#define SRST_S_UART4			214
+#define SRST_S_UART5			217
+#define SRST_S_UART6			220
+#define SRST_S_UART7			223
+/********Name=SOFTRST_CON14,Offset=0xA38********/
+#define SRST_S_UART8			226
+#define SRST_S_UART9			229
+#define SRST_P_SPI0			230
+#define SRST_P_SPI1			231
+#define SRST_P_SPI2			232
+#define SRST_P_SPI3			233
+#define SRST_P_SPI4			234
+#define SRST_SPI0			235
+#define SRST_SPI1			236
+#define SRST_SPI2			237
+#define SRST_SPI3			238
+#define SRST_SPI4			239
+/********Name=SOFTRST_CON15,Offset=0xA3C********/
+#define SRST_P_WDT0			240
+#define SRST_T_WDT0			241
+#define SRST_P_SYS_GRF			242
+#define SRST_P_PWM1			243
+#define SRST_PWM1			244
+#define SRST_P_PWM2			246
+#define SRST_PWM2			247
+#define SRST_P_PWM3			249
+#define SRST_PWM3			250
+#define SRST_P_BUSTIMER0		252
+#define SRST_P_BUSTIMER1		253
+#define SRST_BUSTIMER0			255
+/********Name=SOFTRST_CON16,Offset=0xA40********/
+#define SRST_BUSTIMER1			256
+#define SRST_BUSTIMER2			257
+#define SRST_BUSTIMER3			258
+#define SRST_BUSTIMER4			259
+#define SRST_BUSTIMER5			260
+#define SRST_BUSTIMER6			261
+#define SRST_BUSTIMER7			262
+#define SRST_BUSTIMER8			263
+#define SRST_BUSTIMER9			264
+#define SRST_BUSTIMER10			265
+#define SRST_BUSTIMER11			266
+#define SRST_P_MAILBOX0			267
+#define SRST_P_MAILBOX1			268
+#define SRST_P_MAILBOX2			269
+#define SRST_P_GPIO1			270
+#define SRST_GPIO1			271
+/********Name=SOFTRST_CON17,Offset=0xA44********/
+#define SRST_P_GPIO2			272
+#define SRST_GPIO2			273
+#define SRST_P_GPIO3			274
+#define SRST_GPIO3			275
+#define SRST_P_GPIO4			276
+#define SRST_GPIO4			277
+#define SRST_A_DECOM			278
+#define SRST_P_DECOM			279
+#define SRST_D_DECOM			280
+#define SRST_P_TOP			281
+#define SRST_A_GICADB_GIC2CORE_BUS	283
+#define SRST_P_DFT2APB			284
+#define SRST_P_APB2ASB_MST_TOP		285
+#define SRST_P_APB2ASB_MST_CDPHY	286
+#define SRST_P_APB2ASB_MST_BOT_RIGHT	287
+/********Name=SOFTRST_CON18,Offset=0xA48********/
+#define SRST_P_APB2ASB_MST_IOC_TOP	288
+#define SRST_P_APB2ASB_MST_IOC_RIGHT	289
+#define SRST_P_APB2ASB_MST_CSIPHY	290
+#define SRST_P_APB2ASB_MST_VCCIO3_5	291
+#define SRST_P_APB2ASB_MST_VCCIO6	292
+#define SRST_P_APB2ASB_MST_EMMCIO	293
+#define SRST_A_SPINLOCK			294
+#define SRST_P_OTPC_NS			297
+#define SRST_OTPC_NS			298
+#define SRST_OTPC_ARB			299
+/********Name=SOFTRST_CON19,Offset=0xA4C********/
+#define SRST_P_BUSIOC			304
+#define SRST_P_PMUCM0_INTMUX		308
+#define SRST_P_DDRCM0_INTMUX		309
+/********Name=SOFTRST_CON20,Offset=0xA50********/
+#define SRST_P_DDR_DFICTL_CH0		320
+#define SRST_P_DDR_MON_CH0		321
+#define SRST_P_DDR_STANDBY_CH0		322
+#define SRST_P_DDR_UPCTL_CH0		323
+#define SRST_TM_DDR_MON_CH0		324
+#define SRST_P_DDR_GRF_CH01		325
+#define SRST_DFI_CH0			326
+#define SRST_SBR_CH0			327
+#define SRST_DDR_UPCTL_CH0		328
+#define SRST_DDR_DFICTL_CH0		329
+#define SRST_DDR_MON_CH0		330
+#define SRST_DDR_STANDBY_CH0		331
+#define SRST_A_DDR_UPCTL_CH0		332
+#define SRST_P_DDR_DFICTL_CH1		333
+#define SRST_P_DDR_MON_CH1		334
+#define SRST_P_DDR_STANDBY_CH1		335
+/********Name=SOFTRST_CON21,Offset=0xA54********/
+#define SRST_P_DDR_UPCTL_CH1		336
+#define SRST_TM_DDR_MON_CH1		337
+#define SRST_DFI_CH1			338
+#define SRST_SBR_CH1			339
+#define SRST_DDR_UPCTL_CH1		340
+#define SRST_DDR_DFICTL_CH1		341
+#define SRST_DDR_MON_CH1		342
+#define SRST_DDR_STANDBY_CH1		343
+#define SRST_A_DDR_UPCTL_CH1		344
+#define SRST_A_DDR01_MSCH0		349
+#define SRST_A_DDR01_RS_MSCH0		350
+#define SRST_A_DDR01_FRS_MSCH0		351
+/********Name=SOFTRST_CON22,Offset=0xA58********/
+#define SRST_A_DDR01_SCRAMBLE0		352
+#define SRST_A_DDR01_FRS_SCRAMBLE0	353
+#define SRST_A_DDR01_MSCH1		354
+#define SRST_A_DDR01_RS_MSCH1		355
+#define SRST_A_DDR01_FRS_MSCH1		356
+#define SRST_A_DDR01_SCRAMBLE1		357
+#define SRST_A_DDR01_FRS_SCRAMBLE1	358
+#define SRST_P_DDR01_MSCH0		359
+#define SRST_P_DDR01_MSCH1		360
+/********Name=SOFTRST_CON23,Offset=0xA5C********/
+#define SRST_P_DDR_DFICTL_CH2		368
+#define SRST_P_DDR_MON_CH2		369
+#define SRST_P_DDR_STANDBY_CH2		370
+#define SRST_P_DDR_UPCTL_CH2		371
+#define SRST_TM_DDR_MON_CH2		372
+#define SRST_P_DDR_GRF_CH23		373
+#define SRST_DFI_CH2			374
+#define SRST_SBR_CH2			375
+#define SRST_DDR_UPCTL_CH2		376
+#define SRST_DDR_DFICTL_CH2		377
+#define SRST_DDR_MON_CH2		378
+#define SRST_DDR_STANDBY_CH2		379
+#define SRST_A_DDR_UPCTL_CH2		380
+#define SRST_P_DDR_DFICTL_CH3		381
+#define SRST_P_DDR_MON_CH3		382
+#define SRST_P_DDR_STANDBY_CH3		383
+/********Name=SOFTRST_CON24,Offset=0xA60********/
+#define SRST_P_DDR_UPCTL_CH3		384
+#define SRST_TM_DDR_MON_CH3		385
+#define SRST_DFI_CH3			386
+#define SRST_SBR_CH3			387
+#define SRST_DDR_UPCTL_CH3		388
+#define SRST_DDR_DFICTL_CH3		389
+#define SRST_DDR_MON_CH3		390
+#define SRST_DDR_STANDBY_CH3		391
+#define SRST_A_DDR_UPCTL_CH3		392
+#define SRST_A_DDR23_MSCH2		397
+#define SRST_A_DDR23_RS_MSCH2		398
+#define SRST_A_DDR23_FRS_MSCH2		399
+/********Name=SOFTRST_CON25,Offset=0xA64********/
+#define SRST_A_DDR23_SCRAMBLE2		400
+#define SRST_A_DDR23_FRS_SCRAMBLE2	401
+#define SRST_A_DDR23_MSCH3		402
+#define SRST_A_DDR23_RS_MSCH3		403
+#define SRST_A_DDR23_FRS_MSCH3		404
+#define SRST_A_DDR23_SCRAMBLE3		405
+#define SRST_A_DDR23_FRS_SCRAMBLE3	406
+#define SRST_P_DDR23_MSCH2		407
+#define SRST_P_DDR23_MSCH3		408
+/********Name=SOFTRST_CON26,Offset=0xA68********/
+#define SRST_ISP1			419
+#define SRST_ISP1_VICAP			420
+#define SRST_A_ISP1_BIU			422
+#define SRST_H_ISP1_BIU			424
+/********Name=SOFTRST_CON27,Offset=0xA6C********/
+#define SRST_A_RKNN1			432
+#define SRST_A_RKNN1_BIU		433
+#define SRST_H_RKNN1			434
+#define SRST_H_RKNN1_BIU		435
+/********Name=SOFTRST_CON28,Offset=0xA70********/
+#define SRST_A_RKNN2			448
+#define SRST_A_RKNN2_BIU		449
+#define SRST_H_RKNN2			450
+#define SRST_H_RKNN2_BIU		451
+/********Name=SOFTRST_CON29,Offset=0xA74********/
+#define SRST_A_RKNN_DSU0		467
+#define SRST_P_NPUTOP_BIU		469
+#define SRST_P_NPU_TIMER		470
+#define SRST_NPUTIMER0			472
+#define SRST_NPUTIMER1			473
+#define SRST_P_NPU_WDT			474
+#define SRST_T_NPU_WDT			475
+#define SRST_P_NPU_PVTM			476
+#define SRST_P_NPU_GRF			477
+#define SRST_NPU_PVTM			478
+/********Name=SOFTRST_CON30,Offset=0xA78********/
+#define SRST_NPU_PVTPLL			480
+#define SRST_H_NPU_CM0_BIU		482
+#define SRST_F_NPU_CM0_CORE		483
+#define SRST_T_NPU_CM0_JTAG		484
+#define SRST_A_RKNN0			486
+#define SRST_A_RKNN0_BIU		487
+#define SRST_H_RKNN0			488
+#define SRST_H_RKNN0_BIU		489
+/********Name=SOFTRST_CON31,Offset=0xA7C********/
+#define SRST_H_NVM_BIU			498
+#define SRST_A_NVM_BIU			499
+#define SRST_H_EMMC			500
+#define SRST_A_EMMC			501
+#define SRST_C_EMMC			502
+#define SRST_B_EMMC			503
+#define SRST_T_EMMC			504
+#define SRST_S_SFC			505
+#define SRST_H_SFC			506
+#define SRST_H_SFC_XIP			507
+/********Name=SOFTRST_CON32,Offset=0xA80********/
+#define SRST_P_GRF			513
+#define SRST_P_DEC_BIU			514
+#define SRST_P_PHP_BIU			517
+#define SRST_A_PCIE_GRIDGE		520
+#define SRST_A_PHP_BIU			521
+#define SRST_A_GMAC0			522
+#define SRST_A_GMAC1			523
+#define SRST_A_PCIE_BIU			524
+#define SRST_PCIE0_POWER_UP		525
+#define SRST_PCIE1_POWER_UP		526
+#define SRST_PCIE2_POWER_UP		527
+/********Name=SOFTRST_CON33,Offset=0xA84********/
+#define SRST_PCIE3_POWER_UP		528
+#define SRST_PCIE4_POWER_UP		529
+#define SRST_P_PCIE0			540
+#define SRST_P_PCIE1			541
+#define SRST_P_PCIE2			542
+#define SRST_P_PCIE3			543
+/********Name=SOFTRST_CON34,Offset=0xA88********/
+#define SRST_P_PCIE4			544
+#define SRST_A_PHP_GIC_ITS		550
+#define SRST_A_MMU_PCIE			551
+#define SRST_A_MMU_PHP			552
+#define SRST_A_MMU_BIU			553
+/********Name=SOFTRST_CON35,Offset=0xA8C********/
+#define SRST_A_USB3OTG2			567
+/********Name=SOFTRST_CON37,Offset=0xA94********/
+#define SRST_PMALIVE0			596
+#define SRST_PMALIVE1			597
+#define SRST_PMALIVE2			598
+#define SRST_A_SATA0			599
+#define SRST_A_SATA1			600
+#define SRST_A_SATA2			601
+#define SRST_RXOOB0			602
+#define SRST_RXOOB1			603
+#define SRST_RXOOB2			604
+#define SRST_ASIC0			605
+#define SRST_ASIC1			606
+#define SRST_ASIC2			607
+/********Name=SOFTRST_CON40,Offset=0xAA0********/
+#define SRST_A_RKVDEC_CCU		642
+#define SRST_H_RKVDEC0			643
+#define SRST_A_RKVDEC0			644
+#define SRST_H_RKVDEC0_BIU		645
+#define SRST_A_RKVDEC0_BIU		646
+#define SRST_RKVDEC0_CA			647
+#define SRST_RKVDEC0_HEVC_CA		648
+#define SRST_RKVDEC0_CORE		649
+/********Name=SOFTRST_CON41,Offset=0xAA4********/
+#define SRST_H_RKVDEC1			658
+#define SRST_A_RKVDEC1			659
+#define SRST_H_RKVDEC1_BIU		660
+#define SRST_A_RKVDEC1_BIU		661
+#define SRST_RKVDEC1_CA			662
+#define SRST_RKVDEC1_HEVC_CA		663
+#define SRST_RKVDEC1_CORE		664
+/********Name=SOFTRST_CON42,Offset=0xAA8********/
+#define SRST_A_USB_BIU			674
+#define SRST_H_USB_BIU			675
+#define SRST_A_USB3OTG0			676
+#define SRST_A_USB3OTG1			679
+#define SRST_H_HOST0			682
+#define SRST_H_HOST_ARB0		683
+#define SRST_H_HOST1			684
+#define SRST_H_HOST_ARB1		685
+#define SRST_A_USB_GRF			686
+#define SRST_C_USB2P0_HOST0		687
+/********Name=SOFTRST_CON43,Offset=0xAAC********/
+#define SRST_C_USB2P0_HOST1		688
+#define SRST_HOST_UTMI0			689
+#define SRST_HOST_UTMI1			690
+/********Name=SOFTRST_CON44,Offset=0xAB0********/
+#define SRST_A_VDPU_BIU			708
+#define SRST_A_VDPU_LOW_BIU		709
+#define SRST_H_VDPU_BIU			710
+#define SRST_A_JPEG_DECODER_BIU		711
+#define SRST_A_VPU			712
+#define SRST_H_VPU			713
+#define SRST_A_JPEG_ENCODER0		714
+#define SRST_H_JPEG_ENCODER0		715
+#define SRST_A_JPEG_ENCODER1		716
+#define SRST_H_JPEG_ENCODER1		717
+#define SRST_A_JPEG_ENCODER2		718
+#define SRST_H_JPEG_ENCODER2		719
+/********Name=SOFTRST_CON45,Offset=0xAB4********/
+#define SRST_A_JPEG_ENCODER3		720
+#define SRST_H_JPEG_ENCODER3		721
+#define SRST_A_JPEG_DECODER		722
+#define SRST_H_JPEG_DECODER		723
+#define SRST_H_IEP2P0			724
+#define SRST_A_IEP2P0			725
+#define SRST_IEP2P0_CORE		726
+#define SRST_H_RGA2			727
+#define SRST_A_RGA2			728
+#define SRST_RGA2_CORE			729
+#define SRST_H_RGA3_0			730
+#define SRST_A_RGA3_0			731
+#define SRST_RGA3_0_CORE		732
+/********Name=SOFTRST_CON47,Offset=0xABC********/
+#define SRST_H_RKVENC0_BIU		754
+#define SRST_A_RKVENC0_BIU		755
+#define SRST_H_RKVENC0			756
+#define SRST_A_RKVENC0			757
+#define SRST_RKVENC0_CORE		758
+/********Name=SOFTRST_CON48,Offset=0xAC0********/
+#define SRST_H_RKVENC1_BIU		770
+#define SRST_A_RKVENC1_BIU		771
+#define SRST_H_RKVENC1			772
+#define SRST_A_RKVENC1			773
+#define SRST_RKVENC1_CORE		774
+/********Name=SOFTRST_CON49,Offset=0xAC4********/
+#define SRST_A_VI_BIU			787
+#define SRST_H_VI_BIU			788
+#define SRST_P_VI_BIU			789
+#define SRST_D_VICAP			790
+#define SRST_A_VICAP			791
+#define SRST_H_VICAP			792
+#define SRST_ISP0			794
+#define SRST_ISP0_VICAP			795
+/********Name=SOFTRST_CON50,Offset=0xAC8********/
+#define SRST_FISHEYE0			800
+#define SRST_FISHEYE1			803
+#define SRST_P_CSI_HOST_0		804
+#define SRST_P_CSI_HOST_1		805
+#define SRST_P_CSI_HOST_2		806
+#define SRST_P_CSI_HOST_3		807
+#define SRST_P_CSI_HOST_4		808
+#define SRST_P_CSI_HOST_5		809
+/********Name=SOFTRST_CON51,Offset=0xACC********/
+#define SRST_CSIHOST0_VICAP		820
+#define SRST_CSIHOST1_VICAP		821
+#define SRST_CSIHOST2_VICAP		822
+#define SRST_CSIHOST3_VICAP		823
+#define SRST_CSIHOST4_VICAP		824
+#define SRST_CSIHOST5_VICAP		825
+#define SRST_CIFIN			829
+/********Name=SOFTRST_CON52,Offset=0xAD0********/
+#define SRST_A_VOP_BIU			836
+#define SRST_A_VOP_LOW_BIU		837
+#define SRST_H_VOP_BIU			838
+#define SRST_P_VOP_BIU			839
+#define SRST_H_VOP			840
+#define SRST_A_VOP			841
+#define SRST_D_VOP0			845
+#define SRST_D_VOP2HDMI_BRIDGE0		846
+#define SRST_D_VOP2HDMI_BRIDGE1		847
+/********Name=SOFTRST_CON53,Offset=0xAD4********/
+#define SRST_D_VOP1			848
+#define SRST_D_VOP2			849
+#define SRST_D_VOP3			850
+#define SRST_P_VOPGRF			851
+#define SRST_P_DSIHOST0			852
+#define SRST_P_DSIHOST1			853
+#define SRST_DSIHOST0			854
+#define SRST_DSIHOST1			855
+#define SRST_VOP_PMU			856
+#define SRST_P_VOP_CHANNEL_BIU		857
+/********Name=SOFTRST_CON55,Offset=0xADC********/
+#define SRST_H_VO0_BIU			885
+#define SRST_H_VO0_S_BIU		886
+#define SRST_P_VO0_BIU			887
+#define SRST_P_VO0_S_BIU		888
+#define SRST_A_HDCP0_BIU		889
+#define SRST_P_VO0GRF			890
+#define SRST_H_HDCP_KEY0		891
+#define SRST_A_HDCP0			892
+#define SRST_H_HDCP0			893
+#define SRST_HDCP0			895
+/********Name=SOFTRST_CON56,Offset=0xAE0********/
+#define SRST_P_TRNG0			897
+#define SRST_DP0			904
+#define SRST_DP1			905
+#define SRST_H_I2S4_8CH			906
+#define SRST_M_I2S4_8CH_TX		909
+#define SRST_H_I2S8_8CH			910
+/********Name=SOFTRST_CON57,Offset=0xAE4********/
+#define SRST_M_I2S8_8CH_TX		913
+#define SRST_H_SPDIF2_DP0		914
+#define SRST_M_SPDIF2_DP0		918
+#define SRST_H_SPDIF5_DP1		919
+#define SRST_M_SPDIF5_DP1		923
+/********Name=SOFTRST_CON59,Offset=0xAEC********/
+#define SRST_A_HDCP1_BIU		950
+#define SRST_A_VO1_BIU			952
+#define SRST_H_VOP1_BIU			953
+#define SRST_H_VOP1_S_BIU		954
+#define SRST_P_VOP1_BIU			955
+#define SRST_P_VO1GRF			956
+#define SRST_P_VO1_S_BIU		957
+/********Name=SOFTRST_CON60,Offset=0xAF0********/
+#define SRST_H_I2S7_8CH			960
+#define SRST_M_I2S7_8CH_RX		963
+#define SRST_H_HDCP_KEY1		964
+#define SRST_A_HDCP1			965
+#define SRST_H_HDCP1			966
+#define SRST_HDCP1			968
+#define SRST_P_TRNG1			970
+#define SRST_P_HDMITX0			971
+/********Name=SOFTRST_CON61,Offset=0xAF4********/
+#define SRST_HDMITX0_REF		976
+#define SRST_P_HDMITX1			978
+#define SRST_HDMITX1_REF		983
+#define SRST_A_HDMIRX			985
+#define SRST_P_HDMIRX			986
+#define SRST_HDMIRX_REF			987
+/********Name=SOFTRST_CON62,Offset=0xAF8********/
+#define SRST_P_EDP0			992
+#define SRST_EDP0_24M			993
+#define SRST_P_EDP1			995
+#define SRST_EDP1_24M			996
+#define SRST_M_I2S5_8CH_TX		1000
+#define SRST_H_I2S5_8CH			1004
+#define SRST_M_I2S6_8CH_TX		1007
+/********Name=SOFTRST_CON63,Offset=0xAFC********/
+#define SRST_M_I2S6_8CH_RX		1010
+#define SRST_H_I2S6_8CH			1011
+#define SRST_H_SPDIF3			1012
+#define SRST_M_SPDIF3			1015
+#define SRST_H_SPDIF4			1016
+#define SRST_M_SPDIF4			1019
+#define SRST_H_SPDIFRX0			1020
+#define SRST_M_SPDIFRX0			1021
+#define SRST_H_SPDIFRX1			1022
+#define SRST_M_SPDIFRX1			1023
+/********Name=SOFTRST_CON64,Offset=0xB00********/
+#define SRST_H_SPDIFRX2			1024
+#define SRST_M_SPDIFRX2			1025
+#define SRST_LINKSYM_HDMITXPHY0		1036
+#define SRST_LINKSYM_HDMITXPHY1		1037
+#define SRST_VO1_BRIDGE0		1038
+#define SRST_VO1_BRIDGE1		1039
+/********Name=SOFTRST_CON65,Offset=0xB04********/
+#define SRST_H_I2S9_8CH			1040
+#define SRST_M_I2S9_8CH_RX		1043
+#define SRST_H_I2S10_8CH		1044
+#define SRST_M_I2S10_8CH_RX		1047
+#define SRST_P_S_HDMIRX			1048
+/********Name=SOFTRST_CON66,Offset=0xB08********/
+#define SRST_GPU			1060
+#define SRST_SYS_GPU			1061
+#define SRST_A_S_GPU_BIU		1064
+#define SRST_A_M0_GPU_BIU		1065
+#define SRST_A_M1_GPU_BIU		1066
+#define SRST_A_M2_GPU_BIU		1067
+#define SRST_A_M3_GPU_BIU		1068
+#define SRST_P_GPU_BIU			1070
+#define SRST_P_GPU_PVTM			1071
+/********Name=SOFTRST_CON67,Offset=0xB0C********/
+#define SRST_GPU_PVTM			1072
+#define SRST_P_GPU_GRF			1074
+#define SRST_GPU_PVTPLL			1075
+#define SRST_GPU_JTAG			1076
+/********Name=SOFTRST_CON68,Offset=0xB10********/
+#define SRST_A_AV1_BIU			1089
+#define SRST_A_AV1			1090
+#define SRST_P_AV1_BIU			1092
+#define SRST_P_AV1			1093
+/********Name=SOFTRST_CON69,Offset=0xB14********/
+#define SRST_A_DDR_BIU			1108
+#define SRST_A_DMA2DDR			1109
+#define SRST_A_DDR_SHAREMEM		1110
+#define SRST_A_DDR_SHAREMEM_BIU		1111
+#define SRST_A_CENTER_S200_BIU		1114
+#define SRST_A_CENTER_S400_BIU		1115
+#define SRST_H_AHB2APB			1116
+#define SRST_H_CENTER_BIU		1117
+#define SRST_F_DDR_CM0_CORE		1118
+/********Name=SOFTRST_CON70,Offset=0xB18********/
+#define SRST_DDR_TIMER0			1120
+#define SRST_DDR_TIMER1			1121
+#define SRST_T_WDT_DDR			1122
+#define SRST_T_DDR_CM0_JTAG		1123
+#define SRST_P_CENTER_GRF		1125
+#define SRST_P_AHB2APB			1126
+#define SRST_P_WDT			1127
+#define SRST_P_TIMER			1128
+#define SRST_P_DMA2DDR			1129
+#define SRST_P_SHAREMEM			1130
+#define SRST_P_CENTER_BIU		1131
+#define SRST_P_CENTER_CHANNEL_BIU	1132
+/********Name=SOFTRST_CON72,Offset=0xB20********/
+#define SRST_P_USBDPGRF0		1153
+#define SRST_P_USBDPPHY0		1154
+#define SRST_P_USBDPGRF1		1155
+#define SRST_P_USBDPPHY1		1156
+#define SRST_P_HDPTX0			1157
+#define SRST_P_HDPTX1			1158
+#define SRST_P_APB2ASB_SLV_BOT_RIGHT	1159
+#define SRST_P_USB2PHY_U3_0_GRF0	1160
+#define SRST_P_USB2PHY_U3_1_GRF0	1161
+#define SRST_P_USB2PHY_U2_0_GRF0	1162
+#define SRST_P_USB2PHY_U2_1_GRF0	1163
+#define SRST_HDPTX0_ROPLL		1164
+#define SRST_HDPTX0_LCPLL		1165
+#define SRST_HDPTX0			1166
+#define SRST_HDPTX1_ROPLL		1167
+/********Name=SOFTRST_CON73,Offset=0xB24********/
+#define SRST_HDPTX1_LCPLL		1168
+#define SRST_HDPTX1			1169
+#define SRST_HDPTX0_HDMIRXPHY_SET	1170
+#define SRST_USBDP_COMBO_PHY0		1171
+#define SRST_USBDP_COMBO_PHY0_LCPLL	1172
+#define SRST_USBDP_COMBO_PHY0_ROPLL	1173
+#define SRST_USBDP_COMBO_PHY0_PCS_HS	1174
+#define SRST_USBDP_COMBO_PHY1		1175
+#define SRST_USBDP_COMBO_PHY1_LCPLL	1176
+#define SRST_USBDP_COMBO_PHY1_ROPLL	1177
+#define SRST_USBDP_COMBO_PHY1_PCS_HS	1178
+#define SRST_HDMIHDP0			1180
+#define SRST_HDMIHDP1			1181
+/********Name=SOFTRST_CON74,Offset=0xB28********/
+#define SRST_A_VO1USB_TOP_BIU		1185
+#define SRST_H_VO1USB_TOP_BIU		1187
+/********Name=SOFTRST_CON75,Offset=0xB2C********/
+#define SRST_H_SDIO_BIU			1201
+#define SRST_H_SDIO			1202
+#define SRST_SDIO			1203
+/********Name=SOFTRST_CON76,Offset=0xB30********/
+#define SRST_H_RGA3_BIU			1218
+#define SRST_A_RGA3_BIU			1219
+#define SRST_H_RGA3_1			1220
+#define SRST_A_RGA3_1			1221
+#define SRST_RGA3_1_CORE		1222
+/********Name=SOFTRST_CON77,Offset=0xB34********/
+#define SRST_REF_PIPE_PHY0		1238
+#define SRST_REF_PIPE_PHY1		1239
+#define SRST_REF_PIPE_PHY2		1240
+
+/********Name=PHPTOPSOFTRST_CON0,Offset=0x8A00********/
+#define SRST_P_PHPTOP_CRU		131073
+#define SRST_P_PCIE2_GRF0		131074
+#define SRST_P_PCIE2_GRF1		131075
+#define SRST_P_PCIE2_GRF2		131076
+#define SRST_P_PCIE2_PHY0		131077
+#define SRST_P_PCIE2_PHY1		131078
+#define SRST_P_PCIE2_PHY2		131079
+#define SRST_P_PCIE3_PHY		131080
+#define SRST_P_APB2ASB_SLV_CHIP_TOP	131081
+#define SRST_PCIE30_PHY			131082
+
+/********Name=PMU1SOFTRST_CON00,Offset=0x30A00********/
+#define SRST_H_PMU1_BIU			786442
+#define SRST_P_PMU1_BIU			786443
+#define SRST_H_PMU_CM0_BIU		786444
+#define SRST_F_PMU_CM0_CORE		786445
+#define SRST_T_PMU1_CM0_JTAG		786446
+
+/********Name=PMU1SOFTRST_CON01,Offset=0x30A04********/
+#define SRST_DDR_FAIL_SAFE		786449
+#define SRST_P_CRU_PMU1			786450
+#define SRST_P_PMU1_GRF			786452
+#define SRST_P_PMU1_IOC			786453
+#define SRST_P_PMU1WDT			786454
+#define SRST_T_PMU1WDT			786455
+#define SRST_P_PMU1TIMER		786456
+#define SRST_PMU1TIMER0			786458
+#define SRST_PMU1TIMER1			786459
+#define SRST_P_PMU1PWM			786460
+#define SRST_PMU1PWM			786461
+
+/********Name=PMU1SOFTRST_CON02,Offset=0x30A08********/
+#define SRST_P_I2C0			786465
+#define SRST_I2C0			786466
+#define SRST_S_UART0			786469
+#define SRST_P_UART0			786470
+#define SRST_H_I2S1_8CH			786471
+#define SRST_M_I2S1_8CH_TX		786474
+#define SRST_M_I2S1_8CH_RX		786477
+#define SRST_H_PDM0			786478
+#define SRST_PDM0			786479
+
+/********Name=PMU1SOFTRST_CON03,Offset=0x30A0C********/
+#define SRST_H_VAD			786480
+#define SRST_HDPTX0_INIT		786491
+#define SRST_HDPTX0_CMN			786492
+#define SRST_HDPTX0_LANE		786493
+#define SRST_HDPTX1_INIT		786495
+
+/********Name=PMU1SOFTRST_CON04,Offset=0x30A10********/
+#define SRST_HDPTX1_CMN			786496
+#define SRST_HDPTX1_LANE		786497
+#define SRST_M_MIPI_DCPHY0		786499
+#define SRST_S_MIPI_DCPHY0		786500
+#define SRST_M_MIPI_DCPHY1		786501
+#define SRST_S_MIPI_DCPHY1		786502
+#define SRST_OTGPHY_U3_0		786503
+#define SRST_OTGPHY_U3_1		786504
+#define SRST_OTGPHY_U2_0		786505
+#define SRST_OTGPHY_U2_1		786506
+
+/********Name=PMU1SOFTRST_CON05,Offset=0x30A14********/
+#define SRST_P_PMU0GRF			786515
+#define SRST_P_PMU0IOC			786516
+#define SRST_P_GPIO0			786517
+#define SRST_GPIO0			786518
+
+/* scmi-clocks indices */
+
+#define SCMI_CLK_CPUL			0
+#define SCMI_CLK_DSU			1
+#define SCMI_CLK_CPUB01			2
+#define SCMI_CLK_CPUB23			3
+#define SCMI_CLK_DDR			4
+#define SCMI_CLK_GPU			5
+#define SCMI_CLK_NPU			6
+#define SCMI_CLK_SBUS			7
+#define SCMI_PCLK_SBUS			8
+#define SCMI_CCLK_SD			9
+#define SCMI_DCLK_SD			10
+#define SCMI_ACLK_SECURE_NS		11
+#define SCMI_HCLK_SECURE_NS		12
+#define SCMI_TCLK_WDT			13
+#define SCMI_KEYLADDER_CORE		14
+#define SCMI_KEYLADDER_RNG		15
+#define SCMI_ACLK_SECURE_S		16
+#define SCMI_HCLK_SECURE_S		17
+#define SCMI_PCLK_SECURE_S		18
+#define SCMI_CRYPTO_RNG			19
+#define SCMI_CRYPTO_CORE		20
+#define SCMI_CRYPTO_PKA			21
+#define SCMI_SPLL			22
+#define SCMI_HCLK_SD			23
+
+/********Name=SECURE_SOFTRST_CON00,Offset=0xA00********/
+#define SRST_A_SECURE_NS_BIU		10
+#define SRST_H_SECURE_NS_BIU		11
+#define SRST_A_SECURE_S_BIU		12
+#define SRST_H_SECURE_S_BIU		13
+#define SRST_P_SECURE_S_BIU		14
+#define SRST_CRYPTO_CORE		15
+/********Name=SECURE_SOFTRST_CON01,Offset=0xA04********/
+#define SRST_CRYPTO_PKA			16
+#define SRST_CRYPTO_RNG			17
+#define SRST_A_CRYPTO			18
+#define SRST_H_CRYPTO			19
+#define SRST_KEYLADDER_CORE		25
+#define SRST_KEYLADDER_RNG		26
+#define SRST_A_KEYLADDER		27
+#define SRST_H_KEYLADDER		28
+#define SRST_P_OTPC_S			29
+#define SRST_OTPC_S			30
+#define SRST_WDT_S			31
+/********Name=SECURE_SOFTRST_CON02,Offset=0xA08********/
+#define SRST_T_WDT_S			32
+#define SRST_H_BOOTROM			33
+#define SRST_A_DCF			34
+#define SRST_P_DCF			35
+#define SRST_H_BOOTROM_NS		37
+#define SRST_P_KEYLADDER		46
+#define SRST_H_TRNG_S			47
+/********Name=SECURE_SOFTRST_CON03,Offset=0xA0C********/
+#define SRST_H_TRNG_NS			48
+#define SRST_D_SDMMC_BUFFER		49
+#define SRST_H_SDMMC			50
+#define SRST_H_SDMMC_BUFFER		51
+#define SRST_SDMMC			52
+#define SRST_P_TRNG_CHK			53
+#define SRST_TRNG_S			54
+
+#endif
diff --git a/include/dt-bindings/power/rk3588-power.h b/include/dt-bindings/power/rk3588-power.h
new file mode 100644
index 0000000000..69f7e90602
--- /dev/null
+++ b/include/dt-bindings/power/rk3588-power.h
@@ -0,0 +1,69 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __DT_BINDINGS_POWER_RK3588_POWER_H__
+#define __DT_BINDINGS_POWER_RK3588_POWER_H__
+
+/* VD_LITDSU */
+#define RK3588_PD_CPU_0		0
+#define RK3588_PD_CPU_1		1
+#define RK3588_PD_CPU_2		2
+#define RK3588_PD_CPU_3		3
+
+/* VD_BIGCORE0 */
+#define RK3588_PD_CPU_4		4
+#define RK3588_PD_CPU_5		5
+
+/* VD_BIGCORE1 */
+#define RK3588_PD_CPU_6		6
+#define RK3588_PD_CPU_7		7
+
+/* VD_NPU */
+#define RK3588_PD_NPU		8
+#define RK3588_PD_NPUTOP	9
+#define RK3588_PD_NPU1		10
+#define RK3588_PD_NPU2		11
+
+/* VD_GPU */
+#define RK3588_PD_GPU		12
+
+/* VD_VCODEC */
+#define RK3588_PD_VCODEC	13
+#define RK3588_PD_RKVDEC0	14
+#define RK3588_PD_RKVDEC1	15
+#define RK3588_PD_VENC0		16
+#define RK3588_PD_VENC1		17
+
+/* VD_DD01 */
+#define RK3588_PD_DDR01		18
+
+/* VD_DD23 */
+#define RK3588_PD_DDR23		19
+
+/* VD_LOGIC */
+#define RK3588_PD_CENTER	20
+#define RK3588_PD_VDPU		21
+#define RK3588_PD_RGA30		22
+#define RK3588_PD_AV1		23
+#define RK3588_PD_VOP		24
+#define RK3588_PD_VO0		25
+#define RK3588_PD_VO1		26
+#define RK3588_PD_VI		27
+#define RK3588_PD_ISP1		28
+#define RK3588_PD_FEC		29
+#define RK3588_PD_RGA31		30
+#define RK3588_PD_USB		31
+#define RK3588_PD_PHP		32
+#define RK3588_PD_GMAC		33
+#define RK3588_PD_PCIE		34
+#define RK3588_PD_NVM		35
+#define RK3588_PD_NVM0		36
+#define RK3588_PD_SDIO		37
+#define RK3588_PD_AUDIO		38
+#define RK3588_PD_SECURE	39
+#define RK3588_PD_SDMMC		40
+#define RK3588_PD_CRYPTO	41
+#define RK3588_PD_BUS		42
+
+/* VD_PMU */
+#define RK3588_PD_PMU1		43
+
+#endif

commit 5d3393e1e26688a15440972175d417ff8957301a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Dec 13 03:46:06 2021 +0000

    cmd: bootrkp: use align address to load image
    
    Without this change, the mmc bounce buffer would use malloc
    and memcpy actions to load the image on unaligned address.
    
    Let's simplify that with a final memcpy action, which
    indenpends on malloc pool size.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I50158d93cda45d517c8ac1de0c95357973a1d40a

diff --git a/cmd/bootrkp.c b/cmd/bootrkp.c
index 1f23f9f2da..00d012fa36 100644
--- a/cmd/bootrkp.c
+++ b/cmd/bootrkp.c
@@ -168,51 +168,36 @@ static void boot_lmb_init(bootm_headers_t *images)
 static int read_rockchip_image(struct blk_desc *dev_desc,
 			       disk_partition_t *part, void *dst)
 {
-	struct rockchip_image *img;
+	struct rockchip_image *img = dst;
 	int header_len = 8;
 	int cnt, ret;
 #ifdef CONFIG_ROCKCHIP_CRC
 	u32 crc32;
 #endif
-
-	img = memalign(ARCH_DMA_MINALIGN, RK_BLK_SIZE);
-	if (!img)
-		return -ENOMEM;
-
-	/* read first block with header imformation */
 	ret = blk_dread(dev_desc, part->start, 1, img);
-	if (ret != 1) {
-		ret = -EIO;
-		goto err;
-	}
+	if (ret != 1)
+		return -EIO;
 
 	if (img->tag != TAG_KERNEL) {
 		printf("Invalid %s image tag(0x%x)\n", part->name, img->tag);
-		ret = -EINVAL;
-		goto err;
+		return -EINVAL;
 	}
 
-	/*
-	 * read the rest blks
-	 * total size = image size + 8 bytes header + 4 bytes crc32
-	 */
+	/* total size = image size + 8 bytes header + 4 bytes crc32 */
 	cnt = DIV_ROUND_UP(img->size + 8 + 4, RK_BLK_SIZE);
 	if (!sysmem_alloc_base_by_name((const char *)part->name,
 				       (phys_addr_t)dst,
-				       cnt * dev_desc->blksz)) {
-		ret = -ENXIO;
-		goto err;
-	}
+				       cnt * dev_desc->blksz))
+		return -ENXIO;
 
-	memcpy(dst, img->image, RK_BLK_SIZE - header_len);
-	ret = blk_dread(dev_desc, part->start + 1, cnt - 1,
-			dst + RK_BLK_SIZE - header_len);
-	if (ret != (cnt - 1)) {
-		printf("Failed to read %s part, ret=%d\n", part->name, ret);
-		ret = -EIO;
+	ret = blk_dread(dev_desc, part->start, cnt, dst);
+	if (ret != cnt) {
+		printf("Failed to read %s part, blkcnt=%d\n", part->name, ret);
+		return -EIO;
 	} else {
 		ret = img->size;
 	}
+	memcpy(dst, dst + header_len, img->size);
 
 #ifdef CONFIG_ROCKCHIP_CRC
 	printf("%s image rk crc32 verify... ", part->name);
@@ -224,9 +209,6 @@ static int read_rockchip_image(struct blk_desc *dev_desc,
 		printf("okay.\n");
 	}
 #endif
-
-err:
-	free(img);
 	return ret;
 }
 

commit 8cdfda89d93a28db6372365d77c642a0ea947f46
Author: Marek Vasut <marex@denx.de>
Date:   Sat Mar 23 18:45:27 2019 +0100

    UPSTREAM: mmc: dw_mmc: Handle return value from bounce_buffer_start()
    
    The bounce_buffer_start() can return -ENOMEM in case memory allocation
    failed. However, in that case, the bounce buffer address is the same as
    the possibly unaligned input address, and the cache maintenance operations
    were not applied to this address. This could cause subtle problems. Add
    handling for the bounce_buffer_start() return value to prevent such a
    problem from happening.
    
    Signed-off-by: Marek Vasut <marex@denx.de>
    Cc: Jaehoon Chung <jh80.chung@samsung.com>
    Cc: Simon Glass <sjg@chromium.org>
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I0cdb3196e3ceb1d1f1935e003624afcb05001219
    (cherry picked from commit 6ad5aec419782955fa4be79c93f2640fc043f3cf)

diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 714a444254..994774072f 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -352,14 +352,20 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
 			dwmci_wait_reset(host, DWMCI_CTRL_FIFO_RESET);
 		} else {
 			if (data->flags == MMC_DATA_READ) {
-				bounce_buffer_start(&bbstate, (void*)data->dest,
+				ret = bounce_buffer_start(&bbstate,
+						(void*)data->dest,
 						data->blocksize *
 						data->blocks, GEN_BB_WRITE);
 			} else {
-				bounce_buffer_start(&bbstate, (void*)data->src,
+				ret = bounce_buffer_start(&bbstate,
+						(void*)data->src,
 						data->blocksize *
 						data->blocks, GEN_BB_READ);
 			}
+
+			if (ret)
+				return ret;
+
 			dwmci_prepare_data(host, data, cur_idmac,
 					   bbstate.bounce_buffer);
 		}

commit 862a63927e324d5132d11a61bae0cb2dcbb64cd8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 8 03:39:15 2021 +0000

    misc: decompress: add max timeout 2s for decompress finish
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Id5e7dec94d773d57a2ceba30e3bb0b4621caaada
    (cherry picked from commit 60bc0ba6e70db651d5f1bb70812bd91e4dd111af)

diff --git a/drivers/misc/misc_decompress.c b/drivers/misc/misc_decompress.c
index 7f4173b21d..2c6efcb4bc 100644
--- a/drivers/misc/misc_decompress.c
+++ b/drivers/misc/misc_decompress.c
@@ -169,7 +169,7 @@ static int misc_decompress_data_size(struct udevice *dev, u64 *size, u32 comp)
 
 static int misc_decompress_finish(struct udevice *dev, u32 comp)
 {
-	int timeout = 20000;
+	int timeout = 200000;	/* 2s */
 
 	while (!misc_decompress_is_complete(dev)) {
 		if (timeout < 0)

commit a405238ad6f00ec10405425d87a7b18bae43afad
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Wed Dec 8 19:52:22 2021 +0800

    lib: optee_clientApi: support set oem hardware read otp read lock
    
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
    Change-Id: Idf620b533c26cff095efc97de4c4e48c1692fde0

diff --git a/include/optee_include/OpteeClientInterface.h b/include/optee_include/OpteeClientInterface.h
index 4eee795bb9..037f6d6a3e 100644
--- a/include/optee_include/OpteeClientInterface.h
+++ b/include/optee_include/OpteeClientInterface.h
@@ -51,6 +51,7 @@ uint32_t trusty_write_oem_ns_otp(uint32_t byte_off, uint8_t *byte_buf, uint32_t
 uint32_t trusty_read_oem_ns_otp(uint32_t byte_off, uint8_t *byte_buf, uint32_t byte_len);
 uint32_t trusty_write_oem_hr_otp(enum RK_OEM_HR_OTP_KEYID key_id,
 				 uint8_t *byte_buf, uint32_t byte_len);
+uint32_t trusty_set_oem_hr_otp_read_lock(enum RK_OEM_HR_OTP_KEYID key_id);
 uint32_t trusty_attest_dh(uint8_t *dh, uint32_t *dh_size);
 uint32_t trusty_attest_uuid(uint8_t *uuid, uint32_t *uuid_size);
 uint32_t trusty_attest_get_ca
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index 5c6a968d0e..2685b74a6b 100644
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -27,6 +27,7 @@
 #define STORAGE_CMD_WRITE_OEM_NS_OTP		12
 #define STORAGE_CMD_READ_OEM_NS_OTP		13
 #define STORAGE_CMD_WRITE_OEM_HR_OTP		14
+#define STORAGE_CMD_SET_OEM_HR_OTP_READ_LOCK	15
 
 static uint8_t b2hs_add_base(uint8_t in)
 {
@@ -793,6 +794,57 @@ exit:
 	return TeecResult;
 }
 
+uint32_t trusty_set_oem_hr_otp_read_lock(enum RK_OEM_HR_OTP_KEYID key_id)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+
+	TEEC_UUID tempuuid = { 0x2d26d8a8, 0x5134, 0x4dd8,
+			{ 0xb3, 0x2f, 0xb3, 0x4b, 0xce, 0xeb, 0xc4, 0x71 } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				&TeecSession,
+				TeecUuid,
+				TEEC_LOGIN_PUBLIC,
+				NULL,
+				NULL,
+				&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
+
+	TeecOperation.params[0].value.a = key_id;
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						    TEEC_NONE,
+						    TEEC_NONE,
+						    TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					STORAGE_CMD_SET_OEM_HR_OTP_READ_LOCK,
+					&TeecOperation,
+					&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
+
+exit:
+	TEEC_CloseSession(&TeecSession);
+	TEEC_FinalizeContext(&TeecContext);
+
+	return TeecResult;
+}
+
 uint32_t trusty_attest_dh(uint8_t *dh, uint32_t *dh_size)
 {
 	TEEC_Result TeecResult;

commit bb1ba6ac462e714ea2e30271e49073c93771d25f
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Wed Dec 8 19:50:21 2021 +0800

    lib: optee_clientApi: support write oem hardware read otp
    
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
    Change-Id: I4d607081c347ab1f8d700c999210126470713ca9

diff --git a/include/optee_include/OpteeClientInterface.h b/include/optee_include/OpteeClientInterface.h
index ec2116aeda..4eee795bb9 100644
--- a/include/optee_include/OpteeClientInterface.h
+++ b/include/optee_include/OpteeClientInterface.h
@@ -9,6 +9,14 @@
 
 #include <optee_include/tee_client_api.h>
 
+enum RK_OEM_HR_OTP_KEYID {
+	RK_OEM_HR_OTP_KEY0 = 0,		/* keyladder key0 */
+	RK_OEM_HR_OTP_KEY1 = 1,		/* keyladder key1 */
+	RK_OEM_HR_OTP_KEY2 = 2,		/* keyladder key2 */
+	RK_OEM_HR_OTP_KEY3 = 3,		/* keyladder key3 */
+	RK_OEM_HR_OTP_KEYMAX
+};
+
 #define ATAP_HEX_UUID_LEN 32
 #define ATTEST_DH_SIZE     8
 #define ATTEST_UUID_SIZE     (ATAP_HEX_UUID_LEN+1)
@@ -41,6 +49,8 @@ uint32_t trusty_read_permanent_attributes_flag(uint8_t *attributes);
 uint32_t trusty_write_permanent_attributes_flag(uint8_t attributes);
 uint32_t trusty_write_oem_ns_otp(uint32_t byte_off, uint8_t *byte_buf, uint32_t byte_len);
 uint32_t trusty_read_oem_ns_otp(uint32_t byte_off, uint8_t *byte_buf, uint32_t byte_len);
+uint32_t trusty_write_oem_hr_otp(enum RK_OEM_HR_OTP_KEYID key_id,
+				 uint8_t *byte_buf, uint32_t byte_len);
 uint32_t trusty_attest_dh(uint8_t *dh, uint32_t *dh_size);
 uint32_t trusty_attest_uuid(uint8_t *uuid, uint32_t *uuid_size);
 uint32_t trusty_attest_get_ca
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index d126dfe4da..5c6a968d0e 100644
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -6,6 +6,7 @@
  */
 
 #include <common.h>
+#include <optee_include/OpteeClientInterface.h>
 #include <optee_include/OpteeClientApiLib.h>
 #include <optee_include/tee_client_api.h>
 #include <optee_include/tee_api_defines.h>
@@ -25,6 +26,7 @@
 #define STORAGE_CMD_WRITE_OEM_HUK		11
 #define STORAGE_CMD_WRITE_OEM_NS_OTP		12
 #define STORAGE_CMD_READ_OEM_NS_OTP		13
+#define STORAGE_CMD_WRITE_OEM_HR_OTP		14
 
 static uint8_t b2hs_add_base(uint8_t in)
 {
@@ -725,6 +727,72 @@ exit:
 	return TeecResult;
 }
 
+uint32_t trusty_write_oem_hr_otp(enum RK_OEM_HR_OTP_KEYID key_id,
+				 uint8_t *byte_buf, uint32_t byte_len)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+
+	TEEC_UUID tempuuid = { 0x2d26d8a8, 0x5134, 0x4dd8,
+			{ 0xb3, 0x2f, 0xb3, 0x4b, 0xce, 0xeb, 0xc4, 0x71 } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				&TeecSession,
+				TeecUuid,
+				TEEC_LOGIN_PUBLIC,
+				NULL,
+				NULL,
+				&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
+
+	TeecOperation.params[0].value.a = key_id;
+
+	TEEC_SharedMemory SharedMem = {0};
+
+	SharedMem.size = byte_len;
+	SharedMem.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem.size;
+
+	memcpy(SharedMem.buffer, byte_buf, SharedMem.size);
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						    TEEC_MEMREF_TEMP_INPUT,
+						    TEEC_NONE,
+						    TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					STORAGE_CMD_WRITE_OEM_HR_OTP,
+					&TeecOperation,
+					&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
+
+exit:
+	TEEC_ReleaseSharedMemory(&SharedMem);
+	TEEC_CloseSession(&TeecSession);
+	TEEC_FinalizeContext(&TeecContext);
+
+	return TeecResult;
+}
+
 uint32_t trusty_attest_dh(uint8_t *dh, uint32_t *dh_size)
 {
 	TEEC_Result TeecResult;

commit f5b174d43db0222f03ac6e51c44b7fc7de483bae
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Wed Dec 8 17:18:55 2021 +0800

    cmd: rockusb: fix null pointer when ctrl-c
    
    Fix below null pointer exception when execute CTRL+C operation.
    
    "Error" handler, esr 0xbe000011
    
    * Reason:        Exception from SError interrupt
    * PC         =   00000000002831b8
    * LR         =   00000000002848a8
    * SP         =   00000000edbf94d0
    * ESR_EL2    =   00000000be000011
    * Reloc Off  =   00000000efcdb000
    
    [...]
    
    Call trace:
      PC:   [< 002831b8 >]
      LR:   [< 002848a8 >]
    
    Stack:
      [< 002831b8 >]
      [< 00284abc >]
      [< 0020f740 >]
      [< 002281dc >]
      [< 00216410 >]
      [< 002165b0 >]
      [< 00216af4 >]
      [< 00227888 >]
      [...]
    
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    Change-Id: I379d0f7be3582b051bb38005592ee505e25b7acc

diff --git a/cmd/rockusb.c b/cmd/rockusb.c
index 7f4841ff75..5cf5bd92ab 100644
--- a/cmd/rockusb.c
+++ b/cmd/rockusb.c
@@ -72,8 +72,8 @@ static void rkusb_fini(void)
 		free((void *)g_rkusb->ums[i].name);
 	free(g_rkusb->ums);
 	g_rkusb->ums = NULL;
-	g_rkusb = NULL;
 	g_rkusb->ums_cnt = 0;
+	g_rkusb = NULL;
 }
 
 #define RKUSB_NAME_LEN 16

commit f968f3bc7be2f46c645657e7f3388c24b2b07635
Author: Zorro Liu <lyx@rock-chips.com>
Date:   Fri Dec 3 10:44:49 2021 +0800

    rk_ebc_tcon: set ebc dclk
    
    Signed-off-by: Zorro Liu <lyx@rock-chips.com>
    Change-Id: Ifa2736304e190f07e32387cd88e8f633944ce199

diff --git a/drivers/video/rk_eink/rk_ebc_tcon.c b/drivers/video/rk_eink/rk_ebc_tcon.c
index c4254500e7..5d9b366c8e 100644
--- a/drivers/video/rk_eink/rk_ebc_tcon.c
+++ b/drivers/video/rk_eink/rk_ebc_tcon.c
@@ -27,6 +27,7 @@ struct ebc_tcon_priv {
 	u32 reg_len;
 	void *grf;
 	void *pmugrf;
+	struct clk dclk;
 };
 
 #define msleep(a)		udelay((a) * 1000)
@@ -252,6 +253,7 @@ static inline void tcon_cfg_done(struct ebc_tcon_priv *tcon)
 
 static int ebc_tcon_enable(struct udevice *dev, struct ebc_panel *panel)
 {
+	int ret;
 	struct ebc_tcon_priv *tcon = dev_get_priv(dev);
 
 	/* panel timing and win info config */
@@ -324,6 +326,12 @@ static int ebc_tcon_enable(struct udevice *dev, struct ebc_panel *panel)
 
 	tcon_cfg_done(tcon);
 
+	ret = clk_set_rate(&tcon->dclk, panel->sdck * ((panel->panel_16bit ? 7 : 3) + 1));
+	if (ret < 0) {
+		printf("%s: set clock rate failed, %d\n", __func__, ret);
+		return ret;
+	}
+
 	return 0;
 }
 
@@ -460,9 +468,11 @@ static int rk_ebc_tcon_probe(struct udevice *dev)
 	}
 
 	priv->dev = dev;
-	ret = clk_set_defaults(dev);
-	if (ret)
-		printf("%s clk_set_defaults failed %d\n", __func__, ret);
+	ret = clk_get_by_index(dev, 1, &priv->dclk);
+	if (ret < 0) {
+		printf("%s get clock fail! %d\n", __func__, ret);
+		return -EINVAL;
+	}
 
 #ifdef CONFIG_IRQ
 	irq_install_handler(IRQ_EBC, ebc_irq_handler, dev);

commit 953458c1481bc745c27162210e94a53f4c9e379c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Dec 3 11:44:31 2021 +0000

    arm: bootm: calculate total time at late
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I1f406b751c9eb75c25a956b36ba32aaf14a85f02

diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index 5ce27bac24..a9c053785b 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -82,11 +82,6 @@ static void announce_and_cleanup(bootm_headers_t *images, int fake)
 {
 	ulong us;
 
-	us = (get_ticks() - gd->sys_start_tick) / (COUNTER_FREQUENCY / 1000000);
-	printf("Total: %ld.%ld ms\n", us / 1000, us % 1000);
-
-	printf("\nStarting kernel ...%s\n\n", fake ?
-		"(fake run for tracing)" : "");
 	bootstage_mark_name(BOOTSTAGE_ID_BOOTM_HANDOFF, "start_kernel");
 #ifdef CONFIG_BOOTSTAGE_FDT
 	bootstage_fdt_add_report();
@@ -112,6 +107,12 @@ static void announce_and_cleanup(bootm_headers_t *images, int fake)
 	dm_remove_devices_flags(DM_REMOVE_ACTIVE_ALL);
 
 	cleanup_before_linux();
+
+	us = (get_ticks() - gd->sys_start_tick) / (COUNTER_FREQUENCY / 1000000);
+	printf("Total: %ld.%ld ms\n", us / 1000, us % 1000);
+
+	printf("\nStarting kernel ...%s\n\n", fake ?
+		"(fake run for tracing)" : "");
 }
 
 static void setup_start_tag (bd_t *bd)

commit b4689b113f106970e317cb7563b9668d14f28d17
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Dec 3 01:21:59 2021 +0000

    cmd: boot: stay in Thumb stat for "go" command
    
    We use ARM Thumb2 to compile code and standalone.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Iffe09fcf17ba86fd362246b6e8038ffcf7e2e4c7

diff --git a/cmd/boot.c b/cmd/boot.c
index 8c2ebf2f9e..3f96c3202f 100644
--- a/cmd/boot.c
+++ b/cmd/boot.c
@@ -21,6 +21,10 @@ __attribute__((weak))
 unsigned long do_go_exec(ulong (*entry)(int, char * const []), int argc,
 				 char * const argv[])
 {
+#ifdef CONFIG_CPU_V7
+	ulong addr = (ulong)entry | 1;
+	entry = (void *)addr;
+#endif
 	return entry (argc, argv);
 }
 

commit aaca6ffec10380a92367f465196905c72f2b243f
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Dec 3 17:26:54 2021 +0800

    configs: rv1126: enable CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ia28f230872079755a89b9cdc895ac7b51fa16d85

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index 9a582e501e..8fc442c905 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -38,7 +38,6 @@ CONFIG_ANDROID_BOOT_IMAGE_HASH=y
 CONFIG_SPL_BOARD_INIT=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
-# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
 CONFIG_SPL_SHA256_SUPPORT=y
 CONFIG_SPL_CRYPTO_SUPPORT=y

commit c2ec378aa4a303f9d8c9a44e4e871f07c7119947
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Dec 3 17:24:36 2021 +0800

    configs: rk3568: enable CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ia870b1acc3bf034173ce8a936cf53b5ea1fb58bc

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index 542ff37193..d2742454eb 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -35,7 +35,6 @@ CONFIG_SPL_BOARD_INIT=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
 CONFIG_SPL_SEPARATE_BSS=y
-# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
 CONFIG_SPL_SHA256_SUPPORT=y
 CONFIG_SPL_CRYPTO_SUPPORT=y

commit 835c5a4c2755e55fd3d70b1d5fb56068d065677d
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Dec 3 17:05:51 2021 +0800

    spl: mmc: correct the mmc_load_image_raw_partition()
    
    Since we use this function to load image as gpt partition but
    not mmc partition by mistake, and rockcjip do not use mmc boot 1 & 2
    partitions to store firmwares anymore. So correct this function
    usage.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I4600c137c7dea0e295731372d5ce086d1be0e355

diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c
index 34b5079c13..56c370420d 100644
--- a/common/spl/spl_mmc.c
+++ b/common/spl/spl_mmc.c
@@ -184,12 +184,7 @@ static int mmc_load_image_raw_partition(struct spl_image_info *spl_image,
 		return -1;
 	}
 
-#ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
-	return mmc_load_image_raw_sector(spl_image, mmc,
-			info.start + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR);
-#else
 	return mmc_load_image_raw_sector(spl_image, mmc, info.start);
-#endif
 }
 #endif
 

commit 4793dcafc03368d4cb5dabcb398d96597bd73157
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Dec 1 17:09:16 2021 +0800

    spl: fit: add paramrter for spl_fit_standalone_release()
    
    Change spl_fit_standalone_release(uintptr_t entry_point) as
    spl_fit_standalone_release(char *id, uintptr_t entry_point)
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ibd3fbd7937b95e853e04f61f50ac9353a21cec10

diff --git a/common/spl/spl_fit_tb_arm_v7.S b/common/spl/spl_fit_tb_arm_v7.S
index bb94969067..a49add0e27 100644
--- a/common/spl/spl_fit_tb_arm_v7.S
+++ b/common/spl/spl_fit_tb_arm_v7.S
@@ -367,12 +367,12 @@ spl_load_fit_image:
 	str	r0, [sp, #8]
 .LVL55:
 .L22:
+.LBB36:
 .LBB37:
-.LBB38:
 	.loc 1 157 0
 	ldr	r3, [r8, #12]
-.LBE38:
 .LBE37:
+.LBE36:
 	.loc 1 253 0
 	ldr	r10, [sp, #36]
 	.loc 1 255 0
@@ -380,8 +380,8 @@ spl_load_fit_image:
 	.loc 1 253 0
 	str	r10, [sp, #32]
 .LVL56:
-.LBB41:
-.LBB39:
+.LBB40:
+.LBB38:
 	.loc 1 157 0
 	cmp	r3, #0
 	beq	.L23
@@ -389,10 +389,10 @@ spl_load_fit_image:
 	and	fp, r0, #63
 .LVL57:
 .L24:
-.LBE39:
-.LBE41:
+.LBE38:
+.LBE40:
+.LBB41:
 .LBB42:
-.LBB43:
 	.loc 1 166 0
 	add	r10, r10, fp
 .LVL58:
@@ -407,8 +407,8 @@ spl_load_fit_image:
 	mov	r10, r0
 .LVL60:
 .L25:
-.LBE43:
 .LBE42:
+.LBE41:
 	.loc 1 259 0
 	mov	r1, r5
 	mov	r0, r4
@@ -429,8 +429,8 @@ spl_load_fit_image:
 .LVL62:
 	.loc 1 264 0
 	mov	r7, r3
+.LBB43:
 .LBB44:
-.LBB45:
 	.loc 1 143 0
 	ldr	r3, [r8, #12]
 	cmp	r3, #0
@@ -439,8 +439,8 @@ spl_load_fit_image:
 	bic	r0, r0, #63
 .LVL63:
 .L28:
-.LBE45:
 .LBE44:
+.LBE43:
 	.loc 1 264 0
 	ldr	r1, [sp, #20]
 	mov	r2, r10
@@ -507,8 +507,8 @@ spl_load_fit_image:
 	b	.L70
 .LVL69:
 .L23:
-.LBB47:
-.LBB40:
+.LBB46:
+.LBB39:
 	.loc 1 160 0
 	ldr	r1, [r8, #8]
 	str	r3, [sp, #16]
@@ -519,10 +519,10 @@ spl_load_fit_image:
 	b	.L24
 .LVL71:
 .L27:
-.LBE40:
-.LBE47:
-.LBB48:
-.LBB46:
+.LBE39:
+.LBE46:
+.LBB47:
+.LBB45:
 	.loc 1 146 0
 	ldr	r1, [r8, #8]
 	bl	__aeabi_idiv
@@ -530,8 +530,8 @@ spl_load_fit_image:
 	b	.L28
 .LVL73:
 .L68:
-.LBE46:
-.LBE48:
+.LBE45:
+.LBE47:
 	.loc 1 285 0
 	ldr	r3, [sp, #52]
 	str	r3, [sp, #48]
@@ -539,15 +539,15 @@ spl_load_fit_image:
 .L30:
 	.loc 1 289 0
 	ldrb	r3, [sp, #27]	@ zero_extendqisi2
+.LBB48:
 .LBB49:
-.LBB50:
 	.file 2 "include/image.h"
 	.loc 2 1005 0
 	movs	r2, #0
 	mov	r1, r5
 	mov	r0, r4
-.LBE50:
 .LBE49:
+.LBE48:
 	.loc 1 289 0
 	cbz	r3, .L32
 .LVL75:
@@ -555,22 +555,22 @@ spl_load_fit_image:
 	cmp	r3, #6
 	beq	.L32
 .LVL76:
-.LBB53:
-.LBB51:
+.LBB52:
+.LBB50:
 	.loc 2 1005 0 is_stmt 1
 	bl	fdt_get_name
 .LVL77:
-.LBE51:
-.LBE53:
+.LBE50:
+.LBE52:
 	.loc 1 292 0
 	movs	r3, #0
-.LBB54:
-.LBB52:
+.LBB53:
+.LBB51:
 	.loc 2 1005 0
 	mov	r7, r0
 .LVL78:
-.LBE52:
-.LBE54:
+.LBE51:
+.LBE53:
 	.loc 1 292 0
 	ldr	r2, .L72+8
 	mov	r1, r5
@@ -621,13 +621,13 @@ spl_load_fit_image:
 	b	.L31
 .LVL85:
 .L32:
+.LBB54:
 .LBB55:
-.LBB56:
 	.loc 2 1005 0
 	bl	fdt_get_name
 .LVL86:
-.LBE56:
 .LBE55:
+.LBE54:
 	.loc 1 295 0
 	ldr	r2, [sp, #44]
 	mov	r1, r0
@@ -813,8 +813,8 @@ spl_fit_load_blob:
 	.loc 1 445 0
 	bic	r6, r3, #63
 .LVL112:
+.LBB62:
 .LBB63:
-.LBB64:
 	.loc 1 168 0
 	ldr	r3, [r4, #12]
 	cbnz	r3, .L79
@@ -825,8 +825,8 @@ spl_fit_load_blob:
 	bl	__aeabi_idiv
 .LVL114:
 .L79:
-.LBE64:
 .LBE63:
+.LBE62:
 	.loc 1 447 0
 	mov	r2, r0
 	ldr	r7, [r4, #16]
@@ -1024,7 +1024,7 @@ spl_load_simple_fit:
 .LFB226:
 	.loc 1 798 0
 	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 256
+	@ args = 0, pretend = 0, frame = 248
 	@ frame_needed = 1, uses_anonymous_args = 0
 .LVL130:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
@@ -1037,10 +1037,10 @@ spl_load_simple_fit:
 	.cfi_offset 10, -12
 	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	sub	sp, sp, #272
-	.cfi_def_cfa_offset 304
+	sub	sp, sp, #264
+	.cfi_def_cfa_offset 296
 	add	r7, sp, #16
-	.cfi_def_cfa 7, 288
+	.cfi_def_cfa 7, 280
 .LVL131:
 	.loc 1 798 0
 	mov	r6, r1
@@ -1052,7 +1052,7 @@ spl_load_simple_fit:
 	ldr	r3, [r3]
 .LVL134:
 	.loc 1 814 0
-	ldr	r1, .L157
+	ldr	r1, .L155
 .LVL135:
 	rev	r3, r3
 .LVL136:
@@ -1060,11 +1060,11 @@ spl_load_simple_fit:
 	str	r1, [r7]
 	beq	.L93
 	.loc 1 815 0
-	ldr	r0, .L157+4
+	ldr	r0, .L155+4
 .LVL137:
-.L156:
-.LBB86:
-.LBB87:
+.L154:
+.LBB84:
+.LBB85:
 	.loc 1 633 0
 	bl	printf
 .LVL138:
@@ -1072,10 +1072,10 @@ spl_load_simple_fit:
 	mvn	r0, #21
 .LVL139:
 .L92:
-.LBE87:
-.LBE86:
+.LBE85:
+.LBE84:
 	.loc 1 830 0
-	add	r7, r7, #256
+	adds	r7, r7, #248
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	mov	sp, r7
@@ -1085,10 +1085,10 @@ spl_load_simple_fit:
 .LVL140:
 .L93:
 	.cfi_restore_state
-.LBB97:
 .LBB95:
+.LBB93:
 	.loc 1 607 0
-	add	r3, r7, #44
+	add	r3, r7, #36
 	ldr	r1, [r7, #28]
 	mov	r0, r6
 .LVL141:
@@ -1099,7 +1099,7 @@ spl_load_simple_fit:
 	cmp	r0, #0
 	beq	.L95
 	.loc 1 614 0
-	ldr	r1, .L157+8
+	ldr	r1, .L155+8
 	bl	fdt_path_offset
 .LVL143:
 	.loc 1 615 0
@@ -1117,9 +1117,9 @@ spl_load_simple_fit:
 	subs	r1, r0, #0
 	bgt	.L96
 	.loc 1 633 0
-	ldr	r0, .L157+12
+	ldr	r0, .L155+12
 .LVL146:
-	b	.L156
+	b	.L154
 .LVL147:
 .L96:
 	.loc 1 637 0
@@ -1132,7 +1132,7 @@ spl_load_simple_fit:
 	cbz	r0, .L98
 	.loc 1 639 0
 	mov	r1, r0
-	ldr	r0, .L157+16
+	ldr	r0, .L155+16
 .LVL150:
 	bl	printf
 .LVL151:
@@ -1140,12 +1140,12 @@ spl_load_simple_fit:
 	b	.L92
 .L98:
 	.loc 1 642 0
-	ldr	r0, .L157+20
+	ldr	r0, .L155+20
 	bl	printf
 .LVL152:
 	.loc 1 670 0
 	mov	r3, r8
-	ldr	r2, .L157+24
+	ldr	r2, .L155+24
 	mov	r1, r10
 	mov	r0, r5
 	bl	spl_fit_get_image_node
@@ -1154,11 +1154,11 @@ spl_load_simple_fit:
 	subs	fp, r0, #0
 	ble	.L99
 	.loc 1 674 0
-	add	r3, r7, #100
+	add	r3, r7, #92
 	str	fp, [sp]
 	str	r3, [sp, #4]
 	mov	r2, r5
-	ldr	r3, [r7, #44]
+	ldr	r3, [r7, #36]
 	mov	r0, r6
 .LVL154:
 	ldr	r1, [r7, #28]
@@ -1167,29 +1167,32 @@ spl_load_simple_fit:
 	.loc 1 676 0
 	cbnz	r0, .L101
 	.loc 1 677 0
-	ldr	r3, [r7, #112]
+	ldr	r3, [r7, #104]
+	.loc 1 680 0
+	movs	r0, #0
+.LVL156:
+	.loc 1 677 0
 	adds	r3, r3, #1
 	.loc 1 678 0
 	itt	eq
-	ldreq	r3, [r7, #108]
-	streq	r3, [r7, #112]
+	ldreq	r3, [r7, #100]
+	streq	r3, [r7, #104]
 	.loc 1 680 0
-	ldr	r0, [r7, #112]
-.LVL156:
+	ldr	r1, [r7, #104]
 	bl	spl_fit_standalone_release
 .LVL157:
 	.loc 1 681 0
 	mov	r1, r0
 	cbz	r0, .L101
 	.loc 1 682 0
-	ldr	r0, .L157+28
+	ldr	r0, .L155+28
 .LVL158:
 	bl	printf
 .LVL159:
 .L101:
 	.loc 1 697 0
 	movs	r3, #0
-	ldr	r2, .L157+32
+	ldr	r2, .L155+32
 	mov	r1, r10
 	mov	r0, r5
 	bl	spl_fit_get_image_node
@@ -1199,7 +1202,7 @@ spl_load_simple_fit:
 	bge	.L104
 	.loc 1 705 0
 	movs	r3, #0
-	ldr	r2, .L157+36
+	ldr	r2, .L155+36
 	mov	r1, r10
 	mov	r0, r5
 .LVL161:
@@ -1224,7 +1227,7 @@ spl_load_simple_fit:
 	str	fp, [sp]
 	mov	r0, r6
 .LVL165:
-	ldr	r3, [r7, #44]
+	ldr	r3, [r7, #36]
 	ldr	r1, [r7, #28]
 	bl	spl_load_fit_image
 .LVL166:
@@ -1232,8 +1235,8 @@ spl_load_simple_fit:
 	cmp	r0, #0
 	bne	.L92
 .LVL167:
-.LBB88:
-.LBB89:
+.LBB86:
+.LBB87:
 	.loc 1 399 0
 	adds	r2, r4, #4
 .LVL168:
@@ -1242,8 +1245,8 @@ spl_load_simple_fit:
 .LVL169:
 	bl	fit_image_get_os
 .LVL170:
-.LBE89:
-.LBE88:
+.LBE87:
+.LBE86:
 	.loc 1 728 0
 	cbz	r0, .L105
 	.loc 1 732 0
@@ -1255,7 +1258,7 @@ spl_load_simple_fit:
 	cmp	r3, #17
 	bne	.L113
 	.loc 1 740 0
-	ldr	r3, [r7, #44]
+	ldr	r3, [r7, #36]
 	mov	r1, r6
 	str	r10, [sp]
 	mov	r0, r4
@@ -1265,13 +1268,13 @@ spl_load_simple_fit:
 	bl	spl_fit_append_fdt
 .LVL171:
 .L113:
-.LBB90:
+.LBB88:
 	.loc 1 745 0
 	movs	r3, #0
 	.loc 1 747 0
-	ldr	r2, .L157+36
+	ldr	r2, .L155+36
 	.loc 1 745 0
-	strb	r3, [r7, #40]
+	strb	r3, [r7, #32]
 	.loc 1 747 0
 	mov	r1, r10
 	mov	r3, r8
@@ -1282,10 +1285,10 @@ spl_load_simple_fit:
 	subs	r3, r0, #0
 	blt	.L107
 .LVL173:
-.LBB91:
-.LBB92:
+.LBB89:
+.LBB90:
 	.loc 1 399 0
-	add	r2, r7, #40
+	add	r2, r7, #32
 .LVL174:
 	mov	r1, r3
 	mov	r0, r5
@@ -1293,23 +1296,23 @@ spl_load_simple_fit:
 	str	r3, [r7, #24]
 	bl	fit_image_get_os
 .LVL176:
-.LBE92:
-.LBE91:
+.LBE90:
+.LBE89:
 	.loc 1 755 0
 	ldr	r2, [r4, #28]
 	ldr	r3, [r7, #24]
 	cmp	r2, #2
 	bne	.L108
-	ldrb	r2, [r7, #40]	@ zero_extendqisi2
+	ldrb	r2, [r7, #32]	@ zero_extendqisi2
 	cmp	r2, #17
 	beq	.L116
 .L108:
 	.loc 1 759 0
-	add	fp, r7, #100
+	add	fp, r7, #92
 	mov	r2, r5
 	stm	sp, {r3, fp}
 	mov	r0, r6
-	ldr	r3, [r7, #44]
+	ldr	r3, [r7, #36]
 	ldr	r1, [r7, #28]
 	bl	spl_load_fit_image
 .LVL177:
@@ -1317,11 +1320,11 @@ spl_load_simple_fit:
 	cmp	r0, #0
 	blt	.L116
 	.loc 1 764 0
-	ldrb	r3, [r7, #40]	@ zero_extendqisi2
+	ldrb	r3, [r7, #32]	@ zero_extendqisi2
 	cmp	r3, #17
 	bne	.L110
 	.loc 1 765 0
-	ldr	r3, [r7, #44]
+	ldr	r3, [r7, #36]
 	mov	r1, r6
 	str	r10, [sp]
 	mov	r0, fp
@@ -1332,7 +1335,7 @@ spl_load_simple_fit:
 	bl	spl_fit_append_fdt
 .LVL179:
 	.loc 1 767 0
-	ldr	r3, [r7, #120]
+	ldr	r3, [r7, #112]
 	str	r3, [r4, #20]
 .L110:
 	.loc 1 774 0
@@ -1340,7 +1343,7 @@ spl_load_simple_fit:
 	adds	r3, r3, #1
 	bne	.L111
 	.loc 1 775 0
-	ldr	r3, [r7, #112]
+	ldr	r3, [r7, #104]
 	.loc 1 774 0
 	adds	r2, r3, #1
 	.loc 1 776 0
@@ -1354,13 +1357,13 @@ spl_load_simple_fit:
 	cmp	r3, #0
 	beq	.L116
 .LVL181:
-.LBB93:
-.LBB94:
+.LBB91:
+.LBB92:
 	.loc 1 379 0
-	add	r3, r7, #56
+	add	r3, r7, #48
 .LVL182:
 	mov	r2, r8
-	ldr	r1, .L157+36
+	ldr	r1, .L155+36
 	mov	r0, r5
 	bl	spl_fit_get_image_name.isra.0
 .LVL183:
@@ -1369,30 +1372,30 @@ spl_load_simple_fit:
 	blt	.L116
 	.loc 1 384 0
 	mov	r3, r8
-	ldr	r2, .L157+36
+	ldr	r2, .L155+36
 	mov	r1, r10
 	mov	r0, r5
 .LVL184:
 	bl	spl_fit_get_image_node
 .LVL185:
 	.loc 1 386 0
-	ldr	r3, [r7, #56]
+	ldr	r3, [r7, #48]
 	.loc 1 388 0
 	mov	r1, r0
 	.loc 1 384 0
 	mov	fp, r0
 .LVL186:
 	.loc 1 388 0
-	ldr	r2, .L157+40
+	ldr	r2, .L155+40
 	mov	r0, r5
 .LVL187:
 	.loc 1 386 0
 	str	r3, [r7, #20]
-	ldr	r3, [r7, #108]
+	ldr	r3, [r7, #100]
 	str	r3, [r7, #16]
-	ldr	r3, [r7, #132]
+	ldr	r3, [r7, #124]
 	str	r3, [r7, #12]
-	ldr	r3, [r7, #112]
+	ldr	r3, [r7, #104]
 	str	r3, [r7, #8]
 	.loc 1 388 0
 	movs	r3, #0
@@ -1403,7 +1406,7 @@ spl_load_simple_fit:
 	.loc 1 388 0
 	str	r0, [r7, #4]
 	.loc 1 389 0
-	ldr	r2, .L157+44
+	ldr	r2, .L155+44
 	mov	r1, fp
 	mov	r0, r5
 	bl	fdt_getprop
@@ -1423,9 +1426,9 @@ spl_load_simple_fit:
 	bl	fdt_record_loadable
 .LVL190:
 .L116:
-.LBE94:
-.LBE93:
-.LBE90:
+.LBE92:
+.LBE91:
+.LBE88:
 	.loc 1 744 0
 	add	r8, r8, #1
 .LVL191:
@@ -1442,17 +1445,17 @@ spl_load_simple_fit:
 	str	r3, [r4, #12]
 .L115:
 .LVL193:
+.LBE93:
 .LBE95:
-.LBE97:
-.LBB98:
-.LBB99:
+.LBB96:
+.LBB97:
 	.loc 1 477 0
-	ldr	r3, .L157+48
+	ldr	r3, .L155+48
 	.loc 1 467 0
 	str	sp, [r7, #20]
 	.loc 1 477 0
 	ldm	r3, {r0, r1, r2}
-	add	r3, r7, #44
+	add	r3, r7, #36
 	stm	r3, {r0, r1, r2}
 .LVL194:
 	.loc 1 479 0
@@ -1468,7 +1471,7 @@ spl_load_simple_fit:
 .LVL196:
 	.loc 1 486 0
 	cmp	r3, #2
-	bne	.L129
+	bne	.L127
 .LVL197:
 	.loc 1 493 0
 	mov	r1, r6
@@ -1476,7 +1479,7 @@ spl_load_simple_fit:
 	bl	spl_kernel_partition
 .LVL198:
 	.loc 1 494 0
-	add	r2, r7, #100
+	add	r2, r7, #92
 	mov	r1, r0
 	ldr	r0, [r6]
 .LVL199:
@@ -1485,34 +1488,34 @@ spl_load_simple_fit:
 	cmp	r0, #0
 	bgt	.L117
 	.loc 1 495 0
-	ldr	r1, .L157+52
-	ldr	r0, .L157+56
+	ldr	r1, .L155+52
+	ldr	r0, .L155+56
 .LVL201:
-.L154:
+.L152:
 	.loc 1 508 0
 	bl	printf
 .LVL202:
-.L155:
+.L153:
 	.loc 1 509 0
 	mvn	r3, #21
 .L118:
-.LBE99:
-.LBE98:
+.LBE97:
+.LBE96:
 	.loc 1 825 0
 	mov	r0, r3
-.LBB105:
-.LBB103:
+.LBB102:
+.LBB100:
 	ldr	sp, [r7, #20]
 .LVL203:
-.LBE103:
-.LBE105:
+.LBE100:
+.LBE102:
 	b	.L92
 .LVL204:
 .L117:
-.LBB106:
-.LBB104:
+.LBB103:
+.LBB101:
 	.loc 1 498 0
-	ldr	r3, [r7, #100]
+	ldr	r3, [r7, #92]
 	.loc 1 502 0
 	movs	r2, #1
 	ldr	r5, [r6, #16]
@@ -1527,7 +1530,7 @@ spl_load_simple_fit:
 	blx	r5
 .LVL207:
 	cmp	r0, #1
-	bne	.L131
+	bne	.L129
 .LVL208:
 	ldr	r3, [r8]
 	.loc 1 507 0
@@ -1537,13 +1540,13 @@ spl_load_simple_fit:
 	cmp	r3, r2
 	beq	.L119
 	.loc 1 508 0
-	ldr	r1, .L157+52
-	ldr	r0, .L157+60
-	b	.L154
+	ldr	r1, .L155+52
+	ldr	r0, .L155+60
+	b	.L152
 .L119:
 	.loc 1 512 0
 	mov	r2, r8
-	add	r3, r7, #40
+	add	r3, r7, #32
 	ldr	r1, [r7, #28]
 	mov	r0, r6
 	bl	spl_fit_load_blob
@@ -1552,7 +1555,7 @@ spl_load_simple_fit:
 	mov	r8, r0
 .LVL211:
 	cmp	r0, #0
-	beq	.L132
+	beq	.L130
 	.loc 1 522 0
 	movs	r1, #0
 	bl	fit_conf_get_node
@@ -1561,11 +1564,11 @@ spl_load_simple_fit:
 	subs	r1, r0, #0
 	bgt	.L120
 	.loc 1 524 0
-	ldr	r0, .L157+12
+	ldr	r0, .L155+12
 .LVL213:
 	bl	printf
 .LVL214:
-	b	.L155
+	b	.L153
 .LVL215:
 .L120:
 	.loc 1 528 0
@@ -1579,15 +1582,15 @@ spl_load_simple_fit:
 	mov	r1, r0
 	str	r0, [r7, #28]
 .LVL218:
-	ldr	r0, .L157+16
+	ldr	r0, .L155+16
 .LVL219:
 	bl	printf
 .LVL220:
 	ldr	r3, [r7, #28]
 	b	.L118
-.L158:
+.L156:
 	.align	2
-.L157:
+.L155:
 	.word	-804389139
 	.word	.LC15
 	.word	.LC16
@@ -1608,26 +1611,26 @@ spl_load_simple_fit:
 .L121:
 	str	r0, [r7, #16]
 	.loc 1 533 0
-	ldr	r0, .L159
+	ldr	r0, .L157
 .LVL222:
 	bl	printf
 .LVL223:
 	.loc 1 535 0
-	ldr	r1, .L159+4
+	ldr	r1, .L157+4
 	mov	r0, r8
 	bl	fdt_path_offset
 .LVL224:
 	.loc 1 536 0
 	subs	r3, r0, #0
 	str	r3, [r7, #24]
-	blt	.L133
+	blt	.L131
 	ldr	r3, [r7, #16]
 	mov	r5, r3
 .LVL225:
-.L128:
-.LBB100:
+.L126:
+.LBB98:
 	.loc 1 543 0
-	add	r3, r7, #44
+	add	r3, r7, #36
 	ldr	r1, [r7, #24]
 	ldr	r10, [r3, r5, lsl #2]
 	mov	r0, r8
@@ -1639,7 +1642,7 @@ spl_load_simple_fit:
 	cmp	r0, #0
 	blt	.L123
 	.loc 1 553 0
-	add	r3, r7, #56
+	add	r3, r7, #48
 	.loc 1 546 0
 	ldr	fp, [r6]
 	.loc 1 553 0
@@ -1647,7 +1650,7 @@ spl_load_simple_fit:
 	stm	sp, {r0, r3}
 	mov	r0, r6
 .LVL227:
-	ldr	r3, [r7, #40]
+	ldr	r3, [r7, #32]
 	ldr	r1, [r7, #28]
 	bl	spl_load_fit_image
 .LVL228:
@@ -1656,125 +1659,106 @@ spl_load_simple_fit:
 	cmp	r0, #0
 	bne	.L118
 	.loc 1 559 0
-	ldr	r1, .L159+8
+	ldr	r1, .L157+8
 	mov	r0, r10
 .LVL229:
 	bl	strcmp
 .LVL230:
 	cbnz	r0, .L124
-.LBB101:
-	.loc 1 560 0
-	ldr	r3, [r7, #64]
-	.loc 1 564 0
-	add	r2, r7, #36
-	.loc 1 562 0
-	strh	r0, [r7, #36]	@ movhi
-	strb	r0, [r7, #38]
-	.loc 1 560 0
-	str	r3, [r4, #20]
-	.loc 1 564 0
-	ldr	r1, .L159+12
-	ldr	r0, [r6]
-	bl	spl_get_current_slot
-.LVL231:
-	cbnz	r0, .L125
-	.loc 1 565 0
-	add	r1, r7, #36
-	ldr	r0, [r7, #64]
-	bl	fdt_bootargs_append_ab
-.LVL232:
-.L125:
 	.loc 1 569 0
 	ldr	r3, [fp, #4]
+	.loc 1 560 0
+	ldr	r10, [r7, #56]
+	.loc 1 569 0
 	cmp	r3, #1
+	.loc 1 560 0
+	str	r10, [r4, #20]
+	.loc 1 569 0
 	bne	.L123
 	.loc 1 570 0
-	ldr	r10, [r7, #64]
 	mov	r0, fp
 	bl	mtd_part_parse
-.LVL233:
+.LVL231:
 	mov	r1, r0
 	mov	r0, r10
 	bl	fdt_bootargs_append
-.LVL234:
+.LVL232:
 .L123:
-.LBE101:
-.LBE100:
+.LBE98:
 	.loc 1 542 0
 	adds	r5, r5, #1
-.LVL235:
+.LVL233:
 	cmp	r5, #3
-	bne	.L128
-.LVL236:
-.L129:
+	bne	.L126
+.LVL234:
+.L127:
 	.loc 1 592 0
 	movs	r3, #0
 	b	.L118
-.LVL237:
+.LVL235:
 .L124:
-.LBB102:
+.LBB99:
 	.loc 1 572 0
-	ldr	r1, .L159+16
+	ldr	r1, .L157+12
 	mov	r0, r10
 	bl	strcmp
-.LVL238:
+.LVL236:
 	cmp	r0, #0
 	bne	.L123
 	.loc 1 574 0
-	ldr	r3, [r7, #64]
+	ldr	r3, [r7, #56]
 	str	r3, [r4, #16]
 	b	.L123
-.LVL239:
-.L131:
-.LBE102:
+.LVL237:
+.L129:
+.LBE99:
 	.loc 1 504 0
 	mvn	r3, #4
 	b	.L118
-.LVL240:
-.L132:
+.LVL238:
+.L130:
 	.loc 1 515 0
 	mvn	r3, #18
 	b	.L118
-.LVL241:
-.L133:
+.LVL239:
+.L131:
 	.loc 1 536 0
 	ldr	r3, [r7, #24]
 	b	.L118
-.LVL242:
+.LVL240:
 .L95:
-.LBE104:
-.LBE106:
-.LBB107:
-.LBB96:
+.LBE101:
+.LBE103:
+.LBB104:
+.LBB94:
 	.loc 1 610 0
 	mov	r0, #-1
-.LVL243:
+.LVL241:
 	b	.L92
-.L160:
+.L158:
 	.align	2
-.L159:
+.L157:
 	.word	.LC19
 	.word	.LC16
 	.word	.LC0
-	.word	.LC28
 	.word	.LC1
-.LBE96:
-.LBE107:
+.LBE94:
+.LBE104:
 	.cfi_endproc
 .LFE226:
 	.size	spl_load_simple_fit, .-spl_load_simple_fit
 	.section	.rodata
 	.align	2
 	.set	.LANCHOR1,. + 0
-.LC29:
+.LC28:
 	.word	.LC0
 	.word	.LC1
 	.word	.LC2
-	.section	.rodata.__func__.9344,"a",%progbits
+	.section	.rodata.__func__.9395,"a",%progbits
 	.set	.LANCHOR0,. + 0
-	.type	__func__.9344, %object
-	.size	__func__.9344, 20
-__func__.9344:
+	.type	__func__.9395, %object
+	.size	__func__.9395, 20
+__func__.9395:
 	.ascii	"spl_load_kernel_fit\000"
 	.section	.rodata.spl_fit_get_image_name.isra.0.str1.1,"aMS",%progbits,1
 .LC4:
@@ -1828,8 +1812,6 @@ __func__.9344:
 	.ascii	"%s: no partition\012\000"
 .LC27:
 	.ascii	"%s: Not fit magic\012\000"
-.LC28:
-	.ascii	"misc\000"
 	.section	.rodata.str1.1,"aMS",%progbits,1
 .LC0:
 	.ascii	"fdt\000"
@@ -1868,15 +1850,15 @@ __func__.9344:
 	.file 29 "include/stdio.h"
 	.section	.debug_info,"",%progbits
 .Ldebug_info0:
-	.4byte	0x2a03
+	.4byte	0x29b6
 	.2byte	0x4
 	.4byte	.Ldebug_abbrev0
 	.byte	0x4
 	.uleb128 0x1
-	.4byte	.LASF415
+	.4byte	.LASF414
 	.byte	0xc
+	.4byte	.LASF415
 	.4byte	.LASF416
-	.4byte	.LASF417
 	.4byte	.Ldebug_ranges0+0xb0
 	.4byte	0
 	.4byte	.Ldebug_line0
@@ -2460,7 +2442,7 @@ __func__.9344:
 	.uleb128 0x4
 	.4byte	.LASF73
 	.byte	0xc
-	.byte	0xd1
+	.byte	0xdf
 	.4byte	0x4c2
 	.uleb128 0x8
 	.byte	0x4
@@ -4030,7 +4012,7 @@ __func__.9344:
 	.byte	0x4
 	.4byte	0x10b6
 	.uleb128 0x2a
-	.4byte	.LASF343
+	.4byte	.LASF342
 	.byte	0x1
 	.2byte	0x31c
 	.4byte	0x50
@@ -4038,7 +4020,7 @@ __func__.9344:
 	.4byte	.LFE226-.LFB226
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1a03
+	.4byte	0x19c7
 	.uleb128 0x2b
 	.4byte	.LASF326
 	.byte	0x1
@@ -4082,75 +4064,75 @@ __func__.9344:
 	.4byte	0x50
 	.byte	0
 	.uleb128 0x30
-	.4byte	0x1a03
-	.4byte	.LBB86
+	.4byte	0x19c7
+	.4byte	.LBB84
 	.4byte	.Ldebug_ranges0+0x58
 	.byte	0x1
 	.2byte	0x333
-	.4byte	0x1730
+	.4byte	0x173a
 	.uleb128 0x31
-	.4byte	0x1a38
+	.4byte	0x19fc
 	.4byte	.LLST69
 	.uleb128 0x31
-	.4byte	0x1a2c
+	.4byte	0x19f0
 	.4byte	.LLST70
 	.uleb128 0x31
-	.4byte	0x1a20
+	.4byte	0x19e4
 	.4byte	.LLST71
 	.uleb128 0x31
-	.4byte	0x1a14
+	.4byte	0x19d8
 	.4byte	.LLST72
 	.uleb128 0x32
 	.4byte	.Ldebug_ranges0+0x58
 	.uleb128 0x33
-	.4byte	0x1a44
+	.4byte	0x1a08
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -188
 	.uleb128 0x33
-	.4byte	0x1a50
+	.4byte	0x1a14
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -244
 	.uleb128 0x34
-	.4byte	0x1a5c
+	.4byte	0x1a20
 	.4byte	.LLST73
 	.uleb128 0x34
-	.4byte	0x1a68
+	.4byte	0x1a2c
 	.4byte	.LLST74
 	.uleb128 0x34
-	.4byte	0x1a74
+	.4byte	0x1a38
 	.4byte	.LLST75
 	.uleb128 0x34
-	.4byte	0x1a80
+	.4byte	0x1a44
 	.4byte	.LLST76
 	.uleb128 0x34
-	.4byte	0x1a8c
+	.4byte	0x1a50
 	.4byte	.LLST77
 	.uleb128 0x34
-	.4byte	0x1aa5
+	.4byte	0x1a69
 	.4byte	.LLST78
 	.uleb128 0x35
-	.4byte	0x1a98
+	.4byte	0x1a5c
 	.uleb128 0x36
-	.4byte	0x1d5f
-	.4byte	.LBB88
-	.4byte	.LBE88-.LBB88
+	.4byte	0x1d12
+	.4byte	.LBB86
+	.4byte	.LBE86-.LBB86
 	.byte	0x1
 	.2byte	0x2d8
 	.4byte	0x131a
 	.uleb128 0x31
-	.4byte	0x1d88
+	.4byte	0x1d3b
 	.4byte	.LLST79
 	.uleb128 0x31
-	.4byte	0x1d7c
+	.4byte	0x1d2f
 	.4byte	.LLST80
 	.uleb128 0x31
-	.4byte	0x1d70
+	.4byte	0x1d23
 	.4byte	.LLST81
 	.uleb128 0x37
 	.4byte	.LVL170
-	.4byte	0x28a7
+	.4byte	0x285a
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -4172,33 +4154,33 @@ __func__.9344:
 	.byte	0
 	.byte	0
 	.uleb128 0x39
-	.4byte	.LBB90
-	.4byte	.LBE90-.LBB90
+	.4byte	.LBB88
+	.4byte	.LBE88-.LBB88
 	.4byte	0x154f
 	.uleb128 0x33
-	.4byte	0x1ab2
+	.4byte	0x1a76
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -248
 	.uleb128 0x36
-	.4byte	0x1d5f
-	.4byte	.LBB91
-	.4byte	.LBE91-.LBB91
+	.4byte	0x1d12
+	.4byte	.LBB89
+	.4byte	.LBE89-.LBB89
 	.byte	0x1
 	.2byte	0x2ef
 	.4byte	0x137f
 	.uleb128 0x31
-	.4byte	0x1d88
+	.4byte	0x1d3b
 	.4byte	.LLST82
 	.uleb128 0x31
-	.4byte	0x1d7c
+	.4byte	0x1d2f
 	.4byte	.LLST83
 	.uleb128 0x31
-	.4byte	0x1d70
+	.4byte	0x1d23
 	.4byte	.LLST84
 	.uleb128 0x37
 	.4byte	.LVL176
-	.4byte	0x28a7
+	.4byte	0x285a
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -4217,47 +4199,47 @@ __func__.9344:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0x7d
-	.sleb128 112
+	.sleb128 104
 	.byte	0
 	.byte	0
 	.uleb128 0x36
-	.4byte	0x1d94
-	.4byte	.LBB93
-	.4byte	.LBE93-.LBB93
+	.4byte	0x1d47
+	.4byte	.LBB91
+	.4byte	.LBE91-.LBB91
 	.byte	0x1
 	.2byte	0x30c
 	.4byte	0x14c8
 	.uleb128 0x31
-	.4byte	0x1dd5
+	.4byte	0x1d88
 	.4byte	.LLST85
 	.uleb128 0x31
-	.4byte	0x1dc9
+	.4byte	0x1d7c
 	.4byte	.LLST86
 	.uleb128 0x31
-	.4byte	0x1dbd
+	.4byte	0x1d70
 	.4byte	.LLST87
 	.uleb128 0x3a
-	.4byte	0x1db1
+	.4byte	0x1d64
 	.uleb128 0x31
-	.4byte	0x1da5
+	.4byte	0x1d58
 	.4byte	.LLST88
 	.uleb128 0x3b
-	.4byte	.LBB94
-	.4byte	.LBE94-.LBB94
+	.4byte	.LBB92
+	.4byte	.LBE92-.LBB92
 	.uleb128 0x34
-	.4byte	0x1de1
+	.4byte	0x1d94
 	.4byte	.LLST89
 	.uleb128 0x33
-	.4byte	0x1ded
+	.4byte	0x1da0
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -232
 	.uleb128 0x34
-	.4byte	0x1df9
+	.4byte	0x1dac
 	.4byte	.LLST90
 	.uleb128 0x3c
 	.4byte	.LVL183
-	.4byte	0x2729
+	.4byte	0x26dc
 	.4byte	0x140a
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4282,11 +4264,11 @@ __func__.9344:
 	.byte	0x53
 	.uleb128 0x3
 	.byte	0x7d
-	.sleb128 128
+	.sleb128 120
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL185
-	.4byte	0x2470
+	.4byte	0x2423
 	.4byte	0x1433
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4315,7 +4297,7 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL188
-	.4byte	0x28b3
+	.4byte	0x2866
 	.4byte	0x145b
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4343,7 +4325,7 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL189
-	.4byte	0x28b3
+	.4byte	0x2866
 	.4byte	0x1483
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4371,7 +4353,7 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x37
 	.4byte	.LVL190
-	.4byte	0x28bf
+	.4byte	0x2872
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -4428,7 +4410,7 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL172
-	.4byte	0x2470
+	.4byte	0x2423
 	.4byte	0x14f1
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4457,7 +4439,7 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL177
-	.4byte	0x1f38
+	.4byte	0x1eeb
 	.4byte	0x1523
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4496,7 +4478,7 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x37
 	.4byte	.LVL179
-	.4byte	0x1e06
+	.4byte	0x1db9
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -4533,10 +4515,10 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x3d
 	.4byte	.LVL138
-	.4byte	0x28ca
+	.4byte	0x287d
 	.uleb128 0x3c
 	.4byte	.LVL142
-	.4byte	0x1c3f
+	.4byte	0x1be5
 	.4byte	0x1582
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4563,11 +4545,11 @@ __func__.9344:
 	.byte	0x53
 	.uleb128 0x3
 	.byte	0x7d
-	.sleb128 116
+	.sleb128 108
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL143
-	.4byte	0x28d5
+	.4byte	0x2888
 	.4byte	0x159f
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4584,10 +4566,10 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x3d
 	.4byte	.LVL144
-	.4byte	0x28e1
+	.4byte	0x2894
 	.uleb128 0x3c
 	.4byte	.LVL145
-	.4byte	0x28ed
+	.4byte	0x28a0
 	.4byte	0x15c1
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4603,7 +4585,7 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL149
-	.4byte	0x267f
+	.4byte	0x2632
 	.4byte	0x15d5
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4614,7 +4596,7 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL151
-	.4byte	0x28ca
+	.4byte	0x287d
 	.4byte	0x15f2
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4631,7 +4613,7 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL152
-	.4byte	0x28ca
+	.4byte	0x287d
 	.4byte	0x1609
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4642,7 +4624,7 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL153
-	.4byte	0x2470
+	.4byte	0x2423
 	.4byte	0x1632
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4671,7 +4653,7 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL155
-	.4byte	0x1f38
+	.4byte	0x1eeb
 	.4byte	0x1663
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4705,15 +4687,22 @@ __func__.9344:
 	.sleb128 4
 	.uleb128 0x3
 	.byte	0x7d
-	.sleb128 172
+	.sleb128 164
 	.byte	0
-	.uleb128 0x3d
+	.uleb128 0x3c
 	.4byte	.LVL157
-	.4byte	0x1d34
+	.4byte	0x1cda
+	.4byte	0x1676
+	.uleb128 0x38
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL159
-	.4byte	0x28ca
-	.4byte	0x1683
+	.4byte	0x287d
+	.4byte	0x168d
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -4723,8 +4712,8 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL160
-	.4byte	0x2470
-	.4byte	0x16ab
+	.4byte	0x2423
+	.4byte	0x16b5
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -4751,8 +4740,8 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL162
-	.4byte	0x2470
-	.4byte	0x16d3
+	.4byte	0x2423
+	.4byte	0x16dd
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -4779,8 +4768,8 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL166
-	.4byte	0x1f38
-	.4byte	0x1703
+	.4byte	0x1eeb
+	.4byte	0x170d
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -4817,7 +4806,7 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x37
 	.4byte	.LVL171
-	.4byte	0x1e06
+	.4byte	0x1db9
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -4854,138 +4843,79 @@ __func__.9344:
 	.byte	0
 	.byte	0
 	.uleb128 0x30
-	.4byte	0x1ad5
-	.4byte	.LBB98
+	.4byte	0x1a99
+	.4byte	.LBB96
 	.4byte	.Ldebug_ranges0+0x78
 	.byte	0x1
 	.2byte	0x337
-	.4byte	0x19f9
+	.4byte	0x19bd
 	.uleb128 0x31
-	.4byte	0x1af2
+	.4byte	0x1ab6
 	.4byte	.LLST91
 	.uleb128 0x31
-	.4byte	0x1ae6
+	.4byte	0x1aaa
 	.4byte	.LLST92
 	.uleb128 0x32
 	.4byte	.Ldebug_ranges0+0x78
 	.uleb128 0x33
-	.4byte	0x1afe
+	.4byte	0x1ac2
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -244
 	.uleb128 0x33
-	.4byte	0x1b0a
+	.4byte	0x1ace
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -232
 	.uleb128 0x3e
-	.4byte	0x1b16
-	.4byte	0x2894
+	.4byte	0x1ada
+	.4byte	0x2847
 	.4byte	.LLST94
 	.uleb128 0x34
-	.4byte	0x1b22
+	.4byte	0x1ae6
 	.4byte	.LLST95
 	.uleb128 0x33
-	.4byte	0x1b2e
+	.4byte	0x1af2
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -248
 	.uleb128 0x34
-	.4byte	0x1b3a
+	.4byte	0x1afe
 	.4byte	.LLST96
 	.uleb128 0x34
-	.4byte	0x1b46
+	.4byte	0x1b0a
 	.4byte	.LLST97
 	.uleb128 0x34
-	.4byte	0x1b52
+	.4byte	0x1b16
 	.4byte	.LLST98
 	.uleb128 0x34
-	.4byte	0x1b5e
+	.4byte	0x1b22
 	.4byte	.LLST99
 	.uleb128 0x34
-	.4byte	0x1b68
+	.4byte	0x1b2c
 	.4byte	.LLST100
 	.uleb128 0x34
-	.4byte	0x1b74
+	.4byte	0x1b38
 	.4byte	.LLST101
 	.uleb128 0x33
-	.4byte	0x1b80
+	.4byte	0x1b44
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -188
 	.uleb128 0x34
-	.4byte	0x1b99
+	.4byte	0x1b5d
 	.4byte	.LLST102
 	.uleb128 0x35
-	.4byte	0x1b8c
+	.4byte	0x1b50
 	.uleb128 0x3f
 	.4byte	.Ldebug_ranges0+0x98
-	.4byte	0x18dd
+	.4byte	0x18a1
 	.uleb128 0x35
-	.4byte	0x1ba6
-	.uleb128 0x39
-	.4byte	.LBB101
-	.4byte	.LBE101-.LBB101
-	.4byte	0x1855
-	.uleb128 0x33
-	.4byte	0x1bb3
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -252
-	.uleb128 0x3c
-	.4byte	.LVL231
-	.4byte	0x2613
-	.4byte	0x181b
-	.uleb128 0x38
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC28
-	.uleb128 0x38
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0x77
-	.sleb128 92
-	.byte	0
-	.uleb128 0x3c
-	.4byte	.LVL232
-	.4byte	0x25ed
-	.4byte	0x1830
-	.uleb128 0x38
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x77
-	.sleb128 92
-	.byte	0
-	.uleb128 0x3c
-	.4byte	.LVL233
-	.4byte	0x2656
-	.4byte	0x1844
-	.uleb128 0x38
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.byte	0
-	.uleb128 0x37
-	.4byte	.LVL234
-	.4byte	0x25c6
-	.uleb128 0x38
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.byte	0
-	.byte	0
+	.4byte	0x1b6a
 	.uleb128 0x3c
 	.4byte	.LVL226
-	.4byte	0x2470
-	.4byte	0x187c
+	.4byte	0x2423
+	.4byte	0x1818
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -5013,8 +4943,8 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL228
-	.4byte	0x1f38
-	.4byte	0x18a6
+	.4byte	0x1eeb
+	.4byte	0x1842
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -5040,12 +4970,12 @@ __func__.9344:
 	.sleb128 4
 	.uleb128 0x3
 	.byte	0x77
-	.sleb128 112
+	.sleb128 104
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL230
-	.4byte	0x28f9
-	.4byte	0x18c3
+	.4byte	0x28ac
+	.4byte	0x185f
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -5059,9 +4989,31 @@ __func__.9344:
 	.byte	0x3
 	.4byte	.LC0
 	.byte	0
+	.uleb128 0x3c
+	.4byte	.LVL231
+	.4byte	0x2609
+	.4byte	0x1873
+	.uleb128 0x38
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x3c
+	.4byte	.LVL232
+	.4byte	0x2579
+	.4byte	0x1887
+	.uleb128 0x38
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.byte	0
 	.uleb128 0x37
-	.4byte	.LVL238
-	.4byte	0x28f9
+	.4byte	.LVL236
+	.4byte	0x28ac
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -5078,8 +5030,8 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL198
-	.4byte	0x1c06
-	.4byte	0x18f7
+	.4byte	0x1bac
+	.4byte	0x18bb
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -5095,24 +5047,24 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL200
-	.4byte	0x2904
-	.4byte	0x190c
+	.4byte	0x28b7
+	.4byte	0x18d0
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0x77
-	.sleb128 156
+	.sleb128 148
 	.byte	0
 	.uleb128 0x3d
 	.4byte	.LVL202
-	.4byte	0x28ca
+	.4byte	0x287d
 	.uleb128 0x40
 	.4byte	.LVL207
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.4byte	0x193b
+	.4byte	0x18ff
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -5140,8 +5092,8 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL210
-	.4byte	0x1c3f
-	.4byte	0x1964
+	.4byte	0x1be5
+	.4byte	0x1928
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -5166,12 +5118,12 @@ __func__.9344:
 	.byte	0x53
 	.uleb128 0x3
 	.byte	0x77
-	.sleb128 96
+	.sleb128 88
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL212
-	.4byte	0x28ed
-	.4byte	0x197d
+	.4byte	0x28a0
+	.4byte	0x1941
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -5186,8 +5138,8 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL214
-	.4byte	0x28ca
-	.4byte	0x1994
+	.4byte	0x287d
+	.4byte	0x1958
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -5197,8 +5149,8 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL217
-	.4byte	0x267f
-	.4byte	0x19a8
+	.4byte	0x2632
+	.4byte	0x196c
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -5208,8 +5160,8 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL220
-	.4byte	0x28ca
-	.4byte	0x19c7
+	.4byte	0x287d
+	.4byte	0x198b
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -5226,8 +5178,8 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL223
-	.4byte	0x28ca
-	.4byte	0x19de
+	.4byte	0x287d
+	.4byte	0x19a2
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -5237,7 +5189,7 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x37
 	.4byte	.LVL224
-	.4byte	0x28d5
+	.4byte	0x2888
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -5263,7 +5215,7 @@ __func__.9344:
 	.2byte	0x254
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x1ac0
+	.4byte	0x1a84
 	.uleb128 0x43
 	.4byte	.LASF326
 	.byte	0x1
@@ -5321,7 +5273,7 @@ __func__.9344:
 	.4byte	0x153
 	.uleb128 0x46
 	.4byte	.LASF333
-	.4byte	0x1ad0
+	.4byte	0x1a94
 	.4byte	.LASF336
 	.uleb128 0x44
 	.4byte	.LASF334
@@ -5338,20 +5290,20 @@ __func__.9344:
 	.byte	0
 	.uleb128 0xc
 	.4byte	0xe4
-	.4byte	0x1ad0
+	.4byte	0x1a94
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x1c
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x1ac0
+	.4byte	0x1a84
 	.uleb128 0x42
 	.4byte	.LASF337
 	.byte	0x1
 	.2byte	0x1d1
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x1bc2
+	.4byte	0x1b78
 	.uleb128 0x43
 	.4byte	.LASF326
 	.byte	0x1
@@ -5366,7 +5318,7 @@ __func__.9344:
 	.4byte	.LASF259
 	.byte	0x1
 	.2byte	0x1dd
-	.4byte	0x1bc2
+	.4byte	0x1b78
 	.uleb128 0x44
 	.4byte	.LASF224
 	.byte	0x1
@@ -5376,7 +5328,7 @@ __func__.9344:
 	.4byte	.LASF330
 	.byte	0x1
 	.2byte	0x1df
-	.4byte	0x1bd2
+	.4byte	0x1b88
 	.uleb128 0x44
 	.4byte	.LASF338
 	.byte	0x1
@@ -5424,7 +5376,7 @@ __func__.9344:
 	.4byte	0x4ac
 	.uleb128 0x46
 	.4byte	.LASF333
-	.4byte	0x1bf1
+	.4byte	0x1ba7
 	.4byte	.LASF337
 	.uleb128 0x44
 	.4byte	.LASF334
@@ -5437,46 +5389,32 @@ __func__.9344:
 	.byte	0x1
 	.2byte	0x222
 	.4byte	0x4d2
-	.uleb128 0x47
-	.uleb128 0x44
-	.4byte	.LASF342
-	.byte	0x1
-	.2byte	0x232
-	.4byte	0x1bf6
-	.byte	0
 	.byte	0
 	.byte	0
 	.uleb128 0xc
 	.4byte	0xd7
-	.4byte	0x1bd2
+	.4byte	0x1b88
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x2
 	.byte	0
 	.uleb128 0xc
 	.4byte	0xdd
-	.4byte	0x1be1
+	.4byte	0x1b97
 	.uleb128 0x48
 	.4byte	0xcb
 	.byte	0
 	.uleb128 0xc
 	.4byte	0xe4
-	.4byte	0x1bf1
+	.4byte	0x1ba7
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x13
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x1be1
-	.uleb128 0xc
-	.4byte	0xdd
-	.4byte	0x1c06
-	.uleb128 0xd
-	.4byte	0xcb
-	.byte	0x2
-	.byte	0
+	.4byte	0x1b97
 	.uleb128 0x2a
-	.4byte	.LASF344
+	.4byte	.LASF343
 	.byte	0x1
 	.2byte	0x1ca
 	.4byte	0xd7
@@ -5484,7 +5422,7 @@ __func__.9344:
 	.4byte	.LFE223-.LFB223
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1c3f
+	.4byte	0x1be5
 	.uleb128 0x2c
 	.ascii	"spl\000"
 	.byte	0x1
@@ -5500,7 +5438,7 @@ __func__.9344:
 	.byte	0x51
 	.byte	0
 	.uleb128 0x4a
-	.4byte	.LASF354
+	.4byte	.LASF353
 	.byte	0x1
 	.2byte	0x198
 	.4byte	0x153
@@ -5508,7 +5446,7 @@ __func__.9344:
 	.4byte	.LFE222-.LFB222
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1d2e
+	.4byte	0x1cd4
 	.uleb128 0x2b
 	.4byte	.LASF327
 	.byte	0x1
@@ -5531,16 +5469,16 @@ __func__.9344:
 	.4byte	.LASF331
 	.byte	0x1
 	.2byte	0x19a
-	.4byte	0x1d2e
+	.4byte	0x1cd4
 	.4byte	.LLST50
 	.uleb128 0x4b
-	.4byte	.LASF345
+	.4byte	.LASF344
 	.byte	0x1
 	.2byte	0x19c
 	.4byte	0x50
 	.byte	0x3f
 	.uleb128 0x2d
-	.4byte	.LASF346
+	.4byte	.LASF345
 	.byte	0x1
 	.2byte	0x19d
 	.4byte	0x122
@@ -5552,7 +5490,7 @@ __func__.9344:
 	.4byte	0x122
 	.4byte	.LLST52
 	.uleb128 0x44
-	.4byte	.LASF347
+	.4byte	.LASF346
 	.byte	0x1
 	.2byte	0x19f
 	.4byte	0x50
@@ -5563,20 +5501,20 @@ __func__.9344:
 	.4byte	0x153
 	.4byte	.LLST53
 	.uleb128 0x36
-	.4byte	0x23f0
-	.4byte	.LBB63
-	.4byte	.LBE63-.LBB63
+	.4byte	0x23a3
+	.4byte	.LBB62
+	.4byte	.LBE62-.LBB62
 	.byte	0x1
 	.2byte	0x1be
-	.4byte	0x1d12
+	.4byte	0x1cb8
 	.uleb128 0x31
-	.4byte	0x2416
+	.4byte	0x23c9
 	.4byte	.LLST54
 	.uleb128 0x31
-	.4byte	0x240b
+	.4byte	0x23be
 	.4byte	.LLST55
 	.uleb128 0x31
-	.4byte	0x2400
+	.4byte	0x23b3
 	.4byte	.LLST56
 	.byte	0
 	.uleb128 0x4c
@@ -5608,7 +5546,7 @@ __func__.9344:
 	.byte	0x4
 	.4byte	0x50
 	.uleb128 0x2a
-	.4byte	.LASF348
+	.4byte	.LASF347
 	.byte	0x1
 	.2byte	0x193
 	.4byte	0x50
@@ -5616,28 +5554,35 @@ __func__.9344:
 	.4byte	.LFE221-.LFB221
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1d5f
-	.uleb128 0x2b
+	.4byte	0x1d12
+	.uleb128 0x2c
+	.ascii	"id\000"
+	.byte	0x1
+	.2byte	0x193
+	.4byte	0xfb
+	.4byte	.LLST61
+	.uleb128 0x49
 	.4byte	.LASF316
 	.byte	0x1
 	.2byte	0x193
 	.4byte	0x101
-	.4byte	.LLST61
+	.uleb128 0x1
+	.byte	0x51
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF349
+	.4byte	.LASF348
 	.byte	0x1
 	.2byte	0x18a
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x1d94
+	.4byte	0x1d47
 	.uleb128 0x4d
 	.ascii	"fit\000"
 	.byte	0x1
 	.2byte	0x18a
 	.4byte	0x3ae
 	.uleb128 0x43
-	.4byte	.LASF350
+	.4byte	.LASF349
 	.byte	0x1
 	.2byte	0x18a
 	.4byte	0x50
@@ -5648,12 +5593,12 @@ __func__.9344:
 	.4byte	0xd48
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF351
+	.4byte	.LASF350
 	.byte	0x1
 	.2byte	0x173
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x1e06
+	.4byte	0x1db9
 	.uleb128 0x4d
 	.ascii	"fit\000"
 	.byte	0x1
@@ -5670,12 +5615,12 @@ __func__.9344:
 	.2byte	0x173
 	.4byte	0x50
 	.uleb128 0x43
-	.4byte	.LASF352
+	.4byte	.LASF351
 	.byte	0x1
 	.2byte	0x174
 	.4byte	0x153
 	.uleb128 0x43
-	.4byte	.LASF353
+	.4byte	.LASF352
 	.byte	0x1
 	.2byte	0x174
 	.4byte	0x11b9
@@ -5696,7 +5641,7 @@ __func__.9344:
 	.4byte	0x50
 	.byte	0
 	.uleb128 0x4e
-	.4byte	.LASF355
+	.4byte	.LASF354
 	.byte	0x1
 	.2byte	0x150
 	.4byte	0x50
@@ -5704,7 +5649,7 @@ __func__.9344:
 	.4byte	.LFE218-.LFB218
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1f23
+	.4byte	0x1ed6
 	.uleb128 0x2b
 	.4byte	.LASF326
 	.byte	0x1
@@ -5763,11 +5708,11 @@ __func__.9344:
 	.4byte	.LLST46
 	.uleb128 0x50
 	.4byte	.LASF333
-	.4byte	0x1f33
+	.4byte	0x1ee6
 	.uleb128 0x3c
 	.4byte	.LVL99
-	.4byte	0x2470
-	.4byte	0x1ee2
+	.4byte	0x2423
+	.4byte	0x1e95
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -5795,8 +5740,8 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL101
-	.4byte	0x1f38
-	.4byte	0x1f11
+	.4byte	0x1eeb
+	.4byte	0x1ec4
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -5832,7 +5777,7 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x37
 	.4byte	.LVL103
-	.4byte	0x290f
+	.4byte	0x28c2
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
@@ -5843,15 +5788,15 @@ __func__.9344:
 	.byte	0
 	.uleb128 0xc
 	.4byte	0xe4
-	.4byte	0x1f33
+	.4byte	0x1ee6
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x12
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x1f23
+	.4byte	0x1ed6
 	.uleb128 0x51
-	.4byte	.LASF356
+	.4byte	.LASF355
 	.byte	0x1
 	.byte	0xbf
 	.4byte	0x50
@@ -5859,7 +5804,7 @@ __func__.9344:
 	.4byte	.LFE217-.LFB217
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x23f0
+	.4byte	0x23a3
 	.uleb128 0x52
 	.4byte	.LASF327
 	.byte	0x1
@@ -5897,7 +5842,7 @@ __func__.9344:
 	.4byte	0x11b9
 	.4byte	.LLST20
 	.uleb128 0x54
-	.4byte	.LASF357
+	.4byte	.LASF356
 	.byte	0x1
 	.byte	0xc3
 	.4byte	0x50
@@ -5905,7 +5850,7 @@ __func__.9344:
 	.byte	0x91
 	.sleb128 -60
 	.uleb128 0x54
-	.4byte	.LASF358
+	.4byte	.LASF357
 	.byte	0x1
 	.byte	0xc4
 	.4byte	0x10c
@@ -5926,7 +5871,7 @@ __func__.9344:
 	.byte	0xc6
 	.4byte	0x122
 	.uleb128 0x54
-	.4byte	.LASF359
+	.4byte	.LASF358
 	.byte	0x1
 	.byte	0xc7
 	.4byte	0x122
@@ -5942,7 +5887,7 @@ __func__.9344:
 	.byte	0x91
 	.sleb128 -44
 	.uleb128 0x57
-	.4byte	.LASF360
+	.4byte	.LASF359
 	.byte	0x1
 	.byte	0xc7
 	.4byte	0x122
@@ -5956,24 +5901,24 @@ __func__.9344:
 	.byte	0x91
 	.sleb128 -40
 	.uleb128 0x57
-	.4byte	.LASF361
+	.4byte	.LASF360
 	.byte	0x1
 	.byte	0xc9
 	.4byte	0x122
 	.4byte	.LLST22
 	.uleb128 0x56
-	.4byte	.LASF362
+	.4byte	.LASF361
 	.byte	0x1
 	.byte	0xca
 	.4byte	0x50
 	.uleb128 0x58
-	.4byte	.LASF345
+	.4byte	.LASF344
 	.byte	0x1
 	.byte	0xcb
 	.4byte	0x50
 	.byte	0x3f
 	.uleb128 0x54
-	.4byte	.LASF363
+	.4byte	.LASF362
 	.byte	0x1
 	.byte	0xcc
 	.4byte	0x12d
@@ -5987,7 +5932,7 @@ __func__.9344:
 	.4byte	0x12d
 	.4byte	.LLST23
 	.uleb128 0x54
-	.4byte	.LASF364
+	.4byte	.LASF363
 	.byte	0x1
 	.byte	0xcd
 	.4byte	0x3ae
@@ -5995,13 +5940,13 @@ __func__.9344:
 	.byte	0x91
 	.sleb128 -36
 	.uleb128 0x57
-	.4byte	.LASF365
+	.4byte	.LASF364
 	.byte	0x1
 	.byte	0xce
 	.4byte	0x18e
 	.4byte	.LLST24
 	.uleb128 0x57
-	.4byte	.LASF366
+	.4byte	.LASF365
 	.byte	0x1
 	.byte	0xcf
 	.4byte	0x18e
@@ -6018,68 +5963,68 @@ __func__.9344:
 	.2byte	0x146
 	.4byte	.L31
 	.uleb128 0x5a
-	.4byte	0x2422
-	.4byte	.LBB37
+	.4byte	0x23d5
+	.4byte	.LBB36
 	.4byte	.Ldebug_ranges0+0
 	.byte	0x1
 	.byte	0xff
-	.4byte	0x20c9
+	.4byte	0x207c
 	.uleb128 0x31
-	.4byte	0x243d
+	.4byte	0x23f0
 	.4byte	.LLST27
 	.uleb128 0x31
-	.4byte	0x2432
+	.4byte	0x23e5
 	.4byte	.LLST28
 	.byte	0
 	.uleb128 0x36
-	.4byte	0x23f0
-	.4byte	.LBB42
-	.4byte	.LBE42-.LBB42
+	.4byte	0x23a3
+	.4byte	.LBB41
+	.4byte	.LBE41-.LBB41
 	.byte	0x1
 	.2byte	0x100
-	.4byte	0x20f5
+	.4byte	0x20a8
 	.uleb128 0x3a
-	.4byte	0x2416
+	.4byte	0x23c9
 	.uleb128 0x31
-	.4byte	0x240b
+	.4byte	0x23be
 	.4byte	.LLST29
 	.uleb128 0x31
-	.4byte	0x2400
+	.4byte	0x23b3
 	.4byte	.LLST30
 	.byte	0
 	.uleb128 0x30
-	.4byte	0x2449
-	.4byte	.LBB44
+	.4byte	0x23fc
+	.4byte	.LBB43
 	.4byte	.Ldebug_ranges0+0x20
 	.byte	0x1
 	.2byte	0x109
-	.4byte	0x211c
+	.4byte	0x20cf
 	.uleb128 0x31
-	.4byte	0x2464
+	.4byte	0x2417
 	.4byte	.LLST31
 	.uleb128 0x31
-	.4byte	0x2459
+	.4byte	0x240c
 	.4byte	.LLST32
 	.byte	0
 	.uleb128 0x30
-	.4byte	0x26b5
-	.4byte	.LBB49
+	.4byte	0x2668
+	.4byte	.LBB48
 	.4byte	.Ldebug_ranges0+0x38
 	.byte	0x1
 	.2byte	0x122
-	.4byte	0x2167
+	.4byte	0x211a
 	.uleb128 0x31
-	.4byte	0x26de
+	.4byte	0x2691
 	.4byte	.LLST33
 	.uleb128 0x31
-	.4byte	0x26d2
+	.4byte	0x2685
 	.4byte	.LLST34
 	.uleb128 0x31
-	.4byte	0x26c6
+	.4byte	0x2679
 	.4byte	.LLST35
 	.uleb128 0x37
 	.4byte	.LVL77
-	.4byte	0x291a
+	.4byte	0x28cd
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6100,29 +6045,29 @@ __func__.9344:
 	.byte	0
 	.byte	0
 	.uleb128 0x36
-	.4byte	0x26b5
-	.4byte	.LBB55
-	.4byte	.LBE55-.LBB55
+	.4byte	0x2668
+	.4byte	.LBB54
+	.4byte	.LBE54-.LBB54
 	.byte	0x1
 	.2byte	0x127
-	.4byte	0x21a0
+	.4byte	0x2153
 	.uleb128 0x31
-	.4byte	0x26de
+	.4byte	0x2691
 	.4byte	.LLST36
 	.uleb128 0x31
-	.4byte	0x26d2
+	.4byte	0x2685
 	.4byte	.LLST37
 	.uleb128 0x31
-	.4byte	0x26c6
+	.4byte	0x2679
 	.4byte	.LLST38
 	.uleb128 0x3d
 	.4byte	.LVL86
-	.4byte	0x291a
+	.4byte	0x28cd
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL45
-	.4byte	0x2926
-	.4byte	0x21c0
+	.4byte	0x28d9
+	.4byte	0x2173
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6144,8 +6089,8 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL46
-	.4byte	0x2932
-	.4byte	0x21e0
+	.4byte	0x28e5
+	.4byte	0x2193
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6167,8 +6112,8 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL47
-	.4byte	0x293e
-	.4byte	0x2200
+	.4byte	0x28f1
+	.4byte	0x21b3
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6190,8 +6135,8 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL48
-	.4byte	0x294a
-	.4byte	0x2220
+	.4byte	0x28fd
+	.4byte	0x21d3
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6213,8 +6158,8 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL49
-	.4byte	0x2956
-	.4byte	0x2240
+	.4byte	0x2909
+	.4byte	0x21f3
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6236,8 +6181,8 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL52
-	.4byte	0x2962
-	.4byte	0x2260
+	.4byte	0x2915
+	.4byte	0x2213
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6259,8 +6204,8 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL54
-	.4byte	0x296e
-	.4byte	0x2274
+	.4byte	0x2921
+	.4byte	0x2227
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6270,8 +6215,8 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL61
-	.4byte	0x297a
-	.4byte	0x228e
+	.4byte	0x292d
+	.4byte	0x2241
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6287,7 +6232,7 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x5b
 	.4byte	.LVL64
-	.4byte	0x22ac
+	.4byte	0x225f
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6310,8 +6255,8 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL65
-	.4byte	0x28ca
-	.4byte	0x22c3
+	.4byte	0x287d
+	.4byte	0x2276
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6321,8 +6266,8 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL66
-	.4byte	0x2986
-	.4byte	0x22e6
+	.4byte	0x2939
+	.4byte	0x2299
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6344,8 +6289,8 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL79
-	.4byte	0x28b3
-	.4byte	0x230e
+	.4byte	0x2866
+	.4byte	0x22c1
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6372,8 +6317,8 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL80
-	.4byte	0x28ca
-	.4byte	0x2331
+	.4byte	0x287d
+	.4byte	0x22e4
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6395,8 +6340,8 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL81
-	.4byte	0x2992
-	.4byte	0x234b
+	.4byte	0x2945
+	.4byte	0x22fe
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6412,8 +6357,8 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL82
-	.4byte	0x299e
-	.4byte	0x237f
+	.4byte	0x2951
+	.4byte	0x2332
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6455,8 +6400,8 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL83
-	.4byte	0x29aa
-	.4byte	0x2396
+	.4byte	0x295d
+	.4byte	0x2349
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6466,11 +6411,11 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x3d
 	.4byte	.LVL84
-	.4byte	0x29b5
+	.4byte	0x2968
 	.uleb128 0x3c
 	.4byte	.LVL87
-	.4byte	0x28ca
-	.4byte	0x23b6
+	.4byte	0x287d
+	.4byte	0x2369
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6480,8 +6425,8 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL91
-	.4byte	0x29c1
-	.4byte	0x23dc
+	.4byte	0x2974
+	.4byte	0x238f
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6509,7 +6454,7 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x37
 	.4byte	.LVL92
-	.4byte	0x29aa
+	.4byte	0x295d
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6519,66 +6464,66 @@ __func__.9344:
 	.byte	0
 	.byte	0
 	.uleb128 0x5c
-	.4byte	.LASF367
+	.4byte	.LASF366
 	.byte	0x1
 	.byte	0xa3
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x2422
+	.4byte	0x23d5
 	.uleb128 0x5d
 	.4byte	.LASF327
 	.byte	0x1
 	.byte	0xa3
 	.4byte	0x11ad
 	.uleb128 0x5d
-	.4byte	.LASF368
+	.4byte	.LASF367
 	.byte	0x1
 	.byte	0xa3
 	.4byte	0x50
 	.uleb128 0x5d
-	.4byte	.LASF357
+	.4byte	.LASF356
 	.byte	0x1
 	.byte	0xa4
 	.4byte	0x50
 	.byte	0
 	.uleb128 0x5c
-	.4byte	.LASF369
+	.4byte	.LASF368
 	.byte	0x1
 	.byte	0x95
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x2449
+	.4byte	0x23fc
 	.uleb128 0x5d
 	.4byte	.LASF327
 	.byte	0x1
 	.byte	0x95
 	.4byte	0x11ad
 	.uleb128 0x5d
-	.4byte	.LASF357
+	.4byte	.LASF356
 	.byte	0x1
 	.byte	0x95
 	.4byte	0x50
 	.byte	0
 	.uleb128 0x5c
-	.4byte	.LASF370
+	.4byte	.LASF369
 	.byte	0x1
 	.byte	0x88
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x2470
+	.4byte	0x2423
 	.uleb128 0x5d
 	.4byte	.LASF327
 	.byte	0x1
 	.byte	0x88
 	.4byte	0x11ad
 	.uleb128 0x5d
-	.4byte	.LASF357
+	.4byte	.LASF356
 	.byte	0x1
 	.byte	0x88
 	.4byte	0x50
 	.byte	0
 	.uleb128 0x5e
-	.4byte	.LASF371
+	.4byte	.LASF370
 	.byte	0x1
 	.byte	0x72
 	.4byte	0x50
@@ -6586,7 +6531,7 @@ __func__.9344:
 	.4byte	.LFE213-.LFB213
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2538
+	.4byte	0x24eb
 	.uleb128 0x53
 	.ascii	"fit\000"
 	.byte	0x1
@@ -6633,8 +6578,8 @@ __func__.9344:
 	.4byte	.LLST14
 	.uleb128 0x3c
 	.4byte	.LVL34
-	.4byte	0x2729
-	.4byte	0x2521
+	.4byte	0x26dc
+	.4byte	0x24d4
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6662,14 +6607,14 @@ __func__.9344:
 	.byte	0x91
 	.sleb128 -20
 	.uleb128 0x60
-	.4byte	0x2553
+	.4byte	0x2506
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
 	.byte	0
 	.uleb128 0x37
 	.4byte	.LVL36
-	.4byte	0x29cd
+	.4byte	0x2980
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6685,12 +6630,12 @@ __func__.9344:
 	.byte	0
 	.byte	0
 	.uleb128 0x5c
-	.4byte	.LASF372
+	.4byte	.LASF371
 	.byte	0x1
 	.byte	0x3c
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x25c0
+	.4byte	0x2573
 	.uleb128 0x61
 	.ascii	"fit\000"
 	.byte	0x1
@@ -6712,10 +6657,10 @@ __func__.9344:
 	.byte	0x3d
 	.4byte	0x50
 	.uleb128 0x5d
-	.4byte	.LASF373
+	.4byte	.LASF372
 	.byte	0x1
 	.byte	0x3e
-	.4byte	0x25c0
+	.4byte	0x2573
 	.uleb128 0x56
 	.4byte	.LASF74
 	.byte	0x1
@@ -6732,7 +6677,7 @@ __func__.9344:
 	.byte	0x41
 	.4byte	0x50
 	.uleb128 0x56
-	.4byte	.LASF374
+	.4byte	.LASF373
 	.byte	0x1
 	.byte	0x42
 	.4byte	0x50
@@ -6751,42 +6696,42 @@ __func__.9344:
 	.byte	0x4
 	.4byte	0xfb
 	.uleb128 0x63
-	.4byte	.LASF418
+	.4byte	.LASF417
 	.byte	0x1
 	.byte	0x2b
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x25ed
+	.4byte	0x25a0
 	.uleb128 0x61
 	.ascii	"fdt\000"
 	.byte	0x1
 	.byte	0x2b
 	.4byte	0x153
 	.uleb128 0x5d
-	.4byte	.LASF364
+	.4byte	.LASF363
 	.byte	0x1
 	.byte	0x2b
 	.4byte	0xfb
 	.byte	0
 	.uleb128 0x64
-	.4byte	.LASF419
+	.4byte	.LASF418
 	.byte	0x1
 	.byte	0x26
 	.4byte	0x50
-	.4byte	0x2613
+	.4byte	0x25c6
 	.uleb128 0x61
 	.ascii	"fdt\000"
 	.byte	0x1
 	.byte	0x26
 	.4byte	0x153
 	.uleb128 0x5d
-	.4byte	.LASF375
+	.4byte	.LASF374
 	.byte	0x1
 	.byte	0x26
 	.4byte	0xfb
 	.byte	0
 	.uleb128 0x65
-	.4byte	.LASF376
+	.4byte	.LASF375
 	.byte	0x1
 	.byte	0x21
 	.4byte	0x50
@@ -6794,22 +6739,22 @@ __func__.9344:
 	.4byte	.LFE209-.LFB209
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2656
+	.4byte	0x2609
 	.uleb128 0x52
-	.4byte	.LASF377
+	.4byte	.LASF376
 	.byte	0x1
 	.byte	0x21
 	.4byte	0x4d2
 	.4byte	.LLST59
 	.uleb128 0x66
-	.4byte	.LASF378
+	.4byte	.LASF377
 	.byte	0x1
 	.byte	0x21
 	.4byte	0xfb
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x66
-	.4byte	.LASF375
+	.4byte	.LASF374
 	.byte	0x1
 	.byte	0x21
 	.4byte	0xfb
@@ -6817,7 +6762,7 @@ __func__.9344:
 	.byte	0x52
 	.byte	0
 	.uleb128 0x65
-	.4byte	.LASF379
+	.4byte	.LASF378
 	.byte	0x1
 	.byte	0x1c
 	.4byte	0xfb
@@ -6825,16 +6770,16 @@ __func__.9344:
 	.4byte	.LFE208-.LFB208
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x267f
+	.4byte	0x2632
 	.uleb128 0x52
-	.4byte	.LASF377
+	.4byte	.LASF376
 	.byte	0x1
 	.byte	0x1c
 	.4byte	0x4d2
 	.4byte	.LLST58
 	.byte	0
 	.uleb128 0x65
-	.4byte	.LASF380
+	.4byte	.LASF379
 	.byte	0x1
 	.byte	0x17
 	.4byte	0x50
@@ -6842,7 +6787,7 @@ __func__.9344:
 	.4byte	.LFE207-.LFB207
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x26b5
+	.4byte	0x2668
 	.uleb128 0x53
 	.ascii	"fit\000"
 	.byte	0x1
@@ -6858,19 +6803,19 @@ __func__.9344:
 	.byte	0x51
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF381
+	.4byte	.LASF380
 	.byte	0x2
 	.2byte	0x3ea
 	.4byte	0xd7
 	.byte	0x3
-	.4byte	0x26eb
+	.4byte	0x269e
 	.uleb128 0x43
-	.4byte	.LASF382
+	.4byte	.LASF381
 	.byte	0x2
 	.2byte	0x3ea
 	.4byte	0x3ae
 	.uleb128 0x43
-	.4byte	.LASF350
+	.4byte	.LASF349
 	.byte	0x2
 	.2byte	0x3eb
 	.4byte	0x50
@@ -6878,31 +6823,31 @@ __func__.9344:
 	.ascii	"len\000"
 	.byte	0x2
 	.2byte	0x3eb
-	.4byte	0x1d2e
+	.4byte	0x1cd4
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF383
+	.4byte	.LASF382
 	.byte	0x2
 	.2byte	0x2e0
 	.4byte	0x13d
 	.byte	0x3
-	.4byte	0x2709
+	.4byte	0x26bc
 	.uleb128 0x4d
 	.ascii	"hdr\000"
 	.byte	0x2
 	.2byte	0x2e0
-	.4byte	0x2709
+	.4byte	0x26bc
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0xad8
 	.uleb128 0x5c
-	.4byte	.LASF384
+	.4byte	.LASF383
 	.byte	0x1a
 	.byte	0x70
 	.4byte	0x70
 	.byte	0x3
-	.4byte	0x2729
+	.4byte	0x26dc
 	.uleb128 0x61
 	.ascii	"x\000"
 	.byte	0x1a
@@ -6910,54 +6855,54 @@ __func__.9344:
 	.4byte	0x70
 	.byte	0
 	.uleb128 0x67
-	.4byte	0x2538
+	.4byte	0x24eb
 	.4byte	.LFB227
 	.4byte	.LFE227-.LFB227
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2870
+	.4byte	0x2823
 	.uleb128 0x31
-	.4byte	0x2548
+	.4byte	0x24fb
 	.4byte	.LLST0
 	.uleb128 0x31
-	.4byte	0x255e
+	.4byte	0x2511
 	.4byte	.LLST1
 	.uleb128 0x31
-	.4byte	0x2569
+	.4byte	0x251c
 	.4byte	.LLST2
 	.uleb128 0x31
-	.4byte	0x2574
+	.4byte	0x2527
 	.4byte	.LLST3
 	.uleb128 0x68
-	.4byte	0x2553
+	.4byte	0x2506
 	.uleb128 0x6
 	.byte	0xfa
-	.4byte	0x2553
+	.4byte	0x2506
 	.byte	0x9f
 	.uleb128 0x34
-	.4byte	0x257f
+	.4byte	0x2532
 	.4byte	.LLST4
 	.uleb128 0x34
-	.4byte	0x258a
+	.4byte	0x253d
 	.4byte	.LLST5
 	.uleb128 0x34
-	.4byte	0x2595
+	.4byte	0x2548
 	.4byte	.LLST6
 	.uleb128 0x34
-	.4byte	0x25a0
+	.4byte	0x2553
 	.4byte	.LLST7
 	.uleb128 0x33
-	.4byte	0x25ab
+	.4byte	0x255e
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -28
 	.uleb128 0x34
-	.4byte	0x25b6
+	.4byte	0x2569
 	.4byte	.LLST8
 	.uleb128 0x3c
 	.4byte	.LVL1
-	.4byte	0x29d9
-	.4byte	0x27b5
+	.4byte	0x298c
+	.4byte	0x2768
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6967,8 +6912,8 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL5
-	.4byte	0x28ca
-	.4byte	0x27cc
+	.4byte	0x287d
+	.4byte	0x277f
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6978,8 +6923,8 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL6
-	.4byte	0x29e5
-	.4byte	0x27e6
+	.4byte	0x2998
+	.4byte	0x2799
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6995,8 +6940,8 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL11
-	.4byte	0x28b3
-	.4byte	0x280c
+	.4byte	0x2866
+	.4byte	0x27bf
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -7024,8 +6969,8 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL13
-	.4byte	0x28ca
-	.4byte	0x2820
+	.4byte	0x287d
+	.4byte	0x27d3
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -7035,8 +6980,8 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL14
-	.4byte	0x29f0
-	.4byte	0x283a
+	.4byte	0x29a3
+	.4byte	0x27ed
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -7052,8 +6997,8 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL18
-	.4byte	0x28b3
-	.4byte	0x2860
+	.4byte	0x2866
+	.4byte	0x2813
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -7081,7 +7026,7 @@ __func__.9344:
 	.byte	0
 	.uleb128 0x37
 	.4byte	.LVL23
-	.4byte	0x29fb
+	.4byte	0x29ae
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
@@ -7090,175 +7035,175 @@ __func__.9344:
 	.byte	0
 	.byte	0
 	.uleb128 0x67
-	.4byte	0x25c6
+	.4byte	0x2579
 	.4byte	.LFB211
 	.4byte	.LFE211-.LFB211
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2894
+	.4byte	0x2847
 	.uleb128 0x31
-	.4byte	0x25d6
+	.4byte	0x2589
 	.4byte	.LLST60
 	.uleb128 0x68
-	.4byte	0x25e1
+	.4byte	0x2594
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0
 	.uleb128 0xc
 	.4byte	0xdd
-	.4byte	0x28a7
+	.4byte	0x285a
 	.uleb128 0x69
 	.4byte	0xcb
-	.4byte	0x19f9
+	.4byte	0x19bd
 	.byte	0
 	.uleb128 0x6a
-	.4byte	.LASF385
-	.4byte	.LASF385
+	.4byte	.LASF384
+	.4byte	.LASF384
 	.byte	0x2
 	.2byte	0x3f5
 	.uleb128 0x6a
-	.4byte	.LASF386
-	.4byte	.LASF386
+	.4byte	.LASF385
+	.4byte	.LASF385
 	.byte	0x1b
 	.2byte	0x2b2
 	.uleb128 0x6b
-	.4byte	.LASF387
-	.4byte	.LASF387
+	.4byte	.LASF386
+	.4byte	.LASF386
 	.byte	0x1c
-	.byte	0xaa
+	.byte	0xa3
 	.uleb128 0x6b
-	.4byte	.LASF388
-	.4byte	.LASF388
+	.4byte	.LASF387
+	.4byte	.LASF387
 	.byte	0x1d
 	.byte	0x13
 	.uleb128 0x6a
-	.4byte	.LASF389
-	.4byte	.LASF389
+	.4byte	.LASF388
+	.4byte	.LASF388
 	.byte	0x1b
 	.2byte	0x1a8
 	.uleb128 0x6a
-	.4byte	.LASF390
-	.4byte	.LASF390
+	.4byte	.LASF389
+	.4byte	.LASF389
 	.byte	0x2
 	.2byte	0x42e
 	.uleb128 0x6a
-	.4byte	.LASF391
-	.4byte	.LASF391
+	.4byte	.LASF390
+	.4byte	.LASF390
 	.byte	0x2
 	.2byte	0x437
 	.uleb128 0x6b
-	.4byte	.LASF392
-	.4byte	.LASF392
+	.4byte	.LASF391
+	.4byte	.LASF391
 	.byte	0x8
 	.byte	0x27
 	.uleb128 0x6b
-	.4byte	.LASF393
-	.4byte	.LASF393
+	.4byte	.LASF392
+	.4byte	.LASF392
 	.byte	0xc
 	.byte	0xc0
 	.uleb128 0x6b
+	.4byte	.LASF393
+	.4byte	.LASF393
+	.byte	0x1c
+	.byte	0xe4
+	.uleb128 0x6a
 	.4byte	.LASF394
 	.4byte	.LASF394
-	.byte	0x1c
-	.byte	0xe0
+	.byte	0x1b
+	.2byte	0x1c1
 	.uleb128 0x6a
 	.4byte	.LASF395
 	.4byte	.LASF395
-	.byte	0x1b
-	.2byte	0x1c1
+	.byte	0x2
+	.2byte	0x3f8
 	.uleb128 0x6a
 	.4byte	.LASF396
 	.4byte	.LASF396
 	.byte	0x2
-	.2byte	0x3f8
+	.2byte	0x3fa
 	.uleb128 0x6a
 	.4byte	.LASF397
 	.4byte	.LASF397
 	.byte	0x2
-	.2byte	0x3fa
+	.2byte	0x3fc
 	.uleb128 0x6a
 	.4byte	.LASF398
 	.4byte	.LASF398
 	.byte	0x2
-	.2byte	0x3fc
+	.2byte	0x402
 	.uleb128 0x6a
 	.4byte	.LASF399
 	.4byte	.LASF399
 	.byte	0x2
-	.2byte	0x402
+	.2byte	0x401
 	.uleb128 0x6a
 	.4byte	.LASF400
 	.4byte	.LASF400
 	.byte	0x2
-	.2byte	0x401
+	.2byte	0x404
 	.uleb128 0x6a
 	.4byte	.LASF401
 	.4byte	.LASF401
-	.byte	0x2
-	.2byte	0x404
+	.byte	0x17
+	.2byte	0x371
 	.uleb128 0x6a
 	.4byte	.LASF402
 	.4byte	.LASF402
-	.byte	0x17
-	.2byte	0x371
+	.byte	0x2
+	.2byte	0x3f9
 	.uleb128 0x6a
 	.4byte	.LASF403
 	.4byte	.LASF403
 	.byte	0x2
-	.2byte	0x3f9
+	.2byte	0x59f
 	.uleb128 0x6a
 	.4byte	.LASF404
 	.4byte	.LASF404
 	.byte	0x2
-	.2byte	0x59f
+	.2byte	0x429
 	.uleb128 0x6a
 	.4byte	.LASF405
 	.4byte	.LASF405
 	.byte	0x2
-	.2byte	0x429
-	.uleb128 0x6a
-	.4byte	.LASF406
-	.4byte	.LASF406
-	.byte	0x2
 	.2byte	0x598
 	.uleb128 0x6b
-	.4byte	.LASF407
-	.4byte	.LASF407
+	.4byte	.LASF406
+	.4byte	.LASF406
 	.byte	0x1d
 	.byte	0x11
 	.uleb128 0x6a
-	.4byte	.LASF408
-	.4byte	.LASF408
+	.4byte	.LASF407
+	.4byte	.LASF407
 	.byte	0x17
 	.2byte	0x16d
 	.uleb128 0x6a
-	.4byte	.LASF409
-	.4byte	.LASF409
+	.4byte	.LASF408
+	.4byte	.LASF408
 	.byte	0x2
 	.2byte	0x3ff
 	.uleb128 0x6a
-	.4byte	.LASF410
-	.4byte	.LASF410
+	.4byte	.LASF409
+	.4byte	.LASF409
 	.byte	0x1b
 	.2byte	0x182
 	.uleb128 0x6a
-	.4byte	.LASF411
-	.4byte	.LASF411
+	.4byte	.LASF410
+	.4byte	.LASF410
 	.byte	0x2
 	.2byte	0x5ad
 	.uleb128 0x6b
-	.4byte	.LASF412
-	.4byte	.LASF412
+	.4byte	.LASF411
+	.4byte	.LASF411
 	.byte	0x1b
 	.byte	0xa9
 	.uleb128 0x6b
-	.4byte	.LASF413
-	.4byte	.LASF413
+	.4byte	.LASF412
+	.4byte	.LASF412
 	.byte	0x1b
 	.byte	0xb6
 	.uleb128 0x6b
-	.4byte	.LASF414
-	.4byte	.LASF414
+	.4byte	.LASF413
+	.4byte	.LASF413
 	.byte	0x8
 	.byte	0x33
 	.byte	0
@@ -8768,13 +8713,13 @@ __func__.9344:
 	.byte	0x77
 	.sleb128 84
 	.4byte	.LVL205
-	.4byte	.LVL242
+	.4byte	.LVL240
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x52
 	.byte	0x9f
-	.4byte	.LVL242
+	.4byte	.LVL240
 	.4byte	.LFE226
 	.2byte	0x3
 	.byte	0x7d
@@ -8831,8 +8776,8 @@ __func__.9344:
 	.byte	0x9
 	.byte	0xea
 	.byte	0x9f
-	.4byte	.LVL242
-	.4byte	.LVL243
+	.4byte	.LVL240
+	.4byte	.LVL241
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xea
@@ -8851,8 +8796,8 @@ __func__.9344:
 	.uleb128 0x1
 	.byte	0x53
 	.byte	0x9f
-	.4byte	.LVL242
-	.4byte	.LVL243
+	.4byte	.LVL240
+	.4byte	.LVL241
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -8866,8 +8811,8 @@ __func__.9344:
 	.2byte	0x3
 	.byte	0x7d
 	.sleb128 100
-	.4byte	.LVL242
-	.4byte	.LVL243
+	.4byte	.LVL240
+	.4byte	.LVL241
 	.2byte	0x3
 	.byte	0x7d
 	.sleb128 100
@@ -8878,8 +8823,8 @@ __func__.9344:
 	.4byte	.LVL193
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL242
-	.4byte	.LVL243
+	.4byte	.LVL240
+	.4byte	.LVL241
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
@@ -8893,8 +8838,8 @@ __func__.9344:
 	.4byte	.LVL193
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL242
-	.4byte	.LVL243
+	.4byte	.LVL240
+	.4byte	.LVL241
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
@@ -9035,8 +8980,8 @@ __func__.9344:
 	.4byte	.LVL193
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL242
-	.4byte	.LVL243
+	.4byte	.LVL240
+	.4byte	.LVL241
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
@@ -9098,7 +9043,7 @@ __func__.9344:
 	.4byte	.LVL174
 	.2byte	0x4
 	.byte	0x7d
-	.sleb128 112
+	.sleb128 104
 	.byte	0x9f
 	.4byte	.LVL174
 	.4byte	.LVL176-1
@@ -9108,7 +9053,7 @@ __func__.9344:
 	.4byte	.LVL176
 	.2byte	0x4
 	.byte	0x7d
-	.sleb128 112
+	.sleb128 104
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
@@ -9144,7 +9089,7 @@ __func__.9344:
 	.4byte	.LVL190
 	.2byte	0x4
 	.byte	0x7d
-	.sleb128 172
+	.sleb128 164
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
@@ -9207,7 +9152,7 @@ __func__.9344:
 	.2byte	0x1
 	.byte	0x56
 	.4byte	.LVL204
-	.4byte	.LVL242
+	.4byte	.LVL240
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
@@ -9218,7 +9163,7 @@ __func__.9344:
 	.2byte	0x1
 	.byte	0x54
 	.4byte	.LVL204
-	.4byte	.LVL242
+	.4byte	.LVL240
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
@@ -9240,17 +9185,17 @@ __func__.9344:
 	.byte	0x78
 	.sleb128 0
 	.4byte	.LVL211
-	.4byte	.LVL239
+	.4byte	.LVL237
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 16
-	.4byte	.LVL239
-	.4byte	.LVL240
+	.4byte	.LVL237
+	.4byte	.LVL238
 	.2byte	0x2
 	.byte	0x78
 	.sleb128 0
+	.4byte	.LVL238
 	.4byte	.LVL240
-	.4byte	.LVL242
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 16
@@ -9261,8 +9206,8 @@ __func__.9344:
 	.4byte	.LVL225
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL241
-	.4byte	.LVL242
+	.4byte	.LVL239
+	.4byte	.LVL240
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
@@ -9282,8 +9227,8 @@ __func__.9344:
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 84
-	.4byte	.LVL239
-	.4byte	.LVL242
+	.4byte	.LVL237
+	.4byte	.LVL240
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 84
@@ -9332,8 +9277,8 @@ __func__.9344:
 	.4byte	.LVL230-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL241
-	.4byte	.LVL242
+	.4byte	.LVL239
+	.4byte	.LVL240
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 72
@@ -9341,11 +9286,11 @@ __func__.9344:
 	.4byte	0
 .LLST99:
 	.4byte	.LVL225
-	.4byte	.LVL236
+	.4byte	.LVL234
 	.2byte	0x1
 	.byte	0x55
+	.4byte	.LVL235
 	.4byte	.LVL237
-	.4byte	.LVL239
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
@@ -9356,19 +9301,19 @@ __func__.9344:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL212-1
-	.4byte	.LVL236
+	.4byte	.LVL234
 	.2byte	0x1
 	.byte	0x58
+	.4byte	.LVL235
 	.4byte	.LVL237
-	.4byte	.LVL239
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL240
-	.4byte	.LVL241
+	.4byte	.LVL238
+	.4byte	.LVL239
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL241
-	.4byte	.LVL242
+	.4byte	.LVL239
+	.4byte	.LVL240
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
@@ -10476,48 +10421,48 @@ __func__.9344:
 	.4byte	0
 	.section	.debug_ranges,"",%progbits
 .Ldebug_ranges0:
-	.4byte	.LBB37
-	.4byte	.LBE37
-	.4byte	.LBB41
-	.4byte	.LBE41
+	.4byte	.LBB36
+	.4byte	.LBE36
+	.4byte	.LBB40
+	.4byte	.LBE40
+	.4byte	.LBB46
+	.4byte	.LBE46
+	.4byte	0
+	.4byte	0
+	.4byte	.LBB43
+	.4byte	.LBE43
 	.4byte	.LBB47
 	.4byte	.LBE47
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB44
-	.4byte	.LBE44
 	.4byte	.LBB48
 	.4byte	.LBE48
-	.4byte	0
-	.4byte	0
-	.4byte	.LBB49
-	.4byte	.LBE49
+	.4byte	.LBB52
+	.4byte	.LBE52
 	.4byte	.LBB53
 	.4byte	.LBE53
-	.4byte	.LBB54
-	.4byte	.LBE54
-	.4byte	0
-	.4byte	0
-	.4byte	.LBB86
-	.4byte	.LBE86
-	.4byte	.LBB97
-	.4byte	.LBE97
-	.4byte	.LBB107
-	.4byte	.LBE107
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB98
-	.4byte	.LBE98
-	.4byte	.LBB105
-	.4byte	.LBE105
-	.4byte	.LBB106
-	.4byte	.LBE106
+	.4byte	.LBB84
+	.4byte	.LBE84
+	.4byte	.LBB95
+	.4byte	.LBE95
+	.4byte	.LBB104
+	.4byte	.LBE104
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB100
-	.4byte	.LBE100
+	.4byte	.LBB96
+	.4byte	.LBE96
 	.4byte	.LBB102
 	.4byte	.LBE102
+	.4byte	.LBB103
+	.4byte	.LBE103
+	.4byte	0
+	.4byte	0
+	.4byte	.LBB98
+	.4byte	.LBE98
+	.4byte	.LBB99
+	.4byte	.LBE99
 	.4byte	0
 	.4byte	0
 	.4byte	.LFB227
@@ -10549,16 +10494,14 @@ __func__.9344:
 	.section	.debug_line,"",%progbits
 .Ldebug_line0:
 	.section	.debug_str,"MS",%progbits,1
-.LASF402:
+.LASF401:
 	.ascii	"memalign_simple\000"
-.LASF352:
+.LASF351:
 	.ascii	"blob\000"
 .LASF132:
 	.ascii	"off_mem_rsvmap\000"
 .LASF203:
 	.ascii	"IH_COMP_GZIP\000"
-.LASF342:
-	.ascii	"slot_suffix\000"
 .LASF18:
 	.ascii	"size_t\000"
 .LASF252:
@@ -10575,11 +10518,11 @@ __func__.9344:
 	.ascii	"NETLOOP_RESTART\000"
 .LASF48:
 	.ascii	"IF_TYPE_MTD\000"
-.LASF419:
+.LASF418:
 	.ascii	"fdt_bootargs_append_ab\000"
-.LASF394:
+.LASF393:
 	.ascii	"fdt_shrink_to_minimum\000"
-.LASF381:
+.LASF380:
 	.ascii	"fit_get_name\000"
 .LASF211:
 	.ascii	"ih_magic\000"
@@ -10611,7 +10554,7 @@ __func__.9344:
 	.ascii	"image_header_t\000"
 .LASF257:
 	.ascii	"state\000"
-.LASF345:
+.LASF344:
 	.ascii	"align_len\000"
 .LASF106:
 	.ascii	"bi_dsp_freq\000"
@@ -10657,7 +10600,7 @@ __func__.9344:
 	.ascii	"net_native_vlan\000"
 .LASF63:
 	.ascii	"removable\000"
-.LASF386:
+.LASF385:
 	.ascii	"fdt_getprop\000"
 .LASF24:
 	.ascii	"errno\000"
@@ -10669,7 +10612,7 @@ __func__.9344:
 	.ascii	"IH_OS_ESIX\000"
 .LASF172:
 	.ascii	"IH_TYPE_FIRMWARE\000"
-.LASF414:
+.LASF413:
 	.ascii	"strchr\000"
 .LASF253:
 	.ascii	"initrd_end\000"
@@ -10677,17 +10620,17 @@ __func__.9344:
 	.ascii	"IRQ_STACK_START_IN\000"
 .LASF136:
 	.ascii	"size_dt_strings\000"
-.LASF407:
+.LASF406:
 	.ascii	"puts\000"
-.LASF383:
+.LASF382:
 	.ascii	"image_get_magic\000"
-.LASF384:
+.LASF383:
 	.ascii	"__fswab32\000"
-.LASF417:
+.LASF416:
 	.ascii	"/home/zzz/code/u-boot\000"
 .LASF302:
 	.ascii	"net_boot_file_size\000"
-.LASF364:
+.LASF363:
 	.ascii	"data\000"
 .LASF292:
 	.ascii	"net_tx_packet\000"
@@ -10703,7 +10646,7 @@ __func__.9344:
 	.ascii	"IF_TYPE_HOST\000"
 .LASF71:
 	.ascii	"ide_bus_offset\000"
-.LASF371:
+.LASF370:
 	.ascii	"spl_fit_get_image_node\000"
 .LASF289:
 	.ascii	"net_server_ethaddr\000"
@@ -10715,11 +10658,11 @@ __func__.9344:
 	.ascii	"signed char\000"
 .LASF21:
 	.ascii	"uint8_t\000"
-.LASF401:
+.LASF400:
 	.ascii	"fit_image_get_data_size\000"
 .LASF86:
 	.ascii	"udevice\000"
-.LASF405:
+.LASF404:
 	.ascii	"fit_image_verify_with_data\000"
 .LASF219:
 	.ascii	"ih_arch\000"
@@ -10743,7 +10686,7 @@ __func__.9344:
 	.ascii	"IF_TYPE_SPINAND\000"
 .LASF259:
 	.ascii	"images\000"
-.LASF382:
+.LASF381:
 	.ascii	"fit_hdr\000"
 .LASF179:
 	.ascii	"IH_TYPE_OMAPIMAGE\000"
@@ -10753,7 +10696,7 @@ __func__.9344:
 	.ascii	"bi_ddr_freq\000"
 .LASF214:
 	.ascii	"ih_size\000"
-.LASF378:
+.LASF377:
 	.ascii	"partition\000"
 .LASF330:
 	.ascii	"fit_header\000"
@@ -10785,7 +10728,7 @@ __func__.9344:
 	.ascii	"IH_TYPE_FIRMWARE_IVT\000"
 .LASF271:
 	.ascii	"enetaddr\000"
-.LASF413:
+.LASF412:
 	.ascii	"fdt_next_subnode\000"
 .LASF324:
 	.ascii	"filename\000"
@@ -10815,7 +10758,7 @@ __func__.9344:
 	.ascii	"bi_flashoffset\000"
 .LASF301:
 	.ascii	"net_boot_file_name\000"
-.LASF392:
+.LASF391:
 	.ascii	"strcmp\000"
 .LASF213:
 	.ascii	"ih_time\000"
@@ -10823,7 +10766,7 @@ __func__.9344:
 	.ascii	"node\000"
 .LASF34:
 	.ascii	"IF_TYPE_SCSI\000"
-.LASF379:
+.LASF378:
 	.ascii	"mtd_part_parse\000"
 .LASF314:
 	.ascii	"__bss_end\000"
@@ -10837,7 +10780,7 @@ __func__.9344:
 	.ascii	"net_rx_packets\000"
 .LASF310:
 	.ascii	"mem_malloc_start\000"
-.LASF373:
+.LASF372:
 	.ascii	"outname\000"
 .LASF124:
 	.ascii	"_datarelro_start_ofs\000"
@@ -10847,11 +10790,11 @@ __func__.9344:
 	.ascii	"ih_ep\000"
 .LASF93:
 	.ascii	"lmb_region\000"
-.LASF370:
+.LASF369:
 	.ascii	"get_aligned_image_offset\000"
 .LASF173:
 	.ascii	"IH_TYPE_SCRIPT\000"
-.LASF388:
+.LASF387:
 	.ascii	"printf\000"
 .LASF182:
 	.ascii	"IH_TYPE_PBLIMAGE\000"
@@ -10877,21 +10820,21 @@ __func__.9344:
 	.ascii	"IH_TYPE_KERNEL_NOLOAD\000"
 .LASF127:
 	.ascii	"fdt_header\000"
-.LASF404:
+.LASF403:
 	.ascii	"fdt_getprop_u32\000"
 .LASF311:
 	.ascii	"mem_malloc_end\000"
-.LASF411:
+.LASF410:
 	.ascii	"fit_find_config_node\000"
 .LASF249:
 	.ascii	"rd_end\000"
-.LASF348:
+.LASF347:
 	.ascii	"spl_fit_standalone_release\000"
 .LASF254:
 	.ascii	"cmdline_start\000"
 .LASF279:
 	.ascii	"index\000"
-.LASF362:
+.LASF361:
 	.ascii	"nr_sectors\000"
 .LASF235:
 	.ascii	"fit_uname_cfg\000"
@@ -10911,9 +10854,9 @@ __func__.9344:
 	.ascii	"target\000"
 .LASF161:
 	.ascii	"IH_OS_OSE\000"
-.LASF351:
+.LASF350:
 	.ascii	"spl_fit_record_loadable\000"
-.LASF390:
+.LASF389:
 	.ascii	"fit_board_verify_required_sigs\000"
 .LASF308:
 	.ascii	"NETLOOP_FAIL\000"
@@ -10933,11 +10876,11 @@ __func__.9344:
 	.ascii	"uintptr_t\000"
 .LASF208:
 	.ascii	"IH_COMP_ZIMAGE\000"
-.LASF350:
+.LASF349:
 	.ascii	"noffset\000"
 .LASF298:
 	.ascii	"net_our_vlan\000"
-.LASF385:
+.LASF384:
 	.ascii	"fit_image_get_os\000"
 .LASF230:
 	.ascii	"image_info_t\000"
@@ -10945,7 +10888,7 @@ __func__.9344:
 	.ascii	"IH_TYPE_MULTI\000"
 .LASF180:
 	.ascii	"IH_TYPE_AISIMAGE\000"
-.LASF347:
+.LASF346:
 	.ascii	"sectors\000"
 .LASF226:
 	.ascii	"image_len\000"
@@ -10961,7 +10904,7 @@ __func__.9344:
 	.ascii	"IH_TYPE_LPC32XXIMAGE\000"
 .LASF233:
 	.ascii	"legacy_hdr_os_copy\000"
-.LASF395:
+.LASF394:
 	.ascii	"fdt_get_name\000"
 .LASF261:
 	.ascii	"sha256_der_prefix\000"
@@ -10981,15 +10924,15 @@ __func__.9344:
 	.ascii	"protect\000"
 .LASF82:
 	.ascii	"disk_partition_t\000"
-.LASF418:
+.LASF417:
 	.ascii	"fdt_bootargs_append\000"
-.LASF391:
+.LASF390:
 	.ascii	"fit_conf_get_node\000"
 .LASF297:
 	.ascii	"net_null_ethaddr\000"
-.LASF403:
+.LASF402:
 	.ascii	"fit_image_is_preload\000"
-.LASF372:
+.LASF371:
 	.ascii	"spl_fit_get_image_name\000"
 .LASF265:
 	.ascii	"load_addr\000"
@@ -10999,11 +10942,11 @@ __func__.9344:
 	.ascii	"fit_hdr_os\000"
 .LASF122:
 	.ascii	"_datarelrolocal_start_ofs\000"
-.LASF346:
+.LASF345:
 	.ascii	"count\000"
 .LASF186:
 	.ascii	"IH_TYPE_SOCFPGAIMAGE\000"
-.LASF389:
+.LASF388:
 	.ascii	"fdt_path_offset\000"
 .LASF325:
 	.ascii	"read\000"
@@ -11029,9 +10972,9 @@ __func__.9344:
 	.ascii	"IH_TYPE_X86_SETUP\000"
 .LASF99:
 	.ascii	"bi_memsize\000"
-.LASF353:
+.LASF352:
 	.ascii	"image\000"
-.LASF359:
+.LASF358:
 	.ascii	"comp_addr\000"
 .LASF28:
 	.ascii	"image_base\000"
@@ -11041,11 +10984,11 @@ __func__.9344:
 	.ascii	"write_hwaddr\000"
 .LASF201:
 	.ascii	"IH_TYPE_COUNT\000"
-.LASF357:
+.LASF356:
 	.ascii	"offset\000"
 .LASF35:
 	.ascii	"IF_TYPE_ATAPI\000"
-.LASF387:
+.LASF386:
 	.ascii	"fdt_record_loadable\000"
 .LASF46:
 	.ascii	"IF_TYPE_SPINOR\000"
@@ -11065,7 +11008,7 @@ __func__.9344:
 	.ascii	"IF_TYPE_RKNAND\000"
 .LASF104:
 	.ascii	"bi_sramsize\000"
-.LASF361:
+.LASF360:
 	.ascii	"overhead\000"
 .LASF90:
 	.ascii	"long double\000"
@@ -11079,7 +11022,7 @@ __func__.9344:
 	.ascii	"IH_COMP_LZMA\000"
 .LASF267:
 	.ascii	"save_size\000"
-.LASF368:
+.LASF367:
 	.ascii	"data_size\000"
 .LASF327:
 	.ascii	"info\000"
@@ -11113,7 +11056,7 @@ __func__.9344:
 	.ascii	"image_header\000"
 .LASF31:
 	.ascii	"lbaint_t\000"
-.LASF358:
+.LASF357:
 	.ascii	"length\000"
 .LASF23:
 	.ascii	"__be32\000"
@@ -11125,7 +11068,7 @@ __func__.9344:
 	.ascii	"IH_OS_NCR\000"
 .LASF224:
 	.ascii	"image_info\000"
-.LASF406:
+.LASF405:
 	.ascii	"board_fit_image_post_process\000"
 .LASF163:
 	.ascii	"IH_OS_OPENRTOS\000"
@@ -11137,17 +11080,17 @@ __func__.9344:
 	.ascii	"spl_image_info\000"
 .LASF338:
 	.ascii	"images_noffset\000"
-.LASF367:
+.LASF366:
 	.ascii	"get_aligned_image_size\000"
-.LASF363:
+.LASF362:
 	.ascii	"image_comp\000"
 .LASF42:
 	.ascii	"IF_TYPE_SYSTEMACE\000"
 .LASF322:
 	.ascii	"spl_load_info\000"
-.LASF416:
+.LASF415:
 	.ascii	"common/spl/spl_fit_tb_arm_v7.c\000"
-.LASF412:
+.LASF411:
 	.ascii	"fdt_first_subnode\000"
 .LASF49:
 	.ascii	"IF_TYPE_COUNT\000"
@@ -11161,7 +11104,7 @@ __func__.9344:
 	.ascii	"region\000"
 .LASF137:
 	.ascii	"size_dt_struct\000"
-.LASF377:
+.LASF376:
 	.ascii	"dev_desc\000"
 .LASF335:
 	.ascii	"os_type\000"
@@ -11179,7 +11122,7 @@ __func__.9344:
 	.ascii	"bi_enetaddr\000"
 .LASF87:
 	.ascii	"mtd_info\000"
-.LASF354:
+.LASF353:
 	.ascii	"spl_fit_load_blob\000"
 .LASF54:
 	.ascii	"SIG_TYPE_GUID\000"
@@ -11191,7 +11134,7 @@ __func__.9344:
 	.ascii	"disk_partition\000"
 .LASF153:
 	.ascii	"IH_OS_VXWORKS\000"
-.LASF399:
+.LASF398:
 	.ascii	"fit_image_get_data_position\000"
 .LASF263:
 	.ascii	"__dtb_dt_begin\000"
@@ -11219,31 +11162,31 @@ __func__.9344:
 	.ascii	"bi_busfreq\000"
 .LASF6:
 	.ascii	"short int\000"
-.LASF360:
+.LASF359:
 	.ascii	"load_ptr\000"
 .LASF194:
 	.ascii	"IH_TYPE_ZYNQMPIMAGE\000"
 .LASF206:
 	.ascii	"IH_COMP_LZO\000"
-.LASF396:
+.LASF395:
 	.ascii	"fit_image_get_comp\000"
 .LASF183:
 	.ascii	"IH_TYPE_MXSIMAGE\000"
-.LASF400:
+.LASF399:
 	.ascii	"fit_image_get_data_offset\000"
 .LASF56:
 	.ascii	"mbr_sig\000"
 .LASF266:
 	.ascii	"save_addr\000"
-.LASF397:
+.LASF396:
 	.ascii	"fit_image_get_load\000"
 .LASF159:
 	.ascii	"IH_OS_UNITY\000"
-.LASF349:
+.LASF348:
 	.ascii	"spl_fit_image_get_os\000"
 .LASF140:
 	.ascii	"IH_OS_OPENBSD\000"
-.LASF374:
+.LASF373:
 	.ascii	"conf_node\000"
 .LASF164:
 	.ascii	"IH_OS_ARM_TRUSTED_FIRMWARE\000"
@@ -11255,7 +11198,7 @@ __func__.9344:
 	.ascii	"_datarellocal_start_ofs\000"
 .LASF155:
 	.ascii	"IH_OS_QNX\000"
-.LASF376:
+.LASF375:
 	.ascii	"spl_get_current_slot\000"
 .LASF326:
 	.ascii	"spl_image\000"
@@ -11263,9 +11206,9 @@ __func__.9344:
 	.ascii	"sha1_der_prefix\000"
 .LASF73:
 	.ascii	"block_drvr\000"
-.LASF408:
+.LASF407:
 	.ascii	"memcpy\000"
-.LASF343:
+.LASF342:
 	.ascii	"spl_load_simple_fit\000"
 .LASF84:
 	.ascii	"flash_id\000"
@@ -11273,7 +11216,7 @@ __func__.9344:
 	.ascii	"fit_noffset_setup\000"
 .LASF138:
 	.ascii	"working_fdt\000"
-.LASF369:
+.LASF368:
 	.ascii	"get_aligned_image_overhead\000"
 .LASF287:
 	.ascii	"net_root_path\000"
@@ -11297,11 +11240,11 @@ __func__.9344:
 	.ascii	"IH_OS_PSOS\000"
 .LASF152:
 	.ascii	"IH_OS_LYNXOS\000"
-.LASF398:
+.LASF397:
 	.ascii	"fit_image_get_comp_addr\000"
-.LASF410:
+.LASF409:
 	.ascii	"fdt_subnode_offset\000"
-.LASF415:
+.LASF414:
 	.ascii	"GNU C11 6.3.1 20170404 -mthumb -mthumb-interwork -m"
 	.ascii	"abi=aapcs-linux -mno-unaligned-access -mfloat-abi=s"
 	.ascii	"oft -march=armv7-a -mtune=cortex-a9 -mfpu=vfpv3-d16"
@@ -11325,7 +11268,7 @@ __func__.9344:
 	.ascii	"IH_OS_DELL\000"
 .LASF96:
 	.ascii	"reserved\000"
-.LASF355:
+.LASF354:
 	.ascii	"spl_fit_append_fdt\000"
 .LASF316:
 	.ascii	"entry_point\000"
@@ -11337,7 +11280,7 @@ __func__.9344:
 	.ascii	"short unsigned int\000"
 .LASF128:
 	.ascii	"magic\000"
-.LASF344:
+.LASF343:
 	.ascii	"spl_kernel_partition\000"
 .LASF245:
 	.ascii	"fit_hdr_setup\000"
@@ -11347,15 +11290,15 @@ __func__.9344:
 	.ascii	"base\000"
 .LASF160:
 	.ascii	"IH_OS_INTEGRITY\000"
-.LASF375:
+.LASF374:
 	.ascii	"slot\000"
 .LASF83:
 	.ascii	"sector_count\000"
-.LASF380:
+.LASF379:
 	.ascii	"fit_config_verify\000"
 .LASF221:
 	.ascii	"ih_comp\000"
-.LASF365:
+.LASF364:
 	.ascii	"external_data\000"
 .LASF340:
 	.ascii	"part_info\000"
@@ -11365,11 +11308,11 @@ __func__.9344:
 	.ascii	"SIG_TYPE_COUNT\000"
 .LASF250:
 	.ascii	"ft_addr\000"
-.LASF366:
+.LASF365:
 	.ascii	"preload\000"
 .LASF4:
 	.ascii	"uchar\000"
-.LASF393:
+.LASF392:
 	.ascii	"part_get_info_by_name\000"
 .LASF148:
 	.ascii	"IH_OS_IRIX\000"
@@ -11385,7 +11328,7 @@ __func__.9344:
 	.ascii	"net_netmask\000"
 .LASF274:
 	.ascii	"send\000"
-.LASF356:
+.LASF355:
 	.ascii	"spl_load_fit_image\000"
 .LASF119:
 	.ascii	"IRQ_STACK_START\000"
@@ -11393,7 +11336,7 @@ __func__.9344:
 	.ascii	"entry_point_os\000"
 .LASF243:
 	.ascii	"fit_uname_fdt\000"
-.LASF409:
+.LASF408:
 	.ascii	"fit_image_get_data\000"
 	.ident	"GCC: (Linaro GCC 6.3-2017.05) 6.3.1 20170404"
 	.section	.note.GNU-stack,"",%progbits

commit d061f1ec91159f968ab0fd1b4a5c266e3b7cd123
Author: William Wu <william.wu@rock-chips.com>
Date:   Mon Nov 29 16:21:45 2021 +0800

    phy: rockchip: naneng-usb2: add vbus regulator support
    
    Get vbus regulator from DT and manage it when phy power
    on/off for usb host function.
    
    Signed-off-by: William Wu <william.wu@rock-chips.com>
    Change-Id: Ia6b707593bc1e13920846f9404be2f72f44df6d0

diff --git a/drivers/phy/phy-rockchip-naneng-usb2.c b/drivers/phy/phy-rockchip-naneng-usb2.c
index 75b185139e..09060a5593 100644
--- a/drivers/phy/phy-rockchip-naneng-usb2.c
+++ b/drivers/phy/phy-rockchip-naneng-usb2.c
@@ -13,6 +13,7 @@
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <reset-uclass.h>
+#include <power/regulator.h>
 
 #define U2PHY_BIT_WRITEABLE_SHIFT	16
 
@@ -139,11 +140,13 @@ struct rockchip_usb2phy_cfg {
  * struct rockchip_usb2phy: usb2.0 phy driver data.
  * @grf: General Register Files register base.
  * @reset: power reset signal for phy.
+ * @vbus_supply: vbus supply for usb host.
  * @phy_cfg: phy register configuration, assigned by driver data.
  */
 struct rockchip_usb2phy {
 	void __iomem		*grf;
 	struct reset_ctl	*reset;
+	struct udevice		*vbus_supply[USB2PHY_NUM_PORTS];
 	const struct rockchip_usb2phy_cfg	*phy_cfg;
 };
 
@@ -257,6 +260,29 @@ int rockchip_u2phy_vbus_detect(void)
 		chg_type == POWER_SUPPLY_TYPE_USB_CDP) ? 1 : 0;
 }
 
+static struct udevice *rockchip_usb2phy_check_vbus(struct phy *phy)
+{
+	struct udevice *parent = phy->dev->parent;
+	struct rockchip_usb2phy *rphy = dev_get_priv(parent);
+	const struct rockchip_usb2phy_port_cfg *port_cfg;
+	void __iomem *base = rphy->grf;
+	struct udevice *vbus = NULL;
+	bool iddig = true;
+
+	if (phy->id == USB2PHY_PORT_HOST) {
+		vbus = rphy->vbus_supply[USB2PHY_PORT_HOST];
+	} else if (phy->id == USB2PHY_PORT_OTG) {
+		port_cfg = &rphy->phy_cfg->port_cfgs[USB2PHY_PORT_OTG];
+		if (port_cfg->utmi_iddig.offset) {
+			iddig = property_enabled(base, &port_cfg->utmi_iddig);
+			if (!iddig)
+				vbus = rphy->vbus_supply[USB2PHY_PORT_OTG];
+		}
+	}
+
+	return vbus;
+}
+
 static int rockchip_usb2phy_init(struct phy *phy)
 {
 	struct udevice *parent = phy->dev->parent;
@@ -300,15 +326,55 @@ static int rockchip_usb2phy_exit(struct phy *phy)
 	return 0;
 }
 
+static int rockchip_usb2phy_power_on(struct phy *phy)
+{
+	struct udevice *vbus = NULL;
+	int ret;
+
+	vbus = rockchip_usb2phy_check_vbus(phy);
+	if (vbus) {
+		ret = regulator_set_enable(vbus, true);
+		if (ret) {
+			pr_err("%s: Failed to en VBus supply\n", __func__);
+			return ret;
+		}
+	}
+
+	return 0;
+}
+
+static int rockchip_usb2phy_power_off(struct phy *phy)
+{
+	struct udevice *vbus = NULL;
+	int ret;
+
+	vbus = rockchip_usb2phy_check_vbus(phy);
+	if (vbus) {
+		ret = regulator_set_enable(vbus, false);
+		if (ret) {
+			pr_err("%s: Failed to dis VBus supply\n", __func__);
+			return ret;
+		}
+	}
+
+	return 0;
+}
+
 static int rockchip_usb2phy_of_xlate(struct phy *phy,
 				     struct ofnode_phandle_args *args)
 {
 	const char *dev_name = phy->dev->name;
+	struct udevice *parent = phy->dev->parent;
+	struct rockchip_usb2phy *rphy = dev_get_priv(parent);
 
 	if (!strcasecmp(dev_name, "host-port")) {
 		phy->id = USB2PHY_PORT_HOST;
+		device_get_supply_regulator(phy->dev, "phy-supply",
+					    &rphy->vbus_supply[USB2PHY_PORT_HOST]);
 	} else if (!strcasecmp(dev_name, "otg-port")) {
 		phy->id = USB2PHY_PORT_OTG;
+		device_get_supply_regulator(phy->dev, "phy-supply",
+					    &rphy->vbus_supply[USB2PHY_PORT_OTG]);
 	} else {
 		pr_err("%s: invalid dev name\n", __func__);
 		return -EINVAL;
@@ -404,6 +470,8 @@ static int rv1126_usb2phy_tuning(struct rockchip_usb2phy *rphy)
 static struct phy_ops rockchip_usb2phy_ops = {
 	.init = rockchip_usb2phy_init,
 	.exit = rockchip_usb2phy_exit,
+	.power_on = rockchip_usb2phy_power_on,
+	.power_off = rockchip_usb2phy_power_off,
 	.of_xlate = rockchip_usb2phy_of_xlate,
 };
 

commit 293182c3e474d33fe776d92316bd49748f8580b2
Author: William Wu <william.wu@rock-chips.com>
Date:   Mon Nov 29 16:05:19 2021 +0800

    regulator: rk809: fix switch set wrong value
    
    The SWOUT1 of RK809 is used for VCC5V0_HOST of USB2.0 Host
    interface on RV1126 EVB, without this patch, it fails to
    power off the SWOUT1. This patch fixes the set value to
    power on/off the SWOUT1 successfully.
    
    Signed-off-by: William Wu <william.wu@rock-chips.com>
    Change-Id: I3d9ca571ba586e73f997459b83716770ab53f400

diff --git a/drivers/power/regulator/rk8xx.c b/drivers/power/regulator/rk8xx.c
index 73d5c09ba2..4205a477ab 100644
--- a/drivers/power/regulator/rk8xx.c
+++ b/drivers/power/regulator/rk8xx.c
@@ -1012,7 +1012,7 @@ static int switch_set_enable(struct udevice *dev, bool enable)
 	case RK809_ID:
 		mask = (1 << (sw + 2)) | (1 << (sw + 6));
 		ret = pmic_clrsetbits(dev->parent, RK817_POWER_EN(3), mask,
-				      enable ? mask : 0);
+				      enable ? mask : (1 << (sw + 6)));
 		break;
 	case RK818_ID:
 		mask = 1 << 6;

commit a0d03578dd32deb6a390153c69be11fee90ef458
Author: William Wu <william.wu@rock-chips.com>
Date:   Mon Nov 29 11:59:58 2021 +0800

    phy: rockchip: naneng-combphy: Adjust PLL parameters for rk3568 usb3
    
    When do the USB 3.0 Receiver Jitter Tolerance Test on
    RK3568 EVB, it fails at Sj Frequency 2.0/4.9/10.0 [MHz].
    This patch adjusts the PLL parameters for USB to pass
    the Receiver Jitter Tolerance Test, and it's helpful to
    improve the USB 3.0 signal compatibility.
    
    Signed-off-by: William Wu <william.wu@rock-chips.com>
    Change-Id: I8f9e346c5d43e8cc79767b3951b0ed82a39e1578

diff --git a/drivers/phy/phy-rockchip-naneng-combphy.c b/drivers/phy/phy-rockchip-naneng-combphy.c
index e55f4d1f01..611887b29c 100644
--- a/drivers/phy/phy-rockchip-naneng-combphy.c
+++ b/drivers/phy/phy-rockchip-naneng-combphy.c
@@ -323,6 +323,27 @@ static int rk3568_combphy_cfg(struct rockchip_combphy_priv *priv)
 		val |= 0x01;
 		writel(val, priv->mmio + (0x0e << 2));
 
+		/* Set PLL KVCO fine tuning signals */
+		val = readl(priv->mmio + (0x20 << 2));
+		val &= ~(0x7 << 2);
+		val |= 0x2 << 2;
+		writel(val, priv->mmio + (0x20 << 2));
+
+		/* Set PLL LPF R1 to su_trim[10:7]=1001 */
+		writel(0x4, priv->mmio + (0xb << 2));
+
+		/* Set PLL input clock divider 1/2 */
+		val = readl(priv->mmio + (0x5 << 2));
+		val &= ~(0x3 << 6);
+		val |= 0x1 << 6;
+		writel(val, priv->mmio + (0x5 << 2));
+
+		/* Set PLL loop divider */
+		writel(0x32, priv->mmio + (0x11 << 2));
+
+		/* Set PLL KVCO to min and set PLL charge pump current to max */
+		writel(0xf0, priv->mmio + (0xa << 2));
+
 		param_write(priv->phy_grf, &cfg->pipe_sel_usb, true);
 		param_write(priv->phy_grf, &cfg->pipe_txcomp_sel, false);
 		param_write(priv->phy_grf, &cfg->pipe_txelec_sel, false);

commit aedf647f881e76f1475e21302bde9f7c5b2a91d2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Aug 24 20:47:16 2021 +0800

    cmd: download: remove CONFIG_CMD_GO dependence
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I375ba79cb84f11471411c33bd4a1dcda3ab12fd5

diff --git a/cmd/download.c b/cmd/download.c
index 601e6c6558..fe5f74ca07 100644
--- a/cmd/download.c
+++ b/cmd/download.c
@@ -13,11 +13,10 @@ static int do_download(cmd_tbl_t *cmdtp, int flag,
 #ifdef CONFIG_CMD_ROCKUSB
 	run_command("rockusb 0 $devtype $devnum", 0);
 #endif
-#ifdef CONFIG_CMD_GO
 	printf("Enter rockusb failed, fallback to bootrom...\n");
 	flushc();
 	run_command("rbrom", 0);
-#endif
+
 	return 0;
 }
 

commit 01c76730629f8e9acaf6b06a7106c1f97f4573be
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Aug 24 20:46:57 2021 +0800

    rockchip: Kconfig: correct dependence
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ib2758caf3814bbf242577613cc066ff53882365b

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 2f52d94202..dfa5a3ae5b 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -674,7 +674,7 @@ config ROCKCHIP_USB_BOOT
 
 config ROCKCHIP_FIT_IMAGE
 	bool "Enable support for FIT image"
-	depends on FIT && USING_KERNEL_DTB
+	depends on FIT
 	select CMD_BOOT_FIT
 	default n
 	help

commit 97c86b557235bc826e4c30cd46e926b0bbcc6079
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Aug 24 20:27:01 2021 +0800

    rockchip: board: fix compiler error if not set CONFIG_USING_KERNEL_DTB=y
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I713c24caca4150db24cb90d6ce2a493e8b556f4e

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index c0e3860db4..d8f610d828 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -433,7 +433,7 @@ static void board_debug_init(void)
 		printf("Cmd interface: disabled\n");
 }
 
-#ifdef CONFIG_MTD_BLK
+#if defined(CONFIG_MTD_BLK) && defined(CONFIG_USING_KERNEL_DTB)
 static void board_mtd_blk_map_partitions(void)
 {
 	struct blk_desc *dev_desc;

commit 48ee633b7bc453ca424e768c975a5c69b20dea9b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Aug 24 20:26:25 2021 +0800

    common: board_r: fix compiler error if not set CONFIG_USING_KERNEL_DTB=y
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I9e75403902a0bf178d2392e03b5f982afb8a191c

diff --git a/common/board_r.c b/common/board_r.c
index a25d09dc6b..5f5a8be5a3 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -58,6 +58,8 @@
 #include <efi_loader.h>
 #include <sysmem.h>
 #include <bidram.h>
+#include <boot_rkimg.h>
+#include <mtd_blk.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 

commit 5f5b89c2c423b8035b7bd27817689b2fc7a5e47b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Aug 24 15:15:45 2021 +0800

    lib: Makefile: build rand.c if not set CONFIG_LIB_HW_RAND=y
    
    The hardware rand lib has the higher priority.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I4c051911c91d7b72f30cfde6a0896f9d7c925ee8

diff --git a/lib/Makefile b/lib/Makefile
index 4ea7fe1d73..16ed7a111b 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -97,7 +97,10 @@ obj-y += time.o
 obj-y += hexdump.o
 obj-$(CONFIG_TRACE) += trace.o
 obj-$(CONFIG_LIB_UUID) += uuid.o
+
+ifneq ($(CONFIG_LIB_HW_RAND)$(CONFIG_RNG_ROCKCHIP),yy)
 obj-$(CONFIG_LIB_RAND) += rand.o
+endif
 
 ifdef CONFIG_SPL_BUILD
 ifdef CONFIG_TPL_BUILD

commit 3674c884c9cee8d94aaa4a374814200845d67021
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Aug 24 14:59:53 2021 +0800

    Kconfig: FIT_ENABLE_SHA256_SUPPORT select SHA256 if !DM_CRYPTO
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I9f7e7ddf9d261e531986c750b61ffd8ba1b3d7c7

diff --git a/Kconfig b/Kconfig
index 651303531c..9c29d7b5e0 100644
--- a/Kconfig
+++ b/Kconfig
@@ -191,7 +191,7 @@ if FIT
 
 config FIT_ENABLE_SHA256_SUPPORT
 	bool "Support SHA256 checksum of FIT image contents"
-	select SHA256
+	select SHA256 if !DM_CRYPTO
 	default y
 	help
 	  Enable this to support SHA256 checksum of FIT image contents. A

commit c22ada675219d5f4355d52a57ea9a93f6a0c9924
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Aug 25 14:35:16 2021 +0800

    common: image-fit: fix compiler error
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ibb59a99ccb0ab128a7d426545b59ef0f39cf16a4

diff --git a/common/image-fit.c b/common/image-fit.c
index d3615ef6b5..b0f0c2614a 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -1194,10 +1194,12 @@ int fit_calculate_hash(const void *data, int data_len,
 			     (unsigned char *)value, CHUNKSZ_SHA1);
 		*value_len = 20;
 #endif
+#ifdef CONFIG_SHA256
 	} else if (IMAGE_ENABLE_SHA256 && strcmp(algo, "sha256") == 0) {
 		sha256_csum_wd((unsigned char *)data, data_len,
 			       (unsigned char *)value, CHUNKSZ_SHA256);
 		*value_len = SHA256_SUM_LEN;
+#endif
 #ifdef CONFIG_MD5
 	} else if (IMAGE_ENABLE_MD5 && strcmp(algo, "md5") == 0) {
 		md5_wd((unsigned char *)data, data_len, value, CHUNKSZ_MD5);

commit 2994e4dcba6c60354fc49e9ac9bb4ebb95a6d4b2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Aug 24 14:40:42 2021 +0800

    disk: rkparam: Support parse partition tables from macro PARTS_RKPARM
    
    Therefore the CONFIG_EFI_PARTITION can be disabled if we need
    a smaller u-boot.bin.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I6c319a96969363241d74a38984a53a51faa8ff51

diff --git a/disk/part_rkparm.c b/disk/part_rkparm.c
index cf4618371b..0d0890a125 100644
--- a/disk/part_rkparm.c
+++ b/disk/part_rkparm.c
@@ -88,8 +88,10 @@ static int rkparm_param_parse(char *param, struct list_head *parts_head,
 			printf("out of memory\n");
 			break;
 		}
+#ifndef PARTS_RKPARM
 		if (dev_desc->if_type != IF_TYPE_RKNAND)
 			offset = RK_PARAM_OFFSET;
+#endif
 		part->start = start + offset;
 		/* Last partition use all remain space */
 		if (size == (~0UL))
@@ -109,6 +111,17 @@ static int rkparm_param_parse(char *param, struct list_head *parts_head,
 static int rkparm_init_param(struct blk_desc *dev_desc,
 					  struct list_head *parts_head)
 {
+	char *parts_list;
+
+	/*
+	 * There are ways to get partition tables:
+	 *
+	 * 1. macro 'PARTS_RKPARM' string list (No RK_PARAM_OFFSET for every partition),
+	 * 2. Legacy rk parameter in flash @RK_PARAM_OFFSET sectors offset
+	 */
+#ifdef PARTS_RKPARM
+	parts_list = PARTS_RKPARM;
+#else
 	struct rkparm_param *param;
 	int offset = 0;
 	int ret;
@@ -127,8 +140,9 @@ static int rkparm_init_param(struct blk_desc *dev_desc,
 		printf("%s param read fail\n", __func__);
 		return -EINVAL;
 	}
-
-	return rkparm_param_parse(param->params, parts_head, dev_desc);
+	parts_list = param->params;
+#endif
+	return rkparm_param_parse(parts_list, parts_head, dev_desc);
 }
 
 static void part_print_rkparm(struct blk_desc *dev_desc)
@@ -219,7 +233,11 @@ static int part_test_rkparm(struct blk_desc *dev_desc)
  * list. We need to check EFI first, and then rkparm partition
  */
 U_BOOT_PART_TYPE(b_rkparm) = {
+#ifdef PARTS_RKPARM
+	.name		= "RKPARM(FIXED)",
+#else
 	.name		= "RKPARM",
+#endif
 	.part_type	= PART_TYPE_RKPARM,
 	.max_entries	= RKPARM_ENTRY_NUMBERS,
 	.get_info	= part_get_info_ptr(part_get_info_rkparm),

commit b9cfcfe6e23c5e21ea2b7f1922372dcfc46bbac0
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Nov 27 04:20:39 2021 +0000

    make.sh: print toolchains only when finish
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I0bb56ee0ec241a6d23befab316377aafa053471a

diff --git a/make.sh b/make.sh
index 776c1787a2..fb1ee3a794 100755
--- a/make.sh
+++ b/make.sh
@@ -278,7 +278,7 @@ function select_toolchain()
 		TOOLCHAIN_ADDR2LINE=${CROSS_COMPILE_ARM32}addr2line
 	fi
 
-	if ! which ${TOOLCHAIN}gcc ; then
+	if [ ! `which ${TOOLCHAIN}gcc` ]; then
 		echo "ERROR: No find ${TOOLCHAIN}gcc"
 		exit 1
 	fi
@@ -762,4 +762,5 @@ clean_files
 make PYTHON=python2 CROSS_COMPILE=${TOOLCHAIN} all --jobs=${JOB}
 pack_images
 finish
+echo ${TOOLCHAIN}
 date

commit 1e5eaf8fd9e138981587c24833f97317bd46c2e1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Nov 27 03:55:07 2021 +0000

    memblk.h: increase MEM_RESV_COUNT
    
    In order to pass more memory banks to kernel which overs 4GB.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I93393679d60d24f0628fc7bd272438f053e6cd81

diff --git a/include/memblk.h b/include/memblk.h
index 50a12c15fd..37f8ee4367 100644
--- a/include/memblk.h
+++ b/include/memblk.h
@@ -7,7 +7,7 @@
 #define _MEMBLK_H
 
 #define ALIAS_COUNT_MAX		2
-#define MEM_RESV_COUNT		3
+#define MEM_RESV_COUNT		10
 
 enum memblk_id {
 	MEM_UNK,

commit 7d3c933e672dfbf17939ca67010e2db5136e6435
Author: Jianwei Zheng <jianwei.zheng@rock-chips.com>
Date:   Thu Nov 11 10:42:14 2021 +0800

    common: usb: fix the failure to read the descriptor
    
    current code to read the descriptor of this device failed, so delay 200us when sending control message.
    
    Signed-off-by: Jianwei Zheng <jianwei.zheng@rock-chips.com>
    Change-Id: I4746bd9d12052154578c477829b6218220501023

diff --git a/common/usb.c b/common/usb.c
old mode 100644
new mode 100755
index 1b0b7f2d93..5537d8ddc3
--- a/common/usb.c
+++ b/common/usb.c
@@ -256,6 +256,9 @@ int usb_control_msg(struct usb_device *dev, unsigned int pipe,
 	if (dev->status)
 		return -1;
 
+	if(dev->descriptor.idVendor == 0x058f && dev->descriptor.idProduct == 0x6387)
+		udelay(200);
+
 	return dev->act_len;
 
 }

commit c1006ae050013b0da2fa472ce65aba84249a249f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 22 03:03:03 2021 +0000

    spl: fit: support bring up max 5 mcu firmware
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ic2a137985d5865f5d34c1a4c00f4bbe41c780890

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 9d637bf920..b19e0c6a33 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -379,7 +379,7 @@ static int spl_fit_image_get_os(const void *fit, int noffset, uint8_t *os)
 #endif
 }
 
-__weak int spl_fit_standalone_release(uintptr_t entry_point)
+__weak int spl_fit_standalone_release(char *id, uintptr_t entry_point)
 {
 	return 0;
 }
@@ -579,6 +579,7 @@ static int spl_internal_load_simple_fit(struct spl_image_info *spl_image,
 					ulong sector, void *fit_header)
 {
 	struct spl_image_info image_info;
+	char *desc;
 	int base_offset;
 	int images, ret;
 	int index = 0;
@@ -647,27 +648,33 @@ static int spl_internal_load_simple_fit(struct spl_image_info *spl_image,
 	 * Normally, different cores' firmware is attach to the config
 	 * "loadables" and load them together.
 	 */
-	if (node < 0)
-		node = spl_fit_get_image_node(fit, images, FIT_STANDALONE_PROP,
-					      0);
-	if (node > 0) {
-		/* Load the image and set up the spl_image structure */
-		ret = spl_load_fit_image(info, sector, fit, base_offset, node,
-					 &image_info);
+	for (; ; index++) {
+		node = spl_fit_get_image_node(fit, images,
+					      FIT_STANDALONE_PROP, index);
+		if (node < 0)
+			break;
+
+		ret = spl_load_fit_image(info, sector, fit, base_offset,
+					 node, &image_info);
+		if (ret)
+			return ret;
+
+		ret = fit_get_desc(fit, node, &desc);
 		if (ret)
 			return ret;
 
 		if (image_info.entry_point == FDT_ERROR)
 			image_info.entry_point = image_info.load_addr;
 
-		ret = spl_fit_standalone_release(image_info.entry_point);
+		ret = spl_fit_standalone_release(desc, image_info.entry_point);
 		if (ret)
-			printf("Start standalone fail, ret = %d\n", ret);
-
-		/* standalone is special one, continue to find others */
-		node = -1;
+			printf("%s: start standalone fail, ret=%d\n", desc, ret);
 	}
 
+	/* standalone is special one, continue to find others */
+	node = -1;
+	index = 0;
+
 	/*
 	 * Find the U-Boot image using the following search order:
 	 *   - start at 'firmware' (e.g. an ARM Trusted Firmware)

commit bc77fafe9796277a035fba2cf9b2a6fe193b16a7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 22 03:01:49 2021 +0000

    rockchip: fit sh: tidy up
    
    - add common nodes generate functions
    - support pack max 5 mcu firmwares
    - support pack max 5 loadable firmwares
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Iba147d47a30cea88cbd0d1751d12a68bc6f4c3bd

diff --git a/arch/arm/mach-rockchip/fit_args.sh b/arch/arm/mach-rockchip/fit_args.sh
new file mode 100755
index 0000000000..e1c5561874
--- /dev/null
+++ b/arch/arm/mach-rockchip/fit_args.sh
@@ -0,0 +1,166 @@
+#!/bin/bash
+#
+# Copyright (c) 2020 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier: GPL-2.0
+#
+
+srctree=$PWD
+
+function help()
+{
+	echo
+	echo "Description:"
+	echo "    Process args for all rockchip fit generator script, and providing variables for it's caller"
+	echo
+	echo "Usage:"
+	echo "    $0 [args]"
+	echo
+	echo "[args]:"
+	echo "--------------------------------------------------------------------------------------------"
+	echo "    arg                 type       output variable       description"
+	echo "--------------------------------------------------------------------------------------------"
+	echo "    -c [comp]     ==>   <string>   COMPRESSION           set compression: \"none\", \"gzip\""
+	echo "    -m0 [offset]  ==>   <hex>      MCU0_LOAD_ADDR        set mcu0.bin load address"
+	echo "    -m1 [offset]  ==>   <hex>      MCU1_LOAD_ADDR        set mcu1.bin load address"
+	echo "    -m2 [offset]  ==>   <hex>      MCU2_LOAD_ADDR        set mcu2.bin load address"
+	echo "    -m3 [offset]  ==>   <hex>      MCU3_LOAD_ADDR        set mcu3.bin load address"
+	echo "    -m4 [offset]  ==>   <hex>      MCU4_LOAD_ADDR        set mcu4.bin load address"
+	echo "    -l0 [offset]  ==>   <hex>      LOAD0_LOAD_ADDR       set load0.bin load address"
+	echo "    -l1 [offset]  ==>   <hex>      LOAD1_LOAD_ADDR       set load1.bin load address"
+	echo "    -l2 [offset]  ==>   <hex>      LOAD2_LOAD_ADDR       set load2.bin load address"
+	echo "    -l3 [offset]  ==>   <hex>      LOAD3_LOAD_ADDR       set load3.bin load address"
+	echo "    -l4 [offset]  ==>   <hex>      LOAD4_LOAD_ADDR       set load4.bin load address"
+	echo "    -t [offset]   ==>   <hex>      TEE_LOAD_ADDR         set tee.bin load address"
+	echo "    (none)        ==>   <hex>      UBOOT_LOAD_ADDR       set U-Boot load address"
+	echo "    (none)        ==>   <string>   ARCH                  set arch: \"arm\", \"arm64\""
+	echo
+}
+
+if [ $# -eq 1 ]; then
+	# default
+	TEE_OFFSET=0x08400000
+else
+	# args
+	while [ $# -gt 0 ]; do
+		case $1 in
+			--help|-help|help|--h|-h)
+				help
+				exit
+				;;
+			-c)
+				COMPRESSION=$2
+				shift 2
+				;;
+			-m0)
+				MCU0_OFFSET=$2
+				shift 2
+				;;
+			-m1)
+				MCU1_OFFSET=$2
+				shift 2
+				;;
+			-m2)
+				MCU2_OFFSET=$2
+				shift 2
+				;;
+			-m3)
+				MCU3_OFFSET=$2
+				shift 2
+				;;
+			-m4)
+				MCU4_OFFSET=$2
+				shift 2
+				;;
+			-l0)
+				LOAD0_OFFSET=$2
+				shift 2
+				;;
+			-l1)
+				LOAD1_OFFSET=$2
+				shift 2
+				;;
+			-l2)
+				LOAD2_OFFSET=$2
+				shift 2
+				;;
+			-l3)
+				LOAD3_OFFSET=$2
+				shift 2
+				;;
+			-l4)
+				LOAD4_OFFSET=$2
+				shift 2
+				;;
+			-t)
+				TEE_OFFSET=$2
+				shift 2
+				;;
+			*)
+				echo "Invalid arg: $1"
+				help
+				exit 1
+				;;
+		esac
+	done
+fi
+
+# Base
+DARM_BASE=`sed -n "/CONFIG_SYS_SDRAM_BASE=/s/CONFIG_SYS_SDRAM_BASE=//p" ${srctree}/include/autoconf.mk|tr -d '\r'`
+UBOOT_LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${srctree}/include/autoconf.mk|tr -d '\r'`
+if grep -q '^CONFIG_ARM64=y' .config ; then
+	ARCH="arm64"
+else
+	ARCH="arm"
+fi
+
+# tee
+if [ ! -z "${TEE_OFFSET}" ]; then
+	TEE_LOAD_ADDR=$((DARM_BASE+TEE_OFFSET))
+	TEE_LOAD_ADDR=$(echo "obase=16;${TEE_LOAD_ADDR}"|bc)
+fi
+
+# mcu
+if [ ! -z "${MCU0_OFFSET}" ]; then
+	MCU0_LOAD_ADDR=$((DARM_BASE+$MCU0_OFFSET))
+	MCU0_LOAD_ADDR=$(echo "obase=16;${MCU0_LOAD_ADDR}"|bc)
+fi
+if [ ! -z "${MCU1_OFFSET}" ]; then
+	MCU1_LOAD_ADDR=$((DARM_BASE+$MCU1_OFFSET))
+	MCU1_LOAD_ADDR=$(echo "obase=16;${MCU1_LOAD_ADDR}"|bc)
+fi
+if [ ! -z "${MCU2_OFFSET}" ]; then
+	MCU2_LOAD_ADDR=$((DARM_BASE+$MCU2_OFFSET))
+	MCU2_LOAD_ADDR=$(echo "obase=16;${MCU2_LOAD_ADDR}"|bc)
+fi
+if [ ! -z "${MCU3_OFFSET}" ]; then
+	MCU3_LOAD_ADDR=$((DARM_BASE+$MCU3_OFFSET))
+	MCU3_LOAD_ADDR=$(echo "obase=16;${MCU3_LOAD_ADDR}"|bc)
+fi
+if [ ! -z "${MCU4_OFFSET}" ]; then
+	MCU4_LOAD_ADDR=$((DARM_BASE+$MCU4_OFFSET))
+	MCU4_LOAD_ADDR=$(echo "obase=16;${MCU4_LOAD_ADDR}"|bc)
+fi
+
+# loadables
+if [ ! -z "${LOAD0_OFFSET}" ]; then
+	LOAD0_LOAD_ADDR=$((DARM_BASE+$LOAD0_OFFSET))
+	LOAD0_LOAD_ADDR=$(echo "obase=16;${LOAD0_LOAD_ADDR}"|bc)
+fi
+if [ ! -z "${LOAD1_OFFSET}" ]; then
+	LOAD1_LOAD_ADDR=$((DARM_BASE+$LOAD1_OFFSET))
+	LOAD1_LOAD_ADDR=$(echo "obase=16;${LOAD1_LOAD_ADDR}"|bc)
+fi
+if [ ! -z "${LOAD2_OFFSET}" ]; then
+	LOAD2_LOAD_ADDR=$((DARM_BASE+$LOAD2_OFFSET))
+	LOAD2_LOAD_ADDR=$(echo "obase=16;${LOAD2_LOAD_ADDR}"|bc)
+fi
+if [ ! -z "${LOAD3_OFFSET}" ]; then
+	LOAD3_LOAD_ADDR=$((DARM_BASE+$LOAD3_OFFSET))
+	LOAD3_LOAD_ADDR=$(echo "obase=16;${LOAD3_LOAD_ADDR}"|bc)
+fi
+if [ ! -z "${LOAD4_OFFSET}" ]; then
+	LOAD4_LOAD_ADDR=$((DARM_BASE+$LOAD4_OFFSET))
+	LOAD4_LOAD_ADDR=$(echo "obase=16;${LOAD4_LOAD_ADDR}"|bc)
+fi
+# echo " ## $DARM_BASE, $UBOOT_LOAD_ADDR, $TEE_LOAD_ADDR, $MCU0_LOAD_ADDR, $MCU1_LOAD_ADDR, $MCU2_LOAD_ADDR, $MCU3_LOAD_ADDR, $MCU4_LOAD_ADDR"
diff --git a/arch/arm/mach-rockchip/fit_nodes.sh b/arch/arm/mach-rockchip/fit_nodes.sh
new file mode 100755
index 0000000000..538a000d7d
--- /dev/null
+++ b/arch/arm/mach-rockchip/fit_nodes.sh
@@ -0,0 +1,341 @@
+#!/bin/bash
+#
+# Copyright (C) 2021 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+# Process args and auto set variables
+source ./${srctree}/arch/arm/mach-rockchip/fit_args.sh
+rm -f ${srctree}/*.digest ${srctree}/*.bin.gz ${srctree}/bl31_0x*.bin
+
+# compression
+if [ "${COMPRESSION}" == "gzip" ]; then
+	SUFFIX=".gz"
+else
+	COMPRESSION="none"
+	SUFFIX=
+fi
+
+# nodes
+function gen_uboot_node()
+{
+	echo "		uboot {
+			description = \"U-Boot\";
+			data = /incbin/(\"./u-boot-nodtb.bin${SUFFIX}\");
+			type = \"standalone\";
+			arch = \"${ARCH}\";
+			os = \"U-Boot\";
+			compression = \"${COMPRESSION}\";
+			load = <"${UBOOT_LOAD_ADDR}">;
+			hash {
+				algo = \"sha256\";
+			};"
+	if [ "${COMPRESSION}" == "gzip" ]; then
+		echo "			digest {
+				value = /incbin/(\"./u-boot-nodtb.bin.digest\");
+				algo = \"sha256\";
+			};"
+		openssl dgst -sha256 -binary -out u-boot-nodtb.bin.digest u-boot-nodtb.bin
+		UBOOT_SZ=`ls -l u-boot-nodtb.bin | awk '{ print $5 }'`
+		if [ ${UBOOT_SZ} -gt 0 ]; then
+			gzip -k -f -9 ${srctree}/u-boot-nodtb.bin
+		else
+			touch ${srctree}/u-boot-nodtb.bin.gz
+		fi
+	fi
+	echo "		};"
+}
+
+function gen_fdt_node()
+{
+	echo "		fdt {
+			description = \"U-Boot dtb\";
+			data = /incbin/(\"./u-boot.dtb\");
+			type = \"flat_dt\";
+			arch = \"${ARCH}\";
+			compression = \"none\";
+			hash {
+				algo = \"sha256\";
+			};
+		};
+	};"
+};
+
+function gen_kfdt_node()
+{
+	KERN_DTB=`sed -n "/CONFIG_EMBED_KERNEL_DTB_PATH=/s/CONFIG_EMBED_KERNEL_DTB_PATH=//p" .config | tr -d '"'`
+	if [ -z "${KERN_DTB}" ]; then
+		return;
+	fi
+
+	if [ -f ${srctree}/${KERN_DTB} ]; then
+	PROP_KERN_DTB=', "kern-fdt"';
+	echo "		kern-fdt {
+			description = \"${KERN_DTB}\";
+			data = /incbin/(\"${KERN_DTB}\");
+			type = \"flat_dt\";
+			arch = \"${ARCH}\";
+			compression = \"none\";
+			hash {
+				algo = \"sha256\";
+			};
+		};"
+	fi
+}
+
+function gen_bl31_node()
+{
+	${srctree}/arch/arm/mach-rockchip/decode_bl31.py
+
+	NUM=1
+	for NAME in `ls -l bl31_0x*.bin | sort --key=5 -nr | awk '{ print $9 }'`
+	do
+		ATF_LOAD_ADDR=`echo ${NAME} | awk -F "_" '{ printf $2 }' | awk -F "." '{ printf $1 }'`
+		# only atf-1 support compress
+		if [ "${COMPRESSION}" == "gzip" -a ${NUM} -eq 1  ]; then
+			openssl dgst -sha256 -binary -out ${NAME}.digest ${NAME}
+			gzip -k -f -9 ${NAME}
+
+			echo "		atf-${NUM} {
+			description = \"ARM Trusted Firmware\";
+			data = /incbin/(\"./${NAME}${SUFFIX}\");
+			type = \"firmware\";
+			arch = \"${ARCH}\";
+			os = \"arm-trusted-firmware\";
+			compression = \"${COMPRESSION}\";
+			load = <"${ATF_LOAD_ADDR}">;
+			hash {
+				algo = \"sha256\";
+			};
+			digest {
+				value = /incbin/(\"./${NAME}.digest\");
+				algo = \"sha256\";
+			};
+		};"
+		else
+			echo "		atf-${NUM} {
+			description = \"ARM Trusted Firmware\";
+			data = /incbin/(\"./${NAME}\");
+			type = \"firmware\";
+			arch = \"${ARCH}\";
+			os = \"arm-trusted-firmware\";
+			compression = \"none\";
+			load = <"${ATF_LOAD_ADDR}">;
+			hash {
+				algo = \"sha256\";
+			};
+		};"
+		fi
+
+		if [ ${NUM} -gt 1 ]; then
+			LOADABLE_ATF=${LOADABLE_ATF}", \"atf-${NUM}\""
+		fi
+		NUM=`expr ${NUM} + 1`
+	done
+}
+
+function gen_bl32_node()
+{
+	if [ -z ${TEE_LOAD_ADDR} ]; then
+		return
+	fi
+
+	if [ "${ARCH}" == "arm" ]; then
+		ENTRY="entry = <0x${TEE_LOAD_ADDR}>;"
+	fi
+	echo "		optee {
+			description = \"OP-TEE\";
+			data = /incbin/(\"./tee.bin${SUFFIX}\");
+			type = \"firmware\";
+			arch = \"${ARCH}\";
+			os = \"op-tee\";
+			compression = \"${COMPRESSION}\";
+			load = <"0x${TEE_LOAD_ADDR}">;
+			${ENTRY}
+			hash {
+				algo = \"sha256\";
+			};"
+	if [ "${COMPRESSION}" == "gzip" ]; then
+		echo "			digest {
+				value = /incbin/(\"./tee.bin.digest\");
+				algo = \"sha256\";
+			};"
+		openssl dgst -sha256 -binary -out tee.bin.digest tee.bin
+		gzip -k -f -9 tee.bin
+	fi
+
+	LOADABLE_OPTEE=", \"optee\""
+	echo "		};"
+}
+
+function gen_mcu_node()
+{
+	for ((i=0, n=0; i<5; i++))
+	do
+		if [ ${i} -eq 0 ]; then
+			MCU_ADDR=${MCU0_LOAD_ADDR}
+		elif [ ${i} -eq 1 ]; then
+			MCU_ADDR=${MCU1_LOAD_ADDR}
+		elif [ ${i} -eq 2 ]; then
+			MCU_ADDR=${MCU2_LOAD_ADDR}
+		elif [ ${i} -eq 3 ]; then
+			MCU_ADDR=${MCU3_LOAD_ADDR}
+		elif [ ${i} -eq 4 ]; then
+			MCU_ADDR=${MCU4_LOAD_ADDR}
+		fi
+
+		if [ -z ${MCU_ADDR} ]; then
+			continue
+		fi
+		MCU="mcu${i}"
+		echo "		${MCU} {
+			description = \"${MCU}\";
+			type = \"standalone\";
+			arch = \"riscv\";
+			data = /incbin/(\"./${MCU}.bin${SUFFIX}\");
+			compression = \"${COMPRESSION}\";
+			load = <0x"${MCU_ADDR}">;
+			hash {
+				algo = \"sha256\";
+			};"
+		if [ "${COMPRESSION}" == "gzip" ]; then
+			echo "			digest {
+				value = /incbin/(\"./${MCU}.bin.digest\");
+				algo = \"sha256\";
+			};"
+			openssl dgst -sha256 -binary -out ${MCU}.bin.digest ${MCU}.bin
+			gzip -k -f -9 ${MCU}.bin
+		fi
+		echo "		};"
+		if [ ${n} -eq 0 ]; then
+			STANDALONE_LIST=${STANDALONE_LIST}"\"${MCU}\""
+		else
+			STANDALONE_LIST=${STANDALONE_LIST}", \"${MCU}\""
+		fi
+		n=`expr ${n} + 1`
+
+		STANDALONE_SIGN=", \"standalone\""
+		STANDALONE_MCU="standalone = ${STANDALONE_LIST};"
+	done
+}
+
+function gen_loadable_node()
+{
+	for ((i=0; i<5; i++))
+	do
+		if [ ${i} -eq 0 ]; then
+			LOAD_ADDR=${LOAD0_LOAD_ADDR}
+		elif [ ${i} -eq 1 ]; then
+			LOAD_ADDR=${LOAD1_LOAD_ADDR}
+		elif [ ${i} -eq 2 ]; then
+			LOAD_ADDR=${LOAD2_LOAD_ADDR}
+		elif [ ${i} -eq 3 ]; then
+			LOAD_ADDR=${LOAD3_LOAD_ADDR}
+		elif [ ${i} -eq 4 ]; then
+			LOAD_ADDR=${LOAD4_LOAD_ADDR}
+		fi
+
+		if [ -z ${LOAD_ADDR} ]; then
+			continue
+		fi
+		LOAD="load${i}"
+		echo "		${LOAD} {
+			description = \"${LOAD}\";
+			type = \"standalone\";
+			arch = \"${ARCH}\";
+			data = /incbin/(\"./${LOAD}.bin${SUFFIX}\");
+			compression = \"${COMPRESSION}\";
+			load = <0x"${LOAD_ADDR}">;
+			hash {
+				algo = \"sha256\";
+			};"
+		if [ "${COMPRESSION}" == "gzip" ]; then
+			echo "			digest {
+				value = /incbin/(\"./${LOAD}.bin.digest\");
+				algo = \"sha256\";
+			};"
+			openssl dgst -sha256 -binary -out ${LOAD}.bin.digest ${LOAD}.bin
+			gzip -k -f -9 ${LOAD}.bin
+		fi
+		echo "		};"
+
+		LOADABLE_OTHER=${LOADABLE_OTHER}", \"${LOAD}\""
+	done
+}
+
+function gen_header()
+{
+echo "
+/*
+ * Copyright (C) 2020 Rockchip Electronic Co.,Ltd
+ *
+ * Simple U-boot fit source file containing ATF/OP-TEE/U-Boot/dtb/MCU
+ */
+
+/dts-v1/;
+
+/ {
+	description = \"FIT Image with ATF/OP-TEE/U-Boot/MCU\";
+	#address-cells = <1>;
+
+	images {
+"
+}
+
+function gen_arm64_configurations()
+{
+PLATFORM=`sed -n "/CONFIG_DEFAULT_DEVICE_TREE/p" .config | awk -F "=" '{ print $2 }' | tr -d '"'`
+if grep  -q '^CONFIG_FIT_ENABLE_RSASSA_PSS_SUPPORT=y' .config ; then
+	ALGO_PADDING="				padding = \"pss\";"
+fi
+echo "
+	configurations {
+		default = \"conf\";
+		conf {
+			description = \"${PLATFORM}\";
+			rollback-index = <0x0>;
+			firmware = \"atf-1\";
+			loadables = \"uboot\"${LOADABLE_ATF}${LOADABLE_OPTEE}${LOADABLE_OTHER};
+			${STANDALONE_MCU}
+			fdt = \"fdt\"${PROP_KERN_DTB};
+			signature {
+				algo = \"sha256,rsa2048\";
+				${ALGO_PADDING}
+				key-name-hint = \"dev\";
+				sign-images = \"fdt\", \"firmware\", \"loadables\"${STANDALONE_SIGN};
+			};
+		};
+	};
+};
+"
+}
+
+function gen_arm_configurations()
+{
+PLATFORM=`sed -n "/CONFIG_DEFAULT_DEVICE_TREE/p" .config | awk -F "=" '{ print $2 }' | tr -d '"'`
+if grep  -q '^CONFIG_FIT_ENABLE_RSASSA_PSS_SUPPORT=y' .config ; then
+        ALGO_PADDING="                          padding = \"pss\";"
+fi
+echo "
+	configurations {
+		default = \"conf\";
+		conf {
+			description = \"${PLATFORM}\";
+			rollback-index = <0x0>;
+			firmware = \"optee\";
+			loadables = \"uboot\"${LOADABLE_OTHER};
+			${STANDALONE_MCU}
+			fdt = \"fdt\"${PROP_KERN_DTB};
+			signature {
+				algo = \"sha256,rsa2048\";
+				${ALGO_PADDING}
+				key-name-hint = \"dev\";
+				sign-images = \"fdt\", \"firmware\", \"loadables\"${STANDALONE_SIGN};
+			};
+		};
+	};
+};
+"
+}
+
diff --git a/arch/arm/mach-rockchip/make_fit_args.sh b/arch/arm/mach-rockchip/make_fit_args.sh
deleted file mode 100755
index 2e35cd63f9..0000000000
--- a/arch/arm/mach-rockchip/make_fit_args.sh
+++ /dev/null
@@ -1,84 +0,0 @@
-#!/bin/bash
-#
-# Copyright (c) 2020 Rockchip Electronics Co., Ltd
-#
-# SPDX-License-Identifier: GPL-2.0
-#
-
-srctree=$PWD
-
-function help()
-{
-	echo
-	echo "Description:"
-	echo "    Process args for all rockchip fit generator script, and providing variables for it's caller"
-	echo
-	echo "Usage:"
-	echo "    $0 [args]"
-	echo
-	echo "[args]:"
-	echo "--------------------------------------------------------------------------------------------"
-	echo "    arg                 type       output variable       description"
-	echo "--------------------------------------------------------------------------------------------"
-	echo "    -c [comp]     ==>   <string>   COMPRESSION           set compression: \"none\", \"gzip\""
-	echo "    -m [offset]   ==>   <hex>      MCU_LOAD_ADDR         set mcu.bin load address"
-	echo "    -t [offset]   ==>   <hex>      TEE_LOAD_ADDR         set tee.bin load address"
-	echo "    (none)        ==>   <hex>      UBOOT_LOAD_ADDR       set U-Boot load address"
-	echo "    (none)        ==>   <string>   ARCH                  set arch: \"arm\", \"arm64\""
-	echo
-}
-
-if [ $# -eq 1 ]; then
-	# default
-	TEE_OFFSET=0x08400000
-else
-	# args
-	while [ $# -gt 0 ]; do
-		case $1 in
-			--help|-help|help|--h|-h)
-				help
-				exit
-				;;
-			-c)
-				COMPRESSION=$2
-				shift 2
-				;;
-			-m)
-				MCU_OFFSET=$2
-				shift 2
-				;;
-			-t)
-				TEE_OFFSET=$2
-				shift 2
-				;;
-			*)
-				echo "Invalid arg: $1"
-				help
-				exit 1
-				;;
-		esac
-	done
-fi
-
-# Base
-DARM_BASE=`sed -n "/CONFIG_SYS_SDRAM_BASE=/s/CONFIG_SYS_SDRAM_BASE=//p" ${srctree}/include/autoconf.mk|tr -d '\r'`
-UBOOT_LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${srctree}/include/autoconf.mk|tr -d '\r'`
-if grep -q '^CONFIG_ARM64=y' .config ; then
-	ARCH="arm64"
-else
-	ARCH="arm"
-fi
-
-# tee
-if [ ! -z "${TEE_OFFSET}" ]; then
-	TEE_LOAD_ADDR=$((DARM_BASE+TEE_OFFSET))
-	TEE_LOAD_ADDR=$(echo "obase=16;${TEE_LOAD_ADDR}"|bc)
-fi
-
-# mcu
-if [ ! -z "$MCU_OFFSET" ]; then
-	MCU_LOAD_ADDR=$((DARM_BASE+$MCU_OFFSET))
-	MCU_LOAD_ADDR=$(echo "obase=16;${MCU_LOAD_ADDR}"|bc)
-fi
-
-# echo " ## $DARM_BASE, $UBOOT_LOAD_ADDR, $TEE_LOAD_ADDR, $MCU_LOAD_ADDR"
diff --git a/arch/arm/mach-rockchip/make_fit_atf.sh b/arch/arm/mach-rockchip/make_fit_atf.sh
index 4f2780e67b..32ef33b8b0 100755
--- a/arch/arm/mach-rockchip/make_fit_atf.sh
+++ b/arch/arm/mach-rockchip/make_fit_atf.sh
@@ -5,237 +5,14 @@
 # SPDX-License-Identifier:     GPL-2.0+
 #
 
-# Process args and auto set variables
-source ./${srctree}/arch/arm/mach-rockchip/make_fit_args.sh
-
-rm -f ${srctree}/*.digest ${srctree}/*.bin.gz ${srctree}/bl31_0x*.bin
-${srctree}/arch/arm/mach-rockchip/decode_bl31.py
-
-if [ "${COMPRESSION}" == "gzip" ]; then
-	SUFFIX=".gz"
-else
-	COMPRESSION="none"
-	SUFFIX=
-fi
-
-if grep  -q '^CONFIG_FIT_ENABLE_RSASSA_PSS_SUPPORT=y' .config ; then
-	ALGO_PADDING="				padding = \"pss\";"
-fi
-
-function generate_uboot_node()
-{
-	echo "		uboot {
-			description = \"U-Boot(64-bit)\";
-			data = /incbin/(\"./u-boot-nodtb.bin${SUFFIX}\");
-			type = \"standalone\";
-			arch = \"arm64\";
-			os = \"U-Boot\";
-			compression = \"${COMPRESSION}\";
-			load = <"${UBOOT_LOAD_ADDR}">;
-			hash {
-				algo = \"sha256\";
-			};"
-	if [ "${COMPRESSION}" == "gzip" ]; then
-		echo "			digest {
-				value = /incbin/(\"./u-boot-nodtb.bin.digest\");
-				algo = \"sha256\";
-			};"
-		openssl dgst -sha256 -binary -out u-boot-nodtb.bin.digest u-boot-nodtb.bin
-		UBOOT_SZ=`ls -l u-boot-nodtb.bin | awk '{ print $5 }'`
-		if [ ${UBOOT_SZ} -gt 0 ]; then
-			gzip -k -f -9 ${srctree}/u-boot-nodtb.bin
-		else
-			touch ${srctree}/u-boot-nodtb.bin.gz
-		fi
-	fi
-	echo "		};"
-}
-
-function generate_kfdt_node()
-{
-	KERN_DTB=`sed -n "/CONFIG_EMBED_KERNEL_DTB_PATH=/s/CONFIG_EMBED_KERNEL_DTB_PATH=//p" .config | tr -d '"'`
-	if [ -z "${KERN_DTB}" ]; then
-		return;
-	fi
-
-	if [ -f ${srctree}/${KERN_DTB} ]; then
-	PROP_KERN_DTB=', "kern-fdt"';
-	echo "		kern-fdt {
-			description = \"${KERN_DTB}\";
-			data = /incbin/(\"${KERN_DTB}\");
-			type = \"flat_dt\";
-			arch = \"${ARCH}\";
-			compression = \"none\";
-			hash {
-				algo = \"sha256\";
-			};
-		};"
-	fi
-}
-
-function generate_bl31_node()
-{
-	NUM=1
-	for NAME in `ls -l bl31_0x*.bin | sort --key=5 -nr | awk '{ print $9 }'`
-	do
-		ATF_LOAD_ADDR=`echo ${NAME} | awk -F "_" '{ printf $2 }' | awk -F "." '{ printf $1 }'`
-		# only atf-1 support compress
-		if [ "${COMPRESSION}" == "gzip" -a ${NUM} -eq 1  ]; then
-			openssl dgst -sha256 -binary -out ${NAME}.digest ${NAME}
-			gzip -k -f -9 ${NAME}
-
-			echo "		atf-${NUM} {
-			description = \"ARM Trusted Firmware\";
-			data = /incbin/(\"./${NAME}${SUFFIX}\");
-			type = \"firmware\";
-			arch = \"arm64\";
-			os = \"arm-trusted-firmware\";
-			compression = \"${COMPRESSION}\";
-			load = <"${ATF_LOAD_ADDR}">;
-			hash {
-				algo = \"sha256\";
-			};
-			digest {
-				value = /incbin/(\"./${NAME}.digest\");
-				algo = \"sha256\";
-			};
-		};"
-		else
-			echo "		atf-${NUM} {
-			description = \"ARM Trusted Firmware\";
-			data = /incbin/(\"./${NAME}\");
-			type = \"firmware\";
-			arch = \"arm64\";
-			os = \"arm-trusted-firmware\";
-			compression = \"none\";
-			load = <"${ATF_LOAD_ADDR}">;
-			hash {
-				algo = \"sha256\";
-			};
-		};"
-		fi
-
-		if [ ${NUM} -gt 1 ]; then
-			LOADABLE_ATF=${LOADABLE_ATF}", \"atf-${NUM}\""
-		fi
-		NUM=`expr ${NUM} + 1`
-	done
-}
-
-function generate_bl32_node()
-{
-	if [ -z ${TEE_LOAD_ADDR} ]; then
-		return
-	fi
-
-	echo "		optee {
-			description = \"OP-TEE\";
-			data = /incbin/(\"./tee.bin${SUFFIX}\");
-			type = \"firmware\";
-			arch = \"arm64\";
-			os = \"op-tee\";
-			compression = \"${COMPRESSION}\";
-			load = <"0x${TEE_LOAD_ADDR}">;
-			hash {
-				algo = \"sha256\";
-			};"
-	if [ "${COMPRESSION}" == "gzip" ]; then
-		echo "			digest {
-				value = /incbin/(\"./tee.bin.digest\");
-				algo = \"sha256\";
-			};"
-		openssl dgst -sha256 -binary -out tee.bin.digest tee.bin
-		gzip -k -f -9 tee.bin
-	fi
-
-	LOADABLE_OPTEE=", \"optee\""
-	echo "		};"
-}
-
-function generate_mcu_node()
-{
-	if [ -z ${MCU_LOAD_ADDR} ]; then
-		return
-	fi
-
-	echo "		mcu {
-			description = \"mcu\";
-			type = \"standalone\";
-			arch = \"riscv\";
-			data = /incbin/(\"./mcu.bin${SUFFIX}\");
-			compression = \"${COMPRESSION}\";
-			load = <0x"${MCU_LOAD_ADDR}">;
-			hash {
-				algo = \"sha256\";
-			};"
-	if [ "${COMPRESSION}" == "gzip" ]; then
-		echo "			digest {
-				value = /incbin/(\"./mcu.bin.digest\");
-				algo = \"sha256\";
-			};"
-		openssl dgst -sha256 -binary -out mcu.bin.digest mcu.bin
-		gzip -k -f -9 mcu.bin
-	fi
-
-	STANDALONE_SIGN=", \"standalone\""
-	STANDALONE_MCU="standalone = \"mcu\";"
-	echo "		};"
-}
-########################################################################################################
-THIS_PLAT=`sed -n "/CONFIG_DEFAULT_DEVICE_TREE/p" .config | awk -F "=" '{ print $2 }' | tr -d '"'`
-
-cat << EOF
-/*
- * Copyright (C) 2020 Rockchip Electronic Co.,Ltd
- *
- * Simple U-boot fit source file containing ATF/OP-TEE/U-Boot/dtb
- */
-
-/dts-v1/;
-
-/ {
-	description = "FIT Image with ATF/OP-TEE/U-Boot";
-	#address-cells = <1>;
-
-	images {
-EOF
-
-	# generate nodes dynamically
-	generate_uboot_node
-	generate_bl31_node
-	generate_bl32_node
-	generate_mcu_node
-	generate_kfdt_node
-
-cat << EOF
-		fdt {
-			description = "U-Boot dtb";
-			data = /incbin/("./u-boot.dtb");
-			type = "flat_dt";
-			arch = "${ARCH}";
-			compression = "none";
-			hash {
-				algo = "sha256";
-			};
-		};
-	};
-
-	configurations {
-		default = "conf";
-		conf {
-			description = "${THIS_PLAT}";
-			rollback-index = <0x0>;
-			firmware = "atf-1";
-			loadables = "uboot"${LOADABLE_ATF}${LOADABLE_OPTEE};
-			${STANDALONE_MCU}
-			fdt = "fdt"${PROP_KERN_DTB};
-			signature {
-				algo = "sha256,rsa2048";
-				${ALGO_PADDING}
-				key-name-hint = "dev";
-				sign-images = "fdt", "firmware", "loadables"${STANDALONE_SIGN};
-			};
-		};
-	};
-};
-EOF
+source ./${srctree}/arch/arm/mach-rockchip/fit_nodes.sh
+
+gen_header
+gen_uboot_node
+gen_bl31_node
+gen_bl32_node
+gen_mcu_node
+gen_loadable_node
+gen_kfdt_node
+gen_fdt_node
+gen_arm64_configurations
diff --git a/arch/arm/mach-rockchip/make_fit_boot.sh b/arch/arm/mach-rockchip/make_fit_boot.sh
index 2db15d89a1..1258235c9e 100755
--- a/arch/arm/mach-rockchip/make_fit_boot.sh
+++ b/arch/arm/mach-rockchip/make_fit_boot.sh
@@ -6,7 +6,7 @@
 #
 
 # Process args and auto set variables
-source ./${srctree}/arch/arm/mach-rockchip/make_fit_args.sh
+source ./${srctree}/arch/arm/mach-rockchip/fit_args.sh
 
 if [ ! -f ${srctree}/images/ramdisk ]; then
 	touch ${srctree}/images/ramdisk
diff --git a/arch/arm/mach-rockchip/make_fit_optee.sh b/arch/arm/mach-rockchip/make_fit_optee.sh
index e569c9d033..b05d4d2373 100755
--- a/arch/arm/mach-rockchip/make_fit_optee.sh
+++ b/arch/arm/mach-rockchip/make_fit_optee.sh
@@ -5,173 +5,14 @@
 # SPDX-License-Identifier:     GPL-2.0+
 #
 
-# Process args and auto set variables
-source ./${srctree}/arch/arm/mach-rockchip/make_fit_args.sh
+source ./${srctree}/arch/arm/mach-rockchip/fit_nodes.sh
 
-rm -f ${srctree}/*.digest ${srctree}/*.bin.gz
+gen_header
+gen_uboot_node
+gen_bl32_node
+gen_mcu_node
+gen_loadable_node
+gen_kfdt_node
+gen_fdt_node
+gen_arm_configurations
 
-if [ "${COMPRESSION}" == "gzip" ]; then
-	SUFFIX=".gz"
-else
-	COMPRESSION="none"
-	SUFFIX=
-fi
-
-if grep  -q '^CONFIG_FIT_ENABLE_RSASSA_PSS_SUPPORT=y' .config ; then
-	ALGO_PADDING="				padding = \"pss\";"
-fi
-
-# digest
-if [ "${COMPRESSION}" == "gzip" ]; then
-	openssl dgst -sha256 -binary -out ${srctree}/u-boot-nodtb.digest ${srctree}/u-boot-nodtb.bin
-	openssl dgst -sha256 -binary -out ${srctree}/tee.digest ${srctree}/tee.bin
-	gzip -k -f -9 ${srctree}/tee.bin
-	UBOOT_SZ=`ls -l u-boot-nodtb.bin | awk '{ print $5 }'`
-	if [ ${UBOOT_SZ} -gt 0 ]; then
-		gzip -k -f -9 ${srctree}/u-boot-nodtb.bin
-	else
-		touch ${srctree}/u-boot-nodtb.bin.gz
-	fi
-	if [ ! -z "${MCU_LOAD_ADDR}" ]; then
-		openssl dgst -sha256 -binary -out ${srctree}/mcu.digest ${srctree}/mcu.bin
-		gzip -k -f -9 ${srctree}/mcu.bin
-	fi
-
-	UBOOT_DIGEST="			digest {
-				value = /incbin/(\"./u-boot-nodtb.digest\");
-				algo = \"sha256\";
-			};"
-	TEE_DIGEST="			digest {
-				value = /incbin/(\"./tee.digest\");
-				algo = \"sha256\";
-			};"
-	MCU_DIGEST="			digest {
-				value = /incbin/(\"./mcu.digest\");
-				algo = \"sha256\";
-			};"
-fi
-
-# mcu
-if [ ! -z "${MCU_LOAD_ADDR}" ]; then
-	MCU_NODE="		mcu {
-			description = \"mcu\";
-			type = \"standalone\";
-			arch = \"riscv\";
-			data = /incbin/(\"./mcu.bin${SUFFIX}\");
-			compression = \"${COMPRESSION}\";
-			load = <0x"${MCU_LOAD_ADDR}">;
-			hash {
-				algo = \"sha256\";
-			};
-${MCU_DIGEST}
-		};"
-	MCU_STANDALONE="			standalone = \"mcu\";"
-	SIGN_IMAGES="			        sign-images = \"fdt\", \"firmware\", \"loadables\", \"standalone\";"
-else
-	SIGN_IMAGES="			        sign-images = \"fdt\", \"firmware\", \"loadables\";"
-fi
-
-KERN_DTB=`sed -n "/CONFIG_EMBED_KERNEL_DTB_PATH=/s/CONFIG_EMBED_KERNEL_DTB_PATH=//p" .config | tr -d '"'`
-if [ -z "${KERN_DTB}" ]; then
-	return;
-fi
-if [ -f ${srctree}/${KERN_DTB} ]; then
-	PROP_KERN_DTB=', "kern-fdt"';
-	KFDT_NODE="		kern-fdt {
-			description = \"${KERN_DTB}\";
-			data = /incbin/(\"${KERN_DTB}\");
-			type = \"flat_dt\";
-			arch = \"${ARCH}\";
-			compression = \"none\";
-			hash {
-				algo = \"sha256\";
-			};
-		};"
-fi
-########################################################################################################
-THIS_PLAT=`sed -n "/CONFIG_DEFAULT_DEVICE_TREE/p" .config | awk -F "=" '{ print $2 }' | tr -d '"'`
-
-cat << EOF
-/*
- * Copyright (C) 2020 Rockchip Electronic Co.,Ltd
- *
- * Simple U-boot fit source file containing U-Boot, dtb and optee
- */
-
-/dts-v1/;
-
-/ {
-	description = "FIT Image with U-Boot/OP-TEE/MCU";
-	#address-cells = <1>;
-
-	images {
-		uboot {
-			description = "U-Boot (32-bit)";
-			data = /incbin/("./u-boot-nodtb.bin${SUFFIX}");
-			type = "standalone";
-			arch = "arm";
-			os = "U-Boot";
-			compression = "${COMPRESSION}";
-			load = <${UBOOT_LOAD_ADDR}>;
-			hash {
-				algo = "sha256";
-			};
-EOF
-echo "${UBOOT_DIGEST}"
-cat << EOF
-		};
-		optee {
-			description = "OP-TEE";
-			data = /incbin/("./tee.bin${SUFFIX}");
-			type = "firmware";
-			arch = "arm";
-			os = "op-tee";
-			compression = "${COMPRESSION}";
-			load = <0x${TEE_LOAD_ADDR}>;
-			entry = <0x${TEE_LOAD_ADDR}>;
-			hash {
-				algo = "sha256";
-			};
-EOF
-echo "${TEE_DIGEST}"
-cat << EOF
-		};
-		fdt {
-			description = "U-Boot dtb";
-			data = /incbin/("./u-boot.dtb");
-			type = "flat_dt";
-			arch = "${ARCH}";
-			compression = "none";
-			hash {
-				algo = "sha256";
-			};
-		};
-EOF
-echo "${KFDT_NODE}"
-echo "${MCU_NODE}"
-cat  << EOF
-	};
-
-	configurations {
-		default = "conf";
-		conf {
-			description = "${THIS_PLAT}";
-			rollback-index = <0x0>;
-			firmware = "optee";
-			loadables = "uboot";
-			fdt = "fdt"${PROP_KERN_DTB};
-EOF
-echo "${MCU_STANDALONE}"
-cat  << EOF
-			signature {
-				algo = "sha256,rsa2048";
-				${ALGO_PADDING}
-				key-name-hint = "dev";
-EOF
-echo "${SIGN_IMAGES}"
-cat  << EOF
-			};
-		};
-	};
-};
-EOF

commit 701318baaacc2e92c33e0233b5ebf98a60e80483
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 22 03:02:28 2021 +0000

    make.sh: support pack max 5 mcu and 5 loadable firmware
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I853f819c74305f12ca39fa746ccb93a9b86ecf3a

diff --git a/make.sh b/make.sh
index a882ced67a..776c1787a2 100755
--- a/make.sh
+++ b/make.sh
@@ -559,18 +559,51 @@ function pack_uboot_itb_image()
 		TEE_ARG="-t ${TEE_OFFSET}"
 	fi
 
-	# MCU
-	MCU_ENABLED=`awk -F"," '/MCU=/ { printf $3 }' ${INI} | tr -d ' '`
-	if [ "${MCU_ENABLED}" == "enabled" -o "${MCU_ENABLED}" == "okay" ]; then
-		MCU=`awk -F"," '/MCU=/  { printf $1 }' ${INI} | tr -d ' ' | cut -c 5-`
-		cp ${RKBIN}/${MCU} mcu.bin
-		MCU_OFFSET=`awk -F"," '/MCU=/ { printf $2 }' ${INI} | tr -d ' '`
-		if [ -z ${MCU_OFFSET} ]; then
-			echo "ERROR: No mcu address in ${INI}"
-			exit 1
+	# MCUs
+	for ((i=0; i<5; i++))
+	do
+		MCU_BIN="mcu${i}.bin"
+		MCU_IDX="MCU${i}"
+
+		# compatible: use "MCU" to replace "MCU0" if "MCU" is present.
+		ENABLED=`awk -F"," '/MCU=/  { printf $3 }' ${INI} | tr -d ' '`
+		if [ ${i} -eq 0 ]; then
+			ENABLED=`awk -F"," '/MCU=/  { printf $3 }' ${INI} | tr -d ' '`
+			if [ ! -z ${ENABLED} ]; then
+				MCU_IDX="MCU"
+			fi
 		fi
-		MCU_ARG="-m ${MCU_OFFSET}"
-	fi
+
+		ENABLED=`awk -F "," '/'${MCU_IDX}'=/  { printf $3 }' ${INI} | tr -d ' '`
+		if [ "${ENABLED}" == "enabled" -o "${ENABLED}" == "okay" ]; then
+			NAME=`awk -F "," '/'${MCU_IDX}'=/ { printf $1 }' ${INI} | tr -d ' ' | awk -F "=" '{ print $2 }'`
+			OFFS=`awk -F "," '/'${MCU_IDX}'=/ { printf $2 }' ${INI} | tr -d ' '`
+			cp ${RKBIN}/${NAME} ${MCU_BIN}
+			if [ -z ${OFFS} ]; then
+				echo "ERROR: No ${MCU_BIN} address in ${INI}"
+				exit 1
+			fi
+			MCU_ARG=${MCU_ARG}" -m${i} ${OFFS}"
+		fi
+	done
+
+	# Loadables
+	for ((i=0; i<5; i++))
+	do
+		LOAD_BIN="load${i}.bin"
+		LOAD_IDX="LOAD${i}"
+		ENABLED=`awk -F "," '/'${LOAD_IDX}'=/  { printf $3 }' ${INI} | tr -d ' '`
+		if [ "${ENABLED}" == "enabled" -o "${ENABLED}" == "okay" ]; then
+			NAME=`awk -F "," '/'${LOAD_IDX}'=/ { printf $1 }' ${INI} | tr -d ' ' | awk -F "=" '{ print $2 }'`
+			OFFS=`awk -F "," '/'${LOAD_IDX}'=/ { printf $2 }' ${INI} | tr -d ' '`
+			cp ${RKBIN}/${NAME} ${LOAD_BIN}
+			if [ -z ${OFFS} ]; then
+				echo "ERROR: No ${LOAD_BIN} address in ${INI}"
+				exit 1
+			fi
+			LOAD_ARG=${LOAD_ARG}" -l${i} ${OFFS}"
+		fi
+	done
 
 	# COMPRESSION
 	COMPRESSION=`awk -F"," '/COMPRESSION=/  { printf $1 }' ${INI} | tr -d ' ' | cut -c 13-`
@@ -591,7 +624,7 @@ function pack_uboot_itb_image()
 		if [[ ${SPL_FIT_GENERATOR} == *.py ]]; then
 			${SPL_FIT_GENERATOR} u-boot.dtb > u-boot.its
 		else
-			${SPL_FIT_GENERATOR} ${TEE_ARG} ${COMPRESSION_ARG} ${MCU_ARG} > u-boot.its
+			${SPL_FIT_GENERATOR} ${TEE_ARG} ${COMPRESSION_ARG} ${MCU_ARG} ${LOAD_ARG} > u-boot.its
 		fi
 	fi
 

commit 51c24afb05161dd00965a0a72afe4ebb7417ba70
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 22 03:04:32 2021 +0000

    rockchip: rk3568: update spl_fit_standalone_release() api
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ia19f3c5c4d81ef58cc8da544bf307c077284574e

diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c
index d788a34505..e8caa3df85 100644
--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
@@ -923,7 +923,7 @@ int arch_cpu_init(void)
 }
 
 #ifdef CONFIG_SPL_BUILD
-int spl_fit_standalone_release(uintptr_t entry_point)
+int spl_fit_standalone_release(char *id, uintptr_t entry_point)
 {
 	/* Reset the scr1 */
 	writel(0x04000400, CRU_BASE + CRU_SOFTRST_CON26);

commit 563daea15896e4964a625b5149ba9e84160e4f0f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 22 03:04:05 2021 +0000

    rockchip: rv1126: update spl_fit_standalone_release() api
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I76857d348757812a22dd1bb541e4e9ac7f92e337

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126.c b/arch/arm/mach-rockchip/rv1126/rv1126.c
index 2a6f33dd36..311310d3f2 100644
--- a/arch/arm/mach-rockchip/rv1126/rv1126.c
+++ b/arch/arm/mach-rockchip/rv1126/rv1126.c
@@ -741,7 +741,7 @@ int arch_cpu_init(void)
 #endif
 
 #ifdef CONFIG_SPL_BUILD
-int spl_fit_standalone_release(uintptr_t entry_point)
+int spl_fit_standalone_release(char *id, uintptr_t entry_point)
 {
 	/*
 	 * Fix mcu does not work probabilistically through reset the

commit bb3517579319fea084d64f259b334827c7bbb3b4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 25 08:14:21 2021 +0000

    lib: gunzip: use aysnc for hw decompress
    
    It saves boot time.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Id968368927c2b6dc6e4e110cc360f597fee7f2fb

diff --git a/lib/gunzip.c b/lib/gunzip.c
index d310726960..a064ab907d 100644
--- a/lib/gunzip.c
+++ b/lib/gunzip.c
@@ -82,7 +82,7 @@ int gunzip(void *dst, int dstlen, unsigned char *src, unsigned long *lenp)
 	int ret;
 
 	ret = misc_decompress_process((ulong)dst, (ulong)src, *lenp,
-				      DECOM_GZIP, true, (u64 *)lenp, 0);
+				      DECOM_GZIP, false, (u64 *)lenp, 0);
 	if (!ret)
 		return 0;
 

commit 943eccd1cbc4be4deeb48f79750b0c7d9a840f7c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 24 08:38:41 2021 +0000

    lib: lz4: add hw lz4 decompress support
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ib2d23ef703a2af800b9081fb7866e46a36136946

diff --git a/lib/lz4_wrapper.c b/lib/lz4_wrapper.c
index df8f447d0e..77f2b004dd 100644
--- a/lib/lz4_wrapper.c
+++ b/lib/lz4_wrapper.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <compiler.h>
+#include <misc.h>
 #include <linux/kernel.h>
 #include <linux/types.h>
 #include <asm/unaligned.h>
@@ -57,6 +58,18 @@ int ulz4fn(const void *src, size_t srcn, void *dst, size_t *dstn)
 	int ret;
 	*dstn = 0;
 
+#if defined(CONFIG_MISC_DECOMPRESS) && !defined(CONFIG_SPL_BUILD)
+	u64 len;
+
+	ret = misc_decompress_process((ulong)dst, (ulong)src, (ulong)srcn,
+				      DECOM_LZ4, false, &len, 0);
+	if (!ret) {
+		*dstn = len;
+		return 0;
+	}
+
+	printf("hw ulz4fn failed(%d), fallback to soft ulz4fn\n", ret);
+#endif
 	{ /* With in-place decompression the header may become invalid later. */
 		const struct lz4_frame_header *h = in;
 

commit 041e33936c391d04270a89da44025bd12a67a0f5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 25 08:53:03 2021 +0000

    misc: decompress: add lz4 support
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ifda74f95604598e43705e9328434952ef2e62758

diff --git a/drivers/misc/misc_decompress.c b/drivers/misc/misc_decompress.c
index f35ef4903b..7f4173b21d 100644
--- a/drivers/misc/misc_decompress.c
+++ b/drivers/misc/misc_decompress.c
@@ -63,12 +63,40 @@ static int misc_gzip_parse_header(const unsigned char *src, unsigned long len)
 	return i;
 }
 
-static u32 misc_get_data_size(unsigned long src, unsigned long len, u32 comp)
+static int misc_lz4_header_is_valid(const unsigned char *h)
 {
-	if (comp == DECOM_GZIP)
-		return *(u32 *)(src + len - 4);
+	const struct lz4_frame_header *hdr  = (const struct lz4_frame_header *)h;
+	/* We assume there's always only a single, standard frame. */
+	if (le32_to_cpu(hdr->magic) != LZ4F_MAGIC || hdr->version != 1)
+		return 0;        /* unknown format */
+	if (hdr->reserved0 || hdr->reserved1 || hdr->reserved2)
+		return 0; /* reserved must be zero */
+	if (!hdr->independent_blocks)
+		return 0; /* we can't support this yet */
+
+	return 1;
+}
 
-	return 0;
+static u64 misc_get_data_size(unsigned long src, unsigned long len, u32 comp)
+{
+	u64 size = 0;
+
+	if (comp == DECOM_GZIP) {
+		size = *(u32 *)(src + len - 4);
+	} else if (comp == DECOM_LZ4) {
+		const struct lz4_frame_header *hdr =
+			(const struct lz4_frame_header *)src;
+		/*
+		 * Here is the way to add size information in image:
+		 *
+		 * 1. lz4 command use arg: --content-size.
+		 * 2. append u32 size at the end of image as kernel does.
+		 */
+		size = hdr->has_content_size ?
+			*(u64 *)(src + sizeof(*hdr)) : *(u32 *)(src + len - 4);
+	}
+
+	return size;
 }
 
 static void misc_setup_default_sync(u32 comp)
@@ -95,6 +123,8 @@ static int misc_decompress_start(struct udevice *dev, unsigned long dst,
 	param.flags = flags;
 	if (misc_gzip_parse_header((unsigned char *)src, 0xffff) > 0) {
 		param.mode = DECOM_GZIP;
+	} else if (misc_lz4_header_is_valid((void *)src)) {
+		param.mode = DECOM_LZ4;
 	} else {
 		printf("Unsupported decompression format.\n");
 		return -EPERM;

commit 975d7ad9e7d98f6e33776aeaf33d3be17d0721a9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 25 08:53:26 2021 +0000

    misc: decompress: setup cleanup sync flags by default
    
    setup cleanup sync flags by default if this is a sync request,
    unless misc_decompress_async() is called by manual.
    
    This avoid caller to forget to setup cleanup sync flags when
    they use a async operation, otherwise cpu jump to kernel
    before decompress done.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ie22fad624b0a0912eef0315b9238d108347a270d

diff --git a/drivers/misc/misc_decompress.c b/drivers/misc/misc_decompress.c
index b44db1d953..f35ef4903b 100644
--- a/drivers/misc/misc_decompress.c
+++ b/drivers/misc/misc_decompress.c
@@ -71,6 +71,14 @@ static u32 misc_get_data_size(unsigned long src, unsigned long len, u32 comp)
 	return 0;
 }
 
+static void misc_setup_default_sync(u32 comp)
+{
+	if (comp == DECOM_GZIP)
+		misc_decompress_sync(IH_COMP_GZIP);
+	else if (comp == DECOM_LZ4)
+		misc_decompress_sync(IH_COMP_LZ4);
+}
+
 static struct udevice *misc_decompress_get_device(u32 comp)
 {
 	return misc_get_device_by_capability(comp);
@@ -232,6 +240,16 @@ int misc_decompress_process(unsigned long dst, unsigned long src,
 				       (const char *)dst, dst_size);
 		}
 	} else {
+		/*
+		 * setup cleanup sync flags by default if this is a sync request,
+		 * unless misc_decompress_async() is called by manual.
+		 *
+		 * This avoid caller to forget to setup cleanup sync flags when
+		 * they use a async operation, otherwise cpu jump to kernel
+		 * before decompress done.
+		 */
+		misc_setup_default_sync(comp);
+
 		if (size)
 			*size = misc_get_data_size(src, src_len, comp);
 	}

commit dec35821da9303607a22329121d630de811bfe35
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 25 08:51:40 2021 +0000

    misc: decompress: rename "cap" to "comp"
    
    The "comp" is a better name.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I324f5b0587602f4ecfe557d2b37dfe3640ee4264

diff --git a/drivers/misc/misc_decompress.c b/drivers/misc/misc_decompress.c
index 822326c527..b44db1d953 100644
--- a/drivers/misc/misc_decompress.c
+++ b/drivers/misc/misc_decompress.c
@@ -63,17 +63,17 @@ static int misc_gzip_parse_header(const unsigned char *src, unsigned long len)
 	return i;
 }
 
-static u32 misc_get_data_size(unsigned long src, unsigned long len, u32 cap)
+static u32 misc_get_data_size(unsigned long src, unsigned long len, u32 comp)
 {
-	if (cap == DECOM_GZIP)
+	if (comp == DECOM_GZIP)
 		return *(u32 *)(src + len - 4);
 
 	return 0;
 }
 
-static struct udevice *misc_decompress_get_device(u32 capability)
+static struct udevice *misc_decompress_get_device(u32 comp)
 {
-	return misc_get_device_by_capability(capability);
+	return misc_get_device_by_capability(comp);
 }
 
 static int misc_decompress_start(struct udevice *dev, unsigned long dst,
@@ -114,12 +114,12 @@ static bool misc_decompress_is_complete(struct udevice *dev)
 		return true;
 }
 
-static int misc_decompress_data_size(struct udevice *dev, u64 *size, u32 cap)
+static int misc_decompress_data_size(struct udevice *dev, u64 *size, u32 comp)
 {
 	struct decom_param param;
 	int ret;
 
-	param.mode = cap;
+	param.mode = comp;
 	param.size_dst = 0; /* clear */
 
 	ret = misc_ioctl(dev, IOCTL_REQ_DATA_SIZE, &param);
@@ -129,7 +129,7 @@ static int misc_decompress_data_size(struct udevice *dev, u64 *size, u32 cap)
 	return ret;
 }
 
-static int misc_decompress_finish(struct udevice *dev, u32 cap)
+static int misc_decompress_finish(struct udevice *dev, u32 comp)
 {
 	int timeout = 20000;
 
@@ -149,7 +149,7 @@ int misc_decompress_cleanup(void)
 	struct udevice *dev;
 	struct uclass *uc;
 	int ret;
-	u32 cap;
+	u32 comp;
 
 	ret = uclass_get(UCLASS_MISC, &uc);
 	if (ret)
@@ -162,13 +162,13 @@ int misc_decompress_cleanup(void)
 		ops = device_get_ops(dev);
 		if (!ops || !ops->ioctl)
 			continue;
-		else if (ops->ioctl(dev, IOCTL_REQ_CAPABILITY, &cap))
+		else if (ops->ioctl(dev, IOCTL_REQ_CAPABILITY, &comp))
 			continue;
-		else if (misc_decomp_async & cap)
+		else if (misc_decomp_async & comp)
 			continue;
 
-		if (misc_decomp_sync & cap) {
-			ret = misc_decompress_finish(dev, cap);
+		if (misc_decomp_sync & comp) {
+			ret = misc_decompress_finish(dev, comp);
 			if (ret) {
 				printf("Failed to stop decompress: %s, ret=%d\n",
 				       dev->name, ret);
@@ -181,7 +181,7 @@ int misc_decompress_cleanup(void)
 }
 
 int misc_decompress_process(unsigned long dst, unsigned long src,
-			    unsigned long src_len, u32 cap, bool sync,
+			    unsigned long src_len, u32 comp, bool sync,
 			    u64 *size, u32 flags)
 {
 	struct udevice *dev;
@@ -189,12 +189,12 @@ int misc_decompress_process(unsigned long dst, unsigned long src,
 	u64 dst_size = 0;
 	int ret;
 
-	dev = misc_decompress_get_device(cap);
+	dev = misc_decompress_get_device(comp);
 	if (!dev)
 		return -ENODEV;
 
 	/* Wait last finish */
-	ret = misc_decompress_finish(dev, cap);
+	ret = misc_decompress_finish(dev, comp);
 	if (ret)
 		return ret;
 
@@ -219,12 +219,12 @@ int misc_decompress_process(unsigned long dst, unsigned long src,
 	 * otherwise return from compressed file information.
 	 */
 	if (sync) {
-		ret = misc_decompress_finish(dev, cap);
+		ret = misc_decompress_finish(dev, comp);
 		if (ret)
 			return ret;
 
 		if (size || (dst != dst_org)) {
-			ret = misc_decompress_data_size(dev, &dst_size, cap);
+			ret = misc_decompress_data_size(dev, &dst_size, comp);
 			if (size)
 				*size = dst_size;
 			if (dst != dst_org)
@@ -233,7 +233,7 @@ int misc_decompress_process(unsigned long dst, unsigned long src,
 		}
 	} else {
 		if (size)
-			*size = misc_get_data_size(src, src_len, cap);
+			*size = misc_get_data_size(src, src_len, comp);
 	}
 
 	return ret;

commit 03e89306c6b6e8cd2039d3237600c967320dbe2c
Author: Simon Xue <xxm@rock-chips.com>
Date:   Tue Nov 23 18:17:16 2021 +0800

    misc: rockchip decompress: support lz4 format
    
    Change-Id: I2c5903a38076a957cc0a0f031be2377689a0a2e0
    Signed-off-by: Simon Xue <xxm@rock-chips.com>

diff --git a/drivers/misc/rockchip_decompress.c b/drivers/misc/rockchip_decompress.c
index aae4c3967b..021adfd351 100644
--- a/drivers/misc/rockchip_decompress.c
+++ b/drivers/misc/rockchip_decompress.c
@@ -169,7 +169,7 @@ static int rockchip_decom_done_poll(struct udevice *dev)
 
 static int rockchip_decom_capability(u32 *buf)
 {
-	*buf = DECOM_GZIP;
+	*buf = DECOM_GZIP | DECOM_LZ4;
 
 	return 0;
 }

commit 07a60d4955ace0e29b8f9ad777164bd4233ce53a
Author: Simon Xue <xxm@rock-chips.com>
Date:   Tue Nov 23 18:02:01 2021 +0800

    misc: decompress: increase complete timeout times
    
    Larger compressed file need more time to decompress, so
    increase the complete timeout times.
    
    Change-Id: I67f1346a003747dfbe4e349c5393f0c047b7f15f
    Signed-off-by: Simon Xue <xxm@rock-chips.com>

diff --git a/drivers/misc/misc_decompress.c b/drivers/misc/misc_decompress.c
index 5711d94070..822326c527 100644
--- a/drivers/misc/misc_decompress.c
+++ b/drivers/misc/misc_decompress.c
@@ -131,7 +131,7 @@ static int misc_decompress_data_size(struct udevice *dev, u64 *size, u32 cap)
 
 static int misc_decompress_finish(struct udevice *dev, u32 cap)
 {
-	int timeout = 10000;
+	int timeout = 20000;
 
 	while (!misc_decompress_is_complete(dev)) {
 		if (timeout < 0)

commit b3df74d022cabe1eb83c0ddb00affb500f0dd3fe
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 25 11:56:43 2021 +0000

    common: Add lz4.h
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I6a4a19847f666f5ccb57013614bbbd65bd44801d

diff --git a/include/common.h b/include/common.h
index 305bf75e61..4cbc7b7ae8 100644
--- a/include/common.h
+++ b/include/common.h
@@ -681,9 +681,7 @@ int gzwrite(unsigned char *src, int len,
 	    u64 startoffs,
 	    u64 szexpected);
 
-/* lib/lz4_wrapper.c */
-bool lz4_is_valid_header(const unsigned char *h);
-int ulz4fn(const void *src, size_t srcn, void *dst, size_t *dstn);
+#include <u-boot/lz4.h>
 
 /* lib/qsort.c */
 void qsort(void *base, size_t nmemb, size_t size,
diff --git a/include/u-boot/lz4.h b/include/u-boot/lz4.h
new file mode 100644
index 0000000000..821797956d
--- /dev/null
+++ b/include/u-boot/lz4.h
@@ -0,0 +1,65 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2019 Google LLC
+ */
+
+#ifndef __LZ4_H
+#define __LZ4_H
+
+#define LZ4F_MAGIC 0x184D2204
+
+struct lz4_frame_header {
+	u32 magic;
+	union {
+		u8 flags;
+		struct {
+			u8 reserved0:2;
+			u8 has_content_checksum:1;
+			u8 has_content_size:1;
+			u8 has_block_checksum:1;
+			u8 independent_blocks:1;
+			u8 version:2;
+		};
+	};
+	union {
+		u8 block_descriptor;
+		struct {
+			u8 reserved1:4;
+			u8 max_block_size:3;
+			u8 reserved2:1;
+		};
+	};
+	/* + u64 content_size iff has_content_size is set */
+	/* + u8 header_checksum */
+} __packed;
+
+struct lz4_block_header {
+	union {
+		u32 raw;
+		struct {
+			u32 size:31;
+			u32 not_compressed:1;
+		};
+	};
+	/* + size bytes of data */
+	/* + u32 block_checksum iff has_block_checksum is set */
+} __packed;
+
+bool lz4_is_valid_header(const unsigned char *h);
+
+/**
+ * ulz4fn() - Decompress LZ4 data
+ *
+ * @src: Source data to decompress
+ * @srcn: Length of source data
+ * @dst: Destination for uncompressed data
+ * @dstn: Returns length of uncompressed data
+ * @return 0 if OK, -EPROTONOSUPPORT if the magic number or version number are
+ *	not recognised or independent blocks are used, -EINVAL if the reserved
+ *	fields are non-zero, or input is overrun, -EENOBUFS if the destination
+ *	buffer is overrun, -EEPROTO if the compressed data causes an error in
+ *	the decompression algorithm
+ */
+int ulz4fn(const void *src, size_t srcn, void *dst, size_t *dstn);
+
+#endif
diff --git a/lib/lz4_wrapper.c b/lib/lz4_wrapper.c
index 8400615efd..df8f447d0e 100644
--- a/lib/lz4_wrapper.c
+++ b/lib/lz4_wrapper.c
@@ -34,45 +34,6 @@ typedef uint64_t U64;
 /* Unaltered (except removing unrelated code) from github.com/Cyan4973/lz4. */
 #include "lz4.c"	/* #include for inlining, do not link! */
 
-#define LZ4F_MAGIC 0x184D2204
-
-struct lz4_frame_header {
-	u32 magic;
-	union {
-		u8 flags;
-		struct {
-			u8 reserved0:2;
-			u8 has_content_checksum:1;
-			u8 has_content_size:1;
-			u8 has_block_checksum:1;
-			u8 independent_blocks:1;
-			u8 version:2;
-		};
-	};
-	union {
-		u8 block_descriptor;
-		struct {
-			u8 reserved1:4;
-			u8 max_block_size:3;
-			u8 reserved2:1;
-		};
-	};
-	/* + u64 content_size iff has_content_size is set */
-	/* + u8 header_checksum */
-} __packed;
-
-struct lz4_block_header {
-	union {
-		u32 raw;
-		struct {
-			u32 size:31;
-			u32 not_compressed:1;
-		};
-	};
-	/* + size bytes of data */
-	/* + u32 block_checksum iff has_block_checksum is set */
-} __packed;
-
 bool lz4_is_valid_header(const unsigned char *h)
 {
 	const struct lz4_frame_header *hdr  = (const struct lz4_frame_header *)h;

commit b87ef1c11aa5a22e06a78af78f8827fc4cef6d2e
Author: Karl Beldan <karl.beldan+oss@gmail.com>
Date:   Wed Mar 17 22:31:58 2021 +0000

    UPSTREAM: lz4: Fix unaligned accesses
    
    Signed-off-by: Karl Beldan <karl.beldan+oss@gmail.com>
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If0c957ae41a4735335701dbde9924061280b9b4f

diff --git a/lib/lz4_wrapper.c b/lib/lz4_wrapper.c
index eb29c01d24..8400615efd 100644
--- a/lib/lz4_wrapper.c
+++ b/lib/lz4_wrapper.c
@@ -8,10 +8,20 @@
 #include <compiler.h>
 #include <linux/kernel.h>
 #include <linux/types.h>
+#include <asm/unaligned.h>
 
-static u16 LZ4_readLE16(const void *src) { return le16_to_cpu(*(u16 *)src); }
-static void LZ4_copy4(void *dst, const void *src) { *(u32 *)dst = *(u32 *)src; }
-static void LZ4_copy8(void *dst, const void *src) { *(u64 *)dst = *(u64 *)src; }
+static u16 LZ4_readLE16(const void *src)
+{
+	return get_unaligned_le16(src);
+}
+static void LZ4_copy4(void *dst, const void *src)
+{
+	put_unaligned(get_unaligned((const u32 *)src), (u32 *)dst);
+}
+static void LZ4_copy8(void *dst, const void *src)
+{
+	put_unaligned(get_unaligned((const u64 *)src), (u64 *)dst);
+}
 
 typedef  uint8_t BYTE;
 typedef uint16_t U16;

commit afe62dc9eeec028837a0929d76e1044101c6de75
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jul 17 18:03:18 2020 +0800

    Revert "lib: lz4_wrapper: fix data-abort due to odd address access"
    
    This reverts commit 7c3a07ede8f02e0e154589bb55f06aebde897f6f.
    
    Change-Id: I32fb22965a8a365034cecc72cf3f305af4c23111
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/lib/lz4_wrapper.c b/lib/lz4_wrapper.c
index 0e217073e6..eb29c01d24 100644
--- a/lib/lz4_wrapper.c
+++ b/lib/lz4_wrapper.c
@@ -10,8 +10,8 @@
 #include <linux/types.h>
 
 static u16 LZ4_readLE16(const void *src) { return le16_to_cpu(*(u16 *)src); }
-static void LZ4_copy4(void *dst, const void *src) { memcpy(dst, src, 4); }
-static void LZ4_copy8(void *dst, const void *src) { memcpy(dst, src, 8); }
+static void LZ4_copy4(void *dst, const void *src) { *(u32 *)dst = *(u32 *)src; }
+static void LZ4_copy8(void *dst, const void *src) { *(u64 *)dst = *(u64 *)src; }
 
 typedef  uint8_t BYTE;
 typedef uint16_t U16;

commit d591335098d8b664a285ac9665dbb5d1d3fa48ca
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Mon Nov 22 17:20:39 2021 +0800

    lib: optee_clientApi: support R&W oem non-secure otp
    
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
    Change-Id: I597ba286d76929dd44379ac0453946efc2d96ef7

diff --git a/include/optee_include/OpteeClientInterface.h b/include/optee_include/OpteeClientInterface.h
index e7a8c8d10c..ec2116aeda 100644
--- a/include/optee_include/OpteeClientInterface.h
+++ b/include/optee_include/OpteeClientInterface.h
@@ -39,6 +39,8 @@ uint32_t trusty_write_oem_huk(uint32_t *buf, uint32_t length);
 void trusty_select_security_level(void);
 uint32_t trusty_read_permanent_attributes_flag(uint8_t *attributes);
 uint32_t trusty_write_permanent_attributes_flag(uint8_t attributes);
+uint32_t trusty_write_oem_ns_otp(uint32_t byte_off, uint8_t *byte_buf, uint32_t byte_len);
+uint32_t trusty_read_oem_ns_otp(uint32_t byte_off, uint8_t *byte_buf, uint32_t byte_len);
 uint32_t trusty_attest_dh(uint8_t *dh, uint32_t *dh_size);
 uint32_t trusty_attest_uuid(uint8_t *uuid, uint32_t *uuid_size);
 uint32_t trusty_attest_get_ca
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index c2206abd46..d126dfe4da 100644
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -23,6 +23,8 @@
 #define STORAGE_CMD_WRITE_TA_ENCRYPTION_KEY	9
 #define STORAGE_CMD_CHECK_SECURITY_LEVEL_FLAG	10
 #define STORAGE_CMD_WRITE_OEM_HUK		11
+#define STORAGE_CMD_WRITE_OEM_NS_OTP		12
+#define STORAGE_CMD_READ_OEM_NS_OTP		13
 
 static uint8_t b2hs_add_base(uint8_t in)
 {
@@ -592,6 +594,137 @@ void trusty_select_security_level(void)
 #endif
 }
 
+uint32_t trusty_write_oem_ns_otp(uint32_t byte_off, uint8_t *byte_buf, uint32_t byte_len)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+
+	TEEC_UUID tempuuid = { 0x2d26d8a8, 0x5134, 0x4dd8,
+			{ 0xb3, 0x2f, 0xb3, 0x4b, 0xce, 0xeb, 0xc4, 0x71 } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				&TeecSession,
+				TeecUuid,
+				TEEC_LOGIN_PUBLIC,
+				NULL,
+				NULL,
+				&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
+
+	TeecOperation.params[0].value.a = byte_off;
+
+	TEEC_SharedMemory SharedMem = {0};
+
+	SharedMem.size = byte_len;
+	SharedMem.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem.size;
+
+	memcpy(SharedMem.buffer, byte_buf, SharedMem.size);
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						    TEEC_MEMREF_TEMP_INPUT,
+						    TEEC_NONE,
+						    TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					STORAGE_CMD_WRITE_OEM_NS_OTP,
+					&TeecOperation,
+					&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
+
+exit:
+	TEEC_ReleaseSharedMemory(&SharedMem);
+	TEEC_CloseSession(&TeecSession);
+	TEEC_FinalizeContext(&TeecContext);
+
+	return TeecResult;
+}
+
+uint32_t trusty_read_oem_ns_otp(uint32_t byte_off, uint8_t *byte_buf, uint32_t byte_len)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+
+	TEEC_UUID tempuuid = { 0x2d26d8a8, 0x5134, 0x4dd8,
+			{ 0xb3, 0x2f, 0xb3, 0x4b, 0xce, 0xeb, 0xc4, 0x71 } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				&TeecSession,
+				TeecUuid,
+				TEEC_LOGIN_PUBLIC,
+				NULL,
+				NULL,
+				&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
+
+	TeecOperation.params[0].value.a = byte_off;
+
+	TEEC_SharedMemory SharedMem = {0};
+
+	SharedMem.size = byte_len;
+	SharedMem.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem.size;
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						    TEEC_MEMREF_TEMP_OUTPUT,
+						    TEEC_NONE,
+						    TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					STORAGE_CMD_READ_OEM_NS_OTP,
+					&TeecOperation,
+					&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
+
+	memcpy(byte_buf, SharedMem.buffer, SharedMem.size);
+
+exit:
+	TEEC_ReleaseSharedMemory(&SharedMem);
+	TEEC_CloseSession(&TeecSession);
+	TEEC_FinalizeContext(&TeecContext);
+
+	return TeecResult;
+}
+
 uint32_t trusty_attest_dh(uint8_t *dh, uint32_t *dh_size)
 {
 	TEEC_Result TeecResult;

commit b4fc10246a694dc94aa331f45326b62ee355ccd3
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Thu Nov 18 09:34:52 2021 +0800

    lib: optee_clientApi: support select security level
    
    OPTEE use weak security if not define
    CONFIG_OPTEE_SECURITY_LEVEL, OPTEE use strong
    security if set CONFIG_OPTEE_SECURITY_LEVEL
    to 1 or 2.
    
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
    Change-Id: Ia6008b1031d53521a3afaa4f7c404bfa2f5bd206

diff --git a/lib/optee_clientApi/Kconfig b/lib/optee_clientApi/Kconfig
index f17b7ceefd..945e88688e 100644
--- a/lib/optee_clientApi/Kconfig
+++ b/lib/optee_clientApi/Kconfig
@@ -31,3 +31,9 @@ config OPTEE_ALWAYS_USE_SECURITY_PARTITION
 	  U-boot can secure store data to security partition
 	  for nand or emmc, do not to store data to rpmb.
 
+config OPTEE_SECURITY_LEVEL
+	int "Support select security level for OPTEE"
+	depends on OPTEE_CLIENT
+	default 0
+	help
+	  U-boot can select security level for OPTEE.

commit 7504da7452a5213528b0ee492c2cb336bc2bc0ae
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Mon Aug 2 16:29:36 2021 +0800

    lib: optee_clientApi: support select optee secure level
    
    Change-Id: Icc124bbab376bb0fd047b9096aa4a34aa1877cdc
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index bd8fc9a69e..c0e3860db4 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -447,6 +447,10 @@ static void board_mtd_blk_map_partitions(void)
 int board_init(void)
 {
 	board_debug_init();
+	/* optee select security level */
+#ifdef CONFIG_OPTEE_CLIENT
+	trusty_select_security_level();
+#endif
 
 #ifdef DEBUG
 	soc_clk_dump();
diff --git a/include/optee_include/OpteeClientInterface.h b/include/optee_include/OpteeClientInterface.h
index 2acb821329..e7a8c8d10c 100644
--- a/include/optee_include/OpteeClientInterface.h
+++ b/include/optee_include/OpteeClientInterface.h
@@ -36,6 +36,7 @@ uint32_t trusty_read_vbootkey_enable_flag(uint8_t *flag);
 uint32_t trusty_write_ta_encryption_key(uint32_t *buf, uint32_t length);
 uint32_t trusty_check_security_level_flag(uint8_t flag);
 uint32_t trusty_write_oem_huk(uint32_t *buf, uint32_t length);
+void trusty_select_security_level(void);
 uint32_t trusty_read_permanent_attributes_flag(uint8_t *attributes);
 uint32_t trusty_write_permanent_attributes_flag(uint8_t attributes);
 uint32_t trusty_attest_dh(uint8_t *dh, uint32_t *dh_size);
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index b9a7ce2a32..c2206abd46 100644
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -572,6 +572,26 @@ uint32_t trusty_write_oem_huk(uint32_t *buf, uint32_t length)
 						  true, buf, length);
 }
 
+void trusty_select_security_level(void)
+{
+#if (CONFIG_OPTEE_SECURITY_LEVEL > 0)
+	TEEC_Result TeecResult;
+
+	TeecResult = trusty_check_security_level_flag(CONFIG_OPTEE_SECURITY_LEVEL);
+	if (TeecResult == TEE_ERROR_CANCEL) {
+		run_command("download", 0);
+		return;
+	}
+
+	if (TeecResult == TEEC_SUCCESS)
+		debug("optee select security level success!");
+	else
+		panic("optee select security level fail!");
+
+	return;
+#endif
+}
+
 uint32_t trusty_attest_dh(uint8_t *dh, uint32_t *dh_size)
 {
 	TEEC_Result TeecResult;

commit a43611af5aa94a5ff282b959c603c60a4268757a
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Mon Aug 2 10:24:34 2021 +0800

    f_rockusb: support write oem huk
    
    Change-Id: I07a4db46e1fe3c5d2d584e700046b1b016940c38
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index d76ea684a2..ced585ef3f 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -494,6 +494,17 @@ static int rkusb_do_vs_write(struct fsg_common *common)
 						curlun->sense_data = SS_WRITE_ERROR;
 						return -EIO;
 					}
+				} else if (memcmp(data, "EHUK", 4) == 0) {
+					if (vhead->size - 8 != 32) {
+						printf("check oem huk size fail!\n");
+						curlun->sense_data = SS_WRITE_ERROR;
+						return -EIO;
+					}
+					if (trusty_write_oem_huk((uint32_t *)(data + 8), 8) != 0) {
+						printf("trusty_write_oem_huk error!");
+						curlun->sense_data = SS_WRITE_ERROR;
+						return -EIO;
+					}
 				} else {
 					printf("Unknown tag\n");
 					curlun->sense_data = SS_WRITE_ERROR;

commit f39d4289a6adff1b0e7067a0a2f2b0cd35e1daf2
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Fri Jul 30 18:10:08 2021 +0800

    lib: optee_clientApi: add write oem huk interface
    
    Change-Id: I97555c2d5ebb21fa35f07583717c702df072f79f
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/include/optee_include/OpteeClientInterface.h b/include/optee_include/OpteeClientInterface.h
index 6ea3fbcb67..2acb821329 100644
--- a/include/optee_include/OpteeClientInterface.h
+++ b/include/optee_include/OpteeClientInterface.h
@@ -35,6 +35,7 @@ uint32_t trusty_write_vbootkey_hash(uint32_t *buf, uint32_t length);
 uint32_t trusty_read_vbootkey_enable_flag(uint8_t *flag);
 uint32_t trusty_write_ta_encryption_key(uint32_t *buf, uint32_t length);
 uint32_t trusty_check_security_level_flag(uint8_t flag);
+uint32_t trusty_write_oem_huk(uint32_t *buf, uint32_t length);
 uint32_t trusty_read_permanent_attributes_flag(uint8_t *attributes);
 uint32_t trusty_write_permanent_attributes_flag(uint8_t attributes);
 uint32_t trusty_attest_dh(uint8_t *dh, uint32_t *dh_size);
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index 75a1d89592..b9a7ce2a32 100644
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -22,6 +22,7 @@
 #define STORAGE_CMD_READ_ENABLE_FLAG		5
 #define STORAGE_CMD_WRITE_TA_ENCRYPTION_KEY	9
 #define STORAGE_CMD_CHECK_SECURITY_LEVEL_FLAG	10
+#define STORAGE_CMD_WRITE_OEM_HUK		11
 
 static uint8_t b2hs_add_base(uint8_t in)
 {
@@ -565,6 +566,12 @@ uint32_t trusty_check_security_level_flag(uint8_t flag)
 						  true, &levelflag, 1);
 }
 
+uint32_t trusty_write_oem_huk(uint32_t *buf, uint32_t length)
+{
+	return trusty_base_efuse_or_otp_operation(STORAGE_CMD_WRITE_OEM_HUK,
+						  true, buf, length);
+}
+
 uint32_t trusty_attest_dh(uint8_t *dh, uint32_t *dh_size)
 {
 	TEEC_Result TeecResult;

commit fbf29bfb0ea377f5d1b9ff13bb8d396205b2019f
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Fri Jul 30 18:06:43 2021 +0800

    lib: optee_clientApi: add check security level flag interface
    
    Change-Id: I2b680c7b073114a45acd797a51f3abbcd4fb58eb
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/include/optee_include/OpteeClientInterface.h b/include/optee_include/OpteeClientInterface.h
index eb0615009b..6ea3fbcb67 100644
--- a/include/optee_include/OpteeClientInterface.h
+++ b/include/optee_include/OpteeClientInterface.h
@@ -34,6 +34,7 @@ uint32_t trusty_read_vbootkey_hash(uint32_t *buf, uint32_t length);
 uint32_t trusty_write_vbootkey_hash(uint32_t *buf, uint32_t length);
 uint32_t trusty_read_vbootkey_enable_flag(uint8_t *flag);
 uint32_t trusty_write_ta_encryption_key(uint32_t *buf, uint32_t length);
+uint32_t trusty_check_security_level_flag(uint8_t flag);
 uint32_t trusty_read_permanent_attributes_flag(uint8_t *attributes);
 uint32_t trusty_write_permanent_attributes_flag(uint8_t attributes);
 uint32_t trusty_attest_dh(uint8_t *dh, uint32_t *dh_size);
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index 0d82e06378..75a1d89592 100644
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -21,6 +21,7 @@
 #define STORAGE_CMD_WRITE_VBOOTKEY_HASH		4
 #define STORAGE_CMD_READ_ENABLE_FLAG		5
 #define STORAGE_CMD_WRITE_TA_ENCRYPTION_KEY	9
+#define STORAGE_CMD_CHECK_SECURITY_LEVEL_FLAG	10
 
 static uint8_t b2hs_add_base(uint8_t in)
 {
@@ -555,6 +556,15 @@ uint32_t trusty_write_ta_encryption_key(uint32_t *buf, uint32_t length)
 						  true, buf, length);
 }
 
+uint32_t trusty_check_security_level_flag(uint8_t flag)
+{
+	uint32_t levelflag;
+
+	levelflag = flag;
+	return trusty_base_efuse_or_otp_operation(STORAGE_CMD_CHECK_SECURITY_LEVEL_FLAG,
+						  true, &levelflag, 1);
+}
+
 uint32_t trusty_attest_dh(uint8_t *dh, uint32_t *dh_size)
 {
 	TEEC_Result TeecResult;

commit a0d56fd86e0ea87318ab2cd06dcdec1fcefb0ae6
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Wed Nov 17 19:34:11 2021 +0800

    lib: optee_clientApi: rpmb compatible with optee 3.13.0
    
    optee version 3.13.0 need exact return success
    when read rpmb counter.
    
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
    Change-Id: I4f0db5626629f7f8aea7123bd920d083f4ffa991

diff --git a/lib/optee_clientApi/OpteeClientRPC.c b/lib/optee_clientApi/OpteeClientRPC.c
index c0e0de0081..116b8be75e 100644
--- a/lib/optee_clientApi/OpteeClientRPC.c
+++ b/lib/optee_clientApi/OpteeClientRPC.c
@@ -346,11 +346,7 @@ TEEC_Result OpteeRpcCmdRpmb(t_teesmc32_arg *TeeSmc32Arg)
 				break;
 			}
 
-			if (EfiStatus != 0) {
-				TeecResult = TEEC_ERROR_GENERIC;
-				break;
-			}
-
+			TeecResult = TEEC_SUCCESS;
 			break;
 		}
 

commit 7b7091732ff27158daddf9be6e345b0dbb3beae0
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Nov 24 12:09:24 2021 +0800

    common: android: support update avb rollback index
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ib1ca1551f6a5c6db874ab8721d75ba026a7ff621

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 52d4d0131d..be93410f1b 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -569,6 +569,9 @@ retry_verify:
 		int len = 0;
 		char *bootargs, *newbootargs;
 
+		if (rk_avb_update_stored_rollback_indexes_for_slot(ops, slot_data[0]))
+			printf("Fail to update the rollback indexes.\n");
+
 		if (*slot_data[0]->cmdline) {
 			debug("Kernel command line: %s\n", slot_data[0]->cmdline);
 			len += strlen(slot_data[0]->cmdline);

commit 2d62cca0c8973283d8473f36c0eed9225e607e93
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Nov 24 12:08:10 2021 +0800

    lib: avb: add function rk_avb_update_stored_rollback_indexes_for_slot()
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ib6b452f6079d8ec768a46bd123fd1bd6a79d80fc

diff --git a/include/android_avb/rk_avb_ops_user.h b/include/android_avb/rk_avb_ops_user.h
index 613f835802..024019a748 100644
--- a/include/android_avb/rk_avb_ops_user.h
+++ b/include/android_avb/rk_avb_ops_user.h
@@ -336,6 +336,11 @@ int rk_avb_read_perm_attr(uint16_t id, void *pbuf, uint16_t size);
  */
 bool rk_avb_ab_have_bootable_slot(void);
 
+/**
+ * update rollback index
+ */
+int rk_avb_update_stored_rollback_indexes_for_slot(AvbOps* ops, AvbSlotVerifyData* slot_data);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/lib/avb/rk_avb_user/rk_avb_ops_user.c b/lib/avb/rk_avb_user/rk_avb_ops_user.c
index 98bf5ceead..9385305df3 100644
--- a/lib/avb/rk_avb_user/rk_avb_ops_user.c
+++ b/lib/avb/rk_avb_user/rk_avb_ops_user.c
@@ -809,3 +809,23 @@ int rk_avb_read_perm_attr(u16 id, void *pbuf, u16 size)
 	return ret;
 }
 
+int rk_avb_update_stored_rollback_indexes_for_slot(AvbOps* ops, AvbSlotVerifyData* slot_data)
+{
+	uint64_t rollback_index = slot_data->rollback_indexes[0];
+	uint64_t current_stored_rollback_index;
+	AvbIOResult io_ret;
+
+	if (rollback_index > 0) {
+		io_ret = ops->read_rollback_index(ops, 0, &current_stored_rollback_index);
+		if (io_ret != AVB_IO_RESULT_OK)
+			return -1;
+
+		if (rollback_index > current_stored_rollback_index) {
+			io_ret = ops->write_rollback_index(ops, 0, rollback_index);
+			if (io_ret != AVB_IO_RESULT_OK)
+				return -1;
+		}
+	}
+
+	return 0;
+}

commit 756c6e9956f5d5f50d9f2d66c053540e5a2e393b
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Nov 17 15:49:41 2021 +0800

    configs: rockchip: change the secure otp macro as CONFIG_SPL_ROCKCHIP_SECURE_OTP
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I8039b73858b33917d5b84caecd2b925dead3082c

diff --git a/configs/rk3399-spl-fit.config b/configs/rk3399-spl-fit.config
index 9567b5e78e..0076d0f085 100644
--- a/configs/rk3399-spl-fit.config
+++ b/configs/rk3399-spl-fit.config
@@ -26,8 +26,7 @@ CONFIG_SPL_ROCKCHIP_CRYPTO_V1=y
 # CONFIG_SPL_ROCKCHIP_CRYPTO_V2 is not set
 # CONFIG_SPL_ROCKCHIP_HMAC is not set
 CONFIG_SPL_ROCKCHIP_RSA=y
-# CONFIG_SPL_ROCKCHIP_SECURE_OTP_V1 is not set
-# CONFIG_SPL_ROCKCHIP_SECURE_OTP_V2 is not set
+# CONFIG_SPL_ROCKCHIP_SECURE_OTP is not set
 CONFIG_SPL_RSA=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x80000
 CONFIG_SPL_ZLIB=y
diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index 36931438a0..542ff37193 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -108,7 +108,7 @@ CONFIG_ADC_KEY=y
 CONFIG_MISC=y
 CONFIG_SPL_MISC=y
 CONFIG_ROCKCHIP_OTP=y
-CONFIG_SPL_ROCKCHIP_SECURE_OTP_V1=y
+CONFIG_SPL_ROCKCHIP_SECURE_OTP=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MMC_SDHCI=y
diff --git a/configs/rv1126-spi-nor-tiny_defconfig b/configs/rv1126-spi-nor-tiny_defconfig
index 9dab10b8e3..cdcf49458e 100644
--- a/configs/rv1126-spi-nor-tiny_defconfig
+++ b/configs/rv1126-spi-nor-tiny_defconfig
@@ -89,7 +89,7 @@ CONFIG_MISC_DECOMPRESS=y
 CONFIG_SPL_MISC_DECOMPRESS=y
 CONFIG_ROCKCHIP_HW_DECOMPRESS=y
 CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS=y
-CONFIG_SPL_ROCKCHIP_SECURE_OTP_V2=y
+CONFIG_SPL_ROCKCHIP_SECURE_OTP=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MTD=y
diff --git a/configs/rv1126-spl-spi-nand_defconfig b/configs/rv1126-spl-spi-nand_defconfig
index e1b1eb7260..a04e6c850a 100644
--- a/configs/rv1126-spl-spi-nand_defconfig
+++ b/configs/rv1126-spl-spi-nand_defconfig
@@ -105,7 +105,7 @@ CONFIG_SPL_MISC_DECOMPRESS=y
 CONFIG_ROCKCHIP_OTP=y
 CONFIG_ROCKCHIP_HW_DECOMPRESS=y
 CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS=y
-CONFIG_SPL_ROCKCHIP_SECURE_OTP_V2=y
+CONFIG_SPL_ROCKCHIP_SECURE_OTP=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MTD=y
diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index 53adbf134c..9a582e501e 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -111,7 +111,7 @@ CONFIG_SPL_MISC_DECOMPRESS=y
 CONFIG_ROCKCHIP_OTP=y
 CONFIG_ROCKCHIP_HW_DECOMPRESS=y
 CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS=y
-CONFIG_SPL_ROCKCHIP_SECURE_OTP_V2=y
+CONFIG_SPL_ROCKCHIP_SECURE_OTP=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MTD=y

commit 299f09a08605fb984ccc3cacfdb0090c67806863
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Nov 17 15:44:11 2021 +0800

    rockchip: spl: change the secure otp macro as CONFIG_SPL_ROCKCHIP_SECURE_OTP
    
    Since the driver is split in deferent platforms.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ie5793fe83093557a245b0f3fcbfce835d8cef8b8

diff --git a/arch/arm/mach-rockchip/fit_misc.c b/arch/arm/mach-rockchip/fit_misc.c
index b0e5e9c109..f3459ea81a 100644
--- a/arch/arm/mach-rockchip/fit_misc.c
+++ b/arch/arm/mach-rockchip/fit_misc.c
@@ -189,8 +189,7 @@ int fit_board_verify_required_sigs(void)
 	uint8_t vboot = 0;
 
 #ifdef CONFIG_SPL_BUILD
-#if defined(CONFIG_SPL_ROCKCHIP_SECURE_OTP_V1) || \
-    defined(CONFIG_SPL_ROCKCHIP_SECURE_OTP_V2)
+#if defined(CONFIG_SPL_ROCKCHIP_SECURE_OTP)
 	struct udevice *dev;
 
 	dev = misc_otp_get_device(OTP_S);
diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index 58cf3a63ff..5f4c3544ee 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -422,7 +422,7 @@ int fit_read_otp_rollback_index(uint32_t fit_index, uint32_t *otp_index)
 	int ret = 0;
 
 	*otp_index = 0;
-#if defined(CONFIG_SPL_ROCKCHIP_SECURE_OTP_V2) || defined(CONFIG_SPL_ROCKCHIP_SECURE_OTP_V1)
+#if defined(CONFIG_SPL_ROCKCHIP_SECURE_OTP)
 	struct udevice *dev;
 	u32 index, i, otp_version;
 	u32 bit_count;
@@ -451,7 +451,7 @@ int fit_read_otp_rollback_index(uint32_t fit_index, uint32_t *otp_index)
 
 static int fit_write_otp_rollback_index(u32 fit_index)
 {
-#if defined(CONFIG_SPL_ROCKCHIP_SECURE_OTP_V2) || defined(CONFIG_SPL_ROCKCHIP_SECURE_OTP_V1)
+#if defined(CONFIG_SPL_ROCKCHIP_SECURE_OTP)
 	struct udevice *dev;
 	u32 index, i, otp_index;
 

commit 2867e1b2197b21ad710cc2cf2466ba2a7c8b4aa0
Author: Nico Cheng <nico.cheng@rock-chips.com>
Date:   Fri Oct 22 20:52:58 2021 +0800

    rockchip: otp: split the OTP driver into different SOC platforms
    
    The original rockchip-secure-otp.S is split into different SOC
    platforms. There are including PX30, RK3308, RK3328, RK3568 and
    RV1126.
    
    Add secure otp read and write support for RK3308B-S in SPL,
    which is compatible with RK3308.
    
    Signed-off-by: Nico Cheng <nico.cheng@rock-chips.com>
    Change-Id: Ie0683cb2d00cfe4b32943984e12e1d7e036d1c0e

diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index efdce0220a..7e009fc46b 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -92,18 +92,11 @@ config SPL_ROCKCHIP_HW_DECOMPRESS
 	  This driver support Decompress IP built-in Rockchip SoC, support
 	  LZ4, GZIP, PNG, ZLIB.
 
-config SPL_ROCKCHIP_SECURE_OTP_V1
-	bool "Rockchip Secure OTP Version 1 Support in spl"
+config SPL_ROCKCHIP_SECURE_OTP
+	bool "Rockchip Secure OTP Support in spl"
 	depends on SPL_MISC
 	help
-	  Support read & write secure otp in spl. Support platforms: rk3308,
-	  rk3326, px30, rk3568, rk3566.
-
-config SPL_ROCKCHIP_SECURE_OTP_V2
-	bool "Rockchip Secure OTP Version 2 Support in spl"
-	depends on SPL_MISC
-	help
-	  Support read & write secure otp in spl. Support platforms: rv1126.
+	  Support read & write secure otp in spl.
 
 config CMD_CROS_EC
 	bool "Enable crosec command"
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 4763a9e13b..a7ee3c79e2 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -54,6 +54,25 @@ obj-$(CONFIG_WINBOND_W83627) += winbond_w83627.o
 obj-$(CONFIG_QFW) += qfw.o
 obj-$(CONFIG_ROCKCHIP_EFUSE) += rockchip-efuse.o
 obj-$(CONFIG_ROCKCHIP_OTP) += rockchip-otp.o
-obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_SECURE_OTP_V1) += rockchip-secure-otp.o
-obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_SECURE_OTP_V2) += rockchip-secure-otp-v2.o
+
+ifdef CONFIG_ROCKCHIP_RK3308
+obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_SECURE_OTP) += rk3308-secure-otp.o
+endif
+
+ifdef CONFIG_ROCKCHIP_PX30
+obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_SECURE_OTP) += px30-secure-otp.o
+endif
+
+ifdef CONFIG_ROCKCHIP_RK3328
+obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_SECURE_OTP) += rk3328-secure-otp.o
+endif
+
+ifdef CONFIG_ROCKCHIP_RK3568
+obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_SECURE_OTP) += rk3568-secure-otp.o
+endif
+
+ifdef CONFIG_ROCKCHIP_RV1126
+obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_SECURE_OTP) += rv1126-secure-otp.o
+endif
+
 obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_HW_DECOMPRESS) += rockchip_decompress.o
diff --git a/drivers/misc/px30-secure-otp.S b/drivers/misc/px30-secure-otp.S
new file mode 100644
index 0000000000..e504c1e0bf
--- /dev/null
+++ b/drivers/misc/px30-secure-otp.S
@@ -0,0 +1,10998 @@
+	.arch armv8-a+nosimd
+	.file	"px30-secure-otp.c"
+	.text
+.Ltext0:
+	.cfi_sections	.debug_frame
+	.section	.text.px30_spl_rockchip_otp_start,"ax",@progbits
+	.align	2
+	.type	px30_spl_rockchip_otp_start, %function
+px30_spl_rockchip_otp_start:
+.LFB262:
+	.file 1 "drivers/misc/px30-secure-otp.c"
+	.loc 1 45 0
+	.cfi_startproc
+.LVL0:
+.LBB22:
+	.loc 1 46 0
+#APP
+// 46 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	mov	w1, 16
+.LVL1:
+	sdiv	w3, w3, w1
+.LVL2:
+	mov	w1, -65536
+	lsl	w3, w3, 2
+	sxtw	x3, w3
+	str	w1, [x3, x2]
+.LVL3:
+.LBE22:
+.LBB23:
+	.loc 1 47 0
+#APP
+// 47 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	mov	w1, 536879104
+	str	w1, [x0]
+	ret
+.LBE23:
+	.cfi_endproc
+.LFE262:
+	.size	px30_spl_rockchip_otp_start, .-px30_spl_rockchip_otp_start
+	.section	.text.px30_spl_rockchip_otp_stop,"ax",@progbits
+	.align	2
+	.type	px30_spl_rockchip_otp_stop, %function
+px30_spl_rockchip_otp_stop:
+.LFB263:
+	.loc 1 53 0
+	.cfi_startproc
+.LVL4:
+.LBB24:
+	.loc 1 54 0
+#APP
+// 54 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	mov	w1, 536870912
+.LVL5:
+	str	w1, [x0]
+.LVL6:
+.LBE24:
+.LBB25:
+	.loc 1 55 0
+#APP
+// 55 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	mov	w0, 16
+.LVL7:
+	sdiv	w3, w3, w0
+.LVL8:
+	mov	w0, -1
+	lsl	w3, w3, 2
+	sxtw	x3, w3
+	str	w0, [x3, x2]
+	ret
+.LBE25:
+	.cfi_endproc
+.LFE263:
+	.size	px30_spl_rockchip_otp_stop, .-px30_spl_rockchip_otp_stop
+	.section	.text.secure_otp_ioctl,"ax",@progbits
+	.align	2
+	.type	secure_otp_ioctl, %function
+secure_otp_ioctl:
+.LFB274:
+	.loc 1 406 0
+	.cfi_startproc
+.LVL9:
+	.loc 1 409 0
+	mov	x0, 27908
+.LVL10:
+	cmp	x1, x0
+	bne	.L7
+.LVL11:
+.LBB26:
+.LBB27:
+	.loc 1 398 0
+	mov	w0, 8
+	str	w0, [x2]
+.LVL12:
+.LBE27:
+.LBE26:
+	.loc 1 411 0
+	mov	w0, 0
+	.loc 1 412 0
+	ret
+.LVL13:
+.L7:
+	.loc 1 407 0
+	mov	w0, -22
+	.loc 1 418 0
+	ret
+	.cfi_endproc
+.LFE274:
+	.size	secure_otp_ioctl, .-secure_otp_ioctl
+	.section	.text.secure_otp_write,"ax",@progbits
+	.align	2
+	.type	secure_otp_write, %function
+secure_otp_write:
+.LFB272:
+	.loc 1 390 0
+	.cfi_startproc
+.LVL14:
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	mov	x19, x0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -16
+	.cfi_offset 22, -8
+	.loc 1 390 0
+	mov	w20, w1
+	mov	x21, x2
+	mov	w22, w3
+	.loc 1 391 0
+	bl	dev_get_driver_data
+.LVL15:
+	.loc 1 393 0
+	ldr	x4, [x0, 8]
+	mov	w3, w22
+	mov	x2, x21
+	mov	w1, w20
+	mov	x0, x19
+.LVL16:
+	.loc 1 394 0
+	ldp	x21, x22, [sp, 32]
+.LVL17:
+	ldp	x19, x20, [sp, 16]
+.LVL18:
+	ldp	x29, x30, [sp], 48
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	.loc 1 393 0
+	br	x4
+.LVL19:
+	.cfi_endproc
+.LFE272:
+	.size	secure_otp_write, .-secure_otp_write
+	.section	.text.secure_otp_read,"ax",@progbits
+	.align	2
+	.type	secure_otp_read, %function
+secure_otp_read:
+.LFB271:
+	.loc 1 382 0
+	.cfi_startproc
+.LVL20:
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	mov	x19, x0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -16
+	.cfi_offset 22, -8
+	.loc 1 382 0
+	mov	w20, w1
+	mov	x21, x2
+	mov	w22, w3
+	.loc 1 383 0
+	bl	dev_get_driver_data
+.LVL21:
+	.loc 1 385 0
+	ldr	x4, [x0]
+	mov	w3, w22
+	mov	x2, x21
+	mov	w1, w20
+	mov	x0, x19
+.LVL22:
+	.loc 1 386 0
+	ldp	x21, x22, [sp, 32]
+.LVL23:
+	ldp	x19, x20, [sp, 16]
+.LVL24:
+	ldp	x29, x30, [sp], 48
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	.loc 1 385 0
+	br	x4
+.LVL25:
+	.cfi_endproc
+.LFE271:
+	.size	secure_otp_read, .-secure_otp_read
+	.section	.text.rockchip_secure_otp_ofdata_to_platdata,"ax",@progbits
+	.align	2
+	.type	rockchip_secure_otp_ofdata_to_platdata, %function
+rockchip_secure_otp_ofdata_to_platdata:
+.LFB275:
+	.loc 1 427 0
+	.cfi_startproc
+.LVL26:
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -16
+	.cfi_offset 20, -8
+	.loc 1 427 0
+	mov	x20, x0
+	.loc 1 428 0
+	bl	dev_get_platdata
+.LVL27:
+	mov	x19, x0
+.LVL28:
+	.loc 1 430 0
+	mov	x0, x20
+.LVL29:
+	bl	dev_read_addr_ptr
+.LVL30:
+	.loc 1 431 0
+	mov	w2, 0
+	adrp	x1, .LC0
+	.loc 1 430 0
+	str	x0, [x19]
+	.loc 1 431 0
+	add	x1, x1, :lo12:.LC0
+	mov	x0, x20
+	bl	dev_read_u32_default
+.LVL31:
+	.loc 1 432 0
+	uxtw	x0, w0
+	str	x0, [x19, 8]
+	.loc 1 433 0
+	mov	w2, 0
+	mov	x0, x20
+	adrp	x1, .LC1
+	add	x1, x1, :lo12:.LC1
+	bl	dev_read_u32_default
+.LVL32:
+	.loc 1 434 0
+	uxtw	x0, w0
+	str	x0, [x19, 16]
+	.loc 1 435 0
+	mov	w2, 0
+	mov	x0, x20
+	adrp	x1, .LC2
+	add	x1, x1, :lo12:.LC2
+	bl	dev_read_u32_default
+.LVL33:
+	.loc 1 436 0
+	uxtw	x0, w0
+	str	x0, [x19, 24]
+	.loc 1 439 0
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+.LVL34:
+	ldp	x29, x30, [sp], 32
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE275:
+	.size	rockchip_secure_otp_ofdata_to_platdata, .-rockchip_secure_otp_ofdata_to_platdata
+	.section	.text.rockchip_secure_otp_wait_status.isra.1,"ax",@progbits
+	.align	2
+	.type	rockchip_secure_otp_wait_status.isra.1, %function
+rockchip_secure_otp_wait_status.isra.1:
+.LFB277:
+	.loc 1 58 0
+	.cfi_startproc
+.LVL35:
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	mov	w19, w1
+	str	x21, [sp, 32]
+	.cfi_offset 21, -16
+	.loc 1 58 0
+	mov	x21, x0
+	mov	w20, 10000
+.LVL36:
+.L15:
+.LBB34:
+	.loc 1 63 0
+	ldr	x0, [x21]
+	ldr	w0, [x0, 772]
+.LVL37:
+#APP
+// 63 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+.LBE34:
+	tst	w0, w19
+	beq	.L17
+.LBB35:
+	.loc 1 73 0
+	orr	w19, w19, -65536
+.LVL38:
+#APP
+// 73 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x21]
+.LVL39:
+	str	w19, [x0, 772]
+.LBE35:
+	.loc 1 75 0
+	mov	w0, 0
+	b	.L14
+.LVL40:
+.L17:
+	.loc 1 64 0
+	mov	x0, 1
+.LVL41:
+	bl	udelay
+.LVL42:
+	.loc 1 66 0
+	subs	w20, w20, #1
+.LVL43:
+	bne	.L15
+.LVL44:
+.LBB36:
+.LBB37:
+	.loc 1 67 0
+	adrp	x1, .LANCHOR0
+	adrp	x0, .LC3
+	add	x1, x1, :lo12:.LANCHOR0
+	add	x0, x0, :lo12:.LC3
+	bl	printf
+.LVL45:
+	mov	w0, -110
+.LVL46:
+.L14:
+.LBE37:
+.LBE36:
+	.loc 1 76 0
+	ldp	x19, x20, [sp, 16]
+.LVL47:
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE277:
+	.size	rockchip_secure_otp_wait_status.isra.1, .-rockchip_secure_otp_wait_status.isra.1
+	.section	.text.rockchip_secure_otp_read,"ax",@progbits
+	.align	2
+	.type	rockchip_secure_otp_read, %function
+rockchip_secure_otp_read:
+.LFB268:
+	.loc 1 146 0
+	.cfi_startproc
+.LVL48:
+	stp	x29, x30, [sp, -80]!
+	.cfi_def_cfa_offset 80
+	.cfi_offset 29, -80
+	.cfi_offset 30, -72
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -64
+	.cfi_offset 20, -56
+	mov	w20, w1
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -32
+	.cfi_offset 24, -24
+	mov	w24, w3
+	stp	x21, x22, [sp, 32]
+	mov	x23, x0
+	.cfi_offset 21, -48
+	.cfi_offset 22, -40
+	mov	x22, x2
+	str	x25, [sp, 64]
+	.cfi_offset 25, -16
+	.loc 1 147 0
+	bl	dev_get_platdata
+.LVL49:
+	mov	x19, x0
+.LVL50:
+	.loc 1 148 0
+	mov	x0, x23
+.LVL51:
+	bl	dev_get_driver_data
+.LVL52:
+	.loc 1 154 0
+	ldr	x4, [x0, 16]
+	.loc 1 148 0
+	mov	x25, x0
+.LVL53:
+	.loc 1 154 0
+	ldr	x1, [x19, 24]
+	mov	w3, w20
+	ldp	x0, x2, [x19, 8]
+.LVL54:
+	blr	x4
+.LVL55:
+.LBB51:
+.LBB52:
+.LBB53:
+	.loc 1 127 0
+#APP
+// 127 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x19]
+	mov	w1, 512
+	movk	w1, 0xff00, lsl 16
+	str	w1, [x0, 32]
+.LVL56:
+.LBE53:
+.LBB54:
+	.loc 1 128 0
+#APP
+// 128 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x19]
+	mov	w1, -65535
+	str	w1, [x0, 36]
+.LVL57:
+.LBE54:
+.LBB55:
+	.loc 1 129 0
+#APP
+// 129 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x19]
+	mov	w1, 250
+	str	w1, [x0, 4096]
+.LVL58:
+.LBE55:
+.LBB56:
+	.loc 1 131 0
+#APP
+// 131 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x19]
+	str	wzr, [x0, 4100]
+.LVL59:
+.LBE56:
+.LBB57:
+	.loc 1 135 0
+#APP
+// 135 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x19]
+	mov	w1, 65537
+	str	w1, [x0, 32]
+.LBE57:
+	.loc 1 137 0
+	mov	w1, 2
+	mov	x0, x19
+	bl	rockchip_secure_otp_wait_status.isra.1
+.LVL60:
+	.loc 1 138 0
+	tbz	w0, #31, .L21
+	.loc 1 139 0
+	adrp	x1, .LANCHOR1
+	adrp	x0, .LC4
+.LVL61:
+	add	x1, x1, :lo12:.LANCHOR1
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+.LVL62:
+.L21:
+.LBE52:
+.LBE51:
+.LBB58:
+	.loc 1 158 0
+#APP
+// 158 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x19]
+	mov	w23, 65537
+.LVL63:
+	add	w24, w24, w20
+.LVL64:
+.LBE58:
+	.loc 1 151 0
+	mov	w21, 0
+.LBB59:
+	.loc 1 158 0
+	str	w23, [x0, 256]
+.LBE59:
+	.loc 1 159 0
+	mov	x0, 50
+	bl	udelay
+.LVL65:
+.L22:
+	.loc 1 160 0
+	cmp	w20, w24
+	beq	.L26
+	.loc 1 162 0
+	cmp	w20, 448
+	bgt	.L28
+	.loc 1 165 0
+	sub	w1, w20, #16
+	cmp	w20, 0
+	mov	w0, w20
+	ccmp	w1, 31, 0, ne
+	bls	.L24
+	.loc 1 165 0 is_stmt 0 discriminator 1
+	sub	w1, w20, #128
+	cmp	w1, 263
+	bls	.L24
+	.loc 1 168 0 is_stmt 1
+	adrp	x0, .LC5
+	add	x0, x0, :lo12:.LC5
+	bl	printf
+.LVL66:
+.L28:
+	.loc 1 163 0
+	mov	w21, -1
+.LVL67:
+	b	.L20
+.LVL68:
+.L24:
+.LBB60:
+	.loc 1 172 0
+	add	w20, w20, 1
+.LVL69:
+	orr	w0, w0, -65536
+.LVL70:
+#APP
+// 172 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x1, [x19]
+	str	w0, [x1, 260]
+.LVL71:
+.LBE60:
+.LBB61:
+	.loc 1 174 0
+#APP
+// 174 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x19]
+.LVL72:
+.LBE61:
+	.loc 1 176 0
+	mov	w1, 4
+.LVL73:
+.LBB62:
+	.loc 1 174 0
+	str	w23, [x0, 264]
+.LVL74:
+.LBE62:
+	.loc 1 176 0
+	mov	x0, x19
+	bl	rockchip_secure_otp_wait_status.isra.1
+.LVL75:
+	mov	w21, w0
+.LVL76:
+	.loc 1 177 0
+	tbz	w0, #31, .L25
+	.loc 1 178 0
+	adrp	x1, .LANCHOR2
+	adrp	x0, .LC6
+.LVL77:
+	add	x1, x1, :lo12:.LANCHOR2
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.LVL78:
+.L26:
+.LBB63:
+	.loc 1 188 0
+#APP
+// 188 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x19]
+	mov	w1, 65536
+.LBE63:
+	.loc 1 190 0
+	ldr	x2, [x19, 16]
+	mov	w3, w20
+	ldr	x4, [x25, 24]
+.LBB64:
+	.loc 1 188 0
+	str	w1, [x0, 256]
+.LBE64:
+	.loc 1 190 0
+	ldr	x0, [x19, 8]
+	ldr	x1, [x19, 24]
+	blr	x4
+.LVL79:
+.L20:
+	.loc 1 195 0
+	mov	w0, w21
+	ldr	x25, [sp, 64]
+.LVL80:
+	ldp	x19, x20, [sp, 16]
+.LVL81:
+	ldp	x21, x22, [sp, 32]
+.LVL82:
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 25
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL83:
+.L25:
+	.cfi_restore_state
+.LBB65:
+	.loc 1 182 0
+	ldr	x0, [x19]
+.LVL84:
+	ldrb	w0, [x0, 292]
+	and	w0, w0, 255
+.LVL85:
+#APP
+// 182 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+.LVL86:
+#NO_APP
+.LBE65:
+	.loc 1 184 0
+	strb	w0, [x22], 1
+.LVL87:
+	b	.L22
+	.cfi_endproc
+.LFE268:
+	.size	rockchip_secure_otp_read, .-rockchip_secure_otp_read
+	.section	.text.rockchip_secure_otp_write,"ax",@progbits
+	.align	2
+	.type	rockchip_secure_otp_write, %function
+rockchip_secure_otp_write:
+.LFB270:
+	.loc 1 345 0
+	.cfi_startproc
+.LVL88:
+	stp	x29, x30, [sp, -128]!
+	.cfi_def_cfa_offset 128
+	.cfi_offset 29, -128
+	.cfi_offset 30, -120
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -112
+	.cfi_offset 20, -104
+	mov	w19, w1
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -80
+	.cfi_offset 24, -72
+	mov	w24, w3
+	stp	x27, x28, [sp, 80]
+	stp	x21, x22, [sp, 32]
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 27, -48
+	.cfi_offset 28, -40
+	.cfi_offset 21, -96
+	.cfi_offset 22, -88
+	.cfi_offset 25, -64
+	.cfi_offset 26, -56
+	.loc 1 345 0
+	stp	x2, x0, [x29, 104]
+	.loc 1 346 0
+	bl	dev_get_platdata
+.LVL89:
+	mov	x28, x0
+.LVL90:
+	.loc 1 348 0
+	sxtw	x0, w24
+.LVL91:
+	bl	malloc_simple
+.LVL92:
+	.loc 1 351 0
+	cbnz	x0, .L31
+.LVL93:
+.L60:
+.LBB133:
+.LBB134:
+	.loc 1 212 0
+	mov	w27, -1
+.L30:
+.LBE134:
+.LBE133:
+	.loc 1 378 0
+	mov	w0, w27
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+.LVL94:
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+.LVL95:
+	ldp	x29, x30, [sp], 128
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+.LVL96:
+	ret
+.LVL97:
+.L31:
+	.cfi_restore_state
+	mov	x20, x0
+	.loc 1 354 0
+	mov	x2, x0
+	ldr	x0, [x29, 112]
+.LVL98:
+	mov	w3, w24
+	mov	w1, w19
+	bl	rockchip_secure_otp_read
+.LVL99:
+	.loc 1 355 0
+	cbnz	w0, .L60
+	mov	x0, 0
+.LVL100:
+.L35:
+	.loc 1 360 0 discriminator 1
+	cmp	w24, w0
+	bgt	.L36
+.LBB211:
+.LBB207:
+	.loc 1 308 0
+	adrp	x20, .LANCHOR3
+.LVL101:
+	add	x20, x20, :lo12:.LANCHOR3
+.LBE207:
+.LBE211:
+	.loc 1 360 0
+	mov	x23, 0
+.LVL102:
+.L37:
+	.loc 1 370 0 discriminator 1
+	cmp	w24, w23
+	bgt	.L53
+	mov	w27, 0
+	b	.L30
+.LVL103:
+.L36:
+	add	x0, x0, 1
+.LVL104:
+	.loc 1 361 0
+	add	x1, x20, x0
+	ldrb	w1, [x1, -1]
+	cbz	w1, .L35
+	.loc 1 362 0
+	adrp	x0, .LC7
+	add	x0, x0, :lo12:.LC7
+.LVL105:
+.L61:
+.LBB212:
+.LBB208:
+	.loc 1 212 0
+	bl	printf
+.LVL106:
+	b	.L60
+.LVL107:
+.L53:
+.LBE208:
+.LBE212:
+	.loc 1 371 0
+	ldr	x0, [x29, 104]
+	ldrb	w0, [x0, x23]
+	str	w0, [x29, 124]
+.LVL108:
+.LBB213:
+.LBB209:
+	.loc 1 202 0
+	ldr	x0, [x29, 112]
+	bl	dev_get_driver_data
+.LVL109:
+	mov	x26, x0
+.LVL110:
+	.loc 1 205 0
+	cmp	w19, 448
+	bgt	.L60
+	.loc 1 209 0
+	sub	w0, w19, #16
+.LVL111:
+	cmp	w19, 0
+	ccmp	w0, 31, 0, ne
+	bls	.L38
+	sub	w0, w19, #128
+	cmp	w0, 263
+	bls	.L38
+	.loc 1 212 0
+	adrp	x0, .LC5
+	add	x0, x0, :lo12:.LC5
+	b	.L61
+.L38:
+	.loc 1 216 0
+	ldr	w0, [x29, 124]
+	cbnz	w0, .L39
+.LVL112:
+.L52:
+	add	x23, x23, 1
+	add	w19, w19, 1
+	b	.L37
+.LVL113:
+.L39:
+	.loc 1 219 0
+	ldr	x5, [x26, 16]
+	mov	w3, w19
+	ldp	x0, x2, [x28, 8]
+	ldr	x1, [x28, 24]
+	blr	x5
+.LVL114:
+.LBB135:
+	.loc 1 222 0
+#APP
+// 222 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, 262148
+	str	w1, [x0, 32]
+.LVL115:
+.LBE135:
+.LBB136:
+	.loc 1 223 0
+#APP
+// 223 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, -65536
+	str	w1, [x0, 40]
+.LVL116:
+.LBE136:
+.LBB137:
+	.loc 1 224 0
+#APP
+// 224 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, 512
+	movk	w1, 0xff00, lsl 16
+	str	w1, [x0, 32]
+.LVL117:
+.LBE137:
+.LBB138:
+	.loc 1 225 0
+#APP
+// 225 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, -65522
+	str	w1, [x0, 36]
+.LVL118:
+.LBE138:
+.LBB139:
+	.loc 1 226 0
+#APP
+// 226 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w2, 240
+	str	w2, [x29, 120]
+.LVL119:
+	str	w2, [x0, 4096]
+.LBE139:
+.LBB140:
+	.loc 1 227 0
+#APP
+// 227 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w25, 1
+	str	w25, [x0, 4100]
+.LVL120:
+.LBE140:
+.LBB141:
+	.loc 1 228 0
+#APP
+// 228 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w21, 122
+	str	w21, [x0, 4104]
+.LVL121:
+.LBE141:
+.LBB142:
+	.loc 1 229 0
+#APP
+// 229 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, 37
+	str	w1, [x0, 4108]
+.LVL122:
+.LBE142:
+.LBB143:
+	.loc 1 230 0
+#APP
+// 230 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, 4
+	str	w1, [x0, 4112]
+.LVL123:
+.LBE143:
+.LBB144:
+	.loc 1 231 0
+#APP
+// 231 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	str	wzr, [x0, 4116]
+.LVL124:
+.LBE144:
+.LBB145:
+	.loc 1 232 0
+#APP
+// 232 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	str	wzr, [x0, 4120]
+.LVL125:
+.LBE145:
+.LBB146:
+	.loc 1 233 0
+#APP
+// 233 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	str	wzr, [x0, 4124]
+.LVL126:
+.LBE146:
+.LBB147:
+	.loc 1 234 0
+#APP
+// 234 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, 11
+	str	w1, [x0, 4128]
+.LVL127:
+.LBE147:
+.LBB148:
+	.loc 1 235 0
+#APP
+// 235 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, 8
+	str	w1, [x0, 4132]
+.LVL128:
+.LBE148:
+.LBB149:
+	.loc 1 236 0
+#APP
+// 236 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	str	wzr, [x0, 4136]
+.LVL129:
+.LBE149:
+.LBB150:
+	.loc 1 237 0
+#APP
+// 237 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	str	wzr, [x0, 4140]
+.LVL130:
+.LBE150:
+.LBB151:
+	.loc 1 238 0
+#APP
+// 238 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	str	wzr, [x0, 4144]
+.LBE151:
+.LBB152:
+	.loc 1 239 0
+	and	w0, w19, 255
+#APP
+// 239 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x1, [x28]
+	str	w0, [x1, 4148]
+.LBE152:
+.LBB153:
+	.loc 1 240 0
+	ubfx	x1, x19, 8, 8
+.LVL131:
+#APP
+// 240 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	str	w1, [x0, 4152]
+.LVL132:
+.LBE153:
+.LBB154:
+	.loc 1 241 0
+#APP
+// 241 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w22, 65537
+.LBE154:
+	.loc 1 242 0
+	mov	w1, 2
+.LVL133:
+.LBB155:
+	.loc 1 241 0
+	str	w22, [x0, 32]
+.LVL134:
+.LBE155:
+	.loc 1 242 0
+	mov	x0, x28
+	bl	rockchip_secure_otp_wait_status.isra.1
+.LVL135:
+	mov	w27, w0
+.LVL136:
+	.loc 1 243 0
+	ldr	w2, [x29, 120]
+	tbz	w0, #31, .L40
+	.loc 1 244 0
+	adrp	x0, .LC8
+.LVL137:
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC8
+.L59:
+	.loc 1 267 0
+	bl	printf
+.LVL138:
+.L41:
+.LBB156:
+	.loc 1 335 0
+#APP
+// 335 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, -65533
+.LBE156:
+	.loc 1 336 0
+	ldr	x6, [x26, 24]
+	mov	w3, w19
+	ldr	x2, [x28, 16]
+.LBB157:
+	.loc 1 335 0
+	str	w1, [x0, 772]
+.LBE157:
+	.loc 1 336 0
+	ldr	x0, [x28, 8]
+	ldr	x1, [x28, 24]
+	blr	x6
+.LVL139:
+.LBE209:
+.LBE213:
+	.loc 1 372 0
+	cbz	w27, .L52
+	b	.L30
+.LVL140:
+.L40:
+.LBB214:
+.LBB210:
+.LBB158:
+	.loc 1 248 0
+#APP
+// 248 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+.LVL141:
+	mov	w1, 14848
+	movk	w1, 0xff00, lsl 16
+	str	w1, [x0, 32]
+.LVL142:
+.LBE158:
+.LBB159:
+	.loc 1 249 0
+#APP
+// 249 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	str	w2, [x0, 4096]
+.LVL143:
+.LBE159:
+.LBB160:
+	.loc 1 250 0
+#APP
+// 250 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	str	w25, [x0, 4100]
+.LVL144:
+.LBE160:
+.LBB161:
+	.loc 1 251 0
+#APP
+// 251 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	str	w21, [x0, 4104]
+.LVL145:
+.LBE161:
+.LBB162:
+	.loc 1 252 0
+#APP
+// 252 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, 21
+	str	w1, [x0, 4108]
+.LVL146:
+.LBE162:
+.LBB163:
+	.loc 1 253 0
+#APP
+// 253 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, 220
+	str	w1, [x0, 4112]
+.LVL147:
+.LBE163:
+.LBB164:
+	.loc 1 254 0
+#APP
+// 254 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, 146
+	str	w1, [x0, 4116]
+.LVL148:
+.LBE164:
+.LBB165:
+	.loc 1 255 0
+#APP
+// 255 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, 121
+	str	w1, [x0, 4120]
+.LVL149:
+.LBE165:
+.LBB166:
+	.loc 1 256 0
+#APP
+// 256 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, 129
+	str	w1, [x0, 4124]
+.LVL150:
+.LBE166:
+.LBB167:
+	.loc 1 257 0
+#APP
+// 257 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, 126
+	str	w1, [x0, 4128]
+.LVL151:
+.LBE167:
+.LBB168:
+	.loc 1 258 0
+#APP
+// 258 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, 33
+	str	w1, [x0, 4132]
+.LVL152:
+.LBE168:
+.LBB169:
+	.loc 1 259 0
+#APP
+// 259 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, 17
+	str	w1, [x0, 4136]
+.LVL153:
+.LBE169:
+.LBB170:
+	.loc 1 260 0
+#APP
+// 260 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, 157
+	str	w1, [x0, 4140]
+.LVL154:
+.LBE170:
+.LBB171:
+	.loc 1 261 0
+#APP
+// 261 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w21, 2
+	str	w21, [x0, 4144]
+.LVL155:
+.LBE171:
+.LBB172:
+	.loc 1 262 0
+#APP
+// 262 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	str	wzr, [x0, 4148]
+.LVL156:
+.LBE172:
+.LBB173:
+	.loc 1 263 0
+#APP
+// 263 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	str	wzr, [x0, 4152]
+.LVL157:
+.LBE173:
+.LBB174:
+	.loc 1 264 0
+#APP
+// 264 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+.LBE174:
+	.loc 1 265 0
+	mov	w1, w21
+.LBB175:
+	.loc 1 264 0
+	str	w22, [x0, 32]
+.LBE175:
+	.loc 1 265 0
+	mov	x0, x28
+	bl	rockchip_secure_otp_wait_status.isra.1
+.LVL158:
+	mov	w27, w0
+.LVL159:
+	.loc 1 266 0
+	tbz	w0, #31, .L42
+	.loc 1 267 0
+	adrp	x0, .LC9
+.LVL160:
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC9
+	b	.L59
+.LVL161:
+.L42:
+.LBB176:
+	.loc 1 271 0
+#APP
+// 271 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+.LVL162:
+	mov	w1, 512
+	movk	w1, 0xff00, lsl 16
+	str	w1, [x0, 32]
+.LVL163:
+.LBE176:
+.LBB177:
+	.loc 1 272 0
+#APP
+// 272 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, -65535
+	str	w1, [x0, 36]
+.LVL164:
+.LBE177:
+.LBB178:
+	.loc 1 273 0
+#APP
+// 273 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, 251
+	str	w1, [x0, 4096]
+.LVL165:
+.LBE178:
+.LBB179:
+	.loc 1 274 0
+#APP
+// 274 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	str	wzr, [x0, 4100]
+.LVL166:
+.LBE179:
+.LBB180:
+	.loc 1 275 0
+#APP
+// 275 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+.LBE180:
+	.loc 1 276 0
+	mov	w1, w21
+.LBB181:
+	.loc 1 275 0
+	str	w22, [x0, 32]
+.LBE181:
+	.loc 1 276 0
+	mov	x0, x28
+	bl	rockchip_secure_otp_wait_status.isra.1
+.LVL167:
+	mov	w27, w0
+.LVL168:
+	.loc 1 277 0
+	tbz	w0, #31, .L43
+	.loc 1 278 0
+	adrp	x0, .LC10
+.LVL169:
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC10
+	b	.L59
+.LVL170:
+.L43:
+.LBB182:
+	.loc 1 282 0
+#APP
+// 282 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+.LVL171:
+	mov	w1, 192
+	str	w1, [x0, 4096]
+.LVL172:
+.LBE182:
+.LBB183:
+	.loc 1 283 0
+#APP
+// 283 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	ldr	w1, [x29, 124]
+	str	w1, [x0, 4100]
+.LVL173:
+.LBE183:
+.LBB184:
+	.loc 1 284 0
+#APP
+// 284 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+.LBE184:
+	.loc 1 285 0
+	mov	w1, w21
+.LBB185:
+	.loc 1 284 0
+	str	w22, [x0, 32]
+.LBE185:
+	.loc 1 285 0
+	mov	x0, x28
+	bl	rockchip_secure_otp_wait_status.isra.1
+.LVL174:
+	mov	w27, w0
+.LVL175:
+	.loc 1 286 0
+	tbz	w0, #31, .L44
+	.loc 1 287 0
+	adrp	x0, .LC11
+.LVL176:
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC11
+	b	.L59
+.LVL177:
+.L44:
+.LBB186:
+	.loc 1 291 0
+#APP
+// 291 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+.LVL178:
+	mov	w1, 14848
+	movk	w1, 0xff00, lsl 16
+	str	w1, [x0, 32]
+.LVL179:
+.LBE186:
+.LBB187:
+	.loc 1 292 0
+#APP
+// 292 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, 255
+	str	w1, [x0, 4096]
+.LVL180:
+.LBE187:
+.LBB188:
+	.loc 1 293 0
+#APP
+// 293 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, 10
+	str	w1, [x0, 4100]
+.LVL181:
+.LBE188:
+.LBB189:
+	.loc 1 294 0
+#APP
+// 294 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+.LBE189:
+	.loc 1 295 0
+	mov	w1, w21
+.LBB190:
+	.loc 1 294 0
+	str	w22, [x0, 32]
+.LBE190:
+	.loc 1 295 0
+	mov	x0, x28
+	bl	rockchip_secure_otp_wait_status.isra.1
+.LVL182:
+	mov	w27, w0
+.LVL183:
+	.loc 1 296 0
+	tbz	w0, #31, .L45
+	.loc 1 297 0
+	adrp	x0, .LC12
+.LVL184:
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC12
+	b	.L59
+.LVL185:
+.L45:
+.LBB191:
+	.loc 1 301 0
+#APP
+// 301 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+.LVL186:
+	mov	w1, -65534
+	str	w1, [x0, 36]
+.LVL187:
+.LBE191:
+.LBB192:
+	.loc 1 302 0
+#APP
+// 302 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	str	w25, [x0, 4096]
+.LVL188:
+.LBE192:
+.LBB193:
+	.loc 1 303 0
+#APP
+// 303 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, 191
+	str	w1, [x0, 4100]
+.LVL189:
+.LBE193:
+.LBB194:
+	.loc 1 304 0
+#APP
+// 304 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	str	wzr, [x0, 4104]
+.LVL190:
+.LBE194:
+.LBB195:
+	.loc 1 305 0
+#APP
+// 305 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+.LBE195:
+	.loc 1 306 0
+	mov	w1, w21
+.LBB196:
+	.loc 1 305 0
+	str	w22, [x0, 32]
+.LBE196:
+	.loc 1 306 0
+	mov	x0, x28
+	bl	rockchip_secure_otp_wait_status.isra.1
+.LVL191:
+	mov	w27, w0
+.LVL192:
+	.loc 1 307 0
+	tbnz	w0, #31, .L46
+	mov	w21, 34465
+	movk	w21, 0x1, lsl 16
+.LVL193:
+.L47:
+.LBB197:
+.LBB198:
+.LBB199:
+	.loc 1 106 0
+	ldr	x0, [x28]
+	ldr	w0, [x0, 44]
+.LVL194:
+#APP
+// 106 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+.LVL195:
+#NO_APP
+.LBE199:
+	.loc 1 107 0
+	and	w27, w0, 16
+	tbz	x0, 4, .L48
+	.loc 1 110 0
+	subs	w21, w21, #1
+.LVL196:
+	beq	.L49
+.LVL197:
+	.loc 1 116 0
+	mov	x0, 1
+.LVL198:
+	bl	udelay
+.LVL199:
+	b	.L47
+.LVL200:
+.L46:
+.LBE198:
+.LBE197:
+	.loc 1 308 0
+	adrp	x0, .LC13
+.LVL201:
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC13
+	b	.L59
+.LVL202:
+.L54:
+	.loc 1 324 0
+	mov	x1, x20
+	adrp	x0, .LC14
+.LVL203:
+	mov	w27, w21
+	add	x0, x0, :lo12:.LC14
+	bl	printf
+.LVL204:
+	b	.L41
+.LVL205:
+.L49:
+	.loc 1 314 0
+	adrp	x0, .LC15
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC15
+.L58:
+	.loc 1 330 0
+	bl	printf
+.LVL206:
+	mov	w27, -1
+	b	.L41
+.LVL207:
+.L48:
+.LBB200:
+	.loc 1 318 0
+#APP
+// 318 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, -65534
+	str	w1, [x0, 36]
+.LVL208:
+.LBE200:
+.LBB201:
+	.loc 1 319 0
+#APP
+// 319 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, 2
+	str	w1, [x0, 4096]
+.LVL209:
+.LBE201:
+.LBB202:
+	.loc 1 320 0
+#APP
+// 320 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w2, 191
+	str	w2, [x0, 4100]
+.LVL210:
+.LBE202:
+.LBB203:
+	.loc 1 321 0
+#APP
+// 321 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w2, 65537
+	str	w2, [x0, 32]
+.LBE203:
+	.loc 1 322 0
+	mov	x0, x28
+	bl	rockchip_secure_otp_wait_status.isra.1
+.LVL211:
+	mov	w21, w0
+.LVL212:
+	.loc 1 323 0
+	tbnz	w0, #31, .L54
+	mov	w21, 20001
+.LVL213:
+.L51:
+.LBB204:
+.LBB205:
+.LBB206:
+	.loc 1 84 0
+	ldr	x0, [x28]
+	ldr	w0, [x0, 44]
+.LVL214:
+#APP
+// 84 "drivers/misc/px30-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+.LVL215:
+#NO_APP
+.LBE206:
+	.loc 1 85 0
+	tbnz	x0, 4, .L41
+	.loc 1 88 0
+	subs	w21, w21, #1
+.LVL216:
+	beq	.L50
+	.loc 1 93 0
+	mov	x0, 1
+.LVL217:
+	bl	udelay
+.LVL218:
+	b	.L51
+.LVL219:
+.L50:
+.LBE205:
+.LBE204:
+	.loc 1 330 0
+	adrp	x0, .LC16
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC16
+	b	.L58
+.LBE210:
+.LBE214:
+	.cfi_endproc
+.LFE270:
+	.size	rockchip_secure_otp_write, .-rockchip_secure_otp_write
+	.global	_u_boot_list_2_driver_2_rockchip_secure_otp
+	.section	.rodata.__func__.7383,"a",@progbits
+	.align	3
+	.set	.LANCHOR0,. + 0
+	.type	__func__.7383, %object
+	.size	__func__.7383, 32
+__func__.7383:
+	.string	"rockchip_secure_otp_wait_status"
+	.section	.rodata.__func__.7426,"a",@progbits
+	.align	3
+	.set	.LANCHOR1,. + 0
+	.type	__func__.7426, %object
+	.size	__func__.7426, 31
+__func__.7426:
+	.string	"rockchip_secure_otp_ecc_enable"
+	.section	.rodata.__func__.7444,"a",@progbits
+	.align	3
+	.set	.LANCHOR2,. + 0
+	.type	__func__.7444, %object
+	.size	__func__.7444, 25
+__func__.7444:
+	.string	"rockchip_secure_otp_read"
+	.section	.rodata.__func__.7501,"a",@progbits
+	.align	3
+	.set	.LANCHOR3,. + 0
+	.type	__func__.7501, %object
+	.size	__func__.7501, 31
+__func__.7501:
+	.string	"rockchip_secure_otp_write_byte"
+	.section	.rodata.px30_data,"a",@progbits
+	.align	3
+	.type	px30_data, %object
+	.size	px30_data, 32
+px30_data:
+	.xword	rockchip_secure_otp_read
+	.xword	rockchip_secure_otp_write
+	.xword	px30_spl_rockchip_otp_start
+	.xword	px30_spl_rockchip_otp_stop
+	.section	.rodata.rockchip_otp_ids,"a",@progbits
+	.align	3
+	.type	rockchip_otp_ids, %object
+	.size	rockchip_otp_ids, 32
+rockchip_otp_ids:
+	.xword	.LC18
+	.xword	px30_data
+	.zero	16
+	.section	.rodata.rockchip_secure_otp_ofdata_to_platdata.str1.1,"aMS",@progbits,1
+.LC0:
+	.string	"secure_conf"
+.LC1:
+	.string	"mask_addr"
+.LC2:
+	.string	"cru_rst_addr"
+	.section	.rodata.rockchip_secure_otp_ops,"a",@progbits
+	.align	3
+	.type	rockchip_secure_otp_ops, %object
+	.size	rockchip_secure_otp_ops, 32
+rockchip_secure_otp_ops:
+	.xword	secure_otp_read
+	.xword	secure_otp_write
+	.xword	secure_otp_ioctl
+	.zero	8
+	.section	.rodata.rockchip_secure_otp_read.str1.1,"aMS",@progbits,1
+.LC4:
+	.string	"%s timeout during ecc_enable\n"
+.LC5:
+	.string	"Please input correct addr\n"
+.LC6:
+	.string	"%s timeout during read setup\n"
+	.section	.rodata.rockchip_secure_otp_wait_status.isra.1.str1.1,"aMS",@progbits,1
+.LC3:
+	.string	"%s: wait init status timeout\n"
+	.section	.rodata.rockchip_secure_otp_write.str1.1,"aMS",@progbits,1
+.LC7:
+	.string	"The zone is written.\n"
+.LC8:
+	.string	"%s timeout during write setup 1\n"
+.LC9:
+	.string	"%s timeout during write setup 2\n"
+.LC10:
+	.string	"%s timeout during write setup 3\n"
+.LC11:
+	.string	"%s timeout during write setup 4\n"
+.LC12:
+	.string	"%s timeout during write setup 5\n"
+.LC13:
+	.string	"%s timeout during write setup 6\n"
+.LC14:
+	.string	"%s timeout during write setup 8\n"
+.LC15:
+	.string	"%s timeout during write setup 7\n"
+.LC16:
+	.string	"%s timeout during write setup 9\n"
+	.section	.rodata.str1.1,"aMS",@progbits,1
+.LC17:
+	.string	"rockchip_secure_otp"
+.LC18:
+	.string	"rockchip,px30-secure-otp"
+	.section	.u_boot_list_2_driver_2_rockchip_secure_otp,"aw",@progbits
+	.align	2
+	.type	_u_boot_list_2_driver_2_rockchip_secure_otp, %object
+	.size	_u_boot_list_2_driver_2_rockchip_secure_otp, 120
+_u_boot_list_2_driver_2_rockchip_secure_otp:
+	.8byte	.LC17
+	.word	36
+	.zero	4
+	.8byte	rockchip_otp_ids
+	.zero	32
+	.8byte	rockchip_secure_otp_ofdata_to_platdata
+	.zero	28
+	.word	32
+	.zero	8
+	.8byte	rockchip_secure_otp_ops
+	.zero	8
+	.text
+.Letext0:
+	.file 2 "include/common.h"
+	.file 3 "./arch/arm/include/asm/types.h"
+	.file 4 "include/linux/types.h"
+	.file 5 "include/errno.h"
+	.file 6 "include/linux/string.h"
+	.file 7 "include/efi.h"
+	.file 8 "include/dm/device.h"
+	.file 9 "include/ide.h"
+	.file 10 "include/linux/list.h"
+	.file 11 "include/part.h"
+	.file 12 "include/flash.h"
+	.file 13 "include/lmb.h"
+	.file 14 "include/asm-generic/u-boot.h"
+	.file 15 "./arch/arm/include/asm/u-boot-arm.h"
+	.file 16 "include/linux/libfdt_env.h"
+	.file 17 "include/linux/../../scripts/dtc/libfdt/fdt.h"
+	.file 18 "include/linux/libfdt.h"
+	.file 19 "include/image.h"
+	.file 20 "./arch/arm/include/asm/global_data.h"
+	.file 21 "include/asm-generic/global_data.h"
+	.file 22 "include/dm/of.h"
+	.file 23 "include/net.h"
+	.file 24 "include/dm/uclass-id.h"
+	.file 25 "include/dm/ofnode.h"
+	.file 26 "include/malloc.h"
+	.file 27 "include/linux/compat.h"
+	.file 28 "include/dm/uclass.h"
+	.file 29 "include/asm-generic/ioctl.h"
+	.file 30 "include/misc.h"
+	.file 31 "include/rockchip-otp.h"
+	.file 32 "include/dm/read.h"
+	.file 33 "include/linux/delay.h"
+	.file 34 "include/stdio.h"
+	.file 35 "include/log.h"
+	.section	.debug_info,"",@progbits
+.Ldebug_info0:
+	.4byte	0x307b
+	.2byte	0x4
+	.4byte	.Ldebug_abbrev0
+	.byte	0x8
+	.uleb128 0x1
+	.4byte	.LASF446
+	.byte	0xc
+	.4byte	.LASF447
+	.4byte	.LASF448
+	.4byte	.Ldebug_ranges0+0x240
+	.8byte	0
+	.4byte	.Ldebug_line0
+	.uleb128 0x2
+	.4byte	.LASF4
+	.byte	0x2
+	.byte	0xd
+	.4byte	0x34
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x8
+	.4byte	.LASF0
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF1
+	.uleb128 0x3
+	.byte	0x2
+	.byte	0x7
+	.4byte	.LASF2
+	.uleb128 0x4
+	.4byte	.LASF21
+	.byte	0x5
+	.byte	0xc
+	.4byte	0x54
+	.uleb128 0x5
+	.byte	0x4
+	.byte	0x5
+	.string	"int"
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x6
+	.4byte	.LASF3
+	.uleb128 0x2
+	.4byte	.LASF5
+	.byte	0x3
+	.byte	0xc
+	.4byte	0x34
+	.uleb128 0x3
+	.byte	0x2
+	.byte	0x5
+	.4byte	.LASF6
+	.uleb128 0x2
+	.4byte	.LASF7
+	.byte	0x3
+	.byte	0x12
+	.4byte	0x7f
+	.uleb128 0x3
+	.byte	0x4
+	.byte	0x7
+	.4byte	.LASF8
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x5
+	.4byte	.LASF9
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF10
+	.uleb128 0x6
+	.string	"u8"
+	.byte	0x3
+	.byte	0x1f
+	.4byte	0x34
+	.uleb128 0x7
+	.4byte	0x94
+	.uleb128 0x6
+	.string	"u32"
+	.byte	0x3
+	.byte	0x25
+	.4byte	0x7f
+	.uleb128 0x6
+	.string	"u64"
+	.byte	0x3
+	.byte	0x28
+	.4byte	0x8d
+	.uleb128 0x2
+	.4byte	.LASF11
+	.byte	0x3
+	.byte	0x31
+	.4byte	0x8d
+	.uleb128 0x2
+	.4byte	.LASF12
+	.byte	0x3
+	.byte	0x32
+	.4byte	0x8d
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF13
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0xe3
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x8
+	.4byte	.LASF14
+	.uleb128 0x7
+	.4byte	0xdc
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x5
+	.4byte	.LASF15
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0xdc
+	.uleb128 0x2
+	.4byte	.LASF16
+	.byte	0x4
+	.byte	0x59
+	.4byte	0x42
+	.uleb128 0x2
+	.4byte	.LASF17
+	.byte	0x4
+	.byte	0x5b
+	.4byte	0x3b
+	.uleb128 0x2
+	.4byte	.LASF18
+	.byte	0x4
+	.byte	0x69
+	.4byte	0x62
+	.uleb128 0x2
+	.4byte	.LASF19
+	.byte	0x4
+	.byte	0x6b
+	.4byte	0x74
+	.uleb128 0x2
+	.4byte	.LASF20
+	.byte	0x4
+	.byte	0x97
+	.4byte	0x74
+	.uleb128 0x9
+	.byte	0x8
+	.uleb128 0x4
+	.4byte	.LASF22
+	.byte	0x6
+	.byte	0xb
+	.4byte	0xef
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x2
+	.4byte	.LASF23
+	.uleb128 0xa
+	.4byte	0xdc
+	.4byte	0x14b
+	.uleb128 0xb
+	.byte	0
+	.uleb128 0xc
+	.4byte	.LASF24
+	.byte	0x7
+	.2byte	0x140
+	.4byte	0x140
+	.uleb128 0xc
+	.4byte	.LASF25
+	.byte	0x7
+	.2byte	0x143
+	.4byte	0x140
+	.uleb128 0xc
+	.4byte	.LASF26
+	.byte	0x7
+	.2byte	0x143
+	.4byte	0x140
+	.uleb128 0xd
+	.4byte	.LASF45
+	.byte	0xa0
+	.byte	0x8
+	.byte	0x80
+	.4byte	0x254
+	.uleb128 0xe
+	.4byte	.LASF27
+	.byte	0x8
+	.byte	0x81
+	.4byte	0x1353
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF28
+	.byte	0x8
+	.byte	0x82
+	.4byte	0xd6
+	.byte	0x8
+	.uleb128 0xe
+	.4byte	.LASF29
+	.byte	0x8
+	.byte	0x83
+	.4byte	0x12c
+	.byte	0x10
+	.uleb128 0xe
+	.4byte	.LASF30
+	.byte	0x8
+	.byte	0x84
+	.4byte	0x12c
+	.byte	0x18
+	.uleb128 0xe
+	.4byte	.LASF31
+	.byte	0x8
+	.byte	0x85
+	.4byte	0x12c
+	.byte	0x20
+	.uleb128 0xe
+	.4byte	.LASF32
+	.byte	0x8
+	.byte	0x86
+	.4byte	0x12fa
+	.byte	0x28
+	.uleb128 0xe
+	.4byte	.LASF33
+	.byte	0x8
+	.byte	0x87
+	.4byte	0x100
+	.byte	0x30
+	.uleb128 0xe
+	.4byte	.LASF34
+	.byte	0x8
+	.byte	0x88
+	.4byte	0x254
+	.byte	0x38
+	.uleb128 0xe
+	.4byte	.LASF35
+	.byte	0x8
+	.byte	0x89
+	.4byte	0x12c
+	.byte	0x40
+	.uleb128 0xe
+	.4byte	.LASF36
+	.byte	0x8
+	.byte	0x8a
+	.4byte	0x1396
+	.byte	0x48
+	.uleb128 0xe
+	.4byte	.LASF37
+	.byte	0x8
+	.byte	0x8b
+	.4byte	0x12c
+	.byte	0x50
+	.uleb128 0xe
+	.4byte	.LASF38
+	.byte	0x8
+	.byte	0x8c
+	.4byte	0x12c
+	.byte	0x58
+	.uleb128 0xe
+	.4byte	.LASF39
+	.byte	0x8
+	.byte	0x8d
+	.4byte	0x287
+	.byte	0x60
+	.uleb128 0xe
+	.4byte	.LASF40
+	.byte	0x8
+	.byte	0x8e
+	.4byte	0x287
+	.byte	0x70
+	.uleb128 0xe
+	.4byte	.LASF41
+	.byte	0x8
+	.byte	0x8f
+	.4byte	0x287
+	.byte	0x80
+	.uleb128 0xe
+	.4byte	.LASF42
+	.byte	0x8
+	.byte	0x90
+	.4byte	0x116
+	.byte	0x90
+	.uleb128 0xe
+	.4byte	.LASF43
+	.byte	0x8
+	.byte	0x91
+	.4byte	0x54
+	.byte	0x94
+	.uleb128 0xf
+	.string	"seq"
+	.byte	0x8
+	.byte	0x92
+	.4byte	0x54
+	.byte	0x98
+	.byte	0
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x16f
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x260
+	.uleb128 0x10
+	.uleb128 0xa
+	.4byte	0x100
+	.4byte	0x26c
+	.uleb128 0xb
+	.byte	0
+	.uleb128 0x4
+	.4byte	.LASF44
+	.byte	0x9
+	.byte	0x10
+	.4byte	0x261
+	.uleb128 0xa
+	.4byte	0x34
+	.4byte	0x287
+	.uleb128 0x11
+	.4byte	0xcf
+	.byte	0x5
+	.byte	0
+	.uleb128 0xd
+	.4byte	.LASF46
+	.byte	0x10
+	.byte	0xa
+	.byte	0x16
+	.4byte	0x2ac
+	.uleb128 0xe
+	.4byte	.LASF47
+	.byte	0xa
+	.byte	0x17
+	.4byte	0x2ac
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF48
+	.byte	0xa
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+	.uleb128 0xd
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+	.2byte	0x120
+	.byte	0xd
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+	.4byte	0x3f9
+	.uleb128 0xf
+	.string	"cnt"
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+	.uleb128 0xe
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+	.uleb128 0x11
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+	.byte	0x10
+	.byte	0
+	.uleb128 0x18
+	.string	"lmb"
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+	.byte	0xd
+	.byte	0x1b
+	.4byte	0x430
+	.uleb128 0xe
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+	.byte	0xd
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+	.uleb128 0x15
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+	.byte	0xd
+	.byte	0x1d
+	.4byte	0x3c7
+	.2byte	0x120
+	.byte	0
+	.uleb128 0x19
+	.string	"lmb"
+	.byte	0xd
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+	.4byte	0x409
+	.uleb128 0x1a
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+	.byte	0x5d
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+	.uleb128 0xe
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+	.uleb128 0xe
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+	.byte	0x5f
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+	.uleb128 0xd
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+	.byte	0xb0
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+	.byte	0x1b
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+	.uleb128 0xe
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+	.uleb128 0xe
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+	.uleb128 0x1e
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+	.4byte	0x1589
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+	.uleb128 0xe
+	.4byte	.LASF401
+	.byte	0x1e
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+	.byte	0x10
+	.uleb128 0xe
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+	.byte	0x8c
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+	.byte	0
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+	.byte	0x1f
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+	.uleb128 0xe
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+	.byte	0x1f
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+	.byte	0
+	.uleb128 0xe
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+	.byte	0x1f
+	.byte	0x53
+	.4byte	0x3b
+	.byte	0x8
+	.uleb128 0xe
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+	.byte	0x1f
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+	.4byte	0x3b
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+	.uleb128 0xe
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+	.byte	0x1f
+	.byte	0x55
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+	.byte	0
+	.uleb128 0xd
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+	.byte	0x20
+	.byte	0x1
+	.byte	0xf
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+	.uleb128 0xe
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+	.byte	0x1
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+	.4byte	0x1565
+	.byte	0
+	.uleb128 0xe
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+	.byte	0x11
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+	.byte	0x8
+	.uleb128 0xe
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+	.byte	0x1
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+	.4byte	0x167b
+	.byte	0x10
+	.uleb128 0xe
+	.4byte	.LASF409
+	.byte	0x1
+	.byte	0x15
+	.4byte	0x167b
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+	.byte	0
+	.uleb128 0x7
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+	.uleb128 0x2d
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+	.4byte	0x1675
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+	.uleb128 0x13
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+	.byte	0
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x7f
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x165b
+	.uleb128 0x2e
+	.4byte	.LASF410
+	.byte	0x1
+	.2byte	0x1a4
+	.4byte	0x1542
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	rockchip_secure_otp_ops
+	.uleb128 0x2e
+	.4byte	.LASF411
+	.byte	0x1
+	.2byte	0x1b9
+	.4byte	0x1656
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	px30_data
+	.uleb128 0xa
+	.4byte	0x13c1
+	.4byte	0x16bd
+	.uleb128 0x11
+	.4byte	0xcf
+	.byte	0x1
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x16ad
+	.uleb128 0x2e
+	.4byte	.LASF412
+	.byte	0x1
+	.2byte	0x1c0
+	.4byte	0x16bd
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	rockchip_otp_ids
+	.uleb128 0x2f
+	.4byte	.LASF413
+	.byte	0x1
+	.2byte	0x1c8
+	.4byte	0x1197
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	_u_boot_list_2_driver_2_rockchip_secure_otp
+	.uleb128 0x30
+	.4byte	.LASF414
+	.byte	0x1
+	.2byte	0x1aa
+	.4byte	0x54
+	.8byte	.LFB275
+	.8byte	.LFE275-.LFB275
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x17db
+	.uleb128 0x31
+	.string	"dev"
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+	.2byte	0x1aa
+	.4byte	0x254
+	.4byte	.LLST18
+	.uleb128 0x32
+	.string	"otp"
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+	.2byte	0x1ac
+	.4byte	0x17db
+	.4byte	.LLST19
+	.uleb128 0x33
+	.8byte	.LVL27
+	.4byte	0x302e
+	.4byte	0x1748
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x33
+	.8byte	.LVL30
+	.4byte	0x303a
+	.4byte	0x1760
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
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+	.4byte	0x3045
+	.4byte	0x178a
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
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+	.uleb128 0x1
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+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
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+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
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+	.uleb128 0x1
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+	.uleb128 0x1
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+	.uleb128 0x1
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+	.uleb128 0x1
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+	.uleb128 0x1
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+	.uleb128 0x1
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+	.uleb128 0x31
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+	.4byte	0x3b
+	.uleb128 0x1
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+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x32
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+	.4byte	0x1862
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+	.8byte	.LBE26-.LBB26
+	.byte	0x1
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+	.4byte	.LLST7
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+	.uleb128 0x3b
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+	.8byte	.LFE272-.LFB272
+	.uleb128 0x1
+	.byte	0x9c
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+	.uleb128 0x31
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+	.uleb128 0x3c
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+	.4byte	0x54
+	.4byte	.LLST9
+	.uleb128 0x31
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+	.uleb128 0x31
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+	.uleb128 0x2
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+	.uleb128 0x1
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+	.uleb128 0x1
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+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x87
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+	.4byte	0x2b9c
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x84
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+	.uleb128 0x1
+	.byte	0x50
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+	.uleb128 0x1
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+	.uleb128 0x2
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+	.4byte	0x2ceb
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+	.byte	0x7a
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+	.byte	0x7b
+	.4byte	0x139
+	.uleb128 0x53
+	.string	"ret"
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+	.byte	0x7d
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+	.uleb128 0x55
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+	.4byte	0x28c9
+	.4byte	.LASF428
+	.uleb128 0x57
+	.4byte	0x2c99
+	.uleb128 0x53
+	.string	"__v"
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+	.4byte	0xa3
+	.byte	0
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+	.4byte	0x2caa
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+	.string	"__v"
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+	.4byte	0xa3
+	.byte	0
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+	.4byte	0x2cbb
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+	.string	"__v"
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+	.4byte	0x2ccc
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+	.string	"__v"
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+	.4byte	0xa3
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+	.4byte	0x2cdd
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+	.string	"__v"
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+	.byte	0
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+	.uleb128 0x53
+	.string	"__v"
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+	.byte	0
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+	.byte	0x1
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+	.uleb128 0x51
+	.string	"otp"
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+	.4byte	.LASF430
+	.byte	0x1
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+	.uleb128 0x54
+	.4byte	.LASF422
+	.byte	0x1
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+	.4byte	0x54
+	.uleb128 0x53
+	.string	"ret"
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+	.uleb128 0x59
+	.uleb128 0x53
+	.string	"__v"
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+	.byte	0x6a
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+	.byte	0
+	.byte	0
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+	.4byte	.LASF431
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+	.byte	0x4e
+	.4byte	0x54
+	.byte	0x1
+	.4byte	0x2d7f
+	.uleb128 0x51
+	.string	"otp"
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+	.4byte	.LASF430
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+	.uleb128 0x54
+	.4byte	.LASF422
+	.byte	0x1
+	.byte	0x51
+	.4byte	0x54
+	.uleb128 0x53
+	.string	"ret"
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+	.uleb128 0x59
+	.uleb128 0x53
+	.string	"__v"
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+	.byte	0x1
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+	.string	"otp"
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+	.uleb128 0x53
+	.string	"__v"
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+	.string	"__v"
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+	.4byte	.LASF437
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+	.byte	0x1
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+	.4byte	.LLST4
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+	.8byte	.LBB24
+	.8byte	.LBE24-.LBB24
+	.4byte	0x2e6d
+	.uleb128 0x62
+	.string	"__v"
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+	.8byte	.LBB25
+	.8byte	.LBE25-.LBB25
+	.uleb128 0x68
+	.string	"__v"
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+	.uleb128 0x62
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+	.uleb128 0x13
+	.uleb128 0x20
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x51
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x52
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x53
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x54
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x55
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x34
+	.uleb128 0x19
+	.uleb128 0x1c
+	.uleb128 0xe
+	.byte	0
+	.byte	0
+	.uleb128 0x56
+	.uleb128 0xa
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x57
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x58
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x59
+	.uleb128 0xb
+	.byte	0x1
+	.byte	0
+	.byte	0
+	.uleb128 0x5a
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x5c
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x5d
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x5e
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x5f
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x60
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x34
+	.uleb128 0x19
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x61
+	.uleb128 0xa
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x11
+	.uleb128 0x1
+	.byte	0
+	.byte	0
+	.uleb128 0x62
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x1c
+	.uleb128 0x6
+	.byte	0
+	.byte	0
+	.uleb128 0x63
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x64
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x65
+	.uleb128 0x4109
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.byte	0
+	.byte	0
+	.uleb128 0x66
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x67
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x68
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x1c
+	.uleb128 0xd
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x20
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x6a
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x6b
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x6c
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.byte	0
+	.section	.debug_loc,"",@progbits
+.Ldebug_loc0:
+.LLST18:
+	.8byte	.LVL26
+	.8byte	.LVL27-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL27-1
+	.8byte	.LVL34
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL34
+	.8byte	.LFE275
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST19:
+	.8byte	.LVL28
+	.8byte	.LVL29
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL29
+	.8byte	.LVL34
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST5:
+	.8byte	.LVL9
+	.8byte	.LVL10
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL10
+	.8byte	.LFE274
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST6:
+	.8byte	.LVL9
+	.8byte	.LVL12
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xea
+	.byte	0x9f
+	.8byte	.LVL13
+	.8byte	.LFE274
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xea
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST7:
+	.8byte	.LVL11
+	.8byte	.LVL12
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST8:
+	.8byte	.LVL14
+	.8byte	.LVL15-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL15-1
+	.8byte	.LVL18
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL18
+	.8byte	.LVL19-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL19-1
+	.8byte	.LFE272
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST9:
+	.8byte	.LVL14
+	.8byte	.LVL15-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL15-1
+	.8byte	.LVL18
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL18
+	.8byte	.LVL19-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL19-1
+	.8byte	.LFE272
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST10:
+	.8byte	.LVL14
+	.8byte	.LVL15-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL15-1
+	.8byte	.LVL17
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL17
+	.8byte	.LVL19-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL19-1
+	.8byte	.LFE272
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST11:
+	.8byte	.LVL14
+	.8byte	.LVL15-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL15-1
+	.8byte	.LVL17
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL17
+	.8byte	.LVL19-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL19-1
+	.8byte	.LFE272
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST12:
+	.8byte	.LVL15
+	.8byte	.LVL16
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST13:
+	.8byte	.LVL20
+	.8byte	.LVL21-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL21-1
+	.8byte	.LVL24
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL24
+	.8byte	.LVL25-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL25-1
+	.8byte	.LFE271
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST14:
+	.8byte	.LVL20
+	.8byte	.LVL21-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL21-1
+	.8byte	.LVL24
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL24
+	.8byte	.LVL25-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL25-1
+	.8byte	.LFE271
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST15:
+	.8byte	.LVL20
+	.8byte	.LVL21-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL21-1
+	.8byte	.LVL23
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL23
+	.8byte	.LVL25-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL25-1
+	.8byte	.LFE271
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST16:
+	.8byte	.LVL20
+	.8byte	.LVL21-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL21-1
+	.8byte	.LVL23
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL23
+	.8byte	.LVL25-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL25-1
+	.8byte	.LFE271
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST17:
+	.8byte	.LVL21
+	.8byte	.LVL22
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST38:
+	.8byte	.LVL88
+	.8byte	.LVL89-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL89-1
+	.8byte	.LVL96
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 224
+	.8byte	.LVL96
+	.8byte	.LVL97
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 96
+	.8byte	.LVL97
+	.8byte	.LFE270
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 224
+	.8byte	0
+	.8byte	0
+.LLST39:
+	.8byte	.LVL88
+	.8byte	.LVL89-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL89-1
+	.8byte	.LVL93
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL93
+	.8byte	.LVL97
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL97
+	.8byte	.LVL102
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL102
+	.8byte	.LVL103
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL103
+	.8byte	.LVL105
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL105
+	.8byte	.LFE270
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST40:
+	.8byte	.LVL88
+	.8byte	.LVL89-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL89-1
+	.8byte	.LVL96
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 216
+	.8byte	.LVL96
+	.8byte	.LVL97
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 88
+	.8byte	.LVL97
+	.8byte	.LFE270
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 216
+	.8byte	0
+	.8byte	0
+.LLST41:
+	.8byte	.LVL88
+	.8byte	.LVL89-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL89-1
+	.8byte	.LVL94
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL94
+	.8byte	.LVL97
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL97
+	.8byte	.LFE270
+	.2byte	0x1
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST42:
+	.8byte	.LVL90
+	.8byte	.LVL91
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL91
+	.8byte	.LVL95
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL97
+	.8byte	.LFE270
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	0
+	.8byte	0
+.LLST43:
+	.8byte	.LVL90
+	.8byte	.LVL96
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 216
+	.8byte	.LVL96
+	.8byte	.LVL97
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 88
+	.8byte	.LVL97
+	.8byte	.LFE270
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 216
+	.8byte	0
+	.8byte	0
+.LLST44:
+	.8byte	.LVL92
+	.8byte	.LVL93
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL97
+	.8byte	.LVL98
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL98
+	.8byte	.LVL99-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL99-1
+	.8byte	.LVL101
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL103
+	.8byte	.LVL105
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST45:
+	.8byte	.LVL100
+	.8byte	.LVL102
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL103
+	.8byte	.LVL104
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST46:
+	.8byte	.LVL92
+	.8byte	.LVL93
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL97
+	.8byte	.LVL99
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL99
+	.8byte	.LVL100
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL102
+	.8byte	.LVL103
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL107
+	.8byte	.LVL112
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL113
+	.8byte	.LVL139
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL140
+	.8byte	.LFE270
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST47:
+	.8byte	.LVL108
+	.8byte	.LVL112
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 236
+	.8byte	.LVL113
+	.8byte	.LVL139
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 236
+	.8byte	.LVL140
+	.8byte	.LFE270
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 236
+	.8byte	0
+	.8byte	0
+.LLST48:
+	.8byte	.LVL108
+	.8byte	.LVL112
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL113
+	.8byte	.LVL139
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL140
+	.8byte	.LFE270
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST49:
+	.8byte	.LVL108
+	.8byte	.LVL112
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL113
+	.8byte	.LVL139
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL140
+	.8byte	.LFE270
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	0
+	.8byte	0
+.LLST50:
+	.8byte	.LVL108
+	.8byte	.LVL112
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 224
+	.8byte	.LVL113
+	.8byte	.LVL139
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 224
+	.8byte	.LVL140
+	.8byte	.LFE270
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 224
+	.8byte	0
+	.8byte	0
+.LLST51:
+	.8byte	.LVL108
+	.8byte	.LVL112
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL113
+	.8byte	.LVL136
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL136
+	.8byte	.LVL137
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL137
+	.8byte	.LVL139
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL140
+	.8byte	.LVL141
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL141
+	.8byte	.LVL159
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL159
+	.8byte	.LVL160
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL160
+	.8byte	.LVL161
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL161
+	.8byte	.LVL162
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL162
+	.8byte	.LVL168
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL168
+	.8byte	.LVL169
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL169
+	.8byte	.LVL170
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL170
+	.8byte	.LVL171
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL171
+	.8byte	.LVL175
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL175
+	.8byte	.LVL176
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL176
+	.8byte	.LVL177
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL177
+	.8byte	.LVL178
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL178
+	.8byte	.LVL183
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL183
+	.8byte	.LVL184
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL184
+	.8byte	.LVL185
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL185
+	.8byte	.LVL186
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL186
+	.8byte	.LVL192
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL192
+	.8byte	.LVL193
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL200
+	.8byte	.LVL201
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL201
+	.8byte	.LVL202
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL202
+	.8byte	.LVL203
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL203
+	.8byte	.LVL205
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL212
+	.8byte	.LVL213
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST52:
+	.8byte	.LVL110
+	.8byte	.LVL111
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL111
+	.8byte	.LVL112
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL113
+	.8byte	.LVL139
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL140
+	.8byte	.LFE270
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	0
+	.8byte	0
+.LLST53:
+	.8byte	.LVL131
+	.8byte	.LVL133
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL133
+	.8byte	.LVL134
+	.2byte	0x6
+	.byte	0x8c
+	.sleb128 0
+	.byte	0x6
+	.byte	0x23
+	.uleb128 0x1038
+	.8byte	.LVL134
+	.8byte	.LVL139
+	.2byte	0x6
+	.byte	0x83
+	.sleb128 0
+	.byte	0x9
+	.byte	0xf8
+	.byte	0x24
+	.byte	0x9f
+	.8byte	.LVL140
+	.8byte	.LFE270
+	.2byte	0x6
+	.byte	0x83
+	.sleb128 0
+	.byte	0x9
+	.byte	0xf8
+	.byte	0x24
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST54:
+	.8byte	.LVL138
+	.8byte	.LVL140
+	.2byte	0x5
+	.byte	0x11
+	.sleb128 -65533
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST55:
+	.8byte	.LVL193
+	.8byte	.LVL196
+	.2byte	0x3
+	.byte	0x85
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL196
+	.8byte	.LVL197
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL197
+	.8byte	.LVL200
+	.2byte	0x3
+	.byte	0x85
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST56:
+	.8byte	.LVL195
+	.8byte	.LVL198
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST57:
+	.8byte	.LVL194
+	.8byte	.LVL198
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST58:
+	.8byte	.LVL202
+	.8byte	.LVL205
+	.2byte	0x5
+	.byte	0x11
+	.sleb128 -65534
+	.byte	0x9f
+	.8byte	.LVL207
+	.8byte	.LFE270
+	.2byte	0x5
+	.byte	0x11
+	.sleb128 -65534
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST59:
+	.8byte	.LVL202
+	.8byte	.LVL205
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL208
+	.8byte	.LFE270
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST60:
+	.8byte	.LVL202
+	.8byte	.LVL205
+	.2byte	0x3
+	.byte	0x8
+	.byte	0xbf
+	.byte	0x9f
+	.8byte	.LVL209
+	.8byte	.LFE270
+	.2byte	0x3
+	.byte	0x8
+	.byte	0xbf
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST61:
+	.8byte	.LVL202
+	.8byte	.LVL205
+	.2byte	0x6
+	.byte	0xc
+	.4byte	0x10001
+	.byte	0x9f
+	.8byte	.LVL210
+	.8byte	.LFE270
+	.2byte	0x6
+	.byte	0xc
+	.4byte	0x10001
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST62:
+	.8byte	.LVL213
+	.8byte	.LVL216
+	.2byte	0x3
+	.byte	0x85
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL216
+	.8byte	.LVL218
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL218
+	.8byte	.LVL219
+	.2byte	0x3
+	.byte	0x85
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST63:
+	.8byte	.LVL215
+	.8byte	.LVL217
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST64:
+	.8byte	.LVL214
+	.8byte	.LVL217
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST24:
+	.8byte	.LVL48
+	.8byte	.LVL49-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL49-1
+	.8byte	.LVL63
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL63
+	.8byte	.LFE268
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST25:
+	.8byte	.LVL48
+	.8byte	.LVL49-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL49-1
+	.8byte	.LVL68
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL68
+	.8byte	.LVL69
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL69
+	.8byte	.LVL81
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL83
+	.8byte	.LFE268
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST26:
+	.8byte	.LVL48
+	.8byte	.LVL49-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL49-1
+	.8byte	.LVL65
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL65
+	.8byte	.LFE268
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST27:
+	.8byte	.LVL48
+	.8byte	.LVL49-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL49-1
+	.8byte	.LVL64
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL64
+	.8byte	.LVL65
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL65
+	.8byte	.LFE268
+	.2byte	0x6
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x31
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST28:
+	.8byte	.LVL50
+	.8byte	.LVL51
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL51
+	.8byte	.LVL81
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL83
+	.8byte	.LFE268
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST29:
+	.8byte	.LVL53
+	.8byte	.LVL54
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL54
+	.8byte	.LVL80
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL83
+	.8byte	.LFE268
+	.2byte	0x1
+	.byte	0x69
+	.8byte	0
+	.8byte	0
+.LLST30:
+	.8byte	.LVL53
+	.8byte	.LVL82
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL83
+	.8byte	.LVL87
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL87
+	.8byte	.LFE268
+	.2byte	0x3
+	.byte	0x86
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST31:
+	.8byte	.LVL53
+	.8byte	.LVL65
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL65
+	.8byte	.LVL67
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL68
+	.8byte	.LVL76
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL76
+	.8byte	.LVL77
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL77
+	.8byte	.LVL79
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL83
+	.8byte	.LVL84
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL84
+	.8byte	.LFE268
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST35:
+	.8byte	.LVL70
+	.8byte	.LVL72
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL72
+	.8byte	.LVL73
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 260
+	.8byte	.LVL73
+	.8byte	.LVL74
+	.2byte	0x6
+	.byte	0x83
+	.sleb128 0
+	.byte	0x6
+	.byte	0x23
+	.uleb128 0x104
+	.8byte	.LVL74
+	.8byte	.LVL78
+	.2byte	0x8
+	.byte	0x84
+	.sleb128 -1
+	.byte	0x11
+	.sleb128 -65536
+	.byte	0x21
+	.byte	0x9f
+	.8byte	.LVL83
+	.8byte	.LFE268
+	.2byte	0x8
+	.byte	0x84
+	.sleb128 -1
+	.byte	0x11
+	.sleb128 -65536
+	.byte	0x21
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST36:
+	.8byte	.LVL71
+	.8byte	.LVL78
+	.2byte	0x6
+	.byte	0xc
+	.4byte	0x10001
+	.byte	0x9f
+	.8byte	.LVL83
+	.8byte	.LFE268
+	.2byte	0x6
+	.byte	0xc
+	.4byte	0x10001
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST37:
+	.8byte	.LVL78
+	.8byte	.LVL79
+	.2byte	0x4
+	.byte	0x40
+	.byte	0x3c
+	.byte	0x24
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST32:
+	.8byte	.LVL55
+	.8byte	.LVL62
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST33:
+	.8byte	.LVL55
+	.8byte	.LVL62
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST34:
+	.8byte	.LVL55
+	.8byte	.LVL60
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL60
+	.8byte	.LVL61
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST2:
+	.8byte	.LVL4
+	.8byte	.LVL7
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL7
+	.8byte	.LFE263
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST3:
+	.8byte	.LVL4
+	.8byte	.LVL5
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL5
+	.8byte	.LFE263
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST4:
+	.8byte	.LVL4
+	.8byte	.LVL8
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL8
+	.8byte	.LFE263
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST0:
+	.8byte	.LVL0
+	.8byte	.LVL1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1
+	.8byte	.LFE262
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST1:
+	.8byte	.LVL0
+	.8byte	.LVL2
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL2
+	.8byte	.LFE262
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST20:
+	.8byte	.LVL35
+	.8byte	.LVL36
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL36
+	.8byte	.LVL38
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL38
+	.8byte	.LVL40
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL40
+	.8byte	.LVL46
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL46
+	.8byte	.LFE277
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST21:
+	.8byte	.LVL36
+	.8byte	.LVL42
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL42
+	.8byte	.LVL43
+	.2byte	0x3
+	.byte	0x84
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL43
+	.8byte	.LVL47
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST22:
+	.8byte	.LVL37
+	.8byte	.LVL39
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL40
+	.8byte	.LVL41
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST23:
+	.8byte	.LVL38
+	.8byte	.LVL40
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+	.section	.debug_aranges,"",@progbits
+	.4byte	0xac
+	.2byte	0x2
+	.4byte	.Ldebug_info0
+	.byte	0x8
+	.byte	0
+	.2byte	0
+	.2byte	0
+	.8byte	.LFB262
+	.8byte	.LFE262-.LFB262
+	.8byte	.LFB263
+	.8byte	.LFE263-.LFB263
+	.8byte	.LFB274
+	.8byte	.LFE274-.LFB274
+	.8byte	.LFB272
+	.8byte	.LFE272-.LFB272
+	.8byte	.LFB271
+	.8byte	.LFE271-.LFB271
+	.8byte	.LFB275
+	.8byte	.LFE275-.LFB275
+	.8byte	.LFB277
+	.8byte	.LFE277-.LFB277
+	.8byte	.LFB268
+	.8byte	.LFE268-.LFB268
+	.8byte	.LFB270
+	.8byte	.LFE270-.LFB270
+	.8byte	0
+	.8byte	0
+	.section	.debug_ranges,"",@progbits
+.Ldebug_ranges0:
+	.8byte	.LBB58
+	.8byte	.LBE58
+	.8byte	.LBB59
+	.8byte	.LBE59
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB61
+	.8byte	.LBE61
+	.8byte	.LBB62
+	.8byte	.LBE62
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB63
+	.8byte	.LBE63
+	.8byte	.LBB64
+	.8byte	.LBE64
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB133
+	.8byte	.LBE133
+	.8byte	.LBB211
+	.8byte	.LBE211
+	.8byte	.LBB212
+	.8byte	.LBE212
+	.8byte	.LBB213
+	.8byte	.LBE213
+	.8byte	.LBB214
+	.8byte	.LBE214
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB154
+	.8byte	.LBE154
+	.8byte	.LBB155
+	.8byte	.LBE155
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB156
+	.8byte	.LBE156
+	.8byte	.LBB157
+	.8byte	.LBE157
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB174
+	.8byte	.LBE174
+	.8byte	.LBB175
+	.8byte	.LBE175
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB180
+	.8byte	.LBE180
+	.8byte	.LBB181
+	.8byte	.LBE181
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB184
+	.8byte	.LBE184
+	.8byte	.LBB185
+	.8byte	.LBE185
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB189
+	.8byte	.LBE189
+	.8byte	.LBB190
+	.8byte	.LBE190
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB195
+	.8byte	.LBE195
+	.8byte	.LBB196
+	.8byte	.LBE196
+	.8byte	0
+	.8byte	0
+	.8byte	.LFB262
+	.8byte	.LFE262
+	.8byte	.LFB263
+	.8byte	.LFE263
+	.8byte	.LFB274
+	.8byte	.LFE274
+	.8byte	.LFB272
+	.8byte	.LFE272
+	.8byte	.LFB271
+	.8byte	.LFE271
+	.8byte	.LFB275
+	.8byte	.LFE275
+	.8byte	.LFB277
+	.8byte	.LFE277
+	.8byte	.LFB268
+	.8byte	.LFE268
+	.8byte	.LFB270
+	.8byte	.LFE270
+	.8byte	0
+	.8byte	0
+	.section	.debug_line,"",@progbits
+.Ldebug_line0:
+	.section	.debug_str,"MS",@progbits,1
+.LASF30:
+	.string	"parent_platdata"
+.LASF435:
+	.string	"otp_cru_rst"
+.LASF100:
+	.string	"off_mem_rsvmap"
+.LASF183:
+	.string	"UCLASS_I2C_EEPROM"
+.LASF449:
+	.string	"jt_funcs"
+.LASF188:
+	.string	"UCLASS_IRQ"
+.LASF150:
+	.string	"initrd_start"
+.LASF182:
+	.string	"UCLASS_I2C"
+.LASF13:
+	.string	"sizetype"
+.LASF327:
+	.string	"net_hostname"
+.LASF54:
+	.string	"start"
+.LASF223:
+	.string	"UCLASS_SPI"
+.LASF312:
+	.string	"child"
+.LASF186:
+	.string	"UCLASS_I2S"
+.LASF349:
+	.string	"NETLOOP_RESTART"
+.LASF419:
+	.string	"otp_data"
+.LASF184:
+	.string	"UCLASS_I2C_GENERIC"
+.LASF196:
+	.string	"UCLASS_MOD_EXP"
+.LASF246:
+	.string	"UCLASS_IO_DOMAIN"
+.LASF265:
+	.string	"using_pre_serial"
+.LASF37:
+	.string	"uclass_priv"
+.LASF217:
+	.string	"UCLASS_RKNAND"
+.LASF159:
+	.string	"UCLASS_DEMO"
+.LASF396:
+	.string	"OTP_S"
+.LASF108:
+	.string	"ih_magic"
+.LASF46:
+	.string	"list_head"
+.LASF360:
+	.string	"child_pre_probe"
+.LASF414:
+	.string	"rockchip_secure_otp_ofdata_to_platdata"
+.LASF304:
+	.string	"pm_ctx_phys"
+.LASF163:
+	.string	"UCLASS_TEST_PROBE"
+.LASF310:
+	.string	"full_name"
+.LASF242:
+	.string	"UCLASS_KEY"
+.LASF80:
+	.string	"bi_intfreq"
+.LASF425:
+	.string	"__func__"
+.LASF11:
+	.string	"phys_addr_t"
+.LASF400:
+	.string	"write"
+.LASF237:
+	.string	"UCLASS_VIDEO_BRIDGE"
+.LASF303:
+	.string	"video_bottom"
+.LASF5:
+	.string	"__u8"
+.LASF348:
+	.string	"NETLOOP_CONTINUE"
+.LASF226:
+	.string	"UCLASS_SPI_GENERIC"
+.LASF298:
+	.string	"malloc_base"
+.LASF440:
+	.string	"dev_read_addr_ptr"
+.LASF56:
+	.string	"flash_info_t"
+.LASF201:
+	.string	"UCLASS_PANEL"
+.LASF125:
+	.string	"comp"
+.LASF120:
+	.string	"image_header_t"
+.LASF155:
+	.string	"state"
+.LASF176:
+	.string	"UCLASS_CROS_EC"
+.LASF74:
+	.string	"bi_dsp_freq"
+.LASF412:
+	.string	"rockchip_otp_ids"
+.LASF122:
+	.string	"image_start"
+.LASF161:
+	.string	"UCLASS_TEST_FDT"
+.LASF65:
+	.string	"bd_info"
+.LASF346:
+	.string	"uclass_id"
+.LASF112:
+	.string	"ih_load"
+.LASF394:
+	.string	"DECOM_GZIP"
+.LASF317:
+	.string	"__dtb_dt_spl_begin"
+.LASF386:
+	.string	"pre_remove"
+.LASF430:
+	.string	"delay"
+.LASF420:
+	.string	"secure_otp_read"
+.LASF7:
+	.string	"__u32"
+.LASF35:
+	.string	"priv"
+.LASF301:
+	.string	"cur_serial_dev"
+.LASF333:
+	.string	"net_tx_packet"
+.LASF241:
+	.string	"UCLASS_FG"
+.LASF332:
+	.string	"net_server_ip"
+.LASF450:
+	.string	"ofnode_union"
+.LASF340:
+	.string	"net_native_vlan"
+.LASF239:
+	.string	"UCLASS_VIDEO_CRTC"
+.LASF175:
+	.string	"UCLASS_CODEC"
+.LASF295:
+	.string	"env_buf"
+.LASF424:
+	.string	"rockchip_secure_otp_write_byte"
+.LASF21:
+	.string	"errno"
+.LASF15:
+	.string	"long int"
+.LASF391:
+	.string	"__invalid_size_argument_for_IOC"
+.LASF69:
+	.string	"bi_flashsize"
+.LASF29:
+	.string	"platdata"
+.LASF206:
+	.string	"UCLASS_PHY"
+.LASF417:
+	.string	"secure_otp_write"
+.LASF93:
+	.string	"IRQ_STACK_START_IN"
+.LASF104:
+	.string	"size_dt_strings"
+.LASF236:
+	.string	"UCLASS_VIDEO"
+.LASF279:
+	.string	"relocaddr"
+.LASF377:
+	.string	"dev_head"
+.LASF401:
+	.string	"ioctl"
+.LASF343:
+	.string	"net_boot_file_size"
+.LASF114:
+	.string	"ih_dcrc"
+.LASF79:
+	.string	"bi_ethspeed"
+.LASF158:
+	.string	"UCLASS_ROOT"
+.LASF44:
+	.string	"ide_bus_offset"
+.LASF330:
+	.string	"net_server_ethaddr"
+.LASF82:
+	.string	"bi_arch_number"
+.LASF3:
+	.string	"signed char"
+.LASF189:
+	.string	"UCLASS_KEYBOARD"
+.LASF18:
+	.string	"uint8_t"
+.LASF413:
+	.string	"_u_boot_list_2_driver_2_rockchip_secure_otp"
+.LASF365:
+	.string	"per_child_platdata_auto_alloc_size"
+.LASF45:
+	.string	"udevice"
+.LASF443:
+	.string	"udelay"
+.LASF116:
+	.string	"ih_arch"
+.LASF97:
+	.string	"totalsize"
+.LASF109:
+	.string	"ih_hcrc"
+.LASF281:
+	.string	"mon_len"
+.LASF402:
+	.string	"call"
+.LASF124:
+	.string	"load"
+.LASF231:
+	.string	"UCLASS_TPM"
+.LASF59:
+	.string	"lmb_property"
+.LASF102:
+	.string	"last_comp_version"
+.LASF0:
+	.string	"unsigned char"
+.LASF84:
+	.string	"bi_andr_version"
+.LASF157:
+	.string	"images"
+.LASF245:
+	.string	"UCLASS_DVFS"
+.LASF75:
+	.string	"bi_ddr_freq"
+.LASF190:
+	.string	"UCLASS_LED"
+.LASF111:
+	.string	"ih_size"
+.LASF39:
+	.string	"uclass_node"
+.LASF220:
+	.string	"UCLASS_SCMI_AGENT"
+.LASF403:
+	.string	"rockchip_otp_platdata"
+.LASF249:
+	.string	"UCLASS_MDIO"
+.LASF23:
+	.string	"_Bool"
+.LASF366:
+	.string	"property"
+.LASF423:
+	.string	"rockchip_secure_otp_capability"
+.LASF352:
+	.string	"net_state"
+.LASF368:
+	.string	"value"
+.LASF429:
+	.string	"rockchip_secure_otp_check_flag"
+.LASF185:
+	.string	"UCLASS_I2C_MUX"
+.LASF14:
+	.string	"char"
+.LASF25:
+	.string	"_binary_u_boot_bin_start"
+.LASF235:
+	.string	"UCLASS_USB_GADGET_GENERIC"
+.LASF350:
+	.string	"NETLOOP_SUCCESS"
+.LASF36:
+	.string	"uclass"
+.LASF374:
+	.string	"p_current"
+.LASF376:
+	.string	"uc_drv"
+.LASF347:
+	.string	"net_loop_state"
+.LASF43:
+	.string	"req_seq"
+.LASF313:
+	.string	"sibling"
+.LASF287:
+	.string	"dm_root_f"
+.LASF174:
+	.string	"UCLASS_AMP"
+.LASF212:
+	.string	"UCLASS_PWRSEQ"
+.LASF369:
+	.string	"of_offset"
+.LASF140:
+	.string	"fit_hdr_fdt"
+.LASF341:
+	.string	"net_restart_wrap"
+.LASF329:
+	.string	"net_ethaddr"
+.LASF42:
+	.string	"flags"
+.LASF445:
+	.string	"malloc_simple"
+.LASF117:
+	.string	"ih_type"
+.LASF98:
+	.string	"off_dt_struct"
+.LASF70:
+	.string	"bi_flashoffset"
+.LASF342:
+	.string	"net_boot_file_name"
+.LASF379:
+	.string	"compatible"
+.LASF160:
+	.string	"UCLASS_TEST"
+.LASF110:
+	.string	"ih_time"
+.LASF274:
+	.string	"fb_base"
+.LASF271:
+	.string	"bus_clk"
+.LASF213:
+	.string	"UCLASS_RAM"
+.LASF179:
+	.string	"UCLASS_ETH"
+.LASF32:
+	.string	"node"
+.LASF121:
+	.string	"image_info"
+.LASF127:
+	.string	"arch"
+.LASF273:
+	.string	"mem_clk"
+.LASF270:
+	.string	"cpu_clk"
+.LASF50:
+	.string	"select_hwpart"
+.LASF334:
+	.string	"net_rx_packets"
+.LASF371:
+	.string	"mem_malloc_start"
+.LASF431:
+	.string	"rockchip_secure_otp_wait_flag"
+.LASF92:
+	.string	"_datarelro_start_ofs"
+.LASF17:
+	.string	"ulong"
+.LASF113:
+	.string	"ih_ep"
+.LASF61:
+	.string	"lmb_region"
+.LASF384:
+	.string	"pre_probe"
+.LASF444:
+	.string	"printf"
+.LASF395:
+	.string	"DECOM_ZLIB"
+.LASF135:
+	.string	"fit_uname_os"
+.LASF76:
+	.string	"bi_bootflags"
+.LASF331:
+	.string	"net_ip"
+.LASF432:
+	.string	"rockchip_secure_otp_wait_status"
+.LASF293:
+	.string	"fdt_size"
+.LASF325:
+	.string	"net_dns_server"
+.LASF345:
+	.string	"net_ping_ip"
+.LASF63:
+	.string	"memory"
+.LASF95:
+	.string	"fdt_header"
+.LASF372:
+	.string	"mem_malloc_end"
+.LASF192:
+	.string	"UCLASS_MAILBOX"
+.LASF147:
+	.string	"rd_end"
+.LASF354:
+	.string	"bind"
+.LASF282:
+	.string	"irq_sp"
+.LASF152:
+	.string	"cmdline_start"
+.LASF269:
+	.string	"global_data"
+.LASF389:
+	.string	"per_device_auto_alloc_size"
+.LASF448:
+	.string	"/home2/chenp/work/u-boot"
+.LASF221:
+	.string	"UCLASS_SCSI"
+.LASF233:
+	.string	"UCLASS_USB_DEV_GENERIC"
+.LASF193:
+	.string	"UCLASS_MASS_STORAGE"
+.LASF1:
+	.string	"long unsigned int"
+.LASF168:
+	.string	"UCLASS_SIMPLE_BUS"
+.LASF314:
+	.string	"gd_t"
+.LASF326:
+	.string	"net_nis_domain"
+.LASF142:
+	.string	"fit_noffset_fdt"
+.LASF410:
+	.string	"rockchip_secure_otp_ops"
+.LASF351:
+	.string	"NETLOOP_FAIL"
+.LASF240:
+	.string	"UCLASS_WDT"
+.LASF259:
+	.string	"timer_reset_value"
+.LASF283:
+	.string	"start_addr_sp"
+.LASF71:
+	.string	"bi_sramstart"
+.LASF26:
+	.string	"_binary_u_boot_bin_end"
+.LASF411:
+	.string	"px30_data"
+.LASF284:
+	.string	"reloc_off"
+.LASF103:
+	.string	"boot_cpuid_phys"
+.LASF258:
+	.string	"lastinc"
+.LASF262:
+	.string	"tlb_fillptr"
+.LASF138:
+	.string	"fit_uname_rd"
+.LASF227:
+	.string	"UCLASS_SYSCON"
+.LASF173:
+	.string	"UCLASS_CPU"
+.LASF133:
+	.string	"fit_uname_cfg"
+.LASF222:
+	.string	"UCLASS_SERIAL"
+.LASF339:
+	.string	"net_our_vlan"
+.LASF305:
+	.string	"serial"
+.LASF355:
+	.string	"probe"
+.LASF171:
+	.string	"UCLASS_BLK"
+.LASF128:
+	.string	"image_info_t"
+.LASF167:
+	.string	"UCLASS_USB_EMUL"
+.LASF260:
+	.string	"tlb_addr"
+.LASF205:
+	.string	"UCLASS_PCI_GENERIC"
+.LASF123:
+	.string	"image_len"
+.LASF77:
+	.string	"bi_ip_addr"
+.LASF207:
+	.string	"UCLASS_PINCONFIG"
+.LASF229:
+	.string	"UCLASS_THERMAL"
+.LASF131:
+	.string	"legacy_hdr_os_copy"
+.LASF9:
+	.string	"long long int"
+.LASF392:
+	.string	"misc_mode"
+.LASF292:
+	.string	"new_fdt"
+.LASF22:
+	.string	"___strtok"
+.LASF344:
+	.string	"net_boot_file_expected_size_in_blocks"
+.LASF266:
+	.string	"enable"
+.LASF353:
+	.string	"of_match"
+.LASF200:
+	.string	"UCLASS_NVME"
+.LASF263:
+	.string	"tlb_emerg"
+.LASF129:
+	.string	"bootm_headers"
+.LASF55:
+	.string	"protect"
+.LASF232:
+	.string	"UCLASS_USB"
+.LASF381:
+	.string	"uclass_driver"
+.LASF243:
+	.string	"UCLASS_RC"
+.LASF296:
+	.string	"timebase_h"
+.LASF297:
+	.string	"timebase_l"
+.LASF177:
+	.string	"UCLASS_DISPLAY"
+.LASF338:
+	.string	"net_null_ethaddr"
+.LASF277:
+	.string	"env_valid"
+.LASF34:
+	.string	"parent"
+.LASF166:
+	.string	"UCLASS_PCI_EMUL"
+.LASF426:
+	.string	"rockchip_secure_otp_read"
+.LASF38:
+	.string	"parent_priv"
+.LASF397:
+	.string	"OTP_NS"
+.LASF244:
+	.string	"UCLASS_CHARGE_DISPLAY"
+.LASF318:
+	.string	"load_addr"
+.LASF134:
+	.string	"fit_hdr_os"
+.LASF90:
+	.string	"_datarelrolocal_start_ofs"
+.LASF442:
+	.string	"dev_get_driver_data"
+.LASF409:
+	.string	"spl_rockchip_otp_stop"
+.LASF268:
+	.string	"addr"
+.LASF438:
+	.string	"px30_spl_rockchip_otp_start"
+.LASF399:
+	.string	"read"
+.LASF436:
+	.string	"mask"
+.LASF8:
+	.string	"unsigned int"
+.LASF16:
+	.string	"ushort"
+.LASF441:
+	.string	"dev_read_u32_default"
+.LASF447:
+	.string	"drivers/misc/px30-secure-otp.c"
+.LASF291:
+	.string	"ufdt_blob"
+.LASF362:
+	.string	"priv_auto_alloc_size"
+.LASF299:
+	.string	"malloc_limit"
+.LASF209:
+	.string	"UCLASS_PMIC"
+.LASF434:
+	.string	"secure_conf"
+.LASF130:
+	.string	"legacy_hdr_os"
+.LASF99:
+	.string	"off_dt_strings"
+.LASF315:
+	.string	"monitor_flash_len"
+.LASF194:
+	.string	"UCLASS_MISC"
+.LASF67:
+	.string	"bi_memsize"
+.LASF433:
+	.string	"flag"
+.LASF24:
+	.string	"image_base"
+.LASF228:
+	.string	"UCLASS_SYSRESET"
+.LASF375:
+	.string	"current"
+.LASF181:
+	.string	"UCLASS_FIRMWARE"
+.LASF191:
+	.string	"UCLASS_LPC"
+.LASF418:
+	.string	"offset"
+.LASF187:
+	.string	"UCLASS_IDE"
+.LASF398:
+	.string	"misc_ops"
+.LASF309:
+	.string	"phandle"
+.LASF302:
+	.string	"video_top"
+.LASF390:
+	.string	"per_device_platdata_auto_alloc_size"
+.LASF156:
+	.string	"bootm_headers_t"
+.LASF73:
+	.string	"bi_arm_freq"
+.LASF215:
+	.string	"UCLASS_REMOTEPROC"
+.LASF126:
+	.string	"type"
+.LASF137:
+	.string	"fit_hdr_rd"
+.LASF276:
+	.string	"env_addr"
+.LASF72:
+	.string	"bi_sramsize"
+.LASF288:
+	.string	"uclass_root"
+.LASF180:
+	.string	"UCLASS_GPIO"
+.LASF406:
+	.string	"otp_cru_rst_base"
+.LASF452:
+	.string	"read_end"
+.LASF210:
+	.string	"UCLASS_PWM"
+.LASF58:
+	.string	"long double"
+.LASF278:
+	.string	"ram_top"
+.LASF307:
+	.string	"console_evt"
+.LASF146:
+	.string	"rd_start"
+.LASF451:
+	.string	"write_end"
+.LASF211:
+	.string	"UCLASS_POWER_DOMAIN"
+.LASF214:
+	.string	"UCLASS_REGULATOR"
+.LASF320:
+	.string	"save_size"
+.LASF172:
+	.string	"UCLASS_CLK"
+.LASF31:
+	.string	"uclass_platdata"
+.LASF439:
+	.string	"dev_get_platdata"
+.LASF89:
+	.string	"_datarel_start_ofs"
+.LASF264:
+	.string	"pre_serial"
+.LASF446:
+	.ascii	"GNU C11 6.3.1 201"
+	.string	"70404 -mstrict-align -march=armv8-a+nosimd -mlittle-endian -mabi=lp64 -g -Os -fno-builtin -ffreestanding -fshort-wchar -fno-stack-protector -fno-delete-null-pointer-checks -fstack-usage -ffunction-sections -fdata-sections -ffixed-r9 -fno-common -ffixed-x18"
+.LASF119:
+	.string	"ih_name"
+.LASF115:
+	.string	"ih_os"
+.LASF153:
+	.string	"cmdline_end"
+.LASF335:
+	.string	"net_rx_packet"
+.LASF255:
+	.string	"LOGF_MAX_CATEGORIES"
+.LASF290:
+	.string	"fdt_blob"
+.LASF378:
+	.string	"udevice_id"
+.LASF51:
+	.string	"size"
+.LASF10:
+	.string	"long long unsigned int"
+.LASF388:
+	.string	"destroy"
+.LASF107:
+	.string	"image_header"
+.LASF367:
+	.string	"length"
+.LASF20:
+	.string	"__be32"
+.LASF68:
+	.string	"bi_flashstart"
+.LASF136:
+	.string	"fit_noffset_os"
+.LASF195:
+	.string	"UCLASS_MMC"
+.LASF254:
+	.string	"UCLASS_INVALID"
+.LASF234:
+	.string	"UCLASS_USB_HUB"
+.LASF361:
+	.string	"child_post_remove"
+.LASF41:
+	.string	"sibling_node"
+.LASF294:
+	.string	"of_root"
+.LASF250:
+	.string	"UCLASS_EBC"
+.LASF57:
+	.string	"flash_info"
+.LASF101:
+	.string	"version"
+.LASF62:
+	.string	"region"
+.LASF105:
+	.string	"size_dt_struct"
+.LASF286:
+	.string	"dm_root"
+.LASF252:
+	.string	"UCLASS_RNG"
+.LASF306:
+	.string	"sys_start_tick"
+.LASF311:
+	.string	"properties"
+.LASF197:
+	.string	"UCLASS_MTD"
+.LASF94:
+	.string	"fdt32_t"
+.LASF285:
+	.string	"new_gd"
+.LASF199:
+	.string	"UCLASS_NORTHBRIDGE"
+.LASF78:
+	.string	"bi_enetaddr"
+.LASF359:
+	.string	"child_post_bind"
+.LASF321:
+	.string	"in_addr"
+.LASF336:
+	.string	"net_rx_packet_len"
+.LASF387:
+	.string	"init"
+.LASF428:
+	.string	"rockchip_secure_otp_ecc_enable"
+.LASF316:
+	.string	"__dtb_dt_begin"
+.LASF216:
+	.string	"UCLASS_RESET"
+.LASF139:
+	.string	"fit_noffset_rd"
+.LASF170:
+	.string	"UCLASS_AHCI"
+.LASF12:
+	.string	"phys_size_t"
+.LASF27:
+	.string	"driver"
+.LASF88:
+	.string	"FIQ_STACK_START"
+.LASF154:
+	.string	"verify"
+.LASF370:
+	.string	"ofnode"
+.LASF28:
+	.string	"name"
+.LASF427:
+	.string	"buffer"
+.LASF251:
+	.string	"UCLASS_EINK_DISPLAY"
+.LASF202:
+	.string	"UCLASS_PANEL_BACKLIGHT"
+.LASF230:
+	.string	"UCLASS_TIMER"
+.LASF225:
+	.string	"UCLASS_SPI_FLASH"
+.LASF275:
+	.string	"have_console"
+.LASF81:
+	.string	"bi_busfreq"
+.LASF6:
+	.string	"short int"
+.LASF405:
+	.string	"otp_mask_base"
+.LASF208:
+	.string	"UCLASS_PINCTRL"
+.LASF218:
+	.string	"UCLASS_RAMDISK"
+.LASF165:
+	.string	"UCLASS_I2C_EMUL"
+.LASF224:
+	.string	"UCLASS_SPMI"
+.LASF356:
+	.string	"remove"
+.LASF162:
+	.string	"UCLASS_TEST_BUS"
+.LASF319:
+	.string	"save_addr"
+.LASF364:
+	.string	"per_child_auto_alloc_size"
+.LASF300:
+	.string	"malloc_ptr"
+.LASF404:
+	.string	"secure_conf_base"
+.LASF151:
+	.string	"initrd_end"
+.LASF383:
+	.string	"pre_unbind"
+.LASF407:
+	.string	"secure_otp_data"
+.LASF267:
+	.string	"baudrate"
+.LASF91:
+	.string	"_datarellocal_start_ofs"
+.LASF40:
+	.string	"child_head"
+.LASF256:
+	.string	"arch_global_data"
+.LASF253:
+	.string	"UCLASS_COUNT"
+.LASF272:
+	.string	"pci_clk"
+.LASF49:
+	.string	"block_drvr"
+.LASF53:
+	.string	"flash_id"
+.LASF247:
+	.string	"UCLASS_CRYPTO"
+.LASF308:
+	.string	"device_node"
+.LASF280:
+	.string	"ram_size"
+.LASF145:
+	.string	"fit_noffset_setup"
+.LASF106:
+	.string	"working_fdt"
+.LASF289:
+	.string	"fdt_blob_kern"
+.LASF328:
+	.string	"net_root_path"
+.LASF178:
+	.string	"UCLASS_DMA"
+.LASF86:
+	.string	"bd_t"
+.LASF322:
+	.string	"s_addr"
+.LASF416:
+	.string	"request"
+.LASF385:
+	.string	"post_probe"
+.LASF337:
+	.string	"net_bcast_ethaddr"
+.LASF83:
+	.string	"bi_boot_params"
+.LASF408:
+	.string	"spl_rockchip_otp_start"
+.LASF19:
+	.string	"uint32_t"
+.LASF373:
+	.string	"mem_malloc_brk"
+.LASF323:
+	.string	"net_gateway"
+.LASF363:
+	.string	"platdata_auto_alloc_size"
+.LASF66:
+	.string	"bi_memstart"
+.LASF393:
+	.string	"DECOM_LZ4"
+.LASF238:
+	.string	"UCLASS_VIDEO_CONSOLE"
+.LASF358:
+	.string	"ofdata_to_platdata"
+.LASF64:
+	.string	"reserved"
+.LASF453:
+	.string	"free"
+.LASF85:
+	.string	"bi_dram"
+.LASF2:
+	.string	"short unsigned int"
+.LASF96:
+	.string	"magic"
+.LASF143:
+	.string	"fit_hdr_setup"
+.LASF132:
+	.string	"legacy_hdr_valid"
+.LASF60:
+	.string	"base"
+.LASF219:
+	.string	"UCLASS_RTC"
+.LASF257:
+	.string	"timer_rate_hz"
+.LASF52:
+	.string	"sector_count"
+.LASF118:
+	.string	"ih_comp"
+.LASF382:
+	.string	"post_bind"
+.LASF421:
+	.string	"rockchip_secure_otp_write"
+.LASF357:
+	.string	"unbind"
+.LASF148:
+	.string	"ft_addr"
+.LASF248:
+	.string	"UCLASS_ETH_PHY"
+.LASF422:
+	.string	"temp"
+.LASF4:
+	.string	"uchar"
+.LASF149:
+	.string	"ft_len"
+.LASF47:
+	.string	"next"
+.LASF415:
+	.string	"secure_otp_ioctl"
+.LASF380:
+	.string	"data"
+.LASF198:
+	.string	"UCLASS_NOP"
+.LASF144:
+	.string	"fit_uname_setup"
+.LASF48:
+	.string	"prev"
+.LASF203:
+	.string	"UCLASS_PCH"
+.LASF204:
+	.string	"UCLASS_PCI"
+.LASF324:
+	.string	"net_netmask"
+.LASF33:
+	.string	"driver_data"
+.LASF87:
+	.string	"IRQ_STACK_START"
+.LASF169:
+	.string	"UCLASS_ADC"
+.LASF437:
+	.string	"px30_spl_rockchip_otp_stop"
+.LASF164:
+	.string	"UCLASS_SPI_EMUL"
+.LASF261:
+	.string	"tlb_size"
+.LASF141:
+	.string	"fit_uname_fdt"
+	.ident	"GCC: (Linaro GCC 6.3-2017.05) 6.3.1 20170404"
+	.section	.note.GNU-stack,"",@progbits
diff --git a/drivers/misc/rk3308-secure-otp.S b/drivers/misc/rk3308-secure-otp.S
new file mode 100644
index 0000000000..e79405ac9a
--- /dev/null
+++ b/drivers/misc/rk3308-secure-otp.S
@@ -0,0 +1,15529 @@
+	.arch armv8-a+nosimd
+	.file	"rk3308-secure-otp.c"
+	.text
+.Ltext0:
+	.cfi_sections	.debug_frame
+	.section	.text.rk3308_spl_rockchip_otp_start,"ax",@progbits
+	.align	2
+	.type	rk3308_spl_rockchip_otp_start, %function
+rk3308_spl_rockchip_otp_start:
+.LFB262:
+	.file 1 "drivers/misc/rk3308-secure-otp.c"
+	.loc 1 90 0
+	.cfi_startproc
+.LVL0:
+.LBB28:
+	.loc 1 91 0
+#APP
+// 91 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	mov	w1, 16
+.LVL1:
+	sdiv	w3, w3, w1
+.LVL2:
+	mov	w1, -65536
+	lsl	w3, w3, 2
+	sxtw	x3, w3
+	str	w1, [x3, x2]
+.LVL3:
+.LBE28:
+.LBB29:
+	.loc 1 92 0
+#APP
+// 92 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	mov	w1, 262148
+	str	w1, [x0]
+	ret
+.LBE29:
+	.cfi_endproc
+.LFE262:
+	.size	rk3308_spl_rockchip_otp_start, .-rk3308_spl_rockchip_otp_start
+	.section	.text.rk3308_spl_rockchip_otp_stop,"ax",@progbits
+	.align	2
+	.type	rk3308_spl_rockchip_otp_stop, %function
+rk3308_spl_rockchip_otp_stop:
+.LFB263:
+	.loc 1 98 0
+	.cfi_startproc
+.LVL4:
+.LBB30:
+	.loc 1 99 0
+#APP
+// 99 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	mov	w1, 262144
+.LVL5:
+	str	w1, [x0]
+.LVL6:
+.LBE30:
+.LBB31:
+	.loc 1 100 0
+#APP
+// 100 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	mov	w0, 16
+.LVL7:
+	sdiv	w3, w3, w0
+.LVL8:
+	mov	w0, -1
+	lsl	w3, w3, 2
+	sxtw	x3, w3
+	str	w0, [x3, x2]
+	ret
+.LBE31:
+	.cfi_endproc
+.LFE263:
+	.size	rk3308_spl_rockchip_otp_stop, .-rk3308_spl_rockchip_otp_stop
+	.section	.text.rk3308s_secure_otp_read,"ax",@progbits
+	.align	2
+	.type	rk3308s_secure_otp_read, %function
+rk3308s_secure_otp_read:
+.LFB268:
+	.loc 1 191 0
+	.cfi_startproc
+.LVL9:
+	stp	x29, x30, [sp, -96]!
+	.cfi_def_cfa_offset 96
+	.cfi_offset 29, -96
+	.cfi_offset 30, -88
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 25, -32
+	.cfi_offset 26, -24
+	mov	x25, x2
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -80
+	.cfi_offset 20, -72
+	mov	w19, w1
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -48
+	.cfi_offset 24, -40
+	mov	w23, w3
+	stp	x21, x22, [sp, 32]
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 21, -64
+	.cfi_offset 22, -56
+	.cfi_offset 27, -16
+	.cfi_offset 28, -8
+	.loc 1 192 0
+	bl	dev_get_platdata
+.LVL10:
+	.loc 1 198 0
+	tst	x25, 3
+	bne	.L4
+	mov	x20, x0
+	.loc 1 198 0 is_stmt 0 discriminator 1
+	orr	w0, w19, w23
+.LVL11:
+	tst	x0, 3
+	beq	.L5
+.LVL12:
+.L4:
+	.loc 1 199 0 is_stmt 1
+	adrp	x0, .LC0
+	add	x0, x0, :lo12:.LC0
+.LVL13:
+.L15:
+	.loc 1 214 0
+	bl	printf
+.LVL14:
+.L12:
+	.loc 1 209 0
+	mov	w0, -1
+	b	.L3
+.LVL15:
+.L5:
+	.loc 1 203 0
+	asr	w26, w19, 2
+.LVL16:
+	asr	w23, w23, 2
+.LVL17:
+	add	w22, w26, 1
+	.loc 1 206 0
+	mov	x21, 0
+	lsl	w22, w22, 2
+	.loc 1 196 0
+	mov	w24, 10000
+.LBB32:
+	.loc 1 220 0
+	mov	w27, 1
+.LBE32:
+.LBB33:
+	.loc 1 222 0
+	mov	w28, 3
+.LVL18:
+.L7:
+	add	w1, w26, w21
+.LVL19:
+.LBE33:
+	.loc 1 206 0
+	cmp	x21, x23
+	bne	.L11
+	.loc 1 194 0
+	mov	w0, 0
+	b	.L3
+.L11:
+	.loc 1 208 0
+	cmp	w19, 448
+	bgt	.L12
+	.loc 1 211 0
+	sub	w0, w19, #16
+	cmp	w19, 0
+	ccmp	w0, 31, 0, ne
+	bls	.L8
+	.loc 1 211 0 is_stmt 0 discriminator 1
+	sub	w19, w19, #128
+.LVL20:
+	cmp	w19, 263
+	bls	.L8
+	.loc 1 214 0 is_stmt 1
+	adrp	x0, .LC1
+	add	x0, x0, :lo12:.LC1
+	b	.L15
+.LVL21:
+.L8:
+.LBB34:
+	.loc 1 219 0
+#APP
+// 219 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x20]
+.LVL22:
+	str	wzr, [x0, 8200]
+.LVL23:
+.LBE34:
+.LBB35:
+	.loc 1 220 0
+#APP
+// 220 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x20]
+	str	w27, [x0, 8224]
+.LVL24:
+.LBE35:
+.LBB36:
+	.loc 1 221 0
+#APP
+// 221 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x20]
+	str	w1, [x0, 8204]
+.LVL25:
+.LBE36:
+.LBB37:
+	.loc 1 222 0
+#APP
+// 222 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x20]
+	str	w28, [x0, 8192]
+.LVL26:
+.L9:
+.LBE37:
+.LBB38:
+	.loc 1 224 0
+	ldr	x0, [x20]
+	ldr	w0, [x0, 8200]
+.LVL27:
+#APP
+// 224 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+.LBE38:
+	tbz	x0, 0, .L10
+.LVL28:
+.LBB39:
+	.loc 1 235 0
+#APP
+// 235 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x20]
+.LVL29:
+	str	w27, [x0, 8200]
+.LBE39:
+.LBB40:
+	.loc 1 236 0
+	ldr	w0, [x0, 8208]
+.LVL30:
+#APP
+// 236 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+.LBE40:
+	str	w0, [x25, x21, lsl 2]
+	.loc 1 237 0
+	mov	w19, w22
+.LVL31:
+	add	x21, x21, 1
+.LVL32:
+	add	w22, w22, 4
+	b	.L7
+.LVL33:
+.L10:
+	.loc 1 225 0
+	mov	x0, 1
+.LVL34:
+	.loc 1 226 0
+	sub	w24, w24, #1
+.LVL35:
+	.loc 1 225 0
+	bl	udelay
+.LVL36:
+	.loc 1 227 0
+	cmp	w24, 0
+	bgt	.L9
+	.loc 1 228 0
+	adrp	x1, .LANCHOR0
+	adrp	x0, .LC2
+	add	x1, x1, :lo12:.LANCHOR0
+	add	x0, x0, :lo12:.LC2
+	bl	printf
+.LVL37:
+	.loc 1 229 0
+	mov	w0, -110
+.LVL38:
+.L3:
+	.loc 1 242 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+.LVL39:
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE268:
+	.size	rk3308s_secure_otp_read, .-rk3308s_secure_otp_read
+	.section	.text.secure_otp_write,"ax",@progbits
+	.align	2
+	.type	secure_otp_write, %function
+secure_otp_write:
+.LFB280:
+	.loc 1 711 0
+	.cfi_startproc
+.LVL40:
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	mov	x19, x0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -16
+	.cfi_offset 22, -8
+	.loc 1 711 0
+	mov	w20, w1
+	mov	x21, x2
+	mov	w22, w3
+	.loc 1 712 0
+	bl	dev_get_driver_data
+.LVL41:
+	.loc 1 714 0
+	ldr	x4, [x0, 8]
+	mov	w3, w22
+	mov	x2, x21
+	mov	w1, w20
+	mov	x0, x19
+.LVL42:
+	.loc 1 715 0
+	ldp	x21, x22, [sp, 32]
+.LVL43:
+	ldp	x19, x20, [sp, 16]
+.LVL44:
+	ldp	x29, x30, [sp], 48
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	.loc 1 714 0
+	br	x4
+.LVL45:
+	.cfi_endproc
+.LFE280:
+	.size	secure_otp_write, .-secure_otp_write
+	.section	.text.secure_otp_read,"ax",@progbits
+	.align	2
+	.type	secure_otp_read, %function
+secure_otp_read:
+.LFB279:
+	.loc 1 703 0
+	.cfi_startproc
+.LVL46:
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	mov	x19, x0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -16
+	.cfi_offset 22, -8
+	.loc 1 703 0
+	mov	w20, w1
+	mov	x21, x2
+	mov	w22, w3
+	.loc 1 704 0
+	bl	dev_get_driver_data
+.LVL47:
+	.loc 1 706 0
+	ldr	x4, [x0]
+	mov	w3, w22
+	mov	x2, x21
+	mov	w1, w20
+	mov	x0, x19
+.LVL48:
+	.loc 1 707 0
+	ldp	x21, x22, [sp, 32]
+.LVL49:
+	ldp	x19, x20, [sp, 16]
+.LVL50:
+	ldp	x29, x30, [sp], 48
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	.loc 1 706 0
+	br	x4
+.LVL51:
+	.cfi_endproc
+.LFE279:
+	.size	secure_otp_read, .-secure_otp_read
+	.section	.text.rockchip_secure_otp_ofdata_to_platdata,"ax",@progbits
+	.align	2
+	.type	rockchip_secure_otp_ofdata_to_platdata, %function
+rockchip_secure_otp_ofdata_to_platdata:
+.LFB283:
+	.loc 1 750 0
+	.cfi_startproc
+.LVL52:
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -16
+	.cfi_offset 20, -8
+	.loc 1 750 0
+	mov	x20, x0
+	.loc 1 751 0
+	bl	dev_get_platdata
+.LVL53:
+	mov	x19, x0
+.LVL54:
+	.loc 1 753 0
+	mov	x0, x20
+.LVL55:
+	bl	dev_read_addr_ptr
+.LVL56:
+	.loc 1 754 0
+	mov	w2, 0
+	adrp	x1, .LC3
+	.loc 1 753 0
+	str	x0, [x19]
+	.loc 1 754 0
+	add	x1, x1, :lo12:.LC3
+	mov	x0, x20
+	bl	dev_read_u32_default
+.LVL57:
+	.loc 1 755 0
+	uxtw	x0, w0
+	str	x0, [x19, 8]
+	.loc 1 756 0
+	mov	w2, 0
+	mov	x0, x20
+	adrp	x1, .LC4
+	add	x1, x1, :lo12:.LC4
+	bl	dev_read_u32_default
+.LVL58:
+	.loc 1 757 0
+	uxtw	x0, w0
+	str	x0, [x19, 16]
+	.loc 1 758 0
+	mov	w2, 0
+	mov	x0, x20
+	adrp	x1, .LC5
+	add	x1, x1, :lo12:.LC5
+	bl	dev_read_u32_default
+.LVL59:
+	.loc 1 759 0
+	uxtw	x0, w0
+	str	x0, [x19, 24]
+	.loc 1 762 0
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+.LVL60:
+	ldp	x29, x30, [sp], 32
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE283:
+	.size	rockchip_secure_otp_ofdata_to_platdata, .-rockchip_secure_otp_ofdata_to_platdata
+	.section	.text.rockchip_secure_otp_wait_status.isra.2,"ax",@progbits
+	.align	2
+	.type	rockchip_secure_otp_wait_status.isra.2, %function
+rockchip_secure_otp_wait_status.isra.2:
+.LFB286:
+	.loc 1 103 0
+	.cfi_startproc
+.LVL61:
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	mov	w19, w1
+	str	x21, [sp, 32]
+	.cfi_offset 21, -16
+	.loc 1 103 0
+	mov	x21, x0
+	mov	w20, 10000
+.LVL62:
+.L23:
+.LBB47:
+	.loc 1 108 0
+	ldr	x0, [x21]
+	ldr	w0, [x0, 772]
+.LVL63:
+#APP
+// 108 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+.LBE47:
+	tst	w0, w19
+	beq	.L25
+.LBB48:
+	.loc 1 118 0
+	orr	w19, w19, -65536
+.LVL64:
+#APP
+// 118 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x21]
+.LVL65:
+	str	w19, [x0, 772]
+.LBE48:
+	.loc 1 120 0
+	mov	w0, 0
+	b	.L22
+.LVL66:
+.L25:
+	.loc 1 109 0
+	mov	x0, 1
+.LVL67:
+	bl	udelay
+.LVL68:
+	.loc 1 111 0
+	subs	w20, w20, #1
+.LVL69:
+	bne	.L23
+.LVL70:
+.LBB49:
+.LBB50:
+	.loc 1 112 0
+	adrp	x1, .LANCHOR1
+	adrp	x0, .LC2
+	add	x1, x1, :lo12:.LANCHOR1
+	add	x0, x0, :lo12:.LC2
+	bl	printf
+.LVL71:
+	mov	w0, -110
+.LVL72:
+.L22:
+.LBE50:
+.LBE49:
+	.loc 1 121 0
+	ldp	x19, x20, [sp, 16]
+.LVL73:
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE286:
+	.size	rockchip_secure_otp_wait_status.isra.2, .-rockchip_secure_otp_wait_status.isra.2
+	.section	.text.rockchip_secure_otp_read,"ax",@progbits
+	.align	2
+	.type	rockchip_secure_otp_read, %function
+rockchip_secure_otp_read:
+.LFB270:
+	.loc 1 298 0
+	.cfi_startproc
+.LVL74:
+.LBB67:
+	.loc 1 302 0
+	mov	x4, 2048
+	movk	x4, 0xff00, lsl 16
+	ldr	w4, [x4]
+.LVL75:
+#APP
+// 302 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+.LVL76:
+#NO_APP
+.LBE67:
+	.loc 1 304 0
+	mov	w5, 12428
+	movk	w5, 0x3, lsl 16
+	cmp	w4, w5
+	bne	.L29
+	.loc 1 305 0
+	b	rk3308s_secure_otp_read
+.LVL77:
+.L29:
+	.loc 1 298 0
+	stp	x29, x30, [sp, -80]!
+	.cfi_def_cfa_offset 80
+	.cfi_offset 29, -80
+	.cfi_offset 30, -72
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -64
+	.cfi_offset 20, -56
+	mov	w20, w1
+	stp	x21, x22, [sp, 32]
+	.loc 1 307 0
+	mov	w1, 13064
+.LVL78:
+	.loc 1 298 0
+	stp	x23, x24, [sp, 48]
+	.loc 1 307 0
+	cmp	w4, w1
+	.loc 1 298 0
+	str	x25, [sp, 64]
+	.cfi_offset 21, -48
+	.cfi_offset 22, -40
+	.cfi_offset 23, -32
+	.cfi_offset 24, -24
+	.cfi_offset 25, -16
+	.loc 1 307 0
+	bne	.L30
+	mov	x22, x2
+	mov	w24, w3
+	mov	x23, x0
+.LVL79:
+.LBB68:
+.LBB69:
+	.loc 1 247 0
+	bl	dev_get_platdata
+.LVL80:
+	mov	x19, x0
+.LVL81:
+	.loc 1 248 0
+	mov	x0, x23
+.LVL82:
+	bl	dev_get_driver_data
+.LVL83:
+	mov	x25, x0
+.LVL84:
+	.loc 1 253 0
+	mov	w3, w20
+	ldp	x0, x2, [x19, 8]
+.LVL85:
+	ldr	x1, [x19, 24]
+	ldr	x4, [x25, 16]
+	blr	x4
+.LVL86:
+.LBB70:
+.LBB71:
+.LBB72:
+	.loc 1 172 0
+#APP
+// 172 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x19]
+	mov	w1, 512
+	movk	w1, 0xff00, lsl 16
+	str	w1, [x0, 32]
+.LVL87:
+.LBE72:
+.LBB73:
+	.loc 1 173 0
+#APP
+// 173 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x19]
+	mov	w1, -65535
+	str	w1, [x0, 36]
+.LVL88:
+.LBE73:
+.LBB74:
+	.loc 1 174 0
+#APP
+// 174 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x19]
+	mov	w1, 250
+	str	w1, [x0, 4096]
+.LVL89:
+.LBE74:
+.LBB75:
+	.loc 1 176 0
+#APP
+// 176 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x19]
+	str	wzr, [x0, 4100]
+.LVL90:
+.LBE75:
+.LBB76:
+	.loc 1 180 0
+#APP
+// 180 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x19]
+	mov	w1, 65537
+	str	w1, [x0, 32]
+.LBE76:
+	.loc 1 182 0
+	mov	w1, 2
+	mov	x0, x19
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL91:
+	.loc 1 183 0
+	tbz	w0, #31, .L31
+	.loc 1 184 0
+	adrp	x1, .LANCHOR2
+	adrp	x0, .LC6
+.LVL92:
+	add	x1, x1, :lo12:.LANCHOR2
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.LVL93:
+.L31:
+.LBE71:
+.LBE70:
+.LBB77:
+	.loc 1 257 0
+#APP
+// 257 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x19]
+	mov	w23, 65537
+.LVL94:
+	add	w24, w24, w20
+.LVL95:
+.LBE77:
+	.loc 1 251 0
+	mov	w21, 0
+.LBB78:
+	.loc 1 257 0
+	str	w23, [x0, 256]
+.LBE78:
+	.loc 1 258 0
+	mov	x0, 50
+	bl	udelay
+.LVL96:
+.L32:
+	.loc 1 259 0
+	cmp	w20, w24
+	beq	.L36
+	.loc 1 261 0
+	cmp	w20, 448
+	bgt	.L38
+	.loc 1 264 0
+	sub	w1, w20, #16
+	mov	w0, w20
+	cmp	w1, 31
+	ccmp	w20, 3, 4, hi
+	ble	.L34
+	sub	w1, w20, #128
+	cmp	w1, 263
+	bls	.L34
+	.loc 1 267 0
+	adrp	x0, .LC1
+	add	x0, x0, :lo12:.LC1
+.LVL97:
+.L41:
+.LBE69:
+.LBE68:
+	.loc 1 311 0
+	bl	printf
+.LVL98:
+.L38:
+.LBB88:
+.LBB85:
+	.loc 1 262 0
+	mov	w21, -1
+.LVL99:
+.LBE85:
+.LBE88:
+	.loc 1 315 0
+	b	.L28
+.LVL100:
+.L34:
+.LBB89:
+.LBB86:
+.LBB79:
+	.loc 1 271 0
+	add	w20, w20, 1
+.LVL101:
+	orr	w0, w0, -65536
+.LVL102:
+#APP
+// 271 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x1, [x19]
+	str	w0, [x1, 260]
+.LVL103:
+.LBE79:
+.LBB80:
+	.loc 1 273 0
+#APP
+// 273 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x19]
+.LVL104:
+.LBE80:
+	.loc 1 275 0
+	mov	w1, 4
+.LVL105:
+.LBB81:
+	.loc 1 273 0
+	str	w23, [x0, 264]
+.LVL106:
+.LBE81:
+	.loc 1 275 0
+	mov	x0, x19
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL107:
+	mov	w21, w0
+.LVL108:
+	.loc 1 276 0
+	tbz	w0, #31, .L35
+	.loc 1 277 0
+	adrp	x1, .LANCHOR3
+	adrp	x0, .LC7
+.LVL109:
+	add	x1, x1, :lo12:.LANCHOR3
+	add	x0, x0, :lo12:.LC7
+	bl	printf
+.LVL110:
+.L36:
+.LBB82:
+	.loc 1 287 0
+#APP
+// 287 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x19]
+	mov	w1, 65536
+.LBE82:
+	.loc 1 289 0
+	ldr	x2, [x19, 16]
+	mov	w3, w20
+	ldr	x4, [x25, 24]
+.LBB83:
+	.loc 1 287 0
+	str	w1, [x0, 256]
+.LBE83:
+	.loc 1 289 0
+	ldr	x0, [x19, 8]
+	ldr	x1, [x19, 24]
+	blr	x4
+.LVL111:
+.L28:
+.LBE86:
+.LBE89:
+	.loc 1 316 0
+	mov	w0, w21
+	ldr	x25, [sp, 64]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 25
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL112:
+.L35:
+	.cfi_restore_state
+.LBB90:
+.LBB87:
+.LBB84:
+	.loc 1 281 0
+	ldr	x0, [x19]
+.LVL113:
+	ldrb	w0, [x0, 292]
+	and	w0, w0, 255
+.LVL114:
+#APP
+// 281 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+.LVL115:
+#NO_APP
+.LBE84:
+	.loc 1 283 0
+	strb	w0, [x22], 1
+.LVL116:
+	b	.L32
+.LVL117:
+.L30:
+.LBE87:
+.LBE90:
+	.loc 1 311 0
+	adrp	x0, .LC8
+.LVL118:
+	add	x0, x0, :lo12:.LC8
+	b	.L41
+	.cfi_endproc
+.LFE270:
+	.size	rockchip_secure_otp_read, .-rockchip_secure_otp_read
+	.section	.text.rockchip_secure_otp_write,"ax",@progbits
+	.align	2
+	.type	rockchip_secure_otp_write, %function
+rockchip_secure_otp_write:
+.LFB278:
+	.loc 1 682 0
+	.cfi_startproc
+.LVL119:
+	stp	x29, x30, [sp, -112]!
+	.cfi_def_cfa_offset 112
+	.cfi_offset 29, -112
+	.cfi_offset 30, -104
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -96
+	.cfi_offset 20, -88
+	mov	w19, w1
+.LBB173:
+	.loc 1 686 0
+	mov	x1, 2048
+.LVL120:
+.LBE173:
+	.loc 1 682 0
+	stp	x21, x22, [sp, 32]
+.LBB174:
+	.loc 1 686 0
+	movk	x1, 0xff00, lsl 16
+.LBE174:
+	.loc 1 682 0
+	stp	x25, x26, [sp, 64]
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 21, -80
+	.cfi_offset 22, -72
+	.cfi_offset 25, -48
+	.cfi_offset 26, -40
+	.cfi_offset 23, -64
+	.cfi_offset 24, -56
+	mov	x25, x0
+.LVL121:
+.LBB175:
+	.loc 1 686 0
+	ldr	w1, [x1]
+.LVL122:
+.LBE175:
+	.loc 1 682 0
+	mov	w21, w3
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 27, -32
+	.cfi_offset 28, -24
+	.loc 1 682 0
+	str	x2, [x29, 104]
+.LBB176:
+	.loc 1 686 0
+#APP
+// 686 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+.LVL123:
+#NO_APP
+.LBE176:
+	.loc 1 688 0
+	mov	w2, 12428
+.LVL124:
+	movk	w2, 0x3, lsl 16
+	cmp	w1, w2
+	bne	.L43
+.LVL125:
+.LBB177:
+.LBB178:
+	.loc 1 570 0
+	bl	dev_get_platdata
+.LVL126:
+	.loc 1 575 0
+	ldr	x0, [x29, 104]
+	tst	x0, 3
+	bne	.L44
+	orr	w0, w19, w21
+	tst	x0, 3
+	beq	.L45
+.L44:
+	.loc 1 576 0
+	adrp	x0, .LC0
+	add	x0, x0, :lo12:.LC0
+.LVL127:
+.L102:
+.LBE178:
+.LBE177:
+	.loc 1 695 0
+	bl	printf
+.LVL128:
+	b	.L101
+.LVL129:
+.L45:
+.LBB203:
+.LBB200:
+	.loc 1 580 0
+	sxtw	x0, w21
+	bl	malloc_simple
+.LVL130:
+	mov	x20, x0
+.LVL131:
+	.loc 1 581 0
+	cbnz	x0, .L47
+.LVL132:
+.L101:
+.LBE200:
+.LBE203:
+	.loc 1 696 0
+	mov	w26, -1
+	.loc 1 699 0
+	b	.L42
+.LVL133:
+.L47:
+.LBB204:
+.LBB201:
+	.loc 1 584 0
+	mov	x2, x0
+	mov	w3, w21
+	mov	w1, w19
+	mov	x0, x25
+.LVL134:
+	bl	rk3308s_secure_otp_read
+.LVL135:
+	.loc 1 585 0
+	cbnz	w0, .L101
+	mov	x0, 0
+.LVL136:
+.L50:
+	.loc 1 590 0
+	cmp	w21, w0
+	bgt	.L51
+	.loc 1 600 0
+	asr	w19, w19, 2
+.LVL137:
+	.loc 1 599 0
+	asr	w21, w21, 2
+.LVL138:
+	lsl	w20, w19, 2
+.LVL139:
+	.loc 1 600 0
+	mov	x26, 0
+.LBB179:
+.LBB180:
+.LBB181:
+.LBB182:
+.LBB183:
+	.loc 1 508 0
+	mov	w23, 2
+.LVL140:
+.L52:
+.LBE183:
+.LBE182:
+.LBE181:
+.LBE180:
+.LBE179:
+	.loc 1 602 0
+	cmp	w21, w26
+	bgt	.L59
+.LVL141:
+.L83:
+.LBE201:
+.LBE204:
+	.loc 1 696 0
+	mov	w26, 0
+	b	.L42
+.LVL142:
+.L51:
+	add	x0, x0, 1
+.LVL143:
+.LBB205:
+.LBB202:
+	.loc 1 591 0
+	add	x1, x20, x0
+	ldrb	w1, [x1, -1]
+	cbz	w1, .L50
+.LVL144:
+.L62:
+	.loc 1 592 0
+	adrp	x0, .LC9
+	add	x0, x0, :lo12:.LC9
+	b	.L102
+.LVL145:
+.L59:
+	.loc 1 603 0
+	ldr	x0, [x29, 104]
+.LBB198:
+.LBB196:
+	.loc 1 538 0
+	cmp	w20, 448
+.LBE196:
+.LBE198:
+	.loc 1 603 0
+	ldr	w24, [x0, x26, lsl 2]
+.LVL146:
+.LBB199:
+.LBB197:
+	.loc 1 538 0
+	bgt	.L101
+	.loc 1 542 0
+	sub	w0, w20, #16
+	cmp	w20, 0
+	ccmp	w0, 31, 0, ne
+	bls	.L53
+	sub	w0, w20, #128
+	cmp	w0, 263
+	bls	.L53
+.LVL147:
+.L67:
+	.loc 1 545 0
+	adrp	x0, .LC1
+	add	x0, x0, :lo12:.LC1
+	b	.L102
+.LVL148:
+.L53:
+	.loc 1 549 0
+	cbz	w24, .L54
+	.loc 1 554 0
+	add	w28, w19, w26
+	.loc 1 549 0
+	mov	w27, 0
+.L58:
+.LVL149:
+	.loc 1 553 0
+	lsr	w0, w24, w27
+	tbz	x0, 0, .L55
+	.loc 1 554 0
+	orr	w3, w28, w27, lsl 8
+.LBB193:
+.LBB190:
+	.loc 1 503 0
+	mov	x0, x25
+.LBE190:
+.LBE193:
+	.loc 1 554 0
+	str	w3, [x29, 100]
+.LVL150:
+.LBB194:
+.LBB191:
+	.loc 1 503 0
+	bl	dev_get_platdata
+.LVL151:
+	mov	x22, x0
+.LVL152:
+.LBB184:
+	.loc 1 507 0
+#APP
+// 507 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x0]
+.LVL153:
+	str	wzr, [x0, 8200]
+.LVL154:
+.LBE184:
+.LBB185:
+	.loc 1 508 0
+#APP
+// 508 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x22]
+	str	w23, [x0, 8224]
+.LBE185:
+.LBB186:
+	.loc 1 509 0
+#APP
+// 509 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x22]
+	ldr	w3, [x29, 100]
+	str	w3, [x0, 8204]
+.LVL155:
+.LBE186:
+.LBB187:
+	.loc 1 510 0
+#APP
+// 510 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x22]
+	mov	w1, 8
+	mov	w3, 10000
+	str	w1, [x0, 8192]
+.LVL156:
+.L56:
+.LBE187:
+.LBB188:
+	.loc 1 512 0
+	ldr	x0, [x22]
+	ldr	w0, [x0, 8200]
+.LVL157:
+#APP
+// 512 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+.LBE188:
+	tbz	x0, 1, .L57
+.LVL158:
+.LBB189:
+	.loc 1 523 0
+#APP
+// 523 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x22]
+.LVL159:
+	str	w23, [x0, 8200]
+.LVL160:
+.L55:
+.LBE189:
+.LBE191:
+.LBE194:
+	.loc 1 552 0
+	add	w27, w27, 1
+.LVL161:
+	cmp	w27, 32
+	bne	.L58
+.LVL162:
+.L54:
+	add	x26, x26, 1
+.LVL163:
+	add	w20, w20, 4
+	b	.L52
+.LVL164:
+.L57:
+	str	w3, [x29, 100]
+.LBB195:
+.LBB192:
+	.loc 1 513 0
+	mov	x0, 1
+.LVL165:
+	bl	udelay
+.LVL166:
+	.loc 1 515 0
+	ldr	w3, [x29, 100]
+	subs	w3, w3, #1
+	bne	.L56
+	.loc 1 517 0
+	mov	w26, -110
+.LVL167:
+	.loc 1 516 0
+	adrp	x1, .LANCHOR4
+	adrp	x0, .LC2
+	add	x1, x1, :lo12:.LANCHOR4
+	add	x0, x0, :lo12:.LC2
+	bl	printf
+.LVL168:
+.LBE192:
+.LBE195:
+	.loc 1 557 0
+	adrp	x1, .LANCHOR5
+	adrp	x0, .LC10
+	add	x1, x1, :lo12:.LANCHOR5
+	add	x0, x0, :lo12:.LC10
+	bl	printf
+.LVL169:
+.L42:
+.LBE197:
+.LBE199:
+.LBE202:
+.LBE205:
+	.loc 1 700 0
+	mov	w0, w26
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+.LVL170:
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+.LVL171:
+	ret
+.LVL172:
+.L43:
+	.cfi_restore_state
+	.loc 1 691 0
+	mov	w2, 13064
+	cmp	w1, w2
+	bne	.L60
+.LVL173:
+.LBB206:
+.LBB207:
+	.loc 1 467 0
+	bl	dev_get_platdata
+.LVL174:
+	mov	x27, x0
+.LVL175:
+	.loc 1 469 0
+	sxtw	x0, w21
+.LVL176:
+	bl	malloc_simple
+.LVL177:
+	mov	x20, x0
+.LVL178:
+	.loc 1 472 0
+	cbz	x0, .L101
+	.loc 1 475 0
+	mov	x2, x0
+	mov	w3, w21
+	mov	w1, w19
+	mov	x0, x25
+.LVL179:
+	bl	rockchip_secure_otp_read
+.LVL180:
+	.loc 1 476 0
+	cbnz	w0, .L101
+	mov	x0, 0
+.LVL181:
+.L63:
+	.loc 1 481 0
+	cmp	w21, w0
+	bgt	.L64
+.LBB208:
+.LBB209:
+	.loc 1 429 0
+	adrp	x20, .LANCHOR6
+.LVL182:
+	add	x20, x20, :lo12:.LANCHOR6
+.LBE209:
+.LBE208:
+	.loc 1 481 0
+	mov	x24, 0
+.LVL183:
+.L65:
+	.loc 1 491 0
+	cmp	w21, w24
+	ble	.L83
+	.loc 1 492 0
+	ldr	x0, [x29, 104]
+	ldrb	w0, [x0, x24]
+	str	w0, [x29, 100]
+.LVL184:
+.LBB286:
+.LBB282:
+	.loc 1 323 0
+	mov	x0, x25
+	bl	dev_get_driver_data
+.LVL185:
+	mov	x28, x0
+.LVL186:
+	.loc 1 326 0
+	cmp	w19, 448
+	bgt	.L101
+	.loc 1 330 0
+	sub	w0, w19, #16
+.LVL187:
+	cmp	w0, 31
+	ccmp	w19, 3, 4, hi
+	ble	.L66
+	sub	w0, w19, #128
+	cmp	w0, 263
+	bhi	.L67
+.L66:
+	.loc 1 337 0
+	ldr	w0, [x29, 100]
+	cbnz	w0, .L68
+.LVL188:
+.L81:
+	add	x24, x24, 1
+	add	w19, w19, 1
+	b	.L65
+.LVL189:
+.L64:
+	add	x0, x0, 1
+.LVL190:
+.LBE282:
+.LBE286:
+	.loc 1 482 0
+	add	x1, x20, x0
+	ldrb	w1, [x1, -1]
+	cbz	w1, .L63
+	b	.L62
+.LVL191:
+.L68:
+.LBB287:
+.LBB283:
+	.loc 1 340 0
+	ldp	x0, x2, [x27, 8]
+	mov	w3, w19
+	ldr	x1, [x27, 24]
+	ldr	x5, [x28, 16]
+	blr	x5
+.LVL192:
+.LBB210:
+	.loc 1 343 0
+#APP
+// 343 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 262148
+	str	w1, [x0, 32]
+.LVL193:
+.LBE210:
+.LBB211:
+	.loc 1 344 0
+#APP
+// 344 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, -65536
+	str	w1, [x0, 40]
+.LVL194:
+.LBE211:
+.LBB212:
+	.loc 1 345 0
+#APP
+// 345 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 512
+	movk	w1, 0xff00, lsl 16
+	str	w1, [x0, 32]
+.LVL195:
+.LBE212:
+.LBB213:
+	.loc 1 346 0
+#APP
+// 346 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, -65522
+	str	w1, [x0, 36]
+.LVL196:
+.LBE213:
+.LBB214:
+	.loc 1 347 0
+#APP
+// 347 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w2, 240
+	str	w2, [x29, 96]
+.LVL197:
+	str	w2, [x0, 4096]
+.LBE214:
+.LBB215:
+	.loc 1 348 0
+#APP
+// 348 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 1
+	str	w1, [x0, 4100]
+.LVL198:
+.LBE215:
+.LBB216:
+	.loc 1 349 0
+#APP
+// 349 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w22, 122
+	str	w22, [x0, 4104]
+.LVL199:
+.LBE216:
+.LBB217:
+	.loc 1 350 0
+#APP
+// 350 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 37
+	str	w1, [x0, 4108]
+.LVL200:
+.LBE217:
+.LBB218:
+	.loc 1 351 0
+#APP
+// 351 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 4
+	str	w1, [x0, 4112]
+.LVL201:
+.LBE218:
+.LBB219:
+	.loc 1 352 0
+#APP
+// 352 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	wzr, [x0, 4116]
+.LVL202:
+.LBE219:
+.LBB220:
+	.loc 1 353 0
+#APP
+// 353 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	wzr, [x0, 4120]
+.LVL203:
+.LBE220:
+.LBB221:
+	.loc 1 354 0
+#APP
+// 354 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	wzr, [x0, 4124]
+.LVL204:
+.LBE221:
+.LBB222:
+	.loc 1 355 0
+#APP
+// 355 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 11
+	str	w1, [x0, 4128]
+.LVL205:
+.LBE222:
+.LBB223:
+	.loc 1 356 0
+#APP
+// 356 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 8
+	str	w1, [x0, 4132]
+.LVL206:
+.LBE223:
+.LBB224:
+	.loc 1 357 0
+#APP
+// 357 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	wzr, [x0, 4136]
+.LVL207:
+.LBE224:
+.LBB225:
+	.loc 1 358 0
+#APP
+// 358 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	wzr, [x0, 4140]
+.LVL208:
+.LBE225:
+.LBB226:
+	.loc 1 359 0
+#APP
+// 359 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	wzr, [x0, 4144]
+.LBE226:
+.LBB227:
+	.loc 1 360 0
+	and	w0, w19, 255
+#APP
+// 360 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x1, [x27]
+	str	w0, [x1, 4148]
+.LBE227:
+.LBB228:
+	.loc 1 361 0
+	ubfx	x1, x19, 8, 8
+.LVL209:
+#APP
+// 361 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	w1, [x0, 4152]
+.LVL210:
+.LBE228:
+.LBB229:
+	.loc 1 362 0
+#APP
+// 362 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w23, 65537
+.LBE229:
+	.loc 1 363 0
+	mov	w1, 2
+.LVL211:
+.LBB230:
+	.loc 1 362 0
+	str	w23, [x0, 32]
+.LVL212:
+.LBE230:
+	.loc 1 363 0
+	mov	x0, x27
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL213:
+	mov	w26, w0
+.LVL214:
+	.loc 1 364 0
+	ldr	w2, [x29, 96]
+	tbz	w0, #31, .L69
+	.loc 1 365 0
+	adrp	x0, .LC11
+.LVL215:
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC11
+.L100:
+	.loc 1 388 0
+	bl	printf
+.LVL216:
+.L70:
+.LBB231:
+	.loc 1 456 0
+#APP
+// 456 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, -65533
+.LBE231:
+	.loc 1 457 0
+	ldr	x2, [x27, 16]
+	mov	w3, w19
+	ldr	x6, [x28, 24]
+.LBB232:
+	.loc 1 456 0
+	str	w1, [x0, 772]
+.LBE232:
+	.loc 1 457 0
+	ldr	x0, [x27, 8]
+	ldr	x1, [x27, 24]
+	blr	x6
+.LVL217:
+.LBE283:
+.LBE287:
+	.loc 1 493 0
+	cbz	w26, .L81
+	b	.L42
+.LVL218:
+.L69:
+.LBB288:
+.LBB284:
+.LBB233:
+	.loc 1 369 0
+#APP
+// 369 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LVL219:
+	mov	w1, 14848
+	movk	w1, 0xff00, lsl 16
+	str	w1, [x0, 32]
+.LVL220:
+.LBE233:
+.LBB234:
+	.loc 1 370 0
+#APP
+// 370 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	w2, [x0, 4096]
+.LVL221:
+.LBE234:
+.LBB235:
+	.loc 1 371 0
+#APP
+// 371 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 1
+	str	w1, [x0, 4100]
+.LVL222:
+.LBE235:
+.LBB236:
+	.loc 1 372 0
+#APP
+// 372 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	w22, [x0, 4104]
+.LVL223:
+.LBE236:
+.LBB237:
+	.loc 1 373 0
+#APP
+// 373 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 21
+	str	w1, [x0, 4108]
+.LVL224:
+.LBE237:
+.LBB238:
+	.loc 1 374 0
+#APP
+// 374 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 220
+	str	w1, [x0, 4112]
+.LVL225:
+.LBE238:
+.LBB239:
+	.loc 1 375 0
+#APP
+// 375 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 146
+	str	w1, [x0, 4116]
+.LVL226:
+.LBE239:
+.LBB240:
+	.loc 1 376 0
+#APP
+// 376 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 121
+	str	w1, [x0, 4120]
+.LVL227:
+.LBE240:
+.LBB241:
+	.loc 1 377 0
+#APP
+// 377 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 129
+	str	w1, [x0, 4124]
+.LVL228:
+.LBE241:
+.LBB242:
+	.loc 1 378 0
+#APP
+// 378 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 126
+	str	w1, [x0, 4128]
+.LVL229:
+.LBE242:
+.LBB243:
+	.loc 1 379 0
+#APP
+// 379 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 33
+	str	w1, [x0, 4132]
+.LVL230:
+.LBE243:
+.LBB244:
+	.loc 1 380 0
+#APP
+// 380 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 17
+	str	w1, [x0, 4136]
+.LVL231:
+.LBE244:
+.LBB245:
+	.loc 1 381 0
+#APP
+// 381 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 157
+	str	w1, [x0, 4140]
+.LVL232:
+.LBE245:
+.LBB246:
+	.loc 1 382 0
+#APP
+// 382 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w22, 2
+	str	w22, [x0, 4144]
+.LVL233:
+.LBE246:
+.LBB247:
+	.loc 1 383 0
+#APP
+// 383 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	wzr, [x0, 4148]
+.LVL234:
+.LBE247:
+.LBB248:
+	.loc 1 384 0
+#APP
+// 384 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	wzr, [x0, 4152]
+.LVL235:
+.LBE248:
+.LBB249:
+	.loc 1 385 0
+#APP
+// 385 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LBE249:
+	.loc 1 386 0
+	mov	w1, w22
+.LBB250:
+	.loc 1 385 0
+	str	w23, [x0, 32]
+.LBE250:
+	.loc 1 386 0
+	mov	x0, x27
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL236:
+	mov	w26, w0
+.LVL237:
+	.loc 1 387 0
+	tbz	w0, #31, .L71
+	.loc 1 388 0
+	adrp	x0, .LC12
+.LVL238:
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC12
+	b	.L100
+.LVL239:
+.L71:
+.LBB251:
+	.loc 1 392 0
+#APP
+// 392 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LVL240:
+	mov	w1, 512
+	movk	w1, 0xff00, lsl 16
+	str	w1, [x0, 32]
+.LVL241:
+.LBE251:
+.LBB252:
+	.loc 1 393 0
+#APP
+// 393 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, -65535
+	str	w1, [x0, 36]
+.LVL242:
+.LBE252:
+.LBB253:
+	.loc 1 394 0
+#APP
+// 394 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 251
+	str	w1, [x0, 4096]
+.LVL243:
+.LBE253:
+.LBB254:
+	.loc 1 395 0
+#APP
+// 395 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	wzr, [x0, 4100]
+.LVL244:
+.LBE254:
+.LBB255:
+	.loc 1 396 0
+#APP
+// 396 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LBE255:
+	.loc 1 397 0
+	mov	w1, w22
+.LBB256:
+	.loc 1 396 0
+	str	w23, [x0, 32]
+.LBE256:
+	.loc 1 397 0
+	mov	x0, x27
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL245:
+	mov	w26, w0
+.LVL246:
+	.loc 1 398 0
+	tbz	w0, #31, .L72
+	.loc 1 399 0
+	adrp	x0, .LC13
+.LVL247:
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC13
+	b	.L100
+.LVL248:
+.L72:
+.LBB257:
+	.loc 1 403 0
+#APP
+// 403 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LVL249:
+	mov	w1, 192
+	str	w1, [x0, 4096]
+.LVL250:
+.LBE257:
+.LBB258:
+	.loc 1 404 0
+#APP
+// 404 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	ldr	w1, [x29, 100]
+	str	w1, [x0, 4100]
+.LVL251:
+.LBE258:
+.LBB259:
+	.loc 1 405 0
+#APP
+// 405 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LBE259:
+	.loc 1 406 0
+	mov	w1, w22
+.LBB260:
+	.loc 1 405 0
+	str	w23, [x0, 32]
+.LBE260:
+	.loc 1 406 0
+	mov	x0, x27
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL252:
+	mov	w26, w0
+.LVL253:
+	.loc 1 407 0
+	tbz	w0, #31, .L73
+	.loc 1 408 0
+	adrp	x0, .LC14
+.LVL254:
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC14
+	b	.L100
+.LVL255:
+.L73:
+.LBB261:
+	.loc 1 412 0
+#APP
+// 412 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LVL256:
+	mov	w1, 14848
+	movk	w1, 0xff00, lsl 16
+	str	w1, [x0, 32]
+.LVL257:
+.LBE261:
+.LBB262:
+	.loc 1 413 0
+#APP
+// 413 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 255
+	str	w1, [x0, 4096]
+.LVL258:
+.LBE262:
+.LBB263:
+	.loc 1 414 0
+#APP
+// 414 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 10
+	str	w1, [x0, 4100]
+.LVL259:
+.LBE263:
+.LBB264:
+	.loc 1 415 0
+#APP
+// 415 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LBE264:
+	.loc 1 416 0
+	mov	w1, w22
+.LBB265:
+	.loc 1 415 0
+	str	w23, [x0, 32]
+.LBE265:
+	.loc 1 416 0
+	mov	x0, x27
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL260:
+	mov	w26, w0
+.LVL261:
+	.loc 1 417 0
+	tbz	w0, #31, .L74
+	.loc 1 418 0
+	adrp	x0, .LC15
+.LVL262:
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC15
+	b	.L100
+.LVL263:
+.L74:
+.LBB266:
+	.loc 1 422 0
+#APP
+// 422 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LVL264:
+	mov	w1, -65534
+	str	w1, [x0, 36]
+.LVL265:
+.LBE266:
+.LBB267:
+	.loc 1 423 0
+#APP
+// 423 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 1
+	str	w1, [x0, 4096]
+.LVL266:
+.LBE267:
+.LBB268:
+	.loc 1 424 0
+#APP
+// 424 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 191
+	str	w1, [x0, 4100]
+.LVL267:
+.LBE268:
+.LBB269:
+	.loc 1 425 0
+#APP
+// 425 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	wzr, [x0, 4104]
+.LVL268:
+.LBE269:
+.LBB270:
+	.loc 1 426 0
+#APP
+// 426 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LBE270:
+	.loc 1 427 0
+	mov	w1, w22
+.LBB271:
+	.loc 1 426 0
+	str	w23, [x0, 32]
+.LBE271:
+	.loc 1 427 0
+	mov	x0, x27
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL269:
+	mov	w26, w0
+.LVL270:
+	.loc 1 428 0
+	tbnz	w0, #31, .L75
+	mov	w22, 34465
+	movk	w22, 0x1, lsl 16
+.LVL271:
+.L76:
+.LBB272:
+.LBB273:
+.LBB274:
+	.loc 1 151 0
+	ldr	x0, [x27]
+	ldr	w0, [x0, 44]
+.LVL272:
+#APP
+// 151 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+.LVL273:
+#NO_APP
+.LBE274:
+	.loc 1 152 0
+	and	w26, w0, 16
+	tbz	x0, 4, .L77
+	.loc 1 155 0
+	subs	w22, w22, #1
+.LVL274:
+	beq	.L78
+.LVL275:
+	.loc 1 161 0
+	mov	x0, 1
+.LVL276:
+	bl	udelay
+.LVL277:
+	b	.L76
+.LVL278:
+.L75:
+.LBE273:
+.LBE272:
+	.loc 1 429 0
+	adrp	x0, .LC16
+.LVL279:
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC16
+	b	.L100
+.LVL280:
+.L84:
+	.loc 1 445 0
+	mov	x1, x20
+	adrp	x0, .LC17
+.LVL281:
+	mov	w26, w22
+	add	x0, x0, :lo12:.LC17
+	bl	printf
+.LVL282:
+	b	.L70
+.LVL283:
+.L60:
+.LBE284:
+.LBE288:
+.LBE207:
+.LBE206:
+	.loc 1 695 0
+	adrp	x0, .LC8
+.LVL284:
+	add	x0, x0, :lo12:.LC8
+	b	.L102
+.LVL285:
+.L78:
+.LBB291:
+.LBB290:
+.LBB289:
+.LBB285:
+	.loc 1 435 0
+	adrp	x0, .LC18
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC18
+.L99:
+	.loc 1 451 0
+	bl	printf
+.LVL286:
+	mov	w26, -1
+	b	.L70
+.LVL287:
+.L77:
+.LBB275:
+	.loc 1 439 0
+#APP
+// 439 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, -65534
+	str	w1, [x0, 36]
+.LVL288:
+.LBE275:
+.LBB276:
+	.loc 1 440 0
+#APP
+// 440 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 2
+	str	w1, [x0, 4096]
+.LVL289:
+.LBE276:
+.LBB277:
+	.loc 1 441 0
+#APP
+// 441 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w2, 191
+	str	w2, [x0, 4100]
+.LVL290:
+.LBE277:
+.LBB278:
+	.loc 1 442 0
+#APP
+// 442 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w2, 65537
+	str	w2, [x0, 32]
+.LBE278:
+	.loc 1 443 0
+	mov	x0, x27
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL291:
+	mov	w22, w0
+.LVL292:
+	.loc 1 444 0
+	tbnz	w0, #31, .L84
+	mov	w22, 20001
+.LVL293:
+.L80:
+.LBB279:
+.LBB280:
+.LBB281:
+	.loc 1 129 0
+	ldr	x0, [x27]
+	ldr	w0, [x0, 44]
+.LVL294:
+#APP
+// 129 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+.LVL295:
+#NO_APP
+.LBE281:
+	.loc 1 130 0
+	tbnz	x0, 4, .L70
+	.loc 1 133 0
+	subs	w22, w22, #1
+.LVL296:
+	beq	.L79
+	.loc 1 138 0
+	mov	x0, 1
+.LVL297:
+	bl	udelay
+.LVL298:
+	b	.L80
+.LVL299:
+.L79:
+.LBE280:
+.LBE279:
+	.loc 1 451 0
+	adrp	x0, .LC19
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC19
+	b	.L99
+.LBE285:
+.LBE289:
+.LBE290:
+.LBE291:
+	.cfi_endproc
+.LFE278:
+	.size	rockchip_secure_otp_write, .-rockchip_secure_otp_write
+	.section	.text.rockchip_secure_otp_exit,"ax",@progbits
+	.align	2
+	.global	rockchip_secure_otp_exit
+	.type	rockchip_secure_otp_exit, %function
+rockchip_secure_otp_exit:
+.LFB277:
+	.loc 1 660 0
+	.cfi_startproc
+.LVL300:
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+.LBB304:
+	.loc 1 664 0
+	mov	x1, 2048
+	movk	x1, 0xff00, lsl 16
+.LBE304:
+	.loc 1 660 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -16
+	.cfi_offset 20, -8
+.LBB305:
+	.loc 1 664 0
+	ldr	w1, [x1]
+.LVL301:
+#APP
+// 664 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+.LVL302:
+#NO_APP
+.LBE305:
+	.loc 1 666 0
+	mov	w2, 12428
+	movk	w2, 0x3, lsl 16
+	cmp	w1, w2
+	bne	.L104
+.LBB306:
+.LBB307:
+	.loc 1 614 0
+	bl	dev_get_platdata
+.LVL303:
+	mov	x19, x0
+.LVL304:
+.LBB308:
+	.loc 1 619 0
+#APP
+// 619 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x0]
+.LVL305:
+	str	wzr, [x0, 8200]
+.LVL306:
+.LBE308:
+.LBB309:
+	.loc 1 620 0
+#APP
+// 620 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x19]
+	mov	w20, 34464
+	mov	w1, 1
+	movk	w20, 0x1, lsl 16
+	str	w1, [x0, 8192]
+.LVL307:
+.L105:
+.LBE309:
+.LBB310:
+	.loc 1 622 0
+	ldr	x0, [x19]
+	ldr	w0, [x0, 8200]
+.LVL308:
+#APP
+// 622 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+.LBE310:
+	tbz	x0, 9, .L107
+.LVL309:
+.LBB311:
+	.loc 1 633 0
+#APP
+// 633 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x19]
+.LVL310:
+	mov	w1, 512
+	str	w1, [x0, 8200]
+.LVL311:
+.LBE311:
+.LBB312:
+	.loc 1 637 0
+#APP
+// 637 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x19]
+	str	wzr, [x0, 8200]
+.LVL312:
+.LBE312:
+.LBB313:
+	.loc 1 638 0
+#APP
+// 638 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x19]
+	mov	w20, 34464
+	movk	w20, 0x1, lsl 16
+	str	wzr, [x0, 8192]
+.LVL313:
+.L108:
+.LBE313:
+.LBB314:
+	.loc 1 640 0
+	ldr	x0, [x19]
+	ldr	w0, [x0, 8200]
+.LVL314:
+#APP
+// 640 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+.LBE314:
+	tbz	x0, 10, .L110
+.LVL315:
+.LBB315:
+	.loc 1 651 0
+#APP
+// 651 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x19]
+.LVL316:
+	mov	w1, 1024
+	str	w1, [x0, 8200]
+.LVL317:
+.LBE315:
+.LBB316:
+	.loc 1 654 0
+#APP
+// 654 "drivers/misc/rk3308-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x19, 8]
+	mov	w1, 262144
+	str	w1, [x0]
+.LBE316:
+	.loc 1 615 0
+	mov	w0, 0
+	b	.L103
+.LVL318:
+.L107:
+	.loc 1 623 0
+	mov	x0, 1
+.LVL319:
+	bl	udelay
+.LVL320:
+	.loc 1 625 0
+	subs	w20, w20, #1
+.LVL321:
+	bne	.L105
+.L109:
+	.loc 1 626 0
+	adrp	x1, .LANCHOR7
+	adrp	x0, .LC2
+	add	x1, x1, :lo12:.LANCHOR7
+	add	x0, x0, :lo12:.LC2
+	bl	printf
+.LVL322:
+	.loc 1 627 0
+	mov	w0, -110
+.LVL323:
+.L103:
+.LBE307:
+.LBE306:
+	.loc 1 678 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL324:
+.L110:
+	.cfi_restore_state
+.LBB318:
+.LBB317:
+	.loc 1 641 0
+	mov	x0, 1
+.LVL325:
+	bl	udelay
+.LVL326:
+	.loc 1 643 0
+	subs	w20, w20, #1
+.LVL327:
+	bne	.L108
+	b	.L109
+.LVL328:
+.L104:
+.LBE317:
+.LBE318:
+	.loc 1 669 0
+	mov	w2, 13064
+	.loc 1 670 0
+	mov	w0, 0
+.LVL329:
+	.loc 1 669 0
+	cmp	w1, w2
+	beq	.L103
+	.loc 1 673 0
+	adrp	x0, .LC8
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.LVL330:
+	.loc 1 674 0
+	mov	w0, -1
+	b	.L103
+	.cfi_endproc
+.LFE277:
+	.size	rockchip_secure_otp_exit, .-rockchip_secure_otp_exit
+	.section	.text.secure_otp_ioctl,"ax",@progbits
+	.align	2
+	.type	secure_otp_ioctl, %function
+secure_otp_ioctl:
+.LFB282:
+	.loc 1 727 0
+	.cfi_startproc
+.LVL331:
+	.loc 1 730 0
+	mov	x3, 27906
+	cmp	x1, x3
+	beq	.L119
+	mov	x0, 27908
+.LVL332:
+	cmp	x1, x0
+	bne	.L122
+.LVL333:
+.LBB319:
+.LBB320:
+	.loc 1 719 0
+	mov	w0, 8
+	str	w0, [x2]
+.LVL334:
+.LBE320:
+.LBE319:
+	.loc 1 732 0
+	mov	w0, 0
+	.loc 1 733 0
+	ret
+.LVL335:
+.L119:
+	.loc 1 735 0
+	b	rockchip_secure_otp_exit
+.LVL336:
+.L122:
+	.loc 1 728 0
+	mov	w0, -22
+	.loc 1 741 0
+	ret
+	.cfi_endproc
+.LFE282:
+	.size	secure_otp_ioctl, .-secure_otp_ioctl
+	.global	_u_boot_list_2_driver_2_rockchip_secure_otp
+	.section	.rodata.__func__.7401,"a",@progbits
+	.align	3
+	.set	.LANCHOR1,. + 0
+	.type	__func__.7401, %object
+	.size	__func__.7401, 32
+__func__.7401:
+	.string	"rockchip_secure_otp_wait_status"
+	.section	.rodata.__func__.7444,"a",@progbits
+	.align	3
+	.set	.LANCHOR2,. + 0
+	.type	__func__.7444, %object
+	.size	__func__.7444, 31
+__func__.7444:
+	.string	"rockchip_secure_otp_ecc_enable"
+	.section	.rodata.__func__.7468,"a",@progbits
+	.align	3
+	.set	.LANCHOR0,. + 0
+	.type	__func__.7468, %object
+	.size	__func__.7468, 24
+__func__.7468:
+	.string	"rk3308s_secure_otp_read"
+	.section	.rodata.__func__.7496,"a",@progbits
+	.align	3
+	.set	.LANCHOR3,. + 0
+	.type	__func__.7496, %object
+	.size	__func__.7496, 23
+__func__.7496:
+	.string	"rk3308_secure_otp_read"
+	.section	.rodata.__func__.7563,"a",@progbits
+	.align	3
+	.set	.LANCHOR6,. + 0
+	.type	__func__.7563, %object
+	.size	__func__.7563, 31
+__func__.7563:
+	.string	"rockchip_secure_otp_write_byte"
+	.section	.rodata.__func__.7677,"a",@progbits
+	.align	3
+	.set	.LANCHOR4,. + 0
+	.type	__func__.7677, %object
+	.size	__func__.7677, 28
+__func__.7677:
+	.string	"rk3308s_secure_otp_prog_bit"
+	.section	.rodata.__func__.7694,"a",@progbits
+	.align	3
+	.set	.LANCHOR5,. + 0
+	.type	__func__.7694, %object
+	.size	__func__.7694, 30
+__func__.7694:
+	.string	"rk3308s_secure_otp_write_word"
+	.section	.rodata.__func__.7728,"a",@progbits
+	.align	3
+	.set	.LANCHOR7,. + 0
+	.type	__func__.7728, %object
+	.size	__func__.7728, 21
+__func__.7728:
+	.string	"rk3308s_spl_otp_exit"
+	.section	.rodata.rk3308_data,"a",@progbits
+	.align	3
+	.type	rk3308_data, %object
+	.size	rk3308_data, 32
+rk3308_data:
+	.xword	rockchip_secure_otp_read
+	.xword	rockchip_secure_otp_write
+	.xword	rk3308_spl_rockchip_otp_start
+	.xword	rk3308_spl_rockchip_otp_stop
+	.section	.rodata.rk3308s_secure_otp_read.str1.1,"aMS",@progbits,1
+.LC0:
+	.string	"Please input word align!\n"
+.LC1:
+	.string	"Please input correct addr\n"
+.LC2:
+	.string	"%s: wait init status timeout\n"
+	.section	.rodata.rockchip_otp_ids,"a",@progbits
+	.align	3
+	.type	rockchip_otp_ids, %object
+	.size	rockchip_otp_ids, 32
+rockchip_otp_ids:
+	.xword	.LC21
+	.xword	rk3308_data
+	.zero	16
+	.section	.rodata.rockchip_secure_otp_ofdata_to_platdata.str1.1,"aMS",@progbits,1
+.LC3:
+	.string	"secure_conf"
+.LC4:
+	.string	"mask_addr"
+.LC5:
+	.string	"cru_rst_addr"
+	.section	.rodata.rockchip_secure_otp_ops,"a",@progbits
+	.align	3
+	.type	rockchip_secure_otp_ops, %object
+	.size	rockchip_secure_otp_ops, 32
+rockchip_secure_otp_ops:
+	.xword	secure_otp_read
+	.xword	secure_otp_write
+	.xword	secure_otp_ioctl
+	.zero	8
+	.section	.rodata.rockchip_secure_otp_read.str1.1,"aMS",@progbits,1
+.LC6:
+	.string	"%s timeout during ecc_enable\n"
+.LC7:
+	.string	"%s timeout during read setup\n"
+.LC8:
+	.string	"read chip ID failed\n"
+	.section	.rodata.rockchip_secure_otp_write.str1.1,"aMS",@progbits,1
+.LC9:
+	.string	"The zone is written.\n"
+.LC10:
+	.string	"%s otp prog bit error\n"
+.LC11:
+	.string	"%s timeout during write setup 1\n"
+.LC12:
+	.string	"%s timeout during write setup 2\n"
+.LC13:
+	.string	"%s timeout during write setup 3\n"
+.LC14:
+	.string	"%s timeout during write setup 4\n"
+.LC15:
+	.string	"%s timeout during write setup 5\n"
+.LC16:
+	.string	"%s timeout during write setup 6\n"
+.LC17:
+	.string	"%s timeout during write setup 8\n"
+.LC18:
+	.string	"%s timeout during write setup 7\n"
+.LC19:
+	.string	"%s timeout during write setup 9\n"
+	.section	.rodata.str1.1,"aMS",@progbits,1
+.LC20:
+	.string	"rockchip_secure_otp"
+.LC21:
+	.string	"rockchip,rk3308-secure-otp"
+	.section	.u_boot_list_2_driver_2_rockchip_secure_otp,"aw",@progbits
+	.align	2
+	.type	_u_boot_list_2_driver_2_rockchip_secure_otp, %object
+	.size	_u_boot_list_2_driver_2_rockchip_secure_otp, 120
+_u_boot_list_2_driver_2_rockchip_secure_otp:
+	.8byte	.LC20
+	.word	36
+	.zero	4
+	.8byte	rockchip_otp_ids
+	.zero	32
+	.8byte	rockchip_secure_otp_ofdata_to_platdata
+	.zero	28
+	.word	32
+	.zero	8
+	.8byte	rockchip_secure_otp_ops
+	.zero	8
+	.text
+.Letext0:
+	.file 2 "include/common.h"
+	.file 3 "./arch/arm/include/asm/types.h"
+	.file 4 "include/linux/types.h"
+	.file 5 "include/errno.h"
+	.file 6 "include/linux/string.h"
+	.file 7 "include/efi.h"
+	.file 8 "include/dm/device.h"
+	.file 9 "include/ide.h"
+	.file 10 "include/linux/list.h"
+	.file 11 "include/part.h"
+	.file 12 "include/flash.h"
+	.file 13 "include/lmb.h"
+	.file 14 "include/asm-generic/u-boot.h"
+	.file 15 "./arch/arm/include/asm/u-boot-arm.h"
+	.file 16 "include/linux/libfdt_env.h"
+	.file 17 "include/linux/../../scripts/dtc/libfdt/fdt.h"
+	.file 18 "include/linux/libfdt.h"
+	.file 19 "include/image.h"
+	.file 20 "./arch/arm/include/asm/global_data.h"
+	.file 21 "include/asm-generic/global_data.h"
+	.file 22 "include/dm/of.h"
+	.file 23 "include/net.h"
+	.file 24 "include/dm/uclass-id.h"
+	.file 25 "include/dm/ofnode.h"
+	.file 26 "include/malloc.h"
+	.file 27 "include/linux/compat.h"
+	.file 28 "include/dm/uclass.h"
+	.file 29 "include/asm-generic/ioctl.h"
+	.file 30 "include/misc.h"
+	.file 31 "include/rockchip-otp.h"
+	.file 32 "include/dm/read.h"
+	.file 33 "include/linux/delay.h"
+	.file 34 "include/stdio.h"
+	.file 35 "include/log.h"
+	.section	.debug_info,"",@progbits
+.Ldebug_info0:
+	.4byte	0x3d3d
+	.2byte	0x4
+	.4byte	.Ldebug_abbrev0
+	.byte	0x8
+	.uleb128 0x1
+	.4byte	.LASF458
+	.byte	0xc
+	.4byte	.LASF459
+	.4byte	.LASF460
+	.4byte	.Ldebug_ranges0+0x4e0
+	.8byte	0
+	.4byte	.Ldebug_line0
+	.uleb128 0x2
+	.4byte	.LASF4
+	.byte	0x2
+	.byte	0xd
+	.4byte	0x34
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x8
+	.4byte	.LASF0
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF1
+	.uleb128 0x3
+	.byte	0x2
+	.byte	0x7
+	.4byte	.LASF2
+	.uleb128 0x4
+	.4byte	.LASF21
+	.byte	0x5
+	.byte	0xc
+	.4byte	0x54
+	.uleb128 0x5
+	.byte	0x4
+	.byte	0x5
+	.string	"int"
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x6
+	.4byte	.LASF3
+	.uleb128 0x2
+	.4byte	.LASF5
+	.byte	0x3
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+	.4byte	.LASF6
+	.uleb128 0x2
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+	.uleb128 0x6
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+	.uleb128 0x7
+	.4byte	0x94
+	.uleb128 0x6
+	.string	"u32"
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+	.4byte	0x7f
+	.uleb128 0x6
+	.string	"u64"
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+	.string	"seq"
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+	.uleb128 0x23
+	.4byte	.LASF203
+	.byte	0x2d
+	.uleb128 0x23
+	.4byte	.LASF204
+	.byte	0x2e
+	.uleb128 0x23
+	.4byte	.LASF205
+	.byte	0x2f
+	.uleb128 0x23
+	.4byte	.LASF206
+	.byte	0x30
+	.uleb128 0x23
+	.4byte	.LASF207
+	.byte	0x31
+	.uleb128 0x23
+	.4byte	.LASF208
+	.byte	0x32
+	.uleb128 0x23
+	.4byte	.LASF209
+	.byte	0x33
+	.uleb128 0x23
+	.4byte	.LASF210
+	.byte	0x34
+	.uleb128 0x23
+	.4byte	.LASF211
+	.byte	0x35
+	.uleb128 0x23
+	.4byte	.LASF212
+	.byte	0x36
+	.uleb128 0x23
+	.4byte	.LASF213
+	.byte	0x37
+	.uleb128 0x23
+	.4byte	.LASF214
+	.byte	0x38
+	.uleb128 0x23
+	.4byte	.LASF215
+	.byte	0x39
+	.uleb128 0x23
+	.4byte	.LASF216
+	.byte	0x3a
+	.uleb128 0x23
+	.4byte	.LASF217
+	.byte	0x3b
+	.uleb128 0x23
+	.4byte	.LASF218
+	.byte	0x3c
+	.uleb128 0x23
+	.4byte	.LASF219
+	.byte	0x3d
+	.uleb128 0x23
+	.4byte	.LASF220
+	.byte	0x3e
+	.uleb128 0x23
+	.4byte	.LASF221
+	.byte	0x3f
+	.uleb128 0x23
+	.4byte	.LASF222
+	.byte	0x40
+	.uleb128 0x23
+	.4byte	.LASF223
+	.byte	0x41
+	.uleb128 0x23
+	.4byte	.LASF224
+	.byte	0x42
+	.uleb128 0x23
+	.4byte	.LASF225
+	.byte	0x43
+	.uleb128 0x23
+	.4byte	.LASF226
+	.byte	0x44
+	.uleb128 0x23
+	.4byte	.LASF227
+	.byte	0x45
+	.uleb128 0x23
+	.4byte	.LASF228
+	.byte	0x46
+	.uleb128 0x23
+	.4byte	.LASF229
+	.byte	0x47
+	.uleb128 0x23
+	.4byte	.LASF230
+	.byte	0x48
+	.uleb128 0x23
+	.4byte	.LASF231
+	.byte	0x49
+	.uleb128 0x23
+	.4byte	.LASF232
+	.byte	0x4a
+	.uleb128 0x23
+	.4byte	.LASF233
+	.byte	0x4b
+	.uleb128 0x23
+	.4byte	.LASF234
+	.byte	0x4c
+	.uleb128 0x23
+	.4byte	.LASF235
+	.byte	0x4d
+	.uleb128 0x23
+	.4byte	.LASF236
+	.byte	0x4e
+	.uleb128 0x23
+	.4byte	.LASF237
+	.byte	0x4f
+	.uleb128 0x23
+	.4byte	.LASF238
+	.byte	0x50
+	.uleb128 0x23
+	.4byte	.LASF239
+	.byte	0x51
+	.uleb128 0x23
+	.4byte	.LASF240
+	.byte	0x52
+	.uleb128 0x23
+	.4byte	.LASF241
+	.byte	0x53
+	.uleb128 0x23
+	.4byte	.LASF242
+	.byte	0x54
+	.uleb128 0x23
+	.4byte	.LASF243
+	.byte	0x55
+	.uleb128 0x23
+	.4byte	.LASF244
+	.byte	0x56
+	.uleb128 0x23
+	.4byte	.LASF245
+	.byte	0x57
+	.uleb128 0x23
+	.4byte	.LASF246
+	.byte	0x58
+	.uleb128 0x23
+	.4byte	.LASF247
+	.byte	0x59
+	.uleb128 0x23
+	.4byte	.LASF248
+	.byte	0x5a
+	.uleb128 0x23
+	.4byte	.LASF249
+	.byte	0x5b
+	.uleb128 0x23
+	.4byte	.LASF250
+	.byte	0x5c
+	.uleb128 0x23
+	.4byte	.LASF251
+	.byte	0x5d
+	.uleb128 0x23
+	.4byte	.LASF252
+	.byte	0x5e
+	.uleb128 0x23
+	.4byte	.LASF253
+	.byte	0x5f
+	.uleb128 0x24
+	.4byte	.LASF254
+	.sleb128 -1
+	.byte	0
+	.uleb128 0x25
+	.byte	0x4
+	.4byte	0x7f
+	.byte	0x23
+	.byte	0xf6
+	.4byte	0xbe2
+	.uleb128 0x23
+	.4byte	.LASF255
+	.byte	0x5
+	.byte	0
+	.uleb128 0xd
+	.4byte	.LASF256
+	.byte	0x40
+	.byte	0x14
+	.byte	0xc
+	.4byte	0xc5b
+	.uleb128 0xe
+	.4byte	.LASF257
+	.byte	0x14
+	.byte	0x22
+	.4byte	0x3b
+	.byte	0
+	.uleb128 0xf
+	.string	"tbu"
+	.byte	0x14
+	.byte	0x23
+	.4byte	0x7f
+	.byte	0x8
+	.uleb128 0xf
+	.string	"tbl"
+	.byte	0x14
+	.byte	0x24
+	.4byte	0x7f
+	.byte	0xc
+	.uleb128 0xe
+	.4byte	.LASF258
+	.byte	0x14
+	.byte	0x25
+	.4byte	0x3b
+	.byte	0x10
+	.uleb128 0xe
+	.4byte	.LASF259
+	.byte	0x14
+	.byte	0x26
+	.4byte	0x8d
+	.byte	0x18
+	.uleb128 0xe
+	.4byte	.LASF260
+	.byte	0x14
+	.byte	0x28
+	.4byte	0x3b
+	.byte	0x20
+	.uleb128 0xe
+	.4byte	.LASF261
+	.byte	0x14
+	.byte	0x29
+	.4byte	0x3b
+	.byte	0x28
+	.uleb128 0xe
+	.4byte	.LASF262
+	.byte	0x14
+	.byte	0x2b
+	.4byte	0x3b
+	.byte	0x30
+	.uleb128 0xe
+	.4byte	.LASF263
+	.byte	0x14
+	.byte	0x2c
+	.4byte	0x3b
+	.byte	0x38
+	.byte	0
+	.uleb128 0xd
+	.4byte	.LASF264
+	.byte	0x18
+	.byte	0x15
+	.byte	0x22
+	.4byte	0xca3
+	.uleb128 0xe
+	.4byte	.LASF265
+	.byte	0x15
+	.byte	0x23
+	.4byte	0xa3
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF266
+	.byte	0x15
+	.byte	0x24
+	.4byte	0xa3
+	.byte	0x4
+	.uleb128 0xf
+	.string	"id"
+	.byte	0x15
+	.byte	0x25
+	.4byte	0xa3
+	.byte	0x8
+	.uleb128 0xe
+	.4byte	.LASF267
+	.byte	0x15
+	.byte	0x26
+	.4byte	0xa3
+	.byte	0xc
+	.uleb128 0xe
+	.4byte	.LASF268
+	.byte	0x15
+	.byte	0x27
+	.4byte	0x100
+	.byte	0x10
+	.byte	0
+	.uleb128 0x17
+	.4byte	.LASF269
+	.2byte	0x1a0
+	.byte	0x15
+	.byte	0x2a
+	.4byte	0xe9a
+	.uleb128 0xf
+	.string	"bd"
+	.byte	0x15
+	.byte	0x2b
+	.4byte	0x95a
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF42
+	.byte	0x15
+	.byte	0x2c
+	.4byte	0x3b
+	.byte	0x8
+	.uleb128 0xe
+	.4byte	.LASF267
+	.byte	0x15
+	.byte	0x2d
+	.4byte	0x7f
+	.byte	0x10
+	.uleb128 0xe
+	.4byte	.LASF270
+	.byte	0x15
+	.byte	0x2e
+	.4byte	0x3b
+	.byte	0x18
+	.uleb128 0xe
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+	.byte	0x15
+	.byte	0x2f
+	.4byte	0x3b
+	.byte	0x20
+	.uleb128 0xe
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+	.byte	0x15
+	.byte	0x31
+	.4byte	0x3b
+	.byte	0x28
+	.uleb128 0xe
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+	.byte	0x15
+	.byte	0x32
+	.4byte	0x3b
+	.byte	0x30
+	.uleb128 0xe
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+	.byte	0x3e
+	.4byte	0x3b
+	.byte	0x38
+	.uleb128 0xe
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+	.byte	0x15
+	.byte	0x42
+	.4byte	0x3b
+	.byte	0x40
+	.uleb128 0xe
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+	.byte	0x43
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+	.uleb128 0xe
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+	.uleb128 0xe
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+	.uleb128 0xe
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+	.4byte	0xc4
+	.byte	0x60
+	.uleb128 0xe
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+	.uleb128 0xe
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+	.byte	0x15
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+	.4byte	0x3b
+	.byte	0x70
+	.uleb128 0xe
+	.4byte	.LASF282
+	.byte	0x15
+	.byte	0x4a
+	.4byte	0x3b
+	.byte	0x78
+	.uleb128 0xe
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+	.byte	0x15
+	.byte	0x4b
+	.4byte	0x3b
+	.byte	0x80
+	.uleb128 0xe
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+	.byte	0x15
+	.byte	0x4c
+	.4byte	0xe9a
+	.byte	0x88
+	.uleb128 0xe
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+	.byte	0x15
+	.byte	0x4f
+	.4byte	0x254
+	.byte	0x90
+	.uleb128 0xe
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+	.byte	0x98
+	.uleb128 0xe
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+	.byte	0x15
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+	.byte	0xa0
+	.uleb128 0xe
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+	.byte	0x15
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+	.4byte	0x25a
+	.byte	0xb0
+	.uleb128 0xe
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+	.4byte	0x25a
+	.byte	0xb8
+	.uleb128 0xe
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+	.byte	0x15
+	.byte	0x5a
+	.4byte	0x25a
+	.byte	0xc0
+	.uleb128 0xe
+	.4byte	.LASF291
+	.byte	0x15
+	.byte	0x5c
+	.4byte	0x12c
+	.byte	0xc8
+	.uleb128 0xe
+	.4byte	.LASF292
+	.byte	0x15
+	.byte	0x5d
+	.4byte	0x3b
+	.byte	0xd0
+	.uleb128 0xe
+	.4byte	.LASF293
+	.byte	0x15
+	.byte	0x5f
+	.4byte	0xf12
+	.byte	0xd8
+	.uleb128 0xf
+	.string	"jt"
+	.byte	0x15
+	.byte	0x61
+	.4byte	0xf1d
+	.byte	0xe0
+	.uleb128 0xe
+	.4byte	.LASF294
+	.byte	0x15
+	.byte	0x62
+	.4byte	0xf23
+	.byte	0xe8
+	.uleb128 0x15
+	.4byte	.LASF295
+	.byte	0x15
+	.byte	0x6c
+	.4byte	0x7f
+	.2byte	0x108
+	.uleb128 0x15
+	.4byte	.LASF296
+	.byte	0x15
+	.byte	0x6d
+	.4byte	0x7f
+	.2byte	0x10c
+	.uleb128 0x15
+	.4byte	.LASF297
+	.byte	0x15
+	.byte	0x6f
+	.4byte	0x3b
+	.2byte	0x110
+	.uleb128 0x15
+	.4byte	.LASF298
+	.byte	0x15
+	.byte	0x70
+	.4byte	0x3b
+	.2byte	0x118
+	.uleb128 0x15
+	.4byte	.LASF299
+	.byte	0x15
+	.byte	0x71
+	.4byte	0x3b
+	.2byte	0x120
+	.uleb128 0x15
+	.4byte	.LASF300
+	.byte	0x15
+	.byte	0x7a
+	.4byte	0x254
+	.2byte	0x128
+	.uleb128 0x15
+	.4byte	.LASF127
+	.byte	0x15
+	.byte	0x7b
+	.4byte	0xbe2
+	.2byte	0x130
+	.uleb128 0x15
+	.4byte	.LASF301
+	.byte	0x15
+	.byte	0x88
+	.4byte	0xb9
+	.2byte	0x170
+	.uleb128 0x15
+	.4byte	.LASF302
+	.byte	0x15
+	.byte	0x8d
+	.4byte	0xc5b
+	.2byte	0x178
+	.uleb128 0x15
+	.4byte	.LASF303
+	.byte	0x15
+	.byte	0x8e
+	.4byte	0x100
+	.2byte	0x190
+	.uleb128 0x15
+	.4byte	.LASF304
+	.byte	0x15
+	.byte	0x8f
+	.4byte	0x54
+	.2byte	0x198
+	.byte	0
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0xca3
+	.uleb128 0xd
+	.4byte	.LASF305
+	.byte	0x40
+	.byte	0x16
+	.byte	0x2c
+	.4byte	0xf0d
+	.uleb128 0xe
+	.4byte	.LASF28
+	.byte	0x16
+	.byte	0x2d
+	.4byte	0xd6
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF126
+	.byte	0x16
+	.byte	0x2e
+	.4byte	0xd6
+	.byte	0x8
+	.uleb128 0xe
+	.4byte	.LASF306
+	.byte	0x16
+	.byte	0x2f
+	.4byte	0x124e
+	.byte	0x10
+	.uleb128 0xe
+	.4byte	.LASF307
+	.byte	0x16
+	.byte	0x30
+	.4byte	0xd6
+	.byte	0x18
+	.uleb128 0xe
+	.4byte	.LASF308
+	.byte	0x16
+	.byte	0x32
+	.4byte	0x1296
+	.byte	0x20
+	.uleb128 0xe
+	.4byte	.LASF34
+	.byte	0x16
+	.byte	0x33
+	.4byte	0xf12
+	.byte	0x28
+	.uleb128 0xe
+	.4byte	.LASF309
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+	.byte	0x34
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+	.byte	0x30
+	.uleb128 0xe
+	.4byte	.LASF310
+	.byte	0x16
+	.byte	0x35
+	.4byte	0xf12
+	.byte	0x38
+	.byte	0
+	.uleb128 0x7
+	.4byte	0xea0
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0xea0
+	.uleb128 0x26
+	.4byte	.LASF461
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0xf18
+	.uleb128 0xa
+	.4byte	0xdc
+	.4byte	0xf33
+	.uleb128 0x11
+	.4byte	0xcf
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x2
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+	.uleb128 0x27
+	.4byte	0xf33
+	.uleb128 0x4
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+	.byte	0x2
+	.byte	0xad
+	.4byte	0x100
+	.uleb128 0xa
+	.4byte	0x94
+	.4byte	0xf59
+	.uleb128 0xb
+	.byte	0
+	.uleb128 0x4
+	.4byte	.LASF313
+	.byte	0x2
+	.byte	0xaf
+	.4byte	0xf4e
+	.uleb128 0x4
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+	.byte	0x2
+	.byte	0xb0
+	.4byte	0xf4e
+	.uleb128 0x4
+	.4byte	.LASF315
+	.byte	0x2
+	.byte	0xfe
+	.4byte	0x100
+	.uleb128 0x4
+	.4byte	.LASF316
+	.byte	0x2
+	.byte	0xff
+	.4byte	0x100
+	.uleb128 0xc
+	.4byte	.LASF317
+	.byte	0x2
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+	.4byte	0x100
+	.uleb128 0xd
+	.4byte	.LASF318
+	.byte	0x4
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+	.byte	0x2e
+	.4byte	0xfaa
+	.uleb128 0xe
+	.4byte	.LASF319
+	.byte	0x17
+	.byte	0x2f
+	.4byte	0x121
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+	.byte	0
+	.uleb128 0x8
+	.byte	0x8
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+	.uleb128 0x12
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+	.4byte	0xfbf
+	.uleb128 0x13
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+	.uleb128 0x8
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+	.4byte	0xfb0
+	.uleb128 0xa
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+	.4byte	0xfd5
+	.uleb128 0x11
+	.4byte	0xcf
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+	.byte	0
+	.uleb128 0xc
+	.4byte	.LASF320
+	.byte	0x17
+	.2byte	0x1fd
+	.4byte	0xf91
+	.uleb128 0xc
+	.4byte	.LASF321
+	.byte	0x17
+	.2byte	0x1fe
+	.4byte	0xf91
+	.uleb128 0xc
+	.4byte	.LASF322
+	.byte	0x17
+	.2byte	0x200
+	.4byte	0xf91
+	.uleb128 0xc
+	.4byte	.LASF323
+	.byte	0x17
+	.2byte	0x205
+	.4byte	0xf23
+	.uleb128 0xc
+	.4byte	.LASF324
+	.byte	0x17
+	.2byte	0x206
+	.4byte	0xf23
+	.uleb128 0xa
+	.4byte	0xdc
+	.4byte	0x1021
+	.uleb128 0x11
+	.4byte	0xcf
+	.byte	0x3f
+	.byte	0
+	.uleb128 0xc
+	.4byte	.LASF325
+	.byte	0x17
+	.2byte	0x207
+	.4byte	0x1011
+	.uleb128 0xc
+	.4byte	.LASF326
+	.byte	0x17
+	.2byte	0x209
+	.4byte	0xfc5
+	.uleb128 0xc
+	.4byte	.LASF327
+	.byte	0x17
+	.2byte	0x20a
+	.4byte	0xfc5
+	.uleb128 0xc
+	.4byte	.LASF328
+	.byte	0x17
+	.2byte	0x20b
+	.4byte	0xf91
+	.uleb128 0xc
+	.4byte	.LASF329
+	.byte	0x17
+	.2byte	0x20c
+	.4byte	0xf91
+	.uleb128 0xc
+	.4byte	.LASF330
+	.byte	0x17
+	.2byte	0x20d
+	.4byte	0xfaa
+	.uleb128 0xa
+	.4byte	0xfaa
+	.4byte	0x1079
+	.uleb128 0x11
+	.4byte	0xcf
+	.byte	0x3
+	.byte	0
+	.uleb128 0xc
+	.4byte	.LASF331
+	.byte	0x17
+	.2byte	0x20e
+	.4byte	0x1069
+	.uleb128 0xc
+	.4byte	.LASF332
+	.byte	0x17
+	.2byte	0x20f
+	.4byte	0xfaa
+	.uleb128 0xc
+	.4byte	.LASF333
+	.byte	0x17
+	.2byte	0x210
+	.4byte	0x54
+	.uleb128 0xa
+	.4byte	0x9e
+	.4byte	0x10ad
+	.uleb128 0x11
+	.4byte	0xcf
+	.byte	0x5
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x109d
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+	.byte	0x9c
+	.4byte	0x3cf0
+	.uleb128 0x38
+	.4byte	0x3a5c
+	.4byte	.LLST34
+	.uleb128 0x40
+	.4byte	0x3a51
+	.uleb128 0x43
+	.4byte	0x3a67
+	.4byte	.LLST35
+	.uleb128 0x42
+	.4byte	0x3a72
+	.uleb128 0x46
+	.8byte	.LBB47
+	.8byte	.LBE47-.LBB47
+	.4byte	0x3c59
+	.uleb128 0x43
+	.4byte	0x3a84
+	.4byte	.LLST36
+	.byte	0
+	.uleb128 0x46
+	.8byte	.LBB48
+	.8byte	.LBE48-.LBB48
+	.4byte	0x3c78
+	.uleb128 0x43
+	.4byte	0x3a91
+	.4byte	.LLST37
+	.byte	0
+	.uleb128 0x46
+	.8byte	.LBB49
+	.8byte	.LBE49-.LBB49
+	.4byte	0x3cdc
+	.uleb128 0x40
+	.4byte	0x3a5c
+	.uleb128 0x40
+	.4byte	0x3a51
+	.uleb128 0x48
+	.8byte	.LBB50
+	.8byte	.LBE50-.LBB50
+	.uleb128 0x42
+	.4byte	0x3a67
+	.uleb128 0x42
+	.4byte	0x3a72
+	.uleb128 0x35
+	.8byte	.LVL71
+	.4byte	0x3d29
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC2
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR1
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x35
+	.8byte	.LVL68
+	.4byte	0x3d1e
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x68
+	.4byte	.LASF451
+	.4byte	.LASF451
+	.byte	0x8
+	.2byte	0x112
+	.uleb128 0x69
+	.4byte	.LASF452
+	.4byte	.LASF452
+	.byte	0x20
+	.byte	0x85
+	.uleb128 0x69
+	.4byte	.LASF453
+	.4byte	.LASF453
+	.byte	0x20
+	.byte	0x38
+	.uleb128 0x68
+	.4byte	.LASF454
+	.4byte	.LASF454
+	.byte	0x8
+	.2byte	0x16b
+	.uleb128 0x69
+	.4byte	.LASF455
+	.4byte	.LASF455
+	.byte	0x21
+	.byte	0xb
+	.uleb128 0x69
+	.4byte	.LASF456
+	.4byte	.LASF456
+	.byte	0x22
+	.byte	0x13
+	.uleb128 0x68
+	.4byte	.LASF457
+	.4byte	.LASF457
+	.byte	0x1a
+	.2byte	0x393
+	.byte	0
+	.section	.debug_abbrev,"",@progbits
+.Ldebug_abbrev0:
+	.uleb128 0x1
+	.uleb128 0x11
+	.byte	0x1
+	.uleb128 0x25
+	.uleb128 0xe
+	.uleb128 0x13
+	.uleb128 0xb
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x1b
+	.uleb128 0xe
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x10
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x2
+	.uleb128 0x16
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x24
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3e
+	.uleb128 0xb
+	.uleb128 0x3
+	.uleb128 0xe
+	.byte	0
+	.byte	0
+	.uleb128 0x4
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.byte	0
+	.byte	0
+	.uleb128 0x5
+	.uleb128 0x24
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3e
+	.uleb128 0xb
+	.uleb128 0x3
+	.uleb128 0x8
+	.byte	0
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+	.uleb128 0x6
+	.uleb128 0x16
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
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+	.uleb128 0x7
+	.uleb128 0x26
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.uleb128 0xf
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+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
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+	.uleb128 0x9
+	.uleb128 0xf
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0xa
+	.uleb128 0x1
+	.byte	0x1
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0x21
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0xc
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.byte	0
+	.byte	0
+	.uleb128 0xd
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
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+	.byte	0
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+	.uleb128 0xe
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0xf
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0xb
+	.byte	0
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+	.uleb128 0x10
+	.uleb128 0x26
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x11
+	.uleb128 0x21
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2f
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x12
+	.uleb128 0x15
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+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
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+	.uleb128 0x13
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x14
+	.uleb128 0x13
+	.byte	0x1
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+	.uleb128 0x5
+	.uleb128 0x3a
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+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
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+	.uleb128 0x15
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0x5
+	.byte	0
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+	.uleb128 0x16
+	.uleb128 0x21
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2f
+	.uleb128 0x5
+	.byte	0
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+	.uleb128 0x17
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
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+	.uleb128 0x5
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x18
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0xb
+	.uleb128 0x5
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x19
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.byte	0
+	.byte	0
+	.uleb128 0x1a
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x1b
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x1c
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x1d
+	.uleb128 0x16
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
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+	.uleb128 0x1e
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0xb
+	.byte	0
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+	.uleb128 0x1f
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0xb
+	.uleb128 0x5
+	.uleb128 0x3a
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+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
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+	.uleb128 0x20
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
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+	.uleb128 0x3b
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+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0x5
+	.byte	0
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+	.uleb128 0x21
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
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+	.uleb128 0xb
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+	.uleb128 0x5
+	.uleb128 0x49
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+	.uleb128 0x5
+	.byte	0
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+	.uleb128 0x3a
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+	.uleb128 0x23
+	.uleb128 0x28
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+	.uleb128 0x27
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+	.uleb128 0x3f
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+	.uleb128 0x2117
+	.uleb128 0x19
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+	.uleb128 0x4109
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+	.uleb128 0x18
+	.uleb128 0x2111
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+	.byte	0
+	.uleb128 0x35
+	.uleb128 0x4109
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x36
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x37
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0x5
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x38
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x39
+	.uleb128 0x4109
+	.byte	0
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x2115
+	.uleb128 0x19
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x3a
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x20
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x3b
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x3c
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x3d
+	.uleb128 0x4109
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x2115
+	.uleb128 0x19
+	.byte	0
+	.byte	0
+	.uleb128 0x3e
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x52
+	.uleb128 0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0x5
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x40
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x41
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x42
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x43
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.uleb128 0xa
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x47
+	.uleb128 0xa
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.byte	0
+	.byte	0
+	.uleb128 0x48
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.byte	0
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x4109
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x4a
+	.uleb128 0x410a
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2111
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x4b
+	.uleb128 0x4109
+	.byte	0
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x4c
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x4d
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x4e
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x4f
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x34
+	.uleb128 0x19
+	.uleb128 0x1c
+	.uleb128 0xe
+	.byte	0
+	.byte	0
+	.uleb128 0x50
+	.uleb128 0xa
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x51
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x52
+	.uleb128 0xb
+	.byte	0x1
+	.byte	0
+	.byte	0
+	.uleb128 0x53
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x54
+	.uleb128 0x4109
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.byte	0
+	.byte	0
+	.uleb128 0x55
+	.uleb128 0x4109
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x2115
+	.uleb128 0x19
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x56
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x20
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x57
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x58
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x59
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x5a
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x5c
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x5d
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x5e
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x5f
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x60
+	.uleb128 0xa
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x61
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x34
+	.uleb128 0x19
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x62
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x63
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x64
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x1c
+	.uleb128 0x6
+	.byte	0
+	.byte	0
+	.uleb128 0x65
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x1c
+	.uleb128 0xd
+	.byte	0
+	.byte	0
+	.uleb128 0x66
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x20
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x67
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x68
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.byte	0
+	.section	.debug_loc,"",@progbits
+.Ldebug_loc0:
+.LLST32:
+	.8byte	.LVL52
+	.8byte	.LVL53-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL53-1
+	.8byte	.LVL60
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL60
+	.8byte	.LFE283
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST33:
+	.8byte	.LVL54
+	.8byte	.LVL55
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL55
+	.8byte	.LVL60
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST189:
+	.8byte	.LVL331
+	.8byte	.LVL332
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL332
+	.8byte	.LVL335
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL335
+	.8byte	.LVL336-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL336-1
+	.8byte	.LFE282
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST190:
+	.8byte	.LVL331
+	.8byte	.LVL336-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL336-1
+	.8byte	.LVL336
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL336
+	.8byte	.LFE282
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST191:
+	.8byte	.LVL331
+	.8byte	.LVL336-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL336-1
+	.8byte	.LVL336
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	.LVL336
+	.8byte	.LFE282
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST192:
+	.8byte	.LVL331
+	.8byte	.LVL334
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xea
+	.byte	0x9f
+	.8byte	.LVL335
+	.8byte	.LFE282
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xea
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST193:
+	.8byte	.LVL333
+	.8byte	.LVL334
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST22:
+	.8byte	.LVL40
+	.8byte	.LVL41-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL41-1
+	.8byte	.LVL44
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL44
+	.8byte	.LVL45-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL45-1
+	.8byte	.LFE280
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST23:
+	.8byte	.LVL40
+	.8byte	.LVL41-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL41-1
+	.8byte	.LVL44
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL44
+	.8byte	.LVL45-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL45-1
+	.8byte	.LFE280
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST24:
+	.8byte	.LVL40
+	.8byte	.LVL41-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL41-1
+	.8byte	.LVL43
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL43
+	.8byte	.LVL45-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL45-1
+	.8byte	.LFE280
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST25:
+	.8byte	.LVL40
+	.8byte	.LVL41-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL41-1
+	.8byte	.LVL43
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL43
+	.8byte	.LVL45-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL45-1
+	.8byte	.LFE280
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST26:
+	.8byte	.LVL41
+	.8byte	.LVL42
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST27:
+	.8byte	.LVL46
+	.8byte	.LVL47-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL47-1
+	.8byte	.LVL50
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL50
+	.8byte	.LVL51-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL51-1
+	.8byte	.LFE279
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST28:
+	.8byte	.LVL46
+	.8byte	.LVL47-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL47-1
+	.8byte	.LVL50
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL50
+	.8byte	.LVL51-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL51-1
+	.8byte	.LFE279
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST29:
+	.8byte	.LVL46
+	.8byte	.LVL47-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL47-1
+	.8byte	.LVL49
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL49
+	.8byte	.LVL51-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL51-1
+	.8byte	.LFE279
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST30:
+	.8byte	.LVL46
+	.8byte	.LVL47-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL47-1
+	.8byte	.LVL49
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL49
+	.8byte	.LVL51-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL51-1
+	.8byte	.LFE279
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST31:
+	.8byte	.LVL47
+	.8byte	.LVL48
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST67:
+	.8byte	.LVL119
+	.8byte	.LVL126-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL126-1
+	.8byte	.LVL170
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL170
+	.8byte	.LVL172
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL172
+	.8byte	.LVL174-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL174-1
+	.8byte	.LVL283
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL283
+	.8byte	.LVL284
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL284
+	.8byte	.LFE278
+	.2byte	0x1
+	.byte	0x69
+	.8byte	0
+	.8byte	0
+.LLST68:
+	.8byte	.LVL119
+	.8byte	.LVL120
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL120
+	.8byte	.LVL127
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL127
+	.8byte	.LVL129
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL129
+	.8byte	.LVL132
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL132
+	.8byte	.LVL133
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL133
+	.8byte	.LVL137
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL137
+	.8byte	.LVL142
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL142
+	.8byte	.LVL145
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL145
+	.8byte	.LVL172
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL172
+	.8byte	.LVL183
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL183
+	.8byte	.LVL189
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL189
+	.8byte	.LVL191
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL191
+	.8byte	.LVL283
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL283
+	.8byte	.LVL285
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL285
+	.8byte	.LFE278
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST69:
+	.8byte	.LVL119
+	.8byte	.LVL124
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL124
+	.8byte	.LVL171
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 200
+	.8byte	.LVL171
+	.8byte	.LVL172
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 88
+	.8byte	.LVL172
+	.8byte	.LFE278
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 200
+	.8byte	0
+	.8byte	0
+.LLST70:
+	.8byte	.LVL119
+	.8byte	.LVL126-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL126-1
+	.8byte	.LVL127
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL127
+	.8byte	.LVL129
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL129
+	.8byte	.LVL132
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL132
+	.8byte	.LVL133
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL133
+	.8byte	.LVL138
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL138
+	.8byte	.LVL142
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL142
+	.8byte	.LVL145
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL145
+	.8byte	.LVL172
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL172
+	.8byte	.LVL174-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL174-1
+	.8byte	.LVL283
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL283
+	.8byte	.LVL285
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL285
+	.8byte	.LFE278
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST71:
+	.8byte	.LVL123
+	.8byte	.LVL126-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL172
+	.8byte	.LVL174-1
+	.2byte	0x1
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+	.8byte	.LVL283
+	.8byte	.LVL285
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST72:
+	.8byte	.LVL121
+	.8byte	.LVL132
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL132
+	.8byte	.LVL133
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL133
+	.8byte	.LVL169
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL172
+	.8byte	.LFE278
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST73:
+	.8byte	.LVL122
+	.8byte	.LVL126-1
+	.2byte	0x1
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+	.8byte	.LVL172
+	.8byte	.LVL174-1
+	.2byte	0x1
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+	.8byte	.LVL283
+	.8byte	.LVL285
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST74:
+	.8byte	.LVL125
+	.8byte	.LVL126-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL126-1
+	.8byte	.LVL127
+	.2byte	0x1
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+	.8byte	.LVL129
+	.8byte	.LVL132
+	.2byte	0x1
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+	.8byte	.LVL133
+	.8byte	.LVL141
+	.2byte	0x1
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+	.8byte	.LVL142
+	.8byte	.LVL144
+	.2byte	0x1
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+	.8byte	.LVL145
+	.8byte	.LVL147
+	.2byte	0x1
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+	.8byte	.LVL148
+	.8byte	.LVL169
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST75:
+	.8byte	.LVL125
+	.8byte	.LVL127
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 200
+	.8byte	.LVL129
+	.8byte	.LVL132
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 200
+	.8byte	.LVL133
+	.8byte	.LVL141
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 200
+	.8byte	.LVL142
+	.8byte	.LVL144
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 200
+	.8byte	.LVL145
+	.8byte	.LVL147
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 200
+	.8byte	.LVL148
+	.8byte	.LVL169
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 200
+	.8byte	0
+	.8byte	0
+.LLST76:
+	.8byte	.LVL125
+	.8byte	.LVL126-1
+	.2byte	0x1
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+	.8byte	.LVL126-1
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+	.2byte	0x1
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+	.2byte	0x1
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+	.8byte	.LVL133
+	.8byte	.LVL141
+	.2byte	0x1
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+	.8byte	.LVL144
+	.2byte	0x1
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+	.2byte	0x1
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+	.8byte	.LVL169
+	.2byte	0x1
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+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL126
+	.8byte	.LVL127
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 200
+	.8byte	.LVL129
+	.8byte	.LVL132
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 200
+	.8byte	.LVL133
+	.8byte	.LVL141
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 200
+	.8byte	.LVL142
+	.8byte	.LVL144
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 200
+	.8byte	.LVL145
+	.8byte	.LVL147
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 200
+	.8byte	.LVL148
+	.8byte	.LVL169
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 200
+	.8byte	0
+	.8byte	0
+.LLST78:
+	.8byte	.LVL131
+	.8byte	.LVL132
+	.2byte	0x1
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+	.8byte	.LVL134
+	.2byte	0x1
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+	.8byte	.LVL134
+	.8byte	.LVL139
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL142
+	.8byte	.LVL144
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST79:
+	.8byte	.LVL136
+	.8byte	.LVL138
+	.2byte	0x1
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+	.8byte	.LVL140
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
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+	.8byte	.LVL141
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL142
+	.8byte	.LVL143
+	.2byte	0x1
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+	.8byte	.LVL147
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL148
+	.8byte	.LVL162
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL162
+	.8byte	.LVL163
+	.2byte	0x3
+	.byte	0x8a
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL164
+	.8byte	.LVL167
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	0
+	.8byte	0
+.LLST80:
+	.8byte	.LVL126
+	.8byte	.LVL127
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL129
+	.8byte	.LVL132
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL133
+	.8byte	.LVL135
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
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+	.8byte	.LVL136
+	.2byte	0x1
+	.byte	0x50
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+	.8byte	.LVL141
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
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+	.8byte	.LVL147
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
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+	.8byte	.LVL162
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL164
+	.8byte	.LVL169
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST81:
+	.8byte	.LVL146
+	.8byte	.LVL147
+	.2byte	0x1
+	.byte	0x68
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+	.2byte	0x1
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+	.8byte	.LVL164
+	.8byte	.LVL169
+	.2byte	0x1
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST82:
+	.8byte	.LVL146
+	.8byte	.LVL147
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL148
+	.8byte	.LVL162
+	.2byte	0x1
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+	.8byte	.LVL164
+	.8byte	.LVL169
+	.2byte	0x1
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+	.8byte	0
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+.LLST83:
+	.8byte	.LVL146
+	.8byte	.LVL147
+	.2byte	0x1
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+	.8byte	.LVL148
+	.8byte	.LVL162
+	.2byte	0x1
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+	.8byte	.LVL164
+	.8byte	.LVL169
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST84:
+	.8byte	.LVL146
+	.8byte	.LVL147
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+	.byte	0x23
+	.uleb128 0x1038
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+	.8byte	.LVL217
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+	.sleb128 0
+	.byte	0x9
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+	.8byte	.LVL210
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+	.8byte	.LVL216
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+	.8byte	.LVL218
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+	.8byte	.LVL220
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+	.8byte	.LVL224
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+	.8byte	.LVL226
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+	.8byte	.LVL227
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+	.8byte	.LVL229
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+	.8byte	.LVL230
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+	.8byte	.LVL231
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+	.8byte	.LVL232
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+	.8byte	.LVL233
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+	.8byte	.LVL234
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+	.8byte	.LVL235
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+	.8byte	.LVL239
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+	.8byte	.LVL241
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+	.2byte	0x5
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+	.8byte	.LVL242
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+	.2byte	0x3
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+	.8byte	.LFE278
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+	.8byte	.LVL243
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+	.8byte	.LVL244
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+	.8byte	.LVL248
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+	.8byte	.LVL250
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+	.sleb128 196
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+	.8byte	.LVL251
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+	.8byte	.LVL255
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+	.2byte	0x6
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+	.8byte	.LVL257
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+	.8byte	.LVL258
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+	.8byte	.LVL259
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+	.8byte	.LVL263
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+	.8byte	.LVL265
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+	.8byte	.LVL266
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+	.8byte	.LVL267
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+	.8byte	.LVL268
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+	.8byte	.LVL271
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+	.8byte	.LVL280
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+	.8byte	.LVL293
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+	.8byte	.LVL302
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+	.8byte	.LVL300
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+	.8byte	.LVL301
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+	.8byte	.LVL304
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+	.8byte	.LVL304
+	.8byte	.LVL307
+	.2byte	0x6
+	.byte	0xc
+	.4byte	0x186a0
+	.byte	0x9f
+	.8byte	.LVL307
+	.8byte	.LVL311
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL311
+	.8byte	.LVL313
+	.2byte	0x6
+	.byte	0xc
+	.4byte	0x186a0
+	.byte	0x9f
+	.8byte	.LVL313
+	.8byte	.LVL320
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL320
+	.8byte	.LVL321
+	.2byte	0x3
+	.byte	0x84
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL321
+	.8byte	.LVL323
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL324
+	.8byte	.LVL326
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL326
+	.8byte	.LVL327
+	.2byte	0x3
+	.byte	0x84
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL327
+	.8byte	.LVL328
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL304
+	.8byte	.LVL323
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL324
+	.8byte	.LVL328
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL306
+	.8byte	.LVL323
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL324
+	.8byte	.LVL328
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL308
+	.8byte	.LVL310
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL318
+	.8byte	.LVL319
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL309
+	.8byte	.LVL318
+	.2byte	0x4
+	.byte	0xa
+	.2byte	0x200
+	.byte	0x9f
+	.8byte	.LVL324
+	.8byte	.LVL328
+	.2byte	0x4
+	.byte	0xa
+	.2byte	0x200
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL311
+	.8byte	.LVL318
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL324
+	.8byte	.LVL328
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL312
+	.8byte	.LVL318
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL324
+	.8byte	.LVL328
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL314
+	.8byte	.LVL316
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL324
+	.8byte	.LVL325
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL315
+	.8byte	.LVL318
+	.2byte	0x4
+	.byte	0xa
+	.2byte	0x400
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL317
+	.8byte	.LVL318
+	.2byte	0x4
+	.byte	0x40
+	.byte	0x3e
+	.byte	0x24
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL74
+	.8byte	.LVL77-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL77-1
+	.8byte	.LVL77
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL77
+	.8byte	.LVL80-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL80-1
+	.8byte	.LVL94
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL94
+	.8byte	.LVL117
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL117
+	.8byte	.LVL118
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL118
+	.8byte	.LFE270
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST39:
+	.8byte	.LVL74
+	.8byte	.LVL77-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL77-1
+	.8byte	.LVL77
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL77
+	.8byte	.LVL78
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL78
+	.8byte	.LVL96
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL96
+	.8byte	.LVL117
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL117
+	.8byte	.LFE270
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST40:
+	.8byte	.LVL74
+	.8byte	.LVL77-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL77-1
+	.8byte	.LVL77
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	.LVL77
+	.8byte	.LVL80-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL80-1
+	.8byte	.LVL96
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL96
+	.8byte	.LVL117
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	.LVL117
+	.8byte	.LFE270
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST41:
+	.8byte	.LVL74
+	.8byte	.LVL77-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL77-1
+	.8byte	.LVL77
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL77
+	.8byte	.LVL80-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL80-1
+	.8byte	.LVL95
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL95
+	.8byte	.LVL117
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL117
+	.8byte	.LFE270
+	.2byte	0x1
+	.byte	0x53
+	.8byte	0
+	.8byte	0
+.LLST42:
+	.8byte	.LVL76
+	.8byte	.LVL77-1
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL77
+	.8byte	.LVL80-1
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL117
+	.8byte	.LFE270
+	.2byte	0x1
+	.byte	0x54
+	.8byte	0
+	.8byte	0
+.LLST43:
+	.8byte	.LVL74
+	.8byte	.LVL98
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL99
+	.8byte	.LVL100
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL100
+	.8byte	.LVL111
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL112
+	.8byte	.LFE270
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST44:
+	.8byte	.LVL75
+	.8byte	.LVL77-1
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL77
+	.8byte	.LVL80-1
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL117
+	.8byte	.LFE270
+	.2byte	0x1
+	.byte	0x54
+	.8byte	0
+	.8byte	0
+.LLST45:
+	.8byte	.LVL79
+	.8byte	.LVL80-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL80-1
+	.8byte	.LVL95
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL95
+	.8byte	.LVL96
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL96
+	.8byte	.LVL97
+	.2byte	0x6
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x31
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	.LVL100
+	.8byte	.LVL111
+	.2byte	0x6
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x31
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	.LVL112
+	.8byte	.LVL117
+	.2byte	0x6
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x31
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST46:
+	.8byte	.LVL79
+	.8byte	.LVL96
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL96
+	.8byte	.LVL97
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	.LVL100
+	.8byte	.LVL111
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	.LVL112
+	.8byte	.LVL117
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST47:
+	.8byte	.LVL79
+	.8byte	.LVL97
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL100
+	.8byte	.LVL101
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL101
+	.8byte	.LVL111
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL112
+	.8byte	.LVL117
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST48:
+	.8byte	.LVL79
+	.8byte	.LVL94
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL94
+	.8byte	.LVL97
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL100
+	.8byte	.LVL111
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL112
+	.8byte	.LVL117
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL81
+	.8byte	.LVL82
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL82
+	.8byte	.LVL97
+	.2byte	0x1
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+	.8byte	.LVL100
+	.8byte	.LVL111
+	.2byte	0x1
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+	.8byte	.LVL112
+	.8byte	.LVL117
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL84
+	.8byte	.LVL85
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL85
+	.8byte	.LVL97
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL100
+	.8byte	.LVL111
+	.2byte	0x1
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+	.8byte	.LVL112
+	.8byte	.LVL117
+	.2byte	0x1
+	.byte	0x69
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL84
+	.8byte	.LVL97
+	.2byte	0x1
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+	.8byte	.LVL100
+	.8byte	.LVL111
+	.2byte	0x1
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+	.8byte	.LVL112
+	.8byte	.LVL116
+	.2byte	0x1
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+	.8byte	.LVL116
+	.8byte	.LVL117
+	.2byte	0x3
+	.byte	0x86
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL115
+	.8byte	.LVL117
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL84
+	.8byte	.LVL96
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL96
+	.8byte	.LVL97
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL100
+	.8byte	.LVL108
+	.2byte	0x1
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+	.8byte	.LVL108
+	.8byte	.LVL109
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL109
+	.8byte	.LVL111
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL112
+	.8byte	.LVL113
+	.2byte	0x1
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+	.8byte	.LVL113
+	.8byte	.LVL117
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL86
+	.8byte	.LVL93
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL86
+	.8byte	.LVL93
+	.2byte	0x1
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+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL86
+	.8byte	.LVL91
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
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+	.8byte	.LVL92
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL86
+	.8byte	.LVL97
+	.2byte	0x6
+	.byte	0x11
+	.sleb128 -16776704
+	.byte	0x9f
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+	.8byte	.LVL111
+	.2byte	0x6
+	.byte	0x11
+	.sleb128 -16776704
+	.byte	0x9f
+	.8byte	.LVL112
+	.8byte	.LVL117
+	.2byte	0x6
+	.byte	0x11
+	.sleb128 -16776704
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL87
+	.8byte	.LVL97
+	.2byte	0x5
+	.byte	0x11
+	.sleb128 -65535
+	.byte	0x9f
+	.8byte	.LVL100
+	.8byte	.LVL111
+	.2byte	0x5
+	.byte	0x11
+	.sleb128 -65535
+	.byte	0x9f
+	.8byte	.LVL112
+	.8byte	.LVL117
+	.2byte	0x5
+	.byte	0x11
+	.sleb128 -65535
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL88
+	.8byte	.LVL97
+	.2byte	0x3
+	.byte	0x8
+	.byte	0xfa
+	.byte	0x9f
+	.8byte	.LVL100
+	.8byte	.LVL111
+	.2byte	0x3
+	.byte	0x8
+	.byte	0xfa
+	.byte	0x9f
+	.8byte	.LVL112
+	.8byte	.LVL117
+	.2byte	0x3
+	.byte	0x8
+	.byte	0xfa
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+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL89
+	.8byte	.LVL97
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+	.byte	0x9f
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+	.8byte	.LVL111
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+	.byte	0x30
+	.byte	0x9f
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+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL90
+	.8byte	.LVL97
+	.2byte	0x6
+	.byte	0xc
+	.4byte	0x10001
+	.byte	0x9f
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+	.8byte	.LVL111
+	.2byte	0x6
+	.byte	0xc
+	.4byte	0x10001
+	.byte	0x9f
+	.8byte	.LVL112
+	.8byte	.LVL117
+	.2byte	0x6
+	.byte	0xc
+	.4byte	0x10001
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL93
+	.8byte	.LVL97
+	.2byte	0x6
+	.byte	0xc
+	.4byte	0x10001
+	.byte	0x9f
+	.8byte	.LVL100
+	.8byte	.LVL111
+	.2byte	0x6
+	.byte	0xc
+	.4byte	0x10001
+	.byte	0x9f
+	.8byte	.LVL112
+	.8byte	.LVL117
+	.2byte	0x6
+	.byte	0xc
+	.4byte	0x10001
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL102
+	.8byte	.LVL104
+	.2byte	0x1
+	.byte	0x50
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+	.8byte	.LVL105
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 260
+	.8byte	.LVL105
+	.8byte	.LVL106
+	.2byte	0x6
+	.byte	0x83
+	.sleb128 0
+	.byte	0x6
+	.byte	0x23
+	.uleb128 0x104
+	.8byte	.LVL106
+	.8byte	.LVL110
+	.2byte	0x8
+	.byte	0x84
+	.sleb128 -1
+	.byte	0x11
+	.sleb128 -65536
+	.byte	0x21
+	.byte	0x9f
+	.8byte	.LVL112
+	.8byte	.LVL117
+	.2byte	0x8
+	.byte	0x84
+	.sleb128 -1
+	.byte	0x11
+	.sleb128 -65536
+	.byte	0x21
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST64:
+	.8byte	.LVL103
+	.8byte	.LVL110
+	.2byte	0x6
+	.byte	0xc
+	.4byte	0x10001
+	.byte	0x9f
+	.8byte	.LVL112
+	.8byte	.LVL117
+	.2byte	0x6
+	.byte	0xc
+	.4byte	0x10001
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST65:
+	.8byte	.LVL110
+	.8byte	.LVL111
+	.2byte	0x4
+	.byte	0x40
+	.byte	0x3c
+	.byte	0x24
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST66:
+	.8byte	.LVL114
+	.8byte	.LVL117
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST5:
+	.8byte	.LVL9
+	.8byte	.LVL10-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL10-1
+	.8byte	.LFE268
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST6:
+	.8byte	.LVL9
+	.8byte	.LVL10-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL10-1
+	.8byte	.LVL13
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL15
+	.8byte	.LVL20
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL20
+	.8byte	.LVL21
+	.2byte	0x4
+	.byte	0x83
+	.sleb128 128
+	.byte	0x9f
+	.8byte	.LVL21
+	.8byte	.LVL22
+	.2byte	0x3
+	.byte	0x70
+	.sleb128 16
+	.byte	0x9f
+	.8byte	.LVL31
+	.8byte	.LVL33
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST7:
+	.8byte	.LVL9
+	.8byte	.LVL10-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL10-1
+	.8byte	.LVL39
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL39
+	.8byte	.LFE268
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST8:
+	.8byte	.LVL9
+	.8byte	.LVL10-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL10-1
+	.8byte	.LVL13
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL13
+	.8byte	.LVL15
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL15
+	.8byte	.LVL17
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL17
+	.8byte	.LFE268
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST9:
+	.8byte	.LVL10
+	.8byte	.LVL11
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL11
+	.8byte	.LVL12
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL15
+	.8byte	.LVL38
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST10:
+	.8byte	.LVL10
+	.8byte	.LVL13
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL15
+	.8byte	.LVL18
+	.2byte	0x1
+	.byte	0x69
+	.8byte	0
+	.8byte	0
+.LLST11:
+	.8byte	.LVL10
+	.8byte	.LVL14
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL15
+	.8byte	.LVL37
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL37
+	.8byte	.LVL38
+	.2byte	0x3
+	.byte	0x9
+	.byte	0x92
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST12:
+	.8byte	.LVL16
+	.8byte	.LVL18
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL19
+	.8byte	.LVL24
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL24
+	.8byte	.LVL26
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL26
+	.8byte	.LVL32
+	.2byte	0x8
+	.byte	0x85
+	.sleb128 0
+	.byte	0x8a
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x9f
+	.8byte	.LVL33
+	.8byte	.LVL38
+	.2byte	0x8
+	.byte	0x85
+	.sleb128 0
+	.byte	0x8a
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST13:
+	.8byte	.LVL16
+	.8byte	.LVL17
+	.2byte	0x5
+	.byte	0x87
+	.sleb128 0
+	.byte	0x32
+	.byte	0x26
+	.byte	0x9f
+	.8byte	.LVL17
+	.8byte	.LVL18
+	.2byte	0x6
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x32
+	.byte	0x26
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST14:
+	.8byte	.LVL10
+	.8byte	.LVL13
+	.2byte	0x4
+	.byte	0xa
+	.2byte	0x2710
+	.byte	0x9f
+	.8byte	.LVL15
+	.8byte	.LVL18
+	.2byte	0x4
+	.byte	0xa
+	.2byte	0x2710
+	.byte	0x9f
+	.8byte	.LVL19
+	.8byte	.LVL35
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL35
+	.8byte	.LVL36
+	.2byte	0x3
+	.byte	0x88
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL36
+	.8byte	.LVL38
+	.2byte	0x1
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST17:
+	.8byte	.LVL21
+	.8byte	.LVL38
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST15:
+	.8byte	.LVL23
+	.8byte	.LVL38
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST18:
+	.8byte	.LVL24
+	.8byte	.LVL26
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL26
+	.8byte	.LVL32
+	.2byte	0x6
+	.byte	0x8a
+	.sleb128 0
+	.byte	0x85
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.8byte	.LVL33
+	.8byte	.LVL38
+	.2byte	0x6
+	.byte	0x8a
+	.sleb128 0
+	.byte	0x85
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST16:
+	.8byte	.LVL25
+	.8byte	.LVL38
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST19:
+	.8byte	.LVL27
+	.8byte	.LVL29
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL33
+	.8byte	.LVL34
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST20:
+	.8byte	.LVL28
+	.8byte	.LVL33
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST21:
+	.8byte	.LVL30
+	.8byte	.LVL33
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST2:
+	.8byte	.LVL4
+	.8byte	.LVL7
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL7
+	.8byte	.LFE263
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST3:
+	.8byte	.LVL4
+	.8byte	.LVL5
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL5
+	.8byte	.LFE263
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST4:
+	.8byte	.LVL4
+	.8byte	.LVL8
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL8
+	.8byte	.LFE263
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST0:
+	.8byte	.LVL0
+	.8byte	.LVL1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1
+	.8byte	.LFE262
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST1:
+	.8byte	.LVL0
+	.8byte	.LVL2
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL2
+	.8byte	.LFE262
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST34:
+	.8byte	.LVL61
+	.8byte	.LVL62
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL62
+	.8byte	.LVL64
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL64
+	.8byte	.LVL66
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL66
+	.8byte	.LVL72
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL72
+	.8byte	.LFE286
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST35:
+	.8byte	.LVL62
+	.8byte	.LVL68
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL68
+	.8byte	.LVL69
+	.2byte	0x3
+	.byte	0x84
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL69
+	.8byte	.LVL73
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST36:
+	.8byte	.LVL63
+	.8byte	.LVL65
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL66
+	.8byte	.LVL67
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST37:
+	.8byte	.LVL64
+	.8byte	.LVL66
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+	.section	.debug_aranges,"",@progbits
+	.4byte	0xcc
+	.2byte	0x2
+	.4byte	.Ldebug_info0
+	.byte	0x8
+	.byte	0
+	.2byte	0
+	.2byte	0
+	.8byte	.LFB262
+	.8byte	.LFE262-.LFB262
+	.8byte	.LFB263
+	.8byte	.LFE263-.LFB263
+	.8byte	.LFB268
+	.8byte	.LFE268-.LFB268
+	.8byte	.LFB280
+	.8byte	.LFE280-.LFB280
+	.8byte	.LFB279
+	.8byte	.LFE279-.LFB279
+	.8byte	.LFB283
+	.8byte	.LFE283-.LFB283
+	.8byte	.LFB286
+	.8byte	.LFE286-.LFB286
+	.8byte	.LFB270
+	.8byte	.LFE270-.LFB270
+	.8byte	.LFB278
+	.8byte	.LFE278-.LFB278
+	.8byte	.LFB277
+	.8byte	.LFE277-.LFB277
+	.8byte	.LFB282
+	.8byte	.LFE282-.LFB282
+	.8byte	0
+	.8byte	0
+	.section	.debug_ranges,"",@progbits
+.Ldebug_ranges0:
+	.8byte	.LBB32
+	.8byte	.LBE32
+	.8byte	.LBB35
+	.8byte	.LBE35
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB33
+	.8byte	.LBE33
+	.8byte	.LBB37
+	.8byte	.LBE37
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB68
+	.8byte	.LBE68
+	.8byte	.LBB88
+	.8byte	.LBE88
+	.8byte	.LBB89
+	.8byte	.LBE89
+	.8byte	.LBB90
+	.8byte	.LBE90
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB77
+	.8byte	.LBE77
+	.8byte	.LBB78
+	.8byte	.LBE78
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB80
+	.8byte	.LBE80
+	.8byte	.LBB81
+	.8byte	.LBE81
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB82
+	.8byte	.LBE82
+	.8byte	.LBB83
+	.8byte	.LBE83
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB173
+	.8byte	.LBE173
+	.8byte	.LBB174
+	.8byte	.LBE174
+	.8byte	.LBB175
+	.8byte	.LBE175
+	.8byte	.LBB176
+	.8byte	.LBE176
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB177
+	.8byte	.LBE177
+	.8byte	.LBB203
+	.8byte	.LBE203
+	.8byte	.LBB204
+	.8byte	.LBE204
+	.8byte	.LBB205
+	.8byte	.LBE205
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB179
+	.8byte	.LBE179
+	.8byte	.LBB198
+	.8byte	.LBE198
+	.8byte	.LBB199
+	.8byte	.LBE199
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB181
+	.8byte	.LBE181
+	.8byte	.LBB193
+	.8byte	.LBE193
+	.8byte	.LBB194
+	.8byte	.LBE194
+	.8byte	.LBB195
+	.8byte	.LBE195
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB183
+	.8byte	.LBE183
+	.8byte	.LBB185
+	.8byte	.LBE185
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB206
+	.8byte	.LBE206
+	.8byte	.LBB291
+	.8byte	.LBE291
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB208
+	.8byte	.LBE208
+	.8byte	.LBB286
+	.8byte	.LBE286
+	.8byte	.LBB287
+	.8byte	.LBE287
+	.8byte	.LBB288
+	.8byte	.LBE288
+	.8byte	.LBB289
+	.8byte	.LBE289
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB229
+	.8byte	.LBE229
+	.8byte	.LBB230
+	.8byte	.LBE230
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB231
+	.8byte	.LBE231
+	.8byte	.LBB232
+	.8byte	.LBE232
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB249
+	.8byte	.LBE249
+	.8byte	.LBB250
+	.8byte	.LBE250
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB255
+	.8byte	.LBE255
+	.8byte	.LBB256
+	.8byte	.LBE256
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB259
+	.8byte	.LBE259
+	.8byte	.LBB260
+	.8byte	.LBE260
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB264
+	.8byte	.LBE264
+	.8byte	.LBB265
+	.8byte	.LBE265
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB270
+	.8byte	.LBE270
+	.8byte	.LBB271
+	.8byte	.LBE271
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB304
+	.8byte	.LBE304
+	.8byte	.LBB305
+	.8byte	.LBE305
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB306
+	.8byte	.LBE306
+	.8byte	.LBB318
+	.8byte	.LBE318
+	.8byte	0
+	.8byte	0
+	.8byte	.LFB262
+	.8byte	.LFE262
+	.8byte	.LFB263
+	.8byte	.LFE263
+	.8byte	.LFB268
+	.8byte	.LFE268
+	.8byte	.LFB280
+	.8byte	.LFE280
+	.8byte	.LFB279
+	.8byte	.LFE279
+	.8byte	.LFB283
+	.8byte	.LFE283
+	.8byte	.LFB286
+	.8byte	.LFE286
+	.8byte	.LFB270
+	.8byte	.LFE270
+	.8byte	.LFB278
+	.8byte	.LFE278
+	.8byte	.LFB277
+	.8byte	.LFE277
+	.8byte	.LFB282
+	.8byte	.LFE282
+	.8byte	0
+	.8byte	0
+	.section	.debug_line,"",@progbits
+.Ldebug_line0:
+	.section	.debug_str,"MS",@progbits,1
+.LASF431:
+	.string	"rk3308s_secure_otp_prog_bit"
+.LASF30:
+	.string	"parent_platdata"
+.LASF447:
+	.string	"otp_cru_rst"
+.LASF100:
+	.string	"off_mem_rsvmap"
+.LASF183:
+	.string	"UCLASS_I2C_EEPROM"
+.LASF461:
+	.string	"jt_funcs"
+.LASF188:
+	.string	"UCLASS_IRQ"
+.LASF150:
+	.string	"initrd_start"
+.LASF182:
+	.string	"UCLASS_I2C"
+.LASF13:
+	.string	"sizetype"
+.LASF324:
+	.string	"net_hostname"
+.LASF54:
+	.string	"start"
+.LASF223:
+	.string	"UCLASS_SPI"
+.LASF309:
+	.string	"child"
+.LASF186:
+	.string	"UCLASS_I2S"
+.LASF346:
+	.string	"NETLOOP_RESTART"
+.LASF416:
+	.string	"otp_data"
+.LASF184:
+	.string	"UCLASS_I2C_GENERIC"
+.LASF196:
+	.string	"UCLASS_MOD_EXP"
+.LASF246:
+	.string	"UCLASS_IO_DOMAIN"
+.LASF265:
+	.string	"using_pre_serial"
+.LASF37:
+	.string	"uclass_priv"
+.LASF217:
+	.string	"UCLASS_RKNAND"
+.LASF159:
+	.string	"UCLASS_DEMO"
+.LASF393:
+	.string	"OTP_S"
+.LASF108:
+	.string	"ih_magic"
+.LASF46:
+	.string	"list_head"
+.LASF357:
+	.string	"child_pre_probe"
+.LASF411:
+	.string	"rockchip_secure_otp_ofdata_to_platdata"
+.LASF301:
+	.string	"pm_ctx_phys"
+.LASF163:
+	.string	"UCLASS_TEST_PROBE"
+.LASF307:
+	.string	"full_name"
+.LASF242:
+	.string	"UCLASS_KEY"
+.LASF80:
+	.string	"bi_intfreq"
+.LASF423:
+	.string	"__func__"
+.LASF11:
+	.string	"phys_addr_t"
+.LASF397:
+	.string	"write"
+.LASF237:
+	.string	"UCLASS_VIDEO_BRIDGE"
+.LASF5:
+	.string	"__u8"
+.LASF345:
+	.string	"NETLOOP_CONTINUE"
+.LASF226:
+	.string	"UCLASS_SPI_GENERIC"
+.LASF297:
+	.string	"malloc_base"
+.LASF463:
+	.string	"rockchip_secure_otp_exit"
+.LASF452:
+	.string	"dev_read_addr_ptr"
+.LASF56:
+	.string	"flash_info_t"
+.LASF201:
+	.string	"UCLASS_PANEL"
+.LASF125:
+	.string	"comp"
+.LASF120:
+	.string	"image_header_t"
+.LASF155:
+	.string	"state"
+.LASF176:
+	.string	"UCLASS_CROS_EC"
+.LASF74:
+	.string	"bi_dsp_freq"
+.LASF409:
+	.string	"rockchip_otp_ids"
+.LASF122:
+	.string	"image_start"
+.LASF161:
+	.string	"UCLASS_TEST_FDT"
+.LASF433:
+	.string	"rk3308_secure_otp_write"
+.LASF65:
+	.string	"bd_info"
+.LASF343:
+	.string	"uclass_id"
+.LASF112:
+	.string	"ih_load"
+.LASF391:
+	.string	"DECOM_GZIP"
+.LASF314:
+	.string	"__dtb_dt_spl_begin"
+.LASF383:
+	.string	"pre_remove"
+.LASF422:
+	.string	"delay"
+.LASF417:
+	.string	"secure_otp_read"
+.LASF7:
+	.string	"__u32"
+.LASF35:
+	.string	"priv"
+.LASF300:
+	.string	"cur_serial_dev"
+.LASF330:
+	.string	"net_tx_packet"
+.LASF241:
+	.string	"UCLASS_FG"
+.LASF329:
+	.string	"net_server_ip"
+.LASF462:
+	.string	"ofnode_union"
+.LASF337:
+	.string	"net_native_vlan"
+.LASF239:
+	.string	"UCLASS_VIDEO_CRTC"
+.LASF175:
+	.string	"UCLASS_CODEC"
+.LASF294:
+	.string	"env_buf"
+.LASF427:
+	.string	"word_addr"
+.LASF434:
+	.string	"rockchip_secure_otp_write_byte"
+.LASF21:
+	.string	"errno"
+.LASF15:
+	.string	"long int"
+.LASF388:
+	.string	"__invalid_size_argument_for_IOC"
+.LASF69:
+	.string	"bi_flashsize"
+.LASF29:
+	.string	"platdata"
+.LASF206:
+	.string	"UCLASS_PHY"
+.LASF414:
+	.string	"secure_otp_write"
+.LASF93:
+	.string	"IRQ_STACK_START_IN"
+.LASF104:
+	.string	"size_dt_strings"
+.LASF236:
+	.string	"UCLASS_VIDEO"
+.LASF278:
+	.string	"relocaddr"
+.LASF374:
+	.string	"dev_head"
+.LASF398:
+	.string	"ioctl"
+.LASF340:
+	.string	"net_boot_file_size"
+.LASF114:
+	.string	"ih_dcrc"
+.LASF79:
+	.string	"bi_ethspeed"
+.LASF158:
+	.string	"UCLASS_ROOT"
+.LASF44:
+	.string	"ide_bus_offset"
+.LASF327:
+	.string	"net_server_ethaddr"
+.LASF82:
+	.string	"bi_arch_number"
+.LASF3:
+	.string	"signed char"
+.LASF189:
+	.string	"UCLASS_KEYBOARD"
+.LASF18:
+	.string	"uint8_t"
+.LASF410:
+	.string	"_u_boot_list_2_driver_2_rockchip_secure_otp"
+.LASF362:
+	.string	"per_child_platdata_auto_alloc_size"
+.LASF45:
+	.string	"udevice"
+.LASF455:
+	.string	"udelay"
+.LASF116:
+	.string	"ih_arch"
+.LASF97:
+	.string	"totalsize"
+.LASF109:
+	.string	"ih_hcrc"
+.LASF280:
+	.string	"mon_len"
+.LASF399:
+	.string	"call"
+.LASF124:
+	.string	"load"
+.LASF231:
+	.string	"UCLASS_TPM"
+.LASF59:
+	.string	"lmb_property"
+.LASF102:
+	.string	"last_comp_version"
+.LASF0:
+	.string	"unsigned char"
+.LASF84:
+	.string	"bi_andr_version"
+.LASF157:
+	.string	"images"
+.LASF245:
+	.string	"UCLASS_DVFS"
+.LASF75:
+	.string	"bi_ddr_freq"
+.LASF190:
+	.string	"UCLASS_LED"
+.LASF111:
+	.string	"ih_size"
+.LASF39:
+	.string	"uclass_node"
+.LASF220:
+	.string	"UCLASS_SCMI_AGENT"
+.LASF400:
+	.string	"rockchip_otp_platdata"
+.LASF249:
+	.string	"UCLASS_MDIO"
+.LASF23:
+	.string	"_Bool"
+.LASF363:
+	.string	"property"
+.LASF420:
+	.string	"rockchip_secure_otp_capability"
+.LASF349:
+	.string	"net_state"
+.LASF365:
+	.string	"value"
+.LASF408:
+	.string	"rk3308_data"
+.LASF442:
+	.string	"rockchip_secure_otp_check_flag"
+.LASF185:
+	.string	"UCLASS_I2C_MUX"
+.LASF14:
+	.string	"char"
+.LASF25:
+	.string	"_binary_u_boot_bin_start"
+.LASF235:
+	.string	"UCLASS_USB_GADGET_GENERIC"
+.LASF347:
+	.string	"NETLOOP_SUCCESS"
+.LASF36:
+	.string	"uclass"
+.LASF371:
+	.string	"p_current"
+.LASF373:
+	.string	"uc_drv"
+.LASF344:
+	.string	"net_loop_state"
+.LASF43:
+	.string	"req_seq"
+.LASF310:
+	.string	"sibling"
+.LASF286:
+	.string	"dm_root_f"
+.LASF440:
+	.string	"word_size"
+.LASF174:
+	.string	"UCLASS_AMP"
+.LASF212:
+	.string	"UCLASS_PWRSEQ"
+.LASF366:
+	.string	"of_offset"
+.LASF140:
+	.string	"fit_hdr_fdt"
+.LASF338:
+	.string	"net_restart_wrap"
+.LASF326:
+	.string	"net_ethaddr"
+.LASF419:
+	.string	"chip_id"
+.LASF42:
+	.string	"flags"
+.LASF457:
+	.string	"malloc_simple"
+.LASF117:
+	.string	"ih_type"
+.LASF98:
+	.string	"off_dt_struct"
+.LASF70:
+	.string	"bi_flashoffset"
+.LASF339:
+	.string	"net_boot_file_name"
+.LASF376:
+	.string	"compatible"
+.LASF160:
+	.string	"UCLASS_TEST"
+.LASF110:
+	.string	"ih_time"
+.LASF271:
+	.string	"bus_clk"
+.LASF213:
+	.string	"UCLASS_RAM"
+.LASF449:
+	.string	"rk3308_spl_rockchip_otp_stop"
+.LASF179:
+	.string	"UCLASS_ETH"
+.LASF32:
+	.string	"node"
+.LASF121:
+	.string	"image_info"
+.LASF127:
+	.string	"arch"
+.LASF273:
+	.string	"mem_clk"
+.LASF450:
+	.string	"rk3308_spl_rockchip_otp_start"
+.LASF270:
+	.string	"cpu_clk"
+.LASF50:
+	.string	"select_hwpart"
+.LASF331:
+	.string	"net_rx_packets"
+.LASF368:
+	.string	"mem_malloc_start"
+.LASF443:
+	.string	"rockchip_secure_otp_wait_flag"
+.LASF92:
+	.string	"_datarelro_start_ofs"
+.LASF17:
+	.string	"ulong"
+.LASF113:
+	.string	"ih_ep"
+.LASF61:
+	.string	"lmb_region"
+.LASF381:
+	.string	"pre_probe"
+.LASF456:
+	.string	"printf"
+.LASF392:
+	.string	"DECOM_ZLIB"
+.LASF135:
+	.string	"fit_uname_os"
+.LASF76:
+	.string	"bi_bootflags"
+.LASF328:
+	.string	"net_ip"
+.LASF444:
+	.string	"rockchip_secure_otp_wait_status"
+.LASF292:
+	.string	"fdt_size"
+.LASF322:
+	.string	"net_dns_server"
+.LASF342:
+	.string	"net_ping_ip"
+.LASF63:
+	.string	"memory"
+.LASF95:
+	.string	"fdt_header"
+.LASF369:
+	.string	"mem_malloc_end"
+.LASF192:
+	.string	"UCLASS_MAILBOX"
+.LASF147:
+	.string	"rd_end"
+.LASF351:
+	.string	"bind"
+.LASF281:
+	.string	"irq_sp"
+.LASF152:
+	.string	"cmdline_start"
+.LASF269:
+	.string	"global_data"
+.LASF386:
+	.string	"per_device_auto_alloc_size"
+.LASF460:
+	.string	"/home2/chenp/work/u-boot"
+.LASF221:
+	.string	"UCLASS_SCSI"
+.LASF233:
+	.string	"UCLASS_USB_DEV_GENERIC"
+.LASF193:
+	.string	"UCLASS_MASS_STORAGE"
+.LASF1:
+	.string	"long unsigned int"
+.LASF168:
+	.string	"UCLASS_SIMPLE_BUS"
+.LASF311:
+	.string	"gd_t"
+.LASF323:
+	.string	"net_nis_domain"
+.LASF142:
+	.string	"fit_noffset_fdt"
+.LASF407:
+	.string	"rockchip_secure_otp_ops"
+.LASF348:
+	.string	"NETLOOP_FAIL"
+.LASF240:
+	.string	"UCLASS_WDT"
+.LASF259:
+	.string	"timer_reset_value"
+.LASF282:
+	.string	"start_addr_sp"
+.LASF71:
+	.string	"bi_sramstart"
+.LASF26:
+	.string	"_binary_u_boot_bin_end"
+.LASF283:
+	.string	"reloc_off"
+.LASF103:
+	.string	"boot_cpuid_phys"
+.LASF258:
+	.string	"lastinc"
+.LASF262:
+	.string	"tlb_fillptr"
+.LASF138:
+	.string	"fit_uname_rd"
+.LASF227:
+	.string	"UCLASS_SYSCON"
+.LASF173:
+	.string	"UCLASS_CPU"
+.LASF133:
+	.string	"fit_uname_cfg"
+.LASF222:
+	.string	"UCLASS_SERIAL"
+.LASF336:
+	.string	"net_our_vlan"
+.LASF302:
+	.string	"serial"
+.LASF352:
+	.string	"probe"
+.LASF171:
+	.string	"UCLASS_BLK"
+.LASF128:
+	.string	"image_info_t"
+.LASF167:
+	.string	"UCLASS_USB_EMUL"
+.LASF260:
+	.string	"tlb_addr"
+.LASF205:
+	.string	"UCLASS_PCI_GENERIC"
+.LASF123:
+	.string	"image_len"
+.LASF77:
+	.string	"bi_ip_addr"
+.LASF207:
+	.string	"UCLASS_PINCONFIG"
+.LASF229:
+	.string	"UCLASS_THERMAL"
+.LASF131:
+	.string	"legacy_hdr_os_copy"
+.LASF9:
+	.string	"long long int"
+.LASF389:
+	.string	"misc_mode"
+.LASF291:
+	.string	"new_fdt"
+.LASF22:
+	.string	"___strtok"
+.LASF341:
+	.string	"net_boot_file_expected_size_in_blocks"
+.LASF266:
+	.string	"enable"
+.LASF350:
+	.string	"of_match"
+.LASF200:
+	.string	"UCLASS_NVME"
+.LASF263:
+	.string	"tlb_emerg"
+.LASF129:
+	.string	"bootm_headers"
+.LASF55:
+	.string	"protect"
+.LASF232:
+	.string	"UCLASS_USB"
+.LASF378:
+	.string	"uclass_driver"
+.LASF243:
+	.string	"UCLASS_RC"
+.LASF295:
+	.string	"timebase_h"
+.LASF296:
+	.string	"timebase_l"
+.LASF177:
+	.string	"UCLASS_DISPLAY"
+.LASF335:
+	.string	"net_null_ethaddr"
+.LASF276:
+	.string	"env_valid"
+.LASF34:
+	.string	"parent"
+.LASF166:
+	.string	"UCLASS_PCI_EMUL"
+.LASF435:
+	.string	"rockchip_secure_otp_read"
+.LASF38:
+	.string	"parent_priv"
+.LASF394:
+	.string	"OTP_NS"
+.LASF244:
+	.string	"UCLASS_CHARGE_DISPLAY"
+.LASF315:
+	.string	"load_addr"
+.LASF134:
+	.string	"fit_hdr_os"
+.LASF90:
+	.string	"_datarelrolocal_start_ofs"
+.LASF454:
+	.string	"dev_get_driver_data"
+.LASF406:
+	.string	"spl_rockchip_otp_stop"
+.LASF268:
+	.string	"addr"
+.LASF396:
+	.string	"read"
+.LASF448:
+	.string	"mask"
+.LASF8:
+	.string	"unsigned int"
+.LASF16:
+	.string	"ushort"
+.LASF453:
+	.string	"dev_read_u32_default"
+.LASF290:
+	.string	"ufdt_blob"
+.LASF359:
+	.string	"priv_auto_alloc_size"
+.LASF298:
+	.string	"malloc_limit"
+.LASF209:
+	.string	"UCLASS_PMIC"
+.LASF446:
+	.string	"secure_conf"
+.LASF130:
+	.string	"legacy_hdr_os"
+.LASF99:
+	.string	"off_dt_strings"
+.LASF312:
+	.string	"monitor_flash_len"
+.LASF194:
+	.string	"UCLASS_MISC"
+.LASF67:
+	.string	"bi_memsize"
+.LASF445:
+	.string	"flag"
+.LASF436:
+	.string	"rk3308_secure_otp_read"
+.LASF24:
+	.string	"image_base"
+.LASF228:
+	.string	"UCLASS_SYSRESET"
+.LASF372:
+	.string	"current"
+.LASF181:
+	.string	"UCLASS_FIRMWARE"
+.LASF191:
+	.string	"UCLASS_LPC"
+.LASF415:
+	.string	"offset"
+.LASF187:
+	.string	"UCLASS_IDE"
+.LASF395:
+	.string	"misc_ops"
+.LASF306:
+	.string	"phandle"
+.LASF387:
+	.string	"per_device_platdata_auto_alloc_size"
+.LASF156:
+	.string	"bootm_headers_t"
+.LASF426:
+	.string	"rk3308s_secure_otp_write_word"
+.LASF73:
+	.string	"bi_arm_freq"
+.LASF215:
+	.string	"UCLASS_REMOTEPROC"
+.LASF126:
+	.string	"type"
+.LASF137:
+	.string	"fit_hdr_rd"
+.LASF275:
+	.string	"env_addr"
+.LASF72:
+	.string	"bi_sramsize"
+.LASF287:
+	.string	"uclass_root"
+.LASF180:
+	.string	"UCLASS_GPIO"
+.LASF403:
+	.string	"otp_cru_rst_base"
+.LASF438:
+	.string	"read_end"
+.LASF210:
+	.string	"UCLASS_PWM"
+.LASF58:
+	.string	"long double"
+.LASF277:
+	.string	"ram_top"
+.LASF304:
+	.string	"console_evt"
+.LASF424:
+	.string	"rk3308s_secure_otp_write"
+.LASF146:
+	.string	"rd_start"
+.LASF430:
+	.string	"write_end"
+.LASF211:
+	.string	"UCLASS_POWER_DOMAIN"
+.LASF214:
+	.string	"UCLASS_REGULATOR"
+.LASF317:
+	.string	"save_size"
+.LASF172:
+	.string	"UCLASS_CLK"
+.LASF31:
+	.string	"uclass_platdata"
+.LASF451:
+	.string	"dev_get_platdata"
+.LASF89:
+	.string	"_datarel_start_ofs"
+.LASF264:
+	.string	"pre_serial"
+.LASF458:
+	.ascii	"GNU C11 6.3.1 201"
+	.string	"70404 -mstrict-align -march=armv8-a+nosimd -mlittle-endian -mabi=lp64 -g -Os -fno-builtin -ffreestanding -fshort-wchar -fno-stack-protector -fno-delete-null-pointer-checks -fstack-usage -ffunction-sections -fdata-sections -ffixed-r9 -fno-common -ffixed-x18"
+.LASF119:
+	.string	"ih_name"
+.LASF115:
+	.string	"ih_os"
+.LASF459:
+	.string	"drivers/misc/rk3308-secure-otp.c"
+.LASF153:
+	.string	"cmdline_end"
+.LASF332:
+	.string	"net_rx_packet"
+.LASF255:
+	.string	"LOGF_MAX_CATEGORIES"
+.LASF289:
+	.string	"fdt_blob"
+.LASF375:
+	.string	"udevice_id"
+.LASF51:
+	.string	"size"
+.LASF10:
+	.string	"long long unsigned int"
+.LASF385:
+	.string	"destroy"
+.LASF107:
+	.string	"image_header"
+.LASF364:
+	.string	"length"
+.LASF20:
+	.string	"__be32"
+.LASF68:
+	.string	"bi_flashstart"
+.LASF136:
+	.string	"fit_noffset_os"
+.LASF195:
+	.string	"UCLASS_MMC"
+.LASF254:
+	.string	"UCLASS_INVALID"
+.LASF234:
+	.string	"UCLASS_USB_HUB"
+.LASF358:
+	.string	"child_post_remove"
+.LASF41:
+	.string	"sibling_node"
+.LASF293:
+	.string	"of_root"
+.LASF250:
+	.string	"UCLASS_EBC"
+.LASF57:
+	.string	"flash_info"
+.LASF101:
+	.string	"version"
+.LASF62:
+	.string	"region"
+.LASF105:
+	.string	"size_dt_struct"
+.LASF285:
+	.string	"dm_root"
+.LASF252:
+	.string	"UCLASS_RNG"
+.LASF303:
+	.string	"sys_start_tick"
+.LASF308:
+	.string	"properties"
+.LASF197:
+	.string	"UCLASS_MTD"
+.LASF94:
+	.string	"fdt32_t"
+.LASF284:
+	.string	"new_gd"
+.LASF199:
+	.string	"UCLASS_NORTHBRIDGE"
+.LASF78:
+	.string	"bi_enetaddr"
+.LASF356:
+	.string	"child_post_bind"
+.LASF429:
+	.string	"exit"
+.LASF318:
+	.string	"in_addr"
+.LASF333:
+	.string	"net_rx_packet_len"
+.LASF384:
+	.string	"init"
+.LASF441:
+	.string	"rockchip_secure_otp_ecc_enable"
+.LASF313:
+	.string	"__dtb_dt_begin"
+.LASF432:
+	.string	"prog_end"
+.LASF216:
+	.string	"UCLASS_RESET"
+.LASF139:
+	.string	"fit_noffset_rd"
+.LASF170:
+	.string	"UCLASS_AHCI"
+.LASF12:
+	.string	"phys_size_t"
+.LASF27:
+	.string	"driver"
+.LASF88:
+	.string	"FIQ_STACK_START"
+.LASF154:
+	.string	"verify"
+.LASF367:
+	.string	"ofnode"
+.LASF28:
+	.string	"name"
+.LASF437:
+	.string	"buffer"
+.LASF251:
+	.string	"UCLASS_EINK_DISPLAY"
+.LASF202:
+	.string	"UCLASS_PANEL_BACKLIGHT"
+.LASF230:
+	.string	"UCLASS_TIMER"
+.LASF225:
+	.string	"UCLASS_SPI_FLASH"
+.LASF274:
+	.string	"have_console"
+.LASF81:
+	.string	"bi_busfreq"
+.LASF6:
+	.string	"short int"
+.LASF402:
+	.string	"otp_mask_base"
+.LASF208:
+	.string	"UCLASS_PINCTRL"
+.LASF218:
+	.string	"UCLASS_RAMDISK"
+.LASF165:
+	.string	"UCLASS_I2C_EMUL"
+.LASF224:
+	.string	"UCLASS_SPMI"
+.LASF353:
+	.string	"remove"
+.LASF162:
+	.string	"UCLASS_TEST_BUS"
+.LASF316:
+	.string	"save_addr"
+.LASF361:
+	.string	"per_child_auto_alloc_size"
+.LASF299:
+	.string	"malloc_ptr"
+.LASF401:
+	.string	"secure_conf_base"
+.LASF151:
+	.string	"initrd_end"
+.LASF380:
+	.string	"pre_unbind"
+.LASF404:
+	.string	"secure_otp_data"
+.LASF267:
+	.string	"baudrate"
+.LASF91:
+	.string	"_datarellocal_start_ofs"
+.LASF40:
+	.string	"child_head"
+.LASF256:
+	.string	"arch_global_data"
+.LASF253:
+	.string	"UCLASS_COUNT"
+.LASF272:
+	.string	"pci_clk"
+.LASF49:
+	.string	"block_drvr"
+.LASF53:
+	.string	"flash_id"
+.LASF247:
+	.string	"UCLASS_CRYPTO"
+.LASF305:
+	.string	"device_node"
+.LASF279:
+	.string	"ram_size"
+.LASF145:
+	.string	"fit_noffset_setup"
+.LASF106:
+	.string	"working_fdt"
+.LASF288:
+	.string	"fdt_blob_kern"
+.LASF325:
+	.string	"net_root_path"
+.LASF178:
+	.string	"UCLASS_DMA"
+.LASF86:
+	.string	"bd_t"
+.LASF319:
+	.string	"s_addr"
+.LASF413:
+	.string	"request"
+.LASF382:
+	.string	"post_probe"
+.LASF334:
+	.string	"net_bcast_ethaddr"
+.LASF83:
+	.string	"bi_boot_params"
+.LASF405:
+	.string	"spl_rockchip_otp_start"
+.LASF19:
+	.string	"uint32_t"
+.LASF370:
+	.string	"mem_malloc_brk"
+.LASF320:
+	.string	"net_gateway"
+.LASF360:
+	.string	"platdata_auto_alloc_size"
+.LASF66:
+	.string	"bi_memstart"
+.LASF390:
+	.string	"DECOM_LZ4"
+.LASF238:
+	.string	"UCLASS_VIDEO_CONSOLE"
+.LASF428:
+	.string	"bit_addr"
+.LASF355:
+	.string	"ofdata_to_platdata"
+.LASF64:
+	.string	"reserved"
+.LASF464:
+	.string	"free"
+.LASF85:
+	.string	"bi_dram"
+.LASF2:
+	.string	"short unsigned int"
+.LASF96:
+	.string	"magic"
+.LASF143:
+	.string	"fit_hdr_setup"
+.LASF132:
+	.string	"legacy_hdr_valid"
+.LASF60:
+	.string	"base"
+.LASF421:
+	.string	"rk3308s_spl_otp_exit"
+.LASF219:
+	.string	"UCLASS_RTC"
+.LASF257:
+	.string	"timer_rate_hz"
+.LASF52:
+	.string	"sector_count"
+.LASF439:
+	.string	"rk3308s_secure_otp_read"
+.LASF118:
+	.string	"ih_comp"
+.LASF379:
+	.string	"post_bind"
+.LASF418:
+	.string	"rockchip_secure_otp_write"
+.LASF354:
+	.string	"unbind"
+.LASF148:
+	.string	"ft_addr"
+.LASF248:
+	.string	"UCLASS_ETH_PHY"
+.LASF425:
+	.string	"temp"
+.LASF4:
+	.string	"uchar"
+.LASF149:
+	.string	"ft_len"
+.LASF47:
+	.string	"next"
+.LASF412:
+	.string	"secure_otp_ioctl"
+.LASF377:
+	.string	"data"
+.LASF198:
+	.string	"UCLASS_NOP"
+.LASF144:
+	.string	"fit_uname_setup"
+.LASF48:
+	.string	"prev"
+.LASF203:
+	.string	"UCLASS_PCH"
+.LASF204:
+	.string	"UCLASS_PCI"
+.LASF321:
+	.string	"net_netmask"
+.LASF33:
+	.string	"driver_data"
+.LASF87:
+	.string	"IRQ_STACK_START"
+.LASF169:
+	.string	"UCLASS_ADC"
+.LASF164:
+	.string	"UCLASS_SPI_EMUL"
+.LASF261:
+	.string	"tlb_size"
+.LASF141:
+	.string	"fit_uname_fdt"
+	.ident	"GCC: (Linaro GCC 6.3-2017.05) 6.3.1 20170404"
+	.section	.note.GNU-stack,"",@progbits
diff --git a/drivers/misc/rk3328-secure-otp.S b/drivers/misc/rk3328-secure-otp.S
new file mode 100644
index 0000000000..28f97018ea
--- /dev/null
+++ b/drivers/misc/rk3328-secure-otp.S
@@ -0,0 +1,11115 @@
+	.arch armv8-a+nosimd
+	.file	"rk3328-secure-otp.c"
+	.text
+.Ltext0:
+	.cfi_sections	.debug_frame
+	.section	.text.rk3328_spl_rockchip_otp_start,"ax",@progbits
+	.align	2
+	.type	rk3328_spl_rockchip_otp_start, %function
+rk3328_spl_rockchip_otp_start:
+.LFB266:
+	.file 1 "drivers/misc/rk3328-secure-otp.c"
+	.loc 1 45 0
+	.cfi_startproc
+.LVL0:
+.LBB22:
+	.loc 1 46 0
+#APP
+// 46 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	mov	w1, 134219776
+.LVL1:
+	str	w1, [x0]
+.LVL2:
+.LBE22:
+.LBB23:
+	.loc 1 47 0
+#APP
+// 47 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	mov	w0, 1024
+.LVL3:
+	movk	w0, 0x600, lsl 16
+	str	w0, [x2]
+	ret
+.LBE23:
+	.cfi_endproc
+.LFE266:
+	.size	rk3328_spl_rockchip_otp_start, .-rk3328_spl_rockchip_otp_start
+	.section	.text.rk3328_spl_rockchip_otp_stop,"ax",@progbits
+	.align	2
+	.type	rk3328_spl_rockchip_otp_stop, %function
+rk3328_spl_rockchip_otp_stop:
+.LFB267:
+	.loc 1 53 0
+	.cfi_startproc
+.LVL4:
+.LBB24:
+	.loc 1 54 0
+#APP
+// 54 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	mov	w1, 134217728
+.LVL5:
+	str	w1, [x0]
+.LVL6:
+.LBE24:
+.LBB25:
+	.loc 1 55 0
+#APP
+// 55 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	mov	w0, 100663296
+.LVL7:
+	str	w0, [x2]
+	ret
+.LBE25:
+	.cfi_endproc
+.LFE267:
+	.size	rk3328_spl_rockchip_otp_stop, .-rk3328_spl_rockchip_otp_stop
+	.section	.text.secure_otp_ioctl,"ax",@progbits
+	.align	2
+	.type	secure_otp_ioctl, %function
+secure_otp_ioctl:
+.LFB278:
+	.loc 1 406 0
+	.cfi_startproc
+.LVL8:
+	.loc 1 409 0
+	mov	x0, 27908
+.LVL9:
+	cmp	x1, x0
+	bne	.L7
+.LVL10:
+.LBB26:
+.LBB27:
+	.loc 1 398 0
+	mov	w0, 8
+	str	w0, [x2]
+.LVL11:
+.LBE27:
+.LBE26:
+	.loc 1 411 0
+	mov	w0, 0
+	.loc 1 412 0
+	ret
+.LVL12:
+.L7:
+	.loc 1 407 0
+	mov	w0, -22
+	.loc 1 418 0
+	ret
+	.cfi_endproc
+.LFE278:
+	.size	secure_otp_ioctl, .-secure_otp_ioctl
+	.section	.text.secure_otp_write,"ax",@progbits
+	.align	2
+	.type	secure_otp_write, %function
+secure_otp_write:
+.LFB276:
+	.loc 1 390 0
+	.cfi_startproc
+.LVL13:
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	mov	x19, x0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -16
+	.cfi_offset 22, -8
+	.loc 1 390 0
+	mov	w20, w1
+	mov	x21, x2
+	mov	w22, w3
+	.loc 1 391 0
+	bl	dev_get_driver_data
+.LVL14:
+	.loc 1 393 0
+	ldr	x4, [x0, 8]
+	mov	w3, w22
+	mov	x2, x21
+	mov	w1, w20
+	mov	x0, x19
+.LVL15:
+	.loc 1 394 0
+	ldp	x21, x22, [sp, 32]
+.LVL16:
+	ldp	x19, x20, [sp, 16]
+.LVL17:
+	ldp	x29, x30, [sp], 48
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	.loc 1 393 0
+	br	x4
+.LVL18:
+	.cfi_endproc
+.LFE276:
+	.size	secure_otp_write, .-secure_otp_write
+	.section	.text.secure_otp_read,"ax",@progbits
+	.align	2
+	.type	secure_otp_read, %function
+secure_otp_read:
+.LFB275:
+	.loc 1 382 0
+	.cfi_startproc
+.LVL19:
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	mov	x19, x0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -16
+	.cfi_offset 22, -8
+	.loc 1 382 0
+	mov	w20, w1
+	mov	x21, x2
+	mov	w22, w3
+	.loc 1 383 0
+	bl	dev_get_driver_data
+.LVL20:
+	.loc 1 385 0
+	ldr	x4, [x0]
+	mov	w3, w22
+	mov	x2, x21
+	mov	w1, w20
+	mov	x0, x19
+.LVL21:
+	.loc 1 386 0
+	ldp	x21, x22, [sp, 32]
+.LVL22:
+	ldp	x19, x20, [sp, 16]
+.LVL23:
+	ldp	x29, x30, [sp], 48
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	.loc 1 385 0
+	br	x4
+.LVL24:
+	.cfi_endproc
+.LFE275:
+	.size	secure_otp_read, .-secure_otp_read
+	.section	.text.rockchip_secure_otp_ofdata_to_platdata,"ax",@progbits
+	.align	2
+	.type	rockchip_secure_otp_ofdata_to_platdata, %function
+rockchip_secure_otp_ofdata_to_platdata:
+.LFB279:
+	.loc 1 427 0
+	.cfi_startproc
+.LVL25:
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -16
+	.cfi_offset 20, -8
+	.loc 1 427 0
+	mov	x20, x0
+	.loc 1 428 0
+	bl	dev_get_platdata
+.LVL26:
+	mov	x19, x0
+.LVL27:
+	.loc 1 430 0
+	mov	x0, x20
+.LVL28:
+	bl	dev_read_addr_ptr
+.LVL29:
+	.loc 1 431 0
+	mov	w2, 0
+	adrp	x1, .LC0
+	.loc 1 430 0
+	str	x0, [x19]
+	.loc 1 431 0
+	add	x1, x1, :lo12:.LC0
+	mov	x0, x20
+	bl	dev_read_u32_default
+.LVL30:
+	.loc 1 432 0
+	uxtw	x0, w0
+	str	x0, [x19, 8]
+	.loc 1 433 0
+	mov	w2, 0
+	mov	x0, x20
+	adrp	x1, .LC1
+	add	x1, x1, :lo12:.LC1
+	bl	dev_read_u32_default
+.LVL31:
+	.loc 1 434 0
+	uxtw	x0, w0
+	str	x0, [x19, 16]
+	.loc 1 435 0
+	mov	w2, 0
+	mov	x0, x20
+	adrp	x1, .LC2
+	add	x1, x1, :lo12:.LC2
+	bl	dev_read_u32_default
+.LVL32:
+	.loc 1 436 0
+	uxtw	x0, w0
+	str	x0, [x19, 24]
+	.loc 1 439 0
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+.LVL33:
+	ldp	x29, x30, [sp], 32
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE279:
+	.size	rockchip_secure_otp_ofdata_to_platdata, .-rockchip_secure_otp_ofdata_to_platdata
+	.section	.text.rockchip_secure_otp_wait_status.isra.1,"ax",@progbits
+	.align	2
+	.type	rockchip_secure_otp_wait_status.isra.1, %function
+rockchip_secure_otp_wait_status.isra.1:
+.LFB281:
+	.loc 1 58 0
+	.cfi_startproc
+.LVL34:
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	mov	w19, w1
+	str	x21, [sp, 32]
+	.cfi_offset 21, -16
+	.loc 1 58 0
+	mov	x21, x0
+	mov	w20, 10000
+.LVL35:
+.L15:
+.LBB34:
+	.loc 1 63 0
+	ldr	x0, [x21]
+	ldr	w0, [x0, 772]
+.LVL36:
+#APP
+// 63 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+.LBE34:
+	tst	w0, w19
+	beq	.L17
+.LBB35:
+	.loc 1 73 0
+	orr	w19, w19, -65536
+.LVL37:
+#APP
+// 73 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x21]
+.LVL38:
+	str	w19, [x0, 772]
+.LBE35:
+	.loc 1 75 0
+	mov	w0, 0
+	b	.L14
+.LVL39:
+.L17:
+	.loc 1 64 0
+	mov	x0, 1
+.LVL40:
+	bl	udelay
+.LVL41:
+	.loc 1 66 0
+	subs	w20, w20, #1
+.LVL42:
+	bne	.L15
+.LVL43:
+.LBB36:
+.LBB37:
+	.loc 1 67 0
+	adrp	x1, .LANCHOR0
+	adrp	x0, .LC3
+	add	x1, x1, :lo12:.LANCHOR0
+	add	x0, x0, :lo12:.LC3
+	bl	printf
+.LVL44:
+	mov	w0, -110
+.LVL45:
+.L14:
+.LBE37:
+.LBE36:
+	.loc 1 76 0
+	ldp	x19, x20, [sp, 16]
+.LVL46:
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE281:
+	.size	rockchip_secure_otp_wait_status.isra.1, .-rockchip_secure_otp_wait_status.isra.1
+	.section	.text.rockchip_secure_otp_read,"ax",@progbits
+	.align	2
+	.type	rockchip_secure_otp_read, %function
+rockchip_secure_otp_read:
+.LFB272:
+	.loc 1 146 0
+	.cfi_startproc
+.LVL47:
+	stp	x29, x30, [sp, -80]!
+	.cfi_def_cfa_offset 80
+	.cfi_offset 29, -80
+	.cfi_offset 30, -72
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -64
+	.cfi_offset 20, -56
+	mov	w20, w1
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -32
+	.cfi_offset 24, -24
+	mov	w24, w3
+	stp	x21, x22, [sp, 32]
+	mov	x23, x0
+	.cfi_offset 21, -48
+	.cfi_offset 22, -40
+	mov	x22, x2
+	str	x25, [sp, 64]
+	.cfi_offset 25, -16
+	.loc 1 147 0
+	bl	dev_get_platdata
+.LVL48:
+	mov	x19, x0
+.LVL49:
+	.loc 1 148 0
+	mov	x0, x23
+.LVL50:
+	bl	dev_get_driver_data
+.LVL51:
+	.loc 1 154 0
+	ldr	x4, [x0, 16]
+	.loc 1 148 0
+	mov	x25, x0
+.LVL52:
+	.loc 1 154 0
+	ldr	x1, [x19, 24]
+	mov	w3, w20
+	ldp	x0, x2, [x19, 8]
+.LVL53:
+	blr	x4
+.LVL54:
+.LBB51:
+.LBB52:
+.LBB53:
+	.loc 1 127 0
+#APP
+// 127 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x19]
+	mov	w1, 512
+	movk	w1, 0xff00, lsl 16
+	str	w1, [x0, 32]
+.LVL55:
+.LBE53:
+.LBB54:
+	.loc 1 128 0
+#APP
+// 128 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x19]
+	mov	w1, -65535
+	str	w1, [x0, 36]
+.LVL56:
+.LBE54:
+.LBB55:
+	.loc 1 129 0
+#APP
+// 129 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x19]
+	mov	w1, 250
+	str	w1, [x0, 4096]
+.LVL57:
+.LBE55:
+.LBB56:
+	.loc 1 131 0
+#APP
+// 131 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x19]
+	str	wzr, [x0, 4100]
+.LVL58:
+.LBE56:
+.LBB57:
+	.loc 1 135 0
+#APP
+// 135 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x19]
+	mov	w1, 65537
+	str	w1, [x0, 32]
+.LBE57:
+	.loc 1 137 0
+	mov	w1, 2
+	mov	x0, x19
+	bl	rockchip_secure_otp_wait_status.isra.1
+.LVL59:
+	.loc 1 138 0
+	tbz	w0, #31, .L21
+	.loc 1 139 0
+	adrp	x1, .LANCHOR1
+	adrp	x0, .LC4
+.LVL60:
+	add	x1, x1, :lo12:.LANCHOR1
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+.LVL61:
+.L21:
+.LBE52:
+.LBE51:
+.LBB58:
+	.loc 1 158 0
+#APP
+// 158 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x19]
+	mov	w23, 65537
+.LVL62:
+	add	w24, w24, w20
+.LVL63:
+.LBE58:
+	.loc 1 151 0
+	mov	w21, 0
+.LBB59:
+	.loc 1 158 0
+	str	w23, [x0, 256]
+.LBE59:
+	.loc 1 159 0
+	mov	x0, 50
+	bl	udelay
+.LVL64:
+.L22:
+	.loc 1 160 0
+	cmp	w20, w24
+	beq	.L26
+	.loc 1 162 0
+	cmp	w20, 448
+	bgt	.L28
+	.loc 1 165 0
+	sub	w1, w20, #16
+	cmp	w20, 0
+	mov	w0, w20
+	ccmp	w1, 31, 0, ne
+	bls	.L24
+	.loc 1 165 0 is_stmt 0 discriminator 1
+	sub	w1, w20, #128
+	cmp	w1, 263
+	bls	.L24
+	.loc 1 168 0 is_stmt 1
+	adrp	x0, .LC5
+	add	x0, x0, :lo12:.LC5
+	bl	printf
+.LVL65:
+.L28:
+	.loc 1 163 0
+	mov	w21, -1
+.LVL66:
+	b	.L20
+.LVL67:
+.L24:
+.LBB60:
+	.loc 1 172 0
+	add	w20, w20, 1
+.LVL68:
+	orr	w0, w0, -65536
+.LVL69:
+#APP
+// 172 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x1, [x19]
+	str	w0, [x1, 260]
+.LVL70:
+.LBE60:
+.LBB61:
+	.loc 1 174 0
+#APP
+// 174 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x19]
+.LVL71:
+.LBE61:
+	.loc 1 176 0
+	mov	w1, 4
+.LVL72:
+.LBB62:
+	.loc 1 174 0
+	str	w23, [x0, 264]
+.LVL73:
+.LBE62:
+	.loc 1 176 0
+	mov	x0, x19
+	bl	rockchip_secure_otp_wait_status.isra.1
+.LVL74:
+	mov	w21, w0
+.LVL75:
+	.loc 1 177 0
+	tbz	w0, #31, .L25
+	.loc 1 178 0
+	adrp	x1, .LANCHOR2
+	adrp	x0, .LC6
+.LVL76:
+	add	x1, x1, :lo12:.LANCHOR2
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.LVL77:
+.L26:
+.LBB63:
+	.loc 1 188 0
+#APP
+// 188 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x19]
+	mov	w1, 65536
+.LBE63:
+	.loc 1 190 0
+	ldr	x2, [x19, 16]
+	mov	w3, w20
+	ldr	x4, [x25, 24]
+.LBB64:
+	.loc 1 188 0
+	str	w1, [x0, 256]
+.LBE64:
+	.loc 1 190 0
+	ldr	x0, [x19, 8]
+	ldr	x1, [x19, 24]
+	blr	x4
+.LVL78:
+.L20:
+	.loc 1 195 0
+	mov	w0, w21
+	ldr	x25, [sp, 64]
+.LVL79:
+	ldp	x19, x20, [sp, 16]
+.LVL80:
+	ldp	x21, x22, [sp, 32]
+.LVL81:
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 25
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL82:
+.L25:
+	.cfi_restore_state
+.LBB65:
+	.loc 1 182 0
+	ldr	x0, [x19]
+.LVL83:
+	ldrb	w0, [x0, 292]
+	and	w0, w0, 255
+.LVL84:
+#APP
+// 182 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+.LVL85:
+#NO_APP
+.LBE65:
+	.loc 1 184 0
+	strb	w0, [x22], 1
+.LVL86:
+	b	.L22
+	.cfi_endproc
+.LFE272:
+	.size	rockchip_secure_otp_read, .-rockchip_secure_otp_read
+	.section	.text.rockchip_secure_otp_write,"ax",@progbits
+	.align	2
+	.type	rockchip_secure_otp_write, %function
+rockchip_secure_otp_write:
+.LFB274:
+	.loc 1 345 0
+	.cfi_startproc
+.LVL87:
+	stp	x29, x30, [sp, -128]!
+	.cfi_def_cfa_offset 128
+	.cfi_offset 29, -128
+	.cfi_offset 30, -120
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -112
+	.cfi_offset 20, -104
+	mov	w19, w1
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -80
+	.cfi_offset 24, -72
+	mov	w24, w3
+	stp	x27, x28, [sp, 80]
+	stp	x21, x22, [sp, 32]
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 27, -48
+	.cfi_offset 28, -40
+	.cfi_offset 21, -96
+	.cfi_offset 22, -88
+	.cfi_offset 25, -64
+	.cfi_offset 26, -56
+	.loc 1 345 0
+	stp	x2, x0, [x29, 104]
+	.loc 1 346 0
+	bl	dev_get_platdata
+.LVL88:
+	mov	x28, x0
+.LVL89:
+	.loc 1 348 0
+	sxtw	x0, w24
+.LVL90:
+	bl	malloc_simple
+.LVL91:
+	.loc 1 351 0
+	cbnz	x0, .L31
+.LVL92:
+.L60:
+.LBB133:
+.LBB134:
+	.loc 1 212 0
+	mov	w27, -1
+.L30:
+.LBE134:
+.LBE133:
+	.loc 1 378 0
+	mov	w0, w27
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+.LVL93:
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+.LVL94:
+	ldp	x29, x30, [sp], 128
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+.LVL95:
+	ret
+.LVL96:
+.L31:
+	.cfi_restore_state
+	mov	x20, x0
+	.loc 1 354 0
+	mov	x2, x0
+	ldr	x0, [x29, 112]
+.LVL97:
+	mov	w3, w24
+	mov	w1, w19
+	bl	rockchip_secure_otp_read
+.LVL98:
+	.loc 1 355 0
+	cbnz	w0, .L60
+	mov	x0, 0
+.LVL99:
+.L35:
+	.loc 1 360 0 discriminator 1
+	cmp	w24, w0
+	bgt	.L36
+.LBB211:
+.LBB207:
+	.loc 1 308 0
+	adrp	x20, .LANCHOR3
+.LVL100:
+	add	x20, x20, :lo12:.LANCHOR3
+.LBE207:
+.LBE211:
+	.loc 1 360 0
+	mov	x23, 0
+.LVL101:
+.L37:
+	.loc 1 370 0 discriminator 1
+	cmp	w24, w23
+	bgt	.L53
+	mov	w27, 0
+	b	.L30
+.LVL102:
+.L36:
+	add	x0, x0, 1
+.LVL103:
+	.loc 1 361 0
+	add	x1, x20, x0
+	ldrb	w1, [x1, -1]
+	cbz	w1, .L35
+	.loc 1 362 0
+	adrp	x0, .LC7
+	add	x0, x0, :lo12:.LC7
+.LVL104:
+.L61:
+.LBB212:
+.LBB208:
+	.loc 1 212 0
+	bl	printf
+.LVL105:
+	b	.L60
+.LVL106:
+.L53:
+.LBE208:
+.LBE212:
+	.loc 1 371 0
+	ldr	x0, [x29, 104]
+	ldrb	w0, [x0, x23]
+	str	w0, [x29, 124]
+.LVL107:
+.LBB213:
+.LBB209:
+	.loc 1 202 0
+	ldr	x0, [x29, 112]
+	bl	dev_get_driver_data
+.LVL108:
+	mov	x26, x0
+.LVL109:
+	.loc 1 205 0
+	cmp	w19, 448
+	bgt	.L60
+	.loc 1 209 0
+	sub	w0, w19, #16
+.LVL110:
+	cmp	w19, 0
+	ccmp	w0, 31, 0, ne
+	bls	.L38
+	sub	w0, w19, #128
+	cmp	w0, 263
+	bls	.L38
+	.loc 1 212 0
+	adrp	x0, .LC5
+	add	x0, x0, :lo12:.LC5
+	b	.L61
+.L38:
+	.loc 1 216 0
+	ldr	w0, [x29, 124]
+	cbnz	w0, .L39
+.LVL111:
+.L52:
+	add	x23, x23, 1
+	add	w19, w19, 1
+	b	.L37
+.LVL112:
+.L39:
+	.loc 1 219 0
+	ldr	x5, [x26, 16]
+	mov	w3, w19
+	ldp	x0, x2, [x28, 8]
+	ldr	x1, [x28, 24]
+	blr	x5
+.LVL113:
+.LBB135:
+	.loc 1 222 0
+#APP
+// 222 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, 262148
+	str	w1, [x0, 32]
+.LVL114:
+.LBE135:
+.LBB136:
+	.loc 1 223 0
+#APP
+// 223 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, -65536
+	str	w1, [x0, 40]
+.LVL115:
+.LBE136:
+.LBB137:
+	.loc 1 224 0
+#APP
+// 224 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, 512
+	movk	w1, 0xff00, lsl 16
+	str	w1, [x0, 32]
+.LVL116:
+.LBE137:
+.LBB138:
+	.loc 1 225 0
+#APP
+// 225 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, -65522
+	str	w1, [x0, 36]
+.LVL117:
+.LBE138:
+.LBB139:
+	.loc 1 226 0
+#APP
+// 226 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w2, 240
+	str	w2, [x29, 120]
+.LVL118:
+	str	w2, [x0, 4096]
+.LBE139:
+.LBB140:
+	.loc 1 227 0
+#APP
+// 227 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w25, 1
+	str	w25, [x0, 4100]
+.LVL119:
+.LBE140:
+.LBB141:
+	.loc 1 228 0
+#APP
+// 228 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w21, 122
+	str	w21, [x0, 4104]
+.LVL120:
+.LBE141:
+.LBB142:
+	.loc 1 229 0
+#APP
+// 229 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, 37
+	str	w1, [x0, 4108]
+.LVL121:
+.LBE142:
+.LBB143:
+	.loc 1 230 0
+#APP
+// 230 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, 4
+	str	w1, [x0, 4112]
+.LVL122:
+.LBE143:
+.LBB144:
+	.loc 1 231 0
+#APP
+// 231 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	str	wzr, [x0, 4116]
+.LVL123:
+.LBE144:
+.LBB145:
+	.loc 1 232 0
+#APP
+// 232 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	str	wzr, [x0, 4120]
+.LVL124:
+.LBE145:
+.LBB146:
+	.loc 1 233 0
+#APP
+// 233 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	str	wzr, [x0, 4124]
+.LVL125:
+.LBE146:
+.LBB147:
+	.loc 1 234 0
+#APP
+// 234 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, 11
+	str	w1, [x0, 4128]
+.LVL126:
+.LBE147:
+.LBB148:
+	.loc 1 235 0
+#APP
+// 235 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, 8
+	str	w1, [x0, 4132]
+.LVL127:
+.LBE148:
+.LBB149:
+	.loc 1 236 0
+#APP
+// 236 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	str	wzr, [x0, 4136]
+.LVL128:
+.LBE149:
+.LBB150:
+	.loc 1 237 0
+#APP
+// 237 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	str	wzr, [x0, 4140]
+.LVL129:
+.LBE150:
+.LBB151:
+	.loc 1 238 0
+#APP
+// 238 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	str	wzr, [x0, 4144]
+.LBE151:
+.LBB152:
+	.loc 1 239 0
+	and	w0, w19, 255
+#APP
+// 239 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x1, [x28]
+	str	w0, [x1, 4148]
+.LBE152:
+.LBB153:
+	.loc 1 240 0
+	ubfx	x1, x19, 8, 8
+.LVL130:
+#APP
+// 240 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	str	w1, [x0, 4152]
+.LVL131:
+.LBE153:
+.LBB154:
+	.loc 1 241 0
+#APP
+// 241 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w22, 65537
+.LBE154:
+	.loc 1 242 0
+	mov	w1, 2
+.LVL132:
+.LBB155:
+	.loc 1 241 0
+	str	w22, [x0, 32]
+.LVL133:
+.LBE155:
+	.loc 1 242 0
+	mov	x0, x28
+	bl	rockchip_secure_otp_wait_status.isra.1
+.LVL134:
+	mov	w27, w0
+.LVL135:
+	.loc 1 243 0
+	ldr	w2, [x29, 120]
+	tbz	w0, #31, .L40
+	.loc 1 244 0
+	adrp	x0, .LC8
+.LVL136:
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC8
+.L59:
+	.loc 1 267 0
+	bl	printf
+.LVL137:
+.L41:
+.LBB156:
+	.loc 1 335 0
+#APP
+// 335 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, -65533
+.LBE156:
+	.loc 1 336 0
+	ldr	x6, [x26, 24]
+	mov	w3, w19
+	ldr	x2, [x28, 16]
+.LBB157:
+	.loc 1 335 0
+	str	w1, [x0, 772]
+.LBE157:
+	.loc 1 336 0
+	ldr	x0, [x28, 8]
+	ldr	x1, [x28, 24]
+	blr	x6
+.LVL138:
+.LBE209:
+.LBE213:
+	.loc 1 372 0
+	cbz	w27, .L52
+	b	.L30
+.LVL139:
+.L40:
+.LBB214:
+.LBB210:
+.LBB158:
+	.loc 1 248 0
+#APP
+// 248 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+.LVL140:
+	mov	w1, 14848
+	movk	w1, 0xff00, lsl 16
+	str	w1, [x0, 32]
+.LVL141:
+.LBE158:
+.LBB159:
+	.loc 1 249 0
+#APP
+// 249 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	str	w2, [x0, 4096]
+.LVL142:
+.LBE159:
+.LBB160:
+	.loc 1 250 0
+#APP
+// 250 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	str	w25, [x0, 4100]
+.LVL143:
+.LBE160:
+.LBB161:
+	.loc 1 251 0
+#APP
+// 251 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	str	w21, [x0, 4104]
+.LVL144:
+.LBE161:
+.LBB162:
+	.loc 1 252 0
+#APP
+// 252 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, 21
+	str	w1, [x0, 4108]
+.LVL145:
+.LBE162:
+.LBB163:
+	.loc 1 253 0
+#APP
+// 253 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, 220
+	str	w1, [x0, 4112]
+.LVL146:
+.LBE163:
+.LBB164:
+	.loc 1 254 0
+#APP
+// 254 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, 146
+	str	w1, [x0, 4116]
+.LVL147:
+.LBE164:
+.LBB165:
+	.loc 1 255 0
+#APP
+// 255 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, 121
+	str	w1, [x0, 4120]
+.LVL148:
+.LBE165:
+.LBB166:
+	.loc 1 256 0
+#APP
+// 256 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, 129
+	str	w1, [x0, 4124]
+.LVL149:
+.LBE166:
+.LBB167:
+	.loc 1 257 0
+#APP
+// 257 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, 126
+	str	w1, [x0, 4128]
+.LVL150:
+.LBE167:
+.LBB168:
+	.loc 1 258 0
+#APP
+// 258 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, 33
+	str	w1, [x0, 4132]
+.LVL151:
+.LBE168:
+.LBB169:
+	.loc 1 259 0
+#APP
+// 259 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, 17
+	str	w1, [x0, 4136]
+.LVL152:
+.LBE169:
+.LBB170:
+	.loc 1 260 0
+#APP
+// 260 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, 157
+	str	w1, [x0, 4140]
+.LVL153:
+.LBE170:
+.LBB171:
+	.loc 1 261 0
+#APP
+// 261 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w21, 2
+	str	w21, [x0, 4144]
+.LVL154:
+.LBE171:
+.LBB172:
+	.loc 1 262 0
+#APP
+// 262 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	str	wzr, [x0, 4148]
+.LVL155:
+.LBE172:
+.LBB173:
+	.loc 1 263 0
+#APP
+// 263 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	str	wzr, [x0, 4152]
+.LVL156:
+.LBE173:
+.LBB174:
+	.loc 1 264 0
+#APP
+// 264 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+.LBE174:
+	.loc 1 265 0
+	mov	w1, w21
+.LBB175:
+	.loc 1 264 0
+	str	w22, [x0, 32]
+.LBE175:
+	.loc 1 265 0
+	mov	x0, x28
+	bl	rockchip_secure_otp_wait_status.isra.1
+.LVL157:
+	mov	w27, w0
+.LVL158:
+	.loc 1 266 0
+	tbz	w0, #31, .L42
+	.loc 1 267 0
+	adrp	x0, .LC9
+.LVL159:
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC9
+	b	.L59
+.LVL160:
+.L42:
+.LBB176:
+	.loc 1 271 0
+#APP
+// 271 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+.LVL161:
+	mov	w1, 512
+	movk	w1, 0xff00, lsl 16
+	str	w1, [x0, 32]
+.LVL162:
+.LBE176:
+.LBB177:
+	.loc 1 272 0
+#APP
+// 272 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, -65535
+	str	w1, [x0, 36]
+.LVL163:
+.LBE177:
+.LBB178:
+	.loc 1 273 0
+#APP
+// 273 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, 251
+	str	w1, [x0, 4096]
+.LVL164:
+.LBE178:
+.LBB179:
+	.loc 1 274 0
+#APP
+// 274 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	str	wzr, [x0, 4100]
+.LVL165:
+.LBE179:
+.LBB180:
+	.loc 1 275 0
+#APP
+// 275 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+.LBE180:
+	.loc 1 276 0
+	mov	w1, w21
+.LBB181:
+	.loc 1 275 0
+	str	w22, [x0, 32]
+.LBE181:
+	.loc 1 276 0
+	mov	x0, x28
+	bl	rockchip_secure_otp_wait_status.isra.1
+.LVL166:
+	mov	w27, w0
+.LVL167:
+	.loc 1 277 0
+	tbz	w0, #31, .L43
+	.loc 1 278 0
+	adrp	x0, .LC10
+.LVL168:
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC10
+	b	.L59
+.LVL169:
+.L43:
+.LBB182:
+	.loc 1 282 0
+#APP
+// 282 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+.LVL170:
+	mov	w1, 192
+	str	w1, [x0, 4096]
+.LVL171:
+.LBE182:
+.LBB183:
+	.loc 1 283 0
+#APP
+// 283 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	ldr	w1, [x29, 124]
+	str	w1, [x0, 4100]
+.LVL172:
+.LBE183:
+.LBB184:
+	.loc 1 284 0
+#APP
+// 284 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+.LBE184:
+	.loc 1 285 0
+	mov	w1, w21
+.LBB185:
+	.loc 1 284 0
+	str	w22, [x0, 32]
+.LBE185:
+	.loc 1 285 0
+	mov	x0, x28
+	bl	rockchip_secure_otp_wait_status.isra.1
+.LVL173:
+	mov	w27, w0
+.LVL174:
+	.loc 1 286 0
+	tbz	w0, #31, .L44
+	.loc 1 287 0
+	adrp	x0, .LC11
+.LVL175:
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC11
+	b	.L59
+.LVL176:
+.L44:
+.LBB186:
+	.loc 1 291 0
+#APP
+// 291 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+.LVL177:
+	mov	w1, 14848
+	movk	w1, 0xff00, lsl 16
+	str	w1, [x0, 32]
+.LVL178:
+.LBE186:
+.LBB187:
+	.loc 1 292 0
+#APP
+// 292 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, 255
+	str	w1, [x0, 4096]
+.LVL179:
+.LBE187:
+.LBB188:
+	.loc 1 293 0
+#APP
+// 293 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, 10
+	str	w1, [x0, 4100]
+.LVL180:
+.LBE188:
+.LBB189:
+	.loc 1 294 0
+#APP
+// 294 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+.LBE189:
+	.loc 1 295 0
+	mov	w1, w21
+.LBB190:
+	.loc 1 294 0
+	str	w22, [x0, 32]
+.LBE190:
+	.loc 1 295 0
+	mov	x0, x28
+	bl	rockchip_secure_otp_wait_status.isra.1
+.LVL181:
+	mov	w27, w0
+.LVL182:
+	.loc 1 296 0
+	tbz	w0, #31, .L45
+	.loc 1 297 0
+	adrp	x0, .LC12
+.LVL183:
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC12
+	b	.L59
+.LVL184:
+.L45:
+.LBB191:
+	.loc 1 301 0
+#APP
+// 301 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+.LVL185:
+	mov	w1, -65534
+	str	w1, [x0, 36]
+.LVL186:
+.LBE191:
+.LBB192:
+	.loc 1 302 0
+#APP
+// 302 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	str	w25, [x0, 4096]
+.LVL187:
+.LBE192:
+.LBB193:
+	.loc 1 303 0
+#APP
+// 303 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, 191
+	str	w1, [x0, 4100]
+.LVL188:
+.LBE193:
+.LBB194:
+	.loc 1 304 0
+#APP
+// 304 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	str	wzr, [x0, 4104]
+.LVL189:
+.LBE194:
+.LBB195:
+	.loc 1 305 0
+#APP
+// 305 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+.LBE195:
+	.loc 1 306 0
+	mov	w1, w21
+.LBB196:
+	.loc 1 305 0
+	str	w22, [x0, 32]
+.LBE196:
+	.loc 1 306 0
+	mov	x0, x28
+	bl	rockchip_secure_otp_wait_status.isra.1
+.LVL190:
+	mov	w27, w0
+.LVL191:
+	.loc 1 307 0
+	tbnz	w0, #31, .L46
+	mov	w21, 34465
+	movk	w21, 0x1, lsl 16
+.LVL192:
+.L47:
+.LBB197:
+.LBB198:
+.LBB199:
+	.loc 1 106 0
+	ldr	x0, [x28]
+	ldr	w0, [x0, 44]
+.LVL193:
+#APP
+// 106 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+.LVL194:
+#NO_APP
+.LBE199:
+	.loc 1 107 0
+	and	w27, w0, 16
+	tbz	x0, 4, .L48
+	.loc 1 110 0
+	subs	w21, w21, #1
+.LVL195:
+	beq	.L49
+.LVL196:
+	.loc 1 116 0
+	mov	x0, 1
+.LVL197:
+	bl	udelay
+.LVL198:
+	b	.L47
+.LVL199:
+.L46:
+.LBE198:
+.LBE197:
+	.loc 1 308 0
+	adrp	x0, .LC13
+.LVL200:
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC13
+	b	.L59
+.LVL201:
+.L54:
+	.loc 1 324 0
+	mov	x1, x20
+	adrp	x0, .LC14
+.LVL202:
+	mov	w27, w21
+	add	x0, x0, :lo12:.LC14
+	bl	printf
+.LVL203:
+	b	.L41
+.LVL204:
+.L49:
+	.loc 1 314 0
+	adrp	x0, .LC15
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC15
+.L58:
+	.loc 1 330 0
+	bl	printf
+.LVL205:
+	mov	w27, -1
+	b	.L41
+.LVL206:
+.L48:
+.LBB200:
+	.loc 1 318 0
+#APP
+// 318 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, -65534
+	str	w1, [x0, 36]
+.LVL207:
+.LBE200:
+.LBB201:
+	.loc 1 319 0
+#APP
+// 319 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, 2
+	str	w1, [x0, 4096]
+.LVL208:
+.LBE201:
+.LBB202:
+	.loc 1 320 0
+#APP
+// 320 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w2, 191
+	str	w2, [x0, 4100]
+.LVL209:
+.LBE202:
+.LBB203:
+	.loc 1 321 0
+#APP
+// 321 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w2, 65537
+	str	w2, [x0, 32]
+.LBE203:
+	.loc 1 322 0
+	mov	x0, x28
+	bl	rockchip_secure_otp_wait_status.isra.1
+.LVL210:
+	mov	w21, w0
+.LVL211:
+	.loc 1 323 0
+	tbnz	w0, #31, .L54
+	mov	w21, 20001
+.LVL212:
+.L51:
+.LBB204:
+.LBB205:
+.LBB206:
+	.loc 1 84 0
+	ldr	x0, [x28]
+	ldr	w0, [x0, 44]
+.LVL213:
+#APP
+// 84 "drivers/misc/rk3328-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+.LVL214:
+#NO_APP
+.LBE206:
+	.loc 1 85 0
+	tbnz	x0, 4, .L41
+	.loc 1 88 0
+	subs	w21, w21, #1
+.LVL215:
+	beq	.L50
+	.loc 1 93 0
+	mov	x0, 1
+.LVL216:
+	bl	udelay
+.LVL217:
+	b	.L51
+.LVL218:
+.L50:
+.LBE205:
+.LBE204:
+	.loc 1 330 0
+	adrp	x0, .LC16
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC16
+	b	.L58
+.LBE210:
+.LBE214:
+	.cfi_endproc
+.LFE274:
+	.size	rockchip_secure_otp_write, .-rockchip_secure_otp_write
+	.global	_u_boot_list_2_driver_2_rockchip_secure_otp
+	.section	.rodata.__func__.7392,"a",@progbits
+	.align	3
+	.set	.LANCHOR0,. + 0
+	.type	__func__.7392, %object
+	.size	__func__.7392, 32
+__func__.7392:
+	.string	"rockchip_secure_otp_wait_status"
+	.section	.rodata.__func__.7435,"a",@progbits
+	.align	3
+	.set	.LANCHOR1,. + 0
+	.type	__func__.7435, %object
+	.size	__func__.7435, 31
+__func__.7435:
+	.string	"rockchip_secure_otp_ecc_enable"
+	.section	.rodata.__func__.7453,"a",@progbits
+	.align	3
+	.set	.LANCHOR2,. + 0
+	.type	__func__.7453, %object
+	.size	__func__.7453, 25
+__func__.7453:
+	.string	"rockchip_secure_otp_read"
+	.section	.rodata.__func__.7510,"a",@progbits
+	.align	3
+	.set	.LANCHOR3,. + 0
+	.type	__func__.7510, %object
+	.size	__func__.7510, 31
+__func__.7510:
+	.string	"rockchip_secure_otp_write_byte"
+	.section	.rodata.rk3328_data,"a",@progbits
+	.align	3
+	.type	rk3328_data, %object
+	.size	rk3328_data, 32
+rk3328_data:
+	.xword	rockchip_secure_otp_read
+	.xword	rockchip_secure_otp_write
+	.xword	rk3328_spl_rockchip_otp_start
+	.xword	rk3328_spl_rockchip_otp_stop
+	.section	.rodata.rockchip_otp_ids,"a",@progbits
+	.align	3
+	.type	rockchip_otp_ids, %object
+	.size	rockchip_otp_ids, 32
+rockchip_otp_ids:
+	.xword	.LC18
+	.xword	rk3328_data
+	.zero	16
+	.section	.rodata.rockchip_secure_otp_ofdata_to_platdata.str1.1,"aMS",@progbits,1
+.LC0:
+	.string	"secure_conf"
+.LC1:
+	.string	"mask_addr"
+.LC2:
+	.string	"cru_rst_addr"
+	.section	.rodata.rockchip_secure_otp_ops,"a",@progbits
+	.align	3
+	.type	rockchip_secure_otp_ops, %object
+	.size	rockchip_secure_otp_ops, 32
+rockchip_secure_otp_ops:
+	.xword	secure_otp_read
+	.xword	secure_otp_write
+	.xword	secure_otp_ioctl
+	.zero	8
+	.section	.rodata.rockchip_secure_otp_read.str1.1,"aMS",@progbits,1
+.LC4:
+	.string	"%s timeout during ecc_enable\n"
+.LC5:
+	.string	"Please input correct addr\n"
+.LC6:
+	.string	"%s timeout during read setup\n"
+	.section	.rodata.rockchip_secure_otp_wait_status.isra.1.str1.1,"aMS",@progbits,1
+.LC3:
+	.string	"%s: wait init status timeout\n"
+	.section	.rodata.rockchip_secure_otp_write.str1.1,"aMS",@progbits,1
+.LC7:
+	.string	"The zone is written.\n"
+.LC8:
+	.string	"%s timeout during write setup 1\n"
+.LC9:
+	.string	"%s timeout during write setup 2\n"
+.LC10:
+	.string	"%s timeout during write setup 3\n"
+.LC11:
+	.string	"%s timeout during write setup 4\n"
+.LC12:
+	.string	"%s timeout during write setup 5\n"
+.LC13:
+	.string	"%s timeout during write setup 6\n"
+.LC14:
+	.string	"%s timeout during write setup 8\n"
+.LC15:
+	.string	"%s timeout during write setup 7\n"
+.LC16:
+	.string	"%s timeout during write setup 9\n"
+	.section	.rodata.str1.1,"aMS",@progbits,1
+.LC17:
+	.string	"rockchip_secure_otp"
+.LC18:
+	.string	"rockchip,rk3328-secure-otp"
+	.section	.u_boot_list_2_driver_2_rockchip_secure_otp,"aw",@progbits
+	.align	2
+	.type	_u_boot_list_2_driver_2_rockchip_secure_otp, %object
+	.size	_u_boot_list_2_driver_2_rockchip_secure_otp, 120
+_u_boot_list_2_driver_2_rockchip_secure_otp:
+	.8byte	.LC17
+	.word	36
+	.zero	4
+	.8byte	rockchip_otp_ids
+	.zero	32
+	.8byte	rockchip_secure_otp_ofdata_to_platdata
+	.zero	28
+	.word	32
+	.zero	8
+	.8byte	rockchip_secure_otp_ops
+	.zero	8
+	.text
+.Letext0:
+	.file 2 "include/common.h"
+	.file 3 "./arch/arm/include/asm/types.h"
+	.file 4 "include/linux/types.h"
+	.file 5 "include/errno.h"
+	.file 6 "include/linux/string.h"
+	.file 7 "include/efi.h"
+	.file 8 "include/dm/device.h"
+	.file 9 "include/ide.h"
+	.file 10 "include/linux/list.h"
+	.file 11 "include/part.h"
+	.file 12 "include/flash.h"
+	.file 13 "include/lmb.h"
+	.file 14 "include/asm-generic/u-boot.h"
+	.file 15 "./arch/arm/include/asm/u-boot-arm.h"
+	.file 16 "include/linux/libfdt_env.h"
+	.file 17 "include/linux/../../scripts/dtc/libfdt/fdt.h"
+	.file 18 "include/linux/libfdt.h"
+	.file 19 "include/image.h"
+	.file 20 "./arch/arm/include/asm/global_data.h"
+	.file 21 "include/asm-generic/global_data.h"
+	.file 22 "include/dm/of.h"
+	.file 23 "include/net.h"
+	.file 24 "include/dm/uclass-id.h"
+	.file 25 "include/dm/ofnode.h"
+	.file 26 "include/malloc.h"
+	.file 27 "include/linux/compat.h"
+	.file 28 "include/dm/uclass.h"
+	.file 29 "include/asm-generic/ioctl.h"
+	.file 30 "include/misc.h"
+	.file 31 "include/rockchip-otp.h"
+	.file 32 "include/dm/read.h"
+	.file 33 "include/linux/delay.h"
+	.file 34 "include/stdio.h"
+	.file 35 "include/log.h"
+	.section	.debug_info,"",@progbits
+.Ldebug_info0:
+	.4byte	0x319a
+	.2byte	0x4
+	.4byte	.Ldebug_abbrev0
+	.byte	0x8
+	.uleb128 0x1
+	.4byte	.LASF455
+	.byte	0xc
+	.4byte	.LASF456
+	.4byte	.LASF457
+	.4byte	.Ldebug_ranges0+0x240
+	.8byte	0
+	.4byte	.Ldebug_line0
+	.uleb128 0x2
+	.4byte	.LASF4
+	.byte	0x2
+	.byte	0xd
+	.4byte	0x34
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x8
+	.4byte	.LASF0
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF1
+	.uleb128 0x3
+	.byte	0x2
+	.byte	0x7
+	.4byte	.LASF2
+	.uleb128 0x4
+	.4byte	.LASF21
+	.byte	0x5
+	.byte	0xc
+	.4byte	0x54
+	.uleb128 0x5
+	.byte	0x4
+	.byte	0x5
+	.string	"int"
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x6
+	.4byte	.LASF3
+	.uleb128 0x2
+	.4byte	.LASF5
+	.byte	0x3
+	.byte	0xc
+	.4byte	0x34
+	.uleb128 0x3
+	.byte	0x2
+	.byte	0x5
+	.4byte	.LASF6
+	.uleb128 0x2
+	.4byte	.LASF7
+	.byte	0x3
+	.byte	0x12
+	.4byte	0x7f
+	.uleb128 0x3
+	.byte	0x4
+	.byte	0x7
+	.4byte	.LASF8
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x5
+	.4byte	.LASF9
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF10
+	.uleb128 0x6
+	.string	"u8"
+	.byte	0x3
+	.byte	0x1f
+	.4byte	0x34
+	.uleb128 0x7
+	.4byte	0x94
+	.uleb128 0x6
+	.string	"u32"
+	.byte	0x3
+	.byte	0x25
+	.4byte	0x7f
+	.uleb128 0x6
+	.string	"u64"
+	.byte	0x3
+	.byte	0x28
+	.4byte	0x8d
+	.uleb128 0x2
+	.4byte	.LASF11
+	.byte	0x3
+	.byte	0x31
+	.4byte	0x8d
+	.uleb128 0x2
+	.4byte	.LASF12
+	.byte	0x3
+	.byte	0x32
+	.4byte	0x8d
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF13
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0xe3
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x8
+	.4byte	.LASF14
+	.uleb128 0x7
+	.4byte	0xdc
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x5
+	.4byte	.LASF15
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0xdc
+	.uleb128 0x2
+	.4byte	.LASF16
+	.byte	0x4
+	.byte	0x59
+	.4byte	0x42
+	.uleb128 0x2
+	.4byte	.LASF17
+	.byte	0x4
+	.byte	0x5b
+	.4byte	0x3b
+	.uleb128 0x2
+	.4byte	.LASF18
+	.byte	0x4
+	.byte	0x69
+	.4byte	0x62
+	.uleb128 0x2
+	.4byte	.LASF19
+	.byte	0x4
+	.byte	0x6b
+	.4byte	0x74
+	.uleb128 0x2
+	.4byte	.LASF20
+	.byte	0x4
+	.byte	0x97
+	.4byte	0x74
+	.uleb128 0x9
+	.byte	0x8
+	.uleb128 0x4
+	.4byte	.LASF22
+	.byte	0x6
+	.byte	0xb
+	.4byte	0xef
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x2
+	.4byte	.LASF23
+	.uleb128 0xa
+	.4byte	0xdc
+	.4byte	0x14b
+	.uleb128 0xb
+	.byte	0
+	.uleb128 0xc
+	.4byte	.LASF24
+	.byte	0x7
+	.2byte	0x140
+	.4byte	0x140
+	.uleb128 0xc
+	.4byte	.LASF25
+	.byte	0x7
+	.2byte	0x143
+	.4byte	0x140
+	.uleb128 0xc
+	.4byte	.LASF26
+	.byte	0x7
+	.2byte	0x143
+	.4byte	0x140
+	.uleb128 0xd
+	.4byte	.LASF45
+	.byte	0xa0
+	.byte	0x8
+	.byte	0x80
+	.4byte	0x254
+	.uleb128 0xe
+	.4byte	.LASF27
+	.byte	0x8
+	.byte	0x81
+	.4byte	0x145b
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF28
+	.byte	0x8
+	.byte	0x82
+	.4byte	0xd6
+	.byte	0x8
+	.uleb128 0xe
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+	.uleb128 0xe
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+	.uleb128 0xe
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+	.uleb128 0xe
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+	.uleb128 0xe
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+	.uleb128 0xe
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+	.uleb128 0xd
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+	.4byte	0x3f9
+	.uleb128 0xf
+	.string	"cnt"
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+	.uleb128 0xe
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+	.uleb128 0x19
+	.string	"lmb"
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+	.uleb128 0x1a
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+	.uleb128 0xe
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+	.uleb128 0xe
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+	.uleb128 0xe
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+	.uleb128 0xe
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+	.uleb128 0xe
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+	.uleb128 0xe
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+	.uleb128 0x1e
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+	.uleb128 0xf
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+	.byte	0x8
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+	.byte	0xb6
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+	.uleb128 0xe
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+	.byte	0x1c
+	.byte	0x55
+	.4byte	0xd6
+	.byte	0
+	.uleb128 0xf
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+	.byte	0x56
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+	.byte	0x8
+	.uleb128 0xe
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+	.byte	0x1c
+	.byte	0x57
+	.4byte	0x14e3
+	.byte	0x10
+	.uleb128 0xe
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+	.uleb128 0xe
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+	.byte	0x1c
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+	.uleb128 0xe
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+	.byte	0x5a
+	.4byte	0x14e3
+	.byte	0x28
+	.uleb128 0xe
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+	.byte	0x1c
+	.byte	0x5b
+	.4byte	0x14e3
+	.byte	0x30
+	.uleb128 0xe
+	.4byte	.LASF369
+	.byte	0x1c
+	.byte	0x5c
+	.4byte	0x14e3
+	.byte	0x38
+	.uleb128 0xe
+	.4byte	.LASF370
+	.byte	0x1c
+	.byte	0x5d
+	.4byte	0x14e3
+	.byte	0x40
+	.uleb128 0xe
+	.4byte	.LASF326
+	.byte	0x1c
+	.byte	0x5e
+	.4byte	0x15e2
+	.byte	0x48
+	.uleb128 0xe
+	.4byte	.LASF397
+	.byte	0x1c
+	.byte	0x5f
+	.4byte	0x15e2
+	.byte	0x50
+	.uleb128 0xe
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+	.byte	0x1c
+	.byte	0x60
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+	.byte	0x58
+	.uleb128 0xe
+	.4byte	.LASF398
+	.byte	0x1c
+	.byte	0x61
+	.4byte	0x54
+	.byte	0x5c
+	.uleb128 0xe
+	.4byte	.LASF399
+	.byte	0x1c
+	.byte	0x62
+	.4byte	0x54
+	.byte	0x60
+	.uleb128 0xe
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+	.byte	0x1c
+	.byte	0x63
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+	.byte	0x64
+	.uleb128 0xe
+	.4byte	.LASF375
+	.byte	0x1c
+	.byte	0x64
+	.4byte	0x54
+	.byte	0x68
+	.uleb128 0xf
+	.string	"ops"
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+	.4byte	0x25a
+	.byte	0x70
+	.uleb128 0xe
+	.4byte	.LASF42
+	.byte	0x1c
+	.byte	0x66
+	.4byte	0x116
+	.byte	0x78
+	.byte	0
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x14e9
+	.uleb128 0x12
+	.4byte	0x54
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+	.uleb128 0x13
+	.4byte	0x149e
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+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x15d3
+	.uleb128 0x4
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+	.byte	0x1d
+	.byte	0x49
+	.4byte	0x7f
+	.uleb128 0x22
+	.4byte	.LASF401
+	.byte	0x4
+	.4byte	0x7f
+	.byte	0x1e
+	.byte	0x15
+	.4byte	0x1622
+	.uleb128 0x23
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+	.byte	0x1
+	.uleb128 0x23
+	.4byte	.LASF403
+	.byte	0x2
+	.uleb128 0x23
+	.4byte	.LASF404
+	.byte	0x4
+	.uleb128 0x23
+	.4byte	.LASF405
+	.byte	0x8
+	.uleb128 0x23
+	.4byte	.LASF406
+	.byte	0x10
+	.byte	0
+	.uleb128 0xd
+	.4byte	.LASF407
+	.byte	0x20
+	.byte	0x1e
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+	.4byte	0x165f
+	.uleb128 0xe
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+	.byte	0x1e
+	.byte	0x6b
+	.4byte	0x1682
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF409
+	.byte	0x1e
+	.byte	0x75
+	.4byte	0x16a6
+	.byte	0x8
+	.uleb128 0xe
+	.4byte	.LASF410
+	.byte	0x1e
+	.byte	0x7f
+	.4byte	0x16c5
+	.byte	0x10
+	.uleb128 0xe
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+	.byte	0x1e
+	.byte	0x8c
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+	.uleb128 0x7
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+	.uleb128 0x12
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+	.byte	0x8
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+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x16cb
+	.uleb128 0xd
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+	.byte	0x20
+	.byte	0x1f
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+	.4byte	0x1736
+	.uleb128 0xe
+	.4byte	.LASF60
+	.byte	0x1f
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+	.4byte	0x12c
+	.byte	0
+	.uleb128 0xe
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+	.byte	0x1f
+	.byte	0x53
+	.4byte	0x3b
+	.byte	0x8
+	.uleb128 0xe
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+	.byte	0x1f
+	.byte	0x54
+	.4byte	0x3b
+	.byte	0x10
+	.uleb128 0xe
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+	.byte	0x1f
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+	.4byte	0x3b
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+	.byte	0
+	.uleb128 0xd
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+	.byte	0x20
+	.byte	0x1
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+	.4byte	0x1773
+	.uleb128 0xe
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+	.byte	0x1
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+	.byte	0
+	.uleb128 0xe
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+	.byte	0x1
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+	.4byte	0x16a6
+	.byte	0x8
+	.uleb128 0xe
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+	.byte	0x1
+	.byte	0x12
+	.4byte	0x1798
+	.byte	0x10
+	.uleb128 0xe
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+	.byte	0x1
+	.byte	0x15
+	.4byte	0x1798
+	.byte	0x18
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+	.uleb128 0x28
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+	.uleb128 0x13
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+	.uleb128 0x13
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+	.uleb128 0x13
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+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x1778
+	.uleb128 0x2e
+	.4byte	.LASF419
+	.byte	0x1
+	.2byte	0x1a4
+	.4byte	0x165f
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	rockchip_secure_otp_ops
+	.uleb128 0x2e
+	.4byte	.LASF420
+	.byte	0x1
+	.2byte	0x1b9
+	.4byte	0x1773
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	rk3328_data
+	.uleb128 0xa
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+	.4byte	0x17da
+	.uleb128 0x11
+	.4byte	0xcf
+	.byte	0x1
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x17ca
+	.uleb128 0x2e
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+	.byte	0x1
+	.2byte	0x1c0
+	.4byte	0x17da
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	rockchip_otp_ids
+	.uleb128 0x2f
+	.4byte	.LASF422
+	.byte	0x1
+	.2byte	0x1c8
+	.4byte	0x129f
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	_u_boot_list_2_driver_2_rockchip_secure_otp
+	.uleb128 0x30
+	.4byte	.LASF423
+	.byte	0x1
+	.2byte	0x1aa
+	.4byte	0x54
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+	.8byte	.LFE279-.LFB279
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x18f8
+	.uleb128 0x31
+	.string	"dev"
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+	.2byte	0x1aa
+	.4byte	0x254
+	.4byte	.LLST17
+	.uleb128 0x32
+	.string	"otp"
+	.byte	0x1
+	.2byte	0x1ac
+	.4byte	0x18f8
+	.4byte	.LLST18
+	.uleb128 0x33
+	.8byte	.LVL26
+	.4byte	0x314d
+	.4byte	0x1865
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x33
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+	.4byte	0x3159
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+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x33
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+	.4byte	0x3164
+	.4byte	0x18a7
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
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+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
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+	.byte	0
+	.uleb128 0x33
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+	.4byte	0x18d1
+	.uleb128 0x34
+	.uleb128 0x1
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+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
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+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
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+	.uleb128 0x34
+	.uleb128 0x1
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+	.uleb128 0x1
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+	.byte	0
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+	.uleb128 0x1
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+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
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+	.uleb128 0x1
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+	.uleb128 0x9
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+	.uleb128 0x1
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+	.uleb128 0x1
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+	.byte	0
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+	.uleb128 0x30
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+	.byte	0x1
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+	.uleb128 0x1
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+	.uleb128 0x31
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+	.4byte	0x254
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+	.uleb128 0x1
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+	.uleb128 0x37
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+	.uleb128 0x1
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+	.uleb128 0x32
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+	.4byte	0x197f
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+	.uleb128 0x3b
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+	.uleb128 0x1
+	.byte	0x9c
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+	.uleb128 0x31
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+	.4byte	0x2eec
+	.4byte	.LLST22
+	.byte	0
+	.uleb128 0x44
+	.8byte	.LBB36
+	.8byte	.LBE36-.LBB36
+	.4byte	0x3139
+	.uleb128 0x4b
+	.4byte	0x2eb7
+	.uleb128 0x4b
+	.4byte	0x2eac
+	.uleb128 0x4c
+	.8byte	.LBB37
+	.8byte	.LBE37-.LBB37
+	.uleb128 0x43
+	.4byte	0x2ec2
+	.uleb128 0x43
+	.4byte	0x2ecd
+	.uleb128 0x35
+	.8byte	.LVL44
+	.4byte	0x3186
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC3
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x35
+	.8byte	.LVL41
+	.4byte	0x317b
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x6a
+	.4byte	.LASF448
+	.4byte	.LASF448
+	.byte	0x8
+	.2byte	0x112
+	.uleb128 0x6b
+	.4byte	.LASF449
+	.4byte	.LASF449
+	.byte	0x20
+	.byte	0x85
+	.uleb128 0x6b
+	.4byte	.LASF450
+	.4byte	.LASF450
+	.byte	0x20
+	.byte	0x38
+	.uleb128 0x6a
+	.4byte	.LASF451
+	.4byte	.LASF451
+	.byte	0x8
+	.2byte	0x16b
+	.uleb128 0x6b
+	.4byte	.LASF452
+	.4byte	.LASF452
+	.byte	0x21
+	.byte	0xb
+	.uleb128 0x6b
+	.4byte	.LASF453
+	.4byte	.LASF453
+	.byte	0x22
+	.byte	0x13
+	.uleb128 0x6a
+	.4byte	.LASF454
+	.4byte	.LASF454
+	.byte	0x1a
+	.2byte	0x393
+	.byte	0
+	.section	.debug_abbrev,"",@progbits
+.Ldebug_abbrev0:
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+	.uleb128 0x11
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+	.uleb128 0x11
+	.uleb128 0x1
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+	.uleb128 0x3b
+	.uleb128 0xb
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+	.uleb128 0x3e
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+	.uleb128 0x4
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+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
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+	.uleb128 0x3e
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+	.uleb128 0x3c
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+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x38
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x39
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x3a
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x20
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x3b
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x3c
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x3d
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x3e
+	.uleb128 0x4109
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x2115
+	.uleb128 0x19
+	.byte	0
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x52
+	.uleb128 0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0x5
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x40
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x41
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x42
+	.uleb128 0xa
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.byte	0
+	.byte	0
+	.uleb128 0x43
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x1c
+	.uleb128 0x6
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x1c
+	.uleb128 0xd
+	.byte	0
+	.byte	0
+	.uleb128 0x47
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x1c
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x48
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x4a
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0x5
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x4b
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x4c
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.byte	0
+	.byte	0
+	.uleb128 0x4d
+	.uleb128 0x4109
+	.byte	0
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x4e
+	.uleb128 0x4109
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x4f
+	.uleb128 0x410a
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2111
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x50
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x20
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x51
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x52
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x53
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x54
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x55
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x34
+	.uleb128 0x19
+	.uleb128 0x1c
+	.uleb128 0xe
+	.byte	0
+	.byte	0
+	.uleb128 0x56
+	.uleb128 0xa
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x57
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x58
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x59
+	.uleb128 0xb
+	.byte	0x1
+	.byte	0
+	.byte	0
+	.uleb128 0x5a
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x5c
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x5d
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x5e
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x5f
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x60
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x34
+	.uleb128 0x19
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x61
+	.uleb128 0xa
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x11
+	.uleb128 0x1
+	.byte	0
+	.byte	0
+	.uleb128 0x62
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x1c
+	.uleb128 0x6
+	.byte	0
+	.byte	0
+	.uleb128 0x63
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x64
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x65
+	.uleb128 0x4109
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.byte	0
+	.byte	0
+	.uleb128 0x66
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x67
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x68
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x20
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x6a
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x6b
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.byte	0
+	.section	.debug_loc,"",@progbits
+.Ldebug_loc0:
+.LLST17:
+	.8byte	.LVL25
+	.8byte	.LVL26-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL26-1
+	.8byte	.LVL33
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL33
+	.8byte	.LFE279
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST18:
+	.8byte	.LVL27
+	.8byte	.LVL28
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL28
+	.8byte	.LVL33
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST4:
+	.8byte	.LVL8
+	.8byte	.LVL9
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL9
+	.8byte	.LFE278
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST5:
+	.8byte	.LVL8
+	.8byte	.LVL11
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xea
+	.byte	0x9f
+	.8byte	.LVL12
+	.8byte	.LFE278
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xea
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST6:
+	.8byte	.LVL10
+	.8byte	.LVL11
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST7:
+	.8byte	.LVL13
+	.8byte	.LVL14-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL14-1
+	.8byte	.LVL17
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL17
+	.8byte	.LVL18-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL18-1
+	.8byte	.LFE276
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST8:
+	.8byte	.LVL13
+	.8byte	.LVL14-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL14-1
+	.8byte	.LVL17
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL17
+	.8byte	.LVL18-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL18-1
+	.8byte	.LFE276
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST9:
+	.8byte	.LVL13
+	.8byte	.LVL14-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL14-1
+	.8byte	.LVL16
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL16
+	.8byte	.LVL18-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL18-1
+	.8byte	.LFE276
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST10:
+	.8byte	.LVL13
+	.8byte	.LVL14-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL14-1
+	.8byte	.LVL16
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL16
+	.8byte	.LVL18-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL18-1
+	.8byte	.LFE276
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST11:
+	.8byte	.LVL14
+	.8byte	.LVL15
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST12:
+	.8byte	.LVL19
+	.8byte	.LVL20-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL20-1
+	.8byte	.LVL23
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL23
+	.8byte	.LVL24-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL24-1
+	.8byte	.LFE275
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST13:
+	.8byte	.LVL19
+	.8byte	.LVL20-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL20-1
+	.8byte	.LVL23
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL23
+	.8byte	.LVL24-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL24-1
+	.8byte	.LFE275
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST14:
+	.8byte	.LVL19
+	.8byte	.LVL20-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL20-1
+	.8byte	.LVL22
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL22
+	.8byte	.LVL24-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL24-1
+	.8byte	.LFE275
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST15:
+	.8byte	.LVL19
+	.8byte	.LVL20-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL20-1
+	.8byte	.LVL22
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL22
+	.8byte	.LVL24-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL24-1
+	.8byte	.LFE275
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST16:
+	.8byte	.LVL20
+	.8byte	.LVL21
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST37:
+	.8byte	.LVL87
+	.8byte	.LVL88-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL88-1
+	.8byte	.LVL95
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 224
+	.8byte	.LVL95
+	.8byte	.LVL96
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 96
+	.8byte	.LVL96
+	.8byte	.LFE274
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 224
+	.8byte	0
+	.8byte	0
+.LLST38:
+	.8byte	.LVL87
+	.8byte	.LVL88-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL88-1
+	.8byte	.LVL92
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL92
+	.8byte	.LVL96
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL96
+	.8byte	.LVL101
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL101
+	.8byte	.LVL102
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL102
+	.8byte	.LVL104
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL104
+	.8byte	.LFE274
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST39:
+	.8byte	.LVL87
+	.8byte	.LVL88-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL88-1
+	.8byte	.LVL95
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 216
+	.8byte	.LVL95
+	.8byte	.LVL96
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 88
+	.8byte	.LVL96
+	.8byte	.LFE274
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 216
+	.8byte	0
+	.8byte	0
+.LLST40:
+	.8byte	.LVL87
+	.8byte	.LVL88-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL88-1
+	.8byte	.LVL93
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL93
+	.8byte	.LVL96
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL96
+	.8byte	.LFE274
+	.2byte	0x1
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST41:
+	.8byte	.LVL89
+	.8byte	.LVL90
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL90
+	.8byte	.LVL94
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL96
+	.8byte	.LFE274
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	0
+	.8byte	0
+.LLST42:
+	.8byte	.LVL89
+	.8byte	.LVL95
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 216
+	.8byte	.LVL95
+	.8byte	.LVL96
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 88
+	.8byte	.LVL96
+	.8byte	.LFE274
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 216
+	.8byte	0
+	.8byte	0
+.LLST43:
+	.8byte	.LVL91
+	.8byte	.LVL92
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL96
+	.8byte	.LVL97
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL97
+	.8byte	.LVL98-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL98-1
+	.8byte	.LVL100
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL102
+	.8byte	.LVL104
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST44:
+	.8byte	.LVL99
+	.8byte	.LVL101
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL102
+	.8byte	.LVL103
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST45:
+	.8byte	.LVL91
+	.8byte	.LVL92
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL96
+	.8byte	.LVL98
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL98
+	.8byte	.LVL99
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL101
+	.8byte	.LVL102
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL106
+	.8byte	.LVL111
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL112
+	.8byte	.LVL138
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL139
+	.8byte	.LFE274
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST46:
+	.8byte	.LVL107
+	.8byte	.LVL111
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 236
+	.8byte	.LVL112
+	.8byte	.LVL138
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 236
+	.8byte	.LVL139
+	.8byte	.LFE274
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 236
+	.8byte	0
+	.8byte	0
+.LLST47:
+	.8byte	.LVL107
+	.8byte	.LVL111
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL112
+	.8byte	.LVL138
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL139
+	.8byte	.LFE274
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST48:
+	.8byte	.LVL107
+	.8byte	.LVL111
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL112
+	.8byte	.LVL138
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL139
+	.8byte	.LFE274
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	0
+	.8byte	0
+.LLST49:
+	.8byte	.LVL107
+	.8byte	.LVL111
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 224
+	.8byte	.LVL112
+	.8byte	.LVL138
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 224
+	.8byte	.LVL139
+	.8byte	.LFE274
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 224
+	.8byte	0
+	.8byte	0
+.LLST50:
+	.8byte	.LVL107
+	.8byte	.LVL111
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL112
+	.8byte	.LVL135
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL135
+	.8byte	.LVL136
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL136
+	.8byte	.LVL138
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL139
+	.8byte	.LVL140
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL140
+	.8byte	.LVL158
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL158
+	.8byte	.LVL159
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL159
+	.8byte	.LVL160
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL160
+	.8byte	.LVL161
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL161
+	.8byte	.LVL167
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL167
+	.8byte	.LVL168
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL168
+	.8byte	.LVL169
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL169
+	.8byte	.LVL170
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL170
+	.8byte	.LVL174
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL174
+	.8byte	.LVL175
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL175
+	.8byte	.LVL176
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL176
+	.8byte	.LVL177
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL177
+	.8byte	.LVL182
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL182
+	.8byte	.LVL183
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL183
+	.8byte	.LVL184
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL184
+	.8byte	.LVL185
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL185
+	.8byte	.LVL191
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL191
+	.8byte	.LVL192
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL199
+	.8byte	.LVL200
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL200
+	.8byte	.LVL201
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL201
+	.8byte	.LVL202
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL202
+	.8byte	.LVL204
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL211
+	.8byte	.LVL212
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST51:
+	.8byte	.LVL109
+	.8byte	.LVL110
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL110
+	.8byte	.LVL111
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL112
+	.8byte	.LVL138
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL139
+	.8byte	.LFE274
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	0
+	.8byte	0
+.LLST52:
+	.8byte	.LVL130
+	.8byte	.LVL132
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL132
+	.8byte	.LVL133
+	.2byte	0x6
+	.byte	0x8c
+	.sleb128 0
+	.byte	0x6
+	.byte	0x23
+	.uleb128 0x1038
+	.8byte	.LVL133
+	.8byte	.LVL138
+	.2byte	0x6
+	.byte	0x83
+	.sleb128 0
+	.byte	0x9
+	.byte	0xf8
+	.byte	0x24
+	.byte	0x9f
+	.8byte	.LVL139
+	.8byte	.LFE274
+	.2byte	0x6
+	.byte	0x83
+	.sleb128 0
+	.byte	0x9
+	.byte	0xf8
+	.byte	0x24
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST53:
+	.8byte	.LVL137
+	.8byte	.LVL139
+	.2byte	0x5
+	.byte	0x11
+	.sleb128 -65533
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST54:
+	.8byte	.LVL192
+	.8byte	.LVL195
+	.2byte	0x3
+	.byte	0x85
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL195
+	.8byte	.LVL196
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL196
+	.8byte	.LVL199
+	.2byte	0x3
+	.byte	0x85
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST55:
+	.8byte	.LVL194
+	.8byte	.LVL197
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST56:
+	.8byte	.LVL193
+	.8byte	.LVL197
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST57:
+	.8byte	.LVL201
+	.8byte	.LVL204
+	.2byte	0x5
+	.byte	0x11
+	.sleb128 -65534
+	.byte	0x9f
+	.8byte	.LVL206
+	.8byte	.LFE274
+	.2byte	0x5
+	.byte	0x11
+	.sleb128 -65534
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST58:
+	.8byte	.LVL201
+	.8byte	.LVL204
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL207
+	.8byte	.LFE274
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST59:
+	.8byte	.LVL201
+	.8byte	.LVL204
+	.2byte	0x3
+	.byte	0x8
+	.byte	0xbf
+	.byte	0x9f
+	.8byte	.LVL208
+	.8byte	.LFE274
+	.2byte	0x3
+	.byte	0x8
+	.byte	0xbf
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST60:
+	.8byte	.LVL201
+	.8byte	.LVL204
+	.2byte	0x6
+	.byte	0xc
+	.4byte	0x10001
+	.byte	0x9f
+	.8byte	.LVL209
+	.8byte	.LFE274
+	.2byte	0x6
+	.byte	0xc
+	.4byte	0x10001
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST61:
+	.8byte	.LVL212
+	.8byte	.LVL215
+	.2byte	0x3
+	.byte	0x85
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL215
+	.8byte	.LVL217
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL217
+	.8byte	.LVL218
+	.2byte	0x3
+	.byte	0x85
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST62:
+	.8byte	.LVL214
+	.8byte	.LVL216
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST63:
+	.8byte	.LVL213
+	.8byte	.LVL216
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST23:
+	.8byte	.LVL47
+	.8byte	.LVL48-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL48-1
+	.8byte	.LVL62
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL62
+	.8byte	.LFE272
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST24:
+	.8byte	.LVL47
+	.8byte	.LVL48-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL48-1
+	.8byte	.LVL67
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL67
+	.8byte	.LVL68
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL68
+	.8byte	.LVL80
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL82
+	.8byte	.LFE272
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST25:
+	.8byte	.LVL47
+	.8byte	.LVL48-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL48-1
+	.8byte	.LVL64
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL64
+	.8byte	.LFE272
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST26:
+	.8byte	.LVL47
+	.8byte	.LVL48-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL48-1
+	.8byte	.LVL63
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL63
+	.8byte	.LVL64
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL64
+	.8byte	.LFE272
+	.2byte	0x6
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x31
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST27:
+	.8byte	.LVL49
+	.8byte	.LVL50
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL50
+	.8byte	.LVL80
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL82
+	.8byte	.LFE272
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST28:
+	.8byte	.LVL52
+	.8byte	.LVL53
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL53
+	.8byte	.LVL79
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL82
+	.8byte	.LFE272
+	.2byte	0x1
+	.byte	0x69
+	.8byte	0
+	.8byte	0
+.LLST29:
+	.8byte	.LVL52
+	.8byte	.LVL81
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL82
+	.8byte	.LVL86
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL86
+	.8byte	.LFE272
+	.2byte	0x3
+	.byte	0x86
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST30:
+	.8byte	.LVL52
+	.8byte	.LVL64
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL64
+	.8byte	.LVL66
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL67
+	.8byte	.LVL75
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL75
+	.8byte	.LVL76
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL76
+	.8byte	.LVL78
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL82
+	.8byte	.LVL83
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL83
+	.8byte	.LFE272
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST34:
+	.8byte	.LVL69
+	.8byte	.LVL71
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL71
+	.8byte	.LVL72
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 260
+	.8byte	.LVL72
+	.8byte	.LVL73
+	.2byte	0x6
+	.byte	0x83
+	.sleb128 0
+	.byte	0x6
+	.byte	0x23
+	.uleb128 0x104
+	.8byte	.LVL73
+	.8byte	.LVL77
+	.2byte	0x8
+	.byte	0x84
+	.sleb128 -1
+	.byte	0x11
+	.sleb128 -65536
+	.byte	0x21
+	.byte	0x9f
+	.8byte	.LVL82
+	.8byte	.LFE272
+	.2byte	0x8
+	.byte	0x84
+	.sleb128 -1
+	.byte	0x11
+	.sleb128 -65536
+	.byte	0x21
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST35:
+	.8byte	.LVL70
+	.8byte	.LVL77
+	.2byte	0x6
+	.byte	0xc
+	.4byte	0x10001
+	.byte	0x9f
+	.8byte	.LVL82
+	.8byte	.LFE272
+	.2byte	0x6
+	.byte	0xc
+	.4byte	0x10001
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST36:
+	.8byte	.LVL77
+	.8byte	.LVL78
+	.2byte	0x4
+	.byte	0x40
+	.byte	0x3c
+	.byte	0x24
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST31:
+	.8byte	.LVL54
+	.8byte	.LVL61
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST32:
+	.8byte	.LVL54
+	.8byte	.LVL61
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST33:
+	.8byte	.LVL54
+	.8byte	.LVL59
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL59
+	.8byte	.LVL60
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST2:
+	.8byte	.LVL4
+	.8byte	.LVL7
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL7
+	.8byte	.LFE267
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST3:
+	.8byte	.LVL4
+	.8byte	.LVL5
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL5
+	.8byte	.LFE267
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST0:
+	.8byte	.LVL0
+	.8byte	.LVL3
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL3
+	.8byte	.LFE266
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST1:
+	.8byte	.LVL0
+	.8byte	.LVL1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1
+	.8byte	.LFE266
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST19:
+	.8byte	.LVL34
+	.8byte	.LVL35
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL35
+	.8byte	.LVL37
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL37
+	.8byte	.LVL39
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL39
+	.8byte	.LVL45
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL45
+	.8byte	.LFE281
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST20:
+	.8byte	.LVL35
+	.8byte	.LVL41
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL41
+	.8byte	.LVL42
+	.2byte	0x3
+	.byte	0x84
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL42
+	.8byte	.LVL46
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST21:
+	.8byte	.LVL36
+	.8byte	.LVL38
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL39
+	.8byte	.LVL40
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST22:
+	.8byte	.LVL37
+	.8byte	.LVL39
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+	.section	.debug_aranges,"",@progbits
+	.4byte	0xac
+	.2byte	0x2
+	.4byte	.Ldebug_info0
+	.byte	0x8
+	.byte	0
+	.2byte	0
+	.2byte	0
+	.8byte	.LFB266
+	.8byte	.LFE266-.LFB266
+	.8byte	.LFB267
+	.8byte	.LFE267-.LFB267
+	.8byte	.LFB278
+	.8byte	.LFE278-.LFB278
+	.8byte	.LFB276
+	.8byte	.LFE276-.LFB276
+	.8byte	.LFB275
+	.8byte	.LFE275-.LFB275
+	.8byte	.LFB279
+	.8byte	.LFE279-.LFB279
+	.8byte	.LFB281
+	.8byte	.LFE281-.LFB281
+	.8byte	.LFB272
+	.8byte	.LFE272-.LFB272
+	.8byte	.LFB274
+	.8byte	.LFE274-.LFB274
+	.8byte	0
+	.8byte	0
+	.section	.debug_ranges,"",@progbits
+.Ldebug_ranges0:
+	.8byte	.LBB58
+	.8byte	.LBE58
+	.8byte	.LBB59
+	.8byte	.LBE59
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB61
+	.8byte	.LBE61
+	.8byte	.LBB62
+	.8byte	.LBE62
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB63
+	.8byte	.LBE63
+	.8byte	.LBB64
+	.8byte	.LBE64
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB133
+	.8byte	.LBE133
+	.8byte	.LBB211
+	.8byte	.LBE211
+	.8byte	.LBB212
+	.8byte	.LBE212
+	.8byte	.LBB213
+	.8byte	.LBE213
+	.8byte	.LBB214
+	.8byte	.LBE214
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB154
+	.8byte	.LBE154
+	.8byte	.LBB155
+	.8byte	.LBE155
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB156
+	.8byte	.LBE156
+	.8byte	.LBB157
+	.8byte	.LBE157
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB174
+	.8byte	.LBE174
+	.8byte	.LBB175
+	.8byte	.LBE175
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB180
+	.8byte	.LBE180
+	.8byte	.LBB181
+	.8byte	.LBE181
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB184
+	.8byte	.LBE184
+	.8byte	.LBB185
+	.8byte	.LBE185
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB189
+	.8byte	.LBE189
+	.8byte	.LBB190
+	.8byte	.LBE190
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB195
+	.8byte	.LBE195
+	.8byte	.LBB196
+	.8byte	.LBE196
+	.8byte	0
+	.8byte	0
+	.8byte	.LFB266
+	.8byte	.LFE266
+	.8byte	.LFB267
+	.8byte	.LFE267
+	.8byte	.LFB278
+	.8byte	.LFE278
+	.8byte	.LFB276
+	.8byte	.LFE276
+	.8byte	.LFB275
+	.8byte	.LFE275
+	.8byte	.LFB279
+	.8byte	.LFE279
+	.8byte	.LFB281
+	.8byte	.LFE281
+	.8byte	.LFB272
+	.8byte	.LFE272
+	.8byte	.LFB274
+	.8byte	.LFE274
+	.8byte	0
+	.8byte	0
+	.section	.debug_line,"",@progbits
+.Ldebug_line0:
+	.section	.debug_str,"MS",@progbits,1
+.LASF30:
+	.string	"parent_platdata"
+.LASF444:
+	.string	"otp_cru_rst"
+.LASF100:
+	.string	"off_mem_rsvmap"
+.LASF183:
+	.string	"UCLASS_I2C_EEPROM"
+.LASF458:
+	.string	"jt_funcs"
+.LASF188:
+	.string	"UCLASS_IRQ"
+.LASF150:
+	.string	"initrd_start"
+.LASF182:
+	.string	"UCLASS_I2C"
+.LASF13:
+	.string	"sizetype"
+.LASF337:
+	.string	"net_hostname"
+.LASF54:
+	.string	"start"
+.LASF223:
+	.string	"UCLASS_SPI"
+.LASF312:
+	.string	"child"
+.LASF186:
+	.string	"UCLASS_I2S"
+.LASF359:
+	.string	"NETLOOP_RESTART"
+.LASF428:
+	.string	"otp_data"
+.LASF184:
+	.string	"UCLASS_I2C_GENERIC"
+.LASF196:
+	.string	"UCLASS_MOD_EXP"
+.LASF246:
+	.string	"UCLASS_IO_DOMAIN"
+.LASF265:
+	.string	"using_pre_serial"
+.LASF37:
+	.string	"uclass_priv"
+.LASF217:
+	.string	"UCLASS_RKNAND"
+.LASF159:
+	.string	"UCLASS_DEMO"
+.LASF405:
+	.string	"OTP_S"
+.LASF108:
+	.string	"ih_magic"
+.LASF46:
+	.string	"list_head"
+.LASF370:
+	.string	"child_pre_probe"
+.LASF423:
+	.string	"rockchip_secure_otp_ofdata_to_platdata"
+.LASF304:
+	.string	"pm_ctx_phys"
+.LASF163:
+	.string	"UCLASS_TEST_PROBE"
+.LASF310:
+	.string	"full_name"
+.LASF242:
+	.string	"UCLASS_KEY"
+.LASF80:
+	.string	"bi_intfreq"
+.LASF434:
+	.string	"__func__"
+.LASF11:
+	.string	"phys_addr_t"
+.LASF409:
+	.string	"write"
+.LASF237:
+	.string	"UCLASS_VIDEO_BRIDGE"
+.LASF303:
+	.string	"video_bottom"
+.LASF5:
+	.string	"__u8"
+.LASF358:
+	.string	"NETLOOP_CONTINUE"
+.LASF226:
+	.string	"UCLASS_SPI_GENERIC"
+.LASF298:
+	.string	"malloc_base"
+.LASF449:
+	.string	"dev_read_addr_ptr"
+.LASF56:
+	.string	"flash_info_t"
+.LASF201:
+	.string	"UCLASS_PANEL"
+.LASF125:
+	.string	"comp"
+.LASF120:
+	.string	"image_header_t"
+.LASF155:
+	.string	"state"
+.LASF176:
+	.string	"UCLASS_CROS_EC"
+.LASF74:
+	.string	"bi_dsp_freq"
+.LASF421:
+	.string	"rockchip_otp_ids"
+.LASF122:
+	.string	"image_start"
+.LASF161:
+	.string	"UCLASS_TEST_FDT"
+.LASF65:
+	.string	"bd_info"
+.LASF356:
+	.string	"uclass_id"
+.LASF112:
+	.string	"ih_load"
+.LASF403:
+	.string	"DECOM_GZIP"
+.LASF317:
+	.string	"__dtb_dt_spl_begin"
+.LASF396:
+	.string	"pre_remove"
+.LASF439:
+	.string	"delay"
+.LASF429:
+	.string	"secure_otp_read"
+.LASF7:
+	.string	"__u32"
+.LASF35:
+	.string	"priv"
+.LASF301:
+	.string	"cur_serial_dev"
+.LASF343:
+	.string	"net_tx_packet"
+.LASF241:
+	.string	"UCLASS_FG"
+.LASF342:
+	.string	"net_server_ip"
+.LASF459:
+	.string	"ofnode_union"
+.LASF350:
+	.string	"net_native_vlan"
+.LASF239:
+	.string	"UCLASS_VIDEO_CRTC"
+.LASF175:
+	.string	"UCLASS_CODEC"
+.LASF295:
+	.string	"env_buf"
+.LASF433:
+	.string	"rockchip_secure_otp_write_byte"
+.LASF21:
+	.string	"errno"
+.LASF15:
+	.string	"long int"
+.LASF400:
+	.string	"__invalid_size_argument_for_IOC"
+.LASF69:
+	.string	"bi_flashsize"
+.LASF29:
+	.string	"platdata"
+.LASF206:
+	.string	"UCLASS_PHY"
+.LASF426:
+	.string	"secure_otp_write"
+.LASF93:
+	.string	"IRQ_STACK_START_IN"
+.LASF104:
+	.string	"size_dt_strings"
+.LASF236:
+	.string	"UCLASS_VIDEO"
+.LASF279:
+	.string	"relocaddr"
+.LASF387:
+	.string	"dev_head"
+.LASF410:
+	.string	"ioctl"
+.LASF353:
+	.string	"net_boot_file_size"
+.LASF114:
+	.string	"ih_dcrc"
+.LASF79:
+	.string	"bi_ethspeed"
+.LASF158:
+	.string	"UCLASS_ROOT"
+.LASF44:
+	.string	"ide_bus_offset"
+.LASF340:
+	.string	"net_server_ethaddr"
+.LASF82:
+	.string	"bi_arch_number"
+.LASF3:
+	.string	"signed char"
+.LASF189:
+	.string	"UCLASS_KEYBOARD"
+.LASF18:
+	.string	"uint8_t"
+.LASF422:
+	.string	"_u_boot_list_2_driver_2_rockchip_secure_otp"
+.LASF375:
+	.string	"per_child_platdata_auto_alloc_size"
+.LASF45:
+	.string	"udevice"
+.LASF452:
+	.string	"udelay"
+.LASF116:
+	.string	"ih_arch"
+.LASF97:
+	.string	"totalsize"
+.LASF109:
+	.string	"ih_hcrc"
+.LASF281:
+	.string	"mon_len"
+.LASF411:
+	.string	"call"
+.LASF124:
+	.string	"load"
+.LASF231:
+	.string	"UCLASS_TPM"
+.LASF59:
+	.string	"lmb_property"
+.LASF102:
+	.string	"last_comp_version"
+.LASF0:
+	.string	"unsigned char"
+.LASF84:
+	.string	"bi_andr_version"
+.LASF157:
+	.string	"images"
+.LASF245:
+	.string	"UCLASS_DVFS"
+.LASF75:
+	.string	"bi_ddr_freq"
+.LASF190:
+	.string	"UCLASS_LED"
+.LASF111:
+	.string	"ih_size"
+.LASF39:
+	.string	"uclass_node"
+.LASF220:
+	.string	"UCLASS_SCMI_AGENT"
+.LASF412:
+	.string	"rockchip_otp_platdata"
+.LASF249:
+	.string	"UCLASS_MDIO"
+.LASF23:
+	.string	"_Bool"
+.LASF376:
+	.string	"property"
+.LASF432:
+	.string	"rockchip_secure_otp_capability"
+.LASF362:
+	.string	"net_state"
+.LASF378:
+	.string	"value"
+.LASF438:
+	.string	"rockchip_secure_otp_check_flag"
+.LASF185:
+	.string	"UCLASS_I2C_MUX"
+.LASF14:
+	.string	"char"
+.LASF25:
+	.string	"_binary_u_boot_bin_start"
+.LASF235:
+	.string	"UCLASS_USB_GADGET_GENERIC"
+.LASF360:
+	.string	"NETLOOP_SUCCESS"
+.LASF36:
+	.string	"uclass"
+.LASF384:
+	.string	"p_current"
+.LASF386:
+	.string	"uc_drv"
+.LASF357:
+	.string	"net_loop_state"
+.LASF43:
+	.string	"req_seq"
+.LASF313:
+	.string	"sibling"
+.LASF287:
+	.string	"dm_root_f"
+.LASF324:
+	.string	"enetaddr"
+.LASF174:
+	.string	"UCLASS_AMP"
+.LASF212:
+	.string	"UCLASS_PWRSEQ"
+.LASF379:
+	.string	"of_offset"
+.LASF140:
+	.string	"fit_hdr_fdt"
+.LASF351:
+	.string	"net_restart_wrap"
+.LASF339:
+	.string	"net_ethaddr"
+.LASF42:
+	.string	"flags"
+.LASF454:
+	.string	"malloc_simple"
+.LASF117:
+	.string	"ih_type"
+.LASF98:
+	.string	"off_dt_struct"
+.LASF70:
+	.string	"bi_flashoffset"
+.LASF352:
+	.string	"net_boot_file_name"
+.LASF389:
+	.string	"compatible"
+.LASF160:
+	.string	"UCLASS_TEST"
+.LASF110:
+	.string	"ih_time"
+.LASF274:
+	.string	"fb_base"
+.LASF271:
+	.string	"bus_clk"
+.LASF213:
+	.string	"UCLASS_RAM"
+.LASF179:
+	.string	"UCLASS_ETH"
+.LASF32:
+	.string	"node"
+.LASF121:
+	.string	"image_info"
+.LASF127:
+	.string	"arch"
+.LASF273:
+	.string	"mem_clk"
+.LASF270:
+	.string	"cpu_clk"
+.LASF50:
+	.string	"select_hwpart"
+.LASF344:
+	.string	"net_rx_packets"
+.LASF381:
+	.string	"mem_malloc_start"
+.LASF440:
+	.string	"rockchip_secure_otp_wait_flag"
+.LASF92:
+	.string	"_datarelro_start_ofs"
+.LASF17:
+	.string	"ulong"
+.LASF113:
+	.string	"ih_ep"
+.LASF61:
+	.string	"lmb_region"
+.LASF394:
+	.string	"pre_probe"
+.LASF453:
+	.string	"printf"
+.LASF404:
+	.string	"DECOM_ZLIB"
+.LASF135:
+	.string	"fit_uname_os"
+.LASF76:
+	.string	"bi_bootflags"
+.LASF341:
+	.string	"net_ip"
+.LASF441:
+	.string	"rockchip_secure_otp_wait_status"
+.LASF293:
+	.string	"fdt_size"
+.LASF335:
+	.string	"net_dns_server"
+.LASF420:
+	.string	"rk3328_data"
+.LASF355:
+	.string	"net_ping_ip"
+.LASF63:
+	.string	"memory"
+.LASF95:
+	.string	"fdt_header"
+.LASF382:
+	.string	"mem_malloc_end"
+.LASF192:
+	.string	"UCLASS_MAILBOX"
+.LASF147:
+	.string	"rd_end"
+.LASF456:
+	.string	"drivers/misc/rk3328-secure-otp.c"
+.LASF364:
+	.string	"bind"
+.LASF282:
+	.string	"irq_sp"
+.LASF152:
+	.string	"cmdline_start"
+.LASF331:
+	.string	"index"
+.LASF269:
+	.string	"global_data"
+.LASF398:
+	.string	"per_device_auto_alloc_size"
+.LASF457:
+	.string	"/home2/chenp/work/u-boot"
+.LASF221:
+	.string	"UCLASS_SCSI"
+.LASF233:
+	.string	"UCLASS_USB_DEV_GENERIC"
+.LASF193:
+	.string	"UCLASS_MASS_STORAGE"
+.LASF1:
+	.string	"long unsigned int"
+.LASF168:
+	.string	"UCLASS_SIMPLE_BUS"
+.LASF314:
+	.string	"gd_t"
+.LASF336:
+	.string	"net_nis_domain"
+.LASF142:
+	.string	"fit_noffset_fdt"
+.LASF447:
+	.string	"rk3328_spl_rockchip_otp_start"
+.LASF419:
+	.string	"rockchip_secure_otp_ops"
+.LASF361:
+	.string	"NETLOOP_FAIL"
+.LASF240:
+	.string	"UCLASS_WDT"
+.LASF259:
+	.string	"timer_reset_value"
+.LASF283:
+	.string	"start_addr_sp"
+.LASF71:
+	.string	"bi_sramstart"
+.LASF26:
+	.string	"_binary_u_boot_bin_end"
+.LASF284:
+	.string	"reloc_off"
+.LASF103:
+	.string	"boot_cpuid_phys"
+.LASF258:
+	.string	"lastinc"
+.LASF262:
+	.string	"tlb_fillptr"
+.LASF138:
+	.string	"fit_uname_rd"
+.LASF227:
+	.string	"UCLASS_SYSCON"
+.LASF173:
+	.string	"UCLASS_CPU"
+.LASF133:
+	.string	"fit_uname_cfg"
+.LASF222:
+	.string	"UCLASS_SERIAL"
+.LASF349:
+	.string	"net_our_vlan"
+.LASF305:
+	.string	"serial"
+.LASF446:
+	.string	"rk3328_spl_rockchip_otp_stop"
+.LASF365:
+	.string	"probe"
+.LASF171:
+	.string	"UCLASS_BLK"
+.LASF128:
+	.string	"image_info_t"
+.LASF167:
+	.string	"UCLASS_USB_EMUL"
+.LASF260:
+	.string	"tlb_addr"
+.LASF205:
+	.string	"UCLASS_PCI_GENERIC"
+.LASF123:
+	.string	"image_len"
+.LASF77:
+	.string	"bi_ip_addr"
+.LASF207:
+	.string	"UCLASS_PINCONFIG"
+.LASF327:
+	.string	"send"
+.LASF229:
+	.string	"UCLASS_THERMAL"
+.LASF131:
+	.string	"legacy_hdr_os_copy"
+.LASF9:
+	.string	"long long int"
+.LASF401:
+	.string	"misc_mode"
+.LASF292:
+	.string	"new_fdt"
+.LASF22:
+	.string	"___strtok"
+.LASF354:
+	.string	"net_boot_file_expected_size_in_blocks"
+.LASF266:
+	.string	"enable"
+.LASF363:
+	.string	"of_match"
+.LASF200:
+	.string	"UCLASS_NVME"
+.LASF263:
+	.string	"tlb_emerg"
+.LASF129:
+	.string	"bootm_headers"
+.LASF55:
+	.string	"protect"
+.LASF232:
+	.string	"UCLASS_USB"
+.LASF391:
+	.string	"uclass_driver"
+.LASF243:
+	.string	"UCLASS_RC"
+.LASF296:
+	.string	"timebase_h"
+.LASF297:
+	.string	"timebase_l"
+.LASF177:
+	.string	"UCLASS_DISPLAY"
+.LASF348:
+	.string	"net_null_ethaddr"
+.LASF277:
+	.string	"env_valid"
+.LASF34:
+	.string	"parent"
+.LASF166:
+	.string	"UCLASS_PCI_EMUL"
+.LASF435:
+	.string	"rockchip_secure_otp_read"
+.LASF38:
+	.string	"parent_priv"
+.LASF406:
+	.string	"OTP_NS"
+.LASF244:
+	.string	"UCLASS_CHARGE_DISPLAY"
+.LASF318:
+	.string	"load_addr"
+.LASF134:
+	.string	"fit_hdr_os"
+.LASF90:
+	.string	"_datarelrolocal_start_ofs"
+.LASF451:
+	.string	"dev_get_driver_data"
+.LASF418:
+	.string	"spl_rockchip_otp_stop"
+.LASF268:
+	.string	"addr"
+.LASF408:
+	.string	"read"
+.LASF445:
+	.string	"mask"
+.LASF8:
+	.string	"unsigned int"
+.LASF16:
+	.string	"ushort"
+.LASF323:
+	.string	"eth_device"
+.LASF450:
+	.string	"dev_read_u32_default"
+.LASF291:
+	.string	"ufdt_blob"
+.LASF372:
+	.string	"priv_auto_alloc_size"
+.LASF299:
+	.string	"malloc_limit"
+.LASF209:
+	.string	"UCLASS_PMIC"
+.LASF443:
+	.string	"secure_conf"
+.LASF130:
+	.string	"legacy_hdr_os"
+.LASF99:
+	.string	"off_dt_strings"
+.LASF315:
+	.string	"monitor_flash_len"
+.LASF194:
+	.string	"UCLASS_MISC"
+.LASF67:
+	.string	"bi_memsize"
+.LASF442:
+	.string	"flag"
+.LASF24:
+	.string	"image_base"
+.LASF228:
+	.string	"UCLASS_SYSRESET"
+.LASF385:
+	.string	"current"
+.LASF181:
+	.string	"UCLASS_FIRMWARE"
+.LASF191:
+	.string	"UCLASS_LPC"
+.LASF427:
+	.string	"offset"
+.LASF187:
+	.string	"UCLASS_IDE"
+.LASF407:
+	.string	"misc_ops"
+.LASF309:
+	.string	"phandle"
+.LASF302:
+	.string	"video_top"
+.LASF399:
+	.string	"per_device_platdata_auto_alloc_size"
+.LASF156:
+	.string	"bootm_headers_t"
+.LASF73:
+	.string	"bi_arm_freq"
+.LASF215:
+	.string	"UCLASS_REMOTEPROC"
+.LASF328:
+	.string	"recv"
+.LASF126:
+	.string	"type"
+.LASF137:
+	.string	"fit_hdr_rd"
+.LASF276:
+	.string	"env_addr"
+.LASF72:
+	.string	"bi_sramsize"
+.LASF288:
+	.string	"uclass_root"
+.LASF180:
+	.string	"UCLASS_GPIO"
+.LASF415:
+	.string	"otp_cru_rst_base"
+.LASF461:
+	.string	"read_end"
+.LASF210:
+	.string	"UCLASS_PWM"
+.LASF58:
+	.string	"long double"
+.LASF278:
+	.string	"ram_top"
+.LASF307:
+	.string	"console_evt"
+.LASF146:
+	.string	"rd_start"
+.LASF460:
+	.string	"write_end"
+.LASF211:
+	.string	"UCLASS_POWER_DOMAIN"
+.LASF214:
+	.string	"UCLASS_REGULATOR"
+.LASF320:
+	.string	"save_size"
+.LASF172:
+	.string	"UCLASS_CLK"
+.LASF31:
+	.string	"uclass_platdata"
+.LASF448:
+	.string	"dev_get_platdata"
+.LASF325:
+	.string	"iobase"
+.LASF89:
+	.string	"_datarel_start_ofs"
+.LASF264:
+	.string	"pre_serial"
+.LASF455:
+	.ascii	"GNU C11 6.3.1 201"
+	.string	"70404 -mstrict-align -march=armv8-a+nosimd -mlittle-endian -mabi=lp64 -g -Os -fno-builtin -ffreestanding -fshort-wchar -fno-stack-protector -fno-delete-null-pointer-checks -fstack-usage -ffunction-sections -fdata-sections -ffixed-r9 -fno-common -ffixed-x18"
+.LASF119:
+	.string	"ih_name"
+.LASF115:
+	.string	"ih_os"
+.LASF153:
+	.string	"cmdline_end"
+.LASF345:
+	.string	"net_rx_packet"
+.LASF255:
+	.string	"LOGF_MAX_CATEGORIES"
+.LASF290:
+	.string	"fdt_blob"
+.LASF388:
+	.string	"udevice_id"
+.LASF51:
+	.string	"size"
+.LASF10:
+	.string	"long long unsigned int"
+.LASF397:
+	.string	"destroy"
+.LASF107:
+	.string	"image_header"
+.LASF377:
+	.string	"length"
+.LASF20:
+	.string	"__be32"
+.LASF68:
+	.string	"bi_flashstart"
+.LASF136:
+	.string	"fit_noffset_os"
+.LASF195:
+	.string	"UCLASS_MMC"
+.LASF330:
+	.string	"write_hwaddr"
+.LASF254:
+	.string	"UCLASS_INVALID"
+.LASF234:
+	.string	"UCLASS_USB_HUB"
+.LASF371:
+	.string	"child_post_remove"
+.LASF41:
+	.string	"sibling_node"
+.LASF294:
+	.string	"of_root"
+.LASF250:
+	.string	"UCLASS_EBC"
+.LASF57:
+	.string	"flash_info"
+.LASF101:
+	.string	"version"
+.LASF329:
+	.string	"halt"
+.LASF62:
+	.string	"region"
+.LASF105:
+	.string	"size_dt_struct"
+.LASF286:
+	.string	"dm_root"
+.LASF252:
+	.string	"UCLASS_RNG"
+.LASF306:
+	.string	"sys_start_tick"
+.LASF311:
+	.string	"properties"
+.LASF197:
+	.string	"UCLASS_MTD"
+.LASF94:
+	.string	"fdt32_t"
+.LASF285:
+	.string	"new_gd"
+.LASF199:
+	.string	"UCLASS_NORTHBRIDGE"
+.LASF78:
+	.string	"bi_enetaddr"
+.LASF369:
+	.string	"child_post_bind"
+.LASF321:
+	.string	"in_addr"
+.LASF346:
+	.string	"net_rx_packet_len"
+.LASF326:
+	.string	"init"
+.LASF437:
+	.string	"rockchip_secure_otp_ecc_enable"
+.LASF316:
+	.string	"__dtb_dt_begin"
+.LASF216:
+	.string	"UCLASS_RESET"
+.LASF139:
+	.string	"fit_noffset_rd"
+.LASF170:
+	.string	"UCLASS_AHCI"
+.LASF12:
+	.string	"phys_size_t"
+.LASF27:
+	.string	"driver"
+.LASF88:
+	.string	"FIQ_STACK_START"
+.LASF154:
+	.string	"verify"
+.LASF380:
+	.string	"ofnode"
+.LASF28:
+	.string	"name"
+.LASF436:
+	.string	"buffer"
+.LASF251:
+	.string	"UCLASS_EINK_DISPLAY"
+.LASF202:
+	.string	"UCLASS_PANEL_BACKLIGHT"
+.LASF230:
+	.string	"UCLASS_TIMER"
+.LASF225:
+	.string	"UCLASS_SPI_FLASH"
+.LASF275:
+	.string	"have_console"
+.LASF81:
+	.string	"bi_busfreq"
+.LASF6:
+	.string	"short int"
+.LASF414:
+	.string	"otp_mask_base"
+.LASF208:
+	.string	"UCLASS_PINCTRL"
+.LASF218:
+	.string	"UCLASS_RAMDISK"
+.LASF165:
+	.string	"UCLASS_I2C_EMUL"
+.LASF224:
+	.string	"UCLASS_SPMI"
+.LASF366:
+	.string	"remove"
+.LASF162:
+	.string	"UCLASS_TEST_BUS"
+.LASF319:
+	.string	"save_addr"
+.LASF374:
+	.string	"per_child_auto_alloc_size"
+.LASF300:
+	.string	"malloc_ptr"
+.LASF413:
+	.string	"secure_conf_base"
+.LASF151:
+	.string	"initrd_end"
+.LASF393:
+	.string	"pre_unbind"
+.LASF416:
+	.string	"secure_otp_data"
+.LASF267:
+	.string	"baudrate"
+.LASF91:
+	.string	"_datarellocal_start_ofs"
+.LASF40:
+	.string	"child_head"
+.LASF256:
+	.string	"arch_global_data"
+.LASF253:
+	.string	"UCLASS_COUNT"
+.LASF272:
+	.string	"pci_clk"
+.LASF49:
+	.string	"block_drvr"
+.LASF53:
+	.string	"flash_id"
+.LASF247:
+	.string	"UCLASS_CRYPTO"
+.LASF308:
+	.string	"device_node"
+.LASF280:
+	.string	"ram_size"
+.LASF145:
+	.string	"fit_noffset_setup"
+.LASF106:
+	.string	"working_fdt"
+.LASF289:
+	.string	"fdt_blob_kern"
+.LASF338:
+	.string	"net_root_path"
+.LASF178:
+	.string	"UCLASS_DMA"
+.LASF86:
+	.string	"bd_t"
+.LASF322:
+	.string	"s_addr"
+.LASF425:
+	.string	"request"
+.LASF395:
+	.string	"post_probe"
+.LASF347:
+	.string	"net_bcast_ethaddr"
+.LASF83:
+	.string	"bi_boot_params"
+.LASF417:
+	.string	"spl_rockchip_otp_start"
+.LASF19:
+	.string	"uint32_t"
+.LASF383:
+	.string	"mem_malloc_brk"
+.LASF333:
+	.string	"net_gateway"
+.LASF373:
+	.string	"platdata_auto_alloc_size"
+.LASF66:
+	.string	"bi_memstart"
+.LASF402:
+	.string	"DECOM_LZ4"
+.LASF238:
+	.string	"UCLASS_VIDEO_CONSOLE"
+.LASF332:
+	.string	"eth_current"
+.LASF368:
+	.string	"ofdata_to_platdata"
+.LASF64:
+	.string	"reserved"
+.LASF462:
+	.string	"free"
+.LASF85:
+	.string	"bi_dram"
+.LASF2:
+	.string	"short unsigned int"
+.LASF96:
+	.string	"magic"
+.LASF143:
+	.string	"fit_hdr_setup"
+.LASF132:
+	.string	"legacy_hdr_valid"
+.LASF60:
+	.string	"base"
+.LASF219:
+	.string	"UCLASS_RTC"
+.LASF257:
+	.string	"timer_rate_hz"
+.LASF52:
+	.string	"sector_count"
+.LASF118:
+	.string	"ih_comp"
+.LASF392:
+	.string	"post_bind"
+.LASF430:
+	.string	"rockchip_secure_otp_write"
+.LASF367:
+	.string	"unbind"
+.LASF148:
+	.string	"ft_addr"
+.LASF248:
+	.string	"UCLASS_ETH_PHY"
+.LASF431:
+	.string	"temp"
+.LASF4:
+	.string	"uchar"
+.LASF149:
+	.string	"ft_len"
+.LASF47:
+	.string	"next"
+.LASF424:
+	.string	"secure_otp_ioctl"
+.LASF390:
+	.string	"data"
+.LASF198:
+	.string	"UCLASS_NOP"
+.LASF144:
+	.string	"fit_uname_setup"
+.LASF48:
+	.string	"prev"
+.LASF203:
+	.string	"UCLASS_PCH"
+.LASF204:
+	.string	"UCLASS_PCI"
+.LASF334:
+	.string	"net_netmask"
+.LASF33:
+	.string	"driver_data"
+.LASF87:
+	.string	"IRQ_STACK_START"
+.LASF169:
+	.string	"UCLASS_ADC"
+.LASF164:
+	.string	"UCLASS_SPI_EMUL"
+.LASF261:
+	.string	"tlb_size"
+.LASF141:
+	.string	"fit_uname_fdt"
+	.ident	"GCC: (Linaro GCC 6.3-2017.05) 6.3.1 20170404"
+	.section	.note.GNU-stack,"",@progbits
diff --git a/drivers/misc/rockchip-secure-otp.S b/drivers/misc/rk3568-secure-otp.S
similarity index 61%
rename from drivers/misc/rockchip-secure-otp.S
rename to drivers/misc/rk3568-secure-otp.S
index 7c73f38d08..c344270b83 100644
--- a/drivers/misc/rockchip-secure-otp.S
+++ b/drivers/misc/rk3568-secure-otp.S
@@ -1,304 +1,75 @@
 	.arch armv8-a+nosimd
-	.file	"rockchip-secure-otp.c"
+	.file	"rk3568-secure-otp.c"
 	.text
 .Ltext0:
 	.cfi_sections	.debug_frame
-	.section	.text.px30_spl_rockchip_otp_start,"ax",@progbits
-	.align	2
-	.type	px30_spl_rockchip_otp_start, %function
-px30_spl_rockchip_otp_start:
-.LFB264:
-	.file 1 "drivers/misc/rockchip-secure-otp.c"
-	.loc 1 45 0
-	.cfi_startproc
-.LVL0:
-.LBB24:
-	.loc 1 46 0
-#APP
-// 46 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	mov	w1, 16
-.LVL1:
-	sdiv	w3, w3, w1
-.LVL2:
-	mov	w1, -65536
-	lsl	w3, w3, 2
-	sxtw	x3, w3
-	str	w1, [x3, x2]
-.LVL3:
-.LBE24:
-.LBB25:
-	.loc 1 47 0
-#APP
-// 47 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	mov	w1, 536879104
-	str	w1, [x0]
-	ret
-.LBE25:
-	.cfi_endproc
-.LFE264:
-	.size	px30_spl_rockchip_otp_start, .-px30_spl_rockchip_otp_start
-	.section	.text.px30_spl_rockchip_otp_stop,"ax",@progbits
-	.align	2
-	.type	px30_spl_rockchip_otp_stop, %function
-px30_spl_rockchip_otp_stop:
-.LFB265:
-	.loc 1 53 0
-	.cfi_startproc
-.LVL4:
-.LBB26:
-	.loc 1 54 0
-#APP
-// 54 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	mov	w1, 536870912
-.LVL5:
-	str	w1, [x0]
-.LVL6:
-.LBE26:
-.LBB27:
-	.loc 1 55 0
-#APP
-// 55 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	mov	w0, 16
-.LVL7:
-	sdiv	w3, w3, w0
-.LVL8:
-	mov	w0, -1
-	lsl	w3, w3, 2
-	sxtw	x3, w3
-	str	w0, [x3, x2]
-	ret
-.LBE27:
-	.cfi_endproc
-.LFE265:
-	.size	px30_spl_rockchip_otp_stop, .-px30_spl_rockchip_otp_stop
-	.section	.text.rk3308_spl_rockchip_otp_start,"ax",@progbits
-	.align	2
-	.type	rk3308_spl_rockchip_otp_start, %function
-rk3308_spl_rockchip_otp_start:
-.LFB266:
-	.loc 1 61 0
-	.cfi_startproc
-.LVL9:
-.LBB28:
-	.loc 1 62 0
-#APP
-// 62 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	mov	w1, 16
-.LVL10:
-	sdiv	w3, w3, w1
-.LVL11:
-	mov	w1, -65536
-	lsl	w3, w3, 2
-	sxtw	x3, w3
-	str	w1, [x3, x2]
-.LVL12:
-.LBE28:
-.LBB29:
-	.loc 1 63 0
-#APP
-// 63 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	mov	w1, 262148
-	str	w1, [x0]
-	ret
-.LBE29:
-	.cfi_endproc
-.LFE266:
-	.size	rk3308_spl_rockchip_otp_start, .-rk3308_spl_rockchip_otp_start
-	.section	.text.rk3308_spl_rockchip_otp_stop,"ax",@progbits
-	.align	2
-	.type	rk3308_spl_rockchip_otp_stop, %function
-rk3308_spl_rockchip_otp_stop:
-.LFB267:
-	.loc 1 69 0
-	.cfi_startproc
-.LVL13:
-.LBB30:
-	.loc 1 70 0
-#APP
-// 70 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	mov	w1, 262144
-.LVL14:
-	str	w1, [x0]
-.LVL15:
-.LBE30:
-.LBB31:
-	.loc 1 71 0
-#APP
-// 71 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	mov	w0, 16
-.LVL16:
-	sdiv	w3, w3, w0
-.LVL17:
-	mov	w0, -1
-	lsl	w3, w3, 2
-	sxtw	x3, w3
-	str	w0, [x3, x2]
-	ret
-.LBE31:
-	.cfi_endproc
-.LFE267:
-	.size	rk3308_spl_rockchip_otp_stop, .-rk3308_spl_rockchip_otp_stop
-	.section	.text.rk3328_spl_rockchip_otp_start,"ax",@progbits
-	.align	2
-	.type	rk3328_spl_rockchip_otp_start, %function
-rk3328_spl_rockchip_otp_start:
-.LFB268:
-	.loc 1 77 0
-	.cfi_startproc
-.LVL18:
-.LBB32:
-	.loc 1 78 0
-#APP
-// 78 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	mov	w1, 134219776
-.LVL19:
-	str	w1, [x0]
-.LVL20:
-.LBE32:
-.LBB33:
-	.loc 1 79 0
-#APP
-// 79 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	mov	w0, 1024
-.LVL21:
-	movk	w0, 0x600, lsl 16
-	str	w0, [x2]
-	ret
-.LBE33:
-	.cfi_endproc
-.LFE268:
-	.size	rk3328_spl_rockchip_otp_start, .-rk3328_spl_rockchip_otp_start
-	.section	.text.rk3328_spl_rockchip_otp_stop,"ax",@progbits
-	.align	2
-	.type	rk3328_spl_rockchip_otp_stop, %function
-rk3328_spl_rockchip_otp_stop:
-.LFB269:
-	.loc 1 85 0
-	.cfi_startproc
-.LVL22:
-.LBB34:
-	.loc 1 86 0
-#APP
-// 86 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	mov	w1, 134217728
-.LVL23:
-	str	w1, [x0]
-.LVL24:
-.LBE34:
-.LBB35:
-	.loc 1 87 0
-#APP
-// 87 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	mov	w0, 100663296
-.LVL25:
-	str	w0, [x2]
-	ret
-.LBE35:
-	.cfi_endproc
-.LFE269:
-	.size	rk3328_spl_rockchip_otp_stop, .-rk3328_spl_rockchip_otp_stop
 	.section	.text.rk3568_spl_rockchip_otp_stop,"ax",@progbits
 	.align	2
 	.type	rk3568_spl_rockchip_otp_stop, %function
 rk3568_spl_rockchip_otp_stop:
-.LFB271:
-	.loc 1 105 0
+.LFB263:
+	.file 1 "drivers/misc/rk3568-secure-otp.c"
+	.loc 1 57 0
 	.cfi_startproc
-.LVL26:
-.LBB36:
-	.loc 1 106 0
+.LVL0:
+.LBB18:
+	.loc 1 58 0
 #APP
-// 106 "drivers/misc/rockchip-secure-otp.c" 1
+// 58 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	mov	w1, 131072
-.LVL27:
+.LVL1:
 	str	w1, [x0]
 	ret
-.LBE36:
+.LBE18:
 	.cfi_endproc
-.LFE271:
+.LFE263:
 	.size	rk3568_spl_rockchip_otp_stop, .-rk3568_spl_rockchip_otp_stop
 	.section	.text.secure_otp_ioctl,"ax",@progbits
 	.align	2
 	.type	secure_otp_ioctl, %function
 secure_otp_ioctl:
-.LFB287:
-	.loc 1 986 0
+.LFB276:
+	.loc 1 671 0
 	.cfi_startproc
-.LVL28:
-	.loc 1 989 0
+.LVL2:
+	.loc 1 674 0
 	mov	x0, 27908
-.LVL29:
+.LVL3:
 	cmp	x1, x0
-	bne	.L12
-.LVL30:
-.LBB37:
-.LBB38:
-	.loc 1 978 0
+	bne	.L6
+.LVL4:
+.LBB19:
+.LBB20:
+	.loc 1 663 0
 	mov	w0, 8
 	str	w0, [x2]
-.LVL31:
-.LBE38:
-.LBE37:
-	.loc 1 991 0
+.LVL5:
+.LBE20:
+.LBE19:
+	.loc 1 676 0
 	mov	w0, 0
-	.loc 1 992 0
+	.loc 1 677 0
 	ret
-.LVL32:
-.L12:
-	.loc 1 987 0
+.LVL6:
+.L6:
+	.loc 1 672 0
 	mov	w0, -22
-	.loc 1 998 0
+	.loc 1 683 0
 	ret
 	.cfi_endproc
-.LFE287:
+.LFE276:
 	.size	secure_otp_ioctl, .-secure_otp_ioctl
 	.section	.text.secure_otp_write,"ax",@progbits
 	.align	2
 	.type	secure_otp_write, %function
 secure_otp_write:
-.LFB285:
-	.loc 1 970 0
+.LFB274:
+	.loc 1 655 0
 	.cfi_startproc
-.LVL33:
+.LVL7:
 	stp	x29, x30, [sp, -48]!
 	.cfi_def_cfa_offset 48
 	.cfi_offset 29, -48
@@ -312,25 +83,25 @@ secure_otp_write:
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -16
 	.cfi_offset 22, -8
-	.loc 1 970 0
+	.loc 1 655 0
 	mov	w20, w1
 	mov	x21, x2
 	mov	w22, w3
-	.loc 1 971 0
+	.loc 1 656 0
 	bl	dev_get_driver_data
-.LVL34:
-	.loc 1 973 0
+.LVL8:
+	.loc 1 658 0
 	ldr	x4, [x0, 8]
 	mov	w3, w22
 	mov	x2, x21
 	mov	w1, w20
 	mov	x0, x19
-.LVL35:
-	.loc 1 974 0
+.LVL9:
+	.loc 1 659 0
 	ldp	x21, x22, [sp, 32]
-.LVL36:
+.LVL10:
 	ldp	x19, x20, [sp, 16]
-.LVL37:
+.LVL11:
 	ldp	x29, x30, [sp], 48
 	.cfi_restore 30
 	.cfi_restore 29
@@ -339,20 +110,20 @@ secure_otp_write:
 	.cfi_restore 19
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
-	.loc 1 973 0
+	.loc 1 658 0
 	br	x4
-.LVL38:
+.LVL12:
 	.cfi_endproc
-.LFE285:
+.LFE274:
 	.size	secure_otp_write, .-secure_otp_write
 	.section	.text.secure_otp_read,"ax",@progbits
 	.align	2
 	.type	secure_otp_read, %function
 secure_otp_read:
-.LFB284:
-	.loc 1 962 0
+.LFB273:
+	.loc 1 647 0
 	.cfi_startproc
-.LVL39:
+.LVL13:
 	stp	x29, x30, [sp, -48]!
 	.cfi_def_cfa_offset 48
 	.cfi_offset 29, -48
@@ -366,25 +137,25 @@ secure_otp_read:
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -16
 	.cfi_offset 22, -8
-	.loc 1 962 0
+	.loc 1 647 0
 	mov	w20, w1
 	mov	x21, x2
 	mov	w22, w3
-	.loc 1 963 0
+	.loc 1 648 0
 	bl	dev_get_driver_data
-.LVL40:
-	.loc 1 965 0
+.LVL14:
+	.loc 1 650 0
 	ldr	x4, [x0]
 	mov	w3, w22
 	mov	x2, x21
 	mov	w1, w20
 	mov	x0, x19
-.LVL41:
-	.loc 1 966 0
+.LVL15:
+	.loc 1 651 0
 	ldp	x21, x22, [sp, 32]
-.LVL42:
+.LVL16:
 	ldp	x19, x20, [sp, 16]
-.LVL43:
+.LVL17:
 	ldp	x29, x30, [sp], 48
 	.cfi_restore 30
 	.cfi_restore 29
@@ -393,20 +164,20 @@ secure_otp_read:
 	.cfi_restore 19
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
-	.loc 1 965 0
+	.loc 1 650 0
 	br	x4
-.LVL44:
+.LVL18:
 	.cfi_endproc
-.LFE284:
+.LFE273:
 	.size	secure_otp_read, .-secure_otp_read
 	.section	.text.rockchip_secure_otp_ofdata_to_platdata,"ax",@progbits
 	.align	2
 	.type	rockchip_secure_otp_ofdata_to_platdata, %function
 rockchip_secure_otp_ofdata_to_platdata:
-.LFB288:
-	.loc 1 1007 0
+.LFB277:
+	.loc 1 692 0
 	.cfi_startproc
-.LVL45:
+.LVL19:
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
@@ -416,55 +187,55 @@ rockchip_secure_otp_ofdata_to_platdata:
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -16
 	.cfi_offset 20, -8
-	.loc 1 1007 0
+	.loc 1 692 0
 	mov	x20, x0
-	.loc 1 1008 0
+	.loc 1 693 0
 	bl	dev_get_platdata
-.LVL46:
+.LVL20:
 	mov	x19, x0
-.LVL47:
-	.loc 1 1010 0
+.LVL21:
+	.loc 1 695 0
 	mov	x0, x20
-.LVL48:
+.LVL22:
 	bl	dev_read_addr_ptr
-.LVL49:
-	.loc 1 1011 0
+.LVL23:
+	.loc 1 696 0
 	mov	w2, 0
 	adrp	x1, .LC0
-	.loc 1 1010 0
+	.loc 1 695 0
 	str	x0, [x19]
-	.loc 1 1011 0
+	.loc 1 696 0
 	add	x1, x1, :lo12:.LC0
 	mov	x0, x20
 	bl	dev_read_u32_default
-.LVL50:
-	.loc 1 1012 0
+.LVL24:
+	.loc 1 697 0
 	uxtw	x0, w0
 	str	x0, [x19, 8]
-	.loc 1 1013 0
+	.loc 1 698 0
 	mov	w2, 0
 	mov	x0, x20
 	adrp	x1, .LC1
 	add	x1, x1, :lo12:.LC1
 	bl	dev_read_u32_default
-.LVL51:
-	.loc 1 1014 0
+.LVL25:
+	.loc 1 699 0
 	uxtw	x0, w0
 	str	x0, [x19, 16]
-	.loc 1 1015 0
+	.loc 1 700 0
 	mov	w2, 0
 	mov	x0, x20
 	adrp	x1, .LC2
 	add	x1, x1, :lo12:.LC2
 	bl	dev_read_u32_default
-.LVL52:
-	.loc 1 1016 0
+.LVL26:
+	.loc 1 701 0
 	uxtw	x0, w0
 	str	x0, [x19, 24]
-	.loc 1 1019 0
+	.loc 1 704 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-.LVL53:
+.LVL27:
 	ldp	x29, x30, [sp], 32
 	.cfi_restore 30
 	.cfi_restore 29
@@ -473,16 +244,16 @@ rockchip_secure_otp_ofdata_to_platdata:
 	.cfi_def_cfa 31, 0
 	ret
 	.cfi_endproc
-.LFE288:
+.LFE277:
 	.size	rockchip_secure_otp_ofdata_to_platdata, .-rockchip_secure_otp_ofdata_to_platdata
 	.section	.text.rk3568_spl_rockchip_otp_start,"ax",@progbits
 	.align	2
 	.type	rk3568_spl_rockchip_otp_start, %function
 rk3568_spl_rockchip_otp_start:
-.LFB270:
-	.loc 1 93 0
+.LFB262:
+	.loc 1 45 0
 	.cfi_startproc
-.LVL54:
+.LVL28:
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
@@ -491,68 +262,68 @@ rk3568_spl_rockchip_otp_start:
 	.cfi_def_cfa_register 29
 	str	x19, [sp, 16]
 	.cfi_offset 19, -16
-	.loc 1 93 0
+	.loc 1 45 0
 	mov	x19, x1
-.LBB39:
-	.loc 1 95 0
+.LBB21:
+	.loc 1 47 0
 #APP
-// 95 "drivers/misc/rockchip-secure-otp.c" 1
+// 47 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	mov	w1, 131074
-.LVL55:
+.LVL29:
 	str	w1, [x0]
-.LVL56:
-.LBE39:
-.LBB40:
-	.loc 1 96 0
+.LVL30:
+.LBE21:
+.LBB22:
+	.loc 1 48 0
 #APP
-// 96 "drivers/misc/rockchip-secure-otp.c" 1
+// 48 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	mov	w0, -2147450880
-.LVL57:
+.LVL31:
 	str	w0, [x19]
-.LBE40:
-	.loc 1 97 0
+.LBE22:
+	.loc 1 49 0
 	mov	x0, 2
 	bl	udelay
-.LVL58:
-.LBB41:
-	.loc 1 98 0
+.LVL32:
+.LBB23:
+	.loc 1 50 0
 #APP
-// 98 "drivers/misc/rockchip-secure-otp.c" 1
+// 50 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	mov	w0, -2147483648
 	str	w0, [x19]
-.LBE41:
-	.loc 1 100 0
+.LBE23:
+	.loc 1 52 0
 	ldr	x19, [sp, 16]
-.LVL59:
-	.loc 1 99 0
+.LVL33:
+	.loc 1 51 0
 	mov	x0, 1
-	.loc 1 100 0
+	.loc 1 52 0
 	ldp	x29, x30, [sp], 32
 	.cfi_restore 30
 	.cfi_restore 29
 	.cfi_restore 19
 	.cfi_def_cfa 31, 0
-	.loc 1 99 0
+	.loc 1 51 0
 	b	udelay
-.LVL60:
+.LVL34:
 	.cfi_endproc
-.LFE270:
+.LFE262:
 	.size	rk3568_spl_rockchip_otp_start, .-rk3568_spl_rockchip_otp_start
 	.section	.text.rockchip_secure_otp_check_flag.isra.0,"ax",@progbits
 	.align	2
 	.type	rockchip_secure_otp_check_flag.isra.0, %function
 rockchip_secure_otp_check_flag.isra.0:
-.LFB289:
-	.loc 1 176 0
+.LFB278:
+	.loc 1 104 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
@@ -563,44 +334,44 @@ rockchip_secure_otp_check_flag.isra.0:
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -16
 	.cfi_offset 20, -8
-	.loc 1 176 0
+	.loc 1 104 0
 	mov	w19, 34465
 	mov	x20, x0
 	movk	w19, 0x1, lsl 16
-.L23:
-.LVL61:
-.LBB42:
-	.loc 1 182 0
-	ldr	x0, [x20]
+.L17:
+.LVL35:
+.LBB24:
+	.loc 1 110 0
+	ldr	x0, [x20]
 	ldr	w1, [x0, 44]
-.LVL62:
+.LVL36:
 #APP
-// 182 "drivers/misc/rockchip-secure-otp.c" 1
+// 110 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
-.LVL63:
+.LVL37:
 #NO_APP
-.LBE42:
-	.loc 1 183 0
+.LBE24:
+	.loc 1 111 0
 	and	w0, w1, 16
-	tbz	x1, 4, .L21
-	.loc 1 186 0
+	tbz	x1, 4, .L15
+	.loc 1 114 0
 	subs	w19, w19, #1
-.LVL64:
-	beq	.L24
-.LVL65:
-	.loc 1 192 0
+.LVL38:
+	beq	.L18
+.LVL39:
+	.loc 1 120 0
 	mov	x0, 1
 	bl	udelay
-.LVL66:
-	b	.L23
-.LVL67:
-.L24:
-	.loc 1 187 0
+.LVL40:
+	b	.L17
+.LVL41:
+.L18:
+	.loc 1 115 0
 	mov	w0, -1
-.LVL68:
-.L21:
-	.loc 1 196 0
+.LVL42:
+.L15:
+	.loc 1 124 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	.cfi_restore 30
@@ -610,14 +381,14 @@ rockchip_secure_otp_check_flag.isra.0:
 	.cfi_def_cfa 31, 0
 	ret
 	.cfi_endproc
-.LFE289:
+.LFE278:
 	.size	rockchip_secure_otp_check_flag.isra.0, .-rockchip_secure_otp_check_flag.isra.0
 	.section	.text.rockchip_secure_otp_wait_flag.isra.1,"ax",@progbits
 	.align	2
 	.type	rockchip_secure_otp_wait_flag.isra.1, %function
 rockchip_secure_otp_wait_flag.isra.1:
-.LFB290:
-	.loc 1 154 0
+.LFB279:
+	.loc 1 82 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
@@ -628,42 +399,42 @@ rockchip_secure_otp_wait_flag.isra.1:
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -16
 	.cfi_offset 20, -8
-	.loc 1 154 0
+	.loc 1 82 0
 	mov	x20, x0
 	mov	w19, 20001
-.L31:
-.LVL69:
-.LBB43:
-	.loc 1 160 0
+.L25:
+.LVL43:
+.LBB25:
+	.loc 1 88 0
 	ldr	x0, [x20]
 	ldr	w0, [x0, 44]
-.LVL70:
+.LVL44:
 #APP
-// 160 "drivers/misc/rockchip-secure-otp.c" 1
+// 88 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
-.LVL71:
+.LVL45:
 #NO_APP
-.LBE43:
-	.loc 1 161 0
-	tbnz	x0, 4, .L32
-	.loc 1 164 0
+.LBE25:
+	.loc 1 89 0
+	tbnz	x0, 4, .L26
+	.loc 1 92 0
 	subs	w19, w19, #1
-.LVL72:
-	beq	.L33
-	.loc 1 169 0
+.LVL46:
+	beq	.L27
+	.loc 1 97 0
 	mov	x0, 1
-.LVL73:
+.LVL47:
 	bl	udelay
-.LVL74:
-	b	.L31
-.LVL75:
-.L32:
-	.loc 1 157 0
+.LVL48:
+	b	.L25
+.LVL49:
+.L26:
+	.loc 1 85 0
 	mov	w0, 0
-.LVL76:
-.L29:
-	.loc 1 174 0
+.LVL50:
+.L23:
+	.loc 1 102 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	.cfi_remember_state
@@ -673,24 +444,24 @@ rockchip_secure_otp_wait_flag.isra.1:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL77:
-.L33:
+.LVL51:
+.L27:
 	.cfi_restore_state
-	.loc 1 165 0
+	.loc 1 93 0
 	mov	w0, -1
-.LVL78:
-	b	.L29
+.LVL52:
+	b	.L23
 	.cfi_endproc
-.LFE290:
+.LFE279:
 	.size	rockchip_secure_otp_wait_flag.isra.1, .-rockchip_secure_otp_wait_flag.isra.1
 	.section	.text.rockchip_secure_otp_wait_status.isra.2,"ax",@progbits
 	.align	2
 	.type	rockchip_secure_otp_wait_status.isra.2, %function
 rockchip_secure_otp_wait_status.isra.2:
-.LFB291:
-	.loc 1 134 0
+.LFB280:
+	.loc 1 62 0
 	.cfi_startproc
-.LVL79:
+.LVL53:
 	stp	x29, x30, [sp, -48]!
 	.cfi_def_cfa_offset 48
 	.cfi_offset 29, -48
@@ -703,69 +474,69 @@ rockchip_secure_otp_wait_status.isra.2:
 	mov	w19, w1
 	str	x21, [sp, 32]
 	.cfi_offset 21, -16
-	.loc 1 134 0
+	.loc 1 62 0
 	mov	x21, x0
 	mov	w20, 10000
-.LVL80:
-.L36:
-.LBB50:
-	.loc 1 139 0
+.LVL54:
+.L30:
+.LBB32:
+	.loc 1 67 0
 	ldr	x0, [x21]
 	ldr	w0, [x0, 772]
-.LVL81:
+.LVL55:
 #APP
-// 139 "drivers/misc/rockchip-secure-otp.c" 1
+// 67 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-.LBE50:
+.LBE32:
 	tst	w0, w19
-	beq	.L38
-.LBB51:
-	.loc 1 149 0
+	beq	.L32
+.LBB33:
+	.loc 1 77 0
 	orr	w19, w19, -65536
-.LVL82:
+.LVL56:
 #APP
-// 149 "drivers/misc/rockchip-secure-otp.c" 1
+// 77 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x21]
-.LVL83:
+.LVL57:
 	str	w19, [x0, 772]
-.LBE51:
-	.loc 1 151 0
+.LBE33:
+	.loc 1 79 0
 	mov	w0, 0
-	b	.L35
-.LVL84:
-.L38:
-	.loc 1 140 0
+	b	.L29
+.LVL58:
+.L32:
+	.loc 1 68 0
 	mov	x0, 1
-.LVL85:
+.LVL59:
 	bl	udelay
-.LVL86:
-	.loc 1 142 0
+.LVL60:
+	.loc 1 70 0
 	subs	w20, w20, #1
-.LVL87:
-	bne	.L36
-.LVL88:
-.LBB52:
-.LBB53:
-	.loc 1 143 0
+.LVL61:
+	bne	.L30
+.LVL62:
+.LBB34:
+.LBB35:
+	.loc 1 71 0
 	adrp	x1, .LANCHOR0
 	adrp	x0, .LC3
 	add	x1, x1, :lo12:.LANCHOR0
 	add	x0, x0, :lo12:.LC3
 	bl	printf
-.LVL89:
+.LVL63:
 	mov	w0, -110
-.LVL90:
-.L35:
-.LBE53:
-.LBE52:
-	.loc 1 152 0
+.LVL64:
+.L29:
+.LBE35:
+.LBE34:
+	.loc 1 80 0
 	ldp	x19, x20, [sp, 16]
-.LVL91:
+.LVL65:
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	.cfi_restore 30
@@ -776,16 +547,16 @@ rockchip_secure_otp_wait_status.isra.2:
 	.cfi_def_cfa 31, 0
 	ret
 	.cfi_endproc
-.LFE291:
+.LFE280:
 	.size	rockchip_secure_otp_wait_status.isra.2, .-rockchip_secure_otp_wait_status.isra.2
 	.section	.text.rk3568_secure_otp_write_2_bytes_noecc,"ax",@progbits
 	.align	2
 	.type	rk3568_secure_otp_write_2_bytes_noecc, %function
 rk3568_secure_otp_write_2_bytes_noecc:
-.LFB280:
-	.loc 1 528 0
+.LFB269:
+	.loc 1 213 0
 	.cfi_startproc
-.LVL92:
+.LVL66:
 	stp	x29, x30, [sp, -96]!
 	.cfi_def_cfa_offset 96
 	.cfi_offset 29, -96
@@ -803,9 +574,9 @@ rk3568_secure_otp_write_2_bytes_noecc:
 	.cfi_offset 20, -72
 	.cfi_offset 27, -16
 	.cfi_offset 28, -8
-	.loc 1 532 0
+	.loc 1 217 0
 	asr	w20, w22, 1
-	.loc 1 528 0
+	.loc 1 213 0
 	stp	x23, x24, [sp, 48]
 	mov	x28, x1
 	stp	x25, x26, [sp, 64]
@@ -813,48 +584,48 @@ rk3568_secure_otp_write_2_bytes_noecc:
 	.cfi_offset 24, -40
 	.cfi_offset 25, -32
 	.cfi_offset 26, -24
-	.loc 1 530 0
+	.loc 1 215 0
 	bl	dev_get_driver_data
-.LVL93:
-	.loc 1 533 0
+.LVL67:
+	.loc 1 218 0
 	cmp	w20, 448
-	bgt	.L50
-	.loc 1 537 0
+	bgt	.L44
+	.loc 1 222 0
 	sub	w1, w20, #64
 	mov	x25, x0
 	cmp	w1, 51
-	bhi	.L51
+	bhi	.L45
 	mov	x0, -255
-.LVL94:
+.LVL68:
 	movk	x0, 0x7f, lsl 32
 	movk	x0, 0xf, lsl 48
 	lsr	x0, x0, x1
 	mvn	x0, x0
-.L43:
-	tbz	x0, 0, .L44
-	.loc 1 537 0 is_stmt 0 discriminator 1
+.L37:
+	tbz	x0, 0, .L38
+	.loc 1 222 0 is_stmt 0 discriminator 1
 	sub	w0, w20, #229
 	cmp	w0, 218
-	bls	.L44
-	.loc 1 540 0 is_stmt 1
+	bls	.L38
+	.loc 1 225 0 is_stmt 1
 	adrp	x0, .LC4
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC4
 	bl	printf
-.LVL95:
-.L50:
-	.loc 1 534 0
+.LVL69:
+.L44:
+	.loc 1 219 0
 	mov	w0, -1
-.LVL96:
-.L41:
-	.loc 1 734 0
+.LVL70:
+.L35:
+	.loc 1 419 0
 	ldp	x19, x20, [sp, 16]
-.LVL97:
+.LVL71:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-.LVL98:
+.LVL72:
 	ldp	x29, x30, [sp], 96
 	.cfi_remember_state
 	.cfi_restore 30
@@ -871,63 +642,63 @@ rk3568_secure_otp_write_2_bytes_noecc:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL99:
-.L51:
+.LVL73:
+.L45:
 	.cfi_restore_state
-	.loc 1 537 0
+	.loc 1 222 0
 	mov	x0, 1
-.LVL100:
-	b	.L43
-.L44:
-	.loc 1 544 0
-	cbz	w21, .L52
-	.loc 1 547 0
+.LVL74:
+	b	.L37
+.L38:
+	.loc 1 229 0
+	cbz	w21, .L46
+	.loc 1 232 0
 	ldr	x5, [x25, 16]
 	mov	w3, w20
 	ldp	x0, x2, [x28, 8]
 	ldr	x1, [x28, 24]
 	blr	x5
-.LVL101:
-.LBB54:
-	.loc 1 550 0
+.LVL75:
+.LBB36:
+	.loc 1 235 0
 #APP
-// 550 "drivers/misc/rockchip-secure-otp.c" 1
+// 235 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	mov	w1, 65536
 	str	w1, [x0, 256]
-.LVL102:
-.LBE54:
-.LBB55:
-	.loc 1 551 0
+.LVL76:
+.LBE36:
+.LBB37:
+	.loc 1 236 0
 #APP
-// 551 "drivers/misc/rockchip-secure-otp.c" 1
+// 236 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	mov	w1, 262148
 	str	w1, [x0, 32]
-.LVL103:
-.LBE55:
-.LBB56:
-	.loc 1 552 0
+.LVL77:
+.LBE37:
+.LBB38:
+	.loc 1 237 0
 #APP
-// 552 "drivers/misc/rockchip-secure-otp.c" 1
+// 237 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	mov	w1, -65536
 	str	w1, [x0, 40]
-.LVL104:
-.LBE56:
-.LBB57:
-	.loc 1 553 0
+.LVL78:
+.LBE38:
+.LBB39:
+	.loc 1 238 0
 #APP
-// 553 "drivers/misc/rockchip-secure-otp.c" 1
+// 238 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
@@ -935,832 +706,832 @@ rk3568_secure_otp_write_2_bytes_noecc:
 	mov	w1, 512
 	movk	w1, 0xff00, lsl 16
 	str	w1, [x0, 32]
-.LVL105:
-.LBE57:
-.LBB58:
-	.loc 1 554 0
+.LVL79:
+.LBE39:
+.LBB40:
+	.loc 1 239 0
 #APP
-// 554 "drivers/misc/rockchip-secure-otp.c" 1
+// 239 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	mov	w24, -65534
 	str	w24, [x0, 36]
-.LVL106:
-.LBE58:
-.LBB59:
-	.loc 1 555 0
+.LVL80:
+.LBE40:
+.LBB41:
+	.loc 1 240 0
 #APP
-// 555 "drivers/misc/rockchip-secure-otp.c" 1
+// 240 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	mov	w1, 252
 	str	w1, [x0, 4096]
-.LVL107:
-.LBE59:
-.LBB60:
-	.loc 1 556 0
+.LVL81:
+.LBE41:
+.LBB42:
+	.loc 1 241 0
 #APP
-// 556 "drivers/misc/rockchip-secure-otp.c" 1
+// 241 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	str	wzr, [x0, 4100]
-.LVL108:
-.LBE60:
-.LBB61:
-	.loc 1 557 0
+.LVL82:
+.LBE42:
+.LBB43:
+	.loc 1 242 0
 #APP
-// 557 "drivers/misc/rockchip-secure-otp.c" 1
+// 242 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	str	wzr, [x0, 4104]
-.LVL109:
-.LBE61:
-.LBB62:
-	.loc 1 558 0
+.LVL83:
+.LBE43:
+.LBB44:
+	.loc 1 243 0
 #APP
-// 558 "drivers/misc/rockchip-secure-otp.c" 1
+// 243 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	mov	w19, 65537
-.LBE62:
-	.loc 1 559 0
+.LBE44:
+	.loc 1 244 0
 	mov	w1, 2
-.LBB63:
-	.loc 1 558 0
+.LBB45:
+	.loc 1 243 0
 	str	w19, [x0, 32]
-.LBE63:
-	.loc 1 559 0
+.LBE45:
+	.loc 1 244 0
 	mov	x0, x28
 	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL110:
-	.loc 1 560 0
-	tbz	w0, #31, .L45
-.L47:
-	.loc 1 561 0
+.LVL84:
+	.loc 1 245 0
+	tbz	w0, #31, .L39
+.L41:
+	.loc 1 246 0
 	adrp	x1, .LANCHOR1
 	adrp	x0, .LC5
-.LVL111:
+.LVL85:
 	add	x1, x1, :lo12:.LANCHOR1
 	add	x0, x0, :lo12:.LC5
-.L57:
-	.loc 1 694 0
+.L51:
+	.loc 1 379 0
 	bl	printf
-.LVL112:
-.L46:
-	.loc 1 730 0
+.LVL86:
+.L40:
+	.loc 1 415 0
 	ldr	x5, [x25, 24]
 	mov	w3, w20
 	ldp	x0, x2, [x28, 8]
 	ldr	x1, [x28, 24]
 	blr	x5
-.LVL113:
-.L52:
-	.loc 1 545 0
+.LVL87:
+.L46:
+	.loc 1 230 0
 	mov	w0, 0
-	b	.L41
-.LVL114:
-.L45:
-.LBB64:
-	.loc 1 565 0
-#APP
-// 565 "drivers/misc/rockchip-secure-otp.c" 1
+	b	.L35
+.LVL88:
+.L39:
+.LBB46:
+	.loc 1 250 0
+#APP
+// 250 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
-.LVL115:
+.LVL89:
 	mov	w1, -65522
 	str	w1, [x0, 36]
-.LVL116:
-.LBE64:
-.LBB65:
-	.loc 1 566 0
+.LVL90:
+.LBE46:
+.LBB47:
+	.loc 1 251 0
 #APP
-// 566 "drivers/misc/rockchip-secure-otp.c" 1
+// 251 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	mov	w27, 240
 	str	w27, [x0, 4096]
-.LVL117:
-.LBE65:
-.LBB66:
-	.loc 1 567 0
+.LVL91:
+.LBE47:
+.LBB48:
+	.loc 1 252 0
 #APP
-// 567 "drivers/misc/rockchip-secure-otp.c" 1
+// 252 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	mov	w23, 1
 	str	w23, [x0, 4100]
-.LVL118:
-.LBE66:
-.LBB67:
-	.loc 1 568 0
+.LVL92:
+.LBE48:
+.LBB49:
+	.loc 1 253 0
 #APP
-// 568 "drivers/misc/rockchip-secure-otp.c" 1
+// 253 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	mov	w26, 122
 	str	w26, [x0, 4104]
-.LVL119:
-.LBE67:
-.LBB68:
-	.loc 1 569 0
+.LVL93:
+.LBE49:
+.LBB50:
+	.loc 1 254 0
 #APP
-// 569 "drivers/misc/rockchip-secure-otp.c" 1
+// 254 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	mov	w1, 37
 	str	w1, [x0, 4108]
-.LVL120:
-.LBE68:
-.LBB69:
-	.loc 1 570 0
+.LVL94:
+.LBE50:
+.LBB51:
+	.loc 1 255 0
 #APP
-// 570 "drivers/misc/rockchip-secure-otp.c" 1
+// 255 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	str	wzr, [x0, 4112]
-.LVL121:
-.LBE69:
-.LBB70:
-	.loc 1 571 0
+.LVL95:
+.LBE51:
+.LBB52:
+	.loc 1 256 0
 #APP
-// 571 "drivers/misc/rockchip-secure-otp.c" 1
+// 256 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	str	wzr, [x0, 4116]
-.LVL122:
-.LBE70:
-.LBB71:
-	.loc 1 572 0
+.LVL96:
+.LBE52:
+.LBB53:
+	.loc 1 257 0
 #APP
-// 572 "drivers/misc/rockchip-secure-otp.c" 1
+// 257 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	str	wzr, [x0, 4120]
-.LVL123:
-.LBE71:
-.LBB72:
-	.loc 1 573 0
+.LVL97:
+.LBE53:
+.LBB54:
+	.loc 1 258 0
 #APP
-// 573 "drivers/misc/rockchip-secure-otp.c" 1
+// 258 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	mov	w1, 31
 	str	w1, [x0, 4124]
-.LVL124:
-.LBE72:
-.LBB73:
-	.loc 1 574 0
+.LVL98:
+.LBE54:
+.LBB55:
+	.loc 1 259 0
 #APP
-// 574 "drivers/misc/rockchip-secure-otp.c" 1
+// 259 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	mov	w1, 11
 	str	w1, [x0, 4128]
-.LVL125:
-.LBE73:
-.LBB74:
-	.loc 1 575 0
+.LVL99:
+.LBE55:
+.LBB56:
+	.loc 1 260 0
 #APP
-// 575 "drivers/misc/rockchip-secure-otp.c" 1
+// 260 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	mov	w1, 8
 	str	w1, [x0, 4132]
-.LVL126:
-.LBE74:
-.LBB75:
-	.loc 1 576 0
+.LVL100:
+.LBE56:
+.LBB57:
+	.loc 1 261 0
 #APP
-// 576 "drivers/misc/rockchip-secure-otp.c" 1
+// 261 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	str	wzr, [x0, 4136]
-.LVL127:
-.LBE75:
-.LBB76:
-	.loc 1 577 0
+.LVL101:
+.LBE57:
+.LBB58:
+	.loc 1 262 0
 #APP
-// 577 "drivers/misc/rockchip-secure-otp.c" 1
+// 262 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	str	wzr, [x0, 4140]
-.LVL128:
-.LBE76:
-.LBB77:
-	.loc 1 578 0
+.LVL102:
+.LBE58:
+.LBB59:
+	.loc 1 263 0
 #APP
-// 578 "drivers/misc/rockchip-secure-otp.c" 1
+// 263 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	str	wzr, [x0, 4144]
-.LBE77:
-.LBB78:
-	.loc 1 579 0
+.LBE59:
+.LBB60:
+	.loc 1 264 0
 	and	w0, w20, 255
 #APP
-// 579 "drivers/misc/rockchip-secure-otp.c" 1
+// 264 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x1, [x28]
-.LBE78:
-.LBB79:
-	.loc 1 580 0
+.LBE60:
+.LBB61:
+	.loc 1 265 0
 	ubfx	x22, x22, 9, 8
-.LVL129:
-.LBE79:
-.LBB80:
-	.loc 1 579 0
+.LVL103:
+.LBE61:
+.LBB62:
+	.loc 1 264 0
 	str	w0, [x1, 4148]
-.LBE80:
-.LBB81:
-	.loc 1 580 0
+.LBE62:
+.LBB63:
+	.loc 1 265 0
 #APP
-// 580 "drivers/misc/rockchip-secure-otp.c" 1
+// 265 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	str	w22, [x0, 4152]
-.LVL130:
-.LBE81:
-.LBB82:
-	.loc 1 581 0
+.LVL104:
+.LBE63:
+.LBB64:
+	.loc 1 266 0
 #APP
-// 581 "drivers/misc/rockchip-secure-otp.c" 1
+// 266 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
-.LBE82:
-	.loc 1 582 0
+.LBE64:
+	.loc 1 267 0
 	mov	w1, 2
-.LBB83:
-	.loc 1 581 0
+.LBB65:
+	.loc 1 266 0
 	str	w19, [x0, 32]
-.LBE83:
-	.loc 1 582 0
+.LBE65:
+	.loc 1 267 0
 	mov	x0, x28
 	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL131:
-	.loc 1 583 0
-	tbnz	w0, #31, .L47
-.LVL132:
-.LBB84:
-	.loc 1 588 0
+.LVL105:
+	.loc 1 268 0
+	tbnz	w0, #31, .L41
+.LVL106:
+.LBB66:
+	.loc 1 273 0
 #APP
-// 588 "drivers/misc/rockchip-secure-otp.c" 1
+// 273 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
-.LVL133:
+.LVL107:
 	mov	w22, -65535
-.LVL134:
+.LVL108:
 	str	w22, [x0, 36]
-.LVL135:
-.LBE84:
-.LBB85:
-	.loc 1 589 0
+.LVL109:
+.LBE66:
+.LBB67:
+	.loc 1 274 0
 #APP
-// 589 "drivers/misc/rockchip-secure-otp.c" 1
+// 274 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	mov	w1, 250
 	str	w1, [x0, 4096]
-.LVL136:
-.LBE85:
-.LBB86:
-	.loc 1 590 0
+.LVL110:
+.LBE67:
+.LBB68:
+	.loc 1 275 0
 #APP
-// 590 "drivers/misc/rockchip-secure-otp.c" 1
+// 275 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	mov	w1, 9
 	str	w1, [x0, 4100]
-.LVL137:
-.LBE86:
-.LBB87:
-	.loc 1 591 0
+.LVL111:
+.LBE68:
+.LBB69:
+	.loc 1 276 0
 #APP
-// 591 "drivers/misc/rockchip-secure-otp.c" 1
+// 276 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
-.LBE87:
-	.loc 1 592 0
+.LBE69:
+	.loc 1 277 0
 	mov	w1, 2
-.LBB88:
-	.loc 1 591 0
+.LBB70:
+	.loc 1 276 0
 	str	w19, [x0, 32]
-.LBE88:
-	.loc 1 592 0
+.LBE70:
+	.loc 1 277 0
 	mov	x0, x28
 	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL138:
-	.loc 1 593 0
-	tbnz	w0, #31, .L47
-.LVL139:
-.LBB89:
-	.loc 1 598 0
+.LVL112:
+	.loc 1 278 0
+	tbnz	w0, #31, .L41
+.LVL113:
+.LBB71:
+	.loc 1 283 0
 #APP
-// 598 "drivers/misc/rockchip-secure-otp.c" 1
+// 283 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
-.LVL140:
+.LVL114:
 	mov	w1, 14848
 	movk	w1, 0xff00, lsl 16
 	str	w1, [x0, 32]
-.LVL141:
-.LBE89:
-.LBB90:
-	.loc 1 599 0
+.LVL115:
+.LBE71:
+.LBB72:
+	.loc 1 284 0
 #APP
-// 599 "drivers/misc/rockchip-secure-otp.c" 1
+// 284 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	mov	w1, -65522
 	str	w1, [x0, 36]
-.LVL142:
-.LBE90:
-.LBB91:
-	.loc 1 600 0
+.LVL116:
+.LBE72:
+.LBB73:
+	.loc 1 285 0
 #APP
-// 600 "drivers/misc/rockchip-secure-otp.c" 1
+// 285 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	str	w27, [x0, 4096]
-.LVL143:
-.LBE91:
-.LBB92:
-	.loc 1 601 0
+.LVL117:
+.LBE73:
+.LBB74:
+	.loc 1 286 0
 #APP
-// 601 "drivers/misc/rockchip-secure-otp.c" 1
+// 286 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	str	w23, [x0, 4100]
-.LVL144:
-.LBE92:
-.LBB93:
-	.loc 1 602 0
+.LVL118:
+.LBE74:
+.LBB75:
+	.loc 1 287 0
 #APP
-// 602 "drivers/misc/rockchip-secure-otp.c" 1
+// 287 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	str	w26, [x0, 4104]
-.LVL145:
-.LBE93:
-.LBB94:
-	.loc 1 603 0
+.LVL119:
+.LBE75:
+.LBB76:
+	.loc 1 288 0
 #APP
-// 603 "drivers/misc/rockchip-secure-otp.c" 1
+// 288 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	mov	w1, 21
 	str	w1, [x0, 4108]
-.LVL146:
-.LBE94:
-.LBB95:
-	.loc 1 604 0
+.LVL120:
+.LBE76:
+.LBB77:
+	.loc 1 289 0
 #APP
-// 604 "drivers/misc/rockchip-secure-otp.c" 1
+// 289 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	mov	w1, 220
 	str	w1, [x0, 4112]
-.LVL147:
-.LBE95:
-.LBB96:
-	.loc 1 605 0
+.LVL121:
+.LBE77:
+.LBB78:
+	.loc 1 290 0
 #APP
-// 605 "drivers/misc/rockchip-secure-otp.c" 1
+// 290 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	mov	w1, 146
 	str	w1, [x0, 4116]
-.LVL148:
-.LBE96:
-.LBB97:
-	.loc 1 606 0
+.LVL122:
+.LBE78:
+.LBB79:
+	.loc 1 291 0
 #APP
-// 606 "drivers/misc/rockchip-secure-otp.c" 1
+// 291 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	mov	w1, 121
 	str	w1, [x0, 4120]
-.LVL149:
-.LBE97:
-.LBB98:
-	.loc 1 607 0
+.LVL123:
+.LBE79:
+.LBB80:
+	.loc 1 292 0
 #APP
-// 607 "drivers/misc/rockchip-secure-otp.c" 1
+// 292 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	mov	w1, 129
 	str	w1, [x0, 4124]
-.LVL150:
-.LBE98:
-.LBB99:
-	.loc 1 608 0
+.LVL124:
+.LBE80:
+.LBB81:
+	.loc 1 293 0
 #APP
-// 608 "drivers/misc/rockchip-secure-otp.c" 1
+// 293 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	mov	w1, 126
 	str	w1, [x0, 4128]
-.LVL151:
-.LBE99:
-.LBB100:
-	.loc 1 609 0
+.LVL125:
+.LBE81:
+.LBB82:
+	.loc 1 294 0
 #APP
-// 609 "drivers/misc/rockchip-secure-otp.c" 1
+// 294 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	mov	w1, 33
 	str	w1, [x0, 4132]
-.LVL152:
-.LBE100:
-.LBB101:
-	.loc 1 610 0
+.LVL126:
+.LBE82:
+.LBB83:
+	.loc 1 295 0
 #APP
-// 610 "drivers/misc/rockchip-secure-otp.c" 1
+// 295 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	mov	w1, 17
 	str	w1, [x0, 4136]
-.LVL153:
-.LBE101:
-.LBB102:
-	.loc 1 611 0
+.LVL127:
+.LBE83:
+.LBB84:
+	.loc 1 296 0
 #APP
-// 611 "drivers/misc/rockchip-secure-otp.c" 1
+// 296 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	mov	w1, 157
 	str	w1, [x0, 4140]
-.LVL154:
-.LBE102:
-.LBB103:
-	.loc 1 612 0
+.LVL128:
+.LBE84:
+.LBB85:
+	.loc 1 297 0
 #APP
-// 612 "drivers/misc/rockchip-secure-otp.c" 1
+// 297 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	mov	w26, 2
 	str	w26, [x0, 4144]
-.LVL155:
-.LBE103:
-.LBB104:
-	.loc 1 613 0
+.LVL129:
+.LBE85:
+.LBB86:
+	.loc 1 298 0
 #APP
-// 613 "drivers/misc/rockchip-secure-otp.c" 1
+// 298 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	str	wzr, [x0, 4148]
-.LVL156:
-.LBE104:
-.LBB105:
-	.loc 1 614 0
+.LVL130:
+.LBE86:
+.LBB87:
+	.loc 1 299 0
 #APP
-// 614 "drivers/misc/rockchip-secure-otp.c" 1
+// 299 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	mov	w1, 64
 	str	w1, [x0, 4152]
-.LVL157:
-.LBE105:
-.LBB106:
-	.loc 1 615 0
+.LVL131:
+.LBE87:
+.LBB88:
+	.loc 1 300 0
 #APP
-// 615 "drivers/misc/rockchip-secure-otp.c" 1
+// 300 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
-.LBE106:
-	.loc 1 616 0
+.LBE88:
+	.loc 1 301 0
 	mov	w1, w26
-.LBB107:
-	.loc 1 615 0
+.LBB89:
+	.loc 1 300 0
 	str	w19, [x0, 32]
-.LBE107:
-	.loc 1 616 0
+.LBE89:
+	.loc 1 301 0
 	mov	x0, x28
 	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL158:
-	.loc 1 617 0
-	tbnz	w0, #31, .L47
-.LVL159:
-.LBB108:
-	.loc 1 622 0
+.LVL132:
+	.loc 1 302 0
+	tbnz	w0, #31, .L41
+.LVL133:
+.LBB90:
+	.loc 1 307 0
 #APP
-// 622 "drivers/misc/rockchip-secure-otp.c" 1
+// 307 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
-.LVL160:
+.LVL134:
 	str	w24, [x0, 36]
-.LVL161:
-.LBE108:
-.LBB109:
-	.loc 1 623 0
+.LVL135:
+.LBE90:
+.LBB91:
+	.loc 1 308 0
 #APP
-// 623 "drivers/misc/rockchip-secure-otp.c" 1
+// 308 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	mov	w1, 252
 	str	w1, [x0, 4096]
-.LVL162:
-.LBE109:
-.LBB110:
-	.loc 1 624 0
+.LVL136:
+.LBE91:
+.LBB92:
+	.loc 1 309 0
 #APP
-// 624 "drivers/misc/rockchip-secure-otp.c" 1
+// 309 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	mov	w27, 10
 	str	w27, [x0, 4100]
-.LVL163:
-.LBE110:
-.LBB111:
-	.loc 1 625 0
+.LVL137:
+.LBE92:
+.LBB93:
+	.loc 1 310 0
 #APP
-// 625 "drivers/misc/rockchip-secure-otp.c" 1
+// 310 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	mov	w1, 112
 	str	w1, [x0, 4104]
-.LVL164:
-.LBE111:
-.LBB112:
-	.loc 1 626 0
+.LVL138:
+.LBE93:
+.LBB94:
+	.loc 1 311 0
 #APP
-// 626 "drivers/misc/rockchip-secure-otp.c" 1
+// 311 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
-.LBE112:
-	.loc 1 627 0
+.LBE94:
+	.loc 1 312 0
 	mov	w1, w26
-.LBB113:
-	.loc 1 626 0
+.LBB95:
+	.loc 1 311 0
 	str	w19, [x0, 32]
-.LBE113:
-	.loc 1 627 0
+.LBE95:
+	.loc 1 312 0
 	mov	x0, x28
 	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL165:
-	.loc 1 628 0
-	tbnz	w0, #31, .L47
-.LVL166:
-.LBB114:
-	.loc 1 633 0
+.LVL139:
+	.loc 1 313 0
+	tbnz	w0, #31, .L41
+.LVL140:
+.LBB96:
+	.loc 1 318 0
 #APP
-// 633 "drivers/misc/rockchip-secure-otp.c" 1
+// 318 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
-.LVL167:
+.LVL141:
 	mov	w1, 512
 	movk	w1, 0xff00, lsl 16
 	str	w1, [x0, 32]
-.LVL168:
-.LBE114:
-.LBB115:
-	.loc 1 634 0
+.LVL142:
+.LBE96:
+.LBB97:
+	.loc 1 319 0
 #APP
-// 634 "drivers/misc/rockchip-secure-otp.c" 1
+// 319 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	str	w24, [x0, 36]
-.LVL169:
-.LBE115:
-.LBB116:
-	.loc 1 635 0
+.LVL143:
+.LBE97:
+.LBB98:
+	.loc 1 320 0
 #APP
-// 635 "drivers/misc/rockchip-secure-otp.c" 1
+// 320 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	mov	w1, 192
 	str	w1, [x0, 4096]
-.LBE116:
-.LBB117:
-	.loc 1 636 0
+.LBE98:
+.LBB99:
+	.loc 1 321 0
 	and	w1, w21, 255
-.LVL170:
+.LVL144:
 #APP
-// 636 "drivers/misc/rockchip-secure-otp.c" 1
+// 321 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
-.LBE117:
-.LBB118:
-	.loc 1 637 0
+.LBE99:
+.LBB100:
+	.loc 1 322 0
 	lsr	w21, w21, 8
-.LVL171:
-.LBE118:
-.LBB119:
-	.loc 1 636 0
+.LVL145:
+.LBE100:
+.LBB101:
+	.loc 1 321 0
 	str	w1, [x0, 4100]
-.LBE119:
-.LBB120:
-	.loc 1 637 0
+.LBE101:
+.LBB102:
+	.loc 1 322 0
 #APP
-// 637 "drivers/misc/rockchip-secure-otp.c" 1
+// 322 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	str	w21, [x0, 4104]
-.LVL172:
-.LBE120:
-.LBB121:
-	.loc 1 638 0
+.LVL146:
+.LBE102:
+.LBB103:
+	.loc 1 323 0
 #APP
-// 638 "drivers/misc/rockchip-secure-otp.c" 1
+// 323 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
-.LBE121:
-	.loc 1 639 0
+.LBE103:
+	.loc 1 324 0
 	mov	w1, w26
-.LVL173:
-.LBB122:
-	.loc 1 638 0
+.LVL147:
+.LBB104:
+	.loc 1 323 0
 	str	w19, [x0, 32]
-.LBE122:
-	.loc 1 639 0
+.LBE104:
+	.loc 1 324 0
 	mov	x0, x28
 	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL174:
-	.loc 1 640 0
-	tbnz	w0, #31, .L47
-.LVL175:
-.LBB123:
-	.loc 1 645 0
+.LVL148:
+	.loc 1 325 0
+	tbnz	w0, #31, .L41
+.LVL149:
+.LBB105:
+	.loc 1 330 0
 #APP
-// 645 "drivers/misc/rockchip-secure-otp.c" 1
+// 330 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
-.LVL176:
+.LVL150:
 	str	w22, [x0, 36]
-.LVL177:
-.LBE123:
-.LBB124:
-	.loc 1 646 0
+.LVL151:
+.LBE105:
+.LBB106:
+	.loc 1 331 0
 #APP
-// 646 "drivers/misc/rockchip-secure-otp.c" 1
+// 331 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	mov	w1, 224
 	str	w1, [x0, 4096]
-.LVL178:
-.LBE124:
-.LBB125:
-	.loc 1 647 0
+.LVL152:
+.LBE106:
+.LBB107:
+	.loc 1 332 0
 #APP
-// 647 "drivers/misc/rockchip-secure-otp.c" 1
+// 332 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	str	wzr, [x0, 4100]
-.LVL179:
-.LBE125:
-.LBB126:
-	.loc 1 648 0
+.LVL153:
+.LBE107:
+.LBB108:
+	.loc 1 333 0
 #APP
-// 648 "drivers/misc/rockchip-secure-otp.c" 1
+// 333 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
-.LBE126:
-	.loc 1 649 0
+.LBE108:
+	.loc 1 334 0
 	mov	w1, w26
-.LBB127:
-	.loc 1 648 0
+.LBB109:
+	.loc 1 333 0
 	str	w19, [x0, 32]
-.LBE127:
-	.loc 1 649 0
+.LBE109:
+	.loc 1 334 0
 	mov	x0, x28
 	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL180:
-	.loc 1 650 0
-	tbnz	w0, #31, .L47
-.LVL181:
-.LBB128:
-	.loc 1 655 0
+.LVL154:
+	.loc 1 335 0
+	tbnz	w0, #31, .L41
+.LVL155:
+.LBB110:
+	.loc 1 340 0
 #APP
-// 655 "drivers/misc/rockchip-secure-otp.c" 1
+// 340 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
-.LVL182:
+.LVL156:
 	str	w22, [x0, 36]
-.LVL183:
-.LBE128:
-.LBB129:
-	.loc 1 656 0
+.LVL157:
+.LBE110:
+.LBB111:
+	.loc 1 341 0
 #APP
-// 656 "drivers/misc/rockchip-secure-otp.c" 1
+// 341 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
@@ -1768,218 +1539,218 @@ rk3568_secure_otp_write_2_bytes_noecc:
 	mov	w1, 14848
 	movk	w1, 0xff00, lsl 16
 	str	w1, [x0, 32]
-.LVL184:
-.LBE129:
-.LBB130:
-	.loc 1 657 0
+.LVL158:
+.LBE111:
+.LBB112:
+	.loc 1 342 0
 #APP
-// 657 "drivers/misc/rockchip-secure-otp.c" 1
+// 342 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	mov	w1, 255
 	str	w1, [x0, 4096]
-.LVL185:
-.LBE130:
-.LBB131:
-	.loc 1 658 0
+.LVL159:
+.LBE112:
+.LBB113:
+	.loc 1 343 0
 #APP
-// 658 "drivers/misc/rockchip-secure-otp.c" 1
+// 343 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	str	w27, [x0, 4100]
-.LVL186:
-.LBE131:
-.LBB132:
-	.loc 1 659 0
+.LVL160:
+.LBE113:
+.LBB114:
+	.loc 1 344 0
 #APP
-// 659 "drivers/misc/rockchip-secure-otp.c" 1
+// 344 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
-.LBE132:
-	.loc 1 660 0
+.LBE114:
+	.loc 1 345 0
 	mov	w1, w26
-.LBB133:
-	.loc 1 659 0
+.LBB115:
+	.loc 1 344 0
 	str	w19, [x0, 32]
-.LBE133:
-	.loc 1 660 0
+.LBE115:
+	.loc 1 345 0
 	mov	x0, x28
 	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL187:
-	.loc 1 661 0
-	tbnz	w0, #31, .L47
-.LVL188:
-.LBB134:
-	.loc 1 666 0
+.LVL161:
+	.loc 1 346 0
+	tbnz	w0, #31, .L41
+.LVL162:
+.LBB116:
+	.loc 1 351 0
 #APP
-// 666 "drivers/misc/rockchip-secure-otp.c" 1
+// 351 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
-.LVL189:
+.LVL163:
 	str	w22, [x0, 36]
-.LVL190:
-.LBE134:
-.LBB135:
-	.loc 1 667 0
+.LVL164:
+.LBE116:
+.LBB117:
+	.loc 1 352 0
 #APP
-// 667 "drivers/misc/rockchip-secure-otp.c" 1
+// 352 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	str	w23, [x0, 4096]
-.LVL191:
-.LBE135:
-.LBB136:
-	.loc 1 668 0
+.LVL165:
+.LBE117:
+.LBB118:
+	.loc 1 353 0
 #APP
-// 668 "drivers/misc/rockchip-secure-otp.c" 1
+// 353 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	mov	w1, 191
 	str	w1, [x0, 4100]
-.LVL192:
-.LBE136:
-.LBB137:
-	.loc 1 669 0
+.LVL166:
+.LBE118:
+.LBB119:
+	.loc 1 354 0
 #APP
-// 669 "drivers/misc/rockchip-secure-otp.c" 1
+// 354 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
-.LBE137:
-	.loc 1 670 0
+.LBE119:
+	.loc 1 355 0
 	mov	w1, w26
-.LBB138:
-	.loc 1 669 0
+.LBB120:
+	.loc 1 354 0
 	str	w19, [x0, 32]
-.LBE138:
-	.loc 1 670 0
+.LBE120:
+	.loc 1 355 0
 	mov	x0, x28
 	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL193:
-	.loc 1 671 0
-	tbnz	w0, #31, .L47
-	.loc 1 676 0
+.LVL167:
+	.loc 1 356 0
+	tbnz	w0, #31, .L41
+	.loc 1 361 0
 	mov	x0, x28
-.LVL194:
+.LVL168:
 	bl	rockchip_secure_otp_check_flag.isra.0
-.LVL195:
-	.loc 1 677 0
-	tbz	w0, #31, .L48
-	.loc 1 678 0
+.LVL169:
+	.loc 1 362 0
+	tbz	w0, #31, .L42
+	.loc 1 363 0
 	adrp	x1, .LANCHOR1
 	adrp	x0, .LC6
-.LVL196:
+.LVL170:
 	add	x1, x1, :lo12:.LANCHOR1
 	add	x0, x0, :lo12:.LC6
-	b	.L57
-.LVL197:
-.L48:
-.LBB139:
-	.loc 1 682 0
+	b	.L51
+.LVL171:
+.L42:
+.LBB121:
+	.loc 1 367 0
 #APP
-// 682 "drivers/misc/rockchip-secure-otp.c" 1
+// 367 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
-.LVL198:
+.LVL172:
 	mov	w22, -65535
 	str	w22, [x0, 36]
-.LVL199:
-.LBE139:
-.LBB140:
-	.loc 1 683 0
+.LVL173:
+.LBE121:
+.LBB122:
+	.loc 1 368 0
 #APP
-// 683 "drivers/misc/rockchip-secure-otp.c" 1
+// 368 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	mov	w19, 2
 	str	w19, [x0, 4096]
-.LVL200:
-.LBE140:
-.LBB141:
-	.loc 1 684 0
+.LVL174:
+.LBE122:
+.LBB123:
+	.loc 1 369 0
 #APP
-// 684 "drivers/misc/rockchip-secure-otp.c" 1
+// 369 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	mov	w1, 191
 	str	w1, [x0, 4100]
-.LVL201:
-.LBE141:
-.LBB142:
-	.loc 1 685 0
+.LVL175:
+.LBE123:
+.LBB124:
+	.loc 1 370 0
 #APP
-// 685 "drivers/misc/rockchip-secure-otp.c" 1
+// 370 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	mov	w21, 65537
-.LVL202:
-.LBE142:
-	.loc 1 686 0
+.LVL176:
+.LBE124:
+	.loc 1 371 0
 	mov	w1, w19
-.LBB143:
-	.loc 1 685 0
+.LBB125:
+	.loc 1 370 0
 	str	w21, [x0, 32]
-.LBE143:
-	.loc 1 686 0
+.LBE125:
+	.loc 1 371 0
 	mov	x0, x28
 	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL203:
-	.loc 1 687 0
-	tbnz	w0, #31, .L47
-	.loc 1 692 0
+.LVL177:
+	.loc 1 372 0
+	tbnz	w0, #31, .L41
+	.loc 1 377 0
 	mov	x0, x28
-.LVL204:
+.LVL178:
 	bl	rockchip_secure_otp_wait_flag.isra.1
-.LVL205:
-	.loc 1 693 0
-	tbz	w0, #31, .L49
-	.loc 1 694 0
+.LVL179:
+	.loc 1 378 0
+	tbz	w0, #31, .L43
+	.loc 1 379 0
 	adrp	x1, .LANCHOR1
 	adrp	x0, .LC7
-.LVL206:
+.LVL180:
 	add	x1, x1, :lo12:.LANCHOR1
 	add	x0, x0, :lo12:.LC7
-	b	.L57
-.LVL207:
-.L49:
-.LBB144:
-	.loc 1 698 0
+	b	.L51
+.LVL181:
+.L43:
+.LBB126:
+	.loc 1 383 0
 #APP
-// 698 "drivers/misc/rockchip-secure-otp.c" 1
+// 383 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
-.LVL208:
+.LVL182:
 	mov	w1, -65533
 	str	w1, [x0, 772]
-.LVL209:
-.LBE144:
-.LBB145:
-	.loc 1 699 0
+.LVL183:
+.LBE126:
+.LBB127:
+	.loc 1 384 0
 #APP
-// 699 "drivers/misc/rockchip-secure-otp.c" 1
+// 384 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
@@ -1987,179 +1758,179 @@ rk3568_secure_otp_write_2_bytes_noecc:
 	mov	w1, 512
 	movk	w1, 0xff00, lsl 16
 	str	w1, [x0, 32]
-.LVL210:
-.LBE145:
-.LBB146:
-	.loc 1 700 0
+.LVL184:
+.LBE127:
+.LBB128:
+	.loc 1 385 0
 #APP
-// 700 "drivers/misc/rockchip-secure-otp.c" 1
+// 385 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	str	w22, [x0, 36]
-.LVL211:
-.LBE146:
-.LBB147:
-	.loc 1 701 0
+.LVL185:
+.LBE128:
+.LBB129:
+	.loc 1 386 0
 #APP
-// 701 "drivers/misc/rockchip-secure-otp.c" 1
+// 386 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	str	w19, [x0, 4096]
-.LVL212:
-.LBE147:
-.LBB148:
-	.loc 1 702 0
+.LVL186:
+.LBE129:
+.LBB130:
+	.loc 1 387 0
 #APP
-// 702 "drivers/misc/rockchip-secure-otp.c" 1
+// 387 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	mov	w1, 128
 	str	w1, [x0, 4100]
-.LVL213:
-.LBE148:
-.LBB149:
-	.loc 1 703 0
+.LVL187:
+.LBE130:
+.LBB131:
+	.loc 1 388 0
 #APP
-// 703 "drivers/misc/rockchip-secure-otp.c" 1
+// 388 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
-.LBE149:
-	.loc 1 704 0
+.LBE131:
+	.loc 1 389 0
 	mov	w1, w19
-.LBB150:
-	.loc 1 703 0
+.LBB132:
+	.loc 1 388 0
 	str	w21, [x0, 32]
-.LBE150:
-	.loc 1 704 0
+.LBE132:
+	.loc 1 389 0
 	mov	x0, x28
 	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL214:
-	.loc 1 705 0
-	tbnz	w0, #31, .L47
-.LVL215:
-.LBB151:
-	.loc 1 710 0
+.LVL188:
+	.loc 1 390 0
+	tbnz	w0, #31, .L41
+.LVL189:
+.LBB133:
+	.loc 1 395 0
 #APP
-// 710 "drivers/misc/rockchip-secure-otp.c" 1
+// 395 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
-.LVL216:
+.LVL190:
 	str	w22, [x0, 36]
-.LVL217:
-.LBE151:
-.LBB152:
-	.loc 1 711 0
+.LVL191:
+.LBE133:
+.LBB134:
+	.loc 1 396 0
 #APP
-// 711 "drivers/misc/rockchip-secure-otp.c" 1
+// 396 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	mov	w1, 160
 	str	w1, [x0, 4096]
-.LVL218:
-.LBE152:
-.LBB153:
-	.loc 1 712 0
+.LVL192:
+.LBE134:
+.LBB135:
+	.loc 1 397 0
 #APP
-// 712 "drivers/misc/rockchip-secure-otp.c" 1
+// 397 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	str	wzr, [x0, 4100]
-.LVL219:
-.LBE153:
-.LBB154:
-	.loc 1 713 0
+.LVL193:
+.LBE135:
+.LBB136:
+	.loc 1 398 0
 #APP
-// 713 "drivers/misc/rockchip-secure-otp.c" 1
+// 398 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
-.LBE154:
-	.loc 1 714 0
+.LBE136:
+	.loc 1 399 0
 	mov	w1, w19
-.LBB155:
-	.loc 1 713 0
+.LBB137:
+	.loc 1 398 0
 	str	w21, [x0, 32]
-.LBE155:
-	.loc 1 714 0
+.LBE137:
+	.loc 1 399 0
 	mov	x0, x28
 	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL220:
-	.loc 1 715 0
-	tbnz	w0, #31, .L47
-.LVL221:
-.LBB156:
-	.loc 1 720 0
+.LVL194:
+	.loc 1 400 0
+	tbnz	w0, #31, .L41
+.LVL195:
+.LBB138:
+	.loc 1 405 0
 #APP
-// 720 "drivers/misc/rockchip-secure-otp.c" 1
+// 405 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
-.LVL222:
+.LVL196:
 	mov	w1, 250
 	str	w1, [x0, 4096]
-.LVL223:
-.LBE156:
-.LBB157:
-	.loc 1 721 0
+.LVL197:
+.LBE138:
+.LBB139:
+	.loc 1 406 0
 #APP
-// 721 "drivers/misc/rockchip-secure-otp.c" 1
+// 406 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
 	mov	w1, 9
 	str	w1, [x0, 4100]
-.LVL224:
-.LBE157:
-.LBB158:
-	.loc 1 722 0
+.LVL198:
+.LBE139:
+.LBB140:
+	.loc 1 407 0
 #APP
-// 722 "drivers/misc/rockchip-secure-otp.c" 1
+// 407 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x28]
-.LBE158:
-	.loc 1 723 0
+.LBE140:
+	.loc 1 408 0
 	mov	w1, w19
-.LBB159:
-	.loc 1 722 0
+.LBB141:
+	.loc 1 407 0
 	str	w21, [x0, 32]
-.LBE159:
-	.loc 1 723 0
+.LBE141:
+	.loc 1 408 0
 	mov	x0, x28
 	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL225:
-	.loc 1 724 0
-	tbz	w0, #31, .L46
-	b	.L47
+.LVL199:
+	.loc 1 409 0
+	tbz	w0, #31, .L40
+	b	.L41
 	.cfi_endproc
-.LFE280:
+.LFE269:
 	.size	rk3568_secure_otp_write_2_bytes_noecc, .-rk3568_secure_otp_write_2_bytes_noecc
 	.section	.text.rockchip_secure_otp_ecc_enable,"ax",@progbits
 	.align	2
 	.type	rockchip_secure_otp_ecc_enable, %function
 rockchip_secure_otp_ecc_enable:
-.LFB275:
-	.loc 1 200 0
+.LFB267:
+	.loc 1 128 0
 	.cfi_startproc
-.LVL226:
+.LVL200:
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
@@ -2169,10 +1940,10 @@ rockchip_secure_otp_ecc_enable:
 	.cfi_def_cfa_register 29
 	str	x19, [sp, 16]
 	.cfi_offset 19, -16
-.LBB174:
-	.loc 1 203 0
+.LBB156:
+	.loc 1 131 0
 #APP
-// 203 "drivers/misc/rockchip-secure-otp.c" 1
+// 131 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
@@ -2180,84 +1951,84 @@ rockchip_secure_otp_ecc_enable:
 	mov	w3, 512
 	movk	w3, 0xff00, lsl 16
 	str	w3, [x2, 32]
-.LVL227:
-.LBE174:
-.LBB175:
-	.loc 1 204 0
+.LVL201:
+.LBE156:
+.LBB157:
+	.loc 1 132 0
 #APP
-// 204 "drivers/misc/rockchip-secure-otp.c" 1
+// 132 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x2, [x0]
 	mov	w3, -65535
 	str	w3, [x2, 36]
-.LVL228:
-.LBE175:
-.LBB176:
-	.loc 1 205 0
+.LVL202:
+.LBE157:
+.LBB158:
+	.loc 1 133 0
 #APP
-// 205 "drivers/misc/rockchip-secure-otp.c" 1
+// 133 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x2, [x0]
 	mov	w3, 250
 	str	w3, [x2, 4096]
-.LBE176:
-	.loc 1 206 0
-	cbz	w1, .L59
-.LVL229:
-.LBB177:
-	.loc 1 207 0
+.LBE158:
+	.loc 1 134 0
+	cbz	w1, .L53
+.LVL203:
+.LBB159:
+	.loc 1 135 0
 #APP
-// 207 "drivers/misc/rockchip-secure-otp.c" 1
+// 135 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x1, [x0]
-.LVL230:
+.LVL204:
 	str	wzr, [x1, 4100]
-.LVL231:
-.L60:
-.LBE177:
-.LBB178:
-	.loc 1 211 0
+.LVL205:
+.L54:
+.LBE159:
+.LBB160:
+	.loc 1 139 0
 #APP
-// 211 "drivers/misc/rockchip-secure-otp.c" 1
+// 139 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x1, [x0]
 	mov	w2, 65537
 	str	w2, [x1, 32]
-.LBE178:
-	.loc 1 213 0
+.LBE160:
+	.loc 1 141 0
 	mov	w1, 2
 	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL232:
+.LVL206:
 	mov	w19, w0
-.LVL233:
-	.loc 1 214 0
-	tbz	w0, #31, .L58
-.LVL234:
-.LBB179:
-.LBB180:
-	.loc 1 215 0
+.LVL207:
+	.loc 1 142 0
+	tbz	w0, #31, .L52
+.LVL208:
+.LBB161:
+.LBB162:
+	.loc 1 143 0
 	adrp	x1, .LANCHOR2
 	adrp	x0, .LC8
-.LVL235:
+.LVL209:
 	add	x1, x1, :lo12:.LANCHOR2
 	add	x0, x0, :lo12:.LC8
 	bl	printf
-.LVL236:
-.L58:
-.LBE180:
-.LBE179:
-	.loc 1 218 0
+.LVL210:
+.L52:
+.LBE162:
+.LBE161:
+	.loc 1 146 0
 	mov	w0, w19
 	ldr	x19, [sp, 16]
-.LVL237:
+.LVL211:
 	ldp	x29, x30, [sp], 32
 	.cfi_remember_state
 	.cfi_restore 30
@@ -2265,32 +2036,32 @@ rockchip_secure_otp_ecc_enable:
 	.cfi_restore 19
 	.cfi_def_cfa 31, 0
 	ret
-.LVL238:
-.L59:
+.LVL212:
+.L53:
 	.cfi_restore_state
-.LBB181:
-	.loc 1 209 0
+.LBB163:
+	.loc 1 137 0
 #APP
-// 209 "drivers/misc/rockchip-secure-otp.c" 1
+// 137 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x1, [x0]
 	mov	w2, 9
 	str	w2, [x1, 4100]
-	b	.L60
-.LBE181:
+	b	.L54
+.LBE163:
 	.cfi_endproc
-.LFE275:
+.LFE267:
 	.size	rockchip_secure_otp_ecc_enable, .-rockchip_secure_otp_ecc_enable
 	.section	.text.rk3568_secure_otp_read,"ax",@progbits
 	.align	2
 	.type	rk3568_secure_otp_read, %function
 rk3568_secure_otp_read:
-.LFB279:
-	.loc 1 465 0
+.LFB268:
+	.loc 1 150 0
 	.cfi_startproc
-.LVL239:
+.LVL213:
 	stp	x29, x30, [sp, -80]!
 	.cfi_def_cfa_offset 80
 	.cfi_offset 29, -80
@@ -2313,187 +2084,187 @@ rk3568_secure_otp_read:
 	stp	x25, x26, [sp, 64]
 	.cfi_offset 25, -16
 	.cfi_offset 26, -8
-	.loc 1 466 0
+	.loc 1 151 0
 	bl	dev_get_platdata
-.LVL240:
+.LVL214:
 	mov	x19, x0
-.LVL241:
-	.loc 1 467 0
+.LVL215:
+	.loc 1 152 0
 	mov	x0, x22
-.LVL242:
+.LVL216:
 	bl	dev_get_driver_data
-.LVL243:
-	.loc 1 473 0
+.LVL217:
+	.loc 1 158 0
 	ldr	x4, [x0, 16]
-	.loc 1 467 0
+	.loc 1 152 0
 	mov	x24, x0
-.LVL244:
-	.loc 1 473 0
+.LVL218:
+	.loc 1 158 0
 	ldr	x1, [x19, 24]
-	.loc 1 472 0
+	.loc 1 157 0
 	asr	w20, w20, 1
-.LVL245:
-	.loc 1 473 0
+.LVL219:
+	.loc 1 158 0
 	ldp	x0, x2, [x19, 8]
-.LVL246:
+.LVL220:
 	mov	w3, w20
 	blr	x4
-.LVL247:
-	.loc 1 476 0
+.LVL221:
+	.loc 1 161 0
 	sub	w0, w20, #224
 	cmp	w0, 7
-	bhi	.L64
-	.loc 1 477 0
+	bhi	.L58
+	.loc 1 162 0
 	mov	w1, 0
-.L80:
-	.loc 1 479 0
+.L74:
+	.loc 1 164 0
 	mov	x0, x19
 	bl	rockchip_secure_otp_ecc_enable
-.LVL248:
-.LBB182:
-	.loc 1 481 0
+.LVL222:
+.LBB164:
+	.loc 1 166 0
 #APP
-// 481 "drivers/misc/rockchip-secure-otp.c" 1
+// 166 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x19]
 	mov	w25, 65537
-.LBE182:
-	.loc 1 488 0
+.LBE164:
+	.loc 1 173 0
 	mov	x26, -255
-	.loc 1 470 0
+	.loc 1 155 0
 	mov	w22, 0
-.LVL249:
-	.loc 1 488 0
+.LVL223:
+	.loc 1 173 0
 	movk	x26, 0x7f, lsl 32
 	movk	x26, 0xf, lsl 48
-.LBB183:
-	.loc 1 481 0
+.LBB165:
+	.loc 1 166 0
 	str	w25, [x0, 256]
-.LBE183:
-	.loc 1 482 0
+.LBE165:
+	.loc 1 167 0
 	mov	x0, 50
 	bl	udelay
-.LVL250:
-.L66:
-	.loc 1 483 0
-	cbz	w23, .L71
-	.loc 1 485 0
+.LVL224:
+.L60:
+	.loc 1 168 0
+	cbz	w23, .L65
+	.loc 1 170 0
 	cmp	w20, 448
-	bgt	.L75
+	bgt	.L69
 	sub	w0, w20, #64
-	.loc 1 488 0
+	.loc 1 173 0
 	cmp	w0, 51
-	bhi	.L68
+	bhi	.L62
 	lsr	x0, x26, x0
-	tbnz	x0, 0, .L69
-.L68:
-	.loc 1 488 0 is_stmt 0 discriminator 1
+	tbnz	x0, 0, .L63
+.L62:
+	.loc 1 173 0 is_stmt 0 discriminator 1
 	sub	w0, w20, #229
 	cmp	w0, 218
-	bls	.L69
-	.loc 1 491 0 is_stmt 1
+	bls	.L63
+	.loc 1 176 0 is_stmt 1
 	adrp	x0, .LC4
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC4
 	bl	printf
-.LVL251:
-.L75:
-	.loc 1 486 0
+.LVL225:
+.L69:
+	.loc 1 171 0
 	mov	w22, -1
-.LVL252:
-	b	.L63
-.LVL253:
-.L64:
-	.loc 1 479 0
+.LVL226:
+	b	.L57
+.LVL227:
+.L58:
+	.loc 1 164 0
 	mov	w1, 1
-	b	.L80
-.LVL254:
-.L69:
-.LBB184:
-	.loc 1 495 0
+	b	.L74
+.LVL228:
+.L63:
+.LBB166:
+	.loc 1 180 0
 	orr	w1, w20, -65536
-.LVL255:
+.LVL229:
 #APP
-// 495 "drivers/misc/rockchip-secure-otp.c" 1
+// 180 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x19]
-.LBE184:
-	.loc 1 497 0
+.LBE166:
+	.loc 1 182 0
 	add	w20, w20, 1
-.LVL256:
-.LBB185:
-	.loc 1 495 0
+.LVL230:
+.LBB167:
+	.loc 1 180 0
 	str	w1, [x0, 260]
-.LBE185:
-.LBB186:
-	.loc 1 498 0
+.LBE167:
+.LBB168:
+	.loc 1 183 0
 #APP
-// 498 "drivers/misc/rockchip-secure-otp.c" 1
+// 183 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x19]
-.LBE186:
-	.loc 1 500 0
+.LBE168:
+	.loc 1 185 0
 	mov	w1, 4
-.LVL257:
-.LBB187:
-	.loc 1 498 0
+.LVL231:
+.LBB169:
+	.loc 1 183 0
 	str	w25, [x0, 264]
-.LVL258:
-.LBE187:
-	.loc 1 500 0
+.LVL232:
+.LBE169:
+	.loc 1 185 0
 	mov	x0, x19
 	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL259:
+.LVL233:
 	mov	w22, w0
-.LVL260:
-	.loc 1 501 0
-	tbz	w0, #31, .L70
-	.loc 1 502 0
+.LVL234:
+	.loc 1 186 0
+	tbz	w0, #31, .L64
+	.loc 1 187 0
 	adrp	x1, .LANCHOR3
 	adrp	x0, .LC9
-.LVL261:
+.LVL235:
 	add	x1, x1, :lo12:.LANCHOR3
 	add	x0, x0, :lo12:.LC9
 	bl	printf
-.LVL262:
-.L71:
-.LBB188:
-	.loc 1 516 0
+.LVL236:
+.L65:
+.LBB170:
+	.loc 1 201 0
 #APP
-// 516 "drivers/misc/rockchip-secure-otp.c" 1
+// 201 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x19]
 	mov	w1, 65536
-.LBE188:
-	.loc 1 518 0
+.LBE170:
+	.loc 1 203 0
 	ldr	x2, [x19, 16]
 	mov	w3, w20
 	ldr	x4, [x24, 24]
-.LBB189:
-	.loc 1 516 0
+.LBB171:
+	.loc 1 201 0
 	str	w1, [x0, 256]
-.LBE189:
-	.loc 1 518 0
+.LBE171:
+	.loc 1 203 0
 	ldr	x0, [x19, 8]
 	ldr	x1, [x19, 24]
 	blr	x4
-.LVL263:
-.L63:
-	.loc 1 523 0
+.LVL237:
+.L57:
+	.loc 1 208 0
 	mov	w0, w22
 	ldp	x19, x20, [sp, 16]
-.LVL264:
+.LVL238:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL265:
+.LVL239:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	.cfi_remember_state
@@ -2509,51 +2280,51 @@ rk3568_secure_otp_read:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL266:
-.L70:
+.LVL240:
+.L64:
 	.cfi_restore_state
-.LBB190:
-	.loc 1 506 0
+.LBB172:
+	.loc 1 191 0
 	ldr	x0, [x19]
-.LVL267:
+.LVL241:
 	ldrh	w0, [x0, 292]
 	and	w0, w0, 65535
-.LVL268:
+.LVL242:
 #APP
-// 506 "drivers/misc/rockchip-secure-otp.c" 1
+// 191 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
-.LVL269:
+.LVL243:
 #NO_APP
-.LBE190:
-	.loc 1 508 0
+.LBE172:
+	.loc 1 193 0
 	strb	w0, [x21]
-	.loc 1 509 0
+	.loc 1 194 0
 	cmp	w23, 1
-	beq	.L71
-.LVL270:
-	.loc 1 510 0
+	beq	.L65
+.LVL244:
+	.loc 1 195 0
 	lsr	w0, w0, 8
-.LVL271:
-	.loc 1 511 0
+.LVL245:
+	.loc 1 196 0
 	sub	w23, w23, #2
-.LVL272:
-	.loc 1 510 0
+.LVL246:
+	.loc 1 195 0
 	strb	w0, [x21, 1]
 	add	x21, x21, 2
-.LVL273:
-	b	.L66
+.LVL247:
+	b	.L60
 	.cfi_endproc
-.LFE279:
+.LFE268:
 	.size	rk3568_secure_otp_read, .-rk3568_secure_otp_read
 	.section	.text.rk3568_secure_otp_write,"ax",@progbits
 	.align	2
 	.type	rk3568_secure_otp_write, %function
 rk3568_secure_otp_write:
-.LFB283:
-	.loc 1 910 0
+.LFB272:
+	.loc 1 595 0
 	.cfi_startproc
-.LVL274:
+.LVL248:
 	stp	x29, x30, [sp, -144]!
 	.cfi_def_cfa_offset 144
 	.cfi_offset 29, -144
@@ -2577,127 +2348,127 @@ rk3568_secure_otp_write:
 	.cfi_offset 22, -104
 	.cfi_offset 23, -96
 	.cfi_offset 24, -88
-	.loc 1 910 0
+	.loc 1 595 0
 	str	x2, [x29, 112]
 	str	w1, [x29, 124]
-	.loc 1 911 0
+	.loc 1 596 0
 	bl	dev_get_platdata
-.LVL275:
+.LVL249:
 	mov	x27, x0
-.LVL276:
-	.loc 1 914 0
+.LVL250:
+	.loc 1 599 0
 	sxtw	x0, w20
-.LVL277:
+.LVL251:
 	bl	malloc_simple
-.LVL278:
-	.loc 1 917 0
-	tbz	x20, 0, .L82
-	.loc 1 918 0
+.LVL252:
+	.loc 1 602 0
+	tbz	x20, 0, .L76
+	.loc 1 603 0
 	adrp	x0, .LC10
-.LVL279:
+.LVL253:
 	add	x0, x0, :lo12:.LC10
 	bl	printf
-.LVL280:
-.L87:
-.LBB258:
-.LBB259:
-	.loc 1 745 0
+.LVL254:
+.L81:
+.LBB240:
+.LBB241:
+	.loc 1 430 0
 	mov	w26, -1
-	b	.L81
-.LVL281:
-.L82:
-.LBE259:
-.LBE258:
-	.loc 1 922 0
-	cbz	x0, .L87
-	.loc 1 942 0
+	b	.L75
+.LVL255:
+.L76:
+.LBE241:
+.LBE240:
+	.loc 1 607 0
+	cbz	x0, .L81
+	.loc 1 627 0
 	ldr	w0, [x29, 124]
-.LVL282:
+.LVL256:
 	sub	w0, w0, #224
 	cmp	w0, 7
-	bls	.L85
-	.loc 1 950 0 discriminator 1
+	bls	.L79
+	.loc 1 635 0 discriminator 1
 	mov	w0, 2
-.LBB263:
-.LBB264:
-	.loc 1 895 0 discriminator 1
+.LBB245:
+.LBB246:
+	.loc 1 580 0 discriminator 1
 	adrp	x19, .LANCHOR4
 	add	x19, x19, :lo12:.LANCHOR4
-.LBE264:
-.LBE263:
-	.loc 1 950 0 discriminator 1
+.LBE246:
+.LBE245:
+	.loc 1 635 0 discriminator 1
 	mov	x23, 0
 	sdiv	w0, w20, w0
 	str	w0, [x29, 120]
-.LVL283:
-.L86:
+.LVL257:
+.L80:
 	ldr	w0, [x29, 120]
 	cmp	w0, w23
-	ble	.L107
+	ble	.L101
 	ldr	w0, [x29, 124]
 	add	w20, w0, w23, lsl 1
-	.loc 1 951 0
+	.loc 1 636 0
 	ldr	x0, [x29, 112]
-.LBB344:
-.LBB340:
-	.loc 1 765 0
+.LBB326:
+.LBB322:
+	.loc 1 450 0
 	asr	w21, w20, 1
-.LBE340:
-.LBE344:
-	.loc 1 951 0
+.LBE322:
+.LBE326:
+	.loc 1 636 0
 	ldrh	w24, [x0, x23, lsl 1]
-.LVL284:
-.LBB345:
-.LBB341:
-	.loc 1 763 0
+.LVL258:
+.LBB327:
+.LBB323:
+	.loc 1 448 0
 	mov	x0, x25
 	bl	dev_get_driver_data
-.LVL285:
+.LVL259:
 	mov	x28, x0
-.LVL286:
-	.loc 1 766 0
+.LVL260:
+	.loc 1 451 0
 	cmp	w21, 448
-	bgt	.L87
-	.loc 1 770 0
+	bgt	.L81
+	.loc 1 455 0
 	sub	w0, w21, #64
-.LVL287:
+.LVL261:
 	cmp	w0, 51
-	bhi	.L93
+	bhi	.L87
 	mov	x1, -255
 	movk	x1, 0x7f, lsl 32
 	movk	x1, 0xf, lsl 48
 	lsr	x0, x1, x0
-	tbnz	x0, 0, .L94
-.L93:
+	tbnz	x0, 0, .L88
+.L87:
 	sub	w0, w21, #229
 	cmp	w0, 218
-	bls	.L94
-	.loc 1 773 0
+	bls	.L88
+	.loc 1 458 0
 	mov	w1, w21
 	adrp	x0, .LC4
 	add	x0, x0, :lo12:.LC4
 	bl	printf
-.LVL288:
-	b	.L87
-.LVL289:
-.L91:
-.LBE341:
-.LBE345:
-	.loc 1 945 0
+.LVL262:
+	b	.L81
+.LVL263:
+.L85:
+.LBE323:
+.LBE327:
+	.loc 1 630 0
 	ldr	x0, [x29, 112]
-.LBB346:
-.LBB260:
-	.loc 1 743 0
+.LBB328:
+.LBB242:
+	.loc 1 428 0
 	mov	w3, 2
 	add	x2, x29, 142
-.LBE260:
-.LBE346:
-	.loc 1 945 0
+.LBE242:
+.LBE328:
+	.loc 1 630 0
 	ldrb	w22, [x0, x19]
-.LVL290:
-.LBB347:
-.LBB261:
-	.loc 1 743 0
+.LVL264:
+.LBB329:
+.LBB243:
+	.loc 1 428 0
 	ldr	w0, [x29, 124]
 	adds	w23, w0, w19
 	mov	x0, x25
@@ -2706,43 +2477,43 @@ rk3568_secure_otp_write:
 	sub	w21, w23, w21
 	mov	w1, w21
 	bl	rk3568_secure_otp_read
-.LVL291:
-	.loc 1 744 0
-	cbnz	w0, .L87
+.LVL265:
+	.loc 1 429 0
+	cbnz	w0, .L81
 	ldrh	w3, [x29, 142]
-	.loc 1 747 0
-	cbnz	w24, .L88
-.LVL292:
-	.loc 1 749 0
+	.loc 1 432 0
+	cbnz	w24, .L82
+.LVL266:
+	.loc 1 434 0
 	bic	w3, w22, w3
 	mov	w2, w23
-.LVL293:
-.L112:
-	.loc 1 752 0
+.LVL267:
+.L106:
+	.loc 1 437 0
 	mov	x1, x27
 	mov	x0, x25
-.LVL294:
+.LVL268:
 	add	x19, x19, 1
-.LVL295:
+.LVL269:
 	bl	rk3568_secure_otp_write_2_bytes_noecc
-.LVL296:
+.LVL270:
 	mov	w26, w0
-.LVL297:
-.LBE261:
-.LBE347:
-	.loc 1 946 0
-	cbz	w0, .L90
-.LVL298:
-.L81:
-	.loc 1 958 0
+.LVL271:
+.LBE243:
+.LBE329:
+	.loc 1 631 0
+	cbz	w0, .L84
+.LVL272:
+.L75:
+	.loc 1 643 0
 	mov	w0, w26
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-.LVL299:
+.LVL273:
 	ldp	x27, x28, [sp, 80]
-.LVL300:
+.LVL274:
 	ldp	x29, x30, [sp], 144
 	.cfi_remember_state
 	.cfi_restore 30
@@ -2758,95 +2529,95 @@ rk3568_secure_otp_write:
 	.cfi_restore 19
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
-.LVL301:
+.LVL275:
 	ret
-.LVL302:
-.L88:
+.LVL276:
+.L82:
 	.cfi_restore_state
-.LBB348:
-.LBB262:
-	.loc 1 751 0
+.LBB330:
+.LBB244:
+	.loc 1 436 0
 	lsl	w22, w22, 8
-.LVL303:
-	.loc 1 752 0
+.LVL277:
+	.loc 1 437 0
 	mov	w2, w21
 	bic	w3, w22, w3
-	b	.L112
-.LVL304:
-.L85:
-.LBE262:
-.LBE348:
+	b	.L106
+.LVL278:
+.L79:
+.LBE244:
+.LBE330:
 	mov	x19, 0
-.LVL305:
-.L90:
-	.loc 1 944 0 discriminator 1
+.LVL279:
+.L84:
+	.loc 1 629 0 discriminator 1
 	cmp	w20, w19
-	bgt	.L91
-.LVL306:
-.L107:
-.LBB349:
-.LBB342:
-	.loc 1 773 0
+	bgt	.L85
+.LVL280:
+.L101:
+.LBB331:
+.LBB324:
+	.loc 1 458 0
 	mov	w26, 0
-	b	.L81
-.LVL307:
-.L94:
-	.loc 1 777 0
-	cbnz	w24, .L95
-.LVL308:
-.L105:
-	add	x23, x23, 1
-.LVL309:
-	b	.L86
-.LVL310:
-.L95:
-	.loc 1 780 0
+	b	.L75
+.LVL281:
+.L88:
+	.loc 1 462 0
+	cbnz	w24, .L89
+.LVL282:
+.L99:
+	add	x23, x23, 1
+.LVL283:
+	b	.L80
+.LVL284:
+.L89:
+	.loc 1 465 0
 	ldp	x0, x2, [x27, 8]
 	mov	w3, w21
 	ldr	x1, [x27, 24]
 	ldr	x5, [x28, 16]
 	blr	x5
-.LVL311:
-.LBB265:
-	.loc 1 783 0
+.LVL285:
+.LBB247:
+	.loc 1 468 0
 #APP
-// 783 "drivers/misc/rockchip-secure-otp.c" 1
+// 468 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	mov	w1, 65536
 	str	w1, [x0, 256]
-.LVL312:
-.LBE265:
-.LBB266:
-	.loc 1 784 0
+.LVL286:
+.LBE247:
+.LBB248:
+	.loc 1 469 0
 #APP
-// 784 "drivers/misc/rockchip-secure-otp.c" 1
+// 469 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	mov	w1, 262148
 	str	w1, [x0, 32]
-.LVL313:
-.LBE266:
-.LBB267:
-	.loc 1 785 0
+.LVL287:
+.LBE248:
+.LBB249:
+	.loc 1 470 0
 #APP
-// 785 "drivers/misc/rockchip-secure-otp.c" 1
+// 470 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	mov	w1, -65536
 	str	w1, [x0, 40]
-.LVL314:
-.LBE267:
-.LBB268:
-	.loc 1 786 0
+.LVL288:
+.LBE249:
+.LBB250:
+	.loc 1 471 0
 #APP
-// 786 "drivers/misc/rockchip-secure-otp.c" 1
+// 471 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
@@ -2854,11570 +2625,4215 @@ rk3568_secure_otp_write:
 	mov	w1, 512
 	movk	w1, 0xff00, lsl 16
 	str	w1, [x0, 32]
-.LVL315:
-.LBE268:
-.LBB269:
-	.loc 1 787 0
+.LVL289:
+.LBE250:
+.LBB251:
+	.loc 1 472 0
 #APP
-// 787 "drivers/misc/rockchip-secure-otp.c" 1
+// 472 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	mov	w1, -65522
 	str	w1, [x0, 36]
-.LVL316:
-.LBE269:
-.LBB270:
-	.loc 1 788 0
+.LVL290:
+.LBE251:
+.LBB252:
+	.loc 1 473 0
 #APP
-// 788 "drivers/misc/rockchip-secure-otp.c" 1
+// 473 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	mov	w3, 240
 	str	w3, [x29, 104]
-.LVL317:
+.LVL291:
 	str	w3, [x0, 4096]
-.LBE270:
-.LBB271:
-	.loc 1 789 0
+.LBE252:
+.LBB253:
+	.loc 1 474 0
 #APP
-// 789 "drivers/misc/rockchip-secure-otp.c" 1
+// 474 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	mov	w1, 1
 	str	w1, [x0, 4100]
-.LVL318:
-.LBE271:
-.LBB272:
-	.loc 1 790 0
+.LVL292:
+.LBE253:
+.LBB254:
+	.loc 1 475 0
 #APP
-// 790 "drivers/misc/rockchip-secure-otp.c" 1
+// 475 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	mov	w2, 122
 	str	w2, [x29, 108]
-.LVL319:
+.LVL293:
 	str	w2, [x0, 4104]
-.LBE272:
-.LBB273:
-	.loc 1 791 0
+.LBE254:
+.LBB255:
+	.loc 1 476 0
 #APP
-// 791 "drivers/misc/rockchip-secure-otp.c" 1
+// 476 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	mov	w1, 37
 	str	w1, [x0, 4108]
-.LVL320:
-.LBE273:
-.LBB274:
-	.loc 1 792 0
+.LVL294:
+.LBE255:
+.LBB256:
+	.loc 1 477 0
 #APP
-// 792 "drivers/misc/rockchip-secure-otp.c" 1
+// 477 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	str	wzr, [x0, 4112]
-.LVL321:
-.LBE274:
-.LBB275:
-	.loc 1 793 0
+.LVL295:
+.LBE256:
+.LBB257:
+	.loc 1 478 0
 #APP
-// 793 "drivers/misc/rockchip-secure-otp.c" 1
+// 478 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	str	wzr, [x0, 4116]
-.LVL322:
-.LBE275:
-.LBB276:
-	.loc 1 794 0
+.LVL296:
+.LBE257:
+.LBB258:
+	.loc 1 479 0
 #APP
-// 794 "drivers/misc/rockchip-secure-otp.c" 1
+// 479 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	str	wzr, [x0, 4120]
-.LVL323:
-.LBE276:
-.LBB277:
-	.loc 1 795 0
+.LVL297:
+.LBE258:
+.LBB259:
+	.loc 1 480 0
 #APP
-// 795 "drivers/misc/rockchip-secure-otp.c" 1
+// 480 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	mov	w1, 31
 	str	w1, [x0, 4124]
-.LVL324:
-.LBE277:
-.LBB278:
-	.loc 1 796 0
+.LVL298:
+.LBE259:
+.LBB260:
+	.loc 1 481 0
 #APP
-// 796 "drivers/misc/rockchip-secure-otp.c" 1
+// 481 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	mov	w1, 11
 	str	w1, [x0, 4128]
-.LVL325:
-.LBE278:
-.LBB279:
-	.loc 1 797 0
+.LVL299:
+.LBE260:
+.LBB261:
+	.loc 1 482 0
 #APP
-// 797 "drivers/misc/rockchip-secure-otp.c" 1
+// 482 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	mov	w1, 8
 	str	w1, [x0, 4132]
-.LVL326:
-.LBE279:
-.LBB280:
-	.loc 1 798 0
+.LVL300:
+.LBE261:
+.LBB262:
+	.loc 1 483 0
 #APP
-// 798 "drivers/misc/rockchip-secure-otp.c" 1
+// 483 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	str	wzr, [x0, 4136]
-.LVL327:
-.LBE280:
-.LBB281:
-	.loc 1 799 0
+.LVL301:
+.LBE262:
+.LBB263:
+	.loc 1 484 0
 #APP
-// 799 "drivers/misc/rockchip-secure-otp.c" 1
+// 484 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	str	wzr, [x0, 4140]
-.LVL328:
-.LBE281:
-.LBB282:
-	.loc 1 800 0
+.LVL302:
+.LBE263:
+.LBB264:
+	.loc 1 485 0
 #APP
-// 800 "drivers/misc/rockchip-secure-otp.c" 1
+// 485 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	str	wzr, [x0, 4144]
-.LBE282:
-.LBB283:
-	.loc 1 801 0
+.LBE264:
+.LBB265:
+	.loc 1 486 0
 	and	w0, w21, 255
 #APP
-// 801 "drivers/misc/rockchip-secure-otp.c" 1
+// 486 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x1, [x27]
-.LBE283:
-.LBB284:
-	.loc 1 802 0
+.LBE265:
+.LBB266:
+	.loc 1 487 0
 	ubfx	x20, x20, 9, 8
-.LVL329:
-.LBE284:
-.LBB285:
-	.loc 1 801 0
+.LVL303:
+.LBE266:
+.LBB267:
+	.loc 1 486 0
 	str	w0, [x1, 4148]
-.LBE285:
-.LBB286:
-	.loc 1 802 0
+.LBE267:
+.LBB268:
+	.loc 1 487 0
 #APP
-// 802 "drivers/misc/rockchip-secure-otp.c" 1
+// 487 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	str	w20, [x0, 4152]
-.LVL330:
-.LBE286:
-.LBB287:
-	.loc 1 803 0
+.LVL304:
+.LBE268:
+.LBB269:
+	.loc 1 488 0
 #APP
-// 803 "drivers/misc/rockchip-secure-otp.c" 1
+// 488 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	mov	w22, 65537
-.LBE287:
-	.loc 1 804 0
+.LBE269:
+	.loc 1 489 0
 	mov	w1, 2
-.LBB288:
-	.loc 1 803 0
+.LBB270:
+	.loc 1 488 0
 	str	w22, [x0, 32]
-.LBE288:
-	.loc 1 804 0
+.LBE270:
+	.loc 1 489 0
 	mov	x0, x27
 	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL331:
+.LVL305:
 	mov	w26, w0
-.LVL332:
-	.loc 1 805 0
+.LVL306:
+	.loc 1 490 0
 	ldp	w3, w2, [x29, 104]
-	tbz	w0, #31, .L96
-	.loc 1 806 0
+	tbz	w0, #31, .L90
+	.loc 1 491 0
 	adrp	x0, .LC5
-.LVL333:
+.LVL307:
 	mov	x1, x19
 	add	x0, x0, :lo12:.LC5
-.LVL334:
-.L113:
-	.loc 1 895 0
+.LVL308:
+.L107:
+	.loc 1 580 0
 	bl	printf
-.LVL335:
-.L97:
-.LBB289:
-	.loc 1 900 0
+.LVL309:
+.L91:
+.LBB271:
+	.loc 1 585 0
 #APP
-// 900 "drivers/misc/rockchip-secure-otp.c" 1
+// 585 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	mov	w1, -65533
-.LBE289:
-	.loc 1 901 0
+.LBE271:
+	.loc 1 586 0
 	ldr	x2, [x27, 16]
 	mov	w3, w21
 	ldr	x6, [x28, 24]
-.LBB290:
-	.loc 1 900 0
+.LBB272:
+	.loc 1 585 0
 	str	w1, [x0, 772]
-.LBE290:
-	.loc 1 901 0
+.LBE272:
+	.loc 1 586 0
 	ldr	x0, [x27, 8]
 	ldr	x1, [x27, 24]
 	blr	x6
-.LVL336:
-.LBE342:
-.LBE349:
-	.loc 1 952 0
-	cbz	w26, .L105
-	b	.L81
-.LVL337:
-.L96:
-.LBB350:
-.LBB343:
-.LBB291:
-	.loc 1 810 0
+.LVL310:
+.LBE324:
+.LBE331:
+	.loc 1 637 0
+	cbz	w26, .L99
+	b	.L75
+.LVL311:
+.L90:
+.LBB332:
+.LBB325:
+.LBB273:
+	.loc 1 495 0
 #APP
-// 810 "drivers/misc/rockchip-secure-otp.c" 1
+// 495 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-.LVL338:
+.LVL312:
 	mov	w1, 14848
 	movk	w1, 0xff00, lsl 16
 	str	w1, [x0, 32]
-.LVL339:
-.LBE291:
-.LBB292:
-	.loc 1 811 0
+.LVL313:
+.LBE273:
+.LBB274:
+	.loc 1 496 0
 #APP
-// 811 "drivers/misc/rockchip-secure-otp.c" 1
+// 496 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	str	w3, [x0, 4096]
-.LVL340:
-.LBE292:
-.LBB293:
-	.loc 1 812 0
+.LVL314:
+.LBE274:
+.LBB275:
+	.loc 1 497 0
 #APP
-// 812 "drivers/misc/rockchip-secure-otp.c" 1
+// 497 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	mov	w1, 1
 	str	w1, [x0, 4100]
-.LVL341:
-.LBE293:
-.LBB294:
-	.loc 1 813 0
+.LVL315:
+.LBE275:
+.LBB276:
+	.loc 1 498 0
 #APP
-// 813 "drivers/misc/rockchip-secure-otp.c" 1
+// 498 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	str	w2, [x0, 4104]
-.LVL342:
-.LBE294:
-.LBB295:
-	.loc 1 814 0
+.LVL316:
+.LBE276:
+.LBB277:
+	.loc 1 499 0
 #APP
-// 814 "drivers/misc/rockchip-secure-otp.c" 1
+// 499 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	mov	w1, 21
 	str	w1, [x0, 4108]
-.LVL343:
-.LBE295:
-.LBB296:
-	.loc 1 815 0
+.LVL317:
+.LBE277:
+.LBB278:
+	.loc 1 500 0
 #APP
-// 815 "drivers/misc/rockchip-secure-otp.c" 1
+// 500 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	mov	w1, 220
 	str	w1, [x0, 4112]
-.LVL344:
-.LBE296:
-.LBB297:
-	.loc 1 816 0
+.LVL318:
+.LBE278:
+.LBB279:
+	.loc 1 501 0
 #APP
-// 816 "drivers/misc/rockchip-secure-otp.c" 1
+// 501 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	mov	w1, 146
 	str	w1, [x0, 4116]
-.LVL345:
-.LBE297:
-.LBB298:
-	.loc 1 817 0
+.LVL319:
+.LBE279:
+.LBB280:
+	.loc 1 502 0
 #APP
-// 817 "drivers/misc/rockchip-secure-otp.c" 1
+// 502 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	mov	w1, 121
 	str	w1, [x0, 4120]
-.LVL346:
-.LBE298:
-.LBB299:
-	.loc 1 818 0
+.LVL320:
+.LBE280:
+.LBB281:
+	.loc 1 503 0
 #APP
-// 818 "drivers/misc/rockchip-secure-otp.c" 1
+// 503 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	mov	w1, 129
 	str	w1, [x0, 4124]
-.LVL347:
-.LBE299:
-.LBB300:
-	.loc 1 819 0
+.LVL321:
+.LBE281:
+.LBB282:
+	.loc 1 504 0
 #APP
-// 819 "drivers/misc/rockchip-secure-otp.c" 1
+// 504 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	mov	w1, 126
 	str	w1, [x0, 4128]
-.LVL348:
-.LBE300:
-.LBB301:
-	.loc 1 820 0
+.LVL322:
+.LBE282:
+.LBB283:
+	.loc 1 505 0
 #APP
-// 820 "drivers/misc/rockchip-secure-otp.c" 1
+// 505 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	mov	w1, 33
 	str	w1, [x0, 4132]
-.LVL349:
-.LBE301:
-.LBB302:
-	.loc 1 821 0
+.LVL323:
+.LBE283:
+.LBB284:
+	.loc 1 506 0
 #APP
-// 821 "drivers/misc/rockchip-secure-otp.c" 1
+// 506 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	mov	w1, 17
 	str	w1, [x0, 4136]
-.LVL350:
-.LBE302:
-.LBB303:
-	.loc 1 822 0
-#APP
-// 822 "drivers/misc/rockchip-secure-otp.c" 1
+.LVL324:
+.LBE284:
+.LBB285:
+	.loc 1 507 0
+#APP
+// 507 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	mov	w1, 157
 	str	w1, [x0, 4140]
-.LVL351:
-.LBE303:
-.LBB304:
-	.loc 1 823 0
+.LVL325:
+.LBE285:
+.LBB286:
+	.loc 1 508 0
 #APP
-// 823 "drivers/misc/rockchip-secure-otp.c" 1
+// 508 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	mov	w20, 2
-.LVL352:
+.LVL326:
 	str	w20, [x0, 4144]
-.LVL353:
-.LBE304:
-.LBB305:
-	.loc 1 824 0
+.LVL327:
+.LBE286:
+.LBB287:
+	.loc 1 509 0
 #APP
-// 824 "drivers/misc/rockchip-secure-otp.c" 1
+// 509 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	str	wzr, [x0, 4148]
-.LVL354:
-.LBE305:
-.LBB306:
-	.loc 1 825 0
+.LVL328:
+.LBE287:
+.LBB288:
+	.loc 1 510 0
 #APP
-// 825 "drivers/misc/rockchip-secure-otp.c" 1
+// 510 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	str	wzr, [x0, 4152]
-.LVL355:
-.LBE306:
-.LBB307:
-	.loc 1 826 0
+.LVL329:
+.LBE288:
+.LBB289:
+	.loc 1 511 0
 #APP
-// 826 "drivers/misc/rockchip-secure-otp.c" 1
+// 511 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-.LBE307:
-	.loc 1 827 0
+.LBE289:
+	.loc 1 512 0
 	mov	w1, w20
-.LBB308:
-	.loc 1 826 0
+.LBB290:
+	.loc 1 511 0
 	str	w22, [x0, 32]
-.LBE308:
-	.loc 1 827 0
+.LBE290:
+	.loc 1 512 0
 	mov	x0, x27
 	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL356:
+.LVL330:
 	mov	w26, w0
-.LVL357:
-	.loc 1 828 0
-	tbz	w0, #31, .L98
-	.loc 1 829 0
+.LVL331:
+	.loc 1 513 0
+	tbz	w0, #31, .L92
+	.loc 1 514 0
 	adrp	x0, .LC11
-.LVL358:
+.LVL332:
 	mov	x1, x19
 	add	x0, x0, :lo12:.LC11
-	b	.L113
-.LVL359:
-.L98:
-.LBB309:
-	.loc 1 833 0
+	b	.L107
+.LVL333:
+.L92:
+.LBB291:
+	.loc 1 518 0
 #APP
-// 833 "drivers/misc/rockchip-secure-otp.c" 1
+// 518 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-.LVL360:
+.LVL334:
 	mov	w1, 512
 	movk	w1, 0xff00, lsl 16
 	str	w1, [x0, 32]
-.LVL361:
-.LBE309:
-.LBB310:
-	.loc 1 834 0
+.LVL335:
+.LBE291:
+.LBB292:
+	.loc 1 519 0
 #APP
-// 834 "drivers/misc/rockchip-secure-otp.c" 1
+// 519 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	mov	w1, -65535
 	str	w1, [x0, 36]
-.LVL362:
-.LBE310:
-.LBB311:
-	.loc 1 835 0
+.LVL336:
+.LBE292:
+.LBB293:
+	.loc 1 520 0
 #APP
-// 835 "drivers/misc/rockchip-secure-otp.c" 1
+// 520 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	mov	w1, 251
 	str	w1, [x0, 4096]
-.LVL363:
-.LBE311:
-.LBB312:
-	.loc 1 836 0
+.LVL337:
+.LBE293:
+.LBB294:
+	.loc 1 521 0
 #APP
-// 836 "drivers/misc/rockchip-secure-otp.c" 1
+// 521 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	str	wzr, [x0, 4100]
-.LVL364:
-.LBE312:
-.LBB313:
-	.loc 1 837 0
+.LVL338:
+.LBE294:
+.LBB295:
+	.loc 1 522 0
 #APP
-// 837 "drivers/misc/rockchip-secure-otp.c" 1
+// 522 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-.LBE313:
-	.loc 1 838 0
+.LBE295:
+	.loc 1 523 0
 	mov	w1, w20
-.LBB314:
-	.loc 1 837 0
+.LBB296:
+	.loc 1 522 0
 	str	w22, [x0, 32]
-.LBE314:
-	.loc 1 838 0
+.LBE296:
+	.loc 1 523 0
 	mov	x0, x27
 	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL365:
+.LVL339:
 	mov	w26, w0
-.LVL366:
-	.loc 1 839 0
-	tbz	w0, #31, .L99
-	.loc 1 840 0
+.LVL340:
+	.loc 1 524 0
+	tbz	w0, #31, .L93
+	.loc 1 525 0
 	adrp	x0, .LC12
-.LVL367:
+.LVL341:
 	mov	x1, x19
 	add	x0, x0, :lo12:.LC12
-	b	.L113
-.LVL368:
-.L99:
-.LBB315:
-	.loc 1 844 0
+	b	.L107
+.LVL342:
+.L93:
+.LBB297:
+	.loc 1 529 0
 #APP
-// 844 "drivers/misc/rockchip-secure-otp.c" 1
+// 529 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-.LVL369:
+.LVL343:
 	mov	w1, -65534
 	str	w1, [x0, 36]
-.LVL370:
-.LBE315:
-.LBB316:
-	.loc 1 845 0
+.LVL344:
+.LBE297:
+.LBB298:
+	.loc 1 530 0
 #APP
-// 845 "drivers/misc/rockchip-secure-otp.c" 1
+// 530 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	mov	w1, 192
 	str	w1, [x0, 4096]
-.LBE316:
-.LBB317:
-	.loc 1 846 0
+.LBE298:
+.LBB299:
+	.loc 1 531 0
 	and	w1, w24, 255
-.LVL371:
+.LVL345:
 #APP
-// 846 "drivers/misc/rockchip-secure-otp.c" 1
+// 531 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-.LBE317:
-.LBB318:
-	.loc 1 847 0
+.LBE299:
+.LBB300:
+	.loc 1 532 0
 	lsr	w24, w24, 8
-.LVL372:
-.LBE318:
-.LBB319:
-	.loc 1 846 0
+.LVL346:
+.LBE300:
+.LBB301:
+	.loc 1 531 0
 	str	w1, [x0, 4100]
-.LBE319:
-.LBB320:
-	.loc 1 847 0
+.LBE301:
+.LBB302:
+	.loc 1 532 0
 #APP
-// 847 "drivers/misc/rockchip-secure-otp.c" 1
+// 532 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	str	w24, [x0, 4104]
-.LVL373:
-.LBE320:
-.LBB321:
-	.loc 1 848 0
+.LVL347:
+.LBE302:
+.LBB303:
+	.loc 1 533 0
 #APP
-// 848 "drivers/misc/rockchip-secure-otp.c" 1
+// 533 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-.LBE321:
-	.loc 1 849 0
+.LBE303:
+	.loc 1 534 0
 	mov	w1, w20
-.LVL374:
-.LBB322:
-	.loc 1 848 0
+.LVL348:
+.LBB304:
+	.loc 1 533 0
 	str	w22, [x0, 32]
-.LBE322:
-	.loc 1 849 0
+.LBE304:
+	.loc 1 534 0
 	mov	x0, x27
 	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL375:
+.LVL349:
 	mov	w26, w0
-.LVL376:
-	.loc 1 850 0
-	tbz	w0, #31, .L100
-	.loc 1 851 0
+.LVL350:
+	.loc 1 535 0
+	tbz	w0, #31, .L94
+	.loc 1 536 0
 	adrp	x0, .LC13
-.LVL377:
+.LVL351:
 	mov	x1, x19
 	add	x0, x0, :lo12:.LC13
-	b	.L113
-.LVL378:
-.L100:
-.LBB323:
-	.loc 1 855 0
+	b	.L107
+.LVL352:
+.L94:
+.LBB305:
+	.loc 1 540 0
 #APP
-// 855 "drivers/misc/rockchip-secure-otp.c" 1
+// 540 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-.LVL379:
+.LVL353:
 	mov	w1, 14848
 	movk	w1, 0xff00, lsl 16
 	str	w1, [x0, 32]
-.LVL380:
-.LBE323:
-.LBB324:
-	.loc 1 856 0
+.LVL354:
+.LBE305:
+.LBB306:
+	.loc 1 541 0
 #APP
-// 856 "drivers/misc/rockchip-secure-otp.c" 1
+// 541 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	mov	w1, -65535
 	str	w1, [x0, 36]
-.LVL381:
-.LBE324:
-.LBB325:
-	.loc 1 857 0
+.LVL355:
+.LBE306:
+.LBB307:
+	.loc 1 542 0
 #APP
-// 857 "drivers/misc/rockchip-secure-otp.c" 1
+// 542 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	mov	w1, 255
 	str	w1, [x0, 4096]
-.LVL382:
-.LBE325:
-.LBB326:
-	.loc 1 858 0
+.LVL356:
+.LBE307:
+.LBB308:
+	.loc 1 543 0
 #APP
-// 858 "drivers/misc/rockchip-secure-otp.c" 1
+// 543 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	mov	w1, 10
 	str	w1, [x0, 4100]
-.LVL383:
-.LBE326:
-.LBB327:
-	.loc 1 859 0
+.LVL357:
+.LBE308:
+.LBB309:
+	.loc 1 544 0
 #APP
-// 859 "drivers/misc/rockchip-secure-otp.c" 1
+// 544 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-.LBE327:
-	.loc 1 860 0
+.LBE309:
+	.loc 1 545 0
 	mov	w1, w20
-.LBB328:
-	.loc 1 859 0
+.LBB310:
+	.loc 1 544 0
 	str	w22, [x0, 32]
-.LBE328:
-	.loc 1 860 0
+.LBE310:
+	.loc 1 545 0
 	mov	x0, x27
 	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL384:
+.LVL358:
 	mov	w26, w0
-.LVL385:
-	.loc 1 861 0
-	tbz	w0, #31, .L101
-	.loc 1 862 0
+.LVL359:
+	.loc 1 546 0
+	tbz	w0, #31, .L95
+	.loc 1 547 0
 	adrp	x0, .LC14
-.LVL386:
+.LVL360:
 	mov	x1, x19
 	add	x0, x0, :lo12:.LC14
-	b	.L113
-.LVL387:
-.L101:
-.LBB329:
-	.loc 1 866 0
+	b	.L107
+.LVL361:
+.L95:
+.LBB311:
+	.loc 1 551 0
 #APP
-// 866 "drivers/misc/rockchip-secure-otp.c" 1
+// 551 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-.LVL388:
+.LVL362:
 	mov	w1, -65534
 	str	w1, [x0, 36]
-.LVL389:
-.LBE329:
-.LBB330:
-	.loc 1 867 0
+.LVL363:
+.LBE311:
+.LBB312:
+	.loc 1 552 0
 #APP
-// 867 "drivers/misc/rockchip-secure-otp.c" 1
+// 552 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	mov	w1, 1
 	str	w1, [x0, 4096]
-.LVL390:
-.LBE330:
-.LBB331:
-	.loc 1 868 0
+.LVL364:
+.LBE312:
+.LBB313:
+	.loc 1 553 0
 #APP
-// 868 "drivers/misc/rockchip-secure-otp.c" 1
+// 553 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	mov	w24, 191
-.LVL391:
+.LVL365:
 	str	w24, [x0, 4100]
-.LVL392:
-.LBE331:
-.LBB332:
-	.loc 1 869 0
+.LVL366:
+.LBE313:
+.LBB314:
+	.loc 1 554 0
 #APP
-// 869 "drivers/misc/rockchip-secure-otp.c" 1
+// 554 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	str	wzr, [x0, 4104]
-.LVL393:
-.LBE332:
-.LBB333:
-	.loc 1 870 0
+.LVL367:
+.LBE314:
+.LBB315:
+	.loc 1 555 0
 #APP
-// 870 "drivers/misc/rockchip-secure-otp.c" 1
+// 555 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-.LBE333:
-	.loc 1 871 0
+.LBE315:
+	.loc 1 556 0
 	mov	w1, w20
-.LBB334:
-	.loc 1 870 0
+.LBB316:
+	.loc 1 555 0
 	str	w22, [x0, 32]
-.LBE334:
-	.loc 1 871 0
+.LBE316:
+	.loc 1 556 0
 	mov	x0, x27
 	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL394:
+.LVL368:
 	mov	w26, w0
-.LVL395:
-	.loc 1 872 0
-	tbz	w0, #31, .L102
-	.loc 1 873 0
+.LVL369:
+	.loc 1 557 0
+	tbz	w0, #31, .L96
+	.loc 1 558 0
 	adrp	x0, .LC15
-.LVL396:
+.LVL370:
 	mov	x1, x19
 	add	x0, x0, :lo12:.LC15
-	b	.L113
-.LVL397:
-.L102:
-	.loc 1 877 0
+	b	.L107
+.LVL371:
+.L96:
+	.loc 1 562 0
 	mov	x0, x27
-.LVL398:
+.LVL372:
 	bl	rockchip_secure_otp_check_flag.isra.0
-.LVL399:
+.LVL373:
 	mov	w26, w0
-.LVL400:
-	.loc 1 878 0
-	tbz	w0, #31, .L103
-	.loc 1 879 0
+.LVL374:
+	.loc 1 563 0
+	tbz	w0, #31, .L97
+	.loc 1 564 0
 	adrp	x0, .LC6
-.LVL401:
+.LVL375:
 	mov	x1, x19
 	add	x0, x0, :lo12:.LC6
-	b	.L113
-.LVL402:
-.L103:
-.LBB335:
-	.loc 1 883 0
-#APP
-// 883 "drivers/misc/rockchip-secure-otp.c" 1
+	b	.L107
+.LVL376:
+.L97:
+.LBB317:
+	.loc 1 568 0
+#APP
+// 568 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-.LVL403:
+.LVL377:
 	mov	w1, -65535
 	str	w1, [x0, 36]
-.LVL404:
-.LBE335:
-.LBB336:
-	.loc 1 884 0
+.LVL378:
+.LBE317:
+.LBB318:
+	.loc 1 569 0
 #APP
-// 884 "drivers/misc/rockchip-secure-otp.c" 1
+// 569 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	str	w20, [x0, 4096]
-.LVL405:
-.LBE336:
-.LBB337:
-	.loc 1 885 0
+.LVL379:
+.LBE318:
+.LBB319:
+	.loc 1 570 0
 #APP
-// 885 "drivers/misc/rockchip-secure-otp.c" 1
+// 570 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
 	str	w24, [x0, 4100]
-.LVL406:
-.LBE337:
-.LBB338:
-	.loc 1 886 0
+.LVL380:
+.LBE319:
+.LBB320:
+	.loc 1 571 0
 #APP
-// 886 "drivers/misc/rockchip-secure-otp.c" 1
+// 571 "drivers/misc/rk3568-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-.LBE338:
-	.loc 1 887 0
+.LBE320:
+	.loc 1 572 0
 	mov	w1, w20
-.LBB339:
-	.loc 1 886 0
+.LBB321:
+	.loc 1 571 0
 	str	w22, [x0, 32]
-.LBE339:
-	.loc 1 887 0
+.LBE321:
+	.loc 1 572 0
 	mov	x0, x27
 	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL407:
+.LVL381:
 	mov	w26, w0
-.LVL408:
-	.loc 1 888 0
-	tbz	w0, #31, .L104
-	.loc 1 889 0
+.LVL382:
+	.loc 1 573 0
+	tbz	w0, #31, .L98
+	.loc 1 574 0
 	adrp	x0, .LC16
-.LVL409:
+.LVL383:
 	mov	x1, x19
 	add	x0, x0, :lo12:.LC16
-	b	.L113
-.LVL410:
-.L104:
-	.loc 1 893 0
+	b	.L107
+.LVL384:
+.L98:
+	.loc 1 578 0
 	mov	x0, x27
-.LVL411:
+.LVL385:
 	bl	rockchip_secure_otp_wait_flag.isra.1
-.LVL412:
+.LVL386:
 	mov	w26, w0
-.LVL413:
-	.loc 1 894 0
-	tbz	w0, #31, .L97
-	.loc 1 895 0
+.LVL387:
+	.loc 1 579 0
+	tbz	w0, #31, .L91
+	.loc 1 580 0
 	adrp	x0, .LC7
-.LVL414:
+.LVL388:
 	mov	x1, x19
 	add	x0, x0, :lo12:.LC7
-	b	.L113
-.LBE343:
-.LBE350:
+	b	.L107
+.LBE325:
+.LBE332:
 	.cfi_endproc
-.LFE283:
+.LFE272:
 	.size	rk3568_secure_otp_write, .-rk3568_secure_otp_write
-	.section	.text.rockchip_secure_otp_read,"ax",@progbits
-	.align	2
-	.type	rockchip_secure_otp_read, %function
-rockchip_secure_otp_read:
-.LFB276:
-	.loc 1 222 0
-	.cfi_startproc
-.LVL415:
-	stp	x29, x30, [sp, -80]!
-	.cfi_def_cfa_offset 80
-	.cfi_offset 29, -80
-	.cfi_offset 30, -72
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -64
-	.cfi_offset 20, -56
-	mov	w20, w1
-	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -32
-	.cfi_offset 24, -24
-	mov	w24, w3
-	stp	x21, x22, [sp, 32]
-	mov	x23, x0
-	.cfi_offset 21, -48
-	.cfi_offset 22, -40
-	mov	x22, x2
-	str	x25, [sp, 64]
-	.cfi_offset 25, -16
-	.loc 1 223 0
-	bl	dev_get_platdata
-.LVL416:
-	mov	x19, x0
-.LVL417:
-	.loc 1 224 0
-	mov	x0, x23
-.LVL418:
-	bl	dev_get_driver_data
-.LVL419:
-	.loc 1 230 0
-	ldr	x4, [x0, 16]
-	.loc 1 224 0
-	mov	x25, x0
-.LVL420:
-	.loc 1 230 0
-	ldr	x1, [x19, 24]
-	mov	w3, w20
-	ldp	x0, x2, [x19, 8]
-.LVL421:
-	blr	x4
-.LVL422:
-	.loc 1 233 0
-	mov	w1, 1
-	mov	x0, x19
-	bl	rockchip_secure_otp_ecc_enable
-.LVL423:
-.LBB351:
-	.loc 1 234 0
-#APP
-// 234 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x19]
-	mov	w23, 65537
-.LVL424:
-	add	w24, w24, w20
-.LVL425:
-.LBE351:
-	.loc 1 227 0
-	mov	w21, 0
-.LBB352:
-	.loc 1 234 0
-	str	w23, [x0, 256]
-.LBE352:
-	.loc 1 235 0
-	mov	x0, 50
-	bl	udelay
-.LVL426:
-.L115:
-	.loc 1 236 0
-	cmp	w20, w24
-	beq	.L119
-	.loc 1 238 0
-	cmp	w20, 448
-	bgt	.L121
-	.loc 1 241 0
-	sub	w1, w20, #16
-	cmp	w20, 0
-	mov	w0, w20
-	ccmp	w1, 31, 0, ne
-	bls	.L117
-	.loc 1 241 0 is_stmt 0 discriminator 1
-	sub	w1, w20, #128
-	cmp	w1, 263
-	bls	.L117
-	.loc 1 244 0 is_stmt 1
-	adrp	x0, .LC17
-	add	x0, x0, :lo12:.LC17
-	bl	printf
-.LVL427:
-.L121:
-	.loc 1 239 0
-	mov	w21, -1
-.LVL428:
-	b	.L114
-.LVL429:
-.L117:
-.LBB353:
-	.loc 1 248 0
-	add	w20, w20, 1
-.LVL430:
-	orr	w0, w0, -65536
-.LVL431:
-#APP
-// 248 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x1, [x19]
-	str	w0, [x1, 260]
-.LVL432:
-.LBE353:
-.LBB354:
-	.loc 1 250 0
-#APP
-// 250 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x19]
-.LVL433:
-.LBE354:
-	.loc 1 252 0
-	mov	w1, 4
-.LVL434:
-.LBB355:
-	.loc 1 250 0
-	str	w23, [x0, 264]
-.LVL435:
-.LBE355:
-	.loc 1 252 0
-	mov	x0, x19
-	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL436:
-	mov	w21, w0
-.LVL437:
-	.loc 1 253 0
-	tbz	w0, #31, .L118
-	.loc 1 254 0
-	adrp	x1, .LANCHOR5
-	adrp	x0, .LC9
-.LVL438:
-	add	x1, x1, :lo12:.LANCHOR5
-	add	x0, x0, :lo12:.LC9
-	bl	printf
-.LVL439:
-.L119:
-.LBB356:
-	.loc 1 271 0
-#APP
-// 271 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x19]
-	mov	w1, 65536
-.LBE356:
-	.loc 1 273 0
-	ldr	x2, [x19, 16]
-	mov	w3, w20
-	ldr	x4, [x25, 24]
-.LBB357:
-	.loc 1 271 0
-	str	w1, [x0, 256]
-.LBE357:
-	.loc 1 273 0
-	ldr	x0, [x19, 8]
-	ldr	x1, [x19, 24]
-	blr	x4
-.LVL440:
-.L114:
-	.loc 1 278 0
-	mov	w0, w21
-	ldr	x25, [sp, 64]
-.LVL441:
-	ldp	x19, x20, [sp, 16]
-.LVL442:
-	ldp	x21, x22, [sp, 32]
-.LVL443:
-	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 80
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 25
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
-	ret
-.LVL444:
-.L118:
-	.cfi_restore_state
-.LBB358:
-	.loc 1 258 0
-	ldr	x0, [x19]
-.LVL445:
-	ldrb	w0, [x0, 292]
-	and	w0, w0, 255
-.LVL446:
-#APP
-// 258 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-.LVL447:
-#NO_APP
-.LBE358:
-	.loc 1 267 0
-	strb	w0, [x22], 1
-.LVL448:
-	b	.L115
-	.cfi_endproc
-.LFE276:
-	.size	rockchip_secure_otp_read, .-rockchip_secure_otp_read
-	.section	.text.rockchip_secure_otp_write,"ax",@progbits
+	.global	_u_boot_list_2_driver_2_rockchip_secure_otp
+	.section	.rodata.__func__.7397,"a",@progbits
+	.align	3
+	.set	.LANCHOR0,. + 0
+	.type	__func__.7397, %object
+	.size	__func__.7397, 32
+__func__.7397:
+	.string	"rockchip_secure_otp_wait_status"
+	.section	.rodata.__func__.7440,"a",@progbits
+	.align	3
+	.set	.LANCHOR2,. + 0
+	.type	__func__.7440, %object
+	.size	__func__.7440, 31
+__func__.7440:
+	.string	"rockchip_secure_otp_ecc_enable"
+	.section	.rodata.__func__.7458,"a",@progbits
+	.align	3
+	.set	.LANCHOR3,. + 0
+	.type	__func__.7458, %object
+	.size	__func__.7458, 23
+__func__.7458:
+	.string	"rk3568_secure_otp_read"
+	.section	.rodata.__func__.7493,"a",@progbits
+	.align	3
+	.set	.LANCHOR1,. + 0
+	.type	__func__.7493, %object
+	.size	__func__.7493, 38
+__func__.7493:
+	.string	"rk3568_secure_otp_write_2_bytes_noecc"
+	.section	.rodata.__func__.7714,"a",@progbits
+	.align	3
+	.set	.LANCHOR4,. + 0
+	.type	__func__.7714, %object
+	.size	__func__.7714, 32
+__func__.7714:
+	.string	"rk3568_secure_otp_write_2_bytes"
+	.section	.rodata.rk3568_data,"a",@progbits
+	.align	3
+	.type	rk3568_data, %object
+	.size	rk3568_data, 32
+rk3568_data:
+	.xword	rk3568_secure_otp_read
+	.xword	rk3568_secure_otp_write
+	.xword	rk3568_spl_rockchip_otp_start
+	.xword	rk3568_spl_rockchip_otp_stop
+	.section	.rodata.rk3568_secure_otp_read.str1.1,"aMS",@progbits,1
+.LC9:
+	.string	"%s timeout during read setup\n"
+	.section	.rodata.rk3568_secure_otp_write.str1.1,"aMS",@progbits,1
+.LC10:
+	.string	"Please enter the size of multiple of 2\n"
+.LC11:
+	.string	"%s timeout during write setup 2\n"
+.LC12:
+	.string	"%s timeout during write setup 3\n"
+.LC13:
+	.string	"%s timeout during write setup 4\n"
+.LC14:
+	.string	"%s timeout during write setup 5\n"
+.LC15:
+	.string	"%s timeout during write setup 6\n"
+.LC16:
+	.string	"%s timeout during write setup 8\n"
+	.section	.rodata.rk3568_secure_otp_write_2_bytes_noecc.str1.1,"aMS",@progbits,1
+.LC4:
+	.string	"Please input correct addr, offset is %x\n"
+.LC5:
+	.string	"%s timeout during write setup 1\n"
+.LC6:
+	.string	"%s timeout during write setup 7\n"
+.LC7:
+	.string	"%s timeout during write setup 9\n"
+	.section	.rodata.rockchip_otp_ids,"a",@progbits
+	.align	3
+	.type	rockchip_otp_ids, %object
+	.size	rockchip_otp_ids, 32
+rockchip_otp_ids:
+	.xword	.LC18
+	.xword	rk3568_data
+	.zero	16
+	.section	.rodata.rockchip_secure_otp_ecc_enable.str1.1,"aMS",@progbits,1
+.LC8:
+	.string	"%s timeout during ecc_enable\n"
+	.section	.rodata.rockchip_secure_otp_ofdata_to_platdata.str1.1,"aMS",@progbits,1
+.LC0:
+	.string	"secure_conf"
+.LC1:
+	.string	"mask_addr"
+.LC2:
+	.string	"cru_rst_addr"
+	.section	.rodata.rockchip_secure_otp_ops,"a",@progbits
+	.align	3
+	.type	rockchip_secure_otp_ops, %object
+	.size	rockchip_secure_otp_ops, 32
+rockchip_secure_otp_ops:
+	.xword	secure_otp_read
+	.xword	secure_otp_write
+	.xword	secure_otp_ioctl
+	.zero	8
+	.section	.rodata.rockchip_secure_otp_wait_status.isra.2.str1.1,"aMS",@progbits,1
+.LC3:
+	.string	"%s: wait init status timeout\n"
+	.section	.rodata.str1.1,"aMS",@progbits,1
+.LC17:
+	.string	"rockchip_secure_otp"
+.LC18:
+	.string	"rockchip,rk3568-secure-otp"
+	.section	.u_boot_list_2_driver_2_rockchip_secure_otp,"aw",@progbits
 	.align	2
-	.type	rockchip_secure_otp_write, %function
-rockchip_secure_otp_write:
-.LFB278:
-	.loc 1 428 0
-	.cfi_startproc
-.LVL449:
-	stp	x29, x30, [sp, -128]!
-	.cfi_def_cfa_offset 128
-	.cfi_offset 29, -128
-	.cfi_offset 30, -120
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -112
-	.cfi_offset 20, -104
-	mov	w19, w1
-	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -80
-	.cfi_offset 24, -72
-	mov	w24, w3
-	stp	x27, x28, [sp, 80]
-	stp	x21, x22, [sp, 32]
-	stp	x25, x26, [sp, 64]
-	.cfi_offset 27, -48
-	.cfi_offset 28, -40
-	.cfi_offset 21, -96
-	.cfi_offset 22, -88
-	.cfi_offset 25, -64
-	.cfi_offset 26, -56
-	.loc 1 428 0
-	stp	x2, x0, [x29, 104]
-	.loc 1 429 0
-	bl	dev_get_platdata
-.LVL450:
-	mov	x27, x0
-.LVL451:
-	.loc 1 431 0
-	sxtw	x0, w24
-.LVL452:
-	bl	malloc_simple
-.LVL453:
-	.loc 1 434 0
-	cbnz	x0, .L124
-.LVL454:
-.L148:
-.LBB420:
-.LBB421:
-	.loc 1 295 0
-	mov	w26, -1
-.L123:
-.LBE421:
-.LBE420:
-	.loc 1 461 0
-	mov	w0, w26
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-.LVL455:
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-.LVL456:
-	ldp	x29, x30, [sp], 128
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
-.LVL457:
-	ret
-.LVL458:
-.L124:
-	.cfi_restore_state
-	mov	x20, x0
-	.loc 1 437 0
-	mov	x2, x0
-	ldr	x0, [x29, 112]
-.LVL459:
-	mov	w3, w24
-	mov	w1, w19
-	bl	rockchip_secure_otp_read
-.LVL460:
-	.loc 1 438 0
-	cbnz	w0, .L148
-	mov	x0, 0
-.LVL461:
-.L128:
-	.loc 1 443 0 discriminator 1
-	cmp	w24, w0
-	bgt	.L129
-.LBB493:
-.LBB489:
-	.loc 1 413 0
-	adrp	x20, .LANCHOR6
-.LVL462:
-	add	x20, x20, :lo12:.LANCHOR6
-.LBE489:
-.LBE493:
-	.loc 1 443 0
-	mov	x23, 0
-.LVL463:
-.L130:
-	.loc 1 453 0 discriminator 1
-	cmp	w24, w23
-	bgt	.L143
-	mov	w26, 0
-	b	.L123
-.LVL464:
-.L129:
-	add	x0, x0, 1
-.LVL465:
-	.loc 1 444 0
-	add	x1, x20, x0
-	ldrb	w1, [x1, -1]
-	cbz	w1, .L128
-	.loc 1 445 0
-	adrp	x0, .LC18
-	add	x0, x0, :lo12:.LC18
-.LVL466:
-.L149:
-.LBB494:
-.LBB490:
-	.loc 1 295 0
-	bl	printf
-.LVL467:
-	b	.L148
-.LVL468:
-.L143:
-.LBE490:
-.LBE494:
-	.loc 1 454 0
-	ldr	x0, [x29, 104]
-	ldrb	w28, [x0, x23]
-.LVL469:
-.LBB495:
-.LBB491:
-	.loc 1 285 0
-	ldr	x0, [x29, 112]
-	bl	dev_get_driver_data
-.LVL470:
-	str	x0, [x29, 120]
-.LVL471:
-	.loc 1 288 0
-	cmp	w19, 448
-	bgt	.L148
-	.loc 1 292 0
-	sub	w0, w19, #16
-.LVL472:
-	cmp	w19, 0
-	ccmp	w0, 31, 0, ne
-	bls	.L131
-	sub	w0, w19, #128
-	cmp	w0, 263
-	bls	.L131
-	.loc 1 295 0
-	adrp	x0, .LC17
-	add	x0, x0, :lo12:.LC17
-	b	.L149
-.L131:
-	.loc 1 299 0
-	cbnz	w28, .L132
-.LVL473:
-.L142:
-	add	x23, x23, 1
-	add	w19, w19, 1
-	b	.L130
-.LVL474:
-.L132:
-	.loc 1 302 0
-	ldr	x0, [x29, 120]
-	mov	w3, w19
-	ldp	x2, x1, [x27, 16]
-	ldr	x5, [x0, 16]
-	ldr	x0, [x27, 8]
-	blr	x5
-.LVL475:
-.LBB422:
-	.loc 1 305 0
-#APP
-// 305 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	mov	w1, 262148
-	str	w1, [x0, 32]
-.LVL476:
-.LBE422:
-.LBB423:
-	.loc 1 306 0
-#APP
-// 306 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	mov	w1, -65536
-	str	w1, [x0, 40]
-.LVL477:
-.LBE423:
-.LBB424:
-	.loc 1 307 0
-#APP
-// 307 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	mov	w1, 512
-	movk	w1, 0xff00, lsl 16
-	str	w1, [x0, 32]
-.LVL478:
-.LBE424:
-.LBB425:
-	.loc 1 308 0
-#APP
-// 308 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	mov	w1, -65522
-	str	w1, [x0, 36]
-.LVL479:
-.LBE425:
-.LBB426:
-	.loc 1 309 0
-#APP
-// 309 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	mov	w2, 240
-	str	w2, [x29, 100]
-.LVL480:
-	str	w2, [x0, 4096]
-.LBE426:
-.LBB427:
-	.loc 1 310 0
-#APP
-// 310 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	mov	w25, 1
-	str	w25, [x0, 4100]
-.LVL481:
-.LBE427:
-.LBB428:
-	.loc 1 311 0
-#APP
-// 311 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	mov	w21, 122
-	str	w21, [x0, 4104]
-.LVL482:
-.LBE428:
-.LBB429:
-	.loc 1 312 0
-#APP
-// 312 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	mov	w1, 37
-	str	w1, [x0, 4108]
-.LVL483:
-.LBE429:
-.LBB430:
-	.loc 1 313 0
-#APP
-// 313 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	mov	w1, 4
-	str	w1, [x0, 4112]
-.LVL484:
-.LBE430:
-.LBB431:
-	.loc 1 314 0
-#APP
-// 314 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	str	wzr, [x0, 4116]
-.LVL485:
-.LBE431:
-.LBB432:
-	.loc 1 315 0
-#APP
-// 315 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	str	wzr, [x0, 4120]
-.LVL486:
-.LBE432:
-.LBB433:
-	.loc 1 316 0
-#APP
-// 316 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	str	wzr, [x0, 4124]
-.LVL487:
-.LBE433:
-.LBB434:
-	.loc 1 317 0
-#APP
-// 317 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	mov	w1, 11
-	str	w1, [x0, 4128]
-.LVL488:
-.LBE434:
-.LBB435:
-	.loc 1 318 0
-#APP
-// 318 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	mov	w1, 8
-	str	w1, [x0, 4132]
-.LVL489:
-.LBE435:
-.LBB436:
-	.loc 1 319 0
-#APP
-// 319 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	str	wzr, [x0, 4136]
-.LVL490:
-.LBE436:
-.LBB437:
-	.loc 1 320 0
-#APP
-// 320 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	str	wzr, [x0, 4140]
-.LVL491:
-.LBE437:
-.LBB438:
-	.loc 1 321 0
-#APP
-// 321 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	str	wzr, [x0, 4144]
-.LBE438:
-.LBB439:
-	.loc 1 322 0
-	and	w0, w19, 255
-#APP
-// 322 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x1, [x27]
-	str	w0, [x1, 4148]
-.LBE439:
-.LBB440:
-	.loc 1 323 0
-	ubfx	x1, x19, 8, 8
-.LVL492:
-#APP
-// 323 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	str	w1, [x0, 4152]
-.LVL493:
-.LBE440:
-.LBB441:
-	.loc 1 324 0
-#APP
-// 324 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	mov	w22, 65537
-.LBE441:
-	.loc 1 325 0
-	mov	w1, 2
-.LVL494:
-.LBB442:
-	.loc 1 324 0
-	str	w22, [x0, 32]
-.LVL495:
-.LBE442:
-	.loc 1 325 0
-	mov	x0, x27
-	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL496:
-	mov	w26, w0
-.LVL497:
-	.loc 1 326 0
-	ldr	w2, [x29, 100]
-	tbz	w0, #31, .L133
-	.loc 1 327 0
-	adrp	x0, .LC5
-.LVL498:
-	mov	x1, x20
-	add	x0, x0, :lo12:.LC5
-.LVL499:
-.L147:
-	.loc 1 413 0
-	bl	printf
-.LVL500:
-.L134:
-.LBB443:
-	.loc 1 418 0
-#APP
-// 418 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	mov	w1, -65533
-.LBE443:
-	.loc 1 419 0
-	ldr	x2, [x27, 16]
-	mov	w3, w19
-.LBB444:
-	.loc 1 418 0
-	str	w1, [x0, 772]
-.LBE444:
-	.loc 1 419 0
-	ldr	x0, [x29, 120]
-	ldr	x1, [x27, 24]
-	ldr	x6, [x0, 24]
-	ldr	x0, [x27, 8]
-	blr	x6
-.LVL501:
-.LBE491:
-.LBE495:
-	.loc 1 455 0
-	cbz	w26, .L142
-	b	.L123
-.LVL502:
-.L133:
-.LBB496:
-.LBB492:
-.LBB445:
-	.loc 1 331 0
-#APP
-// 331 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-.LVL503:
-	mov	w1, 14848
-	movk	w1, 0xff00, lsl 16
-	str	w1, [x0, 32]
-.LVL504:
-.LBE445:
-.LBB446:
-	.loc 1 332 0
-#APP
-// 332 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	str	w2, [x0, 4096]
-.LVL505:
-.LBE446:
-.LBB447:
-	.loc 1 333 0
-#APP
-// 333 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	str	w25, [x0, 4100]
-.LVL506:
-.LBE447:
-.LBB448:
-	.loc 1 334 0
-#APP
-// 334 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	str	w21, [x0, 4104]
-.LVL507:
-.LBE448:
-.LBB449:
-	.loc 1 335 0
-#APP
-// 335 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	mov	w1, 21
-	str	w1, [x0, 4108]
-.LVL508:
-.LBE449:
-.LBB450:
-	.loc 1 336 0
-#APP
-// 336 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	mov	w1, 220
-	str	w1, [x0, 4112]
-.LVL509:
-.LBE450:
-.LBB451:
-	.loc 1 337 0
-#APP
-// 337 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	mov	w1, 146
-	str	w1, [x0, 4116]
-.LVL510:
-.LBE451:
-.LBB452:
-	.loc 1 338 0
-#APP
-// 338 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	mov	w1, 121
-	str	w1, [x0, 4120]
-.LVL511:
-.LBE452:
-.LBB453:
-	.loc 1 339 0
-#APP
-// 339 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	mov	w1, 129
-	str	w1, [x0, 4124]
-.LVL512:
-.LBE453:
-.LBB454:
-	.loc 1 340 0
-#APP
-// 340 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	mov	w1, 126
-	str	w1, [x0, 4128]
-.LVL513:
-.LBE454:
-.LBB455:
-	.loc 1 341 0
-#APP
-// 341 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	mov	w1, 33
-	str	w1, [x0, 4132]
-.LVL514:
-.LBE455:
-.LBB456:
-	.loc 1 342 0
-#APP
-// 342 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	mov	w1, 17
-	str	w1, [x0, 4136]
-.LVL515:
-.LBE456:
-.LBB457:
-	.loc 1 343 0
-#APP
-// 343 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	mov	w1, 157
-	str	w1, [x0, 4140]
-.LVL516:
-.LBE457:
-.LBB458:
-	.loc 1 344 0
-#APP
-// 344 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	mov	w21, 2
-	str	w21, [x0, 4144]
-.LVL517:
-.LBE458:
-.LBB459:
-	.loc 1 345 0
-#APP
-// 345 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	str	wzr, [x0, 4148]
-.LVL518:
-.LBE459:
-.LBB460:
-	.loc 1 346 0
-#APP
-// 346 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	str	wzr, [x0, 4152]
-.LVL519:
-.LBE460:
-.LBB461:
-	.loc 1 347 0
-#APP
-// 347 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-.LBE461:
-	.loc 1 348 0
-	mov	w1, w21
-.LBB462:
-	.loc 1 347 0
-	str	w22, [x0, 32]
-.LBE462:
-	.loc 1 348 0
-	mov	x0, x27
-	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL520:
-	mov	w26, w0
-.LVL521:
-	.loc 1 349 0
-	tbz	w0, #31, .L135
-	.loc 1 350 0
-	adrp	x0, .LC11
-.LVL522:
-	mov	x1, x20
-	add	x0, x0, :lo12:.LC11
-	b	.L147
-.LVL523:
-.L135:
-.LBB463:
-	.loc 1 354 0
-#APP
-// 354 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-.LVL524:
-	mov	w1, 512
-	movk	w1, 0xff00, lsl 16
-	str	w1, [x0, 32]
-.LVL525:
-.LBE463:
-.LBB464:
-	.loc 1 355 0
-#APP
-// 355 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	mov	w1, -65535
-	str	w1, [x0, 36]
-.LVL526:
-.LBE464:
-.LBB465:
-	.loc 1 356 0
-#APP
-// 356 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	mov	w1, 251
-	str	w1, [x0, 4096]
-.LVL527:
-.LBE465:
-.LBB466:
-	.loc 1 357 0
-#APP
-// 357 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	str	wzr, [x0, 4100]
-.LVL528:
-.LBE466:
-.LBB467:
-	.loc 1 358 0
-#APP
-// 358 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-.LBE467:
-	.loc 1 359 0
-	mov	w1, w21
-.LBB468:
-	.loc 1 358 0
-	str	w22, [x0, 32]
-.LBE468:
-	.loc 1 359 0
-	mov	x0, x27
-	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL529:
-	mov	w26, w0
-.LVL530:
-	.loc 1 360 0
-	tbz	w0, #31, .L136
-	.loc 1 361 0
-	adrp	x0, .LC12
-.LVL531:
-	mov	x1, x20
-	add	x0, x0, :lo12:.LC12
-	b	.L147
-.LVL532:
-.L136:
-.LBB469:
-	.loc 1 365 0
-#APP
-// 365 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-.LVL533:
-	mov	w1, 192
-	str	w1, [x0, 4096]
-.LVL534:
-.LBE469:
-.LBB470:
-	.loc 1 366 0
-#APP
-// 366 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	str	w28, [x0, 4100]
-.LVL535:
-.LBE470:
-.LBB471:
-	.loc 1 367 0
-#APP
-// 367 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-.LBE471:
-	.loc 1 368 0
-	mov	w1, w21
-.LBB472:
-	.loc 1 367 0
-	str	w22, [x0, 32]
-.LBE472:
-	.loc 1 368 0
-	mov	x0, x27
-	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL536:
-	mov	w26, w0
-.LVL537:
-	.loc 1 369 0
-	tbz	w0, #31, .L137
-	.loc 1 370 0
-	adrp	x0, .LC13
-.LVL538:
-	mov	x1, x20
-	add	x0, x0, :lo12:.LC13
-	b	.L147
-.LVL539:
-.L137:
-.LBB473:
-	.loc 1 374 0
-#APP
-// 374 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-.LVL540:
-	mov	w1, 14848
-	movk	w1, 0xff00, lsl 16
-	str	w1, [x0, 32]
-.LVL541:
-.LBE473:
-.LBB474:
-	.loc 1 375 0
-#APP
-// 375 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	mov	w1, 255
-	str	w1, [x0, 4096]
-.LVL542:
-.LBE474:
-.LBB475:
-	.loc 1 376 0
-#APP
-// 376 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	mov	w1, 10
-	str	w1, [x0, 4100]
-.LVL543:
-.LBE475:
-.LBB476:
-	.loc 1 377 0
-#APP
-// 377 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-.LBE476:
-	.loc 1 378 0
-	mov	w1, w21
-.LBB477:
-	.loc 1 377 0
-	str	w22, [x0, 32]
-.LBE477:
-	.loc 1 378 0
-	mov	x0, x27
-	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL544:
-	mov	w26, w0
-.LVL545:
-	.loc 1 379 0
-	tbz	w0, #31, .L138
-	.loc 1 380 0
-	adrp	x0, .LC14
-.LVL546:
-	mov	x1, x20
-	add	x0, x0, :lo12:.LC14
-	b	.L147
-.LVL547:
-.L138:
-.LBB478:
-	.loc 1 384 0
-#APP
-// 384 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-.LVL548:
-	mov	w28, -65534
-.LVL549:
-	str	w28, [x0, 36]
-.LVL550:
-.LBE478:
-.LBB479:
-	.loc 1 385 0
-#APP
-// 385 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	str	w25, [x0, 4096]
-.LVL551:
-.LBE479:
-.LBB480:
-	.loc 1 386 0
-#APP
-// 386 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	mov	w25, 191
-	str	w25, [x0, 4100]
-.LVL552:
-.LBE480:
-.LBB481:
-	.loc 1 387 0
-#APP
-// 387 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	str	wzr, [x0, 4104]
-.LVL553:
-.LBE481:
-.LBB482:
-	.loc 1 388 0
-#APP
-// 388 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-.LBE482:
-	.loc 1 389 0
-	mov	w1, w21
-.LBB483:
-	.loc 1 388 0
-	str	w22, [x0, 32]
-.LBE483:
-	.loc 1 389 0
-	mov	x0, x27
-	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL554:
-	mov	w26, w0
-.LVL555:
-	.loc 1 390 0
-	tbz	w0, #31, .L139
-	.loc 1 391 0
-	adrp	x0, .LC15
-.LVL556:
-	mov	x1, x20
-	add	x0, x0, :lo12:.LC15
-	b	.L147
-.LVL557:
-.L139:
-	.loc 1 395 0
-	mov	x0, x27
-.LVL558:
-	bl	rockchip_secure_otp_check_flag.isra.0
-.LVL559:
-	mov	w26, w0
-.LVL560:
-	.loc 1 396 0
-	tbz	w0, #31, .L140
-	.loc 1 397 0
-	adrp	x0, .LC6
-.LVL561:
-	mov	x1, x20
-	add	x0, x0, :lo12:.LC6
-	b	.L147
-.LVL562:
-.L140:
-.LBB484:
-	.loc 1 401 0
-#APP
-// 401 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-.LVL563:
-	str	w28, [x0, 36]
-.LVL564:
-.LBE484:
-.LBB485:
-	.loc 1 402 0
-#APP
-// 402 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	str	w21, [x0, 4096]
-.LVL565:
-.LBE485:
-.LBB486:
-	.loc 1 403 0
-#APP
-// 403 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	str	w25, [x0, 4100]
-.LVL566:
-.LBE486:
-.LBB487:
-	.loc 1 404 0
-#APP
-// 404 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-.LBE487:
-	.loc 1 405 0
-	mov	w1, w21
-.LBB488:
-	.loc 1 404 0
-	str	w22, [x0, 32]
-.LBE488:
-	.loc 1 405 0
-	mov	x0, x27
-	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL567:
-	mov	w26, w0
-.LVL568:
-	.loc 1 406 0
-	tbz	w0, #31, .L141
-	.loc 1 407 0
-	adrp	x0, .LC16
-.LVL569:
-	mov	x1, x20
-	add	x0, x0, :lo12:.LC16
-	b	.L147
-.LVL570:
-.L141:
-	.loc 1 411 0
-	mov	x0, x27
-.LVL571:
-	bl	rockchip_secure_otp_wait_flag.isra.1
-.LVL572:
-	mov	w26, w0
-.LVL573:
-	.loc 1 412 0
-	tbz	w0, #31, .L134
-	.loc 1 413 0
-	adrp	x0, .LC7
-.LVL574:
-	mov	x1, x20
-	add	x0, x0, :lo12:.LC7
-	b	.L147
-.LBE492:
-.LBE496:
-	.cfi_endproc
-.LFE278:
-	.size	rockchip_secure_otp_write, .-rockchip_secure_otp_write
-	.global	_u_boot_list_2_driver_2_rockchip_secure_otp
-	.section	.rodata.__func__.7513,"a",@progbits
-	.align	3
-	.set	.LANCHOR0,. + 0
-	.type	__func__.7513, %object
-	.size	__func__.7513, 32
-__func__.7513:
-	.string	"rockchip_secure_otp_wait_status"
-	.section	.rodata.__func__.7556,"a",@progbits
-	.align	3
-	.set	.LANCHOR2,. + 0
-	.type	__func__.7556, %object
-	.size	__func__.7556, 31
-__func__.7556:
-	.string	"rockchip_secure_otp_ecc_enable"
-	.section	.rodata.__func__.7574,"a",@progbits
-	.align	3
-	.set	.LANCHOR5,. + 0
-	.type	__func__.7574, %object
-	.size	__func__.7574, 25
-__func__.7574:
-	.string	"rockchip_secure_otp_read"
-	.section	.rodata.__func__.7631,"a",@progbits
-	.align	3
-	.set	.LANCHOR6,. + 0
-	.type	__func__.7631, %object
-	.size	__func__.7631, 31
-__func__.7631:
-	.string	"rockchip_secure_otp_write_byte"
-	.section	.rodata.__func__.7745,"a",@progbits
-	.align	3
-	.set	.LANCHOR3,. + 0
-	.type	__func__.7745, %object
-	.size	__func__.7745, 23
-__func__.7745:
-	.string	"rk3568_secure_otp_read"
-	.section	.rodata.__func__.7780,"a",@progbits
-	.align	3
-	.set	.LANCHOR1,. + 0
-	.type	__func__.7780, %object
-	.size	__func__.7780, 38
-__func__.7780:
-	.string	"rk3568_secure_otp_write_2_bytes_noecc"
-	.section	.rodata.__func__.8001,"a",@progbits
-	.align	3
-	.set	.LANCHOR4,. + 0
-	.type	__func__.8001, %object
-	.size	__func__.8001, 32
-__func__.8001:
-	.string	"rk3568_secure_otp_write_2_bytes"
-	.section	.rodata.px30_data,"a",@progbits
-	.align	3
-	.type	px30_data, %object
-	.size	px30_data, 32
-px30_data:
-	.xword	rockchip_secure_otp_read
-	.xword	rockchip_secure_otp_write
-	.xword	px30_spl_rockchip_otp_start
-	.xword	px30_spl_rockchip_otp_stop
-	.section	.rodata.rk3308_data,"a",@progbits
-	.align	3
-	.type	rk3308_data, %object
-	.size	rk3308_data, 32
-rk3308_data:
-	.xword	rockchip_secure_otp_read
-	.xword	rockchip_secure_otp_write
-	.xword	rk3308_spl_rockchip_otp_start
-	.xword	rk3308_spl_rockchip_otp_stop
-	.section	.rodata.rk3328_data,"a",@progbits
-	.align	3
-	.type	rk3328_data, %object
-	.size	rk3328_data, 32
-rk3328_data:
-	.xword	rockchip_secure_otp_read
-	.xword	rockchip_secure_otp_write
-	.xword	rk3328_spl_rockchip_otp_start
-	.xword	rk3328_spl_rockchip_otp_stop
-	.section	.rodata.rk3568_data,"a",@progbits
-	.align	3
-	.type	rk3568_data, %object
-	.size	rk3568_data, 32
-rk3568_data:
-	.xword	rk3568_secure_otp_read
-	.xword	rk3568_secure_otp_write
-	.xword	rk3568_spl_rockchip_otp_start
-	.xword	rk3568_spl_rockchip_otp_stop
-	.section	.rodata.rk3568_secure_otp_read.str1.1,"aMS",@progbits,1
-.LC9:
-	.string	"%s timeout during read setup\n"
-	.section	.rodata.rk3568_secure_otp_write.str1.1,"aMS",@progbits,1
-.LC10:
-	.string	"Please enter the size of multiple of 2\n"
-.LC11:
-	.string	"%s timeout during write setup 2\n"
-.LC12:
-	.string	"%s timeout during write setup 3\n"
-.LC13:
-	.string	"%s timeout during write setup 4\n"
-.LC14:
-	.string	"%s timeout during write setup 5\n"
-.LC15:
-	.string	"%s timeout during write setup 6\n"
-.LC16:
-	.string	"%s timeout during write setup 8\n"
-	.section	.rodata.rk3568_secure_otp_write_2_bytes_noecc.str1.1,"aMS",@progbits,1
-.LC4:
-	.string	"Please input correct addr, offset is %x\n"
-.LC5:
-	.string	"%s timeout during write setup 1\n"
-.LC6:
-	.string	"%s timeout during write setup 7\n"
-.LC7:
-	.string	"%s timeout during write setup 9\n"
-	.section	.rodata.rockchip_otp_ids,"a",@progbits
-	.align	3
-	.type	rockchip_otp_ids, %object
-	.size	rockchip_otp_ids, 96
-rockchip_otp_ids:
-	.xword	.LC20
-	.xword	rk3308_data
-	.xword	.LC21
-	.xword	rk3328_data
-	.xword	.LC22
-	.xword	px30_data
-	.xword	.LC23
-	.xword	px30_data
-	.xword	.LC24
-	.xword	rk3568_data
-	.zero	16
-	.section	.rodata.rockchip_secure_otp_ecc_enable.str1.1,"aMS",@progbits,1
-.LC8:
-	.string	"%s timeout during ecc_enable\n"
-	.section	.rodata.rockchip_secure_otp_ofdata_to_platdata.str1.1,"aMS",@progbits,1
-.LC0:
-	.string	"secure_conf"
-.LC1:
-	.string	"mask_addr"
-.LC2:
-	.string	"cru_rst_addr"
-	.section	.rodata.rockchip_secure_otp_ops,"a",@progbits
-	.align	3
-	.type	rockchip_secure_otp_ops, %object
-	.size	rockchip_secure_otp_ops, 32
-rockchip_secure_otp_ops:
-	.xword	secure_otp_read
-	.xword	secure_otp_write
-	.xword	secure_otp_ioctl
-	.zero	8
-	.section	.rodata.rockchip_secure_otp_read.str1.1,"aMS",@progbits,1
-.LC17:
-	.string	"Please input correct addr\n"
-	.section	.rodata.rockchip_secure_otp_wait_status.isra.2.str1.1,"aMS",@progbits,1
-.LC3:
-	.string	"%s: wait init status timeout\n"
-	.section	.rodata.rockchip_secure_otp_write.str1.1,"aMS",@progbits,1
-.LC18:
-	.string	"The zone is written.\n"
-	.section	.rodata.str1.1,"aMS",@progbits,1
-.LC19:
-	.string	"rockchip_secure_otp"
-.LC20:
-	.string	"rockchip,rk3308-secure-otp"
-.LC21:
-	.string	"rockchip,rk3328-secure-otp"
-.LC22:
-	.string	"rockchip,rk3326-secure-otp"
-.LC23:
-	.string	"rockchip,px30-secure-otp"
-.LC24:
-	.string	"rockchip,rk3568-secure-otp"
-	.section	.u_boot_list_2_driver_2_rockchip_secure_otp,"aw",@progbits
-	.align	2
-	.type	_u_boot_list_2_driver_2_rockchip_secure_otp, %object
-	.size	_u_boot_list_2_driver_2_rockchip_secure_otp, 120
-_u_boot_list_2_driver_2_rockchip_secure_otp:
-	.8byte	.LC19
-	.word	36
-	.zero	4
-	.8byte	rockchip_otp_ids
-	.zero	32
-	.8byte	rockchip_secure_otp_ofdata_to_platdata
-	.zero	28
-	.word	32
-	.zero	8
-	.8byte	rockchip_secure_otp_ops
-	.zero	8
-	.text
-.Letext0:
-	.file 2 "include/common.h"
-	.file 3 "./arch/arm/include/asm/types.h"
-	.file 4 "include/linux/types.h"
-	.file 5 "include/errno.h"
-	.file 6 "include/linux/string.h"
-	.file 7 "include/efi.h"
-	.file 8 "include/dm/device.h"
-	.file 9 "include/ide.h"
-	.file 10 "include/linux/list.h"
-	.file 11 "include/part.h"
-	.file 12 "include/flash.h"
-	.file 13 "include/lmb.h"
-	.file 14 "include/asm-generic/u-boot.h"
-	.file 15 "./arch/arm/include/asm/u-boot-arm.h"
-	.file 16 "include/linux/libfdt_env.h"
-	.file 17 "include/linux/../../scripts/dtc/libfdt/fdt.h"
-	.file 18 "include/linux/libfdt.h"
-	.file 19 "include/image.h"
-	.file 20 "include/u-boot/sha1.h"
-	.file 21 "include/u-boot/sha256.h"
-	.file 22 "./arch/arm/include/asm/global_data.h"
-	.file 23 "include/asm-generic/global_data.h"
-	.file 24 "include/dm/of.h"
-	.file 25 "include/net.h"
-	.file 26 "include/dm/uclass-id.h"
-	.file 27 "include/dm/ofnode.h"
-	.file 28 "include/malloc.h"
-	.file 29 "include/linux/compat.h"
-	.file 30 "include/dm/uclass.h"
-	.file 31 "include/asm-generic/ioctl.h"
-	.file 32 "include/misc.h"
-	.file 33 "include/rockchip-otp.h"
-	.file 34 "include/dm/read.h"
-	.file 35 "include/stdio.h"
-	.file 36 "include/linux/delay.h"
-	.file 37 "include/log.h"
-	.section	.debug_info,"",@progbits
-.Ldebug_info0:
-	.4byte	0x57da
-	.2byte	0x4
-	.4byte	.Ldebug_abbrev0
-	.byte	0x8
-	.uleb128 0x1
-	.4byte	.LASF477
-	.byte	0xc
-	.4byte	.LASF478
-	.4byte	.LASF479
-	.4byte	.Ldebug_ranges0+0x950
-	.8byte	0
-	.4byte	.Ldebug_line0
-	.uleb128 0x2
-	.4byte	.LASF4
-	.byte	0x2
-	.byte	0xd
-	.4byte	0x34
-	.uleb128 0x3
-	.byte	0x1
-	.byte	0x8
-	.4byte	.LASF0
-	.uleb128 0x3
-	.byte	0x8
-	.byte	0x7
-	.4byte	.LASF1
-	.uleb128 0x3
-	.byte	0x2
-	.byte	0x7
-	.4byte	.LASF2
-	.uleb128 0x4
-	.4byte	.LASF21
-	.byte	0x5
-	.byte	0xc
-	.4byte	0x54
-	.uleb128 0x5
-	.byte	0x4
-	.byte	0x5
-	.string	"int"
-	.uleb128 0x3
-	.byte	0x1
-	.byte	0x6
-	.4byte	.LASF3
-	.uleb128 0x2
-	.4byte	.LASF5
-	.byte	0x3
-	.byte	0xc
-	.4byte	0x34
-	.uleb128 0x3
-	.byte	0x2
-	.byte	0x5
-	.4byte	.LASF6
-	.uleb128 0x2
-	.4byte	.LASF7
-	.byte	0x3
-	.byte	0x12
-	.4byte	0x7f
-	.uleb128 0x3
-	.byte	0x4
-	.byte	0x7
-	.4byte	.LASF8
-	.uleb128 0x3
-	.byte	0x8
-	.byte	0x5
-	.4byte	.LASF9
-	.uleb128 0x3
-	.byte	0x8
-	.byte	0x7
-	.4byte	.LASF10
-	.uleb128 0x6
-	.string	"u8"
-	.byte	0x3
-	.byte	0x1f
-	.4byte	0x34
-	.uleb128 0x7
-	.4byte	0x94
-	.uleb128 0x6
-	.string	"u16"
-	.byte	0x3
-	.byte	0x22
-	.4byte	0x42
-	.uleb128 0x6
-	.string	"u32"
-	.byte	0x3
-	.byte	0x25
-	.4byte	0x7f
-	.uleb128 0x6
-	.string	"u64"
-	.byte	0x3
-	.byte	0x28
-	.4byte	0x8d
-	.uleb128 0x2
-	.4byte	.LASF11
-	.byte	0x3
-	.byte	0x31
-	.4byte	0x8d
-	.uleb128 0x2
-	.4byte	.LASF12
-	.byte	0x3
-	.byte	0x32
-	.4byte	0x8d
-	.uleb128 0x3
-	.byte	0x8
-	.byte	0x7
-	.4byte	.LASF13
-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0xee
-	.uleb128 0x3
-	.byte	0x1
-	.byte	0x8
-	.4byte	.LASF14
-	.uleb128 0x7
-	.4byte	0xe7
-	.uleb128 0x3
-	.byte	0x8
-	.byte	0x5
-	.4byte	.LASF15
-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0xe7
-	.uleb128 0x2
-	.4byte	.LASF16
-	.byte	0x4
-	.byte	0x59
-	.4byte	0x42
-	.uleb128 0x2
-	.4byte	.LASF17
-	.byte	0x4
-	.byte	0x5b
-	.4byte	0x3b
-	.uleb128 0x2
-	.4byte	.LASF18
-	.byte	0x4
-	.byte	0x69
-	.4byte	0x62
-	.uleb128 0x7
-	.4byte	0x116
-	.uleb128 0x2
-	.4byte	.LASF19
-	.byte	0x4
-	.byte	0x6b
-	.4byte	0x74
-	.uleb128 0x2
-	.4byte	.LASF20
-	.byte	0x4
-	.byte	0x97
-	.4byte	0x74
-	.uleb128 0x9
-	.byte	0x8
-	.uleb128 0x4
-	.4byte	.LASF22
-	.byte	0x6
-	.byte	0xb
-	.4byte	0xfa
-	.uleb128 0x3
-	.byte	0x1
-	.byte	0x2
-	.4byte	.LASF23
-	.uleb128 0xa
-	.4byte	0xe7
-	.4byte	0x15b
-	.uleb128 0xb
-	.byte	0
-	.uleb128 0xc
-	.4byte	.LASF24
-	.byte	0x7
-	.2byte	0x140
-	.4byte	0x150
-	.uleb128 0xc
-	.4byte	.LASF25
-	.byte	0x7
-	.2byte	0x143
-	.4byte	0x150
-	.uleb128 0xc
-	.4byte	.LASF26
-	.byte	0x7
-	.2byte	0x143
-	.4byte	0x150
-	.uleb128 0xd
-	.4byte	.LASF45
-	.byte	0xa0
-	.byte	0x8
-	.byte	0x80
-	.4byte	0x264
-	.uleb128 0xe
-	.4byte	.LASF27
-	.byte	0x8
-	.byte	0x81
-	.4byte	0x14e0
-	.byte	0
-	.uleb128 0xe
-	.4byte	.LASF28
-	.byte	0x8
-	.byte	0x82
-	.4byte	0xe1
-	.byte	0x8
-	.uleb128 0xe
-	.4byte	.LASF29
-	.byte	0x8
-	.byte	0x83
-	.4byte	0x13c
-	.byte	0x10
-	.uleb128 0xe
-	.4byte	.LASF30
-	.byte	0x8
-	.byte	0x84
-	.4byte	0x13c
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-	.uleb128 0x1
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-	.4byte	0x5522
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-	.byte	0x8c
-	.sleb128 0
-	.uleb128 0x35
+	.type	_u_boot_list_2_driver_2_rockchip_secure_otp, %object
+	.size	_u_boot_list_2_driver_2_rockchip_secure_otp, 120
+_u_boot_list_2_driver_2_rockchip_secure_otp:
+	.8byte	.LC17
+	.word	36
+	.zero	4
+	.8byte	rockchip_otp_ids
+	.zero	32
+	.8byte	rockchip_secure_otp_ofdata_to_platdata
+	.zero	28
+	.word	32
+	.zero	8
+	.8byte	rockchip_secure_otp_ops
+	.zero	8
+	.text
+.Letext0:
+	.file 2 "include/common.h"
+	.file 3 "./arch/arm/include/asm/types.h"
+	.file 4 "include/linux/types.h"
+	.file 5 "include/errno.h"
+	.file 6 "include/linux/string.h"
+	.file 7 "include/efi.h"
+	.file 8 "include/dm/device.h"
+	.file 9 "include/ide.h"
+	.file 10 "include/linux/list.h"
+	.file 11 "include/part.h"
+	.file 12 "include/flash.h"
+	.file 13 "include/lmb.h"
+	.file 14 "include/asm-generic/u-boot.h"
+	.file 15 "./arch/arm/include/asm/u-boot-arm.h"
+	.file 16 "include/linux/libfdt_env.h"
+	.file 17 "include/linux/../../scripts/dtc/libfdt/fdt.h"
+	.file 18 "include/linux/libfdt.h"
+	.file 19 "include/image.h"
+	.file 20 "./arch/arm/include/asm/global_data.h"
+	.file 21 "include/asm-generic/global_data.h"
+	.file 22 "include/dm/of.h"
+	.file 23 "include/net.h"
+	.file 24 "include/dm/uclass-id.h"
+	.file 25 "include/dm/ofnode.h"
+	.file 26 "include/malloc.h"
+	.file 27 "include/linux/compat.h"
+	.file 28 "include/dm/uclass.h"
+	.file 29 "include/asm-generic/ioctl.h"
+	.file 30 "include/misc.h"
+	.file 31 "include/rockchip-otp.h"
+	.file 32 "include/dm/read.h"
+	.file 33 "include/stdio.h"
+	.file 34 "include/linux/delay.h"
+	.file 35 "include/log.h"
+	.section	.debug_info,"",@progbits
+.Ldebug_info0:
+	.4byte	0x41f2
+	.2byte	0x4
+	.4byte	.Ldebug_abbrev0
+	.byte	0x8
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-	.byte	0x8a
-	.sleb128 0
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-	.4byte	0x4ed8
+	.4byte	.LASF454
+	.byte	0xc
+	.4byte	.LASF455
+	.4byte	.LASF456
+	.4byte	.Ldebug_ranges0+0x6e0
+	.8byte	0
+	.4byte	.Ldebug_line0
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-	.sleb128 0
-	.byte	0
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-	.4byte	0xa3
-	.4byte	.LLST76
-	.uleb128 0x33
-	.string	"ret"
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+	.byte	0xd
+	.4byte	0x34
+	.uleb128 0x3
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+	.4byte	.LASF0
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+	.byte	0x7
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+	.uleb128 0x3
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+	.byte	0x7
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-	.4byte	0x3d16
-	.uleb128 0x9
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-	.8byte	__func__.7745
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-	.4byte	0x3c0b
-	.uleb128 0x33
-	.string	"__v"
+	.uleb128 0x5
+	.byte	0x4
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+	.string	"int"
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-	.uleb128 0x1
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+	.4byte	0x94
+	.uleb128 0x6
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-	.uleb128 0x1
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+	.byte	0x22
+	.4byte	0x42
+	.uleb128 0x6
+	.string	"u32"
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-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
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+	.uleb128 0x6
+	.string	"u64"
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-	.4byte	0x40004
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-	.uleb128 0x68
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 	.byte	0x1
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-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5433
-	.uleb128 0x69
-	.4byte	.LASF459
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-	.8byte	.LBE24-.LBB24
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-	.uleb128 0x6b
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-	.uleb128 0x62
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-	.uleb128 0x3a
-	.4byte	0x4da3
-	.4byte	.LLST67
-	.uleb128 0x3a
-	.4byte	0x4dae
-	.4byte	.LLST68
-	.uleb128 0x6a
-	.8byte	.LBB180
-	.8byte	.LBE180-.LBB180
-	.uleb128 0x45
-	.4byte	0x563c
-	.uleb128 0x45
-	.4byte	0x5645
-	.uleb128 0x36
-	.8byte	.LVL236
-	.4byte	0x57bb
+	.4byte	0x1a11
+	.uleb128 0x32
+	.string	"dev"
+	.byte	0x1
+	.2byte	0x285
+	.4byte	0x25f
+	.4byte	.LLST9
+	.uleb128 0x3d
+	.4byte	.LASF420
+	.byte	0x1
+	.2byte	0x285
+	.4byte	0x54
+	.4byte	.LLST10
+	.uleb128 0x32
+	.string	"buf"
+	.byte	0x1
+	.2byte	0x286
+	.4byte	0x137
+	.4byte	.LLST11
+	.uleb128 0x3d
+	.4byte	.LASF51
+	.byte	0x1
+	.2byte	0x286
+	.4byte	0x54
+	.4byte	.LLST12
+	.uleb128 0x3e
+	.4byte	.LASF421
+	.byte	0x1
+	.2byte	0x288
+	.4byte	0x195a
+	.4byte	.LLST13
+	.uleb128 0x34
+	.8byte	.LVL14
+	.4byte	0x41c7
+	.4byte	0x19ea
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC8
-	.uleb128 0x35
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR2
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x46
-	.8byte	.LBB181
-	.8byte	.LBE181-.LBB181
-	.4byte	0x5769
-	.uleb128 0x49
-	.4byte	0x4e1a
-	.byte	0x9
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
 	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL232
-	.4byte	0x5522
+	.uleb128 0x3f
+	.8byte	.LVL18
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -14428,2756 +6844,5519 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x51
+	.uleb128 0x3
+	.byte	0xf3
 	.uleb128 0x1
-	.byte	0x32
-	.uleb128 0x4c
-	.4byte	0x4ed8
+	.byte	0x51
+	.uleb128 0x35
+	.uleb128 0x1
+	.byte	0x52
 	.uleb128 0x3
 	.byte	0xf3
 	.uleb128 0x1
-	.byte	0x50
-	.byte	0
+	.byte	0x52
+	.uleb128 0x35
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
 	.byte	0
-	.uleb128 0x70
-	.4byte	.LASF470
-	.4byte	.LASF470
-	.byte	0x8
-	.2byte	0x112
-	.uleb128 0x71
-	.4byte	.LASF471
-	.4byte	.LASF471
-	.byte	0x22
-	.byte	0x85
-	.uleb128 0x71
-	.4byte	.LASF472
-	.4byte	.LASF472
-	.byte	0x22
-	.byte	0x38
-	.uleb128 0x70
-	.4byte	.LASF473
-	.4byte	.LASF473
-	.byte	0x8
-	.2byte	0x16b
-	.uleb128 0x71
-	.4byte	.LASF474
-	.4byte	.LASF474
-	.byte	0x23
-	.byte	0x13
-	.uleb128 0x70
-	.4byte	.LASF475
-	.4byte	.LASF475
-	.byte	0x1c
-	.2byte	0x393
-	.uleb128 0x71
-	.4byte	.LASF476
-	.4byte	.LASF476
-	.byte	0x24
-	.byte	0xb
 	.byte	0
-	.section	.debug_abbrev,"",@progbits
-.Ldebug_abbrev0:
+	.uleb128 0x31
+	.4byte	.LASF423
+	.byte	0x1
+	.2byte	0x251
+	.4byte	0x54
+	.8byte	.LFB272
+	.8byte	.LFE272-.LFB272
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2478
+	.uleb128 0x32
+	.string	"dev"
+	.byte	0x1
+	.2byte	0x251
+	.4byte	0x25f
+	.4byte	.LLST69
+	.uleb128 0x3d
+	.4byte	.LASF420
+	.byte	0x1
+	.2byte	0x251
+	.4byte	0x54
+	.4byte	.LLST70
+	.uleb128 0x32
+	.string	"buf"
+	.byte	0x1
+	.2byte	0x252
+	.4byte	0x265
+	.4byte	.LLST71
+	.uleb128 0x3d
+	.4byte	.LASF51
+	.byte	0x1
+	.2byte	0x252
+	.4byte	0x54
+	.4byte	.LLST72
+	.uleb128 0x33
+	.string	"otp"
+	.byte	0x1
+	.2byte	0x254
+	.4byte	0x1804
+	.4byte	.LLST73
+	.uleb128 0x3e
+	.4byte	.LASF382
+	.byte	0x1
+	.2byte	0x255
+	.4byte	0x11b4
+	.4byte	.LLST74
+	.uleb128 0x3e
+	.4byte	.LASF424
+	.byte	0x1
+	.2byte	0x256
+	.4byte	0xfa
+	.4byte	.LLST74
+	.uleb128 0x3e
+	.4byte	.LASF425
+	.byte	0x1
+	.2byte	0x257
+	.4byte	0xfa
+	.4byte	.LLST76
+	.uleb128 0x33
+	.string	"i"
+	.byte	0x1
+	.2byte	0x258
+	.4byte	0x54
+	.4byte	.LLST77
+	.uleb128 0x33
+	.string	"ret"
+	.byte	0x1
+	.2byte	0x258
+	.4byte	0x54
+	.4byte	.LLST78
+	.uleb128 0x40
+	.4byte	0x2966
+	.8byte	.LBB240
+	.4byte	.Ldebug_ranges0+0x3f0
+	.byte	0x1
+	.2byte	0x276
+	.4byte	0x1b72
+	.uleb128 0x3a
+	.4byte	0x299b
+	.4byte	.LLST79
+	.uleb128 0x3a
+	.4byte	0x298f
+	.4byte	.LLST80
+	.uleb128 0x3a
+	.4byte	0x2983
+	.4byte	.LLST81
+	.uleb128 0x3a
+	.4byte	0x2977
+	.4byte	.LLST82
+	.uleb128 0x41
+	.4byte	.Ldebug_ranges0+0x3f0
+	.uleb128 0x42
+	.4byte	0x29a7
+	.4byte	.LLST83
+	.uleb128 0x43
+	.4byte	0x29b3
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -2
+	.uleb128 0x42
+	.4byte	0x29bf
+	.4byte	.LLST84
+	.uleb128 0x34
+	.8byte	.LVL265
+	.4byte	0x38d7
+	.4byte	0x1b56
+	.uleb128 0x35
 	.uleb128 0x1
-	.uleb128 0x11
-	.byte	0x1
-	.uleb128 0x25
-	.uleb128 0xe
-	.uleb128 0x13
-	.uleb128 0xb
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x1b
-	.uleb128 0xe
-	.uleb128 0x55
-	.uleb128 0x17
-	.uleb128 0x11
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.uleb128 0x35
 	.uleb128 0x1
-	.uleb128 0x10
-	.uleb128 0x17
-	.byte	0
-	.byte	0
+	.byte	0x51
 	.uleb128 0x2
-	.uleb128 0x16
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x24
-	.byte	0
-	.uleb128 0xb
-	.uleb128 0xb
-	.uleb128 0x3e
-	.uleb128 0xb
-	.uleb128 0x3
-	.uleb128 0xe
-	.byte	0
-	.byte	0
-	.uleb128 0x4
-	.uleb128 0x34
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x3f
-	.uleb128 0x19
-	.uleb128 0x3c
-	.uleb128 0x19
-	.byte	0
-	.byte	0
-	.uleb128 0x5
-	.uleb128 0x24
-	.byte	0
-	.uleb128 0xb
-	.uleb128 0xb
-	.uleb128 0x3e
-	.uleb128 0xb
-	.uleb128 0x3
-	.uleb128 0x8
-	.byte	0
-	.byte	0
-	.uleb128 0x6
-	.uleb128 0x16
-	.byte	0
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x35
+	.uleb128 0x1
+	.byte	0x52
 	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x7
-	.uleb128 0x26
-	.byte	0
-	.uleb128 0x49
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x8
-	.uleb128 0xf
-	.byte	0
-	.uleb128 0xb
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x9
-	.uleb128 0xf
-	.byte	0
-	.uleb128 0xb
-	.uleb128 0xb
-	.byte	0
-	.byte	0
-	.uleb128 0xa
+	.byte	0x8f
+	.sleb128 254
+	.uleb128 0x35
 	.uleb128 0x1
-	.byte	0x1
-	.uleb128 0x49
-	.uleb128 0x13
+	.byte	0x53
 	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0xb
-	.uleb128 0x21
-	.byte	0
-	.byte	0
+	.byte	0x32
 	.byte	0
-	.uleb128 0xc
-	.uleb128 0x34
+	.uleb128 0x36
+	.8byte	.LVL270
+	.4byte	0x29cc
+	.uleb128 0x35
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.uleb128 0x35
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
 	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0x5
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x3f
-	.uleb128 0x19
-	.uleb128 0x3c
-	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0xd
-	.uleb128 0x13
+	.uleb128 0x40
+	.4byte	0x2478
+	.8byte	.LBB245
+	.4byte	.Ldebug_ranges0+0x440
 	.byte	0x1
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0xb
-	.uleb128 0xb
+	.2byte	0x27c
+	.4byte	0x2426
 	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0xe
-	.uleb128 0xd
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
+	.4byte	0x24ad
+	.4byte	.LLST85
 	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x38
-	.uleb128 0xb
-	.byte	0
-	.byte	0
-	.uleb128 0xf
-	.uleb128 0xd
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
+	.4byte	0x24a1
+	.4byte	.LLST86
 	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x38
-	.uleb128 0xb
+	.4byte	0x2495
+	.4byte	.LLST87
+	.uleb128 0x3a
+	.4byte	0x2489
+	.4byte	.LLST88
+	.uleb128 0x41
+	.4byte	.Ldebug_ranges0+0x440
+	.uleb128 0x42
+	.4byte	0x24b9
+	.4byte	.LLST89
+	.uleb128 0x42
+	.4byte	0x24c5
+	.4byte	.LLST90
+	.uleb128 0x44
+	.4byte	0x24de
+	.8byte	.L91
+	.uleb128 0x45
+	.4byte	0x24d1
+	.uleb128 0x46
+	.8byte	.LBB247
+	.8byte	.LBE247-.LBB247
+	.4byte	0x1bf6
+	.uleb128 0x47
+	.4byte	0x24eb
+	.4byte	0x10000
 	.byte	0
+	.uleb128 0x46
+	.8byte	.LBB248
+	.8byte	.LBE248-.LBB248
+	.4byte	0x1c15
+	.uleb128 0x47
+	.4byte	0x24fd
+	.4byte	0x40004
 	.byte	0
-	.uleb128 0x10
-	.uleb128 0x26
+	.uleb128 0x46
+	.8byte	.LBB249
+	.8byte	.LBE249-.LBB249
+	.4byte	0x1c33
+	.uleb128 0x48
+	.4byte	0x250f
+	.sleb128 -65536
 	.byte	0
+	.uleb128 0x46
+	.8byte	.LBB250
+	.8byte	.LBE250-.LBB250
+	.4byte	0x1c52
+	.uleb128 0x48
+	.4byte	0x2521
+	.sleb128 -16776704
 	.byte	0
+	.uleb128 0x46
+	.8byte	.LBB251
+	.8byte	.LBE251-.LBB251
+	.4byte	0x1c70
+	.uleb128 0x48
+	.4byte	0x2533
+	.sleb128 -65522
 	.byte	0
-	.uleb128 0x11
-	.uleb128 0x21
+	.uleb128 0x46
+	.8byte	.LBB252
+	.8byte	.LBE252-.LBB252
+	.4byte	0x1c8c
+	.uleb128 0x49
+	.4byte	0x2545
+	.byte	0xf0
 	.byte	0
+	.uleb128 0x46
+	.8byte	.LBB253
+	.8byte	.LBE253-.LBB253
+	.4byte	0x1ca8
 	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x2f
-	.uleb128 0xb
+	.4byte	0x2557
+	.byte	0x1
 	.byte	0
+	.uleb128 0x46
+	.8byte	.LBB254
+	.8byte	.LBE254-.LBB254
+	.4byte	0x1cc4
+	.uleb128 0x49
+	.4byte	0x2569
+	.byte	0x7a
 	.byte	0
-	.uleb128 0x12
-	.uleb128 0x15
-	.byte	0x1
-	.uleb128 0x27
-	.uleb128 0x19
+	.uleb128 0x46
+	.8byte	.LBB255
+	.8byte	.LBE255-.LBB255
+	.4byte	0x1ce0
 	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x1
-	.uleb128 0x13
+	.4byte	0x257b
+	.byte	0x25
 	.byte	0
+	.uleb128 0x46
+	.8byte	.LBB256
+	.8byte	.LBE256-.LBB256
+	.4byte	0x1cfc
+	.uleb128 0x49
+	.4byte	0x258d
 	.byte	0
-	.uleb128 0x13
-	.uleb128 0x5
 	.byte	0
+	.uleb128 0x46
+	.8byte	.LBB257
+	.8byte	.LBE257-.LBB257
+	.4byte	0x1d18
 	.uleb128 0x49
-	.uleb128 0x13
+	.4byte	0x259f
 	.byte	0
 	.byte	0
-	.uleb128 0x14
-	.uleb128 0x13
-	.byte	0x1
-	.uleb128 0xb
-	.uleb128 0x5
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
+	.uleb128 0x46
+	.8byte	.LBB258
+	.8byte	.LBE258-.LBB258
+	.4byte	0x1d34
+	.uleb128 0x49
+	.4byte	0x25b1
 	.byte	0
-	.uleb128 0x15
-	.uleb128 0xd
 	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
+	.uleb128 0x46
+	.8byte	.LBB259
+	.8byte	.LBE259-.LBB259
+	.4byte	0x1d50
 	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x38
-	.uleb128 0x5
-	.byte	0
+	.4byte	0x25c3
+	.byte	0x1f
 	.byte	0
-	.uleb128 0x16
-	.uleb128 0xd
+	.uleb128 0x46
+	.8byte	.LBB260
+	.8byte	.LBE260-.LBB260
+	.4byte	0x1d6c
+	.uleb128 0x49
+	.4byte	0x25d5
+	.byte	0xb
 	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
+	.uleb128 0x46
+	.8byte	.LBB261
+	.8byte	.LBE261-.LBB261
+	.4byte	0x1d88
 	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x38
-	.uleb128 0x5
+	.4byte	0x25e7
+	.byte	0x8
 	.byte	0
+	.uleb128 0x46
+	.8byte	.LBB262
+	.8byte	.LBE262-.LBB262
+	.4byte	0x1da4
+	.uleb128 0x49
+	.4byte	0x25f9
 	.byte	0
-	.uleb128 0x17
-	.uleb128 0x21
 	.byte	0
+	.uleb128 0x46
+	.8byte	.LBB263
+	.8byte	.LBE263-.LBB263
+	.4byte	0x1dc0
 	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x2f
-	.uleb128 0x5
+	.4byte	0x260b
 	.byte	0
 	.byte	0
-	.uleb128 0x18
-	.uleb128 0x13
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3c
-	.uleb128 0x19
+	.uleb128 0x46
+	.8byte	.LBB264
+	.8byte	.LBE264-.LBB264
+	.4byte	0x1ddc
+	.uleb128 0x49
+	.4byte	0x261d
 	.byte	0
 	.byte	0
-	.uleb128 0x19
-	.uleb128 0x13
-	.byte	0x1
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0xb
-	.uleb128 0x5
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
+	.uleb128 0x4a
+	.4byte	.Ldebug_ranges0+0x4a0
+	.4byte	0x1ded
+	.uleb128 0x43
+	.4byte	0x262f
 	.uleb128 0x1
-	.uleb128 0x13
+	.byte	0x50
 	.byte	0
+	.uleb128 0x4a
+	.4byte	.Ldebug_ranges0+0x4d0
+	.4byte	0x1e00
+	.uleb128 0x42
+	.4byte	0x2641
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 	.byte	0
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-	.uleb128 0xd
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+	.8byte	.LBE282-.LBB282
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-	.uleb128 0xe
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-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
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+	.uleb128 0x5e
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-	.8byte	.LVL45
-	.8byte	.LVL46-1
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-	.2byte	0x4
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-	.8byte	0
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-	.8byte	.LVL28
-	.8byte	.LVL29
-	.2byte	0x1
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-	.8byte	.LFE287
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-	.8byte	.LFE285
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-	.8byte	.LVL40
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-	.8byte	.LVL274
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-	.sleb128 80
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-	.8byte	.LFE283
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-	.8byte	.LVL274
-	.8byte	.LVL275-1
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-	.byte	0x64
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-	.8byte	.LVL281
-	.2byte	0x4
-	.byte	0xf3
+	.uleb128 0x2
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-	.8byte	.LFE283
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-	.8byte	.LVL276
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-	.8byte	.LVL276
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-	.8byte	.LVL278
-	.8byte	.LVL279
-	.2byte	0x1
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-	.2byte	0x1
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-	.8byte	.LVL283
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-	.sleb128 1
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-	.2byte	0x1
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-	.8byte	.LVL278
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-	.8byte	.LVL290
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-	.8byte	.LVL290
-	.8byte	.LVL295
-	.2byte	0x9
-	.byte	0x8f
-	.sleb128 236
-	.byte	0x94
-	.byte	0x4
-	.byte	0x83
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-	.byte	0x8f
-	.sleb128 236
-	.byte	0x94
-	.byte	0x4
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+	.uleb128 0x1
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-	.8byte	.LVL290
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-	.8byte	.LVL290
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-	.2byte	0x1
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-	.8byte	.LVL292
-	.8byte	.LVL293
-	.2byte	0xd
-	.byte	0x8f
-	.sleb128 254
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+	.4byte	0x3c94
+	.uleb128 0x2
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+	.uleb128 0x11
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+	.uleb128 0x55
+	.4byte	.LASF432
+	.byte	0x1
 	.byte	0x94
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+	.8byte	.LFE268-.LFB268
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3b25
+	.uleb128 0x56
+	.string	"dev"
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+	.4byte	.LLST55
+	.uleb128 0x57
+	.4byte	.LASF420
+	.byte	0x1
+	.byte	0x94
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+	.4byte	.LLST56
+	.uleb128 0x56
+	.string	"buf"
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+	.4byte	.LLST57
+	.uleb128 0x57
+	.4byte	.LASF51
+	.byte	0x1
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+	.4byte	.LLST58
+	.uleb128 0x58
+	.string	"otp"
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+	.4byte	.LLST59
+	.uleb128 0x59
+	.4byte	.LASF382
+	.byte	0x1
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+	.uleb128 0x59
+	.4byte	.LASF433
+	.byte	0x1
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+	.uleb128 0x59
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+	.byte	0x1
+	.byte	0x9a
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+	.4byte	.LLST62
+	.uleb128 0x58
+	.string	"ret"
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+	.uleb128 0x5a
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+	.4byte	0x3b35
+	.uleb128 0x9
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+	.8byte	__func__.7458
+	.uleb128 0x62
+	.4byte	.LASF435
+	.byte	0x1
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+	.uleb128 0x4a
+	.4byte	.Ldebug_ranges0+0x330
+	.4byte	0x39ba
+	.uleb128 0x58
+	.string	"__v"
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+	.byte	0
+	.uleb128 0x4a
+	.4byte	.Ldebug_ranges0+0x360
+	.4byte	0x39d3
+	.uleb128 0x58
+	.string	"__v"
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+	.byte	0
+	.uleb128 0x4a
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+	.4byte	0x39ec
+	.uleb128 0x58
+	.string	"__v"
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+	.byte	0
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+	.4byte	0x3a11
+	.uleb128 0x58
+	.string	"__v"
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+	.4byte	0x3a2a
+	.uleb128 0x58
+	.string	"__v"
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+	.byte	0
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+	.4byte	0x41a5
+	.4byte	0x3a42
+	.uleb128 0x35
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+	.uleb128 0x2
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 	.sleb128 0
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-	.2byte	0xf
-	.byte	0x8f
-	.sleb128 254
-	.byte	0x94
-	.byte	0x2
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+	.uleb128 0x34
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+	.uleb128 0x35
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+	.uleb128 0x2
 	.byte	0x86
 	.sleb128 0
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-	.8byte	.LVL291
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-	.2byte	0x1
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-	.8byte	.LVL284
-	.8byte	.LVL289
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-	.2byte	0x1
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-	.8byte	.LVL372
-	.2byte	0x1
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-	.8byte	.LVL284
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-	.8byte	.LVL289
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-	.8byte	.LFE283
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-	.8byte	.LVL284
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-	.2byte	0x1
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-	.8byte	.LFE283
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-	.8byte	.LVL284
-	.8byte	.LVL289
-	.2byte	0x1
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-	.8byte	.LFE283
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-	.8byte	.LVL284
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-	.2byte	0x1
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-	.2byte	0x1
+	.byte	0
+	.uleb128 0x4b
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+	.uleb128 0x2
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+	.uleb128 0x2
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+	.uleb128 0x2
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+	.uleb128 0x42
+	.4byte	0x3bce
+	.4byte	.LLST52
+	.byte	0
+	.uleb128 0x46
+	.8byte	.LBB161
+	.8byte	.LBE161-.LBB161
+	.4byte	0x4165
+	.uleb128 0x3a
+	.4byte	0x3b4a
+	.4byte	.LLST53
+	.uleb128 0x3a
+	.4byte	0x3b55
+	.4byte	.LLST54
+	.uleb128 0x6b
+	.8byte	.LBB162
+	.8byte	.LBE162-.LBB162
+	.uleb128 0x45
+	.4byte	0x4054
+	.uleb128 0x45
+	.4byte	0x405d
+	.uleb128 0x36
+	.8byte	.LVL210
+	.4byte	0x41d3
+	.uleb128 0x35
+	.uleb128 0x1
 	.byte	0x50
-	.8byte	.LVL93-1
-	.8byte	.LFE280
-	.2byte	0x4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC8
+	.uleb128 0x35
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR2
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.8byte	.LBB163
+	.8byte	.LBE163-.LBB163
+	.4byte	0x4181
+	.uleb128 0x49
+	.4byte	0x3bc1
+	.byte	0x9
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL206
+	.4byte	0x3f3a
+	.uleb128 0x35
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x35
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x32
+	.uleb128 0x4c
+	.4byte	0x3c94
+	.uleb128 0x3
 	.byte	0xf3
 	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST45:
-	.8byte	.LVL92
-	.8byte	.LVL93-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL93-1
-	.8byte	.LVL98
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL98
-	.8byte	.LVL99
-	.2byte	0x4
-	.byte	0xf3
+	.byte	0x50
+	.byte	0
+	.byte	0
+	.uleb128 0x71
+	.4byte	.LASF447
+	.4byte	.LASF447
+	.byte	0x8
+	.2byte	0x112
+	.uleb128 0x72
+	.4byte	.LASF448
+	.4byte	.LASF448
+	.byte	0x20
+	.byte	0x85
+	.uleb128 0x72
+	.4byte	.LASF449
+	.4byte	.LASF449
+	.byte	0x20
+	.byte	0x38
+	.uleb128 0x71
+	.4byte	.LASF450
+	.4byte	.LASF450
+	.byte	0x8
+	.2byte	0x16b
+	.uleb128 0x72
+	.4byte	.LASF451
+	.4byte	.LASF451
+	.byte	0x21
+	.byte	0x13
+	.uleb128 0x71
+	.4byte	.LASF452
+	.4byte	.LASF452
+	.byte	0x1a
+	.2byte	0x393
+	.uleb128 0x72
+	.4byte	.LASF453
+	.4byte	.LASF453
+	.byte	0x22
+	.byte	0xb
+	.byte	0
+	.section	.debug_abbrev,"",@progbits
+.Ldebug_abbrev0:
+	.uleb128 0x1
+	.uleb128 0x11
+	.byte	0x1
+	.uleb128 0x25
+	.uleb128 0xe
+	.uleb128 0x13
+	.uleb128 0xb
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x1b
+	.uleb128 0xe
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x10
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x2
+	.uleb128 0x16
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x24
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3e
+	.uleb128 0xb
+	.uleb128 0x3
+	.uleb128 0xe
+	.byte	0
+	.byte	0
+	.uleb128 0x4
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.byte	0
+	.byte	0
+	.uleb128 0x5
+	.uleb128 0x24
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3e
+	.uleb128 0xb
+	.uleb128 0x3
+	.uleb128 0x8
+	.byte	0
+	.byte	0
+	.uleb128 0x6
+	.uleb128 0x16
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x7
+	.uleb128 0x26
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.uleb128 0xf
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x9
+	.uleb128 0xf
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0xa
+	.uleb128 0x1
+	.byte	0x1
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0x21
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0xc
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.byte	0
+	.byte	0
+	.uleb128 0xd
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
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+	.uleb128 0xe
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0xf
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x10
+	.uleb128 0x26
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x11
+	.uleb128 0x21
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2f
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x12
+	.uleb128 0x15
+	.byte	0x1
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x13
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x14
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0xb
+	.uleb128 0x5
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x15
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x16
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x17
+	.uleb128 0x21
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2f
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x18
+	.uleb128 0x13
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3c
+	.uleb128 0x19
+	.byte	0
+	.byte	0
+	.uleb128 0x19
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0xb
+	.uleb128 0x5
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x1a
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0xb
+	.uleb128 0x5
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x1b
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.byte	0
+	.byte	0
+	.uleb128 0x1c
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x1d
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
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+	.uleb128 0x1e
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
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+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x1f
+	.uleb128 0x16
+	.byte	0
+	.uleb128 0x3
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+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
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+	.uleb128 0x20
+	.uleb128 0xd
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+	.uleb128 0x3
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+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x21
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0xb
+	.uleb128 0x5
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
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+	.uleb128 0x22
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
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+	.uleb128 0x3a
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+	.uleb128 0x3b
+	.uleb128 0x5
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+	.uleb128 0x38
+	.uleb128 0x5
+	.byte	0
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+	.uleb128 0x23
+	.uleb128 0xd
+	.byte	0
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+	.uleb128 0x38
+	.uleb128 0x5
+	.byte	0
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+	.uleb128 0x24
+	.uleb128 0x4
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0xb
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+	.uleb128 0x13
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
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+	.byte	0
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+	.uleb128 0x25
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+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x1c
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+	.byte	0
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+	.uleb128 0x26
+	.uleb128 0x28
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
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+	.uleb128 0xd
+	.byte	0
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+	.uleb128 0x4
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+	.uleb128 0x3f
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+	.byte	0
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+	.byte	0
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+	.uleb128 0x2c
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+	.uleb128 0x2d
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+	.uleb128 0x3
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+	.uleb128 0x2e
+	.uleb128 0x15
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+	.uleb128 0x27
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+	.uleb128 0x19
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+	.uleb128 0x2
+	.uleb128 0x17
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+	.uleb128 0x33
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+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x70
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x71
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x72
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.byte	0
+	.section	.debug_loc,"",@progbits
+.Ldebug_loc0:
+.LLST14:
+	.8byte	.LVL19
+	.8byte	.LVL20-1
 	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL97
-	.8byte	.LVL99
-	.2byte	0x6
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x31
-	.byte	0x26
-	.byte	0x9f
-	.8byte	.LVL99
-	.8byte	.LFE280
+	.byte	0x50
+	.8byte	.LVL20-1
+	.8byte	.LVL27
 	.2byte	0x1
 	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST47:
-	.8byte	.LVL92
-	.8byte	.LVL93-1
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL93-1
-	.8byte	.LVL96
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL96
-	.8byte	.LFE280
+	.8byte	.LVL27
+	.8byte	.LFE277
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
-	.byte	0x53
+	.byte	0x50
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST48:
-	.8byte	.LVL92
-	.8byte	.LVL96
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL99
-	.8byte	.LVL110
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL110
-	.8byte	.LVL111
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL114
-	.8byte	.LVL115
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL131
-	.8byte	.LVL133
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL138
-	.8byte	.LVL140
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL158
-	.8byte	.LVL160
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL165
-	.8byte	.LVL167
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL174
-	.8byte	.LVL176
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL180
-	.8byte	.LVL182
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL187
-	.8byte	.LVL189
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL193
-	.8byte	.LVL194
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL195
-	.8byte	.LVL196
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL197
-	.8byte	.LVL198
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL203
-	.8byte	.LVL204
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL205
-	.8byte	.LVL206
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL207
-	.8byte	.LVL208
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL214
-	.8byte	.LVL216
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL220
-	.8byte	.LVL222
+.LLST15:
+	.8byte	.LVL21
+	.8byte	.LVL22
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL225
-	.8byte	.LFE280
+	.8byte	.LVL22
+	.8byte	.LVL27
 	.2byte	0x1
-	.byte	0x50
+	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST49:
-	.8byte	.LVL93
-	.8byte	.LVL94
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL94
-	.8byte	.LVL95
-	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL99
-	.8byte	.LVL100
+.LLST1:
+	.8byte	.LVL2
+	.8byte	.LVL3
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL100
-	.8byte	.LFE280
-	.2byte	0x1
-	.byte	0x69
-	.8byte	0
-	.8byte	0
-.LLST50:
-	.8byte	.LVL101
-	.8byte	.LVL113
-	.2byte	0x4
-	.byte	0x40
-	.byte	0x3c
-	.byte	0x24
-	.byte	0x9f
-	.8byte	.LVL114
-	.8byte	.LFE280
+	.8byte	.LVL3
+	.8byte	.LFE276
 	.2byte	0x4
-	.byte	0x40
-	.byte	0x3c
-	.byte	0x24
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST51:
-	.8byte	.LVL102
-	.8byte	.LVL113
-	.2byte	0x6
-	.byte	0xc
-	.4byte	0x40004
-	.byte	0x9f
-	.8byte	.LVL114
-	.8byte	.LFE280
-	.2byte	0x6
-	.byte	0xc
-	.4byte	0x40004
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST52:
-	.8byte	.LVL103
-	.8byte	.LVL113
-	.2byte	0x5
-	.byte	0x11
-	.sleb128 -65536
-	.byte	0x9f
-	.8byte	.LVL114
-	.8byte	.LFE280
-	.2byte	0x5
-	.byte	0x11
-	.sleb128 -65536
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST53:
-	.8byte	.LVL104
-	.8byte	.LVL113
-	.2byte	0x6
-	.byte	0x11
-	.sleb128 -16776704
-	.byte	0x9f
-	.8byte	.LVL114
-	.8byte	.LFE280
-	.2byte	0x6
-	.byte	0x11
-	.sleb128 -16776704
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST54:
-	.8byte	.LVL105
-	.8byte	.LVL113
-	.2byte	0x5
-	.byte	0x11
-	.sleb128 -65534
-	.byte	0x9f
-	.8byte	.LVL114
-	.8byte	.LFE280
-	.2byte	0x5
-	.byte	0x11
-	.sleb128 -65534
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST55:
-	.8byte	.LVL106
-	.8byte	.LVL113
+.LLST2:
+	.8byte	.LVL2
+	.8byte	.LVL5
 	.2byte	0x3
-	.byte	0x8
-	.byte	0xfc
+	.byte	0x9
+	.byte	0xea
 	.byte	0x9f
-	.8byte	.LVL114
-	.8byte	.LFE280
+	.8byte	.LVL6
+	.8byte	.LFE276
 	.2byte	0x3
-	.byte	0x8
-	.byte	0xfc
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST56:
-	.8byte	.LVL107
-	.8byte	.LVL113
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL114
-	.8byte	.LFE280
-	.2byte	0x2
-	.byte	0x30
+	.byte	0x9
+	.byte	0xea
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST57:
-	.8byte	.LVL108
-	.8byte	.LVL113
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL114
-	.8byte	.LFE280
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
+.LLST3:
+	.8byte	.LVL4
+	.8byte	.LVL5
+	.2byte	0x1
+	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST58:
-	.8byte	.LVL109
-	.8byte	.LVL113
-	.2byte	0x6
-	.byte	0xc
-	.4byte	0x10001
-	.byte	0x9f
-	.8byte	.LVL114
-	.8byte	.LFE280
-	.2byte	0x6
-	.byte	0xc
-	.4byte	0x10001
+.LLST4:
+	.8byte	.LVL7
+	.8byte	.LVL8-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL8-1
+	.8byte	.LVL11
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL11
+	.8byte	.LVL12-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL12-1
+	.8byte	.LFE274
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST59:
-	.8byte	.LVL129
-	.8byte	.LVL134
+.LLST5:
+	.8byte	.LVL7
+	.8byte	.LVL8-1
 	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST60:
-	.8byte	.LVL170
-	.8byte	.LVL173
+	.byte	0x51
+	.8byte	.LVL8-1
+	.8byte	.LVL11
 	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL11
+	.8byte	.LVL12-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL12-1
+	.8byte	.LFE274
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
 	.byte	0x51
+	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST61:
-	.8byte	.LVL171
-	.8byte	.LVL202
+.LLST6:
+	.8byte	.LVL7
+	.8byte	.LVL8-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL8-1
+	.8byte	.LVL10
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL202
-	.8byte	.LFE280
-	.2byte	0xa
+	.8byte	.LVL10
+	.8byte	.LVL12-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL12-1
+	.8byte	.LFE274
+	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
-	.byte	0x53
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x38
-	.byte	0x25
+	.byte	0x52
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST69:
-	.8byte	.LVL239
-	.8byte	.LVL240-1
+.LLST7:
+	.8byte	.LVL7
+	.8byte	.LVL8-1
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL240-1
-	.8byte	.LVL249
+	.byte	0x53
+	.8byte	.LVL8-1
+	.8byte	.LVL10
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL249
-	.8byte	.LVL253
+	.8byte	.LVL10
+	.8byte	.LVL12-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL12-1
+	.8byte	.LFE274
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
-	.byte	0x50
+	.byte	0x53
 	.byte	0x9f
-	.8byte	.LVL253
-	.8byte	.LVL254
+	.8byte	0
+	.8byte	0
+.LLST8:
+	.8byte	.LVL8
+	.8byte	.LVL9
 	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL254
-	.8byte	.LFE279
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST9:
+	.8byte	.LVL13
+	.8byte	.LVL14-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL14-1
+	.8byte	.LVL17
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL17
+	.8byte	.LVL18-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL18-1
+	.8byte	.LFE273
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -17185,772 +12364,1070 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST70:
-	.8byte	.LVL239
-	.8byte	.LVL240-1
+.LLST10:
+	.8byte	.LVL13
+	.8byte	.LVL14-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL240-1
-	.8byte	.LVL264
+	.8byte	.LVL14-1
+	.8byte	.LVL17
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL266
-	.8byte	.LFE279
+	.8byte	.LVL17
+	.8byte	.LVL18-1
 	.2byte	0x1
-	.byte	0x64
+	.byte	0x51
+	.8byte	.LVL18-1
+	.8byte	.LFE273
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST71:
-	.8byte	.LVL239
-	.8byte	.LVL240-1
+.LLST11:
+	.8byte	.LVL13
+	.8byte	.LVL14-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL240-1
-	.8byte	.LVL250
+	.8byte	.LVL14-1
+	.8byte	.LVL16
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL250
-	.8byte	.LVL253
+	.8byte	.LVL16
+	.8byte	.LVL18-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL18-1
+	.8byte	.LFE273
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x52
 	.byte	0x9f
-	.8byte	.LVL253
-	.8byte	.LVL254
+	.8byte	0
+	.8byte	0
+.LLST12:
+	.8byte	.LVL13
+	.8byte	.LVL14-1
 	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL254
-	.8byte	.LFE279
+	.byte	0x53
+	.8byte	.LVL14-1
+	.8byte	.LVL16
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL16
+	.8byte	.LVL18-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL18-1
+	.8byte	.LFE273
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
-	.byte	0x52
+	.byte	0x53
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST72:
-	.8byte	.LVL239
-	.8byte	.LVL240-1
+.LLST13:
+	.8byte	.LVL14
+	.8byte	.LVL15
 	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL240-1
-	.8byte	.LVL250
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST69:
+	.8byte	.LVL248
+	.8byte	.LVL249-1
 	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL250
-	.8byte	.LVL253
-	.2byte	0x3
-	.byte	0x87
-	.sleb128 -1
+	.byte	0x50
+	.8byte	.LVL249-1
+	.8byte	.LVL273
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL273
+	.8byte	.LVL276
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL253
+	.8byte	.LVL276
+	.8byte	.LFE272
+	.2byte	0x1
+	.byte	0x69
+	.8byte	0
+	.8byte	0
+.LLST70:
+	.8byte	.LVL248
+	.8byte	.LVL249-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL249-1
+	.8byte	.LVL275
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 236
+	.8byte	.LVL275
+	.8byte	.LVL276
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 92
+	.8byte	.LVL276
+	.8byte	.LFE272
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 236
+	.8byte	0
+	.8byte	0
+.LLST71:
+	.8byte	.LVL248
+	.8byte	.LVL249-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL249-1
+	.8byte	.LVL275
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 224
+	.8byte	.LVL275
+	.8byte	.LVL276
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 80
+	.8byte	.LVL276
+	.8byte	.LFE272
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 224
+	.8byte	0
+	.8byte	0
+.LLST72:
+	.8byte	.LVL248
+	.8byte	.LVL249-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL249-1
 	.8byte	.LVL254
 	.2byte	0x1
-	.byte	0x67
+	.byte	0x64
 	.8byte	.LVL254
-	.8byte	.LVL265
-	.2byte	0x3
-	.byte	0x87
-	.sleb128 -1
+	.8byte	.LVL255
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
 	.byte	0x9f
-	.8byte	.LVL266
-	.8byte	.LVL272
-	.2byte	0x3
-	.byte	0x87
-	.sleb128 -1
+	.8byte	.LVL255
+	.8byte	.LVL257
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL257
+	.8byte	.LVL263
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
 	.byte	0x9f
+	.8byte	.LVL263
 	.8byte	.LVL272
-	.8byte	.LFE279
 	.2byte	0x1
-	.byte	0x67
+	.byte	0x64
+	.8byte	.LVL272
+	.8byte	.LVL276
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL276
+	.8byte	.LVL280
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL280
+	.8byte	.LFE272
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
 	.8byte	0
 	.8byte	0
 .LLST73:
-	.8byte	.LVL241
-	.8byte	.LVL242
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 	.2byte	0x1
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 .LLST74:
-	.8byte	.LVL244
-	.8byte	.LVL246
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+	.8byte	.LVL252
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 	.2byte	0x1
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-	.2byte	0x1
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-	.8byte	.LVL266
-	.8byte	.LFE279
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+	.8byte	.LVL256
 	.2byte	0x1
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-	.8byte	.LVL244
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+	.8byte	.LVL257
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 	.sleb128 1
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-	.8byte	.LVL270
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-	.2byte	0x3
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-	.sleb128 2
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-	.8byte	.LVL269
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+	.8byte	.LVL252
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-	.8byte	.LVL244
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+	.8byte	.LVL264
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 	.2byte	0x1
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-	.8byte	.LVL248
-	.8byte	.LVL253
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+	.8byte	.LVL264
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+	.2byte	0x9
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-	.8byte	.LVL255
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+	.8byte	.LVL264
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-	.sleb128 -1
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-	.byte	0x21
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-	.8byte	.LVL256
-	.8byte	.LVL262
-	.2byte	0x6
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+	.8byte	.LVL264
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 	.8byte	.LVL266
-	.8byte	.LFE279
-	.2byte	0x6
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+	.2byte	0xd
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+.LLST84:
+	.8byte	.LVL265
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-	.8byte	.LVL262
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+	.8byte	.LVL258
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-	.2byte	0x4
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-	.8byte	.LVL449
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-	.8byte	.LVL449
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+	.8byte	.LVL258
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-	.8byte	.LVL449
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-	.8byte	.LVL449
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-	.8byte	.LVL461
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+	.8byte	.LVL345
+	.8byte	.LVL348
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL464
-	.8byte	.LVL465
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST94:
+	.8byte	.LVL346
+	.8byte	.LVL365
 	.2byte	0x1
-	.byte	0x50
+	.byte	0x68
 	.8byte	0
 	.8byte	0
-.LLST128:
-	.8byte	.LVL453
-	.8byte	.LVL454
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL458
-	.8byte	.LVL460
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL460
-	.8byte	.LVL461
+.LLST30:
+	.8byte	.LVL66
+	.8byte	.LVL67-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL463
-	.8byte	.LVL464
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL468
-	.8byte	.LVL473
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL474
-	.8byte	.LVL501
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL502
-	.8byte	.LFE278
-	.2byte	0x2
-	.byte	0x30
+	.8byte	.LVL67-1
+	.8byte	.LFE269
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST129:
-	.8byte	.LVL469
-	.8byte	.LVL473
+.LLST31:
+	.8byte	.LVL66
+	.8byte	.LVL67-1
 	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL474
-	.8byte	.LVL499
+	.byte	0x51
+	.8byte	.LVL67-1
+	.8byte	.LVL72
 	.2byte	0x1
 	.byte	0x6c
-	.8byte	.LVL502
-	.8byte	.LVL549
+	.8byte	.LVL72
+	.8byte	.LVL73
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL73
+	.8byte	.LFE269
 	.2byte	0x1
 	.byte	0x6c
 	.8byte	0
 	.8byte	0
-.LLST130:
-	.8byte	.LVL469
-	.8byte	.LVL473
+.LLST32:
+	.8byte	.LVL66
+	.8byte	.LVL67-1
 	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL474
-	.8byte	.LVL501
+	.byte	0x52
+	.8byte	.LVL67-1
+	.8byte	.LVL67
 	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL502
-	.8byte	.LFE278
+	.byte	0x66
+	.8byte	.LVL67
+	.8byte	.LVL71
 	.2byte	0x1
-	.byte	0x63
+	.byte	0x64
+	.8byte	.LVL71
+	.8byte	.LVL73
+	.2byte	0x6
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x31
+	.byte	0x26
+	.byte	0x9f
+	.8byte	.LVL73
+	.8byte	.LFE269
+	.2byte	0x1
+	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST131:
-	.8byte	.LVL469
-	.8byte	.LVL473
-	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL474
-	.8byte	.LVL501
+.LLST33:
+	.8byte	.LVL66
+	.8byte	.LVL67-1
 	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL502
-	.8byte	.LFE278
+	.byte	0x53
+	.8byte	.LVL67-1
+	.8byte	.LVL70
 	.2byte	0x1
-	.byte	0x6b
-	.8byte	0
-	.8byte	0
-.LLST132:
-	.8byte	.LVL469
-	.8byte	.LVL473
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 224
-	.8byte	.LVL474
-	.8byte	.LVL501
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 224
-	.8byte	.LVL502
-	.8byte	.LFE278
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 224
+	.byte	0x65
+	.8byte	.LVL70
+	.8byte	.LFE269
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST133:
-	.8byte	.LVL469
-	.8byte	.LVL473
+.LLST34:
+	.8byte	.LVL66
+	.8byte	.LVL70
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL474
-	.8byte	.LVL497
+	.8byte	.LVL73
+	.8byte	.LVL84
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL497
-	.8byte	.LVL498
+	.8byte	.LVL84
+	.8byte	.LVL85
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL498
-	.8byte	.LVL501
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL502
-	.8byte	.LVL503
+	.8byte	.LVL88
+	.8byte	.LVL89
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL503
-	.8byte	.LVL521
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL521
-	.8byte	.LVL522
+	.8byte	.LVL105
+	.8byte	.LVL107
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL522
-	.8byte	.LVL523
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL523
-	.8byte	.LVL524
+	.8byte	.LVL112
+	.8byte	.LVL114
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL524
-	.8byte	.LVL530
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL530
-	.8byte	.LVL531
+	.8byte	.LVL132
+	.8byte	.LVL134
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL531
-	.8byte	.LVL532
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL532
-	.8byte	.LVL533
+	.8byte	.LVL139
+	.8byte	.LVL141
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL533
-	.8byte	.LVL537
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL537
-	.8byte	.LVL538
+	.8byte	.LVL148
+	.8byte	.LVL150
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL538
-	.8byte	.LVL539
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL539
-	.8byte	.LVL540
+	.8byte	.LVL154
+	.8byte	.LVL156
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL540
-	.8byte	.LVL545
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL545
-	.8byte	.LVL546
+	.8byte	.LVL161
+	.8byte	.LVL163
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL546
-	.8byte	.LVL547
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL547
-	.8byte	.LVL548
+	.8byte	.LVL167
+	.8byte	.LVL168
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL548
-	.8byte	.LVL555
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL555
-	.8byte	.LVL556
+	.8byte	.LVL169
+	.8byte	.LVL170
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL556
-	.8byte	.LVL557
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL557
-	.8byte	.LVL558
+	.8byte	.LVL171
+	.8byte	.LVL172
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL558
-	.8byte	.LVL560
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL560
-	.8byte	.LVL561
+	.8byte	.LVL177
+	.8byte	.LVL178
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL561
-	.8byte	.LVL562
+	.8byte	.LVL179
+	.8byte	.LVL180
 	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL562
-	.8byte	.LVL563
+	.byte	0x50
+	.8byte	.LVL181
+	.8byte	.LVL182
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL563
-	.8byte	.LVL568
+	.8byte	.LVL188
+	.8byte	.LVL190
 	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL568
-	.8byte	.LVL569
+	.byte	0x50
+	.8byte	.LVL194
+	.8byte	.LVL196
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL569
-	.8byte	.LVL570
+	.8byte	.LVL199
+	.8byte	.LFE269
 	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL570
-	.8byte	.LVL571
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST35:
+	.8byte	.LVL67
+	.8byte	.LVL68
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL571
-	.8byte	.LVL573
+	.8byte	.LVL68
+	.8byte	.LVL69
 	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL573
-	.8byte	.LVL574
+	.byte	0x69
+	.8byte	.LVL73
+	.8byte	.LVL74
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL574
-	.8byte	.LFE278
+	.8byte	.LVL74
+	.8byte	.LFE269
 	.2byte	0x1
-	.byte	0x6a
+	.byte	0x69
+	.8byte	0
+	.8byte	0
+.LLST36:
+	.8byte	.LVL75
+	.8byte	.LVL87
+	.2byte	0x4
+	.byte	0x40
+	.byte	0x3c
+	.byte	0x24
+	.byte	0x9f
+	.8byte	.LVL88
+	.8byte	.LFE269
+	.2byte	0x4
+	.byte	0x40
+	.byte	0x3c
+	.byte	0x24
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST37:
+	.8byte	.LVL76
+	.8byte	.LVL87
+	.2byte	0x6
+	.byte	0xc
+	.4byte	0x40004
+	.byte	0x9f
+	.8byte	.LVL88
+	.8byte	.LFE269
+	.2byte	0x6
+	.byte	0xc
+	.4byte	0x40004
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST38:
+	.8byte	.LVL77
+	.8byte	.LVL87
+	.2byte	0x5
+	.byte	0x11
+	.sleb128 -65536
+	.byte	0x9f
+	.8byte	.LVL88
+	.8byte	.LFE269
+	.2byte	0x5
+	.byte	0x11
+	.sleb128 -65536
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST39:
+	.8byte	.LVL78
+	.8byte	.LVL87
+	.2byte	0x6
+	.byte	0x11
+	.sleb128 -16776704
+	.byte	0x9f
+	.8byte	.LVL88
+	.8byte	.LFE269
+	.2byte	0x6
+	.byte	0x11
+	.sleb128 -16776704
+	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST134:
-	.8byte	.LVL471
-	.8byte	.LVL472
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL472
-	.8byte	.LVL473
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 232
-	.8byte	.LVL474
-	.8byte	.LVL501
+.LLST40:
+	.8byte	.LVL79
+	.8byte	.LVL87
+	.2byte	0x5
+	.byte	0x11
+	.sleb128 -65534
+	.byte	0x9f
+	.8byte	.LVL88
+	.8byte	.LFE269
+	.2byte	0x5
+	.byte	0x11
+	.sleb128 -65534
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST41:
+	.8byte	.LVL80
+	.8byte	.LVL87
 	.2byte	0x3
-	.byte	0x8f
-	.sleb128 232
-	.8byte	.LVL502
-	.8byte	.LFE278
+	.byte	0x8
+	.byte	0xfc
+	.byte	0x9f
+	.8byte	.LVL88
+	.8byte	.LFE269
 	.2byte	0x3
-	.byte	0x8f
-	.sleb128 232
+	.byte	0x8
+	.byte	0xfc
+	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST135:
-	.8byte	.LVL492
-	.8byte	.LVL494
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL494
-	.8byte	.LVL495
-	.2byte	0x6
-	.byte	0x8b
-	.sleb128 0
-	.byte	0x6
-	.byte	0x23
-	.uleb128 0x1038
-	.8byte	.LVL495
-	.8byte	.LVL501
+.LLST42:
+	.8byte	.LVL81
+	.8byte	.LVL87
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL88
+	.8byte	.LFE269
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST43:
+	.8byte	.LVL82
+	.8byte	.LVL87
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL88
+	.8byte	.LFE269
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST44:
+	.8byte	.LVL83
+	.8byte	.LVL87
 	.2byte	0x6
-	.byte	0x83
-	.sleb128 0
-	.byte	0x9
-	.byte	0xf8
-	.byte	0x24
+	.byte	0xc
+	.4byte	0x10001
 	.byte	0x9f
-	.8byte	.LVL502
-	.8byte	.LFE278
+	.8byte	.LVL88
+	.8byte	.LFE269
 	.2byte	0x6
-	.byte	0x83
-	.sleb128 0
-	.byte	0x9
-	.byte	0xf8
-	.byte	0x24
+	.byte	0xc
+	.4byte	0x10001
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST136:
-	.8byte	.LVL500
-	.8byte	.LVL502
-	.2byte	0x5
-	.byte	0x11
-	.sleb128 -65533
-	.byte	0x9f
+.LLST45:
+	.8byte	.LVL103
+	.8byte	.LVL108
+	.2byte	0x1
+	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST137:
-	.8byte	.LVL534
-	.8byte	.LVL549
+.LLST46:
+	.8byte	.LVL144
+	.8byte	.LVL147
 	.2byte	0x1
-	.byte	0x6c
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST47:
+	.8byte	.LVL145
+	.8byte	.LVL176
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL176
+	.8byte	.LFE269
+	.2byte	0xa
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x38
+	.byte	0x25
+	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST109:
-	.8byte	.LVL415
-	.8byte	.LVL416-1
+.LLST55:
+	.8byte	.LVL213
+	.8byte	.LVL214-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL416-1
-	.8byte	.LVL424
+	.8byte	.LVL214-1
+	.8byte	.LVL223
 	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL424
-	.8byte	.LFE276
+	.byte	0x66
+	.8byte	.LVL223
+	.8byte	.LVL227
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL227
+	.8byte	.LVL228
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL228
+	.8byte	.LFE268
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -17958,173 +13435,218 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST110:
-	.8byte	.LVL415
-	.8byte	.LVL416-1
+.LLST56:
+	.8byte	.LVL213
+	.8byte	.LVL214-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL416-1
-	.8byte	.LVL429
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL429
-	.8byte	.LVL430
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL430
-	.8byte	.LVL442
+	.8byte	.LVL214-1
+	.8byte	.LVL238
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL444
-	.8byte	.LFE276
+	.8byte	.LVL240
+	.8byte	.LFE268
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST111:
-	.8byte	.LVL415
-	.8byte	.LVL416-1
+.LLST57:
+	.8byte	.LVL213
+	.8byte	.LVL214-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL416-1
-	.8byte	.LVL426
+	.8byte	.LVL214-1
+	.8byte	.LVL224
 	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL426
-	.8byte	.LFE276
+	.byte	0x65
+	.8byte	.LVL224
+	.8byte	.LVL227
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x52
 	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST112:
-	.8byte	.LVL415
-	.8byte	.LVL416-1
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL416-1
-	.8byte	.LVL425
+	.8byte	.LVL227
+	.8byte	.LVL228
 	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL425
-	.8byte	.LVL426
+	.byte	0x65
+	.8byte	.LVL228
+	.8byte	.LFE268
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
-	.byte	0x53
+	.byte	0x52
 	.byte	0x9f
-	.8byte	.LVL426
-	.8byte	.LFE276
-	.2byte	0x6
-	.byte	0xf3
-	.uleb128 0x1
+	.8byte	0
+	.8byte	0
+.LLST58:
+	.8byte	.LVL213
+	.8byte	.LVL214-1
+	.2byte	0x1
 	.byte	0x53
-	.byte	0x31
-	.byte	0x1c
+	.8byte	.LVL214-1
+	.8byte	.LVL224
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL224
+	.8byte	.LVL227
+	.2byte	0x3
+	.byte	0x87
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL227
+	.8byte	.LVL228
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL228
+	.8byte	.LVL239
+	.2byte	0x3
+	.byte	0x87
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL240
+	.8byte	.LVL246
+	.2byte	0x3
+	.byte	0x87
+	.sleb128 -1
 	.byte	0x9f
+	.8byte	.LVL246
+	.8byte	.LFE268
+	.2byte	0x1
+	.byte	0x67
 	.8byte	0
 	.8byte	0
-.LLST113:
-	.8byte	.LVL417
-	.8byte	.LVL418
+.LLST59:
+	.8byte	.LVL215
+	.8byte	.LVL216
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL418
-	.8byte	.LVL442
+	.8byte	.LVL216
+	.8byte	.LVL238
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL444
-	.8byte	.LFE276
+	.8byte	.LVL240
+	.8byte	.LFE268
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST114:
-	.8byte	.LVL420
-	.8byte	.LVL421
+.LLST60:
+	.8byte	.LVL218
+	.8byte	.LVL220
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL421
-	.8byte	.LVL441
+	.8byte	.LVL220
+	.8byte	.LVL239
 	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL444
-	.8byte	.LFE276
+	.byte	0x68
+	.8byte	.LVL240
+	.8byte	.LFE268
 	.2byte	0x1
-	.byte	0x69
+	.byte	0x68
 	.8byte	0
 	.8byte	0
-.LLST115:
-	.8byte	.LVL420
-	.8byte	.LVL443
+.LLST61:
+	.8byte	.LVL218
+	.8byte	.LVL236
 	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL444
-	.8byte	.LVL448
+	.byte	0x65
+	.8byte	.LVL240
+	.8byte	.LVL243
 	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL448
-	.8byte	.LFE276
+	.byte	0x65
+	.8byte	.LVL243
+	.8byte	.LVL244
 	.2byte	0x3
-	.byte	0x86
-	.sleb128 -1
+	.byte	0x85
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL244
+	.8byte	.LVL247
+	.2byte	0x3
+	.byte	0x85
+	.sleb128 2
 	.byte	0x9f
+	.8byte	.LVL247
+	.8byte	.LFE268
+	.2byte	0x1
+	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST116:
-	.8byte	.LVL420
-	.8byte	.LVL426
+.LLST62:
+	.8byte	.LVL243
+	.8byte	.LVL245
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST63:
+	.8byte	.LVL218
+	.8byte	.LVL224
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL426
-	.8byte	.LVL428
+	.8byte	.LVL224
+	.8byte	.LVL226
 	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL429
-	.8byte	.LVL437
+	.byte	0x66
+	.8byte	.LVL227
+	.8byte	.LVL228
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL228
+	.8byte	.LVL234
 	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL437
-	.8byte	.LVL438
+	.byte	0x66
+	.8byte	.LVL234
+	.8byte	.LVL235
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL438
-	.8byte	.LVL440
+	.8byte	.LVL235
+	.8byte	.LVL237
 	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL444
-	.8byte	.LVL445
+	.byte	0x66
+	.8byte	.LVL240
+	.8byte	.LVL241
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL445
-	.8byte	.LFE276
+	.8byte	.LVL241
+	.8byte	.LFE268
 	.2byte	0x1
-	.byte	0x65
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST64:
+	.8byte	.LVL222
+	.8byte	.LVL227
+	.2byte	0x6
+	.byte	0xc
+	.4byte	0x10001
+	.byte	0x9f
+	.8byte	.LVL228
+	.8byte	.LFE268
+	.2byte	0x6
+	.byte	0xc
+	.4byte	0x10001
+	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST117:
-	.8byte	.LVL431
-	.8byte	.LVL433
+.LLST65:
+	.8byte	.LVL229
+	.8byte	.LVL231
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL433
-	.8byte	.LVL434
-	.2byte	0x3
-	.byte	0x71
-	.sleb128 260
-	.8byte	.LVL434
-	.8byte	.LVL435
+	.byte	0x51
+	.8byte	.LVL231
+	.8byte	.LVL232
 	.2byte	0x6
 	.byte	0x83
 	.sleb128 0
 	.byte	0x6
 	.byte	0x23
 	.uleb128 0x104
-	.8byte	.LVL435
-	.8byte	.LVL439
+	.8byte	.LVL232
+	.8byte	.LVL236
 	.2byte	0x8
 	.byte	0x84
 	.sleb128 -1
@@ -18132,8 +13654,8 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.sleb128 -65536
 	.byte	0x21
 	.byte	0x9f
-	.8byte	.LVL444
-	.8byte	.LFE276
+	.8byte	.LVL240
+	.8byte	.LFE268
 	.2byte	0x8
 	.byte	0x84
 	.sleb128 -1
@@ -18143,154 +13665,45 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST118:
-	.8byte	.LVL432
-	.8byte	.LVL439
+.LLST66:
+	.8byte	.LVL230
+	.8byte	.LVL236
 	.2byte	0x6
 	.byte	0xc
 	.4byte	0x10001
 	.byte	0x9f
-	.8byte	.LVL444
-	.8byte	.LFE276
+	.8byte	.LVL240
+	.8byte	.LFE268
 	.2byte	0x6
 	.byte	0xc
 	.4byte	0x10001
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST119:
-	.8byte	.LVL439
-	.8byte	.LVL440
-	.2byte	0x4
-	.byte	0x40
-	.byte	0x3c
-	.byte	0x24
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST14:
-	.8byte	.LVL26
-	.8byte	.LVL27
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL27
-	.8byte	.LFE271
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST30:
-	.8byte	.LVL54
-	.8byte	.LVL57
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL57
-	.8byte	.LFE270
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST31:
-	.8byte	.LVL54
-	.8byte	.LVL55
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL55
-	.8byte	.LVL59
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL59
-	.8byte	.LFE270
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST32:
-	.8byte	.LVL54
-	.8byte	.LVL58-1
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL58-1
-	.8byte	.LFE270
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST33:
-	.8byte	.LVL54
-	.8byte	.LVL58-1
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL58-1
-	.8byte	.LFE270
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST12:
-	.8byte	.LVL22
-	.8byte	.LVL25
+.LLST68:
+	.8byte	.LVL242
+	.8byte	.LVL245
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL25
-	.8byte	.LFE269
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST13:
-	.8byte	.LVL22
-	.8byte	.LVL23
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL23
-	.8byte	.LFE269
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST10:
-	.8byte	.LVL18
-	.8byte	.LVL21
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL21
-	.8byte	.LFE268
+.LLST67:
+	.8byte	.LVL236
+	.8byte	.LVL237
 	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
+	.byte	0x40
+	.byte	0x3c
+	.byte	0x24
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST11:
-	.8byte	.LVL18
-	.8byte	.LVL19
+.LLST0:
+	.8byte	.LVL0
+	.8byte	.LVL1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL19
-	.8byte	.LFE268
+	.8byte	.LVL1
+	.8byte	.LFE263
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -18298,13 +13711,13 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST7:
-	.8byte	.LVL13
-	.8byte	.LVL16
+.LLST16:
+	.8byte	.LVL28
+	.8byte	.LVL31
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL16
-	.8byte	.LFE267
+	.8byte	.LVL31
+	.8byte	.LFE262
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -18312,83 +13725,17 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST8:
-	.8byte	.LVL13
-	.8byte	.LVL14
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL14
-	.8byte	.LFE267
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST9:
-	.8byte	.LVL13
-	.8byte	.LVL17
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL17
-	.8byte	.LFE267
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST5:
-	.8byte	.LVL9
-	.8byte	.LVL10
+.LLST17:
+	.8byte	.LVL28
+	.8byte	.LVL29
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL10
-	.8byte	.LFE266
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST6:
-	.8byte	.LVL9
-	.8byte	.LVL11
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL11
-	.8byte	.LFE266
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST2:
-	.8byte	.LVL4
-	.8byte	.LVL7
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL7
-	.8byte	.LFE265
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST3:
-	.8byte	.LVL4
-	.8byte	.LVL5
+	.8byte	.LVL29
+	.8byte	.LVL33
 	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL5
-	.8byte	.LFE265
+	.byte	0x63
+	.8byte	.LVL33
+	.8byte	.LFE262
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -18396,41 +13743,27 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST4:
-	.8byte	.LVL4
-	.8byte	.LVL8
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL8
-	.8byte	.LFE265
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST0:
-	.8byte	.LVL0
-	.8byte	.LVL1
+.LLST18:
+	.8byte	.LVL28
+	.8byte	.LVL32-1
 	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1
-	.8byte	.LFE264
+	.byte	0x52
+	.8byte	.LVL32-1
+	.8byte	.LFE262
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
-	.byte	0x51
+	.byte	0x52
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST1:
-	.8byte	.LVL0
-	.8byte	.LVL2
+.LLST19:
+	.8byte	.LVL28
+	.8byte	.LVL32-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL2
-	.8byte	.LFE264
+	.8byte	.LVL32-1
+	.8byte	.LFE262
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -18438,126 +13771,126 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST34:
-	.8byte	.LVL61
-	.8byte	.LVL64
+.LLST20:
+	.8byte	.LVL35
+	.8byte	.LVL38
 	.2byte	0x3
 	.byte	0x83
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL64
-	.8byte	.LVL65
+	.8byte	.LVL38
+	.8byte	.LVL39
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL65
-	.8byte	.LVL67
+	.8byte	.LVL39
+	.8byte	.LVL41
 	.2byte	0x3
 	.byte	0x83
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL67
-	.8byte	.LVL68
+	.8byte	.LVL41
+	.8byte	.LVL42
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST35:
-	.8byte	.LVL63
-	.8byte	.LVL66-1
+.LLST21:
+	.8byte	.LVL37
+	.8byte	.LVL40-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL67
-	.8byte	.LFE289
+	.8byte	.LVL41
+	.8byte	.LFE278
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST36:
-	.8byte	.LVL62
-	.8byte	.LVL66-1
+.LLST22:
+	.8byte	.LVL36
+	.8byte	.LVL40-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL67
-	.8byte	.LFE289
+	.8byte	.LVL41
+	.8byte	.LFE278
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST37:
-	.8byte	.LVL69
-	.8byte	.LVL72
+.LLST23:
+	.8byte	.LVL43
+	.8byte	.LVL46
 	.2byte	0x3
 	.byte	0x83
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL72
-	.8byte	.LVL74
+	.8byte	.LVL46
+	.8byte	.LVL48
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL74
-	.8byte	.LVL76
+	.8byte	.LVL48
+	.8byte	.LVL50
 	.2byte	0x3
 	.byte	0x83
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL77
-	.8byte	.LFE290
+	.8byte	.LVL51
+	.8byte	.LFE279
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST38:
-	.8byte	.LVL71
-	.8byte	.LVL73
+.LLST24:
+	.8byte	.LVL45
+	.8byte	.LVL47
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL75
-	.8byte	.LVL76
+	.8byte	.LVL49
+	.8byte	.LVL50
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL77
-	.8byte	.LVL78
+	.8byte	.LVL51
+	.8byte	.LVL52
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST39:
-	.8byte	.LVL70
-	.8byte	.LVL73
+.LLST25:
+	.8byte	.LVL44
+	.8byte	.LVL47
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL75
-	.8byte	.LVL76
+	.8byte	.LVL49
+	.8byte	.LVL50
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL77
-	.8byte	.LVL78
+	.8byte	.LVL51
+	.8byte	.LVL52
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST40:
-	.8byte	.LVL79
-	.8byte	.LVL80
+.LLST26:
+	.8byte	.LVL53
+	.8byte	.LVL54
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL80
-	.8byte	.LVL82
+	.8byte	.LVL54
+	.8byte	.LVL56
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL82
-	.8byte	.LVL84
+	.8byte	.LVL56
+	.8byte	.LVL58
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL84
-	.8byte	.LVL90
+	.8byte	.LVL58
+	.8byte	.LVL64
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL90
-	.8byte	.LFE291
+	.8byte	.LVL64
+	.8byte	.LFE280
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -18565,66 +13898,66 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST41:
-	.8byte	.LVL80
-	.8byte	.LVL86
+.LLST27:
+	.8byte	.LVL54
+	.8byte	.LVL60
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL86
-	.8byte	.LVL87
+	.8byte	.LVL60
+	.8byte	.LVL61
 	.2byte	0x3
 	.byte	0x84
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL87
-	.8byte	.LVL91
+	.8byte	.LVL61
+	.8byte	.LVL65
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST42:
-	.8byte	.LVL81
-	.8byte	.LVL83
+.LLST28:
+	.8byte	.LVL55
+	.8byte	.LVL57
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL84
-	.8byte	.LVL85
+	.8byte	.LVL58
+	.8byte	.LVL59
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST43:
-	.8byte	.LVL82
-	.8byte	.LVL84
+.LLST29:
+	.8byte	.LVL56
+	.8byte	.LVL58
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST62:
-	.8byte	.LVL226
-	.8byte	.LVL232-1
+.LLST48:
+	.8byte	.LVL200
+	.8byte	.LVL206-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL232-1
-	.8byte	.LVL238
+	.8byte	.LVL206-1
+	.8byte	.LVL212
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL238
-	.8byte	.LFE275
+	.8byte	.LVL212
+	.8byte	.LFE267
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST63:
-	.8byte	.LVL226
-	.8byte	.LVL230
+.LLST49:
+	.8byte	.LVL200
+	.8byte	.LVL204
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL230
-	.8byte	.LFE275
+	.8byte	.LVL204
+	.8byte	.LFE267
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -18632,51 +13965,51 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST64:
-	.8byte	.LVL226
-	.8byte	.LVL233
+.LLST50:
+	.8byte	.LVL200
+	.8byte	.LVL207
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL233
-	.8byte	.LVL235
+	.8byte	.LVL207
+	.8byte	.LVL209
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL235
-	.8byte	.LVL237
+	.8byte	.LVL209
+	.8byte	.LVL211
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL237
-	.8byte	.LVL238
+	.8byte	.LVL211
+	.8byte	.LVL212
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL238
-	.8byte	.LFE275
+	.8byte	.LVL212
+	.8byte	.LFE267
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST65:
-	.8byte	.LVL229
-	.8byte	.LVL231
+.LLST51:
+	.8byte	.LVL203
+	.8byte	.LVL205
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST66:
-	.8byte	.LVL231
-	.8byte	.LVL238
+.LLST52:
+	.8byte	.LVL205
+	.8byte	.LVL212
 	.2byte	0x6
 	.byte	0xc
 	.4byte	0x10001
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST67:
-	.8byte	.LVL234
-	.8byte	.LVL236
+.LLST53:
+	.8byte	.LVL208
+	.8byte	.LVL210
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -18684,9 +14017,9 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST68:
-	.8byte	.LVL234
-	.8byte	.LVL236
+.LLST54:
+	.8byte	.LVL208
+	.8byte	.LVL210
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -18694,400 +14027,290 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-	.section	.debug_aranges,"",@progbits
-	.4byte	0x16c
-	.2byte	0x2
-	.4byte	.Ldebug_info0
-	.byte	0x8
-	.byte	0
-	.2byte	0
-	.2byte	0
-	.8byte	.LFB264
-	.8byte	.LFE264-.LFB264
-	.8byte	.LFB265
-	.8byte	.LFE265-.LFB265
-	.8byte	.LFB266
-	.8byte	.LFE266-.LFB266
-	.8byte	.LFB267
-	.8byte	.LFE267-.LFB267
-	.8byte	.LFB268
-	.8byte	.LFE268-.LFB268
-	.8byte	.LFB269
-	.8byte	.LFE269-.LFB269
-	.8byte	.LFB271
-	.8byte	.LFE271-.LFB271
-	.8byte	.LFB287
-	.8byte	.LFE287-.LFB287
-	.8byte	.LFB285
-	.8byte	.LFE285-.LFB285
-	.8byte	.LFB284
-	.8byte	.LFE284-.LFB284
-	.8byte	.LFB288
-	.8byte	.LFE288-.LFB288
-	.8byte	.LFB270
-	.8byte	.LFE270-.LFB270
-	.8byte	.LFB289
-	.8byte	.LFE289-.LFB289
-	.8byte	.LFB290
-	.8byte	.LFE290-.LFB290
-	.8byte	.LFB291
-	.8byte	.LFE291-.LFB291
-	.8byte	.LFB280
-	.8byte	.LFE280-.LFB280
-	.8byte	.LFB275
-	.8byte	.LFE275-.LFB275
-	.8byte	.LFB279
-	.8byte	.LFE279-.LFB279
-	.8byte	.LFB283
-	.8byte	.LFE283-.LFB283
-	.8byte	.LFB276
-	.8byte	.LFE276-.LFB276
-	.8byte	.LFB278
-	.8byte	.LFE278-.LFB278
-	.8byte	0
-	.8byte	0
-	.section	.debug_ranges,"",@progbits
-.Ldebug_ranges0:
-	.8byte	.LBB62
-	.8byte	.LBE62
-	.8byte	.LBB63
-	.8byte	.LBE63
-	.8byte	0
-	.8byte	0
-	.8byte	.LBB78
-	.8byte	.LBE78
-	.8byte	.LBB80
-	.8byte	.LBE80
-	.8byte	0
-	.8byte	0
-	.8byte	.LBB79
-	.8byte	.LBE79
-	.8byte	.LBB81
-	.8byte	.LBE81
-	.8byte	0
-	.8byte	0
-	.8byte	.LBB82
-	.8byte	.LBE82
-	.8byte	.LBB83
-	.8byte	.LBE83
-	.8byte	0
-	.8byte	0
-	.8byte	.LBB87
-	.8byte	.LBE87
-	.8byte	.LBB88
-	.8byte	.LBE88
-	.8byte	0
-	.8byte	0
-	.8byte	.LBB106
-	.8byte	.LBE106
-	.8byte	.LBB107
-	.8byte	.LBE107
-	.8byte	0
-	.8byte	0
-	.8byte	.LBB112
-	.8byte	.LBE112
-	.8byte	.LBB113
-	.8byte	.LBE113
-	.8byte	0
-	.8byte	0
-	.8byte	.LBB117
-	.8byte	.LBE117
-	.8byte	.LBB119
-	.8byte	.LBE119
-	.8byte	0
-	.8byte	0
-	.8byte	.LBB118
-	.8byte	.LBE118
-	.8byte	.LBB120
-	.8byte	.LBE120
-	.8byte	0
-	.8byte	0
-	.8byte	.LBB121
-	.8byte	.LBE121
-	.8byte	.LBB122
-	.8byte	.LBE122
-	.8byte	0
-	.8byte	0
-	.8byte	.LBB126
-	.8byte	.LBE126
-	.8byte	.LBB127
-	.8byte	.LBE127
+	.section	.debug_aranges,"",@progbits
+	.4byte	0xec
+	.2byte	0x2
+	.4byte	.Ldebug_info0
+	.byte	0x8
+	.byte	0
+	.2byte	0
+	.2byte	0
+	.8byte	.LFB263
+	.8byte	.LFE263-.LFB263
+	.8byte	.LFB276
+	.8byte	.LFE276-.LFB276
+	.8byte	.LFB274
+	.8byte	.LFE274-.LFB274
+	.8byte	.LFB273
+	.8byte	.LFE273-.LFB273
+	.8byte	.LFB277
+	.8byte	.LFE277-.LFB277
+	.8byte	.LFB262
+	.8byte	.LFE262-.LFB262
+	.8byte	.LFB278
+	.8byte	.LFE278-.LFB278
+	.8byte	.LFB279
+	.8byte	.LFE279-.LFB279
+	.8byte	.LFB280
+	.8byte	.LFE280-.LFB280
+	.8byte	.LFB269
+	.8byte	.LFE269-.LFB269
+	.8byte	.LFB267
+	.8byte	.LFE267-.LFB267
+	.8byte	.LFB268
+	.8byte	.LFE268-.LFB268
+	.8byte	.LFB272
+	.8byte	.LFE272-.LFB272
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB132
-	.8byte	.LBE132
-	.8byte	.LBB133
-	.8byte	.LBE133
+	.section	.debug_ranges,"",@progbits
+.Ldebug_ranges0:
+	.8byte	.LBB44
+	.8byte	.LBE44
+	.8byte	.LBB45
+	.8byte	.LBE45
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB137
-	.8byte	.LBE137
-	.8byte	.LBB138
-	.8byte	.LBE138
+	.8byte	.LBB60
+	.8byte	.LBE60
+	.8byte	.LBB62
+	.8byte	.LBE62
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB142
-	.8byte	.LBE142
-	.8byte	.LBB143
-	.8byte	.LBE143
+	.8byte	.LBB61
+	.8byte	.LBE61
+	.8byte	.LBB63
+	.8byte	.LBE63
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB149
-	.8byte	.LBE149
-	.8byte	.LBB150
-	.8byte	.LBE150
+	.8byte	.LBB64
+	.8byte	.LBE64
+	.8byte	.LBB65
+	.8byte	.LBE65
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB154
-	.8byte	.LBE154
-	.8byte	.LBB155
-	.8byte	.LBE155
+	.8byte	.LBB69
+	.8byte	.LBE69
+	.8byte	.LBB70
+	.8byte	.LBE70
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB158
-	.8byte	.LBE158
-	.8byte	.LBB159
-	.8byte	.LBE159
+	.8byte	.LBB88
+	.8byte	.LBE88
+	.8byte	.LBB89
+	.8byte	.LBE89
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB182
-	.8byte	.LBE182
-	.8byte	.LBB183
-	.8byte	.LBE183
+	.8byte	.LBB94
+	.8byte	.LBE94
+	.8byte	.LBB95
+	.8byte	.LBE95
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB184
-	.8byte	.LBE184
-	.8byte	.LBB185
-	.8byte	.LBE185
+	.8byte	.LBB99
+	.8byte	.LBE99
+	.8byte	.LBB101
+	.8byte	.LBE101
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB186
-	.8byte	.LBE186
-	.8byte	.LBB187
-	.8byte	.LBE187
+	.8byte	.LBB100
+	.8byte	.LBE100
+	.8byte	.LBB102
+	.8byte	.LBE102
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB188
-	.8byte	.LBE188
-	.8byte	.LBB189
-	.8byte	.LBE189
+	.8byte	.LBB103
+	.8byte	.LBE103
+	.8byte	.LBB104
+	.8byte	.LBE104
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB258
-	.8byte	.LBE258
-	.8byte	.LBB346
-	.8byte	.LBE346
-	.8byte	.LBB347
-	.8byte	.LBE347
-	.8byte	.LBB348
-	.8byte	.LBE348
+	.8byte	.LBB108
+	.8byte	.LBE108
+	.8byte	.LBB109
+	.8byte	.LBE109
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB263
-	.8byte	.LBE263
-	.8byte	.LBB344
-	.8byte	.LBE344
-	.8byte	.LBB345
-	.8byte	.LBE345
-	.8byte	.LBB349
-	.8byte	.LBE349
-	.8byte	.LBB350
-	.8byte	.LBE350
+	.8byte	.LBB114
+	.8byte	.LBE114
+	.8byte	.LBB115
+	.8byte	.LBE115
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB283
-	.8byte	.LBE283
-	.8byte	.LBB285
-	.8byte	.LBE285
+	.8byte	.LBB119
+	.8byte	.LBE119
+	.8byte	.LBB120
+	.8byte	.LBE120
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB284
-	.8byte	.LBE284
-	.8byte	.LBB286
-	.8byte	.LBE286
+	.8byte	.LBB124
+	.8byte	.LBE124
+	.8byte	.LBB125
+	.8byte	.LBE125
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB287
-	.8byte	.LBE287
-	.8byte	.LBB288
-	.8byte	.LBE288
+	.8byte	.LBB131
+	.8byte	.LBE131
+	.8byte	.LBB132
+	.8byte	.LBE132
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB289
-	.8byte	.LBE289
-	.8byte	.LBB290
-	.8byte	.LBE290
+	.8byte	.LBB136
+	.8byte	.LBE136
+	.8byte	.LBB137
+	.8byte	.LBE137
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB307
-	.8byte	.LBE307
-	.8byte	.LBB308
-	.8byte	.LBE308
+	.8byte	.LBB140
+	.8byte	.LBE140
+	.8byte	.LBB141
+	.8byte	.LBE141
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB313
-	.8byte	.LBE313
-	.8byte	.LBB314
-	.8byte	.LBE314
+	.8byte	.LBB164
+	.8byte	.LBE164
+	.8byte	.LBB165
+	.8byte	.LBE165
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB317
-	.8byte	.LBE317
-	.8byte	.LBB319
-	.8byte	.LBE319
+	.8byte	.LBB166
+	.8byte	.LBE166
+	.8byte	.LBB167
+	.8byte	.LBE167
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB318
-	.8byte	.LBE318
-	.8byte	.LBB320
-	.8byte	.LBE320
+	.8byte	.LBB168
+	.8byte	.LBE168
+	.8byte	.LBB169
+	.8byte	.LBE169
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB321
-	.8byte	.LBE321
-	.8byte	.LBB322
-	.8byte	.LBE322
+	.8byte	.LBB170
+	.8byte	.LBE170
+	.8byte	.LBB171
+	.8byte	.LBE171
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB327
-	.8byte	.LBE327
+	.8byte	.LBB240
+	.8byte	.LBE240
 	.8byte	.LBB328
 	.8byte	.LBE328
+	.8byte	.LBB329
+	.8byte	.LBE329
+	.8byte	.LBB330
+	.8byte	.LBE330
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB333
-	.8byte	.LBE333
-	.8byte	.LBB334
-	.8byte	.LBE334
-	.8byte	0
-	.8byte	0
-	.8byte	.LBB338
-	.8byte	.LBE338
-	.8byte	.LBB339
-	.8byte	.LBE339
+	.8byte	.LBB245
+	.8byte	.LBE245
+	.8byte	.LBB326
+	.8byte	.LBE326
+	.8byte	.LBB327
+	.8byte	.LBE327
+	.8byte	.LBB331
+	.8byte	.LBE331
+	.8byte	.LBB332
+	.8byte	.LBE332
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB351
-	.8byte	.LBE351
-	.8byte	.LBB352
-	.8byte	.LBE352
+	.8byte	.LBB265
+	.8byte	.LBE265
+	.8byte	.LBB267
+	.8byte	.LBE267
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB354
-	.8byte	.LBE354
-	.8byte	.LBB355
-	.8byte	.LBE355
+	.8byte	.LBB266
+	.8byte	.LBE266
+	.8byte	.LBB268
+	.8byte	.LBE268
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB356
-	.8byte	.LBE356
-	.8byte	.LBB357
-	.8byte	.LBE357
+	.8byte	.LBB269
+	.8byte	.LBE269
+	.8byte	.LBB270
+	.8byte	.LBE270
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB420
-	.8byte	.LBE420
-	.8byte	.LBB493
-	.8byte	.LBE493
-	.8byte	.LBB494
-	.8byte	.LBE494
-	.8byte	.LBB495
-	.8byte	.LBE495
-	.8byte	.LBB496
-	.8byte	.LBE496
+	.8byte	.LBB271
+	.8byte	.LBE271
+	.8byte	.LBB272
+	.8byte	.LBE272
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB441
-	.8byte	.LBE441
-	.8byte	.LBB442
-	.8byte	.LBE442
+	.8byte	.LBB289
+	.8byte	.LBE289
+	.8byte	.LBB290
+	.8byte	.LBE290
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB443
-	.8byte	.LBE443
-	.8byte	.LBB444
-	.8byte	.LBE444
+	.8byte	.LBB295
+	.8byte	.LBE295
+	.8byte	.LBB296
+	.8byte	.LBE296
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB461
-	.8byte	.LBE461
-	.8byte	.LBB462
-	.8byte	.LBE462
+	.8byte	.LBB299
+	.8byte	.LBE299
+	.8byte	.LBB301
+	.8byte	.LBE301
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB467
-	.8byte	.LBE467
-	.8byte	.LBB468
-	.8byte	.LBE468
+	.8byte	.LBB300
+	.8byte	.LBE300
+	.8byte	.LBB302
+	.8byte	.LBE302
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB471
-	.8byte	.LBE471
-	.8byte	.LBB472
-	.8byte	.LBE472
+	.8byte	.LBB303
+	.8byte	.LBE303
+	.8byte	.LBB304
+	.8byte	.LBE304
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB476
-	.8byte	.LBE476
-	.8byte	.LBB477
-	.8byte	.LBE477
+	.8byte	.LBB309
+	.8byte	.LBE309
+	.8byte	.LBB310
+	.8byte	.LBE310
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB482
-	.8byte	.LBE482
-	.8byte	.LBB483
-	.8byte	.LBE483
+	.8byte	.LBB315
+	.8byte	.LBE315
+	.8byte	.LBB316
+	.8byte	.LBE316
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB487
-	.8byte	.LBE487
-	.8byte	.LBB488
-	.8byte	.LBE488
+	.8byte	.LBB320
+	.8byte	.LBE320
+	.8byte	.LBB321
+	.8byte	.LBE321
 	.8byte	0
 	.8byte	0
-	.8byte	.LFB264
-	.8byte	.LFE264
-	.8byte	.LFB265
-	.8byte	.LFE265
-	.8byte	.LFB266
-	.8byte	.LFE266
-	.8byte	.LFB267
-	.8byte	.LFE267
-	.8byte	.LFB268
-	.8byte	.LFE268
-	.8byte	.LFB269
-	.8byte	.LFE269
-	.8byte	.LFB271
-	.8byte	.LFE271
-	.8byte	.LFB287
-	.8byte	.LFE287
-	.8byte	.LFB285
-	.8byte	.LFE285
-	.8byte	.LFB284
-	.8byte	.LFE284
-	.8byte	.LFB288
-	.8byte	.LFE288
-	.8byte	.LFB270
-	.8byte	.LFE270
-	.8byte	.LFB289
-	.8byte	.LFE289
-	.8byte	.LFB290
-	.8byte	.LFE290
-	.8byte	.LFB291
-	.8byte	.LFE291
-	.8byte	.LFB280
-	.8byte	.LFE280
-	.8byte	.LFB275
-	.8byte	.LFE275
-	.8byte	.LFB279
-	.8byte	.LFE279
-	.8byte	.LFB283
-	.8byte	.LFE283
+	.8byte	.LFB263
+	.8byte	.LFE263
 	.8byte	.LFB276
 	.8byte	.LFE276
+	.8byte	.LFB274
+	.8byte	.LFE274
+	.8byte	.LFB273
+	.8byte	.LFE273
+	.8byte	.LFB277
+	.8byte	.LFE277
+	.8byte	.LFB262
+	.8byte	.LFE262
 	.8byte	.LFB278
 	.8byte	.LFE278
+	.8byte	.LFB279
+	.8byte	.LFE279
+	.8byte	.LFB280
+	.8byte	.LFE280
+	.8byte	.LFB269
+	.8byte	.LFE269
+	.8byte	.LFB267
+	.8byte	.LFE267
+	.8byte	.LFB268
+	.8byte	.LFE268
+	.8byte	.LFB272
+	.8byte	.LFE272
 	.8byte	0
 	.8byte	0
 	.section	.debug_line,"",@progbits
@@ -19095,95 +14318,93 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.section	.debug_str,"MS",@progbits,1
 .LASF30:
 	.string	"parent_platdata"
-.LASF460:
+.LASF443:
 	.string	"otp_cru_rst"
 .LASF100:
 	.string	"off_mem_rsvmap"
-.LASF186:
+.LASF183:
 	.string	"UCLASS_I2C_EEPROM"
-.LASF316:
+.LASF315:
 	.string	"jt_funcs"
-.LASF191:
+.LASF188:
 	.string	"UCLASS_IRQ"
 .LASF150:
 	.string	"initrd_start"
-.LASF185:
+.LASF182:
 	.string	"UCLASS_I2C"
 .LASF13:
 	.string	"sizetype"
-.LASF341:
+.LASF329:
 	.string	"net_hostname"
-.LASF336:
-	.string	"push_packet"
 .LASF54:
 	.string	"start"
-.LASF225:
+.LASF223:
 	.string	"UCLASS_SPI"
-.LASF313:
+.LASF312:
 	.string	"child"
-.LASF189:
+.LASF186:
 	.string	"UCLASS_I2S"
-.LASF363:
+.LASF351:
 	.string	"NETLOOP_RESTART"
-.LASF435:
+.LASF421:
 	.string	"otp_data"
-.LASF187:
+.LASF184:
 	.string	"UCLASS_I2C_GENERIC"
-.LASF199:
+.LASF196:
 	.string	"UCLASS_MOD_EXP"
-.LASF248:
+.LASF246:
 	.string	"UCLASS_IO_DOMAIN"
-.LASF266:
+.LASF265:
 	.string	"using_pre_serial"
 .LASF37:
 	.string	"uclass_priv"
-.LASF220:
+.LASF217:
 	.string	"UCLASS_RKNAND"
-.LASF162:
+.LASF159:
 	.string	"UCLASS_DEMO"
-.LASF409:
+.LASF398:
 	.string	"OTP_S"
 .LASF108:
 	.string	"ih_magic"
 .LASF46:
 	.string	"list_head"
-.LASF374:
+.LASF362:
 	.string	"child_pre_probe"
-.LASF430:
+.LASF416:
 	.string	"rockchip_secure_otp_ofdata_to_platdata"
-.LASF305:
+.LASF304:
 	.string	"pm_ctx_phys"
-.LASF166:
+.LASF163:
 	.string	"UCLASS_TEST_PROBE"
-.LASF311:
+.LASF310:
 	.string	"full_name"
-.LASF244:
+.LASF242:
 	.string	"UCLASS_KEY"
 .LASF80:
 	.string	"bi_intfreq"
-.LASF442:
+.LASF428:
 	.string	"__func__"
 .LASF11:
 	.string	"phys_addr_t"
-.LASF413:
+.LASF402:
 	.string	"write"
-.LASF239:
+.LASF237:
 	.string	"UCLASS_VIDEO_BRIDGE"
-.LASF304:
+.LASF303:
 	.string	"video_bottom"
 .LASF5:
 	.string	"__u8"
-.LASF362:
+.LASF350:
 	.string	"NETLOOP_CONTINUE"
-.LASF228:
+.LASF226:
 	.string	"UCLASS_SPI_GENERIC"
-.LASF299:
+.LASF298:
 	.string	"malloc_base"
-.LASF471:
+.LASF448:
 	.string	"dev_read_addr_ptr"
 .LASF56:
 	.string	"flash_info_t"
-.LASF204:
+.LASF201:
 	.string	"UCLASS_PANEL"
 .LASF125:
 	.string	"comp"
@@ -19191,111 +14412,111 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"image_header_t"
 .LASF155:
 	.string	"state"
-.LASF179:
+.LASF176:
 	.string	"UCLASS_CROS_EC"
 .LASF74:
 	.string	"bi_dsp_freq"
-.LASF428:
+.LASF414:
 	.string	"rockchip_otp_ids"
 .LASF122:
 	.string	"image_start"
-.LASF164:
+.LASF161:
 	.string	"UCLASS_TEST_FDT"
 .LASF65:
 	.string	"bd_info"
-.LASF360:
+.LASF348:
 	.string	"uclass_id"
 .LASF112:
 	.string	"ih_load"
-.LASF407:
+.LASF396:
 	.string	"DECOM_GZIP"
-.LASF320:
+.LASF319:
 	.string	"__dtb_dt_spl_begin"
-.LASF400:
+.LASF388:
 	.string	"pre_remove"
-.LASF455:
+.LASF438:
 	.string	"delay"
-.LASF436:
+.LASF422:
 	.string	"secure_otp_read"
 .LASF7:
 	.string	"__u32"
 .LASF35:
 	.string	"priv"
-.LASF302:
+.LASF301:
 	.string	"cur_serial_dev"
-.LASF347:
+.LASF335:
 	.string	"net_tx_packet"
-.LASF243:
+.LASF241:
 	.string	"UCLASS_FG"
-.LASF346:
+.LASF334:
 	.string	"net_server_ip"
-.LASF480:
+.LASF457:
 	.string	"ofnode_union"
-.LASF354:
+.LASF342:
 	.string	"net_native_vlan"
-.LASF241:
+.LASF239:
 	.string	"UCLASS_VIDEO_CRTC"
-.LASF178:
+.LASF175:
 	.string	"UCLASS_CODEC"
-.LASF296:
+.LASF295:
 	.string	"env_buf"
-.LASF451:
-	.string	"rockchip_secure_otp_write_byte"
 .LASF21:
 	.string	"errno"
 .LASF15:
 	.string	"long int"
-.LASF404:
+.LASF393:
 	.string	"__invalid_size_argument_for_IOC"
 .LASF69:
 	.string	"bi_flashsize"
+.LASF72:
+	.string	"bi_sramsize"
 .LASF29:
 	.string	"platdata"
-.LASF209:
+.LASF206:
 	.string	"UCLASS_PHY"
-.LASF427:
+.LASF413:
 	.string	"rk3568_data"
-.LASF433:
+.LASF419:
 	.string	"secure_otp_write"
 .LASF93:
 	.string	"IRQ_STACK_START_IN"
 .LASF104:
 	.string	"size_dt_strings"
-.LASF238:
+.LASF236:
 	.string	"UCLASS_VIDEO"
-.LASF280:
+.LASF279:
 	.string	"relocaddr"
-.LASF391:
+.LASF379:
 	.string	"dev_head"
-.LASF479:
-	.string	"/home/zzz/code/u-boot"
-.LASF357:
+.LASF403:
+	.string	"ioctl"
+.LASF345:
 	.string	"net_boot_file_size"
 .LASF114:
 	.string	"ih_dcrc"
 .LASF79:
 	.string	"bi_ethspeed"
-.LASF161:
+.LASF158:
 	.string	"UCLASS_ROOT"
 .LASF44:
 	.string	"ide_bus_offset"
-.LASF344:
+.LASF332:
 	.string	"net_server_ethaddr"
 .LASF82:
 	.string	"bi_arch_number"
 .LASF3:
 	.string	"signed char"
-.LASF192:
+.LASF189:
 	.string	"UCLASS_KEYBOARD"
 .LASF18:
 	.string	"uint8_t"
-.LASF429:
+.LASF415:
 	.string	"_u_boot_list_2_driver_2_rockchip_secure_otp"
-.LASF379:
+.LASF367:
 	.string	"per_child_platdata_auto_alloc_size"
 .LASF45:
 	.string	"udevice"
-.LASF476:
+.LASF453:
 	.string	"udelay"
 .LASF116:
 	.string	"ih_arch"
@@ -19303,15 +14524,13 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"totalsize"
 .LASF109:
 	.string	"ih_hcrc"
-.LASF282:
+.LASF281:
 	.string	"mon_len"
-.LASF415:
+.LASF404:
 	.string	"call"
-.LASF452:
-	.string	"rockchip_secure_otp_read"
 .LASF124:
 	.string	"load"
-.LASF233:
+.LASF231:
 	.string	"UCLASS_TPM"
 .LASF59:
 	.string	"lmb_property"
@@ -19321,79 +14540,77 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"unsigned char"
 .LASF84:
 	.string	"bi_andr_version"
-.LASF158:
+.LASF157:
 	.string	"images"
-.LASF247:
+.LASF245:
 	.string	"UCLASS_DVFS"
 .LASF75:
 	.string	"bi_ddr_freq"
-.LASF193:
+.LASF190:
 	.string	"UCLASS_LED"
 .LASF111:
 	.string	"ih_size"
 .LASF39:
 	.string	"uclass_node"
-.LASF416:
+.LASF220:
+	.string	"UCLASS_SCMI_AGENT"
+.LASF405:
 	.string	"rockchip_otp_platdata"
-.LASF251:
+.LASF249:
 	.string	"UCLASS_MDIO"
 .LASF23:
 	.string	"_Bool"
-.LASF380:
+.LASF368:
 	.string	"property"
-.LASF440:
+.LASF426:
 	.string	"rockchip_secure_otp_capability"
-.LASF366:
+.LASF354:
 	.string	"net_state"
-.LASF382:
+.LASF370:
 	.string	"value"
-.LASF425:
-	.string	"rk3308_data"
-.LASF454:
+.LASF437:
 	.string	"rockchip_secure_otp_check_flag"
-.LASF188:
+.LASF185:
 	.string	"UCLASS_I2C_MUX"
 .LASF14:
 	.string	"char"
 .LASF25:
 	.string	"_binary_u_boot_bin_start"
-.LASF237:
+.LASF235:
 	.string	"UCLASS_USB_GADGET_GENERIC"
-.LASF364:
+.LASF352:
 	.string	"NETLOOP_SUCCESS"
 .LASF36:
 	.string	"uclass"
-.LASF388:
+.LASF376:
 	.string	"p_current"
-.LASF390:
+.LASF378:
 	.string	"uc_drv"
-.LASF361:
+.LASF349:
 	.string	"net_loop_state"
 .LASF43:
 	.string	"req_seq"
-.LASF314:
+.LASF313:
 	.string	"sibling"
-.LASF288:
+.LASF287:
 	.string	"dm_root_f"
-.LASF327:
-	.string	"enetaddr"
-.LASF177:
+.LASF174:
 	.string	"UCLASS_AMP"
-.LASF215:
+.LASF212:
 	.string	"UCLASS_PWRSEQ"
-.LASF383:
+.LASF371:
 	.string	"of_offset"
 .LASF140:
 	.string	"fit_hdr_fdt"
-.LASF355:
-	.string	"net_restart_wrap"
 .LASF343:
+	.string	"net_restart_wrap"
+.LASF331:
 	.string	"net_ethaddr"
 .LASF42:
 	.string	"flags"
-.LASF444:
+.LASF430:
 	.string	"data_2b"
-.LASF475:
+.LASF452:
 	.string	"malloc_simple"
 .LASF117:
 	.string	"ih_type"
@@ -19401,23 +14618,21 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"off_dt_struct"
 .LASF70:
 	.string	"bi_flashoffset"
-.LASF356:
+.LASF344:
 	.string	"net_boot_file_name"
-.LASF393:
+.LASF381:
 	.string	"compatible"
-.LASF163:
+.LASF160:
 	.string	"UCLASS_TEST"
 .LASF110:
 	.string	"ih_time"
-.LASF275:
+.LASF274:
 	.string	"fb_base"
-.LASF272:
+.LASF271:
 	.string	"bus_clk"
-.LASF216:
+.LASF213:
 	.string	"UCLASS_RAM"
-.LASF466:
-	.string	"rk3308_spl_rockchip_otp_stop"
-.LASF182:
+.LASF179:
 	.string	"UCLASS_ETH"
 .LASF32:
 	.string	"node"
@@ -19425,23 +14640,19 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"image_info"
 .LASF127:
 	.string	"arch"
-.LASF274:
-	.string	"mem_clk"
 .LASF273:
-	.string	"pci_clk"
-.LASF439:
+	.string	"mem_clk"
+.LASF425:
 	.string	"temp"
-.LASF467:
-	.string	"rk3308_spl_rockchip_otp_start"
-.LASF271:
+.LASF270:
 	.string	"cpu_clk"
 .LASF50:
 	.string	"select_hwpart"
-.LASF348:
+.LASF336:
 	.string	"net_rx_packets"
-.LASF385:
+.LASF373:
 	.string	"mem_malloc_start"
-.LASF456:
+.LASF439:
 	.string	"rockchip_secure_otp_wait_flag"
 .LASF92:
 	.string	"_datarelro_start_ofs"
@@ -19451,321 +14662,299 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"ih_ep"
 .LASF61:
 	.string	"lmb_region"
-.LASF398:
+.LASF386:
 	.string	"pre_probe"
-.LASF474:
+.LASF451:
 	.string	"printf"
-.LASF408:
+.LASF397:
 	.string	"DECOM_ZLIB"
 .LASF135:
 	.string	"fit_uname_os"
 .LASF76:
 	.string	"bi_bootflags"
-.LASF345:
+.LASF333:
 	.string	"net_ip"
-.LASF457:
+.LASF440:
 	.string	"rockchip_secure_otp_wait_status"
-.LASF294:
+.LASF293:
 	.string	"fdt_size"
-.LASF339:
+.LASF327:
 	.string	"net_dns_server"
-.LASF426:
-	.string	"rk3328_data"
-.LASF359:
+.LASF347:
 	.string	"net_ping_ip"
 .LASF63:
 	.string	"memory"
 .LASF95:
 	.string	"fdt_header"
-.LASF437:
+.LASF423:
 	.string	"rk3568_secure_otp_write"
-.LASF386:
+.LASF374:
 	.string	"mem_malloc_end"
-.LASF195:
+.LASF192:
 	.string	"UCLASS_MAILBOX"
 .LASF147:
 	.string	"rd_end"
-.LASF368:
+.LASF356:
 	.string	"bind"
-.LASF283:
+.LASF282:
 	.string	"irq_sp"
 .LASF152:
 	.string	"cmdline_start"
-.LASF334:
-	.string	"index"
-.LASF270:
+.LASF269:
 	.string	"global_data"
-.LASF402:
+.LASF391:
 	.string	"per_device_auto_alloc_size"
-.LASF441:
+.LASF427:
 	.string	"rk3568_secure_otp_write_2_bytes"
-.LASF223:
+.LASF456:
+	.string	"/home2/chenp/work/u-boot"
+.LASF221:
 	.string	"UCLASS_SCSI"
-.LASF235:
+.LASF233:
 	.string	"UCLASS_USB_DEV_GENERIC"
-.LASF196:
+.LASF193:
 	.string	"UCLASS_MASS_STORAGE"
 .LASF1:
 	.string	"long unsigned int"
-.LASF171:
+.LASF168:
 	.string	"UCLASS_SIMPLE_BUS"
-.LASF317:
+.LASF316:
 	.string	"gd_t"
-.LASF340:
+.LASF328:
 	.string	"net_nis_domain"
 .LASF142:
 	.string	"fit_noffset_fdt"
-.LASF465:
-	.string	"rk3328_spl_rockchip_otp_start"
-.LASF423:
+.LASF412:
 	.string	"rockchip_secure_otp_ops"
-.LASF365:
+.LASF353:
 	.string	"NETLOOP_FAIL"
-.LASF242:
+.LASF240:
 	.string	"UCLASS_WDT"
-.LASF260:
+.LASF259:
 	.string	"timer_reset_value"
-.LASF284:
+.LASF283:
 	.string	"start_addr_sp"
 .LASF71:
 	.string	"bi_sramstart"
 .LASF26:
 	.string	"_binary_u_boot_bin_end"
-.LASF424:
-	.string	"px30_data"
-.LASF285:
+.LASF284:
 	.string	"reloc_off"
 .LASF103:
 	.string	"boot_cpuid_phys"
-.LASF259:
+.LASF258:
 	.string	"lastinc"
-.LASF263:
+.LASF262:
 	.string	"tlb_fillptr"
 .LASF138:
 	.string	"fit_uname_rd"
-.LASF229:
+.LASF227:
 	.string	"UCLASS_SYSCON"
-.LASF176:
+.LASF173:
 	.string	"UCLASS_CPU"
 .LASF133:
 	.string	"fit_uname_cfg"
-.LASF224:
+.LASF222:
 	.string	"UCLASS_SERIAL"
-.LASF353:
+.LASF341:
 	.string	"net_our_vlan"
-.LASF306:
+.LASF305:
 	.string	"serial"
-.LASF464:
-	.string	"rk3328_spl_rockchip_otp_stop"
-.LASF369:
+.LASF357:
 	.string	"probe"
-.LASF174:
+.LASF171:
 	.string	"UCLASS_BLK"
 .LASF128:
 	.string	"image_info_t"
-.LASF170:
+.LASF167:
 	.string	"UCLASS_USB_EMUL"
-.LASF261:
+.LASF260:
 	.string	"tlb_addr"
-.LASF208:
+.LASF205:
 	.string	"UCLASS_PCI_GENERIC"
 .LASF123:
 	.string	"image_len"
 .LASF77:
 	.string	"bi_ip_addr"
-.LASF210:
+.LASF207:
 	.string	"UCLASS_PINCONFIG"
-.LASF330:
-	.string	"send"
-.LASF231:
+.LASF229:
 	.string	"UCLASS_THERMAL"
 .LASF131:
 	.string	"legacy_hdr_os_copy"
-.LASF160:
-	.string	"sha256_der_prefix"
 .LASF9:
 	.string	"long long int"
-.LASF405:
+.LASF394:
 	.string	"misc_mode"
-.LASF293:
+.LASF292:
 	.string	"new_fdt"
 .LASF22:
 	.string	"___strtok"
-.LASF358:
+.LASF346:
 	.string	"net_boot_file_expected_size_in_blocks"
-.LASF267:
+.LASF266:
 	.string	"enable"
-.LASF367:
+.LASF355:
 	.string	"of_match"
-.LASF203:
+.LASF200:
 	.string	"UCLASS_NVME"
-.LASF264:
+.LASF263:
 	.string	"tlb_emerg"
 .LASF129:
 	.string	"bootm_headers"
 .LASF55:
 	.string	"protect"
-.LASF234:
+.LASF232:
 	.string	"UCLASS_USB"
-.LASF395:
+.LASF383:
 	.string	"uclass_driver"
-.LASF245:
+.LASF243:
 	.string	"UCLASS_RC"
-.LASF297:
+.LASF296:
 	.string	"timebase_h"
-.LASF298:
+.LASF297:
 	.string	"timebase_l"
-.LASF180:
+.LASF177:
 	.string	"UCLASS_DISPLAY"
-.LASF352:
+.LASF340:
 	.string	"net_null_ethaddr"
-.LASF278:
+.LASF277:
 	.string	"env_valid"
 .LASF34:
 	.string	"parent"
-.LASF169:
+.LASF166:
 	.string	"UCLASS_PCI_EMUL"
 .LASF89:
 	.string	"_datarel_start_ofs"
 .LASF38:
 	.string	"parent_priv"
-.LASF410:
+.LASF399:
 	.string	"OTP_NS"
-.LASF246:
+.LASF244:
 	.string	"UCLASS_CHARGE_DISPLAY"
-.LASF321:
+.LASF320:
 	.string	"load_addr"
 .LASF134:
 	.string	"fit_hdr_os"
 .LASF90:
 	.string	"_datarelrolocal_start_ofs"
-.LASF473:
+.LASF450:
 	.string	"dev_get_driver_data"
-.LASF422:
+.LASF411:
 	.string	"spl_rockchip_otp_stop"
-.LASF269:
+.LASF268:
 	.string	"addr"
-.LASF469:
-	.string	"px30_spl_rockchip_otp_start"
-.LASF412:
+.LASF401:
 	.string	"read"
-.LASF461:
+.LASF444:
 	.string	"mask"
-.LASF446:
+.LASF432:
 	.string	"rk3568_secure_otp_read"
 .LASF8:
 	.string	"unsigned int"
 .LASF16:
-	.string	"ushort"
-.LASF326:
-	.string	"eth_device"
-.LASF414:
-	.string	"ioctl"
-.LASF472:
+	.string	"ushort"
+.LASF449:
 	.string	"dev_read_u32_default"
-.LASF292:
+.LASF291:
 	.string	"ufdt_blob"
-.LASF376:
+.LASF364:
 	.string	"priv_auto_alloc_size"
-.LASF300:
+.LASF299:
 	.string	"malloc_limit"
-.LASF212:
+.LASF209:
 	.string	"UCLASS_PMIC"
-.LASF459:
+.LASF442:
 	.string	"secure_conf"
 .LASF130:
 	.string	"legacy_hdr_os"
 .LASF99:
 	.string	"off_dt_strings"
-.LASF318:
+.LASF317:
 	.string	"monitor_flash_len"
-.LASF197:
+.LASF194:
 	.string	"UCLASS_MISC"
 .LASF67:
 	.string	"bi_memsize"
-.LASF458:
+.LASF441:
 	.string	"flag"
-.LASF443:
+.LASF429:
 	.string	"rk3568_secure_otp_write_byte_noecc"
 .LASF24:
 	.string	"image_base"
-.LASF230:
+.LASF228:
 	.string	"UCLASS_SYSRESET"
-.LASF389:
+.LASF377:
 	.string	"current"
-.LASF184:
+.LASF181:
 	.string	"UCLASS_FIRMWARE"
-.LASF194:
+.LASF191:
 	.string	"UCLASS_LPC"
-.LASF434:
+.LASF420:
 	.string	"offset"
-.LASF190:
+.LASF187:
 	.string	"UCLASS_IDE"
-.LASF411:
+.LASF400:
 	.string	"misc_ops"
-.LASF310:
+.LASF309:
 	.string	"phandle"
-.LASF303:
+.LASF302:
 	.string	"video_top"
-.LASF403:
+.LASF392:
 	.string	"per_device_platdata_auto_alloc_size"
-.LASF157:
+.LASF156:
 	.string	"bootm_headers_t"
 .LASF73:
 	.string	"bi_arm_freq"
-.LASF218:
+.LASF215:
 	.string	"UCLASS_REMOTEPROC"
-.LASF331:
-	.string	"recv"
 .LASF126:
 	.string	"type"
 .LASF137:
 	.string	"fit_hdr_rd"
-.LASF277:
+.LASF276:
 	.string	"env_addr"
-.LASF72:
-	.string	"bi_sramsize"
-.LASF289:
+.LASF455:
+	.string	"drivers/misc/rk3568-secure-otp.c"
+.LASF288:
 	.string	"uclass_root"
-.LASF183:
+.LASF180:
 	.string	"UCLASS_GPIO"
-.LASF419:
+.LASF408:
 	.string	"otp_cru_rst_base"
-.LASF449:
+.LASF435:
 	.string	"read_end"
-.LASF213:
+.LASF210:
 	.string	"UCLASS_PWM"
 .LASF58:
 	.string	"long double"
-.LASF279:
+.LASF278:
 	.string	"ram_top"
-.LASF308:
+.LASF307:
 	.string	"console_evt"
 .LASF146:
 	.string	"rd_start"
-.LASF448:
+.LASF434:
 	.string	"write_end"
-.LASF214:
+.LASF211:
 	.string	"UCLASS_POWER_DOMAIN"
-.LASF217:
+.LASF214:
 	.string	"UCLASS_REGULATOR"
-.LASF323:
+.LASF322:
 	.string	"save_size"
-.LASF175:
+.LASF172:
 	.string	"UCLASS_CLK"
 .LASF31:
 	.string	"uclass_platdata"
-.LASF470:
+.LASF447:
 	.string	"dev_get_platdata"
-.LASF328:
-	.string	"iobase"
-.LASF462:
+.LASF445:
 	.string	"rk3568_spl_rockchip_otp_stop"
-.LASF463:
+.LASF446:
 	.string	"rk3568_spl_rockchip_otp_start"
-.LASF265:
+.LASF264:
 	.string	"pre_serial"
-.LASF477:
+.LASF454:
 	.ascii	"GNU C11 6.3.1 201"
 	.string	"70404 -mstrict-align -march=armv8-a+nosimd -mlittle-endian -mabi=lp64 -g -Os -fno-builtin -ffreestanding -fshort-wchar -fno-stack-protector -fno-delete-null-pointer-checks -fstack-usage -ffunction-sections -fdata-sections -ffixed-r9 -fno-common -ffixed-x18"
 .LASF119:
@@ -19774,23 +14963,23 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"ih_os"
 .LASF153:
 	.string	"cmdline_end"
-.LASF349:
+.LASF337:
 	.string	"net_rx_packet"
-.LASF256:
+.LASF255:
 	.string	"LOGF_MAX_CATEGORIES"
-.LASF291:
+.LASF290:
 	.string	"fdt_blob"
-.LASF392:
+.LASF380:
 	.string	"udevice_id"
 .LASF51:
 	.string	"size"
 .LASF10:
 	.string	"long long unsigned int"
-.LASF401:
+.LASF390:
 	.string	"destroy"
 .LASF107:
 	.string	"image_header"
-.LASF381:
+.LASF369:
 	.string	"length"
 .LASF20:
 	.string	"__be32"
@@ -19798,67 +14987,65 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"bi_flashstart"
 .LASF136:
 	.string	"fit_noffset_os"
-.LASF198:
+.LASF195:
 	.string	"UCLASS_MMC"
-.LASF333:
-	.string	"write_hwaddr"
-.LASF255:
+.LASF254:
 	.string	"UCLASS_INVALID"
-.LASF236:
+.LASF234:
 	.string	"UCLASS_USB_HUB"
-.LASF375:
+.LASF363:
 	.string	"child_post_remove"
 .LASF41:
 	.string	"sibling_node"
-.LASF295:
+.LASF294:
 	.string	"of_root"
-.LASF252:
+.LASF250:
 	.string	"UCLASS_EBC"
 .LASF57:
 	.string	"flash_info"
 .LASF101:
 	.string	"version"
-.LASF332:
-	.string	"halt"
 .LASF62:
 	.string	"region"
 .LASF105:
 	.string	"size_dt_struct"
-.LASF287:
+.LASF286:
 	.string	"dm_root"
-.LASF307:
+.LASF252:
+	.string	"UCLASS_RNG"
+.LASF306:
 	.string	"sys_start_tick"
-.LASF312:
+.LASF311:
 	.string	"properties"
-.LASF200:
+.LASF197:
 	.string	"UCLASS_MTD"
 .LASF94:
 	.string	"fdt32_t"
-.LASF286:
+.LASF285:
 	.string	"new_gd"
-.LASF202:
+.LASF199:
 	.string	"UCLASS_NORTHBRIDGE"
 .LASF78:
 	.string	"bi_enetaddr"
-.LASF315:
+.LASF314:
 	.string	"mtd_info"
-.LASF373:
+.LASF361:
 	.string	"child_post_bind"
-.LASF324:
+.LASF323:
 	.string	"in_addr"
-.LASF350:
+.LASF338:
 	.string	"net_rx_packet_len"
-.LASF329:
+.LASF389:
 	.string	"init"
-.LASF453:
+.LASF436:
 	.string	"rockchip_secure_otp_ecc_enable"
-.LASF319:
+.LASF318:
 	.string	"__dtb_dt_begin"
-.LASF219:
+.LASF216:
 	.string	"UCLASS_RESET"
 .LASF139:
 	.string	"fit_noffset_rd"
-.LASF173:
+.LASF170:
 	.string	"UCLASS_AHCI"
 .LASF12:
 	.string	"phys_size_t"
@@ -19868,127 +15055,123 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"FIQ_STACK_START"
 .LASF154:
 	.string	"verify"
-.LASF384:
+.LASF372:
 	.string	"ofnode"
 .LASF28:
 	.string	"name"
-.LASF447:
+.LASF433:
 	.string	"buffer"
-.LASF253:
+.LASF251:
 	.string	"UCLASS_EINK_DISPLAY"
-.LASF205:
+.LASF202:
 	.string	"UCLASS_PANEL_BACKLIGHT"
-.LASF232:
+.LASF230:
 	.string	"UCLASS_TIMER"
-.LASF227:
+.LASF225:
 	.string	"UCLASS_SPI_FLASH"
-.LASF276:
+.LASF275:
 	.string	"have_console"
 .LASF81:
 	.string	"bi_busfreq"
 .LASF6:
 	.string	"short int"
-.LASF418:
+.LASF407:
 	.string	"otp_mask_base"
-.LASF211:
+.LASF208:
 	.string	"UCLASS_PINCTRL"
-.LASF221:
+.LASF218:
 	.string	"UCLASS_RAMDISK"
-.LASF168:
+.LASF165:
 	.string	"UCLASS_I2C_EMUL"
-.LASF226:
+.LASF224:
 	.string	"UCLASS_SPMI"
-.LASF370:
+.LASF358:
 	.string	"remove"
-.LASF165:
+.LASF162:
 	.string	"UCLASS_TEST_BUS"
-.LASF322:
+.LASF321:
 	.string	"save_addr"
-.LASF378:
+.LASF366:
 	.string	"per_child_auto_alloc_size"
-.LASF445:
+.LASF431:
 	.string	"rk3568_secure_otp_write_2_bytes_noecc"
-.LASF301:
+.LASF300:
 	.string	"malloc_ptr"
-.LASF417:
+.LASF406:
 	.string	"secure_conf_base"
 .LASF151:
 	.string	"initrd_end"
-.LASF397:
+.LASF385:
 	.string	"pre_unbind"
-.LASF420:
+.LASF409:
 	.string	"secure_otp_data"
-.LASF268:
+.LASF267:
 	.string	"baudrate"
 .LASF91:
 	.string	"_datarellocal_start_ofs"
 .LASF40:
 	.string	"child_head"
-.LASF257:
+.LASF256:
 	.string	"arch_global_data"
-.LASF254:
+.LASF253:
 	.string	"UCLASS_COUNT"
-.LASF159:
-	.string	"sha1_der_prefix"
+.LASF272:
+	.string	"pci_clk"
 .LASF49:
 	.string	"block_drvr"
-.LASF156:
-	.string	"rollback_index"
 .LASF53:
 	.string	"flash_id"
-.LASF249:
+.LASF247:
 	.string	"UCLASS_CRYPTO"
-.LASF309:
+.LASF308:
 	.string	"device_node"
-.LASF281:
+.LASF280:
 	.string	"ram_size"
 .LASF145:
 	.string	"fit_noffset_setup"
 .LASF106:
 	.string	"working_fdt"
-.LASF290:
+.LASF289:
 	.string	"fdt_blob_kern"
-.LASF342:
+.LASF330:
 	.string	"net_root_path"
-.LASF181:
+.LASF178:
 	.string	"UCLASS_DMA"
 .LASF86:
 	.string	"bd_t"
-.LASF325:
+.LASF324:
 	.string	"s_addr"
-.LASF432:
+.LASF418:
 	.string	"request"
-.LASF438:
+.LASF424:
 	.string	"data_byte"
-.LASF399:
+.LASF387:
 	.string	"post_probe"
-.LASF351:
+.LASF339:
 	.string	"net_bcast_ethaddr"
 .LASF83:
 	.string	"bi_boot_params"
-.LASF421:
+.LASF410:
 	.string	"spl_rockchip_otp_start"
 .LASF19:
 	.string	"uint32_t"
-.LASF387:
+.LASF375:
 	.string	"mem_malloc_brk"
-.LASF337:
+.LASF325:
 	.string	"net_gateway"
-.LASF377:
+.LASF365:
 	.string	"platdata_auto_alloc_size"
 .LASF66:
 	.string	"bi_memstart"
-.LASF406:
+.LASF395:
 	.string	"DECOM_LZ4"
-.LASF240:
+.LASF238:
 	.string	"UCLASS_VIDEO_CONSOLE"
-.LASF335:
-	.string	"eth_current"
-.LASF372:
+.LASF360:
 	.string	"ofdata_to_platdata"
 .LASF64:
 	.string	"reserved"
-.LASF481:
+.LASF458:
 	.string	"free"
 .LASF85:
 	.string	"bi_dram"
@@ -20002,23 +15185,21 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"legacy_hdr_valid"
 .LASF60:
 	.string	"base"
-.LASF222:
+.LASF219:
 	.string	"UCLASS_RTC"
-.LASF258:
+.LASF257:
 	.string	"timer_rate_hz"
 .LASF52:
 	.string	"sector_count"
 .LASF118:
 	.string	"ih_comp"
-.LASF396:
+.LASF384:
 	.string	"post_bind"
-.LASF450:
-	.string	"rockchip_secure_otp_write"
-.LASF371:
+.LASF359:
 	.string	"unbind"
 .LASF148:
 	.string	"ft_addr"
-.LASF250:
+.LASF248:
 	.string	"UCLASS_ETH_PHY"
 .LASF4:
 	.string	"uchar"
@@ -20026,36 +15207,32 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"ft_len"
 .LASF47:
 	.string	"next"
-.LASF431:
+.LASF417:
 	.string	"secure_otp_ioctl"
-.LASF394:
+.LASF382:
 	.string	"data"
-.LASF201:
+.LASF198:
 	.string	"UCLASS_NOP"
 .LASF144:
 	.string	"fit_uname_setup"
 .LASF48:
 	.string	"prev"
-.LASF206:
+.LASF203:
 	.string	"UCLASS_PCH"
-.LASF207:
+.LASF204:
 	.string	"UCLASS_PCI"
-.LASF338:
+.LASF326:
 	.string	"net_netmask"
 .LASF33:
 	.string	"driver_data"
 .LASF87:
 	.string	"IRQ_STACK_START"
-.LASF172:
+.LASF169:
 	.string	"UCLASS_ADC"
-.LASF468:
-	.string	"px30_spl_rockchip_otp_stop"
-.LASF167:
+.LASF164:
 	.string	"UCLASS_SPI_EMUL"
-.LASF262:
+.LASF261:
 	.string	"tlb_size"
-.LASF478:
-	.string	"drivers/misc/rockchip-secure-otp.c"
 .LASF141:
 	.string	"fit_uname_fdt"
 	.ident	"GCC: (Linaro GCC 6.3-2017.05) 6.3.1 20170404"
diff --git a/drivers/misc/rockchip-secure-otp-v2.S b/drivers/misc/rv1126-secure-otp.S
similarity index 92%
rename from drivers/misc/rockchip-secure-otp-v2.S
rename to drivers/misc/rv1126-secure-otp.S
index 2382004426..3d6fe8c4c8 100644
--- a/drivers/misc/rockchip-secure-otp-v2.S
+++ b/drivers/misc/rv1126-secure-otp.S
@@ -8,20 +8,20 @@
 	.eabi_attribute 30, 4
 	.eabi_attribute 34, 0
 	.eabi_attribute 18, 2
-	.file	"rockchip-secure-otp-v2.c"
+	.file	"rv1126-secure-otp.c"
 	.text
 .Ltext0:
 	.cfi_sections	.debug_frame
-	.section	.text.rockchip_secure_otp_v2_ioctl,"ax",%progbits
+	.section	.text.rockchip_secure_otp_ioctl,"ax",%progbits
 	.align	1
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	rockchip_secure_otp_v2_ioctl, %function
-rockchip_secure_otp_v2_ioctl:
-.LFB268:
-	.file 1 "drivers/misc/rockchip-secure-otp-v2.c"
+	.type	rockchip_secure_otp_ioctl, %function
+rockchip_secure_otp_ioctl:
+.LFB270:
+	.file 1 "drivers/misc/rv1126-secure-otp.c"
 	.loc 1 172 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
@@ -55,17 +55,17 @@ rockchip_secure_otp_v2_ioctl:
 	.loc 1 185 0
 	bx	lr
 	.cfi_endproc
-.LFE268:
-	.size	rockchip_secure_otp_v2_ioctl, .-rockchip_secure_otp_v2_ioctl
-	.section	.text.rockchip_secure_otp_v2_read,"ax",%progbits
+.LFE270:
+	.size	rockchip_secure_otp_ioctl, .-rockchip_secure_otp_ioctl
+	.section	.text.rockchip_secure_otp_read,"ax",%progbits
 	.align	1
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	rockchip_secure_otp_v2_read, %function
-rockchip_secure_otp_v2_read:
-.LFB264:
+	.type	rockchip_secure_otp_read, %function
+rockchip_secure_otp_read:
+.LFB266:
 	.loc 1 17 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
@@ -98,7 +98,7 @@ rockchip_secure_otp_v2_read:
 .L7:
 	.loc 1 25 0 is_stmt 0 discriminator 3
 	.syntax unified
-@ 25 "drivers/misc/rockchip-secure-otp-v2.c" 1
+@ 25 "drivers/misc/rv1126-secure-otp.c" 1
 	dmb sy
 @ 0 "" 2
 	.thumb
@@ -146,7 +146,7 @@ rockchip_secure_otp_v2_read:
 .L16:
 	.loc 1 66 0 is_stmt 0 discriminator 3
 	.syntax unified
-@ 66 "drivers/misc/rockchip-secure-otp-v2.c" 1
+@ 66 "drivers/misc/rv1126-secure-otp.c" 1
 	dmb sy
 @ 0 "" 2
 	.thumb
@@ -182,7 +182,7 @@ rockchip_secure_otp_v2_read:
 .LBB25:
 	.loc 1 44 0
 	.syntax unified
-@ 44 "drivers/misc/rockchip-secure-otp-v2.c" 1
+@ 44 "drivers/misc/rv1126-secure-otp.c" 1
 	dmb sy
 @ 0 "" 2
 	.thumb
@@ -194,7 +194,7 @@ rockchip_secure_otp_v2_read:
 .LBB26:
 	.loc 1 45 0
 	.syntax unified
-@ 45 "drivers/misc/rockchip-secure-otp-v2.c" 1
+@ 45 "drivers/misc/rv1126-secure-otp.c" 1
 	dmb sy
 @ 0 "" 2
 	.thumb
@@ -211,7 +211,7 @@ rockchip_secure_otp_v2_read:
 	ldr	r3, [r3, #48]
 .LVL20:
 	.syntax unified
-@ 48 "drivers/misc/rockchip-secure-otp-v2.c" 1
+@ 48 "drivers/misc/rv1126-secure-otp.c" 1
 	dmb sy
 @ 0 "" 2
 .LVL21:
@@ -240,7 +240,7 @@ rockchip_secure_otp_v2_read:
 	ldr	r3, [r3, #36]
 .LVL27:
 	.syntax unified
-@ 61 "drivers/misc/rockchip-secure-otp-v2.c" 1
+@ 61 "drivers/misc/rv1126-secure-otp.c" 1
 	dmb sy
 @ 0 "" 2
 	.thumb
@@ -256,17 +256,17 @@ rockchip_secure_otp_v2_read:
 .L26:
 	.word	.LC0
 	.cfi_endproc
-.LFE264:
-	.size	rockchip_secure_otp_v2_read, .-rockchip_secure_otp_v2_read
-	.section	.text.rockchip_secure_otp_v2_ofdata_to_platdata,"ax",%progbits
+.LFE266:
+	.size	rockchip_secure_otp_read, .-rockchip_secure_otp_read
+	.section	.text.rockchip_secure_otp_ofdata_to_platdata,"ax",%progbits
 	.align	1
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	rockchip_secure_otp_v2_ofdata_to_platdata, %function
-rockchip_secure_otp_v2_ofdata_to_platdata:
-.LFB269:
+	.type	rockchip_secure_otp_ofdata_to_platdata, %function
+rockchip_secure_otp_ofdata_to_platdata:
+.LFB271:
 	.loc 1 194 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
@@ -309,17 +309,17 @@ rockchip_secure_otp_v2_ofdata_to_platdata:
 .L29:
 	.word	.LC1
 	.cfi_endproc
-.LFE269:
-	.size	rockchip_secure_otp_v2_ofdata_to_platdata, .-rockchip_secure_otp_v2_ofdata_to_platdata
-	.section	.text.rockchip_secure_otp_v2_write,"ax",%progbits
+.LFE271:
+	.size	rockchip_secure_otp_ofdata_to_platdata, .-rockchip_secure_otp_ofdata_to_platdata
+	.section	.text.rockchip_secure_otp_write,"ax",%progbits
 	.align	1
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	rockchip_secure_otp_v2_write, %function
-rockchip_secure_otp_v2_write:
-.LFB266:
+	.type	rockchip_secure_otp_write, %function
+rockchip_secure_otp_write:
+.LFB268:
 	.loc 1 114 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
@@ -374,7 +374,7 @@ rockchip_secure_otp_v2_write:
 	mov	r0, r6
 .LVL44:
 	mov	r1, r5
-	bl	rockchip_secure_otp_v2_read
+	bl	rockchip_secure_otp_read
 .LVL45:
 	.loc 1 124 0
 	mov	r6, r0
@@ -397,7 +397,7 @@ rockchip_secure_otp_v2_write:
 .L38:
 .LVL49:
 	.syntax unified
-@ 147 "drivers/misc/rockchip-secure-otp-v2.c" 1
+@ 147 "drivers/misc/rv1126-secure-otp.c" 1
 	dmb sy
 @ 0 "" 2
 	.thumb
@@ -432,7 +432,7 @@ rockchip_secure_otp_v2_write:
 .L47:
 .LVL53:
 	.syntax unified
-@ 158 "drivers/misc/rockchip-secure-otp-v2.c" 1
+@ 158 "drivers/misc/rv1126-secure-otp.c" 1
 	dmb sy
 @ 0 "" 2
 	.thumb
@@ -505,7 +505,7 @@ rockchip_secure_otp_v2_write:
 .L45:
 .LVL62:
 	.syntax unified
-@ 152 "drivers/misc/rockchip-secure-otp-v2.c" 1
+@ 152 "drivers/misc/rv1126-secure-otp.c" 1
 	dmb sy
 @ 0 "" 2
 	.thumb
@@ -530,7 +530,7 @@ rockchip_secure_otp_v2_write:
 .LBB43:
 	.loc 1 92 0
 	.syntax unified
-@ 92 "drivers/misc/rockchip-secure-otp-v2.c" 1
+@ 92 "drivers/misc/rv1126-secure-otp.c" 1
 	dmb sy
 @ 0 "" 2
 	.thumb
@@ -542,7 +542,7 @@ rockchip_secure_otp_v2_write:
 .LBB44:
 	.loc 1 93 0
 	.syntax unified
-@ 93 "drivers/misc/rockchip-secure-otp-v2.c" 1
+@ 93 "drivers/misc/rv1126-secure-otp.c" 1
 	dmb sy
 @ 0 "" 2
 	.thumb
@@ -556,7 +556,7 @@ rockchip_secure_otp_v2_write:
 .LBB45:
 	.loc 1 94 0
 	.syntax unified
-@ 94 "drivers/misc/rockchip-secure-otp-v2.c" 1
+@ 94 "drivers/misc/rv1126-secure-otp.c" 1
 	dmb sy
 @ 0 "" 2
 	.thumb
@@ -568,7 +568,7 @@ rockchip_secure_otp_v2_write:
 .LBB46:
 	.loc 1 95 0
 	.syntax unified
-@ 95 "drivers/misc/rockchip-secure-otp-v2.c" 1
+@ 95 "drivers/misc/rv1126-secure-otp.c" 1
 	dmb sy
 @ 0 "" 2
 	.thumb
@@ -586,7 +586,7 @@ rockchip_secure_otp_v2_write:
 	ldr	r1, [r1, #72]
 .LVL70:
 	.syntax unified
-@ 98 "drivers/misc/rockchip-secure-otp-v2.c" 1
+@ 98 "drivers/misc/rv1126-secure-otp.c" 1
 	dmb sy
 @ 0 "" 2
 .LVL71:
@@ -622,9 +622,9 @@ rockchip_secure_otp_v2_write:
 	.word	.LC0
 	.word	100002
 	.cfi_endproc
-.LFE266:
-	.size	rockchip_secure_otp_v2_write, .-rockchip_secure_otp_v2_write
-	.global	_u_boot_list_2_driver_2_rockchip_secure_otp_v2
+.LFE268:
+	.size	rockchip_secure_otp_write, .-rockchip_secure_otp_write
+	.global	_u_boot_list_2_driver_2_rockchip_secure_otp
 	.section	.rodata.rockchip_otp_ids,"a",%progbits
 	.align	2
 	.type	rockchip_otp_ids, %object
@@ -633,39 +633,39 @@ rockchip_otp_ids:
 	.word	.LC4
 	.space	4
 	.space	8
+	.section	.rodata.rockchip_secure_otp_ofdata_to_platdata.str1.1,"aMS",%progbits,1
+.LC1:
+	.ascii	"secure_conf\000"
 	.section	.rodata.rockchip_secure_otp_ops,"a",%progbits
 	.align	2
 	.type	rockchip_secure_otp_ops, %object
 	.size	rockchip_secure_otp_ops, 16
 rockchip_secure_otp_ops:
-	.word	rockchip_secure_otp_v2_read
-	.word	rockchip_secure_otp_v2_write
-	.word	rockchip_secure_otp_v2_ioctl
+	.word	rockchip_secure_otp_read
+	.word	rockchip_secure_otp_write
+	.word	rockchip_secure_otp_ioctl
 	.space	4
-	.section	.rodata.rockchip_secure_otp_v2_ofdata_to_platdata.str1.1,"aMS",%progbits,1
-.LC1:
-	.ascii	"secure_conf\000"
-	.section	.rodata.rockchip_secure_otp_v2_read.str1.1,"aMS",%progbits,1
+	.section	.rodata.rockchip_secure_otp_read.str1.1,"aMS",%progbits,1
 .LC0:
 	.ascii	"Please input correct addr\012\000"
-	.section	.rodata.rockchip_secure_otp_v2_write.str1.1,"aMS",%progbits,1
+	.section	.rodata.rockchip_secure_otp_write.str1.1,"aMS",%progbits,1
 .LC2:
 	.ascii	"The zone is written.\012\000"
 	.section	.rodata.str1.1,"aMS",%progbits,1
 .LC3:
-	.ascii	"rockchip_secure_otp_v2\000"
+	.ascii	"rockchip_secure_otp\000"
 .LC4:
 	.ascii	"rockchip,rv1126-secure-otp\000"
-	.section	.u_boot_list_2_driver_2_rockchip_secure_otp_v2,"aw",%progbits
+	.section	.u_boot_list_2_driver_2_rockchip_secure_otp,"aw",%progbits
 	.align	2
-	.type	_u_boot_list_2_driver_2_rockchip_secure_otp_v2, %object
-	.size	_u_boot_list_2_driver_2_rockchip_secure_otp_v2, 68
-_u_boot_list_2_driver_2_rockchip_secure_otp_v2:
+	.type	_u_boot_list_2_driver_2_rockchip_secure_otp, %object
+	.size	_u_boot_list_2_driver_2_rockchip_secure_otp, 68
+_u_boot_list_2_driver_2_rockchip_secure_otp:
 	.word	.LC3
 	.word	36
 	.word	rockchip_otp_ids
 	.space	16
-	.word	rockchip_secure_otp_v2_ofdata_to_platdata
+	.word	rockchip_secure_otp_ofdata_to_platdata
 	.space	16
 	.word	8
 	.space	8
@@ -702,22 +702,22 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.file 28 "include/dm/uclass.h"
 	.file 29 "include/asm-generic/ioctl.h"
 	.file 30 "include/misc.h"
-	.file 31 "include/rockchip-otp-v2.h"
+	.file 31 "include/rv1126-secure-otp.h"
 	.file 32 "include/dm/read.h"
 	.file 33 "include/stdio.h"
 	.file 34 "include/linux/delay.h"
 	.file 35 "include/log.h"
 	.section	.debug_info,"",%progbits
 .Ldebug_info0:
-	.4byte	0x1bef
+	.4byte	0x1c13
 	.2byte	0x4
 	.4byte	.Ldebug_abbrev0
 	.byte	0x4
 	.uleb128 0x1
-	.4byte	.LASF420
+	.4byte	.LASF425
 	.byte	0xc
-	.4byte	.LASF421
-	.4byte	.LASF422
+	.4byte	.LASF426
+	.4byte	.LASF427
 	.4byte	.Ldebug_ranges0+0x70
 	.4byte	0
 	.4byte	.Ldebug_line0
@@ -890,7 +890,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LASF27
 	.byte	0x8
 	.byte	0x81
-	.4byte	0x12ff
+	.4byte	0x1323
 	.byte	0
 	.uleb128 0xe
 	.4byte	.LASF28
@@ -920,7 +920,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LASF32
 	.byte	0x8
 	.byte	0x86
-	.4byte	0x12a6
+	.4byte	0x12ca
 	.byte	0x14
 	.uleb128 0xe
 	.4byte	.LASF33
@@ -944,7 +944,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LASF36
 	.byte	0x8
 	.byte	0x8a
-	.4byte	0x1342
+	.4byte	0x1366
 	.byte	0x24
 	.uleb128 0xe
 	.4byte	.LASF37
@@ -1083,7 +1083,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x4
 	.4byte	.LASF49
 	.byte	0xb
-	.byte	0xce
+	.byte	0xd1
 	.4byte	0x2fd
 	.uleb128 0x14
 	.2byte	0xa10
@@ -1142,7 +1142,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1ff
 	.byte	0
 	.uleb128 0x18
-	.4byte	.LASF306
+	.4byte	.LASF311
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0x383
@@ -1516,78 +1516,78 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LASF107
 	.byte	0x40
 	.byte	0x13
-	.2byte	0x135
+	.2byte	0x137
 	.4byte	0x71f
 	.uleb128 0x1d
 	.4byte	.LASF108
 	.byte	0x13
-	.2byte	0x136
+	.2byte	0x138
 	.4byte	0x11d
 	.byte	0
 	.uleb128 0x1d
 	.4byte	.LASF109
 	.byte	0x13
-	.2byte	0x137
+	.2byte	0x139
 	.4byte	0x11d
 	.byte	0x4
 	.uleb128 0x1d
 	.4byte	.LASF110
 	.byte	0x13
-	.2byte	0x138
+	.2byte	0x13a
 	.4byte	0x11d
 	.byte	0x8
 	.uleb128 0x1d
 	.4byte	.LASF111
 	.byte	0x13
-	.2byte	0x139
+	.2byte	0x13b
 	.4byte	0x11d
 	.byte	0xc
 	.uleb128 0x1d
 	.4byte	.LASF112
 	.byte	0x13
-	.2byte	0x13a
+	.2byte	0x13c
 	.4byte	0x11d
 	.byte	0x10
 	.uleb128 0x1d
 	.4byte	.LASF113
 	.byte	0x13
-	.2byte	0x13b
+	.2byte	0x13d
 	.4byte	0x11d
 	.byte	0x14
 	.uleb128 0x1d
 	.4byte	.LASF114
 	.byte	0x13
-	.2byte	0x13c
+	.2byte	0x13e
 	.4byte	0x11d
 	.byte	0x18
 	.uleb128 0x1d
 	.4byte	.LASF115
 	.byte	0x13
-	.2byte	0x13d
+	.2byte	0x13f
 	.4byte	0x107
 	.byte	0x1c
 	.uleb128 0x1d
 	.4byte	.LASF116
 	.byte	0x13
-	.2byte	0x13e
+	.2byte	0x140
 	.4byte	0x107
 	.byte	0x1d
 	.uleb128 0x1d
 	.4byte	.LASF117
 	.byte	0x13
-	.2byte	0x13f
+	.2byte	0x141
 	.4byte	0x107
 	.byte	0x1e
 	.uleb128 0x1d
 	.4byte	.LASF118
 	.byte	0x13
-	.2byte	0x140
+	.2byte	0x142
 	.4byte	0x107
 	.byte	0x1f
 	.uleb128 0x1d
 	.4byte	.LASF119
 	.byte	0x13
-	.2byte	0x141
+	.2byte	0x143
 	.4byte	0x71f
 	.byte	0x20
 	.byte	0
@@ -1601,258 +1601,258 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x1e
 	.4byte	.LASF120
 	.byte	0x13
-	.2byte	0x142
+	.2byte	0x144
 	.4byte	0x675
 	.uleb128 0x1c
 	.4byte	.LASF121
 	.byte	0x18
 	.byte	0x13
-	.2byte	0x144
+	.2byte	0x146
 	.4byte	0x7bd
 	.uleb128 0x1d
 	.4byte	.LASF54
 	.byte	0x13
-	.2byte	0x145
+	.2byte	0x147
 	.4byte	0xfc
 	.byte	0
 	.uleb128 0x1f
 	.ascii	"end\000"
 	.byte	0x13
-	.2byte	0x145
+	.2byte	0x147
 	.4byte	0xfc
 	.byte	0x4
 	.uleb128 0x1d
 	.4byte	.LASF122
 	.byte	0x13
-	.2byte	0x146
+	.2byte	0x148
 	.4byte	0xfc
 	.byte	0x8
 	.uleb128 0x1d
 	.4byte	.LASF123
 	.byte	0x13
-	.2byte	0x146
+	.2byte	0x148
 	.4byte	0xfc
 	.byte	0xc
 	.uleb128 0x1d
 	.4byte	.LASF124
 	.byte	0x13
-	.2byte	0x147
+	.2byte	0x149
 	.4byte	0xfc
 	.byte	0x10
 	.uleb128 0x1d
 	.4byte	.LASF125
 	.byte	0x13
-	.2byte	0x148
+	.2byte	0x14a
 	.4byte	0x107
 	.byte	0x14
 	.uleb128 0x1d
 	.4byte	.LASF126
 	.byte	0x13
-	.2byte	0x148
+	.2byte	0x14a
 	.4byte	0x107
 	.byte	0x15
 	.uleb128 0x1f
 	.ascii	"os\000"
 	.byte	0x13
-	.2byte	0x148
+	.2byte	0x14a
 	.4byte	0x107
 	.byte	0x16
 	.uleb128 0x1d
 	.4byte	.LASF127
 	.byte	0x13
-	.2byte	0x149
+	.2byte	0x14b
 	.4byte	0x107
 	.byte	0x17
 	.byte	0
 	.uleb128 0x1e
 	.4byte	.LASF128
 	.byte	0x13
-	.2byte	0x14a
+	.2byte	0x14c
 	.4byte	0x73b
 	.uleb128 0x20
 	.4byte	.LASF129
 	.2byte	0x1e4
 	.byte	0x13
-	.2byte	0x150
+	.2byte	0x152
 	.4byte	0x95c
 	.uleb128 0x1d
 	.4byte	.LASF130
 	.byte	0x13
-	.2byte	0x156
+	.2byte	0x158
 	.4byte	0x95c
 	.byte	0
 	.uleb128 0x1d
 	.4byte	.LASF131
 	.byte	0x13
-	.2byte	0x157
+	.2byte	0x159
 	.4byte	0x72f
 	.byte	0x4
 	.uleb128 0x1d
 	.4byte	.LASF132
 	.byte	0x13
-	.2byte	0x158
+	.2byte	0x15a
 	.4byte	0xfc
 	.byte	0x44
 	.uleb128 0x1d
 	.4byte	.LASF133
 	.byte	0x13
-	.2byte	0x15b
+	.2byte	0x15d
 	.4byte	0xd2
 	.byte	0x48
 	.uleb128 0x1d
 	.4byte	.LASF134
 	.byte	0x13
-	.2byte	0x15d
+	.2byte	0x15f
 	.4byte	0x128
 	.byte	0x4c
 	.uleb128 0x1d
 	.4byte	.LASF135
 	.byte	0x13
-	.2byte	0x15e
+	.2byte	0x160
 	.4byte	0xd2
 	.byte	0x50
 	.uleb128 0x1d
 	.4byte	.LASF136
 	.byte	0x13
-	.2byte	0x15f
+	.2byte	0x161
 	.4byte	0x50
 	.byte	0x54
 	.uleb128 0x1d
 	.4byte	.LASF137
 	.byte	0x13
-	.2byte	0x161
+	.2byte	0x163
 	.4byte	0x128
 	.byte	0x58
 	.uleb128 0x1d
 	.4byte	.LASF138
 	.byte	0x13
-	.2byte	0x162
+	.2byte	0x164
 	.4byte	0xd2
 	.byte	0x5c
 	.uleb128 0x1d
 	.4byte	.LASF139
 	.byte	0x13
-	.2byte	0x163
+	.2byte	0x165
 	.4byte	0x50
 	.byte	0x60
 	.uleb128 0x1d
 	.4byte	.LASF140
 	.byte	0x13
-	.2byte	0x165
+	.2byte	0x167
 	.4byte	0x128
 	.byte	0x64
 	.uleb128 0x1d
 	.4byte	.LASF141
 	.byte	0x13
-	.2byte	0x166
+	.2byte	0x168
 	.4byte	0xd2
 	.byte	0x68
 	.uleb128 0x1d
 	.4byte	.LASF142
 	.byte	0x13
-	.2byte	0x167
+	.2byte	0x169
 	.4byte	0x50
 	.byte	0x6c
 	.uleb128 0x1d
 	.4byte	.LASF143
 	.byte	0x13
-	.2byte	0x169
+	.2byte	0x16b
 	.4byte	0x128
 	.byte	0x70
 	.uleb128 0x1d
 	.4byte	.LASF144
 	.byte	0x13
-	.2byte	0x16a
+	.2byte	0x16c
 	.4byte	0xd2
 	.byte	0x74
 	.uleb128 0x1d
 	.4byte	.LASF145
 	.byte	0x13
-	.2byte	0x16b
+	.2byte	0x16d
 	.4byte	0x50
 	.byte	0x78
 	.uleb128 0x1f
 	.ascii	"os\000"
 	.byte	0x13
-	.2byte	0x16f
+	.2byte	0x171
 	.4byte	0x7bd
 	.byte	0x7c
 	.uleb128 0x1f
 	.ascii	"ep\000"
 	.byte	0x13
-	.2byte	0x170
+	.2byte	0x172
 	.4byte	0xfc
 	.byte	0x94
 	.uleb128 0x1d
 	.4byte	.LASF146
 	.byte	0x13
-	.2byte	0x172
+	.2byte	0x174
 	.4byte	0xfc
 	.byte	0x98
 	.uleb128 0x1d
 	.4byte	.LASF147
 	.byte	0x13
-	.2byte	0x172
+	.2byte	0x174
 	.4byte	0xfc
 	.byte	0x9c
 	.uleb128 0x1d
 	.4byte	.LASF148
 	.byte	0x13
-	.2byte	0x174
+	.2byte	0x176
 	.4byte	0xeb
 	.byte	0xa0
 	.uleb128 0x1d
 	.4byte	.LASF149
 	.byte	0x13
-	.2byte	0x175
+	.2byte	0x177
 	.4byte	0xfc
 	.byte	0xa4
 	.uleb128 0x1d
 	.4byte	.LASF150
 	.byte	0x13
-	.2byte	0x177
+	.2byte	0x179
 	.4byte	0xfc
 	.byte	0xa8
 	.uleb128 0x1d
 	.4byte	.LASF151
 	.byte	0x13
-	.2byte	0x178
+	.2byte	0x17a
 	.4byte	0xfc
 	.byte	0xac
 	.uleb128 0x1d
 	.4byte	.LASF152
 	.byte	0x13
-	.2byte	0x179
+	.2byte	0x17b
 	.4byte	0xfc
 	.byte	0xb0
 	.uleb128 0x1d
 	.4byte	.LASF153
 	.byte	0x13
-	.2byte	0x17a
+	.2byte	0x17c
 	.4byte	0xfc
 	.byte	0xb4
 	.uleb128 0x1f
 	.ascii	"kbd\000"
 	.byte	0x13
-	.2byte	0x17b
+	.2byte	0x17d
 	.4byte	0x962
 	.byte	0xb8
 	.uleb128 0x1d
 	.4byte	.LASF154
 	.byte	0x13
-	.2byte	0x17e
+	.2byte	0x180
 	.4byte	0x50
 	.byte	0xbc
 	.uleb128 0x1d
 	.4byte	.LASF155
 	.byte	0x13
-	.2byte	0x18b
+	.2byte	0x18d
 	.4byte	0x50
 	.byte	0xc0
 	.uleb128 0x1f
 	.ascii	"lmb\000"
 	.byte	0x13
-	.2byte	0x18e
+	.2byte	0x190
 	.4byte	0x41c
 	.byte	0xc4
 	.byte	0
@@ -1865,20 +1865,20 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x1e
 	.4byte	.LASF156
 	.byte	0x13
-	.2byte	0x194
+	.2byte	0x196
 	.4byte	0x7c9
 	.uleb128 0xc
 	.4byte	.LASF157
 	.byte	0x13
-	.2byte	0x196
+	.2byte	0x198
 	.4byte	0x968
 	.uleb128 0x21
-	.4byte	.LASF340
+	.4byte	.LASF345
 	.byte	0x4
 	.4byte	0x50
 	.byte	0x18
 	.byte	0xe
-	.4byte	0xbbf
+	.4byte	0xbd7
 	.uleb128 0x22
 	.4byte	.LASF158
 	.byte	0
@@ -2155,8 +2155,20 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x22
 	.4byte	.LASF249
 	.byte	0x5b
-	.uleb128 0x23
+	.uleb128 0x22
 	.4byte	.LASF250
+	.byte	0x5c
+	.uleb128 0x22
+	.4byte	.LASF251
+	.byte	0x5d
+	.uleb128 0x22
+	.4byte	.LASF252
+	.byte	0x5e
+	.uleb128 0x22
+	.4byte	.LASF253
+	.byte	0x5f
+	.uleb128 0x23
+	.4byte	.LASF254
 	.sleb128 -1
 	.byte	0
 	.uleb128 0x24
@@ -2164,19 +2176,19 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x7b
 	.byte	0x23
 	.byte	0xf6
-	.4byte	0xbd2
+	.4byte	0xbea
 	.uleb128 0x22
-	.4byte	.LASF251
+	.4byte	.LASF255
 	.byte	0x5
 	.byte	0
 	.uleb128 0xd
-	.4byte	.LASF252
+	.4byte	.LASF256
 	.byte	0x20
 	.byte	0x14
 	.byte	0xc
-	.4byte	0xc33
+	.4byte	0xc4b
 	.uleb128 0xe
-	.4byte	.LASF253
+	.4byte	.LASF257
 	.byte	0x14
 	.byte	0x22
 	.4byte	0x37
@@ -2194,329 +2206,335 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x7b
 	.byte	0x8
 	.uleb128 0xe
-	.4byte	.LASF254
+	.4byte	.LASF258
 	.byte	0x14
 	.byte	0x25
 	.4byte	0x37
 	.byte	0xc
 	.uleb128 0xe
-	.4byte	.LASF255
+	.4byte	.LASF259
 	.byte	0x14
 	.byte	0x26
 	.4byte	0x89
 	.byte	0x10
 	.uleb128 0xe
-	.4byte	.LASF256
+	.4byte	.LASF260
 	.byte	0x14
 	.byte	0x28
 	.4byte	0x37
 	.byte	0x18
 	.uleb128 0xe
-	.4byte	.LASF257
+	.4byte	.LASF261
 	.byte	0x14
 	.byte	0x29
 	.4byte	0x37
 	.byte	0x1c
 	.byte	0
 	.uleb128 0xd
-	.4byte	.LASF258
-	.byte	0x10
+	.4byte	.LASF262
+	.byte	0x14
 	.byte	0x15
 	.byte	0x22
-	.4byte	0xc6f
+	.4byte	0xc93
 	.uleb128 0xe
-	.4byte	.LASF259
+	.4byte	.LASF263
 	.byte	0x15
 	.byte	0x23
 	.4byte	0x9f
 	.byte	0
-	.uleb128 0xf
-	.ascii	"id\000"
+	.uleb128 0xe
+	.4byte	.LASF264
 	.byte	0x15
 	.byte	0x24
 	.4byte	0x9f
 	.byte	0x4
-	.uleb128 0xe
-	.4byte	.LASF260
+	.uleb128 0xf
+	.ascii	"id\000"
 	.byte	0x15
 	.byte	0x25
 	.4byte	0x9f
 	.byte	0x8
 	.uleb128 0xe
-	.4byte	.LASF261
+	.4byte	.LASF265
 	.byte	0x15
 	.byte	0x26
-	.4byte	0xfc
+	.4byte	0x9f
 	.byte	0xc
+	.uleb128 0xe
+	.4byte	.LASF266
+	.byte	0x15
+	.byte	0x27
+	.4byte	0xfc
+	.byte	0x10
 	.byte	0
 	.uleb128 0xd
-	.4byte	.LASF262
+	.4byte	.LASF267
 	.byte	0xf8
 	.byte	0x15
-	.byte	0x29
-	.4byte	0xe72
+	.byte	0x2a
+	.4byte	0xe96
 	.uleb128 0xf
 	.ascii	"bd\000"
 	.byte	0x15
-	.byte	0x2a
+	.byte	0x2b
 	.4byte	0x962
 	.byte	0
 	.uleb128 0xe
 	.4byte	.LASF42
 	.byte	0x15
-	.byte	0x2b
+	.byte	0x2c
 	.4byte	0x37
 	.byte	0x4
 	.uleb128 0xe
-	.4byte	.LASF260
+	.4byte	.LASF265
 	.byte	0x15
-	.byte	0x2c
+	.byte	0x2d
 	.4byte	0x7b
 	.byte	0x8
 	.uleb128 0xe
-	.4byte	.LASF263
+	.4byte	.LASF268
 	.byte	0x15
-	.byte	0x2d
+	.byte	0x2e
 	.4byte	0x37
 	.byte	0xc
 	.uleb128 0xe
-	.4byte	.LASF264
+	.4byte	.LASF269
 	.byte	0x15
-	.byte	0x2e
+	.byte	0x2f
 	.4byte	0x37
 	.byte	0x10
 	.uleb128 0xe
-	.4byte	.LASF265
+	.4byte	.LASF270
 	.byte	0x15
-	.byte	0x30
+	.byte	0x31
 	.4byte	0x37
 	.byte	0x14
 	.uleb128 0xe
-	.4byte	.LASF266
+	.4byte	.LASF271
 	.byte	0x15
-	.byte	0x31
+	.byte	0x32
 	.4byte	0x37
 	.byte	0x18
 	.uleb128 0xe
-	.4byte	.LASF267
+	.4byte	.LASF272
 	.byte	0x15
-	.byte	0x3d
+	.byte	0x3e
 	.4byte	0x37
 	.byte	0x1c
 	.uleb128 0xe
-	.4byte	.LASF268
+	.4byte	.LASF273
 	.byte	0x15
-	.byte	0x41
+	.byte	0x42
 	.4byte	0x37
 	.byte	0x20
 	.uleb128 0xe
-	.4byte	.LASF269
+	.4byte	.LASF274
 	.byte	0x15
-	.byte	0x42
+	.byte	0x43
 	.4byte	0x37
 	.byte	0x24
 	.uleb128 0xe
-	.4byte	.LASF270
+	.4byte	.LASF275
 	.byte	0x15
-	.byte	0x44
+	.byte	0x45
 	.4byte	0x37
 	.byte	0x28
 	.uleb128 0xe
-	.4byte	.LASF271
+	.4byte	.LASF276
 	.byte	0x15
-	.byte	0x45
+	.byte	0x46
 	.4byte	0x37
 	.byte	0x2c
 	.uleb128 0xe
-	.4byte	.LASF272
+	.4byte	.LASF277
 	.byte	0x15
-	.byte	0x46
+	.byte	0x47
 	.4byte	0xc0
 	.byte	0x30
 	.uleb128 0xe
-	.4byte	.LASF273
+	.4byte	.LASF278
 	.byte	0x15
-	.byte	0x47
+	.byte	0x48
 	.4byte	0x37
 	.byte	0x34
 	.uleb128 0xe
-	.4byte	.LASF274
+	.4byte	.LASF279
 	.byte	0x15
-	.byte	0x48
+	.byte	0x49
 	.4byte	0x37
 	.byte	0x38
 	.uleb128 0xe
-	.4byte	.LASF275
+	.4byte	.LASF280
 	.byte	0x15
-	.byte	0x49
+	.byte	0x4a
 	.4byte	0x37
 	.byte	0x3c
 	.uleb128 0xe
-	.4byte	.LASF276
+	.4byte	.LASF281
 	.byte	0x15
-	.byte	0x4a
+	.byte	0x4b
 	.4byte	0x37
 	.byte	0x40
 	.uleb128 0xe
-	.4byte	.LASF277
+	.4byte	.LASF282
 	.byte	0x15
-	.byte	0x4b
-	.4byte	0xe72
+	.byte	0x4c
+	.4byte	0xe96
 	.byte	0x44
 	.uleb128 0xe
-	.4byte	.LASF278
+	.4byte	.LASF283
 	.byte	0x15
-	.byte	0x4e
+	.byte	0x4f
 	.4byte	0x250
 	.byte	0x48
 	.uleb128 0xe
-	.4byte	.LASF279
+	.4byte	.LASF284
 	.byte	0x15
-	.byte	0x4f
+	.byte	0x50
 	.4byte	0x250
 	.byte	0x4c
 	.uleb128 0xe
-	.4byte	.LASF280
+	.4byte	.LASF285
 	.byte	0x15
-	.byte	0x50
+	.byte	0x51
 	.4byte	0x283
 	.byte	0x50
 	.uleb128 0xe
-	.4byte	.LASF281
+	.4byte	.LASF286
 	.byte	0x15
-	.byte	0x57
+	.byte	0x56
 	.4byte	0x256
 	.byte	0x58
 	.uleb128 0xe
-	.4byte	.LASF282
+	.4byte	.LASF287
 	.byte	0x15
-	.byte	0x59
+	.byte	0x57
 	.4byte	0x256
 	.byte	0x5c
 	.uleb128 0xe
-	.4byte	.LASF283
+	.4byte	.LASF288
 	.byte	0x15
-	.byte	0x5c
+	.byte	0x5a
 	.4byte	0x256
 	.byte	0x60
 	.uleb128 0xe
-	.4byte	.LASF284
+	.4byte	.LASF289
 	.byte	0x15
-	.byte	0x5e
+	.byte	0x5c
 	.4byte	0x128
 	.byte	0x64
 	.uleb128 0xe
-	.4byte	.LASF285
+	.4byte	.LASF290
 	.byte	0x15
-	.byte	0x5f
+	.byte	0x5d
 	.4byte	0x37
 	.byte	0x68
 	.uleb128 0xe
-	.4byte	.LASF286
+	.4byte	.LASF291
 	.byte	0x15
-	.byte	0x61
-	.4byte	0xeea
+	.byte	0x5f
+	.4byte	0xf0e
 	.byte	0x6c
 	.uleb128 0xf
 	.ascii	"jt\000"
 	.byte	0x15
-	.byte	0x63
-	.4byte	0xef5
+	.byte	0x61
+	.4byte	0xf19
 	.byte	0x70
 	.uleb128 0xe
-	.4byte	.LASF287
+	.4byte	.LASF292
 	.byte	0x15
-	.byte	0x64
-	.4byte	0xefb
+	.byte	0x62
+	.4byte	0xf1f
 	.byte	0x74
 	.uleb128 0xe
-	.4byte	.LASF288
+	.4byte	.LASF293
 	.byte	0x15
-	.byte	0x6e
+	.byte	0x6c
 	.4byte	0x7b
 	.byte	0x94
 	.uleb128 0xe
-	.4byte	.LASF289
+	.4byte	.LASF294
 	.byte	0x15
-	.byte	0x6f
+	.byte	0x6d
 	.4byte	0x7b
 	.byte	0x98
 	.uleb128 0xe
-	.4byte	.LASF290
+	.4byte	.LASF295
 	.byte	0x15
-	.byte	0x71
+	.byte	0x6f
 	.4byte	0x37
 	.byte	0x9c
 	.uleb128 0xe
-	.4byte	.LASF291
+	.4byte	.LASF296
 	.byte	0x15
-	.byte	0x72
+	.byte	0x70
 	.4byte	0x37
 	.byte	0xa0
 	.uleb128 0xe
-	.4byte	.LASF292
+	.4byte	.LASF297
 	.byte	0x15
-	.byte	0x73
+	.byte	0x71
 	.4byte	0x37
 	.byte	0xa4
 	.uleb128 0xe
-	.4byte	.LASF293
+	.4byte	.LASF298
 	.byte	0x15
-	.byte	0x7c
+	.byte	0x7a
 	.4byte	0x250
 	.byte	0xa8
 	.uleb128 0xe
 	.4byte	.LASF127
 	.byte	0x15
-	.byte	0x7d
-	.4byte	0xbd2
+	.byte	0x7b
+	.4byte	0xbea
 	.byte	0xb0
 	.uleb128 0xe
-	.4byte	.LASF294
+	.4byte	.LASF299
 	.byte	0x15
-	.byte	0x83
+	.byte	0x81
 	.4byte	0xfc
 	.byte	0xd0
 	.uleb128 0xe
-	.4byte	.LASF295
+	.4byte	.LASF300
 	.byte	0x15
-	.byte	0x84
+	.byte	0x82
 	.4byte	0xfc
 	.byte	0xd4
 	.uleb128 0xe
-	.4byte	.LASF296
+	.4byte	.LASF301
 	.byte	0x15
-	.byte	0x8a
+	.byte	0x88
 	.4byte	0xb5
 	.byte	0xd8
 	.uleb128 0xe
-	.4byte	.LASF297
+	.4byte	.LASF302
 	.byte	0x15
-	.byte	0x8f
-	.4byte	0xc33
+	.byte	0x8d
+	.4byte	0xc4b
 	.byte	0xdc
 	.uleb128 0xe
-	.4byte	.LASF298
+	.4byte	.LASF303
 	.byte	0x15
-	.byte	0x90
+	.byte	0x8e
 	.4byte	0xfc
-	.byte	0xec
+	.byte	0xf0
 	.uleb128 0xe
-	.4byte	.LASF299
+	.4byte	.LASF304
 	.byte	0x15
-	.byte	0x91
+	.byte	0x8f
 	.4byte	0x50
-	.byte	0xf0
+	.byte	0xf4
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0xc6f
+	.4byte	0xc93
 	.uleb128 0xd
-	.4byte	.LASF300
+	.4byte	.LASF305
 	.byte	0x20
 	.byte	0x16
 	.byte	0x2c
-	.4byte	0xee5
+	.4byte	0xf09
 	.uleb128 0xe
 	.4byte	.LASF28
 	.byte	0x16
@@ -2530,109 +2548,109 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0xd2
 	.byte	0x4
 	.uleb128 0xe
-	.4byte	.LASF301
+	.4byte	.LASF306
 	.byte	0x16
 	.byte	0x2f
-	.4byte	0x1220
+	.4byte	0x1244
 	.byte	0x8
 	.uleb128 0xe
-	.4byte	.LASF302
+	.4byte	.LASF307
 	.byte	0x16
 	.byte	0x30
 	.4byte	0xd2
 	.byte	0xc
 	.uleb128 0xe
-	.4byte	.LASF303
+	.4byte	.LASF308
 	.byte	0x16
 	.byte	0x32
-	.4byte	0x1268
+	.4byte	0x128c
 	.byte	0x10
 	.uleb128 0xe
 	.4byte	.LASF34
 	.byte	0x16
 	.byte	0x33
-	.4byte	0xeea
+	.4byte	0xf0e
 	.byte	0x14
 	.uleb128 0xe
-	.4byte	.LASF304
+	.4byte	.LASF309
 	.byte	0x16
 	.byte	0x34
-	.4byte	0xeea
+	.4byte	0xf0e
 	.byte	0x18
 	.uleb128 0xe
-	.4byte	.LASF305
+	.4byte	.LASF310
 	.byte	0x16
 	.byte	0x35
-	.4byte	0xeea
+	.4byte	0xf0e
 	.byte	0x1c
 	.byte	0
 	.uleb128 0x7
-	.4byte	0xe78
+	.4byte	0xe9c
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0xe78
+	.4byte	0xe9c
 	.uleb128 0x18
-	.4byte	.LASF307
+	.4byte	.LASF312
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0xef0
+	.4byte	0xf14
 	.uleb128 0xa
 	.4byte	0xd8
-	.4byte	0xf0b
+	.4byte	0xf2f
 	.uleb128 0x11
 	.4byte	0xcb
 	.byte	0x1f
 	.byte	0
 	.uleb128 0x2
-	.4byte	.LASF308
+	.4byte	.LASF313
 	.byte	0x15
-	.byte	0x9a
-	.4byte	0xc6f
+	.byte	0x98
+	.4byte	0xc93
 	.uleb128 0x25
-	.4byte	0xf0b
+	.4byte	0xf2f
 	.uleb128 0x4
-	.4byte	.LASF309
+	.4byte	.LASF314
 	.byte	0x2
 	.byte	0xad
 	.4byte	0xfc
 	.uleb128 0xa
 	.4byte	0x90
-	.4byte	0xf31
+	.4byte	0xf55
 	.uleb128 0xb
 	.byte	0
 	.uleb128 0x4
-	.4byte	.LASF310
+	.4byte	.LASF315
 	.byte	0x2
 	.byte	0xaf
-	.4byte	0xf26
+	.4byte	0xf4a
 	.uleb128 0x4
-	.4byte	.LASF311
+	.4byte	.LASF316
 	.byte	0x2
 	.byte	0xb0
-	.4byte	0xf26
+	.4byte	0xf4a
 	.uleb128 0x4
-	.4byte	.LASF312
+	.4byte	.LASF317
 	.byte	0x2
 	.byte	0xfe
 	.4byte	0xfc
 	.uleb128 0x4
-	.4byte	.LASF313
+	.4byte	.LASF318
 	.byte	0x2
 	.byte	0xff
 	.4byte	0xfc
 	.uleb128 0xc
-	.4byte	.LASF314
+	.4byte	.LASF319
 	.byte	0x2
 	.2byte	0x100
 	.4byte	0xfc
 	.uleb128 0xd
-	.4byte	.LASF315
+	.4byte	.LASF320
 	.byte	0x4
 	.byte	0x17
 	.byte	0x2e
-	.4byte	0xf82
+	.4byte	0xfa6
 	.uleb128 0xe
-	.4byte	.LASF316
+	.4byte	.LASF321
 	.byte	0x17
 	.byte	0x2f
 	.4byte	0x11d
@@ -2643,190 +2661,190 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x25
 	.uleb128 0x12
 	.4byte	0x50
-	.4byte	0xf97
+	.4byte	0xfbb
 	.uleb128 0x13
 	.4byte	0x250
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0xf88
+	.4byte	0xfac
 	.uleb128 0xa
 	.4byte	0x90
-	.4byte	0xfad
+	.4byte	0xfd1
 	.uleb128 0x11
 	.4byte	0xcb
 	.byte	0x5
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF317
+	.4byte	.LASF322
 	.byte	0x17
 	.2byte	0x1fd
-	.4byte	0xf69
+	.4byte	0xf8d
 	.uleb128 0xc
-	.4byte	.LASF318
+	.4byte	.LASF323
 	.byte	0x17
 	.2byte	0x1fe
-	.4byte	0xf69
+	.4byte	0xf8d
 	.uleb128 0xc
-	.4byte	.LASF319
+	.4byte	.LASF324
 	.byte	0x17
 	.2byte	0x200
-	.4byte	0xf69
+	.4byte	0xf8d
 	.uleb128 0xc
-	.4byte	.LASF320
+	.4byte	.LASF325
 	.byte	0x17
 	.2byte	0x205
-	.4byte	0xefb
+	.4byte	0xf1f
 	.uleb128 0xc
-	.4byte	.LASF321
+	.4byte	.LASF326
 	.byte	0x17
 	.2byte	0x206
-	.4byte	0xefb
+	.4byte	0xf1f
 	.uleb128 0xa
 	.4byte	0xd8
-	.4byte	0xff9
+	.4byte	0x101d
 	.uleb128 0x11
 	.4byte	0xcb
 	.byte	0x3f
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF322
+	.4byte	.LASF327
 	.byte	0x17
 	.2byte	0x207
-	.4byte	0xfe9
+	.4byte	0x100d
 	.uleb128 0xc
-	.4byte	.LASF323
+	.4byte	.LASF328
 	.byte	0x17
 	.2byte	0x209
-	.4byte	0xf9d
+	.4byte	0xfc1
 	.uleb128 0xc
-	.4byte	.LASF324
+	.4byte	.LASF329
 	.byte	0x17
 	.2byte	0x20a
-	.4byte	0xf9d
+	.4byte	0xfc1
 	.uleb128 0xc
-	.4byte	.LASF325
+	.4byte	.LASF330
 	.byte	0x17
 	.2byte	0x20b
-	.4byte	0xf69
+	.4byte	0xf8d
 	.uleb128 0xc
-	.4byte	.LASF326
+	.4byte	.LASF331
 	.byte	0x17
 	.2byte	0x20c
-	.4byte	0xf69
+	.4byte	0xf8d
 	.uleb128 0xc
-	.4byte	.LASF327
+	.4byte	.LASF332
 	.byte	0x17
 	.2byte	0x20d
-	.4byte	0xf82
+	.4byte	0xfa6
 	.uleb128 0xa
-	.4byte	0xf82
-	.4byte	0x1051
+	.4byte	0xfa6
+	.4byte	0x1075
 	.uleb128 0x11
 	.4byte	0xcb
 	.byte	0x3
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF328
+	.4byte	.LASF333
 	.byte	0x17
 	.2byte	0x20e
-	.4byte	0x1041
+	.4byte	0x1065
 	.uleb128 0xc
-	.4byte	.LASF329
+	.4byte	.LASF334
 	.byte	0x17
 	.2byte	0x20f
-	.4byte	0xf82
+	.4byte	0xfa6
 	.uleb128 0xc
-	.4byte	.LASF330
+	.4byte	.LASF335
 	.byte	0x17
 	.2byte	0x210
 	.4byte	0x50
 	.uleb128 0xa
 	.4byte	0x9a
-	.4byte	0x1085
+	.4byte	0x10a9
 	.uleb128 0x11
 	.4byte	0xcb
 	.byte	0x5
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x1075
+	.4byte	0x1099
 	.uleb128 0xc
-	.4byte	.LASF331
+	.4byte	.LASF336
 	.byte	0x17
 	.2byte	0x211
-	.4byte	0x1085
+	.4byte	0x10a9
 	.uleb128 0xc
-	.4byte	.LASF332
+	.4byte	.LASF337
 	.byte	0x17
 	.2byte	0x212
-	.4byte	0x1085
+	.4byte	0x10a9
 	.uleb128 0xc
-	.4byte	.LASF333
+	.4byte	.LASF338
 	.byte	0x17
 	.2byte	0x216
 	.4byte	0xf1
 	.uleb128 0xc
-	.4byte	.LASF334
+	.4byte	.LASF339
 	.byte	0x17
 	.2byte	0x217
 	.4byte	0xf1
 	.uleb128 0xc
-	.4byte	.LASF335
+	.4byte	.LASF340
 	.byte	0x17
 	.2byte	0x219
 	.4byte	0x50
 	.uleb128 0xa
 	.4byte	0xd8
-	.4byte	0x10d7
+	.4byte	0x10fb
 	.uleb128 0x17
 	.4byte	0xcb
 	.2byte	0x3ff
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF336
+	.4byte	.LASF341
 	.byte	0x17
 	.2byte	0x220
-	.4byte	0x10c6
+	.4byte	0x10ea
 	.uleb128 0xc
-	.4byte	.LASF337
+	.4byte	.LASF342
 	.byte	0x17
 	.2byte	0x222
 	.4byte	0x9f
 	.uleb128 0xc
-	.4byte	.LASF338
+	.4byte	.LASF343
 	.byte	0x17
 	.2byte	0x224
 	.4byte	0x9f
 	.uleb128 0xc
-	.4byte	.LASF339
+	.4byte	.LASF344
 	.byte	0x17
 	.2byte	0x230
-	.4byte	0xf69
+	.4byte	0xf8d
 	.uleb128 0x26
-	.4byte	.LASF341
+	.4byte	.LASF346
 	.byte	0x4
 	.4byte	0x7b
 	.byte	0x17
 	.2byte	0x286
-	.4byte	0x1131
+	.4byte	0x1155
 	.uleb128 0x22
-	.4byte	.LASF342
+	.4byte	.LASF347
 	.byte	0
 	.uleb128 0x22
-	.4byte	.LASF343
+	.4byte	.LASF348
 	.byte	0x1
 	.uleb128 0x22
-	.4byte	.LASF344
+	.4byte	.LASF349
 	.byte	0x2
 	.uleb128 0x22
-	.4byte	.LASF345
+	.4byte	.LASF350
 	.byte	0x3
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF346
+	.4byte	.LASF351
 	.byte	0x17
 	.2byte	0x28c
-	.4byte	0x1107
+	.4byte	0x112b
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0x9f
@@ -2835,7 +2853,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x44
 	.byte	0x8
 	.byte	0xee
-	.4byte	0x121b
+	.4byte	0x123f
 	.uleb128 0xe
 	.4byte	.LASF28
 	.byte	0x8
@@ -2849,79 +2867,79 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x980
 	.byte	0x4
 	.uleb128 0xe
-	.4byte	.LASF347
+	.4byte	.LASF352
 	.byte	0x8
 	.byte	0xf1
-	.4byte	0x1372
+	.4byte	0x1396
 	.byte	0x8
 	.uleb128 0xe
-	.4byte	.LASF348
+	.4byte	.LASF353
 	.byte	0x8
 	.byte	0xf2
-	.4byte	0xf97
+	.4byte	0xfbb
 	.byte	0xc
 	.uleb128 0xe
-	.4byte	.LASF349
+	.4byte	.LASF354
 	.byte	0x8
 	.byte	0xf3
-	.4byte	0xf97
+	.4byte	0xfbb
 	.byte	0x10
 	.uleb128 0xe
-	.4byte	.LASF350
+	.4byte	.LASF355
 	.byte	0x8
 	.byte	0xf4
-	.4byte	0xf97
+	.4byte	0xfbb
 	.byte	0x14
 	.uleb128 0xe
-	.4byte	.LASF351
+	.4byte	.LASF356
 	.byte	0x8
 	.byte	0xf5
-	.4byte	0xf97
+	.4byte	0xfbb
 	.byte	0x18
 	.uleb128 0xe
-	.4byte	.LASF352
+	.4byte	.LASF357
 	.byte	0x8
 	.byte	0xf6
-	.4byte	0xf97
+	.4byte	0xfbb
 	.byte	0x1c
 	.uleb128 0xe
-	.4byte	.LASF353
+	.4byte	.LASF358
 	.byte	0x8
 	.byte	0xf7
-	.4byte	0xf97
+	.4byte	0xfbb
 	.byte	0x20
 	.uleb128 0xe
-	.4byte	.LASF354
+	.4byte	.LASF359
 	.byte	0x8
 	.byte	0xf8
-	.4byte	0xf97
+	.4byte	0xfbb
 	.byte	0x24
 	.uleb128 0xe
-	.4byte	.LASF355
+	.4byte	.LASF360
 	.byte	0x8
 	.byte	0xf9
-	.4byte	0xf97
+	.4byte	0xfbb
 	.byte	0x28
 	.uleb128 0xe
-	.4byte	.LASF356
+	.4byte	.LASF361
 	.byte	0x8
 	.byte	0xfa
 	.4byte	0x50
 	.byte	0x2c
 	.uleb128 0xe
-	.4byte	.LASF357
+	.4byte	.LASF362
 	.byte	0x8
 	.byte	0xfb
 	.4byte	0x50
 	.byte	0x30
 	.uleb128 0xe
-	.4byte	.LASF358
+	.4byte	.LASF363
 	.byte	0x8
 	.byte	0xfc
 	.4byte	0x50
 	.byte	0x34
 	.uleb128 0xe
-	.4byte	.LASF359
+	.4byte	.LASF364
 	.byte	0x8
 	.byte	0xfd
 	.4byte	0x50
@@ -2940,18 +2958,18 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x1143
+	.4byte	0x1167
 	.uleb128 0x2
-	.4byte	.LASF301
+	.4byte	.LASF306
 	.byte	0x16
 	.byte	0xf
 	.4byte	0x9f
 	.uleb128 0xd
-	.4byte	.LASF360
+	.4byte	.LASF365
 	.byte	0x10
 	.byte	0x16
 	.byte	0x19
-	.4byte	0x1268
+	.4byte	0x128c
 	.uleb128 0xe
 	.4byte	.LASF28
 	.byte	0x16
@@ -2959,13 +2977,13 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0xeb
 	.byte	0
 	.uleb128 0xe
-	.4byte	.LASF361
+	.4byte	.LASF366
 	.byte	0x16
 	.byte	0x1b
 	.4byte	0x50
 	.byte	0x4
 	.uleb128 0xe
-	.4byte	.LASF362
+	.4byte	.LASF367
 	.byte	0x16
 	.byte	0x1c
 	.4byte	0x128
@@ -2974,66 +2992,66 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LASF47
 	.byte	0x16
 	.byte	0x1d
-	.4byte	0x1268
+	.4byte	0x128c
 	.byte	0xc
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x122b
+	.4byte	0x124f
 	.uleb128 0x27
 	.ascii	"gd\000"
 	.byte	0x16
 	.byte	0x57
-	.4byte	0x1278
+	.4byte	0x129c
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0xf16
+	.4byte	0xf3a
 	.uleb128 0x28
-	.4byte	.LASF423
+	.4byte	.LASF428
 	.byte	0x4
 	.byte	0x19
 	.byte	0x33
-	.4byte	0x12a0
+	.4byte	0x12c4
 	.uleb128 0x29
 	.ascii	"np\000"
 	.byte	0x19
 	.byte	0x34
-	.4byte	0x12a0
+	.4byte	0x12c4
 	.uleb128 0x2a
-	.4byte	.LASF363
+	.4byte	.LASF368
 	.byte	0x19
 	.byte	0x35
 	.4byte	0xe4
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0xee5
+	.4byte	0xf09
 	.uleb128 0x2
-	.4byte	.LASF364
+	.4byte	.LASF369
 	.byte	0x19
 	.byte	0x36
-	.4byte	0x127e
+	.4byte	0x12a2
 	.uleb128 0xc
-	.4byte	.LASF365
+	.4byte	.LASF370
 	.byte	0x1a
 	.2byte	0x3ba
 	.4byte	0xfc
 	.uleb128 0xc
-	.4byte	.LASF366
+	.4byte	.LASF371
 	.byte	0x1a
 	.2byte	0x3bb
 	.4byte	0xfc
 	.uleb128 0xc
-	.4byte	.LASF367
+	.4byte	.LASF372
 	.byte	0x1a
 	.2byte	0x3bc
 	.4byte	0xfc
 	.uleb128 0xd
-	.4byte	.LASF368
+	.4byte	.LASF373
 	.byte	0x4
 	.byte	0x1b
 	.byte	0xd
-	.4byte	0x12ee
+	.4byte	0x1312
 	.uleb128 0xf
 	.ascii	"pid\000"
 	.byte	0x1b
@@ -3042,22 +3060,22 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.byte	0
 	.uleb128 0x4
-	.4byte	.LASF369
+	.4byte	.LASF374
 	.byte	0x1b
 	.byte	0x11
-	.4byte	0x12f9
+	.4byte	0x131d
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x12d5
+	.4byte	0x12f9
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x121b
+	.4byte	0x123f
 	.uleb128 0xd
 	.4byte	.LASF36
 	.byte	0x18
 	.byte	0x1c
 	.byte	0x23
-	.4byte	0x1342
+	.4byte	0x1366
 	.uleb128 0xe
 	.4byte	.LASF35
 	.byte	0x1c
@@ -3065,13 +3083,13 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x128
 	.byte	0
 	.uleb128 0xe
-	.4byte	.LASF370
+	.4byte	.LASF375
 	.byte	0x1c
 	.byte	0x25
-	.4byte	0x145c
+	.4byte	0x1480
 	.byte	0x4
 	.uleb128 0xe
-	.4byte	.LASF371
+	.4byte	.LASF376
 	.byte	0x1c
 	.byte	0x26
 	.4byte	0x283
@@ -3085,37 +3103,37 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x1305
+	.4byte	0x1329
 	.uleb128 0xd
-	.4byte	.LASF372
+	.4byte	.LASF377
 	.byte	0x8
 	.byte	0x8
 	.byte	0xb5
-	.4byte	0x136d
+	.4byte	0x1391
 	.uleb128 0xe
-	.4byte	.LASF373
+	.4byte	.LASF378
 	.byte	0x8
 	.byte	0xb6
 	.4byte	0xd2
 	.byte	0
 	.uleb128 0xe
-	.4byte	.LASF374
+	.4byte	.LASF379
 	.byte	0x8
 	.byte	0xb7
 	.4byte	0xfc
 	.byte	0x4
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x1348
+	.4byte	0x136c
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x136d
+	.4byte	0x1391
 	.uleb128 0xd
-	.4byte	.LASF375
+	.4byte	.LASF380
 	.byte	0x48
 	.byte	0x1c
 	.byte	0x54
-	.4byte	0x145c
+	.4byte	0x1480
 	.uleb128 0xe
 	.4byte	.LASF28
 	.byte	0x1c
@@ -3129,85 +3147,85 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x980
 	.byte	0x4
 	.uleb128 0xe
-	.4byte	.LASF376
+	.4byte	.LASF381
 	.byte	0x1c
 	.byte	0x57
-	.4byte	0xf97
+	.4byte	0xfbb
 	.byte	0x8
 	.uleb128 0xe
-	.4byte	.LASF377
+	.4byte	.LASF382
 	.byte	0x1c
 	.byte	0x58
-	.4byte	0xf97
+	.4byte	0xfbb
 	.byte	0xc
 	.uleb128 0xe
-	.4byte	.LASF378
+	.4byte	.LASF383
 	.byte	0x1c
 	.byte	0x59
-	.4byte	0xf97
+	.4byte	0xfbb
 	.byte	0x10
 	.uleb128 0xe
-	.4byte	.LASF379
+	.4byte	.LASF384
 	.byte	0x1c
 	.byte	0x5a
-	.4byte	0xf97
+	.4byte	0xfbb
 	.byte	0x14
 	.uleb128 0xe
-	.4byte	.LASF380
+	.4byte	.LASF385
 	.byte	0x1c
 	.byte	0x5b
-	.4byte	0xf97
+	.4byte	0xfbb
 	.byte	0x18
 	.uleb128 0xe
-	.4byte	.LASF353
+	.4byte	.LASF358
 	.byte	0x1c
 	.byte	0x5c
-	.4byte	0xf97
+	.4byte	0xfbb
 	.byte	0x1c
 	.uleb128 0xe
-	.4byte	.LASF354
+	.4byte	.LASF359
 	.byte	0x1c
 	.byte	0x5d
-	.4byte	0xf97
+	.4byte	0xfbb
 	.byte	0x20
 	.uleb128 0xe
-	.4byte	.LASF381
+	.4byte	.LASF386
 	.byte	0x1c
 	.byte	0x5e
-	.4byte	0x1471
+	.4byte	0x1495
 	.byte	0x24
 	.uleb128 0xe
-	.4byte	.LASF382
+	.4byte	.LASF387
 	.byte	0x1c
 	.byte	0x5f
-	.4byte	0x1471
+	.4byte	0x1495
 	.byte	0x28
 	.uleb128 0xe
-	.4byte	.LASF356
+	.4byte	.LASF361
 	.byte	0x1c
 	.byte	0x60
 	.4byte	0x50
 	.byte	0x2c
 	.uleb128 0xe
-	.4byte	.LASF383
+	.4byte	.LASF388
 	.byte	0x1c
 	.byte	0x61
 	.4byte	0x50
 	.byte	0x30
 	.uleb128 0xe
-	.4byte	.LASF384
+	.4byte	.LASF389
 	.byte	0x1c
 	.byte	0x62
 	.4byte	0x50
 	.byte	0x34
 	.uleb128 0xe
-	.4byte	.LASF358
+	.4byte	.LASF363
 	.byte	0x1c
 	.byte	0x63
 	.4byte	0x50
 	.byte	0x38
 	.uleb128 0xe
-	.4byte	.LASF359
+	.4byte	.LASF364
 	.byte	0x1c
 	.byte	0x64
 	.4byte	0x50
@@ -3227,80 +3245,80 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x1378
+	.4byte	0x139c
 	.uleb128 0x12
 	.4byte	0x50
-	.4byte	0x1471
+	.4byte	0x1495
 	.uleb128 0x13
-	.4byte	0x1342
+	.4byte	0x1366
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x1462
+	.4byte	0x1486
 	.uleb128 0x4
-	.4byte	.LASF385
+	.4byte	.LASF390
 	.byte	0x1d
 	.byte	0x49
 	.4byte	0x7b
 	.uleb128 0x21
-	.4byte	.LASF386
+	.4byte	.LASF391
 	.byte	0x4
 	.4byte	0x7b
 	.byte	0x1e
-	.byte	0x14
-	.4byte	0x14b1
+	.byte	0x15
+	.4byte	0x14d5
 	.uleb128 0x22
-	.4byte	.LASF387
+	.4byte	.LASF392
 	.byte	0x1
 	.uleb128 0x22
-	.4byte	.LASF388
+	.4byte	.LASF393
 	.byte	0x2
 	.uleb128 0x22
-	.4byte	.LASF389
+	.4byte	.LASF394
 	.byte	0x4
 	.uleb128 0x22
-	.4byte	.LASF390
+	.4byte	.LASF395
 	.byte	0x8
 	.uleb128 0x22
-	.4byte	.LASF391
+	.4byte	.LASF396
 	.byte	0x10
 	.byte	0
 	.uleb128 0xd
-	.4byte	.LASF392
+	.4byte	.LASF397
 	.byte	0x10
 	.byte	0x1e
-	.byte	0x60
-	.4byte	0x14ee
+	.byte	0x61
+	.4byte	0x1512
 	.uleb128 0xe
-	.4byte	.LASF393
+	.4byte	.LASF398
 	.byte	0x1e
-	.byte	0x6a
-	.4byte	0x1511
+	.byte	0x6b
+	.4byte	0x1535
 	.byte	0
 	.uleb128 0xe
-	.4byte	.LASF394
+	.4byte	.LASF399
 	.byte	0x1e
-	.byte	0x74
-	.4byte	0x1535
+	.byte	0x75
+	.4byte	0x1559
 	.byte	0x4
 	.uleb128 0xe
-	.4byte	.LASF395
+	.4byte	.LASF400
 	.byte	0x1e
-	.byte	0x7e
-	.4byte	0x1554
+	.byte	0x7f
+	.4byte	0x1578
 	.byte	0x8
 	.uleb128 0xe
-	.4byte	.LASF396
+	.4byte	.LASF401
 	.byte	0x1e
-	.byte	0x8b
-	.4byte	0x1582
+	.byte	0x8c
+	.4byte	0x15a6
 	.byte	0xc
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x14b1
+	.4byte	0x14d5
 	.uleb128 0x12
 	.4byte	0x50
-	.4byte	0x1511
+	.4byte	0x1535
 	.uleb128 0x13
 	.4byte	0x250
 	.uleb128 0x13
@@ -3312,10 +3330,10 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x14f3
+	.4byte	0x1517
 	.uleb128 0x12
 	.4byte	0x50
-	.4byte	0x1535
+	.4byte	0x1559
 	.uleb128 0x13
 	.4byte	0x250
 	.uleb128 0x13
@@ -3327,10 +3345,10 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x1517
+	.4byte	0x153b
 	.uleb128 0x12
 	.4byte	0x50
-	.4byte	0x1554
+	.4byte	0x1578
 	.uleb128 0x13
 	.4byte	0x250
 	.uleb128 0x13
@@ -3340,10 +3358,10 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x153b
+	.4byte	0x155f
 	.uleb128 0x12
 	.4byte	0x50
-	.4byte	0x1582
+	.4byte	0x15a6
 	.uleb128 0x13
 	.4byte	0x250
 	.uleb128 0x13
@@ -3359,13 +3377,13 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x155a
+	.4byte	0x157e
 	.uleb128 0xd
-	.4byte	.LASF397
+	.4byte	.LASF402
 	.byte	0x8
 	.byte	0x1f
 	.byte	0x36
-	.4byte	0x15ad
+	.4byte	0x15d1
 	.uleb128 0xe
 	.4byte	.LASF60
 	.byte	0x1f
@@ -3373,55 +3391,55 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x128
 	.byte	0
 	.uleb128 0xe
-	.4byte	.LASF398
+	.4byte	.LASF403
 	.byte	0x1f
 	.byte	0x38
 	.4byte	0x37
 	.byte	0x4
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF399
+	.4byte	.LASF404
 	.byte	0x1
 	.byte	0xbb
-	.4byte	0x14ee
+	.4byte	0x1512
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	rockchip_secure_otp_ops
 	.uleb128 0xa
-	.4byte	0x136d
-	.4byte	0x15ce
+	.4byte	0x1391
+	.4byte	0x15f2
 	.uleb128 0x11
 	.4byte	0xcb
 	.byte	0x1
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x15be
+	.4byte	0x15e2
 	.uleb128 0x2b
-	.4byte	.LASF400
+	.4byte	.LASF405
 	.byte	0x1
 	.byte	0xcc
-	.4byte	0x15ce
+	.4byte	0x15f2
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	rockchip_otp_ids
 	.uleb128 0x2c
-	.4byte	.LASF401
+	.4byte	.LASF406
 	.byte	0x1
 	.byte	0xd3
-	.4byte	0x1143
+	.4byte	0x1167
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	_u_boot_list_2_driver_2_rockchip_secure_otp_v2
+	.4byte	_u_boot_list_2_driver_2_rockchip_secure_otp
 	.uleb128 0x2d
-	.4byte	.LASF402
+	.4byte	.LASF407
 	.byte	0x1
 	.byte	0xc1
 	.4byte	0x50
-	.4byte	.LFB269
-	.4byte	.LFE269-.LFB269
+	.4byte	.LFB271
+	.4byte	.LFE271-.LFB271
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1673
+	.4byte	0x1697
 	.uleb128 0x2e
 	.ascii	"dev\000"
 	.byte	0x1
@@ -3432,12 +3450,12 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"otp\000"
 	.byte	0x1
 	.byte	0xc3
-	.4byte	0x1673
+	.4byte	0x1697
 	.4byte	.LLST19
 	.uleb128 0x30
 	.4byte	.LVL31
-	.4byte	0x1bae
-	.4byte	0x1640
+	.4byte	0x1bd2
+	.4byte	0x1664
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
@@ -3447,8 +3465,8 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x30
 	.4byte	.LVL34
-	.4byte	0x1bba
-	.4byte	0x1654
+	.4byte	0x1bde
+	.4byte	0x1678
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
@@ -3458,7 +3476,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL35
-	.4byte	0x1bc5
+	.4byte	0x1be9
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
@@ -3480,17 +3498,17 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x1588
+	.4byte	0x15ac
 	.uleb128 0x2d
-	.4byte	.LASF403
+	.4byte	.LASF408
 	.byte	0x1
 	.byte	0xaa
 	.4byte	0x50
-	.4byte	.LFB268
-	.4byte	.LFE268-.LFB268
+	.4byte	.LFB270
+	.4byte	.LFE270-.LFB270
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x16e4
+	.4byte	0x1708
 	.uleb128 0x2e
 	.ascii	"dev\000"
 	.byte	0x1
@@ -3498,7 +3516,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x250
 	.4byte	.LLST0
 	.uleb128 0x33
-	.4byte	.LASF404
+	.4byte	.LASF409
 	.byte	0x1
 	.byte	0xaa
 	.4byte	0x37
@@ -3518,39 +3536,39 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x50
 	.4byte	.LLST1
 	.uleb128 0x35
-	.4byte	0x16e4
+	.4byte	0x1708
 	.4byte	.LBB18
 	.4byte	.Ldebug_ranges0+0
 	.byte	0x1
 	.byte	0xb2
 	.uleb128 0x36
-	.4byte	0x16f4
+	.4byte	0x1718
 	.4byte	.LLST2
 	.byte	0
 	.byte	0
 	.uleb128 0x37
-	.4byte	.LASF408
+	.4byte	.LASF413
 	.byte	0x1
 	.byte	0xa3
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x1700
+	.4byte	0x1724
 	.uleb128 0x38
 	.ascii	"buf\000"
 	.byte	0x1
 	.byte	0xa3
-	.4byte	0x113d
+	.4byte	0x1161
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF405
+	.4byte	.LASF410
 	.byte	0x1
 	.byte	0x70
 	.4byte	0x50
-	.4byte	.LFB266
-	.4byte	.LFE266-.LFB266
+	.4byte	.LFB268
+	.4byte	.LFE268-.LFB268
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x193f
+	.4byte	0x1963
 	.uleb128 0x2e
 	.ascii	"dev\000"
 	.byte	0x1
@@ -3558,7 +3576,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x250
 	.4byte	.LLST20
 	.uleb128 0x39
-	.4byte	.LASF406
+	.4byte	.LASF411
 	.byte	0x1
 	.byte	0x70
 	.4byte	0x50
@@ -3579,7 +3597,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"otp\000"
 	.byte	0x1
 	.byte	0x73
-	.4byte	0x1673
+	.4byte	0x1697
 	.4byte	.LLST24
 	.uleb128 0x2f
 	.ascii	"i\000"
@@ -3599,14 +3617,14 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x50
 	.4byte	.LLST26
 	.uleb128 0x2b
-	.4byte	.LASF374
+	.4byte	.LASF379
 	.byte	0x1
 	.byte	0x75
 	.4byte	0xeb
 	.uleb128 0x1
 	.byte	0x5a
 	.uleb128 0x3b
-	.4byte	.LASF407
+	.4byte	.LASF412
 	.byte	0x1
 	.byte	0x76
 	.4byte	0xeb
@@ -3614,7 +3632,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x3c
 	.4byte	.LBB39
 	.4byte	.LBE39-.LBB39
-	.4byte	0x17c2
+	.4byte	0x17e6
 	.uleb128 0x2f
 	.ascii	"__v\000"
 	.byte	0x1
@@ -3625,7 +3643,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x3c
 	.4byte	.LBB54
 	.4byte	.LBE54-.LBB54
-	.4byte	0x17df
+	.4byte	0x1803
 	.uleb128 0x2f
 	.ascii	"__v\000"
 	.byte	0x1
@@ -3636,7 +3654,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x3c
 	.4byte	.LBB51
 	.4byte	.LBE51-.LBB51
-	.4byte	0x17fc
+	.4byte	0x1820
 	.uleb128 0x2f
 	.ascii	"__v\000"
 	.byte	0x1
@@ -3645,74 +3663,74 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LLST39
 	.byte	0
 	.uleb128 0x3d
-	.4byte	0x193f
+	.4byte	0x1963
 	.4byte	.LBB40
 	.4byte	.Ldebug_ranges0+0x30
 	.byte	0x1
 	.byte	0x96
-	.4byte	0x18dd
+	.4byte	0x1901
 	.uleb128 0x3e
-	.4byte	0x194f
+	.4byte	0x1973
 	.uleb128 0x36
-	.4byte	0x1970
+	.4byte	0x1994
 	.4byte	.LLST29
 	.uleb128 0x36
-	.4byte	0x1965
+	.4byte	0x1989
 	.4byte	.LLST30
 	.uleb128 0x36
-	.4byte	0x195a
+	.4byte	0x197e
 	.4byte	.LLST31
 	.uleb128 0x3f
 	.4byte	.Ldebug_ranges0+0x30
 	.uleb128 0x40
-	.4byte	0x1979
+	.4byte	0x199d
 	.4byte	.LLST32
 	.uleb128 0x40
-	.4byte	0x1984
+	.4byte	0x19a8
 	.4byte	.LLST33
 	.uleb128 0x41
 	.4byte	.Ldebug_ranges0+0x58
-	.4byte	0x1859
+	.4byte	0x187d
 	.uleb128 0x40
-	.4byte	0x19c7
+	.4byte	0x19eb
 	.4byte	.LLST34
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LBB43
 	.4byte	.LBE43-.LBB43
-	.4byte	0x1870
+	.4byte	0x1894
 	.uleb128 0x40
-	.4byte	0x1994
+	.4byte	0x19b8
 	.4byte	.LLST35
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LBB44
 	.4byte	.LBE44-.LBB44
-	.4byte	0x1887
+	.4byte	0x18ab
 	.uleb128 0x40
-	.4byte	0x19a5
+	.4byte	0x19c9
 	.4byte	.LLST36
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LBB45
 	.4byte	.LBE45-.LBB45
-	.4byte	0x189e
+	.4byte	0x18c2
 	.uleb128 0x40
-	.4byte	0x19b6
+	.4byte	0x19da
 	.4byte	.LLST37
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LBB47
 	.4byte	.LBE47-.LBB47
-	.4byte	0x18b5
+	.4byte	0x18d9
 	.uleb128 0x40
-	.4byte	0x19d4
+	.4byte	0x19f8
 	.4byte	.LLST38
 	.byte	0
 	.uleb128 0x30
 	.4byte	.LVL61
-	.4byte	0x1bd0
-	.4byte	0x18cc
+	.4byte	0x1bf4
+	.4byte	0x18f0
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
@@ -3722,7 +3740,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL74
-	.4byte	0x1bdb
+	.4byte	0x1bff
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
@@ -3733,8 +3751,8 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x30
 	.4byte	.LVL38
-	.4byte	0x1bae
-	.4byte	0x18f1
+	.4byte	0x1bd2
+	.4byte	0x1915
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
@@ -3744,8 +3762,8 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x30
 	.4byte	.LVL41
-	.4byte	0x1be6
-	.4byte	0x1905
+	.4byte	0x1c0a
+	.4byte	0x1929
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
@@ -3755,8 +3773,8 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x30
 	.4byte	.LVL45
-	.4byte	0x19e1
-	.4byte	0x192b
+	.4byte	0x1a05
+	.4byte	0x194f
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
@@ -3784,7 +3802,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL56
-	.4byte	0x1bd0
+	.4byte	0x1bf4
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
@@ -3794,24 +3812,24 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.byte	0
 	.uleb128 0x37
-	.4byte	.LASF409
+	.4byte	.LASF414
 	.byte	0x1
 	.byte	0x47
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x19e1
+	.4byte	0x1a05
 	.uleb128 0x38
 	.ascii	"otp\000"
 	.byte	0x1
 	.byte	0x47
-	.4byte	0x1673
+	.4byte	0x1697
 	.uleb128 0x42
-	.4byte	.LASF406
+	.4byte	.LASF411
 	.byte	0x1
 	.byte	0x48
 	.4byte	0x50
 	.uleb128 0x42
-	.4byte	.LASF374
+	.4byte	.LASF379
 	.byte	0x1
 	.byte	0x48
 	.4byte	0x90
@@ -3821,17 +3839,17 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x48
 	.4byte	0x50
 	.uleb128 0x43
-	.4byte	.LASF410
+	.4byte	.LASF415
 	.byte	0x1
 	.byte	0x4a
 	.4byte	0x50
 	.uleb128 0x43
-	.4byte	.LASF411
+	.4byte	.LASF416
 	.byte	0x1
 	.byte	0x4b
 	.4byte	0x9f
 	.uleb128 0x44
-	.4byte	0x19a0
+	.4byte	0x19c4
 	.uleb128 0x3a
 	.ascii	"__v\000"
 	.byte	0x1
@@ -3839,7 +3857,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x9f
 	.byte	0
 	.uleb128 0x44
-	.4byte	0x19b1
+	.4byte	0x19d5
 	.uleb128 0x3a
 	.ascii	"__v\000"
 	.byte	0x1
@@ -3847,7 +3865,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x9f
 	.byte	0
 	.uleb128 0x44
-	.4byte	0x19c2
+	.4byte	0x19e6
 	.uleb128 0x3a
 	.ascii	"__v\000"
 	.byte	0x1
@@ -3855,7 +3873,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x9f
 	.byte	0
 	.uleb128 0x44
-	.4byte	0x19d3
+	.4byte	0x19f7
 	.uleb128 0x3a
 	.ascii	"__v\000"
 	.byte	0x1
@@ -3871,15 +3889,15 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF412
+	.4byte	.LASF417
 	.byte	0x1
 	.byte	0xf
 	.4byte	0x50
-	.4byte	.LFB264
-	.4byte	.LFE264-.LFB264
+	.4byte	.LFB266
+	.4byte	.LFE266-.LFB266
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1b94
+	.4byte	0x1bb8
 	.uleb128 0x2e
 	.ascii	"dev\000"
 	.byte	0x1
@@ -3887,7 +3905,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x250
 	.4byte	.LLST3
 	.uleb128 0x39
-	.4byte	.LASF406
+	.4byte	.LASF411
 	.byte	0x1
 	.byte	0xf
 	.4byte	0x50
@@ -3908,7 +3926,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"otp\000"
 	.byte	0x1
 	.byte	0x12
-	.4byte	0x1673
+	.4byte	0x1697
 	.4byte	.LLST7
 	.uleb128 0x2f
 	.ascii	"i\000"
@@ -3917,7 +3935,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x50
 	.4byte	.LLST8
 	.uleb128 0x3b
-	.4byte	.LASF410
+	.4byte	.LASF415
 	.byte	0x1
 	.byte	0x13
 	.4byte	0x50
@@ -3935,19 +3953,19 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x50
 	.4byte	.LLST11
 	.uleb128 0x3b
-	.4byte	.LASF374
+	.4byte	.LASF379
 	.byte	0x1
 	.byte	0x14
 	.4byte	0xeb
 	.4byte	.LLST12
 	.uleb128 0x3b
-	.4byte	.LASF411
+	.4byte	.LASF416
 	.byte	0x1
 	.byte	0x15
 	.4byte	0x9f
 	.4byte	.LLST13
 	.uleb128 0x3b
-	.4byte	.LASF413
+	.4byte	.LASF418
 	.byte	0x1
 	.byte	0x16
 	.4byte	0x50
@@ -3960,7 +3978,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x3c
 	.4byte	.LBB22
 	.4byte	.LBE22-.LBB22
-	.4byte	0x1acf
+	.4byte	0x1af3
 	.uleb128 0x47
 	.ascii	"__v\000"
 	.byte	0x1
@@ -3971,7 +3989,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x3c
 	.4byte	.LBB25
 	.4byte	.LBE25-.LBB25
-	.4byte	0x1aec
+	.4byte	0x1b10
 	.uleb128 0x2f
 	.ascii	"__v\000"
 	.byte	0x1
@@ -3981,7 +3999,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x41
 	.4byte	.Ldebug_ranges0+0x18
-	.4byte	0x1b02
+	.4byte	0x1b26
 	.uleb128 0x47
 	.ascii	"__v\000"
 	.byte	0x1
@@ -3992,7 +4010,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x3c
 	.4byte	.LBB27
 	.4byte	.LBE27-.LBB27
-	.4byte	0x1b1f
+	.4byte	0x1b43
 	.uleb128 0x2f
 	.ascii	"__v\000"
 	.byte	0x1
@@ -4003,7 +4021,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x3c
 	.4byte	.LBB28
 	.4byte	.LBE28-.LBB28
-	.4byte	0x1b3a
+	.4byte	0x1b5e
 	.uleb128 0x48
 	.ascii	"__v\000"
 	.byte	0x1
@@ -4015,7 +4033,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x3c
 	.4byte	.LBB24
 	.4byte	.LBE24-.LBB24
-	.4byte	0x1b57
+	.4byte	0x1b7b
 	.uleb128 0x2f
 	.ascii	"__v\000"
 	.byte	0x1
@@ -4025,8 +4043,8 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x30
 	.4byte	.LVL6
-	.4byte	0x1bae
-	.4byte	0x1b6c
+	.4byte	0x1bd2
+	.4byte	0x1b90
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
@@ -4037,8 +4055,8 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x30
 	.4byte	.LVL16
-	.4byte	0x1bd0
-	.4byte	0x1b83
+	.4byte	0x1bf4
+	.4byte	0x1ba7
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
@@ -4048,7 +4066,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL24
-	.4byte	0x1bdb
+	.4byte	0x1bff
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
@@ -4058,11 +4076,11 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF424
+	.4byte	.LASF429
 	.byte	0x1a
 	.2byte	0x36f
 	.byte	0x3
-	.4byte	0x1bae
+	.4byte	0x1bd2
 	.uleb128 0x4a
 	.ascii	"ptr\000"
 	.byte	0x1a
@@ -4070,33 +4088,33 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x128
 	.byte	0
 	.uleb128 0x4b
-	.4byte	.LASF414
-	.4byte	.LASF414
+	.4byte	.LASF419
+	.4byte	.LASF419
 	.byte	0x8
 	.2byte	0x112
 	.uleb128 0x4c
-	.4byte	.LASF415
-	.4byte	.LASF415
+	.4byte	.LASF420
+	.4byte	.LASF420
 	.byte	0x20
 	.byte	0x85
 	.uleb128 0x4c
-	.4byte	.LASF416
-	.4byte	.LASF416
+	.4byte	.LASF421
+	.4byte	.LASF421
 	.byte	0x20
 	.byte	0x38
 	.uleb128 0x4c
-	.4byte	.LASF417
-	.4byte	.LASF417
+	.4byte	.LASF422
+	.4byte	.LASF422
 	.byte	0x21
 	.byte	0x13
 	.uleb128 0x4c
-	.4byte	.LASF418
-	.4byte	.LASF418
+	.4byte	.LASF423
+	.4byte	.LASF423
 	.byte	0x22
 	.byte	0xb
 	.uleb128 0x4b
-	.4byte	.LASF419
-	.4byte	.LASF419
+	.4byte	.LASF424
+	.4byte	.LASF424
 	.byte	0x1a
 	.2byte	0x393
 	.byte	0
@@ -5089,7 +5107,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x55
 	.4byte	.LVL36
-	.4byte	.LFE269
+	.4byte	.LFE271
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -5114,7 +5132,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL2
-	.4byte	.LFE268
+	.4byte	.LFE270
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -5130,7 +5148,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0xea
 	.byte	0x9f
 	.4byte	.LVL4
-	.4byte	.LFE268
+	.4byte	.LFE270
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xea
@@ -5165,7 +5183,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x56
 	.4byte	.LVL46
-	.4byte	.LFE266
+	.4byte	.LFE268
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -5179,7 +5197,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x51
 	.4byte	.LVL38-1
-	.4byte	.LFE266
+	.4byte	.LFE268
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
@@ -5190,7 +5208,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x52
 	.4byte	.LVL38-1
-	.4byte	.LFE266
+	.4byte	.LFE268
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
@@ -5201,7 +5219,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x53
 	.4byte	.LVL38-1
-	.4byte	.LFE266
+	.4byte	.LFE268
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
@@ -5212,7 +5230,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL40
-	.4byte	.LFE266
+	.4byte	.LFE268
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
@@ -5235,7 +5253,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x53
 	.4byte	.LVL59
-	.4byte	.LFE266
+	.4byte	.LFE268
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
@@ -5262,7 +5280,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL59
-	.4byte	.LFE266
+	.4byte	.LFE268
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
@@ -5293,7 +5311,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x30
 	.byte	0x9f
 	.4byte	.LVL59
-	.4byte	.LFE266
+	.4byte	.LFE268
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
@@ -5432,7 +5450,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL6-1
-	.4byte	.LFE264
+	.4byte	.LFE266
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -5446,7 +5464,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x51
 	.4byte	.LVL6-1
-	.4byte	.LFE264
+	.4byte	.LFE266
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
@@ -5467,7 +5485,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.sleb128 1
 	.byte	0x9f
 	.4byte	.LVL10
-	.4byte	.LFE264
+	.4byte	.LFE266
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -5481,7 +5499,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x53
 	.4byte	.LVL6-1
-	.4byte	.LFE264
+	.4byte	.LFE266
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
@@ -5492,7 +5510,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL10
-	.4byte	.LFE264
+	.4byte	.LFE266
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
@@ -5519,7 +5537,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x1
 	.byte	0x9f
 	.4byte	.LVL29
-	.4byte	.LFE264
+	.4byte	.LFE266
 	.2byte	0x6
 	.byte	0x74
 	.sleb128 0
@@ -5543,7 +5561,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.sleb128 -1
 	.byte	0x9f
 	.4byte	.LVL23
-	.4byte	.LFE264
+	.4byte	.LFE266
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 -2
@@ -5580,7 +5598,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL15
-	.4byte	.LFE264
+	.4byte	.LFE266
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
@@ -5598,7 +5616,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.sleb128 1
 	.byte	0x9f
 	.4byte	.LVL10
-	.4byte	.LFE264
+	.4byte	.LFE266
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -5627,7 +5645,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x54
 	.4byte	.LVL29
-	.4byte	.LFE264
+	.4byte	.LFE266
 	.2byte	0x3
 	.byte	0x74
 	.sleb128 -1
@@ -5640,7 +5658,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x54
 	.4byte	.LVL29
-	.4byte	.LFE264
+	.4byte	.LFE266
 	.2byte	0x3
 	.byte	0x74
 	.sleb128 -1
@@ -5675,14 +5693,14 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.2byte	0
 	.2byte	0
-	.4byte	.LFB268
-	.4byte	.LFE268-.LFB268
-	.4byte	.LFB264
-	.4byte	.LFE264-.LFB264
-	.4byte	.LFB269
-	.4byte	.LFE269-.LFB269
+	.4byte	.LFB270
+	.4byte	.LFE270-.LFB270
 	.4byte	.LFB266
 	.4byte	.LFE266-.LFB266
+	.4byte	.LFB271
+	.4byte	.LFE271-.LFB271
+	.4byte	.LFB268
+	.4byte	.LFE268-.LFB268
 	.4byte	0
 	.4byte	0
 	.section	.debug_ranges,"",%progbits
@@ -5715,14 +5733,14 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LBE46
 	.4byte	0
 	.4byte	0
-	.4byte	.LFB268
-	.4byte	.LFE268
-	.4byte	.LFB264
-	.4byte	.LFE264
-	.4byte	.LFB269
-	.4byte	.LFE269
+	.4byte	.LFB270
+	.4byte	.LFE270
 	.4byte	.LFB266
 	.4byte	.LFE266
+	.4byte	.LFB271
+	.4byte	.LFE271
+	.4byte	.LFB268
+	.4byte	.LFE268
 	.4byte	0
 	.4byte	0
 	.section	.debug_line,"",%progbits
@@ -5734,7 +5752,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"off_mem_rsvmap\000"
 .LASF183:
 	.ascii	"UCLASS_I2C_EEPROM\000"
-.LASF307:
+.LASF312:
 	.ascii	"jt_funcs\000"
 .LASF188:
 	.ascii	"UCLASS_IRQ\000"
@@ -5744,25 +5762,25 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"UCLASS_I2C\000"
 .LASF13:
 	.ascii	"sizetype\000"
-.LASF321:
+.LASF326:
 	.ascii	"net_hostname\000"
 .LASF54:
 	.ascii	"start\000"
-.LASF222:
+.LASF223:
 	.ascii	"UCLASS_SPI\000"
-.LASF304:
+.LASF309:
 	.ascii	"child\000"
 .LASF186:
 	.ascii	"UCLASS_I2S\000"
-.LASF343:
+.LASF348:
 	.ascii	"NETLOOP_RESTART\000"
 .LASF184:
 	.ascii	"UCLASS_I2C_GENERIC\000"
 .LASF196:
 	.ascii	"UCLASS_MOD_EXP\000"
-.LASF245:
+.LASF246:
 	.ascii	"UCLASS_IO_DOMAIN\000"
-.LASF259:
+.LASF263:
 	.ascii	"using_pre_serial\000"
 .LASF37:
 	.ascii	"uclass_priv\000"
@@ -5770,41 +5788,45 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"UCLASS_RKNAND\000"
 .LASF159:
 	.ascii	"UCLASS_DEMO\000"
-.LASF390:
-	.ascii	"OTP_S\000"
+.LASF426:
+	.ascii	"drivers/misc/rv1126-secure-otp.c\000"
 .LASF108:
 	.ascii	"ih_magic\000"
 .LASF46:
 	.ascii	"list_head\000"
-.LASF354:
+.LASF395:
+	.ascii	"OTP_S\000"
+.LASF359:
 	.ascii	"child_pre_probe\000"
-.LASF296:
+.LASF407:
+	.ascii	"rockchip_secure_otp_ofdata_to_platdata\000"
+.LASF301:
 	.ascii	"pm_ctx_phys\000"
 .LASF163:
 	.ascii	"UCLASS_TEST_PROBE\000"
-.LASF302:
+.LASF307:
 	.ascii	"full_name\000"
-.LASF241:
+.LASF242:
 	.ascii	"UCLASS_KEY\000"
 .LASF80:
 	.ascii	"bi_intfreq\000"
 .LASF11:
 	.ascii	"phys_addr_t\000"
-.LASF394:
+.LASF399:
 	.ascii	"write\000"
-.LASF236:
+.LASF237:
 	.ascii	"UCLASS_VIDEO_BRIDGE\000"
-.LASF295:
+.LASF300:
 	.ascii	"video_bottom\000"
 .LASF5:
 	.ascii	"__u8\000"
-.LASF342:
+.LASF347:
 	.ascii	"NETLOOP_CONTINUE\000"
-.LASF225:
+.LASF226:
 	.ascii	"UCLASS_SPI_GENERIC\000"
-.LASF290:
+.LASF295:
 	.ascii	"malloc_base\000"
-.LASF415:
+.LASF420:
 	.ascii	"dev_read_addr_ptr\000"
 .LASF56:
 	.ascii	"flash_info_t\000"
@@ -5820,7 +5842,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"UCLASS_CROS_EC\000"
 .LASF74:
 	.ascii	"bi_dsp_freq\000"
-.LASF400:
+.LASF405:
 	.ascii	"rockchip_otp_ids\000"
 .LASF122:
 	.ascii	"image_start\000"
@@ -5828,45 +5850,45 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"UCLASS_TEST_FDT\000"
 .LASF65:
 	.ascii	"bd_info\000"
-.LASF340:
+.LASF345:
 	.ascii	"uclass_id\000"
 .LASF112:
 	.ascii	"ih_load\000"
-.LASF388:
+.LASF393:
 	.ascii	"DECOM_GZIP\000"
-.LASF311:
+.LASF316:
 	.ascii	"__dtb_dt_spl_begin\000"
-.LASF380:
+.LASF385:
 	.ascii	"pre_remove\000"
 .LASF7:
 	.ascii	"__u32\000"
 .LASF35:
 	.ascii	"priv\000"
-.LASF293:
+.LASF298:
 	.ascii	"cur_serial_dev\000"
-.LASF327:
+.LASF332:
 	.ascii	"net_tx_packet\000"
-.LASF240:
+.LASF241:
 	.ascii	"UCLASS_FG\000"
-.LASF326:
+.LASF331:
 	.ascii	"net_server_ip\000"
-.LASF423:
+.LASF428:
 	.ascii	"ofnode_union\000"
-.LASF334:
+.LASF339:
 	.ascii	"net_native_vlan\000"
-.LASF238:
+.LASF239:
 	.ascii	"UCLASS_VIDEO_CRTC\000"
 .LASF175:
 	.ascii	"UCLASS_CODEC\000"
-.LASF287:
+.LASF292:
 	.ascii	"env_buf\000"
-.LASF409:
+.LASF414:
 	.ascii	"rockchip_secure_otp_write_byte\000"
 .LASF21:
 	.ascii	"errno\000"
 .LASF15:
 	.ascii	"long int\000"
-.LASF385:
+.LASF390:
 	.ascii	"__invalid_size_argument_for_IOC\000"
 .LASF69:
 	.ascii	"bi_flashsize\000"
@@ -5878,17 +5900,15 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"IRQ_STACK_START_IN\000"
 .LASF104:
 	.ascii	"size_dt_strings\000"
-.LASF235:
+.LASF236:
 	.ascii	"UCLASS_VIDEO\000"
-.LASF401:
-	.ascii	"_u_boot_list_2_driver_2_rockchip_secure_otp_v2\000"
-.LASF271:
+.LASF276:
 	.ascii	"relocaddr\000"
-.LASF371:
+.LASF376:
 	.ascii	"dev_head\000"
-.LASF422:
-	.ascii	"/home/zzz/code/u-boot\000"
-.LASF337:
+.LASF400:
+	.ascii	"ioctl\000"
+.LASF342:
 	.ascii	"net_boot_file_size\000"
 .LASF114:
 	.ascii	"ih_dcrc\000"
@@ -5898,7 +5918,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"UCLASS_ROOT\000"
 .LASF44:
 	.ascii	"ide_bus_offset\000"
-.LASF324:
+.LASF329:
 	.ascii	"net_server_ethaddr\000"
 .LASF82:
 	.ascii	"bi_arch_number\000"
@@ -5908,11 +5928,13 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"UCLASS_KEYBOARD\000"
 .LASF18:
 	.ascii	"uint8_t\000"
-.LASF359:
+.LASF406:
+	.ascii	"_u_boot_list_2_driver_2_rockchip_secure_otp\000"
+.LASF364:
 	.ascii	"per_child_platdata_auto_alloc_size\000"
 .LASF45:
 	.ascii	"udevice\000"
-.LASF418:
+.LASF423:
 	.ascii	"udelay\000"
 .LASF116:
 	.ascii	"ih_arch\000"
@@ -5920,13 +5942,13 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"totalsize\000"
 .LASF109:
 	.ascii	"ih_hcrc\000"
-.LASF273:
+.LASF278:
 	.ascii	"mon_len\000"
-.LASF396:
+.LASF401:
 	.ascii	"call\000"
 .LASF124:
 	.ascii	"load\000"
-.LASF230:
+.LASF231:
 	.ascii	"UCLASS_TPM\000"
 .LASF59:
 	.ascii	"lmb_property\000"
@@ -5936,11 +5958,9 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"unsigned char\000"
 .LASF84:
 	.ascii	"bi_andr_version\000"
-.LASF412:
-	.ascii	"rockchip_secure_otp_v2_read\000"
 .LASF157:
 	.ascii	"images\000"
-.LASF244:
+.LASF245:
 	.ascii	"UCLASS_DVFS\000"
 .LASF75:
 	.ascii	"bi_ddr_freq\000"
@@ -5948,19 +5968,23 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"UCLASS_LED\000"
 .LASF111:
 	.ascii	"ih_size\000"
-.LASF408:
-	.ascii	"rockchip_secure_otp_v2_capability\000"
 .LASF39:
 	.ascii	"uclass_node\000"
-.LASF248:
+.LASF220:
+	.ascii	"UCLASS_SCMI_AGENT\000"
+.LASF402:
+	.ascii	"rockchip_otp_platdata\000"
+.LASF249:
 	.ascii	"UCLASS_MDIO\000"
 .LASF23:
 	.ascii	"_Bool\000"
-.LASF360:
+.LASF365:
 	.ascii	"property\000"
-.LASF346:
+.LASF413:
+	.ascii	"rockchip_secure_otp_capability\000"
+.LASF351:
 	.ascii	"net_state\000"
-.LASF362:
+.LASF367:
 	.ascii	"value\000"
 .LASF185:
 	.ascii	"UCLASS_I2C_MUX\000"
@@ -5968,41 +5992,39 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"char\000"
 .LASF25:
 	.ascii	"_binary_u_boot_bin_start\000"
-.LASF234:
+.LASF235:
 	.ascii	"UCLASS_USB_GADGET_GENERIC\000"
-.LASF344:
+.LASF349:
 	.ascii	"NETLOOP_SUCCESS\000"
 .LASF36:
 	.ascii	"uclass\000"
-.LASF368:
+.LASF373:
 	.ascii	"p_current\000"
-.LASF370:
+.LASF375:
 	.ascii	"uc_drv\000"
-.LASF341:
+.LASF346:
 	.ascii	"net_loop_state\000"
 .LASF43:
 	.ascii	"req_seq\000"
-.LASF305:
+.LASF310:
 	.ascii	"sibling\000"
-.LASF279:
+.LASF284:
 	.ascii	"dm_root_f\000"
 .LASF174:
 	.ascii	"UCLASS_AMP\000"
 .LASF212:
 	.ascii	"UCLASS_PWRSEQ\000"
-.LASF363:
+.LASF368:
 	.ascii	"of_offset\000"
 .LASF140:
 	.ascii	"fit_hdr_fdt\000"
-.LASF335:
+.LASF340:
 	.ascii	"net_restart_wrap\000"
-.LASF323:
+.LASF328:
 	.ascii	"net_ethaddr\000"
-.LASF405:
-	.ascii	"rockchip_secure_otp_v2_write\000"
 .LASF42:
 	.ascii	"flags\000"
-.LASF419:
+.LASF424:
 	.ascii	"malloc_simple\000"
 .LASF117:
 	.ascii	"ih_type\000"
@@ -6010,15 +6032,15 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"off_dt_struct\000"
 .LASF70:
 	.ascii	"bi_flashoffset\000"
-.LASF336:
+.LASF341:
 	.ascii	"net_boot_file_name\000"
-.LASF373:
+.LASF378:
 	.ascii	"compatible\000"
 .LASF160:
 	.ascii	"UCLASS_TEST\000"
 .LASF110:
 	.ascii	"ih_time\000"
-.LASF264:
+.LASF269:
 	.ascii	"bus_clk\000"
 .LASF213:
 	.ascii	"UCLASS_RAM\000"
@@ -6030,17 +6052,17 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"image_info\000"
 .LASF127:
 	.ascii	"arch\000"
-.LASF266:
+.LASF271:
 	.ascii	"mem_clk\000"
-.LASF411:
+.LASF416:
 	.ascii	"temp\000"
-.LASF263:
+.LASF268:
 	.ascii	"cpu_clk\000"
 .LASF50:
 	.ascii	"select_hwpart\000"
-.LASF328:
+.LASF333:
 	.ascii	"net_rx_packets\000"
-.LASF365:
+.LASF370:
 	.ascii	"mem_malloc_start\000"
 .LASF92:
 	.ascii	"_datarelro_start_ofs\000"
@@ -6050,49 +6072,51 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"ih_ep\000"
 .LASF61:
 	.ascii	"lmb_region\000"
-.LASF421:
-	.ascii	"drivers/misc/rockchip-secure-otp-v2.c\000"
-.LASF378:
+.LASF383:
 	.ascii	"pre_probe\000"
-.LASF417:
+.LASF422:
 	.ascii	"printf\000"
-.LASF389:
+.LASF394:
 	.ascii	"DECOM_ZLIB\000"
 .LASF135:
 	.ascii	"fit_uname_os\000"
 .LASF76:
 	.ascii	"bi_bootflags\000"
-.LASF325:
+.LASF330:
 	.ascii	"net_ip\000"
-.LASF285:
+.LASF290:
 	.ascii	"fdt_size\000"
-.LASF319:
+.LASF324:
 	.ascii	"net_dns_server\000"
-.LASF339:
+.LASF344:
 	.ascii	"net_ping_ip\000"
 .LASF63:
 	.ascii	"memory\000"
 .LASF95:
 	.ascii	"fdt_header\000"
-.LASF366:
+.LASF371:
 	.ascii	"mem_malloc_end\000"
 .LASF192:
 	.ascii	"UCLASS_MAILBOX\000"
 .LASF147:
 	.ascii	"rd_end\000"
-.LASF348:
+.LASF353:
 	.ascii	"bind\000"
-.LASF274:
+.LASF279:
 	.ascii	"irq_sp\000"
 .LASF152:
 	.ascii	"cmdline_start\000"
-.LASF262:
+.LASF267:
 	.ascii	"global_data\000"
-.LASF383:
+.LASF388:
 	.ascii	"per_device_auto_alloc_size\000"
-.LASF220:
+.LASF408:
+	.ascii	"rockchip_secure_otp_ioctl\000"
+.LASF427:
+	.ascii	"/home2/chenp/work/u-boot\000"
+.LASF221:
 	.ascii	"UCLASS_SCSI\000"
-.LASF232:
+.LASF233:
 	.ascii	"UCLASS_USB_DEV_GENERIC\000"
 .LASF193:
 	.ascii	"UCLASS_MASS_STORAGE\000"
@@ -6100,47 +6124,47 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"long unsigned int\000"
 .LASF168:
 	.ascii	"UCLASS_SIMPLE_BUS\000"
-.LASF308:
+.LASF313:
 	.ascii	"gd_t\000"
-.LASF320:
+.LASF325:
 	.ascii	"net_nis_domain\000"
 .LASF142:
 	.ascii	"fit_noffset_fdt\000"
-.LASF399:
+.LASF404:
 	.ascii	"rockchip_secure_otp_ops\000"
-.LASF345:
+.LASF350:
 	.ascii	"NETLOOP_FAIL\000"
-.LASF239:
+.LASF240:
 	.ascii	"UCLASS_WDT\000"
-.LASF255:
+.LASF259:
 	.ascii	"timer_reset_value\000"
-.LASF275:
+.LASF280:
 	.ascii	"start_addr_sp\000"
 .LASF71:
 	.ascii	"bi_sramstart\000"
 .LASF26:
 	.ascii	"_binary_u_boot_bin_end\000"
-.LASF276:
+.LASF281:
 	.ascii	"reloc_off\000"
 .LASF103:
 	.ascii	"boot_cpuid_phys\000"
-.LASF254:
+.LASF258:
 	.ascii	"lastinc\000"
 .LASF138:
 	.ascii	"fit_uname_rd\000"
-.LASF226:
+.LASF227:
 	.ascii	"UCLASS_SYSCON\000"
 .LASF173:
 	.ascii	"UCLASS_CPU\000"
 .LASF133:
 	.ascii	"fit_uname_cfg\000"
-.LASF221:
+.LASF222:
 	.ascii	"UCLASS_SERIAL\000"
-.LASF333:
+.LASF338:
 	.ascii	"net_our_vlan\000"
-.LASF297:
+.LASF302:
 	.ascii	"serial\000"
-.LASF349:
+.LASF354:
 	.ascii	"probe\000"
 .LASF171:
 	.ascii	"UCLASS_BLK\000"
@@ -6148,7 +6172,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"image_info_t\000"
 .LASF167:
 	.ascii	"UCLASS_USB_EMUL\000"
-.LASF256:
+.LASF260:
 	.ascii	"tlb_addr\000"
 .LASF205:
 	.ascii	"UCLASS_PCI_GENERIC\000"
@@ -6158,23 +6182,23 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"bi_ip_addr\000"
 .LASF207:
 	.ascii	"UCLASS_PINCONFIG\000"
-.LASF228:
+.LASF229:
 	.ascii	"UCLASS_THERMAL\000"
 .LASF131:
 	.ascii	"legacy_hdr_os_copy\000"
 .LASF9:
 	.ascii	"long long int\000"
-.LASF386:
+.LASF391:
 	.ascii	"misc_mode\000"
-.LASF284:
+.LASF289:
 	.ascii	"new_fdt\000"
 .LASF22:
 	.ascii	"___strtok\000"
-.LASF338:
+.LASF343:
 	.ascii	"net_boot_file_expected_size_in_blocks\000"
-.LASF397:
-	.ascii	"rockchip_otp_v2_platdata\000"
-.LASF347:
+.LASF264:
+	.ascii	"enable\000"
+.LASF352:
 	.ascii	"of_match\000"
 .LASF200:
 	.ascii	"UCLASS_NVME\000"
@@ -6182,57 +6206,57 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"bootm_headers\000"
 .LASF55:
 	.ascii	"protect\000"
-.LASF231:
+.LASF232:
 	.ascii	"UCLASS_USB\000"
-.LASF375:
+.LASF380:
 	.ascii	"uclass_driver\000"
-.LASF242:
+.LASF243:
 	.ascii	"UCLASS_RC\000"
-.LASF288:
+.LASF293:
 	.ascii	"timebase_h\000"
-.LASF289:
+.LASF294:
 	.ascii	"timebase_l\000"
 .LASF177:
 	.ascii	"UCLASS_DISPLAY\000"
-.LASF332:
+.LASF337:
 	.ascii	"net_null_ethaddr\000"
-.LASF269:
+.LASF274:
 	.ascii	"env_valid\000"
 .LASF34:
 	.ascii	"parent\000"
 .LASF166:
 	.ascii	"UCLASS_PCI_EMUL\000"
+.LASF417:
+	.ascii	"rockchip_secure_otp_read\000"
 .LASF38:
 	.ascii	"parent_priv\000"
-.LASF391:
+.LASF396:
 	.ascii	"OTP_NS\000"
-.LASF243:
+.LASF244:
 	.ascii	"UCLASS_CHARGE_DISPLAY\000"
-.LASF312:
+.LASF317:
 	.ascii	"load_addr\000"
 .LASF134:
 	.ascii	"fit_hdr_os\000"
 .LASF90:
 	.ascii	"_datarelrolocal_start_ofs\000"
-.LASF410:
+.LASF415:
 	.ascii	"timeout\000"
-.LASF261:
+.LASF266:
 	.ascii	"addr\000"
-.LASF393:
+.LASF398:
 	.ascii	"read\000"
 .LASF8:
 	.ascii	"unsigned int\000"
 .LASF16:
 	.ascii	"ushort\000"
-.LASF395:
-	.ascii	"ioctl\000"
-.LASF416:
+.LASF421:
 	.ascii	"dev_read_u32_default\000"
-.LASF283:
+.LASF288:
 	.ascii	"ufdt_blob\000"
-.LASF356:
+.LASF361:
 	.ascii	"priv_auto_alloc_size\000"
-.LASF291:
+.LASF296:
 	.ascii	"malloc_limit\000"
 .LASF209:
 	.ascii	"UCLASS_PMIC\000"
@@ -6240,7 +6264,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"legacy_hdr_os\000"
 .LASF99:
 	.ascii	"off_dt_strings\000"
-.LASF309:
+.LASF314:
 	.ascii	"monitor_flash_len\000"
 .LASF194:
 	.ascii	"UCLASS_MISC\000"
@@ -6248,27 +6272,27 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"bi_memsize\000"
 .LASF24:
 	.ascii	"image_base\000"
-.LASF227:
+.LASF228:
 	.ascii	"UCLASS_SYSRESET\000"
-.LASF369:
+.LASF374:
 	.ascii	"current\000"
 .LASF181:
 	.ascii	"UCLASS_FIRMWARE\000"
 .LASF191:
 	.ascii	"UCLASS_LPC\000"
-.LASF406:
+.LASF411:
 	.ascii	"offset\000"
 .LASF187:
 	.ascii	"UCLASS_IDE\000"
-.LASF392:
+.LASF397:
 	.ascii	"misc_ops\000"
-.LASF301:
+.LASF306:
 	.ascii	"phandle\000"
-.LASF294:
+.LASF299:
 	.ascii	"video_top\000"
-.LASF357:
+.LASF362:
 	.ascii	"platdata_auto_alloc_size\000"
-.LASF384:
+.LASF389:
 	.ascii	"per_device_platdata_auto_alloc_size\000"
 .LASF156:
 	.ascii	"bootm_headers_t\000"
@@ -6280,11 +6304,11 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"type\000"
 .LASF137:
 	.ascii	"fit_hdr_rd\000"
-.LASF268:
+.LASF273:
 	.ascii	"env_addr\000"
 .LASF72:
 	.ascii	"bi_sramsize\000"
-.LASF280:
+.LASF285:
 	.ascii	"uclass_root\000"
 .LASF180:
 	.ascii	"UCLASS_GPIO\000"
@@ -6292,9 +6316,9 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"UCLASS_PWM\000"
 .LASF58:
 	.ascii	"long double\000"
-.LASF270:
+.LASF275:
 	.ascii	"ram_top\000"
-.LASF299:
+.LASF304:
 	.ascii	"console_evt\000"
 .LASF146:
 	.ascii	"rd_start\000"
@@ -6302,17 +6326,17 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"UCLASS_POWER_DOMAIN\000"
 .LASF214:
 	.ascii	"UCLASS_REGULATOR\000"
-.LASF314:
+.LASF319:
 	.ascii	"save_size\000"
 .LASF172:
 	.ascii	"UCLASS_CLK\000"
 .LASF31:
 	.ascii	"uclass_platdata\000"
-.LASF414:
+.LASF419:
 	.ascii	"dev_get_platdata\000"
 .LASF89:
 	.ascii	"_datarel_start_ofs\000"
-.LASF258:
+.LASF262:
 	.ascii	"pre_serial\000"
 .LASF119:
 	.ascii	"ih_name\000"
@@ -6320,23 +6344,23 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"ih_os\000"
 .LASF153:
 	.ascii	"cmdline_end\000"
-.LASF329:
+.LASF334:
 	.ascii	"net_rx_packet\000"
-.LASF251:
+.LASF255:
 	.ascii	"LOGF_MAX_CATEGORIES\000"
-.LASF282:
+.LASF287:
 	.ascii	"fdt_blob\000"
-.LASF372:
+.LASF377:
 	.ascii	"udevice_id\000"
 .LASF51:
 	.ascii	"size\000"
 .LASF10:
 	.ascii	"long long unsigned int\000"
-.LASF382:
+.LASF387:
 	.ascii	"destroy\000"
 .LASF107:
 	.ascii	"image_header\000"
-.LASF361:
+.LASF366:
 	.ascii	"length\000"
 .LASF20:
 	.ascii	"__be32\000"
@@ -6346,20 +6370,20 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"fit_noffset_os\000"
 .LASF195:
 	.ascii	"UCLASS_MMC\000"
-.LASF250:
+.LASF254:
 	.ascii	"UCLASS_INVALID\000"
-.LASF233:
+.LASF234:
 	.ascii	"UCLASS_USB_HUB\000"
-.LASF355:
+.LASF360:
 	.ascii	"child_post_remove\000"
 .LASF41:
 	.ascii	"sibling_node\000"
-.LASF286:
+.LASF291:
 	.ascii	"of_root\000"
-.LASF402:
-	.ascii	"rockchip_secure_otp_v2_ofdata_to_platdata\000"
-.LASF407:
+.LASF412:
 	.ascii	"data_temp\000"
+.LASF250:
+	.ascii	"UCLASS_EBC\000"
 .LASF57:
 	.ascii	"flash_info\000"
 .LASF101:
@@ -6368,35 +6392,35 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"region\000"
 .LASF105:
 	.ascii	"size_dt_struct\000"
-.LASF278:
+.LASF283:
 	.ascii	"dm_root\000"
-.LASF298:
-	.ascii	"sys_start_tick\000"
+.LASF252:
+	.ascii	"UCLASS_RNG\000"
 .LASF303:
+	.ascii	"sys_start_tick\000"
+.LASF308:
 	.ascii	"properties\000"
-.LASF403:
-	.ascii	"rockchip_secure_otp_v2_ioctl\000"
 .LASF197:
 	.ascii	"UCLASS_MTD\000"
 .LASF94:
 	.ascii	"fdt32_t\000"
-.LASF277:
+.LASF282:
 	.ascii	"new_gd\000"
 .LASF199:
 	.ascii	"UCLASS_NORTHBRIDGE\000"
 .LASF78:
 	.ascii	"bi_enetaddr\000"
-.LASF306:
+.LASF311:
 	.ascii	"mtd_info\000"
-.LASF353:
+.LASF358:
 	.ascii	"child_post_bind\000"
-.LASF315:
+.LASF320:
 	.ascii	"in_addr\000"
-.LASF330:
+.LASF335:
 	.ascii	"net_rx_packet_len\000"
-.LASF381:
+.LASF386:
 	.ascii	"init\000"
-.LASF310:
+.LASF315:
 	.ascii	"__dtb_dt_begin\000"
 .LASF216:
 	.ascii	"UCLASS_RESET\000"
@@ -6412,17 +6436,19 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"FIQ_STACK_START\000"
 .LASF154:
 	.ascii	"verify\000"
-.LASF364:
+.LASF369:
 	.ascii	"ofnode\000"
 .LASF28:
 	.ascii	"name\000"
+.LASF251:
+	.ascii	"UCLASS_EINK_DISPLAY\000"
 .LASF202:
 	.ascii	"UCLASS_PANEL_BACKLIGHT\000"
-.LASF229:
+.LASF230:
 	.ascii	"UCLASS_TIMER\000"
-.LASF224:
+.LASF225:
 	.ascii	"UCLASS_SPI_FLASH\000"
-.LASF267:
+.LASF272:
 	.ascii	"have_console\000"
 .LASF81:
 	.ascii	"bi_busfreq\000"
@@ -6434,77 +6460,77 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"UCLASS_RAMDISK\000"
 .LASF165:
 	.ascii	"UCLASS_I2C_EMUL\000"
-.LASF223:
+.LASF224:
 	.ascii	"UCLASS_SPMI\000"
-.LASF350:
+.LASF355:
 	.ascii	"remove\000"
 .LASF162:
 	.ascii	"UCLASS_TEST_BUS\000"
-.LASF313:
+.LASF318:
 	.ascii	"save_addr\000"
-.LASF358:
+.LASF363:
 	.ascii	"per_child_auto_alloc_size\000"
-.LASF292:
+.LASF297:
 	.ascii	"malloc_ptr\000"
-.LASF398:
+.LASF403:
 	.ascii	"secure_conf_base\000"
 .LASF151:
 	.ascii	"initrd_end\000"
-.LASF377:
+.LASF382:
 	.ascii	"pre_unbind\000"
-.LASF260:
+.LASF265:
 	.ascii	"baudrate\000"
 .LASF91:
 	.ascii	"_datarellocal_start_ofs\000"
 .LASF40:
 	.ascii	"child_head\000"
-.LASF252:
+.LASF256:
 	.ascii	"arch_global_data\000"
-.LASF413:
+.LASF418:
 	.ascii	"offset_temp\000"
-.LASF249:
+.LASF253:
 	.ascii	"UCLASS_COUNT\000"
-.LASF265:
+.LASF270:
 	.ascii	"pci_clk\000"
 .LASF49:
 	.ascii	"block_drvr\000"
 .LASF53:
 	.ascii	"flash_id\000"
-.LASF246:
+.LASF247:
 	.ascii	"UCLASS_CRYPTO\000"
-.LASF300:
+.LASF305:
 	.ascii	"device_node\000"
-.LASF272:
+.LASF277:
 	.ascii	"ram_size\000"
 .LASF145:
 	.ascii	"fit_noffset_setup\000"
 .LASF106:
 	.ascii	"working_fdt\000"
-.LASF281:
+.LASF286:
 	.ascii	"fdt_blob_kern\000"
-.LASF322:
+.LASF327:
 	.ascii	"net_root_path\000"
 .LASF178:
 	.ascii	"UCLASS_DMA\000"
 .LASF86:
 	.ascii	"bd_t\000"
-.LASF316:
+.LASF321:
 	.ascii	"s_addr\000"
-.LASF404:
+.LASF409:
 	.ascii	"request\000"
-.LASF379:
+.LASF384:
 	.ascii	"post_probe\000"
-.LASF331:
+.LASF336:
 	.ascii	"net_bcast_ethaddr\000"
 .LASF83:
 	.ascii	"bi_boot_params\000"
 .LASF19:
 	.ascii	"uint32_t\000"
-.LASF367:
+.LASF372:
 	.ascii	"mem_malloc_brk\000"
-.LASF317:
+.LASF322:
 	.ascii	"net_gateway\000"
-.LASF420:
+.LASF425:
 	.ascii	"GNU C11 6.3.1 20170404 -mthumb -mthumb-interwork -m"
 	.ascii	"abi=aapcs-linux -mno-unaligned-access -mfloat-abi=s"
 	.ascii	"oft -march=armv7-a -mtune=cortex-a9 -mfpu=vfpv3-d16"
@@ -6514,15 +6540,15 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"s -fdata-sections -fno-common -ffixed-r9\000"
 .LASF66:
 	.ascii	"bi_memstart\000"
-.LASF387:
+.LASF392:
 	.ascii	"DECOM_LZ4\000"
-.LASF237:
+.LASF238:
 	.ascii	"UCLASS_VIDEO_CONSOLE\000"
-.LASF352:
+.LASF357:
 	.ascii	"ofdata_to_platdata\000"
 .LASF64:
 	.ascii	"reserved\000"
-.LASF424:
+.LASF429:
 	.ascii	"free\000"
 .LASF85:
 	.ascii	"bi_dram\000"
@@ -6538,19 +6564,21 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"base\000"
 .LASF219:
 	.ascii	"UCLASS_RTC\000"
-.LASF253:
+.LASF257:
 	.ascii	"timer_rate_hz\000"
 .LASF52:
 	.ascii	"sector_count\000"
 .LASF118:
 	.ascii	"ih_comp\000"
-.LASF376:
+.LASF381:
 	.ascii	"post_bind\000"
-.LASF351:
+.LASF410:
+	.ascii	"rockchip_secure_otp_write\000"
+.LASF356:
 	.ascii	"unbind\000"
 .LASF148:
 	.ascii	"ft_addr\000"
-.LASF247:
+.LASF248:
 	.ascii	"UCLASS_ETH_PHY\000"
 .LASF4:
 	.ascii	"uchar\000"
@@ -6558,7 +6586,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"ft_len\000"
 .LASF47:
 	.ascii	"next\000"
-.LASF374:
+.LASF379:
 	.ascii	"data\000"
 .LASF198:
 	.ascii	"UCLASS_NOP\000"
@@ -6570,7 +6598,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"UCLASS_PCH\000"
 .LASF204:
 	.ascii	"UCLASS_PCI\000"
-.LASF318:
+.LASF323:
 	.ascii	"net_netmask\000"
 .LASF33:
 	.ascii	"driver_data\000"
@@ -6580,7 +6608,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"UCLASS_ADC\000"
 .LASF164:
 	.ascii	"UCLASS_SPI_EMUL\000"
-.LASF257:
+.LASF261:
 	.ascii	"tlb_size\000"
 .LASF141:
 	.ascii	"fit_uname_fdt\000"
diff --git a/include/rockchip-otp-v2.h b/include/rv1126-secure-otp.h
similarity index 93%
rename from include/rockchip-otp-v2.h
rename to include/rv1126-secure-otp.h
index 4fc143cc55..961cb2a739 100644
--- a/include/rockchip-otp-v2.h
+++ b/include/rv1126-secure-otp.h
@@ -3,8 +3,8 @@
  * (C) Copyright 2019 Rockchip Electronics Co., Ltd
  */
 
-#ifndef _ROCKCHIP_OTP_V2_H_
-#define _ROCKCHIP_OTP_V2_H_
+#ifndef _RV1126_SECURE_OTP_H_
+#define _RV1126_SECURE_OTP_H_
 
 #define NVM_CEB			0x00
 #define NVM_RSTB		0x04
@@ -51,7 +51,7 @@
 #define OTP_SLICE_LOCK		0x041c
 #define OTP_SLICE		0x0420
 
-struct rockchip_otp_v2_platdata {
+struct rockchip_otp_platdata {
 	void __iomem *base;
 	unsigned long secure_conf_base;
 };

commit b255ed232b5554163e62b970af8c18a12beb65ce
Author: Nico Cheng <nico.cheng@rock-chips.com>
Date:   Fri Oct 22 20:24:10 2021 +0800

    rockchip: rk3308bs: add some definitions of secure otp
    
    Signed-off-by: Nico Cheng <nico.cheng@rock-chips.com>
    Change-Id: I645ac6cef2f2cd081d5c1fc67e258533d08e7419

diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h
index dd62363cae..b80059e8af 100644
--- a/include/configs/rk3308_common.h
+++ b/include/configs/rk3308_common.h
@@ -37,6 +37,11 @@
 #define GICD_BASE			0xff581000
 #define GICC_BASE			0xff582000
 
+#define OTP_SECURE_BOOT_ENABLE_ADDR	0x0
+#define OTP_SECURE_BOOT_ENABLE_SIZE	1
+#define OTP_RSA_HASH_ADDR		0x10
+#define OTP_RSA_HASH_SIZE		32
+
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */
 
 /* MMC/SD IP block */

commit 01a15f6960b57ab14948b14119096e91c830346b
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed Nov 17 21:15:27 2021 +0800

    mtd: spinand: Support new device
    
    F35SQA002G
    
    Change-Id: I31f046dfb537caee9472de6034531f70973f8fea
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/foresee.c b/drivers/mtd/nand/spi/foresee.c
index 7fad8a3f9e..b4d5eec5ba 100644
--- a/drivers/mtd/nand/spi/foresee.c
+++ b/drivers/mtd/nand/spi/foresee.c
@@ -81,7 +81,7 @@ static const struct spinand_info foresee_spinand_table[] = {
 					      &update_cache_variants),
 		     0,
 		     SPINAND_ECCINFO(&fsxxndxxg_ooblayout, NULL)),
-	SPINAND_INFO("fsxxndxxg",
+	SPINAND_INFO("F35SQA001G",
 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x71),
 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
 		     NAND_ECCREQ(1, 512),
@@ -90,6 +90,15 @@ static const struct spinand_info foresee_spinand_table[] = {
 					      &update_cache_variants),
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&fsxxndxxg_ooblayout, NULL)),
+	SPINAND_INFO("F35SQA002G",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x72),
+		     NAND_MEMORG(1, 2048, 64, 64, 2048, 1, 1, 1),
+		     NAND_ECCREQ(1, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&fsxxndxxg_ooblayout, NULL)),
 };
 
 static const struct spinand_manufacturer_ops foresee_spinand_manuf_ops = {

commit 06c1e6d741fee8094b207198c616c0038eb02adc
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Nov 16 09:24:19 2021 +0000

    pmic: rk8xx: update callback name
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ia76255ebf8eb8e2e330402aaa14c9f0a2a52c1a7

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index 066943e555..b11695562b 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -31,8 +31,8 @@ static struct virq_chip rk805_irq_chip = {
 	.status_base		= RK805_INT_STS_REG,
 	.mask_base		= RK805_INT_MSK_REG,
 	.num_regs		= 1,
-	.i2c_read		= pmic_reg_read,
-	.i2c_write		= pmic_reg_write,
+	.read			= pmic_reg_read,
+	.write			= pmic_reg_write,
 	.irqs			= rk805_irqs,
 	.num_irqs		= ARRAY_SIZE(rk805_irqs),
 };
@@ -50,8 +50,8 @@ static struct virq_chip rk808_irq_chip = {
 	.mask_base		= RK808_INT_MSK_REG1,
 	.irq_reg_stride		= 2,
 	.num_regs		= 2,
-	.i2c_read		= pmic_reg_read,
-	.i2c_write		= pmic_reg_write,
+	.read			= pmic_reg_read,
+	.write			= pmic_reg_write,
 	.irqs			= rk808_irqs,
 	.num_irqs		= ARRAY_SIZE(rk808_irqs),
 };
@@ -83,8 +83,8 @@ static struct virq_chip rk816_irq_chip = {
 	.irq_unalign_reg_stride	= 3,
 	.irq_reg_stride		= 2,	/* idx > 1, stride = 2 */
 	.num_regs		= 3,
-	.i2c_read		= pmic_reg_read,
-	.i2c_write		= pmic_reg_write,
+	.read			= pmic_reg_read,
+	.write			= pmic_reg_write,
 	.irqs			= rk816_irqs,
 	.num_irqs		= ARRAY_SIZE(rk816_irqs),
 };
@@ -106,8 +106,8 @@ static struct virq_chip rk818_irq_chip = {
 	.mask_base		= RK818_INT_MSK_REG1,
 	.irq_reg_stride		= 2,
 	.num_regs		= 2,
-	.i2c_read		= pmic_reg_read,
-	.i2c_write		= pmic_reg_write,
+	.read			= pmic_reg_read,
+	.write			= pmic_reg_write,
 	.irqs			= rk818_irqs,
 	.num_irqs		= ARRAY_SIZE(rk818_irqs),
 };
@@ -137,8 +137,8 @@ static struct virq_chip rk817_irq_chip = {
 	.mask_base		= RK817_INT_MSK_REG0,
 	.irq_reg_stride		= 2,
 	.num_regs		= 3,
-	.i2c_read		= pmic_reg_read,
-	.i2c_write		= pmic_reg_write,
+	.read			= pmic_reg_read,
+	.write			= pmic_reg_write,
 	.irqs			= rk817_irqs,
 	.num_irqs		= ARRAY_SIZE(rk817_irqs),
 };

commit 1b461e2d3af6210f3e788aab491c8f89d9cfdd8e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Nov 16 09:23:37 2021 +0000

    irq: use commmon name for read and write operation
    
    It maybe i2c and spi interface, etc.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I320dd67289f42e75515ae247f67d12cc4167347c

diff --git a/drivers/irq/virq.c b/drivers/irq/virq.c
index 02475732ff..a066811de0 100644
--- a/drivers/irq/virq.c
+++ b/drivers/irq/virq.c
@@ -208,7 +208,7 @@ void virq_chip_generic_handler(int pirq, void *pdata)
 	/* Read all status register */
 	for (i = 0; i < chip->num_regs; i++) {
 		status_reg = reg_base_get(desc, chip->status_base, i);
-		desc->status_buf[i] = chip->i2c_read(parent, status_reg);
+		desc->status_buf[i] = chip->read(parent, status_reg);
 		if (desc->status_buf[i] < 0) {
 			printf("%s: Read status register 0x%x failed, ret=%d\n",
 			       __func__, status_reg, desc->status_buf[i]);
@@ -232,7 +232,7 @@ void virq_chip_generic_handler(int pirq, void *pdata)
 	/* Clear all status register */
 	for (i = 0; i < chip->num_regs; i++) {
 		status_reg = reg_base_get(desc, chip->status_base, i);
-		ret = chip->i2c_write(parent, status_reg, ~0U);
+		ret = chip->write(parent, status_reg, ~0U);
 		if (ret)
 			printf("%s: Clear status register 0x%x failed, ret=%d\n",
 			       __func__, status_reg, ret);
@@ -288,7 +288,7 @@ int virq_add_chip(struct udevice *dev, struct virq_chip *chip, int irq)
 	/* Mask all register */
 	for (i = 0; i < chip->num_regs; i++) {
 		mask_reg = reg_base_get(desc, chip->mask_base, i);
-		ret = chip->i2c_write(dev, mask_reg, ~0U);
+		ret = chip->write(dev, mask_reg, ~0U);
 		if (ret)
 			printf("%s: Set mask register 0x%x failed, ret=%d\n",
 			       __func__, mask_reg, ret);
@@ -297,7 +297,7 @@ int virq_add_chip(struct udevice *dev, struct virq_chip *chip, int irq)
 	/* Clear all status */
 	for (i = 0; i < chip->num_regs; i++) {
 		status_reg = reg_base_get(desc, chip->status_base, i);
-		ret = chip->i2c_write(dev, status_reg, ~0U);
+		ret = chip->write(dev, status_reg, ~0U);
 		if (ret)
 			printf("%s: Clear status register 0x%x failed, ret=%d\n",
 			       __func__, status_reg, ret);
@@ -346,13 +346,13 @@ static int __virq_enable(int irq, int enable)
 	mask_val = chip->irqs[virq].mask;
 	mask_reg = reg_base_get(desc, chip->mask_base,
 				chip->irqs[virq].reg_offset);
-	reg_val = chip->i2c_read(desc->parent, mask_reg);
+	reg_val = chip->read(desc->parent, mask_reg);
 	if (enable)
 		reg_val &= ~mask_val;
 	else
 		reg_val |= mask_val;
 
-	ret = chip->i2c_write(desc->parent, mask_reg, reg_val);
+	ret = chip->write(desc->parent, mask_reg, reg_val);
 	if (ret) {
 		printf("%s: Clear status register 0x%x failed, ret=%d\n",
 		       __func__, mask_reg, ret);
diff --git a/include/irq-generic.h b/include/irq-generic.h
index 9f3410a038..66919fbc14 100644
--- a/include/irq-generic.h
+++ b/include/irq-generic.h
@@ -67,8 +67,8 @@ struct irq_chip {
 /*
  * Virtual irq chip structure
  */
-typedef int(virq_i2c_write_t)(struct udevice *dev, uint reg, uint value);
-typedef int(virq_i2c_read_t)(struct udevice *dev, uint reg);
+typedef int(virq_write_t)(struct udevice *dev, uint reg, uint value);
+typedef int(virq_read_t)(struct udevice *dev, uint reg);
 
 struct virq_reg {
 	uint reg_offset;
@@ -84,8 +84,8 @@ struct virq_chip {
 	int num_regs;
 	const struct virq_reg *irqs;
 	int num_irqs;
-	virq_i2c_read_t *i2c_read;
-	virq_i2c_write_t *i2c_write;
+	virq_read_t *read;
+	virq_write_t *write;
 };
 
 /* APIs for irqs */

commit ac39ced82d9be477aee429d954d14141de15be94
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Nov 15 17:16:47 2021 +0800

    mtd: spinand: Fix hyf devices read id information
    
    Change to SPINAND_READID_METHOD_OPCODE_ADDR
    
    Change-Id: I338fe794013d47f51b4456ebb8e6bccd6b2bf03d
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/hyf.c b/drivers/mtd/nand/spi/hyf.c
index 83458e07b6..1c95298c2c 100644
--- a/drivers/mtd/nand/spi/hyf.c
+++ b/drivers/mtd/nand/spi/hyf.c
@@ -141,7 +141,7 @@ static int hyf1gq4udacae_ecc_get_status(struct spinand_device *spinand,
 
 static const struct spinand_info hyf_spinand_table[] = {
 	SPINAND_INFO("HYF1GQ4UPACAE",
-		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xA1),
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0xA1),
 		     NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
 		     NAND_ECCREQ(1, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -150,7 +150,7 @@ static const struct spinand_info hyf_spinand_table[] = {
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&hyf1gq4upacae_ooblayout, NULL)),
 	SPINAND_INFO("HYF1GQ4UDACAE",
-		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x21),
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x21),
 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
 		     NAND_ECCREQ(4, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -160,7 +160,7 @@ static const struct spinand_info hyf_spinand_table[] = {
 		     SPINAND_ECCINFO(&hyf1gq4udacae_ooblayout,
 				     hyf1gq4udacae_ecc_get_status)),
 	SPINAND_INFO("HYF1GQ4UDACAE",
-		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x22),
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x22),
 		     NAND_MEMORG(1, 2048, 64, 64, 2048, 1, 1, 1),
 		     NAND_ECCREQ(4, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -170,7 +170,7 @@ static const struct spinand_info hyf_spinand_table[] = {
 		     SPINAND_ECCINFO(&hyf1gq4udacae_ooblayout,
 				     hyf1gq4udacae_ecc_get_status)),
 	SPINAND_INFO("HYF2GQ4UAACAE",
-		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x52),
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x52),
 		     NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
 		     NAND_ECCREQ(14, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -180,7 +180,7 @@ static const struct spinand_info hyf_spinand_table[] = {
 		     SPINAND_ECCINFO(&hyf2gq4uaacae_ooblayout,
 				     hyf1gq4udacae_ecc_get_status)),
 	SPINAND_INFO("HYF2GQ4UHCCAE",
-		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x5A),
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x5A),
 		     NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
 		     NAND_ECCREQ(14, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -190,7 +190,7 @@ static const struct spinand_info hyf_spinand_table[] = {
 		     SPINAND_ECCINFO(&hyf2gq4uaacae_ooblayout,
 				     hyf1gq4udacae_ecc_get_status)),
 	SPINAND_INFO("HYF4GQ4UAACBE",
-		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xD4),
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0xD4),
 		     NAND_MEMORG(1, 4096, 128, 64, 2048, 1, 1, 1),
 		     NAND_ECCREQ(4, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,

commit 20cb2c76157e2f65919d3617091029af79921f06
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Nov 15 17:16:29 2021 +0800

    mtd: spinand: Fix ertron devices read id information
    
    Change to SPINAND_READID_METHOD_OPCODE_ADDR
    
    Change-Id: I9259b8ad72ce03ca60b2c8898594bcfdbe030d7d
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/etron.c b/drivers/mtd/nand/spi/etron.c
index d32d4658dc..03a23abad2 100644
--- a/drivers/mtd/nand/spi/etron.c
+++ b/drivers/mtd/nand/spi/etron.c
@@ -80,7 +80,7 @@ static int em73c044vcf_oh_ecc_get_status(struct spinand_device *spinand,
 
 static const struct spinand_info etron_spinand_table[] = {
 	SPINAND_INFO("EM73C044VCF-0H",
-		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x36),
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x36),
 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
 		     NAND_ECCREQ(4, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,

commit 820217bdab76e27abb2f840406f1794b6dfa530f
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Nov 15 17:11:37 2021 +0800

    mtd: spinand: Fix XTX devices id information
    
    Change to SPINAND_READID_METHOD_OPCODE_ADDR
    
    Change-Id: If321224306ef21951a10410cda7d8b9f36527517
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/xtx.c b/drivers/mtd/nand/spi/xtx.c
index 7d3d938b9c..ef259ff095 100644
--- a/drivers/mtd/nand/spi/xtx.c
+++ b/drivers/mtd/nand/spi/xtx.c
@@ -207,7 +207,7 @@ static int xt26g01c_ecc_get_status(struct spinand_device *spinand,
 
 static const struct spinand_info xtx_spinand_table[] = {
 	SPINAND_INFO("XT26G01A",
-		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE1),
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0xE1),
 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
 		     NAND_ECCREQ(8, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -217,7 +217,7 @@ static const struct spinand_info xtx_spinand_table[] = {
 		     SPINAND_ECCINFO(&xt26g0xa_ooblayout,
 				     xt26g0xa_ecc_get_status)),
 	SPINAND_INFO("XT26G02A",
-		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE2),
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0xE2),
 		     NAND_MEMORG(1, 2048, 64, 64, 2048, 1, 1, 1),
 		     NAND_ECCREQ(8, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -227,7 +227,7 @@ static const struct spinand_info xtx_spinand_table[] = {
 		     SPINAND_ECCINFO(&xt26g0xa_ooblayout,
 				     xt26g0xa_ecc_get_status)),
 	SPINAND_INFO("XT26G04A",
-		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE3),
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0xE3),
 		     NAND_MEMORG(1, 2048, 64, 128, 2048, 1, 1, 1),
 		     NAND_ECCREQ(8, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -237,7 +237,7 @@ static const struct spinand_info xtx_spinand_table[] = {
 		     SPINAND_ECCINFO(&xt26g0xa_ooblayout,
 				     xt26g0xa_ecc_get_status)),
 	SPINAND_INFO("XT26G01B",
-		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xF1),
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0xF1),
 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
 		     NAND_ECCREQ(8, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -247,7 +247,7 @@ static const struct spinand_info xtx_spinand_table[] = {
 		     SPINAND_ECCINFO(&xt26g01b_ooblayout,
 				     xt26g0xa_ecc_get_status)),
 	SPINAND_INFO("XT26G02B",
-		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xF2),
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0xF2),
 		     NAND_MEMORG(1, 2048, 64, 64, 2048, 1, 1, 1),
 		     NAND_ECCREQ(4, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -257,7 +257,7 @@ static const struct spinand_info xtx_spinand_table[] = {
 		     SPINAND_ECCINFO(&xt26g02b_ooblayout,
 				     xt26g02b_ecc_get_status)),
 	SPINAND_INFO("XT26G01C",
-		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x11),
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x11),
 		     NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
 		     NAND_ECCREQ(8, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -267,7 +267,7 @@ static const struct spinand_info xtx_spinand_table[] = {
 		     SPINAND_ECCINFO(&xt26g01c_ooblayout,
 				     xt26g01c_ecc_get_status)),
 	SPINAND_INFO("XT26G02C",
-		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x12),
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x12),
 		     NAND_MEMORG(1, 2048, 64, 64, 2048, 1, 1, 1),
 		     NAND_ECCREQ(8, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -277,7 +277,7 @@ static const struct spinand_info xtx_spinand_table[] = {
 		     SPINAND_ECCINFO(&xt26g0xa_ooblayout,
 				     xt26g01c_ecc_get_status)),
 	SPINAND_INFO("XT26G04C",
-		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x13),
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x13),
 		     NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1),
 		     NAND_ECCREQ(8, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -287,7 +287,7 @@ static const struct spinand_info xtx_spinand_table[] = {
 		     SPINAND_ECCINFO(&xt26g01c_ooblayout,
 				     xt26g01c_ecc_get_status)),
 	SPINAND_INFO("XT26G11C",
-		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x15),
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x15),
 		     NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
 		     NAND_ECCREQ(8, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,

commit b43e4fe908a0f9a2e8cbbeabf3e4b5090df26077
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 11 03:42:29 2021 +0000

    configs: rk3568: disable CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
    
    CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR and CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
    solution should be exclusive, otherwise it makes wrong sector offset by code:
    
    static int mmc_load_image_raw_partition(...)
    {
            ......
            return mmc_load_image_raw_sector(spl_image, mmc,
                            info.start + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR);
            ......
    }
    
    Example:
      Trying fit image at 0x9000 sector   // it should be 0x4000 sector
      ## Verified-boot: 0
      ## Checking atf-1 0x00040000 ... sha256(fe4f274c06...) + OK
      ## Checking uboot 0x00a00000 ... sha256(f248b924d8...) + OK
      ## Checking fdt 0x00b28ef0 ... sha256(9679fe2a45...) + OK
      ## Checking atf-2 0x00068000 ... sha256(8d44036095...) + OK
      ## Checking atf-3 0xfdcd0000 ... sha256(e410275b51...) + OK
      ## Checking atf-4 0xfdcc9000 ... sha256(990c53fc01...) + OK
      ## Checking atf-5 0x00066000 ... sha256(315a4195a9...) + OK
      ## Checking optee 0x08400000 ... sha256(5a22c90dfc...) + OK
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I97371f962f4b6fcd066b06f211062329068d1dcd

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index a413803455..36931438a0 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -35,6 +35,7 @@ CONFIG_SPL_BOARD_INIT=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
 CONFIG_SPL_SEPARATE_BSS=y
+# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
 CONFIG_SPL_SHA256_SUPPORT=y
 CONFIG_SPL_CRYPTO_SUPPORT=y

commit 7e6f3a660ee60865b5b3d89f12329631d21dbbfa
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 11 03:39:55 2021 +0000

    spl: fit: print sectors
    
    It's helpful to know where the spl loads next stage.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I59941e4cece958e2bacaa56264c526723c2d735b

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 87dfe4c906..9d637bf920 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -786,6 +786,7 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 	int ret = -EINVAL;
 	int i;
 
+	printf("Trying fit image at 0x%lx sector\n", sector_offs);
 	for (i = 0; i < CONFIG_SPL_FIT_IMAGE_MULTIPLE; i++) {
 		if (i > 0) {
 			sector_offs +=

commit a4de8b67324394e12a25f2b96d67115c75a5add6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 15 03:11:39 2021 +0000

    rockchip: common: don't auto load file
    
    It's firendly for "dhcp" command.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If5c54e61bdea14577f9f6c34ece112ad6a50a507

diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index e5b83682e1..366b51dc06 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -148,5 +148,6 @@
 #endif /* CONFIG_SPL_BUILD */
 
 #define CONFIG_DISPLAY_BOARDINFO_LATE
+#define CONFIG_SYS_AUTOLOAD	"no"
 
 #endif /* _ROCKCHIP_COMMON_H_ */

commit 0de7ff3b7c2ae2c18203c5a670186c08b9daf07a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 10 02:39:36 2021 +0000

    rockchip: board: support parse "bootargs_envf"
    
    "bootargs_envf" is from env fragment.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I1456997469889f52e5fce910be53ca3f773ac7d4

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index aafaa23b40..bd8fc9a69e 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -1043,6 +1043,7 @@ char *board_fdt_chosen_bootargs(void *fdt)
 	const char *bootargs;
 	int nodeoffset;
 	int i, dump;
+	char *msg = "kernel";
 
 	/* debug */
 	hotkey_run(HK_INITCALL);
@@ -1059,9 +1060,17 @@ char *board_fdt_chosen_bootargs(void *fdt)
 		bootargs = fdt_getprop(fdt, nodeoffset, arr_bootargs[i], NULL);
 		if (!bootargs)
 			continue;
+#ifdef CONFIG_ENVF
+		/* Allow "bootargs_envf" to replace "bootargs" */
+		if (!strcmp("bootargs", arr_bootargs[i]) &&
+		    env_get("bootargs_envf")) {
+			bootargs = env_get("bootargs_envf");
+			msg = "envf";
+		}
+#endif
 		if (dump)
-			printf("## bootargs(kernel-%s): %s\n\n",
-			       arr_bootargs[i], bootargs);
+			printf("## bootargs(%s-%s): %s\n\n",
+			       msg, arr_bootargs[i], bootargs);
 		/*
 		 * Append kernel bootargs
 		 * If use AB system, delete default "root=" which route

commit 5a94b26492fd3ad20c580976e18e101b67d14e6e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Nov 9 08:16:50 2021 +0000

    env: add env fragment support
    
    It's a way to partly update env by user.
    
    configure:
      - CONFIG_ENVF
      - CONFIG_ENVF_LIST
      - CONFIG_ENV_SIZE
    
    Tool example:
       ./tools/mkenvimage -s 0x8000 -p 0x0 -o envf.bin envf.txt
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ie141f9ae9d91228c206f6d770d07ed6a54497b35

diff --git a/cmd/nvedit.c b/cmd/nvedit.c
index c725de256e..591e5d7990 100644
--- a/cmd/nvedit.c
+++ b/cmd/nvedit.c
@@ -1092,7 +1092,7 @@ ulong env_get_ulong(const char *name, int base, ulong default_val)
 }
 
 #ifndef CONFIG_SPL_BUILD
-#if defined(CONFIG_CMD_SAVEENV) && !defined(CONFIG_ENV_IS_NOWHERE)
+#if defined(CONFIG_CMD_SAVEENV)
 static int do_env_save(cmd_tbl_t *cmdtp, int flag, int argc,
 		       char * const argv[])
 {
@@ -1544,7 +1544,7 @@ static cmd_tbl_t cmd_env_sub[] = {
 #if defined(CONFIG_CMD_RUN)
 	U_BOOT_CMD_MKENT(run, CONFIG_SYS_MAXARGS, 1, do_run, "", ""),
 #endif
-#if defined(CONFIG_CMD_SAVEENV) && !defined(CONFIG_ENV_IS_NOWHERE)
+#if defined(CONFIG_CMD_SAVEENV)
 	U_BOOT_CMD_MKENT(save, 1, 0, do_env_save, "", ""),
 #endif
 	U_BOOT_CMD_MKENT(set, CONFIG_SYS_MAXARGS, 0, do_env_set, "", ""),
@@ -1617,7 +1617,7 @@ static char env_help_text[] =
 #if defined(CONFIG_CMD_RUN)
 	"env run var [...] - run commands in an environment variable\n"
 #endif
-#if defined(CONFIG_CMD_SAVEENV) && !defined(CONFIG_ENV_IS_NOWHERE)
+#if defined(CONFIG_CMD_SAVEENV)
 	"env save - save environment\n"
 #endif
 	"env set [-f] name [arg ...]\n";
diff --git a/common/board_r.c b/common/board_r.c
index 4ecd2d10c5..a25d09dc6b 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -892,9 +892,10 @@ static init_fnc_t init_sequence_r[] = {
 #if defined(CONFIG_ARM) || defined(CONFIG_NDS32) || defined(CONFIG_RISCV)
 	board_init,	/* Setup chipselects */
 #endif
-
 #if defined(CONFIG_USING_KERNEL_DTB) && !defined(CONFIG_ENV_IS_NOWHERE)
 	initr_env_switch,
+#elif defined(CONFIG_ENVF)
+	env_load,
 #endif
 
 	/*
diff --git a/env/Kconfig b/env/Kconfig
index 1a18e2cf93..50af6f99f4 100644
--- a/env/Kconfig
+++ b/env/Kconfig
@@ -40,6 +40,20 @@ config ENV_IS_NOWHERE
 	  stored. U-Boot will therefore always start up with a default
 	  environment.
 
+config ENVF
+	bool "Environment fragment is store in envf partition"
+	depends on ENV_IS_NOWHERE
+	help
+	  Use this if you want to add a env fragment partition to overlay/store
+	  some specific environments.
+
+config ENVF_LIST
+	string "Specific environments list of env fragment"
+	depends on ENVF
+	default ""
+	help
+	  The environment white list.
+
 config ENV_IS_IN_EEPROM
 	bool "Environment in EEPROM"
 	depends on !CHAIN_OF_TRUST
diff --git a/env/nowhere.c b/env/nowhere.c
index f654883c8a..bbb2faeed7 100644
--- a/env/nowhere.c
+++ b/env/nowhere.c
@@ -12,9 +12,144 @@
 #include <command.h>
 #include <environment.h>
 #include <linux/stddef.h>
+#include <boot_rkimg.h>
+#include <memalign.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#ifdef CONFIG_ENVF
+/*
+ * example: ./tools/mkenvimage -s 0x8000 -p 0x0 -o envf.bin envf.txt
+ *
+ * - 0x8000: the value of CONFIG_ENV_SIZE.
+ * - env.txt: input file
+ */
+#define ENVF_MAX_ENTRY		64
+#define ENVF_PART		"envf"
+#define ENVF_EMSG		"error: please use \"bootargs_envf\" but not " \
+				"\"bootargs\" in CONFIG_ENVF_LIST and envf.bin"
+static char *envf_entry[ENVF_MAX_ENTRY];
+static u32 envf_num;
+
+static int envf_extract_list(void)
+{
+	char *tok, *p;
+	u32 i = 0;
+
+	tok = strdup(CONFIG_ENVF_LIST);
+	if (!tok)
+		return -ENOMEM;
+
+	p = strtok(tok, " ");
+	while (p && i < ENVF_MAX_ENTRY) {
+		if (!strcmp(p, "bootargs")) {
+			printf("%s\n", ENVF_EMSG);
+			run_command("download", 0);
+		}
+		envf_entry[i++] = p;
+		p = strtok(NULL, " ");
+	}
+
+	envf_num = i;
+
+	return 0;
+}
+
+/* allow failure, not stop boot */
+static int envf_load(void)
+{
+	struct blk_desc *dev_desc;
+	disk_partition_t part;
+	env_t *envf;
+	u32 blk_cnt;
+	int ret = 0;
+
+	printf("ENVF: ");
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("dev_desc null!\n");
+		return 0;
+	}
+
+	if (part_get_info_by_name(dev_desc, ENVF_PART, &part) < 0) {
+		printf("no %s partition\n", ENVF_PART);
+		return 0;
+	}
+
+	blk_cnt = DIV_ROUND_UP(ENV_SIZE, part.blksz);
+	envf = memalign(ARCH_DMA_MINALIGN, blk_cnt * part.blksz);
+	if (!envf) {
+		printf("no memory\n");
+		return 0;
+	}
+
+	if (blk_dread(dev_desc, part.start, blk_cnt, (void *)envf) != blk_cnt) {
+		printf("io error\n");
+		ret = -EIO;
+		goto out;
+	}
+
+	if (crc32(0, envf->data, ENV_SIZE) != envf->crc) {
+		printf("!bad CRC\n");
+		ret = -EINVAL;
+		goto out;
+	}
+
+	envf_extract_list();
+
+	if (!himport_r(&env_htab, (char *)envf->data, ENV_SIZE, '\0',
+		       H_NOCLEAR, 0, envf_num, envf_entry))
+		printf("himport error\n");
+
+	printf("OK\n");
+
+out:
+	if (envf)
+		free(envf);
+
+	return ret;
+}
+
+static int envf_save(void)
+{
+	ALLOC_CACHE_ALIGN_BUFFER(env_t, envf, 1);
+	struct blk_desc *dev_desc;
+	disk_partition_t part;
+	u32 blk_cnt;
+	ssize_t	len;
+	char *res;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("dev_desc null!\n");
+		return -EINVAL;
+	}
+
+	if (part_get_info_by_name(dev_desc, ENVF_PART, &part) < 0) {
+		printf("envf: no partition\n");
+		return -ENODEV;
+	}
+
+	blk_cnt = DIV_ROUND_UP(ENV_SIZE, part.blksz);
+	res = (char *)envf->data;
+	len = hexport_r(&env_htab, '\0', H_MATCH_KEY | H_MATCH_IDENT,
+			&res, ENV_SIZE, envf_num, envf_entry);
+	if (len < 0) {
+		printf("envf: hexpor errno: %d\n", errno);
+		return -EINVAL;
+	}
+
+	envf->crc = crc32(0, envf->data, ENV_SIZE);
+	if (blk_dwrite(dev_desc, part.start, blk_cnt, (char *)envf) != blk_cnt) {
+		printf("envf: io error\n");
+		return -EIO;
+	}
+
+	return 0;
+}
+#endif
+
 /*
  * Because we only ever have the default environment available we must mark
  * it as invalid.
@@ -30,5 +165,11 @@ static int env_nowhere_init(void)
 U_BOOT_ENV_LOCATION(nowhere) = {
 	.location	= ENVL_NOWHERE,
 	.init		= env_nowhere_init,
+#ifdef CONFIG_ENVF
+	.load		= envf_load,
+	.save		= env_save_ptr(envf_save),
+	ENV_NAME("envf")
+#else
 	ENV_NAME("nowhere")
+#endif
 };

commit 751413c758d9d4aeac9c624cb98794b3dcc7cda8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 10 08:01:51 2021 +0000

    rockchip: rkimg: init fdt_size for distor
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ibcea6f9eacd3f6b97585e45dd33b7a47941fbdf9

diff --git a/arch/arm/mach-rockchip/boot_rkimg.c b/arch/arm/mach-rockchip/boot_rkimg.c
index 23e7d77b62..2be234378a 100644
--- a/arch/arm/mach-rockchip/boot_rkimg.c
+++ b/arch/arm/mach-rockchip/boot_rkimg.c
@@ -545,6 +545,7 @@ int rockchip_read_dtb_file(void *fdt_addr)
 #ifdef CONFIG_ROCKCHIP_EARLY_DISTRO_DTB
 	ret = rockchip_read_distro_dtb(fdt_addr);
 	if (!ret) {
+		fdt_size = fdt_totalsize(fdt_addr);
 		if (!sysmem_alloc_base(MEM_FDT, (phys_addr_t)fdt_addr,
 		     ALIGN(fdt_size, RK_BLK_SIZE) + CONFIG_SYS_FDT_PAD))
 			return -ENOMEM;

commit 1c67daaa06b8a7833c36cd9e910967828e04087b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 10 06:27:27 2021 +0000

    scripts: fit: increase external data offset
    
    Fix compile error when fit signature is enabled, because
    bl31.elf increases more bl31 binaries.
    
    compile error:
      Failed: external offset 0xe00 overlaps FIT length 0x1000
      ./tools/mkimage Can't add hashes to FIT blob: -22
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Iec1719d9edcbe1755c1b6575d67ccc4b7e3a5d7d

diff --git a/scripts/fit.sh b/scripts/fit.sh
index 158659ea3a..891d1a202c 100755
--- a/scripts/fit.sh
+++ b/scripts/fit.sh
@@ -18,7 +18,7 @@ SIG_UBOOT="${FIT_DIR}/uboot.data2sign"
 SIG_BOOT="${FIT_DIR}/boot.data2sign"
 SIG_RECOVERY="${FIT_DIR}/recovery.data2sign"
 # offs
-OFFS_DATA="0xE00"
+OFFS_DATA="0x1000"
 # file
 CHIP_FILE="arch/arm/lib/.asm-offsets.s.cmd"
 # placeholder address

commit 3d5347f8b83f4f9e10347939a2d4ef4cb915b61e
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Nov 9 11:38:20 2021 +0800

    i2c: rk_i2c: Add div and data hold time adapter
    
    For 400k frequency division, 1:1 is incorrect,
    change to automatic frequency division.
    
    Change-Id: I9ed7c6f2cbe45222ce820c9af3031dd7114e1fab
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/i2c.h b/arch/arm/include/asm/arch-rockchip/i2c.h
index d81f8fffce..b52c6f77da 100644
--- a/arch/arm/include/asm/arch-rockchip/i2c.h
+++ b/arch/arm/include/asm/arch-rockchip/i2c.h
@@ -37,8 +37,15 @@ struct i2c_regs {
 #define I2C_CON_STOP		(1 << 4)
 #define I2C_CON_LASTACK		(1 << 5)
 #define I2C_CON_ACTACK		(1 << 6)
+#define I2C_CON_TUNING_MASK	(0xff << 8)
+#define I2C_CON_SDA_CFG(cfg)	((cfg) << 8)
+#define I2C_CON_STA_CFG(cfg)	((cfg) << 12)
+#define I2C_CON_STO_CFG(cfg)	((cfg) << 14)
+#define I2C_CON_VERSION		GENMASK_ULL(24, 16)
+#define I2C_CON_VERSION_SHIFT	16
 
 /* Clock dividor register */
+#define I2C_CLK_DIV_HIGH_SHIFT	16
 #define I2C_CLKDIV_VAL(divl, divh) \
 	(((divl) & 0xffff) | (((divh) << 16) & 0xffff0000))
 
diff --git a/drivers/i2c/rk_i2c.c b/drivers/i2c/rk_i2c.c
index cf5dbe68fa..917578bb44 100644
--- a/drivers/i2c/rk_i2c.c
+++ b/drivers/i2c/rk_i2c.c
@@ -32,8 +32,76 @@ struct rk_i2c {
 	struct clk clk;
 	struct i2c_regs *regs;
 	unsigned int speed;
+	unsigned int cfg;
 };
 
+struct i2c_spec_values {
+	unsigned int min_low_ns;
+	unsigned int min_high_ns;
+	unsigned int max_rise_ns;
+	unsigned int max_fall_ns;
+};
+
+enum {
+	RK_I2C_VERSION0 = 0,
+	RK_I2C_VERSION1,
+	RK_I2C_VERSION5 = 5,
+};
+
+/********************* Private Variable Definition ***************************/
+
+static const struct i2c_spec_values standard_mode_spec = {
+	.min_low_ns = 4700,
+	.min_high_ns = 4000,
+	.max_rise_ns = 1000,
+	.max_fall_ns = 300,
+};
+
+static const struct i2c_spec_values fast_mode_spec = {
+	.min_low_ns = 1300,
+	.min_high_ns = 600,
+	.max_rise_ns = 300,
+	.max_fall_ns = 300,
+};
+
+static const struct i2c_spec_values fast_modeplus_spec = {
+	.min_low_ns = 500,
+	.min_high_ns = 260,
+	.max_rise_ns = 120,
+	.max_fall_ns = 120,
+};
+
+static const struct i2c_spec_values *rk_i2c_get_spec(unsigned int speed)
+{
+	if (speed == 1000)
+		return &fast_modeplus_spec;
+	else if (speed == 400)
+		return &fast_mode_spec;
+	else
+		return &standard_mode_spec;
+}
+
+static void rk_i2c_show_regs(struct i2c_regs *regs)
+{
+#ifdef DEBUG
+	uint i;
+
+	debug("i2c_con: 0x%08x\n", readl(&regs->con));
+	debug("i2c_clkdiv: 0x%08x\n", readl(&regs->clkdiv));
+	debug("i2c_mrxaddr: 0x%08x\n", readl(&regs->mrxaddr));
+	debug("i2c_mrxraddR: 0x%08x\n", readl(&regs->mrxraddr));
+	debug("i2c_mtxcnt: 0x%08x\n", readl(&regs->mtxcnt));
+	debug("i2c_mrxcnt: 0x%08x\n", readl(&regs->mrxcnt));
+	debug("i2c_ien: 0x%08x\n", readl(&regs->ien));
+	debug("i2c_ipd: 0x%08x\n", readl(&regs->ipd));
+	debug("i2c_fcnt: 0x%08x\n", readl(&regs->fcnt));
+	for (i = 0; i < 8; i++)
+		debug("i2c_txdata%d: 0x%08x\n", i, readl(&regs->txdata[i]));
+	for (i = 0; i < 8; i++)
+		debug("i2c_rxdata%d: 0x%08x\n", i, readl(&regs->rxdata[i]));
+#endif
+}
+
 static inline void rk_i2c_get_div(int div, int *divh, int *divl)
 {
 	*divl = div / 2;
@@ -48,9 +116,9 @@ static inline void rk_i2c_get_div(int div, int *divh, int *divl)
  * SCL = PCLK / SCLK Divisor
  * i2c_rate = PCLK
  */
-static void rk_i2c_set_clk(struct rk_i2c *i2c, uint32_t scl_rate)
+static void rk_i2c_set_clk(struct rk_i2c *i2c, unsigned int scl_rate)
 {
-	uint32_t i2c_rate;
+	unsigned int i2c_rate;
 	int div, divl, divh;
 
 	/* First get i2c rate from pclk */
@@ -69,25 +137,75 @@ static void rk_i2c_set_clk(struct rk_i2c *i2c, uint32_t scl_rate)
 	debug("set clk(I2C_CLKDIV: 0x%08x)\n", readl(&i2c->regs->clkdiv));
 }
 
-static void rk_i2c_show_regs(struct i2c_regs *regs)
+static int rk_i2c_adapter_clk(struct rk_i2c *i2c, unsigned int scl_rate)
 {
-#ifdef DEBUG
-	uint i;
+	const struct i2c_spec_values *spec;
+	unsigned int min_total_div, min_low_div, min_high_div, min_hold_div;
+	unsigned int low_div, high_div, extra_div, extra_low_div;
+	unsigned int min_low_ns, min_high_ns;
+	unsigned int start_setup = 0;
+	unsigned int i2c_rate = clk_get_rate(&i2c->clk);
+	unsigned int speed;
 
-	debug("i2c_con: 0x%08x\n", readl(&regs->con));
-	debug("i2c_clkdiv: 0x%08x\n", readl(&regs->clkdiv));
-	debug("i2c_mrxaddr: 0x%08x\n", readl(&regs->mrxaddr));
-	debug("i2c_mrxraddR: 0x%08x\n", readl(&regs->mrxraddr));
-	debug("i2c_mtxcnt: 0x%08x\n", readl(&regs->mtxcnt));
-	debug("i2c_mrxcnt: 0x%08x\n", readl(&regs->mrxcnt));
-	debug("i2c_ien: 0x%08x\n", readl(&regs->ien));
-	debug("i2c_ipd: 0x%08x\n", readl(&regs->ipd));
-	debug("i2c_fcnt: 0x%08x\n", readl(&regs->fcnt));
-	for (i = 0; i < 8; i++)
-		debug("i2c_txdata%d: 0x%08x\n", i, readl(&regs->txdata[i]));
-	for (i = 0; i < 8; i++)
-		debug("i2c_rxdata%d: 0x%08x\n", i, readl(&regs->rxdata[i]));
-#endif
+	debug("rk_i2c_set_clk: i2c rate = %d, scl rate = %d\n", i2c_rate,
+	      scl_rate);
+
+	if (scl_rate <= 100000 && scl_rate >= 1000) {
+		start_setup = 1;
+		speed = 100;
+	} else if (scl_rate <= 400000 && scl_rate >= 100000) {
+		speed = 400;
+	} else if (scl_rate <= 1000000 && scl_rate > 400000) {
+		speed = 1000;
+	} else {
+		debug("invalid i2c speed : %d\n", scl_rate);
+		return -EINVAL;
+	}
+
+	spec = rk_i2c_get_spec(speed);
+	i2c_rate = DIV_ROUND_UP(i2c_rate, 1000);
+	speed = DIV_ROUND_UP(scl_rate, 1000);
+
+	min_total_div = DIV_ROUND_UP(i2c_rate, speed * 8);
+
+	min_high_ns = spec->max_rise_ns + spec->min_high_ns;
+	min_high_div = DIV_ROUND_UP(i2c_rate * min_high_ns, 8 * 1000000);
+
+	min_low_ns = spec->max_fall_ns + spec->min_low_ns;
+	min_low_div = DIV_ROUND_UP(i2c_rate * min_low_ns, 8 * 1000000);
+
+	min_high_div = (min_high_div < 1) ? 2 : min_high_div;
+	min_low_div = (min_low_div < 1) ? 2 : min_low_div;
+
+	min_hold_div = min_high_div + min_low_div;
+
+	if (min_hold_div >= min_total_div) {
+		high_div = min_high_div;
+		low_div = min_low_div;
+	} else {
+		extra_div = min_total_div - min_hold_div;
+		extra_low_div = DIV_ROUND_UP(min_low_div * extra_div,
+					     min_hold_div);
+
+		low_div = min_low_div + extra_low_div;
+		high_div = min_high_div + (extra_div - extra_low_div);
+	}
+
+	high_div--;
+	low_div--;
+
+	if (high_div > 0xffff || low_div > 0xffff)
+		return -EINVAL;
+
+	/* 1 for data hold/setup time is enough */
+	i2c->cfg = I2C_CON_SDA_CFG(1) | I2C_CON_STA_CFG(start_setup);
+	writel((high_div << I2C_CLK_DIV_HIGH_SHIFT) | low_div,
+	       &i2c->regs->clkdiv);
+
+	debug("set clk(I2C_TIMING: 0x%08x)\n", i2c->cfg);
+	debug("set clk(I2C_CLKDIV: 0x%08x)\n", readl(&i2c->regs->clkdiv));
+
+	return 0;
 }
 
 static int rk_i2c_send_start_bit(struct rk_i2c *i2c, u32 con)
@@ -99,7 +217,7 @@ static int rk_i2c_send_start_bit(struct rk_i2c *i2c, u32 con)
 	writel(I2C_IPD_ALL_CLEAN, &regs->ipd);
 
 	writel(I2C_STARTIEN, &regs->ien);
-	writel(I2C_CON_EN | I2C_CON_START | con, &regs->con);
+	writel(I2C_CON_EN | I2C_CON_START | i2c->cfg | con, &regs->con);
 
 	start = get_timer(0);
 	while (1) {
@@ -116,7 +234,7 @@ static int rk_i2c_send_start_bit(struct rk_i2c *i2c, u32 con)
 	}
 
 	/* clean start bit */
-	writel(I2C_CON_EN | con, &regs->con);
+	writel(I2C_CON_EN | i2c->cfg | con, &regs->con);
 
 	return 0;
 }
@@ -129,7 +247,7 @@ static int rk_i2c_send_stop_bit(struct rk_i2c *i2c)
 	debug("I2c Send Stop bit.\n");
 	writel(I2C_IPD_ALL_CLEAN, &regs->ipd);
 
-	writel(I2C_CON_EN | I2C_CON_STOP, &regs->con);
+	writel(I2C_CON_EN | i2c->cfg | I2C_CON_STOP, &regs->con);
 	writel(I2C_CON_STOP, &regs->ien);
 
 	start = get_timer(0);
@@ -209,7 +327,7 @@ static int rk_i2c_read(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len,
 		 */
 		if (snd_chunk) {
 			con |= I2C_CON_MOD(I2C_MODE_RX);
-			writel(con, &regs->con);
+			writel(con | i2c->cfg, &regs->con);
 		} else {
 			con |= I2C_CON_MOD(I2C_MODE_TRX);
 			err = rk_i2c_send_start_bit(i2c, con);
@@ -303,12 +421,14 @@ static int rk_i2c_write(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len,
 
 		/* If the write is the first, need to send start bit */
 		if (!next) {
-			err = rk_i2c_send_start_bit(i2c, I2C_CON_EN | I2C_CON_MOD(I2C_MODE_TX));
+			err = rk_i2c_send_start_bit(i2c, I2C_CON_EN |
+					   I2C_CON_MOD(I2C_MODE_TX));
 			if (err)
 				return err;
 			next = true;
 		} else {
-			writel(I2C_CON_EN | I2C_CON_MOD(I2C_MODE_TX), &regs->con);
+			writel(I2C_CON_EN | I2C_CON_MOD(I2C_MODE_TX) | i2c->cfg,
+			       &regs->con);
 		}
 		writel(I2C_MBTFIEN | I2C_NAKRCVIEN, &regs->ien);
 		writel(bytes_xferred, &regs->mtxcnt);
@@ -380,11 +500,24 @@ exit:
 	return ret;
 }
 
+static unsigned int rk3x_i2c_get_version(struct rk_i2c *i2c)
+{
+	struct i2c_regs *regs = i2c->regs;
+	uint version;
+
+	version = readl(&regs->con) & I2C_CON_VERSION;
+
+	return version >>= I2C_CON_VERSION_SHIFT;
+}
+
 int rockchip_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
 {
 	struct rk_i2c *i2c = dev_get_priv(bus);
 
-	rk_i2c_set_clk(i2c, speed);
+	if (rk3x_i2c_get_version(i2c) >= RK_I2C_VERSION1)
+		rk_i2c_adapter_clk(i2c, speed);
+	else
+		rk_i2c_set_clk(i2c, speed);
 
 	return 0;
 }

commit d393fbb5dad66da68f145a9375e73bcaa7f201b6
Author: Wesley Yao <wesley.yao@rock-chips.com>
Date:   Fri Oct 29 15:11:15 2021 +0800

    drivers: ram: rv1126: Adjust the time of sdram_detect_dbw of LPDDR3
    
    sdram_detect_dbw of LPDDR3 requires real number of row and bw. Otherwise
    the wrong dbw will calculate the wrong tRFC. So adjust the time of
    sdram_detect_dbw of LPDDR3 to the end of sdram_detect_cap.
    
    Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
    Change-Id: I00fac4bd9d60ec339bcd5115ac3454ac3cbb3519

diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
index beda92ed91..68f6a7b7d7 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -2590,7 +2590,8 @@ static u64 dram_detect_cap(struct dram_info *dram,
 				goto cap_err;
 
 			sdram_detect_bank(cap_info, coltmp, bktmp);
-			sdram_detect_dbw(cap_info, dram_type);
+			if (dram_type != LPDDR3)
+				sdram_detect_dbw(cap_info, dram_type);
 		} else {
 			coltmp = 10;
 			bktmp = 4;
@@ -2694,6 +2695,9 @@ static u64 dram_detect_cap(struct dram_info *dram,
 		cap_info->cs1_high16bit_row = 0;
 	}
 
+	if (dram_type == LPDDR3)
+		sdram_detect_dbw(cap_info, dram_type);
+
 	return 0;
 cap_err:
 	return -1;

commit 2fba4f504e662589a0a2ca19d348d5cb1d8771e9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 10 03:31:53 2021 +0000

    rockchip: boot rkimg: fix compile error
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I18a2e5964c1b870d9120f7804dfa228ee8569ffc

diff --git a/arch/arm/mach-rockchip/boot_rkimg.c b/arch/arm/mach-rockchip/boot_rkimg.c
index 89c554b879..23e7d77b62 100644
--- a/arch/arm/mach-rockchip/boot_rkimg.c
+++ b/arch/arm/mach-rockchip/boot_rkimg.c
@@ -535,7 +535,7 @@ int rockchip_read_dtb_file(void *fdt_addr)
 {
 	int hash_size = 0;
 	int ret = -1;
-	u32 fdt_size;
+	u32 fdt_size = 0;
 	char *hash;
 
 	/* init from storage if resource list is empty */

commit 533fb57b1b65eaed56841e1897e453fc4ddc0122
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Fri Nov 5 18:34:05 2021 +0800

    configs: rv1126: new configuration for rv1126-bat-evb with spi-nor
    
    Change-Id: Ie6be5782524ee2f36a86a788a063a52b6c97e856
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/configs/rv1126-bat-spi-nor-tb.config b/configs/rv1126-bat-spi-nor-tb.config
new file mode 100644
index 0000000000..699d8d04ac
--- /dev/null
+++ b/configs/rv1126-bat-spi-nor-tb.config
@@ -0,0 +1,7 @@
+# CONFIG_DM_MMC is not set
+# CONFIG_MMC is not set
+CONFIG_BASE_DEFCONFIG="rv1126-spi-nor-tb.config"
+CONFIG_DEFAULT_DEVICE_TREE="rv1126-bat-evb"
+CONFIG_LOADER_INI="RV1126MINIALL_LP4_EMMC_TB.ini"
+CONFIG_OF_LIST="rv1126-bat-evb"
+CONFIG_SPL_FIT_IMAGE_KB=320

commit fcbf923132a40be54668fb0bf7f3f34aad654880
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Fri Nov 5 18:28:15 2021 +0800

    configs: rv1126-spi-nor-tb.config: enable hw crypto
    
    Test on rv1126-bat-evb with spi-nor, it speeds up about 33ms.
    
    19.292 ms ## Checking mcu 0x00108000 (gzip @0x00208000) ... sha256(e167565fd6...) + sha256(61edad711a...) + OK
    24.905 ms ## Checking optee 0x00040000 (gzip @0x00140000) ... sha256(ad30384e99...) + sha256(065cfaa0f7...) + OK
    30.833 ms ## Checking fdt 0x01f00000 ... sha256-skipped + OK
    rockchip_sfc_xfer_data_dma 55 MB 148500000 -2/s
    97.879 ms ## Checking kernel 0x00608000 (gzip @0x04800000) ... sha256-skipped + + OK
    Jumping to Kernel(0x00608000) via OP-TEE(0x00040000)
    Total: 121.424 ms
    
    Change-Id: I0fd04a8842b108fc6ead1ec89326789109f751dc
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/configs/rv1126-spi-nor-tb.config b/configs/rv1126-spi-nor-tb.config
index c722bea4ab..8119563fa6 100644
--- a/configs/rv1126-spi-nor-tb.config
+++ b/configs/rv1126-spi-nor-tb.config
@@ -1,11 +1,19 @@
+# CONFIG_SPL_HASH_SUPPORT is not set
+# CONFIG_SPL_ROCKCHIP_CIPHER is not set
+# CONFIG_SPL_ROCKCHIP_CRYPTO_V1 is not set
+# CONFIG_SPL_ROCKCHIP_HMAC is not set
+# CONFIG_SPL_ROCKCHIP_SECURE_OTP_V2 is not set
 CONFIG_BASE_DEFCONFIG="rv1126-spi-nor-tiny_defconfig"
 CONFIG_LOADER_INI="RV1126MINIALL_SPI_NOR_TB.ini"
 CONFIG_OF_U_BOOT_REMOVE_PROPS=""
 CONFIG_SPL_BLK_READ_PREPARE=y
+CONFIG_SPL_CRYPTO_SUPPORT=y
+CONFIG_SPL_DM_CRYPTO=y
+CONFIG_SPL_FIT_HW_CRYPTO=y
 CONFIG_SPL_FIT_IMAGE_KB=384
-# CONFIG_SPL_HASH_SUPPORT is not set
 CONFIG_SPL_KERNEL_BOOT=y
-# CONFIG_SPL_ROCKCHIP_SECURE_OTP_V2 is not set
+CONFIG_SPL_ROCKCHIP_CRYPTO_V2=y
+CONFIG_SPL_ROCKCHIP_RSA=y
 CONFIG_SYS_MALLOC_F_LEN=0xc000
 CONFIG_TPL_SYS_MALLOC_F_LEN=0xc000
 CONFIG_TRUST_INI="RV1126TOS_TB.ini"

commit f6fef99a297ba8bf8ec46d7ae74e3e6a2e38ea08
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Fri Nov 5 18:19:20 2021 +0800

    rockchip: Kconfig: enable SPL_MMC_SUPPORT if MMC
    
    MMC is undesired for spi-nor *only* configuration.
    
    Change-Id: I17b82f44ddcc9415b3f34c24af3faf922b3be62d
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 1c3a6768d8..2f52d94202 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -631,7 +631,7 @@ config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
 	  to allow multiple entries.
 
 config SPL_MMC_SUPPORT
-	default y if !SPL_ROCKCHIP_BACK_TO_BROM
+	default y if !SPL_ROCKCHIP_BACK_TO_BROM && MMC
 
 config RKIMG_BOOTLOADER
 	bool "Support for Rockchip platform features"

commit ddcdd6b325b6fe9f1d632e0ea5a5e41abd96b29a
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Fri Nov 5 18:16:27 2021 +0800

    rockchip: dts: rv1126-bat-evb: make spi-nor bootable under 148.5Mhz
    
    Change-Id: Iabe5fcb63ba36c79842c1f1abd68f4ac64fb9e89
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/arch/arm/dts/rv1126-bat-evb.dts b/arch/arm/dts/rv1126-bat-evb.dts
index baa03c3b9b..d527d5a801 100644
--- a/arch/arm/dts/rv1126-bat-evb.dts
+++ b/arch/arm/dts/rv1126-bat-evb.dts
@@ -14,7 +14,7 @@
 
 	chosen {
 		stdout-path = &uart2;
-		u-boot,spl-boot-order = &emmc;
+		u-boot,spl-boot-order = &spi_nor, &emmc;
 	};
 
 	adc-keys {
@@ -88,6 +88,10 @@
 	status = "disabled";
 };
 
+&spi_nor {
+	spi-max-frequency = <148500000>;
+};
+
 &stmmac_axi_setup {
 	status = "disabled";
 };

commit 48111c221d0e3dc64a1c5bed8d87a55701a26d43
Author: Simon Xue <xxm@rock-chips.com>
Date:   Mon Nov 8 17:47:56 2021 +0800

    dm: adc: Add driver for Rockchip SARADC v2
    
    Change-Id: I55b4ff113ab3e474bb5999ab77de08e247341d17
    Signed-off-by: Simon Xue <xxm@rock-chips.com>

diff --git a/drivers/adc/Kconfig b/drivers/adc/Kconfig
index 2130cbbbca..007dadc837 100644
--- a/drivers/adc/Kconfig
+++ b/drivers/adc/Kconfig
@@ -44,3 +44,12 @@ config SARADC_ROCKCHIP
 	  - 2~6 analog input channels
 	  - 1O or 12 bits resolution
 	  - Up to 1MSPS of sample rate
+
+config SARADC_ROCKCHIP_V2
+	bool "Enable Rockchip SARADC v2 driver"
+	help
+	  This enables driver for Rockchip SARADC v2.
+	  It provides:
+	  - 8 analog input channels
+	  - 12 bits resolution
+	  - Up to 1MSPS of sample rate
diff --git a/drivers/adc/Makefile b/drivers/adc/Makefile
index 4b5aa693ec..3c0d9b066a 100644
--- a/drivers/adc/Makefile
+++ b/drivers/adc/Makefile
@@ -9,3 +9,4 @@ obj-$(CONFIG_ADC) += adc-uclass.o
 obj-$(CONFIG_ADC_EXYNOS) += exynos-adc.o
 obj-$(CONFIG_ADC_SANDBOX) += sandbox.o
 obj-$(CONFIG_SARADC_ROCKCHIP) += rockchip-saradc.o
+obj-$(CONFIG_SARADC_ROCKCHIP_V2) += rockchip-saradc-v2.o
diff --git a/drivers/adc/rockchip-saradc-v2.c b/drivers/adc/rockchip-saradc-v2.c
new file mode 100644
index 0000000000..6ba62ad914
--- /dev/null
+++ b/drivers/adc/rockchip-saradc-v2.c
@@ -0,0 +1,221 @@
+// SPDX-License-Identifier:     GPL-2.0+
+/*
+ * (C) Copyright 2021, Rockchip Electronics Co., Ltd
+ *
+ * Rockchip SARADC driver for U-Boot
+ */
+
+#include <common.h>
+#include <adc.h>
+#include <clk.h>
+#include <dm.h>
+#include <errno.h>
+#include <asm/io.h>
+
+#define SARADC2_EN_END_INT		BIT(0)
+#define SARADC2_START			BIT(4)
+#define SARADC2_SINGLE_MODE		BIT(5)
+
+#define SARADC_TIMEOUT			(100 * 1000)
+
+struct rockchip_saradc_regs {
+	u32 conv_con;
+	u32 t_pd_soc;
+	u32 t_as_soc;
+	u32 t_das_soc;
+	u32 t_sel_soc;
+	u32 high_comp0;
+	u32 high_comp1;
+	u32 high_comp2;
+	u32 high_comp3;
+	u32 high_comp4;
+	u32 high_comp5;
+	u32 reserved0044;
+	u32 high_comp7;
+	u32 high_comp8;
+	u32 high_comp9;
+	u32 high_comp10;
+	u32 high_comp11;
+	u32 high_comp12;
+	u32 high_comp13;
+	u32 high_comp14;
+	u32 high_comp15;
+	u32 low_comp0;
+	u32 low_comp1;
+	u32 low_comp2;
+	u32 low_comp3;
+	u32 low_comp4;
+	u32 low_comp5;
+	u32 low_comp6;
+	u32 low_comp7;
+	u32 low_comp8;
+	u32 low_comp9;
+	u32 low_comp10;
+	u32 low_comp11;
+	u32 low_comp12;
+	u32 low_comp13;
+	u32 low_comp14;
+	u32 low_comp15;
+	u32 debounce;
+	u32 ht_int_en;
+	u32 lt_int_en;
+	u32 reserved0160[24];
+	u32 mt_int_en;
+	u32 end_int_en;
+	u32 st_con;
+	u32 status;
+	u32 end_int_st;
+	u32 ht_int_st;
+	u32 lt_int_st;
+	u32 mt_int_st;
+	u32 data0;
+	u32 data1;
+	u32 data2;
+	u32 data3;
+	u32 data4;
+	u32 data5;
+	u32 data6;
+	u32 data7;
+	u32 data8;
+	u32 data9;
+	u32 data10;
+	u32 data11;
+	u32 data12;
+	u32 data13;
+	u32 data14;
+	u32 data15;
+	u32 auto_ch_en;
+};
+
+struct rockchip_saradc_data {
+	int				num_bits;
+	int				num_channels;
+	unsigned long			clk_rate;
+};
+
+struct rockchip_saradc_priv {
+	struct rockchip_saradc_regs		*regs;
+	int					active_channel;
+	const struct rockchip_saradc_data	*data;
+};
+
+static int rockchip_saradc_channel_data(struct udevice *dev, int channel,
+					unsigned int *data)
+{
+	struct rockchip_saradc_priv *priv = dev_get_priv(dev);
+	struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
+	int offset;
+
+	if (channel != priv->active_channel) {
+		pr_err("Requested channel is not active!");
+		return -EINVAL;
+	}
+
+	/* Clear irq */
+	writel(0x1, priv->regs->end_int_st);
+
+	offset = priv->active_channel * 0x4;
+
+	*data = readl(priv->regs->data0 + offset);
+	*data &= uc_pdata->data_mask;
+
+	return 0;
+}
+
+static int rockchip_saradc_start_channel(struct udevice *dev, int channel)
+{
+	struct rockchip_saradc_priv *priv = dev_get_priv(dev);
+	int val;
+
+	if (channel < 0 || channel >= priv->data->num_channels) {
+		pr_err("Requested channel is invalid!");
+		return -EINVAL;
+	}
+
+	val = SARADC2_EN_END_INT << 16 | SARADC2_EN_END_INT;
+	writel(val, priv->regs->end_int_en);
+	val = SARADC2_START | SARADC2_SINGLE_MODE | channel;
+	writel(val << 16 | val, priv->regs->conv_con);
+
+	priv->active_channel = channel;
+
+	return 0;
+}
+
+static int rockchip_saradc_stop(struct udevice *dev)
+{
+	struct rockchip_saradc_priv *priv = dev_get_priv(dev);
+
+	priv->active_channel = -1;
+
+	return 0;
+}
+
+static int rockchip_saradc_probe(struct udevice *dev)
+{
+	struct rockchip_saradc_priv *priv = dev_get_priv(dev);
+	struct clk clk;
+	int ret;
+
+	ret = clk_get_by_index(dev, 0, &clk);
+	if (ret)
+		return ret;
+
+	ret = clk_set_rate(&clk, priv->data->clk_rate);
+	if (IS_ERR_VALUE(ret))
+		return ret;
+
+	priv->active_channel = -1;
+
+	return 0;
+}
+
+static int rockchip_saradc_ofdata_to_platdata(struct udevice *dev)
+{
+	struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
+	struct rockchip_saradc_priv *priv = dev_get_priv(dev);
+	struct rockchip_saradc_data *data;
+
+	data = (struct rockchip_saradc_data *)dev_get_driver_data(dev);
+	priv->regs = (struct rockchip_saradc_regs *)dev_read_addr(dev);
+	if (priv->regs == (struct rockchip_saradc_regs *)FDT_ADDR_T_NONE) {
+		pr_err("Dev: %s - can't get address!", dev->name);
+		return -ENODATA;
+	}
+
+	priv->data = data;
+	uc_pdata->data_mask = (1 << priv->data->num_bits) - 1;
+	uc_pdata->data_format = ADC_DATA_FORMAT_BIN;
+	uc_pdata->data_timeout_us = SARADC_TIMEOUT / 5;
+	uc_pdata->channel_mask = (1 << priv->data->num_channels) - 1;
+
+	return 0;
+}
+
+static const struct adc_ops rockchip_saradc_ops = {
+	.start_channel = rockchip_saradc_start_channel,
+	.channel_data = rockchip_saradc_channel_data,
+	.stop = rockchip_saradc_stop,
+};
+
+static const struct rockchip_saradc_data rk3588_saradc_data = {
+	.num_bits = 12,
+	.num_channels = 8,
+	.clk_rate = 1000000,
+};
+
+static const struct udevice_id rockchip_saradc_ids[] = {
+	{ .compatible = "rockchip,saradc-3588",
+	  .data = (ulong)&rk3588_saradc_data },
+	{ }
+};
+
+U_BOOT_DRIVER(rockchip_saradc_v2) = {
+	.name		= "rockchip_saradc_v2",
+	.id		= UCLASS_ADC,
+	.of_match	= rockchip_saradc_ids,
+	.ops		= &rockchip_saradc_ops,
+	.probe		= rockchip_saradc_probe,
+	.ofdata_to_platdata = rockchip_saradc_ofdata_to_platdata,
+	.priv_auto_alloc_size = sizeof(struct rockchip_saradc_priv),
+};

commit 675552f7c7ad812e9df91b77157e1ec32f258a44
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Mon Nov 1 16:34:50 2021 +0800

    phy: rockchip-inno-usb2: add rk3308 phy configs
    
    Discard RK3328 reused config and add a new RK3308 config since the PHY
    tuning must be done for RK3308 SoCs.
    
    Change-Id: I393d9540da6f7f5a40863d0aec8974a4472252ca
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index 99f6c33714..e7077ed266 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -14,6 +14,7 @@
 #include <syscon.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
+#include <asm/arch/cpu.h>
 
 #include "../usb/gadget/dwc2_udc_otg_priv.h"
 
@@ -638,6 +639,75 @@ static int rk322x_usb2phy_tuning(struct rockchip_usb2phy *rphy)
 	return ret;
 }
 
+static int rk3308_usb2phy_tuning(struct rockchip_usb2phy *rphy)
+{
+	struct regmap *base = get_reg_base(rphy);
+	unsigned int tmp, orig;
+	int ret;
+
+	if (soc_is_rk3308bs()) {
+		/* Enable otg/host port pre-emphasis during non-chirp phase */
+		ret = regmap_read(base, 0, &orig);
+		if (ret)
+			return ret;
+		tmp = orig & ~GENMASK(2, 0);
+		tmp |= BIT(2) & GENMASK(2, 0);
+		ret = regmap_write(base, 0, tmp);
+		if (ret)
+			return ret;
+
+		/* Set otg port squelch trigger point configure to 100mv */
+		ret = regmap_read(base, 0x004, &orig);
+		if (ret)
+			return ret;
+		tmp = orig & ~GENMASK(7, 5);
+		tmp |= 0x40 & GENMASK(7, 5);
+		ret = regmap_write(base, 0x004, tmp);
+		if (ret)
+			return ret;
+
+		ret = regmap_read(base, 0x008, &orig);
+		if (ret)
+			return ret;
+		tmp = orig & ~BIT(0);
+		tmp |= 0x1 & BIT(0);
+		ret = regmap_write(base, 0x008, tmp);
+		if (ret)
+			return ret;
+
+		/* Enable host port pre-emphasis during non-chirp phase */
+		ret = regmap_read(base, 0x400, &orig);
+		if (ret)
+			return ret;
+		tmp = orig & ~GENMASK(2, 0);
+		tmp |= BIT(2) & GENMASK(2, 0);
+		ret = regmap_write(base, 0x400, tmp);
+		if (ret)
+			return ret;
+
+		/* Set host port squelch trigger point configure to 100mv */
+		ret = regmap_read(base, 0x404, &orig);
+		if (ret)
+			return ret;
+		tmp = orig & ~GENMASK(7, 5);
+		tmp |= 0x40 & GENMASK(7, 5);
+		ret = regmap_write(base, 0x404, tmp);
+		if (ret)
+			return ret;
+
+		ret = regmap_read(base, 0x408, &orig);
+		if (ret)
+			return ret;
+		tmp = orig & ~BIT(0);
+		tmp |= 0x1 & BIT(0);
+		ret = regmap_write(base, 0x408, tmp);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
 static struct phy_ops rockchip_usb2phy_ops = {
 	.init = rockchip_usb2phy_init,
 	.exit = rockchip_usb2phy_exit,
@@ -818,6 +888,60 @@ static const struct rockchip_usb2phy_cfg rk322x_phy_cfgs[] = {
 	{ /* sentinel */ }
 };
 
+static const struct rockchip_usb2phy_cfg rk3308_phy_cfgs[] = {
+	{
+		.reg = 0x100,
+		.num_ports	= 2,
+		.phy_tuning	= rk3308_usb2phy_tuning,
+		.clkout_ctl	= { 0x0108, 4, 4, 1, 0 },
+		.port_cfgs	= {
+			[USB2PHY_PORT_OTG] = {
+				.phy_sus	= { 0x0100, 8, 0, 0, 0x1d1 },
+				.bvalid_det_en	= { 0x3020, 2, 2, 0, 1 },
+				.bvalid_det_st	= { 0x3024, 2, 2, 0, 1 },
+				.bvalid_det_clr = { 0x3028, 2, 2, 0, 1 },
+				.iddig_output	= { 0x0100, 10, 10, 0, 1 },
+				.iddig_en	= { 0x0100, 9, 9, 0, 1 },
+				.idfall_det_en	= { 0x3020, 5, 5, 0, 1 },
+				.idfall_det_st	= { 0x3024, 5, 5, 0, 1 },
+				.idfall_det_clr = { 0x3028, 5, 5, 0, 1 },
+				.idrise_det_en	= { 0x3020, 4, 4, 0, 1 },
+				.idrise_det_st	= { 0x3024, 4, 4, 0, 1 },
+				.idrise_det_clr = { 0x3028, 4, 4, 0, 1 },
+				.ls_det_en	= { 0x3020, 0, 0, 0, 1 },
+				.ls_det_st	= { 0x3024, 0, 0, 0, 1 },
+				.ls_det_clr	= { 0x3028, 0, 0, 0, 1 },
+				.utmi_avalid	= { 0x0120, 10, 10, 0, 1 },
+				.utmi_bvalid	= { 0x0120, 9, 9, 0, 1 },
+				.utmi_iddig	= { 0x0120, 6, 6, 0, 1 },
+				.utmi_ls	= { 0x0120, 5, 4, 0, 1 },
+				.vbus_det_en	= { 0x001c, 15, 15, 1, 0 },
+			},
+			[USB2PHY_PORT_HOST] = {
+				.phy_sus	= { 0x0104, 8, 0, 0, 0x1d1 },
+				.ls_det_en	= { 0x3020, 1, 1, 0, 1 },
+				.ls_det_st	= { 0x3024, 1, 1, 0, 1 },
+				.ls_det_clr	= { 0x3028, 1, 1, 0, 1 },
+				.utmi_ls	= { 0x120, 17, 16, 0, 1 },
+				.utmi_hstdet	= { 0x120, 19, 19, 0, 1 }
+			}
+		},
+		.chg_det = {
+			.opmode		= { 0x0100, 3, 0, 5, 1 },
+			.cp_det		= { 0x0120, 24, 24, 0, 1 },
+			.dcp_det	= { 0x0120, 23, 23, 0, 1 },
+			.dp_det		= { 0x0120, 25, 25, 0, 1 },
+			.idm_sink_en	= { 0x0108, 8, 8, 0, 1 },
+			.idp_sink_en	= { 0x0108, 7, 7, 0, 1 },
+			.idp_src_en	= { 0x0108, 9, 9, 0, 1 },
+			.rdm_pdwn_en	= { 0x0108, 10, 10, 0, 1 },
+			.vdm_src_en	= { 0x0108, 12, 12, 0, 1 },
+			.vdp_src_en	= { 0x0108, 11, 11, 0, 1 },
+		},
+	},
+	{ /* sentinel */ }
+};
+
 static const struct rockchip_usb2phy_cfg rk3328_phy_cfgs[] = {
 	{
 		.reg = 0x100,
@@ -1129,7 +1253,7 @@ static const struct udevice_id rockchip_usb2phy_ids[] = {
 	{ .compatible = "rockchip,rk1808-usb2phy", .data = (ulong)&rk1808_phy_cfgs },
 	{ .compatible = "rockchip,rk3128-usb2phy", .data = (ulong)&rk312x_phy_cfgs },
 	{ .compatible = "rockchip,rk322x-usb2phy", .data = (ulong)&rk322x_phy_cfgs },
-	{ .compatible = "rockchip,rk3308-usb2phy", .data = (ulong)&rk3328_phy_cfgs },
+	{ .compatible = "rockchip,rk3308-usb2phy", .data = (ulong)&rk3308_phy_cfgs },
 	{ .compatible = "rockchip,rk3328-usb2phy", .data = (ulong)&rk3328_phy_cfgs },
 	{ .compatible = "rockchip,rk3368-usb2phy", .data = (ulong)&rk3368_phy_cfgs },
 	{ .compatible = "rockchip,rk3399-usb2phy", .data = (ulong)&rk3399_phy_cfgs },

commit 018c4fd14060e64dd172e7feed4d8810e176a6ab
Author: Yi Liu <liuyi@rock-chips.com>
Date:   Mon Sep 6 14:40:31 2021 +0800

    tools: mkimage: delete spl_hdr from idblock on 356X
    
    the cause is the ddr code was affected by spl_hdr on 356x
    
    Signed-off-by: Yi Liu <liuyi@rock-chips.com>
    Change-Id: Icd57b7d57e02338d969814fa0f073031ba60035f

diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index 738e365d74..fe5adeecf2 100644
--- a/tools/rkcommon.c
+++ b/tools/rkcommon.c
@@ -258,7 +258,6 @@ const char *rkcommon_get_spl_hdr(struct image_tool_params *params)
 	return info->spl_hdr;
 }
 
-
 int rkcommon_get_spl_size(struct image_tool_params *params)
 {
 	struct spl_info *info = rkcommon_get_spl_info(params->imagename);
@@ -298,7 +297,6 @@ static void do_sha256_hash(uint8_t *buf, uint32_t size, uint8_t *out)
 	sha256_finish(&ctx, out);
 }
 
-
 static void rkcommon_set_header0(void *buf, struct image_tool_params *params)
 {
 	struct header0_info *hdr = buf;
@@ -335,6 +333,7 @@ static void rkcommon_set_header0_v2(void *buf, struct image_tool_params *params)
 	uint8_t *image_ptr = NULL;
 	int i;
 
+	printf("Image Type:   Rockchip %s boot image\n", rkcommon_get_spl_hdr(params));
 	memset(buf, '\0', RK_INIT_OFFSET * RK_BLK_SIZE);
 	hdr->magic   = cpu_to_le32(RK_MAGIC_V2);
 	hdr->size_and_nimage = cpu_to_le32((2 << 16) + 384);
@@ -362,11 +361,6 @@ void rkcommon_set_header(void *buf,  struct stat *sbuf,  int ifd,
 	struct header1_info *hdr = buf + RK_SPL_HDR_START;
 
 	if (rkcommon_is_header_v2(params)) {
-		/* Set up the SPL name (i.e. copy spl_hdr over) */
-		memcpy(&hdr->magic, rkcommon_get_spl_hdr(params), RK_SPL_HDR_SIZE);
-		/* because of doing hash in the set_header0_v2
-		*  magic need to be changed first
-		*/
 		rkcommon_set_header0_v2(buf, params);
 	} else {
 		rkcommon_set_header0(buf, params);
@@ -388,7 +382,7 @@ void rkcommon_set_header(void *buf,  struct stat *sbuf,  int ifd,
 	}
 }
 
-static inline unsigned rkcommon_offset_to_spi(unsigned offset)
+static inline unsigned int rkcommon_offset_to_spi(unsigned int offset)
 {
 	/*
 	 * While SD/MMC images use a flat addressing, SPI images are padded
@@ -400,7 +394,7 @@ static inline unsigned rkcommon_offset_to_spi(unsigned offset)
 static int rkcommon_parse_header(const void *buf, struct header0_info *header0,
 				 struct spl_info **spl_info)
 {
-	unsigned hdr1_offset;
+	unsigned int hdr1_offset;
 	struct header1_info *hdr1_sdmmc, *hdr1_spi;
 	int i;
 
@@ -441,41 +435,14 @@ static int rkcommon_parse_header(const void *buf, struct header0_info *header0,
 	return -1;
 }
 
-static int rkcommon_parse_header_v2(const void *buf,
-				 struct header0_info_v2 *header, struct spl_info **spl_info)
+static int rkcommon_parse_header_v2(const void *buf, struct header0_info_v2 *header)
 {
-	unsigned int hdr1_offset;
-	struct header1_info *hdr1_sdmmc, *hdr1_spi;
-	int i;
-
-	if (spl_info)
-		*spl_info = NULL;
-
 	memcpy((void *)header, buf, sizeof(struct header0_info_v2));
 
 	if (le32_to_cpu(header->magic) != RK_MAGIC_V2)
 		return -EPROTO;
 
-	hdr1_offset = ((le32_to_cpu(header->images[0].size_and_off)) & 0xFFFF) * RK_BLK_SIZE;
-	hdr1_sdmmc = (struct header1_info *)(buf + hdr1_offset);
-	hdr1_spi = (struct header1_info *)(buf +
-					   rkcommon_offset_to_spi(hdr1_offset));
-
-	for (i = 0; i < ARRAY_SIZE(spl_infos); i++) {
-		if (!memcmp(&hdr1_sdmmc->magic, spl_infos[i].spl_hdr,
-			    RK_SPL_HDR_SIZE)) {
-			if (spl_info)
-				*spl_info = &spl_infos[i];
-			return IH_TYPE_RKSD;
-		} else if (!memcmp(&hdr1_spi->magic, spl_infos[i].spl_hdr,
-				   RK_SPL_HDR_SIZE)) {
-			if (spl_info)
-				*spl_info = &spl_infos[i];
-			return IH_TYPE_RKSPI;
-		}
-	}
-
-	return -1;
+	return 0;
 }
 
 int rkcommon_verify_header(unsigned char *buf, int size,
@@ -518,14 +485,13 @@ void rkcommon_print_header(const void *buf)
 	int ret, boot_size, init_size;
 
 	if ((*(uint32_t *)buf) == RK_MAGIC_V2) {
-		ret = rkcommon_parse_header_v2(buf, &header0_v2, &spl_info);
+		ret = rkcommon_parse_header_v2(buf, &header0_v2);
 
 		if (ret < 0) {
 			fprintf(stderr, "Error: image verification failed\n");
 			return;
 		}
 
-		image_type = ret;
 		init_size = header0_v2.images[0].size_and_off >> 16;
 		init_size = init_size * RK_BLK_SIZE;
 		boot_size = header0_v2.images[1].size_and_off >> 16;
@@ -545,10 +511,11 @@ void rkcommon_print_header(const void *buf)
 		image_type = ret;
 		init_size = header0.init_size * RK_BLK_SIZE;
 		boot_size = header0.init_boot_size * RK_BLK_SIZE - init_size;
-	}
-	printf("Image Type:   Rockchip %s (%s) boot image\n",
+		printf("Image Type:   Rockchip %s (%s) boot image\n",
 		       spl_info->spl_hdr,
 		       (image_type == IH_TYPE_RKSD) ? "SD/MMC" : "SPI");
+	}
+
 	printf("Init Data Size: %d bytes\n", init_size);
 
 	if (boot_size != RK_MAX_BOOT_SIZE)

commit 4e7cb295fbc2fad8db9d06a903100777e614dc53
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Nov 5 10:24:58 2021 +0000

    lib: bootm-fdt: fix compile error when not set CONFIG_ARCH_FIXUP_FDT_MEMORY
    
    Showing memory banks is helpful.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I07aa5ae727d52b22e6034c1935f133d3b9fd9b71

diff --git a/arch/arm/lib/bootm-fdt.c b/arch/arm/lib/bootm-fdt.c
index e9b66acc3a..af4797445f 100644
--- a/arch/arm/lib/bootm-fdt.c
+++ b/arch/arm/lib/bootm-fdt.c
@@ -60,9 +60,10 @@ int arch_fixup_fdt(void *blob)
 		size[bank] = bd->bi_dram[bank].size;
 		if (size[bank] == 0)
 			continue;
+#ifdef CONFIG_ARCH_FIXUP_FDT_MEMORY
 		printf("Adding bank: 0x%08llx - 0x%08llx (size: 0x%08llx)\n",
 		       start[bank], start[bank] + size[bank], size[bank]);
-
+#endif
 #ifdef CONFIG_ARMV7_NONSEC
 		ret = armv7_apply_memory_carveout(&start[bank], &size[bank]);
 		if (ret)
diff --git a/common/fdt_support.c b/common/fdt_support.c
index 3298fe10ee..fa3d3e7af2 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -461,7 +461,6 @@ void do_fixup_by_compat_u32(void *fdt, const char *compat,
 	do_fixup_by_compat(fdt, compat, prop, &tmp, 4, create);
 }
 
-#ifdef CONFIG_ARCH_FIXUP_FDT_MEMORY
 /*
  * fdt_pack_reg - pack address and size array into the "reg"-suitable stream
  */
@@ -534,6 +533,8 @@ int fdt_record_loadable(void *blob, u32 index, const char *name,
 #else
 #define MEMORY_BANKS_MAX 4
 #endif
+
+#ifdef CONFIG_ARCH_FIXUP_FDT_MEMORY
 int fdt_fixup_memory_banks(void *blob, u64 start[], u64 size[], int banks)
 {
 	int err, nodeoffset;
@@ -556,7 +557,7 @@ int fdt_fixup_memory_banks(void *blob, u64 start[], u64 size[], int banks)
 	/* find or create "/memory" node. */
 	nodeoffset = fdt_find_or_add_subnode(blob, 0, "memory");
 	if (nodeoffset < 0)
-			return nodeoffset;
+		return nodeoffset;
 
 	err = fdt_setprop(blob, nodeoffset, "device_type", "memory",
 			sizeof("memory"));
@@ -579,6 +580,30 @@ int fdt_fixup_memory_banks(void *blob, u64 start[], u64 size[], int banks)
 	}
 	return 0;
 }
+#else
+int fdt_fixup_memory_banks(void *blob, u64 start[], u64 size[], int banks)
+{
+	struct fdt_resource res;
+	int i, nodeoffset;
+
+	/* show memory */
+	nodeoffset = fdt_subnode_offset(blob, 0, "memory");
+	if (nodeoffset > 0) {
+		for (i = 0; i < MEMORY_BANKS_MAX; i++) {
+			if (fdt_get_resource(blob, nodeoffset, "reg", i, &res))
+				break;
+			res.end += 1;
+			if (!res.start && !res.end)
+				break;
+			printf("fixed bank: 0x%08llx - 0x%08llx (size: 0x%08llx)\n",
+			       (u64)res.start, (u64)res.end, (u64)res.end - (u64)res.start);
+		}
+	}
+
+	return 0;
+}
+
+#endif
 
 int fdt_fixup_memory(void *blob, u64 start, u64 size)
 {
@@ -607,7 +632,6 @@ int fdt_update_reserved_memory(void *blob, char *name, u64 start, u64 size)
 
 	return nodeoffset;
 }
-#endif
 
 void fdt_fixup_ethernet(void *fdt)
 {
diff --git a/include/fdt_support.h b/include/fdt_support.h
index c3347a0c26..0f4ceda2a3 100644
--- a/include/fdt_support.h
+++ b/include/fdt_support.h
@@ -112,15 +112,7 @@ int fdt_fixup_memory(void *blob, u64 start, u64 size);
  *			property will be left untouched.
  * @return 0 if ok, or -1 or -FDT_ERR_... on error
  */
-#ifdef CONFIG_ARCH_FIXUP_FDT_MEMORY
 int fdt_fixup_memory_banks(void *blob, u64 start[], u64 size[], int banks);
-#else
-static inline int fdt_fixup_memory_banks(void *blob, u64 start[], u64 size[],
-					 int banks)
-{
-	return 0;
-}
-#endif
 
 int fdt_update_reserved_memory(void *blob, char *name, u64 start, u64 size);
 

commit 1e1a2c06fb13cd5d9efe6194d11663d52ec7da6d
Author: Sugar Zhang <sugar.zhang@rock-chips.com>
Date:   Mon Oct 25 14:33:13 2021 +0800

    power: rockchip-io-domain: rv1126: Add retention for domain switch
    
    This patch adds retention to flatten the potential current peak
    caused by domain switch.
    
    e.g. vccio1 io-domain switch:
    
    hold vccio1 retention
      set vccio1 domain value
        release vccio1 retention
    
    Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
    Change-Id: I5018bafce8f910724d103fe01e55283fb642127d

diff --git a/drivers/power/io-domain/rockchip-io-domain.c b/drivers/power/io-domain/rockchip-io-domain.c
index 349d2710c0..200fa63b06 100644
--- a/drivers/power/io-domain/rockchip-io-domain.c
+++ b/drivers/power/io-domain/rockchip-io-domain.c
@@ -62,6 +62,8 @@
 #define RK3568_PMU_GRF_IO_VSEL1		(0x0144)
 #define RK3568_PMU_GRF_IO_VSEL2		(0x0148)
 
+#define RV1126_PMU_GRF_IO_RETENTION	(0x0144)
+
 struct rockchip_iodomain_priv;
 
 /**
@@ -143,6 +145,32 @@ static int rk3568_pmu_iodomain_write(struct rockchip_iodomain_supply *supply,
 	return 0;
 }
 
+static int rv1126_iodomain_write(struct rockchip_iodomain_supply *supply,
+				 int uV)
+{
+	struct rockchip_iodomain_priv *priv = supply->iod;
+	struct regmap *regmap = priv->regmap_base;
+	u32 val, vret_hold, vret_release;
+
+	/* set value bit */
+	val = (uV > MAX_VOLTAGE_1_8) ? 0 : 1;
+	val <<= supply->idx;
+	/* apply hiword-mask */
+	val |= (BIT(supply->idx) << 16);
+
+	vret_hold = (BIT(supply->idx) << 16);
+	vret_release = (BIT(supply->idx) << 16) | BIT(supply->idx);
+
+	printf("%s: %d uv, vsel: 0x%x\n",
+	       priv->sdata->supply_names[supply->idx], uV, val);
+
+	regmap_write(regmap, RV1126_PMU_GRF_IO_RETENTION, vret_hold);
+	regmap_write(regmap, priv->sdata->grf_offset, val);
+	regmap_write(regmap, RV1126_PMU_GRF_IO_RETENTION, vret_release);
+
+	return 0;
+}
+
 static int rockchip_iodomain_write(struct rockchip_iodomain_supply *supply,
 				   int uV)
 {
@@ -584,6 +612,8 @@ static int rockchip_iodomain_probe(struct udevice *dev)
 	priv->sdata = sdata;
 	if (sdata == &soc_data_rk3568_pmu)
 		priv->write = rk3568_pmu_iodomain_write;
+	else if (sdata == &soc_data_rv1126_pmu)
+		priv->write = rv1126_iodomain_write;
 	else
 		priv->write = rockchip_iodomain_write;
 

commit 907bb86f6e82b7d407b3934a8ed99c4d724ad6af
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Nov 5 17:27:15 2021 +0800

    mtd: spi-nor-ids: support mx25l12805d quad line
    
    Change-Id: I554e65b0dad818c4ccd017712d2067d82ece73a7
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 8dfa87cf26..0679f8e68a 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -170,7 +170,7 @@ const struct flash_info spi_nor_ids[] = {
 	{ INFO("mx25u1635e",  0xc22535, 0, 64 * 1024,  32, SECT_4K) },
 	{ INFO("mx25u3235f",  0xc22536, 0, 4 * 1024,  1024, SECT_4K) },
 	{ INFO("mx25u6435f",  0xc22537, 0, 64 * 1024, 128, SECT_4K) },
-	{ INFO("mx25l12805d", 0xc22018, 0, 64 * 1024, 256, SECT_4K) },
+	{ INFO("mx25l12805d", 0xc22018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 	{ INFO("mx25u12835f", 0xc22538, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 	{ INFO("mx25l12855e", 0xc22618, 0, 64 * 1024, 256, 0) },
 	{ INFO("mx25l25635e", 0xc22019, 0, 64 * 1024, 512, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },

commit 9361c683927ff9f23a8a923a60625920c49fe656
Author: shengfei Xu <xsf@rock-chips.com>
Date:   Mon Nov 1 11:52:38 2021 +0000

    power: pmic: add rk806 support
    
    Signed-off-by: shengfei Xu <xsf@rock-chips.com>
    Change-Id: Ifef0d0571a0a8c423abffa2ff0444360f278a20e

diff --git a/drivers/power/pmic/Kconfig b/drivers/power/pmic/Kconfig
index f1a46f3ae2..166f60691f 100644
--- a/drivers/power/pmic/Kconfig
+++ b/drivers/power/pmic/Kconfig
@@ -121,6 +121,14 @@ config PMIC_RK8XX
 	accessed via an I2C interface. The device is used with Rockchip SoCs.
 	This driver implements register read/write operations.
 
+config PMIC_SPI_RK8XX
+	bool "Enable support for Rockchip PMIC SPI RK8XX"
+	depends on DM_PMIC
+	---help---
+	The Rockchip RK8xx PMIC provides four buck DC-DC convertors, LDOs. It is
+	accessed via an SPI interface. The device is used with Rockchip SoCs.
+	This driver implements register read/write operations.
+
 config PMIC_S2MPS11
 	bool "Enable Driver Model for PMIC Samsung S2MPS11"
 	depends on DM_PMIC
diff --git a/drivers/power/pmic/Makefile b/drivers/power/pmic/Makefile
index f7bdfa5609..e95c595541 100644
--- a/drivers/power/pmic/Makefile
+++ b/drivers/power/pmic/Makefile
@@ -16,6 +16,7 @@ obj-$(CONFIG_PMIC_AS3722) += as3722.o as3722_gpio.o
 obj-$(CONFIG_PMIC_MAX8997) += max8997.o
 obj-$(CONFIG_PMIC_PM8916) += pm8916.o
 obj-$(CONFIG_PMIC_RK8XX) += rk8xx.o
+obj-$(CONFIG_PMIC_SPI_RK8XX) += rk8xx_spi.o
 obj-$(CONFIG_PMIC_RN5T567) += rn5t567.o
 obj-$(CONFIG_PMIC_TPS65090) += tps65090.o
 obj-$(CONFIG_PMIC_S5M8767) += s5m8767.o
diff --git a/drivers/power/pmic/rk8xx_spi.c b/drivers/power/pmic/rk8xx_spi.c
new file mode 100644
index 0000000000..5ef07b28db
--- /dev/null
+++ b/drivers/power/pmic/rk8xx_spi.c
@@ -0,0 +1,192 @@
+/*
+ **Copyright (C) 2021 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <irq-generic.h>
+#include <power/rk8xx_pmic.h>
+#include <power/pmic.h>
+#include <spi.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define RK806_CHIP_NAME			0x5A
+#define RK806_CHIP_VER			0x5B
+
+#define RK806_CMD_READ			0
+#define RK806_CMD_WRITE			BIT(7)
+#define RK806_CMD_CRC_EN		BIT(6)
+#define RK806_CMD_CRC_DIS		0
+#define RK806_CMD_LEN_MSK		0x0f
+#define RK806_REG_H			0x00
+
+static const struct pmic_child_info pmic_children_info[] = {
+	{ .prefix = "DCDC", .driver = "rk8xx_spi_buck"},
+	{ .prefix = "NLDO", .driver = "rk8xx_spi_ldo"},
+	{ .prefix = "PLDO", .driver = "rk8xx_spi_pldo"},
+	{ },
+};
+
+static int _spi_read(struct udevice *dev, u32 reg, u8 *buffer, int len)
+{
+	struct rk8xx_priv *priv = dev_get_priv(dev);
+	u8 txbuf[3];
+	int ret;
+
+	if (spi_claim_bus(priv->slave))
+		return -EBUSY;
+
+	txbuf[0] = RK806_CMD_READ;
+	txbuf[1] = reg;
+	txbuf[2] = RK806_REG_H;
+
+	ret = spi_write_then_read(priv->slave, txbuf, 3, NULL, buffer, 1);
+	spi_release_bus(priv->slave);
+
+	return ret;
+}
+
+static int _spi_write(struct udevice *dev, uint reg, const u8 *buffer, int len)
+{
+	struct rk8xx_priv *priv = dev_get_priv(dev);
+	u8 txbuf[4];
+	int ret;
+
+	if (len < 1) {
+		dev_err(dev, "rk806 write error: len < 1\n");
+		return -EINVAL;
+	}
+
+	if (spi_claim_bus(priv->slave))
+		return -EBUSY;
+
+	txbuf[0] = RK806_CMD_WRITE;
+	txbuf[1] = reg;
+	txbuf[2] = RK806_REG_H;
+	txbuf[3] = *buffer;
+
+	ret = spi_write_then_read(priv->slave, txbuf, 4, NULL, NULL, 0);
+	spi_release_bus(priv->slave);
+
+	return ret;
+}
+
+static int rk806_spi_read(struct udevice *dev,
+			  uint reg,
+			  u8 *buffer,
+			  int len)
+{
+	int ret;
+
+	ret = _spi_read(dev, reg, buffer, len);
+	if (ret)
+		dev_err(dev, "rk806 read reg(0x%x) error: %d\n", reg, ret);
+
+	return ret;
+}
+
+static int rk806_spi_write(struct udevice *dev,
+			   uint reg,
+			   const u8 *buffer,
+			   int len)
+{
+	int ret;
+
+	ret = _spi_write(dev, reg, buffer, len);
+	if (ret)
+		dev_err(dev, "rk806 write reg(0x%x) error: %d\n", reg, ret);
+
+	return ret;
+}
+
+static int rk8xx_spi_reg_count(struct udevice *dev)
+{
+	return 0xff;
+}
+
+#if CONFIG_IS_ENABLED(PMIC_CHILDREN)
+static int rk8xx_spi_bind(struct udevice *dev)
+{
+	ofnode regulators_node;
+	int children;
+
+	regulators_node = dev_read_subnode(dev, "regulators");
+	if (!ofnode_valid(regulators_node)) {
+		debug("%s: %s regulators subnode not found!\n", __func__,
+		      dev->name);
+		return -ENXIO;
+	}
+
+	children = pmic_bind_children(dev, regulators_node, pmic_children_info);
+	if (!children)
+		debug("%s: %s - no child found\n", __func__, dev->name);
+
+	return 0;
+}
+#endif
+
+static int rk8xx_spi_probe(struct udevice *dev)
+{
+	struct dm_spi_slave_platdata *plat = dev_get_parent_platdata(dev);
+	struct rk8xx_priv *priv = dev_get_priv(dev);
+	struct udevice *spi = dev_get_parent(dev);
+	struct spi_slave *slave = NULL;
+	u8 msb, lsb;
+	int ret;
+
+	if (spi->seq < 0) {
+		dev_err(dev, "Failed to configure the spi num\n");
+		return -EINVAL;
+	}
+
+	slave = spi_setup_slave(spi->seq, plat->cs, plat->max_hz,
+				plat->mode);
+	if (!slave)
+		return -ENODEV;
+	priv->slave = slave;
+
+	/* read Chip variant */
+	ret = rk806_spi_read(dev, RK806_CHIP_NAME, &msb, 1);
+	if (msb < 0) {
+		dev_err(dev, "rk806 name read error: %d\n", ret);
+		return ret;
+	}
+
+	ret = rk806_spi_read(dev, RK806_CHIP_VER, &lsb, 1);
+	if (lsb < 0) {
+		dev_err(dev, "rk806 version read error: %d\n", ret);
+		return ret;
+	}
+
+	priv->variant = ((msb << 8) | lsb) & RK8XX_ID_MSK;
+	printf("spi%d: RK%x%x: %d\n", spi->seq, msb, (lsb >> 4), lsb & 0x0f);
+
+	return 0;
+}
+
+static struct dm_pmic_ops rk8xx_spi_ops = {
+	.reg_count = rk8xx_spi_reg_count,
+	.read = rk806_spi_read,
+	.write = rk806_spi_write,
+};
+
+static const struct udevice_id rk8xx_spi_ids[] = {
+	{ .compatible = "rockchip,rk806" },
+	{ }
+};
+
+U_BOOT_DRIVER(pmic_rk8xx_spi) = {
+	.name = "rk806-pmic",
+	.id = UCLASS_PMIC,
+	.of_match = rk8xx_spi_ids,
+#if CONFIG_IS_ENABLED(PMIC_CHILDREN)
+	.bind = rk8xx_spi_bind,
+#endif
+	.priv_auto_alloc_size = sizeof(struct rk8xx_priv),
+	.probe = rk8xx_spi_probe,
+	.ops = &rk8xx_spi_ops,
+};
diff --git a/drivers/power/regulator/Kconfig b/drivers/power/regulator/Kconfig
index 2eeccdab50..37a75ccbcd 100644
--- a/drivers/power/regulator/Kconfig
+++ b/drivers/power/regulator/Kconfig
@@ -117,6 +117,15 @@ config REGULATOR_RK8XX
 	by the PMIC device. This driver is controlled by a device tree node
 	which includes voltage limits.
 
+config REGULATOR_RK806
+        bool "Enable driver for RK8XX regulators"
+        depends on DM_REGULATOR && PMIC_SPI_RK8XX
+        ---help---
+        Enable support for the regulator functions of the RK806 PMIC. The
+        driver implements get/set api for the various BUCKS and LDOs supported
+        by the PMIC device. This driver is controlled by a device tree node
+        which includes voltage limits
+
 config REGULATOR_S5M8767
 	bool "Enable support for S5M8767 regulator"
 	depends on DM_REGULATOR && PMIC_S5M8767
diff --git a/drivers/power/regulator/Makefile b/drivers/power/regulator/Makefile
index 1dbd8d253c..73671aa8bd 100644
--- a/drivers/power/regulator/Makefile
+++ b/drivers/power/regulator/Makefile
@@ -16,6 +16,7 @@ obj-$(CONFIG_$(SPL_)DM_REGULATOR_FIXED) += fixed.o
 obj-$(CONFIG_$(SPL_)DM_REGULATOR_GPIO) += gpio-regulator.o
 obj-$(CONFIG_REGULATOR_RK860X) += rk860x_regulator.o
 obj-$(CONFIG_REGULATOR_RK8XX) += rk8xx.o
+obj-$(CONFIG_REGULATOR_RK806) += rk806.o
 obj-$(CONFIG_REGULATOR_S5M8767) += s5m8767.o
 obj-$(CONFIG_DM_REGULATOR_SANDBOX) += sandbox.o
 obj-$(CONFIG_REGULATOR_TPS65090) += tps65090_regulator.o
diff --git a/drivers/power/regulator/rk806.c b/drivers/power/regulator/rk806.c
new file mode 100644
index 0000000000..a0d2d8ab7c
--- /dev/null
+++ b/drivers/power/regulator/rk806.c
@@ -0,0 +1,837 @@
+/*
+ * Copyright (C) 2021 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <power/rk8xx_pmic.h>
+#include <power/pmic.h>
+#include <power/regulator.h>
+
+#ifndef CONFIG_SPL_BUILD
+#define ENABLE_DRIVER
+#endif
+
+/* Not used or exisit register and configure */
+#define NA			-1
+
+/* rk806 buck*/
+#define RK806_BUCK_ON_VSEL(n)		(0x1a + n - 1)
+#define RK806_BUCK_SLP_VSEL(n)		(0x24 + n - 1)
+#define RK806_BUCK_CONFIG(n)		(0x10 + n - 1)
+#define RK806_BUCK_VSEL_MASK		0xff
+
+/* RK806 LDO */
+#define RK806_NLDO_ON_VSEL(n)		(0x43 + n - 1)
+#define RK806_NLDO_SLP_VSEL(n)		(0x48 + n - 1)
+#define RK806_NLDO_VSEL_MASK		0xff
+#define RK806_PLDO_ON_VSEL(n)		(0x4e + n - 1)
+#define RK806_PLDO_SLP_VSEL(n)		(0x54 + n - 1)
+#define RK806_PLDO_VSEL_MASK		0xff
+
+/* RK806 ENABLE */
+#define RK806_POWER_EN(n)		(0x00 + n)
+#define RK806_NLDO_EN(n)		(0x03 + n)
+#define RK806_PLDO_EN(n)		(0x04 + n)
+#define RK806_RAMP_RATE_MASK1		0xc0
+#define RK806_RAMP_RATE_REG1(n)		(0x10 + n)
+#define RK806_RAMP_RATE_REG1_8		0xeb
+#define RK806_RAMP_RATE_REG9_10		0xea
+
+#define RK806_RAMP_RATE_4LSB_PER_1CLK	0x00/* LDO 100mV/uS buck 50mV/us */
+#define RK806_RAMP_RATE_2LSB_PER_1CLK	0x01/* LDO 50mV/uS buck 25mV/us */
+#define RK806_RAMP_RATE_1LSB_PER_1CLK	0x02/* LDO 25mV/uS buck 12.5mV/us */
+#define RK806_RAMP_RATE_1LSB_PER_2CLK	0x03/* LDO 12.5mV/uS buck 6.25mV/us */
+
+#define RK806_RAMP_RATE_1LSB_PER_4CLK	0x04/* LDO 6.28/2mV/uS buck 3.125mV/us */
+#define RK806_RAMP_RATE_1LSB_PER_8CLK	0x05/* LDO 3.12mV/uS buck 1.56mV/us */
+#define RK806_RAMP_RATE_1LSB_PER_13CLK	0x06/* LDO 1.9mV/uS buck 961mV/us */
+#define RK806_RAMP_RATE_1LSB_PER_32CLK	0x07/* LDO 0.78mV/uS buck 0.39mV/us */
+
+struct rk8xx_reg_info {
+	uint min_uv;
+	uint step_uv;
+	u8 vsel_reg;
+	u8 vsel_sleep_reg;
+	u8 config_reg;
+	u8 vsel_mask;
+	u8 min_sel;
+	/* only for buck now */
+	u8 max_sel;
+	u8 range_num;
+};
+
+static const struct rk8xx_reg_info rk806_buck[] = {
+	/* buck 1 */
+	{  500000,   6250, RK806_BUCK_ON_VSEL(1), RK806_BUCK_SLP_VSEL(1), RK806_BUCK_CONFIG(1), RK806_BUCK_VSEL_MASK, 0x00, 0xa0, 3},
+	{  1500000, 25000, RK806_BUCK_ON_VSEL(1), RK806_BUCK_SLP_VSEL(1), RK806_BUCK_CONFIG(1), RK806_BUCK_VSEL_MASK, 0xa1, 0xed, 3},
+	{  3400000,     0, RK806_BUCK_ON_VSEL(1), RK806_BUCK_SLP_VSEL(1), RK806_BUCK_CONFIG(1), RK806_BUCK_VSEL_MASK, 0xee, 0xff, 3},
+	/* buck 2 */
+	{  500000,   6250, RK806_BUCK_ON_VSEL(2), RK806_BUCK_SLP_VSEL(2), RK806_BUCK_CONFIG(2), RK806_BUCK_VSEL_MASK, 0x00, 0xa0, 3},
+	{  1500000, 25000, RK806_BUCK_ON_VSEL(2), RK806_BUCK_SLP_VSEL(2), RK806_BUCK_CONFIG(2), RK806_BUCK_VSEL_MASK, 0xa1, 0xed, 3},
+	{  3400000,     0, RK806_BUCK_ON_VSEL(2), RK806_BUCK_SLP_VSEL(2), RK806_BUCK_CONFIG(2), RK806_BUCK_VSEL_MASK, 0xee, 0xff, 3},
+	/* buck 3 */
+	{  500000,   6250, RK806_BUCK_ON_VSEL(3), RK806_BUCK_SLP_VSEL(3), RK806_BUCK_CONFIG(3), RK806_BUCK_VSEL_MASK, 0x00, 0xa0, 3},
+	{  1500000, 25000, RK806_BUCK_ON_VSEL(3), RK806_BUCK_SLP_VSEL(3), RK806_BUCK_CONFIG(3), RK806_BUCK_VSEL_MASK, 0xa1, 0xed, 3},
+	{  3400000,     0, RK806_BUCK_ON_VSEL(3), RK806_BUCK_SLP_VSEL(3), RK806_BUCK_CONFIG(3), RK806_BUCK_VSEL_MASK, 0xee, 0xff, 3},
+	/* buck 4 */
+	{  500000,   6250, RK806_BUCK_ON_VSEL(4), RK806_BUCK_SLP_VSEL(4), RK806_BUCK_CONFIG(4), RK806_BUCK_VSEL_MASK, 0x00, 0xa0, 3},
+	{  1500000, 25000, RK806_BUCK_ON_VSEL(4), RK806_BUCK_SLP_VSEL(4), RK806_BUCK_CONFIG(4), RK806_BUCK_VSEL_MASK, 0xa1, 0xed, 3},
+	{  3400000,     0, RK806_BUCK_ON_VSEL(4), RK806_BUCK_SLP_VSEL(4), RK806_BUCK_CONFIG(4), RK806_BUCK_VSEL_MASK, 0xee, 0xff, 3},
+	/* buck 5 */
+	{  500000,   6250, RK806_BUCK_ON_VSEL(5), RK806_BUCK_SLP_VSEL(5), RK806_BUCK_CONFIG(5), RK806_BUCK_VSEL_MASK, 0x00, 0xa0, 3},
+	{  1500000, 25000, RK806_BUCK_ON_VSEL(5), RK806_BUCK_SLP_VSEL(5), RK806_BUCK_CONFIG(5), RK806_BUCK_VSEL_MASK, 0xa1, 0xed, 3},
+	{  3400000,     0, RK806_BUCK_ON_VSEL(5), RK806_BUCK_SLP_VSEL(5), RK806_BUCK_CONFIG(5), RK806_BUCK_VSEL_MASK, 0xee, 0xff, 3},
+	/* buck 6 */
+	{  500000,   6250, RK806_BUCK_ON_VSEL(6), RK806_BUCK_SLP_VSEL(6), RK806_BUCK_CONFIG(6), RK806_BUCK_VSEL_MASK, 0x00, 0xa0, 3},
+	{  1500000, 25000, RK806_BUCK_ON_VSEL(6), RK806_BUCK_SLP_VSEL(6), RK806_BUCK_CONFIG(6), RK806_BUCK_VSEL_MASK, 0xa1, 0xed, 3},
+	{  3400000,     0, RK806_BUCK_ON_VSEL(6), RK806_BUCK_SLP_VSEL(6), RK806_BUCK_CONFIG(6), RK806_BUCK_VSEL_MASK, 0xee, 0xff, 3},
+	/* buck 7 */
+	{  500000,   6250, RK806_BUCK_ON_VSEL(7), RK806_BUCK_SLP_VSEL(7), RK806_BUCK_CONFIG(7), RK806_BUCK_VSEL_MASK, 0x00, 0xa0, 3},
+	{  1500000, 25000, RK806_BUCK_ON_VSEL(7), RK806_BUCK_SLP_VSEL(7), RK806_BUCK_CONFIG(7), RK806_BUCK_VSEL_MASK, 0xa1, 0xed, 3},
+	{  3400000,     0, RK806_BUCK_ON_VSEL(7), RK806_BUCK_SLP_VSEL(7), RK806_BUCK_CONFIG(7), RK806_BUCK_VSEL_MASK, 0xee, 0xff, 3},
+	/* buck 8 */
+	{  500000,   6250, RK806_BUCK_ON_VSEL(8), RK806_BUCK_SLP_VSEL(8), RK806_BUCK_CONFIG(8), RK806_BUCK_VSEL_MASK, 0x00, 0xa0, 3},
+	{  1500000, 25000, RK806_BUCK_ON_VSEL(8), RK806_BUCK_SLP_VSEL(8), RK806_BUCK_CONFIG(8), RK806_BUCK_VSEL_MASK, 0xa1, 0xed, 3},
+	{  3400000,     0, RK806_BUCK_ON_VSEL(8), RK806_BUCK_SLP_VSEL(8), RK806_BUCK_CONFIG(8), RK806_BUCK_VSEL_MASK, 0xee, 0xff, 3},
+	/* buck 9 */
+	{  500000,   6250, RK806_BUCK_ON_VSEL(9), RK806_BUCK_SLP_VSEL(9), RK806_BUCK_CONFIG(9), RK806_BUCK_VSEL_MASK, 0x00, 0xa0, 3},
+	{  1500000, 25000, RK806_BUCK_ON_VSEL(9), RK806_BUCK_SLP_VSEL(9), RK806_BUCK_CONFIG(9), RK806_BUCK_VSEL_MASK, 0xa1, 0xed, 3},
+	{  3400000,     0, RK806_BUCK_ON_VSEL(9), RK806_BUCK_SLP_VSEL(9), RK806_BUCK_CONFIG(9), RK806_BUCK_VSEL_MASK, 0xee, 0xff, 3},
+	/* buck 10 */
+	{  500000,   6250, RK806_BUCK_ON_VSEL(10), RK806_BUCK_SLP_VSEL(10), RK806_BUCK_CONFIG(10), RK806_BUCK_VSEL_MASK, 0x00, 0xa0, 3},
+	{  1500000, 25000, RK806_BUCK_ON_VSEL(10), RK806_BUCK_SLP_VSEL(10), RK806_BUCK_CONFIG(10), RK806_BUCK_VSEL_MASK, 0xa1, 0xed, 3},
+	{  3400000,     0, RK806_BUCK_ON_VSEL(10), RK806_BUCK_SLP_VSEL(10), RK806_BUCK_CONFIG(10), RK806_BUCK_VSEL_MASK, 0xee, 0xff, 3},
+};
+
+static const struct rk8xx_reg_info rk806_nldo[] = {
+	/* nldo1 */
+	{  500000, 12500, RK806_NLDO_ON_VSEL(1), RK806_NLDO_SLP_VSEL(1), NA, RK806_NLDO_VSEL_MASK, 0x00, },
+	{  3400000,    0, RK806_NLDO_ON_VSEL(1), RK806_NLDO_SLP_VSEL(1), NA, RK806_NLDO_VSEL_MASK, 0xE8, },
+	/* nldo2 */
+	{  500000, 12500, RK806_NLDO_ON_VSEL(2), RK806_NLDO_SLP_VSEL(2), NA, RK806_NLDO_VSEL_MASK, 0x00, },
+	{  3400000,    0, RK806_NLDO_ON_VSEL(2), RK806_NLDO_SLP_VSEL(2), NA, RK806_NLDO_VSEL_MASK, 0xE8, },
+	/* nldo3 */
+	{  500000, 12500, RK806_NLDO_ON_VSEL(3), RK806_NLDO_SLP_VSEL(3), NA, RK806_NLDO_VSEL_MASK, 0x00, },
+	{  3400000,    0, RK806_NLDO_ON_VSEL(3), RK806_NLDO_SLP_VSEL(3), NA, RK806_NLDO_VSEL_MASK, 0xE8, },
+	/* nldo4 */
+	{  500000, 12500, RK806_NLDO_ON_VSEL(4), RK806_NLDO_SLP_VSEL(4), NA, RK806_NLDO_VSEL_MASK, 0x00, },
+	{  3400000,    0, RK806_NLDO_ON_VSEL(4), RK806_NLDO_SLP_VSEL(4), NA, RK806_NLDO_VSEL_MASK, 0xE8, },
+	/* nldo5 */
+	{  500000, 12500, RK806_NLDO_ON_VSEL(5), RK806_NLDO_SLP_VSEL(5), NA, RK806_NLDO_VSEL_MASK, 0x00, },
+	{  3400000,    0, RK806_NLDO_ON_VSEL(5), RK806_NLDO_SLP_VSEL(5), NA, RK806_NLDO_VSEL_MASK, 0xE8, },
+};
+
+static const struct rk8xx_reg_info rk806_pldo[] = {
+	/* pldo1 */
+	{  500000, 12500, RK806_PLDO_ON_VSEL(1), RK806_PLDO_SLP_VSEL(1), NA, RK806_PLDO_VSEL_MASK, 0x00, },
+	{  3400000,    0, RK806_PLDO_ON_VSEL(1), RK806_PLDO_SLP_VSEL(1), NA, RK806_PLDO_VSEL_MASK, 0xE8, },
+	/* pldo2 */
+	{  500000, 12500, RK806_PLDO_ON_VSEL(2), RK806_PLDO_SLP_VSEL(2), NA, RK806_PLDO_VSEL_MASK, 0x00, },
+	{  3400000,    0, RK806_PLDO_ON_VSEL(2), RK806_PLDO_SLP_VSEL(2), NA, RK806_PLDO_VSEL_MASK, 0xE8, },
+	/* pldo3 */
+	{  500000, 12500, RK806_PLDO_ON_VSEL(3), RK806_PLDO_SLP_VSEL(3), NA, RK806_PLDO_VSEL_MASK, 0x00, },
+	{  3400000,    0, RK806_PLDO_ON_VSEL(3), RK806_PLDO_SLP_VSEL(3), NA, RK806_PLDO_VSEL_MASK, 0xE8, },
+	/* pldo4 */
+	{  500000, 12500, RK806_PLDO_ON_VSEL(4), RK806_PLDO_SLP_VSEL(4), NA, RK806_PLDO_VSEL_MASK, 0x00, },
+	{  3400000,    0, RK806_PLDO_ON_VSEL(4), RK806_PLDO_SLP_VSEL(4), NA, RK806_PLDO_VSEL_MASK, 0xE8, },
+	/* pldo5 */
+	{  500000, 12500, RK806_PLDO_ON_VSEL(5), RK806_PLDO_SLP_VSEL(5), NA, RK806_PLDO_VSEL_MASK, 0x00, },
+	{  3400000,    0, RK806_PLDO_ON_VSEL(5), RK806_PLDO_SLP_VSEL(5), NA, RK806_PLDO_VSEL_MASK, 0xE8, },
+	/* pldo6 */
+	{  500000, 12500, RK806_PLDO_ON_VSEL(6), RK806_PLDO_SLP_VSEL(6), NA, RK806_PLDO_VSEL_MASK, 0x00, },
+	{  3400000,    0, RK806_PLDO_ON_VSEL(6), RK806_PLDO_SLP_VSEL(6), NA, RK806_PLDO_VSEL_MASK, 0xE8, },
+};
+
+static const struct rk8xx_reg_info *get_buck_reg(struct udevice *pmic,
+						 int num, int uvolt)
+{
+	struct rk8xx_priv *priv = dev_get_priv(pmic);
+
+	switch (priv->variant) {
+	case RK806_ID:
+		switch (num) {
+		case 0 ... 9:
+			if (uvolt < 1500000)
+				return &rk806_buck[num * 3 + 0];
+			else if (uvolt < 3400000)
+				return &rk806_buck[num * 3 + 1];
+			else
+				return &rk806_buck[num * 3 + 2];
+			break;
+		}
+	default:
+		return &rk806_buck[num * 3 + 0];
+	}
+}
+
+static int _buck_set_value(struct udevice *pmic, int buck, int uvolt)
+{
+	const struct rk8xx_reg_info *info = get_buck_reg(pmic, buck, uvolt);
+	int mask = info->vsel_mask;
+	int val;
+
+	if (info->vsel_reg == NA)
+		return -EINVAL;
+
+	if (info->step_uv == 0)	/* Fixed voltage */
+		val = info->min_sel;
+	else
+		val = ((uvolt - info->min_uv) / info->step_uv) + info->min_sel;
+
+	debug("%s: volt=%d, buck=%d, reg=0x%x, mask=0x%x, val=0x%x\n",
+	      __func__, uvolt, buck + 1, info->vsel_reg, mask, val);
+
+	return pmic_clrsetbits(pmic, info->vsel_reg, mask, val);
+}
+
+static int _buck_set_enable(struct udevice *pmic, int buck, bool enable)
+{
+	struct rk8xx_priv *priv = dev_get_priv(pmic);
+	uint value, en_reg;
+	int ret;
+
+	switch (priv->variant) {
+	case RK806_ID:
+		en_reg = RK806_POWER_EN(buck / 4);
+		if (enable)
+			value = ((1 << buck % 4) | (1 << (buck % 4 + 4)));
+		else
+			value = ((0 << buck % 4) | (1 << (buck % 4 + 4)));
+
+		ret = pmic_reg_write(pmic, en_reg, value);
+		break;
+	default:
+		ret = -EINVAL;
+	}
+
+	return ret;
+}
+
+#ifdef ENABLE_DRIVER
+static int _buck_set_suspend_value(struct udevice *pmic, int buck, int uvolt)
+{
+	const struct rk8xx_reg_info *info = get_buck_reg(pmic, buck, uvolt);
+	int mask = info->vsel_mask;
+	int val;
+
+	if (info->vsel_sleep_reg == NA)
+		return -EINVAL;
+
+	if (info->step_uv == 0)
+		val = info->min_sel;
+	else
+		val = ((uvolt - info->min_uv) / info->step_uv) + info->min_sel;
+
+	debug("%s: volt=%d, buck=%d, reg=0x%x, mask=0x%x, val=0x%x\n",
+	      __func__, uvolt, buck + 1, info->vsel_sleep_reg, mask, val);
+
+	return pmic_clrsetbits(pmic, info->vsel_sleep_reg, mask, val);
+}
+
+static int _buck_get_enable(struct udevice *pmic, int buck)
+{
+	struct rk8xx_priv *priv = dev_get_priv(pmic);
+	uint mask = 0;
+	int ret = 0;
+
+	switch (priv->variant) {
+	case RK806_ID:
+		mask = 1 << buck % 4;
+		ret = pmic_reg_read(pmic, RK806_POWER_EN(buck / 4));
+		break;
+	default:
+		ret = 0;
+	}
+
+	if (ret < 0)
+		return ret;
+
+	return ret & mask ? true : false;
+}
+
+static int _buck_set_ramp_delay(struct udevice *pmic, int buck, u32 ramp_delay)
+{
+	const struct rk8xx_reg_info *info = get_buck_reg(pmic, buck, 0);
+	struct rk8xx_priv *priv = dev_get_priv(pmic);
+	int ramp_value = 0, reg_value;
+	int ramp_reg1, ramp_reg2;
+
+	if (info->config_reg == NA)
+		return -EINVAL;
+
+	switch (priv->variant) {
+	case RK806_ID:
+		switch (ramp_delay) {
+		ramp_value = RK806_RAMP_RATE_1LSB_PER_32CLK;
+		case 1 ... 390:
+			ramp_value = RK806_RAMP_RATE_1LSB_PER_32CLK;
+			break;
+		case 391 ... 961:
+			ramp_value = RK806_RAMP_RATE_1LSB_PER_13CLK;
+			break;
+		case 962 ... 1560:
+			ramp_value = RK806_RAMP_RATE_1LSB_PER_8CLK;
+			break;
+		case 1561 ... 3125:
+			ramp_value = RK806_RAMP_RATE_1LSB_PER_4CLK;
+			break;
+		case 3126 ... 6250:
+			ramp_value = RK806_RAMP_RATE_1LSB_PER_2CLK;
+			break;
+		case 6251 ... 12500:
+			ramp_value = RK806_RAMP_RATE_1LSB_PER_1CLK;
+			break;
+		case 12501 ... 25000:
+			ramp_value = RK806_RAMP_RATE_2LSB_PER_1CLK;
+			break;
+		case 25001 ... 50000: /* 50mV/us */
+			ramp_value = RK806_RAMP_RATE_4LSB_PER_1CLK;
+			break;
+		default:
+			ramp_value = RK806_RAMP_RATE_1LSB_PER_32CLK;
+			printf("buck%d ramp_delay: %d not supported\n",
+			       buck, ramp_delay);
+			break;
+		}
+		break;
+	default:
+		ramp_value = RK806_RAMP_RATE_1LSB_PER_32CLK;
+		return -EINVAL;
+	}
+
+	ramp_reg1 = RK806_RAMP_RATE_REG1(buck);
+	if (buck < 8)
+		ramp_reg2 = RK806_RAMP_RATE_REG1_8;
+	else
+		ramp_reg2 = RK806_RAMP_RATE_REG9_10;
+
+	reg_value = pmic_reg_read(pmic, ramp_reg1);
+	if (reg_value < 0) {
+		printf("buck%d read ramp reg(0x%x) error: %d", buck, ramp_reg1, reg_value);
+		return reg_value;
+	}
+	reg_value &= 0x3f;
+
+	pmic_reg_write(pmic,
+		       ramp_reg1,
+		       reg_value | (ramp_value & 0x03) << 0x06);
+
+	reg_value = pmic_reg_read(pmic, ramp_reg2);
+	if (reg_value < 0) {
+		printf("buck%d read ramp reg(0x%x) error: %d", buck, ramp_reg2, reg_value);
+		return reg_value;
+	}
+
+	return pmic_reg_write(pmic,
+			      ramp_reg2,
+			      reg_value | (ramp_value & 0x04) << (buck % 8));
+}
+
+static int _buck_set_suspend_enable(struct udevice *pmic, int buck, bool enable)
+{
+	return 0;
+}
+
+static int _buck_get_suspend_enable(struct udevice *pmic, int buck)
+{
+	return 0;
+}
+
+static const struct rk8xx_reg_info *get_ldo_reg(struct udevice *pmic,
+						int num, int uvolt)
+{
+	struct rk8xx_priv *priv = dev_get_priv(pmic);
+
+	switch (priv->variant) {
+	case RK806_ID:
+		if (uvolt < 3400000)
+			return &rk806_nldo[num * 2];
+		else
+			return &rk806_nldo[num * 2 + 1];
+	default:
+		return &rk806_nldo[num * 2];
+	}
+}
+
+static const struct rk8xx_reg_info *get_pldo_reg(struct udevice *pmic,
+						 int num, int uvolt)
+{
+	struct rk8xx_priv *priv = dev_get_priv(pmic);
+
+	switch (priv->variant) {
+	case RK806_ID:
+		if (uvolt < 3400000)
+			return &rk806_pldo[num * 2];
+		else
+			return &rk806_pldo[num * 2 + 1];
+	default:
+		return &rk806_pldo[num * 2];
+	}
+}
+
+static int _ldo_get_enable(struct udevice *pmic, int ldo)
+{
+	struct rk8xx_priv *priv = dev_get_priv(pmic);
+	uint mask = 0;
+	int ret = 0;
+
+	switch (priv->variant) {
+	case RK806_ID:
+		if (ldo < 4) {
+			mask = 1 << ldo % 4;
+			ret = pmic_reg_read(pmic, RK806_NLDO_EN(ldo / 4));
+		} else {
+			mask = 1 << 2;
+			 ret = pmic_reg_read(pmic, RK806_NLDO_EN(2));
+		}
+		break;
+	default:
+		return false;
+	}
+
+	if (ret < 0)
+		return ret;
+
+	return ret & mask ? true : false;
+}
+
+static int _ldo_set_enable(struct udevice *pmic, int ldo, bool enable)
+{
+	struct rk8xx_priv *priv = dev_get_priv(pmic);
+	uint value, en_reg;
+	int ret = 0;
+
+	switch (priv->variant) {
+	case RK806_ID:
+		if (ldo < 4) {
+			en_reg = RK806_NLDO_EN(0);
+			if (enable)
+				value = ((1 << ldo % 4) | (1 << (ldo % 4 + 4)));
+			else
+				value = ((0 << ldo % 4) | (1 << (ldo % 4 + 4)));
+			ret = pmic_reg_write(pmic, en_reg, value);
+		} else {
+			en_reg = RK806_NLDO_EN(2);
+			if (enable)
+				value = 0x44;
+			else
+				value = 0x40;
+			ret = pmic_reg_write(pmic, en_reg, value);
+		}
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return ret;
+}
+
+static int _pldo_get_enable(struct udevice *pmic, int ldo)
+{
+	struct rk8xx_priv *priv = dev_get_priv(pmic);
+	uint mask = 0, en_reg;
+	int ret = 0;
+
+	switch (priv->variant) {
+	case RK806_ID:
+		en_reg = RK806_PLDO_EN(ldo / 4);
+		mask = 1 << ldo % 4;
+		ret = pmic_reg_read(pmic, en_reg);
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	if (ret < 0)
+		return ret;
+
+	return ret & mask ? true : false;
+}
+
+static int _pldo_set_enable(struct udevice *pmic, int ldo, bool enable)
+{
+	struct rk8xx_priv *priv = dev_get_priv(pmic);
+	uint value, en_reg;
+	int ret = 0;
+
+	switch (priv->variant) {
+	case RK806_ID:
+		en_reg = RK806_PLDO_EN(ldo / 4);
+		if (enable)
+			value = ((1 << ldo % 4) | (1 << (ldo % 4 + 4)));
+		else
+			value = ((0 << ldo % 4) | (1 << (ldo % 4 + 4)));
+		ret = pmic_reg_write(pmic, en_reg, value);
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return ret;
+}
+
+static int _ldo_set_suspend_enable(struct udevice *pmic, int ldo, bool enable)
+{
+	return 0;
+}
+
+static int _ldo_get_suspend_enable(struct udevice *pmic, int ldo)
+{
+	return 0;
+}
+
+static int buck_get_value(struct udevice *dev)
+{
+	int buck = dev->driver_data - 1;
+	const struct rk8xx_reg_info *info = get_buck_reg(dev->parent, buck, 0);
+	int mask = info->vsel_mask;
+	int i, ret, val;
+
+	if (info->vsel_reg == NA)
+		return -EINVAL;
+
+	ret = pmic_reg_read(dev->parent, info->vsel_reg);
+	if (ret < 0)
+		return ret;
+
+	val = ret & mask;
+	if (val >= info->min_sel && val <= info->max_sel)
+		goto finish;
+
+	/* unlucky to try */
+	for (i = 1; i < info->range_num; i++) {
+		info++;
+		if (val <= info->max_sel && val >= info->min_sel)
+			break;
+	}
+
+finish:
+	return info->min_uv + (val - info->min_sel) * info->step_uv;
+}
+
+static int buck_set_value(struct udevice *dev, int uvolt)
+{
+	int buck = dev->driver_data - 1;
+
+	return _buck_set_value(dev->parent, buck, uvolt);
+}
+
+static int buck_get_suspend_value(struct udevice *dev)
+{
+	int buck = dev->driver_data - 1;
+	const struct rk8xx_reg_info *info = get_buck_reg(dev->parent, buck, 0);
+	int mask = info->vsel_mask;
+	int i, ret, val;
+
+	if (info->vsel_sleep_reg == NA)
+		return -EINVAL;
+
+	ret = pmic_reg_read(dev->parent, info->vsel_sleep_reg);
+	if (ret < 0)
+		return ret;
+
+	val = ret & mask;
+	if (val <= info->max_sel && val >= info->min_sel)
+		goto finish;
+
+	/* unlucky to try */
+	for (i = 1; i < info->range_num; i++) {
+		info++;
+		if (val <= info->max_sel && val >= info->min_sel)
+			break;
+	}
+
+finish:
+	return info->min_uv + (val - info->min_sel) * info->step_uv;
+}
+
+static int buck_set_suspend_value(struct udevice *dev, int uvolt)
+{
+	int buck = dev->driver_data - 1;
+
+	return _buck_set_suspend_value(dev->parent, buck, uvolt);
+}
+
+static int buck_set_enable(struct udevice *dev, bool enable)
+{
+	int buck = dev->driver_data - 1;
+
+	return _buck_set_enable(dev->parent, buck, enable);
+}
+
+static int buck_set_suspend_enable(struct udevice *dev, bool enable)
+{
+	int buck = dev->driver_data - 1;
+
+	return _buck_set_suspend_enable(dev->parent, buck, enable);
+}
+
+static int buck_get_suspend_enable(struct udevice *dev)
+{
+	int buck = dev->driver_data - 1;
+
+	return _buck_get_suspend_enable(dev->parent, buck);
+}
+
+static int buck_set_ramp_delay(struct udevice *dev, u32 ramp_delay)
+{
+	int buck = dev->driver_data - 1;
+
+	return _buck_set_ramp_delay(dev->parent, buck, ramp_delay);
+}
+
+static int buck_get_enable(struct udevice *dev)
+{
+	int buck = dev->driver_data - 1;
+
+	return _buck_get_enable(dev->parent, buck);
+}
+
+static int ldo_get_value(struct udevice *dev)
+{
+	int ldo = dev->driver_data - 1;
+	const struct rk8xx_reg_info *info = get_ldo_reg(dev->parent, ldo, 0);
+	int mask = info->vsel_mask;
+	int ret, val;
+
+	if (info->vsel_reg == NA)
+		return -EINVAL;
+
+	ret = pmic_reg_read(dev->parent, info->vsel_reg);
+	if (ret < 0)
+		return ret;
+	val = ret & mask;
+
+	return info->min_uv + val * info->step_uv;
+}
+
+static int ldo_set_value(struct udevice *dev, int uvolt)
+{
+	int ldo = dev->driver_data - 1;
+	const struct rk8xx_reg_info *info = get_ldo_reg(dev->parent, ldo, uvolt);
+	int mask = info->vsel_mask;
+	int val;
+
+	if (info->vsel_reg == NA)
+		return -EINVAL;
+
+	if (info->step_uv == 0)
+		val = info->min_sel;
+	else
+		val = ((uvolt - info->min_uv) / info->step_uv) + info->min_sel;
+
+	debug("%s: volt=%d, ldo=%d, reg=0x%x, mask=0x%x, val=0x%x\n",
+	      __func__, uvolt, ldo + 1, info->vsel_reg, mask, val);
+
+	return pmic_clrsetbits(dev->parent, info->vsel_reg, mask, val);
+}
+
+static int pldo_get_value(struct udevice *dev)
+{
+	int ldo = dev->driver_data - 1;
+	const struct rk8xx_reg_info *info = get_pldo_reg(dev->parent, ldo, 0);
+	int mask = info->vsel_mask;
+	int ret, val;
+
+	if (info->vsel_reg == NA)
+		return -EINVAL;
+
+	ret = pmic_reg_read(dev->parent, info->vsel_reg);
+	if (ret < 0)
+		return ret;
+	val = ret & mask;
+
+	return info->min_uv + val * info->step_uv;
+}
+
+static int pldo_set_value(struct udevice *dev, int uvolt)
+{
+	int ldo = dev->driver_data - 1;
+	const struct rk8xx_reg_info *info = get_pldo_reg(dev->parent, ldo, uvolt);
+	int mask = info->vsel_mask;
+	int val;
+
+	if (info->vsel_reg == NA)
+		return -EINVAL;
+
+	if (info->step_uv == 0)
+		val = info->min_sel;
+	else
+		val = ((uvolt - info->min_uv) / info->step_uv) + info->min_sel;
+
+	debug("%s: volt=%d, ldo=%d, reg=0x%x, mask=0x%x, val=0x%x\n",
+	      __func__, uvolt, ldo + 1, info->vsel_reg, mask, val);
+
+	return pmic_clrsetbits(dev->parent, info->vsel_reg, mask, val);
+}
+
+static int ldo_set_suspend_value(struct udevice *dev, int uvolt)
+{
+	int ldo = dev->driver_data - 1;
+	const struct rk8xx_reg_info *info = get_ldo_reg(dev->parent, ldo, uvolt);
+	int mask = info->vsel_mask;
+	int val;
+
+	if (info->vsel_sleep_reg == NA)
+		return -EINVAL;
+
+	if (info->step_uv == 0)
+		val = info->min_sel;
+	else
+		val = ((uvolt - info->min_uv) / info->step_uv) + info->min_sel;
+
+	debug("%s: volt=%d, ldo=%d, reg=0x%x, mask=0x%x, val=0x%x\n",
+	      __func__, uvolt, ldo + 1, info->vsel_sleep_reg, mask, val);
+
+	return pmic_clrsetbits(dev->parent, info->vsel_sleep_reg, mask, val);
+}
+
+static int ldo_get_suspend_value(struct udevice *dev)
+{
+	int ldo = dev->driver_data - 1;
+	const struct rk8xx_reg_info *info = get_ldo_reg(dev->parent, ldo, 0);
+	int mask = info->vsel_mask;
+	int val, ret;
+
+	if (info->vsel_sleep_reg == NA)
+		return -EINVAL;
+
+	ret = pmic_reg_read(dev->parent, info->vsel_sleep_reg);
+	if (ret < 0)
+		return ret;
+
+	val = ret & mask;
+
+	return info->min_uv + val * info->step_uv;
+}
+
+static int ldo_set_enable(struct udevice *dev, bool enable)
+{
+	int ldo = dev->driver_data - 1;
+
+	return _ldo_set_enable(dev->parent, ldo, enable);
+}
+
+static int ldo_set_suspend_enable(struct udevice *dev, bool enable)
+{
+	int ldo = dev->driver_data - 1;
+
+	return _ldo_set_suspend_enable(dev->parent, ldo, enable);
+}
+
+static int ldo_get_suspend_enable(struct udevice *dev)
+{
+	int ldo = dev->driver_data - 1;
+
+	return _ldo_get_suspend_enable(dev->parent, ldo);
+}
+
+static int ldo_get_enable(struct udevice *dev)
+{
+	int ldo = dev->driver_data - 1;
+
+	return _ldo_get_enable(dev->parent, ldo);
+}
+
+static int pldo_set_enable(struct udevice *dev, bool enable)
+{
+	int ldo = dev->driver_data - 1;
+
+	return _pldo_set_enable(dev->parent, ldo, enable);
+}
+
+static int pldo_get_enable(struct udevice *dev)
+{
+	int ldo = dev->driver_data - 1;
+
+	return _pldo_get_enable(dev->parent, ldo);
+}
+
+static int rk8xx_buck_probe(struct udevice *dev)
+{
+	struct dm_regulator_uclass_platdata *uc_pdata;
+
+	uc_pdata = dev_get_uclass_platdata(dev);
+	uc_pdata->type = REGULATOR_TYPE_BUCK;
+	uc_pdata->mode_count = 0;
+
+	return 0;
+}
+
+static int rk8xx_ldo_probe(struct udevice *dev)
+{
+	struct dm_regulator_uclass_platdata *uc_pdata;
+
+	uc_pdata = dev_get_uclass_platdata(dev);
+	uc_pdata->type = REGULATOR_TYPE_LDO;
+	uc_pdata->mode_count = 0;
+
+	return 0;
+}
+
+static int rk8xx_pldo_probe(struct udevice *dev)
+{
+	struct dm_regulator_uclass_platdata *uc_pdata;
+
+	uc_pdata = dev_get_uclass_platdata(dev);
+	uc_pdata->type = REGULATOR_TYPE_LDO;
+	uc_pdata->mode_count = 0;
+
+	return 0;
+}
+
+static const struct dm_regulator_ops rk8xx_buck_ops = {
+	.get_value  = buck_get_value,
+	.set_value  = buck_set_value,
+	.set_suspend_value = buck_set_suspend_value,
+	.get_suspend_value = buck_get_suspend_value,
+	.get_enable = buck_get_enable,
+	.set_enable = buck_set_enable,
+	.set_suspend_enable = buck_set_suspend_enable,
+	.get_suspend_enable = buck_get_suspend_enable,
+	.set_ramp_delay = buck_set_ramp_delay,
+};
+
+static const struct dm_regulator_ops rk8xx_ldo_ops = {
+	.get_value  = ldo_get_value,
+	.set_value  = ldo_set_value,
+	.set_suspend_value = ldo_set_suspend_value,
+	.get_suspend_value = ldo_get_suspend_value,
+	.get_enable = ldo_get_enable,
+	.set_enable = ldo_set_enable,
+	.set_suspend_enable = ldo_set_suspend_enable,
+	.get_suspend_enable = ldo_get_suspend_enable,
+};
+
+static const struct dm_regulator_ops rk8xx_pldo_ops = {
+	.get_value  = pldo_get_value,
+	.set_value  = pldo_set_value,
+	.get_enable = pldo_get_enable,
+	.set_enable = pldo_set_enable,
+};
+
+U_BOOT_DRIVER(rk8xx_spi_buck) = {
+	.name = "rk8xx_spi_buck",
+	.id = UCLASS_REGULATOR,
+	.ops = &rk8xx_buck_ops,
+	.probe = rk8xx_buck_probe,
+};
+
+U_BOOT_DRIVER(rk8xx_spi_ldo) = {
+	.name = "rk8xx_spi_ldo",
+	.id = UCLASS_REGULATOR,
+	.ops = &rk8xx_ldo_ops,
+	.probe = rk8xx_ldo_probe,
+};
+
+U_BOOT_DRIVER(rk8xx_spi_pldo) = {
+	.name = "rk8xx_spi_pldo",
+	.id = UCLASS_REGULATOR,
+	.ops = &rk8xx_pldo_ops,
+	.probe = rk8xx_pldo_probe,
+};
+#endif
diff --git a/include/power/rk8xx_pmic.h b/include/power/rk8xx_pmic.h
index 70b11c0337..a4ea964cc7 100644
--- a/include/power/rk8xx_pmic.h
+++ b/include/power/rk8xx_pmic.h
@@ -185,6 +185,7 @@ enum {
 
 enum {
 	RK805_ID = 0x8050,
+	RK806_ID = 0x8060,
 	RK808_ID = 0x0000,
 	RK809_ID = 0x8090,
 	RK816_ID = 0x8160,
@@ -278,6 +279,7 @@ struct rk8xx_reg_table {
 
 struct rk8xx_priv {
 	struct virq_chip *irq_chip;
+	struct spi_slave *slave;
 	int variant;
 	int irq;
 	int lp_off_time;

commit a9ee0047069ef13a6000da6d108bd272232905ee
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 4 02:03:11 2021 +0000

    pmic: rk8xx: use rk8xx_read/write()
    
    Follow the coding style of current file.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I54ce1aa4310aaa3389518f64de620b36c28bee3f

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index 39afb4d0fa..066943e555 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -301,20 +301,14 @@ static int rk8xx_shutdown(struct udevice *dev)
 		return -EINVAL;
 	}
 
-	ret = dm_i2c_read(dev, devctrl_reg, &val, 1);
-	if (ret) {
-		printf("%s: read reg 0x%02x failed, ret=%d\n",
-		       __func__, devctrl_reg, ret);
+	ret = rk8xx_read(dev, devctrl_reg, &val, 1);
+	if (ret)
 		return ret;
-	}
 
 	val |= dev_off;
-	ret = dm_i2c_write(dev, devctrl_reg, &val, 1);
-	if (ret) {
-		printf("%s: write reg 0x%02x failed, ret=%d\n",
-		       __func__, devctrl_reg, ret);
+	ret = rk8xx_write(dev, devctrl_reg, &val, 1);
+	if (ret)
 		return ret;
-	}
 
 	return 0;
 }
@@ -486,6 +480,7 @@ static int rk8xx_probe(struct udevice *dev)
 	uint8_t on_source = 0, off_source = 0;
 	uint8_t pwron_key = 0, lp_off_msk = 0, lp_act_msk = 0;
 	uint8_t power_en0, power_en1, power_en2, power_en3;
+	uint8_t on, off;
 	uint8_t value;
 
 	/* read Chip variant */
@@ -545,15 +540,24 @@ static int rk8xx_probe(struct udevice *dev)
 		/* judge whether save the PMIC_POWER_EN register */
 		if (priv->not_save_power_en)
 			break;
-		power_en0 = pmic_reg_read(dev, RK817_POWER_EN0);
-		power_en1 = pmic_reg_read(dev, RK817_POWER_EN1);
-		power_en2 = pmic_reg_read(dev, RK817_POWER_EN2);
-		power_en3 = pmic_reg_read(dev, RK817_POWER_EN3);
+
+		ret = rk8xx_read(dev, RK817_POWER_EN0, &power_en0, 1);
+		if (ret)
+			return ret;
+		ret = rk8xx_read(dev, RK817_POWER_EN1, &power_en1, 1);
+		if (ret)
+			return ret;
+		ret = rk8xx_read(dev, RK817_POWER_EN2, &power_en2, 1);
+		if (ret)
+			return ret;
+		ret = rk8xx_read(dev, RK817_POWER_EN3, &power_en3, 1);
+		if (ret)
+			return ret;
 
 		value = (power_en0 & 0x0f) | ((power_en1 & 0x0f) << 4);
-		pmic_reg_write(dev, RK817_POWER_EN_SAVE0, value);
+		rk8xx_write(dev, RK817_POWER_EN_SAVE0, &value, 1);
 		value = (power_en2 & 0x0f) | ((power_en3 & 0x0f) << 4);
-		pmic_reg_write(dev, RK817_POWER_EN_SAVE1, value);
+		rk8xx_write(dev, RK817_POWER_EN_SAVE1, &value, 1);
 		break;
 	default:
 		printf("Unknown PMIC: RK%x!!\n", priv->variant);
@@ -586,20 +590,23 @@ static int rk8xx_probe(struct udevice *dev)
 
 	printf("PMIC:  RK%x ", show_variant);
 
-	if (on_source && off_source)
-		printf("(on=0x%02x, off=0x%02x)",
-		       pmic_reg_read(dev, on_source),
-		       pmic_reg_read(dev, off_source));
+	if (on_source && off_source) {
+		rk8xx_read(dev, on_source, &on, 1);
+		rk8xx_read(dev, off_source, &off, 1);
+		printf("(on=0x%02x, off=0x%02x)", on, off);
+	}
 	printf("\n");
 
 	if (pwron_key) {
-		value = pmic_reg_read(dev, pwron_key);
+		ret = rk8xx_read(dev, pwron_key, &value, 1);
+		if (ret)
+			return ret;
 		value &= ~(lp_off_msk | lp_act_msk);
 		if (lp_off_msk)
 			value |= priv->lp_off_time;
 		if (lp_act_msk)
 			value |= priv->lp_action;
-		pmic_reg_write(dev, pwron_key, value);
+		rk8xx_write(dev, pwron_key, &value, 1);
 	}
 
 	ret = rk8xx_irq_chip_init(dev);

commit 55c91f7819c5c020529171bdeb3b2d821e62e8e2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Aug 10 18:47:13 2021 +0800

    rockchip: dts: rk3568-u-boot: Add i2c0/1 node
    
    It was tested and as a sample for the further.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ib1c3a33a585b2dc89c0be7993c85771a5b845fac

diff --git a/arch/arm/dts/rk3568-u-boot.dtsi b/arch/arm/dts/rk3568-u-boot.dtsi
index bcec6fe1db..d929818b77 100644
--- a/arch/arm/dts/rk3568-u-boot.dtsi
+++ b/arch/arm/dts/rk3568-u-boot.dtsi
@@ -427,3 +427,31 @@
 	u-boot,dm-pre-reloc;
 	status = "okay";
 };
+
+#if 0
+&i2c0 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&i2c0_xfer {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&i2c1 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&i2c1_xfer {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&pcfg_pull_none_smt {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+#endif
+

commit 640c1622fbc74949224b6da0e5760967513992f5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Nov 5 03:46:58 2021 +0000

    configs: evb-rk3036: enable CONFIG_SYS_MALLOC_F_LEN
    
    fix sysmem alloc failed before relocation:
    
      ......
      Model: SDK-RK3036
      Serial: raw, 0x20068000
      DRAM:  510.9 MiB
      Sysmem: init
      Sysmem Error: No memory for \"STACK\" alloc sysmem
      sysmem_dump_all:
      ......
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ia54c972c8f83c11d7b6ed373f8822dd457a1ce70

diff --git a/configs/evb-rk3036_defconfig b/configs/evb-rk3036_defconfig
index 5c7db13d0d..cebfd3d38c 100644
--- a/configs/evb-rk3036_defconfig
+++ b/configs/evb-rk3036_defconfig
@@ -2,7 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SYS_MALLOC_F_LEN=0x800
+CONFIG_SYS_MALLOC_F_LEN=0x1000
 CONFIG_TPL_TEXT_BASE=0x10081000
 CONFIG_ROCKCHIP_RK3036=y
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"

commit 2a212970d89b12fdb3718376f046c8305b2c1883
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Oct 25 17:33:56 2021 +0800

    mtd: spi-nor-ids: Add support for gd25lb512m
    
    Change-Id: I17f7798cf7f51c10bd3527d095fac57c69538784
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index c2e357f6f1..8dfa87cf26 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -132,6 +132,11 @@ const struct flash_info spi_nor_ids[] = {
 			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
 			SPI_NOR_4B_OPCODES | SPI_NOR_HAS_LOCK)
 	},
+	{
+		INFO("gd25lb512m", 0xc8671a, 0, 64 * 1024, 1024,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+			SPI_NOR_4B_OPCODES | SPI_NOR_HAS_LOCK)
+	},
 #endif
 #ifdef CONFIG_SPI_FLASH_ISSI		/* ISSI */
 	/* ISSI */

commit 83cfcb32f9771681fb123214d36eb7b79a825c82
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 3 01:31:27 2021 +0000

    dm: sysreset: do optimise
    
    1. use more generic way for psci/syscon-reboot sysreset, fixes compile error:
      ......
      drivers/built-in.o: In function `sysreset_walk':
      drivers/sysreset/sysreset-uclass.c:49: undefined reference to `_u_boot_list_2_driver_2_psci_sysreset'
      drivers/built-in.o: In function `reboot':
      drivers/sysreset/sysreset-uclass.c:102: undefined reference to `_u_boot_list_2_driver_2_sysreset_syscon_reboot'
      ......
    
    2. use psci/syscon-reboot sysreset only in U-Boot proper, excluding SPL/TPL/USBPLUG.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I6908e7e2d7e5143643be3f0cab90cd6009cde254

diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig
index e272a9990f..dd7928f8fa 100644
--- a/drivers/sysreset/Kconfig
+++ b/drivers/sysreset/Kconfig
@@ -50,6 +50,12 @@ config SYSRESET_SYSCON
 	help
 	  Reboot support for generic SYSCON mapped register reset.
 
+config SYSRESET_SYSCON_REBOOT
+	bool "Enable support for syscon reboot mode driver"
+	default y if ARCH_ROCKCHIP
+	help
+	  Reboot mode command, like: reboot bootloader, etc.
+
 config SYSRESET_WATCHDOG
 	bool "Enable support for watchdog reboot driver"
 	select WDT
diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
index 0aa37f6b30..f033560d62 100644
--- a/drivers/sysreset/Makefile
+++ b/drivers/sysreset/Makefile
@@ -6,9 +6,9 @@
 
 obj-$(CONFIG_$(SPL_TPL_)SYSRESET) += sysreset-uclass.o
 
-ifndef CONFIG_SPL_BUILD
-obj-$(CONFIG_SYSRESET) += sysreset-syscon-reboot.o
-obj-$(CONFIG_SYSRESET_PSCI) += sysreset_psci.o
+ifndef CONFIG_SUPPORT_USBPLUG
+obj-$(CONFIG_$(SPL_TPL_)SYSRESET_SYSCON_REBOOT) += sysreset-syscon-reboot.o
+obj-$(CONFIG_$(SPL_TPL_)SYSRESET_PSCI) += sysreset_psci.o
 endif
 
 obj-$(CONFIG_SYSRESET_SYSCON) += sysreset_syscon.o
diff --git a/drivers/sysreset/sysreset-uclass.c b/drivers/sysreset/sysreset-uclass.c
index 6c3bb8fedb..63fd53204f 100644
--- a/drivers/sysreset/sysreset-uclass.c
+++ b/drivers/sysreset/sysreset-uclass.c
@@ -30,20 +30,6 @@ int sysreset_walk(enum sysreset_t type)
 	struct udevice *dev;
 	int ret = -ENOSYS;
 
-	/*
-	 * Use psci sysreset as primary for rockchip platforms,
-	 * "rockchip_reset" is applied if PSCI is disabled.
-	 */
-#if !defined(CONFIG_SPL_BUILD) && \
-     defined(CONFIG_ARCH_ROCKCHIP) && defined(CONFIG_SYSRESET_PSCI)
-	ret = uclass_get_device_by_driver(UCLASS_SYSRESET,
-					  DM_GET_DRIVER(psci_sysreset), &dev);
-	if (!ret)
-		sysreset_request(dev, type);
-	else
-		printf("WARN: PSCI sysreset is disabled\n");
-#endif
-
 	while (ret != -EINPROGRESS && type < SYSRESET_COUNT) {
 		for (uclass_first_device(UCLASS_SYSRESET, &dev);
 		     dev;
@@ -58,6 +44,25 @@ int sysreset_walk(enum sysreset_t type)
 	return ret;
 }
 
+static void sysreset_walk_reboot_mode(const char *mode)
+{
+	struct sysreset_ops *ops;
+	struct udevice *dev;
+
+	if (!mode)
+		return;
+
+	for (uclass_first_device(UCLASS_SYSRESET, &dev);
+	     dev;
+	     uclass_next_device(&dev)) {
+		ops = sysreset_get_ops(dev);
+		if (ops && ops->request_by_mode) {
+			ops->request_by_mode(dev, mode);
+			break;
+		}
+	}
+}
+
 void sysreset_walk_halt(enum sysreset_t type)
 {
 	int ret;
@@ -83,24 +88,7 @@ void reset_cpu(ulong addr)
 
 void reboot(const char *mode)
 {
-#ifndef CONFIG_SPL_BUILD
-	struct sysreset_ops *ops;
-	struct udevice *dev;
-	int ret;
-
-	if (!mode)
-		goto finish;
-
-	ret = uclass_get_device_by_driver(UCLASS_SYSRESET,
-					  DM_GET_DRIVER(sysreset_syscon_reboot),
-					  &dev);
-	if (!ret) {
-		ops = sysreset_get_ops(dev);
-		if (ops && ops->request_by_mode)
-			ops->request_by_mode(dev, mode);
-	}
-finish:
-#endif
+	sysreset_walk_reboot_mode(mode);
 	flushc();
 	sysreset_walk_halt(SYSRESET_COLD);
 }
diff --git a/drivers/sysreset/sysreset_psci.c b/drivers/sysreset/sysreset_psci.c
index 4656d273c1..42a56e023b 100644
--- a/drivers/sysreset/sysreset_psci.c
+++ b/drivers/sysreset/sysreset_psci.c
@@ -35,7 +35,8 @@ static struct sysreset_ops psci_sysreset_ops = {
 	.request = psci_sysreset_request,
 };
 
-U_BOOT_DRIVER(psci_sysreset) = {
+/* Add an 'a_' prefix so it comes the first sysreset path. */
+U_BOOT_DRIVER(a_psci_sysreset) = {
 	.name = "psci-sysreset",
 	.id = UCLASS_SYSRESET,
 	.ops = &psci_sysreset_ops,

commit 5e1b21ba53ede39404909b0cb91b4a91a2350151
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 3 01:34:50 2021 +0000

    arm: crt0_64.S: disable arm64 SError for usbplug
    
    On rk356x platform usbplug mode, we found it occurs SError
    when rockusb download.
    
    Issue dump:
      .....
      Serial: raw, 0xfe660000
      dwmmc@fe2b0000: 1, dwmmc@fe2c0000: 2, sdhci@fe310000: 0
      Bootdev: mmc 0
      RKUSB: LUN 0, dev 0, hwpart 0, sector 0x0, count 0x3a3e000
      \"Error" handler, esr 0xbe000011
    
      * Reason:        Exception from SError interrupt
      * PC         =   0000000000013c68
      * LR         =   0000000000010f7c
      .....
    
    fixes:
    (617c1bec46 arm: v7/v8: Enable SError/Asynchronous external abort for TPL/SPL/U-Boot)
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I6270bd0a8afdd998ac09242f21598cc8acd200ca

diff --git a/arch/arm/lib/crt0_64.S b/arch/arm/lib/crt0_64.S
index 79275dabbe..05df8491f5 100644
--- a/arch/arm/lib/crt0_64.S
+++ b/arch/arm/lib/crt0_64.S
@@ -79,7 +79,9 @@ ENTRY(_main)
 3:	mrs	x0, sctlr_el3
 	orr	x0, x0, x1
 	msr	sctlr_el3, x0
-	msr	daifclr, #4			/* SCR_EL3.EA=1 was already set in start.S */
+#ifndef CONFIG_SUPPORT_USBPLUG
+	msr	daifclr, #4			/* Enable SError. SCR_EL3.EA=1 was already set in start.S */
+#endif
 	b	0f
 2:	mrs	x0, sctlr_el2
 	orr	x0, x0, x1

commit 5385f6ef28f264b74e085a93a8dc9510eefb13f2
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Mon Nov 1 16:20:35 2021 +0800

    lib: optee_clientApi: data alignment for get_rkss_version
    
    Change-Id: I351704ef104742d50cb39997db2fda181cf866b6
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/OpteeClientRkFs_common.c b/lib/optee_clientApi/OpteeClientRkFs_common.c
index 7dcd1eb2f1..2ae83a0ce8 100644
--- a/lib/optee_clientApi/OpteeClientRkFs_common.c
+++ b/lib/optee_clientApi/OpteeClientRkFs_common.c
@@ -43,7 +43,7 @@ static int get_rkss_version(void)
 		return rkss_version;
 	}
 
-	read_buff = (uint8_t *)malloc(512);
+	read_buff = (uint8_t *)memalign(CONFIG_SYS_CACHELINE_SIZE, 512);
 	if (!read_buff) {
 		printf("TEEC: Malloc failed!\n");
 		return -1;

commit 31120150cf3d50d51e881e274a6554b47b57ccda
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Sun Sep 26 20:38:16 2021 +0800

    rockchip: rkimg: support setting NVME as main storage
    
    Change-Id: I9332a33b6412452c83170c7390126c4f4be8b9d3
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_rkimg.c b/arch/arm/mach-rockchip/boot_rkimg.c
index 7b789af3ac..89c554b879 100644
--- a/arch/arm/mach-rockchip/boot_rkimg.c
+++ b/arch/arm/mach-rockchip/boot_rkimg.c
@@ -19,6 +19,7 @@
 #include <key.h>
 #include <mmc.h>
 #include <malloc.h>
+#include <nvme.h>
 #include <stdlib.h>
 #include <sysmem.h>
 #include <asm/io.h>
@@ -67,6 +68,24 @@ static void boot_devtype_init(void)
 	}
 #endif
 
+#ifdef CONFIG_NVME
+	struct udevice *udev;
+
+	ret = nvme_scan_namespace();
+	if (!ret) {
+		ret = blk_get_device(IF_TYPE_NVME, 0, &udev);
+		if (!ret) {
+			devtype = "nvme";
+			devnum = "0";
+			env_set("devtype", devtype);
+			env_set("devnum", devnum);
+			goto finish;
+		}
+	} else {
+		printf("Set nvme as boot storage fail ret=%d\n", ret);
+	}
+#endif
+
 	/* High priority: get bootdev from atags */
 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
 	ret = param_parse_bootdev(&devtype, &devnum);
@@ -153,6 +172,9 @@ static int get_bootdev_type(void)
 	} else if (!strcmp(devtype, "scsi")) {
 		type = IF_TYPE_SCSI;
 		boot_media = "scsi";
+	} else if (!strcmp(devtype, "nvme")) {
+		type = IF_TYPE_NVME;
+		boot_media = "nvme";
 	} else {
 		/* Add new to support */
 	}

commit 3ddd5a65dd8b097f60e661fb10b70bd04d94a2d2
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue Nov 2 16:36:20 2021 +0800

    rockchip: rk3308bs: correct the nand iomux
    
    The rk3308b and rk3308bs nand flash id has two group iomuxs.
    
    The maskrom only config the iomux register in the low address,
    but the kernel routing to the another one, so configure it in
    spl early to avoid losing the flash iomux.
    
    Change-Id: I95381a8bad9a2f91decb89cd509a9b1977e90186
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3308/rk3308.c b/arch/arm/mach-rockchip/rk3308/rk3308.c
index aed500db62..4dfc7460db 100644
--- a/arch/arm/mach-rockchip/rk3308/rk3308.c
+++ b/arch/arm/mach-rockchip/rk3308/rk3308.c
@@ -277,7 +277,7 @@ int rk_board_init_f(void)
 		(GPIO3B3_SEL_SRC_CTRL_SEL_PLUS << GPIO3B3_SEL_SRC_CTRL_SHIFT);
 
 	if (get_bootdev_by_brom_bootsource() == BOOT_TYPE_NAND) {
-		if (soc_is_rk3308b())
+		if (soc_is_rk3308b() || soc_is_rk3308bs())
 			rk_clrsetreg(&grf->soc_con15, mask, value);
 	}
 

commit 4353cdc4ec81600e62635687c9f8404e0ce112fb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Oct 27 03:08:26 2021 +0000

    rockchip: board: fix kernel 5.10 arm64 boot address warning
    
    Fix warning:
    "[Firmware Bug]: Kernel image misaligned at boot, please fix your bootloader!"
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ib9e8b7924a413dbd289e37bd52140b8b995d09bd

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 42b2d50fdf..aafaa23b40 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -543,10 +543,41 @@ int board_initr_caches_fixup(void)
 }
 #endif
 
-void arch_preboot_os(uint32_t bootm_state)
+void arch_preboot_os(uint32_t bootm_state, bootm_headers_t *images)
 {
-	if (bootm_state & BOOTM_STATE_OS_PREP)
-		hotkey_run(HK_CLI_OS_PRE);
+	if (!(bootm_state & BOOTM_STATE_OS_PREP))
+		return;
+
+#ifdef CONFIG_ARM64
+	u8 *data = (void *)images->ep;
+	ulong dst;
+
+	/*
+	 * Fix kernel 5.10 arm64 boot warning:
+	 * "[Firmware Bug]: Kernel image misaligned at boot, please fix your bootloader!"
+	 *
+	 * kernel: 5.10 commit 120dc60d0bdb ("arm64: get rid of TEXT_OFFSET")
+	 * arm64 kernel version:
+	 *	data[10] == 0x00 if kernel version >= 5.10
+	 *	data[10] == 0x08 if kernel version <  5.10
+	 *
+	 * Why fix here?
+	 *   1. this is the common and final path for any boot command.
+	 *   2. don't influence original boot flow, just fix it exactly before
+	 *	jumping kernel.
+	 */
+	if (data[10] == 0x00) {
+		dst = round_down(images->ep, SZ_2M);
+		if (dst != images->ep) {
+			memcpy((char *)dst, (const char *)images->ep,
+			       images->os.image_len);
+			printf("   ** RELOCATE ** Kernel from 0x%08lx to 0x%08lx\n",
+			       images->ep, dst);
+			images->ep = dst;
+		}
+	}
+#endif
+	hotkey_run(HK_CLI_OS_PRE);
 }
 
 void enable_caches(void)

commit 4c3bac6252879a944332131a537cc97a539ee126
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Oct 27 02:59:59 2021 +0000

    common: bootm: pass bootm header structure for arch_preboot_os()
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Id2735cd4224a0aa04fac2d208757e104ba8e82b0

diff --git a/common/bootm.c b/common/bootm.c
index 83fa281e96..fcb561d7de 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -522,7 +522,7 @@ static int bootm_load_os(bootm_headers_t *images, unsigned long *load_end,
 	}
 	flush_cache(load, ALIGN(*load_end - load, ARCH_DMA_MINALIGN));
 
-	debug("   kernel loaded at 0x%08lx, end = 0x%08lx\n", load, *load_end);
+	printf("   kernel loaded at 0x%08lx, end = 0x%08lx\n", load, *load_end);
 	bootstage_mark(BOOTSTAGE_ID_KERNEL_LOADED);
 
 	no_overlap = (os.comp == IH_COMP_NONE && load == image_start);
@@ -546,6 +546,9 @@ static int bootm_load_os(bootm_headers_t *images, unsigned long *load_end,
 		}
 	}
 
+	/* update image len as decompressed kernel size for late use */
+	images->os.image_len = *load_end - load;
+
 	return 0;
 }
 
@@ -775,7 +778,7 @@ int do_bootm_states(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
 		if (images->os.os == IH_OS_LINUX)
 			fixup_silent_linux();
 #endif
-		arch_preboot_os(BOOTM_STATE_OS_PREP);
+		arch_preboot_os(BOOTM_STATE_OS_PREP, images);
 
 		ret = boot_fn(BOOTM_STATE_OS_PREP, argc, argv, images);
 	}
diff --git a/common/bootm_os.c b/common/bootm_os.c
index 392dd2f59f..3af6fdd198 100644
--- a/common/bootm_os.c
+++ b/common/bootm_os.c
@@ -469,7 +469,7 @@ static boot_os_fn *boot_os[] = {
 };
 
 /* Allow for arch specific config before we boot */
-__weak void arch_preboot_os(uint32_t bootm_state)
+__weak void arch_preboot_os(uint32_t bootm_state, bootm_headers_t *images)
 {
 	/* please define platform specific arch_preboot_os() */
 }
@@ -477,7 +477,7 @@ __weak void arch_preboot_os(uint32_t bootm_state)
 int boot_selected_os(int argc, char * const argv[], int state,
 		     bootm_headers_t *images, boot_os_fn *boot_fn)
 {
-	arch_preboot_os(state);
+	arch_preboot_os(state, images);
 	boot_fn(state, argc, argv, images);
 
 	/* Stand-alone may return when 'autostart' is 'no' */
diff --git a/include/bootm.h b/include/bootm.h
index 2274ab5350..40f2998a41 100644
--- a/include/bootm.h
+++ b/include/bootm.h
@@ -54,7 +54,7 @@ int bootm_find_images(int flag, int argc, char * const argv[]);
 int do_bootm_states(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
 		    int states, bootm_headers_t *images, int boot_progress);
 
-void arch_preboot_os(uint32_t bootm_state);
+void arch_preboot_os(uint32_t bootm_state, bootm_headers_t *images);
 
 int board_do_bootm(int argc, char * const argv[]);
 

commit 892e9cd5e6cccfd3d203549b7f6644262d5b7183
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Oct 27 02:58:49 2021 +0000

    cmd: tftp_update: add firmware version initial message
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I19ee818cc821ddbfd9563c6539725070cb01c633

diff --git a/cmd/tftp_update.c b/cmd/tftp_update.c
index 58ed9007fe..1cd808a019 100644
--- a/cmd/tftp_update.c
+++ b/cmd/tftp_update.c
@@ -79,6 +79,7 @@ static u32 tftpfw_version_get(void)
 	if (ret < 0) {
 		if (ret == -EINVAL) {
 			version = 0; /* first initial as 0 */
+			TFTPUD_I("Initial firmware version as 0\n");
 			ret = tftpfw_version_set(version);
 			if (ret < 0)
 				return ret;

commit d685b21a9b9240f0c0b2de66358973700087e321
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 26 03:14:23 2021 +0000

    configs: rk3568: enable CONFIG_ROCKCHIP_NEW_IDB
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ie08aa77fa8f1c45538dde9e19ab42f71f0d44e8b

diff --git a/configs/rk3568-spl-spi-nand_defconfig b/configs/rk3568-spl-spi-nand_defconfig
index 99801350d9..eabdae7689 100755
--- a/configs/rk3568-spl-spi-nand_defconfig
+++ b/configs/rk3568-spl-spi-nand_defconfig
@@ -9,6 +9,7 @@ CONFIG_ROCKCHIP_RK3568=y
 CONFIG_ROCKCHIP_FIT_IMAGE=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y
+CONFIG_ROCKCHIP_NEW_IDB=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_TARGET_EVB_RK3568=y
diff --git a/configs/rk3568-usbplug.config b/configs/rk3568-usbplug.config
index a91c4b1a7c..3700d08844 100644
--- a/configs/rk3568-usbplug.config
+++ b/configs/rk3568-usbplug.config
@@ -8,3 +8,4 @@ CONFIG_TARGET_EVB_RK3568=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_SDMA=y
 CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_ROCKCHIP_NEW_IDB=y
diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index 8ccbce80f6..a413803455 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -8,6 +8,7 @@ CONFIG_ROCKCHIP_RK3568=y
 CONFIG_ROCKCHIP_FIT_IMAGE=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y
+CONFIG_ROCKCHIP_NEW_IDB=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_TARGET_EVB_RK3568=y

commit 0b97a2cba3dad0e0a5ee9b83f81962a0251fd65b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 26 03:14:46 2021 +0000

    rockusb: introduce CONFIG_ROCKCHIP_NEW_IDB
    
    The IDB header was changed from rk356x.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I8ac50adfe06da76f725b484681b76faeeb06d907

diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index 38ab7c1e76..d76ea684a2 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -696,7 +696,7 @@ static int rkusb_do_read_capacity(struct fsg_common *common,
 		buf[0] |= (1 << 6);
 #endif
 
-#if defined(CONFIG_ROCKCHIP_RK3568)
+#if defined(CONFIG_ROCKCHIP_NEW_IDB)
 	buf[1] = BIT(0);
 #endif
 	buf[1] |= BIT(1);

commit 6150729092b82b4c8f9335f4a6826a9ac1787e0e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 26 03:09:00 2021 +0000

    rockchip: Kconfig: introduce CONFIG_ROCKCHIP_NEW_IDB
    
    The new IDB header was introduced from RK356X.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ib70ec7ec10ec3b6a75d763085faa55aeb5ae6edf

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 3e59105398..1c3a6768d8 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -805,6 +805,12 @@ config ROCKCHIP_REBOOT_TEST
 	help
 	  It's a reboot stress test before kernel stages.
 
+config ROCKCHIP_NEW_IDB
+	bool "Rockchip new IDB header"
+	default n
+	help
+	  The new IDB header was introduced from RK356X.
+
 config GICV2
 	bool "ARM GICv2"
 

commit a09f237bf13322974b1efe5c589d8a9adaf6372e
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Oct 14 17:36:45 2021 +0800

    power: regulator: add rk860x regulator
    
    add driver support for rk8600/01/02/03 dcdc.
    
    Change-Id: I9b849386b2eaa2aec34247cc4fa50679978e47c0
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/power/regulator/Kconfig b/drivers/power/regulator/Kconfig
index 5b4605f5a2..2eeccdab50 100644
--- a/drivers/power/regulator/Kconfig
+++ b/drivers/power/regulator/Kconfig
@@ -100,6 +100,14 @@ config DM_REGULATOR_GPIO
 	features for gpio regulators. The driver implements get/set for
 	voltage value.
 
+config REGULATOR_RK860X
+	bool "Enable driver for rk860x regulators"
+	depends on DM_REGULATOR
+	---help---
+	Enable support for the regulator functions of the rk860x DCDC. The
+	driver implements get/set api for the various BUCK.This driver is
+	controlled by a device tree node which includes voltage limits.
+
 config REGULATOR_RK8XX
 	bool "Enable driver for RK8XX regulators"
 	depends on DM_REGULATOR && PMIC_RK8XX
diff --git a/drivers/power/regulator/Makefile b/drivers/power/regulator/Makefile
index d582ee1bc2..1dbd8d253c 100644
--- a/drivers/power/regulator/Makefile
+++ b/drivers/power/regulator/Makefile
@@ -14,6 +14,7 @@ obj-$(CONFIG_REGULATOR_PWM) += pwm_regulator.o
 obj-$(CONFIG_REGULATOR_FAN53555) += fan53555_regulator.o
 obj-$(CONFIG_$(SPL_)DM_REGULATOR_FIXED) += fixed.o
 obj-$(CONFIG_$(SPL_)DM_REGULATOR_GPIO) += gpio-regulator.o
+obj-$(CONFIG_REGULATOR_RK860X) += rk860x_regulator.o
 obj-$(CONFIG_REGULATOR_RK8XX) += rk8xx.o
 obj-$(CONFIG_REGULATOR_S5M8767) += s5m8767.o
 obj-$(CONFIG_DM_REGULATOR_SANDBOX) += sandbox.o
diff --git a/drivers/power/regulator/rk860x_regulator.c b/drivers/power/regulator/rk860x_regulator.c
new file mode 100644
index 0000000000..08720872cb
--- /dev/null
+++ b/drivers/power/regulator/rk860x_regulator.c
@@ -0,0 +1,414 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd
+ */
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <i2c.h>
+#include <syscon.h>
+#include <asm/gpio.h>
+#include <power/regulator.h>
+#include <asm/arch/clock.h>
+#include <asm/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* Voltage setting */
+
+#define RK860X_VSEL0_A		0x00
+#define RK860X_VSEL1_A		0x01
+#define RK860X_VSEL0_B		0x06
+#define RK860X_VSEL1_B		0x07
+#define RK860X_MAX_SET		0x08
+
+/* Control register */
+#define RK860X_CONTROL		0x02
+/* IC Type */
+#define RK860X_ID1		0x03
+/* IC mask version */
+#define RK860X_ID2		0x04
+/* Monitor register */
+#define RK860X_MONITOR		0x05
+
+/* VSEL bit definitions */
+#define VSEL_BUCK_EN		BIT(7)
+#define VSEL_MODE		BIT(6)
+#define VSEL_A_NSEL_MASK	0x3F
+#define VSEL_B_NSEL_MASK	0xff
+
+/* Chip ID */
+#define DIE_ID			0x0F
+#define DIE_REV			0x0F
+/* Control bit definitions */
+#define CTL_OUTPUT_DISCHG	BIT(7)
+#define CTL_SLEW_MASK		(0x7 << 4)
+#define CTL_SLEW_SHIFT		4
+#define CTL_RESET		BIT(2)
+
+#define RK860X_NVOLTAGES_64	64
+#define RK860X_NVOLTAGES_160	160
+
+/* IC Type */
+enum {
+	RK860X_CHIP_ID_00 = 0,
+	RK860X_CHIP_ID_01,
+	RK860X_CHIP_ID_02,
+	RK860X_CHIP_ID_03,
+};
+
+struct rk860x_regulator_info {
+	struct udevice *dev;
+	/* IC Type and Rev */
+	int chip_id;
+	/* Voltage setting register */
+	unsigned int vol_reg;
+	unsigned int sleep_reg;
+	unsigned int en_reg;
+	unsigned int sleep_en_reg;
+	unsigned int mode_reg;
+	unsigned int vol_mask;
+	unsigned int mode_mask;
+	unsigned int n_voltages;
+	/* Voltage range and step(linear) */
+	unsigned int vsel_min;
+	unsigned int vsel_step;
+	struct gpio_desc vsel_gpio;
+	struct gpio_desc en_gpio;
+	unsigned int sleep_vsel_id;
+};
+
+static int rk860x_write(struct udevice *dev, uint reg, const uint8_t *buff,
+			int len)
+{
+	int ret;
+
+	ret = dm_i2c_write(dev, reg, buff, len);
+	if (ret) {
+		debug("%s: write reg 0x%02x failed, ret=%d\n",
+		      __func__, reg, ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int rk860x_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
+{
+	int ret;
+
+	ret = dm_i2c_read(dev, reg, buff, len);
+	if (ret) {
+		debug("%s: read reg 0x%02x failed, ret=%d\n",
+		      __func__, reg, ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+int rk860x_reg_read(struct udevice *dev, uint reg)
+{
+	u8 byte;
+	int ret;
+
+	debug("%s: reg=%x", __func__, reg);
+	ret = rk860x_read(dev, reg, &byte, 1);
+	debug(", value=%x, ret=%d\n", byte, ret);
+
+	return ret ? ret : byte;
+}
+
+int rk860x_reg_write(struct udevice *dev, uint reg, uint value)
+{
+	u8 byte = value;
+	int ret;
+
+	debug("%s: reg=%x, value=%x", __func__, reg, value);
+	ret = rk860x_write(dev, reg, &byte, 1);
+	debug(", ret=%d\n", ret);
+
+	return ret;
+}
+
+int  rk860x_clrsetbits(struct udevice *dev, uint reg, uint clr, uint set)
+{
+	u8 byte;
+	int ret;
+
+	ret = rk860x_reg_read(dev, reg);
+	if (ret < 0)
+		return ret;
+	byte = (ret & ~clr) | set;
+
+	return rk860x_reg_write(dev, reg, byte);
+}
+
+static int rk860x_regulator_set_enable(struct udevice *dev, bool enable)
+{
+	struct rk860x_regulator_info *priv = dev_get_priv(dev);
+	int val, sleep_vsel_id;
+
+	if (enable) {
+		val = VSEL_BUCK_EN;
+		sleep_vsel_id = !priv->sleep_vsel_id;
+	} else {
+		val = 0;
+		sleep_vsel_id = priv->sleep_vsel_id;
+	}
+
+	if (dm_gpio_is_valid(&priv->vsel_gpio)) {
+		dm_gpio_set_value(&priv->vsel_gpio, sleep_vsel_id);
+		return 0;
+	}
+	rk860x_clrsetbits(dev, priv->en_reg, VSEL_BUCK_EN, val);
+
+	return 0;
+}
+
+static int rk860x_regulator_get_enable(struct udevice *dev)
+{
+	struct rk860x_regulator_info *priv = dev_get_priv(dev);
+	int val;
+
+	if (dm_gpio_is_valid(&priv->vsel_gpio)) {
+		if (priv->sleep_vsel_id)
+			return !dm_gpio_get_value(&priv->vsel_gpio);
+		else
+			return dm_gpio_get_value(&priv->vsel_gpio);
+	}
+
+	val = rk860x_reg_read(dev, priv->en_reg);
+	if (val & VSEL_BUCK_EN)
+		return 1;
+	else
+		return 0;
+}
+
+static int rk860x_regulator_set_suspend_enable(struct udevice *dev,
+					       bool enable)
+{
+	struct rk860x_regulator_info *priv = dev_get_priv(dev);
+	int val;
+
+	if (enable)
+		val = VSEL_BUCK_EN;
+	else
+		val = 0;
+
+	rk860x_clrsetbits(dev, priv->sleep_en_reg, VSEL_BUCK_EN, val);
+
+	return 0;
+}
+
+static int rk860x_regulator_get_suspend_enable(struct udevice *dev)
+{
+	struct rk860x_regulator_info *priv = dev_get_priv(dev);
+	int val;
+
+	val = rk860x_reg_read(dev, priv->sleep_en_reg);
+	if (val & VSEL_BUCK_EN)
+		return 1;
+	else
+		return 0;
+}
+
+static int rk860x_regulator_get_voltage(struct udevice *dev)
+{
+	struct rk860x_regulator_info *priv = dev_get_priv(dev);
+	int uvolt = 0, val;
+
+	val = rk860x_reg_read(dev, priv->vol_reg);
+	val &= priv->vol_mask;
+	uvolt = (val * priv->vsel_step) + priv->vsel_min;
+
+	return uvolt;
+}
+
+static int rk860x_regulator_set_voltage(struct udevice *dev, int uvolt)
+{
+	struct rk860x_regulator_info *priv = dev_get_priv(dev);
+	int val;
+
+	val = ((uvolt - priv->vsel_min) / priv->vsel_step);
+	rk860x_clrsetbits(dev, priv->vol_reg, priv->vol_mask, val);
+
+	return 0;
+}
+
+static int rk860x_regulator_get_suspend_voltage(struct udevice *dev)
+{
+	struct rk860x_regulator_info *priv = dev_get_priv(dev);
+	int uvolt = 0, val;
+
+	val = rk860x_reg_read(dev, priv->sleep_reg);
+	val &= priv->vol_mask;
+	uvolt = (val * priv->vsel_step) + priv->vsel_min;
+
+	return uvolt;
+}
+
+static int rk860x_regulator_set_suspend_voltage(struct udevice *dev,
+						int uvolt)
+{
+	struct rk860x_regulator_info *priv = dev_get_priv(dev);
+	int val;
+
+	val = ((uvolt - priv->vsel_min) / priv->vsel_step);
+	rk860x_clrsetbits(dev, priv->sleep_reg, priv->vol_mask, val);
+
+	return 0;
+}
+
+/* For 00,01 options:
+ * VOUT = 0.7125V + NSELx * 12.5mV, from 0.7125 to 1.5V.
+ * For 02,03 options:
+ * VOUT = 0.5V + NSELx * 6.25mV, from 0.5 to 1.5V.
+ */
+static int rk860x_device_setup(struct rk860x_regulator_info *di)
+{
+	int ret = 0;
+
+	switch (di->chip_id) {
+	case RK860X_CHIP_ID_00:
+	case RK860X_CHIP_ID_01:
+		di->vsel_min = 712500;
+		di->vsel_step = 12500;
+		di->n_voltages = RK860X_NVOLTAGES_64;
+		di->vol_mask = VSEL_A_NSEL_MASK;
+		if (di->sleep_vsel_id) {
+			di->sleep_reg = RK860X_VSEL1_A;
+			di->vol_reg = RK860X_VSEL0_A;
+			di->mode_reg = RK860X_VSEL0_A;
+			di->en_reg = RK860X_VSEL0_A;
+			di->sleep_en_reg = RK860X_VSEL1_A;
+		} else {
+			di->sleep_reg = RK860X_VSEL0_A;
+			di->vol_reg = RK860X_VSEL1_A;
+			di->mode_reg = RK860X_VSEL1_A;
+			di->en_reg = RK860X_VSEL1_A;
+			di->sleep_en_reg = RK860X_VSEL0_A;
+		}
+		break;
+	case RK860X_CHIP_ID_02:
+	case RK860X_CHIP_ID_03:
+		di->vsel_min = 500000;
+		di->vsel_step = 6250;
+		di->n_voltages = RK860X_NVOLTAGES_160;
+		di->vol_mask = VSEL_B_NSEL_MASK;
+		if (di->sleep_vsel_id) {
+			di->sleep_reg = RK860X_VSEL1_B;
+			di->vol_reg = RK860X_VSEL0_B;
+			di->mode_reg = RK860X_VSEL0_A;
+			di->en_reg = RK860X_VSEL0_A;
+			di->sleep_en_reg = RK860X_VSEL1_A;
+		} else {
+			di->sleep_reg = RK860X_VSEL0_B;
+			di->vol_reg = RK860X_VSEL1_B;
+			di->mode_reg = RK860X_VSEL1_A;
+			di->en_reg = RK860X_VSEL1_A;
+			di->sleep_en_reg = RK860X_VSEL0_A;
+		}
+		break;
+	default:
+		dev_err(di->dev,
+			"Chip ID %d not supported!\n",
+			di->chip_id);
+		return -EINVAL;
+	}
+
+	di->mode_mask = VSEL_MODE;
+
+	return ret;
+}
+
+static int rk860x_regulator_ofdata_to_platdata(struct udevice *dev)
+{
+	struct rk860x_regulator_info *priv = dev_get_priv(dev);
+	int ret;
+
+	priv->sleep_vsel_id = dev_read_u32_default(dev,
+						   "rockchip,suspend-voltage-selector",
+						   1);
+
+	ret = gpio_request_by_name(dev, "vsel-gpios", 0,
+				   &priv->vsel_gpio, GPIOD_IS_OUT);
+	if (ret)
+		dev_err(dev, "vsel-gpios- not found! Error: %d\n", ret);
+
+	if (dm_gpio_is_valid(&priv->vsel_gpio))
+		dm_gpio_set_value(&priv->vsel_gpio, !priv->sleep_vsel_id);
+
+	ret = gpio_request_by_name(dev, "en-gpios", 0,
+				   &priv->en_gpio, GPIOD_IS_OUT);
+	if (ret)
+		dev_err(dev, "en-gpios- not found! Error: %d\n", ret);
+
+	if (dm_gpio_is_valid(&priv->en_gpio))
+		dm_gpio_set_value(&priv->en_gpio, 1);
+
+	return 0;
+}
+
+static int rk860x_regulator_probe(struct udevice *dev)
+{
+	struct rk860x_regulator_info *di = dev_get_priv(dev);
+	struct dm_regulator_uclass_platdata *uc_pdata;
+	u8 val;
+	int ret;
+
+	uc_pdata = dev_get_uclass_platdata(dev);
+	uc_pdata->type = REGULATOR_TYPE_BUCK;
+	uc_pdata->mode_count = 0;
+
+	/* Get chip ID */
+	val = rk860x_reg_read(dev, RK860X_ID1);
+	if (val < 0) {
+		dev_err(dev, "Failed to get chip ID!\n");
+		return val;
+	}
+	if ((val & DIE_ID) == 0x8)
+		di->chip_id = RK860X_CHIP_ID_00;
+	else
+		di->chip_id = RK860X_CHIP_ID_02;
+
+	debug("RK860X Option[%d] Detected!\n", val & DIE_ID);
+
+	/* Device init */
+	ret = rk860x_device_setup(di);
+	if (ret < 0) {
+		dev_err(dev, "Failed to setup device!\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+static const struct udevice_id rk860x_id[] = {
+	{
+		.compatible = "rockchip,rk860x",
+	},
+	{ },
+};
+
+static const struct dm_regulator_ops rk860x_regulator_ops = {
+	.get_value  = rk860x_regulator_get_voltage,
+	.set_value  = rk860x_regulator_set_voltage,
+	.set_suspend_value = rk860x_regulator_set_suspend_voltage,
+	.get_suspend_value = rk860x_regulator_get_suspend_voltage,
+	.set_enable = rk860x_regulator_set_enable,
+	.get_enable = rk860x_regulator_get_enable,
+	.set_suspend_enable = rk860x_regulator_set_suspend_enable,
+	.get_suspend_enable = rk860x_regulator_get_suspend_enable,
+};
+
+U_BOOT_DRIVER(rk860x_regulator) = {
+	.name = "rk860x_regulator",
+	.id = UCLASS_REGULATOR,
+	.ops = &rk860x_regulator_ops,
+	.probe = rk860x_regulator_probe,
+	.of_match = rk860x_id,
+	.ofdata_to_platdata = rk860x_regulator_ofdata_to_platdata,
+	.priv_auto_alloc_size = sizeof(struct rk860x_regulator_info),
+};
+

commit ff06e2a5e708b41585eb4e144fdbd610307fa815
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 26 02:50:55 2021 +0000

    common: image: fix ramdisk length calculation error
    
    Fix kernel error:
    "rootfs image is not initramfs (junk in compressed archive); looks like an initrd"
    
    Fixes: (39bac65552 common: android: Add android header v4 support)
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ia74a112a7b7d0c6caf37ca5f985074bdaefb5035

diff --git a/common/image-android.c b/common/image-android.c
index 6cdee3a548..96eb0c32c0 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -251,11 +251,15 @@ int android_image_get_ramdisk(const struct andr_img_hdr *hdr,
 	}
 
 	*rd_data = ramdisk_addr_r;
-	*rd_len = hdr->ramdisk_size +
-		  hdr->vendor_ramdisk_size +
-		  hdr->vendor_bootconfig_size +
+	*rd_len = hdr->ramdisk_size;
+	if (hdr->header_version >= 3)
+		*rd_len += hdr->vendor_ramdisk_size;
+	if (hdr->header_version >= 4) {
+		 *rd_len += hdr->vendor_bootconfig_size +
 		  ANDROID_ADDITION_BOOTCONFIG_PARAMS_MAX_SIZE;
+	}
 
+	/* just for print msg */
 	start = ramdisk_addr_r;
 	if (hdr->header_version >= 3) {
 		end = start + (ulong)hdr->vendor_ramdisk_size;

commit 2fb449a618f0aa229f94b208d9a381301714349a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu May 6 17:26:41 2021 +0800

    cmd: add "tftpupdate" command
    
    Support update a set of images organized with FIT via
    network using TFTP protocol.
    
    Example:
      => tftpupdate                 // update all default images
      => tftpupdate recovery        // update recovery partition images only
    
    Example with server directory:
      => tftpupdate image:*         // update all default images
      => tftpupdate image:          // update all default images
      => tftpupdate image:recovery  // update recovery partition images only
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I4258fee63399a288333dc81a8347997bdbbe9831

diff --git a/cmd/Kconfig b/cmd/Kconfig
index b892e9efee..051d3955fc 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1103,6 +1103,12 @@ config CMD_TFTP_FLASH
 	help
 	  TFTP flash command, download and flash the Image to partition.
 
+config CMD_TFTP_UPDATE
+	bool "tftp update"
+	help
+	  Update a set of images organized with FIT via network using TFTP protocol
+
+
 config CMD_TFTPSRV
 	bool "tftpsrv"
 	help
diff --git a/cmd/Makefile b/cmd/Makefile
index 6b29c0047d..7fe7a95cb6 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -135,6 +135,7 @@ obj-$(CONFIG_CMD_SPI) += spi.o
 obj-$(CONFIG_CMD_STRINGS) += strings.o
 obj-$(CONFIG_CMD_TERMINAL) += terminal.o
 obj-$(CONFIG_CMD_TIME) += time.o
+obj-$(CONFIG_CMD_TFTP_UPDATE) += tftp_update.o
 obj-$(CONFIG_CMD_TRACE) += trace.o
 obj-$(CONFIG_HUSH_PARSER) += test.o
 obj-$(CONFIG_CMD_TPM) += tpm.o
diff --git a/cmd/tftp_update.c b/cmd/tftp_update.c
new file mode 100644
index 0000000000..58ed9007fe
--- /dev/null
+++ b/cmd/tftp_update.c
@@ -0,0 +1,761 @@
+/*
+ * (C) Copyright 2021 Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <boot_rkimg.h>
+#include <crypto.h>
+#include <dm.h>
+#include <sysmem.h>
+#include <u-boot/sha256.h>
+#ifdef CONFIG_ANDROID_AB
+#include <android_avb/avb_ops_user.h>
+#include <android_avb/rk_avb_ops_user.h>
+#endif
+#include <asm/arch/vendor.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define TFTPUD_I(fmt, args...)	printf("[TFTPUD]: "fmt, ##args)
+#define TFTPUD_E(fmt, args...)	printf("[TFTPUD-ERROR]: "fmt, ##args)
+
+#define UPDATE_HDR_FILE		"update.hdr"
+#define GPT_ENV_FILE		"gpt_env.txt"
+#define MAX_UPDATE_HEADER_SIZE	SZ_128K
+#define MAX_REMAIN_TRIES	3
+#define SHA256_HASH_SIZE	32
+
+struct update_header {
+	struct list_head images;
+	void *shared_buf;
+	u32 version;
+	u32 rollback_idx;
+	u32 lba_step;
+	u32 mb;
+	int force_update;
+	const char *spec_partition;
+};
+
+struct local_information {
+	u32 version;
+	u32 rollback_idx;
+	char current_slot[3];
+};
+
+struct image_element {
+	char file_name[32];
+	char part_name[32];
+	void *buf;
+	u32 size;	/* uint: byte */
+	u32 lba_start;
+	u32 lba_offset;
+	u32 lba_cnt;
+	u8 remain_tries;
+	int hash_noffset;
+	struct list_head node;
+};
+
+static struct update_header update_hdr;
+static struct local_information local_info;
+static const char *server_dir;
+
+static int tftpfw_version_set(u32 version)
+{
+	int ret;
+
+	ret = vendor_storage_write(FIRMWARE_VER_ID, &version, sizeof(version));
+
+	return ret < 0 ? ret : 0;
+}
+
+static u32 tftpfw_version_get(void)
+{
+	u32 version;
+	int ret;
+
+	ret = vendor_storage_read(FIRMWARE_VER_ID, &version, sizeof(version));
+	if (ret < 0) {
+		if (ret == -EINVAL) {
+			version = 0; /* first initial as 0 */
+			ret = tftpfw_version_set(version);
+			if (ret < 0)
+				return ret;
+		} else {
+			return ret;
+		}
+	}
+
+	return version;
+}
+
+static int tftp_download(void *addr, const char *file)
+{
+	char tftp_cmd[64];
+
+	if (server_dir)
+		snprintf(tftp_cmd, 64, "tftp 0x%lx %s/%s",
+				(ulong)addr, server_dir, file);
+	else
+		snprintf(tftp_cmd, 64, "tftp 0x%lx %s", (ulong)addr, file);
+
+	return run_command(tftp_cmd, 0);
+}
+
+static void update_cleanup(void *fit, struct update_header *hdr)
+{
+	struct image_element *e;
+	struct list_head *node;
+
+	list_for_each(node, &hdr->images) {
+		e = list_entry(node, struct image_element, node);
+		free(e);
+	}
+
+	if (hdr->shared_buf)
+		free((phys_addr_t)hdr->shared_buf);
+	if (fit)
+		free(fit);
+}
+
+static inline int is_gpt(const char *name)
+{
+	if (!name)
+		return 0;
+
+	return !strcmp(name, GPT_ENV_FILE);
+}
+
+static int update_populate_image(void *fit, struct update_header *hdr)
+{
+	struct blk_desc *dev_desc;
+	struct image_element *e;
+	disk_partition_t part;
+	const char *name, *dp;
+	const char *noseq_name;
+	char *last_part_name = NULL;
+	uint last_lba_offset = 0;
+	uint lba_offset;
+	int images, noffset;
+	int ret;
+
+	images = fdt_path_offset(fit, FIT_IMAGES_PATH);
+	if (images < 0)
+		return images;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc)
+		return -ENODEV;
+
+	fdt_for_each_subnode(noffset, fit, images) {
+		name = fit_get_name(fit, noffset, NULL);
+		printf("# %s:\n", name);
+
+		if (is_gpt(name))
+			continue;
+
+		e = malloc(sizeof(*e));
+		if (!e)
+			return -ENOMEM;
+
+		e->remain_tries = MAX_REMAIN_TRIES;
+		e->buf = hdr->shared_buf;
+		e->size = fdtdec_get_uint(fit, noffset, "data-size", -ENODATA);
+		if (e->size == -ENODATA)
+			return -ENODATA;
+
+		/* part name */
+		strcpy(e->file_name, name);
+		strcat(e->file_name, ".part.img");
+		noseq_name = strstr(name, "-");
+		if (!noseq_name)
+			return -EINVAL;
+		noseq_name++;
+		dp = strstr(noseq_name, "-");
+		if (!dp)
+			return -EINVAL;
+		dp++;
+		strlcpy(e->part_name, noseq_name, strlen(noseq_name) - strlen(dp));
+		ret = part_get_info_by_name_strict(dev_desc, e->part_name, &part);
+		if (ret < 0) {
+			TFTPUD_E("No partition '%s'\n", e->part_name);
+			return -EINVAL;
+		}
+
+		/* lba */
+		if (!strcmp(last_part_name, e->part_name))
+			lba_offset = last_lba_offset + hdr->lba_step;
+		else
+			lba_offset = 0;
+
+		e->lba_start = part.start;
+		e->lba_offset = lba_offset;
+		e->lba_cnt = DIV_ROUND_UP(e->size, 512);
+		e->hash_noffset = fdt_subnode_offset(fit, noffset, "hash");
+		if (e->hash_noffset < 0)
+			return e->hash_noffset;
+
+		list_add_tail(&e->node, &hdr->images);
+		last_part_name = e->part_name;
+		last_lba_offset = lba_offset;
+
+		printf("            file: %s\n", e->file_name);
+		printf("       partition: %s\n", e->part_name);
+		printf("             buf: 0x%08lx\n", (ulong)e->buf);
+		printf("            size: 0x%08x\n", e->size);
+		printf("       lba_start: 0x%08x\n", e->lba_start);
+		printf("      lba_offset: 0x%08x\n", e->lba_offset);
+		printf("         lba_cnt: 0x%08x\n", e->lba_cnt);
+		printf("    remain_tries: %d\n", e->remain_tries);
+		printf("    hash_noffset: 0x%08x\n\n", e->hash_noffset);
+	}
+
+	return 0;
+}
+
+static void *update_download_hdr(struct update_header *hdr)
+{
+	u32 filesz;
+	void *fit;
+
+	fit = memalign(ARCH_DMA_MINALIGN, MAX_UPDATE_HEADER_SIZE);
+	if (!fit)
+		return NULL;
+
+	if (tftp_download(fit, UPDATE_HDR_FILE)) {
+		free(fit);
+		return NULL;
+	}
+
+	if (fdt_check_header(fit)) {
+		TFTPUD_E("invalid update hdr magic\n");
+		free(fit);
+		return NULL;
+	}
+
+	/* sha256 csum was appended at the end of update.hdr */
+	filesz = env_get_ulong("filesize", 16, 0);
+	if ((fdt_totalsize(fit) + SHA256_HASH_SIZE) != filesz) {
+		TFTPUD_E("invalid sha256 hash at the tail of hdr\n");
+		return NULL;
+	}
+
+	return fit;
+}
+
+#ifndef CONFIG_FIT_SIGNATURE
+#ifdef CONFIG_DM_CRYPTO
+static void sha256_checksum(char *input, u32 input_len, u8 *output)
+{
+	sha_context csha_ctx;
+	struct udevice *dev;
+
+	dev = crypto_get_device(CRYPTO_SHA256);
+	if (!dev) {
+		TFTPUD_E("No crypto device\n");
+		return;
+	}
+	csha_ctx.algo = CRYPTO_SHA256;
+	csha_ctx.length = input_len;
+	crypto_sha_csum(dev, &csha_ctx, (char *)input, input_len, output);
+}
+#else
+static void sha256_checksum(char *input, u32 input_len, u8 *output)
+{
+	sha256_csum((const uchar *)input, input_len, output);
+}
+#endif
+
+static int hdr_checksum_verify(void *fit, struct update_header *hdr)
+{
+	u8 *hash, csum[SHA256_HASH_SIZE];
+	int ret, i;
+
+	hash = (u8 *)fit + fdt_totalsize(fit);
+	sha256_checksum(fit, fdt_totalsize(fit), csum);
+	ret = memcmp(hash, csum, SHA256_HASH_SIZE) ? -EINVAL : 0;
+	if (ret) {
+		printf(" update.hash: ");
+		for (i = 0; i < SHA256_HASH_SIZE; i++)
+			printf("%02x", hash[i]);
+		printf("\n");
+
+		printf(" calculate hash: ");
+		for (i = 0; i < SHA256_HASH_SIZE; i++)
+			printf("%02x", csum[i]);
+		printf("\n");
+	}
+
+	return ret;
+}
+#endif
+
+static void print_hdr_local(struct update_header *hdr,
+			    struct local_information *local)
+{
+	printf("# Server:\n");
+	printf("         version: %d\n", hdr->version);
+	printf("    rollback_idx: %d\n", hdr->rollback_idx);
+	printf("    force_update: %d\n", hdr->force_update);
+	printf("              MB: %d\n", hdr->mb);
+	printf("        lba_step: 0x%08x\n", hdr->lba_step);
+	printf("      shared_buf: 0x%08lx - 0x%08lx\n",
+	       (ulong)hdr->shared_buf, (ulong)hdr->shared_buf + hdr->mb * SZ_1M);
+	printf("  spec_partition: %s\n\n", hdr->spec_partition);
+
+	printf("# Local:\n");
+	printf("         version: %d\n", local->version);
+	printf("    rollback_idx: %d\n", local->rollback_idx);
+	printf("    current_slot: %s\n", local->current_slot);
+	printf("\n");
+}
+
+static int hdr_param_verify(void *fit, struct update_header *hdr,
+			    struct local_information *local, int conf)
+{
+	u32 size;
+	int ret;
+
+	/* remote */
+	hdr->version = fdtdec_get_uint(fit, 0, "version", 0);
+	hdr->rollback_idx = fdtdec_get_uint(fit, conf, "rollback-index", 0);
+	hdr->force_update = fdtdec_get_uint(fit, conf, "force_update", 0);
+	hdr->mb = fdtdec_get_uint(fit, conf, "image-size-MB", 0);
+	size = hdr->mb * SZ_1M;
+	hdr->lba_step = size / 512;
+	/* TODO: use sysmem alloc/free */
+	hdr->shared_buf = malloc(size);
+	if (!hdr->shared_buf)
+		return -ENOMEM;
+
+	/* local */
+	ret = tftpfw_version_get();
+	if (ret < 0) {
+		TFTPUD_E("Failed to get local firmware version, ret=%d\n", ret);
+		return local->version;
+	}
+	local->version = ret;
+#ifdef CONFIG_FIT_ROLLBACK_PROTECT
+	u32 remote_rollback_idx;
+
+	ret = fit_rollback_index_verify(fit, FIT_ROLLBACK_INDEX,
+					&remote_rollback_idx, &local->rollback_idx);
+	if (ret) {
+		TFTPUD_E("Failed to get local rollback-index, ret=%d\n", ret);
+		return ret;
+	}
+#else
+	local->rollback_idx = -1;
+#endif
+#ifdef CONFIG_ANDROID_AB
+	ret = rk_avb_get_current_slot(local->current_slot);
+	if (ret) {
+		TFTPUD_E("Failed to get local current slot, ret=%d\n", ret);
+		return ret;
+	}
+#else
+	strcpy(local->current_slot, "-");
+#endif
+
+	print_hdr_local(hdr, local);
+
+	/* verify */
+	if (hdr->force_update) {
+		TFTPUD_I("Remote requires force upgrade !\n");
+		return 0;
+	}
+	if (hdr->version < local->version) {
+		TFTPUD_E("Invalid firmware version: %d(remote) < %d(local)\n",
+			 hdr->version, local->version);
+		return -EINVAL;
+	}
+#ifdef CONFIG_FIT_ROLLBACK_PROTECT
+	if (remote_rollback_idx < local->rollback_idx) {
+		TFTPUD_E("Invalid rollback-index: %d(remote) < %d(local)\n",
+			 remote_rollback_idx, local->rollback_idx);
+		return -EINVAL;
+	}
+#endif
+
+	return 0;
+}
+
+static int update_verify_hdr(void *fit, struct update_header *hdr,
+			     struct local_information *local)
+{
+	const char *name;
+	int noffset;
+	int conf;
+	int ret;
+
+	noffset = fdt_path_offset(fit, FIT_CONFS_PATH);
+	name = fdt_getprop(fit, noffset, "default", NULL);
+	conf = fdt_subnode_offset(fit, noffset, name);
+	if (conf < 0)
+		return conf;
+
+#ifdef CONFIG_FIT_SIGNATURE
+	/* Secure: verify signature */
+	ret = fit_config_verify(fit, conf);
+	if (ret)
+		return ret;
+
+	TFTPUD_I("hdr signature verified\n");
+#else
+	/* Non-secure: verify hash */
+	ret = hdr_checksum_verify(fit, hdr);
+	if (ret)
+		return ret;
+
+	TFTPUD_I("hdr checksum verified\n");
+#endif
+	/* verify rollback index ..., etc */
+	ret = hdr_param_verify(fit, hdr, local, conf);
+	if (ret)
+		return ret;
+
+	TFTPUD_I("hdr param verified\n");
+
+	return 0;
+}
+
+static int update_local_info(void *fit, struct update_header *hdr)
+{
+	int ret;
+
+	TFTPUD_I("Update local information... ");
+
+	ret = tftpfw_version_set(hdr->version);
+	if (ret) {
+		TFTPUD_E("Update local param FAIL, ret=%d\n", ret);
+		return ret;
+	}
+	printf("fw_version=%d ", hdr->version);
+
+#ifdef CONFIG_FIT_ROLLBACK_PROTECT
+	ret = fit_write_trusty_rollback_index(hdr->rollback_idx);
+	if (ret)
+		return ret;
+	printf("rollback_idx=%d ", hdr->rollback_idx);
+#endif
+	printf("\n");
+
+	return 0;
+}
+
+static int update_ignore_image(void *fit, struct update_header *hdr,
+			       struct image_element *e)
+{
+#ifdef CONFIG_ANDROID_AB
+	char *slot_suffix;
+
+	/* Android A/B skip current slot */
+	slot_suffix = (char *)e->part_name + strlen(e->part_name) - 2;
+	if (!strcmp(hdr->current_slot, slot_suffix))
+		return 1;
+#endif
+	/* try to find expected target partition */
+	if (hdr->spec_partition && strcmp(e->part_name, hdr->spec_partition))
+		return 1;
+
+	return 0;
+}
+
+static int download_image(void *fit, struct image_element *e)
+{
+	ulong fileaddr;
+	ulong filesize;
+	char *msg = "";
+	int ret;
+
+	/* download */
+	printf("[TFTPUD-0]: download \"%s\" at 0x%lx\n",
+	       e->file_name, (ulong)e->buf);
+
+	ret = tftp_download(e->buf, e->file_name);
+	if (ret)
+		return ret;
+
+	fileaddr = env_get_ulong("fileaddr", 16, 0);
+	filesize = env_get_ulong("filesize", 16, 0);
+	if (!fileaddr || !filesize) {
+		TFTPUD_E("No fileaddr and filesize\n");
+		return -ENOENT;
+	}
+
+	if (filesize != e->size) {
+		TFTPUD_E("Expected filesize 0x%08lx != 0x%08x\n", filesize, e->size);
+		return -EINVAL;
+	}
+
+	/* verify */
+	printf("[TFTPUD-1]: verify ");
+	ret = fit_image_check_hash(fit, e->hash_noffset, e->buf, e->size, &msg);
+	printf("[%s]\n", ret ? "-" : "+");
+
+	return ret;
+}
+
+static int update_flash_image(struct image_element *e)
+{
+	struct blk_desc *dev_desc;
+	int ret;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		TFTPUD_E("No boot device\n");
+		return -ENODEV;
+	}
+
+	printf("[TFTPUD-2]: Flash to \"%s\" partition at LBA offset 0x%08x, "
+	       "with 0x%08x sectors ... ",
+	       e->part_name, e->lba_offset, e->lba_cnt);
+
+	if (dev_desc->if_type == IF_TYPE_MTD) {
+		dev_desc->op_flag |= BLK_MTD_CONT_WRITE;
+		ret = blk_dwrite(dev_desc, e->lba_start + e->lba_offset,
+				 e->lba_cnt, (void *)e->buf);
+		dev_desc->op_flag &= ~(BLK_MTD_CONT_WRITE);
+	} else {
+		ret = blk_dwrite(dev_desc, e->lba_start + e->lba_offset,
+				 e->lba_cnt, (void *)e->buf);
+	}
+
+	if (ret != e->lba_cnt)
+		printf("Failed(%d)\n\n\n", ret);
+	else
+		printf("OK\n\n\n");
+
+	return 0;
+}
+
+static int update_download_image(void *fit, struct image_element *e)
+{
+	int i, ret;
+
+	for (i = 0; i < e->remain_tries; i++) {
+		ret = download_image(fit, e);
+		if (!ret)
+			return 0;
+
+		TFTPUD_E("retry-%d download\n", i);
+		continue;
+	}
+
+	return -ENODATA;
+}
+
+static int update_write_gpt(void *fit, struct update_header *hdr)
+{
+	struct image_element *e;
+	char *gpt_parts, *p;
+	const char *name;
+	int images;
+	int noffset;
+	int ret = 0;
+
+	images = fdt_path_offset(fit, FIT_IMAGES_PATH);
+	if (images < 0)
+		return images;
+
+	noffset = fdt_first_subnode(fit, images);
+	if (noffset < 0)
+		return noffset;
+
+	/* gpt must be the 1st node */
+	name = fit_get_name(fit, noffset, NULL);
+	if (!is_gpt(name))
+		return 0;
+
+	e = malloc(sizeof(*e));
+	if (!e)
+		return -ENOMEM;
+
+	e->remain_tries = MAX_REMAIN_TRIES;
+	e->buf = hdr->shared_buf;
+	e->size = fdtdec_get_uint(fit, noffset, "data-size", -ENODATA);
+	if (e->size == -ENODATA) {
+		ret = -EINVAL;
+		goto out;
+	}
+
+	strcpy(e->file_name, name);
+	e->hash_noffset = fdt_subnode_offset(fit, noffset, "hash");
+	if (e->hash_noffset < 0)
+		return e->hash_noffset;
+
+	printf("\n# %s:\n", e->file_name);
+	printf("             buf: 0x%08lx\n", (ulong)e->buf);
+	printf("            size: 0x%08x\n", e->size);
+	printf("    remain_tries: %d\n", e->remain_tries);
+	printf("    hash_noffset: 0x%08x\n\n", e->hash_noffset);
+
+	/* download */
+	ret = update_download_image(fit, e);
+	if (ret) {
+		TFTPUD_E("\"%s\" download fail, ret=%d\n",
+			 e->file_name, ret);
+		goto out;
+	}
+
+	/* terminate gpt string */
+	gpt_parts = (char *)e->buf;
+	p = gpt_parts + e->size - 1;
+	*p = '\0';
+
+	/* write */
+	printf("[TFTPUD-2]: Write gpt ...\n");
+	printf("    %s\n\n", gpt_parts);
+	env_set("gpt_parts", gpt_parts);
+	ret = run_command("gpt write ${devtype} ${devnum} ${gpt_parts}", 0);
+	if (ret) {
+		printf("Failed to write gpt\n");
+		ret = -EIO;
+		goto out;
+	}
+	ret = run_command("gpt verify ${devtype} ${devnum} ${gpt_parts}", 0);
+	if (ret) {
+		printf("Failed to verify gpt\n");
+		ret = -EIO;
+		goto out;
+	}
+	printf("\n");
+out:
+	free(e);
+
+	return ret;
+}
+
+static int do_tftp_update(cmd_tbl_t *cmdtp, int flag,
+			  int argc, char * const argv[])
+{
+	struct local_information *local = &local_info;
+	struct update_header *hdr = &update_hdr;
+	struct image_element *e;
+	struct list_head *node;
+	const char *dir_part_str;
+	const char *part_str;
+	const char *dir_str;
+	char *dup_str = NULL;
+	u32 total_success = 0;
+	u32 total_traverse = 0;
+	ulong start_ms;
+	ulong total_ms;
+	void *fit;
+	int ret;
+
+	start_ms = get_timer(0);
+	memset(hdr, 0, sizeof(*hdr));
+	memset(local, 0, sizeof(*local));
+
+	/* only handle a single partititon ? */
+	if (argc > 1) {
+		dir_part_str = argv[1];
+		part_str = strchr(dir_part_str, ':');
+		if (part_str) {
+			/*
+			 * eg: tftpupdate image:recovery
+			 *     tftpupdate image:*
+			 *     tftpupdate image:
+			 */
+			dup_str = strdup(dir_part_str);
+			dup_str[part_str - dir_part_str] = 0;
+			dir_str = dup_str;
+			part_str++;
+			if (*part_str == '*')
+				part_str = NULL;
+		} else {
+			/* eg: tftpupdate recovery */
+			dir_str = NULL;
+			part_str = argv[1];
+		}
+	} else {
+		dir_str = NULL;
+		part_str = NULL;
+	}
+
+	server_dir = dir_str;
+	hdr->spec_partition = part_str;
+	INIT_LIST_HEAD(&hdr->images);
+
+	fit = update_download_hdr(hdr);
+	if (!fit) {
+		TFTPUD_E("download hdr fail\n");
+		ret = -EINVAL;
+		goto out;
+	}
+
+	ret = update_verify_hdr(fit, hdr, local);
+	if (ret) {
+		TFTPUD_E("verify hdr fail, ret=%d\n", ret);
+		goto out;
+	}
+
+	/* flash gpt table early than any other partition */
+	ret = update_write_gpt(fit, hdr);
+	if (ret) {
+		TFTPUD_E("write gpt fail, ret=%d\n", ret);
+		goto out;
+	}
+
+	ret = update_populate_image(fit, hdr);
+	if (ret) {
+		TFTPUD_E("populate image fail, ret=%d\n", ret);
+		goto out;
+	}
+
+	list_for_each(node, &hdr->images) {
+		e = list_entry(node, struct image_element, node);
+		total_traverse++;
+
+		/* ignore ? */
+		if (update_ignore_image(fit, hdr, e))
+			continue;
+
+		ret = update_download_image(fit, e);
+		if (ret) {
+			TFTPUD_E("\"%s\" download fail, ret=%d\n",
+				 e->file_name, ret);
+			goto out;
+		}
+
+		ret = update_flash_image(e);
+		if (ret) {
+			TFTPUD_E("\"%s\" flash fail, ret=%d\n",
+				 e->file_name, ret);
+			goto out;
+		}
+
+		total_success++;
+	}
+
+	if (total_success == 0) {
+		if (hdr->spec_partition) {
+			TFTPUD_E("No %s partition was found\n", hdr->spec_partition);
+			ret = CMD_RET_FAILURE;
+		}
+		goto out;
+	}
+
+	/* If this is full upgrade, update local info */
+	if (!hdr->spec_partition)
+		update_local_info(fit, hdr);
+out:
+	update_cleanup(fit, hdr);
+	if (!ret) {
+		total_ms = get_timer(start_ms);
+		TFTPUD_I("tftpupdate is OK (total time: %lds, upgrade: %d/%d), "
+			 "system reboot is recommend\n",
+			 total_ms / 1000, total_success, total_traverse);
+	}
+
+	return ret ? CMD_RET_FAILURE : CMD_RET_SUCCESS;
+}
+
+U_BOOT_CMD(
+	tftpupdate, 2, 1, do_tftp_update,
+	"Update a set of images organized with FIT via network using TFTP protocol",
+	"[[server-dir:][partition]"
+);
+

commit 15dc9023b9d606663bf0e4592aa79442310f0541
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 1 19:56:35 2021 +0800

    scripts: add script to generate tftp update firmware
    
    Example:
      ./scripts/build-tftp-firmware.sh --image image/ --size-MB 4
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I21647e91de591dbd8949c2cce43a0bfbaf8c4549

diff --git a/scripts/build-tftp-firmware.sh b/scripts/build-tftp-firmware.sh
new file mode 100755
index 0000000000..af2492c5da
--- /dev/null
+++ b/scripts/build-tftp-firmware.sh
@@ -0,0 +1,292 @@
+#!/bin/bash
+#
+# Copyright (c) 2021 Rockchip Electronics Co., Ltd
+# SPDX-License-Identifier: GPL-2.0
+#
+# The script to generate splited image and update.hdr for TFTP image upgrade.
+# 1. U-Boot have limited tftp download buffer, we have to split images into pieces for download
+# 2. Use FIT mechanism to record image pieces information in update.hdr: order, hash, signature, etc.
+# 3. The TFTP client download update.hdr and verify it (if need)
+# 4. The TFTP client download => verify => flash image pieces accorrding to update.hdr.
+#
+
+set -e
+
+HDR_SIZE=0x10000 # 64KB
+ARG_VERSION=0
+ARG_ROLLBACK_IDX=0
+ARG_FORCE_UPDATE=0
+SUFFIX=".part.img"
+GPT="gpt_env.txt"
+
+function help()
+{
+	echo
+	echo "Usage:"
+	echo "    $0 --image <dir> --size-MB <size> [optional args]"
+	echo
+	echo "    Mandory args:"
+	echo "        --image <dir>:    directory of image to upgrade"
+	echo "        --size-MB <size>: MB size unit for image to split into pieces. In Decimal integer: 1, 2, 3 ..."
+	echo
+	echo "    Optional args:"
+	echo "        --sign:           sign firmware with RSA key-pair in \"./keys\" directory"
+	echo "        --rollback-index <index>: rollback index in Decimal integer. It depends on \"--sign\""
+	echo "        --force-update:   enable force upgrade"
+	echo "        --config <file>:  config file"
+	echo "        --version <ver>:  firmware version in Decimal integer"
+	echo "        --clean:          clean generated files"
+	echo
+}
+
+function check_decimal()
+{
+	if [ -z $1 ]; then
+		help
+		exit 1
+	fi
+
+	DECIMAL=`echo $1 |sed 's/[0-9]//g'`
+	if [ ! -z ${DECIMAL} ]; then
+		echo "ERROR: $1 is not decimal integer"
+		help
+		exit 1
+	fi
+}
+
+function process_args()
+{
+	while [ $# -gt 0 ]; do
+		case $1 in
+			--help|-help|help|--h|-h)
+				help
+				exit
+				;;
+			--force-update)
+				ARG_FORCE_UPDATE="1"
+				shift 1
+				;;
+			--image)
+				ARG_IMAGE_DIR=$2
+				OUTPUT_DIR=${ARG_IMAGE_DIR}/output
+				shift 2
+				;;
+			--config)
+				ARG_CONFIG_FILE=$2
+				if [ ! -f ${ARG_CONFIG_FILE} ]; then
+					echo "ERROR: No ${ARG_CONFIG_FILE}"
+					exit 1
+				fi
+				shift 2
+				;;
+			--rollback-index)
+				ARG_ROLLBACK_IDX=$2
+				check_decimal $2
+				shift 2
+				;;
+			--sign)
+				ARG_SIGN="y"
+				shift 1
+				;;
+			--size-MB)
+				ARG_IMG_MB=$2
+				check_decimal $2
+				shift 2
+				;;
+			--version)
+				ARG_VERSION=$2
+				check_decimal $2
+				shift 2
+				;;
+			--clean)
+				rm -f *${SUFFIX} *.itb *.its *.dtb *.dts data2sign* *.hdr *.hash orderlist.txt
+				exit 0
+				;;
+			*)
+				echo "Invalid arg: $1"
+				help
+				exit 1
+				;;
+		esac
+	done
+
+	if [ -z ${ARG_IMG_MB} ]; then
+		help
+		exit 1
+	elif [ -z ${ARG_IMAGE_DIR} ]; then
+		help
+		exit 1
+	elif [ ! -d ${ARG_IMAGE_DIR} ]; then
+		echo "ERROR: No directory ${ARG_IMAGE_DIR}"
+		exit 1
+	fi
+
+	if [ "${ARG_SIGN}" == "y" ]; then
+		if [ ! -f keys/dev.key ]; then
+			echo "ERROR: No keys/dev.key"
+			exit 1
+		elif [ ! -f keys/dev.crt ]; then
+			echo "ERROR: No keys/dev.crt"
+			exit 1
+		fi
+	else
+		ARG_ROLLBACK_IDX=0
+	fi
+}
+
+function split_image()
+{
+	rm -rf ${OUTPUT_DIR}
+
+	if [ "${ARG_CONFIG_FILE}" ]; then
+		cp ${ARG_CONFIG_FILE} orderlist.txt
+	else
+		ls ${ARG_IMAGE_DIR} > orderlist.txt
+	fi
+
+	SEQ=0
+	cat orderlist.txt | while read IMAGE
+	do
+		if [ "${IMAGE}" == "${GPT}" ]; then
+			continue;
+		fi
+
+		NAME=`echo ${IMAGE} | awk -F "." '{ print $1 }'`
+		echo "=> split: ${IMAGE}"
+		if [ ! -f ${ARG_IMAGE_DIR}/${IMAGE} ]; then
+			echo "ERROR: No ${ARG_IMAGE_DIR}/${IMAGE}"
+			exit 1
+		fi
+
+		if [ ${SEQ} -lt 10 ]; then
+			SEQ_NAME="seq0${SEQ}-${NAME}"
+		else
+			SEQ_NAME="seq${SEQ}-${NAME}"
+		fi
+
+		split -b ${ARG_IMG_MB}M ${ARG_IMAGE_DIR}/${IMAGE} ${SEQ_NAME}- -d --additional-suffix=${SUFFIX}
+		SEQ=`expr ${SEQ} + 1`
+		ls ${SEQ_NAME}-*
+	done
+	echo
+}
+
+function gen_its()
+{
+cat > update.its << EOF
+/*
+ * Copyright (C) 2021 Rockchip Electronic Co.,Ltd
+ *
+ */
+
+/dts-v1/;
+
+/ {
+	description = "FIT Image with ATF/OP-TEE/U-Boot";
+	#address-cells = <1>;
+
+	images {
+EOF
+	if [ -f ${ARG_IMAGE_DIR}/${GPT} ]; then
+		cp ${ARG_IMAGE_DIR}/${GPT} ./
+		echo "		${GPT} {
+			data = /incbin/(\"./${GPT}\");
+			hash {
+				algo = \"sha256\";
+			};
+		};" >> update.its
+	fi
+
+	NUM=0
+	MAX=`ls -l *part* | wc -l`
+	for IMG in `ls -l *part* | awk '{ print $9 }'`
+	do
+		NAME=`echo ${IMG} | awk -F "." '{ print $1 }'`
+			echo "		${NAME} {
+			data = /incbin/(\"./${NAME}${SUFFIX}\");
+			hash {
+				algo = \"sha256\";
+			};
+		};" >> update.its
+
+		NUM=`expr ${NUM} + 1`
+		if [ ${NUM} -lt ${MAX} ]; then
+			FIRMWARES=${FIRMWARES}"\"${NAME}\", "
+		else
+			FIRMWARES=${FIRMWARES}"\"${NAME}\""
+			LAST_IMG=${NAME}
+		fi
+	done
+cat >> update.its << EOF
+	};
+
+	configurations {
+		default = "conf";
+		conf {
+			rollback-index = <${ARG_ROLLBACK_IDX}>;
+			force-update = <${ARG_FORCE_UPDATE}>;
+			image-size-MB = <${ARG_IMG_MB}>;
+			firmware = ${FIRMWARES};
+			signature {
+				algo = "sha256,rsa2048";
+				padding = "pss";
+				key-name-hint = "dev";
+				sign-images = "firmware";
+			};
+		};
+	};
+};
+EOF
+}
+
+function gen_update_hdr()
+{
+	# generate itb
+	if [ "${ARG_SIGN}" == "y" ]; then
+		# create a temporary dtb to store public-key, just for mkimage work normal.
+		SIGNED="signed"
+		cp update.its key.its
+		sed -i "/data =/d" key.its
+		dtc -I dts -O dtb key.its -o key.dtb
+
+		./mkimage -f update.its -k keys/ -K key.dtb -E -p ${HDR_SIZE} -r update.itb -v ${ARG_VERSION}
+		./fit_check_sign -f update.itb -k key.dtb
+	else
+		SIGNED="no-signed"
+		./mkimage -f update.its -E -p ${HDR_SIZE} update.itb -v ${ARG_VERSION}
+	fi
+
+	fdtdump update.itb > update.hdr.dts
+
+	# validate update.hdr
+	if [ "${ARG_SIGN}" == "y" ]; then
+		NUM=`grep "${LAST_IMG}" update.hdr.dts  | wc -l`
+		if [ ${NUM} -lt 3 ]; then
+			echo "ERROR: mkimage can't makeup full \"hashed-nodes\" property list"
+			exit 1
+		fi
+	fi
+
+	# Remove binary from update.itb
+	BYTE=`sed -n "/totalsize:/p" update.hdr.dts  | awk '{ print $4 }' | tr -d '(' | tr -d ')'`
+	dd if=update.itb of=update.hdr bs=${BYTE} count=1
+
+	# Append checksum
+	openssl dgst -sha256 -binary -out update.hash update.hdr
+	cat update.hash >> update.hdr
+
+	rm -f *.itb *.its *.dtb *.dts data2sign* *.hash orderlist.txt
+	mkdir -p ${OUTPUT_DIR}
+	ls ${GPT} >/dev/null 2>&1 && mv ${GPT} ${OUTPUT_DIR}
+	mv -f *${SUFFIX} update.hdr ${OUTPUT_DIR}
+
+	echo
+	echo "Success: [${SIGNED}] TFTP upgrade images(unit: ${ARG_IMG_MB}MB) are ready in directory: ${OUTPUT_DIR}."
+	echo
+}
+
+###############################################################
+process_args $*
+split_image
+gen_its
+gen_update_hdr

commit 919741c56b970acc7080e318f49e0718d1d408a0
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue May 18 15:54:15 2021 +0800

    tools: image-host: support sign all images
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I59d59d0321e402d65fd877a572cac17254df27be

diff --git a/tools/image-host.c b/tools/image-host.c
index f3e193cc53..e8e53baa77 100644
--- a/tools/image-host.c
+++ b/tools/image-host.c
@@ -437,9 +437,11 @@ static int fit_config_get_hash_list(void *fit, int conf_noffset,
 		int noffset;
 		int image_noffset;
 		int hash_count;
-		int i;
+		int i, max_index;
 
-		for (i = 0; i < 5; i++) {
+		max_index = fdt_stringlist_count(fit, conf_noffset, iname);
+
+		for (i = 0; i < max_index; i++) {
 			image_noffset =
 				fit_conf_get_prop_node_index(fit, conf_noffset,
 							     iname, i);

commit 46695f436e15bdd7430cc457651b6f10cfb3c072
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon May 10 16:43:30 2021 +0800

    disk: part: add part_get_info_by_name_strict()
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ib9ea544d5eaabb4c0340ba4212cdea3d4018c6a0

diff --git a/disk/part.c b/disk/part.c
index fb5e0dc057..116a1ae796 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -679,8 +679,10 @@ cleanup:
  * this takes over the responsibility of slot suffix appending from
  * developer to framework.
  */
-int part_get_info_by_name(struct blk_desc *dev_desc, const char *name,
-			  disk_partition_t *info)
+static int part_get_info_by_name_option(struct blk_desc *dev_desc,
+					const char *name,
+					disk_partition_t *info,
+					bool strict)
 {
 	struct part_driver *part_drv;
 	char name_slot[32] = {0};
@@ -690,11 +692,19 @@ int part_get_info_by_name(struct blk_desc *dev_desc, const char *name,
 	part_drv = part_driver_lookup_type(dev_desc);
 	if (!part_drv)
 		return -1;
+
+	if (strict) {
+		none_slot_try = 0;
+		strcpy(name_slot, name);
+		goto lookup;
+	}
+
 #if defined(CONFIG_ANDROID_AB) || defined(CONFIG_SPL_AB)
 	char *name_suffix = (char *)name + strlen(name) - 2;
 
 	/* Fix can not find partition with suffix "_a" & "_b". If with them, clear */
-	if (!memcmp(name_suffix, "_a", strlen("_a")) || !memcmp(name_suffix, "_b", strlen("_b")))
+	if (!memcmp(name_suffix, "_a", strlen("_a")) ||
+	    !memcmp(name_suffix, "_b", strlen("_b")))
 		memset(name_suffix, 0, 2);
 #endif
 #if defined(CONFIG_ANDROID_AB) && !defined(CONFIG_SPL_BUILD)
@@ -707,7 +717,7 @@ int part_get_info_by_name(struct blk_desc *dev_desc, const char *name,
 #else
 	strcpy(name_slot, name);
 #endif
-retry:
+lookup:
 	debug("## Query partition(%d): %s\n", none_slot_try, name_slot);
 	for (i = 1; i < part_drv->max_entries; i++) {
 		ret = part_drv->get_info(dev_desc, i, info);
@@ -725,12 +735,24 @@ retry:
 	if (none_slot_try) {
 		none_slot_try = 0;
 		strcpy(name_slot, name);
-		goto retry;
+		goto lookup;
 	}
 
 	return -1;
 }
 
+int part_get_info_by_name(struct blk_desc *dev_desc, const char *name,
+			  disk_partition_t *info)
+{
+	return part_get_info_by_name_option(dev_desc, name, info, false);
+}
+
+int part_get_info_by_name_strict(struct blk_desc *dev_desc, const char *name,
+				 disk_partition_t *info)
+{
+	return part_get_info_by_name_option(dev_desc, name, info, true);
+}
+
 void part_set_generic_name(const struct blk_desc *dev_desc,
 	int part_num, char *name)
 {
diff --git a/include/part.h b/include/part.h
index 53806d9673..1ae8d49d9a 100644
--- a/include/part.h
+++ b/include/part.h
@@ -192,6 +192,20 @@ int blk_get_device_part_str(const char *ifname, const char *dev_part_str,
 int part_get_info_by_name(struct blk_desc *dev_desc,
 			      const char *name, disk_partition_t *info);
 
+/**
+ * part_get_info_by_name_strict() - Search for a partition by name
+ *                                  among all available registered partitions
+ *				    with strict name match
+ *
+ * @param dev_desc - block device descriptor
+ * @param gpt_name - the specified table entry name to be match strictly
+ * @param info - returns the disk partition info
+ *
+ * @return - the partition number on match (starting on 1), -1 on no match,
+ * otherwise error
+ */
+int part_get_info_by_name_strict(struct blk_desc *dev_desc, const char *name,
+				 disk_partition_t *info);
 /**
  * part_set_generic_name() - create generic partition like hda1 or sdb2
  *

commit e9f9d90defb36c84651e25a062b92135208b6e6a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 8 21:05:47 2021 +0800

    rockchip: board: export fit_write_trusty_rollback_index()
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I7394fab8a62a4095e30bd54b0dfc2c7c26751b03

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index e09c80f518..42b2d50fdf 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -966,7 +966,7 @@ int fit_read_otp_rollback_index(uint32_t fit_index, uint32_t *otp_index)
 	return 0;
 }
 
-static int fit_write_trusty_rollback_index(u32 trusty_index)
+int fit_write_trusty_rollback_index(u32 trusty_index)
 {
 	if (!trusty_index)
 		return 0;
diff --git a/include/boot_rkimg.h b/include/boot_rkimg.h
index 0de6f27c6d..4e9643b3b1 100644
--- a/include/boot_rkimg.h
+++ b/include/boot_rkimg.h
@@ -70,6 +70,7 @@ void setup_download_mode(void);
 int get_bcb_recovery_msg(void);
 int rockchip_read_dtb_file(void *fdt_addr);
 int init_kernel_dtb(void);
+int fit_write_trusty_rollback_index(u32 trusty_index);
 
 #ifndef CONFIG_SPL_BUILD
 int rockchip_get_boot_mode(void);

commit 293eaf75e50f310a5acf954e7da8ce5d0e17eed9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 8 21:06:29 2021 +0800

    rockchip: vendor: add id FIRMWARE_VER_ID
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I8f919e3c3b2afd381a129ce16cf557f99e2b285f

diff --git a/arch/arm/include/asm/arch-rockchip/vendor.h b/arch/arm/include/asm/arch-rockchip/vendor.h
index 72c3909e36..d04f87ed41 100644
--- a/arch/arm/include/asm/arch-rockchip/vendor.h
+++ b/arch/arm/include/asm/arch-rockchip/vendor.h
@@ -23,6 +23,7 @@
 #define IMEI_ID				15
 #define LAN_RGMII_DL_ID			16
 #define EINK_VCOM_ID			17
+#define FIRMWARE_VER_ID			18
 
 struct vendor_item {
 	u16  id;

commit f1804cef88f58c2d32dad3b47f6f6c5b8233750d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 4 18:52:04 2020 +0800

    cmd: source: add fit config verify
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I55ab1c8a4ac2adac1679623e79952f6d858ae6fc

diff --git a/cmd/source.c b/cmd/source.c
index 45e9794b2f..6b1c8b744b 100644
--- a/cmd/source.c
+++ b/cmd/source.c
@@ -40,9 +40,12 @@ source (ulong addr, const char *fit_uname)
 	size_t		fit_len;
 #endif
 #if defined(CONFIG_IMAGE_FORMAT_LEGACY) || defined(CONFIG_FIT)
+#ifdef CONFIG_FIT_SIGNATURE
+	int		verify = 1;
+#else
 	int		verify = env_get_yesno("verify");
 #endif
-
+#endif
 	buf = map_sysmem(addr, 0);
 	switch (genimg_get_format(buf)) {
 #if defined(CONFIG_IMAGE_FORMAT_LEGACY)
@@ -114,6 +117,19 @@ source (ulong addr, const char *fit_uname)
 
 		/* verify integrity */
 		if (verify) {
+#ifdef CONFIG_FIT_SIGNATURE
+			int conf_noffset;
+
+			/* NULL for default conf */
+			conf_noffset = fit_conf_get_node(fit_hdr, NULL);
+			if (conf_noffset < 0)
+				return conf_noffset;
+
+			if (fit_config_verify(fit_hdr, conf_noffset)) {
+				puts ("Bad Data Hash\n");
+				return 1;
+			}
+#endif
 			if (!fit_image_verify(fit_hdr, noffset)) {
 				puts ("Bad Data Hash\n");
 				return 1;

commit 23926ae74622a2732e0fbe5236d06a5cb91fbdd8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 12 03:40:55 2021 +0000

    misc: decompress: support non-cacheline align decompress address
    
    Some decompress hardware requires aligned dst address as align
    to 0x10 (eg. rv1126).
    
    The cacheline align is quite typical and common for address align
    in the most time, so use cacheline align in this generic layer
    which covers 0x10 align.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I4730cd01a3cdc5463183472bb706b07d1a6ad724

diff --git a/drivers/misc/misc_decompress.c b/drivers/misc/misc_decompress.c
index 95709244b3..5711d94070 100644
--- a/drivers/misc/misc_decompress.c
+++ b/drivers/misc/misc_decompress.c
@@ -185,6 +185,8 @@ int misc_decompress_process(unsigned long dst, unsigned long src,
 			    u64 *size, u32 flags)
 {
 	struct udevice *dev;
+	ulong dst_org = dst;
+	u64 dst_size = 0;
 	int ret;
 
 	dev = misc_decompress_get_device(cap);
@@ -196,6 +198,16 @@ int misc_decompress_process(unsigned long dst, unsigned long src,
 	if (ret)
 		return ret;
 
+	/*
+	 * Check if ARCH_DMA_MINALIGN aligned, otherwise use sync action
+	 * for output data memcpy.
+	 */
+	if (!IS_ALIGNED(dst, ARCH_DMA_MINALIGN)) {
+		dst_org = dst;
+		dst = ALIGN(dst, ARCH_DMA_MINALIGN);
+		sync = true;
+	}
+
 	ret = misc_decompress_start(dev, dst, src, src_len, flags);
 	if (ret)
 		return ret;
@@ -210,8 +222,15 @@ int misc_decompress_process(unsigned long dst, unsigned long src,
 		ret = misc_decompress_finish(dev, cap);
 		if (ret)
 			return ret;
-		if (size)
-			ret = misc_decompress_data_size(dev, size, cap);
+
+		if (size || (dst != dst_org)) {
+			ret = misc_decompress_data_size(dev, &dst_size, cap);
+			if (size)
+				*size = dst_size;
+			if (dst != dst_org)
+				memcpy((char *)dst_org,
+				       (const char *)dst, dst_size);
+		}
 	} else {
 		if (size)
 			*size = misc_get_data_size(src, src_len, cap);

commit facb0dcf23458fbc3ac91ca77c60a5017a2311b4
Author: Nico Cheng <nico.cheng@rock-chips.com>
Date:   Tue Oct 19 09:22:47 2021 +0800

    rk3568: configs: modified the dfu partition info
    
    We modified the mtd partition table of rk3568 to support DFU upgrade
    under A/B system.
    
    Signed-off-by: Nico Cheng <nico.cheng@rock-chips.com>
    Change-Id: I4d6541c0c01ff299211b5b7c6ea8cb5713b635b5

diff --git a/include/configs/evb_rk3568.h b/include/configs/evb_rk3568.h
index 93fe42e91e..f7318c3816 100644
--- a/include/configs/evb_rk3568.h
+++ b/include/configs/evb_rk3568.h
@@ -34,6 +34,21 @@
 	"rootfs part 0 3;" \
 	"userdata part 0 4\0"
 
+#ifdef CONFIG_ANDROID_AB
+#define DFU_ALT_BOOT_MTD_A \
+	"gpt raw 0x0 0x20000;" \
+	"loader raw 0x20000 0xE0000;"\
+	"vnvm part vnvm;" \
+	"uboot part uboot;" \
+	"boot raw 0x700000 0x600000\0"
+
+#define DFU_ALT_BOOT_MTD_B \
+	"gpt raw 0x0 0x20000;" \
+	"loader raw 0x20000 0xE0000;"\
+	"vnvm part vnvm;" \
+	"uboot part uboot;" \
+	"boot raw 0xd00000 0x600000\0"
+#else
 #define DFU_ALT_BOOT_MTD \
 	"gpt raw 0x0 0x20000;" \
 	"loader raw 0x20000 0xE0000;"\
@@ -43,5 +58,6 @@
 	"rootfs partubi rootfs;" \
 	"userdata partubi userdata\0"
 
+#endif /* CONFIG_ANDROID_AB */
 #endif /* CONFIG_SPL_BUILD */
 #endif /* __CONFIGS_RK3568_EVB_H */

commit 616512094d71a34e94b252502458f1933326fe6a
Author: Nico Cheng <nico.cheng@rock-chips.com>
Date:   Fri Oct 22 10:00:10 2021 +0800

    rk3568: configs: fix compilation error
    
    Fix rk3568 compilation error when enabling the CONFIG_ANDROID_AB
    configuration.
    
    Signed-off-by: Nico Cheng <nico.cheng@rock-chips.com>
    Change-Id: I642f90afb21a7f36da6f78e6a83c5fcb3c862770

diff --git a/include/configs/evb_rk3568.h b/include/configs/evb_rk3568.h
index d16fd53711..93fe42e91e 100644
--- a/include/configs/evb_rk3568.h
+++ b/include/configs/evb_rk3568.h
@@ -22,7 +22,10 @@
 #undef CONFIG_BOOTCOMMAND
 #define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
 
+#ifdef CONFIG_USB_FUNCTION_DFU
 #define CONFIG_SET_DFU_ALT_INFO
+#endif
+
 #define DFU_ALT_BOOT_EMMC \
 	"gpt raw 0x0 0x20000;" \
 	"loader raw 0x20000 0xE0000;"\
@@ -42,4 +45,3 @@
 
 #endif /* CONFIG_SPL_BUILD */
 #endif /* __CONFIGS_RK3568_EVB_H */
-
diff --git a/include/configs/evb_rv1126.h b/include/configs/evb_rv1126.h
index 93930535cb..43bc7853f4 100644
--- a/include/configs/evb_rv1126.h
+++ b/include/configs/evb_rv1126.h
@@ -36,7 +36,10 @@
 #define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
 #endif
 
+#ifdef CONFIG_USB_FUNCTION_DFU
 #define CONFIG_SET_DFU_ALT_INFO
+#endif
+
 #define DFU_ALT_BOOT_EMMC \
 	"gpt raw 0x0 0x20000;" \
 	"loader raw 0x20000 0xE0000;"\

commit 1f2844703dde5114d36272065123e5c519f3c11c
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Thu Oct 21 16:28:55 2021 +0800

    lib: optee_clientApi: data alignment with cache line size
    
    Change-Id: I96fbfe3aced28dc460a2a0c35a7367b086525425
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/OpteeClientRkFs_v1.c b/lib/optee_clientApi/OpteeClientRkFs_v1.c
index 3f21f00cfe..6de89c1e84 100644
--- a/lib/optee_clientApi/OpteeClientRkFs_v1.c
+++ b/lib/optee_clientApi/OpteeClientRkFs_v1.c
@@ -136,7 +136,7 @@ static int check_security_exist(int print_flag)
  */
 static int rkss_begin_commit(void)
 {
-	unsigned char data[RKSS_DATA_SECTION_LEN];
+	unsigned char *data = NULL;
 	struct rkss_backup_verification p;
 	unsigned long ret;
 
@@ -148,10 +148,16 @@ static int rkss_begin_commit(void)
 	p.backup_enable = RKSS_BACKUP_ENABLE;
 	p.backup_count = 0;
 
-	memset(data, 0, sizeof(data));
+	data = memalign(CONFIG_SYS_CACHELINE_SIZE, RKSS_DATA_SECTION_LEN);
+	if (!data) {
+		printf("TEEC: malloc data fail\n");
+		return -1;
+	}
+	memset(data, 0, RKSS_DATA_SECTION_LEN);
 	memcpy(data, &p, sizeof(p));
 
 	ret = blk_dwrite(dev_desc, part_info.start + RKSS_BACKUP_INDEX, 1, data);
+	free(data);
 	if (ret != 1) {
 		printf("TEEC: blk_dwrite fail\n");
 		return -1;
@@ -161,16 +167,22 @@ static int rkss_begin_commit(void)
 
 static int rkss_finish_commit(void)
 {
-	unsigned char data[RKSS_DATA_SECTION_LEN];
+	unsigned char *data = NULL;
 	unsigned long ret;
 
 	if (check_security_exist(1) < 0)
 		return -1;
 
 	debug("TEEC: %s\n", __func__);
-	memset(data, 0, sizeof(data));
+	data = memalign(CONFIG_SYS_CACHELINE_SIZE, RKSS_DATA_SECTION_LEN);
+	if (!data) {
+		printf("TEEC: malloc data fail\n");
+		return -1;
+	}
+	memset(data, 0, RKSS_DATA_SECTION_LEN);
 
 	ret = blk_dwrite(dev_desc, part_info.start + RKSS_BACKUP_INDEX, 1, data);
+	free(data);
 	if (ret != 1) {
 		printf("TEEC: blk_dwrite fail\n");
 		return -1;
@@ -180,7 +192,7 @@ static int rkss_finish_commit(void)
 
 static int rkss_backup_sections(unsigned long index, unsigned int num)
 {
-	unsigned char data[RKSS_DATA_SECTION_LEN];
+	unsigned char *data = NULL;
 	unsigned char *backup_data = NULL;
 	struct rkss_backup_verification p;
 	struct rkss_backup_info info_last, info_current;
@@ -189,10 +201,15 @@ static int rkss_backup_sections(unsigned long index, unsigned int num)
 	if (check_security_exist(1) < 0)
 		return -1;
 
+	data = memalign(CONFIG_SYS_CACHELINE_SIZE, RKSS_DATA_SECTION_LEN);
+	if (!data) {
+		printf("TEEC: malloc data fail\n");
+		goto error;
+	}
 	ret = blk_dread(dev_desc, part_info.start + RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
 		printf("TEEC: blk_dread fail\n");
-		return -1;
+		goto error;
 	}
 
 	memcpy(&p, data, sizeof(p));
@@ -222,7 +239,7 @@ static int rkss_backup_sections(unsigned long index, unsigned int num)
 		debug("TEEC: %s index=0x%lx num=0x%x backup_data_index=0x%x\n",
 		      __func__, index, num, info_current.backup_data_index);
 
-		backup_data = malloc(num * RKSS_DATA_SECTION_LEN);
+		backup_data = memalign(CONFIG_SYS_CACHELINE_SIZE, num * RKSS_DATA_SECTION_LEN);
 		if (!backup_data) {
 			printf("TEEC: malloc backup_data fail\n");
 			goto error;
@@ -231,17 +248,16 @@ static int rkss_backup_sections(unsigned long index, unsigned int num)
 		ret = blk_dread(dev_desc, part_info.start + index, num, backup_data);
 		if (ret != num) {
 			printf("TEEC: blk_dread fail\n");
-			return -1;
+			goto error;
 		}
 
 		ret = blk_dwrite(dev_desc, part_info.start + info_current.backup_data_index,
 				 num, backup_data);
 		if (ret != num) {
 			printf("TEEC: blk_dwrite fail\n");
-			return -1;
+			goto error;
 		}
 		free(backup_data);
-		backup_data = NULL;
 
 		p.backup_count += 1;
 
@@ -253,12 +269,15 @@ static int rkss_backup_sections(unsigned long index, unsigned int num)
 		ret = blk_dwrite(dev_desc, part_info.start + RKSS_BACKUP_INDEX, 1, data);
 		if (ret != 1) {
 			printf("TEEC: blk_dwrite fail\n");
-			return -1;
+			goto error;
 		}
 	}
-
+	free(data);
 	return 0;
+
 error:
+	if (data)
+		free(data);
 	if (backup_data)
 		free(backup_data);
 	return -1;
@@ -266,7 +285,7 @@ error:
 
 static int rkss_resume(void)
 {
-	unsigned char data[RKSS_DATA_SECTION_LEN];
+	unsigned char *data = NULL;
 	unsigned char *backup_data = NULL;
 	struct rkss_backup_verification p;
 	struct rkss_backup_info info_current;
@@ -276,10 +295,15 @@ static int rkss_resume(void)
 	if (check_security_exist(1) < 0)
 		return -1;
 
+	data = memalign(CONFIG_SYS_CACHELINE_SIZE, RKSS_DATA_SECTION_LEN);
+	if (!data) {
+		printf("TEEC: malloc data fail\n");
+		goto error;
+	}
 	ret = blk_dread(dev_desc, part_info.start + RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
 		printf("TEEC: blk_dread fail\n");
-		return -1;
+		goto error;
 	}
 
 	memcpy(&p, data, sizeof(p));
@@ -309,8 +333,9 @@ static int rkss_resume(void)
 					printf("TEEC: original sections error!");
 					goto error;
 				}
-				backup_data = malloc(info_current.backup_num *
-						     RKSS_DATA_SECTION_LEN);
+
+				backup_data = memalign(CONFIG_SYS_CACHELINE_SIZE,
+						       info_current.backup_num * RKSS_DATA_SECTION_LEN);
 				if (!backup_data) {
 					printf("TEEC: malloc backup_data fail\n");
 					goto error;
@@ -322,7 +347,7 @@ static int rkss_resume(void)
 						backup_data);
 				if (ret != info_current.backup_num) {
 					printf("TEEC: blk_dread fail\n");
-					return -1;
+					goto error;
 				}
 
 				ret = blk_dwrite(dev_desc,
@@ -331,21 +356,24 @@ static int rkss_resume(void)
 						 backup_data);
 				if (ret != info_current.backup_num) {
 					printf("TEEC: blk_dwrite fail\n");
-					return -1;
+					goto error;
 				}
 				free(backup_data);
-				backup_data = NULL;
 			}
 		}
 	}
-	memset(data, 0, sizeof(data));
+	memset(data, 0, RKSS_DATA_SECTION_LEN);
 	ret = blk_dwrite(dev_desc, part_info.start + RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
 		printf("TEEC: blk_dwrite fail\n");
-		return -1;
+		goto error;
 	}
+	free(data);
 	return 0;
+
 error:
+	if (data)
+		free(data);
 	if (backup_data)
 		free(backup_data);
 	return -1;
@@ -353,16 +381,25 @@ error:
 
 static int rkss_read_multi_sections(unsigned char *data, unsigned long index, unsigned int num)
 {
+	unsigned char *tmp_data = NULL;
 	unsigned long ret;
 
 	if (check_security_exist(1) < 0)
 		return -1;
 
-	ret = blk_dread(dev_desc, part_info.start + index, num, data);
+	tmp_data = memalign(CONFIG_SYS_CACHELINE_SIZE, num * RKSS_DATA_SECTION_LEN);
+	if (!tmp_data) {
+		printf("TEEC: malloc tmp_data fail\n");
+		return -1;
+	}
+	ret = blk_dread(dev_desc, part_info.start + index, num, tmp_data);
 	if (ret != num) {
 		printf("TEEC: blk_dread fail\n");
+		free(tmp_data);
 		return -1;
 	}
+	memcpy(data, tmp_data, num * RKSS_DATA_SECTION_LEN);
+	free(tmp_data);
 	return 0;
 }
 
@@ -373,6 +410,7 @@ static int rkss_read_section(struct rk_secure_storage *rkss)
 
 static int rkss_write_multi_sections(unsigned char *data, unsigned long index, unsigned int num)
 {
+	unsigned char *tmp_data = NULL;
 	unsigned long ret;
 	int result;
 
@@ -385,7 +423,14 @@ static int rkss_write_multi_sections(unsigned char *data, unsigned long index, u
 	if (check_security_exist(1) < 0)
 		return -1;
 
-	ret = blk_dwrite(dev_desc, part_info.start + index, num, data);
+	tmp_data = memalign(CONFIG_SYS_CACHELINE_SIZE, num * RKSS_DATA_SECTION_LEN);
+	if (!tmp_data) {
+		printf("TEEC: malloc tmp_data fail\n");
+		return -1;
+	}
+	memcpy(tmp_data, data, num * RKSS_DATA_SECTION_LEN);
+	ret = blk_dwrite(dev_desc, part_info.start + index, num, tmp_data);
+	free(tmp_data);
 	if (ret != num) {
 		printf("TEEC: blk_dwrite fail\n");
 		return -1;
@@ -401,15 +446,25 @@ static int rkss_write_section(struct rk_secure_storage *rkss)
 static int rkss_read_patition_tables(unsigned char *data)
 {
 	unsigned long ret;
+	unsigned char *table_data = NULL;
 
 	if (check_security_exist(1) < 0)
 		return -1;
 
-	ret = blk_dread(dev_desc, part_info.start, RKSS_PARTITION_TABLE_COUNT, data);
+	table_data = memalign(CONFIG_SYS_CACHELINE_SIZE,
+			      RKSS_DATA_SECTION_LEN * RKSS_PARTITION_TABLE_COUNT);
+	if (!table_data) {
+		printf("TEEC: malloc table_data fail\n");
+		return -1;
+	}
+	ret = blk_dread(dev_desc, part_info.start, RKSS_PARTITION_TABLE_COUNT, table_data);
 	if (ret != RKSS_PARTITION_TABLE_COUNT) {
 		printf("TEEC: blk_dread fail\n");
+		free(table_data);
 		return -1;
 	}
+	memcpy(data, table_data, RKSS_DATA_SECTION_LEN * RKSS_PARTITION_TABLE_COUNT);
+	free(table_data);
 	return 0;
 }
 
diff --git a/lib/optee_clientApi/OpteeClientRkFs_v2.c b/lib/optee_clientApi/OpteeClientRkFs_v2.c
index b8d6d45b8a..8a98c5a7dc 100644
--- a/lib/optee_clientApi/OpteeClientRkFs_v2.c
+++ b/lib/optee_clientApi/OpteeClientRkFs_v2.c
@@ -211,7 +211,7 @@ static int rkss_storage_delete(uint32_t area_index)
 
 	printf("TEEC: delete area index 0x%x!\n", area_index);
 	size = RKSS_SECTION_COUNT * RKSS_BACKUP_NUM * RKSS_DATA_LEN;
-	delete_buff = (uint8_t *)malloc(size);
+	delete_buff = (uint8_t *)memalign(CONFIG_SYS_CACHELINE_SIZE, size);
 	if (!delete_buff) {
 		printf("TEEC: Malloc failed!\n");
 		return -1;
@@ -785,7 +785,7 @@ static int rkss_storage_init(uint32_t area_index)
 
 	if (rkss_buffer[area_index] == NULL) {
 		/* Always use, no need to release */
-		rkss_buffer[area_index] = (uint8_t *)malloc(size);
+		rkss_buffer[area_index] = (uint8_t *)memalign(CONFIG_SYS_CACHELINE_SIZE, size);
 		if (!(rkss_buffer[area_index])) {
 			printf("TEEC: Malloc failed!\n");
 			return -1;
diff --git a/lib/optee_clientApi/OpteeClientRkNewFs_v1.c b/lib/optee_clientApi/OpteeClientRkNewFs_v1.c
index c258262cb9..ca606987ad 100644
--- a/lib/optee_clientApi/OpteeClientRkNewFs_v1.c
+++ b/lib/optee_clientApi/OpteeClientRkNewFs_v1.c
@@ -138,7 +138,7 @@ static int check_security_exist(int print_flag)
  */
 static int rkss_begin_commit(void)
 {
-	unsigned char data[RKSS_DATA_SECTION_LEN];
+	unsigned char *data = NULL;
 	struct rkss_backup_verification p;
 	unsigned long ret;
 
@@ -150,10 +150,16 @@ static int rkss_begin_commit(void)
 	p.backup_enable = RKSS_BACKUP_ENABLE;
 	p.backup_count = 0;
 
-	memset(data, 0, sizeof(data));
+	data = memalign(CONFIG_SYS_CACHELINE_SIZE, RKSS_DATA_SECTION_LEN);
+	if (!data) {
+		printf("TEEC: malloc data fail\n");
+		return -1;
+	}
+	memset(data, 0, RKSS_DATA_SECTION_LEN);
 	memcpy(data, &p, sizeof(p));
 
 	ret = blk_dwrite(dev_desc, part_info.start + RKSS_BACKUP_INDEX, 1, data);
+	free(data);
 	if (ret != 1) {
 		printf("TEEC: blk_dwrite fail\n");
 		return -1;
@@ -163,16 +169,22 @@ static int rkss_begin_commit(void)
 
 static int rkss_finish_commit(void)
 {
-	unsigned char data[RKSS_DATA_SECTION_LEN];
+	unsigned char *data = NULL;
 	unsigned long ret;
 
 	if (check_security_exist(1) < 0)
 		return -1;
 
 	debug("TEEC: %s\n", __func__);
-	memset(data, 0, sizeof(data));
+	data = memalign(CONFIG_SYS_CACHELINE_SIZE, RKSS_DATA_SECTION_LEN);
+	if (!data) {
+		printf("TEEC: malloc data fail\n");
+		return -1;
+	}
+	memset(data, 0, RKSS_DATA_SECTION_LEN);
 
 	ret = blk_dwrite(dev_desc, part_info.start + RKSS_BACKUP_INDEX, 1, data);
+	free(data);
 	if (ret != 1) {
 		printf("TEEC: blk_dwrite fail\n");
 		return -1;
@@ -182,7 +194,7 @@ static int rkss_finish_commit(void)
 
 static int rkss_backup_sections(unsigned long index, unsigned int num)
 {
-	unsigned char data[RKSS_DATA_SECTION_LEN];
+	unsigned char *data = NULL;
 	unsigned char *backup_data = NULL;
 	struct rkss_backup_verification p;
 	struct rkss_backup_info info_last, info_current;
@@ -191,10 +203,15 @@ static int rkss_backup_sections(unsigned long index, unsigned int num)
 	if (check_security_exist(1) < 0)
 		return -1;
 
+	data = memalign(CONFIG_SYS_CACHELINE_SIZE, RKSS_DATA_SECTION_LEN);
+	if (!data) {
+		printf("TEEC: malloc data fail\n");
+		goto error;
+	}
 	ret = blk_dread(dev_desc, part_info.start + RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
 		printf("TEEC: blk_dread fail\n");
-		return -1;
+		goto error;
 	}
 
 	memcpy(&p, data, sizeof(p));
@@ -224,7 +241,7 @@ static int rkss_backup_sections(unsigned long index, unsigned int num)
 		debug("TEEC: %s index=0x%lx num=0x%x backup_data_index=0x%x\n",
 		      __func__, index, num, info_current.backup_data_index);
 
-		backup_data = malloc(num * RKSS_DATA_SECTION_LEN);
+		backup_data = memalign(CONFIG_SYS_CACHELINE_SIZE, num * RKSS_DATA_SECTION_LEN);
 		if (!backup_data) {
 			printf("TEEC: malloc backup_data fail\n");
 			goto error;
@@ -233,17 +250,16 @@ static int rkss_backup_sections(unsigned long index, unsigned int num)
 		ret = blk_dread(dev_desc, part_info.start + index, num, backup_data);
 		if (ret != num) {
 			printf("TEEC: blk_dread fail\n");
-			return -1;
+			goto error;
 		}
 
 		ret = blk_dwrite(dev_desc, part_info.start + info_current.backup_data_index,
 				 num, backup_data);
 		if (ret != num) {
 			printf("TEEC: blk_dwrite fail\n");
-			return -1;
+			goto error;
 		}
 		free(backup_data);
-		backup_data = NULL;
 
 		p.backup_count += 1;
 
@@ -255,12 +271,15 @@ static int rkss_backup_sections(unsigned long index, unsigned int num)
 		ret = blk_dwrite(dev_desc, part_info.start + RKSS_BACKUP_INDEX, 1, data);
 		if (ret != 1) {
 			printf("TEEC: blk_dwrite fail\n");
-			return -1;
+			goto error;
 		}
 	}
-
+	free(data);
 	return 0;
+
 error:
+	if (data)
+		free(data);
 	if (backup_data)
 		free(backup_data);
 	return -1;
@@ -268,7 +287,7 @@ error:
 
 static int rkss_resume(void)
 {
-	unsigned char data[RKSS_DATA_SECTION_LEN];
+	unsigned char *data = NULL;
 	unsigned char *backup_data = NULL;
 	struct rkss_backup_verification p;
 	struct rkss_backup_info info_current;
@@ -278,10 +297,15 @@ static int rkss_resume(void)
 	if (check_security_exist(1) < 0)
 		return -1;
 
+	data = memalign(CONFIG_SYS_CACHELINE_SIZE, RKSS_DATA_SECTION_LEN);
+	if (!data) {
+		printf("TEEC: malloc data fail\n");
+		goto error;
+	}
 	ret = blk_dread(dev_desc, part_info.start + RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
 		printf("TEEC: blk_dread fail\n");
-		return -1;
+		goto error;
 	}
 
 	memcpy(&p, data, sizeof(p));
@@ -311,8 +335,8 @@ static int rkss_resume(void)
 					printf("TEEC: original sections error!");
 					goto error;
 				}
-				backup_data = malloc(info_current.backup_num *
-						     RKSS_DATA_SECTION_LEN);
+				backup_data = memalign(CONFIG_SYS_CACHELINE_SIZE,
+						       info_current.backup_num * RKSS_DATA_SECTION_LEN);
 				if (!backup_data) {
 					printf("TEEC: malloc backup_data fail\n");
 					goto error;
@@ -324,7 +348,7 @@ static int rkss_resume(void)
 						backup_data);
 				if (ret != info_current.backup_num) {
 					printf("TEEC: blk_dread fail\n");
-					return -1;
+					goto error;
 				}
 
 				ret = blk_dwrite(dev_desc,
@@ -333,21 +357,24 @@ static int rkss_resume(void)
 						 backup_data);
 				if (ret != info_current.backup_num) {
 					printf("TEEC: blk_dwrite fail\n");
-					return -1;
+					goto error;
 				}
 				free(backup_data);
-				backup_data = NULL;
 			}
 		}
 	}
-	memset(data, 0, sizeof(data));
+	memset(data, 0, RKSS_DATA_SECTION_LEN);
 	ret = blk_dwrite(dev_desc, part_info.start + RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
 		printf("TEEC: blk_dwrite fail\n");
-		return -1;
+		goto error;
 	}
+	free(data);
 	return 0;
+
 error:
+	if (data)
+		free(data);
 	if (backup_data)
 		free(backup_data);
 	return -1;
@@ -355,21 +382,31 @@ error:
 
 static int rkss_read_multi_sections(unsigned char *data, unsigned long index, unsigned int num)
 {
+	unsigned char *tmp_data = NULL;
 	unsigned long ret;
 
 	if (check_security_exist(1) < 0)
 		return -1;
 
-	ret = blk_dread(dev_desc, part_info.start + index, num, data);
+	tmp_data = memalign(CONFIG_SYS_CACHELINE_SIZE, num * RKSS_DATA_SECTION_LEN);
+	if (!tmp_data) {
+		printf("TEEC: malloc tmp_data fail\n");
+		return -1;
+	}
+	ret = blk_dread(dev_desc, part_info.start + index, num, tmp_data);
 	if (ret != num) {
 		printf("TEEC: blk_dread fail\n");
+		free(tmp_data);
 		return -1;
 	}
+	memcpy(data, tmp_data, num * RKSS_DATA_SECTION_LEN);
+	free(tmp_data);
 	return 0;
 }
 
 static int rkss_write_multi_sections(unsigned char *data, unsigned long index, unsigned int num)
 {
+	unsigned char *tmp_data = NULL;
 	unsigned long ret;
 	int result;
 
@@ -382,7 +419,14 @@ static int rkss_write_multi_sections(unsigned char *data, unsigned long index, u
 	if (check_security_exist(1) < 0)
 		return -1;
 
-	ret = blk_dwrite(dev_desc, part_info.start + index, num, data);
+	tmp_data = memalign(CONFIG_SYS_CACHELINE_SIZE, num * RKSS_DATA_SECTION_LEN);
+	if (!tmp_data) {
+		printf("TEEC: malloc tmp_data fail\n");
+		return -1;
+	}
+	memcpy(tmp_data, data, num * RKSS_DATA_SECTION_LEN);
+	ret = blk_dwrite(dev_desc, part_info.start + index, num, tmp_data);
+	free(tmp_data);
 	if (ret != num) {
 		printf("TEEC: blk_dwrite fail\n");
 		return -1;
@@ -393,15 +437,25 @@ static int rkss_write_multi_sections(unsigned char *data, unsigned long index, u
 static int rkss_read_patition_tables(unsigned char *data)
 {
 	unsigned long ret;
+	unsigned char *table_data = NULL;
 
 	if (check_security_exist(1) < 0)
 		return -1;
 
-	ret = blk_dread(dev_desc, part_info.start, RKSS_PARTITION_TABLE_COUNT, data);
+	table_data = memalign(CONFIG_SYS_CACHELINE_SIZE,
+			      RKSS_DATA_SECTION_LEN * RKSS_PARTITION_TABLE_COUNT);
+	if (!table_data) {
+		printf("TEEC: malloc table_data fail\n");
+		return -1;
+	}
+	ret = blk_dread(dev_desc, part_info.start, RKSS_PARTITION_TABLE_COUNT, table_data);
 	if (ret != RKSS_PARTITION_TABLE_COUNT) {
 		printf("TEEC: blk_dread fail\n");
+		free(table_data);
 		return -1;
 	}
+	memcpy(data, table_data, RKSS_DATA_SECTION_LEN * RKSS_PARTITION_TABLE_COUNT);
+	free(table_data);
 	return 0;
 }
 
diff --git a/lib/optee_clientApi/OpteeClientRkNewFs_v2.c b/lib/optee_clientApi/OpteeClientRkNewFs_v2.c
index 7bb950454d..ff34e4e52d 100644
--- a/lib/optee_clientApi/OpteeClientRkNewFs_v2.c
+++ b/lib/optee_clientApi/OpteeClientRkNewFs_v2.c
@@ -213,7 +213,7 @@ static int rkss_storage_delete(uint32_t area_index)
 
 	printf("TEEC: delete area index 0x%x!\n", area_index);
 	size = RKSS_SECTION_COUNT * RKSS_BACKUP_NUM * RKSS_DATA_LEN;
-	delete_buff = (uint8_t *)malloc(size);
+	delete_buff = (uint8_t *)memalign(CONFIG_SYS_CACHELINE_SIZE, size);
 	if (!delete_buff) {
 		printf("TEEC: Malloc failed!\n");
 		return -1;
@@ -788,7 +788,7 @@ static int rkss_storage_init(uint32_t area_index)
 
 	if (rkss_buffer[area_index] == NULL) {
 		/* Always use, no need to release */
-		rkss_buffer[area_index] = (uint8_t *)malloc(size);
+		rkss_buffer[area_index] = (uint8_t *)memalign(CONFIG_SYS_CACHELINE_SIZE, size);
 		if (!(rkss_buffer[area_index])) {
 			printf("TEEC: Malloc failed!\n");
 			return -1;

commit a0ea2d9244dc04b69a1aa5986dc133b45f4f2fc2
Author: Damon Ding <damon.ding@rock-chips.com>
Date:   Fri Oct 22 18:01:19 2021 +0800

    drm/rockchip: vop2: optimize the check of is_yuv_output
    
    Add more supported formats of is_yuv_output:
      MEDIA_BUS_FMT_YUYV8_2X8
      MEDIA_BUS_FMT_YVYU8_2X8
      MEDIA_BUS_FMT_UYVY8_2X8
      MEDIA_BUS_FMT_VYUY8_2X8
      MEDIA_BUS_FMT_YUYV8_1X16
      MEDIA_BUS_FMT_YVYU8_1X16
      MEDIA_BUS_FMT_UYVY8_1X16
      MEDIA_BUS_FMT_VYUY8_1X16
    
    Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
    Change-Id: I7bd4f736490bf3d7364d946caeb5135d440eedbb

diff --git a/drivers/video/drm/rockchip_vop2.c b/drivers/video/drm/rockchip_vop2.c
index 115952eeef..58bddfc03f 100644
--- a/drivers/video/drm/rockchip_vop2.c
+++ b/drivers/video/drm/rockchip_vop2.c
@@ -903,6 +903,14 @@ static bool is_yuv_output(u32 bus_format)
 	case MEDIA_BUS_FMT_YUV10_1X30:
 	case MEDIA_BUS_FMT_UYYVYY8_0_5X24:
 	case MEDIA_BUS_FMT_UYYVYY10_0_5X30:
+	case MEDIA_BUS_FMT_YUYV8_2X8:
+	case MEDIA_BUS_FMT_YVYU8_2X8:
+	case MEDIA_BUS_FMT_UYVY8_2X8:
+	case MEDIA_BUS_FMT_VYUY8_2X8:
+	case MEDIA_BUS_FMT_YUYV8_1X16:
+	case MEDIA_BUS_FMT_YVYU8_1X16:
+	case MEDIA_BUS_FMT_UYVY8_1X16:
+	case MEDIA_BUS_FMT_VYUY8_1X16:
 		return true;
 	default:
 		return false;

commit 65afc0201c411b38276a6059585815f2947c08bc
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 25 06:24:57 2021 +0000

    rockchip: rk3308: increase fdt space before fixup
    
    Fix return -FDT_ERR_NOSPACE.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I7e6d73fb514243ff70ce5a22a3ca712e1b5a277b

diff --git a/arch/arm/mach-rockchip/rk3308/rk3308.c b/arch/arm/mach-rockchip/rk3308/rk3308.c
index 1893eedae7..aed500db62 100644
--- a/arch/arm/mach-rockchip/rk3308/rk3308.c
+++ b/arch/arm/mach-rockchip/rk3308/rk3308.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <fdt_support.h>
 #include <ram.h>
 #include <asm/io.h>
 #include <asm/arch/boot_mode.h>
@@ -533,6 +534,7 @@ static int fdt_fixup_thermal_zones(const void *blob)
 int rk_board_fdt_fixup(const void *blob)
 {
 	if (soc_is_rk3308bs()) {
+		fdt_increase_size((void *)blob, SZ_8K);
 		fdt_fixup_cpu_idle(blob);
 		fdt_fixup_cpu_opp_table(blob);
 		fdt_fixup_dmc_opp_table(blob);

commit 1761a5331f716aa89df23e2a51bcade59b415c13
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Sep 8 09:48:53 2021 +0800

    rockchip: board: Add android header v4 support
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ic9690e29a5a4eafded140eb081a8576846637051

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index a84245cf92..e09c80f518 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -29,6 +29,7 @@
 #include <syscon.h>
 #include <sysmem.h>
 #include <video_rockchip.h>
+#include <xbc.h>
 #include <asm/io.h>
 #include <asm/gpio.h>
 #include <android_avb/rk_avb_ops_user.h>
@@ -1074,6 +1075,18 @@ char *board_fdt_chosen_bootargs(void *fdt)
 	if (gd->flags & GD_FLG_DISABLE_CONSOLE)
 		env_delete("bootargs", "earlycon=", 0);
 
+	/* Android header v4+ need this handle */
+#ifdef CONFIG_ANDROID_BOOT_IMAGE
+	struct andr_img_hdr *hdr;
+
+	hdr = (void *)env_get_ulong("android_addr_r", 16, 0);
+	if (hdr && !android_image_check_header(hdr) && hdr->header_version >= 4) {
+		if (env_update_extract_subset("bootargs", "andr_bootargs", "androidboot."))
+			printf("extract androidboot.xxx error\n");
+		if (dump)
+			printf("## bootargs(android): %s\n\n", env_get("andr_bootargs"));
+	}
+#endif
 	bootargs = env_get("bootargs");
 	if (dump)
 		printf("## bootargs(merged): %s\n\n", bootargs);
@@ -1081,3 +1094,81 @@ char *board_fdt_chosen_bootargs(void *fdt)
 	return (char *)bootargs;
 }
 
+int ft_verify_fdt(void *fdt)
+{
+	/* for android header v4+, we load bootparams and fixup initrd */
+#if defined(CONFIG_ANDROID_BOOT_IMAGE) && defined(CONFIG_XBC)
+	struct andr_img_hdr *hdr;
+	uint64_t initrd_start, initrd_end;
+	char *bootargs, *p;
+	int nodeoffset;
+	int is_u64, err;
+	u32 len;
+
+	hdr = (void *)env_get_ulong("android_addr_r", 16, 0);
+	if (!hdr || android_image_check_header(hdr) ||
+	    hdr->header_version < 4)
+		return 1;
+
+	bootargs = env_get("andr_bootargs");
+	if (!bootargs)
+		return 1;
+
+	/* trans character: space to new line */
+	p = bootargs;
+	while (*p++) {
+		if (*p == ' ')
+			*p = '\n';
+	}
+
+	debug("## andr_bootargs: %s\n", bootargs);
+
+	/*
+	 * add boot params right after bootconfig
+	 *
+	 * because we can get final full bootargs in board_fdt_chosen_bootargs(),
+	 * android_image_get_ramdisk() is early than that.
+	 *
+	 * we have to add boot params by now.
+	 */
+	len = addBootConfigParameters((char *)bootargs, strlen(bootargs),
+		(u64)hdr->ramdisk_addr + hdr->ramdisk_size +
+		hdr->vendor_ramdisk_size, hdr->vendor_bootconfig_size);
+	if (len < 0) {
+		printf("error: addBootConfigParameters\n");
+		return 0;
+	}
+
+	nodeoffset = fdt_subnode_offset(fdt, 0, "chosen");
+	if (nodeoffset < 0) {
+		printf("error: No /chosen node\n");
+		return 0;
+	}
+
+	/* fixup initrd with real value */
+	fdt_delprop(fdt, nodeoffset, "linux,initrd-start");
+	fdt_delprop(fdt, nodeoffset, "linux,initrd-end");
+
+	is_u64 = (fdt_address_cells(fdt, 0) == 2);
+	initrd_start = hdr->ramdisk_addr;
+	initrd_end = initrd_start + hdr->ramdisk_size +
+			hdr->vendor_ramdisk_size +
+			hdr->vendor_bootconfig_size + len;
+	err = fdt_setprop_uxx(fdt, nodeoffset, "linux,initrd-start",
+			      initrd_start, is_u64);
+	if (err < 0) {
+		printf("WARNING: could not set linux,initrd-start %s.\n",
+		       fdt_strerror(err));
+		return 0;
+	}
+	err = fdt_setprop_uxx(fdt, nodeoffset, "linux,initrd-end",
+			      initrd_end, is_u64);
+	if (err < 0) {
+		printf("WARNING: could not set linux,initrd-end %s.\n",
+		       fdt_strerror(err));
+		return 0;
+	}
+#endif
+	return 1;
+}
+
diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index ff21bd7252..1ae1503e8a 100644
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -308,8 +308,11 @@ static int read_dtb_from_android(struct blk_desc *dev_desc,
 		dtb_offset += ALIGN(hdr->recovery_dtbo_size, hdr->page_size) +
 			      ALIGN(hdr->second_size, hdr->page_size);
 		dtb_size = hdr->dtb_size;
-	} else if (hdr->header_version == 3) {
-		dtb_offset += ALIGN(VENDOR_BOOT_HDR_SIZE,
+	} else if (hdr->header_version >= 3) {
+		ulong vendor_boot_hdr_size = (hdr->header_version == 3) ?
+			VENDOR_BOOT_HDRv3_SIZE : VENDOR_BOOT_HDRv4_SIZE;
+
+		dtb_offset += ALIGN(vendor_boot_hdr_size,
 				    hdr->vendor_page_size) +
 			      ALIGN(hdr->vendor_ramdisk_size,
 				    hdr->vendor_page_size);
@@ -320,7 +323,7 @@ static int read_dtb_from_android(struct blk_desc *dev_desc,
 		return 0;
 
 	/*
-	 * boot_img_hdr_v2,3 feature.
+	 * boot_img_hdr_v234 feature.
 	 *
 	 * If dtb position is present, replace the old with new one if
 	 * we don't need to verify DTB hash from resource.img file entry.

commit 39bac655522c66c7a6bbcbec98dea0b34d069afd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Sep 6 15:09:42 2021 +0800

    common: android: Add android header v4 support
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If36fde370263147b70b2eded83724678aeab07f9

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index d967ec09d5..52d4d0131d 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -597,15 +597,15 @@ retry_verify:
 		hdr = (void *)slot_data[0]->loaded_partitions->data;
 
 		/*
-		 *		populate boot_img_hdr_v3
+		 *		populate boot_img_hdr_v34
 		 *
 		 * If allow verification error: the image is loaded by
 		 * ops->get_preloaded_partition() which auto populates
-		 * boot_img_hdr_v3.
+		 * boot_img_hdr_v34.
 		 *
 		 * If not allow verification error: the image is full loaded
 		 * by ops->read_from_partition() which doesn't populate
-		 * boot_img_hdr_v3, we need to fix it here.
+		 * boot_img_hdr_v34, we need to fix it here.
 		 */
 		if (hdr->header_version >= 3 &&
 		    !(flags & AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR)) {
@@ -820,16 +820,19 @@ int android_fdt_overlay_apply(void *fdt_addr)
 #endif
 
 	/*
-	 * recovery_dtbo fields
+	 * Google requires a/b system mandory from Android Header v3 for
+	 * google authentication, that means there is not recovery.
 	 *
-	 * boot_img_hdr_v0: unsupported
-	 * boot_img_hdr_v1,2: supported
-	 * boot_img_hdr_v3 + boot.img: supported
-	 * boot_img_hdr_v3 + recovery.img: unsupported
+	 * But for the products that don't care about google authentication,
+	 * it's not mandory to use a/b system. So that we use the solution:
+	 * boot.img(v3+) with recovery(v2).
+	 *
+	 * [recovery_dtbo fields]
+	 *	recovery.img with boot_img_hdr_v1,2:  supported
+	 *	recovery.img with boot_img_hdr_v0,3+: illegal
 	 */
 	if ((hdr->header_version == 0) ||
-	    (hdr->header_version == 3 && !strcmp(part_boot, PART_RECOVERY)) ||
-	    (hdr->header_version > 3))
+	    (hdr->header_version >= 3 && !strcmp(part_boot, PART_RECOVERY)))
 		goto out;
 
 	ret = android_get_dtbo(&fdt_dtbo, (void *)hdr, &index, part_dtbo);
diff --git a/common/image-android.c b/common/image-android.c
index fa9d119c7b..6cdee3a548 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -144,8 +144,9 @@ int android_image_get_kernel(const struct andr_img_hdr *hdr, int verify,
 	if (strlen(andr_tmp_str))
 		printf("Android's image name: %s\n", andr_tmp_str);
 
-	printf("Kernel load addr 0x%08x size %u KiB\n",
-	       kernel_addr, DIV_ROUND_UP(hdr->kernel_size, 1024));
+	printf("Kernel: 0x%08x - 0x%08x (%u KiB)\n",
+	       kernel_addr, kernel_addr + hdr->kernel_size,
+	       DIV_ROUND_UP(hdr->kernel_size, 1024));
 
 	int len = 0;
 	if (cmdline) {
@@ -207,7 +208,7 @@ ulong android_image_get_end(const struct andr_img_hdr *hdr)
 			end += ALIGN(hdr->dtb_size, hdr->page_size);
 		}
 	} else {
-		/* boot_img_hdr_v3 */
+		/* boot_img_hdr_v34 */
 		end += hdr->page_size;
 		end += ALIGN(hdr->kernel_size, hdr->page_size);
 		end += ALIGN(hdr->ramdisk_size, hdr->page_size);
@@ -235,6 +236,7 @@ int android_image_get_ramdisk(const struct andr_img_hdr *hdr,
 			      ulong *rd_data, ulong *rd_len)
 {
 	ulong ramdisk_addr_r;
+	ulong start, end;
 
 	if (!hdr->ramdisk_size) {
 		*rd_data = *rd_len = 0;
@@ -249,16 +251,33 @@ int android_image_get_ramdisk(const struct andr_img_hdr *hdr,
 	}
 
 	*rd_data = ramdisk_addr_r;
-	*rd_len = hdr->ramdisk_size;
-
-	printf("RAM disk load addr 0x%08lx ", *rd_data);
+	*rd_len = hdr->ramdisk_size +
+		  hdr->vendor_ramdisk_size +
+		  hdr->vendor_bootconfig_size +
+		  ANDROID_ADDITION_BOOTCONFIG_PARAMS_MAX_SIZE;
+
+	start = ramdisk_addr_r;
+	if (hdr->header_version >= 3) {
+		end = start + (ulong)hdr->vendor_ramdisk_size;
+		printf("v-ramdisk:  0x%08lx - 0x%08lx (%u KiB)\n",
+		       start, end, DIV_ROUND_UP(hdr->vendor_ramdisk_size, 1024));
+		start = end;
+	}
+	{
+		end = start + (ulong)hdr->ramdisk_size;
+		printf("ramdisk:    0x%08lx - 0x%08lx (%u KiB)\n",
+		       start, end, DIV_ROUND_UP(hdr->ramdisk_size, 1024));
+		start = end;
+	}
+	if (hdr->header_version >= 4) {
+		end = start + (ulong)hdr->vendor_bootconfig_size;
+		printf("bootconfig: 0x%08lx - 0x%08lx (%u KiB)\n",
+		       start, end, DIV_ROUND_UP(hdr->vendor_bootconfig_size, 1024));
+		start = end;
+		end = start + ANDROID_ADDITION_BOOTCONFIG_PARAMS_MAX_SIZE;
+		printf("bootparams: 0x%08lx - 0x%08lx\n", start, end);
+	}
 
-	if (hdr->header_version < 3)
-		printf("size %u KiB\n", DIV_ROUND_UP(hdr->ramdisk_size, 1024));
-	else
-		printf("size: boot %u KiB, vendor-boot %u KiB\n",
-		       DIV_ROUND_UP(hdr->boot_ramdisk_size, 1024),
-		       DIV_ROUND_UP(hdr->vendor_ramdisk_size, 1024));
 	return 0;
 }
 
@@ -307,6 +326,7 @@ typedef enum {
 	IMG_RK_DTB,	/* within resource.img in second position */
 	IMG_DTB,
 	IMG_VENDOR_RAMDISK,
+	IMG_BOOTCONFIG,
 	IMG_MAX,
 } img_t;
 
@@ -350,7 +370,7 @@ static int image_load(img_t img, struct andr_img_hdr *hdr,
 		pgsz = hdr->vendor_page_size;
 		ram_base = 0;
 
-		bsoffs = ALIGN(VENDOR_BOOT_HDR_SIZE, pgsz);
+		bsoffs = ALIGN(VENDOR_BOOT_HDRv3_SIZE, pgsz);
 		length = hdr->vendor_ramdisk_size;
 		buffer = (void *)env_get_ulong("ramdisk_addr_r", 16, 0);
 		blkcnt = DIV_ROUND_UP(hdr->vendor_ramdisk_size, blksz);
@@ -360,9 +380,14 @@ static int image_load(img_t img, struct andr_img_hdr *hdr,
 		 *
 		 * In case of unaligned vendor ramdisk size, reserve
 		 * 1 more blksz.
+		 *
+		 * Reserve 8KB for bootloader cmdline.
 		 */
-		if (hdr->header_version == 3)
-			extra = ALIGN(hdr->ramdisk_size, blksz) + blksz;
+		if (hdr->header_version >= 3)
+			extra += ALIGN(hdr->ramdisk_size, blksz) + blksz;
+		if (hdr->header_version >= 4)
+			extra += ALIGN(hdr->vendor_bootconfig_size, blksz) +
+				 ANDROID_ADDITION_BOOTCONFIG_PARAMS_MAX_SIZE;
 		if (length && !sysmem_alloc_base(MEM_RAMDISK,
 			(phys_addr_t)buffer, blkcnt * blksz + extra))
 			return -ENOMEM;
@@ -375,10 +400,20 @@ static int image_load(img_t img, struct andr_img_hdr *hdr,
 		typesz = sizeof(hdr->ramdisk_size);
 
 		/*
-		 * ramdisk_addr_r:
+		 * ramdisk_addr_r v012:
+		 *	|----------------|
+		 *	|    ramdisk     |
+		 *	|----------------|
+		 *
+		 * ramdisk_addr_r v3:
 		 *	|----------------|---------|
 		 *	| vendor-ramdisk | ramdisk |
 		 *	|----------------|---------|
+		 *
+		 * ramdisk_addr_r v4:
+		 *	|----------------|---------|------------|------------|
+		 *	| vendor-ramdisk | ramdisk | bootconfig | bootparams |
+		 *	|----------------|---------|------------|------------|
 		 */
 		if (hdr->header_version >= 3) {
 			buffer += hdr->vendor_ramdisk_size;
@@ -394,6 +429,35 @@ static int image_load(img_t img, struct andr_img_hdr *hdr,
 				return -ENOMEM;
 		}
 		break;
+	case IMG_BOOTCONFIG:
+		if (hdr->header_version < 4)
+			return 0;
+		if (part_get_info_by_name(desc,
+					  ANDROID_PARTITION_VENDOR_BOOT,
+					  &part_vendor_boot) < 0) {
+			printf("No vendor boot partition\n");
+			return -ENOENT;
+		}
+
+		blkstart = part_vendor_boot.start;
+		pgsz = hdr->vendor_page_size;
+		ram_base = 0;
+
+		bsoffs = ALIGN(VENDOR_BOOT_HDRv4_SIZE, pgsz) +
+			 ALIGN(hdr->vendor_ramdisk_size, pgsz) +
+			 ALIGN(hdr->dtb_size, pgsz) +
+			 ALIGN(hdr->vendor_ramdisk_table_size, pgsz);
+		length = hdr->vendor_bootconfig_size;
+		buffer = (void *)env_get_ulong("ramdisk_addr_r", 16, 0);
+		blkcnt = DIV_ROUND_UP(hdr->vendor_bootconfig_size, blksz);
+		typesz = sizeof(hdr->vendor_bootconfig_size);
+
+		buffer += hdr->vendor_ramdisk_size + hdr->ramdisk_size;
+		if (!IS_ALIGNED((ulong)buffer, blksz)) {
+			memmove_dst = (ulong)buffer;
+			buffer = (void *)ALIGN(memmove_dst, blksz);
+		}
+		break;
 	case IMG_SECOND:
 		bsoffs = pgsz +
 			 ALIGN(hdr->kernel_size, pgsz) +
@@ -579,9 +643,9 @@ static int android_image_separate(struct andr_img_hdr *hdr,
 	return 0;
 }
 
-static int android_image_separate_v3(struct andr_img_hdr *hdr,
-				     const disk_partition_t *part,
-				     void *load_address, void *ram_base)
+static int android_image_separate_v34(struct andr_img_hdr *hdr,
+				      const disk_partition_t *part,
+				      void *load_address, void *ram_base)
 {
 	ulong bstart;
 
@@ -606,12 +670,13 @@ static int android_image_separate_v3(struct andr_img_hdr *hdr,
 		return -1;
 	if (image_load(IMG_RAMDISK, hdr, bstart, ram_base, NULL))
 		return -1;
-
+	if (image_load(IMG_BOOTCONFIG, hdr, bstart, ram_base, NULL))
+		return -1;
 	/*
 	 * Copy the populated hdr to load address after image_load(IMG_KERNEL)
 	 *
-	 * The image_load(IMG_KERNEL) only reads boot_img_hdr_v3 while
-	 * vendor_boot_img_hdr_v3 is not included, so fix it here.
+	 * The image_load(IMG_KERNEL) only reads boot_img_hdr_v34 while
+	 * vendor_boot_img_hdr_v34 is not included, so fix it here.
 	 */
 	memcpy((char *)load_address, hdr, hdr->page_size);
 
@@ -704,7 +769,7 @@ static int android_image_load_separate(struct andr_img_hdr *hdr,
 	if (hdr->header_version < 3)
 		return android_image_separate(hdr, part, load_addr, NULL);
 	else
-		return android_image_separate_v3(hdr, part, load_addr, NULL);
+		return android_image_separate_v34(hdr, part, load_addr, NULL);
 }
 
 int android_image_memcpy_separate(struct andr_img_hdr *hdr, ulong *load_addr)
@@ -736,7 +801,7 @@ int android_image_memcpy_separate(struct andr_img_hdr *hdr, ulong *load_addr)
 		if (android_image_separate(hdr, NULL, (void *)(*load_addr), hdr))
 			return -1;
 	} else {
-		if (android_image_separate_v3(hdr, NULL, (void *)(*load_addr), hdr))
+		if (android_image_separate_v34(hdr, NULL, (void *)(*load_addr), hdr))
 			return -1;
 	}
 
@@ -847,15 +912,15 @@ extract_boot_image_v012_header(struct blk_desc *dev_desc,
 	return hdr;
 }
 
-static struct boot_img_hdr_v3 *
-extract_boot_image_v3_header(struct blk_desc *dev_desc,
-			     const disk_partition_t *boot_img)
+static struct boot_img_hdr_v34 *
+extract_boot_image_v34_header(struct blk_desc *dev_desc,
+			      const disk_partition_t *boot_img)
 {
-	struct boot_img_hdr_v3 *boot_hdr;
+	struct boot_img_hdr_v34 *boot_hdr;
 	long blk_cnt, blks_read;
 
-	blk_cnt = BLK_CNT(sizeof(struct boot_img_hdr_v3), dev_desc->blksz);
-	boot_hdr = (struct boot_img_hdr_v3 *)malloc(blk_cnt * dev_desc->blksz);
+	blk_cnt = BLK_CNT(sizeof(struct boot_img_hdr_v34), dev_desc->blksz);
+	boot_hdr = (struct boot_img_hdr_v34 *)malloc(blk_cnt * dev_desc->blksz);
 
 	if (!blk_cnt || !boot_hdr)
 		return NULL;
@@ -872,24 +937,25 @@ extract_boot_image_v3_header(struct blk_desc *dev_desc,
 		return NULL;
 	}
 
-	if (boot_hdr->header_version != 3) {
-		printf("boot header is not v3.\n");
+	if (boot_hdr->header_version < 3) {
+		printf("boot header %d, is not >= v3.\n",
+		       boot_hdr->header_version);
 		return NULL;
 	}
 
 	return boot_hdr;
 }
 
-static struct vendor_boot_img_hdr_v3 *
-extract_vendor_boot_image_v3_header(struct blk_desc *dev_desc,
-				    const disk_partition_t *part_vendor_boot)
+static struct vendor_boot_img_hdr_v34 *
+extract_vendor_boot_image_v34_header(struct blk_desc *dev_desc,
+				     const disk_partition_t *part_vendor_boot)
 {
-	struct vendor_boot_img_hdr_v3 *vboot_hdr;
+	struct vendor_boot_img_hdr_v34 *vboot_hdr;
 	long blk_cnt, blks_read;
 
-	blk_cnt = BLK_CNT(sizeof(struct vendor_boot_img_hdr_v3),
+	blk_cnt = BLK_CNT(sizeof(struct vendor_boot_img_hdr_v34),
 				part_vendor_boot->blksz);
-	vboot_hdr = (struct vendor_boot_img_hdr_v3 *)
+	vboot_hdr = (struct vendor_boot_img_hdr_v34 *)
 				malloc(blk_cnt * part_vendor_boot->blksz);
 
 	if (!blk_cnt || !vboot_hdr)
@@ -909,16 +975,17 @@ extract_vendor_boot_image_v3_header(struct blk_desc *dev_desc,
 		return NULL;
 	}
 
-	if (vboot_hdr->header_version != 3) {
-		printf("vendor boot header is not v3.\n");
+	if (vboot_hdr->header_version < 3) {
+		printf("vendor boot header %d, is not >= v3.\n",
+		       vboot_hdr->header_version);
 		return NULL;
 	}
 
 	return vboot_hdr;
 }
 
-static int populate_boot_info(const struct boot_img_hdr_v3 *boot_hdr,
-			      const struct vendor_boot_img_hdr_v3 *vendor_hdr,
+static int populate_boot_info(const struct boot_img_hdr_v34 *boot_hdr,
+			      const struct vendor_boot_img_hdr_v34 *vendor_hdr,
 			      struct andr_img_hdr *hdr)
 {
 	memset(hdr->magic, 0, ANDR_BOOT_MAGIC_SIZE);
@@ -929,11 +996,11 @@ static int populate_boot_info(const struct boot_img_hdr_v3 *boot_hdr,
 	hdr->kernel_addr = ANDROID_IMAGE_DEFAULT_KERNEL_ADDR;
 	/* generic ramdisk: immediately following the vendor ramdisk */
 	hdr->boot_ramdisk_size = boot_hdr->ramdisk_size;
-	hdr->ramdisk_size = boot_hdr->ramdisk_size +
-				vendor_hdr->vendor_ramdisk_size;
+	hdr->ramdisk_size = boot_hdr->ramdisk_size;
+
 	/* actually, useless */
-	hdr->ramdisk_addr = vendor_hdr->ramdisk_addr +
-				vendor_hdr->vendor_ramdisk_size;
+	hdr->ramdisk_addr = env_get_ulong("ramdisk_addr_r", 16, 0);
+
 	/* removed in v3 */
 	hdr->second_size = 0;
 	hdr->second_addr = 0;
@@ -959,7 +1026,7 @@ static int populate_boot_info(const struct boot_img_hdr_v3 *boot_hdr,
 	hdr->dtb_size = vendor_hdr->dtb_size;
 	hdr->dtb_addr = vendor_hdr->dtb_addr;
 
-	/* boot_img_hdr_v3 fields */
+	/* boot_img_hdr_v34 fields */
 	hdr->vendor_ramdisk_size = vendor_hdr->vendor_ramdisk_size;
 	hdr->vendor_page_size = vendor_hdr->page_size;
 	hdr->vendor_header_version = vendor_hdr->header_version;
@@ -974,6 +1041,28 @@ static int populate_boot_info(const struct boot_img_hdr_v3 *boot_hdr,
 	strncat(hdr->total_cmdline, (const char *)vendor_hdr->cmdline,
 		sizeof(vendor_hdr->cmdline));
 
+	/* new for header v4 */
+	if (vendor_hdr->header_version > 3) {
+		hdr->vendor_ramdisk_table_size =
+				vendor_hdr->vendor_ramdisk_table_size;
+		hdr->vendor_ramdisk_table_entry_num =
+				vendor_hdr->vendor_ramdisk_table_entry_num;
+		hdr->vendor_ramdisk_table_entry_size =
+				vendor_hdr->vendor_ramdisk_table_entry_size;
+		/*
+		 * If we place additional "androidboot.xxx" parameters after
+		 * bootconfig, this field value should be increased,
+		 * but not over than ANDROID_ADDITION_BOOTCONFIG_PARAMS_MAX_SIZE.
+		 */
+		hdr->vendor_bootconfig_size =
+				vendor_hdr->vendor_bootconfig_size;
+	} else {
+		hdr->vendor_ramdisk_table_size = 0;
+		hdr->vendor_ramdisk_table_entry_num = 0;
+		hdr->vendor_ramdisk_table_entry_size = 0;
+		hdr->vendor_bootconfig_size = 0;
+	}
+
 	if (hdr->page_size < sizeof(*hdr)) {
 		printf("android hdr is over size\n");
 		return -EINVAL;
@@ -986,14 +1075,14 @@ static int populate_boot_info(const struct boot_img_hdr_v3 *boot_hdr,
  * The possible cases of boot.img + recovery.img:
  *
  * [N]: 0, 1, 2
- * [M]: 0, 1, 2, 3
+ * [M]: 0, 1, 2, 3, 4
  *
  * |--------------------|---------------------|
  * |   boot.img         |    recovery.img     |
  * |--------------------|---------------------|
  * | boot_img_hdr_v[N]  |  boot_img_hdr_v[N]  | <= if A/B is not required
  * |--------------------|---------------------|
- * | boot_img_hdr_v3    |  boot_img_hdr_v2    | <= if A/B is not required
+ * | boot_img_hdr_v34   |  boot_img_hdr_v2    | <= if A/B is not required
  * |------------------------------------------|
  * | boot_img_hdr_v[M], no recovery.img       | <= if A/B is required
  * |------------------------------------------|
@@ -1002,8 +1091,8 @@ struct andr_img_hdr *populate_andr_img_hdr(struct blk_desc *dev_desc,
 					   disk_partition_t *part_boot)
 {
 	disk_partition_t part_vendor_boot;
-	struct vendor_boot_img_hdr_v3 *vboot_hdr;
-	struct boot_img_hdr_v3 *boot_hdr;
+	struct vendor_boot_img_hdr_v34 *vboot_hdr;
+	struct boot_img_hdr_v34 *boot_hdr;
 	struct andr_img_hdr *andr_hdr;
 	int header_version;
 
@@ -1036,8 +1125,8 @@ struct andr_img_hdr *populate_andr_img_hdr(struct blk_desc *dev_desc,
 			printf("No vendor boot partition\n");
 			return NULL;
 		}
-		boot_hdr = extract_boot_image_v3_header(dev_desc, part_boot);
-		vboot_hdr = extract_vendor_boot_image_v3_header(dev_desc,
+		boot_hdr = extract_boot_image_v34_header(dev_desc, part_boot);
+		vboot_hdr = extract_vendor_boot_image_v34_header(dev_desc,
 							&part_vendor_boot);
 		if (!boot_hdr || !vboot_hdr)
 			goto image_load_exit;
@@ -1118,12 +1207,23 @@ void android_print_contents(const struct andr_img_hdr *hdr)
 		printf("%sdtb addr:              %llx\n", p, hdr->dtb_addr);
 	}
 
-	if (header_version == 3) {
+	if (header_version >= 3) {
 		printf("%scmdline:               %s\n", p, hdr->total_cmdline);
 		printf("%svendor ramdisk size:   %x\n", p, hdr->vendor_ramdisk_size);
 		printf("%svendor page size:      %x\n", p, hdr->vendor_page_size);
 		printf("%svendor header version: %d\n", p, hdr->vendor_header_version);
 		printf("%svendor header size:    %x\n", p, hdr->vendor_header_size);
 	}
+
+	if (header_version >= 4) {
+		printf("%svendor ramdisk table size:        %x\n",
+		       p, hdr->vendor_ramdisk_table_size);
+		printf("%svendor ramdisk table entry num:   %x\n",
+		       p, hdr->vendor_ramdisk_table_entry_num);
+		printf("%svendor ramdisk table entry size:  %x\n",
+		       p, hdr->vendor_ramdisk_table_entry_size);
+		printf("%svendor bootconfig size:           %d\n",
+		       p, hdr->vendor_bootconfig_size);
+	}
 }
 #endif
diff --git a/include/android_image.h b/include/android_image.h
index 421685372e..8af09984b8 100644
--- a/include/android_image.h
+++ b/include/android_image.h
@@ -45,7 +45,18 @@
 #define ANDR_BOOT_IMG_HDR_SIZE (ANDR_BOOT_IMG_PAGE_SIZE)
 #define TOTAL_BOOT_ARGS_SIZE (ANDR_BOOT_ARGS_SIZE + ANDR_BOOT_EXTRA_ARGS_SIZE + \
                               VENDOR_BOOT_ARGS_SIZE + 1)
-#define VENDOR_BOOT_HDR_SIZE	2112
+#define VENDOR_BOOT_HDRv3_SIZE	2112
+#define VENDOR_BOOT_HDRv4_SIZE	2124
+
+#define VENDOR_RAMDISK_TYPE_NONE 0
+#define VENDOR_RAMDISK_TYPE_PLATFORM 1
+#define VENDOR_RAMDISK_TYPE_RECOVERY 2
+#define VENDOR_RAMDISK_TYPE_DLKM 3
+#define VENDOR_RAMDISK_NAME_SIZE 32
+#define VENDOR_RAMDISK_TABLE_ENTRY_BOARD_ID_SIZE 16
+
+/* defined by rockchip but not google, it's adjustable */
+#define ANDROID_ADDITION_BOOTCONFIG_PARAMS_MAX_SIZE SZ_8K
 
 /*
  * It is expected that callers would explicitly specify which version of the
@@ -100,10 +111,10 @@ struct andr_img_hdr {
     u64 dtb_addr; /* physical load address for DTB image */
 
     /*
-     * [Rockchip compatibility]
+     * [Rockchip compatibility Android v3]
      *
      * boot_img_hdr_v3(Android-11) is not compatible with boot_img_hdr_v012,
-     * we have to partly merge fields from boot_img_hdr_v3 and vendor_boot_img_hdr_v3
+     * we have to partly merge fields from boot_img_hdr_v34 and vendor_boot_img_hdr_v34
      * into this structure to compatible with boot_img_hdr_v012.
      */
     u32 boot_ramdisk_size;   /* size in bytes */
@@ -111,6 +122,19 @@ struct andr_img_hdr {
     u32 vendor_page_size;
     u32 vendor_header_version;
     u32 vendor_header_size;
+
+    /*
+     * [Rockchip compatibility Android v4]
+     *
+     * boot_img_hdr_v4(Android-12) is not compatible with boot_img_hdr_v012,
+     * we have to partly merge fields from boot_img_hdr_v34 and vendor_boot_img_hdr_v34
+     * into this structure to compatible with boot_img_hdr_v012.
+     */
+    u32 vendor_ramdisk_table_size;
+    u32 vendor_ramdisk_table_entry_num;
+    u32 vendor_ramdisk_table_entry_size;
+    u32 vendor_bootconfig_size; /* size in bytes for bootconfig image */
+
     /*
      * Don't define 'char total_cmdline[TOTAL_BOOT_ARGS_SIZE]' to avoid
      * this structrue is over size than page_size.
@@ -118,7 +142,7 @@ struct andr_img_hdr {
     char *total_cmdline;
 } __attribute__((packed));
 
-struct boot_img_hdr_v3 {
+struct boot_img_hdr_v34 {
     /* Must be ANDR_BOOT_MAGIC. */
     uint8_t magic[ANDR_BOOT_MAGIC_SIZE];
 
@@ -140,7 +164,7 @@ struct boot_img_hdr_v3 {
     uint8_t cmdline[ANDR_BOOT_ARGS_SIZE + ANDR_BOOT_EXTRA_ARGS_SIZE];
 } __attribute__((packed));
 
-struct vendor_boot_img_hdr_v3 {
+struct vendor_boot_img_hdr_v34 {
     /* Must be VENDOR_BOOT_MAGIC. */
     uint8_t magic[VENDOR_BOOT_MAGIC_SIZE];
 
@@ -163,9 +187,109 @@ struct vendor_boot_img_hdr_v3 {
 
     uint32_t dtb_size; /* size in bytes for DTB image */
     uint64_t dtb_addr; /* physical load address for DTB image */
+
+    /* new for v4 */
+    uint32_t vendor_ramdisk_table_size; /* size in bytes for the vendor ramdisk table */
+    uint32_t vendor_ramdisk_table_entry_num; /* number of entries in the vendor ramdisk table */
+    uint32_t vendor_ramdisk_table_entry_size;
+    uint32_t vendor_bootconfig_size; /* size in bytes for bootconfig image */
+} __attribute__((packed));
+
+struct vendor_ramdisk_table_entry_v4 {
+    uint32_t ramdisk_size; /* size in bytes for the ramdisk image */
+    uint32_t ramdisk_offset; /* offset to the ramdisk image in vendor ramdisk section */
+    uint32_t ramdisk_type; /* type of the ramdisk */
+    uint8_t ramdisk_name[VENDOR_RAMDISK_NAME_SIZE]; /* asciiz ramdisk name */
+
+    // Hardware identifiers describing the board, soc or platform which this
+    // ramdisk is intended to be loaded on.
+    uint32_t board_id[VENDOR_RAMDISK_TABLE_ENTRY_BOARD_ID_SIZE];
 } __attribute__((packed));
 
-/* When a boot header is of version 0, the structure of boot image is as
+/* When the boot image header has a version of 4, the structure of the boot
+ * image is the same as version 3:
+ *
+ * +---------------------+
+ * | boot header         | 4096 bytes
+ * +---------------------+
+ * | kernel              | m pages
+ * +---------------------+
+ * | ramdisk             | n pages
+ * +---------------------+
+ *
+ * m = (kernel_size + 4096 - 1) / 4096
+ * n = (ramdisk_size + 4096 - 1) / 4096
+ *
+ * Note that in version 4 of the boot image header, page size is fixed at 4096
+ * bytes.
+ *
+ * The structure of the vendor boot image version 4, which is required to be
+ * present when a version 4 boot image is used, is as follows:
+ *
+ * +------------------------+
+ * | vendor boot header     | o pages
+ * +------------------------+
+ * | vendor ramdisk section | p pages
+ * +------------------------+
+ * | dtb                    | q pages
+ * +------------------------+
+ * | vendor ramdisk table   | r pages
+ * +------------------------+
+ * | bootconfig             | s pages
+ * +------------------------+
+ *
+ * o = (2124 + page_size - 1) / page_size
+ * p = (vendor_ramdisk_size + page_size - 1) / page_size
+ * q = (dtb_size + page_size - 1) / page_size
+ * r = (vendor_ramdisk_table_size + page_size - 1) / page_size
+ * s = (vendor_bootconfig_size + page_size - 1) / page_size
+ *
+ * Note that in version 4 of the vendor boot image, multiple vendor ramdisks can
+ * be included in the vendor boot image. The bootloader can select a subset of
+ * ramdisks to load at runtime. To help the bootloader select the ramdisks, each
+ * ramdisk is tagged with a type tag and a set of hardware identifiers
+ * describing the board, soc or platform that this ramdisk is intended for.
+ *
+ * The vendor ramdisk section is consist of multiple ramdisk images concatenated
+ * one after another, and vendor_ramdisk_size is the size of the section, which
+ * is the total size of all the ramdisks included in the vendor boot image.
+ *
+ * The vendor ramdisk table holds the size, offset, type, name and hardware
+ * identifiers of each ramdisk. The type field denotes the type of its content.
+ * The hardware identifiers are specified in the board_id field in each table
+ * entry. The board_id field is consist of a vector of unsigned integer words,
+ * and the encoding scheme is defined by the hardware vendor.
+ *
+ * For the different type of ramdisks, there are:
+ *    - VENDOR_RAMDISK_TYPE_NONE indicates the value is unspecified.
+ *    - VENDOR_RAMDISK_TYPE_PLATFORM ramdisk contains platform specific bits.
+ *    - VENDOR_RAMDISK_TYPE_RECOVERY ramdisk contains recovery resources.
+ *    - VENDOR_RAMDISK_TYPE_DLKM ramdisk contains dynamic loadable kernel
+ *      modules.
+ *
+ * Version 4 of the vendor boot image also adds a bootconfig section to the end
+ * of the image. This section contains Boot Configuration parameters known at
+ * build time. The bootloader is responsible for placing this section directly
+ * after the boot image ramdisk, followed by the bootconfig trailer, before
+ * entering the kernel.
+ *
+ * 0. all entities in the boot image are 4096-byte aligned in flash, all
+ *    entities in the vendor boot image are page_size (determined by the vendor
+ *    and specified in the vendor boot image header) aligned in flash
+ * 1. kernel, ramdisk, and DTB are required (size != 0)
+ * 2. load the kernel and DTB at the specified physical address (kernel_addr,
+ *    dtb_addr)
+ * 3. load the vendor ramdisks at ramdisk_addr
+ * 4. load the generic ramdisk immediately following the vendor ramdisk in
+ *    memory
+ * 5. load the vendor bootconfig immediately following the generic ramdisk. Add
+ *    additional bootconfig parameters followed by the bootconfig trailer.
+ * 6. set up registers for kernel entry as required by your architecture
+ * 7. if the platform has a second stage bootloader jump to it (must be
+ *    contained outside boot and vendor boot partitions), otherwise
+ *    jump to kernel_addr
+ *
+ * When a boot header is of version 0, the structure of boot image is as
  * follows:
  *
  * +-----------------+

commit 6aa9b52e5cc4d7f61c6e4fdf6727f6ee48770068
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Sep 10 09:07:48 2021 +0800

    common: fdt_support: export fdt_setprop_uxx()
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Iea72c5bf19bf15daf3e41fe417c8b31968aed765

diff --git a/common/fdt_support.c b/common/fdt_support.c
index 8c2a943c04..3298fe10ee 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -185,8 +185,8 @@ static int fdt_fixup_stdout(void *fdt, int chosenoff)
 }
 #endif
 
-static inline int fdt_setprop_uxx(void *fdt, int nodeoffset, const char *name,
-				  uint64_t val, int is_u64)
+int fdt_setprop_uxx(void *fdt, int nodeoffset, const char *name,
+		    uint64_t val, int is_u64)
 {
 	if (is_u64)
 		return fdt_setprop_u64(fdt, nodeoffset, name, val);
diff --git a/include/fdt_support.h b/include/fdt_support.h
index 4be87948e6..c3347a0c26 100644
--- a/include/fdt_support.h
+++ b/include/fdt_support.h
@@ -16,7 +16,8 @@ u32 fdt_getprop_u32_default_node(const void *fdt, int off, int cell,
 				const char *prop, const u32 dflt);
 u32 fdt_getprop_u32_default(const void *fdt, const char *path,
 				const char *prop, const u32 dflt);
-
+int fdt_setprop_uxx(void *fdt, int nodeoffset, const char *name,
+		    uint64_t val, int is_u64);
 /**
  * Add data to the root of the FDT before booting the OS.
  *

commit eb4b0e9c673773f1cf9f84d2d2912df8a8df1adc
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Sep 6 15:06:34 2021 +0800

    common: android: improve variables name
    
    New name is more easy to be understood.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I6692d3d83c40a91c4c34ee909d146bf90be2e998

diff --git a/common/image-android.c b/common/image-android.c
index 57d46994a4..fa9d119c7b 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -316,26 +316,26 @@ static int image_load(img_t img, struct andr_img_hdr *hdr,
 {
 	struct blk_desc *desc = rockchip_get_bootdev();
 	disk_partition_t part_vendor_boot;
-	__maybe_unused u32 sizesz;
+	__maybe_unused u32 typesz;
 	ulong pgsz = hdr->page_size;
 	ulong blksz = desc->blksz;
 	ulong blkcnt, blkoff;
-	ulong orgdst = 0;
-	ulong offset = 0;
+	ulong memmove_dst = 0;
+	ulong bsoffs = 0;
 	ulong extra = 0;
-	ulong datasz;
-	void *ramdst;
+	ulong length;
+	void *buffer;
 	int ret = 0;
 
 	switch (img) {
 	case IMG_KERNEL:
-		offset = 0; /* include a page_size(image header) */
+		bsoffs = 0; /* include a page_size(image header) */
+		length = hdr->kernel_size + pgsz;
+		buffer = (void *)env_get_ulong("android_addr_r", 16, 0);
 		blkcnt = DIV_ROUND_UP(hdr->kernel_size + pgsz, blksz);
-		ramdst = (void *)env_get_ulong("android_addr_r", 16, 0);
-		datasz = hdr->kernel_size + pgsz;
-		sizesz = sizeof(hdr->kernel_size);
+		typesz = sizeof(hdr->kernel_size);
 		if (!sysmem_alloc_base(MEM_KERNEL,
-				(phys_addr_t)ramdst, blkcnt * blksz))
+			(phys_addr_t)buffer, blkcnt * blksz))
 			return -ENOMEM;
 		break;
 	case IMG_VENDOR_RAMDISK:
@@ -347,14 +347,14 @@ static int image_load(img_t img, struct andr_img_hdr *hdr,
 		}
 		/* Always load vendor boot from storage: avb full load boot/recovery */
 		blkstart = part_vendor_boot.start;
+		pgsz = hdr->vendor_page_size;
 		ram_base = 0;
 
-		pgsz = hdr->vendor_page_size;
-		offset = ALIGN(VENDOR_BOOT_HDR_SIZE, pgsz);
+		bsoffs = ALIGN(VENDOR_BOOT_HDR_SIZE, pgsz);
+		length = hdr->vendor_ramdisk_size;
+		buffer = (void *)env_get_ulong("ramdisk_addr_r", 16, 0);
 		blkcnt = DIV_ROUND_UP(hdr->vendor_ramdisk_size, blksz);
-		ramdst = (void *)env_get_ulong("ramdisk_addr_r", 16, 0);
-		datasz = hdr->vendor_ramdisk_size;
-		sizesz = sizeof(hdr->vendor_ramdisk_size);
+		typesz = sizeof(hdr->vendor_ramdisk_size);
 		/*
 		 * Add extra memory for generic ramdisk space.
 		 *
@@ -363,14 +363,17 @@ static int image_load(img_t img, struct andr_img_hdr *hdr,
 		 */
 		if (hdr->header_version == 3)
 			extra = ALIGN(hdr->ramdisk_size, blksz) + blksz;
-		if (datasz && !sysmem_alloc_base(MEM_RAMDISK,
-			(phys_addr_t)ramdst, blkcnt * blksz + extra))
+		if (length && !sysmem_alloc_base(MEM_RAMDISK,
+			(phys_addr_t)buffer, blkcnt * blksz + extra))
 			return -ENOMEM;
 		break;
 	case IMG_RAMDISK:
-		offset = pgsz + ALIGN(hdr->kernel_size, pgsz);
+		bsoffs = pgsz + ALIGN(hdr->kernel_size, pgsz);
+		length = hdr->ramdisk_size;
+		buffer = (void *)env_get_ulong("ramdisk_addr_r", 16, 0);
 		blkcnt = DIV_ROUND_UP(hdr->ramdisk_size, blksz);
-		ramdst = (void *)env_get_ulong("ramdisk_addr_r", 16, 0);
+		typesz = sizeof(hdr->ramdisk_size);
+
 		/*
 		 * ramdisk_addr_r:
 		 *	|----------------|---------|
@@ -378,99 +381,95 @@ static int image_load(img_t img, struct andr_img_hdr *hdr,
 		 *	|----------------|---------|
 		 */
 		if (hdr->header_version >= 3) {
-			ramdst += hdr->vendor_ramdisk_size;
-			if (!IS_ALIGNED((ulong)ramdst, blksz)) {
-				orgdst = (ulong)ramdst;
-				ramdst = (void *)ALIGN(orgdst, blksz);
+			buffer += hdr->vendor_ramdisk_size;
+			if (!IS_ALIGNED((ulong)buffer, blksz)) {
+				memmove_dst = (ulong)buffer;
+				buffer = (void *)ALIGN(memmove_dst, blksz);
 			}
 		}
-		datasz = hdr->ramdisk_size;
-		sizesz = sizeof(hdr->ramdisk_size);
-		/*
-		 * skip v3: sysmem has been alloced by vendor ramdisk.
-		 */
+		/* sysmem has been alloced by vendor ramdisk */
 		if (hdr->header_version < 3) {
-			if (datasz && !sysmem_alloc_base(MEM_RAMDISK,
-				(phys_addr_t)ramdst, blkcnt * blksz))
+			if (length && !sysmem_alloc_base(MEM_RAMDISK,
+				(phys_addr_t)buffer, blkcnt * blksz))
 				return -ENOMEM;
 		}
 		break;
 	case IMG_SECOND:
-		offset = pgsz +
+		bsoffs = pgsz +
 			 ALIGN(hdr->kernel_size, pgsz) +
 			 ALIGN(hdr->ramdisk_size, pgsz);
+		length = hdr->second_size;
 		blkcnt = DIV_ROUND_UP(hdr->second_size, blksz);
-		datasz = hdr->second_size;
-		sizesz = sizeof(hdr->second_size);
-		ramdst = malloc(blkcnt * blksz);
+		buffer = malloc(blkcnt * blksz);
+		typesz = sizeof(hdr->second_size);
 		break;
 	case IMG_RECOVERY_DTBO:
-		offset = pgsz +
+		bsoffs = pgsz +
 			 ALIGN(hdr->kernel_size, pgsz) +
 			 ALIGN(hdr->ramdisk_size, pgsz) +
 			 ALIGN(hdr->second_size, pgsz);
+		length = hdr->recovery_dtbo_size;
 		blkcnt = DIV_ROUND_UP(hdr->recovery_dtbo_size, blksz);
-		datasz = hdr->recovery_dtbo_size;
-		sizesz = sizeof(hdr->recovery_dtbo_size);
-		ramdst = malloc(blkcnt * blksz);
+		buffer = malloc(blkcnt * blksz);
+		typesz = sizeof(hdr->recovery_dtbo_size);
 		break;
 	case IMG_DTB:
-		offset = pgsz +
+		bsoffs = pgsz +
 			 ALIGN(hdr->kernel_size, pgsz) +
 			 ALIGN(hdr->ramdisk_size, pgsz) +
 			 ALIGN(hdr->second_size, pgsz) +
 			 ALIGN(hdr->recovery_dtbo_size, pgsz);
+		length = hdr->dtb_size;
 		blkcnt = DIV_ROUND_UP(hdr->dtb_size, blksz);
-		datasz = hdr->dtb_size;
-		sizesz = sizeof(hdr->dtb_size);
-		ramdst = malloc(blkcnt * blksz);
+		buffer = malloc(blkcnt * blksz);
+		typesz = sizeof(hdr->dtb_size);
 		break;
 	case IMG_RK_DTB:
 #ifdef CONFIG_RKIMG_BOOTLOADER
 		/* No going further, it handles DTBO, HW-ID, etc */
-		ramdst = (void *)env_get_ulong("fdt_addr_r", 16, 0);
-		if (gd->fdt_blob != (void *)ramdst)
-			ret = rockchip_read_dtb_file(ramdst);
+		buffer = (void *)env_get_ulong("fdt_addr_r", 16, 0);
+		if (gd->fdt_blob != (void *)buffer)
+			ret = rockchip_read_dtb_file(buffer);
 #endif
 		return ret < 0 ? ret : 0;
 	default:
 		return -EINVAL;
 	}
 
-	if (!ramdst) {
+	if (!buffer) {
 		printf("No memory for image(%d)\n", img);
 		return -ENOMEM;
 	}
 
-	if (!blksz || !datasz)
+	if (!blksz || !length)
 		goto crypto_calc;
 
 	/* load */
 	if (ram_base) {
-		memcpy(ramdst, (char *)((ulong)ram_base + offset), datasz);
+		memcpy(buffer, (char *)((ulong)ram_base + bsoffs), length);
 	} else {
-		blkoff = DIV_ROUND_UP(offset, blksz);
-		ret = blk_dread(desc, blkstart + blkoff, blkcnt, ramdst);
+		blkoff = DIV_ROUND_UP(bsoffs, blksz);
+		ret = blk_dread(desc, blkstart + blkoff, blkcnt, buffer);
 		if (ret != blkcnt) {
 			printf("Failed to read img(%d), ret=%d\n", img, ret);
 			return -EIO;
 		}
 	}
 
-	if (orgdst)
-		memmove((char *)orgdst, ramdst, datasz);
+	if (memmove_dst)
+		memmove((char *)memmove_dst, buffer, length);
 
 crypto_calc:
 	/* sha1 */
 #ifdef CONFIG_DM_CRYPTO
 	if (crypto) {
 		if (img == IMG_KERNEL) {
-			ramdst += pgsz;
-			datasz -= pgsz;
+			buffer += pgsz;
+			length -= pgsz;
 		}
 
-		crypto_sha_update(crypto, (u32 *)ramdst, datasz);
-		crypto_sha_update(crypto, (u32 *)&datasz, sizesz);
+		crypto_sha_update(crypto, (u32 *)buffer, length);
+		crypto_sha_update(crypto, (u32 *)&length, typesz);
 	}
 #endif
 

commit d87d52756a1f979d3d3d5ddeba9e873f2889dd6b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Sep 6 14:54:50 2021 +0800

    rockchip: board: implement board_fdt_chosen_bootargs()
    
    They are moved and improved from common/fdt_support.c
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I0a9dceef056b785a31adb74aef59d9df84733162

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index db9bfc16b0..a84245cf92 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -51,6 +51,7 @@
 #ifdef CONFIG_ROCKCHIP_EINK_DISPLAY
 #include <rk_eink.h>
 #endif
+
 DECLARE_GLOBAL_DATA_PTR;
 
 __weak int rk_board_late_init(void)
@@ -1002,3 +1003,81 @@ void board_quiesce_devices(void *images)
 	misc_decompress_cleanup();
 #endif
 }
+
+char *board_fdt_chosen_bootargs(void *fdt)
+{
+	/* bootargs_ext is used when dtbo is applied. */
+	const char *arr_bootargs[] = { "bootargs", "bootargs_ext" };
+	const char *bootargs;
+	int nodeoffset;
+	int i, dump;
+
+	/* debug */
+	hotkey_run(HK_INITCALL);
+	dump = is_hotkey(HK_CMDLINE);
+	if (dump)
+		printf("## bootargs(u-boot): %s\n\n", env_get("bootargs"));
+
+	/* find or create "/chosen" node. */
+	nodeoffset = fdt_find_or_add_subnode(fdt, 0, "chosen");
+	if (nodeoffset < 0)
+		return NULL;
+
+	for (i = 0; i < ARRAY_SIZE(arr_bootargs); i++) {
+		bootargs = fdt_getprop(fdt, nodeoffset, arr_bootargs[i], NULL);
+		if (!bootargs)
+			continue;
+		if (dump)
+			printf("## bootargs(kernel-%s): %s\n\n",
+			       arr_bootargs[i], bootargs);
+		/*
+		 * Append kernel bootargs
+		 * If use AB system, delete default "root=" which route
+		 * to rootfs. Then the ab bootctl will choose the
+		 * high priority system to boot and add its UUID
+		 * to cmdline. The format is "roo=PARTUUID=xxxx...".
+		 */
+#ifdef CONFIG_ANDROID_AB
+		env_update_filter("bootargs", bootargs, "root=");
+#else
+		env_update("bootargs", bootargs);
+#endif
+	}
+
+#ifdef CONFIG_MTD_BLK
+	char *mtd_par_info = mtd_part_parse(NULL);
+
+	if (mtd_par_info) {
+		if (memcmp(env_get("devtype"), "mtd", 3) == 0)
+			env_update("bootargs", mtd_par_info);
+	}
+#endif
+	/*
+	 * Initrd fixup: remove unused "initrd=0x...,0x...",
+	 * this for compatible with legacy parameter.txt
+	 */
+	env_delete("bootargs", "initrd=", 0);
+
+	/*
+	 * If uart is required to be disabled during
+	 * power on, it would be not initialized by
+	 * any pre-loader and U-Boot.
+	 *
+	 * If we don't remove earlycon from commandline,
+	 * kernel hangs while using earlycon to putc/getc
+	 * which may dead loop for waiting uart status.
+	 * (It seems the root cause is baundrate is not
+	 * initilalized)
+	 *
+	 * So let's remove earlycon from commandline.
+	 */
+	if (gd->flags & GD_FLG_DISABLE_CONSOLE)
+		env_delete("bootargs", "earlycon=", 0);
+
+	bootargs = env_get("bootargs");
+	if (dump)
+		printf("## bootargs(merged): %s\n\n", bootargs);
+
+	return (char *)bootargs;
+}
+

commit f26d9e5293bc4462cafdc2f85e4f29de699064f8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Sep 6 14:48:54 2021 +0800

    BACKPORT: fdt_support.c: Allow late kernel cmdline modification
    
    By declaring board-specific board_fdt_chosen_bootargs() the kernel
    command line arguments can be adjusted before injecting to flat dt
    chosen node.
    
    Signed-off-by: Niko Mauno <niko.mauno@vaisala.com>
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ie6fd81686ff8df87dc7f40e275e01fad1093955f
    (cherry-picked from f0b21ebd417cfe75f266b4dc16318bb3581783b9)

diff --git a/common/fdt_support.c b/common/fdt_support.c
index c160b36abc..8c2a943c04 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -343,19 +343,20 @@ int fdt_bootargs_append_ab(void *fdt, char *slot)
 	return ret;
 }
 
+/**
+ * board_fdt_chosen_bootargs - boards may override this function to use
+ *                             alternative kernel command line arguments
+ */
+__weak char *board_fdt_chosen_bootargs(void *fdt)
+{
+	return env_get("bootargs");
+}
+
 int fdt_chosen(void *fdt)
 {
-	/*
-	 * "bootargs_ext" is used when dtbo is applied.
-	 */
-	const char *arr_bootargs[] = { "bootargs", "bootargs_ext" };
 	int   nodeoffset;
 	int   err;
-	int   i;
 	char  *str;		/* used to set string properties */
-	int dump;
-
-	dump = is_hotkey(HK_CMDLINE);
 
 	err = fdt_check_header(fdt);
 	if (err < 0) {
@@ -368,68 +369,8 @@ int fdt_chosen(void *fdt)
 	if (nodeoffset < 0)
 		return nodeoffset;
 
-	str = env_get("bootargs");
+	str = board_fdt_chosen_bootargs(fdt);
 	if (str) {
-#ifdef CONFIG_ARCH_ROCKCHIP
-		const char *bootargs;
-
-		if (dump)
-			printf("## U-Boot bootargs: %s\n", str);
-
-		for (i = 0; i < ARRAY_SIZE(arr_bootargs); i++) {
-			bootargs = fdt_getprop(fdt, nodeoffset,
-					       arr_bootargs[i], NULL);
-			if (bootargs) {
-				if (dump)
-					printf("## Kernel %s: %s\n",
-					       arr_bootargs[i], bootargs);
-				/*
-				 * Append kernel bootargs
-				 * If use AB system, delete default "root=" which route
-				 * to rootfs. Then the ab bootctl will choose the
-				 * high priority system to boot and add its UUID
-				 * to cmdline. The format is "roo=PARTUUID=xxxx...".
-				 */
-				hotkey_run(HK_INITCALL);
-#ifdef CONFIG_ANDROID_AB
-				env_update_filter("bootargs", bootargs, "root=");
-#else
-				env_update("bootargs", bootargs);
-#endif
-#ifdef CONFIG_MTD_BLK
-				char *mtd_par_info = mtd_part_parse(NULL);
-
-				if (mtd_par_info) {
-					if (memcmp(env_get("devtype"), "mtd", 3) == 0)
-						env_update("bootargs", mtd_par_info);
-				}
-#endif
-				/*
-				 * Initrd fixup: remove unused "initrd=0x...,0x...",
-				 * this for compatible with legacy parameter.txt
-				 */
-				env_delete("bootargs", "initrd=", 0);
-
-				/*
-				 * If uart is required to be disabled during
-				 * power on, it would be not initialized by
-				 * any pre-loader and U-Boot.
-				 *
-				 * If we don't remove earlycon from commandline,
-				 * kernel hangs while using earlycon to putc/getc
-				 * which may dead loop for waiting uart status.
-				 * (It seems the root cause is baundrate is not
-				 * initilalized)
-				 *
-				 * So let's remove earlycon from commandline.
-				 */
-				if (gd->flags & GD_FLG_DISABLE_CONSOLE)
-					env_delete("bootargs", "earlycon=", 0);
-			}
-#endif
-		}
-
-		str = env_get("bootargs");
 		err = fdt_setprop(fdt, nodeoffset, "bootargs", str,
 				  strlen(str) + 1);
 		if (err < 0) {
@@ -439,9 +380,6 @@ int fdt_chosen(void *fdt)
 		}
 	}
 
-	if (dump)
-		printf("## Merged bootargs: %s\n", env_get("bootargs"));
-
 	return fdt_fixup_stdout(fdt, nodeoffset);
 }
 
diff --git a/include/fdt_support.h b/include/fdt_support.h
index 214fe2e22b..4be87948e6 100644
--- a/include/fdt_support.h
+++ b/include/fdt_support.h
@@ -190,6 +190,17 @@ int fdt_find_or_add_subnode(void *fdt, int parentoffset, const char *name);
  */
 int ft_board_setup(void *blob, bd_t *bd);
 
+/**
+ * board_fdt_chosen_bootargs() - Arbitrarily amend fdt kernel command line
+ *
+ * This is used for late modification of kernel command line arguments just
+ * before they are added into the /chosen node in flat device tree.
+ *
+ * @fdt: fdt blob
+ * @return: pointer to kernel command line arguments in memory
+ */
+char *board_fdt_chosen_bootargs(void *fdt);
+
 /*
  * The keystone2 SOC requires all 32 bit aliased addresses to be converted
  * to their 36 physical format. This has to happen after all fdt nodes

commit f93178ae1e66403ffee11e75d56a89659c32e108
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Sep 6 14:46:38 2021 +0800

    lib: add libxbc support
    
    Pick from google U-Boot commit.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I5241db252789249cfc72b1017065c9e3ed3fc695

diff --git a/include/xbc.h b/include/xbc.h
new file mode 100644
index 0000000000..725e65ff6a
--- /dev/null
+++ b/include/xbc.h
@@ -0,0 +1 @@
+#include <../lib/libxbc/libxbc.h>
diff --git a/lib/Kconfig b/lib/Kconfig
index 2153c7a4d0..64d8a3b07c 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -139,6 +139,20 @@ config TPM
 
 endmenu
 
+menu "Boot Configuration"
+
+config XBC
+	bool "Boot Configuration support"
+	depends on ANDROID_BOOT_IMAGE
+	default n
+	help
+	  This enables support of Boot Configuration which can be used
+	  to pass boot configuration parameters to user space. These
+	  parameters will show up in /proc/bootconfig similar to the kernel
+	  parameters that show up in /proc/cmdline
+
+endmenu
+
 menu "Hashing Support"
 
 config SHA1
diff --git a/lib/Makefile b/lib/Makefile
index 80d6dea30d..4ea7fe1d73 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -48,6 +48,7 @@ obj-y += list_sort.o
 obj-$(CONFIG_OPTEE_CLIENT) += optee_clientApi/
 endif
 
+obj-$(CONFIG_XBC) += libxbc/
 obj-$(CONFIG_$(SPL_TPL_)AVB_LIBAVB) += avb/libavb/
 obj-$(CONFIG_$(SPL_TPL_)AVB_LIBAVB_ATX) += avb/libavb_atx/
 obj-$(CONFIG_$(SPL_TPL_)AVB_LIBAVB_USER) += avb/libavb_user/
diff --git a/lib/libxbc/COPYING b/lib/libxbc/COPYING
new file mode 100644
index 0000000000..d645695673
--- /dev/null
+++ b/lib/libxbc/COPYING
@@ -0,0 +1,202 @@
+
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diff --git a/lib/libxbc/Makefile b/lib/libxbc/Makefile
new file mode 100644
index 0000000000..0c2feee66e
--- /dev/null
+++ b/lib/libxbc/Makefile
@@ -0,0 +1,15 @@
+ # Copyright (C) 2021 The Android Open Source Project
+ #
+ # Licensed under the Apache License, Version 2.0 (the "License");
+ # you may not use this file except in compliance with the License.
+ # You may obtain a copy of the License at
+ #
+ #      http://www.apache.org/licenses/LICENSE-2.0
+ #
+ # Unless required by applicable law or agreed to in writing, software
+ # distributed under the License is distributed on an "AS IS" BASIS,
+ # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ # See the License for the specific language governing permissions and
+ # limitations under the License.
+
+obj-$(CONFIG_XBC) += libxbc.o
diff --git a/lib/libxbc/libxbc.c b/lib/libxbc/libxbc.c
new file mode 100644
index 0000000000..6e47dee677
--- /dev/null
+++ b/lib/libxbc/libxbc.c
@@ -0,0 +1,118 @@
+/*
+ * Copyright (C) 2021 The Android Open Source Project
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "libxbc.h"
+
+#define BOOTCONFIG_MAGIC "#BOOTCONFIG\n"
+#define BOOTCONFIG_MAGIC_SIZE 12
+#define BOOTCONFIG_SIZE_SIZE 4
+#define BOOTCONFIG_CHECKSUM_SIZE 4
+#define BOOTCONFIG_TRAILER_SIZE BOOTCONFIG_MAGIC_SIZE + \
+                                BOOTCONFIG_SIZE_SIZE + \
+                                BOOTCONFIG_CHECKSUM_SIZE
+/*
+ * Simple checksum for a buffer.
+ *
+ * @param addr pointer to the start of the buffer.
+ * @param size size of the buffer in bytes.
+ * @return check sum result.
+ */
+static uint32_t checksum(const unsigned char* const buffer, uint32_t size) {
+    uint32_t sum = 0;
+    for (uint32_t i = 0; i < size; i++) {
+        sum += buffer[i];
+    }
+    return sum;
+}
+
+/*
+ * Check if the bootconfig trailer is present within the bootconfig section.
+ *
+ * @param bootconfig_end_addr address of the end of the bootconfig section. If
+ *        the trailer is present, it will be directly preceding this address.
+ * @return true if the trailer is present, false if not.
+ */
+static bool isTrailerPresent(uint64_t bootconfig_end_addr) {
+    return !strncmp((char*)(bootconfig_end_addr - BOOTCONFIG_MAGIC_SIZE),
+                    BOOTCONFIG_MAGIC, BOOTCONFIG_MAGIC_SIZE);
+}
+
+/*
+ * Add a string of boot config parameters to memory appended by the trailer.
+ */
+int32_t addBootConfigParameters(char* params, uint32_t params_size,
+    uint64_t bootconfig_start_addr, uint32_t bootconfig_size) {
+    if (!params || !bootconfig_start_addr) {
+        return -1;
+    }
+    if (params_size == 0) {
+        return 0;
+    }
+    int32_t applied_bytes = 0;
+    int32_t new_size = 0;
+    uint64_t end = bootconfig_start_addr + bootconfig_size;
+
+    if (isTrailerPresent(end)) {
+      end -= BOOTCONFIG_TRAILER_SIZE;
+      applied_bytes -= BOOTCONFIG_TRAILER_SIZE;
+      memcpy(&new_size, (void *)end, BOOTCONFIG_SIZE_SIZE);
+    } else {
+      new_size = bootconfig_size;
+    }
+
+    // params
+    memcpy((void*)end, params, params_size);
+
+    applied_bytes += params_size;
+    applied_bytes += addBootConfigTrailer(bootconfig_start_addr,
+        bootconfig_size + applied_bytes);
+
+    return applied_bytes;
+}
+
+/*
+ * Add boot config trailer.
+ */
+int32_t addBootConfigTrailer(uint64_t bootconfig_start_addr,
+                            uint32_t bootconfig_size) {
+    if (!bootconfig_start_addr) {
+        return -1;
+    }
+    if (bootconfig_size == 0) {
+        return 0;
+    }
+    uint64_t end = bootconfig_start_addr + bootconfig_size;
+
+    if (isTrailerPresent(end)) {
+        // no need to overwrite the current trailers
+        return 0;
+    }
+
+    // size
+    memcpy((void *)(end), &bootconfig_size, BOOTCONFIG_SIZE_SIZE);
+
+    // checksum
+    uint32_t sum =
+        checksum((unsigned char*)bootconfig_start_addr, bootconfig_size);
+    memcpy((void *)(end + BOOTCONFIG_SIZE_SIZE), &sum,
+        BOOTCONFIG_CHECKSUM_SIZE);
+
+    // magic
+    memcpy((void *)(end + BOOTCONFIG_SIZE_SIZE + BOOTCONFIG_CHECKSUM_SIZE),
+           BOOTCONFIG_MAGIC, BOOTCONFIG_MAGIC_SIZE);
+
+    return BOOTCONFIG_TRAILER_SIZE;
+}
diff --git a/lib/libxbc/libxbc.h b/lib/libxbc/libxbc.h
new file mode 100644
index 0000000000..0bee54873a
--- /dev/null
+++ b/lib/libxbc/libxbc.h
@@ -0,0 +1,59 @@
+/*
+ * Copyright (C) 2021 The Android Open Source Project
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef LIBXBC_H_
+#define LIBXBC_H_
+
+// memcpy and strncmp
+#include <common.h>
+
+/*
+ * Add a string of boot config parameters to memory appended by the trailer.
+ * This memory needs to be immediately following the end of the ramdisks.
+ * The new boot config trailer will be written to the end of the entire
+ * parameter section(previous + new). The trailer contains a 4 byte size of the
+ * parameters, followed by a 4 byte checksum of the parameters, followed by a 12
+ * byte magic string.
+ *
+ * @param params pointer to string of boot config parameters
+ * @param params_size size of params string in bytes
+ * @param bootconfig_start_addr address that the boot config section is starting
+ *        at in memory.
+ * @param bootconfig_size size of the current bootconfig section in bytes.
+ * @return number of bytes added to the boot config section. -1 for error.
+ */
+int addBootConfigParameters(char *params, uint32_t params_size,
+                            uint64_t bootconfig_start_addr,
+                            uint32_t bootconfig_size);
+
+/*
+ * Add the boot config trailer to the end of the boot config parameter section.
+ * This can be used after the vendor bootconfig section has been placed into
+ * memory if there are no additional parameters that need to be added.
+ * The new boot config trailer will be written to the end of the entire
+ * parameter section at (bootconfig_start_addr + bootconfig_size).
+ * The trailer contains a 4 byte size of the parameters, followed by a 4 byte
+ * checksum of the parameters, followed by a 12 byte magic string.
+ *
+ * @param bootconfig_start_addr address that the boot config section is starting
+ *        at in memory.
+ * @param bootconfig_size size of the current bootconfig section in bytes.
+ * @return number of bytes added to the boot config section. -1 for error.
+ */
+int addBootConfigTrailer(uint64_t bootconfig_start_addr,
+                         uint32_t bootconfig_size);
+
+#endif /* LIBXBC_H_ */

commit c785a9daec4dbd7db92fe923ac0080f4e1f40ee3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Sep 6 14:44:20 2021 +0800

    cmd: nvedit: add env_update_extract_subset() API
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I383a320c5975b9e54b34c1da11738c15130fc581

diff --git a/cmd/nvedit.c b/cmd/nvedit.c
index df378f741c..c725de256e 100644
--- a/cmd/nvedit.c
+++ b/cmd/nvedit.c
@@ -539,6 +539,53 @@ int env_update(const char *varname, const char *varvalue)
 	return env_update_filter(varname, varvalue, NULL);
 }
 
+int env_update_extract_subset(const char *varname,
+			      const char *subset_varname,
+			      const char *subset_key)
+{
+	char *subset_varvalue;
+	char *tmp_varvalue;
+	char *new_varvalue;
+	char *varvalue;
+	char *p, *item;
+	int ret = 0;
+	u32 len;
+
+	varvalue = env_get(varname);
+	if (!varvalue)
+		return 0;
+
+	len = strlen(varvalue) + 1;
+	new_varvalue = calloc(1, len);
+	subset_varvalue = calloc(1, len);
+	tmp_varvalue = strdup(varvalue);
+	if (!new_varvalue || !tmp_varvalue || !subset_varvalue) {
+		ret = -ENOMEM;
+		goto out;
+	}
+
+	item = strtok(tmp_varvalue, " ");
+	while (item) {
+		p = strstr(item, subset_key) ? subset_varvalue : new_varvalue;
+		strcat(p, item);
+		strcat(p, " ");
+		debug("%s: [item]: %s\n", __func__, item);
+		item = strtok(NULL, " ");
+	}
+
+	env_set(varname, new_varvalue);
+	env_set(subset_varname, subset_varvalue);
+out:
+	if (new_varvalue)
+		free(new_varvalue);
+	if (subset_varvalue)
+		free(subset_varvalue);
+	if (tmp_varvalue)
+		free(tmp_varvalue);
+
+	return ret;
+}
+
 char *env_exist(const char *varname, const char *varvalue)
 {
 	char *buf, *ptr = NULL;
diff --git a/include/common.h b/include/common.h
index e09f06508c..305bf75e61 100644
--- a/include/common.h
+++ b/include/common.h
@@ -349,6 +349,20 @@ int env_set(const char *varname, const char *value);
 int env_update_filter(const char *varname, const char *varvalue,
 		      const char *ignore);
 
+/**
+ * env_update_extract_subset() - extract subset value from an environment variable
+ *
+ * This extract subset value from an environment variable
+ *
+ * @varname: Parent Variable where to extract subset value, the subset value
+ *	     will be removed from it.
+ * @subset_varname: Variable to save subset value
+ * @subset_key: Key value to find out subset value
+ * @return 0 if OK, 1 on error
+ */
+int env_update_extract_subset(const char *varname,
+			      const char *subset_varname,
+			      const char *subset_key);
 /**
  * env_update() - update sub value of an environment variable
  *

commit 851a5b1195688b4d4bb1d4f60ceccf6849399209
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 7 18:34:10 2021 +0800

    cmd: nvedit: use calloc() instread of malloc()
    
    Clear buffer before strxxx() to avoid dirty characters.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I7173d70dbedbf58d4b87fef75b2e3bccea73a21c

diff --git a/cmd/nvedit.c b/cmd/nvedit.c
index 515e42056b..df378f741c 100644
--- a/cmd/nvedit.c
+++ b/cmd/nvedit.c
@@ -320,9 +320,9 @@ static int env_append(const char *varname, const char *varvalue)
 	if (oldvalue)
 		len += strlen(oldvalue);
 
-	newvalue = malloc(len + 2);
+	newvalue = calloc(1, len + 2);
 	if (!newvalue) {
-		printf("Error: malloc in %s failed!\n", __func__);
+		printf("Error: calloc in %s failed!\n", __func__);
 		return 1;
 	}
 
@@ -370,9 +370,9 @@ static int env_replace(const char *varname, const char *substr,
 	else
 		len = oldvalue_len + substr_len - replace_len;
 
-	newvalue = malloc(len);
+	newvalue = calloc(1, len);
 	if (!newvalue) {
-		printf("Error: malloc in %s failed!\n", __func__);
+		printf("Error: calloc in %s failed!\n", __func__);
 		return 1;
 	}
 
@@ -444,7 +444,7 @@ int env_update_filter(const char *varname, const char *varvalue,
 		return 1;
 	}
 
-	/* Splite varargs into items containing "=" by the blank */
+	/* Splite varargs into items containing "=" by the space */
 	a_item = strtok(a_string_tok, " ");
 	while (a_item && i < ARGS_ITEM_NUM) {
 		debug("%s: [a_item %d]: %s\n", __func__, i, a_item);
@@ -454,7 +454,7 @@ int env_update_filter(const char *varname, const char *varvalue,
 	}
 
 	/*
-	 * Splite varvalue into items containing "=" by the blank.
+	 * Splite varvalue into items containing "=" by the space.
 	 * parse varvalue title, eg: "bootmode=emmc", title is "bootmode"
 	 */
 	v_item = strtok(v_string_tok, " ");

commit 4e0fa9f6a6afd1c4db979a3d2e9f1e67d6e1f06f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Sep 6 14:43:38 2021 +0800

    scripts: unpack_bootimg: support android header v4
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I1948c1088b765ca1af4116af4fc62485bbc4b3ac

diff --git a/scripts/unpack_bootimg b/scripts/unpack_bootimg
index 789bf5e6d9..2b176e585b 100755
--- a/scripts/unpack_bootimg
+++ b/scripts/unpack_bootimg
@@ -1,4 +1,5 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
+#
 # Copyright 2018, The Android Open Source Project
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -13,15 +14,19 @@
 # See the License for the specific language governing permissions and
 # limitations under the License.
 
-"""unpacks the bootimage.
+"""Unpacks the boot image.
 
 Extracts the kernel, ramdisk, second bootloader, dtb and recovery dtbo images.
 """
 
-from __future__ import print_function
-from argparse import ArgumentParser, FileType
+from argparse import ArgumentParser, FileType, RawDescriptionHelpFormatter
 from struct import unpack
 import os
+import shlex
+
+BOOT_IMAGE_HEADER_V3_PAGESIZE = 4096
+VENDOR_RAMDISK_NAME_SIZE = 32
+VENDOR_RAMDISK_TABLE_ENTRY_BOARD_ID_SIZE = 16
 
 
 def create_out_dir(dir_path):
@@ -39,113 +44,503 @@ def extract_image(offset, size, bootimage, extracted_image_name):
 
 def get_number_of_pages(image_size, page_size):
     """calculates the number of pages required for the image"""
-    return (image_size + page_size - 1) / page_size
+    return (image_size + page_size - 1) // page_size
+
+
+def cstr(s):
+    """Remove first NULL character and any character beyond."""
+    return s.split('\0', 1)[0]
+
+
+def format_os_version(os_version):
+    a = os_version >> 14
+    b = os_version >> 7 & ((1<<7) - 1)
+    c = os_version & ((1<<7) - 1)
+    return '{}.{}.{}'.format(a, b, c)
+
+
+def format_os_patch_level(os_patch_level):
+    y = os_patch_level >> 4
+    y += 2000
+    m = os_patch_level & ((1<<4) - 1)
+    return '{:04d}-{:02d}'.format(y, m)
+
+
+def decode_os_version_patch_level(os_version_patch_level):
+    """Returns a tuple of (os_version, os_patch_level)."""
+    os_version = os_version_patch_level >> 11
+    os_patch_level = os_version_patch_level & ((1<<11) - 1)
+    return (format_os_version(os_version),
+            format_os_patch_level(os_patch_level))
+
+
+class BootImageInfoFormatter:
+    """Formats the boot image info."""
+
+    def format_pretty_text(self):
+        lines = []
+        lines.append(f'boot magic: {self.boot_magic}')
+
+        if self.header_version < 3:
+            lines.append(f'kernel_size: {self.kernel_size}')
+            lines.append(
+                f'kernel load address: {self.kernel_load_address:#010x}')
+            lines.append(f'ramdisk size: {self.ramdisk_size}')
+            lines.append(
+                f'ramdisk load address: {self.ramdisk_load_address:#010x}')
+            lines.append(f'second bootloader size: {self.second_size}')
+            lines.append(
+                f'second bootloader load address: '
+                f'{self.second_load_address:#010x}')
+            lines.append(
+                f'kernel tags load address: {self.tags_load_address:#010x}')
+            lines.append(f'page size: {self.page_size}')
+        else:
+            lines.append(f'kernel_size: {self.kernel_size}')
+            lines.append(f'ramdisk size: {self.ramdisk_size}')
+
+        lines.append(f'os version: {self.os_version}')
+        lines.append(f'os patch level: {self.os_patch_level}')
+        lines.append(f'boot image header version: {self.header_version}')
+
+        if self.header_version < 3:
+            lines.append(f'product name: {self.product_name}')
+
+        lines.append(f'command line args: {self.cmdline}')
+
+        if self.header_version < 3:
+            lines.append(f'additional command line args: {self.extra_cmdline}')
+
+        if self.header_version in {1, 2}:
+            lines.append(f'recovery dtbo size: {self.recovery_dtbo_size}')
+            lines.append(
+                f'recovery dtbo offset: {self.recovery_dtbo_offset:#018x}')
+            lines.append(f'boot header size: {self.boot_header_size}')
+
+        if self.header_version == 2:
+            lines.append(f'dtb size: {self.dtb_size}')
+            lines.append(f'dtb address: {self.dtb_load_address:#018x}')
+
+        if self.header_version >= 4:
+            lines.append(
+                f'boot.img signature size: {self.boot_signature_size}')
+
+        return '\n'.join(lines)
 
+    def format_mkbootimg_argument(self):
+        args = []
+        args.extend(['--header_version', str(self.header_version)])
+        args.extend(['--os_version', self.os_version])
+        args.extend(['--os_patch_level', self.os_patch_level])
 
-def unpack_bootimage(args):
+        args.extend(['--kernel', os.path.join(self.image_dir, 'kernel')])
+        args.extend(['--ramdisk', os.path.join(self.image_dir, 'ramdisk')])
+
+        if self.header_version <= 2:
+            if self.second_size > 0:
+                args.extend(['--second',
+                             os.path.join(self.image_dir, 'second')])
+            if self.recovery_dtbo_size > 0:
+                args.extend(['--recovery_dtbo',
+                             os.path.join(self.image_dir, 'recovery_dtbo')])
+            if self.dtb_size > 0:
+                args.extend(['--dtb', os.path.join(self.image_dir, 'dtb')])
+
+            args.extend(['--pagesize', f'{self.page_size:#010x}'])
+
+            # Kernel load address is base + kernel_offset in mkbootimg.py.
+            # However we don't know the value of 'base' when unpacking a boot
+            # image in this script, so we set 'base' to zero and 'kernel_offset'
+            # to the kernel load address, 'ramdisk_offset' to the ramdisk load
+            # address, ... etc.
+            args.extend(['--base', f'{0:#010x}'])
+            args.extend(['--kernel_offset',
+                         f'{self.kernel_load_address:#010x}'])
+            args.extend(['--ramdisk_offset',
+                         f'{self.ramdisk_load_address:#010x}'])
+            args.extend(['--second_offset',
+                         f'{self.second_load_address:#010x}'])
+            args.extend(['--tags_offset', f'{self.tags_load_address:#010x}'])
+
+            # dtb is added in boot image v2, and is absent in v1 or v0.
+            if self.header_version == 2:
+                # dtb_offset is uint64_t.
+                args.extend(['--dtb_offset', f'{self.dtb_load_address:#018x}'])
+
+            args.extend(['--board', self.product_name])
+            args.extend(['--cmdline', self.cmdline + self.extra_cmdline])
+        else:
+            args.extend(['--cmdline', self.cmdline])
+
+        return args
+
+
+def unpack_boot_image(args):
     """extracts kernel, ramdisk, second bootloader and recovery dtbo"""
-    boot_magic = unpack('8s', args.boot_img.read(8))
-    print('boot_magic: %s' % boot_magic)
-    kernel_ramdisk_second_info = unpack('10I', args.boot_img.read(10 * 4))
-    print('kernel_size: %s' % kernel_ramdisk_second_info[0])
-    print('kernel load address: %#x' % kernel_ramdisk_second_info[1])
-    print('ramdisk size: %s' % kernel_ramdisk_second_info[2])
-    print('ramdisk load address: %#x' % kernel_ramdisk_second_info[3])
-    print('second bootloader size: %s' % kernel_ramdisk_second_info[4])
-    print('second bootloader load address: %#x' % kernel_ramdisk_second_info[5])
-    print('kernel tags load address: %#x' % kernel_ramdisk_second_info[6])
-    print('page size: %s' % kernel_ramdisk_second_info[7])
-    print('boot image header version: %s' % kernel_ramdisk_second_info[8])
-    print('os version and patch level: %s' % kernel_ramdisk_second_info[9])
-
-    product_name = unpack('16s', args.boot_img.read(16))
-    print('product name: %s' % product_name)
-    cmdline = unpack('512s', args.boot_img.read(512))
-    print('command line args: %s' % cmdline)
-
-    args.boot_img.read(32)  # ignore SHA
-
-    extra_cmdline = unpack('1024s', args.boot_img.read(1024))
-    print('additional command line args: %s' % extra_cmdline)
-
-    kernel_size = kernel_ramdisk_second_info[0]
-    ramdisk_size = kernel_ramdisk_second_info[2]
-    second_size = kernel_ramdisk_second_info[4]
-    page_size = kernel_ramdisk_second_info[7]
-    version = kernel_ramdisk_second_info[8]
-    if version > 0:
-        recovery_dtbo_size = unpack('I', args.boot_img.read(1 * 4))[0]
-        print('recovery dtbo size: %s' % recovery_dtbo_size)
-        recovery_dtbo_offset = unpack('Q', args.boot_img.read(8))[0]
-        print('recovery dtbo offset: %#x' % recovery_dtbo_offset)
-        boot_header_size = unpack('I', args.boot_img.read(4))[0]
-        print('boot header size: %s' % boot_header_size)
+    info = BootImageInfoFormatter()
+    info.boot_magic = unpack('8s', args.boot_img.read(8))[0].decode()
+
+    kernel_ramdisk_second_info = unpack('9I', args.boot_img.read(9 * 4))
+    # header_version is always at [8] regardless of the value of header_version.
+    info.header_version = kernel_ramdisk_second_info[8]
+
+    if info.header_version < 3:
+        info.kernel_size = kernel_ramdisk_second_info[0]
+        info.kernel_load_address = kernel_ramdisk_second_info[1]
+        info.ramdisk_size = kernel_ramdisk_second_info[2]
+        info.ramdisk_load_address = kernel_ramdisk_second_info[3]
+        info.second_size = kernel_ramdisk_second_info[4]
+        info.second_load_address = kernel_ramdisk_second_info[5]
+        info.tags_load_address = kernel_ramdisk_second_info[6]
+        info.page_size = kernel_ramdisk_second_info[7]
+        os_version_patch_level = unpack('I', args.boot_img.read(1 * 4))[0]
     else:
-        recovery_dtbo_size = 0
-    if version > 1:
-        dtb_size = unpack('I', args.boot_img.read(4))[0]
-        print('dtb size: %s' % dtb_size)
-        dtb_load_address = unpack('Q', args.boot_img.read(8))[0]
-        print('dtb address: %#x' % dtb_load_address)
+        info.kernel_size = kernel_ramdisk_second_info[0]
+        info.ramdisk_size = kernel_ramdisk_second_info[1]
+        os_version_patch_level = kernel_ramdisk_second_info[2]
+        info.second_size = 0
+        info.page_size = BOOT_IMAGE_HEADER_V3_PAGESIZE
+
+    info.os_version, info.os_patch_level = decode_os_version_patch_level(
+        os_version_patch_level)
+
+    if info.header_version < 3:
+        info.product_name = cstr(unpack('16s',
+                                        args.boot_img.read(16))[0].decode())
+        info.cmdline = cstr(unpack('512s', args.boot_img.read(512))[0].decode())
+        args.boot_img.read(32)  # ignore SHA
+        info.extra_cmdline = cstr(unpack('1024s',
+                                         args.boot_img.read(1024))[0].decode())
+    else:
+        info.cmdline = cstr(unpack('1536s',
+                                   args.boot_img.read(1536))[0].decode())
+
+    if info.header_version in {1, 2}:
+        info.recovery_dtbo_size = unpack('I', args.boot_img.read(1 * 4))[0]
+        info.recovery_dtbo_offset = unpack('Q', args.boot_img.read(8))[0]
+        info.boot_header_size = unpack('I', args.boot_img.read(4))[0]
+    else:
+        info.recovery_dtbo_size = 0
+
+    if info.header_version == 2:
+        info.dtb_size = unpack('I', args.boot_img.read(4))[0]
+        info.dtb_load_address = unpack('Q', args.boot_img.read(8))[0]
     else:
-        dtb_size = 0
+        info.dtb_size = 0
+        info.dtb_load_address = 0
 
+    if info.header_version >= 4:
+        info.boot_signature_size = unpack('I', args.boot_img.read(4))[0]
+    else:
+        info.boot_signature_size = 0
 
     # The first page contains the boot header
     num_header_pages = 1
 
-    num_kernel_pages = get_number_of_pages(kernel_size, page_size)
+    # Convenient shorthand.
+    page_size = info.page_size
+
+    num_kernel_pages = get_number_of_pages(info.kernel_size, page_size)
     kernel_offset = page_size * num_header_pages  # header occupies a page
-    image_info_list = [(kernel_offset, kernel_size, 'kernel')]
+    image_info_list = [(kernel_offset, info.kernel_size, 'kernel')]
 
-    num_ramdisk_pages = get_number_of_pages(ramdisk_size, page_size)
+    num_ramdisk_pages = get_number_of_pages(info.ramdisk_size, page_size)
     ramdisk_offset = page_size * (num_header_pages + num_kernel_pages
                                  ) # header + kernel
-    image_info_list.append((ramdisk_offset, ramdisk_size, 'ramdisk'))
+    image_info_list.append((ramdisk_offset, info.ramdisk_size, 'ramdisk'))
 
-    if second_size > 0:
+    if info.second_size > 0:
         second_offset = page_size * (
-                num_header_pages + num_kernel_pages + num_ramdisk_pages
-                )  # header + kernel + ramdisk
-        image_info_list.append((second_offset, second_size, 'second'))
+            num_header_pages + num_kernel_pages + num_ramdisk_pages
+            )  # header + kernel + ramdisk
+        image_info_list.append((second_offset, info.second_size, 'second'))
 
-    if recovery_dtbo_size > 0:
-        image_info_list.append((recovery_dtbo_offset, recovery_dtbo_size,
+    if info.recovery_dtbo_size > 0:
+        image_info_list.append((info.recovery_dtbo_offset,
+                                info.recovery_dtbo_size,
                                 'recovery_dtbo'))
-    if dtb_size > 0:
-        num_second_pages = get_number_of_pages(second_size, page_size)
-        num_recovery_dtbo_pages = get_number_of_pages(recovery_dtbo_size, page_size)
+    if info.dtb_size > 0:
+        num_second_pages = get_number_of_pages(info.second_size, page_size)
+        num_recovery_dtbo_pages = get_number_of_pages(
+            info.recovery_dtbo_size, page_size)
         dtb_offset = page_size * (
-            num_header_pages + num_kernel_pages + num_ramdisk_pages + num_second_pages +
-            num_recovery_dtbo_pages
-        )
+            num_header_pages + num_kernel_pages + num_ramdisk_pages +
+            num_second_pages + num_recovery_dtbo_pages)
+
+        image_info_list.append((dtb_offset, info.dtb_size, 'dtb'))
 
-        image_info_list.append((dtb_offset, dtb_size, 'dtb'))
+    if info.boot_signature_size > 0:
+        # boot signature only exists in boot.img version >= v4.
+        # There are only kernel and ramdisk pages before the signature.
+        boot_signature_offset = page_size * (
+            num_header_pages + num_kernel_pages + num_ramdisk_pages)
 
-    for image_info in image_info_list:
-        extract_image(image_info[0], image_info[1], args.boot_img,
-                      os.path.join(args.out, image_info[2]))
+        image_info_list.append((boot_signature_offset, info.boot_signature_size,
+                                'boot_signature'))
+
+    create_out_dir(args.out)
+    for offset, size, name in image_info_list:
+        extract_image(offset, size, args.boot_img, os.path.join(args.out, name))
+    info.image_dir = args.out
+
+    return info
+
+
+class VendorBootImageInfoFormatter:
+    """Formats the vendor_boot image info."""
+
+    def format_pretty_text(self):
+        lines = []
+        lines.append(f'boot magic: {self.boot_magic}')
+        lines.append(f'vendor boot image header version: {self.header_version}')
+        lines.append(f'page size: {self.page_size:#010x}')
+        lines.append(f'kernel load address: {self.kernel_load_address:#010x}')
+        lines.append(f'ramdisk load address: {self.ramdisk_load_address:#010x}')
+        if self.header_version > 3:
+            lines.append(
+                f'vendor ramdisk total size: {self.vendor_ramdisk_size}')
+        else:
+            lines.append(f'vendor ramdisk size: {self.vendor_ramdisk_size}')
+        lines.append(f'vendor command line args: {self.cmdline}')
+        lines.append(
+            f'kernel tags load address: {self.tags_load_address:#010x}')
+        lines.append(f'product name: {self.product_name}')
+        lines.append(f'vendor boot image header size: {self.header_size}')
+        lines.append(f'dtb size: {self.dtb_size}')
+        lines.append(f'dtb address: {self.dtb_load_address:#018x}')
+        if self.header_version > 3:
+            lines.append(
+                f'vendor ramdisk table size: {self.vendor_ramdisk_table_size}')
+            lines.append('vendor ramdisk table: [')
+            indent = lambda level: ' ' * 4 * level
+            for entry in self.vendor_ramdisk_table:
+                (output_ramdisk_name, ramdisk_size, ramdisk_offset,
+                 ramdisk_type, ramdisk_name, board_id) = entry
+                lines.append(indent(1) + f'{output_ramdisk_name}: ''{')
+                lines.append(indent(2) + f'size: {ramdisk_size}')
+                lines.append(indent(2) + f'offset: {ramdisk_offset}')
+                lines.append(indent(2) + f'type: {ramdisk_type:#x}')
+                lines.append(indent(2) + f'name: {ramdisk_name}')
+                lines.append(indent(2) + 'board_id: [')
+                stride = 4
+                for row_idx in range(0, len(board_id), stride):
+                    row = board_id[row_idx:row_idx + stride]
+                    lines.append(
+                        indent(3) + ' '.join(f'{e:#010x},' for e in row))
+                lines.append(indent(2) + ']')
+                lines.append(indent(1) + '}')
+            lines.append(']')
+            lines.append(
+                f'vendor bootconfig size: {self.vendor_bootconfig_size}')
+
+        return '\n'.join(lines)
+
+    def format_mkbootimg_argument(self):
+        args = []
+        args.extend(['--header_version', str(self.header_version)])
+        args.extend(['--pagesize', f'{self.page_size:#010x}'])
+        args.extend(['--base', f'{0:#010x}'])
+        args.extend(['--kernel_offset', f'{self.kernel_load_address:#010x}'])
+        args.extend(['--ramdisk_offset', f'{self.ramdisk_load_address:#010x}'])
+        args.extend(['--tags_offset', f'{self.tags_load_address:#010x}'])
+        args.extend(['--dtb_offset', f'{self.dtb_load_address:#018x}'])
+        args.extend(['--vendor_cmdline', self.cmdline])
+        args.extend(['--board', self.product_name])
+
+        args.extend(['--dtb', os.path.join(self.image_dir, 'dtb')])
+
+        if self.header_version > 3:
+            args.extend(['--vendor_bootconfig',
+                         os.path.join(self.image_dir, 'bootconfig')])
+
+            for entry in self.vendor_ramdisk_table:
+                (output_ramdisk_name, _, _, ramdisk_type,
+                 ramdisk_name, board_id) = entry
+                args.extend(['--ramdisk_type', str(ramdisk_type)])
+                args.extend(['--ramdisk_name', ramdisk_name])
+                for idx, e in enumerate(board_id):
+                    if e:
+                        args.extend([f'--board_id{idx}', f'{e:#010x}'])
+                vendor_ramdisk_path = os.path.join(
+                    self.image_dir, output_ramdisk_name)
+                args.extend(['--vendor_ramdisk_fragment', vendor_ramdisk_path])
+        else:
+            args.extend(['--vendor_ramdisk',
+                         os.path.join(self.image_dir, 'vendor_ramdisk')])
+
+        return args
+
+
+def unpack_vendor_boot_image(args):
+    info = VendorBootImageInfoFormatter()
+    info.boot_magic = unpack('8s', args.boot_img.read(8))[0].decode()
+    info.header_version = unpack('I', args.boot_img.read(4))[0]
+    info.page_size = unpack('I', args.boot_img.read(4))[0]
+    info.kernel_load_address = unpack('I', args.boot_img.read(4))[0]
+    info.ramdisk_load_address = unpack('I', args.boot_img.read(4))[0]
+    info.vendor_ramdisk_size = unpack('I', args.boot_img.read(4))[0]
+    info.cmdline = cstr(unpack('2048s', args.boot_img.read(2048))[0].decode())
+    info.tags_load_address = unpack('I', args.boot_img.read(4))[0]
+    info.product_name = cstr(unpack('16s', args.boot_img.read(16))[0].decode())
+    info.header_size = unpack('I', args.boot_img.read(4))[0]
+    info.dtb_size = unpack('I', args.boot_img.read(4))[0]
+    info.dtb_load_address = unpack('Q', args.boot_img.read(8))[0]
+
+    # Convenient shorthand.
+    page_size = info.page_size
+    # The first pages contain the boot header
+    num_boot_header_pages = get_number_of_pages(info.header_size, page_size)
+    num_boot_ramdisk_pages = get_number_of_pages(
+        info.vendor_ramdisk_size, page_size)
+    num_boot_dtb_pages = get_number_of_pages(info.dtb_size, page_size)
+
+    ramdisk_offset_base = page_size * num_boot_header_pages
+    image_info_list = []
+
+    if info.header_version > 3:
+        info.vendor_ramdisk_table_size = unpack('I', args.boot_img.read(4))[0]
+        vendor_ramdisk_table_entry_num = unpack('I', args.boot_img.read(4))[0]
+        vendor_ramdisk_table_entry_size = unpack('I', args.boot_img.read(4))[0]
+        info.vendor_bootconfig_size = unpack('I', args.boot_img.read(4))[0]
+        num_vendor_ramdisk_table_pages = get_number_of_pages(
+            info.vendor_ramdisk_table_size, page_size)
+        vendor_ramdisk_table_offset = page_size * (
+            num_boot_header_pages + num_boot_ramdisk_pages + num_boot_dtb_pages)
+
+        vendor_ramdisk_table = []
+        vendor_ramdisk_symlinks = []
+        for idx in range(vendor_ramdisk_table_entry_num):
+            entry_offset = vendor_ramdisk_table_offset + (
+                vendor_ramdisk_table_entry_size * idx)
+            args.boot_img.seek(entry_offset)
+            ramdisk_size = unpack('I', args.boot_img.read(4))[0]
+            ramdisk_offset = unpack('I', args.boot_img.read(4))[0]
+            ramdisk_type = unpack('I', args.boot_img.read(4))[0]
+            ramdisk_name = cstr(unpack(
+                f'{VENDOR_RAMDISK_NAME_SIZE}s',
+                args.boot_img.read(VENDOR_RAMDISK_NAME_SIZE))[0].decode())
+            board_id = unpack(
+                f'{VENDOR_RAMDISK_TABLE_ENTRY_BOARD_ID_SIZE}I',
+                args.boot_img.read(
+                    4 * VENDOR_RAMDISK_TABLE_ENTRY_BOARD_ID_SIZE))
+            output_ramdisk_name = f'vendor_ramdisk{idx:02}'
+
+            image_info_list.append((ramdisk_offset_base + ramdisk_offset,
+                                    ramdisk_size, output_ramdisk_name))
+            vendor_ramdisk_symlinks.append((output_ramdisk_name, ramdisk_name))
+            vendor_ramdisk_table.append(
+                (output_ramdisk_name, ramdisk_size, ramdisk_offset,
+                 ramdisk_type, ramdisk_name, board_id))
+
+        info.vendor_ramdisk_table = vendor_ramdisk_table
+
+        bootconfig_offset = page_size * (num_boot_header_pages
+            + num_boot_ramdisk_pages + num_boot_dtb_pages
+            + num_vendor_ramdisk_table_pages)
+        image_info_list.append((bootconfig_offset, info.vendor_bootconfig_size,
+            'bootconfig'))
+    else:
+        image_info_list.append(
+            (ramdisk_offset_base, info.vendor_ramdisk_size, 'vendor_ramdisk'))
+
+    dtb_offset = page_size * (num_boot_header_pages + num_boot_ramdisk_pages
+                             ) # header + vendor_ramdisk
+    image_info_list.append((dtb_offset, info.dtb_size, 'dtb'))
+
+    create_out_dir(args.out)
+    for offset, size, name in image_info_list:
+        extract_image(offset, size, args.boot_img, os.path.join(args.out, name))
+    info.image_dir = args.out
+
+    if info.header_version > 3:
+        vendor_ramdisk_by_name_dir = os.path.join(
+            args.out, 'vendor-ramdisk-by-name')
+        create_out_dir(vendor_ramdisk_by_name_dir)
+        for src, dst in vendor_ramdisk_symlinks:
+            src_pathname = os.path.join('..', src)
+            dst_pathname = os.path.join(
+                vendor_ramdisk_by_name_dir, f'ramdisk_{dst}')
+            if os.path.lexists(dst_pathname):
+                os.remove(dst_pathname)
+            os.symlink(src_pathname, dst_pathname)
+
+    return info
+
+
+def unpack_image(args):
+    boot_magic = unpack('8s', args.boot_img.read(8))[0].decode()
+    args.boot_img.seek(0)
+    if boot_magic == 'ANDROID!':
+        info = unpack_boot_image(args)
+    elif boot_magic == 'VNDRBOOT':
+        info = unpack_vendor_boot_image(args)
+    else:
+        raise ValueError(f'Not an Android boot image, magic: {boot_magic}')
+
+    if args.format == 'mkbootimg':
+        mkbootimg_args = info.format_mkbootimg_argument()
+        if args.null:
+            print('\0'.join(mkbootimg_args) + '\0', end='')
+        else:
+            print(shlex.join(mkbootimg_args))
+    else:
+        print(info.format_pretty_text())
+
+
+def get_unpack_usage():
+    return """Output format:
+
+  * info
+
+    Pretty-printed info-rich text format suitable for human inspection.
+
+  * mkbootimg
+
+    Output shell-escaped (quoted) argument strings that can be used to
+    reconstruct the boot image. For example:
+
+    $ unpack_bootimg --boot_img vendor_boot.img --out out --format=mkbootimg |
+        tee mkbootimg_args
+    $ sh -c "mkbootimg $(cat mkbootimg_args) --vendor_boot repacked.img"
+
+    vendor_boot.img and repacked.img would be equivalent.
+
+    If the -0 option is specified, output unescaped null-terminated argument
+    strings that are suitable to be parsed by a shell script (xargs -0 format):
+
+    $ unpack_bootimg --boot_img vendor_boot.img --out out --format=mkbootimg \\
+        -0 | tee mkbootimg_args
+    $ declare -a MKBOOTIMG_ARGS=()
+    $ while IFS= read -r -d '' ARG; do
+        MKBOOTIMG_ARGS+=("${ARG}")
+      done <mkbootimg_args
+    $ mkbootimg "${MKBOOTIMG_ARGS[@]}" --vendor_boot repacked.img
+"""
 
 
 def parse_cmdline():
     """parse command line arguments"""
     parser = ArgumentParser(
-        description='Unpacks boot.img/recovery.img, extracts the kernel,'
-        'ramdisk, second bootloader, recovery dtbo and dtb')
-    parser.add_argument(
-        '--boot_img',
-        help='path to boot image',
-        type=FileType('rb'),
-        required=True)
-    parser.add_argument('--out', help='path to out binaries', default='out')
+        formatter_class=RawDescriptionHelpFormatter,
+        description='Unpacks boot, recovery or vendor_boot image.',
+        epilog=get_unpack_usage(),
+    )
+    parser.add_argument('--boot_img', type=FileType('rb'), required=True,
+                        help='path to the boot, recovery or vendor_boot image')
+    parser.add_argument('--out', default='out',
+                        help='output directory of the unpacked images')
+    parser.add_argument('--format', choices=['info', 'mkbootimg'],
+                        default='info',
+                        help='text output format (default: info)')
+    parser.add_argument('-0', '--null', action='store_true',
+                        help='output null-terminated argument strings')
     return parser.parse_args()
 
 
 def main():
     """parse arguments and unpack boot image"""
     args = parse_cmdline()
-    create_out_dir(args.out)
-    unpack_bootimage(args)
+    unpack_image(args)
 
 
 if __name__ == '__main__':

commit d30e58a86c8d70042c6f0a14690d5029aaeaed92
Author: Damon Ding <damon.ding@rock-chips.com>
Date:   Fri Oct 22 17:55:07 2021 +0800

    drm/rockchip: rgb: fix the check of bus_format
    
    Add 'break' to fix the check of MEDIA_BUS_FMT_YUYV8_1X16.
    
    Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
    Change-Id: I5070ea74935c204ec89f94ccfa79612fd160146e

diff --git a/drivers/video/drm/rockchip_rgb.c b/drivers/video/drm/rockchip_rgb.c
index 4877ad0d6f..0778c8e632 100644
--- a/drivers/video/drm/rockchip_rgb.c
+++ b/drivers/video/drm/rockchip_rgb.c
@@ -160,6 +160,7 @@ static int rockchip_rgb_connector_init(struct display_state *state)
 	case MEDIA_BUS_FMT_VYUY8_1X16:
 		conn_state->output_mode = ROCKCHIP_OUT_MODE_BT1120;
 		conn_state->output_if = VOP_OUTPUT_IF_BT1120;
+		break;
 	case MEDIA_BUS_FMT_RGB888_1X24:
 	case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
 	default:

commit 1191de92eeab61089fd4ae6ef4207b8555eb8b10
Author: Nico Cheng <nico.cheng@rock-chips.com>
Date:   Fri Oct 22 15:54:05 2021 +0800

    android: fix normative issues with parameter passing
    
    In the case of non-AB firmware boot, the androidboot.slot_suffix
    parameter will not be passed.
    
    Signed-off-by: Nico Cheng <nico.cheng@rock-chips.com>
    Change-Id: Ie6c44b838c97ffbb145c1bed615fafae01415c69

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 087855e02c..d967ec09d5 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -406,6 +406,7 @@ char *android_assemble_cmdline(const char *slot_suffix,
 	/* The |slot_suffix| needs to be passed to the kernel to know what
 	 * slot to boot from.
 	 */
+#ifdef CONFIG_ANDROID_AB
 	if (slot_suffix) {
 		allocated_suffix = malloc(strlen(ANDROID_ARG_SLOT_SUFFIX) +
 					  strlen(slot_suffix) + 1);
@@ -415,7 +416,7 @@ char *android_assemble_cmdline(const char *slot_suffix,
 		strcat(allocated_suffix, slot_suffix);
 		*(current_chunk++) = allocated_suffix;
 	}
-
+#endif
 	serialno = env_get("serial#");
 	if (serialno) {
 		allocated_serialno = malloc(strlen(ANDROID_ARG_SERIALNO) +

commit a4ec4b186a7319bb648cf891db3e31e38e0ef140
Author: Nico Cheng <nico.cheng@rock-chips.com>
Date:   Wed Oct 13 13:17:27 2021 +0800

    mmc: sdhci: rockchip: REN Enable on STRB Line for HS400
    
    This patch is used to enable STRB line, HS400 mode cannot run
    without this configuration.
    
    Signed-off-by: Nico Cheng <nico.cheng@rock-chips.com>
    Change-Id: I8542f5bca065ca321cb8050e242195b5af9c7067

diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index 378eb97d5d..c7071d8165 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -138,6 +138,9 @@ static void rk3399_emmc_phy_power_on(struct rockchip_emmc_phy *phy, u32 clock)
 	writel(RK_CLRSETBITS(3 << 12, freqsel << 12), &phy->emmcphy_con[0]);
 	writel(RK_CLRSETBITS(1 << 1, 1 << 1), &phy->emmcphy_con[6]);
 
+	/* REN Enable on STRB Line for HS400 */
+	writel(RK_CLRSETBITS(0, 1 << 9), &phy->emmcphy_con[2]);
+
 	start = get_timer(0);
 
 	do {

commit 56082ed3c1516b995be5007abd883b99db619b27
Author: David Wu <david.wu@rock-chips.com>
Date:   Fri Oct 22 16:40:32 2021 +0800

    i2c: rk_i2c: Fixed the stop issue
    
    The best order should be stop first, then disable i2c,
    not every time disable, then stop i2c.
    
    Change-Id: I2df442f8d9912a31e662d4da33e80ed5c74f847e
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/i2c/rk_i2c.c b/drivers/i2c/rk_i2c.c
index 1631bd1340..cf5dbe68fa 100644
--- a/drivers/i2c/rk_i2c.c
+++ b/drivers/i2c/rk_i2c.c
@@ -90,7 +90,7 @@ static void rk_i2c_show_regs(struct i2c_regs *regs)
 #endif
 }
 
-static int rk_i2c_send_start_bit(struct rk_i2c *i2c)
+static int rk_i2c_send_start_bit(struct rk_i2c *i2c, u32 con)
 {
 	struct i2c_regs *regs = i2c->regs;
 	ulong start;
@@ -98,8 +98,8 @@ static int rk_i2c_send_start_bit(struct rk_i2c *i2c)
 	debug("I2c Send Start bit.\n");
 	writel(I2C_IPD_ALL_CLEAN, &regs->ipd);
 
-	writel(I2C_CON_EN | I2C_CON_START, &regs->con);
 	writel(I2C_STARTIEN, &regs->ien);
+	writel(I2C_CON_EN | I2C_CON_START | con, &regs->con);
 
 	start = get_timer(0);
 	while (1) {
@@ -115,6 +115,9 @@ static int rk_i2c_send_start_bit(struct rk_i2c *i2c)
 		udelay(1);
 	}
 
+	/* clean start bit */
+	writel(I2C_CON_EN | con, &regs->con);
+
 	return 0;
 }
 
@@ -143,6 +146,7 @@ static int rk_i2c_send_stop_bit(struct rk_i2c *i2c)
 		udelay(1);
 	}
 
+	udelay(1);
 	return 0;
 }
 
@@ -154,7 +158,7 @@ static inline void rk_i2c_disable(struct rk_i2c *i2c)
 }
 
 static int rk_i2c_read(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len,
-		       uchar *buf, uint b_len)
+		       uchar *buf, uint b_len, bool snd)
 {
 	struct i2c_regs *regs = i2c->regs;
 	uchar *pbuf = buf;
@@ -165,15 +169,15 @@ static int rk_i2c_read(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len,
 	uint con = 0;
 	uint rxdata;
 	uint i, j;
-	int err;
+	int err = 0;
 	bool snd_chunk = false;
 
 	debug("rk_i2c_read: chip = %d, reg = %d, r_len = %d, b_len = %d\n",
 	      chip, reg, r_len, b_len);
 
-	err = rk_i2c_send_start_bit(i2c);
-	if (err)
-		return err;
+	/* If the second message for TRX read, resetting internal state. */
+	if (snd)
+		writel(0, &regs->con);
 
 	writel(I2C_MRXADDR_SET(1, chip << 1 | 1), &regs->mrxaddr);
 	if (r_len == 0) {
@@ -200,16 +204,21 @@ static int rk_i2c_read(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len,
 		words_xferred = DIV_ROUND_UP(bytes_xferred, 4);
 
 		/*
-		 * make sure we are in plain RX mode if we read a second chunk
+		 * make sure we are in plain RX mode if we read a second chunk;
+		 * and first rx read need to send start bit.
 		 */
-		if (snd_chunk)
+		if (snd_chunk) {
 			con |= I2C_CON_MOD(I2C_MODE_RX);
-		else
+			writel(con, &regs->con);
+		} else {
 			con |= I2C_CON_MOD(I2C_MODE_TRX);
+			err = rk_i2c_send_start_bit(i2c, con);
+			if (err)
+				return err;
+		}
 
-		writel(con, &regs->con);
-		writel(bytes_xferred, &regs->mrxcnt);
 		writel(I2C_MBRFIEN | I2C_NAKRCVIEN, &regs->ien);
+		writel(bytes_xferred, &regs->mrxcnt);
 
 		start = get_timer(0);
 		while (1) {
@@ -246,8 +255,6 @@ static int rk_i2c_read(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len,
 	}
 
 i2c_exit:
-	rk_i2c_disable(i2c);
-
 	return err;
 }
 
@@ -255,20 +262,18 @@ static int rk_i2c_write(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len,
 			uchar *buf, uint b_len)
 {
 	struct i2c_regs *regs = i2c->regs;
-	int err;
+	int err = 0;
 	uchar *pbuf = buf;
 	uint bytes_remain_len = b_len + r_len + 1;
 	uint bytes_xferred = 0;
 	uint words_xferred = 0;
+	bool next = false;
 	ulong start;
 	uint txdata;
 	uint i, j;
 
 	debug("rk_i2c_write: chip = %d, reg = %d, r_len = %d, b_len = %d\n",
 	      chip, reg, r_len, b_len);
-	err = rk_i2c_send_start_bit(i2c);
-	if (err)
-		return err;
 
 	while (bytes_remain_len) {
 		if (bytes_remain_len > RK_I2C_FIFO_SIZE)
@@ -296,9 +301,17 @@ static int rk_i2c_write(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len,
 			debug("I2c Write TXDATA[%d] = 0x%08x\n", i, txdata);
 		}
 
-		writel(I2C_CON_EN | I2C_CON_MOD(I2C_MODE_TX), &regs->con);
-		writel(bytes_xferred, &regs->mtxcnt);
+		/* If the write is the first, need to send start bit */
+		if (!next) {
+			err = rk_i2c_send_start_bit(i2c, I2C_CON_EN | I2C_CON_MOD(I2C_MODE_TX));
+			if (err)
+				return err;
+			next = true;
+		} else {
+			writel(I2C_CON_EN | I2C_CON_MOD(I2C_MODE_TX), &regs->con);
+		}
 		writel(I2C_MBTFIEN | I2C_NAKRCVIEN, &regs->ien);
+		writel(bytes_xferred, &regs->mtxcnt);
 
 		start = get_timer(0);
 		while (1) {
@@ -324,8 +337,6 @@ static int rk_i2c_write(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len,
 	}
 
 i2c_exit:
-	rk_i2c_disable(i2c);
-
 	return err;
 }
 
@@ -333,28 +344,40 @@ static int rockchip_i2c_xfer(struct udevice *bus, struct i2c_msg *msg,
 			     int nmsgs)
 {
 	struct rk_i2c *i2c = dev_get_priv(bus);
+	bool snd = false; /* second message for TRX read */
 	int ret;
 
 	debug("i2c_xfer: %d messages\n", nmsgs);
+	if (nmsgs > 2 || ((nmsgs == 2) && (msg->flags & I2C_M_RD))) {
+		debug("Not support more messages now, split them\n");
+		return -EINVAL;
+	}
+
 	for (; nmsgs > 0; nmsgs--, msg++) {
 		debug("i2c_xfer: chip=0x%x, len=0x%x\n", msg->addr, msg->len);
+
 		if (msg->flags & I2C_M_RD) {
+			/* If snd is true, it is TRX mode. */
 			ret = rk_i2c_read(i2c, msg->addr, 0, 0, msg->buf,
-					  msg->len);
+					  msg->len, snd);
 		} else {
+			snd = true;
 			ret = rk_i2c_write(i2c, msg->addr, 0, 0, msg->buf,
 					   msg->len);
 		}
+
 		if (ret) {
 			debug("i2c_write: error sending\n");
-			return -EREMOTEIO;
+			ret = -EREMOTEIO;
+			goto exit;
 		}
 	}
 
+exit:
 	rk_i2c_send_stop_bit(i2c);
 	rk_i2c_disable(i2c);
 
-	return 0;
+	return ret;
 }
 
 int rockchip_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)

commit c066e3f7f0f76ed4f86b6bbf6647ad6b9c754eb3
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Fri Oct 22 09:34:17 2021 +0800

    pinctrl: rockchip: fix for rk3308bs drive strength
    
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
    Change-Id: I9c5ce44d3759bccb3420f56af89c072b3f4c9358

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 00148d7a37..ee3e4f3ab5 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -71,6 +71,7 @@ enum rockchip_pin_drv_type {
 	DRV_TYPE_IO_1V8_ONLY,
 	DRV_TYPE_IO_1V8_3V0_AUTO,
 	DRV_TYPE_IO_3V3_ONLY,
+	DRV_TYPE_IO_SMIC,
 	DRV_TYPE_MAX
 };
 
@@ -2466,12 +2467,34 @@ static void rk3399_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
 		*bit = (pin_num % 8) * 2;
 }
 
+#define RK3308_SLEW_RATE_GRF_OFFSET		0x150
+#define RK3308_SLEW_RATE_BANK_STRIDE		16
+#define RK3308_SLEW_RATE_PINS_PER_GRF_REG	8
+
+static void rk3308_calc_slew_rate_reg_and_bit(struct rockchip_pin_bank *bank,
+					      int pin_num,
+					      struct regmap **regmap,
+					      int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	int pins_per_reg;
+
+	*regmap = priv->regmap_base;
+	*reg = RK3308_SLEW_RATE_GRF_OFFSET;
+	*reg += (bank->bank_num) * RK3308_SLEW_RATE_BANK_STRIDE;
+	pins_per_reg = RK3308_SLEW_RATE_PINS_PER_GRF_REG;
+
+	*reg += ((pin_num / pins_per_reg) * 4);
+	*bit = pin_num % pins_per_reg;
+}
+
 static int rockchip_perpin_drv_list[DRV_TYPE_MAX][8] = {
 	{ 2, 4, 8, 12, -1, -1, -1, -1 },
 	{ 3, 6, 9, 12, -1, -1, -1, -1 },
 	{ 5, 10, 15, 20, -1, -1, -1, -1 },
 	{ 4, 6, 8, 10, 12, 14, 16, 18 },
-	{ 4, 7, 10, 13, 16, 19, 22, 26 }
+	{ 4, 7, 10, 13, 16, 19, 22, 26 },
+	{ 0, 2, 4, 6, 6, 8, 10, 12 }
 };
 
 static int rockchip_set_drive_perpin(struct rockchip_pin_bank *bank,
@@ -2495,6 +2518,8 @@ static int rockchip_set_drive_perpin(struct rockchip_pin_bank *bank,
 		ret = strength;
 		goto config;
 	}
+	if (soc_is_rk3308bs())
+		drv_type = DRV_TYPE_IO_SMIC;
 
 	ret = -EINVAL;
 	for (i = 0; i < ARRAY_SIZE(rockchip_perpin_drv_list[drv_type]); i++) {
@@ -2513,6 +2538,25 @@ static int rockchip_set_drive_perpin(struct rockchip_pin_bank *bank,
 	}
 
 	switch (drv_type) {
+	case DRV_TYPE_IO_SMIC:
+		if (ctrl->type == RK3308) { /* RK3308B-S */
+			int regval = ret;
+
+			data = 0x3 << (bit + 16);
+			data |= ((regval & 0x3) << bit);
+
+			ret = regmap_write(regmap, reg, data);
+			if (ret < 0)
+				return ret;
+
+			rk3308_calc_slew_rate_reg_and_bit(bank, pin_num, &regmap, &reg, &bit);
+			data = BIT(bit + 16) | (((regval > 3) ? 1 : 0) << bit);
+
+			return regmap_write(regmap, reg, data);
+		}
+
+		dev_err(info->dev, "unsupported type DRV_TYPE_IO_SMIC\n");
+		return -EINVAL;
 	case DRV_TYPE_IO_1V8_3V0_AUTO:
 	case DRV_TYPE_IO_3V3_ONLY:
 		rmask_bits = RK3399_DRV_3BITS_PER_PIN;
@@ -3005,7 +3049,7 @@ rockchip_pinctrl_get_soc_data(struct udevice *dev)
 	int grf_offs, pmu_offs, drv_grf_offs, drv_pmu_offs, i, j;
 	u32 nr_pins;
 
-	if (soc_is_rk3308b())
+	if (soc_is_rk3308b() || soc_is_rk3308bs())
 		ctrl = &rk3308b_pin_ctrl;
 
 	grf_offs = ctrl->grf_mux_offset;

commit 91e56900299f4cc2b5b0b49d511f0351eab4d45a
Author: Lei Chen <lei.chen@rock-chips.com>
Date:   Mon Oct 11 08:59:43 2021 +0800

    drm/rockchip: hdmi: optionally force the output format to be RGB
    
    Support HDMI can choose to output only RGB format
    
    Signed-off-by: Lei Chen <lei.chen@rock-chips.com>
    Change-Id: I32affcc6507aac9ced1fcae22411412d96bbd083

diff --git a/drivers/video/drm/dw_hdmi.c b/drivers/video/drm/dw_hdmi.c
index 2bf4f7b79b..10a593870a 100644
--- a/drivers/video/drm/dw_hdmi.c
+++ b/drivers/video/drm/dw_hdmi.c
@@ -202,6 +202,7 @@ struct dw_hdmi {
 	u8 (*read)(struct dw_hdmi *hdmi, int offset);
 
 	bool hdcp1x_enable;
+	bool output_bus_format_rgb;
 };
 
 static void dw_hdmi_writel(struct dw_hdmi *hdmi, u8 val, int offset)
@@ -2309,6 +2310,12 @@ int rockchip_dw_hdmi_init(struct display_state *state)
 	else
 		hdmi->hdcp1x_enable = false;
 
+	if (ofnode_read_bool(hdmi_node, "force_output_bus_format_RGB") ||
+	    ofnode_read_bool(hdmi_node, "unsupported-yuv-input"))
+		hdmi->output_bus_format_rgb = true;
+	else
+		hdmi->output_bus_format_rgb = false;
+
 	ddc_node = of_parse_phandle(ofnode_to_np(hdmi_node), "ddc-i2c-bus", 0);
 	if (ddc_node) {
 		uclass_get_device_by_ofnode(UCLASS_I2C, np_to_ofnode(ddc_node),
@@ -2460,7 +2467,7 @@ int rockchip_dw_hdmi_get_timing(struct display_state *state)
 
 	drm_mode_sort(&hdmi->edid_data);
 	drm_rk_selete_output(&hdmi->edid_data, conn_state, &bus_format,
-			     overscan, hdmi->dev_type);
+			     overscan, hdmi->dev_type, hdmi->output_bus_format_rgb);
 
 	*mode = *hdmi->edid_data.preferred_mode;
 	hdmi->vic = drm_match_cea_mode(mode);
diff --git a/drivers/video/drm/dw_hdmi.h b/drivers/video/drm/dw_hdmi.h
index fa2dbaa353..f002dea1c0 100644
--- a/drivers/video/drm/dw_hdmi.h
+++ b/drivers/video/drm/dw_hdmi.h
@@ -1408,7 +1408,8 @@ void drm_rk_selete_output(struct hdmi_edid_data *edid_data,
 			  struct connector_state *conn_state,
 			  unsigned int *bus_format,
 			  struct overscan *overscan,
-			  enum dw_hdmi_devtype dev_type);
+			  enum dw_hdmi_devtype dev_type,
+			  bool output_bus_format_rgb);
 void inno_dw_hdmi_set_domain(void *grf, int status);
 void dw_hdmi_set_iomux(void *grf, int dev_type);
 
diff --git a/drivers/video/drm/rockchip_dw_hdmi.c b/drivers/video/drm/rockchip_dw_hdmi.c
index 31fa63c937..3bf3b2f60d 100644
--- a/drivers/video/drm/rockchip_dw_hdmi.c
+++ b/drivers/video/drm/rockchip_dw_hdmi.c
@@ -188,7 +188,8 @@ static const struct dw_hdmi_phy_config rockchip_phy_config[] = {
 
 static unsigned int drm_rk_select_color(struct hdmi_edid_data *edid_data,
 					struct base_screen_info *screen_info,
-					enum dw_hdmi_devtype dev_type)
+					enum dw_hdmi_devtype dev_type,
+					bool output_bus_format_rgb)
 {
 	struct drm_display_info *info = &edid_data->display_info;
 	struct drm_display_mode *mode = edid_data->preferred_mode;
@@ -237,6 +238,9 @@ static unsigned int drm_rk_select_color(struct hdmi_edid_data *edid_data,
 		break;
 	}
 
+	if (output_bus_format_rgb)
+		color_format = DRM_HDMI_OUTPUT_DEFAULT_RGB;
+
 	if (color_format == DRM_HDMI_OUTPUT_DEFAULT_RGB &&
 	    info->edid_hdmi_dc_modes & DRM_EDID_HDMI_DC_30)
 		support_dc = true;
@@ -326,7 +330,8 @@ void drm_rk_selete_output(struct hdmi_edid_data *edid_data,
 			  struct connector_state *conn_state,
 			  unsigned int *bus_format,
 			  struct overscan *overscan,
-			  enum dw_hdmi_devtype dev_type)
+			  enum dw_hdmi_devtype dev_type,
+			  bool output_bus_format_rgb)
 {
 	int ret, i, screen_size;
 	struct base_disp_info base_parameter;
@@ -347,7 +352,7 @@ void drm_rk_selete_output(struct hdmi_edid_data *edid_data,
 	overscan->top_margin = max_scan;
 	overscan->bottom_margin = max_scan;
 
-	if (dev_type == RK3288_HDMI)
+	if (dev_type == RK3288_HDMI || output_bus_format_rgb)
 		*bus_format = MEDIA_BUS_FMT_RGB888_1X24;
 	else
 		*bus_format = MEDIA_BUS_FMT_YUV8_1X24;
@@ -446,7 +451,7 @@ null_basep:
 	drm_rk_select_mode(edid_data, screen_info);
 
 	*bus_format = drm_rk_select_color(edid_data, screen_info,
-					  dev_type);
+					  dev_type, output_bus_format_rgb);
 }
 
 void inno_dw_hdmi_set_domain(void *grf, int status)

commit 2daa60ee5d2defdf6e0c18d688523efb9f1eda2d
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Sun Sep 26 21:09:23 2021 +0800

    drivers: rockusb: Support NVME usb download
    
    Change-Id: I51a4d7b64ea496866c2c20f3084e89112256f3cf
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index 67bc488543..38ab7c1e76 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -643,6 +643,11 @@ static int rkusb_do_get_storage_info(struct fsg_common *common,
 	case IF_TYPE_RKNAND:
 		media = BOOT_TYPE_NAND;
 		break;
+
+	case IF_TYPE_NVME:
+		media = BOOT_TYPE_PCIE;
+		break;
+
 	default:
 		break;
 	}
@@ -676,7 +681,7 @@ static int rkusb_do_read_capacity(struct fsg_common *common,
 	 * bit[10:63}: Reserved.
 	 */
 	memset((void *)&buf[0], 0, len);
-	if (type == IF_TYPE_MMC || type == IF_TYPE_SD)
+	if (type == IF_TYPE_MMC || type == IF_TYPE_SD || type == IF_TYPE_NVME)
 		buf[0] = BIT(0) | BIT(2) | BIT(4);
 	else
 		buf[0] = BIT(0) | BIT(4);

commit 02f0bf80df19e1a146aa1a46f3387e854ff9bf92
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Sun Sep 26 20:18:13 2021 +0800

    drivers: pci: change to get clock by index
    
    The clock name may be removed from detecting in default.
    
    Change-Id: Ie08b9e1fe2bce207d1ea91fe2153816fac05fd0c
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/phy/phy-rockchip-snps-pcie3.c b/drivers/phy/phy-rockchip-snps-pcie3.c
index 843f269e85..afe38bf5a1 100644
--- a/drivers/phy/phy-rockchip-snps-pcie3.c
+++ b/drivers/phy/phy-rockchip-snps-pcie3.c
@@ -116,19 +116,19 @@ static int rockchip_p3phy_probe(struct udevice *dev)
 		return ret;
 	}
 
-	ret = clk_get_by_name(dev, "refclk_m", &priv->ref_clk_m);
+	ret = clk_get_by_index(dev, 0, &priv->ref_clk_m);
 	if (ret) {
 		dev_err(dev, "failed to find ref clock M\n");
 		return PTR_ERR(&priv->ref_clk_m);
 	}
 
-	ret = clk_get_by_name(dev, "refclk_n", &priv->ref_clk_n);
+	ret = clk_get_by_index(dev, 1, &priv->ref_clk_n);
 	if (ret) {
 		dev_err(dev, "failed to find ref clock N\n");
 		return PTR_ERR(&priv->ref_clk_n);
 	}
 
-	ret = clk_get_by_name(dev, "pclk", &priv->pclk);
+	ret = clk_get_by_index(dev, 2, &priv->pclk);
 	if (ret) {
 		dev_err(dev, "failed to find pclk\n");
 		return PTR_ERR(&priv->pclk);

commit 7ee2a044efad125126d005ceb6c3604f99d18063
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Sep 27 19:49:00 2021 +0800

    nvme: Fix error in nvme_setup_prps
    
    Consulting to "NVM Express® Base Specification, revision 2.0".
    
    If more PRP List pages are required, then the last entry of
    the PRP List contains the Page Base Address of the next PRP
    List page. The next PRP List page shall be memory page aligned.
    
    Change-Id: Iea14d1fdd56dcd7674565d29b827c242301a0600
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c
index 470243257a..55600c87eb 100644
--- a/drivers/nvme/nvme.c
+++ b/drivers/nvme/nvme.c
@@ -95,7 +95,7 @@ static int nvme_setup_prps(struct nvme_dev *dev, u64 *prp2,
 	}
 
 	nprps = DIV_ROUND_UP(length, page_size);
-	num_pages = DIV_ROUND_UP(nprps, prps_per_page);
+	num_pages = DIV_ROUND_UP(nprps + 1, prps_per_page);
 
 	if (nprps > dev->prp_entry_num) {
 		free(dev->prp_pool);
@@ -114,10 +114,11 @@ static int nvme_setup_prps(struct nvme_dev *dev, u64 *prp2,
 	prp_pool = dev->prp_pool;
 	i = 0;
 	while (nprps) {
-		if (i == ((page_size >> 3) - 1)) {
-			*(prp_pool + i) = cpu_to_le64((ulong)prp_pool +
+		if (i == prps_per_page) {
+			*(prp_pool + i) = *(prp_pool + i - 1);
+			*(prp_pool + i - 1) = cpu_to_le64((ulong)prp_pool +
 					page_size);
-			i = 0;
+			i = 1;
 			prp_pool += page_size;
 		}
 		*(prp_pool + i++) = cpu_to_le64(dma_addr);

commit 2a01f66bc7ccbcb21725782afc0c9dfc78f10305
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Sun Sep 26 16:55:14 2021 +0800

    nvme: Enable FUA
    
    Most NVME devcies maintain data in internal cache for an uncertain
    times, and u-boot has no method to force NVME to flush cache.
    So this patch adds FUA to avoid data loss caused by power off after data
    programming.
    
    Change-Id: Ic581ec99f46b6dfa2e0b1922e670a333ac859e82
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c
index 7cb1bd4e4d..470243257a 100644
--- a/drivers/nvme/nvme.c
+++ b/drivers/nvme/nvme.c
@@ -757,6 +757,10 @@ static ulong nvme_blk_rw(struct udevice *udev, lbaint_t blknr,
 	c.rw.appmask = 0;
 	c.rw.metadata = 0;
 
+	/* Enable FUA for data integrity if vwc is enabled */
+	if (dev->vwc)
+		c.rw.control |= NVME_RW_FUA;
+
 	while (total_lbas) {
 		if (total_lbas < lbas) {
 			lbas = (u16)total_lbas;

commit 1af1a3cf4bfe9ebcd5f554d86ed8bf7dde218746
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Oct 21 20:09:30 2021 +0800

    common: Kconfig: add android features support menu
    
    So that the configs can be selected when execute "make menuconfig".
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ia785c383da123c16ad6cb773ccd57d6240ff1fa5

diff --git a/common/Kconfig b/common/Kconfig
index 86904f1d5e..bfb614b720 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -595,6 +595,8 @@ config BOARD_EARLY_INIT_R
 	  in the post-relocation init sequence.
 
 endmenu
+
+menu "Android features support"
 config ANDROID_BOOTLOADER
 	bool "Support for Android Bootloader boot flow"
 	default n
@@ -654,6 +656,7 @@ config ANDROID_BOOT_IMAGE_HASH
 	help
 	  This enables support for Android image hash verify, the mkbootimg always use
 	  SHA1 for images.
+endmenu
 
 config SKIP_RELOCATE_UBOOT
 	bool "Skip U-Boot relocation"

commit 361684bfbd0745f97209f808faebfbf22a0c40f7
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Thu Oct 14 20:18:14 2021 +0800

    drivers: rkflash: Recheck the cache only the spinand devices in need
    
    The operation of reading back flash cache after programing is not
    universal. At present, only ESMT devices are found to have this anomaly.
    
    Change-Id: I1e08c36c556ca3a088db56967ac3b0ddb291a8e8
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/sfc_nand.c b/drivers/rkflash/sfc_nand.c
index c89566d9cf..7f2e6ed9bd 100644
--- a/drivers/rkflash/sfc_nand.c
+++ b/drivers/rkflash/sfc_nand.c
@@ -790,7 +790,7 @@ u32 sfc_nand_prog_page_raw(u8 cs, u32 addr, u32 *p_page_buf)
 	 * is detected by cache recheck, it's better to wait a second for a reliable
 	 * hardware environment to avoid abnormal data written to flash array.
 	 */
-	if (p_nand_info->id0 != MID_XTX) {
+	if (p_nand_info->id0 == MID_GIGADEV) {
 		sfc_nand_read_cache(addr, (u32 *)sfc_nand_dev.recheck_buffer, 0, data_area_size);
 		if (memcmp(sfc_nand_dev.recheck_buffer, p_page_buf, data_area_size)) {
 			rkflash_print_error("%s %x cache bitflip\n", __func__, addr);

commit bf620bf68c4b736514f68a6a10d2fb870503836f
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue Oct 19 11:47:55 2021 +0800

    drivers: rkflash: Support new spiflash
    
    1.spinand: GD5F1GQ5REYIG, GD5F2GQ5REYIG, GD5F2GM7RxG, GD5F2GM7UxG,
    DS35M2GA-IB, DS35Q2GB-IB, DS35M1GB-IB, TX25G01, F35SQA001G
    2.spinor: GD25Q64E, GD25LQ255E, GD25LQ256C, GD25LB512MEYIG, XM25QH64C,
    XM25QH128C, XM25QH256C, XM25QU128C, XM25QU64C, W25Q128JWSQ, W25Q256JWEQ
    W25Q256JWEQ, P25Q32SL, GM25Q128A
    
    Change-Id: I20423b9075d16e1102ea1083aa23f6070430672f
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/sfc_nand.c b/drivers/rkflash/sfc_nand.c
index 915333712c..c89566d9cf 100644
--- a/drivers/rkflash/sfc_nand.c
+++ b/drivers/rkflash/sfc_nand.c
@@ -67,6 +67,14 @@ static struct nand_info spi_nand_tbl[] = {
 	{ 0xC8, 0x55, 0x00, 4, 0x40, 2, 2048, 0x4C, 20, 0x4, 1, { 0x04, 0x08, 0X14, 0x18 }, &sfc_nand_get_ecc_status2 },
 	/* GD5F1GQ4UExxH */
 	{ 0xC8, 0xD9, 0x00, 4, 0x40, 1, 1024, 0x0C, 18, 0x8, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status3 },
+	/* GD5F1GQ5REYIG */
+	{ 0xC8, 0x41, 0x00, 4, 0x40, 1, 1024, 0x4C, 18, 0x4, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status2 },
+	/* GD5F2GQ5REYIG */
+	{ 0xC8, 0x42, 0x00, 4, 0x40, 1, 2048, 0x4C, 19, 0x4, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status2 },
+	/* GD5F2GM7RxG */
+	{ 0xC8, 0x82, 0x00, 4, 0x40, 1, 2048, 0x0C, 19, 0x8, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status2 },
+	/* GD5F2GM7UxG */
+	{ 0xC8, 0x92, 0x00, 4, 0x40, 1, 2048, 0x0C, 19, 0x8, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status2 },
 
 	/* W25N01GV */
 	{ 0xEF, 0xAA, 0x21, 4, 0x40, 1, 1024, 0x4C, 18, 0x1, 0, { 0x04, 0x14, 0x24, 0xFF }, &sfc_nand_get_ecc_status1 },
@@ -102,6 +110,8 @@ static struct nand_info spi_nand_tbl[] = {
 	{ 0xCD, 0xEB, 0x00, 4, 0x40, 1, 2048, 0x4C, 19, 0x4, 0, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
 	/* FS35ND04G-S2Y2 1*4096 */
 	{ 0xCD, 0xEC, 0x00, 4, 0x40, 2, 2048, 0x4C, 20, 0x4, 0, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
+	/* F35SQA001G */
+	{ 0xCD, 0x71, 0x00, 4, 0x40, 1, 1024, 0x4C, 18, 0x1, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
 
 	/* DS35Q1GA-IB */
 	{ 0xE5, 0x71, 0x00, 4, 0x40, 1, 1024, 0x0C, 18, 0x4, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
@@ -109,8 +119,12 @@ static struct nand_info spi_nand_tbl[] = {
 	{ 0xE5, 0x72, 0x00, 4, 0x40, 2, 1024, 0x0C, 19, 0x4, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
 	/* DS35M1GA-1B */
 	{ 0xE5, 0x21, 0x00, 4, 0x40, 1, 1024, 0x0C, 18, 0x4, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
+	/* DS35M2GA-IB */
+	{ 0xE5, 0x22, 0x00, 4, 0x40, 2, 1024, 0x0C, 19, 0x4, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
 	/* DS35Q2GB-IB */
 	{ 0xE5, 0xF2, 0x00, 4, 0x40, 2, 1024, 0x0C, 19, 0x8, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status6 },
+	/* DS35M1GB-IB */
+	{ 0xE5, 0xA1, 0x00, 4, 0x40, 1, 1024, 0x0C, 18, 0x8, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status6 },
 
 	/* EM73C044VCC-H */
 	{ 0xD5, 0x22, 0x00, 4, 0x40, 1, 1024, 0x0C, 18, 0x8, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
@@ -164,6 +178,8 @@ static struct nand_info spi_nand_tbl[] = {
 	{ 0xBF, 0x21, 0x00, 4, 0x40, 1, 1024, 0x40, 18, 0x4, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status8 },
 	/* SGM7000I-S24W1GH */
 	{ 0xEA, 0xC1, 0x00, 4, 0x40, 1, 1024, 0x0C, 18, 0x4, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
+	/* TX25G01 */
+	{ 0xA1, 0xF1, 0x00, 4, 0x40, 1, 1024, 0x0C, 18, 0x4, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status8 },
 };
 
 static struct nand_info *p_nand_info;
diff --git a/drivers/rkflash/sfc_nor.c b/drivers/rkflash/sfc_nor.c
index a934f27741..713ce69f26 100644
--- a/drivers/rkflash/sfc_nor.c
+++ b/drivers/rkflash/sfc_nor.c
@@ -14,7 +14,7 @@
 static struct flash_info spi_flash_tbl[] = {
 	/* GD25Q32B */
 	{ 0xc84016, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 13, 9, 0 },
-	/* GD25Q64B */
+	/* GD25Q64B/E */
 	{ 0xc84017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 14, 9, 0 },
 	/* GD25Q127C and GD25Q128C/E */
 	{ 0xc84018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 9, 0 },
@@ -28,6 +28,10 @@ static struct flash_info spi_flash_tbl[] = {
 	{ 0xc86016, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 13, 9, 0 },
 	/* GD25B512MEYIG */
 	{ 0xc8471A, 128, 8, 0x13, 0x12, 0x6C, 0x34, 0x21, 0xDC, 0x1C, 17, 0, 0 },
+	/* GD25LQ255E and GD25LQ256C */
+	{ 0xc86019, 128, 8, 0x13, 0x12, 0x6C, 0x34, 0x21, 0xDC, 0x1D, 16, 9, 0 },
+	/* GD25LB512MEYIG */
+	{ 0xc8671A, 128, 8, 0x13, 0x12, 0x6C, 0x34, 0x21, 0xDC, 0x1C, 17, 0, 0 },
 
 	/* W25Q32JV */
 	{ 0xef4016, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 13, 9, 0 },
@@ -39,10 +43,12 @@ static struct flash_info spi_flash_tbl[] = {
 	{ 0xef4019, 128, 8, 0x13, 0x02, 0x6C, 0x32, 0x20, 0xD8, 0x3C, 16, 9, 0 },
 	/* W25Q32JW */
 	{ 0xef6016, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 13, 9, 0 },
-	/* W25Q256JWEQ*/
-	{ 0xef6019, 128, 8, 0x13, 0x02, 0x6C, 0x32, 0x20, 0xD8, 0x3C, 16, 9, 0 },
 	/* W25Q64FWSSIG */
 	{ 0xef6017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0 },
+	/* W25Q128JWSQ */
+	{ 0xef6018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 9, 0 },
+	/* W25Q256JWEQ*/
+	{ 0xef6019, 128, 8, 0x13, 0x02, 0x6C, 0x32, 0x20, 0xD8, 0x3C, 16, 9, 0 },
 	/* W25Q128JVSIM */
 	{ 0xef7018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 9, 0 },
 	/* W25Q256JVEM */
@@ -59,7 +65,7 @@ static struct flash_info spi_flash_tbl[] = {
 	/* MX25L51245GMI */
 	{ 0xc2201a, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x1E, 17, 6, 0 },
 	/* MX25U51245G */
-	{ 0xc2253a, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x1E, 17, 6, 0 },
+	{ 0xc2253a, 128, 8, 0x0C, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x1E, 17, 6, 0 },
 	/* MX25U3232F */
 	{ 0xc22536, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0E, 13, 6, 0 },
 	/* MX25U6432F */
@@ -71,6 +77,12 @@ static struct flash_info spi_flash_tbl[] = {
 
 	/* XM25QH32C */
 	{ 0x204016, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 13, 9, 0 },
+	/* XM25QH64C */
+	{ 0x204017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 14, 6, 0 },
+	/* XM25QH128C */
+	{ 0x204018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 15, 6, 0 },
+	/* XM25QH256C */
+	{ 0x204019, 128, 8, 0x13, 0x12, 0x6C, 0x34, 0x21, 0xDC, 0x1C, 16, 9, 0 },
 	/* XM25QH64B */
 	{ 0x206017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 14, 6, 0 },
 	/* XM25QH128B */
@@ -79,15 +91,19 @@ static struct flash_info spi_flash_tbl[] = {
 	{ 0x206019, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x1D, 16, 6, 0 },
 	/* XM25QH64A */
 	{ 0x207017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 0, 0 },
+	/* XM25QU128C */
+	{ 0x204118, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 9, 0 },
+	/* XM25QU64C */
+	{ 0x204117, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0 },
 
 	/* XT25F128A XM25QH128A */
 	{ 0x207018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 0, 0 },
-	/* XT25F64BSSIGU-5 */
+	/* XT25F64BSSIGU-5 XT25F64F */
 	{ 0x0b4017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 14, 9, 0 },
 	/* XT25F128BSSIGU */
 	{ 0x0b4018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 15, 9, 0 },
 	/* XT25F256BSFIGU */
-	{ 0x0b4019, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 16, 9, 0 },
+	{ 0x0b4019, 128, 8, 0x13, 0x12, 0x6C, 0x34, 0x21, 0xDC, 0x1C, 16, 9, 0 },
 	/* XT25F32BS */
 	{ 0x0b4016, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 13, 9, 0 },
 	/* XT25F16BS */
@@ -116,6 +132,8 @@ static struct flash_info spi_flash_tbl[] = {
 	{ 0xf83217, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 14, 9, 0 },
 	/* FM25M64C */
 	{ 0xf84317, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 14, 9, 0 },
+	/* P25Q32SL */
+	{ 0x856016, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 13, 9, 0 },
 
 	/* ZB25VQ64 */
 	{ 0x5e4017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0 },
@@ -145,6 +163,9 @@ static struct flash_info spi_flash_tbl[] = {
 	{ 0xf84218, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 15, 9, 0 },
 	/* DS25M4AB-1AIB4 */
 	{ 0xe54218, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 9, 0 },
+
+	/* GM25Q128A */
+	{ 0x1c4018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 9, 0 },
 };
 
 static int snor_write_en(void)

commit 68555ad7900c537e97b67a1c4387d93b59b08359
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Oct 18 14:49:27 2021 +0800

    common: android: fix recovery fail with two "androidboot.verifiedbootstate=orange"
    
    Fix the commit:beeaf83f44795c4adb4e6b4b86003789b21db70a
            common: android: support AVB_SLOT_VERIFY_FLAGS_NO_VBMETA_PARTITION
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I65d1e21c1b083b647178d42c95ed9d70ff1da4f3

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 672e597ed7..087855e02c 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -519,6 +519,15 @@ retry_verify:
 			flags,
 			AVB_HASHTREE_ERROR_MODE_RESTART,
 			&slot_data[0]);
+	if (verify_result != AVB_SLOT_VERIFY_RESULT_OK &&
+	    verify_result != AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED) {
+		if (retry_no_vbmeta_partition && strcmp(boot_partname, "recovery") == 0) {
+			printf("Verify recovery with vbmeta.\n");
+			flags &= ~AVB_SLOT_VERIFY_FLAGS_NO_VBMETA_PARTITION;
+			retry_no_vbmeta_partition = 0;
+			goto retry_verify;
+		}
+	}
 
 	strcat(verify_state, ANDROID_VERIFY_STATE);
 	switch (verify_result) {
@@ -548,16 +557,6 @@ retry_verify:
 		break;
 	}
 
-	if (verify_result != AVB_SLOT_VERIFY_RESULT_OK &&
-	    verify_result != AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED) {
-		if (retry_no_vbmeta_partition && strcmp(boot_partname, "recovery") == 0) {
-			printf("Verify recovery with vbmeta.\n");
-			flags &= ~AVB_SLOT_VERIFY_FLAGS_NO_VBMETA_PARTITION;
-			retry_no_vbmeta_partition = 0;
-			goto retry_verify;
-		}
-	}
-
 	if (!slot_data[0]) {
 		can_boot = 0;
 		goto out;

commit 0a7d5651d3f1ab026ac9d2efb6ad2b5a6ab263f6
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Fri Oct 15 18:14:31 2021 +0800

    rockchip: rk3308: Revert some changes for cpu opp table
    
    There is no need to enable opp and add temperature configuration for
    cpu, we add these configuration in kernel dts for rk3308bs.
    
    Change-Id: I739fe7caf1ef3b5a0d0ac814ad063cc7da2d8e17
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3308/rk3308.c b/arch/arm/mach-rockchip/rk3308/rk3308.c
index a82e4f6bcd..1893eedae7 100644
--- a/arch/arm/mach-rockchip/rk3308/rk3308.c
+++ b/arch/arm/mach-rockchip/rk3308/rk3308.c
@@ -393,13 +393,10 @@ static int fdt_fixup_cpu_idle(const void *blob)
 
 static int fdt_fixup_cpu_opp_table(const void *blob)
 {
-	int opp_node, old_opp_node;
-	int cpu_node, sub_node;
+	int opp_node, cpu_node, sub_node;
 	int len;
 	u32 phandle;
 	u32 *pp;
-	u32 val;
-	bool is_opp_enabled;
 
 	/* Replace opp table */
 	opp_node = fdt_path_offset(blob, "/rk3308bs-cpu0-opp-table");
@@ -428,68 +425,6 @@ static int fdt_fixup_cpu_opp_table(const void *blob)
 		pp[0] = cpu_to_fdt32(phandle);
 	}
 
-	old_opp_node = fdt_path_offset(blob, "/cpu0-opp-table");
-	if (old_opp_node < 0) {
-		printf("Failed to get cpu0-opp-table node\n");
-		return -EINVAL;
-	}
-
-	/* Enable 1296MHz and 1200MHz */
-	is_opp_enabled = false;
-	sub_node = fdt_subnode_offset(blob, old_opp_node, "opp-1296000000");
-	if (sub_node >= 0) {
-		if (fdt_stringlist_search(blob, sub_node,
-					  "status", "okay") >= 0)
-			is_opp_enabled = true;
-	}
-
-	sub_node = fdt_subnode_offset(blob, opp_node, "opp-1296000000");
-	if (sub_node >= 0 && is_opp_enabled) {
-		if (fdt_setprop_string((void *)blob, sub_node,
-				       "status", "okay") < 0)
-			printf("Failed to set 1296 okay\n");
-	}
-
-	is_opp_enabled = false;
-	sub_node = fdt_subnode_offset(blob, old_opp_node, "opp-1200000000");
-	if (sub_node >= 0) {
-		if (fdt_stringlist_search(blob, sub_node,
-					  "status", "okay") >= 0)
-			is_opp_enabled = true;
-	}
-
-	sub_node = fdt_subnode_offset(blob, opp_node, "opp-1200000000");
-	if (sub_node >= 0 && is_opp_enabled) {
-		if (fdt_setprop_string((void *)blob, sub_node,
-				       "status", "okay") < 0)
-			printf("Failed to set 1200 okay\n");
-	}
-
-	/* Add high temp configure */
-	pp = (u32 *)fdt_getprop(blob, old_opp_node, "rockchip,high-temp", &len);
-	if (pp) {
-		val = fdt32_to_cpu(*pp);
-		pp = (u32 *)fdt_getprop(blob, opp_node,
-					"rockchip,high-temp", &len);
-		if (!pp) {
-			if (fdt_setprop_u32((void *)blob, opp_node,
-					    "rockchip,high-temp", val))
-				printf("Failed to set high temp prop\n");
-		}
-	}
-	pp = (u32 *)fdt_getprop(blob, old_opp_node,
-				"rockchip,high-temp-max-volt", &len);
-	if (pp) {
-		val = fdt32_to_cpu(*pp);
-		pp = (u32 *)fdt_getprop(blob, opp_node,
-					"rockchip,high-temp-max-volt", &len);
-		if (!pp) {
-			if (fdt_setprop_u32((void *)blob, opp_node,
-					    "rockchip,high-temp-max-volt", val))
-				printf("Failed to set high temp max volt prop\n");
-		}
-	}
-
 	return 0;
 }
 

commit c51cf04095dde2df2dd047e70d2c7fb0866ea916
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 19 03:16:35 2021 +0000

    cpu: amp.its: update amps "arm64" => "arm"
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I99de02c5b6c62ffdd9b25565acd172801d6e983c

diff --git a/drivers/cpu/amp.its b/drivers/cpu/amp.its
index 8707a61ffa..26ed969007 100644
--- a/drivers/cpu/amp.its
+++ b/drivers/cpu/amp.its
@@ -14,7 +14,7 @@
 			data         = /incbin/("./amp1.bin");
 			type         = "firmware";
 			compression  = "none";
-			arch         = "arm64";		// "arm64" or "arm"
+			arch         = "arm";		// "arm64" or "arm"
 			cpu          = <0x100>;		// mpidr
 			thumb        = <0>;		// 0: arm or thumb2; 1: thumb
 			hyp          = <0>;		// 0: el1/svc; 1: el2/hyp
@@ -30,7 +30,7 @@
 			data         = /incbin/("./amp2.bin");
 			type         = "firmware";
 			compression  = "none";
-			arch         = "arm64";
+			arch         = "arm";
 			cpu          = <0x200>;
 			thumb        = <0>;
 			hyp          = <0>;
@@ -46,7 +46,7 @@
 			data         = /incbin/("./amp3.bin");
 			type         = "firmware";
 			compression  = "none";
-			arch         = "arm64";
+			arch         = "arm";
 			cpu          = <0x300>;
 			thumb        = <0>;
 			hyp          = <0>;

commit 4fee620a475bfaa5b422e44b34450df2f1c46bbb
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Sat Oct 16 22:32:36 2021 +0800

    mtd: spinand: Support new devices
    
    GD5F2GM7RxG, GD5F2GM7UxG
    
    Change-Id: I6b5162197dc8671b023d78c0a1e406906e936f49
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/gigadevice.c b/drivers/mtd/nand/spi/gigadevice.c
index dd2b77d7a5..f47a3acfb2 100644
--- a/drivers/mtd/nand/spi/gigadevice.c
+++ b/drivers/mtd/nand/spi/gigadevice.c
@@ -123,7 +123,7 @@ static int gd5fxgq5xexxg_ecc_get_status(struct spinand_device *spinand,
 			return ret;
 
 		/*
-		 * 4 ... 7 bits are flipped (1..4 can't be detected, so
+		 * 1 ... 4 bits are flipped (1..4 can't be detected, so
 		 * report the maximum of 4 in this case
 		 */
 		/* bits sorted this way (3...0): ECCS1,ECCS0,ECCSE1,ECCSE0 */
@@ -253,6 +253,26 @@ static const struct spinand_info gigadevice_spinand_table[] = {
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&gd5fxgq4xexxg_ooblayout,
 				     gd5fxgq5xexxg_ecc_get_status)),
+	SPINAND_INFO("GD5F2GM7RxG",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x82),
+		     NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&gd5fxgq4xexxg_ooblayout,
+				     gd5f1gq4xexxg_ecc_get_status)),
+	SPINAND_INFO("GD5F2GM7UxG",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x92),
+		     NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&gd5fxgq4xexxg_ooblayout,
+				     gd5f1gq4xexxg_ecc_get_status)),
 };
 
 static const struct spinand_manufacturer_ops gigadevice_spinand_manuf_ops = {

commit dc631be6802be0f9e5496864ad4a4e64df2e0e17
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Thu Oct 14 17:16:57 2021 +0800

    mtd: spinand: Support new devices
    
    DS35M1GB, DS35M2GA
    
    Change-Id: Iaf7f7f03bd1f500cd7dfe1738730ea797182a3a6
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/dosilicon.c b/drivers/mtd/nand/spi/dosilicon.c
index d8396ca7a6..8189eb1dc7 100644
--- a/drivers/mtd/nand/spi/dosilicon.c
+++ b/drivers/mtd/nand/spi/dosilicon.c
@@ -149,6 +149,15 @@ static const struct spinand_info dosilicon_spinand_table[] = {
 					      &update_cache_variants),
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&ds35xxga_ooblayout, NULL)),
+	SPINAND_INFO("DS35M2GA",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x22),
+		     NAND_MEMORG(1, 2048, 64, 64, 2048, 2, 1, 1),
+		     NAND_ECCREQ(4, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&ds35xxga_ooblayout, NULL)),
 	SPINAND_INFO("DS35Q2GB",
 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xF2),
 		     NAND_MEMORG(1, 2048, 128, 64, 2048, 2, 1, 1),
@@ -159,6 +168,16 @@ static const struct spinand_info dosilicon_spinand_table[] = {
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&ds35xxgb_ooblayout,
 				     ds35xxgb_ecc_get_status)),
+	SPINAND_INFO("DS35M1GB",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xA1),
+		     NAND_MEMORG(1, 2048, 128, 64, 1024, 2, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&ds35xxgb_ooblayout,
+				     ds35xxgb_ecc_get_status)),
 };
 
 static const struct spinand_manufacturer_ops dosilicon_spinand_manuf_ops = {

commit 81afcfe1f95ac45ca73ae8b8dd7c330fb6ed9d81
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Oct 15 15:41:26 2021 +0800

    mtd: spinand: rework detect procedure for different READ_ID operation
    
    Currently there are 3 different variants of read_id implementation:
    1. opcode only. Found in GD5FxGQ4xF.
    2. opcode + 1 addr byte. Found in GD5GxGQ4xA/E
    3. opcode + 1 dummy byte. Found in other currently supported chips.
    
    Original implementation was for variant 1 and let detect function
    of chips with variant 2 and 3 to ignore the first byte. This isn't
    robust:
    
    1. For chips of variant 2, if SPI master doesn't keep MOSI low
    during read, chip will get a random id offset, and the entire id
    buffer will shift by that offset, causing detect failure.
    
    2. For chips of variant 1, if it happens to get a devid that equals
    to manufacture id of variant 2 or 3 chips, it'll get incorrectly
    detected.
    
    This patch reworks detect procedure to address problems above. New
    logic do detection for all variants separatedly, in 1-2-3 order.
    Since all current detect methods do exactly the same id matching
    procedure, unify them into core.c and remove detect method from
    manufacture_ops.
    
    Link: https://lore.kernel.org/linux-mtd/20200208074439.146296-1-gch981213@gmail.com
    
    Change-Id: Ib06417c8e8c7e9d58be1eb3549468bfcbd74350d
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/biwin.c b/drivers/mtd/nand/spi/biwin.c
index 5c0629547c..49e468d7e1 100644
--- a/drivers/mtd/nand/spi/biwin.c
+++ b/drivers/mtd/nand/spi/biwin.c
@@ -83,7 +83,8 @@ static int bwjx08k_ecc_get_status(struct spinand_device *spinand,
 
 /* Another set for the same id[2] devices in one series */
 static const struct spinand_info biwin_spinand_table[] = {
-	SPINAND_INFO("BWJX08K", 0xB3,
+	SPINAND_INFO("BWJX08K",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xB3),
 		     NAND_MEMORG(1, 2048, 64, 64, 2048, 1, 1, 1),
 		     NAND_ECCREQ(8, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -94,37 +95,13 @@ static const struct spinand_info biwin_spinand_table[] = {
 				     bwjx08k_ecc_get_status)),
 };
 
-/**
- * biwin_spinand_detect - initialize device related part in spinand_device
- * struct if it is a Winbond device.
- * @spinand: SPI NAND device structure
- */
-static int biwin_spinand_detect(struct spinand_device *spinand)
-{
-	u8 *id = spinand->id.data;
-	int ret;
-
-	/*
-	 * BIWIN SPI NAND read ID need a dummy byte,
-	 * so the first byte in raw_id is dummy.
-	 */
-	if (id[1] != SPINAND_MFR_BIWIN)
-		return 0;
-
-	ret = spinand_match_and_init(spinand, biwin_spinand_table,
-				     ARRAY_SIZE(biwin_spinand_table), id[2]);
-	if (ret)
-		return ret;
-
-	return 1;
-}
-
 static const struct spinand_manufacturer_ops biwin_spinand_manuf_ops = {
-	.detect = biwin_spinand_detect,
 };
 
 const struct spinand_manufacturer biwin_spinand_manufacturer = {
 	.id = SPINAND_MFR_BIWIN,
 	.name = "BIWIN",
+	.chips = biwin_spinand_table,
+	.nchips = ARRAY_SIZE(biwin_spinand_table),
 	.ops = &biwin_spinand_manuf_ops,
 };
diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index e37ae0a699..1e2a2513aa 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -446,10 +446,11 @@ out:
 	return status & STATUS_BUSY ? -ETIMEDOUT : 0;
 }
 
-static int spinand_read_id_op(struct spinand_device *spinand, u8 *buf)
+static int spinand_read_id_op(struct spinand_device *spinand, u8 naddr,
+			      u8 ndummy, u8 *buf)
 {
-	struct spi_mem_op op = SPINAND_READID_OP(0, spinand->scratchbuf,
-						 SPINAND_MAX_ID_LEN);
+	struct spi_mem_op op = SPINAND_READID_OP(
+		naddr, ndummy, spinand->scratchbuf, SPINAND_MAX_ID_LEN);
 	int ret;
 
 	ret = spi_mem_exec_op(spinand->slave, &op);
@@ -865,24 +866,62 @@ static const struct spinand_manufacturer *spinand_manufacturers[] = {
 #endif
 };
 
-static int spinand_manufacturer_detect(struct spinand_device *spinand)
+static int spinand_manufacturer_match(struct spinand_device *spinand,
+				      enum spinand_readid_method rdid_method)
 {
+	u8 *id = spinand->id.data;
 	unsigned int i;
 	int ret;
 
 	for (i = 0; i < ARRAY_SIZE(spinand_manufacturers); i++) {
-		ret = spinand_manufacturers[i]->ops->detect(spinand);
-		if (ret > 0) {
-			spinand->manufacturer = spinand_manufacturers[i];
-			return 0;
-		} else if (ret < 0) {
-			return ret;
-		}
-	}
+		const struct spinand_manufacturer *manufacturer =
+			spinand_manufacturers[i];
+
+		if (id[0] != manufacturer->id)
+			continue;
 
+		ret = spinand_match_and_init(spinand,
+					     manufacturer->chips,
+					     manufacturer->nchips,
+					     rdid_method);
+		if (ret < 0)
+			continue;
+
+		spinand->manufacturer = manufacturer;
+		return 0;
+	}
 	return -ENOTSUPP;
 }
 
+static int spinand_id_detect(struct spinand_device *spinand)
+{
+	u8 *id = spinand->id.data;
+	int ret;
+
+	ret = spinand_read_id_op(spinand, 0, 0, id);
+	if (ret)
+		return ret;
+	ret = spinand_manufacturer_match(spinand, SPINAND_READID_METHOD_OPCODE);
+	if (!ret)
+		return 0;
+
+	ret = spinand_read_id_op(spinand, 1, 0, id);
+	if (ret)
+		return ret;
+	ret = spinand_manufacturer_match(spinand,
+					 SPINAND_READID_METHOD_OPCODE_ADDR);
+	if (!ret)
+		return 0;
+
+	ret = spinand_read_id_op(spinand, 0, 1, id);
+	if (ret)
+		return ret;
+	ret = spinand_manufacturer_match(spinand,
+					 SPINAND_READID_METHOD_OPCODE_DUMMY);
+
+	return ret;
+}
+
 static int spinand_manufacturer_init(struct spinand_device *spinand)
 {
 	if (spinand->manufacturer->ops->init)
@@ -938,9 +977,9 @@ spinand_select_op_variant(struct spinand_device *spinand,
  * @spinand: SPI NAND object
  * @table: SPI NAND device description table
  * @table_size: size of the device description table
+ * @rdid_method: read id method to match
  *
- * Should be used by SPI NAND manufacturer drivers when they want to find a
- * match between a device ID retrieved through the READ_ID command and an
+ * Match between a device ID retrieved through the READ_ID command and an
  * entry in the SPI NAND description table. If a match is found, the spinand
  * object will be initialized with information provided by the matching
  * spinand_info entry.
@@ -949,8 +988,10 @@ spinand_select_op_variant(struct spinand_device *spinand,
  */
 int spinand_match_and_init(struct spinand_device *spinand,
 			   const struct spinand_info *table,
-			   unsigned int table_size, u8 devid)
+			   unsigned int table_size,
+			   enum spinand_readid_method rdid_method)
 {
+	u8 *id = spinand->id.data;
 	struct nand_device *nand = spinand_to_nand(spinand);
 	unsigned int i;
 
@@ -958,13 +999,17 @@ int spinand_match_and_init(struct spinand_device *spinand,
 		const struct spinand_info *info = &table[i];
 		const struct spi_mem_op *op;
 
-		if (devid != info->devid)
+		if (rdid_method != info->devid.method)
+			continue;
+
+		if (memcmp(id + 1, info->devid.id, info->devid.len))
 			continue;
 
 		nand->memorg = table[i].memorg;
 		nand->eccreq = table[i].eccreq;
 		spinand->eccinfo = table[i].eccinfo;
 		spinand->flags = table[i].flags;
+		spinand->id.len = 1 + table[i].devid.len;
 		spinand->select_target = table[i].select_target;
 
 		op = spinand_select_op_variant(spinand,
@@ -1000,13 +1045,7 @@ static int spinand_detect(struct spinand_device *spinand)
 	if (ret)
 		return ret;
 
-	ret = spinand_read_id_op(spinand, spinand->id.data);
-	if (ret)
-		return ret;
-
-	spinand->id.len = SPINAND_MAX_ID_LEN;
-
-	ret = spinand_manufacturer_detect(spinand);
+	ret = spinand_id_detect(spinand);
 	if (ret) {
 		dev_err(dev, "unknown raw ID %*phN\n", SPINAND_MAX_ID_LEN,
 			spinand->id.data);
diff --git a/drivers/mtd/nand/spi/dosilicon.c b/drivers/mtd/nand/spi/dosilicon.c
index 6dd695b855..d8396ca7a6 100644
--- a/drivers/mtd/nand/spi/dosilicon.c
+++ b/drivers/mtd/nand/spi/dosilicon.c
@@ -122,7 +122,8 @@ static int ds35xxgb_ecc_get_status(struct spinand_device *spinand,
 }
 
 static const struct spinand_info dosilicon_spinand_table[] = {
-	SPINAND_INFO("DS35X1GA", 0x71,
+	SPINAND_INFO("DS35X1GA",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x71),
 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
 		     NAND_ECCREQ(4, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -130,7 +131,8 @@ static const struct spinand_info dosilicon_spinand_table[] = {
 					      &update_cache_variants),
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&ds35xxga_ooblayout, NULL)),
-	SPINAND_INFO("DS35Q2GA", 0x72,
+	SPINAND_INFO("DS35Q2GA",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x72),
 		     NAND_MEMORG(1, 2048, 64, 64, 2048, 2, 1, 1),
 		     NAND_ECCREQ(4, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -138,7 +140,8 @@ static const struct spinand_info dosilicon_spinand_table[] = {
 					      &update_cache_variants),
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&ds35xxga_ooblayout, NULL)),
-	SPINAND_INFO("DS35M1GA", 0x21,
+	SPINAND_INFO("DS35M1GA",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x21),
 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
 		     NAND_ECCREQ(4, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -146,7 +149,8 @@ static const struct spinand_info dosilicon_spinand_table[] = {
 					      &update_cache_variants),
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&ds35xxga_ooblayout, NULL)),
-	SPINAND_INFO("DS35Q2GB", 0xF2,
+	SPINAND_INFO("DS35Q2GB",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xF2),
 		     NAND_MEMORG(1, 2048, 128, 64, 2048, 2, 1, 1),
 		     NAND_ECCREQ(8, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -157,44 +161,13 @@ static const struct spinand_info dosilicon_spinand_table[] = {
 				     ds35xxgb_ecc_get_status)),
 };
 
-/**
- * dosilicon_spinand_detect - initialize device related part in spinand_device
- * struct if it is a dosilicon device.
- * @spinand: SPI NAND device structure
- */
-static int dosilicon_spinand_detect(struct spinand_device *spinand)
-{
-	u8 *id = spinand->id.data;
-	int ret;
-
-	/*
-	 * dosilicon SPI NAND read ID need a dummy byte,
-	 * so the first byte in raw_id is dummy.
-	 */
-	if (id[1] != SPINAND_MFR_DOSILICON)
-		return 0;
-
-	ret = spinand_match_and_init(spinand, dosilicon_spinand_table,
-				     ARRAY_SIZE(dosilicon_spinand_table),
-				     id[2]);
-	if (ret)
-		return ret;
-
-	return 1;
-}
-
-static int dosilicon_spinand_init(struct spinand_device *spinand)
-{
-	return 0;
-}
-
 static const struct spinand_manufacturer_ops dosilicon_spinand_manuf_ops = {
-	.detect = dosilicon_spinand_detect,
-	.init = dosilicon_spinand_init,
 };
 
 const struct spinand_manufacturer dosilicon_spinand_manufacturer = {
 	.id = SPINAND_MFR_DOSILICON,
 	.name = "dosilicon",
+	.chips = dosilicon_spinand_table,
+	.nchips = ARRAY_SIZE(dosilicon_spinand_table),
 	.ops = &dosilicon_spinand_manuf_ops,
 };
diff --git a/drivers/mtd/nand/spi/esmt.c b/drivers/mtd/nand/spi/esmt.c
index 31f46275da..0c3736d633 100644
--- a/drivers/mtd/nand/spi/esmt.c
+++ b/drivers/mtd/nand/spi/esmt.c
@@ -60,7 +60,8 @@ static const struct mtd_ooblayout_ops f50lxx41x_ooblayout = {
 };
 
 static const struct spinand_info esmt_spinand_table[] = {
-	SPINAND_INFO("F50L1G41LB", 0x01,
+	SPINAND_INFO("F50L1G41LB",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x01),
 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
 		     NAND_ECCREQ(1, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -70,44 +71,13 @@ static const struct spinand_info esmt_spinand_table[] = {
 		     SPINAND_ECCINFO(&f50lxx41x_ooblayout, NULL)),
 };
 
-/**
- * esmt_spinand_detect - initialize device related part in spinand_device
- * struct if it is a esmt device.
- * @spinand: SPI NAND device structure
- */
-static int esmt_spinand_detect(struct spinand_device *spinand)
-{
-	u8 *id = spinand->id.data;
-	int ret;
-
-	/*
-	 * esmt SPI NAND read ID need a dummy byte,
-	 * so the first byte in raw_id is dummy.
-	 */
-	if (id[1] != SPINAND_MFR_ESMT)
-		return 0;
-
-	ret = spinand_match_and_init(spinand, esmt_spinand_table,
-				     ARRAY_SIZE(esmt_spinand_table), id[2]);
-	/* Not Only ESMT Nands MFR equals C8h */
-	if (ret)
-		return 0;
-
-	return 1;
-}
-
-static int esmt_spinand_init(struct spinand_device *spinand)
-{
-	return 0;
-}
-
 static const struct spinand_manufacturer_ops esmt_spinand_manuf_ops = {
-	.detect = esmt_spinand_detect,
-	.init = esmt_spinand_init,
 };
 
 const struct spinand_manufacturer esmt_spinand_manufacturer = {
 	.id = SPINAND_MFR_ESMT,
 	.name = "esmt",
+	.chips = esmt_spinand_table,
+	.nchips = ARRAY_SIZE(esmt_spinand_table),
 	.ops = &esmt_spinand_manuf_ops,
 };
diff --git a/drivers/mtd/nand/spi/etron.c b/drivers/mtd/nand/spi/etron.c
index 38eaff5561..d32d4658dc 100644
--- a/drivers/mtd/nand/spi/etron.c
+++ b/drivers/mtd/nand/spi/etron.c
@@ -79,7 +79,8 @@ static int em73c044vcf_oh_ecc_get_status(struct spinand_device *spinand,
 }
 
 static const struct spinand_info etron_spinand_table[] = {
-	SPINAND_INFO("EM73C044VCF-0H", 0x36,
+	SPINAND_INFO("EM73C044VCF-0H",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x36),
 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
 		     NAND_ECCREQ(4, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -90,37 +91,13 @@ static const struct spinand_info etron_spinand_table[] = {
 				     em73c044vcf_oh_ecc_get_status)),
 };
 
-/**
- * etron_spinand_detect - initialize device related part in spinand_device
- * struct if it is a Etron device.
- * @spinand: SPI NAND device structure
- */
-static int etron_spinand_detect(struct spinand_device *spinand)
-{
-	u8 *id = spinand->id.data;
-	int ret;
-
-	/*
-	 * Etron SPI NAND read ID need a dummy byte,
-	 * so the first byte in raw_id is dummy.
-	 */
-	if (id[1] != SPINAND_MFR_ETRON)
-		return 0;
-
-	ret = spinand_match_and_init(spinand, etron_spinand_table,
-				     ARRAY_SIZE(etron_spinand_table), id[2]);
-	if (ret)
-		return ret;
-
-	return 1;
-}
-
 static const struct spinand_manufacturer_ops etron_spinand_manuf_ops = {
-	.detect = etron_spinand_detect,
 };
 
 const struct spinand_manufacturer etron_spinand_manufacturer = {
 	.id = SPINAND_MFR_ETRON,
 	.name = "Etron",
+	.chips = etron_spinand_table,
+	.nchips = ARRAY_SIZE(etron_spinand_table),
 	.ops = &etron_spinand_manuf_ops,
 };
diff --git a/drivers/mtd/nand/spi/fmsh.c b/drivers/mtd/nand/spi/fmsh.c
index aa07744759..6adcc2f179 100644
--- a/drivers/mtd/nand/spi/fmsh.c
+++ b/drivers/mtd/nand/spi/fmsh.c
@@ -83,7 +83,8 @@ static const struct mtd_ooblayout_ops fm25s01_ooblayout = {
 };
 
 static const struct spinand_info fmsh_spinand_table[] = {
-	SPINAND_INFO("FM25S01A", 0xE4,
+	SPINAND_INFO("FM25S01A",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE4),
 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
 		     NAND_ECCREQ(1, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -91,7 +92,8 @@ static const struct spinand_info fmsh_spinand_table[] = {
 					      &update_cache_variants),
 		     0,
 		     SPINAND_ECCINFO(&fm25s01a_ooblayout, NULL)),
-	SPINAND_INFO("FM25S02A", 0xE5,
+	SPINAND_INFO("FM25S02A",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE5),
 		     NAND_MEMORG(1, 2048, 64, 64, 2048, 2, 1, 1),
 		     NAND_ECCREQ(1, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -99,7 +101,8 @@ static const struct spinand_info fmsh_spinand_table[] = {
 					      &update_cache_variants),
 		     1,
 		     SPINAND_ECCINFO(&fm25s01a_ooblayout, NULL)),
-	SPINAND_INFO("FM25S01", 0xA1,
+	SPINAND_INFO("FM25S01",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xA1),
 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
 		     NAND_ECCREQ(1, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -109,38 +112,13 @@ static const struct spinand_info fmsh_spinand_table[] = {
 		     SPINAND_ECCINFO(&fm25s01_ooblayout, NULL)),
 };
 
-/**
- * fmsh_spinand_detect - initialize device related part in spinand_device
- * struct if it is a FMSH device.
- * @spinand: SPI NAND device structure
- */
-static int fmsh_spinand_detect(struct spinand_device *spinand)
-{
-	u8 *id = spinand->id.data;
-	int ret;
-
-	/*
-	 * FMSH SPI NAND read ID need a dummy byte,
-	 * so the first byte in raw_id is dummy.
-	 */
-	if (id[1] != SPINAND_MFR_FMSH)
-		return 0;
-
-	ret = spinand_match_and_init(spinand, fmsh_spinand_table,
-				     ARRAY_SIZE(fmsh_spinand_table), id[2]);
-	/* Not Only GD Nands MFR equals A1h */
-	if (ret)
-		return 0;
-
-	return 1;
-}
-
 static const struct spinand_manufacturer_ops fmsh_spinand_manuf_ops = {
-	.detect = fmsh_spinand_detect,
 };
 
 const struct spinand_manufacturer fmsh_spinand_manufacturer = {
 	.id = SPINAND_MFR_FMSH,
 	.name = "FMSH",
+	.chips = fmsh_spinand_table,
+	.nchips = ARRAY_SIZE(fmsh_spinand_table),
 	.ops = &fmsh_spinand_manuf_ops,
 };
diff --git a/drivers/mtd/nand/spi/foresee.c b/drivers/mtd/nand/spi/foresee.c
index 2936f9e71d..7fad8a3f9e 100644
--- a/drivers/mtd/nand/spi/foresee.c
+++ b/drivers/mtd/nand/spi/foresee.c
@@ -54,7 +54,8 @@ static const struct mtd_ooblayout_ops fsxxndxxg_ooblayout = {
 };
 
 static const struct spinand_info foresee_spinand_table[] = {
-	SPINAND_INFO("FS35ND01G-S1Y2", 0xEA,
+	SPINAND_INFO("FS35ND01G-S1Y2",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xEA),
 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
 		     NAND_ECCREQ(4, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -62,7 +63,8 @@ static const struct spinand_info foresee_spinand_table[] = {
 					      &update_cache_variants),
 		     0,
 		     SPINAND_ECCINFO(&fsxxndxxg_ooblayout, NULL)),
-	SPINAND_INFO("FS35ND02G-S3Y2", 0xEB,
+	SPINAND_INFO("FS35ND02G-S3Y2",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xEB),
 		     NAND_MEMORG(1, 2048, 64, 64, 2048, 1, 1, 1),
 		     NAND_ECCREQ(4, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -70,7 +72,8 @@ static const struct spinand_info foresee_spinand_table[] = {
 					      &update_cache_variants),
 		     0,
 		     SPINAND_ECCINFO(&fsxxndxxg_ooblayout, NULL)),
-	SPINAND_INFO("FS35ND04G-S2Y2", 0xEC,
+	SPINAND_INFO("FS35ND04G-S2Y2",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xEC),
 		     NAND_MEMORG(1, 2048, 64, 64, 4096, 1, 1, 1),
 		     NAND_ECCREQ(4, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -78,7 +81,8 @@ static const struct spinand_info foresee_spinand_table[] = {
 					      &update_cache_variants),
 		     0,
 		     SPINAND_ECCINFO(&fsxxndxxg_ooblayout, NULL)),
-	SPINAND_INFO("fsxxndxxg", 0x71,
+	SPINAND_INFO("fsxxndxxg",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x71),
 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
 		     NAND_ECCREQ(1, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -88,43 +92,13 @@ static const struct spinand_info foresee_spinand_table[] = {
 		     SPINAND_ECCINFO(&fsxxndxxg_ooblayout, NULL)),
 };
 
-/**
- * foresee_spinand_detect - initialize device related part in spinand_device
- * struct if it is a foresee device.
- * @spinand: SPI NAND device structure
- */
-static int foresee_spinand_detect(struct spinand_device *spinand)
-{
-	u8 *id = spinand->id.data;
-	int ret;
-
-	/*
-	 * foresee SPI NAND read ID need a dummy byte,
-	 * so the first byte in raw_id is dummy.
-	 */
-	if (id[1] != SPINAND_MFR_FORESEE)
-		return 0;
-
-	ret = spinand_match_and_init(spinand, foresee_spinand_table,
-				     ARRAY_SIZE(foresee_spinand_table), id[2]);
-	if (ret)
-		return ret;
-
-	return 1;
-}
-
-static int foresee_spinand_init(struct spinand_device *spinand)
-{
-	return 0;
-}
-
 static const struct spinand_manufacturer_ops foresee_spinand_manuf_ops = {
-	.detect = foresee_spinand_detect,
-	.init = foresee_spinand_init,
 };
 
 const struct spinand_manufacturer foresee_spinand_manufacturer = {
 	.id = SPINAND_MFR_FORESEE,
 	.name = "foresee",
+	.chips = foresee_spinand_table,
+	.nchips = ARRAY_SIZE(foresee_spinand_table),
 	.ops = &foresee_spinand_manuf_ops,
 };
diff --git a/drivers/mtd/nand/spi/gigadevice.c b/drivers/mtd/nand/spi/gigadevice.c
index 578acd2af9..dd2b77d7a5 100644
--- a/drivers/mtd/nand/spi/gigadevice.c
+++ b/drivers/mtd/nand/spi/gigadevice.c
@@ -173,7 +173,8 @@ static const struct mtd_ooblayout_ops gd5fxgq4xexxh_ooblayout = {
 };
 
 static const struct spinand_info gigadevice_spinand_table[] = {
-	SPINAND_INFO("GD5F1GQ4UExxG", 0xd1,
+	SPINAND_INFO("GD5F1GQ4UExxG",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0xd1),
 		     NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
 		     NAND_ECCREQ(8, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -182,7 +183,8 @@ static const struct spinand_info gigadevice_spinand_table[] = {
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&gd5fxgq4xexxg_ooblayout,
 				     gd5f1gq4xexxg_ecc_get_status)),
-	SPINAND_INFO("GD5F1GQ5UExxG", 0x51,
+	SPINAND_INFO("GD5F1GQ5UExxG",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x51),
 		     NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
 		     NAND_ECCREQ(4, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -191,7 +193,8 @@ static const struct spinand_info gigadevice_spinand_table[] = {
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&gd5fxgq4xexxg_ooblayout,
 				     gd5fxgq5xexxg_ecc_get_status)),
-	SPINAND_INFO("GD5F2GQ5UExxG", 0x52,
+	SPINAND_INFO("GD5F2GQ5UExxG",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x52),
 		     NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
 		     NAND_ECCREQ(4, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -200,7 +203,8 @@ static const struct spinand_info gigadevice_spinand_table[] = {
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&gd5fxgq4xexxg_ooblayout,
 				     gd5fxgq5xexxg_ecc_get_status)),
-	SPINAND_INFO("GD5F2GQ4UBxxG", 0xd2,
+	SPINAND_INFO("GD5F2GQ4UBxxG",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0xd2),
 		     NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
 		     NAND_ECCREQ(8, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -209,7 +213,8 @@ static const struct spinand_info gigadevice_spinand_table[] = {
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&gd5fxgq4xexxg_ooblayout,
 				     gd5f1gq4xexxg_ecc_get_status)),
-	SPINAND_INFO("GD5F4GQ6UExxG", 0x55,
+	SPINAND_INFO("GD5F4GQ6UExxG",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x55),
 		     NAND_MEMORG(1, 2048, 128, 64, 4096, 1, 1, 1),
 		     NAND_ECCREQ(4, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -218,7 +223,8 @@ static const struct spinand_info gigadevice_spinand_table[] = {
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&gd5fxgq4xexxg_ooblayout,
 				     gd5fxgq5xexxg_ecc_get_status)),
-	SPINAND_INFO("GD5F1GQ4UExxH", 0xd9,
+	SPINAND_INFO("GD5F1GQ4UExxH",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0xd9),
 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
 		     NAND_ECCREQ(8, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -227,7 +233,8 @@ static const struct spinand_info gigadevice_spinand_table[] = {
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&gd5fxgq4xexxh_ooblayout,
 				     gd5f1gq4xexxg_ecc_get_status)),
-	SPINAND_INFO("GD5F1GQ5RExxG", 0x41,
+	SPINAND_INFO("GD5F1GQ5RExxG",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x41),
 		     NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
 		     NAND_ECCREQ(4, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -236,7 +243,8 @@ static const struct spinand_info gigadevice_spinand_table[] = {
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&gd5fxgq4xexxg_ooblayout,
 				     gd5fxgq5xexxg_ecc_get_status)),
-	SPINAND_INFO("GD5F2GQ5RExxG", 0x42,
+	SPINAND_INFO("GD5F2GQ5RExxG",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x42),
 		     NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
 		     NAND_ECCREQ(4, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -247,34 +255,13 @@ static const struct spinand_info gigadevice_spinand_table[] = {
 				     gd5fxgq5xexxg_ecc_get_status)),
 };
 
-static int gigadevice_spinand_detect(struct spinand_device *spinand)
-{
-	u8 *id = spinand->id.data;
-	int ret;
-
-	/*
-	 * For GD NANDs, There is an address byte needed to shift in before IDs
-	 * are read out, so the first byte in raw_id is dummy.
-	 */
-	if (id[1] != SPINAND_MFR_GIGADEVICE)
-		return 0;
-
-	ret = spinand_match_and_init(spinand, gigadevice_spinand_table,
-				     ARRAY_SIZE(gigadevice_spinand_table),
-				     id[2]);
-	/* Not Only GD Nands MFR equals C8h */
-	if (ret)
-		return 0;
-
-	return 1;
-}
-
 static const struct spinand_manufacturer_ops gigadevice_spinand_manuf_ops = {
-	.detect = gigadevice_spinand_detect,
 };
 
 const struct spinand_manufacturer gigadevice_spinand_manufacturer = {
 	.id = SPINAND_MFR_GIGADEVICE,
 	.name = "GigaDevice",
+	.chips = gigadevice_spinand_table,
+	.nchips = ARRAY_SIZE(gigadevice_spinand_table),
 	.ops = &gigadevice_spinand_manuf_ops,
 };
diff --git a/drivers/mtd/nand/spi/hyf.c b/drivers/mtd/nand/spi/hyf.c
index 2aad70153e..83458e07b6 100644
--- a/drivers/mtd/nand/spi/hyf.c
+++ b/drivers/mtd/nand/spi/hyf.c
@@ -140,7 +140,8 @@ static int hyf1gq4udacae_ecc_get_status(struct spinand_device *spinand,
 }
 
 static const struct spinand_info hyf_spinand_table[] = {
-	SPINAND_INFO("HYF1GQ4UPACAE", 0xA1,
+	SPINAND_INFO("HYF1GQ4UPACAE",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xA1),
 		     NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
 		     NAND_ECCREQ(1, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -148,7 +149,8 @@ static const struct spinand_info hyf_spinand_table[] = {
 					      &update_cache_variants),
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&hyf1gq4upacae_ooblayout, NULL)),
-	SPINAND_INFO("HYF1GQ4UDACAE", 0x21,
+	SPINAND_INFO("HYF1GQ4UDACAE",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x21),
 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
 		     NAND_ECCREQ(4, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -157,7 +159,8 @@ static const struct spinand_info hyf_spinand_table[] = {
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&hyf1gq4udacae_ooblayout,
 				     hyf1gq4udacae_ecc_get_status)),
-	SPINAND_INFO("HYF1GQ4UDACAE", 0x22,
+	SPINAND_INFO("HYF1GQ4UDACAE",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x22),
 		     NAND_MEMORG(1, 2048, 64, 64, 2048, 1, 1, 1),
 		     NAND_ECCREQ(4, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -166,7 +169,8 @@ static const struct spinand_info hyf_spinand_table[] = {
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&hyf1gq4udacae_ooblayout,
 				     hyf1gq4udacae_ecc_get_status)),
-	SPINAND_INFO("HYF2GQ4UAACAE", 0x52,
+	SPINAND_INFO("HYF2GQ4UAACAE",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x52),
 		     NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
 		     NAND_ECCREQ(14, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -175,7 +179,8 @@ static const struct spinand_info hyf_spinand_table[] = {
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&hyf2gq4uaacae_ooblayout,
 				     hyf1gq4udacae_ecc_get_status)),
-	SPINAND_INFO("HYF2GQ4UHCCAE", 0x5A,
+	SPINAND_INFO("HYF2GQ4UHCCAE",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x5A),
 		     NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
 		     NAND_ECCREQ(14, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -184,7 +189,8 @@ static const struct spinand_info hyf_spinand_table[] = {
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&hyf2gq4uaacae_ooblayout,
 				     hyf1gq4udacae_ecc_get_status)),
-	SPINAND_INFO("HYF4GQ4UAACBE", 0xD4,
+	SPINAND_INFO("HYF4GQ4UAACBE",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xD4),
 		     NAND_MEMORG(1, 4096, 128, 64, 2048, 1, 1, 1),
 		     NAND_ECCREQ(4, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -195,38 +201,13 @@ static const struct spinand_info hyf_spinand_table[] = {
 				     hyf1gq4udacae_ecc_get_status)),
 };
 
-/**
- * hyf_spinand_detect - initialize device related part in spinand_device
- * struct if it is a hyf device.
- * @spinand: SPI NAND device structure
- */
-static int hyf_spinand_detect(struct spinand_device *spinand)
-{
-	u8 *id = spinand->id.data;
-	int ret;
-
-	/*
-	 * hyf SPI NAND read ID needs a dummy byte, so the first byte in
-	 * raw_id is garbage.
-	 */
-	if (id[1] != SPINAND_MFR_HYF)
-		return 0;
-
-	ret = spinand_match_and_init(spinand, hyf_spinand_table,
-				     ARRAY_SIZE(hyf_spinand_table),
-				     id[2]);
-	if (ret)
-		return ret;
-
-	return 1;
-}
-
 static const struct spinand_manufacturer_ops hyf_spinand_manuf_ops = {
-	.detect = hyf_spinand_detect,
 };
 
 const struct spinand_manufacturer hyf_spinand_manufacturer = {
 	.id = SPINAND_MFR_HYF,
 	.name = "hyf",
+	.chips = hyf_spinand_table,
+	.nchips = ARRAY_SIZE(hyf_spinand_table),
 	.ops = &hyf_spinand_manuf_ops,
 };
diff --git a/drivers/mtd/nand/spi/jsc.c b/drivers/mtd/nand/spi/jsc.c
index 6a5aea71ad..d0e3b240f3 100644
--- a/drivers/mtd/nand/spi/jsc.c
+++ b/drivers/mtd/nand/spi/jsc.c
@@ -83,7 +83,8 @@ static int js28u1gqscahg_ecc_get_status(struct spinand_device *spinand,
 }
 
 static const struct spinand_info jsc_spinand_table[] = {
-	SPINAND_INFO("JS28U1GQSCAHG-83", 0x21,
+	SPINAND_INFO("JS28U1GQSCAHG-83",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x21),
 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
 		     NAND_ECCREQ(4, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -93,39 +94,13 @@ static const struct spinand_info jsc_spinand_table[] = {
 		     SPINAND_ECCINFO(&js28u1gqscahg_ooblayout, js28u1gqscahg_ecc_get_status)),
 };
 
-/**
- * jsc_spinand_detect - initialize device related part in spinand_device
- * struct if it is a JSC device.
- * @spinand: SPI NAND device structure
- */
-static int jsc_spinand_detect(struct spinand_device *spinand)
-{
-	u8 *id = spinand->id.data;
-	int ret;
-
-	/*
-	 * JSC SPI NAND read ID need a dummy byte,
-	 * so the first byte in raw_id is dummy.
-	 */
-	if (id[1] != SPINAND_MFR_JSC)
-		return 0;
-
-	ret = spinand_match_and_init(spinand, jsc_spinand_table,
-				     ARRAY_SIZE(jsc_spinand_table),
-				     id[2]);
-
-	if (ret)
-		return ret;
-
-	return 1;
-}
-
 static const struct spinand_manufacturer_ops jsc_spinand_manuf_ops = {
-	.detect = jsc_spinand_detect,
 };
 
 const struct spinand_manufacturer jsc_spinand_manufacturer = {
 	.id = SPINAND_MFR_JSC,
 	.name = "JSC",
+	.chips = jsc_spinand_table,
+	.nchips = ARRAY_SIZE(jsc_spinand_table),
 	.ops = &jsc_spinand_manuf_ops,
 };
diff --git a/drivers/mtd/nand/spi/macronix.c b/drivers/mtd/nand/spi/macronix.c
index 267a00e7e8..dbb1d5079f 100644
--- a/drivers/mtd/nand/spi/macronix.c
+++ b/drivers/mtd/nand/spi/macronix.c
@@ -118,7 +118,8 @@ static int mx35lf1ge4ab_ecc_get_status(struct spinand_device *spinand,
 }
 
 static const struct spinand_info macronix_spinand_table[] = {
-	SPINAND_INFO("MX35LF1GE4AB", 0x12,
+	SPINAND_INFO("MX35LF1GE4AB",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x12),
 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
 		     NAND_ECCREQ(4, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -127,7 +128,8 @@ static const struct spinand_info macronix_spinand_table[] = {
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
 				     mx35lf1ge4ab_ecc_get_status)),
-	SPINAND_INFO("MX35LF2GE4AB", 0x22,
+	SPINAND_INFO("MX35LF2GE4AB",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x22),
 		     NAND_MEMORG(1, 2048, 64, 64, 2048, 2, 1, 1),
 		     NAND_ECCREQ(4, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -135,7 +137,8 @@ static const struct spinand_info macronix_spinand_table[] = {
 					      &update_cache_variants),
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL)),
-	SPINAND_INFO("MX35LF2GE4AD", 0x26,
+	SPINAND_INFO("MX35LF2GE4AD",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x26),
 		     NAND_MEMORG(1, 2048, 64, 64, 2048, 2, 1, 1),
 		     NAND_ECCREQ(8, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -144,7 +147,8 @@ static const struct spinand_info macronix_spinand_table[] = {
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
 				     mx35lf1ge4ab_ecc_get_status)),
-	SPINAND_INFO("MX35LF4GE4AD", 0x37,
+	SPINAND_INFO("MX35LF4GE4AD",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x37),
 		     NAND_MEMORG(1, 4096, 128, 64, 2048, 2, 1, 1),
 		     NAND_ECCREQ(8, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -153,7 +157,8 @@ static const struct spinand_info macronix_spinand_table[] = {
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
 				     mx35lf1ge4ab_ecc_get_status)),
-	SPINAND_INFO("MX35UF1GE4AC", 0x92,
+	SPINAND_INFO("MX35UF1GE4AC",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x92),
 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
 		     NAND_ECCREQ(4, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -162,7 +167,8 @@ static const struct spinand_info macronix_spinand_table[] = {
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&mx35ufxge4ac_ooblayout,
 				     mx35lf1ge4ab_ecc_get_status)),
-	SPINAND_INFO("MX35UF2GE4AC", 0xA2,
+	SPINAND_INFO("MX35UF2GE4AC",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xA2),
 		     NAND_MEMORG(1, 2048, 64, 64, 2048, 1, 1, 1),
 		     NAND_ECCREQ(4, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -173,33 +179,13 @@ static const struct spinand_info macronix_spinand_table[] = {
 				     mx35lf1ge4ab_ecc_get_status)),
 };
 
-static int macronix_spinand_detect(struct spinand_device *spinand)
-{
-	u8 *id = spinand->id.data;
-	int ret;
-
-	/*
-	 * Macronix SPI NAND read ID needs a dummy byte, so the first byte in
-	 * raw_id is garbage.
-	 */
-	if (id[1] != SPINAND_MFR_MACRONIX)
-		return 0;
-
-	ret = spinand_match_and_init(spinand, macronix_spinand_table,
-				     ARRAY_SIZE(macronix_spinand_table),
-				     id[2]);
-	if (ret)
-		return ret;
-
-	return 1;
-}
-
 static const struct spinand_manufacturer_ops macronix_spinand_manuf_ops = {
-	.detect = macronix_spinand_detect,
 };
 
 const struct spinand_manufacturer macronix_spinand_manufacturer = {
 	.id = SPINAND_MFR_MACRONIX,
 	.name = "Macronix",
+	.chips = macronix_spinand_table,
+	.nchips = ARRAY_SIZE(macronix_spinand_table),
 	.ops = &macronix_spinand_manuf_ops,
 };
diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c
index 8d8720ee32..849d5b4438 100644
--- a/drivers/mtd/nand/spi/micron.c
+++ b/drivers/mtd/nand/spi/micron.c
@@ -93,7 +93,8 @@ static int mt29f2g01abagd_ecc_get_status(struct spinand_device *spinand,
 }
 
 static const struct spinand_info micron_spinand_table[] = {
-	SPINAND_INFO("MT29F2G01ABAGD", 0x24,
+	SPINAND_INFO("MT29F2G01ABAGD",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x24),
 		     NAND_MEMORG(1, 2048, 128, 64, 2048, 2, 1, 1),
 		     NAND_ECCREQ(8, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -102,7 +103,8 @@ static const struct spinand_info micron_spinand_table[] = {
 		     0,
 		     SPINAND_ECCINFO(&mt29f2g01abagd_ooblayout,
 				     mt29f2g01abagd_ecc_get_status)),
-	SPINAND_INFO("MT29F1G01ABAGD", 0x14,
+	SPINAND_INFO("MT29F1G01ABAGD",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x14),
 		     NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
 		     NAND_ECCREQ(8, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -113,32 +115,13 @@ static const struct spinand_info micron_spinand_table[] = {
 				     mt29f2g01abagd_ecc_get_status)),
 };
 
-static int micron_spinand_detect(struct spinand_device *spinand)
-{
-	u8 *id = spinand->id.data;
-	int ret;
-
-	/*
-	 * Micron SPI NAND read ID need a dummy byte,
-	 * so the first byte in raw_id is dummy.
-	 */
-	if (id[1] != SPINAND_MFR_MICRON)
-		return 0;
-
-	ret = spinand_match_and_init(spinand, micron_spinand_table,
-				     ARRAY_SIZE(micron_spinand_table), id[2]);
-	if (ret)
-		return ret;
-
-	return 1;
-}
-
 static const struct spinand_manufacturer_ops micron_spinand_manuf_ops = {
-	.detect = micron_spinand_detect,
 };
 
 const struct spinand_manufacturer micron_spinand_manufacturer = {
 	.id = SPINAND_MFR_MICRON,
 	.name = "Micron",
+	.chips = micron_spinand_table,
+	.nchips = ARRAY_SIZE(micron_spinand_table),
 	.ops = &micron_spinand_manuf_ops,
 };
diff --git a/drivers/mtd/nand/spi/silicongo.c b/drivers/mtd/nand/spi/silicongo.c
index 0feaa562e9..f3c1946440 100644
--- a/drivers/mtd/nand/spi/silicongo.c
+++ b/drivers/mtd/nand/spi/silicongo.c
@@ -54,7 +54,8 @@ static const struct mtd_ooblayout_ops sgm7000i_ooblayout = {
 };
 
 static const struct spinand_info silicongo_spinand_table[] = {
-	SPINAND_INFO("SGM7000I-S24W1GH", 0xC1,
+	SPINAND_INFO("SGM7000I-S24W1GH",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xC1),
 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
 		     NAND_ECCREQ(4, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -64,44 +65,13 @@ static const struct spinand_info silicongo_spinand_table[] = {
 		     SPINAND_ECCINFO(&sgm7000i_ooblayout, NULL)),
 };
 
-/**
- * silicongo_spinand_detect - initialize device related part in spinand_device
- * struct if it is a silicongo device.
- * @spinand: SPI NAND device structure
- */
-static int silicongo_spinand_detect(struct spinand_device *spinand)
-{
-	u8 *id = spinand->id.data;
-	int ret;
-
-	/*
-	 * silicongo SPI NAND read ID need a dummy byte,
-	 * so the first byte in raw_id is dummy.
-	 */
-	if (id[1] != SPINAND_MFR_SILICONGO)
-		return 0;
-
-	ret = spinand_match_and_init(spinand, silicongo_spinand_table,
-				     ARRAY_SIZE(silicongo_spinand_table), id[2]);
-	/* Not Only SILICONGO Nands MFR equals C8h */
-	if (ret)
-		return 0;
-
-	return 1;
-}
-
-static int silicongo_spinand_init(struct spinand_device *spinand)
-{
-	return 0;
-}
-
 static const struct spinand_manufacturer_ops silicongo_spinand_manuf_ops = {
-	.detect = silicongo_spinand_detect,
-	.init = silicongo_spinand_init,
 };
 
 const struct spinand_manufacturer silicongo_spinand_manufacturer = {
 	.id = SPINAND_MFR_SILICONGO,
 	.name = "silicongo",
+	.chips = silicongo_spinand_table,
+	.nchips = ARRAY_SIZE(silicongo_spinand_table),
 	.ops = &silicongo_spinand_manuf_ops,
 };
diff --git a/drivers/mtd/nand/spi/toshiba.c b/drivers/mtd/nand/spi/toshiba.c
index 86ee481745..5b4ca3eae0 100644
--- a/drivers/mtd/nand/spi/toshiba.c
+++ b/drivers/mtd/nand/spi/toshiba.c
@@ -98,7 +98,8 @@ static int tc58cxgxsx_ecc_get_status(struct spinand_device *spinand,
 
 static const struct spinand_info toshiba_spinand_table[] = {
 	/* 3.3V 1Gb */
-	SPINAND_INFO("TC58CVG0S3", 0xC2,
+	SPINAND_INFO("TC58CVG0S3",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xC2),
 		     NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
 		     NAND_ECCREQ(8, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -108,7 +109,8 @@ static const struct spinand_info toshiba_spinand_table[] = {
 		     SPINAND_ECCINFO(&tc58cxgxsx_ooblayout,
 				     tc58cxgxsx_ecc_get_status)),
 	/* 3.3V 2Gb */
-	SPINAND_INFO("TC58CVG1S3", 0xCB,
+	SPINAND_INFO("TC58CVG1S3",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xCB),
 		     NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
 		     NAND_ECCREQ(8, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -118,7 +120,8 @@ static const struct spinand_info toshiba_spinand_table[] = {
 		     SPINAND_ECCINFO(&tc58cxgxsx_ooblayout,
 				     tc58cxgxsx_ecc_get_status)),
 	/* 3.3V 4Gb */
-	SPINAND_INFO("TC58CVG2S0", 0xCD,
+	SPINAND_INFO("TC58CVG2S0",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xCD),
 		     NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1),
 		     NAND_ECCREQ(8, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -128,7 +131,8 @@ static const struct spinand_info toshiba_spinand_table[] = {
 		     SPINAND_ECCINFO(&tc58cxgxsx_ooblayout,
 				     tc58cxgxsx_ecc_get_status)),
 	/* 1.8V 1Gb */
-	SPINAND_INFO("TC58CYG0S3", 0xB2,
+	SPINAND_INFO("TC58CYG0S3",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xB2),
 		     NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
 		     NAND_ECCREQ(8, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -138,7 +142,8 @@ static const struct spinand_info toshiba_spinand_table[] = {
 		     SPINAND_ECCINFO(&tc58cxgxsx_ooblayout,
 				     tc58cxgxsx_ecc_get_status)),
 	/* 1.8V 2Gb */
-	SPINAND_INFO("TC58CYG1S3", 0xBB,
+	SPINAND_INFO("TC58CYG1S3",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xBB),
 		     NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
 		     NAND_ECCREQ(8, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -148,7 +153,8 @@ static const struct spinand_info toshiba_spinand_table[] = {
 		     SPINAND_ECCINFO(&tc58cxgxsx_ooblayout,
 				     tc58cxgxsx_ecc_get_status)),
 	/* 1.8V 4Gb */
-	SPINAND_INFO("TC58CYG2S0", 0xBD,
+	SPINAND_INFO("TC58CYG2S0",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xBD),
 		     NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1),
 		     NAND_ECCREQ(8, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -158,7 +164,8 @@ static const struct spinand_info toshiba_spinand_table[] = {
 		     SPINAND_ECCINFO(&tc58cxgxsx_ooblayout,
 				     tc58cxgxsx_ecc_get_status)),
 	/* 3.3V 1Gb */
-	SPINAND_INFO("TC58CVG0S3HRAIJ", 0xE2,
+	SPINAND_INFO("TC58CVG0S3HRAIJ",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE2),
 		     NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
 		     NAND_ECCREQ(8, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -168,7 +175,8 @@ static const struct spinand_info toshiba_spinand_table[] = {
 		     SPINAND_ECCINFO(&tc58cxgxsx_ooblayout,
 				     tc58cxgxsx_ecc_get_status)),
 	/* 3.3V 2Gb */
-	SPINAND_INFO("TC58CVG1S3HRAIJ", 0xEB,
+	SPINAND_INFO("TC58CVG1S3HRAIJ",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xEB),
 		     NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
 		     NAND_ECCREQ(8, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -178,7 +186,8 @@ static const struct spinand_info toshiba_spinand_table[] = {
 		     SPINAND_ECCINFO(&tc58cxgxsx_ooblayout,
 				     tc58cxgxsx_ecc_get_status)),
 	/* 3.3V 4Gb */
-	SPINAND_INFO("TC58CVG2S0HRAIJ", 0xED,
+	SPINAND_INFO("TC58CVG2S0HRAIJ",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xED),
 		     NAND_MEMORG(1, 4096, 128, 64, 2048, 1, 1, 1),
 		     NAND_ECCREQ(8, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -189,33 +198,13 @@ static const struct spinand_info toshiba_spinand_table[] = {
 				     tc58cxgxsx_ecc_get_status)),
 };
 
-static int toshiba_spinand_detect(struct spinand_device *spinand)
-{
-	u8 *id = spinand->id.data;
-	int ret;
-
-	/*
-	 * Toshiba SPI NAND read ID needs a dummy byte,
-	 * so the first byte in id is garbage.
-	 */
-	if (id[1] != SPINAND_MFR_TOSHIBA)
-		return 0;
-
-	ret = spinand_match_and_init(spinand, toshiba_spinand_table,
-				     ARRAY_SIZE(toshiba_spinand_table),
-				     id[2]);
-	if (ret)
-		return ret;
-
-	return 1;
-}
-
 static const struct spinand_manufacturer_ops toshiba_spinand_manuf_ops = {
-	.detect = toshiba_spinand_detect,
 };
 
 const struct spinand_manufacturer toshiba_spinand_manufacturer = {
 	.id = SPINAND_MFR_TOSHIBA,
 	.name = "Toshiba",
+	.chips = toshiba_spinand_table,
+	.nchips = ARRAY_SIZE(toshiba_spinand_table),
 	.ops = &toshiba_spinand_manuf_ops,
 };
diff --git a/drivers/mtd/nand/spi/unim.c b/drivers/mtd/nand/spi/unim.c
index 55bff1ea11..8dd0b9bc7c 100644
--- a/drivers/mtd/nand/spi/unim.c
+++ b/drivers/mtd/nand/spi/unim.c
@@ -82,7 +82,8 @@ static int tx25g01_ecc_get_status(struct spinand_device *spinand,
 }
 
 static const struct spinand_info unim_spinand_table[] = {
-	SPINAND_INFO("TX25G01", 0xF1,
+	SPINAND_INFO("TX25G01",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xF1),
 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
 		     NAND_ECCREQ(4, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -92,39 +93,13 @@ static const struct spinand_info unim_spinand_table[] = {
 		     SPINAND_ECCINFO(&tx25g01_ooblayout, tx25g01_ecc_get_status)),
 };
 
-/**
- * unim_spinand_detect - initialize device related part in spinand_device
- * struct if it is a UNIM device.
- * @spinand: SPI NAND device structure
- */
-static int unim_spinand_detect(struct spinand_device *spinand)
-{
-	u8 *id = spinand->id.data;
-	int ret;
-
-	/*
-	 * UNIM SPI NAND read ID need a dummy byte,
-	 * so the first byte in raw_id is dummy.
-	 */
-	if (id[1] != SPINAND_MFR_UNIM)
-		return 0;
-
-	ret = spinand_match_and_init(spinand, unim_spinand_table,
-				     ARRAY_SIZE(unim_spinand_table),
-				     id[2]);
-	/* Not Only UNIM Nands MFR equals A1h */
-	if (ret)
-		return 0;
-
-	return 1;
-}
-
 static const struct spinand_manufacturer_ops unim_spinand_manuf_ops = {
-	.detect = unim_spinand_detect,
 };
 
 const struct spinand_manufacturer unim_spinand_manufacturer = {
 	.id = SPINAND_MFR_UNIM,
 	.name = "UNIM",
+	.chips = unim_spinand_table,
+	.nchips = ARRAY_SIZE(unim_spinand_table),
 	.ops = &unim_spinand_manuf_ops,
 };
diff --git a/drivers/mtd/nand/spi/winbond.c b/drivers/mtd/nand/spi/winbond.c
index 0a0f192b03..58e91c395d 100644
--- a/drivers/mtd/nand/spi/winbond.c
+++ b/drivers/mtd/nand/spi/winbond.c
@@ -145,8 +145,10 @@ static int w25n02kv_ecc_get_status(struct spinand_device *spinand,
 	return -EINVAL;
 }
 
+/* Another set for the same id[2] devices in one series */
 static const struct spinand_info winbond_spinand_table[] = {
-	SPINAND_INFO("W25M02GV", 0xAB,
+	SPINAND_INFO("W25M02GV",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xAB),
 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 2),
 		     NAND_ECCREQ(1, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -155,11 +157,8 @@ static const struct spinand_info winbond_spinand_table[] = {
 		     0,
 		     SPINAND_ECCINFO(&w25m02gv_ooblayout, NULL),
 		     SPINAND_SELECT_TARGET(w25m02gv_select_target)),
-};
-
-/* Another set for the same id[2] devices in one series */
-static const struct spinand_info winbond_spinand_table2[] = {
-	SPINAND_INFO("W25N512GV", 0x20,
+	SPINAND_INFO("W25N512GV",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xAA, 0x20),
 		     NAND_MEMORG(1, 2048, 64, 64, 512, 1, 1, 1),
 		     NAND_ECCREQ(1, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -168,7 +167,8 @@ static const struct spinand_info winbond_spinand_table2[] = {
 		     0,
 		     SPINAND_ECCINFO(&w25m02gv_ooblayout, NULL),
 		     SPINAND_SELECT_TARGET(w25m02gv_select_target)),
-	SPINAND_INFO("W25N01GV", 0x21,
+	SPINAND_INFO("W25N01GV",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xAA, 0x21),
 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
 		     NAND_ECCREQ(1, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -177,7 +177,8 @@ static const struct spinand_info winbond_spinand_table2[] = {
 		     0,
 		     SPINAND_ECCINFO(&w25m02gv_ooblayout, NULL),
 		     SPINAND_SELECT_TARGET(w25m02gv_select_target)),
-	SPINAND_INFO("W25N02KV", 0x22,
+	SPINAND_INFO("W25N02KV",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xAA, 0x22),
 		     NAND_MEMORG(1, 2048, 64, 64, 2048, 1, 1, 1),
 		     NAND_ECCREQ(8, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -186,7 +187,8 @@ static const struct spinand_info winbond_spinand_table2[] = {
 		     0,
 		     SPINAND_ECCINFO(&w25n02kv_ooblayout,
 				     w25n02kv_ecc_get_status)),
-	SPINAND_INFO("W25N04KV", 0x23,
+	SPINAND_INFO("W25N04KV",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xAA, 0x23),
 		     NAND_MEMORG(1, 2048, 64, 64, 4096, 1, 1, 1),
 		     NAND_ECCREQ(8, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -195,40 +197,18 @@ static const struct spinand_info winbond_spinand_table2[] = {
 		     0,
 		     SPINAND_ECCINFO(&w25n02kv_ooblayout,
 				     w25n02kv_ecc_get_status)),
+	SPINAND_INFO("W25N01GW",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xBA, 0x21),
+		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
+		     NAND_ECCREQ(1, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     0,
+		     SPINAND_ECCINFO(&w25m02gv_ooblayout, NULL),
+		     SPINAND_SELECT_TARGET(w25m02gv_select_target)),
 };
 
-/**
- * winbond_spinand_detect - initialize device related part in spinand_device
- * struct if it is a Winbond device.
- * @spinand: SPI NAND device structure
- */
-static int winbond_spinand_detect(struct spinand_device *spinand)
-{
-	u8 *id = spinand->id.data;
-	int ret;
-
-	/*
-	 * Winbond SPI NAND read ID need a dummy byte,
-	 * so the first byte in raw_id is dummy.
-	 */
-	if (id[1] != SPINAND_MFR_WINBOND)
-		return 0;
-
-	if (id[2] == 0xAA)
-		ret = spinand_match_and_init(spinand, winbond_spinand_table2,
-					     ARRAY_SIZE(winbond_spinand_table2),
-					     id[3]);
-	else
-		ret = spinand_match_and_init(spinand, winbond_spinand_table,
-					     ARRAY_SIZE(winbond_spinand_table),
-					     id[2]);
-
-	if (ret)
-		return ret;
-
-	return 1;
-}
-
 static int winbond_spinand_init(struct spinand_device *spinand)
 {
 	struct nand_device *nand = spinand_to_nand(spinand);
@@ -248,12 +228,13 @@ static int winbond_spinand_init(struct spinand_device *spinand)
 }
 
 static const struct spinand_manufacturer_ops winbond_spinand_manuf_ops = {
-	.detect = winbond_spinand_detect,
 	.init = winbond_spinand_init,
 };
 
 const struct spinand_manufacturer winbond_spinand_manufacturer = {
 	.id = SPINAND_MFR_WINBOND,
 	.name = "Winbond",
+	.chips = winbond_spinand_table,
+	.nchips = ARRAY_SIZE(winbond_spinand_table),
 	.ops = &winbond_spinand_manuf_ops,
 };
diff --git a/drivers/mtd/nand/spi/xtx.c b/drivers/mtd/nand/spi/xtx.c
index 51a8f78509..7d3d938b9c 100644
--- a/drivers/mtd/nand/spi/xtx.c
+++ b/drivers/mtd/nand/spi/xtx.c
@@ -206,7 +206,8 @@ static int xt26g01c_ecc_get_status(struct spinand_device *spinand,
 }
 
 static const struct spinand_info xtx_spinand_table[] = {
-	SPINAND_INFO("XT26G01A", 0xE1,
+	SPINAND_INFO("XT26G01A",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE1),
 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
 		     NAND_ECCREQ(8, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -215,7 +216,8 @@ static const struct spinand_info xtx_spinand_table[] = {
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&xt26g0xa_ooblayout,
 				     xt26g0xa_ecc_get_status)),
-	SPINAND_INFO("XT26G02A", 0xE2,
+	SPINAND_INFO("XT26G02A",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE2),
 		     NAND_MEMORG(1, 2048, 64, 64, 2048, 1, 1, 1),
 		     NAND_ECCREQ(8, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -224,7 +226,8 @@ static const struct spinand_info xtx_spinand_table[] = {
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&xt26g0xa_ooblayout,
 				     xt26g0xa_ecc_get_status)),
-	SPINAND_INFO("XT26G04A", 0xE3,
+	SPINAND_INFO("XT26G04A",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE3),
 		     NAND_MEMORG(1, 2048, 64, 128, 2048, 1, 1, 1),
 		     NAND_ECCREQ(8, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -233,7 +236,8 @@ static const struct spinand_info xtx_spinand_table[] = {
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&xt26g0xa_ooblayout,
 				     xt26g0xa_ecc_get_status)),
-	SPINAND_INFO("XT26G01B", 0xF1,
+	SPINAND_INFO("XT26G01B",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xF1),
 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
 		     NAND_ECCREQ(8, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -242,7 +246,8 @@ static const struct spinand_info xtx_spinand_table[] = {
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&xt26g01b_ooblayout,
 				     xt26g0xa_ecc_get_status)),
-	SPINAND_INFO("XT26G02B", 0xF2,
+	SPINAND_INFO("XT26G02B",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xF2),
 		     NAND_MEMORG(1, 2048, 64, 64, 2048, 1, 1, 1),
 		     NAND_ECCREQ(4, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -251,7 +256,8 @@ static const struct spinand_info xtx_spinand_table[] = {
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&xt26g02b_ooblayout,
 				     xt26g02b_ecc_get_status)),
-	SPINAND_INFO("XT26G01C", 0x11,
+	SPINAND_INFO("XT26G01C",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x11),
 		     NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
 		     NAND_ECCREQ(8, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -260,7 +266,8 @@ static const struct spinand_info xtx_spinand_table[] = {
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&xt26g01c_ooblayout,
 				     xt26g01c_ecc_get_status)),
-	SPINAND_INFO("XT26G02C", 0x12,
+	SPINAND_INFO("XT26G02C",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x12),
 		     NAND_MEMORG(1, 2048, 64, 64, 2048, 1, 1, 1),
 		     NAND_ECCREQ(8, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -269,7 +276,8 @@ static const struct spinand_info xtx_spinand_table[] = {
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&xt26g0xa_ooblayout,
 				     xt26g01c_ecc_get_status)),
-	SPINAND_INFO("XT26G04C", 0x13,
+	SPINAND_INFO("XT26G04C",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x13),
 		     NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1),
 		     NAND_ECCREQ(8, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -278,7 +286,8 @@ static const struct spinand_info xtx_spinand_table[] = {
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&xt26g01c_ooblayout,
 				     xt26g01c_ecc_get_status)),
-	SPINAND_INFO("XT26G11C", 0x15,
+	SPINAND_INFO("XT26G11C",
+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x15),
 		     NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
 		     NAND_ECCREQ(8, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -289,33 +298,13 @@ static const struct spinand_info xtx_spinand_table[] = {
 				     xt26g01c_ecc_get_status)),
 };
 
-static int xtx_spinand_detect(struct spinand_device *spinand)
-{
-	u8 *id = spinand->id.data;
-	int ret;
-
-	/*
-	 * XTX SPI NAND read ID needs a dummy byte, so the first byte in
-	 * raw_id is garbage.
-	 */
-	if (id[1] != SPINAND_MFR_XTX)
-		return 0;
-
-	ret = spinand_match_and_init(spinand, xtx_spinand_table,
-				     ARRAY_SIZE(xtx_spinand_table),
-				     id[2]);
-	if (ret)
-		return ret;
-
-	return 1;
-}
-
 static const struct spinand_manufacturer_ops xtx_spinand_manuf_ops = {
-	.detect = xtx_spinand_detect,
 };
 
 const struct spinand_manufacturer xtx_spinand_manufacturer = {
 	.id = SPINAND_MFR_XTX,
 	.name = "xtx",
+	.chips = xtx_spinand_table,
+	.nchips = ARRAY_SIZE(xtx_spinand_table),
 	.ops = &xtx_spinand_manuf_ops,
 };
diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
index 5d60fdf077..012d622a39 100644
--- a/include/linux/mtd/spinand.h
+++ b/include/linux/mtd/spinand.h
@@ -39,9 +39,9 @@
 		   SPI_MEM_OP_NO_DUMMY,					\
 		   SPI_MEM_OP_NO_DATA)
 
-#define SPINAND_READID_OP(ndummy, buf, len)				\
+#define SPINAND_READID_OP(naddr, ndummy, buf, len)			\
 	SPI_MEM_OP(SPI_MEM_OP_CMD(0x9f, 1),				\
-		   SPI_MEM_OP_NO_ADDR,					\
+		   SPI_MEM_OP_ADDR(naddr, 0, 1),			\
 		   SPI_MEM_OP_DUMMY(ndummy, 1),				\
 		   SPI_MEM_OP_DATA_IN(len, buf, 1))
 
@@ -153,37 +153,46 @@ struct spinand_device;
  * @data: buffer containing the id bytes. Currently 4 bytes large, but can
  *	  be extended if required
  * @len: ID length
- *
- * struct_spinand_id->data contains all bytes returned after a READ_ID command,
- * including dummy bytes if the chip does not emit ID bytes right after the
- * READ_ID command. The responsibility to extract real ID bytes is left to
- * struct_manufacurer_ops->detect().
  */
 struct spinand_id {
 	u8 data[SPINAND_MAX_ID_LEN];
 	int len;
 };
 
+enum spinand_readid_method {
+	SPINAND_READID_METHOD_OPCODE,
+	SPINAND_READID_METHOD_OPCODE_ADDR,
+	SPINAND_READID_METHOD_OPCODE_DUMMY,
+};
+
+/**
+ * struct spinand_devid - SPI NAND device id structure
+ * @id: device id of current chip
+ * @len: number of bytes in device id
+ * @method: method to read chip id
+ *	    There are 3 possible variants:
+ *	    SPINAND_READID_METHOD_OPCODE: chip id is returned immediately
+ *	    after read_id opcode.
+ *	    SPINAND_READID_METHOD_OPCODE_ADDR: chip id is returned after
+ *	    read_id opcode + 1-byte address.
+ *	    SPINAND_READID_METHOD_OPCODE_DUMMY: chip id is returned after
+ *	    read_id opcode + 1 dummy byte.
+ */
+struct spinand_devid {
+	const u8 *id;
+	const u8 len;
+	const enum spinand_readid_method method;
+};
+
 /**
  * struct manufacurer_ops - SPI NAND manufacturer specific operations
- * @detect: detect a SPI NAND device. Every time a SPI NAND device is probed
- *	    the core calls the struct_manufacurer_ops->detect() hook of each
- *	    registered manufacturer until one of them return 1. Note that
- *	    the first thing to check in this hook is that the manufacturer ID
- *	    in struct_spinand_device->id matches the manufacturer whose
- *	    ->detect() hook has been called. Should return 1 if there's a
- *	    match, 0 if the manufacturer ID does not match and a negative
- *	    error code otherwise. When true is returned, the core assumes
- *	    that properties of the NAND chip (spinand->base.memorg and
- *	    spinand->base.eccreq) have been filled
  * @init: initialize a SPI NAND device
  * @cleanup: cleanup a SPI NAND device
  *
  * Each SPI NAND manufacturer driver should implement this interface so that
- * NAND chips coming from this vendor can be detected and initialized properly.
+ * NAND chips coming from this vendor can be initialized properly.
  */
 struct spinand_manufacturer_ops {
-	int (*detect)(struct spinand_device *spinand);
 	int (*init)(struct spinand_device *spinand);
 	void (*cleanup)(struct spinand_device *spinand);
 };
@@ -192,11 +201,16 @@ struct spinand_manufacturer_ops {
  * struct spinand_manufacturer - SPI NAND manufacturer instance
  * @id: manufacturer ID
  * @name: manufacturer name
+ * @devid_len: number of bytes in device ID
+ * @chips: supported SPI NANDs under current manufacturer
+ * @nchips: number of SPI NANDs available in chips array
  * @ops: manufacturer operations
  */
 struct spinand_manufacturer {
 	u8 id;
 	char *name;
+	const struct spinand_info *chips;
+	const size_t nchips;
 	const struct spinand_manufacturer_ops *ops;
 };
 
@@ -278,7 +292,7 @@ struct spinand_ecc_info {
  */
 struct spinand_info {
 	const char *model;
-	u8 devid;
+	struct spinand_devid devid;
 	u32 flags;
 	struct nand_memory_organization memorg;
 	struct nand_ecc_req eccreq;
@@ -292,6 +306,13 @@ struct spinand_info {
 			     unsigned int target);
 };
 
+#define SPINAND_ID(__method, ...)					\
+	{								\
+		.id = (const u8[]){ __VA_ARGS__ },			\
+		.len = sizeof((u8[]){ __VA_ARGS__ }),			\
+		.method = __method,					\
+	}
+
 #define SPINAND_INFO_OP_VARIANTS(__read, __write, __update)		\
 	{								\
 		.read_cache = __read,					\
@@ -435,9 +456,10 @@ static inline void spinand_set_of_node(struct spinand_device *spinand,
 	nanddev_set_of_node(&spinand->base, np);
 }
 
-int spinand_match_and_init(struct spinand_device *dev,
+int spinand_match_and_init(struct spinand_device *spinand,
 			   const struct spinand_info *table,
-			   unsigned int table_size, u8 devid);
+			   unsigned int table_size,
+			   enum spinand_readid_method rdid_method);
 
 int spinand_upd_cfg(struct spinand_device *spinand, u8 mask, u8 val);
 int spinand_select_target(struct spinand_device *spinand, unsigned int target);

commit 9b61514dbd2011da9fa5beb0896843500f915c04
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Oct 12 16:55:14 2021 +0800

    configs: rv1126: enable  SPL_GPIO_SUPPORT
    
    We use gpio function in spl, like sd card detection.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ieb867b5c7116db521ce2a3e1bc4593bcf2965eae

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index 4eabd74c6d..53adbf134c 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x80000

commit 82ad4735b211d01435b0b28a4e45f59b14a5b052
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Sat Oct 9 15:41:35 2021 +0800

    rockchip: dts: rv1126: add sdmmc0 det gpio
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I4a28072b3b9db78c6d757f9aeabe686036c13644

diff --git a/arch/arm/dts/rv1126-u-boot.dtsi b/arch/arm/dts/rv1126-u-boot.dtsi
index 38ab939107..3da48d657a 100644
--- a/arch/arm/dts/rv1126-u-boot.dtsi
+++ b/arch/arm/dts/rv1126-u-boot.dtsi
@@ -193,6 +193,11 @@
 	status = "okay";
 };
 
+&gpio0 {
+	u-boot,dm-spl;
+	status = "okay";
+};
+
 &gpio1 {
 	u-boot,dm-spl;
 	status = "okay";
diff --git a/arch/arm/dts/rv1126.dtsi b/arch/arm/dts/rv1126.dtsi
index 8ddfcee4e9..674ff1a9be 100644
--- a/arch/arm/dts/rv1126.dtsi
+++ b/arch/arm/dts/rv1126.dtsi
@@ -1889,6 +1889,7 @@
 		clocks = <&cru HCLK_SDMMC>, <&cru CLK_SDMMC>,
 			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
 		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
+		cd-gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>;
 		fifo-depth = <0x100>;
 		max-frequency = <200000000>;
 		pinctrl-names = "default";

commit dc58c9971743878e9f494f43d61bd2ad41741d97
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Sat Oct 9 16:11:20 2021 +0800

    dwmmc: support sd card detect in spl
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ia3c03629ee41f79e79744110fdaa6f3b6b7f5597

diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 09c694924d..714a444254 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -788,8 +788,8 @@ static int dwmci_init(struct mmc *mmc)
 static int dwmci_get_cd(struct udevice *dev)
 {
 	int ret = -1;
-#ifndef CONFIG_SPL_BUILD
-#ifdef CONFIG_DM_GPIO
+
+#if defined(CONFIG_DM_GPIO) && (defined(CONFIG_SPL_GPIO_SUPPORT) || !defined(CONFIG_SPL_BUILD))
 	struct gpio_desc detect;
 
 	ret = gpio_request_by_name(dev, "cd-gpios", 0, &detect, GPIOD_IS_IN);
@@ -798,7 +798,6 @@ static int dwmci_get_cd(struct udevice *dev)
 	}
 
 	ret = !dm_gpio_get_value(&detect);
-#endif
 #endif
 	return ret;
 }

commit 692d3098ab4dc818c69828d0cc9963e520c66476
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Oct 13 09:37:58 2021 +0000

    rockchip: board: add comments
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ia0e5762dc5149be7ae66dad7b232ff79b8d0ddb9

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 3fe057c804..db9bfc16b0 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -355,6 +355,10 @@ static void cmdline_handle(void)
 	if (!dev_desc)
 		return;
 
+	/*
+	 * From rk356x, the sd/udisk update flag was moved from
+	 * IDB to Android BCB.
+	 */
 	if (get_bcb_recovery_msg() == BCB_MSG_RECOVERY_RK_FWUPDATE) {
 		if (dev_desc->if_type == IF_TYPE_MMC && dev_desc->devnum == 1)
 			env_update("bootargs", "sdfwupdate");

commit 42b70acccc7e61339edbf3dbe8aa1fd0b7e5eb1b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Oct 13 08:56:27 2021 +0000

    rockchip: boot mode: always read BCB recovery msg from misc.img
    
    It fixes the U-disk upgrade failed to add "usbfwupdate" to kernel
    cmdline, because we only read BCB recovery msg once and it was
    ealier than U-disk init.
    
    boot log:
            dwmmc@fe2b0000: 1, dwmmc@fe2c0000: 2, sdhci@fe310000: 0
            Bootdev(atags): mmc 0
            MMC0: HS200, 200Mhz
            PartType: EFI
            boot mode: recovery (misc)
            FIT: No fdt blob
            boot mode: None      // BCB read once here
            Android 11.0, Build 2021.7, v2
            Found DTB in boot part
            ......
    
            starting USB...      // U-disk init
            ......
            Boot from usb 0      // Upgrade U-disk was found
            Rockchip UBOOT DRM driver version: v1.0.1
            VOP have 2 active VP
            ......
    
    Fixes:
    (706ec1d419 rockchip: add get_bcb_recovery_msg() to record recovery msg)
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I297813d48a0f8d352b20984273f9db5960afa96e

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index 5fd20c23ca..cd5a6a2135 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -18,9 +18,7 @@ enum {
 	PL,
 };
 
-static u32 bcb_recovery_msg;
-
-static int misc_require_recovery(u32 bcb_offset)
+static int misc_require_recovery(u32 bcb_offset, int *bcb_recovery_msg)
 {
 	struct bootloader_message *bmsg;
 	struct blk_desc *dev_desc;
@@ -44,11 +42,13 @@ static int misc_require_recovery(u32 bcb_offset)
 		recovery = 0;
 	} else {
 		recovery = !strcmp(bmsg->command, "boot-recovery");
-		if (!strcmp(bmsg->recovery, "recovery\n--rk_fwupdate\n"))
-			bcb_recovery_msg = BCB_MSG_RECOVERY_RK_FWUPDATE;
-		else if (!strcmp(bmsg->recovery, "recovery\n--factory_mode=whole") ||
-			 !strcmp(bmsg->recovery, "recovery\n--factory_mode=small"))
-			bcb_recovery_msg = BCB_MSG_RECOVERY_PCBA;
+		if (bcb_recovery_msg) {
+			if (!strcmp(bmsg->recovery, "recovery\n--rk_fwupdate\n"))
+				*bcb_recovery_msg = BCB_MSG_RECOVERY_RK_FWUPDATE;
+			else if (!strcmp(bmsg->recovery, "recovery\n--factory_mode=whole") ||
+				 !strcmp(bmsg->recovery, "recovery\n--factory_mode=small"))
+				*bcb_recovery_msg = BCB_MSG_RECOVERY_PCBA;
+		}
 	}
 
 	free(bmsg);
@@ -58,6 +58,14 @@ out:
 
 int get_bcb_recovery_msg(void)
 {
+	int bcb_recovery_msg = BCB_MSG_RECOVERY_NONE;
+#ifdef CONFIG_ANDROID_BOOT_IMAGE
+	u32 bcb_offset = android_bcb_msg_sector_offset();
+#else
+	u32 bcb_offset = BCB_MESSAGE_BLK_OFFSET;
+#endif
+	misc_require_recovery(bcb_offset, &bcb_recovery_msg);
+
 	return bcb_recovery_msg;
 }
 
@@ -81,6 +89,7 @@ int rockchip_get_boot_mode(void)
 	uint32_t reg_boot_mode;
 	char *env_reboot_mode;
 	int clear_boot_reg = 0;
+	int recovery_msg = 0;
 #ifdef CONFIG_ANDROID_BOOT_IMAGE
 	u32 offset = android_bcb_msg_sector_offset();
 #else
@@ -157,7 +166,7 @@ int rockchip_get_boot_mode(void)
 		printf("boot mode: bootloader\n");
 		boot_mode[PH] = BOOT_MODE_BOOTLOADER;
 		clear_boot_reg = 1;
-	} else if (misc_require_recovery(bcb_offset)) {
+	} else if (misc_require_recovery(bcb_offset, &recovery_msg)) {
 		printf("boot mode: recovery (misc)\n");
 		boot_mode[PM] = BOOT_MODE_RECOVERY;
 	} else {

commit 6866616e99a99f86f18a87de128c0bfbf7d551b7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 11 09:16:01 2021 +0000

    rockchip: rk3308: fixup pcfg drive-strength for rk3308bs
    
    Traversing max depth2 of all nodes from root path "/".
    
    Time-Stat example: cpu on 816Mhz spends about 7ms on
    traversing total 272 nodes, including fixup some of them.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I919349f332e0081a92775d58456f68c4bd72f052

diff --git a/arch/arm/mach-rockchip/rk3308/rk3308.c b/arch/arm/mach-rockchip/rk3308/rk3308.c
index 765ca9b732..a82e4f6bcd 100644
--- a/arch/arm/mach-rockchip/rk3308/rk3308.c
+++ b/arch/arm/mach-rockchip/rk3308/rk3308.c
@@ -526,6 +526,49 @@ static int fdt_fixup_dmc_opp_table(const void *blob)
 	return 0;
 }
 
+static void fixup_pcfg_drive_strength(const void *blob, int noffset)
+{
+	u32 *ds, *dss;
+	u32 val;
+
+	dss = (u32 *)fdt_getprop(blob, noffset, "drive-strength-s", NULL);
+	if (!dss)
+		return;
+
+	val = dss[0];
+	ds = (u32 *)fdt_getprop(blob, noffset, "drive-strength", NULL);
+	if (ds) {
+		ds[0] = val;
+	} else {
+		if (fdt_setprop((void *)blob, noffset,
+				"drive-strength", &val, 4) < 0)
+			printf("Failed to add drive-strength prop\n");
+	}
+}
+
+static int fdt_fixup_pcfg(const void *blob)
+{
+	int depth1_node;
+	int depth2_node;
+	int root_node;
+
+	root_node = fdt_path_offset(blob, "/");
+	if (root_node < 0)
+		return root_node;
+
+	fdt_for_each_subnode(depth1_node, blob, root_node) {
+		debug("depth1: %s\n", fdt_get_name(blob, depth2_node, NULL));
+		fixup_pcfg_drive_strength(blob, depth1_node);
+		fdt_for_each_subnode(depth2_node, blob, depth1_node) {
+			debug("    depth2: %s\n",
+			      fdt_get_name(blob, depth2_node, NULL));
+			fixup_pcfg_drive_strength(blob, depth2_node);
+		}
+	}
+
+	return 0;
+}
+
 static int fdt_fixup_thermal_zones(const void *blob)
 {
 	int thermal_node;
@@ -558,6 +601,7 @@ int rk_board_fdt_fixup(const void *blob)
 		fdt_fixup_cpu_idle(blob);
 		fdt_fixup_cpu_opp_table(blob);
 		fdt_fixup_dmc_opp_table(blob);
+		fdt_fixup_pcfg(blob);
 		fdt_fixup_thermal_zones(blob);
 	}
 

commit 0e4a242d502274b5c8db5106479948a4040bd5ff
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Oct 12 14:39:03 2021 +0800

    rockchip: rv1126: fix mcu does not work probabilistically
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I2c40923e092bb3afd27b35575282398c45b6b53a

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126.c b/arch/arm/mach-rockchip/rv1126/rv1126.c
index ad21690228..2a6f33dd36 100644
--- a/arch/arm/mach-rockchip/rv1126/rv1126.c
+++ b/arch/arm/mach-rockchip/rv1126/rv1126.c
@@ -87,6 +87,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define CRU_PMU_GPLL_CON1	0x14
 
 #define GRF_BASE		0xFE000000
+#define GRF_SOC_CON2		0x008
 #define PMUGRF_BASE		0xFE020000
 #define SGRF_BASE		0xFE0A0000
 #define SGRF_CON_SCR1_BOOT_ADDR	0x0b0
@@ -742,6 +743,11 @@ int arch_cpu_init(void)
 #ifdef CONFIG_SPL_BUILD
 int spl_fit_standalone_release(uintptr_t entry_point)
 {
+	/*
+	 * Fix mcu does not work probabilistically through reset the
+	 * mcu debug module. If use the jtag debug, reset it.
+	 */
+	writel(0x80008000, GRF_BASE + GRF_SOC_CON2);
 	/* Reset the scr1 */
 	writel(0x04000400, CRU_BASE + CRU_SOFTRST_CON02);
 	udelay(100);

commit 786fea6f8213269df607d6d8431a0734ed423c6a
Author: Wesley Yao <wesley.yao@rock-chips.com>
Date:   Thu Sep 2 09:19:18 2021 +0800

    drivers: ram: rv1108_pctl_phy: fix value of dll bypass regs
    
    Add shift of mask in dll bypass regs.
    
    Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
    Change-Id: I0677580d1fe1b3a510896ea8bf710ec39342df52

diff --git a/drivers/ram/rockchip/sdram_rv1108_pctl_phy.c b/drivers/ram/rockchip/sdram_rv1108_pctl_phy.c
index b680ab9d80..5918cba197 100644
--- a/drivers/ram/rockchip/sdram_rv1108_pctl_phy.c
+++ b/drivers/ram/rockchip/sdram_rv1108_pctl_phy.c
@@ -59,20 +59,22 @@ static void phy_pctrl_reset(struct dram_info *priv)
 
 static void phy_dll_bypass_set(struct dram_info *priv, unsigned int freq)
 {
-	clrsetbits_le32(&priv->phy->phy_reg13, CMD_DLL_BYPASS_MASK,
+	clrsetbits_le32(&priv->phy->phy_reg13,
+			CMD_DLL_BYPASS_MASK << CMD_DLL_BYPASS_SHIFT,
 			CMD_DLL_BYPASS << CMD_DLL_BYPASS_SHIFT);
 
 	writel(CK_DLL_BYPASS_DISABLE << CK_DLL_BYPASS_SHIFT,
 	       &priv->phy->phy_reg14);
 
-	clrsetbits_le32(&priv->phy->phy_reg26, LEFT_CHN_A_DQ_DLL_BYPASS_MASK,
+	clrsetbits_le32(&priv->phy->phy_reg26,
+			LEFT_CHN_A_DQ_DLL_BYPASS_MASK << LEFT_CHN_A_DQ_DLL_SHIFT,
 			LEFT_CHN_A_DQ_DLL_BYPASS << LEFT_CHN_A_DQ_DLL_SHIFT);
-	writel(LEFT_CHN_A_DQS_DLL_BYPASS_DIS <<
-	       LEFT_CHN_A_DQS_DLL_SHIFT, &priv->phy->phy_reg27);
+	writel(LEFT_CHN_A_DQS_DLL_BYPASS_DIS << LEFT_CHN_A_DQS_DLL_SHIFT,
+	       &priv->phy->phy_reg27);
 
-	clrsetbits_le32(&priv->phy->phy_reg36, RIGHT_CHN_A_DQ_DLL_BYPASS_MASK,
-			RIGHT_CHN_A_DQ_DLL_BYPASS <<
-			RIGHT_CHN_A_DQ_DLL_SHIFT);
+	clrsetbits_le32(&priv->phy->phy_reg36,
+			RIGHT_CHN_A_DQ_DLL_BYPASS_MASK << RIGHT_CHN_A_DQ_DLL_SHIFT,
+			RIGHT_CHN_A_DQ_DLL_BYPASS << RIGHT_CHN_A_DQ_DLL_SHIFT);
 	writel(RIGHT_CHN_A_DQS_DLL_BYPASS_DIS <<
 	       RIGHT_CHN_A_DQS_DLL_SHIFT, &priv->phy->phy_reg37);
 

commit 97c9225d68b7165029317e47f7bf6e697565b0dc
Author: shengfei Xu <xsf@rock-chips.com>
Date:   Fri Oct 8 06:23:10 2021 +0000

    power: pmic: rk8xx: buck4 min current limit select 500mA
    
    buck4 need enable current limit function to improve the converting
    efficiency in the PFM mode.
    
    Signed-off-by: shengfei Xu <xsf@rock-chips.com>
    Change-Id: Idd47b4a50c5f561414cd51050424661e4e6d1096

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index 7cf23385ac..39afb4d0fa 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -148,7 +148,7 @@ static struct reg_data rk817_init_reg[] = {
 /* enable the under-voltage protection,
  * the under-voltage protection will shutdown the LDO3 and reset the PMIC
  */
-	{ RK817_BUCK4_CMIN, 0x60, 0x60},
+	{ RK817_BUCK4_CMIN, 0x6b, 0x6e},
 	{ RK817_PMIC_SYS_CFG1, 0x20, 0x70},
 	/* Set pmic_sleep as none function */
 	{ RK817_PMIC_SYS_CFG3, 0x00, 0x18 },

commit 279f1ed4c8eca739efde1eb978c6d4a07372e72d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Sep 17 17:00:01 2021 +0800

    cmd: nvedit: don't use fixed buffer size
    
    Using calloc() is more flexsible.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I0c18b66be731b10e968a03976a15589e91ada757

diff --git a/cmd/nvedit.c b/cmd/nvedit.c
index 8efb064a74..515e42056b 100644
--- a/cmd/nvedit.c
+++ b/cmd/nvedit.c
@@ -539,66 +539,68 @@ int env_update(const char *varname, const char *varvalue)
 	return env_update_filter(varname, varvalue, NULL);
 }
 
-#define VARVALUE_BUF_SIZE	512
-
 char *env_exist(const char *varname, const char *varvalue)
 {
-	int len;
+	char *buf, *ptr = NULL;
 	char *oldvalue, *p;
-	char buf[VARVALUE_BUF_SIZE];
+	int len;
 
 	/* before import into hashtable */
 	if (!(gd->flags & GD_FLG_ENV_READY) || !varname)
 		return NULL;
 
+	len = strlen(varvalue) + 8; /* extra 8 byte is enough*/
+	buf = calloc(1, len);
+	if (!buf)
+		return NULL;
+
 	oldvalue = env_get(varname);
 	if (oldvalue) {
-		if (strlen(varvalue) > VARVALUE_BUF_SIZE) {
-			printf("%s: '%s' is too long than 512\n",
-			       __func__, varvalue);
-			return NULL;
-		}
-
 		/* Match middle one ? */
-		snprintf(buf, VARVALUE_BUF_SIZE, " %s ", varvalue);
+		snprintf(buf, len, " %s ", varvalue);
 		p = strstr(oldvalue, buf);
 		if (p) {
 			debug("%s: '%s' is already exist in '%s'(middle)\n",
 			      __func__, varvalue, varname);
-			return (p + 1);
+			ptr = (p + 1);
+			goto out;
 		} else {
 			debug("%s: not find in middle one\n", __func__);
 		}
 
 		/* Match last one ? */
-		snprintf(buf, VARVALUE_BUF_SIZE, " %s", varvalue);
+		snprintf(buf, len, " %s", varvalue);
 		p = strstr(oldvalue, buf);
 		if (p) {
 			if (*(p + strlen(varvalue) + 1) == '\0') {
 				debug("%s: '%s' is already exist in '%s'(last)\n",
 				      __func__, varvalue, varname);
-				return (p + 1);
+				ptr = (p + 1);
+				goto out;
 			}
 		} else {
 			debug("%s: not find in last one\n", __func__);
 		}
 
 		/* Match first one ? */
-		snprintf(buf, VARVALUE_BUF_SIZE, "%s ", varvalue);
+		snprintf(buf, len, "%s ", varvalue);
 		p = strstr(oldvalue, buf);
 		if (p) {
 			len = strstr(p, " ") - oldvalue;
 			if (len == strlen(varvalue)) {
 				debug("%s: '%s' is already exist in '%s'(first)\n",
 				      __func__, varvalue, varname);
-				return p;
+				ptr = p;
+				goto out;
 			}
 		} else  {
 			debug("%s: not find in first one\n", __func__);
 		}
 	}
+out:
+	free(buf);
 
-	return NULL;
+	return ptr;
 }
 
 int env_delete(const char *varname, const char *varvalue, int complete_match)

commit 75c04b2a24b3dde7b8d4c9087383873401f8df4a
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Sun Sep 26 17:54:27 2021 +0800

    clk: rockchip: rk3568: support emmc bclk and tclk
    
    Change-Id: I149021d6492d4a72662b116dc78c93be8f40c0fb
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3568.c b/drivers/clk/rockchip/clk_rk3568.c
index 38da6da81f..18b8e9d56c 100644
--- a/drivers/clk/rockchip/clk_rk3568.c
+++ b/drivers/clk/rockchip/clk_rk3568.c
@@ -1684,6 +1684,51 @@ static ulong rk3568_emmc_set_clk(struct rk3568_clk_priv *priv, ulong rate)
 	return rk3568_emmc_get_clk(priv);
 }
 
+static ulong rk3568_emmc_get_bclk(struct rk3568_clk_priv *priv)
+{
+	struct rk3568_cru *cru = priv->cru;
+	u32 sel, con;
+
+	con = readl(&cru->clksel_con[28]);
+	sel = (con & BCLK_EMMC_SEL_MASK) >> BCLK_EMMC_SEL_SHIFT;
+	switch (sel) {
+	case BCLK_EMMC_SEL_200M:
+		return 200 * MHz;
+	case BCLK_EMMC_SEL_150M:
+		return 150 * MHz;
+	case BCLK_EMMC_SEL_125M:
+		return 125 * MHz;
+	default:
+		return -ENOENT;
+	}
+}
+
+static ulong rk3568_emmc_set_bclk(struct rk3568_clk_priv *priv, ulong rate)
+{
+	struct rk3568_cru *cru = priv->cru;
+	int src_clk;
+
+	switch (rate) {
+	case 200 * MHz:
+		src_clk = BCLK_EMMC_SEL_200M;
+		break;
+	case 150 * MHz:
+		src_clk = BCLK_EMMC_SEL_150M;
+		break;
+	case 125 * MHz:
+		src_clk = BCLK_EMMC_SEL_125M;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	rk_clrsetreg(&cru->clksel_con[28],
+		     BCLK_EMMC_SEL_MASK,
+		     src_clk << BCLK_EMMC_SEL_SHIFT);
+
+	return rk3568_emmc_get_bclk(priv);
+}
+
 #ifndef CONFIG_SPL_BUILD
 static ulong rk3568_aclk_vop_get_clk(struct rk3568_clk_priv *priv)
 {
@@ -2544,6 +2589,12 @@ static ulong rk3568_clk_get_rate(struct clk *clk)
 	case CCLK_EMMC:
 		rate = rk3568_emmc_get_clk(priv);
 		break;
+	case BCLK_EMMC:
+		rate = rk3568_emmc_get_bclk(priv);
+		break;
+	case TCLK_EMMC:
+		rate = OSC_HZ;
+		break;
 #ifndef CONFIG_SPL_BUILD
 	case ACLK_VOP:
 		rate = rk3568_aclk_vop_get_clk(priv);
@@ -2724,6 +2775,12 @@ static ulong rk3568_clk_set_rate(struct clk *clk, ulong rate)
 	case CCLK_EMMC:
 		ret = rk3568_emmc_set_clk(priv, rate);
 		break;
+	case BCLK_EMMC:
+		ret = rk3568_emmc_set_bclk(priv, rate);
+		break;
+	case TCLK_EMMC:
+		ret = OSC_HZ;
+		break;
 #ifndef CONFIG_SPL_BUILD
 	case ACLK_VOP:
 		ret = rk3568_aclk_vop_set_clk(priv, rate);

commit 02155da268905376e8176127258fc577a94569fe
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Sun Sep 26 17:40:23 2021 +0800

    clk: rockchip: rk3568: modify the PPLL init freq to 200M
    
    Keep the frequency consistent with the kernel.
    
    Change-Id: I129f2b428d51e344338f92e1d492082afaa0b029
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3568.h b/arch/arm/include/asm/arch-rockchip/cru_rk3568.h
index f8bb52b314..6501bae104 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3568.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3568.h
@@ -14,7 +14,7 @@
 #define APLL_HZ		(816 * MHz)
 #define GPLL_HZ		(1188 * MHz)
 #define CPLL_HZ		(1000 * MHz)
-#define PPLL_HZ		(100 * MHz)
+#define PPLL_HZ		(200 * MHz)
 
 /* RK3568 pll id */
 enum rk3568_pll_id {

commit 3ba8b63f571d689bcc10367ab9ffb264bef029ad
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Fri Oct 8 14:32:39 2021 +0800

    rockchip: rk3308: Disable cpu idle for rk3308bs
    
    The system will freeze or panic when stress tests if enable cpu idle.
    
    Change-Id: I28e572afaec3a0c284d3d7df00e90921978652a5
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3308/rk3308.c b/arch/arm/mach-rockchip/rk3308/rk3308.c
index 1a4f45a551..765ca9b732 100644
--- a/arch/arm/mach-rockchip/rk3308/rk3308.c
+++ b/arch/arm/mach-rockchip/rk3308/rk3308.c
@@ -368,6 +368,29 @@ void board_debug_uart_init(void)
 #endif /* defined(CONFIG_DEBUG_UART_BASE) */
 }
 
+static int fdt_fixup_cpu_idle(const void *blob)
+{
+	int cpu_node, sub_node, len;
+	u32 *pp;
+
+	cpu_node = fdt_path_offset(blob, "/cpus");
+	if (cpu_node < 0) {
+		printf("Failed to get cpus node\n");
+		return -EINVAL;
+	}
+
+	fdt_for_each_subnode(sub_node, blob, cpu_node) {
+		pp = (u32 *)fdt_getprop(blob, sub_node, "cpu-idle-states",
+					&len);
+		if (!pp)
+			continue;
+		if (fdt_delprop((void *)blob, sub_node, "cpu-idle-states") < 0)
+			printf("Failed to del cpu-idle-states prop\n");
+	}
+
+	return 0;
+}
+
 static int fdt_fixup_cpu_opp_table(const void *blob)
 {
 	int opp_node, old_opp_node;
@@ -532,6 +555,7 @@ static int fdt_fixup_thermal_zones(const void *blob)
 int rk_board_fdt_fixup(const void *blob)
 {
 	if (soc_is_rk3308bs()) {
+		fdt_fixup_cpu_idle(blob);
 		fdt_fixup_cpu_opp_table(blob);
 		fdt_fixup_dmc_opp_table(blob);
 		fdt_fixup_thermal_zones(blob);

commit 84e9048560f0505b28642ac2849d0c263e81f027
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Sep 1 17:54:15 2021 +0800

    drivers: net: gmac_rockchip: Add SOC config option
    
    Add these config option to reduce memory usage.
    
    Change-Id: I30f4b4d5de9b1e468d9b5e590c1d6f4a61e147af
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/net/gmac_rockchip.c b/drivers/net/gmac_rockchip.c
index ff3a8e4114..dce6fad304 100644
--- a/drivers/net/gmac_rockchip.c
+++ b/drivers/net/gmac_rockchip.c
@@ -1365,29 +1365,60 @@ const struct rk_gmac_ops rv1126_gmac_ops = {
 
 static const struct udevice_id rockchip_gmac_ids[] = {
 #ifndef CONFIG_DWC_ETH_QOS
+#ifdef CONFIG_ROCKCHIP_PX30
 	{ .compatible = "rockchip,px30-gmac",
 	  .data = (ulong)&px30_gmac_ops },
+#endif
+
+#ifdef CONFIG_ROCKCHIP_RK1808
 	{ .compatible = "rockchip,rk1808-gmac",
 	  .data = (ulong)&rk1808_gmac_ops },
+#endif
+
+#ifdef CONFIG_ROCKCHIP_RK3228
 	{ .compatible = "rockchip,rk3228-gmac",
 	  .data = (ulong)&rk3228_gmac_ops },
+#endif
+
+#ifdef CONFIG_ROCKCHIP_RK3288
 	{ .compatible = "rockchip,rk3288-gmac",
 	  .data = (ulong)&rk3288_gmac_ops },
+#endif
+
+#ifdef CONFIG_ROCKCHIP_RK3308
 	{ .compatible = "rockchip,rk3308-mac",
 	  .data = (ulong)&rk3308_gmac_ops },
+#endif
+
+#ifdef CONFIG_ROCKCHIP_RK3328
 	{ .compatible = "rockchip,rk3328-gmac",
 	  .data = (ulong)&rk3328_gmac_ops },
+#endif
+
+#ifdef CONFIG_ROCKCHIP_RK3368
 	{ .compatible = "rockchip,rk3368-gmac",
 	  .data = (ulong)&rk3368_gmac_ops },
+#endif
+
+#ifdef CONFIG_ROCKCHIP_RK3399
 	{ .compatible = "rockchip,rk3399-gmac",
 	  .data = (ulong)&rk3399_gmac_ops },
+#endif
+
+#ifdef CONFIG_ROCKCHIP_RV1108
 	{ .compatible = "rockchip,rv1108-gmac",
 	  .data = (ulong)&rv1108_gmac_ops },
+#endif
 #else
+#ifdef CONFIG_ROCKCHIP_RK3568
 	{ .compatible = "rockchip,rk3568-gmac",
 	  .data = (ulong)&rk3568_gmac_ops },
+#endif
+
+#ifdef CONFIG_ROCKCHIP_RV1126
 	{ .compatible = "rockchip,rv1126-gmac",
 	  .data = (ulong)&rv1126_gmac_ops },
+#endif
 #endif
 	{ }
 };

commit 0fe08d1bd26fa1563039c5701b0e0302dde3fe8f
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Sep 1 17:53:34 2021 +0800

    drivers: net: Add net qso full config option
    
    Add this config option to reduce memory usage, if it was not necessary.
    
    Change-Id: I11b20318f48427ccba248c1e4c4cb66b85a9529a
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 5bb8129cfc..baeb09a1f0 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -101,6 +101,15 @@ config DWC_ETH_QOS
 	  supports the specific configuration used in NVIDIA's Tegra186 chip,
 	  but should be extensible to other combinations quite easily.
 
+config DWC_ETH_QOS_FULL
+	bool "Synopsys DWC Ethernet QOS full vendor support"
+	depends on DWC_ETH_QOS
+	default y
+	help
+	  Select this to supports the Synopsys Designware Ethernet QOS (Quality
+	  Of Service) IP block for all chips, default is Y, if select it N, only
+	  support rockchip's chips.
+
 config E1000
 	bool "Intel PRO/1000 Gigabit Ethernet support"
 	help
diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index 5687fb28d5..524093a57e 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -308,6 +308,7 @@ static void eqos_free_descs(void *descs)
 #endif
 }
 
+#ifdef CONFIG_QOS_FULL
 static void eqos_inval_desc_tegra186(void *desc)
 {
 #ifndef CONFIG_SYS_NONCACHED_MEMORY
@@ -318,6 +319,7 @@ static void eqos_inval_desc_tegra186(void *desc)
 	invalidate_dcache_range(start, end);
 #endif
 }
+#endif
 
 static void eqos_inval_desc_generic(void *desc)
 {
@@ -330,12 +332,14 @@ static void eqos_inval_desc_generic(void *desc)
 #endif
 }
 
+#ifdef CONFIG_QOS_FULL
 static void eqos_flush_desc_tegra186(void *desc)
 {
 #ifndef CONFIG_SYS_NONCACHED_MEMORY
 	flush_cache((unsigned long)desc, EQOS_DESCRIPTOR_SIZE);
 #endif
 }
+#endif
 
 static void eqos_flush_desc_generic(void *desc)
 {
@@ -348,6 +352,7 @@ static void eqos_flush_desc_generic(void *desc)
 #endif
 }
 
+#ifdef CONFIG_QOS_FULL
 static void eqos_inval_buffer_tegra186(void *buf, size_t size)
 {
 	unsigned long start = (unsigned long)buf & ~(ARCH_DMA_MINALIGN - 1);
@@ -355,6 +360,7 @@ static void eqos_inval_buffer_tegra186(void *buf, size_t size)
 
 	invalidate_dcache_range(start, end);
 }
+#endif
 
 static void eqos_inval_buffer_generic(void *buf, size_t size)
 {
@@ -365,10 +371,12 @@ static void eqos_inval_buffer_generic(void *buf, size_t size)
 	invalidate_dcache_range(start, end);
 }
 
+#ifdef CONFIG_QOS_FULL
 static void eqos_flush_buffer_tegra186(void *buf, size_t size)
 {
 	flush_cache((unsigned long)buf, size);
 }
+#endif
 
 static void eqos_flush_buffer_generic(void *buf, size_t size)
 {
@@ -471,6 +479,7 @@ static int eqos_mdio_write(struct mii_dev *bus, int mdio_addr, int mdio_devad,
 	return 0;
 }
 
+#ifdef CONFIG_QOS_FULL
 static int eqos_start_clks_tegra186(struct udevice *dev)
 {
 #ifdef CONFIG_CLK
@@ -675,6 +684,7 @@ static int eqos_start_resets_tegra186(struct udevice *dev)
 	debug("%s: OK\n", __func__);
 	return 0;
 }
+#endif
 
 static int eqos_start_resets_stm32(struct udevice *dev)
 {
@@ -715,6 +725,7 @@ static int eqos_start_resets_stm32(struct udevice *dev)
 	return 0;
 }
 
+#ifdef CONFIG_QOS_FULL
 static int eqos_start_resets_imx(struct udevice *dev)
 {
 	return 0;
@@ -729,6 +740,7 @@ static int eqos_stop_resets_tegra186(struct udevice *dev)
 
 	return 0;
 }
+#endif
 
 static int eqos_stop_resets_stm32(struct udevice *dev)
 {
@@ -747,6 +759,7 @@ static int eqos_stop_resets_stm32(struct udevice *dev)
 	return 0;
 }
 
+#ifdef CONFIG_QOS_FULL
 static int eqos_stop_resets_imx(struct udevice *dev)
 {
 	return 0;
@@ -814,6 +827,7 @@ static ulong eqos_get_tick_clk_rate_tegra186(struct udevice *dev)
 	return 0;
 #endif
 }
+#endif
 
 static ulong eqos_get_tick_clk_rate_stm32(struct udevice *dev)
 {
@@ -826,6 +840,7 @@ static ulong eqos_get_tick_clk_rate_stm32(struct udevice *dev)
 #endif
 }
 
+#ifdef CONFIG_QOS_FULL
 __weak u32 imx_get_eqos_csr_clk(void)
 {
 	return 100 * 1000000;
@@ -839,26 +854,31 @@ static ulong eqos_get_tick_clk_rate_imx(struct udevice *dev)
 {
 	return imx_get_eqos_csr_clk();
 }
+#endif
 
 static int eqos_calibrate_pads_stm32(struct udevice *dev)
 {
 	return 0;
 }
 
+#ifdef CONFIG_QOS_FULL
 static int eqos_calibrate_pads_imx(struct udevice *dev)
 {
 	return 0;
 }
+#endif
 
 static int eqos_disable_calibration_stm32(struct udevice *dev)
 {
 	return 0;
 }
 
+#ifdef CONFIG_QOS_FULL
 static int eqos_disable_calibration_imx(struct udevice *dev)
 {
 	return 0;
 }
+#endif
 
 static int eqos_set_full_duplex(struct udevice *dev)
 {
@@ -922,6 +942,7 @@ static int eqos_set_mii_speed_10(struct udevice *dev)
 	return 0;
 }
 
+#ifdef CONFIG_QOS_FULL
 static int eqos_set_tx_clk_speed_tegra186(struct udevice *dev)
 {
 #ifdef CONFIG_CLK
@@ -955,12 +976,14 @@ static int eqos_set_tx_clk_speed_tegra186(struct udevice *dev)
 
 	return 0;
 }
+#endif
 
 static int eqos_set_tx_clk_speed_stm32(struct udevice *dev)
 {
 	return 0;
 }
 
+#ifdef CONFIG_QOS_FULL
 static int eqos_set_tx_clk_speed_imx(struct udevice *dev)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
@@ -992,6 +1015,7 @@ static int eqos_set_tx_clk_speed_imx(struct udevice *dev)
 
 	return 0;
 }
+#endif
 
 static int eqos_adjust_link(struct udevice *dev)
 {
@@ -1100,6 +1124,7 @@ int eqos_write_hwaddr(struct udevice *dev)
 	return 0;
 }
 
+#ifdef CONFIG_QOS_FULL
 static int eqos_read_rom_hwaddr(struct udevice *dev)
 {
 	struct eth_pdata *pdata = dev_get_platdata(dev);
@@ -1109,6 +1134,7 @@ static int eqos_read_rom_hwaddr(struct udevice *dev)
 #endif
 	return !is_valid_ethaddr(pdata->enetaddr);
 }
+#endif
 
 int eqos_init(struct udevice *dev)
 {
@@ -1463,7 +1489,7 @@ void eqos_enable(struct udevice *dev)
 	eqos->started = true;
 }
 
-static int eqos_start(struct udevice *dev)
+static int __maybe_unused eqos_start(struct udevice *dev)
 {
 	int ret;
 
@@ -1716,6 +1742,7 @@ static int eqos_remove_resources_core(struct udevice *dev)
 	return 0;
 }
 
+#ifdef CONFIG_QOS_FULL
 static int eqos_probe_resources_tegra186(struct udevice *dev)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
@@ -1787,6 +1814,7 @@ err_free_reset_eqos:
 	debug("%s: returns %d\n", __func__, ret);
 	return ret;
 }
+#endif
 
 /* board-specific Ethernet Interface initializations. */
 __weak int board_interface_eth_init(struct udevice *dev,
@@ -1890,6 +1918,7 @@ static phy_interface_t eqos_get_interface_stm32(struct udevice *dev)
 	return interface;
 }
 
+#ifdef CONFIG_QOS_FULL
 static phy_interface_t eqos_get_interface_tegra186(struct udevice *dev)
 {
 	return PHY_INTERFACE_MODE_MII;
@@ -1947,6 +1976,7 @@ static int eqos_remove_resources_tegra186(struct udevice *dev)
 	debug("%s: OK\n", __func__);
 	return 0;
 }
+#endif
 
 static int eqos_remove_resources_stm32(struct udevice *dev)
 {
@@ -1971,10 +2001,12 @@ static int eqos_remove_resources_stm32(struct udevice *dev)
 	return 0;
 }
 
+#ifdef CONFIG_QOS_FULL
 static int eqos_remove_resources_imx(struct udevice *dev)
 {
 	return 0;
 }
+#endif
 
 int eqos_probe(struct udevice *dev)
 {
@@ -2048,7 +2080,7 @@ err_remove_resources_core:
 	return ret;
 }
 
-static int eqos_remove(struct udevice *dev)
+static int __maybe_unused eqos_remove(struct udevice *dev)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
 
@@ -2064,6 +2096,7 @@ static int eqos_remove(struct udevice *dev)
 	return 0;
 }
 
+#ifdef CONFIG_QOS_FULL
 static const struct eth_ops eqos_ops = {
 	.start = eqos_start,
 	.stop = eqos_stop,
@@ -2154,6 +2187,7 @@ struct eqos_config eqos_imx_config = {
 	.config_mac_mdio = EQOS_MAC_MDIO_ADDRESS_CR_250_300,
 	.ops = &eqos_imx_ops
 };
+#endif
 
 struct eqos_ops eqos_rockchip_ops = {
 	.eqos_inval_desc = eqos_inval_desc_generic,
@@ -2171,6 +2205,7 @@ struct eqos_ops eqos_rockchip_ops = {
 	.eqos_get_interface = eqos_get_interface_stm32
 };
 
+#ifdef CONFIG_QOS_FULL
 static const struct udevice_id eqos_ids[] = {
 	{
 		.compatible = "nvidia,tegra186-eqos",
@@ -2198,3 +2233,4 @@ U_BOOT_DRIVER(eth_eqos) = {
 	.priv_auto_alloc_size = sizeof(struct eqos_priv),
 	.platdata_auto_alloc_size = sizeof(struct eth_pdata),
 };
+#endif

commit e127f2d0cf9ab99853aca88ea5f0457dd7b557d7
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Sep 1 17:52:47 2021 +0800

    Kconfig: Imply PXE and MII
    
    Change-Id: I58c5e4cd12ab08f545bb5220dd7976f333503d05
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/Kconfig b/Kconfig
index 6a2370c573..651303531c 100644
--- a/Kconfig
+++ b/Kconfig
@@ -69,12 +69,12 @@ config DISTRO_DEFAULTS
 	select CMD_BOOTZ if ARM && !ARM64
 	select CMD_BOOTI if ARM64
 	select CMD_DHCP
-	select CMD_PXE
+	imply CMD_PXE
 	select CMD_EXT2
 	select CMD_EXT4
 	select CMD_FAT
 	select CMD_FS_GENERIC
-	select CMD_MII
+	imply CMD_MII
 	select CMD_PING
 	select CMD_PART
 	select HUSH_PARSER

commit 72a8959e3c050d95127c7d00bce0534b75847311
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Sun Sep 26 17:31:31 2021 +0800

    video/drm: display: Add 'panel-timing' support
    
    Change-Id: Id68b80728c6342473e7dde9b3222de2f5ae3f539
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 36e3fd256a..cdadbeb3f1 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -500,24 +500,28 @@ static int display_get_timing_from_dts(struct panel_state *panel_state,
 				       struct drm_display_mode *mode)
 {
 	struct rockchip_panel *panel = panel_state->panel;
-	int phandle;
-	ofnode timing, native_mode;
+	struct ofnode_phandle_args args;
+	ofnode dt, timing;
+	int ret;
 
-	timing = dev_read_subnode(panel->dev, "display-timings");
-	if (!ofnode_valid(timing))
-		return -ENODEV;
+	dt = dev_read_subnode(panel->dev, "display-timings");
+	if (ofnode_valid(dt)) {
+		ret = ofnode_parse_phandle_with_args(dt, "native-mode", NULL,
+						     0, 0, &args);
+		if (ret)
+			return ret;
 
-	native_mode = ofnode_find_subnode(timing, "timing");
-	if (!ofnode_valid(native_mode)) {
-		phandle = ofnode_read_u32_default(timing, "native-mode", -1);
-		native_mode = np_to_ofnode(of_find_node_by_phandle(phandle));
-		if (!ofnode_valid(native_mode)) {
-			printf("failed to get display timings from DT\n");
-			return -ENXIO;
-		}
+		timing = args.node;
+	} else {
+		timing = dev_read_subnode(panel->dev, "panel-timing");
+	}
+
+	if (!ofnode_valid(timing)) {
+		printf("failed to get display timings from DT\n");
+		return -ENXIO;
 	}
 
-	display_get_detail_timing(native_mode, mode);
+	display_get_detail_timing(timing, mode);
 
 	return 0;
 }

commit ef40696610fda2560ba77bc6445258002d973a5d
Author: Nico Cheng <nico.cheng@rock-chips.com>
Date:   Wed Sep 8 15:37:20 2021 +0800

    rockchip: rk3568 and rv1126 dfu support
    
    1.rk3568: Add emmc partition table support for DFU upgrade.
    2.rv1126: Add mtd partition table support for DFU upgrade under A/B system.
    
    Signed-off-by: Nico Cheng <nico.cheng@rock-chips.com>
    Change-Id: I70473c0ed67ae94c2e77a1bf5eae75f2a0e49c6e

diff --git a/include/configs/evb_rk3568.h b/include/configs/evb_rk3568.h
index 3432ba695e..d16fd53711 100644
--- a/include/configs/evb_rk3568.h
+++ b/include/configs/evb_rk3568.h
@@ -26,10 +26,10 @@
 #define DFU_ALT_BOOT_EMMC \
 	"gpt raw 0x0 0x20000;" \
 	"loader raw 0x20000 0xE0000;"\
-	"uboot part uboot;" \
-	"boot part boot;" \
-	"rootfs partubi rootfs;" \
-	"userdata partubi userdata\0"
+	"uboot part 0 1;" \
+	"boot part 0 2;" \
+	"rootfs part 0 3;" \
+	"userdata part 0 4\0"
 
 #define DFU_ALT_BOOT_MTD \
 	"gpt raw 0x0 0x20000;" \
@@ -40,6 +40,6 @@
 	"rootfs partubi rootfs;" \
 	"userdata partubi userdata\0"
 
-#endif
-#endif
+#endif /* CONFIG_SPL_BUILD */
+#endif /* __CONFIGS_RK3568_EVB_H */
 
diff --git a/include/configs/evb_rv1126.h b/include/configs/evb_rv1126.h
index 33b25c1750..93930535cb 100644
--- a/include/configs/evb_rv1126.h
+++ b/include/configs/evb_rv1126.h
@@ -40,18 +40,41 @@
 #define DFU_ALT_BOOT_EMMC \
 	"gpt raw 0x0 0x20000;" \
 	"loader raw 0x20000 0xE0000;"\
+	"uboot part 0 1;" \
+	"boot part 0 2;" \
+	"rootfs partubi 0 3;" \
+	"userdata partubi 0 4\0"
+
+#ifdef CONFIG_ANDROID_AB
+#define DFU_ALT_BOOT_MTD_A \
+	"gpt raw 0x0 0x20000;" \
+	"loader raw 0x20000 0xE0000;"\
+	"vnvm part vnvm;" \
 	"uboot part uboot;" \
-	"boot part boot;" \
-	"rootfs partubi rootfs;" \
+	"boot raw 0x700000 0x600000;" \
+	"misc part misc;" \
+	"system rawubi 0x1380000 0x3280000;" \
 	"userdata partubi userdata\0"
 
+#define DFU_ALT_BOOT_MTD_B \
+	"gpt raw 0x0 0x20000;" \
+	"loader raw 0x20000 0xE0000;"\
+	"vnvm part vnvm;" \
+	"uboot part uboot;" \
+	"boot raw 0xd00000 0x600000;" \
+	"misc part misc;" \
+	"system rawubi 0x4600000 0x3280000;" \
+	"userdata partubi userdata\0"
+#else
 #define DFU_ALT_BOOT_MTD \
 	"gpt raw 0x0 0x20000;" \
 	"loader raw 0x20000 0xE0000;"\
 	"vnvm part vnvm;" \
 	"uboot part uboot;" \
 	"boot part boot;" \
-	"rootfs partubi rootfs;" \
+	"misc part misc;" \
+	"system partubi system;" \
 	"userdata partubi userdata\0"
+#endif /* CONFIG_ANDROID_AB */
 #endif /* !CONFIG_SPL_BUILD */
-#endif
+#endif /* __EVB_RV1126_H */

commit b4094279e5abb801546a724bc36e38504066b832
Author: Nico Cheng <nico.cheng@rock-chips.com>
Date:   Wed Sep 8 14:28:15 2021 +0800

    rockchip: dfu: support update A/B firmwares
    
    If the device boot from slot A, pass the slot B partitions information to
    PC. Then PC excutes command to update slot B firmwares. Open
    CONFIG_ANDROID_AB to enable it.
    
    Signed-off-by: Nico Cheng <nico.cheng@rock-chips.com>
    Change-Id: Idaa65922e2f6bbf83a8cf6e4c753f4aeacafde85

diff --git a/arch/arm/mach-rockchip/dfu_alt_info.c b/arch/arm/mach-rockchip/dfu_alt_info.c
index 74fa4eb788..313edfe19f 100644
--- a/arch/arm/mach-rockchip/dfu_alt_info.c
+++ b/arch/arm/mach-rockchip/dfu_alt_info.c
@@ -7,12 +7,16 @@
 #include <common.h>
 #include <boot_rkimg.h>
 #include <memalign.h>
+#include <android_avb/rk_avb_ops_user.h>
 
 #define CONFIG_SET_DFU_ALT_BUF_LEN	(SZ_1K)
 static char *get_dfu_alt(char *interface, char *devstr)
 {
 	struct blk_desc *dev_desc;
 	char *alt_boot;
+#ifdef CONFIG_ANDROID_AB
+	char current_slot[3] = {0};
+#endif
 
 	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {
@@ -28,9 +32,23 @@ static char *get_dfu_alt(char *interface, char *devstr)
 #endif
 #ifdef CONFIG_MTD_BLK
 	case IF_TYPE_MTD:
+#ifdef CONFIG_ANDROID_AB
+		rk_avb_get_current_slot(current_slot);
+
+		if (!strcmp(current_slot, "_a")) {
+			alt_boot = DFU_ALT_BOOT_MTD_B;
+			printf("\ncurrent boot from slot A!\n");
+		} else if (!strcmp(current_slot, "_b")) {
+			alt_boot = DFU_ALT_BOOT_MTD_A;
+			printf("\ncurrent boot from slot B!\n");
+		} else {
+			return NULL;
+		}
+#else
 		alt_boot = DFU_ALT_BOOT_MTD;
-		break;
 #endif
+		break;
+#endif /* CONFIG_MTD_BLK */
 	default:
 		printf("[dfu ERROR]:Boot device type is invalid!\n");
 		return NULL;

commit add4295e7f3dbdf27524c9ad6dc5d7414788d603
Author: Nico Cheng <nico.cheng@rock-chips.com>
Date:   Wed Sep 8 15:09:51 2021 +0800

    common: dfu: switch the boot slot priority after upgrade firmwares
    
    If the device current boot from slot A,then increase the boot priority of
    slot B.
    
    Signed-off-by: Nico Cheng <nico.cheng@rock-chips.com>
    Change-Id: Ie481f815d8a3b72b91fcf1acaf9524c19b8a71e8

diff --git a/common/dfu.c b/common/dfu.c
index 578a841bd3..30f4dcf827 100644
--- a/common/dfu.c
+++ b/common/dfu.c
@@ -18,11 +18,16 @@
 #include <g_dnl.h>
 #include <usb.h>
 #include <net.h>
+#include <android_avb/rk_avb_ops_user.h>
 
 int run_usb_dnl_gadget(int usbctrl_index, char *usb_dnl_gadget)
 {
 	bool dfu_reset = false;
 	int ret, i = 0;
+#ifdef CONFIG_ANDROID_AB
+	char select_slot[3] = {0};
+	unsigned int slot_number[2] = {0, 1};
+#endif
 
 	ret = usb_gadget_initialize(usbctrl_index);
 	if (ret) {
@@ -45,6 +50,19 @@ int run_usb_dnl_gadget(int usbctrl_index, char *usb_dnl_gadget)
 			 */
 			if (dfu_usb_get_reset()) {
 				dfu_reset = true;
+#ifdef CONFIG_ANDROID_AB
+				if (rk_avb_get_current_slot(select_slot))
+					printf("Obtain current slot failed!\n");
+				/*
+				 * After the firmware is successfully upgrade,
+				 * the device changes the slot priority during
+				 * reboot based on the current slot
+				 */
+				if (strcmp(select_slot, "_a") == 0)
+					rk_avb_set_slot_active(&slot_number[1]);
+				else
+					rk_avb_set_slot_active(&slot_number[0]);
+#endif
 				goto exit;
 			}
 

commit 6c7129c6008c763daa5205e8462d6febdf9c92ac
Author: Zorro Liu <lyx@rock-chips.com>
Date:   Fri Sep 24 09:17:37 2021 +0800

    configs: rk3566-eink.config: enable gpio leds
    
    Signed-off-by: Zorro Liu <lyx@rock-chips.com>
    Change-Id: I1e28b5ac04180de91b649d80ac785d13163054ef

diff --git a/configs/rk3566-eink.config b/configs/rk3566-eink.config
index 1d93005ef9..517c396c2b 100644
--- a/configs/rk3566-eink.config
+++ b/configs/rk3566-eink.config
@@ -1,4 +1,7 @@
 CONFIG_BASE_DEFCONFIG="rk3568_defconfig"
+# CONFIG_LED_BLINK is not set
+CONFIG_LED_GPIO=y
+CONFIG_LED=y
 CONFIG_LOADER_INI="RK3566MINIALL_ULTRA.ini"
 CONFIG_ROCKCHIP_EBC_TCON=y
 CONFIG_ROCKCHIP_EINK_DISPLAY=y

commit 89eef20dcd7479f45a72243b12933ab67e3c55f9
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Sep 17 20:18:17 2021 +0800

    spi: rockchip_sfc: Support delay line tuning
    
    Change-Id: I38b26cf15e0c82c713245defaf2478a9708e3f92
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/spi/rockchip_sfc.c b/drivers/spi/rockchip_sfc.c
index 005db0e2e0..9bffec9005 100644
--- a/drivers/spi/rockchip_sfc.c
+++ b/drivers/spi/rockchip_sfc.c
@@ -167,6 +167,10 @@
  * 150MHz. No minimum or average value is suggested.
  */
 #define SFC_MAX_SPEED		(150 * 1000 * 1000)
+#define SFC_DLL_THRESHOLD_RATE	(50 * 1000 * 1000)
+
+#define SFC_DLL_TRANING_STEP		10		/* Training step */
+#define SFC_DLL_TRANING_VALID_WINDOW	80		/* Training Valid DLL winbow */
 
 struct rockchip_sfc {
 	struct udevice *dev;
@@ -181,6 +185,8 @@ struct rockchip_sfc {
 
 	u32 last_async_size;
 	u32 async;
+	u32 dll_cells;
+	u32 max_dll_cells;
 };
 
 static int rockchip_sfc_reset(struct rockchip_sfc *sfc)
@@ -215,6 +221,32 @@ static u32 rockchip_sfc_get_max_iosize(struct rockchip_sfc *sfc)
 	return SFC_MAX_IOSIZE_VER3;
 }
 
+static u32 rockchip_sfc_get_max_dll_cells(struct rockchip_sfc *sfc)
+{
+	switch (rockchip_sfc_get_version(sfc)) {
+	case SFC_VER_5:
+		return SFC_DLL_CTRL0_DLL_MAX_VER5;
+	case SFC_VER_4:
+		return SFC_DLL_CTRL0_DLL_MAX_VER4;
+	default:
+		return 0;
+	}
+}
+
+static __maybe_unused void rockchip_sfc_set_delay_lines(struct rockchip_sfc *sfc, u16 cells)
+{
+	u16 cell_max = (u16)rockchip_sfc_get_max_dll_cells(sfc);
+	u32 val = 0;
+
+	if (cells > cell_max)
+		cells = cell_max;
+
+	if (cells)
+		val = SFC_DLL_CTRL0_SCLK_SMP_DLL | cells;
+
+	writel(val, sfc->regbase + SFC_DLL_CTRL0);
+}
+
 static int rockchip_sfc_init(struct rockchip_sfc *sfc)
 {
 	writel(0, sfc->regbase + SFC_CTRL);
@@ -364,7 +396,7 @@ static int rockchip_sfc_xfer_setup(struct rockchip_sfc *sfc,
 				   const struct spi_mem_op *op,
 				   u32 len)
 {
-	struct dm_spi_slave_platdata *plat = dev_get_parent_platdata(mem->dev);
+	struct dm_spi_slave_platdata *plat = dev_get_platdata(sfc->dev);
 	u32 ctrl = 0, cmd = 0;
 
 	/* set CMD */
@@ -620,6 +652,103 @@ static int rockchip_sfc_adjust_op_size(struct spi_slave *mem, struct spi_mem_op
 	return 0;
 }
 
+#if CONFIG_IS_ENABLED(CLK)
+static int rockchip_sfc_exec_op_bypass(struct rockchip_sfc *sfc,
+				       struct spi_slave *mem,
+				       const struct spi_mem_op *op)
+{
+	u32 len = min_t(u32, op->data.nbytes, sfc->max_iosize);
+	u32 ret;
+
+	rockchip_sfc_adjust_op_work((struct spi_mem_op *)op);
+	rockchip_sfc_xfer_setup(sfc, mem, op, len);
+	ret = rockchip_sfc_xfer_data_poll(sfc, op, len);
+	if (ret != len) {
+		dev_err(sfc->dev, "xfer data failed ret %d\n", ret);
+
+		return -EIO;
+	}
+
+	return rockchip_sfc_xfer_done(sfc, 100000);
+}
+
+static void rockchip_sfc_delay_lines_tuning(struct rockchip_sfc *sfc, struct spi_slave *mem)
+{
+	struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(0x9F, 1),
+						SPI_MEM_OP_NO_ADDR,
+						SPI_MEM_OP_NO_DUMMY,
+						SPI_MEM_OP_DATA_IN(3, NULL, 1));
+	u8 id[3], id_temp[3];
+	u16 cell_max = (u16)rockchip_sfc_get_max_dll_cells(sfc);
+	u16 right, left = 0;
+	u16 step = SFC_DLL_TRANING_STEP;
+	bool dll_valid = false;
+
+	clk_set_rate(&sfc->clk, SFC_DLL_THRESHOLD_RATE);
+	op.data.buf.in = &id;
+	rockchip_sfc_exec_op_bypass(sfc, mem, &op);
+	if ((0xFF == id[0] && 0xFF == id[1]) ||
+	    (0x00 == id[0] && 0x00 == id[1])) {
+		dev_dbg(sfc->dev, "no dev, dll by pass\n");
+		clk_set_rate(&sfc->clk, sfc->speed);
+
+		return;
+	}
+
+	clk_set_rate(&sfc->clk, sfc->speed);
+	op.data.buf.in = &id_temp;
+	for (right = 0; right <= cell_max; right += step) {
+		int ret;
+
+		rockchip_sfc_set_delay_lines(sfc, right);
+		rockchip_sfc_exec_op_bypass(sfc, mem, &op);
+		dev_dbg(sfc->dev, "dll read flash id:%x %x %x\n",
+			id_temp[0], id_temp[1], id_temp[2]);
+
+		ret = memcmp(&id, &id_temp, 3);
+		if (dll_valid && ret) {
+			right -= step;
+
+			break;
+		}
+		if (!dll_valid && !ret)
+			left = right;
+
+		if (!ret)
+			dll_valid = true;
+
+		/* Add cell_max to loop */
+		if (right == cell_max)
+			break;
+		if (right + step > cell_max)
+			right = cell_max - step;
+	}
+
+	if (dll_valid && (right - left) >= SFC_DLL_TRANING_VALID_WINDOW) {
+		if (left == 0 && right < cell_max)
+			sfc->dll_cells = left + (right - left) * 2 / 5;
+		else
+			sfc->dll_cells = left + (right - left) / 2;
+	} else {
+		sfc->dll_cells = 0;
+	}
+
+	if (sfc->dll_cells) {
+		dev_dbg(sfc->dev, "%d %d %d dll training success in %dMHz max_cells=%u sfc_ver=%d\n",
+			left, right, sfc->dll_cells, sfc->speed,
+			rockchip_sfc_get_max_dll_cells(sfc), rockchip_sfc_get_version(sfc));
+		rockchip_sfc_set_delay_lines(sfc, (u16)sfc->dll_cells);
+	} else {
+		dev_err(sfc->dev, "%d %d dll training failed in %dMHz, reduce the speed\n",
+			left, right, sfc->speed);
+		rockchip_sfc_set_delay_lines(sfc, 0);
+		clk_set_rate(&sfc->clk, SFC_DLL_THRESHOLD_RATE);
+		sfc->speed = clk_get_rate(&sfc->clk);
+	}
+}
+
+#endif
+
 static int rockchip_sfc_set_speed(struct udevice *bus, uint speed)
 {
 	struct rockchip_sfc *sfc = dev_get_platdata(bus);
@@ -639,6 +768,15 @@ static int rockchip_sfc_set_speed(struct udevice *bus, uint speed)
 		return ret;
 	}
 	sfc->speed = speed;
+	if (rockchip_sfc_get_version(sfc) >= SFC_VER_4) {
+		if (clk_get_rate(&sfc->clk) > SFC_DLL_THRESHOLD_RATE)
+			rockchip_sfc_delay_lines_tuning(sfc, NULL);
+		else
+			rockchip_sfc_set_delay_lines(sfc, 0);
+	}
+
+	dev_dbg(sfc->dev, "set_freq=%dHz real_freq=%ldHz\n",
+		sfc->speed, clk_get_rate(&sfc->clk));
 #else
 	dev_dbg(sfc->dev, "sfc failed, CLK not support\n");
 #endif

commit 20202e05c616cf168db0963cfa0b10f7da6fa397
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Sep 17 19:54:20 2021 +0800

    spi: rockchip_sfc: Supoprt spi async transfer
    
    Change-Id: Ib7e09ea564db0d673effab506a90c7cb9fbb4a33
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/spi/rockchip_sfc.c b/drivers/spi/rockchip_sfc.c
index 9bfec5063d..005db0e2e0 100644
--- a/drivers/spi/rockchip_sfc.c
+++ b/drivers/spi/rockchip_sfc.c
@@ -178,6 +178,9 @@ struct rockchip_sfc {
 	bool use_dma;
 	u32 max_iosize;
 	u16 version;
+
+	u32 last_async_size;
+	u32 async;
 };
 
 static int rockchip_sfc_reset(struct rockchip_sfc *sfc)
@@ -536,6 +539,27 @@ static int rockchip_sfc_xfer_data_dma(struct rockchip_sfc *sfc,
 	return ret;
 }
 
+static int rockchip_sfc_xfer_data_dma_async(struct rockchip_sfc *sfc,
+					    const struct spi_mem_op *op, u32 len)
+{
+	void *dma_buf;
+
+	if (op->data.dir == SPI_MEM_DATA_OUT)
+		dma_buf = (void *)op->data.buf.out;
+	else
+		dma_buf = (void *)op->data.buf.in;
+
+	dev_dbg(sfc->dev, "xfer_dma_async len=%x %p\n", len, dma_buf);
+
+	flush_dcache_range((unsigned long)dma_buf,
+			   (unsigned long)dma_buf + len);
+
+	rockchip_sfc_fifo_transfer_dma(sfc, (dma_addr_t)dma_buf, len);
+	sfc->last_async_size = len;
+
+	return 0;
+}
+
 static int rockchip_sfc_xfer_done(struct rockchip_sfc *sfc, u32 timeout_us)
 {
 	int ret = 0;
@@ -561,13 +585,21 @@ static int rockchip_sfc_exec_op(struct spi_slave *mem,
 	u32 len = min_t(u32, op->data.nbytes, sfc->max_iosize);
 	int ret;
 
+	/* Wait for last async transfer finished */
+	if (sfc->last_async_size) {
+		rockchip_sfc_wait_for_dma_finished(sfc, sfc->last_async_size);
+		sfc->last_async_size = 0;
+	}
 	rockchip_sfc_adjust_op_work((struct spi_mem_op *)op);
 	rockchip_sfc_xfer_setup(sfc, mem, op, len);
 	if (len) {
-		if (likely(sfc->use_dma) && len >= SFC_DMA_TRANS_THRETHOLD)
+		if (likely(sfc->use_dma) && len >= SFC_DMA_TRANS_THRETHOLD) {
+			if (mem->mode & SPI_DMA_PREPARE)
+				return rockchip_sfc_xfer_data_dma_async(sfc, op, len);
 			ret = rockchip_sfc_xfer_data_dma(sfc, op, len);
-		else
+		} else {
 			ret = rockchip_sfc_xfer_data_poll(sfc, op, len);
+		}
 
 		if (ret != len) {
 			dev_err(sfc->dev, "xfer data failed ret %d dir %d\n", ret, op->data.dir);

commit 4e4d6eb63e8d50b40dbeadf83c8cb89ce75b0481
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Thu Aug 19 09:46:19 2021 +0800

    UPSTREAM: spi: rockchip_sfc: Using read_poll
    
    Using read_poll logic.
    
    Tested-by: Chris Morgan <macromorgan@hotmail.com>
    Change-Id: I5e24cd0930f299117d7f34af7275f5fbe5f48a95
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from 20210819094557.v2.2.Ie019ef3e204a0095d9580fa48b7cbf9b9e05fc33@changeid)

diff --git a/drivers/spi/rockchip_sfc.c b/drivers/spi/rockchip_sfc.c
index ce4457e87c..9bfec5063d 100644
--- a/drivers/spi/rockchip_sfc.c
+++ b/drivers/spi/rockchip_sfc.c
@@ -285,33 +285,38 @@ err_init:
 	return ret;
 }
 
-static inline int rockchip_sfc_get_fifo_level(struct rockchip_sfc *sfc, int wr)
+static int rockchip_sfc_wait_txfifo_ready(struct rockchip_sfc *sfc, u32 timeout_us)
 {
-	u32 fsr = readl(sfc->regbase + SFC_FSR);
-	int level;
+	int ret = 0;
+	u32 status;
 
-	if (wr)
-		level = (fsr & SFC_FSR_TXLV_MASK) >> SFC_FSR_TXLV_SHIFT;
-	else
-		level = (fsr & SFC_FSR_RXLV_MASK) >> SFC_FSR_RXLV_SHIFT;
+	ret = readl_poll_timeout(sfc->regbase + SFC_FSR, status,
+				 status & SFC_FSR_TXLV_MASK,
+				 timeout_us);
+	if (ret) {
+		dev_dbg(sfc->dev, "sfc wait tx fifo timeout\n");
+
+		return -ETIMEDOUT;
+	}
 
-	return level;
+	return (status & SFC_FSR_TXLV_MASK) >> SFC_FSR_TXLV_SHIFT;
 }
 
-static int rockchip_sfc_wait_fifo_ready(struct rockchip_sfc *sfc, int wr, u32 timeout)
+static int rockchip_sfc_wait_rxfifo_ready(struct rockchip_sfc *sfc, u32 timeout_us)
 {
-	unsigned long tbase = get_timer(0);
-	int level;
+	int ret = 0;
+	u32 status;
 
-	while (!(level = rockchip_sfc_get_fifo_level(sfc, wr))) {
-		if (get_timer(tbase) > timeout) {
-			debug("%s fifo timeout\n", wr ? "write" : "read");
-			return -ETIMEDOUT;
-		}
-		udelay(1);
+	ret = readl_poll_timeout(sfc->regbase + SFC_FSR, status,
+				 status & SFC_FSR_RXLV_MASK,
+				 timeout_us);
+	if (ret) {
+		dev_dbg(sfc->dev, "sfc wait rx fifo timeout\n");
+
+		return -ETIMEDOUT;
 	}
 
-	return level;
+	return (status & SFC_FSR_RXLV_MASK) >> SFC_FSR_RXLV_SHIFT;
 }
 
 static void rockchip_sfc_adjust_op_work(struct spi_mem_op *op)
@@ -429,7 +434,7 @@ static int rockchip_sfc_write_fifo(struct rockchip_sfc *sfc, const u8 *buf, int
 
 	dwords = len >> 2;
 	while (dwords) {
-		tx_level = rockchip_sfc_wait_fifo_ready(sfc, SFC_CMD_DIR_WR, 1000);
+		tx_level = rockchip_sfc_wait_txfifo_ready(sfc, 1000);
 		if (tx_level < 0)
 			return tx_level;
 		write_words = min_t(u32, tx_level, dwords);
@@ -440,7 +445,7 @@ static int rockchip_sfc_write_fifo(struct rockchip_sfc *sfc, const u8 *buf, int
 
 	/* write the rest non word aligned bytes */
 	if (bytes) {
-		tx_level = rockchip_sfc_wait_fifo_ready(sfc, SFC_CMD_DIR_WR, 1000);
+		tx_level = rockchip_sfc_wait_txfifo_ready(sfc, 1000);
 		if (tx_level < 0)
 			return tx_level;
 		memcpy(&tmp, buf, bytes);
@@ -461,7 +466,7 @@ static int rockchip_sfc_read_fifo(struct rockchip_sfc *sfc, u8 *buf, int len)
 	/* word aligned access only */
 	dwords = len >> 2;
 	while (dwords) {
-		rx_level = rockchip_sfc_wait_fifo_ready(sfc, SFC_CMD_DIR_RD, 1000);
+		rx_level = rockchip_sfc_wait_rxfifo_ready(sfc, 1000);
 		if (rx_level < 0)
 			return rx_level;
 		read_words = min_t(u32, rx_level, dwords);
@@ -472,7 +477,7 @@ static int rockchip_sfc_read_fifo(struct rockchip_sfc *sfc, u8 *buf, int len)
 
 	/* read the rest non word aligned bytes */
 	if (bytes) {
-		rx_level = rockchip_sfc_wait_fifo_ready(sfc, SFC_CMD_DIR_RD, 1000);
+		rx_level = rockchip_sfc_wait_rxfifo_ready(sfc, 1000);
 		if (rx_level < 0)
 			return rx_level;
 		tmp = readl(sfc->regbase + SFC_DATA);
@@ -533,19 +538,17 @@ static int rockchip_sfc_xfer_data_dma(struct rockchip_sfc *sfc,
 
 static int rockchip_sfc_xfer_done(struct rockchip_sfc *sfc, u32 timeout_us)
 {
-	unsigned long tbase = get_timer(0);
 	int ret = 0;
-	u32 timeout = timeout_us;
-
-	while (readl(sfc->regbase + SFC_SR) & SFC_SR_IS_BUSY) {
-		if (get_timer(tbase) > timeout) {
-			printf("wait sfc idle timeout\n");
-			rockchip_sfc_reset(sfc);
+	u32 status;
 
-			return -ETIMEDOUT;
-		}
+	ret = readl_poll_timeout(sfc->regbase + SFC_SR, status,
+				 !(status & SFC_SR_IS_BUSY),
+				 timeout_us);
+	if (ret) {
+		dev_err(sfc->dev, "wait sfc idle timeout\n");
+		rockchip_sfc_reset(sfc);
 
-		udelay(1);
+		ret = -EIO;
 	}
 
 	return ret;

commit 452649e0d3e9d942bd57a3d090a12ce19cc79d59
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Thu Aug 19 09:46:18 2021 +0800

    UPSTREAM: spi: rockchip_sfc: Implement set_speed logic
    
    Set clock related processing into set_speed logic. And Optimize
    printing format.
    
    Tested-by: Chris Morgan <macromorgan@hotmail.com>
    Change-Id: Iaf6f3d58cc44deb4a22d74984531b32c53386201
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from 20210819094557.v2.1.Id0647655ab4060f95c9a49fe834465bbe39b8d31@changeid)
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/spi/rockchip_sfc.c b/drivers/spi/rockchip_sfc.c
index 231623f1d7..ce4457e87c 100644
--- a/drivers/spi/rockchip_sfc.c
+++ b/drivers/spi/rockchip_sfc.c
@@ -116,6 +116,7 @@
 
 /* Master trigger */
 #define SFC_DMA_TRIGGER			0x80
+#define SFC_DMA_TRIGGER_START		1
 
 /* Src or Dst addr for master */
 #define SFC_DMA_ADDR			0x84
@@ -163,14 +164,12 @@
 #define SFC_DMA_TRANS_THRETHOLD		(0x40)
 
 /* Maximum clock values from datasheet suggest keeping clock value under
- * 150MHz. No minimum or average value is suggested, but the U-boot BSP driver
- * has a minimum of 10MHz and a default of 80MHz which seems reasonable.
+ * 150MHz. No minimum or average value is suggested.
  */
-#define SFC_MIN_SPEED_HZ		(10 * 1000 * 1000)
-#define SFC_DEFAULT_SPEED_HZ		(80 * 1000 * 1000)
-#define SFC_MAX_SPEED_HZ		(150 * 1000 * 1000)
+#define SFC_MAX_SPEED		(150 * 1000 * 1000)
 
 struct rockchip_sfc {
+	struct udevice *dev;
 	void __iomem *regbase;
 	struct clk hclk;
 	struct clk clk;
@@ -197,8 +196,6 @@ static int rockchip_sfc_reset(struct rockchip_sfc *sfc)
 	/* Still need to clear the masked interrupt from RISR */
 	writel(0xFFFFFFFF, sfc->regbase + SFC_ICLR);
 
-	debug("reset\n");
-
 	return err;
 }
 
@@ -261,15 +258,11 @@ static int rockchip_sfc_probe(struct udevice *bus)
 #if CONFIG_IS_ENABLED(CLK)
 	ret = clk_enable(&sfc->hclk);
 	if (ret)
-		debug("Enable ahb clock fail %s: %d\n", bus->name, ret);
+		dev_dbg(sfc->dev, "sfc Enable ahb clock fail %s: %d\n", bus->name, ret);
 
 	ret = clk_enable(&sfc->clk);
 	if (ret)
-		debug("Enable clock fail for %s: %d\n", bus->name, ret);
-
-	ret = clk_set_rate(&sfc->clk, SFC_DEFAULT_SPEED_HZ);
-	if (ret)
-		debug("Could not set sfc clock for %s: %d\n", bus->name, ret);
+		dev_dbg(sfc->dev, "sfc Enable clock fail for %s: %d\n", bus->name, ret);
 #endif
 
 	ret = rockchip_sfc_init(sfc);
@@ -278,7 +271,8 @@ static int rockchip_sfc_probe(struct udevice *bus)
 
 	sfc->max_iosize = rockchip_sfc_get_max_iosize(sfc);
 	sfc->version = rockchip_sfc_get_version(sfc);
-	sfc->speed = SFC_DEFAULT_SPEED_HZ;
+	sfc->max_freq = SFC_MAX_SPEED;
+	sfc->dev = bus;
 
 	return 0;
 
@@ -411,11 +405,11 @@ static int rockchip_sfc_xfer_setup(struct rockchip_sfc *sfc,
 	ctrl |= SFC_CTRL_PHASE_SEL_NEGETIVE;
 	cmd |= plat->cs << SFC_CMD_CS_SHIFT;
 
-	debug("addr.nbytes=%x(x%d) dummy.nbytes=%x(x%d)\n",
-	      op->addr.nbytes, op->addr.buswidth,
-	      op->dummy.nbytes, op->dummy.buswidth);
-	debug("ctrl=%x cmd=%x addr=%llx len=%x\n",
-	      ctrl, cmd, op->addr.val, len);
+	dev_dbg(sfc->dev, "sfc addr.nbytes=%x(x%d) dummy.nbytes=%x(x%d)\n",
+		op->addr.nbytes, op->addr.buswidth,
+		op->dummy.nbytes, op->dummy.buswidth);
+	dev_dbg(sfc->dev, "sfc ctrl=%x cmd=%x addr=%llx len=%x\n",
+		ctrl, cmd, op->addr.val, len);
 
 	writel(ctrl, sfc->regbase + SFC_CTRL);
 	writel(cmd, sfc->regbase + SFC_CMD);
@@ -492,7 +486,7 @@ static int rockchip_sfc_fifo_transfer_dma(struct rockchip_sfc *sfc, dma_addr_t d
 {
 	writel(0xFFFFFFFF, sfc->regbase + SFC_ICLR);
 	writel((u32)dma_buf, sfc->regbase + SFC_DMA_ADDR);
-	writel(0x1, sfc->regbase + SFC_DMA_TRIGGER);
+	writel(SFC_DMA_TRIGGER_START, sfc->regbase + SFC_DMA_TRIGGER);
 
 	return len;
 }
@@ -500,7 +494,7 @@ static int rockchip_sfc_fifo_transfer_dma(struct rockchip_sfc *sfc, dma_addr_t d
 static int rockchip_sfc_xfer_data_poll(struct rockchip_sfc *sfc,
 				       const struct spi_mem_op *op, u32 len)
 {
-	debug("xfer_poll len=%x\n", len);
+	dev_dbg(sfc->dev, "sfc xfer_poll len=%x\n", len);
 
 	if (op->data.dir == SPI_MEM_DATA_OUT)
 		return rockchip_sfc_write_fifo(sfc, op->data.buf.out, len);
@@ -516,7 +510,7 @@ static int rockchip_sfc_xfer_data_dma(struct rockchip_sfc *sfc,
 	void *dma_buf;
 	int ret;
 
-	debug("xfer_dma len=%x\n", len);
+	dev_dbg(sfc->dev, "sfc xfer_dma len=%x\n", len);
 
 	if (op->data.dir == SPI_MEM_DATA_OUT) {
 		dma_buf = (void *)op->data.buf.out;
@@ -564,33 +558,16 @@ static int rockchip_sfc_exec_op(struct spi_slave *mem,
 	u32 len = min_t(u32, op->data.nbytes, sfc->max_iosize);
 	int ret;
 
-#if CONFIG_IS_ENABLED(CLK)
-	if (unlikely(mem->max_hz != sfc->speed)) {
-		ret = clk_set_rate(&sfc->clk, clamp(mem->max_hz, (uint)SFC_MIN_SPEED_HZ,
-						    (uint)SFC_MAX_SPEED_HZ));
-		if (ret < 0) {
-			printf("set_freq=%dHz fail, check if it's the cru support level\n",
-			       mem->max_hz);
-			return ret;
-		}
-
-		sfc->max_freq = mem->max_hz;
-		sfc->speed = mem->max_hz;
-		debug("set_freq=%dHz real_freq=%dHz\n", sfc->max_freq, sfc->speed);
-	}
-#endif
-
 	rockchip_sfc_adjust_op_work((struct spi_mem_op *)op);
-
 	rockchip_sfc_xfer_setup(sfc, mem, op, len);
 	if (len) {
-		if (likely(sfc->use_dma) && !(len & 0x3) && len >= SFC_DMA_TRANS_THRETHOLD)
+		if (likely(sfc->use_dma) && len >= SFC_DMA_TRANS_THRETHOLD)
 			ret = rockchip_sfc_xfer_data_dma(sfc, op, len);
 		else
 			ret = rockchip_sfc_xfer_data_poll(sfc, op, len);
 
 		if (ret != len) {
-			printf("xfer data failed ret %d dir %d\n", ret, op->data.dir);
+			dev_err(sfc->dev, "xfer data failed ret %d dir %d\n", ret, op->data.dir);
 
 			return -EIO;
 		}
@@ -604,13 +581,32 @@ static int rockchip_sfc_adjust_op_size(struct spi_slave *mem, struct spi_mem_op
 	struct rockchip_sfc *sfc = dev_get_platdata(mem->dev->parent);
 
 	op->data.nbytes = min(op->data.nbytes, sfc->max_iosize);
+
 	return 0;
 }
 
 static int rockchip_sfc_set_speed(struct udevice *bus, uint speed)
 {
-	/* We set up speed later for each transmission.
-	 */
+	struct rockchip_sfc *sfc = dev_get_platdata(bus);
+
+	if (speed > sfc->max_freq)
+		speed = sfc->max_freq;
+
+	if (speed == sfc->speed)
+		return 0;
+
+#if CONFIG_IS_ENABLED(CLK)
+	int ret = clk_set_rate(&sfc->clk, speed);
+
+	if (ret < 0) {
+		dev_err(sfc->dev, "set_freq=%dHz fail, check if it's the cru support level\n",
+			speed);
+		return ret;
+	}
+	sfc->speed = speed;
+#else
+	dev_dbg(sfc->dev, "sfc failed, CLK not support\n");
+#endif
 	return 0;
 }
 

commit 09258a9d50afec8cf51f08b732cbbfcd2b9d54d6
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed Sep 15 19:34:35 2021 +0800

    UPSTREAM: spi: rockchip_sfc: add support for Rockchip SFC
    
    This patch adds support for the Rockchip serial flash controller
    found on the PX30 SoC. It should work for versions 3-5 of the SFC
    IP, however I am only able to test it on v3.
    
    This is adapted from the WIP SPI-MEM driver for the SFC on mainline
    Linux. Note that the main difference between this and earlier versions
    of the driver is that this one does not support DMA. In testing
    the performance difference (performing a dual mode read on a 128Mb
    chip) is negligible. DMA, if used, must also be disabled in SPL
    mode when using A-TF anyway.
    
    Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 3fb08a21387b9f4f24cfd5b45f9d7f344d40fba4)
    Change-Id: I75e1fcae03c060c2b8ccf8c49e026dc882469166

diff --git a/drivers/spi/rockchip_sfc.c b/drivers/spi/rockchip_sfc.c
index 4aafd162fc..231623f1d7 100644
--- a/drivers/spi/rockchip_sfc.c
+++ b/drivers/spi/rockchip_sfc.c
@@ -1,825 +1,646 @@
+// SPDX-License-Identifier: GPL-2.0-only
 /*
- * SFC driver for rockchip
+ * Rockchip Serial Flash Controller Driver
  *
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
- * Yifeng.zhao, Software Engineering, <zhao0116@gmail.com>.
- *
- * SPDX-License-Identifier:     GPL-2.0+
+ * Copyright (c) 2017-2021, Rockchip Inc.
+ * Author: Shawn Lin <shawn.lin@rock-chips.com>
+ *	   Chris Morgan <macromorgan@hotmail.com>
+ *	   Jon Lin <Jon.lin@rock-chips.com>
  */
 
-#include <common.h>
+#include <asm/io.h>
 #include <bouncebuf.h>
 #include <clk.h>
 #include <dm.h>
-#include <dt-structs.h>
-#include <errno.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
+#include <linux/iopoll.h>
 #include <spi.h>
-#include <linux/errno.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/periph.h>
-#include <dm/pinctrl.h>
-
-DECLARE_GLOBAL_DATA_PTR;
+#include <spi-mem.h>
+
+/* System control */
+#define SFC_CTRL			0x0
+#define  SFC_CTRL_PHASE_SEL_NEGETIVE	BIT(1)
+#define  SFC_CTRL_CMD_BITS_SHIFT	8
+#define  SFC_CTRL_ADDR_BITS_SHIFT	10
+#define  SFC_CTRL_DATA_BITS_SHIFT	12
+
+/* Interrupt mask */
+#define SFC_IMR				0x4
+#define  SFC_IMR_RX_FULL		BIT(0)
+#define  SFC_IMR_RX_UFLOW		BIT(1)
+#define  SFC_IMR_TX_OFLOW		BIT(2)
+#define  SFC_IMR_TX_EMPTY		BIT(3)
+#define  SFC_IMR_TRAN_FINISH		BIT(4)
+#define  SFC_IMR_BUS_ERR		BIT(5)
+#define  SFC_IMR_NSPI_ERR		BIT(6)
+#define  SFC_IMR_DMA			BIT(7)
+
+/* Interrupt clear */
+#define SFC_ICLR			0x8
+#define  SFC_ICLR_RX_FULL		BIT(0)
+#define  SFC_ICLR_RX_UFLOW		BIT(1)
+#define  SFC_ICLR_TX_OFLOW		BIT(2)
+#define  SFC_ICLR_TX_EMPTY		BIT(3)
+#define  SFC_ICLR_TRAN_FINISH		BIT(4)
+#define  SFC_ICLR_BUS_ERR		BIT(5)
+#define  SFC_ICLR_NSPI_ERR		BIT(6)
+#define  SFC_ICLR_DMA			BIT(7)
+
+/* FIFO threshold level */
+#define SFC_FTLR			0xc
+#define  SFC_FTLR_TX_SHIFT		0
+#define  SFC_FTLR_TX_MASK		0x1f
+#define  SFC_FTLR_RX_SHIFT		8
+#define  SFC_FTLR_RX_MASK		0x1f
+
+/* Reset FSM and FIFO */
+#define SFC_RCVR			0x10
+#define  SFC_RCVR_RESET			BIT(0)
+
+/* Enhanced mode */
+#define SFC_AX				0x14
+
+/* Address Bit number */
+#define SFC_ABIT			0x18
+
+/* Interrupt status */
+#define SFC_ISR				0x1c
+#define  SFC_ISR_RX_FULL_SHIFT		BIT(0)
+#define  SFC_ISR_RX_UFLOW_SHIFT		BIT(1)
+#define  SFC_ISR_TX_OFLOW_SHIFT		BIT(2)
+#define  SFC_ISR_TX_EMPTY_SHIFT		BIT(3)
+#define  SFC_ISR_TX_FINISH_SHIFT	BIT(4)
+#define  SFC_ISR_BUS_ERR_SHIFT		BIT(5)
+#define  SFC_ISR_NSPI_ERR_SHIFT		BIT(6)
+#define  SFC_ISR_DMA_SHIFT		BIT(7)
+
+/* FIFO status */
+#define SFC_FSR				0x20
+#define  SFC_FSR_TX_IS_FULL		BIT(0)
+#define  SFC_FSR_TX_IS_EMPTY		BIT(1)
+#define  SFC_FSR_RX_IS_EMPTY		BIT(2)
+#define  SFC_FSR_RX_IS_FULL		BIT(3)
+#define  SFC_FSR_TXLV_MASK		GENMASK(12, 8)
+#define  SFC_FSR_TXLV_SHIFT		8
+#define  SFC_FSR_RXLV_MASK		GENMASK(20, 16)
+#define  SFC_FSR_RXLV_SHIFT		16
+
+/* FSM status */
+#define SFC_SR				0x24
+#define  SFC_SR_IS_IDLE			0x0
+#define  SFC_SR_IS_BUSY			0x1
+
+/* Raw interrupt status */
+#define SFC_RISR			0x28
+#define  SFC_RISR_RX_FULL		BIT(0)
+#define  SFC_RISR_RX_UNDERFLOW		BIT(1)
+#define  SFC_RISR_TX_OVERFLOW		BIT(2)
+#define  SFC_RISR_TX_EMPTY		BIT(3)
+#define  SFC_RISR_TRAN_FINISH		BIT(4)
+#define  SFC_RISR_BUS_ERR		BIT(5)
+#define  SFC_RISR_NSPI_ERR		BIT(6)
+#define  SFC_RISR_DMA			BIT(7)
+
+/* Version */
+#define SFC_VER				0x2C
+#define  SFC_VER_3			0x3
+#define  SFC_VER_4			0x4
+#define  SFC_VER_5			0x5
+
+/* Delay line controller resiter */
+#define SFC_DLL_CTRL0			0x3C
+#define SFC_DLL_CTRL0_SCLK_SMP_DLL	BIT(15)
+#define SFC_DLL_CTRL0_DLL_MAX_VER4	0xFFU
+#define SFC_DLL_CTRL0_DLL_MAX_VER5	0x1FFU
+
+/* Master trigger */
+#define SFC_DMA_TRIGGER			0x80
+
+/* Src or Dst addr for master */
+#define SFC_DMA_ADDR			0x84
+
+/* Length control register extension 32GB */
+#define SFC_LEN_CTRL			0x88
+#define SFC_LEN_CTRL_TRB_SEL		1
+#define SFC_LEN_EXT			0x8C
+
+/* Command */
+#define SFC_CMD				0x100
+#define  SFC_CMD_IDX_SHIFT		0
+#define  SFC_CMD_DUMMY_SHIFT		8
+#define  SFC_CMD_DIR_SHIFT		12
+#define  SFC_CMD_DIR_RD			0
+#define  SFC_CMD_DIR_WR			1
+#define  SFC_CMD_ADDR_SHIFT		14
+#define  SFC_CMD_ADDR_0BITS		0
+#define  SFC_CMD_ADDR_24BITS		1
+#define  SFC_CMD_ADDR_32BITS		2
+#define  SFC_CMD_ADDR_XBITS		3
+#define  SFC_CMD_TRAN_BYTES_SHIFT	16
+#define  SFC_CMD_CS_SHIFT		30
+
+/* Address */
+#define SFC_ADDR			0x104
+
+/* Data */
+#define SFC_DATA			0x108
+
+/* The controller and documentation reports that it supports up to 4 CS
+ * devices (0-3), however I have only been able to test a single CS (CS 0)
+ * due to the configuration of my device.
+ */
+#define SFC_MAX_CHIPSELECT_NUM		4
 
-#ifdef SFC_DEBUG
-#define SFC_DBG printf
-#else
-#define SFC_DBG(args...)
-#endif
+/* The SFC can transfer max 16KB - 1 at one time
+ * we set it to 15.5KB here for alignment.
+ */
+#define SFC_MAX_IOSIZE_VER3		(512 * 31)
 
-struct rockchip_sfc_reg {
-	u32 ctrl;
-	u32 imr;
-	u32 iclr;
-	u32 ftlr;
-	u32 rcvr;
-	u32 ax;
-	u32 abit;
-	u32 isr;
-	u32 fsr;
-	u32 sr;
-	u32 risr;
-	u32 ver;
-	u32 qop;
-	u32 ext_ctrl;
-	u32 reserved;
-	u32 dll_ctrl0;
-	u32 reserved1[16];
-	u32 dmatr;
-	u32 dmaaddr;
-	u32 len_ctrl;
-	u32 len_ext;
-	u32 reserved2[28];
-	u32 cmd;
-	u32 addr;
-	u32 data;
-};
+#define SFC_MAX_IOSIZE_VER4		(0xFFFFFFFFU)
 
-check_member(rockchip_sfc_reg, data, 0x108);
-
-/*SFC_CTRL*/
-#define SFC_DATA_WIDTH_SHIFT	12
-#define SFC_DATA_WIDTH_MASK	GENMASK(13, 12)
-#define SFC_ADDR_WIDTH_SHIFT	10
-#define SFC_ADDR_WIDTH_MASK	GENMASK(11, 10)
-#define SFC_CMD_WIDTH_SHIFT	8
-#define SFC_CMD_WIDTH_MASK	GENMASK(9, 8)
-#define SFC_DATA_SHIFT_NEGETIVE	BIT(1)
-
-/*SFC_CMD*/
-#define SFC_DUMMY_BITS_SHIFT	8
-#define SFC_RW_SHIFT		12
-#define SFC_WR			1
-#define SFC_RD			0
-#define SFC_ADDR_BITS_SHIFT	14
-#define SFC_ADDR_BITS_MASK	GENMASK(15, 14)
-#define SFC_ADDR_0BITS		0
-#define SFC_ADDR_24BITS		1
-#define SFC_ADDR_32BITS		2
-#define SFC_ADDR_XBITS		3
-#define SFC_TRB_SHIFT		(16)
-#define SFC_TRB_MASK		GENMASK(29, 16)
-
-/* Dma start trigger signal. Auto cleared after write */
-#define SFC_DMA_START		BIT(0)
-
-#define SFC_RESET		BIT(0)
-
-/*SFC_FSR*/
-#define SFC_RXLV_SHIFT		(16)
-#define SFC_RXLV_MASK		GENMASK(20, 16)
-#define SFC_TXLV_SHIFT		(8)
-#define SFC_TXLV_MASK		GENMASK(12, 8)
-#define SFC_RX_FULL		BIT(3)	/* rx fifo full */
-#define SFC_RX_EMPTY		BIT(2)	/* rx fifo empty */
-#define SFC_TX_EMPTY		BIT(1)	/* tx fifo empty */
-#define SFC_TX_FULL		BIT(0)	/* tx fifo full */
-
-#define SFC_BUSY		BIT(0)	/* sfc busy flag */
-
-/*SFC_RISR*/
-#define DMA_FINISH_INT		BIT(7)        /* dma interrupt */
-#define SPI_ERR_INT		BIT(6)        /* Nspi error interrupt */
-#define AHB_ERR_INT		BIT(5)        /* Ahb bus error interrupt */
-#define TRANS_FINISH_INT	BIT(4)        /* Transfer finish interrupt */
-#define TX_EMPTY_INT		BIT(3)        /* Tx fifo empty interrupt */
-#define TX_OF_INT		BIT(2)        /* Tx fifo overflow interrupt */
-#define RX_UF_INT		BIT(1)        /* Rx fifo underflow interrupt */
-#define RX_FULL_INT		BIT(0)        /* Rx fifo full interrupt */
-
-/*SFC_DLL_CTRL0*/
-#define DLL_CTRL0_SCLK_SMP_DLL	BIT(15)       /* SCLK sampling enable dll */
-#define DLL_CTRL0_DLL_MAX_VER4	0x1FFU
-#define DLL_CTRL0_DLL_MAX_VER5	0xFFU
-
-#define SFC_MAX_TRB_VER3	(512 * 31)
-#define SFC_MAX_TRB_VER4	(0xFFFFFFFF)
-
-#define SFC_MAX_RATE		(150 * 1000 * 1000)
-#define SFC_DLL_THRESHOLD_RATE	(50 * 1000 * 1000)
-#define SFC_DEFAULT_RATE	(80 * 1000 * 1000)
-
-#define SFC_VER_3		0x3
-#define SFC_VER_4		0x4
-#define SFC_VER_5		0x5
-
-#define SFC_DLL_TRANING_STEP		10		/* Training step */
-#define SFC_DLL_TRANING_VALID_WINDOW	80		/* Training Valid DLL winbow */
-
-enum rockchip_sfc_if_type {
-	IF_TYPE_STD,
-	IF_TYPE_DUAL,
-	IF_TYPE_QUAD,
-};
+/* DMA is only enabled for large data transmission */
+#define SFC_DMA_TRANS_THRETHOLD		(0x40)
 
-struct rockchip_sfc_platdata {
-	s32 frequency;
-	void *base;
-};
+/* Maximum clock values from datasheet suggest keeping clock value under
+ * 150MHz. No minimum or average value is suggested, but the U-boot BSP driver
+ * has a minimum of 10MHz and a default of 80MHz which seems reasonable.
+ */
+#define SFC_MIN_SPEED_HZ		(10 * 1000 * 1000)
+#define SFC_DEFAULT_SPEED_HZ		(80 * 1000 * 1000)
+#define SFC_MAX_SPEED_HZ		(150 * 1000 * 1000)
 
 struct rockchip_sfc {
-	struct rockchip_sfc_reg *regbase;
+	void __iomem *regbase;
+	struct clk hclk;
 	struct clk clk;
-	unsigned int max_freq;
-	unsigned int mode;
-	unsigned int speed_hz;
+	u32 max_freq;
+	u32 speed;
+	bool use_dma;
 	u32 max_iosize;
-	u16 max_dll_cells;
-	u16 dll_cells;
-	bool prepare;
-	u32 last_prepare_size;
-	u32 cmd;
-	u32 addr;
-	u8 addr_bits;
-	u8 addr_xbits_ext;
-	u8 dummy_bits;
-	u8 rw;
-	u32 trb;
+	u16 version;
 };
 
-static int rockchip_sfc_ofdata_to_platdata(struct udevice *bus)
+static int rockchip_sfc_reset(struct rockchip_sfc *sfc)
 {
-	struct rockchip_sfc_platdata *plat = dev_get_platdata(bus);
+	int err;
+	u32 status;
 
-	plat->base = dev_read_addr_ptr(bus);
-#if CONFIG_IS_ENABLED(CLK)
-	struct rockchip_sfc *sfc = dev_get_priv(bus);
-	int ret;
+	writel(SFC_RCVR_RESET, sfc->regbase + SFC_RCVR);
 
-	ret = clk_get_by_index(bus, 0, &sfc->clk);
-	if (ret < 0) {
-		printf("Could not get clock for %s: %d\n", bus->name, ret);
-		return ret;
-	}
-#endif
+	err = readl_poll_timeout(sfc->regbase + SFC_RCVR, status,
+				 !(status & SFC_RCVR_RESET),
+				 1000000);
+	if (err)
+		printf("SFC reset never finished\n");
 
-	return 0;
+	/* Still need to clear the masked interrupt from RISR */
+	writel(0xFFFFFFFF, sfc->regbase + SFC_ICLR);
+
+	debug("reset\n");
+
+	return err;
 }
 
-u32 rockchip_sfc_get_version(struct rockchip_sfc *sfc)
+static u16 rockchip_sfc_get_version(struct rockchip_sfc *sfc)
 {
-	struct rockchip_sfc_reg *regs = sfc->regbase;
-
-	return  (u32)(readl(&regs->ver) & 0xFFFF);
+	return  (u16)(readl(sfc->regbase + SFC_VER) & 0xffff);
 }
 
-int rockchip_sfc_set_delay_lines(struct rockchip_sfc *sfc, u32 cells)
+static u32 rockchip_sfc_get_max_iosize(struct rockchip_sfc *sfc)
 {
-	struct rockchip_sfc_reg *regs = sfc->regbase;
-	u32 val = 0;
+	if (rockchip_sfc_get_version(sfc) >= SFC_VER_4)
+		return SFC_MAX_IOSIZE_VER4;
 
-	if (cells > sfc->max_dll_cells)
-		cells = sfc->max_dll_cells;
+	return SFC_MAX_IOSIZE_VER3;
+}
 
-	if (cells)
-		val = DLL_CTRL0_SCLK_SMP_DLL | cells;
+static int rockchip_sfc_init(struct rockchip_sfc *sfc)
+{
+	writel(0, sfc->regbase + SFC_CTRL);
+	if (rockchip_sfc_get_version(sfc) >= SFC_VER_4)
+		writel(SFC_LEN_CTRL_TRB_SEL, sfc->regbase + SFC_LEN_CTRL);
 
-	return writel(val, &regs->dll_ctrl0);
+	return 0;
 }
 
+static int rockchip_sfc_ofdata_to_platdata(struct udevice *bus)
+{
+	struct rockchip_sfc *sfc = dev_get_platdata(bus);
+
+	sfc->regbase = dev_read_addr_ptr(bus);
+	if (ofnode_read_bool(dev_ofnode(bus), "sfc-no-dma"))
+		sfc->use_dma = false;
+	else
+		sfc->use_dma = true;
+
 #if CONFIG_IS_ENABLED(CLK)
-static void rockchip_sfc_delay_lines_training(struct udevice *bus, struct rockchip_sfc *sfc);
-#endif
+	int ret;
 
-static int rockchip_sfc_probe(struct udevice *bus)
-{
-	struct rockchip_sfc_platdata *plat = dev_get_platdata(bus);
-	struct rockchip_sfc *sfc = dev_get_priv(bus);
-	struct rockchip_sfc_reg *regs;
-
-	sfc->regbase = (struct rockchip_sfc_reg *)plat->base;
-	sfc->max_freq = SFC_MAX_RATE;
-	regs = sfc->regbase;
-	switch (rockchip_sfc_get_version(sfc)) {
-	case SFC_VER_5:
-		sfc->max_dll_cells = DLL_CTRL0_DLL_MAX_VER5;
-		sfc->max_iosize = SFC_MAX_TRB_VER4;
-		writel(1, &regs->len_ctrl);
-		break;
-	case SFC_VER_4:
-		sfc->max_dll_cells = DLL_CTRL0_DLL_MAX_VER4;
-		sfc->max_iosize = SFC_MAX_TRB_VER4;
-		writel(1, &regs->len_ctrl);
-		break;
-	default:
-		sfc->max_dll_cells = 0;
-		sfc->max_iosize = SFC_MAX_TRB_VER3;
-		break;
+	ret = clk_get_by_index(bus, 0, &sfc->clk);
+	if (ret < 0) {
+		printf("Could not get clock for %s: %d\n", bus->name, ret);
+		return ret;
 	}
 
+	ret = clk_get_by_index(bus, 1, &sfc->hclk);
+	if (ret < 0) {
+		printf("Could not get ahb clock for %s: %d\n", bus->name, ret);
+		return ret;
+	}
+#endif
+
 	return 0;
 }
 
-static int rockchip_sfc_reset(struct rockchip_sfc *sfc)
+static int rockchip_sfc_probe(struct udevice *bus)
 {
-	struct rockchip_sfc_reg *regs = sfc->regbase;
-	int tbase = get_timer(0);
-	u32 rcvr;
-	int ret = 0;
+	struct rockchip_sfc *sfc = dev_get_platdata(bus);
+	int ret;
 
-	writel(SFC_RESET, &regs->rcvr);
-	do {
-		rcvr = readl(&regs->rcvr);
-		if (get_timer(tbase) > 1000) {
-			debug("sfc reset timeout\n");
-			ret =  -ETIMEDOUT;
-			break;
-		}
-		udelay(1);
-	} while (rcvr);
+#if CONFIG_IS_ENABLED(CLK)
+	ret = clk_enable(&sfc->hclk);
+	if (ret)
+		debug("Enable ahb clock fail %s: %d\n", bus->name, ret);
+
+	ret = clk_enable(&sfc->clk);
+	if (ret)
+		debug("Enable clock fail for %s: %d\n", bus->name, ret);
 
-	writel(0xFFFFFFFF, &regs->iclr);
+	ret = clk_set_rate(&sfc->clk, SFC_DEFAULT_SPEED_HZ);
+	if (ret)
+		debug("Could not set sfc clock for %s: %d\n", bus->name, ret);
+#endif
 
-	debug("sfc reset\n");
+	ret = rockchip_sfc_init(sfc);
+	if (ret)
+		goto err_init;
 
-	return ret;
-}
+	sfc->max_iosize = rockchip_sfc_get_max_iosize(sfc);
+	sfc->version = rockchip_sfc_get_version(sfc);
+	sfc->speed = SFC_DEFAULT_SPEED_HZ;
 
-static int rockchip_sfc_dma_xfer_wait_finished(struct rockchip_sfc *sfc)
-{
-	struct rockchip_sfc_reg *regs = sfc->regbase;
-	int timeout = sfc->last_prepare_size * 10;
-	unsigned long tbase;
-	int ret = 0;
-	int risr;
+	return 0;
 
-	tbase = get_timer(0);
-	do {
-		udelay(1);
-		risr = readl(&regs->risr);
-		if (get_timer(tbase) > timeout) {
-			debug("dma timeout\n");
-			ret = -ETIMEDOUT;
-			break;
-		}
-	} while (!(risr & TRANS_FINISH_INT));
-	sfc->last_prepare_size = 0;
+err_init:
+#if CONFIG_IS_ENABLED(CLK)
+	clk_disable(&sfc->clk);
+	clk_disable(&sfc->hclk);
+#endif
 
 	return ret;
 }
 
-/* The SFC_CTRL register is a global control register,
- * when the controller is in busy state(SFC_SR),
- * SFC_CTRL cannot be set.
- */
-static int rockchip_sfc_wait_idle(struct rockchip_sfc *sfc,
-				  u32 timeout_ms)
+static inline int rockchip_sfc_get_fifo_level(struct rockchip_sfc *sfc, int wr)
 {
-	struct rockchip_sfc_reg *regs = sfc->regbase;
-	unsigned long tbase = get_timer(0);
-	u32 sr, fsr;
-
-	if (sfc->last_prepare_size && rockchip_sfc_dma_xfer_wait_finished(sfc))
-		return -ETIMEDOUT;
-
-	while (1) {
-		sr = readl(&regs->sr);
-		fsr = readl(&regs->fsr);
-		if ((fsr & SFC_TX_EMPTY) &&
-		    (fsr & SFC_RX_EMPTY) &&
-		    !(sr & SFC_BUSY))
-			break;
-		if (get_timer(tbase) > timeout_ms) {
-			printf("waite sfc idle timeout(sr:0x%08x fsr:0x%08x)\n",
-			       sr, fsr);
-			rockchip_sfc_reset(sfc);
-			return -ETIMEDOUT;
-		}
-		udelay(100);
-	}
+	u32 fsr = readl(sfc->regbase + SFC_FSR);
+	int level;
 
-	return 0;
+	if (wr)
+		level = (fsr & SFC_FSR_TXLV_MASK) >> SFC_FSR_TXLV_SHIFT;
+	else
+		level = (fsr & SFC_FSR_RXLV_MASK) >> SFC_FSR_RXLV_SHIFT;
+
+	return level;
 }
 
-static u8 rockchip_sfc_get_if_type(struct rockchip_sfc *sfc)
+static int rockchip_sfc_wait_fifo_ready(struct rockchip_sfc *sfc, int wr, u32 timeout)
 {
-	int type = IF_TYPE_STD;
+	unsigned long tbase = get_timer(0);
+	int level;
 
-	if (sfc->rw == SFC_WR) {
-		if (sfc->mode & SPI_TX_QUAD)
-			type = IF_TYPE_QUAD;
-		else if (sfc->mode & SPI_TX_DUAL)
-			type = IF_TYPE_DUAL;
-		else
-			type = IF_TYPE_STD;
-	} else {
-		if (sfc->mode & SPI_RX_QUAD)
-			type = IF_TYPE_QUAD;
-		else if (sfc->mode & SPI_RX_DUAL)
-			type = IF_TYPE_DUAL;
-		else
-			type = IF_TYPE_STD;
+	while (!(level = rockchip_sfc_get_fifo_level(sfc, wr))) {
+		if (get_timer(tbase) > timeout) {
+			debug("%s fifo timeout\n", wr ? "write" : "read");
+			return -ETIMEDOUT;
+		}
+		udelay(1);
 	}
 
-	return type;
+	return level;
 }
 
-static void rockchip_sfc_setup_xfer(struct rockchip_sfc *sfc, u32 trb)
+static void rockchip_sfc_adjust_op_work(struct spi_mem_op *op)
 {
-	struct rockchip_sfc_reg *regs = sfc->regbase;
-	u32 val;
-	u8 data_width = IF_TYPE_STD;
-
-	rockchip_sfc_wait_idle(sfc, 10);
-
-	if (sfc->addr_bits == SFC_ADDR_24BITS ||
-	    sfc->addr_bits == SFC_ADDR_32BITS)
-		data_width = rockchip_sfc_get_if_type(sfc);
-
-	SFC_DBG("--- sfc.addr_bit %x\n", sfc->addr_bits);
-	if (sfc->addr_bits == SFC_ADDR_XBITS)
-		writel(sfc->addr_xbits_ext - 1, &regs->abit);
-
-	if (rockchip_sfc_get_version(sfc) >= SFC_VER_4) {
-		SFC_DBG("--- sfc.len_ext %x\n", trb);
-		writel(trb, &regs->len_ext);
-	}
-
-	val = 0x2;
-	val |= (data_width << SFC_DATA_WIDTH_SHIFT);
-
-	SFC_DBG("--- sfc.ctrl %x\n", val);
-	writel(val, &regs->ctrl);
-
-	val = sfc->cmd;
-	val |= (trb & 0x3fff) << SFC_TRB_SHIFT;
-	val |= sfc->rw << SFC_RW_SHIFT;
-	val |= sfc->addr_bits << SFC_ADDR_BITS_SHIFT;
-	val |= sfc->dummy_bits << SFC_DUMMY_BITS_SHIFT;
-
-	SFC_DBG("--- sfc.cmd %x\n", val);
-	writel(val, &regs->cmd);
-
-	if (sfc->addr_bits & SFC_ADDR_XBITS) {
-		SFC_DBG("--- sfc.addr %x\n", sfc->addr);
-		writel(sfc->addr, &regs->addr);
+	if (unlikely(op->dummy.nbytes && !op->addr.nbytes)) {
+		/*
+		 * SFC not support output DUMMY cycles right after CMD cycles, so
+		 * treat it as ADDR cycles.
+		 */
+		op->addr.nbytes = op->dummy.nbytes;
+		op->addr.buswidth = op->dummy.buswidth;
+		op->addr.val = 0xFFFFFFFFF;
+
+		op->dummy.nbytes = 0;
 	}
 }
 
-static int rockchip_sfc_dma_xfer(struct rockchip_sfc *sfc, void *buffer,
-				 size_t trb)
+static int rockchip_sfc_wait_for_dma_finished(struct rockchip_sfc *sfc, int timeout)
 {
-	struct rockchip_sfc_reg *regs = sfc->regbase;
-	struct bounce_buffer bb;
-	unsigned int bb_flags;
-	int timeout = trb * 1000;
-	int ret = 0;
-	int risr;
 	unsigned long tbase;
 
-	if (sfc->rw == SFC_WR)
-		bb_flags = GEN_BB_READ;
-	else
-		bb_flags = GEN_BB_WRITE;
-
-	ret = bounce_buffer_start(&bb, buffer, trb, bb_flags);
-	if (ret)
-		return ret;
-
-	rockchip_sfc_setup_xfer(sfc, bb.len_aligned);
-
-	writel(0xFFFFFFFF, &regs->iclr);
-	writel((unsigned long)bb.bounce_buffer, &regs->dmaaddr);
-	writel(SFC_DMA_START, &regs->dmatr);
-
+	/* Wait for the DMA interrupt status */
 	tbase = get_timer(0);
-	do {
-		udelay(1);
-		risr = readl(&regs->risr);
+	while (!(readl(sfc->regbase + SFC_RISR) & SFC_RISR_DMA)) {
 		if (get_timer(tbase) > timeout) {
-			debug("dma timeout\n");
-			ret = -ETIMEDOUT;
-			break;
+			printf("dma timeout\n");
+			rockchip_sfc_reset(sfc);
+
+			return -ETIMEDOUT;
 		}
-	} while (!(risr & TRANS_FINISH_INT));
 
-	writel(0xFFFFFFFF, &regs->iclr);
+		udelay(1);
+	}
 
-	bounce_buffer_stop(&bb);
+	writel(0xFFFFFFFF, sfc->regbase + SFC_ICLR);
 
-	return ret;
+	return 0;
 }
 
-static int rockchip_sfc_dma_xfer_prepare(struct rockchip_sfc *sfc,
-					 void *buffer, size_t trb)
+static int rockchip_sfc_xfer_setup(struct rockchip_sfc *sfc,
+				   struct spi_slave *mem,
+				   const struct spi_mem_op *op,
+				   u32 len)
 {
-	struct rockchip_sfc_reg *regs = sfc->regbase;
+	struct dm_spi_slave_platdata *plat = dev_get_parent_platdata(mem->dev);
+	u32 ctrl = 0, cmd = 0;
+
+	/* set CMD */
+	cmd = op->cmd.opcode;
+	ctrl |= ((op->cmd.buswidth >> 1) << SFC_CTRL_CMD_BITS_SHIFT);
+
+	/* set ADDR */
+	if (op->addr.nbytes) {
+		if (op->addr.nbytes == 4) {
+			cmd |= SFC_CMD_ADDR_32BITS << SFC_CMD_ADDR_SHIFT;
+		} else if (op->addr.nbytes == 3) {
+			cmd |= SFC_CMD_ADDR_24BITS << SFC_CMD_ADDR_SHIFT;
+		} else {
+			cmd |= SFC_CMD_ADDR_XBITS << SFC_CMD_ADDR_SHIFT;
+			writel(op->addr.nbytes * 8 - 1, sfc->regbase + SFC_ABIT);
+		}
 
-	SFC_DBG("sfc_dma_xfer_prepar enter\n");
+		ctrl |= ((op->addr.buswidth >> 1) << SFC_CTRL_ADDR_BITS_SHIFT);
+	}
 
-	rockchip_sfc_setup_xfer(sfc, trb);
-	sfc->last_prepare_size = trb;
+	/* set DUMMY */
+	if (op->dummy.nbytes) {
+		if (op->dummy.buswidth == 4)
+			cmd |= op->dummy.nbytes * 2 << SFC_CMD_DUMMY_SHIFT;
+		else if (op->dummy.buswidth == 2)
+			cmd |= op->dummy.nbytes * 4 << SFC_CMD_DUMMY_SHIFT;
+		else
+			cmd |= op->dummy.nbytes * 8 << SFC_CMD_DUMMY_SHIFT;
+	}
 
-	flush_dcache_range((unsigned long)buffer,
-			   (unsigned long)buffer + trb);
+	/* set DATA */
+	if (sfc->version >= SFC_VER_4) /* Clear it if no data to transfer */
+		writel(len, sfc->regbase + SFC_LEN_EXT);
+	else
+		cmd |= len << SFC_CMD_TRAN_BYTES_SHIFT;
+	if (len) {
+		if (op->data.dir == SPI_MEM_DATA_OUT)
+			cmd |= SFC_CMD_DIR_WR << SFC_CMD_DIR_SHIFT;
 
-	writel(0xFFFFFFFF, &regs->iclr);
-	writel((unsigned long)buffer, &regs->dmaaddr);
-	writel(SFC_DMA_START, &regs->dmatr);
+		ctrl |= ((op->data.buswidth >> 1) << SFC_CTRL_DATA_BITS_SHIFT);
+	}
+	if (!len && op->addr.nbytes)
+		cmd |= SFC_CMD_DIR_WR << SFC_CMD_DIR_SHIFT;
 
-	return 0;
-}
+	/* set the Controller */
+	ctrl |= SFC_CTRL_PHASE_SEL_NEGETIVE;
+	cmd |= plat->cs << SFC_CMD_CS_SHIFT;
 
-static int rockchip_sfc_wait_fifo_ready(struct rockchip_sfc *sfc, int rw,
-					u32 timeout)
-{
-	struct rockchip_sfc_reg *regs = sfc->regbase;
-	unsigned long tbase = get_timer(0);
-	u8 level;
-	u32 fsr;
+	debug("addr.nbytes=%x(x%d) dummy.nbytes=%x(x%d)\n",
+	      op->addr.nbytes, op->addr.buswidth,
+	      op->dummy.nbytes, op->dummy.buswidth);
+	debug("ctrl=%x cmd=%x addr=%llx len=%x\n",
+	      ctrl, cmd, op->addr.val, len);
 
-	do {
-		fsr = readl(&regs->fsr);
-		if (rw == SFC_WR)
-			level = (fsr & SFC_TXLV_MASK) >> SFC_TXLV_SHIFT;
-		else
-			level = (fsr & SFC_RXLV_MASK) >> SFC_RXLV_SHIFT;
-		if (get_timer(tbase) > timeout)
-			return -ETIMEDOUT;
-		udelay(1);
-	} while (!level);
+	writel(ctrl, sfc->regbase + SFC_CTRL);
+	writel(cmd, sfc->regbase + SFC_CMD);
+	if (op->addr.nbytes)
+		writel(op->addr.val, sfc->regbase + SFC_ADDR);
 
-	return level;
+	return 0;
 }
 
-static int rockchip_sfc_write_fifo(struct rockchip_sfc *sfc, u32 *buf, u32 len)
+static int rockchip_sfc_write_fifo(struct rockchip_sfc *sfc, const u8 *buf, int len)
 {
-	struct rockchip_sfc_reg *regs = sfc->regbase;
-	u32 bytes = len & 0x3;
-	u32 words = len >> 2;
-	int tx_level = 0;
-	u32 val = 0;
-	u8 count;
-
-	while (words) {
-		tx_level = rockchip_sfc_wait_fifo_ready(sfc, SFC_WR, 1000);
-		if (tx_level <= 0)
+	u8 bytes = len & 0x3;
+	u32 dwords;
+	int tx_level;
+	u32 write_words;
+	u32 tmp = 0;
+
+	dwords = len >> 2;
+	while (dwords) {
+		tx_level = rockchip_sfc_wait_fifo_ready(sfc, SFC_CMD_DIR_WR, 1000);
+		if (tx_level < 0)
 			return tx_level;
-		count = min(words, (u32)tx_level);
-		writesl(&regs->data, buf, count);
-		buf += count;
-		words -= count;
+		write_words = min_t(u32, tx_level, dwords);
+		writesl(sfc->regbase + SFC_DATA, buf, write_words);
+		buf += write_words << 2;
+		dwords -= write_words;
 	}
 
-	/* handle the last non 4byte aligned bytes */
+	/* write the rest non word aligned bytes */
 	if (bytes) {
-		tx_level = rockchip_sfc_wait_fifo_ready(sfc, SFC_WR, 1000);
-		if (tx_level <= 0)
+		tx_level = rockchip_sfc_wait_fifo_ready(sfc, SFC_CMD_DIR_WR, 1000);
+		if (tx_level < 0)
 			return tx_level;
-		memcpy(&val, buf, bytes);
-		writel(val, &regs->data);
+		memcpy(&tmp, buf, bytes);
+		writel(tmp, sfc->regbase + SFC_DATA);
 	}
 
-	return 0;
+	return len;
 }
 
-static int rockchip_sfc_read_fifo(struct rockchip_sfc *sfc, u32 *buf, u32 len)
+static int rockchip_sfc_read_fifo(struct rockchip_sfc *sfc, u8 *buf, int len)
 {
-	struct rockchip_sfc_reg *regs = sfc->regbase;
-	u32 bytes = len & 0x3;
-	u32 words = len >> 2;
-	int rx_level = 0;
-	u32 count;
-	u32 val;
-
-	while (words) {
-		rx_level = rockchip_sfc_wait_fifo_ready(sfc, SFC_RD, 1000);
-		if (rx_level <= 0)
+	u8 bytes = len & 0x3;
+	u32 dwords;
+	u8 read_words;
+	int rx_level;
+	int tmp;
+
+	/* word aligned access only */
+	dwords = len >> 2;
+	while (dwords) {
+		rx_level = rockchip_sfc_wait_fifo_ready(sfc, SFC_CMD_DIR_RD, 1000);
+		if (rx_level < 0)
 			return rx_level;
-		count = min(words, (u32)rx_level);
-		readsl(&regs->data, buf, count);
-		buf += count;
-		words -= count;
+		read_words = min_t(u32, rx_level, dwords);
+		readsl(sfc->regbase + SFC_DATA, buf, read_words);
+		buf += read_words << 2;
+		dwords -= read_words;
 	}
 
-	/* handle the last non 4 bytes aligned bytes */
+	/* read the rest non word aligned bytes */
 	if (bytes) {
-		rx_level = rockchip_sfc_wait_fifo_ready(sfc, SFC_RD, 1000);
-		if (rx_level <= 0)
+		rx_level = rockchip_sfc_wait_fifo_ready(sfc, SFC_CMD_DIR_RD, 1000);
+		if (rx_level < 0)
 			return rx_level;
-		val = readl(&regs->data);
-		memcpy(buf, &val, bytes);
+		tmp = readl(sfc->regbase + SFC_DATA);
+		memcpy(buf, &tmp, bytes);
 	}
 
-	return 0;
+	return len;
 }
 
-static int rockchip_sfc_pio_xfer(struct rockchip_sfc *sfc, void *buf, u32 len)
+static int rockchip_sfc_fifo_transfer_dma(struct rockchip_sfc *sfc, dma_addr_t dma_buf, size_t len)
 {
-	int ret = 0;
+	writel(0xFFFFFFFF, sfc->regbase + SFC_ICLR);
+	writel((u32)dma_buf, sfc->regbase + SFC_DMA_ADDR);
+	writel(0x1, sfc->regbase + SFC_DMA_TRIGGER);
 
-	rockchip_sfc_setup_xfer(sfc, len);
+	return len;
+}
 
-	if (len) {
-		if (sfc->rw == SFC_WR)
-			ret = rockchip_sfc_write_fifo(sfc, (u32 *)buf, len);
-		else
-			ret = rockchip_sfc_read_fifo(sfc, (u32 *)buf, len);
-	}
+static int rockchip_sfc_xfer_data_poll(struct rockchip_sfc *sfc,
+				       const struct spi_mem_op *op, u32 len)
+{
+	debug("xfer_poll len=%x\n", len);
 
-	return ret;
+	if (op->data.dir == SPI_MEM_DATA_OUT)
+		return rockchip_sfc_write_fifo(sfc, op->data.buf.out, len);
+	else
+		return rockchip_sfc_read_fifo(sfc, op->data.buf.in, len);
 }
 
-static int rockchip_sfc_read(struct rockchip_sfc *sfc, u32 offset,
-			     void *buf, size_t len)
+static int rockchip_sfc_xfer_data_dma(struct rockchip_sfc *sfc,
+				      const struct spi_mem_op *op, u32 len)
 {
-	u32 dma_trans;
-	u32 trb;
-	u8 bytes;
+	struct bounce_buffer bb;
+	unsigned int bb_flags;
+	void *dma_buf;
 	int ret;
 
-	if (len >= ARCH_DMA_MINALIGN) {
-		bytes = len & (ARCH_DMA_MINALIGN - 1);
-		dma_trans = len - bytes;
-	} else {
-		dma_trans = 0;
-		bytes = len;
-	}
+	debug("xfer_dma len=%x\n", len);
 
-	while (dma_trans) {
-		trb = min_t(size_t, dma_trans, sfc->max_iosize);
-		if (sfc->prepare)
-			ret = rockchip_sfc_dma_xfer_prepare(sfc, buf, len);
-		else
-			ret = rockchip_sfc_dma_xfer(sfc, buf, trb);
-		if (ret < 0)
-			return ret;
-		dma_trans -= trb;
-		sfc->addr += trb;
-		buf += trb;
-	}
-
-	/*
-	 * transfer the last non dma anligned byte by pio mode
-	 */
-	if (bytes)
-		ret = rockchip_sfc_pio_xfer(sfc, buf, bytes);
-
-	return 0;
-}
-
-static int rockchip_sfc_write(struct rockchip_sfc *sfc, u32 offset,
-			      void *buf, size_t len)
-{
-	if (len > sfc->max_iosize) {
-		printf("out of the max sfc trb");
-		return -EINVAL;
+	if (op->data.dir == SPI_MEM_DATA_OUT) {
+		dma_buf = (void *)op->data.buf.out;
+		bb_flags = GEN_BB_READ;
+	} else {
+		dma_buf = (void *)op->data.buf.in;
+		bb_flags = GEN_BB_WRITE;
 	}
 
-	if (len && !(len & (ARCH_DMA_MINALIGN - 1)))
-		return rockchip_sfc_dma_xfer(sfc, buf, len);
-	else
-		return rockchip_sfc_pio_xfer(sfc, buf, len);
+	ret = bounce_buffer_start(&bb, dma_buf, len, bb_flags);
+	if (ret)
+		return ret;
 
-	return 0;
-}
+	ret = rockchip_sfc_fifo_transfer_dma(sfc, (dma_addr_t)bb.bounce_buffer, len);
+	rockchip_sfc_wait_for_dma_finished(sfc, len * 10);
+	bounce_buffer_stop(&bb);
 
-static int rockchip_sfc_do_xfer(struct rockchip_sfc *sfc, void *buf, size_t len)
-{
-	if (sfc->rw)
-		return rockchip_sfc_write(sfc, sfc->addr, buf, len);
-	else
-		return rockchip_sfc_read(sfc, sfc->addr, buf, len);
+	return ret;
 }
 
-#if CONFIG_IS_ENABLED(CLK)
-static void rockchip_sfc_delay_lines_training(struct udevice *bus, struct rockchip_sfc *sfc)
+static int rockchip_sfc_xfer_done(struct rockchip_sfc *sfc, u32 timeout_us)
 {
-	u8 id[3], id_temp[3];
-	u16 cell_max = sfc->max_dll_cells;
-	u16 right, left = 0;
-	u16 step = SFC_DLL_TRANING_STEP;
-	bool dll_valid = false;
-
-	sfc->cmd = 0x9f;
-	sfc->addr = 0;
-	sfc->addr_bits = 0;
-	sfc->addr_xbits_ext = 8;
-	sfc->dummy_bits = 0;
-	sfc->rw = 0;
-
-	clk_set_rate(&sfc->clk, SFC_DLL_THRESHOLD_RATE);
-	rockchip_sfc_pio_xfer(sfc, (void *)&id, 3);
-	if ((0xFF == id[0] && 0xFF == id[1]) ||
-	    (0x00 == id[0] && 0x00 == id[1])) {
-		dev_dbg(bus, "no dev, dll by pass\n");
-		clk_set_rate(&sfc->clk, sfc->speed_hz);
-
-		return;
-	}
-
-	clk_set_rate(&sfc->clk, sfc->speed_hz);
-	for (right = 0; right <= cell_max; right += step) {
-		int ret;
-
-		rockchip_sfc_set_delay_lines(sfc, right);
-		rockchip_sfc_pio_xfer(sfc, (void *)&id_temp, 3);
-		dev_dbg(bus, "dll read flash id:%x %x %x\n",
-			id_temp[0], id_temp[1], id_temp[2]);
+	unsigned long tbase = get_timer(0);
+	int ret = 0;
+	u32 timeout = timeout_us;
 
-		ret = memcmp(&id, &id_temp, 3);
-		if (dll_valid && ret) {
-			right -= step;
+	while (readl(sfc->regbase + SFC_SR) & SFC_SR_IS_BUSY) {
+		if (get_timer(tbase) > timeout) {
+			printf("wait sfc idle timeout\n");
+			rockchip_sfc_reset(sfc);
 
-			break;
+			return -ETIMEDOUT;
 		}
-		if (!dll_valid && !ret)
-			left = right;
-
-		if (!ret)
-			dll_valid = true;
-
-		/* Add cell_max to loop */
-		if (right == cell_max)
-			break;
-		if (right + step > cell_max)
-			right = cell_max - step;
-	}
 
-	if (dll_valid && (right - left) >= SFC_DLL_TRANING_VALID_WINDOW) {
-		if (left == 0 && right < cell_max)
-			sfc->dll_cells = left + (right - left) * 2 / 5;
-		else
-			sfc->dll_cells = left + (right - left) / 2;
-	} else {
-		sfc->dll_cells = 0;
+		udelay(1);
 	}
 
-	if (sfc->dll_cells) {
-		dev_dbg(bus, "%d %d %d dll training success in %dHz max_cells=%u sfc_ver=%d\n",
-			left, right, sfc->dll_cells, sfc->speed_hz,
-			cell_max, rockchip_sfc_get_version(sfc));
-		rockchip_sfc_set_delay_lines(sfc, sfc->dll_cells);
-	} else {
-		dev_err(bus, "%d %d dll training failed in %dHz, reduce the frequency\n",
-			left, right, sfc->speed_hz);
-		rockchip_sfc_set_delay_lines(sfc, 0);
-		clk_set_rate(&sfc->clk, SFC_DLL_THRESHOLD_RATE);
-		sfc->speed_hz = SFC_DLL_THRESHOLD_RATE;
-	}
+	return ret;
 }
-#endif
 
-static int rockchip_sfc_xfer(struct udevice *dev, unsigned int bitlen,
-			     const void *dout, void *din, unsigned long flags)
+static int rockchip_sfc_exec_op(struct spi_slave *mem,
+				const struct spi_mem_op *op)
 {
-	struct udevice *bus = dev->parent;
-	struct rockchip_sfc *sfc = dev_get_priv(bus);
-	int len = bitlen >> 3;
-	u8 *pcmd = (u8 *)dout;
-	void *data_buf;
-	int ret = 0;
+	struct rockchip_sfc *sfc = dev_get_platdata(mem->dev->parent);
+	u32 len = min_t(u32, op->data.nbytes, sfc->max_iosize);
+	int ret;
 
-	if (flags & SPI_XFER_BEGIN) {
-		sfc->cmd = pcmd[0];
-		switch (len) {
-		case 6: /* Nor >16MB 0x6b dummy op */
-			sfc->addr_bits = SFC_ADDR_32BITS;
-			sfc->dummy_bits = 8;
-			sfc->addr = pcmd[4] | (pcmd[3] << 8) | (pcmd[2] << 16) | (pcmd[1] << 24);
-			break;
-		case 5: /* Nor <=16MB 0x6b dummy op, Nor >16MB no dummy op */
-			if (sfc->cmd == 0x6b) {
-				sfc->addr_bits = SFC_ADDR_24BITS;
-				sfc->dummy_bits = 8;
-				sfc->addr = pcmd[3] | (pcmd[2] << 8) | (pcmd[1] << 16);
-			} else {
-				sfc->addr_bits = SFC_ADDR_32BITS;
-				sfc->dummy_bits = 0;
-				sfc->addr = pcmd[4] | (pcmd[3] << 8) | (pcmd[2] << 16) | (pcmd[1] << 24);
-			}
-			break;
-		case 4: /* Nand erase and read, Nor <=16MB no dummy op */
-			sfc->addr_bits = SFC_ADDR_24BITS;
-			sfc->dummy_bits = 0;
-			sfc->addr = pcmd[3] | (pcmd[2] << 8) | (pcmd[1] << 16);
-			break;
-		case 3: /* Nand prog,  */
-			sfc->addr_bits = SFC_ADDR_XBITS;
-			sfc->addr_xbits_ext = 16;
-			sfc->dummy_bits = 0;
-			sfc->addr = pcmd[2] | pcmd[1] << 8;
-			break;
-		case 2: /* Nand read/write feature */
-			sfc->addr_bits = SFC_ADDR_XBITS;
-			sfc->addr_xbits_ext = 8;
-			sfc->dummy_bits = 0;
-			sfc->addr = pcmd[1];
-			break;
-		default: /* Nand/Nor Read/Write status */
-			sfc->addr_bits = SFC_ADDR_0BITS;
-			sfc->dummy_bits = 0;
-			sfc->addr = 0;
-			break;
+#if CONFIG_IS_ENABLED(CLK)
+	if (unlikely(mem->max_hz != sfc->speed)) {
+		ret = clk_set_rate(&sfc->clk, clamp(mem->max_hz, (uint)SFC_MIN_SPEED_HZ,
+						    (uint)SFC_MAX_SPEED_HZ));
+		if (ret < 0) {
+			printf("set_freq=%dHz fail, check if it's the cru support level\n",
+			       mem->max_hz);
+			return ret;
 		}
-		SFC_DBG("%s %d %x %d %d %x\n", __func__, len, sfc->cmd,
-			sfc->addr_bits, sfc->dummy_bits, sfc->addr);
+
+		sfc->max_freq = mem->max_hz;
+		sfc->speed = mem->max_hz;
+		debug("set_freq=%dHz real_freq=%dHz\n", sfc->max_freq, sfc->speed);
 	}
-	if (flags & SPI_XFER_END) {
-		if (din) {
-			sfc->rw = SFC_RD;
-			data_buf = din;
-		} else {
-			sfc->rw = SFC_WR;
-			data_buf = (void *)dout;
-		}
+#endif
 
-		if (flags == (SPI_XFER_BEGIN | SPI_XFER_END)) {
-			len = 0;
-			data_buf = NULL;
-		}
+	rockchip_sfc_adjust_op_work((struct spi_mem_op *)op);
 
-		sfc->prepare = flags & SPI_XFER_PREPARE ? true : false;
+	rockchip_sfc_xfer_setup(sfc, mem, op, len);
+	if (len) {
+		if (likely(sfc->use_dma) && !(len & 0x3) && len >= SFC_DMA_TRANS_THRETHOLD)
+			ret = rockchip_sfc_xfer_data_dma(sfc, op, len);
+		else
+			ret = rockchip_sfc_xfer_data_poll(sfc, op, len);
 
-		if (sfc->cmd == 0x9f && len == 4) {
-			/* SPI Nand read id */
-			sfc->addr_bits = SFC_ADDR_XBITS;
-			sfc->addr_xbits_ext = 8;
-			sfc->dummy_bits = 0;
-			sfc->addr = 0;
-			((u8 *)data_buf)[0] = 0xff;
-			ret = rockchip_sfc_do_xfer(sfc, &((u8 *)data_buf)[1], 3);
-		} else {
-			ret = rockchip_sfc_do_xfer(sfc, data_buf, len);
+		if (ret != len) {
+			printf("xfer data failed ret %d dir %d\n", ret, op->data.dir);
+
+			return -EIO;
 		}
 	}
 
-	return ret;
+	return rockchip_sfc_xfer_done(sfc, 100000);
 }
 
-static int rockchip_sfc_set_speed(struct udevice *bus, uint speed)
+static int rockchip_sfc_adjust_op_size(struct spi_slave *mem, struct spi_mem_op *op)
 {
-	struct rockchip_sfc *sfc = dev_get_priv(bus);
-
-	if (speed > sfc->max_freq)
-		speed = sfc->max_freq;
+	struct rockchip_sfc *sfc = dev_get_platdata(mem->dev->parent);
 
-	if (speed == sfc->speed_hz)
-		return 0;
+	op->data.nbytes = min(op->data.nbytes, sfc->max_iosize);
+	return 0;
+}
 
-#if CONFIG_IS_ENABLED(CLK)
-	clk_set_rate(&sfc->clk, speed);
-	sfc->speed_hz = speed;
-	if (rockchip_sfc_get_version(sfc) >= SFC_VER_4 &&
-	    clk_get_rate(&sfc->clk) > SFC_DLL_THRESHOLD_RATE)
-		rockchip_sfc_delay_lines_training(bus, sfc);
-	else if (rockchip_sfc_get_version(sfc) >= SFC_VER_4)
-		rockchip_sfc_set_delay_lines(sfc, 0);
-	SFC_DBG("%s clk= %ld\n", __func__, clk_get_rate(&sfc->clk));
-#else
-	pr_err("%s failed, CLK not support\n", __func__);
-#endif
+static int rockchip_sfc_set_speed(struct udevice *bus, uint speed)
+{
+	/* We set up speed later for each transmission.
+	 */
 	return 0;
 }
 
 static int rockchip_sfc_set_mode(struct udevice *bus, uint mode)
 {
-	struct rockchip_sfc *sfc = dev_get_priv(bus);
-
-	sfc->mode = mode;
-
 	return 0;
 }
 
+static const struct spi_controller_mem_ops rockchip_sfc_mem_ops = {
+	.adjust_op_size	= rockchip_sfc_adjust_op_size,
+	.exec_op	= rockchip_sfc_exec_op,
+};
+
 static const struct dm_spi_ops rockchip_sfc_ops = {
-	.xfer		= rockchip_sfc_xfer,
+	.mem_ops	= &rockchip_sfc_mem_ops,
 	.set_speed	= rockchip_sfc_set_speed,
 	.set_mode	= rockchip_sfc_set_mode,
 };
 
 static const struct udevice_id rockchip_sfc_ids[] = {
-	{ .compatible = "rockchip,sfc" },
-	{ }
+	{ .compatible = "rockchip,sfc"},
+	{},
 };
 
 U_BOOT_DRIVER(rockchip_sfc_driver) = {
-	.name	= "rockchip_sfc",
-	.id	= UCLASS_SPI,
+	.name   = "rockchip_sfc",
+	.id     = UCLASS_SPI,
 	.of_match = rockchip_sfc_ids,
-	.ops	= &rockchip_sfc_ops,
+	.ops    = &rockchip_sfc_ops,
 	.ofdata_to_platdata = rockchip_sfc_ofdata_to_platdata,
-	.platdata_auto_alloc_size = sizeof(struct rockchip_sfc_platdata),
-	.priv_auto_alloc_size = sizeof(struct rockchip_sfc),
-	.probe	= rockchip_sfc_probe,
+	.platdata_auto_alloc_size = sizeof(struct rockchip_sfc),
+	.probe  = rockchip_sfc_probe,
 };

commit 653a52cce3c77b2447580bed61a81b74045885c8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Sep 29 09:15:00 2021 +0800

    rockchip: rkimg: add comments for scsi init
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Iac7137af9317e0f6087823fd328f5fe2d5931894

diff --git a/arch/arm/mach-rockchip/boot_rkimg.c b/arch/arm/mach-rockchip/boot_rkimg.c
index 99fb1f668c..7b789af3ac 100644
--- a/arch/arm/mach-rockchip/boot_rkimg.c
+++ b/arch/arm/mach-rockchip/boot_rkimg.c
@@ -47,6 +47,12 @@ static void boot_devtype_init(void)
 	if (done)
 		return;
 
+	/*
+	 * The loader stage does not support SATA, and the boot device
+	 * can only be other storage. Therefore, it is necessary to
+	 * initialize the SATA device before judging the initialization
+	 * of atag boot device
+	 */
 #if defined(CONFIG_SCSI) && defined(CONFIG_CMD_SCSI) && defined(CONFIG_AHCI)
 	ret = run_command("scsi scan", 0);
 	if (!ret) {

commit 84cb34e7efe6c6c3aef736c6eed892353c0dab32
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 28 18:09:42 2021 +0800

    rockchip: kernel dtb: disable identify platform
    
    We don't find a way to cover all cases.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I090168361721442d8378f9a71cd76f42dd8517ba

diff --git a/arch/arm/mach-rockchip/kernel_dtb.c b/arch/arm/mach-rockchip/kernel_dtb.c
index fbeeaa38c7..121c1c33ac 100644
--- a/arch/arm/mach-rockchip/kernel_dtb.c
+++ b/arch/arm/mach-rockchip/kernel_dtb.c
@@ -223,6 +223,9 @@ static int dtb_check_ok(void *kfdt, void *ufdt)
 	const char *compat;
 	int index;
 
+	/* TODO */
+	return 1;
+
 	for (index = 0;
 	     compat = fdt_stringlist_get(ufdt, 0, "compatible",
 					 index, NULL), compat;

commit 74ec585ef6a394fc5ed54c8362bfe62528efa48e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Sep 23 21:09:01 2021 +0800

    rockchip: kernel dtb: use "/compatible" to identify platform
    
    "xxx-cru" node is not unique in DTB, there is a "rockchip,rk628-cru".
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ie9f50450addd39a9c6a343c2cb543a8c26a51cb1

diff --git a/arch/arm/mach-rockchip/kernel_dtb.c b/arch/arm/mach-rockchip/kernel_dtb.c
index 72a95704b4..fbeeaa38c7 100644
--- a/arch/arm/mach-rockchip/kernel_dtb.c
+++ b/arch/arm/mach-rockchip/kernel_dtb.c
@@ -217,40 +217,21 @@ static int mmc_dm_reinit(void)
 	return 0;
 }
 
-/*
- * Simply check cru node:
- * This kernel dtb is belong to current platform ?
- */
-static int dtb_check_ok(void *fdt, void *ufdt)
+/* Check by property: "/compatible" */
+static int dtb_check_ok(void *kfdt, void *ufdt)
 {
-	const char *compare[2] = { NULL, NULL, };
 	const char *compat;
-	void *blob = fdt;
-	int offset;
-	int i;
-
-	for (i = 0; i < 2; i++) {
-		for (offset = fdt_next_node(blob, 0, NULL);
-		     offset >= 0;
-		     offset = fdt_next_node(blob, offset, NULL)) {
-			compat = fdt_getprop(blob, offset, "compatible", NULL);
-			if (!compat)
-				continue;
-			debug("[%d] compat: %s\n", i, compat);
-			if (strstr(compat, "-cru")) {
-				compare[i] = compat;
-				blob = ufdt;
-				break;
-			}
-		}
+	int index;
+
+	for (index = 0;
+	     compat = fdt_stringlist_get(ufdt, 0, "compatible",
+					 index, NULL), compat;
+	     index++) {
+		debug("u-compat: %s\n", compat);
+		if (!fdt_node_check_compatible(kfdt, 0, compat))
+			return 1;
 	}
 
-	if (!compare[0])
-		return 1;
-
-	if (compare[0] && compare[1])
-		return !memcmp(compare[0], compare[1], strlen(compare[0]));
-
 	return 0;
 }
 

commit c1d79eb4a3defeb97b28a38ba544472f21480463
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Sep 27 09:16:12 2021 +0800

    spl: fit: append ab info for kernel
    
    Open CONFIG_SPL_AB to enable it.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ib9d78ca0ae8f38316b41f8063bfc0a3f1cf87b69

diff --git a/common/spl/spl_fit_tb_arm_v7.S b/common/spl/spl_fit_tb_arm_v7.S
index 02aa2b423c..bb94969067 100644
--- a/common/spl/spl_fit_tb_arm_v7.S
+++ b/common/spl/spl_fit_tb_arm_v7.S
@@ -224,93 +224,8 @@ spl_fit_get_image_node:
 	.cfi_endproc
 .LFE213:
 	.size	spl_fit_get_image_node, .-spl_fit_get_image_node
-	.global	__aeabi_idiv
-	.section	.text.spl_fit_load_blob,"ax",%progbits
-	.align	1
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	spl_fit_load_blob, %function
-spl_fit_load_blob:
-.LFB222:
-	.loc 1 413 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL38:
-	ldr	r2, [r2, #4]
-.LVL39:
-	push	{r3, r4, r5, r6, r7, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 3, -24
-	.cfi_offset 4, -20
-	.cfi_offset 5, -16
-	.cfi_offset 6, -12
-	.cfi_offset 7, -8
-	.cfi_offset 14, -4
-	.loc 1 413 0
-	mov	r4, r0
-	mov	r5, r1
-	rev	r2, r2
-.LVL40:
-	.loc 1 426 0
-	addw	r2, r2, #511
-.LVL41:
-	.loc 1 427 0
-	bic	r0, r2, #510
-.LVL42:
-	bic	r0, r0, #1
-	str	r0, [r3]
-	.loc 1 446 0
-	ldr	r3, .L19
-.LVL43:
-	ldr	r1, [r4, #8]
-.LVL44:
-	subs	r3, r3, r1
-	subs	r3, r3, r0
-	.loc 1 447 0
-	bic	r6, r3, #63
-.LVL45:
-.LBB30:
-.LBB31:
-	.loc 1 168 0
-	ldr	r3, [r4, #12]
-	cbnz	r3, .L17
-	.loc 1 171 0
-	add	r0, r0, r1
-.LVL46:
-	subs	r0, r0, #1
-	bl	__aeabi_idiv
-.LVL47:
-.L17:
-.LBE31:
-.LBE30:
-	.loc 1 449 0
-	mov	r2, r0
-	ldr	r7, [r4, #16]
-	mov	r3, r6
-	mov	r1, r5
-	mov	r0, r4
-	blx	r7
-.LVL48:
-	.loc 1 452 0
-	cmp	r0, #0
-	.loc 1 456 0
-	ite	ne
-	movne	r0, r6
-.LVL49:
-	moveq	r0, #0
-	pop	{r3, r4, r5, r6, r7, pc}
-.LVL50:
-.L20:
-	.align	2
-.L19:
-	.word	6291393
-	.cfi_endproc
-.LFE222:
-	.size	spl_fit_load_blob, .-spl_fit_load_blob
 	.global	__aeabi_idivmod
+	.global	__aeabi_idiv
 	.section	.text.spl_load_fit_image,"ax",%progbits
 	.align	1
 	.syntax unified
@@ -324,7 +239,7 @@ spl_load_fit_image:
 	.cfi_startproc
 	@ args = 8, pretend = 0, frame = 48
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL51:
+.LVL38:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
 	.cfi_offset 4, -32
@@ -338,496 +253,421 @@ spl_load_fit_image:
 	sub	sp, sp, #56
 	.cfi_def_cfa_offset 88
 	.loc 1 194 0
-	mov	r8, r3
-	ldr	r3, [sp, #92]
-.LVL52:
 	mov	r4, r2
+	ldr	r5, [sp, #88]
 	.loc 1 204 0
 	add	r2, sp, #56
-.LVL53:
+.LVL39:
 	.loc 1 194 0
-	ldr	r5, [sp, #88]
-	mov	r7, r0
-	str	r3, [sp, #8]
+	mov	r7, r3
 	.loc 1 204 0
 	movs	r3, #255
+.LVL40:
+	.loc 1 194 0
+	str	r1, [sp, #20]
+	.loc 1 204 0
 	strb	r3, [r2, #-29]!
-.LVL54:
+.LVL41:
+	.loc 1 221 0
+	mov	r1, r5
+.LVL42:
 	.loc 1 208 0
 	ldr	r3, [r0]
+	.loc 1 194 0
+	mov	r8, r0
 	.loc 1 221 0
 	mov	r0, r4
-.LVL55:
+.LVL43:
 	.loc 1 194 0
-	str	r1, [sp, #16]
-	.loc 1 221 0
-	mov	r1, r5
-.LVL56:
+	ldr	r6, [sp, #92]
 	.loc 1 208 0
 	str	r3, [sp, #12]
-.LVL57:
+.LVL44:
 	.loc 1 221 0
 	bl	fit_image_get_comp
-.LVL58:
+.LVL45:
 	.loc 1 224 0
 	add	r2, sp, #44
 	mov	r1, r5
 	mov	r0, r4
 	bl	fit_image_get_load
-.LVL59:
-	cbz	r0, .L22
+.LVL46:
+	cbz	r0, .L17
 	.loc 1 225 0
-	ldr	r3, [sp, #8]
-	ldr	r3, [r3, #8]
+	ldr	r3, [r6, #8]
 	str	r3, [sp, #44]
-.L22:
+.L17:
 	.loc 1 227 0
 	ldrb	r3, [sp, #27]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L23
+	beq	.L18
 	.loc 1 227 0 is_stmt 0 discriminator 1
 	cmp	r3, #6
-	beq	.L23
+	beq	.L18
 	.loc 1 229 0 is_stmt 1
 	add	r2, sp, #40
 	mov	r1, r5
 	mov	r0, r4
 	bl	fit_image_get_comp_addr
-.LVL60:
-	cbz	r0, .L24
+.LVL47:
+	cbz	r0, .L19
 	.loc 1 230 0
 	ldr	r3, [sp, #44]
 	add	r3, r3, #1048576
-.L79:
+.L70:
 	.loc 1 232 0
 	str	r3, [sp, #40]
-.L24:
+.L19:
 	.loc 1 235 0
 	add	r2, sp, #28
 	mov	r1, r5
 	mov	r0, r4
 	bl	fit_image_get_data_position
-.LVL61:
-	cbz	r0, .L25
+.LVL48:
+	cbz	r0, .L20
 	.loc 1 237 0
 	add	r2, sp, #28
 	mov	r1, r5
 	mov	r0, r4
 	bl	fit_image_get_data_offset
-.LVL62:
+.LVL49:
 	cmp	r0, #0
-	bne	.L26
+	bne	.L21
 	.loc 1 238 0
 	ldr	r3, [sp, #28]
-	add	r3, r3, r8
-	str	r3, [sp, #28]
-.LVL63:
-.L25:
+	add	r7, r7, r3
+.LVL50:
+	str	r7, [sp, #28]
+.LVL51:
+.L20:
 	.loc 1 244 0
 	add	r2, sp, #36
 	mov	r1, r5
 	mov	r0, r4
 	bl	fit_image_get_data_size
-.LVL64:
+.LVL52:
 	cmp	r0, #0
-	bne	.L49
+	bne	.L40
 	.loc 1 247 0
-	ldr	r3, [sp, #40]
-	adds	r3, r3, #63
-	bic	r8, r3, #63
-.LVL65:
+	ldr	r7, [sp, #40]
+	adds	r7, r7, #63
+	bic	r3, r7, #63
+	.loc 1 249 0
+	cmp	r3, #-50331648
+	.loc 1 247 0
+	str	r3, [sp, #8]
+.LVL53:
 	.loc 1 249 0
-	cmp	r8, #-50331648
-	bcc	.L27
+	bcc	.L22
 	.loc 1 251 0
 	ldr	r1, [sp, #36]
 	movs	r0, #64
 	bl	memalign_simple
-.LVL66:
-	mov	r8, r0
-.LVL67:
-.L27:
-.LBB48:
-.LBB49:
+.LVL54:
+	str	r0, [sp, #8]
+.LVL55:
+.L22:
+.LBB37:
+.LBB38:
 	.loc 1 157 0
-	ldr	r3, [r7, #12]
-.LBE49:
-.LBE48:
+	ldr	r3, [r8, #12]
+.LBE38:
+.LBE37:
 	.loc 1 253 0
 	ldr	r10, [sp, #36]
 	.loc 1 255 0
 	ldr	r0, [sp, #28]
 	.loc 1 253 0
 	str	r10, [sp, #32]
-.LVL68:
-.LBB52:
-.LBB50:
+.LVL56:
+.LBB41:
+.LBB39:
 	.loc 1 157 0
 	cmp	r3, #0
-	beq	.L28
+	beq	.L23
 	.loc 1 158 0
 	and	fp, r0, #63
-.LVL69:
-.L29:
-.LBE50:
-.LBE52:
-.LBB53:
-.LBB54:
+.LVL57:
+.L24:
+.LBE39:
+.LBE41:
+.LBB42:
+.LBB43:
 	.loc 1 166 0
 	add	r10, r10, fp
-.LVL70:
+.LVL58:
 	.loc 1 168 0
-	cbnz	r3, .L30
+	cbnz	r3, .L25
 	.loc 1 171 0
-	ldr	r1, [r7, #8]
+	ldr	r1, [r8, #8]
 	add	r0, r10, r1
 	subs	r0, r0, #1
 	bl	__aeabi_idiv
-.LVL71:
+.LVL59:
 	mov	r10, r0
-.LVL72:
-.L30:
-.LBE54:
-.LBE53:
+.LVL60:
+.L25:
+.LBE43:
+.LBE42:
 	.loc 1 259 0
 	mov	r1, r5
 	mov	r0, r4
 	bl	fit_image_is_preload
-.LVL73:
+.LVL61:
 	.loc 1 261 0
-	str	r0, [sp, #20]
-	cbz	r0, .L31
+	str	r0, [sp, #16]
+	cbz	r0, .L26
 	.loc 1 262 0
 	ldr	r2, [sp, #12]
 	movs	r3, #1
 	strb	r3, [r2, #14]
-.L31:
+.L26:
 	.loc 1 264 0
-	ldr	r3, [r7, #16]
+	ldr	r3, [r8, #16]
 	.loc 1 265 0
 	ldr	r0, [sp, #28]
-.LVL74:
+.LVL62:
 	.loc 1 264 0
-	mov	r6, r3
-.LBB55:
-.LBB56:
+	mov	r7, r3
+.LBB44:
+.LBB45:
 	.loc 1 143 0
-	ldr	r3, [r7, #12]
+	ldr	r3, [r8, #12]
 	cmp	r3, #0
-	beq	.L32
+	beq	.L27
 	.loc 1 144 0
 	bic	r0, r0, #63
-.LVL75:
-.L33:
-.LBE56:
-.LBE55:
+.LVL63:
+.L28:
+.LBE45:
+.LBE44:
 	.loc 1 264 0
-	ldr	r1, [sp, #16]
-	mov	r3, r8
+	ldr	r1, [sp, #20]
 	mov	r2, r10
-	adds	r1, r0, r1
-	mov	r0, r7
-	blx	r6
-.LVL76:
+	ldr	r3, [sp, #8]
+	add	r1, r1, r0
+	mov	r0, r8
+	blx	r7
+.LVL64:
 	cmp	r10, r0
-	bne	.L46
-	.loc 1 272 0
-	ldr	r3, [sp, #20]
+	bne	.L37
 	.loc 1 271 0
-	add	r0, r8, fp
-	str	r0, [sp, #48]
+	ldr	r3, [sp, #8]
+	add	r3, r3, fp
+	str	r3, [sp, #48]
 	.loc 1 272 0
-	cbz	r3, .L35
+	ldr	r3, [sp, #16]
+	cbz	r3, .L30
 	.loc 1 273 0
 	ldr	r3, [sp, #12]
 	ldr	r2, [sp, #12]
 	.loc 1 274 0
-	ldr	r0, .L81
+	ldr	r0, .L72
 	.loc 1 273 0
 	ldrb	r3, [r3, #14]	@ zero_extendqisi2
 	bic	r3, r3, #1
 	strb	r3, [r2, #14]
 	.loc 1 274 0
 	bl	printf
-.LVL77:
-.L36:
-	.loc 1 329 0
-	ldr	r3, [sp, #8]
-	cbz	r3, .L80
+.LVL65:
+.L31:
+	.loc 1 327 0
+	cbz	r6, .L71
+	.loc 1 328 0
+	ldr	r3, [sp, #44]
 	.loc 1 330 0
-	ldr	r2, [sp, #8]
-	.loc 1 332 0
 	mov	r1, r5
-	.loc 1 330 0
-	ldr	r3, [sp, #44]
-	.loc 1 332 0
+	ldr	r2, .L72+4
 	mov	r0, r4
-	.loc 1 330 0
-	str	r3, [r2, #8]
-	.loc 1 331 0
+	.loc 1 328 0
+	str	r3, [r6, #8]
+	.loc 1 329 0
 	ldr	r3, [sp, #32]
-	str	r3, [r2, #32]
-	.loc 1 332 0
-	ldr	r2, .L81+4
+	str	r3, [r6, #32]
+	.loc 1 330 0
 	bl	fdt_getprop_u32
-.LVL78:
-	ldr	r3, [sp, #8]
-	str	r0, [r3, #12]
-.L80:
-	.loc 1 335 0
+.LVL66:
+	str	r0, [r6, #12]
+.L71:
+	.loc 1 333 0
 	movs	r0, #0
-.LVL79:
-.L21:
-	.loc 1 336 0
+.LVL67:
+.L16:
+	.loc 1 334 0
 	add	sp, sp, #56
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL80:
-.L23:
+.LVL68:
+.L18:
 	.cfi_restore_state
 	.loc 1 232 0
 	ldr	r3, [sp, #44]
-	b	.L79
-.LVL81:
-.L28:
-.LBB58:
-.LBB51:
+	b	.L70
+.LVL69:
+.L23:
+.LBB47:
+.LBB40:
 	.loc 1 160 0
-	ldr	r1, [r7, #8]
-	str	r3, [sp, #20]
+	ldr	r1, [r8, #8]
+	str	r3, [sp, #16]
 	bl	__aeabi_idivmod
-.LVL82:
-	ldr	r3, [sp, #20]
+.LVL70:
+	ldr	r3, [sp, #16]
 	mov	fp, r1
-	b	.L29
-.LVL83:
-.L32:
-.LBE51:
-.LBE58:
-.LBB59:
-.LBB57:
+	b	.L24
+.LVL71:
+.L27:
+.LBE40:
+.LBE47:
+.LBB48:
+.LBB46:
 	.loc 1 146 0
-	ldr	r1, [r7, #8]
+	ldr	r1, [r8, #8]
 	bl	__aeabi_idiv
-.LVL84:
-	b	.L33
-.LVL85:
-.L77:
-.LBE57:
-.LBE59:
+.LVL72:
+	b	.L28
+.LVL73:
+.L68:
+.LBE46:
+.LBE48:
 	.loc 1 285 0
 	ldr	r3, [sp, #52]
 	str	r3, [sp, #48]
-.LVL86:
-.L35:
+.LVL74:
+.L30:
 	.loc 1 289 0
 	ldrb	r3, [sp, #27]	@ zero_extendqisi2
-.LBB60:
-.LBB61:
+.LBB49:
+.LBB50:
 	.file 2 "include/image.h"
 	.loc 2 1005 0
 	movs	r2, #0
 	mov	r1, r5
 	mov	r0, r4
-.LBE61:
-.LBE60:
+.LBE50:
+.LBE49:
 	.loc 1 289 0
-	cmp	r3, #0
-	beq	.L37
-.LVL87:
+	cbz	r3, .L32
+.LVL75:
 	.loc 1 289 0 is_stmt 0 discriminator 1
 	cmp	r3, #6
-	beq	.L37
-.LVL88:
-.LBB64:
-.LBB62:
+	beq	.L32
+.LVL76:
+.LBB53:
+.LBB51:
 	.loc 2 1005 0 is_stmt 1
 	bl	fdt_get_name
-.LVL89:
-.LBE62:
-.LBE64:
-.LBB65:
-.LBB66:
-	.loc 1 143 0
-	ldr	r3, [r7, #12]
-.LBE66:
-.LBE65:
-.LBB69:
-.LBB63:
-	.loc 2 1005 0
-	mov	r8, r0
-.LVL90:
-.LBE63:
-.LBE69:
+.LVL77:
+.LBE51:
+.LBE53:
 	.loc 1 292 0
-	ldr	r0, [sp, #28]
-.LVL91:
-.LBB70:
-.LBB67:
-	.loc 1 143 0
-	cbz	r3, .L38
-	.loc 1 144 0
-	bic	r0, r0, #63
-.LVL92:
-.L39:
-.LBE67:
-.LBE70:
-	.loc 1 290 0
-	ldr	r3, [sp, #16]
-	.loc 1 293 0
+	movs	r3, #0
+.LBB54:
+.LBB52:
+	.loc 2 1005 0
+	mov	r7, r0
+.LVL78:
+.LBE52:
+.LBE54:
+	.loc 1 292 0
+	ldr	r2, .L72+8
 	mov	r1, r5
-	ldr	r2, .L81+8
-	.loc 1 290 0
-	ldr	fp, [sp, #44]
-	add	r3, r3, r0
-	.loc 1 293 0
 	mov	r0, r4
 	.loc 1 290 0
-	mov	r10, r3
-	.loc 1 293 0
-	movs	r3, #0
+	ldr	r10, [sp, #44]
+	.loc 1 292 0
 	bl	fdt_getprop
-.LVL93:
+.LVL79:
 	.loc 1 290 0
 	ldr	r3, [sp, #48]
+	mov	r1, r7
 	mov	r2, r10
-	mov	r1, r8
-	stm	sp, {r0, r3}
-	mov	r3, fp
-	ldr	r0, .L81+12
+	str	r3, [sp]
+	mov	r3, r0
+	ldr	r0, .L72+12
 	bl	printf
-.LVL94:
-.L40:
-	.loc 1 304 0
+.LVL80:
+.L33:
+	.loc 1 302 0
 	ldr	r3, [sp, #32]
 	mov	r1, r5
 	ldr	r2, [sp, #48]
 	mov	r0, r4
 	bl	fit_image_verify_with_data
-.LVL95:
-	cbz	r0, .L47
-	.loc 1 309 0
+.LVL81:
+	cbz	r0, .L38
+	.loc 1 307 0
 	add	r3, sp, #32
 	add	r2, sp, #44
 	mov	r1, r5
 	str	r3, [sp]
 	mov	r0, r4
 	add	r3, sp, #48
-	str	r7, [sp, #4]
+	str	r8, [sp, #4]
 	bl	board_fit_image_post_process
-.LVL96:
-	.loc 1 312 0
-	ldr	r0, .L81+16
+.LVL82:
+	.loc 1 310 0
+	ldr	r0, .L72+16
 	bl	puts
-.LVL97:
-	.loc 1 326 0
+.LVL83:
+	.loc 1 324 0
 	ldr	r2, [sp, #32]
 	ldr	r1, [sp, #48]
 	ldr	r0, [sp, #44]
 	bl	memcpy
-.LVL98:
-	b	.L36
-.LVL99:
-.L38:
-.LBB71:
-.LBB68:
-	.loc 1 146 0
-	ldr	r1, [r7, #8]
-	bl	__aeabi_idiv
-.LVL100:
-	b	.L39
-.LVL101:
-.L37:
-.LBE68:
-.LBE71:
-.LBB72:
-.LBB73:
+.LVL84:
+	b	.L31
+.LVL85:
+.L32:
+.LBB55:
+.LBB56:
 	.loc 2 1005 0
 	bl	fdt_get_name
-.LVL102:
-.LBE73:
-.LBE72:
-.LBB75:
-.LBB76:
-	.loc 1 143 0
-	ldr	r3, [r7, #12]
-.LBE76:
-.LBE75:
-.LBB79:
-.LBB74:
-	.loc 2 1005 0
-	mov	r8, r0
-.LVL103:
-.LBE74:
-.LBE79:
-	.loc 1 297 0
-	ldr	r0, [sp, #28]
-.LVL104:
-.LBB80:
-.LBB77:
-	.loc 1 143 0
-	cbz	r3, .L41
-	.loc 1 144 0
-	bic	r0, r0, #63
-.LVL105:
-.L42:
-.LBE77:
-.LBE80:
-	.loc 1 296 0
-	ldr	r2, [sp, #16]
-	mov	r1, r8
-	ldr	r3, [sp, #44]
-	add	r2, r2, r0
-	ldr	r0, .L81+20
+.LVL86:
+.LBE56:
+.LBE55:
+	.loc 1 295 0
+	ldr	r2, [sp, #44]
+	mov	r1, r0
+	ldr	r0, .L72+20
 	bl	printf
-.LVL106:
-	b	.L40
-.LVL107:
-.L41:
-.LBB81:
-.LBB78:
-	.loc 1 146 0
-	ldr	r1, [r7, #8]
-	bl	__aeabi_idiv
-.LVL108:
-	b	.L42
-.LVL109:
-.L46:
-.LBE78:
-.LBE81:
+.LVL87:
+	b	.L33
+.LVL88:
+.L37:
 	.loc 1 267 0
 	mvn	r0, #4
-	b	.L21
-.LVL110:
-.L47:
-	.loc 1 306 0
+	b	.L16
+.LVL89:
+.L38:
+	.loc 1 304 0
 	mov	r0, #-1
-	b	.L21
-.LVL111:
-.L26:
+	b	.L16
+.LVL90:
+.L21:
 	.loc 1 279 0
 	add	r3, sp, #32
 	add	r2, sp, #52
 	mov	r1, r5
 	mov	r0, r4
 	bl	fit_image_get_data
-.LVL112:
+.LVL91:
 	cmp	r0, #0
-	beq	.L77
+	beq	.L68
 	.loc 1 280 0
-	ldr	r0, .L81+24
+	ldr	r0, .L72+24
 	bl	puts
-.LVL113:
-.L49:
+.LVL92:
+.L40:
 	.loc 1 245 0
 	mvn	r0, #1
-.LVL114:
-	b	.L21
-.L82:
+.LVL93:
+	b	.L16
+.L73:
 	.align	2
-.L81:
+.L72:
 	.word	.LC7
 	.word	.LC13
 	.word	.LC9
@@ -847,11 +687,11 @@ spl_load_fit_image:
 	.type	spl_fit_append_fdt, %function
 spl_fit_append_fdt:
 .LFB218:
-	.loc 1 341 0
+	.loc 1 339 0
 	.cfi_startproc
 	@ args = 8, pretend = 0, frame = 48
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL115:
+.LVL94:
 	push	{r4, r5, r6, r7, lr}
 	.cfi_def_cfa_offset 20
 	.cfi_offset 4, -20
@@ -862,70 +702,155 @@ spl_fit_append_fdt:
 	mov	r5, r3
 	sub	sp, sp, #60
 	.cfi_def_cfa_offset 80
-	.loc 1 341 0
+	.loc 1 339 0
 	mov	r4, r0
 	mov	r6, r1
 	mov	r7, r2
-	.loc 1 346 0
+	.loc 1 344 0
 	movs	r3, #0
-.LVL116:
-	ldr	r2, .L85
-.LVL117:
+.LVL95:
+	ldr	r2, .L76
+.LVL96:
 	ldr	r1, [sp, #80]
-.LVL118:
+.LVL97:
 	mov	r0, r5
-.LVL119:
+.LVL98:
 	bl	spl_fit_get_image_node
-.LVL120:
-	.loc 1 347 0
+.LVL99:
+	.loc 1 345 0
 	cmp	r0, #0
-	blt	.L83
-	.loc 1 356 0
+	blt	.L74
+	.loc 1 354 0
 	ldr	r2, [r4, #32]
-	.loc 1 357 0
+	.loc 1 355 0
 	mov	r1, r7
-	.loc 1 356 0
+	.loc 1 354 0
 	ldr	r3, [r4, #8]
 	add	r3, r3, r2
-	.loc 1 357 0
+	.loc 1 355 0
 	mov	r2, r5
-	.loc 1 356 0
+	.loc 1 354 0
 	str	r3, [sp, #20]
-	.loc 1 357 0
+	.loc 1 355 0
 	add	r3, sp, #12
 	stm	sp, {r0, r3}
 	mov	r0, r6
-.LVL121:
+.LVL100:
 	ldr	r3, [sp, #84]
 	bl	spl_load_fit_image
-.LVL122:
-	.loc 1 360 0
+.LVL101:
+	.loc 1 358 0
 	cmp	r0, #0
-	blt	.L83
-	.loc 1 364 0
+	blt	.L74
+	.loc 1 362 0
 	ldr	r0, [sp, #20]
-.LVL123:
-	.loc 1 367 0
+.LVL102:
+	.loc 1 365 0
 	mov	r1, #8192
-	.loc 1 364 0
+	.loc 1 362 0
 	str	r0, [r4, #20]
-	.loc 1 367 0
+	.loc 1 365 0
 	bl	fdt_shrink_to_minimum
-.LVL124:
-.L83:
-	.loc 1 371 0
+.LVL103:
+.L74:
+	.loc 1 369 0
 	add	sp, sp, #60
 	.cfi_def_cfa_offset 20
 	@ sp needed
 	pop	{r4, r5, r6, r7, pc}
-.LVL125:
-.L86:
+.LVL104:
+.L77:
 	.align	2
-.L85:
+.L76:
 	.word	.LC0
 	.cfi_endproc
 .LFE218:
 	.size	spl_fit_append_fdt, .-spl_fit_append_fdt
+	.section	.text.spl_fit_load_blob,"ax",%progbits
+	.align	1
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	spl_fit_load_blob, %function
+spl_fit_load_blob:
+.LFB222:
+	.loc 1 411 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL105:
+	ldr	r2, [r2, #4]
+.LVL106:
+	push	{r3, r4, r5, r6, r7, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 3, -24
+	.cfi_offset 4, -20
+	.cfi_offset 5, -16
+	.cfi_offset 6, -12
+	.cfi_offset 7, -8
+	.cfi_offset 14, -4
+	.loc 1 411 0
+	mov	r4, r0
+	mov	r5, r1
+	rev	r2, r2
+.LVL107:
+	.loc 1 424 0
+	addw	r2, r2, #511
+.LVL108:
+	.loc 1 425 0
+	bic	r0, r2, #510
+.LVL109:
+	bic	r0, r0, #1
+	str	r0, [r3]
+	.loc 1 444 0
+	ldr	r3, .L81
+.LVL110:
+	ldr	r1, [r4, #8]
+.LVL111:
+	subs	r3, r3, r1
+	subs	r3, r3, r0
+	.loc 1 445 0
+	bic	r6, r3, #63
+.LVL112:
+.LBB63:
+.LBB64:
+	.loc 1 168 0
+	ldr	r3, [r4, #12]
+	cbnz	r3, .L79
+	.loc 1 171 0
+	add	r0, r0, r1
+.LVL113:
+	subs	r0, r0, #1
+	bl	__aeabi_idiv
+.LVL114:
+.L79:
+.LBE64:
+.LBE63:
+	.loc 1 447 0
+	mov	r2, r0
+	ldr	r7, [r4, #16]
+	mov	r3, r6
+	mov	r1, r5
+	mov	r0, r4
+	blx	r7
+.LVL115:
+	.loc 1 450 0
+	cmp	r0, #0
+	.loc 1 454 0
+	ite	ne
+	movne	r0, r6
+.LVL116:
+	moveq	r0, #0
+	pop	{r3, r4, r5, r6, r7, pc}
+.LVL117:
+.L82:
+	.align	2
+.L81:
+	.word	6291393
+	.cfi_endproc
+.LFE222:
+	.size	spl_fit_load_blob, .-spl_fit_load_blob
 	.section	.text.fit_config_verify,"ax",%progbits
 	.align	1
 	.weak	fit_config_verify
@@ -941,58 +866,60 @@ fit_config_verify:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL126:
+.LVL118:
 	.loc 1 26 0
 	movs	r0, #0
-.LVL127:
+.LVL119:
 	bx	lr
 	.cfi_endproc
 .LFE207:
 	.size	fit_config_verify, .-fit_config_verify
-	.section	.text.misc_decompress_int_en,"ax",%progbits
+	.section	.text.mtd_part_parse,"ax",%progbits
 	.align	1
-	.weak	misc_decompress_int_en
+	.weak	mtd_part_parse
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	misc_decompress_int_en, %function
-misc_decompress_int_en:
+	.type	mtd_part_parse, %function
+mtd_part_parse:
 .LFB208:
 	.loc 1 29 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL120:
 	.loc 1 31 0
 	movs	r0, #0
+.LVL121:
 	bx	lr
 	.cfi_endproc
 .LFE208:
-	.size	misc_decompress_int_en, .-misc_decompress_int_en
-	.section	.text.mtd_part_parse,"ax",%progbits
+	.size	mtd_part_parse, .-mtd_part_parse
+	.section	.text.spl_get_current_slot,"ax",%progbits
 	.align	1
-	.weak	mtd_part_parse
+	.weak	spl_get_current_slot
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	mtd_part_parse, %function
-mtd_part_parse:
+	.type	spl_get_current_slot, %function
+spl_get_current_slot:
 .LFB209:
 	.loc 1 34 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL128:
+.LVL122:
 	.loc 1 36 0
-	movs	r0, #0
-.LVL129:
+	mov	r0, #-1
+.LVL123:
 	bx	lr
 	.cfi_endproc
 .LFE209:
-	.size	mtd_part_parse, .-mtd_part_parse
+	.size	spl_get_current_slot, .-spl_get_current_slot
 	.section	.text.fdt_bootargs_append_ab,"ax",%progbits
 	.align	1
 	.weak	fdt_bootargs_append_ab
@@ -1007,7 +934,7 @@ fdt_bootargs_append_ab:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	movs	r0, #0
+	mov	r0, #-1
 	bx	lr
 	.cfi_endproc
 .LFE229:
@@ -1027,10 +954,10 @@ fdt_bootargs_append:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL130:
+.LVL124:
 	.loc 1 46 0
-	movs	r0, #0
-.LVL131:
+	mov	r0, #-1
+.LVL125:
 	bx	lr
 	.cfi_endproc
 .LFE211:
@@ -1045,15 +972,15 @@ fdt_bootargs_append:
 	.type	spl_fit_standalone_release, %function
 spl_fit_standalone_release:
 .LFB221:
-	.loc 1 406 0
+	.loc 1 404 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL132:
-	.loc 1 408 0
+.LVL126:
+	.loc 1 406 0
 	movs	r0, #0
-.LVL133:
+.LVL127:
 	bx	lr
 	.cfi_endproc
 .LFE221:
@@ -1068,19 +995,19 @@ spl_fit_standalone_release:
 	.type	spl_kernel_partition, %function
 spl_kernel_partition:
 .LFB223:
-	.loc 1 462 0
+	.loc 1 460 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL134:
-	.loc 1 464 0
-	ldr	r0, .L94
-.LVL135:
+.LVL128:
+	.loc 1 462 0
+	ldr	r0, .L90
+.LVL129:
 	bx	lr
-.L95:
+.L91:
 	.align	2
-.L94:
+.L90:
 	.word	.LC14
 	.cfi_endproc
 .LFE223:
@@ -1095,11 +1022,11 @@ spl_kernel_partition:
 	.type	spl_load_simple_fit, %function
 spl_load_simple_fit:
 .LFB226:
-	.loc 1 804 0
+	.loc 1 798 0
 	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 248
+	@ args = 0, pretend = 0, frame = 256
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL136:
+.LVL130:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
 	.cfi_offset 4, -32
@@ -1110,225 +1037,225 @@ spl_load_simple_fit:
 	.cfi_offset 10, -12
 	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	sub	sp, sp, #264
-	.cfi_def_cfa_offset 296
+	sub	sp, sp, #272
+	.cfi_def_cfa_offset 304
 	add	r7, sp, #16
-	.cfi_def_cfa 7, 280
-.LVL137:
-	.loc 1 804 0
+	.cfi_def_cfa 7, 288
+.LVL131:
+	.loc 1 798 0
 	mov	r6, r1
 	mov	r4, r0
 	str	r2, [r7, #28]
-.LVL138:
+.LVL132:
 	mov	r2, r3
-.LVL139:
+.LVL133:
 	ldr	r3, [r3]
-.LVL140:
-	.loc 1 820 0
-	ldr	r1, .L162
-.LVL141:
+.LVL134:
+	.loc 1 814 0
+	ldr	r1, .L157
+.LVL135:
 	rev	r3, r3
-.LVL142:
+.LVL136:
 	cmp	r3, r1
 	str	r1, [r7]
-	beq	.L97
-	.loc 1 821 0
-	ldr	r0, .L162+4
-.LVL143:
-.L161:
-.LBB102:
-.LBB103:
-	.loc 1 639 0
+	beq	.L93
+	.loc 1 815 0
+	ldr	r0, .L157+4
+.LVL137:
+.L156:
+.LBB86:
+.LBB87:
+	.loc 1 633 0
 	bl	printf
-.LVL144:
-	.loc 1 640 0
+.LVL138:
+	.loc 1 634 0
 	mvn	r0, #21
-.LVL145:
-.L96:
-.LBE103:
-.LBE102:
-	.loc 1 836 0
-	adds	r7, r7, #248
+.LVL139:
+.L92:
+.LBE87:
+.LBE86:
+	.loc 1 830 0
+	add	r7, r7, #256
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	mov	sp, r7
 	.cfi_def_cfa_register 13
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL146:
-.L97:
+.LVL140:
+.L93:
 	.cfi_restore_state
-.LBB113:
-.LBB111:
-	.loc 1 613 0
-	add	r3, r7, #36
+.LBB97:
+.LBB95:
+	.loc 1 607 0
+	add	r3, r7, #44
 	ldr	r1, [r7, #28]
 	mov	r0, r6
-.LVL147:
+.LVL141:
 	bl	spl_fit_load_blob
-.LVL148:
-	.loc 1 614 0
+.LVL142:
+	.loc 1 608 0
 	mov	r5, r0
 	cmp	r0, #0
-	beq	.L99
-	.loc 1 620 0
-	ldr	r1, .L162+8
+	beq	.L95
+	.loc 1 614 0
+	ldr	r1, .L157+8
 	bl	fdt_path_offset
-.LVL149:
-	.loc 1 621 0
+.LVL143:
+	.loc 1 615 0
 	subs	r10, r0, #0
-	blt	.L99
-	.loc 1 627 0
+	blt	.L95
+	.loc 1 621 0
 	bl	fit_board_verify_required_sigs
-.LVL150:
-	.loc 1 637 0
+.LVL144:
+	.loc 1 631 0
 	movs	r1, #0
 	mov	r0, r5
 	bl	fit_conf_get_node
-.LVL151:
-	.loc 1 638 0
+.LVL145:
+	.loc 1 632 0
 	subs	r1, r0, #0
-	bgt	.L100
-	.loc 1 639 0
-	ldr	r0, .L162+12
-.LVL152:
-	b	.L161
-.LVL153:
-.L100:
-	.loc 1 643 0
+	bgt	.L96
+	.loc 1 633 0
+	ldr	r0, .L157+12
+.LVL146:
+	b	.L156
+.LVL147:
+.L96:
+	.loc 1 637 0
 	mov	r0, r5
-.LVL154:
+.LVL148:
 	bl	fit_config_verify
-.LVL155:
-	.loc 1 644 0
+.LVL149:
+	.loc 1 638 0
 	mov	r8, r0
-	cbz	r0, .L102
-	.loc 1 645 0
+	cbz	r0, .L98
+	.loc 1 639 0
 	mov	r1, r0
-	ldr	r0, .L162+16
-.LVL156:
+	ldr	r0, .L157+16
+.LVL150:
 	bl	printf
-.LVL157:
+.LVL151:
 	mov	r0, r8
-	b	.L96
-.L102:
-	.loc 1 648 0
-	ldr	r0, .L162+20
+	b	.L92
+.L98:
+	.loc 1 642 0
+	ldr	r0, .L157+20
 	bl	printf
-.LVL158:
-	.loc 1 676 0
+.LVL152:
+	.loc 1 670 0
 	mov	r3, r8
-	ldr	r2, .L162+24
+	ldr	r2, .L157+24
 	mov	r1, r10
 	mov	r0, r5
 	bl	spl_fit_get_image_node
-.LVL159:
-	.loc 1 678 0
+.LVL153:
+	.loc 1 672 0
 	subs	fp, r0, #0
-	ble	.L103
-	.loc 1 680 0
-	add	r3, r7, #92
+	ble	.L99
+	.loc 1 674 0
+	add	r3, r7, #100
 	str	fp, [sp]
 	str	r3, [sp, #4]
 	mov	r2, r5
-	ldr	r3, [r7, #36]
+	ldr	r3, [r7, #44]
 	mov	r0, r6
-.LVL160:
+.LVL154:
 	ldr	r1, [r7, #28]
 	bl	spl_load_fit_image
-.LVL161:
-	.loc 1 682 0
-	cbnz	r0, .L105
-	.loc 1 683 0
-	ldr	r3, [r7, #104]
+.LVL155:
+	.loc 1 676 0
+	cbnz	r0, .L101
+	.loc 1 677 0
+	ldr	r3, [r7, #112]
 	adds	r3, r3, #1
-	.loc 1 684 0
+	.loc 1 678 0
 	itt	eq
-	ldreq	r3, [r7, #100]
-	streq	r3, [r7, #104]
-	.loc 1 686 0
-	ldr	r0, [r7, #104]
-.LVL162:
+	ldreq	r3, [r7, #108]
+	streq	r3, [r7, #112]
+	.loc 1 680 0
+	ldr	r0, [r7, #112]
+.LVL156:
 	bl	spl_fit_standalone_release
-.LVL163:
-	.loc 1 687 0
+.LVL157:
+	.loc 1 681 0
 	mov	r1, r0
-	cbz	r0, .L105
-	.loc 1 688 0
-	ldr	r0, .L162+28
-.LVL164:
+	cbz	r0, .L101
+	.loc 1 682 0
+	ldr	r0, .L157+28
+.LVL158:
 	bl	printf
-.LVL165:
-.L105:
-	.loc 1 703 0
+.LVL159:
+.L101:
+	.loc 1 697 0
 	movs	r3, #0
-	ldr	r2, .L162+32
+	ldr	r2, .L157+32
 	mov	r1, r10
 	mov	r0, r5
 	bl	spl_fit_get_image_node
-.LVL166:
-	.loc 1 709 0
+.LVL160:
+	.loc 1 703 0
 	subs	fp, r0, #0
-	bge	.L108
-	.loc 1 711 0
+	bge	.L104
+	.loc 1 705 0
 	movs	r3, #0
-	ldr	r2, .L162+36
+	ldr	r2, .L157+36
 	mov	r1, r10
 	mov	r0, r5
-.LVL167:
+.LVL161:
 	bl	spl_fit_get_image_node
-.LVL168:
-	.loc 1 718 0
+.LVL162:
+	.loc 1 712 0
 	subs	fp, r0, #0
-	blt	.L99
-	.loc 1 716 0
+	blt	.L95
+	.loc 1 710 0
 	mov	r8, #1
-	b	.L108
-.LVL169:
-.L103:
-	.loc 1 702 0
-	bne	.L105
+	b	.L104
+.LVL163:
+.L99:
+	.loc 1 696 0
+	bne	.L101
 	mov	r8, fp
-.LVL170:
-.L108:
-	.loc 1 725 0
+.LVL164:
+.L104:
+	.loc 1 719 0
 	str	r4, [sp, #4]
 	mov	r2, r5
 	str	fp, [sp]
 	mov	r0, r6
-.LVL171:
-	ldr	r3, [r7, #36]
+.LVL165:
+	ldr	r3, [r7, #44]
 	ldr	r1, [r7, #28]
 	bl	spl_load_fit_image
-.LVL172:
-	.loc 1 727 0
+.LVL166:
+	.loc 1 721 0
 	cmp	r0, #0
-	bne	.L96
-.LVL173:
-.LBB104:
-.LBB105:
-	.loc 1 401 0
+	bne	.L92
+.LVL167:
+.LBB88:
+.LBB89:
+	.loc 1 399 0
 	adds	r2, r4, #4
-.LVL174:
+.LVL168:
 	mov	r1, fp
 	mov	r0, r5
-.LVL175:
+.LVL169:
 	bl	fit_image_get_os
-.LVL176:
-.LBE105:
-.LBE104:
-	.loc 1 734 0
-	cbz	r0, .L109
-	.loc 1 738 0
+.LVL170:
+.LBE89:
+.LBE88:
+	.loc 1 728 0
+	cbz	r0, .L105
+	.loc 1 732 0
 	movs	r3, #17
 	strb	r3, [r4, #4]
-.L109:
-	.loc 1 745 0
+.L105:
+	.loc 1 739 0
 	ldrb	r3, [r4, #4]	@ zero_extendqisi2
 	cmp	r3, #17
-	bne	.L117
-	.loc 1 746 0
-	ldr	r3, [r7, #36]
+	bne	.L113
+	.loc 1 740 0
+	ldr	r3, [r7, #44]
 	mov	r1, r6
 	str	r10, [sp]
 	mov	r0, r4
@@ -1336,152 +1263,152 @@ spl_load_simple_fit:
 	mov	r3, r5
 	ldr	r2, [r7, #28]
 	bl	spl_fit_append_fdt
-.LVL177:
-.L117:
-.LBB106:
-	.loc 1 751 0
+.LVL171:
+.L113:
+.LBB90:
+	.loc 1 745 0
 	movs	r3, #0
-	.loc 1 753 0
-	ldr	r2, .L162+36
-	.loc 1 751 0
-	strb	r3, [r7, #32]
-	.loc 1 753 0
+	.loc 1 747 0
+	ldr	r2, .L157+36
+	.loc 1 745 0
+	strb	r3, [r7, #40]
+	.loc 1 747 0
 	mov	r1, r10
 	mov	r3, r8
 	mov	r0, r5
 	bl	spl_fit_get_image_node
-.LVL178:
-	.loc 1 754 0
+.LVL172:
+	.loc 1 748 0
 	subs	r3, r0, #0
-	blt	.L111
-.LVL179:
-.LBB107:
-.LBB108:
-	.loc 1 401 0
-	add	r2, r7, #32
-.LVL180:
+	blt	.L107
+.LVL173:
+.LBB91:
+.LBB92:
+	.loc 1 399 0
+	add	r2, r7, #40
+.LVL174:
 	mov	r1, r3
 	mov	r0, r5
-.LVL181:
+.LVL175:
 	str	r3, [r7, #24]
 	bl	fit_image_get_os
-.LVL182:
-.LBE108:
-.LBE107:
-	.loc 1 761 0
+.LVL176:
+.LBE92:
+.LBE91:
+	.loc 1 755 0
 	ldr	r2, [r4, #28]
 	ldr	r3, [r7, #24]
 	cmp	r2, #2
-	bne	.L112
-	ldrb	r2, [r7, #32]	@ zero_extendqisi2
+	bne	.L108
+	ldrb	r2, [r7, #40]	@ zero_extendqisi2
 	cmp	r2, #17
-	beq	.L120
-.L112:
-	.loc 1 765 0
-	add	fp, r7, #92
+	beq	.L116
+.L108:
+	.loc 1 759 0
+	add	fp, r7, #100
 	mov	r2, r5
 	stm	sp, {r3, fp}
 	mov	r0, r6
-	ldr	r3, [r7, #36]
+	ldr	r3, [r7, #44]
 	ldr	r1, [r7, #28]
 	bl	spl_load_fit_image
-.LVL183:
-	.loc 1 767 0
+.LVL177:
+	.loc 1 761 0
 	cmp	r0, #0
-	blt	.L120
-	.loc 1 770 0
-	ldrb	r3, [r7, #32]	@ zero_extendqisi2
+	blt	.L116
+	.loc 1 764 0
+	ldrb	r3, [r7, #40]	@ zero_extendqisi2
 	cmp	r3, #17
-	bne	.L114
-	.loc 1 771 0
-	ldr	r3, [r7, #36]
+	bne	.L110
+	.loc 1 765 0
+	ldr	r3, [r7, #44]
 	mov	r1, r6
 	str	r10, [sp]
 	mov	r0, fp
-.LVL184:
+.LVL178:
 	str	r3, [sp, #4]
 	mov	r3, r5
 	ldr	r2, [r7, #28]
 	bl	spl_fit_append_fdt
-.LVL185:
-	.loc 1 773 0
-	ldr	r3, [r7, #112]
+.LVL179:
+	.loc 1 767 0
+	ldr	r3, [r7, #120]
 	str	r3, [r4, #20]
-.L114:
-	.loc 1 780 0
+.L110:
+	.loc 1 774 0
 	ldr	r3, [r4, #12]
 	adds	r3, r3, #1
-	bne	.L115
-	.loc 1 781 0
-	ldr	r3, [r7, #104]
-	.loc 1 780 0
+	bne	.L111
+	.loc 1 775 0
+	ldr	r3, [r7, #112]
+	.loc 1 774 0
 	adds	r2, r3, #1
-	.loc 1 782 0
+	.loc 1 776 0
 	it	ne
 	strne	r3, [r4, #12]
-.L115:
-	.loc 1 785 0
+.L111:
+	.loc 1 779 0
 	ldr	r3, [r4, #20]
 	str	r3, [r7, #24]
-.LVL186:
+.LVL180:
 	cmp	r3, #0
-	beq	.L120
-.LVL187:
-.LBB109:
-.LBB110:
-	.loc 1 381 0
-	add	r3, r7, #48
-.LVL188:
+	beq	.L116
+.LVL181:
+.LBB93:
+.LBB94:
+	.loc 1 379 0
+	add	r3, r7, #56
+.LVL182:
 	mov	r2, r8
-	ldr	r1, .L162+36
+	ldr	r1, .L157+36
 	mov	r0, r5
 	bl	spl_fit_get_image_name.isra.0
-.LVL189:
-	.loc 1 383 0
+.LVL183:
+	.loc 1 381 0
 	cmp	r0, #0
-	blt	.L120
-	.loc 1 386 0
+	blt	.L116
+	.loc 1 384 0
 	mov	r3, r8
-	ldr	r2, .L162+36
+	ldr	r2, .L157+36
 	mov	r1, r10
 	mov	r0, r5
-.LVL190:
+.LVL184:
 	bl	spl_fit_get_image_node
-.LVL191:
+.LVL185:
+	.loc 1 386 0
+	ldr	r3, [r7, #56]
 	.loc 1 388 0
-	ldr	r3, [r7, #48]
-	.loc 1 390 0
 	mov	r1, r0
-	.loc 1 386 0
+	.loc 1 384 0
 	mov	fp, r0
-.LVL192:
-	.loc 1 390 0
-	ldr	r2, .L162+40
-	mov	r0, r5
-.LVL193:
+.LVL186:
 	.loc 1 388 0
+	ldr	r2, .L157+40
+	mov	r0, r5
+.LVL187:
+	.loc 1 386 0
 	str	r3, [r7, #20]
-	ldr	r3, [r7, #100]
+	ldr	r3, [r7, #108]
 	str	r3, [r7, #16]
-	ldr	r3, [r7, #124]
+	ldr	r3, [r7, #132]
 	str	r3, [r7, #12]
-	ldr	r3, [r7, #104]
+	ldr	r3, [r7, #112]
 	str	r3, [r7, #8]
-	.loc 1 390 0
+	.loc 1 388 0
 	movs	r3, #0
 	bl	fdt_getprop
-.LVL194:
-	.loc 1 391 0
+.LVL188:
+	.loc 1 389 0
 	movs	r3, #0
-	.loc 1 390 0
+	.loc 1 388 0
 	str	r0, [r7, #4]
-	.loc 1 391 0
-	ldr	r2, .L162+44
+	.loc 1 389 0
+	ldr	r2, .L157+44
 	mov	r1, fp
 	mov	r0, r5
 	bl	fdt_getprop
-.LVL195:
-	.loc 1 388 0
+.LVL189:
+	.loc 1 386 0
 	str	r0, [sp, #12]
 	mov	r1, r8
 	ldr	r3, [r7, #4]
@@ -1494,170 +1421,173 @@ spl_load_simple_fit:
 	ldr	r2, [r7, #20]
 	ldr	r0, [r7, #24]
 	bl	fdt_record_loadable
-.LVL196:
-.L120:
-.LBE110:
-.LBE109:
-.LBE106:
-	.loc 1 750 0
+.LVL190:
+.L116:
+.LBE94:
+.LBE93:
+.LBE90:
+	.loc 1 744 0
 	add	r8, r8, #1
-.LVL197:
-	b	.L117
-.LVL198:
-.L111:
-	.loc 1 796 0
+.LVL191:
+	b	.L113
+.LVL192:
+.L107:
+	.loc 1 790 0
 	ldr	r3, [r4, #12]
 	subs	r3, r3, #1
 	adds	r3, r3, #3
-	bls	.L119
-	.loc 1 797 0
+	bls	.L115
+	.loc 1 791 0
 	ldr	r3, [r4, #8]
 	str	r3, [r4, #12]
-.L119:
-.LVL199:
-.LBE111:
-.LBE113:
-.LBB114:
-.LBB115:
-	.loc 1 479 0
-	ldr	r3, .L162+48
-	.loc 1 469 0
-	str	sp, [r7, #16]
-	.loc 1 479 0
+.L115:
+.LVL193:
+.LBE95:
+.LBE97:
+.LBB98:
+.LBB99:
+	.loc 1 477 0
+	ldr	r3, .L157+48
+	.loc 1 467 0
+	str	sp, [r7, #20]
+	.loc 1 477 0
 	ldm	r3, {r0, r1, r2}
-	add	r3, r7, #36
+	add	r3, r7, #44
 	stm	r3, {r0, r1, r2}
-.LVL200:
-	.loc 1 481 0
+.LVL194:
+	.loc 1 479 0
 	ldr	r3, [r6, #8]
 	adds	r3, r3, #7
 	bic	r3, r3, #7
 	sub	sp, sp, r3
-.LVL201:
-	.loc 1 488 0
+.LVL195:
+	.loc 1 486 0
 	ldr	r3, [r4, #28]
-	.loc 1 481 0
+	.loc 1 479 0
 	add	r8, sp, #16
-.LVL202:
-	.loc 1 488 0
+.LVL196:
+	.loc 1 486 0
 	cmp	r3, #2
-	bne	.L134
-.LVL203:
-	.loc 1 495 0
+	bne	.L129
+.LVL197:
+	.loc 1 493 0
 	mov	r1, r6
 	mov	r0, r4
 	bl	spl_kernel_partition
-.LVL204:
-	.loc 1 496 0
-	add	r2, r7, #92
+.LVL198:
+	.loc 1 494 0
+	add	r2, r7, #100
 	mov	r1, r0
 	ldr	r0, [r6]
-.LVL205:
+.LVL199:
 	bl	part_get_info_by_name
-.LVL206:
+.LVL200:
 	cmp	r0, #0
-	bgt	.L121
-	.loc 1 497 0
-	ldr	r1, .L162+52
-	ldr	r0, .L162+56
-.L159:
-	.loc 1 510 0
+	bgt	.L117
+	.loc 1 495 0
+	ldr	r1, .L157+52
+	ldr	r0, .L157+56
+.LVL201:
+.L154:
+	.loc 1 508 0
 	bl	printf
-.LVL207:
-.L160:
-	.loc 1 511 0
-	mvn	fp, #21
-.LVL208:
-.L122:
-.LBE115:
-.LBE114:
-	.loc 1 831 0
-	mov	r0, fp
-.LBB120:
-.LBB118:
-	ldr	sp, [r7, #16]
-.LVL209:
-.LBE118:
-.LBE120:
-	b	.L96
-.LVL210:
-.L121:
-.LBB121:
-.LBB119:
-	.loc 1 500 0
-	ldr	r3, [r7, #92]
-	.loc 1 504 0
+.LVL202:
+.L155:
+	.loc 1 509 0
+	mvn	r3, #21
+.L118:
+.LBE99:
+.LBE98:
+	.loc 1 825 0
+	mov	r0, r3
+.LBB105:
+.LBB103:
+	ldr	sp, [r7, #20]
+.LVL203:
+.LBE103:
+.LBE105:
+	b	.L92
+.LVL204:
+.L117:
+.LBB106:
+.LBB104:
+	.loc 1 498 0
+	ldr	r3, [r7, #100]
+	.loc 1 502 0
 	movs	r2, #1
 	ldr	r5, [r6, #16]
 	mov	r0, r6
-	.loc 1 500 0
-	str	r3, [r7, #24]
-.LVL211:
-	.loc 1 504 0
+	.loc 1 498 0
+	str	r3, [r7, #28]
+.LVL205:
+	.loc 1 502 0
 	mov	r3, r8
-.LVL212:
-	ldr	r1, [r7, #24]
+.LVL206:
+	ldr	r1, [r7, #28]
 	blx	r5
-.LVL213:
+.LVL207:
 	cmp	r0, #1
-	bne	.L136
-.LVL214:
+	bne	.L131
+.LVL208:
 	ldr	r3, [r8]
-	.loc 1 509 0
+	.loc 1 507 0
 	ldr	r2, [r7]
 	rev	r3, r3
-.LVL215:
+.LVL209:
 	cmp	r3, r2
-	beq	.L123
-	.loc 1 510 0
-	ldr	r1, .L162+52
-	ldr	r0, .L162+60
-	b	.L159
-.L123:
-	.loc 1 514 0
-	add	r3, r7, #32
+	beq	.L119
+	.loc 1 508 0
+	ldr	r1, .L157+52
+	ldr	r0, .L157+60
+	b	.L154
+.L119:
+	.loc 1 512 0
 	mov	r2, r8
-	ldr	r1, [r7, #24]
+	add	r3, r7, #40
+	ldr	r1, [r7, #28]
 	mov	r0, r6
 	bl	spl_fit_load_blob
-.LVL216:
-	.loc 1 515 0
-	mov	r5, r0
-	cmp	r0, #0
-	beq	.L137
-	.loc 1 524 0
+.LVL210:
+	.loc 1 513 0
+	mov	r8, r0
+.LVL211:
+	cmp	r0, #0
+	beq	.L132
+	.loc 1 522 0
 	movs	r1, #0
 	bl	fit_conf_get_node
-.LVL217:
-	.loc 1 525 0
+.LVL212:
+	.loc 1 523 0
 	subs	r1, r0, #0
-	bgt	.L124
-	.loc 1 526 0
-	ldr	r0, .L162+12
-.LVL218:
+	bgt	.L120
+	.loc 1 524 0
+	ldr	r0, .L157+12
+.LVL213:
 	bl	printf
-.LVL219:
-	b	.L160
-.LVL220:
-.L124:
-	.loc 1 530 0
-	mov	r0, r5
-.LVL221:
+.LVL214:
+	b	.L155
+.LVL215:
+.L120:
+	.loc 1 528 0
+	mov	r0, r8
+.LVL216:
 	bl	fit_config_verify
-.LVL222:
-	.loc 1 531 0
-	mov	fp, r0
-	cbz	r0, .L125
-	.loc 1 532 0
+.LVL217:
+	.loc 1 529 0
+	cbz	r0, .L121
+	.loc 1 530 0
 	mov	r1, r0
-	ldr	r0, .L162+16
-.LVL223:
+	str	r0, [r7, #28]
+.LVL218:
+	ldr	r0, .L157+16
+.LVL219:
 	bl	printf
-.LVL224:
-	b	.L122
-.L163:
+.LVL220:
+	ldr	r3, [r7, #28]
+	b	.L118
+.L158:
 	.align	2
-.L162:
+.L157:
 	.word	-804389139
 	.word	.LC15
 	.word	.LC16
@@ -1674,184 +1604,177 @@ spl_load_simple_fit:
 	.word	.LANCHOR0
 	.word	.LC26
 	.word	.LC27
-.LVL225:
-.L125:
-	.loc 1 535 0
-	ldr	r0, .L164
-.LVL226:
+.LVL221:
+.L121:
+	str	r0, [r7, #16]
+	.loc 1 533 0
+	ldr	r0, .L159
+.LVL222:
 	bl	printf
-.LVL227:
-	.loc 1 537 0
-	ldr	r1, .L164+4
-	mov	r0, r5
+.LVL223:
+	.loc 1 535 0
+	ldr	r1, .L159+4
+	mov	r0, r8
 	bl	fdt_path_offset
-.LVL228:
-	.loc 1 538 0
+.LVL224:
+	.loc 1 536 0
 	subs	r3, r0, #0
-	str	r3, [r7, #20]
-	blt	.L138
-	str	fp, [r7, #28]
-.LVL229:
-.L133:
-.LBB116:
-	.loc 1 545 0
-	ldr	r3, [r7, #28]
-	mov	r0, r5
-	ldr	r1, [r7, #20]
-	mov	r2, r3
-	add	r3, r7, #36
-	ldr	r8, [r3, r2, lsl #2]
+	str	r3, [r7, #24]
+	blt	.L133
+	ldr	r3, [r7, #16]
+	mov	r5, r3
+.LVL225:
+.L128:
+.LBB100:
+	.loc 1 543 0
+	add	r3, r7, #44
+	ldr	r1, [r7, #24]
+	ldr	r10, [r3, r5, lsl #2]
+	mov	r0, r8
 	movs	r3, #0
-	mov	r2, r8
+	mov	r2, r10
 	bl	spl_fit_get_image_node
-.LVL230:
+.LVL226:
 	.loc 1 548 0
-	ldr	r10, [r6]
-	.loc 1 545 0
-	mov	fp, r0
+	cmp	r0, #0
+	blt	.L123
+	.loc 1 553 0
+	add	r3, r7, #56
+	.loc 1 546 0
+	ldr	fp, [r6]
+	.loc 1 553 0
+	mov	r2, r8
+	stm	sp, {r0, r3}
+	mov	r0, r6
+.LVL227:
+	ldr	r3, [r7, #40]
+	ldr	r1, [r7, #28]
+	bl	spl_load_fit_image
+.LVL228:
+	.loc 1 555 0
+	mov	r3, r0
+	cmp	r0, #0
+	bne	.L118
+	.loc 1 559 0
+	ldr	r1, .L159+8
+	mov	r0, r10
+.LVL229:
+	bl	strcmp
+.LVL230:
+	cbnz	r0, .L124
+.LBB101:
+	.loc 1 560 0
+	ldr	r3, [r7, #64]
+	.loc 1 564 0
+	add	r2, r7, #36
+	.loc 1 562 0
+	strh	r0, [r7, #36]	@ movhi
+	strb	r0, [r7, #38]
+	.loc 1 560 0
+	str	r3, [r4, #20]
+	.loc 1 564 0
+	ldr	r1, .L159+12
+	ldr	r0, [r6]
+	bl	spl_get_current_slot
 .LVL231:
-	.loc 1 550 0
-	ldr	r3, [r10, #4]
-	cmp	r3, #1
-	bne	.L127
-	ldr	r0, .L164+8
+	cbnz	r0, .L125
+	.loc 1 565 0
+	add	r1, r7, #36
+	ldr	r0, [r7, #64]
+	bl	fdt_bootargs_append_ab
 .LVL232:
-	bl	strlen
+.L125:
+	.loc 1 569 0
+	ldr	r3, [fp, #4]
+	cmp	r3, #1
+	bne	.L123
+	.loc 1 570 0
+	ldr	r10, [r7, #64]
+	mov	r0, fp
+	bl	mtd_part_parse
 .LVL233:
-	ldr	r1, .L164+8
-	mov	r2, r0
-	mov	r0, r8
-	bl	memcmp
+	mov	r1, r0
+	mov	r0, r10
+	bl	fdt_bootargs_append
 .LVL234:
-	cbnz	r0, .L127
-	.loc 1 551 0
-	bl	misc_decompress_int_en
+.L123:
+.LBE101:
+.LBE100:
+	.loc 1 542 0
+	adds	r5, r5, #1
 .LVL235:
-.L127:
-	.loc 1 554 0
-	cmp	fp, #0
-	blt	.L130
-	.loc 1 559 0
-	add	r3, r7, #48
-	str	fp, [sp]
+	cmp	r5, #3
+	bne	.L128
 .LVL236:
-	str	r3, [sp, #4]
-	mov	r2, r5
-	ldr	r3, [r7, #32]
-	mov	r0, r6
-	ldr	r1, [r7, #24]
-	bl	spl_load_fit_image
+.L129:
+	.loc 1 592 0
+	movs	r3, #0
+	b	.L118
 .LVL237:
-	.loc 1 561 0
-	mov	fp, r0
+.L124:
+.LBB102:
+	.loc 1 572 0
+	ldr	r1, .L159+16
+	mov	r0, r10
+	bl	strcmp
 .LVL238:
 	cmp	r0, #0
-	bne	.L122
-	.loc 1 565 0
-	ldr	r1, .L164+12
-	mov	r0, r8
+	bne	.L123
+	.loc 1 574 0
+	ldr	r3, [r7, #64]
+	str	r3, [r4, #16]
+	b	.L123
 .LVL239:
-	bl	strcmp
+.L131:
+.LBE102:
+	.loc 1 504 0
+	mvn	r3, #4
+	b	.L118
 .LVL240:
-	cbnz	r0, .L131
-	.loc 1 575 0
-	ldr	r3, [r10, #4]
-	.loc 1 566 0
-	ldr	r8, [r7, #56]
-	.loc 1 575 0
-	cmp	r3, #1
-	.loc 1 566 0
-	str	r8, [r4, #20]
-	.loc 1 575 0
-	bne	.L130
-	.loc 1 576 0
-	mov	r0, r10
-	bl	mtd_part_parse
+.L132:
+	.loc 1 515 0
+	mvn	r3, #18
+	b	.L118
 .LVL241:
-	mov	r1, r0
-	mov	r0, r8
-	bl	fdt_bootargs_append
+.L133:
+	.loc 1 536 0
+	ldr	r3, [r7, #24]
+	b	.L118
 .LVL242:
-.L130:
-.LBE116:
-	.loc 1 544 0
-	ldr	r3, [r7, #28]
-	adds	r3, r3, #1
-	cmp	r3, #3
-	str	r3, [r7, #28]
-.LVL243:
-	bne	.L133
-.LVL244:
-.L134:
-	.loc 1 598 0
-	mov	fp, #0
-	b	.L122
-.LVL245:
-.L131:
-.LBB117:
-	.loc 1 578 0
-	ldr	r1, .L164+16
-	mov	r0, r8
-	bl	strcmp
-.LVL246:
-	cmp	r0, #0
-	bne	.L130
-	.loc 1 580 0
-	ldr	r3, [r7, #56]
-	str	r3, [r4, #16]
-	b	.L130
-.LVL247:
-.L136:
-.LBE117:
-	.loc 1 506 0
-	mvn	fp, #4
-	b	.L122
-.LVL248:
-.L137:
-	.loc 1 517 0
-	mvn	fp, #18
-	b	.L122
-.LVL249:
-.L138:
-	.loc 1 538 0
-	ldr	fp, [r7, #20]
-.LVL250:
-	b	.L122
-.LVL251:
-.L99:
-.LBE119:
-.LBE121:
-.LBB122:
-.LBB112:
-	.loc 1 616 0
+.L95:
+.LBE104:
+.LBE106:
+.LBB107:
+.LBB96:
+	.loc 1 610 0
 	mov	r0, #-1
-.LVL252:
-	b	.L96
-.L165:
+.LVL243:
+	b	.L92
+.L160:
 	.align	2
-.L164:
+.L159:
 	.word	.LC19
 	.word	.LC16
-	.word	.LC2
 	.word	.LC0
+	.word	.LC28
 	.word	.LC1
-.LBE112:
-.LBE122:
+.LBE96:
+.LBE107:
 	.cfi_endproc
 .LFE226:
 	.size	spl_load_simple_fit, .-spl_load_simple_fit
 	.section	.rodata
 	.align	2
 	.set	.LANCHOR1,. + 0
-.LC28:
+.LC29:
 	.word	.LC0
 	.word	.LC1
 	.word	.LC2
-	.section	.rodata.__func__.9342,"a",%progbits
+	.section	.rodata.__func__.9344,"a",%progbits
 	.set	.LANCHOR0,. + 0
-	.type	__func__.9342, %object
-	.size	__func__.9342, 20
-__func__.9342:
+	.type	__func__.9344, %object
+	.size	__func__.9344, 20
+__func__.9344:
 	.ascii	"spl_load_kernel_fit\000"
 	.section	.rodata.spl_fit_get_image_name.isra.0.str1.1,"aMS",%progbits,1
 .LC4:
@@ -1871,11 +1794,9 @@ __func__.9342:
 .LC9:
 	.ascii	"compression\000"
 .LC10:
-	.ascii	"## Checking %s storage address 0x%08lx 0x%08lx (%s "
-	.ascii	"@0x%08lx) ... \000"
+	.ascii	"## Checking %s 0x%08lx (%s @0x%08lx) ... \000"
 .LC11:
-	.ascii	"## Checking %s storage address 0x%08lx excute addre"
-	.ascii	"ss 0x%08lx ... \000"
+	.ascii	"## Checking %s 0x%08lx ... \000"
 .LC12:
 	.ascii	"OK\012\000"
 .LC13:
@@ -1907,13 +1828,15 @@ __func__.9342:
 	.ascii	"%s: no partition\012\000"
 .LC27:
 	.ascii	"%s: Not fit magic\012\000"
+.LC28:
+	.ascii	"misc\000"
 	.section	.rodata.str1.1,"aMS",%progbits,1
 .LC0:
 	.ascii	"fdt\000"
-.LC2:
-	.ascii	"ramdisk\000"
 .LC1:
 	.ascii	"kernel\000"
+.LC2:
+	.ascii	"ramdisk\000"
 	.text
 .Letext0:
 	.file 3 "include/common.h"
@@ -1945,16 +1868,16 @@ __func__.9342:
 	.file 29 "include/stdio.h"
 	.section	.debug_info,"",%progbits
 .Ldebug_info0:
-	.4byte	0x2a25
+	.4byte	0x2a03
 	.2byte	0x4
 	.4byte	.Ldebug_abbrev0
 	.byte	0x4
 	.uleb128 0x1
-	.4byte	.LASF414
-	.byte	0xc
 	.4byte	.LASF415
+	.byte	0xc
 	.4byte	.LASF416
-	.4byte	.Ldebug_ranges0+0x108
+	.4byte	.LASF417
+	.4byte	.Ldebug_ranges0+0xb0
 	.4byte	0
 	.4byte	.Ldebug_line0
 	.uleb128 0x2
@@ -4107,9 +4030,9 @@ __func__.9342:
 	.byte	0x4
 	.4byte	0x10b6
 	.uleb128 0x2a
-	.4byte	.LASF342
+	.4byte	.LASF343
 	.byte	0x1
-	.2byte	0x322
+	.2byte	0x31c
 	.4byte	0x50
 	.4byte	.LFB226
 	.4byte	.LFE226-.LFB226
@@ -4119,66 +4042,66 @@ __func__.9342:
 	.uleb128 0x2b
 	.4byte	.LASF326
 	.byte	0x1
-	.2byte	0x322
+	.2byte	0x31c
 	.4byte	0x11b9
-	.4byte	.LLST66
+	.4byte	.LLST63
 	.uleb128 0x2b
 	.4byte	.LASF327
 	.byte	0x1
-	.2byte	0x323
+	.2byte	0x31d
 	.4byte	0x11ad
-	.4byte	.LLST67
+	.4byte	.LLST64
 	.uleb128 0x2b
 	.4byte	.LASF328
 	.byte	0x1
-	.2byte	0x323
+	.2byte	0x31d
 	.4byte	0x122
-	.4byte	.LLST68
+	.4byte	.LLST65
 	.uleb128 0x2c
 	.ascii	"fit\000"
 	.byte	0x1
-	.2byte	0x323
+	.2byte	0x31d
 	.4byte	0x153
-	.4byte	.LLST69
+	.4byte	.LLST66
 	.uleb128 0x2d
 	.4byte	.LASF329
 	.byte	0x1
-	.2byte	0x325
+	.2byte	0x31f
 	.4byte	0x122
-	.4byte	.LLST70
+	.4byte	.LLST67
 	.uleb128 0x2e
 	.ascii	"ret\000"
 	.byte	0x1
-	.2byte	0x326
+	.2byte	0x320
 	.4byte	0x50
-	.4byte	.LLST71
+	.4byte	.LLST68
 	.uleb128 0x2f
 	.ascii	"i\000"
 	.byte	0x1
-	.2byte	0x327
+	.2byte	0x321
 	.4byte	0x50
 	.byte	0
 	.uleb128 0x30
 	.4byte	0x1a03
-	.4byte	.LBB102
-	.4byte	.Ldebug_ranges0+0xb0
+	.4byte	.LBB86
+	.4byte	.Ldebug_ranges0+0x58
 	.byte	0x1
-	.2byte	0x339
+	.2byte	0x333
 	.4byte	0x1730
 	.uleb128 0x31
 	.4byte	0x1a38
-	.4byte	.LLST72
+	.4byte	.LLST69
 	.uleb128 0x31
 	.4byte	0x1a2c
-	.4byte	.LLST73
+	.4byte	.LLST70
 	.uleb128 0x31
 	.4byte	0x1a20
-	.4byte	.LLST74
+	.4byte	.LLST71
 	.uleb128 0x31
 	.4byte	0x1a14
-	.4byte	.LLST75
+	.4byte	.LLST72
 	.uleb128 0x32
-	.4byte	.Ldebug_ranges0+0xb0
+	.4byte	.Ldebug_ranges0+0x58
 	.uleb128 0x33
 	.4byte	0x1a44
 	.uleb128 0x3
@@ -4191,43 +4114,43 @@ __func__.9342:
 	.sleb128 -244
 	.uleb128 0x34
 	.4byte	0x1a5c
-	.4byte	.LLST76
+	.4byte	.LLST73
 	.uleb128 0x34
 	.4byte	0x1a68
-	.4byte	.LLST77
+	.4byte	.LLST74
 	.uleb128 0x34
 	.4byte	0x1a74
-	.4byte	.LLST78
+	.4byte	.LLST75
 	.uleb128 0x34
 	.4byte	0x1a80
-	.4byte	.LLST79
+	.4byte	.LLST76
 	.uleb128 0x34
 	.4byte	0x1a8c
-	.4byte	.LLST80
+	.4byte	.LLST77
 	.uleb128 0x34
 	.4byte	0x1aa5
-	.4byte	.LLST81
+	.4byte	.LLST78
 	.uleb128 0x35
 	.4byte	0x1a98
 	.uleb128 0x36
-	.4byte	0x1d41
-	.4byte	.LBB104
-	.4byte	.LBE104-.LBB104
+	.4byte	0x1d5f
+	.4byte	.LBB88
+	.4byte	.LBE88-.LBB88
 	.byte	0x1
-	.2byte	0x2de
+	.2byte	0x2d8
 	.4byte	0x131a
 	.uleb128 0x31
-	.4byte	0x1d6a
-	.4byte	.LLST82
+	.4byte	0x1d88
+	.4byte	.LLST79
 	.uleb128 0x31
-	.4byte	0x1d5e
-	.4byte	.LLST83
+	.4byte	0x1d7c
+	.4byte	.LLST80
 	.uleb128 0x31
-	.4byte	0x1d52
-	.4byte	.LLST84
+	.4byte	0x1d70
+	.4byte	.LLST81
 	.uleb128 0x37
-	.4byte	.LVL176
-	.4byte	0x28b3
+	.4byte	.LVL170
+	.4byte	0x28a7
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -4249,8 +4172,8 @@ __func__.9342:
 	.byte	0
 	.byte	0
 	.uleb128 0x39
-	.4byte	.LBB106
-	.4byte	.LBE106-.LBB106
+	.4byte	.LBB90
+	.4byte	.LBE90-.LBB90
 	.4byte	0x154f
 	.uleb128 0x33
 	.4byte	0x1ab2
@@ -4258,24 +4181,24 @@ __func__.9342:
 	.byte	0x91
 	.sleb128 -248
 	.uleb128 0x36
-	.4byte	0x1d41
-	.4byte	.LBB107
-	.4byte	.LBE107-.LBB107
+	.4byte	0x1d5f
+	.4byte	.LBB91
+	.4byte	.LBE91-.LBB91
 	.byte	0x1
-	.2byte	0x2f5
+	.2byte	0x2ef
 	.4byte	0x137f
 	.uleb128 0x31
-	.4byte	0x1d6a
-	.4byte	.LLST85
+	.4byte	0x1d88
+	.4byte	.LLST82
 	.uleb128 0x31
-	.4byte	0x1d5e
-	.4byte	.LLST86
+	.4byte	0x1d7c
+	.4byte	.LLST83
 	.uleb128 0x31
-	.4byte	0x1d52
-	.4byte	.LLST87
+	.4byte	0x1d70
+	.4byte	.LLST84
 	.uleb128 0x37
-	.4byte	.LVL182
-	.4byte	0x28b3
+	.4byte	.LVL176
+	.4byte	0x28a7
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -4294,47 +4217,47 @@ __func__.9342:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0x7d
-	.sleb128 104
+	.sleb128 112
 	.byte	0
 	.byte	0
 	.uleb128 0x36
-	.4byte	0x1d76
-	.4byte	.LBB109
-	.4byte	.LBE109-.LBB109
+	.4byte	0x1d94
+	.4byte	.LBB93
+	.4byte	.LBE93-.LBB93
 	.byte	0x1
-	.2byte	0x312
+	.2byte	0x30c
 	.4byte	0x14c8
 	.uleb128 0x31
-	.4byte	0x1db7
-	.4byte	.LLST88
+	.4byte	0x1dd5
+	.4byte	.LLST85
 	.uleb128 0x31
-	.4byte	0x1dab
-	.4byte	.LLST89
+	.4byte	0x1dc9
+	.4byte	.LLST86
 	.uleb128 0x31
-	.4byte	0x1d9f
-	.4byte	.LLST90
+	.4byte	0x1dbd
+	.4byte	.LLST87
 	.uleb128 0x3a
-	.4byte	0x1d93
+	.4byte	0x1db1
 	.uleb128 0x31
-	.4byte	0x1d87
-	.4byte	.LLST91
+	.4byte	0x1da5
+	.4byte	.LLST88
 	.uleb128 0x3b
-	.4byte	.LBB110
-	.4byte	.LBE110-.LBB110
+	.4byte	.LBB94
+	.4byte	.LBE94-.LBB94
 	.uleb128 0x34
-	.4byte	0x1dc3
-	.4byte	.LLST92
+	.4byte	0x1de1
+	.4byte	.LLST89
 	.uleb128 0x33
-	.4byte	0x1dcf
+	.4byte	0x1ded
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -232
 	.uleb128 0x34
-	.4byte	0x1ddb
-	.4byte	.LLST93
+	.4byte	0x1df9
+	.4byte	.LLST90
 	.uleb128 0x3c
-	.4byte	.LVL189
-	.4byte	0x2735
+	.4byte	.LVL183
+	.4byte	0x2729
 	.4byte	0x140a
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4359,11 +4282,11 @@ __func__.9342:
 	.byte	0x53
 	.uleb128 0x3
 	.byte	0x7d
-	.sleb128 120
+	.sleb128 128
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL191
-	.4byte	0x24aa
+	.4byte	.LVL185
+	.4byte	0x2470
 	.4byte	0x1433
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4391,8 +4314,8 @@ __func__.9342:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL194
-	.4byte	0x28bf
+	.4byte	.LVL188
+	.4byte	0x28b3
 	.4byte	0x145b
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4419,8 +4342,8 @@ __func__.9342:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL195
-	.4byte	0x28bf
+	.4byte	.LVL189
+	.4byte	0x28b3
 	.4byte	0x1483
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4447,8 +4370,8 @@ __func__.9342:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x37
-	.4byte	.LVL196
-	.4byte	0x28cb
+	.4byte	.LVL190
+	.4byte	0x28bf
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -4504,8 +4427,8 @@ __func__.9342:
 	.byte	0
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL178
-	.4byte	0x24aa
+	.4byte	.LVL172
+	.4byte	0x2470
 	.4byte	0x14f1
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4533,8 +4456,8 @@ __func__.9342:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL183
-	.4byte	0x1f1a
+	.4byte	.LVL177
+	.4byte	0x1f38
 	.4byte	0x1523
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4572,8 +4495,8 @@ __func__.9342:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x37
-	.4byte	.LVL185
-	.4byte	0x1de8
+	.4byte	.LVL179
+	.4byte	0x1e06
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -4609,11 +4532,11 @@ __func__.9342:
 	.byte	0
 	.byte	0
 	.uleb128 0x3d
-	.4byte	.LVL144
-	.4byte	0x28d6
+	.4byte	.LVL138
+	.4byte	0x28ca
 	.uleb128 0x3c
-	.4byte	.LVL148
-	.4byte	0x1c21
+	.4byte	.LVL142
+	.4byte	0x1c3f
 	.4byte	0x1582
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4640,11 +4563,11 @@ __func__.9342:
 	.byte	0x53
 	.uleb128 0x3
 	.byte	0x7d
-	.sleb128 108
+	.sleb128 116
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL149
-	.4byte	0x28e1
+	.4byte	.LVL143
+	.4byte	0x28d5
 	.4byte	0x159f
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4660,11 +4583,11 @@ __func__.9342:
 	.4byte	.LC16
 	.byte	0
 	.uleb128 0x3d
-	.4byte	.LVL150
-	.4byte	0x28ed
+	.4byte	.LVL144
+	.4byte	0x28e1
 	.uleb128 0x3c
-	.4byte	.LVL151
-	.4byte	0x28f9
+	.4byte	.LVL145
+	.4byte	0x28ed
 	.4byte	0x15c1
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4679,8 +4602,8 @@ __func__.9342:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL155
-	.4byte	0x268b
+	.4byte	.LVL149
+	.4byte	0x267f
 	.4byte	0x15d5
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4690,8 +4613,8 @@ __func__.9342:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL157
-	.4byte	0x28d6
+	.4byte	.LVL151
+	.4byte	0x28ca
 	.4byte	0x15f2
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4707,8 +4630,8 @@ __func__.9342:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL158
-	.4byte	0x28d6
+	.4byte	.LVL152
+	.4byte	0x28ca
 	.4byte	0x1609
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4718,8 +4641,8 @@ __func__.9342:
 	.4byte	.LC19
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL159
-	.4byte	0x24aa
+	.4byte	.LVL153
+	.4byte	0x2470
 	.4byte	0x1632
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4747,8 +4670,8 @@ __func__.9342:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL161
-	.4byte	0x1f1a
+	.4byte	.LVL155
+	.4byte	0x1f38
 	.4byte	0x1663
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4782,14 +4705,14 @@ __func__.9342:
 	.sleb128 4
 	.uleb128 0x3
 	.byte	0x7d
-	.sleb128 164
+	.sleb128 172
 	.byte	0
 	.uleb128 0x3d
-	.4byte	.LVL163
-	.4byte	0x1d16
+	.4byte	.LVL157
+	.4byte	0x1d34
 	.uleb128 0x3c
-	.4byte	.LVL165
-	.4byte	0x28d6
+	.4byte	.LVL159
+	.4byte	0x28ca
 	.4byte	0x1683
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4799,8 +4722,8 @@ __func__.9342:
 	.4byte	.LC21
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL166
-	.4byte	0x24aa
+	.4byte	.LVL160
+	.4byte	0x2470
 	.4byte	0x16ab
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4827,8 +4750,8 @@ __func__.9342:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL168
-	.4byte	0x24aa
+	.4byte	.LVL162
+	.4byte	0x2470
 	.4byte	0x16d3
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4855,8 +4778,8 @@ __func__.9342:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL172
-	.4byte	0x1f1a
+	.4byte	.LVL166
+	.4byte	0x1f38
 	.4byte	0x1703
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4893,8 +4816,8 @@ __func__.9342:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x37
-	.4byte	.LVL177
-	.4byte	0x1de8
+	.4byte	.LVL171
+	.4byte	0x1e06
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -4932,19 +4855,19 @@ __func__.9342:
 	.byte	0
 	.uleb128 0x30
 	.4byte	0x1ad5
-	.4byte	.LBB114
-	.4byte	.Ldebug_ranges0+0xd0
+	.4byte	.LBB98
+	.4byte	.Ldebug_ranges0+0x78
 	.byte	0x1
-	.2byte	0x33d
+	.2byte	0x337
 	.4byte	0x19f9
 	.uleb128 0x31
 	.4byte	0x1af2
-	.4byte	.LLST94
+	.4byte	.LLST91
 	.uleb128 0x31
 	.4byte	0x1ae6
-	.4byte	.LLST95
+	.4byte	.LLST92
 	.uleb128 0x32
-	.4byte	.Ldebug_ranges0+0xd0
+	.4byte	.Ldebug_ranges0+0x78
 	.uleb128 0x33
 	.4byte	0x1afe
 	.uleb128 0x3
@@ -4957,11 +4880,11 @@ __func__.9342:
 	.sleb128 -232
 	.uleb128 0x3e
 	.4byte	0x1b16
-	.4byte	0x28a0
-	.4byte	.LLST97
+	.4byte	0x2894
+	.4byte	.LLST94
 	.uleb128 0x34
 	.4byte	0x1b22
-	.4byte	.LLST98
+	.4byte	.LLST95
 	.uleb128 0x33
 	.4byte	0x1b2e
 	.uleb128 0x3
@@ -4969,22 +4892,22 @@ __func__.9342:
 	.sleb128 -248
 	.uleb128 0x34
 	.4byte	0x1b3a
-	.4byte	.LLST99
+	.4byte	.LLST96
 	.uleb128 0x34
 	.4byte	0x1b46
-	.4byte	.LLST100
+	.4byte	.LLST97
 	.uleb128 0x34
 	.4byte	0x1b52
-	.4byte	.LLST101
+	.4byte	.LLST98
 	.uleb128 0x34
 	.4byte	0x1b5e
-	.4byte	.LLST102
+	.4byte	.LLST99
 	.uleb128 0x34
 	.4byte	0x1b68
-	.4byte	.LLST103
+	.4byte	.LLST100
 	.uleb128 0x34
 	.4byte	0x1b74
-	.4byte	.LLST104
+	.4byte	.LLST101
 	.uleb128 0x33
 	.4byte	0x1b80
 	.uleb128 0x3
@@ -4992,84 +4915,82 @@ __func__.9342:
 	.sleb128 -188
 	.uleb128 0x34
 	.4byte	0x1b99
-	.4byte	.LLST105
+	.4byte	.LLST102
 	.uleb128 0x35
 	.4byte	0x1b8c
 	.uleb128 0x3f
-	.4byte	.Ldebug_ranges0+0xf0
-	.4byte	0x18df
-	.uleb128 0x34
+	.4byte	.Ldebug_ranges0+0x98
+	.4byte	0x18dd
+	.uleb128 0x35
 	.4byte	0x1ba6
-	.4byte	.LLST106
+	.uleb128 0x39
+	.4byte	.LBB101
+	.4byte	.LBE101-.LBB101
+	.4byte	0x1855
+	.uleb128 0x33
+	.4byte	0x1bb3
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -252
 	.uleb128 0x3c
-	.4byte	.LVL230
-	.4byte	0x24aa
-	.4byte	0x1812
-	.uleb128 0x38
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
+	.4byte	.LVL231
+	.4byte	0x2613
+	.4byte	0x181b
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x4
-	.byte	0x77
-	.sleb128 76
-	.byte	0x6
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC28
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
+	.uleb128 0x3
+	.byte	0x77
+	.sleb128 92
+	.byte	0
+	.uleb128 0x3c
+	.4byte	.LVL232
+	.4byte	0x25ed
+	.4byte	0x1830
 	.uleb128 0x38
 	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x30
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x77
+	.sleb128 92
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL233
-	.4byte	0x2905
-	.4byte	0x1829
+	.4byte	0x2656
+	.4byte	0x1844
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC2
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x37
 	.4byte	.LVL234
-	.4byte	0x2910
-	.4byte	0x1846
+	.4byte	0x25c6
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x78
+	.byte	0x7a
 	.sleb128 0
-	.uleb128 0x38
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC2
 	.byte	0
-	.uleb128 0x3d
-	.4byte	.LVL235
-	.4byte	0x2676
+	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL237
-	.4byte	0x1f1a
-	.4byte	0x1880
+	.4byte	.LVL226
+	.4byte	0x2470
+	.4byte	0x187c
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x78
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
@@ -5082,14 +5003,36 @@ __func__.9342:
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x7a
 	.sleb128 0
 	.uleb128 0x38
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x3c
+	.4byte	.LVL228
+	.4byte	0x1f38
+	.4byte	0x18a6
+	.uleb128 0x38
+	.uleb128 0x1
+	.byte	0x50
 	.uleb128 0x2
-	.byte	0x7d
+	.byte	0x76
 	.sleb128 0
+	.uleb128 0x38
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x77
+	.sleb128 84
+	.byte	0x6
+	.uleb128 0x38
+	.uleb128 0x1
+	.byte	0x52
 	.uleb128 0x2
-	.byte	0x7b
+	.byte	0x78
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x2
@@ -5097,17 +5040,17 @@ __func__.9342:
 	.sleb128 4
 	.uleb128 0x3
 	.byte	0x77
-	.sleb128 104
+	.sleb128 112
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL240
-	.4byte	0x291b
-	.4byte	0x189d
+	.4byte	.LVL230
+	.4byte	0x28f9
+	.4byte	0x18c3
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x78
+	.byte	0x7a
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
@@ -5116,36 +5059,14 @@ __func__.9342:
 	.byte	0x3
 	.4byte	.LC0
 	.byte	0
-	.uleb128 0x3c
-	.4byte	.LVL241
-	.4byte	0x264d
-	.4byte	0x18b1
-	.uleb128 0x38
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.byte	0
-	.uleb128 0x3c
-	.4byte	.LVL242
-	.4byte	0x2600
-	.4byte	0x18c5
-	.uleb128 0x38
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
 	.uleb128 0x37
-	.4byte	.LVL246
-	.4byte	0x291b
+	.4byte	.LVL238
+	.4byte	0x28f9
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x78
+	.byte	0x7a
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
@@ -5156,9 +5077,9 @@ __func__.9342:
 	.byte	0
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL204
-	.4byte	0x1be8
-	.4byte	0x18f9
+	.4byte	.LVL198
+	.4byte	0x1c06
+	.4byte	0x18f7
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -5173,25 +5094,25 @@ __func__.9342:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL206
-	.4byte	0x2926
-	.4byte	0x190e
+	.4byte	.LVL200
+	.4byte	0x2904
+	.4byte	0x190c
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0x77
-	.sleb128 148
+	.sleb128 156
 	.byte	0
 	.uleb128 0x3d
-	.4byte	.LVL207
-	.4byte	0x28d6
+	.4byte	.LVL202
+	.4byte	0x28ca
 	.uleb128 0x40
-	.4byte	.LVL213
+	.4byte	.LVL207
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.4byte	0x193d
+	.4byte	0x193b
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -5203,7 +5124,7 @@ __func__.9342:
 	.byte	0x51
 	.uleb128 0x4
 	.byte	0x77
-	.sleb128 80
+	.sleb128 84
 	.byte	0x6
 	.uleb128 0x38
 	.uleb128 0x1
@@ -5218,9 +5139,9 @@ __func__.9342:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL216
-	.4byte	0x1c21
-	.4byte	0x1966
+	.4byte	.LVL210
+	.4byte	0x1c3f
+	.4byte	0x1964
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -5232,7 +5153,7 @@ __func__.9342:
 	.byte	0x51
 	.uleb128 0x4
 	.byte	0x77
-	.sleb128 80
+	.sleb128 84
 	.byte	0x6
 	.uleb128 0x38
 	.uleb128 0x1
@@ -5245,17 +5166,17 @@ __func__.9342:
 	.byte	0x53
 	.uleb128 0x3
 	.byte	0x77
-	.sleb128 88
+	.sleb128 96
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL217
-	.4byte	0x28f9
-	.4byte	0x197f
+	.4byte	.LVL212
+	.4byte	0x28ed
+	.4byte	0x197d
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x78
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
@@ -5264,9 +5185,9 @@ __func__.9342:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL219
-	.4byte	0x28d6
-	.4byte	0x1996
+	.4byte	.LVL214
+	.4byte	0x28ca
+	.4byte	0x1994
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -5275,19 +5196,19 @@ __func__.9342:
 	.4byte	.LC17
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL222
-	.4byte	0x268b
-	.4byte	0x19aa
+	.4byte	.LVL217
+	.4byte	0x267f
+	.4byte	0x19a8
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x78
 	.sleb128 0
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL224
-	.4byte	0x28d6
+	.4byte	.LVL220
+	.4byte	0x28ca
 	.4byte	0x19c7
 	.uleb128 0x38
 	.uleb128 0x1
@@ -5298,13 +5219,14 @@ __func__.9342:
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
+	.uleb128 0x4
+	.byte	0x77
+	.sleb128 84
+	.byte	0x6
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL227
-	.4byte	0x28d6
+	.4byte	.LVL223
+	.4byte	0x28ca
 	.4byte	0x19de
 	.uleb128 0x38
 	.uleb128 0x1
@@ -5314,13 +5236,13 @@ __func__.9342:
 	.4byte	.LC19
 	.byte	0
 	.uleb128 0x37
-	.4byte	.LVL228
-	.4byte	0x28e1
+	.4byte	.LVL224
+	.4byte	0x28d5
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x78
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
@@ -5333,69 +5255,69 @@ __func__.9342:
 	.byte	0
 	.uleb128 0x41
 	.4byte	0xd2
-	.4byte	.LLST96
+	.4byte	.LLST93
 	.byte	0
 	.uleb128 0x42
 	.4byte	.LASF336
 	.byte	0x1
-	.2byte	0x25a
+	.2byte	0x254
 	.4byte	0x50
 	.byte	0x1
 	.4byte	0x1ac0
 	.uleb128 0x43
 	.4byte	.LASF326
 	.byte	0x1
-	.2byte	0x25a
+	.2byte	0x254
 	.4byte	0x11b9
 	.uleb128 0x43
 	.4byte	.LASF327
 	.byte	0x1
-	.2byte	0x25b
+	.2byte	0x255
 	.4byte	0x11ad
 	.uleb128 0x43
 	.4byte	.LASF328
 	.byte	0x1
-	.2byte	0x25c
+	.2byte	0x256
 	.4byte	0x122
 	.uleb128 0x43
 	.4byte	.LASF330
 	.byte	0x1
-	.2byte	0x25c
+	.2byte	0x256
 	.4byte	0x153
 	.uleb128 0x44
 	.4byte	.LASF224
 	.byte	0x1
-	.2byte	0x25e
+	.2byte	0x258
 	.4byte	0x10b6
 	.uleb128 0x44
 	.4byte	.LASF331
 	.byte	0x1
-	.2byte	0x25f
+	.2byte	0x259
 	.4byte	0x50
 	.uleb128 0x44
 	.4byte	.LASF259
 	.byte	0x1
-	.2byte	0x260
+	.2byte	0x25a
 	.4byte	0x50
 	.uleb128 0x45
 	.ascii	"ret\000"
 	.byte	0x1
-	.2byte	0x260
+	.2byte	0x25a
 	.4byte	0x50
 	.uleb128 0x44
 	.4byte	.LASF279
 	.byte	0x1
-	.2byte	0x261
+	.2byte	0x25b
 	.4byte	0x50
 	.uleb128 0x44
 	.4byte	.LASF332
 	.byte	0x1
-	.2byte	0x262
+	.2byte	0x25c
 	.4byte	0x50
 	.uleb128 0x45
 	.ascii	"fit\000"
 	.byte	0x1
-	.2byte	0x263
+	.2byte	0x25d
 	.4byte	0x153
 	.uleb128 0x46
 	.4byte	.LASF333
@@ -5404,13 +5326,13 @@ __func__.9342:
 	.uleb128 0x44
 	.4byte	.LASF334
 	.byte	0x1
-	.2byte	0x27b
+	.2byte	0x275
 	.4byte	0x50
 	.uleb128 0x47
 	.uleb128 0x44
 	.4byte	.LASF335
 	.byte	0x1
-	.2byte	0x2ef
+	.2byte	0x2e9
 	.4byte	0x12d
 	.byte	0
 	.byte	0
@@ -5426,225 +5348,239 @@ __func__.9342:
 	.uleb128 0x42
 	.4byte	.LASF337
 	.byte	0x1
-	.2byte	0x1d3
+	.2byte	0x1d1
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x1bb4
+	.4byte	0x1bc2
 	.uleb128 0x43
 	.4byte	.LASF326
 	.byte	0x1
-	.2byte	0x1d3
+	.2byte	0x1d1
 	.4byte	0x11b9
 	.uleb128 0x43
 	.4byte	.LASF327
 	.byte	0x1
-	.2byte	0x1d4
+	.2byte	0x1d2
 	.4byte	0x11ad
 	.uleb128 0x44
 	.4byte	.LASF259
 	.byte	0x1
-	.2byte	0x1df
-	.4byte	0x1bb4
+	.2byte	0x1dd
+	.4byte	0x1bc2
 	.uleb128 0x44
 	.4byte	.LASF224
 	.byte	0x1
-	.2byte	0x1e0
+	.2byte	0x1de
 	.4byte	0x10b6
 	.uleb128 0x44
 	.4byte	.LASF330
 	.byte	0x1
-	.2byte	0x1e1
-	.4byte	0x1bc4
+	.2byte	0x1df
+	.4byte	0x1bd2
 	.uleb128 0x44
 	.4byte	.LASF338
 	.byte	0x1
-	.2byte	0x1e2
+	.2byte	0x1e0
 	.4byte	0x50
 	.uleb128 0x44
 	.4byte	.LASF331
 	.byte	0x1
-	.2byte	0x1e3
+	.2byte	0x1e1
 	.4byte	0x50
 	.uleb128 0x44
 	.4byte	.LASF328
 	.byte	0x1
-	.2byte	0x1e4
+	.2byte	0x1e2
 	.4byte	0x50
 	.uleb128 0x44
 	.4byte	.LASF332
 	.byte	0x1
-	.2byte	0x1e5
+	.2byte	0x1e3
 	.4byte	0x50
 	.uleb128 0x45
 	.ascii	"ret\000"
 	.byte	0x1
-	.2byte	0x1e5
+	.2byte	0x1e3
 	.4byte	0x50
 	.uleb128 0x45
 	.ascii	"i\000"
 	.byte	0x1
-	.2byte	0x1e5
+	.2byte	0x1e3
 	.4byte	0x50
 	.uleb128 0x45
 	.ascii	"fit\000"
 	.byte	0x1
-	.2byte	0x1e6
+	.2byte	0x1e4
 	.4byte	0x153
 	.uleb128 0x44
 	.4byte	.LASF339
 	.byte	0x1
-	.2byte	0x1ec
+	.2byte	0x1ea
 	.4byte	0xd7
 	.uleb128 0x44
 	.4byte	.LASF340
 	.byte	0x1
-	.2byte	0x1ed
+	.2byte	0x1eb
 	.4byte	0x4ac
 	.uleb128 0x46
 	.4byte	.LASF333
-	.4byte	0x1be3
+	.4byte	0x1bf1
 	.4byte	.LASF337
 	.uleb128 0x44
 	.4byte	.LASF334
 	.byte	0x1
-	.2byte	0x20a
+	.2byte	0x208
 	.4byte	0x50
 	.uleb128 0x47
 	.uleb128 0x44
 	.4byte	.LASF341
 	.byte	0x1
-	.2byte	0x224
+	.2byte	0x222
 	.4byte	0x4d2
+	.uleb128 0x47
+	.uleb128 0x44
+	.4byte	.LASF342
+	.byte	0x1
+	.2byte	0x232
+	.4byte	0x1bf6
+	.byte	0
 	.byte	0
 	.byte	0
 	.uleb128 0xc
 	.4byte	0xd7
-	.4byte	0x1bc4
+	.4byte	0x1bd2
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x2
 	.byte	0
 	.uleb128 0xc
 	.4byte	0xdd
-	.4byte	0x1bd3
+	.4byte	0x1be1
 	.uleb128 0x48
 	.4byte	0xcb
 	.byte	0
 	.uleb128 0xc
 	.4byte	0xe4
-	.4byte	0x1be3
+	.4byte	0x1bf1
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x13
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x1bd3
+	.4byte	0x1be1
+	.uleb128 0xc
+	.4byte	0xdd
+	.4byte	0x1c06
+	.uleb128 0xd
+	.4byte	0xcb
+	.byte	0x2
+	.byte	0
 	.uleb128 0x2a
-	.4byte	.LASF343
+	.4byte	.LASF344
 	.byte	0x1
-	.2byte	0x1cc
+	.2byte	0x1ca
 	.4byte	0xd7
 	.4byte	.LFB223
 	.4byte	.LFE223-.LFB223
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1c21
+	.4byte	0x1c3f
 	.uleb128 0x2c
 	.ascii	"spl\000"
 	.byte	0x1
-	.2byte	0x1cc
+	.2byte	0x1ca
 	.4byte	0x11b9
-	.4byte	.LLST65
+	.4byte	.LLST62
 	.uleb128 0x49
 	.4byte	.LASF327
 	.byte	0x1
-	.2byte	0x1cd
+	.2byte	0x1cb
 	.4byte	0x11ad
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0
 	.uleb128 0x4a
-	.4byte	.LASF353
+	.4byte	.LASF354
 	.byte	0x1
-	.2byte	0x19a
+	.2byte	0x198
 	.4byte	0x153
 	.4byte	.LFB222
 	.4byte	.LFE222-.LFB222
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1d10
+	.4byte	0x1d2e
 	.uleb128 0x2b
 	.4byte	.LASF327
 	.byte	0x1
-	.2byte	0x19a
+	.2byte	0x198
 	.4byte	0x11ad
-	.4byte	.LLST15
+	.4byte	.LLST47
 	.uleb128 0x2b
 	.4byte	.LASF328
 	.byte	0x1
-	.2byte	0x19b
+	.2byte	0x199
 	.4byte	0x122
-	.4byte	.LLST16
+	.4byte	.LLST48
 	.uleb128 0x2b
 	.4byte	.LASF330
 	.byte	0x1
-	.2byte	0x19b
+	.2byte	0x199
 	.4byte	0x153
-	.4byte	.LLST17
+	.4byte	.LLST49
 	.uleb128 0x2b
 	.4byte	.LASF331
 	.byte	0x1
-	.2byte	0x19c
-	.4byte	0x1d10
-	.4byte	.LLST18
+	.2byte	0x19a
+	.4byte	0x1d2e
+	.4byte	.LLST50
 	.uleb128 0x4b
-	.4byte	.LASF344
+	.4byte	.LASF345
 	.byte	0x1
-	.2byte	0x19e
+	.2byte	0x19c
 	.4byte	0x50
 	.byte	0x3f
 	.uleb128 0x2d
-	.4byte	.LASF345
+	.4byte	.LASF346
 	.byte	0x1
-	.2byte	0x19f
+	.2byte	0x19d
 	.4byte	0x122
-	.4byte	.LLST19
+	.4byte	.LLST51
 	.uleb128 0x2d
 	.4byte	.LASF78
 	.byte	0x1
-	.2byte	0x1a0
+	.2byte	0x19e
 	.4byte	0x122
-	.4byte	.LLST20
+	.4byte	.LLST52
 	.uleb128 0x44
-	.4byte	.LASF346
+	.4byte	.LASF347
 	.byte	0x1
-	.2byte	0x1a1
+	.2byte	0x19f
 	.4byte	0x50
 	.uleb128 0x2e
 	.ascii	"fit\000"
 	.byte	0x1
-	.2byte	0x1a2
+	.2byte	0x1a0
 	.4byte	0x153
-	.4byte	.LLST21
+	.4byte	.LLST53
 	.uleb128 0x36
-	.4byte	0x242a
-	.4byte	.LBB30
-	.4byte	.LBE30-.LBB30
+	.4byte	0x23f0
+	.4byte	.LBB63
+	.4byte	.LBE63-.LBB63
 	.byte	0x1
-	.2byte	0x1c0
-	.4byte	0x1cf4
+	.2byte	0x1be
+	.4byte	0x1d12
 	.uleb128 0x31
-	.4byte	0x2450
-	.4byte	.LLST22
+	.4byte	0x2416
+	.4byte	.LLST54
 	.uleb128 0x31
-	.4byte	0x2445
-	.4byte	.LLST23
+	.4byte	0x240b
+	.4byte	.LLST55
 	.uleb128 0x31
-	.4byte	0x243a
-	.4byte	.LLST24
+	.4byte	0x2400
+	.4byte	.LLST56
 	.byte	0
 	.uleb128 0x4c
-	.4byte	.LVL48
+	.4byte	.LVL115
 	.uleb128 0x2
 	.byte	0x77
 	.sleb128 0
@@ -5672,143 +5608,143 @@ __func__.9342:
 	.byte	0x4
 	.4byte	0x50
 	.uleb128 0x2a
-	.4byte	.LASF347
+	.4byte	.LASF348
 	.byte	0x1
-	.2byte	0x195
+	.2byte	0x193
 	.4byte	0x50
 	.4byte	.LFB221
 	.4byte	.LFE221-.LFB221
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1d41
+	.4byte	0x1d5f
 	.uleb128 0x2b
 	.4byte	.LASF316
 	.byte	0x1
-	.2byte	0x195
+	.2byte	0x193
 	.4byte	0x101
-	.4byte	.LLST64
+	.4byte	.LLST61
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF348
+	.4byte	.LASF349
 	.byte	0x1
-	.2byte	0x18c
+	.2byte	0x18a
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x1d76
+	.4byte	0x1d94
 	.uleb128 0x4d
 	.ascii	"fit\000"
 	.byte	0x1
-	.2byte	0x18c
+	.2byte	0x18a
 	.4byte	0x3ae
 	.uleb128 0x43
-	.4byte	.LASF349
+	.4byte	.LASF350
 	.byte	0x1
-	.2byte	0x18c
+	.2byte	0x18a
 	.4byte	0x50
 	.uleb128 0x4d
 	.ascii	"os\000"
 	.byte	0x1
-	.2byte	0x18c
+	.2byte	0x18a
 	.4byte	0xd48
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF350
+	.4byte	.LASF351
 	.byte	0x1
-	.2byte	0x175
+	.2byte	0x173
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x1de8
+	.4byte	0x1e06
 	.uleb128 0x4d
 	.ascii	"fit\000"
 	.byte	0x1
-	.2byte	0x175
+	.2byte	0x173
 	.4byte	0x3ae
 	.uleb128 0x43
 	.4byte	.LASF259
 	.byte	0x1
-	.2byte	0x175
+	.2byte	0x173
 	.4byte	0x50
 	.uleb128 0x43
 	.4byte	.LASF279
 	.byte	0x1
-	.2byte	0x175
+	.2byte	0x173
 	.4byte	0x50
 	.uleb128 0x43
-	.4byte	.LASF351
+	.4byte	.LASF352
 	.byte	0x1
-	.2byte	0x176
+	.2byte	0x174
 	.4byte	0x153
 	.uleb128 0x43
-	.4byte	.LASF352
+	.4byte	.LASF353
 	.byte	0x1
-	.2byte	0x176
+	.2byte	0x174
 	.4byte	0x11b9
 	.uleb128 0x45
 	.ascii	"ret\000"
 	.byte	0x1
-	.2byte	0x178
+	.2byte	0x176
 	.4byte	0x50
 	.uleb128 0x44
 	.4byte	.LASF74
 	.byte	0x1
-	.2byte	0x17a
+	.2byte	0x178
 	.4byte	0xfb
 	.uleb128 0x44
 	.4byte	.LASF332
 	.byte	0x1
-	.2byte	0x17b
+	.2byte	0x179
 	.4byte	0x50
 	.byte	0
 	.uleb128 0x4e
-	.4byte	.LASF354
+	.4byte	.LASF355
 	.byte	0x1
-	.2byte	0x152
+	.2byte	0x150
 	.4byte	0x50
 	.4byte	.LFB218
 	.4byte	.LFE218-.LFB218
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1f05
+	.4byte	0x1f23
 	.uleb128 0x2b
 	.4byte	.LASF326
 	.byte	0x1
-	.2byte	0x152
+	.2byte	0x150
 	.4byte	0x11b9
-	.4byte	.LLST53
+	.4byte	.LLST39
 	.uleb128 0x2b
 	.4byte	.LASF327
 	.byte	0x1
-	.2byte	0x153
+	.2byte	0x151
 	.4byte	0x11ad
-	.4byte	.LLST54
+	.4byte	.LLST40
 	.uleb128 0x2b
 	.4byte	.LASF328
 	.byte	0x1
-	.2byte	0x153
+	.2byte	0x151
 	.4byte	0x122
-	.4byte	.LLST55
+	.4byte	.LLST41
 	.uleb128 0x2c
 	.ascii	"fit\000"
 	.byte	0x1
-	.2byte	0x154
+	.2byte	0x152
 	.4byte	0x153
-	.4byte	.LLST56
+	.4byte	.LLST42
 	.uleb128 0x2b
 	.4byte	.LASF259
 	.byte	0x1
-	.2byte	0x154
+	.2byte	0x152
 	.4byte	0x50
-	.4byte	.LLST57
+	.4byte	.LLST43
 	.uleb128 0x2b
 	.4byte	.LASF331
 	.byte	0x1
-	.2byte	0x154
+	.2byte	0x152
 	.4byte	0x122
-	.4byte	.LLST58
+	.4byte	.LLST44
 	.uleb128 0x4f
 	.4byte	.LASF224
 	.byte	0x1
-	.2byte	0x156
+	.2byte	0x154
 	.4byte	0x10b6
 	.uleb128 0x3
 	.byte	0x91
@@ -5816,22 +5752,22 @@ __func__.9342:
 	.uleb128 0x2d
 	.4byte	.LASF332
 	.byte	0x1
-	.2byte	0x157
+	.2byte	0x155
 	.4byte	0x50
-	.4byte	.LLST59
+	.4byte	.LLST45
 	.uleb128 0x2e
 	.ascii	"ret\000"
 	.byte	0x1
-	.2byte	0x157
+	.2byte	0x155
 	.4byte	0x50
-	.4byte	.LLST60
+	.4byte	.LLST46
 	.uleb128 0x50
 	.4byte	.LASF333
-	.4byte	0x1f15
+	.4byte	0x1f33
 	.uleb128 0x3c
-	.4byte	.LVL120
-	.4byte	0x24aa
-	.4byte	0x1ec4
+	.4byte	.LVL99
+	.4byte	0x2470
+	.4byte	0x1ee2
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -5858,9 +5794,9 @@ __func__.9342:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL122
-	.4byte	0x1f1a
-	.4byte	0x1ef3
+	.4byte	.LVL101
+	.4byte	0x1f38
+	.4byte	0x1f11
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -5895,8 +5831,8 @@ __func__.9342:
 	.sleb128 -68
 	.byte	0
 	.uleb128 0x37
-	.4byte	.LVL124
-	.4byte	0x2931
+	.4byte	.LVL103
+	.4byte	0x290f
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
@@ -5907,15 +5843,15 @@ __func__.9342:
 	.byte	0
 	.uleb128 0xc
 	.4byte	0xe4
-	.4byte	0x1f15
+	.4byte	0x1f33
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x12
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x1f05
+	.4byte	0x1f23
 	.uleb128 0x51
-	.4byte	.LASF355
+	.4byte	.LASF356
 	.byte	0x1
 	.byte	0xbf
 	.4byte	0x50
@@ -5923,45 +5859,45 @@ __func__.9342:
 	.4byte	.LFE217-.LFB217
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x242a
+	.4byte	0x23f0
 	.uleb128 0x52
 	.4byte	.LASF327
 	.byte	0x1
 	.byte	0xbf
 	.4byte	0x11ad
-	.4byte	.LLST25
+	.4byte	.LLST15
 	.uleb128 0x52
 	.4byte	.LASF328
 	.byte	0x1
 	.byte	0xbf
 	.4byte	0x122
-	.4byte	.LLST26
+	.4byte	.LLST16
 	.uleb128 0x53
 	.ascii	"fit\000"
 	.byte	0x1
 	.byte	0xc0
 	.4byte	0x153
-	.4byte	.LLST27
+	.4byte	.LLST17
 	.uleb128 0x52
 	.4byte	.LASF331
 	.byte	0x1
 	.byte	0xc0
 	.4byte	0x122
-	.4byte	.LLST28
+	.4byte	.LLST18
 	.uleb128 0x52
 	.4byte	.LASF332
 	.byte	0x1
 	.byte	0xc0
 	.4byte	0x50
-	.4byte	.LLST29
+	.4byte	.LLST19
 	.uleb128 0x52
 	.4byte	.LASF224
 	.byte	0x1
 	.byte	0xc1
 	.4byte	0x11b9
-	.4byte	.LLST30
+	.4byte	.LLST20
 	.uleb128 0x54
-	.4byte	.LASF356
+	.4byte	.LASF357
 	.byte	0x1
 	.byte	0xc3
 	.4byte	0x50
@@ -5969,7 +5905,7 @@ __func__.9342:
 	.byte	0x91
 	.sleb128 -60
 	.uleb128 0x54
-	.4byte	.LASF357
+	.4byte	.LASF358
 	.byte	0x1
 	.byte	0xc4
 	.4byte	0x10c
@@ -5990,7 +5926,7 @@ __func__.9342:
 	.byte	0xc6
 	.4byte	0x122
 	.uleb128 0x54
-	.4byte	.LASF358
+	.4byte	.LASF359
 	.byte	0x1
 	.byte	0xc7
 	.4byte	0x122
@@ -6006,11 +5942,11 @@ __func__.9342:
 	.byte	0x91
 	.sleb128 -44
 	.uleb128 0x57
-	.4byte	.LASF359
+	.4byte	.LASF360
 	.byte	0x1
 	.byte	0xc7
 	.4byte	0x122
-	.4byte	.LLST31
+	.4byte	.LLST21
 	.uleb128 0x55
 	.ascii	"src\000"
 	.byte	0x1
@@ -6020,24 +5956,24 @@ __func__.9342:
 	.byte	0x91
 	.sleb128 -40
 	.uleb128 0x57
-	.4byte	.LASF360
+	.4byte	.LASF361
 	.byte	0x1
 	.byte	0xc9
 	.4byte	0x122
-	.4byte	.LLST32
+	.4byte	.LLST22
 	.uleb128 0x56
-	.4byte	.LASF361
+	.4byte	.LASF362
 	.byte	0x1
 	.byte	0xca
 	.4byte	0x50
 	.uleb128 0x58
-	.4byte	.LASF344
+	.4byte	.LASF345
 	.byte	0x1
 	.byte	0xcb
 	.4byte	0x50
 	.byte	0x3f
 	.uleb128 0x54
-	.4byte	.LASF362
+	.4byte	.LASF363
 	.byte	0x1
 	.byte	0xcc
 	.4byte	0x12d
@@ -6049,9 +5985,9 @@ __func__.9342:
 	.byte	0x1
 	.byte	0xcc
 	.4byte	0x12d
-	.4byte	.LLST33
+	.4byte	.LLST23
 	.uleb128 0x54
-	.4byte	.LASF363
+	.4byte	.LASF364
 	.byte	0x1
 	.byte	0xcd
 	.4byte	0x3ae
@@ -6059,91 +5995,91 @@ __func__.9342:
 	.byte	0x91
 	.sleb128 -36
 	.uleb128 0x57
-	.4byte	.LASF364
+	.4byte	.LASF365
 	.byte	0x1
 	.byte	0xce
 	.4byte	0x18e
-	.4byte	.LLST34
+	.4byte	.LLST24
 	.uleb128 0x57
-	.4byte	.LASF365
+	.4byte	.LASF366
 	.byte	0x1
 	.byte	0xcf
 	.4byte	0x18e
-	.4byte	.LLST35
+	.4byte	.LLST25
 	.uleb128 0x57
 	.4byte	.LASF341
 	.byte	0x1
 	.byte	0xd0
 	.4byte	0x4d2
-	.4byte	.LLST36
+	.4byte	.LLST26
 	.uleb128 0x59
 	.ascii	"out\000"
 	.byte	0x1
-	.2byte	0x148
-	.4byte	.L36
+	.2byte	0x146
+	.4byte	.L31
 	.uleb128 0x5a
-	.4byte	0x245c
-	.4byte	.LBB48
+	.4byte	0x2422
+	.4byte	.LBB37
 	.4byte	.Ldebug_ranges0+0
 	.byte	0x1
 	.byte	0xff
-	.4byte	0x20ab
+	.4byte	0x20c9
 	.uleb128 0x31
-	.4byte	0x2477
-	.4byte	.LLST37
+	.4byte	0x243d
+	.4byte	.LLST27
 	.uleb128 0x31
-	.4byte	0x246c
-	.4byte	.LLST38
+	.4byte	0x2432
+	.4byte	.LLST28
 	.byte	0
 	.uleb128 0x36
-	.4byte	0x242a
-	.4byte	.LBB53
-	.4byte	.LBE53-.LBB53
+	.4byte	0x23f0
+	.4byte	.LBB42
+	.4byte	.LBE42-.LBB42
 	.byte	0x1
 	.2byte	0x100
-	.4byte	0x20d7
+	.4byte	0x20f5
 	.uleb128 0x3a
-	.4byte	0x2450
+	.4byte	0x2416
 	.uleb128 0x31
-	.4byte	0x2445
-	.4byte	.LLST39
+	.4byte	0x240b
+	.4byte	.LLST29
 	.uleb128 0x31
-	.4byte	0x243a
-	.4byte	.LLST40
+	.4byte	0x2400
+	.4byte	.LLST30
 	.byte	0
 	.uleb128 0x30
-	.4byte	0x2483
-	.4byte	.LBB55
+	.4byte	0x2449
+	.4byte	.LBB44
 	.4byte	.Ldebug_ranges0+0x20
 	.byte	0x1
 	.2byte	0x109
-	.4byte	0x20fe
+	.4byte	0x211c
 	.uleb128 0x31
-	.4byte	0x249e
-	.4byte	.LLST41
+	.4byte	0x2464
+	.4byte	.LLST31
 	.uleb128 0x31
-	.4byte	0x2493
-	.4byte	.LLST42
+	.4byte	0x2459
+	.4byte	.LLST32
 	.byte	0
 	.uleb128 0x30
-	.4byte	0x26c1
-	.4byte	.LBB60
+	.4byte	0x26b5
+	.4byte	.LBB49
 	.4byte	.Ldebug_ranges0+0x38
 	.byte	0x1
 	.2byte	0x122
-	.4byte	0x2149
-	.uleb128 0x31
-	.4byte	0x26ea
-	.4byte	.LLST43
+	.4byte	0x2167
 	.uleb128 0x31
 	.4byte	0x26de
-	.4byte	.LLST44
+	.4byte	.LLST33
 	.uleb128 0x31
 	.4byte	0x26d2
-	.4byte	.LLST45
+	.4byte	.LLST34
+	.uleb128 0x31
+	.4byte	0x26c6
+	.4byte	.LLST35
 	.uleb128 0x37
-	.4byte	.LVL89
-	.4byte	0x293c
+	.4byte	.LVL77
+	.4byte	0x291a
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6163,58 +6099,30 @@ __func__.9342:
 	.byte	0x30
 	.byte	0
 	.byte	0
-	.uleb128 0x30
-	.4byte	0x2483
-	.4byte	.LBB65
-	.4byte	.Ldebug_ranges0+0x58
-	.byte	0x1
-	.2byte	0x124
-	.4byte	0x2170
-	.uleb128 0x31
-	.4byte	0x249e
-	.4byte	.LLST46
-	.uleb128 0x31
-	.4byte	0x2493
-	.4byte	.LLST47
-	.byte	0
-	.uleb128 0x30
-	.4byte	0x26c1
-	.4byte	.LBB72
-	.4byte	.Ldebug_ranges0+0x78
+	.uleb128 0x36
+	.4byte	0x26b5
+	.4byte	.LBB55
+	.4byte	.LBE55-.LBB55
 	.byte	0x1
-	.2byte	0x128
-	.4byte	0x21a9
-	.uleb128 0x31
-	.4byte	0x26ea
-	.4byte	.LLST48
+	.2byte	0x127
+	.4byte	0x21a0
 	.uleb128 0x31
 	.4byte	0x26de
-	.4byte	.LLST49
+	.4byte	.LLST36
 	.uleb128 0x31
 	.4byte	0x26d2
-	.4byte	.LLST50
-	.uleb128 0x3d
-	.4byte	.LVL102
-	.4byte	0x293c
-	.byte	0
-	.uleb128 0x30
-	.4byte	0x2483
-	.4byte	.LBB75
-	.4byte	.Ldebug_ranges0+0x90
-	.byte	0x1
-	.2byte	0x129
-	.4byte	0x21d0
-	.uleb128 0x31
-	.4byte	0x249e
-	.4byte	.LLST51
+	.4byte	.LLST37
 	.uleb128 0x31
-	.4byte	0x2493
-	.4byte	.LLST52
+	.4byte	0x26c6
+	.4byte	.LLST38
+	.uleb128 0x3d
+	.4byte	.LVL86
+	.4byte	0x291a
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL58
-	.4byte	0x2948
-	.4byte	0x21f0
+	.4byte	.LVL45
+	.4byte	0x2926
+	.4byte	0x21c0
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6235,9 +6143,9 @@ __func__.9342:
 	.sleb128 -61
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL59
-	.4byte	0x2954
-	.4byte	0x2210
+	.4byte	.LVL46
+	.4byte	0x2932
+	.4byte	0x21e0
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6258,9 +6166,9 @@ __func__.9342:
 	.sleb128 -44
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL60
-	.4byte	0x2960
-	.4byte	0x2230
+	.4byte	.LVL47
+	.4byte	0x293e
+	.4byte	0x2200
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6281,9 +6189,9 @@ __func__.9342:
 	.sleb128 -48
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL61
-	.4byte	0x296c
-	.4byte	0x2250
+	.4byte	.LVL48
+	.4byte	0x294a
+	.4byte	0x2220
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6304,9 +6212,9 @@ __func__.9342:
 	.sleb128 -60
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL62
-	.4byte	0x2978
-	.4byte	0x2270
+	.4byte	.LVL49
+	.4byte	0x2956
+	.4byte	0x2240
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6327,9 +6235,9 @@ __func__.9342:
 	.sleb128 -60
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL64
-	.4byte	0x2984
-	.4byte	0x2290
+	.4byte	.LVL52
+	.4byte	0x2962
+	.4byte	0x2260
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6350,9 +6258,9 @@ __func__.9342:
 	.sleb128 -52
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL66
-	.4byte	0x2990
-	.4byte	0x22a4
+	.4byte	.LVL54
+	.4byte	0x296e
+	.4byte	0x2274
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6361,9 +6269,9 @@ __func__.9342:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL73
-	.4byte	0x299c
-	.4byte	0x22be
+	.4byte	.LVL61
+	.4byte	0x297a
+	.4byte	0x228e
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6378,13 +6286,13 @@ __func__.9342:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x5b
-	.4byte	.LVL76
-	.4byte	0x22da
+	.4byte	.LVL64
+	.4byte	0x22ac
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x77
+	.byte	0x78
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
@@ -6395,14 +6303,15 @@ __func__.9342:
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -80
+	.byte	0x6
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL77
-	.4byte	0x28d6
-	.4byte	0x22f1
+	.4byte	.LVL65
+	.4byte	0x28ca
+	.4byte	0x22c3
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6411,9 +6320,9 @@ __func__.9342:
 	.4byte	.LC7
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL78
-	.4byte	0x29a8
-	.4byte	0x2314
+	.4byte	.LVL66
+	.4byte	0x2986
+	.4byte	0x22e6
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6434,9 +6343,9 @@ __func__.9342:
 	.4byte	.LC13
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL93
-	.4byte	0x28bf
-	.4byte	0x233c
+	.4byte	.LVL79
+	.4byte	0x28b3
+	.4byte	0x230e
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6462,9 +6371,9 @@ __func__.9342:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL94
-	.4byte	0x28d6
-	.4byte	0x2365
+	.4byte	.LVL80
+	.4byte	0x28ca
+	.4byte	0x2331
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6475,7 +6384,7 @@ __func__.9342:
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x78
+	.byte	0x77
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
@@ -6483,17 +6392,11 @@ __func__.9342:
 	.uleb128 0x2
 	.byte	0x7a
 	.sleb128 0
-	.uleb128 0x38
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL95
-	.4byte	0x29b4
-	.4byte	0x237f
+	.4byte	.LVL81
+	.4byte	0x2992
+	.4byte	0x234b
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6508,9 +6411,9 @@ __func__.9342:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL96
-	.4byte	0x29c0
-	.4byte	0x23b3
+	.4byte	.LVL82
+	.4byte	0x299e
+	.4byte	0x237f
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6547,13 +6450,13 @@ __func__.9342:
 	.byte	0x7d
 	.sleb128 4
 	.uleb128 0x2
-	.byte	0x77
+	.byte	0x78
 	.sleb128 0
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL97
-	.4byte	0x29cc
-	.4byte	0x23ca
+	.4byte	.LVL83
+	.4byte	0x29aa
+	.4byte	0x2396
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6562,34 +6465,28 @@ __func__.9342:
 	.4byte	.LC12
 	.byte	0
 	.uleb128 0x3d
-	.4byte	.LVL98
-	.4byte	0x29d7
+	.4byte	.LVL84
+	.4byte	0x29b5
 	.uleb128 0x3c
-	.4byte	.LVL106
-	.4byte	0x28d6
-	.4byte	0x23f0
+	.4byte	.LVL87
+	.4byte	0x28ca
+	.4byte	0x23b6
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	.LC11
+	.byte	0
+	.uleb128 0x3c
+	.4byte	.LVL91
+	.4byte	0x29c1
+	.4byte	0x23dc
 	.uleb128 0x38
 	.uleb128 0x1
-	.byte	0x51
+	.byte	0x50
 	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.uleb128 0x3c
-	.4byte	.LVL112
-	.4byte	0x29e3
-	.4byte	0x2416
-	.uleb128 0x38
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
+	.byte	0x74
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
@@ -6611,8 +6508,8 @@ __func__.9342:
 	.sleb128 -56
 	.byte	0
 	.uleb128 0x37
-	.4byte	.LVL113
-	.4byte	0x29cc
+	.4byte	.LVL92
+	.4byte	0x29aa
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6622,66 +6519,66 @@ __func__.9342:
 	.byte	0
 	.byte	0
 	.uleb128 0x5c
-	.4byte	.LASF366
+	.4byte	.LASF367
 	.byte	0x1
 	.byte	0xa3
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x245c
+	.4byte	0x2422
 	.uleb128 0x5d
 	.4byte	.LASF327
 	.byte	0x1
 	.byte	0xa3
 	.4byte	0x11ad
 	.uleb128 0x5d
-	.4byte	.LASF367
+	.4byte	.LASF368
 	.byte	0x1
 	.byte	0xa3
 	.4byte	0x50
 	.uleb128 0x5d
-	.4byte	.LASF356
+	.4byte	.LASF357
 	.byte	0x1
 	.byte	0xa4
 	.4byte	0x50
 	.byte	0
 	.uleb128 0x5c
-	.4byte	.LASF368
+	.4byte	.LASF369
 	.byte	0x1
 	.byte	0x95
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x2483
+	.4byte	0x2449
 	.uleb128 0x5d
 	.4byte	.LASF327
 	.byte	0x1
 	.byte	0x95
 	.4byte	0x11ad
 	.uleb128 0x5d
-	.4byte	.LASF356
+	.4byte	.LASF357
 	.byte	0x1
 	.byte	0x95
 	.4byte	0x50
 	.byte	0
 	.uleb128 0x5c
-	.4byte	.LASF369
+	.4byte	.LASF370
 	.byte	0x1
 	.byte	0x88
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x24aa
+	.4byte	0x2470
 	.uleb128 0x5d
 	.4byte	.LASF327
 	.byte	0x1
 	.byte	0x88
 	.4byte	0x11ad
 	.uleb128 0x5d
-	.4byte	.LASF356
+	.4byte	.LASF357
 	.byte	0x1
 	.byte	0x88
 	.4byte	0x50
 	.byte	0
 	.uleb128 0x5e
-	.4byte	.LASF370
+	.4byte	.LASF371
 	.byte	0x1
 	.byte	0x72
 	.4byte	0x50
@@ -6689,7 +6586,7 @@ __func__.9342:
 	.4byte	.LFE213-.LFB213
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2572
+	.4byte	0x2538
 	.uleb128 0x53
 	.ascii	"fit\000"
 	.byte	0x1
@@ -6736,8 +6633,8 @@ __func__.9342:
 	.4byte	.LLST14
 	.uleb128 0x3c
 	.4byte	.LVL34
-	.4byte	0x2735
-	.4byte	0x255b
+	.4byte	0x2729
+	.4byte	0x2521
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6765,14 +6662,14 @@ __func__.9342:
 	.byte	0x91
 	.sleb128 -20
 	.uleb128 0x60
-	.4byte	0x258d
+	.4byte	0x2553
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
 	.byte	0
 	.uleb128 0x37
 	.4byte	.LVL36
-	.4byte	0x29ef
+	.4byte	0x29cd
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6788,12 +6685,12 @@ __func__.9342:
 	.byte	0
 	.byte	0
 	.uleb128 0x5c
-	.4byte	.LASF371
+	.4byte	.LASF372
 	.byte	0x1
 	.byte	0x3c
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x25fa
+	.4byte	0x25c0
 	.uleb128 0x61
 	.ascii	"fit\000"
 	.byte	0x1
@@ -6815,10 +6712,10 @@ __func__.9342:
 	.byte	0x3d
 	.4byte	0x50
 	.uleb128 0x5d
-	.4byte	.LASF372
+	.4byte	.LASF373
 	.byte	0x1
 	.byte	0x3e
-	.4byte	0x25fa
+	.4byte	0x25c0
 	.uleb128 0x56
 	.4byte	.LASF74
 	.byte	0x1
@@ -6835,7 +6732,7 @@ __func__.9342:
 	.byte	0x41
 	.4byte	0x50
 	.uleb128 0x56
-	.4byte	.LASF373
+	.4byte	.LASF374
 	.byte	0x1
 	.byte	0x42
 	.4byte	0x50
@@ -6854,83 +6751,105 @@ __func__.9342:
 	.byte	0x4
 	.4byte	0xfb
 	.uleb128 0x63
-	.4byte	.LASF417
+	.4byte	.LASF418
 	.byte	0x1
 	.byte	0x2b
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x2627
+	.4byte	0x25ed
 	.uleb128 0x61
 	.ascii	"fdt\000"
 	.byte	0x1
 	.byte	0x2b
 	.4byte	0x153
 	.uleb128 0x5d
-	.4byte	.LASF363
+	.4byte	.LASF364
 	.byte	0x1
 	.byte	0x2b
 	.4byte	0xfb
 	.byte	0
 	.uleb128 0x64
-	.4byte	.LASF418
+	.4byte	.LASF419
 	.byte	0x1
 	.byte	0x26
 	.4byte	0x50
-	.4byte	0x264d
+	.4byte	0x2613
 	.uleb128 0x61
 	.ascii	"fdt\000"
 	.byte	0x1
 	.byte	0x26
 	.4byte	0x153
 	.uleb128 0x5d
-	.4byte	.LASF374
+	.4byte	.LASF375
 	.byte	0x1
 	.byte	0x26
 	.4byte	0xfb
 	.byte	0
 	.uleb128 0x65
-	.4byte	.LASF375
+	.4byte	.LASF376
 	.byte	0x1
 	.byte	0x21
-	.4byte	0xfb
+	.4byte	0x50
 	.4byte	.LFB209
 	.4byte	.LFE209-.LFB209
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2676
+	.4byte	0x2656
 	.uleb128 0x52
-	.4byte	.LASF376
+	.4byte	.LASF377
 	.byte	0x1
 	.byte	0x21
 	.4byte	0x4d2
-	.4byte	.LLST62
-	.byte	0
+	.4byte	.LLST59
 	.uleb128 0x66
-	.4byte	.LASF419
+	.4byte	.LASF378
+	.byte	0x1
+	.byte	0x21
+	.4byte	0xfb
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x66
+	.4byte	.LASF375
+	.byte	0x1
+	.byte	0x21
+	.4byte	0xfb
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0
+	.uleb128 0x65
+	.4byte	.LASF379
 	.byte	0x1
 	.byte	0x1c
-	.4byte	0x50
+	.4byte	0xfb
 	.4byte	.LFB208
 	.4byte	.LFE208-.LFB208
 	.uleb128 0x1
 	.byte	0x9c
-	.uleb128 0x65
+	.4byte	0x267f
+	.uleb128 0x52
 	.4byte	.LASF377
 	.byte	0x1
+	.byte	0x1c
+	.4byte	0x4d2
+	.4byte	.LLST58
+	.byte	0
+	.uleb128 0x65
+	.4byte	.LASF380
+	.byte	0x1
 	.byte	0x17
 	.4byte	0x50
 	.4byte	.LFB207
 	.4byte	.LFE207-.LFB207
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x26c1
+	.4byte	0x26b5
 	.uleb128 0x53
 	.ascii	"fit\000"
 	.byte	0x1
 	.byte	0x17
 	.4byte	0x3ae
-	.4byte	.LLST61
-	.uleb128 0x67
+	.4byte	.LLST57
+	.uleb128 0x66
 	.4byte	.LASF334
 	.byte	0x1
 	.byte	0x17
@@ -6939,19 +6858,19 @@ __func__.9342:
 	.byte	0x51
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF378
+	.4byte	.LASF381
 	.byte	0x2
 	.2byte	0x3ea
 	.4byte	0xd7
 	.byte	0x3
-	.4byte	0x26f7
+	.4byte	0x26eb
 	.uleb128 0x43
-	.4byte	.LASF379
+	.4byte	.LASF382
 	.byte	0x2
 	.2byte	0x3ea
 	.4byte	0x3ae
 	.uleb128 0x43
-	.4byte	.LASF349
+	.4byte	.LASF350
 	.byte	0x2
 	.2byte	0x3eb
 	.4byte	0x50
@@ -6959,86 +6878,86 @@ __func__.9342:
 	.ascii	"len\000"
 	.byte	0x2
 	.2byte	0x3eb
-	.4byte	0x1d10
+	.4byte	0x1d2e
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF380
+	.4byte	.LASF383
 	.byte	0x2
 	.2byte	0x2e0
 	.4byte	0x13d
 	.byte	0x3
-	.4byte	0x2715
+	.4byte	0x2709
 	.uleb128 0x4d
 	.ascii	"hdr\000"
 	.byte	0x2
 	.2byte	0x2e0
-	.4byte	0x2715
+	.4byte	0x2709
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0xad8
 	.uleb128 0x5c
-	.4byte	.LASF381
+	.4byte	.LASF384
 	.byte	0x1a
 	.byte	0x70
 	.4byte	0x70
 	.byte	0x3
-	.4byte	0x2735
+	.4byte	0x2729
 	.uleb128 0x61
 	.ascii	"x\000"
 	.byte	0x1a
 	.byte	0x70
 	.4byte	0x70
 	.byte	0
-	.uleb128 0x68
-	.4byte	0x2572
+	.uleb128 0x67
+	.4byte	0x2538
 	.4byte	.LFB227
 	.4byte	.LFE227-.LFB227
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x287c
+	.4byte	0x2870
 	.uleb128 0x31
-	.4byte	0x2582
+	.4byte	0x2548
 	.4byte	.LLST0
 	.uleb128 0x31
-	.4byte	0x2598
+	.4byte	0x255e
 	.4byte	.LLST1
 	.uleb128 0x31
-	.4byte	0x25a3
+	.4byte	0x2569
 	.4byte	.LLST2
 	.uleb128 0x31
-	.4byte	0x25ae
+	.4byte	0x2574
 	.4byte	.LLST3
-	.uleb128 0x69
-	.4byte	0x258d
+	.uleb128 0x68
+	.4byte	0x2553
 	.uleb128 0x6
 	.byte	0xfa
-	.4byte	0x258d
+	.4byte	0x2553
 	.byte	0x9f
 	.uleb128 0x34
-	.4byte	0x25b9
+	.4byte	0x257f
 	.4byte	.LLST4
 	.uleb128 0x34
-	.4byte	0x25c4
+	.4byte	0x258a
 	.4byte	.LLST5
 	.uleb128 0x34
-	.4byte	0x25cf
+	.4byte	0x2595
 	.4byte	.LLST6
 	.uleb128 0x34
-	.4byte	0x25da
+	.4byte	0x25a0
 	.4byte	.LLST7
 	.uleb128 0x33
-	.4byte	0x25e5
+	.4byte	0x25ab
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -28
 	.uleb128 0x34
-	.4byte	0x25f0
+	.4byte	0x25b6
 	.4byte	.LLST8
 	.uleb128 0x3c
 	.4byte	.LVL1
-	.4byte	0x29fb
-	.4byte	0x27c1
+	.4byte	0x29d9
+	.4byte	0x27b5
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -7048,8 +6967,8 @@ __func__.9342:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL5
-	.4byte	0x28d6
-	.4byte	0x27d8
+	.4byte	0x28ca
+	.4byte	0x27cc
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -7059,8 +6978,8 @@ __func__.9342:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL6
-	.4byte	0x2a07
-	.4byte	0x27f2
+	.4byte	0x29e5
+	.4byte	0x27e6
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -7076,8 +6995,8 @@ __func__.9342:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL11
-	.4byte	0x28bf
-	.4byte	0x2818
+	.4byte	0x28b3
+	.4byte	0x280c
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -7105,8 +7024,8 @@ __func__.9342:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL13
-	.4byte	0x28d6
-	.4byte	0x282c
+	.4byte	0x28ca
+	.4byte	0x2820
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -7116,8 +7035,8 @@ __func__.9342:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL14
-	.4byte	0x2a12
-	.4byte	0x2846
+	.4byte	0x29f0
+	.4byte	0x283a
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -7133,8 +7052,8 @@ __func__.9342:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL18
-	.4byte	0x28bf
-	.4byte	0x286c
+	.4byte	0x28b3
+	.4byte	0x2860
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -7162,7 +7081,7 @@ __func__.9342:
 	.byte	0
 	.uleb128 0x37
 	.4byte	.LVL23
-	.4byte	0x2a1d
+	.4byte	0x29fb
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
@@ -7170,186 +7089,176 @@ __func__.9342:
 	.byte	0x30
 	.byte	0
 	.byte	0
-	.uleb128 0x68
-	.4byte	0x2600
+	.uleb128 0x67
+	.4byte	0x25c6
 	.4byte	.LFB211
 	.4byte	.LFE211-.LFB211
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x28a0
+	.4byte	0x2894
 	.uleb128 0x31
-	.4byte	0x2610
-	.4byte	.LLST63
-	.uleb128 0x69
-	.4byte	0x261b
+	.4byte	0x25d6
+	.4byte	.LLST60
+	.uleb128 0x68
+	.4byte	0x25e1
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0
 	.uleb128 0xc
 	.4byte	0xdd
-	.4byte	0x28b3
-	.uleb128 0x6a
+	.4byte	0x28a7
+	.uleb128 0x69
 	.4byte	0xcb
 	.4byte	0x19f9
 	.byte	0
-	.uleb128 0x6b
-	.4byte	.LASF382
-	.4byte	.LASF382
-	.byte	0x2
-	.2byte	0x3f5
-	.uleb128 0x6b
-	.4byte	.LASF383
-	.4byte	.LASF383
-	.byte	0x1b
-	.2byte	0x2b2
-	.uleb128 0x6c
-	.4byte	.LASF384
-	.4byte	.LASF384
-	.byte	0x1c
-	.byte	0xaa
-	.uleb128 0x6c
+	.uleb128 0x6a
 	.4byte	.LASF385
 	.4byte	.LASF385
-	.byte	0x1d
-	.byte	0x13
-	.uleb128 0x6b
+	.byte	0x2
+	.2byte	0x3f5
+	.uleb128 0x6a
 	.4byte	.LASF386
 	.4byte	.LASF386
 	.byte	0x1b
-	.2byte	0x1a8
+	.2byte	0x2b2
 	.uleb128 0x6b
 	.4byte	.LASF387
 	.4byte	.LASF387
-	.byte	0x2
-	.2byte	0x42e
+	.byte	0x1c
+	.byte	0xaa
 	.uleb128 0x6b
 	.4byte	.LASF388
 	.4byte	.LASF388
-	.byte	0x2
-	.2byte	0x437
-	.uleb128 0x6c
+	.byte	0x1d
+	.byte	0x13
+	.uleb128 0x6a
 	.4byte	.LASF389
 	.4byte	.LASF389
-	.byte	0x8
-	.byte	0x4a
-	.uleb128 0x6c
+	.byte	0x1b
+	.2byte	0x1a8
+	.uleb128 0x6a
 	.4byte	.LASF390
 	.4byte	.LASF390
-	.byte	0x8
-	.byte	0x72
-	.uleb128 0x6c
+	.byte	0x2
+	.2byte	0x42e
+	.uleb128 0x6a
 	.4byte	.LASF391
 	.4byte	.LASF391
-	.byte	0x8
-	.byte	0x27
-	.uleb128 0x6c
+	.byte	0x2
+	.2byte	0x437
+	.uleb128 0x6b
 	.4byte	.LASF392
 	.4byte	.LASF392
-	.byte	0xc
-	.byte	0xc0
-	.uleb128 0x6c
+	.byte	0x8
+	.byte	0x27
+	.uleb128 0x6b
 	.4byte	.LASF393
 	.4byte	.LASF393
-	.byte	0x1c
-	.byte	0xe0
+	.byte	0xc
+	.byte	0xc0
 	.uleb128 0x6b
 	.4byte	.LASF394
 	.4byte	.LASF394
-	.byte	0x1b
-	.2byte	0x1c1
-	.uleb128 0x6b
+	.byte	0x1c
+	.byte	0xe0
+	.uleb128 0x6a
 	.4byte	.LASF395
 	.4byte	.LASF395
-	.byte	0x2
-	.2byte	0x3f8
-	.uleb128 0x6b
+	.byte	0x1b
+	.2byte	0x1c1
+	.uleb128 0x6a
 	.4byte	.LASF396
 	.4byte	.LASF396
 	.byte	0x2
-	.2byte	0x3fa
-	.uleb128 0x6b
+	.2byte	0x3f8
+	.uleb128 0x6a
 	.4byte	.LASF397
 	.4byte	.LASF397
 	.byte	0x2
-	.2byte	0x3fc
-	.uleb128 0x6b
+	.2byte	0x3fa
+	.uleb128 0x6a
 	.4byte	.LASF398
 	.4byte	.LASF398
 	.byte	0x2
-	.2byte	0x402
-	.uleb128 0x6b
+	.2byte	0x3fc
+	.uleb128 0x6a
 	.4byte	.LASF399
 	.4byte	.LASF399
 	.byte	0x2
-	.2byte	0x401
-	.uleb128 0x6b
+	.2byte	0x402
+	.uleb128 0x6a
 	.4byte	.LASF400
 	.4byte	.LASF400
 	.byte	0x2
-	.2byte	0x404
-	.uleb128 0x6b
+	.2byte	0x401
+	.uleb128 0x6a
 	.4byte	.LASF401
 	.4byte	.LASF401
-	.byte	0x17
-	.2byte	0x371
-	.uleb128 0x6b
+	.byte	0x2
+	.2byte	0x404
+	.uleb128 0x6a
 	.4byte	.LASF402
 	.4byte	.LASF402
-	.byte	0x2
-	.2byte	0x3f9
-	.uleb128 0x6b
+	.byte	0x17
+	.2byte	0x371
+	.uleb128 0x6a
 	.4byte	.LASF403
 	.4byte	.LASF403
 	.byte	0x2
-	.2byte	0x59f
-	.uleb128 0x6b
+	.2byte	0x3f9
+	.uleb128 0x6a
 	.4byte	.LASF404
 	.4byte	.LASF404
 	.byte	0x2
-	.2byte	0x429
-	.uleb128 0x6b
+	.2byte	0x59f
+	.uleb128 0x6a
 	.4byte	.LASF405
 	.4byte	.LASF405
 	.byte	0x2
-	.2byte	0x598
-	.uleb128 0x6c
+	.2byte	0x429
+	.uleb128 0x6a
 	.4byte	.LASF406
 	.4byte	.LASF406
-	.byte	0x1d
-	.byte	0x11
+	.byte	0x2
+	.2byte	0x598
 	.uleb128 0x6b
 	.4byte	.LASF407
 	.4byte	.LASF407
-	.byte	0x17
-	.2byte	0x16d
-	.uleb128 0x6b
+	.byte	0x1d
+	.byte	0x11
+	.uleb128 0x6a
 	.4byte	.LASF408
 	.4byte	.LASF408
-	.byte	0x2
-	.2byte	0x3ff
-	.uleb128 0x6b
+	.byte	0x17
+	.2byte	0x16d
+	.uleb128 0x6a
 	.4byte	.LASF409
 	.4byte	.LASF409
-	.byte	0x1b
-	.2byte	0x182
-	.uleb128 0x6b
+	.byte	0x2
+	.2byte	0x3ff
+	.uleb128 0x6a
 	.4byte	.LASF410
 	.4byte	.LASF410
-	.byte	0x2
-	.2byte	0x5ad
-	.uleb128 0x6c
+	.byte	0x1b
+	.2byte	0x182
+	.uleb128 0x6a
 	.4byte	.LASF411
 	.4byte	.LASF411
-	.byte	0x1b
-	.byte	0xa9
-	.uleb128 0x6c
+	.byte	0x2
+	.2byte	0x5ad
+	.uleb128 0x6b
 	.4byte	.LASF412
 	.4byte	.LASF412
 	.byte	0x1b
-	.byte	0xb6
-	.uleb128 0x6c
-	.4byte	.LASF413
+	.byte	0xa9
+	.uleb128 0x6b
 	.4byte	.LASF413
+	.4byte	.LASF413
+	.byte	0x1b
+	.byte	0xb6
+	.uleb128 0x6b
+	.4byte	.LASF414
+	.4byte	.LASF414
 	.byte	0x8
 	.byte	0x33
 	.byte	0
@@ -8703,31 +8612,6 @@ __func__.9342:
 	.byte	0
 	.byte	0
 	.uleb128 0x66
-	.uleb128 0x2e
-	.byte	0
-	.uleb128 0x3f
-	.uleb128 0x19
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x27
-	.uleb128 0x19
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x12
-	.uleb128 0x6
-	.uleb128 0x40
-	.uleb128 0x18
-	.uleb128 0x2117
-	.uleb128 0x19
-	.byte	0
-	.byte	0
-	.uleb128 0x67
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -8742,7 +8626,7 @@ __func__.9342:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x68
+	.uleb128 0x67
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x31
@@ -8759,7 +8643,7 @@ __func__.9342:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x69
+	.uleb128 0x68
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
@@ -8768,7 +8652,7 @@ __func__.9342:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x6a
+	.uleb128 0x69
 	.uleb128 0x21
 	.byte	0
 	.uleb128 0x49
@@ -8777,7 +8661,7 @@ __func__.9342:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
+	.uleb128 0x6a
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -8794,7 +8678,7 @@ __func__.9342:
 	.uleb128 0x5
 	.byte	0
 	.byte	0
-	.uleb128 0x6c
+	.uleb128 0x6b
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -8814,115 +8698,110 @@ __func__.9342:
 	.byte	0
 	.section	.debug_loc,"",%progbits
 .Ldebug_loc0:
-.LLST66:
-	.4byte	.LVL136
-	.4byte	.LVL143
+.LLST63:
+	.4byte	.LVL130
+	.4byte	.LVL137
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL143
-	.4byte	.LVL146
+	.4byte	.LVL137
+	.4byte	.LVL140
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL146
-	.4byte	.LVL147
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+	.4byte	.LVL141
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL147
+	.4byte	.LVL141
 	.4byte	.LFE226
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
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-	.4byte	.LVL136
-	.4byte	.LVL141
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+	.4byte	.LVL130
+	.4byte	.LVL135
 	.2byte	0x1
 	.byte	0x51
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 	.4byte	.LFE226
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
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-	.4byte	.LVL136
-	.4byte	.LVL139
+.LLST65:
+	.4byte	.LVL130
+	.4byte	.LVL133
 	.2byte	0x1
 	.byte	0x52
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 	.4byte	.LVL139
-	.4byte	.LVL145
 	.2byte	0x3
 	.byte	0x7d
 	.sleb128 100
-	.4byte	.LVL145
-	.4byte	.LVL146
+	.4byte	.LVL139
+	.4byte	.LVL140
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x52
 	.byte	0x9f
-	.4byte	.LVL146
-	.4byte	.LVL201
+	.4byte	.LVL140
+	.4byte	.LVL195
 	.2byte	0x3
 	.byte	0x7d
 	.sleb128 100
+	.4byte	.LVL195
 	.4byte	.LVL201
-	.4byte	.LVL208
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 84
-	.4byte	.LVL208
-	.4byte	.LVL210
+	.4byte	.LVL201
+	.4byte	.LVL204
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x52
 	.byte	0x9f
-	.4byte	.LVL210
-	.4byte	.LVL229
+	.4byte	.LVL204
+	.4byte	.LVL205
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 84
-	.4byte	.LVL229
-	.4byte	.LVL247
+	.4byte	.LVL205
+	.4byte	.LVL242
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x52
 	.byte	0x9f
-	.4byte	.LVL247
-	.4byte	.LVL251
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 84
-	.4byte	.LVL251
+	.4byte	.LVL242
 	.4byte	.LFE226
 	.2byte	0x3
 	.byte	0x7d
 	.sleb128 100
 	.4byte	0
 	.4byte	0
-.LLST69:
-	.4byte	.LVL136
-	.4byte	.LVL140
+.LLST66:
+	.4byte	.LVL130
+	.4byte	.LVL134
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL140
-	.4byte	.LVL143
+	.4byte	.LVL134
+	.4byte	.LVL137
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL143
-	.4byte	.LVL146
+	.4byte	.LVL137
+	.4byte	.LVL140
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x53
 	.byte	0x9f
-	.4byte	.LVL146
-	.4byte	.LVL148-1
+	.4byte	.LVL140
+	.4byte	.LVL142-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL148-1
+	.4byte	.LVL142-1
 	.4byte	.LFE226
 	.2byte	0x4
 	.byte	0xf3
@@ -8931,49 +8810,49 @@ __func__.9342:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST70:
-	.4byte	.LVL137
-	.4byte	.LVL138
+.LLST67:
+	.4byte	.LVL131
+	.4byte	.LVL132
 	.2byte	0x3
 	.byte	0x7d
 	.sleb128 100
 	.4byte	0
 	.4byte	0
-.LLST71:
-	.4byte	.LVL136
-	.4byte	.LVL145
+.LLST68:
+	.4byte	.LVL130
+	.4byte	.LVL139
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xea
 	.byte	0x9f
-	.4byte	.LVL146
-	.4byte	.LVL199
+	.4byte	.LVL140
+	.4byte	.LVL193
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xea
 	.byte	0x9f
-	.4byte	.LVL251
-	.4byte	.LVL252
+	.4byte	.LVL242
+	.4byte	.LVL243
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xea
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST72:
-	.4byte	.LVL146
-	.4byte	.LVL148-1
+.LLST69:
+	.4byte	.LVL140
+	.4byte	.LVL142-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL148-1
-	.4byte	.LVL199
+	.4byte	.LVL142-1
+	.4byte	.LVL193
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x53
 	.byte	0x9f
-	.4byte	.LVL251
-	.4byte	.LVL252
+	.4byte	.LVL242
+	.4byte	.LVL243
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -8981,565 +8860,558 @@ __func__.9342:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST73:
-	.4byte	.LVL146
-	.4byte	.LVL199
+.LLST70:
+	.4byte	.LVL140
+	.4byte	.LVL193
 	.2byte	0x3
 	.byte	0x7d
 	.sleb128 100
-	.4byte	.LVL251
-	.4byte	.LVL252
+	.4byte	.LVL242
+	.4byte	.LVL243
 	.2byte	0x3
 	.byte	0x7d
 	.sleb128 100
 	.4byte	0
 	.4byte	0
-.LLST74:
-	.4byte	.LVL146
-	.4byte	.LVL199
+.LLST71:
+	.4byte	.LVL140
+	.4byte	.LVL193
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL251
-	.4byte	.LVL252
+	.4byte	.LVL242
+	.4byte	.LVL243
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST75:
-	.4byte	.LVL146
-	.4byte	.LVL147
+.LLST72:
+	.4byte	.LVL140
+	.4byte	.LVL141
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL147
-	.4byte	.LVL199
+	.4byte	.LVL141
+	.4byte	.LVL193
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL251
-	.4byte	.LVL252
+	.4byte	.LVL242
+	.4byte	.LVL243
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST76:
-	.4byte	.LVL149
-	.4byte	.LVL150-1
+.LLST73:
+	.4byte	.LVL143
+	.4byte	.LVL144-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL150-1
-	.4byte	.LVL199
+	.4byte	.LVL144-1
+	.4byte	.LVL193
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
-.LLST77:
-	.4byte	.LVL155
-	.4byte	.LVL156
+.LLST74:
+	.4byte	.LVL149
+	.4byte	.LVL150
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL156
-	.4byte	.LVL157-1
+	.4byte	.LVL150
+	.4byte	.LVL151-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL157-1
-	.4byte	.LVL161
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 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL161
-	.4byte	.LVL162
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+	.4byte	.LVL156
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL163
-	.4byte	.LVL164
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+	.4byte	.LVL158
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL164
-	.4byte	.LVL165-1
+	.4byte	.LVL158
+	.4byte	.LVL159-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL169
-	.4byte	.LVL170
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+	.4byte	.LVL164
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL172
-	.4byte	.LVL175
+	.4byte	.LVL166
+	.4byte	.LVL169
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL183
-	.4byte	.LVL184
+	.4byte	.LVL177
+	.4byte	.LVL178
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST78:
-	.4byte	.LVL146
-	.4byte	.LVL168
+.LLST75:
+	.4byte	.LVL140
+	.4byte	.LVL162
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL168
-	.4byte	.LVL169
+	.4byte	.LVL162
+	.4byte	.LVL163
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.4byte	.LVL169
-	.4byte	.LVL170
+	.4byte	.LVL163
+	.4byte	.LVL164
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL170
-	.4byte	.LVL199
+	.4byte	.LVL164
+	.4byte	.LVL193
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
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-	.4byte	.LVL146
-	.4byte	.LVL159
+.LLST76:
+	.4byte	.LVL140
+	.4byte	.LVL153
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL159
-	.4byte	.LVL160
+	.4byte	.LVL153
+	.4byte	.LVL154
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL160
-	.4byte	.LVL165
+	.4byte	.LVL154
+	.4byte	.LVL159
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL166
-	.4byte	.LVL167
+	.4byte	.LVL160
+	.4byte	.LVL161
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL167
-	.4byte	.LVL168
+	.4byte	.LVL161
+	.4byte	.LVL162
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL168
-	.4byte	.LVL171
+	.4byte	.LVL162
+	.4byte	.LVL165
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL171
-	.4byte	.LVL172-1
+	.4byte	.LVL165
+	.4byte	.LVL166-1
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
-	.4byte	.LVL172-1
-	.4byte	.LVL177
+	.4byte	.LVL166-1
+	.4byte	.LVL171
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL178
-	.4byte	.LVL181
+	.4byte	.LVL172
+	.4byte	.LVL175
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL181
-	.4byte	.LVL182-1
+	.4byte	.LVL175
+	.4byte	.LVL176-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL182-1
-	.4byte	.LVL186
+	.4byte	.LVL176-1
+	.4byte	.LVL180
 	.2byte	0x3
 	.byte	0x7d
 	.sleb128 96
-	.4byte	.LVL198
-	.4byte	.LVL199
+	.4byte	.LVL192
+	.4byte	.LVL193
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST80:
-	.4byte	.LVL148
-	.4byte	.LVL149-1
+.LLST77:
+	.4byte	.LVL142
+	.4byte	.LVL143-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL149-1
-	.4byte	.LVL199
+	.4byte	.LVL143-1
+	.4byte	.LVL193
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL251
-	.4byte	.LVL252
+	.4byte	.LVL242
+	.4byte	.LVL243
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST81:
-	.4byte	.LVL151
-	.4byte	.LVL152
+.LLST78:
+	.4byte	.LVL145
+	.4byte	.LVL146
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL152
-	.4byte	.LVL153
+	.4byte	.LVL146
+	.4byte	.LVL147
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL153
-	.4byte	.LVL154
+	.4byte	.LVL147
+	.4byte	.LVL148
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL154
-	.4byte	.LVL155-1
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+	.4byte	.LVL149-1
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
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-	.4byte	.LVL173
-	.4byte	.LVL174
+.LLST79:
+	.4byte	.LVL167
+	.4byte	.LVL168
 	.2byte	0x3
 	.byte	0x74
 	.sleb128 4
 	.byte	0x9f
-	.4byte	.LVL174
-	.4byte	.LVL176-1
+	.4byte	.LVL168
+	.4byte	.LVL170-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL176-1
-	.4byte	.LVL176
+	.4byte	.LVL170-1
+	.4byte	.LVL170
 	.2byte	0x3
 	.byte	0x74
 	.sleb128 4
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST83:
-	.4byte	.LVL173
-	.4byte	.LVL176
+.LLST80:
+	.4byte	.LVL167
+	.4byte	.LVL170
 	.2byte	0x1
 	.byte	0x5b
 	.4byte	0
 	.4byte	0
-.LLST84:
-	.4byte	.LVL173
-	.4byte	.LVL176
+.LLST81:
+	.4byte	.LVL167
+	.4byte	.LVL170
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST85:
-	.4byte	.LVL179
-	.4byte	.LVL180
+.LLST82:
+	.4byte	.LVL173
+	.4byte	.LVL174
 	.2byte	0x4
 	.byte	0x7d
-	.sleb128 104
+	.sleb128 112
 	.byte	0x9f
-	.4byte	.LVL180
-	.4byte	.LVL182-1
+	.4byte	.LVL174
+	.4byte	.LVL176-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL182-1
-	.4byte	.LVL182
+	.4byte	.LVL176-1
+	.4byte	.LVL176
 	.2byte	0x4
 	.byte	0x7d
-	.sleb128 104
+	.sleb128 112
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
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-	.4byte	.LVL179
-	.4byte	.LVL181
+.LLST83:
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+	.4byte	.LVL175
 	.2byte	0x1
 	.byte	0x50
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-	.4byte	.LVL182-1
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+	.4byte	.LVL176-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL182-1
-	.4byte	.LVL182
+	.4byte	.LVL176-1
+	.4byte	.LVL176
 	.2byte	0x3
 	.byte	0x7d
 	.sleb128 96
 	.4byte	0
 	.4byte	0
-.LLST87:
-	.4byte	.LVL179
-	.4byte	.LVL182
+.LLST84:
+	.4byte	.LVL173
+	.4byte	.LVL176
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
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-	.4byte	.LVL187
-	.4byte	.LVL192
+.LLST85:
+	.4byte	.LVL181
+	.4byte	.LVL186
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL192
-	.4byte	.LVL196
+	.4byte	.LVL186
+	.4byte	.LVL190
 	.2byte	0x4
 	.byte	0x7d
-	.sleb128 164
+	.sleb128 172
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST89:
-	.4byte	.LVL187
-	.4byte	.LVL188
+.LLST86:
+	.4byte	.LVL181
+	.4byte	.LVL182
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL188
-	.4byte	.LVL196
+	.4byte	.LVL182
+	.4byte	.LVL190
 	.2byte	0x3
 	.byte	0x7d
 	.sleb128 96
 	.4byte	0
 	.4byte	0
-.LLST90:
-	.4byte	.LVL187
-	.4byte	.LVL196
+.LLST87:
+	.4byte	.LVL181
+	.4byte	.LVL190
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
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-	.4byte	.LVL187
-	.4byte	.LVL196
+.LLST88:
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+	.4byte	.LVL190
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
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-	.4byte	.LVL187
-	.4byte	.LVL189
+.LLST89:
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+	.4byte	.LVL183
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
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-	.4byte	.LVL190
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+	.4byte	.LVL184
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
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-	.4byte	.LVL192
-	.4byte	.LVL193
+.LLST90:
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+	.4byte	.LVL187
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL193
-	.4byte	.LVL194-1
+	.4byte	.LVL187
+	.4byte	.LVL188-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL194-1
-	.4byte	.LVL196
+	.4byte	.LVL188-1
+	.4byte	.LVL190
 	.2byte	0x1
 	.byte	0x5b
 	.4byte	0
 	.4byte	0
-.LLST94:
-	.4byte	.LVL199
-	.4byte	.LVL209
+.LLST91:
+	.4byte	.LVL193
+	.4byte	.LVL203
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL210
-	.4byte	.LVL251
+	.4byte	.LVL204
+	.4byte	.LVL242
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST95:
-	.4byte	.LVL199
-	.4byte	.LVL209
+.LLST92:
+	.4byte	.LVL193
+	.4byte	.LVL203
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL210
-	.4byte	.LVL251
+	.4byte	.LVL204
+	.4byte	.LVL242
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST97:
+.LLST94:
+	.4byte	.LVL196
 	.4byte	.LVL202
-	.4byte	.LVL208
 	.2byte	0x2
 	.byte	0x78
 	.sleb128 0
-	.4byte	.LVL208
-	.4byte	.LVL209
+	.4byte	.LVL202
+	.4byte	.LVL203
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 16
-	.4byte	.LVL210
-	.4byte	.LVL229
+	.4byte	.LVL204
+	.4byte	.LVL211
 	.2byte	0x2
 	.byte	0x78
 	.sleb128 0
-	.4byte	.LVL229
-	.4byte	.LVL247
+	.4byte	.LVL211
+	.4byte	.LVL239
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 16
-	.4byte	.LVL247
-	.4byte	.LVL251
+	.4byte	.LVL239
+	.4byte	.LVL240
 	.2byte	0x2
 	.byte	0x78
 	.sleb128 0
+	.4byte	.LVL240
+	.4byte	.LVL242
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 16
 	.4byte	0
 	.4byte	0
-.LLST98:
-	.4byte	.LVL228
-	.4byte	.LVL229
+.LLST95:
+	.4byte	.LVL224
+	.4byte	.LVL225
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL249
-	.4byte	.LVL251
+	.4byte	.LVL241
+	.4byte	.LVL242
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST99:
-	.4byte	.LVL211
-	.4byte	.LVL212
+.LLST96:
+	.4byte	.LVL205
+	.4byte	.LVL206
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL212
-	.4byte	.LVL213-1
+	.4byte	.LVL206
+	.4byte	.LVL218
 	.2byte	0x3
 	.byte	0x77
-	.sleb128 148
-	.4byte	.LVL213-1
-	.4byte	.LVL229
+	.sleb128 84
+	.4byte	.LVL221
+	.4byte	.LVL225
 	.2byte	0x3
 	.byte	0x77
-	.sleb128 80
-	.4byte	.LVL247
-	.4byte	.LVL251
+	.sleb128 84
+	.4byte	.LVL239
+	.4byte	.LVL242
 	.2byte	0x3
 	.byte	0x77
-	.sleb128 80
+	.sleb128 84
 	.4byte	0
 	.4byte	0
-.LLST100:
-	.4byte	.LVL231
-	.4byte	.LVL232
+.LLST97:
+	.4byte	.LVL226
+	.4byte	.LVL227
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL232
-	.4byte	.LVL238
-	.2byte	0x1
-	.byte	0x5b
+	.4byte	.LVL227
+	.4byte	.LVL228-1
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
 	.4byte	0
 	.4byte	0
-.LLST101:
-	.4byte	.LVL222
-	.4byte	.LVL223
+.LLST98:
+	.4byte	.LVL217
+	.4byte	.LVL219
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL223
-	.4byte	.LVL224-1
+	.4byte	.LVL219
+	.4byte	.LVL220-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL224-1
-	.4byte	.LVL225
+	.4byte	.LVL220-1
+	.4byte	.LVL221
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 84
+	.4byte	.LVL221
+	.4byte	.LVL222
 	.2byte	0x1
-	.byte	0x5b
+	.byte	0x50
+	.4byte	.LVL222
 	.4byte	.LVL225
-	.4byte	.LVL226
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 72
+	.4byte	.LVL228
+	.4byte	.LVL229
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL226
 	.4byte	.LVL229
+	.4byte	.LVL230-1
 	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL237
-	.4byte	.LVL239
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL239
+	.byte	0x53
+	.4byte	.LVL241
 	.4byte	.LVL242
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL245
-	.4byte	.LVL247
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL249
-	.4byte	.LVL250
-	.2byte	0x1
-	.byte	0x5b
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 72
 	.4byte	0
 	.4byte	0
-.LLST102:
-	.4byte	.LVL229
+.LLST99:
+	.4byte	.LVL225
 	.4byte	.LVL236
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 84
-	.4byte	.LVL243
-	.4byte	.LVL244
 	.2byte	0x1
-	.byte	0x53
+	.byte	0x55
+	.4byte	.LVL237
+	.4byte	.LVL239
+	.2byte	0x1
+	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST103:
-	.4byte	.LVL216
-	.4byte	.LVL217-1
+.LLST100:
+	.4byte	.LVL210
+	.4byte	.LVL212-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL217-1
-	.4byte	.LVL244
+	.4byte	.LVL212-1
+	.4byte	.LVL236
 	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL245
-	.4byte	.LVL247
+	.byte	0x58
+	.4byte	.LVL237
+	.4byte	.LVL239
 	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL248
-	.4byte	.LVL249
+	.byte	0x58
+	.4byte	.LVL240
+	.4byte	.LVL241
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL249
-	.4byte	.LVL251
+	.4byte	.LVL241
+	.4byte	.LVL242
 	.2byte	0x1
-	.byte	0x55
+	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST104:
-	.4byte	.LVL203
-	.4byte	.LVL204
+.LLST101:
+	.4byte	.LVL197
+	.4byte	.LVL198
 	.2byte	0x6
 	.byte	0x3
 	.4byte	.LC14
 	.byte	0x9f
-	.4byte	.LVL204
-	.4byte	.LVL205
+	.4byte	.LVL198
+	.4byte	.LVL199
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL205
-	.4byte	.LVL206-1
+	.4byte	.LVL199
+	.4byte	.LVL200-1
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST105:
-	.4byte	.LVL217
-	.4byte	.LVL218
+.LLST102:
+	.4byte	.LVL212
+	.4byte	.LVL213
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL218
-	.4byte	.LVL219-1
+	.4byte	.LVL213
+	.4byte	.LVL214-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL220
-	.4byte	.LVL221
+	.4byte	.LVL215
+	.4byte	.LVL216
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL221
-	.4byte	.LVL222-1
+	.4byte	.LVL216
+	.4byte	.LVL217-1
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST106:
-	.4byte	.LVL231
-	.4byte	.LVL244
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL245
-	.4byte	.LVL247
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST96:
-	.4byte	.LVL200
-	.4byte	.LVL204-1
+.LLST93:
+	.4byte	.LVL194
+	.4byte	.LVL198-1
 	.2byte	0x6
 	.byte	0x76
 	.sleb128 8
@@ -9549,12 +9421,12 @@ __func__.9342:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST65:
-	.4byte	.LVL134
-	.4byte	.LVL135
+.LLST62:
+	.4byte	.LVL128
+	.4byte	.LVL129
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL135
+	.4byte	.LVL129
 	.4byte	.LFE223
 	.2byte	0x4
 	.byte	0xf3
@@ -9563,16 +9435,16 @@ __func__.9342:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST15:
-	.4byte	.LVL38
-	.4byte	.LVL42
+.LLST47:
+	.4byte	.LVL105
+	.4byte	.LVL109
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL42
-	.4byte	.LVL50
+	.4byte	.LVL109
+	.4byte	.LVL117
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL50
+	.4byte	.LVL117
 	.4byte	.LFE222
 	.2byte	0x4
 	.byte	0xf3
@@ -9581,16 +9453,16 @@ __func__.9342:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST16:
-	.4byte	.LVL38
-	.4byte	.LVL44
+.LLST48:
+	.4byte	.LVL105
+	.4byte	.LVL111
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL44
-	.4byte	.LVL50
+	.4byte	.LVL111
+	.4byte	.LVL117
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL50
+	.4byte	.LVL117
 	.4byte	.LFE222
 	.2byte	0x4
 	.byte	0xf3
@@ -9599,12 +9471,12 @@ __func__.9342:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST17:
-	.4byte	.LVL38
-	.4byte	.LVL39
+.LLST49:
+	.4byte	.LVL105
+	.4byte	.LVL106
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL39
+	.4byte	.LVL106
 	.4byte	.LFE222
 	.2byte	0x4
 	.byte	0xf3
@@ -9613,12 +9485,12 @@ __func__.9342:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST18:
-	.4byte	.LVL38
-	.4byte	.LVL43
+.LLST50:
+	.4byte	.LVL105
+	.4byte	.LVL110
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL43
+	.4byte	.LVL110
 	.4byte	.LFE222
 	.2byte	0x4
 	.byte	0xf3
@@ -9627,16 +9499,16 @@ __func__.9342:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST19:
-	.4byte	.LVL48
-	.4byte	.LVL49
+.LLST51:
+	.4byte	.LVL115
+	.4byte	.LVL116
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST20:
-	.4byte	.LVL40
-	.4byte	.LVL41
+.LLST52:
+	.4byte	.LVL107
+	.4byte	.LVL108
 	.2byte	0x2d
 	.byte	0xf3
 	.uleb128 0x1
@@ -9682,8 +9554,8 @@ __func__.9342:
 	.byte	0x24
 	.byte	0x21
 	.byte	0x9f
-	.4byte	.LVL41
-	.4byte	.LVL47-1
+	.4byte	.LVL108
+	.4byte	.LVL114-1
 	.2byte	0x7
 	.byte	0x72
 	.sleb128 0
@@ -9693,28 +9565,28 @@ __func__.9342:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST21:
-	.4byte	.LVL45
-	.4byte	.LVL50
+.LLST53:
+	.4byte	.LVL112
+	.4byte	.LVL117
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST22:
-	.4byte	.LVL45
-	.4byte	.LVL47
+.LLST54:
+	.4byte	.LVL112
+	.4byte	.LVL114
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST23:
-	.4byte	.LVL45
-	.4byte	.LVL46
+.LLST55:
+	.4byte	.LVL112
+	.4byte	.LVL113
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL46
-	.4byte	.LVL47-1
+	.4byte	.LVL113
+	.4byte	.LVL114-1
 	.2byte	0x7
 	.byte	0x72
 	.sleb128 0
@@ -9724,19 +9596,19 @@ __func__.9342:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST24:
-	.4byte	.LVL45
-	.4byte	.LVL47
+.LLST56:
+	.4byte	.LVL112
+	.4byte	.LVL114
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST64:
-	.4byte	.LVL132
-	.4byte	.LVL133
+.LLST61:
+	.4byte	.LVL126
+	.4byte	.LVL127
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL133
+	.4byte	.LVL127
 	.4byte	.LFE221
 	.2byte	0x4
 	.byte	0xf3
@@ -9745,16 +9617,16 @@ __func__.9342:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST53:
-	.4byte	.LVL115
-	.4byte	.LVL119
+.LLST39:
+	.4byte	.LVL94
+	.4byte	.LVL98
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL119
-	.4byte	.LVL125
+	.4byte	.LVL98
+	.4byte	.LVL104
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL125
+	.4byte	.LVL104
 	.4byte	.LFE218
 	.2byte	0x4
 	.byte	0xf3
@@ -9763,16 +9635,16 @@ __func__.9342:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST54:
-	.4byte	.LVL115
-	.4byte	.LVL118
+.LLST40:
+	.4byte	.LVL94
+	.4byte	.LVL97
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL118
-	.4byte	.LVL125
+	.4byte	.LVL97
+	.4byte	.LVL104
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL125
+	.4byte	.LVL104
 	.4byte	.LFE218
 	.2byte	0x4
 	.byte	0xf3
@@ -9781,16 +9653,16 @@ __func__.9342:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST55:
-	.4byte	.LVL115
-	.4byte	.LVL117
+.LLST41:
+	.4byte	.LVL94
+	.4byte	.LVL96
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL117
-	.4byte	.LVL125
+	.4byte	.LVL96
+	.4byte	.LVL104
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL125
+	.4byte	.LVL104
 	.4byte	.LFE218
 	.2byte	0x4
 	.byte	0xf3
@@ -9799,16 +9671,16 @@ __func__.9342:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST56:
-	.4byte	.LVL115
-	.4byte	.LVL116
+.LLST42:
+	.4byte	.LVL94
+	.4byte	.LVL95
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL116
-	.4byte	.LVL125
+	.4byte	.LVL95
+	.4byte	.LVL104
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL125
+	.4byte	.LVL104
 	.4byte	.LFE218
 	.2byte	0x4
 	.byte	0xf3
@@ -9817,453 +9689,423 @@ __func__.9342:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST57:
-	.4byte	.LVL115
-	.4byte	.LVL125
+.LLST43:
+	.4byte	.LVL94
+	.4byte	.LVL104
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 0
-	.4byte	.LVL125
+	.4byte	.LVL104
 	.4byte	.LFE218
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
 	.4byte	0
 	.4byte	0
-.LLST58:
-	.4byte	.LVL115
-	.4byte	.LVL125
+.LLST44:
+	.4byte	.LVL94
+	.4byte	.LVL104
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 4
-	.4byte	.LVL125
+	.4byte	.LVL104
 	.4byte	.LFE218
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 4
 	.4byte	0
 	.4byte	0
-.LLST59:
-	.4byte	.LVL120
-	.4byte	.LVL121
+.LLST45:
+	.4byte	.LVL99
+	.4byte	.LVL100
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL121
-	.4byte	.LVL122-1
+	.4byte	.LVL100
+	.4byte	.LVL101-1
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
 	.4byte	0
 	.4byte	0
-.LLST60:
-	.4byte	.LVL122
-	.4byte	.LVL123
+.LLST46:
+	.4byte	.LVL101
+	.4byte	.LVL102
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST25:
-	.4byte	.LVL51
-	.4byte	.LVL55
+.LLST15:
+	.4byte	.LVL38
+	.4byte	.LVL43
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL55
+	.4byte	.LVL43
 	.4byte	.LFE217
 	.2byte	0x1
-	.byte	0x57
+	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST26:
-	.4byte	.LVL51
-	.4byte	.LVL56
+.LLST16:
+	.4byte	.LVL38
+	.4byte	.LVL42
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL56
+	.4byte	.LVL42
 	.4byte	.LFE217
 	.2byte	0x3
 	.byte	0x91
-	.sleb128 -72
+	.sleb128 -68
 	.4byte	0
 	.4byte	0
-.LLST27:
-	.4byte	.LVL51
-	.4byte	.LVL53
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL53
-	.4byte	.LVL87
+.LLST17:
+	.4byte	.LVL38
+	.4byte	.LVL39
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL39
+	.4byte	.LVL75
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL87
-	.4byte	.LVL89-1
+	.4byte	.LVL75
+	.4byte	.LVL77-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL89-1
-	.4byte	.LVL101
+	.4byte	.LVL77-1
+	.4byte	.LVL85
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL101
-	.4byte	.LVL102-1
+	.4byte	.LVL85
+	.4byte	.LVL86-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL102-1
+	.4byte	.LVL86-1
 	.4byte	.LFE217
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST28:
-	.4byte	.LVL51
-	.4byte	.LVL52
+.LLST18:
+	.4byte	.LVL38
+	.4byte	.LVL40
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL52
-	.4byte	.LVL65
+	.4byte	.LVL40
+	.4byte	.LVL50
 	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL65
-	.4byte	.LVL80
+	.byte	0x57
+	.4byte	.LVL50
+	.4byte	.LVL68
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x53
 	.byte	0x9f
-	.4byte	.LVL80
-	.4byte	.LVL81
+	.4byte	.LVL68
+	.4byte	.LVL69
 	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL81
-	.4byte	.LVL85
+	.byte	0x57
+	.4byte	.LVL69
+	.4byte	.LVL73
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x53
 	.byte	0x9f
-	.4byte	.LVL85
-	.4byte	.LVL86
+	.4byte	.LVL73
+	.4byte	.LVL74
 	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL86
-	.4byte	.LVL111
+	.byte	0x57
+	.4byte	.LVL74
+	.4byte	.LVL90
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x53
 	.byte	0x9f
-	.4byte	.LVL111
-	.4byte	.LFE217
+	.4byte	.LVL90
+	.4byte	.LVL92
 	.2byte	0x1
-	.byte	0x58
+	.byte	0x57
+	.4byte	.LVL92
+	.4byte	.LFE217
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST29:
-	.4byte	.LVL51
-	.4byte	.LVL80
+.LLST19:
+	.4byte	.LVL38
+	.4byte	.LVL68
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 0
-	.4byte	.LVL80
+	.4byte	.LVL68
 	.4byte	.LFE217
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 0
 	.4byte	0
 	.4byte	0
-.LLST30:
-	.4byte	.LVL51
-	.4byte	.LVL80
+.LLST20:
+	.4byte	.LVL38
+	.4byte	.LVL68
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 4
-	.4byte	.LVL80
+	.4byte	.LVL68
 	.4byte	.LFE217
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 4
 	.4byte	0
 	.4byte	0
-.LLST31:
-	.4byte	.LVL65
-	.4byte	.LVL77
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL81
-	.4byte	.LVL85
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL109
-	.4byte	.LVL110
+.LLST21:
+	.4byte	.LVL53
+	.4byte	.LVL54-1
 	.2byte	0x1
-	.byte	0x58
+	.byte	0x53
+	.4byte	.LVL54-1
+	.4byte	.LVL65
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -80
+	.4byte	.LVL69
+	.4byte	.LVL73
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -80
+	.4byte	.LVL88
+	.4byte	.LVL89
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -80
 	.4byte	0
 	.4byte	0
-.LLST32:
-	.4byte	.LVL69
-	.4byte	.LVL77
+.LLST22:
+	.4byte	.LVL57
+	.4byte	.LVL65
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL83
-	.4byte	.LVL85
+	.4byte	.LVL71
+	.4byte	.LVL73
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL109
-	.4byte	.LVL110
+	.4byte	.LVL88
+	.4byte	.LVL89
 	.2byte	0x1
 	.byte	0x5b
 	.4byte	0
 	.4byte	0
-.LLST33:
-	.4byte	.LVL54
-	.4byte	.LVL79
+.LLST23:
+	.4byte	.LVL41
+	.4byte	.LVL67
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL80
-	.4byte	.LVL114
+	.4byte	.LVL68
+	.4byte	.LVL93
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST34:
-	.4byte	.LVL54
-	.4byte	.LVL63
+.LLST24:
+	.4byte	.LVL41
+	.4byte	.LVL51
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL63
-	.4byte	.LVL77
+	.4byte	.LVL51
+	.4byte	.LVL65
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.4byte	.LVL80
-	.4byte	.LVL81
+	.4byte	.LVL68
+	.4byte	.LVL69
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL81
-	.4byte	.LVL85
+	.4byte	.LVL69
+	.4byte	.LVL73
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.4byte	.LVL85
-	.4byte	.LVL86
+	.4byte	.LVL73
+	.4byte	.LVL74
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL109
-	.4byte	.LVL110
+	.4byte	.LVL88
+	.4byte	.LVL89
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.4byte	.LVL111
-	.4byte	.LVL113
+	.4byte	.LVL90
+	.4byte	.LVL92
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST35:
-	.4byte	.LVL54
-	.4byte	.LVL73
+.LLST25:
+	.4byte	.LVL41
+	.4byte	.LVL61
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL73
-	.4byte	.LVL74
+	.4byte	.LVL61
+	.4byte	.LVL62
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL80
-	.4byte	.LVL83
+	.4byte	.LVL68
+	.4byte	.LVL71
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL85
-	.4byte	.LVL86
+	.4byte	.LVL73
+	.4byte	.LVL74
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL111
+	.4byte	.LVL90
 	.4byte	.LFE217
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST36:
-	.4byte	.LVL57
-	.4byte	.LVL58-1
+.LLST26:
+	.4byte	.LVL44
+	.4byte	.LVL45-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL58-1
+	.4byte	.LVL45-1
 	.4byte	.LFE217
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -76
 	.4byte	0
 	.4byte	0
-.LLST37:
-	.4byte	.LVL68
-	.4byte	.LVL69
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL81
-	.4byte	.LVL82-1
+.LLST27:
+	.4byte	.LVL56
+	.4byte	.LVL57
 	.2byte	0x1
 	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST38:
-	.4byte	.LVL68
-	.4byte	.LVL69
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL81
-	.4byte	.LVL83
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST39:
-	.4byte	.LVL69
-	.4byte	.LVL72
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST40:
 	.4byte	.LVL69
-	.4byte	.LVL72
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST41:
-	.4byte	.LVL74
-	.4byte	.LVL75
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL83
-	.4byte	.LVL84-1
+	.4byte	.LVL70-1
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST42:
-	.4byte	.LVL74
-	.4byte	.LVL75
+.LLST28:
+	.4byte	.LVL56
+	.4byte	.LVL57
 	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL83
-	.4byte	.LVL85
+	.byte	0x58
+	.4byte	.LVL69
+	.4byte	.LVL71
 	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST43:
-	.4byte	.LVL88
-	.4byte	.LVL90
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
+	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST44:
-	.4byte	.LVL88
-	.4byte	.LVL89-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL89-1
-	.4byte	.LVL90
+.LLST29:
+	.4byte	.LVL57
+	.4byte	.LVL60
 	.2byte	0x1
-	.byte	0x55
+	.byte	0x5a
 	.4byte	0
 	.4byte	0
-.LLST45:
-	.4byte	.LVL88
-	.4byte	.LVL89-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL89-1
-	.4byte	.LVL90
+.LLST30:
+	.4byte	.LVL57
+	.4byte	.LVL60
 	.2byte	0x1
-	.byte	0x54
+	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST46:
-	.4byte	.LVL91
-	.4byte	.LVL92
+.LLST31:
+	.4byte	.LVL62
+	.4byte	.LVL63
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL99
-	.4byte	.LVL100-1
+	.4byte	.LVL71
+	.4byte	.LVL72-1
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST47:
-	.4byte	.LVL91
-	.4byte	.LVL92
+.LLST32:
+	.4byte	.LVL62
+	.4byte	.LVL63
 	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL99
-	.4byte	.LVL101
+	.byte	0x58
+	.4byte	.LVL71
+	.4byte	.LVL73
 	.2byte	0x1
-	.byte	0x57
+	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST48:
-	.4byte	.LVL101
-	.4byte	.LVL103
+.LLST33:
+	.4byte	.LVL76
+	.4byte	.LVL78
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST49:
-	.4byte	.LVL101
-	.4byte	.LVL102-1
+.LLST34:
+	.4byte	.LVL76
+	.4byte	.LVL77-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL102-1
-	.4byte	.LVL103
+	.4byte	.LVL77-1
+	.4byte	.LVL78
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST50:
-	.4byte	.LVL101
-	.4byte	.LVL102-1
+.LLST35:
+	.4byte	.LVL76
+	.4byte	.LVL77-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL102-1
-	.4byte	.LVL103
+	.4byte	.LVL77-1
+	.4byte	.LVL78
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST51:
-	.4byte	.LVL104
-	.4byte	.LVL105
+.LLST36:
+	.4byte	.LVL85
+	.4byte	.LVL86
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST37:
+	.4byte	.LVL85
+	.4byte	.LVL86-1
 	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL107
-	.4byte	.LVL108-1
+	.byte	0x51
+	.4byte	.LVL86-1
+	.4byte	.LVL86
 	.2byte	0x1
-	.byte	0x50
+	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST52:
-	.4byte	.LVL104
-	.4byte	.LVL105
+.LLST38:
+	.4byte	.LVL85
+	.4byte	.LVL86-1
 	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL107
-	.4byte	.LVL109
+	.byte	0x50
+	.4byte	.LVL86-1
+	.4byte	.LVL86
 	.2byte	0x1
-	.byte	0x57
+	.byte	0x54
 	.4byte	0
 	.4byte	0
 .LLST9:
@@ -10338,12 +10180,12 @@ __func__.9342:
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST62:
-	.4byte	.LVL128
-	.4byte	.LVL129
+.LLST59:
+	.4byte	.LVL122
+	.4byte	.LVL123
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL129
+	.4byte	.LVL123
 	.4byte	.LFE209
 	.2byte	0x4
 	.byte	0xf3
@@ -10352,12 +10194,26 @@ __func__.9342:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST61:
-	.4byte	.LVL126
-	.4byte	.LVL127
+.LLST58:
+	.4byte	.LVL120
+	.4byte	.LVL121
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL127
+	.4byte	.LVL121
+	.4byte	.LFE208
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST57:
+	.4byte	.LVL118
+	.4byte	.LVL119
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL119
 	.4byte	.LFE207
 	.2byte	0x4
 	.byte	0xf3
@@ -10570,12 +10426,12 @@ __func__.9342:
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST63:
-	.4byte	.LVL130
-	.4byte	.LVL131
+.LLST60:
+	.4byte	.LVL124
+	.4byte	.LVL125
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL131
+	.4byte	.LVL125
 	.4byte	.LFE211
 	.2byte	0x4
 	.byte	0xf3
@@ -10596,12 +10452,12 @@ __func__.9342:
 	.4byte	.LFE227-.LFB227
 	.4byte	.LFB213
 	.4byte	.LFE213-.LFB213
-	.4byte	.LFB222
-	.4byte	.LFE222-.LFB222
 	.4byte	.LFB217
 	.4byte	.LFE217-.LFB217
 	.4byte	.LFB218
 	.4byte	.LFE218-.LFB218
+	.4byte	.LFB222
+	.4byte	.LFE222-.LFB222
 	.4byte	.LFB207
 	.4byte	.LFE207-.LFB207
 	.4byte	.LFB208
@@ -10620,82 +10476,60 @@ __func__.9342:
 	.4byte	0
 	.section	.debug_ranges,"",%progbits
 .Ldebug_ranges0:
-	.4byte	.LBB48
-	.4byte	.LBE48
-	.4byte	.LBB52
-	.4byte	.LBE52
-	.4byte	.LBB58
-	.4byte	.LBE58
+	.4byte	.LBB37
+	.4byte	.LBE37
+	.4byte	.LBB41
+	.4byte	.LBE41
+	.4byte	.LBB47
+	.4byte	.LBE47
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB55
-	.4byte	.LBE55
-	.4byte	.LBB59
-	.4byte	.LBE59
-	.4byte	0
-	.4byte	0
-	.4byte	.LBB60
-	.4byte	.LBE60
-	.4byte	.LBB64
-	.4byte	.LBE64
-	.4byte	.LBB69
-	.4byte	.LBE69
+	.4byte	.LBB44
+	.4byte	.LBE44
+	.4byte	.LBB48
+	.4byte	.LBE48
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB65
-	.4byte	.LBE65
-	.4byte	.LBB70
-	.4byte	.LBE70
-	.4byte	.LBB71
-	.4byte	.LBE71
+	.4byte	.LBB49
+	.4byte	.LBE49
+	.4byte	.LBB53
+	.4byte	.LBE53
+	.4byte	.LBB54
+	.4byte	.LBE54
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB72
-	.4byte	.LBE72
-	.4byte	.LBB79
-	.4byte	.LBE79
+	.4byte	.LBB86
+	.4byte	.LBE86
+	.4byte	.LBB97
+	.4byte	.LBE97
+	.4byte	.LBB107
+	.4byte	.LBE107
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB75
-	.4byte	.LBE75
-	.4byte	.LBB80
-	.4byte	.LBE80
-	.4byte	.LBB81
-	.4byte	.LBE81
+	.4byte	.LBB98
+	.4byte	.LBE98
+	.4byte	.LBB105
+	.4byte	.LBE105
+	.4byte	.LBB106
+	.4byte	.LBE106
 	.4byte	0
 	.4byte	0
+	.4byte	.LBB100
+	.4byte	.LBE100
 	.4byte	.LBB102
 	.4byte	.LBE102
-	.4byte	.LBB113
-	.4byte	.LBE113
-	.4byte	.LBB122
-	.4byte	.LBE122
-	.4byte	0
-	.4byte	0
-	.4byte	.LBB114
-	.4byte	.LBE114
-	.4byte	.LBB120
-	.4byte	.LBE120
-	.4byte	.LBB121
-	.4byte	.LBE121
-	.4byte	0
-	.4byte	0
-	.4byte	.LBB116
-	.4byte	.LBE116
-	.4byte	.LBB117
-	.4byte	.LBE117
 	.4byte	0
 	.4byte	0
 	.4byte	.LFB227
 	.4byte	.LFE227
 	.4byte	.LFB213
 	.4byte	.LFE213
-	.4byte	.LFB222
-	.4byte	.LFE222
 	.4byte	.LFB217
 	.4byte	.LFE217
 	.4byte	.LFB218
 	.4byte	.LFE218
+	.4byte	.LFB222
+	.4byte	.LFE222
 	.4byte	.LFB207
 	.4byte	.LFE207
 	.4byte	.LFB208
@@ -10715,14 +10549,16 @@ __func__.9342:
 	.section	.debug_line,"",%progbits
 .Ldebug_line0:
 	.section	.debug_str,"MS",%progbits,1
-.LASF401:
+.LASF402:
 	.ascii	"memalign_simple\000"
-.LASF351:
+.LASF352:
 	.ascii	"blob\000"
 .LASF132:
 	.ascii	"off_mem_rsvmap\000"
 .LASF203:
 	.ascii	"IH_COMP_GZIP\000"
+.LASF342:
+	.ascii	"slot_suffix\000"
 .LASF18:
 	.ascii	"size_t\000"
 .LASF252:
@@ -10739,11 +10575,11 @@ __func__.9342:
 	.ascii	"NETLOOP_RESTART\000"
 .LASF48:
 	.ascii	"IF_TYPE_MTD\000"
-.LASF418:
+.LASF419:
 	.ascii	"fdt_bootargs_append_ab\000"
-.LASF393:
+.LASF394:
 	.ascii	"fdt_shrink_to_minimum\000"
-.LASF378:
+.LASF381:
 	.ascii	"fit_get_name\000"
 .LASF211:
 	.ascii	"ih_magic\000"
@@ -10751,8 +10587,6 @@ __func__.9342:
 	.ascii	"__func__\000"
 .LASF37:
 	.ascii	"IF_TYPE_DOC\000"
-.LASF416:
-	.ascii	"/home/zzz/u-boot\000"
 .LASF59:
 	.ascii	"part_type\000"
 .LASF112:
@@ -10777,7 +10611,7 @@ __func__.9342:
 	.ascii	"image_header_t\000"
 .LASF257:
 	.ascii	"state\000"
-.LASF344:
+.LASF345:
 	.ascii	"align_len\000"
 .LASF106:
 	.ascii	"bi_dsp_freq\000"
@@ -10823,7 +10657,7 @@ __func__.9342:
 	.ascii	"net_native_vlan\000"
 .LASF63:
 	.ascii	"removable\000"
-.LASF383:
+.LASF386:
 	.ascii	"fdt_getprop\000"
 .LASF24:
 	.ascii	"errno\000"
@@ -10835,7 +10669,7 @@ __func__.9342:
 	.ascii	"IH_OS_ESIX\000"
 .LASF172:
 	.ascii	"IH_TYPE_FIRMWARE\000"
-.LASF413:
+.LASF414:
 	.ascii	"strchr\000"
 .LASF253:
 	.ascii	"initrd_end\000"
@@ -10843,15 +10677,17 @@ __func__.9342:
 	.ascii	"IRQ_STACK_START_IN\000"
 .LASF136:
 	.ascii	"size_dt_strings\000"
-.LASF406:
+.LASF407:
 	.ascii	"puts\000"
-.LASF380:
+.LASF383:
 	.ascii	"image_get_magic\000"
-.LASF381:
+.LASF384:
 	.ascii	"__fswab32\000"
+.LASF417:
+	.ascii	"/home/zzz/code/u-boot\000"
 .LASF302:
 	.ascii	"net_boot_file_size\000"
-.LASF363:
+.LASF364:
 	.ascii	"data\000"
 .LASF292:
 	.ascii	"net_tx_packet\000"
@@ -10867,7 +10703,7 @@ __func__.9342:
 	.ascii	"IF_TYPE_HOST\000"
 .LASF71:
 	.ascii	"ide_bus_offset\000"
-.LASF370:
+.LASF371:
 	.ascii	"spl_fit_get_image_node\000"
 .LASF289:
 	.ascii	"net_server_ethaddr\000"
@@ -10879,11 +10715,11 @@ __func__.9342:
 	.ascii	"signed char\000"
 .LASF21:
 	.ascii	"uint8_t\000"
-.LASF400:
+.LASF401:
 	.ascii	"fit_image_get_data_size\000"
 .LASF86:
 	.ascii	"udevice\000"
-.LASF404:
+.LASF405:
 	.ascii	"fit_image_verify_with_data\000"
 .LASF219:
 	.ascii	"ih_arch\000"
@@ -10907,7 +10743,7 @@ __func__.9342:
 	.ascii	"IF_TYPE_SPINAND\000"
 .LASF259:
 	.ascii	"images\000"
-.LASF379:
+.LASF382:
 	.ascii	"fit_hdr\000"
 .LASF179:
 	.ascii	"IH_TYPE_OMAPIMAGE\000"
@@ -10917,6 +10753,8 @@ __func__.9342:
 	.ascii	"bi_ddr_freq\000"
 .LASF214:
 	.ascii	"ih_size\000"
+.LASF378:
+	.ascii	"partition\000"
 .LASF330:
 	.ascii	"fit_header\000"
 .LASF27:
@@ -10947,7 +10785,7 @@ __func__.9342:
 	.ascii	"IH_TYPE_FIRMWARE_IVT\000"
 .LASF271:
 	.ascii	"enetaddr\000"
-.LASF412:
+.LASF413:
 	.ascii	"fdt_next_subnode\000"
 .LASF324:
 	.ascii	"filename\000"
@@ -10977,7 +10815,7 @@ __func__.9342:
 	.ascii	"bi_flashoffset\000"
 .LASF301:
 	.ascii	"net_boot_file_name\000"
-.LASF391:
+.LASF392:
 	.ascii	"strcmp\000"
 .LASF213:
 	.ascii	"ih_time\000"
@@ -10985,7 +10823,7 @@ __func__.9342:
 	.ascii	"node\000"
 .LASF34:
 	.ascii	"IF_TYPE_SCSI\000"
-.LASF375:
+.LASF379:
 	.ascii	"mtd_part_parse\000"
 .LASF314:
 	.ascii	"__bss_end\000"
@@ -10999,7 +10837,7 @@ __func__.9342:
 	.ascii	"net_rx_packets\000"
 .LASF310:
 	.ascii	"mem_malloc_start\000"
-.LASF372:
+.LASF373:
 	.ascii	"outname\000"
 .LASF124:
 	.ascii	"_datarelro_start_ofs\000"
@@ -11009,11 +10847,11 @@ __func__.9342:
 	.ascii	"ih_ep\000"
 .LASF93:
 	.ascii	"lmb_region\000"
-.LASF369:
+.LASF370:
 	.ascii	"get_aligned_image_offset\000"
 .LASF173:
 	.ascii	"IH_TYPE_SCRIPT\000"
-.LASF385:
+.LASF388:
 	.ascii	"printf\000"
 .LASF182:
 	.ascii	"IH_TYPE_PBLIMAGE\000"
@@ -11037,25 +10875,23 @@ __func__.9342:
 	.ascii	"memory\000"
 .LASF181:
 	.ascii	"IH_TYPE_KERNEL_NOLOAD\000"
-.LASF419:
-	.ascii	"misc_decompress_int_en\000"
 .LASF127:
 	.ascii	"fdt_header\000"
-.LASF403:
+.LASF404:
 	.ascii	"fdt_getprop_u32\000"
 .LASF311:
 	.ascii	"mem_malloc_end\000"
-.LASF410:
+.LASF411:
 	.ascii	"fit_find_config_node\000"
 .LASF249:
 	.ascii	"rd_end\000"
-.LASF347:
+.LASF348:
 	.ascii	"spl_fit_standalone_release\000"
 .LASF254:
 	.ascii	"cmdline_start\000"
 .LASF279:
 	.ascii	"index\000"
-.LASF361:
+.LASF362:
 	.ascii	"nr_sectors\000"
 .LASF235:
 	.ascii	"fit_uname_cfg\000"
@@ -11075,9 +10911,9 @@ __func__.9342:
 	.ascii	"target\000"
 .LASF161:
 	.ascii	"IH_OS_OSE\000"
-.LASF350:
+.LASF351:
 	.ascii	"spl_fit_record_loadable\000"
-.LASF387:
+.LASF390:
 	.ascii	"fit_board_verify_required_sigs\000"
 .LASF308:
 	.ascii	"NETLOOP_FAIL\000"
@@ -11097,11 +10933,11 @@ __func__.9342:
 	.ascii	"uintptr_t\000"
 .LASF208:
 	.ascii	"IH_COMP_ZIMAGE\000"
-.LASF349:
+.LASF350:
 	.ascii	"noffset\000"
 .LASF298:
 	.ascii	"net_our_vlan\000"
-.LASF382:
+.LASF385:
 	.ascii	"fit_image_get_os\000"
 .LASF230:
 	.ascii	"image_info_t\000"
@@ -11109,7 +10945,7 @@ __func__.9342:
 	.ascii	"IH_TYPE_MULTI\000"
 .LASF180:
 	.ascii	"IH_TYPE_AISIMAGE\000"
-.LASF346:
+.LASF347:
 	.ascii	"sectors\000"
 .LASF226:
 	.ascii	"image_len\000"
@@ -11125,7 +10961,7 @@ __func__.9342:
 	.ascii	"IH_TYPE_LPC32XXIMAGE\000"
 .LASF233:
 	.ascii	"legacy_hdr_os_copy\000"
-.LASF394:
+.LASF395:
 	.ascii	"fdt_get_name\000"
 .LASF261:
 	.ascii	"sha256_der_prefix\000"
@@ -11145,15 +10981,15 @@ __func__.9342:
 	.ascii	"protect\000"
 .LASF82:
 	.ascii	"disk_partition_t\000"
-.LASF417:
+.LASF418:
 	.ascii	"fdt_bootargs_append\000"
-.LASF388:
+.LASF391:
 	.ascii	"fit_conf_get_node\000"
 .LASF297:
 	.ascii	"net_null_ethaddr\000"
-.LASF402:
+.LASF403:
 	.ascii	"fit_image_is_preload\000"
-.LASF371:
+.LASF372:
 	.ascii	"spl_fit_get_image_name\000"
 .LASF265:
 	.ascii	"load_addr\000"
@@ -11163,11 +10999,11 @@ __func__.9342:
 	.ascii	"fit_hdr_os\000"
 .LASF122:
 	.ascii	"_datarelrolocal_start_ofs\000"
-.LASF345:
+.LASF346:
 	.ascii	"count\000"
 .LASF186:
 	.ascii	"IH_TYPE_SOCFPGAIMAGE\000"
-.LASF386:
+.LASF389:
 	.ascii	"fdt_path_offset\000"
 .LASF325:
 	.ascii	"read\000"
@@ -11193,9 +11029,9 @@ __func__.9342:
 	.ascii	"IH_TYPE_X86_SETUP\000"
 .LASF99:
 	.ascii	"bi_memsize\000"
-.LASF352:
+.LASF353:
 	.ascii	"image\000"
-.LASF358:
+.LASF359:
 	.ascii	"comp_addr\000"
 .LASF28:
 	.ascii	"image_base\000"
@@ -11205,11 +11041,11 @@ __func__.9342:
 	.ascii	"write_hwaddr\000"
 .LASF201:
 	.ascii	"IH_TYPE_COUNT\000"
-.LASF356:
+.LASF357:
 	.ascii	"offset\000"
 .LASF35:
 	.ascii	"IF_TYPE_ATAPI\000"
-.LASF384:
+.LASF387:
 	.ascii	"fdt_record_loadable\000"
 .LASF46:
 	.ascii	"IF_TYPE_SPINOR\000"
@@ -11229,7 +11065,7 @@ __func__.9342:
 	.ascii	"IF_TYPE_RKNAND\000"
 .LASF104:
 	.ascii	"bi_sramsize\000"
-.LASF360:
+.LASF361:
 	.ascii	"overhead\000"
 .LASF90:
 	.ascii	"long double\000"
@@ -11243,7 +11079,7 @@ __func__.9342:
 	.ascii	"IH_COMP_LZMA\000"
 .LASF267:
 	.ascii	"save_size\000"
-.LASF367:
+.LASF368:
 	.ascii	"data_size\000"
 .LASF327:
 	.ascii	"info\000"
@@ -11277,7 +11113,7 @@ __func__.9342:
 	.ascii	"image_header\000"
 .LASF31:
 	.ascii	"lbaint_t\000"
-.LASF357:
+.LASF358:
 	.ascii	"length\000"
 .LASF23:
 	.ascii	"__be32\000"
@@ -11289,7 +11125,7 @@ __func__.9342:
 	.ascii	"IH_OS_NCR\000"
 .LASF224:
 	.ascii	"image_info\000"
-.LASF405:
+.LASF406:
 	.ascii	"board_fit_image_post_process\000"
 .LASF163:
 	.ascii	"IH_OS_OPENRTOS\000"
@@ -11301,17 +11137,17 @@ __func__.9342:
 	.ascii	"spl_image_info\000"
 .LASF338:
 	.ascii	"images_noffset\000"
-.LASF366:
+.LASF367:
 	.ascii	"get_aligned_image_size\000"
-.LASF362:
+.LASF363:
 	.ascii	"image_comp\000"
 .LASF42:
 	.ascii	"IF_TYPE_SYSTEMACE\000"
 .LASF322:
 	.ascii	"spl_load_info\000"
-.LASF415:
+.LASF416:
 	.ascii	"common/spl/spl_fit_tb_arm_v7.c\000"
-.LASF411:
+.LASF412:
 	.ascii	"fdt_first_subnode\000"
 .LASF49:
 	.ascii	"IF_TYPE_COUNT\000"
@@ -11325,7 +11161,7 @@ __func__.9342:
 	.ascii	"region\000"
 .LASF137:
 	.ascii	"size_dt_struct\000"
-.LASF376:
+.LASF377:
 	.ascii	"dev_desc\000"
 .LASF335:
 	.ascii	"os_type\000"
@@ -11343,7 +11179,7 @@ __func__.9342:
 	.ascii	"bi_enetaddr\000"
 .LASF87:
 	.ascii	"mtd_info\000"
-.LASF353:
+.LASF354:
 	.ascii	"spl_fit_load_blob\000"
 .LASF54:
 	.ascii	"SIG_TYPE_GUID\000"
@@ -11353,11 +11189,9 @@ __func__.9342:
 	.ascii	"init\000"
 .LASF76:
 	.ascii	"disk_partition\000"
-.LASF390:
-	.ascii	"memcmp\000"
 .LASF153:
 	.ascii	"IH_OS_VXWORKS\000"
-.LASF398:
+.LASF399:
 	.ascii	"fit_image_get_data_position\000"
 .LASF263:
 	.ascii	"__dtb_dt_begin\000"
@@ -11385,31 +11219,31 @@ __func__.9342:
 	.ascii	"bi_busfreq\000"
 .LASF6:
 	.ascii	"short int\000"
-.LASF359:
+.LASF360:
 	.ascii	"load_ptr\000"
 .LASF194:
 	.ascii	"IH_TYPE_ZYNQMPIMAGE\000"
 .LASF206:
 	.ascii	"IH_COMP_LZO\000"
-.LASF395:
+.LASF396:
 	.ascii	"fit_image_get_comp\000"
 .LASF183:
 	.ascii	"IH_TYPE_MXSIMAGE\000"
-.LASF399:
+.LASF400:
 	.ascii	"fit_image_get_data_offset\000"
 .LASF56:
 	.ascii	"mbr_sig\000"
 .LASF266:
 	.ascii	"save_addr\000"
-.LASF396:
+.LASF397:
 	.ascii	"fit_image_get_load\000"
 .LASF159:
 	.ascii	"IH_OS_UNITY\000"
-.LASF348:
+.LASF349:
 	.ascii	"spl_fit_image_get_os\000"
 .LASF140:
 	.ascii	"IH_OS_OPENBSD\000"
-.LASF373:
+.LASF374:
 	.ascii	"conf_node\000"
 .LASF164:
 	.ascii	"IH_OS_ARM_TRUSTED_FIRMWARE\000"
@@ -11421,17 +11255,17 @@ __func__.9342:
 	.ascii	"_datarellocal_start_ofs\000"
 .LASF155:
 	.ascii	"IH_OS_QNX\000"
-.LASF389:
-	.ascii	"strlen\000"
+.LASF376:
+	.ascii	"spl_get_current_slot\000"
 .LASF326:
 	.ascii	"spl_image\000"
 .LASF260:
 	.ascii	"sha1_der_prefix\000"
 .LASF73:
 	.ascii	"block_drvr\000"
-.LASF407:
+.LASF408:
 	.ascii	"memcpy\000"
-.LASF342:
+.LASF343:
 	.ascii	"spl_load_simple_fit\000"
 .LASF84:
 	.ascii	"flash_id\000"
@@ -11439,7 +11273,7 @@ __func__.9342:
 	.ascii	"fit_noffset_setup\000"
 .LASF138:
 	.ascii	"working_fdt\000"
-.LASF368:
+.LASF369:
 	.ascii	"get_aligned_image_overhead\000"
 .LASF287:
 	.ascii	"net_root_path\000"
@@ -11463,11 +11297,11 @@ __func__.9342:
 	.ascii	"IH_OS_PSOS\000"
 .LASF152:
 	.ascii	"IH_OS_LYNXOS\000"
-.LASF397:
+.LASF398:
 	.ascii	"fit_image_get_comp_addr\000"
-.LASF409:
+.LASF410:
 	.ascii	"fdt_subnode_offset\000"
-.LASF414:
+.LASF415:
 	.ascii	"GNU C11 6.3.1 20170404 -mthumb -mthumb-interwork -m"
 	.ascii	"abi=aapcs-linux -mno-unaligned-access -mfloat-abi=s"
 	.ascii	"oft -march=armv7-a -mtune=cortex-a9 -mfpu=vfpv3-d16"
@@ -11491,7 +11325,7 @@ __func__.9342:
 	.ascii	"IH_OS_DELL\000"
 .LASF96:
 	.ascii	"reserved\000"
-.LASF354:
+.LASF355:
 	.ascii	"spl_fit_append_fdt\000"
 .LASF316:
 	.ascii	"entry_point\000"
@@ -11503,7 +11337,7 @@ __func__.9342:
 	.ascii	"short unsigned int\000"
 .LASF128:
 	.ascii	"magic\000"
-.LASF343:
+.LASF344:
 	.ascii	"spl_kernel_partition\000"
 .LASF245:
 	.ascii	"fit_hdr_setup\000"
@@ -11513,15 +11347,15 @@ __func__.9342:
 	.ascii	"base\000"
 .LASF160:
 	.ascii	"IH_OS_INTEGRITY\000"
-.LASF374:
+.LASF375:
 	.ascii	"slot\000"
 .LASF83:
 	.ascii	"sector_count\000"
-.LASF377:
+.LASF380:
 	.ascii	"fit_config_verify\000"
 .LASF221:
 	.ascii	"ih_comp\000"
-.LASF364:
+.LASF365:
 	.ascii	"external_data\000"
 .LASF340:
 	.ascii	"part_info\000"
@@ -11531,11 +11365,11 @@ __func__.9342:
 	.ascii	"SIG_TYPE_COUNT\000"
 .LASF250:
 	.ascii	"ft_addr\000"
-.LASF365:
+.LASF366:
 	.ascii	"preload\000"
 .LASF4:
 	.ascii	"uchar\000"
-.LASF392:
+.LASF393:
 	.ascii	"part_get_info_by_name\000"
 .LASF148:
 	.ascii	"IH_OS_IRIX\000"
@@ -11551,7 +11385,7 @@ __func__.9342:
 	.ascii	"net_netmask\000"
 .LASF274:
 	.ascii	"send\000"
-.LASF355:
+.LASF356:
 	.ascii	"spl_load_fit_image\000"
 .LASF119:
 	.ascii	"IRQ_STACK_START\000"
@@ -11559,7 +11393,7 @@ __func__.9342:
 	.ascii	"entry_point_os\000"
 .LASF243:
 	.ascii	"fit_uname_fdt\000"
-.LASF408:
+.LASF409:
 	.ascii	"fit_image_get_data\000"
 	.ident	"GCC: (Linaro GCC 6.3-2017.05) 6.3.1 20170404"
 	.section	.note.GNU-stack,"",%progbits

commit a3cf101896b3d2fa7e0e25385d61f7eb0090c314
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Fri Sep 24 09:59:18 2021 +0800

    lib: optee_clientApi: compatible with optee version 3.13.0
    
    optee version 3.13.0 need exact return value,
    not fixed return success.
    
    Change-Id: Ibde4f885464703f5919281a5956b4d0015b97b91
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/OpteeClientRPC.c b/lib/optee_clientApi/OpteeClientRPC.c
index b46f229b2c..c0e0de0081 100644
--- a/lib/optee_clientApi/OpteeClientRPC.c
+++ b/lib/optee_clientApi/OpteeClientRPC.c
@@ -522,12 +522,13 @@ TEEC_Result OpteeRpcCmdFs(t_teesmc32_arg *TeeSmc32Arg)
 #ifdef CONFIG_OPTEE_V1
 	TeecResult = OpteeClientRkFsProcess((void *)(size_t)TeeSmc32Param[0].u.memref.buf_ptr,
 							TeeSmc32Param[0].u.memref.size);
+	TeeSmc32Arg->ret = TEEC_SUCCESS;
 #endif
 #ifdef CONFIG_OPTEE_V2
 	TeecResult = OpteeClientRkFsProcess((size_t)TeeSmc32Arg->num_params,
 							(struct tee_ioctl_param *)TeeSmc32Param);
+	TeeSmc32Arg->ret = TeecResult;
 #endif
-
 	return TeecResult;
 }
 
@@ -617,7 +618,6 @@ TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs)
 #endif
 		case OPTEE_MSG_RPC_CMD_FS_V2: {
 			TeecResult = OpteeRpcCmdFs(TeeSmc32Arg);
-			TeeSmc32Arg->ret = TEEC_SUCCESS;
 			break;
 		}
 		case OPTEE_MSG_RPC_CMD_LOAD_TA_V2: {

commit a5f116a39542f8f1209e73d1ccd30f8a710f98d8
Author: Damon Ding <damon.ding@rock-chips.com>
Date:   Fri Sep 24 14:20:23 2021 +0800

    drm/rockchip: vop: disable rb_swap by default
    
    On RK3399 platform, R and B are swapped. If not set the default value,
    the bmp will display abnormally when calling function
    rockchip_vop_set_plane() each time. Related codes were showed as below:
    
    /*
     * vop full need to treats rgb888 as bgr888 so we reverse the rb swap
     * to workaround
     */
    if (crtc_state->format == ROCKCHIP_FMT_RGB888 && VOP_MAJOR(vop_data->version) == 3)
            crtc_state->rb_swap = !crtc_state->rb_swap;
    
    Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
    Change-Id: I450477017ae73c18dad806efec7a44ac3e49b094

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index ab11f628ee..36e3fd256a 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -1088,6 +1088,7 @@ static int display_logo(struct display_state *state)
 	crtc_state->src_x = 0;
 	crtc_state->src_y = 0;
 	crtc_state->ymirror = logo->ymirror;
+	crtc_state->rb_swap = 0;
 
 	crtc_state->dma_addr = (u32)(unsigned long)logo->mem + logo->offset;
 	crtc_state->xvir = ALIGN(crtc_state->src_w * logo->bpp, 32) >> 5;

commit e4c23c1eac31a6266f06325dab36cda4535b6658
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Sat Sep 25 15:01:47 2021 +0800

    rockchip: rk3308: Add support to change thermal configure
    
    Change-Id: I8d896fad932c86d9bd00bcca2f2c2d290fdaaa9d
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3308/rk3308.c b/arch/arm/mach-rockchip/rk3308/rk3308.c
index 361b21d0cb..1a4f45a551 100644
--- a/arch/arm/mach-rockchip/rk3308/rk3308.c
+++ b/arch/arm/mach-rockchip/rk3308/rk3308.c
@@ -375,8 +375,10 @@ static int fdt_fixup_cpu_opp_table(const void *blob)
 	int len;
 	u32 phandle;
 	u32 *pp;
+	u32 val;
 	bool is_opp_enabled;
 
+	/* Replace opp table */
 	opp_node = fdt_path_offset(blob, "/rk3308bs-cpu0-opp-table");
 	if (opp_node < 0) {
 		printf("Failed to get rk3308bs-cpu0-opp-table node\n");
@@ -409,6 +411,7 @@ static int fdt_fixup_cpu_opp_table(const void *blob)
 		return -EINVAL;
 	}
 
+	/* Enable 1296MHz and 1200MHz */
 	is_opp_enabled = false;
 	sub_node = fdt_subnode_offset(blob, old_opp_node, "opp-1296000000");
 	if (sub_node >= 0) {
@@ -439,6 +442,31 @@ static int fdt_fixup_cpu_opp_table(const void *blob)
 			printf("Failed to set 1200 okay\n");
 	}
 
+	/* Add high temp configure */
+	pp = (u32 *)fdt_getprop(blob, old_opp_node, "rockchip,high-temp", &len);
+	if (pp) {
+		val = fdt32_to_cpu(*pp);
+		pp = (u32 *)fdt_getprop(blob, opp_node,
+					"rockchip,high-temp", &len);
+		if (!pp) {
+			if (fdt_setprop_u32((void *)blob, opp_node,
+					    "rockchip,high-temp", val))
+				printf("Failed to set high temp prop\n");
+		}
+	}
+	pp = (u32 *)fdt_getprop(blob, old_opp_node,
+				"rockchip,high-temp-max-volt", &len);
+	if (pp) {
+		val = fdt32_to_cpu(*pp);
+		pp = (u32 *)fdt_getprop(blob, opp_node,
+					"rockchip,high-temp-max-volt", &len);
+		if (!pp) {
+			if (fdt_setprop_u32((void *)blob, opp_node,
+					    "rockchip,high-temp-max-volt", val))
+				printf("Failed to set high temp max volt prop\n");
+		}
+	}
+
 	return 0;
 }
 
@@ -475,11 +503,38 @@ static int fdt_fixup_dmc_opp_table(const void *blob)
 	return 0;
 }
 
+static int fdt_fixup_thermal_zones(const void *blob)
+{
+	int thermal_node;
+	int len;
+	u32 *pp;
+	u32 val;
+
+	thermal_node = fdt_path_offset(blob, "/thermal-zones/soc-thermal");
+	if (thermal_node < 0) {
+		printf("Failed to get soc thermal node\n");
+		return -EINVAL;
+	}
+
+	pp = (u32 *)fdt_getprop(blob, thermal_node,
+				"rk3308bs-sustainable-power", &len);
+	if (pp) {
+		val = fdt32_to_cpu(*pp);
+		pp = (u32 *)fdt_getprop(blob, thermal_node,
+					"sustainable-power", &len);
+		if (pp)
+			pp[0] = cpu_to_fdt32(val);
+	}
+
+	return 0;
+}
+
 int rk_board_fdt_fixup(const void *blob)
 {
 	if (soc_is_rk3308bs()) {
 		fdt_fixup_cpu_opp_table(blob);
 		fdt_fixup_dmc_opp_table(blob);
+		fdt_fixup_thermal_zones(blob);
 	}
 
 	return 0;

commit 92d3587863d327e3b48e0eaf5c37db8e7f614b36
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Thu Sep 23 16:58:25 2021 +0800

    driver: pci: rockchip: reduce redundant waiting
    
    1.Reduce redundant waiting
    2.Rest rst_gpio earlier to avoid waiting.
    
    Change-Id: I128e7b73d9ba5d85d5e0d80d93f4567a6de3756b
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/pci/pcie_dw_rockchip.c b/drivers/pci/pcie_dw_rockchip.c
index 6f783cc88a..dfd56b6ad8 100644
--- a/drivers/pci/pcie_dw_rockchip.c
+++ b/drivers/pci/pcie_dw_rockchip.c
@@ -515,12 +515,9 @@ static int rk_pcie_link_up(struct rk_pcie *priv, u32 cap_speed)
 	/* DW pre link configurations */
 	rk_pcie_configure(priv, cap_speed);
 
-	/* Rest the device */
-	if (dm_gpio_is_valid(&priv->rst_gpio)) {
-		dm_gpio_set_value(&priv->rst_gpio, 0);
-		msleep(1000);
+	/* Release the device */
+	if (dm_gpio_is_valid(&priv->rst_gpio))
 		dm_gpio_set_value(&priv->rst_gpio, 1);
-	}
 
 	rk_pcie_disable_ltssm(priv);
 	rk_pcie_link_status_clear(priv);
@@ -542,7 +539,7 @@ static int rk_pcie_link_up(struct rk_pcie *priv, u32 cap_speed)
 		dev_info(priv->dev, "PCIe Linking... LTSSM is 0x%x\n",
 			 rk_pcie_readl_apb(priv, PCIE_CLIENT_LTSSM_STATUS));
 		rk_pcie_debug_dump(priv);
-		msleep(100);
+		msleep(10);
 	}
 
 	dev_err(priv->dev, "PCIe-%d Link Fail\n", priv->dev->seq);
@@ -556,6 +553,10 @@ static int rockchip_pcie_init_port(struct udevice *dev)
 	struct rk_pcie *priv = dev_get_priv(dev);
 	union phy_configure_opts phy_cfg;
 
+	/* Rest the device */
+	if (dm_gpio_is_valid(&priv->rst_gpio))
+		dm_gpio_set_value(&priv->rst_gpio, 0);
+
 	/* Set power and maybe external ref clk input */
 	if (priv->vpcie3v3) {
 		ret = regulator_set_enable(priv->vpcie3v3, true);
@@ -566,8 +567,6 @@ static int rockchip_pcie_init_port(struct udevice *dev)
 		}
 	}
 
-	msleep(1000);
-
 	if (priv->is_bifurcation) {
 		phy_cfg.pcie.is_bifurcation = true;
 		ret = generic_phy_configure(&priv->phy, &phy_cfg);

commit 32aabf131f74ddbd19783be0c347c5d8171a764b
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Thu Sep 23 16:57:08 2021 +0800

    driver: pci: rockchip: change to use regulator_set_enable
    
    Cause regulator set_value is not implemented, so change to use
    set_enable.
    
    Change-Id: Ie133dbf1d397e231d6fd9d893b404ec5fd7a7441
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/pci/pcie_dw_rockchip.c b/drivers/pci/pcie_dw_rockchip.c
index bf6dec7b74..6f783cc88a 100644
--- a/drivers/pci/pcie_dw_rockchip.c
+++ b/drivers/pci/pcie_dw_rockchip.c
@@ -558,7 +558,7 @@ static int rockchip_pcie_init_port(struct udevice *dev)
 
 	/* Set power and maybe external ref clk input */
 	if (priv->vpcie3v3) {
-		ret = regulator_set_value(priv->vpcie3v3, 3300000);
+		ret = regulator_set_enable(priv->vpcie3v3, true);
 		if (ret) {
 			dev_err(priv->dev, "failed to enable vpcie3v3 (ret=%d)\n",
 				ret);

commit 5121dd141dfb14c32208129decc2d66895baac0c
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Tue Jun 22 21:16:21 2021 +0800

    UPSTREAM: nvme: Don't clear nvme blk device's priv space
    
    A udevice's priv space is cleared in alloc_priv() in the DM core.
    Don't do it again in its probe() routine.
    
    Change-Id: Ia11053d05522db13add372e7deb32d5a465496eb
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 78d5f2011e2acf8e2f259d2886f1ceb4d789e0be)

diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c
index 79c5eb93d8..7cb1bd4e4d 100644
--- a/drivers/nvme/nvme.c
+++ b/drivers/nvme/nvme.c
@@ -700,7 +700,6 @@ static int nvme_blk_probe(struct udevice *udev)
 	if (!id)
 		return -ENOMEM;
 
-	memset(ns, 0, sizeof(*ns));
 	ns->dev = ndev;
 	/* extract the namespace id from the block device name */
 	ns->ns_id = trailing_strtol(udev->name);

commit 11bd08e3fc101f69289b1da45da9aed22c581346
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Tue Jun 22 21:16:20 2021 +0800

    UPSTREAM: nvme: Drop useless members of 'struct nvme_ns'
    
    mode_select_num_blocks and mode_select_block_len in 'struct nvme_ns'
    are not useful. Drop them.
    
    Change-Id: I2e2b2ffdf630d51654db3698e0c7c3a21edfd2f2
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 757cc4b1b2725e445a94840aa6076f0f0d4f03b9)

diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c
index 19eafdb9ac..79c5eb93d8 100644
--- a/drivers/nvme/nvme.c
+++ b/drivers/nvme/nvme.c
@@ -713,11 +713,9 @@ static int nvme_blk_probe(struct udevice *udev)
 	flbas = id->flbas & NVME_NS_FLBAS_LBA_MASK;
 	ns->flbas = flbas;
 	ns->lba_shift = id->lbaf[flbas].ds;
-	ns->mode_select_num_blocks = le64_to_cpu(id->nsze);
-	ns->mode_select_block_len = 1 << ns->lba_shift;
 	list_add(&ns->list, &ndev->namespaces);
 
-	desc->lba = ns->mode_select_num_blocks;
+	desc->lba = le64_to_cpu(id->nsze);
 	desc->log2blksz = ns->lba_shift;
 	desc->blksz = 1 << ns->lba_shift;
 	desc->bdev = udev;
diff --git a/drivers/nvme/nvme.h b/drivers/nvme/nvme.h
index a6b98e0cc5..0358f86acb 100644
--- a/drivers/nvme/nvme.h
+++ b/drivers/nvme/nvme.h
@@ -642,8 +642,6 @@ struct nvme_ns {
 	int devnum;
 	int lba_shift;
 	u8 flbas;
-	u64 mode_select_num_blocks;
-	u32 mode_select_block_len;
 };
 
 #endif /* __DRIVER_NVME_H__ */

commit 7522bf7b164d69e557edd7ab6fb30b1cba93e788
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Tue Jun 22 21:16:19 2021 +0800

    UPSTREAM: nvme: Eliminate the offset of one during block dev creation
    
    At present there is an offset of one added during the creation of
    block device. This can be very confusing as we wanted to encode the
    namespace id in the block device name but namespae id cannot be zero.
    
    This changes to use the namespace id directly in the block device
    name, eliminating the offset of one effectively.
    
    Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Change-Id: I80d9bee9338ab5495e770ac7feb8df4fa425e434
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 8c60d40d69fd834f67322bbcea06ef0adf9076e1)

diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c
index 1fb3e0a7d5..19eafdb9ac 100644
--- a/drivers/nvme/nvme.c
+++ b/drivers/nvme/nvme.c
@@ -703,7 +703,7 @@ static int nvme_blk_probe(struct udevice *udev)
 	memset(ns, 0, sizeof(*ns));
 	ns->dev = ndev;
 	/* extract the namespace id from the block device name */
-	ns->ns_id = trailing_strtol(udev->name) + 1;
+	ns->ns_id = trailing_strtol(udev->name);
 	if (nvme_identify(ndev, ns->ns_id, 0, (dma_addr_t)(long)id)) {
 		free(id);
 		return -EIO;
@@ -883,12 +883,12 @@ static int nvme_probe(struct udevice *udev)
 		goto free_queue;
 	}
 
-	for (int i = 0; i < ndev->nn; i++) {
+	for (int i = 1; i <= ndev->nn; i++) {
 		struct udevice *ns_udev;
 		char name[20];
 
 		memset(id, 0, sizeof(*id));
-		if (nvme_identify(ndev, i + 1, 0, (dma_addr_t)(long)id)) {
+		if (nvme_identify(ndev, i, 0, (dma_addr_t)(long)id)) {
 			ret = -EIO;
 			goto free_id;
 		}

commit e802110fced82f2b30bd75871b895377a5ba36c8
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Tue Jun 22 21:16:18 2021 +0800

    UPSTREAM: nvme: Skip block device creation for inactive namespaces
    
    At present for each namespace there is a block device created for it.
    There is no issue if the number of supported namespaces reported from
    the NVMe device is only 1.
    
    Since QEMU commit 7f0f1acedf15 ("hw/block/nvme: support multiple namespaces"),
    the number of supported namespaces reported has been changed from 1
    to 256, but not all of them are active namespaces. The actual active
    one depends on the QEMU command line parameters. A common case is
    that namespace 1 being active and all other 255 being inactive.
    
    If a namespace is inactive, the namespace identify command returns a
    zero filled data structure. We can use field NSZE (namespace size) to
    decide whether a block device should be created for it.
    
    Change-Id: I764b2179c3c23ad115429fe4a2f8b6714fc4014d
    Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 478f7fc6a04ae81af550b56b31f18af24cf3f262)

diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c
index d6db2a36ef..1fb3e0a7d5 100644
--- a/drivers/nvme/nvme.c
+++ b/drivers/nvme/nvme.c
@@ -830,6 +830,7 @@ static int nvme_probe(struct udevice *udev)
 {
 	int ret;
 	struct nvme_dev *ndev = dev_get_priv(udev);
+	struct nvme_id_ns *id;
 
 	ndev->instance = trailing_strtol(udev->name);
 
@@ -875,10 +876,27 @@ static int nvme_probe(struct udevice *udev)
 	nvme_get_info_from_identify(ndev);
 
 	/* Create a blk device for each namespace */
+
+	id = memalign(ndev->page_size, sizeof(struct nvme_id_ns));
+	if (!id) {
+		ret = -ENOMEM;
+		goto free_queue;
+	}
+
 	for (int i = 0; i < ndev->nn; i++) {
 		struct udevice *ns_udev;
 		char name[20];
 
+		memset(id, 0, sizeof(*id));
+		if (nvme_identify(ndev, i + 1, 0, (dma_addr_t)(long)id)) {
+			ret = -EIO;
+			goto free_id;
+		}
+
+		/* skip inactive namespace */
+		if (!id->nsze)
+			continue;
+
 		/*
 		 * Encode the namespace id to the device name so that
 		 * we can extract it when doing the probe.
@@ -889,11 +907,14 @@ static int nvme_probe(struct udevice *udev)
 		ret = blk_create_devicef(udev, "nvme-blk", name, IF_TYPE_NVME,
 					 -1, 512, 0, &ns_udev);
 		if (ret)
-			goto free_queue;
+			goto free_id;
 	}
 
+	free(id);
 	return 0;
 
+free_id:
+	free(id);
 free_queue:
 	free((void *)ndev->queues);
 free_nvme:

commit a6a8d6a19ae5655948ab0fcbcb1da5b0296c74b0
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Tue Jun 22 21:16:17 2021 +0800

    UPSTREAM: nvme: Move block dev creation from uclass post_probe() to driver probe()
    
    At present the block device creation happens in the NVMe uclass
    driver post_probe() phase. In preparation to support multiple
    namespaces, we should issue namespace identify before creating
    block devices but that touches the underlying hardware hence it
    is not appropriate to do such in the uclass driver post_probe().
    Let's move it to driver probe() phase instead.
    
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    (cherry picked from commit 84344258f23fb9ac5abe7383c909f8606ac767b6)
    Change-Id: I1e7b1e499982355a47ea4c2de301c6885f551c36

diff --git a/drivers/nvme/nvme-uclass.c b/drivers/nvme/nvme-uclass.c
index 56a6171876..fdb5bc63d1 100644
--- a/drivers/nvme/nvme-uclass.c
+++ b/drivers/nvme/nvme-uclass.c
@@ -6,38 +6,9 @@
  */
 
 #include <common.h>
-#include <errno.h>
 #include <dm.h>
-#include <dm/device.h>
-#include "nvme.h"
-
-static int nvme_uclass_post_probe(struct udevice *udev)
-{
-	char name[20];
-	struct udevice *ns_udev;
-	int i, ret;
-	struct nvme_dev *ndev = dev_get_priv(udev);
-
-	/* Create a blk device for each namespace */
-	for (i = 0; i < ndev->nn; i++) {
-		/*
-		 * Encode the namespace id to the device name so that
-		 * we can extract it when doing the probe.
-		 */
-		sprintf(name, "blk#%d", i);
-
-		/* The real blksz and size will be set by nvme_blk_probe() */
-		ret = blk_create_devicef(udev, "nvme-blk", name, IF_TYPE_NVME,
-					 -1, 512, 0, &ns_udev);
-		if (ret)
-			return ret;
-	}
-
-	return 0;
-}
 
 UCLASS_DRIVER(nvme) = {
 	.name	= "nvme",
 	.id	= UCLASS_NVME,
-	.post_probe = nvme_uclass_post_probe,
 };
diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c
index af0eb97ca8..d6db2a36ef 100644
--- a/drivers/nvme/nvme.c
+++ b/drivers/nvme/nvme.c
@@ -874,6 +874,24 @@ static int nvme_probe(struct udevice *udev)
 
 	nvme_get_info_from_identify(ndev);
 
+	/* Create a blk device for each namespace */
+	for (int i = 0; i < ndev->nn; i++) {
+		struct udevice *ns_udev;
+		char name[20];
+
+		/*
+		 * Encode the namespace id to the device name so that
+		 * we can extract it when doing the probe.
+		 */
+		sprintf(name, "blk#%d", i);
+
+		/* The real blksz and size will be set by nvme_blk_probe() */
+		ret = blk_create_devicef(udev, "nvme-blk", name, IF_TYPE_NVME,
+					 -1, 512, 0, &ns_udev);
+		if (ret)
+			goto free_queue;
+	}
+
 	return 0;
 
 free_queue:

commit e7daa05a5a427da5fceab0af79c7c21c8440d1a9
Author: Wesley Sheng <wesleyshenggit@sina.com>
Date:   Tue Jun 22 11:34:43 2021 +0800

    UPSTREAM: nvme: Remove the redundant aqa value setting
    
    AQA (Admin Queue Attributes) register is a dword size with
    lower word of ASQS, and higher word of ACQS.
    
    The code set the variable aqa twice, but it is redundant.
    
    Change-Id: Iccf2cccb3604dc55e4092b56bf22095297f69479
    Signed-off-by: Wesley Sheng <wesleyshenggit@sina.com>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit c3e52c71bb0e7e5e34fadafbfcc34bce9899c100)

diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c
index c82475ff8f..af0eb97ca8 100644
--- a/drivers/nvme/nvme.c
+++ b/drivers/nvme/nvme.c
@@ -382,7 +382,6 @@ static int nvme_configure_admin_queue(struct nvme_dev *dev)
 
 	aqa = nvmeq->q_depth - 1;
 	aqa |= aqa << 16;
-	aqa |= aqa << 16;
 
 	dev->page_size = 1 << page_shift;
 

commit 17d24daafb6f208f9637543dbae33451fcc63bc9
Author: Wesley Sheng <wesleyshenggit@sina.com>
Date:   Tue Jun 22 11:34:21 2021 +0800

    UPSTREAM: nvme: Correct the prps per page calculation method
    
    Each prp is 8 bytes, calculate the number of prps
    per page should just divide page size by 8
    there is no need to minus 1
    
    Change-Id: Ic2e9bf861e8eef5418d540e2ca599c890dd0d6d0
    Signed-off-by: Wesley Sheng <wesleyshenggit@sina.com>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 859b33c948945f7904f60a2c12a3792d356d51ad)

diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c
index 76b1a68295..c82475ff8f 100644
--- a/drivers/nvme/nvme.c
+++ b/drivers/nvme/nvme.c
@@ -76,7 +76,7 @@ static int nvme_setup_prps(struct nvme_dev *dev, u64 *prp2,
 	u64 *prp_pool;
 	int length = total_len;
 	int i, nprps;
-	u32 prps_per_page = (page_size >> 3) - 1;
+	u32 prps_per_page = page_size >> 3;
 	u32 num_pages;
 
 	length -= (page_size - offset);

commit 37e08029f0ea0129963671d912bde4df0d70c3d9
Author: David Lamparter <equinox@diac24.net>
Date:   Thu May 6 20:24:30 2021 +0200

    UPSTREAM: nvme: fix for big endian systems
    
    writel() and co. already include the endian swap;  doing the swap twice
    is, er, unhelpful.
    
    Tested on a P4080DS, which boots perfectly fine off NVMe with this.
    
    Change-Id: Id6a90e1ac4749d116e0f78eef526956fcc790252
    Signed-off-by: David Lamparter <equinox@diac24.net>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit b12f62374e83675bc65174c2b4b7e3c6c368aa78)

diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c
index c2d964315c..76b1a68295 100644
--- a/drivers/nvme/nvme.c
+++ b/drivers/nvme/nvme.c
@@ -152,7 +152,7 @@ static u16 nvme_read_completion_status(struct nvme_queue *nvmeq, u16 index)
 
 	invalidate_dcache_range(start, stop);
 
-	return le16_to_cpu(readw(&(nvmeq->cqes[index].status)));
+	return readw(&(nvmeq->cqes[index].status));
 }
 
 /**
@@ -216,7 +216,7 @@ static int nvme_submit_sync_cmd(struct nvme_queue *nvmeq,
 	}
 
 	if (result)
-		*result = le32_to_cpu(readl(&(nvmeq->cqes[head].result)));
+		*result = readl(&(nvmeq->cqes[head].result));
 
 	if (++head == nvmeq->q_depth) {
 		head = 0;
@@ -299,7 +299,7 @@ static int nvme_enable_ctrl(struct nvme_dev *dev)
 {
 	dev->ctrl_config &= ~NVME_CC_SHN_MASK;
 	dev->ctrl_config |= NVME_CC_ENABLE;
-	writel(cpu_to_le32(dev->ctrl_config), &dev->bar->cc);
+	writel(dev->ctrl_config, &dev->bar->cc);
 
 	return nvme_wait_ready(dev, true);
 }
@@ -308,7 +308,7 @@ static int nvme_disable_ctrl(struct nvme_dev *dev)
 {
 	dev->ctrl_config &= ~NVME_CC_SHN_MASK;
 	dev->ctrl_config &= ~NVME_CC_ENABLE;
-	writel(cpu_to_le32(dev->ctrl_config), &dev->bar->cc);
+	writel(dev->ctrl_config, &dev->bar->cc);
 
 	return nvme_wait_ready(dev, false);
 }

commit 524790bc740ef4b5ec1a596eb9e9fb4782312dab
Author: Andre Przywara <andre.przywara@arm.com>
Date:   Tue Mar 2 15:43:43 2021 +0000

    UPSTREAM: nvme: Elaborate on cache maintenance operation in get/set_features
    
    At the moment the nvme_get_features() and nvme_set_features() functions
    carry a (somewhat misleading) comment about missing cache maintenance.
    
    As it turns out, nvme_get_features() has no caller at all in the tree,
    and nvme_set_features' only user doesn't use a DMA buffer.
    
    Mention that in the comment, and leave some breadcrumbs for the future,
    should those functions attract more users.
    
    Change-Id: Ice9717cb8adf0046ff54301b88e9e674dd576220
    Signed-off-by: Andre Przywara <andre.przywara@arm.com>
    Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 4c498796891a26a7283130f367a346096a6ccce7)

diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c
index 2c956b96cf..c2d964315c 100644
--- a/drivers/nvme/nvme.c
+++ b/drivers/nvme/nvme.c
@@ -484,6 +484,7 @@ int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid,
 		      dma_addr_t dma_addr, u32 *result)
 {
 	struct nvme_command c;
+	int ret;
 
 	memset(&c, 0, sizeof(c));
 	c.features.opcode = nvme_admin_get_features;
@@ -491,12 +492,20 @@ int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid,
 	c.features.prp1 = cpu_to_le64(dma_addr);
 	c.features.fid = cpu_to_le32(fid);
 
+	ret = nvme_submit_admin_cmd(dev, &c, result);
+
 	/*
-	 * TODO: add cache invalidate operation when the size of
-	 * the DMA buffer is known
+	 * TODO: Add some cache invalidation when a DMA buffer is involved
+	 * in the request, here and before the command gets submitted. The
+	 * buffer size varies by feature, also some features use a different
+	 * field in the command packet to hold the buffer address.
+	 * Section 5.21.1 (Set Features command) in the NVMe specification
+	 * details the buffer requirements for each feature.
+	 *
+	 * At the moment there is no user of this function.
 	 */
 
-	return nvme_submit_admin_cmd(dev, &c, result);
+	return ret;
 }
 
 int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11,
@@ -511,8 +520,14 @@ int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11,
 	c.features.dword11 = cpu_to_le32(dword11);
 
 	/*
-	 * TODO: add cache flush operation when the size of
-	 * the DMA buffer is known
+	 * TODO: Add a cache clean (aka flush) operation when a DMA buffer is
+	 * involved in the request. The buffer size varies by feature, also
+	 * some features use a different field in the command packet to hold
+	 * the buffer address. Section 5.21.1 (Set Features command) in the
+	 * NVMe specification details the buffer requirements for each
+	 * feature.
+	 * At the moment the only user of this function is not using
+	 * any DMA buffer at all.
 	 */
 
 	return nvme_submit_admin_cmd(dev, &c, result);

commit 1a11099d699a6bd86d2ed955a439c9df9c5e8c11
Author: Andre Przywara <andre.przywara@arm.com>
Date:   Mon Feb 8 13:31:54 2021 +0000

    UPSTREAM: nvme: Always invalidate whole cqes[] array
    
    At the moment nvme_read_completion_status() tries to invalidate a single
    member of the cqes[] array, which is shady as just a single entry is
    not cache line aligned.
    The structure is dictated by hardware, and with 16 bytes is smaller than
    any cache line we usually deal with. Also multiple entries need to be
    consecutive in memory, so we can't pad them to cover a whole cache line.
    
    As a consequence we can only always invalidate all of them - U-Boot just
    uses two of them anyway. This is fine, as they are only ever read by the
    CPU (apart from the initial zeroing), so they can't become dirty.
    
    Make this obvious by always invalidating the whole array, regardless of
    the entry number we are about to read.
    Also blow up the allocation size to cover whole cache lines, to avoid
    other heap allocations to sneak in.
    
    Change-Id: Ic904dec7a3b0717fc68084e63dd431f8d4125dbd
    Signed-off-by: Andre Przywara <andre.przywara@arm.com>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
    Tested-by: Neil Armstrong <narmstrong@baylibre.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit d0c04926cd054cf7360ec15913ac17a465f32603)

diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c
index 23f7f99359..2c956b96cf 100644
--- a/drivers/nvme/nvme.c
+++ b/drivers/nvme/nvme.c
@@ -17,6 +17,8 @@
 #define NVME_AQ_DEPTH		2
 #define NVME_SQ_SIZE(depth)	(depth * sizeof(struct nvme_command))
 #define NVME_CQ_SIZE(depth)	(depth * sizeof(struct nvme_completion))
+#define NVME_CQ_ALLOCATION	ALIGN(NVME_CQ_SIZE(NVME_Q_DEPTH), \
+				      ARCH_DMA_MINALIGN)
 #define ADMIN_TIMEOUT		60
 #define IO_TIMEOUT		30
 #define MAX_PRP_POOL		512
@@ -139,8 +141,14 @@ static __le16 nvme_get_cmd_id(void)
 
 static u16 nvme_read_completion_status(struct nvme_queue *nvmeq, u16 index)
 {
-	u64 start = (ulong)&nvmeq->cqes[index];
-	u64 stop = start + sizeof(struct nvme_completion);
+	/*
+	 * Single CQ entries are always smaller than a cache line, so we
+	 * can't invalidate them individually. However CQ entries are
+	 * read only by the CPU, so it's safe to always invalidate all of them,
+	 * as the cache line should never become dirty.
+	 */
+	ulong start = (ulong)&nvmeq->cqes[0];
+	ulong stop = start + NVME_CQ_ALLOCATION;
 
 	invalidate_dcache_range(start, stop);
 
@@ -236,7 +244,7 @@ static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev,
 		return NULL;
 	memset(nvmeq, 0, sizeof(*nvmeq));
 
-	nvmeq->cqes = (void *)memalign(4096, NVME_CQ_SIZE(depth));
+	nvmeq->cqes = (void *)memalign(4096, NVME_CQ_ALLOCATION);
 	if (!nvmeq->cqes)
 		goto free_nvmeq;
 	memset((void *)nvmeq->cqes, 0, NVME_CQ_SIZE(depth));
@@ -334,7 +342,7 @@ static void nvme_init_queue(struct nvme_queue *nvmeq, u16 qid)
 	nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
 	memset((void *)nvmeq->cqes, 0, NVME_CQ_SIZE(nvmeq->q_depth));
 	flush_dcache_range((ulong)nvmeq->cqes,
-			   (ulong)nvmeq->cqes + NVME_CQ_SIZE(nvmeq->q_depth));
+			   (ulong)nvmeq->cqes + NVME_CQ_ALLOCATION);
 	dev->online_queues++;
 }
 

commit 8ceda4e546425baf0b56fd29ffd3b58f17b4040e
Author: Jagan Teki <jagan@amarulasolutions.com>
Date:   Wed Jun 10 21:18:23 2020 +0200

    UPSTREAM: nvme: Invalidate dcache before submitting admin cmd
    
    This patch try to avoids eviction of dirty lines during DMA
    transfer. The code right now execute the following step:
    
    - allocate the buffer
    - start a dma operation using the non-coherent dma buffer
    - invalidate cache lines associated with the buffer
    - read the buffer
    
    This can lead to reading back not valid information, because the cache
    controller could evict dirty cache lines belonging to the buffer *after*
    the DMA operation has started to fill the DRAM.
    In order to avoid this, a new invalidation is required *before* starting
    the DMA operation. The patch just adds an invalidation before submitting
    the DMA command.
    
    Example below shows the nvme disk scan result without the following
    patch
    
    => nvme scan
    nvme_get_info_from_identify: nn = 544502629, vwc = 100,
    sn = dev_0T, mn = `�\�, fr = t_part, mdts = 105
    
    So, invalidating the cache before submitting the admin command,
    fix the cpu read.
    
    Cc: André Przywara <andre.przywara@arm.com>
    Change-Id: Ib38e7ef860cb86a210eefe187720d98d354af7fe
    Reported-by: Suniel Mahesh <sunil@amarulasolutions.com>
    Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
    Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
    Tested-by: Suniel Mahesh <sunil@amarulasolutions.com>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 1a027a90aaa65ea429a55035f0316eadd0d83180)

diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c
index adf4ea0646..23f7f99359 100644
--- a/drivers/nvme/nvme.c
+++ b/drivers/nvme/nvme.c
@@ -461,6 +461,9 @@ int nvme_identify(struct nvme_dev *dev, unsigned nsid,
 
 	c.identify.cns = cpu_to_le32(cns);
 
+	invalidate_dcache_range(dma_addr,
+				dma_addr + sizeof(struct nvme_id_ctrl));
+
 	ret = nvme_submit_admin_cmd(dev, &c, NULL);
 	if (!ret)
 		invalidate_dcache_range(dma_addr,

commit 7796c58f041650a4933220a1d275bdb24d8f33a3
Author: Patrick Wildt <patrick@blueri.se>
Date:   Wed Oct 16 08:42:04 2019 +0200

    UPSTREAM: nvme: use page-aligned buffer for identify command
    
    Change the stack-allocated buffer for the identification command
    to explicitly allocate page-aligned buffers.  Even though the spec
    seems to allow having admin queue commands on non page-aligned
    buffers, it seems to not be possible on my i.MX8MQ board with a
    a Silicon Power P34A80.  Since all of the NVMe drivers I have seen
    always do admin commands on a page-aligned buffer, which does work
    on my system, it makes sense for us to do that as well.
    
    Change-Id: I4e73559a6b9d36903f9cc4e687649779c615c063
    Signed-off-by: Patrick Wildt <patrick@blueri.se>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 2f83481dff9c4f253a6ac341911d78d4984ca07b)

diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c
index 88bb93a7a1..adf4ea0646 100644
--- a/drivers/nvme/nvme.c
+++ b/drivers/nvme/nvme.c
@@ -584,14 +584,19 @@ static int nvme_setup_io_queues(struct nvme_dev *dev)
 
 static int nvme_get_info_from_identify(struct nvme_dev *dev)
 {
-	ALLOC_CACHE_ALIGN_BUFFER(char, buf, sizeof(struct nvme_id_ctrl));
-	struct nvme_id_ctrl *ctrl = (struct nvme_id_ctrl *)buf;
+	struct nvme_id_ctrl *ctrl;
 	int ret;
 	int shift = NVME_CAP_MPSMIN(dev->cap) + 12;
 
+	ctrl = memalign(dev->page_size, sizeof(struct nvme_id_ctrl));
+	if (!ctrl)
+		return -ENOMEM;
+
 	ret = nvme_identify(dev, 0, 1, (dma_addr_t)(long)ctrl);
-	if (ret)
+	if (ret) {
+		free(ctrl);
 		return -EIO;
+	}
 
 	dev->nn = le32_to_cpu(ctrl->nn);
 	dev->vwc = ctrl->vwc;
@@ -622,6 +627,7 @@ static int nvme_get_info_from_identify(struct nvme_dev *dev)
 		dev->max_transfer_shift = 20;
 	}
 
+	free(ctrl);
 	return 0;
 }
 
@@ -662,16 +668,21 @@ static int nvme_blk_probe(struct udevice *udev)
 	struct blk_desc *desc = dev_get_uclass_platdata(udev);
 	struct nvme_ns *ns = dev_get_priv(udev);
 	u8 flbas;
-	ALLOC_CACHE_ALIGN_BUFFER(char, buf, sizeof(struct nvme_id_ns));
-	struct nvme_id_ns *id = (struct nvme_id_ns *)buf;
 	struct pci_child_platdata *pplat;
+	struct nvme_id_ns *id;
+
+	id = memalign(ndev->page_size, sizeof(struct nvme_id_ns));
+	if (!id)
+		return -ENOMEM;
 
 	memset(ns, 0, sizeof(*ns));
 	ns->dev = ndev;
 	/* extract the namespace id from the block device name */
 	ns->ns_id = trailing_strtol(udev->name) + 1;
-	if (nvme_identify(ndev, ns->ns_id, 0, (dma_addr_t)(long)id))
+	if (nvme_identify(ndev, ns->ns_id, 0, (dma_addr_t)(long)id)) {
+		free(id);
 		return -EIO;
+	}
 
 	memcpy(&ns->eui64, &id->eui64, sizeof(id->eui64));
 	flbas = id->flbas & NVME_NS_FLBAS_LBA_MASK;
@@ -691,6 +702,7 @@ static int nvme_blk_probe(struct udevice *udev)
 	memcpy(desc->revision, ndev->firmware_rev, sizeof(ndev->firmware_rev));
 	part_init(desc);
 
+	free(id);
 	return 0;
 }
 

commit c5dc95c88fe616561061288fa322810fb19040a9
Author: Patrick Wildt <patrick@blueri.se>
Date:   Wed Oct 16 23:22:50 2019 +0200

    UPSTREAM: nvme: flush dcache on both r/w, and the prp list
    
    It's possible that the data cache for the buffer still holds data
    to be flushed to memory, since the buffer was probably used as stack
    before.  Thus we need to make sure to flush it also on reads, since
    it's possible that the cache is automatically flused to memory after
    the NVMe DMA transfer happened, thus overwriting the NVMe transfer's
    data.  Also add a missing dcache flush for the prp list.
    
    Change-Id: I40572099e5583e3b155b8b248079b76c8bbd1e5c
    Signed-off-by: Patrick Wildt <patrick@blueri.se>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 8c403402ca691c967516481b6bc2c879d683a73d)

diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c
index b9a29cdf79..88bb93a7a1 100644
--- a/drivers/nvme/nvme.c
+++ b/drivers/nvme/nvme.c
@@ -124,6 +124,9 @@ static int nvme_setup_prps(struct nvme_dev *dev, u64 *prp2,
 	}
 	*prp2 = (ulong)dev->prp_pool;
 
+	flush_dcache_range((ulong)dev->prp_pool, (ulong)dev->prp_pool +
+			   dev->prp_entry_num * sizeof(u64));
+
 	return 0;
 }
 
@@ -707,9 +710,8 @@ static ulong nvme_blk_rw(struct udevice *udev, lbaint_t blknr,
 	u16 lbas = 1 << (dev->max_transfer_shift - ns->lba_shift);
 	u64 total_lbas = blkcnt;
 
-	if (!read)
-		flush_dcache_range((unsigned long)buffer,
-				   (unsigned long)buffer + total_len);
+	flush_dcache_range((unsigned long)buffer,
+			   (unsigned long)buffer + total_len);
 
 	c.rw.opcode = read ? nvme_cmd_read : nvme_cmd_write;
 	c.rw.flags = 0;

commit ff15e12394bd8a3d0c8c7b4d76243f4cde50ac3e
Author: Patrick Wildt <patrick@blueri.se>
Date:   Thu Oct 3 13:48:47 2019 +0200

    UPSTREAM: nvme: add accessor to namespace id and eui64
    
    This adds a function which can be used by e.g. EFI to retrieve
    the namespace identifier and EUI64.  For that it adds the EUI64
    to its driver internal namespace structure and copies the EUI64
    during namespace identification.
    
    Change-Id: I9ba01dbd7de1928e2e72aeaa37be534524d9035c
    Signed-off-by: Patrick Wildt <patrick@blueri.se>
    Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit c50b2883dfc1ce355dc37238741ef97cd2c5d000)

diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c
index 3fd98b2f1d..b9a29cdf79 100644
--- a/drivers/nvme/nvme.c
+++ b/drivers/nvme/nvme.c
@@ -622,6 +622,18 @@ static int nvme_get_info_from_identify(struct nvme_dev *dev)
 	return 0;
 }
 
+int nvme_get_namespace_id(struct udevice *udev, u32 *ns_id, u8 *eui64)
+{
+	struct nvme_ns *ns = dev_get_priv(udev);
+
+	if (ns_id)
+		*ns_id = ns->ns_id;
+	if (eui64)
+		memcpy(eui64, ns->eui64, sizeof(ns->eui64));
+
+	return 0;
+}
+
 int nvme_scan_namespace(void)
 {
 	struct uclass *uc;
@@ -658,6 +670,7 @@ static int nvme_blk_probe(struct udevice *udev)
 	if (nvme_identify(ndev, ns->ns_id, 0, (dma_addr_t)(long)id))
 		return -EIO;
 
+	memcpy(&ns->eui64, &id->eui64, sizeof(id->eui64));
 	flbas = id->flbas & NVME_NS_FLBAS_LBA_MASK;
 	ns->flbas = flbas;
 	ns->lba_shift = id->lbaf[flbas].ds;
diff --git a/drivers/nvme/nvme.h b/drivers/nvme/nvme.h
index 67bf6e187f..a6b98e0cc5 100644
--- a/drivers/nvme/nvme.h
+++ b/drivers/nvme/nvme.h
@@ -638,6 +638,7 @@ struct nvme_ns {
 	struct list_head list;
 	struct nvme_dev *dev;
 	unsigned ns_id;
+	u8 eui64[8];
 	int devnum;
 	int lba_shift;
 	u8 flbas;
diff --git a/include/nvme.h b/include/nvme.h
index 8375d61e02..7e66c37639 100644
--- a/include/nvme.h
+++ b/include/nvme.h
@@ -79,4 +79,16 @@ int nvme_scan_namespace(void);
  */
 int nvme_print_info(struct udevice *udev);
 
+/**
+ * nvme_get_namespace_id - return namespace identifier
+ *
+ * This returns the namespace identifier.
+ *
+ * @udev:	NVMe controller device
+ * @ns_id:	Place where to put the name space identifier
+ * @eui64:	Place where to put the IEEE Extended Unique Identifier
+ * @return:	0 on success, -ve on error
+ */
+int nvme_get_namespace_id(struct udevice *udev, u32 *ns_id, u8 *eui64);
+
 #endif /* __NVME_H__ */

commit 17fa31694bdca85542c229b51f401a8873e75c27
Author: Aaron Williams <awilliams@marvell.com>
Date:   Thu Aug 22 20:37:26 2019 -0700

    UPSTREAM: nvme: Fix PRP Offset Invalid
    
    When large writes take place I saw a Samsung EVO 970+ return a status
    value of 0x13, PRP Offset Invalid.  I tracked this down to the
    improper handling of PRP entries.  The blocks the PRP entries are
    placed in cannot cross a page boundary and thus should be allocated
    on page boundaries.  This is how the Linux kernel driver works.
    
    With this patch, the PRP pool is allocated on a page boundary and
    other than the very first allocation, the pool size is a multiple of
    the page size.  Each page can hold (4096 / 8) - 1 entries since the
    last entry must point to the next page in the pool.
    
    Change-Id: I3b22c0b7cc943f196c843559876dc9ebdfad5907
    Signed-off-by: Aaron Williams <awilliams@marvell.com>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit b21dcebfa6b372cd91bf42a30f1d8a1a525f329b)

diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c
index 636a2d3ac1..3fd98b2f1d 100644
--- a/drivers/nvme/nvme.c
+++ b/drivers/nvme/nvme.c
@@ -74,6 +74,9 @@ static int nvme_setup_prps(struct nvme_dev *dev, u64 *prp2,
 	u64 *prp_pool;
 	int length = total_len;
 	int i, nprps;
+	u32 prps_per_page = (page_size >> 3) - 1;
+	u32 num_pages;
+
 	length -= (page_size - offset);
 
 	if (length <= 0) {
@@ -90,15 +93,20 @@ static int nvme_setup_prps(struct nvme_dev *dev, u64 *prp2,
 	}
 
 	nprps = DIV_ROUND_UP(length, page_size);
+	num_pages = DIV_ROUND_UP(nprps, prps_per_page);
 
 	if (nprps > dev->prp_entry_num) {
 		free(dev->prp_pool);
-		dev->prp_pool = malloc(nprps << 3);
+		/*
+		 * Always increase in increments of pages.  It doesn't waste
+		 * much memory and reduces the number of allocations.
+		 */
+		dev->prp_pool = memalign(page_size, num_pages * page_size);
 		if (!dev->prp_pool) {
 			printf("Error: malloc prp_pool fail\n");
 			return -ENOMEM;
 		}
-		dev->prp_entry_num = nprps;
+		dev->prp_entry_num = prps_per_page * num_pages;
 	}
 
 	prp_pool = dev->prp_pool;
@@ -790,14 +798,6 @@ static int nvme_probe(struct udevice *udev)
 	}
 	memset(ndev->queues, 0, NVME_Q_NUM * sizeof(struct nvme_queue *));
 
-	ndev->prp_pool = malloc(MAX_PRP_POOL);
-	if (!ndev->prp_pool) {
-		ret = -ENOMEM;
-		printf("Error: %s: Out of memory!\n", udev->name);
-		goto free_nvme;
-	}
-	ndev->prp_entry_num = MAX_PRP_POOL >> 3;
-
 	ndev->cap = nvme_readq(&ndev->bar->cap);
 	ndev->q_depth = min_t(int, NVME_CAP_MQES(ndev->cap) + 1, NVME_Q_DEPTH);
 	ndev->db_stride = 1 << NVME_CAP_STRIDE(ndev->cap);
@@ -807,6 +807,15 @@ static int nvme_probe(struct udevice *udev)
 	if (ret)
 		goto free_queue;
 
+	/* Allocate after the page size is known */
+	ndev->prp_pool = memalign(ndev->page_size, MAX_PRP_POOL);
+	if (!ndev->prp_pool) {
+		ret = -ENOMEM;
+		printf("Error: %s: Out of memory!\n", udev->name);
+		goto free_nvme;
+	}
+	ndev->prp_entry_num = MAX_PRP_POOL >> 3;
+
 	ret = nvme_setup_io_queues(ndev);
 	if (ret)
 		goto free_queue;

commit 1107b9c2119be70d336ccba6d136a5ba783d4c60
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Wed May 15 08:37:56 2019 -0700

    UPSTREAM: nvme: Fix warning of cast from pointer to integer of different size
    
    When dma_addr_t is u32 in 64-bit, there are some warnings when
    building NVME driver. Fix it by doing an additional (long) cast.
    
    Change-Id: I45e2004c4904cc3b41530675e869e05994bc6890
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 5b2a20e9564c46a571126275991426dd8618e2d8)

diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c
index 1c3519ba74..636a2d3ac1 100644
--- a/drivers/nvme/nvme.c
+++ b/drivers/nvme/nvme.c
@@ -578,7 +578,7 @@ static int nvme_get_info_from_identify(struct nvme_dev *dev)
 	int ret;
 	int shift = NVME_CAP_MPSMIN(dev->cap) + 12;
 
-	ret = nvme_identify(dev, 0, 1, (dma_addr_t)ctrl);
+	ret = nvme_identify(dev, 0, 1, (dma_addr_t)(long)ctrl);
 	if (ret)
 		return -EIO;
 
@@ -647,7 +647,7 @@ static int nvme_blk_probe(struct udevice *udev)
 	ns->dev = ndev;
 	/* extract the namespace id from the block device name */
 	ns->ns_id = trailing_strtol(udev->name) + 1;
-	if (nvme_identify(ndev, ns->ns_id, 0, (dma_addr_t)id))
+	if (nvme_identify(ndev, ns->ns_id, 0, (dma_addr_t)(long)id))
 		return -EIO;
 
 	flbas = id->flbas & NVME_NS_FLBAS_LBA_MASK;
diff --git a/drivers/nvme/nvme_show.c b/drivers/nvme/nvme_show.c
index 52351388e2..1aa3838c2a 100644
--- a/drivers/nvme/nvme_show.c
+++ b/drivers/nvme/nvme_show.c
@@ -112,14 +112,14 @@ int nvme_print_info(struct udevice *udev)
 	ALLOC_CACHE_ALIGN_BUFFER(char, buf_ctrl, sizeof(struct nvme_id_ctrl));
 	struct nvme_id_ctrl *ctrl = (struct nvme_id_ctrl *)buf_ctrl;
 
-	if (nvme_identify(dev, 0, 1, (dma_addr_t)ctrl))
+	if (nvme_identify(dev, 0, 1, (dma_addr_t)(long)ctrl))
 		return -EIO;
 
 	print_optional_admin_cmd(le16_to_cpu(ctrl->oacs), ns->devnum);
 	print_optional_nvm_cmd(le16_to_cpu(ctrl->oncs), ns->devnum);
 	print_format_nvme_attributes(ctrl->fna, ns->devnum);
 
-	if (nvme_identify(dev, ns->ns_id, 0, (dma_addr_t)id))
+	if (nvme_identify(dev, ns->ns_id, 0, (dma_addr_t)(long)id))
 		return -EIO;
 
 	print_formats(id, ns);

commit ddeaf2112ed5d00fab3a9a20531b166c7e8f1fc6
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Sep 23 09:47:48 2021 +0800

    mmc: dw_mmc: return -EINVAL if sclk is 0
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I141fb51a90e0b3bd76e95de653daae97e747b20b

diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 6fc7095523..09c694924d 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -601,6 +601,9 @@ static int dwmci_setup_bus(struct dwmci_host *host, u32 freq)
 		return -EINVAL;
 	}
 
+	if (sclk == 0)
+		return -EINVAL;
+
 	if (sclk == freq)
 		div = 0;	/* bypass mode */
 	else

commit 2fa7482aee969ff3143b606d6f762bf9315bb594
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Sep 23 09:42:34 2021 +0800

    mmc: dw_mmc: return 0 if get mmc clock fail
    
    Since the function return value is uint. If return a negative number,
    it will be converted to a large number. Then the mmc device will use
    the large number to set its clock, this will make mistake.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ibaa42a0958d5169533603432818820e50c332f37

diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index d2a4d2c741..a2e016f736 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -72,7 +72,7 @@ static uint rockchip_dwmmc_get_mmc_clk(struct dwmci_host *host, uint freq)
 	ret = clk_set_rate(&priv->clk, freq);
 	if (ret < 0) {
 		debug("%s: err=%d\n", __func__, ret);
-		return ret;
+		return 0;
 	}
 
 	return freq;

commit fae8dbc4fc9ae63c6600ff19168a3f3a4a151443
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Sep 22 16:40:05 2021 +0800

    clk: rockchip: rk3568: add freq (26 * MHz) for mmc device
    
    The mmc device set the high speed mode freq to (26 * MHz),
    like sd card.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I38242e2d2cf18544464f0010b550b59e54b9d0bd

diff --git a/drivers/clk/rockchip/clk_rk3568.c b/drivers/clk/rockchip/clk_rk3568.c
index b8f42975e2..38da6da81f 100644
--- a/drivers/clk/rockchip/clk_rk3568.c
+++ b/drivers/clk/rockchip/clk_rk3568.c
@@ -1464,6 +1464,7 @@ static ulong rk3568_sdmmc_set_clk(struct rk3568_clk_priv *priv,
 
 	switch (rate) {
 	case OSC_HZ:
+	case 26 * MHz:
 		src_clk = CLK_SDMMC_SEL_24M;
 		break;
 	case 400 * MHz:

commit 2adfdec5b937e895b2d6a0a71e99114b38e40738
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Sep 20 16:54:50 2021 +0800

    mtd: spi-nor-ids: Add support for gd25lq255
    
    Change-Id: Ia926c64c7684d3e5283973564ab7f9b1331bc1fb
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 559019b9e2..c2e357f6f1 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -127,6 +127,11 @@ const struct flash_info spi_nor_ids[] = {
 			SPI_NOR_4B_OPCODES | SPI_NOR_HAS_LOCK |
 			SPI_NOR_HAS_TB)
 	},
+	{
+		INFO("gd25lq255", 0xc86019, 0, 64 * 1024, 512,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+			SPI_NOR_4B_OPCODES | SPI_NOR_HAS_LOCK)
+	},
 #endif
 #ifdef CONFIG_SPI_FLASH_ISSI		/* ISSI */
 	/* ISSI */

commit c797b43aebb6ae23c51b21bf3eb3bb6feea5e16c
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Thu Sep 23 11:01:29 2021 +0800

    drivers: rkflash: Not recheck the cache for XTX devices
    
    Change-Id: I4dd6a4bb8d7d02fc51c1fa10d535e6cd00b71d80
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/sfc_nand.c b/drivers/rkflash/sfc_nand.c
index b34577a988..915333712c 100644
--- a/drivers/rkflash/sfc_nand.c
+++ b/drivers/rkflash/sfc_nand.c
@@ -769,14 +769,19 @@ u32 sfc_nand_prog_page_raw(u8 cs, u32 addr, u32 *p_page_buf)
 	sfc_request(&op, plane, p_page_buf, page_size);
 
 	/*
-	 * At the moment of power lost, flash maybe work in a unkonw state
-	 * and result in bit flip, when this situation is detected by cache
-	 * recheck, it's better to wait a second for a reliable hardware
-	 * environment to avoid abnormal data written to flash array.
+	 * At the moment of power lost or dev running in harsh environment, flash
+	 * maybe work in a unkonw state and result in bit flip, when this situation
+	 * is detected by cache recheck, it's better to wait a second for a reliable
+	 * hardware environment to avoid abnormal data written to flash array.
 	 */
-	sfc_nand_read_cache(addr, (u32 *)sfc_nand_dev.recheck_buffer, 0, data_area_size);
-	if (memcmp(sfc_nand_dev.recheck_buffer, p_page_buf, data_area_size))
-		rkflash_print_error("%s cache bitflip1\n", __func__);
+	if (p_nand_info->id0 != MID_XTX) {
+		sfc_nand_read_cache(addr, (u32 *)sfc_nand_dev.recheck_buffer, 0, data_area_size);
+		if (memcmp(sfc_nand_dev.recheck_buffer, p_page_buf, data_area_size)) {
+			rkflash_print_error("%s %x cache bitflip\n", __func__, addr);
+			mdelay(1000);
+			sfc_request(&op, plane, p_page_buf, page_size);
+		}
+	}
 
 	op.sfcmd.d32 = 0;
 	op.sfcmd.b.cmd = 0x10;

commit b00e662df990115c263d01f7483323359a248c02
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed Sep 22 11:34:31 2021 +0800

    mtd: spinand: Support new device
    
    TX25G01
    
    Change-Id: Ife04db759dc9b5db905b50b64ba947828342496d
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/Kconfig b/drivers/mtd/nand/spi/Kconfig
index 7762cf787a..2998e779b7 100644
--- a/drivers/mtd/nand/spi/Kconfig
+++ b/drivers/mtd/nand/spi/Kconfig
@@ -101,4 +101,9 @@ config SPI_NAND_SILICONGO
 	help
 	  Add support for various SILICONGO SPI Nand flash chips
 
+config SPI_NAND_UNIM
+	default y
+	bool "UNIM SPI flash support"
+	help
+	  Add support for various UNIM SPI Nand flash chips
 endif
diff --git a/drivers/mtd/nand/spi/Makefile b/drivers/mtd/nand/spi/Makefile
index ed1ef480ae..fdc343de76 100644
--- a/drivers/mtd/nand/spi/Makefile
+++ b/drivers/mtd/nand/spi/Makefile
@@ -16,4 +16,5 @@ obj-$(CONFIG_SPI_NAND_BIWIN) += biwin.o
 obj-$(CONFIG_SPI_NAND_ETRON) += etron.o
 obj-$(CONFIG_SPI_NAND_JSC) += jsc.o
 obj-$(CONFIG_SPI_NAND_SILICONGO) += silicongo.o
+obj-$(CONFIG_SPI_NAND_UNIM) += unim.o
 obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index 5ae5d58299..e37ae0a699 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -860,6 +860,9 @@ static const struct spinand_manufacturer *spinand_manufacturers[] = {
 #ifdef CONFIG_SPI_NAND_SILICONGO
 	&silicongo_spinand_manufacturer,
 #endif
+#ifdef CONFIG_SPI_NAND_UNIM
+	&unim_spinand_manufacturer,
+#endif
 };
 
 static int spinand_manufacturer_detect(struct spinand_device *spinand)
diff --git a/drivers/mtd/nand/spi/fmsh.c b/drivers/mtd/nand/spi/fmsh.c
index 2fa9d14cce..aa07744759 100644
--- a/drivers/mtd/nand/spi/fmsh.c
+++ b/drivers/mtd/nand/spi/fmsh.c
@@ -128,8 +128,9 @@ static int fmsh_spinand_detect(struct spinand_device *spinand)
 
 	ret = spinand_match_and_init(spinand, fmsh_spinand_table,
 				     ARRAY_SIZE(fmsh_spinand_table), id[2]);
+	/* Not Only GD Nands MFR equals A1h */
 	if (ret)
-		return ret;
+		return 0;
 
 	return 1;
 }
diff --git a/drivers/mtd/nand/spi/unim.c b/drivers/mtd/nand/spi/unim.c
new file mode 100644
index 0000000000..55bff1ea11
--- /dev/null
+++ b/drivers/mtd/nand/spi/unim.c
@@ -0,0 +1,130 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd
+ *
+ * Authors:
+ *	Dingqiang Lin <jon.lin@rock-chips.com>
+ */
+
+#ifndef __UBOOT__
+#include <linux/device.h>
+#include <linux/kernel.h>
+#endif
+#include <linux/mtd/spinand.h>
+
+#define SPINAND_MFR_UNIM		0xA1
+
+static SPINAND_OP_VARIANTS(read_cache_variants,
+		SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
+
+static SPINAND_OP_VARIANTS(write_cache_variants,
+		SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
+		SPINAND_PROG_LOAD(true, 0, NULL, 0));
+
+static SPINAND_OP_VARIANTS(update_cache_variants,
+		SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
+		SPINAND_PROG_LOAD(false, 0, NULL, 0));
+
+static int tx25g01_ooblayout_ecc(struct mtd_info *mtd, int section,
+				 struct mtd_oob_region *region)
+{
+	if (section > 3)
+		return -ERANGE;
+
+	region->offset = (16 * section) + 8;
+	region->length = 8;
+
+	return 0;
+}
+
+static int tx25g01_ooblayout_free(struct mtd_info *mtd, int section,
+				  struct mtd_oob_region *region)
+{
+	if (section > 3)
+		return -ERANGE;
+
+	region->offset = (16 * section) + 2;
+	region->length = 6;
+
+	return 0;
+}
+
+static const struct mtd_ooblayout_ops tx25g01_ooblayout = {
+	.ecc = tx25g01_ooblayout_ecc,
+	.rfree = tx25g01_ooblayout_free,
+};
+
+/*
+ * ecc bits: 0xC0[4,6]
+ * [0b000], No bit errors were detected;
+ * [0b001, 0b011], 1~3 Bit errors were detected and corrected. Not
+ *	reach Flipping Bits;
+ * [0b100], Bit error count equals the bit flip
+ *	detection threshold
+ * others, Reserved.
+ */
+static int tx25g01_ecc_get_status(struct spinand_device *spinand,
+				  u8 status)
+{
+	u8 eccsr = (status & GENMASK(6, 4)) >> 2;
+
+	if (eccsr <= 7)
+		return eccsr;
+	else if (eccsr == 12)
+		return 8;
+	else
+		return -EBADMSG;
+}
+
+static const struct spinand_info unim_spinand_table[] = {
+	SPINAND_INFO("TX25G01", 0xF1,
+		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
+		     NAND_ECCREQ(4, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&tx25g01_ooblayout, tx25g01_ecc_get_status)),
+};
+
+/**
+ * unim_spinand_detect - initialize device related part in spinand_device
+ * struct if it is a UNIM device.
+ * @spinand: SPI NAND device structure
+ */
+static int unim_spinand_detect(struct spinand_device *spinand)
+{
+	u8 *id = spinand->id.data;
+	int ret;
+
+	/*
+	 * UNIM SPI NAND read ID need a dummy byte,
+	 * so the first byte in raw_id is dummy.
+	 */
+	if (id[1] != SPINAND_MFR_UNIM)
+		return 0;
+
+	ret = spinand_match_and_init(spinand, unim_spinand_table,
+				     ARRAY_SIZE(unim_spinand_table),
+				     id[2]);
+	/* Not Only UNIM Nands MFR equals A1h */
+	if (ret)
+		return 0;
+
+	return 1;
+}
+
+static const struct spinand_manufacturer_ops unim_spinand_manuf_ops = {
+	.detect = unim_spinand_detect,
+};
+
+const struct spinand_manufacturer unim_spinand_manufacturer = {
+	.id = SPINAND_MFR_UNIM,
+	.name = "UNIM",
+	.ops = &unim_spinand_manuf_ops,
+};
diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
index e6caf26f10..5d60fdf077 100644
--- a/include/linux/mtd/spinand.h
+++ b/include/linux/mtd/spinand.h
@@ -216,6 +216,7 @@ extern const struct spinand_manufacturer biwin_spinand_manufacturer;
 extern const struct spinand_manufacturer etron_spinand_manufacturer;
 extern const struct spinand_manufacturer jsc_spinand_manufacturer;
 extern const struct spinand_manufacturer silicongo_spinand_manufacturer;
+extern const struct spinand_manufacturer unim_spinand_manufacturer;
 
 /**
  * struct spinand_op_variants - SPI NAND operation variants

commit 6b53126a8232f70197f8eb994175f50467b574e1
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Fri Sep 17 16:55:55 2021 +0800

    drivers: crypto: fix dump_crypto_state compiling error
    
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
    Change-Id: I61b9df97d84eaf19837215a4bff567339806563b

diff --git a/drivers/crypto/rockchip/crypto_v2.c b/drivers/crypto/rockchip/crypto_v2.c
index de3db0f96b..8f21a016d5 100644
--- a/drivers/crypto/rockchip/crypto_v2.c
+++ b/drivers/crypto/rockchip/crypto_v2.c
@@ -642,7 +642,10 @@ static inline bool is_des_mode(u32 rk_mode)
 		rk_mode == RK_MODE_OFB);
 }
 
-static void dump_crypto_state(struct crypto_lli_desc *desc, int ret)
+static void dump_crypto_state(struct crypto_lli_desc *desc,
+			      u32 tmp, u32 expt_int,
+			      const u8 *in, const u8 *out,
+			      u32 len, int ret)
 {
 	IMSG("%s\n", ret == -ETIME ? "timeout" : "dismatch");
 
@@ -979,7 +982,7 @@ static int hw_cipher_crypt(const u8 *in, u8 *out, u64 len,
 			get_tag_from_reg(key_chn, tag, AES_BLOCK_SIZE);
 		}
 	} else {
-		dump_crypto_state(data_desc, ret);
+		dump_crypto_state(data_desc, tmp, expt_int, in, out, len, ret);
 		ret = -1;
 	}
 

commit b83c40a4be6e276143b77e413550868cdd38ec59
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Tue Jun 15 19:29:51 2021 +0800

    drivers: crypto: fix memory leak in hw_cipher_crypt
    
    align_free aad_tmp after use.
    
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
    Change-Id: I502d76dc8a9ca198b4cb264e7d6f9b9eca1fead9

diff --git a/drivers/crypto/rockchip/crypto_v2.c b/drivers/crypto/rockchip/crypto_v2.c
index e934d5024e..de3db0f96b 100644
--- a/drivers/crypto/rockchip/crypto_v2.c
+++ b/drivers/crypto/rockchip/crypto_v2.c
@@ -921,12 +921,17 @@ static int hw_cipher_crypt(const u8 *in, u8 *out, u64 len,
 			       aad, aad_len);
 		} else {
 			aad_tmp_len = aad_len;
-			aad_tmp = align_malloc(aad_tmp_len,
-					       DATA_ADDR_ALIGN_SIZE);
-			if (!aad_tmp)
-				goto exit;
+			if (IS_ALIGNED((ulong)aad, DATA_ADDR_ALIGN_SIZE)) {
+				aad_tmp = (void *)aad;
+			} else {
+				aad_tmp = align_malloc(aad_tmp_len,
+						       DATA_ADDR_ALIGN_SIZE);
+				if (!aad_tmp)
+					goto exit;
+
+				memcpy(aad_tmp, aad, aad_tmp_len);
+			}
 
-			memcpy(aad_tmp, aad, aad_tmp_len);
 			set_aad_len_reg(key_chn, aad_tmp_len);
 			set_pc_len_reg(key_chn, tmp_len);
 		}
@@ -982,10 +987,12 @@ exit:
 	crypto_write(0xffff0000, CRYPTO_BC_CTL);//bc_ctl disable
 	align_free(data_desc);
 	align_free(aad_desc);
-	if (dma_in && dma_in != in)
+	if (dma_in != in)
 		align_free(dma_in);
-	if (dma_out && dma_out != out)
+	if (out && dma_out != out)
 		align_free(dma_out);
+	if (aad && aad != aad_tmp)
+		align_free(aad_tmp);
 
 	return ret;
 }

commit 5ce8a8348b3c037ee7fcd2432ed2f1c67d65cd4d
Author: Chris Morgan <macromorgan@hotmail.com>
Date:   Thu Aug 5 16:26:41 2021 +0800

    UPSTREAM: mtd: spi-nor-ids: Add XTX XT25F128B
    
    Adds support for XT25F128B used on Odroid Go Advance. Unfortunately
    this chip uses a continuation code which I cannot seem to parse, so
    there are possibly going to be collisions with chips that use the same
    manufacturer/ID.
    
    Change-Id: Ic1f64a89eeb2669f878ab263c7de7d7f0935138f
    Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 674a9483096148999818f336ddd2755172bfee0c)

diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig
index f032c24462..6d5f76414f 100644
--- a/drivers/mtd/spi/Kconfig
+++ b/drivers/mtd/spi/Kconfig
@@ -151,6 +151,12 @@ config SPI_FLASH_XMC
 	  Add support for various XMC (Wuhan Xinxin Semiconductor
 	  Manufacturing Corp.) SPI flash chips (XM25xxx)
 
+config SPI_FLASH_XTX
+	bool "XTX SPI flash support"
+	help
+	  Add support for various XTX (XTX Technology Limited)
+	  SPI flash chips (XT25xxx).
+
 endif
 
 config SPI_FLASH_USE_4K_SECTORS
diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 24bdfff66d..559019b9e2 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -343,6 +343,10 @@ const struct flash_info spi_nor_ids[] = {
 	{ INFO("XM25QH64A", 0x207017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 	{ INFO("XM25QH64C", 0x204017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 	{ INFO("XM25QH128A", 0x207018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+#endif
+#ifdef CONFIG_SPI_FLASH_XTX
+	/* XTX Technology (Shenzhen) Limited */
+	{ INFO("xt25f128b", 0x0b4018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 #endif
 	{ },
 };

commit d6597d206a5b8722aad55ac332f38e2456125d80
Author: Reto Schneider <reto.schneider@husqvarnagroup.com>
Date:   Thu Jun 17 18:26:51 2021 +0200

    UPSTREAM: mtd: spi-nor-ids: Add support for XMC XM25QH64C
    
    This chip has been (briefly) tested on the MediaTek MT7688 based GARDENA
    smart gateway.
    
    Datasheet: http://xmcwh.com/Uploads/2020-12-17/XM25QH64C_Ver1.1.pdf
    Change-Id: I39763f77b18f0886f3611fe2555636a622525b21
    Signed-off-by: Reto Schneider <reto.schneider@husqvarnagroup.com>
    Reviewed-by: Stefan Roese <sr@denx.de>
    Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 9102cce7f439b1939e37d28bfa587d316d1c7a73)

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 2a40beb651..24bdfff66d 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -341,6 +341,7 @@ const struct flash_info spi_nor_ids[] = {
 #ifdef CONFIG_SPI_FLASH_XMC
 	/* XMC (Wuhan Xinxin Semiconductor Manufacturing Corp.) */
 	{ INFO("XM25QH64A", 0x207017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{ INFO("XM25QH64C", 0x204017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 	{ INFO("XM25QH128A", 0x207018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 #endif
 	{ },

commit b5734a7c962f33bc9146494c89c263364a80781f
Author: zhengxun <zhengxunli.mxic@gmail.com>
Date:   Tue Mar 23 13:16:47 2021 +0000

    UPSTREAM: mtd: spi-nor-ids: Add Macronix MX66UW2G345G
    
    The MX66UW2G345G is Macronix Flash with SINGLE and OCTAL I/O. Hence,
    add SPI_NOR_OCTAL_READ flag for this flash.
    
    Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
    [jagan: change order of id flags]
    Change-Id: I2e6bb7169d00ae082631775fd23dea798d15486c
    Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
    Signed-off-by: zhengxun <zhengxunli.mxic@gmail.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 06abbef27a31a81b254b2093b67d90e04ed273b0)

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 1d77f0953c..2a40beb651 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -172,6 +172,7 @@ const struct flash_info spi_nor_ids[] = {
 	{ INFO("mx66l1g45g",  0xc2201b, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 	{ INFO("mx25l1633e", 0xc22415, 0, 64 * 1024,   32, SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES | SECT_4K) },
 	{ INFO("mx25r6435f", 0xc22817, 0, 64 * 1024,   128,  SECT_4K) },
+	{ INFO("mx66uw2g345g", 0xc2943c, 0, 64 * 1024, 4096, SECT_4K | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) },
 #endif
 
 #ifdef CONFIG_SPI_FLASH_STMICRO		/* STMICRO */

commit 8bb168f1d120721c08571d9d225b169e3df35e99
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Wed Sep 15 17:43:59 2021 +0800

    configs: add config for rk3568 sata
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: I45f1eee91db674111b793221875dcb202ee2ecf9

diff --git a/configs/rk3568-sata.config b/configs/rk3568-sata.config
new file mode 100644
index 0000000000..110e611bab
--- /dev/null
+++ b/configs/rk3568-sata.config
@@ -0,0 +1,11 @@
+# CONFIG_AHCI_PCI is not set
+CONFIG_AHCI=y
+CONFIG_BASE_DEFCONFIG="rk3568_defconfig"
+CONFIG_CMD_SCSI=y
+CONFIG_DM_SCSI=y
+CONFIG_DWC_AHCI=y
+CONFIG_LIBATA=y
+CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
+# CONFIG_SATA_CEVA is not set
+CONFIG_SCSI_AHCI=y
+CONFIG_SCSI=y

commit d4cce25e06bbb1ce1acb32dd58674792b517c23d
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Wed Sep 15 17:38:24 2021 +0800

    rockusb: add get storage media info for pc tool
    
    the pc tool needs to confirm whether the current storage
    and firmware match while supporting multiple memory devices.
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: I6a65e34e0eaa4777cbf649fbe3bb748aeb1ecdb5

diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index 8f5c65fe29..67bc488543 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -10,6 +10,7 @@
 #include <android_avb/rk_avb_ops_user.h>
 #include <asm/arch/boot_mode.h>
 #include <asm/arch/chip_info.h>
+#include <asm/arch/rk_atags.h>
 #include <write_keybox.h>
 #include <linux/mtd/mtd.h>
 #include <optee_include/OpteeClientInterface.h>
@@ -605,6 +606,54 @@ static int rkusb_do_vs_read(struct fsg_common *common)
 }
 #endif
 
+static int rkusb_do_get_storage_info(struct fsg_common *common,
+				     struct fsg_buffhd *bh)
+{
+	enum if_type type = ums[common->lun].block_dev.if_type;
+	int devnum = ums[common->lun].block_dev.devnum;
+	u32 media = BOOT_TYPE_UNKNOWN;
+	u32 len = common->data_size;
+	u8 *buf = (u8 *)bh->buf;
+
+	if (len > 4)
+		len = 4;
+
+	switch (type) {
+	case IF_TYPE_MMC:
+		media = BOOT_TYPE_EMMC;
+		break;
+
+	case IF_TYPE_SD:
+		media = BOOT_TYPE_SD0;
+		break;
+
+	case IF_TYPE_MTD:
+		if (devnum == BLK_MTD_SPI_NAND)
+			media = BOOT_TYPE_MTD_BLK_SPI_NAND;
+		else if (devnum == BLK_MTD_NAND)
+			media = BOOT_TYPE_NAND;
+		else
+			media = BOOT_TYPE_MTD_BLK_SPI_NOR;
+		break;
+
+	case IF_TYPE_SCSI:
+		media = BOOT_TYPE_SATA;
+		break;
+
+	case IF_TYPE_RKNAND:
+		media = BOOT_TYPE_NAND;
+		break;
+	default:
+		break;
+	}
+
+	memcpy((void *)&buf[0], (void *)&media, len);
+	common->residue = len;
+	common->data_size_from_cmnd = len;
+
+	return len;
+}
+
 static int rkusb_do_read_capacity(struct fsg_common *common,
 				  struct fsg_buffhd *bh)
 {
@@ -619,7 +668,12 @@ static int rkusb_do_read_capacity(struct fsg_common *common,
 	 * bit[2]: First 4M Access, 0: Disabled;
 	 * bit[3]: Read LBA On, 0: Disabed (default);
 	 * bit[4]: New Vendor Storage API, 0: Disabed;
-	 * bit[5:63}: Reserved.
+	 * bit[5]: Read uart data from ram
+	 * bit[6]: Read IDB config
+	 * bit[7]: Read SecureMode
+	 * bit[8]: New IDB feature
+	 * bit[9]: Get storage media info
+	 * bit[10:63}: Reserved.
 	 */
 	memset((void *)&buf[0], 0, len);
 	if (type == IF_TYPE_MMC || type == IF_TYPE_SD)
@@ -640,6 +694,8 @@ static int rkusb_do_read_capacity(struct fsg_common *common,
 #if defined(CONFIG_ROCKCHIP_RK3568)
 	buf[1] = BIT(0);
 #endif
+	buf[1] |= BIT(1);
+
 	/* Set data xfer size */
 	common->residue = len;
 	common->data_size_from_cmnd = len;
@@ -747,6 +803,10 @@ static int rkusb_cmd_process(struct fsg_common *common,
 		rc = RKUSB_RC_FINISHED;
 		break;
 #endif
+	case RKUSB_GET_STORAGE_MEDIA:
+		*reply = rkusb_do_get_storage_info(common, bh);
+		rc = RKUSB_RC_FINISHED;
+		break;
 
 	case RKUSB_READ_CAPACITY:
 		*reply = rkusb_do_read_capacity(common, bh);
diff --git a/include/rockusb.h b/include/rockusb.h
index 2eace128cf..15c3035455 100644
--- a/include/rockusb.h
+++ b/include/rockusb.h
@@ -39,6 +39,7 @@ enum rkusb_cmd {
 	RKUSB_LBA_ERASE		= 0x25,
 	RKUSB_VS_WRITE		= 0x26,
 	RKUSB_VS_READ		= 0x27,
+	RKUSB_GET_STORAGE_MEDIA = 0x2B,
 	RKUSB_SESSION		= 0x30,
 	RKUSB_READ_CAPACITY	= 0xAA,
 	RKUSB_RESET		= 0xFF,

commit 48650c555b8f042af391b1d6f9ead290489bade1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Sep 16 20:28:36 2021 +0800

    cmd: load: add "loadz" and "loadzflash"
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I9349127f1a10fffb0bd28586a2eac1caf626fb61

diff --git a/cmd/load.c b/cmd/load.c
index 519c309a61..8f03bac223 100644
--- a/cmd/load.c
+++ b/cmd/load.c
@@ -9,6 +9,7 @@
  * Serial up- and download support
  */
 #include <common.h>
+#include <boot_rkimg.h>
 #include <command.h>
 #include <console.h>
 #include <s_record.h>
@@ -20,6 +21,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #if defined(CONFIG_CMD_LOADB)
 static ulong load_serial_ymodem(ulong offset, int mode);
+static ulong load_serial_zmodem(ulong offset);
 #endif
 
 #if defined(CONFIG_CMD_LOADS)
@@ -465,6 +467,12 @@ static int do_load_serial_bin(cmd_tbl_t *cmdtp, int flag, int argc,
 
 		addr = load_serial_ymodem(offset, xyzModem_ymodem);
 
+	} else if (strcmp(argv[0],"loadz")==0) {
+		printf("## Ready for binary (zmodem) download"
+			"to 0x%08lX at %d bps...\n",
+			offset, load_baudrate);
+		addr = load_serial_zmodem(offset);
+
 	} else if (strcmp(argv[0],"loadx")==0) {
 		printf("## Ready for binary (xmodem) download "
 			"to 0x%08lX at %d bps...\n",
@@ -951,6 +959,27 @@ static int getcxmodem(void) {
 		return (getc());
 	return -1;
 }
+
+extern int zmodem_rx(unsigned int addr, int *rxsize);
+static ulong load_serial_zmodem(ulong offset)
+{
+	int size = 0;
+	int res;
+
+	printf("Start to run ZModem\n");
+	res = zmodem_rx(offset, &size);
+	if (res) {
+	       printf("ZModem download error, ret=%d\n", res);
+	       return offset;
+	}
+
+	flush_cache(offset, ALIGN(size, ARCH_DMA_MINALIGN));
+	printf("## Total Size      = 0x%08x = %d Bytes\n", size, size);
+	env_set_hex("filesize", size);
+
+	return offset;
+}
+
 static ulong load_serial_ymodem(ulong offset, int mode)
 {
 	int size;
@@ -1005,6 +1034,80 @@ static ulong load_serial_ymodem(ulong offset, int mode)
 	return offset;
 }
 
+static int do_loadz_flash(cmd_tbl_t *cmdtp, int flag, int argc,
+			  char * const argv[])
+{
+	struct blk_desc *dev_desc;
+	disk_partition_t part;
+	const char *part_name;
+	char cmd[64];
+	ulong addr, size;
+	int ret, blknum;
+	int baudrate;
+
+	if (argc != 4)
+		return CMD_RET_USAGE;
+
+	addr = simple_strtol(argv[1], NULL, 16);
+	baudrate = (int)simple_strtoul(argv[2], NULL, 10);
+	part_name = argv[3];
+
+	/* search partition */
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("No boot device\n");
+		return -ENODEV;
+	}
+
+	ret = part_get_info_by_name(dev_desc, part_name, &part);
+	if (ret < 0) {
+		printf("No partition '%s'\n", part_name);
+		return -EINVAL;
+	}
+
+	snprintf(cmd, 64, "loadz 0x%08lx %d\n", addr, baudrate);
+	ret = run_command(cmd, 0);
+	if (ret) {
+		printf("loadz failed, ret=%d\n", ret);
+		return CMD_RET_FAILURE;
+	}
+
+	size = env_get_ulong("filesize", 16, 0);
+	if (!size) {
+		printf("loadz empty file\n");
+		return CMD_RET_FAILURE;
+	}
+
+	/* flash */
+	blknum = DIV_ROUND_UP(size, dev_desc->blksz);
+	if (blknum > part.size) {
+		printf("File size 0x%lx is too large to flash\n", size);
+		return CMD_RET_FAILURE;
+	}
+
+#ifdef CONFIG_CMD_CRYPTO_SUM
+	snprintf(cmd, 64, "crypto_sum sha256 0x%lx 0x%lx", addr, size);
+	run_command(cmd, 0);
+#elif defined(CONFIG_CMD_HASH)
+	snprintf(cmd, 64, "hash sha256 0x%lx 0x%lx", addr, size);
+	run_command(cmd, 0);
+#endif
+
+	printf("## Flash data to partition %s@0x%lx sector with size 0x%lx ... ",
+		part_name, (ulong)part.start, (ulong)size);
+	if (dev_desc->if_type == IF_TYPE_MTD)
+		dev_desc->op_flag |= BLK_MTD_CONT_WRITE;
+	ret = blk_dwrite(dev_desc, part.start, blknum, (void *)addr);
+	if (dev_desc->if_type == IF_TYPE_MTD)
+		dev_desc->op_flag &= ~(BLK_MTD_CONT_WRITE);
+	if (ret != blknum) {
+		printf("Failed(%d)\n\n", ret);
+		return CMD_RET_FAILURE;
+	}
+	printf("OK\n\n");
+
+	return CMD_RET_SUCCESS;
+}
 #endif
 
 /* -------------------------------------------------------------------- */
@@ -1080,4 +1183,19 @@ U_BOOT_CMD(
 	" with offset 'off' and baudrate 'baud'"
 );
 
+U_BOOT_CMD(
+	loadz, 3, 0,	do_load_serial_bin,
+	"load binary file over serial line (zmodem mode)",
+	"[ off ] [ baud ]\n"
+	"    - load binary file over serial line"
+	" with offset 'off' and baudrate 'baud'"
+);
+
+U_BOOT_CMD(
+	loadzflash, 4, 0, do_loadz_flash,
+	"load binary file over serial line (zmodem mode) and flash to partition",
+	"[ off ] [ baud ] [partition]\n"
+	"    - load binary file over serial line"
+	" with offset 'off' and baudrate 'baud' and flash to 'partition'"
+);
 #endif	/* CONFIG_CMD_LOADB */
diff --git a/common/Makefile b/common/Makefile
index 3e714a1c78..1901154bb9 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -158,9 +158,9 @@ obj-y += command.o
 obj-$(CONFIG_$(SPL_)LOG) += log.o
 obj-$(CONFIG_$(SPL_)LOG_CONSOLE) += log_console.o
 obj-y += s_record.o
-obj-$(CONFIG_CMD_LOADB) += xyzModem.o
 
 ifndef CONFIG_SPL_BUILD
+obj-$(CONFIG_CMD_LOADB) += xyzModem.o rbsb.o zm.o zreadline.o lrz.o
 obj-$(CONFIG_IO_TRACE) += iotrace.o
 obj-$(CONFIG_ANDROID_WRITE_KEYBOX) += write_keybox.o
 obj-$(CONFIG_ANDROID_KEYMASTER_CA) += keymaster.o

commit a1b93f02ebd48103fc78ead6796463f81657c3a7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Sep 16 20:20:51 2021 +0800

    common: zmodem: fix compile warnings
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Id2190e36b8d0250b22fd526cb13af32a3851e010

diff --git a/common/config.h b/common/config.h
index b7d476db70..fc20d7824f 100644
--- a/common/config.h
+++ b/common/config.h
@@ -173,7 +173,7 @@
 //#define HAVE_GETTIMEOFDAY 1
 
 /* Define if you have the memcpy function.  */
-#define HAVE_MEMCPY 1
+//#define HAVE_MEMCPY 1
 
 /* Define if you have the mkdir function.  */
 #define HAVE_MKDIR 1
diff --git a/common/lrz.c b/common/lrz.c
index 49322225de..1c175f9c7b 100644
--- a/common/lrz.c
+++ b/common/lrz.c
@@ -123,12 +123,12 @@ static int o_sync = 0;
 static int rzfiles __P ((struct zm_fileinfo *));
 static int tryz __P ((void));
 static void checkpath __P ((const char *name));
-static void chkinvok __P ((const char *s));
+//static void chkinvok __P ((const char *s));
 static void report __P ((int sct));
 static void uncaps __P ((char *s));
 static int IsAnyLower __P ((const char *s));
 static int putsec __P ((struct zm_fileinfo *zi, char *buf, size_t n));
-static int make_dirs __P ((char *pathname));
+//static int make_dirs __P ((char *pathname));
 static int procheader __P ((char *name, struct zm_fileinfo *));
 static int wcgetsec __P ((size_t *Blklen, char *rxbuf, unsigned int maxtime));
 static int wcrx __P ((struct zm_fileinfo *));
@@ -136,7 +136,7 @@ static int wcrxpn __P ((struct zm_fileinfo *, char *rpn));
 static int wcreceive __P ((int argc, char **argp));
 static int rzfile __P ((struct zm_fileinfo *));
 static void usage __P ((int exitcode, const char *what));
-static void usage1 __P ((int exitcode));
+//static void usage1 __P ((int exitcode));
 static void exec2 __P ((const char *s));
 static int closeit __P ((struct zm_fileinfo *));
 static void ackbibi __P ((void));
@@ -148,6 +148,10 @@ static long buffersize=1024*128;
 static unsigned long min_bps=0;
 static long min_bps_time=120;
 
+extern int CYGACC_COMM_IF_GETC_TIMEOUT (char chan, char *c);
+extern void CYGACC_COMM_IF_PUTC (char x, char y);
+extern int CYGACC_COMM_IF_GETC_TIMEOUT (char chan, char *c);
+
 char Lzmanag;		/* Local file management request */
 char zconv;		/* ZMODEM file conversion request */
 char zmanag;		/* ZMODEM file management request */
@@ -214,7 +218,7 @@ void sendline(int c)
 int read_data(int tout_in_100ms, char *buf, int size)
 {
 	extern int xyzModem_CHAR_TIMEOUT;
-	int c;
+	char c;
 	int wait_msec = tout_in_100ms * 100;
 	int ret;
 	
@@ -243,12 +247,12 @@ void send_data(int fd, char *buf, int size)
 	
 }
 //flush tx data
-void flushmo()
+void flushmo(void)
 {
 	//flush tx
 }
 //return seconds elapsed between reset=1 & reset=0. float allowed
-double timing (int reset, time_t *nowp)
+ulong timing (int reset, time_t *nowp)
 {
 	static unsigned long start;
 	if(reset) {
@@ -520,7 +524,7 @@ static struct option const long_options[] =
 };
 #endif
 
-static void
+void
 show_version(void)
 {
 	printf ("%s (%s) %s\n", program_name, PACKAGE, VERSION);
@@ -528,17 +532,17 @@ show_version(void)
 
 int
 //main(int argc, char *argv[])
-zmodem_rx(unsigned int addr, int *rxsize)
+zmodem_rx(unsigned long addr, int *rxsize)
 {
-	register char *cp;
+	__maybe_unused register char *cp;
 	//register int npats;
 	//char **patts=NULL; /* keep compiler quiet */
 	int exitcode=0;
-	int c;
-	unsigned int startup_delay=0;
-	int argc = 1 ;
-	char *argv[] = { "rz" };
-	zmodem_addr = addr;
+	__maybe_unused int c;
+	__maybe_unused unsigned int startup_delay=0;
+	__maybe_unused int argc = 1;
+	__maybe_unused char *argv[] = { "rz" };
+	zmodem_addr = (void *)addr;
 	zmodem_offset = 0;
 
 	Rxtimeout = 100;
@@ -858,17 +862,17 @@ zmodem_rx(unsigned int addr, int *rxsize)
 		canit(0);
 	if (Verbose)
 	{
-		fputs("\r\n",stderr);
+		fputs(stderr, "\r\n");
 		if (exitcode)
-			fputs(_("Transfer incomplete\n"),stderr);
+			fputs(stderr, "Transfer incomplete\n");
 		else
-			fputs(_("Transfer complete\n"),stderr);
+			fputs(stderr, "Transfer complete\n");
 	}
 	*rxsize = zmodem_offset;
 	return exitcode;
 }
 
-static void
+void
 usage1(int exitcode)
 {
 	usage(exitcode,NULL);
@@ -965,7 +969,7 @@ wcreceive(int argc, char **argp)
 					|| enable_syslog
 #endif
 				) {
-					double d;
+					ulong d;
 					long bps;
 					d=timing(0,NULL);
 					if (d==0)
@@ -1038,7 +1042,7 @@ wcreceive(int argc, char **argp)
 			|| enable_syslog
 #endif
 	 		) {
-			double d;
+			ulong d;
 			long bps;
 			d=timing(0,NULL);
 			if (d==0)
@@ -1363,7 +1367,7 @@ do_crc_check(void *f, size_t remote_bytes, size_t check_bytes)
 static int
 procheader(char *name, struct zm_fileinfo *zi)
 {
-	const char *openmode;
+	__maybe_unused const char *openmode;
 	char *p;
 	static char *name_static=NULL;
 	char *nameend;
@@ -1456,7 +1460,7 @@ procheader(char *name, struct zm_fileinfo *zi)
 		//struct stat sta;
 		char *tmpname;
 		char *ptr;
-		int i;
+		int i  __maybe_unused;
 		if (zmanag == ZF1_ZMNEW || zmanag==ZF1_ZMNEWL) {
 #if 0
 			if (-1==fstat(fileno(fout),&sta)) {
@@ -1760,7 +1764,7 @@ buffer_it:
  * it's because some required directory was not present, and if
  * so, create all required dirs.
  */
-static int
+int
 make_dirs(char *pathname)
 {
 	register char *p;		/* Points into path */
@@ -1771,7 +1775,7 @@ make_dirs(char *pathname)
 		return 0;		/* Not our problem */
 
 	for (p = strchr(pathname, '/'); p != NULL; p = strchr(p+1, '/')) {
-		/* Avoid mkdir of empty string, if leading or double '/' */
+		/* Avoid mkdir of empty string, if leading or ulong '/' */
 		if (p == pathname || p[-1] == '/')
 			continue;
 		/* Avoid mkdir where last part of path is '.' */
@@ -1807,6 +1811,7 @@ static int putsec(struct zm_fileinfo *zi, char *buf, size_t n)
 {
 	memcpy(zmodem_addr + zmodem_offset, buf, n);
 	zmodem_offset += n;
+	return 0;
 }
 #if 0
 static int 
@@ -1890,7 +1895,7 @@ report(int sct)
  * If called as [-][dir/../]rzCOMMAND set the pipe flag
  * If called as rb use YMODEM protocol
  */
-static void
+void
 chkinvok(const char *s)
 {
 	const char *p;
@@ -2141,13 +2146,13 @@ rzfiles(struct zm_fileinfo *zi)
 		//xil_printf("%s(): L%d debug, c=%d\n\r", __func__, __LINE__, c);
 		switch (c) {
 		case ZEOF:
-			xil_printf("%s(): receive %s (%d bytes)complete\n\r", __func__, zi->fname, zi->bytes_total);
+			xil_printf("%s(): receive %s (%d bytes)complete\n\r", __func__, zi->fname, (u32)zi->bytes_total);
 			if (Verbose > 1
 #ifdef ENABLE_SYSLOG
 				|| enable_syslog
 #endif
 	 		) {
-				double d;
+				ulong d;
 				long bps;
 				d=timing(0,NULL);
 				if (d==0)
@@ -2394,7 +2399,7 @@ moredata:
 				int minleft =  0;
 				int secleft =  0;
 				time_t now;
-				double d;
+				ulong d;
 				//xil_printf("%s(): L%d debug\n\r", __func__, __LINE__);
 				d=timing(0,&now);
 				if (d==0)
@@ -2546,7 +2551,7 @@ moredata:
 static void
 zmputs(const char *s)
 {
-	const char *p;
+	__maybe_unused const char *p;
 
 	xil_printf("%s(): L%d zmputs not implmenment yet\n\r", __func__, __LINE__);
 #if 0
@@ -2625,7 +2630,7 @@ closeit(struct zm_fileinfo *zi)
 		timep.modtime = zi->modtime;
 		//utime(Pathname, &timep);
 #else
-		time_t timep[2];
+		__maybe_unused time_t timep[2];
 		//timep[0] = time(NULL);
 		//timep[1] = zi->modtime;
 		//utime(Pathname, timep);
@@ -2688,6 +2693,7 @@ sys2(const char *s)
 {
 	if (*s == '!')
 		++s;
+	return 0;
 	//return system(s);
 }
 
diff --git a/common/rbsb.c b/common/rbsb.c
index 2bf9675017..b802014053 100644
--- a/common/rbsb.c
+++ b/common/rbsb.c
@@ -109,7 +109,11 @@ static struct {
 	{0, 0}
 };
 
-static unsigned
+extern int CYGACC_COMM_IF_GETC_TIMEOUT (char chan, char *c);
+extern void CYGACC_COMM_IF_PUTC (char x, char y);
+extern int CYGACC_COMM_IF_GETC_TIMEOUT (char chan, char *c);
+
+unsigned
 getspeed(int  code)
 {
 	int n;
@@ -249,7 +253,7 @@ int
 io_mode(int fd, int n)
 {
 #if 1
-	static int did0 = FALSE;
+	__maybe_unused static int did0 = FALSE;
 
 	vfile("mode:%d", n);
 
diff --git a/common/xyzModem.c b/common/xyzModem.c
index a0c5dfeece..386a1951a5 100644
--- a/common/xyzModem.c
+++ b/common/xyzModem.c
@@ -52,14 +52,15 @@ static struct
   unsigned long file_length, read_length;
 } xyz;
 
-#define xyzModem_CHAR_TIMEOUT            2000	/* 2 seconds */
+#define _xyzModem_CHAR_TIMEOUT            2000	/* 2 seconds */
 #define xyzModem_MAX_RETRIES             20
 #define xyzModem_MAX_RETRIES_WITH_CRC    10
 #define xyzModem_CAN_COUNT                3	/* Wait for 3 CAN before quitting */
 
+int xyzModem_CHAR_TIMEOUT = _xyzModem_CHAR_TIMEOUT;
 
 typedef int cyg_int32;
-static int
+int
 CYGACC_COMM_IF_GETC_TIMEOUT (char chan, char *c)
 {
 
@@ -77,7 +78,7 @@ CYGACC_COMM_IF_GETC_TIMEOUT (char chan, char *c)
   return 0;
 }
 
-static void
+void
 CYGACC_COMM_IF_PUTC (char x, char y)
 {
   putc (y);
diff --git a/common/zglobal.h b/common/zglobal.h
index 67ffb996f4..14ee8dbe44 100644
--- a/common/zglobal.h
+++ b/common/zglobal.h
@@ -389,8 +389,8 @@ extern unsigned Baudrate;
 void zperr __P ((const char *fmt, ...));
 void zpfatal __P ((const char *fmt, ...));
 void vfile __P ((const char *format, ...));
-#define vchar(x) putc(x,stderr)
-#define vstring(x) fputs(x,stderr)
+#define vchar(x) putc(x)
+#define vstring(x) fputs(stderr, x)
 
 #ifdef __GNUC__
 #if __GNUC__ > 1
diff --git a/common/zm.c b/common/zm.c
index 813be180e9..5cc9499f3c 100644
--- a/common/zm.c
+++ b/common/zm.c
@@ -104,7 +104,9 @@ static int zrdat32 __P ((char *buf, int length, size_t *));
 static void zsbh32 __P ((char *hdr, int type));
 
 extern int zmodem_requested;
-
+extern void xsendline(int c);
+extern void send_data(int fd, char *buf, int size);
+extern void flushmo(void);
 
 /*
  * Read a character from the modem line with timeout.
@@ -290,7 +292,7 @@ zsendline_s(const char *s, size_t count)
 		}
 		if (t!=s) {
 			//fwrite(s,(size_t)(t-s),1,stdout);
-			send_data(1, s, t-s);
+			send_data(1, (char *)s, t-s);
 			lastsent=t[-1];
 			s=t;
 		}
@@ -450,7 +452,7 @@ zsda32(const char *buf, size_t length, int frameend)
 	int c;
 	unsigned long crc;
 	int i;
-	VPRINTF(3,("zsdat32: %d %s", length, Zendnames[(frameend-ZCRCE)&3]));
+	VPRINTF(3,("zsdat32: %d %s", (u32)length, Zendnames[(frameend-ZCRCE)&3]));
 
 	crc = 0xFFFFFFFFL;
 	zsendline_s(buf,length);
diff --git a/common/zreadline.c b/common/zreadline.c
index 01295eb489..67a507f811 100644
--- a/common/zreadline.c
+++ b/common/zreadline.c
@@ -42,8 +42,9 @@ static int readline_fd;
 static char *readline_buffer;
 int readline_left=0;
 char *readline_ptr;
+extern int read_data(int tout_in_100ms, char *buf, int size);
 
-static RETSIGTYPE
+RETSIGTYPE
 zreadline_alarm_handler(int dummy LRZSZ_ATTRIB_UNUSED)
 {
 	/* doesn't need to do anything */
@@ -69,13 +70,13 @@ readline_internal(unsigned int timeout)
 			n=1;
 		if (Verbose > 5)
 			vstringf("Calling read: alarm=%d  Readnum=%d ",
-			  n, readline_readnum);
+			  n, (u32)readline_readnum);
 		//signal(SIGALRM, zreadline_alarm_handler); 
 		//alarm(n);
 	}
 	else if (Verbose > 5)
 		vstringf("Calling read: Readnum=%d ",
-		  readline_readnum);
+		  (u32)readline_readnum);
 
 	readline_ptr=readline_buffer;
 	readline_left=read_data(n*10, readline_ptr, readline_readnum);

commit f8a983e5965e95c7c6bf3eb71de1a91cf440843c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Sep 13 10:21:50 2021 +0800

    common: add zmodem protocol core files
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If239bf15f056100e486266cb6a19a1d1eea36402

diff --git a/common/config.h b/common/config.h
new file mode 100644
index 0000000000..b7d476db70
--- /dev/null
+++ b/common/config.h
@@ -0,0 +1,338 @@
+/* config.h.  Generated automatically by configure.  */
+/* config.h.in.  Generated automatically from configure.in by autoheader.  */
+
+/* Define if on AIX 3.
+   System headers sometimes define this.
+   We just want to avoid a redefinition error message.  */
+#ifndef _ALL_SOURCE
+/* #undef _ALL_SOURCE */
+#endif
+
+/* Define if using alloca.c.  */
+/* #undef C_ALLOCA */
+
+/* Define to empty if the keyword does not work.  */
+/* #undef const */
+
+/* Define to one of _getb67, GETB67, getb67 for Cray-2 and Cray-YMP systems.
+   This function is required for alloca.c support on those systems.  */
+/* #undef CRAY_STACKSEG_END */
+
+/* Define if you have alloca, as a function or macro.  */
+#define HAVE_ALLOCA 1
+
+/* Define if you have <alloca.h> and it should be used (not on Ultrix).  */
+#define HAVE_ALLOCA_H 1
+
+/* Define if you have a working `mmap' system call.  */
+/* #undef HAVE_MMAP */
+
+/* Define if your struct stat has st_rdev.  */
+#define HAVE_ST_RDEV 1
+
+/* Define as __inline if that's what the C compiler calls it.  */
+/* #undef inline */
+
+/* Define if on MINIX.  */
+/* #undef _MINIX */
+
+/* Define to `int' if <sys/types.h> doesn't define.  */
+/* #undef mode_t */
+
+/* Define to `long' if <sys/types.h> doesn't define.  */
+/* #undef off_t */
+
+/* Define if the system does not provide POSIX.1 features except
+   with this defined.  */
+/* #undef _POSIX_1_SOURCE */
+
+/* Define if you need to in order for stat and other things to work.  */
+/* #undef _POSIX_SOURCE */
+
+/* Define as the return type of signal handlers (int or void).  */
+#define RETSIGTYPE void
+
+/* Define if the setvbuf function takes the buffering type as its second
+   argument and the buffer pointer as the third, as on System V
+   before release 3.  */
+/* #undef SETVBUF_REVERSED */
+
+/* Define to `unsigned' if <sys/types.h> doesn't define.  */
+/* #undef size_t */
+
+/* If using the C implementation of alloca, define if you know the
+   direction of stack growth for your system; otherwise it will be
+   automatically deduced at run-time.
+ STACK_DIRECTION > 0 => grows toward higher addresses
+ STACK_DIRECTION < 0 => grows toward lower addresses
+ STACK_DIRECTION = 0 => direction of growth unknown
+ */
+/* #undef STACK_DIRECTION */
+
+/* Define if you have the ANSI C header files.  */
+#define STDC_HEADERS 1
+
+/* Define if you can safely include both <sys/time.h> and <time.h>.  */
+//#define TIME_WITH_SYS_TIME 1
+
+/* Define if your <sys/time.h> declares struct tm.  */
+/* #undef TM_IN_SYS_TIME */
+
+/* define this if you have a reliable ftime function */
+//#define HAVE_FTIME 1
+
+/* define this if you have the timezone variable */
+//#define HAVE_TIMEZONE_VAR 1
+
+/* Define to 1 if NLS is requested.  */
+//#define ENABLE_NLS 1
+
+/* Define as 1 if you have catgets and don't want to use GNU gettext.  */
+/* #undef HAVE_CATGETS */
+
+/* Define as 1 if you have gettext and don't want to use GNU gettext.  */
+#define HAVE_GETTEXT 1
+
+/* Define if your locale.h file contains LC_MESSAGES.  */
+#define HAVE_LC_MESSAGES 1
+
+/* Define to the name of the distribution.  */
+#define PACKAGE "lrzsz"
+
+/* The concatenation of the strings PACKAGE, "-", and VERSION.  */
+#define PACKAGE_VERSION "lrzsz-0.12.20"
+
+/* Define to the version of the distribution.  */
+#define VERSION "0.12.20"
+
+/* Define to 1 if you have the stpcpy function.  */
+#define HAVE_STPCPY 1
+
+/* Define to 1 if your utime() takes struct utimbuf as second argument */
+//#define HAVE_STRUCT_UTIMBUF 1
+
+/* Define to 1 if ANSI function prototypes are usable.  */
+#define PROTOTYPES 1
+
+/* Define to LOG_xxx (a syslog facility) if syslog() shall be used */
+//#define ENABLE_SYSLOG LOG_UUCP
+
+/* Define to 1 if syslogging shall be forced */
+/* #undef ENABLE_SYSLOG_FORCE */
+
+/* Define to 1 if syslogging shall be default */
+//#define ENABLE_SYSLOG_DEFAULT 1
+
+/* Define to 1 if lrz shall create directories if needed */
+//#define ENABLE_MKDIR 1
+
+/* Define to public writable directory if you want this. Leave out the "'s */
+/* #undef PUBDIR */
+
+/* Define to 1 if you want support for the timesync protocol */
+//#define ENABLE_TIMESYNC 1
+
+/* define to 1. we have a replacement function for it. */
+#define HAVE_STRERROR 1
+
+/* define to 1 if you want strict ANSI prototypes. will remove some 
+   extern x(); declarations. */
+/* #undef STRICT_PROTOTYPES */
+
+/* where the localedata hides */
+/* #undef LOCALEDIR */
+
+/* do your system libraries declare errno? */
+#define HAVE_ERRNO_DECLARATION 1
+
+/* define to type of speed_t (long?) */
+/* #undef speed_t */
+
+/* define this if you headers conflict */
+/* #undef SYS_TIME_WITHOUT_SYS_SELECT */
+
+/* Define if you have the __argz_count function.  */
+#define HAVE___ARGZ_COUNT 1
+
+/* Define if you have the __argz_next function.  */
+#define HAVE___ARGZ_NEXT 1
+
+/* Define if you have the __argz_stringify function.  */
+#define HAVE___ARGZ_STRINGIFY 1
+
+/* Define if you have the dcgettext function.  */
+#define HAVE_DCGETTEXT 1
+
+/* Define if you have the getcwd function.  */
+#define HAVE_GETCWD 1
+
+/* Define if you have the getpagesize function.  */
+#define HAVE_GETPAGESIZE 1
+
+/* Define if you have the gettimeofday function.  */
+//#define HAVE_GETTIMEOFDAY 1
+
+/* Define if you have the memcpy function.  */
+#define HAVE_MEMCPY 1
+
+/* Define if you have the mkdir function.  */
+#define HAVE_MKDIR 1
+
+/* Define if you have the mktime function.  */
+#define HAVE_MKTIME 1
+
+/* Define if you have the munmap function.  */
+#define HAVE_MUNMAP 1
+
+/* Define if you have the putenv function.  */
+#define HAVE_PUTENV 1
+
+/* Define if you have the rdchk function.  */
+/* #undef HAVE_RDCHK */
+
+/* Define if you have the select function.  */
+//#define HAVE_SELECT 1
+
+/* Define if you have the setenv function.  */
+#define HAVE_SETENV 1
+
+/* Define if you have the setlocale function.  */
+#define HAVE_SETLOCALE 1
+
+/* Define if you have the settimeofday function.  */
+//#define HAVE_SETTIMEOFDAY 1
+
+/* Define if you have the siginterrupt function.  */
+//#define HAVE_SIGINTERRUPT 1
+
+/* Define if you have the stpcpy function.  */
+#define HAVE_STPCPY 1
+
+/* Define if you have the strcasecmp function.  */
+#define HAVE_STRCASECMP 1
+
+/* Define if you have the strchr function.  */
+#define HAVE_STRCHR 1
+
+/* Define if you have the strdup function.  */
+#define HAVE_STRDUP 1
+
+/* Define if you have the strerror function.  */
+#define HAVE_STRERROR 1
+
+/* Define if you have the strftime function.  */
+#define HAVE_STRFTIME 1
+
+/* Define if you have the strpbrk function.  */
+#define HAVE_STRPBRK 1
+
+/* Define if you have the strstr function.  */
+#define HAVE_STRSTR 1
+
+/* Define if you have the strtol function.  */
+#define HAVE_STRTOL 1
+
+/* Define if you have the strtoul function.  */
+#define HAVE_STRTOUL 1
+
+/* Define if you have the syslog function.  */
+//#define HAVE_SYSLOG 1
+
+/* Define if you have the times function.  */
+#define HAVE_TIMES 1
+
+/* Define if you have the utime function.  */
+//#define HAVE_UTIME 1
+
+/* Define if you have the vasprintf function.  */
+#define HAVE_VASPRINTF 1
+
+/* Define if you have the vprintf function.  */
+#define HAVE_VPRINTF 1
+
+/* Define if you have the <argz.h> header file.  */
+#define HAVE_ARGZ_H 1
+
+/* Define if you have the <arpa/inet.h> header file.  */
+#define HAVE_ARPA_INET_H 1
+
+/* Define if you have the <fcntl.h> header file.  */
+//#define HAVE_FCNTL_H 1
+
+/* Define if you have the <limits.h> header file.  */
+//#define HAVE_LIMITS_H 1
+
+/* Define if you have the <locale.h> header file.  */
+//#define HAVE_LOCALE_H 1
+
+/* Define if you have the <malloc.h> header file.  */
+#define HAVE_MALLOC_H 1
+
+/* Define if you have the <nl_types.h> header file.  */
+#define HAVE_NL_TYPES_H 1
+
+/* Define if you have the <sgtty.h> header file.  */
+//#define HAVE_SGTTY_H 1
+
+/* Define if you have the <string.h> header file.  */
+#define HAVE_STRING_H 1
+
+/* Define if you have the <strings.h> header file.  */
+#define HAVE_STRINGS_H 1
+
+/* Define if you have the <sys/ioctl.h> header file.  */
+//#define HAVE_SYS_IOCTL_H 1
+
+/* Define if you have the <sys/mman.h> header file.  */
+#define HAVE_SYS_MMAN_H 1
+
+/* Define if you have the <sys/param.h> header file.  */
+//#define HAVE_SYS_PARAM_H 1
+
+/* Define if you have the <sys/select.h> header file.  */
+//#define HAVE_SYS_SELECT_H 1
+
+/* Define if you have the <sys/syslog.h> header file.  */
+#define HAVE_SYS_SYSLOG_H 1
+
+/* Define if you have the <sys/termio.h> header file.  */
+/* #undef HAVE_SYS_TERMIO_H */
+
+/* Define if you have the <sys/termios.h> header file.  */
+//#define HAVE_SYS_TERMIOS_H 1
+
+/* Define if you have the <sys/time.h> header file.  */
+//#define HAVE_SYS_TIME_H 1
+
+/* Define if you have the <sys/times.h> header file.  */
+//#define HAVE_SYS_TIMES_H 1
+
+/* Define if you have the <syslog.h> header file.  */
+//#define HAVE_SYSLOG_H 1
+
+/* Define if you have the <termio.h> header file.  */
+//#define HAVE_TERMIO_H 1
+
+/* Define if you have the <termios.h> header file.  */
+//#define HAVE_TERMIOS_H 1
+
+/* Define if you have the <unistd.h> header file.  */
+//#define HAVE_UNISTD_H 1
+
+/* Define if you have the <utime.h> header file.  */
+//#define HAVE_UTIME_H 1
+
+/* Define if you have the <values.h> header file.  */
+#define HAVE_VALUES_H 1
+
+/* Define if you have the be library (-lbe).  */
+/* #undef HAVE_LIBBE */
+
+/* Define if you have the i library (-li).  */
+/* #undef HAVE_LIBI */
+
+/* Define if you have the nsl library (-lnsl).  */
+#define HAVE_LIBNSL 1
+
+/* Define if you have the socket library (-lsocket).  */
+/* #undef HAVE_LIBSOCKET */
diff --git a/common/error.h b/common/error.h
new file mode 100644
index 0000000000..3439f37b24
--- /dev/null
+++ b/common/error.h
@@ -0,0 +1,65 @@
+/* error.h -- declaration for error-reporting function
+   Copyright (C) 1995, 1996 Free Software Foundation, Inc.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+#ifndef _error_h_
+#define _error_h_
+
+#ifndef __attribute__
+/* This feature is available in gcc versions 2.5 and later.  */
+# if __GNUC__ < 2 || (__GNUC__ == 2 && __GNUC_MINOR__ < 5) || __STRICT_ANSI__
+#  define __attribute__(Spec) /* empty */
+# endif
+/* The __-protected variants of `format' and `printf' attributes
+   are accepted by gcc versions 2.6.4 (effectively 2.7) and later.  */
+# if __GNUC__ < 2 || (__GNUC__ == 2 && __GNUC_MINOR__ < 7)
+#  define __format__ format
+#  define __printf__ printf
+# endif
+#endif
+
+#if defined (__STDC__) && __STDC__
+
+/* Print a message with `fprintf (stderr, FORMAT, ...)';
+   if ERRNUM is nonzero, follow it with ": " and strerror (ERRNUM).
+   If STATUS is nonzero, terminate the program with `exit (STATUS)'.  */
+
+extern void error (int status, int errnum, const char *format, ...)
+     __attribute__ ((__format__ (__printf__, 3, 4)));
+
+extern void error_at_line (int status, int errnum, const char *fname,
+			   unsigned int lineno, const char *format, ...)
+     __attribute__ ((__format__ (__printf__, 5, 6)));
+
+/* If NULL, error will flush stdout, then print on stderr the program
+   name, a colon and a space.  Otherwise, error will call this
+   function without parameters instead.  */
+extern void (*error_print_progname) (void);
+
+#else
+void error ();
+void error_at_line ();
+extern void (*error_print_progname) ();
+#endif
+
+/* This variable is incremented each time `error' is called.  */
+extern unsigned int error_message_count;
+
+/* Sometimes we want to have at most one error per line.  This
+   variable controls whether this mode is selected or not.  */
+extern int error_one_per_line;
+
+#endif /* _error_h_ */
diff --git a/common/lrz.c b/common/lrz.c
new file mode 100644
index 0000000000..49322225de
--- /dev/null
+++ b/common/lrz.c
@@ -0,0 +1,2718 @@
+/*
+  lrz - receive files with x/y/zmodem
+  Copyright (C) until 1988 Chuck Forsberg (Omen Technology INC)
+  Copyright (C) 1994 Matt Porter, Michael D. Black
+  Copyright (C) 1996, 1997 Uwe Ohse
+
+  This program is free software; you can redistribute it and/or modify
+  it under the terms of the GNU General Public License as published by
+  the Free Software Foundation; either version 2, or (at your option)
+  any later version.
+  
+  This program is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+  GNU General Public License for more details.
+
+  You should have received a copy of the GNU General Public License
+  along with this program; if not, write to the Free Software
+  Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+  02111-1307, USA.
+
+  originally written by Chuck Forsberg
+*/
+
+#include "zglobal.h"
+
+#define SS_NORMAL 0
+#include <stdio.h>
+#include <stdlib.h>
+//#include <signal.h>
+//#include <ctype.h>
+#include <errno.h>
+//#include <getopt.h>
+
+#ifdef HAVE_UTIME_H
+#include <utime.h>
+#endif
+
+//#include "timing.h"
+//#include "long-options.h"
+//#include "error.h"
+//#include "xstrtol.h"
+
+#ifndef STRICT_PROTOTYPES
+//extern time_t time();
+//extern char *strerror();
+//extern char *strstr();
+#endif
+
+#ifndef HAVE_ERRNO_DECLARATION
+extern int errno;
+#endif
+
+#define MAX_BLOCK 8192
+
+/*
+ * Max value for HOWMANY is 255 if NFGVMIN is not defined.
+ *   A larger value reduces system overhead but may evoke kernel bugs.
+ *   133 corresponds to an XMODEM/CRC sector
+ */
+#ifndef HOWMANY
+#ifdef NFGVMIN
+#define HOWMANY MAX_BLOCK
+#else
+#define HOWMANY 255
+#endif
+#endif
+
+unsigned Baudrate = 2400;
+
+//FILE *fout;
+
+
+int Lastrx;
+int Crcflg;
+int Firstsec;
+int errors;
+int Restricted=1;	/* restricted; no /.. or ../ in filenames */
+int Readnum = HOWMANY;	/* Number of bytes to ask for in read() from modem */
+int skip_if_not_found;
+
+char *Pathname;
+const char *program_name="rz";		/* the name by which we were called */
+
+int Topipe=0;
+int MakeLCPathname=TRUE;	/* make received pathname lower case */
+int Verbose=0;
+int Quiet=0;		/* overrides logic that would otherwise set verbose */
+int Nflag = 0;		/* Don't really transfer files */
+int Rxclob=TRUE;;	/* Clobber existing file */
+int Rxbinary=FALSE;	/* receive all files in bin mode */
+int Rxascii=FALSE;	/* receive files in ascii (translate) mode */
+int Thisbinary;		/* current file is to be received in bin mode */
+int try_resume=FALSE;
+int allow_remote_commands=FALSE;
+int junk_path=FALSE;
+int no_timeout=FALSE;
+enum zm_type_enum protocol=ZM_ZMODEM;
+int	under_rsh=FALSE;
+int zmodem_requested=FALSE;
+
+#ifdef SEGMENTS
+int chinseg = 0;	/* Number of characters received in this data seg */
+char secbuf[1+(SEGMENTS+1)*MAX_BLOCK];
+#else
+char secbuf[MAX_BLOCK + 1];
+#endif
+
+#ifdef ENABLE_TIMESYNC
+int timesync_flag=0;
+int in_timesync=0;
+#endif
+int in_tcpsync=0;
+int tcpsync_flag=1;
+int tcp_socket=-1;
+int tcp_flag=0;
+char *tcp_server_address=NULL;
+
+char tcp_buf[256]="";
+#if defined(F_GETFD) && defined(F_SETFD) && defined(O_SYNC)
+static int o_sync = 0;
+#endif
+static int rzfiles __P ((struct zm_fileinfo *));
+static int tryz __P ((void));
+static void checkpath __P ((const char *name));
+static void chkinvok __P ((const char *s));
+static void report __P ((int sct));
+static void uncaps __P ((char *s));
+static int IsAnyLower __P ((const char *s));
+static int putsec __P ((struct zm_fileinfo *zi, char *buf, size_t n));
+static int make_dirs __P ((char *pathname));
+static int procheader __P ((char *name, struct zm_fileinfo *));
+static int wcgetsec __P ((size_t *Blklen, char *rxbuf, unsigned int maxtime));
+static int wcrx __P ((struct zm_fileinfo *));
+static int wcrxpn __P ((struct zm_fileinfo *, char *rpn));
+static int wcreceive __P ((int argc, char **argp));
+static int rzfile __P ((struct zm_fileinfo *));
+static void usage __P ((int exitcode, const char *what));
+static void usage1 __P ((int exitcode));
+static void exec2 __P ((const char *s));
+static int closeit __P ((struct zm_fileinfo *));
+static void ackbibi __P ((void));
+static int sys2 __P ((const char *s));
+static void zmputs __P ((const char *s));
+static size_t getfree __P ((void));
+
+static long buffersize=1024*128;
+static unsigned long min_bps=0;
+static long min_bps_time=120;
+
+char Lzmanag;		/* Local file management request */
+char zconv;		/* ZMODEM file conversion request */
+char zmanag;		/* ZMODEM file management request */
+char ztrans;		/* ZMODEM file transport request */
+int Zctlesc;		/* Encode control characters */
+int Zrwindow = 1400;	/* RX window size (controls garbage count) */
+
+int tryzhdrtype=ZRINIT;	/* Header type to send corresponding to Last rx close */
+time_t stop_time;
+void *zmodem_addr;
+unsigned int zmodem_offset;
+
+#ifdef ENABLE_SYSLOG
+#  if defined(ENABLE_SYSLOG_FORCE) || defined(ENABLE_SYSLOG_DEFAULT)
+int enable_syslog=TRUE;
+#  else
+int enable_syslog=FALSE;
+#  endif
+#define DO_SYSLOG_FNAME(message) do { \
+	if (enable_syslog) { \
+		const char *shortname; \
+		if (!zi->fname) \
+			shortname="no.name"; \
+		else { \
+			shortname=strrchr(zi->fname,'/'); \
+			if (!shortname) \
+				shortname=zi->fname; \
+			else \
+				shortname++; \
+		} \
+        lsyslog message ; \
+	} \
+} while(0)
+#define DO_SYSLOG(message) do { \
+	if (enable_syslog) { \
+        lsyslog message ; \
+	} \
+} while(0)
+#else
+#define DO_SYSLOG_FNAME(message) do { } while(0)
+#define DO_SYSLOG(message) do { } while(0)
+#endif
+#ifdef __STDC__
+#  define WAYTOGO
+#  include <stdarg.h>
+#  define VA_START(args, lastarg) va_start(args, lastarg)
+#else
+#  include <varargs.h>
+#  define VA_START(args, lastarg) va_start(args)
+#endif
+#define error(x,y,z,a)
+/*********************************************************/
+/****************  PORTING FUNTIONS **********************/
+/*********************************************************/
+
+// Send one character
+void sendline(int c)
+{
+	CYGACC_COMM_IF_PUTC(0, c);
+}
+//read data with timeout
+//ret value: how many bytes read, 0=timeout, <0=error
+//read data is store at buf
+int read_data(int tout_in_100ms, char *buf, int size)
+{
+	extern int xyzModem_CHAR_TIMEOUT;
+	int c;
+	int wait_msec = tout_in_100ms * 100;
+	int ret;
+	
+	while(1) {
+		ret = CYGACC_COMM_IF_GETC_TIMEOUT(0, &c);
+		if(ret != 0) {
+			buf[0] = c;
+			return 1;
+		}
+		if(wait_msec > xyzModem_CHAR_TIMEOUT)
+			wait_msec -= xyzModem_CHAR_TIMEOUT;
+		else
+			wait_msec = 0;
+		if(wait_msec == 0)
+			return 0;
+	}
+	
+
+}
+//send data in a buffer 
+void send_data(int fd, char *buf, int size)
+{
+	int i;
+	for(i=0;i<size;i++)
+		CYGACC_COMM_IF_PUTC(0, buf[i]);
+	
+}
+//flush tx data
+void flushmo()
+{
+	//flush tx
+}
+//return seconds elapsed between reset=1 & reset=0. float allowed
+double timing (int reset, time_t *nowp)
+{
+	static unsigned long start;
+	if(reset) {
+		start = get_timer(0);
+		return 0;
+	}
+	else {
+		return get_timer(start)/ 1000;
+	}
+	
+}
+/***************************************************/
+/************** END PORTING FUNCTIONS **************/
+/***************************************************/
+void xsendline(int c)
+{
+	sendline(c);
+}
+int printable(int c)
+{
+	if((c>=' ') && (c <= '~'))
+		return c;
+	return '?';
+}
+
+void
+#ifdef WAYTOGO
+zperr(const char *fmt, ...)
+#else
+zperr(fmt, va_alist)
+	const char *fmt;
+	va_dcl
+#endif
+{
+#if 0
+    va_list ap;
+
+	if (Verbose<=0)
+		return;
+	fprintf(stderr,_("Retry %d: "),errors);
+    VA_START(ap, fmt);
+    vfprintf(stderr,fmt, ap);
+    va_end(ap);
+    putc('\n',stderr);
+#endif
+}
+
+void
+#ifdef WAYTOGO
+zpfatal(const char *fmt, ...)
+#else
+zpfatal(fmt, va_alist)
+	const char *fmt;
+	va_dcl
+#endif
+{
+#if 0
+    va_list ap;
+    int err=errno;
+
+	if (Verbose<=0)
+		return;
+	fprintf(stderr,"%s: ",program_name);
+    VA_START(ap, fmt);
+    vfprintf(stderr,fmt, ap);
+    va_end(ap);
+	fprintf(stderr,": %s\n",strerror(err));
+#endif
+}
+
+void 
+#ifdef WAYTOGO
+vfile(const char *format, ...)
+#else
+vfile(format, va_alist)
+	const char *format;
+	va_dcl
+#endif
+{
+#if 0
+    va_list ap;
+
+	if (Verbose < 3)
+		return;
+    VA_START(ap, format);
+    vfprintf(stderr,format, ap);
+    va_end(ap);
+    putc('\n',stderr);
+#endif
+}
+
+#ifndef vstringf
+/* if using gcc this function is not needed */
+void 
+#ifdef WAYTOGO
+vstringf(const char *format, ...)
+#else
+vstringf(format, va_alist)
+	const char *format;
+	va_dcl
+#endif
+{
+    va_list ap;
+
+    VA_START(ap, format);
+    vfprintf(stderr,format, ap);
+    va_end(ap);
+}
+#endif
+long cr3tab[] = { /* CRC polynomial 0xedb88320 */
+0x00000000, 0x77073096, 0xee0e612c, 0x990951ba, 0x076dc419, 0x706af48f, 0xe963a535, 0x9e6495a3,
+0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988, 0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91,
+0x1db71064, 0x6ab020f2, 0xf3b97148, 0x84be41de, 0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7,
+0x136c9856, 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec, 0x14015c4f, 0x63066cd9, 0xfa0f3d63, 0x8d080df5,
+0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172, 0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b,
+0x35b5a8fa, 0x42b2986c, 0xdbbbc9d6, 0xacbcf940, 0x32d86ce3, 0x45df5c75, 0xdcd60dcf, 0xabd13d59,
+0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116, 0x21b4f4b5, 0x56b3c423, 0xcfba9599, 0xb8bda50f,
+0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924, 0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d,
+0x76dc4190, 0x01db7106, 0x98d220bc, 0xefd5102a, 0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433,
+0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818, 0x7f6a0dbb, 0x086d3d2d, 0x91646c97, 0xe6635c01,
+0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e, 0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457,
+0x65b0d9c6, 0x12b7e950, 0x8bbeb8ea, 0xfcb9887c, 0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65,
+0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2, 0x4adfa541, 0x3dd895d7, 0xa4d1c46d, 0xd3d6f4fb,
+0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0, 0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9,
+0x5005713c, 0x270241aa, 0xbe0b1010, 0xc90c2086, 0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f,
+0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4, 0x59b33d17, 0x2eb40d81, 0xb7bd5c3b, 0xc0ba6cad,
+0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a, 0xead54739, 0x9dd277af, 0x04db2615, 0x73dc1683,
+0xe3630b12, 0x94643b84, 0x0d6d6a3e, 0x7a6a5aa8, 0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1,
+0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe, 0xf762575d, 0x806567cb, 0x196c3671, 0x6e6b06e7,
+0xfed41b76, 0x89d32be0, 0x10da7a5a, 0x67dd4acc, 0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5,
+0xd6d6a3e8, 0xa1d1937e, 0x38d8c2c4, 0x4fdff252, 0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b,
+0xd80d2bda, 0xaf0a1b4c, 0x36034af6, 0x41047a60, 0xdf60efc3, 0xa867df55, 0x316e8eef, 0x4669be79,
+0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236, 0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f,
+0xc5ba3bbe, 0xb2bd0b28, 0x2bb45a92, 0x5cb36a04, 0xc2d7ffa7, 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d,
+0x9b64c2b0, 0xec63f226, 0x756aa39c, 0x026d930a, 0x9c0906a9, 0xeb0e363f, 0x72076785, 0x05005713,
+0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38, 0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21,
+0x86d3d2d4, 0xf1d4e242, 0x68ddb3f8, 0x1fda836e, 0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777,
+0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c, 0x8f659eff, 0xf862ae69, 0x616bffd3, 0x166ccf45,
+0xa00ae278, 0xd70dd2ee, 0x4e048354, 0x3903b3c2, 0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db,
+0xaed16a4a, 0xd9d65adc, 0x40df0b66, 0x37d83bf0, 0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9,
+0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6, 0xbad03605, 0xcdd70693, 0x54de5729, 0x23d967bf,
+0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94, 0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d
+};
+unsigned short crctab[256] = {
+    0x0000,  0x1021,  0x2042,  0x3063,  0x4084,  0x50a5,  0x60c6,  0x70e7,
+    0x8108,  0x9129,  0xa14a,  0xb16b,  0xc18c,  0xd1ad,  0xe1ce,  0xf1ef,
+    0x1231,  0x0210,  0x3273,  0x2252,  0x52b5,  0x4294,  0x72f7,  0x62d6,
+    0x9339,  0x8318,  0xb37b,  0xa35a,  0xd3bd,  0xc39c,  0xf3ff,  0xe3de,
+    0x2462,  0x3443,  0x0420,  0x1401,  0x64e6,  0x74c7,  0x44a4,  0x5485,
+    0xa56a,  0xb54b,  0x8528,  0x9509,  0xe5ee,  0xf5cf,  0xc5ac,  0xd58d,
+    0x3653,  0x2672,  0x1611,  0x0630,  0x76d7,  0x66f6,  0x5695,  0x46b4,
+    0xb75b,  0xa77a,  0x9719,  0x8738,  0xf7df,  0xe7fe,  0xd79d,  0xc7bc,
+    0x48c4,  0x58e5,  0x6886,  0x78a7,  0x0840,  0x1861,  0x2802,  0x3823,
+    0xc9cc,  0xd9ed,  0xe98e,  0xf9af,  0x8948,  0x9969,  0xa90a,  0xb92b,
+    0x5af5,  0x4ad4,  0x7ab7,  0x6a96,  0x1a71,  0x0a50,  0x3a33,  0x2a12,
+    0xdbfd,  0xcbdc,  0xfbbf,  0xeb9e,  0x9b79,  0x8b58,  0xbb3b,  0xab1a,
+    0x6ca6,  0x7c87,  0x4ce4,  0x5cc5,  0x2c22,  0x3c03,  0x0c60,  0x1c41,
+    0xedae,  0xfd8f,  0xcdec,  0xddcd,  0xad2a,  0xbd0b,  0x8d68,  0x9d49,
+    0x7e97,  0x6eb6,  0x5ed5,  0x4ef4,  0x3e13,  0x2e32,  0x1e51,  0x0e70,
+    0xff9f,  0xefbe,  0xdfdd,  0xcffc,  0xbf1b,  0xaf3a,  0x9f59,  0x8f78,
+    0x9188,  0x81a9,  0xb1ca,  0xa1eb,  0xd10c,  0xc12d,  0xf14e,  0xe16f,
+    0x1080,  0x00a1,  0x30c2,  0x20e3,  0x5004,  0x4025,  0x7046,  0x6067,
+    0x83b9,  0x9398,  0xa3fb,  0xb3da,  0xc33d,  0xd31c,  0xe37f,  0xf35e,
+    0x02b1,  0x1290,  0x22f3,  0x32d2,  0x4235,  0x5214,  0x6277,  0x7256,
+    0xb5ea,  0xa5cb,  0x95a8,  0x8589,  0xf56e,  0xe54f,  0xd52c,  0xc50d,
+    0x34e2,  0x24c3,  0x14a0,  0x0481,  0x7466,  0x6447,  0x5424,  0x4405,
+    0xa7db,  0xb7fa,  0x8799,  0x97b8,  0xe75f,  0xf77e,  0xc71d,  0xd73c,
+    0x26d3,  0x36f2,  0x0691,  0x16b0,  0x6657,  0x7676,  0x4615,  0x5634,
+    0xd94c,  0xc96d,  0xf90e,  0xe92f,  0x99c8,  0x89e9,  0xb98a,  0xa9ab,
+    0x5844,  0x4865,  0x7806,  0x6827,  0x18c0,  0x08e1,  0x3882,  0x28a3,
+    0xcb7d,  0xdb5c,  0xeb3f,  0xfb1e,  0x8bf9,  0x9bd8,  0xabbb,  0xbb9a,
+    0x4a75,  0x5a54,  0x6a37,  0x7a16,  0x0af1,  0x1ad0,  0x2ab3,  0x3a92,
+    0xfd2e,  0xed0f,  0xdd6c,  0xcd4d,  0xbdaa,  0xad8b,  0x9de8,  0x8dc9,
+    0x7c26,  0x6c07,  0x5c64,  0x4c45,  0x3ca2,  0x2c83,  0x1ce0,  0x0cc1,
+    0xef1f,  0xff3e,  0xcf5d,  0xdf7c,  0xaf9b,  0xbfba,  0x8fd9,  0x9ff8,
+    0x6e17,  0x7e36,  0x4e55,  0x5e74,  0x2e93,  0x3eb2,  0x0ed1,  0x1ef0
+};
+
+void
+canit (int fd)
+{
+	static char canistr[] =
+	{
+		24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 0
+	};
+	purgeline(fd);
+	//write(fd,canistr,strlen(canistr));
+	send_data(fd, canistr, strlen(canistr));
+	if (fd==0) {
+		//write(1,canistr,strlen(canistr));
+		send_data(1,canistr,strlen(canistr));
+	}
+}
+
+const char *
+protname(void)
+{
+	const char *prot_name;
+	switch(protocol) {
+	case ZM_XMODEM:
+		prot_name="XMODEM"; 
+		break;
+	case ZM_YMODEM:
+		prot_name="YMODEM"; 
+		break;
+	default: 
+		prot_name="ZMODEM";
+		break;
+	}
+	return prot_name;
+}
+
+/* called by signal interrupt or terminate to clean things up */
+RETSIGTYPE
+bibi(int n)
+{
+	if (zmodem_requested)
+		zmputs(Attn);
+	canit(0);
+	io_mode(0,0);
+	//error(128+n,0,_("caught signal %d; exiting"), n);
+}
+
+#if 0
+static struct option const long_options[] =
+{
+	{"append", no_argument, NULL, '+'},
+	{"ascii", no_argument, NULL, 'a'},
+	{"binary", no_argument, NULL, 'b'},
+	{"bufsize", required_argument, NULL, 'B'},
+	{"allow-commands", no_argument, NULL, 'C'},
+	{"allow-remote-commands", no_argument, NULL, 'C'},
+	{"escape", no_argument, NULL, 'e'},
+	{"rename", no_argument, NULL, 'E'},
+	{"help", no_argument, NULL, 'h'},
+	{"crc-check", no_argument, NULL, 'H'},
+	{"junk-path", no_argument, NULL, 'j'},
+	{"errors", required_argument, NULL, 3},
+	{"disable-timeouts", no_argument, NULL, 'O'},
+	{"disable-timeout", no_argument, NULL, 'O'}, /* i can't get it right */
+	{"min-bps", required_argument, NULL, 'm'},
+	{"min-bps-time", required_argument, NULL, 'M'},
+	{"newer", no_argument, NULL, 'n'},
+	{"newer-or-longer", no_argument, NULL, 'N'},
+	{"protect", no_argument, NULL, 'p'},
+	{"resume", no_argument, NULL, 'r'},
+	{"restricted", no_argument, NULL, 'R'},
+	{"quiet", no_argument, NULL, 'q'},
+	{"stop-at", required_argument, NULL, 's'},
+	{"timesync", no_argument, NULL, 'S'},
+	{"timeout", required_argument, NULL, 't'},
+	{"keep-uppercase", no_argument, NULL, 'u'},
+	{"unrestrict", no_argument, NULL, 'U'},
+	{"verbose", no_argument, NULL, 'v'},
+	{"windowsize", required_argument, NULL, 'w'},
+	{"with-crc", no_argument, NULL, 'c'},
+	{"xmodem", no_argument, NULL, 'X'},
+	{"ymodem", no_argument, NULL, 1},
+	{"zmodem", no_argument, NULL, 'Z'},
+	{"overwrite", no_argument, NULL, 'y'},
+	{"null", no_argument, NULL, 'D'},
+	{"syslog", optional_argument, NULL , 2},
+	{"delay-startup", required_argument, NULL, 4},
+	{"o-sync", no_argument, NULL, 5},
+	{"o_sync", no_argument, NULL, 5},
+	{"tcp-server", no_argument, NULL, 6},
+	{"tcp-client", required_argument, NULL, 7},
+	{NULL,0,NULL,0}
+};
+#endif
+
+static void
+show_version(void)
+{
+	printf ("%s (%s) %s\n", program_name, PACKAGE, VERSION);
+}
+
+int
+//main(int argc, char *argv[])
+zmodem_rx(unsigned int addr, int *rxsize)
+{
+	register char *cp;
+	//register int npats;
+	//char **patts=NULL; /* keep compiler quiet */
+	int exitcode=0;
+	int c;
+	unsigned int startup_delay=0;
+	int argc = 1 ;
+	char *argv[] = { "rz" };
+	zmodem_addr = addr;
+	zmodem_offset = 0;
+
+	Rxtimeout = 100;
+#if 0
+	setbuf(stderr, NULL);
+	if ((cp=getenv("SHELL")) && (strstr(cp, "rsh") || strstr(cp, "rksh")
+		|| strstr(cp,"rbash") || strstr(cp, "rshell")))
+		under_rsh=TRUE;
+	if ((cp=getenv("ZMODEM_RESTRICTED"))!=NULL)
+		Restricted=2;
+#endif
+
+	/* make temporary and unfinished files */
+	//umask(0077);
+
+	//from_cu();
+	//chkinvok(argv[0]);	/* if called as [-]rzCOMMAND set flag */
+
+#ifdef ENABLE_SYSLOG
+	openlog(program_name,LOG_PID,ENABLE_SYSLOG);
+#endif
+
+	//setlocale (LC_ALL, "");
+	//bindtextdomain (PACKAGE, LOCALEDIR);
+	//textdomain (PACKAGE);
+
+#if 0
+    parse_long_options (argc, argv, show_version, usage1);
+
+	while ((c = getopt_long (argc, argv, 
+		"a+bB:cCDeEhm:M:OprRqs:St:uUvw:XZy",
+		long_options, (int *) 0)) != EOF)
+	{
+		unsigned long int tmp;
+		char *tmpptr;
+		enum strtol_error s_err;
+
+		switch (c)
+		{
+		case 0:
+			break;
+		case '+': Lzmanag = ZF1_ZMAPND; break;
+		case 'a': Rxascii=TRUE;  break;
+		case 'b': Rxbinary=TRUE; break;
+		case 'B': 
+			if (strcmp(optarg,"auto")==0) 
+				buffersize=-1;
+			else
+				buffersize=strtol(optarg,NULL,10);
+			break;
+		case 'c': Crcflg=TRUE; break;
+		case 'C': allow_remote_commands=TRUE; break;
+		case 'D': Nflag = TRUE; break;
+		case 'E': Lzmanag = ZF1_ZMCHNG; break;
+		case 'e': Zctlesc = 1; break;
+		case 'h': usage(0,NULL); break;
+		case 'H': Lzmanag= ZF1_ZMCRC; break;
+		case 'j': junk_path=TRUE; break;
+		case 'm':
+			s_err = xstrtoul (optarg, &tmpptr, 0, &tmp, "km");
+			min_bps = tmp;
+			if (s_err != LONGINT_OK)
+				STRTOL_FATAL_ERROR (optarg, _("min_bps"), s_err);
+			break;
+		case 'M':
+			s_err = xstrtoul (optarg, NULL, 0, &tmp, NULL);
+			min_bps_time = tmp;
+			if (s_err != LONGINT_OK)
+				STRTOL_FATAL_ERROR (optarg, _("min_bps_time"), s_err);
+			if (min_bps_time<=1)
+				usage(2,_("min_bps_time must be > 1"));
+			break;
+		case 'N': Lzmanag = ZF1_ZMNEWL;  break;
+		case 'n': Lzmanag = ZF1_ZMNEW;  break;
+		case 'O': no_timeout=TRUE; break;
+		case 'p': Lzmanag = ZF1_ZMPROT;  break;
+		case 'q': Quiet=TRUE; Verbose=0; break;
+		case 's':
+			if (isdigit((unsigned char) (*optarg))) {
+				struct tm *tm;
+				time_t t;
+				int hh,mm;
+				char *nex;
+				
+				hh = strtoul (optarg, &nex, 10);
+				if (hh>23)
+					usage(2,_("hour to large (0..23)"));
+				if (*nex!=':')
+					usage(2, _("unparsable stop time\n"));
+				nex++;
+                mm = strtoul (optarg, &nex, 10);
+				if (mm>59)
+					usage(2,_("minute to large (0..59)"));
+				
+				t=time(NULL);
+				tm=localtime(&t);
+				tm->tm_hour=hh;
+				tm->tm_min=hh;
+				stop_time=mktime(tm);
+				if (stop_time<t)
+					stop_time+=86400L; /* one day more */
+				if (stop_time - t <10)
+					usage(2,_("stop time to small"));
+			} else {
+				s_err = xstrtoul (optarg, NULL, 0, &tmp, NULL);
+				stop_time = tmp + time(0);
+				if (s_err != LONGINT_OK)
+					STRTOL_FATAL_ERROR (optarg, _("stop-at"), s_err);
+				if (tmp<10)
+					usage(2,_("stop time to small"));
+			}
+			break;
+
+
+		case 'r': 
+			if (try_resume) 
+				Lzmanag= ZF1_ZMCRC;
+			else
+				try_resume=TRUE;  
+			break;
+		case 'R': Restricted++;  break;
+		case 'S':
+#ifdef ENABLE_TIMESYNC
+			timesync_flag++;
+			if (timesync_flag==2) {
+#ifdef HAVE_SETTIMEOFDAY
+				//error(0,0,_("don't have settimeofday, will not set time\n"));
+#endif
+				//if (getuid()!=0)
+				//	error(0,0,
+				//_("not running as root (this is good!), can not set time\n"));
+			}
+#endif
+			break;
+		case 't':
+			s_err = xstrtoul (optarg, NULL, 0, &tmp, NULL);
+			Rxtimeout = tmp;
+			if (s_err != LONGINT_OK)
+				STRTOL_FATAL_ERROR (optarg, _("timeout"), s_err);
+			if (Rxtimeout<10 || Rxtimeout>1000)
+				usage(2,_("timeout out of range 10..1000"));
+			break;
+		case 'w':
+			s_err = xstrtoul (optarg, NULL, 0, &tmp, NULL);
+			Zrwindow = tmp;
+			if (s_err != LONGINT_OK)
+				STRTOL_FATAL_ERROR (optarg, _("window size"), s_err);
+			break;
+		case 'u':
+			MakeLCPathname=FALSE; break;
+		case 'U':
+			if (!under_rsh)
+				Restricted=0;
+			else  {
+				DO_SYSLOG((LOG_INFO,"--unrestrict option used under restricted shell"));
+				//error(1,0,
+	//_("security violation: can't do that under restricted shell\n"));
+			}
+			break;
+		case 'v':
+			++Verbose; break;
+		case 'X': protocol=ZM_XMODEM; break;
+		case 1:   protocol=ZM_YMODEM; break;
+		case 'Z': protocol=ZM_ZMODEM; break;
+		case 'y':
+			Rxclob=TRUE; break;
+		case 2:
+#ifdef ENABLE_SYSLOG
+#  ifndef ENABLE_SYSLOG_FORCE
+			if (optarg && (!strcmp(optarg,"off") || !strcmp(optarg,"no"))) {
+				if (under_rsh)
+					;//error(0,0, _("cannot turnoff syslog"));
+				else
+					enable_syslog=FALSE;
+			}
+			else
+				enable_syslog=TRUE;
+#  else
+			//error(0,0, _("cannot turnoff syslog"));
+#  endif
+#endif
+		case 3:
+			s_err = xstrtoul (optarg, NULL, 0, &tmp, "km");
+			bytes_per_error = tmp;
+			if (s_err != LONGINT_OK)
+				STRTOL_FATAL_ERROR (optarg, _("bytes_per_error"), s_err);
+			if (bytes_per_error<100)
+				usage(2,_("bytes-per-error should be >100"));
+			break;
+        case 4:
+			s_err = xstrtoul (optarg, NULL, 0, &tmp, NULL);
+			startup_delay = tmp;
+			if (s_err != LONGINT_OK)
+				STRTOL_FATAL_ERROR (optarg, _("startup delay"), s_err);
+			break;
+		case 5:
+#if defined(F_GETFD) && defined(F_SETFD) && defined(O_SYNC)
+			o_sync=1;
+#else
+			//error(0,0, _("O_SYNC not supported by the kernel"));
+#endif
+			break;
+		case 6:
+			tcp_flag=2;
+			break;
+		case 7:
+			tcp_flag=3;
+			tcp_server_address=(char *)strdup(optarg);
+			if (!tcp_server_address)
+				;//error(1,0,_("out of memory"));
+			break;
+		default:
+			usage(2,NULL);
+		}
+
+	}
+#endif
+
+#if 0
+	if (getuid()!=geteuid()) {
+		error(1,0,
+		_("this program was never intended to be used setuid\n"));
+	}
+#endif
+	/* initialize zsendline tab */
+	zsendline_init();
+#ifdef HAVE_SIGINTERRUPT
+	siginterrupt(SIGALRM,1);
+#endif
+	//if (startup_delay)
+	//	sleep(startup_delay);
+
+	//npats = argc - optind;
+	//patts=&argv[optind];
+
+#if 0
+	if (npats > 1)
+		usage(2,_("garbage on commandline"));
+	if (protocol!=ZM_XMODEM && npats)
+		usage(2, _("garbage on commandline"));
+	if (Restricted && allow_remote_commands) {
+		allow_remote_commands=FALSE;
+	}
+#endif
+	allow_remote_commands=FALSE;
+	if (Fromcu && !Quiet) {
+		if (Verbose == 0)
+			Verbose = 2;
+	}
+
+	vfile("%s %s\n", program_name, VERSION);
+
+#if 0
+	if (tcp_flag==2) {
+		char buf[256];
+#ifdef MAXHOSTNAMELEN
+		char hn[MAXHOSTNAMELEN];
+#else
+		char hn[256];
+#endif
+		char *p,*q;
+		int d;
+
+		/* tell receiver to receive via tcp */
+		d=tcp_server(buf);
+		p=strchr(buf+1,'<');
+		p++;
+		q=strchr(p,'>');
+		*q=0;
+		if (gethostname(hn,sizeof(hn))==-1) {
+			error(1,0, _("hostname too long\n"));
+		}
+		fprintf(stdout,"connect with lrz --tcp-client \"%s:%s\"\n",hn,p);
+		fflush(stdout);
+		/* ok, now that this file is sent we can switch to tcp */
+
+		tcp_socket=tcp_accept(d);
+		dup2(tcp_socket,0);
+		dup2(tcp_socket,1);
+	}
+	if (tcp_flag==3) {
+		char buf[256];
+		char *p;
+		p=strchr(tcp_server_address,':');
+		if (!p)
+			error(1,0, _("illegal server address\n"));
+		*p++=0;
+		sprintf(buf,"[%s] <%s>\n",tcp_server_address,p);
+
+		fprintf(stdout,"connecting to %s\n",buf);
+		fflush(stdout);
+
+		/* we need to switch to tcp mode */
+		tcp_socket=tcp_connect(buf);
+		dup2(tcp_socket,0);
+		dup2(tcp_socket,1);
+	}
+#endif
+
+	io_mode(0,1);
+	readline_setup(0, HOWMANY, MAX_BLOCK*2);
+	//if (signal(SIGINT, bibi) == SIG_IGN)
+	//	signal(SIGINT, SIG_IGN);
+	//else
+	//	signal(SIGINT, bibi);
+	//signal(SIGTERM, bibi);
+	//signal(SIGPIPE, bibi);
+	xil_printf("Starto wait rx data\n\r");
+
+	if (wcreceive(0, NULL)==ERROR) {
+		exitcode=0200;
+		canit(0);
+	}
+	xil_printf("Receive done\n\r");
+	io_mode(0,0);
+	if (exitcode && !zmodem_requested)	/* bellow again with all thy might. */
+		canit(0);
+	if (Verbose)
+	{
+		fputs("\r\n",stderr);
+		if (exitcode)
+			fputs(_("Transfer incomplete\n"),stderr);
+		else
+			fputs(_("Transfer complete\n"),stderr);
+	}
+	*rxsize = zmodem_offset;
+	return exitcode;
+}
+
+static void
+usage1(int exitcode)
+{
+	usage(exitcode,NULL);
+}
+
+static void
+usage(int exitcode, const char *what)
+{
+	printf("TBD\n");
+	return;
+}
+
+/*
+ * Let's receive something already.
+ */
+
+static int 
+wcreceive(int argc, char **argp)
+{
+	int c;
+	struct zm_fileinfo zi;
+#ifdef ENABLE_SYSLOG
+	const char *shortname=NULL;;
+#endif
+	zi.fname=NULL;
+	zi.modtime=0;
+	zi.mode=0;
+	zi.bytes_total=0;
+	zi.bytes_sent=0;
+	zi.bytes_received=0;
+	zi.bytes_skipped=0;
+	zi.eof_seen=0;
+
+	if (protocol!=ZM_XMODEM || argc==0) {
+		Crcflg=1;
+		if ( !Quiet)
+			vstringf(_("%s waiting to receive."), program_name);
+		if ((c=tryz())!=0) {
+			//xil_printf("%s(): L%d debug\n\r", __func__, __LINE__);
+			if (c == ZCOMPL) {
+				//xil_printf("%s(): L%d debug\n\r", __func__, __LINE__);
+				return OK;
+			}
+			if (c == ERROR) {
+				xil_printf("%s(): L%d debug\n\r", __func__, __LINE__);
+				goto fubar;
+			}
+			c = rzfiles(&zi);
+
+#ifdef ENABLE_SYSLOG
+			shortname=NULL;
+#endif
+			if (c) {
+				//xil_printf("%s(): L%d debug\n\r", __func__, __LINE__);
+				goto fubar;
+			}
+		} else {
+			for (;;) {
+				if (Verbose > 1
+#ifdef ENABLE_SYSLOG
+					|| enable_syslog
+#endif
+				)
+					timing(1,NULL);
+#ifdef ENABLE_SYSLOG
+				shortname=NULL;
+#endif
+				if (wcrxpn(&zi,secbuf)== ERROR) {
+					xil_printf("%s(): L%d debug\n\r", __func__, __LINE__);
+					goto fubar;
+				}
+				if (secbuf[0]==0) {
+					//xil_printf("%s(): L%d debug\n\r", __func__, __LINE__);
+					return OK;
+				}
+				if (procheader(secbuf, &zi) == ERROR) {
+					xil_printf("%s(): L%d debug\n\r", __func__, __LINE__);
+					goto fubar;
+				}
+#ifdef ENABLE_SYSLOG
+				shortname=strrchr(zi.fname,'/');
+				if (shortname)
+					shortname++;
+				else
+					shortname=zi.fname;
+#endif
+				if (wcrx(&zi)==ERROR) {
+					xil_printf("%s(): L%d debug\n\r", __func__, __LINE__);
+					goto fubar;
+				}
+
+				if (Verbose > 1
+#ifdef ENABLE_SYSLOG
+					|| enable_syslog
+#endif
+				) {
+					double d;
+					long bps;
+					d=timing(0,NULL);
+					if (d==0)
+						d=0.5; /* can happen if timing uses time() */
+					bps=(zi.bytes_received-zi.bytes_skipped)/d;
+
+					if (Verbose>1) {
+						vstringf(
+							_("\rBytes received: %7ld/%7ld   BPS:%-6ld                \r\n"),
+							(long) zi.bytes_received, (long) zi.bytes_total, bps);
+					}
+#ifdef ENABLE_SYSLOG
+					if (enable_syslog)
+						lsyslog(LOG_INFO,"%s/%s: %ld Bytes, %ld BPS",
+							shortname,protname(),zi.bytes_received, bps);
+#endif
+				}
+			}
+		}
+	} else {
+		printf("Only support ZModem\n");
+#if 0
+		char dummy[128];
+		dummy[0]='\0'; /* pre-ANSI HPUX cc demands this */
+		dummy[1]='\0'; /* procheader uses name + 1 + strlen(name) */
+		zi.bytes_total = DEFBYTL;
+
+		if (Verbose > 1
+#ifdef ENABLE_SYSLOG
+			|| enable_syslog
+#endif
+			) 
+			timing(1,NULL);
+		procheader(dummy, &zi);
+
+		if (Pathname)
+			free(Pathname);
+		errno=0;
+		Pathname=malloc(PATH_MAX+1);
+		//if (!Pathname)
+		//	error(1,0,_("out of memory"));
+
+		strcpy(Pathname, *argp);
+		checkpath(Pathname);
+#ifdef ENABLE_SYSLOG
+		shortname=strrchr(*argp,'/');
+		if (shortname)
+			shortname++;
+		else
+			shortname=*argp;
+#endif
+		vchar('\n');
+		vstringf(_("%s: ready to receive %s"), program_name, Pathname);
+		vstring("\r\n");
+
+		//if ((fout=fopen(Pathname, "w")) == NULL) {
+		if (0) {
+#ifdef ENABLE_SYSLOG
+			if (enable_syslog)
+				lsyslog(LOG_ERR,"%s/%s: cannot open: %m",
+					shortname,protname());
+#endif
+			return ERROR;
+		}
+		if (wcrx(&zi)==ERROR) {
+			goto fubar;
+		}
+		if (Verbose > 1
+#ifdef ENABLE_SYSLOG
+			|| enable_syslog
+#endif
+	 		) {
+			double d;
+			long bps;
+			d=timing(0,NULL);
+			if (d==0)
+				d=0.5; /* can happen if timing uses time() */
+			bps=(zi.bytes_received-zi.bytes_skipped)/d;
+			if (Verbose) {
+				vstringf(
+					_("\rBytes received: %7ld   BPS:%-6ld                \r\n"),
+					(long) zi.bytes_received, bps);
+			}
+#ifdef ENABLE_SYSLOG
+			if (enable_syslog)
+				lsyslog(LOG_INFO,"%s/%s: %ld Bytes, %ld BPS",
+					shortname,protname(),zi.bytes_received, bps);
+#endif
+		}
+#endif
+	}
+	return OK;
+fubar:
+#ifdef ENABLE_SYSLOG
+	if (enable_syslog)
+		lsyslog(LOG_ERR,"%s/%s: got error", 
+			shortname ? shortname : "no.name", protname());
+#endif
+	canit(0);
+#if 0
+	if (Topipe && fout) {
+		pclose(fout);  return ERROR;
+	}
+	if (fout)
+		fclose(fout);
+#endif
+
+	if (Restricted && Pathname) {
+		//unlink(Pathname);
+		vstringf(_("\r\n%s: %s removed.\r\n"), program_name, Pathname);
+	}
+	return ERROR;
+}
+
+
+/*
+ * Fetch a pathname from the other end as a C ctyle ASCIZ string.
+ * Length is indeterminate as long as less than Blklen
+ * A null string represents no more files (YMODEM)
+ */
+static int 
+wcrxpn(struct zm_fileinfo *zi, char *rpn)
+{
+	register int c;
+	size_t Blklen=0;		/* record length of received packets */
+
+#ifdef NFGVMIN
+	READLINE_PF(1);
+#else
+	purgeline(0);
+#endif
+
+et_tu:
+	Firstsec=TRUE;
+	zi->eof_seen=FALSE;
+	sendline(Crcflg?WANTCRC:NAK);
+	flushmo();
+	purgeline(0); /* Do read next time ... */
+	while ((c = wcgetsec(&Blklen, rpn, 100)) != 0) {
+		if (c == WCEOT) {
+			xil_printf("%s(): L%d debug\n\r", __func__, __LINE__);
+			zperr( _("Pathname fetch returned EOT"));
+			sendline(ACK);
+			flushmo();
+			purgeline(0);	/* Do read next time ... */
+			READLINE_PF(1);
+			goto et_tu;
+		}
+		return ERROR;
+	}
+	sendline(ACK);
+	flushmo();
+	return OK;
+}
+
+/*
+ * Adapted from CMODEM13.C, written by
+ * Jack M. Wierda and Roderick W. Hart
+ */
+static int 
+wcrx(struct zm_fileinfo *zi)
+{
+	register int sectnum, sectcurr;
+	register char sendchar;
+	size_t Blklen;
+
+	Firstsec=TRUE;sectnum=0; 
+	zi->eof_seen=FALSE;
+	sendchar=Crcflg?WANTCRC:NAK;
+
+	for (;;) {
+		sendline(sendchar);	/* send it now, we're ready! */
+		flushmo();
+		purgeline(0);	/* Do read next time ... */
+		sectcurr=wcgetsec(&Blklen, secbuf, 
+			(unsigned int) ((sectnum&0177) ? 50 : 130));
+		report(sectcurr);
+		if (sectcurr==((sectnum+1) &0377)) {
+			sectnum++;
+			/* if using xmodem we don't know how long a file is */
+			if (zi->bytes_total && R_BYTESLEFT(zi) < Blklen)
+				Blklen=R_BYTESLEFT(zi);
+			zi->bytes_received+=Blklen;
+			if (putsec(zi, secbuf, Blklen)==ERROR) {
+				return ERROR;
+			}
+			sendchar=ACK;
+		}
+		else if (sectcurr==(sectnum&0377)) {
+			zperr( _("Received dup Sector"));
+			sendchar=ACK;
+		}
+		else if (sectcurr==WCEOT) {
+			if (closeit(zi)) {
+				return ERROR;
+			}
+			sendline(ACK);
+			flushmo();
+			purgeline(0);	/* Do read next time ... */
+			return OK;
+		}
+		else if (sectcurr==ERROR) {
+			return ERROR;
+		}
+		else {
+			zperr( _("Sync Error"));
+			return ERROR;
+		}
+	}
+}
+
+/*
+ * Wcgetsec fetches a Ward Christensen type sector.
+ * Returns sector number encountered or ERROR if valid sector not received,
+ * or CAN CAN received
+ * or WCEOT if eot sector
+ * time is timeout for first char, set to 4 seconds thereafter
+ ***************** NO ACK IS SENT IF SECTOR IS RECEIVED OK **************
+ *    (Caller must do that when he is good and ready to get next sector)
+ */
+static int
+wcgetsec(size_t *Blklen, char *rxbuf, unsigned int maxtime)
+{
+	register int checksum, wcj, firstch;
+	register unsigned short oldcrc;
+	register char *p;
+	int sectcurr;
+
+	for (Lastrx=errors=0; errors<RETRYMAX; errors++) {
+
+		if ((firstch=READLINE_PF(maxtime))==STX) {
+			*Blklen=1024; goto get2;
+		}
+		if (firstch==SOH) {
+			*Blklen=128;
+get2:
+			sectcurr=READLINE_PF(1);
+			if ((sectcurr+(oldcrc=READLINE_PF(1)))==0377) {
+				oldcrc=checksum=0;
+				for (p=rxbuf,wcj=*Blklen; --wcj>=0; ) {
+					if ((firstch=READLINE_PF(1)) < 0)
+						goto bilge;
+					oldcrc=updcrc(firstch, oldcrc);
+					checksum += (*p++ = firstch);
+				}
+				if ((firstch=READLINE_PF(1)) < 0)
+					goto bilge;
+				if (Crcflg) {
+					oldcrc=updcrc(firstch, oldcrc);
+					if ((firstch=READLINE_PF(1)) < 0)
+						goto bilge;
+					oldcrc=updcrc(firstch, oldcrc);
+					if (oldcrc & 0xFFFF)
+						zperr( _("CRC"));
+					else {
+						Firstsec=FALSE;
+						return sectcurr;
+					}
+				}
+				else if (((checksum-firstch)&0377)==0) {
+					Firstsec=FALSE;
+					return sectcurr;
+				}
+				else
+					zperr( _("Checksum"));
+			}
+			else
+				zperr(_("Sector number garbled"));
+		}
+		/* make sure eot really is eot and not just mixmash */
+#if 1
+		else if (firstch==EOT && READLINE_PF(1)==TIMEOUT)
+			return WCEOT;
+#else
+		else if (firstch==EOT && READLINE_PF>0)
+			return WCEOT;
+#endif
+		else if (firstch==CAN) {
+			if (Lastrx==CAN) {
+				zperr( _("Sender Cancelled"));
+				return ERROR;
+			} else {
+				Lastrx=CAN;
+				continue;
+			}
+		}
+		else if (firstch==TIMEOUT) {
+			if (Firstsec)
+				goto humbug;
+bilge:
+			zperr( _("TIMEOUT"));
+		}
+		else
+			zperr( _("Got 0%o sector header"), firstch);
+
+humbug:
+		Lastrx=0;
+		{
+			int cnt=1000;
+			while(cnt-- && READLINE_PF(1)!=TIMEOUT)
+				;
+		}
+		if (Firstsec) {
+			sendline(Crcflg?WANTCRC:NAK);
+			flushmo();
+			purgeline(0);	/* Do read next time ... */
+		} else {
+			maxtime=40;
+			sendline(NAK);
+			flushmo();
+			purgeline(0);	/* Do read next time ... */
+		}
+	}
+	/* try to stop the bubble machine. */
+	canit(0);
+	return ERROR;
+}
+
+#define ZCRC_DIFFERS (ERROR+1)
+#define ZCRC_EQUAL (ERROR+2)
+/*
+ * do ZCRC-Check for open file f.
+ * check at most check_bytes bytes (crash recovery). if 0 -> whole file.
+ * remote file size is remote_bytes.
+ */
+int zmodem_buf_getc(int c)
+{
+	return *(unsigned char *)(zmodem_addr+c);
+}
+static int 
+do_crc_check(void *f, size_t remote_bytes, size_t check_bytes) 
+{
+	//struct stat st;
+	unsigned long crc;
+	unsigned long rcrc;
+	size_t n;
+	int c;
+	int t1=0,t2=0;
+	int i;
+#if 0
+	if (-1==fstat(fileno(f),&st)) {
+		DO_SYSLOG((LOG_ERR,"cannot fstat open file: %s",strerror(errno)));
+		return ERROR;
+	}
+#endif
+	//if (check_bytes==0 && ((size_t) st.st_size)!=remote_bytes)
+	//	return ZCRC_DIFFERS; /* shortcut */
+
+	crc=0xFFFFFFFFL;
+	n=check_bytes;
+	if (n==0)
+		n=zmodem_offset;
+	//while (n-- && ((c = getc(f)) != EOF))
+	for(i=0;i<zmodem_offset;i++) {
+		c = zmodem_buf_getc(i);
+		crc = UPDC32(c, crc);
+	}
+	crc = ~crc;
+	//clearerr(f);  /* Clear EOF */
+	//fseek(f, 0L, 0);
+
+	while (t1<3) {
+		stohdr(check_bytes);
+		zshhdr(ZCRC, Txhdr);
+		while(t2<3) {
+			size_t tmp;
+			c = zgethdr(Rxhdr, 0, &tmp);
+			rcrc=(unsigned long) tmp;
+			switch (c) {
+			default: /* ignore */
+				break;
+			case ZFIN:
+				return ERROR;
+			case ZRINIT:
+				return ERROR;
+			case ZCAN:
+				if (Verbose)
+					vstringf(_("got ZCAN"));
+				return ERROR;
+				break;
+			case ZCRC:
+				if (crc!=rcrc)
+					return ZCRC_DIFFERS;
+				return ZCRC_EQUAL;
+				break;
+			}
+		}
+	}
+	return ERROR;
+}
+
+/*
+ * Process incoming file information header
+ */
+static int
+procheader(char *name, struct zm_fileinfo *zi)
+{
+	const char *openmode;
+	char *p;
+	static char *name_static=NULL;
+	char *nameend;
+
+	if (name_static)
+		free(name_static);
+	if (junk_path) {
+		p=strrchr(name,'/');
+		if (p) {
+			p++;
+			if (!*p) {
+				/* alert - file name ended in with a / */
+				if (Verbose)
+					vstringf(_("file name ends with a /, skipped: %s\n"),name);
+				DO_SYSLOG((LOG_ERR,"file name ends with a /, skipped: %s", name));
+				return ERROR;
+			}
+			name=p;
+		}
+	}
+	name_static=malloc(strlen(name)+1);
+	//if (!name_static)
+	//	error(1,0,_("out of memory"));
+	strcpy(name_static,name);
+	zi->fname=name_static;
+
+	if (Verbose>2) {
+		vstringf(_("zmanag=%d, Lzmanag=%d\n"),zmanag,Lzmanag);
+		vstringf(_("zconv=%d\n"),zconv);
+	}
+
+	/* set default parameters and overrides */
+	openmode = "w";
+	Thisbinary = (!Rxascii) || Rxbinary;
+	if (Lzmanag)
+		zmanag = Lzmanag;
+
+	/*
+	 *  Process ZMODEM remote file management requests
+	 */
+	if (!Rxbinary && zconv == ZCNL)	/* Remote ASCII override */
+		Thisbinary = 0;
+	if (zconv == ZCBIN)	/* Remote Binary override */
+		Thisbinary = TRUE;
+	if (Thisbinary && zconv == ZCBIN && try_resume)
+		zconv=ZCRESUM;
+	if (zmanag == ZF1_ZMAPND && zconv!=ZCRESUM)
+		openmode = "a";
+	if (skip_if_not_found)
+		openmode="r+";
+
+#ifdef ENABLE_TIMESYNC
+	in_timesync=0;
+	if (timesync_flag && 0==strcmp(name,"$time$.t"))
+		in_timesync=1;
+#endif
+	in_tcpsync=0;
+	if (tcpsync_flag && 0==strcmp(name,"$tcp$.t"))
+		in_tcpsync=1;
+
+	zi->bytes_total = DEFBYTL;
+	zi->mode = 0; 
+	zi->eof_seen = 0; 
+	zi->modtime = 0;
+
+	nameend = name + 1 + strlen(name);
+#if 0
+	if (*nameend) {	/* file coming from Unix or DOS system */
+		long modtime;
+		long bytes_total;
+		int mode;
+		sscanf(nameend, "%ld%lo%o", &bytes_total, &modtime, &mode);
+		zi->modtime=modtime;
+		zi->bytes_total=bytes_total;
+		zi->mode=mode;
+		if (zi->mode & UNIXFILE)
+			++Thisbinary;
+	}
+#endif
+
+	/* Check for existing file */
+	if (zconv != ZCRESUM && !Rxclob && (zmanag&ZF1_ZMMASK) != ZF1_ZMCLOB 
+		&& (zmanag&ZF1_ZMMASK) != ZF1_ZMAPND
+#ifdef ENABLE_TIMESYNC
+	    && !in_timesync
+	    && !in_tcpsync
+#endif
+		//&& (fout=fopen(name, "r"))) {
+		){
+		//struct stat sta;
+		char *tmpname;
+		char *ptr;
+		int i;
+		if (zmanag == ZF1_ZMNEW || zmanag==ZF1_ZMNEWL) {
+#if 0
+			if (-1==fstat(fileno(fout),&sta)) {
+#ifdef ENABLE_SYSLOG
+				int e=errno;
+#endif
+				if (Verbose)
+					vstringf(_("file exists, skipped: %s\n"),name);
+				DO_SYSLOG((LOG_ERR,"cannot fstat open file %s: %s",
+					name,strerror(e)));
+				return ERROR;
+			}
+#endif
+			if (zmanag == ZF1_ZMNEW) {
+#if 0
+				if (sta.st_mtime > zi->modtime) {
+					DO_SYSLOG((LOG_INFO,"skipping %s: newer file exists", name));
+					return ERROR; /* skips file */
+				}
+#endif
+			} else {
+				/* newer-or-longer */
+#if 0
+				if (((size_t) sta.st_size) >= zi->bytes_total 
+					&& sta.st_mtime > zi->modtime) {
+					DO_SYSLOG((LOG_INFO,"skipping %s: longer+newer file exists", name));
+					return ERROR; /* skips file */
+				}
+#endif
+			}
+			//fclose(fout);
+		} else if (zmanag==ZF1_ZMCRC) {
+			int r=do_crc_check(NULL,zi->bytes_total,0);
+			if (r==ERROR) {
+				//fclose(fout);
+				return ERROR;
+			}
+			if (r!=ZCRC_DIFFERS) {
+				return ERROR; /* skips */
+			}
+			//fclose(fout);
+		} else {
+			size_t namelen;
+			//fclose(fout);
+			if ((zmanag & ZF1_ZMMASK)!=ZF1_ZMCHNG) {
+				if (Verbose)
+					vstringf(_("file exists, skipped: %s\n"),name);
+				return ERROR;
+			}
+			/* try to rename */
+			namelen=strlen(name);
+			tmpname=alloca(namelen+5);
+			memcpy(tmpname,name,namelen);
+			ptr=tmpname+namelen;
+			*ptr++='.';
+			i=0;
+			printf("Not going to happend\n");
+#if 0
+			do {
+				sprintf(ptr,"%d",i++);
+			} while (i<1000 && stat(tmpname,&sta)==0);
+			if (i==1000)
+				return ERROR;
+			free(name_static);
+			name_static=malloc(strlen(tmpname)+1);
+			//if (!name_static)
+			//	error(1,0,_("out of memory"));
+			strcpy(name_static,tmpname);
+			zi->fname=name_static;
+#endif
+		}
+	}
+
+	if (!*nameend) {		/* File coming from CP/M system */
+		for (p=name_static; *p; ++p)		/* change / to _ */
+			if ( *p == '/')
+				*p = '_';
+
+		if ( *--p == '.')		/* zap trailing period */
+			*p = 0;
+	}
+
+#ifdef ENABLE_TIMESYNC
+	if (in_timesync)
+	{
+		long t=time(0);
+		long d=t-zi->modtime;
+		if (d<0)
+			d=0;
+		if ((Verbose && d>60) || Verbose > 1)
+			vstringf(_("TIMESYNC: here %ld, remote %ld, diff %ld seconds\n"),
+			(long) t, (long) zi->modtime, d);
+#ifdef HAVE_SETTIMEOFDAY
+		if (timesync_flag > 1 && d > 10)
+		{
+			struct timeval tv;
+			tv.tv_sec=zi->modtime;
+			tv.tv_usec=0;
+			//if (settimeofday(&tv,NULL))
+			//	vstringf(_("TIMESYNC: cannot set time: %s\n"),
+			//		strerror(errno));
+		}
+#endif
+		return ERROR; /* skips file */
+	}
+#endif /* ENABLE_TIMESYNC */
+#if 0
+	if (in_tcpsync) {
+		fout=tmpfile();
+		if (!fout) {
+			error(1,errno,_("cannot tmpfile() for tcp protocol synchronization"));
+		}
+		zi->bytes_received=0;
+		return OK;
+	}
+#endif
+
+
+	if (!zmodem_requested && MakeLCPathname && !IsAnyLower(name_static)
+	  && !(zi->mode&UNIXFILE))
+		uncaps(name_static);
+	if (Topipe > 0) {
+#if 0
+		if (Pathname)
+			free(Pathname);
+		Pathname=malloc((PATH_MAX)*2);
+		if (!Pathname)
+			error(1,0,_("out of memory"));
+		sprintf(Pathname, "%s %s", program_name+2, name_static);
+		if (Verbose) {
+			vstringf("%s: %s %s\n",
+				_("Topipe"),
+				Pathname, Thisbinary?"BIN":"ASCII");
+		}
+		
+		if ((fout=popen(Pathname, "w")) == NULL)
+			return ERROR;
+#endif
+	} else {
+		if (protocol==ZM_XMODEM)
+			/* we don't have the filename yet */
+			return OK; /* dummy */
+		if (Pathname)
+			free(Pathname);
+		Pathname=malloc((PATH_MAX)*2);
+		//if (!Pathname)
+		//	error(1,0,_("out of memory"));
+		strcpy(Pathname, name_static);
+		if (Verbose) {
+			/* overwrite the "waiting to receive" line */
+			vstring("\r                                                                     \r");
+			vstringf(_("Receiving: %s\n"), name_static);
+		}
+		checkpath(name_static);
+		if (Nflag)
+		{
+			/* cast because we might not have a prototyp for strdup :-/ */
+			free(name_static);
+			name_static=(char *) strdup("/dev/null");
+			if (!name_static)
+			{
+				fprintf(stderr,"%s: %s\n", program_name, _("out of memory"));
+				return -1;
+			}
+		}
+#ifdef OMEN
+#if 0
+asdfadsf
+		/* looks like a security hole -- uwe */
+		if (name_static[0] == '!' || name_static[0] == '|') {
+			if ( !(fout = popen(name_static+1, "w"))) {
+				return ERROR;
+			}
+			Topipe = -1;  return(OK);
+		}
+#endif
+#endif
+		if (Thisbinary && zconv==ZCRESUM) {
+			//struct stat st;
+			//fout = fopen(name_static, "r+");
+			//if (fout && 0==fstat(fileno(fout),&st))
+			if(1)
+			{
+				printf("This should not happened\n");
+				int can_resume=FALSE;
+				if (zmanag==ZF1_ZMCRC) {
+					int r=do_crc_check(NULL,zi->bytes_total,0);
+					if (r==ERROR) {
+						//fclose(fout);
+						return ZFERR;
+					}
+					if (r==ZCRC_DIFFERS) {
+						can_resume=FALSE;
+					}
+				}
+				//if ((unsigned long)st.st_size > zi->bytes_total) {
+				{
+					can_resume=FALSE;
+				}
+				/* retransfer whole blocks */
+				zi->bytes_skipped = 0 & ~(1023);
+				if (can_resume) {
+#if 0
+					if (fseek(fout, (long) zi->bytes_skipped, SEEK_SET)) {
+						fclose(fout);
+						return ZFERR;
+					}
+#endif
+				}
+				else
+					zi->bytes_skipped=0; /* resume impossible, file has changed */
+				goto buffer_it;
+			}
+			zi->bytes_skipped=0;
+#if  0
+			if (fout)
+				fclose(fout);
+#endif
+		}
+#if 0
+		fout = fopen(name_static, openmode);
+#ifdef ENABLE_MKDIR
+		if ( !fout && Restricted < 2) {
+			if (make_dirs(name_static))
+				fout = fopen(name_static, openmode);
+		}
+#endif
+		if ( !fout)
+		{
+#ifdef ENABLE_SYSLOG
+			int e=errno;
+#endif
+			zpfatal(_("cannot open %s"), name_static);
+			DO_SYSLOG((LOG_ERR,"%s: cannot open: %s",
+				protname(),strerror(e)));
+			return ERROR;
+		}
+#endif
+	}
+buffer_it:
+	if (Topipe == 0) {
+		static char *s=NULL;
+		static size_t last_length=0;
+#if defined(F_GETFD) && defined(F_SETFD) && defined(O_SYNC)
+#if 0
+		if (o_sync) {
+			int oldflags;
+			oldflags = fcntl (fileno(fout), F_GETFD, 0);
+			if (oldflags>=0 && !(oldflags & O_SYNC)) {
+				oldflags|=O_SYNC;
+				fcntl (fileno(fout), F_SETFD, oldflags); /* errors don't matter */
+			}
+		}
+#endif
+#endif
+
+		if (buffersize==-1 && s) {
+			if (zi->bytes_total>last_length) {
+				free(s);
+				s=NULL;
+				last_length=0;
+			}
+		}
+		if (!s && buffersize) {
+			last_length=32768;
+			if (buffersize==-1) {
+				if (zi->bytes_total>0)
+					last_length=zi->bytes_total;
+			} else 
+				last_length=buffersize;
+			/* buffer `4096' bytes pages */
+			last_length=(last_length+4095)&0xfffff000;
+			s=malloc(last_length);
+			if (!s) {
+				zpfatal(_("out of memory"));
+				return 1;
+			}
+		}
+		if (s) {
+#if 0
+#ifdef SETVBUF_REVERSED
+			setvbuf(fout,_IOFBF,s,last_length);
+#else
+			setvbuf(fout,s,_IOFBF,last_length);
+#endif
+#endif
+		}
+	}
+	zi->bytes_received=zi->bytes_skipped;
+
+	return OK;
+}
+
+#ifdef ENABLE_MKDIR
+/*
+ *  Directory-creating routines from Public Domain TAR by John Gilmore
+ */
+
+/*
+ * After a file/link/symlink/dir creation has failed, see if
+ * it's because some required directory was not present, and if
+ * so, create all required dirs.
+ */
+static int
+make_dirs(char *pathname)
+{
+	register char *p;		/* Points into path */
+	int madeone = 0;		/* Did we do anything yet? */
+	int save_errno = errno;		/* Remember caller's errno */
+
+	if (errno != ENOENT)
+		return 0;		/* Not our problem */
+
+	for (p = strchr(pathname, '/'); p != NULL; p = strchr(p+1, '/')) {
+		/* Avoid mkdir of empty string, if leading or double '/' */
+		if (p == pathname || p[-1] == '/')
+			continue;
+		/* Avoid mkdir where last part of path is '.' */
+		if (p[-1] == '.' && (p == pathname+1 || p[-2] == '/'))
+			continue;
+		*p = 0;				/* Truncate the path there */
+		if ( !mkdir(pathname, 0777)) {	/* Try to create it as a dir */
+			vfile("Made directory %s\n", pathname);
+			madeone++;		/* Remember if we made one */
+			*p = '/';
+			continue;
+		}
+		*p = '/';
+		if (errno == EEXIST)		/* Directory already exists */
+			continue;
+		/*
+		 * Some other error in the mkdir.  We return to the caller.
+		 */
+		break;
+	}
+	errno = save_errno;		/* Restore caller's errno */
+	return madeone;			/* Tell them to retry if we made one */
+}
+
+#endif /* ENABLE_MKDIR */
+
+/*
+ * Putsec writes the n characters of buf to receive file fout.
+ *  If not in binary mode, carriage returns, and all characters
+ *  starting with CPMEOF are discarded.
+ */
+static int putsec(struct zm_fileinfo *zi, char *buf, size_t n)
+{
+	memcpy(zmodem_addr + zmodem_offset, buf, n);
+	zmodem_offset += n;
+}
+#if 0
+static int 
+putsec(struct zm_fileinfo *zi, char *buf, size_t n)
+{
+	register char *p;
+
+	if (n == 0)
+		return OK;
+	if (Thisbinary) {
+		if (fwrite(buf,n,1,fout)!=1)
+			return ERROR;
+	}
+	else {
+		if (zi->eof_seen)
+			return OK;
+		for (p=buf; n>0; ++p,n-- ) {
+			if ( *p == '\r')
+				continue;
+			if (*p == CPMEOF) {
+				zi->eof_seen=TRUE;
+				return OK;
+			}
+			putc(*p ,fout);
+		}
+	}
+	return OK;
+}
+#endif
+
+int islower(int c)
+{
+	if((c >='a') && (c<='z'))
+		return 1;
+	return 0;
+}
+int isupper(int c)
+{
+	if((c >='A') && (c<='Z'))
+		return 1;
+	return 0;
+}
+int tolower(int c)
+{
+	if((c >='A') && (c<='Z'))
+		return c+32;
+	return c;
+}
+/* make string s lower case */
+static void
+uncaps(char *s)
+{
+	for ( ; *s; ++s)
+		if (isupper((unsigned char)(*s)))
+			*s = tolower(*s);
+}
+/*
+ * IsAnyLower returns TRUE if string s has lower case letters.
+ */
+static int 
+IsAnyLower(const char *s)
+{
+	for ( ; *s; ++s)
+		if (islower((unsigned char)(*s)))
+			return TRUE;
+	return FALSE;
+}
+
+static void
+report(int sct)
+{
+	if (Verbose>1)
+	{
+		vstringf(_("Blocks received: %d"),sct);
+		//vchar('\r');
+	}
+}
+
+/*
+ * If called as [-][dir/../]vrzCOMMAND set Verbose to 1
+ * If called as [-][dir/../]rzCOMMAND set the pipe flag
+ * If called as rb use YMODEM protocol
+ */
+static void
+chkinvok(const char *s)
+{
+	const char *p;
+
+	p = s;
+	while (*p == '-')
+		s = ++p;
+	while (*p)
+		if (*p++ == '/')
+			s = p;
+	if (*s == 'v') {
+		Verbose=1; ++s;
+	}
+	program_name = s;
+	if (*s == 'l') 
+		s++; /* lrz -> rz */
+	protocol=ZM_ZMODEM;
+	if (s[0]=='r' && s[1]=='x')
+		protocol=ZM_XMODEM;
+	if (s[0]=='r' && (s[1]=='b' || s[1]=='y'))
+		protocol=ZM_YMODEM;
+	//if (s[2] && protocol!=ZM_XMODEM)
+	//	Topipe = 1;
+}
+
+/*
+ * Totalitarian Communist pathname processing
+ */
+static void 
+checkpath(const char *name)
+{
+	if (Restricted) {
+		const char *p;
+		p=strrchr(name,'/');
+		if (p)
+			p++;
+		else
+			p=name;
+		/* don't overwrite any file in very restricted mode.
+		 * don't overwrite hidden files in restricted mode */
+#if 0
+		if ((Restricted==2 || *name=='.') && fopen(name, "r") != NULL) {
+			canit(0);
+			vstring("\r\n");
+			vstringf(_("%s: %s exists\n"), 
+				program_name, name);
+			bibi(-1);
+		}
+#endif
+		/* restrict pathnames to current tree or uucppublic */
+		if ( strstr(name, "../")
+#ifdef PUBDIR
+		 || (name[0]== '/' && strncmp(name, PUBDIR, 
+		 	strlen(PUBDIR)))
+#endif
+		) {
+			canit(0);
+			vstring("\r\n");
+			vstringf(_("%s:\tSecurity Violation"),program_name);
+			vstring("\r\n");
+			bibi(-1);
+		}
+		if (Restricted > 1) {
+			if (name[0]=='.' || strstr(name,"/.")) {
+				canit(0);
+				vstring("\r\n");
+				vstringf(_("%s:\tSecurity Violation"),program_name);
+				vstring("\r\n");
+				bibi(-1);
+			}
+		}
+	}
+}
+
+/*
+ * Initialize for Zmodem receive attempt, try to activate Zmodem sender
+ *  Handles ZSINIT frame
+ *  Return ZFILE if Zmodem filename received, -1 on error,
+ *   ZCOMPL if transaction finished,  else 0
+ */
+static int
+tryz(void)
+{
+	register int c, n;
+	register int cmdzack1flg;
+	int zrqinits_received=0;
+	size_t bytes_in_block=0;
+
+	if (protocol!=ZM_ZMODEM)		/* Check for "rb" program name */
+		return 0;
+
+	for (n=zmodem_requested?15:5; 
+		 (--n + zrqinits_received) >=0 && zrqinits_received<10; ) {
+		/* Set buffer length (0) and capability flags */
+#ifdef SEGMENTS
+		stohdr(SEGMENTS*MAX_BLOCK);
+#else
+		stohdr(0L);
+#endif
+#ifdef CANBREAK
+		Txhdr[ZF0] = CANFC32|CANFDX|CANOVIO|CANBRK;
+#else
+		Txhdr[ZF0] = CANFC32|CANFDX|CANOVIO;
+#endif
+#ifdef ENABLE_TIMESYNC
+		if (timesync_flag)
+			Txhdr[ZF1] |= ZF1_TIMESYNC;
+#endif
+		if (Zctlesc)
+			Txhdr[ZF0] |= TESCCTL; /* TESCCTL == ESCCTL */
+		zshhdr(tryzhdrtype, Txhdr);
+
+#if 0
+		if (tcp_socket==-1 && *tcp_buf) {
+			/* we need to switch to tcp mode */
+			tcp_socket=tcp_connect(tcp_buf);
+			tcp_buf[0]=0;
+			dup2(tcp_socket,0);
+			dup2(tcp_socket,1);
+		}
+#endif
+		if (tryzhdrtype == ZSKIP)	/* Don't skip too far */
+			tryzhdrtype = ZRINIT;	/* CAF 8-21-87 */
+again:
+		switch (zgethdr(Rxhdr, 0, NULL)) {
+		case ZRQINIT:
+			/* getting one ZRQINIT is totally ok. Normally a ZFILE follows 
+			 * (and might be in our buffer, so don't purge it). But if we
+			 * get more ZRQINITs than the sender has started up before us
+			 * and sent ZRQINITs while waiting. 
+			 */
+			zrqinits_received++;
+			continue;
+		
+		case ZEOF:
+			continue;
+		case TIMEOUT:
+			continue;
+		case ZFILE:
+			zconv = Rxhdr[ZF0];
+			if (!zconv)
+				/* resume with sz -r is impossible (at least with unix sz)
+				 * if this is not set */
+				zconv=ZCBIN;
+			if (Rxhdr[ZF1] & ZF1_ZMSKNOLOC) {
+				Rxhdr[ZF1] &= ~(ZF1_ZMSKNOLOC);
+				skip_if_not_found=TRUE;
+			}
+			zmanag = Rxhdr[ZF1];
+			ztrans = Rxhdr[ZF2];
+			tryzhdrtype = ZRINIT;
+			c = zrdata(secbuf, MAX_BLOCK,&bytes_in_block);
+			io_mode(0,3);
+			if (c == GOTCRCW)
+				return ZFILE;
+			zshhdr(ZNAK, Txhdr);
+			goto again;
+		case ZSINIT:
+			/* this once was:
+			 * Zctlesc = TESCCTL & Rxhdr[ZF0];
+			 * trouble: if rz get --escape flag:
+			 * - it sends TESCCTL to sz, 
+			 *   get a ZSINIT _without_ TESCCTL (yeah - sender didn't know), 
+			 *   overwrites Zctlesc flag ...
+			 * - sender receives TESCCTL and uses "|=..."
+			 * so: sz escapes, but rz doesn't unescape ... not good.
+			 */
+			Zctlesc |= TESCCTL & Rxhdr[ZF0];
+			if (zrdata(Attn, ZATTNLEN,&bytes_in_block) == GOTCRCW) {
+				stohdr(1L);
+				zshhdr(ZACK, Txhdr);
+				goto again;
+			}
+			zshhdr(ZNAK, Txhdr);
+			goto again;
+		case ZFREECNT:
+			stohdr(getfree());
+			zshhdr(ZACK, Txhdr);
+			goto again;
+		case ZCOMMAND:
+			cmdzack1flg = Rxhdr[ZF0];
+			if (zrdata(secbuf, MAX_BLOCK,&bytes_in_block) == GOTCRCW) {
+				if (Verbose)
+				{
+					vstringf("%s: %s\n", program_name,
+						_("remote command execution requested"));
+					vstringf("%s: %s\n", program_name, secbuf);
+				}
+				if (!allow_remote_commands) 
+				{
+					if (Verbose)
+						vstringf("%s: %s\n", program_name, 
+							_("not executed"));
+					zshhdr(ZCOMPL, Txhdr);
+					DO_SYSLOG((LOG_INFO,"rexec denied: %s",secbuf));
+					return ZCOMPL;
+				}
+				DO_SYSLOG((LOG_INFO,"rexec allowed: %s",secbuf));
+				if (cmdzack1flg & ZCACK1)
+					stohdr(0L);
+				else
+					stohdr((size_t)sys2(secbuf));
+				purgeline(0);	/* dump impatient questions */
+				do {
+					zshhdr(ZCOMPL, Txhdr);
+				}
+				while (++errors<20 && zgethdr(Rxhdr,1, NULL) != ZFIN);
+				ackbibi();
+				if (cmdzack1flg & ZCACK1)
+					exec2(secbuf);
+				return ZCOMPL;
+			}
+			zshhdr(ZNAK, Txhdr);
+			goto again;
+		case ZCOMPL:
+			goto again;
+		default:
+			continue;
+		case ZFIN:
+			ackbibi();
+			return ZCOMPL;
+		case ZRINIT:
+			if (Verbose)
+				vstringf(_("got ZRINIT"));
+			return ERROR;
+		case ZCAN:
+			if (Verbose)
+				vstringf(_("got ZCAN"));
+			return ERROR;
+		}
+	}
+	return 0;
+}
+
+
+/*
+ * Receive 1 or more files with ZMODEM protocol
+ */
+static int
+rzfiles(struct zm_fileinfo *zi)
+{
+	register int c;
+
+	//xil_printf("%s(): L%d debug\n\r", __func__, __LINE__);
+	for (;;) {
+		timing(1,NULL);
+		c = rzfile(zi);
+		//xil_printf("%s(): L%d debug, c=%d\n\r", __func__, __LINE__, c);
+		switch (c) {
+		case ZEOF:
+			xil_printf("%s(): receive %s (%d bytes)complete\n\r", __func__, zi->fname, zi->bytes_total);
+			if (Verbose > 1
+#ifdef ENABLE_SYSLOG
+				|| enable_syslog
+#endif
+	 		) {
+				double d;
+				long bps;
+				d=timing(0,NULL);
+				if (d==0)
+					d=0.5; /* can happen if timing uses time() */
+				bps=(zi->bytes_received-zi->bytes_skipped)/d;
+				if (Verbose > 1) {
+					vstringf(
+						_("\rBytes received: %7ld/%7ld   BPS:%-6ld                \r\n"),
+						(long) zi->bytes_received, (long) zi->bytes_total, bps);
+				}
+				DO_SYSLOG_FNAME((LOG_INFO, "%s/%s: %ld Bytes, %ld BPS",shortname,
+						   protname(), (long) zi->bytes_total,bps));
+			}
+			/* FALL THROUGH */
+		case ZSKIP:
+			if (c==ZSKIP)
+			{
+				if (Verbose) 
+					vstringf(_("Skipped"));
+				DO_SYSLOG_FNAME((LOG_INFO, "%s/%s: skipped",shortname,protname()));
+			}
+			switch (tryz()) {
+			case ZCOMPL:
+				return OK;
+			default:
+				return ERROR;
+			case ZFILE:
+				break;
+			}
+			continue;
+		default:
+			return c;
+		case ERROR:
+			DO_SYSLOG_FNAME((LOG_INFO, "%s/%s: error",shortname,protname()));
+			return ERROR;
+		}
+	}
+}
+
+/* "OOSB" means Out Of Sync Block. I once thought that if sz sents
+ * blocks a,b,c,d, of which a is ok, b fails, we might want to save 
+ * c and d. But, alas, i never saw c and d.
+ */
+#define SAVE_OOSB
+#ifdef SAVE_OOSB
+typedef struct oosb_t {
+	size_t pos;
+	size_t len;
+	char *data;
+	struct oosb_t *next;
+} oosb_t;
+struct oosb_t *anker=NULL;
+#endif
+
+/*
+ * Receive a file with ZMODEM protocol
+ *  Assumes file name frame is in secbuf
+ */
+static int
+rzfile(struct zm_fileinfo *zi)
+{
+	register int c, n;
+	long last_rxbytes=0;
+	unsigned long last_bps=0;
+	long not_printed=0;
+	time_t low_bps=0;
+	size_t bytes_in_block=0;
+
+	zi->eof_seen=FALSE;
+
+	n = 20;
+
+	if (procheader(secbuf,zi) == ERROR) {
+		xil_printf("%s(): L%d debug\n\r", __func__, __LINE__);
+		DO_SYSLOG_FNAME((LOG_INFO, "%s/%s: procheader error",
+				   shortname,protname()));
+		return (tryzhdrtype = ZSKIP);
+	}
+
+	for (;;) {
+#ifdef SEGMENTS
+		chinseg = 0;
+#endif
+		stohdr(zi->bytes_received);
+		zshhdr(ZRPOS, Txhdr);
+		goto skip_oosb;
+nxthdr:
+#ifdef SAVE_OOSB
+		if (anker) {
+			oosb_t *akt,*last,*next;
+			for (akt=anker,last=NULL;akt;last= akt ? akt : last ,akt=next) {
+				if (akt->pos==zi->bytes_received) {
+					putsec(zi, akt->data, akt->len);
+					zi->bytes_received += akt->len;
+					vfile("using saved out-of-sync-paket %lx, len %ld",
+						  akt->pos,akt->len);
+					//xil_printf("%s(): L%d debug\n\r", __func__, __LINE__);
+					goto nxthdr;
+				}
+				next=akt->next;
+				if (akt->pos<zi->bytes_received) {
+					vfile("removing unneeded saved out-of-sync-paket %lx, len %ld",
+						  akt->pos,akt->len);
+					if (last)
+						last->next=akt->next;
+					else
+						anker=akt->next;
+					free(akt->data);
+					free(akt);
+					akt=NULL;
+				}
+			}
+		}
+#endif
+	skip_oosb:
+		c = zgethdr(Rxhdr, 0, NULL);
+		switch (c) {
+		default:
+			xil_printf("%s(): L%d debug\n\r", __func__, __LINE__);
+			DO_SYSLOG_FNAME((LOG_INFO, "%s/%s: error: zgethdr returned %d",shortname,
+					   protname(),c));
+			vfile("rzfile: zgethdr returned %d", c);
+			return ERROR;
+		case ZNAK:
+		case TIMEOUT:
+			xil_printf("%s(): L%d debug\n\r", __func__, __LINE__);
+#ifdef SEGMENTS
+			putsec(secbuf, chinseg);
+			chinseg = 0;
+#endif
+			if ( --n < 0) {
+				DO_SYSLOG_FNAME((LOG_INFO, "%s/%s: error: zgethdr returned %s",shortname,
+					   protname(),c == ZNAK ? "ZNAK" : "TIMEOUT"));
+				vfile("rzfile: zgethdr returned %d", c);
+				return ERROR;
+			}
+		case ZFILE:
+			//xil_printf("%s(): L%d debug\n\r", __func__, __LINE__);
+			zrdata(secbuf, MAX_BLOCK,&bytes_in_block);
+			continue;
+		case ZEOF:
+			//xil_printf("%s(): L%d debug\n\r", __func__, __LINE__);
+#ifdef SEGMENTS
+			putsec(secbuf, chinseg);
+			chinseg = 0;
+#endif
+			if (rclhdr(Rxhdr) != (long) zi->bytes_received) {
+				/*
+				 * Ignore eof if it's at wrong place - force
+				 *  a timeout because the eof might have gone
+				 *  out before we sent our zrpos.
+				 */
+				errors = 0;  goto nxthdr;
+			}
+			if (closeit(zi)) {
+				tryzhdrtype = ZFERR;
+				DO_SYSLOG_FNAME((LOG_INFO, "%s/%s: error: closeit return <>0",
+						   shortname, protname()));
+				vfile("rzfile: closeit returned <> 0");
+				return ERROR;
+			}
+			vfile("rzfile: normal EOF");
+			return c;
+		case ERROR:	/* Too much garbage in header search error */
+			xil_printf("%s(): L%d debug\n\r", __func__, __LINE__);
+#ifdef SEGMENTS
+			putsec(secbuf, chinseg);
+			chinseg = 0;
+#endif
+			if ( --n < 0) {
+				DO_SYSLOG_FNAME((LOG_INFO, "%s/%s: error: zgethdr returned %d",
+						   shortname, protname(),c));
+				vfile("rzfile: zgethdr returned %d", c);
+				return ERROR;
+			}
+			zmputs(Attn);
+			continue;
+		case ZSKIP:
+			//xil_printf("%s(): L%d debug\n\r", __func__, __LINE__);
+#ifdef SEGMENTS
+			putsec(secbuf, chinseg);
+			chinseg = 0;
+#endif
+			closeit(zi);
+			DO_SYSLOG_FNAME((LOG_INFO, "%s/%s: error: sender skipped",
+					   shortname, protname()));
+			vfile("rzfile: Sender SKIPPED file");
+			return c;
+		case ZDATA:
+			//xil_printf("%s(): L%d debug\n\r", __func__, __LINE__);
+			if (rclhdr(Rxhdr) != (long) zi->bytes_received) {
+#if defined(SAVE_OOSB)
+				oosb_t *neu;
+				size_t pos=rclhdr(Rxhdr);
+#endif
+				if ( --n < 0) {
+					vfile("rzfile: out of sync");
+					DO_SYSLOG_FNAME((LOG_INFO, "%s/%s: error: out of sync",
+					   shortname, protname()));
+					return ERROR;
+				}
+#if defined(SAVE_OOSB)
+				switch (c = zrdata(secbuf, MAX_BLOCK,&bytes_in_block))
+				{
+				case GOTCRCW:
+				case GOTCRCG:
+				case GOTCRCE:
+				case GOTCRCQ:
+					if (pos>zi->bytes_received) {
+						neu=malloc(sizeof(oosb_t));
+						if (neu)
+							neu->data=malloc(bytes_in_block);
+						if (neu && neu->data) {
+#ifdef ENABLE_SYSLOG
+/* call syslog to tell me if this happens */
+							lsyslog(LOG_ERR, 
+								   "saving out-of-sync-block %lx, len %lu",
+								   pos, (unsigned long) bytes_in_block);
+#endif
+							vfile("saving out-of-sync-block %lx, len %lu",pos,
+								  (unsigned long) bytes_in_block);
+							memcpy(neu->data,secbuf,bytes_in_block);
+							neu->pos=pos;
+							neu->len=bytes_in_block;
+							neu->next=anker;
+							anker=neu;
+						}
+						else if (neu)
+							free(neu);
+					}
+				}
+#endif
+#ifdef SEGMENTS
+				putsec(secbuf, chinseg);
+				chinseg = 0;
+#endif
+				zmputs(Attn);  continue;
+			}
+moredata:
+			//xil_printf("%s(): L%d debug\n\r", __func__, __LINE__);
+			if ((Verbose>1 || min_bps || stop_time)
+				&& (not_printed > (min_bps ? 3 : 7) 
+					|| zi->bytes_received > last_bps / 2 + last_rxbytes)) {
+				int minleft =  0;
+				int secleft =  0;
+				time_t now;
+				double d;
+				//xil_printf("%s(): L%d debug\n\r", __func__, __LINE__);
+				d=timing(0,&now);
+				if (d==0)
+					d=0.5; /* timing() might use time() */
+				last_bps=zi->bytes_received/d;
+				if (last_bps > 0) {
+					minleft =  (R_BYTESLEFT(zi))/last_bps/60;
+					secleft =  ((R_BYTESLEFT(zi))/last_bps)%60;
+				}
+				if (min_bps) {
+					if (low_bps) {
+						if (last_bps<min_bps) {
+							if (now-low_bps>=min_bps_time) {
+								/* too bad */
+								vfile(_("rzfile: bps rate %ld below min %ld"), 
+									  last_bps, min_bps);
+								DO_SYSLOG_FNAME((LOG_INFO, "%s/%s: bps rate low: %ld < %ld",
+										   shortname, protname(), last_bps, min_bps));
+								xil_printf("%s(): L%d debug\n\r", __func__, __LINE__);
+								return ERROR;
+							}
+						}
+						else
+							low_bps=0;
+					} else if (last_bps<min_bps) {
+						low_bps=now;
+					}
+				}
+				if (stop_time && now>=stop_time) {
+					/* too bad */
+					vfile(_("rzfile: reached stop time"));
+					DO_SYSLOG_FNAME((LOG_INFO, "%s/%s: reached stop time",
+							   shortname, protname()));
+					xil_printf("%s(): L%d debug\n\r", __func__, __LINE__);
+					return ERROR;
+				}
+				
+				if (Verbose > 1) {
+					vstringf(_("\rBytes received: %7ld/%7ld   BPS:%-6ld ETA %02d:%02d  "),
+						(long) zi->bytes_received, (long) zi->bytes_total, 
+						last_bps, minleft, secleft);
+					last_rxbytes=zi->bytes_received;
+					not_printed=0;
+				}
+			} else if (Verbose)
+				not_printed++;
+#ifdef SEGMENTS
+			if (chinseg >= (MAX_BLOCK * SEGMENTS)) {
+				putsec(secbuf, chinseg);
+				chinseg = 0;
+			}
+			switch (c = zrdata(secbuf+chinseg, MAX_BLOCK,&bytes_in_block))
+#else
+			switch (c = zrdata(secbuf, MAX_BLOCK,&bytes_in_block))
+#endif
+			{
+			case ZCAN:
+				xil_printf("%s(): L%d debug\n\r", __func__, __LINE__);
+#ifdef SEGMENTS
+				putsec(secbuf, chinseg);
+				chinseg = 0;
+#endif
+				vfile("rzfile: zrdata returned %d", c);
+				DO_SYSLOG_FNAME((LOG_INFO, "%s/%s: zrdata returned ZCAN",
+						   shortname, protname()));
+				return ERROR;
+			case ERROR:	/* CRC error */
+				xil_printf("%s(): L%d debug\n\r", __func__, __LINE__);
+#ifdef SEGMENTS
+				putsec(secbuf, chinseg);
+				chinseg = 0;
+#endif
+				if ( --n < 0) {
+					vfile("rzfile: zgethdr returned %d", c);
+					DO_SYSLOG_FNAME((LOG_INFO, "%s/%s: zrdata returned ERROR",
+							   shortname, protname()));
+					return ERROR;
+				}
+				zmputs(Attn);
+				continue;
+			case TIMEOUT:
+				xil_printf("%s(): L%d debug\n\r", __func__, __LINE__);
+#ifdef SEGMENTS
+				putsec(secbuf, chinseg);
+				chinseg = 0;
+#endif
+				if ( --n < 0) {
+					DO_SYSLOG_FNAME((LOG_INFO, "%s/%s: zrdata returned TIMEOUT",
+							   shortname, protname()));
+					vfile("rzfile: zgethdr returned %d", c);
+					return ERROR;
+				}
+				continue;
+			case GOTCRCW:
+				//xil_printf("%s(): L%d debug\n\r", __func__, __LINE__);
+				n = 20;
+#ifdef SEGMENTS
+				chinseg += bytes_in_block;
+				putsec(zi, secbuf, chinseg);
+				chinseg = 0;
+#else
+				putsec(zi, secbuf, bytes_in_block);
+#endif
+				zi->bytes_received += bytes_in_block;
+				stohdr(zi->bytes_received);
+				zshhdr(ZACK | 0x80, Txhdr);
+				goto nxthdr;
+			case GOTCRCQ:
+				//xil_printf("%s(): L%d debug\n\r", __func__, __LINE__);
+				n = 20;
+#ifdef SEGMENTS
+				chinseg += bytes_in_block;
+#else
+				putsec(zi, secbuf, bytes_in_block);
+#endif
+				zi->bytes_received += bytes_in_block;
+				stohdr(zi->bytes_received);
+				zshhdr(ZACK, Txhdr);
+				goto moredata;
+			case GOTCRCG:
+				//xil_printf("%s(): L%d debug\n\r", __func__, __LINE__);
+				n = 20;
+#ifdef SEGMENTS
+				chinseg += bytes_in_block;
+#else
+				putsec(zi, secbuf, bytes_in_block);
+#endif
+				zi->bytes_received += bytes_in_block;
+				goto moredata;
+			case GOTCRCE:
+				//xil_printf("%s(): L%d debug\n\r", __func__, __LINE__);
+				n = 20;
+#ifdef SEGMENTS
+				chinseg += bytes_in_block;
+#else
+				putsec(zi, secbuf, bytes_in_block);
+#endif
+				zi->bytes_received += bytes_in_block;
+				goto nxthdr;
+			}
+		}
+	}
+}
+
+/*
+ * Send a string to the modem, processing for \336 (sleep 1 sec)
+ *   and \335 (break signal)
+ */
+static void
+zmputs(const char *s)
+{
+	const char *p;
+
+	xil_printf("%s(): L%d zmputs not implmenment yet\n\r", __func__, __LINE__);
+#if 0
+	while (s && *s)
+	{
+		p=strpbrk(s,"\335\336");
+		if (!p)
+		{
+			write(1,s,strlen(s));
+			return;
+		}
+		if (p!=s)
+		{
+			write(1,s,(size_t) (p-s));
+			s=p;
+		}
+		if (*p=='\336')
+			sleep(1);
+		else
+			sendbrk(0);
+		p++;
+	}
+#endif
+}
+
+/*
+ * Close the receive dataset, return OK or ERROR
+ */
+#if 0
+int print_filename(FILE *f)
+{
+static	char buf[1024];
+	char fnmbuf[1024];
+	sprintf(fnmbuf, "/proc/self/fd/%d", fileno(f));
+	ssize_t nr;
+	if(0>(nr=readlink(fnmbuf, buf, sizeof(buf)))) return -1;
+	else buf[nr] = 0;
+	return buf;
+}
+#endif
+static int
+closeit(struct zm_fileinfo *zi)
+{
+	int ret;
+	if (Topipe) {
+#if 0
+		if (pclose(fout)) {
+			return ERROR;
+		}
+#endif
+		return OK;
+	}
+#if 0
+	if (in_tcpsync) {
+		rewind(fout);
+		if (!fgets(tcp_buf,sizeof(tcp_buf),fout)) {
+			error(1,errno,_("fgets for tcp protocol synchronization failed: "));
+		}	
+		fclose(fout);
+		return OK;
+	}
+#endif
+	//ret=fclose(fout);
+	ret = 0;
+	if (ret) {
+		zpfatal(_("file close error"));
+		/* this may be any sort of error, including random data corruption */
+
+		//unlink(Pathname);
+		return ERROR;
+	}
+	if (zi->modtime) {
+#ifdef HAVE_STRUCT_UTIMBUF
+		struct utimbuf timep;
+		timep.actime = time(NULL);
+		timep.modtime = zi->modtime;
+		//utime(Pathname, &timep);
+#else
+		time_t timep[2];
+		//timep[0] = time(NULL);
+		//timep[1] = zi->modtime;
+		//utime(Pathname, timep);
+#endif
+	}
+#ifdef S_ISREG
+	if (S_ISREG(zi->mode)) {
+#else
+	//if ((zi->mode&S_IFMT) == S_IFREG) {
+	if(1) {
+#endif
+		/* we must not make this program executable if running 
+		 * under rsh, because the user might have uploaded an
+		 * unrestricted shell.
+		 */
+#if 0
+		if (under_rsh)
+			chmod(Pathname, (00666 & zi->mode));
+		else
+			chmod(Pathname, (07777 & zi->mode));
+#endif
+	}
+	//chmod(Pathname, 00777);
+	return OK;
+}
+
+/*
+ * Ack a ZFIN packet, let byegones be byegones
+ */
+static void
+ackbibi(void)
+{
+	int n;
+
+	vfile("ackbibi:");
+	Readnum = 1;
+	stohdr(0L);
+	for (n=3; --n>=0; ) {
+		purgeline(0);
+		zshhdr(ZFIN, Txhdr);
+		switch (READLINE_PF(100)) {
+		case 'O':
+			READLINE_PF(1);	/* Discard 2nd 'O' */
+			vfile("ackbibi complete");
+			return;
+		case RCDO:
+			return;
+		case TIMEOUT:
+		default:
+			break;
+		}
+	}
+}
+
+/*
+ * Strip leading ! if present, do shell escape. 
+ */
+static int
+sys2(const char *s)
+{
+	if (*s == '!')
+		++s;
+	//return system(s);
+}
+
+/*
+ * Strip leading ! if present, do exec.
+ */
+static void 
+exec2(const char *s)
+{
+#if 0
+	if (*s == '!')
+		++s;
+	io_mode(0,0);
+	execl("/bin/sh", "sh", "-c", s);
+	zpfatal("execl");
+	exit(1);
+#endif
+}
+
+/*
+ * Routine to calculate the free bytes on the current file system
+ *  ~0 means many free bytes (unknown)
+ */
+static size_t 
+getfree(void)
+{
+	return((size_t) (~0L));	/* many free bytes ... */
+}
diff --git a/common/nondm.c b/common/nondm.c
new file mode 100644
index 0000000000..80619a95ac
--- /dev/null
+++ b/common/nondm.c
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _NONDM_BOARD_HANDLE_H
+#define _NONDM_BOARD_HANDLE_H
+
+typedef void (*sysrest_request_t)(void enum sysreset_t type);
+typedef int (*pinctrl_select_state_t)(enum uclass_id id, int devnum,
+				      const char * statename);
+typedef int (*clk_set_rate_t)(int clk_id, unsigned long rate);
+
+struct nondm_ops {
+	clk_set_rate_t *clk_set_rate;
+	sysrest_request_t *sysreset_request;
+	pinctrl_select_state_t *pinctrl_select_state;
+};
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+#endif
diff --git a/common/rbsb.c b/common/rbsb.c
new file mode 100644
index 0000000000..2bf9675017
--- /dev/null
+++ b/common/rbsb.c
@@ -0,0 +1,522 @@
+/*
+  rbsb.c - terminal handling stuff for lrzsz
+  Copyright (C) until 1988 Chuck Forsberg (Omen Technology INC)
+  Copyright (C) 1994 Matt Porter, Michael D. Black
+  Copyright (C) 1996, 1997 Uwe Ohse
+
+  This program is free software; you can redistribute it and/or modify
+  it under the terms of the GNU General Public License as published by
+  the Free Software Foundation; either version 2, or (at your option)
+  any later version.
+
+  This program is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+  GNU General Public License for more details.
+
+  You should have received a copy of the GNU General Public License
+  along with this program; if not, write to the Free Software
+  Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+  02111-1307, USA.
+
+  originally written by Chuck Forsberg
+*/
+
+/*
+ *  Rev 05-05-1988
+ *  ============== (not quite, but originated there :-). -- uwe 
+ */
+#include "zglobal.h"
+
+#include <stdio.h>
+#include <errno.h>
+
+#ifndef HAVE_ERRNO_DECLARATION
+extern int errno;
+#endif
+
+#ifdef USE_SGTTY
+#  ifdef LLITOUT
+long Locmode;		/* Saved "local mode" for 4.x BSD "new driver" */
+long Locbit = LLITOUT;	/* Bit SUPPOSED to disable output translations */
+#  endif
+#endif
+
+#ifdef HAVE_SYS_IOCTL_H
+#include <sys/ioctl.h>
+#endif
+
+#ifdef MAJOR_IN_MKDEV
+#include <sys/mkdev.h>
+#else
+# ifdef MAJOR_IN_SYSMACROS
+# include <sys/sysmacros.h>
+# endif
+#endif
+#ifndef HOWMANY
+#ifdef NFGVMIN
+#define HOWMANY MAX_BLOCK
+#else
+#define HOWMANY 255
+#endif
+#endif
+
+
+#if defined(HOWMANY) && HOWMANY  > 255
+#ifndef NFGVMIN
+Howmany must be 255 or less
+#endif
+#endif
+
+#define B110 110
+#define B300 300
+#define B600 600
+#define B1200 1200
+#define B2400 2400
+#define B2400 2400
+static struct {
+	unsigned baudr;
+	int  speedcode;
+} speeds[] = {
+	{110,	B110},
+	{300,	B300},
+	{600,	B600},
+	{1200,	B1200},
+#ifdef B19200
+    {19200,  B19200},
+#endif
+#ifdef B38400
+    {38400,  B38400},
+#endif
+#ifdef B57600
+    {57600,  B57600},
+#endif
+#ifdef B115200
+    {115200,  B115200},
+#endif
+#ifdef B230400
+    {230400,  B230400},
+#endif
+#ifdef B460800
+    {460800,  B460800},
+#endif
+#ifdef EXTA
+	{19200,	EXTA},
+#endif
+#ifdef EXTB
+	{38400,	EXTB},
+#endif
+	{0, 0}
+};
+
+static unsigned
+getspeed(int  code)
+{
+	int n;
+
+	for (n=0; speeds[n].baudr; ++n)
+		if (speeds[n].speedcode == code)
+			return speeds[n].baudr;
+	return 38400;	/* Assume fifo if ioctl failed */
+}
+
+/*
+ * return 1 if stdout and stderr are different devices
+ *  indicating this program operating with a modem on a
+ *  different line
+ */
+int Fromcu;		/* Were called from cu or yam */
+int 
+from_cu(void)
+{
+#if 0
+#ifdef HAVE_ST_RDEV
+	struct stat a, b;
+#if defined(makedev)
+	dev_t help=makedev(0,0);
+#else
+	int help=0;
+#endif
+
+	/* in case fstat fails */
+	a.st_rdev=b.st_rdev=a.st_dev=b.st_dev=help;
+
+	fstat(1, &a); fstat(2, &b);
+
+#if defined(major) && defined(minor)
+	if (major(a.st_rdev) != major(b.st_rdev) 
+		|| minor(a.st_rdev) != minor(b.st_rdev))
+		Fromcu=1;
+	else if (major(a.st_dev) != major(b.st_dev) 
+		|| minor(a.st_dev) != minor(b.st_dev))
+		Fromcu=1;
+	else
+		Fromcu=0;
+#else
+	Fromcu = (a.st_rdev != b.st_rdev) || (a.st_dev != b.st_dev);
+#endif
+#else
+	Fromcu = 1; /* a bad guess .. */
+#endif
+	return Fromcu;
+#endif
+	return 0;
+}
+
+
+
+int Twostop;		/* Use two stop bits */
+
+
+#ifdef READCHECK_FIONREAD
+/*
+ *  Return non 0 if something to read from io descriptor f
+ */
+int 
+rdchk(int fd)
+{
+	static long lf;
+
+	ioctl(fd, FIONREAD, &lf);
+	return ((int) lf);
+}
+#endif
+
+#ifdef READCHECK_GETFL
+unsigned char checked = '\0' ;
+/*
+ * Nonblocking I/O is a bit different in System V, Release 2
+ */
+int 
+rdchk(int fd)
+{
+	int lf, savestat;
+
+	savestat = fcntl(fd, F_GETFL) ;
+	if (savestat == -1)
+		return 0;
+#ifdef OVERLY_PARANOID
+	if (-1==fcntl(fd, F_SETFL, savestat | O_NDELAY))
+		return 0;
+	lf = read(fd, &checked, 1) ;
+	if (-1==fcntl(fd, F_SETFL, savestat)) {
+#ifdef ENABLE_SYSLOG
+		if (enable_syslog)
+			lsyslog(LOG_CRIT,"F_SETFL failed in rdchk(): %s",	
+				strerror(errno));
+#endif
+		zpfatal("rdchk: F_SETFL failed\n"); /* lose */
+		/* there is really no way to recover. And we can't tell
+		 * the other side what's going on if we can't write to
+		 * fd, but we try.
+		 */
+		canit(fd);
+		exit(1); 
+	}
+#else
+	fcntl(fd, F_SETFL, savestat | O_NDELAY);
+	lf = read(fd, &checked, 1) ;
+	fcntl(fd, F_SETFL, savestat);
+#endif
+	return(lf == -1 && errno==EWOULDBLOCK ? 0 : lf) ;
+}
+#endif
+
+
+
+
+
+#ifdef USE_TERMIOS
+struct termios oldtty, tty;
+#else
+#  if defined(USE_TERMIO)
+struct termio oldtty, tty;
+#  else
+//struct sgttyb oldtty, tty;
+//struct tchars oldtch, tch;
+#  endif
+#endif
+
+
+/*
+ * mode(n)
+ *  3: save old tty stat, set raw mode with flow control
+ *  2: set XON/XOFF for sb/sz with ZMODEM or YMODEM-g
+ *  1: save old tty stat, set raw mode 
+ *  0: restore original tty mode
+ */
+int 
+io_mode(int fd, int n)
+{
+#if 1
+	static int did0 = FALSE;
+
+	vfile("mode:%d", n);
+
+	switch(n) {
+
+#ifdef USE_TERMIOS
+	case 2:		/* Un-raw mode used by sz, sb when -g detected */
+		if(!did0) {
+			did0 = TRUE;
+			tcgetattr(fd,&oldtty);
+		}
+		tty = oldtty;
+
+		tty.c_iflag = BRKINT|IXON;
+
+		tty.c_oflag = 0;	/* Transparent output */
+
+		tty.c_cflag &= ~PARENB;	/* Disable parity */
+		tty.c_cflag |= CS8;	/* Set character size = 8 */
+		if (Twostop)
+			tty.c_cflag |= CSTOPB;	/* Set two stop bits */
+
+#ifdef READCHECK
+		tty.c_lflag = protocol==ZM_ZMODEM ? 0 : ISIG;
+		tty.c_cc[VINTR] = protocol==ZM_ZMODEM ? -1 : 030;	/* Interrupt char */
+#else
+		tty.c_lflag = 0;
+		tty.c_cc[VINTR] = protocol==ZM_ZMODEM ? 03 : 030;	/* Interrupt char */
+#endif
+#ifdef _POSIX_VDISABLE
+		if (((int) _POSIX_VDISABLE)!=(-1)) {
+			tty.c_cc[VQUIT] = _POSIX_VDISABLE;		/* Quit char */
+		} else {
+			tty.c_cc[VQUIT] = -1;			/* Quit char */
+		}
+#else
+		tty.c_cc[VQUIT] = -1;			/* Quit char */
+#endif
+#ifdef NFGVMIN
+		tty.c_cc[VMIN] = 1;
+#else
+		tty.c_cc[VMIN] = 3;	 /* This many chars satisfies reads */
+#endif
+		tty.c_cc[VTIME] = 1;	/* or in this many tenths of seconds */
+
+		tcsetattr(fd,TCSADRAIN,&tty);
+
+		return OK;
+	case 1:
+	case 3:
+		if(!did0) {
+			did0 = TRUE;
+			tcgetattr(fd,&oldtty);
+		}
+		tty = oldtty;
+
+		tty.c_iflag = IGNBRK;
+		if (n==3) /* with flow control */
+			tty.c_iflag |= IXOFF;
+
+		 /* No echo, crlf mapping, INTR, QUIT, delays, no erase/kill */
+		tty.c_lflag &= ~(ECHO | ICANON | ISIG);
+		tty.c_oflag = 0;	/* Transparent output */
+
+		tty.c_cflag &= ~(PARENB);	/* Same baud rate, disable parity */
+		/* Set character size = 8 */
+		tty.c_cflag &= ~(CSIZE);
+		tty.c_cflag |= CS8;	
+		if (Twostop)
+			tty.c_cflag |= CSTOPB;	/* Set two stop bits */
+#ifdef NFGVMIN
+		tty.c_cc[VMIN] = 1; /* This many chars satisfies reads */
+#else
+		tty.c_cc[VMIN] = HOWMANY; /* This many chars satisfies reads */
+#endif
+		tty.c_cc[VTIME] = 1;	/* or in this many tenths of seconds */
+		tcsetattr(fd,TCSADRAIN,&tty);
+		Baudrate = getspeed(cfgetospeed(&tty));
+		return OK;
+	case 0:
+		if(!did0)
+			return ERROR;
+		tcdrain (fd); /* wait until everything is sent */
+		tcflush (fd,TCIOFLUSH); /* flush input queue */
+		tcsetattr (fd,TCSADRAIN,&oldtty);
+		tcflow (fd,TCOON); /* restart output */
+
+		return OK;
+#endif
+
+#ifdef USE_TERMIO
+	case 2:		/* Un-raw mode used by sz, sb when -g detected */
+		if(!did0)
+			(void) ioctl(fd, TCGETA, &oldtty);
+		tty = oldtty;
+
+		tty.c_iflag = BRKINT|IXON;
+
+		tty.c_oflag = 0;	/* Transparent output */
+
+		tty.c_cflag &= ~PARENB;	/* Disable parity */
+		tty.c_cflag |= CS8;	/* Set character size = 8 */
+		if (Twostop)
+			tty.c_cflag |= CSTOPB;	/* Set two stop bits */
+
+
+#ifdef READCHECK
+		tty.c_lflag = protocol==ZM_ZMODEM ? 0 : ISIG;
+		tty.c_cc[VINTR] = protocol==ZM_ZMODEM ? -1 : 030;	/* Interrupt char */
+#else
+		tty.c_lflag = 0;
+		tty.c_cc[VINTR] = protocol==ZM_ZMODEM ? 03 : 030;	/* Interrupt char */
+#endif
+		tty.c_cc[VQUIT] = -1;			/* Quit char */
+#ifdef NFGVMIN
+		tty.c_cc[VMIN] = 1;
+#else
+		tty.c_cc[VMIN] = 3;	 /* This many chars satisfies reads */
+#endif
+		tty.c_cc[VTIME] = 1;	/* or in this many tenths of seconds */
+
+		(void) ioctl(fd, TCSETAW, &tty);
+		did0 = TRUE;
+		return OK;
+	case 1:
+	case 3:
+		if(!did0)
+			(void) ioctl(fd, TCGETA, &oldtty);
+		tty = oldtty;
+
+		tty.c_iflag = n==3 ? (IGNBRK|IXOFF) : IGNBRK;
+
+		 /* No echo, crlf mapping, delays, no erase/kill */
+		tty.c_lflag &= ~(ECHO | ICANON | ISIG);
+
+		tty.c_oflag = 0;	/* Transparent output */
+
+		tty.c_cflag &= ~PARENB;	/* Same baud rate, disable parity */
+		tty.c_cflag |= CS8;	/* Set character size = 8 */
+		if (Twostop)
+			tty.c_cflag |= CSTOPB;	/* Set two stop bits */
+#ifdef NFGVMIN
+		tty.c_cc[VMIN] = 1; /* This many chars satisfies reads */
+#else
+		tty.c_cc[VMIN] = HOWMANY; /* This many chars satisfies reads */
+#endif
+		tty.c_cc[VTIME] = 1;	/* or in this many tenths of seconds */
+		(void) ioctl(fd, TCSETAW, &tty);
+		did0 = TRUE;
+		Baudrate = getspeed(tty.c_cflag & CBAUD);
+		return OK;
+	case 0:
+		if(!did0)
+			return ERROR;
+		(void) ioctl(fd, TCSBRK, 1);	/* Wait for output to drain */
+		(void) ioctl(fd, TCFLSH, 0);	/* Flush input queue */
+		(void) ioctl(fd, TCSETAW, &oldtty);	/* Restore modes */
+		(void) ioctl(fd, TCXONC,1);	/* Restart output */
+		return OK;
+#endif
+
+
+#ifdef USE_SGTTY
+	/*
+	 *  NOTE: this should transmit all 8 bits and at the same time
+	 *   respond to XOFF/XON flow control.  If no FIONREAD or other
+	 *   READCHECK alternative, also must respond to INTRRUPT char
+	 *   This doesn't work with V7.  It should work with LLITOUT,
+	 *   but LLITOUT was broken on the machine I tried it on.
+	 */
+	case 2:		/* Un-raw mode used by sz, sb when -g detected */
+		if(!did0) {
+			ioctl(fd, TIOCEXCL, 0);
+			ioctl(fd, TIOCGETP, &oldtty);
+			ioctl(fd, TIOCGETC, &oldtch);
+#ifdef LLITOUT
+			ioctl(fd, TIOCLGET, &Locmode);
+#endif
+		}
+		tty = oldtty;
+		tch = oldtch;
+#ifdef READCHECK
+		tch.t_intrc = Zmodem ? -1:030;	/* Interrupt char */
+#else
+		tch.t_intrc = Zmodem ? 03:030;	/* Interrupt char */
+#endif
+		tty.sg_flags |= (ODDP|EVENP|CBREAK);
+		tty.sg_flags &= ~(ALLDELAY|CRMOD|ECHO|LCASE);
+		ioctl(fd, TIOCSETP, &tty);
+		ioctl(fd, TIOCSETC, &tch);
+#ifdef LLITOUT
+		ioctl(fd, TIOCLBIS, &Locbit);
+#else
+		bibi(99);	/* un-raw doesn't work w/o lit out */
+#endif
+		did0 = TRUE;
+		return OK;
+	case 1:
+	case 3:
+		if(!did0) {
+			ioctl(fd, TIOCEXCL, 0);
+			ioctl(fd, TIOCGETP, &oldtty);
+			ioctl(fd, TIOCGETC, &oldtch);
+#ifdef LLITOUT
+			ioctl(fd, TIOCLGET, &Locmode);
+#endif
+		}
+		tty = oldtty;
+		tty.sg_flags |= RAW;
+		tty.sg_flags &= ~ECHO;
+		ioctl(fd, TIOCSETP, &tty);
+		did0 = TRUE;
+		Baudrate = getspeed(tty.sg_ospeed);
+		return OK;
+	case 0:
+		if(!did0)
+			return ERROR;
+		ioctl(fd, TIOCSETP, &oldtty);
+		ioctl(fd, TIOCSETC, &oldtch);
+		ioctl(fd, TIOCNXCL, 0);
+#ifdef LLITOUT
+		ioctl(fd, TIOCLSET, &Locmode);
+#endif
+#ifdef TIOCFLUSH
+		{ int x=1; ioctl(fd,TIOCFLUSH,&x); }
+#endif
+#endif
+
+		return OK;
+	default:
+		return ERROR;
+	}
+#endif
+}
+
+void
+sendbrk(int fd)
+{
+#if 0
+#ifdef USE_TERMIOS
+	tcsendbreak(fd,0);
+#endif
+#ifdef USE_TERMIO
+	ioctl(fd, TCSBRK, 0);
+#endif
+#ifdef USE_SGTTY
+#ifdef TIOCSBRK
+	sleep(1);
+	ioctl(fd, TIOCSBRK, 0);
+	sleep(1);
+	ioctl(fd, TIOCCBRK, 0);
+#endif
+#endif
+#endif
+}
+
+void
+purgeline(int fd)
+{
+	readline_purge();
+#if 0
+#ifdef TCFLSH
+	ioctl(fd, TCFLSH, 0);
+#else
+	lseek(fd, 0L, 2);
+#endif
+#endif
+}
+
+/* End of rbsb.c */
diff --git a/common/zglobal.h b/common/zglobal.h
new file mode 100644
index 0000000000..67ffb996f4
--- /dev/null
+++ b/common/zglobal.h
@@ -0,0 +1,464 @@
+#ifndef ZMODEM_GLOBAL_H
+#define ZMODEM_GLOBAL_H
+
+/* zglobal.h - prototypes etcetera for lrzsz
+
+  Copyright (C) until 1998 Chuck Forsberg (OMEN Technology Inc)
+  Copyright (C) 1994 Matt Porter
+  Copyright (C) 1996, 1997 Uwe Ohse
+
+  This program is free software; you can redistribute it and/or modify
+  it under the terms of the GNU General Public License as published by
+  the Free Software Foundation; either version 2, or (at your option)
+  any later version.
+
+  This program is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+  GNU General Public License for more details.
+
+  You should have received a copy of the GNU General Public License
+  along with this program; if not, write to the Free Software
+  Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+  02111-1307, USA.
+*/
+
+#include "config.h"
+//#include <sys/types.h>
+
+#ifdef __GNUC__
+# define alloca __builtin_alloca
+# define HAVE_ALLOCA 1
+#else
+# if defined HAVE_ALLOCA_H || defined _LIBC
+#  include <alloca.h>
+# else
+#  ifdef _AIX
+#pragma alloca
+#  else
+#   ifndef alloca
+#    ifndef __GLIBC__
+char *alloca ();
+#    endif
+#   endif
+#  endif
+# endif
+#endif
+
+#ifndef __P
+#if defined (__GNUC__) || (defined (__STDC__) && __STDC__)
+#define __P(args) args
+#else
+#define __P(args) ()
+#endif  /* GCC.  */
+#endif  /* Not __P.  */
+
+#ifdef __STDC__
+#include <stdarg.h>
+#else
+#include <varargs.h>
+#endif
+
+#ifdef TIME_WITH_SYS_TIME
+#  include <sys/time.h>
+#  include <time.h>
+#  define INCLUDED_SYS_TIME
+#else
+#  ifdef HAVE_SYS_TIME_H
+#    include <sys/time.h>
+#    define INCLUDED_SYS_TIME
+#  else
+#    include <time.h>
+#  endif
+#endif
+#ifdef SYS_TIME_WITHOUT_SYS_SELECT
+# ifdef INCLUDED_SYS_TIME
+#  undef HAVE_SYS_SELECT_H
+# endif
+#endif
+
+
+#ifdef HAVE_SYS_SELECT_H
+#  include <sys/select.h>
+#endif
+#ifdef __BEOS__
+ /* BeOS 4.0: sys/select.h is almost completely #ifdefd out */
+#define  HAVE_SOCKET_H
+#ifdef HAVE_SOCKET_H
+#include <socket.h>
+#endif
+#endif
+
+#if STDC_HEADERS
+# include <linux/string.h>
+#else
+# ifdef HAVE_STRINGS_H
+#   include <linux/strings.h>
+# endif
+# ifndef HAVE_STRCHR
+#  define strchr index
+#  define strrchr rindex
+# endif
+char *strchr (), *strrchr ();
+# ifndef HAVE_MEMCPY
+#  define memcpy(d, s, n) bcopy ((s), (d), (n))
+#  define memmove(d, s, n) bcopy ((s), (d), (n))
+# endif
+#endif
+
+//#include <sys/stat.h>
+
+/* we need to decide whether readcheck is possible */
+#ifdef HAVE_FCNTL_H
+#  include <fcntl.h>
+#endif
+#ifdef HAVE_SYS_IOCTL_H
+#  include <sys/ioctl.h>
+#endif
+#ifdef HAVE_RDCHK
+#  define READCHECK
+#else
+#  ifdef FIONREAD
+#    define READCHECK_FIONREAD
+#    define READCHECK
+#  else
+#    ifdef F_GETFL
+#      define READCHECK
+#      define READCHECK_READS
+#      define READCHECK_GETFL
+#    endif
+#  endif
+#endif
+
+/* used to use #elif, but native braindead hpux 9.00 c compiler didn't 
+ * understand it */
+#ifdef HAVE_TERMIOS_H
+/* get rid of warnings on SCO ODT 3.2 */
+struct termios;
+# include <termios.h>
+# define USE_TERMIOS
+#else
+# if defined(HAVE_SYS_TERMIOS_H)
+#  include <sys/termios.h>
+#  define USE_TERMIOS
+# else
+#  if defined(HAVE_TERMIO_H)
+#   include <termio.h>
+#   define USE_TERMIO
+#  else
+#   if defined(HAVE_SYS_TERMIO_H)
+#    include <sys/termio.h>
+#    define USE_TERMIO
+#   else
+#    if defined(HAVE_SGTTY_H)
+#     include <sgtty.h>
+#     define USE_SGTTY
+#     ifdef LLITOUT
+       extern long Locmode;		/* Saved "local mode" for 4.x BSD "new driver" */
+       extern long Locbit;	/* Bit SUPPOSED to disable output translations */
+#     endif
+#    else
+#    // error neither termio.h nor sgtty.h found. Cannot continue.
+#    endif
+#   endif
+#  endif
+# endif
+#endif
+
+#ifdef USE_SGTTY
+#  ifdef TIOCSBRK
+#    define CANBREAK
+#  endif
+#endif
+#ifdef USE_TERMIO
+#  define CANBREAK
+#endif
+
+
+
+/* Take care of NLS matters.  */
+#if HAVE_LOCALE_H
+# include <locale.h>
+#endif
+#if !HAVE_SETLOCALE
+# define setlocale(Category, Locale) /* empty */
+#endif
+
+#if ENABLE_NLS
+# include <libintl.h>
+# define _(Text) gettext (Text)
+#else
+# define bindtextdomain(Domain, Directory) /* empty */
+# define textdomain(Domain) /* empty */
+# define _(Text) Text
+#endif
+
+#ifndef ENABLE_SYSLOG
+#  undef HAVE_SYSLOG
+#else
+#  ifdef HAVE_SYSLOG_H
+#    include <syslog.h>
+#  else
+#    if defined(HAVE_SYS_SYSLOG_H)
+#      include <sys/syslog.h>
+#    else
+#      undef HAVE_SYSLOG
+#    endif
+#  endif
+#endif
+#ifndef ENABLE_SYSLOG
+#  define openlog(name,pid,facility) /* void it */
+#  define setlogmask(x) /* void it */
+#else
+extern int enable_syslog;
+#endif
+
+#if defined HAVE_UNISTD_H
+# include <unistd.h>
+#endif
+/* The following is from pathmax.h.  */
+/* Non-POSIX BSD systems might have gcc's limits.h, which doesn't define
+   PATH_MAX but might cause redefinition warnings when sys/param.h is
+   later included (as on MORE/BSD 4.3).  */
+#if defined(_POSIX_VERSION) || (defined(HAVE_LIMITS_H) && !defined(__GNUC__))
+# include <limits.h>
+#endif
+
+#ifndef _POSIX_PATH_MAX
+# define _POSIX_PATH_MAX 255
+#endif
+
+#if !defined(PATH_MAX) && defined(_PC_PATH_MAX)
+# define PATH_MAX 255
+#endif
+
+/* Don't include sys/param.h if it already has been.  */
+#if defined(HAVE_SYS_PARAM_H) && !defined(PATH_MAX) && !defined(MAXPATHLEN)
+# include <sys/param.h>
+#endif
+
+#if !defined(PATH_MAX) && defined(MAXPATHLEN)
+# define PATH_MAX MAXPATHLEN
+#endif
+
+#if !defined(LONG_MAX) && defined(HAVE_LIMITS_H)
+# include <limits.h>
+#endif
+
+#ifndef PATH_MAX
+# define PATH_MAX _POSIX_PATH_MAX
+#endif
+
+#ifdef __GNUC__
+
+#if __GNUC__ > 2 || (__GNUC__ == 2 && __GNUC_MINOR__ > 5)
+# define LRZSZ_ATTRIB_SECTION(x) __attribute__((section(#x)))
+#endif
+
+#if __GNUC__ > 2 || (__GNUC__ == 2 && __GNUC_MINOR__ > 4)
+# define LRZSZ_ATTRIB_CONST  __attribute__((__const__))
+#endif
+
+    /* gcc.info sagt, noreturn w?re ab 2.5 verf?gbar. HPUX-gcc 2.5.8
+     * kann es noch nicht - what's this?
+     */
+#if __GNUC__ > 2 || (__GNUC__ == 2 && __GNUC_MINOR__ > 5)
+# define LRZSZ_ATTRIB_NORET  __attribute__((__noreturn__))
+#endif
+
+#if __GNUC__ > 2 || (__GNUC__ == 2 && __GNUC_MINOR__ > 5)
+# define LRZSZ_ATTRIB_PRINTF(formatnr,firstargnr)  \
+    __attribute__((__format__ (printf,formatnr,firstargnr)))
+#endif
+
+#if __GNUC__ > 2 || (__GNUC__ == 2 && __GNUC_MINOR__ > 6)
+#define LRZSZ_ATTRIB_UNUSED __attribute__((__unused__))
+#endif
+
+#if __GNUC__ > 2 || (__GNUC__ == 2 && __GNUC_MINOR__ >= 7)
+# define LRZSZ_ATTRIB_REGPARM(n)  \
+    __attribute__((__regparm__ (n)))
+#endif
+#endif /* __GNUC__ */
+#ifndef LRZSZ_ATTRIB_REGPARM
+#define LRZSZ_ATTRIB_REGPARM(n)
+#endif
+#ifndef LRZSZ_ATTRIB_UNUSED
+#define LRZSZ_ATTRIB_UNUSED
+#endif
+#ifndef LRZSZ_ATTRIB_NORET
+#define LRZSZ_ATTRIB_NORET
+#endif
+#ifndef LRZSZ_ATTRIB_CONST
+#define LRZSZ_ATTRIB_CONST
+#endif
+#ifndef LRZSZ_ATTRIB_PRINTF
+#define LRZSZ_ATTRIB_PRINTF(x,y)
+#endif
+#ifndef LRZSZ_ATTRIB_SECTION
+#define LRZSZ_ATTRIB_SECTION(n)
+#endif
+#undef LRZSZ_ATTRIB_SECTION
+#define LRZSZ_ATTRIB_SECTION(x)
+#undef LRZSZ_ATTRIB_REGPARM
+#define LRZSZ_ATTRIB_REGPARM(x)
+
+
+#define OK 0
+#define FALSE 0
+#define TRUE 1
+#define ERROR (-1)
+
+/* Ward Christensen / CP/M parameters - Don't change these! */
+#define ENQ 005
+#define CAN ('X'&037)
+#define XOFF ('s'&037)
+#define XON ('q'&037)
+#define SOH 1
+#define STX 2
+#define EOT 4
+#define ACK 6
+#define NAK 025
+#define CPMEOF 032
+#define WANTCRC 0103    /* send C not NAK to get crc not checksum */
+#define WANTG 0107  /* Send G not NAK to get nonstop batch xmsn */
+#define TIMEOUT (-2)
+#define RCDO (-3)
+#define WCEOT (-10)
+
+#define RETRYMAX 10
+
+#define UNIXFILE 0xF000  /* The S_IFMT file mask bit for stat */
+
+#define DEFBYTL 2000000000L	/* default rx file size */
+
+enum zm_type_enum {
+	ZM_XMODEM,
+	ZM_YMODEM,
+	ZM_ZMODEM
+};
+
+struct zm_fileinfo {
+	char *fname;
+	time_t modtime;
+	mode_t mode;
+	size_t bytes_total;
+	size_t bytes_sent;
+	size_t bytes_received;
+	size_t bytes_skipped; /* crash recovery */
+	int    eof_seen;
+};
+
+#define R_BYTESLEFT(x) ((x)->bytes_total-(x)->bytes_received)
+
+extern enum zm_type_enum protocol;
+
+extern const char *program_name;        /* the name by which we were called */
+extern int Verbose;
+extern int errors;
+extern int no_timeout;
+extern int Zctlesc;    /* Encode control characters */
+extern int under_rsh;
+
+RETSIGTYPE bibi __P ((int n));
+
+//#define sendline(c) putchar((c) & 0377)
+//#define xsendline(c) putchar(c)
+
+/* zreadline.c */
+extern char *readline_ptr; /* pointer for removing chars from linbuf */
+extern int readline_left; /* number of buffered chars left to read */
+#define READLINE_PF(timeout) \
+    (--readline_left >= 0? (*readline_ptr++ & 0377) : readline_internal(timeout))
+
+int readline_internal __P ((unsigned int timeout));
+void readline_purge __P ((void));
+void readline_setup __P ((int fd, size_t readnum, 
+	size_t buffer_size)) LRZSZ_ATTRIB_SECTION(lrzsz_rare);
+
+
+/* rbsb.c */
+extern int Fromcu;
+extern int Twostop;
+#ifdef READCHECK_READS
+extern unsigned char checked;
+#endif
+extern int iofd;
+extern unsigned Baudrate;
+
+void zperr __P ((const char *fmt, ...));
+void zpfatal __P ((const char *fmt, ...));
+void vfile __P ((const char *format, ...));
+#define vchar(x) putc(x,stderr)
+#define vstring(x) fputs(x,stderr)
+
+#ifdef __GNUC__
+#if __GNUC__ > 1
+#define vstringf(format,args...) fprintf(stderr,format, ##args)
+#endif
+#endif
+#ifndef vstringf
+void vstringf __P ((const char *format, ...));
+#endif
+#define VPRINTF(level,format_args) do {if ((Verbose)>=(level)) \
+	vstringf format_args ; } while(0)
+
+/* rbsb.c */
+int from_cu __P ((void)) LRZSZ_ATTRIB_SECTION(lrzsz_rare);
+int rdchk __P ((int fd));
+int io_mode __P ((int fd, int n)) LRZSZ_ATTRIB_SECTION(lrzsz_rare);
+void sendbrk __P ((int fd));
+//#define flushmo() fflush(stdout)
+void purgeline __P ((int fd));
+void canit __P ((int fd));
+
+
+/* crctab.c */
+extern unsigned short crctab[256];
+#define updcrc(cp, crc) ( crctab[((crc >> 8) & 255)] ^ (crc << 8) ^ cp)
+extern long cr3tab[];
+#define UPDC32(b, c) (cr3tab[((int)c ^ b) & 0xff] ^ ((c >> 8) & 0x00FFFFFF))
+
+/* zm.c */
+#include "zmodem.h"
+extern unsigned int Rxtimeout;        /* Tenths of seconds to wait for something */
+extern int bytes_per_error;  /* generate one error around every x bytes */
+
+/* Globals used by ZMODEM functions */
+extern int Rxframeind;     /* ZBIN ZBIN32, or ZHEX type of frame received */
+extern int Rxtype;     /* Type of header received */
+extern int Zrwindow;       /* RX window size (controls garbage count) */
+/* extern int Rxcount; */       /* Count of data bytes received */
+extern char Rxhdr[4];      /* Received header */
+extern char Txhdr[4];      /* Transmitted header */
+extern long Txpos;     /* Transmitted file position */
+extern int Txfcs32;        /* TURE means send binary frames with 32 bit FCS */
+extern int Crc32t;     /* Display flag indicating 32 bit CRC being sent */
+extern int Crc32;      /* Display flag indicating 32 bit CRC being received */
+extern int Znulls;     /* Number of nulls to send at beginning of ZDATA hdr */
+extern char Attn[ZATTNLEN+1];  /* Attention string rx sends to tx on err */
+
+extern void zsendline __P ((int c));
+extern void zsendline_init __P ((void)) LRZSZ_ATTRIB_SECTION(lrzsz_rare);
+void zsbhdr __P ((int type, char *hdr));
+void zshhdr __P ((int type, char *hdr));
+void zsdata __P ((const char *buf, size_t length, int frameend));
+void zsda32 __P ((const char *buf, size_t length, int frameend));
+int zrdata __P ((char *buf, int length, size_t *received));
+int zgethdr __P ((char *hdr, int eflag, size_t *));
+void stohdr __P ((size_t pos)) LRZSZ_ATTRIB_REGPARM(1);
+long rclhdr __P ((char *hdr)) LRZSZ_ATTRIB_REGPARM(1);
+
+int tcp_server __P ((char *buf)) LRZSZ_ATTRIB_SECTION(lrzsz_rare);
+int tcp_connect __P ((char *buf)) LRZSZ_ATTRIB_SECTION(lrzsz_rare);
+int tcp_accept __P ((int d)) LRZSZ_ATTRIB_SECTION(lrzsz_rare);
+
+
+const char * protname __P ((void)) LRZSZ_ATTRIB_SECTION(lrzsz_rare);
+void lsyslog __P ((int, const char *,...));
+#define xil_printf printf
+
+
+
+
+#endif
diff --git a/common/zm.c b/common/zm.c
new file mode 100644
index 0000000000..813be180e9
--- /dev/null
+++ b/common/zm.c
@@ -0,0 +1,980 @@
+/*
+  zm.c - zmodem protocol handling lowlevelstuff
+  Copyright (C) until 1998 Chuck Forsberg (OMEN Technology Inc)
+  Copyright (C) 1996, 1997 Uwe Ohse
+
+  This program is free software; you can redistribute it and/or modify
+  it under the terms of the GNU General Public License as published by
+  the Free Software Foundation; either version 2, or (at your option)
+  any later version.
+
+  This program is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+  GNU General Public License for more details.
+
+  You should have received a copy of the GNU General Public License
+  along with this program; if not, write to the Free Software
+  Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+  02111-1307, USA.
+
+  originally written by Chuck Forsberg
+*/
+/* historical comment: -- uwe
+ *   Z M . C
+ *    ZMODEM protocol primitives
+ *    05-09-88  Chuck Forsberg Omen Technology Inc
+ *
+ * Entry point Functions:
+ *	zsbhdr(type, hdr) send binary header
+ *	zshhdr(type, hdr) send hex header
+ *	zgethdr(hdr, eflag) receive header - binary or hex
+ *	zsdata(buf, len, frameend) send data
+ *	zrdata(buf, len, bytes_received) receive data
+ *	stohdr(pos) store position data in Txhdr
+ *	long rclhdr(hdr) recover position offset from header
+ */
+
+
+#include "zglobal.h"
+
+#include <stdio.h>
+
+unsigned int Rxtimeout = 100;		/* Tenths of seconds to wait for something */
+
+/* Globals used by ZMODEM functions */
+int Rxframeind;		/* ZBIN ZBIN32, or ZHEX type of frame received */
+int Rxtype;		/* Type of header received */
+char Rxhdr[4];		/* Received header */
+char Txhdr[4];		/* Transmitted header */
+long Txpos;		/* Transmitted file position */
+int Txfcs32;		/* TRUE means send binary frames with 32 bit FCS */
+int Crc32t;		/* Display flag indicating 32 bit CRC being sent */
+int Crc32;		/* Display flag indicating 32 bit CRC being received */
+int Znulls;		/* Number of nulls to send at beginning of ZDATA hdr */
+char Attn[ZATTNLEN+1];	/* Attention string rx sends to tx on err */
+
+static char lastsent;	/* Last char we sent */
+int turbo_escape;
+int bytes_per_error=0;
+
+static const char *frametypes[] = {
+	"Carrier Lost",		/* -3 */
+	"TIMEOUT",		/* -2 */
+	"ERROR",		/* -1 */
+#define FTOFFSET 3
+	"ZRQINIT",
+	"ZRINIT",
+	"ZSINIT",
+	"ZACK",
+	"ZFILE",
+	"ZSKIP",
+	"ZNAK",
+	"ZABORT",
+	"ZFIN",
+	"ZRPOS",
+	"ZDATA",
+	"ZEOF",
+	"ZFERR",
+	"ZCRC",
+	"ZCHALLENGE",
+	"ZCOMPL",
+	"ZCAN",
+	"ZFREECNT",
+	"ZCOMMAND",
+	"ZSTDERR",
+	"xxxxx"
+#define FRTYPES 22	/* Total number of frame types in this array */
+			/*  not including psuedo negative entries */
+};
+
+#define badcrc _("Bad CRC")
+/* static char *badcrc = "Bad CRC"; */
+static inline int noxrd7 __P ((void));
+static inline int zdlread __P ((void));
+static int zdlread2 __P ((int)) LRZSZ_ATTRIB_REGPARM(1);
+static inline int zgeth1 __P ((void));
+static void zputhex __P ((int c, char *pos));
+static inline int zgethex __P ((void));
+static int zrbhdr __P ((char *hdr));
+static int zrbhdr32 __P ((char *hdr));
+static int zrhhdr __P ((char *hdr));
+static char zsendline_tab[256];
+static int zrdat32 __P ((char *buf, int length, size_t *));
+static void zsbh32 __P ((char *hdr, int type));
+
+extern int zmodem_requested;
+
+
+/*
+ * Read a character from the modem line with timeout.
+ *  Eat parity, XON and XOFF characters.
+ */
+static inline int
+noxrd7(void)
+{
+	register int c;
+
+	for (;;) {
+		if ((c = READLINE_PF(Rxtimeout)) < 0)
+			return c;
+		switch (c &= 0177) {
+		case XON:
+		case XOFF:
+			continue;
+		default:
+			if (Zctlesc && !(c & 0140))
+				continue;
+		case '\r':
+		case '\n':
+		case ZDLE:
+			return c;
+		}
+	}
+}
+
+static inline int
+zgeth1(void)
+{
+	register int c, n;
+
+	if ((c = noxrd7()) < 0)
+		return c;
+	n = c - '0';
+	if (n > 9)
+		n -= ('a' - ':');
+	if (n & ~0xF)
+		return ERROR;
+	if ((c = noxrd7()) < 0)
+		return c;
+	c -= '0';
+	if (c > 9)
+		c -= ('a' - ':');
+	if (c & ~0xF)
+		return ERROR;
+	c += (n<<4);
+	return c;
+}
+
+/* Decode two lower case hex digits into an 8 bit byte value */
+static inline int
+zgethex(void)
+{
+	register int c;
+
+	c = zgeth1();
+	VPRINTF(9,("zgethex: %02X", c));
+	return c;
+}
+
+/*
+ * Read a byte, checking for ZMODEM escape encoding
+ *  including CAN*5 which represents a quick abort
+ */
+static inline int
+zdlread(void)
+{
+	int c;
+	/* Quick check for non control characters */
+	if ((c = READLINE_PF(Rxtimeout)) & 0140)
+		return c;
+	return zdlread2(c);
+}
+/* no, i don't like gotos. -- uwe */
+static int
+zdlread2(int c)
+{
+	goto jump_over; /* bad style */
+
+again:
+	/* Quick check for non control characters */
+	if ((c = READLINE_PF(Rxtimeout)) & 0140)
+		return c;
+jump_over:
+	switch (c) {
+	case ZDLE:
+		break;
+	case XON:
+	case (XON|0200):
+	case XOFF:
+	case (XOFF|0200):
+		goto again;
+	default:
+		if (Zctlesc && !(c & 0140)) {
+			goto again;
+		}
+		return c;
+	}
+again2:
+	if ((c = READLINE_PF(Rxtimeout)) < 0)
+		return c;
+	if (c == CAN && (c = READLINE_PF(Rxtimeout)) < 0)
+		return c;
+	if (c == CAN && (c = READLINE_PF(Rxtimeout)) < 0)
+		return c;
+	if (c == CAN && (c = READLINE_PF(Rxtimeout)) < 0)
+		return c;
+	switch (c) {
+	case CAN:
+		return GOTCAN;
+	case ZCRCE:
+	case ZCRCG:
+	case ZCRCQ:
+	case ZCRCW:
+		return (c | GOTOR);
+	case ZRUB0:
+		return 0177;
+	case ZRUB1:
+		return 0377;
+	case XON:
+	case (XON|0200):
+	case XOFF:
+	case (XOFF|0200):
+		goto again2;
+	default:
+		if (Zctlesc && ! (c & 0140)) {
+			goto again2;
+		}
+		if ((c & 0140) ==  0100)
+			return (c ^ 0100);
+		break;
+	}
+	VPRINTF(2,(_("Bad escape sequence %x"), c));
+	return ERROR;
+}
+
+
+
+/*
+ * Send character c with ZMODEM escape sequence encoding.
+ *  Escape XON, XOFF. Escape CR following @ (Telenet net escape)
+ */
+inline void 
+zsendline(int c)
+{
+
+	switch(zsendline_tab[(unsigned) (c&=0377)])
+	{
+	case 0: 
+		xsendline(lastsent = c); 
+		break;
+	case 1:
+		xsendline(ZDLE);
+		c ^= 0100;
+		xsendline(lastsent = c);
+		break;
+	case 2:
+		if ((lastsent & 0177) != '@') {
+			xsendline(lastsent = c);
+		} else {
+			xsendline(ZDLE);
+			c ^= 0100;
+			xsendline(lastsent = c);
+		}
+		break;
+	}
+}
+
+static inline void 
+zsendline_s(const char *s, size_t count) 
+{
+	const char *end=s+count;
+	while(s!=end) {
+		int last_esc=0;
+		const char *t=s;
+		while (t!=end) {
+			last_esc=zsendline_tab[(unsigned) ((*t) & 0377)];
+			if (last_esc) 
+				break;
+			t++;
+		}
+		if (t!=s) {
+			//fwrite(s,(size_t)(t-s),1,stdout);
+			send_data(1, s, t-s);
+			lastsent=t[-1];
+			s=t;
+		}
+		if (last_esc) {
+			int c=*s;
+			switch(last_esc) {
+			case 0: 
+				xsendline(lastsent = c); 
+				break;
+			case 1:
+				xsendline(ZDLE);
+				c ^= 0100;
+				xsendline(lastsent = c);
+				break;
+			case 2:
+				if ((lastsent & 0177) != '@') {
+					xsendline(lastsent = c);
+				} else {
+					xsendline(ZDLE);
+					c ^= 0100;
+					xsendline(lastsent = c);
+				}
+				break;
+			}
+			s++;
+		}
+	}
+}
+
+
+/* Send ZMODEM binary header hdr of type type */
+void 
+zsbhdr(int type, char *hdr)
+{
+	register int n;
+	register unsigned short crc;
+
+	VPRINTF(3,("zsbhdr: %s %lx", frametypes[type+FTOFFSET], rclhdr(hdr)));
+	if (type == ZDATA)
+		for (n = Znulls; --n >=0; )
+			xsendline(0);
+
+	xsendline(ZPAD); xsendline(ZDLE);
+
+	Crc32t=Txfcs32;
+	if (Crc32t)
+		zsbh32(hdr, type);
+	else {
+		xsendline(ZBIN); zsendline(type); crc = updcrc(type, 0);
+
+		for (n=4; --n >= 0; ++hdr) {
+			zsendline(*hdr);
+			crc = updcrc((0377& *hdr), crc);
+		}
+		crc = updcrc(0,updcrc(0,crc));
+		zsendline(crc>>8);
+		zsendline(crc);
+	}
+	if (type != ZDATA)
+		flushmo();
+}
+
+
+/* Send ZMODEM binary header hdr of type type */
+static void
+zsbh32(char *hdr, int type)
+{
+	register int n;
+	register unsigned long crc;
+
+	xsendline(ZBIN32);  zsendline(type);
+	crc = 0xFFFFFFFFL; crc = UPDC32(type, crc);
+
+	for (n=4; --n >= 0; ++hdr) {
+		crc = UPDC32((0377 & *hdr), crc);
+		zsendline(*hdr);
+	}
+	crc = ~crc;
+	for (n=4; --n >= 0;) {
+		zsendline((int)crc);
+		crc >>= 8;
+	}
+}
+
+/* Send ZMODEM HEX header hdr of type type */
+void 
+zshhdr(int type, char *hdr)
+{
+	register int n;
+	register unsigned short crc;
+	char s[30];
+	size_t len;
+
+	VPRINTF(3,("zshhdr: %s %lx", frametypes[(type & 0x7f)+FTOFFSET], rclhdr(hdr)));
+	s[0]=ZPAD;
+	s[1]=ZPAD;
+	s[2]=ZDLE;
+	s[3]=ZHEX;
+	zputhex(type & 0x7f ,s+4);
+	len=6;
+	Crc32t = 0;
+
+	crc = updcrc((type & 0x7f), 0);
+	for (n=4; --n >= 0; ++hdr) {
+		zputhex(*hdr,s+len); 
+		len += 2;
+		crc = updcrc((0377 & *hdr), crc);
+	}
+	crc = updcrc(0,updcrc(0,crc));
+	zputhex(crc>>8,s+len); 
+	zputhex(crc,s+len+2);
+	len+=4;
+
+	/* Make it printable on remote machine */
+	s[len++]=015;
+	s[len++]=0212;
+	/*
+	 * Uncork the remote in case a fake XOFF has stopped data flow
+	 */
+	if (type != ZFIN && type != ZACK)
+	{
+		s[len++]=021;
+	}
+	flushmo();
+	send_data(1,s,len);
+}
+
+/*
+ * Send binary array buf of length length, with ending ZDLE sequence frameend
+ */
+static const char *Zendnames[] = { "ZCRCE", "ZCRCG", "ZCRCQ", "ZCRCW"};
+void 
+zsdata(const char *buf, size_t length, int frameend)
+{
+	register unsigned short crc;
+
+	VPRINTF(3,("zsdata: %lu %s", (unsigned long) length, 
+		Zendnames[(frameend-ZCRCE)&3]));
+	crc = 0;
+	do {
+		zsendline(*buf); crc = updcrc((0377 & *buf), crc);
+		buf++;
+	} while (--length>0);
+	xsendline(ZDLE); xsendline(frameend);
+	crc = updcrc(frameend, crc);
+
+	crc = updcrc(0,updcrc(0,crc));
+	zsendline(crc>>8); zsendline(crc);
+	if (frameend == ZCRCW) {
+		xsendline(XON);  flushmo();
+	}
+}
+
+void
+zsda32(const char *buf, size_t length, int frameend)
+{
+	int c;
+	unsigned long crc;
+	int i;
+	VPRINTF(3,("zsdat32: %d %s", length, Zendnames[(frameend-ZCRCE)&3]));
+
+	crc = 0xFFFFFFFFL;
+	zsendline_s(buf,length);
+	for (; length; length--) {
+		c = *buf & 0377;
+		crc = UPDC32(c, crc);
+		buf++;
+	}
+	xsendline(ZDLE); xsendline(frameend);
+	crc = UPDC32(frameend, crc);
+
+	crc = ~crc;
+	for (i=4; --i >= 0;) {
+		c=(int) crc;
+		if (c & 0140)
+			xsendline(lastsent = c);
+		else
+			zsendline(c);
+		crc >>= 8;
+	}
+	if (frameend == ZCRCW) {
+		xsendline(XON);  flushmo();
+	}
+}
+
+#if __GNUC__ < 2 || (__GNUC__ == 2 && __GNUC_MINOR__ <= 4)
+#  undef DEBUG_BLOCKSIZE
+#endif
+
+#ifdef DEBUG_BLOCKSIZE
+struct debug_blocksize {
+	int size;
+	long count;
+};
+struct debug_blocksize blocksizes[]={
+	{32,0},
+	{64,0},
+	{128,0},
+	{256,0},
+	{512,0},
+	{1024,0},
+	{2048,0},
+	{4096,0},
+	{8192,0},
+	{0,0}
+};
+static inline void
+count_blk(int size)
+{
+	int i;
+	for (i=0;blocksizes[i].size;i++) {
+		if (blocksizes[i].size==size) {
+			blocksizes[i].count++;
+			return;
+		}
+	}
+	blocksizes[i].count++;
+}
+
+static void printout_blocksizes(void) __attribute__((__destructor__));
+static void 
+printout_blocksizes(void) 
+{
+	int i;
+	for (i=0;blocksizes[i].size;i++) {
+		if (blocksizes[i].count) {
+			lsyslog(LOG_DEBUG,"%4d byte: %ld blocks\n",
+				   blocksizes[i].size,blocksizes[i].count);
+		}
+	}
+	if (blocksizes[i].count) {
+		lsyslog(LOG_DEBUG,"unk. byte: %ld blocks",
+			   blocksizes[i].count);
+	}
+}
+#define COUNT_BLK(x) count_blk(x)
+#else
+#define COUNT_BLK(x)
+#endif
+
+/*
+ * Receive array buf of max length with ending ZDLE sequence
+ *  and CRC.  Returns the ending character or error code.
+ *  NB: On errors may store length+1 bytes!
+ */
+int
+zrdata(char *buf, int length, size_t *bytes_received)
+{
+	register int c;
+	register unsigned short crc;
+	register char *end;
+	register int d;
+
+	*bytes_received=0;
+	if (Rxframeind == ZBIN32)
+		return zrdat32(buf, length, bytes_received);
+
+	crc = 0;  end = buf + length;
+	while (buf <= end) {
+		if ((c = zdlread()) & ~0377) {
+crcfoo:
+			switch (c) {
+			case GOTCRCE:
+			case GOTCRCG:
+			case GOTCRCQ:
+			case GOTCRCW:
+				{ 
+					d = c;
+					c &= 0377;
+					crc = updcrc(c, crc);
+					if ((c = zdlread()) & ~0377)
+						goto crcfoo;
+					crc = updcrc(c, crc);
+					if ((c = zdlread()) & ~0377)
+						goto crcfoo;
+					crc = updcrc(c, crc);
+					if (crc & 0xFFFF) {
+						zperr(badcrc);
+						return ERROR;
+					}
+					*bytes_received = length - (end - buf);
+					COUNT_BLK(*bytes_received);
+					VPRINTF(3,("zrdata: %lu  %s", (unsigned long) (*bytes_received), 
+							Zendnames[(d-GOTCRCE)&3]));
+					return d;
+				}
+			case GOTCAN:
+				zperr(_("Sender Canceled"));
+				return ZCAN;
+			case TIMEOUT:
+				zperr(_("TIMEOUT"));
+				return c;
+			default:
+				zperr(_("Bad data subpacket"));
+				return c;
+			}
+		}
+		*buf++ = c;
+		crc = updcrc(c, crc);
+	}
+	zperr(_("Data subpacket too long"));
+	return ERROR;
+}
+
+static int
+zrdat32(char *buf, int length, size_t *bytes_received)
+{
+	register int c;
+	register unsigned long crc;
+	register char *end;
+	register int d;
+
+	crc = 0xFFFFFFFFL;  end = buf + length;
+	while (buf <= end) {
+		if ((c = zdlread()) & ~0377) {
+crcfoo:
+			switch (c) {
+			case GOTCRCE:
+			case GOTCRCG:
+			case GOTCRCQ:
+			case GOTCRCW:
+				d = c;
+				c &= 0377;
+				crc = UPDC32(c, crc);
+				if ((c = zdlread()) & ~0377)
+					goto crcfoo;
+				crc = UPDC32(c, crc);
+				if ((c = zdlread()) & ~0377)
+					goto crcfoo;
+				crc = UPDC32(c, crc);
+				if ((c = zdlread()) & ~0377)
+					goto crcfoo;
+				crc = UPDC32(c, crc);
+				if ((c = zdlread()) & ~0377)
+					goto crcfoo;
+				crc = UPDC32(c, crc);
+				if (crc != 0xDEBB20E3) {
+					zperr(badcrc);
+					return ERROR;
+				}
+				*bytes_received = length - (end - buf);
+				COUNT_BLK(*bytes_received);
+				VPRINTF(3,("zrdat32: %lu %s", (unsigned long) *bytes_received, 
+					Zendnames[(d-GOTCRCE)&3]));
+				return d;
+			case GOTCAN:
+				zperr(_("Sender Canceled"));
+				return ZCAN;
+			case TIMEOUT:
+				zperr(_("TIMEOUT"));
+				return c;
+			default:
+				zperr(_("Bad data subpacket"));
+				return c;
+			}
+		}
+		*buf++ = c;
+		crc = UPDC32(c, crc);
+	}
+	zperr(_("Data subpacket too long"));
+	return ERROR;
+}
+
+/*
+ * Read a ZMODEM header to hdr, either binary or hex.
+ *  eflag controls local display of non zmodem characters:
+ *	0:  no display
+ *	1:  display printing characters only
+ *	2:  display all non ZMODEM characters
+ *  On success, set Zmodem to 1, set Rxpos and return type of header.
+ *   Otherwise return negative on error.
+ *   Return ERROR instantly if ZCRCW sequence, for fast error recovery.
+ */
+int
+zgethdr(char *hdr, int eflag, size_t *Rxpos)
+{
+	register int c, cancount;
+	unsigned int max_garbage; /* Max bytes before start of frame */
+	size_t rxpos=0; /* keep gcc happy */
+
+	max_garbage = Zrwindow + Baudrate;
+	Rxframeind = Rxtype = 0;
+
+startover:
+	cancount = 5;
+again:
+	/* Return immediate ERROR if ZCRCW sequence seen */
+	switch (c = READLINE_PF(Rxtimeout)) {
+	case RCDO:
+	case TIMEOUT:
+		goto fifi;
+	case CAN:
+gotcan:
+		if (--cancount <= 0) {
+			c = ZCAN; goto fifi;
+		}
+		switch (c = READLINE_PF(1)) {
+		case TIMEOUT:
+			goto again;
+		case ZCRCW:
+			c = ERROR;
+		/* **** FALL THRU TO **** */
+		case RCDO:
+			goto fifi;
+		default:
+			break;
+		case CAN:
+			if (--cancount <= 0) {
+				c = ZCAN; goto fifi;
+			}
+			goto again;
+		}
+	/* **** FALL THRU TO **** */
+	default:
+agn2:
+		if ( --max_garbage == 0) {
+			zperr(_("Garbage count exceeded"));
+			return(ERROR);
+		}
+		//if (eflag && ((c &= 0177) & 0140) && Verbose)
+		//	vchar(c);
+		//else if (eflag > 1 && Verbose)
+		//	vchar(c);
+		goto startover;
+	case ZPAD|0200:		/* This is what we want. */
+	case ZPAD:		/* This is what we want. */
+		break;
+	}
+	cancount = 5;
+splat:
+	switch (c = noxrd7()) {
+	case ZPAD:
+		goto splat;
+	case RCDO:
+	case TIMEOUT:
+		goto fifi;
+	default:
+		goto agn2;
+	case ZDLE:		/* This is what we want. */
+		break;
+	}
+
+	switch (c = noxrd7()) {
+	case RCDO:
+	case TIMEOUT:
+		goto fifi;
+	case ZBIN:
+		Rxframeind = ZBIN;  Crc32 = FALSE;
+		c =  zrbhdr(hdr);
+		break;
+	case ZBIN32:
+		Crc32 = Rxframeind = ZBIN32;
+		c =  zrbhdr32(hdr);
+		break;
+	case ZHEX:
+		Rxframeind = ZHEX;  Crc32 = FALSE;
+		c =  zrhhdr(hdr);
+		break;
+	case CAN:
+		goto gotcan;
+	default:
+		goto agn2;
+	}
+	rxpos = hdr[ZP3] & 0377;
+	rxpos = (rxpos<<8) + (hdr[ZP2] & 0377);
+	rxpos = (rxpos<<8) + (hdr[ZP1] & 0377);
+	rxpos = (rxpos<<8) + (hdr[ZP0] & 0377);
+fifi:
+	switch (c) {
+	case GOTCAN:
+		c = ZCAN;
+	/* **** FALL THRU TO **** */
+	case ZNAK:
+	case ZCAN:
+	case ERROR:
+	case TIMEOUT:
+	case RCDO:
+		zperr(_("Got %s"), frametypes[c+FTOFFSET]);
+	/* **** FALL THRU TO **** */
+	default:
+		if (c >= -3 && c <= FRTYPES)
+			VPRINTF(3,("zgethdr: %s %lx", frametypes[c+FTOFFSET], (unsigned long) rxpos));
+		else
+			VPRINTF(3,("zgethdr: %d %lx", c, (unsigned long) rxpos));
+	}
+	if (Rxpos)
+		*Rxpos=rxpos;
+	return c;
+}
+
+/* Receive a binary style header (type and position) */
+static int 
+zrbhdr(char *hdr)
+{
+	register int c, n;
+	register unsigned short crc;
+
+	if ((c = zdlread()) & ~0377)
+		return c;
+	Rxtype = c;
+	crc = updcrc(c, 0);
+
+	for (n=4; --n >= 0; ++hdr) {
+		if ((c = zdlread()) & ~0377)
+			return c;
+		crc = updcrc(c, crc);
+		*hdr = c;
+	}
+	if ((c = zdlread()) & ~0377)
+		return c;
+	crc = updcrc(c, crc);
+	if ((c = zdlread()) & ~0377)
+		return c;
+	crc = updcrc(c, crc);
+	if (crc & 0xFFFF) {
+		zperr(badcrc); 
+		return ERROR;
+	}
+	protocol = ZM_ZMODEM;
+	zmodem_requested=TRUE;
+	return Rxtype;
+}
+
+/* Receive a binary style header (type and position) with 32 bit FCS */
+static int
+zrbhdr32(char *hdr)
+{
+	register int c, n;
+	register unsigned long crc;
+
+	if ((c = zdlread()) & ~0377)
+		return c;
+	Rxtype = c;
+	crc = 0xFFFFFFFFL; crc = UPDC32(c, crc);
+#ifdef DEBUGZ
+	VPRINTF(3,("zrbhdr32 c=%X  crc=%lX", c, crc)i);
+#endif
+
+	for (n=4; --n >= 0; ++hdr) {
+		if ((c = zdlread()) & ~0377)
+			return c;
+		crc = UPDC32(c, crc);
+		*hdr = c;
+#ifdef DEBUGZ
+		VPRINTF(3,("zrbhdr32 c=%X  crc=%lX", c, crc));
+#endif
+	}
+	for (n=4; --n >= 0;) {
+		if ((c = zdlread()) & ~0377)
+			return c;
+		crc = UPDC32(c, crc);
+#ifdef DEBUGZ
+		VPRINTF(3,("zrbhdr32 c=%X  crc=%lX", c, crc));
+#endif
+	}
+	if (crc != 0xDEBB20E3) {
+		zperr(badcrc);
+		return ERROR;
+	}
+	protocol = ZM_ZMODEM;
+	zmodem_requested=TRUE;
+	return Rxtype;
+}
+
+
+/* Receive a hex style header (type and position) */
+static int 
+zrhhdr(char *hdr)
+{
+	register int c;
+	register unsigned short crc;
+	register int n;
+
+	if ((c = zgethex()) < 0)
+		return c;
+	Rxtype = c;
+	crc = updcrc(c, 0);
+
+	for (n=4; --n >= 0; ++hdr) {
+		if ((c = zgethex()) < 0)
+			return c;
+		crc = updcrc(c, crc);
+		*hdr = c;
+	}
+	if ((c = zgethex()) < 0)
+		return c;
+	crc = updcrc(c, crc);
+	if ((c = zgethex()) < 0)
+		return c;
+	crc = updcrc(c, crc);
+	if (crc & 0xFFFF) {
+		zperr(badcrc); return ERROR;
+	}
+	switch ( c = READLINE_PF(1)) {
+	case 0215:
+		/* **** FALL THRU TO **** */
+	case 015:
+	 	/* Throw away possible cr/lf */
+		READLINE_PF(1);
+		break;
+	}
+	protocol = ZM_ZMODEM;
+	zmodem_requested=TRUE;
+	return Rxtype;
+}
+
+/* Write a byte as two hex digits */
+static void 
+zputhex(int c, char *pos)
+{
+	static char	digits[]	= "0123456789abcdef";
+
+	VPRINTF(9,("zputhex: %02X", c));
+	pos[0]=digits[(c&0xF0)>>4];
+	pos[1]=digits[c&0x0F];
+}
+
+void
+zsendline_init(void)
+{
+	int i;
+	for (i=0;i<256;i++) {	
+		if (i & 0140)
+			zsendline_tab[i]=0;
+		else {
+			switch(i)
+			{
+			case ZDLE:
+			case XOFF: /* ^Q */
+			case XON: /* ^S */
+			case (XOFF | 0200):
+			case (XON | 0200):
+				zsendline_tab[i]=1;
+				break;
+			case 020: /* ^P */
+			case 0220:
+				if (turbo_escape)
+					zsendline_tab[i]=0;
+				else
+					zsendline_tab[i]=1;
+				break;
+			case 015:
+			case 0215:
+				if (Zctlesc)
+					zsendline_tab[i]=1;
+				else if (!turbo_escape)
+					zsendline_tab[i]=2;
+				else 
+					zsendline_tab[i]=0;
+				break;
+			default:
+				if (Zctlesc)
+					zsendline_tab[i]=1;
+				else
+					zsendline_tab[i]=0;
+			}
+		}
+	}
+}
+
+
+
+/* Store pos in Txhdr */
+void 
+stohdr(size_t pos)
+{
+	long lpos=(long) pos;
+	Txhdr[ZP0] = lpos;
+	Txhdr[ZP1] = lpos>>8;
+	Txhdr[ZP2] = lpos>>16;
+	Txhdr[ZP3] = lpos>>24;
+}
+
+/* Recover a long integer from a header */
+long
+rclhdr(char *hdr)
+{
+	long l;
+
+	l = (hdr[ZP3] & 0377);
+	l = (l << 8) | (hdr[ZP2] & 0377);
+	l = (l << 8) | (hdr[ZP1] & 0377);
+	l = (l << 8) | (hdr[ZP0] & 0377);
+	return l;
+}
+
+/* End of zm.c */
diff --git a/common/zmodem.h b/common/zmodem.h
new file mode 100644
index 0000000000..01c9b2ef6a
--- /dev/null
+++ b/common/zmodem.h
@@ -0,0 +1,142 @@
+/* zmodem.h - ZMODEM protocol constants
+
+  Copyright (C) until 1998 Chuck Forsberg (OMEN Technology Inc)
+  Copyright (C) 1996, 1997 Uwe Ohse
+
+  This program is free software; you can redistribute it and/or modify
+  it under the terms of the GNU General Public License as published by
+  the Free Software Foundation; either version 2, or (at your option)
+  any later version.
+
+  This program is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+  GNU General Public License for more details.
+
+  You should have received a copy of the GNU General Public License
+  along with this program; if not, write to the Free Software
+  Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+  02111-1307, USA.
+
+ *    05-23-87  Chuck Forsberg Omen Technology Inc
+*/
+#define ZPAD '*'	/* 052 Padding character begins frames */
+#define ZDLE 030	/* Ctrl-X Zmodem escape - `ala BISYNC DLE */
+#define ZDLEE (ZDLE^0100)	/* Escaped ZDLE as transmitted */
+#define ZBIN 'A'	/* Binary frame indicator */
+#define ZHEX 'B'	/* HEX frame indicator */
+#define ZBIN32 'C'	/* Binary frame with 32 bit FCS */
+
+/* Frame types (see array "frametypes" in zm.c) */
+#define ZRQINIT	0	/* Request receive init */
+#define ZRINIT	1	/* Receive init */
+#define ZSINIT 2	/* Send init sequence (optional) */
+#define ZACK 3		/* ACK to above */
+#define ZFILE 4		/* File name from sender */
+#define ZSKIP 5		/* To sender: skip this file */
+#define ZNAK 6		/* Last packet was garbled */
+#define ZABORT 7	/* Abort batch transfers */
+#define ZFIN 8		/* Finish session */
+#define ZRPOS 9		/* Resume data trans at this position */
+#define ZDATA 10	/* Data packet(s) follow */
+#define ZEOF 11		/* End of file */
+#define ZFERR 12	/* Fatal Read or Write error Detected */
+#define ZCRC 13		/* Request for file CRC and response */
+#define ZCHALLENGE 14	/* Receiver's Challenge */
+#define ZCOMPL 15	/* Request is complete */
+#define ZCAN 16		/* Other end canned session with CAN*5 */
+#define ZFREECNT 17	/* Request for free bytes on filesystem */
+#define ZCOMMAND 18	/* Command from sending program */
+#define ZSTDERR 19	/* Output to standard error, data follows */
+
+/* ZDLE sequences */
+#define ZCRCE 'h'	/* CRC next, frame ends, header packet follows */
+#define ZCRCG 'i'	/* CRC next, frame continues nonstop */
+#define ZCRCQ 'j'	/* CRC next, frame continues, ZACK expected */
+#define ZCRCW 'k'	/* CRC next, ZACK expected, end of frame */
+#define ZRUB0 'l'	/* Translate to rubout 0177 */
+#define ZRUB1 'm'	/* Translate to rubout 0377 */
+
+/* zdlread return values (internal) */
+/* -1 is general error, -2 is timeout */
+#define GOTOR 0400
+#define GOTCRCE (ZCRCE|GOTOR)	/* ZDLE-ZCRCE received */
+#define GOTCRCG (ZCRCG|GOTOR)	/* ZDLE-ZCRCG received */
+#define GOTCRCQ (ZCRCQ|GOTOR)	/* ZDLE-ZCRCQ received */
+#define GOTCRCW (ZCRCW|GOTOR)	/* ZDLE-ZCRCW received */
+#define GOTCAN	(GOTOR|030)	/* CAN*5 seen */
+
+/* Byte positions within header array */
+#define ZF0	3	/* First flags byte */
+#define ZF1	2
+#define ZF2	1
+#define ZF3	0
+#define ZP0	0	/* Low order 8 bits of position */
+#define ZP1	1
+#define ZP2	2
+#define ZP3	3	/* High order 8 bits of file position */
+
+/* Bit Masks for ZRINIT flags byte ZF0 */
+#define CANFDX	0x01	/* Rx can send and receive true FDX */
+#define CANOVIO	0x02	/* Rx can receive data during disk I/O */
+#define CANBRK	0x04	/* Rx can send a break signal */
+#define CANCRY	0x08	/* Receiver can decrypt */
+#define CANLZW	0x10	/* Receiver can uncompress */
+#define CANFC32	0x20	/* Receiver can use 32 bit Frame Check */
+#define ESCCTL  0x40	/* Receiver expects ctl chars to be escaped */
+#define ESC8    0x80	/* Receiver expects 8th bit to be escaped */
+/* Bit Masks for ZRINIT flags byze ZF1 */
+#define ZF1_CANVHDR  0x01  /* Variable headers OK, unused in lrzsz */
+#define ZF1_TIMESYNC 0x02 /* nonstandard, Receiver request timesync */
+
+/* Parameters for ZSINIT frame */
+#define ZATTNLEN 32	/* Max length of attention string */
+/* Bit Masks for ZSINIT flags byte ZF0 */
+#define TESCCTL 0100	/* Transmitter expects ctl chars to be escaped */
+#define TESC8   0200	/* Transmitter expects 8th bit to be escaped */
+
+/* Parameters for ZFILE frame */
+/* Conversion options one of these in ZF0 */
+#define ZCBIN	1	/* Binary transfer - inhibit conversion */
+#define ZCNL	2	/* Convert NL to local end of line convention */
+#define ZCRESUM	3	/* Resume interrupted file transfer */
+/* Management include options, one of these ored in ZF1 */
+#define ZF1_ZMSKNOLOC   0x80 /* Skip file if not present at rx */
+/* Management options, one of these ored in ZF1 */
+#define ZF1_ZMMASK	    0x1f /* Mask for the choices below */
+#define ZF1_ZMNEWL         1 /* Transfer if source newer or longer */
+#define ZF1_ZMCRC          2 /* Transfer if different file CRC or length */
+#define ZF1_ZMAPND         3 /* Append contents to existing file (if any) */
+#define ZF1_ZMCLOB         4 /* Replace existing file */
+#define ZF1_ZMNEW          5 /* Transfer if source newer */
+	/* Number 5 is alive ... */
+#define ZF1_ZMDIFF         6 /* Transfer if dates or lengths different */
+#define ZF1_ZMPROT         7 /* Protect destination file */
+#define ZF1_ZMCHNG         8 /* Change filename if destination exists */
+
+/* Transport options, one of these in ZF2 */
+#define ZTLZW	1	/* Lempel-Ziv compression */
+#define ZTCRYPT	2	/* Encryption */
+#define ZTRLE	3	/* Run Length encoding */
+/* Extended options for ZF3, bit encoded */
+#define ZXSPARS	64	/* Encoding for sparse file operations */
+
+/* Parameters for ZCOMMAND frame ZF0 (otherwise 0) */
+#define ZCACK1	1	/* Acknowledge, then do command */
+
+/* Globals used by ZMODEM functions */
+#if 0
+extern int Rxframeind;	/* ZBIN ZBIN32, or ZHEX type of frame received */
+extern int Rxtype;		/* Type of header received */
+extern int Zrwindow;	/* RX window size (controls garbage count) */
+extern char Rxhdr[4];	/* Received header */
+extern char Txhdr[4];	/* Transmitted header */
+extern long Txpos;	/* Transmitted file position */
+extern int Txfcs32;		/* TURE means send binary frames with 32 bit FCS */
+extern int Crc32t;		/* Display flag indicating 32 bit CRC being sent */
+extern int Crc32;		/* Display flag indicating 32 bit CRC being received */
+extern int Znulls;		/* Number of nulls to send at beginning of ZDATA hdr */
+extern char Attn[ZATTNLEN+1];	/* Attention string rx sends to tx on err */
+#endif
+
+/* End of ZMODEM.H */
diff --git a/common/zreadline.c b/common/zreadline.c
new file mode 100644
index 0000000000..01295eb489
--- /dev/null
+++ b/common/zreadline.c
@@ -0,0 +1,136 @@
+/*
+  zreadline.c - line reading stuff for lrzsz
+  Copyright (C) until 1998 Chuck Forsberg (OMEN Technology Inc)
+  Copyright (C) 1994 Matt Porter
+  Copyright (C) 1996, 1997 Uwe Ohse
+
+  This program is free software; you can redistribute it and/or modify
+  it under the terms of the GNU General Public License as published by
+  the Free Software Foundation; either version 2, or (at your option)
+  any later version.
+
+  This program is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+  GNU General Public License for more details.
+
+  You should have received a copy of the GNU General Public License
+  along with this program; if not, write to the Free Software
+  Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+  02111-1307, USA.
+
+  originally written by Chuck Forsberg
+*/
+/* once part of lrz.c, taken out to be useful to lsz.c too */
+
+#include "zglobal.h"
+
+#include <stdlib.h>
+#include <stdio.h>
+//#include <signal.h>
+//#include <ctype.h>
+#include <errno.h>
+
+//#include "error.h"
+
+
+/* Ward Christensen / CP/M parameters - Don't change these! */
+#define TIMEOUT (-2)
+
+static size_t readline_readnum;
+static int readline_fd;
+static char *readline_buffer;
+int readline_left=0;
+char *readline_ptr;
+
+static RETSIGTYPE
+zreadline_alarm_handler(int dummy LRZSZ_ATTRIB_UNUSED)
+{
+	/* doesn't need to do anything */
+}
+
+/*
+ * This version of readline is reasonably well suited for
+ * reading many characters.
+ *
+ * timeout is in tenths of seconds
+ */
+int 
+readline_internal(unsigned int timeout)
+{
+	unsigned int n=0;
+
+	if (!no_timeout)
+	{
+		n = timeout/10;
+		if (n < 2 && timeout!=1)
+			n = 3;
+		else if (n==0)
+			n=1;
+		if (Verbose > 5)
+			vstringf("Calling read: alarm=%d  Readnum=%d ",
+			  n, readline_readnum);
+		//signal(SIGALRM, zreadline_alarm_handler); 
+		//alarm(n);
+	}
+	else if (Verbose > 5)
+		vstringf("Calling read: Readnum=%d ",
+		  readline_readnum);
+
+	readline_ptr=readline_buffer;
+	readline_left=read_data(n*10, readline_ptr, readline_readnum);
+	if (!no_timeout)
+		;//alarm(0);
+	if (readline_left>0 && bytes_per_error) {
+		static long ct=0;
+		static int mod=1;
+		ct+=readline_left;
+		while (ct>bytes_per_error) {
+			readline_ptr[ct % bytes_per_error]^=mod;
+			ct-=bytes_per_error;
+			mod++;
+			if (mod==256)
+				mod=1;
+		}
+	}
+	if (Verbose > 5) {
+		vstringf("Read returned %d bytes\n", readline_left);
+		//if (readline_left==-1)
+		//	vstringf("errno=%d:%s\n", errno,strerror(errno));
+		if (Verbose > 9 && readline_left>0) {
+			int i,j;
+			j=readline_left > 48 ? 48 : readline_left;
+			vstring("    ");
+			for (i=0;i<j;i++) {
+				if (i%24==0 && i)
+					vstring("\n    ");
+				vstringf("%02x ", readline_ptr[i] & 0377);
+			}
+			vstringf("\n");
+		}
+	}
+	if (readline_left < 1)
+		return TIMEOUT;
+	--readline_left;
+	return (*readline_ptr++ & 0377);
+}
+
+
+
+void
+readline_setup(int fd, size_t readnum, size_t bufsize)
+{
+	readline_fd=fd;
+	readline_readnum=readnum;
+	readline_buffer=malloc(bufsize > readnum ? bufsize : readnum);
+	//if (!readline_buffer)
+	//	error(1,0,_("out of memory"));
+}
+
+void
+readline_purge(void)
+{
+	readline_left=0;
+	return;
+}
+

commit 4eeb432bab34bff657f77b5c7d5797c3ec92c7ef
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Sep 9 11:49:55 2021 +0800

    rockchip: rk3308: dm scan sub nodes
    
    In order to get "reboot-mode" node.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I985bb065649465329554d6043e315d6a5a7c25eb

diff --git a/arch/arm/mach-rockchip/rk3308/syscon_rk3308.c b/arch/arm/mach-rockchip/rk3308/syscon_rk3308.c
index 109fcacd4b..c4027dba37 100644
--- a/arch/arm/mach-rockchip/rk3308/syscon_rk3308.c
+++ b/arch/arm/mach-rockchip/rk3308/syscon_rk3308.c
@@ -18,4 +18,7 @@ U_BOOT_DRIVER(syscon_rk3308) = {
 	.name = "rk3308_syscon",
 	.id = UCLASS_SYSCON,
 	.of_match = rk3308_syscon_ids,
+#if !defined(CONFIG_SPL_BUILD) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+	.bind = dm_scan_fdt_dev,
+#endif
 };

commit e2c76fb6b0f89c5385273b3a83fbd2ce16903396
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Mon Sep 13 15:51:41 2021 +0800

    rockchip: atags: add boot type for sata and pcie
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: I83fe8fef7f542d91787c3db82a94785390fa88cd

diff --git a/arch/arm/include/asm/arch-rockchip/rk_atags.h b/arch/arm/include/asm/arch-rockchip/rk_atags.h
index ab40702b16..591f0cdb07 100644
--- a/arch/arm/include/asm/arch-rockchip/rk_atags.h
+++ b/arch/arm/include/asm/arch-rockchip/rk_atags.h
@@ -44,6 +44,8 @@
 #define BOOT_TYPE_MTD_BLK_NAND	(1 << 7)
 #define BOOT_TYPE_MTD_BLK_SPI_NAND	(1 << 8)
 #define BOOT_TYPE_MTD_BLK_SPI_NOR	(1 << 9)
+#define BOOT_TYPE_SATA		(1 << 10)
+#define BOOT_TYPE_PCIE		(1 << 11)
 
 /* define sd card function */
 #define SD_UNKNOWN_CARD		0

commit 6b6b8331fb2f1eaf3dbddf9b0a8a4c0b407aeca3
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Tue Sep 7 11:19:32 2021 +0800

    video/drm: add config for drm memory reserved
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: I43e21a4fd57f93953af9cad9fd1cdca2f259eae3

diff --git a/drivers/video/drm/Kconfig b/drivers/video/drm/Kconfig
index abcbe82339..4e1d9288d4 100644
--- a/drivers/video/drm/Kconfig
+++ b/drivers/video/drm/Kconfig
@@ -11,6 +11,11 @@ menuconfig DRM_ROCKCHIP
 	  This driver supports the on-chip video output device, and targets the
 	  Rockchip RK3288 and RK3399.
 
+config DRM_MEM_RESERVED_SIZE_MBYTES
+	int "Size in Mega Bytes"
+	depends on DRM_ROCKCHIP
+	default 32
+
 config DRM_DP_HELPER
 	bool
 	depends on DRM_ROCKCHIP
diff --git a/include/video_rockchip.h b/include/video_rockchip.h
index bb6c34bbf7..02a6178ff6 100644
--- a/include/video_rockchip.h
+++ b/include/video_rockchip.h
@@ -17,7 +17,7 @@
  #define DRM_ROCKCHIP_FB_BPP		VIDEO_BPP32
 #endif
 
-#define MEMORY_POOL_SIZE	32 * 1024 * 1024
+#define MEMORY_POOL_SIZE	CONFIG_DRM_MEM_RESERVED_SIZE_MBYTES * 1024 * 1024
 #define DRM_ROCKCHIP_FB_SIZE \
 	VNBYTES(DRM_ROCKCHIP_FB_BPP) * DRM_ROCKCHIP_FB_WIDTH * DRM_ROCKCHIP_FB_HEIGHT
 

commit 963b371c477ef8f5a8345187021a31fe74abfa15
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Wed Sep 8 14:18:48 2021 +0800

    video/drm: rgb: add data bypass for rgb output
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: I2ee4c9443e2e5146413b16f262b7beb232ed1314

diff --git a/drivers/video/drm/rockchip_rgb.c b/drivers/video/drm/rockchip_rgb.c
index a5af15c976..4877ad0d6f 100644
--- a/drivers/video/drm/rockchip_rgb.c
+++ b/drivers/video/drm/rockchip_rgb.c
@@ -282,7 +282,7 @@ static const struct rockchip_connector rk3368_rgb_driver_data = {
 
 static void rk3568_rgb_prepare(struct rockchip_rgb *rgb, int pipe)
 {
-	regmap_write(rgb->grf, RK3568_GRF_VO_CON1, RK3568_RGB_DATA_BYPASS(0));
+	regmap_write(rgb->grf, RK3568_GRF_VO_CON1, RK3568_RGB_DATA_BYPASS(rgb->data_sync_bypass));
 }
 
 static const struct rockchip_rgb_funcs rk3568_rgb_funcs = {

commit 9f415b5978eb88cda405d1763ffbc36b69431131
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Sep 15 15:56:57 2021 +0800

    video/drm: analogix_dp: Fix display corruption in low temperature environment
    
    Change-Id: I2b2bbbd93d0f7b315afefa14720acab5ccd31c6d
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/analogix_dp.h b/drivers/video/drm/analogix_dp.h
index 8c6893ba04..70e4577de3 100644
--- a/drivers/video/drm/analogix_dp.h
+++ b/drivers/video/drm/analogix_dp.h
@@ -28,6 +28,7 @@
 #define ANALOGIX_DP_PLL_REG_4			0x9ec
 #define ANALOGIX_DP_PLL_REG_5			0xa00
 
+#define ANALOGIX_DP_BIAS			0x124
 #define ANALOGIX_DP_PD				0x12c
 
 #define ANALOGIX_DP_LANE_MAP			0x35C
diff --git a/drivers/video/drm/analogix_dp_reg.c b/drivers/video/drm/analogix_dp_reg.c
index d2cb10cc0e..927b3cf54f 100644
--- a/drivers/video/drm/analogix_dp_reg.c
+++ b/drivers/video/drm/analogix_dp_reg.c
@@ -103,10 +103,11 @@ void analogix_dp_init_analog_param(struct analogix_dp_device *dp)
 			reg ^= REF_CLK_MASK;
 
 		analogix_dp_write(dp, ANALOGIX_DP_PLL_REG_1, reg);
-		analogix_dp_write(dp, ANALOGIX_DP_PLL_REG_2, 0x95);
+		analogix_dp_write(dp, ANALOGIX_DP_PLL_REG_2, 0x99);
 		analogix_dp_write(dp, ANALOGIX_DP_PLL_REG_3, 0x40);
 		analogix_dp_write(dp, ANALOGIX_DP_PLL_REG_4, 0x58);
 		analogix_dp_write(dp, ANALOGIX_DP_PLL_REG_5, 0x22);
+		analogix_dp_write(dp, ANALOGIX_DP_BIAS, 0x44);
 	}
 
 	reg = DRIVE_DVDD_BIT_1_0625V | VCO_BIT_600_MICRO;

commit ee684e8265ecce03bdb082d6f89ffea8a33bc7d7
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Tue Sep 14 19:27:35 2021 +0800

    rockchip: rk3308: Add support to enable opp
    
    Change-Id: I57a8fa474f3dc5b07602efc59ff5fa19c3be59d5
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3308/rk3308.c b/arch/arm/mach-rockchip/rk3308/rk3308.c
index ee5f2361d2..361b21d0cb 100644
--- a/arch/arm/mach-rockchip/rk3308/rk3308.c
+++ b/arch/arm/mach-rockchip/rk3308/rk3308.c
@@ -370,10 +370,12 @@ void board_debug_uart_init(void)
 
 static int fdt_fixup_cpu_opp_table(const void *blob)
 {
-	int opp_node, cpu_node, sub_node;
+	int opp_node, old_opp_node;
+	int cpu_node, sub_node;
 	int len;
 	u32 phandle;
 	u32 *pp;
+	bool is_opp_enabled;
 
 	opp_node = fdt_path_offset(blob, "/rk3308bs-cpu0-opp-table");
 	if (opp_node < 0) {
@@ -401,6 +403,42 @@ static int fdt_fixup_cpu_opp_table(const void *blob)
 		pp[0] = cpu_to_fdt32(phandle);
 	}
 
+	old_opp_node = fdt_path_offset(blob, "/cpu0-opp-table");
+	if (old_opp_node < 0) {
+		printf("Failed to get cpu0-opp-table node\n");
+		return -EINVAL;
+	}
+
+	is_opp_enabled = false;
+	sub_node = fdt_subnode_offset(blob, old_opp_node, "opp-1296000000");
+	if (sub_node >= 0) {
+		if (fdt_stringlist_search(blob, sub_node,
+					  "status", "okay") >= 0)
+			is_opp_enabled = true;
+	}
+
+	sub_node = fdt_subnode_offset(blob, opp_node, "opp-1296000000");
+	if (sub_node >= 0 && is_opp_enabled) {
+		if (fdt_setprop_string((void *)blob, sub_node,
+				       "status", "okay") < 0)
+			printf("Failed to set 1296 okay\n");
+	}
+
+	is_opp_enabled = false;
+	sub_node = fdt_subnode_offset(blob, old_opp_node, "opp-1200000000");
+	if (sub_node >= 0) {
+		if (fdt_stringlist_search(blob, sub_node,
+					  "status", "okay") >= 0)
+			is_opp_enabled = true;
+	}
+
+	sub_node = fdt_subnode_offset(blob, opp_node, "opp-1200000000");
+	if (sub_node >= 0 && is_opp_enabled) {
+		if (fdt_setprop_string((void *)blob, sub_node,
+				       "status", "okay") < 0)
+			printf("Failed to set 1200 okay\n");
+	}
+
 	return 0;
 }
 

commit 9fed581a81067e6376c8a60b95f87ab3324f889d
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Mon Jul 12 10:50:41 2021 +0800

    rockchip: otp: Add support for rk3308bs
    
    Change-Id: I19e42bb3aac8b205da77f49c6890f0f17d022cb3
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/misc/rockchip-otp.c b/drivers/misc/rockchip-otp.c
index 84aecd14d6..4e04ea2fd8 100644
--- a/drivers/misc/rockchip-otp.c
+++ b/drivers/misc/rockchip-otp.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <asm/arch/cpu.h>
 #include <asm/io.h>
 #include <command.h>
 #include <dm.h>
@@ -97,6 +98,136 @@ read_end:
 	return ret;
 }
 
+static int rk3308bs_otp_wait_status(struct rockchip_otp_platdata *otp, u32 flag)
+{
+	int delay = OTPC_TIMEOUT;
+
+	while (!(readl(otp->base + OTPC_IRQ_ST) & flag)) {
+		udelay(1);
+		delay--;
+		if (delay <= 0) {
+			printf("%s: wait init status timeout\n", __func__);
+			return -ETIMEDOUT;
+		}
+	}
+
+	/* clean int status */
+	writel(flag, otp->base + OTPC_IRQ_ST);
+
+	return 0;
+}
+
+static int rk3308bs_otp_active(struct rockchip_otp_platdata *otp)
+{
+	int ret = 0;
+	u32 mode;
+
+	mode = readl(otp->base + OTPC_MODE_CTRL);
+
+	switch (mode) {
+	case OTPC_DEEP_STANDBY:
+		writel(OTPC_STANDBY, otp->base + OTPC_MODE_CTRL);
+		ret = rk3308bs_otp_wait_status(otp, OTPC_DP2STB_IRQ_ST);
+		if (ret < 0) {
+			dev_err(otp->dev, "timeout during wait dp2stb\n");
+			return ret;
+		}
+	case OTPC_STANDBY:
+		writel(OTPC_ACTIVE, otp->base + OTPC_MODE_CTRL);
+		ret = rk3308bs_otp_wait_status(otp, OTPC_STB2ACT_IRQ_ST);
+		if (ret < 0) {
+			dev_err(otp->dev, "timeout during wait stb2act\n");
+			return ret;
+		}
+		break;
+	default:
+		break;
+	}
+
+	return ret;
+}
+
+static int rk3308bs_otp_standby(struct rockchip_otp_platdata *otp)
+{
+	int ret = 0;
+	u32 mode;
+
+	mode = readl(otp->base + OTPC_MODE_CTRL);
+
+	switch (mode) {
+	case OTPC_ACTIVE:
+		writel(OTPC_STANDBY, otp->base + OTPC_MODE_CTRL);
+		ret = rk3308bs_otp_wait_status(otp, OTPC_ACT2STB_IRQ_ST);
+		if (ret < 0) {
+			dev_err(otp->dev, "timeout during wait act2stb\n");
+			return ret;
+		}
+	case OTPC_STANDBY:
+		writel(OTPC_DEEP_STANDBY, otp->base + OTPC_MODE_CTRL);
+		ret = rk3308bs_otp_wait_status(otp, OTPC_STB2DP_IRQ_ST);
+		if (ret < 0) {
+			dev_err(otp->dev, "timeout during wait stb2dp\n");
+			return ret;
+		}
+		break;
+	default:
+		break;
+	}
+
+	return ret;
+}
+
+static int rockchip_rk3308bs_otp_read(struct udevice *dev, int offset,
+				      void *buf, int size)
+{
+	struct rockchip_otp_platdata *otp = dev_get_platdata(dev);
+	unsigned int addr_start, addr_end, addr_offset, addr_len;
+	u32 out_value;
+	u8 *buffer;
+	int ret = 0, i = 0;
+
+	if (offset > RK3308BS_MAX_BYTES - 1)
+		return -ENOMEM;
+	if (offset + size > RK3308BS_MAX_BYTES)
+		size = RK3308BS_MAX_BYTES - offset;
+
+	ret = rk3308bs_otp_active(otp);
+	if (ret)
+		goto out;
+
+	addr_start = rounddown(offset, RK3308BS_NBYTES) / RK3308BS_NBYTES;
+	addr_end = roundup(offset + size, RK3308BS_NBYTES) / RK3308BS_NBYTES;
+	addr_offset = offset % RK3308BS_NBYTES;
+	addr_len = addr_end - addr_start;
+
+	buffer = calloc(1, sizeof(*buffer) * addr_len * RK3308BS_NBYTES);
+	if (!buffer) {
+		ret = -ENOMEM;
+		goto read_end;
+	}
+
+	while (addr_len--) {
+		writel(OTPC_TRANS_NUM, otp->base + OTPC_REPR_RD_TRANS_NUM);
+		writel(addr_start++, otp->base + OTPC_ACCESS_ADDR);
+		writel(OTPC_READ_ACCESS, otp->base + OTPC_MODE_CTRL);
+		ret = rk3308bs_otp_wait_status(otp, OTPC_RDM_IRQ_ST);
+		if (ret < 0) {
+			printf("timeout during wait rd\n");
+			goto read_end;
+		}
+		out_value = readl(otp->base + OTPC_RD_DATA);
+		memcpy(&buffer[i], &out_value, RK3308BS_NBYTES);
+		i += RK3308BS_NBYTES;
+	}
+	memcpy(buf, buffer + addr_offset, size);
+
+read_end:
+	kfree(buffer);
+	rk3308bs_otp_standby(otp);
+out:
+	return ret;
+}
+
 static int rockchip_rk3568_otp_read(struct udevice *dev, int offset, void *buf,
 				    int size)
 {
@@ -206,6 +337,9 @@ static int rockchip_otp_read(struct udevice *dev, int offset,
 	if (!data)
 		return -ENOSYS;
 
+	if (soc_is_rk3308bs())
+		return rockchip_rk3308bs_otp_read(dev, offset, buf, size);
+
 	return data->read(dev, offset, buf, size);
 }
 
@@ -240,6 +374,10 @@ static const struct otp_data px30_data = {
 	.read = rockchip_px30_otp_read,
 };
 
+static const struct otp_data rk3308bs_data = {
+	.read = rockchip_rk3308bs_otp_read,
+};
+
 static const struct otp_data rk3568_data = {
 	.read = rockchip_rk3568_otp_read,
 };
@@ -258,6 +396,10 @@ static const struct udevice_id rockchip_otp_ids[] = {
 		.compatible = "rockchip,rk3308-otp",
 		.data = (ulong)&px30_data,
 	},
+	{
+		.compatible = "rockchip,rk3308bs-otp",
+		.data = (ulong)&rk3308bs_data,
+	},
 	{
 		.compatible = "rockchip,rk3568-otp",
 		.data = (ulong)&rk3568_data,
diff --git a/include/rockchip-otp.h b/include/rockchip-otp.h
index 176b207d5e..12ddab9f66 100644
--- a/include/rockchip-otp.h
+++ b/include/rockchip-otp.h
@@ -42,6 +42,25 @@
 
 #define OTPC_TIMEOUT			10000
 
+#define OTPC_MODE_CTRL			0x2000
+#define OTPC_IRQ_ST			0x2008
+#define OTPC_ACCESS_ADDR		0x200c
+#define OTPC_RD_DATA			0x2010
+#define OTPC_REPR_RD_TRANS_NUM		0x2020
+#define OTPC_DEEP_STANDBY		0x0
+#define OTPC_STANDBY			0x1
+#define OTPC_ACTIVE			0x2
+#define OTPC_READ_ACCESS		0x3
+#define OTPC_TRANS_NUM			0x1
+#define OTPC_RDM_IRQ_ST			BIT(0)
+#define OTPC_STB2ACT_IRQ_ST		BIT(7)
+#define OTPC_DP2STB_IRQ_ST		BIT(8)
+#define OTPC_ACT2STB_IRQ_ST		BIT(9)
+#define OTPC_STB2DP_IRQ_ST		BIT(10)
+#define RK3308BS_NBYTES			4
+#define RK3308BS_MAX_BYTES		0x80
+#define RK3308BS_NO_SECURE_OFFSET	224
+
 #define RK3568_NBYTES			2
 
 #define RV1126_OTP_NVM_CEB		0x00

commit d403b1ca8a745908659cb53ac6b8d41c0485f4a2
Author: Weiwen Chen <cww@rock-chips.com>
Date:   Tue Sep 14 08:59:49 2021 +0800

    configs: update rv1126-spl-spi-nand_defconfig
    
    This defconfig support 2 plane spi nand.
    Remove some of spi nand and ensure that idblock.bin < 128KB.
    
    Signed-off-by: Weiwen Chen <cww@rock-chips.com>
    Change-Id: I95ed1fc87831e44c3ae9cccea87797e4d28e5857

diff --git a/configs/rv1126-spl-spi-nand_defconfig b/configs/rv1126-spl-spi-nand_defconfig
index e1c86c8aea..e1b1eb7260 100644
--- a/configs/rv1126-spl-spi-nand_defconfig
+++ b/configs/rv1126-spl-spi-nand_defconfig
@@ -9,12 +9,13 @@ CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 # CONFIG_SPL_MMC_SUPPORT is not set
 CONFIG_ROCKCHIP_FIT_IMAGE=y
 CONFIG_ROCKCHIP_UIMAGE=y
-CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y
 CONFIG_ROCKCHIP_UART_MUX_SEL_M=2
+CONFIG_ROCKCHIP_SFC_IOMUX=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_TARGET_EVB_RV1126=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
 CONFIG_DEFAULT_DEVICE_TREE="rv1126-evb"
 CONFIG_DEBUG_UART=y
@@ -24,6 +25,7 @@ CONFIG_FIT_HW_CRYPTO=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
 CONFIG_SPL_FIT_HW_CRYPTO=y
+# CONFIG_SPL_SYS_DCACHE_OFF is not set
 CONFIG_BOOTDELAY=0
 # CONFIG_CONSOLE_MUX is not set
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
@@ -115,6 +117,16 @@ CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
 CONFIG_SYS_NAND_U_BOOT_OFFS=0x4000
 CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND=0x10000
 CONFIG_MTD_SPI_NAND=y
+# CONFIG_SPI_NAND_GIGADEVICE is not set
+# CONFIG_SPI_NAND_TOSHIBA is not set
+# CONFIG_SPI_NAND_WINBOND is not set
+# CONFIG_SPI_NAND_DOSILICON is not set
+# CONFIG_SPI_NAND_HYF is not set
+# CONFIG_SPI_NAND_FMSH is not set
+# CONFIG_SPI_NAND_FORESEE is not set
+# CONFIG_SPI_NAND_BIWIN is not set
+# CONFIG_SPI_NAND_ETRON is not set
+# CONFIG_SPI_NAND_JSC is not set
 CONFIG_SF_DEFAULT_MODE=0x1
 CONFIG_SF_DEFAULT_SPEED=50000000
 CONFIG_DM_ETH=y

commit 0f4fc1124b8ab629303bd4bd3b888f74e292e3c5
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Sep 13 11:26:56 2021 +0800

    mtd: spinand: Support new device
    
    GD5FxGQ4UExxH
    
    Change-Id: I3f3eeba5a2a9e622ff25b5e3f6a73533d25315cd
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/gigadevice.c b/drivers/mtd/nand/spi/gigadevice.c
index a93ed5d189..578acd2af9 100644
--- a/drivers/mtd/nand/spi/gigadevice.c
+++ b/drivers/mtd/nand/spi/gigadevice.c
@@ -227,6 +227,24 @@ static const struct spinand_info gigadevice_spinand_table[] = {
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&gd5fxgq4xexxh_ooblayout,
 				     gd5f1gq4xexxg_ecc_get_status)),
+	SPINAND_INFO("GD5F1GQ5RExxG", 0x41,
+		     NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
+		     NAND_ECCREQ(4, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&gd5fxgq4xexxg_ooblayout,
+				     gd5fxgq5xexxg_ecc_get_status)),
+	SPINAND_INFO("GD5F2GQ5RExxG", 0x42,
+		     NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
+		     NAND_ECCREQ(4, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&gd5fxgq4xexxg_ooblayout,
+				     gd5fxgq5xexxg_ecc_get_status)),
 };
 
 static int gigadevice_spinand_detect(struct spinand_device *spinand)

commit 082f45b4b90dad093565d1f04e7f50bd2208e61c
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Mon Jul 12 09:42:30 2021 +0800

    thermal: rockchip: Add support for rk3308bs
    
    Change-Id: Ifa68843a7fe34ffd5b95f61f45649627de38b1a0
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index 42570427be..59b8beb1b7 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -12,6 +12,7 @@
 #include <errno.h>
 #include <syscon.h>
 #include <asm/arch/clock.h>
+#include <asm/arch/cpu.h>
 #include <asm/arch/hardware.h>
 #include <asm/io.h>
 #include <dm/lists.h>
@@ -138,6 +139,9 @@ struct chip_tsadc_table {
 	const struct tsadc_table *id;
 	unsigned int length;
 	u32 data_mask;
+	/* Tsadc is linear, using linear parameters */
+	int knum;
+	int bnum;
 	enum adc_sort_mode mode;
 };
 
@@ -467,6 +471,13 @@ static int tsadc_code_to_temp(struct chip_tsadc_table *table, u32 code,
 	unsigned int num;
 	unsigned long denom;
 
+	if (table->knum) {
+		*temp = (((int)code - table->bnum) * 10000 / table->knum) * 100;
+		if (*temp < MIN_TEMP || *temp > MAX_TEMP)
+			return -EAGAIN;
+		return 0;
+	}
+
 	switch (table->mode) {
 	case ADC_DECREMENT:
 		code &= table->data_mask;
@@ -528,6 +539,9 @@ static u32 tsadc_temp_to_code_v2(struct chip_tsadc_table table,
 	int high, low, mid;
 	u32 error = table.data_mask;
 
+	if (table.knum)
+		return (((temp / 1000) * table.knum) / 1000 + table.bnum);
+
 	low = 0;
 	high = table.length - 1;
 	mid = (high + low) / 2;
@@ -852,10 +866,34 @@ static const struct dm_thermal_ops rockchip_thermal_ops = {
 	.get_temp	= rockchip_thermal_get_temp,
 };
 
+static const struct rockchip_tsadc_chip rk3308bs_tsadc_data = {
+	.chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
+	.chn_num = 1, /* 1 channels for tsadc */
+
+	.tshut_mode = TSHUT_MODE_CRU, /* default TSHUT via CRU */
+	.tshut_temp = 95000,
+
+	.tsadc_init = tsadc_init_v2,
+	.tsadc_control = tsadc_control_v2,
+	.tsadc_get_temp = tsadc_get_temp_v2,
+	.irq_ack = tsadc_irq_ack_v3,
+	.set_alarm_temp = tsadc_alarm_temp_v2,
+	.set_tshut_temp = tsadc_tshut_temp_v2,
+	.set_tshut_mode = tsadc_tshut_mode_v2,
+
+	.table = {
+		.knum = 2699,
+		.bnum = 2796,
+		.data_mask = TSADCV2_DATA_MASK,
+		.mode = ADC_INCREMENT,
+	},
+};
+
 static int rockchip_thermal_probe(struct udevice *dev)
 {
 	struct rockchip_thermal_priv *priv = dev_get_priv(dev);
 	struct rockchip_tsadc_chip *tsadc;
+	struct clk clk;
 	int ret, i, shut_temp;
 
 	/* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
@@ -863,7 +901,23 @@ static int rockchip_thermal_probe(struct udevice *dev)
 	if (ret)
 		printf("%s clk_set_defaults failed %d\n", __func__, ret);
 
-	tsadc = (struct rockchip_tsadc_chip *)dev_get_driver_data(dev);
+	if (soc_is_rk3308bs()) {
+		ret = clk_get_by_name(dev, "tsadc", &clk);
+		if (ret) {
+			printf("%s get tsadc clk fail\n", __func__);
+			return -EINVAL;
+		}
+		ret = clk_set_rate(&clk, 4000000);
+		if (ret < 0) {
+			printf("%s: failed to set tsadc clk rate for %s\n",
+			       __func__, dev_read_name(dev));
+			return -EINVAL;
+		}
+
+		tsadc = (struct rockchip_tsadc_chip *)&rk3308bs_tsadc_data;
+	} else {
+		tsadc = (struct rockchip_tsadc_chip *)dev_get_driver_data(dev);
+	}
 	priv->data = tsadc;
 
 	priv->tshut_mode = dev_read_u32_default(dev,
@@ -900,7 +954,10 @@ static int rockchip_thermal_probe(struct udevice *dev)
 	}
 
 	tsadc->tsadc_control(dev, true);
-	udelay(1000);
+	if (soc_is_rk3308bs())
+		mdelay(3);
+	else
+		udelay(1000);
 
 	debug("tsadc probed successfully\n");
 
@@ -1182,6 +1239,10 @@ static const struct udevice_id rockchip_thermal_match[] = {
 		.compatible = "rockchip,rk3308-tsadc",
 		.data = (ulong)&rk3308_tsadc_data,
 	},
+	{
+		.compatible = "rockchip,rk3308bs-tsadc",
+		.data = (ulong)&rk3308bs_tsadc_data,
+	},
 	{
 		.compatible = "rockchip,rk3328-tsadc",
 		.data = (ulong)&rk3328_tsadc_data,

commit c6ee75eec14f147a49842de2effb420440f82252
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Wed Jul 28 18:48:11 2021 +0800

    rockchip: rk3308: fixup opp table for rk3308bs
    
    Change-Id: Ief90c561aaa42acb1e617056a745023a85f81a14
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3308/rk3308.c b/arch/arm/mach-rockchip/rk3308/rk3308.c
index 49f3490396..ee5f2361d2 100644
--- a/arch/arm/mach-rockchip/rk3308/rk3308.c
+++ b/arch/arm/mach-rockchip/rk3308/rk3308.c
@@ -368,3 +368,81 @@ void board_debug_uart_init(void)
 #endif /* defined(CONFIG_DEBUG_UART_BASE) */
 }
 
+static int fdt_fixup_cpu_opp_table(const void *blob)
+{
+	int opp_node, cpu_node, sub_node;
+	int len;
+	u32 phandle;
+	u32 *pp;
+
+	opp_node = fdt_path_offset(blob, "/rk3308bs-cpu0-opp-table");
+	if (opp_node < 0) {
+		printf("Failed to get rk3308bs-cpu0-opp-table node\n");
+		return -EINVAL;
+	}
+
+	phandle = fdt_get_phandle(blob, opp_node);
+	if (!phandle) {
+		printf("Failed to get cpu opp table phandle\n");
+		return -EINVAL;
+	}
+
+	cpu_node = fdt_path_offset(blob, "/cpus");
+	if (cpu_node < 0) {
+		printf("Failed to get cpus node\n");
+		return -EINVAL;
+	}
+
+	fdt_for_each_subnode(sub_node, blob, cpu_node) {
+		pp = (u32 *)fdt_getprop(blob, sub_node, "operating-points-v2",
+					&len);
+		if (!pp)
+			continue;
+		pp[0] = cpu_to_fdt32(phandle);
+	}
+
+	return 0;
+}
+
+static int fdt_fixup_dmc_opp_table(const void *blob)
+{
+	int opp_node, dmc_node;
+	int len;
+	u32 phandle;
+	u32 *pp;
+
+	opp_node = fdt_path_offset(blob, "/rk3308bs-dmc-opp-table");
+	if (opp_node < 0) {
+		printf("Failed to get rk3308bs-dmc-opp-table node\n");
+		return -EINVAL;
+	}
+
+	phandle = fdt_get_phandle(blob, opp_node);
+	if (!phandle) {
+		printf("Failed to get dmc opp table phandle\n");
+		return -EINVAL;
+	}
+
+	dmc_node = fdt_path_offset(blob, "/dmc");
+	if (dmc_node < 0) {
+		printf("Failed to get dmc node\n");
+		return -EINVAL;
+	}
+
+	pp = (u32 *)fdt_getprop(blob, dmc_node, "operating-points-v2", &len);
+	if (!pp)
+		return 0;
+	pp[0] = cpu_to_fdt32(phandle);
+
+	return 0;
+}
+
+int rk_board_fdt_fixup(const void *blob)
+{
+	if (soc_is_rk3308bs()) {
+		fdt_fixup_cpu_opp_table(blob);
+		fdt_fixup_dmc_opp_table(blob);
+	}
+
+	return 0;
+}

commit ed0480706d0efa60121620f1cd6e22a5f9412d90
Author: Sugar Zhang <sugar.zhang@rock-chips.com>
Date:   Thu Sep 9 10:42:38 2021 +0800

    Revert "rockchip: rv1126: change priority of isp\ispp\cpu\vepu\sdmmc"
    
    This reverts commit 1e46fe7d682203981f9fe04070d6d510d396a8fd.
    
    This patch breaks much more products, such as UVC + NN, Weston, MPP.
    
    e.g. log info:
    
    mpp_task_timeout_work:328: task f3a00bb0 processing time out!
    mpp_vepu2 ffb90000.vepu: resetting...
    Unhandled fault: external abort on non-linefetch (0x008) at 0xd090c1b4
    
    and thus make problems QoS-related hard to be analysed.
    
    QoS was initialized in SPL and can be changed from kernel dtsi depends
    on different products.
    
    So, we revert this patch and make QoS changed from product dtsi, such
    as: rv1126-ipc.dtsi, rv1126-ai-cam.dtsi...
    
    Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
    Change-Id: I512776fc92a88d210f3a08d5a4693969ffc1325a

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126.c b/arch/arm/mach-rockchip/rv1126/rv1126.c
index c1d640506a..ad21690228 100644
--- a/arch/arm/mach-rockchip/rv1126/rv1126.c
+++ b/arch/arm/mach-rockchip/rv1126/rv1126.c
@@ -661,22 +661,22 @@ int arch_cpu_init(void)
 	writel(0x303, DMA_PRIORITY_REG);
 	writel(0x101, MCU_DM_PRIORITY_REG);
 	writel(0x101, MCU_IM_PRIORITY_REG);
-	writel(0x202, A7_PRIORITY_REG);
+	writel(0x101, A7_PRIORITY_REG);
 	writel(0x303, GMAC_PRIORITY_REG);
 	writel(0x101, NPU_PRIORITY_REG);
 	writel(0x303, EMMC_PRIORITY_REG);
 	writel(0x303, NANDC_PRIORITY_REG);
 	writel(0x303, SFC_PRIORITY_REG);
-	writel(0x202, SDMMC_PRIORITY_REG);
+	writel(0x303, SDMMC_PRIORITY_REG);
 	writel(0x303, SDIO_PRIORITY_REG);
-	writel(0x202, VEPU_RD0_PRIORITY_REG);
-	writel(0x202, VEPU_RD1_PRIORITY_REG);
-	writel(0x202, VEPU_WR_PRIORITY_REG);
-	writel(0x202, ISPP_M0_PRIORITY_REG);
-	writel(0x202, ISPP_M1_PRIORITY_REG);
-	writel(0x202, ISP_PRIORITY_REG);
-	writel(0x303, CIF_LITE_PRIORITY_REG);
-	writel(0x303, CIF_PRIORITY_REG);
+	writel(0x101, VEPU_RD0_PRIORITY_REG);
+	writel(0x101, VEPU_RD1_PRIORITY_REG);
+	writel(0x101, VEPU_WR_PRIORITY_REG);
+	writel(0x101, ISPP_M0_PRIORITY_REG);
+	writel(0x101, ISPP_M1_PRIORITY_REG);
+	writel(0x101, ISP_PRIORITY_REG);
+	writel(0x202, CIF_LITE_PRIORITY_REG);
+	writel(0x202, CIF_PRIORITY_REG);
 	writel(0x101, IEP_PRIORITY_REG);
 	writel(0x101, RGA_RD_PRIORITY_REG);
 	writel(0x101, RGA_WR_PRIORITY_REG);
@@ -685,7 +685,7 @@ int arch_cpu_init(void)
 	writel(0x101, JPEG_PRIORITY_REG);
 	writel(0x101, CRYPTO_PRIORITY_REG);
 	/* enable dynamic priority */
-	writel(0x0, ISP_PRIORITY_EX_REG);
+	writel(0x1, ISP_PRIORITY_EX_REG);
 
 	/*
 	 * Init the i2c0 iomux and use it to control electronic voltmeter

commit c92fa1bd6128a1edfe692ea7888b8e587077bfff
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Sep 9 15:51:14 2021 +0800

    misc: rockchip decompress: delete unused code
    
    Just set the decompress interruppt when the storage device is spi
    nand.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ifbaad8164bbf4837a62a4284db24fbcb6267e1b2

diff --git a/drivers/misc/rockchip_decompress.c b/drivers/misc/rockchip_decompress.c
index b061531e2c..aae4c3967b 100644
--- a/drivers/misc/rockchip_decompress.c
+++ b/drivers/misc/rockchip_decompress.c
@@ -137,9 +137,6 @@ static int rockchip_decom_start(struct udevice *dev, void *buf)
 	writel(limit_lo, priv->base + DECOM_LMTSL);
 	writel(limit_hi, priv->base + DECOM_LMTSH);
 
-#if defined(CONFIG_SPL_BUILD)
-	writel(DECOM_INT_MASK, priv->base + DECOM_IEN);
-#endif
 	writel(DECOM_ENABLE, priv->base + DECOM_ENR);
 
 	priv->idle_check_once = true;

commit 2304b5d318f8fc2e2cbbf2b5aae7021bbaab052b
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Fri Jul 9 18:38:55 2021 +0800

    clk: rockchip: rv1126: Add support for micsi out clk
    
    It's essential to configure vccio4's io_vsel and iomux before clk
    setting.
    
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
    Change-Id: Ibb404453d4f9218e4ccec1cc8d800d95f8bccda4

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rv1126.h b/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
index c304fce0d2..3b6fb30015 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
@@ -417,6 +417,15 @@ enum {
 	CLK_ISPP_SEL_HPLL,
 	CLK_ISPP_DIV_SHIFT	= 0,
 	CLK_ISPP_DIV_MASK	= 0x1f,
+
+	/* CRU_CLK_SEL73_CON */
+	MIPICSI_OUT_SEL_SHIFT	= 10,
+	MIPICSI_OUT_SEL_MASK	= 0x3 << MIPICSI_OUT_SEL_SHIFT,
+	MIPICSI_OUT_SEL_XIN24M	= 0,
+	MIPICSI_OUT_SEL_DIV,
+	MIPICSI_OUT_SEL_FRACDIV,
+	MIPICSI_OUT_DIV_SHIFT	= 0,
+	MIPICSI_OUT_DIV_MASK	= 0x1f,
 #endif
 
 	/* CRU_GMAC_CON */
diff --git a/drivers/clk/rockchip/clk_rv1126.c b/drivers/clk/rockchip/clk_rv1126.c
index ad3915534c..ed332dae5e 100644
--- a/drivers/clk/rockchip/clk_rv1126.c
+++ b/drivers/clk/rockchip/clk_rv1126.c
@@ -1405,6 +1405,54 @@ static ulong rv1126_pclk_gmac_get_clk(struct rv1126_clk_priv *priv)
 }
 
 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_KERNEL_BOOT)
+static ulong rv1126_clk_mipicsi_out_get_clk(struct rv1126_clk_priv *priv)
+{
+	struct rv1126_cru *cru = priv->cru;
+	u32 div, fracdiv, sel, con, n, m, parent = priv->gpll_hz;
+
+	con = readl(&cru->clksel_con[73]);
+	div = (con & MIPICSI_OUT_DIV_MASK) >> MIPICSI_OUT_DIV_SHIFT;
+	sel = (con & MIPICSI_OUT_SEL_MASK) >> MIPICSI_OUT_SEL_SHIFT;
+	if (sel == MIPICSI_OUT_SEL_XIN24M) {
+		return OSC_HZ;
+	} else if (sel == MIPICSI_OUT_SEL_FRACDIV) {
+		parent = DIV_TO_RATE(parent, div);
+		fracdiv = readl(&cru->clksel_con[74]);
+		n = (fracdiv & 0xffff0000) >> 16;
+		m = fracdiv & 0xffff;
+		return parent * n / m;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rv1126_clk_mipicsi_out_set_clk(struct rv1126_clk_priv *priv,
+					    ulong rate)
+{	struct rv1126_cru *cru = priv->cru;
+	int src_clk_div;
+
+	if (rate == OSC_HZ) {
+		rk_clrsetreg(&cru->clksel_con[73], MIPICSI_OUT_SEL_MASK,
+			     MIPICSI_OUT_SEL_XIN24M << MIPICSI_OUT_SEL_SHIFT);
+	} else if (rate == 27000000) {
+		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, 297000000);
+		rk_clrsetreg(&cru->clksel_con[73], MIPICSI_OUT_DIV_MASK,
+			     (src_clk_div - 1) << MIPICSI_OUT_DIV_SHIFT);
+		rk_clrsetreg(&cru->clksel_con[73], MIPICSI_OUT_SEL_MASK,
+			     MIPICSI_OUT_SEL_FRACDIV << MIPICSI_OUT_SEL_SHIFT);
+		writel(4 << 16 | 44, &cru->clksel_con[74]);
+	} else {
+		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);
+		assert(src_clk_div - 1 <= 31);
+		rk_clrsetreg(&cru->clksel_con[73], MIPICSI_OUT_DIV_MASK,
+			     (src_clk_div - 1) << MIPICSI_OUT_DIV_SHIFT);
+		rk_clrsetreg(&cru->clksel_con[73], MIPICSI_OUT_SEL_MASK,
+			     MIPICSI_OUT_SEL_DIV << MIPICSI_OUT_SEL_SHIFT);
+	}
+
+	return rv1126_clk_mipicsi_out_get_clk(priv);
+}
+
 static ulong rv1126_clk_pdvi_ispp_get_clk(struct rv1126_clk_priv *priv,
 					  ulong clk_id)
 {
@@ -1660,6 +1708,9 @@ static ulong rv1126_clk_get_rate(struct clk *clk)
 		rate = rv1126_pclk_gmac_get_clk(priv);
 		break;
 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_KERNEL_BOOT)
+	case CLK_MIPICSI_OUT:
+		rate = rv1126_clk_mipicsi_out_get_clk(priv);
+		break;
 	case CLK_ISP:
 		rate = rv1126_clk_isp_get_clk(priv);
 		break;
@@ -1774,6 +1825,9 @@ static ulong rv1126_clk_set_rate(struct clk *clk, ulong rate)
 		ret = rv1126_gmac_tx_rx_set_clk(priv, rate);
 		break;
 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_KERNEL_BOOT)
+	case CLK_MIPICSI_OUT:
+		ret = rv1126_clk_mipicsi_out_set_clk(priv, rate);
+		break;
 	case CLK_ISP:
 		ret = rv1126_clk_isp_set_clk(priv, rate);
 		break;

commit 5f63fd7a50302ac507e5c29917e242af913ed184
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 6 18:25:33 2021 +0800

    rockchip: resource: Add "dump_resource" command
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ic7453b17865607667d268747854e4e6febeab897

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index e5af1f2898..ff21bd7252 100644
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -648,3 +648,34 @@ int resource_traverse_init_list(void)
 
 	return 0;
 }
+
+static int do_dump_resource(cmd_tbl_t *cmdtp, int flag,
+			    int argc, char *const argv[])
+{
+	struct resource_file *file;
+	struct list_head *node;
+
+	printf("Resources:\n");
+	list_for_each(node, &entrys_head) {
+		file = list_entry(node, struct resource_file, link);
+		printf("	%s: 0x%08x(sector), 0x%08x(bytes)\n",
+		       file->name, file->rsce_base + file->f_offset, file->f_size);
+	}
+
+#ifdef CONFIG_ROCKCHIP_HWID_DTB
+	printf("DTBs:\n");
+	list_for_each(node, &entrys_dtbs_head) {
+		file = list_entry(node, struct resource_file, dtbs);
+		printf("	%s: 0x%08x(sector),0x%08x(bytes)\n",
+		       file->name, file->rsce_base + file->f_offset, file->f_size);
+	}
+#endif
+	return 0;
+}
+
+U_BOOT_CMD(
+	dump_resource, 1, 1, do_dump_resource,
+	"dump resource list",
+	""
+);
+

commit 6a03cdba23ccfb315a846cf0abb6a67ddb7d934f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 6 17:16:11 2021 +0800

    rockchip: resource: Get dtb from accepted dtbs list
    
    The accepted dtbs list can be a subset of resource list, it
    only contains the dtb file entries that accepted by the
    board_resource_dtb_accepted().
    
    The board_resource_dtb_accepted() provides board-specific
    pre-filtration before resource_read_hwid_dtb().
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I6674b2e95c313abf1e80e13489ca8292e4a4209b

diff --git a/arch/arm/include/asm/arch-rockchip/resource_img.h b/arch/arm/include/asm/arch-rockchip/resource_img.h
index 975e81758e..53e04c0420 100644
--- a/arch/arm/include/asm/arch-rockchip/resource_img.h
+++ b/arch/arm/include/asm/arch-rockchip/resource_img.h
@@ -11,6 +11,8 @@
 
 #define MAX_FILE_NAME_LEN		220
 #define MAX_HASH_LEN			32
+#define ROOT_COMPAT_PROP_OFFSET		0x4c	/* Property: "/compatible" */
+#define DTB_SUFFIX			".dtb"
 
 struct resource_file {
 	char		name[MAX_FILE_NAME_LEN];
@@ -19,12 +21,14 @@ struct resource_file {
 	uint32_t	f_offset;	/* Sector offset */
 	uint32_t	f_size;		/* Bytes */
 	struct list_head link;
+	struct list_head dtbs;
 	/* Sector base of resource when ram=false, byte base when ram=true */
 	uint32_t	rsce_base;
 	bool		ram;
 };
 
 extern struct list_head entrys_head;
+extern struct list_head entrys_dtbs_head;
 
 /*
  * resource_image_check_header - check resource image header
@@ -102,4 +106,11 @@ int resource_populate_dtb(void *img, void *fdt);
  */
 int resource_traverse_init_list(void);
 
+/*
+ * board_resource_dtb_accepted() - check if this dtb is accepted
+ *
+ * return 0 if not accepted, otherwise accepted.
+ */
+int board_resource_dtb_accepted(char *dtb_name);
+
 #endif
diff --git a/arch/arm/mach-rockchip/resource_hwid.c b/arch/arm/mach-rockchip/resource_hwid.c
index 36b93e5cae..200160be84 100644
--- a/arch/arm/mach-rockchip/resource_hwid.c
+++ b/arch/arm/mach-rockchip/resource_hwid.c
@@ -17,7 +17,6 @@
 #define KEY_WORDS_GPIO		"#gpio"
 #define MAX_ADC_CH_NR		10
 #define MAX_GPIO_NR		10
-#define DTB_SUFFIX		".dtb"
 
 static fdt_addr_t gpio_base_addr[MAX_GPIO_NR];
 static uint32_t gpio_record[MAX_GPIO_NR];
@@ -273,8 +272,8 @@ struct resource_file *resource_read_hwid_dtb(void)
 			return NULL;
 	}
 
-	list_for_each(node, &entrys_head) {
-		file = list_entry(node, struct resource_file, link);
+	list_for_each(node, &entrys_dtbs_head) {
+		file = list_entry(node, struct resource_file, dtbs);
 		if (!strstr(file->name, DTB_SUFFIX))
 			continue;
 
diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index c8e0fc3571..e5af1f2898 100644
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -101,6 +101,12 @@ struct resource_entry {
 };
 
 LIST_HEAD(entrys_head);
+LIST_HEAD(entrys_dtbs_head);
+
+__weak int board_resource_dtb_accepted(char *dtb_name)
+{
+	return 1;
+}
 
 int resource_image_check_header(void *rsce_hdr)
 {
@@ -149,6 +155,8 @@ static int add_file_to_list(struct resource_entry *entry, int rsce_base, bool ra
 	file->ram = ram;
 	memcpy(file->hash, entry->hash, entry->hash_size);
 	list_add_tail(&file->link, &entrys_head);
+	if (strstr(file->name, DTB_SUFFIX) && board_resource_dtb_accepted(file->name))
+		list_add_tail(&file->dtbs, &entrys_dtbs_head);
 	debug("ENTRY: addr: %p, name: %18s, base: 0x%08x, offset: 0x%08x, size: 0x%08x\n",
 	      entry, file->name, file->rsce_base, file->f_offset, file->f_size);
 
@@ -205,6 +213,7 @@ int resource_create_ram_list(struct blk_desc *dev_desc, void *rsce_hdr)
 	}
 
 	list_del_init(&entrys_head);
+	list_del_init(&entrys_dtbs_head);
 	data = (void *)((ulong)hdr + hdr->c_offset * dev_desc->blksz);
 	for (e_num = 0; e_num < hdr->e_nums; e_num++) {
 		size = e_num * hdr->e_blks * dev_desc->blksz;
@@ -506,6 +515,37 @@ int rockchip_read_resource_file(void *buf, const char *name, int offset, int len
 	return ret;
 }
 
+static struct resource_file *get_default_dtb(void)
+{
+	struct resource_file *target_file = NULL;
+	struct resource_file *file;
+	struct list_head *node;
+	int num = 0;
+
+	if (list_empty(&entrys_head)) {
+		if (resource_init_list())
+			return NULL;
+	}
+
+	list_for_each(node, &entrys_dtbs_head) {
+		num++;
+		file = list_entry(node, struct resource_file, dtbs);
+		if (strcmp(file->name, DEFAULT_DTB_FILE))
+			target_file = file;
+	}
+
+	/*
+	 * two possible case:
+	 *	case 1. rk-kernel.dtb only
+	 *	case 2. targe_file(s) + rk-kernel.dtb(maybe they are the same),
+	 *		use (last)target_file as result one.
+	 */
+	if (num > 2)
+		printf("Error: find duplicate(%d) dtbs\n", num);
+
+	return target_file ? : get_file_info(DEFAULT_DTB_FILE);
+}
+
 int rockchip_read_resource_dtb(void *fdt_addr, char **hash, int *hash_size)
 {
 	struct resource_file *file = NULL;
@@ -514,9 +554,9 @@ int rockchip_read_resource_dtb(void *fdt_addr, char **hash, int *hash_size)
 #ifdef CONFIG_ROCKCHIP_HWID_DTB
 	file = resource_read_hwid_dtb();
 #endif
-	/* If dtbs matched hardware id(GPIO/ADC) not found, try the default */
+	/* If no dtb matches hardware id(GPIO/ADC), use the default */
 	if (!file)
-		file = get_file_info(DEFAULT_DTB_FILE);
+		file = get_default_dtb();
 
 	if (!file)
 		return -ENODEV;

commit 8a654f320204a18cafd43cf5f828d13965c55847
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Sep 6 14:50:39 2021 +0800

    drivers: rkflash: Support new SPI Nand devices
    
    GD5F1GQ4UExxH, W25N512GVEIG, SGM7000I-S24W1GH
    
    Change-Id: I7e974e33e5826e252eab79574f90ca1ee466c6a9
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/sfc_nand.c b/drivers/rkflash/sfc_nand.c
index c21f32d13d..b34577a988 100644
--- a/drivers/rkflash/sfc_nand.c
+++ b/drivers/rkflash/sfc_nand.c
@@ -65,6 +65,8 @@ static struct nand_info spi_nand_tbl[] = {
 	{ 0xC8, 0x45, 0x00, 4, 0x40, 2, 2048, 0x4C, 20, 0x4, 1, { 0x04, 0x08, 0X14, 0x18 }, &sfc_nand_get_ecc_status2 },
 	/* GD5F4GQ6UExxG 1*4096 */
 	{ 0xC8, 0x55, 0x00, 4, 0x40, 2, 2048, 0x4C, 20, 0x4, 1, { 0x04, 0x08, 0X14, 0x18 }, &sfc_nand_get_ecc_status2 },
+	/* GD5F1GQ4UExxH */
+	{ 0xC8, 0xD9, 0x00, 4, 0x40, 1, 1024, 0x0C, 18, 0x8, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status3 },
 
 	/* W25N01GV */
 	{ 0xEF, 0xAA, 0x21, 4, 0x40, 1, 1024, 0x4C, 18, 0x1, 0, { 0x04, 0x14, 0x24, 0xFF }, &sfc_nand_get_ecc_status1 },
@@ -74,6 +76,8 @@ static struct nand_info spi_nand_tbl[] = {
 	{ 0xEF, 0xAA, 0x23, 4, 0x40, 1, 4096, 0x4C, 20, 0x8, 0, { 0x04, 0x14, 0x24, 0x34 }, &sfc_nand_get_ecc_status0 },
 	/* W25N01GW */
 	{ 0xEF, 0xBA, 0x00, 4, 0x40, 1, 1024, 0x4C, 18, 0x1, 0, { 0x04, 0x14, 0x24, 0xFF }, &sfc_nand_get_ecc_status1 },
+	/* W25N512GVEIG */
+	{ 0xEF, 0xAA, 0x20, 4, 0x40, 1, 512, 0x4C, 17, 0x1, 0, { 0x04, 0x14, 0x24, 0xFF }, &sfc_nand_get_ecc_status1 },
 
 	/* HYF2GQ4UAACAE */
 	{ 0xC9, 0x52, 0x00, 4, 0x40, 1, 2048, 0x4C, 19, 0xE, 1, { 0x04, 0x24, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
@@ -158,6 +162,8 @@ static struct nand_info spi_nand_tbl[] = {
 	{ 0xBC, 0xB3, 0x00, 4, 0x40, 1, 2048, 0x4C, 19, 0x8, 1, { 0x04, 0x10, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
 	/* JS28U1GQSCAHG-83 */
 	{ 0xBF, 0x21, 0x00, 4, 0x40, 1, 1024, 0x40, 18, 0x4, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status8 },
+	/* SGM7000I-S24W1GH */
+	{ 0xEA, 0xC1, 0x00, 4, 0x40, 1, 1024, 0x0C, 18, 0x4, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
 };
 
 static struct nand_info *p_nand_info;

commit 7a589732b1743bb0561418695744b03f4ad520ff
Author: Chris Zhong <zyw@rock-chips.com>
Date:   Mon Aug 23 14:36:01 2021 +0800

    video/drm: display: flush dcache for logo
    
    Signed-off-by: Chris Zhong <zyw@rock-chips.com>
    Change-Id: Id81527bf9425098a400b51c0c6cbb490dab4e150

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 424a11d50c..ab11f628ee 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -1244,6 +1244,7 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 	int size, len;
 	int ret = 0;
 	int reserved = 0;
+	int dst_size;
 
 	if (!logo || !bmp_name)
 		return -EINVAL;
@@ -1269,6 +1270,7 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 	logo->bpp = get_unaligned_le16(&header->bit_count);
 	logo->width = get_unaligned_le32(&header->width);
 	logo->height = get_unaligned_le32(&header->height);
+	dst_size = logo->width * logo->height * logo->bpp >> 3;
 	reserved = get_unaligned_le32(&header->reserved);
 	if (logo->height < 0)
 	    logo->height = -logo->height;
@@ -1294,13 +1296,11 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 	}
 
 	if (!can_direct_logo(logo->bpp)) {
-		int dst_size;
 		/*
 		 * TODO: force use 16bpp if bpp less than 16;
 		 */
 		logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp;
 		dst_size = logo->width * logo->height * logo->bpp >> 3;
-
 		dst = get_display_buffer(dst_size);
 		if (!dst) {
 			ret = -ENOMEM;
@@ -1311,9 +1311,6 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 			ret = -EINVAL;
 			goto free_header;
 		}
-		flush_dcache_range((ulong)dst,
-				   ALIGN((ulong)dst + dst_size,
-					 CONFIG_SYS_CACHELINE_SIZE));
 
 		logo->offset = 0;
 		logo->ymirror = 0;
@@ -1328,6 +1325,8 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 
 	memcpy(&logo_cache->logo, logo, sizeof(*logo));
 
+	flush_dcache_range((ulong)dst, ALIGN((ulong)dst + dst_size, CONFIG_SYS_CACHELINE_SIZE));
+
 free_header:
 
 	free(header);

commit 527cb27136c294ff5152bd5dbda16c8e25664523
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Thu Sep 2 14:35:41 2021 +0800

    mtd: spinand: Support new device
    
    W25N512GV
    
    Change-Id: Ib26f46e36636bc97f19ac745964078c5038e4a2c
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/winbond.c b/drivers/mtd/nand/spi/winbond.c
index 4d737462ac..0a0f192b03 100644
--- a/drivers/mtd/nand/spi/winbond.c
+++ b/drivers/mtd/nand/spi/winbond.c
@@ -159,6 +159,15 @@ static const struct spinand_info winbond_spinand_table[] = {
 
 /* Another set for the same id[2] devices in one series */
 static const struct spinand_info winbond_spinand_table2[] = {
+	SPINAND_INFO("W25N512GV", 0x20,
+		     NAND_MEMORG(1, 2048, 64, 64, 512, 1, 1, 1),
+		     NAND_ECCREQ(1, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     0,
+		     SPINAND_ECCINFO(&w25m02gv_ooblayout, NULL),
+		     SPINAND_SELECT_TARGET(w25m02gv_select_target)),
 	SPINAND_INFO("W25N01GV", 0x21,
 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
 		     NAND_ECCREQ(1, 512),

commit 8781c285b7e81d82c7908301c52138dac55365de
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Thu Sep 2 11:51:30 2021 +0800

    mtd: spinand: Support new device
    
    GD5F1GQ4UExxH
    
    Change-Id: I5a156f568aea291ca8219ef86750d1a1d88666aa
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/gigadevice.c b/drivers/mtd/nand/spi/gigadevice.c
index 999d137295..a93ed5d189 100644
--- a/drivers/mtd/nand/spi/gigadevice.c
+++ b/drivers/mtd/nand/spi/gigadevice.c
@@ -148,6 +148,30 @@ static const struct mtd_ooblayout_ops gd5fxgq4xexxg_ooblayout = {
 	.rfree = gd5fxgq4xexxg_ooblayout_free,
 };
 
+static int gd5fxgq4xexxh_ooblayout_ecc(struct mtd_info *mtd, int section,
+				       struct mtd_oob_region *region)
+{
+	return -ERANGE;
+}
+
+static int gd5fxgq4xexxh_ooblayout_free(struct mtd_info *mtd, int section,
+					struct mtd_oob_region *region)
+{
+	if (section)
+		return -ERANGE;
+
+	/* Reserve 1 bytes for the BBM. */
+	region->offset = 1;
+	region->length = 63;
+
+	return 0;
+}
+
+static const struct mtd_ooblayout_ops gd5fxgq4xexxh_ooblayout = {
+	.ecc = gd5fxgq4xexxh_ooblayout_ecc,
+	.rfree = gd5fxgq4xexxh_ooblayout_free,
+};
+
 static const struct spinand_info gigadevice_spinand_table[] = {
 	SPINAND_INFO("GD5F1GQ4UExxG", 0xd1,
 		     NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
@@ -194,6 +218,15 @@ static const struct spinand_info gigadevice_spinand_table[] = {
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&gd5fxgq4xexxg_ooblayout,
 				     gd5fxgq5xexxg_ecc_get_status)),
+	SPINAND_INFO("GD5F1GQ4UExxH", 0xd9,
+		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&gd5fxgq4xexxh_ooblayout,
+				     gd5f1gq4xexxg_ecc_get_status)),
 };
 
 static int gigadevice_spinand_detect(struct spinand_device *spinand)

commit 68df10e3a01b632a4fda85a97e873b56d5ef5486
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Thu Sep 2 09:45:24 2021 +0800

    mtd: spinand: Support new device
    
    SGM7000I-S24W1GH
    
    Change-Id: Id41d22e8c5b8e92afcd80d564ddb4a8ea2ff61c5
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/Kconfig b/drivers/mtd/nand/spi/Kconfig
index 1d4ee2d974..7762cf787a 100644
--- a/drivers/mtd/nand/spi/Kconfig
+++ b/drivers/mtd/nand/spi/Kconfig
@@ -95,4 +95,10 @@ config SPI_NAND_JSC
 	help
 	  Add support for various JSC SPI Nand flash chips
 
+config SPI_NAND_SILICONGO
+	default y
+	bool "SILICONGO SPI flash support"
+	help
+	  Add support for various SILICONGO SPI Nand flash chips
+
 endif
diff --git a/drivers/mtd/nand/spi/Makefile b/drivers/mtd/nand/spi/Makefile
index 48c2b941a6..ed1ef480ae 100644
--- a/drivers/mtd/nand/spi/Makefile
+++ b/drivers/mtd/nand/spi/Makefile
@@ -15,4 +15,5 @@ obj-$(CONFIG_SPI_NAND_FORESEE) += foresee.o
 obj-$(CONFIG_SPI_NAND_BIWIN) += biwin.o
 obj-$(CONFIG_SPI_NAND_ETRON) += etron.o
 obj-$(CONFIG_SPI_NAND_JSC) += jsc.o
+obj-$(CONFIG_SPI_NAND_SILICONGO) += silicongo.o
 obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index 0964b32942..5ae5d58299 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -857,6 +857,9 @@ static const struct spinand_manufacturer *spinand_manufacturers[] = {
 #ifdef CONFIG_SPI_NAND_JSC
 	&jsc_spinand_manufacturer,
 #endif
+#ifdef CONFIG_SPI_NAND_SILICONGO
+	&silicongo_spinand_manufacturer,
+#endif
 };
 
 static int spinand_manufacturer_detect(struct spinand_device *spinand)
diff --git a/drivers/mtd/nand/spi/silicongo.c b/drivers/mtd/nand/spi/silicongo.c
new file mode 100644
index 0000000000..0feaa562e9
--- /dev/null
+++ b/drivers/mtd/nand/spi/silicongo.c
@@ -0,0 +1,107 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2020 Grandstream Networks, Inc
+ *
+ * Authors:
+ *	Carl <xjxia@grandstream.cn>
+ */
+
+#ifndef __UBOOT__
+#include <linux/device.h>
+#include <linux/kernel.h>
+#endif
+#include <linux/mtd/spinand.h>
+
+#define SPINAND_MFR_SILICONGO		0xEA
+
+static SPINAND_OP_VARIANTS(read_cache_variants,
+		SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
+
+static SPINAND_OP_VARIANTS(write_cache_variants,
+		SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
+		SPINAND_PROG_LOAD(true, 0, NULL, 0));
+
+static SPINAND_OP_VARIANTS(update_cache_variants,
+		SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
+		SPINAND_PROG_LOAD(false, 0, NULL, 0));
+
+static int sgm7000i_ooblayout_ecc(struct mtd_info *mtd, int section,
+				  struct mtd_oob_region *region)
+{
+	return -ERANGE;
+}
+
+static int sgm7000i_ooblayout_free(struct mtd_info *mtd, int section,
+				   struct mtd_oob_region *region)
+{
+	if (section)
+		return -ERANGE;
+
+	region->offset = 2;
+	region->length = mtd->oobsize - 2;
+
+	return 0;
+}
+
+static const struct mtd_ooblayout_ops sgm7000i_ooblayout = {
+	.ecc = sgm7000i_ooblayout_ecc,
+	.rfree = sgm7000i_ooblayout_free,
+};
+
+static const struct spinand_info silicongo_spinand_table[] = {
+	SPINAND_INFO("SGM7000I-S24W1GH", 0xC1,
+		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
+		     NAND_ECCREQ(4, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&sgm7000i_ooblayout, NULL)),
+};
+
+/**
+ * silicongo_spinand_detect - initialize device related part in spinand_device
+ * struct if it is a silicongo device.
+ * @spinand: SPI NAND device structure
+ */
+static int silicongo_spinand_detect(struct spinand_device *spinand)
+{
+	u8 *id = spinand->id.data;
+	int ret;
+
+	/*
+	 * silicongo SPI NAND read ID need a dummy byte,
+	 * so the first byte in raw_id is dummy.
+	 */
+	if (id[1] != SPINAND_MFR_SILICONGO)
+		return 0;
+
+	ret = spinand_match_and_init(spinand, silicongo_spinand_table,
+				     ARRAY_SIZE(silicongo_spinand_table), id[2]);
+	/* Not Only SILICONGO Nands MFR equals C8h */
+	if (ret)
+		return 0;
+
+	return 1;
+}
+
+static int silicongo_spinand_init(struct spinand_device *spinand)
+{
+	return 0;
+}
+
+static const struct spinand_manufacturer_ops silicongo_spinand_manuf_ops = {
+	.detect = silicongo_spinand_detect,
+	.init = silicongo_spinand_init,
+};
+
+const struct spinand_manufacturer silicongo_spinand_manufacturer = {
+	.id = SPINAND_MFR_SILICONGO,
+	.name = "silicongo",
+	.ops = &silicongo_spinand_manuf_ops,
+};
diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
index efd8f7cdee..e6caf26f10 100644
--- a/include/linux/mtd/spinand.h
+++ b/include/linux/mtd/spinand.h
@@ -215,6 +215,7 @@ extern const struct spinand_manufacturer foresee_spinand_manufacturer;
 extern const struct spinand_manufacturer biwin_spinand_manufacturer;
 extern const struct spinand_manufacturer etron_spinand_manufacturer;
 extern const struct spinand_manufacturer jsc_spinand_manufacturer;
+extern const struct spinand_manufacturer silicongo_spinand_manufacturer;
 
 /**
  * struct spinand_op_variants - SPI NAND operation variants

commit 6b8985873b692809bf954d72f31423c179b0f789
Author: Damon Ding <damon.ding@rock-chips.com>
Date:   Mon Aug 23 21:12:31 2021 +0800

    drm/rockchip: vop: support rk3288 MCU display
    
    1.Add MCU display mode related register definition.
    2.Change the control method of RS pin to GPIO control, because cannot
    control RS pin through VOP_MCU_CTRL register.
    
    Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
    Change-Id: I59cbafc2c1d6350e9028c45d64f6897243414a33

diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index 1dcf9e197a..11038166d8 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -31,6 +31,14 @@ static inline int us_to_vertical_line(struct drm_display_mode *mode, int us)
 	return us * mode->clock / mode->htotal / 1000;
 }
 
+static inline void set_vop_mcu_rs(struct vop *vop, int v)
+{
+	if (dm_gpio_is_valid(&vop->mcu_rs_gpio))
+		dm_gpio_set_value(&vop->mcu_rs_gpio, v);
+	else
+		VOP_CTRL_SET(vop, mcu_rs, v);
+}
+
 static int to_vop_csc_mode(int csc_mode)
 {
 	switch (csc_mode) {
@@ -266,6 +274,11 @@ static int rockchip_vop_init(struct display_state *state)
 
 	rockchip_vop_init_gamma(vop, state);
 
+	ret = gpio_request_by_name(crtc_state->dev, "mcu-rs-gpios",
+				   0, &vop->mcu_rs_gpio, GPIOD_IS_OUT);
+	if (ret && ret != -ENOENT)
+		printf("%s: Cannot get mcu rs GPIO: %d\n", __func__, ret);
+
 	VOP_CTRL_SET(vop, global_regdone_en, 1);
 	VOP_CTRL_SET(vop, axi_outstanding_max_num, 30);
 	VOP_CTRL_SET(vop, axi_max_outstanding_en, 1);
@@ -803,12 +816,12 @@ static int rockchip_vop_send_mcu_cmd(struct display_state *state,
 	if (vop) {
 		switch (type) {
 		case MCU_WRCMD:
-			VOP_CTRL_SET(vop, mcu_rs, 0);
+			set_vop_mcu_rs(vop, 0);
 			VOP_CTRL_SET(vop, mcu_rw_bypass_port, value);
-			VOP_CTRL_SET(vop, mcu_rs, 1);
+			set_vop_mcu_rs(vop, 1);
 			break;
 		case MCU_WRDATA:
-			VOP_CTRL_SET(vop, mcu_rs, 1);
+			set_vop_mcu_rs(vop, 1);
 			VOP_CTRL_SET(vop, mcu_rw_bypass_port, value);
 			break;
 		case MCU_SETBYPASS:
diff --git a/drivers/video/drm/rockchip_vop.h b/drivers/video/drm/rockchip_vop.h
index 0a495a4835..1ff22a1df0 100644
--- a/drivers/video/drm/rockchip_vop.h
+++ b/drivers/video/drm/rockchip_vop.h
@@ -7,6 +7,7 @@
 #ifndef _ROCKCHIP_VOP_H_
 #define _ROCKCHIP_VOP_H_
 #include "rockchip_display.h"
+#include <asm/gpio.h>
 
 /*
  * major: IP major vertion, used for IP structure
@@ -475,6 +476,8 @@ struct vop {
 	const struct vop_csc_table *csc_table;
 	const struct vop_csc *win_csc;
 	int win_offset;
+
+	struct gpio_desc mcu_rs_gpio;
 };
 
 static inline void vop_writel(struct vop *vop, uint32_t offset, uint32_t v)
diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index 6925cf49ec..55ea2a8a5d 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -167,6 +167,19 @@ static const struct vop_ctrl rk3288_ctrl_data = {
 	.cfg_done = VOP_REG(RK3288_REG_CFG_DONE, 0x1, 0),
 	.win_gate[0] = VOP_REG(RK3288_WIN2_CTRL0, 0x1, 0),
 	.win_gate[1] = VOP_REG(RK3288_WIN3_CTRL0, 0x1, 0),
+
+	.mcu_pix_total = VOP_REG(RK3288_MCU_CTRL, 0x3f, 0),
+	.mcu_cs_pst = VOP_REG(RK3288_MCU_CTRL, 0xf, 6),
+	.mcu_cs_pend = VOP_REG(RK3288_MCU_CTRL, 0x3f, 10),
+	.mcu_rw_pst = VOP_REG(RK3288_MCU_CTRL, 0xf, 16),
+	.mcu_rw_pend = VOP_REG(RK3288_MCU_CTRL, 0x3f, 20),
+	.mcu_clk_sel = VOP_REG(RK3288_MCU_CTRL, 0x1, 26),
+	.mcu_hold_mode = VOP_REG(RK3288_MCU_CTRL, 0x1, 27),
+	.mcu_frame_st = VOP_REG(RK3288_MCU_CTRL, 0x1, 28),
+	.mcu_rs = VOP_REG(RK3288_MCU_CTRL, 0x1, 29),
+	.mcu_bypass = VOP_REG(RK3288_MCU_CTRL, 0x1, 30),
+	.mcu_type = VOP_REG(RK3288_MCU_CTRL, 0x1, 31),
+	.mcu_rw_bypass_port = VOP_REG(RK3288_MCU_BYPASS_WPORT, 0xffffffff, 0),
 };
 
 static const struct vop_line_flag rk3288_vop_line_flag = {
diff --git a/drivers/video/drm/rockchip_vop_reg.h b/drivers/video/drm/rockchip_vop_reg.h
index 2d115c9882..d0ce98041c 100644
--- a/drivers/video/drm/rockchip_vop_reg.h
+++ b/drivers/video/drm/rockchip_vop_reg.h
@@ -117,6 +117,8 @@
 #define RK3288_BCSH_BCS				0x01b4
 #define RK3288_BCSH_H				0x01b8
 #define RK3288_GRF_SOC_CON15			0x03a4
+
+#define RK3288_MCU_BYPASS_WPORT			0x2200
 /* register definition end */
 
 /* rk3368 register definition */

commit 257f4b8458bf40af812ffe48959eb355d3499492
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Sep 3 15:11:17 2021 +0800

    cpu: rockchip amp: pass boot args for linux only
    
    This check makes common ATF works normally in more situations.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I0c06626e1216c0f63436b68b9a85bb0204e6d3fa

diff --git a/drivers/cpu/rockchip_amp.c b/drivers/cpu/rockchip_amp.c
index 74d892ee0e..3f30201794 100644
--- a/drivers/cpu/rockchip_amp.c
+++ b/drivers/cpu/rockchip_amp.c
@@ -133,13 +133,15 @@ static void setup_sync_bits_for_linux(void)
 	gicd_writel(0x0, GICD_IPRIORITYRn + offset);
 }
 
-static int smc_cpu_on(u32 cpu, u32 pe_state, u32 entry, boot_args_t *args)
+static int smc_cpu_on(u32 cpu, u32 pe_state, u32 entry,
+		      boot_args_t *args, bool is_linux)
 {
 	int ret;
 
 	AMP_I("Brought up cpu[%x] with state 0x%x, entry 0x%08x ...",
 	      cpu, pe_state, entry);
 
+	/* if target pe state is default arch state, power up cpu directly */
 	if (is_default_pe_state(pe_state))
 		goto finish;
 
@@ -149,6 +151,10 @@ static int smc_cpu_on(u32 cpu, u32 pe_state, u32 entry, boot_args_t *args)
 		return ret;
 	}
 
+	/* only linux needs boot args */
+	if (!is_linux)
+		goto finish;
+
 	ret = sip_smc_amp_cfg(AMP_BOOT_ARG01, cpu, args->arg0, args->arg1);
 	if (ret) {
 		AMP_E("smc boot arg01, ret=%d\n", ret);
@@ -243,7 +249,7 @@ static int brought_up_amp(void *fit, int noffset,
 	}
 
 	/* wakeup */
-	ret = smc_cpu_on(cpu, pe_state, entry, &args);
+	ret = smc_cpu_on(cpu, pe_state, entry, &args, is_linux);
 	if (ret)
 		return ret;
 

commit 49cfbee5b0f5f60b2089257e5ddae83202d00c23
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Sep 1 10:37:00 2021 +0800

    cpu: rockchip amp: setup sync bits for linux
    
    This is an appointment on RK amp solution to handle
    GIC configure competition.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ia23c5bdcbae3450110762f9697da135939711497

diff --git a/drivers/cpu/rockchip_amp.c b/drivers/cpu/rockchip_amp.c
index c226daac03..74d892ee0e 100644
--- a/drivers/cpu/rockchip_amp.c
+++ b/drivers/cpu/rockchip_amp.c
@@ -7,7 +7,10 @@
 #include <amp.h>
 #include <bidram.h>
 #include <boot_rkimg.h>
+#include <config.h>
 #include <sysmem.h>
+#include <asm/gic.h>
+#include <asm/io.h>
 #include <asm/arch/rockchip_smccc.h>
 
 /*
@@ -37,6 +40,8 @@
  */
 
 #define AMP_PART	"amp"
+#define gicd_readl(offset)	readl((void *)GICD_BASE + (offset))
+#define gicd_writel(v, offset)	writel(v, (void *)GICD_BASE + (offset))
 
 typedef struct boot_args {
 	ulong arg0;
@@ -115,6 +120,19 @@ static int is_default_pe_state(u32 pe_state)
 #endif
 }
 
+static void setup_sync_bits_for_linux(void)
+{
+	u32 val, num_irq, offset;
+
+	val = gicd_readl(GICD_CTLR);
+	val &= ~0x3;
+	gicd_writel(val, GICD_CTLR);
+
+	num_irq = 32 * ((gicd_readl(GICD_TYPER) & 0x1F) + 1);
+	offset = ((num_irq - 1) / 4) * 4;
+	gicd_writel(0x0, GICD_IPRIORITYRn + offset);
+}
+
 static int smc_cpu_on(u32 cpu, u32 pe_state, u32 entry, boot_args_t *args)
 {
 	int ret;
@@ -212,6 +230,12 @@ static int brought_up_amp(void *fit, int noffset,
 				aarch64, load, &entry, &args);
 		if (ret)
 			return ret;
+		/*
+		 * Must setup before jump to linux.
+		 * This is an appointment on RK amp solution to handle
+		 * GIC configure competition.
+		 */
+		setup_sync_bits_for_linux();
 	} else {
 		if (!sysmem_alloc_base_by_name(desc,
 				(phys_addr_t)load, data_size))

commit a3d2307ae14bfc117fbc3e39041ee708aae249d6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Aug 25 18:09:39 2021 +0800

    common: android: Allow return for amp boot linux
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If7e4f9ca7c7c1593e475570da9c11fd5af4b3319

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index bc88a86310..672e597ed7 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -1082,10 +1082,14 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 		printf("Close optee client failed!\n");
 #endif
 
+#ifdef CONFIG_AMP
+	return android_bootloader_boot_kernel(load_address);
+#else
 	android_bootloader_boot_kernel(load_address);
 
 	/* TODO: If the kernel doesn't boot mark the selected slot as bad. */
 	return -1;
+#endif
 }
 
 int android_avb_boot_flow(unsigned long kernel_address)

commit bb4a1f4341c6bdc7842c2529832b8f8e96954ad7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Aug 11 09:38:26 2021 +0800

    cpu: rockchip amp: support boot linux on cpu0 by nonboot cpu
    
    Update its rules.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Idaf87f4e22f7140353e74a2fdd6ccb8e59ef2b88

diff --git a/drivers/cpu/amp.its b/drivers/cpu/amp.its
index f7841971b4..8707a61ffa 100644
--- a/drivers/cpu/amp.its
+++ b/drivers/cpu/amp.its
@@ -9,32 +9,15 @@
 	#address-cells = <1>;
 
 	images {
-
-		amp0 {
-			description  = "bare-mental-core0";
-			data         = /incbin/("../../hal0.bin");
-			type         = "firmware";
-			compression  = "none";
-			arch         = "arm";	 // "arm64" or "arm"
-			cpu          = <0x000>;  // mpidr
-			thumb        = <0>;      // 0: arm or thumb2; 1: thumb
-			hyp          = <0>;      // 0: el1/svc; 1: el2/hyp
-			load         = <0x12000000>;
-			udelay       = <1000000>;
-			hash {
-				algo = "sha256";
-			};
-		};
-
 		amp1 {
 			description  = "bare-mental-core1";
-			data         = /incbin/("../../hal1.bin");
+			data         = /incbin/("./amp1.bin");
 			type         = "firmware";
 			compression  = "none";
-			arch         = "arm";
-			cpu          = <0x100>;
-			thumb        = <0>;
-			hyp          = <0>;
+			arch         = "arm64";		// "arm64" or "arm"
+			cpu          = <0x100>;		// mpidr
+			thumb        = <0>;		// 0: arm or thumb2; 1: thumb
+			hyp          = <0>;		// 0: el1/svc; 1: el2/hyp
 			load         = <0x01800000>;
 			udelay       = <1000000>;
 			hash {
@@ -44,10 +27,10 @@
 
 		amp2 {
 			description  = "bare-mental-core2";
-			data         = /incbin/("../../hal2.bin");
+			data         = /incbin/("./amp2.bin");
 			type         = "firmware";
 			compression  = "none";
-			arch         = "arm";
+			arch         = "arm64";
 			cpu          = <0x200>;
 			thumb        = <0>;
 			hyp          = <0>;
@@ -60,10 +43,10 @@
 
 		amp3 {
 			description  = "bare-mental-core3";
-			data         = /incbin/("../../hal3.bin");
+			data         = /incbin/("./amp3.bin");
 			type         = "firmware";
 			compression  = "none";
-			arch         = "arm";
+			arch         = "arm64";
 			cpu          = <0x300>;
 			thumb        = <0>;
 			hyp          = <0>;
@@ -80,7 +63,7 @@
 		conf {
 			description = "Rockchip AMP images";
 			rollback-index = <0x0>;
-			loadables = "amp0", "amp1", "amp2", "amp3";
+			loadables = "amp1", "amp2", "amp3";
 
 			signature {
 				algo = "sha256,rsa2048";
@@ -88,6 +71,19 @@
 				key-name-hint = "dev";
 				sign-images = "loadables";
 			};
+
+			/* - run linux on cpu0
+			 * - it is brought up by amp(that run on U-Boot)
+			 * - it is boot entry depends on U-Boot
+			 */
+			linux {
+				description  = "linux-os";
+				arch         = "arm64";
+				cpu          = <0x000>;
+				thumb        = <0>;
+				hyp          = <0>;
+				udelay       = <1000000>;
+			};
 		};
 	};
 };
diff --git a/drivers/cpu/rockchip_amp.c b/drivers/cpu/rockchip_amp.c
index 6f00c24e48..c226daac03 100644
--- a/drivers/cpu/rockchip_amp.c
+++ b/drivers/cpu/rockchip_amp.c
@@ -10,10 +10,49 @@
 #include <sysmem.h>
 #include <asm/arch/rockchip_smccc.h>
 
+/*
+ * [Design Principles]
+ *
+ * [amp.img]
+ *	The amp image with FIT format which consists of non-linux firmwares.
+ *	Please refer to: driver/cpu/amp.its.
+ *
+ *	amp.img generation: ./tools/mkimage -f drivers/cpu/amp.its -E -p 0xe00 amp.img
+ *
+ * [linux]
+ *	We still use the traditional solution for a better compatibility:
+ *	boot.img/recovery.img with FIT format or Android format.
+ *
+ *	The developer need add "/configurations/conf/linux" node to configure:
+ *	description, arch, cpu, thumb, hyp, udelay(optional) properties.
+ *	The addresses depend on U-Boot: kernel_addr_r, fdt_addr_r and
+ *	ramdisk_addr_r. Please refer to: driver/cpu/amp.its.
+ *
+ * [memory management]
+ *	U-Boot is not responsible for memory distribution/fixup any more, please
+ *	handle this on kernel dts "/memory".
+ *
+ * [trust]
+ *	The AMP feature requires trust support.
+ */
+
 #define AMP_PART	"amp"
 
-static u32 primary_pe_arch;
-static u32 primary_pe_state;
+typedef struct boot_args {
+	ulong arg0;
+	ulong arg1;
+	ulong arg2;
+	ulong arg3;
+} boot_args_t;
+
+typedef struct boot_cpu {
+	u32 arch;
+	u32 state;
+	u32 entry;
+	u32 linux_os;
+} boot_cpu_t;
+
+static boot_cpu_t g_bootcpu;
 
 static u32 fit_get_u32_default(const void *fit, int noffset,
 			       const char *prop, u32 def)
@@ -27,117 +66,216 @@ static u32 fit_get_u32_default(const void *fit, int noffset,
 	return fdt32_to_cpu(*val);
 }
 
-static int brought_up_all_amp(void *fit, const char *fit_uname_cfg)
+static int load_linux_for_nonboot_cpu(u32 cpu, u32 aarch64, u32 load,
+				      u32 *entry, boot_args_t *args)
+{
+	static const char *boot_cmd[] = {
+		"boot_fit", "boot_android ${devtype} ${devnum}" };
+	int i, ret;
+
+	env_set_hex("bootm_states_unmask", BOOTM_STATE_OS_GO);
+	for (i = 0; i < ARRAY_SIZE(boot_cmd); i++) {
+		ret = run_command(boot_cmd[i], 0);
+		if (!ret)
+			break;
+	}
+	env_set("bootm_states_unmask", NULL);
+	if (ret) {
+		AMP_E("Load linux failed, ret=%d\n", ret);
+		return ret;
+	}
+
+	/* linux boot args */
+	if (aarch64) {
+		args->arg0 = (ulong)gd->fdt_blob;
+		args->arg1 = 0;
+		args->arg2 = 0;
+	} else {
+		args->arg0 = 0;
+		args->arg1 = 0;
+		args->arg2 = (ulong)gd->fdt_blob;
+	}
+
+	/* don't need call cleanup_before_linux() as this nonboot cpu is clean */
+	board_quiesce_devices(&images);
+	flush_dcache_all();
+
+	/* fixup: ramdisk/fdt/entry depend on U-Boot */
+	*entry = env_get_ulong("kernel_addr_r", 16, 0);
+
+	return 0;
+}
+
+static int is_default_pe_state(u32 pe_state)
 {
-	const char *uname, *desc;
+#ifdef CONFIG_ARM64
+	return (pe_state == PE_STATE(1, 1, 0, 0));
+#else
+	return (pe_state == PE_STATE(0, 0, 0, 0));
+#endif
+}
+
+static int smc_cpu_on(u32 cpu, u32 pe_state, u32 entry, boot_args_t *args)
+{
+	int ret;
+
+	AMP_I("Brought up cpu[%x] with state 0x%x, entry 0x%08x ...",
+	      cpu, pe_state, entry);
+
+	if (is_default_pe_state(pe_state))
+		goto finish;
+
+	ret = sip_smc_amp_cfg(AMP_PE_STATE, cpu, pe_state, 0);
+	if (ret) {
+		AMP_E("smc pe-state, ret=%d\n", ret);
+		return ret;
+	}
+
+	ret = sip_smc_amp_cfg(AMP_BOOT_ARG01, cpu, args->arg0, args->arg1);
+	if (ret) {
+		AMP_E("smc boot arg01, ret=%d\n", ret);
+		return ret;
+	}
+
+	ret = sip_smc_amp_cfg(AMP_BOOT_ARG23, cpu, args->arg2, args->arg3);
+	if (ret) {
+		AMP_E("smc boot arg23, ret=%d\n", ret);
+		return ret;
+	}
+
+finish:
+	ret = psci_cpu_on(cpu, entry);
+	if (ret) {
+		printf("cpu up failed, ret=%d\n", ret);
+		return ret;
+	}
+	printf("OK\n");
+
+	return 0;
+}
+
+static int brought_up_amp(void *fit, int noffset,
+			  boot_cpu_t *bootcpu, int is_linux)
+{
+	const char *desc;
+	boot_args_t args;
 	u32 cpu, aarch64, hyp;
-	u32 thumb, us, secure = 0;
-	u32 pe_state, entry, load;
-	u32 reserved_mem[2] = { 0, 0, };
-	u32 primary_pe_entry = 0;
-	int primary_on_linux = 0;
-	int conf_noffset, noffset;
-	int loadables_index;
-	int data_size = -ENODATA;
-	u8 arch = -ENODATA;
+	u32 load, thumb, us;
+	u32 pe_state, entry;
+	int data_size;
 	int ret;
+	u8  arch = -ENODATA;
 
-	aarch64 = IS_ENABLED(CONFIG_ARM64) ? 1 : 0;
-	conf_noffset = fit_conf_get_node(fit, fit_uname_cfg);
-	for (loadables_index = 0;
-	     uname = fdt_stringlist_get(fit, conf_noffset,
-			FIT_LOADABLE_PROP, loadables_index, NULL), uname;
-	     loadables_index++) {
-		noffset = fit_image_get_node(fit, uname);
-
-		desc = fdt_getprop(fit, noffset, "description", NULL);
-		cpu = fit_get_u32_default(fit, noffset, "cpu", -ENODATA);
-		hyp = fit_get_u32_default(fit, noffset, "hyp", 0);
-		thumb = fit_get_u32_default(fit, noffset, "thumb", 0);
-		load = fit_get_u32_default(fit, noffset, "load", -ENODATA);
-		us = fit_get_u32_default(fit, noffset, "udelay", 0);
-		fit_image_get_arch(fit, noffset, &arch);
-		fit_image_get_data_size(fit, noffset, &data_size);
-		fdtdec_get_int_array(fit, noffset, "memory", reserved_mem, 2);
-
-		if (!desc || cpu == -ENODATA || data_size == -ENODATA ||
-		    load == -ENODATA || arch == -ENODATA) {
-			AMP_I("property missing!\n");
-			return -EINVAL;
-		}
-
-		entry = load;
-		aarch64 = (arch == IH_ARCH_ARM) ? 0 : 1;
-		pe_state = PE_STATE(aarch64, hyp, thumb, secure);
+	desc = fdt_getprop(fit, noffset, "description", NULL);
+	cpu = fit_get_u32_default(fit, noffset, "cpu", -ENODATA);
+	hyp = fit_get_u32_default(fit, noffset, "hyp", 0);
+	thumb = fit_get_u32_default(fit, noffset, "thumb", 0);
+	load = fit_get_u32_default(fit, noffset, "load", -ENODATA);
+	us = fit_get_u32_default(fit, noffset, "udelay", 0);
+	fit_image_get_arch(fit, noffset, &arch);
+	fit_image_get_data_size(fit, noffset, &data_size);
+	memset(&args, 0, sizeof(args));
+
+	if (!desc || cpu == -ENODATA || arch == -ENODATA ||
+	    (load == -ENODATA && !is_linux)) {
+		AMP_E("Property missing!\n");
+		return -EINVAL;
+	}
+	aarch64 = (arch == IH_ARCH_ARM) ? 0 : 1;
+	pe_state = PE_STATE(aarch64, hyp, thumb, 0);
+	entry = load;
 
 #ifdef DEBUG
-		AMP_I("   pe_state: 0x%08x\n", pe_state);
-		AMP_I("        cpu: 0x%x\n", cpu);
-		AMP_I("    aarch64: %d\n", aarch64);
-		AMP_I("        hyp: %d\n", hyp);
-		AMP_I("      thumb: %d\n", thumb);
-		AMP_I("     secure: %d\n", secure);
-		AMP_I("      entry: 0x%08x\n", entry);
-		AMP_I("        mem: 0x%08x - 0x%08x\n\n",
-		      reserved_mem[0], reserved_mem[0] + reserved_mem[1]);
+	AMP_I("       desc: %s\n", desc);
+	AMP_I("        cpu: 0x%x\n", cpu);
+	AMP_I("    aarch64: %d\n", aarch64);
+	AMP_I("        hyp: %d\n", hyp);
+	AMP_I("      thumb: %d\n", thumb);
+	AMP_I("      entry: 0x%08x\n", entry);
+	AMP_I("   pe_state: 0x%08x\n", pe_state);
+	AMP_I("   linux-os: %d\n\n", is_linux);
 #endif
-		if (!data_size)
-			continue;
-
-		if ((read_mpidr() & 0x0fff) == cpu) {
-			primary_pe_arch = arch;
-			primary_pe_state = pe_state;
-			primary_pe_entry = entry;
-			primary_on_linux =
-				!!fdt_getprop(fit, noffset, "linux-os", NULL);
-			continue;
-		}
-
-		if (reserved_mem[1]) {
-			ret = bidram_reserve_by_name(desc, reserved_mem[0],
-						     reserved_mem[1]);
-			if (ret) {
-				AMP_E("Reserve \"%s\" region at 0x%08x - 0x%08x failed, ret=%d\n",
-				      desc, reserved_mem[0],
-				      reserved_mem[0] + reserved_mem[1], ret);
-				return -ENOMEM;
-			}
-		} else if (!sysmem_alloc_base_by_name(desc,
-					(phys_addr_t)load, data_size)) {
+
+	if ((read_mpidr() & 0x0fff) == cpu) {
+		bootcpu->arch = arch;
+		bootcpu->entry = entry;
+		bootcpu->state = pe_state;
+		bootcpu->linux_os = is_linux;
+		return 0;
+	}
+
+	/* === only nonboot cpu can reach here === */
+
+	/* load or check */
+	if (is_linux) {
+		ret = load_linux_for_nonboot_cpu(cpu,
+				aarch64, load, &entry, &args);
+		if (ret)
+			return ret;
+	} else {
+		if (!sysmem_alloc_base_by_name(desc,
+				(phys_addr_t)load, data_size))
 			return -ENXIO;
-		}
+	}
+
+	/* wakeup */
+	ret = smc_cpu_on(cpu, pe_state, entry, &args);
+	if (ret)
+		return ret;
+
+	if (us)
+		udelay(us);
 
-		AMP_I("Brought up cpu[%x] with state 0x%x, entry 0x%08x ...",
-		      cpu, pe_state, entry);
+	return 0;
+}
+
+static int brought_up_all_amp(void *fit, const char *fit_uname_cfg)
+{
+	int loadables_index;
+	int linux_noffset;
+	int conf_noffset;
+	int cpu_noffset;
+	int ret;
+	const char *uname;
 
-		ret = sip_smc_amp_cfg(AMP_PE_STATE, cpu, pe_state);
-		if (ret) {
-			printf("amp cfg failed, ret=%d\n", ret);
+	conf_noffset = fit_conf_get_node(fit, fit_uname_cfg);
+	if (conf_noffset < 0)
+		return conf_noffset;
+
+	linux_noffset = fdt_subnode_offset(fit, conf_noffset, "linux");
+	if (linux_noffset > 0) {
+		ret = brought_up_amp(fit, linux_noffset, &g_bootcpu, 1);
+		if (ret)
 			return ret;
-		}
+	}
 
-		ret = psci_cpu_on(cpu, entry);
-		if (ret) {
-			printf("cpu up failed, ret=%d\n", ret);
+	for (loadables_index = 0;
+	     uname = fdt_stringlist_get(fit, conf_noffset,
+			FIT_LOADABLE_PROP, loadables_index, NULL), uname;
+	     loadables_index++) {
+		cpu_noffset = fit_image_get_node(fit, uname);
+		if (cpu_noffset < 0)
+			return cpu_noffset;
+
+		ret = brought_up_amp(fit, cpu_noffset, &g_bootcpu, 0);
+		if (ret)
 			return ret;
-		}
-		printf("OK\n");
-		if (us)
-			udelay(us);
 	}
 
-	if (!primary_on_linux && primary_pe_entry) {
+	/* === only boot cpu can reach here === */
+
+	if (!g_bootcpu.linux_os) {
 		flush_dcache_all();
 		AMP_I("Brought up cpu[%x, self] with state 0x%x, entry 0x%08x ...",
-		      (u32)read_mpidr() & 0x0fff, primary_pe_state, primary_pe_entry);
+		      (u32)read_mpidr() & 0x0fff, g_bootcpu.state, g_bootcpu.entry);
 		cleanup_before_linux();
 		printf("OK\n");
-		armv8_switch_to_el2(0, 0, 0, primary_pe_state,
-				    (u64)primary_pe_entry,
-				    aarch64 ? ES_TO_AARCH64 : ES_TO_AARCH32);
+		armv8_switch_to_el2(0, 0, 0, g_bootcpu.state, (u64)g_bootcpu.entry,
+		     g_bootcpu.arch == IH_ARCH_ARM ? ES_TO_AARCH32 : ES_TO_AARCH64);
 	}
 
-	return ret;
+	/* return: boot cpu continue to boot linux */
+	return 0;
 }
 
 int amp_cpus_on(void)
@@ -155,9 +293,11 @@ int amp_cpus_on(void)
 	if (part_get_info_by_name(dev_desc, AMP_PART, &part) < 0)
 		return -ENODEV;
 
-	fit = sysmem_alloc(MEM_FIT, part.size * part.blksz);
-	if (!fit)
+	fit = malloc(part.size * part.blksz);
+	if (!fit) {
+		AMP_E("No memory, please increase CONFIG_SYS_MALLOC_LEN\n");
 		return -ENOMEM;
+	}
 
 	if (blk_dread(dev_desc, part.start, part.size, fit) != part.size) {
 		ret = -EIO;
@@ -165,35 +305,36 @@ int amp_cpus_on(void)
 	}
 
 	if (fdt_check_header(fit)) {
-		printf("No fdt header\n");
+		AMP_E("Not fit\n");
 		ret = -EINVAL;
 		goto out;
 	}
 
+	/* Load loadables */
 	memset(&images, 0, sizeof(images));
 	images.fit_uname_cfg = "conf";
 	images.fit_hdr_os = fit;
 	images.verify = 1;
-	ret = boot_get_loadable(0, NULL, &images,
-				IH_ARCH_DEFAULT, NULL, NULL);
+	ret = boot_get_loadable(0, NULL, &images, IH_ARCH_DEFAULT, NULL, NULL);
 	if (ret) {
-		AMP_E("Failed to load image, ret=%d\n", ret);
-		return ret;
+		AMP_E("Load loadables, ret=%d\n", ret);
+		goto out;
 	}
-
-	/* flush */
 	flush_dcache_all();
 
+	/* Wakeup */
 	ret = brought_up_all_amp(images.fit_hdr_os, images.fit_uname_cfg);
+	if (ret)
+		AMP_E("Brought up amps, ret=%d\n", ret);
 out:
-	sysmem_free((phys_addr_t)fit);
+	free(fit);
 
 	return ret;
 }
 
 int arm64_switch_amp_pe(bootm_headers_t *images)
 {
-	images->os.arch = primary_pe_arch;
-	return primary_pe_state;
+	images->os.arch = g_bootcpu.arch;
+	return g_bootcpu.state;
 }
 

commit 5a7f594fe8cb37c91260c09af718be9ab50bfd82
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Aug 11 09:30:14 2021 +0800

    rockchip: smccc: Add arg2 for sip_smc_amp_cfg()
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I6435d2d721c75fd10aaa8de72b09aa8b1e72e43d

diff --git a/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h b/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
index 85d0bce943..e64fe64047 100644
--- a/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
+++ b/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
@@ -59,6 +59,8 @@
 
 /* SIP_AMP_CFG */
 #define AMP_PE_STATE			0x0
+#define AMP_BOOT_ARG01			0x1
+#define AMP_BOOT_ARG23			0x2
 
 /* Share mem page types */
 typedef enum {
@@ -80,7 +82,8 @@ int sip_smc_set_suspend_mode(unsigned long ctrl,
 /*
  * sip_smc_amp_cfg() - config AMP
  */
-int sip_smc_amp_cfg(unsigned long func, unsigned long arg0, unsigned long arg1);
+int sip_smc_amp_cfg(unsigned long func, unsigned long arg0, unsigned long arg1,
+		    unsigned long arg2);
 
 /*
  * sip_smc_dram() - Set dram configure for trust.
diff --git a/arch/arm/mach-rockchip/rockchip_smccc.c b/arch/arm/mach-rockchip/rockchip_smccc.c
index 0caa642294..76131568fc 100644
--- a/arch/arm/mach-rockchip/rockchip_smccc.c
+++ b/arch/arm/mach-rockchip/rockchip_smccc.c
@@ -61,11 +61,12 @@ int sip_smc_set_suspend_mode(unsigned long ctrl,
 	return res.a0;
 }
 
-int sip_smc_amp_cfg(unsigned long func, unsigned long arg0, unsigned long arg1)
+int sip_smc_amp_cfg(unsigned long func, unsigned long arg0, unsigned long arg1,
+		    unsigned long arg2)
 {
 	struct arm_smccc_res res;
 
-	res = __invoke_sip_fn_smc(SIP_AMP_CFG, func, arg0, arg1);
+	arm_smccc_smc(SIP_AMP_CFG, func, arg0, arg1, arg2, 0, 0, 0, &res);
 	return res.a0;
 }
 

commit 75ac0a02bdecb7f958f46a46aee2b969e053c4b7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Aug 11 09:30:50 2021 +0800

    rockchip: board: put amp_cpus_on() at the last
    
    Considering boot linux is required in this call, everything
    should be ready before it, eg: display.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I76594ee1d1a511026b14d96e90e7f0a5bbc2fa87

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 8929b0fd00..3fe057c804 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -371,9 +371,6 @@ int board_late_init(void)
 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0)
 	setup_boot_mode();
 #endif
-#ifdef CONFIG_AMP
-	amp_cpus_on();
-#endif
 #ifdef CONFIG_ROCKCHIP_USB_BOOT
 	boot_from_udisk();
 #endif
@@ -389,7 +386,9 @@ int board_late_init(void)
 	env_fixup();
 	soc_clk_dump();
 	cmdline_handle();
-
+#ifdef CONFIG_AMP
+	amp_cpus_on();
+#endif
 	return rk_board_late_init();
 }
 

commit 16db7697f169dda456a6edf499d701c33e66e20e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Aug 11 09:32:39 2021 +0800

    common: bootm: Add a path to unmask bootm states
    
    In some case, the board may want to fixup the bootm states,
    which is not able to be modified as it's the standard common
    API.
    
    So we provide a chance for board through env "bootm_states_unmask".
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I8064cc517f1ef042ea5e30644a809561b0c570a3

diff --git a/common/bootm.c b/common/bootm.c
index 6b15917ace..83fa281e96 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -686,6 +686,11 @@ int do_bootm_states(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
 	boot_os_fn *boot_fn;
 	ulong iflag = 0;
 	int ret = 0, need_boot_fn;
+	u32 unmask;
+
+	unmask = env_get_ulong("bootm_states_unmask", 16, 0);
+	if (unmask)
+		states &= ~unmask;
 
 	images->state |= states;
 

commit 9ed1c090c2af280fdf041a0ac1136928f4599d6b
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Aug 27 17:02:43 2021 +0800

    rockchip: rv1126: Keep GPIO0_D6 in default state when SFC is not used
    
    At the beginning, this is set to de-assert the wp# pin(GPIO0_D6) for
    spi flash. In fact, this is redundant for EMMC devices.
    
    Change-Id: Ide1b79145340f6d57b604d6a5c1fb385928cbc3e
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126.c b/arch/arm/mach-rockchip/rv1126/rv1126.c
index 2c1ae4b3b9..c1d640506a 100644
--- a/arch/arm/mach-rockchip/rv1126/rv1126.c
+++ b/arch/arm/mach-rockchip/rv1126/rv1126.c
@@ -730,9 +730,10 @@ int arch_cpu_init(void)
   #endif
 
 #endif
-
+#if defined(CONFIG_ROCKCHIP_SFC)
 	/* GPIO0_D6 pull down in default, pull up it for SPI Flash */
 	writel(((0x3 << 12) << 16) | (0x1 << 12), GRF1_GPIO0D_P);
+#endif
 
 	return 0;
 }

commit b6135784d1b7b15957924a25c3e67b21561cd745
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed Aug 25 10:40:32 2021 +0800

    spl: rkfw: Compatible with Nand MTD devices
    
    When bad block at the first block of the partition, all the valid
    image shift one Nand flash block and it can no longer be scanned by
    512KB scanning granularity.
    So change to use 128KB scanning granularity for better compatible.
    
    Change-Id: I65f8f089c074fc3eb83f1f6302760c842b3d1ecc
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/include/spl_rkfw.h b/include/spl_rkfw.h
index 00e1ea7477..2bd59c38a6 100644
--- a/include/spl_rkfw.h
+++ b/include/spl_rkfw.h
@@ -32,8 +32,13 @@
 /* Special value used to verify platform parameters from BL2 to BL3-1 */
 #define RK_BL31_PLAT_PARAM_VAL		0x0f1e2d3c4b5a6978ULL
 
+#ifdef CONFIG_MTD_NAND_CORE
+#define RKFW_RETRY_SECTOR_SIZE		256
+#define RKFW_RETRY_SECTOR_TIMES		32
+#else
 #define RKFW_RETRY_SECTOR_SIZE		1024
 #define RKFW_RETRY_SECTOR_TIMES		8
+#endif
 
 struct s_fip_name_id {
 	const char *name;

commit c6439a46133d492482d070a17b0ba522337c1909
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Aug 25 09:49:37 2021 +0800

    make.sh: Support pass "CROSS_COMPILE=..."
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ic612c349b4107d917c796e280eb17daa437a0713

diff --git a/make.sh b/make.sh
index 948284d7e2..a882ced67a 100755
--- a/make.sh
+++ b/make.sh
@@ -11,21 +11,9 @@ SUPPORT_LIST=`ls configs/*[r,p][x,v,k][0-9][0-9]*_defconfig`
 CMD_ARGS=$1
 
 ########################################### User can modify #############################################
-# User's rkbin tool relative path
 RKBIN_TOOLS=../rkbin/tools
-
-# User's GCC toolchain and relative path
-ADDR2LINE_ARM32=arm-linux-gnueabihf-addr2line
-ADDR2LINE_ARM64=aarch64-linux-gnu-addr2line
-OBJ_ARM32=arm-linux-gnueabihf-objdump
-OBJ_ARM64=aarch64-linux-gnu-objdump
-NM_ARM32=arm-linux-gnueabihf-nm
-NM_ARM64=aarch64-linux-gnu-nm
-GCC_ARM32=arm-linux-gnueabihf-
-GCC_ARM64=aarch64-linux-gnu-
-TOOLCHAIN_ARM32=../prebuilts/gcc/linux-x86/arm/gcc-linaro-6.3.1-2017.05-x86_64_arm-linux-gnueabihf/bin
-TOOLCHAIN_ARM64=../prebuilts/gcc/linux-x86/aarch64/gcc-linaro-6.3.1-2017.05-x86_64_aarch64-linux-gnu/bin
-
+CROSS_COMPILE_ARM32=../prebuilts/gcc/linux-x86/arm/gcc-linaro-6.3.1-2017.05-x86_64_arm-linux-gnueabihf/bin/arm-linux-gnueabihf-
+CROSS_COMPILE_ARM64=../prebuilts/gcc/linux-x86/aarch64/gcc-linaro-6.3.1-2017.05-x86_64_aarch64-linux-gnu/bin/aarch64-linux-gnu-
 ########################################### User not touch #############################################
 # Declare global INI file searching index name for every chip, update in select_chip_info()
 RKCHIP=
@@ -39,7 +27,7 @@ INI_LOADER=
 RKBIN=
 
 # Declare global toolchain path for CROSS_COMPILE, updated in select_toolchain()
-TOOLCHAIN_GCC=
+TOOLCHAIN=
 TOOLCHAIN_NM=
 TOOLCHAIN_OBJDUMP=
 TOOLCHAIN_ADDR2LINE=
@@ -58,7 +46,7 @@ SCRIPT_TOS="${SRCTREE}/scripts/tos.sh"
 SCRIPT_SPL="${SRCTREE}/scripts/spl.sh"
 SCRIPT_UBOOT="${SRCTREE}/scripts/uboot.sh"
 SCRIPT_LOADER="${SRCTREE}/scripts/loader.sh"
-
+CC_FILE=".cc"
 REP_DIR="./rep"
 #########################################################################################################
 function help()
@@ -131,6 +119,17 @@ function process_args()
 				help
 				exit 0
 				;;
+			CROSS_COMPILE=*)  # set CROSS_COMPILE
+				ARG_COMPILE="y"
+				CROSS_COMPILE_ARM32=${1#*=}
+				CROSS_COMPILE_ARM64=${1#*=}
+				if [ ${CMD_ARGS} == $1 ]; then
+					shift 1
+					CMD_ARGS=$1
+				else
+					shift 1
+				fi
+				;;
 			# '': build with exist .config
 			# loader|trust|uboot: pack image
 			# debug*|map|sym|elf*|nm: debug command
@@ -230,10 +229,12 @@ function process_args()
 						MAKE_CMD="make ${BASE0_DEFCONFIG} ${BASE1_DEFCONFIG} ${ARG_BOARD}.config -j${JOB}"
 						echo "## ${MAKE_CMD}"
 						make ${BASE0_DEFCONFIG} ${BASE1_DEFCONFIG} ${ARG_BOARD}.config ${OPTION}
+						rm -f ${CC_FILE}
 					else
 						MAKE_CMD="make ${ARG_BOARD}_defconfig -j${JOB}"
 						echo "## ${MAKE_CMD}"
 						make ${ARG_BOARD}_defconfig ${OPTION}
+						rm -f ${CC_FILE}
 					fi
 				fi
 				shift 1
@@ -251,28 +252,40 @@ function process_args()
 
 function select_toolchain()
 {
-	if grep -q '^CONFIG_ARM64=y' .config ; then
-		if [ -d ${TOOLCHAIN_ARM64} ]; then
-			absolute_path=$(cd `dirname ${TOOLCHAIN_ARM64}`; pwd)
-			TOOLCHAIN_NM=${absolute_path}/bin/${NM_ARM64}
-			TOOLCHAIN_GCC=${absolute_path}/bin/${GCC_ARM64}
-			TOOLCHAIN_OBJDUMP=${absolute_path}/bin/${OBJ_ARM64}
-			TOOLCHAIN_ADDR2LINE=${absolute_path}/bin/${ADDR2LINE_ARM64}
+	# If no outer CROSS_COMPILE, look for it from CC_FILE.
+	if [ "${ARG_COMPILE}" != "y" ]; then
+		if [ -f ${CC_FILE} ]; then
+			CROSS_COMPILE_ARM32=`cat ${CC_FILE}`
+			CROSS_COMPILE_ARM64=`cat ${CC_FILE}`
 		else
-			echo "ERROR: No toolchain: ${TOOLCHAIN_ARM64}"
-			exit 1
+			if grep -q '^CONFIG_ARM64=y' .config ; then
+				CROSS_COMPILE_ARM64=$(cd `dirname ${CROSS_COMPILE_ARM64}`; pwd)"/aarch64-linux-gnu-"
+			else
+				CROSS_COMPILE_ARM32=$(cd `dirname ${CROSS_COMPILE_ARM32}`; pwd)"/arm-linux-gnueabihf-"
+			fi
 		fi
+	fi
+
+	if grep -q '^CONFIG_ARM64=y' .config ; then
+		TOOLCHAIN=${CROSS_COMPILE_ARM64}
+		TOOLCHAIN_NM=${CROSS_COMPILE_ARM64}nm
+		TOOLCHAIN_OBJDUMP=${CROSS_COMPILE_ARM64}objdump
+		TOOLCHAIN_ADDR2LINE=${CROSS_COMPILE_ARM64}addr2line
 	else
-		if [ -d ${TOOLCHAIN_ARM32} ]; then
-			absolute_path=$(cd `dirname ${TOOLCHAIN_ARM32}`; pwd)
-			TOOLCHAIN_NM=${absolute_path}/bin/${NM_ARM32}
-			TOOLCHAIN_GCC=${absolute_path}/bin/${GCC_ARM32}
-			TOOLCHAIN_OBJDUMP=${absolute_path}/bin/${OBJ_ARM32}
-			TOOLCHAIN_ADDR2LINE=${absolute_path}/bin/${ADDR2LINE_ARM32}
-		else
-			echo "ERROR: No toolchain: ${TOOLCHAIN_ARM32}"
-			exit 1
-		fi
+		TOOLCHAIN=${CROSS_COMPILE_ARM32}
+		TOOLCHAIN_NM=${CROSS_COMPILE_ARM32}nm
+		TOOLCHAIN_OBJDUMP=${CROSS_COMPILE_ARM32}objdump
+		TOOLCHAIN_ADDR2LINE=${CROSS_COMPILE_ARM32}addr2line
+	fi
+
+	if ! which ${TOOLCHAIN}gcc ; then
+		echo "ERROR: No find ${TOOLCHAIN}gcc"
+		exit 1
+	fi
+
+	# save to CC_FILE
+	if [ "${ARG_COMPILE}" == "y" ]; then
+		echo "${TOOLCHAIN}" > ${CC_FILE}
 	fi
 }
 
@@ -424,7 +437,7 @@ function sub_commands()
 			exit 0
 			;;
 		env)
-			make CROSS_COMPILE=${TOOLCHAIN_GCC} envtools
+			make CROSS_COMPILE=${TOOLCHAIN} envtools
 			exit 0
 			;;
 		--idblock)
@@ -713,7 +726,7 @@ select_ini_file
 handle_args_late
 sub_commands
 clean_files
-make PYTHON=python2 CROSS_COMPILE=${TOOLCHAIN_GCC} all --jobs=${JOB}
+make PYTHON=python2 CROSS_COMPILE=${TOOLCHAIN} all --jobs=${JOB}
 pack_images
 finish
 date

commit 6e95faaf7feae4a81470dfdcb057034e140876de
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 26 14:43:12 2021 +0800

    Makefile: Clean more files
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I4c29022d66d54e5c1f11cf0388e00026aa341c29

diff --git a/Makefile b/Makefile
index ff76e85599..458b4b6915 100644
--- a/Makefile
+++ b/Makefile
@@ -1515,7 +1515,7 @@ CLEAN_DIRS  += $(MODVERDIR) \
 			$(filter-out include, $(shell ls -1 $d 2>/dev/null))))
 
 CLEAN_FILES += include/bmp_logo.h include/bmp_logo_data.h \
-	       boot* u-boot* MLO* SPL System.map fit-dtb.blob *.bin *.img
+	       boot* u-boot* MLO* SPL System.map fit-dtb.blob *.bin *.img *.gz .cc
 
 # Directories & files removed with 'make mrproper'
 MRPROPER_DIRS  += include/config include/generated spl tpl \

commit a649240119db045e59f769176ec20a5ca009fd7c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 26 14:27:32 2021 +0800

    tools: gitignore: Add bmp2gray16
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I0095e0b212f799a8bc6f5fbb785c015070ed2aa7

diff --git a/tools/.gitignore b/tools/.gitignore
index abc6c2dc86..6653c58a1f 100644
--- a/tools/.gitignore
+++ b/tools/.gitignore
@@ -33,3 +33,4 @@
 /loaderimage
 /checksum
 /resource_tool
+/bmp2gray16

commit fe414819d8ef47ad3a910be51cebb59006813905
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Aug 27 11:58:32 2021 +0800

    mmc: use the common macro definition
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ied62935e9b0ea0e116db05be22dde5e8c5e30aeb

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index d1cc6cf5ff..245f97f8db 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -2002,9 +2002,9 @@ static int mmc_startup(struct mmc *mmc)
 			return err;
 
 		if (mmc->card_caps & MMC_MODE_HS)
-			tran_speed = 50000000;
+			tran_speed = MMC_HIGH_52_MAX_DTR;
 		else
-			tran_speed = 25000000;
+			tran_speed = MMC_HIGH_26_MAX_DTR;
 
 		mmc_set_clock(mmc, tran_speed);
 	}

commit 9080840a1275f7afb13f922566d61971195f6fc7
Author: Wesley Yao <wesley.yao@rock-chips.com>
Date:   Tue Aug 24 18:12:57 2021 +0800

    drivers: ram: rv1126: Detect byte map of x16 DDR3/DDR4
    
    In dram_detect_cap, use return value of x32 read gate trn to detect byte
    map of x16 DDR3/DDR4
    
    Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
    Change-Id: I8ef0282ca51e9a014129ad57b68852e2bab95d07

diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
index 3b8de2a40b..beda92ed91 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -1601,10 +1601,7 @@ static int data_training_rg(struct dram_info *dram, u32 cs, u32 dramtype)
 	clrbits_le32(PHY_REG(phy_base, 2), 0x30);
 	pctl_rest_zqcs_aref(dram->pctl, dis_auto_zq);
 
-	if (ret & 0x20)
-		ret = -1;
-	else
-		ret = (ret & 0xf) ^ (readl(PHY_REG(phy_base, 0xf)) & 0xf);
+	ret = (ret & 0x2f) ^ (readl(PHY_REG(phy_base, 0xf)) & 0xf);
 
 	if (dramtype != LPDDR4 || dramtype != LPDDR4X) {
 		for (i = 0; i < 4; i++) {
@@ -2574,6 +2571,10 @@ static u64 dram_detect_cap(struct dram_info *dram,
 	u32 pwrctl;
 	u32 i, dq_map;
 	u32 byte1 = 0, byte0 = 0;
+	u32 tmp, byte;
+	struct sdram_head_info_index_v2 *index = (struct sdram_head_info_index_v2 *)common_info;
+	struct dq_map_info *map_info = (struct dq_map_info *)
+				       ((void *)common_info + index->dq_map_index.offset * 4);
 
 	cap_info->bw = dram_type == DDR3 ? 0 : 1;
 	if (dram_type != LPDDR4 && dram_type != LPDDR4X) {
@@ -2641,22 +2642,43 @@ static u64 dram_detect_cap(struct dram_info *dram,
 
 	setbits_le32(PHY_REG(phy_base, 0xf), 0xf);
 
-	if (data_training(dram, 0, sdram_params, 0, READ_GATE_TRAINING) == 0) {
+	tmp = data_training_rg(dram, 0, dram_type) & 0xf;
+
+	if (tmp == 0) {
 		cap_info->bw = 2;
 	} else {
-		dq_map = readl(PHY_REG(phy_base, 0x4f));
-		for (i = 0; i < 4; i++) {
-			if (((dq_map >> (i * 2)) & 0x3) == 0)
-				byte0 = i;
-			if (((dq_map >> (i * 2)) & 0x3) == 1)
-				byte1 = i;
+		if (dram_type == DDR3 || dram_type == DDR4) {
+			dq_map = 0;
+			byte = 0;
+			for (i = 0; i < 4; i++) {
+				if ((tmp & BIT(i)) == 0) {
+					dq_map |= byte << (i * 2);
+					byte++;
+				}
+			}
+			cap_info->bw = byte / 2;
+			for (i = 0; i < 4; i++) {
+				if ((tmp & BIT(i)) != 0) {
+					dq_map |= byte << (i * 2);
+					byte++;
+				}
+			}
+			clrsetbits_le32(&map_info->byte_map[0], 0xff << 24, dq_map << 24);
+		} else {
+			dq_map = readl(PHY_REG(phy_base, 0x4f));
+			for (i = 0; i < 4; i++) {
+				if (((dq_map >> (i * 2)) & 0x3) == 0)
+					byte0 = i;
+				if (((dq_map >> (i * 2)) & 0x3) == 1)
+					byte1 = i;
+			}
+			clrsetbits_le32(PHY_REG(phy_base, 0xf), PHY_DQ_WIDTH_MASK,
+					BIT(byte0) | BIT(byte1));
+			if (data_training(dram, 0, sdram_params, 0, READ_GATE_TRAINING) == 0)
+				cap_info->bw = 1;
+			else
+				cap_info->bw = 0;
 		}
-		clrsetbits_le32(PHY_REG(phy_base, 0xf), PHY_DQ_WIDTH_MASK,
-				BIT(byte0) | BIT(byte1));
-		if (data_training(dram, 0, sdram_params, 0, READ_GATE_TRAINING) == 0)
-			cap_info->bw = 1;
-		else
-			cap_info->bw = 0;
 	}
 	if (cap_info->bw > 0)
 		cap_info->dbw = 1;

commit daf1d5f9adbce10dae3bfec014ea163500b86e1a
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Wed Aug 25 16:17:12 2021 +0800

    clk: rockchip: rk3308: fix up the sclk_rtc32k setting error
    
    Change-Id: I67bb28823c0f031c2523c4174763c567aa43f43c
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index 23e1254dbd..725a5e2e05 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -883,7 +883,7 @@ static ulong rk3308_rtc32k_set_clk(struct rk3308_clk_priv *priv, ulong clk_id,
 				    &m, &n);
 	val = m << CLK_RTC32K_FRAC_NUMERATOR_SHIFT | n;
 	writel(val, &cru->clksel_con[3]);
-	rk_clrsetreg(&cru->clkgate_con[2], CLK_RTC32K_SEL_MASK,
+	rk_clrsetreg(&cru->clksel_con[2], CLK_RTC32K_SEL_MASK,
 		     CLK_RTC32K_FRAC_DIV << CLK_RTC32K_SEL_SHIFT);
 
 	return rk3308_rtc32k_get_clk(priv, clk_id);

commit ff2f1e412efdf5f367369e893e19e858c7817b0f
Author: Shawn Lin <shawn.lin@rock-chips.com>
Date:   Tue Aug 24 16:04:55 2021 +0800

    driver: pci: rockchip: move switch recovery delay into linkup event
    
    Change-Id: I4bc11b178483acce5960a5bf95b52c960e22e0b3
    Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

diff --git a/drivers/pci/pcie_dw_rockchip.c b/drivers/pci/pcie_dw_rockchip.c
index 55b5e8d000..bf6dec7b74 100644
--- a/drivers/pci/pcie_dw_rockchip.c
+++ b/drivers/pci/pcie_dw_rockchip.c
@@ -534,6 +534,8 @@ static int rk_pcie_link_up(struct rk_pcie *priv, u32 cap_speed)
 			dev_info(priv->dev, "PCIe Link up, LTSSM is 0x%x\n",
 				 rk_pcie_readl_apb(priv, PCIE_CLIENT_LTSSM_STATUS));
 			rk_pcie_debug_dump(priv);
+			/* Link maybe in Gen switch recovery but we need to wait more 1s */
+			msleep(1000);
 			return 0;
 		}
 
@@ -544,8 +546,6 @@ static int rk_pcie_link_up(struct rk_pcie *priv, u32 cap_speed)
 	}
 
 	dev_err(priv->dev, "PCIe-%d Link Fail\n", priv->dev->seq);
-	/* Link maybe in Gen switch recovery but we need to wait more 1s */
-	msleep(1000);
 	return -EINVAL;
 }
 

commit ac408c8e7bdc1f085394e015e7a04ebbc7e7123c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Aug 23 17:32:00 2021 +0800

    rockchip: vendor: fix compiler error on gcc 8.3
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I0cff40265c36e81b9296e45f12b3213496422f1f

diff --git a/arch/arm/mach-rockchip/vendor.c b/arch/arm/mach-rockchip/vendor.c
index 51fa0de172..048cb982e6 100644
--- a/arch/arm/mach-rockchip/vendor.c
+++ b/arch/arm/mach-rockchip/vendor.c
@@ -792,6 +792,7 @@ int vendor_storage_test(void)
 		size = total_size / item_num;
 		break;
 	default:
+		item_num = 0;
 		total_size = 0;
 		break;
 	}

commit dc582bb7a4500c3910051335da29c5983e1b9d52
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Aug 23 17:13:16 2021 +0800

    cmd: Add "atags" to dump all rk atags
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I56dd137efaf4bd4adf9a734fefd1f0485a616549

diff --git a/cmd/Kconfig b/cmd/Kconfig
index ebd9e8fb05..b892e9efee 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1637,6 +1637,12 @@ endmenu
 
 menu "Debug commands"
 
+config CMD_ATAGS
+	bool "atags - Dump all rockchip atags"
+	default y
+	help
+	  This command dump all rockchip atags.
+
 config CMD_BEDBUG
 	bool "bedbug"
 	help
diff --git a/cmd/Makefile b/cmd/Makefile
index b2c7dcd4a6..6b29c0047d 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -174,6 +174,7 @@ obj-$(CONFIG_CMD_DVFS) += dvfs.o
 obj-$(CONFIG_CMD_BLOB) += blob.o
 
 obj-$(CONFIG_ARCH_ROCKCHIP) += rkimgtest.o
+obj-$(CONFIG_CMD_ATAGS) += atags.o
 
 endif # !CONFIG_SPL_BUILD
 
diff --git a/cmd/atags.c b/cmd/atags.c
new file mode 100644
index 0000000000..f8d6242e4e
--- /dev/null
+++ b/cmd/atags.c
@@ -0,0 +1,201 @@
+// SPDX-License-Identifier:     GPL-2.0+
+/*
+ * (C) Copyright 2021 Rockchip Electronics Co., Ltd.
+ *
+ */
+
+#include <common.h>
+#include <asm/arch/rk_atags.h>
+#if CONFIG_IS_ENABLED(TINY_FRAMEWORK)
+#include <debug_uart.h>
+#endif
+
+static void atags_stat(void)
+{
+	u32 start = ATAGS_PHYS_BASE, end = ATAGS_PHYS_BASE + ATAGS_SIZE;
+	u32 in_use = 0, in_available = 0;
+	struct tag *t;
+
+	if (!atags_is_available())
+		return;
+
+	for_each_tag(t, (struct tag *)ATAGS_PHYS_BASE) {
+		if (atags_overflow(t))
+			return;
+
+		if (atags_bad_magic(t->hdr.magic))
+			return;
+
+		in_use += (t->hdr.size << 2);
+	}
+
+	in_available = ATAGS_SIZE - in_use;
+
+	printf("ATAGS state:\n");
+	printf("              addr = 0x%08x ~ 0x%08x\n", start, end);
+	printf("        Total size = 0x%08x\n", ATAGS_SIZE);
+	printf("       in use size = 0x%08x\n", in_use);
+	printf("    available size = 0x%08x\n", in_available);
+}
+
+static void atags_print_tag(struct tag *t)
+{
+	u32 i;
+
+	if (!t)
+		return;
+
+	switch (t->hdr.magic) {
+	case ATAG_SERIAL:
+		printf("[serial]:\n");
+		printf("     magic = 0x%x\n", t->hdr.magic);
+		printf("      size = 0x%x\n\n", t->hdr.size << 2);
+		printf("   version = 0x%x\n", t->u.serial.version);
+		printf("    enable = 0x%x\n", t->u.serial.enable);
+		printf("      addr = 0x%llx\n", t->u.serial.addr);
+		printf("  baudrate = %d\n", t->u.serial.baudrate);
+		printf("    m_mode = 0x%x\n", t->u.serial.m_mode);
+		printf("        id = 0x%x\n", t->u.serial.id);
+		for (i = 0; i < ARRAY_SIZE(t->u.serial.reserved); i++)
+			printf("    res[%d] = 0x%x\n", i, t->u.serial.reserved[i]);
+		printf("      hash = 0x%x\n", t->u.serial.hash);
+		break;
+	case ATAG_BOOTDEV:
+		printf("[bootdev]:\n");
+		printf("     magic = 0x%x\n", t->hdr.magic);
+		printf("      size = 0x%x\n\n", t->hdr.size << 2);
+		printf("   version = 0x%x\n", t->u.bootdev.version);
+		printf("   devtype = 0x%x\n", t->u.bootdev.devtype);
+		printf("    devnum = 0x%x\n", t->u.bootdev.devnum);
+		printf("      mode = 0x%x\n", t->u.bootdev.mode);
+		for (i = 0; i < ARRAY_SIZE(t->u.bootdev.reserved); i++)
+			printf("    res[%d] = 0x%x\n",
+			       i, t->u.bootdev.reserved[i]);
+		printf("      hash = 0x%x\n", t->u.bootdev.hash);
+		break;
+	case ATAG_TOS_MEM:
+		printf("[tos_mem]:\n");
+		printf("     magic = 0x%x\n", t->hdr.magic);
+		printf("      size = 0x%x\n\n", t->hdr.size << 2);
+		printf("   version = 0x%x\n", t->u.tos_mem.version);
+		printf("   tee_mem:\n");
+		printf("            name = %s\n", t->u.tos_mem.tee_mem.name);
+		printf("        phy_addr = 0x%llx\n", t->u.tos_mem.tee_mem.phy_addr);
+		printf("            size = 0x%x\n", t->u.tos_mem.tee_mem.size);
+		printf("           flags = 0x%x\n", t->u.tos_mem.tee_mem.flags);
+		printf("   drm_mem:\n");
+		printf("            name = %s\n", t->u.tos_mem.drm_mem.name);
+		printf("        phy_addr = 0x%llx\n", t->u.tos_mem.drm_mem.phy_addr);
+		printf("            size = 0x%x\n", t->u.tos_mem.drm_mem.size);
+		printf("           flags = 0x%x\n", t->u.tos_mem.drm_mem.flags);
+		for (i = 0; i < ARRAY_SIZE(t->u.tos_mem.reserved); i++)
+			printf("   res[%d] = 0x%llx\n", i, t->u.tos_mem.reserved[i]);
+		printf("     res1 = 0x%x\n", t->u.tos_mem.reserved1);
+		printf("     hash = 0x%x\n", t->u.tos_mem.hash);
+		break;
+	case ATAG_DDR_MEM:
+		printf("[ddr_mem]:\n");
+		printf("     magic = 0x%x\n", t->hdr.magic);
+		printf("      size = 0x%x\n\n", t->hdr.size << 2);
+		printf("     count = 0x%x\n", t->u.ddr_mem.count);
+		printf("   version = 0x%x\n", t->u.ddr_mem.version);
+		for (i = 0; i < ARRAY_SIZE(t->u.ddr_mem.bank); i++)
+			printf("  bank[%d] = 0x%llx\n", i, t->u.ddr_mem.bank[i]);
+		for (i = 0; i < ARRAY_SIZE(t->u.ddr_mem.reserved); i++)
+			printf("    res[%d] = 0x%x\n", i, t->u.ddr_mem.reserved[i]);
+		printf("      hash = 0x%x\n", t->u.ddr_mem.hash);
+		break;
+	case ATAG_RAM_PARTITION:
+		printf("[ram_partition]:\n");
+		printf("     magic = 0x%x\n", t->hdr.magic);
+		printf("   version = 0x%x\n", t->u.ram_part.version);
+		printf("     count = 0x%x\n", t->u.ram_part.count);
+		for (i = 0; i < ARRAY_SIZE(t->u.ram_part.reserved); i++)
+			printf("    res[%d] = 0x%x\n", i, t->u.ram_part.reserved[i]);
+
+		printf("    Part:  Name       Start Addr      Size\t\n");
+		for (i = 0; i < ARRAY_SIZE(t->u.ram_part.part); i++)
+			printf("%16s      0x%08llx      0x%08llx\n",
+			       t->u.ram_part.part[i].name,
+			       t->u.ram_part.part[i].start,
+			       t->u.ram_part.part[i].size);
+		for (i = 0; i < ARRAY_SIZE(t->u.ram_part.reserved1); i++)
+			printf("   res1[%d] = 0x%x\n", i, t->u.ram_part.reserved1[i]);
+		printf("      hash = 0x%x\n", t->u.ram_part.hash);
+		break;
+	case ATAG_ATF_MEM:
+		printf("[atf_mem]:\n");
+		printf("     magic = 0x%x\n", t->hdr.magic);
+		printf("      size = 0x%x\n\n", t->hdr.size << 2);
+		printf("   version = 0x%x\n", t->u.atf_mem.version);
+		printf("  phy_addr = 0x%llx\n", t->u.atf_mem.phy_addr);
+		printf("      size = 0x%x\n", t->u.atf_mem.size);
+		for (i = 0; i < ARRAY_SIZE(t->u.atf_mem.reserved); i++)
+			printf("    res[%d] = 0x%x\n", i, t->u.atf_mem.reserved[i]);
+		printf("      hash = 0x%x\n", t->u.atf_mem.hash);
+		break;
+	case ATAG_PUB_KEY:
+		printf("[pub_key_mem]:\n");
+		printf("     magic = 0x%x\n", t->hdr.magic);
+		printf("      size = 0x%x\n\n", t->hdr.size << 2);
+		printf("   version = 0x%x\n", t->u.pub_key.version);
+		printf("      hash = 0x%x\n", t->u.pub_key.hash);
+		break;
+	case ATAG_SOC_INFO:
+		printf("[soc_info]:\n");
+		printf("     magic = 0x%x\n", t->hdr.magic);
+		printf("      size = 0x%x\n\n", t->hdr.size << 2);
+		printf("   version = 0x%x\n", t->u.soc.version);
+		printf("      name = 0x%x\n", t->u.soc.name);
+		printf("     flags = 0x%x\n", t->u.soc.flags);
+		for (i = 0; i < ARRAY_SIZE(t->u.soc.reserved); i++)
+			printf("    res[%d] = 0x%x\n", i, t->u.soc.reserved[i]);
+		printf("      hash = 0x%x\n", t->u.soc.hash);
+		break;
+	case ATAG_CORE:
+		printf("[core]:\n");
+		printf("     magic = 0x%x\n", t->hdr.magic);
+		printf("      size = 0x%x\n\n", t->hdr.size << 2);
+		printf("     flags = 0x%x\n", t->u.core.flags);
+		printf("  pagesize = 0x%x\n", t->u.core.pagesize);
+		printf("   rootdev = 0x%x\n", t->u.core.rootdev);
+		break;
+	default:
+		printf("%s: magic(%x) is not support\n", __func__, t->hdr.magic);
+	}
+
+	printf("\n");
+}
+
+static void atags_print_all_tags(void)
+{
+	struct tag *t;
+
+	if (!atags_is_available())
+		return;
+
+	for_each_tag(t, (struct tag *)ATAGS_PHYS_BASE) {
+		if (atags_overflow(t))
+			return;
+
+		if (atags_bad_magic(t->hdr.magic))
+			return;
+
+		atags_print_tag(t);
+	}
+}
+
+static int do_dump_atags(cmd_tbl_t *cmdtp, int flag,
+			 int argc, char * const argv[])
+{
+	atags_print_all_tags();
+	atags_stat();
+
+	return 0;
+}
+
+U_BOOT_CMD(
+	atags, 1, 1, do_dump_atags,
+	"Dump all atags",
+	""
+);

commit 4a88dd6312701feb0cf38989c886f59dde62d122
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Aug 23 17:12:09 2021 +0800

    rockchip: rk atags: Remove command and tidy up header file
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I84d7fbcec81a0f3e82a1f0836cfcdeb544cd2f17

diff --git a/arch/arm/include/asm/arch-rockchip/rk_atags.h b/arch/arm/include/asm/arch-rockchip/rk_atags.h
index df376d47d8..ab40702b16 100644
--- a/arch/arm/include/asm/arch-rockchip/rk_atags.h
+++ b/arch/arm/include/asm/arch-rockchip/rk_atags.h
@@ -180,6 +180,10 @@ struct tag {
 	} u;
 } __aligned(4);
 
+#define tag_next(t)	((struct tag *)((u32 *)(t) + (t)->hdr.size))
+#define tag_size(type)	((sizeof(struct tag_header) + sizeof(struct type)) >> 2)
+#define for_each_tag(t, base)		\
+	for (t = base; t->hdr.size; t = tag_next(t))
 /*
  * Destroy atags
  *
@@ -216,6 +220,20 @@ struct tag *atags_get_tag(u32 magic);
  */
 int atags_is_available(void);
 
+/*
+ * atags_overflow - check if atags is overflow
+ *
+ * return: 0 if not overflow, otherwise overflow.
+ */
+int atags_overflow(struct tag *t);
+
+/*
+ * atags_bad_magic - check if atags magic is invalid.
+ *
+ * return: 1 if invalid, otherwise valid.
+ */
+int atags_bad_magic(u32 magic);
+
 #ifdef CONFIG_SPL_BUILD
 /*
  * get_bootdev_by_brom_bootsource
@@ -265,18 +283,6 @@ int atags_set_bootdev_by_spl_bootdevice(int bootdevice);
 int atags_set_pub_key(void *data, int len, int flag);
 #endif
 
-/* Print only one tag */
-void atags_print_tag(struct tag *t);
-
-/* Print all tags */
-void atags_print_all_tags(void);
-
-/* An atags example test */
-void atags_test(void);
-
-/* Atags stat */
-void atags_stat(void);
-
 #if CONFIG_IS_ENABLED(TINY_FRAMEWORK) &&		\
 	!CONFIG_IS_ENABLED(LIBGENERIC_SUPPORT) &&	\
 	!CONFIG_IS_ENABLED(USE_ARCH_MEMSET)
diff --git a/arch/arm/mach-rockchip/rk_atags.c b/arch/arm/mach-rockchip/rk_atags.c
index de7d9c2765..f58210cd3a 100644
--- a/arch/arm/mach-rockchip/rk_atags.c
+++ b/arch/arm/mach-rockchip/rk_atags.c
@@ -13,10 +13,6 @@
 #endif
 
 #define HASH_LEN	sizeof(u32)
-#define tag_next(t)	((struct tag *)((u32 *)(t) + (t)->hdr.size))
-#define tag_size(type)	((sizeof(struct tag_header) + sizeof(struct type)) >> 2)
-#define for_each_tag(t, base)		\
-	for (t = base; t->hdr.size; t = tag_next(t))
 
 #if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
 /*
@@ -134,7 +130,7 @@ static u32 js_hash(void *buf, u32 len)
 	return hash;
 }
 
-static int bad_magic(u32 magic)
+int atags_bad_magic(u32 magic)
 {
 	bool bad;
 
@@ -157,7 +153,7 @@ static int inline atags_size_overflow(struct tag *t, u32 tag_size)
 	return (unsigned long)t + (tag_size << 2) - ATAGS_PHYS_BASE > ATAGS_SIZE;
 }
 
-static int atags_overflow(struct tag *t)
+int atags_overflow(struct tag *t)
 {
 	bool overflow;
 
@@ -194,7 +190,7 @@ int atags_set_tag(u32 magic, void *tagdata)
 	if (!tagdata)
 		return -ENODATA;
 
-	if (bad_magic(magic))
+	if (atags_bad_magic(magic))
 		return -EINVAL;
 
 	/* Not allowed to be set by user directly, so do nothing */
@@ -216,7 +212,7 @@ int atags_set_tag(u32 magic, void *tagdata)
 			if (atags_overflow(t))
 				return -EINVAL;
 
-			if (bad_magic(t->hdr.magic))
+			if (atags_bad_magic(t->hdr.magic))
 				return -EINVAL;
 
 			/* This is an old tag, override it */
@@ -293,7 +289,7 @@ struct tag *atags_get_tag(u32 magic)
 		if (atags_overflow(t))
 			return NULL;
 
-		if (bad_magic(t->hdr.magic))
+		if (atags_bad_magic(t->hdr.magic))
 			return NULL;
 
 		if (t->hdr.magic != magic)
@@ -387,194 +383,3 @@ void atags_destroy(void)
 		memset((char *)ATAGS_PHYS_BASE, 0, sizeof(struct tag));
 }
 
-#ifndef CONFIG_SPL_BUILD
-void atags_stat(void)
-{
-	u32 start = ATAGS_PHYS_BASE, end = ATAGS_PHYS_BASE + ATAGS_SIZE;
-	u32 in_use = 0, in_available = 0;
-	struct tag *t;
-
-	if (!atags_is_available())
-		return;
-
-	for_each_tag(t, (struct tag *)ATAGS_PHYS_BASE) {
-		if (atags_overflow(t))
-			return;
-
-		if (bad_magic(t->hdr.magic))
-			return;
-
-		in_use += (t->hdr.size << 2);
-	}
-
-	in_available = ATAGS_SIZE - in_use;
-
-	printf("ATAGS state:\n");
-	printf("              addr = 0x%08x ~ 0x%08x\n", start, end);
-	printf("        Total size = 0x%08x\n", ATAGS_SIZE);
-	printf("       in use size = 0x%08x\n", in_use);
-	printf("    available size = 0x%08x\n", in_available);
-}
-
-void atags_print_tag(struct tag *t)
-{
-	u32 i;
-
-	if (!t)
-		return;
-
-	switch (t->hdr.magic) {
-	case ATAG_SERIAL:
-		printf("[serial]:\n");
-		printf("     magic = 0x%x\n", t->hdr.magic);
-		printf("      size = 0x%x\n\n", t->hdr.size << 2);
-		printf("   version = 0x%x\n", t->u.serial.version);
-		printf("    enable = 0x%x\n", t->u.serial.enable);
-		printf("      addr = 0x%llx\n", t->u.serial.addr);
-		printf("  baudrate = %d\n", t->u.serial.baudrate);
-		printf("    m_mode = 0x%x\n", t->u.serial.m_mode);
-		printf("        id = 0x%x\n", t->u.serial.id);
-		for (i = 0; i < ARRAY_SIZE(t->u.serial.reserved); i++)
-			printf("    res[%d] = 0x%x\n", i, t->u.serial.reserved[i]);
-		printf("      hash = 0x%x\n", t->u.serial.hash);
-		break;
-	case ATAG_BOOTDEV:
-		printf("[bootdev]:\n");
-		printf("     magic = 0x%x\n", t->hdr.magic);
-		printf("      size = 0x%x\n\n", t->hdr.size << 2);
-		printf("   version = 0x%x\n", t->u.bootdev.version);
-		printf("   devtype = 0x%x\n", t->u.bootdev.devtype);
-		printf("    devnum = 0x%x\n", t->u.bootdev.devnum);
-		printf("      mode = 0x%x\n", t->u.bootdev.mode);
-		for (i = 0; i < ARRAY_SIZE(t->u.bootdev.reserved); i++)
-			printf("    res[%d] = 0x%x\n",
-			       i, t->u.bootdev.reserved[i]);
-		printf("      hash = 0x%x\n", t->u.bootdev.hash);
-		break;
-	case ATAG_TOS_MEM:
-		printf("[tos_mem]:\n");
-		printf("     magic = 0x%x\n", t->hdr.magic);
-		printf("      size = 0x%x\n\n", t->hdr.size << 2);
-		printf("   version = 0x%x\n", t->u.tos_mem.version);
-		printf("   tee_mem:\n");
-		printf("            name = %s\n", t->u.tos_mem.tee_mem.name);
-		printf("        phy_addr = 0x%llx\n", t->u.tos_mem.tee_mem.phy_addr);
-		printf("            size = 0x%x\n", t->u.tos_mem.tee_mem.size);
-		printf("           flags = 0x%x\n", t->u.tos_mem.tee_mem.flags);
-		printf("   drm_mem:\n");
-		printf("            name = %s\n", t->u.tos_mem.drm_mem.name);
-		printf("        phy_addr = 0x%llx\n", t->u.tos_mem.drm_mem.phy_addr);
-		printf("            size = 0x%x\n", t->u.tos_mem.drm_mem.size);
-		printf("           flags = 0x%x\n", t->u.tos_mem.drm_mem.flags);
-		for (i = 0; i < ARRAY_SIZE(t->u.tos_mem.reserved); i++)
-			printf("   res[%d] = 0x%llx\n", i, t->u.tos_mem.reserved[i]);
-		printf("     res1 = 0x%x\n", t->u.tos_mem.reserved1);
-		printf("     hash = 0x%x\n", t->u.tos_mem.hash);
-		break;
-	case ATAG_DDR_MEM:
-		printf("[ddr_mem]:\n");
-		printf("     magic = 0x%x\n", t->hdr.magic);
-		printf("      size = 0x%x\n\n", t->hdr.size << 2);
-		printf("     count = 0x%x\n", t->u.ddr_mem.count);
-		printf("   version = 0x%x\n", t->u.ddr_mem.version);
-		for (i = 0; i < ARRAY_SIZE(t->u.ddr_mem.bank); i++)
-			printf("  bank[%d] = 0x%llx\n", i, t->u.ddr_mem.bank[i]);
-		for (i = 0; i < ARRAY_SIZE(t->u.ddr_mem.reserved); i++)
-			printf("    res[%d] = 0x%x\n", i, t->u.ddr_mem.reserved[i]);
-		printf("      hash = 0x%x\n", t->u.ddr_mem.hash);
-		break;
-	case ATAG_RAM_PARTITION:
-		printf("[ram_partition]:\n");
-		printf("     magic = 0x%x\n", t->hdr.magic);
-		printf("   version = 0x%x\n", t->u.ram_part.version);
-		printf("     count = 0x%x\n", t->u.ram_part.count);
-		for (i = 0; i < ARRAY_SIZE(t->u.ram_part.reserved); i++)
-			printf("    res[%d] = 0x%x\n", i, t->u.ram_part.reserved[i]);
-
-		printf("    Part:  Name       Start Addr      Size\t\n");
-		for (i = 0; i < ARRAY_SIZE(t->u.ram_part.part); i++)
-			printf("%16s      0x%08llx      0x%08llx\n",
-			       t->u.ram_part.part[i].name,
-			       t->u.ram_part.part[i].start,
-			       t->u.ram_part.part[i].size);
-		for (i = 0; i < ARRAY_SIZE(t->u.ram_part.reserved1); i++)
-			printf("   res1[%d] = 0x%x\n", i, t->u.ram_part.reserved1[i]);
-		printf("      hash = 0x%x\n", t->u.ram_part.hash);
-		break;
-	case ATAG_ATF_MEM:
-		printf("[atf_mem]:\n");
-		printf("     magic = 0x%x\n", t->hdr.magic);
-		printf("      size = 0x%x\n\n", t->hdr.size << 2);
-		printf("   version = 0x%x\n", t->u.atf_mem.version);
-		printf("  phy_addr = 0x%llx\n", t->u.atf_mem.phy_addr);
-		printf("      size = 0x%x\n", t->u.atf_mem.size);
-		for (i = 0; i < ARRAY_SIZE(t->u.atf_mem.reserved); i++)
-			printf("    res[%d] = 0x%x\n", i, t->u.atf_mem.reserved[i]);
-		printf("      hash = 0x%x\n", t->u.atf_mem.hash);
-		break;
-	case ATAG_PUB_KEY:
-		printf("[pub_key_mem]:\n");
-		printf("     magic = 0x%x\n", t->hdr.magic);
-		printf("      size = 0x%x\n\n", t->hdr.size << 2);
-		printf("   version = 0x%x\n", t->u.pub_key.version);
-		printf("      hash = 0x%x\n", t->u.pub_key.hash);
-		break;
-	case ATAG_SOC_INFO:
-		printf("[soc_info]:\n");
-		printf("     magic = 0x%x\n", t->hdr.magic);
-		printf("      size = 0x%x\n\n", t->hdr.size << 2);
-		printf("   version = 0x%x\n", t->u.soc.version);
-		printf("      name = 0x%x\n", t->u.soc.name);
-		printf("     flags = 0x%x\n", t->u.soc.flags);
-		for (i = 0; i < ARRAY_SIZE(t->u.soc.reserved); i++)
-			printf("    res[%d] = 0x%x\n", i, t->u.soc.reserved[i]);
-		printf("      hash = 0x%x\n", t->u.soc.hash);
-		break;
-	case ATAG_CORE:
-		printf("[core]:\n");
-		printf("     magic = 0x%x\n", t->hdr.magic);
-		printf("      size = 0x%x\n\n", t->hdr.size << 2);
-		printf("     flags = 0x%x\n", t->u.core.flags);
-		printf("  pagesize = 0x%x\n", t->u.core.pagesize);
-		printf("   rootdev = 0x%x\n", t->u.core.rootdev);
-		break;
-	default:
-		printf("%s: magic(%x) is not support\n", __func__, t->hdr.magic);
-	}
-
-	printf("\n");
-}
-
-void atags_print_all_tags(void)
-{
-	struct tag *t;
-
-	if (!atags_is_available())
-		return;
-
-	for_each_tag(t, (struct tag *)ATAGS_PHYS_BASE) {
-		if (atags_overflow(t))
-			return;
-
-		if (bad_magic(t->hdr.magic))
-			return;
-
-		atags_print_tag(t);
-	}
-}
-
-static int do_dump_atags(cmd_tbl_t *cmdtp, int flag,
-			 int argc, char * const argv[])
-{
-	atags_print_all_tags();
-	atags_stat();
-
-	return 0;
-}
-
-U_BOOT_CMD(
-	dump_atags, 1, 1, do_dump_atags,
-	"Dump the content of the atags",
-	""
-);
-#endif

commit e580435dfdf843845fc69b7e64222c0044a841ef
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Aug 23 16:56:20 2021 +0800

    common: Makefile: build xyzModem if CONFIG_CMD_LOADB=y
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ia0a157c94ee263326672bc6956d274e432ae3c36

diff --git a/common/Makefile b/common/Makefile
index 9a46d8ad58..3e714a1c78 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -158,7 +158,7 @@ obj-y += command.o
 obj-$(CONFIG_$(SPL_)LOG) += log.o
 obj-$(CONFIG_$(SPL_)LOG_CONSOLE) += log_console.o
 obj-y += s_record.o
-obj-y += xyzModem.o
+obj-$(CONFIG_CMD_LOADB) += xyzModem.o
 
 ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_IO_TRACE) += iotrace.o

commit 0462391c21dcab1d7090e180cc84c4024b6aef64
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Aug 23 16:49:18 2021 +0800

    cmd: boot: move "rbrom" out of CONFIG_CMD_GO
    
    It's not reasonable to put it under the control CONFIG_CMD_GO.
    Therefore we can disable CONFIG_CMD_GO in defconfig.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I6c378b5fa9fa43931fcc4b52d513a93ae3f5ecd2

diff --git a/cmd/boot.c b/cmd/boot.c
index b814c67d93..8c2ebf2f9e 100644
--- a/cmd/boot.c
+++ b/cmd/boot.c
@@ -47,14 +47,6 @@ static int do_go(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return rcode;
 }
 
-static int do_reboot_brom(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
-	writel(BOOT_BROM_DOWNLOAD, CONFIG_ROCKCHIP_BOOT_MODE_REG);
-	do_reset(NULL, 0, 0, NULL);
-
-	return 0;
-}
-
 /* -------------------------------------------------------------------- */
 
 U_BOOT_CMD(
@@ -63,6 +55,15 @@ U_BOOT_CMD(
 	"addr [arg ...]\n    - start application at address 'addr'\n"
 	"      passing 'arg' as arguments"
 );
+#endif
+
+static int do_reboot_brom(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+	writel(BOOT_BROM_DOWNLOAD, CONFIG_ROCKCHIP_BOOT_MODE_REG);
+	do_reset(NULL, 0, 0, NULL);
+
+	return 0;
+}
 
 U_BOOT_CMD_ALWAYS(
 	rbrom, 1, 0,	do_reboot_brom,
@@ -70,12 +71,10 @@ U_BOOT_CMD_ALWAYS(
 	""
 );
 
-#endif
-
 U_BOOT_CMD(
-        reset, 2, 0,    do_reset,
-        "Perform RESET of the CPU",
-        ""
+	reset, 2, 0,    do_reset,
+	"Perform RESET of the CPU",
+	""
 );
 
 U_BOOT_CMD(

commit 7404cdacadebdd8fcb587e42253b90a271432785
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Aug 23 16:36:17 2021 +0800

    Kconfig: fit: don't select MD5 and SHA1
    
    - Allow us to remove them from defconfig.
    - We prefer SHA256 at least which has been selected
      by FIT_ENABLE_SHA256_SUPPORT.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I3995bd91996a581d979524f849221a46c210a324

diff --git a/Kconfig b/Kconfig
index 05aa539ccc..6a2370c573 100644
--- a/Kconfig
+++ b/Kconfig
@@ -177,8 +177,6 @@ config ANDROID_BOOT_IMAGE
 
 config FIT
 	bool "Support Flattened Image Tree"
-	select MD5
-	select SHA1
 	help
 	  This option allows you to boot the new uImage structure,
 	  Flattened Image Tree.  FIT is formally a FDT, which can include

commit 46491a22798202fef672ed46824f22c233c0fef7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Aug 23 16:34:41 2021 +0800

    arm: Kconfig: use imply for DM_MMC on rockchip
    
    Allow remove it from defconfig.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I4e74b5cc7ada3275f9892a1cd7069ad0eb5f7e87

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 5c82dbb8da..28dcd19c19 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1143,7 +1143,6 @@ config ARCH_ROCKCHIP
 	select SYS_THUMB_BUILD if !ARM64
 	select SPL_SYS_MALLOC_SIMPLE if SPL
 	select DM_GPIO
-	select DM_MMC
 	select DM_SERIAL
 	select DM_SPI
 	select DM_SPI_FLASH
@@ -1154,6 +1153,7 @@ config ARCH_ROCKCHIP
 	select SPI
 	select DEBUG_UART_BOARD_INIT
 	select PANIC_HANG
+	imply DM_MMC
 	imply DM_I2C
 	imply DM_PWM
 	imply DM_REGULATOR

commit c3981faf5cdce6fe4f0565388f428b26e9a20a49
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Aug 23 16:32:22 2021 +0800

    common: fix compile error
    
    Add configuration dependence for them.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If308e4277248ae37f8771ac84b06bd6b246c7f90

diff --git a/common/bootm.c b/common/bootm.c
index b7953f1525..6b15917ace 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -265,7 +265,9 @@ int bootm_find_images(int flag, int argc, char * const argv[])
 		puts("Could not find a valid device tree\n");
 		return 1;
 	}
+#ifdef CONFIG_CMD_FDT
 	set_working_fdt_addr((ulong)images.ft_addr);
+#endif
 	lmb_reserve(&images.lmb, (ulong)images.ft_addr, (ulong)images.ft_len);
 #endif
 
diff --git a/common/image-fdt.c b/common/image-fdt.c
index 89c20a842c..2c79b960aa 100644
--- a/common/image-fdt.c
+++ b/common/image-fdt.c
@@ -303,7 +303,9 @@ int boot_relocate_fdt(struct lmb *lmb, char **of_flat_tree, ulong *of_size)
 	*of_flat_tree = of_start;
 	*of_size = of_len;
 
+#ifdef CONFIG_CMD_FDT
 	set_working_fdt_addr((ulong)*of_flat_tree);
+#endif
 	return 0;
 
 error:
diff --git a/common/image-fit.c b/common/image-fit.c
index 2fd4b22719..d3615ef6b5 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -1188,17 +1188,21 @@ int fit_calculate_hash(const void *data, int data_len,
 							CHUNKSZ_CRC32);
 		*((uint32_t *)value) = cpu_to_uimage(*((uint32_t *)value));
 		*value_len = 4;
+#ifdef CONFIG_SHA1
 	} else if (IMAGE_ENABLE_SHA1 && strcmp(algo, "sha1") == 0) {
 		sha1_csum_wd((unsigned char *)data, data_len,
 			     (unsigned char *)value, CHUNKSZ_SHA1);
 		*value_len = 20;
+#endif
 	} else if (IMAGE_ENABLE_SHA256 && strcmp(algo, "sha256") == 0) {
 		sha256_csum_wd((unsigned char *)data, data_len,
 			       (unsigned char *)value, CHUNKSZ_SHA256);
 		*value_len = SHA256_SUM_LEN;
+#ifdef CONFIG_MD5
 	} else if (IMAGE_ENABLE_MD5 && strcmp(algo, "md5") == 0) {
 		md5_wd((unsigned char *)data, data_len, value, CHUNKSZ_MD5);
 		*value_len = 16;
+#endif
 	} else {
 		debug("Unsupported hash alogrithm\n");
 		return -1;

commit d416248e51de2532f3b3ce4c61ffbd464ddb1356
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Aug 23 16:30:23 2021 +0800

    misc: rockchip decompress: fix compile error
    
    Fix error when !CONFIG_IS_ENABLED(DM_RESET).
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ieea7a520c3e719dc4b9aef772566b87aff4f64d2

diff --git a/drivers/misc/rockchip_decompress.c b/drivers/misc/rockchip_decompress.c
index 3cfd7166ce..b061531e2c 100644
--- a/drivers/misc/rockchip_decompress.c
+++ b/drivers/misc/rockchip_decompress.c
@@ -239,10 +239,10 @@ static int rockchip_decom_ofdata_to_platdata(struct udevice *dev)
 
 static int rockchip_decom_probe(struct udevice *dev)
 {
-#if CONFIG_IS_ENABLED(DM_RESET)
 	struct rockchip_decom_priv *priv = dev_get_priv(dev);
 	int ret;
 
+#if CONFIG_IS_ENABLED(DM_RESET)
 	ret = reset_get_by_name(dev, "dresetn", &priv->rst);
 	if (ret) {
 		debug("reset_get_by_name() failed: %d\n", ret);

commit dac562831484e79edafd43bf8aec31ceee07a3bd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Aug 23 16:29:16 2021 +0800

    config_fallbacks.h: define HAVE_BLOCK_DEVICE if CONFIG_MTD_BLK=y
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I6354fe26f94662e5cc1c1fd159268e655cc4c7a7

diff --git a/include/config_fallbacks.h b/include/config_fallbacks.h
index d9a7d7a928..fffc95adbd 100644
--- a/include/config_fallbacks.h
+++ b/include/config_fallbacks.h
@@ -50,6 +50,7 @@
 	defined(CONFIG_CMD_PART) || \
 	defined(CONFIG_CMD_GPT) || \
 	defined(CONFIG_MMC) || \
+	defined(CONFIG_MTD_BLK) || \
 	defined(CONFIG_NVME) || \
 	defined(CONFIG_SYSTEMACE) || \
 	defined(CONFIG_SANDBOX)   || \

commit 2d0aa96ced08bf51dbae6d4ad93663e38ae3d959
Author: Shawn Lin <shawn.lin@rock-chips.com>
Date:   Tue Aug 24 08:54:44 2021 +0800

    drivers: pci: Fix bifurcation mode support
    
    There is a cpoy-paste error when uploading, so we need
    to fix it.
    
    Change-Id: I963dcbf52b18f729f66a09dfc3bb9a765ed05761
    Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

diff --git a/drivers/phy/phy-rockchip-snps-pcie3.c b/drivers/phy/phy-rockchip-snps-pcie3.c
index 2baa79bb57..843f269e85 100644
--- a/drivers/phy/phy-rockchip-snps-pcie3.c
+++ b/drivers/phy/phy-rockchip-snps-pcie3.c
@@ -141,7 +141,7 @@ static int rockchip_p3phy_configure(struct phy *phy, union phy_configure_opts *o
 {
 	struct rockchip_p3phy_priv *priv = dev_get_priv(phy->dev);
 
-	priv->pcie.is_bifurcation = opts->pcie.is_bifurcation;
+	priv->is_bifurcation = opts->pcie.is_bifurcation;
 
 	return 0;
 }

commit 17ba2606dfb8f9947eee7cbbdf850828fbf15a0d
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Aug 23 16:43:49 2021 +0800

    mtd: nand: rockchip: Support S34ML08G3
    
    Change-Id: Iac097a9585dd43e31f4b31c8569609b6f2615765
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/raw/rockchip_nand_spl.c b/drivers/mtd/nand/raw/rockchip_nand_spl.c
index 127a5d5cf7..ecda81964b 100644
--- a/drivers/mtd/nand/raw/rockchip_nand_spl.c
+++ b/drivers/mtd/nand/raw/rockchip_nand_spl.c
@@ -373,8 +373,13 @@ static int rockchip_nandc_probe(struct udevice *dev)
 			nand_page_num = 128;
 			nand_block_num = 4096;
 		} else if (id[1] == 0xD3) {
-			nand_page_size = 4096;
-			nand_block_num = 4096;
+			if ((id[2] == 0xD1 && id[4] == 0x5a) || /* S34ML08G2 */
+			    (id[3] == 0x05 && id[4] == 0x04)) { /* S34ML08G3 */
+				nand_block_num = 8192;
+			} else {
+				nand_page_size = 4096;
+				nand_block_num = 4096;
+			}
 		}
 
 		g_rk_nand->chipnr = 1;
diff --git a/drivers/mtd/nand/raw/rockchip_nand_spl_v9.c b/drivers/mtd/nand/raw/rockchip_nand_spl_v9.c
index e4c2b973b3..3073def1c4 100644
--- a/drivers/mtd/nand/raw/rockchip_nand_spl_v9.c
+++ b/drivers/mtd/nand/raw/rockchip_nand_spl_v9.c
@@ -368,7 +368,8 @@ static int rockchip_nandc_probe(struct udevice *dev)
 			nand_page_num = 128;
 			nand_block_num = 4096;
 		} else if (id[1] == 0xD3) {
-			if (id[2] == 0xD1 && id[4] == 0x5a) { /* S34ML08G2 */
+			if ((id[2] == 0xD1 && id[4] == 0x5a) || /* S34ML08G2 */
+			    (id[3] == 0x05 && id[4] == 0x04)) { /* S34ML08G3 */
 				nand_block_num = 8192;
 			} else {
 				nand_page_size = 4096;

commit 2eab0e461bc648091dca1aca24f3966763fe231f
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Fri Aug 20 15:36:22 2021 +0800

    drm/rockchip: hdmi: Check the color even if there is no baseparameter
    
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
    Change-Id: Ife34b13f6dc6bcd5f478cd98794e2bc18fddcc12

diff --git a/drivers/video/drm/rockchip_dw_hdmi.c b/drivers/video/drm/rockchip_dw_hdmi.c
index b2837a278a..31fa63c937 100644
--- a/drivers/video/drm/rockchip_dw_hdmi.c
+++ b/drivers/video/drm/rockchip_dw_hdmi.c
@@ -356,14 +356,14 @@ void drm_rk_selete_output(struct hdmi_edid_data *edid_data,
 		dev_desc = rockchip_get_bootdev();
 		if (!dev_desc) {
 			printf("%s: Could not find device\n", __func__);
-			return;
+			goto null_basep;
 		}
 
 		ret = part_get_info_by_name(dev_desc, "baseparameter",
 					    &part_info);
 		if (ret < 0) {
 			printf("Could not find baseparameter partition\n");
-			return;
+			goto null_basep;
 		}
 
 read_aux:
@@ -371,7 +371,7 @@ read_aux:
 				(void *)baseparameter_buf);
 		if (ret < 0) {
 			printf("read baseparameter failed\n");
-			return;
+			goto null_basep;
 		}
 
 		memcpy(&base_parameter, baseparameter_buf,
@@ -437,7 +437,7 @@ read_aux:
 	else if (scan->bottomscale < max_scan && scan->bottomscale > 0)
 		overscan->bottom_margin = scan->bottomscale;
 
-
+null_basep:
 
 	if (screen_info)
 		printf("base_parameter.mode:%dx%d\n",

commit 767dd6d68d9e03130226365170bfe56fd94e0351
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Aug 20 17:51:35 2021 +0800

    mtd: spinand: macronix: Fix ECC Status Read
    
    commit f4cb4d7b46f6409382fd981eec9556e1f3c1dc5d linux upstream
    
    The datasheet specifies the upper four bits are reserved.
    Testing on real hardware shows that these bits can indeed be nonzero.
    
    Signed-off-by: Emil Lenngren <emil.lenngren@gmail.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    Change-Id: I061f499427ffdb09d76132db7796cc4b04a5e388

diff --git a/drivers/mtd/nand/spi/macronix.c b/drivers/mtd/nand/spi/macronix.c
index b94c0f65e7..267a00e7e8 100644
--- a/drivers/mtd/nand/spi/macronix.c
+++ b/drivers/mtd/nand/spi/macronix.c
@@ -12,6 +12,7 @@
 #include <linux/mtd/spinand.h>
 
 #define SPINAND_MFR_MACRONIX		0xC2
+#define MACRONIX_ECCSR_MASK		0x0F
 
 static SPINAND_OP_VARIANTS(read_cache_variants,
 		SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
@@ -74,7 +75,12 @@ static int mx35lf1ge4ab_get_eccsr(struct spinand_device *spinand, u8 *eccsr)
 					  SPI_MEM_OP_DUMMY(1, 1),
 					  SPI_MEM_OP_DATA_IN(1, eccsr, 1));
 
-	return spi_mem_exec_op(spinand->slave, &op);
+	int ret = spi_mem_exec_op(spinand->slave, &op);
+	if (ret)
+		return ret;
+
+	*eccsr &= MACRONIX_ECCSR_MASK;
+	return 0;
 }
 
 static int mx35lf1ge4ab_ecc_get_status(struct spinand_device *spinand,

commit f96cbfe000d801c38694199c971c532835c5b8a6
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Aug 18 16:10:04 2021 +0800

    configs: rk3568: support CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ifad2ce036eb02f0cc1d18ff3985f8c9555dff47c

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index 28bc2ed5dd..8ccbce80f6 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -34,7 +34,6 @@ CONFIG_SPL_BOARD_INIT=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
 CONFIG_SPL_SEPARATE_BSS=y
-# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
 CONFIG_SPL_SHA256_SUPPORT=y
 CONFIG_SPL_CRYPTO_SUPPORT=y
@@ -205,8 +204,8 @@ CONFIG_RSA_N_SIZE=0x200
 CONFIG_RSA_E_SIZE=0x10
 CONFIG_RSA_C_SIZE=0x20
 CONFIG_SHA512=y
-CONFIG_LZMA=y
 CONFIG_LZ4=y
+CONFIG_LZMA=y
 CONFIG_SPL_GZIP=y
 CONFIG_ERRNO_STR=y
 # CONFIG_EFI_LOADER is not set

commit 89912f2dfc7a1d86e6adbea9ae97b41545ced47f
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Fri Jul 16 16:32:56 2021 +0800

    drm/rockchip: vop2: move global init to vop2_preinit
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: I7f4b5711fce58e5757d4c02ed0fc14d675e3bcf9

diff --git a/drivers/video/drm/rockchip_vop2.c b/drivers/video/drm/rockchip_vop2.c
index 9f6a5168c9..115952eeef 100644
--- a/drivers/video/drm/rockchip_vop2.c
+++ b/drivers/video/drm/rockchip_vop2.c
@@ -1417,7 +1417,6 @@ static int vop2_initial(struct vop2 *vop2, struct display_state *state)
 		return ret;
 	}
 
-	vop2_global_initial(vop2, state);
 	rockchip_vop2_gamma_lut_init(vop2, state);
 	rockchip_vop2_cubic_lut_init(vop2, state);
 
@@ -1452,6 +1451,8 @@ static int rockchip_vop2_preinit(struct display_state *state)
 	cstate->max_output = vop2_data->vp_data[cstate->crtc_id].max_output;
 	cstate->feature = vop2_data->vp_data[cstate->crtc_id].feature;
 
+	vop2_global_initial(rockchip_vop2, state);
+
 	return 0;
 }
 

commit 1f6c2a7c766f10a320c5df53a5f6f02da7085422
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Aug 19 16:53:40 2021 +0800

    spl: fit: support preload and support spi nand
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I3bd78bdb29506a518109a5f78f51dd0c9f3cc544

diff --git a/common/spl/spl_fit_tb_arm_v7.S b/common/spl/spl_fit_tb_arm_v7.S
index 1fce00b5f3..02aa2b423c 100644
--- a/common/spl/spl_fit_tb_arm_v7.S
+++ b/common/spl/spl_fit_tb_arm_v7.S
@@ -20,9 +20,9 @@
 	.fpu softvfp
 	.type	spl_fit_get_image_name.isra.0, %function
 spl_fit_get_image_name.isra.0:
-.LFB223:
+.LFB227:
 	.file 1 "common/spl/spl_fit_tb_arm_v7.c"
-	.loc 1 37 0
+	.loc 1 60 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
@@ -35,30 +35,30 @@ spl_fit_get_image_name.isra.0:
 	.cfi_offset 7, -12
 	.cfi_offset 8, -8
 	.cfi_offset 14, -4
-	.loc 1 37 0
+	.loc 1 60 0
 	mov	r5, r0
 	mov	r8, r1
 	mov	r7, r2
 	mov	r6, r3
-	.loc 1 46 0
+	.loc 1 69 0
 	bl	fit_find_config_node
 .LVL1:
-	.loc 1 47 0
+	.loc 1 70 0
 	subs	r4, r0, #0
 	bge	.L2
-	.loc 1 49 0
+	.loc 1 72 0
 	ldr	r0, .L11
 .LVL2:
-	.loc 1 53 0
+	.loc 1 76 0
 	ldr	r7, .L11+4
 .LVL3:
-	.loc 1 54 0
+	.loc 1 77 0
 	ldr	r8, .L11+8
 .LVL4:
-	.loc 1 49 0
+	.loc 1 72 0
 	bl	printf
 .LVL5:
-	.loc 1 50 0
+	.loc 1 73 0
 	mov	r1, r4
 	mov	r0, r5
 	bl	fdt_first_subnode
@@ -70,7 +70,7 @@ spl_fit_get_image_name.isra.0:
 	bge	.L4
 .LVL8:
 .L1:
-	.loc 1 77 0
+	.loc 1 100 0
 	mov	r0, r4
 	add	sp, sp, #8
 	.cfi_remember_state
@@ -80,7 +80,7 @@ spl_fit_get_image_name.isra.0:
 .LVL9:
 .L4:
 	.cfi_restore_state
-	.loc 1 53 0
+	.loc 1 76 0
 	add	r3, sp, #4
 	mov	r2, r7
 	mov	r1, r6
@@ -88,13 +88,13 @@ spl_fit_get_image_name.isra.0:
 .LVL10:
 	bl	fdt_getprop
 .LVL11:
-	.loc 1 54 0
+	.loc 1 77 0
 	mov	r1, r0
 	mov	r0, r8
 .LVL12:
 	bl	printf
 .LVL13:
-	.loc 1 52 0
+	.loc 1 75 0
 	mov	r1, r6
 	mov	r0, r5
 	bl	fdt_next_subnode
@@ -104,7 +104,7 @@ spl_fit_get_image_name.isra.0:
 	b	.L3
 .LVL16:
 .L2:
-	.loc 1 60 0
+	.loc 1 83 0
 	mov	r0, r5
 .LVL17:
 	add	r3, sp, #4
@@ -112,29 +112,29 @@ spl_fit_get_image_name.isra.0:
 	mov	r1, r4
 	bl	fdt_getprop
 .LVL18:
-	.loc 1 61 0
+	.loc 1 84 0
 	mov	r5, r0
 .LVL19:
 	cbz	r0, .L8
 	movs	r4, #0
 .LVL20:
 .L6:
-	.loc 1 67 0
+	.loc 1 90 0
 	cmp	r4, r7
 	blt	.L7
-	.loc 1 75 0
+	.loc 1 98 0
 	str	r0, [r6]
-	.loc 1 76 0
+	.loc 1 99 0
 	movs	r4, #0
 .LVL21:
 	b	.L1
 .LVL22:
 .L7:
-	.loc 1 68 0
+	.loc 1 91 0
 	movs	r1, #0
 	bl	strchr
 .LVL23:
-	.loc 1 69 0
+	.loc 1 92 0
 	adds	r0, r0, #1
 .LVL24:
 	beq	.L10
@@ -142,19 +142,19 @@ spl_fit_get_image_name.isra.0:
 	subs	r3, r0, r5
 	cmp	r3, r2
 	bge	.L10
-	.loc 1 67 0
+	.loc 1 90 0
 	adds	r4, r4, #1
 .LVL25:
 	b	.L6
 .LVL26:
 .L8:
-	.loc 1 63 0
+	.loc 1 86 0
 	mvn	r4, #21
 .LVL27:
 	b	.L1
 .LVL28:
 .L10:
-	.loc 1 71 0
+	.loc 1 94 0
 	mvn	r4, #6
 .LVL29:
 	b	.L1
@@ -165,7 +165,7 @@ spl_fit_get_image_name.isra.0:
 	.word	.LC5
 	.word	.LC6
 	.cfi_endproc
-.LFE223:
+.LFE227:
 	.size	spl_fit_get_image_name.isra.0, .-spl_fit_get_image_name.isra.0
 	.section	.text.spl_fit_get_image_node,"ax",%progbits
 	.align	1
@@ -175,8 +175,8 @@ spl_fit_get_image_name.isra.0:
 	.fpu softvfp
 	.type	spl_fit_get_image_node, %function
 spl_fit_get_image_node:
-.LFB209:
-	.loc 1 93 0
+.LFB213:
+	.loc 1 116 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
@@ -186,46 +186,131 @@ spl_fit_get_image_node:
 	.cfi_offset 4, -12
 	.cfi_offset 5, -8
 	.cfi_offset 14, -4
-	.loc 1 93 0
+	.loc 1 116 0
 	mov	r5, r1
 	mov	r1, r2
 .LVL31:
 	mov	r2, r3
 .LVL32:
-	.loc 1 98 0
+	.loc 1 121 0
 	add	r3, sp, #4
 .LVL33:
-	.loc 1 93 0
+	.loc 1 116 0
 	mov	r4, r0
-	.loc 1 98 0
+	.loc 1 121 0
 	bl	spl_fit_get_image_name.isra.0
 .LVL34:
-	.loc 1 99 0
+	.loc 1 122 0
 	cbnz	r0, .L13
-	.loc 1 104 0
+	.loc 1 127 0
 	ldr	r2, [sp, #4]
 	mov	r1, r5
 	mov	r0, r4
 .LVL35:
 	bl	fdt_subnode_offset
 .LVL36:
-	.loc 1 105 0
+	.loc 1 128 0
 	cmp	r0, #0
-	.loc 1 107 0
+	.loc 1 130 0
 	it	lt
 	mvnlt	r0, #21
 .LVL37:
 .L13:
-	.loc 1 111 0
+	.loc 1 134 0
 	add	sp, sp, #12
 	.cfi_def_cfa_offset 12
 	@ sp needed
 	pop	{r4, r5, pc}
 	.cfi_endproc
-.LFE209:
+.LFE213:
 	.size	spl_fit_get_image_node, .-spl_fit_get_image_node
-	.global	__aeabi_idivmod
 	.global	__aeabi_idiv
+	.section	.text.spl_fit_load_blob,"ax",%progbits
+	.align	1
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	spl_fit_load_blob, %function
+spl_fit_load_blob:
+.LFB222:
+	.loc 1 413 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL38:
+	ldr	r2, [r2, #4]
+.LVL39:
+	push	{r3, r4, r5, r6, r7, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 3, -24
+	.cfi_offset 4, -20
+	.cfi_offset 5, -16
+	.cfi_offset 6, -12
+	.cfi_offset 7, -8
+	.cfi_offset 14, -4
+	.loc 1 413 0
+	mov	r4, r0
+	mov	r5, r1
+	rev	r2, r2
+.LVL40:
+	.loc 1 426 0
+	addw	r2, r2, #511
+.LVL41:
+	.loc 1 427 0
+	bic	r0, r2, #510
+.LVL42:
+	bic	r0, r0, #1
+	str	r0, [r3]
+	.loc 1 446 0
+	ldr	r3, .L19
+.LVL43:
+	ldr	r1, [r4, #8]
+.LVL44:
+	subs	r3, r3, r1
+	subs	r3, r3, r0
+	.loc 1 447 0
+	bic	r6, r3, #63
+.LVL45:
+.LBB30:
+.LBB31:
+	.loc 1 168 0
+	ldr	r3, [r4, #12]
+	cbnz	r3, .L17
+	.loc 1 171 0
+	add	r0, r0, r1
+.LVL46:
+	subs	r0, r0, #1
+	bl	__aeabi_idiv
+.LVL47:
+.L17:
+.LBE31:
+.LBE30:
+	.loc 1 449 0
+	mov	r2, r0
+	ldr	r7, [r4, #16]
+	mov	r3, r6
+	mov	r1, r5
+	mov	r0, r4
+	blx	r7
+.LVL48:
+	.loc 1 452 0
+	cmp	r0, #0
+	.loc 1 456 0
+	ite	ne
+	movne	r0, r6
+.LVL49:
+	moveq	r0, #0
+	pop	{r3, r4, r5, r6, r7, pc}
+.LVL50:
+.L20:
+	.align	2
+.L19:
+	.word	6291393
+	.cfi_endproc
+.LFE222:
+	.size	spl_fit_load_blob, .-spl_fit_load_blob
+	.global	__aeabi_idivmod
 	.section	.text.spl_load_fit_image,"ax",%progbits
 	.align	1
 	.syntax unified
@@ -234,12 +319,12 @@ spl_fit_get_image_node:
 	.fpu softvfp
 	.type	spl_load_fit_image, %function
 spl_load_fit_image:
-.LFB213:
-	.loc 1 171 0
+.LFB217:
+	.loc 1 194 0
 	.cfi_startproc
 	@ args = 8, pretend = 0, frame = 48
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL38:
+.LVL51:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
 	.cfi_offset 4, -32
@@ -252,403 +337,506 @@ spl_load_fit_image:
 	.cfi_offset 14, -4
 	sub	sp, sp, #56
 	.cfi_def_cfa_offset 88
-	.loc 1 171 0
-	ldr	r6, [sp, #88]
-	mov	r5, r2
-	mov	r7, r3
-	.loc 1 181 0
+	.loc 1 194 0
+	mov	r8, r3
+	ldr	r3, [sp, #92]
+.LVL52:
+	mov	r4, r2
+	.loc 1 204 0
 	add	r2, sp, #56
-.LVL39:
+.LVL53:
+	.loc 1 194 0
+	ldr	r5, [sp, #88]
+	mov	r7, r0
+	str	r3, [sp, #8]
+	.loc 1 204 0
 	movs	r3, #255
-.LVL40:
-	.loc 1 171 0
-	str	r1, [sp, #12]
-	.loc 1 181 0
 	strb	r3, [r2, #-29]!
-.LVL41:
-	.loc 1 198 0
-	mov	r1, r6
-.LVL42:
-	.loc 1 171 0
-	mov	r10, r0
-.LVL43:
-	.loc 1 198 0
-	mov	r0, r5
-.LVL44:
-	.loc 1 171 0
-	ldr	r4, [sp, #92]
-	.loc 1 198 0
+.LVL54:
+	.loc 1 208 0
+	ldr	r3, [r0]
+	.loc 1 221 0
+	mov	r0, r4
+.LVL55:
+	.loc 1 194 0
+	str	r1, [sp, #16]
+	.loc 1 221 0
+	mov	r1, r5
+.LVL56:
+	.loc 1 208 0
+	str	r3, [sp, #12]
+.LVL57:
+	.loc 1 221 0
 	bl	fit_image_get_comp
-.LVL45:
-	.loc 1 201 0
+.LVL58:
+	.loc 1 224 0
 	add	r2, sp, #44
-	mov	r1, r6
-	mov	r0, r5
+	mov	r1, r5
+	mov	r0, r4
 	bl	fit_image_get_load
-.LVL46:
-	cbz	r0, .L17
-	.loc 1 202 0
-	ldr	r3, [r4, #8]
+.LVL59:
+	cbz	r0, .L22
+	.loc 1 225 0
+	ldr	r3, [sp, #8]
+	ldr	r3, [r3, #8]
 	str	r3, [sp, #44]
-.L17:
-	.loc 1 204 0
+.L22:
+	.loc 1 227 0
 	ldrb	r3, [sp, #27]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L18
-	.loc 1 204 0 is_stmt 0 discriminator 1
+	beq	.L23
+	.loc 1 227 0 is_stmt 0 discriminator 1
 	cmp	r3, #6
-	beq	.L18
-	.loc 1 206 0 is_stmt 1
+	beq	.L23
+	.loc 1 229 0 is_stmt 1
 	add	r2, sp, #40
-	mov	r1, r6
-	mov	r0, r5
+	mov	r1, r5
+	mov	r0, r4
 	bl	fit_image_get_comp_addr
-.LVL47:
-	cbz	r0, .L19
-	.loc 1 207 0
+.LVL60:
+	cbz	r0, .L24
+	.loc 1 230 0
 	ldr	r3, [sp, #44]
 	add	r3, r3, #1048576
-.L62:
-	.loc 1 209 0
+.L79:
+	.loc 1 232 0
 	str	r3, [sp, #40]
-.L19:
-	.loc 1 212 0
+.L24:
+	.loc 1 235 0
 	add	r2, sp, #28
-	mov	r1, r6
-	mov	r0, r5
+	mov	r1, r5
+	mov	r0, r4
 	bl	fit_image_get_data_position
-.LVL48:
-	cbz	r0, .L20
-	.loc 1 214 0
+.LVL61:
+	cbz	r0, .L25
+	.loc 1 237 0
 	add	r2, sp, #28
-	mov	r1, r6
-	mov	r0, r5
+	mov	r1, r5
+	mov	r0, r4
 	bl	fit_image_get_data_offset
-.LVL49:
+.LVL62:
 	cmp	r0, #0
-	bne	.L21
-	.loc 1 215 0
+	bne	.L26
+	.loc 1 238 0
 	ldr	r3, [sp, #28]
-	add	r3, r3, r7
+	add	r3, r3, r8
 	str	r3, [sp, #28]
-.LVL50:
-.L20:
-	.loc 1 221 0
+.LVL63:
+.L25:
+	.loc 1 244 0
 	add	r2, sp, #36
-	mov	r1, r6
-	mov	r0, r5
+	mov	r1, r5
+	mov	r0, r4
 	bl	fit_image_get_data_size
-.LVL51:
+.LVL64:
 	cmp	r0, #0
-	bne	.L38
-	.loc 1 224 0
-	ldr	r7, [sp, #40]
-.LVL52:
-	adds	r7, r7, #63
-	bic	r3, r7, #63
-	.loc 1 226 0
-	cmp	r3, #-50331648
-	.loc 1 224 0
-	str	r3, [sp, #8]
-.LVL53:
-	.loc 1 226 0
-	bcc	.L22
-	.loc 1 228 0
+	bne	.L49
+	.loc 1 247 0
+	ldr	r3, [sp, #40]
+	adds	r3, r3, #63
+	bic	r8, r3, #63
+.LVL65:
+	.loc 1 249 0
+	cmp	r8, #-50331648
+	bcc	.L27
+	.loc 1 251 0
 	ldr	r1, [sp, #36]
 	movs	r0, #64
 	bl	memalign_simple
-.LVL54:
-	str	r0, [sp, #8]
-.LVL55:
-.L22:
-.LBB35:
-.LBB36:
-	.loc 1 134 0
-	ldr	r2, [r10, #12]
-.LBE36:
-.LBE35:
-	.loc 1 230 0
-	ldr	r8, [sp, #36]
-	.loc 1 232 0
-	ldr	r3, [sp, #28]
-.LVL56:
-	.loc 1 230 0
-	str	r8, [sp, #32]
-.LBB39:
-.LBB37:
-	.loc 1 134 0
-	cmp	r2, #0
-	beq	.L23
-	.loc 1 135 0
-	and	fp, r3, #63
-.L24:
-.LVL57:
-.LBE37:
-.LBE39:
-.LBB40:
-.LBB41:
-	.loc 1 143 0
-	add	r8, r8, fp
-.LVL58:
-	.loc 1 145 0
-	cbnz	r2, .L25
-	.loc 1 148 0
-	ldr	r1, [r10, #8]
-	str	r2, [sp, #20]
-	str	r3, [sp, #16]
-	add	r0, r8, r1
-	subs	r0, r0, #1
-	bl	__aeabi_idiv
-.LVL59:
-	ldr	r2, [sp, #20]
-	mov	r8, r0
-.LVL60:
-	ldr	r3, [sp, #16]
-.LVL61:
-.L25:
-.LBE41:
-.LBE40:
-	.loc 1 241 0
-	ldr	r1, [r10, #16]
-	mov	r7, r1
-.LVL62:
-.LBB42:
-.LBB43:
-	.loc 1 120 0
-	cmp	r2, #0
-	beq	.L26
-	.loc 1 121 0
-	bic	r0, r3, #63
-.LVL63:
-.L27:
-.LBE43:
-.LBE42:
-	.loc 1 241 0
-	ldr	r1, [sp, #12]
-	mov	r2, r8
-	ldr	r3, [sp, #8]
-	add	r1, r1, r0
-	mov	r0, r10
-	blx	r7
-.LVL64:
-	cmp	r8, r0
-	bne	.L35
-	.loc 1 248 0
-	ldr	r3, [sp, #8]
-	add	r3, r3, fp
-	str	r3, [sp, #48]
-.LVL65:
-.L29:
-	.loc 1 266 0
-	ldrb	r3, [sp, #27]	@ zero_extendqisi2
-.LBB45:
-.LBB46:
-	.file 2 "include/image.h"
-	.loc 2 1005 0
-	movs	r2, #0
-	mov	r1, r6
-	mov	r0, r5
-.LBE46:
-.LBE45:
-	.loc 1 266 0
-	cmp	r3, #0
-	beq	.L30
 .LVL66:
-	.loc 1 266 0 is_stmt 0 discriminator 1
-	cmp	r3, #6
-	beq	.L30
+	mov	r8, r0
 .LVL67:
+.L27:
+.LBB48:
 .LBB49:
-.LBB47:
-	.loc 2 1005 0 is_stmt 1
-	bl	fdt_get_name
-.LVL68:
-.LBE47:
+	.loc 1 157 0
+	ldr	r3, [r7, #12]
 .LBE49:
-	.loc 1 269 0
-	movs	r3, #0
+.LBE48:
+	.loc 1 253 0
+	ldr	r10, [sp, #36]
+	.loc 1 255 0
+	ldr	r0, [sp, #28]
+	.loc 1 253 0
+	str	r10, [sp, #32]
+.LVL68:
+.LBB52:
 .LBB50:
-.LBB48:
-	.loc 2 1005 0
-	mov	r7, r0
+	.loc 1 157 0
+	cmp	r3, #0
+	beq	.L28
+	.loc 1 158 0
+	and	fp, r0, #63
 .LVL69:
-.LBE48:
+.L29:
 .LBE50:
-	.loc 1 269 0
-	ldr	r2, .L64
-	mov	r1, r6
-	mov	r0, r5
-	.loc 1 267 0
-	ldr	r8, [sp, #44]
-	.loc 1 269 0
-	bl	fdt_getprop
+.LBE52:
+.LBB53:
+.LBB54:
+	.loc 1 166 0
+	add	r10, r10, fp
 .LVL70:
-	.loc 1 267 0
-	ldr	r3, [sp, #48]
-	mov	r1, r7
-	mov	r2, r8
-	str	r3, [sp]
-	mov	r3, r0
-	ldr	r0, .L64+4
-	bl	printf
+	.loc 1 168 0
+	cbnz	r3, .L30
+	.loc 1 171 0
+	ldr	r1, [r7, #8]
+	add	r0, r10, r1
+	subs	r0, r0, #1
+	bl	__aeabi_idiv
 .LVL71:
-.L31:
-	.loc 1 279 0
-	ldr	r3, [sp, #32]
-	mov	r1, r6
-	ldr	r2, [sp, #48]
-	mov	r0, r5
-	bl	fit_image_verify_with_data
+	mov	r10, r0
 .LVL72:
-	cmp	r0, #0
-	beq	.L36
-	.loc 1 284 0
-	add	r3, sp, #32
-	add	r2, sp, #44
-	mov	r1, r6
-	str	r3, [sp]
-	mov	r0, r5
-	add	r3, sp, #48
-	str	r10, [sp, #4]
-	bl	board_fit_image_post_process
+.L30:
+.LBE54:
+.LBE53:
+	.loc 1 259 0
+	mov	r1, r5
+	mov	r0, r4
+	bl	fit_image_is_preload
 .LVL73:
-	.loc 1 287 0
-	ldr	r0, .L64+8
-	bl	puts
+	.loc 1 261 0
+	str	r0, [sp, #20]
+	cbz	r0, .L31
+	.loc 1 262 0
+	ldr	r2, [sp, #12]
+	movs	r3, #1
+	strb	r3, [r2, #14]
+.L31:
+	.loc 1 264 0
+	ldr	r3, [r7, #16]
+	.loc 1 265 0
+	ldr	r0, [sp, #28]
 .LVL74:
-	.loc 1 301 0
-	ldr	r2, [sp, #32]
-	ldr	r1, [sp, #48]
-	ldr	r0, [sp, #44]
-	bl	memcpy
+	.loc 1 264 0
+	mov	r6, r3
+.LBB55:
+.LBB56:
+	.loc 1 143 0
+	ldr	r3, [r7, #12]
+	cmp	r3, #0
+	beq	.L32
+	.loc 1 144 0
+	bic	r0, r0, #63
 .LVL75:
-.LDL1:
-	.loc 1 304 0
-	cbz	r4, .L63
-	.loc 1 305 0
+.L33:
+.LBE56:
+.LBE55:
+	.loc 1 264 0
+	ldr	r1, [sp, #16]
+	mov	r3, r8
+	mov	r2, r10
+	adds	r1, r0, r1
+	mov	r0, r7
+	blx	r6
+.LVL76:
+	cmp	r10, r0
+	bne	.L46
+	.loc 1 272 0
+	ldr	r3, [sp, #20]
+	.loc 1 271 0
+	add	r0, r8, fp
+	str	r0, [sp, #48]
+	.loc 1 272 0
+	cbz	r3, .L35
+	.loc 1 273 0
+	ldr	r3, [sp, #12]
+	ldr	r2, [sp, #12]
+	.loc 1 274 0
+	ldr	r0, .L81
+	.loc 1 273 0
+	ldrb	r3, [r3, #14]	@ zero_extendqisi2
+	bic	r3, r3, #1
+	strb	r3, [r2, #14]
+	.loc 1 274 0
+	bl	printf
+.LVL77:
+.L36:
+	.loc 1 329 0
+	ldr	r3, [sp, #8]
+	cbz	r3, .L80
+	.loc 1 330 0
+	ldr	r2, [sp, #8]
+	.loc 1 332 0
+	mov	r1, r5
+	.loc 1 330 0
 	ldr	r3, [sp, #44]
-	.loc 1 307 0
-	mov	r1, r6
-	ldr	r2, .L64+12
-	mov	r0, r5
-	.loc 1 305 0
-	str	r3, [r4, #8]
-	.loc 1 306 0
+	.loc 1 332 0
+	mov	r0, r4
+	.loc 1 330 0
+	str	r3, [r2, #8]
+	.loc 1 331 0
 	ldr	r3, [sp, #32]
-	str	r3, [r4, #32]
-	.loc 1 307 0
+	str	r3, [r2, #32]
+	.loc 1 332 0
+	ldr	r2, .L81+4
 	bl	fdt_getprop_u32
-.LVL76:
-	str	r0, [r4, #12]
-.L63:
-	.loc 1 310 0
+.LVL78:
+	ldr	r3, [sp, #8]
+	str	r0, [r3, #12]
+.L80:
+	.loc 1 335 0
 	movs	r0, #0
-.LVL77:
-.L16:
-	.loc 1 311 0
+.LVL79:
+.L21:
+	.loc 1 336 0
 	add	sp, sp, #56
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL78:
-.L18:
+.LVL80:
+.L23:
 	.cfi_restore_state
-	.loc 1 209 0
+	.loc 1 232 0
 	ldr	r3, [sp, #44]
-	b	.L62
-.LVL79:
-.L23:
+	b	.L79
+.LVL81:
+.L28:
+.LBB58:
 .LBB51:
-.LBB38:
-	.loc 1 137 0
-	mov	r0, r3
-	ldr	r1, [r10, #8]
-	str	r2, [sp, #20]
-	str	r3, [sp, #16]
+	.loc 1 160 0
+	ldr	r1, [r7, #8]
+	str	r3, [sp, #20]
 	bl	__aeabi_idivmod
-.LVL80:
-	ldr	r2, [sp, #20]
+.LVL82:
+	ldr	r3, [sp, #20]
 	mov	fp, r1
-	ldr	r3, [sp, #16]
-	b	.L24
-.LVL81:
-.L26:
-.LBE38:
+	b	.L29
+.LVL83:
+.L32:
 .LBE51:
-.LBB52:
-.LBB44:
-	.loc 1 123 0
-	ldr	r1, [r10, #8]
-	mov	r0, r3
+.LBE58:
+.LBB59:
+.LBB57:
+	.loc 1 146 0
+	ldr	r1, [r7, #8]
 	bl	__aeabi_idiv
-.LVL82:
-	b	.L27
-.LVL83:
-.L60:
-.LBE44:
-.LBE52:
-	.loc 1 262 0
+.LVL84:
+	b	.L33
+.LVL85:
+.L77:
+.LBE57:
+.LBE59:
+	.loc 1 285 0
 	ldr	r3, [sp, #52]
 	str	r3, [sp, #48]
-	b	.L29
-.LVL84:
-.L30:
-.LBB53:
-.LBB54:
+.LVL86:
+.L35:
+	.loc 1 289 0
+	ldrb	r3, [sp, #27]	@ zero_extendqisi2
+.LBB60:
+.LBB61:
+	.file 2 "include/image.h"
 	.loc 2 1005 0
+	movs	r2, #0
+	mov	r1, r5
+	mov	r0, r4
+.LBE61:
+.LBE60:
+	.loc 1 289 0
+	cmp	r3, #0
+	beq	.L37
+.LVL87:
+	.loc 1 289 0 is_stmt 0 discriminator 1
+	cmp	r3, #6
+	beq	.L37
+.LVL88:
+.LBB64:
+.LBB62:
+	.loc 2 1005 0 is_stmt 1
 	bl	fdt_get_name
-.LVL85:
-.LBE54:
-.LBE53:
-	.loc 1 272 0
-	ldr	r2, [sp, #44]
-	mov	r1, r0
-	ldr	r0, .L64+16
+.LVL89:
+.LBE62:
+.LBE64:
+.LBB65:
+.LBB66:
+	.loc 1 143 0
+	ldr	r3, [r7, #12]
+.LBE66:
+.LBE65:
+.LBB69:
+.LBB63:
+	.loc 2 1005 0
+	mov	r8, r0
+.LVL90:
+.LBE63:
+.LBE69:
+	.loc 1 292 0
+	ldr	r0, [sp, #28]
+.LVL91:
+.LBB70:
+.LBB67:
+	.loc 1 143 0
+	cbz	r3, .L38
+	.loc 1 144 0
+	bic	r0, r0, #63
+.LVL92:
+.L39:
+.LBE67:
+.LBE70:
+	.loc 1 290 0
+	ldr	r3, [sp, #16]
+	.loc 1 293 0
+	mov	r1, r5
+	ldr	r2, .L81+8
+	.loc 1 290 0
+	ldr	fp, [sp, #44]
+	add	r3, r3, r0
+	.loc 1 293 0
+	mov	r0, r4
+	.loc 1 290 0
+	mov	r10, r3
+	.loc 1 293 0
+	movs	r3, #0
+	bl	fdt_getprop
+.LVL93:
+	.loc 1 290 0
+	ldr	r3, [sp, #48]
+	mov	r2, r10
+	mov	r1, r8
+	stm	sp, {r0, r3}
+	mov	r3, fp
+	ldr	r0, .L81+12
 	bl	printf
-.LVL86:
-	b	.L31
-.LVL87:
-.L35:
-	.loc 1 244 0
+.LVL94:
+.L40:
+	.loc 1 304 0
+	ldr	r3, [sp, #32]
+	mov	r1, r5
+	ldr	r2, [sp, #48]
+	mov	r0, r4
+	bl	fit_image_verify_with_data
+.LVL95:
+	cbz	r0, .L47
+	.loc 1 309 0
+	add	r3, sp, #32
+	add	r2, sp, #44
+	mov	r1, r5
+	str	r3, [sp]
+	mov	r0, r4
+	add	r3, sp, #48
+	str	r7, [sp, #4]
+	bl	board_fit_image_post_process
+.LVL96:
+	.loc 1 312 0
+	ldr	r0, .L81+16
+	bl	puts
+.LVL97:
+	.loc 1 326 0
+	ldr	r2, [sp, #32]
+	ldr	r1, [sp, #48]
+	ldr	r0, [sp, #44]
+	bl	memcpy
+.LVL98:
+	b	.L36
+.LVL99:
+.L38:
+.LBB71:
+.LBB68:
+	.loc 1 146 0
+	ldr	r1, [r7, #8]
+	bl	__aeabi_idiv
+.LVL100:
+	b	.L39
+.LVL101:
+.L37:
+.LBE68:
+.LBE71:
+.LBB72:
+.LBB73:
+	.loc 2 1005 0
+	bl	fdt_get_name
+.LVL102:
+.LBE73:
+.LBE72:
+.LBB75:
+.LBB76:
+	.loc 1 143 0
+	ldr	r3, [r7, #12]
+.LBE76:
+.LBE75:
+.LBB79:
+.LBB74:
+	.loc 2 1005 0
+	mov	r8, r0
+.LVL103:
+.LBE74:
+.LBE79:
+	.loc 1 297 0
+	ldr	r0, [sp, #28]
+.LVL104:
+.LBB80:
+.LBB77:
+	.loc 1 143 0
+	cbz	r3, .L41
+	.loc 1 144 0
+	bic	r0, r0, #63
+.LVL105:
+.L42:
+.LBE77:
+.LBE80:
+	.loc 1 296 0
+	ldr	r2, [sp, #16]
+	mov	r1, r8
+	ldr	r3, [sp, #44]
+	add	r2, r2, r0
+	ldr	r0, .L81+20
+	bl	printf
+.LVL106:
+	b	.L40
+.LVL107:
+.L41:
+.LBB81:
+.LBB78:
+	.loc 1 146 0
+	ldr	r1, [r7, #8]
+	bl	__aeabi_idiv
+.LVL108:
+	b	.L42
+.LVL109:
+.L46:
+.LBE78:
+.LBE81:
+	.loc 1 267 0
 	mvn	r0, #4
-	b	.L16
-.LVL88:
-.L36:
-	.loc 1 281 0
+	b	.L21
+.LVL110:
+.L47:
+	.loc 1 306 0
 	mov	r0, #-1
-	b	.L16
-.LVL89:
-.L21:
-	.loc 1 256 0
+	b	.L21
+.LVL111:
+.L26:
+	.loc 1 279 0
 	add	r3, sp, #32
 	add	r2, sp, #52
-	mov	r1, r6
-	mov	r0, r5
+	mov	r1, r5
+	mov	r0, r4
 	bl	fit_image_get_data
-.LVL90:
+.LVL112:
 	cmp	r0, #0
-	beq	.L60
-	.loc 1 257 0
-	ldr	r0, .L64+20
+	beq	.L77
+	.loc 1 280 0
+	ldr	r0, .L81+24
 	bl	puts
-.LVL91:
-.L38:
-	.loc 1 222 0
+.LVL113:
+.L49:
+	.loc 1 245 0
 	mvn	r0, #1
-.LVL92:
-	b	.L16
-.L65:
+.LVL114:
+	b	.L21
+.L82:
 	.align	2
-.L64:
-	.word	.LC8
+.L81:
+	.word	.LC7
+	.word	.LC13
 	.word	.LC9
-	.word	.LC11
-	.word	.LC12
 	.word	.LC10
-	.word	.LC7
+	.word	.LC12
+	.word	.LC11
+	.word	.LC8
 	.cfi_endproc
-.LFE213:
+.LFE217:
 	.size	spl_load_fit_image, .-spl_load_fit_image
 	.section	.text.spl_fit_append_fdt,"ax",%progbits
 	.align	1
@@ -658,12 +846,12 @@ spl_load_fit_image:
 	.fpu softvfp
 	.type	spl_fit_append_fdt, %function
 spl_fit_append_fdt:
-.LFB214:
-	.loc 1 316 0
+.LFB218:
+	.loc 1 341 0
 	.cfi_startproc
 	@ args = 8, pretend = 0, frame = 48
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL93:
+.LVL115:
 	push	{r4, r5, r6, r7, lr}
 	.cfi_def_cfa_offset 20
 	.cfi_offset 4, -20
@@ -674,178 +862,179 @@ spl_fit_append_fdt:
 	mov	r5, r3
 	sub	sp, sp, #60
 	.cfi_def_cfa_offset 80
-	.loc 1 316 0
+	.loc 1 341 0
 	mov	r4, r0
 	mov	r6, r1
 	mov	r7, r2
-	.loc 1 321 0
+	.loc 1 346 0
 	movs	r3, #0
-.LVL94:
-	ldr	r2, .L68
-.LVL95:
+.LVL116:
+	ldr	r2, .L85
+.LVL117:
 	ldr	r1, [sp, #80]
-.LVL96:
+.LVL118:
 	mov	r0, r5
-.LVL97:
+.LVL119:
 	bl	spl_fit_get_image_node
-.LVL98:
-	.loc 1 322 0
+.LVL120:
+	.loc 1 347 0
 	cmp	r0, #0
-	blt	.L66
-	.loc 1 331 0
+	blt	.L83
+	.loc 1 356 0
 	ldr	r2, [r4, #32]
-	.loc 1 332 0
+	.loc 1 357 0
 	mov	r1, r7
-	.loc 1 331 0
+	.loc 1 356 0
 	ldr	r3, [r4, #8]
 	add	r3, r3, r2
-	.loc 1 332 0
+	.loc 1 357 0
 	mov	r2, r5
-	.loc 1 331 0
+	.loc 1 356 0
 	str	r3, [sp, #20]
-	.loc 1 332 0
+	.loc 1 357 0
 	add	r3, sp, #12
 	stm	sp, {r0, r3}
 	mov	r0, r6
-.LVL99:
+.LVL121:
 	ldr	r3, [sp, #84]
 	bl	spl_load_fit_image
-.LVL100:
-	.loc 1 335 0
+.LVL122:
+	.loc 1 360 0
 	cmp	r0, #0
-	blt	.L66
-	.loc 1 339 0
+	blt	.L83
+	.loc 1 364 0
 	ldr	r0, [sp, #20]
-.LVL101:
-	.loc 1 342 0
+.LVL123:
+	.loc 1 367 0
 	mov	r1, #8192
-	.loc 1 339 0
+	.loc 1 364 0
 	str	r0, [r4, #20]
-	.loc 1 342 0
+	.loc 1 367 0
 	bl	fdt_shrink_to_minimum
-.LVL102:
-.L66:
-	.loc 1 346 0
+.LVL124:
+.L83:
+	.loc 1 371 0
 	add	sp, sp, #60
 	.cfi_def_cfa_offset 20
 	@ sp needed
 	pop	{r4, r5, r6, r7, pc}
-.LVL103:
-.L69:
+.LVL125:
+.L86:
 	.align	2
-.L68:
+.L85:
 	.word	.LC0
 	.cfi_endproc
-.LFE214:
+.LFE218:
 	.size	spl_fit_append_fdt, .-spl_fit_append_fdt
-	.section	.text.spl_fit_load_blob,"ax",%progbits
+	.section	.text.fit_config_verify,"ax",%progbits
 	.align	1
+	.weak	fit_config_verify
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	spl_fit_load_blob, %function
-spl_fit_load_blob:
-.LFB218:
-	.loc 1 388 0
+	.type	fit_config_verify, %function
+fit_config_verify:
+.LFB207:
+	.loc 1 24 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL104:
-	ldr	r2, [r2, #4]
-.LVL105:
-	push	{r3, r4, r5, r6, r7, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 3, -24
-	.cfi_offset 4, -20
-	.cfi_offset 5, -16
-	.cfi_offset 6, -12
-	.cfi_offset 7, -8
-	.cfi_offset 14, -4
-	.loc 1 388 0
-	mov	r4, r0
-	mov	r5, r1
-	rev	r2, r2
-.LVL106:
-	.loc 1 401 0
-	addw	r2, r2, #511
-.LVL107:
-	.loc 1 402 0
-	bic	r0, r2, #510
-.LVL108:
-	bic	r0, r0, #1
-	str	r0, [r3]
-	.loc 1 421 0
-	ldr	r3, .L73
-.LVL109:
-	ldr	r1, [r4, #8]
-.LVL110:
-	subs	r3, r3, r1
-	subs	r3, r3, r0
-	.loc 1 422 0
-	bic	r6, r3, #63
-.LVL111:
-.LBB61:
-.LBB62:
-	.loc 1 145 0
-	ldr	r3, [r4, #12]
-	cbnz	r3, .L71
-	.loc 1 148 0
-	add	r0, r0, r1
-.LVL112:
-	subs	r0, r0, #1
-	bl	__aeabi_idiv
-.LVL113:
-.L71:
-.LBE62:
-.LBE61:
-	.loc 1 424 0
-	mov	r2, r0
-	ldr	r7, [r4, #16]
-	mov	r3, r6
-	mov	r1, r5
-	mov	r0, r4
-	blx	r7
-.LVL114:
-	.loc 1 427 0
-	cmp	r0, #0
-	.loc 1 431 0
-	ite	ne
-	movne	r0, r6
-.LVL115:
-	moveq	r0, #0
-	pop	{r3, r4, r5, r6, r7, pc}
-.LVL116:
-.L74:
-	.align	2
-.L73:
-	.word	6291393
+	@ link register save eliminated.
+.LVL126:
+	.loc 1 26 0
+	movs	r0, #0
+.LVL127:
+	bx	lr
 	.cfi_endproc
-.LFE218:
-	.size	spl_fit_load_blob, .-spl_fit_load_blob
-	.section	.text.fit_config_verify,"ax",%progbits
+.LFE207:
+	.size	fit_config_verify, .-fit_config_verify
+	.section	.text.misc_decompress_int_en,"ax",%progbits
 	.align	1
-	.weak	fit_config_verify
+	.weak	misc_decompress_int_en
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	fit_config_verify, %function
-fit_config_verify:
-.LFB207:
-	.loc 1 21 0
+	.type	misc_decompress_int_en, %function
+misc_decompress_int_en:
+.LFB208:
+	.loc 1 29 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL117:
-	.loc 1 23 0
+	.loc 1 31 0
 	movs	r0, #0
-.LVL118:
 	bx	lr
 	.cfi_endproc
-.LFE207:
-	.size	fit_config_verify, .-fit_config_verify
+.LFE208:
+	.size	misc_decompress_int_en, .-misc_decompress_int_en
+	.section	.text.mtd_part_parse,"ax",%progbits
+	.align	1
+	.weak	mtd_part_parse
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	mtd_part_parse, %function
+mtd_part_parse:
+.LFB209:
+	.loc 1 34 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL128:
+	.loc 1 36 0
+	movs	r0, #0
+.LVL129:
+	bx	lr
+	.cfi_endproc
+.LFE209:
+	.size	mtd_part_parse, .-mtd_part_parse
+	.section	.text.fdt_bootargs_append_ab,"ax",%progbits
+	.align	1
+	.weak	fdt_bootargs_append_ab
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	fdt_bootargs_append_ab, %function
+fdt_bootargs_append_ab:
+.LFB229:
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	movs	r0, #0
+	bx	lr
+	.cfi_endproc
+.LFE229:
+	.size	fdt_bootargs_append_ab, .-fdt_bootargs_append_ab
+	.section	.text.fdt_bootargs_append,"ax",%progbits
+	.align	1
+	.weak	fdt_bootargs_append
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	fdt_bootargs_append, %function
+fdt_bootargs_append:
+.LFB211:
+	.loc 1 44 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL130:
+	.loc 1 46 0
+	movs	r0, #0
+.LVL131:
+	bx	lr
+	.cfi_endproc
+.LFE211:
+	.size	fdt_bootargs_append, .-fdt_bootargs_append
 	.section	.text.spl_fit_standalone_release,"ax",%progbits
 	.align	1
 	.weak	spl_fit_standalone_release
@@ -855,19 +1044,19 @@ fit_config_verify:
 	.fpu softvfp
 	.type	spl_fit_standalone_release, %function
 spl_fit_standalone_release:
-.LFB217:
-	.loc 1 381 0
+.LFB221:
+	.loc 1 406 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL119:
-	.loc 1 383 0
+.LVL132:
+	.loc 1 408 0
 	movs	r0, #0
-.LVL120:
+.LVL133:
 	bx	lr
 	.cfi_endproc
-.LFE217:
+.LFE221:
 	.size	spl_fit_standalone_release, .-spl_fit_standalone_release
 	.section	.text.spl_kernel_partition,"ax",%progbits
 	.align	1
@@ -878,23 +1067,23 @@ spl_fit_standalone_release:
 	.fpu softvfp
 	.type	spl_kernel_partition, %function
 spl_kernel_partition:
-.LFB219:
-	.loc 1 437 0
+.LFB223:
+	.loc 1 462 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL121:
-	.loc 1 439 0
-	ldr	r0, .L78
-.LVL122:
+.LVL134:
+	.loc 1 464 0
+	ldr	r0, .L94
+.LVL135:
 	bx	lr
-.L79:
+.L95:
 	.align	2
-.L78:
-	.word	.LC13
+.L94:
+	.word	.LC14
 	.cfi_endproc
-.LFE219:
+.LFE223:
 	.size	spl_kernel_partition, .-spl_kernel_partition
 	.section	.text.spl_load_simple_fit,"ax",%progbits
 	.align	1
@@ -905,12 +1094,12 @@ spl_kernel_partition:
 	.fpu softvfp
 	.type	spl_load_simple_fit, %function
 spl_load_simple_fit:
-.LFB222:
-	.loc 1 760 0
+.LFB226:
+	.loc 1 804 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 248
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL123:
+.LVL136:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
 	.cfi_offset 4, -32
@@ -925,40 +1114,40 @@ spl_load_simple_fit:
 	.cfi_def_cfa_offset 296
 	add	r7, sp, #16
 	.cfi_def_cfa 7, 280
-.LVL124:
-	.loc 1 760 0
-	mov	r5, r1
+.LVL137:
+	.loc 1 804 0
+	mov	r6, r1
 	mov	r4, r0
 	str	r2, [r7, #28]
-.LVL125:
+.LVL138:
 	mov	r2, r3
-.LVL126:
+.LVL139:
 	ldr	r3, [r3]
-.LVL127:
-	.loc 1 776 0
-	ldr	r1, .L143
-.LVL128:
+.LVL140:
+	.loc 1 820 0
+	ldr	r1, .L162
+.LVL141:
 	rev	r3, r3
-.LVL129:
+.LVL142:
 	cmp	r3, r1
 	str	r1, [r7]
-	beq	.L81
-	.loc 1 777 0
-	ldr	r0, .L143+4
-.LVL130:
-.L142:
-.LBB82:
-.LBB83:
-	.loc 1 595 0
+	beq	.L97
+	.loc 1 821 0
+	ldr	r0, .L162+4
+.LVL143:
+.L161:
+.LBB102:
+.LBB103:
+	.loc 1 639 0
 	bl	printf
-.LVL131:
-	.loc 1 596 0
+.LVL144:
+	.loc 1 640 0
 	mvn	r0, #21
-.LVL132:
-.L80:
-.LBE83:
-.LBE82:
-	.loc 1 792 0
+.LVL145:
+.L96:
+.LBE103:
+.LBE102:
+	.loc 1 836 0
 	adds	r7, r7, #248
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
@@ -966,311 +1155,311 @@ spl_load_simple_fit:
 	.cfi_def_cfa_register 13
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL133:
-.L81:
+.LVL146:
+.L97:
 	.cfi_restore_state
-.LBB93:
-.LBB91:
-	.loc 1 569 0
+.LBB113:
+.LBB111:
+	.loc 1 613 0
 	add	r3, r7, #36
 	ldr	r1, [r7, #28]
-	mov	r0, r5
-.LVL134:
+	mov	r0, r6
+.LVL147:
 	bl	spl_fit_load_blob
-.LVL135:
-	.loc 1 570 0
-	mov	r6, r0
+.LVL148:
+	.loc 1 614 0
+	mov	r5, r0
 	cmp	r0, #0
-	beq	.L83
-	.loc 1 576 0
-	ldr	r1, .L143+8
+	beq	.L99
+	.loc 1 620 0
+	ldr	r1, .L162+8
 	bl	fdt_path_offset
-.LVL136:
-	.loc 1 577 0
+.LVL149:
+	.loc 1 621 0
 	subs	r10, r0, #0
-	blt	.L83
-	.loc 1 583 0
+	blt	.L99
+	.loc 1 627 0
 	bl	fit_board_verify_required_sigs
-.LVL137:
-	.loc 1 593 0
+.LVL150:
+	.loc 1 637 0
 	movs	r1, #0
-	mov	r0, r6
+	mov	r0, r5
 	bl	fit_conf_get_node
-.LVL138:
-	.loc 1 594 0
+.LVL151:
+	.loc 1 638 0
 	subs	r1, r0, #0
-	bgt	.L84
-	.loc 1 595 0
-	ldr	r0, .L143+12
-.LVL139:
-	b	.L142
-.LVL140:
-.L84:
-	.loc 1 599 0
-	mov	r0, r6
-.LVL141:
+	bgt	.L100
+	.loc 1 639 0
+	ldr	r0, .L162+12
+.LVL152:
+	b	.L161
+.LVL153:
+.L100:
+	.loc 1 643 0
+	mov	r0, r5
+.LVL154:
 	bl	fit_config_verify
-.LVL142:
-	.loc 1 600 0
+.LVL155:
+	.loc 1 644 0
 	mov	r8, r0
-	cbz	r0, .L86
-	.loc 1 601 0
+	cbz	r0, .L102
+	.loc 1 645 0
 	mov	r1, r0
-	ldr	r0, .L143+16
-.LVL143:
+	ldr	r0, .L162+16
+.LVL156:
 	bl	printf
-.LVL144:
+.LVL157:
 	mov	r0, r8
-	b	.L80
-.L86:
-	.loc 1 604 0
-	ldr	r0, .L143+20
+	b	.L96
+.L102:
+	.loc 1 648 0
+	ldr	r0, .L162+20
 	bl	printf
-.LVL145:
-	.loc 1 632 0
+.LVL158:
+	.loc 1 676 0
 	mov	r3, r8
-	ldr	r2, .L143+24
+	ldr	r2, .L162+24
 	mov	r1, r10
-	mov	r0, r6
+	mov	r0, r5
 	bl	spl_fit_get_image_node
-.LVL146:
-	.loc 1 634 0
+.LVL159:
+	.loc 1 678 0
 	subs	fp, r0, #0
-	ble	.L87
-	.loc 1 636 0
+	ble	.L103
+	.loc 1 680 0
 	add	r3, r7, #92
 	str	fp, [sp]
 	str	r3, [sp, #4]
-	mov	r2, r6
+	mov	r2, r5
 	ldr	r3, [r7, #36]
-	mov	r0, r5
-.LVL147:
+	mov	r0, r6
+.LVL160:
 	ldr	r1, [r7, #28]
 	bl	spl_load_fit_image
-.LVL148:
-	.loc 1 638 0
-	cbnz	r0, .L89
-	.loc 1 639 0
+.LVL161:
+	.loc 1 682 0
+	cbnz	r0, .L105
+	.loc 1 683 0
 	ldr	r3, [r7, #104]
 	adds	r3, r3, #1
-	.loc 1 640 0
+	.loc 1 684 0
 	itt	eq
 	ldreq	r3, [r7, #100]
 	streq	r3, [r7, #104]
-	.loc 1 642 0
+	.loc 1 686 0
 	ldr	r0, [r7, #104]
-.LVL149:
+.LVL162:
 	bl	spl_fit_standalone_release
-.LVL150:
-	.loc 1 643 0
+.LVL163:
+	.loc 1 687 0
 	mov	r1, r0
-	cbz	r0, .L89
-	.loc 1 644 0
-	ldr	r0, .L143+28
-.LVL151:
+	cbz	r0, .L105
+	.loc 1 688 0
+	ldr	r0, .L162+28
+.LVL164:
 	bl	printf
-.LVL152:
-.L89:
-	.loc 1 659 0
+.LVL165:
+.L105:
+	.loc 1 703 0
 	movs	r3, #0
-	ldr	r2, .L143+32
+	ldr	r2, .L162+32
 	mov	r1, r10
-	mov	r0, r6
+	mov	r0, r5
 	bl	spl_fit_get_image_node
-.LVL153:
-	.loc 1 665 0
+.LVL166:
+	.loc 1 709 0
 	subs	fp, r0, #0
-	bge	.L92
-	.loc 1 667 0
+	bge	.L108
+	.loc 1 711 0
 	movs	r3, #0
-	ldr	r2, .L143+36
+	ldr	r2, .L162+36
 	mov	r1, r10
-	mov	r0, r6
-.LVL154:
+	mov	r0, r5
+.LVL167:
 	bl	spl_fit_get_image_node
-.LVL155:
-	.loc 1 674 0
+.LVL168:
+	.loc 1 718 0
 	subs	fp, r0, #0
-	blt	.L83
-	.loc 1 672 0
+	blt	.L99
+	.loc 1 716 0
 	mov	r8, #1
-	b	.L92
-.LVL156:
-.L87:
-	.loc 1 658 0
-	bne	.L89
+	b	.L108
+.LVL169:
+.L103:
+	.loc 1 702 0
+	bne	.L105
 	mov	r8, fp
-.LVL157:
-.L92:
-	.loc 1 681 0
+.LVL170:
+.L108:
+	.loc 1 725 0
 	str	r4, [sp, #4]
-	mov	r2, r6
+	mov	r2, r5
 	str	fp, [sp]
-	mov	r0, r5
-.LVL158:
+	mov	r0, r6
+.LVL171:
 	ldr	r3, [r7, #36]
 	ldr	r1, [r7, #28]
 	bl	spl_load_fit_image
-.LVL159:
-	.loc 1 683 0
+.LVL172:
+	.loc 1 727 0
 	cmp	r0, #0
-	bne	.L80
-.LVL160:
-.LBB84:
-.LBB85:
-	.loc 1 376 0
+	bne	.L96
+.LVL173:
+.LBB104:
+.LBB105:
+	.loc 1 401 0
 	adds	r2, r4, #4
-.LVL161:
+.LVL174:
 	mov	r1, fp
-	mov	r0, r6
-.LVL162:
+	mov	r0, r5
+.LVL175:
 	bl	fit_image_get_os
-.LVL163:
-.LBE85:
-.LBE84:
-	.loc 1 690 0
-	cbz	r0, .L93
-	.loc 1 694 0
+.LVL176:
+.LBE105:
+.LBE104:
+	.loc 1 734 0
+	cbz	r0, .L109
+	.loc 1 738 0
 	movs	r3, #17
 	strb	r3, [r4, #4]
-.L93:
-	.loc 1 701 0
+.L109:
+	.loc 1 745 0
 	ldrb	r3, [r4, #4]	@ zero_extendqisi2
 	cmp	r3, #17
-	bne	.L101
-	.loc 1 702 0
+	bne	.L117
+	.loc 1 746 0
 	ldr	r3, [r7, #36]
-	mov	r1, r5
+	mov	r1, r6
 	str	r10, [sp]
 	mov	r0, r4
 	str	r3, [sp, #4]
-	mov	r3, r6
+	mov	r3, r5
 	ldr	r2, [r7, #28]
 	bl	spl_fit_append_fdt
-.LVL164:
-.L101:
-.LBB86:
-	.loc 1 707 0
+.LVL177:
+.L117:
+.LBB106:
+	.loc 1 751 0
 	movs	r3, #0
-	.loc 1 709 0
-	ldr	r2, .L143+36
-	.loc 1 707 0
+	.loc 1 753 0
+	ldr	r2, .L162+36
+	.loc 1 751 0
 	strb	r3, [r7, #32]
-	.loc 1 709 0
+	.loc 1 753 0
 	mov	r1, r10
 	mov	r3, r8
-	mov	r0, r6
+	mov	r0, r5
 	bl	spl_fit_get_image_node
-.LVL165:
-	.loc 1 710 0
+.LVL178:
+	.loc 1 754 0
 	subs	r3, r0, #0
-	blt	.L95
-.LVL166:
-.LBB87:
-.LBB88:
-	.loc 1 376 0
+	blt	.L111
+.LVL179:
+.LBB107:
+.LBB108:
+	.loc 1 401 0
 	add	r2, r7, #32
-.LVL167:
+.LVL180:
 	mov	r1, r3
-	mov	r0, r6
-.LVL168:
+	mov	r0, r5
+.LVL181:
 	str	r3, [r7, #24]
 	bl	fit_image_get_os
-.LVL169:
-.LBE88:
-.LBE87:
-	.loc 1 717 0
+.LVL182:
+.LBE108:
+.LBE107:
+	.loc 1 761 0
 	ldr	r2, [r4, #28]
 	ldr	r3, [r7, #24]
 	cmp	r2, #2
-	bne	.L96
+	bne	.L112
 	ldrb	r2, [r7, #32]	@ zero_extendqisi2
 	cmp	r2, #17
-	beq	.L104
-.L96:
-	.loc 1 721 0
+	beq	.L120
+.L112:
+	.loc 1 765 0
 	add	fp, r7, #92
-	mov	r2, r6
+	mov	r2, r5
 	stm	sp, {r3, fp}
-	mov	r0, r5
+	mov	r0, r6
 	ldr	r3, [r7, #36]
 	ldr	r1, [r7, #28]
 	bl	spl_load_fit_image
-.LVL170:
-	.loc 1 723 0
+.LVL183:
+	.loc 1 767 0
 	cmp	r0, #0
-	blt	.L104
-	.loc 1 726 0
+	blt	.L120
+	.loc 1 770 0
 	ldrb	r3, [r7, #32]	@ zero_extendqisi2
 	cmp	r3, #17
-	bne	.L98
-	.loc 1 727 0
+	bne	.L114
+	.loc 1 771 0
 	ldr	r3, [r7, #36]
-	mov	r1, r5
+	mov	r1, r6
 	str	r10, [sp]
 	mov	r0, fp
-.LVL171:
+.LVL184:
 	str	r3, [sp, #4]
-	mov	r3, r6
+	mov	r3, r5
 	ldr	r2, [r7, #28]
 	bl	spl_fit_append_fdt
-.LVL172:
-	.loc 1 729 0
+.LVL185:
+	.loc 1 773 0
 	ldr	r3, [r7, #112]
 	str	r3, [r4, #20]
-.L98:
-	.loc 1 736 0
+.L114:
+	.loc 1 780 0
 	ldr	r3, [r4, #12]
 	adds	r3, r3, #1
-	bne	.L99
-	.loc 1 737 0
+	bne	.L115
+	.loc 1 781 0
 	ldr	r3, [r7, #104]
-	.loc 1 736 0
+	.loc 1 780 0
 	adds	r2, r3, #1
-	.loc 1 738 0
+	.loc 1 782 0
 	it	ne
 	strne	r3, [r4, #12]
-.L99:
-	.loc 1 741 0
+.L115:
+	.loc 1 785 0
 	ldr	r3, [r4, #20]
 	str	r3, [r7, #24]
-.LVL173:
+.LVL186:
 	cmp	r3, #0
-	beq	.L104
-.LVL174:
-.LBB89:
-.LBB90:
-	.loc 1 356 0
+	beq	.L120
+.LVL187:
+.LBB109:
+.LBB110:
+	.loc 1 381 0
 	add	r3, r7, #48
-.LVL175:
+.LVL188:
 	mov	r2, r8
-	ldr	r1, .L143+36
-	mov	r0, r6
+	ldr	r1, .L162+36
+	mov	r0, r5
 	bl	spl_fit_get_image_name.isra.0
-.LVL176:
-	.loc 1 358 0
+.LVL189:
+	.loc 1 383 0
 	cmp	r0, #0
-	blt	.L104
-	.loc 1 361 0
+	blt	.L120
+	.loc 1 386 0
 	mov	r3, r8
-	ldr	r2, .L143+36
+	ldr	r2, .L162+36
 	mov	r1, r10
-	mov	r0, r6
-.LVL177:
+	mov	r0, r5
+.LVL190:
 	bl	spl_fit_get_image_node
-.LVL178:
-	.loc 1 363 0
+.LVL191:
+	.loc 1 388 0
 	ldr	r3, [r7, #48]
-	.loc 1 365 0
+	.loc 1 390 0
 	mov	r1, r0
-	.loc 1 361 0
+	.loc 1 386 0
 	mov	fp, r0
-.LVL179:
-	.loc 1 365 0
-	ldr	r2, .L143+40
-	mov	r0, r6
-.LVL180:
-	.loc 1 363 0
+.LVL192:
+	.loc 1 390 0
+	ldr	r2, .L162+40
+	mov	r0, r5
+.LVL193:
+	.loc 1 388 0
 	str	r3, [r7, #20]
 	ldr	r3, [r7, #100]
 	str	r3, [r7, #16]
@@ -1278,21 +1467,21 @@ spl_load_simple_fit:
 	str	r3, [r7, #12]
 	ldr	r3, [r7, #104]
 	str	r3, [r7, #8]
-	.loc 1 365 0
+	.loc 1 390 0
 	movs	r3, #0
 	bl	fdt_getprop
-.LVL181:
-	.loc 1 366 0
+.LVL194:
+	.loc 1 391 0
 	movs	r3, #0
-	.loc 1 365 0
+	.loc 1 390 0
 	str	r0, [r7, #4]
-	.loc 1 366 0
-	ldr	r2, .L143+44
+	.loc 1 391 0
+	ldr	r2, .L162+44
 	mov	r1, fp
-	mov	r0, r6
+	mov	r0, r5
 	bl	fdt_getprop
-.LVL182:
-	.loc 1 363 0
+.LVL195:
+	.loc 1 388 0
 	str	r0, [sp, #12]
 	mov	r1, r8
 	ldr	r3, [r7, #4]
@@ -1305,173 +1494,171 @@ spl_load_simple_fit:
 	ldr	r2, [r7, #20]
 	ldr	r0, [r7, #24]
 	bl	fdt_record_loadable
-.LVL183:
-.L104:
-.LBE90:
-.LBE89:
-.LBE86:
-	.loc 1 706 0
+.LVL196:
+.L120:
+.LBE110:
+.LBE109:
+.LBE106:
+	.loc 1 750 0
 	add	r8, r8, #1
-.LVL184:
-	b	.L101
-.LVL185:
-.L95:
-	.loc 1 752 0
+.LVL197:
+	b	.L117
+.LVL198:
+.L111:
+	.loc 1 796 0
 	ldr	r3, [r4, #12]
 	subs	r3, r3, #1
 	adds	r3, r3, #3
-	bls	.L103
-	.loc 1 753 0
+	bls	.L119
+	.loc 1 797 0
 	ldr	r3, [r4, #8]
 	str	r3, [r4, #12]
-.L103:
-.LVL186:
-.LBE91:
-.LBE93:
-.LBB94:
-.LBB95:
-	.loc 1 454 0
-	ldr	r3, .L143+48
-	.loc 1 444 0
-	str	sp, [r7, #24]
-	.loc 1 454 0
+.L119:
+.LVL199:
+.LBE111:
+.LBE113:
+.LBB114:
+.LBB115:
+	.loc 1 479 0
+	ldr	r3, .L162+48
+	.loc 1 469 0
+	str	sp, [r7, #16]
+	.loc 1 479 0
 	ldm	r3, {r0, r1, r2}
 	add	r3, r7, #36
 	stm	r3, {r0, r1, r2}
-.LVL187:
-	.loc 1 456 0
-	ldr	r3, [r5, #8]
+.LVL200:
+	.loc 1 481 0
+	ldr	r3, [r6, #8]
 	adds	r3, r3, #7
 	bic	r3, r3, #7
 	sub	sp, sp, r3
-.LVL188:
-	.loc 1 463 0
+.LVL201:
+	.loc 1 488 0
 	ldr	r3, [r4, #28]
-	.loc 1 456 0
+	.loc 1 481 0
 	add	r8, sp, #16
-.LVL189:
-	.loc 1 463 0
+.LVL202:
+	.loc 1 488 0
 	cmp	r3, #2
-	bne	.L115
-.LVL190:
-	.loc 1 470 0
-	mov	r1, r5
+	bne	.L134
+.LVL203:
+	.loc 1 495 0
+	mov	r1, r6
 	mov	r0, r4
 	bl	spl_kernel_partition
-.LVL191:
-	.loc 1 471 0
+.LVL204:
+	.loc 1 496 0
 	add	r2, r7, #92
 	mov	r1, r0
-	ldr	r0, [r5]
-.LVL192:
+	ldr	r0, [r6]
+.LVL205:
 	bl	part_get_info_by_name
-.LVL193:
+.LVL206:
 	cmp	r0, #0
-	bgt	.L105
-	.loc 1 472 0
-	ldr	r1, .L143+52
-	ldr	r0, .L143+56
-.L140:
-	.loc 1 485 0
+	bgt	.L121
+	.loc 1 497 0
+	ldr	r1, .L162+52
+	ldr	r0, .L162+56
+.L159:
+	.loc 1 510 0
 	bl	printf
-.LVL194:
-.L141:
-	.loc 1 486 0
-	mvn	r3, #21
-.LVL195:
-.L106:
-.LBE95:
-.LBE94:
-	.loc 1 787 0
-	mov	r0, r3
-.LBB98:
-.LBB96:
-	ldr	sp, [r7, #24]
-.LVL196:
-.LBE96:
-.LBE98:
-	b	.L80
-.LVL197:
-.L105:
-.LBB99:
-.LBB97:
-	.loc 1 475 0
-	ldr	r10, [r7, #92]
-.LVL198:
-	.loc 1 479 0
-	mov	r3, r8
-	ldr	r6, [r5, #16]
+.LVL207:
+.L160:
+	.loc 1 511 0
+	mvn	fp, #21
+.LVL208:
+.L122:
+.LBE115:
+.LBE114:
+	.loc 1 831 0
+	mov	r0, fp
+.LBB120:
+.LBB118:
+	ldr	sp, [r7, #16]
+.LVL209:
+.LBE118:
+.LBE120:
+	b	.L96
+.LVL210:
+.L121:
+.LBB121:
+.LBB119:
+	.loc 1 500 0
+	ldr	r3, [r7, #92]
+	.loc 1 504 0
 	movs	r2, #1
-	mov	r0, r5
-	mov	r1, r10
-	blx	r6
-.LVL199:
+	ldr	r5, [r6, #16]
+	mov	r0, r6
+	.loc 1 500 0
+	str	r3, [r7, #24]
+.LVL211:
+	.loc 1 504 0
+	mov	r3, r8
+.LVL212:
+	ldr	r1, [r7, #24]
+	blx	r5
+.LVL213:
 	cmp	r0, #1
-	bne	.L117
-.LVL200:
+	bne	.L136
+.LVL214:
 	ldr	r3, [r8]
-	.loc 1 484 0
+	.loc 1 509 0
 	ldr	r2, [r7]
 	rev	r3, r3
-.LVL201:
+.LVL215:
 	cmp	r3, r2
-	beq	.L107
-	.loc 1 485 0
-	ldr	r1, .L143+52
-	ldr	r0, .L143+60
-	b	.L140
-.L107:
-	.loc 1 489 0
-	mov	r2, r8
+	beq	.L123
+	.loc 1 510 0
+	ldr	r1, .L162+52
+	ldr	r0, .L162+60
+	b	.L159
+.L123:
+	.loc 1 514 0
 	add	r3, r7, #32
-	mov	r1, r10
-	mov	r0, r5
+	mov	r2, r8
+	ldr	r1, [r7, #24]
+	mov	r0, r6
 	bl	spl_fit_load_blob
-.LVL202:
-	.loc 1 490 0
-	mov	r8, r0
-.LVL203:
+.LVL216:
+	.loc 1 515 0
+	mov	r5, r0
 	cmp	r0, #0
-	beq	.L118
-	.loc 1 499 0
+	beq	.L137
+	.loc 1 524 0
 	movs	r1, #0
 	bl	fit_conf_get_node
-.LVL204:
-	.loc 1 500 0
+.LVL217:
+	.loc 1 525 0
 	subs	r1, r0, #0
-	bgt	.L108
-	.loc 1 501 0
-	ldr	r0, .L143+12
-.LVL205:
+	bgt	.L124
+	.loc 1 526 0
+	ldr	r0, .L162+12
+.LVL218:
 	bl	printf
-.LVL206:
-	b	.L141
-.LVL207:
-.L108:
-	.loc 1 505 0
-	mov	r0, r8
-.LVL208:
+.LVL219:
+	b	.L160
+.LVL220:
+.L124:
+	.loc 1 530 0
+	mov	r0, r5
+.LVL221:
 	bl	fit_config_verify
-.LVL209:
-	.loc 1 506 0
-	cbz	r0, .L109
-	.loc 1 507 0
+.LVL222:
+	.loc 1 531 0
+	mov	fp, r0
+	cbz	r0, .L125
+	.loc 1 532 0
 	mov	r1, r0
-	str	r0, [r7, #28]
-.LVL210:
-	ldr	r0, .L143+16
-.LVL211:
+	ldr	r0, .L162+16
+.LVL223:
 	bl	printf
-.LVL212:
-.L119:
-	.loc 1 513 0
-	ldr	r3, [r7, #28]
-	b	.L106
-.L144:
+.LVL224:
+	b	.L122
+.L163:
 	.align	2
-.L143:
+.L162:
 	.word	-804389139
-	.word	.LC14
 	.word	.LC15
 	.word	.LC16
 	.word	.LC17
@@ -1482,136 +1669,189 @@ spl_load_simple_fit:
 	.word	.LC22
 	.word	.LC23
 	.word	.LC24
+	.word	.LC25
 	.word	.LANCHOR1
 	.word	.LANCHOR0
-	.word	.LC25
 	.word	.LC26
-.LVL213:
-.L109:
-	str	r0, [r7, #20]
-	.loc 1 510 0
-	ldr	r0, .L145
-.LVL214:
+	.word	.LC27
+.LVL225:
+.L125:
+	.loc 1 535 0
+	ldr	r0, .L164
+.LVL226:
 	bl	printf
-.LVL215:
-	.loc 1 512 0
-	ldr	r1, .L145+4
-	mov	r0, r8
+.LVL227:
+	.loc 1 537 0
+	ldr	r1, .L164+4
+	mov	r0, r5
 	bl	fdt_path_offset
-.LVL216:
-	.loc 1 513 0
+.LVL228:
+	.loc 1 538 0
 	subs	r3, r0, #0
-	str	r3, [r7, #28]
-.LVL217:
-	blt	.L119
-	ldr	r3, [r7, #20]
-	mov	r6, r3
-.LVL218:
-.L114:
-	.loc 1 520 0
+	str	r3, [r7, #20]
+	blt	.L138
+	str	fp, [r7, #28]
+.LVL229:
+.L133:
+.LBB116:
+	.loc 1 545 0
+	ldr	r3, [r7, #28]
+	mov	r0, r5
+	ldr	r1, [r7, #20]
+	mov	r2, r3
 	add	r3, r7, #36
-	ldr	r1, [r7, #28]
-	ldr	fp, [r3, r6, lsl #2]
-	mov	r0, r8
+	ldr	r8, [r3, r2, lsl #2]
 	movs	r3, #0
-	mov	r2, fp
+	mov	r2, r8
 	bl	spl_fit_get_image_node
-.LVL219:
-	.loc 1 522 0
-	cmp	r0, #0
-	blt	.L111
-	.loc 1 527 0
+.LVL230:
+	.loc 1 548 0
+	ldr	r10, [r6]
+	.loc 1 545 0
+	mov	fp, r0
+.LVL231:
+	.loc 1 550 0
+	ldr	r3, [r10, #4]
+	cmp	r3, #1
+	bne	.L127
+	ldr	r0, .L164+8
+.LVL232:
+	bl	strlen
+.LVL233:
+	ldr	r1, .L164+8
+	mov	r2, r0
+	mov	r0, r8
+	bl	memcmp
+.LVL234:
+	cbnz	r0, .L127
+	.loc 1 551 0
+	bl	misc_decompress_int_en
+.LVL235:
+.L127:
+	.loc 1 554 0
+	cmp	fp, #0
+	blt	.L130
+	.loc 1 559 0
 	add	r3, r7, #48
-	mov	r2, r8
-	stm	sp, {r0, r3}
-	mov	r1, r10
+	str	fp, [sp]
+.LVL236:
+	str	r3, [sp, #4]
+	mov	r2, r5
 	ldr	r3, [r7, #32]
-	mov	r0, r5
-.LVL220:
+	mov	r0, r6
+	ldr	r1, [r7, #24]
 	bl	spl_load_fit_image
-.LVL221:
-	.loc 1 529 0
-	mov	r3, r0
+.LVL237:
+	.loc 1 561 0
+	mov	fp, r0
+.LVL238:
 	cmp	r0, #0
-	bne	.L106
-	.loc 1 533 0
-	ldr	r1, .L145+8
-	mov	r0, fp
-.LVL222:
+	bne	.L122
+	.loc 1 565 0
+	ldr	r1, .L164+12
+	mov	r0, r8
+.LVL239:
 	bl	strcmp
-.LVL223:
-	cbnz	r0, .L112
-	.loc 1 534 0
-	ldr	r3, [r7, #56]
-	str	r3, [r4, #20]
-.L111:
-	.loc 1 519 0
-	adds	r6, r6, #1
-.LVL224:
-	cmp	r6, #3
-	bne	.L114
-.LVL225:
-.L115:
-	.loc 1 554 0
-	movs	r3, #0
-	b	.L106
-.LVL226:
-.L112:
-	.loc 1 535 0
-	ldr	r1, .L145+12
-	mov	r0, fp
+.LVL240:
+	cbnz	r0, .L131
+	.loc 1 575 0
+	ldr	r3, [r10, #4]
+	.loc 1 566 0
+	ldr	r8, [r7, #56]
+	.loc 1 575 0
+	cmp	r3, #1
+	.loc 1 566 0
+	str	r8, [r4, #20]
+	.loc 1 575 0
+	bne	.L130
+	.loc 1 576 0
+	mov	r0, r10
+	bl	mtd_part_parse
+.LVL241:
+	mov	r1, r0
+	mov	r0, r8
+	bl	fdt_bootargs_append
+.LVL242:
+.L130:
+.LBE116:
+	.loc 1 544 0
+	ldr	r3, [r7, #28]
+	adds	r3, r3, #1
+	cmp	r3, #3
+	str	r3, [r7, #28]
+.LVL243:
+	bne	.L133
+.LVL244:
+.L134:
+	.loc 1 598 0
+	mov	fp, #0
+	b	.L122
+.LVL245:
+.L131:
+.LBB117:
+	.loc 1 578 0
+	ldr	r1, .L164+16
+	mov	r0, r8
 	bl	strcmp
-.LVL227:
+.LVL246:
 	cmp	r0, #0
-	bne	.L111
-	.loc 1 537 0
+	bne	.L130
+	.loc 1 580 0
 	ldr	r3, [r7, #56]
 	str	r3, [r4, #16]
-	b	.L111
-.LVL228:
-.L117:
-	.loc 1 481 0
-	mvn	r3, #4
-	b	.L106
-.LVL229:
-.L118:
-	.loc 1 492 0
-	mvn	r3, #18
-	b	.L106
-.LVL230:
-.L83:
-.LBE97:
-.LBE99:
-.LBB100:
-.LBB92:
-	.loc 1 572 0
+	b	.L130
+.LVL247:
+.L136:
+.LBE117:
+	.loc 1 506 0
+	mvn	fp, #4
+	b	.L122
+.LVL248:
+.L137:
+	.loc 1 517 0
+	mvn	fp, #18
+	b	.L122
+.LVL249:
+.L138:
+	.loc 1 538 0
+	ldr	fp, [r7, #20]
+.LVL250:
+	b	.L122
+.LVL251:
+.L99:
+.LBE119:
+.LBE121:
+.LBB122:
+.LBB112:
+	.loc 1 616 0
 	mov	r0, #-1
-.LVL231:
-	b	.L80
-.L146:
+.LVL252:
+	b	.L96
+.L165:
 	.align	2
-.L145:
-	.word	.LC18
-	.word	.LC15
+.L164:
+	.word	.LC19
+	.word	.LC16
+	.word	.LC2
 	.word	.LC0
 	.word	.LC1
-.LBE92:
-.LBE100:
+.LBE112:
+.LBE122:
 	.cfi_endproc
-.LFE222:
+.LFE226:
 	.size	spl_load_simple_fit, .-spl_load_simple_fit
 	.section	.rodata
 	.align	2
 	.set	.LANCHOR1,. + 0
-.LC27:
+.LC28:
 	.word	.LC0
 	.word	.LC1
 	.word	.LC2
-	.section	.rodata.__func__.8795,"a",%progbits
+	.section	.rodata.__func__.9342,"a",%progbits
 	.set	.LANCHOR0,. + 0
-	.type	__func__.8795, %object
-	.size	__func__.8795, 20
-__func__.8795:
+	.type	__func__.9342, %object
+	.size	__func__.9342, 20
+__func__.9342:
 	.ascii	"spl_load_kernel_fit\000"
 	.section	.rodata.spl_fit_get_image_name.isra.0.str1.1,"aMS",%progbits,1
 .LC4:
@@ -1621,55 +1861,59 @@ __func__.8795:
 .LC6:
 	.ascii	"   %s\012\000"
 	.section	.rodata.spl_kernel_partition.str1.1,"aMS",%progbits,1
-.LC13:
+.LC14:
 	.ascii	"boot\000"
 	.section	.rodata.spl_load_fit_image.str1.1,"aMS",%progbits,1
 .LC7:
-	.ascii	"Cannot get image data/size\012\000"
+	.ascii	"## Preload the image OK.\012\000"
 .LC8:
-	.ascii	"compression\000"
+	.ascii	"Cannot get image data/size\012\000"
 .LC9:
-	.ascii	"## Checking %s 0x%08lx (%s @0x%08lx) ... \000"
+	.ascii	"compression\000"
 .LC10:
-	.ascii	"## Checking %s 0x%08lx ... \000"
+	.ascii	"## Checking %s storage address 0x%08lx 0x%08lx (%s "
+	.ascii	"@0x%08lx) ... \000"
 .LC11:
-	.ascii	"OK\012\000"
+	.ascii	"## Checking %s storage address 0x%08lx excute addre"
+	.ascii	"ss 0x%08lx ... \000"
 .LC12:
+	.ascii	"OK\012\000"
+.LC13:
 	.ascii	"entry\000"
 	.section	.rodata.spl_load_simple_fit.str1.1,"aMS",%progbits,1
-.LC14:
-	.ascii	"Not fit magic\012\000"
 .LC15:
-	.ascii	"/images\000"
+	.ascii	"Not fit magic\012\000"
 .LC16:
-	.ascii	"No default config node\012\000"
+	.ascii	"/images\000"
 .LC17:
-	.ascii	"fit verify configure failed, ret=%d\012\000"
+	.ascii	"No default config node\012\000"
 .LC18:
-	.ascii	"\012\000"
+	.ascii	"fit verify configure failed, ret=%d\012\000"
 .LC19:
-	.ascii	"standalone\000"
+	.ascii	"\012\000"
 .LC20:
-	.ascii	"Start standalone fail, ret = %d\012\000"
+	.ascii	"standalone\000"
 .LC21:
-	.ascii	"firmware\000"
+	.ascii	"Start standalone fail, ret = %d\012\000"
 .LC22:
-	.ascii	"loadables\000"
+	.ascii	"firmware\000"
 .LC23:
-	.ascii	"type\000"
+	.ascii	"loadables\000"
 .LC24:
-	.ascii	"os\000"
+	.ascii	"type\000"
 .LC25:
-	.ascii	"%s: no partition\012\000"
+	.ascii	"os\000"
 .LC26:
+	.ascii	"%s: no partition\012\000"
+.LC27:
 	.ascii	"%s: Not fit magic\012\000"
 	.section	.rodata.str1.1,"aMS",%progbits,1
 .LC0:
 	.ascii	"fdt\000"
-.LC1:
-	.ascii	"kernel\000"
 .LC2:
 	.ascii	"ramdisk\000"
+.LC1:
+	.ascii	"kernel\000"
 	.text
 .Letext0:
 	.file 3 "include/common.h"
@@ -1692,25 +1936,25 @@ __func__.8795:
 	.file 20 "include/u-boot/sha1.h"
 	.file 21 "include/u-boot/sha256.h"
 	.file 22 "include/net.h"
-	.file 23 "./arch/arm/include/asm/spl.h"
-	.file 24 "include/spl.h"
-	.file 25 "include/malloc.h"
+	.file 23 "include/malloc.h"
+	.file 24 "./arch/arm/include/asm/spl.h"
+	.file 25 "include/spl.h"
 	.file 26 "include/linux/byteorder/swab.h"
 	.file 27 "include/linux/../../scripts/dtc/libfdt/libfdt.h"
 	.file 28 "include/fdt_support.h"
 	.file 29 "include/stdio.h"
 	.section	.debug_info,"",%progbits
 .Ldebug_info0:
-	.4byte	0x283d
+	.4byte	0x2a25
 	.2byte	0x4
 	.4byte	.Ldebug_abbrev0
 	.byte	0x4
 	.uleb128 0x1
-	.4byte	.LASF408
+	.4byte	.LASF414
 	.byte	0xc
-	.4byte	.LASF409
-	.4byte	.LASF410
-	.4byte	.Ldebug_ranges0+0x98
+	.4byte	.LASF415
+	.4byte	.LASF416
+	.4byte	.Ldebug_ranges0+0x108
 	.4byte	0
 	.4byte	.Ldebug_line0
 	.uleb128 0x2
@@ -3706,131 +3950,146 @@ __func__.8795:
 	.byte	0x16
 	.2byte	0x28c
 	.4byte	0x1046
-	.uleb128 0x4
+	.uleb128 0xf
 	.4byte	.LASF310
 	.byte	0x17
+	.2byte	0x3ba
+	.4byte	0x122
+	.uleb128 0xf
+	.4byte	.LASF311
+	.byte	0x17
+	.2byte	0x3bb
+	.4byte	0x122
+	.uleb128 0xf
+	.4byte	.LASF312
+	.byte	0x17
+	.2byte	0x3bc
+	.4byte	0x122
+	.uleb128 0x4
+	.4byte	.LASF313
+	.byte	0x18
 	.byte	0x2b
 	.4byte	0x195
 	.uleb128 0x4
-	.4byte	.LASF311
-	.byte	0x17
+	.4byte	.LASF314
+	.byte	0x18
 	.byte	0x2b
 	.4byte	0x195
 	.uleb128 0x14
-	.4byte	.LASF312
+	.4byte	.LASF315
 	.byte	0x2c
-	.byte	0x18
+	.byte	0x19
 	.byte	0x1b
-	.4byte	0x1122
+	.4byte	0x1146
 	.uleb128 0x15
 	.4byte	.LASF74
-	.byte	0x18
+	.byte	0x19
 	.byte	0x1c
 	.4byte	0xd7
 	.byte	0
 	.uleb128 0xb
 	.ascii	"os\000"
-	.byte	0x18
+	.byte	0x19
 	.byte	0x1d
 	.4byte	0x90
 	.byte	0x4
 	.uleb128 0x15
 	.4byte	.LASF265
-	.byte	0x18
+	.byte	0x19
 	.byte	0x1e
 	.4byte	0x101
 	.byte	0x8
 	.uleb128 0x15
-	.4byte	.LASF313
-	.byte	0x18
+	.4byte	.LASF316
+	.byte	0x19
 	.byte	0x1f
 	.4byte	0x101
 	.byte	0xc
 	.uleb128 0x15
-	.4byte	.LASF314
-	.byte	0x18
+	.4byte	.LASF317
+	.byte	0x19
 	.byte	0x25
 	.4byte	0x101
 	.byte	0x10
 	.uleb128 0x15
-	.4byte	.LASF315
-	.byte	0x18
+	.4byte	.LASF318
+	.byte	0x19
 	.byte	0x27
 	.4byte	0x153
 	.byte	0x14
 	.uleb128 0x15
-	.4byte	.LASF316
-	.byte	0x18
+	.4byte	.LASF319
+	.byte	0x19
 	.byte	0x28
 	.4byte	0x9f
 	.byte	0x18
 	.uleb128 0x15
-	.4byte	.LASF317
-	.byte	0x18
+	.4byte	.LASF320
+	.byte	0x19
 	.byte	0x29
 	.4byte	0x9f
 	.byte	0x1c
 	.uleb128 0x15
 	.4byte	.LASF78
-	.byte	0x18
+	.byte	0x19
 	.byte	0x2a
 	.4byte	0x9f
 	.byte	0x20
 	.uleb128 0x15
-	.4byte	.LASF318
-	.byte	0x18
+	.4byte	.LASF321
+	.byte	0x19
 	.byte	0x2b
 	.4byte	0x9f
 	.byte	0x24
 	.uleb128 0xb
 	.ascii	"arg\000"
-	.byte	0x18
+	.byte	0x19
 	.byte	0x2c
 	.4byte	0x153
 	.byte	0x28
 	.byte	0
 	.uleb128 0x14
-	.4byte	.LASF319
+	.4byte	.LASF322
 	.byte	0x14
-	.byte	0x18
+	.byte	0x19
 	.byte	0x38
-	.4byte	0x116b
+	.4byte	0x118f
 	.uleb128 0xb
 	.ascii	"dev\000"
-	.byte	0x18
+	.byte	0x19
 	.byte	0x39
 	.4byte	0x153
 	.byte	0
 	.uleb128 0x15
 	.4byte	.LASF280
-	.byte	0x18
+	.byte	0x19
 	.byte	0x3a
 	.4byte	0x153
 	.byte	0x4
 	.uleb128 0x15
-	.4byte	.LASF320
-	.byte	0x18
+	.4byte	.LASF323
+	.byte	0x19
 	.byte	0x3b
 	.4byte	0x50
 	.byte	0x8
 	.uleb128 0x15
-	.4byte	.LASF321
-	.byte	0x18
+	.4byte	.LASF324
+	.byte	0x19
 	.byte	0x3c
 	.4byte	0xd7
 	.byte	0xc
 	.uleb128 0x15
-	.4byte	.LASF322
-	.byte	0x18
+	.4byte	.LASF325
+	.byte	0x19
 	.byte	0x3d
-	.4byte	0x118f
+	.4byte	0x11b3
 	.byte	0x10
 	.byte	0
 	.uleb128 0x19
 	.4byte	0x122
-	.4byte	0x1189
+	.4byte	0x11ad
 	.uleb128 0x1a
-	.4byte	0x1189
+	.4byte	0x11ad
 	.uleb128 0x1a
 	.4byte	0x122
 	.uleb128 0x1a
@@ -3840,155 +4099,140 @@ __func__.8795:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x1122
+	.4byte	0x1146
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x116b
+	.4byte	0x118f
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x1092
-	.uleb128 0xf
-	.4byte	.LASF323
-	.byte	0x19
-	.2byte	0x3ba
-	.4byte	0x122
-	.uleb128 0xf
-	.4byte	.LASF324
-	.byte	0x19
-	.2byte	0x3bb
-	.4byte	0x122
-	.uleb128 0xf
-	.4byte	.LASF325
-	.byte	0x19
-	.2byte	0x3bc
-	.4byte	0x122
+	.4byte	0x10b6
 	.uleb128 0x2a
-	.4byte	.LASF341
+	.4byte	.LASF342
 	.byte	0x1
-	.2byte	0x2f6
+	.2byte	0x322
 	.4byte	0x50
-	.4byte	.LFB222
-	.4byte	.LFE222-.LFB222
+	.4byte	.LFB226
+	.4byte	.LFE226-.LFB226
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1984
+	.4byte	0x1a03
 	.uleb128 0x2b
 	.4byte	.LASF326
 	.byte	0x1
-	.2byte	0x2f6
-	.4byte	0x1195
-	.4byte	.LLST60
+	.2byte	0x322
+	.4byte	0x11b9
+	.4byte	.LLST66
 	.uleb128 0x2b
 	.4byte	.LASF327
 	.byte	0x1
-	.2byte	0x2f7
-	.4byte	0x1189
-	.4byte	.LLST61
+	.2byte	0x323
+	.4byte	0x11ad
+	.4byte	.LLST67
 	.uleb128 0x2b
 	.4byte	.LASF328
 	.byte	0x1
-	.2byte	0x2f7
+	.2byte	0x323
 	.4byte	0x122
-	.4byte	.LLST62
+	.4byte	.LLST68
 	.uleb128 0x2c
 	.ascii	"fit\000"
 	.byte	0x1
-	.2byte	0x2f7
+	.2byte	0x323
 	.4byte	0x153
-	.4byte	.LLST63
+	.4byte	.LLST69
 	.uleb128 0x2d
 	.4byte	.LASF329
 	.byte	0x1
-	.2byte	0x2f9
+	.2byte	0x325
 	.4byte	0x122
-	.4byte	.LLST64
+	.4byte	.LLST70
 	.uleb128 0x2e
 	.ascii	"ret\000"
 	.byte	0x1
-	.2byte	0x2fa
+	.2byte	0x326
 	.4byte	0x50
-	.4byte	.LLST65
+	.4byte	.LLST71
 	.uleb128 0x2f
 	.ascii	"i\000"
 	.byte	0x1
-	.2byte	0x2fb
+	.2byte	0x327
 	.4byte	0x50
 	.byte	0
 	.uleb128 0x30
-	.4byte	0x1984
-	.4byte	.LBB82
-	.4byte	.Ldebug_ranges0+0x58
+	.4byte	0x1a03
+	.4byte	.LBB102
+	.4byte	.Ldebug_ranges0+0xb0
 	.byte	0x1
-	.2byte	0x30d
+	.2byte	0x339
 	.4byte	0x1730
 	.uleb128 0x31
-	.4byte	0x19b9
-	.4byte	.LLST66
+	.4byte	0x1a38
+	.4byte	.LLST72
 	.uleb128 0x31
-	.4byte	0x19ad
-	.4byte	.LLST67
+	.4byte	0x1a2c
+	.4byte	.LLST73
 	.uleb128 0x31
-	.4byte	0x19a1
-	.4byte	.LLST68
+	.4byte	0x1a20
+	.4byte	.LLST74
 	.uleb128 0x31
-	.4byte	0x1995
-	.4byte	.LLST69
+	.4byte	0x1a14
+	.4byte	.LLST75
 	.uleb128 0x32
-	.4byte	.Ldebug_ranges0+0x58
+	.4byte	.Ldebug_ranges0+0xb0
 	.uleb128 0x33
-	.4byte	0x19c5
+	.4byte	0x1a44
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -188
 	.uleb128 0x33
-	.4byte	0x19d1
+	.4byte	0x1a50
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -244
 	.uleb128 0x34
-	.4byte	0x19dd
-	.4byte	.LLST70
+	.4byte	0x1a5c
+	.4byte	.LLST76
 	.uleb128 0x34
-	.4byte	0x19e9
-	.4byte	.LLST71
+	.4byte	0x1a68
+	.4byte	.LLST77
 	.uleb128 0x34
-	.4byte	0x19f5
-	.4byte	.LLST72
+	.4byte	0x1a74
+	.4byte	.LLST78
 	.uleb128 0x34
-	.4byte	0x1a01
-	.4byte	.LLST73
+	.4byte	0x1a80
+	.4byte	.LLST79
 	.uleb128 0x34
-	.4byte	0x1a0d
-	.4byte	.LLST74
+	.4byte	0x1a8c
+	.4byte	.LLST80
 	.uleb128 0x34
-	.4byte	0x1a26
-	.4byte	.LLST75
+	.4byte	0x1aa5
+	.4byte	.LLST81
 	.uleb128 0x35
-	.4byte	0x1a19
+	.4byte	0x1a98
 	.uleb128 0x36
-	.4byte	0x1cb4
-	.4byte	.LBB84
-	.4byte	.LBE84-.LBB84
+	.4byte	0x1d41
+	.4byte	.LBB104
+	.4byte	.LBE104-.LBB104
 	.byte	0x1
-	.2byte	0x2b2
+	.2byte	0x2de
 	.4byte	0x131a
 	.uleb128 0x31
-	.4byte	0x1cdd
-	.4byte	.LLST76
+	.4byte	0x1d6a
+	.4byte	.LLST82
 	.uleb128 0x31
-	.4byte	0x1cd1
-	.4byte	.LLST77
+	.4byte	0x1d5e
+	.4byte	.LLST83
 	.uleb128 0x31
-	.4byte	0x1cc5
-	.4byte	.LLST78
+	.4byte	0x1d52
+	.4byte	.LLST84
 	.uleb128 0x37
-	.4byte	.LVL163
-	.4byte	0x26ed
+	.4byte	.LVL176
+	.4byte	0x28b3
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4005,38 +4249,38 @@ __func__.8795:
 	.byte	0
 	.byte	0
 	.uleb128 0x39
-	.4byte	.LBB86
-	.4byte	.LBE86-.LBB86
+	.4byte	.LBB106
+	.4byte	.LBE106-.LBB106
 	.4byte	0x154f
 	.uleb128 0x33
-	.4byte	0x1a33
+	.4byte	0x1ab2
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -248
 	.uleb128 0x36
-	.4byte	0x1cb4
-	.4byte	.LBB87
-	.4byte	.LBE87-.LBB87
+	.4byte	0x1d41
+	.4byte	.LBB107
+	.4byte	.LBE107-.LBB107
 	.byte	0x1
-	.2byte	0x2c9
+	.2byte	0x2f5
 	.4byte	0x137f
 	.uleb128 0x31
-	.4byte	0x1cdd
-	.4byte	.LLST79
+	.4byte	0x1d6a
+	.4byte	.LLST85
 	.uleb128 0x31
-	.4byte	0x1cd1
-	.4byte	.LLST80
+	.4byte	0x1d5e
+	.4byte	.LLST86
 	.uleb128 0x31
-	.4byte	0x1cc5
-	.4byte	.LLST81
+	.4byte	0x1d52
+	.4byte	.LLST87
 	.uleb128 0x37
-	.4byte	.LVL169
-	.4byte	0x26ed
+	.4byte	.LVL182
+	.4byte	0x28b3
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4054,56 +4298,56 @@ __func__.8795:
 	.byte	0
 	.byte	0
 	.uleb128 0x36
-	.4byte	0x1ce9
-	.4byte	.LBB89
-	.4byte	.LBE89-.LBB89
+	.4byte	0x1d76
+	.4byte	.LBB109
+	.4byte	.LBE109-.LBB109
 	.byte	0x1
-	.2byte	0x2e6
+	.2byte	0x312
 	.4byte	0x14c8
 	.uleb128 0x31
-	.4byte	0x1d2a
-	.4byte	.LLST82
+	.4byte	0x1db7
+	.4byte	.LLST88
 	.uleb128 0x31
-	.4byte	0x1d1e
-	.4byte	.LLST83
+	.4byte	0x1dab
+	.4byte	.LLST89
 	.uleb128 0x31
-	.4byte	0x1d12
-	.4byte	.LLST84
+	.4byte	0x1d9f
+	.4byte	.LLST90
 	.uleb128 0x3a
-	.4byte	0x1d06
+	.4byte	0x1d93
 	.uleb128 0x31
-	.4byte	0x1cfa
-	.4byte	.LLST85
+	.4byte	0x1d87
+	.4byte	.LLST91
 	.uleb128 0x3b
-	.4byte	.LBB90
-	.4byte	.LBE90-.LBB90
+	.4byte	.LBB110
+	.4byte	.LBE110-.LBB110
 	.uleb128 0x34
-	.4byte	0x1d36
-	.4byte	.LLST86
+	.4byte	0x1dc3
+	.4byte	.LLST92
 	.uleb128 0x33
-	.4byte	0x1d42
+	.4byte	0x1dcf
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -232
 	.uleb128 0x34
-	.4byte	0x1d4e
-	.4byte	.LLST87
+	.4byte	0x1ddb
+	.4byte	.LLST93
 	.uleb128 0x3c
-	.4byte	.LVL176
-	.4byte	0x2593
+	.4byte	.LVL189
+	.4byte	0x2735
 	.4byte	0x140a
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC22
+	.4byte	.LC23
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
@@ -4118,14 +4362,14 @@ __func__.8795:
 	.sleb128 120
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL178
-	.4byte	0x2393
+	.4byte	.LVL191
+	.4byte	0x24aa
 	.4byte	0x1433
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4138,7 +4382,7 @@ __func__.8795:
 	.byte	0x52
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC22
+	.4byte	.LC23
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
@@ -4147,14 +4391,14 @@ __func__.8795:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL181
-	.4byte	0x26f9
+	.4byte	.LVL194
+	.4byte	0x28bf
 	.4byte	0x145b
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4167,7 +4411,7 @@ __func__.8795:
 	.byte	0x52
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC23
+	.4byte	.LC24
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
@@ -4175,14 +4419,14 @@ __func__.8795:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL182
-	.4byte	0x26f9
+	.4byte	.LVL195
+	.4byte	0x28bf
 	.4byte	0x1483
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4195,7 +4439,7 @@ __func__.8795:
 	.byte	0x52
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC24
+	.4byte	.LC25
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
@@ -4203,8 +4447,8 @@ __func__.8795:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x37
-	.4byte	.LVL183
-	.4byte	0x2705
+	.4byte	.LVL196
+	.4byte	0x28cb
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -4260,14 +4504,14 @@ __func__.8795:
 	.byte	0
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL165
-	.4byte	0x2393
+	.4byte	.LVL178
+	.4byte	0x24aa
 	.4byte	0x14f1
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4280,7 +4524,7 @@ __func__.8795:
 	.byte	0x52
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC22
+	.4byte	.LC23
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
@@ -4289,14 +4533,14 @@ __func__.8795:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL170
-	.4byte	0x1e8d
+	.4byte	.LVL183
+	.4byte	0x1f1a
 	.4byte	0x1523
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x76
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4309,7 +4553,7 @@ __func__.8795:
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x2
@@ -4328,8 +4572,8 @@ __func__.8795:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x37
-	.4byte	.LVL172
-	.4byte	0x1d5b
+	.4byte	.LVL185
+	.4byte	0x1de8
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -4340,7 +4584,7 @@ __func__.8795:
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x76
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4353,7 +4597,7 @@ __func__.8795:
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x2
@@ -4365,17 +4609,17 @@ __func__.8795:
 	.byte	0
 	.byte	0
 	.uleb128 0x3d
-	.4byte	.LVL131
-	.4byte	0x2710
+	.4byte	.LVL144
+	.4byte	0x28d6
 	.uleb128 0x3c
-	.4byte	.LVL135
-	.4byte	0x1b94
+	.4byte	.LVL148
+	.4byte	0x1c21
 	.4byte	0x1582
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x76
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4399,34 +4643,34 @@ __func__.8795:
 	.sleb128 108
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL136
-	.4byte	0x271b
+	.4byte	.LVL149
+	.4byte	0x28e1
 	.4byte	0x159f
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC15
+	.4byte	.LC16
 	.byte	0
 	.uleb128 0x3d
-	.4byte	.LVL137
-	.4byte	0x2727
+	.4byte	.LVL150
+	.4byte	0x28ed
 	.uleb128 0x3c
-	.4byte	.LVL138
-	.4byte	0x2733
+	.4byte	.LVL151
+	.4byte	0x28f9
 	.4byte	0x15c1
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4435,26 +4679,26 @@ __func__.8795:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL142
-	.4byte	0x24e9
+	.4byte	.LVL155
+	.4byte	0x268b
 	.4byte	0x15d5
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL144
-	.4byte	0x2710
+	.4byte	.LVL157
+	.4byte	0x28d6
 	.4byte	0x15f2
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC17
+	.4byte	.LC18
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
@@ -4463,25 +4707,25 @@ __func__.8795:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL145
-	.4byte	0x2710
+	.4byte	.LVL158
+	.4byte	0x28d6
 	.4byte	0x1609
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC18
+	.4byte	.LC19
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL146
-	.4byte	0x2393
+	.4byte	.LVL159
+	.4byte	0x24aa
 	.4byte	0x1632
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4494,7 +4738,7 @@ __func__.8795:
 	.byte	0x52
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC19
+	.4byte	.LC20
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
@@ -4503,14 +4747,14 @@ __func__.8795:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL148
-	.4byte	0x1e8d
+	.4byte	.LVL161
+	.4byte	0x1f1a
 	.4byte	0x1663
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x76
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4523,7 +4767,7 @@ __func__.8795:
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x2
@@ -4541,28 +4785,28 @@ __func__.8795:
 	.sleb128 164
 	.byte	0
 	.uleb128 0x3d
-	.4byte	.LVL150
-	.4byte	0x1c89
+	.4byte	.LVL163
+	.4byte	0x1d16
 	.uleb128 0x3c
-	.4byte	.LVL152
-	.4byte	0x2710
+	.4byte	.LVL165
+	.4byte	0x28d6
 	.4byte	0x1683
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC20
+	.4byte	.LC21
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL153
-	.4byte	0x2393
+	.4byte	.LVL166
+	.4byte	0x24aa
 	.4byte	0x16ab
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4575,7 +4819,7 @@ __func__.8795:
 	.byte	0x52
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC21
+	.4byte	.LC22
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
@@ -4583,14 +4827,14 @@ __func__.8795:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL155
-	.4byte	0x2393
+	.4byte	.LVL168
+	.4byte	0x24aa
 	.4byte	0x16d3
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4603,7 +4847,7 @@ __func__.8795:
 	.byte	0x52
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC22
+	.4byte	.LC23
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
@@ -4611,14 +4855,14 @@ __func__.8795:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL159
-	.4byte	0x1e8d
+	.4byte	.LVL172
+	.4byte	0x1f1a
 	.4byte	0x1703
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x76
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4631,7 +4875,7 @@ __func__.8795:
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x2
@@ -4649,8 +4893,8 @@ __func__.8795:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x37
-	.4byte	.LVL164
-	.4byte	0x1d5b
+	.4byte	.LVL177
+	.4byte	0x1de8
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -4661,7 +4905,7 @@ __func__.8795:
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x76
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4674,7 +4918,7 @@ __func__.8795:
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x2
@@ -4687,164 +4931,216 @@ __func__.8795:
 	.byte	0
 	.byte	0
 	.uleb128 0x30
-	.4byte	0x1a56
-	.4byte	.LBB94
-	.4byte	.Ldebug_ranges0+0x78
+	.4byte	0x1ad5
+	.4byte	.LBB114
+	.4byte	.Ldebug_ranges0+0xd0
 	.byte	0x1
-	.2byte	0x311
-	.4byte	0x197a
+	.2byte	0x33d
+	.4byte	0x19f9
 	.uleb128 0x31
-	.4byte	0x1a73
-	.4byte	.LLST88
+	.4byte	0x1af2
+	.4byte	.LLST94
 	.uleb128 0x31
-	.4byte	0x1a67
-	.4byte	.LLST89
+	.4byte	0x1ae6
+	.4byte	.LLST95
 	.uleb128 0x32
-	.4byte	.Ldebug_ranges0+0x78
+	.4byte	.Ldebug_ranges0+0xd0
 	.uleb128 0x33
-	.4byte	0x1a7f
+	.4byte	0x1afe
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -244
 	.uleb128 0x33
-	.4byte	0x1a8b
+	.4byte	0x1b0a
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -232
 	.uleb128 0x3e
-	.4byte	0x1a97
-	.4byte	0x26da
-	.4byte	.LLST91
+	.4byte	0x1b16
+	.4byte	0x28a0
+	.4byte	.LLST97
 	.uleb128 0x34
-	.4byte	0x1aa3
-	.4byte	.LLST92
+	.4byte	0x1b22
+	.4byte	.LLST98
 	.uleb128 0x33
-	.4byte	0x1aaf
+	.4byte	0x1b2e
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -248
 	.uleb128 0x34
-	.4byte	0x1abb
-	.4byte	.LLST93
+	.4byte	0x1b3a
+	.4byte	.LLST99
 	.uleb128 0x34
-	.4byte	0x1ac7
-	.4byte	.LLST94
+	.4byte	0x1b46
+	.4byte	.LLST100
 	.uleb128 0x34
-	.4byte	0x1ad3
-	.4byte	.LLST95
+	.4byte	0x1b52
+	.4byte	.LLST101
 	.uleb128 0x34
-	.4byte	0x1adf
-	.4byte	.LLST96
+	.4byte	0x1b5e
+	.4byte	.LLST102
 	.uleb128 0x34
-	.4byte	0x1ae9
-	.4byte	.LLST97
+	.4byte	0x1b68
+	.4byte	.LLST103
 	.uleb128 0x34
-	.4byte	0x1af5
-	.4byte	.LLST98
+	.4byte	0x1b74
+	.4byte	.LLST104
 	.uleb128 0x33
-	.4byte	0x1b01
+	.4byte	0x1b80
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -188
 	.uleb128 0x34
-	.4byte	0x1b1a
-	.4byte	.LLST99
+	.4byte	0x1b99
+	.4byte	.LLST105
 	.uleb128 0x35
-	.4byte	0x1b0d
+	.4byte	0x1b8c
+	.uleb128 0x3f
+	.4byte	.Ldebug_ranges0+0xf0
+	.4byte	0x18df
+	.uleb128 0x34
+	.4byte	0x1ba6
+	.4byte	.LLST106
 	.uleb128 0x3c
-	.4byte	.LVL191
-	.4byte	0x1b5b
-	.4byte	0x17f3
+	.4byte	.LVL230
+	.4byte	0x24aa
+	.4byte	0x1812
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x74
+	.byte	0x75
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
+	.uleb128 0x4
+	.byte	0x77
+	.sleb128 76
+	.byte	0x6
+	.uleb128 0x38
+	.uleb128 0x1
+	.byte	0x52
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x78
 	.sleb128 0
+	.uleb128 0x38
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL193
-	.4byte	0x273f
-	.4byte	0x1808
+	.4byte	.LVL233
+	.4byte	0x2905
+	.4byte	0x1829
 	.uleb128 0x38
 	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0x77
-	.sleb128 148
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC2
 	.byte	0
-	.uleb128 0x3d
-	.4byte	.LVL194
-	.4byte	0x2710
-	.uleb128 0x3f
-	.4byte	.LVL199
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.4byte	0x1835
+	.uleb128 0x3c
+	.4byte	.LVL234
+	.4byte	0x2910
+	.4byte	0x1846
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x78
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC2
+	.byte	0
+	.uleb128 0x3d
+	.4byte	.LVL235
+	.4byte	0x2676
+	.uleb128 0x3c
+	.4byte	.LVL237
+	.4byte	0x1f1a
+	.4byte	0x1880
+	.uleb128 0x38
+	.uleb128 0x1
+	.byte	0x50
 	.uleb128 0x2
-	.byte	0x7a
+	.byte	0x76
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x77
+	.sleb128 80
+	.byte	0x6
 	.uleb128 0x38
 	.uleb128 0x1
-	.byte	0x53
+	.byte	0x52
 	.uleb128 0x2
-	.byte	0x78
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x38
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x2
+	.byte	0x7b
 	.sleb128 0
+	.uleb128 0x38
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 4
+	.uleb128 0x3
+	.byte	0x77
+	.sleb128 104
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL202
-	.4byte	0x1b94
-	.4byte	0x185c
+	.4byte	.LVL240
+	.4byte	0x291b
+	.4byte	0x189d
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x78
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC0
+	.byte	0
+	.uleb128 0x3c
+	.4byte	.LVL241
+	.4byte	0x264d
+	.4byte	0x18b1
+	.uleb128 0x38
+	.uleb128 0x1
+	.byte	0x50
 	.uleb128 0x2
 	.byte	0x7a
 	.sleb128 0
+	.byte	0
+	.uleb128 0x3c
+	.4byte	.LVL242
+	.4byte	0x2600
+	.4byte	0x18c5
 	.uleb128 0x38
 	.uleb128 0x1
-	.byte	0x52
+	.byte	0x50
 	.uleb128 0x2
 	.byte	0x78
 	.sleb128 0
-	.uleb128 0x38
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x3
-	.byte	0x77
-	.sleb128 88
 	.byte	0
-	.uleb128 0x3c
-	.4byte	.LVL204
-	.4byte	0x2733
-	.4byte	0x1875
+	.uleb128 0x37
+	.4byte	.LVL246
+	.4byte	0x291b
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -4854,110 +5150,107 @@ __func__.8795:
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.byte	0
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL206
-	.4byte	0x2710
-	.4byte	0x188c
+	.4byte	.LVL204
+	.4byte	0x1be8
+	.4byte	0x18f9
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC16
-	.byte	0
-	.uleb128 0x3c
-	.4byte	.LVL209
-	.4byte	0x24e9
-	.4byte	0x18a0
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
-	.byte	0x50
+	.byte	0x51
 	.uleb128 0x2
-	.byte	0x78
+	.byte	0x76
 	.sleb128 0
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL212
-	.4byte	0x2710
-	.4byte	0x18bf
+	.4byte	.LVL206
+	.4byte	0x2926
+	.4byte	0x190e
+	.uleb128 0x38
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0x77
+	.sleb128 148
+	.byte	0
+	.uleb128 0x3d
+	.4byte	.LVL207
+	.4byte	0x28d6
+	.uleb128 0x40
+	.4byte	.LVL213
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.4byte	0x193d
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC17
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x4
 	.byte	0x77
-	.sleb128 84
+	.sleb128 80
 	.byte	0x6
-	.byte	0
-	.uleb128 0x3c
-	.4byte	.LVL215
-	.4byte	0x2710
-	.4byte	0x18d6
 	.uleb128 0x38
 	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC18
-	.byte	0
-	.uleb128 0x3c
-	.4byte	.LVL216
-	.4byte	0x271b
-	.4byte	0x18f3
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
 	.uleb128 0x38
 	.uleb128 0x1
-	.byte	0x50
+	.byte	0x53
 	.uleb128 0x2
 	.byte	0x78
 	.sleb128 0
-	.uleb128 0x38
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC15
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL219
-	.4byte	0x2393
-	.4byte	0x191a
+	.4byte	.LVL216
+	.4byte	0x1c21
+	.4byte	0x1966
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x78
+	.byte	0x76
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x4
 	.byte	0x77
-	.sleb128 84
+	.sleb128 80
 	.byte	0x6
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
-	.byte	0x7b
+	.byte	0x78
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
-	.uleb128 0x1
-	.byte	0x30
+	.uleb128 0x3
+	.byte	0x77
+	.sleb128 88
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL221
-	.4byte	0x1e8d
-	.4byte	0x1942
+	.4byte	.LVL217
+	.4byte	0x28f9
+	.4byte	0x197f
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -4967,365 +5260,391 @@ __func__.8795:
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x3c
+	.4byte	.LVL219
+	.4byte	0x28d6
+	.4byte	0x1996
 	.uleb128 0x38
 	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC17
+	.byte	0
+	.uleb128 0x3c
+	.4byte	.LVL222
+	.4byte	0x268b
+	.4byte	0x19aa
 	.uleb128 0x38
+	.uleb128 0x1
+	.byte	0x50
 	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 4
-	.uleb128 0x3
-	.byte	0x77
-	.sleb128 104
+	.byte	0x75
+	.sleb128 0
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL223
-	.4byte	0x274a
-	.4byte	0x195f
+	.4byte	.LVL224
+	.4byte	0x28d6
+	.4byte	0x19c7
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC18
+	.uleb128 0x38
+	.uleb128 0x1
+	.byte	0x51
 	.uleb128 0x2
 	.byte	0x7b
 	.sleb128 0
+	.byte	0
+	.uleb128 0x3c
+	.4byte	.LVL227
+	.4byte	0x28d6
+	.4byte	0x19de
 	.uleb128 0x38
 	.uleb128 0x1
-	.byte	0x51
+	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC0
+	.4byte	.LC19
 	.byte	0
 	.uleb128 0x37
-	.4byte	.LVL227
-	.4byte	0x274a
+	.4byte	.LVL228
+	.4byte	0x28e1
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x7b
+	.byte	0x75
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC1
+	.4byte	.LC16
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x40
+	.uleb128 0x41
 	.4byte	0xd2
-	.4byte	.LLST90
+	.4byte	.LLST96
 	.byte	0
-	.uleb128 0x41
+	.uleb128 0x42
 	.4byte	.LASF336
 	.byte	0x1
-	.2byte	0x22e
+	.2byte	0x25a
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x1a41
-	.uleb128 0x42
+	.4byte	0x1ac0
+	.uleb128 0x43
 	.4byte	.LASF326
 	.byte	0x1
-	.2byte	0x22e
-	.4byte	0x1195
-	.uleb128 0x42
+	.2byte	0x25a
+	.4byte	0x11b9
+	.uleb128 0x43
 	.4byte	.LASF327
 	.byte	0x1
-	.2byte	0x22f
-	.4byte	0x1189
-	.uleb128 0x42
+	.2byte	0x25b
+	.4byte	0x11ad
+	.uleb128 0x43
 	.4byte	.LASF328
 	.byte	0x1
-	.2byte	0x230
+	.2byte	0x25c
 	.4byte	0x122
-	.uleb128 0x42
+	.uleb128 0x43
 	.4byte	.LASF330
 	.byte	0x1
-	.2byte	0x230
+	.2byte	0x25c
 	.4byte	0x153
-	.uleb128 0x43
+	.uleb128 0x44
 	.4byte	.LASF224
 	.byte	0x1
-	.2byte	0x232
-	.4byte	0x1092
-	.uleb128 0x43
+	.2byte	0x25e
+	.4byte	0x10b6
+	.uleb128 0x44
 	.4byte	.LASF331
 	.byte	0x1
-	.2byte	0x233
+	.2byte	0x25f
 	.4byte	0x50
-	.uleb128 0x43
+	.uleb128 0x44
 	.4byte	.LASF259
 	.byte	0x1
-	.2byte	0x234
+	.2byte	0x260
 	.4byte	0x50
-	.uleb128 0x44
+	.uleb128 0x45
 	.ascii	"ret\000"
 	.byte	0x1
-	.2byte	0x234
+	.2byte	0x260
 	.4byte	0x50
-	.uleb128 0x43
+	.uleb128 0x44
 	.4byte	.LASF279
 	.byte	0x1
-	.2byte	0x235
+	.2byte	0x261
 	.4byte	0x50
-	.uleb128 0x43
+	.uleb128 0x44
 	.4byte	.LASF332
 	.byte	0x1
-	.2byte	0x236
+	.2byte	0x262
 	.4byte	0x50
-	.uleb128 0x44
+	.uleb128 0x45
 	.ascii	"fit\000"
 	.byte	0x1
-	.2byte	0x237
+	.2byte	0x263
 	.4byte	0x153
-	.uleb128 0x45
+	.uleb128 0x46
 	.4byte	.LASF333
-	.4byte	0x1a51
+	.4byte	0x1ad0
 	.4byte	.LASF336
-	.uleb128 0x43
+	.uleb128 0x44
 	.4byte	.LASF334
 	.byte	0x1
-	.2byte	0x24f
+	.2byte	0x27b
 	.4byte	0x50
-	.uleb128 0x46
-	.uleb128 0x43
+	.uleb128 0x47
+	.uleb128 0x44
 	.4byte	.LASF335
 	.byte	0x1
-	.2byte	0x2c3
+	.2byte	0x2ef
 	.4byte	0x12d
 	.byte	0
 	.byte	0
 	.uleb128 0xc
 	.4byte	0xe4
-	.4byte	0x1a51
+	.4byte	0x1ad0
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x1c
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x1a41
-	.uleb128 0x41
+	.4byte	0x1ac0
+	.uleb128 0x42
 	.4byte	.LASF337
 	.byte	0x1
-	.2byte	0x1ba
+	.2byte	0x1d3
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x1b27
-	.uleb128 0x42
+	.4byte	0x1bb4
+	.uleb128 0x43
 	.4byte	.LASF326
 	.byte	0x1
-	.2byte	0x1ba
-	.4byte	0x1195
-	.uleb128 0x42
+	.2byte	0x1d3
+	.4byte	0x11b9
+	.uleb128 0x43
 	.4byte	.LASF327
 	.byte	0x1
-	.2byte	0x1bb
-	.4byte	0x1189
-	.uleb128 0x43
+	.2byte	0x1d4
+	.4byte	0x11ad
+	.uleb128 0x44
 	.4byte	.LASF259
 	.byte	0x1
-	.2byte	0x1c6
-	.4byte	0x1b27
-	.uleb128 0x43
+	.2byte	0x1df
+	.4byte	0x1bb4
+	.uleb128 0x44
 	.4byte	.LASF224
 	.byte	0x1
-	.2byte	0x1c7
-	.4byte	0x1092
-	.uleb128 0x43
+	.2byte	0x1e0
+	.4byte	0x10b6
+	.uleb128 0x44
 	.4byte	.LASF330
 	.byte	0x1
-	.2byte	0x1c8
-	.4byte	0x1b37
-	.uleb128 0x43
+	.2byte	0x1e1
+	.4byte	0x1bc4
+	.uleb128 0x44
 	.4byte	.LASF338
 	.byte	0x1
-	.2byte	0x1c9
+	.2byte	0x1e2
 	.4byte	0x50
-	.uleb128 0x43
+	.uleb128 0x44
 	.4byte	.LASF331
 	.byte	0x1
-	.2byte	0x1ca
+	.2byte	0x1e3
 	.4byte	0x50
-	.uleb128 0x43
+	.uleb128 0x44
 	.4byte	.LASF328
 	.byte	0x1
-	.2byte	0x1cb
+	.2byte	0x1e4
 	.4byte	0x50
-	.uleb128 0x43
+	.uleb128 0x44
 	.4byte	.LASF332
 	.byte	0x1
-	.2byte	0x1cc
+	.2byte	0x1e5
 	.4byte	0x50
-	.uleb128 0x44
+	.uleb128 0x45
 	.ascii	"ret\000"
 	.byte	0x1
-	.2byte	0x1cc
+	.2byte	0x1e5
 	.4byte	0x50
-	.uleb128 0x44
+	.uleb128 0x45
 	.ascii	"i\000"
 	.byte	0x1
-	.2byte	0x1cc
+	.2byte	0x1e5
 	.4byte	0x50
-	.uleb128 0x44
+	.uleb128 0x45
 	.ascii	"fit\000"
 	.byte	0x1
-	.2byte	0x1cd
+	.2byte	0x1e6
 	.4byte	0x153
-	.uleb128 0x43
+	.uleb128 0x44
 	.4byte	.LASF339
 	.byte	0x1
-	.2byte	0x1d3
+	.2byte	0x1ec
 	.4byte	0xd7
-	.uleb128 0x43
+	.uleb128 0x44
 	.4byte	.LASF340
 	.byte	0x1
-	.2byte	0x1d4
+	.2byte	0x1ed
 	.4byte	0x4ac
-	.uleb128 0x45
+	.uleb128 0x46
 	.4byte	.LASF333
-	.4byte	0x1b56
+	.4byte	0x1be3
 	.4byte	.LASF337
-	.uleb128 0x43
+	.uleb128 0x44
 	.4byte	.LASF334
 	.byte	0x1
-	.2byte	0x1f1
+	.2byte	0x20a
 	.4byte	0x50
+	.uleb128 0x47
+	.uleb128 0x44
+	.4byte	.LASF341
+	.byte	0x1
+	.2byte	0x224
+	.4byte	0x4d2
+	.byte	0
 	.byte	0
 	.uleb128 0xc
 	.4byte	0xd7
-	.4byte	0x1b37
+	.4byte	0x1bc4
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x2
 	.byte	0
 	.uleb128 0xc
 	.4byte	0xdd
-	.4byte	0x1b46
-	.uleb128 0x47
+	.4byte	0x1bd3
+	.uleb128 0x48
 	.4byte	0xcb
 	.byte	0
 	.uleb128 0xc
 	.4byte	0xe4
-	.4byte	0x1b56
+	.4byte	0x1be3
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x13
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x1b46
+	.4byte	0x1bd3
 	.uleb128 0x2a
-	.4byte	.LASF342
+	.4byte	.LASF343
 	.byte	0x1
-	.2byte	0x1b3
+	.2byte	0x1cc
 	.4byte	0xd7
-	.4byte	.LFB219
-	.4byte	.LFE219-.LFB219
+	.4byte	.LFB223
+	.4byte	.LFE223-.LFB223
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1b94
+	.4byte	0x1c21
 	.uleb128 0x2c
 	.ascii	"spl\000"
 	.byte	0x1
-	.2byte	0x1b3
-	.4byte	0x1195
-	.4byte	.LLST59
-	.uleb128 0x48
+	.2byte	0x1cc
+	.4byte	0x11b9
+	.4byte	.LLST65
+	.uleb128 0x49
 	.4byte	.LASF327
 	.byte	0x1
-	.2byte	0x1b4
-	.4byte	0x1189
+	.2byte	0x1cd
+	.4byte	0x11ad
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF352
+	.uleb128 0x4a
+	.4byte	.LASF353
 	.byte	0x1
-	.2byte	0x181
+	.2byte	0x19a
 	.4byte	0x153
-	.4byte	.LFB218
-	.4byte	.LFE218-.LFB218
+	.4byte	.LFB222
+	.4byte	.LFE222-.LFB222
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1c83
+	.4byte	0x1d10
 	.uleb128 0x2b
 	.4byte	.LASF327
 	.byte	0x1
-	.2byte	0x181
-	.4byte	0x1189
-	.4byte	.LLST47
+	.2byte	0x19a
+	.4byte	0x11ad
+	.4byte	.LLST15
 	.uleb128 0x2b
 	.4byte	.LASF328
 	.byte	0x1
-	.2byte	0x182
+	.2byte	0x19b
 	.4byte	0x122
-	.4byte	.LLST48
+	.4byte	.LLST16
 	.uleb128 0x2b
 	.4byte	.LASF330
 	.byte	0x1
-	.2byte	0x182
+	.2byte	0x19b
 	.4byte	0x153
-	.4byte	.LLST49
+	.4byte	.LLST17
 	.uleb128 0x2b
 	.4byte	.LASF331
 	.byte	0x1
-	.2byte	0x183
-	.4byte	0x1c83
-	.4byte	.LLST50
-	.uleb128 0x4a
-	.4byte	.LASF343
+	.2byte	0x19c
+	.4byte	0x1d10
+	.4byte	.LLST18
+	.uleb128 0x4b
+	.4byte	.LASF344
 	.byte	0x1
-	.2byte	0x185
+	.2byte	0x19e
 	.4byte	0x50
 	.byte	0x3f
 	.uleb128 0x2d
-	.4byte	.LASF344
+	.4byte	.LASF345
 	.byte	0x1
-	.2byte	0x186
+	.2byte	0x19f
 	.4byte	0x122
-	.4byte	.LLST51
+	.4byte	.LLST19
 	.uleb128 0x2d
 	.4byte	.LASF78
 	.byte	0x1
-	.2byte	0x187
+	.2byte	0x1a0
 	.4byte	0x122
-	.4byte	.LLST52
-	.uleb128 0x43
-	.4byte	.LASF345
+	.4byte	.LLST20
+	.uleb128 0x44
+	.4byte	.LASF346
 	.byte	0x1
-	.2byte	0x188
+	.2byte	0x1a1
 	.4byte	0x50
 	.uleb128 0x2e
 	.ascii	"fit\000"
 	.byte	0x1
-	.2byte	0x189
+	.2byte	0x1a2
 	.4byte	0x153
-	.4byte	.LLST53
+	.4byte	.LLST21
 	.uleb128 0x36
-	.4byte	0x2313
-	.4byte	.LBB61
-	.4byte	.LBE61-.LBB61
+	.4byte	0x242a
+	.4byte	.LBB30
+	.4byte	.LBE30-.LBB30
 	.byte	0x1
-	.2byte	0x1a7
-	.4byte	0x1c67
+	.2byte	0x1c0
+	.4byte	0x1cf4
 	.uleb128 0x31
-	.4byte	0x2339
-	.4byte	.LLST54
+	.4byte	0x2450
+	.4byte	.LLST22
 	.uleb128 0x31
-	.4byte	0x232e
-	.4byte	.LLST55
+	.4byte	0x2445
+	.4byte	.LLST23
 	.uleb128 0x31
-	.4byte	0x2323
-	.4byte	.LLST56
+	.4byte	0x243a
+	.4byte	.LLST24
 	.byte	0
-	.uleb128 0x4b
-	.4byte	.LVL114
+	.uleb128 0x4c
+	.4byte	.LVL48
 	.uleb128 0x2
 	.byte	0x77
 	.sleb128 0
@@ -5353,166 +5672,166 @@ __func__.8795:
 	.byte	0x4
 	.4byte	0x50
 	.uleb128 0x2a
-	.4byte	.LASF346
+	.4byte	.LASF347
 	.byte	0x1
-	.2byte	0x17c
+	.2byte	0x195
 	.4byte	0x50
-	.4byte	.LFB217
-	.4byte	.LFE217-.LFB217
+	.4byte	.LFB221
+	.4byte	.LFE221-.LFB221
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1cb4
+	.4byte	0x1d41
 	.uleb128 0x2b
-	.4byte	.LASF313
+	.4byte	.LASF316
 	.byte	0x1
-	.2byte	0x17c
+	.2byte	0x195
 	.4byte	0x101
-	.4byte	.LLST58
+	.4byte	.LLST64
 	.byte	0
-	.uleb128 0x41
-	.4byte	.LASF347
+	.uleb128 0x42
+	.4byte	.LASF348
 	.byte	0x1
-	.2byte	0x173
+	.2byte	0x18c
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x1ce9
-	.uleb128 0x4c
+	.4byte	0x1d76
+	.uleb128 0x4d
 	.ascii	"fit\000"
 	.byte	0x1
-	.2byte	0x173
+	.2byte	0x18c
 	.4byte	0x3ae
-	.uleb128 0x42
-	.4byte	.LASF348
+	.uleb128 0x43
+	.4byte	.LASF349
 	.byte	0x1
-	.2byte	0x173
+	.2byte	0x18c
 	.4byte	0x50
-	.uleb128 0x4c
+	.uleb128 0x4d
 	.ascii	"os\000"
 	.byte	0x1
-	.2byte	0x173
+	.2byte	0x18c
 	.4byte	0xd48
 	.byte	0
-	.uleb128 0x41
-	.4byte	.LASF349
+	.uleb128 0x42
+	.4byte	.LASF350
 	.byte	0x1
-	.2byte	0x15c
+	.2byte	0x175
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x1d5b
-	.uleb128 0x4c
+	.4byte	0x1de8
+	.uleb128 0x4d
 	.ascii	"fit\000"
 	.byte	0x1
-	.2byte	0x15c
+	.2byte	0x175
 	.4byte	0x3ae
-	.uleb128 0x42
+	.uleb128 0x43
 	.4byte	.LASF259
 	.byte	0x1
-	.2byte	0x15c
+	.2byte	0x175
 	.4byte	0x50
-	.uleb128 0x42
+	.uleb128 0x43
 	.4byte	.LASF279
 	.byte	0x1
-	.2byte	0x15c
+	.2byte	0x175
 	.4byte	0x50
-	.uleb128 0x42
-	.4byte	.LASF350
+	.uleb128 0x43
+	.4byte	.LASF351
 	.byte	0x1
-	.2byte	0x15d
+	.2byte	0x176
 	.4byte	0x153
-	.uleb128 0x42
-	.4byte	.LASF351
+	.uleb128 0x43
+	.4byte	.LASF352
 	.byte	0x1
-	.2byte	0x15d
-	.4byte	0x1195
-	.uleb128 0x44
+	.2byte	0x176
+	.4byte	0x11b9
+	.uleb128 0x45
 	.ascii	"ret\000"
 	.byte	0x1
-	.2byte	0x15f
+	.2byte	0x178
 	.4byte	0x50
-	.uleb128 0x43
+	.uleb128 0x44
 	.4byte	.LASF74
 	.byte	0x1
-	.2byte	0x161
+	.2byte	0x17a
 	.4byte	0xfb
-	.uleb128 0x43
+	.uleb128 0x44
 	.4byte	.LASF332
 	.byte	0x1
-	.2byte	0x162
+	.2byte	0x17b
 	.4byte	0x50
 	.byte	0
-	.uleb128 0x4d
-	.4byte	.LASF353
+	.uleb128 0x4e
+	.4byte	.LASF354
 	.byte	0x1
-	.2byte	0x139
+	.2byte	0x152
 	.4byte	0x50
-	.4byte	.LFB214
-	.4byte	.LFE214-.LFB214
+	.4byte	.LFB218
+	.4byte	.LFE218-.LFB218
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1e78
+	.4byte	0x1f05
 	.uleb128 0x2b
 	.4byte	.LASF326
 	.byte	0x1
-	.2byte	0x139
-	.4byte	0x1195
-	.4byte	.LLST39
+	.2byte	0x152
+	.4byte	0x11b9
+	.4byte	.LLST53
 	.uleb128 0x2b
 	.4byte	.LASF327
 	.byte	0x1
-	.2byte	0x13a
-	.4byte	0x1189
-	.4byte	.LLST40
+	.2byte	0x153
+	.4byte	0x11ad
+	.4byte	.LLST54
 	.uleb128 0x2b
 	.4byte	.LASF328
 	.byte	0x1
-	.2byte	0x13a
+	.2byte	0x153
 	.4byte	0x122
-	.4byte	.LLST41
+	.4byte	.LLST55
 	.uleb128 0x2c
 	.ascii	"fit\000"
 	.byte	0x1
-	.2byte	0x13b
+	.2byte	0x154
 	.4byte	0x153
-	.4byte	.LLST42
+	.4byte	.LLST56
 	.uleb128 0x2b
 	.4byte	.LASF259
 	.byte	0x1
-	.2byte	0x13b
+	.2byte	0x154
 	.4byte	0x50
-	.4byte	.LLST43
+	.4byte	.LLST57
 	.uleb128 0x2b
 	.4byte	.LASF331
 	.byte	0x1
-	.2byte	0x13b
+	.2byte	0x154
 	.4byte	0x122
-	.4byte	.LLST44
-	.uleb128 0x4e
+	.4byte	.LLST58
+	.uleb128 0x4f
 	.4byte	.LASF224
 	.byte	0x1
-	.2byte	0x13d
-	.4byte	0x1092
+	.2byte	0x156
+	.4byte	0x10b6
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -68
 	.uleb128 0x2d
 	.4byte	.LASF332
 	.byte	0x1
-	.2byte	0x13e
+	.2byte	0x157
 	.4byte	0x50
-	.4byte	.LLST45
+	.4byte	.LLST59
 	.uleb128 0x2e
 	.ascii	"ret\000"
 	.byte	0x1
-	.2byte	0x13e
+	.2byte	0x157
 	.4byte	0x50
-	.4byte	.LLST46
-	.uleb128 0x4f
+	.4byte	.LLST60
+	.uleb128 0x50
 	.4byte	.LASF333
-	.4byte	0x1e88
+	.4byte	0x1f15
 	.uleb128 0x3c
-	.4byte	.LVL98
-	.4byte	0x2393
-	.4byte	0x1e37
+	.4byte	.LVL120
+	.4byte	0x24aa
+	.4byte	0x1ec4
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -5539,9 +5858,9 @@ __func__.8795:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL100
-	.4byte	0x1e8d
-	.4byte	0x1e66
+	.4byte	.LVL122
+	.4byte	0x1f1a
+	.4byte	0x1ef3
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -5576,8 +5895,8 @@ __func__.8795:
 	.sleb128 -68
 	.byte	0
 	.uleb128 0x37
-	.4byte	.LVL102
-	.4byte	0x2755
+	.4byte	.LVL124
+	.4byte	0x2931
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
@@ -5588,255 +5907,254 @@ __func__.8795:
 	.byte	0
 	.uleb128 0xc
 	.4byte	0xe4
-	.4byte	0x1e88
+	.4byte	0x1f15
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x12
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x1e78
-	.uleb128 0x50
-	.4byte	.LASF354
+	.4byte	0x1f05
+	.uleb128 0x51
+	.4byte	.LASF355
 	.byte	0x1
-	.byte	0xa8
+	.byte	0xbf
 	.4byte	0x50
-	.4byte	.LFB213
-	.4byte	.LFE213-.LFB213
+	.4byte	.LFB217
+	.4byte	.LFE217-.LFB217
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2313
-	.uleb128 0x51
+	.4byte	0x242a
+	.uleb128 0x52
 	.4byte	.LASF327
 	.byte	0x1
-	.byte	0xa8
-	.4byte	0x1189
-	.4byte	.LLST15
-	.uleb128 0x51
+	.byte	0xbf
+	.4byte	0x11ad
+	.4byte	.LLST25
+	.uleb128 0x52
 	.4byte	.LASF328
 	.byte	0x1
-	.byte	0xa8
+	.byte	0xbf
 	.4byte	0x122
-	.4byte	.LLST16
-	.uleb128 0x52
+	.4byte	.LLST26
+	.uleb128 0x53
 	.ascii	"fit\000"
 	.byte	0x1
-	.byte	0xa9
+	.byte	0xc0
 	.4byte	0x153
-	.4byte	.LLST17
-	.uleb128 0x51
+	.4byte	.LLST27
+	.uleb128 0x52
 	.4byte	.LASF331
 	.byte	0x1
-	.byte	0xa9
+	.byte	0xc0
 	.4byte	0x122
-	.4byte	.LLST18
-	.uleb128 0x51
+	.4byte	.LLST28
+	.uleb128 0x52
 	.4byte	.LASF332
 	.byte	0x1
-	.byte	0xa9
+	.byte	0xc0
 	.4byte	0x50
-	.4byte	.LLST19
-	.uleb128 0x51
+	.4byte	.LLST29
+	.uleb128 0x52
 	.4byte	.LASF224
 	.byte	0x1
-	.byte	0xaa
-	.4byte	0x1195
-	.4byte	.LLST20
-	.uleb128 0x53
-	.4byte	.LASF355
+	.byte	0xc1
+	.4byte	0x11b9
+	.4byte	.LLST30
+	.uleb128 0x54
+	.4byte	.LASF356
 	.byte	0x1
-	.byte	0xac
+	.byte	0xc3
 	.4byte	0x50
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -60
-	.uleb128 0x53
-	.4byte	.LASF356
+	.uleb128 0x54
+	.4byte	.LASF357
 	.byte	0x1
-	.byte	0xad
+	.byte	0xc4
 	.4byte	0x10c
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -56
-	.uleb128 0x54
+	.uleb128 0x55
 	.ascii	"len\000"
 	.byte	0x1
-	.byte	0xae
+	.byte	0xc5
 	.4byte	0x50
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -52
-	.uleb128 0x55
+	.uleb128 0x56
 	.4byte	.LASF78
 	.byte	0x1
-	.byte	0xaf
+	.byte	0xc6
 	.4byte	0x122
-	.uleb128 0x53
-	.4byte	.LASF357
+	.uleb128 0x54
+	.4byte	.LASF358
 	.byte	0x1
-	.byte	0xb0
+	.byte	0xc7
 	.4byte	0x122
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -48
-	.uleb128 0x53
+	.uleb128 0x54
 	.4byte	.LASF265
 	.byte	0x1
-	.byte	0xb0
+	.byte	0xc7
 	.4byte	0x122
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -44
-	.uleb128 0x56
-	.4byte	.LASF358
+	.uleb128 0x57
+	.4byte	.LASF359
 	.byte	0x1
-	.byte	0xb0
+	.byte	0xc7
 	.4byte	0x122
-	.4byte	.LLST21
-	.uleb128 0x54
+	.4byte	.LLST31
+	.uleb128 0x55
 	.ascii	"src\000"
 	.byte	0x1
-	.byte	0xb1
+	.byte	0xc8
 	.4byte	0x153
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -40
-	.uleb128 0x56
-	.4byte	.LASF359
+	.uleb128 0x57
+	.4byte	.LASF360
 	.byte	0x1
-	.byte	0xb2
+	.byte	0xc9
 	.4byte	0x122
-	.4byte	.LLST22
-	.uleb128 0x55
-	.4byte	.LASF360
+	.4byte	.LLST32
+	.uleb128 0x56
+	.4byte	.LASF361
 	.byte	0x1
-	.byte	0xb3
+	.byte	0xca
 	.4byte	0x50
-	.uleb128 0x57
-	.4byte	.LASF343
+	.uleb128 0x58
+	.4byte	.LASF344
 	.byte	0x1
-	.byte	0xb4
+	.byte	0xcb
 	.4byte	0x50
 	.byte	0x3f
-	.uleb128 0x53
-	.4byte	.LASF361
+	.uleb128 0x54
+	.4byte	.LASF362
 	.byte	0x1
-	.byte	0xb5
+	.byte	0xcc
 	.4byte	0x12d
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -61
-	.uleb128 0x56
+	.uleb128 0x57
 	.4byte	.LASF62
 	.byte	0x1
-	.byte	0xb5
+	.byte	0xcc
 	.4byte	0x12d
-	.4byte	.LLST23
-	.uleb128 0x53
-	.4byte	.LASF362
+	.4byte	.LLST33
+	.uleb128 0x54
+	.4byte	.LASF363
 	.byte	0x1
-	.byte	0xb6
+	.byte	0xcd
 	.4byte	0x3ae
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -36
-	.uleb128 0x56
-	.4byte	.LASF363
-	.byte	0x1
-	.byte	0xb7
-	.4byte	0x18e
-	.4byte	.LLST24
 	.uleb128 0x57
 	.4byte	.LASF364
 	.byte	0x1
-	.byte	0xb8
+	.byte	0xce
 	.4byte	0x18e
-	.byte	0
-	.uleb128 0x56
+	.4byte	.LLST34
+	.uleb128 0x57
 	.4byte	.LASF365
 	.byte	0x1
-	.byte	0xb9
+	.byte	0xcf
+	.4byte	0x18e
+	.4byte	.LLST35
+	.uleb128 0x57
+	.4byte	.LASF341
+	.byte	0x1
+	.byte	0xd0
 	.4byte	0x4d2
-	.4byte	.LLST25
-	.uleb128 0x58
+	.4byte	.LLST36
+	.uleb128 0x59
 	.ascii	"out\000"
 	.byte	0x1
-	.2byte	0x12f
-	.4byte	.LDL1
-	.uleb128 0x59
-	.4byte	0x2345
-	.4byte	.LBB35
+	.2byte	0x148
+	.4byte	.L36
+	.uleb128 0x5a
+	.4byte	0x245c
+	.4byte	.LBB48
 	.4byte	.Ldebug_ranges0+0
 	.byte	0x1
-	.byte	0xe8
-	.4byte	0x201b
+	.byte	0xff
+	.4byte	0x20ab
 	.uleb128 0x31
-	.4byte	0x2360
-	.4byte	.LLST26
+	.4byte	0x2477
+	.4byte	.LLST37
 	.uleb128 0x31
-	.4byte	0x2355
-	.4byte	.LLST27
+	.4byte	0x246c
+	.4byte	.LLST38
 	.byte	0
-	.uleb128 0x5a
-	.4byte	0x2313
-	.4byte	.LBB40
-	.4byte	.LBE40-.LBB40
+	.uleb128 0x36
+	.4byte	0x242a
+	.4byte	.LBB53
+	.4byte	.LBE53-.LBB53
 	.byte	0x1
-	.byte	0xe9
-	.4byte	0x204a
-	.uleb128 0x31
-	.4byte	0x2339
-	.4byte	.LLST28
+	.2byte	0x100
+	.4byte	0x20d7
+	.uleb128 0x3a
+	.4byte	0x2450
 	.uleb128 0x31
-	.4byte	0x232e
-	.4byte	.LLST29
+	.4byte	0x2445
+	.4byte	.LLST39
 	.uleb128 0x31
-	.4byte	0x2323
-	.4byte	.LLST30
+	.4byte	0x243a
+	.4byte	.LLST40
 	.byte	0
-	.uleb128 0x59
-	.4byte	0x236c
-	.4byte	.LBB42
+	.uleb128 0x30
+	.4byte	0x2483
+	.4byte	.LBB55
 	.4byte	.Ldebug_ranges0+0x20
 	.byte	0x1
-	.byte	0xf2
-	.4byte	0x2070
+	.2byte	0x109
+	.4byte	0x20fe
 	.uleb128 0x31
-	.4byte	0x2387
-	.4byte	.LLST31
+	.4byte	0x249e
+	.4byte	.LLST41
 	.uleb128 0x31
-	.4byte	0x237c
-	.4byte	.LLST32
+	.4byte	0x2493
+	.4byte	.LLST42
 	.byte	0
 	.uleb128 0x30
-	.4byte	0x251f
-	.4byte	.LBB45
+	.4byte	0x26c1
+	.4byte	.LBB60
 	.4byte	.Ldebug_ranges0+0x38
 	.byte	0x1
-	.2byte	0x10b
-	.4byte	0x20bb
+	.2byte	0x122
+	.4byte	0x2149
 	.uleb128 0x31
-	.4byte	0x2548
-	.4byte	.LLST33
+	.4byte	0x26ea
+	.4byte	.LLST43
 	.uleb128 0x31
-	.4byte	0x253c
-	.4byte	.LLST34
+	.4byte	0x26de
+	.4byte	.LLST44
 	.uleb128 0x31
-	.4byte	0x2530
-	.4byte	.LLST35
+	.4byte	0x26d2
+	.4byte	.LLST45
 	.uleb128 0x37
-	.4byte	.LVL68
-	.4byte	0x2760
+	.4byte	.LVL89
+	.4byte	0x293c
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x74
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
@@ -5845,41 +6163,69 @@ __func__.8795:
 	.byte	0x30
 	.byte	0
 	.byte	0
-	.uleb128 0x36
-	.4byte	0x251f
-	.4byte	.LBB53
-	.4byte	.LBE53-.LBB53
+	.uleb128 0x30
+	.4byte	0x2483
+	.4byte	.LBB65
+	.4byte	.Ldebug_ranges0+0x58
 	.byte	0x1
-	.2byte	0x110
-	.4byte	0x20f4
+	.2byte	0x124
+	.4byte	0x2170
 	.uleb128 0x31
-	.4byte	0x2548
-	.4byte	.LLST36
+	.4byte	0x249e
+	.4byte	.LLST46
 	.uleb128 0x31
-	.4byte	0x253c
-	.4byte	.LLST37
+	.4byte	0x2493
+	.4byte	.LLST47
+	.byte	0
+	.uleb128 0x30
+	.4byte	0x26c1
+	.4byte	.LBB72
+	.4byte	.Ldebug_ranges0+0x78
+	.byte	0x1
+	.2byte	0x128
+	.4byte	0x21a9
 	.uleb128 0x31
-	.4byte	0x2530
-	.4byte	.LLST38
+	.4byte	0x26ea
+	.4byte	.LLST48
+	.uleb128 0x31
+	.4byte	0x26de
+	.4byte	.LLST49
+	.uleb128 0x31
+	.4byte	0x26d2
+	.4byte	.LLST50
 	.uleb128 0x3d
-	.4byte	.LVL85
-	.4byte	0x2760
+	.4byte	.LVL102
+	.4byte	0x293c
+	.byte	0
+	.uleb128 0x30
+	.4byte	0x2483
+	.4byte	.LBB75
+	.4byte	.Ldebug_ranges0+0x90
+	.byte	0x1
+	.2byte	0x129
+	.4byte	0x21d0
+	.uleb128 0x31
+	.4byte	0x249e
+	.4byte	.LLST51
+	.uleb128 0x31
+	.4byte	0x2493
+	.4byte	.LLST52
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL45
-	.4byte	0x276c
-	.4byte	0x2114
+	.4byte	.LVL58
+	.4byte	0x2948
+	.4byte	0x21f0
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x74
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
@@ -5889,20 +6235,20 @@ __func__.8795:
 	.sleb128 -61
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL46
-	.4byte	0x2778
-	.4byte	0x2134
+	.4byte	.LVL59
+	.4byte	0x2954
+	.4byte	0x2210
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x74
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
@@ -5912,20 +6258,20 @@ __func__.8795:
 	.sleb128 -44
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL47
-	.4byte	0x2784
-	.4byte	0x2154
+	.4byte	.LVL60
+	.4byte	0x2960
+	.4byte	0x2230
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x74
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
@@ -5935,20 +6281,20 @@ __func__.8795:
 	.sleb128 -48
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL48
-	.4byte	0x2790
-	.4byte	0x2174
+	.4byte	.LVL61
+	.4byte	0x296c
+	.4byte	0x2250
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x74
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
@@ -5958,20 +6304,20 @@ __func__.8795:
 	.sleb128 -60
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL49
-	.4byte	0x279c
-	.4byte	0x2194
+	.4byte	.LVL62
+	.4byte	0x2978
+	.4byte	0x2270
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x74
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
@@ -5981,20 +6327,20 @@ __func__.8795:
 	.sleb128 -60
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL51
-	.4byte	0x27a8
-	.4byte	0x21b4
+	.4byte	.LVL64
+	.4byte	0x2984
+	.4byte	0x2290
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x74
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
@@ -6004,9 +6350,9 @@ __func__.8795:
 	.sleb128 -52
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL54
-	.4byte	0x27b4
-	.4byte	0x21c8
+	.4byte	.LVL66
+	.4byte	0x2990
+	.4byte	0x22a4
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6014,51 +6360,101 @@ __func__.8795:
 	.byte	0x8
 	.byte	0x40
 	.byte	0
+	.uleb128 0x3c
+	.4byte	.LVL73
+	.4byte	0x299c
+	.4byte	0x22be
+	.uleb128 0x38
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x38
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
 	.uleb128 0x5b
-	.4byte	.LVL64
-	.4byte	0x21e6
+	.4byte	.LVL76
+	.4byte	0x22da
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x7a
+	.byte	0x77
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
-	.byte	0x78
+	.byte	0x7a
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -80
-	.byte	0x6
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.uleb128 0x3c
+	.4byte	.LVL77
+	.4byte	0x28d6
+	.4byte	0x22f1
+	.uleb128 0x38
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL70
-	.4byte	0x26f9
-	.4byte	0x220e
+	.4byte	.LVL78
+	.4byte	0x29a8
+	.4byte	0x2314
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x38
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC13
+	.byte	0
+	.uleb128 0x3c
+	.4byte	.LVL93
+	.4byte	0x28bf
+	.4byte	0x233c
+	.uleb128 0x38
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x38
+	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC8
+	.4byte	.LC9
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
@@ -6066,60 +6462,66 @@ __func__.8795:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL71
-	.4byte	0x2710
-	.4byte	0x2231
+	.4byte	.LVL94
+	.4byte	0x28d6
+	.4byte	0x2365
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC9
+	.4byte	.LC10
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x77
+	.byte	0x78
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
-	.byte	0x78
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x38
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x7b
 	.sleb128 0
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL72
-	.4byte	0x27c0
-	.4byte	0x224b
+	.4byte	.LVL95
+	.4byte	0x29b4
+	.4byte	0x237f
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x74
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL73
-	.4byte	0x27cc
-	.4byte	0x227f
+	.4byte	.LVL96
+	.4byte	0x29c0
+	.4byte	0x23b3
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x74
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
@@ -6145,72 +6547,55 @@ __func__.8795:
 	.byte	0x7d
 	.sleb128 4
 	.uleb128 0x2
-	.byte	0x7a
+	.byte	0x77
 	.sleb128 0
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL74
-	.4byte	0x27d8
-	.4byte	0x2296
+	.4byte	.LVL97
+	.4byte	0x29cc
+	.4byte	0x23ca
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC11
+	.4byte	.LC12
 	.byte	0
 	.uleb128 0x3d
-	.4byte	.LVL75
-	.4byte	0x27e3
+	.4byte	.LVL98
+	.4byte	0x29d7
 	.uleb128 0x3c
-	.4byte	.LVL76
-	.4byte	0x27ef
-	.4byte	0x22c2
+	.4byte	.LVL106
+	.4byte	0x28d6
+	.4byte	0x23f0
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC11
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x78
 	.sleb128 0
-	.uleb128 0x38
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC12
-	.byte	0
-	.uleb128 0x3c
-	.4byte	.LVL86
-	.4byte	0x2710
-	.4byte	0x22d9
-	.uleb128 0x38
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC10
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LVL90
-	.4byte	0x27fb
-	.4byte	0x22ff
+	.4byte	.LVL112
+	.4byte	0x29e3
+	.4byte	0x2416
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x74
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
 	.uleb128 0x38
 	.uleb128 0x1
@@ -6226,113 +6611,113 @@ __func__.8795:
 	.sleb128 -56
 	.byte	0
 	.uleb128 0x37
-	.4byte	.LVL91
-	.4byte	0x27d8
+	.4byte	.LVL113
+	.4byte	0x29cc
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC7
+	.4byte	.LC8
 	.byte	0
 	.byte	0
 	.uleb128 0x5c
 	.4byte	.LASF366
 	.byte	0x1
-	.byte	0x8c
+	.byte	0xa3
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x2345
+	.4byte	0x245c
 	.uleb128 0x5d
 	.4byte	.LASF327
 	.byte	0x1
-	.byte	0x8c
-	.4byte	0x1189
+	.byte	0xa3
+	.4byte	0x11ad
 	.uleb128 0x5d
 	.4byte	.LASF367
 	.byte	0x1
-	.byte	0x8c
+	.byte	0xa3
 	.4byte	0x50
 	.uleb128 0x5d
-	.4byte	.LASF355
+	.4byte	.LASF356
 	.byte	0x1
-	.byte	0x8d
+	.byte	0xa4
 	.4byte	0x50
 	.byte	0
 	.uleb128 0x5c
 	.4byte	.LASF368
 	.byte	0x1
-	.byte	0x7e
+	.byte	0x95
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x236c
+	.4byte	0x2483
 	.uleb128 0x5d
 	.4byte	.LASF327
 	.byte	0x1
-	.byte	0x7e
-	.4byte	0x1189
+	.byte	0x95
+	.4byte	0x11ad
 	.uleb128 0x5d
-	.4byte	.LASF355
+	.4byte	.LASF356
 	.byte	0x1
-	.byte	0x7e
+	.byte	0x95
 	.4byte	0x50
 	.byte	0
 	.uleb128 0x5c
 	.4byte	.LASF369
 	.byte	0x1
-	.byte	0x71
+	.byte	0x88
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x2393
+	.4byte	0x24aa
 	.uleb128 0x5d
 	.4byte	.LASF327
 	.byte	0x1
-	.byte	0x71
-	.4byte	0x1189
+	.byte	0x88
+	.4byte	0x11ad
 	.uleb128 0x5d
-	.4byte	.LASF355
+	.4byte	.LASF356
 	.byte	0x1
-	.byte	0x71
+	.byte	0x88
 	.4byte	0x50
 	.byte	0
 	.uleb128 0x5e
 	.4byte	.LASF370
 	.byte	0x1
-	.byte	0x5b
+	.byte	0x72
 	.4byte	0x50
-	.4byte	.LFB209
-	.4byte	.LFE209-.LFB209
+	.4byte	.LFB213
+	.4byte	.LFE213-.LFB213
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x245b
-	.uleb128 0x52
+	.4byte	0x2572
+	.uleb128 0x53
 	.ascii	"fit\000"
 	.byte	0x1
-	.byte	0x5b
+	.byte	0x72
 	.4byte	0x3ae
 	.4byte	.LLST9
-	.uleb128 0x51
+	.uleb128 0x52
 	.4byte	.LASF259
 	.byte	0x1
-	.byte	0x5b
+	.byte	0x72
 	.4byte	0x50
 	.4byte	.LLST10
-	.uleb128 0x51
+	.uleb128 0x52
 	.4byte	.LASF62
 	.byte	0x1
-	.byte	0x5c
+	.byte	0x73
 	.4byte	0xd7
 	.4byte	.LLST11
-	.uleb128 0x51
+	.uleb128 0x52
 	.4byte	.LASF279
 	.byte	0x1
-	.byte	0x5c
+	.byte	0x73
 	.4byte	0x50
 	.4byte	.LLST12
-	.uleb128 0x54
+	.uleb128 0x55
 	.ascii	"str\000"
 	.byte	0x1
-	.byte	0x5e
+	.byte	0x75
 	.4byte	0xfb
 	.uleb128 0x2
 	.byte	0x91
@@ -6340,19 +6725,19 @@ __func__.8795:
 	.uleb128 0x5f
 	.ascii	"err\000"
 	.byte	0x1
-	.byte	0x5f
+	.byte	0x76
 	.4byte	0x50
 	.4byte	.LLST13
-	.uleb128 0x56
+	.uleb128 0x57
 	.4byte	.LASF332
 	.byte	0x1
-	.byte	0x60
+	.byte	0x77
 	.4byte	0x50
 	.4byte	.LLST14
 	.uleb128 0x3c
 	.4byte	.LVL34
-	.4byte	0x2593
-	.4byte	0x2444
+	.4byte	0x2735
+	.4byte	0x255b
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6380,14 +6765,14 @@ __func__.8795:
 	.byte	0x91
 	.sleb128 -20
 	.uleb128 0x60
-	.4byte	0x2476
+	.4byte	0x258d
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
 	.byte	0
 	.uleb128 0x37
 	.4byte	.LVL36
-	.4byte	0x2807
+	.4byte	0x29ef
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6405,194 +6790,255 @@ __func__.8795:
 	.uleb128 0x5c
 	.4byte	.LASF371
 	.byte	0x1
-	.byte	0x25
+	.byte	0x3c
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x24e3
+	.4byte	0x25fa
 	.uleb128 0x61
 	.ascii	"fit\000"
 	.byte	0x1
-	.byte	0x25
+	.byte	0x3c
 	.4byte	0x3ae
 	.uleb128 0x5d
 	.4byte	.LASF259
 	.byte	0x1
-	.byte	0x25
+	.byte	0x3c
 	.4byte	0x50
 	.uleb128 0x5d
 	.4byte	.LASF62
 	.byte	0x1
-	.byte	0x26
+	.byte	0x3d
 	.4byte	0xd7
 	.uleb128 0x5d
 	.4byte	.LASF279
 	.byte	0x1
-	.byte	0x26
+	.byte	0x3d
 	.4byte	0x50
 	.uleb128 0x5d
 	.4byte	.LASF372
 	.byte	0x1
-	.byte	0x27
-	.4byte	0x24e3
-	.uleb128 0x55
+	.byte	0x3e
+	.4byte	0x25fa
+	.uleb128 0x56
 	.4byte	.LASF74
 	.byte	0x1
-	.byte	0x29
+	.byte	0x40
 	.4byte	0xd7
 	.uleb128 0x62
 	.ascii	"str\000"
 	.byte	0x1
-	.byte	0x29
+	.byte	0x40
 	.4byte	0xd7
-	.uleb128 0x55
+	.uleb128 0x56
 	.4byte	.LASF332
 	.byte	0x1
-	.byte	0x2a
+	.byte	0x41
 	.4byte	0x50
-	.uleb128 0x55
+	.uleb128 0x56
 	.4byte	.LASF373
 	.byte	0x1
-	.byte	0x2b
+	.byte	0x42
 	.4byte	0x50
 	.uleb128 0x62
 	.ascii	"len\000"
 	.byte	0x1
-	.byte	0x2c
+	.byte	0x43
 	.4byte	0x50
 	.uleb128 0x62
 	.ascii	"i\000"
 	.byte	0x1
-	.byte	0x2c
+	.byte	0x43
 	.4byte	0x50
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0xfb
 	.uleb128 0x63
+	.4byte	.LASF417
+	.byte	0x1
+	.byte	0x2b
+	.4byte	0x50
+	.byte	0x1
+	.4byte	0x2627
+	.uleb128 0x61
+	.ascii	"fdt\000"
+	.byte	0x1
+	.byte	0x2b
+	.4byte	0x153
+	.uleb128 0x5d
+	.4byte	.LASF363
+	.byte	0x1
+	.byte	0x2b
+	.4byte	0xfb
+	.byte	0
+	.uleb128 0x64
+	.4byte	.LASF418
+	.byte	0x1
+	.byte	0x26
+	.4byte	0x50
+	.4byte	0x264d
+	.uleb128 0x61
+	.ascii	"fdt\000"
+	.byte	0x1
+	.byte	0x26
+	.4byte	0x153
+	.uleb128 0x5d
 	.4byte	.LASF374
 	.byte	0x1
-	.byte	0x14
+	.byte	0x26
+	.4byte	0xfb
+	.byte	0
+	.uleb128 0x65
+	.4byte	.LASF375
+	.byte	0x1
+	.byte	0x21
+	.4byte	0xfb
+	.4byte	.LFB209
+	.4byte	.LFE209-.LFB209
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2676
+	.uleb128 0x52
+	.4byte	.LASF376
+	.byte	0x1
+	.byte	0x21
+	.4byte	0x4d2
+	.4byte	.LLST62
+	.byte	0
+	.uleb128 0x66
+	.4byte	.LASF419
+	.byte	0x1
+	.byte	0x1c
+	.4byte	0x50
+	.4byte	.LFB208
+	.4byte	.LFE208-.LFB208
+	.uleb128 0x1
+	.byte	0x9c
+	.uleb128 0x65
+	.4byte	.LASF377
+	.byte	0x1
+	.byte	0x17
 	.4byte	0x50
 	.4byte	.LFB207
 	.4byte	.LFE207-.LFB207
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x251f
-	.uleb128 0x52
+	.4byte	0x26c1
+	.uleb128 0x53
 	.ascii	"fit\000"
 	.byte	0x1
-	.byte	0x14
+	.byte	0x17
 	.4byte	0x3ae
-	.4byte	.LLST57
-	.uleb128 0x64
+	.4byte	.LLST61
+	.uleb128 0x67
 	.4byte	.LASF334
 	.byte	0x1
-	.byte	0x14
+	.byte	0x17
 	.4byte	0x50
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0
-	.uleb128 0x41
-	.4byte	.LASF375
+	.uleb128 0x42
+	.4byte	.LASF378
 	.byte	0x2
 	.2byte	0x3ea
 	.4byte	0xd7
 	.byte	0x3
-	.4byte	0x2555
-	.uleb128 0x42
-	.4byte	.LASF376
+	.4byte	0x26f7
+	.uleb128 0x43
+	.4byte	.LASF379
 	.byte	0x2
 	.2byte	0x3ea
 	.4byte	0x3ae
-	.uleb128 0x42
-	.4byte	.LASF348
+	.uleb128 0x43
+	.4byte	.LASF349
 	.byte	0x2
 	.2byte	0x3eb
 	.4byte	0x50
-	.uleb128 0x4c
+	.uleb128 0x4d
 	.ascii	"len\000"
 	.byte	0x2
 	.2byte	0x3eb
-	.4byte	0x1c83
+	.4byte	0x1d10
 	.byte	0
-	.uleb128 0x41
-	.4byte	.LASF377
+	.uleb128 0x42
+	.4byte	.LASF380
 	.byte	0x2
 	.2byte	0x2e0
 	.4byte	0x13d
 	.byte	0x3
-	.4byte	0x2573
-	.uleb128 0x4c
+	.4byte	0x2715
+	.uleb128 0x4d
 	.ascii	"hdr\000"
 	.byte	0x2
 	.2byte	0x2e0
-	.4byte	0x2573
+	.4byte	0x2715
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0xad8
 	.uleb128 0x5c
-	.4byte	.LASF378
+	.4byte	.LASF381
 	.byte	0x1a
 	.byte	0x70
 	.4byte	0x70
 	.byte	0x3
-	.4byte	0x2593
+	.4byte	0x2735
 	.uleb128 0x61
 	.ascii	"x\000"
 	.byte	0x1a
 	.byte	0x70
 	.4byte	0x70
 	.byte	0
-	.uleb128 0x65
-	.4byte	0x245b
-	.4byte	.LFB223
-	.4byte	.LFE223-.LFB223
+	.uleb128 0x68
+	.4byte	0x2572
+	.4byte	.LFB227
+	.4byte	.LFE227-.LFB227
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x26da
+	.4byte	0x287c
 	.uleb128 0x31
-	.4byte	0x246b
+	.4byte	0x2582
 	.4byte	.LLST0
 	.uleb128 0x31
-	.4byte	0x2481
+	.4byte	0x2598
 	.4byte	.LLST1
 	.uleb128 0x31
-	.4byte	0x248c
+	.4byte	0x25a3
 	.4byte	.LLST2
 	.uleb128 0x31
-	.4byte	0x2497
+	.4byte	0x25ae
 	.4byte	.LLST3
-	.uleb128 0x66
-	.4byte	0x2476
+	.uleb128 0x69
+	.4byte	0x258d
 	.uleb128 0x6
 	.byte	0xfa
-	.4byte	0x2476
+	.4byte	0x258d
 	.byte	0x9f
 	.uleb128 0x34
-	.4byte	0x24a2
+	.4byte	0x25b9
 	.4byte	.LLST4
 	.uleb128 0x34
-	.4byte	0x24ad
+	.4byte	0x25c4
 	.4byte	.LLST5
 	.uleb128 0x34
-	.4byte	0x24b8
+	.4byte	0x25cf
 	.4byte	.LLST6
 	.uleb128 0x34
-	.4byte	0x24c3
+	.4byte	0x25da
 	.4byte	.LLST7
 	.uleb128 0x33
-	.4byte	0x24ce
+	.4byte	0x25e5
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -28
 	.uleb128 0x34
-	.4byte	0x24d9
+	.4byte	0x25f0
 	.4byte	.LLST8
 	.uleb128 0x3c
 	.4byte	.LVL1
-	.4byte	0x2813
-	.4byte	0x261f
+	.4byte	0x29fb
+	.4byte	0x27c1
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6602,8 +7048,8 @@ __func__.8795:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL5
-	.4byte	0x2710
-	.4byte	0x2636
+	.4byte	0x28d6
+	.4byte	0x27d8
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6613,8 +7059,8 @@ __func__.8795:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL6
-	.4byte	0x281f
-	.4byte	0x2650
+	.4byte	0x2a07
+	.4byte	0x27f2
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6630,8 +7076,8 @@ __func__.8795:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL11
-	.4byte	0x26f9
-	.4byte	0x2676
+	.4byte	0x28bf
+	.4byte	0x2818
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6659,8 +7105,8 @@ __func__.8795:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL13
-	.4byte	0x2710
-	.4byte	0x268a
+	.4byte	0x28d6
+	.4byte	0x282c
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6670,8 +7116,8 @@ __func__.8795:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL14
-	.4byte	0x282a
-	.4byte	0x26a4
+	.4byte	0x2a12
+	.4byte	0x2846
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6687,8 +7133,8 @@ __func__.8795:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL18
-	.4byte	0x26f9
-	.4byte	0x26ca
+	.4byte	0x28bf
+	.4byte	0x286c
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6716,7 +7162,7 @@ __func__.8795:
 	.byte	0
 	.uleb128 0x37
 	.4byte	.LVL23
-	.4byte	0x2835
+	.4byte	0x2a1d
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
@@ -6724,156 +7170,186 @@ __func__.8795:
 	.byte	0x30
 	.byte	0
 	.byte	0
+	.uleb128 0x68
+	.4byte	0x2600
+	.4byte	.LFB211
+	.4byte	.LFE211-.LFB211
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x28a0
+	.uleb128 0x31
+	.4byte	0x2610
+	.4byte	.LLST63
+	.uleb128 0x69
+	.4byte	0x261b
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0
 	.uleb128 0xc
 	.4byte	0xdd
-	.4byte	0x26ed
-	.uleb128 0x67
+	.4byte	0x28b3
+	.uleb128 0x6a
 	.4byte	0xcb
-	.4byte	0x197a
+	.4byte	0x19f9
 	.byte	0
-	.uleb128 0x68
-	.4byte	.LASF379
-	.4byte	.LASF379
-	.byte	0x2
-	.2byte	0x3f5
-	.uleb128 0x68
-	.4byte	.LASF380
-	.4byte	.LASF380
-	.byte	0x1b
-	.2byte	0x2b2
-	.uleb128 0x69
-	.4byte	.LASF381
-	.4byte	.LASF381
-	.byte	0x1c
-	.byte	0xaa
-	.uleb128 0x69
+	.uleb128 0x6b
 	.4byte	.LASF382
 	.4byte	.LASF382
-	.byte	0x1d
-	.byte	0x13
-	.uleb128 0x68
+	.byte	0x2
+	.2byte	0x3f5
+	.uleb128 0x6b
 	.4byte	.LASF383
 	.4byte	.LASF383
 	.byte	0x1b
-	.2byte	0x1a8
-	.uleb128 0x68
+	.2byte	0x2b2
+	.uleb128 0x6c
 	.4byte	.LASF384
 	.4byte	.LASF384
-	.byte	0x2
-	.2byte	0x42e
-	.uleb128 0x68
+	.byte	0x1c
+	.byte	0xaa
+	.uleb128 0x6c
 	.4byte	.LASF385
 	.4byte	.LASF385
-	.byte	0x2
-	.2byte	0x437
-	.uleb128 0x69
+	.byte	0x1d
+	.byte	0x13
+	.uleb128 0x6b
 	.4byte	.LASF386
 	.4byte	.LASF386
-	.byte	0xc
-	.byte	0xc0
-	.uleb128 0x69
+	.byte	0x1b
+	.2byte	0x1a8
+	.uleb128 0x6b
 	.4byte	.LASF387
 	.4byte	.LASF387
-	.byte	0x8
-	.byte	0x27
-	.uleb128 0x69
+	.byte	0x2
+	.2byte	0x42e
+	.uleb128 0x6b
 	.4byte	.LASF388
 	.4byte	.LASF388
-	.byte	0x1c
-	.byte	0xe0
-	.uleb128 0x68
+	.byte	0x2
+	.2byte	0x437
+	.uleb128 0x6c
 	.4byte	.LASF389
 	.4byte	.LASF389
-	.byte	0x1b
-	.2byte	0x1c1
-	.uleb128 0x68
+	.byte	0x8
+	.byte	0x4a
+	.uleb128 0x6c
 	.4byte	.LASF390
 	.4byte	.LASF390
-	.byte	0x2
-	.2byte	0x3f8
-	.uleb128 0x68
+	.byte	0x8
+	.byte	0x72
+	.uleb128 0x6c
 	.4byte	.LASF391
 	.4byte	.LASF391
-	.byte	0x2
-	.2byte	0x3fa
-	.uleb128 0x68
+	.byte	0x8
+	.byte	0x27
+	.uleb128 0x6c
 	.4byte	.LASF392
 	.4byte	.LASF392
-	.byte	0x2
-	.2byte	0x3fc
-	.uleb128 0x68
+	.byte	0xc
+	.byte	0xc0
+	.uleb128 0x6c
 	.4byte	.LASF393
 	.4byte	.LASF393
-	.byte	0x2
-	.2byte	0x402
-	.uleb128 0x68
+	.byte	0x1c
+	.byte	0xe0
+	.uleb128 0x6b
 	.4byte	.LASF394
 	.4byte	.LASF394
-	.byte	0x2
-	.2byte	0x401
-	.uleb128 0x68
+	.byte	0x1b
+	.2byte	0x1c1
+	.uleb128 0x6b
 	.4byte	.LASF395
 	.4byte	.LASF395
 	.byte	0x2
-	.2byte	0x404
-	.uleb128 0x68
+	.2byte	0x3f8
+	.uleb128 0x6b
 	.4byte	.LASF396
 	.4byte	.LASF396
-	.byte	0x19
-	.2byte	0x371
-	.uleb128 0x68
+	.byte	0x2
+	.2byte	0x3fa
+	.uleb128 0x6b
 	.4byte	.LASF397
 	.4byte	.LASF397
 	.byte	0x2
-	.2byte	0x429
-	.uleb128 0x68
+	.2byte	0x3fc
+	.uleb128 0x6b
 	.4byte	.LASF398
 	.4byte	.LASF398
 	.byte	0x2
-	.2byte	0x598
-	.uleb128 0x69
+	.2byte	0x402
+	.uleb128 0x6b
 	.4byte	.LASF399
 	.4byte	.LASF399
-	.byte	0x1d
-	.byte	0x11
-	.uleb128 0x68
+	.byte	0x2
+	.2byte	0x401
+	.uleb128 0x6b
 	.4byte	.LASF400
 	.4byte	.LASF400
-	.byte	0x19
-	.2byte	0x16d
-	.uleb128 0x68
+	.byte	0x2
+	.2byte	0x404
+	.uleb128 0x6b
 	.4byte	.LASF401
 	.4byte	.LASF401
-	.byte	0x2
-	.2byte	0x59f
-	.uleb128 0x68
+	.byte	0x17
+	.2byte	0x371
+	.uleb128 0x6b
 	.4byte	.LASF402
 	.4byte	.LASF402
 	.byte	0x2
-	.2byte	0x3ff
-	.uleb128 0x68
+	.2byte	0x3f9
+	.uleb128 0x6b
 	.4byte	.LASF403
 	.4byte	.LASF403
-	.byte	0x1b
-	.2byte	0x182
-	.uleb128 0x68
+	.byte	0x2
+	.2byte	0x59f
+	.uleb128 0x6b
 	.4byte	.LASF404
 	.4byte	.LASF404
 	.byte	0x2
+	.2byte	0x429
+	.uleb128 0x6b
+	.4byte	.LASF405
+	.4byte	.LASF405
+	.byte	0x2
+	.2byte	0x598
+	.uleb128 0x6c
+	.4byte	.LASF406
+	.4byte	.LASF406
+	.byte	0x1d
+	.byte	0x11
+	.uleb128 0x6b
+	.4byte	.LASF407
+	.4byte	.LASF407
+	.byte	0x17
+	.2byte	0x16d
+	.uleb128 0x6b
+	.4byte	.LASF408
+	.4byte	.LASF408
+	.byte	0x2
+	.2byte	0x3ff
+	.uleb128 0x6b
+	.4byte	.LASF409
+	.4byte	.LASF409
+	.byte	0x1b
+	.2byte	0x182
+	.uleb128 0x6b
+	.4byte	.LASF410
+	.4byte	.LASF410
+	.byte	0x2
 	.2byte	0x5ad
-	.uleb128 0x69
-	.4byte	.LASF405
-	.4byte	.LASF405
+	.uleb128 0x6c
+	.4byte	.LASF411
+	.4byte	.LASF411
 	.byte	0x1b
 	.byte	0xa9
-	.uleb128 0x69
-	.4byte	.LASF406
-	.4byte	.LASF406
+	.uleb128 0x6c
+	.4byte	.LASF412
+	.4byte	.LASF412
 	.byte	0x1b
 	.byte	0xb6
-	.uleb128 0x69
-	.4byte	.LASF407
-	.4byte	.LASF407
+	.uleb128 0x6c
+	.4byte	.LASF413
+	.4byte	.LASF413
 	.byte	0x8
 	.byte	0x33
 	.byte	0
@@ -7644,6 +8120,15 @@ __func__.8795:
 	.byte	0
 	.byte	0
 	.uleb128 0x3f
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x40
 	.uleb128 0x4109
 	.byte	0x1
 	.uleb128 0x11
@@ -7654,7 +8139,7 @@ __func__.8795:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x40
+	.uleb128 0x41
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x34
@@ -7665,7 +8150,7 @@ __func__.8795:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x41
+	.uleb128 0x42
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -7684,7 +8169,7 @@ __func__.8795:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x42
+	.uleb128 0x43
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -7697,7 +8182,7 @@ __func__.8795:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x43
+	.uleb128 0x44
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7710,7 +8195,7 @@ __func__.8795:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x44
+	.uleb128 0x45
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7723,7 +8208,7 @@ __func__.8795:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x45
+	.uleb128 0x46
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7736,19 +8221,19 @@ __func__.8795:
 	.uleb128 0xe
 	.byte	0
 	.byte	0
-	.uleb128 0x46
+	.uleb128 0x47
 	.uleb128 0xb
 	.byte	0x1
 	.byte	0
 	.byte	0
-	.uleb128 0x47
+	.uleb128 0x48
 	.uleb128 0x21
 	.byte	0
 	.uleb128 0x49
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x48
+	.uleb128 0x49
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -7763,7 +8248,7 @@ __func__.8795:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x49
+	.uleb128 0x4a
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -7788,7 +8273,7 @@ __func__.8795:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4a
+	.uleb128 0x4b
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7803,7 +8288,7 @@ __func__.8795:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x4b
+	.uleb128 0x4c
 	.uleb128 0x4109
 	.byte	0x1
 	.uleb128 0x11
@@ -7812,7 +8297,7 @@ __func__.8795:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x4c
+	.uleb128 0x4d
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -7825,7 +8310,7 @@ __func__.8795:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4d
+	.uleb128 0x4e
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -7850,7 +8335,7 @@ __func__.8795:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4e
+	.uleb128 0x4f
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7865,7 +8350,7 @@ __func__.8795:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x4f
+	.uleb128 0x50
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7876,7 +8361,7 @@ __func__.8795:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x50
+	.uleb128 0x51
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -7901,7 +8386,7 @@ __func__.8795:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x51
+	.uleb128 0x52
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -7916,7 +8401,7 @@ __func__.8795:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x52
+	.uleb128 0x53
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -7931,7 +8416,7 @@ __func__.8795:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x53
+	.uleb128 0x54
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7946,7 +8431,7 @@ __func__.8795:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x54
+	.uleb128 0x55
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7961,7 +8446,7 @@ __func__.8795:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x55
+	.uleb128 0x56
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7974,7 +8459,7 @@ __func__.8795:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x56
+	.uleb128 0x57
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7989,7 +8474,7 @@ __func__.8795:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x57
+	.uleb128 0x58
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -8004,7 +8489,7 @@ __func__.8795:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x58
+	.uleb128 0x59
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x3
@@ -8017,7 +8502,7 @@ __func__.8795:
 	.uleb128 0x1
 	.byte	0
 	.byte	0
-	.uleb128 0x59
+	.uleb128 0x5a
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -8034,23 +8519,6 @@ __func__.8795:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x5a
-	.uleb128 0x1d
-	.byte	0x1
-	.uleb128 0x31
-	.uleb128 0x13
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x12
-	.uleb128 0x6
-	.uleb128 0x58
-	.uleb128 0xb
-	.uleb128 0x59
-	.uleb128 0xb
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
 	.uleb128 0x5b
 	.uleb128 0x4109
 	.byte	0x1
@@ -8182,6 +8650,46 @@ __func__.8795:
 	.uleb128 0x19
 	.uleb128 0x49
 	.uleb128 0x13
+	.uleb128 0x20
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x64
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x65
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
 	.uleb128 0x11
 	.uleb128 0x1
 	.uleb128 0x12
@@ -8194,7 +8702,32 @@ __func__.8795:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x64
+	.uleb128 0x66
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x6
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.byte	0
+	.byte	0
+	.uleb128 0x67
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -8209,7 +8742,7 @@ __func__.8795:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x65
+	.uleb128 0x68
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x31
@@ -8226,7 +8759,7 @@ __func__.8795:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x66
+	.uleb128 0x69
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
@@ -8235,7 +8768,7 @@ __func__.8795:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x67
+	.uleb128 0x6a
 	.uleb128 0x21
 	.byte	0
 	.uleb128 0x49
@@ -8244,7 +8777,7 @@ __func__.8795:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x68
+	.uleb128 0x6b
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -8261,7 +8794,7 @@ __func__.8795:
 	.uleb128 0x5
 	.byte	0
 	.byte	0
-	.uleb128 0x69
+	.uleb128 0x6c
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -8281,128 +8814,116 @@ __func__.8795:
 	.byte	0
 	.section	.debug_loc,"",%progbits
 .Ldebug_loc0:
-.LLST60:
-	.4byte	.LVL123
-	.4byte	.LVL130
+.LLST66:
+	.4byte	.LVL136
+	.4byte	.LVL143
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL130
-	.4byte	.LVL133
+	.4byte	.LVL143
+	.4byte	.LVL146
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL133
-	.4byte	.LVL134
+	.4byte	.LVL146
+	.4byte	.LVL147
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL134
-	.4byte	.LFE222
+	.4byte	.LVL147
+	.4byte	.LFE226
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST61:
-	.4byte	.LVL123
-	.4byte	.LVL128
+.LLST67:
+	.4byte	.LVL136
+	.4byte	.LVL141
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL128
-	.4byte	.LFE222
+	.4byte	.LVL141
+	.4byte	.LFE226
 	.2byte	0x1
-	.byte	0x55
+	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST62:
-	.4byte	.LVL123
-	.4byte	.LVL126
+.LLST68:
+	.4byte	.LVL136
+	.4byte	.LVL139
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL126
-	.4byte	.LVL132
+	.4byte	.LVL139
+	.4byte	.LVL145
 	.2byte	0x3
 	.byte	0x7d
 	.sleb128 100
-	.4byte	.LVL132
-	.4byte	.LVL133
+	.4byte	.LVL145
+	.4byte	.LVL146
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x52
 	.byte	0x9f
-	.4byte	.LVL133
-	.4byte	.LVL188
+	.4byte	.LVL146
+	.4byte	.LVL201
 	.2byte	0x3
 	.byte	0x7d
 	.sleb128 100
-	.4byte	.LVL188
-	.4byte	.LVL195
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 84
-	.4byte	.LVL195
-	.4byte	.LVL197
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	.LVL197
-	.4byte	.LVL210
+	.4byte	.LVL201
+	.4byte	.LVL208
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 84
+	.4byte	.LVL208
 	.4byte	.LVL210
-	.4byte	.LVL213
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x52
 	.byte	0x9f
-	.4byte	.LVL213
-	.4byte	.LVL217
+	.4byte	.LVL210
+	.4byte	.LVL229
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 84
-	.4byte	.LVL217
-	.4byte	.LVL228
+	.4byte	.LVL229
+	.4byte	.LVL247
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x52
 	.byte	0x9f
-	.4byte	.LVL228
-	.4byte	.LVL230
+	.4byte	.LVL247
+	.4byte	.LVL251
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 84
-	.4byte	.LVL230
-	.4byte	.LFE222
+	.4byte	.LVL251
+	.4byte	.LFE226
 	.2byte	0x3
 	.byte	0x7d
 	.sleb128 100
 	.4byte	0
 	.4byte	0
-.LLST63:
-	.4byte	.LVL123
-	.4byte	.LVL127
+.LLST69:
+	.4byte	.LVL136
+	.4byte	.LVL140
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL127
-	.4byte	.LVL130
+	.4byte	.LVL140
+	.4byte	.LVL143
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL130
-	.4byte	.LVL133
+	.4byte	.LVL143
+	.4byte	.LVL146
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x53
 	.byte	0x9f
-	.4byte	.LVL133
-	.4byte	.LVL135-1
+	.4byte	.LVL146
+	.4byte	.LVL148-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL135-1
-	.4byte	.LFE222
+	.4byte	.LVL148-1
+	.4byte	.LFE226
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -8410,49 +8931,49 @@ __func__.8795:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST64:
-	.4byte	.LVL124
-	.4byte	.LVL125
+.LLST70:
+	.4byte	.LVL137
+	.4byte	.LVL138
 	.2byte	0x3
 	.byte	0x7d
 	.sleb128 100
 	.4byte	0
 	.4byte	0
-.LLST65:
-	.4byte	.LVL123
-	.4byte	.LVL132
+.LLST71:
+	.4byte	.LVL136
+	.4byte	.LVL145
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xea
 	.byte	0x9f
-	.4byte	.LVL133
-	.4byte	.LVL186
+	.4byte	.LVL146
+	.4byte	.LVL199
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xea
 	.byte	0x9f
-	.4byte	.LVL230
-	.4byte	.LVL231
+	.4byte	.LVL251
+	.4byte	.LVL252
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xea
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST66:
-	.4byte	.LVL133
-	.4byte	.LVL135-1
+.LLST72:
+	.4byte	.LVL146
+	.4byte	.LVL148-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL135-1
-	.4byte	.LVL186
+	.4byte	.LVL148-1
+	.4byte	.LVL199
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x53
 	.byte	0x9f
-	.4byte	.LVL230
-	.4byte	.LVL231
+	.4byte	.LVL251
+	.4byte	.LVL252
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -8460,536 +8981,567 @@ __func__.8795:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST67:
-	.4byte	.LVL133
-	.4byte	.LVL186
+.LLST73:
+	.4byte	.LVL146
+	.4byte	.LVL199
 	.2byte	0x3
 	.byte	0x7d
 	.sleb128 100
-	.4byte	.LVL230
-	.4byte	.LVL231
+	.4byte	.LVL251
+	.4byte	.LVL252
 	.2byte	0x3
 	.byte	0x7d
 	.sleb128 100
 	.4byte	0
 	.4byte	0
-.LLST68:
-	.4byte	.LVL133
-	.4byte	.LVL186
+.LLST74:
+	.4byte	.LVL146
+	.4byte	.LVL199
 	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL230
-	.4byte	.LVL231
+	.byte	0x56
+	.4byte	.LVL251
+	.4byte	.LVL252
 	.2byte	0x1
-	.byte	0x55
+	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST69:
-	.4byte	.LVL133
-	.4byte	.LVL134
+.LLST75:
+	.4byte	.LVL146
+	.4byte	.LVL147
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL134
-	.4byte	.LVL186
+	.4byte	.LVL147
+	.4byte	.LVL199
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL230
-	.4byte	.LVL231
+	.4byte	.LVL251
+	.4byte	.LVL252
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST70:
-	.4byte	.LVL136
-	.4byte	.LVL137-1
+.LLST76:
+	.4byte	.LVL149
+	.4byte	.LVL150-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL137-1
-	.4byte	.LVL186
+	.4byte	.LVL150-1
+	.4byte	.LVL199
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
-.LLST71:
-	.4byte	.LVL142
-	.4byte	.LVL143
+.LLST77:
+	.4byte	.LVL155
+	.4byte	.LVL156
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL143
-	.4byte	.LVL144-1
+	.4byte	.LVL156
+	.4byte	.LVL157-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL144-1
-	.4byte	.LVL148
+	.4byte	.LVL157-1
+	.4byte	.LVL161
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL148
-	.4byte	.LVL149
+	.4byte	.LVL161
+	.4byte	.LVL162
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL150
-	.4byte	.LVL151
+	.4byte	.LVL163
+	.4byte	.LVL164
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL151
-	.4byte	.LVL152-1
+	.4byte	.LVL164
+	.4byte	.LVL165-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL156
-	.4byte	.LVL157
+	.4byte	.LVL169
+	.4byte	.LVL170
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL159
-	.4byte	.LVL162
+	.4byte	.LVL172
+	.4byte	.LVL175
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL170
-	.4byte	.LVL171
+	.4byte	.LVL183
+	.4byte	.LVL184
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST72:
-	.4byte	.LVL133
-	.4byte	.LVL155
+.LLST78:
+	.4byte	.LVL146
+	.4byte	.LVL168
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL155
-	.4byte	.LVL156
+	.4byte	.LVL168
+	.4byte	.LVL169
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.4byte	.LVL156
-	.4byte	.LVL157
+	.4byte	.LVL169
+	.4byte	.LVL170
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL157
-	.4byte	.LVL186
+	.4byte	.LVL170
+	.4byte	.LVL199
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST73:
-	.4byte	.LVL133
+.LLST79:
 	.4byte	.LVL146
+	.4byte	.LVL159
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL146
-	.4byte	.LVL147
+	.4byte	.LVL159
+	.4byte	.LVL160
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL147
-	.4byte	.LVL152
+	.4byte	.LVL160
+	.4byte	.LVL165
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL153
-	.4byte	.LVL154
+	.4byte	.LVL166
+	.4byte	.LVL167
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL154
-	.4byte	.LVL155
+	.4byte	.LVL167
+	.4byte	.LVL168
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL155
-	.4byte	.LVL158
+	.4byte	.LVL168
+	.4byte	.LVL171
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL158
-	.4byte	.LVL159-1
+	.4byte	.LVL171
+	.4byte	.LVL172-1
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
-	.4byte	.LVL159-1
-	.4byte	.LVL164
+	.4byte	.LVL172-1
+	.4byte	.LVL177
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL165
-	.4byte	.LVL168
+	.4byte	.LVL178
+	.4byte	.LVL181
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL168
-	.4byte	.LVL169-1
+	.4byte	.LVL181
+	.4byte	.LVL182-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL169-1
-	.4byte	.LVL173
+	.4byte	.LVL182-1
+	.4byte	.LVL186
 	.2byte	0x3
 	.byte	0x7d
 	.sleb128 96
-	.4byte	.LVL185
-	.4byte	.LVL186
+	.4byte	.LVL198
+	.4byte	.LVL199
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST74:
-	.4byte	.LVL135
-	.4byte	.LVL136-1
+.LLST80:
+	.4byte	.LVL148
+	.4byte	.LVL149-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL136-1
-	.4byte	.LVL186
+	.4byte	.LVL149-1
+	.4byte	.LVL199
 	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL230
-	.4byte	.LVL231
+	.byte	0x55
+	.4byte	.LVL251
+	.4byte	.LVL252
 	.2byte	0x1
-	.byte	0x56
+	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST75:
-	.4byte	.LVL138
-	.4byte	.LVL139
+.LLST81:
+	.4byte	.LVL151
+	.4byte	.LVL152
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL139
-	.4byte	.LVL140
+	.4byte	.LVL152
+	.4byte	.LVL153
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL140
-	.4byte	.LVL141
+	.4byte	.LVL153
+	.4byte	.LVL154
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL141
-	.4byte	.LVL142-1
+	.4byte	.LVL154
+	.4byte	.LVL155-1
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST76:
-	.4byte	.LVL160
-	.4byte	.LVL161
+.LLST82:
+	.4byte	.LVL173
+	.4byte	.LVL174
 	.2byte	0x3
 	.byte	0x74
 	.sleb128 4
 	.byte	0x9f
-	.4byte	.LVL161
-	.4byte	.LVL163-1
+	.4byte	.LVL174
+	.4byte	.LVL176-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL163-1
-	.4byte	.LVL163
+	.4byte	.LVL176-1
+	.4byte	.LVL176
 	.2byte	0x3
 	.byte	0x74
 	.sleb128 4
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST77:
-	.4byte	.LVL160
-	.4byte	.LVL163
+.LLST83:
+	.4byte	.LVL173
+	.4byte	.LVL176
 	.2byte	0x1
 	.byte	0x5b
 	.4byte	0
 	.4byte	0
-.LLST78:
-	.4byte	.LVL160
-	.4byte	.LVL163
+.LLST84:
+	.4byte	.LVL173
+	.4byte	.LVL176
 	.2byte	0x1
-	.byte	0x56
+	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST79:
-	.4byte	.LVL166
-	.4byte	.LVL167
+.LLST85:
+	.4byte	.LVL179
+	.4byte	.LVL180
 	.2byte	0x4
 	.byte	0x7d
 	.sleb128 104
 	.byte	0x9f
-	.4byte	.LVL167
-	.4byte	.LVL169-1
+	.4byte	.LVL180
+	.4byte	.LVL182-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL169-1
-	.4byte	.LVL169
+	.4byte	.LVL182-1
+	.4byte	.LVL182
 	.2byte	0x4
 	.byte	0x7d
 	.sleb128 104
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST80:
-	.4byte	.LVL166
-	.4byte	.LVL168
+.LLST86:
+	.4byte	.LVL179
+	.4byte	.LVL181
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL168
-	.4byte	.LVL169-1
+	.4byte	.LVL181
+	.4byte	.LVL182-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL169-1
-	.4byte	.LVL169
+	.4byte	.LVL182-1
+	.4byte	.LVL182
 	.2byte	0x3
 	.byte	0x7d
 	.sleb128 96
 	.4byte	0
 	.4byte	0
-.LLST81:
-	.4byte	.LVL166
-	.4byte	.LVL169
+.LLST87:
+	.4byte	.LVL179
+	.4byte	.LVL182
 	.2byte	0x1
-	.byte	0x56
+	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST82:
-	.4byte	.LVL174
-	.4byte	.LVL179
+.LLST88:
+	.4byte	.LVL187
+	.4byte	.LVL192
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL179
-	.4byte	.LVL183
+	.4byte	.LVL192
+	.4byte	.LVL196
 	.2byte	0x4
 	.byte	0x7d
 	.sleb128 164
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST83:
-	.4byte	.LVL174
-	.4byte	.LVL175
+.LLST89:
+	.4byte	.LVL187
+	.4byte	.LVL188
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL175
-	.4byte	.LVL183
+	.4byte	.LVL188
+	.4byte	.LVL196
 	.2byte	0x3
 	.byte	0x7d
 	.sleb128 96
 	.4byte	0
 	.4byte	0
-.LLST84:
-	.4byte	.LVL174
-	.4byte	.LVL183
+.LLST90:
+	.4byte	.LVL187
+	.4byte	.LVL196
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST85:
-	.4byte	.LVL174
-	.4byte	.LVL183
+.LLST91:
+	.4byte	.LVL187
+	.4byte	.LVL196
 	.2byte	0x1
-	.byte	0x56
+	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST86:
-	.4byte	.LVL174
-	.4byte	.LVL176
+.LLST92:
+	.4byte	.LVL187
+	.4byte	.LVL189
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL176
-	.4byte	.LVL177
+	.4byte	.LVL189
+	.4byte	.LVL190
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST87:
-	.4byte	.LVL179
-	.4byte	.LVL180
+.LLST93:
+	.4byte	.LVL192
+	.4byte	.LVL193
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL180
-	.4byte	.LVL181-1
+	.4byte	.LVL193
+	.4byte	.LVL194-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL181-1
-	.4byte	.LVL183
+	.4byte	.LVL194-1
+	.4byte	.LVL196
 	.2byte	0x1
 	.byte	0x5b
 	.4byte	0
 	.4byte	0
-.LLST88:
-	.4byte	.LVL186
-	.4byte	.LVL196
+.LLST94:
+	.4byte	.LVL199
+	.4byte	.LVL209
 	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL197
-	.4byte	.LVL230
+	.byte	0x56
+	.4byte	.LVL210
+	.4byte	.LVL251
 	.2byte	0x1
-	.byte	0x55
+	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST89:
-	.4byte	.LVL186
-	.4byte	.LVL196
+.LLST95:
+	.4byte	.LVL199
+	.4byte	.LVL209
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL197
-	.4byte	.LVL230
+	.4byte	.LVL210
+	.4byte	.LVL251
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST91:
-	.4byte	.LVL189
-	.4byte	.LVL194
+.LLST97:
+	.4byte	.LVL202
+	.4byte	.LVL208
 	.2byte	0x2
 	.byte	0x78
 	.sleb128 0
-	.4byte	.LVL194
-	.4byte	.LVL196
+	.4byte	.LVL208
+	.4byte	.LVL209
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 16
-	.4byte	.LVL197
-	.4byte	.LVL203
+	.4byte	.LVL210
+	.4byte	.LVL229
 	.2byte	0x2
 	.byte	0x78
 	.sleb128 0
-	.4byte	.LVL203
-	.4byte	.LVL228
+	.4byte	.LVL229
+	.4byte	.LVL247
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 16
-	.4byte	.LVL228
-	.4byte	.LVL229
+	.4byte	.LVL247
+	.4byte	.LVL251
 	.2byte	0x2
 	.byte	0x78
 	.sleb128 0
-	.4byte	.LVL229
-	.4byte	.LVL230
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 16
 	.4byte	0
 	.4byte	0
-.LLST92:
-	.4byte	.LVL216
-	.4byte	.LVL218
+.LLST98:
+	.4byte	.LVL228
+	.4byte	.LVL229
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL249
+	.4byte	.LVL251
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST93:
-	.4byte	.LVL198
-	.4byte	.LVL225
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL226
-	.4byte	.LVL230
+.LLST99:
+	.4byte	.LVL211
+	.4byte	.LVL212
 	.2byte	0x1
-	.byte	0x5a
+	.byte	0x53
+	.4byte	.LVL212
+	.4byte	.LVL213-1
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 148
+	.4byte	.LVL213-1
+	.4byte	.LVL229
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 80
+	.4byte	.LVL247
+	.4byte	.LVL251
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 80
 	.4byte	0
 	.4byte	0
-.LLST94:
-	.4byte	.LVL219
-	.4byte	.LVL220
+.LLST100:
+	.4byte	.LVL231
+	.4byte	.LVL232
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL220
-	.4byte	.LVL221-1
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
+	.4byte	.LVL232
+	.4byte	.LVL238
+	.2byte	0x1
+	.byte	0x5b
 	.4byte	0
 	.4byte	0
-.LLST95:
-	.4byte	.LVL209
-	.4byte	.LVL211
+.LLST101:
+	.4byte	.LVL222
+	.4byte	.LVL223
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL211
-	.4byte	.LVL212-1
+	.4byte	.LVL223
+	.4byte	.LVL224-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL212-1
-	.4byte	.LVL212
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 84
-	.4byte	.LVL213
-	.4byte	.LVL214
+	.4byte	.LVL224-1
+	.4byte	.LVL225
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL225
+	.4byte	.LVL226
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL214
-	.4byte	.LVL218
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 76
-	.4byte	.LVL221
-	.4byte	.LVL222
+	.4byte	.LVL226
+	.4byte	.LVL229
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL237
+	.4byte	.LVL239
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL222
-	.4byte	.LVL223-1
+	.4byte	.LVL239
+	.4byte	.LVL242
 	.2byte	0x1
-	.byte	0x53
+	.byte	0x5b
+	.4byte	.LVL245
+	.4byte	.LVL247
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL249
+	.4byte	.LVL250
+	.2byte	0x1
+	.byte	0x5b
 	.4byte	0
 	.4byte	0
-.LLST96:
-	.4byte	.LVL218
-	.4byte	.LVL225
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL226
-	.4byte	.LVL228
+.LLST102:
+	.4byte	.LVL229
+	.4byte	.LVL236
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 84
+	.4byte	.LVL243
+	.4byte	.LVL244
 	.2byte	0x1
-	.byte	0x56
+	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST97:
-	.4byte	.LVL202
-	.4byte	.LVL204-1
+.LLST103:
+	.4byte	.LVL216
+	.4byte	.LVL217-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL204-1
-	.4byte	.LVL225
+	.4byte	.LVL217-1
+	.4byte	.LVL244
 	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL226
-	.4byte	.LVL228
+	.byte	0x55
+	.4byte	.LVL245
+	.4byte	.LVL247
 	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL229
-	.4byte	.LVL230
+	.byte	0x55
+	.4byte	.LVL248
+	.4byte	.LVL249
 	.2byte	0x1
 	.byte	0x50
+	.4byte	.LVL249
+	.4byte	.LVL251
+	.2byte	0x1
+	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST98:
-	.4byte	.LVL190
-	.4byte	.LVL191
+.LLST104:
+	.4byte	.LVL203
+	.4byte	.LVL204
 	.2byte	0x6
 	.byte	0x3
-	.4byte	.LC13
+	.4byte	.LC14
 	.byte	0x9f
-	.4byte	.LVL191
-	.4byte	.LVL192
+	.4byte	.LVL204
+	.4byte	.LVL205
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL192
-	.4byte	.LVL193-1
+	.4byte	.LVL205
+	.4byte	.LVL206-1
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST99:
-	.4byte	.LVL204
-	.4byte	.LVL205
+.LLST105:
+	.4byte	.LVL217
+	.4byte	.LVL218
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL205
-	.4byte	.LVL206-1
+	.4byte	.LVL218
+	.4byte	.LVL219-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL207
-	.4byte	.LVL208
+	.4byte	.LVL220
+	.4byte	.LVL221
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL208
-	.4byte	.LVL209-1
+	.4byte	.LVL221
+	.4byte	.LVL222-1
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST90:
-	.4byte	.LVL187
-	.4byte	.LVL191-1
+.LLST106:
+	.4byte	.LVL231
+	.4byte	.LVL244
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL245
+	.4byte	.LVL247
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST96:
+	.4byte	.LVL200
+	.4byte	.LVL204-1
 	.2byte	0x6
-	.byte	0x75
+	.byte	0x76
 	.sleb128 8
 	.byte	0x6
 	.byte	0x31
@@ -8997,13 +9549,13 @@ __func__.8795:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST59:
-	.4byte	.LVL121
-	.4byte	.LVL122
+.LLST65:
+	.4byte	.LVL134
+	.4byte	.LVL135
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL122
-	.4byte	.LFE219
+	.4byte	.LVL135
+	.4byte	.LFE223
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9011,17 +9563,17 @@ __func__.8795:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST47:
-	.4byte	.LVL104
-	.4byte	.LVL108
+.LLST15:
+	.4byte	.LVL38
+	.4byte	.LVL42
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL108
-	.4byte	.LVL116
+	.4byte	.LVL42
+	.4byte	.LVL50
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL116
-	.4byte	.LFE218
+	.4byte	.LVL50
+	.4byte	.LFE222
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9029,17 +9581,17 @@ __func__.8795:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST48:
-	.4byte	.LVL104
-	.4byte	.LVL110
+.LLST16:
+	.4byte	.LVL38
+	.4byte	.LVL44
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL110
-	.4byte	.LVL116
+	.4byte	.LVL44
+	.4byte	.LVL50
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL116
-	.4byte	.LFE218
+	.4byte	.LVL50
+	.4byte	.LFE222
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9047,13 +9599,13 @@ __func__.8795:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST49:
-	.4byte	.LVL104
-	.4byte	.LVL105
+.LLST17:
+	.4byte	.LVL38
+	.4byte	.LVL39
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL105
-	.4byte	.LFE218
+	.4byte	.LVL39
+	.4byte	.LFE222
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9061,13 +9613,13 @@ __func__.8795:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST50:
-	.4byte	.LVL104
-	.4byte	.LVL109
+.LLST18:
+	.4byte	.LVL38
+	.4byte	.LVL43
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL109
-	.4byte	.LFE218
+	.4byte	.LVL43
+	.4byte	.LFE222
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9075,16 +9627,16 @@ __func__.8795:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST51:
-	.4byte	.LVL114
-	.4byte	.LVL115
+.LLST19:
+	.4byte	.LVL48
+	.4byte	.LVL49
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST52:
-	.4byte	.LVL106
-	.4byte	.LVL107
+.LLST20:
+	.4byte	.LVL40
+	.4byte	.LVL41
 	.2byte	0x2d
 	.byte	0xf3
 	.uleb128 0x1
@@ -9130,8 +9682,8 @@ __func__.8795:
 	.byte	0x24
 	.byte	0x21
 	.byte	0x9f
-	.4byte	.LVL107
-	.4byte	.LVL113-1
+	.4byte	.LVL41
+	.4byte	.LVL47-1
 	.2byte	0x7
 	.byte	0x72
 	.sleb128 0
@@ -9141,28 +9693,28 @@ __func__.8795:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST53:
-	.4byte	.LVL111
-	.4byte	.LVL116
+.LLST21:
+	.4byte	.LVL45
+	.4byte	.LVL50
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST54:
-	.4byte	.LVL111
-	.4byte	.LVL113
+.LLST22:
+	.4byte	.LVL45
+	.4byte	.LVL47
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST55:
-	.4byte	.LVL111
-	.4byte	.LVL112
+.LLST23:
+	.4byte	.LVL45
+	.4byte	.LVL46
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL112
-	.4byte	.LVL113-1
+	.4byte	.LVL46
+	.4byte	.LVL47-1
 	.2byte	0x7
 	.byte	0x72
 	.sleb128 0
@@ -9172,20 +9724,20 @@ __func__.8795:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST56:
-	.4byte	.LVL111
-	.4byte	.LVL113
+.LLST24:
+	.4byte	.LVL45
+	.4byte	.LVL47
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST58:
-	.4byte	.LVL119
-	.4byte	.LVL120
+.LLST64:
+	.4byte	.LVL132
+	.4byte	.LVL133
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL120
-	.4byte	.LFE217
+	.4byte	.LVL133
+	.4byte	.LFE221
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9193,17 +9745,17 @@ __func__.8795:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST39:
-	.4byte	.LVL93
-	.4byte	.LVL97
+.LLST53:
+	.4byte	.LVL115
+	.4byte	.LVL119
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL97
-	.4byte	.LVL103
+	.4byte	.LVL119
+	.4byte	.LVL125
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL103
-	.4byte	.LFE214
+	.4byte	.LVL125
+	.4byte	.LFE218
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9211,17 +9763,17 @@ __func__.8795:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST40:
-	.4byte	.LVL93
-	.4byte	.LVL96
+.LLST54:
+	.4byte	.LVL115
+	.4byte	.LVL118
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL96
-	.4byte	.LVL103
+	.4byte	.LVL118
+	.4byte	.LVL125
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL103
-	.4byte	.LFE214
+	.4byte	.LVL125
+	.4byte	.LFE218
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9229,17 +9781,17 @@ __func__.8795:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST41:
-	.4byte	.LVL93
-	.4byte	.LVL95
+.LLST55:
+	.4byte	.LVL115
+	.4byte	.LVL117
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL95
-	.4byte	.LVL103
+	.4byte	.LVL117
+	.4byte	.LVL125
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL103
-	.4byte	.LFE214
+	.4byte	.LVL125
+	.4byte	.LFE218
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9247,17 +9799,17 @@ __func__.8795:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST42:
-	.4byte	.LVL93
-	.4byte	.LVL94
+.LLST56:
+	.4byte	.LVL115
+	.4byte	.LVL116
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL94
-	.4byte	.LVL103
+	.4byte	.LVL116
+	.4byte	.LVL125
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL103
-	.4byte	.LFE214
+	.4byte	.LVL125
+	.4byte	.LFE218
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9265,407 +9817,453 @@ __func__.8795:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST43:
-	.4byte	.LVL93
-	.4byte	.LVL103
+.LLST57:
+	.4byte	.LVL115
+	.4byte	.LVL125
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 0
-	.4byte	.LVL103
-	.4byte	.LFE214
+	.4byte	.LVL125
+	.4byte	.LFE218
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
 	.4byte	0
 	.4byte	0
-.LLST44:
-	.4byte	.LVL93
-	.4byte	.LVL103
+.LLST58:
+	.4byte	.LVL115
+	.4byte	.LVL125
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 4
-	.4byte	.LVL103
-	.4byte	.LFE214
+	.4byte	.LVL125
+	.4byte	.LFE218
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 4
 	.4byte	0
 	.4byte	0
-.LLST45:
-	.4byte	.LVL98
-	.4byte	.LVL99
+.LLST59:
+	.4byte	.LVL120
+	.4byte	.LVL121
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL99
-	.4byte	.LVL100-1
+	.4byte	.LVL121
+	.4byte	.LVL122-1
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
 	.4byte	0
 	.4byte	0
-.LLST46:
-	.4byte	.LVL100
-	.4byte	.LVL101
+.LLST60:
+	.4byte	.LVL122
+	.4byte	.LVL123
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST15:
-	.4byte	.LVL38
-	.4byte	.LVL44
+.LLST25:
+	.4byte	.LVL51
+	.4byte	.LVL55
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL44
-	.4byte	.LFE213
+	.4byte	.LVL55
+	.4byte	.LFE217
 	.2byte	0x1
-	.byte	0x5a
+	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST16:
-	.4byte	.LVL38
-	.4byte	.LVL42
+.LLST26:
+	.4byte	.LVL51
+	.4byte	.LVL56
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL42
-	.4byte	.LFE213
+	.4byte	.LVL56
+	.4byte	.LFE217
 	.2byte	0x3
 	.byte	0x91
-	.sleb128 -76
+	.sleb128 -72
 	.4byte	0
 	.4byte	0
-.LLST17:
-	.4byte	.LVL38
-	.4byte	.LVL39
+.LLST27:
+	.4byte	.LVL51
+	.4byte	.LVL53
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL39
-	.4byte	.LVL66
+	.4byte	.LVL53
+	.4byte	.LVL87
 	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL66
-	.4byte	.LVL68-1
+	.byte	0x54
+	.4byte	.LVL87
+	.4byte	.LVL89-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL68-1
-	.4byte	.LVL84
+	.4byte	.LVL89-1
+	.4byte	.LVL101
 	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL84
-	.4byte	.LVL85-1
+	.byte	0x54
+	.4byte	.LVL101
+	.4byte	.LVL102-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL85-1
-	.4byte	.LFE213
+	.4byte	.LVL102-1
+	.4byte	.LFE217
 	.2byte	0x1
-	.byte	0x55
+	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST18:
-	.4byte	.LVL38
-	.4byte	.LVL40
+.LLST28:
+	.4byte	.LVL51
+	.4byte	.LVL52
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL40
 	.4byte	.LVL52
+	.4byte	.LVL65
 	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL52
-	.4byte	.LVL78
+	.byte	0x58
+	.4byte	.LVL65
+	.4byte	.LVL80
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x53
 	.byte	0x9f
-	.4byte	.LVL78
-	.4byte	.LVL79
+	.4byte	.LVL80
+	.4byte	.LVL81
 	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL79
-	.4byte	.LVL83
+	.byte	0x58
+	.4byte	.LVL81
+	.4byte	.LVL85
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x53
 	.byte	0x9f
-	.4byte	.LVL83
-	.4byte	.LVL84
+	.4byte	.LVL85
+	.4byte	.LVL86
 	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL84
-	.4byte	.LVL89
+	.byte	0x58
+	.4byte	.LVL86
+	.4byte	.LVL111
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x53
 	.byte	0x9f
-	.4byte	.LVL89
-	.4byte	.LFE213
+	.4byte	.LVL111
+	.4byte	.LFE217
 	.2byte	0x1
-	.byte	0x57
+	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST19:
-	.4byte	.LVL38
-	.4byte	.LVL78
+.LLST29:
+	.4byte	.LVL51
+	.4byte	.LVL80
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 0
-	.4byte	.LVL78
-	.4byte	.LFE213
+	.4byte	.LVL80
+	.4byte	.LFE217
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 0
-	.4byte	0
-	.4byte	0
-.LLST20:
-	.4byte	.LVL38
-	.4byte	.LVL78
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 4
-	.4byte	.LVL78
-	.4byte	.LFE213
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 4
-	.4byte	0
-	.4byte	0
-.LLST21:
-	.4byte	.LVL53
-	.4byte	.LVL54-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL54-1
-	.4byte	.LVL65
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -80
-	.4byte	.LVL79
-	.4byte	.LVL83
-	.2byte	0x3
+	.4byte	0
+	.4byte	0
+.LLST30:
+	.4byte	.LVL51
+	.4byte	.LVL80
+	.2byte	0x2
 	.byte	0x91
-	.sleb128 -80
-	.4byte	.LVL87
-	.4byte	.LVL88
-	.2byte	0x3
+	.sleb128 4
+	.4byte	.LVL80
+	.4byte	.LFE217
+	.2byte	0x2
 	.byte	0x91
-	.sleb128 -80
+	.sleb128 4
 	.4byte	0
 	.4byte	0
-.LLST22:
-	.4byte	.LVL57
+.LLST31:
 	.4byte	.LVL65
+	.4byte	.LVL77
 	.2byte	0x1
-	.byte	0x5b
+	.byte	0x58
 	.4byte	.LVL81
+	.4byte	.LVL85
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL109
+	.4byte	.LVL110
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST32:
+	.4byte	.LVL69
+	.4byte	.LVL77
+	.2byte	0x1
+	.byte	0x5b
 	.4byte	.LVL83
+	.4byte	.LVL85
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL87
-	.4byte	.LVL88
+	.4byte	.LVL109
+	.4byte	.LVL110
 	.2byte	0x1
 	.byte	0x5b
 	.4byte	0
 	.4byte	0
-.LLST23:
-	.4byte	.LVL41
-	.4byte	.LVL77
+.LLST33:
+	.4byte	.LVL54
+	.4byte	.LVL79
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL78
-	.4byte	.LVL92
+	.4byte	.LVL80
+	.4byte	.LVL114
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST24:
-	.4byte	.LVL41
-	.4byte	.LVL50
+.LLST34:
+	.4byte	.LVL54
+	.4byte	.LVL63
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL50
-	.4byte	.LVL65
+	.4byte	.LVL63
+	.4byte	.LVL77
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.4byte	.LVL78
-	.4byte	.LVL79
+	.4byte	.LVL80
+	.4byte	.LVL81
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL79
-	.4byte	.LVL83
+	.4byte	.LVL81
+	.4byte	.LVL85
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.4byte	.LVL83
-	.4byte	.LVL84
+	.4byte	.LVL85
+	.4byte	.LVL86
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL87
-	.4byte	.LVL88
+	.4byte	.LVL109
+	.4byte	.LVL110
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.4byte	.LVL89
-	.4byte	.LVL91
+	.4byte	.LVL111
+	.4byte	.LVL113
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST25:
-	.4byte	.LVL43
-	.4byte	.LVL44
+.LLST35:
+	.4byte	.LVL54
+	.4byte	.LVL73
 	.2byte	0x2
-	.byte	0x70
-	.sleb128 0
-	.4byte	.LVL44
-	.4byte	.LVL45-1
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL73
+	.4byte	.LVL74
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL80
+	.4byte	.LVL83
 	.2byte	0x2
-	.byte	0x7a
-	.sleb128 0
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL85
+	.4byte	.LVL86
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL111
+	.4byte	.LFE217
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST26:
-	.4byte	.LVL56
+.LLST36:
 	.4byte	.LVL57
+	.4byte	.LVL58-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL79
-	.4byte	.LVL80-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL80-1
-	.4byte	.LVL81
+	.4byte	.LVL58-1
+	.4byte	.LFE217
 	.2byte	0x3
 	.byte	0x91
-	.sleb128 -72
+	.sleb128 -76
 	.4byte	0
 	.4byte	0
-.LLST27:
-	.4byte	.LVL56
-	.4byte	.LVL57
+.LLST37:
+	.4byte	.LVL68
+	.4byte	.LVL69
 	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL79
+	.byte	0x50
 	.4byte	.LVL81
+	.4byte	.LVL82-1
 	.2byte	0x1
-	.byte	0x5a
+	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST28:
-	.4byte	.LVL57
-	.4byte	.LVL59-1
+.LLST38:
+	.4byte	.LVL68
+	.4byte	.LVL69
 	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL59-1
-	.4byte	.LVL61
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -72
+	.byte	0x57
+	.4byte	.LVL81
+	.4byte	.LVL83
+	.2byte	0x1
+	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST29:
-	.4byte	.LVL57
-	.4byte	.LVL60
+.LLST39:
+	.4byte	.LVL69
+	.4byte	.LVL72
 	.2byte	0x1
-	.byte	0x58
+	.byte	0x5a
 	.4byte	0
 	.4byte	0
-.LLST30:
-	.4byte	.LVL57
-	.4byte	.LVL61
+.LLST40:
+	.4byte	.LVL69
+	.4byte	.LVL72
 	.2byte	0x1
-	.byte	0x5a
+	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST31:
-	.4byte	.LVL62
-	.4byte	.LVL63
+.LLST41:
+	.4byte	.LVL74
+	.4byte	.LVL75
 	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL81
-	.4byte	.LVL82-1
+	.byte	0x50
+	.4byte	.LVL83
+	.4byte	.LVL84-1
 	.2byte	0x1
-	.byte	0x53
+	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST32:
-	.4byte	.LVL62
-	.4byte	.LVL63
+.LLST42:
+	.4byte	.LVL74
+	.4byte	.LVL75
 	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL81
+	.byte	0x57
 	.4byte	.LVL83
+	.4byte	.LVL85
 	.2byte	0x1
-	.byte	0x5a
+	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST33:
-	.4byte	.LVL67
-	.4byte	.LVL69
+.LLST43:
+	.4byte	.LVL88
+	.4byte	.LVL90
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST34:
-	.4byte	.LVL67
-	.4byte	.LVL68-1
+.LLST44:
+	.4byte	.LVL88
+	.4byte	.LVL89-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL68-1
-	.4byte	.LVL69
+	.4byte	.LVL89-1
+	.4byte	.LVL90
 	.2byte	0x1
-	.byte	0x56
+	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST35:
-	.4byte	.LVL67
-	.4byte	.LVL68-1
+.LLST45:
+	.4byte	.LVL88
+	.4byte	.LVL89-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL68-1
-	.4byte	.LVL69
+	.4byte	.LVL89-1
+	.4byte	.LVL90
 	.2byte	0x1
-	.byte	0x55
+	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST36:
-	.4byte	.LVL84
-	.4byte	.LVL85
+.LLST46:
+	.4byte	.LVL91
+	.4byte	.LVL92
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL99
+	.4byte	.LVL100-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST47:
+	.4byte	.LVL91
+	.4byte	.LVL92
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL99
+	.4byte	.LVL101
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST48:
+	.4byte	.LVL101
+	.4byte	.LVL103
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST37:
-	.4byte	.LVL84
-	.4byte	.LVL85-1
+.LLST49:
+	.4byte	.LVL101
+	.4byte	.LVL102-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL85-1
-	.4byte	.LVL85
+	.4byte	.LVL102-1
+	.4byte	.LVL103
 	.2byte	0x1
-	.byte	0x56
+	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST38:
-	.4byte	.LVL84
-	.4byte	.LVL85-1
+.LLST50:
+	.4byte	.LVL101
+	.4byte	.LVL102-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL102-1
+	.4byte	.LVL103
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST51:
+	.4byte	.LVL104
+	.4byte	.LVL105
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL107
+	.4byte	.LVL108-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST52:
+	.4byte	.LVL104
+	.4byte	.LVL105
 	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL85-1
-	.4byte	.LVL85
+	.byte	0x57
+	.4byte	.LVL107
+	.4byte	.LVL109
 	.2byte	0x1
-	.byte	0x55
+	.byte	0x57
 	.4byte	0
 	.4byte	0
 .LLST9:
@@ -9674,7 +10272,7 @@ __func__.8795:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL34-1
-	.4byte	.LFE209
+	.4byte	.LFE213
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
@@ -9685,7 +10283,7 @@ __func__.8795:
 	.2byte	0x1
 	.byte	0x51
 	.4byte	.LVL31
-	.4byte	.LFE209
+	.4byte	.LFE213
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
@@ -9700,7 +10298,7 @@ __func__.8795:
 	.2byte	0x1
 	.byte	0x51
 	.4byte	.LVL34-1
-	.4byte	.LFE209
+	.4byte	.LFE213
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9718,7 +10316,7 @@ __func__.8795:
 	.2byte	0x1
 	.byte	0x52
 	.4byte	.LVL34-1
-	.4byte	.LFE209
+	.4byte	.LFE213
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9740,12 +10338,26 @@ __func__.8795:
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST57:
-	.4byte	.LVL117
-	.4byte	.LVL118
+.LLST62:
+	.4byte	.LVL128
+	.4byte	.LVL129
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL118
+	.4byte	.LVL129
+	.4byte	.LFE209
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST61:
+	.4byte	.LVL126
+	.4byte	.LVL127
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL127
 	.4byte	.LFE207
 	.2byte	0x4
 	.byte	0xf3
@@ -9775,7 +10387,7 @@ __func__.8795:
 	.2byte	0x1
 	.byte	0x55
 	.4byte	.LVL19
-	.4byte	.LFE223
+	.4byte	.LFE227
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9800,7 +10412,7 @@ __func__.8795:
 	.byte	0x51
 	.byte	0x9f
 	.4byte	.LVL16
-	.4byte	.LFE223
+	.4byte	.LFE227
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
@@ -9822,7 +10434,7 @@ __func__.8795:
 	.byte	0x52
 	.byte	0x9f
 	.4byte	.LVL16
-	.4byte	.LFE223
+	.4byte	.LFE227
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
@@ -9844,7 +10456,7 @@ __func__.8795:
 	.byte	0x53
 	.byte	0x9f
 	.4byte	.LVL16
-	.4byte	.LFE223
+	.4byte	.LFE227
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
@@ -9871,7 +10483,7 @@ __func__.8795:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL28
-	.4byte	.LFE223
+	.4byte	.LFE227
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
@@ -9892,7 +10504,7 @@ __func__.8795:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL28
-	.4byte	.LFE223
+	.4byte	.LFE227
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
@@ -9958,100 +10570,154 @@ __func__.8795:
 	.byte	0x54
 	.4byte	0
 	.4byte	0
+.LLST63:
+	.4byte	.LVL130
+	.4byte	.LVL131
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL131
+	.4byte	.LFE211
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
 	.section	.debug_aranges,"",%progbits
-	.4byte	0x5c
+	.4byte	0x74
 	.2byte	0x2
 	.4byte	.Ldebug_info0
 	.byte	0x4
 	.byte	0
 	.2byte	0
 	.2byte	0
-	.4byte	.LFB223
-	.4byte	.LFE223-.LFB223
-	.4byte	.LFB209
-	.4byte	.LFE209-.LFB209
+	.4byte	.LFB227
+	.4byte	.LFE227-.LFB227
 	.4byte	.LFB213
 	.4byte	.LFE213-.LFB213
-	.4byte	.LFB214
-	.4byte	.LFE214-.LFB214
+	.4byte	.LFB222
+	.4byte	.LFE222-.LFB222
+	.4byte	.LFB217
+	.4byte	.LFE217-.LFB217
 	.4byte	.LFB218
 	.4byte	.LFE218-.LFB218
 	.4byte	.LFB207
 	.4byte	.LFE207-.LFB207
-	.4byte	.LFB217
-	.4byte	.LFE217-.LFB217
-	.4byte	.LFB219
-	.4byte	.LFE219-.LFB219
-	.4byte	.LFB222
-	.4byte	.LFE222-.LFB222
+	.4byte	.LFB208
+	.4byte	.LFE208-.LFB208
+	.4byte	.LFB209
+	.4byte	.LFE209-.LFB209
+	.4byte	.LFB211
+	.4byte	.LFE211-.LFB211
+	.4byte	.LFB221
+	.4byte	.LFE221-.LFB221
+	.4byte	.LFB223
+	.4byte	.LFE223-.LFB223
+	.4byte	.LFB226
+	.4byte	.LFE226-.LFB226
 	.4byte	0
 	.4byte	0
 	.section	.debug_ranges,"",%progbits
 .Ldebug_ranges0:
-	.4byte	.LBB35
-	.4byte	.LBE35
-	.4byte	.LBB39
-	.4byte	.LBE39
-	.4byte	.LBB51
-	.4byte	.LBE51
-	.4byte	0
-	.4byte	0
-	.4byte	.LBB42
-	.4byte	.LBE42
+	.4byte	.LBB48
+	.4byte	.LBE48
 	.4byte	.LBB52
 	.4byte	.LBE52
+	.4byte	.LBB58
+	.4byte	.LBE58
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB45
-	.4byte	.LBE45
-	.4byte	.LBB49
-	.4byte	.LBE49
-	.4byte	.LBB50
-	.4byte	.LBE50
+	.4byte	.LBB55
+	.4byte	.LBE55
+	.4byte	.LBB59
+	.4byte	.LBE59
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB82
-	.4byte	.LBE82
-	.4byte	.LBB93
-	.4byte	.LBE93
-	.4byte	.LBB100
-	.4byte	.LBE100
+	.4byte	.LBB60
+	.4byte	.LBE60
+	.4byte	.LBB64
+	.4byte	.LBE64
+	.4byte	.LBB69
+	.4byte	.LBE69
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB94
-	.4byte	.LBE94
-	.4byte	.LBB98
-	.4byte	.LBE98
-	.4byte	.LBB99
-	.4byte	.LBE99
+	.4byte	.LBB65
+	.4byte	.LBE65
+	.4byte	.LBB70
+	.4byte	.LBE70
+	.4byte	.LBB71
+	.4byte	.LBE71
 	.4byte	0
 	.4byte	0
-	.4byte	.LFB223
-	.4byte	.LFE223
-	.4byte	.LFB209
-	.4byte	.LFE209
+	.4byte	.LBB72
+	.4byte	.LBE72
+	.4byte	.LBB79
+	.4byte	.LBE79
+	.4byte	0
+	.4byte	0
+	.4byte	.LBB75
+	.4byte	.LBE75
+	.4byte	.LBB80
+	.4byte	.LBE80
+	.4byte	.LBB81
+	.4byte	.LBE81
+	.4byte	0
+	.4byte	0
+	.4byte	.LBB102
+	.4byte	.LBE102
+	.4byte	.LBB113
+	.4byte	.LBE113
+	.4byte	.LBB122
+	.4byte	.LBE122
+	.4byte	0
+	.4byte	0
+	.4byte	.LBB114
+	.4byte	.LBE114
+	.4byte	.LBB120
+	.4byte	.LBE120
+	.4byte	.LBB121
+	.4byte	.LBE121
+	.4byte	0
+	.4byte	0
+	.4byte	.LBB116
+	.4byte	.LBE116
+	.4byte	.LBB117
+	.4byte	.LBE117
+	.4byte	0
+	.4byte	0
+	.4byte	.LFB227
+	.4byte	.LFE227
 	.4byte	.LFB213
 	.4byte	.LFE213
-	.4byte	.LFB214
-	.4byte	.LFE214
+	.4byte	.LFB222
+	.4byte	.LFE222
+	.4byte	.LFB217
+	.4byte	.LFE217
 	.4byte	.LFB218
 	.4byte	.LFE218
 	.4byte	.LFB207
 	.4byte	.LFE207
-	.4byte	.LFB217
-	.4byte	.LFE217
-	.4byte	.LFB219
-	.4byte	.LFE219
-	.4byte	.LFB222
-	.4byte	.LFE222
+	.4byte	.LFB208
+	.4byte	.LFE208
+	.4byte	.LFB209
+	.4byte	.LFE209
+	.4byte	.LFB211
+	.4byte	.LFE211
+	.4byte	.LFB221
+	.4byte	.LFE221
+	.4byte	.LFB223
+	.4byte	.LFE223
+	.4byte	.LFB226
+	.4byte	.LFE226
 	.4byte	0
 	.4byte	0
 	.section	.debug_line,"",%progbits
 .Ldebug_line0:
 	.section	.debug_str,"MS",%progbits,1
-.LASF396:
+.LASF401:
 	.ascii	"memalign_simple\000"
-.LASF350:
+.LASF351:
 	.ascii	"blob\000"
 .LASF132:
 	.ascii	"off_mem_rsvmap\000"
@@ -10073,9 +10739,11 @@ __func__.8795:
 	.ascii	"NETLOOP_RESTART\000"
 .LASF48:
 	.ascii	"IF_TYPE_MTD\000"
-.LASF388:
+.LASF418:
+	.ascii	"fdt_bootargs_append_ab\000"
+.LASF393:
 	.ascii	"fdt_shrink_to_minimum\000"
-.LASF375:
+.LASF378:
 	.ascii	"fit_get_name\000"
 .LASF211:
 	.ascii	"ih_magic\000"
@@ -10083,6 +10751,8 @@ __func__.8795:
 	.ascii	"__func__\000"
 .LASF37:
 	.ascii	"IF_TYPE_DOC\000"
+.LASF416:
+	.ascii	"/home/zzz/u-boot\000"
 .LASF59:
 	.ascii	"part_type\000"
 .LASF112:
@@ -10107,7 +10777,7 @@ __func__.8795:
 	.ascii	"image_header_t\000"
 .LASF257:
 	.ascii	"state\000"
-.LASF343:
+.LASF344:
 	.ascii	"align_len\000"
 .LASF106:
 	.ascii	"bi_dsp_freq\000"
@@ -10153,7 +10823,7 @@ __func__.8795:
 	.ascii	"net_native_vlan\000"
 .LASF63:
 	.ascii	"removable\000"
-.LASF380:
+.LASF383:
 	.ascii	"fdt_getprop\000"
 .LASF24:
 	.ascii	"errno\000"
@@ -10165,7 +10835,7 @@ __func__.8795:
 	.ascii	"IH_OS_ESIX\000"
 .LASF172:
 	.ascii	"IH_TYPE_FIRMWARE\000"
-.LASF407:
+.LASF413:
 	.ascii	"strchr\000"
 .LASF253:
 	.ascii	"initrd_end\000"
@@ -10173,17 +10843,15 @@ __func__.8795:
 	.ascii	"IRQ_STACK_START_IN\000"
 .LASF136:
 	.ascii	"size_dt_strings\000"
-.LASF399:
+.LASF406:
 	.ascii	"puts\000"
-.LASF377:
+.LASF380:
 	.ascii	"image_get_magic\000"
-.LASF378:
+.LASF381:
 	.ascii	"__fswab32\000"
-.LASF410:
-	.ascii	"/home/zzz/code/u-boot\000"
 .LASF302:
 	.ascii	"net_boot_file_size\000"
-.LASF362:
+.LASF363:
 	.ascii	"data\000"
 .LASF292:
 	.ascii	"net_tx_packet\000"
@@ -10211,11 +10879,11 @@ __func__.8795:
 	.ascii	"signed char\000"
 .LASF21:
 	.ascii	"uint8_t\000"
-.LASF395:
+.LASF400:
 	.ascii	"fit_image_get_data_size\000"
 .LASF86:
 	.ascii	"udevice\000"
-.LASF397:
+.LASF404:
 	.ascii	"fit_image_verify_with_data\000"
 .LASF219:
 	.ascii	"ih_arch\000"
@@ -10223,7 +10891,7 @@ __func__.8795:
 	.ascii	"totalsize\000"
 .LASF212:
 	.ascii	"ih_hcrc\000"
-.LASF315:
+.LASF318:
 	.ascii	"fdt_addr\000"
 .LASF193:
 	.ascii	"IH_TYPE_ZYNQIMAGE\000"
@@ -10239,7 +10907,7 @@ __func__.8795:
 	.ascii	"IF_TYPE_SPINAND\000"
 .LASF259:
 	.ascii	"images\000"
-.LASF376:
+.LASF379:
 	.ascii	"fit_hdr\000"
 .LASF179:
 	.ascii	"IH_TYPE_OMAPIMAGE\000"
@@ -10279,9 +10947,9 @@ __func__.8795:
 	.ascii	"IH_TYPE_FIRMWARE_IVT\000"
 .LASF271:
 	.ascii	"enetaddr\000"
-.LASF406:
+.LASF412:
 	.ascii	"fdt_next_subnode\000"
-.LASF321:
+.LASF324:
 	.ascii	"filename\000"
 .LASF242:
 	.ascii	"fit_hdr_fdt\000"
@@ -10293,11 +10961,11 @@ __func__.8795:
 	.ascii	"net_ethaddr\000"
 .LASF51:
 	.ascii	"sig_type\000"
-.LASF316:
+.LASF319:
 	.ascii	"boot_device\000"
 .LASF157:
 	.ascii	"IH_OS_RTEMS\000"
-.LASF318:
+.LASF321:
 	.ascii	"flags\000"
 .LASF220:
 	.ascii	"ih_type\000"
@@ -10309,7 +10977,7 @@ __func__.8795:
 	.ascii	"bi_flashoffset\000"
 .LASF301:
 	.ascii	"net_boot_file_name\000"
-.LASF387:
+.LASF391:
 	.ascii	"strcmp\000"
 .LASF213:
 	.ascii	"ih_time\000"
@@ -10317,7 +10985,9 @@ __func__.8795:
 	.ascii	"node\000"
 .LASF34:
 	.ascii	"IF_TYPE_SCSI\000"
-.LASF311:
+.LASF375:
+	.ascii	"mtd_part_parse\000"
+.LASF314:
 	.ascii	"__bss_end\000"
 .LASF229:
 	.ascii	"arch\000"
@@ -10327,7 +10997,7 @@ __func__.8795:
 	.ascii	"select_hwpart\000"
 .LASF293:
 	.ascii	"net_rx_packets\000"
-.LASF323:
+.LASF310:
 	.ascii	"mem_malloc_start\000"
 .LASF372:
 	.ascii	"outname\000"
@@ -10343,7 +11013,7 @@ __func__.8795:
 	.ascii	"get_aligned_image_offset\000"
 .LASF173:
 	.ascii	"IH_TYPE_SCRIPT\000"
-.LASF382:
+.LASF385:
 	.ascii	"printf\000"
 .LASF182:
 	.ascii	"IH_TYPE_PBLIMAGE\000"
@@ -10359,7 +11029,7 @@ __func__.8795:
 	.ascii	"IH_OS_COUNT\000"
 .LASF284:
 	.ascii	"net_dns_server\000"
-.LASF310:
+.LASF313:
 	.ascii	"__bss_start\000"
 .LASF39:
 	.ascii	"IF_TYPE_SD\000"
@@ -10367,23 +11037,25 @@ __func__.8795:
 	.ascii	"memory\000"
 .LASF181:
 	.ascii	"IH_TYPE_KERNEL_NOLOAD\000"
+.LASF419:
+	.ascii	"misc_decompress_int_en\000"
 .LASF127:
 	.ascii	"fdt_header\000"
-.LASF401:
+.LASF403:
 	.ascii	"fdt_getprop_u32\000"
-.LASF324:
+.LASF311:
 	.ascii	"mem_malloc_end\000"
-.LASF404:
+.LASF410:
 	.ascii	"fit_find_config_node\000"
 .LASF249:
 	.ascii	"rd_end\000"
-.LASF346:
+.LASF347:
 	.ascii	"spl_fit_standalone_release\000"
 .LASF254:
 	.ascii	"cmdline_start\000"
 .LASF279:
 	.ascii	"index\000"
-.LASF360:
+.LASF361:
 	.ascii	"nr_sectors\000"
 .LASF235:
 	.ascii	"fit_uname_cfg\000"
@@ -10397,21 +11069,21 @@ __func__.8795:
 	.ascii	"net_nis_domain\000"
 .LASF244:
 	.ascii	"fit_noffset_fdt\000"
-.LASF320:
+.LASF323:
 	.ascii	"bl_len\000"
 .LASF60:
 	.ascii	"target\000"
 .LASF161:
 	.ascii	"IH_OS_OSE\000"
-.LASF349:
+.LASF350:
 	.ascii	"spl_fit_record_loadable\000"
-.LASF384:
+.LASF387:
 	.ascii	"fit_board_verify_required_sigs\000"
 .LASF308:
 	.ascii	"NETLOOP_FAIL\000"
 .LASF43:
 	.ascii	"IF_TYPE_NVME\000"
-.LASF317:
+.LASF320:
 	.ascii	"next_stage\000"
 .LASF103:
 	.ascii	"bi_sramstart\000"
@@ -10425,11 +11097,11 @@ __func__.8795:
 	.ascii	"uintptr_t\000"
 .LASF208:
 	.ascii	"IH_COMP_ZIMAGE\000"
-.LASF348:
+.LASF349:
 	.ascii	"noffset\000"
 .LASF298:
 	.ascii	"net_our_vlan\000"
-.LASF379:
+.LASF382:
 	.ascii	"fit_image_get_os\000"
 .LASF230:
 	.ascii	"image_info_t\000"
@@ -10437,7 +11109,7 @@ __func__.8795:
 	.ascii	"IH_TYPE_MULTI\000"
 .LASF180:
 	.ascii	"IH_TYPE_AISIMAGE\000"
-.LASF345:
+.LASF346:
 	.ascii	"sectors\000"
 .LASF226:
 	.ascii	"image_len\000"
@@ -10453,7 +11125,7 @@ __func__.8795:
 	.ascii	"IH_TYPE_LPC32XXIMAGE\000"
 .LASF233:
 	.ascii	"legacy_hdr_os_copy\000"
-.LASF389:
+.LASF394:
 	.ascii	"fdt_get_name\000"
 .LASF261:
 	.ascii	"sha256_der_prefix\000"
@@ -10473,10 +11145,14 @@ __func__.8795:
 	.ascii	"protect\000"
 .LASF82:
 	.ascii	"disk_partition_t\000"
-.LASF385:
+.LASF417:
+	.ascii	"fdt_bootargs_append\000"
+.LASF388:
 	.ascii	"fit_conf_get_node\000"
 .LASF297:
 	.ascii	"net_null_ethaddr\000"
+.LASF402:
+	.ascii	"fit_image_is_preload\000"
 .LASF371:
 	.ascii	"spl_fit_get_image_name\000"
 .LASF265:
@@ -10487,13 +11163,13 @@ __func__.8795:
 	.ascii	"fit_hdr_os\000"
 .LASF122:
 	.ascii	"_datarelrolocal_start_ofs\000"
-.LASF344:
+.LASF345:
 	.ascii	"count\000"
 .LASF186:
 	.ascii	"IH_TYPE_SOCFPGAIMAGE\000"
-.LASF383:
+.LASF386:
 	.ascii	"fdt_path_offset\000"
-.LASF322:
+.LASF325:
 	.ascii	"read\000"
 .LASF80:
 	.ascii	"uuid\000"
@@ -10517,9 +11193,9 @@ __func__.8795:
 	.ascii	"IH_TYPE_X86_SETUP\000"
 .LASF99:
 	.ascii	"bi_memsize\000"
-.LASF351:
+.LASF352:
 	.ascii	"image\000"
-.LASF357:
+.LASF358:
 	.ascii	"comp_addr\000"
 .LASF28:
 	.ascii	"image_base\000"
@@ -10529,11 +11205,11 @@ __func__.8795:
 	.ascii	"write_hwaddr\000"
 .LASF201:
 	.ascii	"IH_TYPE_COUNT\000"
-.LASF355:
+.LASF356:
 	.ascii	"offset\000"
 .LASF35:
 	.ascii	"IF_TYPE_ATAPI\000"
-.LASF381:
+.LASF384:
 	.ascii	"fdt_record_loadable\000"
 .LASF46:
 	.ascii	"IF_TYPE_SPINOR\000"
@@ -10553,7 +11229,7 @@ __func__.8795:
 	.ascii	"IF_TYPE_RKNAND\000"
 .LASF104:
 	.ascii	"bi_sramsize\000"
-.LASF359:
+.LASF360:
 	.ascii	"overhead\000"
 .LASF90:
 	.ascii	"long double\000"
@@ -10601,7 +11277,7 @@ __func__.8795:
 	.ascii	"image_header\000"
 .LASF31:
 	.ascii	"lbaint_t\000"
-.LASF356:
+.LASF357:
 	.ascii	"length\000"
 .LASF23:
 	.ascii	"__be32\000"
@@ -10613,7 +11289,7 @@ __func__.8795:
 	.ascii	"IH_OS_NCR\000"
 .LASF224:
 	.ascii	"image_info\000"
-.LASF398:
+.LASF405:
 	.ascii	"board_fit_image_post_process\000"
 .LASF163:
 	.ascii	"IH_OS_OPENRTOS\000"
@@ -10621,21 +11297,21 @@ __func__.8795:
 	.ascii	"IH_OS_SCO\000"
 .LASF191:
 	.ascii	"IH_TYPE_RKSD\000"
-.LASF312:
+.LASF315:
 	.ascii	"spl_image_info\000"
 .LASF338:
 	.ascii	"images_noffset\000"
 .LASF366:
 	.ascii	"get_aligned_image_size\000"
-.LASF361:
+.LASF362:
 	.ascii	"image_comp\000"
 .LASF42:
 	.ascii	"IF_TYPE_SYSTEMACE\000"
-.LASF319:
+.LASF322:
 	.ascii	"spl_load_info\000"
-.LASF409:
+.LASF415:
 	.ascii	"common/spl/spl_fit_tb_arm_v7.c\000"
-.LASF405:
+.LASF411:
 	.ascii	"fdt_first_subnode\000"
 .LASF49:
 	.ascii	"IF_TYPE_COUNT\000"
@@ -10649,9 +11325,11 @@ __func__.8795:
 	.ascii	"region\000"
 .LASF137:
 	.ascii	"size_dt_struct\000"
+.LASF376:
+	.ascii	"dev_desc\000"
 .LASF335:
 	.ascii	"os_type\000"
-.LASF365:
+.LASF341:
 	.ascii	"desc\000"
 .LASF126:
 	.ascii	"fdt32_t\000"
@@ -10665,7 +11343,7 @@ __func__.8795:
 	.ascii	"bi_enetaddr\000"
 .LASF87:
 	.ascii	"mtd_info\000"
-.LASF352:
+.LASF353:
 	.ascii	"spl_fit_load_blob\000"
 .LASF54:
 	.ascii	"SIG_TYPE_GUID\000"
@@ -10675,9 +11353,11 @@ __func__.8795:
 	.ascii	"init\000"
 .LASF76:
 	.ascii	"disk_partition\000"
+.LASF390:
+	.ascii	"memcmp\000"
 .LASF153:
 	.ascii	"IH_OS_VXWORKS\000"
-.LASF393:
+.LASF398:
 	.ascii	"fit_image_get_data_position\000"
 .LASF263:
 	.ascii	"__dtb_dt_begin\000"
@@ -10705,27 +11385,27 @@ __func__.8795:
 	.ascii	"bi_busfreq\000"
 .LASF6:
 	.ascii	"short int\000"
-.LASF358:
+.LASF359:
 	.ascii	"load_ptr\000"
 .LASF194:
 	.ascii	"IH_TYPE_ZYNQMPIMAGE\000"
 .LASF206:
 	.ascii	"IH_COMP_LZO\000"
-.LASF390:
+.LASF395:
 	.ascii	"fit_image_get_comp\000"
 .LASF183:
 	.ascii	"IH_TYPE_MXSIMAGE\000"
-.LASF394:
+.LASF399:
 	.ascii	"fit_image_get_data_offset\000"
 .LASF56:
 	.ascii	"mbr_sig\000"
 .LASF266:
 	.ascii	"save_addr\000"
-.LASF391:
+.LASF396:
 	.ascii	"fit_image_get_load\000"
 .LASF159:
 	.ascii	"IH_OS_UNITY\000"
-.LASF347:
+.LASF348:
 	.ascii	"spl_fit_image_get_os\000"
 .LASF140:
 	.ascii	"IH_OS_OPENBSD\000"
@@ -10741,15 +11421,17 @@ __func__.8795:
 	.ascii	"_datarellocal_start_ofs\000"
 .LASF155:
 	.ascii	"IH_OS_QNX\000"
+.LASF389:
+	.ascii	"strlen\000"
 .LASF326:
 	.ascii	"spl_image\000"
 .LASF260:
 	.ascii	"sha1_der_prefix\000"
 .LASF73:
 	.ascii	"block_drvr\000"
-.LASF400:
+.LASF407:
 	.ascii	"memcpy\000"
-.LASF341:
+.LASF342:
 	.ascii	"spl_load_simple_fit\000"
 .LASF84:
 	.ascii	"flash_id\000"
@@ -10773,7 +11455,7 @@ __func__.8795:
 	.ascii	"bi_boot_params\000"
 .LASF22:
 	.ascii	"uint32_t\000"
-.LASF325:
+.LASF312:
 	.ascii	"mem_malloc_brk\000"
 .LASF282:
 	.ascii	"net_gateway\000"
@@ -10781,11 +11463,11 @@ __func__.8795:
 	.ascii	"IH_OS_PSOS\000"
 .LASF152:
 	.ascii	"IH_OS_LYNXOS\000"
-.LASF392:
+.LASF397:
 	.ascii	"fit_image_get_comp_addr\000"
-.LASF403:
+.LASF409:
 	.ascii	"fdt_subnode_offset\000"
-.LASF408:
+.LASF414:
 	.ascii	"GNU C11 6.3.1 20170404 -mthumb -mthumb-interwork -m"
 	.ascii	"abi=aapcs-linux -mno-unaligned-access -mfloat-abi=s"
 	.ascii	"oft -march=armv7-a -mtune=cortex-a9 -mfpu=vfpv3-d16"
@@ -10809,9 +11491,9 @@ __func__.8795:
 	.ascii	"IH_OS_DELL\000"
 .LASF96:
 	.ascii	"reserved\000"
-.LASF353:
+.LASF354:
 	.ascii	"spl_fit_append_fdt\000"
-.LASF313:
+.LASF316:
 	.ascii	"entry_point\000"
 .LASF168:
 	.ascii	"IH_TYPE_STANDALONE\000"
@@ -10821,7 +11503,7 @@ __func__.8795:
 	.ascii	"short unsigned int\000"
 .LASF128:
 	.ascii	"magic\000"
-.LASF342:
+.LASF343:
 	.ascii	"spl_kernel_partition\000"
 .LASF245:
 	.ascii	"fit_hdr_setup\000"
@@ -10831,13 +11513,15 @@ __func__.8795:
 	.ascii	"base\000"
 .LASF160:
 	.ascii	"IH_OS_INTEGRITY\000"
+.LASF374:
+	.ascii	"slot\000"
 .LASF83:
 	.ascii	"sector_count\000"
-.LASF374:
+.LASF377:
 	.ascii	"fit_config_verify\000"
 .LASF221:
 	.ascii	"ih_comp\000"
-.LASF363:
+.LASF364:
 	.ascii	"external_data\000"
 .LASF340:
 	.ascii	"part_info\000"
@@ -10847,11 +11531,11 @@ __func__.8795:
 	.ascii	"SIG_TYPE_COUNT\000"
 .LASF250:
 	.ascii	"ft_addr\000"
-.LASF364:
+.LASF365:
 	.ascii	"preload\000"
 .LASF4:
 	.ascii	"uchar\000"
-.LASF386:
+.LASF392:
 	.ascii	"part_get_info_by_name\000"
 .LASF148:
 	.ascii	"IH_OS_IRIX\000"
@@ -10867,15 +11551,15 @@ __func__.8795:
 	.ascii	"net_netmask\000"
 .LASF274:
 	.ascii	"send\000"
-.LASF354:
+.LASF355:
 	.ascii	"spl_load_fit_image\000"
 .LASF119:
 	.ascii	"IRQ_STACK_START\000"
-.LASF314:
+.LASF317:
 	.ascii	"entry_point_os\000"
 .LASF243:
 	.ascii	"fit_uname_fdt\000"
-.LASF402:
+.LASF408:
 	.ascii	"fit_image_get_data\000"
 	.ident	"GCC: (Linaro GCC 6.3-2017.05) 6.3.1 20170404"
 	.section	.note.GNU-stack,"",%progbits

commit 96b4f0fa89282116e170f12210d778050057d4ba
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Thu Jul 29 16:26:53 2021 +0800

    common: fdt_support: increase aligned size to total_size
    
    Fixes error:
    WARNING: could not set bootargs FDT_ERR_NOSPACE
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
    Change-Id: Iedcd9774666bea2ac22005d150995e1992c79bab

diff --git a/common/fdt_support.c b/common/fdt_support.c
index 06536b8d79..c160b36abc 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -305,9 +305,9 @@ int fdt_bootargs_append(void *fdt, char *data)
 			if (!str)
 				return -ENOMEM;
 
-			fdt_increase_size(fdt, strlen(data) + 1);
+			fdt_increase_size(fdt, 512);
 			snprintf(str, len, "%s %s", bootargs, data);
-			ret = fdt_setprop(fdt, nodeoffset, "bootargs",
+			ret = fdt_setprop(fdt, nodeoffset, arr_bootargs[i],
 					  str, len);
 			if (ret < 0)
 				printf("WARNING: could not set bootargs %s.\n", fdt_strerror(ret));

commit b6ffac1d4908b34998d03bbedf6025d33fcd0d27
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Jul 29 14:53:15 2021 +0800

    common: use mtd_part_parse()
    
    Since its parameters changed.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I2eb15e8b17d57ec8116f89307552fe9a78ceaa82

diff --git a/common/fdt_support.c b/common/fdt_support.c
index a9a5596f84..06536b8d79 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -397,7 +397,7 @@ int fdt_chosen(void *fdt)
 				env_update("bootargs", bootargs);
 #endif
 #ifdef CONFIG_MTD_BLK
-				char *mtd_par_info = mtd_part_parse();
+				char *mtd_par_info = mtd_part_parse(NULL);
 
 				if (mtd_par_info) {
 					if (memcmp(env_get("devtype"), "mtd", 3) == 0)
diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 007071ecb2..87dfe4c906 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -548,7 +548,7 @@ static int spl_load_kernel_fit(struct spl_image_info *spl_image,
 			struct blk_desc *desc = info->dev;
 
 			if (desc->devnum == BLK_MTD_SPI_NAND)
-				fdt_bootargs_append((void *)image_info.load_addr, mtd_part_parse());
+				fdt_bootargs_append((void *)image_info.load_addr, mtd_part_parse(desc));
 #endif
 		} else if (!strcmp(images[i], FIT_KERNEL_PROP)) {
 #if CONFIG_IS_ENABLED(OPTEE)

commit c4fe67c20902a67bb54104572d0a7e2c553014e9
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Jul 29 11:54:26 2021 +0800

    mtd: mtd_blk: add parameter dev_desc for mtd_part_parse()
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I0a8ebd68ee82e124d4296d6683180a99dae0c028

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index a66402d02e..3d12937418 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -351,12 +351,10 @@ static __maybe_unused int mtd_map_erase(struct mtd_info *mtd, loff_t offset,
 	return 0;
 }
 
-char *mtd_part_parse(void)
+char *mtd_part_parse(struct blk_desc *dev_desc)
 {
 	char mtd_part_info_temp[MTD_SINGLE_PART_INFO_MAX_SIZE] = {0};
 	u32 length, data_len = MTD_PART_INFO_MAX_SIZE;
-	char mtd_root_part_info[40] = {0};
-	struct blk_desc *dev_desc;
 	disk_partition_t info;
 	char *mtd_part_info_p;
 	struct mtd_info *mtd;
@@ -364,13 +362,17 @@ char *mtd_part_parse(void)
 	int ret;
 	int p;
 
+#ifndef CONFIG_SPL_BUILD
 	dev_desc = rockchip_get_bootdev();
+#endif
 	if (!dev_desc)
 		return NULL;
 
 	mtd = (struct mtd_info *)dev_desc->bdev->priv;
 	if (!mtd)
 		return NULL;
+#ifndef CONFIG_SPL_BUILD
+	char mtd_root_part_info[40] = {0};
 
 	p = part_get_info_by_name(dev_desc, PART_SYSTEM, &info);
 	if (p > 0) {
@@ -382,7 +384,7 @@ char *mtd_part_parse(void)
 				 MTD_ROOT_PART_NUM, p - 1, MTD_ROOT_PART_NAME_UBIFS);
 		env_update("bootargs", mtd_root_part_info);
 	}
-
+#endif
 	mtd_part_info = (char *)calloc(MTD_PART_INFO_MAX_SIZE, sizeof(char));
 	if (!mtd_part_info) {
 		printf("%s: Fail to malloc!", __func__);
diff --git a/include/mtd_blk.h b/include/mtd_blk.h
index e5e4b23ecf..c42c7f62a9 100644
--- a/include/mtd_blk.h
+++ b/include/mtd_blk.h
@@ -11,7 +11,7 @@
  *
  * @return mtd part info. If fail, return NULL
  */
-char *mtd_part_parse(void);
+char *mtd_part_parse(struct blk_desc *dev_desc);
 int mtd_blk_map_table_init(struct blk_desc *desc,
 			   loff_t offset,
 			   size_t length);

commit f7b5e3b1ce6e47b51a966ef86dd0bb0b89d133ae
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jul 30 09:55:49 2021 +0800

    configs: rv1126-emmc-tb: enlarge CONFIG_SYS_MALLOC_F_LEN
    
    The thunder boot process may use more heap to load larger ramdisk
    with eMMC.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I5c347c14adce72c7dffdbb25fbb7c73135bc976d

diff --git a/configs/rv1126-emmc-tb.config b/configs/rv1126-emmc-tb.config
index ea16e7562a..c2c5a1849e 100644
--- a/configs/rv1126-emmc-tb.config
+++ b/configs/rv1126-emmc-tb.config
@@ -31,4 +31,5 @@ CONFIG_SPL_POWER_FG_RK817=y
 CONFIG_SPL_POWER_LOW_VOLTAGE_THRESHOLD=3400
 # CONFIG_SPL_SPI_FLASH_SUPPORT is not set
 # CONFIG_SPL_SPI_SUPPORT is not set
+CONFIG_SYS_MALLOC_F_LEN=0x100000
 CONFIG_TRUST_INI="RV1126TOS_TB.ini"

commit 3aaf0a189d482cfeab742d3e8028084251334785
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Aug 19 16:39:25 2021 +0800

    configs: rv1126-spi-nor-tb: support CONFIG_SPL_BLK_READ_PREPARE
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: If769b839dae9c5c15a84d5239100b28ab56dda21

diff --git a/configs/rv1126-spi-nor-tb.config b/configs/rv1126-spi-nor-tb.config
index e931ac0fc2..c722bea4ab 100644
--- a/configs/rv1126-spi-nor-tb.config
+++ b/configs/rv1126-spi-nor-tb.config
@@ -1,16 +1,11 @@
 CONFIG_BASE_DEFCONFIG="rv1126-spi-nor-tiny_defconfig"
 CONFIG_LOADER_INI="RV1126MINIALL_SPI_NOR_TB.ini"
 CONFIG_OF_U_BOOT_REMOVE_PROPS=""
-# CONFIG_SPL_AB is not set
-# CONFIG_SPL_CRYPTO_SUPPORT is not set
-# CONFIG_SPL_DM_CRYPTO is not set
-CONFIG_SPL_EFI_PARTITION=y
+CONFIG_SPL_BLK_READ_PREPARE=y
 CONFIG_SPL_FIT_IMAGE_KB=384
 # CONFIG_SPL_HASH_SUPPORT is not set
 CONFIG_SPL_KERNEL_BOOT=y
-CONFIG_SPL_LIBDISK_SUPPORT=y
 # CONFIG_SPL_ROCKCHIP_SECURE_OTP_V2 is not set
 CONFIG_SYS_MALLOC_F_LEN=0xc000
-# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION is not set
 CONFIG_TPL_SYS_MALLOC_F_LEN=0xc000
 CONFIG_TRUST_INI="RV1126TOS_TB.ini"

commit 12f0040a9c45b2f5c7cfb7f39aa3997c368e4639
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Aug 17 17:00:01 2021 +0800

    configs: rv1126: add default N & E & C size
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I5471b8b6cf256bf19bb0b6654f1703891ef4feef

diff --git a/configs/rv1126-spl-spi-nand_defconfig b/configs/rv1126-spl-spi-nand_defconfig
index 9b3290f097..e1c86c8aea 100644
--- a/configs/rv1126-spl-spi-nand_defconfig
+++ b/configs/rv1126-spl-spi-nand_defconfig
@@ -170,6 +170,8 @@ CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_RSA=y
 CONFIG_SPL_RSA=y
+CONFIG_RSA_N_SIZE=0x100
+CONFIG_RSA_E_SIZE=0x100
 CONFIG_RSA_C_SIZE=0x14
 CONFIG_SHA512=y
 CONFIG_ERRNO_STR=y
diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index f7ca57610b..4eabd74c6d 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -185,6 +185,8 @@ CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_RSA=y
 CONFIG_SPL_RSA=y
+CONFIG_RSA_N_SIZE=0x100
+CONFIG_RSA_E_SIZE=0x100
 CONFIG_RSA_C_SIZE=0x14
 CONFIG_SHA512=y
 CONFIG_ERRNO_STR=y

commit e409430010cd43fa2b4f64aae67994153fd4d8af
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Aug 17 16:33:12 2021 +0800

    rsa: Kconfig: delete the rsa N & E & C default value
    
    Since the rsa N & E & C size are different, it will make mistake
    to use default value.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I9c8466baac84f041f1627720c7669f21a30ccce2

diff --git a/lib/rsa/Kconfig b/lib/rsa/Kconfig
index 7aa896cb44..f0556c44df 100644
--- a/lib/rsa/Kconfig
+++ b/lib/rsa/Kconfig
@@ -36,14 +36,20 @@ config RSA_FREESCALE_EXP
 
 config RSA_N_SIZE
 	hex "Define the RSA N size"
-	default 0x100
+	help
+	  The value is depended on different platforms. The RV1126/RV1109 is set to 0x100.
+	  The RK3568/RK3566 is set to 0x200.
 
 config RSA_E_SIZE
 	hex "Define the RSA E size"
-	default 0x100
+	help
+	  The value is depended on different platforms. The RV1126/RV1109 is set to 0x100.
+	  The RK3568/RK3566 is set to 0x10.
 
 config RSA_C_SIZE
 	hex "Define the RSA C size"
-	default 0x100
+	help
+	  The value is depended on different platforms.The RV1126/RV1109 is set to 0x14.
+	  The RK3568/RK3566 is set to 0x20.
 
 endif

commit dac93f83704b40b68ba21a704af7b37fa085bf64
Author: Chris Zhong <zyw@rock-chips.com>
Date:   Wed Aug 18 16:29:41 2021 +0800

    drm/rockchip: vop: correct the dclk_inv
    
    The property pixelclk-active=1 in dts means dclk polarity is positive
    edge, and set 0 to GRF or VOP register: lcdc_dclk_inv_sel. This bit
    is reversed in uboot, this patch corrects it.
    In addition, the configuration of RV1126 has been added in this patch.
    
    Signed-off-by: Chris Zhong <zyw@rock-chips.com>
    Change-Id: I93af7e052fb18782a81e9c9b762a57411ef9283f

diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index 89d5852e19..1dcf9e197a 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -294,7 +294,7 @@ static int rockchip_vop_init(struct display_state *state)
 		VOP_CTRL_SET(vop, lvds_pin_pol, val);
 		VOP_CTRL_SET(vop, lvds_dclk_pol, dclk_inv);
 		if (!IS_ERR_OR_NULL(vop->grf))
-			VOP_GRF_SET(vop, grf_dclk_inv, !dclk_inv);
+			VOP_GRF_SET(vop, grf_dclk_inv, dclk_inv);
 		break;
 	case DRM_MODE_CONNECTOR_eDP:
 		VOP_CTRL_SET(vop, edp_en, 1);
diff --git a/drivers/video/drm/rockchip_vop.h b/drivers/video/drm/rockchip_vop.h
index 09d6f9ac96..0a495a4835 100644
--- a/drivers/video/drm/rockchip_vop.h
+++ b/drivers/video/drm/rockchip_vop.h
@@ -233,10 +233,11 @@ struct vop_reg_data {
 
 struct vop_reg {
 	uint32_t mask;
-	uint32_t offset:12;
+	uint32_t offset:17;
 	uint32_t shift:5;
 	uint32_t begin_minor:4;
 	uint32_t end_minor:4;
+	uint32_t reserved:2;
 	uint32_t major:3;
 	uint32_t write_mask:1;
 };
diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index 768d313376..6925cf49ec 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -778,10 +778,15 @@ static const struct vop_ctrl rv1126_ctrl_data = {
 				      0xffffffff, 0),
 };
 
+static const struct vop_grf_ctrl rv1126_grf_ctrl = {
+	.grf_dclk_inv = VOP_REG(0x1026c, 0x1, 2),
+};
+
 const struct vop_data rv1126_vop = {
 	.version = VOP_VERSION(2, 7),
 	.max_output = {1920, 1080},
 	.ctrl = &rv1126_ctrl_data,
+	.grf_ctrl = &rv1126_grf_ctrl,
 	.win = &rv1126_win2_data,
 	.line_flag = &rk3366_vop_lite_line_flag,
 	.reg_len = RK3366_LIT_FLAG_REG * 4,

commit cae1d03732fca28a0352bd09c4a9d51f538bdb31
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Tue Aug 10 09:17:59 2021 +0800

    common: usb: fix endpoints number in interface descriptor
    
    Some odd devices respond the Endpoint descriptor items are less then the
    bNumEndpoints in Interface descriptor, so fix it at config parse time.
    
    Change-Id: I7d4f21d45904552d1f8fb81abf3a2183c17f504e
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/common/usb.c b/common/usb.c
index 61439e39eb..1b0b7f2d93 100644
--- a/common/usb.c
+++ b/common/usb.c
@@ -517,6 +517,20 @@ static int usb_parse_config(struct usb_device *dev,
 		index += head->bLength;
 		head = (struct usb_descriptor_header *)&buffer[index];
 	}
+
+	/**
+	 * Some odd devices respond the Endpoint descriptor items are less
+	 * then the bNumEndpoints in Interface descriptor, so fix it here.
+	 */
+	for (ifno = 0; ifno < dev->config.no_of_if; ifno++) {
+		if_desc = &dev->config.if_desc[ifno];
+		if (if_desc->desc.bNumEndpoints != if_desc->no_of_ep) {
+			printf("WARN: interface %d has %d endpoint descriptor, "
+			       "different from the interface descriptor's value: %d\n",
+			       ifno, if_desc->no_of_ep, if_desc->desc.bNumEndpoints);
+			if_desc->desc.bNumEndpoints = if_desc->no_of_ep;
+		}
+	}
 	return 0;
 }
 

commit 0b32e3f1c85169f562dbc35d9fd2dbc2ce578689
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Aug 17 11:42:38 2021 +0800

    spl: fit: fix change the board_fit_image_post_process()
    
    board_fit_image_post_process() adds parameter spec.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I74d597f9aa357d6dbd7a8449fc37db2bed870d58

diff --git a/common/spl/spl_fit_tb_arm_v7.S b/common/spl/spl_fit_tb_arm_v7.S
index aea84e6aa4..1fce00b5f3 100644
--- a/common/spl/spl_fit_tb_arm_v7.S
+++ b/common/spl/spl_fit_tb_arm_v7.S
@@ -20,7 +20,7 @@
 	.fpu softvfp
 	.type	spl_fit_get_image_name.isra.0, %function
 spl_fit_get_image_name.isra.0:
-.LFB221:
+.LFB223:
 	.file 1 "common/spl/spl_fit_tb_arm_v7.c"
 	.loc 1 37 0
 	.cfi_startproc
@@ -165,7 +165,7 @@ spl_fit_get_image_name.isra.0:
 	.word	.LC5
 	.word	.LC6
 	.cfi_endproc
-.LFE221:
+.LFE223:
 	.size	spl_fit_get_image_name.isra.0, .-spl_fit_get_image_name.isra.0
 	.section	.text.spl_fit_get_image_node,"ax",%progbits
 	.align	1
@@ -175,7 +175,7 @@ spl_fit_get_image_name.isra.0:
 	.fpu softvfp
 	.type	spl_fit_get_image_node, %function
 spl_fit_get_image_node:
-.LFB207:
+.LFB209:
 	.loc 1 93 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
@@ -222,7 +222,7 @@ spl_fit_get_image_node:
 	@ sp needed
 	pop	{r4, r5, pc}
 	.cfi_endproc
-.LFE207:
+.LFE209:
 	.size	spl_fit_get_image_node, .-spl_fit_get_image_node
 	.global	__aeabi_idivmod
 	.global	__aeabi_idiv
@@ -234,7 +234,7 @@ spl_fit_get_image_node:
 	.fpu softvfp
 	.type	spl_load_fit_image, %function
 spl_load_fit_image:
-.LFB211:
+.LFB213:
 	.loc 1 171 0
 	.cfi_startproc
 	@ args = 8, pretend = 0, frame = 48
@@ -509,6 +509,7 @@ spl_load_fit_image:
 	str	r3, [sp]
 	mov	r0, r5
 	add	r3, sp, #48
+	str	r10, [sp, #4]
 	bl	board_fit_image_post_process
 .LVL73:
 	.loc 1 287 0
@@ -647,7 +648,7 @@ spl_load_fit_image:
 	.word	.LC10
 	.word	.LC7
 	.cfi_endproc
-.LFE211:
+.LFE213:
 	.size	spl_load_fit_image, .-spl_load_fit_image
 	.section	.text.spl_fit_append_fdt,"ax",%progbits
 	.align	1
@@ -657,7 +658,7 @@ spl_load_fit_image:
 	.fpu softvfp
 	.type	spl_fit_append_fdt, %function
 spl_fit_append_fdt:
-.LFB212:
+.LFB214:
 	.loc 1 316 0
 	.cfi_startproc
 	@ args = 8, pretend = 0, frame = 48
@@ -735,7 +736,7 @@ spl_fit_append_fdt:
 .L68:
 	.word	.LC0
 	.cfi_endproc
-.LFE212:
+.LFE214:
 	.size	spl_fit_append_fdt, .-spl_fit_append_fdt
 	.section	.text.spl_fit_load_blob,"ax",%progbits
 	.align	1
@@ -745,7 +746,7 @@ spl_fit_append_fdt:
 	.fpu softvfp
 	.type	spl_fit_load_blob, %function
 spl_fit_load_blob:
-.LFB216:
+.LFB218:
 	.loc 1 388 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
@@ -818,9 +819,9 @@ spl_fit_load_blob:
 .L74:
 	.align	2
 .L73:
-	.word	4194241
+	.word	6291393
 	.cfi_endproc
-.LFE216:
+.LFE218:
 	.size	spl_fit_load_blob, .-spl_fit_load_blob
 	.section	.text.fit_config_verify,"ax",%progbits
 	.align	1
@@ -831,7 +832,7 @@ spl_fit_load_blob:
 	.fpu softvfp
 	.type	fit_config_verify, %function
 fit_config_verify:
-.LFB205:
+.LFB207:
 	.loc 1 21 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
@@ -843,7 +844,7 @@ fit_config_verify:
 .LVL118:
 	bx	lr
 	.cfi_endproc
-.LFE205:
+.LFE207:
 	.size	fit_config_verify, .-fit_config_verify
 	.section	.text.spl_fit_standalone_release,"ax",%progbits
 	.align	1
@@ -854,7 +855,7 @@ fit_config_verify:
 	.fpu softvfp
 	.type	spl_fit_standalone_release, %function
 spl_fit_standalone_release:
-.LFB215:
+.LFB217:
 	.loc 1 381 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
@@ -866,7 +867,7 @@ spl_fit_standalone_release:
 .LVL120:
 	bx	lr
 	.cfi_endproc
-.LFE215:
+.LFE217:
 	.size	spl_fit_standalone_release, .-spl_fit_standalone_release
 	.section	.text.spl_kernel_partition,"ax",%progbits
 	.align	1
@@ -877,7 +878,7 @@ spl_fit_standalone_release:
 	.fpu softvfp
 	.type	spl_kernel_partition, %function
 spl_kernel_partition:
-.LFB217:
+.LFB219:
 	.loc 1 437 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
@@ -893,7 +894,7 @@ spl_kernel_partition:
 .L78:
 	.word	.LC13
 	.cfi_endproc
-.LFE217:
+.LFE219:
 	.size	spl_kernel_partition, .-spl_kernel_partition
 	.section	.text.spl_load_simple_fit,"ax",%progbits
 	.align	1
@@ -904,7 +905,7 @@ spl_kernel_partition:
 	.fpu softvfp
 	.type	spl_load_simple_fit, %function
 spl_load_simple_fit:
-.LFB220:
+.LFB222:
 	.loc 1 760 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 248
@@ -1597,7 +1598,7 @@ spl_load_simple_fit:
 .LBE92:
 .LBE100:
 	.cfi_endproc
-.LFE220:
+.LFE222:
 	.size	spl_load_simple_fit, .-spl_load_simple_fit
 	.section	.rodata
 	.align	2
@@ -1606,11 +1607,11 @@ spl_load_simple_fit:
 	.word	.LC0
 	.word	.LC1
 	.word	.LC2
-	.section	.rodata.__func__.8780,"a",%progbits
+	.section	.rodata.__func__.8795,"a",%progbits
 	.set	.LANCHOR0,. + 0
-	.type	__func__.8780, %object
-	.size	__func__.8780, 20
-__func__.8780:
+	.type	__func__.8795, %object
+	.size	__func__.8795, 20
+__func__.8795:
 	.ascii	"spl_load_kernel_fit\000"
 	.section	.rodata.spl_fit_get_image_name.isra.0.str1.1,"aMS",%progbits,1
 .LC4:
@@ -1700,7 +1701,7 @@ __func__.8780:
 	.file 29 "include/stdio.h"
 	.section	.debug_info,"",%progbits
 .Ldebug_info0:
-	.4byte	0x2836
+	.4byte	0x283d
 	.2byte	0x4
 	.4byte	.Ldebug_abbrev0
 	.byte	0x4
@@ -2212,54 +2213,54 @@ __func__.8780:
 	.4byte	.LASF76
 	.byte	0x9c
 	.byte	0xc
-	.byte	0x39
+	.byte	0x3c
 	.4byte	0x48c
 	.uleb128 0x15
 	.4byte	.LASF77
 	.byte	0xc
-	.byte	0x3a
+	.byte	0x3d
 	.4byte	0x1c4
 	.byte	0
 	.uleb128 0x15
 	.4byte	.LASF78
 	.byte	0xc
-	.byte	0x3b
+	.byte	0x3e
 	.4byte	0x1c4
 	.byte	0x4
 	.uleb128 0x15
 	.4byte	.LASF65
 	.byte	0xc
-	.byte	0x3c
+	.byte	0x3f
 	.4byte	0x122
 	.byte	0x8
 	.uleb128 0x15
 	.4byte	.LASF74
 	.byte	0xc
-	.byte	0x3d
+	.byte	0x40
 	.4byte	0x48c
 	.byte	0xc
 	.uleb128 0x15
 	.4byte	.LASF62
 	.byte	0xc
-	.byte	0x3e
+	.byte	0x41
 	.4byte	0x48c
 	.byte	0x2c
 	.uleb128 0x15
 	.4byte	.LASF79
 	.byte	0xc
-	.byte	0x3f
+	.byte	0x42
 	.4byte	0x50
 	.byte	0x4c
 	.uleb128 0x15
 	.4byte	.LASF80
 	.byte	0xc
-	.byte	0x41
+	.byte	0x44
 	.4byte	0x49c
 	.byte	0x50
 	.uleb128 0x15
 	.4byte	.LASF81
 	.byte	0xc
-	.byte	0x44
+	.byte	0x47
 	.4byte	0x49c
 	.byte	0x75
 	.byte	0
@@ -2280,7 +2281,7 @@ __func__.8780:
 	.uleb128 0x2
 	.4byte	.LASF82
 	.byte	0xc
-	.byte	0x49
+	.byte	0x4c
 	.4byte	0x41f
 	.uleb128 0xc
 	.4byte	0x400
@@ -2292,7 +2293,7 @@ __func__.8780:
 	.uleb128 0x4
 	.4byte	.LASF73
 	.byte	0xc
-	.byte	0xce
+	.byte	0xd1
 	.4byte	0x4c2
 	.uleb128 0x8
 	.byte	0x4
@@ -3866,8 +3867,8 @@ __func__.8780:
 	.byte	0x1
 	.2byte	0x2f6
 	.4byte	0x50
-	.4byte	.LFB220
-	.4byte	.LFE220-.LFB220
+	.4byte	.LFB222
+	.4byte	.LFE222-.LFB222
 	.uleb128 0x1
 	.byte	0x9c
 	.4byte	0x1984
@@ -3982,7 +3983,7 @@ __func__.8780:
 	.4byte	.LLST78
 	.uleb128 0x37
 	.4byte	.LVL163
-	.4byte	0x26e6
+	.4byte	0x26ed
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -4030,7 +4031,7 @@ __func__.8780:
 	.4byte	.LLST81
 	.uleb128 0x37
 	.4byte	.LVL169
-	.4byte	0x26e6
+	.4byte	0x26ed
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -4089,7 +4090,7 @@ __func__.8780:
 	.4byte	.LLST87
 	.uleb128 0x3c
 	.4byte	.LVL176
-	.4byte	0x258c
+	.4byte	0x2593
 	.4byte	0x140a
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4118,7 +4119,7 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL178
-	.4byte	0x238c
+	.4byte	0x2393
 	.4byte	0x1433
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4147,7 +4148,7 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL181
-	.4byte	0x26f2
+	.4byte	0x26f9
 	.4byte	0x145b
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4175,7 +4176,7 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL182
-	.4byte	0x26f2
+	.4byte	0x26f9
 	.4byte	0x1483
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4203,7 +4204,7 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x37
 	.4byte	.LVL183
-	.4byte	0x26fe
+	.4byte	0x2705
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -4260,7 +4261,7 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL165
-	.4byte	0x238c
+	.4byte	0x2393
 	.4byte	0x14f1
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4365,7 +4366,7 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x3d
 	.4byte	.LVL131
-	.4byte	0x2709
+	.4byte	0x2710
 	.uleb128 0x3c
 	.4byte	.LVL135
 	.4byte	0x1b94
@@ -4399,7 +4400,7 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL136
-	.4byte	0x2714
+	.4byte	0x271b
 	.4byte	0x159f
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4416,10 +4417,10 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x3d
 	.4byte	.LVL137
-	.4byte	0x2720
+	.4byte	0x2727
 	.uleb128 0x3c
 	.4byte	.LVL138
-	.4byte	0x272c
+	.4byte	0x2733
 	.4byte	0x15c1
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4435,7 +4436,7 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL142
-	.4byte	0x24e2
+	.4byte	0x24e9
 	.4byte	0x15d5
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4446,7 +4447,7 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL144
-	.4byte	0x2709
+	.4byte	0x2710
 	.4byte	0x15f2
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4463,7 +4464,7 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL145
-	.4byte	0x2709
+	.4byte	0x2710
 	.4byte	0x1609
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4474,7 +4475,7 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL146
-	.4byte	0x238c
+	.4byte	0x2393
 	.4byte	0x1632
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4544,7 +4545,7 @@ __func__.8780:
 	.4byte	0x1c89
 	.uleb128 0x3c
 	.4byte	.LVL152
-	.4byte	0x2709
+	.4byte	0x2710
 	.4byte	0x1683
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4555,7 +4556,7 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL153
-	.4byte	0x238c
+	.4byte	0x2393
 	.4byte	0x16ab
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4583,7 +4584,7 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL155
-	.4byte	0x238c
+	.4byte	0x2393
 	.4byte	0x16d3
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4712,7 +4713,7 @@ __func__.8780:
 	.sleb128 -232
 	.uleb128 0x3e
 	.4byte	0x1a97
-	.4byte	0x26d3
+	.4byte	0x26da
 	.4byte	.LLST91
 	.uleb128 0x34
 	.4byte	0x1aa3
@@ -4769,7 +4770,7 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL193
-	.4byte	0x2738
+	.4byte	0x273f
 	.4byte	0x1808
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4780,7 +4781,7 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x3d
 	.4byte	.LVL194
-	.4byte	0x2709
+	.4byte	0x2710
 	.uleb128 0x3f
 	.4byte	.LVL199
 	.uleb128 0x2
@@ -4842,7 +4843,7 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL204
-	.4byte	0x272c
+	.4byte	0x2733
 	.4byte	0x1875
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4858,7 +4859,7 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL206
-	.4byte	0x2709
+	.4byte	0x2710
 	.4byte	0x188c
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4869,7 +4870,7 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL209
-	.4byte	0x24e2
+	.4byte	0x24e9
 	.4byte	0x18a0
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4880,7 +4881,7 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL212
-	.4byte	0x2709
+	.4byte	0x2710
 	.4byte	0x18bf
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4898,7 +4899,7 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL215
-	.4byte	0x2709
+	.4byte	0x2710
 	.4byte	0x18d6
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4909,7 +4910,7 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL216
-	.4byte	0x2714
+	.4byte	0x271b
 	.4byte	0x18f3
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4926,7 +4927,7 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL219
-	.4byte	0x238c
+	.4byte	0x2393
 	.4byte	0x191a
 	.uleb128 0x38
 	.uleb128 0x1
@@ -4985,7 +4986,7 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL223
-	.4byte	0x2743
+	.4byte	0x274a
 	.4byte	0x195f
 	.uleb128 0x38
 	.uleb128 0x1
@@ -5002,7 +5003,7 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x37
 	.4byte	.LVL227
-	.4byte	0x2743
+	.4byte	0x274a
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -5224,8 +5225,8 @@ __func__.8780:
 	.byte	0x1
 	.2byte	0x1b3
 	.4byte	0xd7
-	.4byte	.LFB217
-	.4byte	.LFE217-.LFB217
+	.4byte	.LFB219
+	.4byte	.LFE219-.LFB219
 	.uleb128 0x1
 	.byte	0x9c
 	.4byte	0x1b94
@@ -5248,8 +5249,8 @@ __func__.8780:
 	.byte	0x1
 	.2byte	0x181
 	.4byte	0x153
-	.4byte	.LFB216
-	.4byte	.LFE216-.LFB216
+	.4byte	.LFB218
+	.4byte	.LFE218-.LFB218
 	.uleb128 0x1
 	.byte	0x9c
 	.4byte	0x1c83
@@ -5307,20 +5308,20 @@ __func__.8780:
 	.4byte	0x153
 	.4byte	.LLST53
 	.uleb128 0x36
-	.4byte	0x230c
+	.4byte	0x2313
 	.4byte	.LBB61
 	.4byte	.LBE61-.LBB61
 	.byte	0x1
 	.2byte	0x1a7
 	.4byte	0x1c67
 	.uleb128 0x31
-	.4byte	0x2332
+	.4byte	0x2339
 	.4byte	.LLST54
 	.uleb128 0x31
-	.4byte	0x2327
+	.4byte	0x232e
 	.4byte	.LLST55
 	.uleb128 0x31
-	.4byte	0x231c
+	.4byte	0x2323
 	.4byte	.LLST56
 	.byte	0
 	.uleb128 0x4b
@@ -5356,8 +5357,8 @@ __func__.8780:
 	.byte	0x1
 	.2byte	0x17c
 	.4byte	0x50
-	.4byte	.LFB215
-	.4byte	.LFE215-.LFB215
+	.4byte	.LFB217
+	.4byte	.LFE217-.LFB217
 	.uleb128 0x1
 	.byte	0x9c
 	.4byte	0x1cb4
@@ -5444,8 +5445,8 @@ __func__.8780:
 	.byte	0x1
 	.2byte	0x139
 	.4byte	0x50
-	.4byte	.LFB212
-	.4byte	.LFE212-.LFB212
+	.4byte	.LFB214
+	.4byte	.LFE214-.LFB214
 	.uleb128 0x1
 	.byte	0x9c
 	.4byte	0x1e78
@@ -5510,7 +5511,7 @@ __func__.8780:
 	.4byte	0x1e88
 	.uleb128 0x3c
 	.4byte	.LVL98
-	.4byte	0x238c
+	.4byte	0x2393
 	.4byte	0x1e37
 	.uleb128 0x38
 	.uleb128 0x1
@@ -5576,7 +5577,7 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x37
 	.4byte	.LVL102
-	.4byte	0x274e
+	.4byte	0x2755
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
@@ -5599,11 +5600,11 @@ __func__.8780:
 	.byte	0x1
 	.byte	0xa8
 	.4byte	0x50
-	.4byte	.LFB211
-	.4byte	.LFE211-.LFB211
+	.4byte	.LFB213
+	.4byte	.LFE213-.LFB213
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x230c
+	.4byte	0x2313
 	.uleb128 0x51
 	.4byte	.LASF327
 	.byte	0x1
@@ -5762,69 +5763,69 @@ __func__.8780:
 	.2byte	0x12f
 	.4byte	.LDL1
 	.uleb128 0x59
-	.4byte	0x233e
+	.4byte	0x2345
 	.4byte	.LBB35
 	.4byte	.Ldebug_ranges0+0
 	.byte	0x1
 	.byte	0xe8
 	.4byte	0x201b
 	.uleb128 0x31
-	.4byte	0x2359
+	.4byte	0x2360
 	.4byte	.LLST26
 	.uleb128 0x31
-	.4byte	0x234e
+	.4byte	0x2355
 	.4byte	.LLST27
 	.byte	0
 	.uleb128 0x5a
-	.4byte	0x230c
+	.4byte	0x2313
 	.4byte	.LBB40
 	.4byte	.LBE40-.LBB40
 	.byte	0x1
 	.byte	0xe9
 	.4byte	0x204a
 	.uleb128 0x31
-	.4byte	0x2332
+	.4byte	0x2339
 	.4byte	.LLST28
 	.uleb128 0x31
-	.4byte	0x2327
+	.4byte	0x232e
 	.4byte	.LLST29
 	.uleb128 0x31
-	.4byte	0x231c
+	.4byte	0x2323
 	.4byte	.LLST30
 	.byte	0
 	.uleb128 0x59
-	.4byte	0x2365
+	.4byte	0x236c
 	.4byte	.LBB42
 	.4byte	.Ldebug_ranges0+0x20
 	.byte	0x1
 	.byte	0xf2
 	.4byte	0x2070
 	.uleb128 0x31
-	.4byte	0x2380
+	.4byte	0x2387
 	.4byte	.LLST31
 	.uleb128 0x31
-	.4byte	0x2375
+	.4byte	0x237c
 	.4byte	.LLST32
 	.byte	0
 	.uleb128 0x30
-	.4byte	0x2518
+	.4byte	0x251f
 	.4byte	.LBB45
 	.4byte	.Ldebug_ranges0+0x38
 	.byte	0x1
 	.2byte	0x10b
 	.4byte	0x20bb
 	.uleb128 0x31
-	.4byte	0x2541
+	.4byte	0x2548
 	.4byte	.LLST33
 	.uleb128 0x31
-	.4byte	0x2535
+	.4byte	0x253c
 	.4byte	.LLST34
 	.uleb128 0x31
-	.4byte	0x2529
+	.4byte	0x2530
 	.4byte	.LLST35
 	.uleb128 0x37
 	.4byte	.LVL68
-	.4byte	0x2759
+	.4byte	0x2760
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -5845,28 +5846,28 @@ __func__.8780:
 	.byte	0
 	.byte	0
 	.uleb128 0x36
-	.4byte	0x2518
+	.4byte	0x251f
 	.4byte	.LBB53
 	.4byte	.LBE53-.LBB53
 	.byte	0x1
 	.2byte	0x110
 	.4byte	0x20f4
 	.uleb128 0x31
-	.4byte	0x2541
+	.4byte	0x2548
 	.4byte	.LLST36
 	.uleb128 0x31
-	.4byte	0x2535
+	.4byte	0x253c
 	.4byte	.LLST37
 	.uleb128 0x31
-	.4byte	0x2529
+	.4byte	0x2530
 	.4byte	.LLST38
 	.uleb128 0x3d
 	.4byte	.LVL85
-	.4byte	0x2759
+	.4byte	0x2760
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL45
-	.4byte	0x2765
+	.4byte	0x276c
 	.4byte	0x2114
 	.uleb128 0x38
 	.uleb128 0x1
@@ -5889,7 +5890,7 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL46
-	.4byte	0x2771
+	.4byte	0x2778
 	.4byte	0x2134
 	.uleb128 0x38
 	.uleb128 0x1
@@ -5912,7 +5913,7 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL47
-	.4byte	0x277d
+	.4byte	0x2784
 	.4byte	0x2154
 	.uleb128 0x38
 	.uleb128 0x1
@@ -5935,7 +5936,7 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL48
-	.4byte	0x2789
+	.4byte	0x2790
 	.4byte	0x2174
 	.uleb128 0x38
 	.uleb128 0x1
@@ -5958,7 +5959,7 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL49
-	.4byte	0x2795
+	.4byte	0x279c
 	.4byte	0x2194
 	.uleb128 0x38
 	.uleb128 0x1
@@ -5981,7 +5982,7 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL51
-	.4byte	0x27a1
+	.4byte	0x27a8
 	.4byte	0x21b4
 	.uleb128 0x38
 	.uleb128 0x1
@@ -6004,7 +6005,7 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL54
-	.4byte	0x27ad
+	.4byte	0x27b4
 	.4byte	0x21c8
 	.uleb128 0x38
 	.uleb128 0x1
@@ -6038,7 +6039,7 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL70
-	.4byte	0x26f2
+	.4byte	0x26f9
 	.4byte	0x220e
 	.uleb128 0x38
 	.uleb128 0x1
@@ -6066,7 +6067,7 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL71
-	.4byte	0x2709
+	.4byte	0x2710
 	.4byte	0x2231
 	.uleb128 0x38
 	.uleb128 0x1
@@ -6089,7 +6090,7 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL72
-	.4byte	0x27b9
+	.4byte	0x27c0
 	.4byte	0x224b
 	.uleb128 0x38
 	.uleb128 0x1
@@ -6106,8 +6107,8 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL73
-	.4byte	0x27c5
-	.4byte	0x2278
+	.4byte	0x27cc
+	.4byte	0x227f
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6139,11 +6140,18 @@ __func__.8780:
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -56
+	.uleb128 0x38
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 4
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL74
-	.4byte	0x27d1
-	.4byte	0x228f
+	.4byte	0x27d8
+	.4byte	0x2296
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6153,11 +6161,11 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x3d
 	.4byte	.LVL75
-	.4byte	0x27dc
+	.4byte	0x27e3
 	.uleb128 0x3c
 	.4byte	.LVL76
-	.4byte	0x27e8
-	.4byte	0x22bb
+	.4byte	0x27ef
+	.4byte	0x22c2
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6179,8 +6187,8 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL86
-	.4byte	0x2709
-	.4byte	0x22d2
+	.4byte	0x2710
+	.4byte	0x22d9
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6190,8 +6198,8 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL90
-	.4byte	0x27f4
-	.4byte	0x22f8
+	.4byte	0x27fb
+	.4byte	0x22ff
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6219,7 +6227,7 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x37
 	.4byte	.LVL91
-	.4byte	0x27d1
+	.4byte	0x27d8
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6234,7 +6242,7 @@ __func__.8780:
 	.byte	0x8c
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x233e
+	.4byte	0x2345
 	.uleb128 0x5d
 	.4byte	.LASF327
 	.byte	0x1
@@ -6257,7 +6265,7 @@ __func__.8780:
 	.byte	0x7e
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x2365
+	.4byte	0x236c
 	.uleb128 0x5d
 	.4byte	.LASF327
 	.byte	0x1
@@ -6275,7 +6283,7 @@ __func__.8780:
 	.byte	0x71
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x238c
+	.4byte	0x2393
 	.uleb128 0x5d
 	.4byte	.LASF327
 	.byte	0x1
@@ -6292,11 +6300,11 @@ __func__.8780:
 	.byte	0x1
 	.byte	0x5b
 	.4byte	0x50
-	.4byte	.LFB207
-	.4byte	.LFE207-.LFB207
+	.4byte	.LFB209
+	.4byte	.LFE209-.LFB209
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2454
+	.4byte	0x245b
 	.uleb128 0x52
 	.ascii	"fit\000"
 	.byte	0x1
@@ -6343,8 +6351,8 @@ __func__.8780:
 	.4byte	.LLST14
 	.uleb128 0x3c
 	.4byte	.LVL34
-	.4byte	0x258c
-	.4byte	0x243d
+	.4byte	0x2593
+	.4byte	0x2444
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6372,14 +6380,14 @@ __func__.8780:
 	.byte	0x91
 	.sleb128 -20
 	.uleb128 0x60
-	.4byte	0x246f
+	.4byte	0x2476
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
 	.byte	0
 	.uleb128 0x37
 	.4byte	.LVL36
-	.4byte	0x2800
+	.4byte	0x2807
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6400,7 +6408,7 @@ __func__.8780:
 	.byte	0x25
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x24dc
+	.4byte	0x24e3
 	.uleb128 0x61
 	.ascii	"fit\000"
 	.byte	0x1
@@ -6425,7 +6433,7 @@ __func__.8780:
 	.4byte	.LASF372
 	.byte	0x1
 	.byte	0x27
-	.4byte	0x24dc
+	.4byte	0x24e3
 	.uleb128 0x55
 	.4byte	.LASF74
 	.byte	0x1
@@ -6465,11 +6473,11 @@ __func__.8780:
 	.byte	0x1
 	.byte	0x14
 	.4byte	0x50
-	.4byte	.LFB205
-	.4byte	.LFE205-.LFB205
+	.4byte	.LFB207
+	.4byte	.LFE207-.LFB207
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2518
+	.4byte	0x251f
 	.uleb128 0x52
 	.ascii	"fit\000"
 	.byte	0x1
@@ -6490,7 +6498,7 @@ __func__.8780:
 	.2byte	0x3ea
 	.4byte	0xd7
 	.byte	0x3
-	.4byte	0x254e
+	.4byte	0x2555
 	.uleb128 0x42
 	.4byte	.LASF376
 	.byte	0x2
@@ -6513,12 +6521,12 @@ __func__.8780:
 	.2byte	0x2e0
 	.4byte	0x13d
 	.byte	0x3
-	.4byte	0x256c
+	.4byte	0x2573
 	.uleb128 0x4c
 	.ascii	"hdr\000"
 	.byte	0x2
 	.2byte	0x2e0
-	.4byte	0x256c
+	.4byte	0x2573
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
@@ -6529,7 +6537,7 @@ __func__.8780:
 	.byte	0x70
 	.4byte	0x70
 	.byte	0x3
-	.4byte	0x258c
+	.4byte	0x2593
 	.uleb128 0x61
 	.ascii	"x\000"
 	.byte	0x1a
@@ -6537,54 +6545,54 @@ __func__.8780:
 	.4byte	0x70
 	.byte	0
 	.uleb128 0x65
-	.4byte	0x2454
-	.4byte	.LFB221
-	.4byte	.LFE221-.LFB221
+	.4byte	0x245b
+	.4byte	.LFB223
+	.4byte	.LFE223-.LFB223
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x26d3
+	.4byte	0x26da
 	.uleb128 0x31
-	.4byte	0x2464
+	.4byte	0x246b
 	.4byte	.LLST0
 	.uleb128 0x31
-	.4byte	0x247a
+	.4byte	0x2481
 	.4byte	.LLST1
 	.uleb128 0x31
-	.4byte	0x2485
+	.4byte	0x248c
 	.4byte	.LLST2
 	.uleb128 0x31
-	.4byte	0x2490
+	.4byte	0x2497
 	.4byte	.LLST3
 	.uleb128 0x66
-	.4byte	0x246f
+	.4byte	0x2476
 	.uleb128 0x6
 	.byte	0xfa
-	.4byte	0x246f
+	.4byte	0x2476
 	.byte	0x9f
 	.uleb128 0x34
-	.4byte	0x249b
+	.4byte	0x24a2
 	.4byte	.LLST4
 	.uleb128 0x34
-	.4byte	0x24a6
+	.4byte	0x24ad
 	.4byte	.LLST5
 	.uleb128 0x34
-	.4byte	0x24b1
+	.4byte	0x24b8
 	.4byte	.LLST6
 	.uleb128 0x34
-	.4byte	0x24bc
+	.4byte	0x24c3
 	.4byte	.LLST7
 	.uleb128 0x33
-	.4byte	0x24c7
+	.4byte	0x24ce
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -28
 	.uleb128 0x34
-	.4byte	0x24d2
+	.4byte	0x24d9
 	.4byte	.LLST8
 	.uleb128 0x3c
 	.4byte	.LVL1
-	.4byte	0x280c
-	.4byte	0x2618
+	.4byte	0x2813
+	.4byte	0x261f
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6594,8 +6602,8 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL5
-	.4byte	0x2709
-	.4byte	0x262f
+	.4byte	0x2710
+	.4byte	0x2636
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6605,8 +6613,8 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL6
-	.4byte	0x2818
-	.4byte	0x2649
+	.4byte	0x281f
+	.4byte	0x2650
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6622,8 +6630,8 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL11
-	.4byte	0x26f2
-	.4byte	0x266f
+	.4byte	0x26f9
+	.4byte	0x2676
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6651,8 +6659,8 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL13
-	.4byte	0x2709
-	.4byte	0x2683
+	.4byte	0x2710
+	.4byte	0x268a
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6662,8 +6670,8 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL14
-	.4byte	0x2823
-	.4byte	0x269d
+	.4byte	0x282a
+	.4byte	0x26a4
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6679,8 +6687,8 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x3c
 	.4byte	.LVL18
-	.4byte	0x26f2
-	.4byte	0x26c3
+	.4byte	0x26f9
+	.4byte	0x26ca
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
@@ -6708,7 +6716,7 @@ __func__.8780:
 	.byte	0
 	.uleb128 0x37
 	.4byte	.LVL23
-	.4byte	0x282e
+	.4byte	0x2835
 	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
@@ -6718,7 +6726,7 @@ __func__.8780:
 	.byte	0
 	.uleb128 0xc
 	.4byte	0xdd
-	.4byte	0x26e6
+	.4byte	0x26ed
 	.uleb128 0x67
 	.4byte	0xcb
 	.4byte	0x197a
@@ -6737,7 +6745,7 @@ __func__.8780:
 	.4byte	.LASF381
 	.4byte	.LASF381
 	.byte	0x1c
-	.byte	0x98
+	.byte	0xaa
 	.uleb128 0x69
 	.4byte	.LASF382
 	.4byte	.LASF382
@@ -6762,7 +6770,7 @@ __func__.8780:
 	.4byte	.LASF386
 	.4byte	.LASF386
 	.byte	0xc
-	.byte	0xbd
+	.byte	0xc0
 	.uleb128 0x69
 	.4byte	.LASF387
 	.4byte	.LASF387
@@ -6772,7 +6780,7 @@ __func__.8780:
 	.4byte	.LASF388
 	.4byte	.LASF388
 	.byte	0x1c
-	.byte	0xce
+	.byte	0xe0
 	.uleb128 0x68
 	.4byte	.LASF389
 	.4byte	.LASF389
@@ -6822,7 +6830,7 @@ __func__.8780:
 	.4byte	.LASF398
 	.4byte	.LASF398
 	.byte	0x2
-	.2byte	0x596
+	.2byte	0x598
 	.uleb128 0x69
 	.4byte	.LASF399
 	.4byte	.LASF399
@@ -6837,7 +6845,7 @@ __func__.8780:
 	.4byte	.LASF401
 	.4byte	.LASF401
 	.byte	0x2
-	.2byte	0x59d
+	.2byte	0x59f
 	.uleb128 0x68
 	.4byte	.LASF402
 	.4byte	.LASF402
@@ -6852,7 +6860,7 @@ __func__.8780:
 	.4byte	.LASF404
 	.4byte	.LASF404
 	.byte	0x2
-	.2byte	0x5ab
+	.2byte	0x5ad
 	.uleb128 0x69
 	.4byte	.LASF405
 	.4byte	.LASF405
@@ -8287,7 +8295,7 @@ __func__.8780:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL134
-	.4byte	.LFE220
+	.4byte	.LFE222
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
@@ -8298,7 +8306,7 @@ __func__.8780:
 	.2byte	0x1
 	.byte	0x51
 	.4byte	.LVL128
-	.4byte	.LFE220
+	.4byte	.LFE222
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
@@ -8367,7 +8375,7 @@ __func__.8780:
 	.byte	0x77
 	.sleb128 84
 	.4byte	.LVL230
-	.4byte	.LFE220
+	.4byte	.LFE222
 	.2byte	0x3
 	.byte	0x7d
 	.sleb128 100
@@ -8394,7 +8402,7 @@ __func__.8780:
 	.2byte	0x1
 	.byte	0x52
 	.4byte	.LVL135-1
-	.4byte	.LFE220
+	.4byte	.LFE222
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -8995,7 +9003,7 @@ __func__.8780:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL122
-	.4byte	.LFE217
+	.4byte	.LFE219
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9013,7 +9021,7 @@ __func__.8780:
 	.2byte	0x1
 	.byte	0x54
 	.4byte	.LVL116
-	.4byte	.LFE216
+	.4byte	.LFE218
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9031,7 +9039,7 @@ __func__.8780:
 	.2byte	0x1
 	.byte	0x55
 	.4byte	.LVL116
-	.4byte	.LFE216
+	.4byte	.LFE218
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9045,7 +9053,7 @@ __func__.8780:
 	.2byte	0x1
 	.byte	0x52
 	.4byte	.LVL105
-	.4byte	.LFE216
+	.4byte	.LFE218
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9059,7 +9067,7 @@ __func__.8780:
 	.2byte	0x1
 	.byte	0x53
 	.4byte	.LVL109
-	.4byte	.LFE216
+	.4byte	.LFE218
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9177,7 +9185,7 @@ __func__.8780:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL120
-	.4byte	.LFE215
+	.4byte	.LFE217
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9195,7 +9203,7 @@ __func__.8780:
 	.2byte	0x1
 	.byte	0x54
 	.4byte	.LVL103
-	.4byte	.LFE212
+	.4byte	.LFE214
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9213,7 +9221,7 @@ __func__.8780:
 	.2byte	0x1
 	.byte	0x56
 	.4byte	.LVL103
-	.4byte	.LFE212
+	.4byte	.LFE214
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9231,7 +9239,7 @@ __func__.8780:
 	.2byte	0x1
 	.byte	0x57
 	.4byte	.LVL103
-	.4byte	.LFE212
+	.4byte	.LFE214
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9249,7 +9257,7 @@ __func__.8780:
 	.2byte	0x1
 	.byte	0x55
 	.4byte	.LVL103
-	.4byte	.LFE212
+	.4byte	.LFE214
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9264,7 +9272,7 @@ __func__.8780:
 	.byte	0x91
 	.sleb128 0
 	.4byte	.LVL103
-	.4byte	.LFE212
+	.4byte	.LFE214
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
@@ -9277,7 +9285,7 @@ __func__.8780:
 	.byte	0x91
 	.sleb128 4
 	.4byte	.LVL103
-	.4byte	.LFE212
+	.4byte	.LFE214
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 4
@@ -9308,7 +9316,7 @@ __func__.8780:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL44
-	.4byte	.LFE211
+	.4byte	.LFE213
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
@@ -9319,7 +9327,7 @@ __func__.8780:
 	.2byte	0x1
 	.byte	0x51
 	.4byte	.LVL42
-	.4byte	.LFE211
+	.4byte	.LFE213
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -76
@@ -9347,7 +9355,7 @@ __func__.8780:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL85-1
-	.4byte	.LFE211
+	.4byte	.LFE213
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
@@ -9391,7 +9399,7 @@ __func__.8780:
 	.byte	0x53
 	.byte	0x9f
 	.4byte	.LVL89
-	.4byte	.LFE211
+	.4byte	.LFE213
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
@@ -9403,7 +9411,7 @@ __func__.8780:
 	.byte	0x91
 	.sleb128 0
 	.4byte	.LVL78
-	.4byte	.LFE211
+	.4byte	.LFE213
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 0
@@ -9416,7 +9424,7 @@ __func__.8780:
 	.byte	0x91
 	.sleb128 4
 	.4byte	.LVL78
-	.4byte	.LFE211
+	.4byte	.LFE213
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 4
@@ -9666,7 +9674,7 @@ __func__.8780:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL34-1
-	.4byte	.LFE207
+	.4byte	.LFE209
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
@@ -9677,7 +9685,7 @@ __func__.8780:
 	.2byte	0x1
 	.byte	0x51
 	.4byte	.LVL31
-	.4byte	.LFE207
+	.4byte	.LFE209
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
@@ -9692,7 +9700,7 @@ __func__.8780:
 	.2byte	0x1
 	.byte	0x51
 	.4byte	.LVL34-1
-	.4byte	.LFE207
+	.4byte	.LFE209
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9710,7 +9718,7 @@ __func__.8780:
 	.2byte	0x1
 	.byte	0x52
 	.4byte	.LVL34-1
-	.4byte	.LFE207
+	.4byte	.LFE209
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9738,7 +9746,7 @@ __func__.8780:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL118
-	.4byte	.LFE205
+	.4byte	.LFE207
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9767,7 +9775,7 @@ __func__.8780:
 	.2byte	0x1
 	.byte	0x55
 	.4byte	.LVL19
-	.4byte	.LFE221
+	.4byte	.LFE223
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9792,7 +9800,7 @@ __func__.8780:
 	.byte	0x51
 	.byte	0x9f
 	.4byte	.LVL16
-	.4byte	.LFE221
+	.4byte	.LFE223
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
@@ -9814,7 +9822,7 @@ __func__.8780:
 	.byte	0x52
 	.byte	0x9f
 	.4byte	.LVL16
-	.4byte	.LFE221
+	.4byte	.LFE223
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
@@ -9836,7 +9844,7 @@ __func__.8780:
 	.byte	0x53
 	.byte	0x9f
 	.4byte	.LVL16
-	.4byte	.LFE221
+	.4byte	.LFE223
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
@@ -9863,7 +9871,7 @@ __func__.8780:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL28
-	.4byte	.LFE221
+	.4byte	.LFE223
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
@@ -9884,7 +9892,7 @@ __func__.8780:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL28
-	.4byte	.LFE221
+	.4byte	.LFE223
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
@@ -9958,24 +9966,24 @@ __func__.8780:
 	.byte	0
 	.2byte	0
 	.2byte	0
-	.4byte	.LFB221
-	.4byte	.LFE221-.LFB221
+	.4byte	.LFB223
+	.4byte	.LFE223-.LFB223
+	.4byte	.LFB209
+	.4byte	.LFE209-.LFB209
+	.4byte	.LFB213
+	.4byte	.LFE213-.LFB213
+	.4byte	.LFB214
+	.4byte	.LFE214-.LFB214
+	.4byte	.LFB218
+	.4byte	.LFE218-.LFB218
 	.4byte	.LFB207
 	.4byte	.LFE207-.LFB207
-	.4byte	.LFB211
-	.4byte	.LFE211-.LFB211
-	.4byte	.LFB212
-	.4byte	.LFE212-.LFB212
-	.4byte	.LFB216
-	.4byte	.LFE216-.LFB216
-	.4byte	.LFB205
-	.4byte	.LFE205-.LFB205
-	.4byte	.LFB215
-	.4byte	.LFE215-.LFB215
 	.4byte	.LFB217
 	.4byte	.LFE217-.LFB217
-	.4byte	.LFB220
-	.4byte	.LFE220-.LFB220
+	.4byte	.LFB219
+	.4byte	.LFE219-.LFB219
+	.4byte	.LFB222
+	.4byte	.LFE222-.LFB222
 	.4byte	0
 	.4byte	0
 	.section	.debug_ranges,"",%progbits
@@ -10018,24 +10026,24 @@ __func__.8780:
 	.4byte	.LBE99
 	.4byte	0
 	.4byte	0
-	.4byte	.LFB221
-	.4byte	.LFE221
+	.4byte	.LFB223
+	.4byte	.LFE223
+	.4byte	.LFB209
+	.4byte	.LFE209
+	.4byte	.LFB213
+	.4byte	.LFE213
+	.4byte	.LFB214
+	.4byte	.LFE214
+	.4byte	.LFB218
+	.4byte	.LFE218
 	.4byte	.LFB207
 	.4byte	.LFE207
-	.4byte	.LFB211
-	.4byte	.LFE211
-	.4byte	.LFB212
-	.4byte	.LFE212
-	.4byte	.LFB216
-	.4byte	.LFE216
-	.4byte	.LFB205
-	.4byte	.LFE205
-	.4byte	.LFB215
-	.4byte	.LFE215
 	.4byte	.LFB217
 	.4byte	.LFE217
-	.4byte	.LFB220
-	.4byte	.LFE220
+	.4byte	.LFB219
+	.4byte	.LFE219
+	.4byte	.LFB222
+	.4byte	.LFE222
 	.4byte	0
 	.4byte	0
 	.section	.debug_line,"",%progbits
@@ -10075,8 +10083,6 @@ __func__.8780:
 	.ascii	"__func__\000"
 .LASF37:
 	.ascii	"IF_TYPE_DOC\000"
-.LASF410:
-	.ascii	"/home/zzz/u-boot\000"
 .LASF59:
 	.ascii	"part_type\000"
 .LASF112:
@@ -10173,6 +10179,8 @@ __func__.8780:
 	.ascii	"image_get_magic\000"
 .LASF378:
 	.ascii	"__fswab32\000"
+.LASF410:
+	.ascii	"/home/zzz/code/u-boot\000"
 .LASF302:
 	.ascii	"net_boot_file_size\000"
 .LASF362:

commit a9095dd92e0c89909add26fd11d60b5de5dc3dc8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 12 18:23:58 2021 +0800

    scripts: fit.sh: --burn-key-hash requires CONFIG_SPL_FIT_HW_CRYPTO=y
    
    The key hash is from RSA_N/E/C(NP), while they are assigned in
    SPL DTB when CONFIG_SPL_FIT_HW_CRYPTO=y.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Icf105723f7f23fd818478c1c10b43b801fcbbc67

diff --git a/scripts/fit.sh b/scripts/fit.sh
index a9e00c970f..158659ea3a 100755
--- a/scripts/fit.sh
+++ b/scripts/fit.sh
@@ -268,7 +268,12 @@ function fit_gen_uboot_itb()
 
 		# burn-key-hash
 		if [ "${ARG_BURN_KEY_HASH}" == "y" ]; then
-			fdtput -tx ${SPL_DTB} ${SIGNATURE_KEY_NODE} burn-key-hash 0x1
+			if grep -q '^CONFIG_SPL_FIT_HW_CRYPTO=y' .config ; then
+				fdtput -tx ${SPL_DTB} ${SIGNATURE_KEY_NODE} burn-key-hash 0x1
+			else
+				echo "ERROR: --burn-key-hash requires CONFIG_SPL_FIT_HW_CRYPTO=y"
+				exit 1
+			fi
 		fi
 
 		# rollback-index read back check

commit 98c6643429734de4efbd3acd41a7801fb2ed3502
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Aug 16 18:03:10 2021 +0800

    mtd: nand: rockchip: Fix error in calculating nand block boundary
    
    Change-Id: I48fc0ca731a031f41ee4db739d30c77e1e3ca116
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/raw/rockchip_nand_spl.c b/drivers/mtd/nand/raw/rockchip_nand_spl.c
index 3846416842..127a5d5cf7 100644
--- a/drivers/mtd/nand/raw/rockchip_nand_spl.c
+++ b/drivers/mtd/nand/raw/rockchip_nand_spl.c
@@ -527,13 +527,13 @@ int nand_spl_load_image(u32 offs, u32 size, void *buf)
 		 * Check if we have crossed a block boundary, and if so
 		 * check for bad block.
 		 */
-		if (!(page % nand_page_size)) {
+		if (!(page % nand_page_num)) {
 			/*
 			 * Yes, new block. See if this block is good. If not,
 			 * loop until we find a good block.
 			 */
 			while (is_badblock(page)) {
-				page = page + nand_page_size;
+				page = page + nand_page_num;
 				/* Check i we've reached the end of flash. */
 				if (page >= maxpages)
 					return -EIO;
diff --git a/drivers/mtd/nand/raw/rockchip_nand_spl_v9.c b/drivers/mtd/nand/raw/rockchip_nand_spl_v9.c
index bce03d9106..e4c2b973b3 100644
--- a/drivers/mtd/nand/raw/rockchip_nand_spl_v9.c
+++ b/drivers/mtd/nand/raw/rockchip_nand_spl_v9.c
@@ -526,13 +526,13 @@ int nand_spl_load_image(u32 offs, u32 size, void *buf)
 		 * Check if we have crossed a block boundary, and if so
 		 * check for bad block.
 		 */
-		if (!(page % nand_page_size)) {
+		if (!(page % nand_page_num)) {
 			/*
 			 * Yes, new block. See if this block is good. If not,
 			 * loop until we find a good block.
 			 */
 			while (is_badblock(page)) {
-				page = page + nand_page_size;
+				page = page + nand_page_num;
 				/* Check i we've reached the end of flash. */
 				if (page >= maxpages)
 					return -EIO;

commit 81ad450883499841f254cba7c2213412bc762380
Author: Zorro Liu <lyx@rock-chips.com>
Date:   Fri Aug 6 15:29:45 2021 +0800

    drivers: video: rk_eink: support multi pmics define
    
    dts define as:
    &ebc_dev {
        pmic = <&tps65185 &sy7673a &xxxx>;
        .
        .
        .
    };
    
    Signed-off-by: Zorro Liu <lyx@rock-chips.com>
    Change-Id: I9c3c9188e5c91f3bf61478a6b83a2ab78dd585ba

diff --git a/drivers/video/rk_eink/rk_eink_display.c b/drivers/video/rk_eink/rk_eink_display.c
index a8db27a5cb..ff0e590d39 100644
--- a/drivers/video/rk_eink/rk_eink_display.c
+++ b/drivers/video/rk_eink/rk_eink_display.c
@@ -690,7 +690,9 @@ int rockchip_eink_show_charge_logo(int logo_type)
 
 static int rockchip_eink_display_probe(struct udevice *dev)
 {
-	int ret, vcom;
+	int ret, vcom, size, i;
+	const fdt32_t *list;
+	uint32_t phandle;
 	struct rockchip_eink_display_priv *priv = dev_get_priv(dev);
 
 	/* Before relocation we don't need to do anything */
@@ -705,9 +707,23 @@ static int rockchip_eink_display_probe(struct udevice *dev)
 		return ret;
 	}
 
-	ret = uclass_get_device_by_phandle(UCLASS_I2C_GENERIC, dev,
-					   "pmic",
-					   &priv->ebc_pwr_dev);
+	list = dev_read_prop(dev, "pmic", &size);
+	if (!list) {
+		dev_err(dev, "Cannot get pmic prop\n");
+		return -EINVAL;
+	}
+
+	size /= sizeof(*list);
+	for (i = 0; i < size; i++) {
+		phandle = fdt32_to_cpu(*list++);
+		ret = uclass_get_device_by_phandle_id(UCLASS_I2C_GENERIC,
+						      phandle,
+						      &priv->ebc_pwr_dev);
+		if (!ret) {
+			printf("Eink: use pmic %s\n", priv->ebc_pwr_dev->name);
+			break;
+		}
+	}
 	if (ret) {
 		dev_err(dev, "Cannot get pmic: %d\n", ret);
 		return ret;

commit ebc2877c26c6898fd9f191bd6cefde78a6150a4b
Author: Weiwen Chen <cww@rock-chips.com>
Date:   Fri Aug 13 13:53:45 2021 +0800

    configs: rv1126-spi-nor-tb.config: update CONFIG_SPL_FIT_IMAGE_KB size
    
    Signed-off-by: Weiwen Chen <cww@rock-chips.com>
    Change-Id: I272b8d6869dce3e4ddf4be562d54f3911407e882

diff --git a/configs/rv1126-spi-nor-tb.config b/configs/rv1126-spi-nor-tb.config
index 5b30b46d09..e931ac0fc2 100644
--- a/configs/rv1126-spi-nor-tb.config
+++ b/configs/rv1126-spi-nor-tb.config
@@ -5,7 +5,7 @@ CONFIG_OF_U_BOOT_REMOVE_PROPS=""
 # CONFIG_SPL_CRYPTO_SUPPORT is not set
 # CONFIG_SPL_DM_CRYPTO is not set
 CONFIG_SPL_EFI_PARTITION=y
-CONFIG_SPL_FIT_IMAGE_KB=320
+CONFIG_SPL_FIT_IMAGE_KB=384
 # CONFIG_SPL_HASH_SUPPORT is not set
 CONFIG_SPL_KERNEL_BOOT=y
 CONFIG_SPL_LIBDISK_SUPPORT=y

commit 98c8a00dcbd893276c6d18a88e8e1ad17b089d59
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue Jul 27 20:06:29 2021 +0800

    drivers: rkflash: Add some delay after DMA finish
    
    When internal DMA ready, the last spare data may still in fifo.
    
    Change-Id: Ic5164b74f63f905e4f964fd41839bf42e880e726
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/nandc.c b/drivers/rkflash/nandc.c
index c7b79298ea..6684add619 100644
--- a/drivers/rkflash/nandc.c
+++ b/drivers/rkflash/nandc.c
@@ -14,6 +14,7 @@
 #include "rk_sftl.h"
 
 #define     CPU_DELAY_NS(n)	ndelay(n)
+#define     usleep_range(a, b)	udelay((b))
 
 #define	    NANDC_MASTER_EN
 
@@ -333,11 +334,14 @@ static void nandc_xfer_done(void)
 			do {
 				fl_reg.d32 = nandc_readl(NANDC_V9_FLCTL);
 				stat_reg.d32 = nandc_readl(NANDC_V9_MTRANS_STAT);
+				usleep_range(20, 30);
 			} while (stat_reg.V9.mtrans_cnt < fl_reg.V9.page_num ||
 				 fl_reg.V9.tr_rdy == 0);
+			udelay(5);
 		} else {
 			do {
 				fl_reg.d32 = nandc_readl(NANDC_V9_FLCTL);
+				usleep_range(20, 30);
 			} while (fl_reg.V9.tr_rdy == 0);
 		}
 	} else {
@@ -349,11 +353,13 @@ static void nandc_xfer_done(void)
 			do {
 				fl_reg.d32 = nandc_readl(NANDC_FLCTL);
 				stat_reg.d32 = nandc_readl(NANDC_MTRANS_STAT);
+				usleep_range(20, 30);
 			} while (stat_reg.V6.mtrans_cnt < fl_reg.V6.page_num ||
 				 fl_reg.V6.tr_rdy == 0);
 		} else {
 			do {
 				fl_reg.d32 = nandc_readl(NANDC_FLCTL);
+				usleep_range(20, 30);
 			} while (fl_reg.V6.tr_rdy == 0);
 			}
 		} else {

commit 9bb8411cdd9e1c28e7100beef4ac763178c00f7c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Aug 2 20:51:17 2021 +0800

    rockchip: fit_misc: enable dcompress oneshot IRQ for spi-nand
    
    Use interrupt flag as a sync signal for kernel to poll
    that whether ramdisk decompress is done.
    
    Sync with new API params.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I3acb93b6fce130efc2b459799fe618311b696100

diff --git a/arch/arm/mach-rockchip/fit_misc.c b/arch/arm/mach-rockchip/fit_misc.c
index aa1c591f53..b0e5e9c109 100644
--- a/arch/arm/mach-rockchip/fit_misc.c
+++ b/arch/arm/mach-rockchip/fit_misc.c
@@ -44,10 +44,11 @@ static int fit_image_check_uncomp_hash(const void *fit, int parent_noffset,
 }
 
 static int fit_gunzip_image(void *fit, int node, ulong *load_addr,
-			    ulong **src_addr, size_t *src_len)
+			    ulong **src_addr, size_t *src_len, void *spec)
 {
 #if CONFIG_IS_ENABLED(MISC_DECOMPRESS)
 	const void *prop;
+	u32 flags = 0;
 #endif
 	u64 len = *src_len;
 	int ret;
@@ -60,9 +61,30 @@ static int fit_gunzip_image(void *fit, int node, ulong *load_addr,
 		return 0;
 
 #ifndef CONFIG_SPL_BUILD
-	/* handled late in bootm_decomp_image() */
+	/*
+	 * U-Boot:
+	 *	handled late in bootm_decomp_image()
+	 */
 	if (fit_image_check_type(fit, node, IH_TYPE_KERNEL))
 		return 0;
+#elif defined(CONFIG_SPL_MTD_SUPPORT) && defined(CONFIG_SPL_MISC_DECOMPRESS) && \
+      defined(CONFIG_SPL_KERNEL_BOOT)
+	/*
+	 * SPL Thunder-boot policty on spi-nand:
+	 *	enable and use interrupt status as a sync signal for
+	 *	kernel to poll that whether ramdisk decompress is done.
+	 */
+	struct spl_load_info *info = spec;
+	struct blk_desc *desc;
+
+	if (info && info->dev) {
+		desc = info->dev;
+		if ((desc->if_type == IF_TYPE_MTD) &&
+		    (desc->devnum == BLK_MTD_SPI_NAND) &&
+		    fit_image_check_type(fit, node, IH_TYPE_RAMDISK)) {
+			flags |= DCOMP_FLG_IRQ_ONESHOT;
+		}
+	}
 #endif
 	/*
 	 * For smaller spl size, we don't use misc_decompress_process()
@@ -71,7 +93,7 @@ static int fit_gunzip_image(void *fit, int node, ulong *load_addr,
 #if CONFIG_IS_ENABLED(MISC_DECOMPRESS)
 	ret = misc_decompress_process((ulong)(*load_addr),
 				      (ulong)(*src_addr), (ulong)(*src_len),
-				      DECOM_GZIP, false, &len);
+				      DECOM_GZIP, false, &len, flags);
 #else
 	ret = gunzip((void *)(*load_addr), ALIGN(len, FIT_MAX_SPL_IMAGE_SZ),
 		     (void *)(*src_addr), (void *)(&len));
@@ -106,10 +128,10 @@ static int fit_gunzip_image(void *fit, int node, ulong *load_addr,
 #endif
 
 void board_fit_image_post_process(void *fit, int node, ulong *load_addr,
-				  ulong **src_addr, size_t *src_len)
+				  ulong **src_addr, size_t *src_len, void *spec)
 {
 #if CONFIG_IS_ENABLED(MISC_DECOMPRESS) || CONFIG_IS_ENABLED(GZIP)
-	fit_gunzip_image(fit, node, load_addr, src_addr, src_len);
+	fit_gunzip_image(fit, node, load_addr, src_addr, src_len, spec);
 #endif
 
 #if CONFIG_IS_ENABLED(USING_KERNEL_DTB)

commit 9e67e3ddc7d3d2b80825838d7ad6b7f756cf0c74
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Aug 2 20:50:05 2021 +0800

    common: image/gunzip: sync with new API param
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ie83e281a65af2a141cf67f4ed08d6107a733c27a

diff --git a/common/image-fit.c b/common/image-fit.c
index 2b5bcf414c..2fd4b22719 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -2197,7 +2197,7 @@ int fit_image_load_index(bootm_headers_t *images, ulong addr,
 
 	/* perform any post-processing on the image data */
 	board_fit_image_post_process((void *)fit, noffset,
-				     &load, (ulong **)&buf, &size);
+				     &load, (ulong **)&buf, &size, NULL);
 #endif
 
 	len = (ulong)size;
diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 79c02402db..007071ecb2 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -267,7 +267,7 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 
 #ifdef CONFIG_SPL_FIT_IMAGE_POST_PROCESS
 	board_fit_image_post_process(fit, node, (ulong *)&load_addr,
-				     (ulong **)&src, &length);
+				     (ulong **)&src, &length, info);
 #endif
 	puts("OK\n");
 
diff --git a/include/image.h b/include/image.h
index 8258de42c3..449bd36f0f 100644
--- a/include/image.h
+++ b/include/image.h
@@ -1425,10 +1425,12 @@ int board_fit_config_name_match(const char *name);
  * @load_addr: load address pointer to image(Uncompressed)
  * @src_addr: source address pointer to image(Compressed maybe)
  * @size: pointer to the image size
+ * @spec: special data. SPL: struct spl_load_info info, U-Boot: NULL.
+ *
  * @return no return value (failure should be handled internally)
  */
 void board_fit_image_post_process(void *fit, int node, ulong *load_addr,
-				  ulong **src_addr, size_t *size);
+				  ulong **src_addr, size_t *size, void *spec);
 
 #endif /* CONFIG_SPL_FIT_IMAGE_POST_PROCESS */
 
diff --git a/lib/gunzip.c b/lib/gunzip.c
index b5902a54a4..d310726960 100644
--- a/lib/gunzip.c
+++ b/lib/gunzip.c
@@ -82,7 +82,7 @@ int gunzip(void *dst, int dstlen, unsigned char *src, unsigned long *lenp)
 	int ret;
 
 	ret = misc_decompress_process((ulong)dst, (ulong)src, *lenp,
-				      DECOM_GZIP, true, (u64 *)lenp);
+				      DECOM_GZIP, true, (u64 *)lenp, 0);
 	if (!ret)
 		return 0;
 

commit 2bce72c867415b4a0d75f2222eb048451a7832cf
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Aug 2 20:48:36 2021 +0800

    misc: decompress: add flags function field
    
    That we can assign operation/functions by flags.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I18add94cfa59c6b9f6c759f3176ed9978c92c6eb

diff --git a/drivers/misc/misc_decompress.c b/drivers/misc/misc_decompress.c
index 52d22013b6..95709244b3 100644
--- a/drivers/misc/misc_decompress.c
+++ b/drivers/misc/misc_decompress.c
@@ -77,12 +77,14 @@ static struct udevice *misc_decompress_get_device(u32 capability)
 }
 
 static int misc_decompress_start(struct udevice *dev, unsigned long dst,
-				 unsigned long src, unsigned long src_len)
+				 unsigned long src, unsigned long src_len,
+				 u32 flags)
 {
 	struct decom_param param;
 
 	param.addr_dst = dst;
 	param.addr_src = src;
+	param.flags = flags;
 	if (misc_gzip_parse_header((unsigned char *)src, 0xffff) > 0) {
 		param.mode = DECOM_GZIP;
 	} else {
@@ -180,7 +182,7 @@ int misc_decompress_cleanup(void)
 
 int misc_decompress_process(unsigned long dst, unsigned long src,
 			    unsigned long src_len, u32 cap, bool sync,
-			    u64 *size)
+			    u64 *size, u32 flags)
 {
 	struct udevice *dev;
 	int ret;
@@ -194,7 +196,7 @@ int misc_decompress_process(unsigned long dst, unsigned long src,
 	if (ret)
 		return ret;
 
-	ret = misc_decompress_start(dev, dst, src, src_len);
+	ret = misc_decompress_start(dev, dst, src, src_len, flags);
 	if (ret)
 		return ret;
 
diff --git a/include/misc.h b/include/misc.h
index a3c2c5f945..5586883eb1 100644
--- a/include/misc.h
+++ b/include/misc.h
@@ -153,12 +153,16 @@ struct decom_param {
 	u64 size_src;	/* compressed */
 	u64 size_dst;	/* decompressed, to be filled for output */
 	enum misc_mode mode;
+	u32 flags;
 };
 
+/* function flags for decompress */
+#define DCOMP_FLG_IRQ_ONESHOT	BIT(0)
+
 void misc_decompress_async(u8 comp);
 void misc_decompress_sync(u8 comp);
 int misc_decompress_cleanup(void);
 int misc_decompress_process(unsigned long dst, unsigned long src,
 			    unsigned long src_len, u32 cap, bool sync,
-			    u64 *size);
+			    u64 *size, u32 flags);
 #endif	/* _MISC_H_ */

commit 5313a4d09b47dac4fc2ff1276273e248eb416cc3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Aug 2 20:37:42 2021 +0800

    misc: decompress: clean up some API as private
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I3faffb82e61e9be0a339603e91ddf98a7e24ec29

diff --git a/drivers/misc/misc_decompress.c b/drivers/misc/misc_decompress.c
index 23fc5e2042..52d22013b6 100644
--- a/drivers/misc/misc_decompress.c
+++ b/drivers/misc/misc_decompress.c
@@ -71,13 +71,13 @@ static u32 misc_get_data_size(unsigned long src, unsigned long len, u32 cap)
 	return 0;
 }
 
-struct udevice *misc_decompress_get_device(u32 capability)
+static struct udevice *misc_decompress_get_device(u32 capability)
 {
 	return misc_get_device_by_capability(capability);
 }
 
-int misc_decompress_start(struct udevice *dev, unsigned long dst,
-			  unsigned long src, unsigned long src_len)
+static int misc_decompress_start(struct udevice *dev, unsigned long dst,
+				 unsigned long src, unsigned long src_len)
 {
 	struct decom_param param;
 
@@ -99,12 +99,12 @@ int misc_decompress_start(struct udevice *dev, unsigned long dst,
 	return misc_ioctl(dev, IOCTL_REQ_START, &param);
 }
 
-int misc_decompress_stop(struct udevice *dev)
+static int misc_decompress_stop(struct udevice *dev)
 {
 	return misc_ioctl(dev, IOCTL_REQ_STOP, NULL);
 }
 
-bool misc_decompress_is_complete(struct udevice *dev)
+static bool misc_decompress_is_complete(struct udevice *dev)
 {
 	if (misc_ioctl(dev, IOCTL_REQ_POLL, NULL))
 		return false;
@@ -112,7 +112,7 @@ bool misc_decompress_is_complete(struct udevice *dev)
 		return true;
 }
 
-int misc_decompress_data_size(struct udevice *dev, u64 *size, u32 cap)
+static int misc_decompress_data_size(struct udevice *dev, u64 *size, u32 cap)
 {
 	struct decom_param param;
 	int ret;
diff --git a/include/misc.h b/include/misc.h
index 501148dc56..a3c2c5f945 100644
--- a/include/misc.h
+++ b/include/misc.h
@@ -155,12 +155,6 @@ struct decom_param {
 	enum misc_mode mode;
 };
 
-struct udevice *misc_decompress_get_device(u32 capability);
-int misc_decompress_start(struct udevice *dev, unsigned long src,
-			  unsigned long dst, unsigned long size);
-int misc_decompress_stop(struct udevice *dev);
-bool misc_decompress_is_complete(struct udevice *dev);
-
 void misc_decompress_async(u8 comp);
 void misc_decompress_sync(u8 comp);
 int misc_decompress_cleanup(void);

commit bfdb06edb76ec5075056c4fec02a53a1125fde19
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Thu Aug 12 10:25:43 2021 +0800

    mtd: mtd_blk: Clear DMA_PREPARE tag after transmission
    
    Change-Id: I67c4e374f3a2cadd71b191f47ada93400b0e176e
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index 456616fe12..a66402d02e 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -511,7 +511,7 @@ ulong mtd_dread(struct udevice *udev, lbaint_t start,
 			spi->mode |= SPI_DMA_PREPARE;
 		mtd_read(mtd, off, rwsize, &retlen_nor, dst);
 		if (desc->op_flag == BLK_PRE_RW)
-			spi->mode |= SPI_DMA_PREPARE;
+			spi->mode &= ~SPI_DMA_PREPARE;
 
 		if (retlen_nor == rwsize)
 			return blkcnt;

commit 2bfb6166539c606b37321694bfa3c19b436455a5
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Wed Jun 16 19:35:55 2021 +0800

    video/drm: display: add force mode and default mode support
    
    1.add 720p60 ad default mode when get edid failed
    
    2.add the property at dts to enable some hot plug devices force output:
    
      &route_hdmi {
            status = "okay";
            "force-output";
            force-bus-format = <MEDIA_BUS_FMT_GBR888_1X24>;
    
            force_timing {
                    clock-frequency = <148500000>;
                    hactive = <1920>;
                    vactive = <1080>;
                    ...
            };
        };
    
    signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: Ib7ec7f642bff528aaa910aade0b97f7b52a9610a

diff --git a/drivers/video/drm/dw_hdmi.c b/drivers/video/drm/dw_hdmi.c
index 667a5c1773..2bf4f7b79b 100644
--- a/drivers/video/drm/dw_hdmi.c
+++ b/drivers/video/drm/dw_hdmi.c
@@ -2466,6 +2466,8 @@ int rockchip_dw_hdmi_get_timing(struct display_state *state)
 	hdmi->vic = drm_match_cea_mode(mode);
 
 	printf("mode:%dx%d\n", mode->hdisplay, mode->vdisplay);
+	if (state->force_output)
+		bus_format = state->force_bus_format;
 	conn_state->bus_format = bus_format;
 	hdmi->hdmi_data.enc_in_bus_format = bus_format;
 	hdmi->hdmi_data.enc_out_bus_format = bus_format;
diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index add46a3901..424a11d50c 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -408,40 +408,22 @@ int drm_mode_vrefresh(const struct drm_display_mode *mode)
 	return refresh;
 }
 
-static int display_get_timing_from_dts(struct panel_state *panel_state,
-				       struct drm_display_mode *mode)
+static int display_get_detail_timing(ofnode node, struct drm_display_mode *mode)
 {
-	struct rockchip_panel *panel = panel_state->panel;
-	int phandle;
 	int hactive, vactive, pixelclock;
 	int hfront_porch, hback_porch, hsync_len;
 	int vfront_porch, vback_porch, vsync_len;
 	int val, flags = 0;
-	ofnode timing, native_mode;
-
-	timing = dev_read_subnode(panel->dev, "display-timings");
-	if (!ofnode_valid(timing))
-		return -ENODEV;
-
-	native_mode = ofnode_find_subnode(timing, "timing");
-	if (!ofnode_valid(native_mode)) {
-		phandle = ofnode_read_u32_default(timing, "native-mode", -1);
-		native_mode = np_to_ofnode(of_find_node_by_phandle(phandle));
-		if (!ofnode_valid(native_mode)) {
-			printf("failed to get display timings from DT\n");
-			return -ENXIO;
-		}
-	}
 
 #define FDT_GET_INT(val, name) \
-	val = ofnode_read_s32_default(native_mode, name, -1); \
+	val = ofnode_read_s32_default(node, name, -1); \
 	if (val < 0) { \
 		printf("Can't get %s\n", name); \
 		return -ENXIO; \
 	}
 
 #define FDT_GET_INT_DEFAULT(val, name, default) \
-	val = ofnode_read_s32_default(native_mode, name, default);
+	val = ofnode_read_s32_default(node, name, default);
 
 	FDT_GET_INT(hactive, "hactive");
 	FDT_GET_INT(vactive, "vactive");
@@ -484,6 +466,62 @@ static int display_get_timing_from_dts(struct panel_state *panel_state,
 	return 0;
 }
 
+static int display_get_force_timing_from_dts(ofnode node, struct drm_display_mode *mode)
+{
+	int ret = 0;
+
+	ret = display_get_detail_timing(node, mode);
+
+	if (ret) {
+		mode->clock = 74250;
+		mode->flags = 0x5;
+		mode->hdisplay = 1280;
+		mode->hsync_start = 1390;
+		mode->hsync_end = 1430;
+		mode->htotal = 1650;
+		mode->hskew = 0;
+		mode->vdisplay = 720;
+		mode->vsync_start = 725;
+		mode->vsync_end = 730;
+		mode->vtotal = 750;
+		mode->vrefresh = 60;
+		mode->picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9;
+		mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
+	}
+
+	printf("route node %s force_timing, use %dx%dp%d as default mode\n",
+	       ret ? "undefine" : "define", mode->hdisplay, mode->vdisplay,
+	       mode->vscan);
+
+	return 0;
+}
+
+static int display_get_timing_from_dts(struct panel_state *panel_state,
+				       struct drm_display_mode *mode)
+{
+	struct rockchip_panel *panel = panel_state->panel;
+	int phandle;
+	ofnode timing, native_mode;
+
+	timing = dev_read_subnode(panel->dev, "display-timings");
+	if (!ofnode_valid(timing))
+		return -ENODEV;
+
+	native_mode = ofnode_find_subnode(timing, "timing");
+	if (!ofnode_valid(native_mode)) {
+		phandle = ofnode_read_u32_default(timing, "native-mode", -1);
+		native_mode = np_to_ofnode(of_find_node_by_phandle(phandle));
+		if (!ofnode_valid(native_mode)) {
+			printf("failed to get display timings from DT\n");
+			return -ENXIO;
+		}
+	}
+
+	display_get_detail_timing(native_mode, mode);
+
+	return 0;
+}
+
 /**
  * drm_mode_max_resolution_filter - mark modes out of vop max resolution
  * @edid_data: structure store mode list
@@ -684,6 +722,52 @@ static int display_pre_init(void)
 	return ret;
 }
 
+static int display_use_force_mode(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct drm_display_mode *mode = &conn_state->mode;
+
+	conn_state->bpc = 8;
+	memcpy(mode, &state->force_mode, sizeof(struct drm_display_mode));
+	conn_state->bus_format = state->force_bus_format;
+
+	return 0;
+}
+
+static int display_get_edid_mode(struct display_state *state)
+{
+	int ret = 0;
+	struct connector_state *conn_state = &state->conn_state;
+	struct drm_display_mode *mode = &conn_state->mode;
+	int bpc;
+
+	ret = edid_get_drm_mode(conn_state->edid, ret, mode, &bpc);
+	if (!ret) {
+		conn_state->bpc = bpc;
+		edid_print_info((void *)&conn_state->edid);
+	} else {
+		conn_state->bpc = 8;
+		mode->clock = 74250;
+		mode->flags = 0x5;
+		mode->hdisplay = 1280;
+		mode->hsync_start = 1390;
+		mode->hsync_end = 1430;
+		mode->htotal = 1650;
+		mode->hskew = 0;
+		mode->vdisplay = 720;
+		mode->vsync_start = 725;
+		mode->vsync_end = 730;
+		mode->vtotal = 750;
+		mode->vrefresh = 60;
+		mode->picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9;
+		mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
+
+		printf("error: %s get mode from edid failed, use 720p60 as default mode\n", conn_state->dev->name);
+	}
+
+	return ret;
+}
+
 static int display_init(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
@@ -697,9 +781,7 @@ static int display_init(struct display_state *state)
 	const char *compatible;
 	int ret = 0;
 	static bool __print_once = false;
-#if defined(CONFIG_I2C_EDID)
-	int bpc;
-#endif
+
 	if (!__print_once) {
 		__print_once = true;
 		printf("Rockchip UBOOT DRM driver version: %s\n", DRIVER_VERSION);
@@ -763,8 +845,10 @@ static int display_init(struct display_state *state)
 		if (conn_state->type == DRM_MODE_CONNECTOR_HDMIA)
 			crtc->hdmi_hpd = ret;
 #endif
-		if (!ret)
+		if (!ret && !state->force_output) {
+			printf("%s disconnected\n", conn_state->dev->name);
 			goto deinit;
+		}
 	}
 
 	if (panel_state->panel) {
@@ -774,17 +858,9 @@ static int display_init(struct display_state *state)
 #if defined(CONFIG_I2C_EDID)
 		if (ret < 0 && conn_funcs->get_edid) {
 			rockchip_panel_prepare(panel_state->panel);
-
 			ret = conn_funcs->get_edid(state);
-			if (!ret) {
-				ret = edid_get_drm_mode((void *)&conn_state->edid,
-							sizeof(conn_state->edid),
-							mode, &bpc);
-				if (!ret) {
-					conn_state->bpc = bpc;
-					edid_print_info((void *)&conn_state->edid);
-				}
-			}
+			if (!ret)
+				display_get_edid_mode(state);
 		}
 #endif
 	} else if (conn_state->bridge) {
@@ -792,12 +868,7 @@ static int display_init(struct display_state *state)
 					     conn_state->edid, EDID_SIZE);
 		if (ret > 0) {
 #if defined(CONFIG_I2C_EDID)
-			ret = edid_get_drm_mode(conn_state->edid, ret, mode,
-						&bpc);
-			if (!ret) {
-				conn_state->bpc = bpc;
-				edid_print_info((void *)&conn_state->edid);
-			}
+			display_get_edid_mode(state);
 #endif
 		} else {
 			ret = video_bridge_get_timing(conn_state->bridge->dev);
@@ -807,30 +878,27 @@ static int display_init(struct display_state *state)
 	} else if (conn_funcs->get_edid) {
 		ret = conn_funcs->get_edid(state);
 #if defined(CONFIG_I2C_EDID)
-		if (!ret) {
-			ret = edid_get_drm_mode((void *)&conn_state->edid,
-						sizeof(conn_state->edid), mode,
-						&bpc);
-			if (!ret) {
-				conn_state->bpc = bpc;
-				edid_print_info((void *)&conn_state->edid);
-			}
-		}
+		if (!ret)
+			display_get_edid_mode(state);
 #endif
 	}
 
-	if (ret)
+	if (ret && !state->force_output)
 		goto deinit;
+	if (state->force_output)
+		display_use_force_mode(state);
 
 	/* rk356x series drive mipi pixdata on posedge */
 	compatible = dev_read_string(conn_state->dev, "compatible");
 	if (!strcmp(compatible, "rockchip,rk3568-mipi-dsi"))
 		conn_state->mode.flags |= DRM_MODE_FLAG_PPIXDATA;
 
-	printf("Detailed mode clock %u kHz, flags[%x]\n"
+	printf("%s: %s detailed mode clock %u kHz, flags[%x]\n"
 	       "    H: %04d %04d %04d %04d\n"
 	       "    V: %04d %04d %04d %04d\n"
 	       "bus_format: %x\n",
+	       conn_state->dev->name,
+	       state->force_output ? "use force output" : "",
 	       mode->clock, mode->flags,
 	       mode->hdisplay, mode->hsync_start,
 	       mode->hsync_end, mode->htotal,
@@ -1600,7 +1668,7 @@ static int rockchip_display_probe(struct udevice *dev)
 	struct display_state *s;
 	const char *name;
 	int ret;
-	ofnode node, route_node;
+	ofnode node, route_node, timing_node;
 	struct device_node *port_node, *vop_node, *ep_node, *port_parent_node;
 	struct public_phy_data *data;
 	bool is_ports_node = false;
@@ -1711,6 +1779,15 @@ static int rockchip_display_probe(struct udevice *dev)
 		else
 			s->charge_logo_mode = ROCKCHIP_DISPLAY_CENTER;
 
+		s->force_output = ofnode_read_bool(node, "force-output");
+
+		if (s->force_output) {
+			timing_node = ofnode_find_subnode(node, "force_timing");
+			ret = display_get_force_timing_from_dts(timing_node, &s->force_mode);
+			if (ofnode_read_u32(node, "force-bus-format", &s->force_bus_format))
+				s->force_bus_format = MEDIA_BUS_FMT_RGB888_1X24;
+		}
+
 		s->blob = blob;
 		s->panel_state.panel = panel;
 		s->conn_state.node = conn_dev->node;
diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index 1a2ad84e67..50318a4bdd 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -191,6 +191,9 @@ struct display_state {
 	int enable;
 	int is_init;
 	int is_enable;
+	bool force_output;
+	struct drm_display_mode force_mode;
+	u32 force_bus_format;
 };
 
 static inline struct rockchip_panel *state_get_panel(struct display_state *s)

commit 3cddfea5e2bad01db7feb2dff13789319adfbd28
Author: zhijun.xie <xzj@rock-chips.com>
Date:   Wed Aug 4 17:53:35 2021 +0800

    configs: Add rk3568-spi-nand(-pmic).config
    
    These two files are mainly for generating the uboot.img as small as possible,
    in order to run on the spi-nand board with critial capacity(128MB now).
    
    And the preloader is Miniloader for the small size too. Therefore we have to
    use the legacy image format: uboot.img and trust.img.
    
    Update rk3568-spi-nand(-pmic).config according to .config:
      ./scripts/sync-fragment.sh configs/rk3568-spi-nand-pmic.config
      ./scripts/sync-fragment.sh configs/rk3568-spi-nand.config
    
    The commands to reduce uboot size to 815K for spi nand product:
      ./make.sh rk3568-spi-nand --sz-uboot 1024 2 --sz-trust 512 2 for not pmu product  or
      ./make.sh rk3568-spi-nand-pmic --sz-uboot 1024 2 --sz-trust 512 2 for pmu product
    
    Signed-off-by: zhijun.xie <xzj@rock-chips.com>
    Change-Id: Ib4923a00dc4a97909d1000a1b5b6023a7e5b3681

diff --git a/configs/rk3568-spi-nand-pmic.config b/configs/rk3568-spi-nand-pmic.config
new file mode 100644
index 0000000000..09df8fa233
--- /dev/null
+++ b/configs/rk3568-spi-nand-pmic.config
@@ -0,0 +1,26 @@
+CONFIG_BASE_DEFCONFIG="rk3568-spi-nand.config"
+# CONFIG_CMD_PMIC is not set
+# CONFIG_DM_PMIC_MAX77686 is not set
+# CONFIG_DM_PMIC_MAX8998 is not set
+# CONFIG_DM_PMIC_PFUZE100 is not set
+# CONFIG_DM_PMIC_SANDBOX is not set
+CONFIG_DM_PMIC=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_IO_DOMAIN=y
+# CONFIG_PMIC_ACT8846 is not set
+CONFIG_PMIC_CHILDREN=y
+# CONFIG_PMIC_LP873X is not set
+# CONFIG_PMIC_LP87565 is not set
+# CONFIG_PMIC_MAX8997 is not set
+# CONFIG_PMIC_PALMAS is not set
+# CONFIG_PMIC_PM8916 is not set
+CONFIG_PMIC_RK8XX=y
+# CONFIG_PMIC_RN5T567 is not set
+# CONFIG_PMIC_S2MPS11 is not set
+# CONFIG_PMIC_S5M8767 is not set
+# CONFIG_PMIC_TPS65090 is not set
+CONFIG_REGULATOR_PWM=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_ROCKCHIP_IO_DOMAIN=y
+# CONFIG_SPL_DM_REGULATOR_FIXED is not set
+CONFIG_SPL_PMIC_CHILDREN=y
diff --git a/configs/rk3568-spi-nand.config b/configs/rk3568-spi-nand.config
new file mode 100644
index 0000000000..554c15c7c1
--- /dev/null
+++ b/configs/rk3568-spi-nand.config
@@ -0,0 +1,42 @@
+# CONFIG_ANDROID_AVB is not set
+# CONFIG_ARM_CPU_SUSPEND is not set
+# CONFIG_AVB_LIBAVB_AB is not set
+# CONFIG_AVB_LIBAVB_ATX is not set
+# CONFIG_AVB_LIBAVB is not set
+# CONFIG_AVB_LIBAVB_USER is not set
+CONFIG_BASE_DEFCONFIG="rk3568_defconfig"
+# CONFIG_CMD_BOOT_ROCKCHIP is not set
+# CONFIG_CMD_BOOTZ is not set
+# CONFIG_CMD_EXT2 is not set
+# CONFIG_CMD_EXT4 is not set
+# CONFIG_CMD_FAT is not set
+# CONFIG_CMD_FS_GENERIC is not set
+# CONFIG_CMD_GO is not set
+# CONFIG_CMD_MMC is not set
+# CONFIG_CMD_NAND is not set
+# CONFIG_DISTRO_DEFAULTS is not set
+# CONFIG_DM_CHARGE_DISPLAY is not set
+# CONFIG_DM_CRYPTO is not set
+# CONFIG_DM_FUEL_GAUGE is not set
+# CONFIG_DM_PMIC is not set
+# CONFIG_DM_REGULATOR_FIXED is not set
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_FASTBOOT is not set
+# CONFIG_FIT is not set
+# CONFIG_FS_FAT is not set
+# CONFIG_IO_DOMAIN is not set
+# CONFIG_IRQ is not set
+CONFIG_LOADER_INI="RK3568MINIALL_SPI_NAND.ini"
+# CONFIG_MMC is not set
+# CONFIG_OPTEE_CLIENT is not set
+# CONFIG_REGULATOR_PWM is not set
+# CONFIG_RK_AVB_LIBAVB_USER is not set
+# CONFIG_RSA is not set
+# CONFIG_SHA512 is not set
+# CONFIG_SPL is not set
+CONFIG_TRUST_NUM=2
+CONFIG_TRUST_RSA_MODE=2
+CONFIG_TRUST_SHA_MODE=3
+CONFIG_TRUST_SIZE_KB=2048
+CONFIG_UBOOT_NUM=4
+CONFIG_UBOOT_SIZE_KB=1024

commit fc672cf1008f2fb841a8b917dd55c25d07e658bd
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Thu Aug 5 15:24:58 2021 +0800

    drm/rockchip: hdmi: Support read hdmi information from aux block of baseparameter
    
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
    Change-Id: I9780ebe3115a9cfb77b7d42b2cb69b07798d10bb

diff --git a/drivers/video/drm/rockchip_dw_hdmi.c b/drivers/video/drm/rockchip_dw_hdmi.c
index e74538d308..b2837a278a 100644
--- a/drivers/video/drm/rockchip_dw_hdmi.c
+++ b/drivers/video/drm/rockchip_dw_hdmi.c
@@ -336,6 +336,8 @@ void drm_rk_selete_output(struct hdmi_edid_data *edid_data,
 	struct base2_screen_info *screen_info2 = NULL;
 	int max_scan = 100;
 	int min_scan = 51;
+	int offset = 0;
+	bool found = false;
 	struct blk_desc *dev_desc;
 	disk_partition_t part_info;
 	char baseparameter_buf[8 * RK_BLK_SIZE] __aligned(ARCH_DMA_MINALIGN);
@@ -364,7 +366,8 @@ void drm_rk_selete_output(struct hdmi_edid_data *edid_data,
 			return;
 		}
 
-		ret = blk_dread(dev_desc, part_info.start, 1,
+read_aux:
+		ret = blk_dread(dev_desc, part_info.start + offset, 1,
 				(void *)baseparameter_buf);
 		if (ret < 0) {
 			printf("read baseparameter failed\n");
@@ -381,10 +384,17 @@ void drm_rk_selete_output(struct hdmi_edid_data *edid_data,
 		for (i = 0; i < screen_size; i++) {
 			if (base_parameter.screen_list[i].type ==
 			    DRM_MODE_CONNECTOR_HDMIA) {
+				found = true;
 				screen_info = &base_parameter.screen_list[i];
 				break;
 			}
 		}
+
+		if (!found && !offset) {
+			printf("hdmi info isn't saved in main block\n");
+			offset += 16;
+			goto read_aux;
+		}
 	} else {
 		scan = &base2_parameter->overscan_info;
 		screen_size = sizeof(base2_parameter->screen_info) /

commit 3f127669f185df385d9c5189b25b958c3c8df0e4
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Mon Jul 19 19:36:21 2021 +0800

    rockchip: usbplug: support mtd devices
    
    The name of IF_TYPE_MTD is "mtd", so modify "mtd_blk" to
    "mtd".
    Remove "sfc_nor" and "sfc_nand".
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: Ia0ae34e7f75cd9b8e40da11b300f4749219ba5d6

diff --git a/arch/arm/mach-rockchip/usbplug.c b/arch/arm/mach-rockchip/usbplug.c
index c0cd1226fe..48794f8f6d 100644
--- a/arch/arm/mach-rockchip/usbplug.c
+++ b/arch/arm/mach-rockchip/usbplug.c
@@ -17,12 +17,10 @@ static char *bootdev_rockusb_cmd(void)
 	const char *devtype, *devnum;
 	const char *bootdev_list[] = {
 		"mmc",		"0",
-		"mtd_blk",	"0",
-		"mtd_blk",	"1",
-		"mtd_blk",	"2",
+		"mtd",		"0",
+		"mtd",		"1",
+		"mtd",		"2",
 		"rknand",	"0",
-		"rksfc",	"0",
-		"rksfc",	"1",
 		NULL,		NULL,
 	};
 	char *cmd;

commit a065a2216f084bef96746a7c056a186586bb3d83
Author: zhijun.xie <xzj@rock-chips.com>
Date:   Fri Aug 6 15:31:58 2021 +0800

    configs: rk3568: Add CONFIG_LZMA
    
    support LZMA compress mode,which has higher compress rate
    
    Change-Id: I6d68e321fe691a4efe996f5c352eb617cfdb721f
    Signed-off-by: zhijun.xie <xzj@rock-chips.com>

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index a29c4799d1..28bc2ed5dd 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -205,6 +205,7 @@ CONFIG_RSA_N_SIZE=0x200
 CONFIG_RSA_E_SIZE=0x10
 CONFIG_RSA_C_SIZE=0x20
 CONFIG_SHA512=y
+CONFIG_LZMA=y
 CONFIG_LZ4=y
 CONFIG_SPL_GZIP=y
 CONFIG_ERRNO_STR=y

commit c3d67558303176dd93e61d3cc8f9722f69b7d79d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Aug 6 15:57:56 2021 +0800

    fuel gauge: rk816/8: Add nonstandard charger check
    
    Treat as AC_CHARGER.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I0419e06c1c0bcaf5e29a2065bd8767ac4fa02b23

diff --git a/drivers/power/fuel_gauge/fg_rk816.c b/drivers/power/fuel_gauge/fg_rk816.c
index 5596db7a43..ded1974c1b 100644
--- a/drivers/power/fuel_gauge/fg_rk816.c
+++ b/drivers/power/fuel_gauge/fg_rk816.c
@@ -765,6 +765,7 @@ static int rk816_bat_get_usb_state(struct battery_priv *di)
 		charger_type = USB_CHARGER;
 		break;
 	case 2:
+	case 4:
 		charger_type = AC_CHARGER;
 		break;
 	default:
diff --git a/drivers/power/fuel_gauge/fg_rk818.c b/drivers/power/fuel_gauge/fg_rk818.c
index 8258f57bd9..cf770ddd19 100644
--- a/drivers/power/fuel_gauge/fg_rk818.c
+++ b/drivers/power/fuel_gauge/fg_rk818.c
@@ -757,6 +757,7 @@ static int rk818_bat_get_usb_state(struct battery_priv *di)
 		charger_type = USB_CHARGER;
 		break;
 	case 2:
+	case 4:
 		charger_type = AC_CHARGER;
 		break;
 	default:

commit eac46afef5b12647683085547b78c166f85085cc
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Aug 4 11:33:58 2021 +0800

    rockchip: add soc version for rk3308bs
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ic634a33f36d4633a47232ba8c34910aa3dff89e7

diff --git a/arch/arm/include/asm/arch-rockchip/cpu.h b/arch/arm/include/asm/arch-rockchip/cpu.h
index e73819d8d6..d22bb7bb69 100644
--- a/arch/arm/include/asm/arch-rockchip/cpu.h
+++ b/arch/arm/include/asm/arch-rockchip/cpu.h
@@ -26,6 +26,7 @@
 #define ROCKCHIP_SOC_RK3288W    (ROCKCHIP_CPU_RK3288 | 0x01)
 #define ROCKCHIP_SOC_RK3308	(ROCKCHIP_CPU_RK3308 | 0x00)
 #define ROCKCHIP_SOC_RK3308B	(ROCKCHIP_CPU_RK3308 | 0x01)
+#define ROCKCHIP_SOC_RK3308BS	(ROCKCHIP_CPU_RK3308 | 0x02)
 #define ROCKCHIP_SOC_RK3566	(ROCKCHIP_CPU_RK3566 | 0x00)
 #define ROCKCHIP_SOC_RK3568	(ROCKCHIP_CPU_RK3568 | 0x00)
 
@@ -55,10 +56,14 @@ static inline int rockchip_soc_id(void)
 	 * The CHIP_ID is stored in GRF_CHIP_ID:
 	 * RK3308:  0xcea (3306 in decimal)
 	 * RK3308B: 0x3308
-	 *
+	 * RK3308BS: 0x3308c
 	 */
-	if (readl(0xFF000800) == 3306)
+	u32 v = readl(0xFF000800);
+
+	if (v == 3306)
 		return ROCKCHIP_SOC_RK3308;
+	else if (v == 0x3308c)
+		return ROCKCHIP_SOC_RK3308BS;
 	else
 		return ROCKCHIP_SOC_RK3308B;
 #elif defined(CONFIG_ROCKCHIP_RK3568)
@@ -88,6 +93,7 @@ ROCKCHIP_SOC(rk3288, RK3288)
 ROCKCHIP_SOC(rk3288w, RK3288W)
 ROCKCHIP_SOC(rk3308, RK3308)
 ROCKCHIP_SOC(rk3308b, RK3308B)
+ROCKCHIP_SOC(rk3308bs, RK3308BS)
 ROCKCHIP_SOC(rk3566, RK3566)
 ROCKCHIP_SOC(rk3568, RK3568)
 

commit 050aa3bc48acb4f12cf22742c8e28294e2b0531e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 5 15:26:15 2021 +0800

    scripts: stacktrace: handle PC on thumb instr
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I4e79096dc8122c42aa4dfa02f47082a9337cf951

diff --git a/scripts/stacktrace.sh b/scripts/stacktrace.sh
index 2c50e07b76..fbb504d4ac 100755
--- a/scripts/stacktrace.sh
+++ b/scripts/stacktrace.sh
@@ -107,10 +107,14 @@ done
 echo
 
 # PC instruction
-echo " PC Surrounding Instructions:"
+echo "PC Surrounding Instructions:"
 line=`grep '\[< ' ${INPUT_FILE} | grep '>\]' | grep [PC]`
 frame_pc_str=`echo ${line} | awk '{ print "0x"$3 }'`
 frame_pc_dec=`echo ${line} | awk '{ print strtonum("0x"$3); }'`
+# Handle Thumb instr
+if [ `expr ${frame_pc_dec} % 2` -ne 0 ];then
+	frame_pc_dec=`expr ${frame_pc_dec} - 1`
+fi
 frame_pc_hex=`echo "obase=16;${frame_pc_dec}"|bc |tr '[A-Z]' '[a-z]'`
 PC_INSTR=`./make.sh ${ELF_FILE} | grep -5 -m 1 "${frame_pc_hex}:"`
 echo "${PC_INSTR}"

commit ee008497bf7dd8c2b4e5b29d197016de4fe5b7b6
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Thu Jul 15 10:52:04 2021 +0800

    drm/rockchip: vop2: add adjust cursor plane
    
    when dts add cursor-win-id property and the id isn't matching with
    plane_mask, we adjust to the correct cursor plane.
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: Ia03c05368847d0bd80843c374a4409e9b1962969

diff --git a/drivers/video/drm/rockchip_crtc.h b/drivers/video/drm/rockchip_crtc.h
index 7f0a342a65..6feb5baf5f 100644
--- a/drivers/video/drm/rockchip_crtc.h
+++ b/drivers/video/drm/rockchip_crtc.h
@@ -14,6 +14,7 @@ struct rockchip_vp {
 	u8 bg_ovl_dly;
 	int output_type;
 	u32 plane_mask;
+	int cursor_plane;
 };
 
 struct rockchip_crtc {
diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 93eff04f54..add46a3901 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -1739,18 +1739,24 @@ static int rockchip_display_probe(struct udevice *dev)
 				bool vp_enable = false;
 
 				ofnode_for_each_subnode(vp_node, np_to_ofnode(port_parent_node)) {
+					int cursor_plane = -1;
+
 					vp_id = ofnode_read_u32_default(vp_node, "reg", 0);
 					ret = ofnode_read_u32_default(vp_node, "rockchip,plane-mask", 0);
+
+					cursor_plane = ofnode_read_u32_default(vp_node, "cursor-win-id", -1);
+					s->crtc_state.crtc->vps[vp_id].cursor_plane = cursor_plane;
 					if (ret) {
 						int primary_plane = 0;
 
 						s->crtc_state.crtc->vps[vp_id].plane_mask = ret;
 						s->crtc_state.crtc->assign_plane |= true;
 						primary_plane = ofnode_read_u32_default(vp_node, "rockchip,primary-plane", 0);
-						printf("get vp%d plane mask:0x%x, primary id:%d from dts\n",
+						printf("get vp%d plane mask:0x%x, primary id:%d, cursor_plane:%d, from dts\n",
 						       vp_id,
 						       s->crtc_state.crtc->vps[vp_id].plane_mask,
-						       primary_plane);
+						       primary_plane,
+						       cursor_plane);
 					}
 
 					/* To check current vp status */
diff --git a/drivers/video/drm/rockchip_vop2.c b/drivers/video/drm/rockchip_vop2.c
index 4d68c89b34..9f6a5168c9 100644
--- a/drivers/video/drm/rockchip_vop2.c
+++ b/drivers/video/drm/rockchip_vop2.c
@@ -581,6 +581,12 @@ enum vop2_video_ports_id {
 	VOP2_VP_MAX,
 };
 
+enum vop2_layer_type {
+	CLUSTER_LAYER = 0,
+	ESMART_LAYER = 1,
+	SMART_LAYER = 2,
+};
+
 /* This define must same with kernel win phy id */
 enum vop2_layer_phy_id {
 	ROCKCHIP_VOP2_CLUSTER0 = 0,
@@ -593,6 +599,7 @@ enum vop2_layer_phy_id {
 	ROCKCHIP_VOP2_CLUSTER3,
 	ROCKCHIP_VOP2_ESMART2,
 	ROCKCHIP_VOP2_ESMART3,
+	ROCKCHIP_VOP2_LAYER_MAX,
 };
 
 enum vop2_scale_up_mode {
@@ -637,11 +644,17 @@ struct vop2_vp_data {
 	struct vop_rect max_output;
 };
 
+struct vop2_plane_table {
+	enum vop2_layer_phy_id plane_id;
+	enum vop2_layer_type plane_type;
+};
+
 struct vop2_vp_plane_mask {
 	u8 primary_plane_id; /* use this win to show logo */
 	u8 attached_layers_nr; /* number layers attach to this vp */
 	u8 attached_layers[VOP2_LAYER_MAX]; /* the layers attached to this vp */
 	u32 plane_mask;
+	int cursor_plane_id;
 };
 
 struct vop2_data {
@@ -649,6 +662,7 @@ struct vop2_data {
 	struct vop2_vp_data *vp_data;
 	struct vop2_win_data *win_data;
 	struct vop2_vp_plane_mask *plane_mask;
+	struct vop2_plane_table *plane_table;
 	u8 nr_vps;
 	u8 nr_layers;
 	u8 nr_mixers;
@@ -1897,6 +1911,49 @@ static int rockchip_vop2_disable(struct display_state *state)
 	return 0;
 }
 
+static int rockchip_vop2_get_cursor_plane(struct display_state *state, u32 plane_mask, int cursor_plane)
+{
+	struct crtc_state *cstate = &state->crtc_state;
+	struct vop2 *vop2 = cstate->private;
+	int i = 0;
+	int correct_cursor_plane = -1;
+	int plane_type = -1;
+
+	if (cursor_plane < 0)
+		return -1;
+
+	if (plane_mask & (1 << cursor_plane))
+		return cursor_plane;
+
+	/* Get current cursor plane type */
+	for (i = 0; i < vop2->data->nr_layers; i++) {
+		if (vop2->data->plane_table[i].plane_id == cursor_plane) {
+			plane_type = vop2->data->plane_table[i].plane_type;
+			break;
+		}
+	}
+
+	/* Get the other same plane type plane id */
+	for (i = 0; i < vop2->data->nr_layers; i++) {
+		if (vop2->data->plane_table[i].plane_type == plane_type &&
+		    vop2->data->plane_table[i].plane_id != cursor_plane) {
+			correct_cursor_plane = vop2->data->plane_table[i].plane_id;
+			break;
+		}
+	}
+
+	/* To check whether the new correct_cursor_plane is attach to current vp */
+	if (correct_cursor_plane < 0 || !(plane_mask & (1 << correct_cursor_plane))) {
+		printf("error: faild to find correct plane as cursor plane\n");
+		return -1;
+	}
+
+	printf("vp%d adjust cursor plane from %d to %d\n",
+	       cstate->crtc_id, cursor_plane, correct_cursor_plane);
+
+	return correct_cursor_plane;
+}
+
 static int rockchip_vop2_fixup_dts(struct display_state *state, void *blob)
 {
 	struct crtc_state *cstate = &state->crtc_state;
@@ -1907,6 +1964,7 @@ static int rockchip_vop2_fixup_dts(struct display_state *state, void *blob)
 	const char *path;
 	u32 plane_mask = 0;
 	int vp_id = 0;
+	int cursor_plane_id = -1;
 
 	if (vop_fix_dts)
 		return 0;
@@ -1917,14 +1975,20 @@ static int rockchip_vop2_fixup_dts(struct display_state *state, void *blob)
 
 		if (cstate->crtc->assign_plane)
 			continue;
-		printf("vp%d, plane_mask:0x%x, primary-id:%d\n",
+		cursor_plane_id = rockchip_vop2_get_cursor_plane(state, plane_mask,
+								 cstate->crtc->vps[vp_id].cursor_plane);
+		printf("vp%d, plane_mask:0x%x, primary-id:%d, curser-id:%d\n",
 		       vp_id, plane_mask,
-		       vop2->vp_plane_mask[vp_id].primary_plane_id);
+		       vop2->vp_plane_mask[vp_id].primary_plane_id,
+		       cursor_plane_id);
 
 		do_fixup_by_path_u32(blob, path, "rockchip,plane-mask",
 				     plane_mask, 1);
 		do_fixup_by_path_u32(blob, path, "rockchip,primary-plane",
 				     vop2->vp_plane_mask[vp_id].primary_plane_id, 1);
+		if (cursor_plane_id >= 0)
+			do_fixup_by_path_u32(blob, path, "cursor-win-id",
+					     cursor_plane_id, 1);
 		vp_id++;
 	}
 
@@ -1933,6 +1997,15 @@ static int rockchip_vop2_fixup_dts(struct display_state *state, void *blob)
 	return 0;
 }
 
+static struct vop2_plane_table rk356x_plane_table[ROCKCHIP_VOP2_LAYER_MAX] = {
+	{ROCKCHIP_VOP2_CLUSTER0, CLUSTER_LAYER},
+	{ROCKCHIP_VOP2_CLUSTER1, CLUSTER_LAYER},
+	{ROCKCHIP_VOP2_ESMART0, ESMART_LAYER},
+	{ROCKCHIP_VOP2_ESMART1, ESMART_LAYER},
+	{ROCKCHIP_VOP2_SMART0, SMART_LAYER},
+	{ROCKCHIP_VOP2_SMART0, SMART_LAYER},
+};
+
 static struct vop2_vp_plane_mask rk356x_vp_plane_mask[VOP2_VP_MAX][VOP2_VP_MAX] = {
 	{ /* one display policy */
 		{/* main display */
@@ -2070,6 +2143,7 @@ const struct vop2_data rk3568_vop = {
 	.vp_data = rk3568_vp_data,
 	.win_data = rk3568_win_data,
 	.plane_mask = rk356x_vp_plane_mask[0],
+	.plane_table = rk356x_plane_table,
 	.nr_layers = 6,
 	.nr_mixers = 5,
 	.nr_gammas = 1,

commit b46099176802606d9ae89bbfda8ecfb8aa009699
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Mon Aug 2 15:58:01 2021 +0800

    cmd: rockusb: convert return vlaue from block layer
    
    Due to block layer return 0 represent error, so convert it to
    negative vlaue to ensure that UMS can check status correctly.
    
    Change-Id: I5faf3d50c19ae85f7ea05cdc57c372983e29e137
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/cmd/rockusb.c b/cmd/rockusb.c
index 30e2b4ec78..7f4841ff75 100644
--- a/cmd/rockusb.c
+++ b/cmd/rockusb.c
@@ -23,12 +23,16 @@ static int rkusb_read_sector(struct ums *ums_dev,
 {
 	struct blk_desc *block_dev = &ums_dev->block_dev;
 	lbaint_t blkstart = start + ums_dev->start_sector;
+	int ret;
 
 	if ((blkstart + blkcnt) > RKUSB_READ_LIMIT_ADDR) {
 		memset(buf, 0xcc, blkcnt * SECTOR_SIZE);
 		return blkcnt;
 	} else {
-		return blk_dread(block_dev, blkstart, blkcnt, buf);
+		ret = blk_dread(block_dev, blkstart, blkcnt, buf);
+		if (!ret)
+			ret = -EIO;
+		return ret;
 	}
 }
 
@@ -41,7 +45,11 @@ static int rkusb_write_sector(struct ums *ums_dev,
 
 	if (block_dev->if_type == IF_TYPE_MTD)
 		block_dev->op_flag |= BLK_MTD_CONT_WRITE;
+
 	ret = blk_dwrite(block_dev, blkstart, blkcnt, buf);
+	if (!ret)
+		ret = -EIO;
+
 	if (block_dev->if_type == IF_TYPE_MTD)
 		block_dev->op_flag &= ~(BLK_MTD_CONT_WRITE);
 	return ret;

commit 26663c2dc5b80cce67e4f8ad77e5efbb7ae05b88
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Fri Jul 23 11:00:16 2021 +0800

    clk: rockchip: rk3568: add i2s3 clk
    
    Change-Id: If20fe16260d2b584d4216d1dbabffcb25478fb1d
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3568.h b/arch/arm/include/asm/arch-rockchip/cru_rk3568.h
index 07714ecfeb..f8bb52b314 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3568.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3568.h
@@ -209,6 +209,31 @@ enum {
 	ACLK_PERIMID_SEL_100M,
 	ACLK_PERIMID_SEL_24M,
 
+	/* CRU_CLK_SEL21_CON */
+	I2S3_MCLKOUT_TX_SEL_SHIFT	= 15,
+	I2S3_MCLKOUT_TX_SEL_MASK	= 1 << I2S3_MCLKOUT_TX_SEL_SHIFT,
+	I2S3_MCLKOUT_TX_SEL_MCLK	= 0,
+	I2S3_MCLKOUT_TX_SEL_12M,
+	CLK_I2S3_SEL_SHIFT		= 10,
+	CLK_I2S3_SEL_MASK		= 0x3 << CLK_I2S3_SEL_SHIFT,
+	CLK_I2S3_SEL_SRC		= 0,
+	CLK_I2S3_SEL_FRAC,
+	CLK_I2S3_SEL_CLKIN,
+	CLK_I2S3_SEL_XIN12M,
+	CLK_I2S3_SRC_SEL_SHIFT		= 8,
+	CLK_I2S3_SRC_SEL_MASK		= 0x3 << CLK_I2S3_SRC_SEL_SHIFT,
+	CLK_I2S3_SRC_SEL_GPLL		= 0,
+	CLK_I2S3_SRC_SEL_CPLL,
+	CLK_I2S3_SRC_SEL_NPLL,
+	CLK_I2S3_SRC_DIV_SHIFT		= 0,
+	CLK_I2S3_SRC_DIV_MASK		= 0x7f << CLK_I2S3_SRC_DIV_SHIFT,
+
+	/* CRU_CLK_SEL22_CON */
+	CLK_I2S3_FRAC_NUMERATOR_SHIFT	= 16,
+	CLK_I2S3_FRAC_NUMERATOR_MASK	= 0xffff << 16,
+	CLK_I2S3_FRAC_DENOMINATOR_SHIFT	= 0,
+	CLK_I2S3_FRAC_DENOMINATOR_MASK	= 0xffff,
+
 	/* CRU_CLK_SEL27_CON */
 	CLK_CRYPTO_PKA_SEL_SHIFT	= 6,
 	CLK_CRYPTO_PKA_SEL_MASK		= 3 << CLK_CRYPTO_PKA_SEL_SHIFT,
@@ -500,5 +525,16 @@ enum {
 	/* CRU_CLK_SEL82_CON */
 	CPLL_100M_DIV_SHIFT		= 0,
 	CPLL_100M_DIV_MASK		= 0x1f << CPLL_100M_DIV_SHIFT,
+
+	/* GRF_SOC_CON2 */
+	I2S3_MCLKOUT_SEL_SHIFT		= 15,
+	I2S3_MCLKOUT_SEL_MASK		= 0x1 << I2S3_MCLKOUT_SEL_SHIFT,
+	I2S3_MCLKOUT_SEL_RX		= 0,
+	I2S3_MCLKOUT_SEL_TX,
+	I2S3_MCLK_IOE_SEL_SHIFT		= 3,
+	I2S3_MCLK_IOE_SEL_MASK		= 0x1 << I2S3_MCLK_IOE_SEL_SHIFT,
+	I2S3_MCLK_IOE_SEL_CLKIN		= 0,
+	I2S3_MCLK_IOE_SEL_CLKOUT,
+
 };
 #endif
diff --git a/drivers/clk/rockchip/clk_rk3568.c b/drivers/clk/rockchip/clk_rk3568.c
index 94277a6efd..b8f42975e2 100644
--- a/drivers/clk/rockchip/clk_rk3568.c
+++ b/drivers/clk/rockchip/clk_rk3568.c
@@ -12,6 +12,7 @@
 #include <syscon.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/cru_rk3568.h>
+#include <asm/arch/grf_rk3568.h>
 #include <asm/arch/hardware.h>
 #include <asm/io.h>
 #include <dm/lists.h>
@@ -2289,6 +2290,168 @@ static ulong rk3568_uart_set_rate(struct rk3568_clk_priv *priv,
 
 	return rk3568_uart_get_rate(priv, clk_id);
 }
+
+static ulong rk3568_i2s3_get_rate(struct rk3568_clk_priv *priv, ulong clk_id)
+{
+	struct rk3568_cru *cru = priv->cru;
+	struct rk3568_grf *grf = priv->grf;
+	u32 con, div, src, p_rate;
+	u32 reg, fracdiv, p_src;
+	unsigned long m, n;
+
+	switch (clk_id) {
+	case I2S3_MCLKOUT_TX:
+		con = readl(&cru->clksel_con[21]);
+		src = (con & I2S3_MCLKOUT_TX_SEL_MASK) >>
+		      I2S3_MCLKOUT_TX_SEL_SHIFT;
+		if (src == I2S3_MCLKOUT_TX_SEL_12M)
+			p_rate = 12000000;
+		else
+			p_rate = rk3568_i2s3_get_rate(priv, MCLK_I2S3_2CH_TX);
+		return p_rate;
+	case I2S3_MCLKOUT_RX:
+		con = readl(&cru->clksel_con[83]);
+		src = (con & I2S3_MCLKOUT_TX_SEL_MASK) >>
+		      I2S3_MCLKOUT_TX_SEL_SHIFT;
+		if (src == I2S3_MCLKOUT_TX_SEL_12M)
+			p_rate = 12000000;
+		else
+			p_rate = rk3568_i2s3_get_rate(priv, MCLK_I2S3_2CH_RX);
+		return p_rate;
+	case I2S3_MCLKOUT:
+		con = readl(&grf->soc_con2);
+		src = (con & I2S3_MCLKOUT_SEL_MASK)
+		      >> I2S3_MCLKOUT_SEL_SHIFT;
+		if (src == I2S3_MCLKOUT_SEL_RX)
+			p_rate = rk3568_i2s3_get_rate(priv, I2S3_MCLKOUT_RX);
+		else
+			p_rate = rk3568_i2s3_get_rate(priv, I2S3_MCLKOUT_TX);
+		return p_rate;
+	case MCLK_I2S3_2CH_RX:
+		reg = 83;
+		break;
+	case MCLK_I2S3_2CH_TX:
+		reg = 21;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	con = readl(&cru->clksel_con[reg]);
+	src = (con & CLK_I2S3_SEL_MASK) >> CLK_I2S3_SEL_SHIFT;
+	div = (con & CLK_I2S3_SRC_DIV_MASK) >> CLK_I2S3_SRC_DIV_SHIFT;
+	p_src = (con & CLK_I2S3_SRC_SEL_MASK) >> CLK_I2S3_SRC_SEL_SHIFT;
+	if (p_src == CLK_I2S3_SRC_SEL_GPLL)
+		p_rate = priv->gpll_hz;
+	else if (p_src == CLK_I2S3_SRC_SEL_CPLL)
+		p_rate = priv->cpll_hz;
+	else
+		p_rate = priv->npll_hz;
+	if (src == CLK_I2S3_SEL_SRC) {
+		return DIV_TO_RATE(p_rate, div);
+	} else if (src == CLK_I2S3_SEL_FRAC) {
+		fracdiv = readl(&cru->clksel_con[reg + 1]);
+		n = fracdiv & CLK_I2S3_FRAC_NUMERATOR_MASK;
+		n >>= CLK_I2S3_FRAC_NUMERATOR_SHIFT;
+		m = fracdiv & CLK_I2S3_FRAC_DENOMINATOR_MASK;
+		m >>= CLK_I2S3_FRAC_DENOMINATOR_SHIFT;
+		return DIV_TO_RATE(p_rate, div) * n / m;
+	} else {
+		return OSC_HZ / 2;
+	}
+}
+
+static ulong rk3568_i2s3_set_rate(struct rk3568_clk_priv *priv,
+				  ulong clk_id, ulong rate)
+{
+	struct rk3568_cru *cru = priv->cru;
+	struct rk3568_grf *grf = priv->grf;
+	u32 reg, con, clk_src, i2s_src, div;
+	unsigned long m = 0, n = 0, val;
+
+	if (priv->gpll_hz % rate == 0) {
+		clk_src = CLK_I2S3_SRC_SEL_GPLL;
+		i2s_src = CLK_I2S3_SEL_SRC;
+		div = DIV_ROUND_UP(priv->gpll_hz, rate);
+	} else if (priv->cpll_hz % rate == 0) {
+		clk_src = CLK_I2S3_SRC_SEL_CPLL;
+		i2s_src = CLK_I2S3_SEL_SRC;
+		div = DIV_ROUND_UP(priv->gpll_hz, rate);
+	} else if (rate == OSC_HZ / 2) {
+		clk_src = CLK_I2S3_SRC_SEL_GPLL;
+		i2s_src = CLK_I2S3_SEL_XIN12M;
+		div = 1;
+	} else {
+		clk_src = CLK_I2S3_SRC_SEL_GPLL;
+		i2s_src = CLK_I2S3_SEL_FRAC;
+		div = 1;
+		rational_best_approximation(rate, priv->gpll_hz / div,
+					    GENMASK(16 - 1, 0),
+					    GENMASK(16 - 1, 0),
+					    &m, &n);
+	}
+
+	switch (clk_id) {
+	case I2S3_MCLKOUT_TX:
+		if (rate == 12000000) {
+			rk_clrsetreg(&cru->clksel_con[21],
+				     I2S3_MCLKOUT_TX_SEL_MASK,
+				     I2S3_MCLKOUT_TX_SEL_12M <<
+				     I2S3_MCLKOUT_TX_SEL_SHIFT);
+		} else {
+			rk3568_i2s3_set_rate(priv, MCLK_I2S3_2CH_TX, rate),
+			rk_clrsetreg(&cru->clksel_con[21],
+				     I2S3_MCLKOUT_TX_SEL_MASK,
+				     I2S3_MCLKOUT_TX_SEL_MCLK <<
+				     I2S3_MCLKOUT_TX_SEL_SHIFT);
+		}
+		return rk3568_i2s3_get_rate(priv, clk_id);
+	case I2S3_MCLKOUT_RX:
+		if (rate == 12000000) {
+			rk_clrsetreg(&cru->clksel_con[83],
+				     I2S3_MCLKOUT_TX_SEL_MASK,
+				     I2S3_MCLKOUT_TX_SEL_12M <<
+				     I2S3_MCLKOUT_TX_SEL_SHIFT);
+		} else {
+			rk3568_i2s3_set_rate(priv, MCLK_I2S3_2CH_RX, rate),
+			rk_clrsetreg(&cru->clksel_con[21],
+				     I2S3_MCLKOUT_TX_SEL_MASK,
+				     I2S3_MCLKOUT_TX_SEL_MCLK <<
+				     I2S3_MCLKOUT_TX_SEL_SHIFT);
+		}
+		return rk3568_i2s3_get_rate(priv, clk_id);
+	case I2S3_MCLKOUT:
+		con = readl(&grf->soc_con2);
+		clk_src = (con & I2S3_MCLKOUT_SEL_MASK)
+		      >> I2S3_MCLKOUT_SEL_SHIFT;
+		if (clk_src == I2S3_MCLKOUT_SEL_RX)
+			rk3568_i2s3_set_rate(priv, I2S3_MCLKOUT_RX, rate);
+		else
+			rk3568_i2s3_set_rate(priv, I2S3_MCLKOUT_TX, rate);
+		return rk3568_i2s3_get_rate(priv, clk_id);
+	case MCLK_I2S3_2CH_RX:
+		reg = 83;
+		break;
+	case MCLK_I2S3_2CH_TX:
+		reg = 21;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	rk_clrsetreg(&cru->clksel_con[reg],
+		     CLK_I2S3_SEL_MASK | CLK_I2S3_SRC_SEL_MASK |
+		     CLK_I2S3_SRC_DIV_MASK,
+		     (clk_src << CLK_I2S3_SRC_SEL_SHIFT) |
+		     (i2s_src << CLK_I2S3_SEL_SHIFT) |
+		     ((div - 1) << CLK_I2S3_SRC_DIV_SHIFT));
+	if (m && n) {
+		val = m << CLK_I2S3_FRAC_NUMERATOR_SHIFT | n;
+		writel(val, &cru->clksel_con[reg + 1]);
+	}
+	return rk3568_i2s3_get_rate(priv, clk_id);
+}
+
 #endif
 
 static ulong rk3568_clk_get_rate(struct clk *clk)
@@ -2433,6 +2596,13 @@ static ulong rk3568_clk_get_rate(struct clk *clk)
 	case SCLK_UART9:
 		rate = rk3568_uart_get_rate(priv, clk->id);
 		break;
+	case I2S3_MCLKOUT_RX:
+	case I2S3_MCLKOUT_TX:
+	case MCLK_I2S3_2CH_RX:
+	case MCLK_I2S3_2CH_TX:
+	case I2S3_MCLKOUT:
+		rate = rk3568_i2s3_get_rate(priv, clk->id);
+		break;
 #endif
 	case ACLK_SECURE_FLASH:
 	case ACLK_CRYPTO_NS:
@@ -2612,6 +2782,13 @@ static ulong rk3568_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_UART9:
 		ret = rk3568_uart_set_rate(priv, clk->id, rate);
 		break;
+	case I2S3_MCLKOUT_RX:
+	case I2S3_MCLKOUT_TX:
+	case MCLK_I2S3_2CH_RX:
+	case MCLK_I2S3_2CH_TX:
+	case I2S3_MCLKOUT:
+		ret = rk3568_i2s3_set_rate(priv, clk->id, rate);
+		break;
 #endif
 	case ACLK_SECURE_FLASH:
 	case ACLK_CRYPTO_NS:
@@ -2912,6 +3089,42 @@ static int __maybe_unused rk3568_rkvdec_set_parent(struct clk *clk,
 	return 0;
 }
 
+static int __maybe_unused rk3568_i2s3_set_parent(struct clk *clk,
+						 struct clk *parent)
+{
+	struct rk3568_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3568_grf *grf = priv->grf;
+
+	switch (clk->id) {
+	case I2S3_MCLK_IOE:
+		if (parent->id == I2S3_MCLKOUT) {
+			rk_clrsetreg(&grf->soc_con2, I2S3_MCLK_IOE_SEL_MASK,
+				     I2S3_MCLK_IOE_SEL_CLKOUT <<
+				     I2S3_MCLK_IOE_SEL_SHIFT);
+		} else {
+			rk_clrsetreg(&grf->soc_con2, I2S3_MCLK_IOE_SEL_MASK,
+				     I2S3_MCLK_IOE_SEL_CLKIN <<
+				     I2S3_MCLK_IOE_SEL_SHIFT);
+		}
+		break;
+	case I2S3_MCLKOUT:
+		if (parent->id == I2S3_MCLKOUT_RX) {
+			rk_clrsetreg(&grf->soc_con2, I2S3_MCLKOUT_SEL_MASK,
+				     I2S3_MCLKOUT_SEL_RX <<
+				     I2S3_MCLKOUT_SEL_SHIFT);
+		} else {
+			rk_clrsetreg(&grf->soc_con2, I2S3_MCLKOUT_SEL_MASK,
+				     I2S3_MCLKOUT_SEL_TX <<
+				     I2S3_MCLKOUT_SEL_SHIFT);
+		}
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
 static int rk3568_clk_set_parent(struct clk *clk, struct clk *parent)
 {
 	switch (clk->id) {
@@ -2930,6 +3143,9 @@ static int rk3568_clk_set_parent(struct clk *clk, struct clk *parent)
 	case ACLK_RKVDEC_PRE:
 	case CLK_RKVDEC_CORE:
 		return rk3568_rkvdec_set_parent(clk, parent);
+	case I2S3_MCLK_IOE:
+	case I2S3_MCLKOUT:
+		return rk3568_i2s3_set_parent(clk, parent);
 	default:
 		return -ENOENT;
 	}

commit b7433696a62cb04ed834dd957a6815da334a9f2c
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Fri Jul 23 10:58:42 2021 +0800

    rockchip: dts: rk3568: Resync from kernel-4.19
    
    Resync from kernel-4.19:
    (a6cf6aca12c0 drivers: rkflash: Ajudst the dll strategy)
    
    Change-Id: I7b7134946b76dbd8963cfaafdc5b56750622855e
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/include/dt-bindings/clock/rk3568-cru.h b/include/dt-bindings/clock/rk3568-cru.h
index 566a043848..aecfdd4ce0 100644
--- a/include/dt-bindings/clock/rk3568-cru.h
+++ b/include/dt-bindings/clock/rk3568-cru.h
@@ -478,6 +478,13 @@
 #define CPLL_50M		415
 #define CPLL_25M		416
 #define CPLL_100M		417
+#define SCLK_DDRCLK		418
+#define I2S1_MCLKOUT		419
+#define I2S3_MCLKOUT		420
+#define I2S1_MCLK_RX_IOE	421
+#define I2S1_MCLK_TX_IOE	422
+#define I2S2_MCLK_IOE		423
+#define I2S3_MCLK_IOE		424
 
 #define PCLK_CORE_PVTM		450
 

commit 777c3e7c072897f5c41ee3265292973e9bd992b1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Aug 3 10:26:47 2021 +0800

    configs: rk3368: update load/trust ini
    
    fixes: (25f7c6d4df configs: rockchip: add image and build configure)
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ie97fe0264ca90db70968bba90171e1766c10d88a

diff --git a/configs/rk3368_defconfig b/configs/rk3368_defconfig
index 91f13feb2a..939a1d472a 100644
--- a/configs/rk3368_defconfig
+++ b/configs/rk3368_defconfig
@@ -3,6 +3,9 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_ROCKCHIP_RK3368=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_CHIP_NAME="RK3368H"
+CONFIG_LOADER_INI="RK3368HMINIALL.ini"
+CONFIG_TRUST_INI="RK3368HTRUST.ini"
 CONFIG_TRUST_SHA_MODE=2
 CONFIG_TARGET_EVB_RK3368=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3368-evb"

commit 1e46fe7d682203981f9fe04070d6d510d396a8fd
Author: jkand.huang <jkand.huang@rock-chips.com>
Date:   Thu Jul 29 10:46:20 2021 +0800

    rockchip: rv1126: change priority of isp\ispp\cpu\vepu\sdmmc
    
    In 4K+AI case, with old Qos Setting, it is easy to lose frame.
    Consider NPU is not real time device, and it cost high DDR
    bandwidth, we need to lower npu Qos priority and  bump up isp
    related device Qos priority. To get this goal, we do following
    modify:
    A7_PRIORITY_REG: 0101->0202
    VEPU_RD0_PRIORITY_REG: 0101->0202
    VEPU_RD1_PRIORITY_REG: 0101->0202
    VEPU_WR_PRIORITY_REG: 0101->0202
    ISPP_M0_PRIORITY_REG: 0101->0202
    ISPP_M1_PRIORITY_REG: 0101->0202
    ISP_PRIORITY_REG: 0101->0202
    CIF_LITE_PRIORITY_REG: 0202->0303
    CIF_PRIORITY_REG: 0202->0303
    SDMMC_PRIORITY_REG: 0303->0202
    
    and disable ISP dynamic priority:
    ISP_PRIORITY_EX_REG: 1->0
    
    Signed-off-by: jkand.huang <jkand.huang@rock-chips.com>
    Change-Id: I8b68e76d972bd7e96d8c183efd2ed8d8fcc2d9bc

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126.c b/arch/arm/mach-rockchip/rv1126/rv1126.c
index 41da91c278..2c1ae4b3b9 100644
--- a/arch/arm/mach-rockchip/rv1126/rv1126.c
+++ b/arch/arm/mach-rockchip/rv1126/rv1126.c
@@ -661,22 +661,22 @@ int arch_cpu_init(void)
 	writel(0x303, DMA_PRIORITY_REG);
 	writel(0x101, MCU_DM_PRIORITY_REG);
 	writel(0x101, MCU_IM_PRIORITY_REG);
-	writel(0x101, A7_PRIORITY_REG);
+	writel(0x202, A7_PRIORITY_REG);
 	writel(0x303, GMAC_PRIORITY_REG);
 	writel(0x101, NPU_PRIORITY_REG);
 	writel(0x303, EMMC_PRIORITY_REG);
 	writel(0x303, NANDC_PRIORITY_REG);
 	writel(0x303, SFC_PRIORITY_REG);
-	writel(0x303, SDMMC_PRIORITY_REG);
+	writel(0x202, SDMMC_PRIORITY_REG);
 	writel(0x303, SDIO_PRIORITY_REG);
-	writel(0x101, VEPU_RD0_PRIORITY_REG);
-	writel(0x101, VEPU_RD1_PRIORITY_REG);
-	writel(0x101, VEPU_WR_PRIORITY_REG);
-	writel(0x101, ISPP_M0_PRIORITY_REG);
-	writel(0x101, ISPP_M1_PRIORITY_REG);
-	writel(0x101, ISP_PRIORITY_REG);
-	writel(0x202, CIF_LITE_PRIORITY_REG);
-	writel(0x202, CIF_PRIORITY_REG);
+	writel(0x202, VEPU_RD0_PRIORITY_REG);
+	writel(0x202, VEPU_RD1_PRIORITY_REG);
+	writel(0x202, VEPU_WR_PRIORITY_REG);
+	writel(0x202, ISPP_M0_PRIORITY_REG);
+	writel(0x202, ISPP_M1_PRIORITY_REG);
+	writel(0x202, ISP_PRIORITY_REG);
+	writel(0x303, CIF_LITE_PRIORITY_REG);
+	writel(0x303, CIF_PRIORITY_REG);
 	writel(0x101, IEP_PRIORITY_REG);
 	writel(0x101, RGA_RD_PRIORITY_REG);
 	writel(0x101, RGA_WR_PRIORITY_REG);
@@ -685,7 +685,7 @@ int arch_cpu_init(void)
 	writel(0x101, JPEG_PRIORITY_REG);
 	writel(0x101, CRYPTO_PRIORITY_REG);
 	/* enable dynamic priority */
-	writel(0x1, ISP_PRIORITY_EX_REG);
+	writel(0x0, ISP_PRIORITY_EX_REG);
 
 	/*
 	 * Init the i2c0 iomux and use it to control electronic voltmeter

commit 65e59da860e9eb4a2532772b029e5c872a73df4a
Author: Weiwen Chen <cww@rock-chips.com>
Date:   Mon Aug 2 20:32:12 2021 +0800

    rockchip: dts: rv1126: enable sdmmc1 to quote
    
    Signed-off-by: Weiwen Chen <cww@rock-chips.com>
    Change-Id: I9a8861ebab367d89bc1ec4d08d2aad2a17d2539b

diff --git a/arch/arm/dts/rv1126-pinctrl.dtsi b/arch/arm/dts/rv1126-pinctrl.dtsi
index 2423dd9cde..9ae4c191b9 100644
--- a/arch/arm/dts/rv1126-pinctrl.dtsi
+++ b/arch/arm/dts/rv1126-pinctrl.dtsi
@@ -1154,7 +1154,7 @@
 				<0 RK_PC0 1 &pcfg_pull_none>;
 		};
 	};
-	sdmmc1 {
+	sdmmc1: sdmmc1 {
 		sdmmc1_bus4: sdmmc1-bus4 {
 			rockchip,pins =
 				/* sdmmc1_d0 */

commit ea04eec01a4d88b58d34f93c43213e0b58f3e932
Author: Weiwen Chen <cww@rock-chips.com>
Date:   Mon Jul 19 14:18:30 2021 +0800

    configs: rv1126-spi-nor-tiny: support MMC device
    
    Signed-off-by: Weiwen Chen <cww@rock-chips.com>
    Change-Id: Ia09aa5347f09f9a59274cdd3b50b8c348b92ad95

diff --git a/configs/rv1126-spi-nor-tiny_defconfig b/configs/rv1126-spi-nor-tiny_defconfig
index 9b46da7c5c..9dab10b8e3 100644
--- a/configs/rv1126-spi-nor-tiny_defconfig
+++ b/configs/rv1126-spi-nor-tiny_defconfig
@@ -6,7 +6,6 @@ CONFIG_SYS_MALLOC_F_LEN=0x80000
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
 CONFIG_ROCKCHIP_RV1126=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
-# CONFIG_SPL_MMC_SUPPORT is not set
 CONFIG_ROCKCHIP_FIT_IMAGE=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 # CONFIG_ROCKCHIP_SMCCC is not set
@@ -41,6 +40,7 @@ CONFIG_SPL_BOARD_INIT=y
 # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
 CONFIG_SPL_SHA256_SUPPORT=y
 CONFIG_SPL_HASH_SUPPORT=y
+CONFIG_SPL_MMC_WRITE=y
 CONFIG_SPL_MTD_SUPPORT=y
 CONFIG_MTD_BLK_U_BOOT_OFFS=0x200
 CONFIG_SPL_OPTEE=y
@@ -71,7 +71,7 @@ CONFIG_PARTITION_TYPE_GUID=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_SPL_DTB_MINIMUM=y
 CONFIG_OF_LIVE=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_OF_U_BOOT_REMOVE_PROPS="interrupt-parent"
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
@@ -90,7 +90,8 @@ CONFIG_SPL_MISC_DECOMPRESS=y
 CONFIG_ROCKCHIP_HW_DECOMPRESS=y
 CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS=y
 CONFIG_SPL_ROCKCHIP_SECURE_OTP_V2=y
-# CONFIG_SPL_DM_MMC is not set
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MTD=y
 CONFIG_MTD_BLK=y
 CONFIG_MTD_DEVICE=y
@@ -103,6 +104,7 @@ CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SPI_FLASH_MTD=y
 CONFIG_PHY=y
 CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
 CONFIG_DM_PMIC=y
 # CONFIG_SPL_PMIC_CHILDREN is not set
 CONFIG_PMIC_RK8XX=y

commit 86715f68fbb8650be435636227157ee69711b88b
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue Aug 3 10:31:14 2021 +0800

    mtd: spi-nor-ids: mx25u12835f support dual/quad mode
    
    Change-Id: I06122f5e012f9b8eb686faa900e9586c321f2a62
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 45b73ad8d4..1d77f0953c 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -161,7 +161,7 @@ const struct flash_info spi_nor_ids[] = {
 	{ INFO("mx25u3235f",  0xc22536, 0, 4 * 1024,  1024, SECT_4K) },
 	{ INFO("mx25u6435f",  0xc22537, 0, 64 * 1024, 128, SECT_4K) },
 	{ INFO("mx25l12805d", 0xc22018, 0, 64 * 1024, 256, SECT_4K) },
-	{ INFO("mx25u12835f", 0xc22538, 0, 64 * 1024, 256, SECT_4K) },
+	{ INFO("mx25u12835f", 0xc22538, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 	{ INFO("mx25l12855e", 0xc22618, 0, 64 * 1024, 256, 0) },
 	{ INFO("mx25l25635e", 0xc22019, 0, 64 * 1024, 512, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 	{ INFO("mx25u25635f", 0xc22539, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },

commit 7952efb81a13d5d5fe3921e3b87b036a97bc536e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jul 28 14:52:51 2021 +0800

    rockchip: kernel dtb: don't validate current fdt depend on magic check
    
    It's not safe to use fdt_check_header() to validate current fdt.
    
    Because this valid "current" fdt may be the old fdt that was loaded
    successfully at the last power on.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Id6e2663806a23ca90122e2881b0b77533c940e4b

diff --git a/arch/arm/mach-rockchip/kernel_dtb.c b/arch/arm/mach-rockchip/kernel_dtb.c
index a5d26cb96b..72a95704b4 100644
--- a/arch/arm/mach-rockchip/kernel_dtb.c
+++ b/arch/arm/mach-rockchip/kernel_dtb.c
@@ -307,19 +307,9 @@ dtb_embed:
 		memcpy((void *)fdt_addr, gd->fdt_blob_kern,
 		       fdt_totalsize(gd->fdt_blob_kern));
 		printf("DTB: %s\n", CONFIG_EMBED_KERNEL_DTB_PATH);
-	} else if (ret == -EBADF) {
-		/*
-		 * If there is not embedded DTB, and the DTB in boot/recovery.img
-		 * is corrupted, just exit.
-		 *
-		 * Avoid data-abort while calling fdt-lib API for a corrupted DTB.
-		 */
-		return ret;
-	}
-
-	if (fdt_check_header((void *)fdt_addr)) {
+	} else {
 		printf("Failed to get kernel dtb, ret=%d\n", ret);
-		return ret;
+		return -ENOENT;
 	}
 
 dtb_okay:

commit d94316bf7b92df37a247a6120f55ee2c0f5baad3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 27 11:59:11 2021 +0800

    rockchip: fit: fix cannot get kernel fdt if boot/recovery.img is corrupted
    
    It's not correct to confirm kernel dtb depend on fdt_check_header().
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I75f13268e1d361f132d6085be6bd37aa6df51a7e

diff --git a/arch/arm/mach-rockchip/fit.c b/arch/arm/mach-rockchip/fit.c
index b202fda55b..e8dea27897 100644
--- a/arch/arm/mach-rockchip/fit.c
+++ b/arch/arm/mach-rockchip/fit.c
@@ -227,9 +227,9 @@ int fit_image_pre_process(const void *fit)
 {
 	int ret;
 
-#ifdef CONFIG_USING_KERNEL_DTB
-	sysmem_free((phys_addr_t)gd->fdt_blob);
-#endif
+	if ((gd->flags & GD_FLG_KDTB_READY) && !gd->fdt_blob_kern)
+		sysmem_free((phys_addr_t)gd->fdt_blob);
+
 	ret = fit_image_fixup_alloc(fit, FIT_FDT_PROP,
 				    "fdt_addr_r", MEM_FDT);
 	if (ret < 0)
diff --git a/arch/arm/mach-rockchip/fit_misc.c b/arch/arm/mach-rockchip/fit_misc.c
index 7b4d5222e5..aa1c591f53 100644
--- a/arch/arm/mach-rockchip/fit_misc.c
+++ b/arch/arm/mach-rockchip/fit_misc.c
@@ -114,10 +114,13 @@ void board_fit_image_post_process(void *fit, int node, ulong *load_addr,
 
 #if CONFIG_IS_ENABLED(USING_KERNEL_DTB)
 	/* Avoid overriding processed(overlay, hw-dtb, ...) kernel dtb */
-	if (fit_image_check_type(fit, node, IH_TYPE_FLATDT) &&
-	    !fdt_check_header(gd->fdt_blob)) {
-		*src_addr = (void *)gd->fdt_blob;
-		*src_len = (size_t)fdt_totalsize(gd->fdt_blob);
+	if (fit_image_check_type(fit, node, IH_TYPE_FLATDT)) {
+		if ((gd->flags & GD_FLG_KDTB_READY) && !gd->fdt_blob_kern) {
+			*src_addr = (void *)gd->fdt_blob;
+			*src_len = (size_t)fdt_totalsize(gd->fdt_blob);
+		} else {
+			printf("   Using fdt from load-in fdt\n");
+		}
 	}
 #endif
 }

commit 34a72bf2bd77b0eb735f68661ad24521a66619ce
Author: Ding Ling Song <damon.ding@rock-chips.com>
Date:   Thu Jul 29 18:07:44 2021 +0800

    drm/rockchip: vop2: fix esmart0 register error.
    
    The base register should be ESMART0_REGION0_CTRL.
    
    Change-Id: I9c78725a766b8704e22450021f2c89ea8233c962
    Signed-off-by: Damon Ding <damon.ding@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_vop2.c b/drivers/video/drm/rockchip_vop2.c
index 119d6b49e4..4d68c89b34 100644
--- a/drivers/video/drm/rockchip_vop2.c
+++ b/drivers/video/drm/rockchip_vop2.c
@@ -1754,9 +1754,9 @@ static void vop2_setup_scale(struct vop2 *vop2, uint32_t win_offset,
 	vop2_writel(vop2, RK3568_ESMART0_REGION0_SCL_FACTOR_YRGB + win_offset,
 		    yfac << 16 | xfac);
 
-	vop2_mask_write(vop2, RK3568_ESMART0_REGION1_CTRL + win_offset,
+	vop2_mask_write(vop2, RK3568_ESMART0_REGION0_CTRL + win_offset,
 			YRGB_GT2_MASK, YRGB_GT2_SHIFT, gt2, false);
-	vop2_mask_write(vop2, RK3568_ESMART0_REGION1_CTRL + win_offset,
+	vop2_mask_write(vop2, RK3568_ESMART0_REGION0_CTRL + win_offset,
 			YRGB_GT4_MASK, YRGB_GT4_SHIFT, gt4, false);
 
 	vop2_mask_write(vop2, RK3568_ESMART0_REGION0_SCL_CTRL + win_offset,

commit 4f3eb98eebc3322df392fb1736fe18a3d8e1db06
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jul 30 15:52:35 2021 +0800

    rockchip: rv1126: change some addresses with uboot
    
    The spl uses the 0x500000-0x600000 as its bss and heap. If
    CONFIG_SYS_TEXT_BASE is 0x400000 and enable decompress, spl
    will load the compressed uboot in 0x500000. This may cover
    the spl's heap. So changed them.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I938ebe13e9128c12de38ed0f3c686cce5c6bf29d

diff --git a/include/configs/rv1126_common.h b/include/configs/rv1126_common.h
index e91f2f292b..ac173a9f46 100644
--- a/include/configs/rv1126_common.h
+++ b/include/configs/rv1126_common.h
@@ -18,11 +18,11 @@
 #ifdef CONFIG_SUPPORT_USBPLUG
 #define CONFIG_SYS_TEXT_BASE		0x00000000
 #else
-#define CONFIG_SYS_TEXT_BASE		0x00400000
+#define CONFIG_SYS_TEXT_BASE		0x00600000
 #endif
 
-#define CONFIG_SYS_INIT_SP_ADDR		0x00600000
-#define CONFIG_SYS_LOAD_ADDR		0x00C00800
+#define CONFIG_SYS_INIT_SP_ADDR		0x00800000
+#define CONFIG_SYS_LOAD_ADDR		0x00e00800
 #define CONFIG_SYS_BOOTM_LEN		(64 << 20)
 
 /* SPL */

commit 4a3d96280975dbc8b66aef919b5c73c8c063b12d
Author: Wesley Yao <wesley.yao@rock-chips.com>
Date:   Wed Jul 28 10:57:24 2021 +0800

    drivers: ram: rv1126: Support x16 bus width of LPDDR4(X)
    
    Use read gate train to detect x16 or x32 bus width of LPDDR4(X).
    
    Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
    Change-Id: I6f580c06e974e33c6de149df77509dd4f4d2ab54

diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
index 0b06af5280..3b8de2a40b 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -2628,7 +2628,6 @@ static u64 dram_detect_cap(struct dram_info *dram,
 			// cap_info->cs0_row = 16;
 			// cap_info->row_3_4 = 0;
 		}
-		cap_info->bw = 2;
 	}
 
 	pwrctl = readl(pctl_base + DDR_PCTL2_PWRCTL);
@@ -2640,31 +2639,27 @@ static u64 dram_detect_cap(struct dram_info *dram,
 		cs = 0;
 	cap_info->rank = cs + 1;
 
-	if (dram_type != LPDDR4 && dram_type != LPDDR4X) {
-		setbits_le32(PHY_REG(phy_base, 0xf), 0xf);
+	setbits_le32(PHY_REG(phy_base, 0xf), 0xf);
 
-		if (data_training(dram, 0, sdram_params, 0,
-				  READ_GATE_TRAINING) == 0) {
-			cap_info->bw = 2;
-		} else {
-			dq_map = readl(PHY_REG(phy_base, 0x4f));
-			for (i = 0; i < 4; i++) {
-				if (((dq_map >> (i * 2)) & 0x3) == 0)
-					byte0 = i;
-				if (((dq_map >> (i * 2)) & 0x3) == 1)
-					byte1 = i;
-			}
-			clrsetbits_le32(PHY_REG(phy_base, 0xf), PHY_DQ_WIDTH_MASK,
-					BIT(byte0) | BIT(byte1));
-			if (data_training(dram, 0, sdram_params, 0,
-					  READ_GATE_TRAINING) == 0)
-				cap_info->bw = 1;
-			else
-				cap_info->bw = 0;
+	if (data_training(dram, 0, sdram_params, 0, READ_GATE_TRAINING) == 0) {
+		cap_info->bw = 2;
+	} else {
+		dq_map = readl(PHY_REG(phy_base, 0x4f));
+		for (i = 0; i < 4; i++) {
+			if (((dq_map >> (i * 2)) & 0x3) == 0)
+				byte0 = i;
+			if (((dq_map >> (i * 2)) & 0x3) == 1)
+				byte1 = i;
 		}
-		if (cap_info->bw > 0)
-			cap_info->dbw = 1;
+		clrsetbits_le32(PHY_REG(phy_base, 0xf), PHY_DQ_WIDTH_MASK,
+				BIT(byte0) | BIT(byte1));
+		if (data_training(dram, 0, sdram_params, 0, READ_GATE_TRAINING) == 0)
+			cap_info->bw = 1;
+		else
+			cap_info->bw = 0;
 	}
+	if (cap_info->bw > 0)
+		cap_info->dbw = 1;
 
 	writel(pwrctl, pctl_base + DDR_PCTL2_PWRCTL);
 

commit 957ed7842bbc97c96b2d43b516e6f5a80e50855b
Author: Wesley Yao <wesley.yao@rock-chips.com>
Date:   Wed Jul 28 17:13:25 2021 +0800

    drivers: ram: rv1126: fix incorrect setting of LPDDR4(X) tRFC
    
    Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
    Change-Id: Ibf7173476d051cadcc83e9851e2ab7056a2a7195

diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
index 8a724a90e1..0b06af5280 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -3173,11 +3173,11 @@ static void pctl_modify_trfc(struct ddr_pctl_regs *pctl_regs,
 
 	case LPDDR4:
 	case LPDDR4X:
-		if (die_cap <= DIE_CAP_4GBIT)
+		if (die_cap <= DIE_CAP_2GBIT)
 			trfc_ns = 130;
-		else if (die_cap <= DIE_CAP_8GBIT)
+		else if (die_cap <= DIE_CAP_4GBIT)
 			trfc_ns = 180;
-		else if (die_cap <= DIE_CAP_16GBIT)
+		else if (die_cap <= DIE_CAP_8GBIT)
 			trfc_ns = 280;
 		else
 			trfc_ns = 380;

commit 21372cf086b5685ea950b039f5244d762293073a
Author: Wesley Yao <wesley.yao@rock-chips.com>
Date:   Tue Jul 20 11:52:18 2021 +0800

    drivers: ram: rv1126: fix data types of wr_lvl result for wr train
    
    If wr_lvl result is negative, it may result in an incorrect calculation
    of dqs_default of wr train.
    
    Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
    Change-Id: I1a7e32a2c58c21eb679176a45870abacc8bda57f

diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
index d514433459..8a724a90e1 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -1964,7 +1964,7 @@ out:
 static int get_wrlvl_val(struct dram_info *dram,
 			 struct rv1126_sdram_params *sdram_params)
 {
-	u32 i, j, clk_skew;
+	int i, j, clk_skew;
 	void __iomem *phy_base = dram->phy;
 	u32 lp_stat;
 	int ret;
@@ -1982,8 +1982,7 @@ static int get_wrlvl_val(struct dram_info *dram,
 	for (j = 0; j < 2; j++)
 		for (i = 0; i < 4; i++)
 			wrlvl_result[j][i] =
-				readl(PHY_REG(phy_base,
-					      wrlvl_result_offset[j][i])) -
+				(readl(PHY_REG(phy_base, wrlvl_result_offset[j][i])) & 0x3f) -
 				clk_skew;
 
 	low_power_update(dram, lp_stat);
@@ -2096,8 +2095,8 @@ static int high_freq_training(struct dram_info *dram,
 				dqs_skew += wrlvl_result[j][i];
 		}
 	}
-	dqs_skew = dqs_skew / (sdram_params->ch.cap_info.rank *
-			       (1 << sdram_params->ch.cap_info.bw));
+	dqs_skew = dqs_skew /
+		   (int)(sdram_params->ch.cap_info.rank * (1 << sdram_params->ch.cap_info.bw));
 
 	clk_skew = 0x20 - dqs_skew;
 	dqs_skew = 0x20;

commit fc96aab00b4040aff8a9f290b40ffc8eb339c40d
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue Jul 27 17:47:11 2021 +0800

    mtd: spinand: Support new devices
    
    FS35SQA001C
    
    Change-Id: I6aef0cdb2a6151f459aee7c80d67752c0c8ad7f5
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/foresee.c b/drivers/mtd/nand/spi/foresee.c
index f7c09416ea..2936f9e71d 100644
--- a/drivers/mtd/nand/spi/foresee.c
+++ b/drivers/mtd/nand/spi/foresee.c
@@ -33,13 +33,7 @@ static SPINAND_OP_VARIANTS(update_cache_variants,
 static int fsxxndxxg_ooblayout_ecc(struct mtd_info *mtd, int section,
 				   struct mtd_oob_region *region)
 {
-	if (section)
-		return -ERANGE;
-
-	region->offset = 64;
-	region->length = 64;
-
-	return 0;
+	return -ERANGE;
 }
 
 static int fsxxndxxg_ooblayout_free(struct mtd_info *mtd, int section,
@@ -48,9 +42,8 @@ static int fsxxndxxg_ooblayout_free(struct mtd_info *mtd, int section,
 	if (section)
 		return -ERANGE;
 
-	/* Reserve 1 bytes for the BBM. */
-	region->offset = 1;
-	region->length = 63;
+	region->offset = 2;
+	region->length = mtd->oobsize - 2;
 
 	return 0;
 }
@@ -85,6 +78,14 @@ static const struct spinand_info foresee_spinand_table[] = {
 					      &update_cache_variants),
 		     0,
 		     SPINAND_ECCINFO(&fsxxndxxg_ooblayout, NULL)),
+	SPINAND_INFO("fsxxndxxg", 0x71,
+		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
+		     NAND_ECCREQ(1, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&fsxxndxxg_ooblayout, NULL)),
 };
 
 /**

commit bfe297b2e9b9d4bbe1952d5b89efb4fc85913e6f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 26 17:16:37 2021 +0800

    arm: crt0_64.S: don't set SCTLR.A=1
    
    The CPU is able to execute load/store instruction on unaligned address,
    and we don't need to avoid special alignment scene.
    
    Now, SCTLR.A=1 causes U-Boot data-abort while decompressing the LZ4 kernel.
    
    Fixes: (b25dd131e0 arm: crt0_64: Enable sctlr A/SA bit for EL3/2/1)
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I25f85e10999afb0fbb42a742c39f61c00b8c6f70

diff --git a/arch/arm/lib/crt0_64.S b/arch/arm/lib/crt0_64.S
index 95a6c7d153..79275dabbe 100644
--- a/arch/arm/lib/crt0_64.S
+++ b/arch/arm/lib/crt0_64.S
@@ -71,9 +71,9 @@ ENTRY(_main)
 	 * data access alignment checks and SError.
 	 */
 #ifdef CONFIG_SPL_BUILD
-	mov x1, #(CR_A | CR_SA | CR_I)
+	mov x1, #(CR_SA | CR_I)
 #else
-	mov x1, #(CR_A | CR_SA)
+	mov x1, #(CR_SA)
 #endif
 	switch_el x2, 3f, 2f, 1f
 3:	mrs	x0, sctlr_el3

commit df47f1dca0f01c9cc3ffeda3b4e07909b02ebc67
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jul 22 20:02:09 2021 +0800

    rockchip: resource logo: Correct file->rsce_base for logo_kernel.bmp
    
    Fix failed to find logo_kernel.img from LOGO partition.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ifb8a3399dbd88ce4ab62f42dd2b7f77330b4b4a3

diff --git a/arch/arm/mach-rockchip/resource_logo.c b/arch/arm/mach-rockchip/resource_logo.c
index 80ec4701a0..7d40ddf0da 100644
--- a/arch/arm/mach-rockchip/resource_logo.c
+++ b/arch/arm/mach-rockchip/resource_logo.c
@@ -18,19 +18,18 @@ static int read_bmp(struct blk_desc *dev_desc, const char *name,
 		    uint32_t *size)
 {
 	struct bmp_header *header;
-	u32 blk_start, blk_offset;
+	u32 blk_offset;
 	u32 filesz;
 	int ret;
 
 	blk_offset = DIV_ROUND_UP(offset, dev_desc->blksz);
-	blk_start = part->start + blk_offset;
 	header = memalign(ARCH_DMA_MINALIGN, dev_desc->blksz);
 	if (!header) {
 		ret = -ENOMEM;
 		goto out;
 	}
 
-	if (blk_dread(dev_desc, blk_start, 1, header) != 1) {
+	if (blk_dread(dev_desc, part->start + blk_offset, 1, header) != 1) {
 		ret = -EIO;
 		goto out;
 	}
@@ -41,7 +40,7 @@ static int read_bmp(struct blk_desc *dev_desc, const char *name,
 	}
 
 	filesz = get_unaligned_le32(&header->file_size);
-	ret = resource_replace_entry(name, blk_start, blk_offset, filesz);
+	ret = resource_replace_entry(name, part->start, blk_offset, filesz);
 	if (!ret) {
 		printf("LOGO: %s\n", name);
 		if (size)

commit 3959311fe53342879b4c2a727cfe7b965e8e3754
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Jul 23 10:31:41 2021 +0800

    spi: rockchip_sfc: Ajudst the dll strategy
    
    1.max_dll_cells is 0x1FF when sfc_ver_4
    2.sfc_set_delay_lines to zero means disable dll
    3.bypass dll training when there is no device
    4.Adjust the dll_value to from the middle of the dll window to
    the better one
    5.Change RKSFC_DLL_THRESHOLD_RATE to ">50MHz"
    
    Change-Id: I53812e2865b14506b3cdbfb510d71a633b99c768
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/spi/rockchip_sfc.c b/drivers/spi/rockchip_sfc.c
index cc93e6afe9..4aafd162fc 100644
--- a/drivers/spi/rockchip_sfc.c
+++ b/drivers/spi/rockchip_sfc.c
@@ -110,21 +110,23 @@ check_member(rockchip_sfc_reg, data, 0x108);
 
 /*SFC_DLL_CTRL0*/
 #define DLL_CTRL0_SCLK_SMP_DLL	BIT(15)       /* SCLK sampling enable dll */
-#define DLL_CTRL0_DLL_MAX_VER4	0xFFU
-#define DLL_CTRL0_DLL_MAX_VER5	0x1FFU
+#define DLL_CTRL0_DLL_MAX_VER4	0x1FFU
+#define DLL_CTRL0_DLL_MAX_VER5	0xFFU
 
 #define SFC_MAX_TRB_VER3	(512 * 31)
 #define SFC_MAX_TRB_VER4	(0xFFFFFFFF)
 
 #define SFC_MAX_RATE		(150 * 1000 * 1000)
-#define SFC_DLL_THRESHOLD_RATE	(100 * 1000 * 1000)
+#define SFC_DLL_THRESHOLD_RATE	(50 * 1000 * 1000)
 #define SFC_DEFAULT_RATE	(80 * 1000 * 1000)
-#define SFC_MIN_RATE		(10 * 1000 * 1000)
 
 #define SFC_VER_3		0x3
 #define SFC_VER_4		0x4
 #define SFC_VER_5		0x5
 
+#define SFC_DLL_TRANING_STEP		10		/* Training step */
+#define SFC_DLL_TRANING_VALID_WINDOW	80		/* Training Valid DLL winbow */
+
 enum rockchip_sfc_if_type {
 	IF_TYPE_STD,
 	IF_TYPE_DUAL,
@@ -143,7 +145,8 @@ struct rockchip_sfc {
 	unsigned int mode;
 	unsigned int speed_hz;
 	u32 max_iosize;
-	u32 max_dll_cells;
+	u16 max_dll_cells;
+	u16 dll_cells;
 	bool prepare;
 	u32 last_prepare_size;
 	u32 cmd;
@@ -184,35 +187,29 @@ u32 rockchip_sfc_get_version(struct rockchip_sfc *sfc)
 int rockchip_sfc_set_delay_lines(struct rockchip_sfc *sfc, u32 cells)
 {
 	struct rockchip_sfc_reg *regs = sfc->regbase;
+	u32 val = 0;
 
 	if (cells > sfc->max_dll_cells)
 		cells = sfc->max_dll_cells;
 
-	return writel(DLL_CTRL0_SCLK_SMP_DLL | cells, &regs->dll_ctrl0);
-}
+	if (cells)
+		val = DLL_CTRL0_SCLK_SMP_DLL | cells;
 
-int rockchip_sfc_disable_delay_lines(struct rockchip_sfc *sfc)
-{
-	struct rockchip_sfc_reg *regs = sfc->regbase;
-
-	return writel(0, &regs->dll_ctrl0);
+	return writel(val, &regs->dll_ctrl0);
 }
 
+#if CONFIG_IS_ENABLED(CLK)
+static void rockchip_sfc_delay_lines_training(struct udevice *bus, struct rockchip_sfc *sfc);
+#endif
+
 static int rockchip_sfc_probe(struct udevice *bus)
 {
 	struct rockchip_sfc_platdata *plat = dev_get_platdata(bus);
 	struct rockchip_sfc *sfc = dev_get_priv(bus);
 	struct rockchip_sfc_reg *regs;
-	struct dm_spi_bus *dm_spi_bus;
 
-	dm_spi_bus = bus->uclass_priv;
-	dm_spi_bus->max_hz = plat->frequency;
 	sfc->regbase = (struct rockchip_sfc_reg *)plat->base;
 	sfc->max_freq = SFC_MAX_RATE;
-	sfc->speed_hz = SFC_DEFAULT_RATE;
-#if CONFIG_IS_ENABLED(CLK)
-	clk_set_rate(&sfc->clk, sfc->speed_hz);
-#endif
 	regs = sfc->regbase;
 	switch (rockchip_sfc_get_version(sfc)) {
 	case SFC_VER_5:
@@ -226,6 +223,7 @@ static int rockchip_sfc_probe(struct udevice *bus)
 		writel(1, &regs->len_ctrl);
 		break;
 	default:
+		sfc->max_dll_cells = 0;
 		sfc->max_iosize = SFC_MAX_TRB_VER3;
 		break;
 	}
@@ -605,6 +603,84 @@ static int rockchip_sfc_do_xfer(struct rockchip_sfc *sfc, void *buf, size_t len)
 		return rockchip_sfc_read(sfc, sfc->addr, buf, len);
 }
 
+#if CONFIG_IS_ENABLED(CLK)
+static void rockchip_sfc_delay_lines_training(struct udevice *bus, struct rockchip_sfc *sfc)
+{
+	u8 id[3], id_temp[3];
+	u16 cell_max = sfc->max_dll_cells;
+	u16 right, left = 0;
+	u16 step = SFC_DLL_TRANING_STEP;
+	bool dll_valid = false;
+
+	sfc->cmd = 0x9f;
+	sfc->addr = 0;
+	sfc->addr_bits = 0;
+	sfc->addr_xbits_ext = 8;
+	sfc->dummy_bits = 0;
+	sfc->rw = 0;
+
+	clk_set_rate(&sfc->clk, SFC_DLL_THRESHOLD_RATE);
+	rockchip_sfc_pio_xfer(sfc, (void *)&id, 3);
+	if ((0xFF == id[0] && 0xFF == id[1]) ||
+	    (0x00 == id[0] && 0x00 == id[1])) {
+		dev_dbg(bus, "no dev, dll by pass\n");
+		clk_set_rate(&sfc->clk, sfc->speed_hz);
+
+		return;
+	}
+
+	clk_set_rate(&sfc->clk, sfc->speed_hz);
+	for (right = 0; right <= cell_max; right += step) {
+		int ret;
+
+		rockchip_sfc_set_delay_lines(sfc, right);
+		rockchip_sfc_pio_xfer(sfc, (void *)&id_temp, 3);
+		dev_dbg(bus, "dll read flash id:%x %x %x\n",
+			id_temp[0], id_temp[1], id_temp[2]);
+
+		ret = memcmp(&id, &id_temp, 3);
+		if (dll_valid && ret) {
+			right -= step;
+
+			break;
+		}
+		if (!dll_valid && !ret)
+			left = right;
+
+		if (!ret)
+			dll_valid = true;
+
+		/* Add cell_max to loop */
+		if (right == cell_max)
+			break;
+		if (right + step > cell_max)
+			right = cell_max - step;
+	}
+
+	if (dll_valid && (right - left) >= SFC_DLL_TRANING_VALID_WINDOW) {
+		if (left == 0 && right < cell_max)
+			sfc->dll_cells = left + (right - left) * 2 / 5;
+		else
+			sfc->dll_cells = left + (right - left) / 2;
+	} else {
+		sfc->dll_cells = 0;
+	}
+
+	if (sfc->dll_cells) {
+		dev_dbg(bus, "%d %d %d dll training success in %dHz max_cells=%u sfc_ver=%d\n",
+			left, right, sfc->dll_cells, sfc->speed_hz,
+			cell_max, rockchip_sfc_get_version(sfc));
+		rockchip_sfc_set_delay_lines(sfc, sfc->dll_cells);
+	} else {
+		dev_err(bus, "%d %d dll training failed in %dHz, reduce the frequency\n",
+			left, right, sfc->speed_hz);
+		rockchip_sfc_set_delay_lines(sfc, 0);
+		clk_set_rate(&sfc->clk, SFC_DLL_THRESHOLD_RATE);
+		sfc->speed_hz = SFC_DLL_THRESHOLD_RATE;
+	}
+}
+#endif
+
 static int rockchip_sfc_xfer(struct udevice *dev, unsigned int bitlen,
 			     const void *dout, void *din, unsigned long flags)
 {
@@ -699,49 +775,20 @@ static int rockchip_sfc_set_speed(struct udevice *bus, uint speed)
 	if (speed > sfc->max_freq)
 		speed = sfc->max_freq;
 
-	sfc->speed_hz = speed;
+	if (speed == sfc->speed_hz)
+		return 0;
+
 #if CONFIG_IS_ENABLED(CLK)
+	clk_set_rate(&sfc->clk, speed);
+	sfc->speed_hz = speed;
 	if (rockchip_sfc_get_version(sfc) >= SFC_VER_4 &&
-	    sfc->speed_hz > SFC_DLL_THRESHOLD_RATE) {
-		u8 id[3], id_temp[3];
-		int right, left = -1;
-
-		sfc->cmd = 0x9f;
-		sfc->addr = 0;
-		sfc->addr_bits = 0;
-		sfc->addr_xbits_ext = 8;
-		sfc->dummy_bits = 0;
-		sfc->rw = 0;
-		clk_set_rate(&sfc->clk, SFC_DLL_THRESHOLD_RATE);
-		rockchip_sfc_read(sfc, 0, (void *)&id, 3);
-
-		clk_set_rate(&sfc->clk, sfc->speed_hz);
-		sfc->speed_hz = clk_get_rate(&sfc->clk);
-		if (sfc->speed_hz > SFC_DLL_THRESHOLD_RATE) {
-			for (right = 10; right <= sfc->max_dll_cells; right += 10) {
-				rockchip_sfc_set_delay_lines(sfc, right);
-				rockchip_sfc_read(sfc, 0, (void *)&id_temp, 3);
-				SFC_DBG("sfc dll %d id= %x %x %x\n", right,
-					id_temp[0], id_temp[1], id_temp[2]);
-				if (left == -1 && !memcmp(&id, &id_temp, 3))
-					left = right;
-				else if (left >= 0 && memcmp(&id, &id_temp, 3))
-					break;
-			}
-
-			if (left >= 0 && (right - left > 50)) {
-				rockchip_sfc_set_delay_lines(sfc, (u32)((right + left) / 2));
-			} else {
-				rockchip_sfc_disable_delay_lines(sfc);
-				sfc->speed_hz = SFC_DLL_THRESHOLD_RATE;
-			}
-		}
-	} else if (rockchip_sfc_get_version(sfc) >= SFC_VER_4) {
-		rockchip_sfc_disable_delay_lines(sfc);
-	}
-
-	clk_set_rate(&sfc->clk, sfc->speed_hz);
+	    clk_get_rate(&sfc->clk) > SFC_DLL_THRESHOLD_RATE)
+		rockchip_sfc_delay_lines_training(bus, sfc);
+	else if (rockchip_sfc_get_version(sfc) >= SFC_VER_4)
+		rockchip_sfc_set_delay_lines(sfc, 0);
 	SFC_DBG("%s clk= %ld\n", __func__, clk_get_rate(&sfc->clk));
+#else
+	pr_err("%s failed, CLK not support\n", __func__);
 #endif
 	return 0;
 }

commit 9689b7dd4f457171bf295756bb0fe433cbc03d7f
Author: Ovidiu Panait <ovidiu.panait@windriver.com>
Date:   Mon Dec 14 19:06:50 2020 +0200

    UPSTREAM: spi: spi-uclass: Fix spi_claim_bus() speed/mode setup logic
    
    Currently, when different spi slaves claim the bus consecutively using
    spi_claim_bus(), spi_set_speed_mode() will only be executed on the first
    two calls, leaving the bus in a bad state starting with the third call.
    
    This patch drops spi_slave->speed member and adds caching of bus
    speed/mode in dm_spi_bus struct. It also updates spi_claim_bus() to call
    spi_set_speed_mode() if either speed or mode is different from what the
    bus is currently configured for. Current behavior is to only take into
    account the speed, but not the mode, which seems wrong.
    
    Fixes: 60e2809a848 ("dm: spi: Avoid setting the speed with every transfer")
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Reported-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
    Reported-by: Moshe, Yaniv <yanivmo@amazon.com>
    Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
    (cherry picked from commit 741280e9accd3da20650a04f716538944d878482)
    Change-Id: I29912ceaf1e252fe6f124aea69190ef5e6160119
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c
index 70268f3c2f..2a0c212e6c 100644
--- a/drivers/spi/spi-uclass.c
+++ b/drivers/spi/spi-uclass.c
@@ -51,23 +51,28 @@ int dm_spi_claim_bus(struct udevice *dev)
 	struct dm_spi_ops *ops = spi_get_ops(bus);
 	struct dm_spi_bus *spi = dev_get_uclass_priv(bus);
 	struct spi_slave *slave = dev_get_parent_priv(dev);
-	int speed;
+	uint speed, mode;
 
 	speed = slave->max_hz;
+	mode = slave->mode;
+
 	if (spi->max_hz) {
 		if (speed)
-			speed = min(speed, (int)spi->max_hz);
+			speed = min(speed, spi->max_hz);
 		else
 			speed = spi->max_hz;
 	}
 	if (!speed)
 		speed = SPI_DEFAULT_SPEED_HZ;
-	if (speed != slave->speed) {
+
+	if (speed != spi->speed || mode != spi->mode) {
 		int ret = spi_set_speed_mode(bus, speed, slave->mode);
 
 		if (ret)
 			return log_ret(ret);
-		slave->speed = speed;
+
+		spi->speed = speed;
+		spi->mode = mode;
 	}
 
 	return log_ret(ops->claim_bus ? ops->claim_bus(dev) : 0);
@@ -324,6 +329,7 @@ int spi_get_bus_and_cs(int busnum, int cs, int speed, int mode,
 {
 	struct udevice *bus, *dev;
 	struct dm_spi_slave_platdata *plat;
+	struct dm_spi_bus *bus_data;
 	struct spi_slave *slave;
 	bool created = false;
 	int ret;
@@ -381,12 +387,13 @@ int spi_get_bus_and_cs(int busnum, int cs, int speed, int mode,
 	}
 
 	slave = dev_get_parent_priv(dev);
+	bus_data = dev_get_uclass_priv(bus);
 
 	/*
 	 * In case the operation speed is not yet established by
 	 * dm_spi_claim_bus() ensure the bus is configured properly.
 	 */
-	if (!slave->speed) {
+	if (!bus_data->speed) {
 		ret = spi_claim_bus(slave);
 		if (ret)
 			goto err;
diff --git a/include/spi.h b/include/spi.h
index f8bedf69dd..2442559aa3 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -40,10 +40,22 @@
 
 #define SPI_DEFAULT_WORDLEN	8
 
-#ifdef CONFIG_DM_SPI
-/* TODO(sjg@chromium.org): Remove this and use max_hz from struct spi_slave */
+/**
+ * struct dm_spi_bus - SPI bus info
+ *
+ * This contains information about a SPI bus. To obtain this structure, use
+ * dev_get_uclass_priv(bus) where bus is the SPI bus udevice.
+ *
+ * @max_hz:	Maximum speed that the bus can tolerate.
+ * @speed:	Current bus speed. This is 0 until the bus is first claimed.
+ * @mode:	Current bus mode. This is 0 until the bus is first claimed.
+ *
+ * TODO(sjg@chromium.org): Remove this and use max_hz from struct spi_slave.
+ */
 struct dm_spi_bus {
 	uint max_hz;
+	uint speed;
+	uint mode;
 };
 
 /**
@@ -66,8 +78,6 @@ struct dm_spi_slave_platdata {
 	uint mode;
 };
 
-#endif /* CONFIG_DM_SPI */
-
 /**
  * struct spi_slave - Representation of a SPI slave
  *
@@ -83,8 +93,6 @@ struct dm_spi_slave_platdata {
  *
  * @dev:		SPI slave device
  * @max_hz:		Maximum speed for this slave
- * @speed:		Current bus speed. This is 0 until the bus is first
- *			claimed.
  * @bus:		ID of the bus that the slave is attached to. For
  *			driver model this is the sequence number of the SPI
  *			bus (bus->seq) so does not need to be stored
@@ -102,7 +110,6 @@ struct spi_slave {
 #ifdef CONFIG_DM_SPI
 	struct udevice *dev;	/* struct spi_slave is dev->parentdata */
 	uint max_hz;
-	uint speed;
 #else
 	unsigned int bus;
 	unsigned int cs;

commit 86348c7b241089d4a08df5db7da919385a63d961
Author: Faiz Abbas <faiz_abbas@ti.com>
Date:   Mon Sep 14 12:11:14 2020 +0530

    UPSTREAM: spi: spi-uclass: Block dm_scan_fdt_dev with OF_CONTROL to prevent build failures
    
    There are devices which don't use OF_CONTROL or OF_PLATDATA but instead
    rely on statically defined platdata. Block dm_scan_fdt_dev() with both
    configs to avoid build failures under this condition.
    
    Change-Id: Ie3e5ff4c6174d995e8108b018fe35784313ff4c6
    Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
    Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 280af011563574844fa3c20acd2cbbd7ee669da8)

diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c
index e64a800c4f..70268f3c2f 100644
--- a/drivers/spi/spi-uclass.c
+++ b/drivers/spi/spi-uclass.c
@@ -497,7 +497,7 @@ UCLASS_DRIVER(spi) = {
 	.id		= UCLASS_SPI,
 	.name		= "spi",
 	.flags		= DM_UC_FLAG_SEQ_ALIAS,
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
 	.post_bind	= dm_scan_fdt_dev,
 #endif
 	.post_probe	= spi_post_probe,

commit 305d7e6eb355be2c9fdd766a19e8873f59ce6378
Author: Vignesh Raghavendra <vigneshr@ti.com>
Date:   Thu Dec 5 15:46:05 2019 +0530

    UPSTREAM: mtd: spi-nor-core: Add octal mode support
    
    Add support for Octal flash devices. Octal flash devices use 8 IO lines
    for data transfer. Currently only 1-1-8 Octal Read mode is supported.
    
    Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
    Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
    (cherry picked from commit 658df8bd946493e7fa7b0048a3a9bd658a1f4518)
    Change-Id: I1fabb494a963ceccb873c8a04fc3241eddd65069
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index ba6c6b68dc..19b5c7d220 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -38,7 +38,7 @@ struct flash_info {
 	u16		page_size;
 	u16		addr_width;
 
-	u16		flags;
+	u32		flags;
 #define SECT_4K			BIT(0)	/* SPINOR_OP_BE_4K works uniformly */
 #define SPI_NOR_NO_ERASE	BIT(1)	/* No erase command needed */
 #define SST_WRITE		BIT(2)	/* use SST byte programming */
@@ -67,6 +67,7 @@ struct flash_info {
 #define SPI_NOR_SKIP_SFDP	BIT(13)	/* Skip parsing of SFDP tables */
 #define USE_CLSR		BIT(14)	/* use CLSR command */
 #define SPI_NOR_HAS_SST26LOCK	BIT(15)	/* Flash supports lock/unlock via BPR */
+#define SPI_NOR_OCTAL_READ      BIT(16) /* Flash supports Octal Read */
 };
 
 extern const struct flash_info spi_nor_ids[];
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 5a8c084255..9b726be5d2 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -251,6 +251,8 @@ static u8 spi_nor_convert_3to4_read(u8 opcode)
 		{ SPINOR_OP_READ_1_2_2,	SPINOR_OP_READ_1_2_2_4B },
 		{ SPINOR_OP_READ_1_1_4,	SPINOR_OP_READ_1_1_4_4B },
 		{ SPINOR_OP_READ_1_4_4,	SPINOR_OP_READ_1_4_4_4B },
+		{ SPINOR_OP_READ_1_1_8,	SPINOR_OP_READ_1_1_8_4B },
+		{ SPINOR_OP_READ_1_8_8,	SPINOR_OP_READ_1_8_8_4B },
 
 		{ SPINOR_OP_READ_1_1_1_DTR,	SPINOR_OP_READ_1_1_1_DTR_4B },
 		{ SPINOR_OP_READ_1_2_2_DTR,	SPINOR_OP_READ_1_2_2_DTR_4B },
@@ -267,6 +269,8 @@ static u8 spi_nor_convert_3to4_program(u8 opcode)
 		{ SPINOR_OP_PP,		SPINOR_OP_PP_4B },
 		{ SPINOR_OP_PP_1_1_4,	SPINOR_OP_PP_1_1_4_4B },
 		{ SPINOR_OP_PP_1_4_4,	SPINOR_OP_PP_1_4_4_4B },
+		{ SPINOR_OP_PP_1_1_8,	SPINOR_OP_PP_1_1_8_4B },
+		{ SPINOR_OP_PP_1_8_8,	SPINOR_OP_PP_1_8_8_4B },
 	};
 
 	return spi_nor_convert_opcode(opcode, spi_nor_3to4_program,
@@ -2121,6 +2125,13 @@ static int spi_nor_init_params(struct spi_nor *nor,
 					  SNOR_PROTO_1_1_4);
 	}
 
+	if (info->flags & SPI_NOR_OCTAL_READ) {
+		params->hwcaps.mask |= SNOR_HWCAPS_READ_1_1_8;
+		spi_nor_set_read_settings(&params->reads[SNOR_CMD_READ_1_1_8],
+					  0, 8, SPINOR_OP_READ_1_1_8,
+					  SNOR_PROTO_1_1_8);
+	}
+
 	/* Page Program settings. */
 	params->hwcaps.mask |= SNOR_HWCAPS_PP;
 	spi_nor_set_pp_settings(&params->page_programs[SNOR_CMD_PP],
@@ -2428,7 +2439,14 @@ int spi_nor_scan(struct spi_nor *nor)
 	nor->read_reg = spi_nor_read_reg;
 	nor->write_reg = spi_nor_write_reg;
 
-	if (spi->mode & SPI_RX_QUAD) {
+	if (spi->mode & SPI_RX_OCTAL) {
+		hwcaps.mask |= SNOR_HWCAPS_READ_1_1_8;
+
+		if (spi->mode & SPI_TX_OCTAL)
+			hwcaps.mask |= (SNOR_HWCAPS_READ_1_8_8 |
+					SNOR_HWCAPS_PP_1_1_8 |
+					SNOR_HWCAPS_PP_1_8_8);
+	} else if (spi->mode & SPI_RX_QUAD) {
 		hwcaps.mask |= SNOR_HWCAPS_READ_1_1_4;
 
 		if (spi->mode & SPI_TX_QUAD)
diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c
index 121de3b06b..f9e495b11f 100644
--- a/drivers/spi/spi-mem.c
+++ b/drivers/spi/spi-mem.c
@@ -123,6 +123,12 @@ static int spi_check_buswidth_req(struct spi_slave *slave, u8 buswidth, bool tx)
 			return 0;
 
 		break;
+	case 8:
+		if ((tx && (mode & SPI_TX_OCTAL)) ||
+		    (!tx && (mode & SPI_RX_OCTAL)))
+			return 0;
+
+		break;
 
 	default:
 		break;
diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c
index dfb2b241fe..e64a800c4f 100644
--- a/drivers/spi/spi-uclass.c
+++ b/drivers/spi/spi-uclass.c
@@ -462,6 +462,9 @@ int spi_slave_ofdata_to_platdata(struct udevice *dev,
 	case 4:
 		mode |= SPI_TX_QUAD;
 		break;
+	case 8:
+		mode |= SPI_TX_OCTAL;
+		break;
 	default:
 		warn_non_spl("spi-tx-bus-width %d not supported\n", value);
 		break;
@@ -477,6 +480,9 @@ int spi_slave_ofdata_to_platdata(struct udevice *dev,
 	case 4:
 		mode |= SPI_RX_QUAD;
 		break;
+	case 8:
+		mode |= SPI_RX_OCTAL;
+		break;
 	default:
 		warn_non_spl("spi-rx-bus-width %d not supported\n", value);
 		break;
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index 709b49d393..031dd8a04b 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -47,9 +47,13 @@
 #define SPINOR_OP_READ_1_2_2	0xbb	/* Read data bytes (Dual I/O SPI) */
 #define SPINOR_OP_READ_1_1_4	0x6b	/* Read data bytes (Quad Output SPI) */
 #define SPINOR_OP_READ_1_4_4	0xeb	/* Read data bytes (Quad I/O SPI) */
+#define SPINOR_OP_READ_1_1_8	0x8b    /* Read data bytes (Octal Output SPI) */
+#define SPINOR_OP_READ_1_8_8	0xcb    /* Read data bytes (Octal I/O SPI) */
 #define SPINOR_OP_PP		0x02	/* Page program (up to 256 bytes) */
 #define SPINOR_OP_PP_1_1_4	0x32	/* Quad page program */
 #define SPINOR_OP_PP_1_4_4	0x38	/* Quad page program */
+#define SPINOR_OP_PP_1_1_8	0x82    /* Octal page program */
+#define SPINOR_OP_PP_1_8_8	0xc2    /* Octal page program */
 #define SPINOR_OP_BE_4K		0x20	/* Erase 4KiB block */
 #define SPINOR_OP_BE_4K_PMC	0xd7	/* Erase 4KiB block on PMC chips */
 #define SPINOR_OP_BE_32K	0x52	/* Erase 32KiB block */
@@ -70,9 +74,13 @@
 #define SPINOR_OP_READ_1_2_2_4B	0xbc	/* Read data bytes (Dual I/O SPI) */
 #define SPINOR_OP_READ_1_1_4_4B	0x6c	/* Read data bytes (Quad Output SPI) */
 #define SPINOR_OP_READ_1_4_4_4B	0xec	/* Read data bytes (Quad I/O SPI) */
+#define SPINOR_OP_READ_1_1_8_4B	0x7c    /* Read data bytes (Octal Output SPI) */
+#define SPINOR_OP_READ_1_8_8_4B	0xcc    /* Read data bytes (Octal I/O SPI) */
 #define SPINOR_OP_PP_4B		0x12	/* Page program (up to 256 bytes) */
 #define SPINOR_OP_PP_1_1_4_4B	0x34	/* Quad page program */
 #define SPINOR_OP_PP_1_4_4_4B	0x3e	/* Quad page program */
+#define SPINOR_OP_PP_1_1_8_4B	0x84    /* Octal page program */
+#define SPINOR_OP_PP_1_8_8_4B	0x8e    /* Octal page program */
 #define SPINOR_OP_BE_4K_4B	0x21	/* Erase 4KiB block */
 #define SPINOR_OP_BE_32K_4B	0x5c	/* Erase 32KiB block */
 #define SPINOR_OP_SE_4B		0xdc	/* Sector erase (usually 64KiB) */
diff --git a/include/spi.h b/include/spi.h
index cb64a3987a..f8bedf69dd 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -31,6 +31,8 @@
 #define SPI_RX_SLOW	BIT(11)			/* receive with 1 wire slow */
 #define SPI_RX_DUAL	BIT(12)			/* receive with 2 wires */
 #define SPI_RX_QUAD	BIT(13)			/* receive with 4 wires */
+#define SPI_TX_OCTAL	BIT(14)			/* transmit with 8 wires */
+#define SPI_RX_OCTAL	BIT(15)			/* receive with 8 wires */
 #define SPI_DMA_PREPARE	BIT(24)			/* dma transfer skip waiting idle */
 
 /* Header byte that marks the start of the message */

commit 8fe90f18ef92ec1f921d266107d3bfb402d058ed
Author: Su Baocheng <baocheng.su@siemens.com>
Date:   Mon Jan 25 10:59:05 2021 +0800

    UPSTREAM: mtd: spi-nor-ids: Add support of flash protection to w25q128
    
    The NOR flash w25q128 denoted by JEDEC ID 0xef4018 actually represents
    various models. From Winbond's website, I could only find 3 types of
    them:
    
        W25Q128JV-IQ/JQ
        datasheet:https://www.winbond.com/resource-files/
    w25q128jv%20revg%2004082019%20plus.pdf
    
        W25Q128FV (SPI Mode)
        datasheet: https://www.winbond.com/resource-files/
    w25q128fv%20rev.m%2005132016%20kms.pdf
    
        W25Q128BV
        datesheet: https://www.winbond.com/resource-files/
    w25q128bv_revh_100313_wo_automotive.pdf
    
    According to the datasheets, all of these 3 types support BP(0,1,2) and
    TB bits in the status register (SR), so it could reuse the flash
    protection logic for ST Micro.
    
    So it should be safe to add the SPI_NOR_HAS_LOCK and SPI_NOR_HAS_TB
    flags to the w25q128 entry of spi_nor_ids table.
    
    Change-Id: I99b3db2d3199f3a9b51eb0907bac0db0bfaed3fd
    Signed-off-by: Su Baocheng <baocheng.su@siemens.com>
    [jagan: remove comments in spi-nor-ids.c]
    Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
    Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit de76ae36f622177e9af38b158d7f2f753d826d2c)

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 33137c7998..45b73ad8d4 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -329,7 +329,10 @@ const struct flash_info spi_nor_ids[] = {
 	{ INFO("w25q80bl", 0xef4014, 0, 64 * 1024,  16, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 	{ INFO("w25q16cl", 0xef4015, 0, 64 * 1024,  32, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 	{ INFO("w25q64cv", 0xef4017, 0, 64 * 1024,  128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-	{ INFO("w25q128", 0xef4018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{ INFO("w25q128", 0xef4018, 0, 64 * 1024, 256,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+	},
 	{ INFO("w25q256", 0xef4019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 	{ INFO("w25m512jw", 0xef6119, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 	{ INFO("w25m512jv", 0xef7119, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },

commit f508c90711e85bc833d16e3fd948bfa843901c21
Author: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Date:   Sat Oct 31 19:20:12 2020 +0300

    UPSTREAM: mtd: spi-nor-ids: Add Gigadevice GD25LQ64C
    
    Add GD25LQ24C 64Mbit chip to spi-nor id table. This chip is used on
    rk3399-gru-kevin:
    
        => sf probe
        SF: Detected gd25lq64c with page size 256 Bytes, erase size 4 KiB, total 8 MiB
        => sf erase 0x600000 0x200000
        SF: 2097152 bytes @ 0x600000 Erased: OK
        => sf test 0x700000 0x1000
        SPI flash test:
        0 erase: 52 ticks, 76 KiB/s 0.608 Mbps
        1 check: 5 ticks, 800 KiB/s 6.400 Mbps
        2 write: 14 ticks, 285 KiB/s 2.280 Mbps
        3 read: 3 ticks, 1333 KiB/s 10.664 Mbps
        Test passed
        0 erase: 52 ticks, 76 KiB/s 0.608 Mbps
        1 check: 5 ticks, 800 KiB/s 6.400 Mbps
        2 write: 14 ticks, 285 KiB/s 2.280 Mbps
        3 read: 3 ticks, 1333 KiB/s 10.664 Mbps
    
    The values are the same as in Linux, except adjusted for the U-Boot
    definition of INFO().
    
    Change-Id: Iae5f5b41b0ceacbedabb2b55fc068080733718bb
    Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
    Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit eb69d797d36788ede4304b42bb981c61aa1c2ad3)

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index db22195c93..33137c7998 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -107,6 +107,11 @@ const struct flash_info spi_nor_ids[] = {
 			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
 			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
 	},
+	{
+		INFO("gd25lq64c", 0xc86017, 0, 64 * 1024, 128,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+	},
 	{
 		INFO("gd25q128", 0xc84018, 0, 64 * 1024, 256,
 			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |

commit a24e7c1678595048480c95d26644a0e459480f88
Author: Hongwei Zhang <hongweiz@ami.com>
Date:   Mon Dec 7 17:40:01 2020 -0500

    UPSTREAM: mtd: spi-nor-ids: add Micron MT25QL01G flash
    
    Add Micron MT25QL01G flash, used on AST2600 board.
    
    Change-Id: I0900f08a5fe9d119fcd351e4f0f886d002a9e84e
    Signed-off-by: Hongwei Zhang <hongweiz@ami.com>
    Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 936a645609145363b9580adeda831ab3d9ac1d78)

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 6e0dffe721..db22195c93 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -190,6 +190,7 @@ const struct flash_info spi_nor_ids[] = {
 	{ INFO("n25q512ax3",  0x20ba20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
 	{ INFO("n25q00",      0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
 	{ INFO("n25q00a",     0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
+	{ INFO("mt25ql01g",   0x21ba20, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
 	{ INFO("mt25qu02g",   0x20bb22, 0, 64 * 1024, 4096, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
 	{ INFO("mt35xu512aba", 0x2c5b1a, 0,  128 * 1024,  512, USE_FSR | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) },
 	{ INFO("mt35xu02g",  0x2c5b1c, 0, 128 * 1024,  2048, USE_FSR | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) },

commit fbcce461aaae56579fc117d5a8453f2d0a60ea97
Author: Robert Marko <robert.marko@sartura.hr>
Date:   Fri Oct 23 14:22:38 2020 +0530

    UPSTREAM: mtd: spi-nor-ids: Add SECT_4K to mx25l12805d
    
    According to the mx25l12805d datasheet it supports using 4K or 64K sectors.
    So lets add the SECT_4K to enable 4K sector usage.
    
    Datasheet: https://www.mxic.com.tw/Lists/Datasheet/Attachments/7321/MX25L12805D,%203V,%20128Mb,%20v1.2.pdf
    
    Change-Id: I5609e42ae6d54a9151ef93dcc140fae0701c74e6
    Signed-off-by: Robert Marko <robert.marko@sartura.hr>
    Cc: Luka Perkov <luka.perkov@sartura.hr>
    Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit d1b6b942f8c0d20150987a3437031c35e64fecb7)

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index f9301ea62b..6e0dffe721 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -155,7 +155,7 @@ const struct flash_info spi_nor_ids[] = {
 	{ INFO("mx25u1635e",  0xc22535, 0, 64 * 1024,  32, SECT_4K) },
 	{ INFO("mx25u3235f",  0xc22536, 0, 4 * 1024,  1024, SECT_4K) },
 	{ INFO("mx25u6435f",  0xc22537, 0, 64 * 1024, 128, SECT_4K) },
-	{ INFO("mx25l12805d", 0xc22018, 0, 64 * 1024, 256, 0) },
+	{ INFO("mx25l12805d", 0xc22018, 0, 64 * 1024, 256, SECT_4K) },
 	{ INFO("mx25u12835f", 0xc22538, 0, 64 * 1024, 256, SECT_4K) },
 	{ INFO("mx25l12855e", 0xc22618, 0, 64 * 1024, 256, 0) },
 	{ INFO("mx25l25635e", 0xc22019, 0, 64 * 1024, 512, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },

commit 68109669f2aac3f451627dbe51821bafb9b5a7e3
Author: Biju Das <biju.das.jz@bp.renesas.com>
Date:   Tue Sep 29 11:04:02 2020 +0100

    UPSTREAM: mtd: spi-nor-ids: Add Winbond W25M512JW flash entry
    
    Add Winbond W25M512JW flash device description.
    
    Change-Id: I982683ff613fc84794dbe4430c09a1fdeccce277
    Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
    Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
    Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 9dddead735389c46b85840a80a0be312a4b35672)

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 0776800f05..f9301ea62b 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -325,6 +325,7 @@ const struct flash_info spi_nor_ids[] = {
 	{ INFO("w25q64cv", 0xef4017, 0, 64 * 1024,  128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 	{ INFO("w25q128", 0xef4018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 	{ INFO("w25q256", 0xef4019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{ INFO("w25m512jw", 0xef6119, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 	{ INFO("w25m512jv", 0xef7119, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 #endif
 #ifdef CONFIG_SPI_FLASH_XMC

commit da5d56ff49d22fe970ca3b49f5502db3dc3d427e
Author: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Date:   Thu Sep 17 15:50:30 2020 +0100

    UPSTREAM: mtd: spi-nor-ids: Add Winbond W25M512JV flash entry
    
    Add Winbond W25M512JV flash device description.
    
    Linux already has the flash entry present. A snippet below:
    { "w25m512jv", INFO(0xef7119, 0, 64 * 1024, 1024...},
    
    Change-Id: I3ab1c52afc384073083b0e349f752df26499ef7a
    Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
    Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
    Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 1910aca0f1a34d3762145e4ec4b718b9dace115f)

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index a144108adc..0776800f05 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -325,6 +325,7 @@ const struct flash_info spi_nor_ids[] = {
 	{ INFO("w25q64cv", 0xef4017, 0, 64 * 1024,  128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 	{ INFO("w25q128", 0xef4018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 	{ INFO("w25q256", 0xef4019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{ INFO("w25m512jv", 0xef7119, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 #endif
 #ifdef CONFIG_SPI_FLASH_XMC
 	/* XMC (Wuhan Xinxin Semiconductor Manufacturing Corp.) */

commit fc8425afeb32a90a209259e75b66f91eaae88158
Author: Michael Walle <michael@walle.cc>
Date:   Tue Dec 1 00:12:39 2020 +0100

    UPSTREAM: mtd: spi-nor-ids: add Winbond W25Q32JW-IM flash
    
    The Kontron SMARC-sAL28 board uses that flash.
    
    This is the same change as in the linux commit f3418718c0ec ("mtd:
    spi-nor: Add support for w25q32jwm").
    
    Change-Id: I877e19340b23a31ff51e209163002b0afca8715a
    Signed-off-by: Michael Walle <michael@walle.cc>
    Reported-by: Leo Krueger <leo.krueger@zal.aero>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 382985675c7576d05969f61edbe14fb0a5ef1f0a)

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 72c454b320..a144108adc 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -283,6 +283,11 @@ const struct flash_info spi_nor_ids[] = {
 			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
 			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
 	},
+	{
+		INFO("w25q32jwm", 0xef8016, 0, 64 * 1024,  64,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+	},
 	{ INFO("w25x64", 0xef3017, 0, 64 * 1024, 128, SECT_4K) },
 	{
 		INFO("w25q64dw", 0xef6017, 0, 64 * 1024, 128,

commit c276a8da6665b24f797fa4c6de8d3143eb90b283
Author: Vladimir Vid <vladimir.vid@sartura.hr>
Date:   Mon Sep 7 08:54:58 2020 +0200

    UPSTREAM: mtd: spi-nor-ids: add support for Macronix mx25u12835f flash
    
    Some of Marvell A3700 boards use mx25u12835f, specifically uDPU
    and ESPRESSObin v7.
    
    Signed-off-by: Vladimir Vid <vladimir.vid@sartura.hr>
    [a.heider: adapt commit message to mainline]
    Signed-off-by: Andre Heider <a.heider@gmail.com>
    (cherry picked from commit 2781c71873fc4767b958a72eea12d3d49a60cdbf)
    Change-Id: Iece7d3910597b7e48ba9b6abfbac2160958be223
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index aa38208975..72c454b320 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -155,7 +155,8 @@ const struct flash_info spi_nor_ids[] = {
 	{ INFO("mx25u1635e",  0xc22535, 0, 64 * 1024,  32, SECT_4K) },
 	{ INFO("mx25u3235f",  0xc22536, 0, 4 * 1024,  1024, SECT_4K) },
 	{ INFO("mx25u6435f",  0xc22537, 0, 64 * 1024, 128, SECT_4K) },
-	{ INFO("mx25l12805d", 0xc22018, 0, 64 * 1024, 256, SPI_NOR_QUAD_READ) },
+	{ INFO("mx25l12805d", 0xc22018, 0, 64 * 1024, 256, 0) },
+	{ INFO("mx25u12835f", 0xc22538, 0, 64 * 1024, 256, SECT_4K) },
 	{ INFO("mx25l12855e", 0xc22618, 0, 64 * 1024, 256, 0) },
 	{ INFO("mx25l25635e", 0xc22019, 0, 64 * 1024, 512, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 	{ INFO("mx25u25635f", 0xc22539, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },

commit 55d3d8bd0038cf81a6d4860246638d0289845192
Author: Ye Li <ye.li@nxp.com>
Date:   Sun May 3 21:02:56 2020 +0800

    UPSTREAM: sf: Add Macronix MX25R6435F SPI NOR flash to flash parameters array
    
    On i.mx7ulp EVK board, we use MX25R6435F NOR flash, add its parameters
    and IDs to flash parameter array. Otherwise, the flash probe will fails.
    
    Change-Id: I11ad51f66a0ff4fb04f511a0732402f78d7ce95c
    Signed-off-by: Ye Li <ye.li@nxp.com>
    Signed-off-by: Peng Fan <peng.fan@nxp.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 8af1caa23728ef689d095eec1ec4e6f1d46f50e4)

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 2344808bc4..aa38208975 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -165,6 +165,7 @@ const struct flash_info spi_nor_ids[] = {
 	{ INFO("mx66u2g45g",  0xc2253c, 0, 64 * 1024, 4096, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
 	{ INFO("mx66l1g45g",  0xc2201b, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 	{ INFO("mx25l1633e", 0xc22415, 0, 64 * 1024,   32, SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES | SECT_4K) },
+	{ INFO("mx25r6435f", 0xc22817, 0, 64 * 1024,   128,  SECT_4K) },
 #endif
 
 #ifdef CONFIG_SPI_FLASH_STMICRO		/* STMICRO */

commit c758f48a508071d57d9e35688395eed530169d08
Author: Kuldeep Singh <kuldeep.singh@nxp.com>
Date:   Fri Apr 3 12:27:42 2020 +0530

    UPSTREAM: mtd: spi-nor-ids: Add Spansion s25fs512s flash entry
    
    Spansion "s25fs512s" flash is incorrectly decoded as "s25fl512s" on
    various platforms as former is not present. Add the entry.
    
    Linux already has both the flashes present. A snippet below:
    { "s25fl512s",  INFO6(0x010220, 0x4d0080, 256 * 1024, 256...},
    { "s25fs512s",  INFO6(0x010220, 0x4d0081, 256 * 1024, 256...},
    
    Change-Id: I8748738c91c726fde27ae7266427149083cac250
    Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
    Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 685465fbba4f502190f9d1ccd28443f5e0e4ec20)

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index f16dac67c7..2344808bc4 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -200,7 +200,8 @@ const struct flash_info spi_nor_ids[] = {
 	{ INFO("s25sl064p",  0x010216, 0x4d00,  64 * 1024, 128, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 	{ INFO("s25fl256s0", 0x010219, 0x4d00, 256 * 1024, 128, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
 	{ INFO("s25fl256s1", 0x010219, 0x4d01,  64 * 1024, 512, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
-	{ INFO6("s25fl512s",  0x010220, 0x4d0081, 256 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
+	{ INFO6("s25fl512s",  0x010220, 0x4d0080, 256 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
+	{ INFO6("s25fs512s",  0x010220, 0x4d0081, 256 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
 	{ INFO("s25fl512s_256k",  0x010220, 0x4d00, 256 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
 	{ INFO("s25fl512s_64k",  0x010220, 0x4d01, 64 * 1024, 1024, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
 	{ INFO("s25fl512s_512k", 0x010220, 0x4f00, 256 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },

commit ca5b034a22d0bf752882b177011a0b841467206f
Author: Jagan Teki <jagan@amarulasolutions.com>
Date:   Mon Apr 20 15:36:07 2020 +0530

    UPSTREAM: mtd: spi-nor-ids: Enable 4B_OPCODES for is25wp256
    
    IS25WP256 flash chips do support 4byte address opcodes,
    so enable support for it.
    
    Change-Id: Ib373d33238f1547f55de666c0cc30c57a4834446
    Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
    Reviewed-by: Sagar Kadam <sagar.kadam@sifive.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit a976238de39c6adc34b2505a147c93acc6e27124)

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 79ed237f68..f16dac67c7 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -140,7 +140,8 @@ const struct flash_info spi_nor_ids[] = {
 	{ INFO("is25wp128",  0x9d7018, 0, 64 * 1024, 256,
 			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 	{ INFO("is25wp256",  0x9d7019, 0, 64 * 1024, 512,
-			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+			SPI_NOR_4B_OPCODES) },
 #endif
 #ifdef CONFIG_SPI_FLASH_MACRONIX	/* MACRONIX */
 	/* Macronix */

commit 5980de33a5b412177f915ac8ef7194e1d2457d6b
Author: Bacem Daassi <Bacem.Daassi@cypress.com>
Date:   Fri Mar 27 19:58:14 2020 +0100

    UPSTREAM: mtd: spi-nor: Enable dual and quad read for s25fl256s0
    
    The s25fl256s0 supports dual and quad read like s25fl256s1.
    Enable it by adding SPI_NOR_DUAL_READ and SPI_NOR_QUAD_READ
    flags to the flash_info entry.
    Tested on real silicon and confirmed to be working.
    
    Change-Id: I96b2af924b860c26f455b3b9457eb9fa467a8164
    Signed-off-by: Bacem Daassi <Bacem.Daassi@cypress.com>
    Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 6f3b1f4a1dea5b733b03445c2a3eff2e4a47eafb)

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 792c1c1d22..79ed237f68 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -197,7 +197,7 @@ const struct flash_info spi_nor_ids[] = {
 	 */
 	{ INFO("s25sl032p",  0x010215, 0x4d00,  64 * 1024,  64, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 	{ INFO("s25sl064p",  0x010216, 0x4d00,  64 * 1024, 128, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-	{ INFO("s25fl256s0", 0x010219, 0x4d00, 256 * 1024, 128, USE_CLSR) },
+	{ INFO("s25fl256s0", 0x010219, 0x4d00, 256 * 1024, 128, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
 	{ INFO("s25fl256s1", 0x010219, 0x4d01,  64 * 1024, 512, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
 	{ INFO6("s25fl512s",  0x010220, 0x4d0081, 256 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
 	{ INFO("s25fl512s_256k",  0x010220, 0x4d00, 256 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },

commit 9228cbcf7fc4a78b7c935db9d65e6f60c356b319
Author: Kuldeep Singh <kuldeep.singh@nxp.com>
Date:   Sat Mar 14 18:23:54 2020 +0530

    UPSTREAM: mtd: spi-nor-ids: Enable SPI_NOR_OCTAL_READ flag for mt35xu*
    
    Commit 658df8bd9464 ("mtd: spi-nor-core: Add octal mode support")
    enables octal mode(1-1-8) support in spi-nor framework.
    
    mt35xu512aba and mt35xu02g supports SINGLE and OCTAL I/O. Hence, enable
    SPI_NOR_OCTAL_READ flag for these flashes.
    
    Change-Id: Idc6998fffc769a003e72c7e1d942fb0e22487c9c
    Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
    Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
    Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
    Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit cae3c7cc581c441d822e18c0d14dd3c230beef80)

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 8f6496621d..792c1c1d22 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -188,8 +188,8 @@ const struct flash_info spi_nor_ids[] = {
 	{ INFO("n25q00",      0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
 	{ INFO("n25q00a",     0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
 	{ INFO("mt25qu02g",   0x20bb22, 0, 64 * 1024, 4096, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
-	{ INFO("mt35xu512aba", 0x2c5b1a, 0,  128 * 1024,  512, USE_FSR | SPI_NOR_4B_OPCODES) },
-	{ INFO("mt35xu02g",  0x2c5b1c, 0, 128 * 1024,  2048, USE_FSR | SPI_NOR_4B_OPCODES) },
+	{ INFO("mt35xu512aba", 0x2c5b1a, 0,  128 * 1024,  512, USE_FSR | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) },
+	{ INFO("mt35xu02g",  0x2c5b1c, 0, 128 * 1024,  2048, USE_FSR | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) },
 #endif
 #ifdef CONFIG_SPI_FLASH_SPANSION	/* SPANSION */
 	/* Spansion/Cypress -- single (large) sector size only, at least

commit 2e43f28439ae77cee4cec73de82e377d81c71452
Author: Tom Warren <twarren@nvidia.com>
Date:   Fri Mar 20 14:20:09 2020 -0700

    UPSTREAM: mtd: spi: Add Macronix MX25U3235F device
    
    Add Macronix MX25U3235F flash device description.
    This is a 4MiB part.
    
    Change-Id: I578a86d13ffc2a66992119df1d25b79e47592363
    Signed-off-by: Tom Warren <twarren@nvidia.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 808e19362f054c8e7cac68e6cd306f7b85d166d3)

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 22e052a870..8f6496621d 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -152,6 +152,7 @@ const struct flash_info spi_nor_ids[] = {
 	{ INFO("mx25l6405d",  0xc22017, 0, 64 * 1024, 128, SECT_4K) },
 	{ INFO("mx25u2033e",  0xc22532, 0, 64 * 1024,   4, SECT_4K) },
 	{ INFO("mx25u1635e",  0xc22535, 0, 64 * 1024,  32, SECT_4K) },
+	{ INFO("mx25u3235f",  0xc22536, 0, 4 * 1024,  1024, SECT_4K) },
 	{ INFO("mx25u6435f",  0xc22537, 0, 64 * 1024, 128, SECT_4K) },
 	{ INFO("mx25l12805d", 0xc22018, 0, 64 * 1024, 256, SPI_NOR_QUAD_READ) },
 	{ INFO("mx25l12855e", 0xc22618, 0, 64 * 1024, 256, 0) },

commit b71ee5c3ad9b07efb27327515c2c739b84c7e317
Author: Fabio Estevam <fabio.estevam@nxp.com>
Date:   Mon Oct 21 10:51:16 2019 -0300

    UPSTREAM: spi-nor-ids: Add support for Adesto AT25SL321
    
    Add an entry for the Adesto AT25SL321 SPI NOR chip.
    
    This SPI NOR chip is found in the Embedded Artist i.MX7ULP COM board.
    
    Change-Id: I410dc8c4d8e1753f1b04b09b9931db91829d9cbe
    Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
    Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 395ec7418695e5ce23f8b48c01a1dbffd2e52d3f)

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 47d9adfba8..22e052a870 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -75,6 +75,7 @@ const struct flash_info spi_nor_ids[] = {
 	{ INFO("at45db161d",	0x1f2600, 0, 64 * 1024,  32, SECT_4K) },
 	{ INFO("at45db321d",	0x1f2700, 0, 64 * 1024,  64, SECT_4K) },
 	{ INFO("at45db641d",	0x1f2800, 0, 64 * 1024, 128, SECT_4K) },
+	{ INFO("at25sl321",	0x1f4216, 0, 64 * 1024,  64, SECT_4K) },
 	{ INFO("at26df081a", 	0x1f4501, 0, 64 * 1024,  16, SECT_4K) },
 #endif
 #ifdef CONFIG_SPI_FLASH_EON		/* EON */

commit 9ab66f42790182e88f7c37fe93135616c6c419f5
Author: Vignesh Raghavendra <vigneshr@ti.com>
Date:   Fri Oct 11 13:28:20 2019 +0530

    UPSTREAM: spi-nor: spi-nor-ids: Add USE_FSR flag for mt25q* and n25q* entry
    
    n25q* and mt25q* (both 256Mb and 512Mb) flashes support Flag status
    register that indicates various errors that may be encountered during
    erase/write operations. Therefore add USE_FSR flag wherever missing.
    
    Change-Id: Ib57ab0e3ab4949113029a6f6a3ab08985a852a0f
    Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
    Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
    Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
    Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 73d74b58812373b4973d1fd38fc37f4e6083ab91)

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index afa7c0023a..47d9adfba8 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -173,12 +173,13 @@ const struct flash_info spi_nor_ids[] = {
 	{ INFO("n25q064a",    0x20bb17, 0, 64 * 1024,  128, SECT_4K | SPI_NOR_QUAD_READ) },
 	{ INFO("n25q128a11",  0x20bb18, 0, 64 * 1024,  256, SECT_4K | SPI_NOR_QUAD_READ) },
 	{ INFO("n25q128a13",  0x20ba18, 0, 64 * 1024,  256, SECT_4K | SPI_NOR_QUAD_READ) },
-	{ INFO6("mt25ql256a",    0x20ba19, 0x104400, 64 * 1024,  512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
-	{ INFO("n25q256a",    0x20ba19, 0, 64 * 1024,  512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-	{ INFO6("mt25qu256a",  0x20bb19, 0x104400, 64 * 1024,  512, SECT_4K | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
-	{ INFO("n25q256ax1",  0x20bb19, 0, 64 * 1024,  512, SECT_4K | SPI_NOR_QUAD_READ) },
+	{ INFO6("mt25ql256a",    0x20ba19, 0x104400, 64 * 1024,  512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES | USE_FSR) },
+	{ INFO("n25q256a",    0x20ba19, 0, 64 * 1024,  512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_FSR) },
+	{ INFO6("mt25qu256a",  0x20bb19, 0x104400, 64 * 1024,  512, SECT_4K | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES | USE_FSR) },
+	{ INFO("n25q256ax1",  0x20bb19, 0, 64 * 1024,  512, SECT_4K | SPI_NOR_QUAD_READ | USE_FSR) },
 	{ INFO6("mt25qu512a",  0x20bb20, 0x104400, 64 * 1024, 1024,
-		 SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
+		 SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES |
+		 USE_FSR) },
 	{ INFO("n25q512a",    0x20bb20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
 	{ INFO6("mt25ql512a",  0x20ba20, 0x104400, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
 	{ INFO("n25q512ax3",  0x20ba20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },

commit 736113f20e9126a8387b5ffaba5f4086a27fd27d
Author: Vignesh Raghavendra <vigneshr@ti.com>
Date:   Fri Oct 11 13:28:19 2019 +0530

    UPSTREAM: spi-nor: spi-nor-ids: Add entries for mt25q variants
    
    mt25q* flashes support stateless 4 byte addressing opcodes. Add entries
    for the same. These flashes have bit 6 set in 5th byte of READ ID
    response when compared to n25q* variants.
    
    Change-Id: I1cd2c371bb97a255cdeafaf4d18eec24dd8b9f2f
    Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
    Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
    Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
    Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 8651593a8ce0c0599c993d76d2a927b125175cef)

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 1729dcbdb6..afa7c0023a 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -173,11 +173,14 @@ const struct flash_info spi_nor_ids[] = {
 	{ INFO("n25q064a",    0x20bb17, 0, 64 * 1024,  128, SECT_4K | SPI_NOR_QUAD_READ) },
 	{ INFO("n25q128a11",  0x20bb18, 0, 64 * 1024,  256, SECT_4K | SPI_NOR_QUAD_READ) },
 	{ INFO("n25q128a13",  0x20ba18, 0, 64 * 1024,  256, SECT_4K | SPI_NOR_QUAD_READ) },
+	{ INFO6("mt25ql256a",    0x20ba19, 0x104400, 64 * 1024,  512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
 	{ INFO("n25q256a",    0x20ba19, 0, 64 * 1024,  512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{ INFO6("mt25qu256a",  0x20bb19, 0x104400, 64 * 1024,  512, SECT_4K | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
 	{ INFO("n25q256ax1",  0x20bb19, 0, 64 * 1024,  512, SECT_4K | SPI_NOR_QUAD_READ) },
 	{ INFO6("mt25qu512a",  0x20bb20, 0x104400, 64 * 1024, 1024,
 		 SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
 	{ INFO("n25q512a",    0x20bb20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
+	{ INFO6("mt25ql512a",  0x20ba20, 0x104400, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
 	{ INFO("n25q512ax3",  0x20ba20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
 	{ INFO("n25q00",      0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
 	{ INFO("n25q00a",     0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },

commit 9e4a8bc8843a955f7b2c58c00f7c1527ac4b725c
Author: Vignesh Raghavendra <vigneshr@ti.com>
Date:   Fri Oct 11 13:28:18 2019 +0530

    UPSTREAM: spi-nor: spi-nor-ids: Disable SPI_NOR_4B_OPCODES for n25q512* and n25q256*
    
    Per datasheets of n25q256* and n25q512* not all variants of n25q256* and
    n25q512* support 4 Byte stateless addressing opcodes. Therefore drop
    SPI_NOR_4B_OPCODES flag from these entries
    
    Change-Id: I90c66d0df24a15d010b6a1f43ef505124d488772
    Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
    Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
    Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
    Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
    Tested-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
    Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit d66e07cdf9ab6f84ce121009b08860261bca7df2)

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index efc250abe0..1729dcbdb6 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -173,12 +173,12 @@ const struct flash_info spi_nor_ids[] = {
 	{ INFO("n25q064a",    0x20bb17, 0, 64 * 1024,  128, SECT_4K | SPI_NOR_QUAD_READ) },
 	{ INFO("n25q128a11",  0x20bb18, 0, 64 * 1024,  256, SECT_4K | SPI_NOR_QUAD_READ) },
 	{ INFO("n25q128a13",  0x20ba18, 0, 64 * 1024,  256, SECT_4K | SPI_NOR_QUAD_READ) },
-	{ INFO("n25q256a",    0x20ba19, 0, 64 * 1024,  512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
-	{ INFO("n25q256ax1",  0x20bb19, 0, 64 * 1024,  512, SECT_4K | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
+	{ INFO("n25q256a",    0x20ba19, 0, 64 * 1024,  512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{ INFO("n25q256ax1",  0x20bb19, 0, 64 * 1024,  512, SECT_4K | SPI_NOR_QUAD_READ) },
 	{ INFO6("mt25qu512a",  0x20bb20, 0x104400, 64 * 1024, 1024,
 		 SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
-	{ INFO("n25q512a",    0x20bb20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
-	{ INFO("n25q512ax3",  0x20ba20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
+	{ INFO("n25q512a",    0x20bb20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
+	{ INFO("n25q512ax3",  0x20ba20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
 	{ INFO("n25q00",      0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
 	{ INFO("n25q00a",     0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
 	{ INFO("mt25qu02g",   0x20bb22, 0, 64 * 1024, 4096, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },

commit ec971092be5c699e55af786ed1df1e3685df9031
Author: Vignesh Raghavendra <vigneshr@ti.com>
Date:   Thu Sep 26 19:04:27 2019 +0530

    UPSTREAM: mtd: spi-nor-core: Replace MTD_SPI_NOR_USE_4K_SECTORS with SPI_FLASH_USE_4K_SECTORS
    
    U-Boot uses CONFIG_SPI_FLASH_USE_4K_SECTORS to enable 4K small sector
    support. Use that instead of MTD_SPI_NOR_USE_4K_SECTORS.
    
    Change-Id: Ia999865ee27d03cc036ef7df647a7929c2f9945c
    Reported-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
    Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
    Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 2a2174d3da33b9e71a26ecc5d40f1369401275fd)

diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 1eebbcb919..5a8c084255 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -1916,7 +1916,7 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor,
 
 		erasesize = 1U << erasesize;
 		opcode = (half >> 8) & 0xff;
-#ifdef CONFIG_MTD_SPI_NOR_USE_4K_SECTORS
+#ifdef CONFIG_SPI_FLASH_USE_4K_SECTORS
 		if (erasesize == SZ_4K) {
 			nor->erase_opcode = opcode;
 			mtd->erasesize = erasesize;
diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 11e374d961..efc250abe0 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -58,7 +58,7 @@
  * All newly added entries should describe *hardware* and should use SECT_4K
  * (or SECT_4K_PMC) if hardware supports erasing 4 KiB sectors. For usage
  * scenarios excluding small sectors there is config option that can be
- * disabled: CONFIG_MTD_SPI_NOR_USE_4K_SECTORS.
+ * disabled: CONFIG_SPI_FLASH_USE_4K_SECTORS.
  * For historical (and compatibility) reasons (before we got above config) some
  * old entries may be missing 4K flag.
  */

commit 3f2f32bfbcf44d2a46f9f8ac71d6311ae0459910
Author: Vignesh Raghavendra <vigneshr@ti.com>
Date:   Thu Sep 26 19:04:26 2019 +0530

    UPSTREAM: mtd: spi-nor-core: Use dev_err for reporting erase/write failures
    
    Use dev_err() when reporting reason for erase/write failures so that
    users can be made aware of the reason for failure.
    
    Change-Id: I30be5f7077082f7d1dbad28f9145f61150e4c61d
    Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
    Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit cc9118757f6ce57bf1776cca41cb52a3dc24401e)

diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 990e39d7c2..1eebbcb919 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -380,12 +380,12 @@ static int spi_nor_fsr_ready(struct spi_nor *nor)
 
 	if (fsr & (FSR_E_ERR | FSR_P_ERR)) {
 		if (fsr & FSR_E_ERR)
-			dev_dbg(nor->dev, "Erase operation failed.\n");
+			dev_err(nor->dev, "Erase operation failed.\n");
 		else
-			dev_dbg(nor->dev, "Program operation failed.\n");
+			dev_err(nor->dev, "Program operation failed.\n");
 
 		if (fsr & FSR_PT_ERR)
-			dev_dbg(nor->dev,
+			dev_err(nor->dev,
 				"Attempted to modify a protected sector.\n");
 
 		nor->write_reg(nor, SPINOR_OP_CLFSR, NULL, 0);

commit 4d93a585c722422a9e994d9de61eaf4574538335
Author: Frieder Schrempf <frieder.schrempf@kontron.de>
Date:   Fri Sep 13 22:43:42 2019 +0000

    UPSTREAM: mtd: spi: Add a new option SPL_SPI_FLASH_MTD to Kconfig
    
    To allow SPI_FLASH_MTD being enabled separately in SPL we add a new
    option. The only user currently is the stm32mp15_basic board.
    
    Change-Id: Ic0456e69cc703ea07a6b43b3fc9f37e307a21eef
    Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
    Acked-by: Lukasz Majewski <lukma@denx.de>
    Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 64f736c9013b059696a9c0370e152c1ab6a8f89e)

diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig
index a0cfc623c6..f032c24462 100644
--- a/drivers/mtd/spi/Kconfig
+++ b/drivers/mtd/spi/Kconfig
@@ -195,4 +195,12 @@ config SPI_FLASH_MTD
 
 	  If unsure, say N
 
+config SPL_SPI_FLASH_MTD
+	bool "SPI flash MTD support for SPL"
+	depends on SPI_FLASH
+	help
+          Enable the MTD support for the SPI flash layer in SPL.
+
+	  If unsure, say N
+
 endmenu # menu "SPI Flash Support"

commit 7730030a43576ffad1d4baa2e0034b805cc55a05
Author: Jagan Teki <jagan@amarulasolutions.com>
Date:   Sun Sep 29 13:12:37 2019 +0530

    UPSTREAM: mtd: spi-nor: ids: Add is25wp256 chip
    
    Add is25wp256, chip to spi-nor id table.
    
    Tested on SiFive FU540 board.
    
    Change-Id: I7b07c16bf4dcedabe3c9fe40c3ab7dfaa2bad708
    Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Tested-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 97009d543dc1870c881b0ce6269fdffddf748085)

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 014035f59a..11e374d961 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -138,6 +138,8 @@ const struct flash_info spi_nor_ids[] = {
 			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 	{ INFO("is25wp128",  0x9d7018, 0, 64 * 1024, 256,
 			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{ INFO("is25wp256",  0x9d7019, 0, 64 * 1024, 512,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 #endif
 #ifdef CONFIG_SPI_FLASH_MACRONIX	/* MACRONIX */
 	/* Macronix */

commit 65555e9e7b6e8be1a1c2c881c9f0bddac2d08bcc
Author: Jagan Teki <jagan@amarulasolutions.com>
Date:   Sat Feb 9 17:45:42 2019 +0530

    UPSTREAM: mtd: spi: Kconfig: Update CONFIG_SPI_FLASH
    
    1) CONFIG_SPI_FLASH is not just a legacy code, but it has common
       core code which handle both dm and non-dm spi flash code. So
       fix the info text to make it clear globally.
    
    2) Since it's flash core it shouldn't depends on legacy SPI,
       so remove the 'depends on SPI'
    
    Cc: Vignesh R <vigneshr@ti.com>
    Change-Id: Ie388cd31a208cfd5ce7d7dc657064e05b754a321
    Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 989fd97fe56676dd636803c467834c36a86d06a5)

diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig
index d3b007a731..a0cfc623c6 100644
--- a/drivers/mtd/spi/Kconfig
+++ b/drivers/mtd/spi/Kconfig
@@ -26,11 +26,10 @@ config SPI_FLASH_SANDBOX
 	  stored in a file on the host filesystem.
 
 config SPI_FLASH
-	bool "Legacy SPI Flash Interface support"
-	depends on SPI
+	bool "SPI Flash Core Interface support"
 	select SPI_MEM
 	help
-	  Enable the legacy SPI flash support. This will include basic
+	  Enable the SPI flash Core support. This will include basic
 	  standard support for things like probing, read / write, and
 	  erasing through cmd_sf interface.
 

commit 2370df34859bb836cafd39eb3337b95ea134dab6
Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Date:   Mon Sep 9 22:33:15 2019 +0300

    UPSTREAM: mtd: spi-nor: enable protection ops for SST26 flash series
    
    Commit c4e8862308d4 (mtd: spi: Switch to new SPI NOR framework)
    performs switch from previous 'spi_flash' infrastructure without
    proper testing/investigations which results in a regressions for
    SST26 flash series.
    
    Enable protection ops for SST26 flash series which were
    previously enabled by
    Commit 3d4fed87a5fa (mtd: sf: Add support of sst26wf* flash ICs
    protection ops)
    
    Change-Id: Icc1a6d908f12f0bb3613320c9e1bf36e53f38e91
    Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
    Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 718fd834c0d0972d61714c266a1115d2ca425ec2)

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 293fc23127..014035f59a 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -224,10 +224,10 @@ const struct flash_info spi_nor_ids[] = {
 	{ INFO("sst25wf040b", 0x621613, 0, 64 * 1024,  8, SECT_4K) },
 	{ INFO("sst25wf040",  0xbf2504, 0, 64 * 1024,  8, SECT_4K | SST_WRITE) },
 	{ INFO("sst25wf080",  0xbf2505, 0, 64 * 1024, 16, SECT_4K | SST_WRITE) },
-	{ INFO("sst26vf064b", 0xbf2643, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-	{ INFO("sst26wf016",  0xbf2651, 0, 64 * 1024,  32, SECT_4K) },
-	{ INFO("sst26wf032",  0xbf2622, 0, 64 * 1024,  64, SECT_4K) },
-	{ INFO("sst26wf064",  0xbf2643, 0, 64 * 1024, 128, SECT_4K) },
+	{ INFO("sst26vf064b", 0xbf2643, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_HAS_SST26LOCK | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{ INFO("sst26wf016",  0xbf2651, 0, 64 * 1024,  32, SECT_4K | SPI_NOR_HAS_SST26LOCK) },
+	{ INFO("sst26wf032",  0xbf2622, 0, 64 * 1024,  64, SECT_4K | SPI_NOR_HAS_SST26LOCK) },
+	{ INFO("sst26wf064",  0xbf2643, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_HAS_SST26LOCK) },
 #endif
 #ifdef CONFIG_SPI_FLASH_STMICRO		/* STMICRO */
 	/* ST Microelectronics -- newer production may have feature updates */

commit 4b522e90443ec49bb87483125010cef34936eeb1
Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Date:   Mon Sep 9 22:33:14 2019 +0300

    UPSTREAM: mtd: spi-nor: add missing SST26* flash IC protection ops
    
    Commit c4e8862308d4 (mtd: spi: Switch to new SPI NOR framework)
    performs switch from previous 'spi_flash' infrastructure without
    proper testing/investigations which results in a regressions for
    SST26 flash series.
    
    Add missing SST26* flash IC protection ops which were introduced
    previously by
    Commit 3d4fed87a5fa (mtd: sf: Add support of sst26wf* flash ICs
    protection ops)
    
    Change-Id: I4944e5680fb58c0a2fd2f38a6477acab24536928
    Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
    Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit e0cacdcc0a479dc70d3048ee40705478dce2655e)

diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index f1f5140f53..ba6c6b68dc 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -66,6 +66,7 @@ struct flash_info {
 #define NO_CHIP_ERASE		BIT(12) /* Chip does not support chip erase */
 #define SPI_NOR_SKIP_SFDP	BIT(13)	/* Skip parsing of SFDP tables */
 #define USE_CLSR		BIT(14)	/* use CLSR command */
+#define SPI_NOR_HAS_SST26LOCK	BIT(15)	/* Flash supports lock/unlock via BPR */
 };
 
 extern const struct flash_info spi_nor_ids[];
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 1acff745d1..990e39d7c2 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -945,6 +945,177 @@ read_err:
 }
 
 #ifdef CONFIG_SPI_FLASH_SST
+/*
+ * sst26 flash series has its own block protection implementation:
+ * 4x   - 8  KByte blocks - read & write protection bits - upper addresses
+ * 1x   - 32 KByte blocks - write protection bits
+ * rest - 64 KByte blocks - write protection bits
+ * 1x   - 32 KByte blocks - write protection bits
+ * 4x   - 8  KByte blocks - read & write protection bits - lower addresses
+ *
+ * We'll support only per 64k lock/unlock so lower and upper 64 KByte region
+ * will be treated as single block.
+ */
+#define SST26_BPR_8K_NUM		4
+#define SST26_MAX_BPR_REG_LEN		(18 + 1)
+#define SST26_BOUND_REG_SIZE		((32 + SST26_BPR_8K_NUM * 8) * SZ_1K)
+
+enum lock_ctl {
+	SST26_CTL_LOCK,
+	SST26_CTL_UNLOCK,
+	SST26_CTL_CHECK
+};
+
+static bool sst26_process_bpr(u32 bpr_size, u8 *cmd, u32 bit, enum lock_ctl ctl)
+{
+	switch (ctl) {
+	case SST26_CTL_LOCK:
+		cmd[bpr_size - (bit / 8) - 1] |= BIT(bit % 8);
+		break;
+	case SST26_CTL_UNLOCK:
+		cmd[bpr_size - (bit / 8) - 1] &= ~BIT(bit % 8);
+		break;
+	case SST26_CTL_CHECK:
+		return !!(cmd[bpr_size - (bit / 8) - 1] & BIT(bit % 8));
+	}
+
+	return false;
+}
+
+/*
+ * Lock, unlock or check lock status of the flash region of the flash (depending
+ * on the lock_ctl value)
+ */
+static int sst26_lock_ctl(struct spi_nor *nor, loff_t ofs, uint64_t len, enum lock_ctl ctl)
+{
+	struct mtd_info *mtd = &nor->mtd;
+	u32 i, bpr_ptr, rptr_64k, lptr_64k, bpr_size;
+	bool lower_64k = false, upper_64k = false;
+	u8 bpr_buff[SST26_MAX_BPR_REG_LEN] = {};
+	int ret;
+
+	/* Check length and offset for 64k alignment */
+	if ((ofs & (SZ_64K - 1)) || (len & (SZ_64K - 1))) {
+		dev_err(nor->dev, "length or offset is not 64KiB allighned\n");
+		return -EINVAL;
+	}
+
+	if (ofs + len > mtd->size) {
+		dev_err(nor->dev, "range is more than device size: %#llx + %#llx > %#llx\n",
+			ofs, len, mtd->size);
+		return -EINVAL;
+	}
+
+	/* SST26 family has only 16 Mbit, 32 Mbit and 64 Mbit IC */
+	if (mtd->size != SZ_2M &&
+	    mtd->size != SZ_4M &&
+	    mtd->size != SZ_8M)
+		return -EINVAL;
+
+	bpr_size = 2 + (mtd->size / SZ_64K / 8);
+
+	ret = nor->read_reg(nor, SPINOR_OP_READ_BPR, bpr_buff, bpr_size);
+	if (ret < 0) {
+		dev_err(nor->dev, "fail to read block-protection register\n");
+		return ret;
+	}
+
+	rptr_64k = min_t(u32, ofs + len, mtd->size - SST26_BOUND_REG_SIZE);
+	lptr_64k = max_t(u32, ofs, SST26_BOUND_REG_SIZE);
+
+	upper_64k = ((ofs + len) > (mtd->size - SST26_BOUND_REG_SIZE));
+	lower_64k = (ofs < SST26_BOUND_REG_SIZE);
+
+	/* Lower bits in block-protection register are about 64k region */
+	bpr_ptr = lptr_64k / SZ_64K - 1;
+
+	/* Process 64K blocks region */
+	while (lptr_64k < rptr_64k) {
+		if (sst26_process_bpr(bpr_size, bpr_buff, bpr_ptr, ctl))
+			return EACCES;
+
+		bpr_ptr++;
+		lptr_64k += SZ_64K;
+	}
+
+	/* 32K and 8K region bits in BPR are after 64k region bits */
+	bpr_ptr = (mtd->size - 2 * SST26_BOUND_REG_SIZE) / SZ_64K;
+
+	/* Process lower 32K block region */
+	if (lower_64k)
+		if (sst26_process_bpr(bpr_size, bpr_buff, bpr_ptr, ctl))
+			return EACCES;
+
+	bpr_ptr++;
+
+	/* Process upper 32K block region */
+	if (upper_64k)
+		if (sst26_process_bpr(bpr_size, bpr_buff, bpr_ptr, ctl))
+			return EACCES;
+
+	bpr_ptr++;
+
+	/* Process lower 8K block regions */
+	for (i = 0; i < SST26_BPR_8K_NUM; i++) {
+		if (lower_64k)
+			if (sst26_process_bpr(bpr_size, bpr_buff, bpr_ptr, ctl))
+				return EACCES;
+
+		/* In 8K area BPR has both read and write protection bits */
+		bpr_ptr += 2;
+	}
+
+	/* Process upper 8K block regions */
+	for (i = 0; i < SST26_BPR_8K_NUM; i++) {
+		if (upper_64k)
+			if (sst26_process_bpr(bpr_size, bpr_buff, bpr_ptr, ctl))
+				return EACCES;
+
+		/* In 8K area BPR has both read and write protection bits */
+		bpr_ptr += 2;
+	}
+
+	/* If we check region status we don't need to write BPR back */
+	if (ctl == SST26_CTL_CHECK)
+		return 0;
+
+	ret = nor->write_reg(nor, SPINOR_OP_WRITE_BPR, bpr_buff, bpr_size);
+	if (ret < 0) {
+		dev_err(nor->dev, "fail to write block-protection register\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+static int sst26_unlock(struct spi_nor *nor, loff_t ofs, uint64_t len)
+{
+	return sst26_lock_ctl(nor, ofs, len, SST26_CTL_UNLOCK);
+}
+
+static int sst26_lock(struct spi_nor *nor, loff_t ofs, uint64_t len)
+{
+	return sst26_lock_ctl(nor, ofs, len, SST26_CTL_LOCK);
+}
+
+/*
+ * Returns EACCES (positive value) if region is locked, 0 if region is unlocked,
+ * and negative on errors.
+ */
+static int sst26_is_locked(struct spi_nor *nor, loff_t ofs, uint64_t len)
+{
+	/*
+	 * is_locked function is used for check before reading or erasing flash
+	 * region, so offset and length might be not 64k allighned, so adjust
+	 * them to be 64k allighned as sst26_lock_ctl works only with 64k
+	 * allighned regions.
+	 */
+	ofs -= ofs & (SZ_64K - 1);
+	len = len & (SZ_64K - 1) ? (len & ~(SZ_64K - 1)) + SZ_64K : len;
+
+	return sst26_lock_ctl(nor, ofs, len, SST26_CTL_CHECK);
+}
+
 static int sst_write_byteprogram(struct spi_nor *nor, loff_t to, size_t len,
 				 size_t *retlen, const u_char *buf)
 {
@@ -2302,6 +2473,16 @@ int spi_nor_scan(struct spi_nor *nor)
 #endif
 
 #ifdef CONFIG_SPI_FLASH_SST
+	/*
+	 * sst26 series block protection implementation differs from other
+	 * series.
+	 */
+	if (info->flags & SPI_NOR_HAS_SST26LOCK) {
+		nor->flash_lock = sst26_lock;
+		nor->flash_unlock = sst26_unlock;
+		nor->flash_is_locked = sst26_is_locked;
+	}
+
 	/* sst nor chips use AAI word program */
 	if (info->flags & SST_WRITE)
 		mtd->_write = sst_write;
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index 88e80af579..709b49d393 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -91,6 +91,10 @@
 #define SPINOR_OP_WRDI		0x04	/* Write disable */
 #define SPINOR_OP_AAI_WP	0xad	/* Auto address increment word program */
 
+/* Used for SST26* flashes only. */
+#define SPINOR_OP_READ_BPR	0x72	/* Read block protection register */
+#define SPINOR_OP_WRITE_BPR	0x42	/* Write block protection register */
+
 /* Used for S3AN flashes only */
 #define SPINOR_OP_XSE		0x50	/* Sector erase */
 #define SPINOR_OP_XPP		0x82	/* Page program */

commit 847bb8f552e2c1b58c69db70e6ad2f6868622c6d
Author: Jagan Teki <jagan@amarulasolutions.com>
Date:   Mon Jul 22 17:22:58 2019 +0530

    UPSTREAM: mtd: spi: Drop sf.c
    
    spi_write_then_read, will manage to do the respective
    spi_xfer based on the tx_buf, rx_buf so drop the
    legacy spi_flash_read/write/cm code.
    
    Tested-by: Adam Ford <aford173@gmail.com> #da850-evm
    Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
    (cherry picked from commit 210d8ad0fa6c63e5775662b840b8eb095a69db19)
    Change-Id: I026abea600c7c95d3a2681e1005f1e9bd4ceda89
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile
index 329a036155..232231e114 100644
--- a/drivers/mtd/spi/Makefile
+++ b/drivers/mtd/spi/Makefile
@@ -20,6 +20,6 @@ spi-nor-y += spi-nor-core.o
 endif
 
 obj-$(CONFIG_SPI_FLASH) += spi-nor.o
-obj-$(CONFIG_SPI_FLASH_DATAFLASH) += sf_dataflash.o sf.o
+obj-$(CONFIG_SPI_FLASH_DATAFLASH) += sf_dataflash.o
 obj-$(CONFIG_SPI_FLASH_MTD) += sf_mtd.o
 obj-$(CONFIG_SPI_FLASH_SANDBOX) += sandbox.o
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 7d4f0b42e6..f1f5140f53 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -73,24 +73,6 @@ extern const struct flash_info spi_nor_ids[];
 #define JEDEC_MFR(info)	((info)->id[0])
 #define JEDEC_ID(info)		(((info)->id[1]) << 8 | ((info)->id[2]))
 
-/* Send a single-byte command to the device and read the response */
-int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len);
-
-/*
- * Send a multi-byte command to the device and read the response. Used
- * for flash array reads, etc.
- */
-int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd,
-		size_t cmd_len, void *data, size_t data_len);
-
-/*
- * Send a multi-byte command to the device followed by (optional)
- * data. Used for programming the flash array, etc.
- */
-int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len,
-		const void *data, size_t data_len);
-
-
 /* Get software write-protect value (BP bits) */
 int spi_flash_cmd_get_sw_write_prot(struct spi_flash *flash);
 

commit b7f61ce35d65190bbd1b0f0176444d0bf8e41a47
Author: Jagan Teki <jagan@amarulasolutions.com>
Date:   Mon Jul 22 17:22:57 2019 +0530

    UPSTREAM: mtd: spi_dataflash: Use spi read then write
    
    Now, we have spi_write_then_read routine that would handle
    spi_xfer handling based on the tx_buf and rx_buf parameters.
    
    So, replace individual flash read/write/cmd transfer call
    with spi_write_then_read.
    
    Cc: Egnite GmbH <info@egnite.de>
    Cc: Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
    Cc: Ilko Iliev <iliev@ronetix.at>
    Cc: Marek Vasut <marex@denx.de>
    Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
    Cc: Alison Wang <alison.wang@nxp.com>
    Tested-by: Adam Ford <aford173@gmail.com> #da850-evm
    Change-Id: I71307ddd279423c3c0cc60412a2700685ec37eaf
    Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 43084a56b08b34a4daef36697dd715659a17caf9)

diff --git a/drivers/mtd/spi/sf_dataflash.c b/drivers/mtd/spi/sf_dataflash.c
index 1d5975be8e..96247ea371 100644
--- a/drivers/mtd/spi/sf_dataflash.c
+++ b/drivers/mtd/spi/sf_dataflash.c
@@ -77,12 +77,14 @@ struct dataflash {
 static inline int dataflash_status(struct spi_slave *spi)
 {
 	int ret;
+	u8 opcode = OP_READ_STATUS;
 	u8 status;
+
 	/*
 	 * NOTE:  at45db321c over 25 MHz wants to write
 	 * a dummy byte after the opcode...
 	 */
-	ret = spi_flash_cmd(spi, OP_READ_STATUS, &status, 1);
+	ret =  spi_write_then_read(spi, &opcode, 1, NULL, &status, 1);
 	return ret ? -EIO : status;
 }
 
@@ -174,7 +176,7 @@ static int spi_dataflash_erase(struct udevice *dev, u32 offset, size_t len)
 		      command[0], command[1], command[2], command[3],
 		      pageaddr);
 
-		status = spi_flash_cmd_write(spi, command, 4, NULL, 0);
+		status = spi_write_then_read(spi, command, 4, NULL, NULL, 0);
 		if (status < 0) {
 			debug("%s: erase send command error!\n", dev->name);
 			return -EIO;
@@ -249,7 +251,7 @@ static int spi_dataflash_read(struct udevice *dev, u32 offset, size_t len,
 	command[3] = (uint8_t)(addr >> 0);
 
 	/* plus 4 "don't care" bytes, command len: 4 + 4 "don't care" bytes */
-	status = spi_flash_cmd_read(spi, command, 8, buf, len);
+	status = spi_write_then_read(spi, command, 8, NULL, buf, len);
 
 	spi_release_bus(spi);
 
@@ -328,7 +330,8 @@ int spi_dataflash_write(struct udevice *dev, u32 offset, size_t len,
 			debug("TRANSFER: (%x) %x %x %x\n",
 			      command[0], command[1], command[2], command[3]);
 
-			status = spi_flash_cmd_write(spi, command, 4, NULL, 0);
+			status = spi_write_then_read(spi, command, 4,
+						     NULL, NULL, 0);
 			if (status < 0) {
 				debug("%s: write(<pagesize) command error!\n",
 				      dev->name);
@@ -353,8 +356,8 @@ int spi_dataflash_write(struct udevice *dev, u32 offset, size_t len,
 		debug("PROGRAM: (%x) %x %x %x\n",
 		      command[0], command[1], command[2], command[3]);
 
-		status = spi_flash_cmd_write(spi, command,
-					     4, writebuf, writelen);
+		status = spi_write_then_read(spi, command, 4,
+					     writebuf, NULL, writelen);
 		if (status < 0) {
 			debug("%s: write send command error!\n", dev->name);
 			return -EIO;
@@ -377,8 +380,8 @@ int spi_dataflash_write(struct udevice *dev, u32 offset, size_t len,
 		debug("COMPARE: (%x) %x %x %x\n",
 		      command[0], command[1], command[2], command[3]);
 
-		status = spi_flash_cmd_write(spi, command,
-					     4, writebuf, writelen);
+		status = spi_write_then_read(spi, command, 4,
+					     writebuf, NULL, writelen);
 		if (status < 0) {
 			debug("%s: write(compare) send command error!\n",
 			      dev->name);
@@ -509,6 +512,7 @@ static struct data_flash_info *jedec_probe(struct spi_slave *spi)
 	uint8_t			id[5];
 	uint32_t		jedec;
 	struct data_flash_info	*info;
+	u8 opcode		= CMD_READ_ID;
 	int status;
 
 	/*
@@ -520,7 +524,7 @@ static struct data_flash_info *jedec_probe(struct spi_slave *spi)
 	 * That's not an error; only rev C and newer chips handle it, and
 	 * only Atmel sells these chips.
 	 */
-	tmp = spi_flash_cmd(spi, CMD_READ_ID, id, sizeof(id));
+	tmp = spi_write_then_read(spi, &opcode, 1, NULL, id, sizeof(id));
 	if (tmp < 0) {
 		printf("dataflash: error %d reading JEDEC ID\n", tmp);
 		return ERR_PTR(tmp);

commit e9e9b135e2d930c0495792a2d20749c70b26276d
Author: Ashish Kumar <Ashish.Kumar@nxp.com>
Date:   Thu Jul 18 16:43:15 2019 +0530

    UPSTREAM: mtd: spi: Add micron mt35xu512aba and mt35xu02g flash ID
    
    mt35xu512aba and mt35xu02g suports Single I/O and OCTAL I/O
    also enable use of SPI_NOR_4B_OPCODES.
    
    These flashes are tested on LX2160ARDB and LS1028ARDB respectively
    
    Change-Id: Ib2e505599602b3865afa82ff775cc94e842ea5ef
    Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
    Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
    [jagan: suffix 'ba' on part name and update commit message]
    Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
    Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 9454fee46092a368bd4cb015481964d017a33cac)

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index d76b0ebf09..293fc23127 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -180,6 +180,8 @@ const struct flash_info spi_nor_ids[] = {
 	{ INFO("n25q00",      0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
 	{ INFO("n25q00a",     0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
 	{ INFO("mt25qu02g",   0x20bb22, 0, 64 * 1024, 4096, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
+	{ INFO("mt35xu512aba", 0x2c5b1a, 0,  128 * 1024,  512, USE_FSR | SPI_NOR_4B_OPCODES) },
+	{ INFO("mt35xu02g",  0x2c5b1c, 0, 128 * 1024,  2048, USE_FSR | SPI_NOR_4B_OPCODES) },
 #endif
 #ifdef CONFIG_SPI_FLASH_SPANSION	/* SPANSION */
 	/* Spansion/Cypress -- single (large) sector size only, at least

commit dcdbd2c6f8b30a3cc01eb4f529965b0d578ff5b0
Author: Ashish Kumar <Ashish.Kumar@nxp.com>
Date:   Wed Jul 17 11:45:00 2019 +0530

    UPSTREAM: mtd: spi: Add flash property for Micron mt25qu512a
    
    mt25qu512a is rebranded after its spinoff from STM, so it is
    different only in term of extended jedec ID, initial JEDEC id
    is same as that of n25q512a.In order to avoid any confussion
    with respect to name new entry is added.
    
    This flash is tested for Single I/O mode on LS1046FRWY although
    it also support QUAD I/O.
    
    Change-Id: I6beac2b6b0b446d9adaf4c1f8e54ad61b72b88a0
    Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
    Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 8385520f2931d3c0e3c3073cedea94a2e18258ab)

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 113823c635..d76b0ebf09 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -173,6 +173,8 @@ const struct flash_info spi_nor_ids[] = {
 	{ INFO("n25q128a13",  0x20ba18, 0, 64 * 1024,  256, SECT_4K | SPI_NOR_QUAD_READ) },
 	{ INFO("n25q256a",    0x20ba19, 0, 64 * 1024,  512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
 	{ INFO("n25q256ax1",  0x20bb19, 0, 64 * 1024,  512, SECT_4K | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
+	{ INFO6("mt25qu512a",  0x20bb20, 0x104400, 64 * 1024, 1024,
+		 SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
 	{ INFO("n25q512a",    0x20bb20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
 	{ INFO("n25q512ax3",  0x20ba20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
 	{ INFO("n25q00",      0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },

commit 0962b023d2d6ce91e09d5793aec36770a6bfec1e
Author: Marcin Wojtas <mw@semihalf.com>
Date:   Thu Nov 21 05:38:47 2019 +0100

    UPSTREAM: spi: prevent overriding established bus settings
    
    The SPI stack relies on a proper bus speed/mode configuration
    by calling dm_spi_claim_bus(). However the hitherto code
    allowed to accidentally override those settings in
    the spi_get_bus_and_cs() routine.
    
    The initially established speed could be discarded by using
    the slave platdata, which turned out to be an issue on
    the platforms whose slave maximum supported frequency
    is not on par with the maximum frequency of the bus controller.
    
    This patch fixes above issue by configuring the bus from
    spi_get_bus_and_cs() only in case it was not done before.
    
    Change-Id: I7b8268046ae5e086de8dd456a5e13ba8b7dc0f5c
    Signed-off-by: Marcin Wojtas <mw@semihalf.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Acked-by: Jagan Teki <jagan@amarulasolutions.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit f7dd5370986087af9b9cfa601f34b344ec910b87)

diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c
index d33875fade..dfb2b241fe 100644
--- a/drivers/spi/spi-uclass.c
+++ b/drivers/spi/spi-uclass.c
@@ -324,6 +324,7 @@ int spi_get_bus_and_cs(int busnum, int cs, int speed, int mode,
 {
 	struct udevice *bus, *dev;
 	struct dm_spi_slave_platdata *plat;
+	struct spi_slave *slave;
 	bool created = false;
 	int ret;
 
@@ -379,19 +380,20 @@ int spi_get_bus_and_cs(int busnum, int cs, int speed, int mode,
 		slave->dev = dev;
 	}
 
-	plat = dev_get_parent_platdata(dev);
+	slave = dev_get_parent_priv(dev);
 
-	/* get speed and mode from platdata when available */
-	if (plat->max_hz) {
-		speed = plat->max_hz;
-		mode = plat->mode;
+	/*
+	 * In case the operation speed is not yet established by
+	 * dm_spi_claim_bus() ensure the bus is configured properly.
+	 */
+	if (!slave->speed) {
+		ret = spi_claim_bus(slave);
+		if (ret)
+			goto err;
 	}
-	ret = spi_set_speed_mode(bus, speed, mode);
-	if (ret)
-		goto err;
 
 	*busp = bus;
-	*devp = dev_get_parent_priv(dev);
+	*devp = slave;
 	debug("%s: bus=%p, slave=%p\n", __func__, bus, *devp);
 
 	return 0;

commit 5a1c4376df12ee05a9a5bda777456951526918bb
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Mon Sep 9 06:00:02 2019 -0700

    UPSTREAM: dm: spi: Check cs number before accessing slaves
    
    Add chip select number check in spi_find_chip_select().
    
    Change-Id: I13f3ec8f3f7e881e41a57638e6ae70ee4d0b82d5
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Tested-by: Jagan Teki <jagan@amarulasolutions.com> # SoPine
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 7bacce524d48594dae399f9ee9280ab105f6c8cf)

diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c
index c9e10659cc..d33875fade 100644
--- a/drivers/spi/spi-uclass.c
+++ b/drivers/spi/spi-uclass.c
@@ -225,7 +225,32 @@ int spi_chip_select(struct udevice *dev)
 
 int spi_find_chip_select(struct udevice *bus, int cs, struct udevice **devp)
 {
+	struct dm_spi_ops *ops;
+	struct spi_cs_info info;
 	struct udevice *dev;
+	int ret;
+
+	/*
+	 * Ask the driver. For the moment we don't have CS info.
+	 * When we do we could provide the driver with a helper function
+	 * to figure out what chip selects are valid, or just handle the
+	 * request.
+	 */
+	ops = spi_get_ops(bus);
+	if (ops->cs_info) {
+		ret = ops->cs_info(bus, cs, &info);
+	} else {
+		/*
+		 * We could assume there is at least one valid chip select.
+		 * The driver didn't care enough to tell us.
+		 */
+		ret = 0;
+	}
+
+	if (ret) {
+		printf("Invalid cs %d (err=%d)\n", cs, ret);
+		return ret;
+	}
 
 	for (device_find_first_child(bus, &dev); dev;
 	     device_find_next_child(&dev)) {
@@ -260,7 +285,6 @@ int spi_cs_is_valid(unsigned int busnum, unsigned int cs)
 int spi_cs_info(struct udevice *bus, uint cs, struct spi_cs_info *info)
 {
 	struct spi_cs_info local_info;
-	struct dm_spi_ops *ops;
 	int ret;
 
 	if (!info)
@@ -269,24 +293,7 @@ int spi_cs_info(struct udevice *bus, uint cs, struct spi_cs_info *info)
 	/* If there is a device attached, return it */
 	info->dev = NULL;
 	ret = spi_find_chip_select(bus, cs, &info->dev);
-	if (!ret)
-		return 0;
-
-	/*
-	 * Otherwise ask the driver. For the moment we don't have CS info.
-	 * When we do we could provide the driver with a helper function
-	 * to figure out what chip selects are valid, or just handle the
-	 * request.
-	 */
-	ops = spi_get_ops(bus);
-	if (ops->cs_info)
-		return ops->cs_info(bus, cs, info);
-
-	/*
-	 * We could assume there is at least one valid chip select.
-	 * The driver didn't care enough to tell us.
-	 */
-	return 0;
+	return ret == -ENODEV ? 0 : ret;
 }
 
 int spi_find_bus_and_cs(int busnum, int cs, struct udevice **busp,
diff --git a/include/spi.h b/include/spi.h
index 6b5c2b0211..cb64a3987a 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -572,7 +572,8 @@ int spi_chip_select(struct udevice *slave);
  * @bus:	SPI bus to search
  * @cs:		Chip select to look for
  * @devp:	Returns the slave device if found
- * @return 0 if found, -ENODEV on error
+ * @return 0 if found, -EINVAL if cs is invalid, -ENODEV if no device attached,
+ *	   other -ve value on error
  */
 int spi_find_chip_select(struct udevice *bus, int cs, struct udevice **devp);
 

commit 2c7db7c39cf8dacd95f5cbc6511ae0acc687a12d
Author: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Date:   Tue Sep 17 00:11:02 2019 -0600

    UPSTREAM: spi: Fix manual relocation calling more times
    
    When two instances of AXI QSPI with flash are added and tested
    simultaneously the spi driver operations are relocated twice.
    As a result code is accessing addresses outside of RAM when
    relocated second time which is causing a crash.
    
    Tested on Microblaze.
    
    Similar change was done in past by:
    commit f238b3f0fbc9 ("watchdog: dm: Support manual relocation for watchdogs")
    commit 2588f2ddfd60 ("dm: sf: Add support for all targets which requires MANUAL_RELOC")
    commit 1b4c2aa25bdf ("gpio: dm: Support manual relocation for gpio")
    
    Change-Id: Ic807bfcd2703807e91a8d633d8bfb198d3e41266
    Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
    Signed-off-by: Michal Simek <michal.simek@xilinx.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 4d9b1afa415ddf998f6f40283f95770106cef35b)

diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c
index a79ddfb9fb..c9e10659cc 100644
--- a/drivers/spi/spi-uclass.c
+++ b/drivers/spi/spi-uclass.c
@@ -171,21 +171,25 @@ static int spi_post_probe(struct udevice *bus)
 #endif
 #if defined(CONFIG_NEEDS_MANUAL_RELOC)
 	struct dm_spi_ops *ops = spi_get_ops(bus);
-
-	if (ops->claim_bus)
-		ops->claim_bus += gd->reloc_off;
-	if (ops->release_bus)
-		ops->release_bus += gd->reloc_off;
-	if (ops->set_wordlen)
-		ops->set_wordlen += gd->reloc_off;
-	if (ops->xfer)
-		ops->xfer += gd->reloc_off;
-	if (ops->set_speed)
-		ops->set_speed += gd->reloc_off;
-	if (ops->set_mode)
-		ops->set_mode += gd->reloc_off;
-	if (ops->cs_info)
-		ops->cs_info += gd->reloc_off;
+	static int reloc_done;
+
+	if (!reloc_done) {
+		if (ops->claim_bus)
+			ops->claim_bus += gd->reloc_off;
+		if (ops->release_bus)
+			ops->release_bus += gd->reloc_off;
+		if (ops->set_wordlen)
+			ops->set_wordlen += gd->reloc_off;
+		if (ops->xfer)
+			ops->xfer += gd->reloc_off;
+		if (ops->set_speed)
+			ops->set_speed += gd->reloc_off;
+		if (ops->set_mode)
+			ops->set_mode += gd->reloc_off;
+		if (ops->cs_info)
+			ops->cs_info += gd->reloc_off;
+		reloc_done++;
+	}
 #endif
 
 	return 0;

commit f75b9e50a97438cb115b4d21f21abe04acca4516
Author: Simon Glass <sjg@chromium.org>
Date:   Fri Dec 6 21:42:35 2019 -0700

    UPSTREAM: spi: Correct operations check in dm_spi_xfer()
    
    At present we have to have an xfer() method even if it does nothing. This
    is not correct, so fix it.
    
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    (cherry picked from commit ccdabd8956936319c5f7112bf5774e839b085874)
    Change-Id: I49ef01fa907e48e09850364a400c9451783c8056
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c
index 4f75cadab7..a79ddfb9fb 100644
--- a/drivers/spi/spi-uclass.c
+++ b/drivers/spi/spi-uclass.c
@@ -86,11 +86,14 @@ int dm_spi_xfer(struct udevice *dev, unsigned int bitlen,
 		const void *dout, void *din, unsigned long flags)
 {
 	struct udevice *bus = dev->parent;
+	struct dm_spi_ops *ops = spi_get_ops(bus);
 
 	if (bus->uclass->uc_drv->id != UCLASS_SPI)
 		return -EOPNOTSUPP;
+	if (!ops->xfer)
+		return -ENOSYS;
 
-	return spi_get_ops(bus)->xfer(dev, bitlen, dout, din, flags);
+	return ops->xfer(dev, bitlen, dout, din, flags);
 }
 
 int dm_spi_get_mmap(struct udevice *dev, ulong *map_basep, uint *map_sizep,
diff --git a/include/spi.h b/include/spi.h
index 43e349ac7f..6b5c2b0211 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -235,7 +235,7 @@ void spi_release_bus(struct spi_slave *slave);
 int spi_set_wordlen(struct spi_slave *slave, unsigned int wordlen);
 
 /**
- * SPI transfer
+ * SPI transfer (optional if mem_ops is used)
  *
  * This writes "bitlen" bits out the SPI MOSI port and simultaneously clocks
  * "bitlen" bits in the SPI MISO port.  That's just the way SPI works.

commit 7ac3b0edb507765f43120c591d830e5f63fe3474
Author: Simon Glass <sjg@chromium.org>
Date:   Sun Oct 20 21:31:47 2019 -0600

    UPSTREAM: spi: Add support for memory-mapped flash
    
    On x86 platforms the SPI flash can be mapped into memory so that the
    contents can be read with normal memory accesses.
    
    Add a new SPI method to find the location of the SPI flash in memory. This
    differs from the existing device-tree "memory-map" mechanism in that the
    location can be discovered at run-time.
    
    Change-Id: Ia736a9119159bad4770073f19a8862e0ea2610e9
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit c53b318e1bad2e0d5c2b846fadfc79ec77bfc5f7)

diff --git a/drivers/spi/sandbox_spi.c b/drivers/spi/sandbox_spi.c
index 5e2257b2a8..a70d986508 100644
--- a/drivers/spi/sandbox_spi.c
+++ b/drivers/spi/sandbox_spi.c
@@ -124,11 +124,22 @@ static int sandbox_cs_info(struct udevice *bus, uint cs,
 	return 0;
 }
 
+static int sandbox_spi_get_mmap(struct udevice *dev, ulong *map_basep,
+				uint *map_sizep, uint *offsetp)
+{
+	*map_basep = 0x1000;
+	*map_sizep = 0x2000;
+	*offsetp = 0x100;
+
+	return 0;
+}
+
 static const struct dm_spi_ops sandbox_spi_ops = {
 	.xfer		= sandbox_spi_xfer,
 	.set_speed	= sandbox_spi_set_speed,
 	.set_mode	= sandbox_spi_set_mode,
 	.cs_info	= sandbox_cs_info,
+	.get_mmap	= sandbox_spi_get_mmap,
 };
 
 static const struct udevice_id sandbox_spi_ids[] = {
diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c
index aa6c28d8c1..4f75cadab7 100644
--- a/drivers/spi/spi-uclass.c
+++ b/drivers/spi/spi-uclass.c
@@ -93,6 +93,20 @@ int dm_spi_xfer(struct udevice *dev, unsigned int bitlen,
 	return spi_get_ops(bus)->xfer(dev, bitlen, dout, din, flags);
 }
 
+int dm_spi_get_mmap(struct udevice *dev, ulong *map_basep, uint *map_sizep,
+		    uint *offsetp)
+{
+	struct udevice *bus = dev->parent;
+	struct dm_spi_ops *ops = spi_get_ops(bus);
+
+	if (bus->uclass->uc_drv->id != UCLASS_SPI)
+		return -EOPNOTSUPP;
+	if (!ops->get_mmap)
+		return -ENOSYS;
+
+	return ops->get_mmap(dev, map_basep, map_sizep, offsetp);
+}
+
 int spi_claim_bus(struct spi_slave *slave)
 {
 	return log_ret(dm_spi_claim_bus(slave->dev));
diff --git a/include/spi.h b/include/spi.h
index 484f96bea5..43e349ac7f 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -473,6 +473,19 @@ struct dm_spi_ops {
 	 *	   is invalid, other -ve value on error
 	 */
 	int (*cs_info)(struct udevice *bus, uint cs, struct spi_cs_info *info);
+
+	/**
+	 * get_mmap() - Get memory-mapped SPI
+	 *
+	 * @dev:	The SPI flash slave device
+	 * @map_basep:	Returns base memory address for mapped SPI
+	 * @map_sizep:	Returns size of mapped SPI
+	 * @offsetp:	Returns start offset of SPI flash where the map works
+	 *	correctly (offsets before this are not visible)
+	 * @return 0 if OK, -EFAULT if memory mapping is not available
+	 */
+	int (*get_mmap)(struct udevice *dev, ulong *map_basep,
+			uint *map_sizep, uint *offsetp);
 };
 
 struct dm_spi_emul_ops {
@@ -661,6 +674,20 @@ void dm_spi_release_bus(struct udevice *dev);
 int dm_spi_xfer(struct udevice *dev, unsigned int bitlen,
 		const void *dout, void *din, unsigned long flags);
 
+/**
+ * spi_get_mmap() - Get memory-mapped SPI
+ *
+ * @dev:	SPI slave device to check
+ * @map_basep:	Returns base memory address for mapped SPI
+ * @map_sizep:	Returns size of mapped SPI
+ * @offsetp:	Returns start offset of SPI flash where the map works
+ *	correctly (offsets before this are not visible)
+ * @return 0 if OK, -ENOSYS if no operation, -EFAULT if memory mapping is not
+ *	available
+ */
+int dm_spi_get_mmap(struct udevice *dev, ulong *map_basep, uint *map_sizep,
+		    uint *offsetp);
+
 /* Access the operations for a SPI device */
 #define spi_get_ops(dev)	((struct dm_spi_ops *)(dev)->driver->ops)
 #define spi_emul_get_ops(dev)	((struct dm_spi_emul_ops *)(dev)->driver->ops)
diff --git a/test/dm/sf.c b/test/dm/sf.c
index cac4287335..7571d2481e 100644
--- a/test/dm/sf.c
+++ b/test/dm/sf.c
@@ -22,6 +22,9 @@ static int dm_test_spi_flash(struct unit_test_state *uts)
 	int full_size = 0x200000;
 	int size = 0x10000;
 	u8 *src, *dst;
+	uint map_size;
+	ulong map_base;
+	uint offset;
 	int i;
 
 	src = map_sysmem(0x20000, full_size);
@@ -53,6 +56,12 @@ static int dm_test_spi_flash(struct unit_test_state *uts)
 	sandbox_sf_set_block_protect(emul, 0);
 	ut_asserteq(0, spl_flash_get_sw_write_prot(dev));
 
+	/* Check mapping */
+	ut_assertok(dm_spi_get_mmap(dev, &map_base, &map_size, &offset));
+	ut_asserteq(0x1000, map_base);
+	ut_asserteq(0x2000, map_size);
+	ut_asserteq(0x100, offset);
+
 	/*
 	 * Since we are about to destroy all devices, we must tell sandbox
 	 * to forget the emulation device

commit 5a71278980d5d4bfe1e0aea34e86383892e0c902
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Mon Sep 9 06:00:00 2019 -0700

    UPSTREAM: dm: spi: Return 0 if driver does not implement ops->cs_info
    
    If an SPI controller driver does not implement ops->cs_info, that
    probably means any chip select number could be valid, hence let's
    return 0 for spi_cs_info().
    
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Tested-by: Jagan Teki <jagan@amarulasolutions.com> # SoPine
    Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
    (cherry picked from commit 4dd520b36bce9b35f7a12f3ffd9a95269d425170)
    Change-Id: Ie27710ff4328fc6aad4a0ed0f1b29b2aba62fca1
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/doc/driver-model/spi-howto.rst b/doc/driver-model/spi-howto.rst
new file mode 100644
index 0000000000..44eab3947e
--- /dev/null
+++ b/doc/driver-model/spi-howto.rst
@@ -0,0 +1,692 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+How to port a SPI driver to driver model
+========================================
+
+Here is a rough step-by-step guide. It is based around converting the
+exynos SPI driver to driver model (DM) and the example code is based
+around U-Boot v2014.10-rc2 (commit be9f643). This has been updated for
+v2015.04.
+
+It is quite long since it includes actual code examples.
+
+Before driver model, SPI drivers have their own private structure which
+contains 'struct spi_slave'. With driver model, 'struct spi_slave' still
+exists, but now it is 'per-child data' for the SPI bus. Each child of the
+SPI bus is a SPI slave. The information that was stored in the
+driver-specific slave structure can now be port in private data for the
+SPI bus.
+
+For example, struct tegra_spi_slave looks like this:
+
+.. code-block:: c
+
+	struct tegra_spi_slave {
+		struct spi_slave slave;
+		struct tegra_spi_ctrl *ctrl;
+	};
+
+In this case 'slave' will be in per-child data, and 'ctrl' will be in the
+SPI's buses private data.
+
+
+How long does this take?
+------------------------
+
+You should be able to complete this within 2 hours, including testing but
+excluding preparing the patches. The API is basically the same as before
+with only minor changes:
+
+- methods to set speed and mode are separated out
+- cs_info is used to get information on a chip select
+
+
+Enable driver mode for SPI and SPI flash
+----------------------------------------
+
+Add these to your board config:
+
+* CONFIG_DM_SPI
+* CONFIG_DM_SPI_FLASH
+
+
+Add the skeleton
+----------------
+
+Put this code at the bottom of your existing driver file:
+
+.. code-block:: c
+
+	struct spi_slave *spi_setup_slave(unsigned int busnum, unsigned int cs,
+					  unsigned int max_hz, unsigned int mode)
+	{
+		return NULL;
+	}
+
+	struct spi_slave *spi_setup_slave_fdt(const void *blob, int slave_node,
+					      int spi_node)
+	{
+		return NULL;
+	}
+
+	static int exynos_spi_ofdata_to_platdata(struct udevice *dev)
+	{
+		return -ENODEV;
+	}
+
+	static int exynos_spi_probe(struct udevice *dev)
+	{
+		return -ENODEV;
+	}
+
+	static int exynos_spi_remove(struct udevice *dev)
+	{
+		return -ENODEV;
+	}
+
+	static int exynos_spi_claim_bus(struct udevice *dev)
+	{
+
+		return -ENODEV;
+	}
+
+	static int exynos_spi_release_bus(struct udevice *dev)
+	{
+
+		return -ENODEV;
+	}
+
+	static int exynos_spi_xfer(struct udevice *dev, unsigned int bitlen,
+				   const void *dout, void *din, unsigned long flags)
+	{
+
+		return -ENODEV;
+	}
+
+	static int exynos_spi_set_speed(struct udevice *dev, uint speed)
+	{
+		return -ENODEV;
+	}
+
+	static int exynos_spi_set_mode(struct udevice *dev, uint mode)
+	{
+		return -ENODEV;
+	}
+
+	static int exynos_cs_info(struct udevice *bus, uint cs,
+				  struct spi_cs_info *info)
+	{
+		return -ENODEV;
+	}
+
+	static const struct dm_spi_ops exynos_spi_ops = {
+		.claim_bus	= exynos_spi_claim_bus,
+		.release_bus	= exynos_spi_release_bus,
+		.xfer		= exynos_spi_xfer,
+		.set_speed	= exynos_spi_set_speed,
+		.set_mode	= exynos_spi_set_mode,
+		.cs_info	= exynos_cs_info,
+	};
+
+	static const struct udevice_id exynos_spi_ids[] = {
+		{ .compatible = "samsung,exynos-spi" },
+		{ }
+	};
+
+	U_BOOT_DRIVER(exynos_spi) = {
+		.name	= "exynos_spi",
+		.id	= UCLASS_SPI,
+		.of_match = exynos_spi_ids,
+		.ops	= &exynos_spi_ops,
+		.ofdata_to_platdata = exynos_spi_ofdata_to_platdata,
+		.probe	= exynos_spi_probe,
+		.remove	= exynos_spi_remove,
+	};
+
+
+Replace 'exynos' in the above code with your driver name
+--------------------------------------------------------
+
+
+#ifdef out all of the code in your driver except for the above
+--------------------------------------------------------------
+
+This will allow you to get it building, which means you can work
+incrementally. Since all the methods return an error initially, there is
+less chance that you will accidentally leave something in.
+
+Also, even though your conversion is basically a rewrite, it might help
+reviewers if you leave functions in the same place in the file,
+particularly for large drivers.
+
+
+Add some includes
+-----------------
+
+Add these includes to your driver:
+
+.. code-block:: c
+
+	#include <dm.h>
+	#include <errno.h>
+
+
+Build
+-----
+
+At this point you should be able to build U-Boot for your board with the
+empty SPI driver. You still have empty methods in your driver, but we will
+write these one by one.
+
+Set up your platform data structure
+-----------------------------------
+
+This will hold the information your driver to operate, like its hardware
+address or maximum frequency.
+
+You may already have a struct like this, or you may need to create one
+from some of the #defines or global variables in the driver.
+
+Note that this information is not the run-time information. It should not
+include state that changes. It should be fixed throughout the live of
+U-Boot. Run-time information comes later.
+
+Here is what was in the exynos spi driver:
+
+.. code-block:: c
+
+	struct spi_bus {
+		enum periph_id periph_id;
+		s32 frequency;		/* Default clock frequency, -1 for none */
+		struct exynos_spi *regs;
+		int inited;		/* 1 if this bus is ready for use */
+		int node;
+		uint deactivate_delay_us;	/* Delay to wait after deactivate */
+	};
+
+Of these, inited is handled by DM and node is the device tree node, which
+DM tells you. The name is not quite right. So in this case we would use:
+
+.. code-block:: c
+
+	struct exynos_spi_platdata {
+		enum periph_id periph_id;
+		s32 frequency;		/* Default clock frequency, -1 for none */
+		struct exynos_spi *regs;
+		uint deactivate_delay_us;	/* Delay to wait after deactivate */
+	};
+
+
+Write ofdata_to_platdata() [for device tree only]
+-------------------------------------------------
+
+This method will convert information in the device tree node into a C
+structure in your driver (called platform data). If you are not using
+device tree, go to 8b.
+
+DM will automatically allocate the struct for us when we are using device
+tree, but we need to tell it the size:
+
+.. code-block:: c
+
+	U_BOOT_DRIVER(spi_exynos) = {
+	...
+		.platdata_auto_alloc_size = sizeof(struct exynos_spi_platdata),
+
+
+Here is a sample function. It gets a pointer to the platform data and
+fills in the fields from device tree.
+
+.. code-block:: c
+
+	static int exynos_spi_ofdata_to_platdata(struct udevice *bus)
+	{
+		struct exynos_spi_platdata *plat = bus->platdata;
+		const void *blob = gd->fdt_blob;
+		int node = dev_of_offset(bus);
+
+		plat->regs = (struct exynos_spi *)fdtdec_get_addr(blob, node, "reg");
+		plat->periph_id = pinmux_decode_periph_id(blob, node);
+
+		if (plat->periph_id == PERIPH_ID_NONE) {
+			debug("%s: Invalid peripheral ID %d\n", __func__,
+				plat->periph_id);
+			return -FDT_ERR_NOTFOUND;
+		}
+
+		/* Use 500KHz as a suitable default */
+		plat->frequency = fdtdec_get_int(blob, node, "spi-max-frequency",
+						500000);
+		plat->deactivate_delay_us = fdtdec_get_int(blob, node,
+						"spi-deactivate-delay", 0);
+		debug("%s: regs=%p, periph_id=%d, max-frequency=%d, deactivate_delay=%d\n",
+		      __func__, plat->regs, plat->periph_id, plat->frequency,
+		      plat->deactivate_delay_us);
+
+		return 0;
+	}
+
+
+Add the platform data [non-device-tree only]
+--------------------------------------------
+
+Specify this data in a U_BOOT_DEVICE() declaration in your board file:
+
+.. code-block:: c
+
+	struct exynos_spi_platdata platdata_spi0 = {
+		.periph_id = ...
+		.frequency = ...
+		.regs = ...
+		.deactivate_delay_us = ...
+	};
+
+	U_BOOT_DEVICE(board_spi0) = {
+		.name = "exynos_spi",
+		.platdata = &platdata_spi0,
+	};
+
+You will unfortunately need to put the struct definition into a header file
+in this case so that your board file can use it.
+
+
+Add the device private data
+---------------------------
+
+Most devices have some private data which they use to keep track of things
+while active. This is the run-time information and needs to be stored in
+a structure. There is probably a structure in the driver that includes a
+'struct spi_slave', so you can use that.
+
+.. code-block:: c
+
+	struct exynos_spi_slave {
+		struct spi_slave slave;
+		struct exynos_spi *regs;
+		unsigned int freq;		/* Default frequency */
+		unsigned int mode;
+		enum periph_id periph_id;	/* Peripheral ID for this device */
+		unsigned int fifo_size;
+		int skip_preamble;
+		struct spi_bus *bus;		/* Pointer to our SPI bus info */
+		ulong last_transaction_us;	/* Time of last transaction end */
+	};
+
+
+We should rename this to make its purpose more obvious, and get rid of
+the slave structure, so we have:
+
+.. code-block:: c
+
+	struct exynos_spi_priv {
+		struct exynos_spi *regs;
+		unsigned int freq;		/* Default frequency */
+		unsigned int mode;
+		enum periph_id periph_id;	/* Peripheral ID for this device */
+		unsigned int fifo_size;
+		int skip_preamble;
+		ulong last_transaction_us;	/* Time of last transaction end */
+	};
+
+
+DM can auto-allocate this also:
+
+.. code-block:: c
+
+	U_BOOT_DRIVER(spi_exynos) = {
+	...
+		.priv_auto_alloc_size = sizeof(struct exynos_spi_priv),
+
+
+Note that this is created before the probe method is called, and destroyed
+after the remove method is called. It will be zeroed when the probe
+method is called.
+
+
+Add the probe() and remove() methods
+------------------------------------
+
+Note: It's a good idea to build repeatedly as you are working, to avoid a
+huge amount of work getting things compiling at the end.
+
+The probe method is supposed to set up the hardware. U-Boot used to use
+spi_setup_slave() to do this. So take a look at this function and see
+what you can copy out to set things up.
+
+.. code-block:: c
+
+	static int exynos_spi_probe(struct udevice *bus)
+	{
+		struct exynos_spi_platdata *plat = dev_get_platdata(bus);
+		struct exynos_spi_priv *priv = dev_get_priv(bus);
+
+		priv->regs = plat->regs;
+		if (plat->periph_id == PERIPH_ID_SPI1 ||
+		    plat->periph_id == PERIPH_ID_SPI2)
+			priv->fifo_size = 64;
+		else
+			priv->fifo_size = 256;
+
+		priv->skip_preamble = 0;
+		priv->last_transaction_us = timer_get_us();
+		priv->freq = plat->frequency;
+		priv->periph_id = plat->periph_id;
+
+		return 0;
+	}
+
+This implementation doesn't actually touch the hardware, which is somewhat
+unusual for a driver. In this case we will do that when the device is
+claimed by something that wants to use the SPI bus.
+
+For remove we could shut down the clocks, but in this case there is
+nothing to do. DM frees any memory that it allocated, so we can just
+remove exynos_spi_remove() and its reference in U_BOOT_DRIVER.
+
+
+Implement set_speed()
+---------------------
+
+This should set up clocks so that the SPI bus is running at the right
+speed. With the old API spi_claim_bus() would normally do this and several
+of the following functions, so let's look at that function:
+
+.. code-block:: c
+
+	int spi_claim_bus(struct spi_slave *slave)
+	{
+		struct exynos_spi_slave *spi_slave = to_exynos_spi(slave);
+		struct exynos_spi *regs = spi_slave->regs;
+		u32 reg = 0;
+		int ret;
+
+		ret = set_spi_clk(spi_slave->periph_id,
+						spi_slave->freq);
+		if (ret < 0) {
+			debug("%s: Failed to setup spi clock\n", __func__);
+			return ret;
+		}
+
+		exynos_pinmux_config(spi_slave->periph_id, PINMUX_FLAG_NONE);
+
+		spi_flush_fifo(slave);
+
+		reg = readl(&regs->ch_cfg);
+		reg &= ~(SPI_CH_CPHA_B | SPI_CH_CPOL_L);
+
+		if (spi_slave->mode & SPI_CPHA)
+			reg |= SPI_CH_CPHA_B;
+
+		if (spi_slave->mode & SPI_CPOL)
+			reg |= SPI_CH_CPOL_L;
+
+		writel(reg, &regs->ch_cfg);
+		writel(SPI_FB_DELAY_180, &regs->fb_clk);
+
+		return 0;
+	}
+
+
+It sets up the speed, mode, pinmux, feedback delay and clears the FIFOs.
+With DM these will happen in separate methods.
+
+
+Here is an example for the speed part:
+
+.. code-block:: c
+
+	static int exynos_spi_set_speed(struct udevice *bus, uint speed)
+	{
+		struct exynos_spi_platdata *plat = bus->platdata;
+		struct exynos_spi_priv *priv = dev_get_priv(bus);
+		int ret;
+
+		if (speed > plat->frequency)
+			speed = plat->frequency;
+		ret = set_spi_clk(priv->periph_id, speed);
+		if (ret)
+			return ret;
+		priv->freq = speed;
+		debug("%s: regs=%p, speed=%d\n", __func__, priv->regs, priv->freq);
+
+		return 0;
+	}
+
+
+Implement set_mode()
+--------------------
+
+This should adjust the SPI mode (polarity, etc.). Again this code probably
+comes from the old spi_claim_bus(). Here is an example:
+
+.. code-block:: c
+
+	static int exynos_spi_set_mode(struct udevice *bus, uint mode)
+	{
+		struct exynos_spi_priv *priv = dev_get_priv(bus);
+		uint32_t reg;
+
+		reg = readl(&priv->regs->ch_cfg);
+		reg &= ~(SPI_CH_CPHA_B | SPI_CH_CPOL_L);
+
+		if (mode & SPI_CPHA)
+			reg |= SPI_CH_CPHA_B;
+
+		if (mode & SPI_CPOL)
+			reg |= SPI_CH_CPOL_L;
+
+		writel(reg, &priv->regs->ch_cfg);
+		priv->mode = mode;
+		debug("%s: regs=%p, mode=%d\n", __func__, priv->regs, priv->mode);
+
+		return 0;
+	}
+
+
+Implement claim_bus()
+---------------------
+
+This is where a client wants to make use of the bus, so claims it first.
+At this point we need to make sure everything is set up ready for data
+transfer. Note that this function is wholly internal to the driver - at
+present the SPI uclass never calls it.
+
+Here again we look at the old claim function and see some code that is
+needed. It is anything unrelated to speed and mode:
+
+.. code-block:: c
+
+	static int exynos_spi_claim_bus(struct udevice *bus)
+	{
+		struct exynos_spi_priv *priv = dev_get_priv(bus);
+
+		exynos_pinmux_config(priv->periph_id, PINMUX_FLAG_NONE);
+		spi_flush_fifo(priv->regs);
+
+		writel(SPI_FB_DELAY_180, &priv->regs->fb_clk);
+
+		return 0;
+	}
+
+The spi_flush_fifo() function is in the removed part of the code, so we
+need to expose it again (perhaps with an #endif before it and '#if 0'
+after it). It only needs access to priv->regs which is why we have
+passed that in:
+
+.. code-block:: c
+
+	/**
+	 * Flush spi tx, rx fifos and reset the SPI controller
+	 *
+	 * @param regs	Pointer to SPI registers
+	 */
+	static void spi_flush_fifo(struct exynos_spi *regs)
+	{
+		clrsetbits_le32(&regs->ch_cfg, SPI_CH_HS_EN, SPI_CH_RST);
+		clrbits_le32(&regs->ch_cfg, SPI_CH_RST);
+		setbits_le32(&regs->ch_cfg, SPI_TX_CH_ON | SPI_RX_CH_ON);
+	}
+
+
+Implement release_bus()
+-----------------------
+
+This releases the bus - in our example the old code in spi_release_bus()
+is a call to spi_flush_fifo, so we add:
+
+.. code-block:: c
+
+	static int exynos_spi_release_bus(struct udevice *bus)
+	{
+		struct exynos_spi_priv *priv = dev_get_priv(bus);
+
+		spi_flush_fifo(priv->regs);
+
+		return 0;
+	}
+
+
+Implement xfer()
+----------------
+
+This is the final method that we need to create, and it is where all the
+work happens. The method parameters are the same as the old spi_xfer() with
+the addition of a 'struct udevice' so conversion is pretty easy. Start
+by copying the contents of spi_xfer() to your new xfer() method and proceed
+from there.
+
+If (flags & SPI_XFER_BEGIN) is non-zero then xfer() normally calls an
+activate function, something like this:
+
+.. code-block:: c
+
+	void spi_cs_activate(struct spi_slave *slave)
+	{
+		struct exynos_spi_slave *spi_slave = to_exynos_spi(slave);
+
+		/* If it's too soon to do another transaction, wait */
+		if (spi_slave->bus->deactivate_delay_us &&
+		    spi_slave->last_transaction_us) {
+			ulong delay_us;		/* The delay completed so far */
+			delay_us = timer_get_us() - spi_slave->last_transaction_us;
+			if (delay_us < spi_slave->bus->deactivate_delay_us)
+				udelay(spi_slave->bus->deactivate_delay_us - delay_us);
+		}
+
+		clrbits_le32(&spi_slave->regs->cs_reg, SPI_SLAVE_SIG_INACT);
+		debug("Activate CS, bus %d\n", spi_slave->slave.bus);
+		spi_slave->skip_preamble = spi_slave->mode & SPI_PREAMBLE;
+	}
+
+The new version looks like this:
+
+.. code-block:: c
+
+	static void spi_cs_activate(struct udevice *dev)
+	{
+		struct udevice *bus = dev->parent;
+		struct exynos_spi_platdata *pdata = dev_get_platdata(bus);
+		struct exynos_spi_priv *priv = dev_get_priv(bus);
+
+		/* If it's too soon to do another transaction, wait */
+		if (pdata->deactivate_delay_us &&
+		    priv->last_transaction_us) {
+			ulong delay_us;		/* The delay completed so far */
+			delay_us = timer_get_us() - priv->last_transaction_us;
+			if (delay_us < pdata->deactivate_delay_us)
+				udelay(pdata->deactivate_delay_us - delay_us);
+		}
+
+		clrbits_le32(&priv->regs->cs_reg, SPI_SLAVE_SIG_INACT);
+		debug("Activate CS, bus '%s'\n", bus->name);
+		priv->skip_preamble = priv->mode & SPI_PREAMBLE;
+	}
+
+All we have really done here is change the pointers and print the device name
+instead of the bus number. Other local static functions can be treated in
+the same way.
+
+
+Set up the per-child data and child pre-probe function
+------------------------------------------------------
+
+To minimise the pain and complexity of the SPI subsystem while the driver
+model change-over is in place, struct spi_slave is used to reference a
+SPI bus slave, even though that slave is actually a struct udevice. In fact
+struct spi_slave is the device's child data. We need to make sure this space
+is available. It is possible to allocate more space that struct spi_slave
+needs, but this is the minimum.
+
+.. code-block:: c
+
+	U_BOOT_DRIVER(exynos_spi) = {
+	...
+		.per_child_auto_alloc_size	= sizeof(struct spi_slave),
+	}
+
+
+Optional: Set up cs_info() if you want it
+-----------------------------------------
+
+Sometimes it is useful to know whether a SPI chip select is valid, but this
+is not obvious from outside the driver. In this case you can provide a
+method for cs_info() to deal with this. If you don't provide it, then the
+device tree will be used to determine what chip selects are valid.
+
+Return -ENODEV if the supplied chip select is invalid, or 0 if it is valid.
+If you don't provide the cs_info() method, 0 is assumed for all chip selects
+that do not appear in the device tree.
+
+
+Test it
+-------
+
+Now that you have the code written and it compiles, try testing it using
+the 'sf test' command. You may need to enable CONFIG_CMD_SF_TEST for your
+board.
+
+
+Prepare patches and send them to the mailing lists
+--------------------------------------------------
+
+You can use 'tools/patman/patman' to prepare, check and send patches for
+your work. See tools/patman/README for details.
+
+A little note about SPI uclass features
+---------------------------------------
+
+The SPI uclass keeps some information about each device 'dev' on the bus:
+
+   struct dm_spi_slave_platdata:
+     This is device_get_parent_platdata(dev).
+     This is where the chip select number is stored, along with
+     the default bus speed and mode. It is automatically read
+     from the device tree in spi_child_post_bind(). It must not
+     be changed at run-time after being set up because platform
+     data is supposed to be immutable at run-time.
+   struct spi_slave:
+     This is device_get_parentdata(dev).
+     Already mentioned above. It holds run-time information about
+     the device.
+
+There are also some SPI uclass methods that get called behind the scenes:
+
+   spi_post_bind():
+     Called when a new bus is bound.
+     This scans the device tree for devices on the bus, and binds
+     each one. This in turn causes spi_child_post_bind() to be
+     called for each, which reads the device tree information
+     into the parent (per-child) platform data.
+   spi_child_post_bind():
+     Called when a new child is bound.
+     As mentioned above this reads the device tree information
+     into the per-child platform data
+   spi_child_pre_probe():
+     Called before a new child is probed.
+     This sets up the mode and speed in struct spi_slave by
+     copying it from the parent's platform data for this child.
+     It also sets the 'dev' pointer, needed to permit passing
+     'struct spi_slave' around the place without needing a
+     separate 'struct udevice' pointer.
+
+The above housekeeping makes it easier to write your SPI driver.
diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c
index 1961fda722..aa6c28d8c1 100644
--- a/drivers/spi/spi-uclass.c
+++ b/drivers/spi/spi-uclass.c
@@ -262,11 +262,10 @@ int spi_cs_info(struct udevice *bus, uint cs, struct spi_cs_info *info)
 		return ops->cs_info(bus, cs, info);
 
 	/*
-	 * We could assume there is at least one valid chip select, but best
-	 * to be sure and return an error in this case. The driver didn't
-	 * care enough to tell us.
+	 * We could assume there is at least one valid chip select.
+	 * The driver didn't care enough to tell us.
 	 */
-	return -ENODEV;
+	return 0;
 }
 
 int spi_find_bus_and_cs(int busnum, int cs, struct udevice **busp,

commit 0e760d45c2fdd26c9ed39ffdca79a7fed7d84a86
Author: Thomas Fitzsimmons <fitzsim@fitzsim.org>
Date:   Fri Sep 6 07:51:19 2019 -0400

    UPSTREAM: dm: spi: Do not assume first SPI bus
    
    When CONFIG_OF_PRIOR_STAGE is enabled, this workaround was needed
    before device_bind_common assigned request numbers sequentially in the
    absence of aliases.
    
    Change-Id: I89742a27b4f7ba1d844cab528ea7c590bff278d1
    Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org>
    Cc: Bin Meng <bmeng.cn@gmail.com>
    Cc: Simon Glass <sjg@chromium.org>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 640abba50763b215317468062a5e1b867ae57a76)

diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c
index 82fdaf17fa..1961fda722 100644
--- a/drivers/spi/spi-uclass.c
+++ b/drivers/spi/spi-uclass.c
@@ -300,7 +300,7 @@ int spi_get_bus_and_cs(int busnum, int cs, int speed, int mode,
 	bool created = false;
 	int ret;
 
-#if CONFIG_IS_ENABLED(OF_PLATDATA) || CONFIG_IS_ENABLED(OF_PRIOR_STAGE)
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
 	ret = uclass_first_device_err(UCLASS_SPI, &bus);
 #else
 	ret = uclass_get_device_by_seq(UCLASS_SPI, busnum, &bus);

commit a3171fa36692e3b3522663b31f526a2a678066c7
Author: Jagan Teki <jagan@amarulasolutions.com>
Date:   Mon Jul 22 17:22:56 2019 +0530

    UPSTREAM: spi: Add spi_write_then_read
    
    Add support for SPI synchronous write followed by read,
    this is common interface call from spi-nor to spi drivers.
    
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Change-Id: Id064c8a2703d409ca64399cef498f4c768e26ac0
    Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
    Tested-by: Adam Ford <aford173@gmail.com> #da850-evm
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 8473b32127232d8b602d905a2ed26ed48d352f6e)

diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c
index bc6ee3561e..82fdaf17fa 100644
--- a/drivers/spi/spi-uclass.c
+++ b/drivers/spi/spi-uclass.c
@@ -109,6 +109,30 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
 	return dm_spi_xfer(slave->dev, bitlen, dout, din, flags);
 }
 
+int spi_write_then_read(struct spi_slave *slave, const u8 *opcode,
+			size_t n_opcode, const u8 *txbuf, u8 *rxbuf,
+			size_t n_buf)
+{
+	unsigned long flags = SPI_XFER_BEGIN;
+	int ret;
+
+	if (n_buf == 0)
+		flags |= SPI_XFER_END;
+
+	ret = spi_xfer(slave, n_opcode * 8, opcode, NULL, flags);
+	if (ret) {
+		debug("spi: failed to send command (%zu bytes): %d\n",
+		      n_opcode, ret);
+	} else if (n_buf != 0) {
+		ret = spi_xfer(slave, n_buf * 8, txbuf, rxbuf, SPI_XFER_END);
+		if (ret)
+			debug("spi: failed to transfer %zu bytes of data: %d\n",
+			      n_buf, ret);
+	}
+
+	return ret;
+}
+
 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
 static int spi_child_post_bind(struct udevice *dev)
 {
diff --git a/include/spi.h b/include/spi.h
index ff91e9eaf0..484f96bea5 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -259,6 +259,26 @@ int spi_set_wordlen(struct spi_slave *slave, unsigned int wordlen);
 int  spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
 		void *din, unsigned long flags);
 
+/**
+ * spi_write_then_read - SPI synchronous write followed by read
+ *
+ * This performs a half duplex transaction in which the first transaction
+ * is to send the opcode and if the length of buf is non-zero then it start
+ * the second transaction as tx or rx based on the need from respective slave.
+ *
+ * @slave:	The SPI slave device with which opcode/data will be exchanged
+ * @opcode:	opcode used for specific transfer
+ * @n_opcode:	size of opcode, in bytes
+ * @txbuf:	buffer into which data to be written
+ * @rxbuf:	buffer into which data will be read
+ * @n_buf:	size of buf (whether it's [tx|rx]buf), in bytes
+ *
+ * Returns: 0 on success, not 0 on failure
+ */
+int spi_write_then_read(struct spi_slave *slave, const u8 *opcode,
+			size_t n_opcode, const u8 *txbuf, u8 *rxbuf,
+			size_t n_buf);
+
 /* Copy memory mapped data */
 void spi_flash_copy_mmap(void *data, void *offset, size_t len);
 

commit 448ceaf5078c9aa0cd7d92c6d8d0b3d8e23e61c4
Author: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Date:   Tue Oct 30 21:09:48 2018 +0100

    UPSTREAM: dm: spi: prevent setting a speed of 0 Hz
    
    When the device tree is missing a correct spi slave description below
    the bus (compatible "spi-flash" or spi-max-frequency are missing),
    the 'set_speed' callback can be called with 'speed' == 0 Hz.
    At least with cadence qspi, this leads to a division by zero.
    
    Prevent this by initializing speed to 100 kHz in this case (same
    fallback value as is done in 'dm_spi_claim_bus') and issue a warning
    to console.
    
    Change-Id: Ie9e619fd2fe894be6b3043a6a8843ac8c621d6c0
    Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 12bfb2e05fc29bfbec7eb76ea8cc02e130268801)

diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c
index 1b51dba4ce..bc6ee3561e 100644
--- a/drivers/spi/spi-uclass.c
+++ b/drivers/spi/spi-uclass.c
@@ -16,6 +16,8 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#define SPI_DEFAULT_SPEED_HZ 100000
+
 static int spi_set_speed_mode(struct udevice *bus, int speed, int mode)
 {
 	struct dm_spi_ops *ops;
@@ -59,7 +61,7 @@ int dm_spi_claim_bus(struct udevice *dev)
 			speed = spi->max_hz;
 	}
 	if (!speed)
-		speed = 100000;
+		speed = SPI_DEFAULT_SPEED_HZ;
 	if (speed != slave->speed) {
 		int ret = spi_set_speed_mode(bus, speed, slave->mode);
 
@@ -301,7 +303,13 @@ int spi_get_bus_and_cs(int busnum, int cs, int speed, int mode,
 		}
 		plat = dev_get_parent_platdata(dev);
 		plat->cs = cs;
-		plat->max_hz = speed;
+		if (speed) {
+			plat->max_hz = speed;
+		} else {
+			printf("Warning: SPI speed fallback to %u kHz\n",
+			       SPI_DEFAULT_SPEED_HZ / 1000);
+			plat->max_hz = SPI_DEFAULT_SPEED_HZ;
+		}
 		plat->mode = mode;
 		created = true;
 	} else if (ret) {
@@ -377,7 +385,8 @@ int spi_slave_ofdata_to_platdata(struct udevice *dev,
 	int value;
 
 	plat->cs = dev_read_u32_default(dev, "reg", -1);
-	plat->max_hz = dev_read_u32_default(dev, "spi-max-frequency", 0);
+	plat->max_hz = dev_read_u32_default(dev, "spi-max-frequency",
+					    SPI_DEFAULT_SPEED_HZ);
 	if (dev_read_bool(dev, "spi-cpol"))
 		mode |= SPI_CPOL;
 	if (dev_read_bool(dev, "spi-cpha"))

commit f36ea2f6e17621c4d9dd97c4dbfab62d03d061df
Author: Thomas Fitzsimmons <fitzsim@fitzsim.org>
Date:   Fri Jun 8 17:59:45 2018 -0400

    UPSTREAM: board: arm: Add support for Broadcom BCM7445
    
    Add support for loading U-Boot on the Broadcom 7445 SoC.  This port
    assumes Broadcom's BOLT bootloader is acting as the second stage
    bootloader, and U-Boot is acting as the third stage bootloader, loaded
    as an ELF program by BOLT.
    
    Change-Id: I79d19ced6ed7c76a862b94162a92ceaddf09b062
    Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org>
    Cc: Stefan Roese <sr@denx.de>
    Cc: Tom Rini <trini@konsulko.com>
    Cc: Florian Fainelli <f.fainelli@gmail.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 894c3ad27fa940beb7fdc07d01dcfe81c03d0481)

diff --git a/MAINTAINERS b/MAINTAINERS
index 35f8047c2f..06d9e8cc63 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -87,6 +87,16 @@ F:	drivers/serial/serial_bcm283x_mu.c
 F:	drivers/video/bcm2835.c
 F:	include/dm/platform_data/serial_bcm283x_mu.h
 
+ARM BROADCOM BCMSTB
+M:	Thomas Fitzsimmons <fitzsim@fitzsim.org>
+S:	Maintained
+F:	arch/arm/mach-bcmstb/
+F:	board/broadcom/bcmstb/
+F:	configs/bcm7445_defconfig
+F:	doc/README.bcm7xxx
+F:	drivers/mmc/bcmstb_sdhci.c
+F:	drivers/spi/bcmstb_spi.c
+
 ARM FREESCALE IMX
 M:	Stefano Babic <sbabic@denx.de>
 M:	Fabio Estevam <fabio.estevam@nxp.com>
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 94c6e60ad1..5c82dbb8da 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -557,6 +557,16 @@ config TARGET_VEXPRESS_CA15_TC2
 	select CPU_V7_HAS_NONSEC
 	select CPU_V7_HAS_VIRT
 
+config ARCH_BCMSTB
+	bool "Broadcom BCM7XXX family"
+	select CPU_V7A
+	select DM
+	select OF_CONTROL
+	select OF_PRIOR_STAGE
+	help
+	  This enables support for Broadcom ARM-based set-top box
+	  chipsets, including the 7445 family of chips.
+
 config TARGET_VEXPRESS_CA5X2
 	bool "Support vexpress_ca5x2"
 	select CPU_V7
@@ -1176,6 +1186,8 @@ source "arch/arm/mach-at91/Kconfig"
 
 source "arch/arm/mach-bcm283x/Kconfig"
 
+source "arch/arm/mach-bcmstb/Kconfig"
+
 source "arch/arm/mach-davinci/Kconfig"
 
 source "arch/arm/mach-exynos/Kconfig"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 65a493d580..42c9ed887f 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -53,6 +53,7 @@ PLATFORM_CPPFLAGS += $(arch-y) $(tune-y)
 machine-$(CONFIG_ARCH_ASPEED)		+= aspeed
 machine-$(CONFIG_ARCH_AT91)		+= at91
 machine-$(CONFIG_ARCH_BCM283X)		+= bcm283x
+machine-$(CONFIG_ARCH_BCMSTB)		+= bcmstb
 machine-$(CONFIG_ARCH_DAVINCI)		+= davinci
 machine-$(CONFIG_ARCH_EXYNOS)		+= exynos
 machine-$(CONFIG_ARCH_HIGHBANK)		+= highbank
diff --git a/arch/arm/mach-bcmstb/Kconfig b/arch/arm/mach-bcmstb/Kconfig
new file mode 100644
index 0000000000..6c7952ffe5
--- /dev/null
+++ b/arch/arm/mach-bcmstb/Kconfig
@@ -0,0 +1,36 @@
+if ARCH_BCMSTB
+
+config TARGET_BCM7445
+	bool "Broadcom 7445 TSBL"
+	depends on ARCH_BCMSTB
+	help
+	  Support for the Broadcom 7445 SoC.  This port assumes BOLT
+	  is acting as the second stage bootloader, and U-Boot is
+	  acting as the third stage bootloader (TSBL), loaded by BOLT.
+	  This port may work on other BCM7xxx boards with
+	  configuration changes.
+
+config SYS_CPU
+	default "armv7"
+
+config SYS_BOARD
+	default "bcmstb"
+
+config SYS_VENDOR
+	default "broadcom"
+
+config SYS_SOC
+	default "bcmstb"
+
+config SYS_CONFIG_NAME
+	default "bcm7445"
+
+config SYS_FDT_SAVE_ADDRESS
+	hex "Address to which the prior stage provided DTB will be copied"
+	default 0x1f00000
+
+config BCMSTB_SDHCI_INDEX
+	int "Index of preferred BCMSTB SDHCI alias in DTB"
+	default 1
+
+endif
diff --git a/arch/arm/mach-bcmstb/Makefile b/arch/arm/mach-bcmstb/Makefile
new file mode 100644
index 0000000000..71e5727e41
--- /dev/null
+++ b/arch/arm/mach-bcmstb/Makefile
@@ -0,0 +1,8 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2018  Cisco Systems, Inc.
+#
+# Author: Thomas Fitzsimmons <fitzsim@fitzsim.org>
+#
+
+obj-y	:= lowlevel_init.o
diff --git a/arch/arm/mach-bcmstb/include/mach/gpio.h b/arch/arm/mach-bcmstb/include/mach/gpio.h
new file mode 100644
index 0000000000..bffecf9bde
--- /dev/null
+++ b/arch/arm/mach-bcmstb/include/mach/gpio.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2018  Cisco Systems, Inc.
+ *
+ * Author: Thomas Fitzsimmons <fitzsim@fitzsim.org>
+ */
+
+#ifndef _BCMSTB_GPIO_H
+#define _BCMSTB_GPIO_H
+
+#endif /* _BCMSTB_GPIO_H */
diff --git a/arch/arm/mach-bcmstb/include/mach/hardware.h b/arch/arm/mach-bcmstb/include/mach/hardware.h
new file mode 100644
index 0000000000..76f799d024
--- /dev/null
+++ b/arch/arm/mach-bcmstb/include/mach/hardware.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2018  Cisco Systems, Inc.
+ *
+ * Author: Thomas Fitzsimmons <fitzsim@fitzsim.org>
+ */
+
+#ifndef _BCMSTB_HARDWARE_H
+#define _BCMSTB_HARDWARE_H
+
+#endif /* _BCMSTB_HARDWARE_H */
diff --git a/arch/arm/mach-bcmstb/include/mach/prior_stage.h b/arch/arm/mach-bcmstb/include/mach/prior_stage.h
new file mode 100644
index 0000000000..6c36c6810a
--- /dev/null
+++ b/arch/arm/mach-bcmstb/include/mach/prior_stage.h
@@ -0,0 +1,30 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2018  Cisco Systems, Inc.
+ *
+ * Author: Thomas Fitzsimmons <fitzsim@fitzsim.org>
+ */
+
+#ifndef _BCMSTB_PRIOR_STAGE_H
+#define _BCMSTB_PRIOR_STAGE_H
+
+#ifndef __ASSEMBLY__
+
+#include <linux/types.h>
+
+struct bcmstb_boot_parameters {
+	u32 r0;
+	u32 r1;
+	u32 r2;
+	u32 r3;
+	u32 sp;
+	u32 lr;
+};
+
+extern struct bcmstb_boot_parameters bcmstb_boot_parameters;
+
+extern phys_addr_t prior_stage_fdt_address;
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* _BCMSTB_PRIOR_STAGE_H */
diff --git a/arch/arm/mach-bcmstb/include/mach/sdhci.h b/arch/arm/mach-bcmstb/include/mach/sdhci.h
new file mode 100644
index 0000000000..243783d682
--- /dev/null
+++ b/arch/arm/mach-bcmstb/include/mach/sdhci.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2018  Cisco Systems, Inc.
+ *
+ * Author: Thomas Fitzsimmons <fitzsim@fitzsim.org>
+ */
+
+#ifndef _BCMSTB_SDHCI_H
+#define _BCMSTB_SDHCI_H
+
+#include <linux/types.h>
+
+int bcmstb_sdhci_init(phys_addr_t regbase);
+
+#endif /* _BCMSTB_SDHCI_H */
diff --git a/arch/arm/mach-bcmstb/include/mach/timer.h b/arch/arm/mach-bcmstb/include/mach/timer.h
new file mode 100644
index 0000000000..d05b4d64fe
--- /dev/null
+++ b/arch/arm/mach-bcmstb/include/mach/timer.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2018  Cisco Systems, Inc.
+ *
+ * Author: Thomas Fitzsimmons <fitzsim@fitzsim.org>
+ */
+
+#ifndef _BCMSTB_TIMER_H
+#define _BCMSTB_TIMER_H
+
+unsigned long timer_read_counter(void);
+
+#endif /* _BCMSTB_TIMER_H */
diff --git a/arch/arm/mach-bcmstb/lowlevel_init.S b/arch/arm/mach-bcmstb/lowlevel_init.S
new file mode 100644
index 0000000000..aa81f70248
--- /dev/null
+++ b/arch/arm/mach-bcmstb/lowlevel_init.S
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2018  Cisco Systems, Inc.
+ *
+ * Author: Thomas Fitzsimmons <fitzsim@fitzsim.org>
+ */
+
+#include <linux/linkage.h>
+
+ENTRY(save_boot_params)
+	ldr	r6, =bcmstb_boot_parameters
+	str	r0, [r6, #0]
+	str	r1, [r6, #4]
+	str	r2, [r6, #8]
+	str	r3, [r6, #12]
+	str	sp, [r6, #16]
+	str	lr, [r6, #20]
+	ldr	r6, =prior_stage_fdt_address
+	str	r2, [r6]
+	b	save_boot_params_ret
+ENDPROC(save_boot_params)
diff --git a/board/broadcom/bcmstb/MAINTAINERS b/board/broadcom/bcmstb/MAINTAINERS
new file mode 100644
index 0000000000..5851cb9978
--- /dev/null
+++ b/board/broadcom/bcmstb/MAINTAINERS
@@ -0,0 +1,7 @@
+BCM7445 BOARD
+M:	Thomas Fitzsimmons <fitzsim@fitzsim.org>
+S:	Maintained
+F:	board/broadcom/bcmstb/
+F:	include/configs/bcmstb.h
+F:	include/configs/bcm7445.h
+F:	configs/bcm7445_defconfig
diff --git a/board/broadcom/bcmstb/Makefile b/board/broadcom/bcmstb/Makefile
new file mode 100644
index 0000000000..9609887760
--- /dev/null
+++ b/board/broadcom/bcmstb/Makefile
@@ -0,0 +1,8 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2018  Cisco Systems, Inc.
+#
+# Author: Thomas Fitzsimmons <fitzsim@fitzsim.org>
+#
+
+obj-y	:= bcmstb.o
diff --git a/board/broadcom/bcmstb/bcmstb.c b/board/broadcom/bcmstb/bcmstb.c
new file mode 100644
index 0000000000..25cd354998
--- /dev/null
+++ b/board/broadcom/bcmstb/bcmstb.c
@@ -0,0 +1,194 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2018  Cisco Systems, Inc.
+ *
+ * Author: Thomas Fitzsimmons <fitzsim@fitzsim.org>
+ */
+
+#include <linux/types.h>
+#include <common.h>
+#include <asm/io.h>
+#include <asm/bootm.h>
+#include <mach/sdhci.h>
+#include <mach/timer.h>
+#include <mmc.h>
+#include <fdtdec.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define BCMSTB_DATA_SECTION __attribute__((section(".data")))
+
+struct bcmstb_boot_parameters bcmstb_boot_parameters BCMSTB_DATA_SECTION;
+
+phys_addr_t prior_stage_fdt_address BCMSTB_DATA_SECTION;
+
+union reg_value_union {
+	const char *data;
+	const phys_addr_t *address;
+};
+
+int board_init(void)
+{
+	return 0;
+}
+
+u32 get_board_rev(void)
+{
+	return 0;
+}
+
+void reset_cpu(ulong ignored)
+{
+}
+
+int print_cpuinfo(void)
+{
+	return 0;
+}
+
+int dram_init(void)
+{
+	if (fdtdec_setup_memory_size() != 0)
+		return -EINVAL;
+
+	return 0;
+}
+
+int dram_init_banksize(void)
+{
+	fdtdec_setup_memory_banksize();
+
+	/*
+	 * On this SoC, U-Boot is running as an ELF file.  Change the
+	 * relocation address to CONFIG_SYS_TEXT_BASE, so that in
+	 * setup_reloc, gd->reloc_off works out to 0, effectively
+	 * disabling relocation.  Otherwise U-Boot hangs in the setup
+	 * instructions just before relocate_code in
+	 * arch/arm/lib/crt0.S.
+	 */
+	gd->relocaddr = CONFIG_SYS_TEXT_BASE;
+
+	return 0;
+}
+
+void enable_caches(void)
+{
+	/*
+	 * This port assumes that the prior stage bootloader has
+	 * enabled I-cache and D-cache already.  Implementing this
+	 * function silences the warning in the default function.
+	 */
+}
+
+static const phys_addr_t bcmstb_sdhci_address(u32 alias_index)
+{
+	int node = 0;
+	int ret = 0;
+	char sdhci[16] = { 0 };
+	const void *fdt = gd->fdt_blob;
+	const char *path = NULL;
+	struct fdt_resource resource = { 0 };
+
+	if (!fdt) {
+		printf("%s: Invalid gd->fdt_blob\n", __func__);
+		return 0;
+	}
+
+	node = fdt_path_offset(fdt, "/aliases");
+	if (node < 0) {
+		printf("%s: Failed to find /aliases node\n", __func__);
+		return 0;
+	}
+
+	sprintf(sdhci, "sdhci%d", alias_index);
+	path = fdt_getprop(fdt, node, sdhci, NULL);
+	if (!path) {
+		printf("%s: Failed to find alias for %s\n", __func__, sdhci);
+		return 0;
+	}
+
+	node = fdt_path_offset(fdt, path);
+	if (node < 0) {
+		printf("%s: Failed to resolve BCMSTB SDHCI alias\n", __func__);
+		return 0;
+	}
+
+	ret = fdt_get_named_resource(fdt, node, "reg", "reg-names",
+				     "host", &resource);
+	if (ret) {
+		printf("%s: Failed to read BCMSTB SDHCI host resource\n",
+		       __func__);
+		return 0;
+	}
+
+	return resource.start;
+}
+
+int board_mmc_init(bd_t *bis)
+{
+	phys_addr_t sdhci_base_address = 0;
+
+	sdhci_base_address = bcmstb_sdhci_address(CONFIG_BCMSTB_SDHCI_INDEX);
+
+	if (!sdhci_base_address) {
+		sdhci_base_address = BCMSTB_SDHCI_BASE;
+		printf("%s: Assuming BCMSTB SDHCI address: 0x%p\n",
+		       __func__, (void *)sdhci_base_address);
+	}
+
+	debug("BCMSTB SDHCI base address: 0x%p\n", (void *)sdhci_base_address);
+
+	bcmstb_sdhci_init(sdhci_base_address);
+
+	return 0;
+}
+
+int timer_init(void)
+{
+	gd->arch.timer_rate_hz = readl(BCMSTB_TIMER_FREQUENCY);
+
+	return 0;
+}
+
+ulong get_tbclk(void)
+{
+	return gd->arch.timer_rate_hz;
+}
+
+uint64_t get_ticks(void)
+{
+	gd->timebase_h = readl(BCMSTB_TIMER_HIGH);
+	gd->timebase_l = readl(BCMSTB_TIMER_LOW);
+
+	return ((uint64_t)gd->timebase_h << 32) | gd->timebase_l;
+}
+
+int board_late_init(void)
+{
+	debug("Arguments from prior stage bootloader:\n");
+	debug("General Purpose Register 0: 0x%x\n", bcmstb_boot_parameters.r0);
+	debug("General Purpose Register 1: 0x%x\n", bcmstb_boot_parameters.r1);
+	debug("General Purpose Register 2: 0x%x\n", bcmstb_boot_parameters.r2);
+	debug("General Purpose Register 3: 0x%x\n", bcmstb_boot_parameters.r3);
+	debug("Stack Pointer Register:     0x%x\n", bcmstb_boot_parameters.sp);
+	debug("Link Register:              0x%x\n", bcmstb_boot_parameters.lr);
+	debug("Assuming timer frequency register at: 0x%p\n",
+	      (void *)BCMSTB_TIMER_FREQUENCY);
+	debug("Read timer frequency (in Hz): %ld\n", gd->arch.timer_rate_hz);
+	debug("Prior stage provided DTB at: 0x%p\n",
+	      (void *)prior_stage_fdt_address);
+
+	/*
+	 * Set fdtcontroladdr in the environment so that scripts can
+	 * refer to it, for example, to reuse it for fdtaddr.
+	 */
+	env_set_hex("fdtcontroladdr", prior_stage_fdt_address);
+
+	/*
+	 * Do not set machid to the machine identifier value provided
+	 * by the prior stage bootloader (bcmstb_boot_parameters.r1)
+	 * because we're using a device tree to boot Linux.
+	 */
+
+	return 0;
+}
diff --git a/configs/bcm7445_defconfig b/configs/bcm7445_defconfig
new file mode 100644
index 0000000000..46dea17563
--- /dev/null
+++ b/configs/bcm7445_defconfig
@@ -0,0 +1,27 @@
+CONFIG_ARM=y
+CONFIG_ARCH_BCMSTB=y
+CONFIG_TARGET_BCM7445=y
+CONFIG_USE_PRIVATE_LIBGCC=y
+CONFIG_OF_CONTROL=y
+CONFIG_OF_PRIOR_STAGE=y
+CONFIG_DM=y
+CONFIG_DM_SPI=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI=y
+CONFIG_SPI_FLASH=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_BCMSTB_SPI=y
+CONFIG_FIT=y
+CONFIG_FIT_SIGNATURE=y
+CONFIG_RSA=y
+CONFIG_BLK=n
+CONFIG_SDHCI=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_BCMSTB=y
+CONFIG_CONS_INDEX=3
+CONFIG_BOOTDELAY=1
+CONFIG_SYS_PROMPT="U-Boot>"
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_TEXT_BASE=0x80100000
+CONFIG_SYS_NS16550_COM3=0xf040ab00
+CONFIG_EFI_LOADER=n
diff --git a/doc/README.bcm7xxx b/doc/README.bcm7xxx
new file mode 100644
index 0000000000..9b5eae4741
--- /dev/null
+++ b/doc/README.bcm7xxx
@@ -0,0 +1,150 @@
+Summary
+=======
+
+This document describes how to use U-Boot on the Broadcom 7445 SoC, as
+a third stage bootloader loaded by Broadcom's BOLT bootloader.
+
+BOLT loads U-Boot as a generic ELF binary.  Some U-Boot features such
+as networking are not yet available but other important features are,
+including:
+
+   - ext4 file system traversal
+
+   - support for loading FIT images
+
+   - advanced scripting
+
+   - support for FIT-provided DTBs instead of relying on the
+     BOLT-provided DTB
+
+A customized version of this port has been used in production.  The
+same approach may work on other BCM7xxx boards, with some
+configuration adjustments and memory layout experimentation.
+
+Build
+=====
+
+make bcm7445_defconfig
+make
+${CROSS_COMPILE}strip u-boot
+
+Run
+===
+
+Flash the u-boot binary into board storage, then invoke it from BOLT.
+For example:
+
+BOLT> boot -bsu -elf flash0.u-boot1
+
+This port assumes that I-cache and D-cache are already enabled when
+U-Boot is entered.
+
+Flattened Image Tree Support
+============================
+
+What follows is an example FIT image source file.  Build it with:
+
+mkimage -f image.its image.itb
+
+Booting the resulting image.itb was tested on BOLT v1.20, with the
+following kernels:
+
+https://github.com/Broadcom/stblinux-3.14
+https://github.com/Broadcom/stblinux-4.1
+https://github.com/Broadcom/stblinux-4.9
+
+and with a generic ARMv7 root file system.
+
+image.its:
+/dts-v1/;
+/ {
+	description = "BCM7445 FIT";
+	images {
+		kernel@1 {
+			description = "Linux kernel";
+			/*
+			 * This kernel image output format can be
+			 * generated with:
+			 *
+			 * make vmlinux
+			 * ${CROSS_COMPILE}objcopy -O binary -S vmlinux vmlinux.bin
+			 * gzip -9 vmlinux.bin
+			 *
+			 * For stblinux-3.14, the specific Broadcom
+			 * board type should be configured in the
+			 * kernel, for example CONFIG_BCM7445D0=y.
+			 */
+			data = /incbin/("<vmlinux.bin.gz>");
+			type = "kernel";
+			arch = "arm";
+			os = "linux";
+			compression = "gzip";
+			load = <0x8000>;
+			entry = <0x8000>;
+			hash@1 {
+				algo = "sha256";
+			};
+		};
+		ramdisk@1 {
+			description = "Initramfs root file system";
+			data = /incbin/("<initramfs.cpio.gz>");
+			type = "ramdisk";
+			arch = "arm";
+			os = "linux";
+			compression = "gzip";
+			/*
+			 * Set the environment variable initrd_high to
+			 * 0xffffffff, and set "load" and "entry" here
+			 * to 0x0 to keep initramfs in-place and to
+			 * accommodate stblinux bmem/CMA reservations.
+			 */
+			load = <0x0>;
+			entry = <0x0>;
+			hash@1 {
+				algo = "sha256";
+			};
+		};
+		fdt@1 {
+			description = "Device tree dumped from BOLT";
+			/*
+			 * This DTB should be similar to the
+			 * BOLT-generated device tree, after BOLT has
+			 * done its runtime modifications to it.  For
+			 * example, it can be dumped from within
+			 * U-Boot (at ${fdtcontroladdr}), after BOLT
+			 * has loaded U-Boot.  The result can be added
+			 * to the Linux source tree as a .dts file.
+			 *
+			 * To support modifications to the device tree
+			 * in-place in U-Boot, add to Linux's
+			 * arch/arm/boot/dts/Makefile:
+			 *
+			 * DTC_FLAGS ?= -p 4096
+			 *
+			 * This will leave some padding in the DTB and
+			 * thus reserve room for node additions.
+			 *
+			 * Also, set the environment variable fdt_high
+			 * to 0xffffffff to keep the DTB in-place and
+			 * to accommodate stblinux bmem/CMA
+			 * reservations.
+			 */
+			data = /incbin/("<bolt-<version>.dtb");
+			type = "flat_dt";
+			arch = "arm";
+			compression = "none";
+			hash@1 {
+				algo = "sha256";
+			};
+		};
+	};
+	configurations {
+		default = "conf@bcm7445";
+		conf@bcm7445 {
+			description = "BCM7445 configuration";
+			kernel = "kernel@1";
+			ramdisk = "ramdisk@1";
+			fdt = "fdt@1";
+		};
+	};
+};
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 52bf888d78..5aafafca2a 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -248,6 +248,17 @@ config MMC_SDHCI_BCM2835
 
 	  If unsure, say N.
 
+config MMC_SDHCI_BCMSTB
+	tristate "SDHCI support for the BCMSTB SD/MMC Controller"
+	depends on MMC_SDHCI
+	help
+	  This selects the Broadcom set-top box SD/MMC controller.
+
+	  If you have a BCMSTB platform with SD or MMC devices,
+	  say Y here.
+
+	  If unsure, say N.
+
 config MMC_SDHCI_CADENCE
 	bool "SDHCI support for the Cadence SD/SDIO/eMMC controller"
 	depends on BLK && DM_MMC
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index 6c6bff4c3d..4e0e6330d0 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -46,6 +46,7 @@ obj-$(CONFIG_SH_SDHI) += sh_sdhi.o
 obj-$(CONFIG_MMC_SDHCI)			+= sdhci.o
 obj-$(CONFIG_MMC_SDHCI_ATMEL)		+= atmel_sdhci.o
 obj-$(CONFIG_MMC_SDHCI_BCM2835)		+= bcm2835_sdhci.o
+obj-$(CONFIG_MMC_SDHCI_BCMSTB)		+= bcmstb_sdhci.o
 obj-$(CONFIG_MMC_SDHCI_CADENCE)		+= sdhci-cadence.o
 obj-$(CONFIG_MMC_SDHCI_KONA)		+= kona_sdhci.o
 obj-$(CONFIG_MMC_SDHCI_MSM)		+= msm_sdhci.o
diff --git a/drivers/mmc/bcmstb_sdhci.c b/drivers/mmc/bcmstb_sdhci.c
new file mode 100644
index 0000000000..443ae8d481
--- /dev/null
+++ b/drivers/mmc/bcmstb_sdhci.c
@@ -0,0 +1,67 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2018  Cisco Systems, Inc.
+ *
+ * Author: Thomas Fitzsimmons <fitzsim@fitzsim.org>
+ */
+
+#include <common.h>
+#include <mach/sdhci.h>
+#include <malloc.h>
+#include <sdhci.h>
+
+/*
+ * The BCMSTB SDHCI has a quirk in that its actual maximum frequency
+ * capability is 100 MHz.  The divisor that is eventually written to
+ * SDHCI_CLOCK_CONTROL is calculated based on what the MMC device
+ * reports, and relative to this maximum frequency.
+ *
+ * This define used to be set to 52000000 (52 MHz), the desired
+ * maximum frequency, but that would result in the communication
+ * actually running at 100 MHz (seemingly without issue), which is
+ * out-of-spec.
+ *
+ * Now, by setting this to 0 (auto-detect), 100 MHz will be read from
+ * the capabilities register, and the resulting divisor will be
+ * doubled, meaning that the clock control register will be set to the
+ * in-spec 52 MHz value.
+ */
+#define BCMSTB_SDHCI_MAXIMUM_CLOCK_FREQUENCY	0
+/*
+ * When the minimum clock frequency is set to 0 (auto-detect), U-Boot
+ * sets it to 100 MHz divided by SDHCI_MAX_DIV_SPEC_300, or 48,875 Hz,
+ * which results in the controller timing out when trying to
+ * communicate with the MMC device.  Hard-code this value to 400000
+ * (400 kHz) to prevent this.
+ */
+#define BCMSTB_SDHCI_MINIMUM_CLOCK_FREQUENCY	400000
+
+static char *BCMSTB_SDHCI_NAME = "bcmstb-sdhci";
+
+/*
+ * This driver has only been tested with eMMC devices; SD devices may
+ * not work.
+ */
+int bcmstb_sdhci_init(phys_addr_t regbase)
+{
+	struct sdhci_host *host = NULL;
+
+	host = (struct sdhci_host *)malloc(sizeof(struct sdhci_host));
+	if (!host) {
+		printf("%s: Failed to allocate memory\n", __func__);
+		return 1;
+	}
+	memset(host, 0, sizeof(*host));
+
+	host->name = BCMSTB_SDHCI_NAME;
+	host->ioaddr = (void *)regbase;
+	host->quirks = 0;
+
+	host->cfg.part_type = PART_TYPE_DOS;
+
+	host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
+
+	return add_sdhci(host,
+			 BCMSTB_SDHCI_MAXIMUM_CLOCK_FREQUENCY,
+			 BCMSTB_SDHCI_MINIMUM_CLOCK_FREQUENCY);
+}
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 1c1e33b523..5f6956deba 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -73,6 +73,13 @@ config BCM63XX_SPI
 	  access the SPI NOR flash on platforms embedding these Broadcom
 	  SPI cores.
 
+config BCMSTB_SPI
+	bool "BCMSTB SPI driver"
+	help
+	  Enable the Broadcom set-top box SPI driver. This driver can
+	  be used to access the SPI flash on platforms embedding this
+	  Broadcom SPI core.
+
 config CADENCE_QSPI
 	bool "Cadence QSPI driver"
 	help
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 955b38a4df..1c8ae20fee 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -22,6 +22,7 @@ obj-$(CONFIG_ATH79_SPI) += ath79_spi.o
 obj-$(CONFIG_ATMEL_SPI) += atmel_spi.o
 obj-$(CONFIG_BCM63XX_HSSPI) += bcm63xx_hsspi.o
 obj-$(CONFIG_BCM63XX_SPI) += bcm63xx_spi.o
+obj-$(CONFIG_BCMSTB_SPI) += bcmstb_spi.o
 obj-$(CONFIG_CADENCE_QSPI) += cadence_qspi.o cadence_qspi_apb.o
 obj-$(CONFIG_CF_SPI) += cf_spi.o
 obj-$(CONFIG_DAVINCI_SPI) += davinci_spi.o
diff --git a/drivers/spi/bcmstb_spi.c b/drivers/spi/bcmstb_spi.c
new file mode 100644
index 0000000000..fb1dc46b70
--- /dev/null
+++ b/drivers/spi/bcmstb_spi.c
@@ -0,0 +1,439 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2018  Cisco Systems, Inc.
+ *
+ * Author: Thomas Fitzsimmons <fitzsim@fitzsim.org>
+ */
+
+#include <asm/io.h>
+#include <command.h>
+#include <config.h>
+#include <dm.h>
+#include <errno.h>
+#include <fdtdec.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
+#include <log.h>
+#include <malloc.h>
+#include <spi.h>
+#include <time.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define SPBR_MIN		8
+#define BITS_PER_WORD		8
+
+#define NUM_TXRAM		32
+#define NUM_RXRAM		32
+#define NUM_CDRAM		16
+
+/* hif_mspi register structure. */
+struct bcmstb_hif_mspi_regs {
+	u32 spcr0_lsb;		/* 0x000 */
+	u32 spcr0_msb;		/* 0x004 */
+	u32 spcr1_lsb;		/* 0x008 */
+	u32 spcr1_msb;		/* 0x00c */
+	u32 newqp;		/* 0x010 */
+	u32 endqp;		/* 0x014 */
+	u32 spcr2;		/* 0x018 */
+	u32 reserved0;		/* 0x01c */
+	u32 mspi_status;	/* 0x020 */
+	u32 cptqp;		/* 0x024 */
+	u32 spcr3;		/* 0x028 */
+	u32 revision;		/* 0x02c */
+	u32 reserved1[4];	/* 0x030 */
+	u32 txram[NUM_TXRAM];	/* 0x040 */
+	u32 rxram[NUM_RXRAM];	/* 0x0c0 */
+	u32 cdram[NUM_CDRAM];	/* 0x140 */
+	u32 write_lock;		/* 0x180 */
+};
+
+/* hif_mspi masks. */
+#define HIF_MSPI_SPCR2_CONT_AFTER_CMD_MASK	0x00000080
+#define HIF_MSPI_SPCR2_SPE_MASK			0x00000040
+#define HIF_MSPI_SPCR2_SPIFIE_MASK		0x00000020
+#define HIF_MSPI_WRITE_LOCK_WRITE_LOCK_MASK	0x00000001
+
+/* bspi offsets. */
+#define BSPI_MAST_N_BOOT_CTRL			0x008
+
+/* bspi_raf is not used in this driver. */
+
+/* hif_spi_intr2 offsets and masks. */
+#define HIF_SPI_INTR2_CPU_CLEAR			0x08
+#define HIF_SPI_INTR2_CPU_MASK_SET		0x10
+#define HIF_SPI_INTR2_CPU_MASK_CLEAR		0x14
+#define HIF_SPI_INTR2_CPU_SET_MSPI_DONE_MASK	0x00000020
+
+/* SPI transfer timeout in milliseconds. */
+#define HIF_MSPI_WAIT				10
+
+enum bcmstb_base_type {
+	HIF_MSPI,
+	BSPI,
+	HIF_SPI_INTR2,
+	CS_REG,
+	BASE_LAST,
+};
+
+struct bcmstb_spi_platdata {
+	void *base[4];
+};
+
+struct bcmstb_spi_priv {
+	struct bcmstb_hif_mspi_regs *regs;
+	void *bspi;
+	void *hif_spi_intr2;
+	void *cs_reg;
+	int default_cs;
+	int curr_cs;
+	uint tx_slot;
+	uint rx_slot;
+	u8 saved_cmd[NUM_CDRAM];
+	uint saved_cmd_len;
+	void *saved_din_addr;
+};
+
+static int bcmstb_spi_ofdata_to_platdata(struct udevice *bus)
+{
+	struct bcmstb_spi_platdata *plat = dev_get_platdata(bus);
+	const void *fdt = gd->fdt_blob;
+	int node = dev_of_offset(bus);
+	int ret = 0;
+	int i = 0;
+	struct fdt_resource resource = { 0 };
+	char *names[BASE_LAST] = { "hif_mspi", "bspi", "hif_spi_intr2",
+				   "cs_reg" };
+	const phys_addr_t defaults[BASE_LAST] = { BCMSTB_HIF_MSPI_BASE,
+						  BCMSTB_BSPI_BASE,
+						  BCMSTB_HIF_SPI_INTR2,
+						  BCMSTB_CS_REG };
+
+	for (i = 0; i < BASE_LAST; i++) {
+		plat->base[i] = (void *)defaults[i];
+
+		ret = fdt_get_named_resource(fdt, node, "reg", "reg-names",
+					     names[i], &resource);
+		if (ret) {
+			printf("%s: Assuming BCMSTB SPI %s address 0x0x%p\n",
+			       __func__, names[i], (void *)defaults[i]);
+		} else {
+			plat->base[i] = (void *)resource.start;
+			debug("BCMSTB SPI %s address: 0x0x%p\n",
+			      names[i], (void *)plat->base[i]);
+		}
+	}
+
+	return 0;
+}
+
+static void bcmstb_spi_hw_set_parms(struct bcmstb_spi_priv *priv)
+{
+	writel(SPBR_MIN, &priv->regs->spcr0_lsb);
+	writel(BITS_PER_WORD << 2 | SPI_MODE_3, &priv->regs->spcr0_msb);
+}
+
+static void bcmstb_spi_enable_interrupt(void *base, u32 mask)
+{
+	void *reg = base + HIF_SPI_INTR2_CPU_MASK_CLEAR;
+
+	writel(readl(reg) | mask, reg);
+	readl(reg);
+}
+
+static void bcmstb_spi_disable_interrupt(void *base, u32 mask)
+{
+	void *reg = base + HIF_SPI_INTR2_CPU_MASK_SET;
+
+	writel(readl(reg) | mask, reg);
+	readl(reg);
+}
+
+static void bcmstb_spi_clear_interrupt(void *base, u32 mask)
+{
+	void *reg = base + HIF_SPI_INTR2_CPU_CLEAR;
+
+	writel(readl(reg) | mask, reg);
+	readl(reg);
+}
+
+static int bcmstb_spi_probe(struct udevice *bus)
+{
+	struct bcmstb_spi_platdata *plat = dev_get_platdata(bus);
+	struct bcmstb_spi_priv *priv = dev_get_priv(bus);
+
+	priv->regs = plat->base[HIF_MSPI];
+	priv->bspi = plat->base[BSPI];
+	priv->hif_spi_intr2 = plat->base[HIF_SPI_INTR2];
+	priv->cs_reg = plat->base[CS_REG];
+	priv->default_cs = 0;
+	priv->curr_cs = -1;
+	priv->tx_slot = 0;
+	priv->rx_slot = 0;
+	memset(priv->saved_cmd, 0, NUM_CDRAM);
+	priv->saved_cmd_len = 0;
+	priv->saved_din_addr = NULL;
+
+	debug("spi_xfer: tx regs: 0x%p\n", &priv->regs->txram[0]);
+	debug("spi_xfer: rx regs: 0x%p\n", &priv->regs->rxram[0]);
+
+	/* Disable BSPI. */
+	writel(1, priv->bspi + BSPI_MAST_N_BOOT_CTRL);
+	readl(priv->bspi + BSPI_MAST_N_BOOT_CTRL);
+
+	/* Set up interrupts. */
+	bcmstb_spi_disable_interrupt(priv->hif_spi_intr2, 0xffffffff);
+	bcmstb_spi_clear_interrupt(priv->hif_spi_intr2, 0xffffffff);
+	bcmstb_spi_enable_interrupt(priv->hif_spi_intr2,
+				    HIF_SPI_INTR2_CPU_SET_MSPI_DONE_MASK);
+
+	/* Set up control registers. */
+	writel(0, &priv->regs->spcr1_lsb);
+	writel(0, &priv->regs->spcr1_msb);
+	writel(0, &priv->regs->newqp);
+	writel(0, &priv->regs->endqp);
+	writel(HIF_MSPI_SPCR2_SPIFIE_MASK, &priv->regs->spcr2);
+	writel(0, &priv->regs->spcr3);
+
+	bcmstb_spi_hw_set_parms(priv);
+
+	return 0;
+}
+
+static void bcmstb_spi_submit(struct bcmstb_spi_priv *priv, bool done)
+{
+	debug("WR NEWQP: %d\n", 0);
+	writel(0, &priv->regs->newqp);
+
+	debug("WR ENDQP: %d\n", priv->tx_slot - 1);
+	writel(priv->tx_slot - 1, &priv->regs->endqp);
+
+	if (done) {
+		debug("WR CDRAM[%d]: %02x\n", priv->tx_slot - 1,
+		      readl(&priv->regs->cdram[priv->tx_slot - 1]) & ~0x80);
+		writel(readl(&priv->regs->cdram[priv->tx_slot - 1]) & ~0x80,
+		       &priv->regs->cdram[priv->tx_slot - 1]);
+	}
+
+	/* Force chip select first time. */
+	if (priv->curr_cs != priv->default_cs) {
+		debug("spi_xfer: switching chip select to %d\n",
+		      priv->default_cs);
+		writel((readl(priv->cs_reg) & ~0xff) | (1 << priv->default_cs),
+		       priv->cs_reg);
+		readl(priv->cs_reg);
+		udelay(10);
+		priv->curr_cs = priv->default_cs;
+	}
+
+	debug("WR WRITE_LOCK: %02x\n", 1);
+	writel((readl(&priv->regs->write_lock) &
+		~HIF_MSPI_WRITE_LOCK_WRITE_LOCK_MASK) | 1,
+	       &priv->regs->write_lock);
+	readl(&priv->regs->write_lock);
+
+	debug("WR SPCR2: %02x\n",
+	      HIF_MSPI_SPCR2_SPIFIE_MASK |
+	      HIF_MSPI_SPCR2_SPE_MASK |
+	      HIF_MSPI_SPCR2_CONT_AFTER_CMD_MASK);
+	writel(HIF_MSPI_SPCR2_SPIFIE_MASK |
+	       HIF_MSPI_SPCR2_SPE_MASK |
+	       HIF_MSPI_SPCR2_CONT_AFTER_CMD_MASK,
+	       &priv->regs->spcr2);
+}
+
+static int bcmstb_spi_wait(struct bcmstb_spi_priv *priv)
+{
+	u32 start_time = get_timer(0);
+	u32 status = readl(&priv->regs->mspi_status);
+
+	while (!(status & 1)) {
+		if (get_timer(start_time) > HIF_MSPI_WAIT)
+			return -ETIMEDOUT;
+		status = readl(&priv->regs->mspi_status);
+	}
+
+	writel(readl(&priv->regs->mspi_status) & ~1, &priv->regs->mspi_status);
+	bcmstb_spi_clear_interrupt(priv->hif_spi_intr2,
+				   HIF_SPI_INTR2_CPU_SET_MSPI_DONE_MASK);
+
+	return 0;
+}
+
+static int bcmstb_spi_xfer(struct udevice *dev, unsigned int bitlen,
+			   const void *dout, void *din, unsigned long flags)
+{
+	uint len = bitlen / 8;
+	uint tx_len = len;
+	uint rx_len = len;
+	const u8 *out_bytes = (u8 *)dout;
+	u8 *in_bytes = (u8 *)din;
+	struct udevice *bus = dev_get_parent(dev);
+	struct bcmstb_spi_priv *priv = dev_get_priv(bus);
+	struct bcmstb_hif_mspi_regs *regs = priv->regs;
+
+	debug("spi_xfer: %d, t: 0x%p, r: 0x%p, f: %lx\n",
+	      len, dout, din, flags);
+	debug("spi_xfer: chip select: %x\n", readl(priv->cs_reg) & 0xff);
+	debug("spi_xfer: tx addr: 0x%p\n", &regs->txram[0]);
+	debug("spi_xfer: rx addr: 0x%p\n", &regs->rxram[0]);
+	debug("spi_xfer: cd addr: 0x%p\n", &regs->cdram[0]);
+
+	if (flags & SPI_XFER_END) {
+		debug("spi_xfer: clearing saved din address: 0x%p\n",
+		      priv->saved_din_addr);
+		priv->saved_din_addr = NULL;
+		priv->saved_cmd_len = 0;
+		memset(priv->saved_cmd, 0, NUM_CDRAM);
+	}
+
+	if (bitlen == 0)
+		return 0;
+
+	if (bitlen % 8) {
+		printf("%s: Non-byte-aligned transfer\n", __func__);
+		return -EOPNOTSUPP;
+	}
+
+	if (flags & ~(SPI_XFER_BEGIN | SPI_XFER_END)) {
+		printf("%s: Unsupported flags: %lx\n", __func__, flags);
+		return -EOPNOTSUPP;
+	}
+
+	if (flags & SPI_XFER_BEGIN) {
+		priv->tx_slot = 0;
+		priv->rx_slot = 0;
+
+		if (out_bytes && len > NUM_CDRAM) {
+			printf("%s: Unable to save transfer\n", __func__);
+			return -EOPNOTSUPP;
+		}
+
+		if (out_bytes && !(flags & SPI_XFER_END)) {
+			/*
+			 * This is the start of a transmit operation
+			 * that will need repeating if the calling
+			 * code polls for the result.  Save it for
+			 * subsequent transmission.
+			 */
+			debug("spi_xfer: saving command: %x, %d\n",
+			      out_bytes[0], len);
+			priv->saved_cmd_len = len;
+			memcpy(priv->saved_cmd, out_bytes, priv->saved_cmd_len);
+		}
+	}
+
+	if (!(flags & (SPI_XFER_BEGIN | SPI_XFER_END))) {
+		if (priv->saved_din_addr == din) {
+			/*
+			 * The caller is polling for status.  Repeat
+			 * the last transmission.
+			 */
+			int ret = 0;
+
+			debug("spi_xfer: Making recursive call\n");
+			ret = bcmstb_spi_xfer(dev, priv->saved_cmd_len * 8,
+					      priv->saved_cmd, NULL,
+					      SPI_XFER_BEGIN);
+			if (ret) {
+				printf("%s: Recursive call failed\n", __func__);
+				return ret;
+			}
+		} else {
+			debug("spi_xfer: saving din address: 0x%p\n", din);
+			priv->saved_din_addr = din;
+		}
+	}
+
+	while (rx_len > 0) {
+		priv->rx_slot = priv->tx_slot;
+
+		while (priv->tx_slot < NUM_CDRAM && tx_len > 0) {
+			bcmstb_spi_hw_set_parms(priv);
+			debug("WR TXRAM[%d]: %02x\n", priv->tx_slot,
+			      out_bytes ? out_bytes[len - tx_len] : 0xff);
+			writel(out_bytes ? out_bytes[len - tx_len] : 0xff,
+			       &regs->txram[priv->tx_slot << 1]);
+			debug("WR CDRAM[%d]: %02x\n", priv->tx_slot, 0x8e);
+			writel(0x8e, &regs->cdram[priv->tx_slot]);
+			priv->tx_slot++;
+			tx_len--;
+			if (!in_bytes)
+				rx_len--;
+		}
+
+		debug("spi_xfer: early return clauses: %d, %d, %d\n",
+		      len <= NUM_CDRAM,
+		      !in_bytes,
+		      (flags & (SPI_XFER_BEGIN |
+				SPI_XFER_END)) == SPI_XFER_BEGIN);
+		if (len <= NUM_CDRAM &&
+		    !in_bytes &&
+		    (flags & (SPI_XFER_BEGIN | SPI_XFER_END)) == SPI_XFER_BEGIN)
+			return 0;
+
+		bcmstb_spi_submit(priv, tx_len == 0);
+
+		if (bcmstb_spi_wait(priv) == -ETIMEDOUT) {
+			printf("%s: Timed out\n", __func__);
+			return -ETIMEDOUT;
+		}
+
+		priv->tx_slot %= NUM_CDRAM;
+
+		if (in_bytes) {
+			while (priv->rx_slot < NUM_CDRAM && rx_len > 0) {
+				in_bytes[len - rx_len] =
+					readl(&regs->rxram[(priv->rx_slot << 1)
+							   + 1])
+					& 0xff;
+				debug("RD RXRAM[%d]: %02x\n",
+				      priv->rx_slot, in_bytes[len - rx_len]);
+				priv->rx_slot++;
+				rx_len--;
+			}
+		}
+	}
+
+	if (flags & SPI_XFER_END) {
+		debug("WR WRITE_LOCK: %02x\n", 0);
+		writel((readl(&priv->regs->write_lock) &
+			~HIF_MSPI_WRITE_LOCK_WRITE_LOCK_MASK) | 0,
+		       &priv->regs->write_lock);
+		readl(&priv->regs->write_lock);
+	}
+
+	return 0;
+}
+
+static int bcmstb_spi_set_speed(struct udevice *dev, uint speed)
+{
+	return 0;
+}
+
+static int bcmstb_spi_set_mode(struct udevice *dev, uint mode)
+{
+	return 0;
+}
+
+static const struct dm_spi_ops bcmstb_spi_ops = {
+	.xfer		= bcmstb_spi_xfer,
+	.set_speed	= bcmstb_spi_set_speed,
+	.set_mode	= bcmstb_spi_set_mode,
+};
+
+static const struct udevice_id bcmstb_spi_id[] = {
+	{ .compatible = "brcm,spi-brcmstb" },
+	{ }
+};
+
+U_BOOT_DRIVER(bcmstb_spi) = {
+	.name				= "bcmstb_spi",
+	.id				= UCLASS_SPI,
+	.of_match			= bcmstb_spi_id,
+	.ops				= &bcmstb_spi_ops,
+	.ofdata_to_platdata		= bcmstb_spi_ofdata_to_platdata,
+	.probe				= bcmstb_spi_probe,
+	.platdata_auto_alloc_size	= sizeof(struct bcmstb_spi_platdata),
+	.priv_auto_alloc_size		= sizeof(struct bcmstb_spi_priv),
+};
diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c
index 09402efed2..1b51dba4ce 100644
--- a/drivers/spi/spi-uclass.c
+++ b/drivers/spi/spi-uclass.c
@@ -274,7 +274,7 @@ int spi_get_bus_and_cs(int busnum, int cs, int speed, int mode,
 	bool created = false;
 	int ret;
 
-#if CONFIG_IS_ENABLED(OF_PLATDATA)
+#if CONFIG_IS_ENABLED(OF_PLATDATA) || CONFIG_IS_ENABLED(OF_PRIOR_STAGE)
 	ret = uclass_first_device_err(UCLASS_SPI, &bus);
 #else
 	ret = uclass_get_device_by_seq(UCLASS_SPI, busnum, &bus);
diff --git a/dts/Kconfig b/dts/Kconfig
index 16f281ae45..f1c1d9a15e 100644
--- a/dts/Kconfig
+++ b/dts/Kconfig
@@ -111,6 +111,13 @@ config OF_HOSTFILE
 	  This is only useful for Sandbox.  Use the -d flag to U-Boot to
 	  specify the file to read.
 
+config OF_PRIOR_STAGE
+	bool "Prior stage bootloader DTB for DT control"
+	help
+	  If this option is enabled, the device tree used for DT
+	  control will be read from a device tree binary, at a memory
+	  location passed to U-Boot by the prior stage bootloader.
+
 endchoice
 
 config DEFAULT_DEVICE_TREE
diff --git a/include/configs/bcm7445.h b/include/configs/bcm7445.h
new file mode 100644
index 0000000000..f7200357eb
--- /dev/null
+++ b/include/configs/bcm7445.h
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2018  Cisco Systems, Inc.
+ *
+ * Author: Thomas Fitzsimmons <fitzsim@fitzsim.org>
+ *
+ * Configuration settings for the Broadcom BCM7445 SoC family.
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include "bcmstb.h"
+
+#define CONFIG_SYS_NS16550_COM3	0xf040ab00
+
+#define BCMSTB_SDHCI_BASE	0xf03e0200
+#define BCMSTB_TIMER_LOW	0xf0412008
+#define BCMSTB_TIMER_HIGH	0xf041200c
+#define BCMSTB_TIMER_FREQUENCY	0xf0412020
+#define BCMSTB_HIF_MSPI_BASE	0xf03e3400
+#define BCMSTB_BSPI_BASE	0xf03e3200
+#define BCMSTB_HIF_SPI_INTR2	0xf03e1a00
+#define BCMSTB_CS_REG		0xf03e0920
+
+#endif	/* __CONFIG_H */
diff --git a/include/configs/bcmstb.h b/include/configs/bcmstb.h
new file mode 100644
index 0000000000..8c6178042e
--- /dev/null
+++ b/include/configs/bcmstb.h
@@ -0,0 +1,183 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2018  Cisco Systems, Inc.
+ *
+ * Author: Thomas Fitzsimmons <fitzsim@fitzsim.org>
+ *
+ * Configuration settings for the Broadcom BCMSTB SoC family.
+ */
+
+#ifndef __BCMSTB_H
+#define __BCMSTB_H
+
+#include "version.h"
+#include <linux/sizes.h>
+#include <asm/arch/prior_stage.h>
+
+/*
+ * Generic board configuration.
+ */
+#define CONFIG_SYS_GENERIC_BOARD
+
+/*
+ * CPU configuration.
+ */
+#define CONFIG_SKIP_LOWLEVEL_INIT
+
+/*
+ * Memory configuration.
+ *
+ * The prior stage BOLT bootloader sets up memory for us.
+ *
+ * An example boot memory layout after loading everything is:
+ *
+ *	 0x0000 8000	vmlinux.bin.gz
+ *	       :	[~31 MiB uncompressed max]
+ *	 0x01ef f000	FIT containing signed public key
+ *	       :	[~2 KiB in size]
+ *	 0x01f0 0000	DTB copied from prior-stage-provided region
+ *	       :	[~1 MiB max]
+ *	 0x0200 0000	FIT containing ramdisk and device tree
+ *             :	  initramfs.cpio.gz
+ *	       :	  [~208 MiB uncompressed max, to CMA/bmem low address]
+ *	       :	  [~80 MiB compressed max, to PSB low address]
+ *             :	  device tree binary
+ *             :	  [~60 KiB]
+ *	 0x0700 0000	Prior stage bootloader (PSB)
+ *	       :
+ *	 0x0761 7000	Prior-stage-provided device tree binary (DTB)
+ *	       :	[~40 KiB in size]
+ *	 0x0f00 0000	Contiguous memory allocator (CMA/bmem) low address
+ *	       :
+ *	 0x8010 0000	U-Boot code at ELF load address
+ *	       :	[~500 KiB in size, stripped]
+ *	 0xc000 0000	Top of RAM
+ *
+ * Setting gd->relocaddr to CONFIG_SYS_TEXT_BASE in dram_init_banksize
+ * prevents U-Boot from relocating itself when it is run as an ELF
+ * program by the prior stage bootloader.
+ *
+ * We want to keep the ramdisk and FDT in the FIT image in-place, to
+ * accommodate stblinux's bmem and CMA regions.  To accomplish this,
+ * we set initrd_high and fdt_high to 0xffffffff, and the load and
+ * entry addresses of the FIT ramdisk entry to 0x0.
+ *
+ * Overwriting the prior stage bootloader causes memory instability,
+ * so the compressed initramfs needs to fit between the load address
+ * and the PSB low address.  In BOLT's default configuration this
+ * limits the compressed size of the initramfs to approximately 80
+ * MiB.  However, BOLT can be configured to allow loading larger
+ * initramfs images, in which case this limitation is eliminated.
+ */
+#define CONFIG_NR_DRAM_BANKS		3
+
+#define CONFIG_SYS_SDRAM_BASE		0x00000000
+#define CONFIG_SYS_TEXT_BASE		0x80100000
+#define CONFIG_SYS_INIT_RAM_ADDR	0x80200000
+#define CONFIG_SYS_INIT_RAM_SIZE	0x100000
+#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR +	\
+					 CONFIG_SYS_INIT_RAM_SIZE -	\
+					 GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_MALLOC_LEN		((10 * 1024) << 10) /* 10 MiB */
+#define CONFIG_SYS_LOAD_ADDR		0x2000000
+
+/*
+ * CONFIG_SYS_LOAD_ADDR - 1 MiB.
+ */
+#define CONFIG_SYS_FDT_SAVE_ADDRESS	0x1f00000
+#define CONFIG_SYS_CBSIZE		512
+#define CONFIG_SYS_MAXARGS		32
+
+/*
+ * Large kernel image bootm configuration.
+ */
+#define CONFIG_SYS_BOOTM_LEN		SZ_64M
+
+/*
+ * NS16550 configuration.
+ */
+#define V_NS16550_CLK			81000000
+
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	(-4)
+#define CONFIG_SYS_NS16550_CLK		V_NS16550_CLK
+
+/*
+ * Serial console configuration.
+ */
+#define CONFIG_SERIAL3			3
+
+#define CONFIG_BAUDRATE			115200
+#define CONFIG_SYS_BAUDRATE_TABLE	{4800, 9600, 19200, 38400, 57600, \
+					 115200}
+
+/*
+ * Informational display configuration.
+ */
+#define CONFIG_REVISION_TAG
+
+/*
+ * Command configuration.
+ */
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_SF
+#define CONFIG_CMD_SPI
+#define CONFIG_CMD_SF_TEST
+#define CONFIG_CMD_MMC
+
+/*
+ * Flash configuration.
+ */
+#define CONFIG_ST_SMI
+#define CONFIG_SPI_FLASH_STMICRO
+#define CONFIG_SPI_FLASH_MACRONIX
+
+/*
+ * Filesystem configuration.
+ */
+#define CONFIG_DOS_PARTITION
+#define CONFIG_CMD_EXT4
+#define CONFIG_FS_EXT4
+#define CONFIG_CMD_FS_GENERIC
+
+/*
+ * Environment configuration.
+ */
+#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
+
+#define CONFIG_ENV_IS_IN_SPI_FLASH      1
+#define CONFIG_ENV_OFFSET		0x1e0000
+#define CONFIG_ENV_SIZE			(64 << 10) /* 64 KiB */
+#define CONFIG_ENV_SECT_SIZE		CONFIG_ENV_SIZE
+#define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
+#define CONFIG_ENV_OVERWRITE
+
+/*
+ * Save the prior stage provided DTB.
+ */
+#define CONFIG_PREBOOT					\
+	"fdt addr ${fdtcontroladdr};"			\
+	"fdt move ${fdtcontroladdr} ${fdtsaveaddr};"	\
+	"fdt addr ${fdtsaveaddr};"
+/*
+ * Enable in-place RFS with this initrd_high setting.
+ */
+#define CONFIG_EXTRA_ENV_SETTINGS					\
+	"fdtsaveaddr=" __stringify(CONFIG_SYS_FDT_SAVE_ADDRESS) "\0"	\
+	"initrd_high=0xffffffff\0"					\
+	"fdt_high=0xffffffff\0"
+
+/*
+ * Set fdtaddr to prior stage-provided DTB in board_late_init, when
+ * writeable environment is available.
+ */
+#define CONFIG_BOARD_LATE_INIT
+
+#define CONFIG_SYS_MAX_FLASH_BANKS 1
+
+#define CONFIG_DM_SPI 1
+
+#endif /* __BCMSTB_H */
diff --git a/include/fdtdec.h b/include/fdtdec.h
index bb3643690e..46dfcb2053 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -47,6 +47,10 @@ struct fdt_memory {
 #define SPL_BUILD	0
 #endif
 
+#if CONFIG_IS_ENABLED(OF_PRIOR_STAGE)
+extern phys_addr_t prior_stage_fdt_address;
+#endif
+
 /*
  * Information about a resource. start is the first address of the resource
  * and end is the last address (inclusive). The length of the resource will
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index c7501faa0d..8bd3d1ad37 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -1303,8 +1303,12 @@ int fdtdec_setup(void)
 # endif
 # ifndef CONFIG_SPL_BUILD
 	/* Allow the early environment to override the fdt address */
+#  if CONFIG_IS_ENABLED(OF_PRIOR_STAGE)
+	gd->fdt_blob = (void *)prior_stage_fdt_address;
+#  else
 	gd->fdt_blob = (void *)env_get_ulong("fdtcontroladdr", 16,
 						(uintptr_t)gd->fdt_blob);
+#  endif
 # endif
 
 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)

commit 6e5644e1d8417c2bd7cff37fbf33efdc002b4adc
Author: zhijun.xie <xzj@rock-chips.com>
Date:   Wed Jul 21 14:45:56 2021 +0800

    configs：Add rk3568-ramboot.config
    
    if use bl32 in rkbin/RKTRUST/RK3568TRUST.ini,should open config CONFIG_OPTEE_CLIENT=y in rk3568-ramboot.config
    ./make.sh rk3568-ramboot --sz-uboot 2048 1 --sz-trust 1024 1
    or if not use bl32 in rkbin/RKTRUST/RK3568TRUST.ini, use default rk3568-ramboot.config
    ./make.sh rk3568-ramboot --sz-uboot 2048 1 --sz-trust 512 1
    
    Change-Id: I9b03d861da0598ee66fb98bccef5a0b2f8835f62
    Signed-off-by: zhijun.xie <xzj@rock-chips.com>

diff --git a/configs/rk3568-ramboot.config b/configs/rk3568-ramboot.config
new file mode 100644
index 0000000000..3354f5c870
--- /dev/null
+++ b/configs/rk3568-ramboot.config
@@ -0,0 +1,4 @@
+CONFIG_BASE_DEFCONFIG="rk3568_defconfig"
+# CONFIG_ROCKCHIP_FIT_IMAGE_PACK is not set
+# CONFIG_OPTEE_CLIENT is not set
+CONFIG_LOADER_INI="RK3568MINIALL_RAMBOOT.ini"

commit 4b78aa7d5ad096370f97023d66ef1220d72c8dbd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Oct 16 18:47:19 2020 +0800

    configs: Add rk3399-spl-fit.config
    
    Output the SPL to be able to load FIT uboot.img.
    
    Change-Id: Ice63d3d0e5793a10df823d44ccbe4700826f3dbd
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3399-spl-fit.config b/configs/rk3399-spl-fit.config
new file mode 100644
index 0000000000..9567b5e78e
--- /dev/null
+++ b/configs/rk3399-spl-fit.config
@@ -0,0 +1,35 @@
+CONFIG_BASE_DEFCONFIG="rk3399_defconfig"
+CONFIG_CMD_BOOT_FIT=y
+CONFIG_FIT_HW_CRYPTO=y
+CONFIG_FIT_IMAGE_POST_PROCESS=y
+CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y
+CONFIG_ROCKCHIP_FIT_IMAGE=y
+CONFIG_RSA_C_SIZE=0x100
+CONFIG_RSA_E_SIZE=0x100
+CONFIG_RSA_N_SIZE=0x100
+CONFIG_RSA_SOFTWARE_EXP=y
+CONFIG_RSA=y
+CONFIG_SHA512=y
+CONFIG_SPL_BOARD_INIT=y
+CONFIG_SPL_DM_CRYPTO=y
+CONFIG_SPL_DM_RESET=y
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.sh"
+CONFIG_SPL_FIT_HW_CRYPTO=y
+CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
+CONFIG_SPL_GZIP=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+# CONFIG_SPL_MISC_DECOMPRESS is not set
+CONFIG_SPL_MISC=y
+CONFIG_SPL_RESET_ROCKCHIP=y
+# CONFIG_SPL_ROCKCHIP_CIPHER is not set
+CONFIG_SPL_ROCKCHIP_CRYPTO_V1=y
+# CONFIG_SPL_ROCKCHIP_CRYPTO_V2 is not set
+# CONFIG_SPL_ROCKCHIP_HMAC is not set
+CONFIG_SPL_ROCKCHIP_RSA=y
+# CONFIG_SPL_ROCKCHIP_SECURE_OTP_V1 is not set
+# CONFIG_SPL_ROCKCHIP_SECURE_OTP_V2 is not set
+CONFIG_SPL_RSA=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x80000
+CONFIG_SPL_ZLIB=y
+CONFIG_SYS_MALLOC_F_LEN=0x80000
+# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION is not set

commit 3c74eaaa6c40c28d5145a65e086365ba8ea72edd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 20 20:15:54 2021 +0800

    regulator: fixed: Enable gpio when requested
    
    This patch refers to upstream commit:
    (e88d6979d1 regulator: fix: enable gpio when requested）
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ide388dfc084c43675d8e6b4c7b97fb82f540da2c

diff --git a/drivers/power/regulator/fixed.c b/drivers/power/regulator/fixed.c
index 97b4a98bf0..c35ca2a18e 100644
--- a/drivers/power/regulator/fixed.c
+++ b/drivers/power/regulator/fixed.c
@@ -36,8 +36,9 @@ static int fixed_regulator_ofdata_to_platdata(struct udevice *dev)
 
 	/* Set type to fixed */
 	uc_pdata->type = REGULATOR_TYPE_FIXED;
-
-	if (dev_read_bool(dev, "enable-active-high"))
+	if (!dev_read_bool(dev, "enable-active-high"))
+		flags |= GPIOD_ACTIVE_LOW;
+	if (dev_read_bool(dev, "regulator-boot-on"))
 		flags |= GPIOD_IS_OUT_ACTIVE;
 
 	/* Get fixed regulator optional enable GPIO desc */

commit c3a89cac0f0ae9f45cf45a14b7eb96c6925826ca
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jul 21 15:29:09 2021 +0800

    rockchip: kernel dtb: Avoid data-abort from corrupted DTB
    
    If there is not embedded DTB, and the DTB in boot/recovery.img
    is corrupted, just exit.
    
    Fixes:
           [< 00445a5c >]  strnlen+0xa/0x18
           [< 0043ce21 >]  fdt_get_property_namelen+0x43/0x6e
           [< 0043ce79 >]  fdt_getprop_namelen+0xb/0x12
           [< 0043cec5 >]  fdt_getprop+0x1f/0x22
           [< 00402705 >]  init_kernel_dtb+0xe5/0x3fc
           [< 00401fe7 >]  board_init+0x47/0xb8
           [< 0043d729 >]  initcall_run_list+0x55/0xdc
           [< 0040cf41 >]  board_init_r+0x15/0x1c
           [< 0040cf2d >]  board_init_r+0x1/0x1c
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I9cd00dc1ddcf6ddbd14376d818377417f76af72e

diff --git a/arch/arm/mach-rockchip/kernel_dtb.c b/arch/arm/mach-rockchip/kernel_dtb.c
index fb4625cc4a..a5d26cb96b 100644
--- a/arch/arm/mach-rockchip/kernel_dtb.c
+++ b/arch/arm/mach-rockchip/kernel_dtb.c
@@ -307,6 +307,14 @@ dtb_embed:
 		memcpy((void *)fdt_addr, gd->fdt_blob_kern,
 		       fdt_totalsize(gd->fdt_blob_kern));
 		printf("DTB: %s\n", CONFIG_EMBED_KERNEL_DTB_PATH);
+	} else if (ret == -EBADF) {
+		/*
+		 * If there is not embedded DTB, and the DTB in boot/recovery.img
+		 * is corrupted, just exit.
+		 *
+		 * Avoid data-abort while calling fdt-lib API for a corrupted DTB.
+		 */
+		return ret;
 	}
 
 	if (fdt_check_header((void *)fdt_addr)) {

commit a4fb9a7efd9b2dda8e74a42699dfb7efb3f1be8d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jul 21 15:55:30 2021 +0800

    rockchip: kernel dtb: Get fdt addr for critial memory board
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I3644635c97f428f0d8fad188aaa3ca860cceabb6

diff --git a/arch/arm/mach-rockchip/kernel_dtb.c b/arch/arm/mach-rockchip/kernel_dtb.c
index a838507fa5..fb4625cc4a 100644
--- a/arch/arm/mach-rockchip/kernel_dtb.c
+++ b/arch/arm/mach-rockchip/kernel_dtb.c
@@ -256,11 +256,18 @@ static int dtb_check_ok(void *fdt, void *ufdt)
 
 int init_kernel_dtb(void)
 {
-	ulong fdt_addr;
+	ulong fdt_addr = 0;
 	void *ufdt_blob;
 	int ret = -ENODEV;
 
-	fdt_addr = env_get_ulong("fdt_addr_r", 16, 0);
+	/*
+	 * If memory size <= 128MB, we firstly try to get "fdt_addr1_r".
+	 */
+	if (gd->ram_size <= SZ_128M)
+		fdt_addr = env_get_ulong("fdt_addr1_r", 16, 0);
+
+	if (!fdt_addr)
+		fdt_addr = env_get_ulong("fdt_addr_r", 16, 0);
 	if (!fdt_addr) {
 		printf("No Found FDT Load Address.\n");
 		return -ENODEV;

commit 8bda2262145ddc6964c0bf20faa65bd8f5cc810f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jul 21 15:58:40 2021 +0800

    rockchip: rv1126: Define addr for critial memory board
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I8c316cdbedd555d2b818916be3d56a11fb40f8a3

diff --git a/include/configs/rv1126_common.h b/include/configs/rv1126_common.h
index 6efba7bfbe..e91f2f292b 100644
--- a/include/configs/rv1126_common.h
+++ b/include/configs/rv1126_common.h
@@ -69,6 +69,15 @@
 #define CONFIG_USB_FUNCTION_MASS_STORAGE
 #define CONFIG_ROCKUSB_G_DNL_PID	0x110b
 
+/* memory size <= 128MB,  TEE: 0x3000000 - 0x3200000 */
+#define ENV_MEM_LAYOUT_SETTINGS1	\
+	"scriptaddr1=0x00000000\0"	\
+	"pxefile_addr1_r=0x00100000\0"	\
+	"fdt_addr1_r=0x02f00000\0"	\
+	"kernel_addr1_r=0x02008000\0"	\
+	"ramdisk_addr1_r=0x03200000\0"
+
+/* memory size > 128MB */
 #define ENV_MEM_LAYOUT_SETTINGS		\
 	"scriptaddr=0x00000000\0"	\
 	"pxefile_addr_r=0x00100000\0"	\
@@ -79,6 +88,7 @@
 #include <config_distro_bootcmd.h>
 #define CONFIG_EXTRA_ENV_SETTINGS	\
 	ENV_MEM_LAYOUT_SETTINGS		\
+	ENV_MEM_LAYOUT_SETTINGS1	\
 	"partitions=" PARTS_DEFAULT	\
 	ROCKCHIP_DEVICE_SETTINGS	\
 	RKIMG_DET_BOOTDEV		\

commit f649b885ba79e8376947c81f30163075a8b60e0b
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jul 21 15:39:03 2021 +0800

    lib: rsa-verify: pass the public key to next stage
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I92f2906981ea14aaabda3b1b7b44574cc157e451

diff --git a/lib/rsa/rsa-verify.c b/lib/rsa/rsa-verify.c
index ce4a33ae1c..80e143af2d 100644
--- a/lib/rsa/rsa-verify.c
+++ b/lib/rsa/rsa-verify.c
@@ -15,6 +15,7 @@
 #include <asm/types.h>
 #include <asm/unaligned.h>
 #include <dm.h>
+#include <asm/arch/rk_atags.h>
 #else
 #include "fdt_host.h"
 #include "mkimage.h"
@@ -106,6 +107,21 @@ static int rsa_mod_exp_hw(struct key_prop *prop, const uint8_t *sig,
 #else
 	rsa_convert_big_endian(rsa_key.c, (uint32_t *)prop->factor_np,
 			       key_len, key_len);
+#endif
+#if defined(CONFIG_ROCKCHIP_PRELOADER_ATAGS) && defined(CONFIG_SPL_BUILD)
+	char *rsa_key_data = malloc(3 * key_len);
+	int flag = 0;
+
+	if (rsa_key_data) {
+		memcpy(rsa_key_data, rsa_key.n, key_len);
+		memcpy(rsa_key_data + key_len, rsa_key.e, key_len);
+		memcpy(rsa_key_data + 2 * key_len, rsa_key.c, key_len);
+		if (fit_board_verify_required_sigs())
+			flag = PUBKEY_FUSE_PROGRAMMED;
+
+		if (atags_set_pub_key(rsa_key_data, 3 * key_len, flag))
+			printf("Send public key through atags fail.");
+	}
 #endif
 	for (i = 0; i < sig_len; i++)
 		sig_reverse[sig_len-1-i] = sig[i];

commit ced4f8ff8dc80c6001c7eabdca2059289483c96a
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jul 21 15:35:38 2021 +0800

    rockchip: atags: add function atags_set_pub_key()
    
    It can be used to pass public key through atags.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I1becbb0e3e50ed1f7a0e9233ca5fbc19bff2cb1c

diff --git a/arch/arm/include/asm/arch-rockchip/rk_atags.h b/arch/arm/include/asm/arch-rockchip/rk_atags.h
index 4025960129..df376d47d8 100644
--- a/arch/arm/include/asm/arch-rockchip/rk_atags.h
+++ b/arch/arm/include/asm/arch-rockchip/rk_atags.h
@@ -252,6 +252,17 @@ int get_bootdev_by_spl_bootdevice(int bootdevice);
  * return: 0 success, others fail.
  */
 int atags_set_bootdev_by_spl_bootdevice(int bootdevice);
+
+/*
+ * atags_set_pub_key
+ *
+ * @data: public key data
+ * @len: public key len
+ * @flag: indicate the pulic key hash is burned or not
+ *
+ * return: 0 success, others fail.
+ */
+int atags_set_pub_key(void *data, int len, int flag);
 #endif
 
 /* Print only one tag */
diff --git a/arch/arm/mach-rockchip/rk_atags.c b/arch/arm/mach-rockchip/rk_atags.c
index faa9c1a379..de7d9c2765 100644
--- a/arch/arm/mach-rockchip/rk_atags.c
+++ b/arch/arm/mach-rockchip/rk_atags.c
@@ -364,6 +364,21 @@ int atags_set_bootdev_by_spl_bootdevice(int bootdevice)
 
 	return atags_set_tag(ATAG_BOOTDEV, &boot_dev);
 }
+
+int atags_set_pub_key(void *data, int len, int flag)
+{
+	struct tag_pub_key pub_key;
+
+	if (!data)
+		return -ENOMEM;
+
+	memset(&pub_key, 0, sizeof(struct tag_pub_key));
+	pub_key.len = len;
+	pub_key.flag = flag;
+	memcpy(pub_key.data, data, len);
+
+	return atags_set_tag(ATAG_PUB_KEY, &pub_key);
+}
 #endif
 
 void atags_destroy(void)

commit 5f647be153d2c8106f0abd9550b71b37c66f4a28
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Wed Jul 21 16:36:03 2021 +0800

    rockchip: dts: rv1126-bat-evb: rectify adc key configuration
    
    Change-Id: I4aba07a80eaacfb7e875eac6aa7432733cab0431
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/arch/arm/dts/rv1126-bat-evb.dts b/arch/arm/dts/rv1126-bat-evb.dts
index bf0334a382..baa03c3b9b 100644
--- a/arch/arm/dts/rv1126-bat-evb.dts
+++ b/arch/arm/dts/rv1126-bat-evb.dts
@@ -29,14 +29,7 @@
 			u-boot,dm-spl;
 			linux,code = <KEY_VOLUMEUP>;
 			label = "volume up";
-			press-threshold-microvolt = <0>;
-		};
-
-		menu-key {
-			u-boot,dm-spl;
-			linux,code = <KEY_MENU>;
-			label = "menu";
-			press-threshold-microvolt = <1198828>;
+			press-threshold-microvolt = <60000>;
 		};
 	};
 };

commit 18d1f6bee2927c1d5142ae3ae782fc8d9b1d1852
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jul 21 10:16:41 2021 +0800

    rockchip: rv1126: fix typo
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ia2987d5edc63edd57fc79e3b025d3bf9242d71d4

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126.c b/arch/arm/mach-rockchip/rv1126/rv1126.c
index a333ff98ef..41da91c278 100644
--- a/arch/arm/mach-rockchip/rv1126/rv1126.c
+++ b/arch/arm/mach-rockchip/rv1126/rv1126.c
@@ -435,7 +435,7 @@ void board_debug_uart_init(void)
 #if defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
     (CONFIG_ROCKCHIP_UART_MUX_SEL_M == 0)
 	/* UART3 m0*/
-	rk_clrsetreg(&grf->iofunc_con[2], UART3_IO_SEL_MASK,
+	rk_clrsetreg(&grf->iofunc_con2, UART3_IO_SEL_MASK,
 		     UART3_IO_SEL_M0 << UART3_IO_SEL_SHIFT);
 
 	/* Switch iomux */
@@ -446,7 +446,7 @@ void board_debug_uart_init(void)
 #elif defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
       (CONFIG_ROCKCHIP_UART_MUX_SEL_M == 1)
 	/* UART3 m1*/
-	rk_clrsetreg(&grf->iofunc_con[2], UART3_IO_SEL_MASK,
+	rk_clrsetreg(&grf->iofunc_con2, UART3_IO_SEL_MASK,
 		     UART3_IO_SEL_M1 << UART3_IO_SEL_SHIFT);
 
 	/* Switch iomux */
@@ -456,7 +456,7 @@ void board_debug_uart_init(void)
 		     GPIO1A6_UART3_RX_M1 << GPIO1A6_SHIFT);
 #else
 	/* UART3 m2*/
-	rk_clrsetreg(&grf->iofunc_con[2], UART3_IO_SEL_MASK,
+	rk_clrsetreg(&grf->iofunc_con2, UART3_IO_SEL_MASK,
 		     UART3_IO_SEL_M2 << UART3_IO_SEL_SHIFT);
 
 	/* Switch iomux */
@@ -471,7 +471,7 @@ void board_debug_uart_init(void)
 #if defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
     (CONFIG_ROCKCHIP_UART_MUX_SEL_M == 0)
 	/* UART4 m0*/
-	rk_clrsetreg(&grf->iofunc_con[2], UART4_IO_SEL_MASK,
+	rk_clrsetreg(&grf->iofunc_con2, UART4_IO_SEL_MASK,
 		     UART4_IO_SEL_M0 << UART4_IO_SEL_SHIFT);
 
 	/* Switch iomux */
@@ -482,7 +482,7 @@ void board_debug_uart_init(void)
 #elif defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
       (CONFIG_ROCKCHIP_UART_MUX_SEL_M == 1)
 	/* UART4 m1*/
-	rk_clrsetreg(&grf->iofunc_con[2], UART4_IO_SEL_MASK,
+	rk_clrsetreg(&grf->iofunc_con2, UART4_IO_SEL_MASK,
 		     UART4_IO_SEL_M1 << UART4_IO_SEL_SHIFT);
 
 	/* Switch iomux */
@@ -492,7 +492,7 @@ void board_debug_uart_init(void)
 		     GPIO2A6_UART4_TX_M1 << GPIO2A6_SHIFT);
 #else
 	/* UART4 m2*/
-	rk_clrsetreg(&grf->iofunc_con[2], UART4_IO_SEL_MASK,
+	rk_clrsetreg(&grf->iofunc_con2, UART4_IO_SEL_MASK,
 		     UART4_IO_SEL_M2 << UART4_IO_SEL_SHIFT);
 
 	/* Switch iomux */
@@ -507,7 +507,7 @@ void board_debug_uart_init(void)
 #if defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
     (CONFIG_ROCKCHIP_UART_MUX_SEL_M == 0)
 	/* UART5 m0*/
-	rk_clrsetreg(&grf->iofunc_con[2], UART5_IO_SEL_MASK,
+	rk_clrsetreg(&grf->iofunc_con2, UART5_IO_SEL_MASK,
 		     UART5_IO_SEL_M0 << UART5_IO_SEL_SHIFT);
 
 	/* Switch iomux */
@@ -518,7 +518,7 @@ void board_debug_uart_init(void)
 #elif defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
       (CONFIG_ROCKCHIP_UART_MUX_SEL_M == 1)
 	/* UART5 m1*/
-	rk_clrsetreg(&grf->iofunc_con[2], UART5_IO_SEL_MASK,
+	rk_clrsetreg(&grf->iofunc_con2, UART5_IO_SEL_MASK,
 		     UART5_IO_SEL_M1 << UART5_IO_SEL_SHIFT);
 
 	/* Switch iomux */
@@ -528,7 +528,7 @@ void board_debug_uart_init(void)
 		     GPIO2B0_UART5_TX_M1 << GPIO2B0_SHIFT);
 #else
 	/* UART5 m2*/
-	rk_clrsetreg(&grf->iofunc_con[2], UART5_IO_SEL_MASK,
+	rk_clrsetreg(&grf->iofunc_con2, UART5_IO_SEL_MASK,
 		     UART5_IO_SEL_M2 << UART5_IO_SEL_SHIFT);
 
 	/* Switch iomux */

commit 55cb85f8b85dd3cdca68ffae168a53ba97c9e956
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 29 18:24:23 2021 +0800

    arm: v8: support disable Dcache
    
    Fix compile error.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I6261ccbb89cdfd2e4a81a3ed09fdb4fd71e03ff0

diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c
index e371ce33fb..e9f5244216 100644
--- a/arch/arm/cpu/armv8/cache_v8.c
+++ b/arch/arm/cpu/armv8/cache_v8.c
@@ -649,16 +649,15 @@ void mmu_change_region_attr(phys_addr_t addr, size_t siz, u64 attrs)
 }
 
 #else	/* CONFIG_SYS_DCACHE_OFF */
-
+u64 get_page_table_size(void)
+{
+	return SZ_64K;
+}
 /*
  * For SPL builds, we may want to not have dcache enabled. Any real U-Boot
  * running however really wants to have dcache and the MMU active. Check that
  * everything is sane and give the developer a hint if it isn't.
  */
-#ifndef CONFIG_SPL_BUILD
-#error Please describe your MMU layout in CONFIG_SYS_MEM_MAP and enable dcache.
-#endif
-
 void invalidate_dcache_all(void)
 {
 }

commit b2d5967a0b47ee66b3901081d8f12415e6323539
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 20 16:58:56 2021 +0800

    rockchip: Kconfig: Wrap options by !ROCKCHIP_FIT_IMAGE_PACK
    
    They are useless if we use FIT format uboot.img.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Iadf21f1e7b5ab6f364647337956747c5a57a3c94

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 513e723410..3e59105398 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -851,6 +851,7 @@ config TRUST_INI
 	help
 	  The ini file is used to pack trust image.
 
+if !ROCKCHIP_FIT_IMAGE_PACK
 config UBOOT_SIZE_KB
 	int "Per u-boot.bin Image size, unit: KB"
 	default 1024
@@ -880,6 +881,7 @@ config TRUST_SHA_MODE
 	help
 	  The SHA mode for tools to pack, the mode id can be:
 	  0: none; 1: sha1; 2: sha256 RK big endian; 3: sha256 little endian.
+endif
 
 source "arch/arm/mach-rockchip/px30/Kconfig"
 source "arch/arm/mach-rockchip/rk3036/Kconfig"

commit 803aaca66ead097438d0fc650ea53e9ec082295d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jul 15 10:56:39 2021 +0800

    common: bootm: Enable decompress related message
    
    It's helpful debug message when decompress fail.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ib8b193cb2248e0a1d3e1fb150b425641c2a2c8ef

diff --git a/common/bootm.c b/common/bootm.c
index 9d9436bd01..b7953f1525 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -526,10 +526,10 @@ static int bootm_load_os(bootm_headers_t *images, unsigned long *load_end,
 	no_overlap = (os.comp == IH_COMP_NONE && load == image_start);
 
 	if (!no_overlap && (load < blob_end) && (*load_end > blob_start)) {
-		debug("images.os.start = 0x%lX, images.os.end = 0x%lx\n",
-		      blob_start, blob_end);
-		debug("images.os.load = 0x%lx, load_end = 0x%lx\n", load,
-		      *load_end);
+		printf("images.os.start = 0x%lX, images.os.end = 0x%lx\n",
+		       blob_start, blob_end);
+		printf("images.os.load = 0x%lx, load_end = 0x%lx\n", load,
+		       *load_end);
 
 		/* Check what type of image this is. */
 		if (images->legacy_hdr_valid) {

commit f91ddfd36e179f4c8c705c396ad1f8ea374ef44e
Author: William Wu <william.wu@rock-chips.com>
Date:   Mon Jul 19 17:50:58 2021 +0800

    phy: rockchip: select phy by default for rockchip
    
    Signed-off-by: William Wu <william.wu@rock-chips.com>
    Change-Id: I7942cf529f03be8c9faf375d703c33e7c9edeeac

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 66fede437e..d86a2cafe5 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -61,43 +61,50 @@ config SPL_NOP_PHY
 
 config PHY_ROCKCHIP_INNO_USB2
 	bool "Support Rockchip INNO USB2PHY"
-	depends on PHY && ARCH_ROCKCHIP
+	depends on ARCH_ROCKCHIP
+	select PHY
 	help
 	  Support for Rockchip USB 2.0 PHY with Innosilicon IP block.
 
 config PHY_ROCKCHIP_NANENG_COMBOPHY
 	bool "Support Rockchip NANENG combo PHY Driver"
-	depends on PHY && ARCH_ROCKCHIP
+	depends on ARCH_ROCKCHIP
+	select PHY
 	help
 	  Enable this to support the Rockchip NANENG combo PHY.
 
 config PHY_ROCKCHIP_NANENG_USB2
 	bool "Support Rockchip Naneng USB2PHY"
-	depends on PHY && ARCH_ROCKCHIP
+	depends on ARCH_ROCKCHIP
+	select PHY
 	help
 	  Support for Rockchip USB 2.0 PHY with Naneng IP block.
 
 config PHY_ROCKCHIP_INNO_USB3
 	bool "Support Rockchip INNO USB3PHY"
-	depends on PHY && ARCH_ROCKCHIP
+	depends on ARCH_ROCKCHIP
+	select PHY
 	help
 	  Support for Rockchip USB 3.0 PHY with Innosilicon IP block.
 
 config PHY_ROCKCHIP_NANENG_EDP
 	bool "Support Rockchip Naneng eDP Transmitter PHY"
-	depends on PHY && ARCH_ROCKCHIP
+	depends on ARCH_ROCKCHIP
+	select PHY
 	help
 	  Support for Rockchip eDP Transmitter PHY with Naneng IP block.
 
 config PHY_ROCKCHIP_SNPS_PCIE3
 	bool "Rockchip Snps PCIe3 PHY Driver"
-	depends on PHY && ARCH_ROCKCHIP
+	depends on ARCH_ROCKCHIP
+	select PHY
 	help
 	  Support for Rockchip PCIe3 PHY with Synopsys IP block.
 
 config PHY_ROCKCHIP_TYPEC
 	bool "Support Rockchip TYPEC PHY Driver"
-	depends on PHY && ARCH_ROCKCHIP
+	depends on ARCH_ROCKCHIP
+	select PHY
 	help
 	  Enable this to support the Rockchip USB Type-C PHY.
 

commit 2aea75afbd30fd73ff84df5bbb867baf5dab76f2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 20 10:55:58 2021 +0800

    common: image-sig: Add comment for failure handle
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I648988a43f1057d86d6a705de274aba7165b1011

diff --git a/common/image-sig.c b/common/image-sig.c
index 41eda9acd8..d40fa1c100 100644
--- a/common/image-sig.c
+++ b/common/image-sig.c
@@ -501,6 +501,12 @@ int fit_config_verify_required_sigs(const void *fit, int conf_noffset,
 			printf("Failed to verify required signature '%s'\n",
 			       fit_get_name(sig_blob, noffset, NULL));
 #ifndef USE_HOSTCC
+			/*
+			 * Allow bring up if enable FIT_SIGNATURE but
+			 * not enable the device secure boot.
+			 *
+			 * return value: 1: device secure boot is enabled.
+			 */
 			if (fit_board_verify_required_sigs())
 				return ret;
 #else

commit 7a00e4e5d962e31e7760ae847627a6bc9bcd1ab0
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jul 16 09:41:27 2021 +0800

    rockchip: param: simplify the #if expression
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Iac809c481bffdcde8b04c99502c308d97408633e

diff --git a/arch/arm/mach-rockchip/param.c b/arch/arm/mach-rockchip/param.c
index f006609384..21a45705f0 100644
--- a/arch/arm/mach-rockchip/param.c
+++ b/arch/arm/mach-rockchip/param.c
@@ -14,7 +14,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #define SZ_4GB				0x100000000ULL
 
-#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
+#ifndef CONFIG_SPL_BUILD
 #define SDRAM_OFFSET(offset)		(CONFIG_SYS_SDRAM_BASE + (offset))
 #define PARAM_DRAM_INFO_OFFSET		(SZ_32M)
 #define PARAM_OPTEE_INFO_OFFSET		(SZ_32M + SZ_2M)

commit 7cef79185b7a019281d828de6ba3f6fbcec95d45
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jul 16 09:28:16 2021 +0800

    irq: simplify the #if expression
    
    Use CONFIG_IS_ENABLED() is better.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If4f514cc1dfb9e0f52521954158172bba1eb8f85

diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S
index 2e3b874079..8447fc69d1 100644
--- a/arch/arm/cpu/armv8/start.S
+++ b/arch/arm/cpu/armv8/start.S
@@ -262,7 +262,7 @@ ENDPROC(apply_core_errata)
 WEAK(lowlevel_init)
 	mov	x29, lr			/* Save LR */
 
-#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_IRQ)
+#if CONFIG_IS_ENABLED(IRQ)
 	branch_if_slave x0, 1f
 	ldr	x0, =GICD_BASE
 	bl	gic_init_secure
diff --git a/arch/arm/lib/gic_64.S b/arch/arm/lib/gic_64.S
index 1e80fb93c2..0f0bc88c32 100644
--- a/arch/arm/lib/gic_64.S
+++ b/arch/arm/lib/gic_64.S
@@ -108,7 +108,7 @@ ENTRY(gic_init_secure_percpu)
 	mov	w11, #0x1		/* Enable SGI 0 */
 	str	w11, [x10, GICR_ISENABLERn]
 
-#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_IRQ)
+#if CONFIG_IS_ENABLED(IRQ)
 	/* Rockchip: check elx */
 	switch_el x0, el3_sre, el2_sre, el1_sre
 
diff --git a/arch/arm/lib/interrupts.c b/arch/arm/lib/interrupts.c
index ac47db1ac0..738b1fcefd 100644
--- a/arch/arm/lib/interrupts.c
+++ b/arch/arm/lib/interrupts.c
@@ -28,7 +28,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_IRQ)
+#if !CONFIG_IS_ENABLED(IRQ)
 int interrupt_init (void)
 {
 	/*
@@ -170,7 +170,7 @@ void do_fiq (struct pt_regs *pt_regs)
 	bad_mode ();
 }
 
-#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_IRQ)
+#if !CONFIG_IS_ENABLED(IRQ)
 void do_irq (struct pt_regs *pt_regs)
 {
 	efi_restore_gd();
diff --git a/arch/arm/lib/interrupts_64.c b/arch/arm/lib/interrupts_64.c
index cd3e29c4a5..17271d061f 100644
--- a/arch/arm/lib/interrupts_64.c
+++ b/arch/arm/lib/interrupts_64.c
@@ -13,8 +13,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_IRQ)
-
+#if !CONFIG_IS_ENABLED(IRQ)
 int interrupt_init(void)
 {
 	return 0;
@@ -33,7 +32,7 @@ int disable_interrupts(void)
 
 #define REG_BITS(val, shift, mask)	(((val) >> (shift)) & (mask))
 
-#if (!defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD))
+#ifndef CONFIG_SPL_BUILD
 void show_regs(struct pt_regs *regs)
 {
 	int el = current_el();
@@ -187,7 +186,7 @@ void do_sync(struct pt_regs *pt_regs, unsigned int esr)
 	panic("Resetting CPU ...\n");
 }
 
-#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_IRQ)
+#if !CONFIG_IS_ENABLED(IRQ)
 /*
  * do_irq handles the Irq exception.
  */
diff --git a/arch/arm/lib/stack.c b/arch/arm/lib/stack.c
index 67e01b9865..8aa49d7615 100644
--- a/arch/arm/lib/stack.c
+++ b/arch/arm/lib/stack.c
@@ -25,7 +25,7 @@ int arch_reserve_stacks(void)
 	gd->irq_sp = gd->start_addr_sp;
 
 # if !defined(CONFIG_ARM64)
-#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_IRQ)
+#if CONFIG_IS_ENABLED(IRQ)
 #ifndef CONFIG_IRQ_STACK_SIZE
 #define CONFIG_IRQ_STACK_SIZE	8192
 #endif
diff --git a/arch/arm/lib/vectors.S b/arch/arm/lib/vectors.S
index c6a3c0db87..409be1002f 100644
--- a/arch/arm/lib/vectors.S
+++ b/arch/arm/lib/vectors.S
@@ -147,7 +147,7 @@ IRQ_STACK_START_IN:
 	.word	0x0badc0de
 #endif
 
-#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_IRQ)
+#if CONFIG_IS_ENABLED(IRQ)
 /* IRQ stack memory (calculated at run-time) */
 .globl IRQ_STACK_START
 IRQ_STACK_START:
@@ -289,7 +289,7 @@ not_used:
 
 	.align	5
 irq:
-#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_IRQ)
+#if CONFIG_IS_ENABLED(IRQ)
 	get_irq_stack
 	irq_save_user_regs
 	bl	do_irq
diff --git a/drivers/input/key-uclass.c b/drivers/input/key-uclass.c
index 0de98f53b2..b3c6fc1866 100644
--- a/drivers/input/key-uclass.c
+++ b/drivers/input/key-uclass.c
@@ -162,7 +162,7 @@ try_again:
 	return event;
 }
 
-#if defined(CONFIG_IRQ) && !defined(CONFIG_SPL_BUILD)
+#if CONFIG_IS_ENABLED(IRQ)
 #if defined(CONFIG_PWRKEY_DNL_TRIGGER_NUM) && \
 		(CONFIG_PWRKEY_DNL_TRIGGER_NUM > 0)
 static void power_key_download(struct dm_key_uclass_platdata *uc_key)
@@ -272,7 +272,7 @@ static int key_post_probe(struct udevice *dev)
 					uc_key->adcval - margin : 0;
 	} else {
 		if (uc_key->code == KEY_POWER) {
-#if defined(CONFIG_IRQ) && !defined(CONFIG_SPL_BUILD)
+#if CONFIG_IS_ENABLED(IRQ)
 			int irq;
 
 			if (uc_key->skip_irq_init)
diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index 22b4662f1f..7cf23385ac 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -14,7 +14,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#if defined(CONFIG_IRQ) && !defined(CONFIG_SPL_BUILD)
+#if CONFIG_IS_ENABLED(IRQ)
 /* RK805 */
 static const struct virq_reg rk805_irqs[] = {
 	[RK8XX_IRQ_PWRON_FALL] = {
@@ -359,7 +359,7 @@ static int rk8xx_bind(struct udevice *dev)
 }
 #endif
 
-#if defined(CONFIG_IRQ) && !defined(CONFIG_SPL_BUILD)
+#if CONFIG_IS_ENABLED(IRQ)
 /*
  * When system suspend during U-Boot charge, make sure the plugout event
  * be able to wakeup cpu in wfi/wfe state.
diff --git a/include/common.h b/include/common.h
index c73aaf2654..e09f06508c 100644
--- a/include/common.h
+++ b/include/common.h
@@ -53,7 +53,7 @@ typedef volatile unsigned char	vu_char;
 # define static_assert _Static_assert
 #endif
 
-#ifndef CONFIG_IRQ
+#if !CONFIG_IS_ENABLED(IRQ)
 typedef void (interrupt_handler_t)(void *);
 #else
 typedef void (interrupt_handler_t)(int, void *);

commit 54cbaa17c088316914e003635f261642dca9b5a3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jul 15 20:27:04 2021 +0800

    irq: generic: use common API
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I6ffa9ec4de3406924aa4b9741ac4318deb98c05e

diff --git a/drivers/irq/irq-generic.c b/drivers/irq/irq-generic.c
index c2b2acabda..891963141c 100644
--- a/drivers/irq/irq-generic.c
+++ b/drivers/irq/irq-generic.c
@@ -305,17 +305,6 @@ int irqs_resume(void)
 }
 
 #ifdef CONFIG_ARM64
-static void cpu_local_irq_enable(void)
-{
-	asm volatile("msr daifclr, #0x02");
-}
-
-static int cpu_local_irq_disable(void)
-{
-	asm volatile("msr daifset, #0x02");
-	return 0;
-}
-
 void do_irq(struct pt_regs *pt_regs, unsigned int esr)
 {
 #ifdef CONFIG_ROCKCHIP_DEBUGGER
@@ -326,30 +315,6 @@ void do_irq(struct pt_regs *pt_regs, unsigned int esr)
 	__do_generic_irq_handler();
 }
 #else
-static void cpu_local_irq_enable(void)
-{
-	unsigned long cpsr;
-
-	__asm__ __volatile__("mrs %0, cpsr\n"
-			     "bic %0, %0, #0x80\n"
-			     "msr cpsr_c, %0"
-			     : "=r" (cpsr) : : "memory");
-}
-
-static int cpu_local_irq_disable(void)
-{
-	unsigned long old_cpsr, new_cpsr;
-
-	__asm__ __volatile__("mrs %0, cpsr\n"
-			     "orr %1, %0, #0xc0\n"
-			     "msr cpsr_c, %1"
-			     : "=r" (old_cpsr), "=r" (new_cpsr)
-			     :
-			     : "memory");
-
-	return (old_cpsr & 0x80) == 0;
-}
-
 void do_irq(struct pt_regs *pt_regs)
 {
 #ifdef CONFIG_ROCKCHIP_DEBUGGER
@@ -398,12 +363,15 @@ int interrupt_init(void)
 
 void enable_interrupts(void)
 {
-	cpu_local_irq_enable();
+	local_irq_enable();
 }
 
 int disable_interrupts(void)
 {
-	return cpu_local_irq_disable();
+	int flags;
+
+	local_irq_save(flags);
+	return flags;
 }
 
 static int do_dump_irqs(cmd_tbl_t *cmdtp, int flag,

commit 617c1bec46f2be117e72d165f990f18da26838a9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 12 18:35:10 2021 +0800

    arm: v7/v8: Enable SError/Asynchronous external abort for TPL/SPL/U-Boot
    
    Add this patch to support report SError/Asynchronous external abort
    immediately in current exception level.
    
    === issue scene ===
    When access a illegal address, It results in:
    - read: Synchronous data-abort
    - write: SError(64-bit)/Asynchronous external abort(32-bit)
    
    === 64-bit ===
    EL3 SError ASynchronous exception in TPL/SPL was already
    enabled in start.S and crt0_64.S which sets SCR_EL3.EA=1
    and DAIF.A=0. We can test result of TPL/SPL by access address
    0xfe108000 in rk3568.
    Let's enable SError in U-Boot proper.
    
    === 32-bit ===
    Let's set CPSR.A=0 to enable Asynchronous external abort, we can
    test result by access address 0xfe808000 in rv1126.
    Note: TPL/SPL vectors only provides "b ." for all exception entry.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Id9f660a9275f69fdc8443ad239aabf79682d95d0

diff --git a/arch/arm/cpu/armv7/cpu.c b/arch/arm/cpu/armv7/cpu.c
index 6eac5ef3fe..0cd75c6846 100644
--- a/arch/arm/cpu/armv7/cpu.c
+++ b/arch/arm/cpu/armv7/cpu.c
@@ -35,6 +35,7 @@ int cleanup_before_linux_select(int flags)
 #ifndef CONFIG_SPL_BUILD
 	disable_interrupts();
 #endif
+	disable_async_abort();
 
 	if (flags & CBL_DISABLE_CACHES) {
 		/*
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 8d4d4a577d..c511daf598 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -85,6 +85,11 @@ switch_to_hypervisor_ret:
 	mcr	p15, 0, r0, c12, c0, 0	@Set VBAR
 #endif
 
+	/* Enable Asynchronous external abort after vectors setup */
+	mrs	r0, cpsr
+	bic	r0, r0, #0x100		@ CPSR.A bit
+	msr	cpsr_x,r0
+
 	/* the mask ROM code should have PLL and others stable */
 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
 	bl	cpu_init_cp15
diff --git a/arch/arm/cpu/armv8/cpu.c b/arch/arm/cpu/armv8/cpu.c
index 28a27f724e..20979e8de5 100644
--- a/arch/arm/cpu/armv8/cpu.c
+++ b/arch/arm/cpu/armv8/cpu.c
@@ -41,6 +41,8 @@ int cleanup_before_linux(void)
 	 */
 	disable_interrupts();
 
+	disable_serror();
+
 	/*
 	 * Turn off I-cache and invalidate it
 	 */
diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S
index 57e6d11006..2e3b874079 100644
--- a/arch/arm/cpu/armv8/start.S
+++ b/arch/arm/cpu/armv8/start.S
@@ -277,23 +277,6 @@ WEAK(lowlevel_init)
 #endif
 #endif
 
-#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_IRQ)
-	/*
-	 * Setting HCR_EL2.TGE AMO IMO FMO for exception rounting to EL2
-	 */
-	mrs	x0, CurrentEL		/* check currentEL */
-	cmp	x0, 0x8
-	b.ne	end			/* currentEL != EL2 */
-
-	mrs	x9, hcr_el2
-	orr	x9, x9, #(7 << 3)	/* HCR_EL2.AMO IMO FMO set */
-	orr	x9, x9, #(1 << 27)	/* HCR_EL2.TGE set */
-	msr	hcr_el2, x9
-
-end:
-	nop
-#endif /* CONFIG_IRQ */
-
 #ifdef CONFIG_ARMV8_MULTIENTRY
 	branch_if_master x0, x1, 2f
 
diff --git a/arch/arm/lib/crt0_64.S b/arch/arm/lib/crt0_64.S
index 8f3cacb76c..95a6c7d153 100644
--- a/arch/arm/lib/crt0_64.S
+++ b/arch/arm/lib/crt0_64.S
@@ -84,10 +84,20 @@ ENTRY(_main)
 2:	mrs	x0, sctlr_el2
 	orr	x0, x0, x1
 	msr	sctlr_el2, x0
+
+	mrs	x0, hcr_el2
+	orr	x0, x0, #HCR_EL2_TGE
+	orr	x0, x0, #HCR_EL2_AMO
+#if CONFIG_IS_ENABLED(IRQ)
+	orr	x0, x0, #HCR_EL2_IMO
+#endif
+	msr	hcr_el2, x0
+	msr	daifclr, #4
 	b	0f
 1:	mrs	x0, sctlr_el1
 	orr	x0, x0, x1
 	msr	sctlr_el1, x0
+	msr	daifclr, #4
 0:
 	isb
 
diff --git a/common/spl/spl.c b/common/spl/spl.c
index 07a6d3f1f0..e8cb7b76c9 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -691,6 +691,11 @@ void spl_cleanup_before_jump(struct spl_image_info *spl_image)
 
 	disable_interrupts();
 
+#ifdef CONFIG_ARM64
+	disable_serror();
+#else
+	disable_async_abort();
+#endif
 	/*
 	 * Turn off I-cache and invalidate it
 	 */

commit 3a1a9b814dddc7e73dce113623f72dde032d7bd5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 12 15:47:50 2021 +0800

    arm: system.h: Add more interface to access register
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If59fc466fbc47a75753fde5fce19f40087a7b653

diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index ac42cf80ca..795d82d6fe 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -78,6 +78,10 @@
 #define HCR_EL2_RW_AARCH64	(1 << 31) /* EL1 is AArch64                   */
 #define HCR_EL2_RW_AARCH32	(0 << 31) /* Lower levels are AArch32         */
 #define HCR_EL2_HCD_DIS		(1 << 29) /* Hypervisor Call disabled         */
+#define HCR_EL2_TGE		(1 << 27) /* Trap General Exceptions          */
+#define HCR_EL2_AMO		(1 << 5)  /* Asynchronous External Abort and SError Interrupt routing */
+#define HCR_EL2_IMO		(1 << 4)  /* Physical IRQ Routing */
+#define HCR_EL2_FMO		(1 << 3)  /* Physical FIQ Routing */
 
 /*
  * CPACR_EL1 bits definitions
@@ -175,6 +179,20 @@ static inline unsigned long read_mpidr(void)
 	return val;
 }
 
+static inline unsigned long get_daif(void)
+{
+	unsigned long daif;
+
+	asm volatile("mrs %0, daif" : "=r" (daif));
+
+	return daif;
+}
+
+static inline void disable_serror(void)
+{
+	asm volatile("msr daifset, #0x04");
+}
+
 #define BSP_COREID	0
 
 void __asm_flush_dcache_all(void);
@@ -352,6 +370,20 @@ static inline unsigned long get_cpsr(void)
 	return cpsr;
 }
 
+static inline void set_cpsr(unsigned long cpsr)
+{
+	asm volatile("msr cpsr_fsxc, %[cpsr]" : : [cpsr] "r" (cpsr));
+}
+
+static inline void disable_async_abort(void)
+{
+	unsigned long cpsr;
+
+	cpsr = get_cpsr();
+	cpsr &= ~(1 << 8);
+	set_cpsr(cpsr);
+}
+
 static inline int is_hyp(void)
 {
 #ifdef CONFIG_ARMV7_LPAE

commit b25dd131e097d0df281f1156e4da889c45325e9c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jul 14 09:36:48 2021 +0800

    arm: crt0_64: Enable sctlr A/SA bit for EL3/2/1
    
    Icache is enabled by default for TPL/SPL.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Idf613d816feb4766e1e1ab646cc88a86e6ca0982

diff --git a/arch/arm/lib/crt0_64.S b/arch/arm/lib/crt0_64.S
index b8e3fa7327..8f3cacb76c 100644
--- a/arch/arm/lib/crt0_64.S
+++ b/arch/arm/lib/crt0_64.S
@@ -13,6 +13,7 @@
 #include <config.h>
 #include <asm-offsets.h>
 #include <asm/macro.h>
+#include <asm/system.h>
 #include <linux/linkage.h>
 
 /*
@@ -65,25 +66,31 @@
  */
 
 ENTRY(_main)
-#if defined(CONFIG_SPL_BUILD)
-	.equ SCTLR_A_BIT,		(1 << 1)
-	.equ SCTLR_SA_BIT,		(1 << 3)
-	.equ SCTLR_I_BIT,		(1 << 12)
-
-/*
- * Enable the instruction cache, stack pointer
- * and data access alignment checks
- */
-	mov	x1, #(SCTLR_I_BIT | SCTLR_A_BIT | SCTLR_SA_BIT)
-	mrs	x0, sctlr_el3
+	/*
+	 * Enable instruction cache (if required), stack pointer,
+	 * data access alignment checks and SError.
+	 */
+#ifdef CONFIG_SPL_BUILD
+	mov x1, #(CR_A | CR_SA | CR_I)
+#else
+	mov x1, #(CR_A | CR_SA)
+#endif
+	switch_el x2, 3f, 2f, 1f
+3:	mrs	x0, sctlr_el3
 	orr	x0, x0, x1
 	msr	sctlr_el3, x0
+	msr	daifclr, #4			/* SCR_EL3.EA=1 was already set in start.S */
+	b	0f
+2:	mrs	x0, sctlr_el2
+	orr	x0, x0, x1
+	msr	sctlr_el2, x0
+	b	0f
+1:	mrs	x0, sctlr_el1
+	orr	x0, x0, x1
+	msr	sctlr_el1, x0
+0:
 	isb
-/*
- * Enable External Abort and SError
- */
-	msr	daifclr, #4
-#endif
+
 /*
  * Set up initial C runtime environment and call board_init_f(0).
  */

commit 02fe0f81261e5f39f3be9d965dce628ef5f81ad9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jul 14 11:51:33 2021 +0800

    common: board_r: Add CR state print
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I3dd26c9d74c7f88915b52f767358213e50c0b1fe

diff --git a/common/board_r.c b/common/board_r.c
index b633c358b7..4ecd2d10c5 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -51,6 +51,7 @@
 #include <asm/mmu.h>
 #endif
 #include <asm/sections.h>
+#include <asm/system.h>
 #include <dm/root.h>
 #include <linux/compiler.h>
 #include <linux/err.h>
@@ -112,10 +113,32 @@ static int initr_reloc(void)
  * Some of these functions are needed purely because the functions they
  * call return void. If we change them to return 0, these stubs can go away.
  */
+
+static void print_cr(void)
+{
+	u32 reg;
+
+#ifdef CONFIG_ARM64
+	reg = get_sctlr();	/* get control reg. */
+#else
+	reg = get_cr();
+#endif
+	puts("CR: ");
+	if (reg & CR_M)
+		puts("M/");
+	if (reg & CR_C)
+		puts("C/");
+	if (reg & CR_I)
+		puts("I");
+	putc('\n');
+}
+
 static int initr_caches(void)
 {
 	/* Enable caches */
 	enable_caches();
+	print_cr();
+
 	return 0;
 }
 #endif

commit a2ae18b31c7a03ada99279ff89924f77d2125ba8
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Fri Jul 16 09:57:58 2021 +0800

    rockchip: rk3568: add serial and usbkbd as stdin devices
    
    Adding usbkbd input support for RK3568 SoCs, additional
    configurations to enable usbkbd:
    
    CONFIG_DM_KEYBOARD=y
    CONFIG_USB_KEYBOARD=y
    CONFIG_USB_KEYBOARD_FN_KEYS=y
    
    Change-Id: I64ed99452ce6254cfec5604e671484f4a4101518
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/evb_rk3568.h b/include/configs/evb_rk3568.h
index 4cf4d3e80d..3432ba695e 100644
--- a/include/configs/evb_rk3568.h
+++ b/include/configs/evb_rk3568.h
@@ -13,6 +13,7 @@
 
 #undef ROCKCHIP_DEVICE_SETTINGS
 #define ROCKCHIP_DEVICE_SETTINGS \
+		"stdin=serial,usbkbd\0" \
 		"stdout=serial,vidconsole\0" \
 		"stderr=serial,vidconsole\0"
 
@@ -40,4 +41,5 @@
 	"userdata partubi userdata\0"
 
 #endif
-#endif
\ No newline at end of file
+#endif
+

commit 0f5aec880039a54d480495a8952509e8d4f319ee
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jul 16 16:01:42 2021 +0800

    common: usb_kbd: add API to identify F1~F12
    
    F1~F12 code num is special format.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I1a7ac8bd6fe868bf4b356db346f123588c74ff57

diff --git a/common/usb_kbd.c b/common/usb_kbd.c
index f7e949d1a0..fe8cf23795 100644
--- a/common/usb_kbd.c
+++ b/common/usb_kbd.c
@@ -15,6 +15,7 @@
 #include <memalign.h>
 #include <stdio_dev.h>
 #include <asm/byteorder.h>
+#include <linux/input.h>
 
 #include <usb.h>
 
@@ -642,6 +643,61 @@ int usb_kbd_deregister(int force)
 
 #if CONFIG_IS_ENABLED(DM_USB)
 
+int usb_kbd_recv_fn(int key_fn)
+{
+	char ch[5];
+	int i;
+
+	if (!ftstc(stdin)) {
+		debug("No char\n");
+		return 0;
+	}
+
+	memset(ch, 0, 5);
+	for (i = 0; i < 5; i++) {
+		if (!ftstc(stdin))
+			break;
+		ch[i] = fgetc(stdin);
+		debug("char[%d]: 0x%x, %d\n", i, ch[i], ch[i]);
+	}
+
+	if (ch[0] != 0x1b) {
+		debug("Invalid 0x1b\n");
+		return 0;
+	}
+
+	switch (key_fn) {
+	case KEY_F1:
+	case KEY_F2:
+	case KEY_F3:
+	case KEY_F4:
+		if (ch[1] != 0x4f)
+			return 0;
+		return (ch[2] - 21 == key_fn);
+	case KEY_F5:
+	case KEY_F6:
+	case KEY_F7:
+	case KEY_F8:
+		if (ch[1] != '[' || ch[2] != '1' || ch[4] != '~')
+			return 0;
+		return (ch[3] + 9 == key_fn);
+	case KEY_F9:
+	case KEY_F10:
+		if (ch[1] != '[' || ch[2] != '2' || ch[4] != '~')
+			return 0;
+		return (ch[3] + 19 == key_fn);
+	case KEY_F11:
+	case KEY_F12:
+		if (ch[1] != '[' || ch[2] != '2' || ch[4] != '~')
+			return 0;
+		return (ch[3] + 36 == key_fn);
+	default:
+		return 0;
+	}
+
+	return 0;
+}
+
 static int usb_kbd_probe(struct udevice *dev)
 {
 	struct usb_device *udev = dev_get_parent_priv(dev);
diff --git a/include/keyboard.h b/include/keyboard.h
index 9b51e20322..b00e33a59a 100644
--- a/include/keyboard.h
+++ b/include/keyboard.h
@@ -103,4 +103,15 @@ extern void pckbd_leds(unsigned char leds);
 int ps2ser_check(void);
 #endif
 
+#ifdef CONFIG_USB_KEYBOARD
+/**
+ * Check if usb keyboard receive F1~F12.
+ *
+ * @key_fn: KEY_F1, KEY_F2, KEY_F3, .... KEY_F12. (defined in input.h)
+ *
+ * return 1 if received, otherwise 0.
+ */
+extern int usb_kbd_recv_fn(int key_fn);
+#endif
+
 #endif /* __KEYBOARD_H */

commit c39c9a8375169d07fdcac148f8dfdc6865a1a5fe
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Sat Nov 23 18:15:21 2019 +0100

    UPSTREAM: usb: kbd: implement special keys
    
    Provide support for F1-F12, Insert, Delete, Home, End, Page Up, Page Down.
    
    As this leads to a size increase provide a customizing setting
    CONFIG_USB_KEYBOARD_FN_KEYS.
    
    Change-Id: I5b58edecbb5abedbf0a822958bbcee91b06b5026
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 87e91bccaee63d70fd3ada0bee5e861edf8967a5)

diff --git a/common/usb_kbd.c b/common/usb_kbd.c
index 9df17e0a15..f7e949d1a0 100644
--- a/common/usb_kbd.c
+++ b/common/usb_kbd.c
@@ -75,7 +75,11 @@ static const unsigned char usb_kbd_num_keypad[] = {
 };
 
 static const u8 usb_special_keys[] = {
+#ifdef CONFIG_USB_KEYBOARD_FN_KEYS
+	'2', 'H', '5', '3', 'F', '6', 'C', 'D', 'B', 'A'
+#else
 	'C', 'D', 'B', 'A'
+#endif
 };
 
 /*
@@ -232,6 +236,43 @@ static int usb_kbd_translate(struct usb_kbd_pdata *data, unsigned char scancode,
 		return 0;
 	}
 
+#ifdef CONFIG_USB_KEYBOARD_FN_KEYS
+	if (scancode < 0x3a || scancode > 0x52 ||
+	    scancode == 0x46 || scancode == 0x47)
+		return 1;
+
+	usb_kbd_put_queue(data, 0x1b);
+	if (scancode < 0x3e) {
+		/* F1 - F4 */
+		usb_kbd_put_queue(data, 0x4f);
+		usb_kbd_put_queue(data, scancode - 0x3a + 'P');
+		return 0;
+	}
+	usb_kbd_put_queue(data, '[');
+	if (scancode < 0x42) {
+		/* F5 - F8 */
+		usb_kbd_put_queue(data, '1');
+		if (scancode == 0x3e)
+			--scancode;
+		keycode = scancode - 0x3f + '7';
+	} else if (scancode < 0x49) {
+		/* F9 - F12 */
+		usb_kbd_put_queue(data, '2');
+		if (scancode > 0x43)
+			++scancode;
+		keycode = scancode - 0x42 + '0';
+	} else {
+		/*
+		 * INSERT, HOME, PAGE UP, DELETE, END, PAGE DOWN,
+		 * RIGHT, LEFT, DOWN, UP
+		 */
+		keycode = usb_special_keys[scancode - 0x49];
+	}
+	usb_kbd_put_queue(data, keycode);
+	if (scancode < 0x4f && scancode != 0x4a && scancode != 0x4d)
+		usb_kbd_put_queue(data, '~');
+	return 0;
+#else
 	/* Left, Right, Up, Down */
 	if (scancode > 0x4e && scancode < 0x53) {
 		usb_kbd_put_queue(data, 0x1b);
@@ -240,6 +281,7 @@ static int usb_kbd_translate(struct usb_kbd_pdata *data, unsigned char scancode,
 		return 0;
 	}
 	return 1;
+#endif /* CONFIG_USB_KEYBOARD_FN_KEYS */
 }
 
 static uint32_t usb_kbd_service_key(struct usb_device *dev, int i, int up)
diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig
index c1019d17dd..dd28340316 100644
--- a/drivers/usb/Kconfig
+++ b/drivers/usb/Kconfig
@@ -96,6 +96,12 @@ config USB_KEYBOARD
 
 if USB_KEYBOARD
 
+config USB_KEYBOARD_FN_KEYS
+	bool "USB keyboard function key support"
+	help
+	  Say Y here if you want support for keys F1 - F12, INS, HOME, DELETE,
+	  END, PAGE UP, and PAGE DOWN.
+
 choice
 	prompt "USB keyboard polling"
 	default SYS_USB_EVENT_POLL

commit 3344a41df51286c580497d68eef153c48fa42c6c
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Sat Nov 23 18:15:20 2019 +0100

    UPSTREAM: usb: kbd: simplify coding for arrow keys
    
    Avoid duplicate translation of arrow key codes.
    
    Reduce code size by avoiding strings and eliminating
    usb_kbd_put_sequence().
    
    Change-Id: Idf0433678c16ba948f2576f206cff0d3d7d4a77c
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 3352c2114b69aeadf54feb8140071a55fb580c30)

diff --git a/common/usb_kbd.c b/common/usb_kbd.c
index ec92c77d18..9df17e0a15 100644
--- a/common/usb_kbd.c
+++ b/common/usb_kbd.c
@@ -74,13 +74,8 @@ static const unsigned char usb_kbd_num_keypad[] = {
 	'.', 0, 0, 0, '='
 };
 
-/*
- * map arrow keys to ^F/^B ^N/^P, can't really use the proper
- * ANSI sequence for arrow keys because the queuing code breaks
- * when a single keypress expands to 3 queue elements
- */
-static const unsigned char usb_kbd_arrow[] = {
-	0x6, 0x2, 0xe, 0x10
+static const u8 usb_special_keys[] = {
+	'C', 'D', 'B', 'A'
 };
 
 /*
@@ -207,10 +202,6 @@ static int usb_kbd_translate(struct usb_kbd_pdata *data, unsigned char scancode,
 			keycode = usb_kbd_numkey[scancode - 0x1e];
 	}
 
-	/* Arrow keys */
-	if ((scancode >= 0x4f) && (scancode <= 0x52))
-		keycode = usb_kbd_arrow[scancode - 0x4f];
-
 	/* Numeric keypad */
 	if ((scancode >= 0x54) && (scancode <= 0x67))
 		keycode = usb_kbd_num_keypad[scancode - 0x54];
@@ -238,9 +229,17 @@ static int usb_kbd_translate(struct usb_kbd_pdata *data, unsigned char scancode,
 	if (keycode) {
 		debug("%c", keycode);
 		usb_kbd_put_queue(data, keycode);
+		return 0;
 	}
 
-	return 0;
+	/* Left, Right, Up, Down */
+	if (scancode > 0x4e && scancode < 0x53) {
+		usb_kbd_put_queue(data, 0x1b);
+		usb_kbd_put_queue(data, '[');
+		usb_kbd_put_queue(data, usb_special_keys[scancode - 0x4f]);
+		return 0;
+	}
+	return 1;
 }
 
 static uint32_t usb_kbd_service_key(struct usb_device *dev, int i, int up)

commit 7d89659c2e9474a4a5a1c04c51be184fd64b238a
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Sat Nov 23 18:15:19 2019 +0100

    UPSTREAM: usb: kbd: signature of usb_kbd_put_queue()
    
    usb_kbd_buffer is defined as u8[]. So let usb_kbd_put_queue() use u8 as
    type of the parameter for the new byte.
    
    Change-Id: Ib94126a1b335e7735db23cdd1b523483c095c1b2
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 28dfa7d80d8ddf7ef795f518230964d2c393b25b)

diff --git a/common/usb_kbd.c b/common/usb_kbd.c
index f6b83958ef..ec92c77d18 100644
--- a/common/usb_kbd.c
+++ b/common/usb_kbd.c
@@ -126,7 +126,7 @@ extern int __maybe_unused net_busy_flag;
 static unsigned long __maybe_unused kbd_testc_tms;
 
 /* Puts character in the queue and sets up the in and out pointer. */
-static void usb_kbd_put_queue(struct usb_kbd_pdata *data, char c)
+static void usb_kbd_put_queue(struct usb_kbd_pdata *data, u8 c)
 {
 	if (data->usb_in_pointer == USB_KBD_BUFFER_LEN - 1) {
 		/* Check for buffer full. */

commit c4da9cd0b11c9fdc5a4c2423c0914a0427b27e77
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Sat Nov 23 18:15:18 2019 +0100

    UPSTREAM: usb: kbd: fix typo
    
    %s/a interrupt/an interrupt/
    
    Change-Id: I02f2ca10201de7c2bfcb1ee08a42a3e427bce89d
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 216db3af2c31303ba2388b51fa064693b8c47ac2)

diff --git a/common/usb_kbd.c b/common/usb_kbd.c
index 902473643e..f6b83958ef 100644
--- a/common/usb_kbd.c
+++ b/common/usb_kbd.c
@@ -316,7 +316,7 @@ static inline void usb_kbd_poll_for_event(struct usb_device *dev)
 #if defined(CONFIG_SYS_USB_EVENT_POLL)
 	struct usb_kbd_pdata *data = dev->privptr;
 
-	/* Submit a interrupt transfer request */
+	/* Submit an interrupt transfer request */
 	if (usb_int_msg(dev, data->intpipe, &data->new[0],
 			data->intpktsize, data->intinterval, true) >= 0)
 		usb_kbd_irq_worker(dev);

commit ead987b88ec6b8de8072cef56d7e3508f99f532f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 13 17:05:05 2021 +0800

    common: android: free non-reloc U-Boot code
    
    Avoid memory overlap error when sysmem alloc uncompressed kernel.
    
    fixes:
    (b3a6659c22 rockchip: board: reserve sysmem for non-reloc U-Boot code)
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Iacb9df1cff3955d9d285630dad4a65a46d5d2044

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 02a70dd997..bc88a86310 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -259,7 +259,9 @@ static int sysmem_alloc_uncomp_kernel(ulong andr_hdr,
 		kaddr -= hdr->page_size;
 		if (sysmem_free((phys_addr_t)kaddr))
 			return -EINVAL;
-
+#ifdef CONFIG_SKIP_RELOCATE_UBOOT
+		sysmem_free(CONFIG_SYS_TEXT_BASE);
+#endif
 		/*
 		 * Use smaller Ratio to get larger estimated uncompress
 		 * kernel size.

commit b1361f0c4b428bcf115a749702a93c7d8eb053ab
Author: Weiwen Chen <cww@rock-chips.com>
Date:   Tue Jul 13 11:08:42 2021 +0800

    configs: Add config for rv1126 mini memory
    
    Disable security boot-up.
    
    Signed-off-by: Weiwen Chen <cww@rock-chips.com>
    Change-Id: Ibd2418e271aabd3a1b6151043eaa4cdfd1ad5ad7

diff --git a/configs/rv1126-mini-mem.config b/configs/rv1126-mini-mem.config
new file mode 100644
index 0000000000..930d669cdc
--- /dev/null
+++ b/configs/rv1126-mini-mem.config
@@ -0,0 +1,2 @@
+CONFIG_TRUST_INI="RV1126TOS_MINI_MEM.ini"
+# CONFIG_OPTEE_CLIENT is not set

commit 629111d37996267232c8b26eedf3319c949a580e
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Sun Jul 11 20:34:45 2021 +0800

    drivers: rkflash: Support new flash
    
    1.Support W25N04KVZEIR, DS35Q2GB-IB, EM73C044VCF-H, XT26G11C,
    MT29F1G01ABA, F50L1G41XA, JS28U1GQSCAHG-83
    2.Support cache recheck to improve the power lost robustness
    
    Change-Id: Ib723bd4a00f8020042f715c7a30ad4e382ca5afb
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/sfc_nand.c b/drivers/rkflash/sfc_nand.c
index a212c29eaa..c21f32d13d 100644
--- a/drivers/rkflash/sfc_nand.c
+++ b/drivers/rkflash/sfc_nand.c
@@ -22,6 +22,7 @@ static u32 sfc_nand_get_ecc_status4(void);
 static u32 sfc_nand_get_ecc_status5(void);
 static u32 sfc_nand_get_ecc_status6(void);
 static u32 sfc_nand_get_ecc_status7(void);
+static u32 sfc_nand_get_ecc_status8(void);
 
 static struct nand_info spi_nand_tbl[] = {
 	/* TC58CVG0S0HxAIx */
@@ -69,6 +70,8 @@ static struct nand_info spi_nand_tbl[] = {
 	{ 0xEF, 0xAA, 0x21, 4, 0x40, 1, 1024, 0x4C, 18, 0x1, 0, { 0x04, 0x14, 0x24, 0xFF }, &sfc_nand_get_ecc_status1 },
 	/* W25N02KVZEIR */
 	{ 0xEF, 0xAA, 0x22, 4, 0x40, 1, 2048, 0x4C, 19, 0x8, 0, { 0x04, 0x14, 0x24, 0xFF }, &sfc_nand_get_ecc_status0 },
+	/* W25N04KVZEIR */
+	{ 0xEF, 0xAA, 0x23, 4, 0x40, 1, 4096, 0x4C, 20, 0x8, 0, { 0x04, 0x14, 0x24, 0x34 }, &sfc_nand_get_ecc_status0 },
 	/* W25N01GW */
 	{ 0xEF, 0xBA, 0x00, 4, 0x40, 1, 1024, 0x4C, 18, 0x1, 0, { 0x04, 0x14, 0x24, 0xFF }, &sfc_nand_get_ecc_status1 },
 
@@ -102,6 +105,8 @@ static struct nand_info spi_nand_tbl[] = {
 	{ 0xE5, 0x72, 0x00, 4, 0x40, 2, 1024, 0x0C, 19, 0x4, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
 	/* DS35M1GA-1B */
 	{ 0xE5, 0x21, 0x00, 4, 0x40, 1, 1024, 0x0C, 18, 0x4, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
+	/* DS35Q2GB-IB */
+	{ 0xE5, 0xF2, 0x00, 4, 0x40, 2, 1024, 0x0C, 19, 0x8, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status6 },
 
 	/* EM73C044VCC-H */
 	{ 0xD5, 0x22, 0x00, 4, 0x40, 1, 1024, 0x0C, 18, 0x8, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
@@ -109,6 +114,8 @@ static struct nand_info spi_nand_tbl[] = {
 	{ 0xD5, 0x20, 0x00, 4, 0x40, 1, 2048, 0x0C, 19, 0x8, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
 	/* EM73E044SNA-G */
 	{ 0xD5, 0x03, 0x00, 8, 0x40, 1, 2048, 0x4C, 20, 0x8, 1, { 0x04, 0x28, 0x08, 0x2C }, &sfc_nand_get_ecc_status0 },
+	/* EM73C044VCF-H */
+	{ 0xD5, 0x25, 0x00, 4, 0x40, 1, 1024, 0x0C, 18, 0x4, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
 
 	/* XT26G02A */
 	{ 0x0B, 0xE2, 0x00, 4, 0x40, 1, 2048, 0x4C, 19, 0x8, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status4 },
@@ -126,9 +133,13 @@ static struct nand_info spi_nand_tbl[] = {
 	{ 0x0B, 0x12, 0x00, 4, 0x40, 1, 2048, 0x4C, 19, 0x8, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status7 },
 	/* XT26G04C */
 	{ 0x0B, 0x13, 0x00, 8, 0x40, 1, 2048, 0x4C, 20, 0x8, 1, { 0x04, 0x08, 0x0C, 0x10 }, &sfc_nand_get_ecc_status7 },
+	/* XT26G11C */
+	{ 0x0B, 0x15, 0x00, 4, 0x40, 1, 1024, 0x4C, 18, 0x8, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
 
 	/* MT29F2G01ABA, XT26G02E, F50L2G41XA */
-	{ 0x2C, 0x24, 0x00, 4, 0x40, 2, 1024, 0x4C, 19, 0x1, 1, { 0x20, 0x24, 0xFF, 0xFF }, &sfc_nand_get_ecc_status6 },
+	{ 0x2C, 0x24, 0x00, 4, 0x40, 2, 1024, 0x4C, 19, 0x8, 0, { 0x20, 0x24, 0xFF, 0xFF }, &sfc_nand_get_ecc_status6 },
+	/* MT29F1G01ABA, F50L1G41XA */
+	{ 0x2C, 0x14, 0x00, 4, 0x40, 1, 1024, 0x4C, 18, 0x8, 0, { 0x20, 0x24, 0xFF, 0xFF }, &sfc_nand_get_ecc_status6 },
 
 	/* FM25S01 */
 	{ 0xA1, 0xA1, 0x00, 4, 0x40, 1, 1024, 0x4C, 18, 0x1, 0, { 0x00, 0x04, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
@@ -145,6 +156,8 @@ static struct nand_info spi_nand_tbl[] = {
 	{ 0x9B, 0x12, 0x00, 4, 0x40, 1, 1024, 0x40, 18, 0x1, 1, { 0x14, 0x24, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
 	/* BWJX08K-2Gb */
 	{ 0xBC, 0xB3, 0x00, 4, 0x40, 1, 2048, 0x4C, 19, 0x8, 1, { 0x04, 0x10, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
+	/* JS28U1GQSCAHG-83 */
+	{ 0xBF, 0x21, 0x00, 4, 0x40, 1, 1024, 0x40, 18, 0x4, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status8 },
 };
 
 static struct nand_info *p_nand_info;
@@ -459,7 +472,7 @@ static u32 sfc_nand_get_ecc_status3(void)
  * [0b1000], Multiple bit errors were detected and
  *	not corrected.
  * [0b1100], Bit error count equals the bit flip
- *	detectionthreshold
+ *	detection threshold
  * else, reserved
  */
 static u32 sfc_nand_get_ecc_status4(void)
@@ -501,7 +514,7 @@ static u32 sfc_nand_get_ecc_status4(void)
  * [0b001, 0b011], Bit errors were detected and corrected. Not
  *	reach Flipping Bits;
  * [0b100], Bit error count equals the bit flip
- *	detectionthreshold
+ *	detection threshold
  * [0b101, 0b110], Reserved;
  * [0b111], Multiple bit errors were detected and
  *	not corrected.
@@ -627,6 +640,48 @@ static u32 sfc_nand_get_ecc_status7(void)
 	return ret;
 }
 
+/*
+ * ecc spectial type8:
+ * ecc bits: 0xC0[4,6]
+ * [0b000], No bit errors were detected;
+ * [0b001, 0b011], 1~3 Bit errors were detected and corrected. Not
+ *	reach Flipping Bits;
+ * [0b100], Bit error count equals the bit flip
+ *	detection threshold
+ * others, Reserved.
+ */
+static u32 sfc_nand_get_ecc_status8(void)
+{
+	u32 ret;
+	u32 i;
+	u8 ecc;
+	u8 status;
+	u32 timeout = 1000 * 1000;
+
+	for (i = 0; i < timeout; i++) {
+		ret = sfc_nand_read_feature(0xC0, &status);
+
+		if (ret != SFC_OK)
+			return SFC_NAND_ECC_ERROR;
+
+		if (!(status & (1 << 0)))
+			break;
+
+		sfc_delay(1);
+	}
+
+	ecc = (status >> 4) & 0x07;
+
+	if (ecc < 4)
+		ret = SFC_NAND_ECC_OK;
+	else if (ecc == 4)
+		ret = SFC_NAND_ECC_REFRESH;
+	else
+		ret = (u32)SFC_NAND_ECC_ERROR;
+
+	return ret;
+}
+
 u32 sfc_nand_erase_block(u8 cs, u32 addr)
 {
 	int ret;
@@ -655,6 +710,30 @@ u32 sfc_nand_erase_block(u8 cs, u32 addr)
 	return ret;
 }
 
+static u32 sfc_nand_read_cache(u32 row, u32 *p_page_buf, u32 column, u32 len)
+{
+	int ret;
+	u32 plane;
+	struct rk_sfc_op op;
+
+	op.sfcmd.d32 = 0;
+	op.sfcmd.b.cmd = sfc_nand_dev.page_read_cmd;
+	op.sfcmd.b.addrbits = SFC_ADDR_XBITS;
+	op.sfcmd.b.dummybits = 8;
+
+	op.sfctrl.d32 = 0;
+	op.sfctrl.b.datalines = sfc_nand_dev.read_lines;
+	op.sfctrl.b.addrbits = 16;
+
+	plane = p_nand_info->plane_per_die == 2 ? ((row >> 6) & 0x1) << 12 : 0;
+
+	ret = sfc_request(&op, plane | column, p_page_buf, len);
+	if (ret != SFC_OK)
+		return SFC_NAND_HW_ERROR;
+
+	return ret;
+}
+
 u32 sfc_nand_prog_page_raw(u8 cs, u32 addr, u32 *p_page_buf)
 {
 	int ret;
@@ -662,6 +741,7 @@ u32 sfc_nand_prog_page_raw(u8 cs, u32 addr, u32 *p_page_buf)
 	struct rk_sfc_op op;
 	u8 status;
 	u32 page_size = SFC_NAND_SECTOR_FULL_SIZE * p_nand_info->sec_per_page;
+	u32 data_area_size = SFC_NAND_SECTOR_SIZE * p_nand_info->sec_per_page;
 
 	rkflash_print_dio("%s %x %x\n", __func__, addr, p_page_buf[0]);
 	sfc_nand_write_en();
@@ -682,6 +762,16 @@ u32 sfc_nand_prog_page_raw(u8 cs, u32 addr, u32 *p_page_buf)
 	plane = p_nand_info->plane_per_die == 2 ? ((addr >> 6) & 0x1) << 12 : 0;
 	sfc_request(&op, plane, p_page_buf, page_size);
 
+	/*
+	 * At the moment of power lost, flash maybe work in a unkonw state
+	 * and result in bit flip, when this situation is detected by cache
+	 * recheck, it's better to wait a second for a reliable hardware
+	 * environment to avoid abnormal data written to flash array.
+	 */
+	sfc_nand_read_cache(addr, (u32 *)sfc_nand_dev.recheck_buffer, 0, data_area_size);
+	if (memcmp(sfc_nand_dev.recheck_buffer, p_page_buf, data_area_size))
+		rkflash_print_error("%s cache bitflip1\n", __func__);
+
 	op.sfcmd.d32 = 0;
 	op.sfcmd.b.cmd = 0x10;
 	op.sfcmd.b.addrbits = SFC_ADDR_24BITS;
@@ -694,7 +784,6 @@ u32 sfc_nand_prog_page_raw(u8 cs, u32 addr, u32 *p_page_buf)
 		return ret;
 
 	ret = sfc_nand_wait_busy(&status, 1000 * 1000);
-
 	if (status & (1 << 3))
 		return SFC_NAND_PROG_ERASE_ERROR;
 
@@ -816,7 +905,7 @@ u32 sfc_nand_check_bad_block(u8 cs, u32 addr)
 	ret = sfc_nand_read(addr, &marker, data_size, 2);
 
 	/* unify with mtd framework */
-	if (ret == SFC_NAND_ECC_ERROR)
+	if (ret == SFC_NAND_ECC_ERROR || (u16)marker != 0xffff)
 		rkflash_print_error("%s page= %x ret= %x spare= %x\n",
 				    __func__, addr, ret, marker);
 
@@ -964,6 +1053,11 @@ u32 sfc_nand_init(void)
 	sfc_nand_dev.prog_lines = DATA_LINES_X1;
 	sfc_nand_dev.page_read_cmd = 0x03;
 	sfc_nand_dev.page_prog_cmd = 0x02;
+	sfc_nand_dev.recheck_buffer = ftl_malloc(SFC_NAND_PAGE_MAX_SIZE);
+	if (!sfc_nand_dev.recheck_buffer) {
+		rkflash_print_error("%s recheck_buffer alloc failed\n", __func__);
+		return -1;
+	}
 
 	if (p_nand_info->feature & FEA_4BIT_READ) {
 		if ((p_nand_info->has_qe_bits && sfc_nand_enable_QE() == SFC_OK) ||
@@ -994,6 +1088,7 @@ u32 sfc_nand_init(void)
 void sfc_nand_deinit(void)
 {
 	/* to-do */
+	kfree(sfc_nand_dev.recheck_buffer);
 }
 
 struct SFNAND_DEV *sfc_nand_get_private_dev(void)
diff --git a/drivers/rkflash/sfc_nand.h b/drivers/rkflash/sfc_nand.h
index 4c9ae1477f..a0247b05ce 100644
--- a/drivers/rkflash/sfc_nand.h
+++ b/drivers/rkflash/sfc_nand.h
@@ -83,6 +83,7 @@ struct SFNAND_DEV {
 	u8 prog_lines;
 	u8 page_read_cmd;
 	u8 page_prog_cmd;
+	u8 *recheck_buffer;
 };
 
 struct nand_mega_area {

commit 4104569672e4c87e0dd54d160ca43b7fc6753d75
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 12 15:41:34 2021 +0800

    make.sh: print build time
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ie53e197b3e34c3c5213d56451cf77b290f71f154

diff --git a/make.sh b/make.sh
index 9317b140bf..948284d7e2 100755
--- a/make.sh
+++ b/make.sh
@@ -716,3 +716,4 @@ clean_files
 make PYTHON=python2 CROSS_COMPILE=${TOOLCHAIN_GCC} all --jobs=${JOB}
 pack_images
 finish
+date

commit 7545a1ec89b80315ac3032a3dbe08f8aace93d13
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jul 9 18:07:15 2021 +0800

    scripts: stacktrace: use '{}' for variables
    
    Rename "SYMBOL_FILE" to "SYM_FILE".
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I8e7affe51cab41b60306745777f0efcc37ae0ecd

diff --git a/scripts/stacktrace.sh b/scripts/stacktrace.sh
index 5ad8dc33db..2c50e07b76 100755
--- a/scripts/stacktrace.sh
+++ b/scripts/stacktrace.sh
@@ -6,24 +6,23 @@
 #
 
 set -e
-ARGS_N=$#
+
 INPUT_FILE=$1
 TPL_SPL=$2
 
-
-if [ "$TPL_SPL" = "tpl" ]; then
-	SYMBOL_FILE=`find -name u-boot-tpl.sym`
+if [ "${TPL_SPL}" = "tpl" ]; then
+	SYM_FILE=`find -name u-boot-tpl.sym`
 	ELF_FILE="elf tpl"
-elif [ "$TPL_SPL" = "spl" ]; then
-	SYMBOL_FILE=`find -name u-boot-spl.sym`
+elif [ "${TPL_SPL}" = "spl" ]; then
+	SYM_FILE=`find -name u-boot-spl.sym`
 	ELF_FILE="elf spl"
 else
-	SYMBOL_FILE=`find -name u-boot.sym`
+	SYM_FILE=`find -name u-boot.sym`
 	ELF_FILE="elf"
 fi
 
 echo
-if [ $ARGS_N -eq 0 ]; then
+if [ $# -eq 0 ]; then
 	echo "Usage: "
 	echo "	./scripts/stacktrace.sh <file> <type>"
 	echo
@@ -37,34 +36,34 @@ if [ $ARGS_N -eq 0 ]; then
 	echo "	./scripts/stacktrace.sh ./dump.txt spl"
 	echo
 	exit 1
-elif [ ! -f $INPUT_FILE ]; then
-	echo "Can't find input file: $INPUT_FILE"
+elif [ ! -f ${INPUT_FILE} ]; then
+	echo "ERROR: No ${INPUT_FILE}"
 	exit 1
-elif [ "$SYMBOL_FILE" = '' ] || [ ! -f $SYMBOL_FILE ]; then
-	echo "Can't find symbol file: ${SYMBOL_FILE}"
+elif [ "${SYM_FILE}" = '' ] || [ ! -f ${SYM_FILE} ]; then
+	echo "ERROR: No ${SYM_FILE}"
 	exit 1
 fi
 
-echo "SYMBOL File: ${SYMBOL_FILE}"
+echo "SYMBOL File: ${SYM_FILE}"
 echo
 # Parse PC and LR
 echo "Call trace:"
-grep '\[< ' $INPUT_FILE | grep '>\]' | grep [PC,LR] | while read line
+grep '\[< ' ${INPUT_FILE} | grep '>\]' | grep [PC,LR] | while read line
 do
 	echo -n " ${line}  "
 
-	frame_pc_str=`echo $line | awk '{ print "0x"$3 }'`
-	frame_pc_dec=`echo $line | awk '{ print strtonum("0x"$3); }'`
+	frame_pc_str=`echo ${line} | awk '{ print "0x"$3 }'`
+	frame_pc_dec=`echo ${line} | awk '{ print strtonum("0x"$3); }'`
 	frame_pc_hex=`echo "obase=16;${frame_pc_dec}"|bc |tr '[A-Z]' '[a-z]'`
 
-	f_pc_dec=`cat ${SYMBOL_FILE} | sort | awk '/\.text/ { if (strtonum("0x"$1) > '$frame_pc_str') { print fpc; exit; } fpc=strtonum("0x"$1); }'`
+	f_pc_dec=`cat ${SYM_FILE} | sort | awk '/\.text/ { if (strtonum("0x"$1) > '${frame_pc_str}') { print fpc; exit; } fpc=strtonum("0x"$1); }'`
 	f_pc_hex=`echo "obase=16;${f_pc_dec}"|bc |tr '[A-Z]' '[a-z]'`
 	f_offset_dec=$((frame_pc_dec-f_pc_dec))
 	f_offset_hex=`echo "obase=16;${f_offset_dec}"|bc |tr '[A-Z]' '[a-z]'`
 
-	cat ${SYMBOL_FILE} | sort |
-	awk -v foffset=$f_offset_hex '/\.text/ {
-		if (strtonum("0x"$1) > '$frame_pc_str') {
+	cat ${SYM_FILE} | sort |
+	awk -v foffset=${f_offset_hex} '/\.text/ {
+		if (strtonum("0x"$1) > '${frame_pc_str}') {
 			printf("%s+0x%s/0x%x      ", fname, foffset, fsize);
 			exit
 		}
@@ -73,30 +72,30 @@ do
 		fpc=strtonum("0x"$1);
 	}'
 
-	func_path=`./make.sh $frame_pc_str | awk '{ print $1 }' | sed -n "/home/p"`
+	func_path=`./make.sh ${frame_pc_str} | awk '{ print $1 }' | sed -n "/home/p"`
 	func_path=`echo ${func_path##*boot/}`
-	echo $func_path
+	echo ${func_path}
 done
 echo
 
 # Parse stack
 echo "Stack:"
-grep '\[< ' $INPUT_FILE | grep '>\]' | grep -v [PC,LR] | while read line
+grep '\[< ' ${INPUT_FILE} | grep '>\]' | grep -v [PC,LR] | while read line
 do
 	echo -n "       ${line}  "
 
-	frame_pc_str=`echo $line | awk '{ print "0x"$2 }'`
-	frame_pc_dec=`echo $line | awk '{ print strtonum("0x"$2); }'`
+	frame_pc_str=`echo ${line} | awk '{ print "0x"$2 }'`
+	frame_pc_dec=`echo ${line} | awk '{ print strtonum("0x"$2); }'`
 	frame_pc_hex=`echo "obase=16;${frame_pc_dec}"|bc |tr '[A-Z]' '[a-z]'`
 
-	f_pc_dec=`cat ${SYMBOL_FILE} | sort | awk '/\.text/ { if (strtonum("0x"$1) > '$frame_pc_str') { print fpc; exit; } fpc=strtonum("0x"$1); }'`
+	f_pc_dec=`cat ${SYM_FILE} | sort | awk '/\.text/ { if (strtonum("0x"$1) > '${frame_pc_str}') { print fpc; exit; } fpc=strtonum("0x"$1); }'`
 	f_pc_hex=`echo "obase=16;${f_pc_dec}"|bc |tr '[A-Z]' '[a-z]'`
 	f_offset_dec=$((frame_pc_dec-f_pc_dec))
 	f_offset_hex=`echo "obase=16;${f_offset_dec}"|bc |tr '[A-Z]' '[a-z]'`
 
-	cat ${SYMBOL_FILE} | sort |
-	awk -v foffset=$f_offset_hex '/\.text/ {
-		if (strtonum("0x"$1) > '$frame_pc_str') {
+	cat ${SYM_FILE} | sort |
+	awk -v foffset=${f_offset_hex} '/\.text/ {
+		if (strtonum("0x"$1) > '${frame_pc_str}') {
 			printf("%s+0x%s/0x%x\n", fname, foffset, fsize);
 			exit
 		}
@@ -109,9 +108,9 @@ echo
 
 # PC instruction
 echo " PC Surrounding Instructions:"
-line=`grep '\[< ' $INPUT_FILE | grep '>\]' | grep [PC]`
-frame_pc_str=`echo $line | awk '{ print "0x"$3 }'`
-frame_pc_dec=`echo $line | awk '{ print strtonum("0x"$3); }'`
+line=`grep '\[< ' ${INPUT_FILE} | grep '>\]' | grep [PC]`
+frame_pc_str=`echo ${line} | awk '{ print "0x"$3 }'`
+frame_pc_dec=`echo ${line} | awk '{ print strtonum("0x"$3); }'`
 frame_pc_hex=`echo "obase=16;${frame_pc_dec}"|bc |tr '[A-Z]' '[a-z]'`
 PC_INSTR=`./make.sh ${ELF_FILE} | grep -5 -m 1 "${frame_pc_hex}:"`
 echo "${PC_INSTR}"

commit f961f5ac078e5d451dddeab17a27896742fbb4da
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jul 9 17:23:26 2021 +0800

    scripts: stacktrace: print PC surrounding instructions
    
    Call trace:
     PC:   [< 00a7b36c >]  printch+0x3c/0x68      /home4/cjh/uboot-nextdev/drivers/serial/ns16550.c:280
     LR:   [< 00a247e4 >]  puts+0x1c/0x30      /home4/cjh/uboot-nextdev/common/console.c:592
    
    Stack:
           [< 00a7b36c >]  printch+0x3c/0x68
           [< 00ab337c >]  printf+0x90/0xb4
           [< 00a036e4 >]  rk_board_fdt_fixup+0x30/0x1a8
           [< 00a01f10 >]  arch_fixup_fdt+0xc/0x94
           [< 00a2aa28 >]  image_setup_libfdt+0x14/0x114
           [< 00a26d1c >]  image_setup_linux+0x4c/0x6c
           ......
    
     PC Surrounding Instructions:
      a7b358:       528001a2        mov     w2, #0xd                        // #13
      a7b35c:       b9000022        str     w2, [x1]
      a7b360:       b4000192        cbz     x18, a7b390 <printch+0x60>
      a7b364:       f9400642        ldr     x2, [x18,#8]
      a7b368:       373000e2        tbnz    w2, #6, a7b384 <printch+0x54>
      a7b36c:       f940d242        ldr     x2, [x18,#416]
      a7b370:       b4000102        cbz     x2, a7b390 <printch+0x60>
      a7b374:       f940d241        ldr     x1, [x18,#416]
      a7b378:       b9401422        ldr     w2, [x1,#20]
      a7b37c:       362fffe2        tbz     w2, #5, a7b378 <printch+0x48>
      a7b380:       b9000020        str     w0, [x1]
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I48391165094708dd86eeeabea09739a4c14fcf6f

diff --git a/scripts/stacktrace.sh b/scripts/stacktrace.sh
index 5418b8c368..5ad8dc33db 100755
--- a/scripts/stacktrace.sh
+++ b/scripts/stacktrace.sh
@@ -13,10 +13,13 @@ TPL_SPL=$2
 
 if [ "$TPL_SPL" = "tpl" ]; then
 	SYMBOL_FILE=`find -name u-boot-tpl.sym`
+	ELF_FILE="elf tpl"
 elif [ "$TPL_SPL" = "spl" ]; then
 	SYMBOL_FILE=`find -name u-boot-spl.sym`
+	ELF_FILE="elf spl"
 else
 	SYMBOL_FILE=`find -name u-boot.sym`
+	ELF_FILE="elf"
 fi
 
 echo
@@ -103,3 +106,13 @@ do
 	}'
 done
 echo
+
+# PC instruction
+echo " PC Surrounding Instructions:"
+line=`grep '\[< ' $INPUT_FILE | grep '>\]' | grep [PC]`
+frame_pc_str=`echo $line | awk '{ print "0x"$3 }'`
+frame_pc_dec=`echo $line | awk '{ print strtonum("0x"$3); }'`
+frame_pc_hex=`echo "obase=16;${frame_pc_dec}"|bc |tr '[A-Z]' '[a-z]'`
+PC_INSTR=`./make.sh ${ELF_FILE} | grep -5 -m 1 "${frame_pc_hex}:"`
+echo "${PC_INSTR}"
+echo

commit 6aef53bd9859e776dc742a99aff6e941004bcd74
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jul 9 15:07:57 2021 +0800

    cpu: rockchip amp: check boot cpu before sysmem alloc
    
    If boot cpu is going to load and brought up linux, skip
    sysmem alloc for it's amp firmware memory.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I364489d469f729c5008807f9fc0918f24ada86c5

diff --git a/drivers/cpu/rockchip_amp.c b/drivers/cpu/rockchip_amp.c
index 7bdb684fd1..6f00c24e48 100644
--- a/drivers/cpu/rockchip_amp.c
+++ b/drivers/cpu/rockchip_amp.c
@@ -84,6 +84,15 @@ static int brought_up_all_amp(void *fit, const char *fit_uname_cfg)
 		if (!data_size)
 			continue;
 
+		if ((read_mpidr() & 0x0fff) == cpu) {
+			primary_pe_arch = arch;
+			primary_pe_state = pe_state;
+			primary_pe_entry = entry;
+			primary_on_linux =
+				!!fdt_getprop(fit, noffset, "linux-os", NULL);
+			continue;
+		}
+
 		if (reserved_mem[1]) {
 			ret = bidram_reserve_by_name(desc, reserved_mem[0],
 						     reserved_mem[1]);
@@ -98,15 +107,6 @@ static int brought_up_all_amp(void *fit, const char *fit_uname_cfg)
 			return -ENXIO;
 		}
 
-		if ((read_mpidr() & 0x0fff) == cpu) {
-			primary_pe_arch = arch;
-			primary_pe_state = pe_state;
-			primary_pe_entry = entry;
-			primary_on_linux =
-				!!fdt_getprop(fit, noffset, "linux-os", NULL);
-			continue;
-		}
-
 		AMP_I("Brought up cpu[%x] with state 0x%x, entry 0x%08x ...",
 		      cpu, pe_state, entry);
 

commit 7d536d43a436095ca3e355970452d83b58f34dd1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jul 7 16:08:40 2021 +0800

    rockchip: spl: init gd->flags as dummy
    
    This "dummy" is initialized by board_init_f_boot_flags()
    since commit:
    (034db99592 dm: serial: support always use uart debug mode)
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I6afd1133fb95fbf7aa9366dbeb70625f8ab8771d

diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index 44bff8e0a6..58cf3a63ff 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -156,7 +156,7 @@ void board_init_f(ulong dummy)
 	struct udevice *dev;
 #endif
 #endif
-
+	gd->flags = dummy;
 	rockchip_stimer_init();
 #define EARLY_UART
 #if defined(EARLY_UART) && defined(CONFIG_DEBUG_UART)

commit bbbdc31f7fe18505ac5f097b99cc447b84a69bed
Author: Steven Liu <steven.liu@rock-chips.com>
Date:   Wed Jul 7 16:38:36 2021 +0800

    cpu: amp: modify default address for each CPU.
    
    Signed-off-by: Steven Liu <steven.liu@rock-chips.com>
    Change-Id: I70f5870e381a4985aa9312a249e6c0eb97114b17

diff --git a/drivers/cpu/amp.its b/drivers/cpu/amp.its
index 753e9ee1f3..f7841971b4 100644
--- a/drivers/cpu/amp.its
+++ b/drivers/cpu/amp.its
@@ -19,7 +19,7 @@
 			cpu          = <0x000>;  // mpidr
 			thumb        = <0>;      // 0: arm or thumb2; 1: thumb
 			hyp          = <0>;      // 0: el1/svc; 1: el2/hyp
-			load         = <0xa00000>;
+			load         = <0x12000000>;
 			udelay       = <1000000>;
 			hash {
 				algo = "sha256";
@@ -35,7 +35,7 @@
 			cpu          = <0x100>;
 			thumb        = <0>;
 			hyp          = <0>;
-			load         = <0xb00000>;
+			load         = <0x01800000>;
 			udelay       = <1000000>;
 			hash {
 				algo = "sha256";
@@ -51,7 +51,7 @@
 			cpu          = <0x200>;
 			thumb        = <0>;
 			hyp          = <0>;
-			load         = <0xd00000>;
+			load         = <0x03800000>;
 			udelay       = <1000000>;
 			hash {
 				algo = "sha256";
@@ -67,7 +67,7 @@
 			cpu          = <0x300>;
 			thumb        = <0>;
 			hyp          = <0>;
-			load         = <0xe00000>;
+			load         = <0x05800000>;
 			udelay       = <1000000>;
 			hash {
 				algo = "sha256";

commit 406de325418d432f1a395c721dedeb4b79a0e4c2
Author: Weiwen Chen <cww@rock-chips.com>
Date:   Wed Jul 7 16:20:50 2021 +0800

    misc: rockchip_decompress: enable interrupt
    
    Support decompress firmware in spl and hold the
    decompress interrupt flag after jump to next-stage.
    
    Signed-off-by: Weiwen Chen <cww@rock-chips.com>
    Change-Id: Ifa94d59606a87e7f731f7337636bf6a0f08dcd3e

diff --git a/drivers/misc/rockchip_decompress.c b/drivers/misc/rockchip_decompress.c
index ef66a723d2..3cfd7166ce 100644
--- a/drivers/misc/rockchip_decompress.c
+++ b/drivers/misc/rockchip_decompress.c
@@ -136,6 +136,10 @@ static int rockchip_decom_start(struct udevice *dev, void *buf)
 
 	writel(limit_lo, priv->base + DECOM_LMTSL);
 	writel(limit_hi, priv->base + DECOM_LMTSH);
+
+#if defined(CONFIG_SPL_BUILD)
+	writel(DECOM_INT_MASK, priv->base + DECOM_IEN);
+#endif
 	writel(DECOM_ENABLE, priv->base + DECOM_ENR);
 
 	priv->idle_check_once = true;

commit b3a6659c22b0669d39674507fd44af5e6929cdc9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jul 7 15:33:25 2021 +0800

    rockchip: board: reserve sysmem for non-reloc U-Boot code
    
    It's helpful to show sysmem error when use boot.img but not
    zboot.img on 32-bit platform.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I9c2cfe61c80e5e40a87437acf8ee6146f8ba791c

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index e3ae265779..8929b0fd00 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -626,6 +626,18 @@ int board_bidram_reserve(struct bidram *bidram)
 	return 0;
 }
 
+int board_sysmem_reserve(struct sysmem *sysmem)
+{
+#ifdef CONFIG_SKIP_RELOCATE_UBOOT
+	if (!sysmem_alloc_base_by_name("NO-RELOC-CODE",
+	    CONFIG_SYS_TEXT_BASE, SZ_2M)) {
+		printf("Failed to reserve sysmem for U-Boot code\n");
+		return -ENOMEM;
+	}
+#endif
+	return 0;
+}
+
 parse_fn_t board_bidram_parse_fn(void)
 {
 	return param_parse_ddr_mem;

commit dca57e1c3d022acbbc6a8816281bf9c6468be282
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jul 7 10:46:54 2021 +0800

    rockchip: resource: rename DTB_FILE to DEFAULT_DTB_FILE
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If26ccbe4d8647deb6b837e5016c29245b6891bd4

diff --git a/arch/arm/include/asm/arch-rockchip/spl_resource_img.h b/arch/arm/include/asm/arch-rockchip/spl_resource_img.h
index f5a0acb00d..15e8f10c65 100644
--- a/arch/arm/include/asm/arch-rockchip/spl_resource_img.h
+++ b/arch/arm/include/asm/arch-rockchip/spl_resource_img.h
@@ -15,7 +15,7 @@
 #define MAX_FILE_NAME_LEN		220
 #define MAX_HASH_LEN			32
 
-#define DTB_FILE			"rk-kernel.dtb"
+#define DEFAULT_DTB_FILE		"rk-kernel.dtb"
 
 /*
  *         resource image structure
diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index d8835587d7..c8e0fc3571 100644
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -30,7 +30,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define ENTRY_TAG_SIZE			4
 #define MAX_FILE_NAME_LEN		220
 #define MAX_HASH_LEN			32
-#define DTB_FILE			"rk-kernel.dtb"
+#define DEFAULT_DTB_FILE		"rk-kernel.dtb"
 
 /*
  *         resource image structure
@@ -243,7 +243,7 @@ static int resource_create_list(struct blk_desc *dev_desc, int rsce_base)
 			goto err;
 		} else {
 			free(hdr);
-			return resource_replace_entry(DTB_FILE, rsce_base,
+			return resource_replace_entry(DEFAULT_DTB_FILE, rsce_base,
 						      0, fdt_totalsize(hdr));
 		}
 	}
@@ -318,7 +318,7 @@ static int read_dtb_from_android(struct blk_desc *dev_desc,
 	 */
 	dtb_offset = DIV_ROUND_UP(dtb_offset, dev_desc->blksz);
 #ifndef CONFIG_ROCKCHIP_DTB_VERIFY
-	if (replace_resource_entry(DTB_FILE, rsce_base, dtb_offset, dtb_size))
+	if (replace_resource_entry(DEFAULT_DTB_FILE, rsce_base, dtb_offset, dtb_size))
 		printf("Failed to load dtb from v2 dtb position\n");
 	else
 #endif
@@ -516,7 +516,7 @@ int rockchip_read_resource_dtb(void *fdt_addr, char **hash, int *hash_size)
 #endif
 	/* If dtbs matched hardware id(GPIO/ADC) not found, try the default */
 	if (!file)
-		file = get_file_info(DTB_FILE);
+		file = get_file_info(DEFAULT_DTB_FILE);
 
 	if (!file)
 		return -ENODEV;
diff --git a/arch/arm/mach-rockchip/spl_resource_img.c b/arch/arm/mach-rockchip/spl_resource_img.c
index a4b2136125..4eff0be8b5 100644
--- a/arch/arm/mach-rockchip/spl_resource_img.c
+++ b/arch/arm/mach-rockchip/spl_resource_img.c
@@ -42,7 +42,7 @@ struct resource_entry *spl_resource_image_get_dtb_entry(const struct
 	for (i = 0; i < hdr->e_nums; i++) {
 		entry = (struct resource_entry *)((char *)hdr
 				+ (hdr->blks + hdr->e_blks * i) * 512);
-		if (!memcmp(entry->name, DTB_FILE, strlen(DTB_FILE)))
+		if (!memcmp(entry->name, DEFAULT_DTB_FILE, strlen(DEFAULT_DTB_FILE)))
 			break;
 	}
 

commit 8b1fe597e324f370d464b41291dc44f11240aac5
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Fri Jun 25 16:27:08 2021 +0800

    drm/rockchip: vop2: if dts assign plane mask no need to update this property
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: I824ed7adc46901ffd06022d3662aed186bda4001

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 09b7bfcdc3..93eff04f54 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -1742,9 +1742,15 @@ static int rockchip_display_probe(struct udevice *dev)
 					vp_id = ofnode_read_u32_default(vp_node, "reg", 0);
 					ret = ofnode_read_u32_default(vp_node, "rockchip,plane-mask", 0);
 					if (ret) {
+						int primary_plane = 0;
+
 						s->crtc_state.crtc->vps[vp_id].plane_mask = ret;
 						s->crtc_state.crtc->assign_plane |= true;
-						printf("get vp%d plane mask:0x%x from dts\n", vp_id, ret);
+						primary_plane = ofnode_read_u32_default(vp_node, "rockchip,primary-plane", 0);
+						printf("get vp%d plane mask:0x%x, primary id:%d from dts\n",
+						       vp_id,
+						       s->crtc_state.crtc->vps[vp_id].plane_mask,
+						       primary_plane);
 					}
 
 					/* To check current vp status */
diff --git a/drivers/video/drm/rockchip_vop2.c b/drivers/video/drm/rockchip_vop2.c
index be6872de94..119d6b49e4 100644
--- a/drivers/video/drm/rockchip_vop2.c
+++ b/drivers/video/drm/rockchip_vop2.c
@@ -1915,6 +1915,8 @@ static int rockchip_vop2_fixup_dts(struct display_state *state, void *blob)
 		path = vp_node.np->full_name;
 		plane_mask = vop2->vp_plane_mask[vp_id].plane_mask;
 
+		if (cstate->crtc->assign_plane)
+			continue;
 		printf("vp%d, plane_mask:0x%x, primary-id:%d\n",
 		       vp_id, plane_mask,
 		       vop2->vp_plane_mask[vp_id].primary_plane_id);

commit e927f9854ba89ad8730e2f12baa1d63dd05a9918
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 5 10:26:45 2021 +0800

    configs: rk3568: Add ramdisk support
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ic82b9fb77a6d828f6ac094ef16e734d84c5ff579

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index 854682980b..a29c4799d1 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -156,6 +156,8 @@ CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
+CONFIG_DM_RAMDISK=y
+CONFIG_RAMDISK_RO=y
 CONFIG_ROCKCHIP_SDRAM_COMMON=y
 CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE=0
 CONFIG_DM_RESET=y

commit 8b5ec0d8ba211d7e72eb0665129ee25714241aa0
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 5 10:25:14 2021 +0800

    rockchip: Add dm ramdisk compatibility support
    
    Don't rely on CONFIG_DM_RAMDISK since it can be a default
    configuration after disk/part_rkram.c was introduced.
    
    Use dm_ramdisk_is_enabled() to confirm again.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I0488a6d2bddb706b89f195a8174eaf248b873c89

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 7e64a9ab71..94c6e60ad1 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1133,7 +1133,7 @@ config ARCH_ROCKCHIP
 	select SYS_THUMB_BUILD if !ARM64
 	select SPL_SYS_MALLOC_SIMPLE if SPL
 	select DM_GPIO
-	select DM_MMC if !DM_RAMDISK
+	select DM_MMC
 	select DM_SERIAL
 	select DM_SPI
 	select DM_SPI_FLASH
diff --git a/arch/arm/mach-rockchip/rk1808/rk1808.c b/arch/arm/mach-rockchip/rk1808/rk1808.c
index 0e9ada0f43..60f5cbffb8 100644
--- a/arch/arm/mach-rockchip/rk1808/rk1808.c
+++ b/arch/arm/mach-rockchip/rk1808/rk1808.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <android_image.h>
 #include <boot_rkimg.h>
+#include <ramdisk.h>
 #include <asm/io.h>
 #include <asm/arch/grf_rk1808.h>
 #include <asm/arch/hardware.h>
@@ -195,6 +196,15 @@ static int env_fixup_ramdisk_addr_r(void)
 	ulong ramdisk_addr_r;
 	int ret;
 
+	/*
+	 * Don't rely on CONFIG_DM_RAMDISK since it can be a default
+	 * configuration after disk/part_rkram.c was introduced.
+	 *
+	 * This is compatible code.
+	 */
+	if (!dm_ramdisk_is_enabled())
+		return 0;
+
 	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {
 		printf("%s: dev_desc is NULL!\n", __func__);
diff --git a/arch/arm/mach-rockchip/rv1126/rv1126.c b/arch/arm/mach-rockchip/rv1126/rv1126.c
index 03c20fd616..a333ff98ef 100644
--- a/arch/arm/mach-rockchip/rv1126/rv1126.c
+++ b/arch/arm/mach-rockchip/rv1126/rv1126.c
@@ -4,6 +4,7 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 #include <common.h>
+#include <ramdisk.h>
 #include <asm/io.h>
 #include <asm/arch/boot_mode.h>
 #include <asm/arch/hardware.h>
@@ -548,6 +549,17 @@ int arch_cpu_init(void)
 #if defined(CONFIG_SPL_BUILD) || defined(CONFIG_DM_RAMDISK)
 	int delay;
 
+	/*
+	 * Don't rely on CONFIG_DM_RAMDISK since it can be a default
+	 * configuration after disk/part_rkram.c was introduced.
+	 *
+	 * This is compatible code.
+	 */
+  #ifndef CONFIG_SPL_BUILD
+	if (!dm_ramdisk_is_enabled())
+		return 0;
+  #endif
+
 	/* write BOOT_WATCHDOG to boot mode register, if reset by wdt */
 	if (readl(PMUGRF_RSTFUNC_STATUS) & WDT_RESET_SRC) {
 		writel(BOOT_WATCHDOG, CONFIG_ROCKCHIP_BOOT_MODE_REG);
diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index 4103342d42..e5b83682e1 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -113,11 +113,6 @@
 	"name=security,size=2M,uuid=${uuid_gpt_security};" \
 	"name=userdata,size=-,uuid=${uuid_gpt_userdata};\0"
 
-#ifdef CONFIG_DM_RAMDISK
-#define RKIMG_DET_BOOTDEV \
-	"rkimg_bootdev=" \
-	"setenv devtype ramdisk; setenv devnum 0; \0"
-#else
 #define RKIMG_DET_BOOTDEV \
 	"rkimg_bootdev=" \
 	"if mmc dev 1 && rkimgtest mmc 1; then " \
@@ -136,8 +131,9 @@
 		"setenv devtype spinand; setenv devnum 0;" \
 	"elif rksfc dev 1; then " \
 		"setenv devtype spinor; setenv devnum 1;" \
+	"else" \
+		"setenv devtype ramdisk; setenv devnum 0;" \
 	"fi; \0"
-#endif
 
 #if defined(CONFIG_AVB_VBMETA_PUBLIC_KEY_VALIDATE)
 #define RKIMG_BOOTCOMMAND			\

commit b5644a8973f0b05edc89989e94dd1f217b78f2ed
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 5 10:24:20 2021 +0800

    ram: dm ramdisk: Select new ram partition driver
    
    Add dm_ramdisk_is_enabled() for runtime judgement for
    compatibility in some place.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I898d91668a244dccab8132b3a32f737563458827

diff --git a/drivers/ram/Kconfig b/drivers/ram/Kconfig
index 2f8b430b2a..e54235cf5e 100644
--- a/drivers/ram/Kconfig
+++ b/drivers/ram/Kconfig
@@ -44,7 +44,7 @@ config DM_RAMDISK
 config RAMDISK_RO
 	bool "Enable read only ramdisk support"
 	depends on DM_RAMDISK
-	select RKPARM_PARTITION
+	select RKRAM_PARTITION
 	help
 	  This enables the read only ramdisk support.
 
diff --git a/drivers/ram/ramdisk-uclass.c b/drivers/ram/ramdisk-uclass.c
index dfa8c3cb9b..54000301ef 100644
--- a/drivers/ram/ramdisk-uclass.c
+++ b/drivers/ram/ramdisk-uclass.c
@@ -5,10 +5,11 @@
 
 #include <common.h>
 #include <dm.h>
+#include <ramdisk.h>
 #include <dm/device-internal.h>
 #include <dm/lists.h>
 #include <dm/root.h>
-#include <ramdisk.h>
+#include <asm/arch/rk_atags.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -57,6 +58,11 @@ static ulong ramdisk_berase(struct udevice *dev,
 	return ops->erase(desc, start, blkcnt);
 }
 
+int dm_ramdisk_is_enabled(void)
+{
+	return (atags_is_available() && atags_get_tag(ATAG_RAM_PARTITION));
+}
+
 static const struct blk_ops ramdisk_blk_ops = {
 	.read	= ramdisk_bread,
 #ifndef CONFIG_SPL_BUILD
diff --git a/include/ramdisk.h b/include/ramdisk.h
index 3f5df7043b..a06dca8ac9 100644
--- a/include/ramdisk.h
+++ b/include/ramdisk.h
@@ -45,4 +45,6 @@ struct ramdisk_ops {
 	ulong (*erase)(struct blk_desc *desc, lbaint_t start, lbaint_t blkcnt);
 };
 
+int dm_ramdisk_is_enabled(void);
+
 #endif /* __RAMDISK_H__ */

commit 432628e4eca81c522e5c8aaa68352c3219e276e3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jul 2 17:39:12 2021 +0800

    disk: rkparm: Remove ram partition support
    
    Ram partition is supported in disk/part_rkram.c
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I847df68d2ae7c7d94f4b7274e2c6788030a2c2c2

diff --git a/disk/part_rkparm.c b/disk/part_rkparm.c
index 15ec243852..cf4618371b 100644
--- a/disk/part_rkparm.c
+++ b/disk/part_rkparm.c
@@ -106,7 +106,7 @@ static int rkparm_param_parse(char *param, struct list_head *parts_head,
 	return 0;
 }
 
-static int rkparm_init_param_from_storage(struct blk_desc *dev_desc,
+static int rkparm_init_param(struct blk_desc *dev_desc,
 					  struct list_head *parts_head)
 {
 	struct rkparm_param *param;
@@ -131,91 +131,6 @@ static int rkparm_init_param_from_storage(struct blk_desc *dev_desc,
 	return rkparm_param_parse(param->params, parts_head, dev_desc);
 }
 
-#if defined(CONFIG_ROCKCHIP_PRELOADER_ATAGS) && defined(CONFIG_DM_RAMDISK)
-static int rkparm_init_param_from_atags(struct blk_desc *dev_desc,
-					struct list_head *parts_head)
-{
-	struct rkparm_part *part;
-	struct tag *t;
-	u64 start, size;
-	int i, len;
-
-	if (!atags_is_available()) {
-		debug("%s: can't find ATAGS\n", __func__);
-		return -ENODATA;
-	}
-
-	t = atags_get_tag(ATAG_RAM_PARTITION);
-	if (!t) {
-		debug("%s: can't find ATAGS ramdisk partition\n", __func__);
-		return -ENODATA;
-	}
-
-	INIT_LIST_HEAD(parts_head);
-
-	for (i = 0; i < t->u.ram_part.count; i++) {
-		part = malloc(sizeof(*part));
-		if (!part) {
-			printf("%s: out of memory\n", __func__);
-			break;
-		}
-
-		len = strlen(t->u.ram_part.part[i].name) + 1;
-		memcpy((char *)&part->name,
-		       (char *)&t->u.ram_part.part[i].name, len);
-
-		start = t->u.ram_part.part[i].start;
-		size = t->u.ram_part.part[i].size;
-
-		if (!IS_ALIGNED(start, dev_desc->blksz)) {
-			printf("%s: '%s' addr(0x%llx) is not %ld byte aligned\n",
-			       __func__, part->name, start, dev_desc->blksz);
-			return -EINVAL;
-		} else if (!IS_ALIGNED(size, dev_desc->blksz)) {
-			printf("%s: '%s' size(0x%llx) is not %ld byte aligned\n",
-			       __func__, part->name, size, dev_desc->blksz);
-			return -EINVAL;
-		}
-
-		/* Convert bytes to blksz */
-		part->start = start / dev_desc->blksz;
-		part->size = size / dev_desc->blksz;
-		list_add_tail(&part->node, parts_head);
-
-		debug("%s: name=%s, start=0x%lx, size=0x%lx, blksz=0x%lx\n",
-		      __func__, part->name, part->start,
-		      part->size, dev_desc->blksz);
-	}
-
-	dev_num = ((dev_desc->if_type << 8) + dev_desc->devnum);
-
-	return 0;
-}
-#endif
-
-static int rkparm_init_param(struct blk_desc *dev_desc,
-			     struct list_head *parts_head)
-{
-	int ret;
-
-	ret = rkparm_init_param_from_storage(dev_desc, parts_head);
-	if (ret) {
-		debug("%s: failed to init param from storage\n", __func__);
-#if defined(CONFIG_ROCKCHIP_PRELOADER_ATAGS) && defined(CONFIG_DM_RAMDISK)
-		ret = rkparm_init_param_from_atags(dev_desc, parts_head);
-		if (ret) {
-			debug("%s: failed to init param from ram\n", __func__);
-			return ret;
-		}
-#endif
-	}
-
-	if (ret)
-		printf("RKPARM: Invalid parameter part table\n");
-
-	return ret;
-}
-
 static void part_print_rkparm(struct blk_desc *dev_desc)
 {
 	int ret = 0;

commit 18ed0023c913331f7eea8aff7c271b86672c7bf4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 5 09:55:50 2021 +0800

    disk: Add ram partition table support
    
    Partitions info is from rockchip atags.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I8c2613e96f93bd2da8cbee4b970123ef212c987c

diff --git a/disk/Kconfig b/disk/Kconfig
index 3bebfb68d7..324f4464d2 100644
--- a/disk/Kconfig
+++ b/disk/Kconfig
@@ -142,6 +142,14 @@ config RKPARM_PARTITION
 	  Say Y here if you would like to use device under U-Boot which
 	  were partitioned using Rockchip parameter.
 
+config RKRAM_PARTITION
+	bool "Enable Rockchip ram partition table"
+	depends on PARTITIONS && DM_RAMDISK
+	depends on ROCKCHIP_PRELOADER_ATAGS
+	help
+	  Say Y here if you would like to use device under U-Boot which
+	  were partitioned using Rockchip atags.
+
 config SPL_ROCKCHIP_PARTITION
 	bool "Enable Rockchip partition table for SPL"
 
diff --git a/disk/Makefile b/disk/Makefile
index 658bbc1fea..6948dc020f 100644
--- a/disk/Makefile
+++ b/disk/Makefile
@@ -15,4 +15,5 @@ obj-$(CONFIG_$(SPL_)ISO_PARTITION)   += part_iso.o
 obj-$(CONFIG_$(SPL_)AMIGA_PARTITION) += part_amiga.o
 obj-$(CONFIG_$(SPL_)EFI_PARTITION)   += part_efi.o
 obj-$(CONFIG_$(SPL_)RKPARM_PARTITION)   += part_rkparm.o
+obj-$(CONFIG_$(SPL_)RKRAM_PARTITION)   += part_rkram.o
 endif
diff --git a/disk/part_rkram.c b/disk/part_rkram.c
new file mode 100644
index 0000000000..7398b5e64f
--- /dev/null
+++ b/disk/part_rkram.c
@@ -0,0 +1,151 @@
+/*
+ * (C) Copyright 2021 rkparm Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <malloc.h>
+#include <asm/arch/rk_atags.h>
+
+struct rkram_part {
+	char name[PART_NAME_LEN];
+	ulong start;
+	ulong size;
+	struct list_head node;
+};
+
+static LIST_HEAD(parts_head);
+
+static int rkram_part_init(struct blk_desc *dev_desc,
+			   struct list_head *parts_head)
+{
+	struct rkram_part *part;
+	struct tag *t;
+	int i, len;
+	u64 start;
+	u64 size;
+
+	if (!atags_is_available()) {
+		debug("%s: No ATAGS\n", __func__);
+		return -ENODATA;
+	}
+
+	t = atags_get_tag(ATAG_RAM_PARTITION);
+	if (!t) {
+		debug("%s: No ATAGS ramdisk partition\n", __func__);
+		return -ENODATA;
+	}
+
+	INIT_LIST_HEAD(parts_head);
+
+	for (i = 0; i < t->u.ram_part.count; i++) {
+		part = malloc(sizeof(*part));
+		if (!part) {
+			printf("%s: No memory\n", __func__);
+			break;
+		}
+
+		len = strlen(t->u.ram_part.part[i].name) + 1;
+		memcpy((char *)&part->name,
+		       (char *)&t->u.ram_part.part[i].name, len);
+		start = t->u.ram_part.part[i].start;
+		size = t->u.ram_part.part[i].size;
+
+		if (!IS_ALIGNED(start, dev_desc->blksz)) {
+			printf("%s: addr 0x%llx is not %ld align\n",
+			       part->name, start, dev_desc->blksz);
+			return -EINVAL;
+		} else if (!IS_ALIGNED(size, dev_desc->blksz)) {
+			printf("%s: size 0x%llx is not %ld align\n",
+			       part->name, size, dev_desc->blksz);
+			return -EINVAL;
+		}
+
+		/* bytes to blksz */
+		part->start = start / dev_desc->blksz;
+		part->size = size / dev_desc->blksz;
+		list_add_tail(&part->node, parts_head);
+
+		debug("%s: name=%s, start=0x%lx, size=0x%lx, blksz=0x%lx\n",
+		      __func__, part->name, part->start,
+		      part->size, dev_desc->blksz);
+	}
+
+	return 0;
+}
+
+static void part_print_rkram_part(struct blk_desc *dev_desc)
+{
+	struct list_head *node;
+	struct rkram_part *p;
+	int i = 0;
+
+	if (list_empty(&parts_head)) {
+		printf("No Partition Table\n");
+		return;
+	}
+
+	printf("Part\tStart LBA\tSize\t\tName\n");
+	list_for_each(node, &parts_head) {
+		p = list_entry(node, struct rkram_part, node);
+		printf("%3d\t0x%08lx\t0x%08lx\t%s\n", (i++ + 1),
+		       p->start, p->size, p->name);
+	}
+}
+
+static int part_get_info_rkram_part(struct blk_desc *dev_desc, int idx,
+				    disk_partition_t *info)
+{
+	struct rkram_part *p = NULL;
+	struct list_head *node;
+	int part_num = 1;
+
+	if (idx < 1) {
+		printf("Invalid partition no.%d\n", idx);
+		return -EINVAL;
+	}
+
+	if (list_empty(&parts_head))
+		return -EINVAL;
+
+	list_for_each(node, &parts_head) {
+		p = list_entry(node, struct rkram_part, node);
+		if (idx == part_num)
+			break;
+		part_num++;
+	}
+
+	if (part_num < idx) {
+		debug("%s Invalid partition no.%d\n", __func__, idx);
+		return -EINVAL;
+	}
+
+	info->start = p->start;
+	info->size = p->size;
+	info->blksz = dev_desc->blksz;
+
+	sprintf((char *)info->name, "%s", p->name);
+	strcpy((char *)info->type, "U-Boot");
+	info->bootable = 0;
+
+	return 0;
+}
+
+static int part_test_rkram_part(struct blk_desc *dev_desc)
+{
+	return rkram_part_init(dev_desc, &parts_head);
+}
+
+/*
+ * Add an 'a_a_' prefix so it comes before 'dos' and after 'a_efi'
+ * in the linker list. We need to check this first.
+ */
+U_BOOT_PART_TYPE(a_a_rkram_part) = {
+	.name		= "RKRAM_PART",
+	.part_type	= PART_TYPE_RKRAM,
+	.max_entries	= RKRAM_ENTRY_NUMBERS,
+	.get_info	= part_get_info_ptr(part_get_info_rkram_part),
+	.print		= part_print_ptr(part_print_rkram_part),
+	.test		= part_test_rkram_part,
+};
diff --git a/include/part.h b/include/part.h
index 69ea046ce7..53806d9673 100644
--- a/include/part.h
+++ b/include/part.h
@@ -30,6 +30,7 @@ struct block_drvr {
 #define PART_TYPE_AMIGA		0x04
 #define PART_TYPE_EFI		0x05
 #define PART_TYPE_RKPARM	0x06
+#define PART_TYPE_RKRAM		0x07
 
 /* maximum number of partition entries supported by search */
 #define DOS_ENTRY_NUMBERS	8
@@ -37,6 +38,8 @@ struct block_drvr {
 #define MAC_ENTRY_NUMBERS	64
 #define AMIGA_ENTRY_NUMBERS	8
 #define RKPARM_ENTRY_NUMBERS	128
+#define RKRAM_ENTRY_NUMBERS	6
+
 /*
  * Type string for U-Boot bootable partitions
  */

commit 7bcb4b0d7ff614358caf88f9f5c6307f424a5748
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jul 2 17:56:19 2021 +0800

    rockchip: board: support reload kernel dtb for bootm
    
    - use resource_populate_dtb() to reload kernel dtb.
    - use resource_traverse_init_list() to init resource
      list from storage if it's empty.
    - not ready to support uImage.
    
    In short: we separate resource list init and kernel
    dtb read.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ic6b87df907de64aceb8c86d8460b6a6e18ff9f26

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 6fd1da89f9..e3ae265779 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -801,6 +801,16 @@ int bootm_board_start(void)
 	return 0;
 }
 
+int bootm_image_populate_dtb(void *img)
+{
+	if ((gd->flags & GD_FLG_KDTB_READY) && !gd->fdt_blob_kern)
+		sysmem_free((phys_addr_t)gd->fdt_blob);
+	else
+		gd->fdt_blob = (void *)env_get_ulong("fdt_addr_r", 16, 0);
+
+	return resource_populate_dtb(img, (void *)gd->fdt_blob);
+}
+
 /*
  * Implement it to support CLI command:
  *   - Android: bootm [aosp addr]
@@ -838,12 +848,6 @@ int board_do_bootm(int argc, char * const argv[])
 		hdr = (struct andr_img_hdr *)img;
 		printf("BOOTM: transferring to board Android\n");
 
-#ifdef CONFIG_USING_KERNEL_DTB
-		sysmem_free((phys_addr_t)gd->fdt_blob);
-		/* erase magic */
-		fdt_set_magic((void *)gd->fdt_blob, ~0);
-		gd->fdt_blob = NULL;
-#endif
 		load_addr = env_get_ulong("kernel_addr_r", 16, 0);
 		load_addr -= hdr->page_size;
 		size = android_image_get_end(hdr) - (ulong)hdr;
@@ -851,6 +855,12 @@ int board_do_bootm(int argc, char * const argv[])
 		if (!sysmem_alloc_base(MEM_ANDROID, (ulong)hdr, size))
 			return -ENOMEM;
 
+		ret = bootm_image_populate_dtb(img);
+		if (ret) {
+			printf("bootm can't read dtb\n");
+			return ret;
+		}
+
 		ret = android_image_memcpy_separate(hdr, &load_addr);
 		if (ret) {
 			printf("board do bootm failed, ret=%d\n", ret);
@@ -865,14 +875,22 @@ int board_do_bootm(int argc, char * const argv[])
 #if IMAGE_ENABLE_FIT
 	if (format == IMAGE_FORMAT_FIT) {
 		char boot_cmd[64];
+		int ret;
 
 		printf("BOOTM: transferring to board FIT\n");
+
+		ret = bootm_image_populate_dtb(img);
+		if (ret) {
+			printf("bootm can't read dtb\n");
+			return ret;
+		}
 		snprintf(boot_cmd, sizeof(boot_cmd), "boot_fit %s", argv[1]);
 		return run_command(boot_cmd, 0);
 	}
 #endif
 
 	/* uImage */
+#if 0
 #if defined(CONFIG_IMAGE_FORMAT_LEGACY)
 	if (format == IMAGE_FORMAT_LEGACY &&
 	    image_get_type(img) == IH_TYPE_MULTI) {
@@ -883,7 +901,7 @@ int board_do_bootm(int argc, char * const argv[])
 		return run_command(boot_cmd, 0);
 	}
 #endif
-
+#endif
 	return 0;
 }
 #endif
diff --git a/arch/arm/mach-rockchip/boot_rkimg.c b/arch/arm/mach-rockchip/boot_rkimg.c
index a6fa2a189f..99fb1f668c 100644
--- a/arch/arm/mach-rockchip/boot_rkimg.c
+++ b/arch/arm/mach-rockchip/boot_rkimg.c
@@ -505,55 +505,46 @@ static int rockchip_read_distro_dtb(void *fdt_addr)
 
 int rockchip_read_dtb_file(void *fdt_addr)
 {
-	int hash_size;
-	char *hash;
-	u32 size;
+	int hash_size = 0;
 	int ret = -1;
+	u32 fdt_size;
+	char *hash;
 
-#ifdef CONFIG_ROCKCHIP_FIT_IMAGE
-	if (ret) {
-		hash_size = 0;
-		ret = rockchip_read_fit_dtb(fdt_addr, &hash, &hash_size);
-	}
-#endif
-#ifdef CONFIG_ROCKCHIP_UIMAGE
-	if (ret) {
-		hash_size = 0;
-		ret = rockchip_read_uimage_dtb(fdt_addr, &hash, &hash_size);
-	}
-#endif
+	/* init from storage if resource list is empty */
+	resource_traverse_init_list();
+
+	/* distro */
 #ifdef CONFIG_ROCKCHIP_EARLY_DISTRO_DTB
-	if (ret) {
-		hash_size = 0;
-		ret = rockchip_read_distro_dtb(fdt_addr);
-	}
-#endif
-#ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
-	if (ret) {
-		hash_size = 0;
-		ret = rockchip_read_resource_dtb(fdt_addr, &hash, &hash_size);
+	ret = rockchip_read_distro_dtb(fdt_addr);
+	if (!ret) {
+		if (!sysmem_alloc_base(MEM_FDT, (phys_addr_t)fdt_addr,
+		     ALIGN(fdt_size, RK_BLK_SIZE) + CONFIG_SYS_FDT_PAD))
+			return -ENOMEM;
+
+		return 0;
 	}
 #endif
+	/* others(android/fit/uimage) */
+	ret = rockchip_read_resource_dtb(fdt_addr, &hash, &hash_size);
 	if (ret) {
-		printf("Failed to load DTB\n");
+		printf("Failed to load DTB, ret=%d\n", ret);
 		return ret;
 	}
 
 	if (fdt_check_header(fdt_addr)) {
-		printf("Get a bad DTB file !\n");
+		printf("Invalid DTB magic !\n");
 		return -EBADF;
 	}
 
-	size = fdt_totalsize(fdt_addr);
-
+	fdt_size = fdt_totalsize(fdt_addr);
 #ifdef CONFIG_ROCKCHIP_DTB_VERIFY
-	if (hash_size && fdt_check_hash(fdt_addr, size, hash, hash_size)) {
-		printf("Get a bad hash of DTB !\n");
+	if (hash_size && fdt_check_hash(fdt_addr, fdt_size, hash, hash_size)) {
+		printf("Invalid DTB hash !\n");
 		return -EBADF;
 	}
 #endif
 	if (!sysmem_alloc_base(MEM_FDT, (phys_addr_t)fdt_addr,
-			       ALIGN(size, RK_BLK_SIZE) +
+			       ALIGN(fdt_size, RK_BLK_SIZE) +
 			       CONFIG_SYS_FDT_PAD))
 		return -ENOMEM;
 
diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index c5dd2142eb..d8835587d7 100644
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -16,6 +16,7 @@
 #include <dm/ofnode.h>
 #include <linux/list.h>
 #include <asm/arch/fit.h>
+#include <asm/arch/uimage.h>
 #include <asm/arch/resource_img.h>
 
 DECLARE_GLOBAL_DATA_PTR;

commit 8b233050cdc51a7cacf954cb4c12d5b56939c23a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jul 2 17:29:59 2021 +0800

    rockchip: fit/uimage: only init resource list
    
    Don't read kernel dtb in its internal code, only be
    responsible to init resource list.
    
    kernel dtb can only be read by: rockchip_read_dtb_file().
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ifb38f5b0b7a9297e823f49367f29d618ae3c086e

diff --git a/arch/arm/include/asm/arch-rockchip/fit.h b/arch/arm/include/asm/arch-rockchip/fit.h
index ed3338772a..6d8d8546ae 100644
--- a/arch/arm/include/asm/arch-rockchip/fit.h
+++ b/arch/arm/include/asm/arch-rockchip/fit.h
@@ -14,7 +14,6 @@ void *fit_image_load_bootables(ulong *size);
 
 int fit_image_pre_process(const void *fit);
 int fit_image_fail_process(const void *fit);
-
-int rockchip_read_fit_dtb(void *fdt_addr, char **hash, int *hash_size);
+int fit_image_init_resource(void);
 
 #endif
diff --git a/arch/arm/include/asm/arch-rockchip/uimage.h b/arch/arm/include/asm/arch-rockchip/uimage.h
index 9d84f90efa..f4093485c7 100644
--- a/arch/arm/include/asm/arch-rockchip/uimage.h
+++ b/arch/arm/include/asm/arch-rockchip/uimage.h
@@ -12,7 +12,7 @@
 void *uimage_load_bootables(void);
 int uimage_sysmem_free_each(image_header_t *img, u32 ramdisk_sz);
 int uimage_sysmem_reserve_each(image_header_t *hdr, u32 *ramdisk_sz);
-int rockchip_read_uimage_dtb(void *fdt_addr, char **hash, int *hash_size);
+int uimage_init_resource(void);
 
 #endif
 
diff --git a/arch/arm/mach-rockchip/fit.c b/arch/arm/mach-rockchip/fit.c
index 8d29817704..b202fda55b 100644
--- a/arch/arm/mach-rockchip/fit.c
+++ b/arch/arm/mach-rockchip/fit.c
@@ -322,13 +322,6 @@ static int fit_image_load_resource(const void *fit, struct blk_desc *dev_desc,
 	return fit_image_load_one(fit, dev_desc, part, FIT_MULTI_PROP,
 				  data, IS_ENABLED(CONFIG_FIT_SIGNATURE));
 }
-
-#else
-static int fit_image_load_fdt(const void *fit, struct blk_desc *dev_desc,
-			      disk_partition_t *part, void *data)
-{
-	return fit_image_load_one(fit, dev_desc, part, FIT_FDT_PROP, data, 1);
-}
 #endif
 
 /* Calculate what we really need */
@@ -410,16 +403,9 @@ static void fit_msg(const void *fit)
 	FIT_I("%ssigned, %sconf required\n",
 	      fit_is_signed(fit, gd_fdt_blob()) ? "" : "no ",
 	      fit_sig_require_conf(fit, gd_fdt_blob()) ? "" : "no ");
-
-#ifndef CONFIG_ROCKCHIP_RESOURCE_IMAGE
-	int noffset;
-
-	noffset = fit_default_conf_get_node(fit, FIT_FDT_PROP);
-	printf("DTB: %s\n", fdt_get_name(fit, noffset, NULL));
-#endif
 }
 
-int rockchip_read_fit_dtb(void *fdt_addr, char **hash, int *hash_size)
+int fit_image_init_resource(void)
 {
 	int conf_noffset __maybe_unused;
 	ulong rsce __maybe_unused;
@@ -476,14 +462,6 @@ int rockchip_read_fit_dtb(void *fdt_addr, char **hash, int *hash_size)
 		FIT_I("Failed to create resource list\n");
 		goto out;
 	}
-
-	ret = rockchip_read_resource_dtb(fdt_addr, hash, hash_size);
-#else
-	ret = fit_image_load_fdt(fit, dev_desc, &part, fdt_addr);
-	if (ret) {
-		FIT_I("Failed to load fdt\n");
-		goto out;
-	}
 #endif
 
 	fit_msg(fit);
@@ -492,3 +470,4 @@ out:
 
 	return ret;
 }
+
diff --git a/arch/arm/mach-rockchip/uimage.c b/arch/arm/mach-rockchip/uimage.c
index db89266577..e805b12748 100644
--- a/arch/arm/mach-rockchip/uimage.c
+++ b/arch/arm/mach-rockchip/uimage.c
@@ -183,7 +183,7 @@ int uimage_sysmem_free_each(image_header_t *img, u32 ramdisk_sz)
 	return 0;
 }
 
-int rockchip_read_uimage_dtb(void *fdt_addr, char **hash, int *hash_size)
+int uimage_init_resource(void)
 {
 	struct blk_desc *dev_desc;
 	disk_partition_t part;
@@ -194,8 +194,6 @@ int rockchip_read_uimage_dtb(void *fdt_addr, char **hash, int *hash_size)
 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
 	ulong dst;
 	int idx = 3;
-#else
-	int idx = 2;
 #endif
 	int ret;
 
@@ -224,10 +222,12 @@ int rockchip_read_uimage_dtb(void *fdt_addr, char **hash, int *hash_size)
 	free(hdr);
 
 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
+	ulong fdt_addr;
+
 	/* reserve enough space before fdt */
+	fdt_addr = env_get_ulong("fdt_addr_r", 16, 0);
 	dst = (ulong)fdt_addr -
 		   ALIGN(size, dev_desc->blksz) - CONFIG_SYS_FDT_PAD;
-
 	ret = uimage_load_one(dev_desc, &part, offset, size, (void *)dst);
 	if (ret) {
 		UIMG_I("Failed to load resource file, ret=%d\n", ret);
@@ -243,17 +243,7 @@ int rockchip_read_uimage_dtb(void *fdt_addr, char **hash, int *hash_size)
 		UIMG_I("Failed to create resource list, ret=%d\n", ret);
 		return ret;
 	}
-
-	printf("Found DTB in uImage.%d\n", idx);
-	ret = rockchip_read_resource_dtb(fdt_addr, hash, hash_size);
-#else
-	printf("DTB(uimage.%d): rk-kernel.dtb\n", idx);
-	ret = uimage_load_one(dev_desc, &part, offset, size, fdt_addr);
 #endif
-	if (ret) {
-		UIMG_I("Failed to load fdt, ret=%d\n", ret);
-		return ret;
-	}
 
 	return 0;
 }

commit ea513bf6e4a1a0c546b0e0d646e682771bf1911c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jul 2 17:21:19 2021 +0800

    rockchip: resource: refactor code
    
    Move hw-id and logo reading from resource_img.c to individual file.
    
    resource_populate_dtb(): update resource list by given bootm image,
    and then read the kernel dtb from it.
    
    resource_traverse_init_list(): setup resource list from storage if
    the list is empty.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I306095008fd1c515c863dc6e76417b748e9b0f22

diff --git a/arch/arm/include/asm/arch-rockchip/resource_img.h b/arch/arm/include/asm/arch-rockchip/resource_img.h
index 4ec4ad1996..975e81758e 100644
--- a/arch/arm/include/asm/arch-rockchip/resource_img.h
+++ b/arch/arm/include/asm/arch-rockchip/resource_img.h
@@ -7,6 +7,25 @@
 #ifndef __RESC_IMG_H_
 #define __RESC_IMG_H_
 
+#include <linux/list.h>
+
+#define MAX_FILE_NAME_LEN		220
+#define MAX_HASH_LEN			32
+
+struct resource_file {
+	char		name[MAX_FILE_NAME_LEN];
+	char		hash[MAX_HASH_LEN];
+	uint32_t	hash_size;
+	uint32_t	f_offset;	/* Sector offset */
+	uint32_t	f_size;		/* Bytes */
+	struct list_head link;
+	/* Sector base of resource when ram=false, byte base when ram=true */
+	uint32_t	rsce_base;
+	bool		ram;
+};
+
+extern struct list_head entrys_head;
+
 /*
  * resource_image_check_header - check resource image header
  *
@@ -46,4 +65,41 @@ int rockchip_read_resource_file(void *buf, const char *name, int offset, int len
  * @hash_size: hash value length
  */
 int rockchip_read_resource_dtb(void *fdt_addr, char **hash, int *hash_size);
+
+/*
+ * resource_init_list - init resource list of android image from storage
+ */
+int resource_init_list(void);
+
+/*
+ * resource_replace_entry - replace resource entry, override if find exist one
+ */
+int resource_replace_entry(const char *f_name, uint32_t base,
+			   uint32_t f_offset, uint32_t f_size);
+
+/*
+ * resource_read_logo_bmps() - read logo bmp from "logo" partition
+ */
+int resource_read_logo_bmps(void);
+
+/*
+ * resource_read_hwid_dtb() - read hwid dtb
+ */
+struct resource_file *resource_read_hwid_dtb(void);
+
+/*
+ * resource_is_empty() - return if resource is empty
+ */
+int resource_is_empty(void);
+
+/*
+ * resource_populate_dtb() - read fdt from this image: android/fit.
+ */
+int resource_populate_dtb(void *img, void *fdt);
+
+/*
+ * resource_traverse_init_list() - traverse all image(android/fit/uimage)
+ */
+int resource_traverse_init_list(void);
+
 #endif
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index cd7e01dd18..467f1986f2 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -46,7 +46,8 @@ obj-$(CONFIG_ROCKCHIP_FIT_IMAGE) += fit.o
 obj-$(CONFIG_ROCKCHIP_UIMAGE) += uimage.o
 obj-$(CONFIG_ROCKCHIP_SMCCC) += rockchip_smccc.o
 obj-$(CONFIG_ROCKCHIP_VENDOR_PARTITION) += vendor.o
-obj-$(CONFIG_ROCKCHIP_RESOURCE_IMAGE) += resource_img.o
+obj-$(CONFIG_ROCKCHIP_RESOURCE_IMAGE) += resource_img.o resource_logo.o
+obj-$(CONFIG_ROCKCHIP_HWID_DTB) += resource_hwid.o
 obj-$(CONFIG_ROCKCHIP_DEBUGGER) += rockchip_debugger.o
 obj-$(CONFIG_FPGA_ROCKCHIP) += fpga.o
 endif
diff --git a/arch/arm/mach-rockchip/resource_hwid.c b/arch/arm/mach-rockchip/resource_hwid.c
new file mode 100644
index 0000000000..36b93e5cae
--- /dev/null
+++ b/arch/arm/mach-rockchip/resource_hwid.c
@@ -0,0 +1,293 @@
+/*
+ * (C) Copyright 2021 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#include <common.h>
+#include <adc.h>
+#include <asm/io.h>
+#include <dm/ofnode.h>
+#include <asm/arch/resource_img.h>
+
+#define is_digit(c)		((c) >= '0' && (c) <= '9')
+#define is_abcd(c)		((c) >= 'a' && (c) <= 'd')
+#define is_equal(c)		((c) == '=')
+#define KEY_WORDS_ADC_CTRL	"#_"
+#define KEY_WORDS_ADC_CH	"_ch"
+#define KEY_WORDS_GPIO		"#gpio"
+#define MAX_ADC_CH_NR		10
+#define MAX_GPIO_NR		10
+#define DTB_SUFFIX		".dtb"
+
+static fdt_addr_t gpio_base_addr[MAX_GPIO_NR];
+static uint32_t gpio_record[MAX_GPIO_NR];
+static int adc_record[MAX_ADC_CH_NR];
+
+#ifdef CONFIG_ROCKCHIP_GPIO_V2
+#define GPIO_SWPORT_DDR		0x08
+#define GPIO_EXT_PORT		0x70
+#define WMSK_SETBIT(n)		(n << 16 | n)
+#define WMSK_CLRBIT(n)		(n << 16)
+#define REG_PLUS4(off, n)	(off + (n >= BIT(16) ? 4 : 0))
+#define BIT_SUB16(n)		(n >= BIT(16) ? (n >> 16) : n)
+static int gpio_read(fdt_addr_t gpio_addr, int gpio_bank, int gpio_pin)
+{
+	uint32_t off, bit;
+
+	bit = gpio_bank * 8 + gpio_pin;
+	off = REG_PLUS4(GPIO_SWPORT_DDR, bit);
+	bit = BIT_SUB16(bit);
+	writel(WMSK_CLRBIT(bit), gpio_addr + off);
+
+	return readl(gpio_addr + GPIO_EXT_PORT);
+}
+
+#else
+#define GPIO_SWPORT_DDR		0x04
+#define GPIO_EXT_PORT		0x50
+static int gpio_read(fdt_addr_t gpio_addr, int gpio_bank, int gpio_pin)
+{
+	uint32_t val;
+
+	val = readl(gpio_addr + GPIO_SWPORT_DDR);
+	val &= ~(1 << (gpio_bank * 8 + gpio_pin));
+	writel(val, gpio_addr + GPIO_SWPORT_DDR);
+
+	return readl(gpio_addr + GPIO_EXT_PORT);
+}
+#endif
+
+static int gpio_parse_base_address(fdt_addr_t *gpio_base_addr)
+{
+	static int initialized;
+	ofnode parent, node;
+	int idx = 0;
+
+	if (initialized)
+		return 0;
+
+	parent = ofnode_path("/pinctrl");
+	if (!ofnode_valid(parent)) {
+		debug("   - No pinctrl node\n");
+		return -EINVAL;
+	}
+
+	ofnode_for_each_subnode(node, parent) {
+		if (!ofnode_get_property(node, "gpio-controller", NULL)) {
+			debug("   - No gpio controller node\n");
+			continue;
+		}
+		gpio_base_addr[idx] = ofnode_get_addr(node);
+		debug("   - gpio%d: 0x%x\n", idx, (uint32_t)gpio_base_addr[idx]);
+		idx++;
+	}
+
+	if (idx == 0) {
+		debug("   - parse gpio address failed\n");
+		return -EINVAL;
+	}
+
+	initialized = 1;
+
+	return 0;
+}
+
+static void hwid_init_data(void)
+{
+	memset(adc_record, 0, sizeof(adc_record));
+	memset(gpio_record, 0, sizeof(gpio_record));
+	memset(gpio_base_addr, 0, sizeof(gpio_base_addr));
+}
+
+/*
+ * How to use ?
+ *
+ * 1. Pack dtbs into resource.img, dtb file name:
+ *    - End with: ".dtb"
+ *    - Pattern: ...#_[controller]_ch[channel]=[value]...dtb
+ *	    @controller: adc controller name in dts, eg. "saradc", ...;
+ *	    @channel: adc channel;
+ *	    @value: adc value;
+ *    - Eg: ...#_saradc_ch1=223#_saradc_ch2=650....dtb
+ *
+ * 2. U-Boot dtsi about adc node:
+ *    - Add "u-boot,dm-pre-reloc;"
+ *    - Set node "okay"
+ */
+static int hwid_adc_find_dtb(const char *file_name)
+{
+	char *cell_name, *adc_tail, *adc_head, *p;
+	int prefix_len, chn_len, len;
+	int found = 0, margin = 30;
+	int ret, channel;
+	char dev_name[32];
+	char adc_val[10];
+	ulong dtb_adc;
+	u32 raw_adc;
+
+	debug("[HW-ADC]: %s\n", file_name);
+
+	chn_len = strlen(KEY_WORDS_ADC_CH);
+	prefix_len = strlen(KEY_WORDS_ADC_CTRL);
+	cell_name = strstr(file_name, KEY_WORDS_ADC_CTRL);
+	while (cell_name) {
+		/* Parse adc controller name */
+		adc_tail = strstr(cell_name, KEY_WORDS_ADC_CH);
+		adc_head = cell_name + prefix_len;
+		len = adc_tail - adc_head;
+		strlcpy(dev_name, adc_head, len + 1);
+
+		/* Parse adc channel */
+		p = adc_tail + chn_len;
+		if (is_digit(*p) && is_equal(*(p + 1))) {
+			channel = *p - '0';
+		} else {
+			debug("   - invalid format: %s\n", cell_name);
+			return 0;
+		}
+
+		/*
+		 * Read raw adc value
+		 *
+		 * It doesn't need to read adc value every loop, reading once
+		 * is enough. We use adc_record[] to save what we have read, zero
+		 * means not read before.
+		 */
+		if (adc_record[channel] == 0) {
+			ret = adc_channel_single_shot(dev_name, channel, &raw_adc);
+			if (ret) {
+				debug("   - failed to read adc, ret=%d\n", ret);
+				return 0;
+			}
+			adc_record[channel] = raw_adc;
+		}
+
+		/* Parse dtb adc value */
+		p = adc_tail + chn_len + 2;	/* 2: channel and '=' */
+		while (*p && is_digit(*p)) {
+			len++;
+			p++;
+		}
+		strlcpy(adc_val, adc_tail + chn_len + 2, len + 1);
+		dtb_adc = simple_strtoul(adc_val, NULL, 10);
+		found = (abs(dtb_adc - adc_record[channel]) <= margin) ? 1 : 0;
+		debug("   - dev=%s, channel=%d, dtb_adc=%ld, read=%d, found=%d\n",
+		      dev_name, channel, dtb_adc, adc_record[channel], found);
+		if (!found)
+			break;
+		cell_name = strstr(p, KEY_WORDS_ADC_CTRL);
+
+	}
+
+	return found;
+}
+
+/*
+ * How to use ?
+ *
+ * 1. Pack dtbs into resource.img, dtb file name:
+ *    - End with: ".dtb"
+ *    - Pattern: ...#gpio[pin]=[level]...dtb
+ *	     @pin: gpio name, eg. 0a2 means GPIO0A2
+ *	     @level: gpio level, 0 or 1
+ *    - Eg: ...#gpio0a6=1#gpio1c2=0....dtb
+ *
+ * 2. U-Boot dtsi about gpio node:
+ *    - Add "u-boot,dm-pre-reloc;" for [all] gpio node;
+ *    - Set all gpio node "disabled" (We just want their property);
+ */
+static int hwid_gpio_find_dtb(const char *file_name)
+{
+	uint8_t port, pin, bank, lvl, val;
+	char *cell_name, *p;
+	int ret, prefix_len;
+	int found = 0;
+	u32 bit;
+
+	debug("[HW-GPIO]: %s\n", file_name);
+
+	if (gpio_base_addr[0] == 0) {
+		ret = gpio_parse_base_address(gpio_base_addr);
+		if (ret) {
+			debug("[HW-GPIO]: Can't parse gpio base, ret=%d\n", ret);
+			return 0;
+		}
+	}
+
+	prefix_len = strlen(KEY_WORDS_GPIO);
+	cell_name = strstr(file_name, KEY_WORDS_GPIO);
+	while (cell_name) {
+		p = cell_name + prefix_len;
+
+		/* Invalid format ? */
+		if (!(is_digit(*(p + 0)) && is_abcd(*(p + 1)) &&
+		      is_digit(*(p + 2)) && is_equal(*(p + 3)) &&
+		      is_digit(*(p + 4)))) {
+			debug("   - invalid format: %s\n", cell_name);
+			return 0;
+		}
+
+		/* Read gpio value */
+		port = *(p + 0) - '0';
+		bank = *(p + 1) - 'a';
+		pin  = *(p + 2) - '0';
+		lvl  = *(p + 4) - '0';
+
+		/*
+		 * It doesn't need to read gpio value every loop, reading once
+		 * is enough. We use gpio_record[] to save what we have read, zero
+		 * means not read before.
+		 */
+		if (gpio_record[port] == 0) {
+			if (!gpio_base_addr[port]) {
+				debug("   - can't find gpio%d base\n", port);
+				return 0;
+			}
+			gpio_record[port] =
+				gpio_read(gpio_base_addr[port], bank, pin);
+		}
+
+		/* Verify result */
+		bit = bank * 8 + pin;
+		val = gpio_record[port] & (1 << bit) ? 1 : 0;
+		found = (val == !!lvl) ? 1 : 0;
+		debug("   - gpio%d%c%d=%d, read=%d, found=%d\n",
+		      port, bank + 'a', pin, lvl, val, found);
+		if (!found)
+			break;
+		cell_name = strstr(p, KEY_WORDS_GPIO);
+	}
+
+	return found;
+}
+
+struct resource_file *resource_read_hwid_dtb(void)
+{
+	struct resource_file *file;
+	struct list_head *node;
+
+	hwid_init_data();
+
+	if (list_empty(&entrys_head)) {
+		if (resource_init_list())
+			return NULL;
+	}
+
+	list_for_each(node, &entrys_head) {
+		file = list_entry(node, struct resource_file, link);
+		if (!strstr(file->name, DTB_SUFFIX))
+			continue;
+
+		if (strstr(file->name, KEY_WORDS_ADC_CTRL) &&
+		    strstr(file->name, KEY_WORDS_ADC_CH) &&
+		    hwid_adc_find_dtb(file->name)) {
+			return file;
+		} else if (strstr(file->name, KEY_WORDS_GPIO) &&
+			   hwid_gpio_find_dtb(file->name)) {
+			return file;
+		}
+	}
+
+	return NULL;
+}
+
diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index a87bbc5b2c..c5dd2142eb 100644
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -15,6 +15,7 @@
 #include <asm/unaligned.h>
 #include <dm/ofnode.h>
 #include <linux/list.h>
+#include <asm/arch/fit.h>
 #include <asm/arch/resource_img.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -98,19 +99,7 @@ struct resource_entry {
 	uint32_t	f_size;		/* Bytes */
 };
 
-struct resource_file {
-	char		name[MAX_FILE_NAME_LEN];
-	char		hash[MAX_HASH_LEN];
-	uint32_t	hash_size;
-	uint32_t	f_offset;	/* Sector offset */
-	uint32_t	f_size;		/* Bytes */
-	struct list_head link;
-	/* Sector base of resource when ram=false, byte base when ram=true */
-	uint32_t	rsce_base;
-	bool		ram;
-};
-
-static LIST_HEAD(entrys_head);
+LIST_HEAD(entrys_head);
 
 int resource_image_check_header(void *rsce_hdr)
 {
@@ -136,19 +125,18 @@ int resource_image_check_header(void *rsce_hdr)
 	return ret;
 }
 
-static int add_file_to_list(struct resource_entry *entry,
-			    int rsce_base, bool ram)
+static int add_file_to_list(struct resource_entry *entry, int rsce_base, bool ram)
 {
 	struct resource_file *file;
 
 	if (memcmp(entry->tag, ENTRY_TAG, ENTRY_TAG_SIZE)) {
-		printf("invalid entry tag\n");
+		debug("invalid entry tag\n");
 		return -ENOENT;
 	}
 
 	file = malloc(sizeof(*file));
 	if (!file) {
-		printf("out of memory\n");
+		debug("out of memory\n");
 		return -ENOMEM;
 	}
 
@@ -160,15 +148,14 @@ static int add_file_to_list(struct resource_entry *entry,
 	file->ram = ram;
 	memcpy(file->hash, entry->hash, entry->hash_size);
 	list_add_tail(&file->link, &entrys_head);
-
-	debug("entry: %p, %18s, base: 0x%08x, offset: 0x%08x, size: 0x%08x\n",
+	debug("ENTRY: addr: %p, name: %18s, base: 0x%08x, offset: 0x%08x, size: 0x%08x\n",
 	      entry, file->name, file->rsce_base, file->f_offset, file->f_size);
 
 	return 0;
 }
 
-static int replace_resource_entry(const char *f_name, uint32_t base,
-				  uint32_t f_offset, uint32_t f_size)
+int resource_replace_entry(const char *f_name, uint32_t base,
+			   uint32_t f_offset, uint32_t f_size)
 {
 	struct resource_entry *entry;
 	struct resource_file *file;
@@ -203,77 +190,6 @@ static int replace_resource_entry(const char *f_name, uint32_t base,
 	return 0;
 }
 
-static int read_bmp(struct blk_desc *dev_desc, const char *name,
-		    disk_partition_t *part, uint32_t offset,
-		    uint32_t *size)
-{
-	struct bmp_header *header;
-	u32 blk_start, blk_offset;
-	u32 filesz;
-	int ret;
-
-	blk_offset = DIV_ROUND_UP(offset, dev_desc->blksz);
-	blk_start = part->start + blk_offset;
-	header = memalign(ARCH_DMA_MINALIGN, dev_desc->blksz);
-	if (!header) {
-		ret = -ENOMEM;
-		goto out;
-	}
-
-	if (blk_dread(dev_desc, blk_start, 1, header) != 1) {
-		ret = -EIO;
-		goto out;
-	}
-
-	if (header->signature[0] != 'B' || header->signature[1] != 'M') {
-		ret = -EINVAL;
-		goto out;
-	}
-
-	filesz = get_unaligned_le32(&header->file_size);
-	ret = replace_resource_entry(name, blk_start, blk_offset, filesz);
-	if (!ret) {
-		printf("LOGO: %s\n", name);
-		if (size)
-			*size = filesz;
-	}
-out:
-	free(header);
-
-	return ret;
-}
-
-/*
- * Add logo.bmp and logo_kernel.bmp from "logo" parititon
- *
- * Provide a "logo" partition for user to store logo.bmp and
- * logo_kernel.bmp, so that the user can update them from
- * kernel or user-space dynamically.
- *
- * "logo" partition layout, do not change order:
- *
- *   |----------------------| 0x00
- *   | raw logo.bmp	    |
- *   |----------------------| N*512-byte aligned
- *   | raw logo_kernel.bmp  |
- *   |----------------------|
- *
- * N: the sector count of logo.bmp
- */
-static int read_logo_bmps(struct blk_desc *dev_desc)
-{
-	disk_partition_t part;
-	u32 filesz;
-
-	if (part_get_info_by_name(dev_desc, PART_LOGO, &part) < 0)
-		return -ENODEV;
-
-	if (!read_bmp(dev_desc, "logo.bmp", &part, 0, &filesz))
-		read_bmp(dev_desc, "logo_kernel.bmp", &part, filesz, NULL);
-
-	return 0;
-}
-
 int resource_create_ram_list(struct blk_desc *dev_desc, void *rsce_hdr)
 {
 	struct resource_img_hdr *hdr = rsce_hdr;
@@ -287,6 +203,7 @@ int resource_create_ram_list(struct blk_desc *dev_desc, void *rsce_hdr)
 		goto out;
 	}
 
+	list_del_init(&entrys_head);
 	data = (void *)((ulong)hdr + hdr->c_offset * dev_desc->blksz);
 	for (e_num = 0; e_num < hdr->e_nums; e_num++) {
 		size = e_num * hdr->e_blks * dev_desc->blksz;
@@ -294,7 +211,7 @@ int resource_create_ram_list(struct blk_desc *dev_desc, void *rsce_hdr)
 		add_file_to_list(entry, (ulong)hdr, true);
 	}
 out:
-	read_logo_bmps(dev_desc);
+	resource_read_logo_bmps();
 
 	return ret;
 }
@@ -325,7 +242,7 @@ static int resource_create_list(struct blk_desc *dev_desc, int rsce_base)
 			goto err;
 		} else {
 			free(hdr);
-			return replace_resource_entry(DTB_FILE, rsce_base,
+			return resource_replace_entry(DTB_FILE, rsce_base,
 						      0, fdt_totalsize(hdr));
 		}
 	}
@@ -360,7 +277,7 @@ err:
 	if (hdr)
 		free(hdr);
 
-	read_logo_bmps(dev_desc);
+	resource_read_logo_bmps();
 
 	return ret;
 }
@@ -496,7 +413,7 @@ finish:
  * 2. Create resource files list(addition: add logo bmps)
  * 3. Add dtb from android v2 dtb pos, override the old one from resource file
  */
-static int init_resource_list(void)
+int resource_init_list(void)
 {
 	struct andr_img_hdr *hdr = NULL;
 	struct blk_desc *dev_desc;
@@ -518,13 +435,18 @@ static int init_resource_list(void)
 	return read_dtb_from_android(dev_desc, hdr, rsce_base);
 }
 
+int resource_is_empty(void)
+{
+	return list_empty(&entrys_head);
+}
+
 static struct resource_file *get_file_info(const char *name)
 {
 	struct resource_file *file;
 	struct list_head *node;
 
 	if (list_empty(&entrys_head)) {
-		if (init_resource_list())
+		if (resource_init_list())
 			return NULL;
 	}
 
@@ -544,8 +466,7 @@ static struct resource_file *get_file_info(const char *name)
  * @offset: blocks offset in the file, 1 block = 512 bytes
  * @len: the size(by bytes) of file to read.
  */
-int rockchip_read_resource_file(void *buf, const char *name,
-				int offset, int len)
+int rockchip_read_resource_file(void *buf, const char *name, int offset, int len)
 {
 	struct resource_file *file;
 	struct blk_desc *dev_desc;
@@ -584,326 +505,105 @@ int rockchip_read_resource_file(void *buf, const char *name,
 	return ret;
 }
 
-#ifdef CONFIG_ROCKCHIP_HWID_DTB
-#define is_digit(c)		((c) >= '0' && (c) <= '9')
-#define is_abcd(c)		((c) >= 'a' && (c) <= 'd')
-#define is_equal(c)		((c) == '=')
-
-#define KEY_WORDS_ADC_CTRL	"#_"
-#define KEY_WORDS_ADC_CH	"_ch"
-#define KEY_WORDS_GPIO		"#gpio"
-#define MAX_ADC_CH_NR		10
-#define MAX_GPIO_NR		10
-
-#ifdef CONFIG_ROCKCHIP_GPIO_V2
-#define GPIO_SWPORT_DDR		0x08
-#define GPIO_EXT_PORT		0x70
-#define WMSK_SETBIT(n)		(n << 16 | n)
-#define WMSK_CLRBIT(n)		(n << 16)
-#define REG_PLUS4(off, n)	(off + (n >= BIT(16) ? 4 : 0))
-#define BIT_SUB16(n)		(n >= BIT(16) ? (n >> 16) : n)
-
-static int gpio_read(fdt_addr_t gpio_addr,
-		     int gpio_bank, int gpio_pin)
-{
-	uint32_t offset, bit;
-
-	bit = gpio_bank * 8 + gpio_pin;
-
-	offset = REG_PLUS4(GPIO_SWPORT_DDR, bit);
-	bit = BIT_SUB16(bit);
-	writel(WMSK_CLRBIT(bit), gpio_addr + offset);
-
-	return readl(gpio_addr + GPIO_EXT_PORT);
-}
-
-#else
-#define GPIO_SWPORT_DDR		0x04
-#define GPIO_EXT_PORT		0x50
-
-static int gpio_read(fdt_addr_t gpio_addr,
-		     int gpio_bank, int gpio_pin)
+int rockchip_read_resource_dtb(void *fdt_addr, char **hash, int *hash_size)
 {
-	uint32_t val;
-
-	val = readl(gpio_addr + GPIO_SWPORT_DDR);
-	val &= ~(1 << (gpio_bank * 8 + gpio_pin));
-	writel(val, gpio_addr + GPIO_SWPORT_DDR);
+	struct resource_file *file = NULL;
+	int ret;
 
-	return readl(gpio_addr + GPIO_EXT_PORT);
-}
+#ifdef CONFIG_ROCKCHIP_HWID_DTB
+	file = resource_read_hwid_dtb();
 #endif
+	/* If dtbs matched hardware id(GPIO/ADC) not found, try the default */
+	if (!file)
+		file = get_file_info(DTB_FILE);
 
-/*
- * How to make it works ?
- *
- * 1. pack dtb into rockchip resource.img, require:
- *    (1) file name end with ".dtb";
- *    (2) file name contains key words, like: ...#_[controller]_ch[channel]=[value]...dtb
- *	  @controller: adc controller name in dts, eg. "saradc", ...;
- *	  @channel: adc channel;
- *	  @value: adc value;
- *    eg: ...#_saradc_ch1=223#_saradc_ch2=650....dtb
- *
- * 2. U-Boot dtsi about adc controller node:
- *    (1) enable "u-boot,dm-pre-reloc;";
- *    (2) must set status "okay";
- */
-static int rockchip_read_dtb_by_adc(const char *file_name)
-{
-	static int cached_v[MAX_ADC_CH_NR];
-	int offset_ctrl = strlen(KEY_WORDS_ADC_CTRL);
-	int offset_ch = strlen(KEY_WORDS_ADC_CH);
-	int ret, channel, len = 0, found = 0, margin = 30;
-	char *stradc, *strch, *p;
-	char adc_v_string[10];
-	char dev_name[32];
-	uint32_t raw_adc;
-	ulong dtb_adc;
-
-	debug("%s: %s\n", __func__, file_name);
-
-	/* Invalid format ? */
-	stradc = strstr(file_name, KEY_WORDS_ADC_CTRL);
-	while (stradc) {
-		debug("   - substr: %s\n", stradc);
-
-		/* Parse controller name */
-		strch = strstr(stradc, KEY_WORDS_ADC_CH);
-		len = strch - (stradc + offset_ctrl);
-		strlcpy(dev_name, stradc + offset_ctrl, len + 1);
-
-		/* Parse adc channel */
-		p = strch + offset_ch;
-		if (is_digit(*p) && is_equal(*(p + 1))) {
-			channel = *p - '0';
-		} else {
-			debug("   - invalid format: %s\n", stradc);
-			return -EINVAL;
-		}
-
-		/*
-		 * Read raw adc value
-		 *
-		 * It doesn't need to read adc value every loop, reading once
-		 * is enough. We use cached_v[] to save what we have read, zero
-		 * means not read before.
-		 */
-		if (cached_v[channel] == 0) {
-			ret = adc_channel_single_shot(dev_name,
-						      channel, &raw_adc);
-			if (ret) {
-				debug("   - failed to read adc, ret=%d\n", ret);
-				return ret;
-			}
-			cached_v[channel] = raw_adc;
-		}
-
-		/* Parse dtb adc value */
-		p = strch + offset_ch + 2;	/* 2: channel and '=' */
-		while (*p && is_digit(*p)) {
-			len++;
-			p++;
-		}
-		strlcpy(adc_v_string, strch + offset_ch + 2, len + 1);
-		dtb_adc = simple_strtoul(adc_v_string, NULL, 10);
-
-		if (abs(dtb_adc - cached_v[channel]) <= margin) {
-			found = 1;
-			stradc = strstr(p, KEY_WORDS_ADC_CTRL);
-		} else {
-			found = 0;
-			break;
-		}
-
-		debug("   - parse: controller=%s, channel=%d, dtb_adc=%ld, read=%d %s\n",
-		      dev_name, channel, dtb_adc, cached_v[channel], found ? "(Y)" : "");
-	}
-
-	return found ? 0 : -ENOENT;
-}
-
-static int gpio_parse_base_address(fdt_addr_t *gpio_base_addr)
-{
-	static int initialized;
-	ofnode parent, node;
-	int idx = 0;
-
-	if (initialized)
-		return 0;
-
-	parent = ofnode_path("/pinctrl");
-	if (!ofnode_valid(parent)) {
-		debug("   - Can't find pinctrl node\n");
-		return -EINVAL;
-	}
+	if (!file)
+		return -ENODEV;
 
-	ofnode_for_each_subnode(node, parent) {
-		if (!ofnode_get_property(node, "gpio-controller", NULL)) {
-			debug("   - Not gpio controller node\n");
-			continue;
-		}
-		gpio_base_addr[idx] = ofnode_get_addr(node);
-		debug("   - gpio%d: 0x%x\n", idx, (uint32_t)gpio_base_addr[idx]);
-		idx++;
-	}
+	ret = rockchip_read_resource_file(fdt_addr, file->name, 0, 0);
+	if (ret < 0)
+		return ret;
 
-	if (idx == 0) {
-		debug("   - parse gpio address failed\n");
-		return -EINVAL;
-	}
+	if (fdt_check_header(fdt_addr))
+		return -EBADF;
 
-	initialized = 1;
+	*hash = file->hash;
+	*hash_size = file->hash_size;
+	printf("DTB: %s\n", file->name);
 
 	return 0;
 }
 
-/*
- * How to make it works ?
- *
- * 1. pack dtb into rockchip resource.img, require:
- *    (1) file name end with ".dtb";
- *    (2) file name contains key words, like: ...#gpio[pin]=[value]...dtb
- *	  @pin: gpio name, eg. 0a2 means GPIO0A2;
- *	  @value: gpio level, 0 or 1;
- *    eg: ...#gpio0a6=1#gpio1c2=0....dtb
- *
- * 2. U-Boot dtsi about gpio node:
- *    (1) enable "u-boot,dm-pre-reloc;" for [all] gpio node;
- *    (2) set all gpio status "disabled"(Because we just want their property);
- */
-static int rockchip_read_dtb_by_gpio(const char *file_name)
+int resource_populate_dtb(void *img, void *fdt)
 {
-	static uint32_t cached_v[MAX_GPIO_NR];
-	static fdt_addr_t gpio_base_addr[MAX_GPIO_NR];
-	int ret, found = 0, offset = strlen(KEY_WORDS_GPIO);
-	uint8_t port, pin, bank, lvl, val;
-	char *strgpio, *p;
-	uint32_t bit;
-
-	debug("[*] %s\n", file_name);
-
-	/* Parse gpio address */
-	memset(gpio_base_addr, 0, sizeof(gpio_base_addr));
-	ret = gpio_parse_base_address(gpio_base_addr);
-	if (ret) {
-		debug("   - Can't parse gpio base address: %d\n", ret);
-		return ret;
-	}
-
-	strgpio = strstr(file_name, KEY_WORDS_GPIO);
-	while (strgpio) {
-		debug("   - substr: %s\n", strgpio);
+	struct blk_desc *dev_desc;
+	int format;
+	int ret;
 
-		p = strgpio + offset;
+	format = (genimg_get_format(img));
+#ifdef CONFIG_ANDROID_BOOT_IMAGE
+	if (format == IMAGE_FORMAT_ANDROID) {
+		struct andr_img_hdr *hdr = img;
+		ulong offset;
 
-		/* Invalid format ? */
-		if (!(is_digit(*(p + 0)) && is_abcd(*(p + 1)) &&
-		      is_digit(*(p + 2)) && is_equal(*(p + 3)) &&
-		      is_digit(*(p + 4)))) {
-			debug("   - invalid format: %s\n", strgpio);
-			return -EINVAL;
-		}
+		dev_desc = rockchip_get_bootdev();
+		if (!dev_desc)
+			return -ENODEV;
 
-		/* Read gpio value */
-		port = *(p + 0) - '0';
-		bank = *(p + 1) - 'a';
-		pin  = *(p + 2) - '0';
-		lvl  = *(p + 4) - '0';
-
-		/*
-		 * It doesn't need to read gpio value every loop, reading once
-		 * is enough. We use cached_v[] to save what we have read, zero
-		 * means not read before.
-		 */
-		if (cached_v[port] == 0) {
-			if (!gpio_base_addr[port]) {
-				debug("   - can't find gpio%d base address\n", port);
-				return 0;
-			}
-			cached_v[port] = gpio_read(gpio_base_addr[port], bank, pin);
-			debug("   - gpio-val[%d]: 0x%08x\n", port, cached_v[port]);
-		}
+		offset = hdr->page_size + ALIGN(hdr->kernel_size, hdr->page_size) +
+			ALIGN(hdr->ramdisk_size, hdr->page_size);
+		ret = resource_create_ram_list(dev_desc, (void *)hdr + offset);
+		if (ret)
+			return ret;
 
-		/* Verify result */
-		bit = bank * 8 + pin;
-		val = cached_v[port] & (1 << bit) ? 1 : 0;
-		if (val == !!lvl) {
-			found = 1;
-			strgpio = strstr(p, KEY_WORDS_GPIO);
-		} else {
-			found = 0;
-			debug("   - parse: gpio%d%c%d=%d, read=%d %s\n",
-			      port, bank + 'a', pin, lvl, val, found ? "(Y)" : "(N)");
-			break;
+		return rockchip_read_dtb_file((void *)fdt);
+	}
+#endif
+#if IMAGE_ENABLE_FIT
+	if (format == IMAGE_FORMAT_FIT) {
+		const void *data;
+		size_t size;
+		int noffset;
+
+		noffset = fdt_path_offset(img, "/images/resource");
+		if (noffset < 0)
+			return noffset;
+
+		ret = fit_image_get_data(img, noffset, &data, &size);
+		if (ret < 0)
+			return ret;
+
+		dev_desc = rockchip_get_bootdev();
+		if (!dev_desc)
+			return -ENODEV;
+
+		ret = resource_create_ram_list(dev_desc, (void *)data);
+		if (ret) {
+			printf("resource_create_ram_list fail, ret=%d\n", ret);
+			return ret;
 		}
 
-		debug("   - parse: gpio%d%c%d=%d, read=%d %s\n",
-		      port, bank + 'a', pin, lvl, val, found ? "(Y)" : "(N)");
+		return rockchip_read_dtb_file((void *)fdt);
 	}
+#endif
 
-	debug("   # result: %s\n", found ? "OK" : "Try next one ..");
-
-	return found ? 0 : -ENOENT;
+	return -EINVAL;
 }
 
-/* Get according to hardware id(GPIO/ADC) */
-static struct resource_file *rockchip_read_hwid_dtb(void)
+int resource_traverse_init_list(void)
 {
-	struct resource_file *file;
-	struct list_head *node;
-
-	if (list_empty(&entrys_head)) {
-		if (init_resource_list())
-			return NULL;
-	}
-
-	/* Find dtb file according to hardware id(GPIO/ADC) */
-	list_for_each(node, &entrys_head) {
-		file = list_entry(node, struct resource_file, link);
-		if (!strstr(file->name, ".dtb"))
-			continue;
-
-		if (strstr(file->name, KEY_WORDS_ADC_CTRL) &&
-		    strstr(file->name, KEY_WORDS_ADC_CH) &&
-		    !rockchip_read_dtb_by_adc(file->name)) {
-			return file;
-		} else if (strstr(file->name, KEY_WORDS_GPIO) &&
-			   !rockchip_read_dtb_by_gpio(file->name)) {
-			return file;
-		}
-	}
+	if (!resource_is_empty())
+		return 0;
 
-	return NULL;
-}
+#ifdef CONFIG_ROCKCHIP_FIT_IMAGE
+	if (!fit_image_init_resource())
+		return 0;
 #endif
-
-int rockchip_read_resource_dtb(void *fdt_addr, char **hash, int *hash_size)
-{
-	struct resource_file *file;
-	int ret;
-
-#ifdef CONFIG_ROCKCHIP_HWID_DTB
-	file = rockchip_read_hwid_dtb();
-	/* If dtbs matched hardware id(GPIO/ADC) not found, try the default */
-	if (!file)
-		file = get_file_info(DTB_FILE);
-#else
-	file = get_file_info(DTB_FILE);
+#ifdef CONFIG_ROCKCHIP_UIMAGE
+	if (!uimage_init_resource())
+		return 0;
 #endif
-	if (!file)
-		return -ENODEV;
-
-	ret = rockchip_read_resource_file(fdt_addr, file->name, 0, 0);
-	if (ret < 0)
-		return ret;
-
-	if (fdt_check_header(fdt_addr))
-		return -EBADF;
-
-	*hash = file->hash;
-	*hash_size = file->hash_size;
-	printf("DTB: %s\n", file->name);
+	/* Android image is default supported within resource core */
 
 	return 0;
 }
diff --git a/arch/arm/mach-rockchip/resource_logo.c b/arch/arm/mach-rockchip/resource_logo.c
new file mode 100644
index 0000000000..80ec4701a0
--- /dev/null
+++ b/arch/arm/mach-rockchip/resource_logo.c
@@ -0,0 +1,96 @@
+/*
+ * (C) Copyright 2021 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#include <common.h>
+#include <adc.h>
+#include <boot_rkimg.h>
+#include <bmp_layout.h>
+#include <malloc.h>
+#include <asm/io.h>
+#include <asm/unaligned.h>
+#include <asm/arch/resource_img.h>
+#include <dm/ofnode.h>
+
+static int read_bmp(struct blk_desc *dev_desc, const char *name,
+		    disk_partition_t *part, uint32_t offset,
+		    uint32_t *size)
+{
+	struct bmp_header *header;
+	u32 blk_start, blk_offset;
+	u32 filesz;
+	int ret;
+
+	blk_offset = DIV_ROUND_UP(offset, dev_desc->blksz);
+	blk_start = part->start + blk_offset;
+	header = memalign(ARCH_DMA_MINALIGN, dev_desc->blksz);
+	if (!header) {
+		ret = -ENOMEM;
+		goto out;
+	}
+
+	if (blk_dread(dev_desc, blk_start, 1, header) != 1) {
+		ret = -EIO;
+		goto out;
+	}
+
+	if (header->signature[0] != 'B' || header->signature[1] != 'M') {
+		ret = -EINVAL;
+		goto out;
+	}
+
+	filesz = get_unaligned_le32(&header->file_size);
+	ret = resource_replace_entry(name, blk_start, blk_offset, filesz);
+	if (!ret) {
+		printf("LOGO: %s\n", name);
+		if (size)
+			*size = filesz;
+	}
+out:
+	free(header);
+
+	return ret;
+}
+
+/*
+ * Add logo.bmp and logo_kernel.bmp from "logo" parititon
+ *
+ * Provide a "logo" partition for user to store logo.bmp and
+ * logo_kernel.bmp, so that the user can update them from
+ * kernel or user-space dynamically.
+ *
+ * "logo" partition layout, do not change order:
+ *
+ *   |----------------------| 0x00
+ *   | raw logo.bmp	    |
+ *   |----------------------| N*512-byte aligned
+ *   | raw logo_kernel.bmp  |
+ *   |----------------------|
+ *
+ * N: the sector count of logo.bmp
+ *
+ * How to generate:
+ * 	cat logo.bmp > logo.img && truncate -s %512 logo.img && cat logo_kernel.bmp >> logo.img
+ */
+int resource_read_logo_bmps(void)
+{
+	struct blk_desc *dev_desc;
+	disk_partition_t part;
+	u32 filesz;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("No dev_desc!\n");
+		return -ENODEV;
+	}
+
+	if (part_get_info_by_name(dev_desc, PART_LOGO, &part) < 0)
+		return -ENODEV;
+
+	if (!read_bmp(dev_desc, "logo.bmp", &part, 0, &filesz))
+		read_bmp(dev_desc, "logo_kernel.bmp", &part, filesz, NULL);
+
+	return 0;
+}
+

commit 3fc8bcd2582f32e53b0eaf975ded3e0a50dead41
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jul 1 11:38:59 2021 +0800

    common: fdt: fix kern.dtb cleared by BSS zero operation
    
    BSS section is right after u-boot-nodtb.bin, u-boot fdt should be
    relocated before BSS zero operation.
    
    This is necessary if CONFIG_SKIP_RELOCATE_UBOOT=y.
    
    - relocate the kern.dtb too.
    - correct ALIGN() for u-boot fdt end address but not totalsize.
    - set gd->fdt_blob_kern as NULL if invalid.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I8766e52f50652ed578430b75d4c3da1e4a69a8cf

diff --git a/arch/arm/mach-rockchip/kernel_dtb.c b/arch/arm/mach-rockchip/kernel_dtb.c
index 4aa6de84e9..a838507fa5 100644
--- a/arch/arm/mach-rockchip/kernel_dtb.c
+++ b/arch/arm/mach-rockchip/kernel_dtb.c
@@ -282,7 +282,7 @@ int init_kernel_dtb(void)
 	}
 
 dtb_embed:
-	if (!fdt_check_header(gd->fdt_blob_kern)) {
+	if (gd->fdt_blob_kern) {
 		if (!dtb_check_ok((void *)gd->fdt_blob_kern, (void *)gd->fdt_blob)) {
 			printf("Embedded kernel dtb mismatch this platform!\n");
 			return -EINVAL;
diff --git a/common/board_f.c b/common/board_f.c
index 6ba70ae13f..15a2765baf 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -508,10 +508,21 @@ static int reserve_fdt(void)
 	 * will be relocated with other data.
 	 */
 	if (gd->fdt_blob) {
-		gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
+		u32 extrasize = 0;
 
+		if (gd->fdt_blob_kern)
+			extrasize = fdt_totalsize(gd->fdt_blob_kern);
+		gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + extrasize + 0x1000, 32);
 		gd->start_addr_sp -= gd->fdt_size;
+
+		/* 8-byte align */
+		gd->start_addr_sp -= 8;
+		gd->start_addr_sp &= ~0x7;
 		gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
+
+		if (gd->fdt_blob_kern)
+			gd->fdt_blob_kern = (ulong *)ALIGN((ulong)gd->new_fdt +
+					fdt_totalsize(gd->fdt_blob), 8);
 		debug("Reserving %lu Bytes for FDT at: %08lx\n",
 		      gd->fdt_size, gd->start_addr_sp);
 	}
@@ -689,12 +700,14 @@ static int setup_reloc(void)
 	memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
 
 #ifndef CONFIG_SUPPORT_USBPLUG
-	printf("Relocation Offset: %08lx, fdt: %08lx ",
-	      gd->reloc_off, (ulong)gd->new_fdt);
-  #ifdef CONFIG_USING_KERNEL_DTB
-	if (!fdt_check_header((void *)gd->fdt_blob_kern))
-		printf("kfdt: %08lx", (ulong)gd->fdt_blob_kern);
-  #endif
+	printf("Relocation Offset: %08lx\n", gd->reloc_off);
+
+	printf("Relocation fdt: %08lx - %08lx",  (ulong)gd->new_fdt,
+	       (ulong)gd->new_fdt + fdt_totalsize(gd->fdt_blob));
+	if (gd->fdt_blob_kern) {
+		printf(", kfdt: %08lx - %08lx", (ulong)gd->fdt_blob_kern,
+		  (ulong)gd->fdt_blob_kern + fdt_totalsize(gd->fdt_blob_kern));
+	}
 	puts("\n");
 #endif
 	debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index f6a782d8e2..c7501faa0d 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -1286,8 +1286,10 @@ int fdtdec_setup(void)
 	gd->fdt_blob = (ulong *)&_end;
 
 #    ifdef CONFIG_USING_KERNEL_DTB
-	gd->fdt_blob_kern = (ulong *)((ulong)gd->fdt_blob +
-					ALIGN(fdt_totalsize(gd->fdt_blob), 8));
+	gd->fdt_blob_kern = (ulong *)ALIGN((ulong)gd->fdt_blob +
+				fdt_totalsize(gd->fdt_blob), 8);
+	if (fdt_check_header(gd->fdt_blob_kern))
+		gd->fdt_blob_kern = NULL;
 #    endif
 #  endif
 # elif defined(CONFIG_OF_BOARD)

commit 8f98eecb83835db679ec597b28dadc0673b60bbd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jul 2 15:51:46 2021 +0800

    rockchip: kernel dtb: return success if not find cru node
    
    kernel dtb maybe used as a kind of configure file, only
    a few nodes will be provided.
    
    Example: RK3566 AMP project.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I115a603923dad14e2280532049bcff259dde684c

diff --git a/arch/arm/mach-rockchip/kernel_dtb.c b/arch/arm/mach-rockchip/kernel_dtb.c
index 28ea10dd6f..4aa6de84e9 100644
--- a/arch/arm/mach-rockchip/kernel_dtb.c
+++ b/arch/arm/mach-rockchip/kernel_dtb.c
@@ -245,6 +245,9 @@ static int dtb_check_ok(void *fdt, void *ufdt)
 		}
 	}
 
+	if (!compare[0])
+		return 1;
+
 	if (compare[0] && compare[1])
 		return !memcmp(compare[0], compare[1], strlen(compare[0]));
 

commit b94e00fff325c548178edb28df1ace4e0eb695f5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 5 11:54:24 2021 +0800

    include: global_data: let fdt_blob_kern be a default member
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I9c000541e1a78b948e6f920b8038475d0778fdd6

diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index 52c1f76978..0a0e439688 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -83,10 +83,7 @@ typedef struct global_data {
 #ifdef CONFIG_TIMER
 	struct udevice	*timer;		/* Timer instance for Driver Model */
 #endif
-
-#ifdef CONFIG_USING_KERNEL_DTB
 	const void *fdt_blob_kern;	/* Kernel dtb at the tail of u-boot.bin */
-#endif
 	const void *fdt_blob;		/* Our device tree, NULL if none */
 
 #ifdef CONFIG_USING_KERNEL_DTB

commit 8895aec1c39a28aa54c522a1cb8ebbdf93d54870
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Mon Jul 5 17:44:38 2021 +0800

    drm/rockchip: vop2: add more debug info
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: I91db54a5792df3794c85e72ce0a52c853a1c79a0

diff --git a/drivers/video/drm/rockchip_vop2.c b/drivers/video/drm/rockchip_vop2.c
index da5fe6475e..be6872de94 100644
--- a/drivers/video/drm/rockchip_vop2.c
+++ b/drivers/video/drm/rockchip_vop2.c
@@ -812,6 +812,76 @@ static inline int us_to_vertical_line(struct drm_display_mode *mode, int us)
 	return us * mode->clock / mode->htotal / 1000;
 }
 
+static char* get_output_if_name(u32 output_if, char *name)
+{
+	if (output_if & VOP_OUTPUT_IF_RGB)
+		strcat(name, " RGB");
+	if (output_if & VOP_OUTPUT_IF_BT1120)
+		strcat(name, " BT1120");
+	if (output_if & VOP_OUTPUT_IF_BT656)
+		strcat(name, " BT656");
+	if (output_if & VOP_OUTPUT_IF_LVDS0)
+		strcat(name, " LVDS0");
+	if (output_if & VOP_OUTPUT_IF_LVDS1)
+		strcat(name, " LVDS1");
+	if (output_if & VOP_OUTPUT_IF_MIPI0)
+		strcat(name, " MIPI0");
+	if (output_if & VOP_OUTPUT_IF_MIPI1)
+		strcat(name, " MIPI1");
+	if (output_if & VOP_OUTPUT_IF_eDP0)
+		strcat(name, " eDP0");
+	if (output_if & VOP_OUTPUT_IF_eDP1)
+		strcat(name, " eDP1");
+	if (output_if & VOP_OUTPUT_IF_DP0)
+		strcat(name, " DP0");
+	if (output_if & VOP_OUTPUT_IF_DP1)
+		strcat(name, " DP1");
+	if (output_if & VOP_OUTPUT_IF_HDMI0)
+		strcat(name, " HDMI0");
+	if (output_if & VOP_OUTPUT_IF_HDMI1)
+		strcat(name, " HDMI1");
+
+	return name;
+}
+
+static char *get_plane_name(int plane_id, char *name)
+{
+	switch (plane_id) {
+	case ROCKCHIP_VOP2_CLUSTER0:
+		strcat(name, "Cluster0");
+		break;
+	case ROCKCHIP_VOP2_CLUSTER1:
+		strcat(name, "Cluster1");
+		break;
+	case ROCKCHIP_VOP2_ESMART0:
+		strcat(name, "Esmart0");
+		break;
+	case ROCKCHIP_VOP2_ESMART1:
+		strcat(name, "Esmart1");
+		break;
+	case ROCKCHIP_VOP2_SMART0:
+		strcat(name, "Smart0");
+		break;
+	case ROCKCHIP_VOP2_SMART1:
+		strcat(name, "Smart1");
+		break;
+	case ROCKCHIP_VOP2_CLUSTER2:
+		strcat(name, "Cluster2");
+		break;
+	case ROCKCHIP_VOP2_CLUSTER3:
+		strcat(name, "Cluster3");
+		break;
+	case ROCKCHIP_VOP2_ESMART2:
+		strcat(name, "Esmart2");
+		break;
+	case ROCKCHIP_VOP2_ESMART3:
+		strcat(name, "Esmart3");
+		break;
+	}
+
+	return name;
+}
+
 static bool is_yuv_output(u32 bus_format)
 {
 	switch (bus_format) {
@@ -1393,6 +1463,14 @@ static int rockchip_vop2_init(struct display_state *state)
 	bool dclk_inv;
 	u8 dither_down_en = 0;
 	u8 pre_dither_down_en = 0;
+	char output_type_name[30] = {0};
+
+	printf("VOP update mode to: %dx%d%s%d, type:%s for VP%d\n",
+	       mode->hdisplay, mode->vdisplay,
+	       mode->flags & DRM_MODE_FLAG_INTERLACE ? "i" : "p",
+	       mode->vscan,
+	       get_output_if_name(conn_state->output_if, output_type_name),
+	       cstate->crtc_id);
 
 	vop2_initial(vop2, state);
 	dclk_inv = (mode->flags & DRM_MODE_FLAG_PPIXDATA) ? 0 : 1;
@@ -1713,6 +1791,7 @@ static int rockchip_vop2_set_plane(struct display_state *state)
 	u32 win_offset;
 	u32 cfg_done = CFG_DONE_EN | BIT(cstate->crtc_id);
 	u8 primary_plane_id = vop2->vp_plane_mask[cstate->crtc_id].primary_plane_id;
+	char plane_name[10] = {0};
 
 	win_offset = vop2->data->win_data[primary_plane_id].reg_offset;
 	if (crtc_w > cstate->max_output.width) {
@@ -1776,6 +1855,12 @@ static int rockchip_vop2_set_plane(struct display_state *state)
 			CSC_MODE_SHIFT, csc_mode, false);
 
 	vop2_writel(vop2, RK3568_REG_CFG_DONE, cfg_done);
+
+	printf("VOP VP%d enable %s[%dx%d->%dx%d@%dx%d] fmt[%d] addr[0x%x]\n",
+		cstate->crtc_id, get_plane_name(primary_plane_id, plane_name),
+		src_w, src_h, crtc_w, crtc_h, crtc_x, crtc_y, cstate->format,
+		cstate->dma_addr);
+
 	return 0;
 }
 

commit fd72c52e8d66ca88c3d4ce49b548954e3d381fc8
Author: Guochun Huang <hero.huang@rock-chips.com>
Date:   Mon Jul 5 18:53:31 2021 +0800

     video/drm: combo_phy:  modified phy difference description
    
    Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
    Change-Id: I3ff24bc2d6c5be1f19228364eac77bcdce8de947

diff --git a/drivers/video/drm/inno_video_combo_phy.c b/drivers/video/drm/inno_video_combo_phy.c
index cfeead615d..ce2232ca05 100644
--- a/drivers/video/drm/inno_video_combo_phy.c
+++ b/drivers/video/drm/inno_video_combo_phy.c
@@ -195,9 +195,9 @@
 #define DSI_PHY_STATUS			0xb0
 #define PHY_LOCK			BIT(0)
 
-enum phy_process_type {
-	SMIC40LL,
-	TSMC22ULP,
+enum phy_max_rate {
+	MAX_1GHZ,
+	MAX_2_5GHZ,
 };
 
 struct inno_video_mipi_dphy_timing {
@@ -212,11 +212,11 @@ struct inno_video_mipi_dphy_timing {
 struct inno_video_mipi_dphy_info {
 	const struct inno_video_mipi_dphy_timing *inno_mipi_dphy_timing_table;
 	const unsigned int num_timings;
-	enum phy_process_type phy_process_type;
+	enum phy_max_rate phy_max_rate;
 };
 
 static const
-struct inno_video_mipi_dphy_timing inno_mipi_dphy_timing_table_smic40ll[] = {
+struct inno_video_mipi_dphy_timing inno_mipi_dphy_timing_table_max_1GHz[] = {
 	{ 110, 0x0, 0x20, 0x16, 0x02, 0x22},
 	{ 150, 0x0, 0x06, 0x16, 0x03, 0x45},
 	{ 200, 0x0, 0x18, 0x17, 0x04, 0x0b},
@@ -231,7 +231,7 @@ struct inno_video_mipi_dphy_timing inno_mipi_dphy_timing_table_smic40ll[] = {
 };
 
 static const
-struct inno_video_mipi_dphy_timing inno_mipi_dphy_timing_table_tsmc22ulp[] = {
+struct inno_video_mipi_dphy_timing inno_mipi_dphy_timing_table_max_2_5GHz[] = {
 	{ 110, 0x02, 0x7f, 0x16, 0x02, 0x02},
 	{ 150, 0x02, 0x7f, 0x16, 0x03, 0x02},
 	{ 200, 0x02, 0x7f, 0x17, 0x04, 0x02},
@@ -253,16 +253,16 @@ struct inno_video_mipi_dphy_timing inno_mipi_dphy_timing_table_tsmc22ulp[] = {
 	{2500, 0x15, 0x54, 0x7f, 0x15, 0x6a},
 };
 
-const struct inno_video_mipi_dphy_info inno_video_mipi_dphy_smic4011 = {
-	.inno_mipi_dphy_timing_table = inno_mipi_dphy_timing_table_smic40ll,
-	.num_timings = ARRAY_SIZE(inno_mipi_dphy_timing_table_smic40ll),
-	.phy_process_type = SMIC40LL,
+const struct inno_video_mipi_dphy_info inno_video_mipi_dphy_max_1GHz = {
+	.inno_mipi_dphy_timing_table = inno_mipi_dphy_timing_table_max_1GHz,
+	.num_timings = ARRAY_SIZE(inno_mipi_dphy_timing_table_max_1GHz),
+	.phy_max_rate = MAX_1GHZ,
 };
 
-const struct inno_video_mipi_dphy_info inno_video_mipi_dphy_tsmc22ulp = {
-	.inno_mipi_dphy_timing_table = inno_mipi_dphy_timing_table_tsmc22ulp,
-	.num_timings = ARRAY_SIZE(inno_mipi_dphy_timing_table_tsmc22ulp),
-	.phy_process_type = TSMC22ULP,
+const struct inno_video_mipi_dphy_info inno_video_mipi_dphy_max_2_5GHz = {
+	.inno_mipi_dphy_timing_table = inno_mipi_dphy_timing_table_max_2_5GHz,
+	.num_timings = ARRAY_SIZE(inno_mipi_dphy_timing_table_max_2_5GHz),
+	.phy_max_rate = MAX_2_5GHZ,
 };
 
 struct mipi_dphy_timing {
@@ -386,7 +386,7 @@ inno_mipi_dphy_get_timing(struct inno_video_phy *inno)
 	return &timings[i];
 }
 
-static void inno_mipi_dphy_tsmc22ulp_pll_enable(struct inno_video_phy *inno)
+static void inno_mipi_dphy_max_2_5GHz_pll_enable(struct inno_video_phy *inno)
 {
 	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x03,
 			REG_PREDIV_MASK, REG_PREDIV(inno->pll.prediv));
@@ -404,7 +404,7 @@ static void inno_mipi_dphy_tsmc22ulp_pll_enable(struct inno_video_phy *inno)
 			REG_LDOPD_POWER_ON | REG_PLLPD_POWER_ON);
 }
 
-static void inno_mipi_dphy_smic40ll_pll_enable(struct inno_video_phy *inno)
+static void inno_mipi_dphy_max_1GHz_pll_enable(struct inno_video_phy *inno)
 {
 	/* Configure PLL */
 	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x03,
@@ -505,7 +505,7 @@ static void inno_mipi_dphy_timing_init(struct inno_video_phy *inno)
 	 * The value of counter for HS Tlpx Time
 	 * Tlpx = Tpin_txbyteclkhs * (2 + value)
 	 */
-	if (inno->mipi_dphy_info->phy_process_type == SMIC40LL) {
+	if (inno->mipi_dphy_info->phy_max_rate == MAX_1GHZ) {
 		lpx = DIV_ROUND_UP(gotp.lpx, t_txbyteclkhs);
 		if (lpx >= 2)
 			lpx -= 2;
@@ -530,7 +530,7 @@ static void inno_mipi_dphy_timing_init(struct inno_video_phy *inno)
 		phy_update_bits(inno, i, 0x06, T_HS_PREPARE_CNT_MASK,
 				T_HS_PREPARE_CNT(hs_prepare));
 
-		if (inno->mipi_dphy_info->phy_process_type == TSMC22ULP)
+		if (inno->mipi_dphy_info->phy_max_rate == MAX_2_5GHZ)
 			phy_update_bits(inno, i, 0x06, T_HS_ZERO_CNT_HI_MASK,
 					T_HS_ZERO_CNT_HI(hs_zero >> 6));
 
@@ -539,14 +539,14 @@ static void inno_mipi_dphy_timing_init(struct inno_video_phy *inno)
 		phy_update_bits(inno, i, 0x08, T_HS_TRAIL_CNT_MASK,
 				T_HS_TRAIL_CNT(hs_trail));
 
-		if (inno->mipi_dphy_info->phy_process_type == TSMC22ULP)
+		if (inno->mipi_dphy_info->phy_max_rate == MAX_2_5GHZ)
 			phy_update_bits(inno, i, 0x11, T_HS_EXIT_CNT_HI_MASK,
 					T_HS_EXIT_CNT_HI(hs_exit >> 5));
 
 		phy_update_bits(inno, i, 0x09, T_HS_EXIT_CNT_LO_MASK,
 				T_HS_EXIT_CNT_LO(hs_exit));
 
-		if (inno->mipi_dphy_info->phy_process_type == TSMC22ULP)
+		if (inno->mipi_dphy_info->phy_max_rate == MAX_2_5GHZ)
 			phy_update_bits(inno, i, 0x10, T_CLK_POST_HI_MASK,
 					T_CLK_POST_HI(clk_post >> 4));
 
@@ -596,10 +596,10 @@ static void inno_video_phy_mipi_mode_enable(struct inno_video_phy *inno)
 	phy_update_bits(inno, REGISTER_PART_LVDS, 0x03,
 			MODE_ENABLE_MASK, MIPI_MODE_ENABLE);
 
-	if (inno->mipi_dphy_info->phy_process_type == TSMC22ULP)
-		inno_mipi_dphy_tsmc22ulp_pll_enable(inno);
+	if (inno->mipi_dphy_info->phy_max_rate == MAX_2_5GHZ)
+		inno_mipi_dphy_max_2_5GHz_pll_enable(inno);
 	else
-		inno_mipi_dphy_smic40ll_pll_enable(inno);
+		inno_mipi_dphy_max_1GHz_pll_enable(inno);
 
 	inno_mipi_dphy_reset(inno);
 	inno_mipi_dphy_timing_init(inno);
@@ -888,32 +888,36 @@ static const struct rockchip_phy_funcs inno_video_phy_funcs = {
 	.set_mode = inno_video_phy_set_mode,
 };
 
-static struct rockchip_phy inno_video_phy_smic40ll_driver_data = {
+static struct rockchip_phy px30_inno_video_phy_driver_data = {
 	 .funcs = &inno_video_phy_funcs,
-	 .data = &inno_video_mipi_dphy_smic4011,
+	 .data = &inno_video_mipi_dphy_max_1GHz,
 };
 
-static struct rockchip_phy inno_video_phy_tsmc22ulp_driver_data = {
+static struct rockchip_phy rk3568_inno_video_phy_driver_data = {
 	 .funcs = &inno_video_phy_funcs,
-	 .data = &inno_video_mipi_dphy_tsmc22ulp,
+	 .data = &inno_video_mipi_dphy_max_2_5GHz,
 };
 
 static const struct udevice_id inno_video_phy_ids[] = {
 	{
 		.compatible = "rockchip,px30-video-phy",
-		.data = (ulong)&inno_video_phy_smic40ll_driver_data,
+		.data = (ulong)&px30_inno_video_phy_driver_data,
 	},
 	{
 		.compatible = "rockchip,rk3128-video-phy",
-		.data = (ulong)&inno_video_phy_smic40ll_driver_data,
+		.data = (ulong)&px30_inno_video_phy_driver_data,
 	},
 	{
 		.compatible = "rockchip,rk3368-video-phy",
-		.data = (ulong)&inno_video_phy_smic40ll_driver_data,
+		.data = (ulong)&px30_inno_video_phy_driver_data,
 	},
 	{
 		.compatible = "rockchip,rk3568-video-phy",
-		.data = (ulong)&inno_video_phy_tsmc22ulp_driver_data,
+		.data = (ulong)&rk3568_inno_video_phy_driver_data,
+	},
+	{
+		.compatible = "rockchip,rk3568-dsi-dphy",
+		.data = (ulong)&rk3568_inno_video_phy_driver_data,
 	},
 	{}
 };

commit a79bc57b1c05f321fb90a6f4e6782b19b1228197
Author: Wu Liangqing <wlq@rock-chips.com>
Date:   Tue Jul 6 20:42:59 2021 +0800

    configs: rk3566-nand: include rk3568-nand.config
    
    Change-Id: I3b2690444089c48ac4d2b53eb8bfe9256d48137c
    Signed-off-by: Wu Liangqing <wlq@rock-chips.com>

diff --git a/configs/rk3566-nand.config b/configs/rk3566-nand.config
index dcffbc1d04..ad0d788264 100644
--- a/configs/rk3566-nand.config
+++ b/configs/rk3566-nand.config
@@ -1,2 +1,2 @@
-CONFIG_BASE_DEFCONFIG="rk3568_defconfig"
-CONFIG_LOADER_INI="RK3566MINIALL_NAND.ini"
\ No newline at end of file
+CONFIG_BASE_DEFCONFIG="rk3568-nand.config"
+CONFIG_LOADER_INI="RK3566MINIALL_NAND.ini"

commit 2065873f21ca958a7a11a6e646865b3f83aa2e7e
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon Jul 5 17:38:59 2021 +0800

    configs: rv1126: new configuration for rv1126-bat-evb
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
    Change-Id: Ifaaad7fd2426f79d94c3883c4b3d534ed2d3e749

diff --git a/configs/rv1126-bat-emmc-tb.config b/configs/rv1126-bat-emmc-tb.config
new file mode 100644
index 0000000000..3ec1bef870
--- /dev/null
+++ b/configs/rv1126-bat-emmc-tb.config
@@ -0,0 +1,6 @@
+# CONFIG_SPL_DM_FUEL_GAUGE is not set
+# CONFIG_SPL_I2C_SUPPORT is not set
+CONFIG_BASE_DEFCONFIG="rv1126-emmc-tb.config"
+CONFIG_DEFAULT_DEVICE_TREE="rv1126-bat-evb"
+CONFIG_LOADER_INI="RV1126MINIALL_LP4_EMMC_TB.ini"
+CONFIG_OF_LIST="rv1126-bat-evb"

commit 9a6fb849909658e1ed014b8e92706a5f62db1aea
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon Jul 5 17:24:42 2021 +0800

    rockchip: dts: support rv1126 battery evb board
    
    The RV1126 battery evb board is used for thunderboot feature, aim to
    attain low-power consumption. For thunderboot, we have to disabled
    undesired devices in SPL.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
    Change-Id: I39420bd4c1096461ac206628c002f3f16d1b14d4

diff --git a/arch/arm/dts/rv1126-bat-evb.dts b/arch/arm/dts/rv1126-bat-evb.dts
new file mode 100644
index 0000000000..bf0334a382
--- /dev/null
+++ b/arch/arm/dts/rv1126-bat-evb.dts
@@ -0,0 +1,112 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2021 Fuzhou Rockchip Electronics Co., Ltd.
+ */
+
+/dts-v1/;
+#include "rv1126.dtsi"
+#include "rv1126-u-boot.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Rockchip RV1126 Battery Evaluation Board";
+	compatible = "rockchip,rv1126-bat-evb", "rockchip,rv1126";
+
+	chosen {
+		stdout-path = &uart2;
+		u-boot,spl-boot-order = &emmc;
+	};
+
+	adc-keys {
+		compatible = "adc-keys";
+		io-channels = <&saradc 0>;
+		io-channel-names = "buttons";
+		keyup-threshold-microvolt = <1800000>;
+		u-boot,dm-spl;
+		status = "okay";
+
+		volumeup-key {
+			u-boot,dm-spl;
+			linux,code = <KEY_VOLUMEUP>;
+			label = "volume up";
+			press-threshold-microvolt = <0>;
+		};
+
+		menu-key {
+			u-boot,dm-spl;
+			linux,code = <KEY_MENU>;
+			label = "menu";
+			press-threshold-microvolt = <1198828>;
+		};
+	};
+};
+
+&clk_out_ethernetm1_pins {
+	status = "disabled";
+};
+
+&emmc {
+	bus-width = <8>;
+	mmc-hs200-1_8v;
+	status = "okay";
+};
+
+&gpio1 {
+	status = "disabled";
+};
+
+&gpio3 {
+	status = "disabled";
+};
+
+&gmac {
+	status = "disabled";
+};
+
+&gmac_clkin_m0 {
+	status = "disabled";
+};
+
+&gmac_clkini_m1 {
+	status = "disabled";
+};
+
+&i2c0 {
+	status = "disabled";
+};
+
+&mdio {
+	status = "disabled";
+};
+
+&mtl_rx_setup {
+	status = "disabled";
+};
+
+&mtl_tx_setup {
+	status = "disabled";
+};
+
+&nandc {
+	status = "disabled";
+};
+
+&sdmmc {
+	status = "disabled";
+};
+
+&stmmac_axi_setup {
+	status = "disabled";
+};
+
+&rgmiim1_pins {
+	status = "disabled";
+};
+
+&rng {
+	status = "disabled";
+};
+
+&uart2 {
+	status = "okay";
+};

commit c4ad04001a7542bfda3c8a21c70efc8a81e19d91
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jul 2 19:49:38 2021 +0800

    spl: fit: append mtd part info to dtb if BLK_MTD_SPI_NAND in kernel boot
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ia834b1bf7b7e4b99af8b76c502f8300b03d4974b

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index abf5ed0cc7..79c02402db 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -543,6 +543,13 @@ static int spl_load_kernel_fit(struct spl_image_info *spl_image,
 			if (!spl_get_current_slot(info->dev, "misc", slot_suffix))
 				fdt_bootargs_append_ab((void *)image_info.load_addr, slot_suffix);
 #endif
+
+#ifdef CONFIG_SPL_MTD_SUPPORT
+			struct blk_desc *desc = info->dev;
+
+			if (desc->devnum == BLK_MTD_SPI_NAND)
+				fdt_bootargs_append((void *)image_info.load_addr, mtd_part_parse());
+#endif
 		} else if (!strcmp(images[i], FIT_KERNEL_PROP)) {
 #if CONFIG_IS_ENABLED(OPTEE)
 			spl_image->entry_point_os = image_info.load_addr;

commit 6a8d650f80ab60d56f0ac26b73b57accd501a389
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon Jul 5 14:54:47 2021 +0800

    mmc: dw_mmc: discard 100us delay after sending command
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
    Change-Id: If4a2044823f539c5966d18f30ae3909ce9eefa6f

diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 0a4e256b78..6fc7095523 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -447,8 +447,6 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
 		}
 	}
 
-	udelay(100);
-
 	return ret;
 }
 

commit fb5b91380d2f0faba0638ecabd61561c9510f745
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jul 2 19:49:13 2021 +0800

    common: fdt_support: add fdt_bootargs_append_ab()
    
    Support append data to bootargs.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Idb0f1a953ab4e3e330727044d62fdc48d1e1f034

diff --git a/common/fdt_support.c b/common/fdt_support.c
index 7276b7c9ed..a9a5596f84 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -280,7 +280,7 @@ int fdt_initrd(void *fdt, ulong initrd_start, ulong initrd_end)
 	return 0;
 }
 
-static int fdt_bootargs_append(void *fdt, char *data)
+int fdt_bootargs_append(void *fdt, char *data)
 {
 	const char *arr_bootargs[] = { "bootargs", "bootargs_ext" };
 	int nodeoffset, len;
diff --git a/include/fdt_support.h b/include/fdt_support.h
index 3dcdfdfe17..214fe2e22b 100644
--- a/include/fdt_support.h
+++ b/include/fdt_support.h
@@ -27,6 +27,15 @@ u32 fdt_getprop_u32_default(const void *fdt, const char *path,
  */
 int fdt_root(void *fdt);
 
+/**
+ * Append info to bootargs
+ *
+ * @param fdt           FDT address in memory
+ * @param data          string info
+ * @return 0 if ok, else error
+ */
+int fdt_bootargs_append(void *fdt, char *data);
+
 /**
  * Append ab info to bootargs
  *

commit bc12b1c9081e838346a129313cde0036547e2262
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jul 2 17:26:09 2021 +0800

    configs: rv1126-emmc-tb: support CONFIG_MMC_USE_PRE_CONFIG
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I4d87f9b88349d8c5851783f3faac6fda26f747d7

diff --git a/configs/rv1126-emmc-tb.config b/configs/rv1126-emmc-tb.config
index 967d78e0b8..ea16e7562a 100644
--- a/configs/rv1126-emmc-tb.config
+++ b/configs/rv1126-emmc-tb.config
@@ -4,13 +4,13 @@ CONFIG_BASE_DEFCONFIG="rv1126_defconfig"
 # CONFIG_CMD_SF is not set
 # CONFIG_CMD_SPI is not set
 CONFIG_LOADER_INI="RV1126MINIALL_EMMC_TB.ini"
+CONFIG_MMC_USE_PRE_CONFIG=y
 # CONFIG_MTD_DEVICE is not set
 # CONFIG_MTD is not set
 # CONFIG_MTD_NAND_BBT_USING_FLASH is not set
 # CONFIG_NAND is not set
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 # CONFIG_ROCKCHIP_SFC is not set
-# CONFIG_ROCKCHIP_UIMAGE is not set
 # CONFIG_SPI_FLASH is not set
 # CONFIG_SPI_MEM is not set
 # CONFIG_SPL_AB is not set

commit 57504d998fc512618c6e02c21bf2d4cc82969d49
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jul 2 09:43:48 2021 +0800

    rockchip: spl: support get boot mode
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ifadba42840d3b88a8d2874ede0a2d2c2306c740d

diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index a8808407af..cd7e01dd18 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -16,6 +16,9 @@ obj-spl-y += spl.o spl-boot-order.o
 
 ifndef CONFIG_TPL_BUILD
 obj-$(CONFIG_$(SPL_)FIT) += fit_misc.o
+ifdef CONFIG_SPL_BUILD
+obj-y += spl_boot_mode.o
+endif
 endif
 
 ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
diff --git a/arch/arm/mach-rockchip/spl_boot_mode.c b/arch/arm/mach-rockchip/spl_boot_mode.c
new file mode 100644
index 0000000000..df21397914
--- /dev/null
+++ b/arch/arm/mach-rockchip/spl_boot_mode.c
@@ -0,0 +1,98 @@
+/*
+ * (C) Copyright 2021 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <boot_rkimg.h>
+#include <malloc.h>
+#include <asm/io.h>
+#include <asm/arch/boot_mode.h>
+
+static int misc_require_recovery(struct blk_desc *dev_desc, u32 bcb_offset)
+{
+	struct bootloader_message *bmsg;
+	disk_partition_t part;
+	int cnt, recovery;
+
+	if (!dev_desc)
+		return 0;
+
+	if (part_get_info_by_name(dev_desc, PART_MISC, &part) < 0) {
+		printf("No misc partition\n");
+		return 0;
+	}
+
+	cnt = DIV_ROUND_UP(sizeof(struct bootloader_message), dev_desc->blksz);
+	bmsg = memalign(ARCH_DMA_MINALIGN, cnt * dev_desc->blksz);
+	if (!bmsg)
+		return 0;
+
+	if (blk_dread(dev_desc, part.start + bcb_offset, cnt, bmsg) != cnt)
+		return 0;
+
+	recovery = !strcmp(bmsg->command, "boot-recovery");
+	free(bmsg);
+
+	return recovery;
+}
+
+int rockchip_get_boot_mode(struct blk_desc *dev_desc, u32 bcb_sector_offset)
+{
+	uint32_t reg_boot_mode;
+	int boot_mode;
+
+	/*
+	 * Boot mode priority
+	 *
+	 * Anyway, we should set download boot mode as the highest priority, so:
+	 * reboot loader/bootloader/fastboot > misc partition "recovery" > reboot xxx.
+	 */
+	reg_boot_mode = readl((void *)CONFIG_ROCKCHIP_BOOT_MODE_REG);
+	if (reg_boot_mode == BOOT_LOADER) {
+		printf("boot mode: loader\n");
+		boot_mode = BOOT_MODE_LOADER;
+	} else if (reg_boot_mode == BOOT_DFU) {
+		printf("boot mode: dfu\n");
+		boot_mode = BOOT_MODE_DFU;
+	} else if (reg_boot_mode == BOOT_FASTBOOT) {
+		printf("boot mode: bootloader\n");
+		boot_mode = BOOT_MODE_BOOTLOADER;
+	} else if (misc_require_recovery(dev_desc, bcb_sector_offset)) {
+		printf("boot mode: recovery (misc)\n");
+		boot_mode = BOOT_MODE_RECOVERY;
+	} else {
+		switch (reg_boot_mode) {
+		case BOOT_NORMAL:
+			printf("boot mode: normal\n");
+			boot_mode = BOOT_MODE_NORMAL;
+			break;
+		case BOOT_RECOVERY:
+			printf("boot mode: recovery (cmd)\n");
+			boot_mode = BOOT_MODE_RECOVERY;
+			break;
+		case BOOT_UMS:
+			printf("boot mode: ums\n");
+			boot_mode = BOOT_MODE_UMS;
+			break;
+		case BOOT_CHARGING:
+			printf("boot mode: charging\n");
+			boot_mode = BOOT_MODE_CHARGING;
+			break;
+		case BOOT_PANIC:
+			printf("boot mode: panic\n");
+			boot_mode = BOOT_MODE_PANIC;
+			break;
+		case BOOT_WATCHDOG:
+			printf("boot mode: watchdog\n");
+			boot_mode = BOOT_MODE_WATCHDOG;
+			break;
+		default:
+			printf("boot mode: None\n");
+			boot_mode = BOOT_MODE_UNDEFINE;
+		}
+	}
+
+	return boot_mode;
+}
diff --git a/include/boot_rkimg.h b/include/boot_rkimg.h
index 70c350a435..0de6f27c6d 100644
--- a/include/boot_rkimg.h
+++ b/include/boot_rkimg.h
@@ -68,8 +68,12 @@ void rockchip_set_bootdev(struct blk_desc *desc);
 void board_run_recovery_wipe_data(void);
 void setup_download_mode(void);
 int get_bcb_recovery_msg(void);
-int rockchip_get_boot_mode(void);
 int rockchip_read_dtb_file(void *fdt_addr);
 int init_kernel_dtb(void);
 
+#ifndef CONFIG_SPL_BUILD
+int rockchip_get_boot_mode(void);
+#else
+int rockchip_get_boot_mode(struct blk_desc *dev_desc, u32 bcb_sector_offset);
+#endif
 #endif

commit e25a9f7d608c830894454941ee94687ab371bbf4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jun 4 11:18:08 2021 +0800

    arm: dts: support build and append embedded kernel dtb
    
    Configuration:
            - CONFIG_EMBED_KERNEL_DTB_PATH
            - CONFIG_EMBED_KERNEL_DTB_ALWAYS
    
    CONFIG_EMBED_KERNEL_DTB_PATH *MUST* be assigned as *DTB* file,
    ie: CONFIG_EMBED_KERNEL_DTB_PATH="arch/arm/dts/my-kernel.dtb".
    We can provide a ready my-kernel.dtb or a my-kernel.dts for
    U-Boot to compile out my-kernel.dtb. Finally, my-kernel.dtb
    will be pack into uboot.img.
    
    If dts provided:
            1. dts file must under: ./arch/arm/dts/
            2. CONFIG_EMBED_KERNEL_DTB_ALWAYS can be y or n.
    
    If dtb provided:
            1. dtb file can be anywhere, suggest under: ./dts/
            2. CONFIG_EMBED_KERNEL_DTB_ALWAYS can be y or n.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I27cac375b92dd3c905c82a27238cf10bf0f0afc1

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 594614a2c6..b834bc3fc3 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -452,6 +452,14 @@ dtb-$(CONFIG_ARCH_ASPEED) += ast2500-evb.dtb
 
 dtb-$(CONFIG_ARCH_STI) += stih410-b2260.dtb
 
+# Compile embeded kernel dts to dtb, and put it behind of u-boot.dtb
+EMBED_KERN_DTB_PATH := $(CONFIG_EMBED_KERNEL_DTB_PATH:"%"=%)
+EMBED_KERN_DTS_PATH := $(subst dtb,dts, $(EMBED_KERN_DTB_PATH))
+ifneq ($(wildcard $(EMBED_KERN_DTS_PATH)),)
+EMBED_KERN_DTB=$(shell echo $(EMBED_KERN_DTB_PATH) | awk -F '/' '{ print $$NF }')
+dtb-y += $(EMBED_KERN_DTB)
+endif
+
 targets += $(dtb-y)
 
 # Add any required device tree compiler flags here

commit 267e75b2e2062fdd14be93dcb02377786c18ed9d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jun 17 20:12:23 2021 +0800

    common: image-fit: show short image hash string in SPL
    
    It's helpful to find out whether the images are what we expect.
    
    The log is:
        ...
        ## Verified-boot: 0
        ## Checking atf-1 0x00040000 ... sha256(bae46bf861...) + OK
        ## Checking uboot 0x00200000 ... sha256(ccf07285b7...) + OK
        ## Checking fdt 0x0029cc68 ... sha256(47b7d252db...) + OK
        ...
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Id69b08920b93dbb7e1aebb65d9f529537a9a9a21

diff --git a/common/image-fit.c b/common/image-fit.c
index a46c2318f1..2b5bcf414c 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -1299,6 +1299,7 @@ int fit_image_check_hash(const void *fit, int noffset, const void *data,
 	uint8_t *fit_value;
 	int fit_value_len;
 	int ignore;
+	int i;
 
 	*err_msgp = NULL;
 
@@ -1331,8 +1332,6 @@ int fit_image_check_hash(const void *fit, int noffset, const void *data,
 		*err_msgp = "Bad hash value len";
 		return -1;
 	} else if (memcmp(value, fit_value, value_len) != 0) {
-		int i;
-
 		printf(" Bad hash: ");
 		for (i = 0; i < value_len; i++)
 			printf("%02x", value[i]);
@@ -1342,6 +1341,13 @@ int fit_image_check_hash(const void *fit, int noffset, const void *data,
 		return -1;
 	}
 
+#ifdef CONFIG_SPL_BUILD
+	printf("(");
+	for (i = 0; i < 5; i++)
+		printf("%02x", value[i]);
+	printf("...) ");
+#endif
+
 	return 0;
 }
 

commit b1b9d7fba4a914dd5525a4d3419c7924bae4efa2
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Thu Jul 1 15:16:35 2021 +0800

    drivers: ram: common: fix ssmod define err
    
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
    Change-Id: I456f97b959316dde124fd8829e52420399a93fea

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h b/arch/arm/include/asm/arch-rockchip/sdram_common.h
index 859a3c237f..628fd6c6e1 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_common.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_common.h
@@ -42,9 +42,9 @@
 #define STRIDE_TYPE(n)			(((n) >> 16) & 0xff)
 
 #define DDR_2T_INFO(n)			((n) & 1)
-#define PLL_SSMOD_SPREAD(n)		(((n) >> 1) & 0x1f)
-#define PLL_SSMOD_DIV(n)		(((n) >> 6) & 0xf)
-#define PLL_SSMOD_DOWNSPREAD(n)		(((n) >> 10) & 0x1)
+#define PLL_SSMOD_SPREAD(n)		(((n) >> 1) & 0xff)
+#define PLL_SSMOD_DIV(n)		(((n) >> 9) & 0xff)
+#define PLL_SSMOD_DOWNSPREAD(n)		(((n) >> 17) & 0x3)
 
 /* sdram_head_info_v2 define */
 /* for *_drv_odten and *_drv_odtoff */

commit aa08195f52af235c30f11ac6fded9a23be9e18ab
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 30 14:37:10 2021 +0800

    common: fdt_support: filter invalid size
    
    Remove inactive code.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I0e4240de971ab0712463bf99c107a01dd6534975

diff --git a/common/fdt_support.c b/common/fdt_support.c
index a1d8849ece..7276b7c9ed 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -652,20 +652,13 @@ int fdt_update_reserved_memory(void *blob, char *name, u64 start, u64 size)
 	int nodeoffset, len, err;
 	u8 tmp[16]; /* Up to 64-bit address + 64-bit size */
 
-#if 0
-	/*name is rockchip_logo*/
-	nodeoffset = fdt_find_or_add_subnode(blob, 0, "reserved-memory");
-	if (nodeoffset < 0)
-		return nodeoffset;
-	printf("hjc>>reserved-memory>>%s, nodeoffset:%d\n", __func__, nodeoffset);
-	nodeoffset = fdt_find_or_add_subnode(blob, nodeoffset, name);
-	if (nodeoffset < 0)
-		return nodeoffset;
-#else
 	nodeoffset = fdt_node_offset_by_compatible(blob, 0, name);
 	if (nodeoffset < 0)
 		debug("Can't find nodeoffset: %d\n", nodeoffset);
-#endif
+
+	if (!size)
+		return nodeoffset;
+
 	len = fdt_pack_reg(blob, tmp, &start, &size, 1);
 	err = fdt_setprop(blob, nodeoffset, "reg", tmp, len);
 	if (err < 0) {

commit d2f013047e440007ad9e2cf25488f858be347e57
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Wed Jun 30 17:43:50 2021 +0800

    pinctrl: rockchip: rv1126: fix mux route error
    
    Change-Id: Ia49983c21623c2745eba3ef34dd014aebdba96df
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 3c537bfba8..00148d7a37 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -729,9 +729,9 @@ static struct rockchip_mux_route_data rv1126_mux_route_data[] = {
 	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x10260, RK_GENMASK_VAL(0, 0, 0)), /* I2S0_MCLK_M0 */
 	MR_TOPGRF(RK_GPIO3, RK_PB0, RK_FUNC_3, 0x10260, RK_GENMASK_VAL(0, 0, 1)), /* I2S0_MCLK_M1 */
 
-	MR_TOPGRF(RK_GPIO0, RK_PD4, RK_FUNC_4, 0x10260, RK_GENMASK_VAL(2, 3, 0)), /* I2S1_MCLK_M0 */
-	MR_TOPGRF(RK_GPIO1, RK_PD5, RK_FUNC_2, 0x10260, RK_GENMASK_VAL(2, 3, 1)), /* I2S1_MCLK_M1 */
-	MR_TOPGRF(RK_GPIO2, RK_PC7, RK_FUNC_6, 0x10260, RK_GENMASK_VAL(2, 3, 2)), /* I2S1_MCLK_M2 */
+	MR_TOPGRF(RK_GPIO0, RK_PD4, RK_FUNC_4, 0x10260, RK_GENMASK_VAL(3, 2, 0)), /* I2S1_MCLK_M0 */
+	MR_TOPGRF(RK_GPIO1, RK_PD5, RK_FUNC_2, 0x10260, RK_GENMASK_VAL(3, 2, 1)), /* I2S1_MCLK_M1 */
+	MR_TOPGRF(RK_GPIO2, RK_PC7, RK_FUNC_6, 0x10260, RK_GENMASK_VAL(3, 2, 2)), /* I2S1_MCLK_M2 */
 
 	MR_TOPGRF(RK_GPIO1, RK_PD0, RK_FUNC_1, 0x10260, RK_GENMASK_VAL(4, 4, 0)), /* I2S2_MCLK_M0 */
 	MR_TOPGRF(RK_GPIO2, RK_PB3, RK_FUNC_2, 0x10260, RK_GENMASK_VAL(4, 4, 1)), /* I2S2_MCLK_M1 */
@@ -742,20 +742,20 @@ static struct rockchip_mux_route_data rv1126_mux_route_data[] = {
 	MR_TOPGRF(RK_GPIO3, RK_PC6, RK_FUNC_1, 0x10264, RK_GENMASK_VAL(0, 0, 0)), /* CIF_CLKOUT_M0 */
 	MR_TOPGRF(RK_GPIO2, RK_PD1, RK_FUNC_3, 0x10264, RK_GENMASK_VAL(0, 0, 1)), /* CIF_CLKOUT_M1 */
 
-	MR_TOPGRF(RK_GPIO3, RK_PA4, RK_FUNC_5, 0x10264, RK_GENMASK_VAL(4, 5, 0)), /* I2C3_SCL_M0 */
-	MR_TOPGRF(RK_GPIO2, RK_PD4, RK_FUNC_7, 0x10264, RK_GENMASK_VAL(4, 5, 1)), /* I2C3_SCL_M1 */
-	MR_TOPGRF(RK_GPIO1, RK_PD6, RK_FUNC_3, 0x10264, RK_GENMASK_VAL(4, 5, 2)), /* I2C3_SCL_M2 */
+	MR_TOPGRF(RK_GPIO3, RK_PA4, RK_FUNC_5, 0x10264, RK_GENMASK_VAL(5, 4, 0)), /* I2C3_SCL_M0 */
+	MR_TOPGRF(RK_GPIO2, RK_PD4, RK_FUNC_7, 0x10264, RK_GENMASK_VAL(5, 4, 1)), /* I2C3_SCL_M1 */
+	MR_TOPGRF(RK_GPIO1, RK_PD6, RK_FUNC_3, 0x10264, RK_GENMASK_VAL(5, 4, 2)), /* I2C3_SCL_M2 */
 
 	MR_TOPGRF(RK_GPIO3, RK_PA0, RK_FUNC_7, 0x10264, RK_GENMASK_VAL(6, 6, 0)), /* I2C4_SCL_M0 */
 	MR_TOPGRF(RK_GPIO4, RK_PA0, RK_FUNC_4, 0x10264, RK_GENMASK_VAL(6, 6, 1)), /* I2C4_SCL_M1 */
 
-	MR_TOPGRF(RK_GPIO2, RK_PA5, RK_FUNC_7, 0x10264, RK_GENMASK_VAL(8, 9, 0)), /* I2C5_SCL_M0 */
-	MR_TOPGRF(RK_GPIO3, RK_PB0, RK_FUNC_5, 0x10264, RK_GENMASK_VAL(8, 9, 1)), /* I2C5_SCL_M1 */
-	MR_TOPGRF(RK_GPIO1, RK_PD0, RK_FUNC_4, 0x10264, RK_GENMASK_VAL(8, 9, 2)), /* I2C5_SCL_M2 */
+	MR_TOPGRF(RK_GPIO2, RK_PA5, RK_FUNC_7, 0x10264, RK_GENMASK_VAL(9, 8, 0)), /* I2C5_SCL_M0 */
+	MR_TOPGRF(RK_GPIO3, RK_PB0, RK_FUNC_5, 0x10264, RK_GENMASK_VAL(9, 8, 1)), /* I2C5_SCL_M1 */
+	MR_TOPGRF(RK_GPIO1, RK_PD0, RK_FUNC_4, 0x10264, RK_GENMASK_VAL(9, 8, 2)), /* I2C5_SCL_M2 */
 
-	MR_TOPGRF(RK_GPIO3, RK_PC0, RK_FUNC_5, 0x10264, RK_GENMASK_VAL(10, 11, 0)), /* SPI1_CLK_M0 */
-	MR_TOPGRF(RK_GPIO1, RK_PC6, RK_FUNC_3, 0x10264, RK_GENMASK_VAL(10, 11, 1)), /* SPI1_CLK_M1 */
-	MR_TOPGRF(RK_GPIO2, RK_PD5, RK_FUNC_6, 0x10264, RK_GENMASK_VAL(10, 11, 2)), /* SPI1_CLK_M2 */
+	MR_TOPGRF(RK_GPIO3, RK_PC0, RK_FUNC_5, 0x10264, RK_GENMASK_VAL(11, 10, 0)), /* SPI1_CLK_M0 */
+	MR_TOPGRF(RK_GPIO1, RK_PC6, RK_FUNC_3, 0x10264, RK_GENMASK_VAL(11, 10, 1)), /* SPI1_CLK_M1 */
+	MR_TOPGRF(RK_GPIO2, RK_PD5, RK_FUNC_6, 0x10264, RK_GENMASK_VAL(11, 10, 2)), /* SPI1_CLK_M2 */
 
 	MR_TOPGRF(RK_GPIO3, RK_PC0, RK_FUNC_2, 0x10264, RK_GENMASK_VAL(12, 12, 0)), /* RGMII_CLK_M0 */
 	MR_TOPGRF(RK_GPIO2, RK_PB7, RK_FUNC_2, 0x10264, RK_GENMASK_VAL(12, 12, 1)), /* RGMII_CLK_M1 */
@@ -778,17 +778,17 @@ static struct rockchip_mux_route_data rv1126_mux_route_data[] = {
 	MR_TOPGRF(RK_GPIO1, RK_PA5, RK_FUNC_3, 0x10268, RK_GENMASK_VAL(8, 8, 0)), /* UART2_TX_M0 */
 	MR_TOPGRF(RK_GPIO3, RK_PA2, RK_FUNC_1, 0x10268, RK_GENMASK_VAL(8, 8, 1)), /* UART2_TX_M1 */
 
-	MR_TOPGRF(RK_GPIO3, RK_PC6, RK_FUNC_3, 0x10268, RK_GENMASK_VAL(10, 11, 0)), /* UART3_TX_M0 */
-	MR_TOPGRF(RK_GPIO1, RK_PA7, RK_FUNC_2, 0x10268, RK_GENMASK_VAL(10, 11, 1)), /* UART3_TX_M1 */
-	MR_TOPGRF(RK_GPIO3, RK_PA0, RK_FUNC_4, 0x10268, RK_GENMASK_VAL(10, 11, 2)), /* UART3_TX_M2 */
+	MR_TOPGRF(RK_GPIO3, RK_PC6, RK_FUNC_3, 0x10268, RK_GENMASK_VAL(11, 10, 0)), /* UART3_TX_M0 */
+	MR_TOPGRF(RK_GPIO1, RK_PA7, RK_FUNC_2, 0x10268, RK_GENMASK_VAL(11, 10, 1)), /* UART3_TX_M1 */
+	MR_TOPGRF(RK_GPIO3, RK_PA0, RK_FUNC_4, 0x10268, RK_GENMASK_VAL(11, 10, 2)), /* UART3_TX_M2 */
 
-	MR_TOPGRF(RK_GPIO3, RK_PA4, RK_FUNC_4, 0x10268, RK_GENMASK_VAL(12, 13, 0)), /* UART4_TX_M0 */
-	MR_TOPGRF(RK_GPIO2, RK_PA6, RK_FUNC_4, 0x10268, RK_GENMASK_VAL(12, 13, 1)), /* UART4_TX_M1 */
-	MR_TOPGRF(RK_GPIO1, RK_PD5, RK_FUNC_3, 0x10268, RK_GENMASK_VAL(12, 13, 2)), /* UART4_TX_M2 */
+	MR_TOPGRF(RK_GPIO3, RK_PA4, RK_FUNC_4, 0x10268, RK_GENMASK_VAL(13, 12, 0)), /* UART4_TX_M0 */
+	MR_TOPGRF(RK_GPIO2, RK_PA6, RK_FUNC_4, 0x10268, RK_GENMASK_VAL(13, 12, 1)), /* UART4_TX_M1 */
+	MR_TOPGRF(RK_GPIO1, RK_PD5, RK_FUNC_3, 0x10268, RK_GENMASK_VAL(13, 12, 2)), /* UART4_TX_M2 */
 
-	MR_TOPGRF(RK_GPIO3, RK_PA6, RK_FUNC_4, 0x10268, RK_GENMASK_VAL(14, 15, 0)), /* UART5_TX_M0 */
-	MR_TOPGRF(RK_GPIO2, RK_PB0, RK_FUNC_4, 0x10268, RK_GENMASK_VAL(14, 15, 1)), /* UART5_TX_M1 */
-	MR_TOPGRF(RK_GPIO2, RK_PA0, RK_FUNC_3, 0x10268, RK_GENMASK_VAL(14, 15, 2)), /* UART5_TX_M2 */
+	MR_TOPGRF(RK_GPIO3, RK_PA6, RK_FUNC_4, 0x10268, RK_GENMASK_VAL(15, 14, 0)), /* UART5_TX_M0 */
+	MR_TOPGRF(RK_GPIO2, RK_PB0, RK_FUNC_4, 0x10268, RK_GENMASK_VAL(15, 14, 1)), /* UART5_TX_M1 */
+	MR_TOPGRF(RK_GPIO2, RK_PA0, RK_FUNC_3, 0x10268, RK_GENMASK_VAL(15, 14, 2)), /* UART5_TX_M2 */
 
 	MR_PMUGRF(RK_GPIO0, RK_PB6, RK_FUNC_3, 0x0114, RK_GENMASK_VAL(0, 0, 0)), /* PWM0_M0 */
 	MR_PMUGRF(RK_GPIO2, RK_PB3, RK_FUNC_5, 0x0114, RK_GENMASK_VAL(0, 0, 1)), /* PWM0_M1 */
@@ -814,12 +814,13 @@ static struct rockchip_mux_route_data rv1126_mux_route_data[] = {
 	MR_PMUGRF(RK_GPIO0, RK_PB1, RK_FUNC_3, 0x0114, RK_GENMASK_VAL(14, 14, 0)), /* PWM7_IR_M0 */
 	MR_PMUGRF(RK_GPIO3, RK_PA0, RK_FUNC_5, 0x0114, RK_GENMASK_VAL(14, 14, 1)), /* PWM7_IR_M1 */
 
-	MR_PMUGRF(RK_GPIO0, RK_PB0, RK_FUNC_1, 0x0118, RK_GENMASK_VAL(0, 1, 0)), /* SPI0_CLK_M0 */
-	MR_PMUGRF(RK_GPIO2, RK_PA1, RK_FUNC_1, 0x0118, RK_GENMASK_VAL(0, 1, 1)), /* SPI0_CLK_M1 */
-	MR_PMUGRF(RK_GPIO2, RK_PB2, RK_FUNC_6, 0x0118, RK_GENMASK_VAL(0, 1, 2)), /* SPI0_CLK_M2 */
+	MR_PMUGRF(RK_GPIO0, RK_PB0, RK_FUNC_1, 0x0118, RK_GENMASK_VAL(1, 0, 0)), /* SPI0_CLK_M0 */
+	MR_PMUGRF(RK_GPIO2, RK_PA1, RK_FUNC_1, 0x0118, RK_GENMASK_VAL(1, 0, 1)), /* SPI0_CLK_M1 */
+	MR_PMUGRF(RK_GPIO2, RK_PB2, RK_FUNC_6, 0x0118, RK_GENMASK_VAL(1, 0, 2)), /* SPI0_CLK_M2 */
 
 	MR_PMUGRF(RK_GPIO0, RK_PB6, RK_FUNC_2, 0x0118, RK_GENMASK_VAL(2, 2, 0)), /* UART1_TX_M0 */
 	MR_PMUGRF(RK_GPIO1, RK_PD0, RK_FUNC_5, 0x0118, RK_GENMASK_VAL(2, 2, 1)), /* UART1_TX_M1 */
+	MR_PMUGRF(RK_GPIO0, RK_PC3, RK_FUNC_1, 0x0118, RK_GENMASK_VAL(4, 4, 1)), /* I2C2 */
 };
 
 static void rockchip_get_recalced_mux(struct rockchip_pin_bank *bank, int pin,
diff --git a/drivers/pinctrl/rockchip/pinctrl-rv1126.c b/drivers/pinctrl/rockchip/pinctrl-rv1126.c
index 17db59f9ee..03bf70395a 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rv1126.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rv1126.c
@@ -46,9 +46,9 @@ static struct rockchip_mux_route_data rv1126_mux_route_data[] = {
 	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x10260, RK_GENMASK_VAL(0, 0, 0)), /* I2S0_MCLK_M0 */
 	MR_TOPGRF(RK_GPIO3, RK_PB0, RK_FUNC_3, 0x10260, RK_GENMASK_VAL(0, 0, 1)), /* I2S0_MCLK_M1 */
 
-	MR_TOPGRF(RK_GPIO0, RK_PD4, RK_FUNC_4, 0x10260, RK_GENMASK_VAL(2, 3, 0)), /* I2S1_MCLK_M0 */
-	MR_TOPGRF(RK_GPIO1, RK_PD5, RK_FUNC_2, 0x10260, RK_GENMASK_VAL(2, 3, 1)), /* I2S1_MCLK_M1 */
-	MR_TOPGRF(RK_GPIO2, RK_PC7, RK_FUNC_6, 0x10260, RK_GENMASK_VAL(2, 3, 2)), /* I2S1_MCLK_M2 */
+	MR_TOPGRF(RK_GPIO0, RK_PD4, RK_FUNC_4, 0x10260, RK_GENMASK_VAL(3, 2, 0)), /* I2S1_MCLK_M0 */
+	MR_TOPGRF(RK_GPIO1, RK_PD5, RK_FUNC_2, 0x10260, RK_GENMASK_VAL(3, 2, 1)), /* I2S1_MCLK_M1 */
+	MR_TOPGRF(RK_GPIO2, RK_PC7, RK_FUNC_6, 0x10260, RK_GENMASK_VAL(3, 2, 2)), /* I2S1_MCLK_M2 */
 
 	MR_TOPGRF(RK_GPIO1, RK_PD0, RK_FUNC_1, 0x10260, RK_GENMASK_VAL(4, 4, 0)), /* I2S2_MCLK_M0 */
 	MR_TOPGRF(RK_GPIO2, RK_PB3, RK_FUNC_2, 0x10260, RK_GENMASK_VAL(4, 4, 1)), /* I2S2_MCLK_M1 */
@@ -59,20 +59,20 @@ static struct rockchip_mux_route_data rv1126_mux_route_data[] = {
 	MR_TOPGRF(RK_GPIO3, RK_PC6, RK_FUNC_1, 0x10264, RK_GENMASK_VAL(0, 0, 0)), /* CIF_CLKOUT_M0 */
 	MR_TOPGRF(RK_GPIO2, RK_PD1, RK_FUNC_3, 0x10264, RK_GENMASK_VAL(0, 0, 1)), /* CIF_CLKOUT_M1 */
 
-	MR_TOPGRF(RK_GPIO3, RK_PA4, RK_FUNC_5, 0x10264, RK_GENMASK_VAL(4, 5, 0)), /* I2C3_SCL_M0 */
-	MR_TOPGRF(RK_GPIO2, RK_PD4, RK_FUNC_7, 0x10264, RK_GENMASK_VAL(4, 5, 1)), /* I2C3_SCL_M1 */
-	MR_TOPGRF(RK_GPIO1, RK_PD6, RK_FUNC_3, 0x10264, RK_GENMASK_VAL(4, 5, 2)), /* I2C3_SCL_M2 */
+	MR_TOPGRF(RK_GPIO3, RK_PA4, RK_FUNC_5, 0x10264, RK_GENMASK_VAL(5, 4, 0)), /* I2C3_SCL_M0 */
+	MR_TOPGRF(RK_GPIO2, RK_PD4, RK_FUNC_7, 0x10264, RK_GENMASK_VAL(5, 4, 1)), /* I2C3_SCL_M1 */
+	MR_TOPGRF(RK_GPIO1, RK_PD6, RK_FUNC_3, 0x10264, RK_GENMASK_VAL(5, 4, 2)), /* I2C3_SCL_M2 */
 
 	MR_TOPGRF(RK_GPIO3, RK_PA0, RK_FUNC_7, 0x10264, RK_GENMASK_VAL(6, 6, 0)), /* I2C4_SCL_M0 */
 	MR_TOPGRF(RK_GPIO4, RK_PA0, RK_FUNC_4, 0x10264, RK_GENMASK_VAL(6, 6, 1)), /* I2C4_SCL_M1 */
 
-	MR_TOPGRF(RK_GPIO2, RK_PA5, RK_FUNC_7, 0x10264, RK_GENMASK_VAL(8, 9, 0)), /* I2C5_SCL_M0 */
-	MR_TOPGRF(RK_GPIO3, RK_PB0, RK_FUNC_5, 0x10264, RK_GENMASK_VAL(8, 9, 1)), /* I2C5_SCL_M1 */
-	MR_TOPGRF(RK_GPIO1, RK_PD0, RK_FUNC_4, 0x10264, RK_GENMASK_VAL(8, 9, 2)), /* I2C5_SCL_M2 */
+	MR_TOPGRF(RK_GPIO2, RK_PA5, RK_FUNC_7, 0x10264, RK_GENMASK_VAL(9, 8, 0)), /* I2C5_SCL_M0 */
+	MR_TOPGRF(RK_GPIO3, RK_PB0, RK_FUNC_5, 0x10264, RK_GENMASK_VAL(9, 8, 1)), /* I2C5_SCL_M1 */
+	MR_TOPGRF(RK_GPIO1, RK_PD0, RK_FUNC_4, 0x10264, RK_GENMASK_VAL(9, 8, 2)), /* I2C5_SCL_M2 */
 
-	MR_TOPGRF(RK_GPIO3, RK_PC0, RK_FUNC_5, 0x10264, RK_GENMASK_VAL(10, 11, 0)), /* SPI1_CLK_M0 */
-	MR_TOPGRF(RK_GPIO1, RK_PC6, RK_FUNC_3, 0x10264, RK_GENMASK_VAL(10, 11, 1)), /* SPI1_CLK_M1 */
-	MR_TOPGRF(RK_GPIO2, RK_PD5, RK_FUNC_6, 0x10264, RK_GENMASK_VAL(10, 11, 2)), /* SPI1_CLK_M2 */
+	MR_TOPGRF(RK_GPIO3, RK_PC0, RK_FUNC_5, 0x10264, RK_GENMASK_VAL(11, 10, 0)), /* SPI1_CLK_M0 */
+	MR_TOPGRF(RK_GPIO1, RK_PC6, RK_FUNC_3, 0x10264, RK_GENMASK_VAL(11, 10, 1)), /* SPI1_CLK_M1 */
+	MR_TOPGRF(RK_GPIO2, RK_PD5, RK_FUNC_6, 0x10264, RK_GENMASK_VAL(11, 10, 2)), /* SPI1_CLK_M2 */
 
 	MR_TOPGRF(RK_GPIO3, RK_PC0, RK_FUNC_2, 0x10264, RK_GENMASK_VAL(12, 12, 0)), /* RGMII_CLK_M0 */
 	MR_TOPGRF(RK_GPIO2, RK_PB7, RK_FUNC_2, 0x10264, RK_GENMASK_VAL(12, 12, 1)), /* RGMII_CLK_M1 */
@@ -95,17 +95,17 @@ static struct rockchip_mux_route_data rv1126_mux_route_data[] = {
 	MR_TOPGRF(RK_GPIO1, RK_PA5, RK_FUNC_3, 0x10268, RK_GENMASK_VAL(8, 8, 0)), /* UART2_TX_M0 */
 	MR_TOPGRF(RK_GPIO3, RK_PA2, RK_FUNC_1, 0x10268, RK_GENMASK_VAL(8, 8, 1)), /* UART2_TX_M1 */
 
-	MR_TOPGRF(RK_GPIO3, RK_PC6, RK_FUNC_3, 0x10268, RK_GENMASK_VAL(10, 11, 0)), /* UART3_TX_M0 */
-	MR_TOPGRF(RK_GPIO1, RK_PA7, RK_FUNC_2, 0x10268, RK_GENMASK_VAL(10, 11, 1)), /* UART3_TX_M1 */
-	MR_TOPGRF(RK_GPIO3, RK_PA0, RK_FUNC_4, 0x10268, RK_GENMASK_VAL(10, 11, 2)), /* UART3_TX_M2 */
+	MR_TOPGRF(RK_GPIO3, RK_PC6, RK_FUNC_3, 0x10268, RK_GENMASK_VAL(11, 10, 0)), /* UART3_TX_M0 */
+	MR_TOPGRF(RK_GPIO1, RK_PA7, RK_FUNC_2, 0x10268, RK_GENMASK_VAL(11, 10, 1)), /* UART3_TX_M1 */
+	MR_TOPGRF(RK_GPIO3, RK_PA0, RK_FUNC_4, 0x10268, RK_GENMASK_VAL(11, 10, 2)), /* UART3_TX_M2 */
 
-	MR_TOPGRF(RK_GPIO3, RK_PA4, RK_FUNC_4, 0x10268, RK_GENMASK_VAL(12, 13, 0)), /* UART4_TX_M0 */
-	MR_TOPGRF(RK_GPIO2, RK_PA6, RK_FUNC_4, 0x10268, RK_GENMASK_VAL(12, 13, 1)), /* UART4_TX_M1 */
-	MR_TOPGRF(RK_GPIO1, RK_PD5, RK_FUNC_3, 0x10268, RK_GENMASK_VAL(12, 13, 2)), /* UART4_TX_M2 */
+	MR_TOPGRF(RK_GPIO3, RK_PA4, RK_FUNC_4, 0x10268, RK_GENMASK_VAL(13, 12, 0)), /* UART4_TX_M0 */
+	MR_TOPGRF(RK_GPIO2, RK_PA6, RK_FUNC_4, 0x10268, RK_GENMASK_VAL(13, 12, 1)), /* UART4_TX_M1 */
+	MR_TOPGRF(RK_GPIO1, RK_PD5, RK_FUNC_3, 0x10268, RK_GENMASK_VAL(13, 12, 2)), /* UART4_TX_M2 */
 
-	MR_TOPGRF(RK_GPIO3, RK_PA6, RK_FUNC_4, 0x10268, RK_GENMASK_VAL(14, 15, 0)), /* UART5_TX_M0 */
-	MR_TOPGRF(RK_GPIO2, RK_PB0, RK_FUNC_4, 0x10268, RK_GENMASK_VAL(14, 15, 1)), /* UART5_TX_M1 */
-	MR_TOPGRF(RK_GPIO2, RK_PA0, RK_FUNC_3, 0x10268, RK_GENMASK_VAL(14, 15, 2)), /* UART5_TX_M2 */
+	MR_TOPGRF(RK_GPIO3, RK_PA6, RK_FUNC_4, 0x10268, RK_GENMASK_VAL(15, 14, 0)), /* UART5_TX_M0 */
+	MR_TOPGRF(RK_GPIO2, RK_PB0, RK_FUNC_4, 0x10268, RK_GENMASK_VAL(15, 14, 1)), /* UART5_TX_M1 */
+	MR_TOPGRF(RK_GPIO2, RK_PA0, RK_FUNC_3, 0x10268, RK_GENMASK_VAL(15, 14, 2)), /* UART5_TX_M2 */
 
 	MR_PMUGRF(RK_GPIO0, RK_PB6, RK_FUNC_3, 0x0114, RK_GENMASK_VAL(0, 0, 0)), /* PWM0_M0 */
 	MR_PMUGRF(RK_GPIO2, RK_PB3, RK_FUNC_5, 0x0114, RK_GENMASK_VAL(0, 0, 1)), /* PWM0_M1 */
@@ -131,9 +131,9 @@ static struct rockchip_mux_route_data rv1126_mux_route_data[] = {
 	MR_PMUGRF(RK_GPIO0, RK_PB1, RK_FUNC_3, 0x0114, RK_GENMASK_VAL(14, 14, 0)), /* PWM7_IR_M0 */
 	MR_PMUGRF(RK_GPIO3, RK_PA0, RK_FUNC_5, 0x0114, RK_GENMASK_VAL(14, 14, 1)), /* PWM7_IR_M1 */
 
-	MR_PMUGRF(RK_GPIO0, RK_PB0, RK_FUNC_1, 0x0118, RK_GENMASK_VAL(0, 1, 0)), /* SPI0_CLK_M0 */
-	MR_PMUGRF(RK_GPIO2, RK_PA1, RK_FUNC_1, 0x0118, RK_GENMASK_VAL(0, 1, 1)), /* SPI0_CLK_M1 */
-	MR_PMUGRF(RK_GPIO2, RK_PB2, RK_FUNC_6, 0x0118, RK_GENMASK_VAL(0, 1, 2)), /* SPI0_CLK_M2 */
+	MR_PMUGRF(RK_GPIO0, RK_PB0, RK_FUNC_1, 0x0118, RK_GENMASK_VAL(1, 0, 0)), /* SPI0_CLK_M0 */
+	MR_PMUGRF(RK_GPIO2, RK_PA1, RK_FUNC_1, 0x0118, RK_GENMASK_VAL(1, 0, 1)), /* SPI0_CLK_M1 */
+	MR_PMUGRF(RK_GPIO2, RK_PB2, RK_FUNC_6, 0x0118, RK_GENMASK_VAL(1, 0, 2)), /* SPI0_CLK_M2 */
 
 	MR_PMUGRF(RK_GPIO0, RK_PB6, RK_FUNC_2, 0x0118, RK_GENMASK_VAL(2, 2, 0)), /* UART1_TX_M0 */
 	MR_PMUGRF(RK_GPIO1, RK_PD0, RK_FUNC_5, 0x0118, RK_GENMASK_VAL(2, 2, 1)), /* UART1_TX_M1 */

commit 01ccf957311ceb0d209dd2437056720868ad3132
Author: Guochun Huang <hero.huang@rock-chips.com>
Date:   Thu Jun 24 16:08:19 2021 +0800

    video/drm: combo_phy: Add support RK356X dsi
    
    Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
    Change-Id: Ia4567cb20592f8740b870e8845e122cb56991ba9

diff --git a/drivers/video/drm/inno_mipi_phy.c b/drivers/video/drm/inno_mipi_phy.c
index 655c159d63..447aaec5e7 100644
--- a/drivers/video/drm/inno_mipi_phy.c
+++ b/drivers/video/drm/inno_mipi_phy.c
@@ -713,9 +713,6 @@ static const struct udevice_id inno_mipi_dphy_ids[] = {
 	{
 		.compatible = "rockchip,rv1126-mipi-dphy",
 	},
-	{
-		.compatible = "rockchip,rk3568-mipi-dphy",
-	},
 	{}
 };
 
diff --git a/drivers/video/drm/inno_video_combo_phy.c b/drivers/video/drm/inno_video_combo_phy.c
index 615bd55a17..cfeead615d 100644
--- a/drivers/video/drm/inno_video_combo_phy.c
+++ b/drivers/video/drm/inno_video_combo_phy.c
@@ -17,6 +17,7 @@
 
 #include "rockchip_phy.h"
 
+#define USEC_PER_SEC	1000000LL
 #define PSEC_PER_SEC	1000000000000LL
 
 #define UPDATE(x, h, l)	(((x) << (l)) & GENMASK((h), (l)))
@@ -80,12 +81,27 @@
 #define DATA_LANE_0_SKEW_PHASE_MASK		GENMASK(2, 0)
 #define DATA_LANE_0_SKEW_PHASE(x)		UPDATE(x, 2, 0)
 /* Analog Register Part: reg08 */
+#define PRE_EMPHASIS_ENABLE_MASK		BIT(7)
+#define PRE_EMPHASIS_ENABLE			BIT(7)
+#define PRE_EMPHASIS_DISABLE			0
+#define PLL_POST_DIV_ENABLE_MASK		BIT(5)
+#define PLL_POST_DIV_ENABLE			BIT(5)
+#define PLL_POST_DIV_DISABLE			0
+#define DATA_LANE_VOD_RANGE_SET_MASK		GENMASK(3, 0)
+#define DATA_LANE_VOD_RANGE_SET(x)		UPDATE(x, 3, 0)
 #define SAMPLE_CLOCK_DIRECTION_MASK		BIT(4)
 #define SAMPLE_CLOCK_DIRECTION_REVERSE		BIT(4)
 #define SAMPLE_CLOCK_DIRECTION_FORWARD		0
 #define LOWFRE_EN_MASK				BIT(5)
 #define PLL_OUTPUT_FREQUENCY_DIV_BY_1		0
 #define PLL_OUTPUT_FREQUENCY_DIV_BY_2		1
+/* Analog Register Part: reg0b */
+#define CLOCK_LANE_VOD_RANGE_SET_MASK	GENMASK(3, 0)
+#define CLOCK_LANE_VOD_RANGE_SET(x)	UPDATE(x, 3, 0)
+#define VOD_MIN_RANGE			0x1
+#define VOD_MID_RANGE			0x3
+#define VOD_BIG_RANGE			0x7
+#define VOD_MAX_RANGE			0xf
 /* Analog Register Part: reg1e */
 #define PLL_MODE_SEL_MASK			GENMASK(6, 5)
 #define PLL_MODE_SEL_LVDS_MODE			0
@@ -106,20 +122,22 @@
 #define T_LPX_CNT_MASK				GENMASK(5, 0)
 #define T_LPX_CNT(x)				UPDATE(x, 5, 0)
 /* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg06 */
+#define T_HS_ZERO_CNT_HI_MASK			BIT(7)
+#define T_HS_ZERO_CNT_HI(x)			UPDATE(x, 7, 7)
 #define T_HS_PREPARE_CNT_MASK			GENMASK(6, 0)
 #define T_HS_PREPARE_CNT(x)			UPDATE(x, 6, 0)
 /* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg07 */
-#define T_HS_ZERO_CNT_MASK			GENMASK(5, 0)
-#define T_HS_ZERO_CNT(x)			UPDATE(x, 5, 0)
+#define T_HS_ZERO_CNT_LO_MASK			GENMASK(5, 0)
+#define T_HS_ZERO_CNT_LO(x)			UPDATE(x, 5, 0)
 /* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg08 */
 #define T_HS_TRAIL_CNT_MASK			GENMASK(6, 0)
 #define T_HS_TRAIL_CNT(x)			UPDATE(x, 6, 0)
 /* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg09 */
-#define T_HS_EXIT_CNT_MASK			GENMASK(4, 0)
-#define T_HS_EXIT_CNT(x)			UPDATE(x, 4, 0)
+#define T_HS_EXIT_CNT_LO_MASK			GENMASK(4, 0)
+#define T_HS_EXIT_CNT_LO(x)			UPDATE(x, 4, 0)
 /* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg0a */
-#define T_CLK_POST_CNT_MASK			GENMASK(3, 0)
-#define T_CLK_POST_CNT(x)			UPDATE(x, 3, 0)
+#define T_CLK_POST_CNT_LO_MASK			GENMASK(3, 0)
+#define T_CLK_POST_CNT_LO(x)			UPDATE(x, 3, 0)
 /* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg0c */
 #define LPDT_TX_PPI_SYNC_MASK			BIT(2)
 #define LPDT_TX_PPI_SYNC_ENABLE			BIT(2)
@@ -133,9 +151,13 @@
 #define T_CLK_PRE_CNT_MASK			GENMASK(3, 0)
 #define T_CLK_PRE_CNT(x)			UPDATE(x, 3, 0)
 /* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg10 */
+#define T_CLK_POST_HI_MASK			GENMASK(7, 6)
+#define T_CLK_POST_HI(x)			UPDATE(x, 7, 6)
 #define T_TA_GO_CNT_MASK			GENMASK(5, 0)
 #define T_TA_GO_CNT(x)				UPDATE(x, 5, 0)
 /* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg11 */
+#define T_HS_EXIT_CNT_HI_MASK			BIT(6)
+#define T_HS_EXIT_CNT_HI(x)			UPDATE(x, 6, 6)
 #define T_TA_SURE_CNT_MASK			GENMASK(5, 0)
 #define T_TA_SURE_CNT(x)			UPDATE(x, 5, 0)
 /* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg12 */
@@ -173,6 +195,76 @@
 #define DSI_PHY_STATUS			0xb0
 #define PHY_LOCK			BIT(0)
 
+enum phy_process_type {
+	SMIC40LL,
+	TSMC22ULP,
+};
+
+struct inno_video_mipi_dphy_timing {
+	unsigned int max_lane_mbps;
+	u8 lpx;
+	u8 hs_prepare;
+	u8 clk_lane_hs_zero;
+	u8 data_lane_hs_zero;
+	u8 hs_trail;
+};
+
+struct inno_video_mipi_dphy_info {
+	const struct inno_video_mipi_dphy_timing *inno_mipi_dphy_timing_table;
+	const unsigned int num_timings;
+	enum phy_process_type phy_process_type;
+};
+
+static const
+struct inno_video_mipi_dphy_timing inno_mipi_dphy_timing_table_smic40ll[] = {
+	{ 110, 0x0, 0x20, 0x16, 0x02, 0x22},
+	{ 150, 0x0, 0x06, 0x16, 0x03, 0x45},
+	{ 200, 0x0, 0x18, 0x17, 0x04, 0x0b},
+	{ 250, 0x0, 0x05, 0x17, 0x05, 0x16},
+	{ 300, 0x0, 0x51, 0x18, 0x06, 0x2c},
+	{ 400, 0x0, 0x64, 0x19, 0x07, 0x33},
+	{ 500, 0x0, 0x20, 0x1b, 0x07, 0x4e},
+	{ 600, 0x0, 0x6a, 0x1d, 0x08, 0x3a},
+	{ 700, 0x0, 0x3e, 0x1e, 0x08, 0x6a},
+	{ 800, 0x0, 0x21, 0x1f, 0x09, 0x29},
+	{1000, 0x0, 0x09, 0x20, 0x09, 0x27},
+};
+
+static const
+struct inno_video_mipi_dphy_timing inno_mipi_dphy_timing_table_tsmc22ulp[] = {
+	{ 110, 0x02, 0x7f, 0x16, 0x02, 0x02},
+	{ 150, 0x02, 0x7f, 0x16, 0x03, 0x02},
+	{ 200, 0x02, 0x7f, 0x17, 0x04, 0x02},
+	{ 250, 0x02, 0x7f, 0x17, 0x05, 0x04},
+	{ 300, 0x02, 0x7f, 0x18, 0x06, 0x04},
+	{ 400, 0x03, 0x7e, 0x19, 0x07, 0x04},
+	{ 500, 0x03, 0x7c, 0x1b, 0x07, 0x08},
+	{ 600, 0x03, 0x70, 0x1d, 0x08, 0x10},
+	{ 700, 0x05, 0x40, 0x1e, 0x08, 0x30},
+	{ 800, 0x05, 0x02, 0x1f, 0x09, 0x30},
+	{1000, 0x05, 0x08, 0x20, 0x09, 0x30},
+	{1200, 0x06, 0x03, 0x32, 0x14, 0x0f},
+	{1400, 0x09, 0x03, 0x32, 0x14, 0x0f},
+	{1600, 0x0d, 0x42, 0x36, 0x0e, 0x0f},
+	{1800, 0x0e, 0x47, 0x7a, 0x0e, 0x0f},
+	{2000, 0x11, 0x64, 0x7a, 0x0e, 0x0b},
+	{2200, 0x13, 0x64, 0x7e, 0x15, 0x0b},
+	{2400, 0x13, 0x33, 0x7f, 0x15, 0x6a},
+	{2500, 0x15, 0x54, 0x7f, 0x15, 0x6a},
+};
+
+const struct inno_video_mipi_dphy_info inno_video_mipi_dphy_smic4011 = {
+	.inno_mipi_dphy_timing_table = inno_mipi_dphy_timing_table_smic40ll,
+	.num_timings = ARRAY_SIZE(inno_mipi_dphy_timing_table_smic40ll),
+	.phy_process_type = SMIC40LL,
+};
+
+const struct inno_video_mipi_dphy_info inno_video_mipi_dphy_tsmc22ulp = {
+	.inno_mipi_dphy_timing_table = inno_mipi_dphy_timing_table_tsmc22ulp,
+	.num_timings = ARRAY_SIZE(inno_mipi_dphy_timing_table_tsmc22ulp),
+	.phy_process_type = TSMC22ULP,
+};
+
 struct mipi_dphy_timing {
 	unsigned int clkmiss;
 	unsigned int clkpost;
@@ -200,8 +292,10 @@ struct mipi_dphy_timing {
 
 struct inno_video_phy {
 	enum phy_mode mode;
+	const struct inno_video_mipi_dphy_info *mipi_dphy_info;
 	struct resource phy;
 	struct resource host;
+	int lanes;
 	struct {
 		u8 prediv;
 		u16 fbdiv;
@@ -271,37 +365,47 @@ static void mipi_dphy_timing_get_default(struct mipi_dphy_timing *timing,
 	timing->wakeup = 1000000000;
 }
 
-static void inno_video_phy_mipi_mode_enable(struct inno_video_phy *inno)
+static const struct inno_video_mipi_dphy_timing *
+inno_mipi_dphy_get_timing(struct inno_video_phy *inno)
 {
-	struct mipi_dphy_timing gotp;
-	const struct {
-		unsigned long rate;
-		u8 hs_prepare;
-		u8 clk_lane_hs_zero;
-		u8 data_lane_hs_zero;
-		u8 hs_trail;
-	} timings[] = {
-		{ 110000000, 0x20, 0x16, 0x02, 0x22},
-		{ 150000000, 0x06, 0x16, 0x03, 0x45},
-		{ 200000000, 0x18, 0x17, 0x04, 0x0b},
-		{ 250000000, 0x05, 0x17, 0x05, 0x16},
-		{ 300000000, 0x51, 0x18, 0x06, 0x2c},
-		{ 400000000, 0x64, 0x19, 0x07, 0x33},
-		{ 500000000, 0x20, 0x1b, 0x07, 0x4e},
-		{ 600000000, 0x6a, 0x1d, 0x08, 0x3a},
-		{ 700000000, 0x3e, 0x1e, 0x08, 0x6a},
-		{ 800000000, 0x21, 0x1f, 0x09, 0x29},
-		{1000000000, 0x09, 0x20, 0x09, 0x27},
-	};
-	u32 t_txbyteclkhs, t_txclkesc, ui;
-	u32 txbyteclkhs, txclkesc, esc_clk_div;
-	u32 hs_exit, clk_post, clk_pre, wakeup, lpx, ta_go, ta_sure, ta_wait;
-	u32 hs_prepare, hs_trail, hs_zero, clk_lane_hs_zero, data_lane_hs_zero;
+	const struct inno_video_mipi_dphy_timing *timings;
+	unsigned int num_timings;
+	unsigned int lane_mbps = inno->pll.rate / USEC_PER_SEC;
 	unsigned int i;
 
-	/* Select MIPI mode */
-	phy_update_bits(inno, REGISTER_PART_LVDS, 0x03,
-			MODE_ENABLE_MASK, MIPI_MODE_ENABLE);
+	timings = inno->mipi_dphy_info->inno_mipi_dphy_timing_table;
+	num_timings = inno->mipi_dphy_info->num_timings;
+
+	for (i = 0; i < num_timings; i++)
+		if (lane_mbps <= timings[i].max_lane_mbps)
+			break;
+
+	if (i == num_timings)
+		--i;
+
+	return &timings[i];
+}
+
+static void inno_mipi_dphy_tsmc22ulp_pll_enable(struct inno_video_phy *inno)
+{
+	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x03,
+			REG_PREDIV_MASK, REG_PREDIV(inno->pll.prediv));
+	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x03,
+			REG_FBDIV_HI_MASK, REG_FBDIV_HI(inno->pll.fbdiv >> 8));
+	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x04,
+			REG_FBDIV_LO_MASK, REG_FBDIV_LO(inno->pll.fbdiv));
+	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x08,
+			PLL_POST_DIV_ENABLE_MASK, PLL_POST_DIV_ENABLE);
+	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x0b,
+			CLOCK_LANE_VOD_RANGE_SET_MASK,
+			CLOCK_LANE_VOD_RANGE_SET(VOD_MAX_RANGE));
+	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x01,
+			REG_LDOPD_MASK | REG_PLLPD_MASK,
+			REG_LDOPD_POWER_ON | REG_PLLPD_POWER_ON);
+}
+
+static void inno_mipi_dphy_smic40ll_pll_enable(struct inno_video_phy *inno)
+{
 	/* Configure PLL */
 	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x03,
 			REG_PREDIV_MASK, REG_PREDIV(inno->pll.prediv));
@@ -313,22 +417,36 @@ static void inno_video_phy_mipi_mode_enable(struct inno_video_phy *inno)
 	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x01,
 			REG_LDOPD_MASK | REG_PLLPD_MASK,
 			REG_LDOPD_POWER_ON | REG_PLLPD_POWER_ON);
+}
+
+static void inno_mipi_dphy_reset(struct inno_video_phy *inno)
+{
 	/* Reset analog */
 	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x01,
-			REG_SYNCRST_MASK, REG_SYNCRST_RESET);
+			 REG_SYNCRST_MASK, REG_SYNCRST_RESET);
 	udelay(1);
 	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x01,
-			REG_SYNCRST_MASK, REG_SYNCRST_NORMAL);
+			 REG_SYNCRST_MASK, REG_SYNCRST_NORMAL);
 	/* Reset digital */
 	phy_update_bits(inno, REGISTER_PART_DIGITAL, 0x00,
-			REG_DIG_RSTN_MASK, REG_DIG_RSTN_RESET);
+			 REG_DIG_RSTN_MASK, REG_DIG_RSTN_RESET);
 	udelay(1);
 	phy_update_bits(inno, REGISTER_PART_DIGITAL, 0x00,
-			REG_DIG_RSTN_MASK, REG_DIG_RSTN_NORMAL);
+			 REG_DIG_RSTN_MASK, REG_DIG_RSTN_NORMAL);
+}
+
+static void inno_mipi_dphy_timing_init(struct inno_video_phy *inno)
+{
+	struct mipi_dphy_timing gotp;
+	u32 t_txbyteclkhs, t_txclkesc, ui;
+	u32 txbyteclkhs, txclkesc, esc_clk_div;
+	u32 hs_exit, clk_post, clk_pre, wakeup, lpx, ta_go, ta_sure, ta_wait;
+	u32 hs_prepare, hs_trail, hs_zero, clk_lane_hs_zero, data_lane_hs_zero;
+	const struct inno_video_mipi_dphy_timing *timing;
+	unsigned int i;
 
 	txbyteclkhs = inno->pll.rate / 8;
 	t_txbyteclkhs = div_u64(PSEC_PER_SEC, txbyteclkhs);
-
 	esc_clk_div = DIV_ROUND_UP(txbyteclkhs, 20000000);
 	txclkesc = txbyteclkhs / esc_clk_div;
 	t_txclkesc = div_u64(PSEC_PER_SEC, txclkesc);
@@ -381,17 +499,24 @@ static void inno_video_phy_mipi_mode_enable(struct inno_video_phy *inno)
 	 */
 	ta_wait = DIV_ROUND_UP(gotp.taget, t_txclkesc);
 
-	for (i = 0; i < ARRAY_SIZE(timings); i++)
-		if (inno->pll.rate <= timings[i].rate)
-			break;
+	timing = inno_mipi_dphy_get_timing(inno);
 
-	if (i == ARRAY_SIZE(timings))
-		--i;
+	/*
+	 * The value of counter for HS Tlpx Time
+	 * Tlpx = Tpin_txbyteclkhs * (2 + value)
+	 */
+	if (inno->mipi_dphy_info->phy_process_type == SMIC40LL) {
+		lpx = DIV_ROUND_UP(gotp.lpx, t_txbyteclkhs);
+		if (lpx >= 2)
+			lpx -= 2;
+	} else {
+		lpx = timing->lpx;
+	}
 
-	hs_prepare = timings[i].hs_prepare;
-	hs_trail = timings[i].hs_trail;
-	clk_lane_hs_zero = timings[i].clk_lane_hs_zero;
-	data_lane_hs_zero = timings[i].data_lane_hs_zero;
+	hs_prepare = timing->hs_prepare;
+	hs_trail = timing->hs_trail;
+	clk_lane_hs_zero = timing->clk_lane_hs_zero;
+	data_lane_hs_zero = timing->data_lane_hs_zero;
 	wakeup = 0x3ff;
 
 	for (i = REGISTER_PART_CLOCK_LANE; i <= REGISTER_PART_DATA3_LANE; i++) {
@@ -404,14 +529,29 @@ static void inno_video_phy_mipi_mode_enable(struct inno_video_phy *inno)
 				T_LPX_CNT(lpx));
 		phy_update_bits(inno, i, 0x06, T_HS_PREPARE_CNT_MASK,
 				T_HS_PREPARE_CNT(hs_prepare));
-		phy_update_bits(inno, i, 0x07, T_HS_ZERO_CNT_MASK,
-				T_HS_ZERO_CNT(hs_zero));
+
+		if (inno->mipi_dphy_info->phy_process_type == TSMC22ULP)
+			phy_update_bits(inno, i, 0x06, T_HS_ZERO_CNT_HI_MASK,
+					T_HS_ZERO_CNT_HI(hs_zero >> 6));
+
+		phy_update_bits(inno, i, 0x07, T_HS_ZERO_CNT_LO_MASK,
+				T_HS_ZERO_CNT_LO(hs_zero));
 		phy_update_bits(inno, i, 0x08, T_HS_TRAIL_CNT_MASK,
 				T_HS_TRAIL_CNT(hs_trail));
-		phy_update_bits(inno, i, 0x09, T_HS_EXIT_CNT_MASK,
-				T_HS_EXIT_CNT(hs_exit));
-		phy_update_bits(inno, i, 0x0a, T_CLK_POST_CNT_MASK,
-				T_CLK_POST_CNT(clk_post));
+
+		if (inno->mipi_dphy_info->phy_process_type == TSMC22ULP)
+			phy_update_bits(inno, i, 0x11, T_HS_EXIT_CNT_HI_MASK,
+					T_HS_EXIT_CNT_HI(hs_exit >> 5));
+
+		phy_update_bits(inno, i, 0x09, T_HS_EXIT_CNT_LO_MASK,
+				T_HS_EXIT_CNT_LO(hs_exit));
+
+		if (inno->mipi_dphy_info->phy_process_type == TSMC22ULP)
+			phy_update_bits(inno, i, 0x10, T_CLK_POST_HI_MASK,
+					T_CLK_POST_HI(clk_post >> 4));
+
+		phy_update_bits(inno, i, 0x0a, T_CLK_POST_CNT_LO_MASK,
+				T_CLK_POST_CNT_LO(clk_post));
 		phy_update_bits(inno, i, 0x0e, T_CLK_PRE_CNT_MASK,
 				T_CLK_PRE_CNT(clk_pre));
 		phy_update_bits(inno, i, 0x0c, T_WAKEUP_CNT_HI_MASK,
@@ -425,11 +565,45 @@ static void inno_video_phy_mipi_mode_enable(struct inno_video_phy *inno)
 		phy_update_bits(inno, i, 0x12, T_TA_WAIT_CNT_MASK,
 				T_TA_WAIT_CNT(ta_wait));
 	}
+}
 
-	/* Enable all lanes on analog part */
-	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x00,
-			LANE_EN_MASK, LANE_EN_CK | LANE_EN_3 | LANE_EN_2 |
-			LANE_EN_1 | LANE_EN_0);
+static void inno_mipi_dphy_lane_enable(struct inno_video_phy *inno)
+{
+	u8 val = LANE_EN_CK;
+
+	switch (inno->lanes) {
+	case 1:
+		val |= LANE_EN_0;
+		break;
+	case 2:
+		val |= LANE_EN_1 | LANE_EN_0;
+		break;
+	case 3:
+		val |= LANE_EN_2 | LANE_EN_1 | LANE_EN_0;
+		break;
+	case 4:
+	default:
+		val |= LANE_EN_3 | LANE_EN_2 | LANE_EN_1 | LANE_EN_0;
+		break;
+	}
+
+	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x00, LANE_EN_MASK, val);
+}
+
+static void inno_video_phy_mipi_mode_enable(struct inno_video_phy *inno)
+{
+	/* Select MIPI mode */
+	phy_update_bits(inno, REGISTER_PART_LVDS, 0x03,
+			MODE_ENABLE_MASK, MIPI_MODE_ENABLE);
+
+	if (inno->mipi_dphy_info->phy_process_type == TSMC22ULP)
+		inno_mipi_dphy_tsmc22ulp_pll_enable(inno);
+	else
+		inno_mipi_dphy_smic40ll_pll_enable(inno);
+
+	inno_mipi_dphy_reset(inno);
+	inno_mipi_dphy_timing_init(inno);
+	inno_mipi_dphy_lane_enable(inno);
 }
 
 static void inno_video_phy_lvds_mode_enable(struct inno_video_phy *inno)
@@ -672,20 +846,24 @@ static int inno_video_phy_set_mode(struct rockchip_phy *phy,
 	return 0;
 }
 
-static const struct rockchip_phy_funcs inno_video_phy_funcs = {
-	.power_on = inno_video_phy_power_on,
-	.power_off = inno_video_phy_power_off,
-	.set_pll = inno_video_phy_set_pll,
-	.set_mode = inno_video_phy_set_mode,
-};
-
 static int inno_video_phy_probe(struct udevice *dev)
 {
 	struct inno_video_phy *inno = dev_get_priv(dev);
-	struct rockchip_phy *phy =
-		(struct rockchip_phy *)dev_get_driver_data(dev);
+	struct rockchip_phy *tmp_phy;
+	struct rockchip_phy *phy;
 	int ret;
 
+	phy = calloc(1, sizeof(*phy));
+	if (!phy)
+		return -ENOMEM;
+
+	tmp_phy = (struct rockchip_phy *)dev_get_driver_data(dev);
+	dev->driver_data = (ulong)phy;
+	memcpy(phy, tmp_phy, sizeof(*phy));
+
+	inno->mipi_dphy_info = phy->data;
+	inno->lanes = ofnode_read_u32_default(dev->node, "inno,lanes", 4);
+
 	ret = dev_read_resource(dev, 0, &inno->phy);
 	if (ret < 0) {
 		dev_err(dev, "resource \"phy\" not found\n");
@@ -703,26 +881,39 @@ static int inno_video_phy_probe(struct udevice *dev)
 	return 0;
 }
 
-static struct rockchip_phy inno_video_phy_driver_data = {
+static const struct rockchip_phy_funcs inno_video_phy_funcs = {
+	.power_on = inno_video_phy_power_on,
+	.power_off = inno_video_phy_power_off,
+	.set_pll = inno_video_phy_set_pll,
+	.set_mode = inno_video_phy_set_mode,
+};
+
+static struct rockchip_phy inno_video_phy_smic40ll_driver_data = {
+	 .funcs = &inno_video_phy_funcs,
+	 .data = &inno_video_mipi_dphy_smic4011,
+};
+
+static struct rockchip_phy inno_video_phy_tsmc22ulp_driver_data = {
 	 .funcs = &inno_video_phy_funcs,
+	 .data = &inno_video_mipi_dphy_tsmc22ulp,
 };
 
 static const struct udevice_id inno_video_phy_ids[] = {
 	{
 		.compatible = "rockchip,px30-video-phy",
-		.data = (ulong)&inno_video_phy_driver_data,
+		.data = (ulong)&inno_video_phy_smic40ll_driver_data,
 	},
 	{
 		.compatible = "rockchip,rk3128-video-phy",
-		.data = (ulong)&inno_video_phy_driver_data,
+		.data = (ulong)&inno_video_phy_smic40ll_driver_data,
 	},
 	{
 		.compatible = "rockchip,rk3368-video-phy",
-		.data = (ulong)&inno_video_phy_driver_data,
+		.data = (ulong)&inno_video_phy_smic40ll_driver_data,
 	},
 	{
 		.compatible = "rockchip,rk3568-video-phy",
-		.data = (ulong)&inno_video_phy_driver_data,
+		.data = (ulong)&inno_video_phy_tsmc22ulp_driver_data,
 	},
 	{}
 };

commit 83dea2110bafa94e9ff1bfb4fbb346cf63c140c2
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed Jun 30 20:23:07 2021 +0800

    rockchip: dts: rk3568: Set spinand 75MHz in default
    
    1.RK356x support 75MHz and 100MHz SFC sclk
    2.The 75MHz is more compatible for most spinand devices
    
    Change-Id: Ibcffabc7203c6db4e35d9b0b813093c66532fedf
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/dts/rk3568-u-boot.dtsi b/arch/arm/dts/rk3568-u-boot.dtsi
index f4a466e327..bcec6fe1db 100644
--- a/arch/arm/dts/rk3568-u-boot.dtsi
+++ b/arch/arm/dts/rk3568-u-boot.dtsi
@@ -117,7 +117,7 @@
 		reg = <0>;
 		spi-tx-bus-width = <1>;
 		spi-rx-bus-width = <4>;
-		spi-max-frequency = <96000000>;
+		spi-max-frequency = <75000000>;
 	};
 
 	spi_nor: flash@1 {

commit 1e4145355cf4059d137a0b62a2806f2e99cac81a
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Wed Jun 30 11:39:22 2021 +0800

    clk: rockchip: rk3568: fix up the sfc clk rate unit error
    
    Change-Id: Iae8571a7c2d185883ea6bf263813b94c101560aa
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3568.c b/drivers/clk/rockchip/clk_rk3568.c
index 11dd460933..94277a6efd 100644
--- a/drivers/clk/rockchip/clk_rk3568.c
+++ b/drivers/clk/rockchip/clk_rk3568.c
@@ -1529,7 +1529,7 @@ static ulong rk3568_sfc_get_clk(struct rk3568_clk_priv *priv)
 	case SCLK_SFC_SEL_125M:
 		return 125 * MHz;
 	case SCLK_SFC_SEL_150M:
-		return 150 * KHz;
+		return 150 * MHz;
 	default:
 		return -ENOENT;
 	}
@@ -1556,7 +1556,7 @@ static ulong rk3568_sfc_set_clk(struct rk3568_clk_priv *priv, ulong rate)
 	case 125 * MHz:
 		src_clk = SCLK_SFC_SEL_125M;
 		break;
-	case 150 * KHz:
+	case 150 * MHz:
 		src_clk = SCLK_SFC_SEL_150M;
 		break;
 	default:

commit e8897b959fe8f37092caad9e41526f8fdf2b5344
Author: Wesley Yao <wesley.yao@rock-chips.com>
Date:   Wed Jun 23 15:09:51 2021 +0800

    drivers: ram: rv1126: fix sdram_detect_row of LPDDR4/X
    
    1. Support 1Gb (per channel);
    2. Support Byte (x8) mode;
    2. Return error when row >= 17, because DDRC cannot support;
    3. Return error when getting wrong value of MR8.
    
    Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
    Change-Id: I9580dcf5ada51f1df7131bd68a158a26a6d8e986

diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
index 9f5dfd028a..d514433459 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -2606,15 +2606,29 @@ static u64 dram_detect_cap(struct dram_info *dram,
 
 		sdram_detect_row_3_4(cap_info, coltmp, bktmp);
 	} else {
-		mr8 = (read_mr(dram, 1, 8, dram_type) >> 2) & 0xf;
 		cap_info->col = 10;
 		cap_info->bk = 3;
-		cap_info->cs0_row = 14 + (mr8 + 1) / 2;
-		if (mr8 % 2)
-			cap_info->row_3_4 = 1;
-		else
-			cap_info->row_3_4 = 0;
-		cap_info->dbw = 1;
+		mr8 = read_mr(dram, 1, 8, dram_type);
+		cap_info->dbw = ((mr8 >> 6) & 0x3) == 0 ? 1 : 0;
+		mr8 = (mr8 >> 2) & 0xf;
+		if (mr8 >= 0 && mr8 <= 6) {
+			cap_info->cs0_row = 14 + (mr8 + 1) / 2;
+		} else if (mr8 == 0xc) {
+			cap_info->cs0_row = 13;
+		} else {
+			printascii("Cap ERR: Fail to get cap of LPDDR4/X from MR8\n");
+			goto cap_err;
+		}
+		if (cap_info->dbw == 0)
+			cap_info->cs0_row++;
+		cap_info->row_3_4 = mr8 % 2 == 1 ? 1 : 0;
+		if (cap_info->cs0_row >= 17) {
+			printascii("Cap ERR: ");
+			printascii("RV1126 LPDDR4/X cannot support row >= 17\n");
+			goto cap_err;
+			// cap_info->cs0_row = 16;
+			// cap_info->row_3_4 = 0;
+		}
 		cap_info->bw = 2;
 	}
 

commit 1ad4a306e52bb239ef8f19299bb9d68d462a6c72
Author: Wesley Yao <wesley.yao@rock-chips.com>
Date:   Thu Jun 24 18:31:36 2021 +0800

    drivers: ram: rv1126: Use ARRAY_SIZE to calculate copy size to
    set ADDRMAP regs
    
    Use ARRAY_SIZE to prevent error when changing array size of addrmap.
    
    Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
    Change-Id: I33300fdb0b3638eb44b803df8fed4029e09c24d8

diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
index 3b40525aed..9f5dfd028a 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -536,7 +536,7 @@ static void set_ctl_address_map(struct dram_info *dram,
 	}
 
 	sdram_copy_to_reg((u32 *)(pctl_base + DDR_PCTL2_ADDRMAP0),
-			  &addrmap[ddrconf][0], 9 * 4);
+			  &addrmap[ddrconf][0], ARRAY_SIZE(addrmap[ddrconf]) * 4);
 
 	/* unused row set to 0xf */
 	for (i = 17; i >= row; i--)

commit a4bbeacc32cd36488afc132bd0c016243ab5429e
Author: Wesley Yao <wesley.yao@rock-chips.com>
Date:   Wed Jun 23 15:52:48 2021 +0800

    drivers: ram: rv1126: Add addrmap for ddrconf 23~28
    
    Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
    Change-Id: Ic41d8faa4485ed2ae05eb4e1540aa258a2dedcf9

diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
index 6e3cfe1cd5..3b40525aed 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -180,7 +180,7 @@ u8 d4_rbc_2_d3_rbc[][2] = {
 	{21, 3}
 };
 
-u32 addrmap[23][9] = {
+u32 addrmap[29][9] = {
 	{24, 0x00090909, 0x00000000, 0x00000000, 0x00001f00, 0x08080808,
 		0x08080808, 0x00000f0f, 0x3f3f}, /* 0 */
 	{23, 0x00080808, 0x00000000, 0x00000000, 0x00001f1f, 0x07070707,
@@ -228,7 +228,20 @@ u32 addrmap[23][9] = {
 	{23, 0x003f0909, 0x00000006, 0x1f1f0000, 0x00001f1f, 0x06060606,
 		0x06060606, 0x00000f06, 0x0600}, /* 21 */
 	{21, 0x00060606, 0x00000000, 0x1f1f0000, 0x00001f1f, 0x05050505,
-		0x05050505, 0x00000f0f, 0x3f3f} /* 22 */
+		0x05050505, 0x00000f0f, 0x3f3f}, /* 22 */
+
+	{24, 0x00080808, 0x00000000, 0x00000000, 0x00001f1f, 0x07070707,
+		0x07070707, 0x00000f07, 0x3f3f}, /* 23 */
+	{23, 0x003f0909, 0x00000000, 0x00000000, 0x00001f00, 0x07070707,
+		0x07070707, 0x00000f0f, 0x3f3f}, /* 24 */
+	{7, 0x003f0909, 0x00000000, 0x00000000, 0x00001f00, 0x08080808,
+		0x08080808, 0x00000f0f, 0x3f3f}, /* 25 */
+	{6, 0x003f0808, 0x00000000, 0x00000000, 0x00001f1f, 0x07070707,
+		0x07070707, 0x00000f07, 0x3f3f}, /* 26 */
+	{23, 0x003f0808, 0x00000000, 0x00000000, 0x00001f1f, 0x06060606,
+		0x06060606, 0x00000f06, 0x3f3f}, /* 27 */
+	{24, 0x003f0909, 0x00000000, 0x00000000, 0x00001f00, 0x07070707,
+		0x07070707, 0x00000f07, 0x3f3f} /* 28 */
 };
 
 static u8 dq_sel[22][3] = {

commit 2478d2da6551a83ab5bf4872c2c0e1bddc7df04a
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Jun 29 10:25:00 2021 +0800

    configs: rv1126: support CONFIG_SPL_MMC_WRITE
    
    The a/b info need write in SPL.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I69ccb8db0067690ed493c95898193d3a14683939

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index 73ceee6f50..f7ca57610b 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -42,6 +42,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
 CONFIG_SPL_SHA256_SUPPORT=y
 CONFIG_SPL_CRYPTO_SUPPORT=y
 CONFIG_SPL_HASH_SUPPORT=y
+CONFIG_SPL_MMC_WRITE=y
 CONFIG_SPL_MTD_SUPPORT=y
 CONFIG_SPL_MTD_WRITE=y
 CONFIG_SPL_OPTEE=y

commit e425562e6a2475855f0463f8ebd980856d6d0845
Author: Zorro Liu <lyx@rock-chips.com>
Date:   Tue Jun 29 09:09:15 2021 +0800

    drivers: video: rk_eink: adjust panel power on/off sequence
    
    Signed-off-by: Zorro Liu <lyx@rock-chips.com>
    Change-Id: I26156fb8b605d7b2b85214ba5ad42fff070d696a

diff --git a/drivers/video/rk_eink/rk_eink_display.c b/drivers/video/rk_eink/rk_eink_display.c
index a2040dd836..a8db27a5cb 100644
--- a/drivers/video/rk_eink/rk_eink_display.c
+++ b/drivers/video/rk_eink/rk_eink_display.c
@@ -424,27 +424,27 @@ static int ebc_power_set(struct udevice *dev, int is_on)
 	struct rk_ebc_pwr_ops *pwr_ops = ebc_pwr_get_ops(ebc_pwr_dev);
 
 	if (is_on) {
-		ret = ebc_tcon_ops->enable(ebc_tcon_dev, panel);
-		if (ret) {
-			printf("%s, ebc tcon enabled failed\n", __func__);
-			return -1;
-		}
 		ret = pwr_ops->power_on(ebc_pwr_dev);
 		if (ret) {
 			printf("%s, power on failed\n", __func__);
 			return -1;
 		}
-	} else {
-		ret = pwr_ops->power_down(ebc_pwr_dev);
+		ret = ebc_tcon_ops->enable(ebc_tcon_dev, panel);
 		if (ret) {
-			printf("%s, power_down failed\n", __func__);
+			printf("%s, ebc tcon enabled failed\n", __func__);
 			return -1;
 		}
+	} else {
 		ret = ebc_tcon_ops->disable(ebc_tcon_dev);
 		if (ret) {
 			printf("%s, ebc tcon disable failed\n", __func__);
 			return -1;
 		}
+		ret = pwr_ops->power_down(ebc_pwr_dev);
+		if (ret) {
+			printf("%s, power_down failed\n", __func__);
+			return -1;
+		}
 	}
 	return 0;
 }

commit 535bd67a2a2a59400bb4207e6d55d531090d12b2
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Jun 18 19:47:47 2021 +0800

    mtd: nand: rockchip: Support S34ML08G2
    
    Change-Id: I4813fcc328af5fcc061ca486414b4f62948e1c2c
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/raw/rockchip_nand_spl_v9.c b/drivers/mtd/nand/raw/rockchip_nand_spl_v9.c
index 3874237b09..bce03d9106 100644
--- a/drivers/mtd/nand/raw/rockchip_nand_spl_v9.c
+++ b/drivers/mtd/nand/raw/rockchip_nand_spl_v9.c
@@ -368,8 +368,12 @@ static int rockchip_nandc_probe(struct udevice *dev)
 			nand_page_num = 128;
 			nand_block_num = 4096;
 		} else if (id[1] == 0xD3) {
-			nand_page_size = 4096;
-			nand_block_num = 4096;
+			if (id[2] == 0xD1 && id[4] == 0x5a) { /* S34ML08G2 */
+				nand_block_num = 8192;
+			} else {
+				nand_page_size = 4096;
+				nand_block_num = 4096;
+			}
 		}
 
 		g_rk_nand->chipnr = 1;

commit e007876d57ccddd41c06e74cf1b30e07f727ac34
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Fri Jun 25 14:10:49 2021 +0800

    drm/rockchip: vop2: use the first unplug devices as main display
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: I38b5349c538a06a50771ec5d413db1c0d462da95

diff --git a/drivers/video/drm/rockchip_vop2.c b/drivers/video/drm/rockchip_vop2.c
index 51697e9916..da5fe6475e 100644
--- a/drivers/video/drm/rockchip_vop2.c
+++ b/drivers/video/drm/rockchip_vop2.c
@@ -1212,6 +1212,7 @@ static void vop2_global_initial(struct vop2 *vop2, struct display_state *state)
 			if (!is_hot_plug_devices(cstate->crtc->vps[i].output_type)) {
 				vop2->vp_plane_mask[i] = plane_mask[0]; /* the first store main display plane mask*/
 				main_vp_index = i;
+				break;
 			}
 		}
 

commit d49e7c34033a0a0b80d5d1c4c2f1a45fa58a285b
Author: Wesley Yao <wesley.yao@rock-chips.com>
Date:   Wed Jun 23 15:46:14 2021 +0800

    drivers: ram: rv1126: fix the judgment of "set ctl address map fail"
    
    If ddrconf == ARRAY_SIZE(addrmap), it is also set ctl address map fail.
    
    Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
    Change-Id: I3f8d088f61ab43f50f45e33e296fdc89aa968ce1

diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
index 8b0cf23e4c..6e3cfe1cd5 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -517,7 +517,7 @@ static void set_ctl_address_map(struct dram_info *dram,
 		}
 	}
 
-	if (ddrconf > ARRAY_SIZE(addrmap)) {
+	if (ddrconf >= ARRAY_SIZE(addrmap)) {
 		printascii("set ctl address map fail\n");
 		return;
 	}

commit 06a17b4adf5d0f0f830bd522f4d8e12d9a1b5f09
Author: Wesley Yao <wesley.yao@rock-chips.com>
Date:   Thu Jun 17 10:08:00 2021 +0800

    drivers: ram: rv1126: Turn on DQS_c 2k pull-up resistor to workaround
    WDQS control of LPDDR4/LPDDR4X
    
    Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
    Change-Id: I82c5084fb62866e74810ec09ae8c392c2b8e9e23

diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
index 3202a54357..8b0cf23e4c 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -1042,6 +1042,8 @@ static void set_ds_odt(struct dram_info *dram,
 
 		clrsetbits_le32(PHY_REG(phy_base, 0x114 + i * 0x10),
 				1 << 3, phy_lp4_drv_pd_en << 3);
+		if (dramtype == LPDDR4 || dramtype == LPDDR4X)
+			clrbits_le32(PHY_REG(phy_base, 0x114 + i * 0x10), BIT(5));
 		/* dq slew rate */
 		clrsetbits_le32(PHY_REG(phy_base, 0x117 + i * 0x10),
 				0x1f, sr_dq);

commit cd88e9358790b0aed1d1fbd0f8523ca578ec0be9
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Wed Jun 23 19:48:59 2021 +0800

    rk356x: ddr: fix dbw detect bug
    
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>
    Change-Id: Ifadad00853eb0ad43a68f12335fd243e6a1bc04b

diff --git a/drivers/ram/rockchip/sdram_common.c b/drivers/ram/rockchip/sdram_common.c
index f10efb84a1..67d84e35ca 100644
--- a/drivers/ram/rockchip/sdram_common.c
+++ b/drivers/ram/rockchip/sdram_common.c
@@ -332,22 +332,22 @@ int sdram_detect_dbw(struct sdram_cap_info *cap_info, u32 dram_type)
 		bw = cap_info->bw;
 		cs_cap = (1 << (row + col + bk + bw - 20));
 		if (bw == 2) {
-			if (cs_cap <= 0x2000000) /* 256Mb */
+			if (cs_cap <= 0x20) /* 256Mb */
 				die_bw_0 = (col < 9) ? 2 : 1;
-			else if (cs_cap <= 0x10000000) /* 2Gb */
+			else if (cs_cap <= 0x100) /* 2Gb */
 				die_bw_0 = (col < 10) ? 2 : 1;
-			else if (cs_cap <= 0x40000000) /* 8Gb */
+			else if (cs_cap <= 0x400) /* 8Gb */
 				die_bw_0 = (col < 11) ? 2 : 1;
 			else
 				die_bw_0 = (col < 12) ? 2 : 1;
 			if (cs > 1) {
 				row = cap_info->cs1_row;
 				cs_cap = (1 << (row + col + bk + bw - 20));
-				if (cs_cap <= 0x2000000) /* 256Mb */
+				if (cs_cap <= 0x20) /* 256Mb */
 					die_bw_0 = (col < 9) ? 2 : 1;
-				else if (cs_cap <= 0x10000000) /* 2Gb */
+				else if (cs_cap <= 0x100) /* 2Gb */
 					die_bw_0 = (col < 10) ? 2 : 1;
-				else if (cs_cap <= 0x40000000) /* 8Gb */
+				else if (cs_cap <= 0x400) /* 8Gb */
 					die_bw_0 = (col < 11) ? 2 : 1;
 				else
 					die_bw_0 = (col < 12) ? 2 : 1;

commit 7f48d41aa4fe002eac37b2563cd277bf16b8e740
Author: wlq <wlq@rock-chips.com>
Date:   Fri Jun 11 10:10:48 2021 +0000

    configs: rk3566 add rk3566-nand.config  for nand
    
    Signed-off-by: wlq <wlq@rock-chips.com>
    Change-Id: Ifc84f4996add98ce9fc3b451b5a91b882a6594c9

diff --git a/configs/rk3566-nand.config b/configs/rk3566-nand.config
new file mode 100644
index 0000000000..dcffbc1d04
--- /dev/null
+++ b/configs/rk3566-nand.config
@@ -0,0 +1,2 @@
+CONFIG_BASE_DEFCONFIG="rk3568_defconfig"
+CONFIG_LOADER_INI="RK3566MINIALL_NAND.ini"
\ No newline at end of file

commit ef806aea7e46d376f90b71a457e30c9385bf8fac
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Tue Jun 15 11:18:13 2021 +0800

    spl: nand: remove garbage collection to reduce code size
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: I81346db66ee4d6747fbbccbe8fa04148d32630fb

diff --git a/drivers/rknand/rk_zftl_spl_arm_v8.S b/drivers/rknand/rk_zftl_spl_arm_v8.S
index 1667ce9692..9cfd23537f 100644
--- a/drivers/rknand/rk_zftl_spl_arm_v8.S
+++ b/drivers/rknand/rk_zftl_spl_arm_v8.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2021-01-07
+ * date: 2021-06-15
  */
 	.arch armv8-a+nosimd
 	.file	"rk_zftl_spl_arm_v8.S"
@@ -499,10 +499,10 @@ _list_update_data_list:
 	ldp	x29, x30, [sp], 80
 	ret
 	.size	_list_update_data_list, .-_list_update_data_list
-	.section	.text.nandc_de_cs.constprop.32,"ax",@progbits
+	.section	.text.nandc_de_cs.constprop.31,"ax",@progbits
 	.align	2
-	.type	nandc_de_cs.constprop.32, %function
-nandc_de_cs.constprop.32:
+	.type	nandc_de_cs.constprop.31, %function
+nandc_de_cs.constprop.31:
 	adrp	x0, .LANCHOR7
 	ldr	x1, [x0, #:lo12:.LANCHOR7]
 	ldr	w0, [x1]
@@ -510,7 +510,7 @@ nandc_de_cs.constprop.32:
 	and	w0, w0, -131073
 	str	w0, [x1]
 	ret
-	.size	nandc_de_cs.constprop.32, .-nandc_de_cs.constprop.32
+	.size	nandc_de_cs.constprop.31, .-nandc_de_cs.constprop.31
 	.section	.text.flash_read_status,"ax",@progbits
 	.align	2
 	.global	flash_read_status
@@ -1097,7 +1097,7 @@ flash_wait_device_ready_raw:
 	bl	udelay
 	ldr	w2, [x19, 2048]
 	and	w2, w2, 255
-	bl	nandc_de_cs.constprop.32
+	bl	nandc_de_cs.constprop.31
 	bics	wzr, w26, w2
 	bne	.L236
 	cmp	w2, 255
@@ -1872,7 +1872,7 @@ flash_erase_duplane_block:
 	mov	x0, x23
 	bl	flash_read_status
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.32
+	bl	nandc_de_cs.constprop.31
 	and	w19, w2, w19
 	orr	w19, w19, w22
 	cbz	w19, .L346
@@ -1982,7 +1982,7 @@ flash_erase_block_en:
 	mov	x0, x25
 	bl	flash_read_status
 	mov	w3, w0
-	bl	nandc_de_cs.constprop.32
+	bl	nandc_de_cs.constprop.31
 	mov	w0, 5
 	ands	w3, w3, w0
 	beq	.L369
@@ -2448,7 +2448,7 @@ flash_read_id:
 	strb	w0, [x19, 6]
 	ldr	w0, [x20, 2048]
 	strb	w0, [x19, 7]
-	bl	nandc_de_cs.constprop.32
+	bl	nandc_de_cs.constprop.31
 	ldrb	w2, [x19]
 	sub	w0, w2, #1
 	and	w0, w0, 255
@@ -2580,7 +2580,7 @@ flash_read_otp_data:
 	str	wzr, [x19, 2048]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
-	b	nandc_de_cs.constprop.32
+	b	nandc_de_cs.constprop.31
 	.size	flash_read_otp_data, .-flash_read_otp_data
 	.section	.text.sandisk_prog_test_bad_block,"ax",@progbits
 	.align	2
@@ -3644,6 +3644,74 @@ ftl_gc_write_buf:
 	strb	w0, [x1, #:lo12:.LANCHOR66]
 	ret
 	.size	ftl_gc_write_buf, .-ftl_gc_write_buf
+	.section	.text.ftl_write_buf,"ax",@progbits
+	.align	2
+	.global	ftl_write_buf
+	.type	ftl_write_buf, %function
+ftl_write_buf:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	str	x21, [sp, 32]
+	cbnz	x0, .L623
+	mov	w2, 806
+	adrp	x1, .LANCHOR67
+	adrp	x0, .LC0
+	add	x1, x1, :lo12:.LANCHOR67
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+	mov	w0, -1
+.L622:
+	ldp	x19, x20, [sp, 16]
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
+.L626:
+	mov	x1, x19
+	adrp	x0, .LANCHOR65
+	add	x0, x0, :lo12:.LANCHOR65
+	bl	buf_add_tail
+	adrp	x1, .LANCHOR69
+	ldrb	w3, [x19, 56]
+	ldrb	w0, [x21, #:lo12:.LANCHOR66]
+	ldr	x1, [x1, #:lo12:.LANCHOR69]
+	add	w0, w0, 1
+	and	w0, w0, 255
+	strb	w0, [x21, #:lo12:.LANCHOR66]
+	ldr	w2, [x1, 16]
+	add	w2, w2, w3
+	str	w2, [x1, 16]
+	ldr	w2, [x1, 32]
+	add	w2, w2, 1
+	str	w2, [x1, 32]
+	b	.L622
+.L623:
+	mov	x19, x0
+	adrp	x0, .LANCHOR68
+	mov	x20, x0
+	ldrb	w1, [x0, #:lo12:.LANCHOR68]
+	ldrb	w2, [x19, 56]
+	cmp	w2, w1
+	bls	.L628
+	adrp	x1, .LANCHOR67
+	adrp	x0, .LC0
+	mov	w2, 813
+	add	x1, x1, :lo12:.LANCHOR67
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L628:
+	ldrb	w0, [x19, 56]
+	adrp	x21, .LANCHOR66
+	cbz	w0, .L625
+	ldrb	w1, [x20, #:lo12:.LANCHOR68]
+	cmp	w1, w0
+	bcs	.L626
+.L625:
+	mov	x0, x19
+	bl	zbuf_free
+	ldrb	w0, [x21, #:lo12:.LANCHOR66]
+	b	.L622
+	.size	ftl_write_buf, .-ftl_write_buf
 	.section	.text.zftl_cache_flush,"ax",@progbits
 	.align	2
 	.global	zftl_cache_flush
@@ -3651,16 +3719,57 @@ ftl_gc_write_buf:
 zftl_cache_flush:
 	ret
 	.size	zftl_cache_flush, .-zftl_cache_flush
+	.section	.text.zftl_add_read_buf,"ax",@progbits
+	.align	2
+	.global	zftl_add_read_buf
+	.type	zftl_add_read_buf, %function
+zftl_add_read_buf:
+	cbnz	x0, .L635
+	adrp	x1, .LANCHOR70
+	adrp	x0, .LC0
+	mov	w2, 1147
+	add	x1, x1, :lo12:.LANCHOR70
+	add	x0, x0, :lo12:.LC0
+	b	printf
+.L635:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	mov	x19, x0
+	ldrb	w1, [x0, 56]
+	adrp	x0, .LANCHOR68
+	ldrb	w0, [x0, #:lo12:.LANCHOR68]
+	cmp	w1, w0
+	bls	.L637
+	adrp	x1, .LANCHOR70
+	adrp	x0, .LC0
+	mov	w2, 1154
+	add	x1, x1, :lo12:.LANCHOR70
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L637:
+	mov	x1, x19
+	adrp	x0, .LANCHOR71
+	add	x0, x0, :lo12:.LANCHOR71
+	bl	buf_add_tail
+	adrp	x1, .LANCHOR72
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ldrb	w0, [x1, #:lo12:.LANCHOR72]
+	add	w0, w0, 1
+	strb	w0, [x1, #:lo12:.LANCHOR72]
+	ret
+	.size	zftl_add_read_buf, .-zftl_add_read_buf
 	.section	.text.zftl_get_density,"ax",@progbits
 	.align	2
 	.global	zftl_get_density
 	.type	zftl_get_density, %function
 zftl_get_density:
-	cbnz	w0, .L624
-	adrp	x0, .LANCHOR67
-	ldr	w0, [x0, #:lo12:.LANCHOR67]
+	cbnz	w0, .L642
+	adrp	x0, .LANCHOR73
+	ldr	w0, [x0, #:lo12:.LANCHOR73]
 	ret
-.L624:
+.L642:
 	cmp	w0, 4
 	cset	w0, cc
 	lsl	w0, w0, 13
@@ -3692,8 +3801,8 @@ ftl_scan_all_data:
 	.global	FtlGetCurEraseBlock
 	.type	FtlGetCurEraseBlock, %function
 FtlGetCurEraseBlock:
-	adrp	x0, .LANCHOR68
-	ldrh	w0, [x0, #:lo12:.LANCHOR68]
+	adrp	x0, .LANCHOR74
+	ldrh	w0, [x0, #:lo12:.LANCHOR74]
 	ret
 	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
 	.section	.text.FtlGetAllBlockNum,"ax",@progbits
@@ -3728,7 +3837,7 @@ gc_add_sblk:
 	and	w22, w1, 65535
 	stp	x23, x24, [sp, 48]
 	and	w23, w2, 65535
-	tbz	x0, 8, .L634
+	tbz	x0, 8, .L652
 	adrp	x1, .LANCHOR11
 	uxtw	x0, w19
 	mov	w3, w23
@@ -3741,41 +3850,41 @@ gc_add_sblk:
 	adrp	x0, .LC49
 	add	x0, x0, :lo12:.LC49
 	ldrb	w4, [x1, 2]
-	adrp	x1, .LANCHOR69
-	ldrh	w7, [x1, #:lo12:.LANCHOR69]
-	adrp	x1, .LANCHOR70+56
+	adrp	x1, .LANCHOR75
+	ldrh	w7, [x1, #:lo12:.LANCHOR75]
+	adrp	x1, .LANCHOR76+56
 	ubfx	x4, x4, 5, 3
-	ldrh	w6, [x1, #:lo12:.LANCHOR70+56]
+	ldrh	w6, [x1, #:lo12:.LANCHOR76+56]
 	mov	w1, w19
 	bl	printf
-.L634:
+.L652:
 	adrp	x0, .LANCHOR8
 	mov	x20, x0
 	ldrh	w1, [x0, #:lo12:.LANCHOR8]
 	cmp	w1, w19
-	bhi	.L635
-	adrp	x1, .LANCHOR71
+	bhi	.L653
+	adrp	x1, .LANCHOR77
 	adrp	x0, .LC0
 	mov	w2, 543
-	add	x1, x1, :lo12:.LANCHOR71
+	add	x1, x1, :lo12:.LANCHOR77
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L635:
+.L653:
 	ldrh	w0, [x20, #:lo12:.LANCHOR8]
 	cmp	w0, w19
-	bhi	.L636
+	bhi	.L654
 	ldr	w0, [x21, #:lo12:.LANCHOR19]
-	tbz	x0, 10, .L658
+	tbz	x0, 10, .L676
 	adrp	x0, .LC50
 	mov	w3, w23
 	mov	w2, w22
 	mov	w1, w19
 	add	x0, x0, :lo12:.LC50
 	bl	printf
-.L658:
+.L676:
 	mov	w0, 0
-	b	.L633
-.L636:
+	b	.L651
+.L654:
 	adrp	x1, .LANCHOR11
 	uxtw	x0, w19
 	ldr	x1, [x1, #:lo12:.LANCHOR11]
@@ -3785,52 +3894,52 @@ gc_add_sblk:
 	add	x0, x1, x0, lsl 2
 	ldrb	w2, [x0, 2]
 	tst	w2, 224
-	bne	.L638
-	cbz	w3, .L658
+	bne	.L656
+	cbz	w3, .L676
 	mov	w2, 553
-	adrp	x1, .LANCHOR71
+	adrp	x1, .LANCHOR77
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR71
+	add	x1, x1, :lo12:.LANCHOR77
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L658
-.L638:
-	adrp	x0, .LANCHOR70
-	add	x1, x0, :lo12:.LANCHOR70
-	ldrh	w0, [x0, #:lo12:.LANCHOR70]
+	b	.L676
+.L656:
+	adrp	x0, .LANCHOR76
+	add	x1, x0, :lo12:.LANCHOR76
+	ldrh	w0, [x0, #:lo12:.LANCHOR76]
 	cmp	w0, w19
-	beq	.L658
+	beq	.L676
 	adrp	x24, .LANCHOR12
 	ldr	x0, [x24, #:lo12:.LANCHOR12]
 	ldrh	w4, [x0, 48]
 	cmp	w4, w19
-	beq	.L658
+	beq	.L676
 	ldrh	w4, [x0, 16]
 	cmp	w4, w19
-	beq	.L658
+	beq	.L676
 	ldrh	w4, [x0, 80]
 	cmp	w4, w19
-	beq	.L658
+	beq	.L676
 	ldrh	w5, [x1, 56]
 	add	x1, x1, 58
 	mov	w4, 0
-.L639:
+.L657:
 	cmp	w4, w5
-	bcc	.L640
-	cbnz	w22, .L644
-	adrp	x1, .LANCHOR72
-	ldrh	w6, [x1, #:lo12:.LANCHOR72]
+	bcc	.L658
+	cbnz	w22, .L662
+	adrp	x1, .LANCHOR78
+	ldrh	w6, [x1, #:lo12:.LANCHOR78]
 	cmp	w19, w6
-	beq	.L658
-	adrp	x4, .LANCHOR73
-	add	x4, x4, :lo12:.LANCHOR73
+	beq	.L676
+	adrp	x4, .LANCHOR79
+	add	x4, x4, :lo12:.LANCHOR79
 	mov	x1, 0
-.L643:
+.L661:
 	ldrh	w7, [x1, x4]
 	cmp	w19, w7
-	bne	.L642
+	bne	.L660
 	ldr	w0, [x21, #:lo12:.LANCHOR19]
-	tbz	x0, 8, .L658
+	tbz	x0, 8, .L676
 	mov	w5, w6
 	mov	w4, w19
 	ubfx	x2, x2, 5, 3
@@ -3838,69 +3947,69 @@ gc_add_sblk:
 	adrp	x0, .LC51
 	add	x0, x0, :lo12:.LC51
 	bl	printf
-	b	.L658
-.L640:
+	b	.L676
+.L658:
 	ldrh	w6, [x1], 2
 	cmp	w6, w19
-	beq	.L658
+	beq	.L676
 	add	w4, w4, 1
-	b	.L639
-.L642:
+	b	.L657
+.L660:
 	add	x1, x1, 2
 	cmp	x1, 16
-	bne	.L643
+	bne	.L661
 	ubfiz	x20, x23, 7, 16
 	add	x20, x20, 136
 	add	x20, x0, x20
-.L645:
+.L663:
 	ldr	w0, [x21, #:lo12:.LANCHOR19]
-	tbz	x0, 8, .L646
-	adrp	x0, .LANCHOR69
+	tbz	x0, 8, .L664
+	adrp	x0, .LANCHOR75
 	mov	w4, w3
 	mov	w1, w19
 	ubfx	x3, x2, 5, 3
-	ldrh	w6, [x0, #:lo12:.LANCHOR69]
+	ldrh	w6, [x0, #:lo12:.LANCHOR75]
 	mov	w2, w22
 	adrp	x0, .LC52
 	add	x0, x0, :lo12:.LC52
 	bl	printf
-.L646:
+.L664:
 	mov	x0, x20
 	add	x1, x20, 128
 	mov	w2, 65535
-.L649:
+.L667:
 	ldrh	w3, [x0]
 	cmp	w3, w2
-	bne	.L647
+	bne	.L665
 	strh	w19, [x0]
-	cbz	w22, .L648
+	cbz	w22, .L666
 	ldr	x1, [x24, #:lo12:.LANCHOR12]
 	ldrh	w0, [x1, 124]
 	add	w0, w0, 1
 	strh	w0, [x1, 124]
-.L668:
+.L686:
 	mov	w0, 1
-.L633:
+.L651:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L644:
+.L662:
 	add	x20, x0, 392
-	b	.L645
-.L648:
+	b	.L663
+.L666:
 	ldr	x0, [x24, #:lo12:.LANCHOR12]
 	add	x23, x0, x23, uxth 1
 	ldrh	w0, [x23, 120]
 	add	w0, w0, 1
 	strh	w0, [x23, 120]
-	b	.L668
-.L647:
+	b	.L686
+.L665:
 	add	x0, x0, 2
 	cmp	x1, x0
-	bne	.L649
-	b	.L668
+	bne	.L667
+	b	.L686
 	.size	gc_add_sblk, .-gc_add_sblk
 	.section	.text.gc_mark_bad_ppa,"ax",@progbits
 	.align	2
@@ -3908,26 +4017,26 @@ gc_add_sblk:
 	.type	gc_mark_bad_ppa, %function
 gc_mark_bad_ppa:
 	stp	x29, x30, [sp, -64]!
-	adrp	x1, .LANCHOR74
+	adrp	x1, .LANCHOR80
 	adrp	x3, .LANCHOR31
 	add	x29, sp, 0
-	ldrh	w1, [x1, #:lo12:.LANCHOR74]
+	ldrh	w1, [x1, #:lo12:.LANCHOR80]
 	ldrb	w3, [x3, #:lo12:.LANCHOR31]
 	stp	x19, x20, [sp, 16]
 	mov	w19, 24
 	sub	w19, w19, w3
 	lsr	w2, w0, w1
 	sub	w19, w19, w1
-	adrp	x1, .LANCHOR75
+	adrp	x1, .LANCHOR81
 	str	x23, [sp, 48]
 	mov	w23, 1
-	ldrb	w1, [x1, #:lo12:.LANCHOR75]
+	ldrb	w1, [x1, #:lo12:.LANCHOR81]
 	lsl	w19, w23, w19
 	sub	w19, w19, #1
 	stp	x21, x22, [sp, 32]
 	and	w19, w19, w2
-	adrp	x20, .LANCHOR70
-	add	x21, x20, :lo12:.LANCHOR70
+	adrp	x20, .LANCHOR76
+	add	x21, x20, :lo12:.LANCHOR76
 	mov	w3, w0
 	and	w22, w2, 65535
 	adrp	x0, .LC53
@@ -3943,40 +4052,40 @@ gc_mark_bad_ppa:
 	bl	gc_add_sblk
 	ldr	w0, [x21, 2200]
 	mov	w1, 0
-.L670:
+.L688:
 	cmp	w1, w0
-	bcc	.L672
+	bcc	.L690
 	cmp	w0, 5
-	bhi	.L671
-	add	x20, x20, :lo12:.LANCHOR70
+	bhi	.L689
+	add	x20, x20, :lo12:.LANCHOR76
 	add	w1, w0, 1
 	str	w1, [x20, 2200]
 	add	x20, x20, x0, uxtw 1
 	strh	w22, [x20, 2204]
-.L671:
+.L689:
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L672:
+.L690:
 	add	x2, x21, x1, sxtw 1
 	ldrh	w2, [x2, 2204]
 	cmp	w2, w22
-	beq	.L671
+	beq	.L689
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L670
+	b	.L688
 	.size	gc_mark_bad_ppa, .-gc_mark_bad_ppa
 	.section	.text.gc_get_src_ppa_from_index,"ax",@progbits
 	.align	2
 	.global	gc_get_src_ppa_from_index
 	.type	gc_get_src_ppa_from_index, %function
 gc_get_src_ppa_from_index:
-	adrp	x1, .LANCHOR76
+	adrp	x1, .LANCHOR82
 	ubfiz	x0, x0, 2, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR76]
+	ldr	x1, [x1, #:lo12:.LANCHOR82]
 	ldr	w0, [x1, x0]
 	ret
 	.size	gc_get_src_ppa_from_index, .-gc_get_src_ppa_from_index
@@ -3996,10 +4105,10 @@ gc_write_completed:
 	add	x25, x23, :lo12:.LANCHOR55
 	stp	x19, x20, [sp, 16]
 	str	x27, [sp, 80]
-.L676:
+.L694:
 	ldrb	w0, [x22]
 	cmp	w0, 255
-	bne	.L689
+	bne	.L707
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -4007,7 +4116,7 @@ gc_write_completed:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L689:
+.L707:
 	sxtw	x20, w0
 	add	x1, x23, :lo12:.LANCHOR55
 	lsl	x3, x20, 6
@@ -4016,121 +4125,121 @@ gc_write_completed:
 	ldr	w1, [x2, 52]
 	strb	w0, [x22]
 	ldrh	w24, [x2, 48]
-	cbz	w1, .L677
+	cbz	w1, .L695
 	ldr	w2, [x2, 40]
-	adrp	x0, .LANCHOR70
-	add	x0, x0, :lo12:.LANCHOR70
+	adrp	x0, .LANCHOR76
+	add	x0, x0, :lo12:.LANCHOR76
 	mov	w3, 1
 	str	w2, [x0, 2196]
 	strh	w3, [x0, 2194]
 	adrp	x0, .LC54
 	add	x0, x0, :lo12:.LC54
 	bl	printf
-	adrp	x1, .LANCHOR77
+	adrp	x1, .LANCHOR83
 	adrp	x0, .LC0
 	mov	w2, 956
-	add	x1, x1, :lo12:.LANCHOR77
+	add	x1, x1, :lo12:.LANCHOR83
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L677:
-	adrp	x0, .LANCHOR78
+.L695:
+	adrp	x0, .LANCHOR84
 	mov	x26, x0
-	ldrb	w1, [x0, #:lo12:.LANCHOR78]
+	ldrb	w1, [x0, #:lo12:.LANCHOR84]
 	cmp	w1, 3
-	bne	.L678
+	bne	.L696
 	adrp	x0, .LANCHOR35
 	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbnz	w0, .L678
+	cbnz	w0, .L696
 	adrp	x0, .LANCHOR12
-	adrp	x1, .LANCHOR79
+	adrp	x1, .LANCHOR85
 	ldr	x0, [x0, #:lo12:.LANCHOR12]
-	ldrb	w1, [x1, #:lo12:.LANCHOR79]
+	ldrb	w1, [x1, #:lo12:.LANCHOR85]
 	ldrb	w0, [x0, 89]
 	mov	w19, w0
 	cmp	w1, w0
-	bhi	.L690
+	bhi	.L708
 	cmp	w0, 2
 	mov	w0, 2
 	csel	w19, w19, w0, ls
-.L679:
+.L697:
 	add	w19, w19, w19, lsl 1
-.L680:
-	adrp	x1, .LANCHOR82
+.L698:
+	adrp	x1, .LANCHOR88
 	and	x21, x24, 65535
 	add	x0, x25, x20, lsl 6
 	mov	x27, x1
-	ldr	x2, [x1, #:lo12:.LANCHOR82]
+	ldr	x2, [x1, #:lo12:.LANCHOR88]
 	ldrb	w0, [x0, 1]
 	ldrb	w2, [x2, x21]
 	cmp	w2, w0
-	beq	.L681
-	adrp	x1, .LANCHOR77
+	beq	.L699
+	adrp	x1, .LANCHOR83
 	adrp	x0, .LC0
 	mov	w2, 976
-	add	x1, x1, :lo12:.LANCHOR77
+	add	x1, x1, :lo12:.LANCHOR83
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L681:
+.L699:
 	add	x0, x25, x20, lsl 6
 	ldrb	w0, [x0, 61]
 	cmp	w0, 3
-	beq	.L682
-	ldrb	w0, [x26, #:lo12:.LANCHOR78]
+	beq	.L700
+	ldrb	w0, [x26, #:lo12:.LANCHOR84]
 	cmp	w0, 3
-	bne	.L682
-	adrp	x0, .LANCHOR83
-	ldrb	w0, [x0, #:lo12:.LANCHOR83]
-	cbnz	w0, .L682
+	bne	.L700
+	adrp	x0, .LANCHOR89
+	ldrb	w0, [x0, #:lo12:.LANCHOR89]
+	cbnz	w0, .L700
 	adrp	x0, .LANCHOR35
 	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbnz	w0, .L682
+	cbnz	w0, .L700
 	adrp	x0, .LANCHOR36
 	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbnz	w0, .L682
-	adrp	x0, .LANCHOR80
-	ldrb	w0, [x0, #:lo12:.LANCHOR80]
-	cbz	w0, .L683
-	adrp	x0, .LANCHOR81
-	ldrb	w0, [x0, #:lo12:.LANCHOR81]
-	cbnz	w0, .L682
-.L683:
-	ldr	x1, [x27, #:lo12:.LANCHOR82]
+	cbnz	w0, .L700
+	adrp	x0, .LANCHOR86
+	ldrb	w0, [x0, #:lo12:.LANCHOR86]
+	cbz	w0, .L701
+	adrp	x0, .LANCHOR87
+	ldrb	w0, [x0, #:lo12:.LANCHOR87]
+	cbnz	w0, .L700
+.L701:
+	ldr	x1, [x27, #:lo12:.LANCHOR88]
 	mov	x0, 0
 	add	x21, x1, x21
-.L684:
+.L702:
 	cmp	w19, w0, uxth
-	bls	.L676
+	bls	.L694
 	ldrb	w1, [x21, x0]
 	add	x0, x0, 1
 	add	x1, x25, x1, lsl 6
 	strb	wzr, [x1, 61]
-	b	.L684
-.L690:
+	b	.L702
+.L708:
 	mov	w19, 1
-	b	.L679
-.L678:
-	adrp	x0, .LANCHOR80
-	ldrb	w0, [x0, #:lo12:.LANCHOR80]
-	cbz	w0, .L691
-	adrp	x0, .LANCHOR81
-	ldrb	w0, [x0, #:lo12:.LANCHOR81]
+	b	.L697
+.L696:
+	adrp	x0, .LANCHOR86
+	ldrb	w0, [x0, #:lo12:.LANCHOR86]
+	cbz	w0, .L709
+	adrp	x0, .LANCHOR87
+	ldrb	w0, [x0, #:lo12:.LANCHOR87]
 	cmp	w0, 0
 	cset	w19, ne
 	add	w19, w19, 1
-	b	.L680
-.L691:
+	b	.L698
+.L709:
 	mov	w19, 1
-	b	.L680
-.L682:
-	adrp	x20, .LANCHOR70
-	add	x20, x20, :lo12:.LANCHOR70
+	b	.L698
+.L700:
+	adrp	x20, .LANCHOR76
+	add	x20, x20, :lo12:.LANCHOR76
 	add	x19, x21, x19, uxth
 	strh	w24, [x20, 2108]
 	mov	w24, -1
-.L685:
+.L703:
 	cmp	x21, x19
-	beq	.L676
-	ldr	x1, [x27, #:lo12:.LANCHOR82]
+	beq	.L694
+	ldr	x1, [x27, #:lo12:.LANCHOR88]
 	ldrb	w0, [x1, x21]
 	strb	w24, [x1, x21]
 	add	x21, x21, 1
@@ -4143,7 +4252,7 @@ gc_write_completed:
 	ldrb	w0, [x20, 7]
 	sub	w0, w0, #1
 	strb	w0, [x20, 7]
-	b	.L685
+	b	.L703
 	.size	gc_write_completed, .-gc_write_completed
 	.section	.text.gc_get_src_blk,"ax",@progbits
 	.align	2
@@ -4152,47 +4261,47 @@ gc_write_completed:
 gc_get_src_blk:
 	adrp	x0, .LANCHOR12
 	ldr	x2, [x0, #:lo12:.LANCHOR12]
-	adrp	x0, .LANCHOR84
-	ldrb	w3, [x0, #:lo12:.LANCHOR84]
+	adrp	x0, .LANCHOR90
+	ldrb	w3, [x0, #:lo12:.LANCHOR90]
 	ldrh	w0, [x2, 124]
-	cbz	w0, .L704
+	cbz	w0, .L722
 	add	x1, x2, 392
 	mov	w4, 1
-.L705:
+.L723:
 	add	x5, x1, 128
 	mov	w6, 65535
-.L709:
+.L727:
 	ldrh	w0, [x1]
 	cmp	w0, w6
-	beq	.L707
+	beq	.L725
 	mov	w5, -1
 	strh	w5, [x1]
-	cbz	w4, .L708
+	cbz	w4, .L726
 	ldrh	w1, [x2, 124]
 	sub	w1, w1, #1
 	strh	w1, [x2, 124]
 	ret
-.L704:
+.L722:
 	add	x0, x2, x3, sxtw 1
 	ldrh	w0, [x0, 120]
-	cbz	w0, .L710
+	cbz	w0, .L728
 	ubfiz	x1, x3, 7, 8
 	mov	w4, 0
 	add	x1, x1, 136
 	add	x1, x2, x1
-	b	.L705
-.L708:
+	b	.L723
+.L726:
 	add	x2, x2, x3, uxtb 1
 	ldrh	w1, [x2, 120]
 	sub	w1, w1, #1
 	strh	w1, [x2, 120]
 	ret
-.L707:
+.L725:
 	add	x1, x1, 2
 	cmp	x1, x5
-	bne	.L709
+	bne	.L727
 	ret
-.L710:
+.L728:
 	mov	w0, 65535
 	ret
 	.size	gc_get_src_blk, .-gc_get_src_blk
@@ -4204,88 +4313,88 @@ gc_free_temp_buf:
 	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR70
-	add	x0, x20, :lo12:.LANCHOR70
+	adrp	x20, .LANCHOR76
+	add	x0, x20, :lo12:.LANCHOR76
 	stp	x21, x22, [sp, 32]
 	ldrb	w1, [x0, 7]
-	cbz	w1, .L719
+	cbz	w1, .L737
 	adrp	x1, .LANCHOR57
 	ldrb	w1, [x1, #:lo12:.LANCHOR57]
 	cmp	w1, 1
-	bhi	.L719
+	bhi	.L737
 	ldrh	w19, [x0, 2108]
-	adrp	x2, .LANCHOR79
-	adrp	x0, .LANCHOR85
-	adrp	x21, .LANCHOR82
-	ldrb	w2, [x2, #:lo12:.LANCHOR79]
+	adrp	x2, .LANCHOR85
+	adrp	x0, .LANCHOR91
+	adrp	x21, .LANCHOR88
+	ldrb	w2, [x2, #:lo12:.LANCHOR85]
 	add	w1, w19, 24
-	ldrh	w0, [x0, #:lo12:.LANCHOR85]
-	ldr	x4, [x21, #:lo12:.LANCHOR82]
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	ldr	x4, [x21, #:lo12:.LANCHOR88]
 	mul	w0, w0, w2
 	cmp	w0, w1
 	csel	w1, w0, w1, ls
 	adrp	x0, .LANCHOR55
 	add	x0, x0, :lo12:.LANCHOR55
-.L714:
+.L732:
 	cmp	w19, w1
-	bcc	.L717
-.L719:
+	bcc	.L735
+.L737:
 	mov	w0, 0
-	b	.L712
-.L717:
+	b	.L730
+.L735:
 	uxtw	x22, w19
 	ldrb	w2, [x4, x22]
 	cmp	w2, 255
-	beq	.L715
+	beq	.L733
 	sbfiz	x3, x2, 6, 32
 	add	x3, x0, x3
 	ldrb	w3, [x3, 61]
-	cbnz	w3, .L715
+	cbnz	w3, .L733
 	ubfiz	x2, x2, 6, 8
 	add	x0, x0, x2
 	bl	zbuf_free
 	adrp	x0, .LANCHOR19
 	ldr	w0, [x0, #:lo12:.LANCHOR19]
-	tbz	x0, 8, .L716
-	ldr	x0, [x21, #:lo12:.LANCHOR82]
+	tbz	x0, 8, .L734
+	ldr	x0, [x21, #:lo12:.LANCHOR88]
 	mov	w1, w19
 	ldrb	w2, [x0, x22]
 	adrp	x0, .LC55
 	add	x0, x0, :lo12:.LC55
 	bl	printf
-.L716:
-	ldr	x0, [x21, #:lo12:.LANCHOR82]
-	add	x20, x20, :lo12:.LANCHOR70
+.L734:
+	ldr	x0, [x21, #:lo12:.LANCHOR88]
+	add	x20, x20, :lo12:.LANCHOR76
 	mov	w1, -1
 	strb	w1, [x0, x22]
 	ldrb	w0, [x20, 7]
 	sub	w0, w0, #1
 	strb	w0, [x20, 7]
 	mov	w0, 1
-.L712:
+.L730:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L715:
+.L733:
 	add	w19, w19, 1
-	b	.L714
+	b	.L732
 	.size	gc_free_temp_buf, .-gc_free_temp_buf
 	.section	.text.get_ink_scaned_blk,"ax",@progbits
 	.align	2
 	.global	get_ink_scaned_blk
 	.type	get_ink_scaned_blk, %function
 get_ink_scaned_blk:
-	adrp	x1, .LANCHOR70
-	add	x1, x1, :lo12:.LANCHOR70
+	adrp	x1, .LANCHOR76
+	add	x1, x1, :lo12:.LANCHOR76
 	ldrh	w2, [x1, 2112]
-	cbz	w2, .L729
+	cbz	w2, .L747
 	sub	w2, w2, #1
 	strh	w2, [x1, 2112]
 	add	x0, x1, x2, sxtw 1
 	ldrh	w0, [x0, 2114]
 	ret
-.L729:
+.L747:
 	mov	w0, 65535
 	ret
 	.size	get_ink_scaned_blk, .-get_ink_scaned_blk
@@ -4294,12 +4403,12 @@ get_ink_scaned_blk:
 	.global	print_gc_debug_info
 	.type	print_gc_debug_info, %function
 print_gc_debug_info:
-	adrp	x2, .LANCHOR86
-	adrp	x1, .LANCHOR70
-	add	x0, x1, :lo12:.LANCHOR70
-	ldrh	w6, [x2, #:lo12:.LANCHOR86]
+	adrp	x2, .LANCHOR92
+	adrp	x1, .LANCHOR76
+	add	x0, x1, :lo12:.LANCHOR76
+	ldrh	w6, [x2, #:lo12:.LANCHOR92]
 	adrp	x2, .LANCHOR57
-	ldrh	w1, [x1, #:lo12:.LANCHOR70]
+	ldrh	w1, [x1, #:lo12:.LANCHOR76]
 	ldrb	w5, [x0, 7]
 	ldrb	w4, [x2, #:lo12:.LANCHOR57]
 	ldrh	w3, [x0, 2106]
@@ -4317,15 +4426,15 @@ _list_pop_index_node:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	ldr	x20, [x0]
-	cbz	x20, .L737
+	cbz	x20, .L755
 	adrp	x3, .LANCHOR4
 	and	w1, w1, 65535
 	mov	w4, 65535
 	mov	w5, 6
 	ldr	x19, [x3, #:lo12:.LANCHOR4]
-.L733:
-	cbnz	w1, .L734
-.L736:
+.L751:
+	cbnz	w1, .L752
+.L754:
 	sub	x19, x20, x19
 	mov	x1, -6148914691236517206
 	asr	x19, x19, 1
@@ -4338,21 +4447,21 @@ _list_pop_index_node:
 	strh	w0, [x20]
 	strh	w0, [x20, 2]
 	mov	w0, w19
-.L731:
+.L749:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L734:
+.L752:
 	ldrh	w3, [x20]
 	cmp	w3, w4
-	beq	.L736
+	beq	.L754
 	sub	w1, w1, #1
 	umaddl	x20, w3, w5, x19
 	and	w1, w1, 65535
-	b	.L733
-.L737:
+	b	.L751
+.L755:
 	mov	w0, 65535
-	b	.L731
+	b	.L749
 	.size	_list_pop_index_node, .-_list_pop_index_node
 	.section	.text._list_get_gc_head_node,"ax",@progbits
 	.align	2
@@ -4361,26 +4470,26 @@ _list_pop_index_node:
 _list_get_gc_head_node:
 	ldr	x0, [x0]
 	and	w1, w1, 65535
-	cbz	x0, .L744
+	cbz	x0, .L762
 	adrp	x2, .LANCHOR4
 	mov	w3, 65535
 	mov	w4, 6
 	ldr	x2, [x2, #:lo12:.LANCHOR4]
-.L741:
-	cbz	w1, .L742
+.L759:
+	cbz	w1, .L760
 	ldrh	w0, [x0]
 	cmp	w0, w3
-	bne	.L743
+	bne	.L761
 	ret
-.L743:
+.L761:
 	sub	w1, w1, #1
 	umaddl	x0, w0, w4, x2
 	and	w1, w1, 65535
-	b	.L741
-.L744:
+	b	.L759
+.L762:
 	mov	w0, 65535
 	ret
-.L742:
+.L760:
 	sub	x0, x0, x2
 	mov	x1, -6148914691236517206
 	asr	x0, x0, 1
@@ -4409,9 +4518,9 @@ gc_search_src_blk:
 	stp	x27, x28, [sp, 80]
 	add	x0, x2, x22, sxtw 1
 	ldrh	w21, [x0, 120]
-	cbz	w21, .L747
+	cbz	w21, .L765
 	mov	w0, w21
-.L746:
+.L764:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -4419,30 +4528,30 @@ gc_search_src_blk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L747:
-	adrp	x0, .LANCHOR70
-	add	x1, x0, :lo12:.LANCHOR70
+.L765:
+	adrp	x0, .LANCHOR76
+	add	x1, x0, :lo12:.LANCHOR76
 	ldrh	w1, [x1, 56]
 	cmp	w1, 1
-	bhi	.L749
-	adrp	x3, .LANCHOR87
-	strh	wzr, [x3, #:lo12:.LANCHOR87]
-	adrp	x3, .LANCHOR88
-	strh	wzr, [x3, #:lo12:.LANCHOR88]
-	adrp	x3, .LANCHOR89
-	strh	wzr, [x3, #:lo12:.LANCHOR89]
-.L749:
-	cbnz	w22, .L750
-	adrp	x26, .LANCHOR88
-	adrp	x25, .LANCHOR90
-	add	x23, x26, :lo12:.LANCHOR88
-	add	x25, x25, :lo12:.LANCHOR90
+	bhi	.L767
+	adrp	x3, .LANCHOR93
+	strh	wzr, [x3, #:lo12:.LANCHOR93]
+	adrp	x3, .LANCHOR94
+	strh	wzr, [x3, #:lo12:.LANCHOR94]
+	adrp	x3, .LANCHOR95
+	strh	wzr, [x3, #:lo12:.LANCHOR95]
+.L767:
+	cbnz	w22, .L768
+	adrp	x26, .LANCHOR94
+	adrp	x25, .LANCHOR96
+	add	x23, x26, :lo12:.LANCHOR94
+	add	x25, x25, :lo12:.LANCHOR96
 	mov	w24, 0
 	mov	w20, 0
 	mov	w27, 65535
-.L751:
+.L769:
 	cmp	w19, w20
-	blt	.L756
+	blt	.L774
 	ldrh	w6, [x23]
 	mov	x0, x25
 	mov	w1, w6
@@ -4453,12 +4562,12 @@ gc_search_src_blk:
 	and	w1, w0, 65535
 	mov	w28, w1
 	cmp	w1, w27
-	beq	.L752
+	beq	.L770
 	adrp	x0, .LANCHOR19
 	adrp	x6, .LANCHOR11
 	uxtw	x4, w1
 	ldr	w0, [x0, #:lo12:.LANCHOR19]
-	tbz	x0, 8, .L753
+	tbz	x0, 8, .L771
 	ldr	x0, [x6, #:lo12:.LANCHOR11]
 	stp	x6, x4, [x29, 144]
 	ldrh	w3, [x0, x4, lsl 1]
@@ -4466,39 +4575,39 @@ gc_search_src_blk:
 	add	x0, x0, :lo12:.LC57
 	bl	printf
 	ldp	x6, x4, [x29, 144]
-.L753:
+.L771:
 	ldr	x0, [x6, #:lo12:.LANCHOR11]
 	ldrh	w1, [x0, x4, lsl 1]
-	adrp	x0, .LANCHOR69
-	ldrh	w0, [x0, #:lo12:.LANCHOR69]
+	adrp	x0, .LANCHOR75
+	ldrh	w0, [x0, #:lo12:.LANCHOR75]
 	cmp	w1, w0
-	bcs	.L754
+	bcs	.L772
 	mov	w2, 0
 	mov	w1, 0
 	mov	w0, w28
 	bl	gc_add_sblk
-	cbz	w0, .L755
+	cbz	w0, .L773
 	add	w5, w24, 1
 	and	w24, w5, 65535
 	cmp	w24, w19
-	bcc	.L755
-.L756:
+	bcc	.L773
+.L774:
 	ldr	x0, [x29, 160]
-	tbz	x0, 1, .L758
-	adrp	x0, .LANCHOR91
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	tbz	x0, 1, .L776
+	adrp	x0, .LANCHOR97
+	ldrh	w0, [x0, #:lo12:.LANCHOR97]
 	cmp	w0, 32
-	bls	.L758
-	adrp	x23, .LANCHOR93
-	adrp	x20, .LANCHOR89
-	adrp	x26, .LANCHOR92
-	add	x20, x20, :lo12:.LANCHOR89
-	add	x26, x26, :lo12:.LANCHOR92
-	add	x27, x23, :lo12:.LANCHOR93
+	bls	.L776
+	adrp	x23, .LANCHOR99
+	adrp	x20, .LANCHOR95
+	adrp	x26, .LANCHOR98
+	add	x20, x20, :lo12:.LANCHOR95
+	add	x26, x26, :lo12:.LANCHOR98
+	add	x27, x23, :lo12:.LANCHOR99
 	mov	w25, 0
-.L759:
+.L777:
 	cmp	w19, w25
-	blt	.L763
+	blt	.L781
 	ldrh	w6, [x20]
 	mov	x0, x26
 	mov	w1, w6
@@ -4508,50 +4617,50 @@ gc_search_src_blk:
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L760
+	beq	.L778
 	adrp	x2, .LANCHOR11
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR11]
 	ldrh	w2, [x2, x1]
 	ldrh	w1, [x27]
 	cmp	w2, w1
-	bcs	.L760
+	bcs	.L778
 	mov	w2, 0
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L762
+	cbz	w0, .L780
 	add	w5, w24, 1
 	and	w24, w5, 65535
 	cmp	w24, w19
-	bcc	.L762
-.L763:
+	bcc	.L780
+.L781:
 	cmp	w24, w19
-	adrp	x0, .LANCHOR94
-	bcs	.L765
-	ldrh	w1, [x0, #:lo12:.LANCHOR94]
-	adrp	x3, .LANCHOR79
-	adrp	x0, .LANCHOR85
-	ldrh	w2, [x23, #:lo12:.LANCHOR93]
-	ldrb	w3, [x3, #:lo12:.LANCHOR79]
-	ldrh	w0, [x0, #:lo12:.LANCHOR85]
+	adrp	x0, .LANCHOR100
+	bcs	.L783
+	ldrh	w1, [x0, #:lo12:.LANCHOR100]
+	adrp	x3, .LANCHOR85
+	adrp	x0, .LANCHOR91
+	ldrh	w2, [x23, #:lo12:.LANCHOR99]
+	ldrb	w3, [x3, #:lo12:.LANCHOR85]
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	mul	w0, w0, w3
 	sub	w0, w0, w1, lsr 2
 	cmp	w2, w0
-	bge	.L758
+	bge	.L776
 	add	w1, w2, w1, lsr 3
-	strh	w1, [x23, #:lo12:.LANCHOR93]
-.L758:
+	strh	w1, [x23, #:lo12:.LANCHOR99]
+.L776:
 	ldr	x0, [x29, 160]
-	tbz	x0, 0, .L766
+	tbz	x0, 0, .L784
 	and	w23, w19, 65535
 	cmp	w24, w23
-	bcs	.L766
-	adrp	x20, .LANCHOR87
-	adrp	x25, .LANCHOR95
-	add	x20, x20, :lo12:.LANCHOR87
-	add	x25, x25, :lo12:.LANCHOR95
+	bcs	.L784
+	adrp	x20, .LANCHOR93
+	adrp	x25, .LANCHOR101
+	add	x20, x20, :lo12:.LANCHOR93
+	add	x25, x25, :lo12:.LANCHOR101
 	mov	w26, 65535
-.L771:
+.L789:
 	ldrh	w6, [x20]
 	mov	x0, x25
 	mov	w1, w6
@@ -4559,67 +4668,67 @@ gc_search_src_blk:
 	add	w6, w6, 1
 	strh	w6, [x20]
 	cmp	w26, w0, uxth
-	beq	.L767
+	beq	.L785
 	mov	w2, 0
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L768
+	cbz	w0, .L786
 	add	w5, w24, 1
 	and	w24, w5, 65535
 	cmp	w23, w24
-	bhi	.L768
-.L769:
-	adrp	x0, .LANCHOR94
-	adrp	x1, .LANCHOR69
-	ldrh	w0, [x0, #:lo12:.LANCHOR94]
-	ldrh	w2, [x1, #:lo12:.LANCHOR69]
+	bhi	.L786
+.L787:
+	adrp	x0, .LANCHOR100
+	adrp	x1, .LANCHOR75
+	ldrh	w0, [x0, #:lo12:.LANCHOR100]
+	ldrh	w2, [x1, #:lo12:.LANCHOR75]
 	cmp	w2, w0, lsr 1
-	bls	.L766
+	bls	.L784
 	sub	w0, w2, w0, lsr 3
-	b	.L857
-.L754:
-	strh	wzr, [x26, #:lo12:.LANCHOR88]
-	b	.L756
-.L752:
+	b	.L875
+.L772:
+	strh	wzr, [x26, #:lo12:.LANCHOR94]
+	b	.L774
+.L770:
 	strh	wzr, [x23]
-	b	.L756
-.L755:
+	b	.L774
+.L773:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L751
-.L760:
+	b	.L769
+.L778:
 	strh	wzr, [x20]
-	b	.L763
-.L762:
+	b	.L781
+.L780:
 	add	w25, w25, 1
 	and	w25, w25, 65535
-	b	.L759
-.L765:
-	ldrh	w1, [x23, #:lo12:.LANCHOR93]
-	ldrh	w0, [x0, #:lo12:.LANCHOR94]
+	b	.L777
+.L783:
+	ldrh	w1, [x23, #:lo12:.LANCHOR99]
+	ldrh	w0, [x0, #:lo12:.LANCHOR100]
 	cmp	w1, w0
-	bls	.L758
+	bls	.L776
 	sub	w0, w1, w0, lsr 3
-	strh	w0, [x23, #:lo12:.LANCHOR93]
-	b	.L758
-.L767:
+	strh	w0, [x23, #:lo12:.LANCHOR99]
+	b	.L776
+.L785:
 	strh	wzr, [x20]
-.L770:
+.L788:
 	cmp	w24, w23
-	bcs	.L769
-	adrp	x1, .LANCHOR69
-	adrp	x0, .LANCHOR94
-	ldrh	w2, [x1, #:lo12:.LANCHOR69]
-	ldrh	w0, [x0, #:lo12:.LANCHOR94]
+	bcs	.L787
+	adrp	x1, .LANCHOR75
+	adrp	x0, .LANCHOR100
+	ldrh	w2, [x1, #:lo12:.LANCHOR75]
+	ldrh	w0, [x0, #:lo12:.LANCHOR100]
 	cmp	w2, w0
-	bcs	.L766
+	bcs	.L784
 	add	w0, w2, w0, lsr 3
-.L857:
-	strh	w0, [x1, #:lo12:.LANCHOR69]
-.L766:
+.L875:
+	strh	w0, [x1, #:lo12:.LANCHOR75]
+.L784:
 	adrp	x0, .LANCHOR19
 	ldr	w0, [x0, #:lo12:.LANCHOR19]
-	tbz	x0, 8, .L802
+	tbz	x0, 8, .L820
 	ldr	w2, [x29, 160]
 	adrp	x0, .LC58
 	mov	w4, w19
@@ -4627,73 +4736,73 @@ gc_search_src_blk:
 	mov	w1, w22
 	add	x0, x0, :lo12:.LC58
 	bl	printf
-.L802:
+.L820:
 	mov	w0, w24
-	b	.L746
-.L768:
+	b	.L764
+.L786:
 	add	w21, w21, 1
 	and	w21, w21, 65535
 	cmp	w23, w21
-	bhi	.L771
-	b	.L770
-.L750:
-	adrp	x23, .LANCHOR79
-	adrp	x25, .LANCHOR85
+	bhi	.L789
+	b	.L788
+.L768:
+	adrp	x23, .LANCHOR85
+	adrp	x25, .LANCHOR91
 	stp	x25, x23, [x29, 144]
 	cmp	w19, 1
-	ldrb	w20, [x23, #:lo12:.LANCHOR79]
-	ldrh	w3, [x25, #:lo12:.LANCHOR85]
+	ldrb	w20, [x23, #:lo12:.LANCHOR85]
+	ldrh	w3, [x25, #:lo12:.LANCHOR91]
 	mul	w20, w20, w3
 	and	w20, w20, 65535
-	bne	.L772
-	cbz	w1, .L772
+	bne	.L790
+	cbz	w1, .L790
 	ldrh	w3, [x2, 80]
 	mov	w2, 65535
 	cmp	w3, w2
-	beq	.L805
-	add	x2, x0, :lo12:.LANCHOR70
+	beq	.L823
+	add	x2, x0, :lo12:.LANCHOR76
 	ldrh	w2, [x2, 2106]
 	sub	w20, w20, w2
 	and	w20, w20, 65535
-.L805:
+.L823:
 	mov	w19, 8
-.L772:
-	add	x0, x0, :lo12:.LANCHOR70
+.L790:
+	add	x0, x0, :lo12:.LANCHOR76
 	strh	wzr, [x0, 2192]
-	adrp	x0, .LANCHOR96
-	strh	wzr, [x0, #:lo12:.LANCHOR96]
+	adrp	x0, .LANCHOR102
+	strh	wzr, [x0, #:lo12:.LANCHOR102]
 	ldr	w0, [x29, 160]
 	and	w0, w0, 1
 	str	w0, [x29, 128]
 	ldr	x0, [x29, 160]
-	tbz	x0, 0, .L806
-	adrp	x2, .LANCHOR98
-	adrp	x26, .LANCHOR97
+	tbz	x0, 0, .L824
+	adrp	x2, .LANCHOR104
+	adrp	x26, .LANCHOR103
 	str	x2, [x29, 120]
-	ldrh	w0, [x26, #:lo12:.LANCHOR97]
-	ldrh	w3, [x2, #:lo12:.LANCHOR98]
+	ldrh	w0, [x26, #:lo12:.LANCHOR103]
+	ldrh	w3, [x2, #:lo12:.LANCHOR104]
 	cmp	w0, w3, lsr 2
-	bhi	.L774
-	adrp	x2, .LANCHOR99
-	ldrh	w2, [x2, #:lo12:.LANCHOR99]
+	bhi	.L792
+	adrp	x2, .LANCHOR105
+	ldrh	w2, [x2, #:lo12:.LANCHOR105]
 	cmp	w2, w0
-	bcs	.L807
-.L774:
+	bcs	.L825
+.L792:
 	cmp	w1, 1
-	adrp	x25, .LANCHOR87
-	adrp	x28, .LANCHOR95
-	bls	.L776
-.L778:
+	adrp	x25, .LANCHOR93
+	adrp	x28, .LANCHOR101
+	bls	.L794
+.L796:
 	mov	w24, 0
-.L777:
-	add	x0, x28, :lo12:.LANCHOR95
-	add	x25, x25, :lo12:.LANCHOR87
-	adrp	x28, .LANCHOR99
-	add	x28, x28, :lo12:.LANCHOR99
+.L795:
+	add	x0, x28, :lo12:.LANCHOR101
+	add	x25, x25, :lo12:.LANCHOR93
+	adrp	x28, .LANCHOR105
+	add	x28, x28, :lo12:.LANCHOR105
 	mov	w23, 0
 	mov	w27, 64
 	str	x0, [x29, 136]
-.L781:
+.L799:
 	ldrh	w7, [x25]
 	ldr	x0, [x29, 136]
 	mov	w1, w7
@@ -4702,13 +4811,13 @@ gc_search_src_blk:
 	str	w6, [x29, 112]
 	mov	w1, 65535
 	cmp	w6, w1
-	beq	.L779
+	beq	.L797
 	add	w7, w7, 1
 	mov	w2, w22
 	strh	w7, [x25]
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L780
+	cbz	w0, .L798
 	adrp	x0, .LANCHOR11
 	ldr	w6, [x29, 112]
 	add	w5, w24, 1
@@ -4719,36 +4828,36 @@ gc_search_src_blk:
 	ldrh	w0, [x0, x6]
 	add	w3, w23, w0
 	and	w23, w3, 65535
-	bcs	.L775
+	bcs	.L793
 	cmp	w20, w23
-	bcc	.L775
+	bcc	.L793
 	ldrh	w0, [x28]
-	ldrh	w1, [x26, #:lo12:.LANCHOR97]
+	ldrh	w1, [x26, #:lo12:.LANCHOR103]
 	cmp	w0, w1, lsl 1
-	ble	.L780
-.L775:
-	adrp	x0, .LANCHOR99
-	ldrh	w1, [x0, #:lo12:.LANCHOR99]
+	ble	.L798
+.L793:
+	adrp	x0, .LANCHOR105
+	ldrh	w1, [x0, #:lo12:.LANCHOR105]
 	ldr	x0, [x29, 120]
-	ldrh	w0, [x0, #:lo12:.LANCHOR98]
+	ldrh	w0, [x0, #:lo12:.LANCHOR104]
 	cmp	w1, w0, lsr 2
-	bhi	.L803
-	ldrh	w0, [x26, #:lo12:.LANCHOR97]
+	bhi	.L821
+	ldrh	w0, [x26, #:lo12:.LANCHOR103]
 	add	w0, w0, 8
 	cmp	w1, w0
-	ble	.L773
-.L803:
+	ble	.L791
+.L821:
 	cmp	w20, w23
-	bls	.L773
-	adrp	x7, .LANCHOR88
+	bls	.L791
+	adrp	x7, .LANCHOR94
 	and	w25, w19, 65535
-	add	x28, x7, :lo12:.LANCHOR88
-	adrp	x0, .LANCHOR90
+	add	x28, x7, :lo12:.LANCHOR94
+	adrp	x0, .LANCHOR96
 	mov	w26, 64
-	add	x0, x0, :lo12:.LANCHOR90
+	add	x0, x0, :lo12:.LANCHOR96
 	adrp	x27, .LANCHOR11
 	str	x0, [x29, 136]
-.L784:
+.L802:
 	ldrh	w6, [x28]
 	ldr	x0, [x29, 136]
 	mov	w1, w6
@@ -4757,13 +4866,13 @@ gc_search_src_blk:
 	str	w4, [x29, 120]
 	mov	w1, 65535
 	cmp	w4, w1
-	beq	.L782
+	beq	.L800
 	add	w6, w6, 1
 	mov	w2, w22
 	strh	w6, [x28]
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L783
+	cbz	w0, .L801
 	ldr	w4, [x29, 120]
 	add	w5, w24, 1
 	ldr	x0, [x27, #:lo12:.LANCHOR11]
@@ -4773,29 +4882,29 @@ gc_search_src_blk:
 	ldrh	w0, [x0, x4]
 	add	w3, w23, w0
 	and	w23, w3, 65535
-	bcs	.L773
+	bcs	.L791
 	cmp	w20, w23
-	bcs	.L783
-.L773:
+	bcs	.L801
+.L791:
 	ldr	x0, [x29, 160]
-	tbz	x0, 1, .L785
-	adrp	x0, .LANCHOR91
+	tbz	x0, 1, .L803
+	adrp	x0, .LANCHOR97
 	str	x0, [x29, 112]
-	ldrh	w1, [x0, #:lo12:.LANCHOR91]
+	ldrh	w1, [x0, #:lo12:.LANCHOR97]
 	cmp	w1, 32
-	bls	.L785
+	bls	.L803
 	cmp	w23, w20
-	bcs	.L785
-	adrp	x25, .LANCHOR89
-	adrp	x0, .LANCHOR92
-	add	x28, x25, :lo12:.LANCHOR89
-	add	x0, x0, :lo12:.LANCHOR92
-	adrp	x27, .LANCHOR100
+	bcs	.L803
+	adrp	x25, .LANCHOR95
+	adrp	x0, .LANCHOR98
+	add	x28, x25, :lo12:.LANCHOR95
+	add	x0, x0, :lo12:.LANCHOR98
+	adrp	x27, .LANCHOR106
 	str	x0, [x29, 120]
 	mov	w26, 64
-	add	x0, x27, :lo12:.LANCHOR100
+	add	x0, x27, :lo12:.LANCHOR106
 	str	x0, [x29, 136]
-.L791:
+.L809:
 	ldrh	w6, [x28]
 	ldr	x0, [x29, 120]
 	mov	w1, w6
@@ -4803,21 +4912,21 @@ gc_search_src_blk:
 	and	w8, w0, 65535
 	mov	w1, 65535
 	cmp	w8, w1
-	beq	.L786
+	beq	.L804
 	add	w6, w6, 1
 	strh	w6, [x28]
 	cmp	w19, 1
-	bne	.L787
+	bne	.L805
 	ldp	x2, x1, [x29, 144]
-	ldrb	w1, [x1, #:lo12:.LANCHOR79]
-	ldrh	w2, [x2, #:lo12:.LANCHOR85]
+	ldrb	w1, [x1, #:lo12:.LANCHOR85]
+	ldrh	w2, [x2, #:lo12:.LANCHOR91]
 	mul	w2, w1, w2
-	adrp	x1, .LANCHOR94
-	ldrh	w1, [x1, #:lo12:.LANCHOR94]
+	adrp	x1, .LANCHOR100
+	ldrh	w1, [x1, #:lo12:.LANCHOR100]
 	sub	w1, w2, w1, lsr 3
 	ldr	x2, [x29, 136]
 	strh	w1, [x2]
-.L787:
+.L805:
 	ubfiz	x6, x8, 1, 16
 	adrp	x8, .LANCHOR11
 	stp	x8, x6, [x29, 96]
@@ -4826,11 +4935,11 @@ gc_search_src_blk:
 	ldr	x1, [x29, 136]
 	ldrh	w1, [x1]
 	cmp	w2, w1
-	bcs	.L788
+	bcs	.L806
 	mov	w2, w22
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L789
+	cbz	w0, .L807
 	ldp	x8, x6, [x29, 96]
 	add	w5, w24, 1
 	add	w21, w21, 1
@@ -4841,52 +4950,52 @@ gc_search_src_blk:
 	ldrh	w0, [x0, x6]
 	add	w3, w23, w0
 	and	w23, w3, 65535
-	bcs	.L790
+	bcs	.L808
 	cmp	w20, w23
-	bcs	.L789
-.L790:
+	bcs	.L807
+.L808:
 	cmp	w24, w19
-	adrp	x0, .LANCHOR94
-	bcc	.L792
-	cbnz	w21, .L793
+	adrp	x0, .LANCHOR100
+	bcc	.L810
+	cbnz	w21, .L811
 	ldr	x1, [x29, 112]
-	ldrh	w2, [x1, #:lo12:.LANCHOR91]
-	adrp	x1, .LANCHOR101
-	ldrh	w1, [x1, #:lo12:.LANCHOR101]
+	ldrh	w2, [x1, #:lo12:.LANCHOR97]
+	adrp	x1, .LANCHOR107
+	ldrh	w1, [x1, #:lo12:.LANCHOR107]
 	cmp	w2, w1
-	bls	.L793
-.L792:
-	ldrh	w2, [x0, #:lo12:.LANCHOR94]
+	bls	.L811
+.L810:
+	ldrh	w2, [x0, #:lo12:.LANCHOR100]
 	ldp	x0, x3, [x29, 144]
-	ldrh	w1, [x27, #:lo12:.LANCHOR100]
+	ldrh	w1, [x27, #:lo12:.LANCHOR106]
 	lsr	w2, w2, 3
-	ldrh	w0, [x0, #:lo12:.LANCHOR85]
-	ldrb	w6, [x3, #:lo12:.LANCHOR79]
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	ldrb	w6, [x3, #:lo12:.LANCHOR85]
 	mul	w0, w0, w6
 	sub	w0, w0, w2
 	cmp	w1, w0
-	bge	.L785
+	bge	.L803
 	add	w1, w1, w2
-	strh	w1, [x27, #:lo12:.LANCHOR100]
-.L785:
+	strh	w1, [x27, #:lo12:.LANCHOR106]
+.L803:
 	ldr	w0, [x29, 128]
-	cbz	w0, .L766
+	cbz	w0, .L784
 	and	w27, w19, 65535
 	cmp	w24, w27
-	bcs	.L766
+	bcs	.L784
 	cmp	w23, w20
-	bcs	.L766
-	adrp	x26, .LANCHOR90
-	adrp	x4, .LANCHOR88
-	add	x0, x26, :lo12:.LANCHOR90
-	add	x28, x4, :lo12:.LANCHOR88
-	adrp	x21, .LANCHOR102
+	bcs	.L784
+	adrp	x26, .LANCHOR96
+	adrp	x4, .LANCHOR94
+	add	x0, x26, :lo12:.LANCHOR96
+	add	x28, x4, :lo12:.LANCHOR94
+	adrp	x21, .LANCHOR108
 	str	x0, [x29, 144]
 	mov	w25, 64
-	add	x0, x21, :lo12:.LANCHOR102
+	add	x0, x21, :lo12:.LANCHOR108
 	adrp	x26, .LANCHOR11
 	str	x0, [x29, 136]
-.L801:
+.L819:
 	ldrh	w6, [x28]
 	ldr	x0, [x29, 144]
 	mov	w1, w6
@@ -4894,7 +5003,7 @@ gc_search_src_blk:
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L795
+	beq	.L813
 	add	w6, w6, 1
 	strh	w6, [x28]
 	ubfiz	x6, x1, 1, 16
@@ -4903,19 +5012,19 @@ gc_search_src_blk:
 	ldr	x1, [x29, 136]
 	ldrh	w1, [x1]
 	cmp	w2, w1
-	bcs	.L796
-	adrp	x1, .LANCHOR98
-	ldrh	w2, [x1, #:lo12:.LANCHOR98]
-	adrp	x1, .LANCHOR99
-	ldrh	w1, [x1, #:lo12:.LANCHOR99]
+	bcs	.L814
+	adrp	x1, .LANCHOR104
+	ldrh	w2, [x1, #:lo12:.LANCHOR104]
+	adrp	x1, .LANCHOR105
+	ldrh	w1, [x1, #:lo12:.LANCHOR105]
 	cmp	w1, w2, lsr 1
-	bls	.L797
-.L796:
+	bls	.L815
+.L814:
 	mov	w2, w22
 	mov	w1, 0
 	str	x6, [x29, 128]
 	bl	gc_add_sblk
-	cbz	w0, .L798
+	cbz	w0, .L816
 	adrp	x0, .LANCHOR11
 	ldr	x6, [x29, 128]
 	add	w5, w24, 1
@@ -4925,117 +5034,117 @@ gc_search_src_blk:
 	ldrh	w0, [x0, x6]
 	add	w3, w23, w0
 	and	w23, w3, 65535
-	bls	.L799
+	bls	.L817
 	cmp	w20, w23
-	bcs	.L798
-.L800:
-	adrp	x0, .LANCHOR94
-	ldrh	w1, [x21, #:lo12:.LANCHOR102]
-	ldrh	w0, [x0, #:lo12:.LANCHOR94]
+	bcs	.L816
+.L818:
+	adrp	x0, .LANCHOR100
+	ldrh	w1, [x21, #:lo12:.LANCHOR108]
+	ldrh	w0, [x0, #:lo12:.LANCHOR100]
 	cmp	w1, w0, lsr 1
-	bls	.L766
+	bls	.L784
 	sub	w0, w1, w0, lsr 3
-	strh	w0, [x21, #:lo12:.LANCHOR102]
-	b	.L766
-.L776:
+	strh	w0, [x21, #:lo12:.LANCHOR108]
+	b	.L784
+.L794:
 	lsr	w0, w0, 2
 	mov	w1, 0
-	strh	w0, [x25, #:lo12:.LANCHOR87]
-	add	x0, x28, :lo12:.LANCHOR95
+	strh	w0, [x25, #:lo12:.LANCHOR93]
+	add	x0, x28, :lo12:.LANCHOR101
 	bl	_list_get_gc_head_node
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L778
+	beq	.L796
 	adrp	x2, .LANCHOR11
 	ubfiz	x1, x1, 1, 16
 	ldr	x3, [x2, #:lo12:.LANCHOR11]
-	adrp	x2, .LANCHOR94
-	ldrh	w2, [x2, #:lo12:.LANCHOR94]
+	adrp	x2, .LANCHOR100
+	ldrh	w2, [x2, #:lo12:.LANCHOR100]
 	ldrh	w1, [x3, x1]
 	cmp	w1, w2, lsr 2
-	bcs	.L778
+	bcs	.L796
 	mov	w1, 1
 	mov	w2, w22
-	strh	w1, [x25, #:lo12:.LANCHOR87]
+	strh	w1, [x25, #:lo12:.LANCHOR93]
 	mov	w1, 0
 	bl	gc_add_sblk
 	cmp	w0, 0
 	cset	w24, ne
-	b	.L777
-.L779:
+	b	.L795
+.L797:
 	strh	wzr, [x25]
-	b	.L775
-.L780:
+	b	.L793
+.L798:
 	sub	w27, w27, #1
 	ands	w27, w27, 65535
-	bne	.L781
-	b	.L775
-.L782:
+	bne	.L799
+	b	.L793
+.L800:
 	cmp	w6, 64
-	bls	.L773
+	bls	.L791
 	strh	wzr, [x28]
-	b	.L773
-.L783:
+	b	.L791
+.L801:
 	sub	w26, w26, #1
 	ands	w26, w26, 65535
-	bne	.L784
-	b	.L773
-.L806:
+	bne	.L802
+	b	.L791
+.L824:
 	mov	w23, 0
 	mov	w24, 0
-	b	.L773
-.L788:
-	strh	wzr, [x25, #:lo12:.LANCHOR89]
-	b	.L790
-.L786:
+	b	.L791
+.L806:
+	strh	wzr, [x25, #:lo12:.LANCHOR95]
+	b	.L808
+.L804:
 	strh	wzr, [x28]
-	b	.L790
-.L789:
+	b	.L808
+.L807:
 	sub	w26, w26, #1
 	ands	w26, w26, 65535
-	bne	.L791
-	b	.L790
-.L793:
+	bne	.L809
+	b	.L808
+.L811:
 	ldr	x1, [x29, 152]
-	ldrh	w0, [x0, #:lo12:.LANCHOR94]
-	ldrh	w2, [x27, #:lo12:.LANCHOR100]
-	ldrb	w1, [x1, #:lo12:.LANCHOR79]
+	ldrh	w0, [x0, #:lo12:.LANCHOR100]
+	ldrh	w2, [x27, #:lo12:.LANCHOR106]
+	ldrb	w1, [x1, #:lo12:.LANCHOR85]
 	mul	w1, w1, w0
 	cmp	w2, w1
-	ble	.L766
+	ble	.L784
 	sub	w0, w2, w0, lsr 3
-	strh	w0, [x27, #:lo12:.LANCHOR100]
-	b	.L766
-.L795:
+	strh	w0, [x27, #:lo12:.LANCHOR106]
+	b	.L784
+.L813:
 	cmp	w6, 64
-	bls	.L797
+	bls	.L815
 	strh	wzr, [x28]
-.L797:
+.L815:
 	cmp	w24, w27
-	bcc	.L800
-.L799:
-	adrp	x0, .LANCHOR94
-	ldrh	w2, [x21, #:lo12:.LANCHOR102]
-	ldrh	w1, [x0, #:lo12:.LANCHOR94]
+	bcc	.L818
+.L817:
+	adrp	x0, .LANCHOR100
+	ldrh	w2, [x21, #:lo12:.LANCHOR108]
+	ldrh	w1, [x0, #:lo12:.LANCHOR100]
 	ldr	x0, [x29, 152]
-	ldrb	w0, [x0, #:lo12:.LANCHOR79]
+	ldrb	w0, [x0, #:lo12:.LANCHOR85]
 	mul	w0, w0, w1
 	sub	w0, w0, #32
 	cmp	w2, w0
-	bge	.L766
+	bge	.L784
 	add	w1, w2, w1, lsr 3
-	strh	w1, [x21, #:lo12:.LANCHOR102]
-	b	.L766
-.L798:
+	strh	w1, [x21, #:lo12:.LANCHOR108]
+	b	.L784
+.L816:
 	sub	w25, w25, #1
 	ands	w25, w25, 65535
-	bne	.L801
-	b	.L797
-.L807:
+	bne	.L819
+	b	.L815
+.L825:
 	mov	w23, 0
 	mov	w24, 0
-	b	.L775
+	b	.L793
 	.size	gc_search_src_blk, .-gc_search_src_blk
 	.section	.text.zftl_get_gc_node,"ax",@progbits
 	.align	2
@@ -5045,23 +5154,23 @@ zftl_get_gc_node:
 	and	w1, w1, 65535
 	and	w0, w0, 65535
 	cmp	w1, 5
-	bne	.L859
+	bne	.L877
 	mov	w1, w0
-	adrp	x0, .LANCHOR92
-	add	x0, x0, :lo12:.LANCHOR92
-.L861:
+	adrp	x0, .LANCHOR98
+	add	x0, x0, :lo12:.LANCHOR98
+.L879:
 	b	_list_get_gc_head_node
-.L859:
+.L877:
 	cmp	w1, 2
 	mov	w1, w0
-	bne	.L860
-	adrp	x0, .LANCHOR95
-	add	x0, x0, :lo12:.LANCHOR95
-	b	.L861
-.L860:
-	adrp	x0, .LANCHOR90
-	add	x0, x0, :lo12:.LANCHOR90
-	b	.L861
+	bne	.L878
+	adrp	x0, .LANCHOR101
+	add	x0, x0, :lo12:.LANCHOR101
+	b	.L879
+.L878:
+	adrp	x0, .LANCHOR96
+	add	x0, x0, :lo12:.LANCHOR96
+	b	.L879
 	.size	zftl_get_gc_node, .-zftl_get_gc_node
 	.section	.text.zftl_insert_free_list,"ax",@progbits
 	.align	2
@@ -5074,27 +5183,27 @@ zftl_insert_free_list:
 	add	x0, x0, x1, uxth 2
 	ldrb	w0, [x0, 2]
 	ands	w0, w0, 24
-	bne	.L863
-	adrp	x2, .LANCHOR103
-	adrp	x0, .LANCHOR104
-	add	x2, x2, :lo12:.LANCHOR103
-	add	x0, x0, :lo12:.LANCHOR104
-.L865:
+	bne	.L881
+	adrp	x2, .LANCHOR109
+	adrp	x0, .LANCHOR110
+	add	x2, x2, :lo12:.LANCHOR109
+	add	x0, x0, :lo12:.LANCHOR110
+.L883:
 	b	_insert_free_list
-.L863:
+.L881:
 	cmp	w0, 16
-	bne	.L864
-	adrp	x2, .LANCHOR105
-	adrp	x0, .LANCHOR106
-	add	x2, x2, :lo12:.LANCHOR105
-	add	x0, x0, :lo12:.LANCHOR106
-	b	.L865
-.L864:
-	adrp	x2, .LANCHOR107
-	adrp	x0, .LANCHOR108
-	add	x2, x2, :lo12:.LANCHOR107
-	add	x0, x0, :lo12:.LANCHOR108
-	b	.L865
+	bne	.L882
+	adrp	x2, .LANCHOR111
+	adrp	x0, .LANCHOR112
+	add	x2, x2, :lo12:.LANCHOR111
+	add	x0, x0, :lo12:.LANCHOR112
+	b	.L883
+.L882:
+	adrp	x2, .LANCHOR113
+	adrp	x0, .LANCHOR114
+	add	x2, x2, :lo12:.LANCHOR113
+	add	x0, x0, :lo12:.LANCHOR114
+	b	.L883
 	.size	zftl_insert_free_list, .-zftl_insert_free_list
 	.section	.text.zftl_insert_data_list,"ax",@progbits
 	.align	2
@@ -5108,30 +5217,30 @@ zftl_insert_data_list:
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L867
-	adrp	x2, .LANCHOR97
-	adrp	x0, .LANCHOR95
-	add	x2, x2, :lo12:.LANCHOR97
-	add	x0, x0, :lo12:.LANCHOR95
-.L870:
+	bne	.L885
+	adrp	x2, .LANCHOR103
+	adrp	x0, .LANCHOR101
+	add	x2, x2, :lo12:.LANCHOR103
+	add	x0, x0, :lo12:.LANCHOR101
+.L888:
 	b	_insert_data_list
-.L867:
+.L885:
 	cmp	w2, 96
-	bne	.L868
-	adrp	x2, .LANCHOR99
-	adrp	x0, .LANCHOR90
-	add	x2, x2, :lo12:.LANCHOR99
-	add	x0, x0, :lo12:.LANCHOR90
-	b	.L870
-.L868:
+	bne	.L886
+	adrp	x2, .LANCHOR105
+	adrp	x0, .LANCHOR96
+	add	x2, x2, :lo12:.LANCHOR105
+	add	x0, x0, :lo12:.LANCHOR96
+	b	.L888
+.L886:
 	cmp	w2, 160
-	bne	.L866
-	adrp	x2, .LANCHOR91
-	adrp	x0, .LANCHOR92
-	add	x2, x2, :lo12:.LANCHOR91
-	add	x0, x0, :lo12:.LANCHOR92
-	b	.L870
-.L866:
+	bne	.L884
+	adrp	x2, .LANCHOR97
+	adrp	x0, .LANCHOR98
+	add	x2, x2, :lo12:.LANCHOR97
+	add	x0, x0, :lo12:.LANCHOR98
+	b	.L888
+.L884:
 	ret
 	.size	zftl_insert_data_list, .-zftl_insert_data_list
 	.section	.text.zftl_gc_get_free_sblk,"ax",@progbits
@@ -5150,8 +5259,8 @@ zftl_gc_get_free_sblk:
 	ldrh	w19, [x0, 588]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L872
-	cbnz	w21, .L872
+	beq	.L890
+	cbnz	w21, .L890
 	mov	w1, w19
 	adrp	x0, .LC59
 	add	x0, x0, :lo12:.LC59
@@ -5159,52 +5268,52 @@ zftl_gc_get_free_sblk:
 	ldr	x0, [x20, #:lo12:.LANCHOR12]
 	mov	w1, -1
 	strh	w1, [x0, 588]
-.L873:
+.L891:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L872:
-	adrp	x2, .LANCHOR105
-	adrp	x20, .LANCHOR107
-	ldrh	w0, [x2, #:lo12:.LANCHOR105]
-	ldrh	w1, [x20, #:lo12:.LANCHOR107]
+.L890:
+	adrp	x2, .LANCHOR111
+	adrp	x20, .LANCHOR113
+	ldrh	w0, [x2, #:lo12:.LANCHOR111]
+	ldrh	w1, [x20, #:lo12:.LANCHOR113]
 	cmp	w0, w1
-	bcc	.L874
-	adrp	x3, .LANCHOR103
-	ldrh	w3, [x3, #:lo12:.LANCHOR103]
+	bcc	.L892
+	adrp	x3, .LANCHOR109
+	ldrh	w3, [x3, #:lo12:.LANCHOR109]
 	cmp	w3, w0
-	bls	.L875
-	cbz	w1, .L875
-.L874:
-	cbnz	w21, .L876
-	lsr	w1, w1, 2
-.L877:
-	adrp	x0, .LANCHOR108
-	add	x2, x20, :lo12:.LANCHOR107
-	add	x0, x0, :lo12:.LANCHOR108
+	bls	.L893
+	cbz	w1, .L893
 .L892:
+	cbnz	w21, .L894
+	lsr	w1, w1, 2
+.L895:
+	adrp	x0, .LANCHOR114
+	add	x2, x20, :lo12:.LANCHOR113
+	add	x0, x0, :lo12:.LANCHOR114
+.L910:
 	bl	_list_pop_index_node
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	bne	.L880
-	adrp	x0, .LANCHOR103
-	ldrh	w5, [x20, #:lo12:.LANCHOR107]
+	bne	.L898
+	adrp	x0, .LANCHOR109
+	ldrh	w5, [x20, #:lo12:.LANCHOR113]
 	mov	w2, w22
 	mov	w1, w19
-	ldrh	w4, [x0, #:lo12:.LANCHOR103]
-	adrp	x0, .LANCHOR104
-	ldr	x3, [x0, #:lo12:.LANCHOR104]
+	ldrh	w4, [x0, #:lo12:.LANCHOR109]
+	adrp	x0, .LANCHOR110
+	ldr	x3, [x0, #:lo12:.LANCHOR110]
 	adrp	x0, .LC60
 	add	x0, x0, :lo12:.LC60
 	bl	printf
-.L880:
-	cbz	w21, .L873
+.L898:
+	cbz	w21, .L891
 	adrp	x0, .LANCHOR19
 	ldr	w0, [x0, #:lo12:.LANCHOR19]
-	tbz	x0, 8, .L873
+	tbz	x0, 8, .L891
 	adrp	x4, .LANCHOR11
 	adrp	x1, .LANCHOR9
 	uxtw	x3, w19
@@ -5224,20 +5333,20 @@ zftl_gc_get_free_sblk:
 	ubfx	x2, x2, 5, 3
 	add	x0, x0, :lo12:.LC61
 	bl	printf
-	b	.L873
-.L876:
+	b	.L891
+.L894:
 	mov	w1, 7
 	mul	w1, w0, w1
 	lsr	w1, w1, 3
-	b	.L877
-.L875:
+	b	.L895
+.L893:
 	lsr	w1, w0, 3
 	cmp	w21, 0
-	adrp	x0, .LANCHOR106
+	adrp	x0, .LANCHOR112
 	csel	w1, w1, wzr, ne
-	add	x2, x2, :lo12:.LANCHOR105
-	add	x0, x0, :lo12:.LANCHOR106
-	b	.L892
+	add	x2, x2, :lo12:.LANCHOR111
+	add	x0, x0, :lo12:.LANCHOR112
+	b	.L910
 	.size	zftl_gc_get_free_sblk, .-zftl_gc_get_free_sblk
 	.section	.text.zftl_get_free_sblk,"ax",@progbits
 	.align	2
@@ -5250,58 +5359,58 @@ zftl_get_free_sblk:
 	and	w20, w1, 65535
 	str	x21, [sp, 32]
 	cmp	w20, 5
-	bne	.L894
-	adrp	x2, .LANCHOR105
-	adrp	x0, .LANCHOR107
-	ldrh	w3, [x2, #:lo12:.LANCHOR105]
-	ldrh	w1, [x0, #:lo12:.LANCHOR107]
+	bne	.L912
+	adrp	x2, .LANCHOR111
+	adrp	x0, .LANCHOR113
+	ldrh	w3, [x2, #:lo12:.LANCHOR111]
+	ldrh	w1, [x0, #:lo12:.LANCHOR113]
 	cmp	w3, w1
-	bcc	.L895
-	adrp	x4, .LANCHOR103
-	ldrh	w4, [x4, #:lo12:.LANCHOR103]
+	bcc	.L913
+	adrp	x4, .LANCHOR109
+	ldrh	w4, [x4, #:lo12:.LANCHOR109]
 	cmp	w4, w3
-	bls	.L896
-	cbz	w1, .L896
-.L895:
-	add	x2, x0, :lo12:.LANCHOR107
+	bls	.L914
+	cbz	w1, .L914
+.L913:
+	add	x2, x0, :lo12:.LANCHOR113
 	lsr	w1, w1, 1
-.L915:
-	adrp	x0, .LANCHOR108
-	add	x0, x0, :lo12:.LANCHOR108
-	b	.L914
-.L896:
-	adrp	x0, .LANCHOR106
-	add	x2, x2, :lo12:.LANCHOR105
-	add	x0, x0, :lo12:.LANCHOR106
-	mov	w1, 0
+.L933:
+	adrp	x0, .LANCHOR114
+	add	x0, x0, :lo12:.LANCHOR114
+	b	.L932
 .L914:
+	adrp	x0, .LANCHOR112
+	add	x2, x2, :lo12:.LANCHOR111
+	add	x0, x0, :lo12:.LANCHOR112
+	mov	w1, 0
+.L932:
 	bl	_list_pop_index_node
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	bne	.L899
-	adrp	x0, .LANCHOR107
+	bne	.L917
+	adrp	x0, .LANCHOR113
 	mov	w2, w20
 	mov	w1, w19
-	ldrh	w5, [x0, #:lo12:.LANCHOR107]
-	adrp	x0, .LANCHOR103
-	ldrh	w4, [x0, #:lo12:.LANCHOR103]
-	adrp	x0, .LANCHOR104
-	ldr	x3, [x0, #:lo12:.LANCHOR104]
+	ldrh	w5, [x0, #:lo12:.LANCHOR113]
+	adrp	x0, .LANCHOR109
+	ldrh	w4, [x0, #:lo12:.LANCHOR109]
+	adrp	x0, .LANCHOR110
+	ldr	x3, [x0, #:lo12:.LANCHOR110]
 	adrp	x0, .LC60
 	add	x0, x0, :lo12:.LC60
 	bl	printf
-	b	.L899
-.L894:
+	b	.L917
+.L912:
 	adrp	x21, .LANCHOR12
 	and	w3, w0, 65535
 	ldr	x0, [x21, #:lo12:.LANCHOR12]
 	ldrh	w19, [x0, 590]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L898
+	beq	.L916
 	cmp	w20, 1
-	beq	.L898
+	beq	.L916
 	mov	w1, w19
 	adrp	x0, .LC62
 	add	x0, x0, :lo12:.LC62
@@ -5309,47 +5418,47 @@ zftl_get_free_sblk:
 	ldr	x0, [x21, #:lo12:.LANCHOR12]
 	mov	w1, -1
 	strh	w1, [x0, 590]
-.L899:
+.L917:
 	mov	w0, w19
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L898:
-	adrp	x2, .LANCHOR103
-	adrp	x4, .LANCHOR107
-	ldrh	w0, [x2, #:lo12:.LANCHOR103]
-	ldrh	w1, [x4, #:lo12:.LANCHOR107]
+.L916:
+	adrp	x2, .LANCHOR109
+	adrp	x4, .LANCHOR113
+	ldrh	w0, [x2, #:lo12:.LANCHOR109]
+	ldrh	w1, [x4, #:lo12:.LANCHOR113]
 	cmp	w0, w1
-	bcc	.L900
-	adrp	x5, .LANCHOR105
-	ldrh	w5, [x5, #:lo12:.LANCHOR105]
+	bcc	.L918
+	adrp	x5, .LANCHOR111
+	ldrh	w5, [x5, #:lo12:.LANCHOR111]
 	cmp	w5, w0
-	bls	.L901
-	cbz	w1, .L901
-.L900:
+	bls	.L919
+	cbz	w1, .L919
+.L918:
 	bl	get_ink_scaned_blk
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	bne	.L899
+	bne	.L917
 	cmp	w20, 1
-	bne	.L902
-	ldrh	w3, [x4, #:lo12:.LANCHOR107]
+	bne	.L920
+	ldrh	w3, [x4, #:lo12:.LANCHOR113]
 	lsr	w3, w3, 1
-.L902:
-	add	x2, x4, :lo12:.LANCHOR107
+.L920:
+	add	x2, x4, :lo12:.LANCHOR113
 	mov	w1, w3
-	b	.L915
-.L901:
+	b	.L933
+.L919:
 	lsr	w0, w0, 1
 	cmp	w20, 1
 	csel	w3, w0, w3, eq
-	add	x2, x2, :lo12:.LANCHOR103
-	adrp	x0, .LANCHOR104
+	add	x2, x2, :lo12:.LANCHOR109
+	adrp	x0, .LANCHOR110
 	mov	w1, w3
-	add	x0, x0, :lo12:.LANCHOR104
-	b	.L914
+	add	x0, x0, :lo12:.LANCHOR110
+	b	.L932
 	.size	zftl_get_free_sblk, .-zftl_get_free_sblk
 	.section	.text.zftl_remove_data_node,"ax",@progbits
 	.align	2
@@ -5363,30 +5472,30 @@ zftl_remove_data_node:
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L917
-	adrp	x2, .LANCHOR97
-	adrp	x0, .LANCHOR95
-	add	x2, x2, :lo12:.LANCHOR97
-	add	x0, x0, :lo12:.LANCHOR95
-.L920:
+	bne	.L935
+	adrp	x2, .LANCHOR103
+	adrp	x0, .LANCHOR101
+	add	x2, x2, :lo12:.LANCHOR103
+	add	x0, x0, :lo12:.LANCHOR101
+.L938:
 	b	_list_remove_node
-.L917:
+.L935:
 	cmp	w2, 96
-	bne	.L918
-	adrp	x2, .LANCHOR99
-	adrp	x0, .LANCHOR90
-	add	x2, x2, :lo12:.LANCHOR99
-	add	x0, x0, :lo12:.LANCHOR90
-	b	.L920
-.L918:
+	bne	.L936
+	adrp	x2, .LANCHOR105
+	adrp	x0, .LANCHOR96
+	add	x2, x2, :lo12:.LANCHOR105
+	add	x0, x0, :lo12:.LANCHOR96
+	b	.L938
+.L936:
 	cmp	w2, 160
-	bne	.L916
-	adrp	x2, .LANCHOR91
-	adrp	x0, .LANCHOR92
-	add	x2, x2, :lo12:.LANCHOR91
-	add	x0, x0, :lo12:.LANCHOR92
-	b	.L920
-.L916:
+	bne	.L934
+	adrp	x2, .LANCHOR97
+	adrp	x0, .LANCHOR98
+	add	x2, x2, :lo12:.LANCHOR97
+	add	x0, x0, :lo12:.LANCHOR98
+	b	.L938
+.L934:
 	ret
 	.size	zftl_remove_data_node, .-zftl_remove_data_node
 	.section	.text.zftl_remove_free_node,"ax",@progbits
@@ -5400,27 +5509,27 @@ zftl_remove_free_node:
 	add	x0, x0, x1, uxth 2
 	ldrb	w0, [x0, 2]
 	ands	w0, w0, 24
-	bne	.L922
-	adrp	x2, .LANCHOR103
-	adrp	x0, .LANCHOR104
-	add	x2, x2, :lo12:.LANCHOR103
-	add	x0, x0, :lo12:.LANCHOR104
-.L924:
+	bne	.L940
+	adrp	x2, .LANCHOR109
+	adrp	x0, .LANCHOR110
+	add	x2, x2, :lo12:.LANCHOR109
+	add	x0, x0, :lo12:.LANCHOR110
+.L942:
 	b	_list_remove_node
-.L922:
+.L940:
 	cmp	w0, 16
-	bne	.L923
-	adrp	x2, .LANCHOR105
-	adrp	x0, .LANCHOR106
-	add	x2, x2, :lo12:.LANCHOR105
-	add	x0, x0, :lo12:.LANCHOR106
-	b	.L924
-.L923:
-	adrp	x2, .LANCHOR107
-	adrp	x0, .LANCHOR108
-	add	x2, x2, :lo12:.LANCHOR107
-	add	x0, x0, :lo12:.LANCHOR108
-	b	.L924
+	bne	.L941
+	adrp	x2, .LANCHOR111
+	adrp	x0, .LANCHOR112
+	add	x2, x2, :lo12:.LANCHOR111
+	add	x0, x0, :lo12:.LANCHOR112
+	b	.L942
+.L941:
+	adrp	x2, .LANCHOR113
+	adrp	x0, .LANCHOR114
+	add	x2, x2, :lo12:.LANCHOR113
+	add	x0, x0, :lo12:.LANCHOR114
+	b	.L942
 	.size	zftl_remove_free_node, .-zftl_remove_free_node
 	.section	.text.zftl_list_update_data_list,"ax",@progbits
 	.align	2
@@ -5434,30 +5543,30 @@ zftl_list_update_data_list:
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L926
-	adrp	x2, .LANCHOR97
-	adrp	x0, .LANCHOR95
-	add	x2, x2, :lo12:.LANCHOR97
-	add	x0, x0, :lo12:.LANCHOR95
-.L929:
+	bne	.L944
+	adrp	x2, .LANCHOR103
+	adrp	x0, .LANCHOR101
+	add	x2, x2, :lo12:.LANCHOR103
+	add	x0, x0, :lo12:.LANCHOR101
+.L947:
 	b	_list_update_data_list
-.L926:
+.L944:
 	cmp	w2, 96
-	bne	.L927
-	adrp	x2, .LANCHOR99
-	adrp	x0, .LANCHOR90
-	add	x2, x2, :lo12:.LANCHOR99
-	add	x0, x0, :lo12:.LANCHOR90
-	b	.L929
-.L927:
+	bne	.L945
+	adrp	x2, .LANCHOR105
+	adrp	x0, .LANCHOR96
+	add	x2, x2, :lo12:.LANCHOR105
+	add	x0, x0, :lo12:.LANCHOR96
+	b	.L947
+.L945:
 	cmp	w2, 160
-	bne	.L925
-	adrp	x2, .LANCHOR91
-	adrp	x0, .LANCHOR92
-	add	x2, x2, :lo12:.LANCHOR91
-	add	x0, x0, :lo12:.LANCHOR92
-	b	.L929
-.L925:
+	bne	.L943
+	adrp	x2, .LANCHOR97
+	adrp	x0, .LANCHOR98
+	add	x2, x2, :lo12:.LANCHOR97
+	add	x0, x0, :lo12:.LANCHOR98
+	b	.L947
+.L943:
 	ret
 	.size	zftl_list_update_data_list, .-zftl_list_update_data_list
 	.section	.text.print_list_info,"ax",@progbits
@@ -5478,16 +5587,16 @@ print_list_info:
 	add	x0, x0, :lo12:.LC63
 	bl	printf
 	ldr	x19, [x19]
-	cbz	x19, .L930
+	cbz	x19, .L948
 	mov	x24, -6148914691236517206
 	adrp	x22, .LC64
-	adrp	x21, .LANCHOR109
+	adrp	x21, .LANCHOR115
 	add	x22, x22, :lo12:.LC64
-	add	x21, x21, :lo12:.LANCHOR109
+	add	x21, x21, :lo12:.LANCHOR115
 	mov	w20, 0
 	adrp	x23, .LANCHOR4
 	movk	x24, 0xaaab, lsl 0
-.L934:
+.L952:
 	ldr	x2, [x23, #:lo12:.LANCHOR4]
 	adrp	x1, .LANCHOR9
 	adrp	x8, .LANCHOR11
@@ -5520,7 +5629,7 @@ print_list_info:
 	ldrh	w19, [x19]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L930
+	beq	.L948
 	ldr	x0, [x23, #:lo12:.LANCHOR4]
 	mov	w1, 6
 	add	w20, w20, 1
@@ -5528,8 +5637,8 @@ print_list_info:
 	umaddl	x19, w19, w1, x0
 	ldrh	w0, [x21]
 	cmp	w0, w20
-	bcs	.L934
-.L930:
+	bcs	.L952
+.L948:
 	ldp	x19, x20, [sp, 48]
 	ldp	x21, x22, [sp, 64]
 	ldp	x23, x24, [sp, 80]
@@ -5543,37 +5652,37 @@ print_list_info:
 	.type	dump_all_list_info, %function
 dump_all_list_info:
 	stp	x29, x30, [sp, -16]!
+	adrp	x1, .LANCHOR109
+	adrp	x0, .LANCHOR110
+	add	x1, x1, :lo12:.LANCHOR109
+	add	x29, sp, 0
+	add	x0, x0, :lo12:.LANCHOR110
+	bl	print_list_info
+	adrp	x1, .LANCHOR111
+	adrp	x0, .LANCHOR112
+	add	x1, x1, :lo12:.LANCHOR111
+	add	x0, x0, :lo12:.LANCHOR112
+	bl	print_list_info
+	adrp	x1, .LANCHOR113
+	adrp	x0, .LANCHOR114
+	add	x1, x1, :lo12:.LANCHOR113
+	add	x0, x0, :lo12:.LANCHOR114
+	bl	print_list_info
 	adrp	x1, .LANCHOR103
-	adrp	x0, .LANCHOR104
+	adrp	x0, .LANCHOR101
 	add	x1, x1, :lo12:.LANCHOR103
-	add	x29, sp, 0
-	add	x0, x0, :lo12:.LANCHOR104
+	add	x0, x0, :lo12:.LANCHOR101
 	bl	print_list_info
 	adrp	x1, .LANCHOR105
-	adrp	x0, .LANCHOR106
+	adrp	x0, .LANCHOR96
 	add	x1, x1, :lo12:.LANCHOR105
-	add	x0, x0, :lo12:.LANCHOR106
-	bl	print_list_info
-	adrp	x1, .LANCHOR107
-	adrp	x0, .LANCHOR108
-	add	x1, x1, :lo12:.LANCHOR107
-	add	x0, x0, :lo12:.LANCHOR108
+	add	x0, x0, :lo12:.LANCHOR96
 	bl	print_list_info
+	ldp	x29, x30, [sp], 16
 	adrp	x1, .LANCHOR97
-	adrp	x0, .LANCHOR95
+	adrp	x0, .LANCHOR98
 	add	x1, x1, :lo12:.LANCHOR97
-	add	x0, x0, :lo12:.LANCHOR95
-	bl	print_list_info
-	adrp	x1, .LANCHOR99
-	adrp	x0, .LANCHOR90
-	add	x1, x1, :lo12:.LANCHOR99
-	add	x0, x0, :lo12:.LANCHOR90
-	bl	print_list_info
-	ldp	x29, x30, [sp], 16
-	adrp	x1, .LANCHOR91
-	adrp	x0, .LANCHOR92
-	add	x1, x1, :lo12:.LANCHOR91
-	add	x0, x0, :lo12:.LANCHOR92
+	add	x0, x0, :lo12:.LANCHOR98
 	b	print_list_info
 	.size	dump_all_list_info, .-dump_all_list_info
 	.section	.text.ftl_tmp_into_update,"ax",@progbits
@@ -5581,40 +5690,40 @@ dump_all_list_info:
 	.global	ftl_tmp_into_update
 	.type	ftl_tmp_into_update, %function
 ftl_tmp_into_update:
-	adrp	x0, .LANCHOR110
-	ldr	x0, [x0, #:lo12:.LANCHOR110]
+	adrp	x0, .LANCHOR69
+	ldr	x0, [x0, #:lo12:.LANCHOR69]
 	ldr	w1, [x0, 16]
 	cmp	w1, 2048
-	bls	.L939
+	bls	.L957
 	ldr	w2, [x0, 20]
 	add	w2, w2, w1, lsr 11
 	and	w1, w1, 2047
 	stp	w1, w2, [x0, 16]
-.L939:
+.L957:
 	ldr	w1, [x0, 24]
 	cmp	w1, 2048
-	bls	.L940
+	bls	.L958
 	ldr	w2, [x0, 28]
 	add	w2, w2, w1, lsr 11
 	and	w1, w1, 2047
 	stp	w1, w2, [x0, 24]
-.L940:
+.L958:
 	ldr	w1, [x0, 32]
 	cmp	w1, 1024
-	bls	.L941
+	bls	.L959
 	ldr	w2, [x0, 36]
 	add	w2, w2, w1, lsr 10
 	and	w1, w1, 1023
 	stp	w1, w2, [x0, 32]
-.L941:
+.L959:
 	ldr	w1, [x0, 40]
 	cmp	w1, 1024
-	bls	.L938
+	bls	.L956
 	ldr	w2, [x0, 44]
 	add	w2, w2, w1, lsr 10
 	and	w1, w1, 1023
 	stp	w1, w2, [x0, 40]
-.L938:
+.L956:
 	ret
 	.size	ftl_tmp_into_update, .-ftl_tmp_into_update
 	.section	.text.ftl_get_blk_list_in_sblk,"ax",@progbits
@@ -5625,16 +5734,16 @@ ftl_get_blk_list_in_sblk:
 	adrp	x2, .LANCHOR9
 	and	w0, w0, 65535
 	mov	w7, 24
-	adrp	x8, .LANCHOR74
+	adrp	x8, .LANCHOR80
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
-	add	x8, x8, :lo12:.LANCHOR74
+	add	x8, x8, :lo12:.LANCHOR80
 	mov	w3, 0
 	add	x2, x2, x0, uxth 2
 	ldrb	w13, [x2, 3]
-	adrp	x2, .LANCHOR79
-	ldrb	w11, [x2, #:lo12:.LANCHOR79]
-	adrp	x2, .LANCHOR75
-	ldrb	w6, [x2, #:lo12:.LANCHOR75]
+	adrp	x2, .LANCHOR85
+	ldrb	w11, [x2, #:lo12:.LANCHOR85]
+	adrp	x2, .LANCHOR81
+	ldrb	w6, [x2, #:lo12:.LANCHOR81]
 	adrp	x2, .LANCHOR31
 	ldrb	w2, [x2, #:lo12:.LANCHOR31]
 	sub	w7, w7, w2
@@ -5644,18 +5753,18 @@ ftl_get_blk_list_in_sblk:
 	sxth	w5, w2
 	and	w4, w0, 65535
 	mov	w0, 0
-.L944:
+.L962:
 	cmp	w3, w11
-	blt	.L948
+	blt	.L966
 	sxtw	x2, w0
 	mov	w3, -1
-.L949:
+.L967:
 	cmp	w11, w2
-	bgt	.L950
+	bgt	.L968
 	ret
-.L948:
+.L966:
 	asr	w2, w13, w3
-	tbnz	x2, 0, .L945
+	tbnz	x2, 0, .L963
 	sdiv	w2, w3, w6
 	ldrh	w10, [x8]
 	sbfiz	x12, x0, 1, 32
@@ -5664,26 +5773,98 @@ ftl_get_blk_list_in_sblk:
 	lsl	w2, w2, w10
 	add	w2, w4, w2
 	and	w2, w2, 65535
-	bhi	.L946
-.L951:
+	bhi	.L964
+.L969:
 	add	w0, w0, 1
 	strh	w2, [x1, x12]
-.L945:
+.L963:
 	add	w3, w3, 1
-	b	.L944
-.L946:
+	b	.L962
+.L964:
 	and	w10, w5, w3
 	add	w2, w2, w10
-	b	.L951
-.L950:
+	b	.L969
+.L968:
 	strh	w3, [x1, x2, lsl 1]
 	add	x2, x2, 1
-	b	.L949
+	b	.L967
 	.size	ftl_get_blk_list_in_sblk, .-ftl_get_blk_list_in_sblk
-	.section	.text.ftl_erase_phy_blk,"ax",@progbits
+	.section	.text.ftl_ink_check_sblk,"ax",@progbits
 	.align	2
-	.global	ftl_erase_phy_blk
-	.type	ftl_erase_phy_blk, %function
+	.global	ftl_ink_check_sblk
+	.type	ftl_ink_check_sblk, %function
+ftl_ink_check_sblk:
+	ret
+	.size	ftl_ink_check_sblk, .-ftl_ink_check_sblk
+	.section	.text.ftl_alloc_sblk,"ax",@progbits
+	.align	2
+	.global	ftl_alloc_sblk
+	.type	ftl_alloc_sblk, %function
+ftl_alloc_sblk:
+	stp	x29, x30, [sp, -64]!
+	cmp	w0, 5
+	add	x29, sp, 0
+	str	x23, [sp, 48]
+	and	w23, w0, 65535
+	stp	x19, x20, [sp, 16]
+	mov	w1, w23
+	stp	x21, x22, [sp, 32]
+	cset	w20, eq
+	mov	w21, w0
+	mov	w0, 0
+	bl	zftl_get_free_sblk
+	and	w19, w0, 65535
+	mov	w0, 65535
+	cmp	w19, w0
+	beq	.L973
+	adrp	x0, .LANCHOR9
+	mov	w22, w19
+	lsl	w20, w20, 1
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	add	x19, x0, x19, uxth 2
+	ldrb	w0, [x19, 2]
+	tst	w0, 224
+	beq	.L974
+	adrp	x1, .LANCHOR116
+	adrp	x0, .LC0
+	mov	w2, 1014
+	add	x1, x1, :lo12:.LANCHOR116
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L974:
+	ldrb	w0, [x19, 2]
+	bfi	w0, w21, 5, 3
+	ubfx	x1, x0, 3, 2
+	orr	w1, w20, w1
+	bfi	w0, w1, 3, 2
+	strb	w0, [x19, 2]
+	and	w1, w0, 24
+	cmp	w1, 24
+	bne	.L975
+	cbnz	w20, .L975
+	mov	w1, 1
+	bfi	w0, w1, 3, 2
+	strb	w0, [x19, 2]
+.L975:
+	mov	w0, w22
+	ldr	x23, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+.L973:
+	mov	w1, w23
+	ldr	x23, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	b	zftl_get_free_sblk
+	.size	ftl_alloc_sblk, .-ftl_alloc_sblk
+	.section	.text.ftl_erase_phy_blk,"ax",@progbits
+	.align	2
+	.global	ftl_erase_phy_blk
+	.type	ftl_erase_phy_blk, %function
 ftl_erase_phy_blk:
 	stp	x29, x30, [sp, -48]!
 	and	w0, w0, 65535
@@ -5692,33 +5873,33 @@ ftl_erase_phy_blk:
 	mov	w21, w1
 	adrp	x1, .LANCHOR31
 	stp	x19, x20, [sp, 16]
-	adrp	x22, .LANCHOR111
+	adrp	x22, .LANCHOR117
 	ldrb	w19, [x1, #:lo12:.LANCHOR31]
 	mov	w1, 24
 	sub	w19, w1, w19
-	adrp	x1, .LANCHOR74
-	ldrh	w1, [x1, #:lo12:.LANCHOR74]
+	adrp	x1, .LANCHOR80
+	ldrh	w1, [x1, #:lo12:.LANCHOR80]
 	sub	w1, w19, w1
 	mov	w19, 1
 	lsl	w19, w19, w1
 	sub	w19, w19, #1
 	and	w19, w19, w0
 	asr	w20, w0, w1
-	adrp	x0, .LANCHOR80
+	adrp	x0, .LANCHOR86
 	sxth	w19, w19
-	ldrb	w0, [x0, #:lo12:.LANCHOR80]
-	cbz	w0, .L953
-	adrp	x0, .LANCHOR81
-	ldrb	w0, [x0, #:lo12:.LANCHOR81]
-	cbnz	w0, .L953
-	ldrh	w2, [x22, #:lo12:.LANCHOR111]
+	ldrb	w0, [x0, #:lo12:.LANCHOR86]
+	cbz	w0, .L982
+	adrp	x0, .LANCHOR87
+	ldrb	w0, [x0, #:lo12:.LANCHOR87]
+	cbnz	w0, .L982
+	ldrh	w2, [x22, #:lo12:.LANCHOR117]
 	cmp	w21, 0
 	cset	w1, eq
 	mov	w0, w20
 	mul	w2, w2, w19
 	bl	flash_erase_block_en
-.L953:
-	ldrh	w2, [x22, #:lo12:.LANCHOR111]
+.L982:
+	ldrh	w2, [x22, #:lo12:.LANCHOR117]
 	mov	w1, w21
 	mov	w0, w20
 	ldp	x21, x22, [sp, 32]
@@ -5739,56 +5920,56 @@ ftl_erase_sblk:
 	stp	x25, x26, [sp, 64]
 	and	w26, w0, 65535
 	ldr	x0, [x23, #:lo12:.LANCHOR9]
-	adrp	x25, .LANCHOR112
+	adrp	x25, .LANCHOR118
 	stp	x21, x22, [sp, 32]
 	ubfiz	x22, x26, 2, 16
 	add	x0, x0, x22
 	stp	x27, x28, [sp, 80]
 	stp	x19, x20, [sp, 16]
-	adrp	x24, .LANCHOR75
+	adrp	x24, .LANCHOR81
 	mov	w20, w1
-	add	x25, x25, :lo12:.LANCHOR112
+	add	x25, x25, :lo12:.LANCHOR118
 	ldrb	w28, [x0, 3]
-	add	x24, x24, :lo12:.LANCHOR75
+	add	x24, x24, :lo12:.LANCHOR81
 	add	x27, x29, 112
 	mov	w19, 0
-.L959:
+.L988:
 	ldrb	w0, [x25]
 	cmp	w19, w0
-	bge	.L970
+	bge	.L999
 	ldrb	w1, [x24]
-	adrp	x0, .LANCHOR111
+	adrp	x0, .LANCHOR117
 	mov	w21, 0
-	ldrh	w3, [x0, #:lo12:.LANCHOR111]
+	ldrh	w3, [x0, #:lo12:.LANCHOR117]
 	sub	w4, w1, #1
 	mov	w0, 0
 	mul	w6, w19, w1
 	mul	w5, w26, w1
-	b	.L971
-.L961:
+	b	.L1000
+.L990:
 	add	w2, w0, w6
 	asr	w2, w28, w2
-	tbnz	x2, 0, .L960
+	tbnz	x2, 0, .L989
 	and	w2, w0, w4
 	add	w2, w2, w5
 	mul	w2, w2, w3
 	str	w2, [x27, w21, sxtw 2]
 	add	w21, w21, 1
-.L960:
+.L989:
 	add	w0, w0, 1
-.L971:
+.L1000:
 	cmp	w0, w1
-	blt	.L961
+	blt	.L990
 	cmp	w1, 4
-	bne	.L962
+	bne	.L991
 	mov	x3, 0
-.L963:
+.L992:
 	cmp	w21, w3
-	bgt	.L964
-.L965:
+	bgt	.L993
+.L994:
 	add	w19, w19, 1
-	b	.L959
-.L964:
+	b	.L988
+.L993:
 	ldr	w2, [x27, x3, lsl 2]
 	mov	w1, w20
 	str	x3, [x29, 104]
@@ -5796,65 +5977,65 @@ ftl_erase_sblk:
 	bl	flash_erase_block_en
 	ldr	x3, [x29, 104]
 	add	x3, x3, 1
-	b	.L963
-.L962:
+	b	.L992
+.L991:
 	cmp	w21, 2
-	bne	.L966
-	adrp	x0, .LANCHOR80
-	ldrb	w0, [x0, #:lo12:.LANCHOR80]
-	cbz	w0, .L967
-	adrp	x0, .LANCHOR81
-	ldrb	w0, [x0, #:lo12:.LANCHOR81]
-	cbnz	w0, .L967
+	bne	.L995
+	adrp	x0, .LANCHOR86
+	ldrb	w0, [x0, #:lo12:.LANCHOR86]
+	cbz	w0, .L996
+	adrp	x0, .LANCHOR87
+	ldrb	w0, [x0, #:lo12:.LANCHOR87]
+	cbnz	w0, .L996
 	ldp	w2, w3, [x29, 112]
 	cmp	w20, 0
 	cset	w1, eq
 	mov	w0, w19
 	bl	flash_erase_duplane_block
-.L967:
+.L996:
 	ldp	w2, w3, [x29, 112]
 	mov	w1, w20
 	mov	w0, w19
 	bl	flash_erase_duplane_block
-	b	.L965
-.L966:
+	b	.L994
+.L995:
 	cmp	w21, 1
-	bne	.L965
-	adrp	x0, .LANCHOR80
-	ldrb	w0, [x0, #:lo12:.LANCHOR80]
-	cbz	w0, .L969
-	adrp	x0, .LANCHOR81
-	ldrb	w0, [x0, #:lo12:.LANCHOR81]
-	cbnz	w0, .L969
+	bne	.L994
+	adrp	x0, .LANCHOR86
+	ldrb	w0, [x0, #:lo12:.LANCHOR86]
+	cbz	w0, .L998
+	adrp	x0, .LANCHOR87
+	ldrb	w0, [x0, #:lo12:.LANCHOR87]
+	cbnz	w0, .L998
 	ldr	w2, [x29, 112]
 	cmp	w20, 0
 	cset	w1, eq
 	mov	w0, w19
 	bl	flash_erase_block_en
-.L969:
+.L998:
 	ldr	w2, [x29, 112]
 	mov	w1, w20
 	mov	w0, w19
 	bl	flash_erase_block_en
-	b	.L965
-.L970:
-	adrp	x2, .LANCHOR110
+	b	.L994
+.L999:
+	adrp	x2, .LANCHOR69
 	ldr	x3, [x23, #:lo12:.LANCHOR9]
-	cbnz	w20, .L972
+	cbnz	w20, .L1001
 	ldrh	w1, [x3, x22]
 	add	w0, w1, 1
 	and	w0, w0, 2047
 	bfi	w1, w0, 0, 11
 	strh	w1, [x3, x22]
-	ldr	x1, [x2, #:lo12:.LANCHOR110]
+	ldr	x1, [x2, #:lo12:.LANCHOR69]
 	ldr	w2, [x1, 84]
 	add	w2, w2, 1
 	str	w2, [x1, 84]
 	ldrh	w2, [x1, 96]
 	cmp	w2, w0
-	bge	.L974
+	bge	.L1003
 	strh	w0, [x1, 96]
-.L974:
+.L1003:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -5863,7 +6044,7 @@ ftl_erase_sblk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L972:
+.L1001:
 	ldr	w1, [x3, x22]
 	ubfx	x0, x1, 11, 8
 	add	w0, w0, 1
@@ -5871,15 +6052,15 @@ ftl_erase_sblk:
 	bfi	w1, w0, 11, 8
 	str	w1, [x3, x22]
 	and	w0, w0, 65535
-	ldr	x1, [x2, #:lo12:.LANCHOR110]
+	ldr	x1, [x2, #:lo12:.LANCHOR69]
 	ldr	w2, [x1, 80]
 	add	w2, w2, 1
 	str	w2, [x1, 80]
 	ldrh	w2, [x1, 98]
 	cmp	w2, w0
-	bcs	.L974
+	bcs	.L1003
 	strh	w0, [x1, 98]
-	b	.L974
+	b	.L1003
 	.size	ftl_erase_sblk, .-ftl_erase_sblk
 	.section	.text.ftl_alloc_sys_blk,"ax",@progbits
 	.align	2
@@ -5887,44 +6068,44 @@ ftl_erase_sblk:
 	.type	ftl_alloc_sys_blk, %function
 ftl_alloc_sys_blk:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR110
+	adrp	x0, .LANCHOR69
 	add	x29, sp, 0
-	ldr	x1, [x0, #:lo12:.LANCHOR110]
+	ldr	x1, [x0, #:lo12:.LANCHOR69]
 	ldrh	w2, [x1, 136]
 	str	x19, [sp, 16]
 	mov	x19, x0
 	cmp	w2, 63
-	bls	.L984
+	bls	.L1013
 	strh	wzr, [x1, 136]
-.L984:
+.L1013:
 	ldrh	w0, [x1, 112]
-	cbnz	w0, .L985
-	adrp	x1, .LANCHOR113
+	cbnz	w0, .L1014
+	adrp	x1, .LANCHOR119
 	adrp	x0, .LC0
-	mov	w2, 1359
-	add	x1, x1, :lo12:.LANCHOR113
+	mov	w2, 1364
+	add	x1, x1, :lo12:.LANCHOR119
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L985:
-	ldr	x1, [x19, #:lo12:.LANCHOR110]
+.L1014:
+	ldr	x1, [x19, #:lo12:.LANCHOR69]
 	mov	w5, 65535
-.L988:
+.L1017:
 	ldrh	w2, [x1, 136]
-.L986:
+.L1015:
 	mov	w3, w2
 	cmp	w2, 63
-	ble	.L987
+	ble	.L1016
 	strh	wzr, [x1, 136]
-	b	.L988
-.L987:
+	b	.L1017
+.L1016:
 	add	x4, x2, 1
 	add	x0, x1, x4, lsl 1
 	ldrh	w0, [x0, 158]
 	cmp	w0, w5
-	bne	.L991
+	bne	.L1020
 	mov	x2, x4
-	b	.L986
-.L991:
+	b	.L1015
+.L1020:
 	add	x3, x1, x3, sxtw 1
 	mov	w4, -1
 	ldr	x19, [sp, 16]
@@ -5945,40 +6126,40 @@ ftl_free_sys_blk:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 65535
-	adrp	x0, .LANCHOR110
+	adrp	x0, .LANCHOR69
 	mov	x19, x0
-	ldr	x1, [x0, #:lo12:.LANCHOR110]
+	ldr	x1, [x0, #:lo12:.LANCHOR69]
 	ldrh	w2, [x1, 138]
 	cmp	w2, 63
-	bls	.L994
+	bls	.L1023
 	strh	wzr, [x1, 138]
-.L994:
+.L1023:
 	ldrh	w0, [x1, 112]
 	cmp	w0, 63
-	bls	.L995
-	adrp	x1, .LANCHOR114
+	bls	.L1024
+	adrp	x1, .LANCHOR120
 	adrp	x0, .LC0
-	mov	w2, 1386
-	add	x1, x1, :lo12:.LANCHOR114
+	mov	w2, 1391
+	add	x1, x1, :lo12:.LANCHOR120
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L995:
-	ldr	x0, [x19, #:lo12:.LANCHOR110]
+.L1024:
+	ldr	x0, [x19, #:lo12:.LANCHOR69]
 	mov	w4, 65535
-.L998:
+.L1027:
 	ldrh	w1, [x0, 138]
-.L996:
+.L1025:
 	mov	w2, w1
 	cmp	w1, 63
-	ble	.L997
+	ble	.L1026
 	strh	wzr, [x0, 138]
-	b	.L998
-.L997:
+	b	.L1027
+.L1026:
 	add	x3, x1, 1
 	add	x5, x0, x3, lsl 1
 	ldrh	w5, [x5, 158]
 	cmp	w5, w4
-	bne	.L999
+	bne	.L1028
 	add	x2, x0, x2, sxtw 1
 	strh	w20, [x2, 160]
 	strh	w1, [x0, 138]
@@ -5988,9 +6169,9 @@ ftl_free_sys_blk:
 	strh	w1, [x0, 112]
 	ldp	x29, x30, [sp], 32
 	ret
-.L999:
+.L1028:
 	mov	x1, x3
-	b	.L996
+	b	.L1025
 	.size	ftl_free_sys_blk, .-ftl_free_sys_blk
 	.section	.text.ftl_info_data_recovery,"ax",@progbits
 	.align	2
@@ -6000,7 +6181,7 @@ ftl_info_data_recovery:
 	ldrh	w2, [x0]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L1012
+	beq	.L1041
 	stp	x29, x30, [sp, -48]!
 	adrp	x1, .LANCHOR9
 	add	x29, sp, 0
@@ -6011,25 +6192,25 @@ ftl_info_data_recovery:
 	add	x21, x20, x19
 	ldrb	w1, [x21, 2]
 	tst	w1, 224
-	bne	.L1002
+	bne	.L1031
 	ldrb	w0, [x0, 4]
 	bfi	w1, w0, 5, 3
 	strb	w1, [x21, 2]
 	mov	w0, w2
 	bl	zftl_remove_free_node
 	ldrb	w0, [x21, 2]
-	adrp	x1, .LANCHOR110
-	ldr	x3, [x1, #:lo12:.LANCHOR110]
-	tbz	x0, 3, .L1006
+	adrp	x1, .LANCHOR69
+	ldr	x3, [x1, #:lo12:.LANCHOR69]
+	tbz	x0, 3, .L1035
 	ldrh	w2, [x3, 116]
 	sub	w2, w2, #1
 	strh	w2, [x3, 116]
-.L1007:
+.L1036:
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L1009
+	bne	.L1038
 	ldr	w0, [x20, x19]
-	ldr	x1, [x1, #:lo12:.LANCHOR110]
+	ldr	x1, [x1, #:lo12:.LANCHOR69]
 	ubfx	x2, x0, 11, 8
 	add	w2, w2, 1
 	bfi	w0, w2, 11, 8
@@ -6037,44 +6218,44 @@ ftl_info_data_recovery:
 	ldrh	w0, [x1, 120]
 	sub	w0, w0, #1
 	strh	w0, [x1, 120]
-.L1002:
+.L1031:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1006:
+.L1035:
 	tst	w0, 24
-	bne	.L1008
+	bne	.L1037
 	ldrh	w2, [x3, 114]
 	sub	w2, w2, #1
 	strh	w2, [x3, 114]
-	b	.L1007
-.L1008:
+	b	.L1036
+.L1037:
 	ldrh	w2, [x3, 118]
 	sub	w2, w2, #1
 	strh	w2, [x3, 118]
-	b	.L1007
-.L1009:
+	b	.L1036
+.L1038:
 	ldrh	w2, [x20, x19]
 	cmp	w0, 64
 	add	w3, w2, 1
 	bfi	w2, w3, 0, 11
 	strh	w2, [x20, x19]
-	bne	.L1010
-	ldr	x1, [x1, #:lo12:.LANCHOR110]
+	bne	.L1039
+	ldr	x1, [x1, #:lo12:.LANCHOR69]
 	ldrh	w0, [x1, 122]
 	sub	w0, w0, #1
 	strh	w0, [x1, 122]
-	b	.L1002
-.L1010:
+	b	.L1031
+.L1039:
 	cmp	w0, 96
-	bne	.L1002
-	ldr	x1, [x1, #:lo12:.LANCHOR110]
+	bne	.L1031
+	ldr	x1, [x1, #:lo12:.LANCHOR69]
 	ldrh	w0, [x1, 124]
 	sub	w0, w0, #1
 	strh	w0, [x1, 124]
-	b	.L1002
-.L1012:
+	b	.L1031
+.L1041:
 	ret
 	.size	ftl_info_data_recovery, .-ftl_info_data_recovery
 	.section	.text.ftl_get_ppa_from_index,"ax",@progbits
@@ -6084,19 +6265,19 @@ ftl_info_data_recovery:
 ftl_get_ppa_from_index:
 	stp	x29, x30, [sp, -32]!
 	adrp	x1, .LANCHOR12
-	adrp	x3, .LANCHOR79
+	adrp	x3, .LANCHOR85
 	and	w0, w0, 65535
 	add	x29, sp, 0
 	ldr	x2, [x1, #:lo12:.LANCHOR12]
-	adrp	x1, .LANCHOR94
-	ldrb	w3, [x3, #:lo12:.LANCHOR79]
-	ldrh	w1, [x1, #:lo12:.LANCHOR94]
+	adrp	x1, .LANCHOR100
+	ldrb	w3, [x3, #:lo12:.LANCHOR85]
+	ldrh	w1, [x1, #:lo12:.LANCHOR100]
 	stp	x19, x20, [sp, 16]
 	mul	w1, w1, w3
 	cmp	w0, w1
-	bge	.L1016
+	bge	.L1045
 	add	x2, x2, 16
-.L1017:
+.L1046:
 	ldrb	w1, [x2, 9]
 	sdiv	w19, w0, w1
 	msub	w0, w19, w1, w0
@@ -6104,25 +6285,25 @@ ftl_get_ppa_from_index:
 	ldrh	w20, [x0, 16]
 	mov	w0, 65535
 	cmp	w20, w0
-	bne	.L1018
-	adrp	x1, .LANCHOR115
+	bne	.L1047
+	adrp	x1, .LANCHOR121
 	adrp	x0, .LC0
-	mov	w2, 1945
-	add	x1, x1, :lo12:.LANCHOR115
+	mov	w2, 1950
+	add	x1, x1, :lo12:.LANCHOR121
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1018:
-	adrp	x0, .LANCHOR111
-	ldrh	w0, [x0, #:lo12:.LANCHOR111]
+.L1047:
+	adrp	x0, .LANCHOR117
+	ldrh	w0, [x0, #:lo12:.LANCHOR117]
 	madd	w0, w0, w20, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1016:
+.L1045:
 	sub	w0, w0, w1
 	add	x2, x2, 48
 	and	w0, w0, 65535
-	b	.L1017
+	b	.L1046
 	.size	ftl_get_ppa_from_index, .-ftl_get_ppa_from_index
 	.section	.text.lpa_hash_get_ppa,"ax",@progbits
 	.align	2
@@ -6130,29 +6311,29 @@ ftl_get_ppa_from_index:
 	.type	lpa_hash_get_ppa, %function
 lpa_hash_get_ppa:
 	and	x2, x0, 255
-	adrp	x1, .LANCHOR116
-	add	x1, x1, :lo12:.LANCHOR116
+	adrp	x1, .LANCHOR122
+	add	x1, x1, :lo12:.LANCHOR122
 	mov	w3, 65535
 	ldrh	w1, [x1, x2, lsl 1]
-	adrp	x2, .LANCHOR117
-	ldr	x4, [x2, #:lo12:.LANCHOR117]
-	adrp	x2, .LANCHOR118
-	ldr	x5, [x2, #:lo12:.LANCHOR118]
-.L1021:
+	adrp	x2, .LANCHOR123
+	ldr	x4, [x2, #:lo12:.LANCHOR123]
+	adrp	x2, .LANCHOR124
+	ldr	x5, [x2, #:lo12:.LANCHOR124]
+.L1050:
 	cmp	w1, w3
-	bne	.L1023
+	bne	.L1052
 	mov	w0, -1
 	ret
-.L1023:
+.L1052:
 	uxtw	x2, w1
 	ldr	w6, [x4, x2, lsl 2]
 	cmp	w0, w6
-	bne	.L1022
+	bne	.L1051
 	mov	w0, w1
 	b	ftl_get_ppa_from_index
-.L1022:
+.L1051:
 	ldrh	w1, [x5, x2, lsl 1]
-	b	.L1021
+	b	.L1050
 	.size	lpa_hash_get_ppa, .-lpa_hash_get_ppa
 	.section	.text.ftl_get_new_free_page,"ax",@progbits
 	.align	2
@@ -6166,50 +6347,50 @@ ftl_get_new_free_page:
 	mov	x19, x0
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1025
-	adrp	x1, .LANCHOR119
+	bne	.L1054
+	adrp	x1, .LANCHOR125
 	adrp	x0, .LC0
-	mov	w2, 2088
-	add	x1, x1, :lo12:.LANCHOR119
+	mov	w2, 2093
+	add	x1, x1, :lo12:.LANCHOR125
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1025:
-	adrp	x0, .LANCHOR94
+.L1054:
+	adrp	x0, .LANCHOR100
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x0, #:lo12:.LANCHOR94]
+	ldrh	w0, [x0, #:lo12:.LANCHOR100]
 	cmp	w1, w0
-	bne	.L1026
-	adrp	x1, .LANCHOR119
+	bne	.L1055
+	adrp	x1, .LANCHOR125
 	adrp	x0, .LC0
-	mov	w2, 2089
-	add	x1, x1, :lo12:.LANCHOR119
+	mov	w2, 2094
+	add	x1, x1, :lo12:.LANCHOR125
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1026:
+.L1055:
 	ldrh	w0, [x19, 6]
-	cbnz	w0, .L1027
-	adrp	x1, .LANCHOR119
+	cbnz	w0, .L1056
+	adrp	x1, .LANCHOR125
 	adrp	x0, .LC0
-	mov	w2, 2090
-	add	x1, x1, :lo12:.LANCHOR119
+	mov	w2, 2095
+	add	x1, x1, :lo12:.LANCHOR125
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1027:
+.L1056:
 	ldrb	w0, [x19, 5]
 	mov	w2, 65535
 	add	x0, x0, 8
 	ldrh	w3, [x19, x0, lsl 1]
-	adrp	x0, .LANCHOR79
-	ldrb	w4, [x0, #:lo12:.LANCHOR79]
-.L1028:
+	adrp	x0, .LANCHOR85
+	ldrb	w4, [x0, #:lo12:.LANCHOR85]
+.L1057:
 	cmp	w3, w2
 	ldrb	w1, [x19, 5]
-	beq	.L1030
-	adrp	x0, .LANCHOR111
+	beq	.L1059
+	adrp	x0, .LANCHOR117
 	add	w1, w1, 1
 	and	w1, w1, 255
 	ldrh	w2, [x19, 2]
-	ldrh	w0, [x0, #:lo12:.LANCHOR111]
+	ldrh	w0, [x0, #:lo12:.LANCHOR117]
 	cmp	w4, w1
 	strb	w1, [x19, 5]
 	mul	w0, w0, w3
@@ -6220,29 +6401,29 @@ ftl_get_new_free_page:
 	orr	w0, w0, w2
 	add	w3, w3, 1
 	strh	w3, [x19, 10]
-	bne	.L1024
+	bne	.L1053
 	add	w2, w2, 1
 	strb	wzr, [x19, 5]
 	strh	w2, [x19, 2]
-.L1024:
+.L1053:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1030:
+.L1059:
 	add	w1, w1, 1
 	and	w1, w1, 255
 	strb	w1, [x19, 5]
 	cmp	w1, w4
-	bne	.L1029
+	bne	.L1058
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 5]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L1029:
+.L1058:
 	ldrb	w0, [x19, 5]
 	add	x0, x0, 8
 	ldrh	w3, [x19, x0, lsl 1]
-	b	.L1028
+	b	.L1057
 	.size	ftl_get_new_free_page, .-ftl_get_new_free_page
 	.section	.text.ftl_ext_alloc_new_blk,"ax",@progbits
 	.align	2
@@ -6258,22 +6439,22 @@ ftl_ext_alloc_new_blk:
 	mov	w19, w0
 	sub	w0, w0, #1
 	cmp	w1, w0, uxth
-	bcs	.L1034
-	adrp	x1, .LANCHOR120
+	bcs	.L1063
+	adrp	x1, .LANCHOR126
 	adrp	x0, .LC0
-	mov	w2, 2125
-	add	x1, x1, :lo12:.LANCHOR120
+	mov	w2, 2130
+	add	x1, x1, :lo12:.LANCHOR126
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1034:
-	adrp	x20, .LANCHOR110
+.L1063:
+	adrp	x20, .LANCHOR69
 	mov	w1, 0
 	mov	w0, w19
 	bl	ftl_erase_phy_blk
-	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	ldr	x0, [x20, #:lo12:.LANCHOR69]
 	ldrh	w0, [x0, 130]
 	bl	ftl_free_sys_blk
-	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	ldr	x0, [x20, #:lo12:.LANCHOR69]
 	strh	w19, [x0, 130]
 	strh	wzr, [x0, 140]
 	mov	w0, 0
@@ -6286,18 +6467,18 @@ ftl_ext_alloc_new_blk:
 	.global	ftl_total_vpn_update
 	.type	ftl_total_vpn_update, %function
 ftl_total_vpn_update:
-	adrp	x2, .LANCHOR121
+	adrp	x2, .LANCHOR127
 	mov	x3, x2
-	ldrh	w1, [x2, #:lo12:.LANCHOR121]
+	ldrh	w1, [x2, #:lo12:.LANCHOR127]
 	cmp	w1, 4
-	bhi	.L1037
-	cbnz	w0, .L1037
+	bhi	.L1066
+	cbnz	w0, .L1066
 	add	w1, w1, 1
-	strh	w1, [x2, #:lo12:.LANCHOR121]
+	strh	w1, [x2, #:lo12:.LANCHOR127]
 	ret
-.L1037:
+.L1066:
 	adrp	x0, .LANCHOR8
-	strh	wzr, [x3, #:lo12:.LANCHOR121]
+	strh	wzr, [x3, #:lo12:.LANCHOR127]
 	mov	x1, 0
 	mov	w2, 0
 	ldrh	w5, [x0, #:lo12:.LANCHOR8]
@@ -6307,37 +6488,37 @@ ftl_total_vpn_update:
 	adrp	x0, .LANCHOR9
 	ldr	x7, [x0, #:lo12:.LANCHOR9]
 	mov	w0, 0
-.L1039:
+.L1068:
 	cmp	w5, w1, uxth
-	bhi	.L1042
+	bhi	.L1071
 	adrp	x1, .LANCHOR12
 	ldr	x1, [x1, #:lo12:.LANCHOR12]
 	str	w2, [x1, 524]
-	adrp	x2, .LANCHOR110
+	adrp	x2, .LANCHOR69
 	str	w0, [x1, 528]
-	ldr	x2, [x2, #:lo12:.LANCHOR110]
+	ldr	x2, [x2, #:lo12:.LANCHOR69]
 	ldrh	w2, [x2, 120]
-	cbz	w2, .L1036
+	cbz	w2, .L1065
 	udiv	w0, w0, w2
 	str	w0, [x1, 532]
-.L1036:
+.L1065:
 	ret
-.L1042:
+.L1071:
 	ldrh	w3, [x6, x1, lsl 1]
 	cmp	w3, w8
-	beq	.L1040
+	beq	.L1069
 	add	x4, x7, x1, lsl 2
 	ldrb	w4, [x4, 2]
 	and	w4, w4, 224
 	cmp	w4, 160
-	bne	.L1041
+	bne	.L1070
 	add	w0, w0, w3
-.L1040:
+.L1069:
 	add	x1, x1, 1
-	b	.L1039
-.L1041:
+	b	.L1068
+.L1070:
 	add	w2, w2, w3
-	b	.L1040
+	b	.L1069
 	.size	ftl_total_vpn_update, .-ftl_total_vpn_update
 	.section	.text.ftl_vpn_update,"ax",@progbits
 	.align	2
@@ -6354,17 +6535,17 @@ ftl_vpn_update:
 	ubfiz	x19, x19, 1, 16
 	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrh	w0, [x0, x19]
-	cbnz	w0, .L1049
-	adrp	x1, .LANCHOR122
+	cbnz	w0, .L1078
+	adrp	x1, .LANCHOR128
 	mov	w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR122]
-.L1047:
+	str	w0, [x1, #:lo12:.LANCHOR128]
+.L1076:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1049:
+.L1078:
 	mov	w0, 0
-	b	.L1047
+	b	.L1076
 	.size	ftl_vpn_update, .-ftl_vpn_update
 	.section	.text.ftl_vpn_decrement,"ax",@progbits
 	.align	2
@@ -6377,13 +6558,13 @@ ftl_vpn_decrement:
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1052
+	beq	.L1081
 	adrp	x0, .LANCHOR11
 	uxtw	x1, w19
 	lsl	x2, x1, 1
 	ldr	x3, [x0, #:lo12:.LANCHOR11]
 	ldrh	w0, [x3, x2]
-	cbnz	w0, .L1053
+	cbnz	w0, .L1082
 	adrp	x0, .LANCHOR9
 	mov	w2, 0
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
@@ -6394,40 +6575,40 @@ ftl_vpn_decrement:
 	mov	w1, w19
 	ubfx	x3, x3, 5, 3
 	bl	printf
-.L1058:
+.L1087:
 	mov	w0, 0
-	b	.L1051
-.L1053:
+	b	.L1080
+.L1082:
 	sub	w0, w0, #1
 	strh	w0, [x3, x2]
-.L1052:
-	adrp	x20, .LANCHOR72
-	ldrh	w0, [x20, #:lo12:.LANCHOR72]
+.L1081:
+	adrp	x20, .LANCHOR78
+	ldrh	w0, [x20, #:lo12:.LANCHOR78]
 	cmp	w19, w0
-	beq	.L1058
+	beq	.L1087
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L1055
-	strh	w19, [x20, #:lo12:.LANCHOR72]
-	b	.L1058
-.L1055:
+	bne	.L1084
+	strh	w19, [x20, #:lo12:.LANCHOR78]
+	b	.L1087
+.L1084:
 	bl	ftl_vpn_update
 	cmp	w0, 0
-	adrp	x1, .LANCHOR123
+	adrp	x1, .LANCHOR129
 	cset	w0, ne
-	ldrh	w3, [x20, #:lo12:.LANCHOR72]
-	ldrh	w2, [x1, #:lo12:.LANCHOR123]
-	strh	w19, [x20, #:lo12:.LANCHOR72]
+	ldrh	w3, [x20, #:lo12:.LANCHOR78]
+	ldrh	w2, [x1, #:lo12:.LANCHOR129]
+	strh	w19, [x20, #:lo12:.LANCHOR78]
 	add	w2, w2, 1
 	and	w2, w2, 65535
 	cmp	w2, 7
 	csel	w2, w2, wzr, ls
-	strh	w2, [x1, #:lo12:.LANCHOR123]
+	strh	w2, [x1, #:lo12:.LANCHOR129]
 	and	x2, x2, 65535
-	adrp	x1, .LANCHOR73
-	add	x1, x1, :lo12:.LANCHOR73
+	adrp	x1, .LANCHOR79
+	add	x1, x1, :lo12:.LANCHOR79
 	strh	w3, [x1, x2, lsl 1]
-.L1051:
+.L1080:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -6437,50 +6618,50 @@ ftl_vpn_decrement:
 	.global	lpa_hash_update_ppa
 	.type	lpa_hash_update_ppa, %function
 lpa_hash_update_ppa:
-	adrp	x3, .LANCHOR116
+	adrp	x3, .LANCHOR122
 	and	x5, x0, 255
-	add	x4, x3, :lo12:.LANCHOR116
+	add	x4, x3, :lo12:.LANCHOR122
 	mov	w7, 65535
 	and	w2, w2, 65535
 	mov	w12, w7
 	ldrh	w6, [x4, x5, lsl 1]
-	adrp	x4, .LANCHOR117
-	ldr	x8, [x4, #:lo12:.LANCHOR117]
-	adrp	x4, .LANCHOR118
-	ldr	x4, [x4, #:lo12:.LANCHOR118]
-.L1061:
+	adrp	x4, .LANCHOR123
+	ldr	x8, [x4, #:lo12:.LANCHOR123]
+	adrp	x4, .LANCHOR124
+	ldr	x4, [x4, #:lo12:.LANCHOR124]
+.L1090:
 	cmp	w6, w12
-	beq	.L1065
+	beq	.L1094
 	uxtw	x11, w6
 	lsl	x10, x11, 2
 	add	x13, x8, x10
 	ldr	w10, [x8, x10]
 	cmp	w0, w10
 	lsl	x10, x11, 1
-	bne	.L1062
+	bne	.L1091
 	mov	w6, -1
 	str	w6, [x13]
 	cmp	w7, w12
-	bne	.L1063
-	add	x6, x3, :lo12:.LANCHOR116
+	bne	.L1092
+	add	x6, x3, :lo12:.LANCHOR122
 	ldrh	w7, [x4, x10]
 	strh	w7, [x6, x5, lsl 1]
-.L1064:
+.L1093:
 	mov	w6, -1
 	strh	w6, [x4, x11, lsl 1]
-.L1065:
+.L1094:
 	uxtw	x6, w2
-	add	x3, x3, :lo12:.LANCHOR116
+	add	x3, x3, :lo12:.LANCHOR122
 	cmn	w1, #1
 	str	w0, [x8, x6, lsl 2]
 	ldrh	w0, [x3, x5, lsl 1]
 	strh	w2, [x3, x5, lsl 1]
 	strh	w0, [x4, x6, lsl 1]
-	beq	.L1072
+	beq	.L1101
 	stp	x29, x30, [sp, -16]!
-	adrp	x0, .LANCHOR74
+	adrp	x0, .LANCHOR80
 	add	x29, sp, 0
-	ldrh	w3, [x0, #:lo12:.LANCHOR74]
+	ldrh	w3, [x0, #:lo12:.LANCHOR80]
 	adrp	x0, .LANCHOR31
 	ldrb	w2, [x0, #:lo12:.LANCHOR31]
 	mov	w0, 24
@@ -6491,88 +6672,217 @@ lpa_hash_update_ppa:
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
 	and	w1, w0, w1
-	adrp	x0, .LANCHOR75
-	ldrb	w0, [x0, #:lo12:.LANCHOR75]
+	adrp	x0, .LANCHOR81
+	ldrb	w0, [x0, #:lo12:.LANCHOR81]
 	udiv	w0, w1, w0
 	bl	ftl_vpn_decrement
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
-.L1063:
+.L1092:
 	ldrh	w6, [x4, x10]
 	strh	w6, [x4, w7, uxtw 1]
-	b	.L1064
-.L1062:
+	b	.L1093
+.L1091:
 	mov	w7, w6
 	ldrh	w6, [x4, x10]
-	b	.L1061
-.L1072:
+	b	.L1090
+.L1101:
 	mov	w0, -1
 	ret
 	.size	lpa_hash_update_ppa, .-lpa_hash_update_ppa
-	.section	.text.ftl_mask_bad_block,"ax",@progbits
+	.section	.text.ftl_write_completed,"ax",@progbits
 	.align	2
-	.global	ftl_mask_bad_block
-	.type	ftl_mask_bad_block, %function
-ftl_mask_bad_block:
-	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LANCHOR31
-	mov	w6, 24
-	mov	w4, 1
+	.global	ftl_write_completed
+	.type	ftl_write_completed, %function
+ftl_write_completed:
+	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
-	ldrb	w1, [x1, #:lo12:.LANCHOR31]
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR55
 	stp	x19, x20, [sp, 16]
-	sub	w6, w6, w1
-	lsl	w1, w4, w1
-	sub	w1, w1, #1
-	lsr	w2, w0, w6
-	and	w1, w1, w2
-	adrp	x2, .LANCHOR75
-	and	w1, w1, 255
-	ldrb	w5, [x2, #:lo12:.LANCHOR75]
-	cmp	w5, 1
-	mul	w2, w1, w5
-	and	w19, w2, 255
-	adrp	x2, .LANCHOR74
-	ldrh	w3, [x2, #:lo12:.LANCHOR74]
-	lsr	w0, w0, w3
-	sub	w3, w6, w3
-	lsl	w3, w4, w3
-	sub	w3, w3, #1
-	and	w3, w3, w0
-	and	w4, w3, 65535
-	udiv	w3, w3, w5
-	and	w20, w3, 65535
-	bls	.L1076
-	sub	w2, w5, #1
-	and	w2, w2, w4
-	add	w2, w19, w2
-	and	w19, w2, 255
-.L1076:
-	adrp	x0, .LANCHOR19
-	ldr	w0, [x0, #:lo12:.LANCHOR19]
-	tbz	x0, 14, .L1077
-	adrp	x0, .LC66
-	and	w3, w3, 65535
-	mov	w2, w19
-	add	x0, x0, :lo12:.LC66
-	bl	printf
-.L1077:
-	adrp	x0, .LANCHOR8
-	ldrh	w0, [x0, #:lo12:.LANCHOR8]
-	cmp	w0, w20
-	bls	.L1075
-	adrp	x0, .LANCHOR9
-	mov	w2, 1
-	lsl	w2, w2, w19
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
-	add	x20, x0, x20, uxth 2
-	ldrb	w19, [x20, 3]
-	orr	w2, w2, w19
-	strb	w2, [x20, 3]
-.L1075:
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 32
+	add	x22, x21, :lo12:.LANCHOR55
+	stp	x23, x24, [sp, 48]
+	adrp	x20, .LANCHOR64
+	mov	w23, 20041
+	add	x20, x20, :lo12:.LANCHOR64
+	str	x25, [sp, 64]
+	movk	w23, 0x444b, lsl 16
+	mov	w25, 0
+.L1105:
+	ldrb	w0, [x20]
+	cmp	w0, 255
+	bne	.L1116
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L1116:
+	add	x1, x21, :lo12:.LANCHOR55
+	lsl	x2, x0, 6
+	add	x24, x1, x2
+	ubfiz	x19, x0, 6, 8
+	add	x19, x1, x19
+	ldrb	w1, [x1, x2]
+	strb	w1, [x20]
+	ldr	w1, [x24, 52]
+	cmn	w1, #1
+	bne	.L1106
+	adrp	x1, .LANCHOR130
+	ldrb	w1, [x1, #:lo12:.LANCHOR130]
+	cbnz	w1, .L1107
+	adrp	x1, .LANCHOR86
+	ldrb	w1, [x1, #:lo12:.LANCHOR86]
+	cbz	w1, .L1108
+.L1107:
+	adrp	x1, .LANCHOR69
+	ldr	x1, [x1, #:lo12:.LANCHOR69]
+	ldr	w1, [x1, 156]
+	cmp	w1, w23
+	beq	.L1109
+.L1108:
+	add	x1, x22, x0, lsl 6
+	mov	w2, 24
+	mov	w5, 65535
+	ldr	w3, [x1, 40]
+	adrp	x1, .LANCHOR80
+	ldrh	w4, [x1, #:lo12:.LANCHOR80]
+	adrp	x1, .LANCHOR31
+	ldrb	w1, [x1, #:lo12:.LANCHOR31]
+	sub	w1, w2, w1
+	sub	w2, w1, w4
+	mov	w1, 1
+	lsr	w4, w3, w4
+	lsl	w1, w1, w2
+	adrp	x2, .LANCHOR81
+	sub	w1, w1, #1
+	ldrb	w2, [x2, #:lo12:.LANCHOR81]
+	and	w1, w1, w4
+	udiv	w1, w1, w2
+	adrp	x2, .LANCHOR12
+	mov	x24, x2
+	ldr	x4, [x2, #:lo12:.LANCHOR12]
+	and	w25, w1, 65535
+	and	w1, w1, w5
+	ldr	w6, [x4, 560]
+	cmp	w6, w5
+	bne	.L1110
+	str	w1, [x4, 560]
+	str	w3, [x4, 564]
+.L1110:
+	add	x0, x22, x0, lsl 6
+	ldr	w2, [x0, 36]
+	adrp	x0, .LC66
+	add	x0, x0, :lo12:.LC66
+	bl	printf
+	ldr	x0, [x24, #:lo12:.LANCHOR12]
+	ldr	w1, [x0, 556]
+	add	w1, w1, 1
+	str	w1, [x0, 556]
+	ldrh	w1, [x0, 16]
+	cmp	w1, w25
+	bne	.L1111
+	strh	wzr, [x0, 22]
+.L1109:
+	mov	x0, x19
+	mov	w25, 1
+	bl	ftl_write_buf
+	b	.L1105
+.L1111:
+	ldrh	w1, [x0, 48]
+	cmp	w1, w25
+	bne	.L1109
+	strh	wzr, [x0, 54]
+	b	.L1109
+.L1106:
+	cbz	w25, .L1114
+	ldp	w1, w2, [x24, 36]
+	adrp	x0, .LC67
+	add	x0, x0, :lo12:.LC67
+	bl	printf
+	mov	x0, x19
+	bl	ftl_write_buf
+	b	.L1105
+.L1114:
+	ldrh	w2, [x24, 48]
+	ldr	w0, [x24, 36]
+	ldr	w1, [x24, 44]
+	bl	lpa_hash_update_ppa
+	ldrb	w0, [x24, 2]
+	tbz	x0, 2, .L1115
+	and	w0, w0, -3
+	strb	w0, [x24, 2]
+	b	.L1105
+.L1115:
+	mov	x0, x19
+	bl	zbuf_free
+	b	.L1105
+	.size	ftl_write_completed, .-ftl_write_completed
+	.section	.text.ftl_mask_bad_block,"ax",@progbits
+	.align	2
+	.global	ftl_mask_bad_block
+	.type	ftl_mask_bad_block, %function
+ftl_mask_bad_block:
+	stp	x29, x30, [sp, -32]!
+	adrp	x1, .LANCHOR31
+	mov	w6, 24
+	mov	w4, 1
+	add	x29, sp, 0
+	ldrb	w1, [x1, #:lo12:.LANCHOR31]
+	stp	x19, x20, [sp, 16]
+	sub	w6, w6, w1
+	lsl	w1, w4, w1
+	sub	w1, w1, #1
+	lsr	w2, w0, w6
+	and	w1, w1, w2
+	adrp	x2, .LANCHOR81
+	and	w1, w1, 255
+	ldrb	w5, [x2, #:lo12:.LANCHOR81]
+	cmp	w5, 1
+	mul	w2, w1, w5
+	and	w19, w2, 255
+	adrp	x2, .LANCHOR80
+	ldrh	w3, [x2, #:lo12:.LANCHOR80]
+	lsr	w0, w0, w3
+	sub	w3, w6, w3
+	lsl	w3, w4, w3
+	sub	w3, w3, #1
+	and	w3, w3, w0
+	and	w4, w3, 65535
+	udiv	w3, w3, w5
+	and	w20, w3, 65535
+	bls	.L1122
+	sub	w2, w5, #1
+	and	w2, w2, w4
+	add	w2, w19, w2
+	and	w19, w2, 255
+.L1122:
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 14, .L1123
+	adrp	x0, .LC68
+	and	w3, w3, 65535
+	mov	w2, w19
+	add	x0, x0, :lo12:.LC68
+	bl	printf
+.L1123:
+	adrp	x0, .LANCHOR8
+	ldrh	w0, [x0, #:lo12:.LANCHOR8]
+	cmp	w0, w20
+	bls	.L1121
+	adrp	x0, .LANCHOR9
+	mov	w2, 1
+	lsl	w2, w2, w19
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	add	x20, x0, x20, uxth 2
+	ldrb	w19, [x20, 3]
+	orr	w2, w2, w19
+	strb	w2, [x20, 3]
+.L1121:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
 	ret
 	.size	ftl_mask_bad_block, .-ftl_mask_bad_block
 	.section	.text.gc_free_bad_sblk,"ax",@progbits
@@ -6585,24 +6895,24 @@ gc_free_bad_sblk:
 	stp	x23, x24, [sp, 48]
 	and	w23, w0, 65535
 	str	x27, [sp, 80]
-	adrp	x27, .LANCHOR70
-	add	x0, x27, :lo12:.LANCHOR70
+	adrp	x27, .LANCHOR76
+	add	x0, x27, :lo12:.LANCHOR76
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	ldr	w0, [x0, 2200]
-	cbz	w0, .L1098
-	adrp	x22, .LC67
+	cbz	w0, .L1144
+	adrp	x22, .LC69
 	mov	w24, 20041
-	add	x22, x22, :lo12:.LC67
+	add	x22, x22, :lo12:.LC69
 	mov	w26, 0
 	movk	w24, 0x444b, lsl 16
-.L1085:
-	adrp	x0, .LANCHOR79
-	ldrb	w0, [x0, #:lo12:.LANCHOR79]
+.L1131:
+	adrp	x0, .LANCHOR85
+	ldrb	w0, [x0, #:lo12:.LANCHOR85]
 	cmp	w0, w26
-	bhi	.L1095
-.L1098:
+	bhi	.L1141
+.L1144:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -6611,84 +6921,84 @@ gc_free_bad_sblk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1095:
-	adrp	x0, .LANCHOR75
+.L1141:
+	adrp	x0, .LANCHOR81
 	adrp	x1, .LANCHOR31
-	adrp	x21, .LANCHOR74
-	ldrb	w2, [x0, #:lo12:.LANCHOR75]
+	adrp	x21, .LANCHOR80
+	ldrb	w2, [x0, #:lo12:.LANCHOR81]
 	ldrb	w3, [x1, #:lo12:.LANCHOR31]
 	mov	w1, 24
 	and	w0, w2, 65535
 	cmp	w2, 1
 	sub	w1, w1, w3
-	ldrh	w3, [x21, #:lo12:.LANCHOR74]
+	ldrh	w3, [x21, #:lo12:.LANCHOR80]
 	sdiv	w19, w26, w2
 	sub	w1, w1, w3
 	lsl	w19, w19, w1
 	madd	w19, w23, w0, w19
 	and	w19, w19, 65535
-	bls	.L1086
+	bls	.L1132
 	sub	w0, w0, #1
 	and	w0, w0, w26
 	add	w19, w19, w0
 	and	w19, w19, 65535
-.L1086:
-	adrp	x25, .LANCHOR124
-	add	x25, x25, :lo12:.LANCHOR124
+.L1132:
+	adrp	x25, .LANCHOR130
+	add	x25, x25, :lo12:.LANCHOR130
 	mov	w20, 0
-.L1087:
-	add	x0, x27, :lo12:.LANCHOR70
+.L1133:
+	add	x0, x27, :lo12:.LANCHOR76
 	ldr	w1, [x0, 2200]
 	cmp	w20, w1
-	bcc	.L1094
+	bcc	.L1140
 	add	w26, w26, 1
 	and	w26, w26, 65535
-	b	.L1085
-.L1094:
+	b	.L1131
+.L1140:
 	add	x0, x0, x20, sxtw 1
 	ldrh	w0, [x0, 2204]
 	cmp	w0, w19
-	bne	.L1088
+	bne	.L1134
 	mov	w1, w19
 	mov	x0, x22
 	bl	printf
 	ldrb	w0, [x25]
-	cbnz	w0, .L1089
-	adrp	x0, .LANCHOR80
-	ldrb	w0, [x0, #:lo12:.LANCHOR80]
-	cbz	w0, .L1090
-.L1089:
-	adrp	x0, .LANCHOR110
-	ldr	x0, [x0, #:lo12:.LANCHOR110]
+	cbnz	w0, .L1135
+	adrp	x0, .LANCHOR86
+	ldrb	w0, [x0, #:lo12:.LANCHOR86]
+	cbz	w0, .L1136
+.L1135:
+	adrp	x0, .LANCHOR69
+	ldr	x0, [x0, #:lo12:.LANCHOR69]
 	ldr	w0, [x0, 156]
 	cmp	w0, w24
-	beq	.L1091
-.L1090:
-	ldrh	w0, [x21, #:lo12:.LANCHOR74]
+	beq	.L1137
+.L1136:
+	ldrh	w0, [x21, #:lo12:.LANCHOR80]
 	lsl	w0, w19, w0
 	bl	ftl_mask_bad_block
-.L1091:
-	add	x1, x27, :lo12:.LANCHOR70
+.L1137:
+	add	x1, x27, :lo12:.LANCHOR76
 	mov	w0, w20
 	ldr	w2, [x1, 2200]
-.L1092:
+.L1138:
 	cmp	w0, w2
-	bcc	.L1093
-	add	x0, x27, :lo12:.LANCHOR70
+	bcc	.L1139
+	add	x0, x27, :lo12:.LANCHOR76
 	sub	w2, w2, #1
 	str	w2, [x0, 2200]
-.L1088:
+.L1134:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L1087
-.L1093:
+	b	.L1133
+.L1139:
 	add	w3, w0, 1
 	add	x0, x1, x0, sxtw 1
 	add	x4, x1, x3, sxtw 1
 	ldrh	w4, [x4, 2204]
 	strh	w4, [x0, 2204]
 	and	w0, w3, 65535
-	b	.L1092
+	b	.L1138
 	.size	gc_free_bad_sblk, .-gc_free_bad_sblk
 	.section	.text.ftl_free_sblk,"ax",@progbits
 	.align	2
@@ -6708,14 +7018,14 @@ ftl_free_sblk:
 	add	x20, x3, x19
 	ldrb	w0, [x20, 2]
 	ubfx	x22, x0, 5, 3
-	tbz	x0, 3, .L1105
-	adrp	x2, .LANCHOR110
+	tbz	x0, 3, .L1151
+	adrp	x2, .LANCHOR69
 	ldrh	w1, [x3, x19]
-	adrp	x8, .LANCHOR125
-	ldr	x7, [x2, #:lo12:.LANCHOR110]
+	adrp	x8, .LANCHOR131
+	ldr	x7, [x2, #:lo12:.LANCHOR69]
 	and	w1, w1, 2047
 	ldr	w2, [x3, x19]
-	ldrh	w8, [x8, #:lo12:.LANCHOR125]
+	ldrh	w8, [x8, #:lo12:.LANCHOR131]
 	ldrh	w4, [x7, 74]
 	ubfx	x5, x2, 11, 8
 	adrp	x2, .LANCHOR10
@@ -6728,43 +7038,43 @@ ftl_free_sblk:
 	and	w4, w4, 65535
 	add	w7, w7, w4
 	cmp	w7, w8
-	ble	.L1106
-	adrp	x4, .LANCHOR101
-	adrp	x7, .LANCHOR105
-	ldrh	w6, [x4, #:lo12:.LANCHOR101]
-	adrp	x4, .LANCHOR91
-	ldrh	w7, [x7, #:lo12:.LANCHOR105]
-	ldrh	w4, [x4, #:lo12:.LANCHOR91]
+	ble	.L1152
+	adrp	x4, .LANCHOR107
+	adrp	x7, .LANCHOR111
+	ldrh	w6, [x4, #:lo12:.LANCHOR107]
+	adrp	x4, .LANCHOR97
+	ldrh	w7, [x7, #:lo12:.LANCHOR111]
+	ldrh	w4, [x4, #:lo12:.LANCHOR97]
 	add	w6, w6, 7
 	add	w4, w4, w7
 	cmp	w6, w4
-	blt	.L1107
-.L1112:
+	blt	.L1153
+.L1158:
 	mov	w4, 2
 	bfi	w0, w4, 3, 2
-	b	.L1123
-.L1107:
-	adrp	x4, .LANCHOR98
-	adrp	x7, .LANCHOR103
-	ldrh	w6, [x4, #:lo12:.LANCHOR98]
-	adrp	x4, .LANCHOR97
-	ldrh	w7, [x7, #:lo12:.LANCHOR103]
-	ldrh	w4, [x4, #:lo12:.LANCHOR97]
+	b	.L1169
+.L1153:
+	adrp	x4, .LANCHOR104
+	adrp	x7, .LANCHOR109
+	ldrh	w6, [x4, #:lo12:.LANCHOR104]
+	adrp	x4, .LANCHOR103
+	ldrh	w7, [x7, #:lo12:.LANCHOR109]
+	ldrh	w4, [x4, #:lo12:.LANCHOR103]
 	add	w6, w6, 7
 	add	w4, w4, w7
-	adrp	x7, .LANCHOR99
-	ldrh	w7, [x7, #:lo12:.LANCHOR99]
+	adrp	x7, .LANCHOR105
+	ldrh	w7, [x7, #:lo12:.LANCHOR105]
 	add	w4, w4, w7
 	cmp	w6, w4
-	blt	.L1112
-.L1125:
+	blt	.L1158
+.L1171:
 	and	w0, w0, -25
-.L1123:
+.L1169:
 	strb	w0, [x20, 2]
-.L1108:
+.L1154:
 	ldrb	w0, [x20, 2]
 	ands	w0, w0, 24
-	bne	.L1113
+	bne	.L1159
 	mul	w2, w5, w2
 	ldrh	w0, [x3, x19]
 	add	w2, w2, w2, lsl 1
@@ -6775,7 +7085,7 @@ ftl_free_sblk:
 	ldr	w0, [x3, x19]
 	bfi	w0, w2, 11, 8
 	str	w0, [x3, x19]
-.L1114:
+.L1160:
 	mov	w0, w21
 	bl	zftl_remove_data_node
 	ldr	x0, [x23, #:lo12:.LANCHOR9]
@@ -6789,110 +7099,110 @@ ftl_free_sblk:
 	adrp	x0, .LANCHOR11
 	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	strh	wzr, [x0, x24, lsl 1]
-	bhi	.L1117
+	bhi	.L1163
 	mov	w0, w21
 	bl	gc_free_bad_sblk
-.L1117:
+.L1163:
 	ldrb	w0, [x20, 2]
-	tbz	x0, 3, .L1118
+	tbz	x0, 3, .L1164
 	adrp	x0, .LANCHOR12
 	ldr	x0, [x0, #:lo12:.LANCHOR12]
 	ldrh	w1, [x0, 586]
 	cmp	w1, w21
-	bne	.L1118
+	bne	.L1164
 	mov	w1, -1
 	ldrh	w2, [x0, 590]
 	strh	w1, [x0, 586]
 	mov	w1, 65535
 	cmp	w2, w1
-	bne	.L1118
+	bne	.L1164
 	strh	w21, [x0, 590]
 	mov	w1, w21
 	ldp	x19, x20, [sp, 16]
-	adrp	x0, .LC68
+	adrp	x0, .LC70
 	ldp	x21, x22, [sp, 32]
-	add	x0, x0, :lo12:.LC68
+	add	x0, x0, :lo12:.LC70
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	b	printf
-.L1106:
+.L1152:
 	madd	w4, w2, w4, w6
-	adrp	x6, .LANCHOR126
-	ldrh	w6, [x6, #:lo12:.LANCHOR126]
+	adrp	x6, .LANCHOR132
+	ldrh	w6, [x6, #:lo12:.LANCHOR132]
 	cmp	w4, w6
-	ble	.L1108
-	adrp	x4, .LANCHOR98
-	adrp	x7, .LANCHOR103
-	ldrh	w6, [x4, #:lo12:.LANCHOR98]
-	adrp	x4, .LANCHOR97
-	ldrh	w7, [x7, #:lo12:.LANCHOR103]
-	ldrh	w4, [x4, #:lo12:.LANCHOR97]
+	ble	.L1154
+	adrp	x4, .LANCHOR104
+	adrp	x7, .LANCHOR109
+	ldrh	w6, [x4, #:lo12:.LANCHOR104]
+	adrp	x4, .LANCHOR103
+	ldrh	w7, [x7, #:lo12:.LANCHOR109]
+	ldrh	w4, [x4, #:lo12:.LANCHOR103]
 	add	w4, w4, w7
-	adrp	x7, .LANCHOR99
-	ldrh	w7, [x7, #:lo12:.LANCHOR99]
+	adrp	x7, .LANCHOR105
+	ldrh	w7, [x7, #:lo12:.LANCHOR105]
 	add	w4, w4, w7
 	add	w7, w6, 7
 	cmp	w7, w4
-	bge	.L1125
-	adrp	x7, .LANCHOR101
-	adrp	x10, .LANCHOR105
-	ldrh	w8, [x7, #:lo12:.LANCHOR101]
-	adrp	x7, .LANCHOR91
-	ldrh	w10, [x10, #:lo12:.LANCHOR105]
-	ldrh	w7, [x7, #:lo12:.LANCHOR91]
+	bge	.L1171
+	adrp	x7, .LANCHOR107
+	adrp	x10, .LANCHOR111
+	ldrh	w8, [x7, #:lo12:.LANCHOR107]
+	adrp	x7, .LANCHOR97
+	ldrh	w10, [x10, #:lo12:.LANCHOR111]
+	ldrh	w7, [x7, #:lo12:.LANCHOR97]
 	add	w8, w8, 7
 	add	w7, w7, w10
 	cmp	w8, w7
-	bge	.L1112
+	bge	.L1158
 	add	w6, w6, 23
 	cmp	w4, w6
-	bgt	.L1112
-	b	.L1125
-.L1113:
+	bgt	.L1158
+	b	.L1171
+.L1159:
 	cmp	w0, 16
-	bne	.L1114
+	bne	.L1160
 	sdiv	w2, w1, w2
 	ldr	w0, [x3, x19]
 	add	w2, w2, w2, lsl 1
 	add	w2, w5, w2, lsr 2
-.L1124:
+.L1170:
 	bfi	w0, w2, 11, 8
 	asr	w1, w1, 5
 	str	w0, [x3, x19]
 	bfi	w0, w1, 0, 11
 	strh	w0, [x3, x19]
-	b	.L1114
-.L1105:
+	b	.L1160
+.L1151:
 	tst	w0, 24
-	bne	.L1114
-	adrp	x1, .LANCHOR107
-	ldrh	w1, [x1, #:lo12:.LANCHOR107]
-	cbnz	w1, .L1114
-	adrp	x1, .LANCHOR105
-	ldrh	w4, [x1, #:lo12:.LANCHOR105]
+	bne	.L1160
+	adrp	x1, .LANCHOR113
+	ldrh	w1, [x1, #:lo12:.LANCHOR113]
+	cbnz	w1, .L1160
+	adrp	x1, .LANCHOR111
+	ldrh	w4, [x1, #:lo12:.LANCHOR111]
 	cmp	w4, 15
-	bhi	.L1114
-	adrp	x1, .LANCHOR97
-	adrp	x2, .LANCHOR103
-	ldrh	w1, [x1, #:lo12:.LANCHOR97]
-	ldrh	w2, [x2, #:lo12:.LANCHOR103]
+	bhi	.L1160
+	adrp	x1, .LANCHOR103
+	adrp	x2, .LANCHOR109
+	ldrh	w1, [x1, #:lo12:.LANCHOR103]
+	ldrh	w2, [x2, #:lo12:.LANCHOR109]
 	add	w1, w1, w2
-	adrp	x2, .LANCHOR99
-	ldrh	w2, [x2, #:lo12:.LANCHOR99]
+	adrp	x2, .LANCHOR105
+	ldrh	w2, [x2, #:lo12:.LANCHOR105]
 	add	w1, w1, w2
-	adrp	x2, .LANCHOR98
-	ldrh	w2, [x2, #:lo12:.LANCHOR98]
+	adrp	x2, .LANCHOR104
+	ldrh	w2, [x2, #:lo12:.LANCHOR104]
 	add	w2, w2, 16
 	cmp	w1, w2
-	ble	.L1114
-	adrp	x1, .LANCHOR101
-	ldrh	w2, [x1, #:lo12:.LANCHOR101]
-	adrp	x1, .LANCHOR91
-	ldrh	w1, [x1, #:lo12:.LANCHOR91]
+	ble	.L1160
+	adrp	x1, .LANCHOR107
+	ldrh	w2, [x1, #:lo12:.LANCHOR107]
+	adrp	x1, .LANCHOR97
+	ldrh	w1, [x1, #:lo12:.LANCHOR97]
 	add	w2, w2, 7
 	add	w1, w1, w4
 	cmp	w2, w1
-	blt	.L1114
+	blt	.L1160
 	mov	w1, 2
 	bfi	w0, w1, 3, 2
 	strb	w0, [x20, 2]
@@ -6905,8 +7215,8 @@ ftl_free_sblk:
 	ldr	w0, [x3, x19]
 	ubfx	x4, x0, 11, 8
 	add	w2, w4, w2, lsr 2
-	b	.L1124
-.L1118:
+	b	.L1170
+.L1164:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6922,20 +7232,20 @@ gc_free_src_blk:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR70
+	adrp	x21, .LANCHOR76
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LC69
+	adrp	x22, .LC71
 	adrp	x23, .LANCHOR11
-	add	x21, x21, :lo12:.LANCHOR70
+	add	x21, x21, :lo12:.LANCHOR76
 	mov	x24, x23
-	add	x22, x22, :lo12:.LC69
+	add	x22, x22, :lo12:.LC71
 	stp	x19, x20, [sp, 16]
 	mov	w20, 0
 	stp	x25, x26, [sp, 64]
-.L1127:
+.L1173:
 	ldrh	w0, [x21, 56]
 	cmp	w0, w20
-	bhi	.L1141
+	bhi	.L1187
 	strh	wzr, [x21, 56]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6943,18 +7253,18 @@ gc_free_src_blk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1141:
+.L1187:
 	add	x0, x21, x20, sxtw 1
 	ldrh	w25, [x0, 58]
 	ldr	x0, [x23, #:lo12:.LANCHOR11]
 	mov	x19, x25
 	lsl	x26, x25, 1
 	ldrh	w2, [x0, x26]
-	cbz	w2, .L1128
+	cbz	w2, .L1174
 	mov	w1, w25
 	mov	x0, x22
 	bl	printf
-.L1128:
+.L1174:
 	ldr	x0, [x24, #:lo12:.LANCHOR11]
 	strh	wzr, [x0, x26]
 	adrp	x0, .LANCHOR9
@@ -6962,438 +7272,103 @@ gc_free_src_blk:
 	add	x25, x0, x25, lsl 2
 	adrp	x0, .LANCHOR19
 	ldr	w0, [x0, #:lo12:.LANCHOR19]
-	tbz	x0, 8, .L1129
+	tbz	x0, 8, .L1175
 	ldrb	w2, [x25, 2]
-	adrp	x0, .LC70
+	adrp	x0, .LC72
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC70
+	add	x0, x0, :lo12:.LC72
 	ubfx	x2, x2, 5, 3
 	bl	printf
-.L1129:
+.L1175:
 	ldrb	w0, [x25, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L1130
+	beq	.L1176
 	tst	w0, 192
-	bne	.L1131
-.L1130:
-	adrp	x1, .LANCHOR127
+	bne	.L1177
+.L1176:
+	adrp	x1, .LANCHOR133
 	adrp	x0, .LC0
 	mov	w2, 1363
-	add	x1, x1, :lo12:.LANCHOR127
+	add	x1, x1, :lo12:.LANCHOR133
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1131:
+.L1177:
 	mov	w0, w19
 	bl	ftl_free_sblk
 	adrp	x0, .LANCHOR12
 	ldr	x0, [x0, #:lo12:.LANCHOR12]
 	ldrh	w2, [x0, 124]
-	cbz	w2, .L1132
+	cbz	w2, .L1178
 	add	x3, x0, 392
 	mov	w1, 0
-.L1134:
+.L1180:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L1133
+	bne	.L1179
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 392]
 	strh	w2, [x0, 124]
-.L1132:
+.L1178:
 	ldrh	w2, [x0, 120]
-	cbz	w2, .L1135
+	cbz	w2, .L1181
 	add	x3, x0, 136
 	mov	w1, 0
-.L1137:
+.L1183:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L1136
+	bne	.L1182
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 136]
 	strh	w2, [x0, 120]
-.L1135:
+.L1181:
 	ldrh	w2, [x0, 122]
-	cbz	w2, .L1138
+	cbz	w2, .L1184
 	add	x3, x0, 264
 	mov	w1, 0
-.L1140:
+.L1186:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L1139
+	bne	.L1185
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 264]
 	strh	w2, [x0, 122]
-.L1138:
+.L1184:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L1127
-.L1133:
+	b	.L1173
+.L1179:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L1134
-	b	.L1132
-.L1136:
+	bne	.L1180
+	b	.L1178
+.L1182:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L1137
-	b	.L1135
-.L1139:
+	bne	.L1183
+	b	.L1181
+.L1185:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L1140
-	b	.L1138
+	bne	.L1186
+	b	.L1184
 	.size	gc_free_src_blk, .-gc_free_src_blk
 	.section	.text.print_ftl_debug_info,"ax",@progbits
 	.align	2
 	.global	print_ftl_debug_info
 	.type	print_ftl_debug_info, %function
 print_ftl_debug_info:
-	sub	sp, sp, #64
-	adrp	x2, .LANCHOR99
-	adrp	x8, .LANCHOR128
-	stp	x29, x30, [sp, 32]
-	add	x29, sp, 32
-	ldrh	w7, [x2, #:lo12:.LANCHOR99]
-	adrp	x2, .LANCHOR97
-	stp	x19, x20, [sp, 48]
-	adrp	x19, .LANCHOR110
-	adrp	x20, .LANCHOR12
-	ldrh	w6, [x2, #:lo12:.LANCHOR97]
-	adrp	x2, .LANCHOR107
-	ldr	x1, [x19, #:lo12:.LANCHOR110]
-	ldrh	w5, [x2, #:lo12:.LANCHOR107]
-	adrp	x2, .LANCHOR105
-	ldr	x0, [x20, #:lo12:.LANCHOR12]
-	ldrh	w4, [x2, #:lo12:.LANCHOR105]
-	adrp	x2, .LANCHOR103
-	ldr	w8, [x8, #:lo12:.LANCHOR128]
-	ldrh	w3, [x2, #:lo12:.LANCHOR103]
-	ldrh	w2, [x1, 146]
-	ldrh	w1, [x1, 148]
-	str	w8, [sp, 24]
-	ldr	w8, [x0, 528]
-	str	w8, [sp, 16]
-	ldr	w0, [x0, 524]
-	str	w0, [sp, 8]
-	adrp	x0, .LANCHOR91
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
-	str	w0, [sp]
-	adrp	x0, .LC71
-	add	x0, x0, :lo12:.LC71
-	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR110]
-	adrp	x1, .LANCHOR129
-	ldrb	w3, [x1, #:lo12:.LANCHOR129]
-	ldr	w4, [x0, 8]
-	ldr	w5, [x0, 64]
-	ldr	w1, [x0, 20]
-	ldr	w2, [x0, 28]
-	adrp	x0, .LC72
-	add	x0, x0, :lo12:.LC72
-	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR110]
-	ldr	w1, [x0, 52]
-	ldr	w2, [x0, 60]
-	ldr	w3, [x0, 16]
-	adrp	x0, .LC73
-	add	x0, x0, :lo12:.LC73
-	lsr	w3, w3, 11
-	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR110]
-	ldrh	w2, [x0, 98]
-	ldrh	w6, [x0, 72]
-	ldrh	w5, [x0, 96]
-	ldrh	w4, [x0, 92]
-	ldrh	w3, [x0, 88]
-	ldrh	w1, [x0, 74]
-	str	w2, [sp, 16]
-	ldrh	w2, [x0, 94]
-	str	w2, [sp, 8]
-	ldrh	w2, [x0, 90]
-	str	w2, [sp]
-	ldp	w7, w2, [x0, 80]
-	adrp	x0, .LC74
-	add	x0, x0, :lo12:.LC74
-	bl	printf
-	adrp	x0, .LANCHOR86
-	ldrh	w5, [x0, #:lo12:.LANCHOR86]
-	adrp	x0, .LANCHOR93
-	ldrh	w4, [x0, #:lo12:.LANCHOR93]
-	adrp	x0, .LANCHOR69
-	ldrh	w3, [x0, #:lo12:.LANCHOR69]
-	adrp	x0, .LANCHOR102
-	ldrh	w2, [x0, #:lo12:.LANCHOR102]
-	adrp	x0, .LANCHOR100
-	ldrh	w1, [x0, #:lo12:.LANCHOR100]
-	adrp	x0, .LC75
-	add	x0, x0, :lo12:.LC75
-	bl	printf
-	ldr	x0, [x20, #:lo12:.LANCHOR12]
-	ldr	x1, [x19, #:lo12:.LANCHOR110]
-	ldp	x29, x30, [sp, 32]
-	ldrh	w4, [x0, 590]
-	ldrh	w6, [x1, 150]
-	ldrh	w3, [x0, 588]
-	ldrh	w2, [x0, 586]
-	ldp	x19, x20, [sp, 48]
-	add	sp, sp, 64
-	ldr	w5, [x1, 156]
-	ldrh	w1, [x0, 584]
-	adrp	x0, .LC76
-	add	x0, x0, :lo12:.LC76
-	b	printf
-	.size	print_ftl_debug_info, .-print_ftl_debug_info
-	.section	.text.ftl_write_buf,"ax",@progbits
-	.align	2
-	.global	ftl_write_buf
-	.type	ftl_write_buf, %function
-ftl_write_buf:
-	stp	x29, x30, [sp, -48]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	str	x21, [sp, 32]
-	cbnz	x0, .L1167
-	adrp	x1, .LANCHOR130
-	add	x1, x1, :lo12:.LANCHOR130
-	mov	w2, 808
-	adrp	x0, .LC0
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-	bl	print_ftl_debug_info
-	mov	w0, -1
-.L1166:
-	ldp	x19, x20, [sp, 16]
-	ldr	x21, [sp, 32]
-	ldp	x29, x30, [sp], 48
-	ret
-.L1170:
-	mov	x1, x19
-	adrp	x0, .LANCHOR65
-	add	x0, x0, :lo12:.LANCHOR65
-	bl	buf_add_tail
-	adrp	x1, .LANCHOR110
-	ldrb	w3, [x19, 56]
-	ldrb	w0, [x21, #:lo12:.LANCHOR66]
-	ldr	x1, [x1, #:lo12:.LANCHOR110]
-	add	w0, w0, 1
-	and	w0, w0, 255
-	strb	w0, [x21, #:lo12:.LANCHOR66]
-	ldr	w2, [x1, 16]
-	add	w2, w2, w3
-	str	w2, [x1, 16]
-	ldr	w2, [x1, 32]
-	add	w2, w2, 1
-	str	w2, [x1, 32]
-	b	.L1166
-.L1167:
-	mov	x19, x0
-	adrp	x0, .LANCHOR131
-	mov	x20, x0
-	ldrb	w1, [x0, #:lo12:.LANCHOR131]
-	ldrb	w2, [x19, 56]
-	cmp	w2, w1
-	bls	.L1172
-	adrp	x1, .LANCHOR130
-	adrp	x0, .LC0
-	mov	w2, 815
-	add	x1, x1, :lo12:.LANCHOR130
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1172:
-	ldrb	w0, [x19, 56]
-	adrp	x21, .LANCHOR66
-	cbz	w0, .L1169
-	ldrb	w1, [x20, #:lo12:.LANCHOR131]
-	cmp	w1, w0
-	bcs	.L1170
-.L1169:
-	mov	x0, x19
-	bl	zbuf_free
-	ldrb	w0, [x21, #:lo12:.LANCHOR66]
-	b	.L1166
-	.size	ftl_write_buf, .-ftl_write_buf
-	.section	.text.ftl_write_completed,"ax",@progbits
-	.align	2
-	.global	ftl_write_completed
-	.type	ftl_write_completed, %function
-ftl_write_completed:
-	stp	x29, x30, [sp, -80]!
-	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR55
-	stp	x19, x20, [sp, 16]
-	add	x22, x21, :lo12:.LANCHOR55
-	stp	x23, x24, [sp, 48]
-	adrp	x20, .LANCHOR64
-	mov	w23, 20041
-	add	x20, x20, :lo12:.LANCHOR64
-	str	x25, [sp, 64]
-	movk	w23, 0x444b, lsl 16
-	mov	w25, 0
-.L1178:
-	ldrb	w0, [x20]
-	cmp	w0, 255
-	bne	.L1189
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldr	x25, [sp, 64]
-	ldp	x29, x30, [sp], 80
-	ret
-.L1189:
-	add	x1, x21, :lo12:.LANCHOR55
-	lsl	x2, x0, 6
-	add	x24, x1, x2
-	ubfiz	x19, x0, 6, 8
-	add	x19, x1, x19
-	ldrb	w1, [x1, x2]
-	strb	w1, [x20]
-	ldr	w1, [x24, 52]
-	cmn	w1, #1
-	bne	.L1179
-	adrp	x1, .LANCHOR124
-	ldrb	w1, [x1, #:lo12:.LANCHOR124]
-	cbnz	w1, .L1180
-	adrp	x1, .LANCHOR80
-	ldrb	w1, [x1, #:lo12:.LANCHOR80]
-	cbz	w1, .L1181
-.L1180:
-	adrp	x1, .LANCHOR110
-	ldr	x1, [x1, #:lo12:.LANCHOR110]
-	ldr	w1, [x1, 156]
-	cmp	w1, w23
-	beq	.L1182
-.L1181:
-	add	x1, x22, x0, lsl 6
-	mov	w2, 24
-	mov	w5, 65535
-	ldr	w3, [x1, 40]
-	adrp	x1, .LANCHOR74
-	ldrh	w4, [x1, #:lo12:.LANCHOR74]
-	adrp	x1, .LANCHOR31
-	ldrb	w1, [x1, #:lo12:.LANCHOR31]
-	sub	w1, w2, w1
-	sub	w2, w1, w4
-	mov	w1, 1
-	lsr	w4, w3, w4
-	lsl	w1, w1, w2
-	adrp	x2, .LANCHOR75
-	sub	w1, w1, #1
-	ldrb	w2, [x2, #:lo12:.LANCHOR75]
-	and	w1, w1, w4
-	udiv	w1, w1, w2
-	adrp	x2, .LANCHOR12
-	mov	x24, x2
-	ldr	x4, [x2, #:lo12:.LANCHOR12]
-	and	w25, w1, 65535
-	and	w1, w1, w5
-	ldr	w6, [x4, 560]
-	cmp	w6, w5
-	bne	.L1183
-	str	w1, [x4, 560]
-	str	w3, [x4, 564]
-.L1183:
-	add	x0, x22, x0, lsl 6
-	ldr	w2, [x0, 36]
-	adrp	x0, .LC77
-	add	x0, x0, :lo12:.LC77
-	bl	printf
-	ldr	x0, [x24, #:lo12:.LANCHOR12]
-	ldr	w1, [x0, 556]
-	add	w1, w1, 1
-	str	w1, [x0, 556]
-	ldrh	w1, [x0, 16]
-	cmp	w1, w25
-	bne	.L1184
-	strh	wzr, [x0, 22]
-.L1182:
-	mov	x0, x19
-	mov	w25, 1
-	bl	ftl_write_buf
-	b	.L1178
-.L1184:
-	ldrh	w1, [x0, 48]
-	cmp	w1, w25
-	bne	.L1182
-	strh	wzr, [x0, 54]
-	b	.L1182
-.L1179:
-	cbz	w25, .L1187
-	ldp	w1, w2, [x24, 36]
-	adrp	x0, .LC78
-	add	x0, x0, :lo12:.LC78
-	bl	printf
-	mov	x0, x19
-	bl	ftl_write_buf
-	b	.L1178
-.L1187:
-	ldrh	w2, [x24, 48]
-	ldr	w0, [x24, 36]
-	ldr	w1, [x24, 44]
-	bl	lpa_hash_update_ppa
-	ldrb	w0, [x24, 2]
-	tbz	x0, 2, .L1188
-	and	w0, w0, -3
-	strb	w0, [x24, 2]
-	b	.L1178
-.L1188:
-	mov	x0, x19
-	bl	zbuf_free
-	b	.L1178
-	.size	ftl_write_completed, .-ftl_write_completed
-	.section	.text.zftl_add_read_buf,"ax",@progbits
-	.align	2
-	.global	zftl_add_read_buf
-	.type	zftl_add_read_buf, %function
-zftl_add_read_buf:
-	stp	x29, x30, [sp, -32]!
-	add	x29, sp, 0
-	str	x19, [sp, 16]
-	cbnz	x0, .L1195
-	mov	w2, 1148
-	adrp	x1, .LANCHOR132
-	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR132
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-	ldr	x19, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	b	print_ftl_debug_info
-.L1195:
-	ldrb	w1, [x0, 56]
-	mov	x19, x0
-	adrp	x0, .LANCHOR131
-	ldrb	w0, [x0, #:lo12:.LANCHOR131]
-	cmp	w1, w0
-	bls	.L1197
-	adrp	x1, .LANCHOR132
-	adrp	x0, .LC0
-	mov	w2, 1155
-	add	x1, x1, :lo12:.LANCHOR132
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1197:
-	mov	x1, x19
-	adrp	x0, .LANCHOR133
-	add	x0, x0, :lo12:.LANCHOR133
-	bl	buf_add_tail
-	adrp	x1, .LANCHOR134
-	ldr	x19, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	ldrb	w0, [x1, #:lo12:.LANCHOR134]
-	add	w0, w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR134]
 	ret
-	.size	zftl_add_read_buf, .-zftl_add_read_buf
+	.size	print_ftl_debug_info, .-print_ftl_debug_info
 	.section	.text.sblk_init,"ax",@progbits
 	.align	2
 	.global	sblk_init
@@ -7417,8 +7392,8 @@ sblk_init:
 	.type	dump_sblk_queue, %function
 dump_sblk_queue:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LC79
-	add	x0, x0, :lo12:.LC79
+	adrp	x0, .LC73
+	add	x0, x0, :lo12:.LC73
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR59
@@ -7427,15 +7402,15 @@ dump_sblk_queue:
 	bl	printf
 	ldrb	w19, [x19, #:lo12:.LANCHOR59]
 	cmp	w19, 255
-	beq	.L1201
+	beq	.L1212
 	adrp	x1, .LANCHOR55
 	ubfiz	x19, x19, 6, 8
 	add	x1, x1, :lo12:.LANCHOR55
-	adrp	x21, .LC80
+	adrp	x21, .LC74
 	add	x19, x1, x19
-	add	x21, x21, :lo12:.LC80
+	add	x21, x21, :lo12:.LC74
 	mov	x20, x1
-.L1203:
+.L1214:
 	ldrb	w2, [x19, 58]
 	mov	x0, x21
 	ldrb	w1, [x19, 1]
@@ -7443,11 +7418,11 @@ dump_sblk_queue:
 	bl	printf
 	ldrb	w19, [x19]
 	cmp	w19, 255
-	beq	.L1201
+	beq	.L1212
 	ubfiz	x19, x19, 6, 8
 	add	x19, x20, x19
-	b	.L1203
-.L1201:
+	b	.L1214
+.L1212:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -7461,87 +7436,87 @@ queue_lun_state:
 	adrp	x2, .LANCHOR59
 	ldrb	w2, [x2, #:lo12:.LANCHOR59]
 	cmp	w2, 255
-	beq	.L1219
+	beq	.L1230
 	adrp	x3, .LANCHOR31
 	mov	w8, 24
 	adrp	x10, .LANCHOR55
 	add	x10, x10, :lo12:.LANCHOR55
 	ldrb	w4, [x3, #:lo12:.LANCHOR31]
 	mov	w3, 1
-	adrp	x13, .L1215
+	adrp	x13, .L1226
 	mov	x15, x10
 	sub	w8, w8, w4
-	add	x13, x13, :lo12:.L1215
+	add	x13, x13, :lo12:.L1226
 	lsl	w4, w3, w4
 	sub	w4, w4, #1
 	and	w6, w4, 65535
-	adrp	x4, .LANCHOR74
+	adrp	x4, .LANCHOR80
 	asr	w11, w0, w8
 	and	w11, w11, w6
-	ldrh	w12, [x4, #:lo12:.LANCHOR74]
+	ldrh	w12, [x4, #:lo12:.LANCHOR80]
 	sub	w4, w8, w12
 	lsl	w3, w3, w4
 	sub	w3, w3, #1
 	and	w7, w3, 65535
-	adrp	x3, .LANCHOR75
-	ldrb	w5, [x3, #:lo12:.LANCHOR75]
+	adrp	x3, .LANCHOR81
+	ldrb	w5, [x3, #:lo12:.LANCHOR81]
 	asr	w3, w0, w12
 	sub	w5, w5, #1
 	and	w5, w5, 65535
 	and	w3, w3, w5
 	and	w3, w3, w7
-.L1218:
+.L1229:
 	add	x14, x10, x2, lsl 6
 	ldr	w4, [x14, 40]
 	lsr	w0, w4, w8
 	and	w0, w6, w0
 	cmp	w11, w0
-	bne	.L1213
+	bne	.L1224
 	lsr	w4, w4, w12
 	and	w4, w5, w4
 	and	w4, w7, w4
 	ldrb	w0, [x14, 58]
 	cmp	w3, w4
-	bne	.L1214
+	bne	.L1225
 	cmp	w1, 1
-	bne	.L1211
+	bne	.L1222
 	cmp	w0, 7
 	ccmp	w0, 9, 4, ne
-	beq	.L1213
+	beq	.L1224
 	ret
-.L1214:
+.L1225:
 	cmp	w1, 3
-	bhi	.L1213
+	bhi	.L1224
 	ldrb	w4, [x13,w1,uxtw]
-	adr	x14, .Lrtx1215
+	adr	x14, .Lrtx1226
 	add	x4, x14, w4, sxtb #2
 	br	x4
-.Lrtx1215:
+.Lrtx1226:
 	.section	.rodata.queue_lun_state,"a",@progbits
 	.align	0
 	.align	2
-.L1215:
-	.byte	(.L1211 - .Lrtx1215) / 4
-	.byte	(.L1216 - .Lrtx1215) / 4
-	.byte	(.L1217 - .Lrtx1215) / 4
-	.byte	(.L1211 - .Lrtx1215) / 4
+.L1226:
+	.byte	(.L1222 - .Lrtx1226) / 4
+	.byte	(.L1227 - .Lrtx1226) / 4
+	.byte	(.L1228 - .Lrtx1226) / 4
+	.byte	(.L1222 - .Lrtx1226) / 4
 	.section	.text.queue_lun_state
-.L1216:
+.L1227:
 	cmp	w0, 7
 	ccmp	w0, 9, 4, ne
-	beq	.L1213
+	beq	.L1224
 	ret
-.L1217:
+.L1228:
 	cmp	w0, 11
-	bne	.L1211
-.L1213:
+	bne	.L1222
+.L1224:
 	lsl	x2, x2, 6
 	ldrb	w2, [x15, x2]
 	cmp	w2, 255
-	bne	.L1218
-.L1219:
+	bne	.L1229
+.L1230:
 	mov	w0, 0
-.L1211:
+.L1222:
 	ret
 	.size	queue_lun_state, .-queue_lun_state
 	.section	.text.queue_remove_completed_req,"ax",@progbits
@@ -7565,9 +7540,9 @@ queue_remove_completed_req:
 	add	x10, x4, :lo12:.LANCHOR64
 	mov	w6, 0
 	mov	w15, -1
-.L1222:
+.L1233:
 	cmp	w2, 255
-	beq	.L1223
+	beq	.L1234
 	sbfiz	x8, x2, 6, 32
 	sxtw	x0, w2
 	add	x4, x5, x8
@@ -7575,149 +7550,326 @@ queue_remove_completed_req:
 	sub	w4, w4, #12
 	and	w4, w4, 255
 	cmp	w4, 1
-	bls	.L1224
-	cbz	w6, .L1221
+	bls	.L1235
+	cbz	w6, .L1232
 	strb	w2, [x1, #:lo12:.LANCHOR59]
 	ret
-.L1224:
+.L1235:
 	lsl	x6, x0, 6
 	ldrb	w2, [x5, x8]
 	add	x4, x5, x6
 	strb	w15, [x5, x6]
 	ldrb	w6, [x4, 59]
 	cmp	w6, 1
-	bne	.L1227
+	bne	.L1238
 	ldrh	w4, [x4, 50]
-	cbnz	w4, .L1235
+	cbnz	w4, .L1246
 	mov	w4, w14
 	mov	x6, x10
-.L1228:
+.L1239:
 	cmp	w4, 255
-	bne	.L1233
+	bne	.L1244
 	add	x3, x3, :lo12:.LANCHOR55
 	strb	w2, [x1, #:lo12:.LANCHOR59]
 	add	x0, x3, x0, lsl 6
 	ldrb	w0, [x0, 1]
 	strb	w0, [x6]
 	ret
-.L1227:
-	cbnz	w6, .L1229
+.L1238:
+	cbnz	w6, .L1240
 	ldr	w4, [x4, 36]
 	cmn	w4, #1
-	beq	.L1229
+	beq	.L1240
 	mov	w4, w13
 	mov	x6, x7
-	b	.L1228
-.L1235:
+	b	.L1239
+.L1246:
 	mov	w4, w12
 	mov	x6, x16
-	b	.L1228
-.L1233:
+	b	.L1239
+.L1244:
 	mov	w6, w4
 	sbfiz	x4, x4, 6, 32
 	ldrb	w4, [x11, x4]
 	cmp	w4, 255
-	bne	.L1233
+	bne	.L1244
 	add	x0, x11, x0, lsl 6
 	sbfiz	x6, x6, 6, 32
 	ldrb	w0, [x0, 1]
 	strb	w0, [x11, x6]
-.L1229:
+.L1240:
 	mov	w6, 1
-	b	.L1222
-.L1223:
-	cbz	w6, .L1221
+	b	.L1233
+.L1234:
+	cbz	w6, .L1232
 	mov	w0, -1
 	strb	w0, [x1, #:lo12:.LANCHOR59]
-.L1221:
+.L1232:
 	ret
 	.size	queue_remove_completed_req, .-queue_remove_completed_req
+	.section	.text.pm_alloc_new_blk,"ax",@progbits
+	.align	2
+	.global	pm_alloc_new_blk
+	.type	pm_alloc_new_blk, %function
+pm_alloc_new_blk:
+	stp	x29, x30, [sp, -64]!
+	adrp	x2, .LANCHOR85
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR69
+	stp	x21, x22, [sp, 32]
+	ldr	x1, [x20, #:lo12:.LANCHOR69]
+	ldrb	w2, [x2, #:lo12:.LANCHOR85]
+	ldrh	w0, [x1, 690]
+	str	x23, [sp, 48]
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	strh	w0, [x1, 690]
+	cmp	w2, w0
+	bls	.L1257
+	add	x0, x1, x0, sxtw 1
+	ldrh	w1, [x0, 672]
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L1258
+.L1257:
+	adrp	x19, .LC75
+	add	x19, x19, :lo12:.LC75
+	mov	w23, 65535
+	adrp	x22, .LANCHOR9
+.L1259:
+	mov	w0, 1
+	bl	ftl_alloc_sblk
+	and	w21, w0, 65535
+	cmp	w21, w23
+	beq	.L1259
+	mov	w1, 0
+	mov	w0, w21
+	bl	ftl_erase_sblk
+	add	x14, x20, :lo12:.LANCHOR69
+	ldr	x1, [x20, #:lo12:.LANCHOR69]
+	mov	w0, w21
+	add	x1, x1, 672
+	bl	ftl_get_blk_list_in_sblk
+	tst	w0, 65535
+	bne	.L1260
+	mov	w1, w21
+	mov	x0, x19
+	bl	printf
+	ldr	x0, [x22, #:lo12:.LANCHOR9]
+	add	x21, x0, x21, uxth 2
+	ldrb	w0, [x21, 2]
+	orr	w0, w0, -32
+	strb	w0, [x21, 2]
+	b	.L1259
+.L1260:
+	ldr	x0, [x14]
+	adrp	x1, .LANCHOR134
+	mov	w2, 1
+	mov	w19, 0
+	add	x0, x0, 416
+	str	w2, [x1, #:lo12:.LANCHOR134]
+	mov	w1, 65535
+	strh	wzr, [x0, 274]
+.L1262:
+	ldrh	w2, [x0]
+	cmp	w2, w1
+	beq	.L1261
+	add	w19, w19, 1
+	add	x0, x0, 2
+	and	w19, w19, 65535
+	cmp	w19, 128
+	bne	.L1262
+	adrp	x1, .LANCHOR135
+	adrp	x0, .LC0
+	mov	w2, 264
+	add	x1, x1, :lo12:.LANCHOR135
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1261:
+	ldr	x0, [x20, #:lo12:.LANCHOR69]
+	add	x19, x0, x19, sxtw 1
+	ldrh	w1, [x0, 688]
+	strh	w21, [x19, 416]
+	add	w1, w1, 1
+	strh	w1, [x0, 688]
+.L1258:
+	ldr	x1, [x20, #:lo12:.LANCHOR69]
+	ldrh	w0, [x1, 690]
+	add	x0, x0, 336
+	ldrh	w19, [x1, x0, lsl 1]
+	mov	w0, 65533
+	sub	w1, w19, #1
+	cmp	w0, w1, uxth
+	bcs	.L1264
+	adrp	x1, .LANCHOR135
+	adrp	x0, .LC0
+	mov	w2, 270
+	add	x1, x1, :lo12:.LANCHOR135
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1264:
+	adrp	x1, .LANCHOR31
+	mov	w2, 24
+	ldr	x0, [x20, #:lo12:.LANCHOR69]
+	ldrb	w1, [x1, #:lo12:.LANCHOR31]
+	sub	w2, w2, w1
+	adrp	x1, .LANCHOR80
+	strh	wzr, [x0, 696]
+	ldrh	w1, [x1, #:lo12:.LANCHOR80]
+	strh	w19, [x0, 692]
+	sub	w2, w2, w1
+	asr	w4, w19, w2
+	strh	w4, [x0, 694]
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L1267
+	mov	w0, 1
+	and	w4, w4, 65535
+	lsl	w2, w0, w2
+	mov	w3, w19
+	adrp	x0, .LC76
+	sub	w2, w2, #1
+	mov	w1, w19
+	add	x0, x0, :lo12:.LC76
+	bl	printf
+.L1267:
+	mov	w0, 0
+	ldr	x23, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+	.size	pm_alloc_new_blk, .-pm_alloc_new_blk
 	.section	.text.pm_select_ram_region,"ax",@progbits
 	.align	2
 	.global	pm_select_ram_region
 	.type	pm_select_ram_region, %function
 pm_select_ram_region:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR135
-	add	x0, x0, :lo12:.LANCHOR135
+	adrp	x0, .LANCHOR136
+	add	x0, x0, :lo12:.LANCHOR136
 	mov	x1, 0
 	add	x29, sp, 0
 	mov	w2, 65535
 	str	x19, [sp, 16]
-.L1247:
+.L1276:
 	lsl	x3, x1, 4
 	and	w19, w1, 65535
 	ldrh	w3, [x3, x0]
 	cmp	w3, w2
-	beq	.L1246
+	beq	.L1275
 	add	x1, x1, 1
 	cmp	x1, 8
-	bne	.L1247
+	bne	.L1276
 	add	x0, x0, 2
 	mov	w19, w1
 	mov	x2, x0
 	mov	w4, 32768
 	mov	w1, 0
-.L1249:
+.L1278:
 	ldrh	w3, [x2]
-	tbnz	x3, 15, .L1248
+	tbnz	x3, 15, .L1277
 	cmp	w3, w4
-	bcs	.L1248
+	bcs	.L1277
 	mov	w4, w3
 	mov	w19, w1
-.L1248:
+.L1277:
 	add	w1, w1, 1
 	add	x2, x2, 16
 	and	w1, w1, 65535
 	cmp	w1, 8
-	bne	.L1249
+	bne	.L1278
 	cmp	w19, 8
-	bne	.L1246
-	adrp	x1, .LANCHOR136
+	bne	.L1275
+	adrp	x1, .LANCHOR137
 	mov	w2, -1
-	ldrb	w3, [x1, #:lo12:.LANCHOR136]
+	ldrb	w3, [x1, #:lo12:.LANCHOR137]
 	mov	w1, 0
-.L1251:
+.L1280:
 	ldrh	w5, [x0]
 	cmp	w5, w2
-	bcs	.L1250
+	bcs	.L1279
 	ldrh	w4, [x0, -2]
 	cmp	w4, w3
 	csel	w2, w2, w5, eq
 	csel	w19, w19, w1, eq
-.L1250:
+.L1279:
 	add	w1, w1, 1
 	add	x0, x0, 16
 	and	w1, w1, 65535
 	cmp	w1, 8
-	bne	.L1251
+	bne	.L1280
 	cmp	w19, 8
-	bne	.L1246
-	adrp	x1, .LANCHOR137
+	bne	.L1275
+	adrp	x1, .LANCHOR138
 	adrp	x0, .LC0
 	mov	w2, 377
-	add	x1, x1, :lo12:.LANCHOR137
+	add	x1, x1, :lo12:.LANCHOR138
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1246:
+.L1275:
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
 	.size	pm_select_ram_region, .-pm_select_ram_region
+	.section	.text.pm_ppa_update_check,"ax",@progbits
+	.align	2
+	.global	pm_ppa_update_check
+	.type	pm_ppa_update_check, %function
+pm_ppa_update_check:
+	adrp	x4, .LANCHOR31
+	adrp	x3, .LANCHOR80
+	mov	w5, 24
+	ldrb	w4, [x4, #:lo12:.LANCHOR31]
+	ldrh	w3, [x3, #:lo12:.LANCHOR80]
+	sub	w4, w5, w4
+	sub	w5, w4, w3
+	mov	w4, 1
+	lsr	w3, w2, w3
+	lsl	w4, w4, w5
+	sub	w4, w4, #1
+	and	w4, w4, w3
+	adrp	x3, .LANCHOR81
+	ldrb	w3, [x3, #:lo12:.LANCHOR81]
+	udiv	w4, w4, w3
+	adrp	x3, .LANCHOR9
+	ldr	x3, [x3, #:lo12:.LANCHOR9]
+	add	x4, x3, x4, uxth 2
+	ldrb	w3, [x4, 2]
+	ubfx	x3, x3, 5, 3
+	cmp	w3, 1
+	ccmp	w3, 7, 4, ne
+	bne	.L1287
+	stp	x29, x30, [sp, -16]!
+	mov	w3, w2
+	mov	w2, w1
+	mov	x1, x0
+	add	x29, sp, 0
+	adrp	x0, .LC77
+	add	x0, x0, :lo12:.LC77
+	bl	printf
+	mov	w0, -1
+	ldp	x29, x30, [sp], 16
+	ret
+.L1287:
+	mov	w0, 0
+	ret
+	.size	pm_ppa_update_check, .-pm_ppa_update_check
 	.section	.text.idb_init,"ax",@progbits
 	.align	2
 	.global	idb_init
 	.type	idb_init, %function
 idb_init:
-	adrp	x0, .LANCHOR138
-	str	xzr, [x0, #:lo12:.LANCHOR138]
 	adrp	x0, .LANCHOR139
-	str	wzr, [x0, #:lo12:.LANCHOR139]
+	str	xzr, [x0, #:lo12:.LANCHOR139]
 	adrp	x0, .LANCHOR140
-	strb	wzr, [x0, #:lo12:.LANCHOR140]
+	str	wzr, [x0, #:lo12:.LANCHOR140]
 	adrp	x0, .LANCHOR141
-	str	xzr, [x0, #:lo12:.LANCHOR141]
+	strb	wzr, [x0, #:lo12:.LANCHOR141]
+	adrp	x0, .LANCHOR142
+	str	xzr, [x0, #:lo12:.LANCHOR142]
 	mov	w0, 0
 	ret
 	.size	idb_init, .-idb_init
@@ -7744,60 +7896,60 @@ flash_lsb_page_tbl_build:
 	adrp	x19, .LANCHOR3
 	ldrb	w1, [x1, 12]
 	sdiv	w20, w20, w1
-	cbnz	w0, .L1259
+	cbnz	w0, .L1295
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1260:
+.L1296:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 512
-	bne	.L1260
-.L1266:
-	adrp	x21, .LANCHOR142
-	add	x21, x21, :lo12:.LANCHOR142
+	bne	.L1296
+.L1302:
+	adrp	x21, .LANCHOR143
+	add	x21, x21, :lo12:.LANCHOR143
 	mov	w2, 2048
 	mov	w1, 255
 	mov	x0, x21
 	add	x19, x19, :lo12:.LANCHOR3
 	bl	ftl_memset
 	mov	x0, 0
-.L1261:
+.L1297:
 	ldrh	w1, [x19, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	w20, w0, uxth
 	strh	w1, [x21, w1, sxtw 1]
-	bhi	.L1261
+	bhi	.L1297
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1259:
+.L1295:
 	cmp	w0, 1
-	bne	.L1262
+	bne	.L1298
 	add	x3, x19, :lo12:.LANCHOR3
 	mov	x1, 0
-.L1265:
+.L1301:
 	and	w0, w1, 65535
 	cmp	x1, 3
-	bls	.L1263
+	bls	.L1299
 	ubfiz	w2, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 2
 	sub	w0, w2, w0
 	and	w0, w0, 65535
-.L1263:
+.L1299:
 	strh	w0, [x3, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 512
-	bne	.L1265
-	b	.L1266
-.L1262:
+	bne	.L1301
+	b	.L1302
+.L1298:
 	cmp	w0, 2
-	bne	.L1267
+	bne	.L1303
 	add	x3, x19, :lo12:.LANCHOR3
 	mov	w1, 65535
 	mov	x0, 0
-.L1269:
+.L1305:
 	cmp	x0, 2
 	and	w2, w0, 65535
 	csel	w2, w2, w1, cc
@@ -7806,31 +7958,31 @@ flash_lsb_page_tbl_build:
 	add	x0, x0, 1
 	and	w1, w1, 65535
 	cmp	x0, 512
-	bne	.L1269
-	b	.L1266
-.L1267:
+	bne	.L1305
+	b	.L1302
+.L1303:
 	cmp	w0, 3
-	bne	.L1270
+	bne	.L1306
 	add	x3, x19, :lo12:.LANCHOR3
 	mov	x1, 0
-.L1273:
+.L1309:
 	and	w0, w1, 65535
 	cmp	x1, 5
-	bls	.L1271
+	bls	.L1307
 	ubfiz	w2, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 4
 	sub	w0, w2, w0
 	and	w0, w0, 65535
-.L1271:
+.L1307:
 	strh	w0, [x3, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 512
-	bne	.L1273
-	b	.L1266
-.L1270:
+	bne	.L1309
+	b	.L1302
+.L1306:
 	cmp	w0, 4
-	bne	.L1274
+	bne	.L1310
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	w2, 1
 	add	x1, x1, 16
@@ -7848,7 +8000,7 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1, -10]
 	strh	w0, [x1, -2]
 	mov	w0, 8
-.L1276:
+.L1312:
 	and	w3, w0, 1
 	ubfiz	w2, w0, 1, 15
 	add	w3, w3, 6
@@ -7857,40 +8009,40 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1], 2
 	and	w0, w0, 65535
 	cmp	w0, 512
-	bne	.L1276
-	b	.L1266
-.L1274:
+	bne	.L1312
+	b	.L1302
+.L1310:
 	cmp	w0, 5
-	bne	.L1277
+	bne	.L1313
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1278:
+.L1314:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 16
-	bne	.L1278
+	bne	.L1314
 	add	x1, x1, 32
-.L1279:
+.L1315:
 	strh	w0, [x1], 2
 	add	w0, w0, 2
 	and	w0, w0, 65535
 	cmp	w0, 1008
-	bne	.L1279
-	b	.L1266
-.L1277:
+	bne	.L1315
+	b	.L1302
+.L1313:
 	cmp	w0, 8
-	bne	.L1280
+	bne	.L1316
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1281:
+.L1317:
 	strh	w0, [x0, x1]
 	add	x0, x0, 2
 	cmp	x0, 1024
-	bne	.L1281
-	b	.L1266
-.L1280:
+	bne	.L1317
+	b	.L1302
+.L1316:
 	cmp	w0, 9
-	bne	.L1282
+	bne	.L1318
 	add	x0, x19, :lo12:.LANCHOR3
 	mov	w1, 1
 	add	x0, x0, 6
@@ -7899,43 +8051,43 @@ flash_lsb_page_tbl_build:
 	mov	w1, 2
 	strh	w1, [x0, -2]
 	mov	w1, 3
-.L1283:
+.L1319:
 	strh	w1, [x0], 2
 	add	w1, w1, 2
 	and	w1, w1, 65535
 	cmp	w1, 1021
-	bne	.L1283
-	b	.L1266
-.L1282:
+	bne	.L1319
+	b	.L1302
+.L1318:
 	cmp	w0, 10
-	bne	.L1284
+	bne	.L1320
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1285:
+.L1321:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 63
-	bne	.L1285
+	bne	.L1321
 	add	x1, x1, 126
-.L1286:
+.L1322:
 	strh	w0, [x1], 2
 	add	w0, w0, 2
 	and	w0, w0, 65535
 	cmp	w0, 961
-	bne	.L1286
-	b	.L1266
-.L1284:
+	bne	.L1322
+	b	.L1302
+.L1320:
 	cmp	w0, 11
-	bne	.L1287
+	bne	.L1323
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1288:
+.L1324:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L1288
+	bne	.L1324
 	add	x1, x1, 16
-.L1290:
+.L1326:
 	and	w3, w0, 1
 	ubfiz	w2, w0, 1, 15
 	add	w3, w3, 6
@@ -7944,22 +8096,22 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1], 2
 	and	w0, w0, 65535
 	cmp	w0, 512
-	bne	.L1290
-	b	.L1266
-.L1287:
+	bne	.L1326
+	b	.L1302
+.L1323:
 	cmp	w0, 13
-	bne	.L1266
+	bne	.L1302
 	add	x2, x19, :lo12:.LANCHOR3
 	mov	x1, 0
 	mov	w0, 0
-.L1291:
+.L1327:
 	strh	w0, [x1, x2]
 	add	w0, w0, 3
 	and	w0, w0, 65535
 	add	x1, x1, 2
 	cmp	w0, 1536
-	bne	.L1291
-	b	.L1266
+	bne	.L1327
+	b	.L1302
 	.size	flash_lsb_page_tbl_build, .-flash_lsb_page_tbl_build
 	.section	.text.flash_die_info_init,"ax",@progbits
 	.align	2
@@ -7975,13 +8127,13 @@ flash_die_info_init:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L1314
-	adrp	x1, .LANCHOR143
+	tbz	x0, 12, .L1350
+	adrp	x1, .LANCHOR144
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR143
+	add	x1, x1, :lo12:.LANCHOR144
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1314:
+.L1350:
 	adrp	x19, .LANCHOR32
 	add	x23, x19, :lo12:.LANCHOR32
 	adrp	x25, .LANCHOR2
@@ -7989,7 +8141,7 @@ flash_die_info_init:
 	mov	w2, 8
 	adrp	x22, .LANCHOR29
 	ldrh	w0, [x23, 26]
-	adrp	x21, .LANCHOR145
+	adrp	x21, .LANCHOR146
 	ldrb	w1, [x23, 12]
 	adrp	x26, .LANCHOR33
 	strh	w0, [x25, #:lo12:.LANCHOR2]
@@ -8000,18 +8152,18 @@ flash_die_info_init:
 	add	x27, x24, :lo12:.LANCHOR47
 	mov	x28, 0
 	sdiv	w0, w0, w1
-	adrp	x1, .LANCHOR144
-	strh	w0, [x1, #:lo12:.LANCHOR144]
+	adrp	x1, .LANCHOR145
+	strh	w0, [x1, #:lo12:.LANCHOR145]
 	mov	w1, 0
 	add	x0, x22, :lo12:.LANCHOR29
 	bl	ftl_memset
 	mov	w2, 32
 	mov	w1, 0
-	add	x0, x21, :lo12:.LANCHOR145
+	add	x0, x21, :lo12:.LANCHOR146
 	bl	ftl_memset
 	add	x0, x23, 1
 	str	x0, [x29, 120]
-.L1317:
+.L1353:
 	mov	w0, 2
 	ldrb	w2, [x23]
 	strb	w0, [x28, x26]
@@ -8019,9 +8171,9 @@ flash_die_info_init:
 	ldr	x0, [x29, 120]
 	add	x1, x27, x7
 	bl	flash_mem_cmp8
-	cbnz	w0, .L1315
+	cbnz	w0, .L1351
 	ldrb	w4, [x20, #:lo12:.LANCHOR23]
-	add	x1, x21, :lo12:.LANCHOR145
+	add	x1, x21, :lo12:.LANCHOR146
 	and	w2, w28, 255
 	add	w0, w4, 1
 	strb	w0, [x20, #:lo12:.LANCHOR23]
@@ -8030,7 +8182,7 @@ flash_die_info_init:
 	strb	w2, [x0, x4]
 	ldrb	w0, [x7, x27]
 	cmp	w0, 173
-	bne	.L1316
+	bne	.L1352
 	adrp	x0, .LANCHOR7
 	str	w2, [x29, 108]
 	ldr	x1, [x0, #:lo12:.LANCHOR7]
@@ -8044,18 +8196,18 @@ flash_die_info_init:
 	str	w0, [x1, 2056]
 	bl	nandc_wait_flash_ready
 	ldr	w2, [x29, 108]
-.L1316:
+.L1352:
 	mov	w0, w2
 	bl	zftl_flash_enter_slc_mode
-.L1315:
+.L1351:
 	add	x28, x28, 1
 	cmp	x28, 4
-	bne	.L1317
+	bne	.L1353
 	add	x0, x19, :lo12:.LANCHOR32
 	ldrb	w1, [x0, 8]
 	cmp	w1, 2
-	beq	.L1318
-.L1322:
+	beq	.L1354
+.L1358:
 	add	x19, x19, :lo12:.LANCHOR32
 	ldrb	w0, [x20, #:lo12:.LANCHOR23]
 	ldp	x21, x22, [sp, 32]
@@ -8067,11 +8219,11 @@ flash_die_info_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x19, x20, [sp, 16]
 	mul	w0, w0, w1
-	adrp	x1, .LANCHOR146
-	strh	w0, [x1, #:lo12:.LANCHOR146]
+	adrp	x1, .LANCHOR147
+	strh	w0, [x1, #:lo12:.LANCHOR147]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1318:
+.L1354:
 	ldrh	w1, [x25, #:lo12:.LANCHOR2]
 	add	x24, x24, :lo12:.LANCHOR47
 	ldrb	w8, [x0, 13]
@@ -8079,7 +8231,7 @@ flash_die_info_init:
 	ldrb	w12, [x19, #:lo12:.LANCHOR32]
 	add	x11, x20, :lo12:.LANCHOR23
 	ldrb	w13, [x0, 23]
-	add	x21, x21, :lo12:.LANCHOR145
+	add	x21, x21, :lo12:.LANCHOR146
 	add	x22, x22, :lo12:.LANCHOR29
 	mov	x10, 0
 	mul	w8, w8, w1
@@ -8087,12 +8239,12 @@ flash_die_info_init:
 	and	w1, w1, 65280
 	mul	w8, w8, w1
 	lsl	w14, w8, 1
-.L1321:
+.L1357:
 	mov	w2, w12
 	add	x1, x24, x10, lsl 3
 	mov	x0, x7
 	bl	flash_mem_cmp8
-	cbnz	w0, .L1319
+	cbnz	w0, .L1355
 	ldrb	w1, [x11]
 	cmp	w13, 0
 	csel	w2, w8, w14, eq
@@ -8100,11 +8252,11 @@ flash_die_info_init:
 	strb	w0, [x11]
 	str	w2, [x21, x1, lsl 2]
 	strb	w10, [x22, x1]
-.L1319:
+.L1355:
 	add	x10, x10, 1
 	cmp	x10, 4
-	bne	.L1321
-	b	.L1322
+	bne	.L1357
+	b	.L1358
 	.size	flash_die_info_init, .-flash_die_info_init
 	.section	.text.lpa_hash_init,"ax",@progbits
 	.align	2
@@ -8114,19 +8266,19 @@ lpa_hash_init:
 	stp	x29, x30, [sp, -16]!
 	mov	w2, 512
 	mov	w1, 255
-	adrp	x0, .LANCHOR116
+	adrp	x0, .LANCHOR122
 	add	x29, sp, 0
-	add	x0, x0, :lo12:.LANCHOR116
+	add	x0, x0, :lo12:.LANCHOR122
 	bl	ftl_memset
-	adrp	x0, .LANCHOR94
+	adrp	x0, .LANCHOR100
 	mov	w1, 255
 	ldp	x29, x30, [sp], 16
-	ldrh	w2, [x0, #:lo12:.LANCHOR94]
-	adrp	x0, .LANCHOR79
-	ldrb	w0, [x0, #:lo12:.LANCHOR79]
+	ldrh	w2, [x0, #:lo12:.LANCHOR100]
+	adrp	x0, .LANCHOR85
+	ldrb	w0, [x0, #:lo12:.LANCHOR85]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR118
-	ldr	x0, [x0, #:lo12:.LANCHOR118]
+	adrp	x0, .LANCHOR124
+	ldr	x0, [x0, #:lo12:.LANCHOR124]
 	lsl	w2, w2, 2
 	b	ftl_memset
 	.size	lpa_hash_init, .-lpa_hash_init
@@ -8141,59 +8293,59 @@ lpa_rebuild_hash:
 	ldr	w0, [x0, #:lo12:.LANCHOR19]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	tbz	x0, 12, .L1335
-	adrp	x1, .LANCHOR147
-	adrp	x0, .LC81
+	tbz	x0, 12, .L1371
+	adrp	x1, .LANCHOR148
+	adrp	x0, .LC78
 	mov	w3, 0
 	mov	w2, 239
-	add	x1, x1, :lo12:.LANCHOR147
-	add	x0, x0, :lo12:.LC81
+	add	x1, x1, :lo12:.LANCHOR148
+	add	x0, x0, :lo12:.LC78
 	bl	printf
-.L1335:
-	adrp	x20, .LANCHOR94
-	adrp	x22, .LANCHOR79
-	adrp	x19, .LANCHOR116
-	add	x19, x19, :lo12:.LANCHOR116
+.L1371:
+	adrp	x20, .LANCHOR100
+	adrp	x22, .LANCHOR85
+	adrp	x19, .LANCHOR122
+	add	x19, x19, :lo12:.LANCHOR122
 	mov	w2, 512
 	mov	w1, 255
 	mov	x0, x19
 	bl	ftl_memset
-	ldrh	w2, [x20, #:lo12:.LANCHOR94]
-	adrp	x21, .LANCHOR118
-	ldrb	w0, [x22, #:lo12:.LANCHOR79]
+	ldrh	w2, [x20, #:lo12:.LANCHOR100]
+	adrp	x21, .LANCHOR124
+	ldrb	w0, [x22, #:lo12:.LANCHOR85]
 	mov	w1, 255
-	add	x20, x20, :lo12:.LANCHOR94
+	add	x20, x20, :lo12:.LANCHOR100
 	mul	w2, w2, w0
-	ldr	x0, [x21, #:lo12:.LANCHOR118]
+	ldr	x0, [x21, #:lo12:.LANCHOR124]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	adrp	x0, .LANCHOR117
-	ldrb	w3, [x22, #:lo12:.LANCHOR79]
-	ldr	x5, [x21, #:lo12:.LANCHOR118]
+	adrp	x0, .LANCHOR123
+	ldrb	w3, [x22, #:lo12:.LANCHOR85]
+	ldr	x5, [x21, #:lo12:.LANCHOR124]
 	mov	w1, 0
-	ldr	x4, [x0, #:lo12:.LANCHOR117]
-.L1336:
+	ldr	x4, [x0, #:lo12:.LANCHOR123]
+.L1372:
 	ldrh	w0, [x20]
 	mul	w0, w0, w3
 	cmp	w1, w0, lsl 1
-	blt	.L1338
+	blt	.L1374
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1338:
+.L1374:
 	uxtw	x2, w1
 	ldr	w0, [x4, x2, lsl 2]
 	cmn	w0, #1
-	beq	.L1337
+	beq	.L1373
 	and	x0, x0, 255
 	ldrh	w6, [x19, x0, lsl 1]
 	strh	w1, [x19, x0, lsl 1]
 	strh	w6, [x5, x2, lsl 1]
-.L1337:
+.L1373:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L1336
+	b	.L1372
 	.size	lpa_rebuild_hash, .-lpa_rebuild_hash
 	.section	.text.zftl_read_flash_info,"ax",@progbits
 	.align	2
@@ -8210,7 +8362,7 @@ zftl_read_flash_info:
 	adrp	x1, .LANCHOR32
 	add	x1, x1, :lo12:.LANCHOR32
 	adrp	x0, .LANCHOR2
-	adrp	x3, .LANCHOR67
+	adrp	x3, .LANCHOR73
 	strb	wzr, [x19, 10]
 	mov	w4, 1
 	ldrb	w2, [x1, 9]
@@ -8222,8 +8374,8 @@ zftl_read_flash_info:
 	adrp	x0, .LANCHOR49
 	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	strb	w0, [x19, 7]
-	add	x0, x3, :lo12:.LANCHOR67
-	ldrb	w3, [x3, #:lo12:.LANCHOR67]
+	add	x0, x3, :lo12:.LANCHOR73
+	ldrb	w3, [x3, #:lo12:.LANCHOR73]
 	strb	w3, [x19]
 	ldrb	w3, [x0, 1]
 	strb	w3, [x19, 1]
@@ -8241,20 +8393,20 @@ zftl_read_flash_info:
 	strb	w0, [x19, 9]
 	adrp	x0, .LANCHOR23
 	ldrb	w3, [x0, #:lo12:.LANCHOR23]
-.L1347:
+.L1383:
 	cmp	w3, w1, uxtb
-	bhi	.L1348
+	bhi	.L1384
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1348:
+.L1384:
 	ldrb	w0, [x1, x2]
 	add	x1, x1, 1
 	ldrb	w5, [x19, 10]
 	lsl	w0, w4, w0
 	orr	w0, w0, w5
 	strb	w0, [x19, 10]
-	b	.L1347
+	b	.L1383
 	.size	zftl_read_flash_info, .-zftl_read_flash_info
 	.section	.text.gc_static_wearleveling,"ax",@progbits
 	.align	2
@@ -8264,18 +8416,18 @@ gc_static_wearleveling:
 	stp	x29, x30, [sp, -160]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR110
+	adrp	x22, .LANCHOR69
 	stp	x19, x20, [sp, 16]
-	ldr	x0, [x22, #:lo12:.LANCHOR110]
+	ldr	x0, [x22, #:lo12:.LANCHOR69]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	ldr	w1, [x0, 32]
 	mov	w0, 10240
 	cmp	w1, w0
-	bls	.L1351
+	bls	.L1387
 	bl	ftl_tmp_into_update
-.L1351:
+.L1387:
 	adrp	x19, .LANCHOR12
 	mov	w3, 36000
 	ldr	x0, [x19, #:lo12:.LANCHOR12]
@@ -8283,26 +8435,26 @@ gc_static_wearleveling:
 	ldr	w2, [x0, 12]
 	add	w3, w1, w3
 	cmp	w2, w3
-	bcs	.L1352
-	ldr	x4, [x22, #:lo12:.LANCHOR110]
+	bcs	.L1388
+	ldr	x4, [x22, #:lo12:.LANCHOR69]
 	ldr	w3, [x0, 572]
 	add	w3, w3, 256
 	ldr	w4, [x4, 36]
 	cmp	w4, w3
-	bcc	.L1404
-.L1352:
+	bcc	.L1440
+.L1388:
 	add	w1, w1, 860160
 	add	w1, w1, 3840
 	cmp	w2, w1
-	bhi	.L1354
-	ldr	x3, [x22, #:lo12:.LANCHOR110]
+	bhi	.L1390
+	ldr	x3, [x22, #:lo12:.LANCHOR69]
 	ldr	w1, [x0, 572]
 	add	w1, w1, 32
 	ldr	w3, [x3, 36]
 	cmp	w3, w1
-	bls	.L1405
-.L1354:
-	ldr	x1, [x22, #:lo12:.LANCHOR110]
+	bls	.L1441
+.L1390:
+	ldr	x1, [x22, #:lo12:.LANCHOR69]
 	mov	w20, 65535
 	adrp	x8, .LANCHOR19
 	mov	w21, w20
@@ -8321,10 +8473,10 @@ gc_static_wearleveling:
 	str	wzr, [x29, 128]
 	str	wzr, [x29, 136]
 	stp	wzr, wzr, [x29, 144]
-.L1356:
+.L1392:
 	ldrh	w0, [x10]
 	cmp	w0, w28
-	bhi	.L1365
+	bhi	.L1401
 	ldr	x0, [x19, #:lo12:.LANCHOR12]
 	mov	w2, 128
 	mov	w1, 255
@@ -8340,7 +8492,7 @@ gc_static_wearleveling:
 	mov	x1, x0
 	lsl	x28, x0, 2
 	add	x10, x8, x28
-	tbz	x3, 10, .L1366
+	tbz	x3, 10, .L1402
 	adrp	x2, .LANCHOR11
 	ldrb	w6, [x10, 3]
 	ldrb	w4, [x10, 2]
@@ -8353,46 +8505,46 @@ gc_static_wearleveling:
 	ubfx	x5, x4, 5, 3
 	and	w2, w2, 2047
 	ubfx	x4, x4, 3, 2
-	adrp	x0, .LC83
-	add	x0, x0, :lo12:.LC83
+	adrp	x0, .LC80
+	add	x0, x0, :lo12:.LC80
 	bl	printf
 	ldp	x8, x10, [x29, 112]
-.L1366:
+.L1402:
 	ldrb	w0, [x10, 2]
 	and	w3, w0, 224
 	cmp	w3, 32
-	bne	.L1367
-	ldr	x1, [x22, #:lo12:.LANCHOR110]
+	bne	.L1403
+	ldr	x1, [x22, #:lo12:.LANCHOR69]
 	ldrh	w1, [x1, 688]
 	cmp	w1, 2
-	bls	.L1367
-	adrp	x1, .LANCHOR148
+	bls	.L1403
+	adrp	x1, .LANCHOR149
 	mov	w2, 1
-	str	w2, [x1, #:lo12:.LANCHOR148]
-.L1367:
+	str	w2, [x1, #:lo12:.LANCHOR149]
+.L1403:
 	ldrb	w1, [x10, 2]
-	tbz	x1, 3, .L1368
-	ldr	x1, [x22, #:lo12:.LANCHOR110]
+	tbz	x1, 3, .L1404
+	ldr	x1, [x22, #:lo12:.LANCHOR69]
 	ldrh	w2, [x8, x28]
 	and	w2, w2, 2047
 	ldrh	w4, [x1, 96]
-	adrp	x1, .LANCHOR149
-	ldrh	w1, [x1, #:lo12:.LANCHOR149]
+	adrp	x1, .LANCHOR150
+	ldrh	w1, [x1, #:lo12:.LANCHOR150]
 	add	w1, w2, w1, lsr 2
 	cmp	w4, w1
-	ble	.L1368
+	ble	.L1404
 	and	w0, w0, 192
 	cmp	w0, 64
-	bne	.L1369
+	bne	.L1405
 	ldr	x0, [x19, #:lo12:.LANCHOR12]
 	mov	w1, 0
 	mov	w2, 1
 	ldrh	w0, [x0, 586]
 	bl	gc_add_sblk
-	adrp	x0, .LANCHOR70+2192
+	adrp	x0, .LANCHOR76+2192
 	mov	w1, 1
-	strh	w1, [x0, #:lo12:.LANCHOR70+2192]
-.L1368:
+	strh	w1, [x0, #:lo12:.LANCHOR76+2192]
+.L1404:
 	ldr	x0, [x19, #:lo12:.LANCHOR12]
 	ldr	x2, [x29, 152]
 	ldr	x11, [x24, #:lo12:.LANCHOR9]
@@ -8401,7 +8553,7 @@ gc_static_wearleveling:
 	mov	x1, x0
 	lsl	x10, x0, 2
 	add	x28, x11, x10
-	tbz	x2, 10, .L1370
+	tbz	x2, 10, .L1406
 	adrp	x2, .LANCHOR11
 	ldrb	w6, [x28, 3]
 	ldrb	w4, [x28, 2]
@@ -8414,38 +8566,38 @@ gc_static_wearleveling:
 	ubfx	x5, x4, 5, 3
 	and	w2, w2, 2047
 	ubfx	x4, x4, 3, 2
-	adrp	x0, .LC84
-	add	x0, x0, :lo12:.LC84
+	adrp	x0, .LC81
+	add	x0, x0, :lo12:.LC81
 	bl	printf
 	ldp	x10, x11, [x29, 112]
-.L1370:
+.L1406:
 	ldrb	w0, [x28, 2]
-	tbz	x0, 3, .L1371
-	ldr	x0, [x22, #:lo12:.LANCHOR110]
+	tbz	x0, 3, .L1407
+	ldr	x0, [x22, #:lo12:.LANCHOR69]
 	ldr	w1, [x11, x10]
 	ldrh	w2, [x0, 98]
-	adrp	x0, .LANCHOR150
+	adrp	x0, .LANCHOR151
 	ubfx	x1, x1, 11, 8
-	ldrh	w0, [x0, #:lo12:.LANCHOR150]
+	ldrh	w0, [x0, #:lo12:.LANCHOR151]
 	add	w0, w1, w0, lsr 2
 	cmp	w2, w0
-	ble	.L1371
+	ble	.L1407
 	ldrb	w0, [x28, 2]
 	and	w1, w0, 192
 	cmp	w1, 64
-	bne	.L1372
+	bne	.L1408
 	ldr	x0, [x19, #:lo12:.LANCHOR12]
 	mov	w1, 0
 	mov	w2, 1
 	ldrh	w0, [x0, 584]
 	bl	gc_add_sblk
-	adrp	x0, .LANCHOR70+2192
+	adrp	x0, .LANCHOR76+2192
 	mov	w1, 1
-	strh	w1, [x0, #:lo12:.LANCHOR70+2192]
-.L1371:
+	strh	w1, [x0, #:lo12:.LANCHOR76+2192]
+.L1407:
 	ldr	x0, [x29, 152]
 	ldr	w0, [x0, #:lo12:.LANCHOR19]
-	tbz	x0, 10, .L1373
+	tbz	x0, 10, .L1409
 	adrp	x2, .LANCHOR11
 	ldr	x1, [x24, #:lo12:.LANCHOR9]
 	uxtw	x6, w27
@@ -8458,17 +8610,17 @@ gc_static_wearleveling:
 	ldrb	w4, [x5, 2]
 	ubfx	x3, x3, 11, 8
 	ldrh	w2, [x1, x0]
-	adrp	x0, .LC85
+	adrp	x0, .LC82
 	mov	w1, w27
-	add	x0, x0, :lo12:.LC85
+	add	x0, x0, :lo12:.LC82
 	ubfx	x5, x4, 5, 3
 	and	w2, w2, 2047
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1373:
+.L1409:
 	ldr	x0, [x29, 152]
 	ldr	w0, [x0, #:lo12:.LANCHOR19]
-	tbz	x0, 10, .L1374
+	tbz	x0, 10, .L1410
 	ldr	w6, [x29, 128]
 	adrp	x2, .LANCHOR11
 	ldr	x1, [x24, #:lo12:.LANCHOR9]
@@ -8477,9 +8629,9 @@ gc_static_wearleveling:
 	add	x5, x1, x0
 	ldr	w3, [x1, x0]
 	ldrh	w2, [x1, x0]
-	adrp	x0, .LC86
+	adrp	x0, .LC83
 	ldrh	w7, [x7, x6, lsl 1]
-	add	x0, x0, :lo12:.LC86
+	add	x0, x0, :lo12:.LC83
 	ldrb	w6, [x5, 3]
 	ubfx	x3, x3, 11, 8
 	ldr	w1, [x29, 128]
@@ -8488,8 +8640,8 @@ gc_static_wearleveling:
 	ubfx	x5, x4, 5, 3
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1374:
-	ldr	x0, [x22, #:lo12:.LANCHOR110]
+.L1410:
+	ldr	x0, [x22, #:lo12:.LANCHOR69]
 	ldrh	w1, [x29, 148]
 	strh	w1, [x0, 96]
 	ldr	w1, [x29, 136]
@@ -8503,128 +8655,128 @@ gc_static_wearleveling:
 	strh	w4, [x0, 90]
 	ldr	x0, [x29, 152]
 	ldr	w0, [x0, #:lo12:.LANCHOR19]
-	tbz	x0, 10, .L1375
-	adrp	x0, .LC87
+	tbz	x0, 10, .L1411
+	adrp	x0, .LC84
 	and	w4, w4, 65535
 	and	w3, w3, 65535
 	mov	w2, w25
 	mov	w1, w26
-	add	x0, x0, :lo12:.LC87
+	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L1375:
+.L1411:
 	ldr	x0, [x29, 152]
 	ldr	w0, [x0, #:lo12:.LANCHOR19]
-	tbz	x0, 10, .L1376
-	adrp	x0, .LANCHOR150
+	tbz	x0, 10, .L1412
+	adrp	x0, .LANCHOR151
 	ldr	w3, [x29, 148]
 	mov	w4, w23
 	mov	w2, w21
-	ldrh	w6, [x0, #:lo12:.LANCHOR150]
-	adrp	x0, .LANCHOR149
+	ldrh	w6, [x0, #:lo12:.LANCHOR151]
+	adrp	x0, .LANCHOR150
 	mov	w1, w20
-	ldrh	w5, [x0, #:lo12:.LANCHOR149]
-	adrp	x0, .LC88
-	add	x0, x0, :lo12:.LC88
+	ldrh	w5, [x0, #:lo12:.LANCHOR150]
+	adrp	x0, .LC85
+	add	x0, x0, :lo12:.LC85
 	bl	printf
-.L1376:
+.L1412:
 	sub	w0, w23, w21
 	str	w0, [x29, 144]
-	adrp	x0, .LANCHOR150
+	adrp	x0, .LANCHOR151
 	ldr	w1, [x29, 144]
-	ldrh	w0, [x0, #:lo12:.LANCHOR150]
+	ldrh	w0, [x0, #:lo12:.LANCHOR151]
 	cmp	w1, w0
-	bgt	.L1377
-	adrp	x1, .LANCHOR149
+	bgt	.L1413
+	adrp	x1, .LANCHOR150
 	ldr	w0, [x29, 148]
-	ldrh	w1, [x1, #:lo12:.LANCHOR149]
+	ldrh	w1, [x1, #:lo12:.LANCHOR150]
 	sub	w0, w0, w20
 	cmp	w0, w1
-	ble	.L1406
-.L1377:
+	ble	.L1442
+.L1413:
 	ldr	x0, [x19, #:lo12:.LANCHOR12]
-	adrp	x26, .LANCHOR70
-	add	x26, x26, :lo12:.LANCHOR70
+	adrp	x26, .LANCHOR76
+	add	x26, x26, :lo12:.LANCHOR76
 	mov	w25, 0
 	mov	w23, 0
 	ldrh	w28, [x0, 580]
-	ldr	x0, [x22, #:lo12:.LANCHOR110]
+	ldr	x0, [x22, #:lo12:.LANCHOR69]
 	ldrh	w27, [x0, 134]
 	adrp	x0, .LANCHOR8
 	add	x0, x0, :lo12:.LANCHOR8
 	str	x0, [x29, 136]
-	adrp	x0, .LANCHOR149
-	add	x0, x0, :lo12:.LANCHOR149
+	adrp	x0, .LANCHOR150
+	add	x0, x0, :lo12:.LANCHOR150
 	str	x0, [x29, 128]
-.L1379:
+.L1415:
 	ldr	x0, [x29, 136]
 	ldrh	w0, [x0]
 	cmp	w27, w0
-	bcc	.L1389
-.L1388:
+	bcc	.L1425
+.L1424:
 	ldr	x0, [x19, #:lo12:.LANCHOR12]
 	str	w28, [x0, 580]
-.L1378:
-	cbz	w21, .L1391
-	ldr	x2, [x22, #:lo12:.LANCHOR110]
+.L1414:
+	cbz	w21, .L1427
+	ldr	x2, [x22, #:lo12:.LANCHOR69]
 	adrp	x0, .LANCHOR8
 	ldrh	w5, [x0, #:lo12:.LANCHOR8]
 	ldr	x0, [x24, #:lo12:.LANCHOR9]
 	ldrh	w1, [x2, 134]
 	add	x0, x0, x1, uxth 2
-.L1392:
+.L1428:
 	cmp	w1, w5
-	bcc	.L1394
+	bcc	.L1430
 	ldrh	w0, [x2, 72]
 	add	w0, w21, w0
 	strh	w0, [x2, 72]
 	ldrh	w0, [x2, 98]
 	cmp	w21, w0
-	bcs	.L1391
+	bcs	.L1427
 	sub	w21, w0, w21
 	strh	w21, [x2, 98]
-.L1391:
-	cbz	w20, .L1397
-	ldr	x2, [x22, #:lo12:.LANCHOR110]
+.L1427:
+	cbz	w20, .L1433
+	ldr	x2, [x22, #:lo12:.LANCHOR69]
 	adrp	x0, .LANCHOR8
 	ldrh	w6, [x0, #:lo12:.LANCHOR8]
 	ldr	x0, [x24, #:lo12:.LANCHOR9]
 	ldrh	w1, [x2, 134]
 	add	x0, x0, x1, uxth 2
-.L1398:
+.L1434:
 	cmp	w1, w6
-	bcc	.L1400
+	bcc	.L1436
 	ldrh	w0, [x2, 74]
 	add	w0, w20, w0
 	strh	w0, [x2, 74]
 	ldrh	w0, [x2, 96]
 	cmp	w20, w0
-	bcs	.L1397
+	bcs	.L1433
 	sub	w20, w0, w20
 	strh	w20, [x2, 96]
-.L1397:
+.L1433:
 	mov	w1, 0
-	adrp	x0, .LANCHOR92
-	add	x0, x0, :lo12:.LANCHOR92
+	adrp	x0, .LANCHOR98
+	add	x0, x0, :lo12:.LANCHOR98
 	bl	_list_get_gc_head_node
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L1355
+	beq	.L1391
 	adrp	x2, .LANCHOR11
 	ubfiz	x1, x1, 1, 16
 	ldr	x3, [x2, #:lo12:.LANCHOR11]
-	adrp	x2, .LANCHOR94
-	ldrh	w2, [x2, #:lo12:.LANCHOR94]
+	adrp	x2, .LANCHOR100
+	ldrh	w2, [x2, #:lo12:.LANCHOR100]
 	ldrh	w1, [x3, x1]
 	cmp	w1, w2, lsr 1
-	bhi	.L1355
+	bhi	.L1391
 	add	w23, w23, 1
 	mov	w2, 1
 	mov	w1, 0
 	bl	gc_add_sblk
-.L1355:
+.L1391:
 	add	w0, w23, w25
-.L1350:
+.L1386:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -8632,7 +8784,7 @@ gc_static_wearleveling:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L1365:
+.L1401:
 	uxtw	x7, w28
 	ldr	x6, [x24, #:lo12:.LANCHOR9]
 	lsl	x2, x7, 2
@@ -8640,40 +8792,40 @@ gc_static_wearleveling:
 	ldrb	w0, [x11, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L1357
+	beq	.L1393
 	ubfx	x4, x0, 3, 2
-	tbz	x4, 0, .L1358
+	tbz	x4, 0, .L1394
 	ldr	w0, [x6, x2]
 	ldrh	w1, [x6, x2]
 	ubfx	x0, x0, 11, 8
 	and	w1, w1, 2047
-.L1359:
+.L1395:
 	ldr	w3, [x29, 136]
 	add	w26, w26, 1
 	and	w26, w26, 65535
 	cmp	w20, w1
 	add	w3, w3, w1
 	str	w3, [x29, 136]
-	bls	.L1403
+	bls	.L1439
 	ldr	x3, [x19, #:lo12:.LANCHOR12]
 	mov	w20, w1
 	strh	w28, [x3, 586]
-.L1403:
+.L1439:
 	ldr	w3, [x29, 148]
 	cmp	w3, w1
-	bcs	.L1362
+	bcs	.L1398
 	mov	w27, w28
 	str	w1, [x29, 148]
-.L1362:
+.L1398:
 	mov	w3, 65535
 	cmp	w0, w3
-	bne	.L1361
-.L1363:
+	bne	.L1397
+.L1399:
 	cmp	w0, 9
 	ccmp	w1, 9, 0, hi
-	bhi	.L1357
+	bhi	.L1393
 	ldr	w0, [x8]
-	tbz	x0, 8, .L1357
+	tbz	x0, 8, .L1393
 	adrp	x0, .LANCHOR11
 	ldr	w3, [x6, x2]
 	ldrh	w2, [x6, x2]
@@ -8685,84 +8837,84 @@ gc_static_wearleveling:
 	and	w2, w2, 2047
 	str	x8, [x29, 120]
 	ldrh	w7, [x0, x7, lsl 1]
-	adrp	x0, .LC82
+	adrp	x0, .LC79
 	str	x10, [x29, 152]
 	ubfx	x5, x5, 5, 3
-	add	x0, x0, :lo12:.LC82
+	add	x0, x0, :lo12:.LC79
 	bl	printf
 	ldr	x8, [x29, 120]
 	ldr	x10, [x29, 152]
-.L1357:
+.L1393:
 	add	w28, w28, 1
 	and	w28, w28, 65535
-	b	.L1356
-.L1358:
+	b	.L1392
+.L1394:
 	tst	w0, 24
-	bne	.L1360
+	bne	.L1396
 	ldrh	w1, [x6, x2]
 	mov	w0, 65535
 	and	w1, w1, 2047
-	b	.L1359
-.L1360:
+	b	.L1395
+.L1396:
 	ldr	w0, [x6, x2]
 	mov	w1, 65535
 	ubfx	x0, x0, 11, 8
-.L1361:
+.L1397:
 	ldr	w3, [x29, 144]
 	add	w25, w25, 1
 	and	w25, w25, 65535
 	cmp	w21, w0
 	add	w3, w3, w0
 	str	w3, [x29, 144]
-	bls	.L1364
+	bls	.L1400
 	ldr	x3, [x19, #:lo12:.LANCHOR12]
 	mov	w21, w0
 	strh	w28, [x3, 584]
-.L1364:
+.L1400:
 	cmp	w23, w0
-	bcs	.L1363
+	bcs	.L1399
 	mov	w23, w0
 	str	w28, [x29, 128]
-	b	.L1363
-.L1369:
-	cbnz	w3, .L1368
+	b	.L1399
+.L1405:
+	cbnz	w3, .L1404
 	ldr	x1, [x19, #:lo12:.LANCHOR12]
 	mov	w0, 65535
 	ldrh	w2, [x1, 590]
 	cmp	w2, w0
-	bne	.L1368
+	bne	.L1404
 	ldrh	w0, [x1, 586]
 	ldrh	w1, [x1, 588]
 	cmp	w1, w0
-	beq	.L1368
+	beq	.L1404
 	bl	zftl_remove_free_node
 	ldr	x0, [x19, #:lo12:.LANCHOR12]
 	ldrh	w1, [x0, 586]
 	strh	w1, [x0, 590]
 	mov	w1, -1
 	strh	w1, [x0, 586]
-	b	.L1368
-.L1372:
+	b	.L1404
+.L1408:
 	and	w0, w0, 248
 	cmp	w0, 16
-	bne	.L1371
+	bne	.L1407
 	ldr	x1, [x19, #:lo12:.LANCHOR12]
 	mov	w0, 65535
 	ldrh	w2, [x1, 588]
 	cmp	w2, w0
-	bne	.L1371
+	bne	.L1407
 	ldrh	w0, [x1, 584]
 	ldrh	w1, [x1, 590]
 	cmp	w1, w0
-	beq	.L1371
+	beq	.L1407
 	bl	zftl_remove_free_node
 	ldr	x0, [x19, #:lo12:.LANCHOR12]
 	ldrh	w1, [x0, 584]
 	strh	w1, [x0, 588]
 	mov	w1, -1
 	strh	w1, [x0, 584]
-	b	.L1371
-.L1389:
+	b	.L1407
+.L1425:
 	add	w7, w28, 1
 	ldr	x4, [x24, #:lo12:.LANCHOR9]
 	and	w28, w7, 65535
@@ -8773,31 +8925,31 @@ gc_static_wearleveling:
 	add	x0, x4, x3
 	ldrb	w0, [x0, 2]
 	tst	w0, 192
-	beq	.L1381
+	beq	.L1417
 	and	w2, w0, 224
 	cmp	w2, 224
-	beq	.L1381
+	beq	.L1417
 	ubfx	x0, x0, 3, 2
 	and	w1, w0, 1
-	tbz	x0, 0, .L1382
+	tbz	x0, 0, .L1418
 	cmp	w2, 160
-.L1469:
-	bne	.L1384
-	adrp	x0, .LANCHOR150
+.L1505:
+	bne	.L1420
+	adrp	x0, .LANCHOR151
 	ldr	w2, [x29, 144]
-	ldrh	w0, [x0, #:lo12:.LANCHOR150]
+	ldrh	w0, [x0, #:lo12:.LANCHOR151]
 	cmp	w2, w0
-	ble	.L1385
+	ble	.L1421
 	ldr	w0, [x4, x3]
 	ubfx	x0, x0, 11, 8
 	cmp	w0, w21
-	bls	.L1386
-	cbz	w1, .L1385
+	bls	.L1422
+	cbz	w1, .L1421
 	ldrh	w0, [x4, x3]
 	and	w0, w0, 2047
 	cmp	w0, w20
-	bgt	.L1385
-.L1386:
+	bgt	.L1421
+.L1422:
 	stp	x4, x8, [x29, 104]
 	mov	w2, 1
 	str	x3, [x29, 120]
@@ -8811,7 +8963,7 @@ gc_static_wearleveling:
 	ldp	x4, x8, [x29, 104]
 	ldr	x3, [x29, 120]
 	ldr	w0, [x0, #:lo12:.LANCHOR19]
-	tbz	x0, 10, .L1385
+	tbz	x0, 10, .L1421
 	adrp	x0, .LANCHOR11
 	ldr	w6, [x4, x3]
 	ldrh	w5, [x4, x3]
@@ -8821,44 +8973,44 @@ gc_static_wearleveling:
 	ldrh	w4, [x26, 56]
 	and	w5, w5, 2047
 	add	x3, x0, x3
-	adrp	x0, .LC89
-	add	x0, x0, :lo12:.LC89
+	adrp	x0, .LC86
+	add	x0, x0, :lo12:.LC86
 	ldrb	w2, [x3, 2]
 	ldrh	w3, [x1, x8, lsl 1]
 	mov	w1, w28
 	ubfx	x2, x2, 5, 3
-.L1470:
+.L1506:
 	bl	printf
-.L1385:
+.L1421:
 	cmp	w23, 4
 	ccmp	w25, 4, 2, ls
-	bhi	.L1388
-.L1381:
+	bhi	.L1424
+.L1417:
 	add	w27, w27, 1
 	and	w27, w27, 65535
-	b	.L1379
-.L1382:
+	b	.L1415
+.L1418:
 	cmp	w0, 2
-	b	.L1469
-.L1384:
+	b	.L1505
+.L1420:
 	ldr	x2, [x29, 128]
 	ldr	w0, [x29, 148]
 	sub	w0, w0, w20
 	ldrh	w2, [x2]
 	cmp	w0, w2
-	ble	.L1385
+	ble	.L1421
 	ldrh	w0, [x4, x3]
 	add	w2, w20, 8
 	and	w0, w0, 2047
 	cmp	w0, w2
-	ble	.L1387
-	cbz	w1, .L1385
+	ble	.L1423
+	cbz	w1, .L1421
 	ldr	w0, [x4, x3]
 	add	w1, w21, 4
 	ubfx	x0, x0, 11, 8
 	cmp	w0, w1
-	bgt	.L1385
-.L1387:
+	bgt	.L1421
+.L1423:
 	stp	x4, x8, [x29, 104]
 	mov	w2, 1
 	str	x3, [x29, 120]
@@ -8872,7 +9024,7 @@ gc_static_wearleveling:
 	ldp	x4, x8, [x29, 104]
 	ldr	x3, [x29, 120]
 	ldr	w0, [x0, #:lo12:.LANCHOR19]
-	tbz	x0, 10, .L1385
+	tbz	x0, 10, .L1421
 	adrp	x0, .LANCHOR11
 	ldr	w6, [x4, x3]
 	ldrh	w5, [x4, x3]
@@ -8882,57 +9034,57 @@ gc_static_wearleveling:
 	and	w5, w5, 2047
 	ldrh	w4, [x26, 56]
 	add	x3, x0, x3
-	adrp	x0, .LC90
-	add	x0, x0, :lo12:.LC90
+	adrp	x0, .LC87
+	add	x0, x0, :lo12:.LC87
 	ldrb	w2, [x3, 2]
 	ldrh	w3, [x1, x8, lsl 1]
 	mov	w1, w28
 	ubfx	x2, x2, 5, 3
-	b	.L1470
-.L1406:
+	b	.L1506
+.L1442:
 	mov	w25, 0
 	mov	w23, 0
-	b	.L1378
-.L1394:
+	b	.L1414
+.L1430:
 	ldr	w3, [x0]
 	ubfx	x4, x3, 11, 8
 	cmp	w21, w4
-	bhi	.L1393
+	bhi	.L1429
 	ldrb	w6, [x0, 2]
 	tst	w6, 24
-	beq	.L1393
+	beq	.L1429
 	sub	w4, w4, w21
 	bfi	w3, w4, 11, 8
 	str	w3, [x0]
-.L1393:
+.L1429:
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 65535
-	b	.L1392
-.L1400:
+	b	.L1428
+.L1436:
 	ldrh	w3, [x0]
 	and	w4, w3, 2047
 	cmp	w4, w20
-	blt	.L1399
+	blt	.L1435
 	ldrb	w5, [x0, 2]
 	and	w5, w5, 24
 	cmp	w5, 16
-	beq	.L1399
+	beq	.L1435
 	sub	w4, w4, w20
 	bfi	w3, w4, 0, 11
 	strh	w3, [x0]
-.L1399:
+.L1435:
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 65535
-	b	.L1398
-.L1405:
+	b	.L1434
+.L1441:
 	mov	w25, 0
 	mov	w23, 0
-	b	.L1355
-.L1404:
+	b	.L1391
+.L1440:
 	mov	w0, 0
-	b	.L1350
+	b	.L1386
 	.size	gc_static_wearleveling, .-gc_static_wearleveling
 	.section	.text.zftl_sblk_list_init,"ax",@progbits
 	.align	2
@@ -8947,60 +9099,60 @@ zftl_sblk_list_init:
 	stp	x27, x28, [sp, 80]
 	adrp	x28, .LANCHOR8
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR99
+	adrp	x20, .LANCHOR105
 	ldrh	w2, [x28, #:lo12:.LANCHOR8]
 	mov	w27, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR97
+	adrp	x22, .LANCHOR103
 	stp	x23, x24, [sp, 48]
-	adrp	x21, .LANCHOR91
+	adrp	x21, .LANCHOR97
 	stp	x25, x26, [sp, 64]
-	adrp	x26, .LANCHOR110
+	adrp	x26, .LANCHOR69
 	mul	w2, w2, w0
 	ldr	x0, [x8, #:lo12:.LANCHOR4]
 	str	x8, [x29, 192]
-	adrp	x25, .LANCHOR103
-	adrp	x24, .LANCHOR105
-	adrp	x23, .LANCHOR107
+	adrp	x25, .LANCHOR109
+	adrp	x24, .LANCHOR111
+	adrp	x23, .LANCHOR113
 	bl	ftl_memset
-	strh	wzr, [x25, #:lo12:.LANCHOR103]
-	adrp	x0, .LANCHOR109
-	adrp	x3, .LANCHOR79
-	adrp	x2, .LANCHOR85
+	strh	wzr, [x25, #:lo12:.LANCHOR109]
+	adrp	x0, .LANCHOR115
+	adrp	x3, .LANCHOR85
+	adrp	x2, .LANCHOR91
 	mov	w1, 32
-	strh	w1, [x0, #:lo12:.LANCHOR109]
-	adrp	x11, .LANCHOR104
-	ldrb	w0, [x3, #:lo12:.LANCHOR79]
-	adrp	x10, .LANCHOR106
-	ldrh	w1, [x2, #:lo12:.LANCHOR85]
-	adrp	x7, .LANCHOR108
-	adrp	x6, .LANCHOR90
-	adrp	x5, .LANCHOR95
-	adrp	x4, .LANCHOR92
+	strh	w1, [x0, #:lo12:.LANCHOR115]
+	adrp	x11, .LANCHOR110
+	ldrb	w0, [x3, #:lo12:.LANCHOR85]
+	adrp	x10, .LANCHOR112
+	ldrh	w1, [x2, #:lo12:.LANCHOR91]
+	adrp	x7, .LANCHOR114
+	adrp	x6, .LANCHOR96
+	adrp	x5, .LANCHOR101
+	adrp	x4, .LANCHOR98
 	ldr	x8, [x29, 192]
-	str	xzr, [x11, #:lo12:.LANCHOR104]
+	str	xzr, [x11, #:lo12:.LANCHOR110]
 	mul	w1, w0, w1
 	mov	w0, 32768
-	str	xzr, [x10, #:lo12:.LANCHOR106]
-	str	xzr, [x7, #:lo12:.LANCHOR108]
-	str	xzr, [x6, #:lo12:.LANCHOR90]
+	str	xzr, [x10, #:lo12:.LANCHOR112]
+	str	xzr, [x7, #:lo12:.LANCHOR114]
+	str	xzr, [x6, #:lo12:.LANCHOR96]
 	sdiv	w0, w0, w1
-	str	xzr, [x5, #:lo12:.LANCHOR95]
-	str	xzr, [x4, #:lo12:.LANCHOR92]
-	strh	wzr, [x24, #:lo12:.LANCHOR105]
-	strh	wzr, [x23, #:lo12:.LANCHOR107]
+	str	xzr, [x5, #:lo12:.LANCHOR101]
+	str	xzr, [x4, #:lo12:.LANCHOR98]
+	strh	wzr, [x24, #:lo12:.LANCHOR111]
+	strh	wzr, [x23, #:lo12:.LANCHOR113]
 	sxth	w0, w0
 	str	w0, [x29, 204]
-	ldr	x0, [x26, #:lo12:.LANCHOR110]
-	strh	wzr, [x22, #:lo12:.LANCHOR97]
-	strh	wzr, [x21, #:lo12:.LANCHOR91]
-	strh	wzr, [x20, #:lo12:.LANCHOR99]
+	ldr	x0, [x26, #:lo12:.LANCHOR69]
+	strh	wzr, [x22, #:lo12:.LANCHOR103]
+	strh	wzr, [x21, #:lo12:.LANCHOR97]
+	strh	wzr, [x20, #:lo12:.LANCHOR105]
 	strh	wzr, [x0, 146]
 	ldrsh	w19, [x0, 134]
 	add	x0, x28, :lo12:.LANCHOR8
 	str	x0, [x29, 192]
-	adrp	x0, .LANCHOR151
-	add	x0, x0, :lo12:.LANCHOR151
+	adrp	x0, .LANCHOR152
+	add	x0, x0, :lo12:.LANCHOR152
 	adrp	x28, .LC0
 	str	x0, [x29, 112]
 	add	x0, x28, :lo12:.LC0
@@ -9010,24 +9162,24 @@ zftl_sblk_list_init:
 	stp	x10, x11, [x29, 168]
 	str	x8, [x29, 184]
 	str	x0, [x29, 104]
-.L1472:
+.L1508:
 	ldr	x0, [x29, 192]
 	ldrh	w0, [x0]
 	cmp	w19, w0
-	blt	.L1489
-	ldr	x0, [x26, #:lo12:.LANCHOR110]
-	ldrh	w1, [x25, #:lo12:.LANCHOR103]
+	blt	.L1525
+	ldr	x0, [x26, #:lo12:.LANCHOR69]
+	ldrh	w1, [x25, #:lo12:.LANCHOR109]
 	ldp	x27, x28, [sp, 80]
 	strh	w1, [x0, 114]
-	ldrh	w1, [x24, #:lo12:.LANCHOR105]
+	ldrh	w1, [x24, #:lo12:.LANCHOR111]
 	strh	w1, [x0, 118]
-	ldrh	w1, [x23, #:lo12:.LANCHOR107]
+	ldrh	w1, [x23, #:lo12:.LANCHOR113]
 	strh	w1, [x0, 116]
-	ldrh	w1, [x22, #:lo12:.LANCHOR97]
+	ldrh	w1, [x22, #:lo12:.LANCHOR103]
 	strh	w1, [x0, 122]
-	ldrh	w1, [x21, #:lo12:.LANCHOR91]
+	ldrh	w1, [x21, #:lo12:.LANCHOR97]
 	strh	w1, [x0, 120]
-	ldrh	w1, [x20, #:lo12:.LANCHOR99]
+	ldrh	w1, [x20, #:lo12:.LANCHOR105]
 	strh	w1, [x0, 124]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9035,29 +9187,29 @@ zftl_sblk_list_init:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 208
 	ret
-.L1489:
+.L1525:
 	adrp	x0, .LANCHOR9
 	sxtw	x2, w19
 	ldr	x3, [x0, #:lo12:.LANCHOR9]
 	add	x28, x3, x2, lsl 2
 	ldrb	w5, [x28, 3]
-	cbz	w5, .L1490
+	cbz	w5, .L1526
 	ldr	x0, [x29, 128]
 	mov	w1, 0
-	ldr	x6, [x26, #:lo12:.LANCHOR110]
-	ldrb	w7, [x0, #:lo12:.LANCHOR79]
+	ldr	x6, [x26, #:lo12:.LANCHOR69]
+	ldrb	w7, [x0, #:lo12:.LANCHOR85]
 	ldr	x0, [x29, 120]
-	ldrh	w8, [x0, #:lo12:.LANCHOR85]
+	ldrh	w8, [x0, #:lo12:.LANCHOR91]
 	mov	w0, 0
-.L1474:
+.L1510:
 	cmp	w1, w7
-	blt	.L1477
-	cbz	w0, .L1478
+	blt	.L1513
+	cbz	w0, .L1514
 	mov	w1, 32768
 	sdiv	w0, w1, w0
 	add	w0, w0, 1
 	sxth	w0, w0
-.L1473:
+.L1509:
 	ldr	x3, [x29, 184]
 	mov	w1, 6
 	smull	x1, w19, w1
@@ -9072,44 +9224,44 @@ zftl_sblk_list_init:
 	and	w0, w0, 224
 	cmp	w0, 32
 	ccmp	w0, w1, 4, ne
-	beq	.L1479
+	beq	.L1515
 	adrp	x1, .LANCHOR12
 	ldr	x1, [x1, #:lo12:.LANCHOR12]
 	ldrh	w4, [x1, 16]
 	cmp	w19, w4
-	beq	.L1479
+	beq	.L1515
 	ldrh	w4, [x1, 48]
 	cmp	w19, w4
-	beq	.L1479
+	beq	.L1515
 	ldrh	w1, [x1, 80]
 	cmp	w19, w1
-	beq	.L1479
+	beq	.L1515
 	cmp	w0, 64
-	bne	.L1480
+	bne	.L1516
 	ldr	x0, [x29, 144]
-	add	x2, x22, :lo12:.LANCHOR97
+	add	x2, x22, :lo12:.LANCHOR103
 	mov	w1, w19
-	add	x0, x0, :lo12:.LANCHOR95
-.L1496:
+	add	x0, x0, :lo12:.LANCHOR101
+.L1532:
 	bl	_insert_data_list
-.L1479:
+.L1515:
 	add	w19, w19, 1
 	sxth	w19, w19
-	b	.L1472
-.L1477:
+	b	.L1508
+.L1513:
 	asr	w4, w5, w1
-	tbnz	x4, 0, .L1475
+	tbnz	x4, 0, .L1511
 	add	w0, w8, w0
 	sxth	w0, w0
-.L1476:
+.L1512:
 	add	w1, w1, 1
-	b	.L1474
-.L1475:
+	b	.L1510
+.L1511:
 	ldrh	w4, [x6, 146]
 	add	w4, w4, 1
 	strh	w4, [x6, 146]
-	b	.L1476
-.L1478:
+	b	.L1512
+.L1514:
 	ldrb	w1, [x28, 2]
 	mov	w4, -1
 	orr	w1, w1, -32
@@ -9117,134 +9269,219 @@ zftl_sblk_list_init:
 	adrp	x1, .LANCHOR11
 	ldr	x1, [x1, #:lo12:.LANCHOR11]
 	strh	w4, [x1, x2, lsl 1]
-	b	.L1473
-.L1490:
+	b	.L1509
+.L1526:
 	ldr	w0, [x29, 204]
-	b	.L1473
-.L1480:
+	b	.L1509
+.L1516:
 	cmp	w0, 96
-	bne	.L1481
+	bne	.L1517
 	ldr	x0, [x29, 152]
-	add	x2, x20, :lo12:.LANCHOR99
+	add	x2, x20, :lo12:.LANCHOR105
 	mov	w1, w19
-	add	x0, x0, :lo12:.LANCHOR90
-	b	.L1496
-.L1481:
+	add	x0, x0, :lo12:.LANCHOR96
+	b	.L1532
+.L1517:
 	cmp	w0, 160
-	bne	.L1482
+	bne	.L1518
 	ldr	x0, [x29, 136]
-	add	x2, x21, :lo12:.LANCHOR91
+	add	x2, x21, :lo12:.LANCHOR97
 	mov	w1, w19
-	add	x0, x0, :lo12:.LANCHOR92
-	b	.L1496
-.L1482:
-	cbnz	w0, .L1479
+	add	x0, x0, :lo12:.LANCHOR98
+	b	.L1532
+.L1518:
+	cbnz	w0, .L1515
 	adrp	x0, .LANCHOR11
 	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrh	w2, [x0, x2, lsl 1]
-	cbz	w2, .L1483
+	cbz	w2, .L1519
 	cmp	w27, 2
-	bgt	.L1484
+	bgt	.L1520
 	mov	w1, w19
-	adrp	x0, .LC91
-	add	x0, x0, :lo12:.LC91
+	adrp	x0, .LC88
+	add	x0, x0, :lo12:.LC88
 	bl	printf
 	ldrb	w0, [x28, 2]
 	add	w27, w27, 1
 	sxth	w27, w27
-	tbz	x0, 4, .L1485
+	tbz	x0, 4, .L1521
 	mov	w1, 5
-.L1495:
+.L1531:
 	bfi	w0, w1, 5, 3
 	strb	w0, [x28, 2]
 	mov	w2, 0
 	mov	w1, 1
 	mov	w0, w19
 	bl	gc_add_sblk
-	b	.L1479
-.L1485:
+	b	.L1515
+.L1521:
 	mov	w1, 2
-	b	.L1495
-.L1484:
+	b	.L1531
+.L1520:
 	ldp	x0, x1, [x29, 104]
 	mov	w2, 656
 	bl	printf
-.L1483:
+.L1519:
 	ldrb	w0, [x28, 2]
 	ands	w0, w0, 24
-	bne	.L1487
+	bne	.L1523
 	ldr	x0, [x29, 176]
-	add	x2, x25, :lo12:.LANCHOR103
+	add	x2, x25, :lo12:.LANCHOR109
 	mov	w1, w19
-	add	x0, x0, :lo12:.LANCHOR104
-.L1497:
+	add	x0, x0, :lo12:.LANCHOR110
+.L1533:
 	bl	_insert_free_list
-	b	.L1479
-.L1487:
+	b	.L1515
+.L1523:
 	cmp	w0, 16
-	bne	.L1488
+	bne	.L1524
 	ldr	x0, [x29, 168]
-	add	x2, x24, :lo12:.LANCHOR105
+	add	x2, x24, :lo12:.LANCHOR111
 	mov	w1, w19
-	add	x0, x0, :lo12:.LANCHOR106
-	b	.L1497
-.L1488:
+	add	x0, x0, :lo12:.LANCHOR112
+	b	.L1533
+.L1524:
 	ldr	x0, [x29, 160]
-	add	x2, x23, :lo12:.LANCHOR107
+	add	x2, x23, :lo12:.LANCHOR113
 	mov	w1, w19
-	add	x0, x0, :lo12:.LANCHOR108
-	b	.L1497
+	add	x0, x0, :lo12:.LANCHOR114
+	b	.L1533
 	.size	zftl_sblk_list_init, .-zftl_sblk_list_init
+	.section	.text.ftl_open_sblk_init,"ax",@progbits
+	.align	2
+	.global	ftl_open_sblk_init
+	.type	ftl_open_sblk_init, %function
+ftl_open_sblk_init:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR85
+	stp	x23, x24, [sp, 48]
+	adrp	x22, .LC75
+	stp	x19, x20, [sp, 16]
+	adrp	x24, .LANCHOR100
+	mov	x19, x0
+	mov	w23, w1
+	add	x24, x24, :lo12:.LANCHOR100
+	add	x21, x21, :lo12:.LANCHOR85
+	add	x22, x22, :lo12:.LC75
+	stp	x25, x26, [sp, 64]
+.L1535:
+	mov	w25, 65535
+.L1536:
+	mov	w0, w23
+	bl	ftl_alloc_sblk
+	and	w20, w0, 65535
+	cmp	w20, w25
+	beq	.L1536
+	mov	w1, 0
+	mov	w0, w20
+	bl	ftl_erase_sblk
+	add	x1, x19, 16
+	mov	w0, w20
+	bl	ftl_get_blk_list_in_sblk
+	and	w0, w0, 255
+	ldrh	w1, [x24]
+	cmp	w23, 2
+	strb	w0, [x19, 9]
+	strh	w20, [x19]
+	strh	wzr, [x19, 2]
+	mul	w0, w1, w0
+	strb	wzr, [x19, 5]
+	strh	w0, [x19, 6]
+	strh	wzr, [x19, 10]
+	strb	w23, [x19, 4]
+	beq	.L1539
+	ldrb	w0, [x21]
+	mul	w0, w1, w0
+	and	w0, w0, 65535
+.L1537:
+	ldrb	w2, [x21]
+	adrp	x26, .LANCHOR11
+	strh	w0, [x19, 12]
+	ubfiz	x25, x20, 1, 16
+	mul	w2, w2, w1
+	adrp	x1, .LANCHOR123
+	ldr	x3, [x1, #:lo12:.LANCHOR123]
+	mov	w1, 255
+	lsl	w2, w2, 2
+	add	x0, x3, x0, uxth 2
+	bl	ftl_memset
+	ldr	x0, [x26, #:lo12:.LANCHOR11]
+	ldrh	w1, [x19, 6]
+	strh	w1, [x0, x25]
+	ldrb	w0, [x19, 9]
+	cbnz	w0, .L1534
+	mov	w1, w20
+	mov	x0, x22
+	bl	printf
+	ldr	x0, [x26, #:lo12:.LANCHOR11]
+	mov	w1, -1
+	strh	w1, [x0, x25]
+	mov	w0, 7
+	strb	w0, [x19, 4]
+	b	.L1535
+.L1539:
+	mov	w0, 0
+	b	.L1537
+.L1534:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+	.size	ftl_open_sblk_init, .-ftl_open_sblk_init
 	.section	.text.pm_free_sblk,"ax",@progbits
 	.align	2
 	.global	pm_free_sblk
 	.type	pm_free_sblk, %function
 pm_free_sblk:
 	stp	x29, x30, [sp, -384]!
-	adrp	x0, .LANCHOR152
+	adrp	x0, .LANCHOR153
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	ldrh	w1, [x0, #:lo12:.LANCHOR152]
+	ldrh	w1, [x0, #:lo12:.LANCHOR153]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	cmp	w1, 128
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	bls	.L1499
-	adrp	x1, .LANCHOR153
+	bls	.L1543
+	adrp	x1, .LANCHOR154
 	adrp	x0, .LC0
 	mov	w2, 94
-	add	x1, x1, :lo12:.LANCHOR153
+	add	x1, x1, :lo12:.LANCHOR154
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1499:
-	adrp	x5, .LANCHOR110
+.L1543:
+	adrp	x5, .LANCHOR69
 	mov	x26, x5
-	ldrh	w3, [x19, #:lo12:.LANCHOR152]
+	ldrh	w3, [x19, #:lo12:.LANCHOR153]
 	mov	w1, 0
-	ldr	x0, [x5, #:lo12:.LANCHOR110]
+	ldr	x0, [x5, #:lo12:.LANCHOR69]
 	mov	w19, 0
 	mov	w4, 65535
 	add	x0, x0, 416
 	ldrh	w2, [x0, 272]
-.L1502:
+.L1546:
 	ldrh	w6, [x0]
 	cmp	w6, w4
-	beq	.L1500
+	beq	.L1544
 	add	w1, w1, 1
 	and	w1, w1, 65535
-.L1500:
+.L1544:
 	cmp	w1, w2
-	bcs	.L1501
+	bcs	.L1545
 	cmp	w1, w3
-	bcs	.L1501
+	bcs	.L1545
 	add	w19, w19, 1
 	add	x0, x0, 2
 	and	w19, w19, 65535
 	cmp	w19, 128
-	bne	.L1502
-.L1501:
+	bne	.L1546
+.L1545:
 	add	w19, w19, 1
 	mov	w0, 128
 	and	w19, w19, 65535
@@ -9254,13 +9491,13 @@ pm_free_sblk:
 	csel	w19, w19, w0, ne
 	mov	w1, 0
 	mov	x0, x22
-	adrp	x23, .LANCHOR75
+	adrp	x23, .LANCHOR81
 	bl	ftl_memset
-	adrp	x0, .LANCHOR74
-	ldr	x6, [x26, #:lo12:.LANCHOR110]
+	adrp	x0, .LANCHOR80
+	ldr	x6, [x26, #:lo12:.LANCHOR69]
 	mov	w2, 24
-	ldrb	w11, [x23, #:lo12:.LANCHOR75]
-	ldrh	w10, [x0, #:lo12:.LANCHOR74]
+	ldrb	w11, [x23, #:lo12:.LANCHOR81]
+	ldrh	w10, [x0, #:lo12:.LANCHOR80]
 	adrp	x0, .LANCHOR31
 	add	x4, x6, 704
 	ldrb	w0, [x0, #:lo12:.LANCHOR31]
@@ -9272,25 +9509,25 @@ pm_free_sblk:
 	add	x1, x6, x1, lsl 2
 	lsl	w2, w2, w0
 	sub	w2, w2, #1
-.L1504:
+.L1548:
 	cmp	x1, x4
-	bne	.L1507
-	adrp	x24, .LANCHOR79
-	adrp	x25, .LANCHOR94
-	adrp	x27, .LC92
+	bne	.L1551
+	adrp	x24, .LANCHOR85
+	adrp	x25, .LANCHOR100
+	adrp	x27, .LC89
 	adrp	x28, .LANCHOR19
-	ldrb	w21, [x24, #:lo12:.LANCHOR79]
-	add	x23, x23, :lo12:.LANCHOR75
-	ldrh	w0, [x25, #:lo12:.LANCHOR94]
-	add	x27, x27, :lo12:.LC92
+	ldrb	w21, [x24, #:lo12:.LANCHOR85]
+	add	x23, x23, :lo12:.LANCHOR81
+	ldrh	w0, [x25, #:lo12:.LANCHOR100]
+	add	x27, x27, :lo12:.LC89
 	add	x28, x28, :lo12:.LANCHOR19
 	mov	x20, 0
 	mov	w7, 65535
 	str	wzr, [x29, 124]
 	mul	w21, w21, w0
 	and	w21, w21, 65535
-.L1513:
-	ldr	x0, [x26, #:lo12:.LANCHOR110]
+.L1557:
+	ldr	x0, [x26, #:lo12:.LANCHOR69]
 	and	w6, w20, 65535
 	ldrb	w2, [x23]
 	mov	w8, w20
@@ -9299,27 +9536,27 @@ pm_free_sblk:
 	ldrh	w1, [x0, 692]
 	sdiv	w1, w1, w2
 	cmp	w1, w3
-	bne	.L1508
-	ldrb	w1, [x24, #:lo12:.LANCHOR79]
-	ldrh	w2, [x25, #:lo12:.LANCHOR94]
+	bne	.L1552
+	ldrb	w1, [x24, #:lo12:.LANCHOR85]
+	ldrh	w2, [x25, #:lo12:.LANCHOR100]
 	mul	w1, w1, w2
 	strh	w1, [x22, x20, lsl 1]
-.L1508:
+.L1552:
 	ldrh	w2, [x22, x20, lsl 1]
 	cmp	w2, w21
-	bcs	.L1509
+	bcs	.L1553
 	cmp	w2, 0
 	ldr	w1, [x29, 124]
 	csel	w21, w21, w2, eq
 	csel	w1, w1, w6, eq
 	str	w1, [x29, 124]
-.L1509:
+.L1553:
 	ldrh	w1, [x0, 74]
 	cmp	w1, 2
-	bls	.L1510
+	bls	.L1554
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L1510
+	beq	.L1554
 	adrp	x4, .LANCHOR9
 	ubfiz	x1, x3, 2, 16
 	ldrh	w0, [x0, 92]
@@ -9328,7 +9565,7 @@ pm_free_sblk:
 	ldrh	w4, [x4, x1]
 	and	w4, w4, 2047
 	cmp	w4, w0
-	bgt	.L1510
+	bgt	.L1554
 	mov	w1, w8
 	str	w6, [x29, 104]
 	str	w8, [x29, 112]
@@ -9337,36 +9574,36 @@ pm_free_sblk:
 	ldr	w6, [x29, 104]
 	ldr	w8, [x29, 112]
 	mov	w7, w6
-.L1510:
+.L1554:
 	ldrh	w0, [x22, x20, lsl 1]
-	cbnz	w0, .L1511
-	ldr	x0, [x26, #:lo12:.LANCHOR110]
+	cbnz	w0, .L1555
+	ldr	x0, [x26, #:lo12:.LANCHOR69]
 	sxtw	x6, w8
 	add	x1, x6, 208
 	ldrh	w3, [x0, x1, lsl 1]
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L1511
+	beq	.L1555
 	ldr	w1, [x28]
-	tbz	x1, 12, .L1512
+	tbz	x1, 12, .L1556
 	ldrh	w4, [x0, 688]
 	mov	w2, 0
 	str	x6, [x29, 104]
 	mov	w1, w8
 	str	w7, [x29, 112]
-	adrp	x0, .LC93
-	add	x0, x0, :lo12:.LC93
+	adrp	x0, .LC90
+	add	x0, x0, :lo12:.LC90
 	bl	printf
 	ldr	w7, [x29, 112]
 	ldr	x6, [x29, 104]
-.L1512:
-	ldr	x0, [x26, #:lo12:.LANCHOR110]
+.L1556:
+	ldr	x0, [x26, #:lo12:.LANCHOR69]
 	add	x6, x6, 208
 	str	w7, [x29, 104]
 	str	x6, [x29, 112]
 	ldrh	w0, [x0, x6, lsl 1]
 	bl	ftl_free_sblk
-	ldr	x0, [x26, #:lo12:.LANCHOR110]
+	ldr	x0, [x26, #:lo12:.LANCHOR69]
 	mov	w1, -1
 	ldr	x6, [x29, 112]
 	ldr	w7, [x29, 104]
@@ -9374,10 +9611,10 @@ pm_free_sblk:
 	ldrh	w1, [x0, 688]
 	sub	w1, w1, #1
 	strh	w1, [x0, 688]
-.L1511:
+.L1555:
 	add	x20, x20, 1
 	cmp	w19, w20, uxth
-	bhi	.L1513
+	bhi	.L1557
 	mov	w0, 65535
 	cmp	w7, w0
 	ldr	w0, [x29, 124]
@@ -9389,7 +9626,7 @@ pm_free_sblk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 384
 	ret
-.L1507:
+.L1551:
 	ldr	w0, [x4]
 	add	x7, x6, 416
 	mov	x3, 0
@@ -9397,20 +9634,20 @@ pm_free_sblk:
 	and	w0, w0, w2
 	udiv	w0, w0, w11
 	and	w0, w0, 65535
-.L1506:
+.L1550:
 	ldrh	w8, [x7]
 	cmp	w8, w0
-	bne	.L1505
+	bne	.L1549
 	ldrh	w8, [x22, x3, lsl 1]
 	add	w8, w8, 1
 	strh	w8, [x22, x3, lsl 1]
-.L1505:
+.L1549:
 	add	x3, x3, 1
 	add	x7, x7, 2
 	cmp	w19, w3, uxth
-	bhi	.L1506
+	bhi	.L1550
 	add	x4, x4, 4
-	b	.L1504
+	b	.L1548
 	.size	pm_free_sblk, .-pm_free_sblk
 	.section	.text.ftl_memcpy,"ax",@progbits
 	.align	2
@@ -9430,14 +9667,14 @@ flash_info_data_init:
 	add	x29, sp, 0
 	ldr	w0, [x0, #:lo12:.LANCHOR19]
 	str	x19, [sp, 16]
-	tbz	x0, 12, .L1526
-	adrp	x2, .LANCHOR154
-	adrp	x0, .LC94
-	add	x2, x2, :lo12:.LANCHOR154
+	tbz	x0, 12, .L1570
+	adrp	x2, .LANCHOR155
+	adrp	x0, .LC91
+	add	x2, x2, :lo12:.LANCHOR155
 	mov	w1, 120
-	add	x0, x0, :lo12:.LC94
+	add	x0, x0, :lo12:.LC91
 	bl	printf
-.L1526:
+.L1570:
 	adrp	x19, .LANCHOR6
 	mov	w2, 2048
 	mov	w1, 0
@@ -9471,15 +9708,15 @@ flash_info_data_init:
 	.type	ftl_memcpy32, %function
 ftl_memcpy32:
 	mov	x3, 0
-.L1532:
+.L1576:
 	cmp	w2, w3
-	bhi	.L1533
+	bhi	.L1577
 	ret
-.L1533:
+.L1577:
 	ldr	w4, [x1, x3, lsl 2]
 	str	w4, [x0, x3, lsl 2]
 	add	x3, x3, 1
-	b	.L1532
+	b	.L1576
 	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.ftl_memcmp,"ax",@progbits
 	.align	2
@@ -9520,14 +9757,14 @@ nandc_init:
 	mov	x19, x0
 	ldr	w0, [x21, #:lo12:.LANCHOR19]
 	str	wzr, [x29, 56]
-	tbz	x0, 12, .L1538
-	adrp	x1, .LANCHOR155
-	adrp	x0, .LC95
+	tbz	x0, 12, .L1582
+	adrp	x1, .LANCHOR156
+	adrp	x0, .LC92
 	mov	x2, x19
-	add	x1, x1, :lo12:.LANCHOR155
-	add	x0, x0, :lo12:.LC95
+	add	x1, x1, :lo12:.LANCHOR156
+	add	x0, x0, :lo12:.LC92
 	bl	printf
-.L1538:
+.L1582:
 	adrp	x20, .LANCHOR27
 	mov	w0, 6
 	ldr	w2, [x19, 352]
@@ -9538,22 +9775,22 @@ nandc_init:
 	mov	x22, x0
 	str	x19, [x0, #:lo12:.LANCHOR7]
 	cmp	w2, w1
-	bne	.L1539
+	bne	.L1583
 	mov	w0, 8
 	strb	w0, [x20, #:lo12:.LANCHOR27]
-.L1539:
+.L1583:
 	ldr	w1, [x19, 128]
 	mov	w0, 12336
 	movk	w0, 0x5639, lsl 16
 	cmp	w1, w0
-	bne	.L1540
+	bne	.L1584
 	mov	w0, 9
 	strb	w0, [x20, #:lo12:.LANCHOR27]
-.L1540:
+.L1584:
 	ldrb	w0, [x20, #:lo12:.LANCHOR27]
 	cmp	w0, 9
 	adrp	x0, .LANCHOR50
-	bne	.L1541
+	bne	.L1585
 	mov	w1, 1
 	strb	w1, [x0, #:lo12:.LANCHOR50]
 	ldr	w0, [x29, 56]
@@ -9578,17 +9815,17 @@ nandc_init:
 	mov	w0, 39
 	str	w0, [x19, 84]
 	ldr	w0, [x21, #:lo12:.LANCHOR19]
-	tbz	x0, 12, .L1543
+	tbz	x0, 12, .L1587
 	ldr	w1, [x19]
 	ldr	w2, [x19, 8]
 	ldr	w3, [x19, 80]
 	ldr	w4, [x19, 84]
 	ldr	w5, [x19, 88]
-.L1556:
-	adrp	x0, .LC96
-	add	x0, x0, :lo12:.LC96
+.L1600:
+	adrp	x0, .LC93
+	add	x0, x0, :lo12:.LC93
 	bl	printf
-.L1543:
+.L1587:
 	adrp	x0, .LANCHOR51
 	mov	w1, 1
 	strb	w1, [x0, #:lo12:.LANCHOR51]
@@ -9597,17 +9834,17 @@ nandc_init:
 	adrp	x0, .LANCHOR49
 	strb	wzr, [x0, #:lo12:.LANCHOR49]
 	ldr	w0, [x21, #:lo12:.LANCHOR19]
-	tbz	x0, 12, .L1537
+	tbz	x0, 12, .L1581
 	ldrb	w1, [x20, #:lo12:.LANCHOR27]
-	adrp	x0, .LC97
-	add	x0, x0, :lo12:.LC97
+	adrp	x0, .LC94
+	add	x0, x0, :lo12:.LC94
 	bl	printf
-.L1537:
+.L1581:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1541:
+.L1585:
 	strb	wzr, [x0, #:lo12:.LANCHOR50]
 	mov	w1, 1
 	ldr	w0, [x29, 56]
@@ -9635,14 +9872,14 @@ nandc_init:
 	adrp	x1, .LANCHOR52
 	str	x0, [x1, #:lo12:.LANCHOR52]
 	ldr	w0, [x21, #:lo12:.LANCHOR19]
-	tbz	x0, 12, .L1543
+	tbz	x0, 12, .L1587
 	ldr	x0, [x22, #:lo12:.LANCHOR7]
 	ldr	w1, [x0]
 	ldr	w2, [x0, 344]
 	ldr	w3, [x0, 304]
 	ldr	w4, [x0, 308]
 	ldr	w5, [x0, 312]
-	b	.L1556
+	b	.L1600
 	.size	nandc_init, .-nandc_init
 	.section	.text.zbuf_init,"ax",@progbits
 	.align	2
@@ -9656,10 +9893,10 @@ zbuf_init:
 	add	x19, x0, :lo12:.LANCHOR55
 	stp	x21, x22, [sp, 32]
 	mov	x20, x0
-	adrp	x22, .LANCHOR131
-	add	x22, x22, :lo12:.LANCHOR131
+	adrp	x22, .LANCHOR68
+	add	x22, x22, :lo12:.LANCHOR68
 	mov	w21, 0
-.L1558:
+.L1602:
 	and	w0, w21, 255
 	strb	w0, [x19, 1]
 	add	w1, w0, 1
@@ -9676,7 +9913,7 @@ zbuf_init:
 	bl	ftl_malloc
 	str	x0, [x19, -40]
 	cmp	w21, 16
-	bne	.L1558
+	bne	.L1602
 	add	x0, x20, :lo12:.LANCHOR55
 	mov	w1, -1
 	strb	w1, [x0, 960]
@@ -9695,94 +9932,94 @@ zbuf_init:
 	.type	gc_init, %function
 gc_init:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR84
+	adrp	x0, .LANCHOR90
 	mov	w2, 2216
 	mov	w1, 0
 	add	x29, sp, 0
-	strb	wzr, [x0, #:lo12:.LANCHOR84]
-	adrp	x0, .LANCHOR156
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR70
-	strb	wzr, [x0, #:lo12:.LANCHOR156]
+	strb	wzr, [x0, #:lo12:.LANCHOR90]
 	adrp	x0, .LANCHOR157
-	add	x19, x20, :lo12:.LANCHOR70
-	str	wzr, [x0, #:lo12:.LANCHOR157]
-	adrp	x0, .LANCHOR96
-	strh	wzr, [x0, #:lo12:.LANCHOR96]
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR76
+	strb	wzr, [x0, #:lo12:.LANCHOR157]
+	adrp	x0, .LANCHOR158
+	add	x19, x20, :lo12:.LANCHOR76
+	str	wzr, [x0, #:lo12:.LANCHOR158]
+	adrp	x0, .LANCHOR102
+	strh	wzr, [x0, #:lo12:.LANCHOR102]
 	mov	x0, x19
 	bl	ftl_memset
 	str	xzr, [x19, 8]
 	mov	w0, -1
-	strh	w0, [x20, #:lo12:.LANCHOR70]
-	adrp	x0, .LANCHOR94
-	adrp	x4, .LANCHOR102
-	adrp	x20, .LANCHOR85
-	ldrh	w1, [x0, #:lo12:.LANCHOR94]
+	strh	w0, [x20, #:lo12:.LANCHOR76]
+	adrp	x0, .LANCHOR100
+	adrp	x4, .LANCHOR108
+	adrp	x20, .LANCHOR91
+	ldrh	w1, [x0, #:lo12:.LANCHOR100]
 	lsr	w2, w1, 1
 	lsr	w0, w1, 2
 	strh	w2, [x19, 38]
-	adrp	x2, .LANCHOR87
+	adrp	x2, .LANCHOR93
 	strh	w0, [x19, 36]
-	adrp	x19, .LANCHOR79
-	strh	wzr, [x2, #:lo12:.LANCHOR87]
-	adrp	x2, .LANCHOR88
-	ldrb	w3, [x19, #:lo12:.LANCHOR79]
-	strh	wzr, [x2, #:lo12:.LANCHOR88]
-	adrp	x2, .LANCHOR89
-	strh	wzr, [x2, #:lo12:.LANCHOR89]
+	adrp	x19, .LANCHOR85
+	strh	wzr, [x2, #:lo12:.LANCHOR93]
+	adrp	x2, .LANCHOR94
+	ldrb	w3, [x19, #:lo12:.LANCHOR85]
+	strh	wzr, [x2, #:lo12:.LANCHOR94]
+	adrp	x2, .LANCHOR95
+	strh	wzr, [x2, #:lo12:.LANCHOR95]
 	mul	w2, w1, w3
 	and	w2, w2, 65535
 	sub	w5, w2, #32
-	strh	w5, [x4, #:lo12:.LANCHOR102]
-	adrp	x4, .LANCHOR100
-	strh	w2, [x4, #:lo12:.LANCHOR100]
-	adrp	x2, .LANCHOR93
-	strh	w1, [x2, #:lo12:.LANCHOR93]
-	adrp	x1, .LANCHOR158
+	strh	w5, [x4, #:lo12:.LANCHOR108]
+	adrp	x4, .LANCHOR106
+	strh	w2, [x4, #:lo12:.LANCHOR106]
+	adrp	x2, .LANCHOR99
+	strh	w1, [x2, #:lo12:.LANCHOR99]
+	adrp	x1, .LANCHOR159
 	mov	w2, 4
-	strh	w2, [x1, #:lo12:.LANCHOR158]
-	adrp	x1, .LANCHOR69
-	strh	w0, [x1, #:lo12:.LANCHOR69]
-	ldrh	w0, [x20, #:lo12:.LANCHOR85]
+	strh	w2, [x1, #:lo12:.LANCHOR159]
+	adrp	x1, .LANCHOR75
+	strh	w0, [x1, #:lo12:.LANCHOR75]
+	ldrh	w0, [x20, #:lo12:.LANCHOR91]
 	mul	w0, w0, w3
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR159
-	str	x0, [x1, #:lo12:.LANCHOR159]
-	ldrb	w1, [x19, #:lo12:.LANCHOR79]
-	ldrh	w0, [x20, #:lo12:.LANCHOR85]
+	adrp	x1, .LANCHOR160
+	str	x0, [x1, #:lo12:.LANCHOR160]
+	ldrb	w1, [x19, #:lo12:.LANCHOR85]
+	ldrh	w0, [x20, #:lo12:.LANCHOR91]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR160
-	str	x0, [x1, #:lo12:.LANCHOR160]
-	ldrh	w1, [x20, #:lo12:.LANCHOR85]
-	ldrb	w0, [x19, #:lo12:.LANCHOR79]
+	adrp	x1, .LANCHOR161
+	str	x0, [x1, #:lo12:.LANCHOR161]
+	ldrh	w1, [x20, #:lo12:.LANCHOR91]
+	ldrb	w0, [x19, #:lo12:.LANCHOR85]
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR82
-	str	x0, [x1, #:lo12:.LANCHOR82]
-	ldrb	w1, [x19, #:lo12:.LANCHOR79]
-	ldrh	w0, [x20, #:lo12:.LANCHOR85]
+	adrp	x1, .LANCHOR88
+	str	x0, [x1, #:lo12:.LANCHOR88]
+	ldrb	w1, [x19, #:lo12:.LANCHOR85]
+	ldrh	w0, [x20, #:lo12:.LANCHOR91]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR76
-	str	x0, [x1, #:lo12:.LANCHOR76]
-	ldrb	w1, [x19, #:lo12:.LANCHOR79]
-	ldrh	w0, [x20, #:lo12:.LANCHOR85]
+	adrp	x1, .LANCHOR82
+	str	x0, [x1, #:lo12:.LANCHOR82]
+	ldrb	w1, [x19, #:lo12:.LANCHOR85]
+	ldrh	w0, [x20, #:lo12:.LANCHOR91]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR161
+	adrp	x1, .LANCHOR162
 	ldp	x19, x20, [sp, 16]
-	str	x0, [x1, #:lo12:.LANCHOR161]
-	adrp	x0, .LANCHOR98
-	adrp	x1, .LANCHOR86
+	str	x0, [x1, #:lo12:.LANCHOR162]
+	adrp	x0, .LANCHOR104
+	adrp	x1, .LANCHOR92
 	ldp	x29, x30, [sp], 32
-	ldrh	w0, [x0, #:lo12:.LANCHOR98]
+	ldrh	w0, [x0, #:lo12:.LANCHOR104]
 	lsr	w0, w0, 2
-	strh	w0, [x1, #:lo12:.LANCHOR86]
+	strh	w0, [x1, #:lo12:.LANCHOR92]
 	ret
 	.size	gc_init, .-gc_init
 	.section	.text.ftl_free,"ax",@progbits
@@ -9801,32 +10038,32 @@ js_hash:
 	mov	w0, 42982
 	mov	x3, 0
 	movk	w0, 0x47c6, lsl 16
-.L1565:
+.L1609:
 	cmp	w1, w3
-	bhi	.L1566
+	bhi	.L1610
 	ret
-.L1566:
+.L1610:
 	lsr	w2, w0, 2
 	ldrb	w5, [x4, x3]
 	add	w2, w2, w0, lsl 5
 	add	x3, x3, 1
 	add	w2, w2, w5
 	eor	w0, w0, w2
-	b	.L1565
+	b	.L1609
 	.size	js_hash, .-js_hash
 	.section	.text.ftl_debug_info_fill,"ax",@progbits
 	.align	2
 	.global	ftl_debug_info_fill
 	.type	ftl_debug_info_fill, %function
 ftl_debug_info_fill:
-	adrp	x3, .LANCHOR131
-	ldrb	w3, [x3, #:lo12:.LANCHOR131]
+	adrp	x3, .LANCHOR68
+	ldrb	w3, [x3, #:lo12:.LANCHOR68]
 	cmp	w3, 8
-	bls	.L1571
+	bls	.L1615
 	and	w0, w0, 255
 	cmp	x2, 0
 	ccmp	w0, 2, 0, ne
-	bne	.L1569
+	bne	.L1613
 	stp	x29, x30, [sp, -16]!
 	mov	x6, x1
 	mov	w1, 21320
@@ -9840,9 +10077,9 @@ ftl_debug_info_fill:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1569:
+.L1613:
 	stp	wzr, wzr, [x1]
-.L1571:
+.L1615:
 	mov	w0, 0
 	ret
 	.size	ftl_debug_info_fill, .-ftl_debug_info_fill
@@ -9881,8 +10118,8 @@ ftl_get_density:
 	.global	ftl_get_capacity
 	.type	ftl_get_capacity, %function
 ftl_get_capacity:
-	adrp	x0, .LANCHOR67
-	ldr	w0, [x0, #:lo12:.LANCHOR67]
+	adrp	x0, .LANCHOR73
+	ldr	w0, [x0, #:lo12:.LANCHOR73]
 	ret
 	.size	ftl_get_capacity, .-ftl_get_capacity
 	.section	.text.rknand_print_hex,"ax",@progbits
@@ -9893,70 +10130,70 @@ rknand_print_hex:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LC99
+	adrp	x21, .LC96
 	stp	x23, x24, [sp, 48]
 	mov	x22, x1
 	stp	x25, x26, [sp, 64]
 	mov	w24, w2
 	stp	x27, x28, [sp, 80]
-	adrp	x25, .LC98
+	adrp	x25, .LC95
 	mov	x27, x0
 	uxtw	x26, w3
-	add	x25, x25, :lo12:.LC98
-	add	x21, x21, :lo12:.LC99
+	add	x25, x25, :lo12:.LC95
+	add	x21, x21, :lo12:.LC96
 	stp	x19, x20, [sp, 16]
 	mov	w23, 0
 	mov	x19, 0
 	mov	w20, 0
-	adrp	x28, .LC100
-.L1580:
+	adrp	x28, .LC97
+.L1624:
 	cmp	x26, x19
-	bne	.L1586
+	bne	.L1630
 	ldp	x19, x20, [sp, 16]
-	adrp	x1, .LC100
+	adrp	x1, .LC97
 	ldp	x21, x22, [sp, 32]
-	add	x1, x1, :lo12:.LC100
+	add	x1, x1, :lo12:.LC97
 	ldp	x23, x24, [sp, 48]
-	adrp	x0, .LC101
+	adrp	x0, .LC98
 	ldp	x25, x26, [sp, 64]
-	add	x0, x0, :lo12:.LC101
+	add	x0, x0, :lo12:.LC98
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	printf
-.L1586:
-	cbnz	w20, .L1581
+.L1630:
+	cbnz	w20, .L1625
 	mov	w3, w23
 	mov	x2, x22
 	mov	x1, x27
 	mov	x0, x25
 	bl	printf
-.L1581:
+.L1625:
 	cmp	w24, 4
-	bne	.L1582
+	bne	.L1626
 	ldr	w1, [x22, x19, lsl 2]
-.L1588:
+.L1632:
 	mov	x0, x21
 	add	w20, w20, 1
 	bl	printf
 	cmp	w20, 15
-	bls	.L1585
+	bls	.L1629
 	mov	w20, 0
-	add	x1, x28, :lo12:.LC100
-	adrp	x0, .LC101
-	add	x0, x0, :lo12:.LC101
+	add	x1, x28, :lo12:.LC97
+	adrp	x0, .LC98
+	add	x0, x0, :lo12:.LC98
 	bl	printf
-.L1585:
+.L1629:
 	add	x19, x19, 1
 	add	w23, w23, w24
-	b	.L1580
-.L1582:
+	b	.L1624
+.L1626:
 	cmp	w24, 2
-	bne	.L1584
+	bne	.L1628
 	ldrsh	w1, [x22, x19, lsl 1]
-	b	.L1588
-.L1584:
+	b	.L1632
+.L1628:
 	ldrb	w1, [x22, x19]
-	b	.L1588
+	b	.L1632
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.hynix_get_read_retry_default,"ax",@progbits
 	.align	2
@@ -9985,42 +10222,42 @@ hynix_get_read_retry_default:
 	strb	w2, [x26, 129]
 	strb	w1, [x26, 130]
 	strb	w0, [x26, 131]
-	bne	.L1590
+	bne	.L1634
 	mov	w0, -89
 	strb	w0, [x21, 16]
-	adrp	x0, .LANCHOR162+17
+	adrp	x0, .LANCHOR163+17
 	mov	w1, -9
-	strb	w1, [x0, #:lo12:.LANCHOR162+17]
-.L1654:
+	strb	w1, [x0, #:lo12:.LANCHOR163+17]
+.L1698:
 	mov	w27, 7
-	b	.L1697
-.L1590:
+	b	.L1741
+.L1634:
 	cmp	w25, 3
-	bne	.L1592
+	bne	.L1636
 	mov	x5, 0
-.L1593:
+.L1637:
 	sub	w0, w5, #80
 	strb	w0, [x24, x5]
 	add	x5, x5, 1
 	cmp	x5, 8
-	bne	.L1593
+	bne	.L1637
 	mov	w27, w5
 	mov	w28, w5
-.L1591:
+.L1635:
 	sub	w0, w25, #1
 	cmp	w0, 1
-	bhi	.L1599
+	bhi	.L1643
 	adrp	x25, .LANCHOR23
 	adrp	x26, .LANCHOR29
 	add	x25, x25, :lo12:.LANCHOR23
 	add	x26, x26, :lo12:.LANCHOR29
 	mov	w23, 0
 	mov	w5, 55
-.L1600:
+.L1644:
 	ldrb	w0, [x25]
 	cmp	w0, w23
-	bhi	.L1606
-.L1607:
+	bhi	.L1650
+.L1651:
 	strb	w28, [x21, 1]
 	strb	w27, [x21, 2]
 	ldp	x19, x20, [sp, 16]
@@ -10030,9 +10267,9 @@ hynix_get_read_retry_default:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1592:
+.L1636:
 	cmp	w25, 4
-	bne	.L1594
+	bne	.L1638
 	mov	w5, -52
 	strb	w5, [x26, 128]
 	mov	w5, -65
@@ -10048,10 +10285,10 @@ hynix_get_read_retry_default:
 	strb	w5, [x26, 132]
 	strb	w1, [x26, 134]
 	strb	w0, [x26, 135]
-	b	.L1591
-.L1594:
+	b	.L1635
+.L1638:
 	cmp	w25, 5
-	bne	.L1595
+	bne	.L1639
 	mov	w0, 56
 	strb	w0, [x26, 128]
 	mov	w0, 57
@@ -10061,12 +10298,12 @@ hynix_get_read_retry_default:
 	strb	w0, [x26, 130]
 	mov	w0, 59
 	strb	w0, [x26, 131]
-.L1697:
+.L1741:
 	mov	w28, 4
-	b	.L1591
-.L1595:
+	b	.L1635
+.L1639:
 	cmp	w25, 6
-	bne	.L1596
+	bne	.L1640
 	mov	w0, 14
 	strb	w0, [x26, 128]
 	mov	w0, 15
@@ -10076,27 +10313,27 @@ hynix_get_read_retry_default:
 	strb	w0, [x26, 130]
 	mov	w0, 17
 	strb	w0, [x26, 131]
-	b	.L1697
-.L1596:
+	b	.L1741
+.L1640:
 	cmp	w25, 7
-	bne	.L1597
+	bne	.L1641
 	mov	x0, 0
-.L1598:
+.L1642:
 	sub	w1, w0, #80
 	strb	w1, [x24, x0]
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L1598
+	bne	.L1642
 	mov	w0, -44
 	mov	w27, 12
 	strb	w0, [x26, 136]
 	mov	w28, 10
 	mov	w0, -43
 	strb	w0, [x26, 137]
-	b	.L1591
-.L1597:
+	b	.L1635
+.L1641:
 	cmp	w25, 8
-	bne	.L1654
+	bne	.L1698
 	mov	w0, 6
 	strb	w0, [x26, 128]
 	mov	w0, 7
@@ -10108,8 +10345,8 @@ hynix_get_read_retry_default:
 	mov	w0, 10
 	mov	w28, 5
 	strb	w0, [x26, 132]
-	b	.L1591
-.L1606:
+	b	.L1635
+.L1650:
 	ldrb	w0, [x26, w23, sxtw]
 	mov	x1, 32
 	mov	w19, 160
@@ -10120,7 +10357,7 @@ hynix_get_read_retry_default:
 	ldr	x22, [x1, #:lo12:.LANCHOR7]
 	add	x19, x21, x19
 	add	x22, x22, x0
-.L1601:
+.L1645:
 	str	w5, [x22, 2056]
 	str	w5, [x29, 136]
 	ldrb	w0, [x24, x20]
@@ -10132,15 +10369,15 @@ hynix_get_read_retry_default:
 	add	x20, x20, 1
 	cmp	w28, w20, uxtb
 	ldr	w5, [x29, 136]
-	bhi	.L1601
-	adrp	x2, .LANCHOR162
-	add	x2, x2, :lo12:.LANCHOR162
+	bhi	.L1645
+	adrp	x2, .LANCHOR163
+	add	x2, x2, :lo12:.LANCHOR163
 	mov	x0, 0
-.L1604:
+.L1648:
 	add	x7, x19, x0
 	add	x4, x2, x0
 	mov	x1, 1
-.L1603:
+.L1647:
 	lsl	x3, x1, 2
 	lsl	x8, x1, 3
 	ldrb	w10, [x19, x0]
@@ -10149,10 +10386,10 @@ hynix_get_read_retry_default:
 	ldrb	w3, [x4, x3]
 	add	w3, w3, w10
 	strb	w3, [x7, x8]
-	bne	.L1603
+	bne	.L1647
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L1604
+	bne	.L1648
 	add	w23, w23, 1
 	strb	wzr, [x19, 16]
 	strb	wzr, [x19, 24]
@@ -10162,11 +10399,11 @@ hynix_get_read_retry_default:
 	strb	wzr, [x19, 48]
 	strb	wzr, [x19, 41]
 	strb	wzr, [x19, 49]
-	b	.L1600
-.L1599:
+	b	.L1644
+.L1643:
 	sub	w0, w25, #3
 	cmp	w0, 5
-	bhi	.L1607
+	bhi	.L1651
 	mul	w24, w27, w28
 	sub	w22, w28, #1
 	and	x22, x22, 255
@@ -10184,11 +10421,11 @@ hynix_get_read_retry_default:
 	str	x0, [x29, 120]
 	add	x0, x22, 1
 	str	x0, [x29, 112]
-.L1608:
+.L1652:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, w20
-	bls	.L1607
+	bls	.L1651
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	mov	w19, 160
@@ -10209,7 +10446,7 @@ hynix_get_read_retry_default:
 	bl	nandc_wait_flash_ready
 	cmp	w25, 8
 	ldr	w1, [x29, 108]
-	bne	.L1609
+	bne	.L1653
 	mov	w0, 120
 	str	w0, [x22, 2056]
 	str	wzr, [x22, 2052]
@@ -10229,7 +10466,7 @@ hynix_get_read_retry_default:
 	str	wzr, [x22, 2052]
 	str	wzr, [x22, 2052]
 	str	w1, [x22, 2052]
-.L1700:
+.L1744:
 	str	w0, [x22, 2052]
 	mov	w0, 48
 	str	wzr, [x22, 2052]
@@ -10237,65 +10474,65 @@ hynix_get_read_retry_default:
 	bl	nandc_wait_flash_ready
 	cmp	w24, 1
 	ccmp	w25, 8, 4, hi
-	beq	.L1655
+	beq	.L1699
 	cmp	w25, 7
 	mov	w0, 32
 	mov	w1, 2
 	csel	w1, w1, w0, ne
-.L1616:
-	adrp	x8, .LANCHOR163
+.L1660:
+	adrp	x8, .LANCHOR164
 	mov	x7, 0
-	ldr	x0, [x8, #:lo12:.LANCHOR163]
-.L1617:
+	ldr	x0, [x8, #:lo12:.LANCHOR164]
+.L1661:
 	ldr	w10, [x22, 2048]
 	strb	w10, [x0, x7]
 	add	x7, x7, 1
 	cmp	w1, w7, uxtb
-	bhi	.L1617
+	bhi	.L1661
 	cmp	w25, 8
-	bne	.L1618
+	bne	.L1662
 	mov	w1, 0
-.L1620:
+.L1664:
 	ldrb	w7, [x0]
 	cmp	w7, 50
-	beq	.L1619
+	beq	.L1663
 	ldrb	w7, [x0, 1]
 	cmp	w7, 5
-	beq	.L1619
+	beq	.L1663
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 255
 	cmp	w1, 8
-	bne	.L1620
-.L1621:
-	adrp	x0, .LC102
+	bne	.L1664
+.L1665:
+	adrp	x0, .LC99
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC102
+	add	x0, x0, :lo12:.LC99
 	bl	printf
-.L1623:
-	b	.L1623
-.L1609:
+.L1667:
+	b	.L1667
+.L1653:
 	mov	w0, 54
 	str	w0, [x22, 2056]
 	cmp	w25, 4
-	bne	.L1611
+	bne	.L1655
 	mov	w0, 64
 	str	w1, [x22, 2052]
 	str	w0, [x22, 2048]
 	mov	w0, 204
-.L1698:
+.L1742:
 	str	w0, [x22, 2052]
 	mov	w0, 77
-	b	.L1699
-.L1611:
+	b	.L1743
+.L1655:
 	cmp	w24, 1
-	bhi	.L1613
+	bhi	.L1657
 	ldrb	w0, [x26, 128]
 	str	w0, [x22, 2052]
 	mov	w0, 82
-.L1699:
+.L1743:
 	str	w0, [x22, 2048]
-.L1612:
+.L1656:
 	mov	w0, 22
 	str	w0, [x22, 2056]
 	mov	w0, 23
@@ -10308,189 +10545,189 @@ hynix_get_read_retry_default:
 	cmp	w25, 6
 	str	wzr, [x22, 2052]
 	str	wzr, [x22, 2052]
-	bne	.L1614
+	bne	.L1658
 	mov	w0, 31
 	str	w0, [x22, 2052]
-.L1615:
+.L1659:
 	mov	w0, 2
-	b	.L1700
-.L1613:
+	b	.L1744
+.L1657:
 	cmp	w25, 7
-	bne	.L1612
+	bne	.L1656
 	mov	w0, 174
 	str	w0, [x22, 2052]
 	str	wzr, [x22, 2048]
 	mov	w0, 176
-	b	.L1698
-.L1614:
+	b	.L1742
+.L1658:
 	str	wzr, [x22, 2052]
-	b	.L1615
-.L1655:
+	b	.L1659
+.L1699:
 	mov	w1, 16
-	b	.L1616
-.L1619:
+	b	.L1660
+.L1663:
 	cmp	w1, 6
-	bhi	.L1621
-.L1622:
-	ldr	x7, [x8, #:lo12:.LANCHOR163]
+	bhi	.L1665
+.L1666:
+	ldr	x7, [x8, #:lo12:.LANCHOR164]
 	mov	x0, 0
-.L1632:
+.L1676:
 	ldr	w1, [x29, 128]
 	cmp	w1, w0
-	bgt	.L1633
-	ldr	x1, [x8, #:lo12:.LANCHOR163]
+	bgt	.L1677
+	ldr	x1, [x8, #:lo12:.LANCHOR164]
 	mov	w10, 8
 	ldr	x0, [x29, 136]
 	add	x8, x1, x0
-.L1635:
+.L1679:
 	mov	x0, 0
-.L1634:
+.L1678:
 	ldrh	w11, [x8, x0, lsl 1]
 	mvn	w11, w11
 	strh	w11, [x8, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	w23, w0
-	bgt	.L1634
+	bgt	.L1678
 	ldr	w0, [x29, 132]
 	subs	w10, w10, #1
 	add	x8, x8, x0, uxtw 1
-	bne	.L1635
+	bne	.L1679
 	mov	x10, x1
 	mov	w11, 0
 	mov	w16, 1
-.L1636:
+.L1680:
 	mov	w0, 0
 	mov	w8, 0
-.L1640:
+.L1684:
 	mov	x14, x10
 	lsl	w15, w16, w8
 	mov	w13, 16
 	mov	w12, 0
-.L1638:
+.L1682:
 	ldrh	w17, [x14]
 	ldr	x2, [x29, 136]
 	bics	wzr, w15, w17
 	cinc	w12, w12, eq
 	add	x14, x14, x2
 	subs	w13, w13, #1
-	bne	.L1638
+	bne	.L1682
 	cmp	w12, 8
-	bls	.L1639
+	bls	.L1683
 	orr	w0, w0, w15
 	and	w0, w0, 65535
-.L1639:
+.L1683:
 	add	w8, w8, 1
 	cmp	w8, 16
-	bne	.L1640
+	bne	.L1684
 	strh	w0, [x10], 2
 	add	w11, w11, 1
 	cmp	w23, w11
-	bgt	.L1636
+	bgt	.L1680
 	mov	x0, 0
 	mov	w8, 0
-.L1643:
+.L1687:
 	ldr	w10, [x1, x0]
 	add	x0, x0, 4
 	cmp	w10, 0
 	cinc	w8, w8, eq
 	cmp	x0, 32
-	bne	.L1643
+	bne	.L1687
 	cmp	w8, 7
-	ble	.L1644
+	ble	.L1688
 	mov	w3, 1024
 	mov	w2, 1
-	adrp	x0, .LC103
-	add	x0, x0, :lo12:.LC103
+	adrp	x0, .LC100
+	add	x0, x0, :lo12:.LC100
 	bl	rknand_print_hex
-	adrp	x0, .LC102
+	adrp	x0, .LC99
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC102
+	add	x0, x0, :lo12:.LC99
 	bl	printf
-.L1645:
-	b	.L1645
-.L1618:
+.L1689:
+	b	.L1689
+.L1662:
 	cmp	w25, 7
-	bne	.L1624
+	bne	.L1668
 	mov	w1, 0
-.L1626:
+.L1670:
 	ldrb	w7, [x0]
 	cmp	w7, 12
-	beq	.L1625
+	beq	.L1669
 	ldrb	w7, [x0, 1]
 	cmp	w7, 10
-	beq	.L1625
+	beq	.L1669
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 255
 	cmp	w1, 8
-	bne	.L1626
-.L1627:
-	adrp	x0, .LC102
+	bne	.L1670
+.L1671:
+	adrp	x0, .LC99
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC102
+	add	x0, x0, :lo12:.LC99
 	bl	printf
-.L1628:
-	b	.L1628
-.L1625:
+.L1672:
+	b	.L1672
+.L1669:
 	cmp	w1, 6
-	bls	.L1622
-	b	.L1627
-.L1624:
+	bls	.L1666
+	b	.L1671
+.L1668:
 	cmp	w25, 6
-	bne	.L1622
+	bne	.L1666
 	mov	x1, 0
-.L1629:
+.L1673:
 	ldrb	w7, [x0, x1]
 	cmp	w7, 12
-	beq	.L1622
+	beq	.L1666
 	add	x7, x0, x1
 	ldrb	w7, [x7, 8]
 	cmp	w7, 4
-	beq	.L1622
+	beq	.L1666
 	add	x1, x1, 1
 	cmp	x1, 8
-	bne	.L1629
-	adrp	x0, .LC102
+	bne	.L1673
+	adrp	x0, .LC99
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC102
+	add	x0, x0, :lo12:.LC99
 	bl	printf
-.L1631:
-	b	.L1631
-.L1633:
+.L1675:
+	b	.L1675
+.L1677:
 	ldr	w1, [x22, 2048]
 	strb	w1, [x7, x0]
 	add	x0, x0, 1
-	b	.L1632
-.L1644:
+	b	.L1676
+.L1688:
 	cmp	w25, 6
-	beq	.L1657
+	beq	.L1701
 	cmp	w25, 7
-	beq	.L1658
+	beq	.L1702
 	cmp	w25, 8
 	mov	x1, 5
 	mov	x0, 8
 	csel	x0, x0, x1, ne
-.L1646:
+.L1690:
 	mov	w8, 0
-.L1647:
+.L1691:
 	mov	x1, 0
-.L1648:
+.L1692:
 	ldrb	w10, [x7, x1]
 	strb	w10, [x19, x1]
 	add	x1, x1, 1
 	cmp	w28, w1, uxtb
-	bhi	.L1648
+	bhi	.L1692
 	ldr	x1, [x29, 112]
 	add	w8, w8, 1
 	add	x19, x19, x0
 	cmp	w27, w8
 	add	x7, x7, x1
-	bgt	.L1647
+	bgt	.L1691
 	mov	w19, 255
 	str	w19, [x22, 2056]
 	bl	nandc_wait_flash_ready
 	cmp	w24, 1
-	bhi	.L1650
+	bhi	.L1694
 	mov	w0, 54
 	str	w0, [x22, 2056]
 	ldrb	w0, [x26, 128]
@@ -10505,26 +10742,26 @@ hynix_get_read_retry_default:
 	str	w19, [x22, 2052]
 	str	w19, [x22, 2052]
 	str	w19, [x22, 2052]
-.L1701:
+.L1745:
 	str	w0, [x22, 2056]
 	add	w20, w20, 1
 	and	w20, w20, 255
 	bl	nandc_wait_flash_ready
-	b	.L1608
-.L1657:
+	b	.L1652
+.L1701:
 	mov	x0, 4
-	b	.L1646
-.L1658:
+	b	.L1690
+.L1702:
 	mov	x0, 10
-	b	.L1646
-.L1650:
+	b	.L1690
+.L1694:
 	cmp	w25, 8
-	bne	.L1652
+	bne	.L1696
 	mov	w0, 190
-	b	.L1701
-.L1652:
+	b	.L1745
+.L1696:
 	mov	w0, 56
-	b	.L1701
+	b	.L1745
 	.size	hynix_get_read_retry_default, .-hynix_get_read_retry_default
 	.section	.text.flash_get_read_retry_tbl,"ax",@progbits
 	.align	2
@@ -10536,9 +10773,9 @@ flash_get_read_retry_tbl:
 	sub	w1, w0, #1
 	and	w1, w1, 255
 	cmp	w1, 7
-	bhi	.L1702
+	bhi	.L1746
 	b	hynix_get_read_retry_default
-.L1702:
+.L1746:
 	ret
 	.size	flash_get_read_retry_tbl, .-flash_get_read_retry_tbl
 	.section	.text.nandc_xfer_done,"ax",@progbits
@@ -10547,37 +10784,37 @@ flash_get_read_retry_tbl:
 	.type	nandc_xfer_done, %function
 nandc_xfer_done:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR164
+	adrp	x0, .LANCHOR165
 	adrp	x1, .LANCHOR27
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR7
 	ldrb	w1, [x1, #:lo12:.LANCHOR27]
 	stp	x21, x22, [sp, 32]
-	strb	wzr, [x0, #:lo12:.LANCHOR164]
+	strb	wzr, [x0, #:lo12:.LANCHOR165]
 	cmp	w1, 9
 	str	x23, [sp, 48]
-	bne	.L1705
+	bne	.L1749
 	ldr	x20, [x19, #:lo12:.LANCHOR7]
 	mov	x21, x0
 	ldr	w0, [x20, 16]
 	str	w0, [x29, 64]
 	ldr	w0, [x20, 48]
-	tbnz	x0, 1, .L1706
-	adrp	x22, .LC106
-	adrp	x23, .LC107
-	add	x22, x22, :lo12:.LC106
-	add	x23, x23, :lo12:.LC107
+	tbnz	x0, 1, .L1750
+	adrp	x22, .LC103
+	adrp	x23, .LC104
+	add	x22, x22, :lo12:.LC103
+	add	x23, x23, :lo12:.LC104
 	mov	w21, 0
-.L1707:
+.L1751:
 	ldr	w0, [x29, 64]
-	tbnz	x0, 20, .L1709
+	tbnz	x0, 20, .L1753
 	ldr	x0, [x19, #:lo12:.LANCHOR7]
 	add	w21, w21, 1
 	tst	x21, 16777215
 	ldr	w0, [x0, 16]
 	str	w0, [x29, 64]
-	bne	.L1707
+	bne	.L1751
 	ldr	w2, [x29, 64]
 	mov	w1, w21
 	ldr	w3, [x20, 64]
@@ -10589,24 +10826,24 @@ nandc_xfer_done:
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1707
-.L1708:
+	b	.L1751
+.L1752:
 	ldr	w0, [x29, 64]
 	add	w1, w1, 1
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0, lsl 12
-	bne	.L1710
+	bne	.L1754
 	ldr	w2, [x20, 64]
-	adrp	x0, .LC105
+	adrp	x0, .LC102
 	ldr	w3, [x29, 64]
-	add	x0, x0, :lo12:.LC105
+	add	x0, x0, :lo12:.LC102
 	ubfx	x2, x2, 16, 5
 	ubfx	x3, x3, 22, 6
 	bl	printf
 	ldr	w0, [x29, 72]
 	mov	w0, 1
-	strb	w0, [x21, #:lo12:.LANCHOR164]
-.L1709:
+	strb	w0, [x21, #:lo12:.LANCHOR165]
+.L1753:
 	adrp	x0, .LANCHOR52+32
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -10614,48 +10851,48 @@ nandc_xfer_done:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1706:
+.L1750:
 	mov	w1, 0
-.L1710:
+.L1754:
 	ldr	w2, [x20, 64]
 	ldr	w0, [x29, 64]
 	ubfx	x2, x2, 16, 6
 	ubfx	x0, x0, 22, 6
 	cmp	w2, w0
-	bge	.L1709
+	bge	.L1753
 	ldr	w0, [x20]
 	str	w0, [x29, 72]
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1708
+	tbz	x0, 13, .L1752
 	ldr	w0, [x29, 72]
-	tbz	x0, 17, .L1708
+	tbz	x0, 17, .L1752
 	ldr	w1, [x29, 72]
-	adrp	x0, .LC104
-	add	x0, x0, :lo12:.LC104
+	adrp	x0, .LC101
+	add	x0, x0, :lo12:.LC101
 	ubfx	x1, x1, 17, 1
-.L1739:
+.L1783:
 	bl	printf
-	b	.L1709
-.L1705:
+	b	.L1753
+.L1749:
 	ldr	x20, [x19, #:lo12:.LANCHOR7]
 	mov	w21, 0
 	ldr	w0, [x20, 8]
 	str	w0, [x29, 64]
 	ldr	w0, [x20, 16]
-	tbnz	x0, 1, .L1715
-	adrp	x22, .LC106
-	adrp	x23, .LC107
-	add	x22, x22, :lo12:.LC106
-	add	x23, x23, :lo12:.LC107
-.L1716:
+	tbnz	x0, 1, .L1759
+	adrp	x22, .LC103
+	adrp	x23, .LC104
+	add	x22, x22, :lo12:.LC103
+	add	x23, x23, :lo12:.LC104
+.L1760:
 	ldr	w0, [x29, 64]
-	tbnz	x0, 20, .L1709
+	tbnz	x0, 20, .L1753
 	ldr	x0, [x19, #:lo12:.LANCHOR7]
 	add	w21, w21, 1
 	tst	x21, 16777215
 	ldr	w0, [x0, 8]
 	str	w0, [x29, 64]
-	bne	.L1716
+	bne	.L1760
 	ldr	w2, [x29, 64]
 	mov	w1, w21
 	ldr	w3, [x20, 28]
@@ -10667,34 +10904,34 @@ nandc_xfer_done:
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1716
-.L1715:
-	adrp	x22, .LC105
-	adrp	x23, .LC107
-	add	x22, x22, :lo12:.LC105
-	add	x23, x23, :lo12:.LC107
-.L1717:
+	b	.L1760
+.L1759:
+	adrp	x22, .LC102
+	adrp	x23, .LC104
+	add	x22, x22, :lo12:.LC102
+	add	x23, x23, :lo12:.LC104
+.L1761:
 	ldr	w1, [x20, 28]
 	ldr	w0, [x29, 64]
 	ubfx	x1, x1, 16, 5
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0
-	bge	.L1709
+	bge	.L1753
 	ldr	x0, [x19, #:lo12:.LANCHOR7]
 	ldr	w0, [x0]
 	str	w0, [x29, 72]
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1718
+	tbz	x0, 13, .L1762
 	ldr	w0, [x29, 72]
-	tbz	x0, 17, .L1718
-	adrp	x0, .LC108
+	tbz	x0, 17, .L1762
+	adrp	x0, .LC105
 	ldr	w1, [x29, 72]
-	add	x0, x0, :lo12:.LC108
-	b	.L1739
-.L1718:
+	add	x0, x0, :lo12:.LC105
+	b	.L1783
+.L1762:
 	add	w21, w21, 1
 	tst	x21, 16777215
-	bne	.L1717
+	bne	.L1761
 	ldr	w2, [x20, 28]
 	mov	w1, w21
 	ldr	w3, [x29, 64]
@@ -10707,7 +10944,7 @@ nandc_xfer_done:
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1717
+	b	.L1761
 	.size	nandc_xfer_done, .-nandc_xfer_done
 	.section	.text.nandc_xfer,"ax",@progbits
 	.align	2
@@ -10729,20 +10966,20 @@ nandc_xfer:
 	bl	nandc_xfer_start
 	mov	w0, w22
 	bl	nandc_xfer_done
-	cbnz	w22, .L1759
+	cbnz	w22, .L1803
 	adrp	x0, .LANCHOR27
 	ldrb	w0, [x0, #:lo12:.LANCHOR27]
 	cmp	w0, 9
-	bne	.L1742
+	bne	.L1786
 	adrp	x22, .LANCHOR7
 	lsr	w19, w19, 2
 	mov	w3, 1
 	mov	w2, 0
 	ldr	x5, [x22, #:lo12:.LANCHOR7]
 	mov	w0, 0
-.L1743:
+.L1787:
 	cmp	w2, w19
-	bcc	.L1747
+	bcc	.L1791
 	ldr	w19, [x5]
 	cmp	w3, 0
 	mov	w1, 512
@@ -10751,35 +10988,35 @@ nandc_xfer:
 	movk	w1, 0x2, lsl 16
 	and	w1, w19, w1
 	cmp	w1, 139264
-	bne	.L1749
+	bne	.L1793
 	mov	w1, w19
-	adrp	x0, .LC109
-	add	x0, x0, :lo12:.LC109
+	adrp	x0, .LC106
+	add	x0, x0, :lo12:.LC106
 	bl	printf
 	ldr	x0, [x22, #:lo12:.LANCHOR7]
 	orr	w19, w19, 131072
 	str	w19, [x0]
 	mov	w0, -1
-.L1749:
-	tbz	x19, 13, .L1750
-	adrp	x1, .LANCHOR164
-	ldrb	w1, [x1, #:lo12:.LANCHOR164]
-	cbz	w1, .L1750
+.L1793:
+	tbz	x19, 13, .L1794
+	adrp	x1, .LANCHOR165
+	ldrb	w1, [x1, #:lo12:.LANCHOR165]
+	cbz	w1, .L1794
 	mov	w1, w19
-	adrp	x0, .LC110
-	add	x0, x0, :lo12:.LC110
+	adrp	x0, .LC107
+	add	x0, x0, :lo12:.LC107
 	bl	printf
 	ldr	x0, [x22, #:lo12:.LANCHOR7]
 	mov	w1, 1
 	str	w1, [x0, 16]
-.L1778:
+.L1822:
 	mov	w0, -1
-.L1741:
+.L1785:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1747:
+.L1791:
 	uxtw	x1, w2
 	add	x1, x1, 84
 	ldr	w1, [x5, x1, lsl 2]
@@ -10790,30 +11027,30 @@ nandc_xfer:
 	and	w1, w4, w1, lsr 10
 	and	w3, w3, w1
 	ldr	w1, [x29, 56]
-	tbnz	x1, 2, .L1761
+	tbnz	x1, 2, .L1805
 	ldr	w1, [x29, 56]
-	tbnz	x1, 18, .L1761
+	tbnz	x1, 18, .L1805
 	ldr	w4, [x29, 56]
 	ldr	w1, [x29, 56]
 	ubfx	x4, x4, 3, 7
 	ubfx	x1, x1, 19, 7
 	cmp	w4, w1
 	ldr	w1, [x29, 56]
-	ble	.L1745
+	ble	.L1789
 	ubfx	x1, x1, 3, 7
-.L1746:
+.L1790:
 	cmp	w0, w1
 	csel	w0, w0, w1, cs
-.L1744:
+.L1788:
 	add	w2, w2, 1
-	b	.L1743
-.L1745:
+	b	.L1787
+.L1789:
 	ubfx	x1, x1, 19, 7
-	b	.L1746
-.L1761:
+	b	.L1790
+.L1805:
 	mov	w0, -1
-	b	.L1744
-.L1742:
+	b	.L1788
+.L1786:
 	adrp	x0, .LANCHOR49
 	lsr	w4, w19, 1
 	mov	w3, 64
@@ -10825,34 +11062,34 @@ nandc_xfer:
 	mov	w0, 128
 	csel	w3, w3, w0, cc
 	mov	w0, 0
-.L1752:
+.L1796:
 	add	w5, w3, w0
 	cmp	w2, w4
-	bcc	.L1753
+	bcc	.L1797
 	adrp	x22, .LANCHOR7
 	lsr	w19, w19, 2
 	mov	w3, 0
 	mov	w0, 0
 	ldr	x4, [x22, #:lo12:.LANCHOR7]
-.L1754:
+.L1798:
 	cmp	w3, w19
-	bcc	.L1758
+	bcc	.L1802
 	str	wzr, [x4, 16]
 	mov	w1, 8192
 	movk	w1, 0x2, lsl 16
 	ldr	w19, [x4]
 	and	w1, w19, w1
 	cmp	w1, 139264
-	bne	.L1750
+	bne	.L1794
 	mov	w1, w19
-	adrp	x0, .LC111
-	add	x0, x0, :lo12:.LC111
+	adrp	x0, .LC108
+	add	x0, x0, :lo12:.LC108
 	bl	printf
 	ldr	x0, [x22, #:lo12:.LANCHOR7]
 	orr	w19, w19, 131072
 	str	w19, [x0]
-	b	.L1778
-.L1753:
+	b	.L1822
+.L1797:
 	ldr	x7, [x6, #:lo12:.LANCHOR52]
 	and	x0, x0, 4294967292
 	ldr	w0, [x7, x0]
@@ -10869,16 +11106,16 @@ nandc_xfer:
 	add	w1, w1, 4
 	strb	w0, [x21, x7]
 	mov	w0, w5
-	b	.L1752
-.L1758:
+	b	.L1796
+.L1802:
 	uxtw	x1, w3
 	add	x1, x1, 8
 	ldr	w1, [x4, x1, lsl 2]
 	str	w1, [x29, 56]
 	ldr	w1, [x29, 56]
-	tbnz	x1, 2, .L1764
+	tbnz	x1, 2, .L1808
 	ldr	w1, [x29, 56]
-	tbnz	x1, 15, .L1764
+	tbnz	x1, 15, .L1808
 	ldr	w2, [x29, 56]
 	ubfx	x6, x2, 3, 5
 	ldr	w2, [x29, 56]
@@ -10891,42 +11128,42 @@ nandc_xfer:
 	orr	w1, w5, w1, lsl 5
 	cmp	w2, w1
 	ldr	w1, [x29, 56]
-	bls	.L1756
+	bls	.L1800
 	ubfx	x2, x1, 3, 5
 	ldr	w1, [x29, 56]
 	ubfx	x1, x1, 27, 1
-.L1777:
+.L1821:
 	orr	w1, w2, w1, lsl 5
 	cmp	w0, w1
 	csel	w0, w0, w1, cs
-.L1755:
+.L1799:
 	add	w3, w3, 1
-	b	.L1754
-.L1756:
+	b	.L1798
+.L1800:
 	ubfx	x2, x1, 16, 5
 	ldr	w1, [x29, 56]
 	ubfx	x1, x1, 29, 1
-	b	.L1777
-.L1764:
+	b	.L1821
+.L1808:
 	mov	w0, -1
-	b	.L1755
-.L1750:
+	b	.L1799
+.L1794:
 	cmn	w0, #1
-	beq	.L1741
+	beq	.L1785
 	ldr	w1, [x21]
 	cmn	w1, #1
-	bne	.L1741
+	bne	.L1785
 	ldr	w1, [x21, 4]
 	cmn	w1, #1
-	bne	.L1741
+	bne	.L1785
 	ldr	w1, [x20]
 	cmn	w1, #1
 	mov	w1, 512
 	csel	w0, w0, w1, ne
-	b	.L1741
-.L1759:
+	b	.L1785
+.L1803:
 	mov	w0, 0
-	b	.L1741
+	b	.L1785
 	.size	nandc_xfer, .-nandc_xfer
 	.section	.text.flash_read_page,"ax",@progbits
 	.align	2
@@ -10958,23 +11195,23 @@ flash_read_page:
 	bl	nandc_wait_flash_ready
 	mov	w0, w21
 	bl	nandc_cs
-	cbnz	w22, .L1780
+	cbnz	w22, .L1824
 	mov	w0, w21
 	bl	zftl_flash_enter_slc_mode
-.L1781:
+.L1825:
 	ldr	x1, [x26, #:lo12:.LANCHOR21]
 	ldrb	w0, [x1, 7]
 	cmp	w0, 1
-	bne	.L1783
+	bne	.L1827
 	ldrb	w0, [x1, 12]
 	cmp	w0, 2
-	bne	.L1783
+	bne	.L1827
 	sxtw	x0, w21
 	mov	w2, 38
 	add	x0, x0, 8
 	add	x0, x20, x0, lsl 8
 	str	w2, [x0, 8]
-.L1783:
+.L1827:
 	ubfiz	x0, x21, 8, 8
 	add	x20, x20, x0
 	and	w0, w19, 255
@@ -10988,26 +11225,26 @@ flash_read_page:
 	str	w0, [x20, 2052]
 	adrp	x0, .LANCHOR30
 	ldrb	w0, [x0, #:lo12:.LANCHOR30]
-	cbz	w0, .L1784
+	cbz	w0, .L1828
 	lsr	w0, w19, 24
 	str	w0, [x20, 2052]
-.L1784:
+.L1828:
 	mov	w0, 48
 	str	w0, [x20, 2056]
 	ldrb	w0, [x1, 12]
 	cmp	w0, 3
-	bne	.L1785
-	cbz	w22, .L1785
+	bne	.L1829
+	cbz	w22, .L1829
 	adrp	x0, .LANCHOR35
 	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbnz	w0, .L1785
+	cbnz	w0, .L1829
 	adrp	x0, .LANCHOR36
 	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbnz	w0, .L1785
+	cbnz	w0, .L1829
 	add	w19, w19, w19, lsl 1
 	sub	w0, w19, #1
 	add	w0, w0, w22
-.L1794:
+.L1838:
 	bl	nandc_set_seed
 	bl	nandc_wait_flash_ready
 	mov	w0, 5
@@ -11023,7 +11260,7 @@ flash_read_page:
 	mov	w0, w21
 	bl	nandc_xfer
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.32
+	bl	nandc_de_cs.constprop.31
 	mov	w0, w2
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11031,29 +11268,29 @@ flash_read_page:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1780:
+.L1824:
 	ldr	x0, [x26, #:lo12:.LANCHOR21]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1782
+	bne	.L1826
 	adrp	x0, .LANCHOR35
 	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbnz	w0, .L1782
+	cbnz	w0, .L1826
 	adrp	x0, .LANCHOR36
 	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbnz	w0, .L1782
+	cbnz	w0, .L1826
 	sxtw	x0, w21
 	add	x0, x0, 8
 	add	x0, x20, x0, lsl 8
 	str	w22, [x0, 8]
-	b	.L1781
-.L1782:
+	b	.L1825
+.L1826:
 	mov	w0, w21
 	bl	zftl_flash_exit_slc_mode
-	b	.L1781
-.L1785:
+	b	.L1825
+.L1829:
 	mov	w0, w19
-	b	.L1794
+	b	.L1838
 	.size	flash_read_page, .-flash_read_page
 	.section	.text.micron_read_retrial,"ax",@progbits
 	.align	2
@@ -11080,12 +11317,12 @@ micron_read_retrial:
 	add	w21, w21, w21, lsl 1
 	asr	w21, w21, 2
 	ldr	x19, [x0, #:lo12:.LANCHOR7]
-	adrp	x0, .LANCHOR166
-	add	x0, x0, :lo12:.LANCHOR166
+	adrp	x0, .LANCHOR167
+	add	x0, x0, :lo12:.LANCHOR167
 	str	x0, [x29, 112]
 	ubfiz	x0, x20, 8, 8
 	add	x19, x19, x0
-.L1796:
+.L1840:
 	mov	w0, w20
 	bl	zftl_flash_enter_slc_mode
 	mov	w0, w20
@@ -11095,12 +11332,12 @@ micron_read_retrial:
 	add	x0, x0, :lo12:.LANCHOR19
 	mov	w28, -1
 	str	x0, [x29, 104]
-.L1797:
+.L1841:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
 	cmp	w22, w0
-	bcc	.L1802
-.L1801:
+	bcc	.L1846
+.L1845:
 	mov	w0, 239
 	str	w0, [x19, 2056]
 	mov	w0, 137
@@ -11112,33 +11349,33 @@ micron_read_retrial:
 	cmp	w28, w21
 	str	wzr, [x19, 2048]
 	str	wzr, [x19, 2048]
-	bcc	.L1803
+	bcc	.L1847
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L1803:
+.L1847:
 	cmn	w28, #1
 	cset	w27, eq
 	cmp	w28, 256
 	cset	w0, eq
 	orr	w0, w27, w0
-	cbz	w0, .L1804
+	cbz	w0, .L1848
 	mov	w4, w28
 	mov	w3, w22
 	mov	w2, w24
 	mov	w1, w20
-	adrp	x0, .LC113
-	add	x0, x0, :lo12:.LC113
+	adrp	x0, .LC110
+	add	x0, x0, :lo12:.LC110
 	bl	printf
 	eor	w0, w23, 1
 	tst	w27, w0
-	beq	.L1805
+	beq	.L1849
 	mov	w1, 3
 	mov	w0, w20
 	mov	w23, 1
 	bl	mt_auto_read_calibration_config
-	b	.L1796
-.L1802:
+	b	.L1840
+.L1846:
 	mov	w0, 239
 	str	w0, [x19, 2056]
 	mov	w0, 137
@@ -11159,42 +11396,42 @@ micron_read_retrial:
 	mov	w6, w0
 	ldr	x0, [x29, 104]
 	ldr	w0, [x0]
-	tbz	x0, 12, .L1798
+	tbz	x0, 12, .L1842
 	mov	w4, w6
 	str	w6, [x29, 120]
 	mov	w3, w28
 	mov	w2, w24
 	mov	w1, w22
-	adrp	x0, .LC112
-	add	x0, x0, :lo12:.LC112
+	adrp	x0, .LC109
+	add	x0, x0, :lo12:.LC109
 	bl	printf
 	ldr	w6, [x29, 120]
-.L1798:
+.L1842:
 	cmn	w6, #1
-	beq	.L1799
-	adrp	x0, .LANCHOR163
+	beq	.L1843
+	adrp	x0, .LANCHOR164
 	cmn	w28, #1
 	csel	w28, w28, w6, ne
 	cmp	w6, w21
-	ldr	x25, [x0, #:lo12:.LANCHOR163]
-	adrp	x0, .LANCHOR165
-	ldr	x26, [x0, #:lo12:.LANCHOR165]
-	bcc	.L1808
-.L1799:
+	ldr	x25, [x0, #:lo12:.LANCHOR164]
+	adrp	x0, .LANCHOR166
+	ldr	x26, [x0, #:lo12:.LANCHOR166]
+	bcc	.L1852
+.L1843:
 	mov	w22, w27
-	b	.L1797
-.L1808:
+	b	.L1841
+.L1852:
 	mov	w28, w6
-	b	.L1801
-.L1805:
-	cbz	w23, .L1806
+	b	.L1845
+.L1849:
+	cbz	w23, .L1850
 	mov	w0, w20
 	mov	w1, 0
 	bl	mt_auto_read_calibration_config
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L1806:
+.L1850:
 	bl	nandc_wait_flash_ready
 	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
@@ -11204,13 +11441,13 @@ micron_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1804:
-	cbz	w23, .L1806
+.L1848:
+	cbz	w23, .L1850
 	mov	w1, 0
 	mov	w0, w20
 	mov	w28, 256
 	bl	mt_auto_read_calibration_config
-	b	.L1806
+	b	.L1850
 	.size	micron_read_retrial, .-micron_read_retrial
 	.section	.text.toshiba_3d_read_retrial,"ax",@progbits
 	.align	2
@@ -11248,7 +11485,7 @@ toshiba_3d_read_retrial:
 	mov	w1, 10
 	csel	w0, w1, w0, ne
 	str	w0, [x29, 136]
-	cbnz	w19, .L1826
+	cbnz	w19, .L1870
 	add	x0, x22, :lo12:.LANCHOR16
 	str	x0, [x29, 120]
 	sxtw	x0, w23
@@ -11257,11 +11494,11 @@ toshiba_3d_read_retrial:
 	mov	w20, 1
 	add	x0, x25, x0, lsl 8
 	str	x0, [x29, 112]
-.L1833:
+.L1877:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, 36
-	bne	.L1827
+	bne	.L1871
 	mov	w1, w20
 	mov	x0, x21
 	mov	w2, 0
@@ -11269,7 +11506,7 @@ toshiba_3d_read_retrial:
 	ldr	x1, [x29, 112]
 	mov	w0, 93
 	str	w0, [x1, 8]
-.L1828:
+.L1872:
 	mov	w4, w28
 	mov	x3, x27
 	mov	x2, x26
@@ -11279,60 +11516,60 @@ toshiba_3d_read_retrial:
 	mov	w4, w0
 	adrp	x0, .LANCHOR19
 	ldr	w0, [x0, #:lo12:.LANCHOR19]
-	tbz	x0, 4, .L1829
+	tbz	x0, 4, .L1873
 	mov	w3, w4
 	str	w4, [x29, 108]
 	mov	w2, w24
 	mov	w1, w20
-	adrp	x0, .LC114
-	add	x0, x0, :lo12:.LC114
+	adrp	x0, .LC111
+	add	x0, x0, :lo12:.LC111
 	bl	printf
 	ldr	w4, [x29, 108]
-.L1829:
+.L1873:
 	cmn	w4, #1
-	beq	.L1830
-	adrp	x0, .LANCHOR163
+	beq	.L1874
+	adrp	x0, .LANCHOR164
 	cmn	w19, #1
 	csel	w19, w19, w4, ne
-	ldr	x26, [x0, #:lo12:.LANCHOR163]
-	adrp	x0, .LANCHOR165
-	ldr	x27, [x0, #:lo12:.LANCHOR165]
+	ldr	x26, [x0, #:lo12:.LANCHOR164]
+	adrp	x0, .LANCHOR166
+	ldr	x27, [x0, #:lo12:.LANCHOR166]
 	adrp	x0, .LANCHOR49
 	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1848
-.L1830:
+	bcc	.L1892
+.L1874:
 	ldr	w0, [x29, 136]
 	add	w20, w20, 1
 	cmp	w0, w20
-	bne	.L1833
-.L1832:
+	bne	.L1877
+.L1876:
 	ldrb	w0, [x22, #:lo12:.LANCHOR16]
 	cmp	w0, 36
-	bne	.L1834
+	bne	.L1878
 	mov	w2, 0
-.L1871:
+.L1915:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_tlc_set_rr_para
-	b	.L1835
-.L1827:
+	b	.L1879
+.L1871:
 	mov	w1, w20
 	mov	x0, x21
 	bl	toshiba_3d_set_slc_rr_para
-	b	.L1828
-.L1848:
+	b	.L1872
+.L1892:
 	mov	w19, w4
-	b	.L1832
-.L1834:
+	b	.L1876
+.L1878:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_3d_set_slc_rr_para
-.L1835:
+.L1879:
 	ldrb	w0, [x22, #:lo12:.LANCHOR16]
 	cmp	w0, 36
-	bne	.L1844
+	bne	.L1888
 	ldr	x0, [x29, 128]
 	add	x25, x25, x0, lsl 8
 	mov	w0, 85
@@ -11341,27 +11578,27 @@ toshiba_3d_read_retrial:
 	str	wzr, [x25, 2052]
 	str	wzr, [x25, 2048]
 	str	w0, [x25, 2056]
-.L1844:
+.L1888:
 	adrp	x0, .LANCHOR49
 	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L1845
+	bcc	.L1889
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L1845:
+.L1889:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L1846
-	adrp	x0, .LC116
+	bne	.L1890
+	adrp	x0, .LC113
 	mov	w4, w19
 	mov	w3, w20
 	mov	w2, w24
 	mov	w1, w23
-	add	x0, x0, :lo12:.LC116
+	add	x0, x0, :lo12:.LC113
 	bl	printf
-.L1846:
+.L1890:
 	bl	nandc_wait_flash_ready
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
@@ -11371,7 +11608,7 @@ toshiba_3d_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1826:
+.L1870:
 	add	x0, x22, :lo12:.LANCHOR16
 	str	x0, [x29, 112]
 	sxtw	x0, w23
@@ -11380,17 +11617,17 @@ toshiba_3d_read_retrial:
 	mov	w20, 1
 	add	x0, x25, x0, lsl 8
 	str	x0, [x29, 136]
-.L1842:
+.L1886:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
 	cmp	w0, 36
-	bne	.L1836
+	bne	.L1880
 	mov	x0, x21
 	mov	w2, 1
 	mov	w1, w20
 	bl	toshiba_tlc_set_rr_para
 	mov	w0, 93
-.L1870:
+.L1914:
 	ldr	x1, [x29, 136]
 	mov	w4, w28
 	mov	x3, x27
@@ -11402,54 +11639,54 @@ toshiba_3d_read_retrial:
 	mov	w4, w0
 	adrp	x0, .LANCHOR19
 	ldr	w0, [x0, #:lo12:.LANCHOR19]
-	tbz	x0, 4, .L1838
+	tbz	x0, 4, .L1882
 	mov	w3, w4
 	str	w4, [x29, 108]
 	mov	w2, w24
 	mov	w1, w20
-	adrp	x0, .LC115
-	add	x0, x0, :lo12:.LC115
+	adrp	x0, .LC112
+	add	x0, x0, :lo12:.LC112
 	bl	printf
 	ldr	w4, [x29, 108]
-.L1838:
+.L1882:
 	cmn	w4, #1
-	beq	.L1839
-	adrp	x0, .LANCHOR163
+	beq	.L1883
+	adrp	x0, .LANCHOR164
 	cmn	w19, #1
 	csel	w19, w19, w4, ne
-	ldr	x26, [x0, #:lo12:.LANCHOR163]
-	adrp	x0, .LANCHOR165
-	ldr	x27, [x0, #:lo12:.LANCHOR165]
+	ldr	x26, [x0, #:lo12:.LANCHOR164]
+	adrp	x0, .LANCHOR166
+	ldr	x27, [x0, #:lo12:.LANCHOR166]
 	adrp	x0, .LANCHOR49
 	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1849
-.L1839:
+	bcc	.L1893
+.L1883:
 	ldr	w0, [x29, 120]
 	add	w20, w20, 1
 	cmp	w0, w20
-	bne	.L1842
-.L1841:
+	bne	.L1886
+.L1885:
 	ldrb	w0, [x22, #:lo12:.LANCHOR16]
 	cmp	w0, 36
-	bne	.L1843
+	bne	.L1887
 	mov	w2, 1
-	b	.L1871
-.L1836:
+	b	.L1915
+.L1880:
 	mov	x0, x21
 	mov	w1, w20
 	bl	toshiba_3d_set_tlc_rr_para
 	mov	w0, 38
-	b	.L1870
-.L1849:
+	b	.L1914
+.L1893:
 	mov	w19, w4
-	b	.L1841
-.L1843:
+	b	.L1885
+.L1887:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_3d_set_tlc_rr_para
-	b	.L1835
+	b	.L1879
 	.size	toshiba_3d_read_retrial, .-toshiba_3d_read_retrial
 	.section	.text.toshiba_read_retrial,"ax",@progbits
 	.align	2
@@ -11485,35 +11722,35 @@ toshiba_read_retrial:
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
-	bls	.L1890
+	bls	.L1934
 	adrp	x0, .LANCHOR26
 	ldrb	w0, [x0, #:lo12:.LANCHOR26]
-	cbz	w0, .L1891
+	cbz	w0, .L1935
 	mov	w23, 1
 	mov	w0, 1
 	bl	nandc_set_if_mode
-.L1874:
+.L1918:
 	and	x0, x19, 255
 	mov	w1, 92
 	add	x0, x22, x0, lsl 8
 	str	w1, [x0, 2056]
 	mov	w1, 197
 	str	w1, [x0, 2056]
-.L1873:
+.L1917:
 	sxtw	x0, w19
 	mov	w20, 1
 	add	x0, x0, 8
 	mov	w24, -1
 	add	x0, x22, x0, lsl 8
 	str	x0, [x29, 96]
-.L1875:
-	adrp	x0, .LANCHOR166
-	ldrb	w0, [x0, #:lo12:.LANCHOR166]
+.L1919:
+	adrp	x0, .LANCHOR167
+	ldrb	w0, [x0, #:lo12:.LANCHOR167]
 	add	w0, w0, 1
 	cmp	w20, w0
-	bcc	.L1884
+	bcc	.L1928
 	mov	w28, w24
-.L1883:
+.L1927:
 	ldr	x0, [x29, 120]
 	mov	w1, 0
 	ldrb	w0, [x0, #:lo12:.LANCHOR16]
@@ -11521,9 +11758,9 @@ toshiba_read_retrial:
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x21
-	bhi	.L1885
+	bhi	.L1929
 	bl	sandisk_set_rr_para
-.L1886:
+.L1930:
 	sxtw	x19, w19
 	mov	w0, 255
 	add	x19, x19, 8
@@ -11533,27 +11770,27 @@ toshiba_read_retrial:
 	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L1887
+	bcc	.L1931
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L1887:
+.L1931:
 	cmp	w28, 256
 	ccmn	w28, #1, 4, ne
-	bne	.L1888
-	adrp	x0, .LC116
+	bne	.L1932
+	adrp	x0, .LC113
 	mov	w4, w28
 	mov	w3, w20
 	mov	w2, w25
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC116
+	add	x0, x0, :lo12:.LC113
 	bl	printf
-.L1888:
+.L1932:
 	bl	nandc_wait_flash_ready
-	cbz	w23, .L1872
+	cbz	w23, .L1916
 	mov	w0, 4
 	bl	nandc_set_if_mode
-.L1872:
+.L1916:
 	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11562,13 +11799,13 @@ toshiba_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1891:
+.L1935:
 	mov	w23, 0
-	b	.L1874
-.L1890:
+	b	.L1918
+.L1934:
 	mov	w23, 0
-	b	.L1873
-.L1884:
+	b	.L1917
+.L1928:
 	ldr	x0, [x29, 120]
 	mov	w1, w20
 	ldrb	w0, [x0, #:lo12:.LANCHOR16]
@@ -11576,22 +11813,22 @@ toshiba_read_retrial:
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x21
-	bhi	.L1876
+	bhi	.L1920
 	bl	sandisk_set_rr_para
-.L1877:
+.L1921:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0, #:lo12:.LANCHOR16]
 	cmp	w0, 34
-	bne	.L1878
-	adrp	x0, .LANCHOR166
-	ldrb	w0, [x0, #:lo12:.LANCHOR166]
+	bne	.L1922
+	adrp	x0, .LANCHOR167
+	ldrb	w0, [x0, #:lo12:.LANCHOR167]
 	sub	w0, w0, #3
 	cmp	w20, w0
-	bne	.L1878
+	bne	.L1922
 	ldr	x1, [x29, 96]
 	mov	w0, 179
 	str	w0, [x1, 8]
-.L1878:
+.L1922:
 	ldr	x0, [x29, 104]
 	mov	w1, 38
 	ldr	w4, [x29, 116]
@@ -11606,27 +11843,27 @@ toshiba_read_retrial:
 	bl	flash_read_page
 	mov	w28, w0
 	cmn	w0, #1
-	beq	.L1881
+	beq	.L1925
 	cmn	w24, #1
 	csel	w24, w24, w0, ne
-	adrp	x0, .LANCHOR163
-	ldr	x26, [x0, #:lo12:.LANCHOR163]
-	adrp	x0, .LANCHOR165
-	ldr	x27, [x0, #:lo12:.LANCHOR165]
+	adrp	x0, .LANCHOR164
+	ldr	x26, [x0, #:lo12:.LANCHOR164]
+	adrp	x0, .LANCHOR166
+	ldr	x27, [x0, #:lo12:.LANCHOR166]
 	adrp	x0, .LANCHOR49
 	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L1883
-.L1881:
+	bcc	.L1927
+.L1925:
 	add	w20, w20, 1
-	b	.L1875
-.L1876:
+	b	.L1919
+.L1920:
 	bl	toshiba_set_rr_para
-	b	.L1877
-.L1885:
+	b	.L1921
+.L1929:
 	bl	toshiba_set_rr_para
-	b	.L1886
+	b	.L1930
 	.size	toshiba_read_retrial, .-toshiba_read_retrial
 	.section	.text.ymtc_3d_read_retrial,"ax",@progbits
 	.align	2
@@ -11657,13 +11894,13 @@ ymtc_3d_read_retrial:
 	adrp	x27, .LANCHOR49
 	ldr	x21, [x1, #:lo12:.LANCHOR7]
 	mov	w20, 1
-	adrp	x28, .LANCHOR163
-	adrp	x5, .LANCHOR165
+	adrp	x28, .LANCHOR164
+	adrp	x5, .LANCHOR166
 	add	x21, x21, x0
 	add	x27, x27, :lo12:.LANCHOR49
 	tst	x23, 50331648
-	bne	.L1914
-.L1909:
+	bne	.L1958
+.L1953:
 	str	x5, [x29, 104]
 	mov	w1, w20
 	mov	x0, x21
@@ -11676,44 +11913,44 @@ ymtc_3d_read_retrial:
 	bl	flash_read_page
 	ldr	x5, [x29, 104]
 	cmn	w0, #1
-	beq	.L1906
+	beq	.L1950
 	ldrb	w1, [x27]
 	cmn	w19, #1
 	csel	w19, w19, w0, ne
-	ldr	x24, [x28, #:lo12:.LANCHOR163]
-	ldr	x25, [x5, #:lo12:.LANCHOR165]
+	ldr	x24, [x28, #:lo12:.LANCHOR164]
+	ldr	x25, [x5, #:lo12:.LANCHOR166]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L1917
-.L1906:
+	bcc	.L1961
+.L1950:
 	add	w20, w20, 1
 	cmp	w20, 10
-	bne	.L1909
-.L1908:
+	bne	.L1953
+.L1952:
 	mov	w1, 0
 	mov	x0, x21
 	bl	ymtc_3d_set_slc_rr_para
-.L1910:
+.L1954:
 	adrp	x0, .LANCHOR49
 	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L1915
+	bcc	.L1959
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L1915:
+.L1959:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L1916
-	adrp	x0, .LC117
+	bne	.L1960
+	adrp	x0, .LC114
 	mov	w4, w19
 	mov	w3, w20
 	mov	w2, w23
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC117
+	add	x0, x0, :lo12:.LC114
 	bl	printf
-.L1916:
+.L1960:
 	bl	nandc_wait_flash_ready
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
@@ -11723,10 +11960,10 @@ ymtc_3d_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1917:
+.L1961:
 	mov	w19, w0
-	b	.L1908
-.L1914:
+	b	.L1952
+.L1958:
 	str	x5, [x29, 104]
 	mov	w1, w20
 	mov	x0, x21
@@ -11739,27 +11976,27 @@ ymtc_3d_read_retrial:
 	bl	flash_read_page
 	ldr	x5, [x29, 104]
 	cmn	w0, #1
-	beq	.L1911
+	beq	.L1955
 	ldrb	w1, [x27]
 	cmn	w19, #1
 	csel	w19, w19, w0, ne
-	ldr	x24, [x28, #:lo12:.LANCHOR163]
-	ldr	x25, [x5, #:lo12:.LANCHOR165]
+	ldr	x24, [x28, #:lo12:.LANCHOR164]
+	ldr	x25, [x5, #:lo12:.LANCHOR166]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L1918
-.L1911:
+	bcc	.L1962
+.L1955:
 	add	w20, w20, 1
 	cmp	w20, 51
-	bne	.L1914
-.L1913:
+	bne	.L1958
+.L1957:
 	mov	w1, 0
 	mov	x0, x21
 	bl	ymtc_3d_set_tlc_rr_para
-	b	.L1910
-.L1918:
+	b	.L1954
+.L1962:
 	mov	w19, w0
-	b	.L1913
+	b	.L1957
 	.size	ymtc_3d_read_retrial, .-ymtc_3d_read_retrial
 	.section	.text.samsung_read_retrial,"ax",@progbits
 	.align	2
@@ -11787,15 +12024,15 @@ samsung_read_retrial:
 	tst	x20, 50331648
 	and	x5, x21, 255
 	ldr	x0, [x0, #:lo12:.LANCHOR7]
-	bne	.L1934
-	adrp	x24, .LANCHOR167
-	adrp	x27, .LC118
+	bne	.L1978
+	adrp	x24, .LANCHOR168
+	adrp	x27, .LC115
 	add	x28, x0, x5, lsl 8
-	add	x24, x24, :lo12:.LANCHOR167
-	add	x27, x27, :lo12:.LC118
+	add	x24, x24, :lo12:.LANCHOR168
+	add	x27, x27, :lo12:.LC115
 	mov	x26, 0
 	mov	w25, -1
-.L1939:
+.L1983:
 	mov	w0, 239
 	str	w0, [x28, 2056]
 	mov	w0, 141
@@ -11817,7 +12054,7 @@ samsung_read_retrial:
 	mov	w4, w0
 	adrp	x0, .LANCHOR19
 	ldr	w0, [x0, #:lo12:.LANCHOR19]
-	tbz	x0, 4, .L1935
+	tbz	x0, 4, .L1979
 	mov	w3, w4
 	str	w4, [x29, 104]
 	mov	w2, w20
@@ -11825,26 +12062,26 @@ samsung_read_retrial:
 	mov	x0, x27
 	bl	printf
 	ldr	w4, [x29, 104]
-.L1935:
+.L1979:
 	cmn	w4, #1
-	beq	.L1936
-	adrp	x0, .LANCHOR163
+	beq	.L1980
+	adrp	x0, .LANCHOR164
 	cmn	w25, #1
 	csel	w25, w25, w4, ne
-	ldr	x22, [x0, #:lo12:.LANCHOR163]
-	adrp	x0, .LANCHOR165
-	ldr	x23, [x0, #:lo12:.LANCHOR165]
+	ldr	x22, [x0, #:lo12:.LANCHOR164]
+	adrp	x0, .LANCHOR166
+	ldr	x23, [x0, #:lo12:.LANCHOR166]
 	adrp	x0, .LANCHOR49
 	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1948
-.L1936:
+	bcc	.L1992
+.L1980:
 	add	x26, x26, 1
 	cmp	x26, 25
-	bne	.L1939
+	bne	.L1983
 	mov	w19, 26
-.L1938:
+.L1982:
 	mov	w0, 239
 	str	w0, [x28, 2056]
 	mov	w0, 141
@@ -11853,28 +12090,28 @@ samsung_read_retrial:
 	str	wzr, [x28, 2048]
 	str	wzr, [x28, 2048]
 	str	wzr, [x28, 2048]
-.L1970:
+.L2014:
 	bl	nandc_wait_flash_ready
 	adrp	x0, .LANCHOR49
 	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	add	w0, w0, w0, lsl 1
 	cmp	w25, w0, lsr 2
-	bcc	.L1946
+	bcc	.L1990
 	cmn	w25, #1
 	mov	w0, 256
 	csel	w25, w25, w0, eq
-.L1946:
+.L1990:
 	cmp	w25, 256
 	ccmn	w25, #1, 4, ne
-	bne	.L1947
-	adrp	x0, .LC120
+	bne	.L1991
+	adrp	x0, .LC117
 	mov	w4, w25
 	mov	w3, w19
 	mov	w2, w20
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC120
+	add	x0, x0, :lo12:.LC117
 	bl	printf
-.L1947:
+.L1991:
 	bl	nandc_wait_flash_ready
 	mov	w0, w25
 	ldp	x19, x20, [sp, 16]
@@ -11884,20 +12121,20 @@ samsung_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1948:
+.L1992:
 	mov	w25, w4
-	b	.L1938
-.L1934:
-	adrp	x7, .LANCHOR168
-	add	x7, x7, :lo12:.LANCHOR168
-	adrp	x24, .LC119
+	b	.L1982
+.L1978:
+	adrp	x7, .LANCHOR169
+	add	x7, x7, :lo12:.LANCHOR169
+	adrp	x24, .LC116
 	add	x28, x7, 4
 	add	x27, x0, x5, lsl 8
-	add	x24, x24, :lo12:.LC119
+	add	x24, x24, :lo12:.LC116
 	mov	w25, -1
 	mov	w19, 1
 	mov	w26, 137
-.L1945:
+.L1989:
 	mov	w0, 239
 	str	w0, [x27, 2056]
 	str	w26, [x27, 2052]
@@ -11919,7 +12156,7 @@ samsung_read_retrial:
 	mov	w4, w0
 	adrp	x0, .LANCHOR19
 	ldr	w0, [x0, #:lo12:.LANCHOR19]
-	tbz	x0, 4, .L1941
+	tbz	x0, 4, .L1985
 	mov	w3, w4
 	str	w4, [x29, 104]
 	mov	w2, w20
@@ -11927,26 +12164,26 @@ samsung_read_retrial:
 	mov	x0, x24
 	bl	printf
 	ldr	w4, [x29, 104]
-.L1941:
+.L1985:
 	cmn	w4, #1
-	beq	.L1942
-	adrp	x0, .LANCHOR163
+	beq	.L1986
+	adrp	x0, .LANCHOR164
 	cmn	w25, #1
 	csel	w25, w25, w4, ne
-	ldr	x22, [x0, #:lo12:.LANCHOR163]
-	adrp	x0, .LANCHOR165
-	ldr	x23, [x0, #:lo12:.LANCHOR165]
+	ldr	x22, [x0, #:lo12:.LANCHOR164]
+	adrp	x0, .LANCHOR166
+	ldr	x23, [x0, #:lo12:.LANCHOR166]
 	adrp	x0, .LANCHOR49
 	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1949
-.L1942:
+	bcc	.L1993
+.L1986:
 	add	w19, w19, 1
 	add	x28, x28, 4
 	cmp	w19, 26
-	bne	.L1945
-.L1944:
+	bne	.L1989
+.L1988:
 	mov	w0, 239
 	str	w0, [x27, 2056]
 	mov	w0, 137
@@ -11955,10 +12192,10 @@ samsung_read_retrial:
 	str	wzr, [x27, 2048]
 	str	wzr, [x27, 2048]
 	str	wzr, [x27, 2048]
-	b	.L1970
-.L1949:
+	b	.L2014
+.L1993:
 	mov	w25, w4
-	b	.L1944
+	b	.L1988
 	.size	samsung_read_retrial, .-samsung_read_retrial
 	.section	.text.hynix_read_retrial,"ax",@progbits
 	.align	2
@@ -11993,34 +12230,34 @@ hynix_read_retrial:
 	adrp	x6, .LANCHOR49
 	add	x6, x6, :lo12:.LANCHOR49
 	mov	w5, 0
-	adrp	x7, .LANCHOR163
-	adrp	x8, .LANCHOR165
-.L1972:
+	adrp	x7, .LANCHOR164
+	adrp	x8, .LANCHOR166
+.L2016:
 	cmp	w5, w24
-	bcc	.L1977
-.L1976:
+	bcc	.L2021
+.L2020:
 	adrp	x0, .LANCHOR49
 	add	x23, x28, x23
 	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	strb	w20, [x23, 8]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L1978
+	bcc	.L2022
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L1978:
+.L2022:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L1979
-	adrp	x0, .LC121
+	bne	.L2023
+	adrp	x0, .LC118
 	mov	w4, w19
 	mov	w3, w5
 	mov	w2, w22
 	mov	w1, w5
-	add	x0, x0, :lo12:.LC121
+	add	x0, x0, :lo12:.LC118
 	bl	printf
-.L1979:
+.L2023:
 	bl	nandc_wait_flash_ready
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
@@ -12030,7 +12267,7 @@ hynix_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1977:
+.L2021:
 	add	w20, w20, 1
 	stp	x6, x8, [x29, 96]
 	and	w20, w20, 255
@@ -12051,21 +12288,21 @@ hynix_read_retrial:
 	cmn	w0, #1
 	ldp	x6, x8, [x29, 96]
 	ldr	x7, [x29, 112]
-	beq	.L1974
+	beq	.L2018
 	ldrb	w1, [x6]
 	cmn	w19, #1
 	csel	w19, w19, w0, ne
-	ldr	x25, [x7, #:lo12:.LANCHOR163]
-	ldr	x26, [x8, #:lo12:.LANCHOR165]
+	ldr	x25, [x7, #:lo12:.LANCHOR164]
+	ldr	x26, [x8, #:lo12:.LANCHOR166]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L1980
-.L1974:
+	bcc	.L2024
+.L2018:
 	add	w5, w5, 1
-	b	.L1972
-.L1980:
+	b	.L2016
+.L2024:
 	mov	w19, w0
-	b	.L1976
+	b	.L2020
 	.size	hynix_read_retrial, .-hynix_read_retrial
 	.section	.text.flash_ddr_tuning_read,"ax",@progbits
 	.align	2
@@ -12093,15 +12330,15 @@ flash_ddr_tuning_read:
 	mov	w28, 0
 	str	x0, [x29, 120]
 	mov	w26, 0
-	adrp	x0, .LC122
+	adrp	x0, .LC119
 	mov	w27, 0
-	add	x0, x0, :lo12:.LC122
+	add	x0, x0, :lo12:.LC119
 	mov	w19, 1024
 	mov	w21, -1
 	mov	w7, 6
 	str	wzr, [x29, 140]
 	str	x0, [x29, 112]
-.L1996:
+.L2040:
 	mov	w0, w7
 	str	w7, [x29, 128]
 	bl	nandc_set_ddr_para
@@ -12115,7 +12352,7 @@ flash_ddr_tuning_read:
 	ldr	x0, [x29, 120]
 	ldr	w7, [x29, 128]
 	ldr	w0, [x0]
-	tbz	x0, 4, .L1991
+	tbz	x0, 4, .L2035
 	ldr	x0, [x29, 112]
 	mov	w3, w4
 	mov	w1, w7
@@ -12125,50 +12362,50 @@ flash_ddr_tuning_read:
 	bl	printf
 	ldr	w4, [x29, 108]
 	ldr	w7, [x29, 128]
-.L1991:
+.L2035:
 	add	w0, w19, 1
 	cmp	w4, w0
-	bhi	.L1992
-	adrp	x0, .LANCHOR163
-	ldr	x23, [x0, #:lo12:.LANCHOR163]
-	adrp	x0, .LANCHOR165
-	ldr	x24, [x0, #:lo12:.LANCHOR165]
+	bhi	.L2036
+	adrp	x0, .LANCHOR164
+	ldr	x23, [x0, #:lo12:.LANCHOR164]
+	adrp	x0, .LANCHOR166
+	ldr	x24, [x0, #:lo12:.LANCHOR166]
 	ldrb	w0, [x25]
 	cmp	w4, w0, lsr 2
-	bcs	.L2002
+	bcs	.L2046
 	add	w27, w27, 1
 	cmp	w27, 7
-	bls	.L2002
+	bls	.L2046
 	sub	w28, w7, w27
 	mov	w19, w4
 	mov	w21, 0
-.L1994:
+.L2038:
 	ldr	w0, [x29, 140]
 	cmp	w27, w26
 	csel	w28, w28, w0, cs
-.L1995:
-	cbz	w28, .L1997
+.L2039:
+	cbz	w28, .L2041
 	adrp	x0, .LANCHOR49
 	mov	w1, 3
 	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	udiv	w0, w0, w1
 	cmp	w0, w19
-	bls	.L1997
+	bls	.L2041
 	mov	w1, w28
-	adrp	x0, .LC123
-	add	x0, x0, :lo12:.LC123
+	adrp	x0, .LC120
+	add	x0, x0, :lo12:.LC120
 	bl	printf
 	mov	w0, w28
-.L2016:
+.L2060:
 	bl	nandc_set_ddr_para
-	cbz	w21, .L1990
+	cbz	w21, .L2034
 	adrp	x25, .LANCHOR48
 	ldrb	w0, [x25, #:lo12:.LANCHOR48]
-	tbz	x0, 0, .L1990
+	tbz	x0, 0, .L2034
 	mov	w2, w22
 	mov	w1, w20
-	adrp	x0, .LC124
-	add	x0, x0, :lo12:.LC124
+	adrp	x0, .LC121
+	add	x0, x0, :lo12:.LC121
 	bl	printf
 	mov	w0, w20
 	bl	flash_reset
@@ -12192,22 +12429,22 @@ flash_ddr_tuning_read:
 	mov	w3, w0
 	mov	w2, w22
 	mov	w1, w20
-	adrp	x0, .LC125
-	add	x0, x0, :lo12:.LC125
+	adrp	x0, .LC122
+	add	x0, x0, :lo12:.LC122
 	bl	printf
 	adrp	x0, .LANCHOR49
 	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	cmp	w19, w0
-	bhi	.L2004
-	adrp	x1, .LANCHOR169
-	ldr	w0, [x1, #:lo12:.LANCHOR169]
+	bhi	.L2048
+	adrp	x1, .LANCHOR170
+	ldr	w0, [x1, #:lo12:.LANCHOR170]
 	add	w0, w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR169]
+	str	w0, [x1, #:lo12:.LANCHOR170]
 	cmp	w0, 100
-	bls	.L2000
+	bls	.L2044
 	adrp	x0, .LANCHOR26
 	strb	wzr, [x0, #:lo12:.LANCHOR26]
-.L1990:
+.L2034:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -12216,37 +12453,37 @@ flash_ddr_tuning_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1992:
+.L2036:
 	cmp	w27, w26
-	bls	.L2003
+	bls	.L2047
 	sub	w0, w28, w27
 	str	w0, [x29, 140]
 	cmp	w27, 7
-	bhi	.L1995
+	bhi	.L2039
 	mov	w26, w27
-.L2003:
+.L2047:
 	mov	w27, 0
-	b	.L1993
-.L2002:
+	b	.L2037
+.L2046:
 	mov	w28, w7
 	mov	w19, w4
 	mov	w21, 0
-.L1993:
+.L2037:
 	add	w7, w7, 2
 	cmp	w7, 50
-	bne	.L1996
-	b	.L1994
-.L1997:
+	bne	.L2040
+	b	.L2038
+.L2041:
 	ldrb	w0, [x29, 132]
-	b	.L2016
-.L2004:
+	b	.L2060
+.L2048:
 	mov	w19, w21
-.L2000:
+.L2044:
 	ldrb	w0, [x25, #:lo12:.LANCHOR48]
 	bl	flash_set_interface_mode
 	ldrb	w0, [x25, #:lo12:.LANCHOR48]
 	bl	nandc_set_if_mode
-	b	.L1990
+	b	.L2034
 	.size	flash_ddr_tuning_read, .-flash_ddr_tuning_read
 	.section	.text.flash_read_page_en,"ax",@progbits
 	.align	2
@@ -12268,59 +12505,59 @@ flash_read_page_en:
 	mov	w24, w4
 	mov	x25, x0
 	cmp	w1, w20
-	bhi	.L2018
-	adrp	x1, .LANCHOR170
+	bhi	.L2062
+	adrp	x1, .LANCHOR171
 	adrp	x0, .LC0
 	mov	w2, 431
-	add	x1, x1, :lo12:.LANCHOR170
+	add	x1, x1, :lo12:.LANCHOR171
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2018:
+.L2062:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w4, [x25, #:lo12:.LANCHOR23]
 	ldrb	w21, [x0, w20, sxtw]
 	cmp	w20, w4
-	bcc	.L2019
+	bcc	.L2063
 	adrp	x0, .LANCHOR19
 	ldr	w0, [x0, #:lo12:.LANCHOR19]
-	tbnz	x0, 6, .L2020
-.L2044:
+	tbnz	x0, 6, .L2064
+.L2088:
 	mov	w0, -1
-.L2017:
+.L2061:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2020:
+.L2064:
 	mov	w3, w19
 	mov	w2, w20
 	mov	w1, w21
-	adrp	x0, .LC126
-	add	x0, x0, :lo12:.LC126
+	adrp	x0, .LC123
+	add	x0, x0, :lo12:.LC123
 	bl	printf
-	b	.L2044
-.L2019:
+	b	.L2088
+.L2063:
 	tst	x19, 50331648
-	bne	.L2022
+	bne	.L2066
 	adrp	x0, .LANCHOR0
 	adrp	x1, .LANCHOR1
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L2023
+	cbz	w0, .L2067
 	ldrb	w0, [x1, #:lo12:.LANCHOR1]
-	cbz	w0, .L2022
-.L2023:
+	cbz	w0, .L2066
+.L2067:
 	adrp	x0, .LANCHOR2
 	ldrb	w1, [x1, #:lo12:.LANCHOR1]
 	ldrh	w2, [x0, #:lo12:.LANCHOR2]
 	udiv	w0, w19, w2
 	mul	w0, w0, w2
 	sub	w19, w19, w0
-	cbz	w1, .L2024
+	cbz	w1, .L2068
 	add	w19, w0, w19, lsl 1
-.L2022:
+.L2066:
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -12328,25 +12565,25 @@ flash_read_page_en:
 	mov	w0, w21
 	bl	flash_read_page
 	cmn	w0, #1
-	bne	.L2017
+	bne	.L2061
 	adrp	x20, .LANCHOR51
 	ldrb	w25, [x20, #:lo12:.LANCHOR51]
-	cbnz	w25, .L2025
-.L2028:
-	adrp	x0, .LANCHOR171
-	ldr	x5, [x0, #:lo12:.LANCHOR171]
-	cbnz	x5, .L2026
-.L2027:
+	cbnz	w25, .L2069
+.L2072:
+	adrp	x0, .LANCHOR172
+	ldr	x5, [x0, #:lo12:.LANCHOR172]
+	cbnz	x5, .L2070
+.L2071:
 	ldrb	w4, [x20, #:lo12:.LANCHOR51]
 	mov	w3, -1
 	mov	w2, w19
 	mov	w1, 0
-	adrp	x0, .LC127
-	add	x0, x0, :lo12:.LC127
+	adrp	x0, .LC124
+	add	x0, x0, :lo12:.LC124
 	bl	printf
 	adrp	x0, .LANCHOR26
 	ldrb	w0, [x0, #:lo12:.LANCHOR26]
-	cbz	w0, .L2044
+	cbz	w0, .L2088
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -12358,13 +12595,13 @@ flash_read_page_en:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	b	flash_ddr_tuning_read
-.L2024:
+.L2068:
 	adrp	x1, .LANCHOR3
 	add	x1, x1, :lo12:.LANCHOR3
 	ldrh	w19, [x1, w19, uxtw 1]
 	add	w19, w19, w0
-	b	.L2022
-.L2025:
+	b	.L2066
+.L2069:
 	strb	wzr, [x20, #:lo12:.LANCHOR51]
 	mov	w4, w24
 	mov	x3, x23
@@ -12374,9 +12611,9 @@ flash_read_page_en:
 	bl	flash_read_page
 	strb	w25, [x20, #:lo12:.LANCHOR51]
 	cmn	w0, #1
-	beq	.L2028
-	b	.L2017
-.L2026:
+	beq	.L2072
+	b	.L2061
+.L2070:
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -12384,8 +12621,8 @@ flash_read_page_en:
 	mov	w0, w21
 	blr	x5
 	cmn	w0, #1
-	beq	.L2027
-	b	.L2017
+	beq	.L2071
+	b	.L2061
 	.size	flash_read_page_en, .-flash_read_page_en
 	.section	.text.flash_get_last_written_page,"ax",@progbits
 	.align	2
@@ -12396,11 +12633,11 @@ flash_get_last_written_page:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	w23, w0, 255
-	adrp	x0, .LANCHOR144
+	adrp	x0, .LANCHOR145
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
 	mov	x24, x2
-	ldrh	w19, [x0, #:lo12:.LANCHOR144]
+	ldrh	w19, [x0, #:lo12:.LANCHOR145]
 	adrp	x0, .LANCHOR32+26
 	stp	x21, x22, [sp, 32]
 	and	w21, w1, 65535
@@ -12415,23 +12652,23 @@ flash_get_last_written_page:
 	add	w1, w19, w26
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L2046
+	bne	.L2090
 	mov	w27, 0
 	mov	w28, 2
-.L2047:
+.L2091:
 	cmp	w27, w19
-	ble	.L2050
-.L2046:
+	ble	.L2094
+.L2090:
 	adrp	x0, .LANCHOR19
 	ldr	w0, [x0, #:lo12:.LANCHOR19]
-	tbz	x0, 12, .L2051
+	tbz	x0, 12, .L2095
 	ldr	w3, [x22]
-	adrp	x0, .LC128
+	adrp	x0, .LC125
 	mov	w2, w19
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC128
+	add	x0, x0, :lo12:.LC125
 	bl	printf
-.L2051:
+.L2095:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -12440,7 +12677,7 @@ flash_get_last_written_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2050:
+.L2094:
 	add	w20, w27, w19
 	mov	w4, w25
 	mov	x3, x22
@@ -12450,14 +12687,14 @@ flash_get_last_written_page:
 	add	w1, w26, w20, sxth
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L2048
+	bne	.L2092
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L2047
-.L2048:
+	b	.L2091
+.L2092:
 	add	w20, w20, 1
 	sxth	w27, w20
-	b	.L2047
+	b	.L2091
 	.size	flash_get_last_written_page, .-flash_get_last_written_page
 	.section	.text.flash_get_last_written_page_ext,"ax",@progbits
 	.align	2
@@ -12470,8 +12707,8 @@ flash_get_last_written_page_ext:
 	mov	w6, 1
 	ldrb	w4, [x4, #:lo12:.LANCHOR31]
 	sub	w5, w5, w4
-	adrp	x4, .LANCHOR74
-	ldrh	w4, [x4, #:lo12:.LANCHOR74]
+	adrp	x4, .LANCHOR80
+	ldrh	w4, [x4, #:lo12:.LANCHOR80]
 	sub	w5, w5, w4
 	mov	w4, w3
 	mov	x3, x2
@@ -12500,34 +12737,34 @@ flash_ddr_para_scan:
 	mov	w23, w1
 	str	x25, [sp, 64]
 	strb	w21, [x19, #:lo12:.LANCHOR26]
-	adrp	x24, .LANCHOR173
+	adrp	x24, .LANCHOR174
 	bl	flash_set_interface_mode
-	adrp	x25, .LANCHOR172
+	adrp	x25, .LANCHOR173
 	ldrb	w0, [x20, #:lo12:.LANCHOR48]
 	bl	nandc_set_if_mode
-	ldr	x3, [x25, #:lo12:.LANCHOR172]
+	ldr	x3, [x25, #:lo12:.LANCHOR173]
 	mov	w4, 4
-	ldr	x2, [x24, #:lo12:.LANCHOR173]
+	ldr	x2, [x24, #:lo12:.LANCHOR174]
 	mov	w1, w23
 	mov	w0, w22
 	bl	flash_ddr_tuning_read
-	ldr	x3, [x25, #:lo12:.LANCHOR172]
+	ldr	x3, [x25, #:lo12:.LANCHOR173]
 	mov	w4, 4
-	ldr	x2, [x24, #:lo12:.LANCHOR173]
+	ldr	x2, [x24, #:lo12:.LANCHOR174]
 	mov	w1, w23
 	mov	w0, w22
 	bl	flash_read_page
 	cmn	w0, #1
 	mov	x0, x19
-	bne	.L2058
+	bne	.L2102
 	ldrb	w1, [x20, #:lo12:.LANCHOR48]
-	tbz	x1, 0, .L2058
+	tbz	x1, 0, .L2102
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, w21
 	bl	nandc_set_if_mode
 	strb	wzr, [x19, #:lo12:.LANCHOR26]
-.L2059:
+.L2103:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -12535,10 +12772,10 @@ flash_ddr_para_scan:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2058:
+.L2102:
 	mov	w1, 1
 	strb	w1, [x0, #:lo12:.LANCHOR26]
-	b	.L2059
+	b	.L2103
 	.size	flash_ddr_para_scan, .-flash_ddr_para_scan
 	.section	.text.flash_prog_page,"ax",@progbits
 	.align	2
@@ -12575,9 +12812,9 @@ flash_prog_page:
 	add	x23, x26, x23, lsl 8
 	mov	w0, w21
 	tst	x22, 50331648
-	bne	.L2065
+	bne	.L2109
 	bl	zftl_flash_enter_slc_mode
-.L2066:
+.L2110:
 	add	x19, x26, x19, lsl 8
 	mov	w0, 128
 	str	w0, [x19, 2056]
@@ -12591,10 +12828,10 @@ flash_prog_page:
 	str	w0, [x19, 2052]
 	adrp	x0, .LANCHOR30
 	ldrb	w0, [x0, #:lo12:.LANCHOR30]
-	cbz	w0, .L2067
+	cbz	w0, .L2111
 	lsr	w0, w20, 24
 	str	w0, [x19, 2052]
-.L2067:
+.L2111:
 	mov	w0, w20
 	bl	nandc_set_seed
 	adrp	x0, .LANCHOR32+9
@@ -12610,15 +12847,15 @@ flash_prog_page:
 	mov	x0, x23
 	bl	flash_read_status
 	mov	w3, w0
-	bl	nandc_de_cs.constprop.32
+	bl	nandc_de_cs.constprop.31
 	and	w2, w3, 4
-	tbz	x3, 2, .L2064
+	tbz	x3, 2, .L2108
 	mov	w1, w22
-	adrp	x0, .LC129
-	add	x0, x0, :lo12:.LC129
+	adrp	x0, .LC126
+	add	x0, x0, :lo12:.LC126
 	bl	printf
 	mov	w2, -1
-.L2064:
+.L2108:
 	mov	w0, w2
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -12626,9 +12863,9 @@ flash_prog_page:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2065:
+.L2109:
 	bl	zftl_flash_exit_slc_mode
-	b	.L2066
+	b	.L2110
 	.size	flash_prog_page, .-flash_prog_page
 	.section	.text.flash_test_blk,"ax",@progbits
 	.align	2
@@ -12639,16 +12876,16 @@ flash_test_blk:
 	mov	w2, 32
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR163
+	adrp	x22, .LANCHOR164
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 255
-	ldr	x0, [x22, #:lo12:.LANCHOR163]
-	adrp	x21, .LANCHOR165
+	ldr	x0, [x22, #:lo12:.LANCHOR164]
+	adrp	x21, .LANCHOR166
 	and	w19, w1, 65535
 	str	x23, [sp, 48]
 	mov	w1, 165
 	bl	ftl_memset
-	ldr	x0, [x21, #:lo12:.LANCHOR165]
+	ldr	x0, [x21, #:lo12:.LANCHOR166]
 	mov	w2, 8
 	mov	w1, 90
 	bl	ftl_memset
@@ -12659,10 +12896,10 @@ flash_test_blk:
 	mov	w1, w19
 	bl	flash_erase_block
 	cmn	w0, #1
-	bne	.L2077
-.L2079:
+	bne	.L2121
+.L2123:
 	mov	w21, -1
-.L2078:
+.L2122:
 	mov	w1, w19
 	mov	w0, w20
 	bl	flash_erase_block
@@ -12672,38 +12909,38 @@ flash_test_blk:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2077:
+.L2121:
 	adrp	x23, .LANCHOR32
 	add	x23, x23, :lo12:.LANCHOR32
-	ldr	x3, [x21, #:lo12:.LANCHOR165]
+	ldr	x3, [x21, #:lo12:.LANCHOR166]
 	mov	w1, w19
-	ldr	x2, [x22, #:lo12:.LANCHOR163]
+	ldr	x2, [x22, #:lo12:.LANCHOR164]
 	mov	w0, w20
 	ldrb	w4, [x23, 9]
 	bl	flash_prog_page
 	cmn	w0, #1
-	beq	.L2079
+	beq	.L2123
 	ldrb	w4, [x23, 9]
 	mov	w1, w19
-	ldr	x3, [x21, #:lo12:.LANCHOR165]
+	ldr	x3, [x21, #:lo12:.LANCHOR166]
 	mov	w0, w20
-	ldr	x2, [x22, #:lo12:.LANCHOR163]
+	ldr	x2, [x22, #:lo12:.LANCHOR164]
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L2079
-	ldr	x0, [x22, #:lo12:.LANCHOR163]
+	beq	.L2123
+	ldr	x0, [x22, #:lo12:.LANCHOR164]
 	ldr	w1, [x0]
 	mov	w0, 42405
 	movk	w0, 0xa5a5, lsl 16
 	cmp	w1, w0
-	bne	.L2079
-	ldr	x0, [x21, #:lo12:.LANCHOR165]
+	bne	.L2123
+	ldr	x0, [x21, #:lo12:.LANCHOR166]
 	ldr	w1, [x0]
 	mov	w0, 23130
 	movk	w0, 0x5a5a, lsl 16
 	cmp	w1, w0
 	csetm	w21, ne
-	b	.L2078
+	b	.L2122
 	.size	flash_test_blk, .-flash_test_blk
 	.section	.text.id_block_prog_msb_ff_data,"ax",@progbits
 	.align	2
@@ -12719,45 +12956,45 @@ id_block_prog_msb_ff_data:
 	stp	x23, x24, [sp, 48]
 	ldrb	w0, [x0, #:lo12:.LANCHOR24]
 	str	x25, [sp, 64]
-	cbnz	w0, .L2087
+	cbnz	w0, .L2131
 	adrp	x20, .LANCHOR32
 	add	x20, x20, :lo12:.LANCHOR32
 	ldrb	w0, [x20, 19]
 	sub	w0, w0, #5
 	and	w3, w0, 255
 	cmp	w3, 63
-	bhi	.L2087
+	bhi	.L2131
 	and	w19, w2, 65535
 	mov	x2, 16391
 	movk	x2, 0x4000, lsl 16
 	movk	x2, 0x8000, lsl 48
 	lsr	x0, x2, x3
-	tbz	x0, 0, .L2087
-	adrp	x21, .LANCHOR142
+	tbz	x0, 0, .L2131
+	adrp	x21, .LANCHOR143
 	mov	w23, w1
-	add	x21, x21, :lo12:.LANCHOR142
+	add	x21, x21, :lo12:.LANCHOR143
 	mov	w25, 65535
-	adrp	x24, .LANCHOR163
-.L2089:
+	adrp	x24, .LANCHOR164
+.L2133:
 	ldrh	w0, [x20, 10]
 	cmp	w0, w19
-	bhi	.L2090
-.L2087:
+	bhi	.L2134
+.L2131:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2090:
+.L2134:
 	ldrh	w0, [x21, w19, sxtw 1]
 	cmp	w0, w25
-	bne	.L2087
-	ldr	x0, [x24, #:lo12:.LANCHOR163]
+	bne	.L2131
+	ldr	x0, [x24, #:lo12:.LANCHOR164]
 	mov	w2, 16384
 	mov	w1, 255
 	bl	ftl_memset
-	ldr	x3, [x24, #:lo12:.LANCHOR163]
+	ldr	x3, [x24, #:lo12:.LANCHOR164]
 	add	w1, w19, w23
 	ldrb	w4, [x20, 9]
 	add	w19, w19, 1
@@ -12765,7 +13002,7 @@ id_block_prog_msb_ff_data:
 	mov	w0, w22
 	and	w19, w19, 65535
 	bl	flash_prog_page
-	b	.L2089
+	b	.L2133
 	.size	id_block_prog_msb_ff_data, .-id_block_prog_msb_ff_data
 	.section	.text.flash_start_one_pass_page_prog,"ax",@progbits
 	.align	2
@@ -12782,12 +13019,12 @@ flash_start_one_pass_page_prog:
 	ldr	x19, [x0, #:lo12:.LANCHOR7]
 	mov	w0, w7
 	bl	nandc_cs
-	cbz	w8, .L2093
+	cbz	w8, .L2137
 	sxtw	x0, w7
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 8
 	str	w8, [x0, 8]
-.L2093:
+.L2137:
 	ubfiz	x0, x7, 8, 8
 	add	x19, x19, x0
 	mov	w0, 128
@@ -12802,10 +13039,10 @@ flash_start_one_pass_page_prog:
 	str	w0, [x19, 2052]
 	adrp	x0, .LANCHOR30
 	ldrb	w0, [x0, #:lo12:.LANCHOR30]
-	cbz	w0, .L2094
+	cbz	w0, .L2138
 	lsr	w0, w4, 24
 	str	w0, [x19, 2052]
-.L2094:
+.L2138:
 	mov	w0, w4
 	bl	nandc_set_seed
 	adrp	x0, .LANCHOR32+9
@@ -12854,20 +13091,20 @@ flash_dual_page_prog:
 	ldr	w0, [x27, #:lo12:.LANCHOR19]
 	sub	w19, w19, #1
 	and	w19, w19, w1
-	tbz	x0, 4, .L2103
-	adrp	x0, .LC130
+	tbz	x0, 4, .L2147
+	adrp	x0, .LC127
 	mov	w3, w6
 	mov	w2, w28
-	add	x0, x0, :lo12:.LC130
+	add	x0, x0, :lo12:.LC127
 	bl	printf
-.L2103:
+.L2147:
 	bl	nandc_wait_flash_ready
 	mov	w0, w20
 	bl	nandc_cs
 	mov	w0, w20
-	cbnz	w28, .L2104
+	cbnz	w28, .L2148
 	bl	zftl_flash_enter_slc_mode
-.L2105:
+.L2149:
 	mov	x6, x26
 	mov	x5, x25
 	mov	w4, w19
@@ -12889,18 +13126,18 @@ flash_dual_page_prog:
 	mov	x0, x22
 	bl	flash_read_status
 	mov	w3, w0
-	bl	nandc_de_cs.constprop.32
+	bl	nandc_de_cs.constprop.31
 	and	w2, w3, 4
-	tbz	x3, 2, .L2102
+	tbz	x3, 2, .L2146
 	ldr	w0, [x27, #:lo12:.LANCHOR19]
-	tbz	x0, 12, .L2107
-	adrp	x0, .LC129
+	tbz	x0, 12, .L2151
+	adrp	x0, .LC126
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC129
+	add	x0, x0, :lo12:.LC126
 	bl	printf
-.L2107:
+.L2151:
 	mov	w2, -1
-.L2102:
+.L2146:
 	mov	w0, w2
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -12909,9 +13146,9 @@ flash_dual_page_prog:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2104:
+.L2148:
 	bl	zftl_flash_exit_slc_mode
-	b	.L2105
+	b	.L2149
 	.size	flash_dual_page_prog, .-flash_dual_page_prog
 	.section	.text.ymtc_flash_tlc_page_prog,"ax",@progbits
 	.align	2
@@ -12976,19 +13213,19 @@ ymtc_flash_tlc_page_prog:
 	mov	x0, x22
 	bl	flash_read_status
 	mov	w3, w0
-	bl	nandc_de_cs.constprop.32
+	bl	nandc_de_cs.constprop.31
 	and	w2, w3, 4
-	tbz	x3, 2, .L2115
+	tbz	x3, 2, .L2159
 	adrp	x0, .LANCHOR19
 	ldr	w0, [x0, #:lo12:.LANCHOR19]
-	tbz	x0, 12, .L2117
-	adrp	x0, .LC131
+	tbz	x0, 12, .L2161
+	adrp	x0, .LC128
 	mov	w1, w25
-	add	x0, x0, :lo12:.LC131
+	add	x0, x0, :lo12:.LC128
 	bl	printf
-.L2117:
+.L2161:
 	mov	w2, -1
-.L2115:
+.L2159:
 	mov	w0, w2
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -12997,10 +13234,10 @@ ymtc_flash_tlc_page_prog:
 	ldp	x29, x30, [sp], 80
 	ret
 	.size	ymtc_flash_tlc_page_prog, .-ymtc_flash_tlc_page_prog
-	.section	.text.fw_flash_page_prog.constprop.29,"ax",@progbits
+	.section	.text.fw_flash_page_prog.constprop.28,"ax",@progbits
 	.align	2
-	.type	fw_flash_page_prog.constprop.29, %function
-fw_flash_page_prog.constprop.29:
+	.type	fw_flash_page_prog.constprop.28, %function
+fw_flash_page_prog.constprop.28:
 	stp	x29, x30, [sp, -64]!
 	adrp	x4, .LANCHOR32
 	add	x4, x4, :lo12:.LANCHOR32
@@ -13019,19 +13256,19 @@ fw_flash_page_prog.constprop.29:
 	bl	nandc_bch_sel
 	ldrb	w0, [x4, 7]
 	cmp	w0, 9
-	bne	.L2123
+	bne	.L2167
 	adrp	x0, .LANCHOR24
 	ldrb	w0, [x0, #:lo12:.LANCHOR24]
-	cbnz	w0, .L2123
+	cbnz	w0, .L2167
 	ldrb	w0, [x4, 12]
 	cmp	w0, 3
-	bne	.L2124
+	bne	.L2168
 	mov	x3, x21
 	mov	x2, x20
 	mov	w1, w19
 	mov	w0, 0
 	bl	ymtc_flash_tlc_page_prog
-.L2127:
+.L2171:
 	mov	w4, w0
 	mov	w0, w23
 	bl	nandc_bch_sel
@@ -13041,13 +13278,13 @@ fw_flash_page_prog.constprop.29:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2124:
-	adrp	x22, .LANCHOR163
+.L2168:
+	adrp	x22, .LANCHOR164
 	mov	w2, 16384
 	mov	w1, 255
-	ldr	x0, [x22, #:lo12:.LANCHOR163]
+	ldr	x0, [x22, #:lo12:.LANCHOR164]
 	bl	ftl_memset
-	ldr	x5, [x22, #:lo12:.LANCHOR163]
+	ldr	x5, [x22, #:lo12:.LANCHOR164]
 	mov	w6, 4
 	mov	x3, x21
 	mov	x2, x20
@@ -13055,16 +13292,16 @@ fw_flash_page_prog.constprop.29:
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_dual_page_prog
-	b	.L2127
-.L2123:
+	b	.L2171
+.L2167:
 	mov	w4, 4
 	mov	x3, x21
 	mov	x2, x20
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_prog_page
-	b	.L2127
-	.size	fw_flash_page_prog.constprop.29, .-fw_flash_page_prog.constprop.29
+	b	.L2171
+	.size	fw_flash_page_prog.constprop.28, .-fw_flash_page_prog.constprop.28
 	.section	.text.idb_write_data,"ax",@progbits
 	.align	2
 	.global	idb_write_data
@@ -13078,11 +13315,11 @@ idb_write_data:
 	stp	x21, x22, [sp, 32]
 	mov	w20, w3
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR140
+	adrp	x22, .LANCHOR141
 	stp	x25, x26, [sp, 64]
 	mov	x24, x2
 	stp	x27, x28, [sp, 80]
-	bne	.L2129
+	bne	.L2173
 	ldr	w0, [x2]
 	mov	w1, 35899
 	movk	w1, 0xfcdc, lsl 16
@@ -13090,69 +13327,69 @@ idb_write_data:
 	mov	w1, 19282
 	movk	w1, 0x534e, lsl 16
 	ccmp	w0, w1, 4, ne
-	beq	.L2130
+	beq	.L2174
 	add	w1, w1, 327680
 	cmp	w0, w1
-	bne	.L2129
-.L2130:
-	adrp	x21, .LANCHOR138
+	bne	.L2173
+.L2174:
+	adrp	x21, .LANCHOR139
 	mov	w1, 1
-	strb	w1, [x22, #:lo12:.LANCHOR140]
-	ldr	x0, [x21, #:lo12:.LANCHOR138]
-	cbnz	x0, .L2131
+	strb	w1, [x22, #:lo12:.LANCHOR141]
+	ldr	x0, [x21, #:lo12:.LANCHOR139]
+	cbnz	x0, .L2175
 	mov	w0, 262144
 	bl	ftl_malloc
-	str	x0, [x21, #:lo12:.LANCHOR138]
-.L2131:
-	adrp	x0, .LANCHOR174
+	str	x0, [x21, #:lo12:.LANCHOR139]
+.L2175:
+	adrp	x0, .LANCHOR175
 	mov	w1, 64
-	str	w1, [x0, #:lo12:.LANCHOR174]
-.L2129:
-	ldrb	w0, [x22, #:lo12:.LANCHOR140]
-	cbz	w0, .L2197
-	adrp	x0, .LANCHOR138
+	str	w1, [x0, #:lo12:.LANCHOR175]
+.L2173:
+	ldrb	w0, [x22, #:lo12:.LANCHOR141]
+	cbz	w0, .L2241
+	adrp	x0, .LANCHOR139
 	mov	x23, x0
-	ldr	x21, [x0, #:lo12:.LANCHOR138]
-	cbz	x21, .L2197
+	ldr	x21, [x0, #:lo12:.LANCHOR139]
+	cbz	x21, .L2241
 	add	w0, w19, w20
 	str	w0, [x29, 140]
 	cmp	w0, 63
-	bls	.L2133
+	bls	.L2177
 	cmp	w19, 575
-	bhi	.L2134
-	adrp	x21, .LANCHOR141
-	ldr	x0, [x21, #:lo12:.LANCHOR141]
-	cbz	x0, .L2135
-.L2138:
-	adrp	x1, .LANCHOR139
+	bhi	.L2178
+	adrp	x21, .LANCHOR142
+	ldr	x0, [x21, #:lo12:.LANCHOR142]
+	cbz	x0, .L2179
+.L2182:
+	adrp	x1, .LANCHOR140
 	mov	w2, 1
-	ldr	x0, [x23, #:lo12:.LANCHOR138]
+	ldr	x0, [x23, #:lo12:.LANCHOR139]
 	cmp	w19, 64
-	str	w2, [x1, #:lo12:.LANCHOR139]
-	bhi	.L2250
+	str	w2, [x1, #:lo12:.LANCHOR140]
+	bhi	.L2294
 	mov	w4, 64
 	sub	w4, w4, w19
 	sub	w2, w20, w4
 	ubfiz	x4, x4, 9, 25
 	lsl	w2, w2, 9
 	add	x1, x24, x4
-.L2256:
+.L2300:
 	bl	ftl_memcpy
-.L2139:
-	adrp	x0, .LANCHOR174
-	ldr	w0, [x0, #:lo12:.LANCHOR174]
+.L2183:
+	adrp	x0, .LANCHOR175
+	ldr	w0, [x0, #:lo12:.LANCHOR175]
 	cmp	w19, w0
-	beq	.L2193
-	strb	wzr, [x22, #:lo12:.LANCHOR140]
-	b	.L2193
-.L2135:
+	beq	.L2237
+	strb	wzr, [x22, #:lo12:.LANCHOR141]
+	b	.L2237
+.L2179:
 	mov	w0, 262144
 	bl	ftl_malloc
-	str	x0, [x21, #:lo12:.LANCHOR141]
-	cbnz	x0, .L2138
+	str	x0, [x21, #:lo12:.LANCHOR142]
+	cbnz	x0, .L2182
 	mov	w0, -1
-	b	.L2128
-.L2250:
+	b	.L2172
+.L2294:
 	mov	w2, 576
 	sub	w2, w2, w19
 	cmp	w20, w2
@@ -13162,14 +13399,14 @@ idb_write_data:
 	lsl	w2, w2, 9
 	mov	x1, x24
 	add	x0, x0, x3
-	b	.L2256
-.L2133:
+	b	.L2300
+.L2177:
 	cmp	w19, 575
-	bls	.L2139
-.L2134:
-	adrp	x0, .LANCHOR139
-	ldr	w0, [x0, #:lo12:.LANCHOR139]
-	cbz	w0, .L2139
+	bls	.L2183
+.L2178:
+	adrp	x0, .LANCHOR140
+	ldr	w0, [x0, #:lo12:.LANCHOR140]
+	cbz	w0, .L2183
 	ldr	w0, [x21]
 	mov	w1, 35899
 	movk	w1, 0xfcdc, lsl 16
@@ -13177,11 +13414,11 @@ idb_write_data:
 	mov	w1, 19282
 	movk	w1, 0x534e, lsl 16
 	ccmp	w0, w1, 4, ne
-	beq	.L2140
+	beq	.L2184
 	add	w1, w1, 327680
 	cmp	w0, w1
-	bne	.L2141
-.L2140:
+	bne	.L2185
+.L2184:
 	adrp	x0, .LANCHOR0
 	mov	x20, x0
 	ldrb	w1, [x0, #:lo12:.LANCHOR0]
@@ -13191,13 +13428,13 @@ idb_write_data:
 	ldr	w0, [x29, 176]
 	ldrb	w2, [x1, #:lo12:.LANCHOR24]
 	str	w2, [x29, 204]
-	cbz	w0, .L2142
+	cbz	w0, .L2186
 	ldrh	w0, [x29, 176]
 	str	w0, [x29, 172]
 	uxtw	x0, w2
 	cmp	w0, 0
 	cset	w0, eq
-.L2253:
+.L2297:
 	adrp	x23, .LANCHOR32
 	add	x23, x23, :lo12:.LANCHOR32
 	str	w0, [x29, 200]
@@ -13221,24 +13458,24 @@ idb_write_data:
 	cmp	w20, 512
 	csel	w20, w20, w0, lt
 	mov	w0, 0
-.L2149:
+.L2193:
 	ldr	w5, [x1]
-	cbnz	w5, .L2145
-	cbnz	w0, .L2146
+	cbnz	w5, .L2189
+	cbnz	w0, .L2190
 	str	w4, [x1, 2048]
-.L2147:
+.L2191:
 	add	w0, w0, 1
 	sub	w2, w2, #1
 	cmp	w0, w3
 	sub	x1, x1, #4
 	csel	w0, w0, wzr, ls
 	cmp	w2, 4096
-	bne	.L2149
-.L2145:
+	bne	.L2193
+.L2189:
 	ldr	w1, [x21, w2, uxtw 2]
 	mov	w3, w20
-	adrp	x0, .LC132
-	add	x0, x0, :lo12:.LC132
+	adrp	x0, .LC129
+	add	x0, x0, :lo12:.LC129
 	bl	printf
 	str	wzr, [x29, 180]
 	mul	w0, w22, w19
@@ -13247,11 +13484,11 @@ idb_write_data:
 	adrp	x0, .LANCHOR51
 	add	x0, x0, :lo12:.LANCHOR51
 	str	x0, [x29, 184]
-.L2188:
-	adrp	x23, .LANCHOR141
+.L2232:
+	adrp	x23, .LANCHOR142
 	mov	w1, 0
 	mov	w2, 512
-	ldr	x0, [x23, #:lo12:.LANCHOR141]
+	ldr	x0, [x23, #:lo12:.LANCHOR142]
 	bl	ftl_memset
 	str	x23, [x29, 160]
 	adrp	x0, .LANCHOR6
@@ -13260,24 +13497,24 @@ idb_write_data:
 	add	x0, x0, x1, uxtw
 	ldrb	w19, [x0, 32]
 	cmp	w19, 255
-	beq	.L2150
+	beq	.L2194
 	ldr	w0, [x29, 128]
 	mul	w19, w19, w0
 	ldr	w0, [x29, 200]
-	cbz	w0, .L2151
+	cbz	w0, .L2195
 	and	w0, w1, -3
 	adrp	x24, .LANCHOR0
 	cmp	w0, 1
 	adrp	x22, .LANCHOR24
-	beq	.L2152
+	beq	.L2196
 	ldr	w0, [x29, 200]
 	cmp	w0, 3
-	bne	.L2153
-.L2152:
+	bne	.L2197
+.L2196:
 	ldrb	w0, [x29, 172]
 	strb	w0, [x24, #:lo12:.LANCHOR0]
 	strb	w0, [x22, #:lo12:.LANCHOR24]
-.L2151:
+.L2195:
 	adrp	x22, .LANCHOR32
 	add	x27, x22, :lo12:.LANCHOR32
 	ldr	x0, [x29, 184]
@@ -13301,15 +13538,15 @@ idb_write_data:
 	lsl	w0, w0, 2
 	sdiv	w0, w0, w1
 	str	w0, [x29, 156]
-	bne	.L2203
+	bne	.L2247
 	adrp	x0, .LANCHOR27
 	ldrb	w0, [x0, #:lo12:.LANCHOR27]
 	cmp	w0, 9
-	bne	.L2203
+	bne	.L2247
 	ldr	x0, [x29, 160]
 	mov	w2, 1024
 	mov	w1, 0
-	ldr	x25, [x0, #:lo12:.LANCHOR141]
+	ldr	x25, [x0, #:lo12:.LANCHOR142]
 	mov	x0, x25
 	bl	ftl_memset
 	mov	w0, 18766
@@ -13321,10 +13558,10 @@ idb_write_data:
 	strb	wzr, [x25, 16]
 	str	wzr, [x25, 12]
 	ldrb	w0, [x0, #:lo12:.LANCHOR24]
-	cbz	w0, .L2155
+	cbz	w0, .L2199
 	ldrb	w0, [x27, 29]
 	strb	w0, [x25, 16]
-.L2155:
+.L2199:
 	add	x1, x22, :lo12:.LANCHOR32
 	mov	w0, 4
 	strb	w0, [x25, 17]
@@ -13345,7 +13582,7 @@ idb_write_data:
 	str	w0, [x25, 8]
 	sub	w0, w20, #4
 	str	w0, [x29, 196]
-.L2154:
+.L2198:
 	adrp	x27, .LANCHOR3
 	mov	x23, x21
 	add	x27, x27, :lo12:.LANCHOR3
@@ -13353,16 +13590,16 @@ idb_write_data:
 	mov	w28, 0
 	add	x0, x0, :lo12:.LANCHOR24
 	str	x0, [x29, 144]
-.L2157:
+.L2201:
 	ldr	w0, [x29, 156]
 	cmp	w0, w28
-	bhi	.L2168
+	bhi	.L2212
 	ldr	x0, [x29, 160]
 	add	x22, x22, :lo12:.LANCHOR32
 	mov	w24, 4
 	mov	w25, 0
 	mov	w28, 0
-	ldr	x23, [x0, #:lo12:.LANCHOR141]
+	ldr	x23, [x0, #:lo12:.LANCHOR142]
 	ldrb	w0, [x22, 9]
 	str	w0, [x29, 144]
 	ldrh	w0, [x22, 26]
@@ -13383,41 +13620,41 @@ idb_write_data:
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
 	str	x0, [x29, 112]
-.L2169:
+.L2213:
 	ldr	w0, [x29, 156]
 	cmp	w25, w0
-	bcc	.L2183
+	bcc	.L2227
 	ldr	x0, [x29, 184]
 	ldrb	w1, [x29, 136]
 	strb	w1, [x0]
 	ldr	w0, [x29, 200]
-	cbz	w0, .L2184
+	cbz	w0, .L2228
 	mov	w0, 0
 	bl	zftl_flash_exit_slc_mode
 	adrp	x0, .LANCHOR0
 	strb	wzr, [x0, #:lo12:.LANCHOR0]
 	adrp	x0, .LANCHOR24
 	strb	wzr, [x0, #:lo12:.LANCHOR24]
-.L2184:
+.L2228:
 	ldr	w0, [x29, 196]
 	mov	x2, 0
 	lsl	w1, w0, 7
-	adrp	x0, .LANCHOR141
-	ldr	x0, [x0, #:lo12:.LANCHOR141]
-.L2185:
+	adrp	x0, .LANCHOR142
+	ldr	x0, [x0, #:lo12:.LANCHOR142]
+.L2229:
 	mov	w22, w2
 	cmp	w2, w1
-	bcc	.L2186
+	bcc	.L2230
 	ldr	w0, [x29, 180]
 	add	w0, w0, 1
 	str	w0, [x29, 180]
 	cmp	w0, 5
-	bls	.L2150
-	b	.L2195
-.L2142:
+	bls	.L2194
+	b	.L2239
+.L2186:
 	ldr	w0, [x29, 204]
 	cmp	w0, 3
-	beq	.L2199
+	beq	.L2243
 	cmp	w0, 2
 	mov	w0, 2
 	csel	w0, wzr, w0, ne
@@ -13426,27 +13663,27 @@ idb_write_data:
 	cmp	w0, 2
 	mov	w0, 3
 	csel	w0, wzr, w0, ne
-	b	.L2253
-.L2199:
+	b	.L2297
+.L2243:
 	ldr	w0, [x29, 204]
 	str	w0, [x29, 172]
 	mov	w0, 2
-	b	.L2253
-.L2146:
+	b	.L2297
+.L2190:
 	ldr	w5, [x21, w0, uxtw 2]
 	str	w5, [x1, 2048]
-	b	.L2147
-.L2153:
+	b	.L2191
+.L2197:
 	mov	w0, 0
 	bl	zftl_flash_exit_slc_mode
 	strb	wzr, [x24, #:lo12:.LANCHOR0]
 	strb	wzr, [x22, #:lo12:.LANCHOR24]
-	b	.L2151
-.L2203:
+	b	.L2195
+.L2247:
 	mov	x25, 0
 	str	w20, [x29, 196]
-	b	.L2154
-.L2168:
+	b	.L2198
+.L2212:
 	ldr	w0, [x29, 168]
 	adrp	x2, .LANCHOR24
 	add	w4, w0, w28
@@ -13454,73 +13691,73 @@ idb_write_data:
 	ubfx	x4, x4, 2, 16
 	add	w1, w4, 1
 	ldrh	w0, [x27, w1, sxtw 1]
-	cbz	w2, .L2159
+	cbz	w2, .L2203
 	adrp	x0, .LANCHOR1
 	ldrb	w7, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w1, 1
 	cmp	w7, 0
 	csel	w0, w0, w1, ne
-.L2159:
+.L2203:
 	adrp	x1, .LANCHOR27
 	ldrb	w1, [x1, #:lo12:.LANCHOR27]
 	cmp	w1, 9
-	bne	.L2161
-.L2254:
+	bne	.L2205
+.L2298:
 	str	w0, [x29, 208]
 	mov	w0, 61424
 	str	w0, [x29, 212]
 	ldrh	w0, [x27, w4, sxtw 1]
-	cbnz	w2, .L2163
+	cbnz	w2, .L2207
 	mov	w4, w0
-.L2164:
+.L2208:
 	mul	w0, w24, w4
-	cbnz	x25, .L2165
+	cbnz	x25, .L2209
 	str	w4, [x29, 152]
 	add	x2, x29, 208
 	mov	x1, x23
 	add	w0, w0, w26
-	bl	fw_flash_page_prog.constprop.29
+	bl	fw_flash_page_prog.constprop.28
 	ldr	x0, [x29, 144]
 	ldr	w4, [x29, 152]
 	ldrb	w0, [x0]
-	cbnz	w0, .L2166
+	cbnz	w0, .L2210
 	udiv	w1, w26, w24
 	add	w2, w4, 1
 	bl	id_block_prog_msb_ff_data
-.L2166:
+.L2210:
 	ldr	w0, [x29, 196]
 	add	x23, x23, 2048
 	add	w0, w0, 16
 	cmp	w28, w0
-	bcc	.L2167
+	bcc	.L2211
 	ldr	w0, [x29, 196]
 	add	w1, w0, 20
 	add	x0, x21, 2048
 	cmp	w28, w1
 	csel	x23, x0, x23, cc
-.L2167:
+.L2211:
 	add	w5, w28, 4
 	mov	x25, 0
 	and	w28, w5, 65535
-	b	.L2157
-.L2161:
+	b	.L2201
+.L2205:
 	sub	w0, w0, #1
 	lsl	w0, w0, 2
-	b	.L2254
-.L2163:
+	b	.L2298
+.L2207:
 	adrp	x0, .LANCHOR1
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w4, 1
 	cmp	w1, 0
 	csel	w4, w0, w4, ne
-	b	.L2164
-.L2165:
+	b	.L2208
+.L2209:
 	add	x2, x29, 208
 	mov	x1, x25
 	add	w0, w0, w26
-	bl	fw_flash_page_prog.constprop.29
-	b	.L2167
-.L2183:
+	bl	fw_flash_page_prog.constprop.28
+	b	.L2211
+.L2227:
 	ldr	w0, [x29, 160]
 	adrp	x1, .LANCHOR24
 	sub	w27, w24, w0
@@ -13532,9 +13769,9 @@ idb_write_data:
 	udiv	w22, w22, w24
 	and	w22, w22, 65535
 	ldrh	w0, [x0, w22, sxtw 1]
-	cbnz	w1, .L2170
+	cbnz	w1, .L2214
 	mov	w22, w0
-.L2171:
+.L2215:
 	adrp	x0, .LANCHOR22
 	ldr	w1, [x29, 152]
 	ldrb	w26, [x0, #:lo12:.LANCHOR22]
@@ -13553,7 +13790,7 @@ idb_write_data:
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	str	x0, [x29, 120]
-.L2172:
+.L2216:
 	mov	w4, w24
 	add	x3, x29, 208
 	mov	x2, x23
@@ -13562,33 +13799,33 @@ idb_write_data:
 	bl	flash_read_page
 	mov	w5, w0
 	cmn	w0, #1
-	bne	.L2173
+	bne	.L2217
 	ldr	x0, [x29, 184]
 	ldrb	w6, [x0]
-	cbnz	w6, .L2174
-.L2177:
-	adrp	x0, .LANCHOR171
-	ldr	x6, [x0, #:lo12:.LANCHOR171]
-	cbnz	x6, .L2175
-.L2176:
+	cbnz	w6, .L2218
+.L2221:
+	adrp	x0, .LANCHOR172
+	ldr	x6, [x0, #:lo12:.LANCHOR172]
+	cbnz	x6, .L2219
+.L2220:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
-	cbz	w0, .L2173
+	cbz	w0, .L2217
 	mov	w4, w24
 	add	x3, x29, 208
 	mov	x2, x23
 	mov	w1, w22
 	mov	w0, 0
 	bl	flash_ddr_tuning_read
-	b	.L2255
-.L2170:
+	b	.L2299
+.L2214:
 	adrp	x0, .LANCHOR1
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w22, 1
 	cmp	w1, 0
 	csel	w22, w0, w22, ne
-	b	.L2171
-.L2174:
+	b	.L2215
+.L2218:
 	ldr	x0, [x29, 184]
 	mov	w1, w22
 	stp	w6, w5, [x29, 104]
@@ -13602,21 +13839,21 @@ idb_write_data:
 	ldr	x1, [x29, 184]
 	ldp	w6, w5, [x29, 104]
 	strb	w6, [x1]
-	beq	.L2177
-.L2255:
+	beq	.L2221
+.L2299:
 	mov	w5, w0
-.L2173:
+.L2217:
 	cmn	w5, #1
 	cset	w4, eq
 	cmp	w26, 16
 	cset	w0, ne
 	tst	w4, w0
-	beq	.L2179
+	beq	.L2223
 	mov	w0, 16
 	mov	w26, 16
 	bl	nandc_bch_sel
-	b	.L2172
-.L2175:
+	b	.L2216
+.L2219:
 	str	w5, [x29, 108]
 	mov	w4, w24
 	add	x3, x29, 208
@@ -13626,9 +13863,9 @@ idb_write_data:
 	blr	x6
 	cmn	w0, #1
 	ldr	w5, [x29, 108]
-	beq	.L2176
-	b	.L2255
-.L2179:
+	beq	.L2220
+	b	.L2299
+.L2223:
 	ldr	w0, [x29, 132]
 	bl	nandc_bch_sel
 	cmp	w4, 0
@@ -13636,93 +13873,93 @@ idb_write_data:
 	csinv	w28, w28, wzr, eq
 	cmp	w25, 0
 	ccmp	w19, w0, 0, eq
-	bne	.L2181
-	cbnz	w28, .L2181
+	bne	.L2225
+	cbnz	w28, .L2225
 	ldr	w1, [x23]
 	mov	w0, 18766
 	movk	w0, 0x464e, lsl 16
 	cmp	w1, w0
-	bne	.L2181
+	bne	.L2225
 	ldr	w0, [x29, 156]
 	ldrb	w24, [x23, 17]
 	add	w0, w0, w27
 	str	w0, [x29, 156]
-.L2182:
+.L2226:
 	add	w25, w27, w25
 	and	w25, w25, 65535
-	b	.L2169
-.L2181:
+	b	.L2213
+.L2225:
 	ubfiz	x0, x27, 9, 16
 	str	wzr, [x29, 160]
 	add	x23, x23, x0
-	b	.L2182
-.L2186:
+	b	.L2226
+.L2230:
 	ldr	w4, [x0, x2, lsl 2]
 	add	x2, x2, 1
 	add	x3, x21, x2, lsl 2
 	ldr	w3, [x3, -4]
 	cmp	w4, w3
-	beq	.L2185
+	beq	.L2229
 	mov	w2, 512
 	mov	w1, 0
 	bl	ftl_memset
 	mov	w1, w22
-	adrp	x0, .LC133
-	add	x0, x0, :lo12:.LC133
+	adrp	x0, .LC130
+	add	x0, x0, :lo12:.LC130
 	bl	printf
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_erase_block
-.L2150:
+.L2194:
 	ldr	w0, [x29, 192]
 	add	w0, w0, 1
 	str	w0, [x29, 192]
 	cmp	w0, 4
-	bne	.L2188
-.L2195:
+	bne	.L2232
+.L2239:
 	mov	w0, 0
 	bl	zftl_flash_exit_slc_mode
 	adrp	x0, .LANCHOR0
 	ldrb	w1, [x29, 176]
 	strb	w1, [x0, #:lo12:.LANCHOR0]
 	ldr	w0, [x29, 200]
-	cbz	w0, .L2189
+	cbz	w0, .L2233
 	adrp	x0, .LANCHOR24
 	ldrb	w1, [x29, 204]
 	strb	w1, [x0, #:lo12:.LANCHOR24]
-.L2189:
+.L2233:
 	mov	w1, 2
 	adrp	x0, .LANCHOR33
 	strb	w1, [x0, #:lo12:.LANCHOR33]
 	mov	w0, 0
 	bl	zftl_flash_enter_slc_mode
 	ldr	w0, [x29, 180]
-	cbnz	w0, .L2141
-	adrp	x0, .LC134
+	cbnz	w0, .L2185
+	adrp	x0, .LC131
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC134
+	add	x0, x0, :lo12:.LC131
 	bl	printf
-.L2141:
-	adrp	x0, .LANCHOR139
-	str	wzr, [x0, #:lo12:.LANCHOR139]
+.L2185:
 	adrp	x0, .LANCHOR140
-	strb	wzr, [x0, #:lo12:.LANCHOR140]
-	adrp	x0, .LANCHOR138
-	ldr	x1, [x0, #:lo12:.LANCHOR138]
-	cbz	x1, .L2191
-	str	xzr, [x0, #:lo12:.LANCHOR138]
-.L2191:
+	str	wzr, [x0, #:lo12:.LANCHOR140]
 	adrp	x0, .LANCHOR141
-	ldr	x1, [x0, #:lo12:.LANCHOR141]
-	cbz	x1, .L2193
-	str	xzr, [x0, #:lo12:.LANCHOR141]
-.L2193:
-	adrp	x0, .LANCHOR174
+	strb	wzr, [x0, #:lo12:.LANCHOR141]
+	adrp	x0, .LANCHOR139
+	ldr	x1, [x0, #:lo12:.LANCHOR139]
+	cbz	x1, .L2235
+	str	xzr, [x0, #:lo12:.LANCHOR139]
+.L2235:
+	adrp	x0, .LANCHOR142
+	ldr	x1, [x0, #:lo12:.LANCHOR142]
+	cbz	x1, .L2237
+	str	xzr, [x0, #:lo12:.LANCHOR142]
+.L2237:
+	adrp	x0, .LANCHOR175
 	ldr	w1, [x29, 140]
-	str	w1, [x0, #:lo12:.LANCHOR174]
-.L2197:
+	str	w1, [x0, #:lo12:.LANCHOR175]
+.L2241:
 	mov	w0, 0
-.L2128:
+.L2172:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -13753,17 +13990,17 @@ flash_start_tlc_page_prog:
 	mov	x24, x6
 	cmp	w1, w26
 	mov	x19, x0
-	bhi	.L2258
-	adrp	x1, .LANCHOR175
+	bhi	.L2302
+	adrp	x1, .LANCHOR176
 	adrp	x0, .LC0
 	mov	w2, 868
-	add	x1, x1, :lo12:.LANCHOR175
+	add	x1, x1, :lo12:.LANCHOR176
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2258:
+.L2302:
 	ldrb	w0, [x19, #:lo12:.LANCHOR23]
 	cmp	w0, w26
-	bls	.L2257
+	bls	.L2301
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w5, [x0, w26, sxtw]
@@ -13771,12 +14008,12 @@ flash_start_tlc_page_prog:
 	ldr	x19, [x0, #:lo12:.LANCHOR7]
 	mov	w0, w5
 	bl	nandc_cs
-	cbz	w25, .L2260
+	cbz	w25, .L2304
 	sxtw	x0, w5
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 8
 	str	w25, [x0, 8]
-.L2260:
+.L2304:
 	ubfiz	x0, x5, 8, 8
 	add	x19, x19, x0
 	mov	w0, 128
@@ -13807,8 +14044,8 @@ flash_start_tlc_page_prog:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 80
-	b	nandc_de_cs.constprop.32
-.L2257:
+	b	nandc_de_cs.constprop.31
+.L2301:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -13844,7 +14081,7 @@ queue_tlc_prog_cmd:
 	lsr	w1, w1, w2
 	and	w19, w19, w1
 	and	w19, w19, 255
-	cbz	w0, .L2266
+	cbz	w0, .L2310
 	mov	w0, w19
 	bl	zftl_flash_exit_slc_mode
 	ldr	x0, [x21]
@@ -13876,8 +14113,8 @@ queue_tlc_prog_cmd:
 	ldr	x6, [x0, 24]
 	mov	w0, 0
 	bl	flash_start_one_pass_page_prog
-.L2267:
-	cbz	w23, .L2265
+.L2311:
+	cbz	w23, .L2309
 	ldr	x1, [x21]
 	mov	w0, 4
 	strb	w0, [x1, 58]
@@ -13892,7 +14129,7 @@ queue_tlc_prog_cmd:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	b	buf_add_tail
-.L2266:
+.L2310:
 	ldr	x5, [x7, 8]
 	mov	w4, w20
 	ldr	x6, [x7, 24]
@@ -13922,8 +14159,8 @@ queue_tlc_prog_cmd:
 	ldr	x6, [x0, 24]
 	ldrb	w0, [x7, 60]
 	bl	flash_start_tlc_page_prog
-	b	.L2267
-.L2265:
+	b	.L2311
+.L2309:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
@@ -13956,7 +14193,7 @@ sblk_3d_tlc_dump_prog:
 	lsr	w1, w1, w2
 	and	w19, w19, w1
 	and	w19, w19, 255
-	cbz	w0, .L2271
+	cbz	w0, .L2315
 	mov	w0, w19
 	bl	zftl_flash_exit_slc_mode
 	ldr	x5, [x20, 8]
@@ -13985,7 +14222,7 @@ sblk_3d_tlc_dump_prog:
 	mov	w1, w22
 	mov	w0, 0
 	bl	flash_start_one_pass_page_prog
-.L2272:
+.L2316:
 	bl	nandc_wait_flash_ready
 	ldr	w0, [x20, 40]
 	mov	w1, 64
@@ -13993,7 +14230,7 @@ sblk_3d_tlc_dump_prog:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	b	flash_wait_device_ready
-.L2271:
+.L2315:
 	ldr	x5, [x20, 8]
 	mov	w4, w21
 	ldr	x6, [x20, 24]
@@ -14020,7 +14257,7 @@ sblk_3d_tlc_dump_prog:
 	mov	w1, 3
 	mov	w0, 0
 	bl	flash_start_tlc_page_prog
-	b	.L2272
+	b	.L2316
 	.size	sblk_3d_tlc_dump_prog, .-sblk_3d_tlc_dump_prog
 	.section	.text.flash_start_3d_mlc_page_prog,"ax",@progbits
 	.align	2
@@ -14041,17 +14278,17 @@ flash_start_3d_mlc_page_prog:
 	mov	x23, x4
 	cmp	w1, w24
 	mov	x19, x0
-	bhi	.L2275
-	adrp	x1, .LANCHOR176
+	bhi	.L2319
+	adrp	x1, .LANCHOR177
 	adrp	x0, .LC0
 	mov	w2, 903
-	add	x1, x1, :lo12:.LANCHOR176
+	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2275:
+.L2319:
 	ldrb	w0, [x19, #:lo12:.LANCHOR23]
 	cmp	w0, w24
-	bls	.L2274
+	bls	.L2318
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w5, [x0, w24, sxtw]
@@ -14081,7 +14318,7 @@ flash_start_3d_mlc_page_prog:
 	mov	w0, w5
 	bl	nandc_xfer
 	str	w21, [x19, 2056]
-.L2274:
+.L2318:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -14116,14 +14353,14 @@ sblk_mlc_dump_prog:
 	bl	zftl_flash_exit_slc_mode
 	adrp	x0, .LANCHOR19
 	ldr	w0, [x0, #:lo12:.LANCHOR19]
-	tbz	x0, 12, .L2279
+	tbz	x0, 12, .L2323
 	ldr	w2, [x20, 40]
-	adrp	x0, .LC135
+	adrp	x0, .LC132
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC135
+	add	x0, x0, :lo12:.LC132
 	add	w3, w2, 1
 	bl	printf
-.L2279:
+.L2323:
 	ldr	x3, [x20, 8]
 	mov	w2, w21
 	ldr	x4, [x20, 24]
@@ -14142,7 +14379,7 @@ sblk_mlc_dump_prog:
 	mov	w1, 64
 	bl	flash_wait_device_ready
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.32
+	bl	nandc_de_cs.constprop.31
 	ldr	x21, [sp, 32]
 	mov	w0, w2
 	ldp	x19, x20, [sp, 16]
@@ -14178,17 +14415,17 @@ flash_start_page_prog:
 	mov	x22, x2
 	mov	x23, x3
 	cmp	w0, w20
-	bhi	.L2285
-	adrp	x1, .LANCHOR177
+	bhi	.L2329
+	adrp	x1, .LANCHOR178
 	adrp	x0, .LC0
 	mov	w2, 956
-	add	x1, x1, :lo12:.LANCHOR177
+	add	x1, x1, :lo12:.LANCHOR178
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2285:
+.L2329:
 	ldrb	w0, [x27, #:lo12:.LANCHOR23]
 	cmp	w0, w20
-	bls	.L2284
+	bls	.L2328
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	mov	w19, 1
@@ -14199,27 +14436,27 @@ flash_start_page_prog:
 	and	w19, w19, w24
 	ldr	x25, [x0, #:lo12:.LANCHOR7]
 	bl	nandc_rdy_status
-	cbnz	w0, .L2287
+	cbnz	w0, .L2331
 	ldrb	w0, [x27, #:lo12:.LANCHOR23]
 	cmp	w0, 1
-	bne	.L2288
+	bne	.L2332
 	bl	nandc_wait_flash_ready
-.L2287:
+.L2331:
 	mov	w0, w26
 	bl	hynix_reconfig_rr_para
 	mov	w0, w26
 	bl	nandc_cs
 	tst	x24, 50331648
-	bne	.L2289
+	bne	.L2333
 	mov	w0, w19
 	bl	slc_phy_page_address_calc
 	mov	w19, w0
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L2290
+	cbz	w0, .L2334
 	mov	w0, w26
 	bl	zftl_flash_enter_slc_mode
-.L2290:
+.L2334:
 	ubfiz	x20, x26, 8, 8
 	mov	w0, 128
 	add	x20, x25, x20
@@ -14234,10 +14471,10 @@ flash_start_page_prog:
 	str	w0, [x20, 2052]
 	adrp	x0, .LANCHOR30
 	ldrb	w0, [x0, #:lo12:.LANCHOR30]
-	cbz	w0, .L2291
+	cbz	w0, .L2335
 	lsr	w0, w19, 24
 	str	w0, [x20, 2052]
-.L2291:
+.L2335:
 	mov	w0, w19
 	bl	nandc_set_seed
 	adrp	x0, .LANCHOR32+9
@@ -14254,18 +14491,18 @@ flash_start_page_prog:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 96
-	b	nandc_de_cs.constprop.32
-.L2288:
+	b	nandc_de_cs.constprop.31
+.L2332:
 	mov	w2, 64
 	mov	w1, w19
 	mov	w0, w20
 	bl	flash_wait_device_ready_raw
-	b	.L2287
-.L2289:
+	b	.L2331
+.L2333:
 	mov	w0, w26
 	bl	zftl_flash_exit_slc_mode
-	b	.L2290
-.L2284:
+	b	.L2334
+.L2328:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -14291,7 +14528,7 @@ queue_prog_cmd:
 	ldr	w3, [x19, 40]
 	ldrb	w1, [x0, #:lo12:.LANCHOR59]
 	cmp	w1, 255
-	beq	.L2300
+	beq	.L2344
 	adrp	x2, .LANCHOR31
 	mov	w5, 24
 	adrp	x6, .LANCHOR55
@@ -14305,19 +14542,19 @@ queue_prog_cmd:
 	and	w2, w2, 65535
 	asr	w3, w3, w5
 	and	w3, w3, w2
-.L2302:
+.L2346:
 	add	x7, x6, x1, lsl 6
 	ldr	w4, [x7, 40]
 	lsr	w4, w4, w5
 	and	w4, w2, w4
 	cmp	w3, w4
-	bne	.L2301
+	bne	.L2345
 	ldrb	w4, [x7, 58]
 	cmp	w4, 7
-	bne	.L2301
+	bne	.L2345
 	mov	w1, 3
 	strb	w1, [x7, 58]
-.L2300:
+.L2344:
 	mov	w1, 3
 	strb	w1, [x19, 58]
 	mov	w1, 1
@@ -14329,12 +14566,12 @@ queue_prog_cmd:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	buf_add_tail
-.L2301:
+.L2345:
 	lsl	x1, x1, 6
 	ldrb	w1, [x8, x1]
 	cmp	w1, 255
-	bne	.L2302
-	b	.L2300
+	bne	.L2346
+	b	.L2344
 	.size	queue_prog_cmd, .-queue_prog_cmd
 	.section	.text.flash_complete_plane_page_read,"ax",@progbits
 	.align	2
@@ -14363,17 +14600,17 @@ flash_complete_plane_page_read:
 	mov	x23, x0
 	ldrb	w1, [x0, #:lo12:.LANCHOR23]
 	cmp	w1, w19
-	bhi	.L2309
-	adrp	x1, .LANCHOR178
+	bhi	.L2353
+	adrp	x1, .LANCHOR179
 	adrp	x0, .LC0
 	mov	w2, 1070
-	add	x1, x1, :lo12:.LANCHOR178
+	add	x1, x1, :lo12:.LANCHOR179
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2309:
+.L2353:
 	ldrb	w0, [x23, #:lo12:.LANCHOR23]
 	cmp	w0, w19
-	bls	.L2320
+	bls	.L2364
 	adrp	x2, .LANCHOR29
 	add	x2, x2, :lo12:.LANCHOR29
 	adrp	x0, .LANCHOR7
@@ -14386,11 +14623,11 @@ flash_complete_plane_page_read:
 	ubfx	x24, x24, 24, 2
 	mov	w0, w8
 	bl	nandc_cs
-	cbnz	w24, .L2311
+	cbnz	w24, .L2355
 	mov	w0, w4
 	bl	slc_phy_page_address_calc
 	mov	w4, w0
-.L2311:
+.L2355:
 	adrp	x0, .LANCHOR25+16
 	and	x1, x8, 255
 	and	w6, w4, 255
@@ -14400,10 +14637,10 @@ flash_complete_plane_page_read:
 	adrp	x2, .LANCHOR30
 	cmp	w0, 1
 	adrp	x0, .LANCHOR21
-	bne	.L2312
+	bne	.L2356
 	add	x1, x7, x1, lsl 8
 	mov	w7, 6
-.L2338:
+.L2382:
 	str	w7, [x1, 2056]
 	str	wzr, [x1, 2052]
 	str	wzr, [x1, 2052]
@@ -14411,27 +14648,27 @@ flash_complete_plane_page_read:
 	str	w5, [x1, 2052]
 	str	w3, [x1, 2052]
 	ldrb	w2, [x2, #:lo12:.LANCHOR30]
-	cbz	w2, .L2334
+	cbz	w2, .L2378
 	lsr	w2, w4, 24
 	str	w2, [x1, 2052]
-.L2334:
+.L2378:
 	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	mov	w2, 224
 	str	w2, [x1, 2056]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L2318
-	cbz	w24, .L2318
+	bne	.L2362
+	cbz	w24, .L2362
 	adrp	x0, .LANCHOR35
 	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbnz	w0, .L2318
+	cbnz	w0, .L2362
 	adrp	x0, .LANCHOR36
 	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbnz	w0, .L2318
+	cbnz	w0, .L2362
 	add	w4, w4, w4, lsl 1
 	sub	w0, w24, #1
 	add	w0, w4, w0
-.L2335:
+.L2379:
 	bl	nandc_set_seed
 	adrp	x0, .LANCHOR32+9
 	mov	x4, x21
@@ -14441,23 +14678,23 @@ flash_complete_plane_page_read:
 	mov	w0, w8
 	bl	nandc_xfer
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.32
+	bl	nandc_de_cs.constprop.31
 	mov	w0, w2
-.L2308:
+.L2352:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2312:
+.L2356:
 	ldr	x10, [x0, #:lo12:.LANCHOR21]
 	add	x1, x7, x1, lsl 8
 	ldrb	w10, [x10, 12]
 	cmp	w10, 3
-	bne	.L2315
+	bne	.L2359
 	mov	w7, 5
-	b	.L2338
-.L2315:
+	b	.L2382
+.L2359:
 	str	wzr, [x1, 2056]
 	str	wzr, [x1, 2052]
 	str	wzr, [x1, 2052]
@@ -14465,21 +14702,21 @@ flash_complete_plane_page_read:
 	ldrb	w2, [x2, #:lo12:.LANCHOR30]
 	str	w5, [x1, 2052]
 	str	w3, [x1, 2052]
-	cbz	w2, .L2317
+	cbz	w2, .L2361
 	lsr	w2, w4, 24
 	str	w2, [x1, 2052]
-.L2317:
+.L2361:
 	mov	w2, 5
 	str	w2, [x1, 2056]
 	str	wzr, [x1, 2052]
 	str	wzr, [x1, 2052]
-	b	.L2334
-.L2318:
+	b	.L2378
+.L2362:
 	mov	w0, w4
-	b	.L2335
-.L2320:
+	b	.L2379
+.L2364:
 	mov	w0, -1
-	b	.L2308
+	b	.L2352
 	.size	flash_complete_plane_page_read, .-flash_complete_plane_page_read
 	.section	.text.flash_complete_page_read,"ax",@progbits
 	.align	2
@@ -14513,14 +14750,14 @@ flash_complete_page_read:
 	and	w19, w19, w21
 	ubfx	x24, x21, 24, 2
 	cmp	w0, w20
-	bhi	.L2340
-	adrp	x1, .LANCHOR179
+	bhi	.L2384
+	adrp	x1, .LANCHOR180
 	adrp	x0, .LC0
 	mov	w2, 1232
-	add	x1, x1, :lo12:.LANCHOR179
+	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2340:
+.L2384:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w25, [x0, w20, sxtw]
@@ -14528,16 +14765,16 @@ flash_complete_page_read:
 	ldr	x4, [x0, #:lo12:.LANCHOR7]
 	mov	w0, w25
 	bl	nandc_cs
-	cbnz	w24, .L2341
+	cbnz	w24, .L2385
 	mov	w0, w19
 	bl	slc_phy_page_address_calc
 	mov	w19, w0
-.L2341:
+.L2385:
 	adrp	x20, .LANCHOR32
 	add	x0, x20, :lo12:.LANCHOR32
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L2342
+	bne	.L2386
 	ubfiz	x0, x25, 8, 8
 	mov	w1, 5
 	add	x0, x4, x0
@@ -14552,23 +14789,23 @@ flash_complete_page_read:
 	str	w1, [x0, 2052]
 	mov	w1, 224
 	str	w1, [x0, 2056]
-.L2342:
+.L2386:
 	adrp	x0, .LANCHOR21
 	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L2343
-	cbz	w24, .L2343
+	bne	.L2387
+	cbz	w24, .L2387
 	adrp	x0, .LANCHOR35
 	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbnz	w0, .L2343
+	cbnz	w0, .L2387
 	adrp	x0, .LANCHOR36
 	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbnz	w0, .L2343
+	cbnz	w0, .L2387
 	sub	w0, w24, #1
 	add	w1, w19, w19, lsl 1
 	add	w0, w0, w1
-.L2370:
+.L2414:
 	add	x28, x20, :lo12:.LANCHOR32
 	bl	nandc_set_seed
 	mov	x4, x23
@@ -14578,10 +14815,10 @@ flash_complete_page_read:
 	ldrb	w2, [x28, 9]
 	bl	nandc_xfer
 	cmn	w0, #1
-	bne	.L2345
+	bne	.L2389
 	adrp	x26, .LANCHOR51
 	ldrb	w27, [x26, #:lo12:.LANCHOR51]
-	cbz	w27, .L2346
+	cbz	w27, .L2390
 	ldrb	w4, [x28, 9]
 	mov	x3, x23
 	strb	wzr, [x26, #:lo12:.LANCHOR51]
@@ -14590,16 +14827,16 @@ flash_complete_page_read:
 	mov	w0, w25
 	bl	flash_read_page
 	strb	w27, [x26, #:lo12:.LANCHOR51]
-	cbnz	w24, .L2347
-.L2352:
+	cbnz	w24, .L2391
+.L2396:
 	adrp	x1, .LANCHOR0
 	ldrb	w1, [x1, #:lo12:.LANCHOR0]
-	cbz	w1, .L2347
+	cbz	w1, .L2391
 	adrp	x1, .LANCHOR49
 	ldrb	w1, [x1, #:lo12:.LANCHOR49]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	blt	.L2347
+	blt	.L2391
 	add	x20, x20, :lo12:.LANCHOR32
 	ldrb	w1, [x20, 19]
 	sub	w1, w1, #4
@@ -14607,7 +14844,7 @@ flash_complete_page_read:
 	cmp	w1, 4
 	mov	w1, 256
 	csel	w0, w0, w1, hi
-.L2339:
+.L2383:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -14615,31 +14852,31 @@ flash_complete_page_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2343:
+.L2387:
 	mov	w0, w19
-	b	.L2370
-.L2347:
+	b	.L2414
+.L2391:
 	cmn	w0, #1
-	bne	.L2339
-.L2353:
-	adrp	x0, .LANCHOR171
-	ldr	x5, [x0, #:lo12:.LANCHOR171]
-	cbnz	x5, .L2349
-.L2351:
+	bne	.L2383
+.L2397:
+	adrp	x0, .LANCHOR172
+	ldr	x5, [x0, #:lo12:.LANCHOR172]
+	cbnz	x5, .L2393
+.L2395:
 	adrp	x0, .LANCHOR51
 	mov	w3, -1
 	mov	w2, w21
 	mov	w1, 0
 	ldrb	w4, [x0, #:lo12:.LANCHOR51]
-	adrp	x0, .LC136
-	add	x0, x0, :lo12:.LC136
+	adrp	x0, .LC133
+	add	x0, x0, :lo12:.LC133
 	bl	printf
 	adrp	x0, .LANCHOR26
 	ldrb	w0, [x0, #:lo12:.LANCHOR26]
-	cbnz	w0, .L2350
+	cbnz	w0, .L2394
 	mov	w0, -1
-	b	.L2339
-.L2349:
+	b	.L2383
+.L2393:
 	add	x0, x20, :lo12:.LANCHOR32
 	mov	x3, x23
 	mov	x2, x22
@@ -14648,9 +14885,9 @@ flash_complete_page_read:
 	mov	w0, w25
 	blr	x5
 	cmn	w0, #1
-	beq	.L2351
-	b	.L2339
-.L2350:
+	beq	.L2395
+	b	.L2383
+.L2394:
 	add	x20, x20, :lo12:.LANCHOR32
 	orr	w1, w19, w24, lsl 24
 	mov	x3, x23
@@ -14664,12 +14901,12 @@ flash_complete_page_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	flash_ddr_tuning_read
-.L2346:
-	cbz	w24, .L2352
-	b	.L2353
-.L2345:
-	cbnz	w24, .L2339
-	b	.L2352
+.L2390:
+	cbz	w24, .L2396
+	b	.L2397
+.L2389:
+	cbnz	w24, .L2383
+	b	.L2396
 	.size	flash_complete_page_read, .-flash_complete_page_read
 	.section	.text.queue_wait_first_req_completed,"ax",@progbits
 	.align	2
@@ -14685,11 +14922,11 @@ queue_wait_first_req_completed:
 	cmp	w0, 255
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	bne	.L2372
-.L2405:
+	bne	.L2416
+.L2449:
 	mov	w21, 0
-	b	.L2371
-.L2372:
+	b	.L2415
+.L2416:
 	adrp	x19, .LANCHOR55
 	sxtw	x20, w0
 	add	x1, x19, :lo12:.LANCHOR55
@@ -14698,42 +14935,42 @@ queue_wait_first_req_completed:
 	ldr	w21, [x1, 40]
 	sub	w3, w2, #1
 	cmp	w3, 10
-	bhi	.L2405
-	adrp	x1, .L2375
-	add	x1, x1, :lo12:.L2375
+	bhi	.L2449
+	adrp	x1, .L2419
+	add	x1, x1, :lo12:.L2419
 	ldrh	w1, [x1,w3,uxtw #1]
-	adr	x3, .Lrtx2375
+	adr	x3, .Lrtx2419
 	add	x1, x3, w1, sxth #2
 	br	x1
-.Lrtx2375:
+.Lrtx2419:
 	.section	.rodata.queue_wait_first_req_completed,"a",@progbits
 	.align	0
 	.align	2
-.L2375:
-	.2byte	(.L2374 - .Lrtx2375) / 4
-	.2byte	(.L2376 - .Lrtx2375) / 4
-	.2byte	(.L2377 - .Lrtx2375) / 4
-	.2byte	(.L2377 - .Lrtx2375) / 4
-	.2byte	(.L2377 - .Lrtx2375) / 4
-	.2byte	(.L2377 - .Lrtx2375) / 4
-	.2byte	(.L2378 - .Lrtx2375) / 4
-	.2byte	(.L2379 - .Lrtx2375) / 4
-	.2byte	(.L2380 - .Lrtx2375) / 4
-	.2byte	(.L2377 - .Lrtx2375) / 4
-	.2byte	(.L2380 - .Lrtx2375) / 4
+.L2419:
+	.2byte	(.L2418 - .Lrtx2419) / 4
+	.2byte	(.L2420 - .Lrtx2419) / 4
+	.2byte	(.L2421 - .Lrtx2419) / 4
+	.2byte	(.L2421 - .Lrtx2419) / 4
+	.2byte	(.L2421 - .Lrtx2419) / 4
+	.2byte	(.L2421 - .Lrtx2419) / 4
+	.2byte	(.L2422 - .Lrtx2419) / 4
+	.2byte	(.L2423 - .Lrtx2419) / 4
+	.2byte	(.L2424 - .Lrtx2419) / 4
+	.2byte	(.L2421 - .Lrtx2419) / 4
+	.2byte	(.L2424 - .Lrtx2419) / 4
 	.section	.text.queue_wait_first_req_completed
-.L2374:
+.L2418:
 	bl	nandc_wait_flash_ready
 	add	x0, x19, :lo12:.LANCHOR55
 	add	x0, x0, x20, lsl 6
 	ldp	x1, x2, [x0, 8]
-	cbz	x2, .L2381
+	cbz	x2, .L2425
 	ldrb	w3, [x0, 56]
-	adrp	x0, .LANCHOR131
-	ldrb	w0, [x0, #:lo12:.LANCHOR131]
+	adrp	x0, .LANCHOR68
+	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w3, w0
 	csel	x1, x1, x2, ne
-.L2381:
+.L2425:
 	add	x19, x19, :lo12:.LANCHOR55
 	mov	w0, w21
 	add	x20, x19, x20, lsl 6
@@ -14745,8 +14982,8 @@ queue_wait_first_req_completed:
 	ldrb	w0, [x20, 2]
 	orr	w0, w0, 8
 	strb	w0, [x20, 2]
-	b	.L2405
-.L2376:
+	b	.L2449
+.L2420:
 	bl	nandc_wait_flash_ready
 	add	x0, x19, :lo12:.LANCHOR55
 	lsl	x2, x20, 6
@@ -14755,23 +14992,23 @@ queue_wait_first_req_completed:
 	add	x0, x0, x21, lsl 6
 	ldr	x24, [x0, 8]
 	ldp	x26, x0, [x1, 8]
-	cbz	x0, .L2382
+	cbz	x0, .L2426
 	ldrb	w2, [x1, 56]
-	adrp	x1, .LANCHOR131
-	ldrb	w1, [x1, #:lo12:.LANCHOR131]
+	adrp	x1, .LANCHOR68
+	ldrb	w1, [x1, #:lo12:.LANCHOR68]
 	cmp	w2, w1
 	csel	x26, x26, x0, ne
-.L2382:
+.L2426:
 	add	x0, x19, :lo12:.LANCHOR55
 	add	x0, x0, x21, lsl 6
 	ldr	x1, [x0, 16]
-	cbz	x1, .L2383
+	cbz	x1, .L2427
 	ldrb	w2, [x0, 56]
-	adrp	x0, .LANCHOR131
-	ldrb	w0, [x0, #:lo12:.LANCHOR131]
+	adrp	x0, .LANCHOR68
+	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w2, w0
 	csel	x24, x24, x1, ne
-.L2383:
+.L2427:
 	add	x22, x19, :lo12:.LANCHOR55
 	mov	x1, x26
 	add	x27, x22, x20, lsl 6
@@ -14786,15 +15023,15 @@ queue_wait_first_req_completed:
 	bl	flash_complete_plane_page_read
 	mov	w25, w0
 	cmn	w23, #1
-	beq	.L2384
+	beq	.L2428
 	ldr	w0, [x27, 36]
 	cmn	w0, #1
-	beq	.L2385
+	beq	.L2429
 	ldr	x1, [x27, 24]
 	ldr	w1, [x1, 4]
 	cmp	w0, w1
-	beq	.L2385
-.L2384:
+	beq	.L2429
+.L2428:
 	adrp	x0, .LANCHOR31
 	add	x22, x19, :lo12:.LANCHOR55
 	add	x22, x22, x20, lsl 6
@@ -14804,10 +15041,10 @@ queue_wait_first_req_completed:
 	sub	w0, w0, w2
 	ldr	x3, [x22, 24]
 	lsl	w5, w5, w2
-	adrp	x2, .LANCHOR131
+	adrp	x2, .LANCHOR68
 	sub	w5, w5, #1
 	ldr	w1, [x22, 40]
-	ldrb	w4, [x2, #:lo12:.LANCHOR131]
+	ldrb	w4, [x2, #:lo12:.LANCHOR68]
 	mov	x2, x26
 	lsl	w6, w5, w0
 	lsr	w0, w1, w0
@@ -14817,36 +15054,36 @@ queue_wait_first_req_completed:
 	mov	w23, w0
 	ldr	w2, [x22, 36]
 	cmn	w2, #1
-	beq	.L2386
+	beq	.L2430
 	ldr	x0, [x22, 24]
 	ldr	w4, [x0, 4]
 	cmp	w2, w4
-	beq	.L2386
+	beq	.L2430
 	adrp	x1, .LANCHOR19
 	ldr	w1, [x1, #:lo12:.LANCHOR19]
-	tbz	x1, 6, .L2386
+	tbz	x1, 6, .L2430
 	ldr	w3, [x0]
-	adrp	x0, .LC137
+	adrp	x0, .LC134
 	ldr	w1, [x22, 40]
-	add	x0, x0, :lo12:.LC137
+	add	x0, x0, :lo12:.LC134
 	bl	printf
-.L2386:
+.L2430:
 	add	x0, x19, :lo12:.LANCHOR55
 	add	x0, x0, x20, lsl 6
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L2385
+	beq	.L2429
 	ldr	x0, [x0, 24]
 	ldr	w0, [x0, 4]
 	cmp	w1, w0
-	beq	.L2385
-	adrp	x1, .LANCHOR180
+	beq	.L2429
+	adrp	x1, .LANCHOR181
 	adrp	x0, .LC0
 	mov	w2, 431
-	add	x1, x1, :lo12:.LANCHOR180
+	add	x1, x1, :lo12:.LANCHOR181
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2385:
+.L2429:
 	add	x0, x19, :lo12:.LANCHOR55
 	mov	w1, 13
 	add	x20, x0, x20, lsl 6
@@ -14856,16 +15093,16 @@ queue_wait_first_req_completed:
 	str	w23, [x20, 52]
 	orr	w1, w1, 8
 	strb	w1, [x20, 2]
-	beq	.L2387
+	beq	.L2431
 	add	x0, x0, x21, lsl 6
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L2389
+	beq	.L2433
 	ldr	x0, [x0, 24]
 	ldr	w0, [x0, 4]
 	cmp	w1, w0
-	beq	.L2389
-.L2387:
+	beq	.L2433
+.L2431:
 	adrp	x0, .LANCHOR31
 	add	x20, x19, :lo12:.LANCHOR55
 	add	x20, x20, x21, lsl 6
@@ -14875,10 +15112,10 @@ queue_wait_first_req_completed:
 	sub	w0, w0, w2
 	ldr	x3, [x20, 24]
 	lsl	w5, w5, w2
-	adrp	x2, .LANCHOR131
+	adrp	x2, .LANCHOR68
 	sub	w5, w5, #1
 	ldr	w1, [x20, 40]
-	ldrb	w4, [x2, #:lo12:.LANCHOR131]
+	ldrb	w4, [x2, #:lo12:.LANCHOR68]
 	mov	x2, x24
 	lsl	w6, w5, w0
 	lsr	w0, w1, w0
@@ -14887,36 +15124,36 @@ queue_wait_first_req_completed:
 	bl	flash_read_page_en
 	ldr	w2, [x20, 36]
 	cmn	w2, #1
-	beq	.L2391
+	beq	.L2435
 	ldr	x0, [x20, 24]
 	ldr	w4, [x0, 4]
 	cmp	w2, w4
-	beq	.L2391
+	beq	.L2435
 	adrp	x1, .LANCHOR19
 	ldr	w1, [x1, #:lo12:.LANCHOR19]
-	tbz	x1, 6, .L2391
+	tbz	x1, 6, .L2435
 	ldr	w3, [x0]
-	adrp	x0, .LC137
+	adrp	x0, .LC134
 	ldr	w1, [x20, 40]
-	add	x0, x0, :lo12:.LC137
+	add	x0, x0, :lo12:.LC134
 	bl	printf
-.L2391:
+.L2435:
 	add	x0, x19, :lo12:.LANCHOR55
 	add	x0, x0, x21, lsl 6
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L2389
+	beq	.L2433
 	ldr	x0, [x0, 24]
 	ldr	w0, [x0, 4]
 	cmp	w1, w0
-	beq	.L2389
-	adrp	x1, .LANCHOR180
+	beq	.L2433
+	adrp	x1, .LANCHOR181
 	adrp	x0, .LC0
 	mov	w2, 450
-	add	x1, x1, :lo12:.LANCHOR180
+	add	x1, x1, :lo12:.LANCHOR181
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2389:
+.L2433:
 	add	x19, x19, :lo12:.LANCHOR55
 	mov	w0, 13
 	add	x21, x19, x21, lsl 6
@@ -14925,16 +15162,16 @@ queue_wait_first_req_completed:
 	str	w23, [x21, 52]
 	orr	w0, w0, 8
 	strb	w0, [x21, 2]
-	b	.L2405
-.L2377:
+	b	.L2449
+.L2421:
 	mov	w0, w21
 	mov	w1, 64
 	bl	flash_wait_device_ready
 	mov	w21, w0
-	tbz	x21, 6, .L2405
+	tbz	x21, 6, .L2449
 	mov	w0, 5
 	tst	w21, w0
-	beq	.L2393
+	beq	.L2437
 	add	x19, x19, :lo12:.LANCHOR55
 	mov	w0, 12
 	add	x20, x19, x20, lsl 6
@@ -14943,70 +15180,70 @@ queue_wait_first_req_completed:
 	ldrb	w1, [x20, 1]
 	ldr	w3, [x20, 40]
 	strb	w0, [x20, 58]
-	adrp	x0, .LC138
-	add	x0, x0, :lo12:.LC138
+	adrp	x0, .LC135
+	add	x0, x0, :lo12:.LC135
 	bl	printf
-.L2463:
+.L2507:
 	mov	w0, -1
 	str	w0, [x20, 52]
-	b	.L2371
-.L2393:
+	b	.L2415
+.L2437:
 	add	x21, x19, :lo12:.LANCHOR55
 	mov	w0, 13
 	add	x21, x21, x20, lsl 6
 	strb	w0, [x21, 58]
-	adrp	x0, .LANCHOR110
-	ldr	x0, [x0, #:lo12:.LANCHOR110]
+	adrp	x0, .LANCHOR69
+	ldr	x0, [x0, #:lo12:.LANCHOR69]
 	ldr	w1, [x0, 156]
 	mov	w0, 20041
 	str	wzr, [x21, 52]
 	movk	w0, 0x444b, lsl 16
 	cmp	w1, w0
-	bne	.L2405
+	bne	.L2449
 	ldrh	w0, [x21, 50]
-	cbnz	w0, .L2405
+	cbnz	w0, .L2449
 	adrp	x0, .LANCHOR31
 	mov	w5, 1
-	adrp	x22, .LANCHOR172
+	adrp	x22, .LANCHOR173
 	ldr	w1, [x21, 40]
 	ldrb	w2, [x0, #:lo12:.LANCHOR31]
 	mov	w0, 24
-	ldr	x3, [x22, #:lo12:.LANCHOR172]
+	ldr	x3, [x22, #:lo12:.LANCHOR173]
 	sub	w0, w0, w2
 	lsl	w5, w5, w2
-	adrp	x2, .LANCHOR131
+	adrp	x2, .LANCHOR68
 	sub	w5, w5, #1
-	ldrb	w4, [x2, #:lo12:.LANCHOR131]
-	adrp	x2, .LANCHOR173
+	ldrb	w4, [x2, #:lo12:.LANCHOR68]
+	adrp	x2, .LANCHOR174
 	lsl	w6, w5, w0
-	ldr	x2, [x2, #:lo12:.LANCHOR173]
+	ldr	x2, [x2, #:lo12:.LANCHOR174]
 	lsr	w0, w1, w0
 	bic	w1, w1, w6
 	and	w0, w0, w5
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L2394
-	ldr	x1, [x22, #:lo12:.LANCHOR172]
+	beq	.L2438
+	ldr	x1, [x22, #:lo12:.LANCHOR173]
 	ldr	x2, [x21, 24]
 	ldr	w1, [x1]
 	ldr	w2, [x2]
 	cmp	w2, w1
-	beq	.L2405
-.L2394:
+	beq	.L2449
+.L2438:
 	add	x19, x19, :lo12:.LANCHOR55
 	adrp	x1, .LANCHOR51
 	add	x20, x19, x20, lsl 6
 	mov	w3, w0
 	ldrb	w4, [x1, #:lo12:.LANCHOR51]
-	adrp	x0, .LC139
-	add	x0, x0, :lo12:.LC139
+	adrp	x0, .LC136
+	add	x0, x0, :lo12:.LC136
 	ldrb	w1, [x20, 1]
 	ldr	w2, [x20, 40]
 	bl	printf
 	mov	w0, -1
 	str	w0, [x20, 52]
-	b	.L2405
-.L2380:
+	b	.L2449
+.L2424:
 	cmp	w2, 11
 	mov	w1, 3
 	mov	w5, 10
@@ -15025,41 +15262,41 @@ queue_wait_first_req_completed:
 	lsr	w3, w21, w4
 	and	w3, w3, w2
 	and	w3, w3, 65535
-.L2396:
+.L2440:
 	ldrb	w1, [x0]
 	cmp	w1, 255
-	bne	.L2403
+	bne	.L2447
 	mov	w21, -1
-	b	.L2371
-.L2403:
+	b	.L2415
+.L2447:
 	sxtw	x23, w1
 	ubfiz	x0, x1, 6, 8
 	add	x1, x22, x23, lsl 6
 	add	x0, x22, x0
 	ldrb	w6, [x1, 58]
 	cmp	w6, w5
-	bne	.L2396
+	bne	.L2440
 	ldr	w1, [x1, 40]
 	lsr	w1, w1, w4
 	and	w1, w1, w2
 	cmp	w3, w1
-	bne	.L2396
+	bne	.L2440
 	mov	w0, w21
 	mov	w1, 64
 	bl	flash_wait_device_ready
 	mov	w21, w0
-	tbnz	x21, 6, .L2398
-.L2462:
+	tbnz	x21, 6, .L2442
+.L2506:
 	mov	w21, 0
-	b	.L2399
-.L2398:
+	b	.L2443
+.L2442:
 	tst	x21, 15
-	beq	.L2400
+	beq	.L2444
 	add	x22, x22, x20, lsl 6
 	mov	w2, w0
 	mov	w4, 12
-	adrp	x0, .LC140
-	add	x0, x0, :lo12:.LC140
+	adrp	x0, .LC137
+	add	x0, x0, :lo12:.LC137
 	ldrb	w1, [x22, 1]
 	ldr	w3, [x22, 40]
 	bl	printf
@@ -15067,7 +15304,7 @@ queue_wait_first_req_completed:
 	strb	w0, [x22, 58]
 	mov	w0, -1
 	str	w0, [x22, 52]
-.L2399:
+.L2443:
 	add	x1, x19, :lo12:.LANCHOR55
 	add	x20, x1, x20, lsl 6
 	add	x1, x1, x23, lsl 6
@@ -15075,7 +15312,7 @@ queue_wait_first_req_completed:
 	strb	w0, [x1, 58]
 	ldr	w0, [x20, 52]
 	str	w0, [x1, 52]
-.L2371:
+.L2415:
 	mov	w0, w21
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -15084,89 +15321,89 @@ queue_wait_first_req_completed:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2400:
+.L2444:
 	add	x21, x22, x20, lsl 6
 	mov	w0, 13
 	strb	w0, [x21, 58]
-	adrp	x0, .LANCHOR110
-	ldr	x0, [x0, #:lo12:.LANCHOR110]
+	adrp	x0, .LANCHOR69
+	ldr	x0, [x0, #:lo12:.LANCHOR69]
 	ldr	w1, [x0, 156]
 	mov	w0, 20041
 	str	wzr, [x21, 52]
 	movk	w0, 0x444b, lsl 16
 	cmp	w1, w0
-	bne	.L2462
+	bne	.L2506
 	ldrh	w0, [x21, 50]
-	cbnz	w0, .L2462
+	cbnz	w0, .L2506
 	ldrb	w2, [x24, #:lo12:.LANCHOR31]
 	mov	w5, 1
 	mov	w0, 24
-	adrp	x22, .LANCHOR172
+	adrp	x22, .LANCHOR173
 	sub	w0, w0, w2
 	ldr	w1, [x21, 40]
 	lsl	w5, w5, w2
-	adrp	x2, .LANCHOR131
+	adrp	x2, .LANCHOR68
 	sub	w5, w5, #1
-	ldr	x3, [x22, #:lo12:.LANCHOR172]
-	ldrb	w4, [x2, #:lo12:.LANCHOR131]
-	adrp	x2, .LANCHOR173
+	ldr	x3, [x22, #:lo12:.LANCHOR173]
+	ldrb	w4, [x2, #:lo12:.LANCHOR68]
+	adrp	x2, .LANCHOR174
 	lsl	w6, w5, w0
-	ldr	x2, [x2, #:lo12:.LANCHOR173]
+	ldr	x2, [x2, #:lo12:.LANCHOR174]
 	lsr	w0, w1, w0
 	bic	w1, w1, w6
 	and	w0, w0, w5
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L2402
-	ldr	x1, [x22, #:lo12:.LANCHOR172]
+	beq	.L2446
+	ldr	x1, [x22, #:lo12:.LANCHOR173]
 	ldr	x2, [x21, 24]
 	ldr	w1, [x1]
 	ldr	w2, [x2]
 	cmp	w2, w1
-	beq	.L2462
-.L2402:
+	beq	.L2506
+.L2446:
 	add	x21, x19, :lo12:.LANCHOR55
 	adrp	x1, .LANCHOR51
 	add	x21, x21, x20, lsl 6
 	mov	w3, w0
 	ldrb	w4, [x1, #:lo12:.LANCHOR51]
-	adrp	x0, .LC141
-	add	x0, x0, :lo12:.LC141
+	adrp	x0, .LC138
+	add	x0, x0, :lo12:.LC138
 	ldrb	w1, [x21, 1]
 	ldr	w2, [x21, 40]
 	bl	printf
 	mov	w0, -1
 	str	w0, [x21, 52]
-	b	.L2462
-.L2378:
+	b	.L2506
+.L2422:
 	mov	w0, w21
 	mov	w1, 32
 	bl	flash_wait_device_ready
 	mov	w21, w0
-	tbz	x21, 5, .L2405
+	tbz	x21, 5, .L2449
 	add	x19, x19, :lo12:.LANCHOR55
 	tst	x21, 15
 	add	x20, x19, x20, lsl 6
-	beq	.L2404
+	beq	.L2448
 	mov	w0, 12
 	strb	w0, [x20, 58]
-	b	.L2463
-.L2404:
+	b	.L2507
+.L2448:
 	mov	w0, 13
 	str	wzr, [x20, 52]
 	strb	w0, [x20, 58]
-	b	.L2405
-.L2379:
+	b	.L2449
+.L2423:
 	mov	w1, 64
 	mov	w0, w21
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L2405
+	tbz	x0, 6, .L2449
 	add	x19, x19, :lo12:.LANCHOR55
 	add	x19, x19, x20, lsl 6
 	str	w0, [x19, 52]
 	mov	w0, 7
 	strb	w0, [x19, 58]
-	b	.L2405
+	b	.L2449
 	.size	queue_wait_first_req_completed, .-queue_wait_first_req_completed
 	.section	.text.sblk_prog_page,"ax",@progbits
 	.align	2
@@ -15183,24 +15420,24 @@ sblk_prog_page:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbz	w0, .L2465
+	cbz	w0, .L2509
 	adrp	x0, .LANCHOR19
 	ldr	w0, [x0, #:lo12:.LANCHOR19]
-	tbz	x0, 8, .L2465
+	tbz	x0, 8, .L2509
 	ldr	w1, [x19, 40]
-	adrp	x0, .LC142
+	adrp	x0, .LC139
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC142
+	add	x0, x0, :lo12:.LC139
 	bl	printf
-.L2465:
+.L2509:
 	adrp	x23, .LANCHOR44
 	adrp	x25, .LANCHOR31
 	add	x23, x23, :lo12:.LANCHOR44
 	add	x26, x25, :lo12:.LANCHOR31
 	mov	w21, 0
-.L2466:
-	cbnz	w20, .L2477
-.L2493:
+.L2510:
+	cbnz	w20, .L2521
+.L2537:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -15209,37 +15446,37 @@ sblk_prog_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2477:
+.L2521:
 	ldrb	w24, [x19]
 	ldr	w22, [x19, 40]
-.L2467:
+.L2511:
 	mov	w1, 1
 	mov	w0, w22
 	bl	queue_lun_state
-	cbnz	w0, .L2468
+	cbnz	w0, .L2512
 	cmp	w20, 1
-	beq	.L2469
+	beq	.L2513
 	ldrb	w0, [x23]
-	cbz	w0, .L2469
+	cbz	w0, .L2513
 	adrp	x0, .LANCHOR36
 	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbz	w0, .L2470
-.L2469:
+	cbz	w0, .L2514
+.L2513:
 	mov	x0, x19
 	bl	queue_prog_cmd
-.L2471:
+.L2515:
 	subs	w20, w20, #1
-	beq	.L2493
+	beq	.L2537
 	ubfiz	x24, x24, 6, 8
 	adrp	x19, .LANCHOR55
 	add	x19, x19, :lo12:.LANCHOR55
 	add	x19, x19, x24
-	b	.L2466
-.L2468:
+	b	.L2510
+.L2512:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2467
-.L2470:
+	b	.L2511
+.L2514:
 	ldrb	w1, [x25, #:lo12:.LANCHOR31]
 	mov	w27, 24
 	mov	w0, 1
@@ -15251,14 +15488,14 @@ sblk_prog_page:
 	ldrb	w0, [x19]
 	and	w27, w27, 65535
 	cmp	w0, 255
-	bne	.L2472
-	adrp	x1, .LANCHOR181
+	bne	.L2516
+	adrp	x1, .LANCHOR182
 	adrp	x0, .LC0
 	mov	w2, 697
-	add	x1, x1, :lo12:.LANCHOR181
+	add	x1, x1, :lo12:.LANCHOR182
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2472:
+.L2516:
 	ldrb	w0, [x19]
 	adrp	x1, .LANCHOR55
 	add	x1, x1, :lo12:.LANCHOR55
@@ -15273,11 +15510,11 @@ sblk_prog_page:
 	lsr	w1, w4, w3
 	and	w0, w0, w1
 	cmp	w27, w0, uxth
-	bne	.L2473
-	adrp	x0, .LANCHOR74
-	ldrh	w2, [x0, #:lo12:.LANCHOR74]
-	adrp	x0, .LANCHOR75
-	ldrb	w1, [x0, #:lo12:.LANCHOR75]
+	bne	.L2517
+	adrp	x0, .LANCHOR80
+	ldrh	w2, [x0, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR81
+	ldrb	w1, [x0, #:lo12:.LANCHOR81]
 	sub	w0, w3, w2
 	lsr	w5, w22, w2
 	sub	w3, w1, #1
@@ -15295,9 +15532,9 @@ sblk_prog_page:
 	cmp	w5, w0
 	and	w1, w1, w4
 	ccmp	w22, w1, 0, ne
-	bne	.L2473
+	bne	.L2517
 	cmp	w21, w3
-	beq	.L2473
+	beq	.L2517
 	ldr	w1, [x19, 40]
 	mov	w0, 17
 	ldr	x2, [x19, 8]
@@ -15313,12 +15550,12 @@ sblk_prog_page:
 	adrp	x0, .LANCHOR59
 	add	x0, x0, :lo12:.LANCHOR59
 	bl	buf_add_tail
-	b	.L2471
-.L2473:
+	b	.L2515
+.L2517:
 	mov	x0, x19
 	mov	w21, 0
 	bl	queue_prog_cmd
-	b	.L2471
+	b	.L2515
 	.size	sblk_prog_page, .-sblk_prog_page
 	.section	.text.sblk_wait_write_queue_completed,"ax",@progbits
 	.align	2
@@ -15330,17 +15567,17 @@ sblk_wait_write_queue_completed:
 	str	x19, [sp, 16]
 	adrp	x19, .LANCHOR59
 	add	x19, x19, :lo12:.LANCHOR59
-.L2496:
+.L2540:
 	ldrb	w0, [x19]
 	cmp	w0, 255
-	bne	.L2497
+	bne	.L2541
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2497:
+.L2541:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2496
+	b	.L2540
 	.size	sblk_wait_write_queue_completed, .-sblk_wait_write_queue_completed
 	.section	.text.ftl_flush,"ax",@progbits
 	.align	2
@@ -15348,22 +15585,22 @@ sblk_wait_write_queue_completed:
 	.type	ftl_flush, %function
 ftl_flush:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR129
+	adrp	x0, .LANCHOR183
 	add	x29, sp, 0
-	ldrb	w1, [x0, #:lo12:.LANCHOR129]
+	ldrb	w1, [x0, #:lo12:.LANCHOR183]
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	adrp	x20, .LANCHOR182
-	cbz	w1, .L2500
-	ldrb	w2, [x20, #:lo12:.LANCHOR182]
+	adrp	x20, .LANCHOR184
+	cbz	w1, .L2544
+	ldrb	w2, [x20, #:lo12:.LANCHOR184]
 	adrp	x0, .LANCHOR55
 	add	x0, x0, :lo12:.LANCHOR55
 	add	x0, x0, x2, lsl 6
 	bl	sblk_prog_page
-.L2500:
+.L2544:
 	mov	w0, -1
-	strb	wzr, [x19, #:lo12:.LANCHOR129]
-	strb	w0, [x20, #:lo12:.LANCHOR182]
+	strb	wzr, [x19, #:lo12:.LANCHOR183]
+	strb	w0, [x20, #:lo12:.LANCHOR184]
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	ldp	x19, x20, [sp, 16]
@@ -15451,16 +15688,16 @@ sblk_read_page:
 	mov	x19, x0
 	stp	x25, x26, [sp, 64]
 	mov	x23, x0
-	adrp	x25, .LANCHOR183
+	adrp	x25, .LANCHOR185
 	add	x28, x27, :lo12:.LANCHOR31
-	add	x25, x25, :lo12:.LANCHOR183
-.L2510:
-	cbnz	w21, .L2520
-.L2533:
+	add	x25, x25, :lo12:.LANCHOR185
+.L2554:
+	cbnz	w21, .L2564
+.L2577:
 	adrp	x19, .LANCHOR55
 	add	x19, x19, :lo12:.LANCHOR55
-.L2521:
-	cbnz	w22, .L2523
+.L2565:
+	cbnz	w22, .L2567
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -15469,27 +15706,27 @@ sblk_read_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2520:
+.L2564:
 	ldrb	w24, [x19]
 	ldr	w26, [x19, 40]
-.L2511:
+.L2555:
 	mov	w1, 0
 	mov	w0, w26
 	bl	queue_lun_state
-	cbnz	w0, .L2512
+	cbnz	w0, .L2556
 	cmp	w21, 1
-	beq	.L2517
+	beq	.L2561
 	ldrb	w0, [x25]
-	cbnz	w0, .L2514
-.L2517:
+	cbnz	w0, .L2558
+.L2561:
 	mov	x0, x19
 	bl	queue_read_cmd
-	b	.L2515
-.L2512:
+	b	.L2559
+.L2556:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2511
-.L2514:
+	b	.L2555
+.L2558:
 	ldrb	w1, [x27, #:lo12:.LANCHOR31]
 	mov	w20, 24
 	mov	w0, 1
@@ -15501,14 +15738,14 @@ sblk_read_page:
 	ldrb	w0, [x19]
 	and	w20, w20, 65535
 	cmp	w0, 255
-	bne	.L2516
-	adrp	x1, .LANCHOR184
+	bne	.L2560
+	adrp	x1, .LANCHOR186
 	adrp	x0, .LC0
 	mov	w2, 782
-	add	x1, x1, :lo12:.LANCHOR184
+	add	x1, x1, :lo12:.LANCHOR186
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2516:
+.L2560:
 	ldrb	w4, [x19]
 	adrp	x2, .LANCHOR55
 	add	x2, x2, :lo12:.LANCHOR55
@@ -15524,12 +15761,12 @@ sblk_read_page:
 	lsr	w0, w1, w0
 	and	w0, w0, w3
 	cmp	w20, w0, uxth
-	bne	.L2517
-	adrp	x0, .LANCHOR111
-	ldrh	w0, [x0, #:lo12:.LANCHOR111]
+	bne	.L2561
+	adrp	x0, .LANCHOR117
+	ldrh	w0, [x0, #:lo12:.LANCHOR117]
 	add	w26, w0, w26
 	cmp	w1, w26
-	bne	.L2517
+	bne	.L2561
 	ldr	w0, [x19, 40]
 	mov	w26, -1
 	ldrb	w24, [x2, x5]
@@ -15558,28 +15795,28 @@ sblk_read_page:
 	ubfiz	x1, x4, 6, 8
 	add	x1, x2, x1
 	bl	buf_add_tail
-.L2515:
+.L2559:
 	subs	w21, w21, #1
-	beq	.L2533
+	beq	.L2577
 	ubfiz	x24, x24, 6, 8
 	adrp	x19, .LANCHOR55
 	add	x19, x19, :lo12:.LANCHOR55
 	add	x19, x19, x24
-	b	.L2510
-.L2523:
+	b	.L2554
+.L2567:
 	ldrb	w0, [x23, 58]
 	cmp	w0, 13
-	bne	.L2522
+	bne	.L2566
 	ldrb	w0, [x23]
 	sub	w22, w22, #1
 	cmp	w0, 255
-	beq	.L2522
+	beq	.L2566
 	ubfiz	x23, x0, 6, 8
 	add	x23, x19, x23
-.L2522:
+.L2566:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2521
+	b	.L2565
 	.size	sblk_read_page, .-sblk_read_page
 	.section	.text.gc_check_data_one_wl,"ax",@progbits
 	.align	2
@@ -15590,108 +15827,108 @@ gc_check_data_one_wl:
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x19, x20, [sp, 32]
-	adrp	x19, .LANCHOR70
+	adrp	x19, .LANCHOR76
 	stp	x21, x22, [sp, 48]
-	add	x22, x19, :lo12:.LANCHOR70
+	add	x22, x19, :lo12:.LANCHOR76
 	adrp	x20, .LANCHOR12
 	stp	x23, x24, [sp, 64]
 	stp	x25, x26, [sp, 80]
 	ldr	x0, [x22, 8]
 	stp	x27, x28, [sp, 96]
 	ldr	x21, [x20, #:lo12:.LANCHOR12]
-	cbnz	x0, .L2536
+	cbnz	x0, .L2580
 	mov	w0, 1
 	bl	buf_alloc
 	str	x0, [x22, 8]
-.L2536:
-	add	x0, x19, :lo12:.LANCHOR70
+.L2580:
+	add	x0, x19, :lo12:.LANCHOR76
 	ldr	x22, [x0, 8]
-	cbnz	x22, .L2537
-	adrp	x1, .LANCHOR185
+	cbnz	x22, .L2581
+	adrp	x1, .LANCHOR187
 	adrp	x0, .LC0
 	mov	w2, 729
-	add	x1, x1, :lo12:.LANCHOR185
+	add	x1, x1, :lo12:.LANCHOR187
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2537:
-	adrp	x27, .LANCHOR111
-	adrp	x28, .LANCHOR78
+.L2581:
+	adrp	x27, .LANCHOR117
+	adrp	x28, .LANCHOR84
 	add	x26, x21, 96
-	add	x27, x27, :lo12:.LANCHOR111
-	add	x28, x28, :lo12:.LANCHOR78
+	add	x27, x27, :lo12:.LANCHOR117
+	add	x28, x28, :lo12:.LANCHOR84
 	mov	w25, 0
-.L2538:
+.L2582:
 	ldrb	w0, [x21, 89]
 	cmp	w25, w0
-	bge	.L2549
+	bge	.L2593
 	mov	w24, 1
-	add	x23, x19, :lo12:.LANCHOR70
-	b	.L2550
-.L2548:
+	add	x23, x19, :lo12:.LANCHOR76
+	b	.L2594
+.L2592:
 	ldrh	w0, [x26]
 	ldrh	w2, [x27]
 	ldrb	w1, [x28]
 	cmp	w1, 2
 	mul	w2, w0, w2
-	beq	.L2539
+	beq	.L2583
 	adrp	x0, .LANCHOR35
 	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbz	w0, .L2540
-.L2539:
+	cbz	w0, .L2584
+.L2583:
 	ldrh	w0, [x23, 16]
 	sub	w3, w0, #1
 	add	w0, w24, w2
 	add	w0, w3, w0
 	orr	w1, w0, w1, lsl 24
 	str	w1, [x22, 40]
-.L2541:
+.L2585:
 	mov	w1, 1
 	mov	x0, x22
 	bl	sblk_read_page
 	ldr	w2, [x22, 52]
-	adrp	x1, .LANCHOR159
+	adrp	x1, .LANCHOR160
 	cmn	w2, #1
-	beq	.L2544
+	beq	.L2588
 	ldrh	w0, [x23, 22]
-	ldr	x4, [x1, #:lo12:.LANCHOR159]
+	ldr	x4, [x1, #:lo12:.LANCHOR160]
 	ldr	x3, [x22, 24]
 	lsl	x0, x0, 2
 	ldr	w5, [x4, x0]
 	ldr	w4, [x3, 4]
 	cmp	w5, w4
-	bne	.L2544
-	adrp	x4, .LANCHOR160
-	ldr	x4, [x4, #:lo12:.LANCHOR160]
+	bne	.L2588
+	adrp	x4, .LANCHOR161
+	ldr	x4, [x4, #:lo12:.LANCHOR161]
 	ldr	w4, [x4, x0]
 	ldr	w0, [x3, 8]
 	cmp	w4, w0
-	beq	.L2545
-.L2544:
+	beq	.L2589
+.L2588:
 	ldrh	w0, [x23, 22]
-	ldr	x1, [x1, #:lo12:.LANCHOR159]
+	ldr	x1, [x1, #:lo12:.LANCHOR160]
 	lsl	x0, x0, 2
 	ldr	w3, [x1, x0]
 	cmn	w3, #1
-	beq	.L2545
+	beq	.L2589
 	adrp	x1, .LANCHOR19
 	ldr	w1, [x1, #:lo12:.LANCHOR19]
-	tbz	x1, 10, .L2546
+	tbz	x1, 10, .L2590
 	ldr	x1, [x22, 24]
-	adrp	x4, .LANCHOR160
-	ldr	x4, [x4, #:lo12:.LANCHOR160]
+	adrp	x4, .LANCHOR161
+	ldr	x4, [x4, #:lo12:.LANCHOR161]
 	ldr	w5, [x1, 12]
 	str	w5, [sp]
 	ldr	w4, [x4, x0]
-	adrp	x0, .LC143
+	adrp	x0, .LC140
 	ldp	w5, w6, [x1]
-	add	x0, x0, :lo12:.LC143
+	add	x0, x0, :lo12:.LC140
 	ldr	w7, [x1, 8]
 	ldr	w1, [x22, 40]
 	bl	printf
-.L2546:
-	adrp	x0, .LANCHOR124
+.L2590:
+	adrp	x0, .LANCHOR130
 	ldrh	w1, [x21, 80]
-	ldrb	w2, [x0, #:lo12:.LANCHOR124]
+	ldrb	w2, [x0, #:lo12:.LANCHOR130]
 	adrp	x0, .LANCHOR11
 	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	strh	wzr, [x0, x1, lsl 1]
@@ -15699,22 +15936,22 @@ gc_check_data_one_wl:
 	ldr	w0, [x1, 556]
 	add	w0, w0, 1
 	str	w0, [x1, 556]
-	adrp	x0, .LANCHOR110
-	ldr	x0, [x0, #:lo12:.LANCHOR110]
+	adrp	x0, .LANCHOR69
+	ldr	x0, [x0, #:lo12:.LANCHOR69]
 	ldr	w1, [x0, 156]
 	mov	w0, 20041
 	movk	w0, 0x444b, lsl 16
 	cmp	w1, w0
-	bne	.L2553
-	cbnz	w2, .L2553
-	adrp	x0, .LANCHOR80
-	ldrb	w0, [x0, #:lo12:.LANCHOR80]
-	cbnz	w0, .L2553
+	bne	.L2597
+	cbnz	w2, .L2597
+	adrp	x0, .LANCHOR86
+	ldrb	w0, [x0, #:lo12:.LANCHOR86]
+	cbnz	w0, .L2597
 	ldr	w0, [x22, 40]
 	bl	ftl_mask_bad_block
-.L2553:
+.L2597:
 	mov	w0, -1
-.L2535:
+.L2579:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -15723,54 +15960,54 @@ gc_check_data_one_wl:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 112
 	ret
-.L2540:
+.L2584:
 	cmp	w1, 3
 	ldrh	w0, [x23, 16]
-	bne	.L2542
+	bne	.L2586
 	adrp	x1, .LANCHOR36
 	ldrb	w1, [x1, #:lo12:.LANCHOR36]
-	cbz	w1, .L2543
+	cbz	w1, .L2587
 	add	w0, w0, w0, lsl 1
 	sub	w1, w0, #1
 	add	w0, w24, w2
 	add	w0, w1, w0
 	orr	w0, w0, 50331648
-.L2568:
+.L2612:
 	str	w0, [x22, 40]
-	b	.L2541
-.L2543:
+	b	.L2585
+.L2587:
 	add	w0, w0, w2
 	orr	w0, w0, w24, lsl 24
-	b	.L2568
-.L2542:
+	b	.L2612
+.L2586:
 	add	w0, w0, w2
-	b	.L2568
-.L2545:
+	b	.L2612
+.L2589:
 	ldrh	w0, [x23, 22]
 	add	w24, w24, 1
 	add	w0, w0, 1
 	strh	w0, [x23, 22]
-.L2550:
+.L2594:
 	ldrh	w0, [x23, 20]
 	cmp	w24, w0
-	ble	.L2548
+	ble	.L2592
 	add	w25, w25, 1
 	add	x26, x26, 2
-	b	.L2538
-.L2549:
-	add	x19, x19, :lo12:.LANCHOR70
+	b	.L2582
+.L2593:
+	add	x19, x19, :lo12:.LANCHOR76
 	ldrh	w0, [x19, 16]
 	add	w1, w0, 1
 	strh	w1, [x19, 16]
-	adrp	x1, .LANCHOR80
-	ldrb	w1, [x1, #:lo12:.LANCHOR80]
-	cbz	w1, .L2554
+	adrp	x1, .LANCHOR86
+	ldrb	w1, [x1, #:lo12:.LANCHOR86]
+	cbz	w1, .L2598
 	add	w0, w0, 2
 	strh	w0, [x19, 16]
-.L2554:
-.L2547:
+.L2598:
+.L2591:
 	mov	w0, 0
-	b	.L2535
+	b	.L2579
 	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
 	.section	.text.sblk_tlc_prog_one_page,"ax",@progbits
 	.align	2
@@ -15783,11 +16020,11 @@ sblk_tlc_prog_one_page:
 	mov	x19, x0
 	ldr	x0, [x0]
 	ldr	w20, [x0, 40]
-.L2570:
+.L2614:
 	mov	w1, 1
 	mov	w0, w20
 	bl	queue_lun_state
-	cbnz	w0, .L2571
+	cbnz	w0, .L2615
 	mov	x0, x19
 	mov	w1, 1
 	bl	queue_tlc_prog_cmd
@@ -15795,10 +16032,10 @@ sblk_tlc_prog_one_page:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2571:
+.L2615:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2570
+	b	.L2614
 	.size	sblk_tlc_prog_one_page, .-sblk_tlc_prog_one_page
 	.section	.text.sblk_xlc_prog_pages,"ax",@progbits
 	.align	2
@@ -15816,17 +16053,17 @@ sblk_xlc_prog_pages:
 	mov	w24, w2
 	ldr	w19, [x0, 40]
 	str	x25, [sp, 64]
-.L2574:
+.L2618:
 	mov	w1, 1
 	mov	w0, w19
 	bl	queue_lun_state
-	cbnz	w0, .L2575
+	cbnz	w0, .L2619
 	cmp	w24, 2
-	bne	.L2576
+	bne	.L2620
 	adrp	x0, .LANCHOR44
 	ldr	x3, [x22]
 	ldrb	w0, [x0, #:lo12:.LANCHOR44]
-	cbz	w0, .L2577
+	cbz	w0, .L2621
 	adrp	x0, .LANCHOR31
 	ldr	x7, [x20]
 	mov	w25, 1
@@ -15846,7 +16083,7 @@ sblk_xlc_prog_pages:
 	and	w19, w19, w1
 	and	w21, w21, w3
 	and	w19, w19, 255
-	cbz	w0, .L2578
+	cbz	w0, .L2622
 	mov	w0, w19
 	bl	zftl_flash_exit_slc_mode
 	ldr	x0, [x20]
@@ -15908,7 +16145,7 @@ sblk_xlc_prog_pages:
 	ldr	x6, [x0, 24]
 	mov	w0, 0
 	bl	flash_start_one_pass_page_prog
-.L2579:
+.L2623:
 	ldr	x1, [x20]
 	mov	w0, 5
 	strb	w0, [x1, 58]
@@ -15919,7 +16156,7 @@ sblk_xlc_prog_pages:
 	adrp	x0, .LANCHOR59
 	add	x0, x0, :lo12:.LANCHOR59
 	bl	buf_add_tail
-.L2580:
+.L2624:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -15927,11 +16164,11 @@ sblk_xlc_prog_pages:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2575:
+.L2619:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2574
-.L2578:
+	b	.L2618
+.L2622:
 	ldr	x5, [x7, 8]
 	mov	w4, w23
 	ldr	x6, [x7, 24]
@@ -15994,37 +16231,37 @@ sblk_xlc_prog_pages:
 	ldr	x6, [x0, 24]
 	ldrb	w0, [x7, 60]
 	bl	flash_start_tlc_page_prog
-	b	.L2579
-.L2577:
+	b	.L2623
+.L2621:
 	ldr	w19, [x3, 40]
-.L2581:
+.L2625:
 	mov	w1, 1
 	mov	w0, w19
 	bl	queue_lun_state
-	cbnz	w0, .L2582
+	cbnz	w0, .L2626
 	mov	w1, 1
 	mov	x0, x20
 	bl	queue_tlc_prog_cmd
 	mov	w1, 0
 	mov	x0, x22
 	bl	queue_tlc_prog_cmd
-.L2583:
+.L2627:
 	mov	w1, 1
 	mov	w0, w19
 	bl	queue_lun_state
-	cbz	w0, .L2580
+	cbz	w0, .L2624
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2583
-.L2582:
+	b	.L2627
+.L2626:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2581
-.L2576:
+	b	.L2625
+.L2620:
 	mov	w1, 1
 	mov	x0, x20
 	bl	queue_tlc_prog_cmd
-	b	.L2580
+	b	.L2624
 	.size	sblk_xlc_prog_pages, .-sblk_xlc_prog_pages
 	.section	.text.sblk_3d_mlc_prog_pages,"ax",@progbits
 	.align	2
@@ -16046,9 +16283,9 @@ sblk_3d_mlc_prog_pages:
 	add	x25, x0, 8
 	stp	x19, x20, [sp, 16]
 	mov	w22, 1
-.L2587:
+.L2631:
 	cmp	x21, x25
-	bne	.L2590
+	bne	.L2634
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -16056,14 +16293,14 @@ sblk_3d_mlc_prog_pages:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2590:
+.L2634:
 	ldr	x0, [x25, -8]
 	ldr	w19, [x0, 40]
-.L2588:
+.L2632:
 	mov	w1, 1
 	mov	w0, w19
 	bl	queue_lun_state
-	cbnz	w0, .L2589
+	cbnz	w0, .L2633
 	ldr	x0, [x25, -8]
 	mov	w2, 24
 	ldrb	w1, [x23]
@@ -16095,7 +16332,7 @@ sblk_3d_mlc_prog_pages:
 	ldr	x4, [x0, 24]
 	mov	w0, 16
 	bl	flash_start_3d_mlc_page_prog
-	bl	nandc_de_cs.constprop.32
+	bl	nandc_de_cs.constprop.31
 	ldr	x1, [x25, -24]
 	mov	w0, 4
 	strb	w22, [x1, 59]
@@ -16104,11 +16341,11 @@ sblk_3d_mlc_prog_pages:
 	strb	w0, [x1]
 	mov	x0, x24
 	bl	buf_add_tail
-	b	.L2587
-.L2589:
+	b	.L2631
+.L2633:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2588
+	b	.L2632
 	.size	sblk_3d_mlc_prog_pages, .-sblk_3d_mlc_prog_pages
 	.section	.text.flash_prog_page_en,"ax",@progbits
 	.align	2
@@ -16134,51 +16371,51 @@ flash_prog_page_en:
 	ubfx	x24, x20, 24, 2
 	cmp	w1, w21
 	mov	x19, x0
-	bhi	.L2593
-	adrp	x1, .LANCHOR186
+	bhi	.L2637
+	adrp	x1, .LANCHOR188
 	adrp	x0, .LC0
 	mov	w2, 642
-	add	x1, x1, :lo12:.LANCHOR186
+	add	x1, x1, :lo12:.LANCHOR188
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2593:
+.L2637:
 	ldrb	w0, [x19, #:lo12:.LANCHOR23]
 	cmp	w0, w21
-	bls	.L2604
+	bls	.L2648
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w27, [x0, w21, sxtw]
-	cbnz	w24, .L2606
+	cbnz	w24, .L2650
 	adrp	x0, .LANCHOR0
 	ldrb	w1, [x0, #:lo12:.LANCHOR0]
 	adrp	x0, .LANCHOR1
-	cbz	w1, .L2596
+	cbz	w1, .L2640
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
-	cbz	w1, .L2606
-.L2596:
+	cbz	w1, .L2650
+.L2640:
 	adrp	x1, .LANCHOR2
 	ldrb	w0, [x0, #:lo12:.LANCHOR1]
 	ldrh	w1, [x1, #:lo12:.LANCHOR2]
 	udiv	w19, w20, w1
 	mul	w19, w19, w1
 	sub	w1, w20, w19
-	cbz	w0, .L2597
+	cbz	w0, .L2641
 	add	w19, w19, w1, lsl 1
-.L2595:
+.L2639:
 	adrp	x24, .LANCHOR19
-	adrp	x25, .LC144
+	adrp	x25, .LC141
 	add	x24, x24, :lo12:.LANCHOR19
-	add	x25, x25, :lo12:.LC144
-	adrp	x26, .LANCHOR172
-.L2601:
+	add	x25, x25, :lo12:.LC141
+	adrp	x26, .LANCHOR173
+.L2645:
 	ldr	w0, [x24]
-	tbz	x0, 4, .L2598
+	tbz	x0, 4, .L2642
 	mov	w3, w19
 	mov	w2, w20
 	mov	w1, w27
 	mov	x0, x25
 	bl	printf
-.L2598:
+.L2642:
 	mov	w4, w28
 	mov	x3, x22
 	mov	x2, x23
@@ -16187,12 +16424,12 @@ flash_prog_page_en:
 	bl	flash_prog_page
 	mov	w5, w0
 	ldr	w0, [x29, 124]
-	cbz	w0, .L2599
-	adrp	x6, .LANCHOR173
-	ldr	x3, [x26, #:lo12:.LANCHOR172]
+	cbz	w0, .L2643
+	adrp	x6, .LANCHOR174
+	ldr	x3, [x26, #:lo12:.LANCHOR173]
 	mov	w4, w28
 	str	x6, [x29, 112]
-	ldr	x2, [x6, #:lo12:.LANCHOR173]
+	ldr	x2, [x6, #:lo12:.LANCHOR174]
 	mov	w1, w20
 	mov	w0, w21
 	str	w5, [x29, 104]
@@ -16202,78 +16439,78 @@ flash_prog_page_en:
 	mov	w4, w0
 	ccmn	w0, #1, 4, ne
 	mov	x7, x6
-	beq	.L2600
-	ldr	x0, [x6, #:lo12:.LANCHOR173]
+	beq	.L2644
+	ldr	x0, [x6, #:lo12:.LANCHOR174]
 	ldr	w1, [x23]
 	ldr	w5, [x29, 104]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	bne	.L2600
-	ldr	x0, [x26, #:lo12:.LANCHOR172]
+	bne	.L2644
+	ldr	x0, [x26, #:lo12:.LANCHOR173]
 	ldr	w1, [x22]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	beq	.L2599
-.L2600:
+	beq	.L2643
+.L2644:
 	str	w4, [x29, 112]
 	mov	w3, 4
 	str	x7, [x29, 104]
 	mov	w2, w3
 	mov	x1, x23
-	adrp	x0, .LC145
-	add	x0, x0, :lo12:.LC145
+	adrp	x0, .LC142
+	add	x0, x0, :lo12:.LC142
 	bl	rknand_print_hex
 	mov	w3, 4
 	mov	x1, x22
 	mov	w2, w3
-	adrp	x0, .LC146
-	add	x0, x0, :lo12:.LC146
+	adrp	x0, .LC143
+	add	x0, x0, :lo12:.LC143
 	bl	rknand_print_hex
-	adrp	x0, .LANCHOR172
+	adrp	x0, .LANCHOR173
 	mov	w3, 4
 	mov	w2, w3
-	ldr	x1, [x0, #:lo12:.LANCHOR172]
-	adrp	x0, .LC147
-	add	x0, x0, :lo12:.LC147
+	ldr	x1, [x0, #:lo12:.LANCHOR173]
+	adrp	x0, .LC144
+	add	x0, x0, :lo12:.LC144
 	bl	rknand_print_hex
 	ldr	x7, [x29, 104]
 	mov	w3, 4
-	adrp	x0, .LC148
+	adrp	x0, .LC145
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC148
-	ldr	x1, [x7, #:lo12:.LANCHOR173]
+	add	x0, x0, :lo12:.LC145
+	ldr	x1, [x7, #:lo12:.LANCHOR174]
 	bl	rknand_print_hex
 	ldr	w4, [x29, 112]
 	cmp	w4, 512
-	beq	.L2601
-.L2603:
+	beq	.L2645
+.L2647:
 	mov	w1, w20
-	adrp	x0, .LC149
-	add	x0, x0, :lo12:.LC149
+	adrp	x0, .LC146
+	add	x0, x0, :lo12:.LC146
 	bl	printf
-	adrp	x1, .LANCHOR186
+	adrp	x1, .LANCHOR188
 	adrp	x0, .LC0
 	mov	w2, 685
-	add	x1, x1, :lo12:.LANCHOR186
+	add	x1, x1, :lo12:.LANCHOR188
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2604:
+.L2648:
 	mov	w0, -1
-	b	.L2592
-.L2597:
+	b	.L2636
+.L2641:
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
 	ldrh	w0, [x0, w1, uxtw 1]
 	add	w19, w0, w19
-	b	.L2595
-.L2606:
+	b	.L2639
+.L2650:
 	mov	w19, w20
-	b	.L2595
-.L2599:
+	b	.L2639
+.L2643:
 	mov	w0, w5
 	cmn	w5, #1
-	beq	.L2603
-.L2592:
+	beq	.L2647
+.L2636:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -16290,116 +16527,116 @@ ftl_test_block:
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR187
+	adrp	x24, .LANCHOR189
 	stp	x21, x22, [sp, 32]
 	and	w21, w0, 65535
-	ldr	x0, [x24, #:lo12:.LANCHOR187]
+	ldr	x0, [x24, #:lo12:.LANCHOR189]
 	mov	w23, 0
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR188
+	adrp	x25, .LANCHOR190
 	stp	x19, x20, [sp, 16]
-	adrp	x26, .LANCHOR112
+	adrp	x26, .LANCHOR118
 	stp	x27, x28, [sp, 80]
 	mov	w20, 0
 	str	wzr, [x0]
-	add	x0, x26, :lo12:.LANCHOR112
-	adrp	x27, .LANCHOR75
+	add	x0, x26, :lo12:.LANCHOR118
+	adrp	x27, .LANCHOR81
 	str	x0, [x29, 112]
-	str	wzr, [x25, #:lo12:.LANCHOR188]
-	add	x0, x27, :lo12:.LANCHOR75
+	str	wzr, [x25, #:lo12:.LANCHOR190]
+	add	x0, x27, :lo12:.LANCHOR81
 	str	x0, [x29, 96]
-.L2623:
+.L2667:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
 	cmp	w0, w20
-	bls	.L2633
-	add	x0, x27, :lo12:.LANCHOR75
+	bls	.L2677
+	add	x0, x27, :lo12:.LANCHOR81
 	mov	w22, 0
 	str	x0, [x29, 120]
 	adrp	x0, .LANCHOR19
 	add	x0, x0, :lo12:.LANCHOR19
 	str	x0, [x29, 104]
-	b	.L2634
-.L2632:
+	b	.L2678
+.L2676:
 	ldr	x0, [x29, 104]
 	ldr	w0, [x0]
-	tbz	x0, 12, .L2624
-	adrp	x0, .LC150
+	tbz	x0, 12, .L2668
+	adrp	x0, .LC147
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC150
+	add	x0, x0, :lo12:.LC147
 	bl	printf
-.L2624:
+.L2668:
 	ldr	x0, [x29, 96]
 	ldrb	w19, [x0]
 	madd	w19, w21, w19, w22
 	and	w19, w19, 65535
-	cbnz	w20, .L2625
+	cbnz	w20, .L2669
 	adrp	x0, .LANCHOR6
 	ldr	x0, [x0, #:lo12:.LANCHOR6]
 	ldrb	w0, [x0, 47]
 	cmp	w0, w19
-	bcs	.L2626
-.L2625:
+	bcs	.L2670
+.L2669:
 	and	w28, w20, 255
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_check_bad_block
-	cbnz	w0, .L2626
-	adrp	x0, .LANCHOR111
+	cbnz	w0, .L2670
+	adrp	x0, .LANCHOR117
 	mov	w1, w23
-	ldrh	w7, [x0, #:lo12:.LANCHOR111]
+	ldrh	w7, [x0, #:lo12:.LANCHOR117]
 	mov	w0, w28
 	mul	w26, w7, w19
 	mov	w2, w26
 	bl	flash_erase_block_en
-	cbz	w0, .L2627
-	adrp	x0, .LANCHOR78
-	ldrb	w0, [x0, #:lo12:.LANCHOR78]
+	cbz	w0, .L2671
+	adrp	x0, .LANCHOR84
+	ldrb	w0, [x0, #:lo12:.LANCHOR84]
 	cmp	w0, 2
-	bne	.L2649
+	bne	.L2693
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L2649
+	cbz	w0, .L2693
 	mov	w2, w26
 	mov	w1, 1
 	mov	w0, w28
 	bl	flash_erase_block_en
-	cbnz	w0, .L2649
-.L2631:
-	adrp	x0, .LANCHOR78
+	cbnz	w0, .L2693
+.L2675:
+	adrp	x0, .LANCHOR84
 	mov	w23, 1
-	ldrb	w0, [x0, #:lo12:.LANCHOR78]
+	ldrb	w0, [x0, #:lo12:.LANCHOR84]
 	add	w26, w26, w0, lsl 24
-.L2630:
-	adrp	x0, .LANCHOR131
-	ldr	x2, [x24, #:lo12:.LANCHOR187]
+.L2674:
+	adrp	x0, .LANCHOR68
+	ldr	x2, [x24, #:lo12:.LANCHOR189]
 	mov	w5, 1
-	add	x3, x25, :lo12:.LANCHOR188
-	ldrb	w4, [x0, #:lo12:.LANCHOR131]
+	add	x3, x25, :lo12:.LANCHOR190
+	ldrb	w4, [x0, #:lo12:.LANCHOR68]
 	mov	w1, w26
 	mov	w0, w28
 	bl	flash_prog_page_en
-	cbz	w0, .L2626
-.L2649:
+	cbz	w0, .L2670
+.L2693:
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_mask_bad_block
-.L2626:
+.L2670:
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L2634:
+.L2678:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, w22
-	bhi	.L2632
+	bhi	.L2676
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2623
-.L2627:
-	cbz	w23, .L2630
-	b	.L2631
-.L2633:
-	cbz	w23, .L2635
+	b	.L2667
+.L2671:
+	cbz	w23, .L2674
+	b	.L2675
+.L2677:
+	cbz	w23, .L2679
 	adrp	x0, .LANCHOR9
 	mov	w1, 2
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
@@ -16407,7 +16644,7 @@ ftl_test_block:
 	ldrb	w0, [x21, 2]
 	bfi	w0, w1, 3, 2
 	strb	w0, [x21, 2]
-.L2635:
+.L2679:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -16442,18 +16679,18 @@ ftl_prog_page:
 	bl	flash_prog_page_en
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L2650
-	mov	w2, 2678
-	adrp	x1, .LANCHOR189
+	bne	.L2694
+	mov	w2, 2683
+	adrp	x1, .LANCHOR191
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR189
+	add	x1, x1, :lo12:.LANCHOR191
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	adrp	x0, .LC149
+	adrp	x0, .LC146
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC149
+	add	x0, x0, :lo12:.LC146
 	bl	printf
-.L2650:
+.L2694:
 	mov	w0, w19
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -16470,79 +16707,79 @@ ftl_info_flush:
 	mov	w1, 0
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR131
+	adrp	x21, .LANCHOR68
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR110
-	ldrb	w2, [x21, #:lo12:.LANCHOR131]
+	adrp	x24, .LANCHOR69
+	ldrb	w2, [x21, #:lo12:.LANCHOR68]
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR190
+	adrp	x20, .LANCHOR192
 	str	w0, [x29, 116]
-	add	x0, x20, :lo12:.LANCHOR190
+	add	x0, x20, :lo12:.LANCHOR192
 	stp	x25, x26, [sp, 64]
 	lsl	w2, w2, 1
 	stp	x27, x28, [sp, 80]
 	bl	ftl_memset
-	ldr	x0, [x24, #:lo12:.LANCHOR110]
+	ldr	x0, [x24, #:lo12:.LANCHOR69]
 	ldrh	w1, [x0, 74]
 	cmp	w1, 1
-	bls	.L2654
+	bls	.L2698
 	strh	wzr, [x0, 150]
-.L2654:
-	adrp	x23, .LANCHOR191
-	add	x19, x23, :lo12:.LANCHOR191
-	adrp	x25, .LANCHOR111
+.L2698:
+	adrp	x23, .LANCHOR193
+	add	x19, x23, :lo12:.LANCHOR193
+	adrp	x25, .LANCHOR117
 	mov	w26, 0
-	add	x0, x25, :lo12:.LANCHOR111
+	add	x0, x25, :lo12:.LANCHOR117
 	str	x0, [x29, 104]
-.L2667:
-	add	x0, x23, :lo12:.LANCHOR191
-	adrp	x22, .LANCHOR192
-	ldrh	w1, [x25, #:lo12:.LANCHOR111]
-	add	x7, x20, :lo12:.LANCHOR190
+.L2711:
+	add	x0, x23, :lo12:.LANCHOR193
+	adrp	x22, .LANCHOR194
+	ldrh	w1, [x25, #:lo12:.LANCHOR117]
+	add	x7, x20, :lo12:.LANCHOR192
 	str	w1, [x29, 120]
 	ldrh	w27, [x0, 2]
-	ldr	x0, [x24, #:lo12:.LANCHOR110]
-	ldrb	w1, [x21, #:lo12:.LANCHOR131]
-	ldrb	w28, [x23, #:lo12:.LANCHOR191]
+	ldr	x0, [x24, #:lo12:.LANCHOR69]
+	ldrb	w1, [x21, #:lo12:.LANCHOR68]
+	ldrb	w28, [x23, #:lo12:.LANCHOR193]
 	ldr	w6, [x0, 4]
 	lsl	w1, w1, 9
 	add	w6, w6, 1
 	str	w6, [x0, 4]
 	ldr	w0, [x29, 116]
-	str	w0, [x20, #:lo12:.LANCHOR190]
-	ldr	x0, [x22, #:lo12:.LANCHOR192]
+	str	w0, [x20, #:lo12:.LANCHOR192]
+	ldr	x0, [x22, #:lo12:.LANCHOR194]
 	str	w6, [x7, 4]
 	bl	js_hash
 	str	w0, [x7, 8]
 	adrp	x0, .LANCHOR19
 	ldr	w0, [x0, #:lo12:.LANCHOR19]
-	tbz	x0, 12, .L2655
-	adrp	x0, .LC151
+	tbz	x0, 12, .L2699
+	adrp	x0, .LC148
 	mov	w3, w6
 	mov	w2, w27
 	mov	w1, w28
-	add	x0, x0, :lo12:.LC151
+	add	x0, x0, :lo12:.LC148
 	bl	printf
-.L2655:
-	adrp	x1, .LANCHOR94
+.L2699:
+	adrp	x1, .LANCHOR100
 	ldrh	w0, [x19, 2]
-	ldrh	w1, [x1, #:lo12:.LANCHOR94]
+	ldrh	w1, [x1, #:lo12:.LANCHOR100]
 	cmp	w1, w0
-	bhi	.L2656
-	adrp	x27, .LANCHOR193
+	bhi	.L2700
+	adrp	x27, .LANCHOR195
 	adrp	x3, .LC0
-	add	x27, x27, :lo12:.LANCHOR193
+	add	x27, x27, :lo12:.LANCHOR195
 	add	x3, x3, :lo12:.LC0
-.L2663:
+.L2707:
 	ldrb	w0, [x19, 1]
 	adrp	x28, .LANCHOR6
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x19, 1]
 	cmp	w0, 7
-	bls	.L2657
+	bls	.L2701
 	mov	x0, 0
-.L2662:
+.L2706:
 	ldr	x2, [x28, #:lo12:.LANCHOR6]
 	add	w1, w0, 8
 	and	w26, w0, 65535
@@ -16551,86 +16788,86 @@ ftl_info_flush:
 	add	w1, w2, 127
 	and	w1, w1, 255
 	cmp	w1, 125
-	bhi	.L2658
+	bhi	.L2702
 	mov	x0, x3
 	str	x3, [x29, 120]
 	mov	w2, 846
 	mov	x1, x27
 	bl	printf
 	ldr	x3, [x29, 120]
-.L2661:
+.L2705:
 	strb	w26, [x19, 1]
 	mov	w26, 1
-.L2657:
+.L2701:
 	ldr	x0, [x28, #:lo12:.LANCHOR6]
 	ldrb	w1, [x19, 1]
 	add	x0, x0, x1
 	ldrb	w28, [x0, 40]
 	strb	w28, [x19]
 	cmp	w28, 255
-	beq	.L2663
+	beq	.L2707
 	ldr	x0, [x29, 104]
 	ldrh	w27, [x0]
 	mov	w0, 0
 	mul	w27, w27, w28
 	mov	w1, w27
 	bl	flash_erase_block
-	ldrb	w4, [x21, #:lo12:.LANCHOR131]
+	ldrb	w4, [x21, #:lo12:.LANCHOR68]
 	mov	w1, w27
-	ldr	x2, [x22, #:lo12:.LANCHOR192]
-	add	x3, x20, :lo12:.LANCHOR190
+	ldr	x2, [x22, #:lo12:.LANCHOR194]
+	add	x3, x20, :lo12:.LANCHOR192
 	mov	w0, 0
 	add	w27, w27, 1
 	bl	ftl_prog_page
 	mov	w0, 1
 	strh	w0, [x19, 2]
-.L2664:
-	ldrb	w4, [x21, #:lo12:.LANCHOR131]
+.L2708:
+	ldrb	w4, [x21, #:lo12:.LANCHOR68]
 	mov	w1, w27
-	ldr	x2, [x22, #:lo12:.LANCHOR192]
-	add	x3, x20, :lo12:.LANCHOR190
+	ldr	x2, [x22, #:lo12:.LANCHOR194]
+	add	x3, x20, :lo12:.LANCHOR192
 	mov	w0, 0
 	bl	ftl_prog_page
 	cmn	w0, #1
 	ldrh	w1, [x19, 2]
-	adrp	x0, .LANCHOR194
+	adrp	x0, .LANCHOR196
 	add	w1, w1, 1
 	strh	w1, [x19, 2]
-	beq	.L2665
-	ldrb	w1, [x0, #:lo12:.LANCHOR194]
-	cbz	w1, .L2666
-.L2665:
-	strb	wzr, [x0, #:lo12:.LANCHOR194]
-	b	.L2667
-.L2658:
+	beq	.L2709
+	ldrb	w1, [x0, #:lo12:.LANCHOR196]
+	cbz	w1, .L2710
+.L2709:
+	strb	wzr, [x0, #:lo12:.LANCHOR196]
+	b	.L2711
+.L2702:
 	cmp	w2, 255
-	bne	.L2661
+	bne	.L2705
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L2662
+	bne	.L2706
 	mov	w26, w0
-	b	.L2661
-.L2656:
+	b	.L2705
+.L2700:
 	ldr	w1, [x29, 120]
 	madd	w27, w1, w28, w27
-	cbnz	w0, .L2664
+	cbnz	w0, .L2708
 	mov	w1, w27
 	bl	flash_erase_block
-	b	.L2664
-.L2666:
-	cbnz	w26, .L2668
-.L2676:
-	adrp	x0, .LANCHOR191
-	ldrb	w0, [x0, #:lo12:.LANCHOR191]
+	b	.L2708
+.L2710:
+	cbnz	w26, .L2712
+.L2720:
+	adrp	x0, .LANCHOR193
+	ldrb	w0, [x0, #:lo12:.LANCHOR193]
 	cmp	w0, 255
-	bne	.L2670
-	adrp	x1, .LANCHOR193
+	bne	.L2714
+	adrp	x1, .LANCHOR195
 	adrp	x0, .LC0
 	mov	w2, 890
-	add	x1, x1, :lo12:.LANCHOR193
+	add	x1, x1, :lo12:.LANCHOR195
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2670:
+.L2714:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -16639,17 +16876,17 @@ ftl_info_flush:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2668:
+.L2712:
 	ldrb	w19, [x19, 1]
-	adrp	x20, .LANCHOR193
+	adrp	x20, .LANCHOR195
 	adrp	x21, .LC0
-	add	x20, x20, :lo12:.LANCHOR193
+	add	x20, x20, :lo12:.LANCHOR195
 	add	w19, w19, 1
 	add	x21, x21, :lo12:.LC0
 	adrp	x22, .LANCHOR6
-.L2671:
+.L2715:
 	cmp	w19, 7
-	bhi	.L2676
+	bhi	.L2720
 	ldr	x1, [x22, #:lo12:.LANCHOR6]
 	add	w0, w19, 8
 	add	x0, x1, x0, sxtw
@@ -16657,25 +16894,25 @@ ftl_info_flush:
 	add	w0, w23, 127
 	and	w0, w0, 255
 	cmp	w0, 125
-	bhi	.L2672
+	bhi	.L2716
 	mov	w2, 881
 	mov	x1, x20
 	mov	x0, x21
 	bl	printf
-.L2673:
-	adrp	x0, .LANCHOR111
-	ldrh	w1, [x0, #:lo12:.LANCHOR111]
+.L2717:
+	adrp	x0, .LANCHOR117
+	ldrh	w1, [x0, #:lo12:.LANCHOR117]
 	mov	w0, 0
 	mul	w1, w1, w23
 	bl	flash_erase_block
-	b	.L2674
-.L2672:
+	b	.L2718
+.L2716:
 	cmp	w23, 255
-	bne	.L2673
-.L2674:
+	bne	.L2717
+.L2718:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L2671
+	b	.L2715
 	.size	ftl_info_flush, .-ftl_info_flush
 	.section	.text.ftl_info_blk_init,"ax",@progbits
 	.align	2
@@ -16683,52 +16920,52 @@ ftl_info_flush:
 	.type	ftl_info_blk_init, %function
 ftl_info_blk_init:
 	stp	x29, x30, [sp, -112]!
-	adrp	x0, .LANCHOR195
-	adrp	x1, .LANCHOR194
+	adrp	x0, .LANCHOR197
+	adrp	x1, .LANCHOR196
 	mov	w2, 16384
 	add	x29, sp, 0
-	strb	wzr, [x0, #:lo12:.LANCHOR195]
+	strb	wzr, [x0, #:lo12:.LANCHOR197]
 	mov	w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR194]
-	adrp	x1, .LANCHOR196
-	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR192
 	strb	w0, [x1, #:lo12:.LANCHOR196]
+	adrp	x1, .LANCHOR198
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR194
+	strb	w0, [x1, #:lo12:.LANCHOR198]
 	adrp	x1, .LANCHOR9
-	ldr	x0, [x21, #:lo12:.LANCHOR192]
+	ldr	x0, [x21, #:lo12:.LANCHOR194]
 	mov	x22, 7
 	str	x0, [x1, #:lo12:.LANCHOR9]
 	adrp	x1, .LANCHOR8
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR110
+	adrp	x19, .LANCHOR69
 	ldrh	w1, [x1, #:lo12:.LANCHOR8]
-	adrp	x20, .LANCHOR191
+	adrp	x20, .LANCHOR193
 	stp	x23, x24, [sp, 48]
 	adrp	x23, .LANCHOR6
 	stp	x25, x26, [sp, 64]
-	adrp	x24, .LANCHOR131
+	adrp	x24, .LANCHOR68
 	add	x1, x0, x1, lsl 2
 	stp	x27, x28, [sp, 80]
-	str	x1, [x19, #:lo12:.LANCHOR110]
+	str	x1, [x19, #:lo12:.LANCHOR69]
 	mov	w1, 0
 	bl	ftl_memset
-	adrp	x26, .LANCHOR111
-	adrp	x0, .LANCHOR197
+	adrp	x26, .LANCHOR117
+	adrp	x0, .LANCHOR199
 	mov	w1, 0
 	mov	w2, 16384
 	mov	w27, 21574
-	ldr	x0, [x0, #:lo12:.LANCHOR197]
-	add	x26, x26, :lo12:.LANCHOR111
-	add	x24, x24, :lo12:.LANCHOR131
+	ldr	x0, [x0, #:lo12:.LANCHOR199]
+	add	x26, x26, :lo12:.LANCHOR117
+	add	x24, x24, :lo12:.LANCHOR68
 	movk	w27, 0x494c, lsl 16
 	bl	ftl_memset
 	ldr	x1, [x23, #:lo12:.LANCHOR6]
-	add	x0, x20, :lo12:.LANCHOR191
+	add	x0, x20, :lo12:.LANCHOR193
 	strb	wzr, [x0, 1]
 	ldrb	w1, [x1, 40]
-	strb	w1, [x20, #:lo12:.LANCHOR191]
+	strb	w1, [x20, #:lo12:.LANCHOR193]
 	strh	wzr, [x0, 2]
-.L2692:
+.L2736:
 	ldr	x1, [x23, #:lo12:.LANCHOR6]
 	add	w0, w22, 8
 	sxth	w25, w22
@@ -16736,31 +16973,31 @@ ftl_info_blk_init:
 	add	x0, x1, x0, sxtw
 	ldrb	w0, [x0, 32]
 	cmp	w0, 255
-	bne	.L2691
-.L2696:
+	bne	.L2735
+.L2740:
 	sub	x22, x22, #1
 	cmn	x22, #1
-	bne	.L2692
+	bne	.L2736
 	mov	w25, 0
-.L2693:
+.L2737:
 	adrp	x24, .LANCHOR19
 	ldr	w0, [x24, #:lo12:.LANCHOR19]
-	tbz	x0, 12, .L2697
-	ldr	x0, [x19, #:lo12:.LANCHOR110]
+	tbz	x0, 12, .L2741
+	ldr	x0, [x19, #:lo12:.LANCHOR69]
 	mov	w2, 4800
 	mov	w1, w22
 	ldr	w3, [x0]
-	adrp	x0, .LC153
-	add	x0, x0, :lo12:.LC153
+	adrp	x0, .LC150
+	add	x0, x0, :lo12:.LC150
 	bl	printf
-.L2697:
+.L2741:
 	cmn	w22, #1
-	bne	.L2698
-	ldr	x0, [x21, #:lo12:.LANCHOR192]
+	bne	.L2742
+	ldr	x0, [x21, #:lo12:.LANCHOR194]
 	mov	w1, 0
 	mov	w2, 16384
 	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR110]
+	ldr	x0, [x19, #:lo12:.LANCHOR69]
 	mov	w1, 21574
 	movk	w1, 0x494c, lsl 16
 	str	w1, [x0]
@@ -16768,7 +17005,7 @@ ftl_info_blk_init:
 	movk	w1, 0x6, lsl 16
 	str	w1, [x0, 12]
 	mov	w0, w22
-.L2690:
+.L2734:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -16776,12 +17013,12 @@ ftl_info_blk_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2691:
+.L2735:
 	ldrh	w6, [x26]
-	adrp	x7, .LANCHOR190
+	adrp	x7, .LANCHOR192
 	ldrb	w4, [x24]
-	add	x7, x7, :lo12:.LANCHOR190
-	ldr	x2, [x21, #:lo12:.LANCHOR192]
+	add	x7, x7, :lo12:.LANCHOR192
+	ldr	x2, [x21, #:lo12:.LANCHOR194]
 	mov	x3, x7
 	str	x7, [x29, 96]
 	mul	w6, w6, w0
@@ -16793,90 +17030,90 @@ ftl_info_blk_init:
 	cmn	w0, #1
 	ldr	w6, [x29, 108]
 	ldr	x7, [x29, 96]
-	bne	.L2694
+	bne	.L2738
 	ldrb	w4, [x24]
 	mov	x3, x7
-	ldr	x2, [x21, #:lo12:.LANCHOR192]
+	ldr	x2, [x21, #:lo12:.LANCHOR194]
 	add	w1, w6, 1
 	mov	w0, 0
 	bl	ftl_read_page
 	mov	w5, w0
-.L2694:
+.L2738:
 	adrp	x0, .LANCHOR19
 	ldr	w0, [x0, #:lo12:.LANCHOR19]
-	tbz	x0, 12, .L2695
-	ldr	x0, [x19, #:lo12:.LANCHOR110]
+	tbz	x0, 12, .L2739
+	ldr	x0, [x19, #:lo12:.LANCHOR69]
 	mov	w2, w5
 	str	w5, [x29, 108]
 	mov	w3, 749
 	mov	w1, w28
 	ldr	w4, [x0]
-	adrp	x0, .LC152
-	add	x0, x0, :lo12:.LC152
+	adrp	x0, .LC149
+	add	x0, x0, :lo12:.LC149
 	bl	printf
 	ldr	w5, [x29, 108]
-.L2695:
+.L2739:
 	cmn	w5, #1
-	beq	.L2696
-	ldr	x0, [x19, #:lo12:.LANCHOR110]
+	beq	.L2740
+	ldr	x0, [x19, #:lo12:.LANCHOR69]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L2696
+	bne	.L2740
 	mov	w22, w25
-	b	.L2693
-.L2698:
+	b	.L2737
+.L2742:
 	ldr	x1, [x23, #:lo12:.LANCHOR6]
 	add	w0, w25, 8
-	ldr	x2, [x21, #:lo12:.LANCHOR192]
+	ldr	x2, [x21, #:lo12:.LANCHOR194]
 	mov	w4, 4
-	adrp	x26, .LANCHOR131
+	adrp	x26, .LANCHOR68
 	mov	w28, 21574
 	add	x0, x1, x0, sxtw
-	adrp	x27, .LC154
-	add	x26, x26, :lo12:.LANCHOR131
-	add	x27, x27, :lo12:.LC154
+	adrp	x27, .LC151
+	add	x26, x26, :lo12:.LANCHOR68
+	add	x27, x27, :lo12:.LC151
 	movk	w28, 0x494c, lsl 16
 	ldrb	w1, [x0, 32]
-	add	x0, x20, :lo12:.LANCHOR191
-	strb	w1, [x20, #:lo12:.LANCHOR191]
+	add	x0, x20, :lo12:.LANCHOR193
+	strb	w1, [x20, #:lo12:.LANCHOR193]
 	strb	w25, [x0, 1]
-	adrp	x25, .LANCHOR190
+	adrp	x25, .LANCHOR192
 	mov	w0, 0
-	add	x3, x25, :lo12:.LANCHOR190
+	add	x3, x25, :lo12:.LANCHOR192
 	bl	flash_get_last_written_page
 	sxth	w22, w0
 	add	w0, w0, 1
-	ldrb	w23, [x20, #:lo12:.LANCHOR191]
+	ldrb	w23, [x20, #:lo12:.LANCHOR193]
 	and	w0, w0, 65535
 	str	w0, [x29, 108]
-	adrp	x0, .LANCHOR111
-	ldrh	w0, [x0, #:lo12:.LANCHOR111]
+	adrp	x0, .LANCHOR117
+	ldrh	w0, [x0, #:lo12:.LANCHOR117]
 	madd	w23, w23, w0, w22
-.L2700:
-	tbnz	w22, #31, .L2704
+.L2744:
+	tbnz	w22, #31, .L2748
 	ldrb	w4, [x26]
-	add	x5, x25, :lo12:.LANCHOR190
-	ldr	x2, [x21, #:lo12:.LANCHOR192]
+	add	x5, x25, :lo12:.LANCHOR192
+	ldr	x2, [x21, #:lo12:.LANCHOR194]
 	mov	x3, x5
 	mov	w1, w23
 	mov	w0, 0
 	str	x5, [x29, 96]
 	bl	ftl_read_page
 	cmn	w0, #1
-	beq	.L2701
-	ldr	x0, [x19, #:lo12:.LANCHOR110]
+	beq	.L2745
+	ldr	x0, [x19, #:lo12:.LANCHOR69]
 	ldr	x5, [x29, 96]
 	ldr	w0, [x0]
 	cmp	w0, w28
-	bne	.L2701
+	bne	.L2745
 	ldr	w6, [x5, 8]
-	cbnz	w6, .L2702
-.L2704:
+	cbnz	w6, .L2746
+.L2748:
 	ldrh	w0, [x29, 108]
-	add	x20, x20, :lo12:.LANCHOR191
+	add	x20, x20, :lo12:.LANCHOR193
 	strh	w0, [x20, 2]
 	bl	ftl_tmp_into_update
-	ldr	x1, [x19, #:lo12:.LANCHOR110]
+	ldr	x1, [x19, #:lo12:.LANCHOR69]
 	ldr	w0, [x1, 64]
 	add	w0, w0, 1
 	str	w0, [x1, 64]
@@ -16885,32 +17122,32 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_info_flush
 	ldr	w0, [x24, #:lo12:.LANCHOR19]
-	tbnz	x0, 14, .L2703
-.L2720:
+	tbnz	x0, 14, .L2747
+.L2764:
 	mov	w0, 0
-	b	.L2690
-.L2702:
-	ldr	x0, [x21, #:lo12:.LANCHOR192]
+	b	.L2734
+.L2746:
+	ldr	x0, [x21, #:lo12:.LANCHOR194]
 	ldrb	w1, [x26]
 	lsl	w1, w1, 9
 	bl	js_hash
 	cmp	w6, w0
-	beq	.L2704
+	beq	.L2748
 	mov	w1, w6
 	mov	x0, x27
 	bl	printf
-.L2701:
+.L2745:
 	sub	w22, w22, #1
 	sub	w23, w23, #1
 	sxth	w22, w22
-	b	.L2700
-.L2703:
-	ldr	x0, [x19, #:lo12:.LANCHOR110]
+	b	.L2744
+.L2747:
+	ldr	x0, [x19, #:lo12:.LANCHOR69]
 	ldr	w1, [x0, 156]
-	adrp	x0, .LC155
-	add	x0, x0, :lo12:.LC155
+	adrp	x0, .LC152
+	add	x0, x0, :lo12:.LC152
 	bl	printf
-	b	.L2720
+	b	.L2764
 	.size	ftl_info_blk_init, .-ftl_info_blk_init
 	.section	.text.ftl_ext_info_flush,"ax",@progbits
 	.align	2
@@ -16927,76 +17164,76 @@ ftl_ext_info_flush:
 	ldr	w1, [x0, 520]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbz	w1, .L2722
+	cbz	w1, .L2766
 	str	wzr, [x0, 520]
-.L2722:
-	adrp	x20, .LANCHOR94
-	adrp	x22, .LANCHOR198
+.L2766:
+	adrp	x20, .LANCHOR100
+	adrp	x22, .LANCHOR200
 	adrp	x21, .LANCHOR31
-	add	x20, x20, :lo12:.LANCHOR94
-	add	x22, x22, :lo12:.LANCHOR198
+	add	x20, x20, :lo12:.LANCHOR100
+	add	x22, x22, :lo12:.LANCHOR200
 	add	x21, x21, :lo12:.LANCHOR31
 	mov	w0, 0
 	bl	ftl_total_vpn_update
-.L2723:
-	adrp	x23, .LANCHOR110
+.L2767:
+	adrp	x23, .LANCHOR69
 	mov	x24, x23
-.L2726:
-	ldr	x0, [x23, #:lo12:.LANCHOR110]
+.L2770:
+	ldr	x0, [x23, #:lo12:.LANCHOR69]
 	ldr	w1, [x0, 56]
 	add	w1, w1, 1
 	str	w1, [x0, 56]
 	ldrh	w1, [x0, 140]
 	ldrh	w0, [x20]
 	cmp	w1, w0
-	bcc	.L2724
+	bcc	.L2768
 	bl	ftl_ext_alloc_new_blk
-.L2724:
-	ldr	x0, [x24, #:lo12:.LANCHOR110]
+.L2768:
+	ldr	x0, [x24, #:lo12:.LANCHOR69]
 	ldrh	w1, [x0, 130]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2725
+	bne	.L2769
 	adrp	x0, .LC0
-	mov	w2, 2211
+	mov	w2, 2216
 	mov	x1, x22
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2725:
+.L2769:
 	ldrb	w19, [x21]
 	mov	w0, 24
-	ldr	x1, [x24, #:lo12:.LANCHOR110]
-	adrp	x26, .LANCHOR131
+	ldr	x1, [x24, #:lo12:.LANCHOR69]
+	adrp	x26, .LANCHOR68
 	sub	w19, w0, w19
-	adrp	x0, .LANCHOR74
-	adrp	x27, .LANCHOR190
-	add	x25, x27, :lo12:.LANCHOR190
-	ldrh	w0, [x0, #:lo12:.LANCHOR74]
+	adrp	x0, .LANCHOR80
+	adrp	x27, .LANCHOR192
+	add	x25, x27, :lo12:.LANCHOR192
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	ldrh	w2, [x1, 130]
 	sub	w0, w19, w0
 	mov	w19, 1
 	asr	w28, w2, w0
 	lsl	w19, w19, w0
-	adrp	x0, .LANCHOR111
+	adrp	x0, .LANCHOR117
 	sub	w19, w19, #1
 	and	w19, w19, w2
-	ldrh	w2, [x0, #:lo12:.LANCHOR111]
+	ldrh	w2, [x0, #:lo12:.LANCHOR117]
 	ldrh	w0, [x1, 140]
 	sxth	w19, w19
 	mov	w1, 0
 	madd	w19, w19, w2, w0
-	ldrb	w2, [x26, #:lo12:.LANCHOR131]
+	ldrb	w2, [x26, #:lo12:.LANCHOR68]
 	mov	x0, x25
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	ldr	x0, [x24, #:lo12:.LANCHOR110]
-	ldrb	w7, [x26, #:lo12:.LANCHOR131]
-	str	wzr, [x27, #:lo12:.LANCHOR190]
+	ldr	x0, [x24, #:lo12:.LANCHOR69]
+	ldrb	w7, [x26, #:lo12:.LANCHOR68]
+	str	wzr, [x27, #:lo12:.LANCHOR192]
 	ldr	w0, [x0, 56]
 	lsl	w1, w7, 9
 	str	w0, [x25, 4]
-	adrp	x0, .LANCHOR197
-	ldr	x6, [x0, #:lo12:.LANCHOR197]
+	adrp	x0, .LANCHOR199
+	ldr	x6, [x0, #:lo12:.LANCHOR199]
 	mov	x0, x6
 	bl	js_hash
 	mov	x2, x6
@@ -17006,22 +17243,22 @@ ftl_ext_info_flush:
 	mov	x3, x25
 	mov	w0, w28
 	bl	ftl_prog_page
-	ldr	x2, [x24, #:lo12:.LANCHOR110]
+	ldr	x2, [x24, #:lo12:.LANCHOR69]
 	ldrh	w1, [x2, 140]
 	add	w1, w1, 1
 	and	w1, w1, 65535
 	strh	w1, [x2, 140]
 	cmp	w1, 1
-	beq	.L2726
+	beq	.L2770
 	cmn	w0, #1
-	adrp	x0, .LANCHOR196
-	beq	.L2727
-	ldrb	w1, [x0, #:lo12:.LANCHOR196]
-	cbz	w1, .L2728
-.L2727:
-	strb	wzr, [x0, #:lo12:.LANCHOR196]
-	b	.L2723
-.L2728:
+	adrp	x0, .LANCHOR198
+	beq	.L2771
+	ldrb	w1, [x0, #:lo12:.LANCHOR198]
+	cbz	w1, .L2772
+.L2771:
+	strb	wzr, [x0, #:lo12:.LANCHOR198]
+	b	.L2767
+.L2772:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -17037,28 +17274,28 @@ ftl_ext_info_flush:
 	.type	ftl_ext_info_init, %function
 ftl_ext_info_init:
 	stp	x29, x30, [sp, -128]!
-	adrp	x0, .LANCHOR121
-	adrp	x2, .LANCHOR74
+	adrp	x0, .LANCHOR127
+	adrp	x2, .LANCHOR80
 	mov	w4, 4
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR110
-	strh	wzr, [x0, #:lo12:.LANCHOR121]
-	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	adrp	x20, .LANCHOR69
+	strh	wzr, [x0, #:lo12:.LANCHOR127]
+	ldr	x0, [x20, #:lo12:.LANCHOR69]
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR197
+	adrp	x21, .LANCHOR199
 	stp	x27, x28, [sp, 80]
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR190
+	adrp	x24, .LANCHOR192
 	ldrh	w1, [x0, 130]
 	adrp	x0, .LANCHOR31
 	stp	x25, x26, [sp, 64]
-	add	x3, x24, :lo12:.LANCHOR190
+	add	x3, x24, :lo12:.LANCHOR192
 	ldrb	w19, [x0, #:lo12:.LANCHOR31]
 	mov	w0, 24
 	sub	w0, w0, w19
-	ldrh	w19, [x2, #:lo12:.LANCHOR74]
-	ldr	x2, [x21, #:lo12:.LANCHOR197]
+	ldrh	w19, [x2, #:lo12:.LANCHOR80]
+	ldr	x2, [x21, #:lo12:.LANCHOR199]
 	sub	w0, w0, w19
 	mov	w19, 1
 	lsl	w19, w19, w0
@@ -17073,35 +17310,35 @@ ftl_ext_info_init:
 	adrp	x0, .LANCHOR19
 	stp	x0, x24, [x29, 112]
 	ldr	w1, [x0, #:lo12:.LANCHOR19]
-	tbz	x1, 12, .L2739
-	ldr	x0, [x20, #:lo12:.LANCHOR110]
-	adrp	x1, .LANCHOR199
+	tbz	x1, 12, .L2783
+	ldr	x0, [x20, #:lo12:.LANCHOR69]
+	adrp	x1, .LANCHOR201
 	and	w4, w22, 65535
 	mov	w3, w23
-	mov	w2, 2256
-	add	x1, x1, :lo12:.LANCHOR199
+	mov	w2, 2261
+	add	x1, x1, :lo12:.LANCHOR201
 	ldrh	w5, [x0, 130]
-	adrp	x0, .LC156
-	add	x0, x0, :lo12:.LC156
+	adrp	x0, .LC153
+	add	x0, x0, :lo12:.LC153
 	bl	printf
-.L2739:
-	adrp	x25, .LANCHOR131
-	adrp	x26, .LANCHOR111
+.L2783:
+	adrp	x25, .LANCHOR68
+	adrp	x26, .LANCHOR117
 	mov	w28, 20038
-	add	x25, x25, :lo12:.LANCHOR131
-	add	x26, x26, :lo12:.LANCHOR111
+	add	x25, x25, :lo12:.LANCHOR68
+	add	x26, x26, :lo12:.LANCHOR117
 	mov	w24, 0
 	movk	w28, 0x4549, lsl 16
-.L2740:
+.L2784:
 	and	w22, w23, 65535
 	sub	w0, w22, w24
-	tbnz	x0, 15, .L2745
+	tbnz	x0, 15, .L2789
 	ldr	x0, [x29, 120]
 	sub	w1, w23, w24
 	ldrb	w4, [x25]
-	add	x5, x0, :lo12:.LANCHOR190
+	add	x5, x0, :lo12:.LANCHOR192
 	ldrh	w0, [x26]
-	ldr	x2, [x21, #:lo12:.LANCHOR197]
+	ldr	x2, [x21, #:lo12:.LANCHOR199]
 	mov	x3, x5
 	str	x5, [x29, 104]
 	madd	w1, w0, w19, w1
@@ -17109,25 +17346,25 @@ ftl_ext_info_init:
 	bl	flash_read_page_en
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2741
+	beq	.L2785
 	adrp	x0, .LANCHOR12
 	ldr	x5, [x29, 104]
 	ldr	x0, [x0, #:lo12:.LANCHOR12]
 	ldr	w0, [x0]
 	cmp	w0, w28
-	bne	.L2741
+	bne	.L2785
 	ldr	w6, [x5, 8]
-	cbnz	w6, .L2742
-.L2745:
+	cbnz	w6, .L2786
+.L2789:
 	bl	zftl_sblk_list_init
-	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	ldr	x0, [x20, #:lo12:.LANCHOR69]
 	ldrh	w1, [x0, 140]
 	cmp	w1, w23
-	bgt	.L2744
+	bgt	.L2788
 	add	w22, w22, 1
 	strh	w22, [x0, 140]
 	bl	ftl_ext_info_flush
-.L2744:
+.L2788:
 	adrp	x0, .LANCHOR12
 	mov	w1, -1
 	ldr	x0, [x0, #:lo12:.LANCHOR12]
@@ -17144,20 +17381,20 @@ ftl_ext_info_init:
 	str	wzr, [x0, 604]
 	str	wzr, [x0, 608]
 	ldr	w1, [x1, #:lo12:.LANCHOR19]
-	tbz	x1, 12, .L2747
+	tbz	x1, 12, .L2791
 	ldr	w3, [x0, 12]
-	adrp	x1, .LANCHOR199
-	adrp	x0, .LC158
+	adrp	x1, .LANCHOR201
+	adrp	x0, .LC155
 	mov	w4, 0
 	mov	w2, 0
-	add	x1, x1, :lo12:.LANCHOR199
-	add	x0, x0, :lo12:.LC158
+	add	x1, x1, :lo12:.LANCHOR201
+	add	x0, x0, :lo12:.LC155
 	bl	printf
-.L2747:
-	adrp	x0, .LANCHOR72
+.L2791:
+	adrp	x0, .LANCHOR78
 	mov	w1, -1
 	ldp	x19, x20, [sp, 16]
-	strh	w1, [x0, #:lo12:.LANCHOR72]
+	strh	w1, [x0, #:lo12:.LANCHOR78]
 	ldp	x21, x22, [sp, 32]
 	mov	w0, 0
 	ldp	x23, x24, [sp, 48]
@@ -17165,1735 +17402,1244 @@ ftl_ext_info_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2742:
-	ldr	x0, [x21, #:lo12:.LANCHOR197]
+.L2786:
+	ldr	x0, [x21, #:lo12:.LANCHOR199]
 	ldrb	w1, [x25]
 	lsl	w1, w1, 9
 	bl	js_hash
 	cmp	w6, w0
-	beq	.L2745
-	adrp	x0, .LC157
+	beq	.L2789
+	adrp	x0, .LC154
 	mov	w1, w6
-	add	x0, x0, :lo12:.LC157
+	add	x0, x0, :lo12:.LC154
 	bl	printf
-.L2741:
+.L2785:
 	add	w24, w24, 1
-	b	.L2740
+	b	.L2784
 	.size	ftl_ext_info_init, .-ftl_ext_info_init
-	.section	.text.ftl_prog_ppa_page,"ax",@progbits
-	.align	2
-	.global	ftl_prog_ppa_page
-	.type	ftl_prog_ppa_page, %function
-ftl_prog_ppa_page:
-	adrp	x4, .LANCHOR31
-	mov	w5, 1
-	ldrb	w6, [x4, #:lo12:.LANCHOR31]
-	mov	w4, 24
-	sub	w4, w4, w6
-	lsl	w7, w5, w4
-	sub	w7, w7, #1
-	lsl	w5, w5, w6
-	sub	w6, w5, #1
-	lsr	w5, w0, w4
-	mov	w4, w3
-	mov	x3, x2
-	mov	x2, x1
-	and	w1, w7, w0
-	and	w0, w6, w5
-	b	ftl_prog_page
-	.size	ftl_prog_ppa_page, .-ftl_prog_ppa_page
-	.section	.text.ftl_write_last_log_page,"ax",@progbits
+	.section	.text.ftl_low_format_data_init,"ax",@progbits
 	.align	2
-	.global	ftl_write_last_log_page
-	.type	ftl_write_last_log_page, %function
-ftl_write_last_log_page:
-	ldrh	w1, [x0, 6]
-	cmp	w1, 1
-	bne	.L2761
+	.global	ftl_low_format_data_init
+	.type	ftl_low_format_data_init, %function
+ftl_low_format_data_init:
 	stp	x29, x30, [sp, -48]!
-	adrp	x1, .LANCHOR117
+	adrp	x0, .LANCHOR199
+	mov	w2, 16384
+	mov	w1, 0
 	add	x29, sp, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR199]
 	stp	x19, x20, [sp, 16]
-	mov	x19, x0
-	stp	x21, x22, [sp, 32]
-	ldr	x20, [x1, #:lo12:.LANCHOR117]
-	ldrh	w22, [x0, 12]
-	bl	ftl_get_new_free_page
+	adrp	x19, .LANCHOR69
+	str	x21, [sp, 32]
+	bl	ftl_memset
+	bl	zftl_sblk_list_init
+	mov	w0, 1
+	bl	ftl_alloc_sblk
+	mov	w1, 0
 	mov	w21, w0
-	cmn	w0, #1
-	beq	.L2762
-	ldrh	w0, [x19]
-	add	x20, x20, x22, uxth 2
-	bl	ftl_vpn_decrement
-	adrp	x0, .LANCHOR188
-	mov	w1, 15555
-	add	x7, x0, :lo12:.LANCHOR188
-	movk	w1, 0xf55f, lsl 16
-	str	w1, [x0, #:lo12:.LANCHOR188]
-	adrp	x0, .LANCHOR94
-	ldrh	w1, [x0, #:lo12:.LANCHOR94]
-	adrp	x0, .LANCHOR79
-	ldrb	w0, [x0, #:lo12:.LANCHOR79]
-	mul	w1, w1, w0
-	mov	x0, x20
-	lsl	w1, w1, 2
-	bl	js_hash
-	mov	x1, x7
-	mov	x2, 0
-	stp	w0, wzr, [x7, 4]
-	mov	w0, 2
-	str	wzr, [x7, 12]
-	str	wzr, [x1, 16]!
-	bl	ftl_debug_info_fill
-	mov	x2, x7
-	adrp	x0, .LANCHOR131
-	mov	x1, x20
-	ldrb	w3, [x0, #:lo12:.LANCHOR131]
+	bl	ftl_erase_sblk
+	ldr	x1, [x19, #:lo12:.LANCHOR69]
 	mov	w0, w21
-	bl	ftl_prog_ppa_page
-.L2762:
-	mov	w0, 0
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 48
-	ret
-.L2761:
-	mov	w0, -1
-	ret
-	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
-	.section	.text.ftl_dump_write_open_sblk,"ax",@progbits
-	.align	2
-	.global	ftl_dump_write_open_sblk
-	.type	ftl_dump_write_open_sblk, %function
-ftl_dump_write_open_sblk:
-	sub	sp, sp, #224
-	stp	x29, x30, [sp, 48]
-	add	x29, sp, 48
-	stp	x19, x20, [sp, 64]
-	and	w20, w0, 65535
-	adrp	x0, .LANCHOR8
-	stp	x21, x22, [sp, 80]
-	stp	x23, x24, [sp, 96]
-	ldrh	w0, [x0, #:lo12:.LANCHOR8]
-	stp	x25, x26, [sp, 112]
-	stp	x27, x28, [sp, 128]
-	cmp	w0, w20
-	bls	.L2767
-	adrp	x0, .LANCHOR83
-	str	x0, [x29, 120]
-	ldrb	w1, [x0, #:lo12:.LANCHOR83]
-	cbnz	w1, .L2769
-	adrp	x0, .LANCHOR80
-	ldrb	w0, [x0, #:lo12:.LANCHOR80]
-	cbz	w0, .L2767
-.L2769:
-	adrp	x0, .LANCHOR35
-	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbnz	w0, .L2767
-	adrp	x0, .LANCHOR9
-	ubfiz	x14, x20, 2, 16
-	mov	x15, x0
-	ldr	x1, [x0, #:lo12:.LANCHOR9]
-	add	x1, x1, x14
-	ldrb	w1, [x1, 2]
-	and	w1, w1, 224
-	cmp	w1, 160
-	bne	.L2791
-	adrp	x0, .LANCHOR78
-	ldrb	w25, [x0, #:lo12:.LANCHOR78]
-.L2770:
-	add	x21, x29, 176
-	adrp	x23, .LANCHOR94
-	mov	w0, w20
-	adrp	x26, .LANCHOR111
-	add	x26, x26, :lo12:.LANCHOR111
-	mov	w27, 0
-	strh	w20, [x21, -32]!
-	mov	w28, 0
-	add	x1, x21, 16
+	add	x1, x1, 672
 	bl	ftl_get_blk_list_in_sblk
-	ldrh	w1, [x23, #:lo12:.LANCHOR94]
-	and	w0, w0, 255
-	strb	w0, [x29, 153]
-	strb	wzr, [x29, 149]
-	strh	wzr, [x29, 146]
-	mul	w0, w0, w1
-	strh	wzr, [x29, 154]
-	strh	w0, [x29, 150]
-	ldr	x0, [x15, #:lo12:.LANCHOR9]
-	add	x1, x0, x14
-	ldr	w5, [x0, x14]
-	ldrb	w2, [x1, 2]
-	mov	w1, w20
-	ldrh	w4, [x0, x14]
-	adrp	x0, .LC159
-	ubfx	x5, x5, 11, 8
-	add	x0, x0, :lo12:.LC159
-	ubfx	x3, x2, 3, 2
-	and	w4, w4, 2047
-	ubfx	x2, x2, 5, 3
-	bl	printf
-	mov	w0, 1
-	bl	buf_alloc
-	mov	x19, x0
-	mov	w10, 0
-	add	x0, x23, :lo12:.LANCHOR94
-	str	x0, [x29, 128]
-.L2771:
-	ldr	x0, [x29, 128]
-	ldrh	w0, [x0]
-	cmp	w0, w27
-	bls	.L2779
-	lsl	w22, w27, 1
-	mov	w28, 0
-	sub	w0, w22, #1
-	add	w22, w22, w27
-	str	w0, [x29, 140]
-	sub	w22, w22, #1
-	adrp	x0, .LC160
-	add	x0, x0, :lo12:.LC160
-	str	x0, [x29, 112]
-	b	.L2782
-.L2791:
-	mov	w25, 1
-	b	.L2770
-.L2780:
-	ldrh	w12, [x21, x24]
-	mov	w0, 65535
-	cmp	w12, w0
-	bne	.L2772
-.L2778:
-	add	w10, w10, 1
-	and	w10, w10, 65535
-.L2773:
-	cmp	w25, w10
-	bcs	.L2780
-	add	w11, w28, 1
-	and	w28, w11, 65535
-.L2782:
-	ldrb	w0, [x29, 153]
-	cmp	w0, w28
-	bls	.L2781
-	sxtw	x24, w28
-	mov	w10, 1
-	add	x24, x24, 8
-	lsl	x24, x24, 1
-	b	.L2773
-.L2772:
-	ldrh	w3, [x26]
-	cmp	w25, 3
-	mul	w3, w3, w12
-	add	w0, w3, w10
-	bne	.L2774
-	adrp	x1, .LANCHOR36
-	ldrb	w1, [x1, #:lo12:.LANCHOR36]
-	cbz	w1, .L2775
-	adrp	x1, .LANCHOR78
-	add	w0, w0, w22
-	ldrb	w3, [x1, #:lo12:.LANCHOR78]
-.L2805:
-	orr	w3, w0, w3, lsl 24
-	b	.L2776
-.L2775:
-	add	w3, w27, w3
-	orr	w3, w3, w10, lsl 24
-.L2776:
-	str	w3, [x19, 40]
-	mov	w1, 1
-	stp	w10, w12, [x29, 104]
-	mov	x0, x19
-	str	w3, [x29, 136]
-	bl	sblk_read_page
-	ldr	w13, [x19, 52]
-	ldp	w10, w12, [x29, 104]
-	cmp	w13, 512
-	ccmn	w13, #1, 4, ne
-	ldr	w3, [x29, 136]
-	bne	.L2778
-	ldr	x1, [x19, 24]
-	mov	w4, w13
-	ldr	x0, [x19, 8]
-	str	w10, [x29, 108]
-	str	w13, [x29, 136]
-	ldr	w2, [x1, 12]
-	str	w2, [sp, 32]
-	ldr	w2, [x1, 8]
-	str	w2, [sp, 24]
-	ldr	w2, [x1, 4]
-	str	w2, [sp, 16]
-	mov	w2, w27
-	ldr	w1, [x1]
-	str	w1, [sp, 8]
-	ldr	w1, [x0, 12]
-	str	w1, [sp]
-	mov	w1, w12
-	ldp	w5, w6, [x0]
-	ldr	w7, [x0, 8]
-	ldr	x0, [x29, 112]
-	bl	printf
-	ldr	w13, [x29, 136]
-	ldr	w10, [x29, 108]
-	cmp	w13, 512
-	bne	.L2778
-.L2779:
-	mov	w4, w10
-	mov	w3, w28
-	mov	w2, w27
-	mov	w1, w20
-	adrp	x24, .LANCHOR131
-	adrp	x0, .LC161
-	add	x0, x0, :lo12:.LC161
+	ldr	x0, [x19, #:lo12:.LANCHOR69]
+	ldrh	w20, [x0, 672]
+	strh	wzr, [x0, 690]
+	mov	w0, 65533
+	sub	w1, w20, #1
+	cmp	w0, w1, uxth
+	bcs	.L2803
+	adrp	x1, .LANCHOR202
+	adrp	x0, .LC0
+	mov	w2, 2489
+	add	x1, x1, :lo12:.LANCHOR202
+	add	x0, x0, :lo12:.LC0
 	bl	printf
-	ldr	x0, [x19, 8]
-	mov	w1, 0
-	ldrb	w2, [x24, #:lo12:.LANCHOR131]
-	adrp	x25, .LANCHOR19
-	adrp	x26, .LC162
-	add	x25, x25, :lo12:.LANCHOR19
-	add	x26, x26, :lo12:.LC162
-	lsl	w2, w2, 9
+.L2803:
+	ldr	x0, [x19, #:lo12:.LANCHOR69]
+	mov	w2, 256
+	mov	w1, 255
+	add	x0, x0, 416
+	strh	wzr, [x0, 280]
 	bl	ftl_memset
-	ldr	x0, [x19, 24]
+	ldr	x0, [x19, #:lo12:.LANCHOR69]
+	mov	w2, 4096
 	mov	w1, 0
-	ldrb	w2, [x24, #:lo12:.LANCHOR131]
-	lsl	w2, w2, 1
+	add	x0, x0, 704
 	bl	ftl_memset
-.L2783:
-	ldrh	w0, [x23, #:lo12:.LANCHOR94]
-	cmp	w0, w27
-	bls	.L2789
-	lsl	w0, w27, 1
-	str	w0, [x29, 140]
-	ldr	x0, [x29, 120]
-	mov	w22, 0
-	add	x28, x0, :lo12:.LANCHOR83
-	b	.L2790
-.L2774:
-	cmp	w25, 2
-	bne	.L2777
-	adrp	x1, .LANCHOR78
-	ldrb	w3, [x1, #:lo12:.LANCHOR78]
-	ldr	w1, [x29, 140]
-	add	w0, w1, w0
-	b	.L2805
-.L2777:
-	add	w3, w27, w3
-	b	.L2776
-.L2781:
-	add	w8, w27, 1
-	and	w27, w8, 65535
-	b	.L2771
-.L2788:
-	ldr	w0, [x25]
-	tbz	x0, 12, .L2784
-	mov	w2, w22
-	mov	w1, w27
-	mov	x0, x26
-	bl	printf
-.L2784:
-	ldrb	w1, [x28]
-	adrp	x2, .LANCHOR111
-	sxtw	x0, w22
-	cbz	w1, .L2785
-	add	x0, x0, 8
-	ldrh	w1, [x2, #:lo12:.LANCHOR111]
-	ldrh	w0, [x21, x0, lsl 1]
-	mul	w0, w0, w1
-	orr	w0, w0, w27
-	str	w0, [x19, 40]
-	mov	x0, x19
-	bl	sblk_3d_tlc_dump_prog
-.L2786:
-	add	w22, w22, 1
-	and	w22, w22, 65535
-.L2790:
-	ldrb	w0, [x29, 153]
-	cmp	w0, w22
-	bhi	.L2788
-	add	w8, w27, 1
-	and	w27, w8, 65535
-	b	.L2783
-.L2785:
-	adrp	x1, .LANCHOR78
-	add	x0, x0, 8
-	ldrb	w1, [x1, #:lo12:.LANCHOR78]
-	cmp	w1, 2
-	bne	.L2787
-	ldrh	w1, [x2, #:lo12:.LANCHOR111]
-	ldrh	w0, [x21, x0, lsl 1]
-	mul	w0, w0, w1
-	ldr	w1, [x29, 140]
-	orr	w0, w0, w1
-	orr	w0, w0, 33554432
-	str	w0, [x19, 40]
-	mov	x0, x19
-	bl	sblk_mlc_dump_prog
-	b	.L2786
-.L2787:
-	ldrh	w1, [x21, x0, lsl 1]
-	mov	w6, 1
-	ldrh	w0, [x2, #:lo12:.LANCHOR111]
-	mov	w5, 0
-	ldrb	w4, [x24, #:lo12:.LANCHOR131]
-	ldr	x3, [x19, 24]
-	mul	w1, w1, w0
 	adrp	x0, .LANCHOR31
+	ldr	x1, [x19, #:lo12:.LANCHOR69]
 	ldrb	w2, [x0, #:lo12:.LANCHOR31]
 	mov	w0, 24
-	orr	w1, w1, w27
-	str	w1, [x19, 40]
 	sub	w0, w0, w2
-	lsl	w6, w6, w2
-	ldr	x2, [x19, 8]
-	sub	w6, w6, #1
-	lsl	w7, w6, w0
-	lsr	w0, w1, w0
-	bic	w1, w1, w7
-	and	w0, w0, w6
-	bl	flash_prog_page_en
-	b	.L2786
-.L2789:
-	mov	x0, x19
-	bl	zbuf_free
-	adrp	x0, .LC163
-	mov	w1, w20
-	add	x0, x0, :lo12:.LC163
-	bl	printf
-.L2767:
-	ldp	x19, x20, [sp, 64]
-	ldp	x21, x22, [sp, 80]
-	ldp	x23, x24, [sp, 96]
-	ldp	x25, x26, [sp, 112]
-	ldp	x27, x28, [sp, 128]
-	ldp	x29, x30, [sp, 48]
-	add	sp, sp, 224
-	ret
-	.size	ftl_dump_write_open_sblk, .-ftl_dump_write_open_sblk
-	.section	.text.gc_ink_check_sblk,"ax",@progbits
-	.align	2
-	.global	gc_ink_check_sblk
-	.type	gc_ink_check_sblk, %function
-gc_ink_check_sblk:
-	stp	x29, x30, [sp, -80]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR70
-	add	x0, x19, :lo12:.LANCHOR70
-	stp	x21, x22, [sp, 32]
-	stp	x23, x24, [sp, 48]
-	stp	x25, x26, [sp, 64]
-	ldrh	w1, [x0, 2110]
-	ldr	x22, [x0, 2184]
-	cmp	w1, 3
-	bhi	.L2807
-	adrp	x0, .L2809
-	mov	x20, x19
-	add	x0, x0, :lo12:.L2809
-	ldrh	w0, [x0,w1,uxtw #1]
-	adr	x1, .Lrtx2809
-	add	x0, x1, w0, sxth #2
-	br	x0
-.Lrtx2809:
-	.section	.rodata.gc_ink_check_sblk,"a",@progbits
-	.align	0
-	.align	2
-.L2809:
-	.2byte	(.L2808 - .Lrtx2809) / 4
-	.2byte	(.L2810 - .Lrtx2809) / 4
-	.2byte	(.L2811 - .Lrtx2809) / 4
-	.2byte	(.L2812 - .Lrtx2809) / 4
-	.section	.text.gc_ink_check_sblk
-.L2808:
-	adrp	x0, .LANCHOR107
-	add	x24, x0, :lo12:.LANCHOR107
-	ldrh	w0, [x0, #:lo12:.LANCHOR107]
-	cmp	w0, 7
-	bls	.L2806
-	adrp	x0, .LANCHOR57
-	ldrb	w0, [x0, #:lo12:.LANCHOR57]
-	cmp	w0, 2
-	bls	.L2806
-	adrp	x21, .LANCHOR108
-	add	x21, x21, :lo12:.LANCHOR108
-	mov	w1, 0
-	mov	x0, x21
-	bl	_list_get_gc_head_node
-	and	w0, w0, 65535
-	mov	w23, 65535
-	cmp	w0, w23
-	beq	.L2806
-	adrp	x22, .LANCHOR9
-	ubfiz	x0, x0, 2, 16
-	ldr	x1, [x22, #:lo12:.LANCHOR9]
-	ldrh	w0, [x1, x0]
-	and	w0, w0, 2047
-	cmp	w0, 2
-	bgt	.L2806
-	add	x20, x19, :lo12:.LANCHOR70
+	adrp	x2, .LANCHOR80
+	strh	w21, [x1, 416]
+	adrp	x21, .LANCHOR12
+	ldrh	w2, [x2, #:lo12:.LANCHOR80]
+	strh	w20, [x1, 692]
+	sub	w0, w0, w2
+	asr	w0, w20, w0
+	strh	w0, [x1, 694]
 	mov	w0, 1
-	bl	buf_alloc
-	str	x0, [x20, 2184]
-	cbz	x0, .L2806
-	mov	x2, x24
+	strh	w0, [x1, 688]
+	adrp	x0, .LANCHOR203
+	ldrh	w0, [x0, #:lo12:.LANCHOR203]
+	strh	w0, [x1, 698]
+	mov	w1, 20038
+	ldr	x0, [x21, #:lo12:.LANCHOR12]
+	movk	w1, 0x4549, lsl 16
+	str	w1, [x0]
+	bl	ftl_alloc_sys_blk
+	mov	w20, w0
 	mov	w1, 0
-	mov	x0, x21
-	bl	_list_pop_index_node
-	and	w14, w0, 65535
-	cmp	w14, w23
-	bne	.L2816
-	ldr	x0, [x20, 2184]
-	bl	zbuf_free
-	str	xzr, [x20, 2184]
-.L2806:
+	bl	ftl_erase_phy_blk
+	ldr	x0, [x19, #:lo12:.LANCHOR69]
+	mov	w1, 2
+	strh	w20, [x0, 130]
+	mov	w20, -1
+	strh	wzr, [x0, 140]
+	ldr	x0, [x21, #:lo12:.LANCHOR12]
+	add	x0, x0, 16
+	strh	w20, [x0, 568]
+	strh	w20, [x0, 570]
+	strh	w20, [x0, 572]
+	strh	w20, [x0, 574]
+	bl	ftl_open_sblk_init
+	ldr	x0, [x21, #:lo12:.LANCHOR12]
+	mov	w1, 3
+	add	x0, x0, 48
+	bl	ftl_open_sblk_init
+	ldr	x1, [x19, #:lo12:.LANCHOR69]
+	ldr	x0, [x21, #:lo12:.LANCHOR12]
+	add	x0, x0, 136
+	ldrh	w2, [x1, 134]
+	strh	w2, [x0, -10]
+	strh	w20, [x0, -56]
+	mov	w2, -1
+	strh	w20, [x0, -6]
+	str	w2, [x0, 408]
+	strh	wzr, [x0, -12]
+	strh	wzr, [x0, -16]
+	strh	wzr, [x0, -14]
+	strh	w2, [x1, 126]
+	mov	w2, 256
+	str	wzr, [x0, 384]
+	mov	w1, 255
+	str	wzr, [x0, 388]
+	str	wzr, [x0, 392]
+	bl	ftl_memset
+	mov	w2, 128
+	mov	w1, 255
+	ldr	x0, [x21, #:lo12:.LANCHOR12]
+	add	x0, x0, 392
+	bl	ftl_memset
+	bl	ftl_ext_info_flush
+	mov	w0, 0
+	bl	ftl_info_flush
+	bl	ftl_info_blk_init
+	ldr	x21, [sp, 32]
+	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
+	ldp	x29, x30, [sp], 48
 	ret
-.L2816:
-	add	x1, x20, 2162
-	mov	w0, w14
-	bl	ftl_get_blk_list_in_sblk
-	strb	w0, [x20, 2155]
-	mov	w0, 1
-	strh	w0, [x20, 2110]
+	.size	ftl_low_format_data_init, .-ftl_low_format_data_init
+	.section	.text.ftl_low_format,"ax",@progbits
+	.align	2
+	.global	ftl_low_format
+	.type	ftl_low_format, %function
+ftl_low_format:
+	stp	x29, x30, [sp, -80]!
+	mov	w1, 0
+	adrp	x0, .LC156
+	add	x0, x0, :lo12:.LC156
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR204
+	stp	x21, x22, [sp, 32]
+	add	x20, x20, :lo12:.LANCHOR204
+	stp	x25, x26, [sp, 64]
+	adrp	x22, .LANCHOR6
+	mov	x25, x22
+	stp	x23, x24, [sp, 48]
+	mov	w19, 8
+	adrp	x23, .LC0
+	bl	printf
+.L2808:
+	ldr	x0, [x22, #:lo12:.LANCHOR6]
+	add	x0, x0, x19, sxtw
+	ldrb	w21, [x0, 32]
+	add	w0, w21, 127
+	and	w0, w0, 255
+	cmp	w0, 125
+	bhi	.L2806
+	mov	w2, 2544
+	mov	x1, x20
+	add	x0, x23, :lo12:.LC0
+	bl	printf
+.L2806:
+	cmp	w21, 255
+	beq	.L2807
+	adrp	x0, .LANCHOR117
+	ldrh	w1, [x0, #:lo12:.LANCHOR117]
+	mov	w0, 0
+	mul	w1, w1, w21
+	bl	flash_erase_block
+.L2807:
+	add	w19, w19, 1
+	cmp	w19, 16
+	bne	.L2808
+	bl	sblk_init
+	adrp	x22, .LANCHOR9
+	bl	ftl_info_blk_init
+	adrp	x19, .LANCHOR8
+	adrp	x0, .LANCHOR194
+	mov	w2, 16384
+	mov	w1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR194]
+	bl	ftl_memset
 	ldr	x0, [x22, #:lo12:.LANCHOR9]
-	strh	w14, [x20, 2146]
-	ubfiz	x14, x14, 2, 16
-	strh	wzr, [x20, 2148]
-	ldrh	w1, [x0, x14]
-	adrp	x0, .LANCHOR131
-	ldrb	w2, [x0, #:lo12:.LANCHOR131]
-	ldr	x0, [x20, 2184]
-	lsl	w2, w2, 9
-	tbz	x1, 0, .L2817
-	mov	w1, 85
-.L2832:
+	mov	w3, 1
+	ldrh	w2, [x19, #:lo12:.LANCHOR8]
+	add	x2, x0, x2, lsl 2
+.L2809:
+	cmp	x0, x2
+	bne	.L2810
+	adrp	x21, .LANCHOR69
+	mov	w1, 21574
+	adrp	x24, .LANCHOR74
+	add	x24, x24, :lo12:.LANCHOR74
+	ldr	x0, [x21, #:lo12:.LANCHOR69]
+	movk	w1, 0x494c, lsl 16
+	mov	w20, 0
+	mov	w26, 1
+	strh	wzr, [x0, 148]
+	str	w1, [x0]
+.L2811:
+	ldrh	w0, [x19, #:lo12:.LANCHOR8]
+	adrp	x23, .LANCHOR81
+	cmp	w0, w20
+	bhi	.L2820
+	ldr	x0, [x25, #:lo12:.LANCHOR6]
+	mov	w4, 3
+	ldrb	w2, [x23, #:lo12:.LANCHOR81]
+	mov	w10, 15
+	ldr	x6, [x21, #:lo12:.LANCHOR69]
+	cmp	w2, 1
+	ldr	x1, [x22, #:lo12:.LANCHOR9]
+	ldrb	w0, [x0, 47]
+	csinc	w4, w4, wzr, ne
+	and	w4, w4, 255
+	and	w8, w2, 65535
+	ldrh	w3, [x6, 148]
+	udiv	w0, w0, w2
+	and	w5, w0, 65535
+	ubfiz	x0, x0, 2, 8
+	add	x0, x0, 4
+	add	w20, w5, 1
+	add	x0, x1, x0
+.L2823:
+	cmp	w2, 4
+	add	x1, x1, 4
+	csel	w7, w10, w4, eq
+	strb	w7, [x1, -1]
+	ldrb	w7, [x1, -2]
+	orr	w7, w7, -32
+	strb	w7, [x1, -2]
+	cmp	x1, x0
+	bne	.L2823
+	mul	w5, w5, w8
+	mov	w4, 16
+	add	w0, w8, w3
+	sdiv	w4, w4, w2
+	add	w0, w5, w0, uxth
+	strh	w0, [x6, 148]
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	add	w4, w20, w4
+	and	w4, w4, 65535
+	strh	w4, [x6, 134]
+	tbz	x0, 12, .L2824
+	adrp	x0, .LC157
+	mov	w3, w20
+	mov	w2, 128
+	mov	w1, 2603
+	add	x0, x0, :lo12:.LC157
+	bl	printf
+.L2824:
+	ldr	x0, [x21, #:lo12:.LANCHOR69]
+	mov	w2, 128
+	mov	w1, 255
+	add	x0, x0, 160
+	bl	ftl_memset
+	adrp	x0, .LANCHOR118
+	ldrb	w10, [x23, #:lo12:.LANCHOR81]
+	adrp	x3, .LANCHOR80
+	ldr	x2, [x21, #:lo12:.LANCHOR69]
+	ldrb	w16, [x0, #:lo12:.LANCHOR118]
+	adrp	x0, .LANCHOR31
+	and	w11, w10, 65535
+	ldr	x15, [x22, #:lo12:.LANCHOR9]
+	ldrb	w4, [x0, #:lo12:.LANCHOR31]
+	mov	w0, 24
+	ldrh	w8, [x2, 134]
+	sub	w0, w0, w4
+	ldrh	w4, [x3, #:lo12:.LANCHOR80]
+	mul	w1, w20, w11
+	mov	w3, 0
+	sub	w0, w0, w4
+	mov	w4, 1
+	and	w1, w1, 65535
+	lsl	w4, w4, w0
+	and	w4, w4, 65535
+.L2825:
+	cmp	w20, w8
+	bcc	.L2831
+	ldrh	w0, [x19, #:lo12:.LANCHOR8]
+	strh	w3, [x2, 112]
+	sub	w0, w0, w8
+	strh	wzr, [x2, 114]
+	strh	w0, [x2, 116]
+	strh	wzr, [x2, 118]
+	strh	w8, [x2, 132]
+	bl	ftl_low_format_data_init
+	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldr	x0, [x0, 8]
 	ldp	x29, x30, [sp], 80
-	b	ftl_memset
-.L2817:
-	mov	w1, 170
-	b	.L2832
+	ret
 .L2810:
-	add	x20, x19, :lo12:.LANCHOR70
-	mov	w1, 0
-	ldrh	w0, [x20, 2146]
-	bl	ftl_erase_sblk
-	mov	w0, 2
-	strh	w0, [x20, 2110]
-	b	.L2806
-.L2811:
-	adrp	x21, .LANCHOR111
-	mov	w24, 65280
-	adrp	x23, .LANCHOR31
-	add	x21, x21, :lo12:.LANCHOR111
-	add	x23, x23, :lo12:.LANCHOR31
-	mov	w19, 0
-	movk	w24, 0x55aa, lsl 16
-	bl	sblk_wait_write_queue_completed
-.L2818:
-	add	x0, x20, :lo12:.LANCHOR70
-	ldrb	w1, [x0, 2155]
-	cmp	w1, w19
-	bhi	.L2820
-	ldrh	w1, [x0, 2148]
-	adrp	x2, .LANCHOR94
-	add	w1, w1, 1
-	ldrh	w2, [x2, #:lo12:.LANCHOR94]
-	and	w1, w1, 65535
-	strh	w1, [x0, 2148]
-	cmp	w2, w1
-	bhi	.L2806
-	mov	w1, 3
-	strh	wzr, [x0, 2148]
-	strh	w1, [x0, 2110]
-	b	.L2806
+	ldrb	w1, [x0, 2]
+	add	x0, x0, 4
+	and	w1, w1, 31
+	bfi	w1, w3, 3, 2
+	strb	w1, [x0, -2]
+	b	.L2809
 .L2820:
-	add	x1, x0, x19, sxtw 1
-	ldrh	w2, [x1, 2162]
-	mov	w1, 65535
-	cmp	w2, w1
-	beq	.L2819
-	ldrh	w0, [x0, 2148]
-	mov	w6, 1
-	ldrh	w1, [x21]
-	mov	w5, 0
-	ldr	x3, [x22, 24]
-	madd	w1, w1, w2, w0
-	ldr	x2, [x22, 8]
-	mov	w0, 24
-	stp	w1, w24, [x2]
-	str	wzr, [x3]
-	ldrb	w4, [x23]
-	sub	w0, w0, w4
-	lsl	w6, w6, w4
-	adrp	x4, .LANCHOR131
-	sub	w6, w6, #1
-	ldrb	w4, [x4, #:lo12:.LANCHOR131]
-	lsl	w7, w6, w0
-	lsr	w0, w1, w0
-	bic	w1, w1, w7
-	and	w0, w0, w6
-	bl	flash_prog_page_en
-.L2819:
-	add	w19, w19, 1
-	and	w19, w19, 65535
-	b	.L2818
+	adrp	x0, .LANCHOR87
+	strh	w20, [x24]
+	ldrb	w0, [x0, #:lo12:.LANCHOR87]
+	cbnz	w0, .L2812
+	mov	w0, w20
+	bl	ftl_test_block
 .L2812:
-	adrp	x25, .LANCHOR111
-	add	x19, x19, :lo12:.LANCHOR70
-	add	x25, x25, :lo12:.LANCHOR111
-	mov	w21, 0
-	mov	w26, 65535
-	bl	sblk_wait_write_queue_completed
-.L2821:
-	ldrb	w0, [x19, 2155]
-	cmp	w0, w21
-	bhi	.L2825
-	ldrh	w0, [x19, 2148]
-	adrp	x1, .LANCHOR94
+	ldrb	w11, [x23, #:lo12:.LANCHOR81]
+	adrp	x0, .LANCHOR118
+	ldr	x6, [x22, #:lo12:.LANCHOR9]
+	mov	w7, 0
+	ldrb	w14, [x0, #:lo12:.LANCHOR118]
+	mov	w10, 0
+	ldr	x13, [x21, #:lo12:.LANCHOR69]
+	mov	w8, 0
+	mul	w12, w20, w11
+	add	x6, x6, x20, uxth 2
+.L2813:
+	cmp	w8, w14
+	bcs	.L2817
+	add	w15, w11, w7
+	b	.L2818
+.L2816:
+	add	w1, w7, w12
+	mov	w0, w8
+	bl	flash_check_bad_block
+	cbz	w0, .L2814
+	ldrb	w1, [x6, 3]
+	lsl	w0, w26, w7
+	orr	w0, w0, w1
+	strb	w0, [x6, 3]
+	ldrh	w0, [x13, 148]
 	add	w0, w0, 1
-	ldrh	w1, [x1, #:lo12:.LANCHOR94]
+	strh	w0, [x13, 148]
+.L2815:
+	add	w7, w7, 1
+.L2818:
+	cmp	w7, w15
+	bne	.L2816
+	add	w8, w8, 1
+	sub	w12, w12, w11
+	and	w8, w8, 65535
+	b	.L2813
+.L2814:
+	add	w10, w10, 1
+	and	w10, w10, 65535
+	b	.L2815
+.L2817:
+	cbnz	w10, .L2819
+	ldrb	w0, [x6, 2]
+	orr	w0, w0, -32
+	strb	w0, [x6, 2]
+.L2819:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L2811
+.L2831:
+	add	x13, x15, x20, uxth 2
+	mov	w6, 0
+	mov	w12, 0
+	mov	w5, 0
+	ldrb	w0, [x13, 2]
+	orr	w0, w0, -32
+	strb	w0, [x13, 2]
+.L2826:
+	cmp	w5, w16
+	bcc	.L2833
+	add	w20, w20, 1
+	add	w1, w1, w11
+	and	w20, w20, 65535
+	and	w1, w1, 65535
+	b	.L2825
+.L2829:
+	ldrb	w14, [x13, 3]
+	add	w17, w12, w7
+	asr	w14, w14, w17
+	tbnz	x14, 0, .L2827
+	cmp	w10, 1
+	bls	.L2832
+	and	w0, w0, 1
+	add	w0, w1, w0
 	and	w0, w0, 65535
-	strh	w0, [x19, 2148]
-	cmp	w1, w0
-	bhi	.L2806
-	ldr	x0, [x19, 2184]
-	strh	wzr, [x19, 2110]
-	bl	zbuf_free
-	str	xzr, [x19, 2184]
-	ldrh	w0, [x19, 2112]
-	cmp	w0, 15
-	bhi	.L2826
-	add	w1, w0, 1
-	add	x0, x19, x0, sxtw 1
-	strh	w1, [x19, 2112]
-	ldrh	w1, [x19, 2146]
-	strh	w1, [x0, 2114]
+.L2828:
+	add	x14, x2, x3, sxtw 1
+	add	w3, w3, 1
+	and	w3, w3, 65535
+	add	w0, w0, w6
+	strh	w0, [x14, 160]
 .L2827:
-	add	x19, x20, :lo12:.LANCHOR70
-	adrp	x0, .LC164
-	ldp	x21, x22, [sp, 32]
-	add	x0, x0, :lo12:.LC164
-	ldrh	w2, [x19, 2112]
-	ldrh	w1, [x19, 2146]
-	ldp	x23, x24, [sp, 48]
-	ldp	x19, x20, [sp, 16]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
-	b	printf
-.L2825:
-	add	x24, x19, x21, sxtw 1
-	add	x24, x24, 16
-	ldrh	w0, [x24, 2146]
-	cmp	w0, w26
-	beq	.L2823
-	ldrh	w1, [x19, 2148]
-	ldrh	w23, [x25]
-	madd	w23, w23, w0, w1
-	mov	w1, 1
-	str	w23, [x22, 40]
-	mov	x0, x22
-	bl	sblk_read_page
-	ldr	x0, [x22, 8]
-	ldr	w0, [x0]
-	cmp	w23, w0
-	beq	.L2823
-	mov	w0, w23
-	bl	ftl_mask_bad_block
-	mov	w0, -1
-	strh	w0, [x24, 2146]
-.L2823:
-	add	w21, w21, 1
-	and	w21, w21, 65535
-	b	.L2821
-.L2826:
-	ldrh	w0, [x19, 2146]
-	bl	zftl_insert_free_list
-	b	.L2827
-.L2807:
-	strh	wzr, [x0, 2110]
-	b	.L2806
-	.size	gc_ink_check_sblk, .-gc_ink_check_sblk
-	.section	.text.ftl_ink_check_sblk,"ax",@progbits
+	add	x7, x7, 1
+.L2830:
+	and	w0, w7, 65535
+	cmp	w0, w11
+	bcc	.L2829
+	add	w5, w5, 1
+	add	w6, w4, w6
+	and	w5, w5, 65535
+	add	w12, w12, w10
+	and	w6, w6, 65535
+	b	.L2826
+.L2832:
+	mov	w0, w1
+	b	.L2828
+.L2833:
+	mov	x7, 0
+	b	.L2830
+	.size	ftl_low_format, .-ftl_low_format
+	.section	.text.ftl_re_low_format,"ax",@progbits
 	.align	2
-	.global	ftl_ink_check_sblk
-	.type	ftl_ink_check_sblk, %function
-ftl_ink_check_sblk:
-	stp	x29, x30, [sp, -144]!
+	.global	ftl_re_low_format
+	.type	ftl_re_low_format, %function
+ftl_re_low_format:
+	stp	x29, x30, [sp, -16]!
+	mov	w1, 1
+	adrp	x0, .LC158
+	add	x0, x0, :lo12:.LC158
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR9
-	stp	x19, x20, [sp, 16]
-	and	w19, w0, 65535
-	ldr	x0, [x24, #:lo12:.LANCHOR9]
-	ubfiz	x23, x19, 2, 16
-	stp	x21, x22, [sp, 32]
-	mov	w1, w19
-	stp	x25, x26, [sp, 64]
-	stp	x27, x28, [sp, 80]
-	ldr	w3, [x0, x23]
-	ldrh	w2, [x0, x23]
-	adrp	x0, .LC165
-	add	x0, x0, :lo12:.LC165
-	ubfx	x3, x3, 11, 8
-	and	w2, w2, 2047
 	bl	printf
-	mov	w0, 65535
-	cmp	w19, w0
-	beq	.L2833
-	adrp	x0, .LANCHOR8
-	ldrh	w0, [x0, #:lo12:.LANCHOR8]
-	cmp	w0, w19
-	bls	.L2833
-	add	x21, x29, 144
-	mov	w1, 0
-	mov	w0, w19
-	bl	ftl_erase_sblk
-	mov	w0, w19
-	adrp	x27, .LANCHOR131
-	strh	w19, [x21, -32]!
-	add	x1, x21, 16
-	bl	ftl_get_blk_list_in_sblk
-	strb	w0, [x29, 121]
-	mov	w0, 1
-	bl	buf_alloc
-	mov	x20, x0
-	ldr	x0, [x24, #:lo12:.LANCHOR9]
-	ldrb	w2, [x27, #:lo12:.LANCHOR131]
-	ldrh	w0, [x0, x23]
-	lsl	w2, w2, 9
-	and	w0, w0, 2047
-	cmp	w0, 1
-	bgt	.L2835
-	mov	w1, 85
-.L2851:
-	ldr	x0, [x20, 8]
-	adrp	x28, .LANCHOR111
-	add	x28, x28, :lo12:.LANCHOR111
-	mov	w26, 0
-	bl	ftl_memset
-	bl	sblk_wait_write_queue_completed
-	mov	w7, 65280
-	movk	w7, 0x55aa, lsl 16
-.L2837:
-	adrp	x25, .LANCHOR94
-	ldrh	w0, [x25, #:lo12:.LANCHOR94]
-	cmp	w0, w26
-	bls	.L2840
-	adrp	x25, .LANCHOR31
-	mov	w22, 0
-	add	x25, x25, :lo12:.LANCHOR31
-	b	.L2841
-.L2835:
-	mov	w1, 170
-	b	.L2851
-.L2839:
-	add	x0, x21, x22, sxtw 1
-	mov	w1, 65535
-	ldrh	w0, [x0, 16]
-	cmp	w0, w1
-	beq	.L2838
-	ldrh	w1, [x28]
-	mov	w6, 1
-	ldr	x2, [x20, 8]
+	bl	sblk_init
+	bl	ftl_info_blk_init
+	bl	ftl_ext_info_init
+	adrp	x0, .LANCHOR69
+	adrp	x2, .LANCHOR8
+	mov	w3, 0
+	mov	w4, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR69]
 	mov	w5, 0
-	ldr	x3, [x20, 24]
-	str	w7, [x29, 108]
-	madd	w1, w1, w0, w26
-	mov	w0, 24
-	stp	w1, w7, [x2]
-	str	wzr, [x3]
-	ldrb	w4, [x25]
-	sub	w0, w0, w4
-	lsl	w6, w6, w4
-	ldrb	w4, [x27, #:lo12:.LANCHOR131]
-	sub	w6, w6, #1
-	lsl	w8, w6, w0
-	lsr	w0, w1, w0
-	bic	w1, w1, w8
-	and	w0, w0, w6
-	bl	flash_prog_page_en
-	ldr	w7, [x29, 108]
-.L2838:
-	add	w22, w22, 1
-	and	w22, w22, 65535
-.L2841:
-	ldrb	w0, [x29, 121]
-	cmp	w0, w22
-	bhi	.L2839
-	add	w26, w26, 1
-	and	w26, w26, 65535
-	b	.L2837
-.L2840:
-	adrp	x26, .LANCHOR111
-	add	x26, x26, :lo12:.LANCHOR111
-	mov	w28, 0
-.L2842:
-	ldrh	w0, [x25, #:lo12:.LANCHOR94]
-	cmp	w0, w28
-	bls	.L2847
-	mov	w27, 0
-	b	.L2848
-.L2846:
-	sxtw	x22, w27
-	mov	w1, 65535
-	add	x22, x22, 8
-	lsl	x22, x22, 1
-	ldrh	w0, [x21, x22]
-	cmp	w0, w1
-	beq	.L2844
-	ldrh	w4, [x26]
-	mov	w1, 1
-	madd	w4, w4, w0, w28
-	mov	x0, x20
-	str	w4, [x20, 40]
-	str	w4, [x29, 108]
-	bl	sblk_read_page
-	ldr	x0, [x20, 8]
-	ldr	w4, [x29, 108]
-	ldr	w0, [x0]
-	cmp	w4, w0
-	beq	.L2844
-	mov	w0, w4
-	bl	ftl_mask_bad_block
-	mov	w0, -1
-	strh	w0, [x21, x22]
+	ldrh	w7, [x2, #:lo12:.LANCHOR8]
+	adrp	x2, .LANCHOR9
+	ldr	x2, [x2, #:lo12:.LANCHOR9]
+	ldrh	w1, [x0, 134]
+	add	x2, x2, x1, uxth 2
 .L2844:
-	add	w2, w27, 1
-	and	w27, w2, 65535
+	cmp	w1, w7
+	bcc	.L2848
+	strh	w5, [x0, 114]
+	strh	w4, [x0, 118]
+	strh	w3, [x0, 116]
+	strh	wzr, [x0, 122]
+	strh	wzr, [x0, 120]
+	strh	wzr, [x0, 124]
+	bl	ftl_low_format_data_init
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
 .L2848:
-	ldrb	w0, [x29, 121]
-	cmp	w0, w27
-	bhi	.L2846
-	add	w3, w28, 1
-	and	w28, w3, 65535
-	b	.L2842
+	ldrb	w6, [x2, 2]
+	and	w8, w6, 31
+	strb	w8, [x2, 2]
+	ands	w6, w6, 24
+	bne	.L2845
+	add	w5, w5, 1
+	and	w5, w5, 65535
+.L2846:
+	add	w1, w1, 1
+	add	x2, x2, 4
+	and	w1, w1, 65535
+	b	.L2844
+.L2845:
+	cmp	w6, 16
+	bne	.L2847
+	add	w4, w4, 1
+	and	w4, w4, 65535
+	b	.L2846
 .L2847:
+	add	w3, w3, 1
+	and	w3, w3, 65535
+	b	.L2846
+	.size	ftl_re_low_format, .-ftl_re_low_format
+	.section	.text.ftl_prog_ppa_page,"ax",@progbits
+	.align	2
+	.global	ftl_prog_ppa_page
+	.type	ftl_prog_ppa_page, %function
+ftl_prog_ppa_page:
+	adrp	x4, .LANCHOR31
+	mov	w5, 1
+	ldrb	w6, [x4, #:lo12:.LANCHOR31]
+	mov	w4, 24
+	sub	w4, w4, w6
+	lsl	w7, w5, w4
+	sub	w7, w7, #1
+	lsl	w5, w5, w6
+	sub	w6, w5, #1
+	lsr	w5, w0, w4
+	mov	w4, w3
+	mov	x3, x2
+	mov	x2, x1
+	and	w1, w7, w0
+	and	w0, w6, w5
+	b	ftl_prog_page
+	.size	ftl_prog_ppa_page, .-ftl_prog_ppa_page
+	.section	.text.ftl_write_last_log_page,"ax",@progbits
+	.align	2
+	.global	ftl_write_last_log_page
+	.type	ftl_write_last_log_page, %function
+ftl_write_last_log_page:
+	ldrh	w1, [x0, 6]
+	cmp	w1, 1
+	bne	.L2853
+	stp	x29, x30, [sp, -48]!
+	adrp	x1, .LANCHOR123
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	stp	x21, x22, [sp, 32]
+	ldr	x20, [x1, #:lo12:.LANCHOR123]
+	ldrh	w22, [x0, 12]
+	bl	ftl_get_new_free_page
+	mov	w21, w0
+	cmn	w0, #1
+	beq	.L2854
+	ldrh	w0, [x19]
+	add	x20, x20, x22, uxth 2
+	bl	ftl_vpn_decrement
+	adrp	x0, .LANCHOR190
+	mov	w1, 15555
+	add	x7, x0, :lo12:.LANCHOR190
+	movk	w1, 0xf55f, lsl 16
+	str	w1, [x0, #:lo12:.LANCHOR190]
+	adrp	x0, .LANCHOR100
+	ldrh	w1, [x0, #:lo12:.LANCHOR100]
+	adrp	x0, .LANCHOR85
+	ldrb	w0, [x0, #:lo12:.LANCHOR85]
+	mul	w1, w1, w0
 	mov	x0, x20
-	bl	zbuf_free
-	ldr	x0, [x24, #:lo12:.LANCHOR9]
-	mov	w1, w19
-	ldr	w3, [x0, x23]
-	ldrh	w2, [x0, x23]
-	adrp	x0, .LC166
-	add	x0, x0, :lo12:.LC166
-	ubfx	x3, x3, 11, 8
-	and	w2, w2, 2047
-	bl	printf
-.L2833:
+	lsl	w1, w1, 2
+	bl	js_hash
+	mov	x1, x7
+	mov	x2, 0
+	stp	w0, wzr, [x7, 4]
+	mov	w0, 2
+	str	wzr, [x7, 12]
+	str	wzr, [x1, 16]!
+	bl	ftl_debug_info_fill
+	mov	x2, x7
+	adrp	x0, .LANCHOR68
+	mov	x1, x20
+	ldrb	w3, [x0, #:lo12:.LANCHOR68]
+	mov	w0, w21
+	bl	ftl_prog_ppa_page
+.L2854:
+	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 144
+	ldp	x29, x30, [sp], 48
 	ret
-	.size	ftl_ink_check_sblk, .-ftl_ink_check_sblk
-	.section	.text.ftl_alloc_sblk,"ax",@progbits
+.L2853:
+	mov	w0, -1
+	ret
+	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
+	.section	.text.pm_write_page,"ax",@progbits
 	.align	2
-	.global	ftl_alloc_sblk
-	.type	ftl_alloc_sblk, %function
-ftl_alloc_sblk:
-	stp	x29, x30, [sp, -80]!
-	cmp	w0, 5
+	.global	pm_write_page
+	.type	pm_write_page, %function
+pm_write_page:
+	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	and	w23, w0, 65535
-	stp	x21, x22, [sp, 32]
-	mov	w1, w23
 	stp	x19, x20, [sp, 16]
-	cset	w22, eq
-	mov	w21, w0
-	str	x25, [sp, 64]
+	mov	w19, w0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR100
+	stp	x23, x24, [sp, 48]
+	adrp	x22, .LANCHOR117
+	adrp	x24, .LANCHOR69
+	mov	x23, x1
+	add	x21, x21, :lo12:.LANCHOR100
+	mov	x20, x24
+	add	x22, x22, :lo12:.LANCHOR117
+	stp	x25, x26, [sp, 64]
+	str	x27, [sp, 80]
+	mov	w25, 65535
+.L2860:
+	ldr	x0, [x24, #:lo12:.LANCHOR69]
+	ldr	w1, [x0, 48]
+	ldrh	w2, [x0, 696]
+	add	w1, w1, 1
+	str	w1, [x0, 48]
+	ldrh	w1, [x21]
+	cmp	w2, w1
+	bcs	.L2861
+	ldrh	w0, [x0, 692]
+	cmp	w0, w25
+	bne	.L2862
+.L2861:
+	bl	pm_alloc_new_blk
 	mov	w0, 0
-	bl	zftl_get_free_sblk
-	and	w19, w0, 65535
-	mov	w0, 65535
-	cmp	w19, w0
-	beq	.L2854
-	adrp	x0, .LANCHOR9
-	ubfiz	x25, x19, 2, 16
-	lsl	w22, w22, 1
-	mov	w24, w19
-	ldr	x20, [x0, #:lo12:.LANCHOR9]
-	mov	x23, x0
-	add	x20, x20, x25
-	ldrb	w1, [x20, 2]
-	tst	w1, 224
-	beq	.L2855
-	adrp	x1, .LANCHOR200
+	bl	ftl_info_flush
+.L2862:
+	ldr	x0, [x20, #:lo12:.LANCHOR69]
+	ldrh	w0, [x0, 692]
+	cmp	w0, w25
+	bne	.L2863
+	adrp	x1, .LANCHOR205
 	adrp	x0, .LC0
-	mov	w2, 1012
-	add	x1, x1, :lo12:.LANCHOR200
+	mov	w2, 303
+	add	x1, x1, :lo12:.LANCHOR205
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2855:
-	ldrb	w0, [x20, 2]
-	bfi	w0, w21, 5, 3
-	ubfx	x1, x0, 3, 2
-	orr	w1, w22, w1
-	bfi	w0, w1, 3, 2
-	strb	w0, [x20, 2]
-	and	w1, w0, 24
-	cmp	w1, 24
-	bne	.L2856
-	cbnz	w22, .L2856
-	mov	w1, 1
-	bfi	w0, w1, 3, 2
-	strb	w0, [x20, 2]
-.L2856:
-	adrp	x0, .LANCHOR110
-	ldr	x0, [x0, #:lo12:.LANCHOR110]
-	ldrh	w0, [x0, 150]
-	cbz	w0, .L2857
-	ldr	x0, [x23, #:lo12:.LANCHOR9]
-	ldrh	w0, [x0, x25]
-	tst	x0, 2047
-	bne	.L2857
-	cbnz	w22, .L2857
-	mov	w0, w24
-	bl	ftl_ink_check_sblk
-.L2857:
-	mov	w0, w19
-	ldr	x25, [sp, 64]
+.L2863:
+	ldr	x0, [x20, #:lo12:.LANCHOR69]
+	adrp	x27, .LANCHOR206
+	ldrh	w1, [x22]
+	mov	w2, 64
+	ldrh	w26, [x0, 692]
+	ldrh	w0, [x0, 696]
+	madd	w26, w26, w1, w0
+	ldr	x0, [x27, #:lo12:.LANCHOR206]
+	mov	w1, 0
+	bl	ftl_memset
+	ldr	x6, [x27, #:lo12:.LANCHOR206]
+	ldr	x7, [x20, #:lo12:.LANCHOR69]
+	str	w19, [x6]
+	ldr	w0, [x7, 48]
+	str	w0, [x6, 4]
+	adrp	x0, .LANCHOR68
+	ldrb	w8, [x0, #:lo12:.LANCHOR68]
+	mov	x0, x23
+	lsl	w1, w8, 9
+	bl	js_hash
+	str	w0, [x6, 8]
+	ldrb	w0, [x7, 694]
+	mov	x2, x23
+	mov	w1, w26
+	mov	w4, w8
+	mov	x3, x6
+	bl	ftl_prog_page
+	ldr	x2, [x20, #:lo12:.LANCHOR69]
+	ldrh	w1, [x2, 696]
+	add	w1, w1, 1
+	and	w1, w1, 65535
+	strh	w1, [x2, 696]
+	cmp	w1, 1
+	adrp	x1, .LANCHOR207
+	beq	.L2864
+	ldrb	w3, [x1, #:lo12:.LANCHOR207]
+	cbz	w3, .L2865
+.L2864:
+	strb	wzr, [x1, #:lo12:.LANCHOR207]
+	b	.L2860
+.L2865:
+	cmn	w0, #1
+	bne	.L2867
+	mov	w1, w26
+	adrp	x0, .LC159
+	add	x0, x0, :lo12:.LC159
+	bl	printf
+	b	.L2860
+.L2867:
+	ldrh	w0, [x2, 698]
+	cmp	w19, w0
+	bcs	.L2868
+	add	x19, x2, x19, uxtw 2
+	str	w26, [x19, 704]
+.L2868:
+	mov	w0, 0
+	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 80
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
 	ret
-.L2854:
-	bl	print_ftl_debug_info
-	adrp	x20, .LC167
-	mov	w2, w21
-	add	x20, x20, :lo12:.LC167
-	mov	w1, w19
-	mov	x0, x20
-	bl	printf
-	mov	w1, w23
-	mov	w0, 0
-	bl	zftl_get_free_sblk
-	and	w19, w0, 65535
-	mov	w2, w21
-	mov	w1, w19
-	mov	x0, x20
-	bl	printf
-	bl	dump_all_list_info
-	mov	w2, 1031
-	adrp	x1, .LANCHOR200
-	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR200
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-	b	.L2857
-	.size	ftl_alloc_sblk, .-ftl_alloc_sblk
-	.section	.text.ftl_open_sblk_init,"ax",@progbits
+	.size	pm_write_page, .-pm_write_page
+	.section	.text.ftl_dump_write_open_sblk,"ax",@progbits
 	.align	2
-	.global	ftl_open_sblk_init
-	.type	ftl_open_sblk_init, %function
-ftl_open_sblk_init:
-	stp	x29, x30, [sp, -80]!
-	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR79
-	stp	x23, x24, [sp, 48]
-	adrp	x22, .LC168
-	stp	x19, x20, [sp, 16]
-	adrp	x24, .LANCHOR94
-	mov	x19, x0
-	mov	w23, w1
-	add	x24, x24, :lo12:.LANCHOR94
-	add	x21, x21, :lo12:.LANCHOR79
-	add	x22, x22, :lo12:.LC168
-	stp	x25, x26, [sp, 64]
-.L2867:
-	mov	w25, 65535
-.L2868:
-	mov	w0, w23
-	bl	ftl_alloc_sblk
+	.global	ftl_dump_write_open_sblk
+	.type	ftl_dump_write_open_sblk, %function
+ftl_dump_write_open_sblk:
+	sub	sp, sp, #224
+	stp	x29, x30, [sp, 48]
+	add	x29, sp, 48
+	stp	x19, x20, [sp, 64]
 	and	w20, w0, 65535
-	cmp	w20, w25
-	beq	.L2868
-	mov	w1, 0
-	mov	w0, w20
-	bl	ftl_erase_sblk
-	add	x1, x19, 16
+	adrp	x0, .LANCHOR8
+	stp	x21, x22, [sp, 80]
+	stp	x23, x24, [sp, 96]
+	ldrh	w0, [x0, #:lo12:.LANCHOR8]
+	stp	x25, x26, [sp, 112]
+	stp	x27, x28, [sp, 128]
+	cmp	w0, w20
+	bls	.L2873
+	adrp	x0, .LANCHOR89
+	str	x0, [x29, 120]
+	ldrb	w1, [x0, #:lo12:.LANCHOR89]
+	cbnz	w1, .L2875
+	adrp	x0, .LANCHOR86
+	ldrb	w0, [x0, #:lo12:.LANCHOR86]
+	cbz	w0, .L2873
+.L2875:
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbnz	w0, .L2873
+	adrp	x0, .LANCHOR9
+	ubfiz	x14, x20, 2, 16
+	mov	x15, x0
+	ldr	x1, [x0, #:lo12:.LANCHOR9]
+	add	x1, x1, x14
+	ldrb	w1, [x1, 2]
+	and	w1, w1, 224
+	cmp	w1, 160
+	bne	.L2897
+	adrp	x0, .LANCHOR84
+	ldrb	w25, [x0, #:lo12:.LANCHOR84]
+.L2876:
+	add	x21, x29, 176
+	adrp	x23, .LANCHOR100
 	mov	w0, w20
+	adrp	x26, .LANCHOR117
+	add	x26, x26, :lo12:.LANCHOR117
+	mov	w27, 0
+	strh	w20, [x21, -32]!
+	mov	w28, 0
+	add	x1, x21, 16
 	bl	ftl_get_blk_list_in_sblk
+	ldrh	w1, [x23, #:lo12:.LANCHOR100]
 	and	w0, w0, 255
-	ldrh	w1, [x24]
-	cmp	w23, 2
-	strb	w0, [x19, 9]
-	strh	w20, [x19]
-	strh	wzr, [x19, 2]
-	mul	w0, w1, w0
-	strb	wzr, [x19, 5]
-	strh	w0, [x19, 6]
-	strh	wzr, [x19, 10]
-	strb	w23, [x19, 4]
-	beq	.L2871
-	ldrb	w0, [x21]
-	mul	w0, w1, w0
-	and	w0, w0, 65535
-.L2869:
-	ldrb	w2, [x21]
-	adrp	x26, .LANCHOR11
-	strh	w0, [x19, 12]
-	ubfiz	x25, x20, 1, 16
-	mul	w2, w2, w1
-	adrp	x1, .LANCHOR117
-	ldr	x3, [x1, #:lo12:.LANCHOR117]
-	mov	w1, 255
-	lsl	w2, w2, 2
-	add	x0, x3, x0, uxth 2
-	bl	ftl_memset
-	ldr	x0, [x26, #:lo12:.LANCHOR11]
-	ldrh	w1, [x19, 6]
-	strh	w1, [x0, x25]
-	ldrb	w0, [x19, 9]
-	cbnz	w0, .L2866
+	strb	w0, [x29, 153]
+	strb	wzr, [x29, 149]
+	strh	wzr, [x29, 146]
+	mul	w0, w0, w1
+	strh	wzr, [x29, 154]
+	strh	w0, [x29, 150]
+	ldr	x0, [x15, #:lo12:.LANCHOR9]
+	add	x1, x0, x14
+	ldr	w5, [x0, x14]
+	ldrb	w2, [x1, 2]
 	mov	w1, w20
-	mov	x0, x22
+	ldrh	w4, [x0, x14]
+	adrp	x0, .LC160
+	ubfx	x5, x5, 11, 8
+	add	x0, x0, :lo12:.LC160
+	ubfx	x3, x2, 3, 2
+	and	w4, w4, 2047
+	ubfx	x2, x2, 5, 3
 	bl	printf
-	ldr	x0, [x26, #:lo12:.LANCHOR11]
-	mov	w1, -1
-	strh	w1, [x0, x25]
-	mov	w0, 7
-	strb	w0, [x19, 4]
-	b	.L2867
-.L2871:
-	mov	w0, 0
-	b	.L2869
-.L2866:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
-	ret
-	.size	ftl_open_sblk_init, .-ftl_open_sblk_init
-	.section	.text.ftl_low_format_data_init,"ax",@progbits
-	.align	2
-	.global	ftl_low_format_data_init
-	.type	ftl_low_format_data_init, %function
-ftl_low_format_data_init:
-	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LANCHOR197
-	mov	w2, 16384
-	mov	w1, 0
-	add	x29, sp, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR197]
-	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR110
-	str	x21, [sp, 32]
-	bl	ftl_memset
-	bl	zftl_sblk_list_init
 	mov	w0, 1
-	bl	ftl_alloc_sblk
-	mov	w1, 0
-	mov	w21, w0
-	bl	ftl_erase_sblk
-	ldr	x1, [x19, #:lo12:.LANCHOR110]
-	mov	w0, w21
-	add	x1, x1, 672
-	bl	ftl_get_blk_list_in_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR110]
-	ldrh	w20, [x0, 672]
-	strh	wzr, [x0, 690]
-	mov	w0, 65533
-	sub	w1, w20, #1
-	cmp	w0, w1, uxth
-	bcs	.L2875
-	adrp	x1, .LANCHOR201
-	adrp	x0, .LC0
-	mov	w2, 2484
-	add	x1, x1, :lo12:.LANCHOR201
-	add	x0, x0, :lo12:.LC0
+	bl	buf_alloc
+	mov	x19, x0
+	mov	w10, 0
+	add	x0, x23, :lo12:.LANCHOR100
+	str	x0, [x29, 128]
+.L2877:
+	ldr	x0, [x29, 128]
+	ldrh	w0, [x0]
+	cmp	w0, w27
+	bls	.L2885
+	lsl	w22, w27, 1
+	mov	w28, 0
+	sub	w0, w22, #1
+	add	w22, w22, w27
+	str	w0, [x29, 140]
+	sub	w22, w22, #1
+	adrp	x0, .LC161
+	add	x0, x0, :lo12:.LC161
+	str	x0, [x29, 112]
+	b	.L2888
+.L2897:
+	mov	w25, 1
+	b	.L2876
+.L2886:
+	ldrh	w12, [x21, x24]
+	mov	w0, 65535
+	cmp	w12, w0
+	bne	.L2878
+.L2884:
+	add	w10, w10, 1
+	and	w10, w10, 65535
+.L2879:
+	cmp	w25, w10
+	bcs	.L2886
+	add	w11, w28, 1
+	and	w28, w11, 65535
+.L2888:
+	ldrb	w0, [x29, 153]
+	cmp	w0, w28
+	bls	.L2887
+	sxtw	x24, w28
+	mov	w10, 1
+	add	x24, x24, 8
+	lsl	x24, x24, 1
+	b	.L2879
+.L2878:
+	ldrh	w3, [x26]
+	cmp	w25, 3
+	mul	w3, w3, w12
+	add	w0, w3, w10
+	bne	.L2880
+	adrp	x1, .LANCHOR36
+	ldrb	w1, [x1, #:lo12:.LANCHOR36]
+	cbz	w1, .L2881
+	adrp	x1, .LANCHOR84
+	add	w0, w0, w22
+	ldrb	w3, [x1, #:lo12:.LANCHOR84]
+.L2911:
+	orr	w3, w0, w3, lsl 24
+	b	.L2882
+.L2881:
+	add	w3, w27, w3
+	orr	w3, w3, w10, lsl 24
+.L2882:
+	str	w3, [x19, 40]
+	mov	w1, 1
+	stp	w10, w12, [x29, 104]
+	mov	x0, x19
+	str	w3, [x29, 136]
+	bl	sblk_read_page
+	ldr	w13, [x19, 52]
+	ldp	w10, w12, [x29, 104]
+	cmp	w13, 512
+	ccmn	w13, #1, 4, ne
+	ldr	w3, [x29, 136]
+	bne	.L2884
+	ldr	x1, [x19, 24]
+	mov	w4, w13
+	ldr	x0, [x19, 8]
+	str	w10, [x29, 108]
+	str	w13, [x29, 136]
+	ldr	w2, [x1, 12]
+	str	w2, [sp, 32]
+	ldr	w2, [x1, 8]
+	str	w2, [sp, 24]
+	ldr	w2, [x1, 4]
+	str	w2, [sp, 16]
+	mov	w2, w27
+	ldr	w1, [x1]
+	str	w1, [sp, 8]
+	ldr	w1, [x0, 12]
+	str	w1, [sp]
+	mov	w1, w12
+	ldp	w5, w6, [x0]
+	ldr	w7, [x0, 8]
+	ldr	x0, [x29, 112]
 	bl	printf
-.L2875:
-	ldr	x0, [x19, #:lo12:.LANCHOR110]
-	mov	w2, 256
-	mov	w1, 255
-	add	x0, x0, 416
-	strh	wzr, [x0, 280]
+	ldr	w13, [x29, 136]
+	ldr	w10, [x29, 108]
+	cmp	w13, 512
+	bne	.L2884
+.L2885:
+	mov	w4, w10
+	mov	w3, w28
+	mov	w2, w27
+	mov	w1, w20
+	adrp	x24, .LANCHOR68
+	adrp	x0, .LC162
+	add	x0, x0, :lo12:.LC162
+	bl	printf
+	ldr	x0, [x19, 8]
+	mov	w1, 0
+	ldrb	w2, [x24, #:lo12:.LANCHOR68]
+	adrp	x25, .LANCHOR19
+	adrp	x26, .LC163
+	add	x25, x25, :lo12:.LANCHOR19
+	add	x26, x26, :lo12:.LC163
+	lsl	w2, w2, 9
 	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR110]
-	mov	w2, 4096
+	ldr	x0, [x19, 24]
 	mov	w1, 0
-	add	x0, x0, 704
+	ldrb	w2, [x24, #:lo12:.LANCHOR68]
+	lsl	w2, w2, 1
 	bl	ftl_memset
-	adrp	x0, .LANCHOR31
-	ldr	x1, [x19, #:lo12:.LANCHOR110]
-	ldrb	w2, [x0, #:lo12:.LANCHOR31]
-	mov	w0, 24
-	sub	w0, w0, w2
-	adrp	x2, .LANCHOR74
-	strh	w21, [x1, 416]
-	adrp	x21, .LANCHOR12
-	ldrh	w2, [x2, #:lo12:.LANCHOR74]
-	strh	w20, [x1, 692]
-	sub	w0, w0, w2
-	asr	w0, w20, w0
-	strh	w0, [x1, 694]
-	mov	w0, 1
-	strh	w0, [x1, 688]
-	adrp	x0, .LANCHOR202
-	ldrh	w0, [x0, #:lo12:.LANCHOR202]
-	strh	w0, [x1, 698]
-	mov	w1, 20038
-	ldr	x0, [x21, #:lo12:.LANCHOR12]
-	movk	w1, 0x4549, lsl 16
-	str	w1, [x0]
-	bl	ftl_alloc_sys_blk
-	mov	w20, w0
-	mov	w1, 0
-	bl	ftl_erase_phy_blk
-	ldr	x0, [x19, #:lo12:.LANCHOR110]
-	mov	w1, 2
-	strh	w20, [x0, 130]
-	mov	w20, -1
-	strh	wzr, [x0, 140]
-	ldr	x0, [x21, #:lo12:.LANCHOR12]
-	add	x0, x0, 16
-	strh	w20, [x0, 568]
-	strh	w20, [x0, 570]
-	strh	w20, [x0, 572]
-	strh	w20, [x0, 574]
-	bl	ftl_open_sblk_init
-	ldr	x0, [x21, #:lo12:.LANCHOR12]
-	mov	w1, 3
-	add	x0, x0, 48
-	bl	ftl_open_sblk_init
-	ldr	x1, [x19, #:lo12:.LANCHOR110]
-	ldr	x0, [x21, #:lo12:.LANCHOR12]
-	add	x0, x0, 136
-	ldrh	w2, [x1, 134]
-	strh	w2, [x0, -10]
-	strh	w20, [x0, -56]
-	mov	w2, -1
-	strh	w20, [x0, -6]
-	str	w2, [x0, 408]
-	strh	wzr, [x0, -12]
-	strh	wzr, [x0, -16]
-	strh	wzr, [x0, -14]
-	strh	w2, [x1, 126]
-	mov	w2, 256
-	str	wzr, [x0, 384]
-	mov	w1, 255
-	str	wzr, [x0, 388]
-	str	wzr, [x0, 392]
-	bl	ftl_memset
-	mov	w2, 128
-	mov	w1, 255
-	ldr	x0, [x21, #:lo12:.LANCHOR12]
-	add	x0, x0, 392
-	bl	ftl_memset
-	bl	ftl_ext_info_flush
-	mov	w0, 0
-	bl	ftl_info_flush
-	bl	ftl_info_blk_init
-	ldr	x21, [sp, 32]
-	mov	w0, 0
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
+.L2889:
+	ldrh	w0, [x23, #:lo12:.LANCHOR100]
+	cmp	w0, w27
+	bls	.L2895
+	lsl	w0, w27, 1
+	str	w0, [x29, 140]
+	ldr	x0, [x29, 120]
+	mov	w22, 0
+	add	x28, x0, :lo12:.LANCHOR89
+	b	.L2896
+.L2880:
+	cmp	w25, 2
+	bne	.L2883
+	adrp	x1, .LANCHOR84
+	ldrb	w3, [x1, #:lo12:.LANCHOR84]
+	ldr	w1, [x29, 140]
+	add	w0, w1, w0
+	b	.L2911
+.L2883:
+	add	w3, w27, w3
+	b	.L2882
+.L2887:
+	add	w8, w27, 1
+	and	w27, w8, 65535
+	b	.L2877
+.L2894:
+	ldr	w0, [x25]
+	tbz	x0, 12, .L2890
+	mov	w2, w22
+	mov	w1, w27
+	mov	x0, x26
+	bl	printf
+.L2890:
+	ldrb	w1, [x28]
+	adrp	x2, .LANCHOR117
+	sxtw	x0, w22
+	cbz	w1, .L2891
+	add	x0, x0, 8
+	ldrh	w1, [x2, #:lo12:.LANCHOR117]
+	ldrh	w0, [x21, x0, lsl 1]
+	mul	w0, w0, w1
+	orr	w0, w0, w27
+	str	w0, [x19, 40]
+	mov	x0, x19
+	bl	sblk_3d_tlc_dump_prog
+.L2892:
+	add	w22, w22, 1
+	and	w22, w22, 65535
+.L2896:
+	ldrb	w0, [x29, 153]
+	cmp	w0, w22
+	bhi	.L2894
+	add	w8, w27, 1
+	and	w27, w8, 65535
+	b	.L2889
+.L2891:
+	adrp	x1, .LANCHOR84
+	add	x0, x0, 8
+	ldrb	w1, [x1, #:lo12:.LANCHOR84]
+	cmp	w1, 2
+	bne	.L2893
+	ldrh	w1, [x2, #:lo12:.LANCHOR117]
+	ldrh	w0, [x21, x0, lsl 1]
+	mul	w0, w0, w1
+	ldr	w1, [x29, 140]
+	orr	w0, w0, w1
+	orr	w0, w0, 33554432
+	str	w0, [x19, 40]
+	mov	x0, x19
+	bl	sblk_mlc_dump_prog
+	b	.L2892
+.L2893:
+	ldrh	w1, [x21, x0, lsl 1]
+	mov	w6, 1
+	ldrh	w0, [x2, #:lo12:.LANCHOR117]
+	mov	w5, 0
+	ldrb	w4, [x24, #:lo12:.LANCHOR68]
+	ldr	x3, [x19, 24]
+	mul	w1, w1, w0
+	adrp	x0, .LANCHOR31
+	ldrb	w2, [x0, #:lo12:.LANCHOR31]
+	mov	w0, 24
+	orr	w1, w1, w27
+	str	w1, [x19, 40]
+	sub	w0, w0, w2
+	lsl	w6, w6, w2
+	ldr	x2, [x19, 8]
+	sub	w6, w6, #1
+	lsl	w7, w6, w0
+	lsr	w0, w1, w0
+	bic	w1, w1, w7
+	and	w0, w0, w6
+	bl	flash_prog_page_en
+	b	.L2892
+.L2895:
+	mov	x0, x19
+	bl	zbuf_free
+	adrp	x0, .LC164
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC164
+	bl	printf
+.L2873:
+	ldp	x19, x20, [sp, 64]
+	ldp	x21, x22, [sp, 80]
+	ldp	x23, x24, [sp, 96]
+	ldp	x25, x26, [sp, 112]
+	ldp	x27, x28, [sp, 128]
+	ldp	x29, x30, [sp, 48]
+	add	sp, sp, 224
 	ret
-	.size	ftl_low_format_data_init, .-ftl_low_format_data_init
-	.section	.text.ftl_low_format,"ax",@progbits
+	.size	ftl_dump_write_open_sblk, .-ftl_dump_write_open_sblk
+	.section	.text.gc_ink_check_sblk,"ax",@progbits
 	.align	2
-	.global	ftl_low_format
-	.type	ftl_low_format, %function
-ftl_low_format:
+	.global	gc_ink_check_sblk
+	.type	gc_ink_check_sblk, %function
+gc_ink_check_sblk:
 	stp	x29, x30, [sp, -80]!
-	mov	w1, 0
-	adrp	x0, .LC169
-	add	x0, x0, :lo12:.LC169
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR203
+	adrp	x19, .LANCHOR76
+	add	x0, x19, :lo12:.LANCHOR76
 	stp	x21, x22, [sp, 32]
-	add	x20, x20, :lo12:.LANCHOR203
-	stp	x25, x26, [sp, 64]
-	adrp	x22, .LANCHOR6
-	mov	x25, x22
 	stp	x23, x24, [sp, 48]
-	mov	w19, 8
-	adrp	x23, .LC0
-	bl	printf
-.L2880:
-	ldr	x0, [x22, #:lo12:.LANCHOR6]
-	add	x0, x0, x19, sxtw
-	ldrb	w21, [x0, 32]
-	add	w0, w21, 127
-	and	w0, w0, 255
-	cmp	w0, 125
-	bhi	.L2878
-	mov	w2, 2539
-	mov	x1, x20
-	add	x0, x23, :lo12:.LC0
-	bl	printf
-.L2878:
-	cmp	w21, 255
-	beq	.L2879
-	adrp	x0, .LANCHOR111
-	ldrh	w1, [x0, #:lo12:.LANCHOR111]
-	mov	w0, 0
-	mul	w1, w1, w21
-	bl	flash_erase_block
-.L2879:
-	add	w19, w19, 1
-	cmp	w19, 16
-	bne	.L2880
-	bl	sblk_init
+	stp	x25, x26, [sp, 64]
+	ldrh	w1, [x0, 2110]
+	ldr	x22, [x0, 2184]
+	cmp	w1, 3
+	bhi	.L2913
+	adrp	x0, .L2915
+	mov	x20, x19
+	add	x0, x0, :lo12:.L2915
+	ldrh	w0, [x0,w1,uxtw #1]
+	adr	x1, .Lrtx2915
+	add	x0, x1, w0, sxth #2
+	br	x0
+.Lrtx2915:
+	.section	.rodata.gc_ink_check_sblk,"a",@progbits
+	.align	0
+	.align	2
+.L2915:
+	.2byte	(.L2914 - .Lrtx2915) / 4
+	.2byte	(.L2916 - .Lrtx2915) / 4
+	.2byte	(.L2917 - .Lrtx2915) / 4
+	.2byte	(.L2918 - .Lrtx2915) / 4
+	.section	.text.gc_ink_check_sblk
+.L2914:
+	adrp	x0, .LANCHOR113
+	add	x24, x0, :lo12:.LANCHOR113
+	ldrh	w0, [x0, #:lo12:.LANCHOR113]
+	cmp	w0, 7
+	bls	.L2912
+	adrp	x0, .LANCHOR57
+	ldrb	w0, [x0, #:lo12:.LANCHOR57]
+	cmp	w0, 2
+	bls	.L2912
+	adrp	x21, .LANCHOR114
+	add	x21, x21, :lo12:.LANCHOR114
+	mov	w1, 0
+	mov	x0, x21
+	bl	_list_get_gc_head_node
+	and	w0, w0, 65535
+	mov	w23, 65535
+	cmp	w0, w23
+	beq	.L2912
 	adrp	x22, .LANCHOR9
-	bl	ftl_info_blk_init
-	adrp	x19, .LANCHOR8
-	adrp	x0, .LANCHOR192
-	mov	w2, 16384
+	ubfiz	x0, x0, 2, 16
+	ldr	x1, [x22, #:lo12:.LANCHOR9]
+	ldrh	w0, [x1, x0]
+	and	w0, w0, 2047
+	cmp	w0, 2
+	bgt	.L2912
+	add	x20, x19, :lo12:.LANCHOR76
+	mov	w0, 1
+	bl	buf_alloc
+	str	x0, [x20, 2184]
+	cbz	x0, .L2912
+	mov	x2, x24
 	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR192]
-	bl	ftl_memset
+	mov	x0, x21
+	bl	_list_pop_index_node
+	and	w14, w0, 65535
+	cmp	w14, w23
+	bne	.L2922
+	ldr	x0, [x20, 2184]
+	bl	zbuf_free
+	str	xzr, [x20, 2184]
+.L2912:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L2922:
+	add	x1, x20, 2162
+	mov	w0, w14
+	bl	ftl_get_blk_list_in_sblk
+	strb	w0, [x20, 2155]
+	mov	w0, 1
+	strh	w0, [x20, 2110]
 	ldr	x0, [x22, #:lo12:.LANCHOR9]
-	mov	w3, 1
-	ldrh	w2, [x19, #:lo12:.LANCHOR8]
-	add	x2, x0, x2, lsl 2
-.L2881:
-	cmp	x0, x2
-	bne	.L2882
-	adrp	x21, .LANCHOR110
-	mov	w1, 21574
-	adrp	x24, .LANCHOR68
-	add	x24, x24, :lo12:.LANCHOR68
-	ldr	x0, [x21, #:lo12:.LANCHOR110]
-	movk	w1, 0x494c, lsl 16
-	mov	w20, 0
-	mov	w26, 1
-	strh	wzr, [x0, 148]
-	str	w1, [x0]
-.L2883:
-	ldrh	w0, [x19, #:lo12:.LANCHOR8]
-	adrp	x23, .LANCHOR75
-	cmp	w0, w20
-	bhi	.L2892
-	ldr	x0, [x25, #:lo12:.LANCHOR6]
-	mov	w4, 3
-	ldrb	w2, [x23, #:lo12:.LANCHOR75]
-	mov	w10, 15
-	ldr	x6, [x21, #:lo12:.LANCHOR110]
-	cmp	w2, 1
-	ldr	x1, [x22, #:lo12:.LANCHOR9]
-	ldrb	w0, [x0, 47]
-	csinc	w4, w4, wzr, ne
-	and	w4, w4, 255
-	and	w8, w2, 65535
-	ldrh	w3, [x6, 148]
-	udiv	w0, w0, w2
-	and	w5, w0, 65535
-	ubfiz	x0, x0, 2, 8
-	add	x0, x0, 4
-	add	w20, w5, 1
-	add	x0, x1, x0
-.L2895:
-	cmp	w2, 4
-	add	x1, x1, 4
-	csel	w7, w10, w4, eq
-	strb	w7, [x1, -1]
-	ldrb	w7, [x1, -2]
-	orr	w7, w7, -32
-	strb	w7, [x1, -2]
-	cmp	x1, x0
-	bne	.L2895
-	mul	w5, w5, w8
-	mov	w4, 16
-	add	w0, w8, w3
-	sdiv	w4, w4, w2
-	add	w0, w5, w0, uxth
-	strh	w0, [x6, 148]
-	adrp	x0, .LANCHOR19
-	ldr	w0, [x0, #:lo12:.LANCHOR19]
-	add	w4, w20, w4
-	and	w4, w4, 65535
-	strh	w4, [x6, 134]
-	tbz	x0, 12, .L2896
-	adrp	x0, .LC170
-	mov	w3, w20
-	mov	w2, 128
-	mov	w1, 2598
-	add	x0, x0, :lo12:.LC170
-	bl	printf
-.L2896:
-	ldr	x0, [x21, #:lo12:.LANCHOR110]
-	mov	w2, 128
-	mov	w1, 255
-	add	x0, x0, 160
-	bl	ftl_memset
-	adrp	x0, .LANCHOR112
-	ldrb	w10, [x23, #:lo12:.LANCHOR75]
-	adrp	x3, .LANCHOR74
-	ldr	x2, [x21, #:lo12:.LANCHOR110]
-	ldrb	w16, [x0, #:lo12:.LANCHOR112]
-	adrp	x0, .LANCHOR31
-	and	w11, w10, 65535
-	ldr	x15, [x22, #:lo12:.LANCHOR9]
-	ldrb	w4, [x0, #:lo12:.LANCHOR31]
-	mov	w0, 24
-	ldrh	w8, [x2, 134]
-	sub	w0, w0, w4
-	ldrh	w4, [x3, #:lo12:.LANCHOR74]
-	mul	w1, w20, w11
-	mov	w3, 0
-	sub	w0, w0, w4
-	mov	w4, 1
-	and	w1, w1, 65535
-	lsl	w4, w4, w0
-	and	w4, w4, 65535
-.L2897:
-	cmp	w20, w8
-	bcc	.L2903
-	ldrh	w0, [x19, #:lo12:.LANCHOR8]
-	strh	w3, [x2, 112]
-	sub	w0, w0, w8
-	strh	wzr, [x2, 114]
-	strh	w0, [x2, 116]
-	strh	wzr, [x2, 118]
-	strh	w8, [x2, 132]
-	bl	ftl_low_format_data_init
-	mov	w0, 0
+	strh	w14, [x20, 2146]
+	ubfiz	x14, x14, 2, 16
+	strh	wzr, [x20, 2148]
+	ldrh	w1, [x0, x14]
+	adrp	x0, .LANCHOR68
+	ldrb	w2, [x0, #:lo12:.LANCHOR68]
+	ldr	x0, [x20, 2184]
+	lsl	w2, w2, 9
+	tbz	x1, 0, .L2923
+	mov	w1, 85
+.L2938:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
+	ldr	x0, [x0, 8]
 	ldp	x29, x30, [sp], 80
-	ret
-.L2882:
-	ldrb	w1, [x0, 2]
-	add	x0, x0, 4
-	and	w1, w1, 31
-	bfi	w1, w3, 3, 2
-	strb	w1, [x0, -2]
-	b	.L2881
-.L2892:
-	adrp	x0, .LANCHOR81
-	strh	w20, [x24]
-	ldrb	w0, [x0, #:lo12:.LANCHOR81]
-	cbnz	w0, .L2884
-	mov	w0, w20
-	bl	ftl_test_block
-.L2884:
-	ldrb	w11, [x23, #:lo12:.LANCHOR75]
-	adrp	x0, .LANCHOR112
-	ldr	x6, [x22, #:lo12:.LANCHOR9]
-	mov	w7, 0
-	ldrb	w14, [x0, #:lo12:.LANCHOR112]
-	mov	w10, 0
-	ldr	x13, [x21, #:lo12:.LANCHOR110]
-	mov	w8, 0
-	mul	w12, w20, w11
-	add	x6, x6, x20, uxth 2
-.L2885:
-	cmp	w8, w14
-	bcs	.L2889
-	add	w15, w11, w7
-	b	.L2890
-.L2888:
-	add	w1, w7, w12
-	mov	w0, w8
-	bl	flash_check_bad_block
-	cbz	w0, .L2886
-	ldrb	w1, [x6, 3]
-	lsl	w0, w26, w7
-	orr	w0, w0, w1
-	strb	w0, [x6, 3]
-	ldrh	w0, [x13, 148]
-	add	w0, w0, 1
-	strh	w0, [x13, 148]
-.L2887:
-	add	w7, w7, 1
-.L2890:
-	cmp	w7, w15
-	bne	.L2888
-	add	w8, w8, 1
-	sub	w12, w12, w11
-	and	w8, w8, 65535
-	b	.L2885
-.L2886:
-	add	w10, w10, 1
-	and	w10, w10, 65535
-	b	.L2887
-.L2889:
-	cbnz	w10, .L2891
-	ldrb	w0, [x6, 2]
-	orr	w0, w0, -32
-	strb	w0, [x6, 2]
-.L2891:
-	add	w20, w20, 1
-	and	w20, w20, 65535
-	b	.L2883
-.L2903:
-	add	x13, x15, x20, uxth 2
-	mov	w6, 0
-	mov	w12, 0
-	mov	w5, 0
-	ldrb	w0, [x13, 2]
-	orr	w0, w0, -32
-	strb	w0, [x13, 2]
-.L2898:
-	cmp	w5, w16
-	bcc	.L2905
-	add	w20, w20, 1
-	add	w1, w1, w11
-	and	w20, w20, 65535
-	and	w1, w1, 65535
-	b	.L2897
-.L2901:
-	ldrb	w14, [x13, 3]
-	add	w17, w12, w7
-	asr	w14, w14, w17
-	tbnz	x14, 0, .L2899
-	cmp	w10, 1
-	bls	.L2904
-	and	w0, w0, 1
-	add	w0, w1, w0
-	and	w0, w0, 65535
-.L2900:
-	add	x14, x2, x3, sxtw 1
-	add	w3, w3, 1
-	and	w3, w3, 65535
-	add	w0, w0, w6
-	strh	w0, [x14, 160]
-.L2899:
-	add	x7, x7, 1
-.L2902:
-	and	w0, w7, 65535
-	cmp	w0, w11
-	bcc	.L2901
-	add	w5, w5, 1
-	add	w6, w4, w6
-	and	w5, w5, 65535
-	add	w12, w12, w10
-	and	w6, w6, 65535
-	b	.L2898
-.L2904:
-	mov	w0, w1
-	b	.L2900
-.L2905:
-	mov	x7, 0
-	b	.L2902
-	.size	ftl_low_format, .-ftl_low_format
-	.section	.text.ftl_re_low_format,"ax",@progbits
-	.align	2
-	.global	ftl_re_low_format
-	.type	ftl_re_low_format, %function
-ftl_re_low_format:
-	stp	x29, x30, [sp, -16]!
-	mov	w1, 1
-	adrp	x0, .LC171
-	add	x0, x0, :lo12:.LC171
-	add	x29, sp, 0
-	bl	printf
-	bl	sblk_init
-	bl	ftl_info_blk_init
-	bl	ftl_ext_info_init
-	adrp	x0, .LANCHOR110
-	adrp	x2, .LANCHOR8
-	mov	w3, 0
-	mov	w4, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR110]
-	mov	w5, 0
-	ldrh	w7, [x2, #:lo12:.LANCHOR8]
-	adrp	x2, .LANCHOR9
-	ldr	x2, [x2, #:lo12:.LANCHOR9]
-	ldrh	w1, [x0, 134]
-	add	x2, x2, x1, uxth 2
-.L2916:
-	cmp	w1, w7
-	bcc	.L2920
-	strh	w5, [x0, 114]
-	strh	w4, [x0, 118]
-	strh	w3, [x0, 116]
-	strh	wzr, [x0, 122]
-	strh	wzr, [x0, 120]
-	strh	wzr, [x0, 124]
-	bl	ftl_low_format_data_init
-	mov	w0, 0
-	ldp	x29, x30, [sp], 16
-	ret
-.L2920:
-	ldrb	w6, [x2, 2]
-	and	w8, w6, 31
-	strb	w8, [x2, 2]
-	ands	w6, w6, 24
-	bne	.L2917
-	add	w5, w5, 1
-	and	w5, w5, 65535
-.L2918:
-	add	w1, w1, 1
-	add	x2, x2, 4
-	and	w1, w1, 65535
-	b	.L2916
-.L2917:
-	cmp	w6, 16
-	bne	.L2919
-	add	w4, w4, 1
-	and	w4, w4, 65535
-	b	.L2918
-.L2919:
-	add	w3, w3, 1
-	and	w3, w3, 65535
-	b	.L2918
-	.size	ftl_re_low_format, .-ftl_re_low_format
-	.section	.text.pm_alloc_new_blk,"ax",@progbits
-	.align	2
-	.global	pm_alloc_new_blk
-	.type	pm_alloc_new_blk, %function
-pm_alloc_new_blk:
-	stp	x29, x30, [sp, -64]!
-	adrp	x2, .LANCHOR79
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR110
-	stp	x21, x22, [sp, 32]
-	ldr	x1, [x20, #:lo12:.LANCHOR110]
-	ldrb	w2, [x2, #:lo12:.LANCHOR79]
-	ldrh	w0, [x1, 690]
-	str	x23, [sp, 48]
-	add	w0, w0, 1
-	and	w0, w0, 65535
-	strh	w0, [x1, 690]
-	cmp	w2, w0
-	bls	.L2923
-	add	x0, x1, x0, sxtw 1
-	ldrh	w1, [x0, 672]
-	mov	w0, 65535
-	cmp	w1, w0
-	bne	.L2924
+	b	ftl_memset
 .L2923:
-	adrp	x19, .LC168
-	add	x19, x19, :lo12:.LC168
-	mov	w23, 65535
-	adrp	x22, .LANCHOR9
-.L2925:
-	mov	w0, 1
-	bl	ftl_alloc_sblk
-	and	w21, w0, 65535
-	cmp	w21, w23
-	beq	.L2925
+	mov	w1, 170
+	b	.L2938
+.L2916:
+	add	x20, x19, :lo12:.LANCHOR76
 	mov	w1, 0
-	mov	w0, w21
+	ldrh	w0, [x20, 2146]
 	bl	ftl_erase_sblk
-	add	x14, x20, :lo12:.LANCHOR110
-	ldr	x1, [x20, #:lo12:.LANCHOR110]
-	mov	w0, w21
-	add	x1, x1, 672
-	bl	ftl_get_blk_list_in_sblk
-	tst	w0, 65535
-	bne	.L2926
-	mov	w1, w21
-	mov	x0, x19
-	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR9]
-	add	x21, x0, x21, uxth 2
-	ldrb	w0, [x21, 2]
-	orr	w0, w0, -32
-	strb	w0, [x21, 2]
-	b	.L2925
-.L2926:
-	ldr	x0, [x14]
-	adrp	x1, .LANCHOR204
-	mov	w2, 1
+	mov	w0, 2
+	strh	w0, [x20, 2110]
+	b	.L2912
+.L2917:
+	adrp	x21, .LANCHOR117
+	mov	w24, 65280
+	adrp	x23, .LANCHOR31
+	add	x21, x21, :lo12:.LANCHOR117
+	add	x23, x23, :lo12:.LANCHOR31
 	mov	w19, 0
-	add	x0, x0, 416
-	str	w2, [x1, #:lo12:.LANCHOR204]
+	movk	w24, 0x55aa, lsl 16
+	bl	sblk_wait_write_queue_completed
+.L2924:
+	add	x0, x20, :lo12:.LANCHOR76
+	ldrb	w1, [x0, 2155]
+	cmp	w1, w19
+	bhi	.L2926
+	ldrh	w1, [x0, 2148]
+	adrp	x2, .LANCHOR100
+	add	w1, w1, 1
+	ldrh	w2, [x2, #:lo12:.LANCHOR100]
+	and	w1, w1, 65535
+	strh	w1, [x0, 2148]
+	cmp	w2, w1
+	bhi	.L2912
+	mov	w1, 3
+	strh	wzr, [x0, 2148]
+	strh	w1, [x0, 2110]
+	b	.L2912
+.L2926:
+	add	x1, x0, x19, sxtw 1
+	ldrh	w2, [x1, 2162]
 	mov	w1, 65535
-	strh	wzr, [x0, 274]
-.L2928:
-	ldrh	w2, [x0]
 	cmp	w2, w1
-	beq	.L2927
+	beq	.L2925
+	ldrh	w0, [x0, 2148]
+	mov	w6, 1
+	ldrh	w1, [x21]
+	mov	w5, 0
+	ldr	x3, [x22, 24]
+	madd	w1, w1, w2, w0
+	ldr	x2, [x22, 8]
+	mov	w0, 24
+	stp	w1, w24, [x2]
+	str	wzr, [x3]
+	ldrb	w4, [x23]
+	sub	w0, w0, w4
+	lsl	w6, w6, w4
+	adrp	x4, .LANCHOR68
+	sub	w6, w6, #1
+	ldrb	w4, [x4, #:lo12:.LANCHOR68]
+	lsl	w7, w6, w0
+	lsr	w0, w1, w0
+	bic	w1, w1, w7
+	and	w0, w0, w6
+	bl	flash_prog_page_en
+.L2925:
 	add	w19, w19, 1
-	add	x0, x0, 2
 	and	w19, w19, 65535
-	cmp	w19, 128
-	bne	.L2928
-	adrp	x1, .LANCHOR205
-	adrp	x0, .LC0
-	mov	w2, 264
-	add	x1, x1, :lo12:.LANCHOR205
-	add	x0, x0, :lo12:.LC0
-	bl	printf
+	b	.L2924
+.L2918:
+	adrp	x25, .LANCHOR117
+	add	x19, x19, :lo12:.LANCHOR76
+	add	x25, x25, :lo12:.LANCHOR117
+	mov	w21, 0
+	mov	w26, 65535
+	bl	sblk_wait_write_queue_completed
 .L2927:
-	ldr	x0, [x20, #:lo12:.LANCHOR110]
-	add	x19, x0, x19, sxtw 1
-	ldrh	w1, [x0, 688]
-	strh	w21, [x19, 416]
-	add	w1, w1, 1
-	strh	w1, [x0, 688]
-.L2924:
-	ldr	x1, [x20, #:lo12:.LANCHOR110]
-	ldrh	w0, [x1, 690]
-	add	x0, x0, 336
-	ldrh	w19, [x1, x0, lsl 1]
-	mov	w0, 65533
-	sub	w1, w19, #1
-	cmp	w0, w1, uxth
-	bcs	.L2930
-	adrp	x1, .LANCHOR205
-	adrp	x0, .LC0
-	mov	w2, 270
-	add	x1, x1, :lo12:.LANCHOR205
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2930:
-	adrp	x1, .LANCHOR31
-	mov	w2, 24
-	ldr	x0, [x20, #:lo12:.LANCHOR110]
-	ldrb	w1, [x1, #:lo12:.LANCHOR31]
-	sub	w2, w2, w1
-	adrp	x1, .LANCHOR74
-	strh	wzr, [x0, 696]
-	ldrh	w1, [x1, #:lo12:.LANCHOR74]
-	strh	w19, [x0, 692]
-	sub	w2, w2, w1
-	asr	w4, w19, w2
-	strh	w4, [x0, 694]
-	adrp	x0, .LANCHOR19
-	ldr	w0, [x0, #:lo12:.LANCHOR19]
-	tbz	x0, 12, .L2933
-	mov	w0, 1
-	and	w4, w4, 65535
-	lsl	w2, w0, w2
-	mov	w3, w19
-	adrp	x0, .LC172
-	sub	w2, w2, #1
-	mov	w1, w19
-	add	x0, x0, :lo12:.LC172
-	bl	printf
+	ldrb	w0, [x19, 2155]
+	cmp	w0, w21
+	bhi	.L2931
+	ldrh	w0, [x19, 2148]
+	adrp	x1, .LANCHOR100
+	add	w0, w0, 1
+	ldrh	w1, [x1, #:lo12:.LANCHOR100]
+	and	w0, w0, 65535
+	strh	w0, [x19, 2148]
+	cmp	w1, w0
+	bhi	.L2912
+	ldr	x0, [x19, 2184]
+	strh	wzr, [x19, 2110]
+	bl	zbuf_free
+	str	xzr, [x19, 2184]
+	ldrh	w0, [x19, 2112]
+	cmp	w0, 15
+	bhi	.L2932
+	add	w1, w0, 1
+	add	x0, x19, x0, sxtw 1
+	strh	w1, [x19, 2112]
+	ldrh	w1, [x19, 2146]
+	strh	w1, [x0, 2114]
 .L2933:
-	mov	w0, 0
-	ldr	x23, [sp, 48]
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 64
-	ret
-	.size	pm_alloc_new_blk, .-pm_alloc_new_blk
-	.section	.text.pm_write_page,"ax",@progbits
-	.align	2
-	.global	pm_write_page
-	.type	pm_write_page, %function
-pm_write_page:
-	stp	x29, x30, [sp, -96]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	w19, w0
-	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR94
-	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR111
-	adrp	x24, .LANCHOR110
-	mov	x23, x1
-	add	x21, x21, :lo12:.LANCHOR94
-	mov	x20, x24
-	add	x22, x22, :lo12:.LANCHOR111
-	stp	x25, x26, [sp, 64]
-	str	x27, [sp, 80]
-	mov	w25, 65535
-.L2941:
-	ldr	x0, [x24, #:lo12:.LANCHOR110]
-	ldr	w1, [x0, 48]
-	ldrh	w2, [x0, 696]
-	add	w1, w1, 1
-	str	w1, [x0, 48]
-	ldrh	w1, [x21]
-	cmp	w2, w1
-	bcs	.L2942
-	ldrh	w0, [x0, 692]
-	cmp	w0, w25
-	bne	.L2943
-.L2942:
-	bl	pm_alloc_new_blk
-	mov	w0, 0
-	bl	ftl_info_flush
-.L2943:
-	ldr	x0, [x20, #:lo12:.LANCHOR110]
-	ldrh	w0, [x0, 692]
-	cmp	w0, w25
-	bne	.L2944
-	adrp	x1, .LANCHOR206
-	adrp	x0, .LC0
-	mov	w2, 303
-	add	x1, x1, :lo12:.LANCHOR206
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2944:
-	ldr	x0, [x20, #:lo12:.LANCHOR110]
-	adrp	x27, .LANCHOR207
-	ldrh	w1, [x22]
-	mov	w2, 64
-	ldrh	w26, [x0, 692]
-	ldrh	w0, [x0, 696]
-	madd	w26, w26, w1, w0
-	ldr	x0, [x27, #:lo12:.LANCHOR207]
-	mov	w1, 0
-	bl	ftl_memset
-	ldr	x6, [x27, #:lo12:.LANCHOR207]
-	ldr	x7, [x20, #:lo12:.LANCHOR110]
-	str	w19, [x6]
-	ldr	w0, [x7, 48]
-	str	w0, [x6, 4]
-	adrp	x0, .LANCHOR131
-	ldrb	w8, [x0, #:lo12:.LANCHOR131]
-	mov	x0, x23
-	lsl	w1, w8, 9
-	bl	js_hash
-	str	w0, [x6, 8]
-	ldrb	w0, [x7, 694]
-	mov	x2, x23
-	mov	w1, w26
-	mov	w4, w8
-	mov	x3, x6
-	bl	ftl_prog_page
-	ldr	x2, [x20, #:lo12:.LANCHOR110]
-	ldrh	w1, [x2, 696]
-	add	w1, w1, 1
-	and	w1, w1, 65535
-	strh	w1, [x2, 696]
-	cmp	w1, 1
-	adrp	x1, .LANCHOR208
-	beq	.L2945
-	ldrb	w3, [x1, #:lo12:.LANCHOR208]
-	cbz	w3, .L2946
-.L2945:
-	strb	wzr, [x1, #:lo12:.LANCHOR208]
-	b	.L2941
-.L2946:
-	cmn	w0, #1
-	bne	.L2948
-	mov	w1, w26
-	adrp	x0, .LC173
-	add	x0, x0, :lo12:.LC173
-	bl	printf
-	b	.L2941
-.L2948:
-	ldrh	w0, [x2, 698]
-	cmp	w19, w0
-	bcs	.L2949
-	add	x19, x2, x19, uxtw 2
-	str	w26, [x19, 704]
-.L2949:
-	mov	w0, 0
-	ldr	x27, [sp, 80]
-	ldp	x19, x20, [sp, 16]
+	add	x19, x20, :lo12:.LANCHOR76
+	adrp	x0, .LC165
 	ldp	x21, x22, [sp, 32]
+	add	x0, x0, :lo12:.LC165
+	ldrh	w2, [x19, 2112]
+	ldrh	w1, [x19, 2146]
 	ldp	x23, x24, [sp, 48]
+	ldp	x19, x20, [sp, 16]
 	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 96
-	ret
-	.size	pm_write_page, .-pm_write_page
+	ldp	x29, x30, [sp], 80
+	b	printf
+.L2931:
+	add	x24, x19, x21, sxtw 1
+	add	x24, x24, 16
+	ldrh	w0, [x24, 2146]
+	cmp	w0, w26
+	beq	.L2929
+	ldrh	w1, [x19, 2148]
+	ldrh	w23, [x25]
+	madd	w23, w23, w0, w1
+	mov	w1, 1
+	str	w23, [x22, 40]
+	mov	x0, x22
+	bl	sblk_read_page
+	ldr	x0, [x22, 8]
+	ldr	w0, [x0]
+	cmp	w23, w0
+	beq	.L2929
+	mov	w0, w23
+	bl	ftl_mask_bad_block
+	mov	w0, -1
+	strh	w0, [x24, 2146]
+.L2929:
+	add	w21, w21, 1
+	and	w21, w21, 65535
+	b	.L2927
+.L2932:
+	ldrh	w0, [x19, 2146]
+	bl	zftl_insert_free_list
+	b	.L2933
+.L2913:
+	strh	wzr, [x0, 2110]
+	b	.L2912
+	.size	gc_ink_check_sblk, .-gc_ink_check_sblk
 	.section	.text.flash_info_flush,"ax",@progbits
 	.align	2
 	.global	flash_info_flush
@@ -18908,33 +18654,33 @@ flash_info_flush:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2955
-	adrp	x2, .LANCHOR209
-	adrp	x0, .LC94
-	add	x2, x2, :lo12:.LANCHOR209
+	tbz	x0, 12, .L2940
+	adrp	x2, .LANCHOR208
+	adrp	x0, .LC91
+	add	x2, x2, :lo12:.LANCHOR208
 	mov	w1, 365
-	add	x0, x0, :lo12:.LC94
+	add	x0, x0, :lo12:.LC91
 	bl	printf
-.L2955:
-	adrp	x23, .LANCHOR210
+.L2940:
+	adrp	x23, .LANCHOR209
 	adrp	x20, .LANCHOR6
 	mov	w2, 64
 	mov	w1, 0
-	ldr	x0, [x23, #:lo12:.LANCHOR210]
-	adrp	x21, .LANCHOR211
+	ldr	x0, [x23, #:lo12:.LANCHOR209]
+	adrp	x21, .LANCHOR210
 	adrp	x22, .LANCHOR2
-	adrp	x24, .LC175
-	adrp	x25, .LANCHOR144
+	adrp	x24, .LC167
+	adrp	x25, .LANCHOR145
 	add	x22, x22, :lo12:.LANCHOR2
-	add	x24, x24, :lo12:.LC175
-	add	x25, x25, :lo12:.LANCHOR144
+	add	x24, x24, :lo12:.LC167
+	add	x25, x25, :lo12:.LANCHOR145
 	bl	ftl_memset
-	add	x27, x21, :lo12:.LANCHOR211
+	add	x27, x21, :lo12:.LANCHOR210
 	ldr	x1, [x20, #:lo12:.LANCHOR6]
 	mov	w3, 16
 	mov	w2, 4
-	adrp	x0, .LC174
-	add	x0, x0, :lo12:.LC174
+	adrp	x0, .LC166
+	add	x0, x0, :lo12:.LC166
 	mov	w26, 0
 	bl	rknand_print_hex
 	ldr	x6, [x20, #:lo12:.LANCHOR6]
@@ -18942,9 +18688,9 @@ flash_info_flush:
 	ldr	w1, [x6, 8]
 	bl	js_hash
 	str	w0, [x6, 12]
-.L2956:
-	add	x28, x21, :lo12:.LANCHOR211
-	ldrb	w4, [x21, #:lo12:.LANCHOR211]
+.L2941:
+	add	x28, x21, :lo12:.LANCHOR210
+	ldrb	w4, [x21, #:lo12:.LANCHOR210]
 	ldrh	w19, [x22]
 	mov	x0, x24
 	mov	w1, w4
@@ -18957,7 +18703,7 @@ flash_info_flush:
 	sub	w0, w0, #1
 	cmp	w1, w0
 	ldp	w3, w4, [x29, 104]
-	blt	.L2957
+	blt	.L2942
 	ldr	x6, [x20, #:lo12:.LANCHOR6]
 	ldrb	w7, [x28, 1]
 	strh	wzr, [x28, 2]
@@ -18965,32 +18711,32 @@ flash_info_flush:
 	ldrh	w1, [x6, 16]
 	add	w0, w0, 1
 	str	w0, [x6, 4]
-	ldrb	w0, [x21, #:lo12:.LANCHOR211]
+	ldrb	w0, [x21, #:lo12:.LANCHOR210]
 	add	w1, w1, 1
 	strb	w0, [x28, 1]
 	mov	x0, x6
-	strb	w7, [x21, #:lo12:.LANCHOR211]
+	strb	w7, [x21, #:lo12:.LANCHOR210]
 	strh	w1, [x0, 16]!
 	ldr	w1, [x6, 8]
 	bl	js_hash
 	ldrh	w19, [x22]
 	str	w0, [x6, 12]
 	mul	w19, w19, w7
-.L2966:
+.L2951:
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_erase_block
-	b	.L2958
-.L2961:
+	b	.L2943
+.L2946:
 	mov	w26, 1
-	b	.L2956
-.L2957:
+	b	.L2941
+.L2942:
 	madd	w19, w19, w4, w3
-	cbz	w1, .L2966
-.L2958:
+	cbz	w1, .L2951
+.L2943:
 	ldr	x2, [x20, #:lo12:.LANCHOR6]
 	mov	w1, w19
-	ldr	x3, [x23, #:lo12:.LANCHOR210]
+	ldr	x3, [x23, #:lo12:.LANCHOR209]
 	mov	w5, 1
 	mov	w4, 4
 	ldr	w0, [x2, 4]
@@ -19004,14 +18750,14 @@ flash_info_flush:
 	ldrh	w1, [x27, 2]
 	add	w1, w1, 1
 	strh	w1, [x27, 2]
-	bne	.L2959
+	bne	.L2944
 	mov	w1, w19
-	adrp	x0, .LC176
-	add	x0, x0, :lo12:.LC176
+	adrp	x0, .LC168
+	add	x0, x0, :lo12:.LC168
 	bl	printf
-	b	.L2956
-.L2959:
-	cbz	w26, .L2961
+	b	.L2941
+.L2944:
+	cbz	w26, .L2946
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -19036,50 +18782,50 @@ flash_info_blk_init:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	tbz	x0, 12, .L2968
+	tbz	x0, 12, .L2953
 	ldr	x4, [x20, #:lo12:.LANCHOR6]
-	adrp	x2, .LANCHOR212
-	adrp	x0, .LC177
+	adrp	x2, .LANCHOR211
+	adrp	x0, .LC169
 	mov	w3, 2048
-	add	x2, x2, :lo12:.LANCHOR212
+	add	x2, x2, :lo12:.LANCHOR211
 	mov	w1, 50
-	add	x0, x0, :lo12:.LC177
+	add	x0, x0, :lo12:.LC169
 	bl	printf
-.L2968:
+.L2953:
 	adrp	x24, .LANCHOR2
 	mov	w23, 21321
 	add	x26, x24, :lo12:.LANCHOR2
 	mov	w22, 4
-	adrp	x21, .LANCHOR210
+	adrp	x21, .LANCHOR209
 	movk	w23, 0x5359, lsl 16
-.L2972:
+.L2957:
 	mov	w19, 0
-.L2971:
+.L2956:
 	ldrh	w1, [x26]
 	mov	w4, 4
-	ldr	x3, [x21, #:lo12:.LANCHOR210]
+	ldr	x3, [x21, #:lo12:.LANCHOR209]
 	mov	w0, 0
 	ldr	x2, [x20, #:lo12:.LANCHOR6]
-	add	x27, x21, :lo12:.LANCHOR210
+	add	x27, x21, :lo12:.LANCHOR209
 	add	x25, x20, :lo12:.LANCHOR6
 	madd	w1, w1, w22, w19
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L2969
+	beq	.L2954
 	ldr	x2, [x20, #:lo12:.LANCHOR6]
 	ldr	w0, [x2]
 	cmp	w0, w23
-	beq	.L2970
-.L2969:
+	beq	.L2955
+.L2954:
 	add	w19, w19, 1
 	cmp	w19, 4
-	bne	.L2971
+	bne	.L2956
 	add	w22, w22, 1
 	cmp	w22, 16
-	bne	.L2972
-.L2998:
+	bne	.L2957
+.L2983:
 	mov	w0, -1
-.L2967:
+.L2952:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -19087,16 +18833,16 @@ flash_info_blk_init:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2980:
+.L2965:
 	ldr	x0, [x25]
 	ldr	w1, [x0]
 	cmp	w1, w23
-	bne	.L2981
+	bne	.L2966
 	ldr	w22, [x0, 4]
-.L2974:
-	add	x23, x19, :lo12:.LANCHOR211
+.L2959:
+	add	x23, x19, :lo12:.LANCHOR210
 	ldrh	w0, [x24, #:lo12:.LANCHOR2]
-	ldr	x3, [x21, #:lo12:.LANCHOR210]
+	ldr	x3, [x21, #:lo12:.LANCHOR209]
 	mov	w4, 4
 	ldr	x2, [x20, #:lo12:.LANCHOR6]
 	ldrb	w1, [x23, 1]
@@ -19104,31 +18850,31 @@ flash_info_blk_init:
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L2975
+	beq	.L2960
 	ldr	x0, [x20, #:lo12:.LANCHOR6]
 	mov	w1, 21321
 	movk	w1, 0x5359, lsl 16
 	ldr	w2, [x0]
 	cmp	w2, w1
-	bne	.L2975
+	bne	.L2960
 	ldr	w1, [x0, 4]
 	cmp	w22, w1
-	bcs	.L2975
+	bcs	.L2960
 	ldrb	w1, [x0, 37]
 	ldrb	w0, [x0, 36]
-	strb	w1, [x19, #:lo12:.LANCHOR211]
+	strb	w1, [x19, #:lo12:.LANCHOR210]
 	strb	w0, [x23, 1]
-.L2975:
-	ldrb	w1, [x19, #:lo12:.LANCHOR211]
-	add	x22, x19, :lo12:.LANCHOR211
-	ldr	x3, [x21, #:lo12:.LANCHOR210]
+.L2960:
+	ldrb	w1, [x19, #:lo12:.LANCHOR210]
+	add	x22, x19, :lo12:.LANCHOR210
+	ldr	x3, [x21, #:lo12:.LANCHOR209]
 	mov	w4, 4
 	ldr	x2, [x20, #:lo12:.LANCHOR6]
 	mov	w0, 0
 	bl	flash_get_last_written_page
 	and	w25, w0, 65535
 	add	w1, w25, 1
-	ldrb	w23, [x19, #:lo12:.LANCHOR211]
+	ldrb	w23, [x19, #:lo12:.LANCHOR210]
 	strh	w1, [x22, 2]
 	mov	w22, 0
 	ldrh	w1, [x24, #:lo12:.LANCHOR2]
@@ -19136,59 +18882,59 @@ flash_info_blk_init:
 	movk	w24, 0x5359, lsl 16
 	mul	w23, w23, w1
 	add	w23, w23, w0, sxth
-.L2976:
+.L2961:
 	sub	w0, w25, w22
 	sxth	w19, w0
-	tbz	w19, #31, .L2979
+	tbz	w19, #31, .L2964
 	cmn	w19, #1
-	bne	.L2978
+	bne	.L2963
 	ldr	x0, [x20, #:lo12:.LANCHOR6]
 	ldr	w1, [x0]
-	adrp	x0, .LC178
-	add	x0, x0, :lo12:.LC178
+	adrp	x0, .LC170
+	add	x0, x0, :lo12:.LC170
 	bl	printf
-	b	.L2998
-.L2979:
-	ldr	x3, [x21, #:lo12:.LANCHOR210]
+	b	.L2983
+.L2964:
+	ldr	x3, [x21, #:lo12:.LANCHOR209]
 	mov	w4, 4
 	ldr	x2, [x20, #:lo12:.LANCHOR6]
 	sub	w1, w23, w22
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L2977
+	beq	.L2962
 	ldr	x0, [x20, #:lo12:.LANCHOR6]
 	ldr	w0, [x0]
 	cmp	w0, w24
-	beq	.L2978
-.L2977:
+	beq	.L2963
+.L2962:
 	add	w22, w22, 1
-	b	.L2976
-.L2978:
+	b	.L2961
+.L2963:
 	cmp	w22, 1
-	bls	.L2982
+	bls	.L2967
 	bl	flash_info_flush
-.L2982:
+.L2967:
 	mov	w0, 0
-	b	.L2967
-.L2970:
-	adrp	x19, .LANCHOR211
-	add	x1, x19, :lo12:.LANCHOR211
+	b	.L2952
+.L2955:
+	adrp	x19, .LANCHOR210
+	add	x1, x19, :lo12:.LANCHOR210
 	ldrb	w3, [x2, 37]
 	mov	w4, 4
 	ldrb	w0, [x2, 36]
 	strb	w3, [x1, 1]
 	ldrh	w1, [x26]
 	ldr	x3, [x27]
-	strb	w0, [x19, #:lo12:.LANCHOR211]
+	strb	w0, [x19, #:lo12:.LANCHOR210]
 	mul	w1, w1, w0
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	bne	.L2980
-.L2981:
+	bne	.L2965
+.L2966:
 	mov	w22, 0
-	b	.L2974
+	b	.L2959
 	.size	flash_info_blk_init, .-flash_info_blk_init
 	.section	.text.nand_flash_init,"ax",@progbits
 	.align	2
@@ -19205,19 +18951,19 @@ nand_flash_init:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	tbz	x0, 12, .L3000
-	adrp	x2, .LANCHOR213
-	adrp	x0, .LC94
-	add	x2, x2, :lo12:.LANCHOR213
+	tbz	x0, 12, .L2985
+	adrp	x2, .LANCHOR212
+	adrp	x0, .LC91
+	add	x2, x2, :lo12:.LANCHOR212
 	mov	w1, 3451
-	add	x0, x0, :lo12:.LC94
+	add	x0, x0, :lo12:.LC91
 	bl	printf
-.L3000:
-	adrp	x0, .LANCHOR169
+.L2985:
+	adrp	x0, .LANCHOR170
 	adrp	x24, .LANCHOR21
 	adrp	x22, .LANCHOR47
 	add	x25, x22, :lo12:.LANCHOR47
-	str	wzr, [x0, #:lo12:.LANCHOR169]
+	str	wzr, [x0, #:lo12:.LANCHOR170]
 	mov	x0, x19
 	bl	nandc_init
 	adrp	x19, .LANCHOR32
@@ -19239,22 +18985,22 @@ nand_flash_init:
 	bl	ftl_memset
 	mov	w2, 32
 	mov	w1, 0
-	adrp	x0, .LANCHOR145
-	add	x0, x0, :lo12:.LANCHOR145
+	adrp	x0, .LANCHOR146
+	add	x0, x0, :lo12:.LANCHOR146
 	bl	ftl_memset
-.L3006:
+.L2991:
 	mov	x1, x25
 	mov	w0, w20
 	bl	flash_read_id
-	cbnz	w20, .L3001
+	cbnz	w20, .L2986
 	ldrb	w0, [x26]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bls	.L3002
-.L3004:
+	bls	.L2987
+.L2989:
 	mov	w22, -2
-.L2999:
+.L2984:
 	mov	w0, w22
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -19263,56 +19009,56 @@ nand_flash_init:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L3002:
+.L2987:
 	ldrb	w0, [x26, 1]
 	cmp	w0, 255
-	beq	.L3004
-.L3001:
+	beq	.L2989
+.L2986:
 	ldrb	w0, [x25]
 	cmp	w0, 181
-	bne	.L3005
+	bne	.L2990
 	strb	w27, [x25]
-.L3005:
+.L2990:
 	add	w20, w20, 1
 	add	x25, x25, 8
 	and	w20, w20, 255
 	cmp	w20, 4
-	bne	.L3006
-	adrp	x0, .LANCHOR214
-	add	x8, x0, :lo12:.LANCHOR214
+	bne	.L2991
+	adrp	x0, .LANCHOR213
+	add	x8, x0, :lo12:.LANCHOR213
 	add	x8, x8, 1
 	mov	x7, x0
 	add	x12, x22, :lo12:.LANCHOR47
 	mov	x10, 0
-.L3009:
+.L2994:
 	ldrb	w2, [x8, -1]
 	mov	w11, w10
 	lsl	x25, x10, 5
 	mov	x1, x12
 	mov	x0, x8
 	bl	flash_mem_cmp8
-	cbnz	w0, .L3007
-	add	x0, x7, :lo12:.LANCHOR214
+	cbnz	w0, .L2992
+	add	x0, x7, :lo12:.LANCHOR213
 	ubfiz	x11, x11, 5, 32
 	add	x25, x0, x25
 	add	x0, x0, x11
-	adrp	x1, .LANCHOR215
-	add	x4, x1, :lo12:.LANCHOR215
+	adrp	x1, .LANCHOR214
+	add	x4, x1, :lo12:.LANCHOR214
 	ldrb	w3, [x0, 22]
 	mov	x0, 0
-.L3008:
+.L2993:
 	lsl	x5, x0, 5
 	mov	w2, w0
 	ldrb	w5, [x5, x4]
 	cmp	w5, w3
-	beq	.L3010
+	beq	.L2995
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L3008
+	bne	.L2993
 	mov	w2, w0
-.L3010:
+.L2995:
 	ubfiz	x0, x2, 5, 32
-	add	x1, x1, :lo12:.LANCHOR215
+	add	x1, x1, :lo12:.LANCHOR214
 	add	x1, x1, x0
 	mov	w2, 32
 	adrp	x0, .LANCHOR25
@@ -19326,97 +19072,97 @@ nand_flash_init:
 	bl	ftl_memcpy
 	ldrb	w0, [x26, #:lo12:.LANCHOR27]
 	cmp	w0, 8
-	bhi	.L3011
+	bhi	.L2996
 	ldrb	w0, [x20, 20]
 	cmp	w0, 60
-	bls	.L3011
+	bls	.L2996
 	mov	w0, 60
 	strb	w0, [x20, 20]
-.L3011:
+.L2996:
 	ldr	w0, [x21, #:lo12:.LANCHOR19]
-	tbz	x0, 12, .L3041
-	adrp	x2, .LANCHOR213
-	adrp	x0, .LC94
-	add	x2, x2, :lo12:.LANCHOR213
+	tbz	x0, 12, .L3026
+	adrp	x2, .LANCHOR212
+	adrp	x0, .LC91
+	add	x2, x2, :lo12:.LANCHOR212
 	mov	w1, 3478
-	add	x0, x0, :lo12:.LC94
+	add	x0, x0, :lo12:.LC91
 	bl	printf
-.L3041:
+.L3026:
 	ldr	x0, [x24, #:lo12:.LANCHOR21]
 	ldrh	w0, [x0, 10]
 	cmp	w0, 1023
-	bls	.L3012
+	bls	.L2997
 	mov	w0, 2
 	strb	w0, [x23, #:lo12:.LANCHOR31]
-.L3012:
+.L2997:
 	mov	w0, 16384
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR173
+	adrp	x1, .LANCHOR174
 	adrp	x23, .LANCHOR6
 	add	x20, x19, :lo12:.LANCHOR32
 	adrp	x25, .LANCHOR48
-	str	x0, [x1, #:lo12:.LANCHOR173]
+	str	x0, [x1, #:lo12:.LANCHOR174]
 	mov	w0, 16384
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR163
-	str	x0, [x1, #:lo12:.LANCHOR163]
+	adrp	x1, .LANCHOR164
+	str	x0, [x1, #:lo12:.LANCHOR164]
 	mov	w0, 2048
 	bl	ftl_malloc
 	str	x0, [x23, #:lo12:.LANCHOR6]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR172
-	str	x0, [x1, #:lo12:.LANCHOR172]
+	adrp	x1, .LANCHOR173
+	str	x0, [x1, #:lo12:.LANCHOR173]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR165
-	str	x0, [x1, #:lo12:.LANCHOR165]
+	adrp	x1, .LANCHOR166
+	str	x0, [x1, #:lo12:.LANCHOR166]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR210
-	str	x0, [x1, #:lo12:.LANCHOR210]
-	adrp	x0, .LANCHOR216
-	strb	wzr, [x0, #:lo12:.LANCHOR216]
+	adrp	x1, .LANCHOR209
+	str	x0, [x1, #:lo12:.LANCHOR209]
+	adrp	x0, .LANCHOR215
+	strb	wzr, [x0, #:lo12:.LANCHOR215]
 	bl	flash_die_info_init
 	ldrb	w0, [x20, 18]
 	bl	flash_lsb_page_tbl_build
 	ldrb	w0, [x20, 20]
-	adrp	x20, .LANCHOR171
+	adrp	x20, .LANCHOR172
 	bl	nandc_bch_sel
-	str	xzr, [x20, #:lo12:.LANCHOR171]
+	str	xzr, [x20, #:lo12:.LANCHOR172]
 	ldr	x2, [x24, #:lo12:.LANCHOR21]
 	ldrh	w0, [x2, 16]
 	ubfx	x1, x0, 8, 3
 	strb	w1, [x25, #:lo12:.LANCHOR48]
-	adrp	x1, .LANCHOR183
+	adrp	x1, .LANCHOR185
 	ubfx	x3, x0, 3, 1
-	strb	w3, [x1, #:lo12:.LANCHOR183]
+	strb	w3, [x1, #:lo12:.LANCHOR185]
 	adrp	x1, .LANCHOR44
 	ubfx	x3, x0, 4, 1
 	strb	w3, [x1, #:lo12:.LANCHOR44]
-	adrp	x1, .LANCHOR83
+	adrp	x1, .LANCHOR89
 	ubfx	x3, x0, 12, 1
-	strb	w3, [x1, #:lo12:.LANCHOR83]
-	adrp	x1, .LANCHOR80
+	strb	w3, [x1, #:lo12:.LANCHOR89]
+	adrp	x1, .LANCHOR86
 	ubfx	x3, x0, 13, 1
-	strb	w3, [x1, #:lo12:.LANCHOR80]
+	strb	w3, [x1, #:lo12:.LANCHOR86]
 	adrp	x1, .LANCHOR35
 	ubfx	x3, x0, 11, 1
 	strb	w3, [x1, #:lo12:.LANCHOR35]
-	adrp	x3, .LANCHOR124
+	adrp	x3, .LANCHOR130
 	ldrb	w1, [x2, 31]
 	ldrb	w2, [x2, 28]
 	ubfx	x4, x1, 1, 1
-	strb	w4, [x3, #:lo12:.LANCHOR124]
-	adrp	x3, .LANCHOR217
+	strb	w4, [x3, #:lo12:.LANCHOR130]
+	adrp	x3, .LANCHOR216
 	ubfx	x4, x1, 2, 1
-	strb	w4, [x3, #:lo12:.LANCHOR217]
+	strb	w4, [x3, #:lo12:.LANCHOR216]
 	adrp	x3, .LANCHOR1
 	ubfx	x4, x0, 14, 1
 	lsr	w0, w0, 15
 	strb	w4, [x3, #:lo12:.LANCHOR1]
-	adrp	x3, .LANCHOR81
-	strb	w0, [x3, #:lo12:.LANCHOR81]
+	adrp	x3, .LANCHOR87
+	strb	w0, [x3, #:lo12:.LANCHOR87]
 	adrp	x0, .LANCHOR0
 	ubfx	x3, x1, 3, 1
 	ubfx	x1, x1, 4, 1
@@ -19430,86 +19176,86 @@ nand_flash_init:
 	strb	w0, [x1, #:lo12:.LANCHOR22]
 	ldrb	w0, [x26, #:lo12:.LANCHOR27]
 	cmp	w0, 9
-	bne	.L3013
+	bne	.L2998
 	mov	w3, 70
 	strb	w3, [x1, #:lo12:.LANCHOR22]
-.L3013:
+.L2998:
 	add	x1, x19, :lo12:.LANCHOR32
 	adrp	x24, .LANCHOR24
 	strb	w2, [x24, #:lo12:.LANCHOR24]
 	ldrb	w2, [x1, 31]
-	tbz	x2, 0, .L3014
+	tbz	x2, 0, .L2999
 	ldrb	w1, [x1, 29]
-	cbz	w1, .L3015
+	cbz	w1, .L3000
 	mov	w1, 2
-.L3073:
+.L3058:
 	strb	w1, [x24, #:lo12:.LANCHOR24]
-.L3014:
+.L2999:
 	cmp	w0, 8
-	bne	.L3016
+	bne	.L3001
 	ldrb	w0, [x22, #:lo12:.LANCHOR47]
 	mov	w1, 137
 	cmp	w0, 44
 	ccmp	w0, w1, 4, ne
-	bne	.L3016
+	bne	.L3001
 	add	x0, x19, :lo12:.LANCHOR32
 	ldrb	w0, [x0, 28]
 	cmp	w0, 3
-	bne	.L3016
+	bne	.L3001
 	strb	wzr, [x24, #:lo12:.LANCHOR24]
-.L3016:
+.L3001:
 	bl	nand_flash_exit_boot_rom_slc_mode
 	adrp	x27, .LANCHOR16
 	add	x1, x19, :lo12:.LANCHOR32
 	ldrb	w0, [x1, 19]
 	ldrh	w1, [x1, 16]
 	strb	w0, [x27, #:lo12:.LANCHOR16]
-	tbz	x1, 6, .L3018
+	tbz	x1, 6, .L3003
 	sub	w1, w0, #17
 	and	w1, w1, 255
 	cmp	w1, 2
 	ccmp	w0, 21, 4, hi
-	bne	.L3019
+	bne	.L3004
 	adrp	x1, micron_read_retrial
 	add	x1, x1, :lo12:micron_read_retrial
-	str	x1, [x20, #:lo12:.LANCHOR171]
+	str	x1, [x20, #:lo12:.LANCHOR172]
 	cmp	w0, 21
-	adrp	x0, .LANCHOR166
-	beq	.L3020
+	adrp	x0, .LANCHOR167
+	beq	.L3005
 	mov	w1, 15
-.L3075:
-	strb	w1, [x0, #:lo12:.LANCHOR166]
-.L3018:
+.L3060:
+	strb	w1, [x0, #:lo12:.LANCHOR167]
+.L3003:
 	ldr	w0, [x21, #:lo12:.LANCHOR19]
-	tbz	x0, 12, .L3029
-	adrp	x2, .LANCHOR213
-	adrp	x0, .LC94
-	add	x2, x2, :lo12:.LANCHOR213
+	tbz	x0, 12, .L3014
+	adrp	x2, .LANCHOR212
+	adrp	x0, .LC91
+	add	x2, x2, :lo12:.LANCHOR212
 	mov	w1, 3571
-	add	x0, x0, :lo12:.LC94
+	add	x0, x0, :lo12:.LC91
 	bl	printf
-.L3029:
+.L3014:
 	adrp	x26, .LANCHOR26
 	ldrb	w0, [x25, #:lo12:.LANCHOR48]
 	strb	wzr, [x26, #:lo12:.LANCHOR26]
-	tbz	x0, 0, .L3030
+	tbz	x0, 0, .L3015
 	ldrb	w0, [x22, #:lo12:.LANCHOR47]
 	cmp	w0, 155
-	beq	.L3031
+	beq	.L3016
 	mov	w0, 4
 	bl	flash_set_interface_mode
 	mov	w0, 4
 	bl	nandc_set_if_mode
-.L3031:
+.L3016:
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
-.L3077:
+.L3062:
 	bl	nandc_set_if_mode
 	bl	flash_info_blk_init
 	mov	w22, w0
 	cmn	w0, #1
-	bne	.L3033
+	bne	.L3018
 	ldr	x0, [x23, #:lo12:.LANCHOR6]
 	mov	w1, 17
 	strb	w1, [x0, 32]
@@ -19517,151 +19263,151 @@ nand_flash_init:
 	strb	wzr, [x0, #:lo12:.LANCHOR33]
 	mov	w0, 0
 	bl	zftl_flash_exit_slc_mode
-	b	.L2999
-.L3007:
+	b	.L2984
+.L2992:
 	add	x10, x10, 1
 	add	x8, x8, 32
 	cmp	x10, 49
-	bne	.L3009
-	b	.L3004
-.L3015:
+	bne	.L2994
+	b	.L2989
+.L3000:
 	mov	w1, 3
-	b	.L3073
-.L3020:
+	b	.L3058
+.L3005:
 	mov	w1, 4
-	b	.L3075
-.L3019:
+	b	.L3060
+.L3004:
 	sub	w1, w0, #65
 	cmp	w0, 33
 	and	w1, w1, 255
 	ccmp	w1, 1, 0, ne
-	bhi	.L3022
+	bhi	.L3007
 	adrp	x0, toshiba_read_retrial
 	add	x0, x0, :lo12:toshiba_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR171]
+	str	x0, [x20, #:lo12:.LANCHOR172]
 	adrp	x0, .LANCHOR18
 	mov	w1, 4
 	strb	w1, [x0, #:lo12:.LANCHOR18]
-.L3079:
+.L3064:
 	mov	w1, 7
-.L3078:
-	adrp	x0, .LANCHOR166
-	b	.L3075
-.L3022:
+.L3063:
+	adrp	x0, .LANCHOR167
+	b	.L3060
+.L3007:
 	sub	w2, w0, #34
 	sub	w1, w0, #67
 	and	w2, w2, 255
 	and	w1, w1, 255
 	cmp	w2, 1
 	ccmp	w1, 1, 0, hi
-	bhi	.L3023
+	bhi	.L3008
 	adrp	x2, toshiba_read_retrial
 	add	x2, x2, :lo12:toshiba_read_retrial
-	str	x2, [x20, #:lo12:.LANCHOR171]
+	str	x2, [x20, #:lo12:.LANCHOR172]
 	cmp	w0, 35
 	mov	w2, 68
 	ccmp	w0, w2, 4, ne
-	adrp	x0, .LANCHOR166
-	beq	.L3024
+	adrp	x0, .LANCHOR167
+	beq	.L3009
 	mov	w2, 7
-.L3074:
-	strb	w2, [x0, #:lo12:.LANCHOR166]
+.L3059:
+	strb	w2, [x0, #:lo12:.LANCHOR167]
 	cmp	w1, 1
 	adrp	x0, .LANCHOR18
-	bhi	.L3026
+	bhi	.L3011
 	mov	w1, 4
-.L3076:
+.L3061:
 	strb	w1, [x0, #:lo12:.LANCHOR18]
-	b	.L3018
-.L3024:
+	b	.L3003
+.L3009:
 	mov	w2, 17
-	b	.L3074
-.L3026:
+	b	.L3059
+.L3011:
 	mov	w1, 5
-	b	.L3076
-.L3023:
+	b	.L3061
+.L3008:
 	sub	w1, w0, #36
 	and	w1, w1, 255
 	cmp	w1, 1
-	bhi	.L3027
+	bhi	.L3012
 	adrp	x0, toshiba_3d_read_retrial
 	add	x0, x0, :lo12:toshiba_3d_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR171]
-	b	.L3079
-.L3027:
+	str	x0, [x20, #:lo12:.LANCHOR172]
+	b	.L3064
+.L3012:
 	cmp	w0, 50
-	bne	.L3028
+	bne	.L3013
 	adrp	x0, samsung_read_retrial
 	mov	w1, 25
 	add	x0, x0, :lo12:samsung_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR171]
-	b	.L3078
-.L3028:
+	str	x0, [x20, #:lo12:.LANCHOR172]
+	b	.L3063
+.L3013:
 	cmp	w0, 81
-	bne	.L3018
+	bne	.L3003
 	adrp	x0, ymtc_3d_read_retrial
 	add	x0, x0, :lo12:ymtc_3d_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR171]
-	adrp	x0, .LANCHOR166
+	str	x0, [x20, #:lo12:.LANCHOR172]
+	adrp	x0, .LANCHOR167
 	mov	w1, 7
-	strb	w1, [x0, #:lo12:.LANCHOR166]
+	strb	w1, [x0, #:lo12:.LANCHOR167]
 	adrp	x0, .LANCHOR50
 	strb	wzr, [x0, #:lo12:.LANCHOR50]
-	b	.L3018
-.L3030:
+	b	.L3003
+.L3015:
 	mov	w0, 4
-	b	.L3077
-.L3033:
+	b	.L3062
+.L3018:
 	add	x19, x19, :lo12:.LANCHOR32
 	ldrb	w0, [x19, 7]
 	cmp	w0, 9
-	bne	.L3034
+	bne	.L3019
 	ldr	x0, [x23, #:lo12:.LANCHOR6]
 	ldrb	w0, [x0, 20]
 	cmp	w0, 1
-	beq	.L3034
+	beq	.L3019
 	strb	wzr, [x24, #:lo12:.LANCHOR24]
-.L3034:
+.L3019:
 	ldrb	w0, [x27, #:lo12:.LANCHOR16]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 7
-	bhi	.L3035
+	bhi	.L3020
 	adrp	x0, hynix_read_retrial
 	add	x0, x0, :lo12:hynix_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR171]
-.L3035:
+	str	x0, [x20, #:lo12:.LANCHOR172]
+.L3020:
 	ldrb	w0, [x25, #:lo12:.LANCHOR48]
-	tbz	x0, 2, .L3037
+	tbz	x0, 2, .L3022
 	ldr	x0, [x23, #:lo12:.LANCHOR6]
 	ldrb	w0, [x0, 19]
-	cbz	w0, .L3037
-	adrp	x0, .LANCHOR211
-	ldrb	w1, [x0, #:lo12:.LANCHOR211]
+	cbz	w0, .L3022
+	adrp	x0, .LANCHOR210
+	ldrb	w1, [x0, #:lo12:.LANCHOR210]
 	adrp	x0, .LANCHOR2
 	ldrh	w0, [x0, #:lo12:.LANCHOR2]
 	mul	w1, w1, w0
 	mov	w0, 0
 	bl	flash_ddr_para_scan
 	ldrb	w0, [x26, #:lo12:.LANCHOR26]
-	cbnz	w0, .L3037
+	cbnz	w0, .L3022
 	ldr	x0, [x23, #:lo12:.LANCHOR6]
 	strb	wzr, [x0, 19]
 	bl	flash_info_flush
-.L3037:
+.L3022:
 	bl	nand_flash_exit_boot_rom_slc_mode
 	ldr	w0, [x21, #:lo12:.LANCHOR19]
-	tbz	x0, 12, .L3039
-	adrp	x2, .LANCHOR213
-	adrp	x0, .LC94
-	add	x2, x2, :lo12:.LANCHOR213
+	tbz	x0, 12, .L3024
+	adrp	x2, .LANCHOR212
+	adrp	x0, .LC91
+	add	x2, x2, :lo12:.LANCHOR212
 	mov	w1, 3674
-	add	x0, x0, :lo12:.LC94
+	add	x0, x0, :lo12:.LC91
 	bl	printf
-.L3039:
+.L3024:
 	bl	nand_flash_print_info
 	mov	w22, 0
-	b	.L2999
+	b	.L2984
 	.size	nand_flash_init, .-nand_flash_init
 	.section	.text.ftl_sysblk_dump,"ax",@progbits
 	.align	2
@@ -19678,37 +19424,37 @@ ftl_sysblk_dump:
 	stp	x25, x26, [sp, 112]
 	mov	w0, 1
 	stp	x27, x28, [sp, 128]
-	adrp	x25, .LANCHOR94
+	adrp	x25, .LANCHOR100
 	stp	x21, x22, [sp, 80]
 	bl	buf_alloc
 	ldr	x28, [x0, 8]
-	adrp	x26, .LANCHOR111
-	adrp	x27, .LANCHOR131
+	adrp	x26, .LANCHOR117
+	adrp	x27, .LANCHOR68
 	mov	x24, x0
-	add	x25, x25, :lo12:.LANCHOR94
-	add	x26, x26, :lo12:.LANCHOR111
-	add	x27, x27, :lo12:.LANCHOR131
+	add	x25, x25, :lo12:.LANCHOR100
+	add	x26, x26, :lo12:.LANCHOR117
+	add	x27, x27, :lo12:.LANCHOR68
 	mov	w19, 0
-.L3081:
+.L3066:
 	ldrh	w0, [x25]
 	cmp	w0, w19
-	bhi	.L3083
+	bhi	.L3068
 	add	x1, x28, 704
 	mov	w3, 32
 	mov	w2, 4
-	adrp	x0, .LC179
-	add	x0, x0, :lo12:.LC179
+	adrp	x0, .LC171
+	add	x0, x0, :lo12:.LC171
 	bl	rknand_print_hex
 	mov	x0, x24
 	bl	zbuf_free
-	cbz	w20, .L3084
-	adrp	x1, .LANCHOR218
+	cbz	w20, .L3069
+	adrp	x1, .LANCHOR217
 	adrp	x0, .LC0
-	mov	w2, 1619
-	add	x1, x1, :lo12:.LANCHOR218
+	mov	w2, 1624
+	add	x1, x1, :lo12:.LANCHOR217
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3084:
+.L3069:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
@@ -19718,7 +19464,7 @@ ftl_sysblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 144
 	ret
-.L3083:
+.L3068:
 	ldrh	w21, [x26]
 	ldrb	w3, [x27]
 	ldr	x1, [x24, 8]
@@ -19747,13 +19493,13 @@ ftl_sysblk_dump:
 	mov	w1, w23
 	ldp	w5, w6, [x0]
 	ldr	w7, [x0, 8]
-	adrp	x0, .LC160
-	add	x0, x0, :lo12:.LC160
+	adrp	x0, .LC161
+	add	x0, x0, :lo12:.LC161
 	bl	printf
 	cmp	w22, 512
 	ccmn	w22, #1, 4, ne
 	csinc	w20, w20, wzr, ne
-	b	.L3081
+	b	.L3066
 	.size	ftl_sysblk_dump, .-ftl_sysblk_dump
 	.section	.text.ftl_open_sblk_recovery,"ax",@progbits
 	.align	2
@@ -19771,53 +19517,53 @@ ftl_open_sblk_recovery:
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	str	x1, [x29, 144]
-	tbz	x0, 12, .L3092
+	tbz	x0, 12, .L3077
 	ldrh	w1, [x19, 2]
-	adrp	x0, .LC180
-	add	x0, x0, :lo12:.LC180
+	adrp	x0, .LC172
+	add	x0, x0, :lo12:.LC172
 	bl	printf
-.L3092:
+.L3077:
 	ldr	w0, [x21, #:lo12:.LANCHOR19]
-	tbz	x0, 12, .L3093
+	tbz	x0, 12, .L3078
 	ldrb	w1, [x19, 5]
-	adrp	x0, .LC181
-	add	x0, x0, :lo12:.LC181
+	adrp	x0, .LC173
+	add	x0, x0, :lo12:.LC173
 	bl	printf
-.L3093:
+.L3078:
 	ldr	w0, [x21, #:lo12:.LANCHOR19]
-	tbz	x0, 12, .L3094
+	tbz	x0, 12, .L3079
 	ldrh	w1, [x19]
-	adrp	x0, .LC182
-	add	x0, x0, :lo12:.LC182
+	adrp	x0, .LC174
+	add	x0, x0, :lo12:.LC174
 	bl	printf
-.L3094:
+.L3079:
 	ldr	w0, [x21, #:lo12:.LANCHOR19]
-	tbz	x0, 12, .L3095
+	tbz	x0, 12, .L3080
 	ldrh	w2, [x19, 18]
-	adrp	x0, .LC183
+	adrp	x0, .LC175
 	ldrh	w1, [x19, 16]
-	add	x0, x0, :lo12:.LC183
+	add	x0, x0, :lo12:.LC175
 	bl	printf
-.L3095:
+.L3080:
 	ldr	w0, [x21, #:lo12:.LANCHOR19]
-	tbz	x0, 12, .L3096
+	tbz	x0, 12, .L3081
 	ldrb	w1, [x19, 9]
-	adrp	x0, .LC184
-	add	x0, x0, :lo12:.LC184
+	adrp	x0, .LC176
+	add	x0, x0, :lo12:.LC176
 	bl	printf
-.L3096:
+.L3081:
 	ldrh	w0, [x19, 10]
 	strh	w0, [x19, 14]
 	adrp	x0, .LANCHOR8
 	ldrh	w1, [x19]
 	ldrh	w0, [x0, #:lo12:.LANCHOR8]
 	cmp	w1, w0
-	bcs	.L3091
+	bcs	.L3076
 	mov	w0, 1
-	adrp	x22, .LANCHOR131
+	adrp	x22, .LANCHOR68
 	bl	buf_alloc
 	mov	x20, x0
-	ldrb	w0, [x22, #:lo12:.LANCHOR131]
+	ldrb	w0, [x22, #:lo12:.LANCHOR68]
 	add	x26, x29, 176
 	mov	w2, 64
 	mov	w27, 2
@@ -19838,127 +19584,127 @@ ftl_open_sblk_recovery:
 	add	x0, x29, 304
 	bl	ftl_memset
 	ldrb	w23, [x19, 5]
-	adrp	x0, .LANCHOR111
+	adrp	x0, .LANCHOR117
 	ldrh	w24, [x19, 2]
-	add	x0, x0, :lo12:.LANCHOR111
+	add	x0, x0, :lo12:.LANCHOR117
 	str	x0, [x29, 128]
-.L3098:
-	adrp	x25, .LANCHOR94
-	ldrh	w0, [x25, #:lo12:.LANCHOR94]
+.L3083:
+	adrp	x25, .LANCHOR100
+	ldrh	w0, [x25, #:lo12:.LANCHOR100]
 	cmp	w0, w24
-	bhi	.L3113
-.L3101:
+	bhi	.L3098
+.L3086:
 	ldrh	w0, [x19, 10]
 	ldrh	w1, [x19, 6]
-	ldrh	w2, [x25, #:lo12:.LANCHOR94]
+	ldrh	w2, [x25, #:lo12:.LANCHOR100]
 	add	w1, w1, w0
 	ldrb	w0, [x19, 9]
 	strh	w24, [x19, 2]
 	strb	w23, [x19, 5]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L3114
-	adrp	x1, .LANCHOR219
+	beq	.L3099
+	adrp	x1, .LANCHOR218
 	adrp	x0, .LC0
-	mov	w2, 1802
-	add	x1, x1, :lo12:.LANCHOR219
+	mov	w2, 1807
+	add	x1, x1, :lo12:.LANCHOR218
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3114:
-	adrp	x2, .LANCHOR117
+.L3099:
+	adrp	x2, .LANCHOR123
 	ldrh	w3, [x19, 10]
 	mov	w0, 0
 	mov	w1, 0
-	ldr	x4, [x2, #:lo12:.LANCHOR117]
+	ldr	x4, [x2, #:lo12:.LANCHOR123]
 	str	x2, [x29, 152]
-.L3115:
+.L3100:
 	cmp	w1, w3
-	bcc	.L3117
+	bcc	.L3102
 	ldrb	w23, [x19, 9]
 	adrp	x24, .LANCHOR11
-	ldrh	w1, [x25, #:lo12:.LANCHOR94]
+	ldrh	w1, [x25, #:lo12:.LANCHOR100]
 	madd	w23, w23, w1, w0
 	ldr	w0, [x21, #:lo12:.LANCHOR19]
 	sub	w23, w23, w3
 	and	w23, w23, 65535
-	tbz	x0, 12, .L3118
+	tbz	x0, 12, .L3103
 	ldrh	w1, [x19]
 	ldr	x2, [x24, #:lo12:.LANCHOR11]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w3, [x2, x0]
-	adrp	x0, .LC187
+	adrp	x0, .LC179
 	mov	w2, w23
-	add	x0, x0, :lo12:.LC187
+	add	x0, x0, :lo12:.LC179
 	bl	printf
-.L3118:
+.L3103:
 	ldr	x0, [x24, #:lo12:.LANCHOR11]
 	ldrh	w1, [x19]
 	strh	w23, [x0, x1, lsl 1]
 	ldr	w0, [x21, #:lo12:.LANCHOR19]
-	tbz	x0, 14, .L3119
+	tbz	x0, 14, .L3104
 	ldp	w1, w2, [x29, 176]
-	adrp	x0, .LC188
+	adrp	x0, .LC180
 	ldp	w3, w4, [x29, 184]
-	add	x0, x0, :lo12:.LC188
+	add	x0, x0, :lo12:.LC180
 	bl	printf
-.L3119:
+.L3104:
 	ldr	x0, [x20, 8]
 	mov	w1, 0
-	ldrb	w2, [x22, #:lo12:.LANCHOR131]
-	adrp	x28, .LANCHOR79
+	ldrb	w2, [x22, #:lo12:.LANCHOR68]
+	adrp	x28, .LANCHOR85
 	mov	x24, 0
 	lsl	w2, w2, 9
 	bl	ftl_memset
-	adrp	x0, .LC190
-	add	x0, x0, :lo12:.LC190
+	adrp	x0, .LC182
+	add	x0, x0, :lo12:.LC182
 	str	x0, [x29, 136]
-	add	x0, x28, :lo12:.LANCHOR79
+	add	x0, x28, :lo12:.LANCHOR85
 	str	x0, [x29, 128]
-.L3120:
-	ldrb	w0, [x28, #:lo12:.LANCHOR79]
-	add	x1, x28, :lo12:.LANCHOR79
+.L3105:
+	ldrb	w0, [x28, #:lo12:.LANCHOR85]
+	add	x1, x28, :lo12:.LANCHOR85
 	str	w24, [x29, 168]
 	mul	w0, w0, w27
 	cmp	w24, w0
-	bcc	.L3131
-	adrp	x24, .LC191
-	adrp	x23, .LC190
-	add	x24, x24, :lo12:.LC191
-	add	x23, x23, :lo12:.LC190
+	bcc	.L3116
+	adrp	x24, .LC183
+	adrp	x23, .LC182
+	add	x24, x24, :lo12:.LC183
+	add	x23, x23, :lo12:.LC182
 	mov	x28, 0
 	str	x1, [x29, 160]
-.L3132:
+.L3117:
 	ldr	x0, [x29, 160]
 	ldrb	w0, [x0]
 	mul	w0, w0, w27
 	cmp	w0, w28
-	bhi	.L3138
+	bhi	.L3123
 	mov	x0, x20
 	bl	zbuf_free
 	ldrh	w1, [x19, 12]
-	ldrh	w0, [x25, #:lo12:.LANCHOR94]
+	ldrh	w0, [x25, #:lo12:.LANCHOR100]
 	ldrb	w2, [x19, 9]
 	madd	w0, w0, w2, w1
 	mov	x1, -4
 	add	x0, x1, x0, sxtw 2
 	ldr	x1, [x29, 152]
-	ldr	x1, [x1, #:lo12:.LANCHOR117]
+	ldr	x1, [x1, #:lo12:.LANCHOR123]
 	ldr	w0, [x1, x0]
 	cmn	w0, #1
-	beq	.L3139
-	adrp	x1, .LANCHOR219
+	beq	.L3124
+	adrp	x1, .LANCHOR218
 	adrp	x0, .LC0
-	mov	w2, 1917
-	add	x1, x1, :lo12:.LANCHOR219
+	mov	w2, 1922
+	add	x1, x1, :lo12:.LANCHOR218
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3139:
+.L3124:
 	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bne	.L3091
+	bne	.L3076
 	mov	x0, x19
 	bl	ftl_write_last_log_page
-.L3091:
+.L3076:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -19966,29 +19712,29 @@ ftl_open_sblk_recovery:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 368
 	ret
-.L3113:
+.L3098:
 	ldrb	w23, [x19, 5]
-	adrp	x0, .LANCHOR195
-	add	x0, x0, :lo12:.LANCHOR195
+	adrp	x0, .LANCHOR197
+	add	x0, x0, :lo12:.LANCHOR197
 	str	x0, [x29, 136]
-.L3099:
+.L3084:
 	ldrb	w0, [x19, 9]
 	cmp	w0, w23
-	bhi	.L3112
+	bhi	.L3097
 	add	w24, w24, 1
 	strb	wzr, [x19, 5]
 	and	w24, w24, 65535
-	b	.L3098
-.L3112:
+	b	.L3083
+.L3097:
 	add	x0, x19, x23, sxtw 1
 	ldrh	w0, [x0, 16]
 	str	w0, [x29, 168]
 	mov	w0, 65535
 	ldr	w1, [x29, 168]
 	cmp	w1, w0
-	beq	.L3100
+	beq	.L3085
 	ldr	x0, [x29, 128]
-	ldrb	w3, [x22, #:lo12:.LANCHOR131]
+	ldrb	w3, [x22, #:lo12:.LANCHOR68]
 	ldr	x2, [x20, 24]
 	ldrh	w0, [x0]
 	madd	w0, w0, w1, w24
@@ -19997,21 +19743,21 @@ ftl_open_sblk_recovery:
 	bl	ftl_read_ppa_page
 	mov	w28, w0
 	cmp	w0, 512
-	beq	.L3101
+	beq	.L3086
 	cmn	w0, #1
-	beq	.L3102
+	beq	.L3087
 	ldr	x0, [x20, 24]
 	ldr	w1, [x0]
 	cmn	w1, #1
-	bne	.L3102
+	bne	.L3087
 	ldr	w0, [x0, 4]
 	cmn	w0, #1
-	bne	.L3102
+	bne	.L3087
 	ldr	x0, [x20, 8]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L3101
-.L3102:
+	beq	.L3086
+.L3087:
 	ldr	x1, [x29, 136]
 	mov	w0, 1
 	strb	w0, [x1]
@@ -20019,76 +19765,76 @@ ftl_open_sblk_recovery:
 	ldrh	w1, [x19, 10]
 	madd	w0, w0, w24, w23
 	cmp	w1, w0
-	beq	.L3103
-	adrp	x1, .LANCHOR219
+	beq	.L3088
+	adrp	x1, .LANCHOR218
 	adrp	x0, .LC0
-	mov	w2, 1694
-	add	x1, x1, :lo12:.LANCHOR219
+	mov	w2, 1699
+	add	x1, x1, :lo12:.LANCHOR218
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3103:
+.L3088:
 	ldrh	w0, [x19, 10]
 	ldrh	w1, [x19, 6]
 	ldrb	w2, [x19, 9]
 	add	w1, w1, w0
-	ldrh	w0, [x25, #:lo12:.LANCHOR94]
+	ldrh	w0, [x25, #:lo12:.LANCHOR100]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L3104
-	adrp	x1, .LANCHOR219
+	beq	.L3089
+	adrp	x1, .LANCHOR218
 	adrp	x0, .LC0
-	mov	w2, 1695
-	add	x1, x1, :lo12:.LANCHOR219
+	mov	w2, 1700
+	add	x1, x1, :lo12:.LANCHOR218
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3104:
-	ldrb	w0, [x22, #:lo12:.LANCHOR131]
+.L3089:
+	ldrb	w0, [x22, #:lo12:.LANCHOR68]
 	cmp	w0, 8
-	bls	.L3105
+	bls	.L3090
 	ldr	x6, [x20, 24]
 	mov	w1, 15555
 	movk	w1, 0xf55f, lsl 16
 	ldr	w0, [x6]
 	cmp	w0, w1
-	beq	.L3105
+	beq	.L3090
 	cmn	w28, #1
-	beq	.L3107
+	beq	.L3092
 	ldr	w0, [x6, 4]
 	cmn	w0, #1
-	beq	.L3108
+	beq	.L3093
 	ldr	w1, [x6, 16]
 	mov	w0, 21320
 	movk	w0, 0x4841, lsl 16
 	cmp	w1, w0
-	bne	.L3108
+	bne	.L3093
 	ldr	x0, [x29, 152]
 	mov	w1, 1024
 	bl	js_hash
 	ldr	w1, [x6, 20]
 	cmp	w1, w0
-	beq	.L3108
+	beq	.L3093
 	ldr	w3, [x29, 160]
 	mov	w5, w0
 	ldr	w1, [x29, 168]
 	mov	w4, w28
 	mov	w2, w24
-	adrp	x0, .LC185
-	add	x0, x0, :lo12:.LC185
+	adrp	x0, .LC177
+	add	x0, x0, :lo12:.LC177
 	bl	printf
 	ldr	x1, [x29, 152]
 	mov	w3, 16
 	mov	w2, 4
-	adrp	x0, .LC186
-	add	x0, x0, :lo12:.LC186
+	adrp	x0, .LC178
+	add	x0, x0, :lo12:.LC178
 	bl	rknand_print_hex
 	ldr	x1, [x20, 24]
-	adrp	x0, .LC147
-	ldrb	w3, [x22, #:lo12:.LANCHOR131]
+	adrp	x0, .LC144
+	ldrb	w3, [x22, #:lo12:.LANCHOR68]
 	mov	w2, 4
-	add	x0, x0, :lo12:.LC147
+	add	x0, x0, :lo12:.LC144
 	lsr	w3, w3, 1
 	bl	rknand_print_hex
-.L3107:
+.L3092:
 	ldrh	w0, [x19, 6]
 	mov	w27, 4
 	sub	w0, w0, #1
@@ -20096,55 +19842,55 @@ ftl_open_sblk_recovery:
 	ldrh	w0, [x19, 10]
 	add	w0, w0, 1
 	strh	w0, [x19, 10]
-.L3100:
+.L3085:
 	add	w23, w23, 1
 	and	w23, w23, 65535
-	b	.L3099
-.L3105:
+	b	.L3084
+.L3090:
 	cmn	w28, #1
-	beq	.L3107
-.L3108:
+	beq	.L3092
+.L3093:
 	ldr	x1, [x20, 24]
 	ldr	w0, [x1, 4]
 	cmn	w0, #1
-	beq	.L3107
+	beq	.L3092
 	ldr	w1, [x1]
 	mov	w2, 15555
 	movk	w2, 0xf55f, lsl 16
 	cmp	w1, w2
-	beq	.L3107
+	beq	.L3092
 	bl	lpa_hash_get_ppa
 	ldr	x1, [x29, 144]
-	cbz	x1, .L3110
+	cbz	x1, .L3095
 	ldr	x3, [x20, 24]
 	ldr	w1, [x3, 8]
 	cmp	w0, w1
-	beq	.L3110
+	beq	.L3095
 	cmn	w0, #1
-	beq	.L3110
+	beq	.L3095
 	adrp	x4, .LANCHOR31
-	adrp	x5, .LANCHOR74
+	adrp	x5, .LANCHOR80
 	mov	w28, 24
 	mov	w27, 1
 	ldrb	w1, [x4, #:lo12:.LANCHOR31]
-	ldrh	w6, [x5, #:lo12:.LANCHOR74]
+	ldrh	w6, [x5, #:lo12:.LANCHOR80]
 	sub	w1, w28, w1
 	sub	w1, w1, w6
 	lsr	w2, w0, w6
-	adrp	x6, .LANCHOR75
+	adrp	x6, .LANCHOR81
 	lsl	w1, w27, w1
 	sub	w1, w1, #1
 	and	w1, w1, w2
-	ldrb	w2, [x6, #:lo12:.LANCHOR75]
+	ldrb	w2, [x6, #:lo12:.LANCHOR81]
 	udiv	w1, w1, w2
 	ldr	x2, [x29, 144]
 	ldrh	w2, [x2]
 	cmp	w2, w1, uxth
-	bne	.L3110
+	bne	.L3095
 	ldr	w8, [x3]
-	adrp	x7, .LANCHOR190
-	ldrb	w3, [x22, #:lo12:.LANCHOR131]
-	add	x2, x7, :lo12:.LANCHOR190
+	adrp	x7, .LANCHOR192
+	ldrb	w3, [x22, #:lo12:.LANCHOR68]
+	add	x2, x7, :lo12:.LANCHOR192
 	ldr	x1, [x20, 8]
 	str	w8, [x29, 124]
 	str	x7, [x29, 168]
@@ -20153,48 +19899,48 @@ ftl_open_sblk_recovery:
 	bl	ftl_read_ppa_page
 	ldr	x7, [x29, 168]
 	ldr	w8, [x29, 124]
-	ldr	w0, [x7, #:lo12:.LANCHOR190]
+	ldr	w0, [x7, #:lo12:.LANCHOR192]
 	cmp	w8, w0
-	bhi	.L3110
+	bhi	.L3095
 	ldr	x0, [x20, 24]
 	ldr	w0, [x0, 8]
 	cmn	w0, #1
-	beq	.L3107
+	beq	.L3092
 	ldp	x6, x4, [x29, 96]
 	ldr	x5, [x29, 112]
 	ldrb	w2, [x4, #:lo12:.LANCHOR31]
-	ldrh	w1, [x5, #:lo12:.LANCHOR74]
+	ldrh	w1, [x5, #:lo12:.LANCHOR80]
 	sub	w28, w28, w2
 	sub	w28, w28, w1
 	lsr	w0, w0, w1
 	lsl	w27, w27, w28
 	sub	w27, w27, #1
 	and	w27, w27, w0
-	ldrb	w0, [x6, #:lo12:.LANCHOR75]
+	ldrb	w0, [x6, #:lo12:.LANCHOR81]
 	udiv	w0, w27, w0
 	bl	ftl_vpn_decrement
-	b	.L3107
-.L3117:
+	b	.L3092
+.L3102:
 	ldrh	w2, [x19, 12]
 	add	w2, w2, w1
 	ldr	w2, [x4, x2, lsl 2]
 	cmn	w2, #1
-	beq	.L3116
+	beq	.L3101
 	add	w23, w0, 1
 	and	w0, w23, 65535
-.L3116:
+.L3101:
 	add	w1, w1, 1
-	b	.L3115
-.L3131:
+	b	.L3100
+.L3116:
 	ldr	w0, [x26, x24, lsl 2]
 	cmn	w0, #1
-	bne	.L3121
-.L3125:
-	adrp	x0, .LANCHOR110
+	bne	.L3106
+.L3110:
+	adrp	x0, .LANCHOR69
 	ldr	x1, [x20, 24]
 	mov	w23, -1
 	mov	x2, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR110]
+	ldr	x0, [x0, #:lo12:.LANCHOR69]
 	ldr	w0, [x0, 8]
 	stp	w0, w23, [x1]
 	ldr	x0, [x20, 8]
@@ -20203,21 +19949,21 @@ ftl_open_sblk_recovery:
 	str	wzr, [x0]
 	mov	w0, 2
 	bl	ftl_debug_info_fill
-.L3122:
+.L3107:
 	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bls	.L3127
+	bls	.L3112
 	add	x0, x21, :lo12:.LANCHOR19
 	str	x0, [x29, 160]
-	add	x0, x22, :lo12:.LANCHOR131
+	add	x0, x22, :lo12:.LANCHOR68
 	str	x0, [x29, 144]
-.L3191:
+.L3176:
 	mov	x0, x19
 	bl	ftl_get_new_free_page
 	mov	w4, w0
 	ldr	x0, [x29, 160]
 	ldr	w0, [x0]
-	tbz	x0, 14, .L3128
+	tbz	x0, 14, .L3113
 	ldrh	w0, [x19, 12]
 	mov	w1, w4
 	ldrh	w3, [x19, 10]
@@ -20229,7 +19975,7 @@ ftl_open_sblk_recovery:
 	ldr	x0, [x29, 136]
 	bl	printf
 	ldr	w4, [x29, 124]
-.L3128:
+.L3113:
 	ldr	x0, [x29, 128]
 	ldr	w2, [x29, 168]
 	ldrh	w1, [x19, 6]
@@ -20238,7 +19984,7 @@ ftl_open_sblk_recovery:
 	add	w0, w0, 1
 	sub	w0, w0, w2
 	cmp	w1, w0
-	bls	.L3127
+	bls	.L3112
 	ldr	x0, [x29, 144]
 	ldr	x1, [x20, 8]
 	ldr	x2, [x20, 24]
@@ -20254,7 +20000,7 @@ ftl_open_sblk_recovery:
 	cmn	w23, #1
 	ldr	w4, [x29, 112]
 	ccmn	w1, #1, 4, ne
-	beq	.L3130
+	beq	.L3115
 	add	x0, x29, 240
 	ldrh	w1, [x19, 12]
 	str	w4, [x0, x24, lsl 2]
@@ -20263,11 +20009,11 @@ ftl_open_sblk_recovery:
 	add	x1, x29, 304
 	sub	w0, w0, #1
 	str	w0, [x1, x24, lsl 2]
-.L3127:
+.L3112:
 	add	x24, x24, 1
-	b	.L3120
-.L3121:
-	ldrb	w3, [x22, #:lo12:.LANCHOR131]
+	b	.L3105
+.L3106:
+	ldrb	w3, [x22, #:lo12:.LANCHOR68]
 	ldr	x1, [x20, 8]
 	ldr	x2, [x20, 24]
 	bl	ftl_read_ppa_page
@@ -20277,17 +20023,17 @@ ftl_open_sblk_recovery:
 	bl	lpa_hash_get_ppa
 	mov	w4, w0
 	ldr	w0, [x21, #:lo12:.LANCHOR19]
-	tbz	x0, 14, .L3123
+	tbz	x0, 14, .L3108
 	ldr	x0, [x20, 24]
 	mov	w1, w4
 	ldr	w2, [x26, x24, lsl 2]
 	str	w4, [x29, 160]
 	ldr	w3, [x0, 4]
-	adrp	x0, .LC189
-	add	x0, x0, :lo12:.LC189
+	adrp	x0, .LC181
+	add	x0, x0, :lo12:.LC181
 	bl	printf
 	ldr	w4, [x29, 160]
-.L3123:
+.L3108:
 	ldr	x1, [x20, 24]
 	mov	x2, 0
 	ldr	w0, [x26, x24, lsl 2]
@@ -20299,37 +20045,37 @@ ftl_open_sblk_recovery:
 	mov	w0, 2
 	bl	ftl_debug_info_fill
 	cmn	w23, #1
-	bne	.L3122
-	b	.L3125
-.L3130:
+	bne	.L3107
+	b	.L3110
+.L3115:
 	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bls	.L3127
+	bls	.L3112
 	cmn	w23, #1
-	bne	.L3191
-	b	.L3127
-.L3138:
+	bne	.L3176
+	b	.L3112
+.L3123:
 	add	x0, x29, 240
 	ldr	w0, [x0, x28, lsl 2]
 	cmn	w0, #1
-	beq	.L3134
-	ldrb	w3, [x22, #:lo12:.LANCHOR131]
+	beq	.L3119
+	ldrb	w3, [x22, #:lo12:.LANCHOR68]
 	ldr	w0, [x26, x28, lsl 2]
 	ldr	x1, [x20, 8]
 	ldr	x2, [x20, 24]
 	bl	ftl_read_ppa_page
 	cmp	w0, 256
 	ccmn	w0, #1, 4, ne
-	bne	.L3134
+	bne	.L3119
 	add	x0, x29, 240
-	ldrb	w3, [x22, #:lo12:.LANCHOR131]
+	ldrb	w3, [x22, #:lo12:.LANCHOR68]
 	ldr	x1, [x20, 8]
 	ldr	x2, [x20, 24]
 	ldr	w0, [x0, x28, lsl 2]
 	bl	ftl_read_ppa_page
 	mov	w5, w0
 	ldr	w0, [x21, #:lo12:.LANCHOR19]
-	tbz	x0, 14, .L3136
+	tbz	x0, 14, .L3121
 	ldr	x0, [x20, 24]
 	mov	w1, w5
 	ldr	w3, [x26, x28, lsl 2]
@@ -20338,22 +20084,22 @@ ftl_open_sblk_recovery:
 	mov	x0, x23
 	bl	printf
 	ldr	w5, [x29, 168]
-.L3136:
+.L3121:
 	cmn	w5, #1
-	beq	.L3134
+	beq	.L3119
 	ldr	x0, [x20, 24]
 	ldr	w2, [x26, x28, lsl 2]
 	ldr	w1, [x0, 8]
 	cmp	w2, w1
-	bne	.L3134
+	bne	.L3119
 	ldr	w1, [x21, #:lo12:.LANCHOR19]
-	tbz	x1, 14, .L3137
+	tbz	x1, 14, .L3122
 	add	x1, x29, 304
 	ldr	w3, [x1, x28, lsl 2]
 	ldr	w1, [x0, 4]
 	mov	x0, x24
 	bl	printf
-.L3137:
+.L3122:
 	add	x1, x29, 304
 	ldr	x0, [x20, 24]
 	ldr	w1, [x1, x28, lsl 2]
@@ -20362,31 +20108,31 @@ ftl_open_sblk_recovery:
 	ldrh	w2, [x29, 168]
 	ldr	w0, [x0, 4]
 	bl	lpa_hash_update_ppa
-.L3134:
+.L3119:
 	add	x28, x28, 1
-	b	.L3132
-.L3110:
+	b	.L3117
+.L3095:
 	ldr	x3, [x20, 24]
-	adrp	x0, .LANCHOR128
-	ldr	w0, [x0, #:lo12:.LANCHOR128]
+	adrp	x0, .LANCHOR219
+	ldr	w0, [x0, #:lo12:.LANCHOR219]
 	ldr	w1, [x3, 4]
 	cmp	w1, w0
-	bcs	.L3107
+	bcs	.L3092
 	ldrb	w0, [x19, 9]
-	ldrh	w1, [x25, #:lo12:.LANCHOR94]
+	ldrh	w1, [x25, #:lo12:.LANCHOR100]
 	ldrh	w2, [x19, 10]
 	mul	w0, w0, w1
 	sub	w0, w0, #1
 	cmp	w2, w0
-	bge	.L3107
-	adrp	x0, .LANCHOR110
+	bge	.L3092
+	adrp	x0, .LANCHOR69
 	ldr	w1, [x3]
-	ldr	x0, [x0, #:lo12:.LANCHOR110]
+	ldr	x0, [x0, #:lo12:.LANCHOR69]
 	ldr	w4, [x0, 8]
 	cmp	w1, w4
-	bls	.L3111
+	bls	.L3096
 	str	w1, [x0, 8]
-.L3111:
+.L3096:
 	ldrh	w0, [x19, 12]
 	add	w2, w2, w0
 	ldp	w0, w1, [x3, 4]
@@ -20399,164 +20145,8 @@ ftl_open_sblk_recovery:
 	str	w0, [x29, 184]
 	ldr	w0, [x29, 160]
 	str	w0, [x29, 188]
-	b	.L3107
+	b	.L3092
 	.size	ftl_open_sblk_recovery, .-ftl_open_sblk_recovery
-	.section	.text.dump_ftl_info,"ax",@progbits
-	.align	2
-	.global	dump_ftl_info
-	.type	dump_ftl_info, %function
-dump_ftl_info:
-	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LANCHOR57
-	add	x29, sp, 0
-	ldrb	w1, [x0, #:lo12:.LANCHOR57]
-	adrp	x0, .LC192
-	stp	x19, x20, [sp, 16]
-	add	x0, x0, :lo12:.LC192
-	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR110
-	adrp	x19, .LANCHOR12
-	adrp	x20, .LANCHOR94
-	bl	printf
-	adrp	x21, .LANCHOR8
-	adrp	x0, .LANCHOR191
-	add	x1, x0, :lo12:.LANCHOR191
-	ldrh	w3, [x1, 2]
-	ldrb	w2, [x1, 1]
-	ldrb	w1, [x0, #:lo12:.LANCHOR191]
-	adrp	x0, .LC193
-	add	x0, x0, :lo12:.LC193
-	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR110]
-	ldrh	w2, [x0, 140]
-	ldrh	w1, [x0, 130]
-	adrp	x0, .LC194
-	add	x0, x0, :lo12:.LC194
-	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR12]
-	adrp	x0, .LC195
-	add	x0, x0, :lo12:.LC195
-	ldrh	w5, [x1, 26]
-	ldrh	w4, [x1, 22]
-	ldrb	w3, [x1, 21]
-	ldrh	w2, [x1, 18]
-	ldrh	w1, [x1, 16]
-	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR12]
-	adrp	x0, .LC196
-	add	x0, x0, :lo12:.LC196
-	ldrh	w5, [x1, 58]
-	ldrh	w4, [x1, 54]
-	ldrb	w3, [x1, 53]
-	ldrh	w2, [x1, 50]
-	ldrh	w1, [x1, 48]
-	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR12]
-	adrp	x19, .LANCHOR79
-	adrp	x0, .LC197
-	add	x0, x0, :lo12:.LC197
-	ldrh	w5, [x1, 90]
-	ldrh	w4, [x1, 86]
-	ldrb	w3, [x1, 85]
-	ldrh	w2, [x1, 82]
-	ldrh	w1, [x1, 80]
-	bl	printf
-	ldrb	w0, [x19, #:lo12:.LANCHOR79]
-	mov	w2, 4
-	ldrh	w3, [x20, #:lo12:.LANCHOR94]
-	mul	w3, w3, w0
-	adrp	x0, .LANCHOR117
-	ldr	x1, [x0, #:lo12:.LANCHOR117]
-	adrp	x0, .LC198
-	lsl	w3, w3, 1
-	add	x0, x0, :lo12:.LC198
-	bl	rknand_print_hex
-	adrp	x0, .LANCHOR11
-	ldrh	w3, [x21, #:lo12:.LANCHOR8]
-	mov	w2, 2
-	ldr	x1, [x0, #:lo12:.LANCHOR11]
-	adrp	x0, .LC199
-	add	x0, x0, :lo12:.LC199
-	bl	rknand_print_hex
-	ldr	x1, [x22, #:lo12:.LANCHOR110]
-	mov	w2, 4
-	adrp	x0, .LC179
-	add	x0, x0, :lo12:.LC179
-	add	x1, x1, 704
-	ldrh	w3, [x1, -6]
-	bl	rknand_print_hex
-	adrp	x0, .LANCHOR9
-	ldrh	w3, [x21, #:lo12:.LANCHOR8]
-	mov	w2, 4
-	ldr	x1, [x0, #:lo12:.LANCHOR9]
-	adrp	x0, .LC200
-	add	x0, x0, :lo12:.LC200
-	bl	rknand_print_hex
-	mov	w3, 256
-	mov	w2, 2
-	adrp	x1, .LANCHOR116
-	adrp	x0, .LC201
-	add	x1, x1, :lo12:.LANCHOR116
-	add	x0, x0, :lo12:.LC201
-	bl	rknand_print_hex
-	ldrb	w0, [x19, #:lo12:.LANCHOR79]
-	mov	w2, 2
-	ldrh	w3, [x20, #:lo12:.LANCHOR94]
-	ldp	x21, x22, [sp, 32]
-	ldp	x19, x20, [sp, 16]
-	mul	w3, w3, w0
-	adrp	x0, .LANCHOR118
-	ldp	x29, x30, [sp], 48
-	lsl	w3, w3, 1
-	ldr	x1, [x0, #:lo12:.LANCHOR118]
-	adrp	x0, .LC202
-	add	x0, x0, :lo12:.LC202
-	b	rknand_print_hex
-	.size	dump_ftl_info, .-dump_ftl_info
-	.section	.text.pm_ppa_update_check,"ax",@progbits
-	.align	2
-	.global	pm_ppa_update_check
-	.type	pm_ppa_update_check, %function
-pm_ppa_update_check:
-	adrp	x4, .LANCHOR31
-	adrp	x3, .LANCHOR74
-	mov	w5, 24
-	ldrb	w4, [x4, #:lo12:.LANCHOR31]
-	ldrh	w3, [x3, #:lo12:.LANCHOR74]
-	sub	w4, w5, w4
-	sub	w5, w4, w3
-	mov	w4, 1
-	lsr	w3, w2, w3
-	lsl	w4, w4, w5
-	sub	w4, w4, #1
-	and	w4, w4, w3
-	adrp	x3, .LANCHOR75
-	ldrb	w3, [x3, #:lo12:.LANCHOR75]
-	udiv	w4, w4, w3
-	adrp	x3, .LANCHOR9
-	ldr	x3, [x3, #:lo12:.LANCHOR9]
-	add	x4, x3, x4, uxth 2
-	ldrb	w3, [x4, 2]
-	ubfx	x3, x3, 5, 3
-	cmp	w3, 1
-	ccmp	w3, 7, 4, ne
-	bne	.L3223
-	mov	w3, w2
-	mov	w2, w1
-	mov	x1, x0
-	stp	x29, x30, [sp, -16]!
-	adrp	x0, .LC203
-	add	x0, x0, :lo12:.LC203
-	add	x29, sp, 0
-	bl	printf
-	bl	dump_ftl_info
-	mov	w0, -1
-	ldp	x29, x30, [sp], 16
-	ret
-.L3223:
-	mov	w0, 0
-	ret
-	.size	pm_ppa_update_check, .-pm_ppa_update_check
 	.section	.text.load_l2p_region,"ax",@progbits
 	.align	2
 	.type	load_l2p_region, %function
@@ -20570,23 +20160,23 @@ load_l2p_region:
 	stp	x23, x24, [sp, 48]
 	cmp	w21, 7
 	stp	x25, x26, [sp, 64]
-	bls	.L3229
+	bls	.L3205
 	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
 	mov	w2, 32
 	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3229:
-	adrp	x20, .LANCHOR110
+.L3205:
+	adrp	x20, .LANCHOR69
 	mov	x25, x20
-	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	ldr	x0, [x20, #:lo12:.LANCHOR69]
 	ldrh	w2, [x0, 698]
 	cmp	w2, w19
-	bcs	.L3230
+	bcs	.L3206
 	mov	w1, w19
-	adrp	x0, .LC204
-	add	x0, x0, :lo12:.LC204
+	adrp	x0, .LC184
+	add	x0, x0, :lo12:.LC184
 	bl	printf
 	adrp	x0, .LANCHOR221
 	mov	w1, 255
@@ -20594,122 +20184,122 @@ load_l2p_region:
 	mov	x0, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	ldr	x0, [x20, #:lo12:.LANCHOR69]
 	ldrh	w0, [x0, 698]
 	cmp	w0, w19
-	bcc	.L3231
-.L3241:
+	bcc	.L3207
+.L3217:
 	mov	w0, 0
-.L3228:
+.L3204:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L3231:
+.L3207:
 	mov	w2, 37
-.L3242:
+.L3218:
 	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3241
-.L3230:
+	b	.L3217
+.L3206:
 	add	x0, x0, x19, sxtw 2
-	adrp	x22, .LANCHOR135
-	add	x1, x22, :lo12:.LANCHOR135
+	adrp	x22, .LANCHOR136
+	add	x1, x22, :lo12:.LANCHOR136
 	ldr	w23, [x0, 704]
 	lsl	x0, x21, 4
 	add	x26, x1, x0
 	strh	w19, [x1, x0]
 	strh	wzr, [x26, 2]
-	cbnz	w23, .L3233
+	cbnz	w23, .L3209
 	mov	w1, w19
 	mov	w2, 0
-	adrp	x0, .LC205
-	add	x0, x0, :lo12:.LC205
+	adrp	x0, .LC185
+	add	x0, x0, :lo12:.LC185
 	bl	printf
 	adrp	x0, .LANCHOR221
 	mov	w1, 255
 	ldrh	w2, [x0, #:lo12:.LANCHOR221]
 	ldr	x0, [x26, 8]
 	bl	ftl_memset
-	b	.L3241
-.L3233:
-	adrp	x20, .LANCHOR207
-	adrp	x24, .LANCHOR131
+	b	.L3217
+.L3209:
+	adrp	x20, .LANCHOR206
+	adrp	x24, .LANCHOR68
 	ldr	x1, [x26, 8]
 	mov	w0, w23
-	ldr	x2, [x20, #:lo12:.LANCHOR207]
-	ldrb	w3, [x24, #:lo12:.LANCHOR131]
+	ldr	x2, [x20, #:lo12:.LANCHOR206]
+	ldrb	w3, [x24, #:lo12:.LANCHOR68]
 	bl	ftl_read_ppa_page
-	ldr	x1, [x20, #:lo12:.LANCHOR207]
+	ldr	x1, [x20, #:lo12:.LANCHOR206]
 	ldr	w2, [x1]
 	cmp	w2, w19
-	bne	.L3234
+	bne	.L3210
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L3234
-.L3238:
-	ldr	x0, [x20, #:lo12:.LANCHOR207]
+	beq	.L3210
+.L3214:
+	ldr	x0, [x20, #:lo12:.LANCHOR206]
 	ldr	w0, [x0]
 	cmp	w19, w0
-	beq	.L3241
+	beq	.L3217
 	mov	w2, 73
-	b	.L3242
-.L3234:
+	b	.L3218
+.L3210:
 	mov	w4, w23
 	mov	w3, w0
 	mov	w1, w19
-	adrp	x0, .LC206
-	add	x0, x0, :lo12:.LC206
+	adrp	x0, .LC186
+	add	x0, x0, :lo12:.LC186
 	bl	printf
-	ldr	x1, [x25, #:lo12:.LANCHOR110]
-	add	x22, x22, :lo12:.LANCHOR135
+	ldr	x1, [x25, #:lo12:.LANCHOR69]
+	add	x22, x22, :lo12:.LANCHOR136
 	add	x21, x22, x21, lsl 4
 	mov	w2, 4
 	add	x1, x1, 704
-	adrp	x0, .LC207
-	add	x0, x0, :lo12:.LC207
+	adrp	x0, .LC187
+	add	x0, x0, :lo12:.LC187
 	ldrh	w3, [x1, -6]
 	bl	rknand_print_hex
 	ldr	x1, [x21, 8]
 	mov	w2, 4
-	ldrb	w3, [x24, #:lo12:.LANCHOR131]
-	adrp	x0, .LC186
-	add	x0, x0, :lo12:.LC186
+	ldrb	w3, [x24, #:lo12:.LANCHOR68]
+	adrp	x0, .LC178
+	add	x0, x0, :lo12:.LC178
 	lsl	w3, w3, 7
 	bl	rknand_print_hex
-	ldr	x1, [x20, #:lo12:.LANCHOR207]
+	ldr	x1, [x20, #:lo12:.LANCHOR206]
 	mov	w3, 16
 	mov	w2, 4
-	adrp	x0, .LC208
-	add	x0, x0, :lo12:.LC208
+	adrp	x0, .LC188
+	add	x0, x0, :lo12:.LC188
 	bl	rknand_print_hex
-	ldrb	w3, [x24, #:lo12:.LANCHOR131]
+	ldrb	w3, [x24, #:lo12:.LANCHOR68]
 	mov	w0, w23
-	ldr	x2, [x20, #:lo12:.LANCHOR207]
+	ldr	x2, [x20, #:lo12:.LANCHOR206]
 	ldr	x1, [x21, 8]
 	bl	ftl_read_ppa_page
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3237
+	bne	.L3213
 	adrp	x0, .LANCHOR221
 	mov	w1, 255
 	ldrh	w2, [x0, #:lo12:.LANCHOR221]
 	ldr	x0, [x21, 8]
 	bl	ftl_memset
-.L3239:
+.L3215:
 	mov	w0, -1
-	b	.L3228
-.L3237:
-	ldr	x0, [x20, #:lo12:.LANCHOR207]
+	b	.L3204
+.L3213:
+	ldr	x0, [x20, #:lo12:.LANCHOR206]
 	ldr	w0, [x0]
 	cmp	w19, w0
-	beq	.L3238
-	b	.L3239
+	beq	.L3214
+	b	.L3215
 	.size	load_l2p_region, .-load_l2p_region
 	.section	.text.pm_gc,"ax",@progbits
 	.align	2
@@ -20719,39 +20309,39 @@ pm_gc:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR110
+	adrp	x19, .LANCHOR69
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR148
-	ldr	x0, [x19, #:lo12:.LANCHOR110]
+	adrp	x21, .LANCHOR149
+	ldr	x0, [x19, #:lo12:.LANCHOR69]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	ldrh	w2, [x0, 688]
-	adrp	x0, .LANCHOR152
+	adrp	x0, .LANCHOR153
 	str	x27, [sp, 80]
 	mov	x20, x0
-	ldrh	w1, [x0, #:lo12:.LANCHOR152]
+	ldrh	w1, [x0, #:lo12:.LANCHOR153]
 	sub	w1, w1, #1
 	cmp	w2, w1
-	bge	.L3244
-	ldr	w0, [x21, #:lo12:.LANCHOR148]
-	cbz	w0, .L3245
-.L3244:
+	bge	.L3220
+	ldr	w0, [x21, #:lo12:.LANCHOR149]
+	cbz	w0, .L3221
+.L3220:
 	bl	pm_free_sblk
-	ldr	x2, [x19, #:lo12:.LANCHOR110]
-	ldrh	w1, [x20, #:lo12:.LANCHOR152]
+	ldr	x2, [x19, #:lo12:.LANCHOR69]
+	ldrh	w1, [x20, #:lo12:.LANCHOR153]
 	sub	w1, w1, #1
 	ldrh	w3, [x2, 688]
 	cmp	w3, w1
-	bge	.L3246
-	ldr	w1, [x21, #:lo12:.LANCHOR148]
-	cbz	w1, .L3245
-.L3246:
+	bge	.L3222
+	ldr	w1, [x21, #:lo12:.LANCHOR149]
+	cbz	w1, .L3221
+.L3222:
 	add	x0, x2, x0, uxth 1
-	str	wzr, [x21, #:lo12:.LANCHOR148]
+	str	wzr, [x21, #:lo12:.LANCHOR149]
 	mov	w20, 65535
 	ldrh	w21, [x0, 416]
 	cmp	w21, w20
-	bne	.L3248
+	bne	.L3224
 	adrp	x1, .LANCHOR222
 	add	x1, x1, :lo12:.LANCHOR222
 	mov	w2, 182
@@ -20759,45 +20349,45 @@ pm_gc:
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	bl	pm_free_sblk
-	ldr	x1, [x19, #:lo12:.LANCHOR110]
+	ldr	x1, [x19, #:lo12:.LANCHOR69]
 	add	x0, x1, x0, uxth 1
 	ldrh	w21, [x0, 416]
 	cmp	w21, w20
-	beq	.L3245
-.L3248:
+	beq	.L3221
+.L3224:
 	bl	pm_select_ram_region
 	and	x22, x0, 65535
 	lsl	x0, x22, 4
-	adrp	x20, .LANCHOR135
-	add	x1, x20, :lo12:.LANCHOR135
+	adrp	x20, .LANCHOR136
+	add	x1, x20, :lo12:.LANCHOR136
 	mov	x25, x22
 	add	x23, x1, x0
 	ldrh	w0, [x1, x0]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3249
+	beq	.L3225
 	ldr	x1, [x23, 8]
-	cbz	x1, .L3249
+	cbz	x1, .L3225
 	ldrsh	w2, [x23, 2]
-	tbz	w2, #31, .L3249
+	tbz	w2, #31, .L3225
 	bl	pm_write_page
 	ldrh	w0, [x23, 2]
 	and	w0, w0, 32767
 	strh	w0, [x23, 2]
-.L3249:
-	adrp	x23, .LANCHOR74
+.L3225:
+	adrp	x23, .LANCHOR80
 	adrp	x24, .LANCHOR31
-	add	x23, x23, :lo12:.LANCHOR74
+	add	x23, x23, :lo12:.LANCHOR80
 	add	x24, x24, :lo12:.LANCHOR31
 	mov	w27, 0
 	mov	w26, 24
-.L3250:
-	ldr	x2, [x19, #:lo12:.LANCHOR110]
+.L3226:
+	ldr	x2, [x19, #:lo12:.LANCHOR69]
 	ldrh	w0, [x2, 698]
 	cmp	w0, w27
-	bhi	.L3253
+	bhi	.L3229
 	bl	pm_free_sblk
-.L3245:
+.L3221:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -20806,7 +20396,7 @@ pm_gc:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L3253:
+.L3229:
 	ldrb	w0, [x24]
 	add	x2, x2, x27, sxtw 2
 	ldrh	w3, [x23]
@@ -20818,29 +20408,29 @@ pm_gc:
 	sub	w0, w0, #1
 	lsr	w1, w1, w3
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR75
-	ldrb	w1, [x1, #:lo12:.LANCHOR75]
+	adrp	x1, .LANCHOR81
+	ldrb	w1, [x1, #:lo12:.LANCHOR81]
 	udiv	w0, w0, w1
 	cmp	w21, w0, uxth
-	bne	.L3251
+	bne	.L3227
 	mov	w1, w25
 	mov	w0, w27
 	bl	load_l2p_region
-	cbnz	w0, .L3252
-	add	x0, x20, :lo12:.LANCHOR135
+	cbnz	w0, .L3228
+	add	x0, x20, :lo12:.LANCHOR136
 	add	x0, x0, x22, lsl 4
 	ldr	x1, [x0, 8]
 	mov	w0, w27
 	bl	pm_write_page
-.L3252:
-	add	x1, x20, :lo12:.LANCHOR135
+.L3228:
+	add	x1, x20, :lo12:.LANCHOR136
 	lsl	x0, x22, 4
 	mov	w2, -1
 	strh	w2, [x1, x0]
-.L3251:
+.L3227:
 	add	w27, w27, 1
 	and	w27, w27, 65535
-	b	.L3250
+	b	.L3226
 	.size	pm_gc, .-pm_gc
 	.section	.text.pm_flush_id,"ax",@progbits
 	.align	2
@@ -20849,8 +20439,8 @@ pm_gc:
 pm_flush_id:
 	stp	x29, x30, [sp, -32]!
 	ubfiz	x0, x0, 4, 16
-	adrp	x2, .LANCHOR135
-	add	x2, x2, :lo12:.LANCHOR135
+	adrp	x2, .LANCHOR136
+	add	x2, x2, :lo12:.LANCHOR136
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	add	x19, x2, x0
@@ -20860,12 +20450,12 @@ pm_flush_id:
 	ldrh	w0, [x19, 2]
 	and	w0, w0, 32767
 	strh	w0, [x19, 2]
-	adrp	x19, .LANCHOR204
-	ldr	w0, [x19, #:lo12:.LANCHOR204]
-	cbz	w0, .L3262
+	adrp	x19, .LANCHOR134
+	ldr	w0, [x19, #:lo12:.LANCHOR134]
+	cbz	w0, .L3238
 	bl	pm_gc
-	str	wzr, [x19, #:lo12:.LANCHOR204]
-.L3262:
+	str	wzr, [x19, #:lo12:.LANCHOR134]
+.L3238:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -20879,21 +20469,21 @@ pm_flush:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR135
-	add	x19, x19, :lo12:.LANCHOR135
+	adrp	x19, .LANCHOR136
+	add	x19, x19, :lo12:.LANCHOR136
 	mov	w20, 0
 	add	x19, x19, 2
-.L3269:
+.L3245:
 	ldrsh	w0, [x19]
-	tbz	w0, #31, .L3268
+	tbz	w0, #31, .L3244
 	mov	w0, w20
 	bl	pm_flush_id
-.L3268:
+.L3244:
 	add	w20, w20, 1
 	add	x19, x19, 16
 	and	w20, w20, 65535
 	cmp	w20, 8
-	bne	.L3269
+	bne	.L3245
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -20942,81 +20532,81 @@ pm_init:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	mov	w24, w0
-	adrp	x0, .LANCHOR148
+	adrp	x0, .LANCHOR149
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	adrp	x19, .LANCHOR135
-	str	wzr, [x0, #:lo12:.LANCHOR148]
-	adrp	x0, .LANCHOR204
+	adrp	x19, .LANCHOR136
+	str	wzr, [x0, #:lo12:.LANCHOR149]
+	adrp	x0, .LANCHOR134
 	stp	x25, x26, [sp, 64]
-	add	x20, x19, :lo12:.LANCHOR135
-	str	wzr, [x0, #:lo12:.LANCHOR204]
-	adrp	x0, .LANCHOR208
+	add	x20, x19, :lo12:.LANCHOR136
+	str	wzr, [x0, #:lo12:.LANCHOR134]
+	adrp	x0, .LANCHOR207
 	stp	x27, x28, [sp, 80]
-	adrp	x22, .LANCHOR131
-	strb	w1, [x0, #:lo12:.LANCHOR208]
+	adrp	x22, .LANCHOR68
+	strb	w1, [x0, #:lo12:.LANCHOR207]
 	mov	w0, 64
 	bl	ftl_malloc
 	add	x23, x20, 128
-	adrp	x1, .LANCHOR207
-	add	x22, x22, :lo12:.LANCHOR131
+	adrp	x1, .LANCHOR206
+	add	x22, x22, :lo12:.LANCHOR68
 	mov	x21, x1
 	mov	w25, -1
-	str	x0, [x1, #:lo12:.LANCHOR207]
-.L3279:
+	str	x0, [x1, #:lo12:.LANCHOR206]
+.L3255:
 	strh	w25, [x20]
 	strh	wzr, [x20, 2]
-	cbz	w24, .L3278
+	cbz	w24, .L3254
 	ldrb	w0, [x22]
 	lsl	w0, w0, 9
 	bl	ftl_malloc
 	str	x0, [x20, 8]
-.L3278:
+.L3254:
 	add	x20, x20, 16
 	cmp	x20, x23
-	bne	.L3279
-	add	x0, x19, :lo12:.LANCHOR135
-	adrp	x20, .LANCHOR110
-	ldr	x22, [x21, #:lo12:.LANCHOR207]
+	bne	.L3255
+	add	x0, x19, :lo12:.LANCHOR136
+	adrp	x20, .LANCHOR69
+	ldr	x22, [x21, #:lo12:.LANCHOR206]
 	mov	w4, 4
 	ldr	x27, [x0, 8]
 	mov	x3, x22
-	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	ldr	x0, [x20, #:lo12:.LANCHOR69]
 	mov	x2, x27
 	ldrh	w1, [x0, 692]
 	ldrb	w0, [x0, 694]
 	bl	flash_get_last_written_page
 	sxth	w26, w0
-	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	ldr	x0, [x20, #:lo12:.LANCHOR69]
 	mov	w24, w26
 	ldrh	w2, [x0, 696]
 	cmp	w2, w26
-	bgt	.L3280
+	bgt	.L3256
 	ldrh	w1, [x0, 692]
 	mov	w3, w26
-	adrp	x0, .LC209
-	add	x0, x0, :lo12:.LC209
-	adrp	x25, .LANCHOR131
-	add	x25, x25, :lo12:.LANCHOR131
-	adrp	x28, .LC210
+	adrp	x0, .LC189
+	add	x0, x0, :lo12:.LC189
+	adrp	x25, .LANCHOR68
+	add	x25, x25, :lo12:.LANCHOR68
+	adrp	x28, .LC190
 	bl	printf
-	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	ldr	x0, [x20, #:lo12:.LANCHOR69]
 	ldrsh	w21, [x0, 696]
-	adrp	x0, .LANCHOR111
-	add	x0, x0, :lo12:.LANCHOR111
+	adrp	x0, .LANCHOR117
+	add	x0, x0, :lo12:.LANCHOR117
 	str	x0, [x29, 104]
-.L3281:
+.L3257:
 	cmp	w21, w26
-	ble	.L3284
-	adrp	x0, .LANCHOR195
+	ble	.L3260
+	adrp	x0, .LANCHOR197
 	mov	w1, 1
 	add	w24, w24, 1
-	strb	w1, [x0, #:lo12:.LANCHOR195]
-	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	strb	w1, [x0, #:lo12:.LANCHOR197]
+	ldr	x0, [x20, #:lo12:.LANCHOR69]
 	strh	w24, [x0, 696]
 	bl	pm_free_sblk
-.L3280:
-	add	x19, x19, :lo12:.LANCHOR135
+.L3256:
+	add	x19, x19, :lo12:.LANCHOR136
 	adrp	x0, .LANCHOR221
 	mov	w1, 255
 	ldrh	w2, [x0, #:lo12:.LANCHOR221]
@@ -21025,9 +20615,9 @@ pm_init:
 	ldr	x1, [x19, 8]
 	mov	w0, -1
 	bl	pm_write_page
-	adrp	x0, .LANCHOR195
-	ldrb	w0, [x0, #:lo12:.LANCHOR195]
-	cbz	w0, .L3285
+	adrp	x0, .LANCHOR197
+	ldrb	w0, [x0, #:lo12:.LANCHOR197]
+	cbz	w0, .L3261
 	ldr	x1, [x19, 8]
 	mov	w0, -1
 	bl	pm_write_page
@@ -21037,7 +20627,7 @@ pm_init:
 	ldr	x1, [x19, 8]
 	mov	w0, -1
 	bl	pm_write_page
-.L3285:
+.L3261:
 	bl	pm_free_sblk
 	bl	pm_gc
 	mov	w0, 0
@@ -21048,8 +20638,8 @@ pm_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L3284:
-	ldr	x0, [x20, #:lo12:.LANCHOR110]
+.L3260:
+	ldr	x0, [x20, #:lo12:.LANCHOR69]
 	mov	x3, x22
 	ldr	x1, [x29, 104]
 	mov	x2, x27
@@ -21061,45 +20651,45 @@ pm_init:
 	mov	w1, w23
 	bl	flash_read_page_en
 	mov	w4, w0
-	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	ldr	x0, [x20, #:lo12:.LANCHOR69]
 	str	w4, [x29, 100]
 	mov	w2, w23
 	ldr	w1, [x0, 48]
 	ldrh	w3, [x0, 694]
 	add	w1, w1, 1
 	str	w1, [x0, 48]
-	add	x0, x28, :lo12:.LC210
+	add	x0, x28, :lo12:.LC190
 	ldr	w1, [x22]
 	bl	printf
 	ldr	w4, [x29, 100]
 	cmp	w4, 512
 	ccmn	w4, #1, 4, ne
-	beq	.L3282
-	ldr	x8, [x20, #:lo12:.LANCHOR110]
+	beq	.L3258
+	ldr	x8, [x20, #:lo12:.LANCHOR69]
 	ldr	w6, [x22]
 	ldrh	w0, [x8, 698]
 	cmp	w6, w0
-	bcs	.L3282
+	bcs	.L3258
 	ldr	w7, [x22, 8]
-	cbz	w7, .L3283
+	cbz	w7, .L3259
 	ldrb	w1, [x25]
 	mov	x0, x27
 	lsl	w1, w1, 9
 	bl	js_hash
 	cmp	w7, w0
-	beq	.L3283
-	adrp	x0, .LC211
+	beq	.L3259
+	adrp	x0, .LC191
 	mov	w1, w7
-	add	x0, x0, :lo12:.LC211
+	add	x0, x0, :lo12:.LC191
 	bl	printf
-.L3282:
+.L3258:
 	add	w21, w21, 1
 	sxth	w21, w21
-	b	.L3281
-.L3283:
+	b	.L3257
+.L3259:
 	add	x6, x8, x6, uxtw 2
 	str	w23, [x6, 704]
-	b	.L3282
+	b	.L3258
 	.size	pm_init, .-pm_init
 	.section	.text.pm_log2phys,"ax",@progbits
 	.align	2
@@ -21110,24 +20700,24 @@ pm_log2phys:
 	add	x29, sp, 0
 	stp	x25, x26, [sp, 64]
 	mov	w25, w0
-	adrp	x0, .LANCHOR128
+	adrp	x0, .LANCHOR219
 	stp	x23, x24, [sp, 48]
 	stp	x19, x20, [sp, 16]
 	mov	w24, w2
 	stp	x21, x22, [sp, 32]
 	mov	x23, x1
-	ldr	w2, [x0, #:lo12:.LANCHOR128]
+	ldr	w2, [x0, #:lo12:.LANCHOR219]
 	str	x27, [sp, 80]
 	cmp	w25, w2
-	bcc	.L3301
+	bcc	.L3277
 	mov	w1, w25
-	adrp	x0, .LC212
-	add	x0, x0, :lo12:.LC212
+	adrp	x0, .LC192
+	add	x0, x0, :lo12:.LC192
 	bl	printf
 	mov	w0, -1
-	cbnz	w24, .L3300
+	cbnz	w24, .L3276
 	str	w0, [x23]
-.L3300:
+.L3276:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -21135,28 +20725,28 @@ pm_log2phys:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L3301:
-	adrp	x0, .LANCHOR131
-	adrp	x21, .LANCHOR135
+.L3277:
+	adrp	x0, .LANCHOR68
+	adrp	x21, .LANCHOR136
 	mov	x19, 0
-	ldrb	w20, [x0, #:lo12:.LANCHOR131]
-	add	x0, x21, :lo12:.LANCHOR135
+	ldrb	w20, [x0, #:lo12:.LANCHOR68]
+	add	x0, x21, :lo12:.LANCHOR136
 	add	x0, x0, 8
 	lsl	w22, w20, 7
 	udiv	w22, w25, w22
 	and	w26, w22, 65535
-.L3307:
+.L3283:
 	ldr	x1, [x0]
-	cbz	x1, .L3303
+	cbz	x1, .L3279
 	ldrh	w1, [x0, -8]
 	cmp	w1, w26
-	bne	.L3303
-.L3304:
+	bne	.L3279
+.L3280:
 	ubfiz	w20, w20, 7, 9
 	msub	w25, w26, w20, w25
 	and	x25, x25, 65535
-	cbnz	w24, .L3305
-	add	x0, x21, :lo12:.LANCHOR135
+	cbnz	w24, .L3281
+	add	x0, x21, :lo12:.LANCHOR136
 	adrp	x1, .LANCHOR31
 	add	x0, x0, x19, lsl 4
 	mov	w2, 24
@@ -21170,26 +20760,26 @@ pm_log2phys:
 	sub	w1, w1, #1
 	lsr	w0, w0, w2
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR112
-	ldrb	w1, [x1, #:lo12:.LANCHOR112]
+	adrp	x1, .LANCHOR118
+	ldrb	w1, [x1, #:lo12:.LANCHOR118]
 	cmp	w0, w1
-	bcc	.L3306
+	bcc	.L3282
 	mov	w0, -1
 	str	w0, [x23]
-.L3306:
-	add	x21, x21, :lo12:.LANCHOR135
+.L3282:
+	add	x21, x21, :lo12:.LANCHOR136
 	add	x19, x21, x19, lsl 4
 	ldrh	w0, [x19, 2]
 	mvn	x1, x0
 	tst	x1, 32767
-	beq	.L3310
+	beq	.L3286
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L3310:
+.L3286:
 	mov	w0, 0
-	b	.L3300
-.L3305:
-	add	x0, x21, :lo12:.LANCHOR135
+	b	.L3276
+.L3281:
+	add	x0, x21, :lo12:.LANCHOR136
 	ldr	w2, [x23]
 	add	x0, x0, x19, lsl 4
 	ldr	x1, [x0, 8]
@@ -21197,35 +20787,35 @@ pm_log2phys:
 	ldrh	w1, [x0, 2]
 	orr	w1, w1, -32768
 	strh	w1, [x0, 2]
-	adrp	x0, .LANCHOR136
-	strb	w22, [x0, #:lo12:.LANCHOR136]
-	b	.L3306
-.L3303:
+	adrp	x0, .LANCHOR137
+	strb	w22, [x0, #:lo12:.LANCHOR137]
+	b	.L3282
+.L3279:
 	add	w19, w19, 1
 	add	x0, x0, 16
 	and	x19, x19, 65535
 	cmp	w19, 8
-	bne	.L3307
+	bne	.L3283
 	bl	pm_select_ram_region
 	and	x19, x0, 65535
 	sbfiz	x1, x19, 4, 32
-	add	x2, x21, :lo12:.LANCHOR135
+	add	x2, x21, :lo12:.LANCHOR136
 	add	x3, x2, x1
 	mov	w27, w0
 	ldrh	w2, [x2, x1]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L3308
+	beq	.L3284
 	ldrsh	w1, [x3, 2]
-	tbz	w1, #31, .L3308
+	tbz	w1, #31, .L3284
 	bl	pm_flush_id
-.L3308:
+.L3284:
 	adrp	x0, .LANCHOR223
 	mov	w1, w27
 	strb	w19, [x0, #:lo12:.LANCHOR223]
 	mov	w0, w26
 	bl	load_l2p_region
-	b	.L3304
+	b	.L3280
 	.size	pm_log2phys, .-pm_log2phys
 	.section	.text.gc_recovery,"ax",@progbits
 	.align	2
@@ -21234,17 +20824,17 @@ pm_log2phys:
 gc_recovery:
 	sub	sp, sp, #240
 	adrp	x0, .LANCHOR12
-	adrp	x1, .LANCHOR84
+	adrp	x1, .LANCHOR90
 	mov	w2, 65535
 	stp	x29, x30, [sp, 32]
 	add	x29, sp, 32
 	stp	x23, x24, [sp, 80]
 	ldr	x23, [x0, #:lo12:.LANCHOR12]
-	strb	wzr, [x1, #:lo12:.LANCHOR84]
-	adrp	x1, .LANCHOR156
+	strb	wzr, [x1, #:lo12:.LANCHOR90]
+	adrp	x1, .LANCHOR157
 	stp	x25, x26, [sp, 96]
 	mov	x26, x0
-	strb	wzr, [x1, #:lo12:.LANCHOR156]
+	strb	wzr, [x1, #:lo12:.LANCHOR157]
 	add	x1, x23, 80
 	stp	x19, x20, [sp, 48]
 	str	x1, [x29, 168]
@@ -21252,7 +20842,7 @@ gc_recovery:
 	ldrh	w1, [x23, 80]
 	stp	x27, x28, [sp, 112]
 	cmp	w1, w2
-	beq	.L3317
+	beq	.L3293
 	mov	w0, -1
 	strh	w0, [x23, 130]
 	mov	w0, 1
@@ -21260,47 +20850,47 @@ gc_recovery:
 	mov	x27, x0
 	ldrb	w0, [x23, 89]
 	add	x1, x23, 80
-	adrp	x3, .LANCHOR111
+	adrp	x3, .LANCHOR117
 	str	x3, [x29, 152]
 	sub	w0, w0, #1
 	add	x0, x1, x0, sxtw 1
-	ldrh	w1, [x3, #:lo12:.LANCHOR111]
+	ldrh	w1, [x3, #:lo12:.LANCHOR117]
 	ldrh	w0, [x0, 16]
 	mul	w1, w0, w1
-	adrp	x0, .LANCHOR78
+	adrp	x0, .LANCHOR84
 	str	w1, [x29, 200]
-	ldrb	w2, [x0, #:lo12:.LANCHOR78]
+	ldrb	w2, [x0, #:lo12:.LANCHOR84]
 	str	x0, [x29, 176]
 	cmp	w2, 2
-	beq	.L3318
+	beq	.L3294
 	adrp	x0, .LANCHOR35
 	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbnz	w0, .L3318
+	cbnz	w0, .L3294
 	adrp	x0, .LANCHOR36
 	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbz	w0, .L3319
-.L3318:
-	adrp	x0, .LANCHOR85
-	ldrh	w0, [x0, #:lo12:.LANCHOR85]
+	cbz	w0, .L3295
+.L3294:
+	adrp	x0, .LANCHOR91
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	sub	w0, w0, #1
 	add	w0, w0, w1
 	orr	w2, w0, w2, lsl 24
 	str	w2, [x27, 40]
-.L3320:
+.L3296:
 	mov	w1, 1
 	mov	x0, x27
 	bl	sblk_read_page
 	ldr	w0, [x27, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L3321
+	beq	.L3297
 	ldr	x0, [x27, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L3322
-.L3321:
+	beq	.L3298
+.L3297:
 	mov	x0, x27
 	bl	zbuf_free
 	ldr	x1, [x27, 24]
@@ -21313,13 +20903,13 @@ gc_recovery:
 	str	w2, [sp]
 	ldp	w3, w4, [x0]
 	ldp	w5, w6, [x0, 8]
-	adrp	x0, .LC213
+	adrp	x0, .LC193
 	ldr	w7, [x1]
-	add	x0, x0, :lo12:.LC213
+	add	x0, x0, :lo12:.LC193
 	ldr	w1, [x27, 40]
 	ldr	w2, [x27, 52]
 	bl	printf
-.L3411:
+.L3387:
 	adrp	x0, .LANCHOR11
 	ldrh	w1, [x23, 80]
 	mov	w25, 0
@@ -21328,19 +20918,19 @@ gc_recovery:
 	ldr	x0, [x26, #:lo12:.LANCHOR12]
 	ldrh	w1, [x23, 80]
 	strh	w1, [x0, 130]
-.L3323:
+.L3299:
 	ldrh	w0, [x23, 80]
 	adrp	x2, .LANCHOR11
 	ldr	x2, [x2, #:lo12:.LANCHOR11]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L3367
+	cbnz	w1, .L3343
 	bl	ftl_dump_write_open_sblk
-.L3367:
+.L3343:
 	ldrh	w1, [x23, 80]
 	mov	w2, w25
-	adrp	x0, .LC215
-	add	x0, x0, :lo12:.LC215
+	adrp	x0, .LC195
+	add	x0, x0, :lo12:.LC195
 	bl	printf
 	mov	w0, -1
 	strh	w0, [x23, 80]
@@ -21350,31 +20940,31 @@ gc_recovery:
 	mov	w1, 65535
 	ldrh	w0, [x0, 130]
 	cmp	w0, w1
-	beq	.L3368
+	beq	.L3344
 	adrp	x1, .LANCHOR8
 	ldrh	w1, [x1, #:lo12:.LANCHOR8]
 	cmp	w1, w0
-	bhi	.L3369
+	bhi	.L3345
 	adrp	x1, .LANCHOR225
 	adrp	x0, .LC0
 	mov	w2, 517
 	add	x1, x1, :lo12:.LANCHOR225
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3369:
+.L3345:
 	ldr	x0, [x26, #:lo12:.LANCHOR12]
 	ldrh	w0, [x0, 130]
 	bl	ftl_free_sblk
-.L3368:
-	adrp	x0, .LANCHOR110
-	ldr	x1, [x0, #:lo12:.LANCHOR110]
+.L3344:
+	adrp	x0, .LANCHOR69
+	ldr	x1, [x0, #:lo12:.LANCHOR69]
 	mov	w0, -1
 	strh	w0, [x1, 126]
 	ldr	x1, [x26, #:lo12:.LANCHOR12]
 	strh	w0, [x1, 130]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L3316:
+.L3292:
 	ldp	x19, x20, [sp, 48]
 	ldp	x21, x22, [sp, 64]
 	ldp	x23, x24, [sp, 80]
@@ -21383,32 +20973,32 @@ gc_recovery:
 	ldp	x29, x30, [sp, 32]
 	add	sp, sp, 240
 	ret
-.L3319:
+.L3295:
 	cmp	w2, 3
-	bne	.L3320
-	adrp	x0, .LANCHOR94
-	ldrh	w0, [x0, #:lo12:.LANCHOR94]
+	bne	.L3296
+	adrp	x0, .LANCHOR100
+	ldrh	w0, [x0, #:lo12:.LANCHOR100]
 	sub	w0, w0, #1
 	add	w0, w0, w1
 	orr	w0, w0, 50331648
 	str	w0, [x27, 40]
-	b	.L3320
-.L3322:
+	b	.L3296
+.L3298:
 	adrp	x21, .LANCHOR224
-	adrp	x19, .LANCHOR85
-	adrp	x20, .LANCHOR79
-	adrp	x24, .LANCHOR159
+	adrp	x19, .LANCHOR91
+	adrp	x20, .LANCHOR85
+	adrp	x24, .LANCHOR160
 	ldrb	w0, [x21, #:lo12:.LANCHOR224]
 	cmp	w0, 2
-	bne	.L3324
+	bne	.L3300
 	ldr	x0, [x29, 176]
-	ldrb	w0, [x0, #:lo12:.LANCHOR78]
+	ldrb	w0, [x0, #:lo12:.LANCHOR84]
 	cmp	w0, 3
-	bne	.L3324
-	ldrh	w2, [x19, #:lo12:.LANCHOR85]
+	bne	.L3300
+	ldrh	w2, [x19, #:lo12:.LANCHOR91]
 	adrp	x22, .LANCHOR221
-	ldrb	w1, [x20, #:lo12:.LANCHOR79]
-	ldr	x3, [x24, #:lo12:.LANCHOR159]
+	ldrb	w1, [x20, #:lo12:.LANCHOR85]
+	ldr	x3, [x24, #:lo12:.LANCHOR160]
 	ubfiz	w2, w2, 2, 14
 	ldrh	w0, [x22, #:lo12:.LANCHOR221]
 	mul	w2, w2, w1
@@ -21420,14 +21010,14 @@ gc_recovery:
 	bl	ftl_memcpy
 	adrp	x0, .LANCHOR35
 	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbnz	w0, .L3325
+	cbnz	w0, .L3301
 	adrp	x0, .LANCHOR36
 	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbz	w0, .L3326
-.L3325:
+	cbz	w0, .L3302
+.L3301:
 	ldr	w0, [x27, 40]
 	sub	w0, w0, #1
-.L3405:
+.L3381:
 	str	w0, [x27, 40]
 	mov	w1, 1
 	mov	x0, x27
@@ -21435,48 +21025,48 @@ gc_recovery:
 	ldr	w0, [x27, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L3328
+	beq	.L3304
 	ldr	x0, [x27, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L3329
-.L3328:
+	beq	.L3305
+.L3304:
 	mov	x0, x27
 	bl	zbuf_free
-	b	.L3411
-.L3326:
-	adrp	x1, .LANCHOR94
+	b	.L3387
+.L3302:
+	adrp	x1, .LANCHOR100
 	ldr	w0, [x29, 200]
-	ldrh	w1, [x1, #:lo12:.LANCHOR94]
+	ldrh	w1, [x1, #:lo12:.LANCHOR100]
 	sub	w0, w0, #1
 	add	w0, w0, w1
 	orr	w0, w0, 33554432
-	b	.L3405
-.L3329:
+	b	.L3381
+.L3305:
 	ldrh	w2, [x22, #:lo12:.LANCHOR221]
-.L3406:
+.L3382:
 	ldr	x1, [x27, 8]
-	adrp	x22, .LANCHOR160
-	ldr	x0, [x24, #:lo12:.LANCHOR159]
+	adrp	x22, .LANCHOR161
+	ldr	x0, [x24, #:lo12:.LANCHOR160]
 	bl	ftl_memcpy
-	ldrb	w1, [x20, #:lo12:.LANCHOR79]
-	ldrh	w0, [x19, #:lo12:.LANCHOR85]
+	ldrb	w1, [x20, #:lo12:.LANCHOR85]
+	ldrh	w0, [x19, #:lo12:.LANCHOR91]
 	mul	w0, w0, w1
-	adrp	x1, .LANCHOR131
-	ldrb	w1, [x1, #:lo12:.LANCHOR131]
+	adrp	x1, .LANCHOR68
+	ldrb	w1, [x1, #:lo12:.LANCHOR68]
 	lsl	w2, w0, 2
 	cmp	w1, w0, lsr 6
-	bge	.L3331
-	ldr	x0, [x22, #:lo12:.LANCHOR160]
+	bge	.L3307
+	ldr	x0, [x22, #:lo12:.LANCHOR161]
 	mov	w1, 0
 	bl	ftl_memset
 	ldrb	w21, [x21, #:lo12:.LANCHOR224]
 	cmp	w21, 1
-	bne	.L3372
-	ldrb	w1, [x20, #:lo12:.LANCHOR79]
-	ldrh	w0, [x19, #:lo12:.LANCHOR85]
+	bne	.L3348
+	ldrb	w1, [x20, #:lo12:.LANCHOR85]
+	ldrh	w0, [x19, #:lo12:.LANCHOR91]
 	mul	w0, w0, w1
 	adrp	x1, .LANCHOR221
 	ldrh	w1, [x1, #:lo12:.LANCHOR221]
@@ -21484,42 +21074,42 @@ gc_recovery:
 	ldr	x1, [x27, 8]
 	mov	w2, w25
 	add	x1, x1, x0, sxtw 2
-	ldr	x0, [x22, #:lo12:.LANCHOR160]
+	ldr	x0, [x22, #:lo12:.LANCHOR161]
 	bl	ftl_memcpy
-.L3332:
-	adrp	x0, .LANCHOR94
-	ldrh	w0, [x0, #:lo12:.LANCHOR94]
+.L3308:
+	adrp	x0, .LANCHOR100
+	ldrh	w0, [x0, #:lo12:.LANCHOR100]
 	str	w0, [x29, 184]
 	ldr	x0, [x29, 176]
-	ldrb	w0, [x0, #:lo12:.LANCHOR78]
+	ldrb	w0, [x0, #:lo12:.LANCHOR84]
 	str	w0, [x29, 188]
 	cmp	w0, 2
-	bne	.L3333
-	adrp	x0, .LANCHOR80
-	ldrb	w0, [x0, #:lo12:.LANCHOR80]
-	cbz	w0, .L3334
-.L3333:
+	bne	.L3309
+	adrp	x0, .LANCHOR86
+	ldrb	w0, [x0, #:lo12:.LANCHOR86]
+	cbz	w0, .L3310
+.L3309:
 	adrp	x0, .LANCHOR35
 	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbz	w0, .L3335
-.L3334:
+	cbz	w0, .L3311
+.L3310:
 	ldp	w0, w1, [x29, 184]
 	mul	w0, w0, w1
 	str	w0, [x29, 184]
 	mov	w0, 1
 	str	w0, [x29, 188]
-.L3335:
+.L3311:
 	adrp	x22, .LANCHOR35
 	mov	w28, 0
 	add	x0, x22, :lo12:.LANCHOR35
 	mov	w10, 0
 	str	x0, [x29, 112]
-.L3336:
+.L3312:
 	sub	w0, w28, #1
 	str	w0, [x29, 144]
 	ldr	w0, [x29, 184]
 	cmp	w0, w28
-	bls	.L3349
+	bls	.L3325
 	add	w0, w28, w28, lsl 1
 	mov	x20, 0
 	sub	w0, w0, #1
@@ -21527,92 +21117,92 @@ gc_recovery:
 	adrp	x0, .LANCHOR36
 	add	x0, x0, :lo12:.LANCHOR36
 	str	x0, [x29, 120]
-	b	.L3350
-.L3324:
-	ldrh	w2, [x19, #:lo12:.LANCHOR85]
-	ldrb	w0, [x20, #:lo12:.LANCHOR79]
+	b	.L3326
+.L3300:
+	ldrh	w2, [x19, #:lo12:.LANCHOR91]
+	ldrb	w0, [x20, #:lo12:.LANCHOR85]
 	mul	w2, w2, w0
 	lsl	w2, w2, 2
-	b	.L3406
-.L3331:
+	b	.L3382
+.L3307:
 	ldr	x1, [x27, 8]
 	mov	w21, 0
 	add	x1, x1, x0, sxtw 2
-	ldr	x0, [x22, #:lo12:.LANCHOR160]
+	ldr	x0, [x22, #:lo12:.LANCHOR161]
 	bl	ftl_memcpy
-.L3407:
+.L3383:
 	mov	w25, 0
-	b	.L3332
-.L3372:
+	b	.L3308
+.L3348:
 	mov	w21, 1
-	b	.L3407
-.L3345:
+	b	.L3383
+.L3321:
 	ldp	x1, x0, [x29, 128]
 	ldr	x2, [x29, 176]
 	ldrh	w0, [x0, 96]
 	ldrh	w1, [x1]
-	ldrb	w2, [x2, #:lo12:.LANCHOR78]
+	ldrb	w2, [x2, #:lo12:.LANCHOR84]
 	cmp	w2, 2
 	mul	w0, w0, w1
 	str	w0, [x29, 200]
 	add	w1, w22, w0
-	beq	.L3337
+	beq	.L3313
 	ldr	x3, [x29, 112]
 	ldrb	w3, [x3]
-	cbz	w3, .L3338
-.L3337:
+	cbz	w3, .L3314
+.L3313:
 	ldr	w0, [x29, 144]
 	add	w1, w1, w0
 	orr	w1, w1, w2, lsl 24
-.L3408:
+.L3384:
 	str	w1, [x27, 40]
-.L3339:
+.L3315:
 	mov	w1, 1
 	str	x8, [x29, 96]
 	str	w10, [x29, 104]
 	mov	x0, x27
 	bl	sblk_read_page
-	adrp	x1, .LANCHOR160
+	adrp	x1, .LANCHOR161
 	ldr	w10, [x29, 104]
 	ldr	x0, [x27, 24]
 	ldr	x8, [x29, 96]
-	cbz	w21, .L3342
-	ldr	x2, [x1, #:lo12:.LANCHOR160]
+	cbz	w21, .L3318
+	ldr	x2, [x1, #:lo12:.LANCHOR161]
 	ldr	w3, [x2, x8]
-	cbnz	w3, .L3342
+	cbnz	w3, .L3318
 	ldr	w3, [x0, 8]
 	str	w3, [x2, x8]
-.L3342:
-	ldr	x2, [x24, #:lo12:.LANCHOR159]
+.L3318:
+	ldr	x2, [x24, #:lo12:.LANCHOR160]
 	ldr	w6, [x0, 4]
 	ldr	w3, [x2, x8]
 	cmp	w3, w6
-	bne	.L3343
-	ldr	x2, [x1, #:lo12:.LANCHOR160]
+	bne	.L3319
+	ldr	x2, [x1, #:lo12:.LANCHOR161]
 	ldr	w4, [x2, x8]
 	ldr	w2, [x0, 8]
 	cmp	w4, w2
-	beq	.L3344
-.L3343:
-	ldr	x1, [x1, #:lo12:.LANCHOR160]
+	beq	.L3320
+.L3319:
+	ldr	x1, [x1, #:lo12:.LANCHOR161]
 	ldr	w2, [x0, 12]
 	str	w2, [sp]
 	str	w10, [x29, 96]
 	ldr	w4, [x1, x8]
 	ldr	w5, [x0]
 	ldr	w7, [x0, 8]
-	adrp	x0, .LC214
+	adrp	x0, .LC194
 	ldr	w1, [x27, 40]
-	add	x0, x0, :lo12:.LC214
+	add	x0, x0, :lo12:.LC194
 	ldr	w2, [x27, 52]
 	str	x8, [x29, 104]
 	bl	printf
-	ldr	x0, [x24, #:lo12:.LANCHOR159]
+	ldr	x0, [x24, #:lo12:.LANCHOR160]
 	ldr	x8, [x29, 104]
 	ldr	w10, [x29, 96]
 	ldr	w0, [x0, x8]
 	cmn	w0, #1
-	beq	.L3344
+	beq	.L3320
 	mov	x0, x27
 	bl	zbuf_free
 	adrp	x0, .LANCHOR11
@@ -21622,61 +21212,61 @@ gc_recovery:
 	ldr	x0, [x26, #:lo12:.LANCHOR12]
 	ldrh	w1, [x23, 80]
 	strh	w1, [x0, 130]
-	b	.L3323
-.L3338:
+	b	.L3299
+.L3314:
 	cmp	w2, 3
-	bne	.L3340
+	bne	.L3316
 	ldr	x2, [x29, 120]
 	ldrb	w2, [x2]
-	cbz	w2, .L3341
+	cbz	w2, .L3317
 	ldr	w0, [x29, 164]
 	add	w1, w1, w0
 	orr	w1, w1, 50331648
-	b	.L3408
-.L3341:
+	b	.L3384
+.L3317:
 	add	w0, w28, w0
 	orr	w0, w0, w22, lsl 24
-.L3409:
+.L3385:
 	str	w0, [x27, 40]
-	b	.L3339
-.L3340:
+	b	.L3315
+.L3316:
 	add	w0, w28, w0
-	b	.L3409
-.L3344:
+	b	.L3385
+.L3320:
 	add	w10, w10, 1
 	add	w22, w22, 1
 	add	x8, x8, 4
-.L3347:
+.L3323:
 	ldr	w0, [x29, 188]
 	cmp	w0, w22
-	bcs	.L3345
+	bcs	.L3321
 	add	x20, x20, 1
-.L3350:
+.L3326:
 	ldr	x0, [x29, 168]
 	ldrb	w0, [x0, 9]
 	cmp	w0, w20
-	ble	.L3346
+	ble	.L3322
 	add	x0, x23, x20, lsl 1
 	str	x0, [x29, 136]
 	ldr	x0, [x29, 152]
 	sbfiz	x8, x10, 2, 32
 	mov	w22, 1
-	add	x0, x0, :lo12:.LANCHOR111
+	add	x0, x0, :lo12:.LANCHOR117
 	str	x0, [x29, 128]
-	b	.L3347
-.L3346:
-	adrp	x0, .LANCHOR80
-	ldrb	w0, [x0, #:lo12:.LANCHOR80]
+	b	.L3323
+.L3322:
+	adrp	x0, .LANCHOR86
+	ldrb	w0, [x0, #:lo12:.LANCHOR86]
 	cmp	w0, 0
 	cinc	w28, w28, ne
 	add	w28, w28, 1
-	b	.L3336
-.L3349:
+	b	.L3312
+.L3325:
 	mov	x0, x27
 	bl	zbuf_free
 	ldr	x0, [x29, 168]
 	adrp	x20, .LANCHOR11
-	ldrh	w3, [x19, #:lo12:.LANCHOR85]
+	ldrh	w3, [x19, #:lo12:.LANCHOR91]
 	mov	w25, 0
 	ldrh	w2, [x23, 80]
 	mov	w27, 0
@@ -21686,59 +21276,59 @@ gc_recovery:
 	str	x20, [x29, 144]
 	mul	w0, w0, w3
 	strh	w0, [x1, x2, lsl 1]
-	adrp	x0, .LANCHOR74
-	add	x0, x0, :lo12:.LANCHOR74
+	adrp	x0, .LANCHOR80
+	add	x0, x0, :lo12:.LANCHOR80
 	str	x0, [x29, 104]
-.L3351:
+.L3327:
 	sub	w0, w27, #1
 	str	w0, [x29, 128]
 	ldr	w0, [x29, 184]
 	cmp	w0, w27
-	bls	.L3365
+	bls	.L3341
 	add	w22, w27, w27, lsl 1
 	mov	x21, 0
 	sub	w0, w22, #1
 	str	w0, [x29, 120]
-	b	.L3366
-.L3361:
-	ldr	x1, [x24, #:lo12:.LANCHOR159]
+	b	.L3342
+.L3337:
+	ldr	x1, [x24, #:lo12:.LANCHOR160]
 	sbfiz	x0, x28, 2, 32
 	ldr	w20, [x1, x0]
 	cmn	w20, #1
-	beq	.L3352
-	adrp	x1, .LANCHOR160
-	ldr	x1, [x1, #:lo12:.LANCHOR160]
+	beq	.L3328
+	adrp	x1, .LANCHOR161
+	ldr	x1, [x1, #:lo12:.LANCHOR161]
 	ldr	w0, [x1, x0]
 	str	w0, [x29, 164]
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 204]
 	cmn	w0, #1
-	bne	.L3353
+	bne	.L3329
 	mov	w2, 0
 	add	x1, x29, 204
 	mov	w0, w20
 	bl	pm_log2phys
-.L3353:
+.L3329:
 	ldr	x0, [x29, 136]
 	ldr	x1, [x29, 152]
 	ldr	x2, [x29, 176]
 	ldrh	w0, [x0, 96]
-	ldrh	w1, [x1, #:lo12:.LANCHOR111]
-	ldrb	w2, [x2, #:lo12:.LANCHOR78]
+	ldrh	w1, [x1, #:lo12:.LANCHOR117]
+	ldrb	w2, [x2, #:lo12:.LANCHOR84]
 	cmp	w2, 2
 	mul	w0, w0, w1
 	add	w1, w22, w0
-	beq	.L3354
+	beq	.L3330
 	adrp	x6, .LANCHOR35
 	ldrb	w6, [x6, #:lo12:.LANCHOR35]
-	cbz	w6, .L3355
-.L3354:
+	cbz	w6, .L3331
+.L3330:
 	ldr	w0, [x29, 128]
 	add	w1, w0, w1
 	orr	w1, w1, w2, lsl 24
 	str	w1, [x29, 200]
-.L3356:
+.L3332:
 	ldp	x0, x1, [x29, 104]
 	mov	w19, 24
 	mov	w2, 1
@@ -21751,402 +21341,826 @@ gc_recovery:
 	lsl	w19, w2, w19
 	sub	w19, w19, #1
 	and	w19, w19, w0
-	adrp	x0, .LANCHOR75
-	ldrb	w0, [x0, #:lo12:.LANCHOR75]
+	adrp	x0, .LANCHOR81
+	ldrb	w0, [x0, #:lo12:.LANCHOR81]
 	udiv	w19, w19, w0
 	ldr	w0, [x29, 204]
 	cmp	w1, w0
 	and	x19, x19, 65535
-	bne	.L3359
+	bne	.L3335
 	add	x1, x29, 200
 	mov	w0, w20
 	bl	pm_log2phys
 	add	w25, w25, 1
 	mov	w0, w19
 	bl	ftl_vpn_decrement
-.L3360:
+.L3336:
 	adrp	x0, .LANCHOR9
 	add	w28, w28, 1
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	add	x0, x0, x19, lsl 2
 	ldrb	w0, [x0, 2]
 	tst	w0, 224
-	bne	.L3352
+	bne	.L3328
 	ldr	x0, [x29, 144]
 	lsl	x19, x19, 1
 	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrh	w1, [x0, x19]
-	cbz	w1, .L3352
+	cbz	w1, .L3328
 	strh	wzr, [x0, x19]
-.L3352:
+.L3328:
 	add	w22, w22, 1
-.L3363:
+.L3339:
 	ldr	w0, [x29, 188]
 	cmp	w0, w22
-	bcs	.L3361
+	bcs	.L3337
 	add	x21, x21, 1
-.L3366:
+.L3342:
 	ldr	x0, [x29, 168]
 	ldrb	w0, [x0, 9]
 	cmp	w0, w21
-	ble	.L3362
+	ble	.L3338
 	add	x0, x23, x21, lsl 1
 	mov	w22, 1
 	str	x0, [x29, 136]
 	adrp	x0, .LANCHOR31
 	add	x0, x0, :lo12:.LANCHOR31
 	str	x0, [x29, 112]
-	b	.L3363
-.L3355:
+	b	.L3339
+.L3331:
 	cmp	w2, 3
-	bne	.L3357
+	bne	.L3333
 	adrp	x2, .LANCHOR36
 	ldrb	w6, [x2, #:lo12:.LANCHOR36]
 	lsl	w2, w22, 24
-	cbz	w6, .L3358
+	cbz	w6, .L3334
 	ldr	w0, [x29, 120]
 	add	w1, w0, w1
 	orr	w0, w1, w2
-.L3410:
+.L3386:
 	str	w0, [x29, 200]
-	b	.L3356
-.L3358:
+	b	.L3332
+.L3334:
 	add	w0, w27, w0
 	orr	w0, w0, w2
-	b	.L3410
-.L3357:
+	b	.L3386
+.L3333:
 	add	w0, w27, w0
-	b	.L3410
-.L3359:
+	b	.L3386
+.L3335:
 	ldr	w1, [x29, 200]
 	cmp	w0, w1
 	cinc	w25, w25, eq
-	b	.L3360
-.L3362:
-	adrp	x0, .LANCHOR80
-	ldrb	w0, [x0, #:lo12:.LANCHOR80]
+	b	.L3336
+.L3338:
+	adrp	x0, .LANCHOR86
+	ldrb	w0, [x0, #:lo12:.LANCHOR86]
 	cmp	w0, 0
 	cinc	w27, w27, ne
 	add	w27, w27, 1
-	b	.L3351
-.L3365:
+	b	.L3327
+.L3341:
 	ldr	x0, [x29, 144]
 	ldrh	w1, [x23, 80]
 	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	strh	w25, [x0, x1, lsl 1]
 	ldrh	w0, [x23, 80]
 	bl	zftl_insert_data_list
-	b	.L3323
-.L3317:
+	b	.L3299
+.L3293:
 	ldrh	w0, [x23, 130]
 	cmp	w0, w1
-	beq	.L3316
-	adrp	x19, .LANCHOR110
-	ldr	x1, [x19, #:lo12:.LANCHOR110]
+	beq	.L3292
+	adrp	x19, .LANCHOR69
+	ldr	x1, [x19, #:lo12:.LANCHOR69]
 	ldrh	w1, [x1, 126]
 	cmp	w1, w0
-	bne	.L3371
+	bne	.L3347
 	bl	pm_flush
 	ldr	x0, [x26, #:lo12:.LANCHOR12]
 	ldrh	w0, [x0, 130]
 	bl	ftl_free_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR110]
+	ldr	x0, [x19, #:lo12:.LANCHOR69]
 	mov	w1, -1
 	strh	w1, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L3371:
+.L3347:
 	ldr	x0, [x26, #:lo12:.LANCHOR12]
 	mov	w1, -1
 	strh	w1, [x0, 130]
-	b	.L3316
+	b	.L3292
 	.size	gc_recovery, .-gc_recovery
-	.section	.text.gc_update_l2p_map_new,"ax",@progbits
+	.section	.text.zftl_init,"ax",@progbits
 	.align	2
-	.global	gc_update_l2p_map_new
-	.type	gc_update_l2p_map_new, %function
-gc_update_l2p_map_new:
-	stp	x29, x30, [sp, -176]!
-	adrp	x0, .LANCHOR12
-	adrp	x1, .LANCHOR85
+	.global	zftl_init
+	.type	zftl_init, %function
+zftl_init:
+	stp	x29, x30, [sp, -112]!
+	adrp	x1, .LANCHOR65
+	mov	w0, -1
 	add	x29, sp, 0
+	strb	w0, [x1, #:lo12:.LANCHOR65]
+	adrp	x1, .LANCHOR66
 	stp	x21, x22, [sp, 32]
-	ldr	x21, [x0, #:lo12:.LANCHOR12]
-	stp	x25, x26, [sp, 64]
-	ldrh	w26, [x1, #:lo12:.LANCHOR85]
-	add	x1, x21, 80
-	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR19
+	adrp	x22, .LANCHOR100
+	strb	wzr, [x1, #:lo12:.LANCHOR66]
+	adrp	x1, .LANCHOR71
 	stp	x19, x20, [sp, 16]
+	adrp	x21, .LANCHOR85
+	strb	w0, [x1, #:lo12:.LANCHOR71]
+	adrp	x1, .LANCHOR72
+	stp	x23, x24, [sp, 48]
+	adrp	x20, .LANCHOR221
+	strb	wzr, [x1, #:lo12:.LANCHOR72]
+	adrp	x1, .LANCHOR184
+	stp	x25, x26, [sp, 64]
+	adrp	x23, .LANCHOR8
+	strb	w0, [x1, #:lo12:.LANCHOR184]
+	adrp	x0, .LANCHOR183
+	mov	w1, -1
 	stp	x27, x28, [sp, 80]
-	stp	x0, x1, [x29, 128]
-	ldrb	w1, [x1, 9]
-	mul	w26, w26, w1
-	ldr	w1, [x24, #:lo12:.LANCHOR19]
-	tbz	x1, 8, .L3413
-	ldrh	w1, [x21, 80]
-	adrp	x0, .LC216
-	add	x0, x0, :lo12:.LC216
+	strb	wzr, [x0, #:lo12:.LANCHOR183]
+	adrp	x0, .LANCHOR226
+	str	w1, [x0, #:lo12:.LANCHOR226]
+	adrp	x1, .LC196
+	adrp	x0, .LC98
+	add	x1, x1, :lo12:.LC196
+	add	x0, x0, :lo12:.LC98
 	bl	printf
-.L3413:
-	adrp	x23, .LANCHOR11
-	adrp	x0, .LANCHOR224
-	ldrh	w2, [x21, 80]
-	mov	x22, 0
-	ldr	x1, [x23, #:lo12:.LANCHOR11]
-	mov	w25, 0
-	ldrb	w0, [x0, #:lo12:.LANCHOR224]
-	sub	w0, w26, w0
-	strh	w0, [x1, x2, lsl 1]
-	adrp	x0, .LANCHOR131
-	add	x0, x0, :lo12:.LANCHOR131
+	adrp	x1, .LANCHOR32
+	add	x1, x1, :lo12:.LANCHOR32
+	adrp	x0, .LANCHOR84
+	adrp	x2, .LANCHOR68
+	adrp	x3, .LANCHOR118
+	adrp	x4, .LANCHOR81
+	ldrb	w7, [x1, 12]
+	strb	w7, [x0, #:lo12:.LANCHOR84]
+	ldrb	w0, [x1, 9]
+	strb	w0, [x2, #:lo12:.LANCHOR68]
+	adrp	x2, .LANCHOR91
+	ldrh	w5, [x1, 10]
+	strh	w5, [x2, #:lo12:.LANCHOR91]
+	adrp	x2, .LANCHOR23
+	ldrh	w8, [x1, 14]
+	ubfiz	w6, w0, 9, 7
+	ldrb	w2, [x2, #:lo12:.LANCHOR23]
+	sdiv	w11, w5, w7
+	strb	w2, [x3, #:lo12:.LANCHOR118]
+	ldrb	w3, [x1, 13]
+	adrp	x1, .LANCHOR2
+	strb	w3, [x4, #:lo12:.LANCHOR81]
+	ldrh	w4, [x1, #:lo12:.LANCHOR2]
+	adrp	x1, .LANCHOR117
+	strh	w11, [x22, #:lo12:.LANCHOR100]
+	mul	w2, w2, w3
+	strh	w4, [x1, #:lo12:.LANCHOR117]
+	strh	w8, [x23, #:lo12:.LANCHOR8]
+	mov	w3, 1
+	and	w2, w2, 255
+	strh	w6, [x20, #:lo12:.LANCHOR221]
+	strb	w2, [x21, #:lo12:.LANCHOR85]
+	mov	w1, 0
+.L3389:
+	cmp	w4, w3
+	bcs	.L3390
+	mul	w10, w0, w5
+	adrp	x3, .LANCHOR80
+	sub	w1, w1, #1
+	mov	w4, 0
+	strh	w1, [x3, #:lo12:.LANCHOR80]
+	mov	w1, 1
+	mul	w3, w8, w10
+	lsr	w12, w3, 21
+.L3391:
+	cmp	w12, w1
+	bcs	.L3392
+	mov	w1, 57344
+	sub	w4, w4, #1
+	movk	w1, 0x1c, lsl 16
+	mul	w3, w3, w2
+	adrp	x28, .LANCHOR219
+	sub	w12, w6, #1
+	mul	w1, w2, w1
+	adrp	x24, .LANCHOR203
+	mul	w11, w11, w2
+	adrp	x27, .LANCHOR228
+	mul	w10, w10, w2
+	adrp	x26, .LANCHOR153
+	lsl	w1, w1, w4
+	adrp	x4, .LANCHOR73
+	sub	w10, w10, #1
+	adrp	x25, .LANCHOR104
+	str	w1, [x4, #:lo12:.LANCHOR73]
+	adrp	x4, .LANCHOR227
+	lsr	w8, w8, 4
+	strh	w8, [x25, #:lo12:.LANCHOR104]
+	str	w3, [x4, #:lo12:.LANCHOR227]
+	add	w3, w1, 24576
+	str	w3, [x27, #:lo12:.LANCHOR228]
+	cmp	w8, 79
+	udiv	w0, w3, w0
+	udiv	w3, w3, w10
+	str	w0, [x28, #:lo12:.LANCHOR219]
+	add	w0, w12, w0, lsl 2
+	add	w3, w3, 8
+	udiv	w0, w0, w6
+	strh	w0, [x24, #:lo12:.LANCHOR203]
+	ubfiz	w0, w0, 4, 16
+	sdiv	w0, w0, w11
+	strh	w0, [x26, #:lo12:.LANCHOR153]
+	adrp	x0, .LANCHOR107
 	str	x0, [x29, 104]
-.L3414:
-	mov	w28, w22
-	cmp	w26, w22
-	bhi	.L3424
-	ldr	w0, [x24, #:lo12:.LANCHOR19]
-	tbz	x0, 8, .L3425
-	ldr	x0, [x29, 128]
-	mov	w3, w25
-	ldr	x1, [x23, #:lo12:.LANCHOR11]
-	ldrh	w2, [x21, 80]
-	ldr	x0, [x0, #:lo12:.LANCHOR12]
-	ldrh	w2, [x1, x2, lsl 1]
-	ldrh	w1, [x0, 80]
-	adrp	x0, .LC219
-	add	x0, x0, :lo12:.LC219
+	strh	w3, [x0, #:lo12:.LANCHOR107]
+	bhi	.L3393
+	mov	w0, 80
+	strh	w0, [x25, #:lo12:.LANCHOR104]
+.L3393:
+	adrp	x12, .LANCHOR132
+	mov	w0, 2000
+	adrp	x11, .LANCHOR131
+	adrp	x3, .LANCHOR150
+	strh	w0, [x12, #:lo12:.LANCHOR132]
+	mov	w0, 50
+	adrp	x8, .LANCHOR151
+	strh	w0, [x11, #:lo12:.LANCHOR131]
+	mov	w0, 256
+	strh	w0, [x3, #:lo12:.LANCHOR150]
+	mov	w0, 48
+	strh	w0, [x8, #:lo12:.LANCHOR151]
+	adrp	x0, .LANCHOR10
+	mov	w10, 32
+	cmp	w7, 2
+	mov	x13, x11
+	strh	w10, [x0, #:lo12:.LANCHOR10]
+	mov	x7, x12
+	mov	x14, x8
+	beq	.L3394
+	adrp	x15, .LANCHOR89
+	ldrb	w15, [x15, #:lo12:.LANCHOR89]
+	cbz	w15, .L3395
+.L3394:
+	mov	w8, 150
+	strh	w8, [x13, #:lo12:.LANCHOR131]
+	mov	w8, 64
+	strh	w8, [x14, #:lo12:.LANCHOR151]
+	mov	w8, 12
+	strh	w8, [x0, #:lo12:.LANCHOR10]
+	adrp	x8, .LANCHOR0
+	ldrb	w8, [x8, #:lo12:.LANCHOR0]
+	cbnz	w8, .L3396
+	mov	w8, 4
+	strh	w8, [x0, #:lo12:.LANCHOR10]
+	mov	w0, 600
+	strh	w0, [x7, #:lo12:.LANCHOR132]
+	mov	w0, 128
+	strh	w0, [x3, #:lo12:.LANCHOR150]
+.L3396:
+	adrp	x0, .LANCHOR36
+	ldrb	w0, [x0, #:lo12:.LANCHOR36]
+	cbz	w0, .L3398
+	mov	w0, 200
+	strh	w0, [x13, #:lo12:.LANCHOR131]
+	mov	w0, 2000
+	strh	w0, [x7, #:lo12:.LANCHOR132]
+.L3398:
+	adrp	x0, .LANCHOR128
+	mul	w2, w5, w2
+	mov	w3, 1
+	str	wzr, [x0, #:lo12:.LANCHOR128]
+	adrp	x0, .LANCHOR224
+	cmp	w6, w2, lsl 2
+	strb	w3, [x0, #:lo12:.LANCHOR224]
+	bge	.L3400
+	mov	w2, 2
+	strb	w2, [x0, #:lo12:.LANCHOR224]
+.L3400:
+	adrp	x19, .LANCHOR19
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L3401
+	str	x4, [x29, 96]
+	adrp	x0, .LC197
+	add	x0, x0, :lo12:.LC197
 	bl	printf
-.L3425:
-	ldrh	w1, [x21, 80]
-	ldr	x0, [x23, #:lo12:.LANCHOR11]
-	ldrh	w0, [x0, x1, lsl 1]
-	cmp	w25, w0
-	beq	.L3426
-	adrp	x1, .LANCHOR226
-	adrp	x0, .LC0
-	mov	w2, 898
-	add	x1, x1, :lo12:.LANCHOR226
-	add	x0, x0, :lo12:.LC0
+	ldr	x4, [x29, 96]
+.L3401:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L3402
+	ldr	w1, [x4, #:lo12:.LANCHOR227]
+	adrp	x0, .LC198
+	add	x0, x0, :lo12:.LC198
 	bl	printf
-.L3426:
-	ldrh	w1, [x21, 80]
-	ldr	x0, [x23, #:lo12:.LANCHOR11]
-	strh	w25, [x0, x1, lsl 1]
-	ldrh	w0, [x21, 80]
-	bl	zftl_insert_data_list
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 176
-	ret
-.L3424:
-	adrp	x27, .LANCHOR159
-	lsl	x19, x22, 2
-	ldr	x0, [x27, #:lo12:.LANCHOR159]
-	ldr	w2, [x0, x19]
-	cmn	w2, #1
-	beq	.L3415
-	adrp	x0, .LANCHOR131
-	ldrb	w20, [x0, #:lo12:.LANCHOR131]
-	lsl	w20, w20, 7
-	udiv	w20, w2, w20
-	and	w0, w20, 65535
-	str	w0, [x29, 156]
-	ldr	w0, [x24, #:lo12:.LANCHOR19]
-	tbz	x0, 8, .L3416
-	ldr	w1, [x29, 156]
-	adrp	x0, .LC217
-	mov	w3, w22
-	add	x0, x0, :lo12:.LC217
+.L3402:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L3403
+	ldr	w1, [x28, #:lo12:.LANCHOR219]
+	adrp	x0, .LC199
+	add	x0, x0, :lo12:.LC199
 	bl	printf
-.L3416:
-	sub	w28, w26, w28
-	add	x28, x28, x22
-	lsl	x0, x28, 2
-	str	x0, [x29, 144]
-	adrp	x0, .LC218
-	add	x0, x0, :lo12:.LC218
-	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR74
-	add	x0, x0, :lo12:.LANCHOR74
-	str	x0, [x29, 112]
-.L3417:
-	ldr	x0, [x29, 144]
-	cmp	x0, x19
-	bne	.L3423
-.L3415:
-	add	x22, x22, 1
-	b	.L3414
-.L3423:
-	ldr	x0, [x27, #:lo12:.LANCHOR159]
-	ldr	w20, [x0, x19]
-	cmn	w20, #1
-	beq	.L3418
+.L3403:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L3404
+	ldr	w1, [x27, #:lo12:.LANCHOR228]
+	adrp	x0, .LC200
+	add	x0, x0, :lo12:.LC200
+	bl	printf
+.L3404:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L3405
+	ldrh	w1, [x24, #:lo12:.LANCHOR203]
+	adrp	x0, .LC201
+	add	x0, x0, :lo12:.LC201
+	bl	printf
+.L3405:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L3406
+	ldrh	w1, [x20, #:lo12:.LANCHOR221]
+	adrp	x0, .LC202
+	add	x0, x0, :lo12:.LC202
+	bl	printf
+.L3406:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L3407
+	ldrh	w1, [x26, #:lo12:.LANCHOR153]
+	adrp	x0, .LC203
+	add	x0, x0, :lo12:.LC203
+	bl	printf
+.L3407:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L3408
+	ldrh	w1, [x25, #:lo12:.LANCHOR104]
+	adrp	x0, .LC204
+	add	x0, x0, :lo12:.LC204
+	bl	printf
+.L3408:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L3409
 	ldr	x0, [x29, 104]
-	ldr	w1, [x29, 156]
-	ldrb	w0, [x0]
-	lsl	w0, w0, 7
-	udiv	w0, w20, w0
-	cmp	w1, w0, uxth
-	bne	.L3418
-	adrp	x0, .LANCHOR160
-	ldr	x0, [x0, #:lo12:.LANCHOR160]
-	ldr	w28, [x0, x19]
-	mov	w0, w20
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 172]
+	ldrh	w1, [x0, #:lo12:.LANCHOR107]
+	adrp	x0, .LC205
+	add	x0, x0, :lo12:.LC205
+	bl	printf
+.L3409:
+	bl	zbuf_init
+	adrp	x25, .LANCHOR199
+	mov	w0, 16384
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR194
+	str	x0, [x1, #:lo12:.LANCHOR194]
+	mov	w0, 16384
+	bl	ftl_malloc
+	str	x0, [x25, #:lo12:.LANCHOR199]
+	mov	w0, 16384
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR189
+	str	x0, [x1, #:lo12:.LANCHOR189]
+	mov	w0, 6
+	ldrh	w1, [x23, #:lo12:.LANCHOR8]
+	mul	w0, w1, w0
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR4
+	str	x0, [x1, #:lo12:.LANCHOR4]
+	ldrb	w1, [x21, #:lo12:.LANCHOR85]
+	ldrh	w0, [x22, #:lo12:.LANCHOR100]
+	mul	w0, w0, w1
+	lsl	w0, w0, 2
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR124
+	ldr	x2, [x25, #:lo12:.LANCHOR199]
+	adrp	x25, .LANCHOR12
+	str	x0, [x1, #:lo12:.LANCHOR124]
+	adrp	x0, .LANCHOR123
+	ldrh	w1, [x22, #:lo12:.LANCHOR100]
+	str	x2, [x0, #:lo12:.LANCHOR123]
+	ldrb	w0, [x21, #:lo12:.LANCHOR85]
+	mul	w1, w1, w0
+	lsl	w0, w1, 1
+	adrp	x1, .LANCHOR11
+	add	x3, x2, x0, sxtw 2
+	str	x3, [x1, #:lo12:.LANCHOR11]
+	ldrh	w1, [x23, #:lo12:.LANCHOR8]
+	add	w1, w0, w1, lsr 1
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	add	x1, x2, x1, sxtw 2
+	str	x1, [x25, #:lo12:.LANCHOR12]
+	tbz	x0, 12, .L3410
+	adrp	x0, .LC206
+	add	x0, x0, :lo12:.LC206
+	bl	printf
+.L3410:
+	ldrh	w0, [x22, #:lo12:.LANCHOR100]
+	ldrb	w21, [x21, #:lo12:.LANCHOR85]
+	ldrh	w1, [x23, #:lo12:.LANCHOR8]
+	ldrh	w22, [x24, #:lo12:.LANCHOR203]
+	mul	w21, w0, w21
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	add	w21, w1, w21, lsl 2
+	lsl	w1, w1, 2
+	lsl	w21, w21, 1
+	add	w22, w1, w22, lsl 2
+	add	w21, w21, 632
+	add	w22, w22, 704
+	tbz	x0, 12, .L3411
+	ldrh	w3, [x20, #:lo12:.LANCHOR221]
+	adrp	x0, .LC207
+	mov	w2, w22
+	mov	w1, w21
+	add	x0, x0, :lo12:.LC207
+	bl	printf
+.L3411:
+	ldrh	w0, [x20, #:lo12:.LANCHOR221]
+	cmp	w21, w0
+	bhi	.L3412
+	cmp	w22, w0
+	bls	.L3413
+.L3412:
+.L3459:
+	b	.L3459
+.L3390:
+	add	w1, w1, 1
+	lsl	w3, w3, 1
+	and	w1, w1, 65535
+	b	.L3389
+.L3392:
+	add	w4, w4, 1
+	lsl	w1, w1, 1
+	and	w4, w4, 65535
+	b	.L3391
+.L3395:
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbz	w0, .L3398
+	mov	w0, 1200
+	strh	w10, [x11, #:lo12:.LANCHOR131]
+	strh	w0, [x12, #:lo12:.LANCHOR132]
+	strh	w10, [x8, #:lo12:.LANCHOR151]
+	b	.L3398
+.L3413:
+	bl	sblk_init
+	bl	ftl_info_blk_init
 	cmn	w0, #1
-	bne	.L3419
-	mov	w2, 0
-	add	x1, x29, 172
-	mov	w0, w20
-	bl	pm_log2phys
-.L3419:
-	ldr	w3, [x29, 172]
-	cmp	w28, w3
-	bne	.L3420
-	adrp	x0, .LANCHOR161
-	mov	w2, 1
-	add	x1, x29, 168
-	add	w25, w25, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR161]
-	ldr	w0, [x0, x19]
-	str	w0, [x29, 168]
-	mov	w0, w20
-	bl	pm_log2phys
-	ldr	x0, [x29, 112]
-	ldrh	w2, [x0]
-	adrp	x0, .LANCHOR31
-	ldrb	w1, [x0, #:lo12:.LANCHOR31]
-	mov	w0, 24
-	lsr	w28, w28, w2
-	sub	w0, w0, w1
-	sub	w1, w0, w2
+	beq	.L3388
+	bl	ftl_ext_info_init
+	adrp	x19, .LANCHOR69
+	bl	gc_init
 	mov	w0, 1
-	lsl	w0, w0, w1
-	sub	w0, w0, #1
-	and	w28, w0, w28
-	adrp	x0, .LANCHOR75
-	ldrb	w0, [x0, #:lo12:.LANCHOR75]
-	udiv	w0, w28, w0
-.L3446:
-	bl	ftl_vpn_decrement
-	ldr	x0, [x27, #:lo12:.LANCHOR159]
-	mov	w1, -1
-	str	w1, [x0, x19]
-.L3418:
-	add	x19, x19, 4
-	b	.L3417
-.L3420:
-	ldr	w0, [x24, #:lo12:.LANCHOR19]
-	tbz	x0, 8, .L3422
-	ldr	x0, [x29, 120]
-	mov	w2, w28
-	mov	w1, w20
-	bl	printf
-.L3422:
-	ldr	x0, [x29, 136]
-	ldrh	w0, [x0]
-	b	.L3446
-	.size	gc_update_l2p_map_new, .-gc_update_l2p_map_new
-	.section	.text.gc_scan_src_blk_one_page,"ax",@progbits
-	.align	2
-	.global	gc_scan_src_blk_one_page
-	.type	gc_scan_src_blk_one_page, %function
-gc_scan_src_blk_one_page:
-	stp	x29, x30, [sp, -96]!
-	mov	w3, 0
-	mov	w4, 0
-	mov	w5, 65535
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR70
-	add	x1, x20, :lo12:.LANCHOR70
-	stp	x21, x22, [sp, 32]
-	stp	x23, x24, [sp, 48]
-	adrp	x21, .LANCHOR79
-	stp	x25, x26, [sp, 64]
-	ldrb	w6, [x21, #:lo12:.LANCHOR79]
-	ldrb	w0, [x1, 4]
-	add	x2, x1, x0, sxtw 1
-	ldrh	w22, [x2, 40]
-	ldrh	w2, [x1, 2]
-.L3448:
-	cmp	w22, w5
-	beq	.L3450
-	cbz	w4, .L3451
-	add	x1, x20, :lo12:.LANCHOR70
-	strh	w2, [x1, 2]
-.L3451:
-	cbz	w3, .L3452
-	add	x1, x20, :lo12:.LANCHOR70
-	strb	w0, [x1, 4]
-.L3452:
+	bl	pm_init
+	bl	lpa_rebuild_hash
+	ldr	x0, [x25, #:lo12:.LANCHOR12]
+	mov	x1, 0
+	add	x0, x0, 16
+	bl	ftl_open_sblk_recovery
+	ldr	x0, [x25, #:lo12:.LANCHOR12]
+	add	x1, x0, 16
+	add	x0, x0, 48
+	bl	ftl_open_sblk_recovery
+	ldr	x1, [x19, #:lo12:.LANCHOR69]
+	ldr	w0, [x1, 8]
+	add	w0, w0, 16
+	str	w0, [x1, 8]
+	ldr	x0, [x25, #:lo12:.LANCHOR12]
+	add	x0, x0, 16
+	bl	ftl_info_data_recovery
+	ldr	x0, [x25, #:lo12:.LANCHOR12]
+	add	x0, x0, 48
+	bl	ftl_info_data_recovery
+	ldr	x0, [x25, #:lo12:.LANCHOR12]
+	add	x0, x0, 80
+	bl	ftl_info_data_recovery
+	bl	gc_recovery
+	bl	pm_flush
 	mov	w0, 1
-	adrp	x23, .LANCHOR111
-	bl	buf_alloc
-	adrp	x24, .LANCHOR35
-	mov	x25, x0
-	add	x23, x23, :lo12:.LANCHOR111
-	add	x24, x24, :lo12:.LANCHOR35
-	mov	w26, 1
-.L3453:
-	add	x19, x20, :lo12:.LANCHOR70
-	ldrb	w1, [x19, 6]
-	cmp	w26, w1
-	ble	.L3463
-	mov	x0, x25
-	bl	zbuf_free
-	ldrb	w0, [x19, 4]
-	ldrb	w1, [x21, #:lo12:.LANCHOR79]
-	add	w0, w0, 1
-	and	w0, w0, 255
-	strb	w0, [x19, 4]
-	cmp	w1, w0
-	bne	.L3447
-	ldrh	w0, [x19, 2]
-	strb	wzr, [x19, 4]
+	bl	ftl_total_vpn_update
+	adrp	x0, .LANCHOR197
+	ldrb	w0, [x0, #:lo12:.LANCHOR197]
+	cbz	w0, .L3415
+	ldr	x1, [x19, #:lo12:.LANCHOR69]
+	ldr	w0, [x1, 68]
 	add	w0, w0, 1
-	strh	w0, [x19, 2]
-.L3447:
+	str	w0, [x1, 68]
+.L3415:
+	bl	ftl_ext_info_flush
+	mov	w0, 0
+	bl	ftl_info_flush
+	mov	w0, 0
+.L3388:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 96
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
 	ret
-.L3450:
-	add	w0, w0, 1
-	and	w0, w0, 255
-	cmp	w0, w6
-	bne	.L3449
-	add	w2, w2, 1
-	mov	w0, 0
-	and	w2, w2, 65535
-	mov	w4, 1
-.L3449:
-	add	x3, x1, x0, sxtw 1
-	ldrh	w22, [x3, 40]
-	mov	w3, 1
-	b	.L3448
+	.size	zftl_init, .-zftl_init
+	.section	.text.rk_ftl_init,"ax",@progbits
+	.align	2
+	.global	rk_ftl_init
+	.type	rk_ftl_init, %function
+rk_ftl_init:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	bl	nand_flash_init
+	cbnz	w0, .L3463
+	bl	zftl_init
 .L3463:
+	mov	w19, w0
+	bl	idb_init
+	mov	w1, w19
+	adrp	x0, .LC208
+	add	x0, x0, :lo12:.LC208
+	bl	printf
+	mov	w0, w19
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	rk_ftl_init, .-rk_ftl_init
+	.section	.text.gc_update_l2p_map_new,"ax",@progbits
+	.align	2
+	.global	gc_update_l2p_map_new
+	.type	gc_update_l2p_map_new, %function
+gc_update_l2p_map_new:
+	stp	x29, x30, [sp, -176]!
+	adrp	x0, .LANCHOR12
+	adrp	x1, .LANCHOR91
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	ldr	x21, [x0, #:lo12:.LANCHOR12]
+	stp	x25, x26, [sp, 64]
+	ldrh	w26, [x1, #:lo12:.LANCHOR91]
+	add	x1, x21, 80
+	stp	x23, x24, [sp, 48]
+	adrp	x24, .LANCHOR19
+	stp	x19, x20, [sp, 16]
+	stp	x27, x28, [sp, 80]
+	stp	x0, x1, [x29, 128]
+	ldrb	w1, [x1, 9]
+	mul	w26, w26, w1
+	ldr	w1, [x24, #:lo12:.LANCHOR19]
+	tbz	x1, 8, .L3466
+	ldrh	w1, [x21, 80]
+	adrp	x0, .LC209
+	add	x0, x0, :lo12:.LC209
+	bl	printf
+.L3466:
+	adrp	x23, .LANCHOR11
+	adrp	x0, .LANCHOR224
+	ldrh	w2, [x21, 80]
+	mov	x22, 0
+	ldr	x1, [x23, #:lo12:.LANCHOR11]
+	mov	w25, 0
+	ldrb	w0, [x0, #:lo12:.LANCHOR224]
+	sub	w0, w26, w0
+	strh	w0, [x1, x2, lsl 1]
+	adrp	x0, .LANCHOR68
+	add	x0, x0, :lo12:.LANCHOR68
+	str	x0, [x29, 104]
+.L3467:
+	mov	w28, w22
+	cmp	w26, w22
+	bhi	.L3477
+	ldr	w0, [x24, #:lo12:.LANCHOR19]
+	tbz	x0, 8, .L3478
+	ldr	x0, [x29, 128]
+	mov	w3, w25
+	ldr	x1, [x23, #:lo12:.LANCHOR11]
+	ldrh	w2, [x21, 80]
+	ldr	x0, [x0, #:lo12:.LANCHOR12]
+	ldrh	w2, [x1, x2, lsl 1]
+	ldrh	w1, [x0, 80]
+	adrp	x0, .LC212
+	add	x0, x0, :lo12:.LC212
+	bl	printf
+.L3478:
+	ldrh	w1, [x21, 80]
+	ldr	x0, [x23, #:lo12:.LANCHOR11]
+	ldrh	w0, [x0, x1, lsl 1]
+	cmp	w25, w0
+	beq	.L3479
+	adrp	x1, .LANCHOR229
+	adrp	x0, .LC0
+	mov	w2, 898
+	add	x1, x1, :lo12:.LANCHOR229
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L3479:
+	ldrh	w1, [x21, 80]
+	ldr	x0, [x23, #:lo12:.LANCHOR11]
+	strh	w25, [x0, x1, lsl 1]
+	ldrh	w0, [x21, 80]
+	bl	zftl_insert_data_list
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 176
+	ret
+.L3477:
+	adrp	x27, .LANCHOR160
+	lsl	x19, x22, 2
+	ldr	x0, [x27, #:lo12:.LANCHOR160]
+	ldr	w2, [x0, x19]
+	cmn	w2, #1
+	beq	.L3468
+	adrp	x0, .LANCHOR68
+	ldrb	w20, [x0, #:lo12:.LANCHOR68]
+	lsl	w20, w20, 7
+	udiv	w20, w2, w20
+	and	w0, w20, 65535
+	str	w0, [x29, 156]
+	ldr	w0, [x24, #:lo12:.LANCHOR19]
+	tbz	x0, 8, .L3469
+	ldr	w1, [x29, 156]
+	adrp	x0, .LC210
+	mov	w3, w22
+	add	x0, x0, :lo12:.LC210
+	bl	printf
+.L3469:
+	sub	w28, w26, w28
+	add	x28, x28, x22
+	lsl	x0, x28, 2
+	str	x0, [x29, 144]
+	adrp	x0, .LC211
+	add	x0, x0, :lo12:.LC211
+	str	x0, [x29, 120]
+	adrp	x0, .LANCHOR80
+	add	x0, x0, :lo12:.LANCHOR80
+	str	x0, [x29, 112]
+.L3470:
+	ldr	x0, [x29, 144]
+	cmp	x0, x19
+	bne	.L3476
+.L3468:
+	add	x22, x22, 1
+	b	.L3467
+.L3476:
+	ldr	x0, [x27, #:lo12:.LANCHOR160]
+	ldr	w20, [x0, x19]
+	cmn	w20, #1
+	beq	.L3471
+	ldr	x0, [x29, 104]
+	ldr	w1, [x29, 156]
+	ldrb	w0, [x0]
+	lsl	w0, w0, 7
+	udiv	w0, w20, w0
+	cmp	w1, w0, uxth
+	bne	.L3471
+	adrp	x0, .LANCHOR161
+	ldr	x0, [x0, #:lo12:.LANCHOR161]
+	ldr	w28, [x0, x19]
+	mov	w0, w20
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 172]
+	cmn	w0, #1
+	bne	.L3472
+	mov	w2, 0
+	add	x1, x29, 172
+	mov	w0, w20
+	bl	pm_log2phys
+.L3472:
+	ldr	w3, [x29, 172]
+	cmp	w28, w3
+	bne	.L3473
+	adrp	x0, .LANCHOR162
+	mov	w2, 1
+	add	x1, x29, 168
+	add	w25, w25, 1
+	ldr	x0, [x0, #:lo12:.LANCHOR162]
+	ldr	w0, [x0, x19]
+	str	w0, [x29, 168]
+	mov	w0, w20
+	bl	pm_log2phys
+	ldr	x0, [x29, 112]
+	ldrh	w2, [x0]
+	adrp	x0, .LANCHOR31
+	ldrb	w1, [x0, #:lo12:.LANCHOR31]
+	mov	w0, 24
+	lsr	w28, w28, w2
+	sub	w0, w0, w1
+	sub	w1, w0, w2
+	mov	w0, 1
+	lsl	w0, w0, w1
+	sub	w0, w0, #1
+	and	w28, w0, w28
+	adrp	x0, .LANCHOR81
+	ldrb	w0, [x0, #:lo12:.LANCHOR81]
+	udiv	w0, w28, w0
+.L3499:
+	bl	ftl_vpn_decrement
+	ldr	x0, [x27, #:lo12:.LANCHOR160]
+	mov	w1, -1
+	str	w1, [x0, x19]
+.L3471:
+	add	x19, x19, 4
+	b	.L3470
+.L3473:
+	ldr	w0, [x24, #:lo12:.LANCHOR19]
+	tbz	x0, 8, .L3475
+	ldr	x0, [x29, 120]
+	mov	w2, w28
+	mov	w1, w20
+	bl	printf
+.L3475:
+	ldr	x0, [x29, 136]
+	ldrh	w0, [x0]
+	b	.L3499
+	.size	gc_update_l2p_map_new, .-gc_update_l2p_map_new
+	.section	.text.gc_scan_src_blk_one_page,"ax",@progbits
+	.align	2
+	.global	gc_scan_src_blk_one_page
+	.type	gc_scan_src_blk_one_page, %function
+gc_scan_src_blk_one_page:
+	stp	x29, x30, [sp, -96]!
+	mov	w3, 0
+	mov	w4, 0
+	mov	w5, 65535
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR76
+	add	x1, x20, :lo12:.LANCHOR76
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	adrp	x21, .LANCHOR85
+	stp	x25, x26, [sp, 64]
+	ldrb	w6, [x21, #:lo12:.LANCHOR85]
+	ldrb	w0, [x1, 4]
+	add	x2, x1, x0, sxtw 1
+	ldrh	w22, [x2, 40]
+	ldrh	w2, [x1, 2]
+.L3501:
+	cmp	w22, w5
+	beq	.L3503
+	cbz	w4, .L3504
+	add	x1, x20, :lo12:.LANCHOR76
+	strh	w2, [x1, 2]
+.L3504:
+	cbz	w3, .L3505
+	add	x1, x20, :lo12:.LANCHOR76
+	strb	w0, [x1, 4]
+.L3505:
+	mov	w0, 1
+	adrp	x23, .LANCHOR117
+	bl	buf_alloc
+	adrp	x24, .LANCHOR35
+	mov	x25, x0
+	add	x23, x23, :lo12:.LANCHOR117
+	add	x24, x24, :lo12:.LANCHOR35
+	mov	w26, 1
+.L3506:
+	add	x19, x20, :lo12:.LANCHOR76
+	ldrb	w1, [x19, 6]
+	cmp	w26, w1
+	ble	.L3516
+	mov	x0, x25
+	bl	zbuf_free
+	ldrb	w0, [x19, 4]
+	ldrb	w1, [x21, #:lo12:.LANCHOR85]
+	add	w0, w0, 1
+	and	w0, w0, 255
+	strb	w0, [x19, 4]
+	cmp	w1, w0
+	bne	.L3500
+	ldrh	w0, [x19, 2]
+	strb	wzr, [x19, 4]
+	add	w0, w0, 1
+	strh	w0, [x19, 2]
+.L3500:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	ret
+.L3503:
+	add	w0, w0, 1
+	and	w0, w0, 255
+	cmp	w0, w6
+	bne	.L3502
+	add	w2, w2, 1
+	mov	w0, 0
+	and	w2, w2, 65535
+	mov	w4, 1
+.L3502:
+	add	x3, x1, x0, sxtw 1
+	ldrh	w22, [x3, 40]
+	mov	w3, 1
+	b	.L3501
+.L3516:
 	ldrh	w0, [x23]
 	cmp	w1, 2
 	mul	w0, w0, w22
-	bne	.L3454
+	bne	.L3507
 	ldrh	w1, [x19, 2]
 	lsl	w1, w1, 1
-.L3473:
+.L3526:
 	sub	w1, w1, #1
 	add	w0, w26, w0
 	add	w0, w1, w0
-	adrp	x1, .LANCHOR78
-	ldrb	w1, [x1, #:lo12:.LANCHOR78]
+	adrp	x1, .LANCHOR84
+	ldrb	w1, [x1, #:lo12:.LANCHOR84]
 	orr	w0, w0, w1, lsl 24
-.L3472:
+.L3525:
 	str	w0, [x25, 40]
 	mov	w1, 1
 	mov	x0, x25
@@ -22154,64 +22168,64 @@ gc_scan_src_blk_one_page:
 	ldr	w0, [x25, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L3460
+	beq	.L3513
 	ldr	x0, [x25, 24]
 	ldr	w19, [x0, 4]
 	mov	w0, w19
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 92]
 	cmn	w0, #1
-	bne	.L3461
-	adrp	x0, .LANCHOR128
-	ldr	w0, [x0, #:lo12:.LANCHOR128]
+	bne	.L3514
+	adrp	x0, .LANCHOR219
+	ldr	w0, [x0, #:lo12:.LANCHOR219]
 	cmp	w19, w0
-	bcs	.L3461
+	bcs	.L3514
 	mov	w2, 0
 	add	x1, x29, 92
 	mov	w0, w19
 	bl	pm_log2phys
-.L3461:
+.L3514:
 	ldr	w2, [x25, 40]
 	ldr	w0, [x29, 92]
 	cmp	w2, w0
-	bne	.L3460
-	add	x1, x20, :lo12:.LANCHOR70
-	adrp	x4, .LANCHOR76
-	ldr	x4, [x4, #:lo12:.LANCHOR76]
+	bne	.L3513
+	add	x1, x20, :lo12:.LANCHOR76
+	adrp	x4, .LANCHOR82
+	ldr	x4, [x4, #:lo12:.LANCHOR82]
 	ldrh	w0, [x1, 24]
 	ubfiz	x3, x0, 2, 16
 	add	w0, w0, 1
 	str	w2, [x4, x3]
 	strh	w0, [x1, 24]
-.L3460:
-	add	x1, x20, :lo12:.LANCHOR70
+.L3513:
+	add	x1, x20, :lo12:.LANCHOR76
 	add	w26, w26, 1
 	ldrh	w0, [x1, 26]
 	add	w0, w0, 1
 	strh	w0, [x1, 26]
-	b	.L3453
-.L3454:
+	b	.L3506
+.L3507:
 	cmp	w1, 3
-	bne	.L3456
+	bne	.L3509
 	ldrb	w1, [x24]
-	cbnz	w1, .L3457
+	cbnz	w1, .L3510
 	adrp	x1, .LANCHOR36
 	ldrb	w1, [x1, #:lo12:.LANCHOR36]
-	cbz	w1, .L3458
-.L3457:
-	add	x1, x20, :lo12:.LANCHOR70
+	cbz	w1, .L3511
+.L3510:
+	add	x1, x20, :lo12:.LANCHOR76
 	ldrh	w1, [x1, 2]
 	add	w1, w1, w1, lsl 1
-	b	.L3473
-.L3458:
+	b	.L3526
+.L3511:
 	ldrh	w1, [x19, 2]
 	add	w0, w1, w0
 	orr	w0, w0, w26, lsl 24
-	b	.L3472
-.L3456:
+	b	.L3525
+.L3509:
 	ldrh	w1, [x19, 2]
 	add	w0, w1, w0
-	b	.L3472
+	b	.L3525
 	.size	gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page
 	.section	.text.gc_scan_src_blk,"ax",@progbits
 	.align	2
@@ -22222,51 +22236,51 @@ gc_scan_src_blk:
 	mov	w0, 65535
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR70
+	adrp	x21, .LANCHOR76
 	stp	x19, x20, [sp, 16]
-	ldrh	w1, [x21, #:lo12:.LANCHOR70]
+	ldrh	w1, [x21, #:lo12:.LANCHOR76]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w1, w0
 	stp	x27, x28, [sp, 80]
-	bne	.L3475
-	adrp	x1, .LANCHOR227
+	bne	.L3528
+	adrp	x1, .LANCHOR230
 	adrp	x0, .LC0
 	mov	w2, 1505
-	add	x1, x1, :lo12:.LANCHOR227
+	add	x1, x1, :lo12:.LANCHOR230
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3475:
-	ldrh	w1, [x21, #:lo12:.LANCHOR70]
+.L3528:
+	ldrh	w1, [x21, #:lo12:.LANCHOR76]
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L3505
+	beq	.L3558
 	adrp	x0, .LANCHOR19
 	ldr	w0, [x0, #:lo12:.LANCHOR19]
-	tbz	x0, 8, .L3477
+	tbz	x0, 8, .L3530
 	adrp	x2, .LANCHOR11
 	ubfiz	x0, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR11]
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC220
-	add	x0, x0, :lo12:.LC220
+	adrp	x0, .LC213
+	add	x0, x0, :lo12:.LC213
 	bl	printf
-.L3477:
-	ldrh	w0, [x21, #:lo12:.LANCHOR70]
-	add	x14, x21, :lo12:.LANCHOR70
+.L3530:
+	ldrh	w0, [x21, #:lo12:.LANCHOR76]
+	add	x14, x21, :lo12:.LANCHOR76
 	add	x1, x14, 40
 	bl	ftl_get_blk_list_in_sblk
 	and	w1, w0, 255
 	strb	w1, [x14, 5]
-	cbnz	w1, .L3478
+	cbnz	w1, .L3531
 	mov	w0, -1
-	strh	w0, [x21, #:lo12:.LANCHOR70]
-.L3505:
+	strh	w0, [x21, #:lo12:.LANCHOR76]
+.L3558:
 	mov	w0, 0
-	b	.L3474
-.L3478:
+	b	.L3527
+.L3531:
 	adrp	x4, .LANCHOR9
-	ldrh	w3, [x21, #:lo12:.LANCHOR70]
+	ldrh	w3, [x21, #:lo12:.LANCHOR76]
 	mov	x19, x4
 	ldr	x1, [x4, #:lo12:.LANCHOR9]
 	mov	x2, x3
@@ -22274,65 +22288,65 @@ gc_scan_src_blk:
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 32
-	beq	.L3479
+	beq	.L3532
 	cmp	w1, 224
-	beq	.L3479
-	cbz	w1, .L3480
+	beq	.L3532
+	cbz	w1, .L3533
 	adrp	x1, .LANCHOR12
 	ldr	x1, [x1, #:lo12:.LANCHOR12]
 	ldrh	w3, [x1, 16]
 	cmp	w3, w2
-	beq	.L3479
+	beq	.L3532
 	ldrh	w3, [x1, 48]
 	cmp	w3, w2
-	beq	.L3479
+	beq	.L3532
 	ldrh	w1, [x1, 80]
 	cmp	w1, w2
-	bne	.L3525
-.L3479:
-	add	x0, x21, :lo12:.LANCHOR70
+	bne	.L3578
+.L3532:
+	add	x0, x21, :lo12:.LANCHOR76
 	mov	w1, -1
-	strh	w1, [x21, #:lo12:.LANCHOR70]
+	strh	w1, [x21, #:lo12:.LANCHOR76]
 	strh	wzr, [x0, 24]
-	b	.L3505
-.L3480:
+	b	.L3558
+.L3533:
 	adrp	x0, .LANCHOR11
 	mov	x19, x0
 	ldr	x1, [x0, #:lo12:.LANCHOR11]
 	ldrh	w1, [x1, x3, lsl 1]
-	cbz	w1, .L3482
-	adrp	x1, .LANCHOR227
+	cbz	w1, .L3535
+	adrp	x1, .LANCHOR230
 	adrp	x0, .LC0
 	mov	w2, 1530
-	add	x1, x1, :lo12:.LANCHOR227
+	add	x1, x1, :lo12:.LANCHOR230
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3482:
-	ldrh	w1, [x21, #:lo12:.LANCHOR70]
+.L3535:
+	ldrh	w1, [x21, #:lo12:.LANCHOR76]
 	ldr	x0, [x19, #:lo12:.LANCHOR11]
 	strh	wzr, [x0, x1, lsl 1]
-	b	.L3479
-.L3525:
+	b	.L3532
+.L3578:
 	and	w0, w0, 255
 	sub	w0, w0, #1
 	add	x0, x14, x0, sxtw 1
 	ldrh	w24, [x0, 40]
 	mov	w0, 65535
 	cmp	w24, w0
-	bne	.L3483
-	adrp	x1, .LANCHOR227
+	bne	.L3536
+	adrp	x1, .LANCHOR230
 	adrp	x0, .LC0
 	mov	w2, 1540
-	add	x1, x1, :lo12:.LANCHOR227
+	add	x1, x1, :lo12:.LANCHOR230
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3483:
-	ldrh	w1, [x21, #:lo12:.LANCHOR70]
-	adrp	x23, .LANCHOR111
+.L3536:
+	ldrh	w1, [x21, #:lo12:.LANCHOR76]
+	adrp	x23, .LANCHOR117
 	ldr	x2, [x19, #:lo12:.LANCHOR9]
-	adrp	x22, .LANCHOR94
-	ldrh	w20, [x23, #:lo12:.LANCHOR111]
-	ldrh	w0, [x22, #:lo12:.LANCHOR94]
+	adrp	x22, .LANCHOR100
+	ldrh	w20, [x23, #:lo12:.LANCHOR117]
+	ldrh	w0, [x22, #:lo12:.LANCHOR100]
 	add	x1, x2, x1, lsl 2
 	sub	w0, w0, #1
 	and	w0, w0, 65535
@@ -22340,31 +22354,31 @@ gc_scan_src_blk:
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 160
-	bne	.L3506
-	adrp	x1, .LANCHOR78
-	ldrb	w1, [x1, #:lo12:.LANCHOR78]
+	bne	.L3559
+	adrp	x1, .LANCHOR84
+	ldrb	w1, [x1, #:lo12:.LANCHOR84]
 	and	w27, w1, 65535
 	cmp	w1, 2
 	orr	w20, w20, w1, lsl 24
-	bne	.L3485
-	adrp	x0, .LANCHOR85
-	ldrh	w0, [x0, #:lo12:.LANCHOR85]
+	bne	.L3538
+	adrp	x0, .LANCHOR91
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	sub	w0, w0, #1
 	and	w0, w0, 65535
-.L3485:
+.L3538:
 	adrp	x1, .LANCHOR35
 	ldrb	w1, [x1, #:lo12:.LANCHOR35]
-	cbnz	w1, .L3486
+	cbnz	w1, .L3539
 	adrp	x1, .LANCHOR36
 	ldrb	w1, [x1, #:lo12:.LANCHOR36]
-	cbz	w1, .L3484
-.L3486:
-	adrp	x0, .LANCHOR85
-	ldrh	w0, [x0, #:lo12:.LANCHOR85]
+	cbz	w1, .L3537
+.L3539:
+	adrp	x0, .LANCHOR91
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	sub	w0, w0, #1
 	and	w0, w0, 65535
-.L3484:
-	add	x25, x21, :lo12:.LANCHOR70
+.L3537:
+	add	x25, x21, :lo12:.LANCHOR76
 	orr	w20, w0, w20
 	mov	w0, 1
 	strb	w27, [x25, 6]
@@ -22381,13 +22395,13 @@ gc_scan_src_blk:
 	ldr	w0, [x19, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3487
-.L3530:
+	bne	.L3540
+.L3583:
 	mov	x0, x19
 	bl	zbuf_free
-.L3528:
+.L3581:
 	mov	w0, -1
-.L3474:
+.L3527:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -22395,43 +22409,43 @@ gc_scan_src_blk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L3506:
+.L3559:
 	mov	w27, 1
-	b	.L3484
-.L3487:
+	b	.L3537
+.L3540:
 	ldr	x7, [x19, 24]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	ldr	w1, [x7]
 	cmp	w1, w0
-	beq	.L3488
+	beq	.L3541
 	mov	w2, 1578
-.L3531:
-	adrp	x1, .LANCHOR227
+.L3584:
+	adrp	x1, .LANCHOR230
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR227
+	add	x1, x1, :lo12:.LANCHOR230
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3530
-.L3488:
-	adrp	x0, .LANCHOR79
-	ldrh	w26, [x22, #:lo12:.LANCHOR94]
-	ldrb	w25, [x0, #:lo12:.LANCHOR79]
+	b	.L3583
+.L3541:
+	adrp	x0, .LANCHOR85
+	ldrh	w26, [x22, #:lo12:.LANCHOR100]
+	ldrb	w25, [x0, #:lo12:.LANCHOR85]
 	adrp	x0, .LANCHOR224
 	ldrb	w0, [x0, #:lo12:.LANCHOR224]
 	mul	w26, w25, w26
 	cmp	w0, 2
 	mul	w26, w27, w26
 	and	w26, w26, 65535
-	bne	.L3489
+	bne	.L3542
 	cmp	w27, 3
-	bne	.L3489
-	adrp	x1, .LANCHOR85
+	bne	.L3542
+	adrp	x1, .LANCHOR91
 	adrp	x28, .LANCHOR221
-	adrp	x27, .LANCHOR76
-	ldrh	w1, [x1, #:lo12:.LANCHOR85]
+	adrp	x27, .LANCHOR82
+	ldrh	w1, [x1, #:lo12:.LANCHOR91]
 	ldrh	w0, [x28, #:lo12:.LANCHOR221]
-	ldr	x3, [x27, #:lo12:.LANCHOR76]
+	ldr	x3, [x27, #:lo12:.LANCHOR82]
 	ubfiz	w1, w1, 2, 14
 	mul	w25, w25, w1
 	ldr	x1, [x19, 8]
@@ -22443,100 +22457,100 @@ gc_scan_src_blk:
 	bl	ftl_memcpy
 	ldr	x0, [x19, 24]
 	ldr	w6, [x0, 4]
-	cbz	w6, .L3490
+	cbz	w6, .L3543
 	ldr	x0, [x19, 8]
 	mov	w1, w25
 	bl	js_hash
 	cmp	w6, w0
-	beq	.L3490
+	beq	.L3543
 	mov	x0, x19
 	bl	zbuf_free
 	ldr	x0, [x19, 24]
 	mov	w3, w25
-.L3529:
+.L3582:
 	ldr	w1, [x0, 4]
-	adrp	x0, .LC221
+	adrp	x0, .LC214
 	ldr	w2, [x19, 40]
-	add	x0, x0, :lo12:.LC221
+	add	x0, x0, :lo12:.LC214
 	bl	printf
-	b	.L3528
-.L3490:
+	b	.L3581
+.L3543:
 	adrp	x0, .LANCHOR35
 	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbnz	w0, .L3491
+	cbnz	w0, .L3544
 	adrp	x0, .LANCHOR36
 	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbz	w0, .L3492
-.L3491:
+	cbz	w0, .L3545
+.L3544:
 	sub	w0, w20, #1
 	str	w0, [x19, 40]
-.L3493:
+.L3546:
 	mov	w1, 1
 	mov	x0, x19
 	bl	sblk_read_page
 	ldr	w0, [x19, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L3530
+	beq	.L3583
 	ldr	x0, [x19, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L3495
+	beq	.L3548
 	mov	w2, 1619
-	b	.L3531
-.L3492:
-	ldrh	w1, [x23, #:lo12:.LANCHOR111]
-	ldrh	w0, [x22, #:lo12:.LANCHOR94]
+	b	.L3584
+.L3545:
+	ldrh	w1, [x23, #:lo12:.LANCHOR117]
+	ldrh	w0, [x22, #:lo12:.LANCHOR100]
 	sub	w0, w0, #1
 	and	w0, w0, 65535
 	mul	w24, w1, w24
 	orr	w0, w0, 33554432
 	orr	w24, w0, w24
 	str	w24, [x19, 40]
-	b	.L3493
-.L3495:
+	b	.L3546
+.L3548:
 	ldrh	w2, [x28, #:lo12:.LANCHOR221]
-	ldr	x0, [x27, #:lo12:.LANCHOR76]
+	ldr	x0, [x27, #:lo12:.LANCHOR82]
 	ldr	x1, [x19, 8]
-.L3527:
-	adrp	x20, .LANCHOR76
+.L3580:
+	adrp	x20, .LANCHOR82
 	bl	ftl_memcpy
-	adrp	x22, .LANCHOR74
+	adrp	x22, .LANCHOR80
 	adrp	x23, .LANCHOR31
-	ldr	x24, [x20, #:lo12:.LANCHOR76]
-	add	x22, x22, :lo12:.LANCHOR74
+	ldr	x24, [x20, #:lo12:.LANCHOR82]
+	add	x22, x22, :lo12:.LANCHOR80
 	add	x23, x23, :lo12:.LANCHOR31
 	mov	x25, 0
-.L3498:
+.L3551:
 	cmp	w26, w25
-	bgt	.L3503
+	bgt	.L3556
 	mov	x0, x19
 	bl	zbuf_free
 	adrp	x0, .LANCHOR11
-	ldrh	w1, [x21, #:lo12:.LANCHOR70]
-	add	x3, x21, :lo12:.LANCHOR70
+	ldrh	w1, [x21, #:lo12:.LANCHOR76]
+	add	x3, x21, :lo12:.LANCHOR76
 	mov	x19, x0
 	ldr	x4, [x0, #:lo12:.LANCHOR11]
 	ubfiz	x2, x1, 1, 16
 	ldrh	w3, [x3, 24]
 	ldrh	w2, [x4, x2]
 	cmp	w2, w3
-	beq	.L3504
-	adrp	x0, .LC222
-	add	x0, x0, :lo12:.LC222
+	beq	.L3557
+	adrp	x0, .LC215
+	add	x0, x0, :lo12:.LC215
 	bl	printf
-.L3504:
-	add	x0, x21, :lo12:.LANCHOR70
-	ldrh	w2, [x21, #:lo12:.LANCHOR70]
+.L3557:
+	add	x0, x21, :lo12:.LANCHOR76
+	ldrh	w2, [x21, #:lo12:.LANCHOR76]
 	ldr	x1, [x19, #:lo12:.LANCHOR11]
 	ldrh	w3, [x0, 24]
 	strh	w3, [x1, x2, lsl 1]
 	strh	wzr, [x0, 28]
 	ldrh	w0, [x0, 24]
-	b	.L3474
-.L3489:
+	b	.L3527
+.L3542:
 	ldr	x6, [x19, 8]
 	lsl	w20, w26, 2
 	mov	w1, w20
@@ -22544,31 +22558,31 @@ gc_scan_src_blk:
 	bl	js_hash
 	ldr	w1, [x7, 4]
 	cmp	w1, w0
-	beq	.L3497
+	beq	.L3550
 	mov	x0, x19
 	bl	zbuf_free
 	mov	w3, w20
 	ldr	x0, [x19, 24]
-	b	.L3529
-.L3497:
-	adrp	x0, .LANCHOR76
+	b	.L3582
+.L3550:
+	adrp	x0, .LANCHOR82
 	mov	w2, w20
 	mov	x1, x6
-	ldr	x0, [x0, #:lo12:.LANCHOR76]
-	b	.L3527
-.L3503:
+	ldr	x0, [x0, #:lo12:.LANCHOR82]
+	b	.L3580
+.L3556:
 	ldr	w0, [x24, x25, lsl 2]
 	cmn	w0, #1
-	beq	.L3500
+	beq	.L3553
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 108]
 	cmn	w0, #1
-	bne	.L3501
+	bne	.L3554
 	ldr	w0, [x24, x25, lsl 2]
 	mov	w2, 0
 	add	x1, x29, 108
 	bl	pm_log2phys
-.L3501:
+.L3554:
 	ldrb	w0, [x23]
 	mov	w1, 24
 	ldrh	w2, [x22]
@@ -22577,25 +22591,25 @@ gc_scan_src_blk:
 	sub	w1, w0, w2
 	mov	w0, 1
 	lsl	w0, w0, w1
-	adrp	x1, .LANCHOR75
+	adrp	x1, .LANCHOR81
 	sub	w0, w0, #1
 	lsr	w2, w3, w2
-	ldrb	w1, [x1, #:lo12:.LANCHOR75]
+	ldrb	w1, [x1, #:lo12:.LANCHOR81]
 	and	w0, w0, w2
-	ldrh	w2, [x21, #:lo12:.LANCHOR70]
+	ldrh	w2, [x21, #:lo12:.LANCHOR76]
 	udiv	w0, w0, w1
-	add	x1, x21, :lo12:.LANCHOR70
+	add	x1, x21, :lo12:.LANCHOR76
 	cmp	w0, w2
-	bne	.L3500
+	bne	.L3553
 	ldrh	w0, [x1, 24]
-	ldr	x4, [x20, #:lo12:.LANCHOR76]
+	ldr	x4, [x20, #:lo12:.LANCHOR82]
 	ubfiz	x2, x0, 2, 16
 	add	w0, w0, 1
 	str	w3, [x4, x2]
 	strh	w0, [x1, 24]
-.L3500:
+.L3553:
 	add	x25, x25, 1
-	b	.L3498
+	b	.L3551
 	.size	gc_scan_src_blk, .-gc_scan_src_blk
 	.section	.text.gc_scan_static_data,"ax",@progbits
 	.align	2
@@ -22611,13 +22625,13 @@ gc_scan_static_data:
 	ldr	w1, [x0, 544]
 	str	x23, [sp, 48]
 	cmn	w1, #1
-	beq	.L3533
-	adrp	x21, .LANCHOR228
+	beq	.L3586
+	adrp	x21, .LANCHOR231
 	adrp	x22, .LC0
-	add	x21, x21, :lo12:.LANCHOR228
+	add	x21, x21, :lo12:.LANCHOR231
 	add	x22, x22, :lo12:.LC0
 	mov	w20, 0
-.L3541:
+.L3594:
 	ldr	x0, [x19, #:lo12:.LANCHOR12]
 	mov	w2, 0
 	add	x1, x29, 76
@@ -22625,7 +22639,7 @@ gc_scan_static_data:
 	bl	pm_log2phys
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L3534
+	beq	.L3587
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 76]
@@ -22635,10 +22649,10 @@ gc_scan_static_data:
 	bl	sblk_read_page
 	ldr	w0, [x23, 52]
 	cmp	w0, 256
-	bne	.L3535
-	adrp	x0, .LANCHOR74
+	bne	.L3588
+	adrp	x0, .LANCHOR80
 	ldr	w2, [x29, 76]
-	ldrh	w3, [x0, #:lo12:.LANCHOR74]
+	ldrh	w3, [x0, #:lo12:.LANCHOR80]
 	adrp	x0, .LANCHOR31
 	ldrb	w1, [x0, #:lo12:.LANCHOR31]
 	mov	w0, 24
@@ -22649,34 +22663,34 @@ gc_scan_static_data:
 	lsl	w0, w1, w0
 	sub	w0, w0, #1
 	and	w0, w0, w2
-	adrp	x2, .LANCHOR75
-	ldrb	w3, [x2, #:lo12:.LANCHOR75]
+	adrp	x2, .LANCHOR81
+	ldrb	w3, [x2, #:lo12:.LANCHOR81]
 	mov	w2, 0
 	udiv	w0, w0, w3
 	bl	gc_add_sblk
-.L3535:
+.L3588:
 	ldr	x0, [x19, #:lo12:.LANCHOR12]
 	ldr	x1, [x23, 24]
 	ldr	w0, [x0, 544]
 	ldr	w1, [x1, 4]
 	cmp	w1, w0
-	beq	.L3536
+	beq	.L3589
 	mov	w2, 2163
 	mov	x1, x21
 	mov	x0, x22
 	bl	printf
-.L3536:
+.L3589:
 	mov	x0, x23
 	bl	zbuf_free
-.L3534:
+.L3587:
 	ldr	x0, [x19, #:lo12:.LANCHOR12]
-	adrp	x2, .LANCHOR128
-	ldr	w2, [x2, #:lo12:.LANCHOR128]
+	adrp	x2, .LANCHOR219
+	ldr	w2, [x2, #:lo12:.LANCHOR219]
 	ldr	w1, [x0, 544]
 	add	w1, w1, 1
 	str	w1, [x0, 544]
 	cmp	w1, w2
-	bcc	.L3537
+	bcc	.L3590
 	mov	w1, -1
 	str	w1, [x0, 544]
 	ldr	w1, [x0, 548]
@@ -22687,46 +22701,46 @@ gc_scan_static_data:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-.L3532:
+.L3585:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L3537:
+.L3590:
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	bne	.L3532
+	bne	.L3585
 	adrp	x1, .LANCHOR221
 	add	w0, w20, 1
 	and	w0, w0, 65535
 	ldrh	w1, [x1, #:lo12:.LANCHOR221]
 	cmp	w20, w1, lsr 2
-	bcs	.L3532
+	bcs	.L3585
 	mov	w20, w0
-	b	.L3541
-.L3533:
+	b	.L3594
+.L3586:
 	ldr	w1, [x0, 536]
-	adrp	x3, .LANCHOR110
+	adrp	x3, .LANCHOR69
 	ldr	w2, [x0, 12]
 	add	w1, w1, 12959744
 	add	w1, w1, 256
 	cmp	w2, w1
-	bhi	.L3543
-	ldr	x4, [x3, #:lo12:.LANCHOR110]
+	bhi	.L3596
+	ldr	x4, [x3, #:lo12:.LANCHOR69]
 	mov	w5, 5000
 	ldr	w1, [x0, 540]
 	add	w1, w1, w5
 	ldr	w4, [x4, 44]
 	cmp	w4, w1
-	bls	.L3532
-.L3543:
-	ldr	x1, [x3, #:lo12:.LANCHOR110]
+	bls	.L3585
+.L3596:
+	ldr	x1, [x3, #:lo12:.LANCHOR69]
 	ldr	w1, [x1, 44]
 	str	w1, [x0, 540]
 	str	w2, [x0, 536]
 	str	wzr, [x0, 544]
-	b	.L3532
+	b	.L3585
 	.size	gc_scan_static_data, .-gc_scan_static_data
 	.section	.text.ftl_sblk_dump,"ax",@progbits
 	.align	2
@@ -22752,49 +22766,49 @@ ftl_sblk_dump:
 	ldrb	w2, [x1, 2]
 	mov	w1, w20
 	ldrh	w4, [x0, x23]
-	adrp	x0, .LC223
+	adrp	x0, .LC216
 	stp	x27, x28, [sp, 128]
 	ubfx	x5, x5, 11, 8
 	ubfx	x3, x2, 3, 2
 	and	w4, w4, 2047
 	ubfx	x2, x2, 5, 3
-	add	x0, x0, :lo12:.LC223
+	add	x0, x0, :lo12:.LC216
 	bl	printf
 	mov	w0, 65535
 	cmp	w20, w0
-	beq	.L3572
+	beq	.L3625
 	adrp	x0, .LANCHOR8
 	ldrh	w0, [x0, #:lo12:.LANCHOR8]
 	cmp	w0, w20
-	bls	.L3572
+	bls	.L3625
 	ldr	x0, [x24, #:lo12:.LANCHOR9]
 	add	x0, x0, x23
 	ldrb	w0, [x0, 2]
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L3573
-	adrp	x0, .LANCHOR78
-	ldrb	w25, [x0, #:lo12:.LANCHOR78]
-.L3551:
+	bne	.L3626
+	adrp	x0, .LANCHOR84
+	ldrb	w25, [x0, #:lo12:.LANCHOR84]
+.L3604:
 	add	x28, x29, 240
-	adrp	x21, .LANCHOR94
+	adrp	x21, .LANCHOR100
 	mov	w0, w20
 	mov	w19, 0
 	strh	w20, [x28, -32]!
 	add	x1, x28, 16
 	bl	ftl_get_blk_list_in_sblk
-	ldrh	w2, [x21, #:lo12:.LANCHOR94]
+	ldrh	w2, [x21, #:lo12:.LANCHOR100]
 	and	w1, w0, 255
 	strb	w1, [x29, 217]
 	and	w4, w0, 255
 	strb	wzr, [x29, 213]
 	mov	w3, w25
 	strh	wzr, [x29, 210]
-	adrp	x0, .LC224
+	adrp	x0, .LC217
 	mul	w1, w1, w2
 	strh	wzr, [x29, 218]
 	strh	w1, [x29, 214]
-	add	x0, x0, :lo12:.LC224
+	add	x0, x0, :lo12:.LC217
 	ldr	x1, [x24, #:lo12:.LANCHOR9]
 	add	x1, x1, x23
 	ldrb	w2, [x1, 2]
@@ -22806,59 +22820,59 @@ ftl_sblk_dump:
 	str	x21, [x29, 136]
 	mov	x26, x0
 	stp	wzr, wzr, [x29, 168]
-	adrp	x0, .LANCHOR111
+	adrp	x0, .LANCHOR117
 	str	wzr, [x29, 176]
-	add	x0, x0, :lo12:.LANCHOR111
+	add	x0, x0, :lo12:.LANCHOR117
 	str	x0, [x29, 112]
-.L3552:
+.L3605:
 	ldr	x0, [x29, 136]
-	ldrh	w0, [x0, #:lo12:.LANCHOR94]
+	ldrh	w0, [x0, #:lo12:.LANCHOR100]
 	cmp	w0, w19
-	bls	.L3569
+	bls	.L3622
 	lsl	w0, w19, 1
 	mov	w22, 0
 	sub	w1, w0, #1
 	add	w0, w0, w19
 	sub	w0, w0, #1
 	stp	w1, w0, [x29, 152]
-	adrp	x0, .LC160
-	add	x0, x0, :lo12:.LC160
+	adrp	x0, .LC161
+	add	x0, x0, :lo12:.LC161
 	str	x0, [x29, 120]
-	b	.L3570
-.L3573:
+	b	.L3623
+.L3626:
 	mov	w25, 1
-	b	.L3551
-.L3566:
+	b	.L3604
+.L3619:
 	ldr	x0, [x29, 128]
 	ldrh	w11, [x28, x0]
 	mov	w0, 65535
 	cmp	w11, w0
-	beq	.L3553
+	beq	.L3606
 	ldr	x0, [x29, 112]
 	cmp	w25, 3
 	ldrh	w8, [x0]
 	mul	w1, w8, w11
 	add	w0, w21, w1
-	bne	.L3554
+	bne	.L3607
 	adrp	x2, .LANCHOR35
 	ldrb	w2, [x2, #:lo12:.LANCHOR35]
-	cbz	w2, .L3555
-	adrp	x1, .LANCHOR78
-	ldrb	w8, [x1, #:lo12:.LANCHOR78]
+	cbz	w2, .L3608
+	adrp	x1, .LANCHOR84
+	ldrb	w8, [x1, #:lo12:.LANCHOR84]
 	ldr	w1, [x29, 156]
-.L3582:
+.L3635:
 	add	w0, w0, w1
 	orr	w27, w0, w8, lsl 24
-	b	.L3556
-.L3555:
+	b	.L3609
+.L3608:
 	adrp	x2, .LANCHOR36
 	lsl	w8, w21, 24
 	ldrb	w2, [x2, #:lo12:.LANCHOR36]
-	cbz	w2, .L3557
+	cbz	w2, .L3610
 	ldr	w1, [x29, 156]
 	add	w0, w0, w1
 	orr	w27, w0, w8
-.L3556:
+.L3609:
 	str	w27, [x26, 40]
 	mov	w1, 1
 	str	w11, [x29, 100]
@@ -22900,22 +22914,22 @@ ftl_sblk_dump:
 	and	w0, w0, 224
 	cmp	w0, 224
 	ccmp	w0, w1, 4, ne
-	beq	.L3553
+	beq	.L3606
 	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 204]
 	cmn	w0, #1
-	bne	.L3560
+	bne	.L3613
 	ldr	x0, [x26, 24]
 	mov	w2, 0
 	add	x1, x29, 204
 	ldr	w0, [x0, 4]
 	bl	pm_log2phys
-.L3560:
+.L3613:
 	ldr	w0, [x29, 204]
 	cmp	w27, w0
-	bne	.L3561
+	bne	.L3614
 	ldr	w0, [x29, 172]
 	mov	w1, w27
 	add	w0, w0, 1
@@ -22923,12 +22937,12 @@ ftl_sblk_dump:
 	ldr	x0, [x26, 24]
 	ldr	w3, [x29, 172]
 	ldr	w2, [x0, 4]
-	adrp	x0, .LC225
-	add	x0, x0, :lo12:.LC225
+	adrp	x0, .LC218
+	add	x0, x0, :lo12:.LC218
 	bl	printf
-.L3561:
+.L3614:
 	ldr	x0, [x29, 160]
-	cbz	x0, .L3563
+	cbz	x0, .L3616
 	ldr	x0, [x29, 176]
 	ubfiz	x3, x0, 2, 32
 	ldr	x0, [x29, 160]
@@ -22936,72 +22950,72 @@ ftl_sblk_dump:
 	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	cmp	w0, w2
-	beq	.L3564
+	beq	.L3617
 	adrp	x0, .LANCHOR19
 	ldr	w0, [x0, #:lo12:.LANCHOR19]
-	tbz	x0, 12, .L3564
+	tbz	x0, 12, .L3617
 	ldr	w1, [x29, 176]
-	adrp	x0, .LC226
+	adrp	x0, .LC219
 	str	x3, [x29, 104]
-	add	x0, x0, :lo12:.LC226
+	add	x0, x0, :lo12:.LC219
 	bl	printf
 	ldr	x3, [x29, 104]
-.L3564:
+.L3617:
 	ldr	x1, [x26, 24]
 	ldr	x0, [x29, 160]
 	ldr	w1, [x1, 4]
 	ldr	w0, [x0, x3]
 	cmp	w1, w0
-	beq	.L3563
+	beq	.L3616
 	cmn	w0, #1
-	beq	.L3563
-	adrp	x1, .LANCHOR229
+	beq	.L3616
+	adrp	x1, .LANCHOR232
 	adrp	x0, .LC0
-	mov	w2, 1575
-	add	x1, x1, :lo12:.LANCHOR229
+	mov	w2, 1580
+	add	x1, x1, :lo12:.LANCHOR232
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3563:
+.L3616:
 	ldr	w0, [x29, 176]
 	add	w0, w0, 1
 	str	w0, [x29, 176]
-.L3553:
+.L3606:
 	add	w21, w21, 1
 	and	w21, w21, 65535
-.L3568:
+.L3621:
 	cmp	w25, w21
-	bcs	.L3566
+	bcs	.L3619
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L3570:
+.L3623:
 	ldrb	w0, [x29, 217]
 	cmp	w0, w22
-	bls	.L3567
+	bls	.L3620
 	sxtw	x0, w22
 	mov	w21, 1
 	add	x0, x0, 8
 	lsl	x0, x0, 1
 	str	x0, [x29, 128]
-	b	.L3568
-.L3557:
+	b	.L3621
+.L3610:
 	add	w1, w19, w1
 	orr	w27, w8, w1
-	b	.L3556
-.L3554:
+	b	.L3609
+.L3607:
 	cmp	w25, 2
-	bne	.L3558
-	adrp	x1, .LANCHOR78
-	ldrb	w8, [x1, #:lo12:.LANCHOR78]
+	bne	.L3611
+	adrp	x1, .LANCHOR84
+	ldrb	w8, [x1, #:lo12:.LANCHOR84]
 	ldr	w1, [x29, 152]
-	b	.L3582
-.L3558:
+	b	.L3635
+.L3611:
 	add	w27, w19, w1
-	b	.L3556
-.L3567:
+	b	.L3609
+.L3620:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L3552
-.L3569:
+	b	.L3605
+.L3622:
 	mov	x0, x26
 	bl	zbuf_free
 	adrp	x0, .LANCHOR11
@@ -23010,11 +23024,11 @@ ftl_sblk_dump:
 	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrh	w2, [x0, x1, lsl 1]
 	mov	w1, w20
-	adrp	x0, .LC227
-	add	x0, x0, :lo12:.LC227
+	adrp	x0, .LC220
+	add	x0, x0, :lo12:.LC220
 	bl	printf
 	ldr	w0, [x29, 168]
-.L3549:
+.L3602:
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
 	ldp	x23, x24, [sp, 96]
@@ -23023,9 +23037,9 @@ ftl_sblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 288
 	ret
-.L3572:
+.L3625:
 	mov	w0, 0
-	b	.L3549
+	b	.L3602
 	.size	ftl_sblk_dump, .-ftl_sblk_dump
 	.section	.text.zftl_read,"ax",@progbits
 	.align	2
@@ -23046,34 +23060,34 @@ zftl_read:
 	stp	x25, x26, [sp, 80]
 	mov	x22, x3
 	stp	x27, x28, [sp, 96]
-	tbz	x0, 12, .L3584
+	tbz	x0, 12, .L3637
 	mov	w3, w2
-	adrp	x0, .LC228
+	adrp	x0, .LC221
 	mov	w2, w1
-	add	x0, x0, :lo12:.LC228
+	add	x0, x0, :lo12:.LC221
 	mov	w1, w19
 	bl	printf
-.L3584:
-	cbnz	w19, .L3585
-	adrp	x0, .LANCHOR67
+.L3637:
+	cbnz	w19, .L3638
+	adrp	x0, .LANCHOR73
 	mov	w19, 24576
-	ldr	w0, [x0, #:lo12:.LANCHOR67]
-.L3586:
+	ldr	w0, [x0, #:lo12:.LANCHOR73]
+.L3639:
 	cmp	w0, w20
 	ccmp	w0, w23, 0, hi
-	bcc	.L3619
+	bcc	.L3672
 	add	w1, w20, w23
 	cmp	w0, w1
-	bcc	.L3619
-	adrp	x1, .LANCHOR110
-	adrp	x24, .LANCHOR131
+	bcc	.L3672
+	adrp	x1, .LANCHOR69
+	adrp	x24, .LANCHOR68
 	add	w19, w19, w20
 	str	x1, [x29, 112]
-	ldr	x2, [x1, #:lo12:.LANCHOR110]
+	ldr	x2, [x1, #:lo12:.LANCHOR69]
 	ldr	w0, [x2, 24]
 	add	w0, w0, w23
 	str	w0, [x2, 24]
-	ldrb	w0, [x24, #:lo12:.LANCHOR131]
+	ldrb	w0, [x24, #:lo12:.LANCHOR68]
 	udiv	w2, w19, w0
 	stp	wzr, w2, [x29, 152]
 	add	w2, w23, w19
@@ -23085,12 +23099,12 @@ zftl_read:
 	sub	w26, w0, w2
 	str	w0, [x29, 144]
 	add	w26, w26, 1
-	adrp	x0, .LANCHOR134
-	add	x28, x0, :lo12:.LANCHOR134
-.L3588:
-	cbnz	w26, .L3616
+	adrp	x0, .LANCHOR72
+	add	x28, x0, :lo12:.LANCHOR72
+.L3641:
+	cbnz	w26, .L3669
 	ldr	w0, [x29, 152]
-.L3583:
+.L3636:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -23099,23 +23113,23 @@ zftl_read:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 192
 	ret
-.L3585:
+.L3638:
 	cmp	w19, 3
-	bhi	.L3619
+	bhi	.L3672
 	lsl	w19, w19, 13
 	mov	w0, 8192
-	b	.L3586
-.L3616:
+	b	.L3639
+.L3669:
 	ldr	w0, [x29, 156]
-	ldrb	w1, [x24, #:lo12:.LANCHOR131]
+	ldrb	w1, [x24, #:lo12:.LANCHOR68]
 	cmp	w21, w0
 	ldr	w0, [x29, 144]
 	and	w25, w1, 65535
 	ccmp	w21, w0, 4, ne
-	bne	.L3620
+	bne	.L3673
 	ldr	w0, [x29, 156]
 	cmp	w21, w0
-	bne	.L3590
+	bne	.L3643
 	udiv	w3, w19, w1
 	and	w0, w23, 65535
 	msub	w1, w3, w1, w19
@@ -23124,17 +23138,17 @@ zftl_read:
 	and	w25, w25, 65535
 	cmp	w23, w25
 	csel	w25, w0, w25, cc
-.L3589:
+.L3642:
 	adrp	x20, .LANCHOR55
 	add	x1, x20, :lo12:.LANCHOR55
 	add	x1, x1, 2
 	mov	w0, 0
-.L3593:
+.L3646:
 	ldr	w2, [x1, 34]
 	cmp	w21, w2
-	bne	.L3591
+	bne	.L3644
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L3591
+	tbz	x2, 3, .L3644
 	add	x1, x20, :lo12:.LANCHOR55
 	ubfiz	x0, x0, 6, 32
 	add	x0, x1, x0
@@ -23146,88 +23160,88 @@ zftl_read:
 	add	x22, x22, x25
 	add	x1, x1, x27
 	bl	ftl_memcpy
-.L3592:
+.L3645:
 	add	w21, w21, 1
 	sub	w26, w26, #1
-.L3599:
+.L3652:
 	adrp	x0, .LANCHOR57
 	ldrb	w0, [x0, #:lo12:.LANCHOR57]
 	cmp	w0, 2
-	bls	.L3600
-	cbnz	w26, .L3588
-.L3600:
-	adrp	x0, .LANCHOR134
-	ldrb	w1, [x0, #:lo12:.LANCHOR134]
-	cbz	w1, .L3588
-	adrp	x25, .LANCHOR133
+	bls	.L3653
+	cbnz	w26, .L3641
+.L3653:
+	adrp	x0, .LANCHOR72
+	ldrb	w1, [x0, #:lo12:.LANCHOR72]
+	cbz	w1, .L3641
+	adrp	x25, .LANCHOR71
 	add	x0, x20, :lo12:.LANCHOR55
-	ldrb	w2, [x25, #:lo12:.LANCHOR133]
+	ldrb	w2, [x25, #:lo12:.LANCHOR71]
 	add	x0, x0, x2, lsl 6
 	bl	sblk_read_page
-	adrp	x0, .LANCHOR230
-	add	x0, x0, :lo12:.LANCHOR230
+	adrp	x0, .LANCHOR233
+	add	x0, x0, :lo12:.LANCHOR233
 	str	x0, [x29, 128]
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	str	x0, [x29, 120]
-.L3602:
+.L3655:
 	ldrb	w0, [x28]
-	cbnz	w0, .L3615
+	cbnz	w0, .L3668
 	mov	w0, -1
 	strb	wzr, [x28]
-	strb	w0, [x25, #:lo12:.LANCHOR133]
-	b	.L3588
-.L3590:
+	strb	w0, [x25, #:lo12:.LANCHOR71]
+	b	.L3641
+.L3643:
 	ldr	w0, [x29, 148]
 	msub	w25, w1, w21, w0
 	and	w25, w25, 255
-.L3620:
+.L3673:
 	mov	w27, 0
-	b	.L3589
-.L3591:
+	b	.L3642
+.L3644:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 16
-	bne	.L3593
+	bne	.L3646
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 172]
 	cmn	w0, #1
-	bne	.L3594
+	bne	.L3647
 	mov	w2, 0
 	add	x1, x29, 172
 	mov	w0, w21
 	bl	pm_log2phys
-.L3594:
+.L3647:
 	ldr	w0, [x29, 172]
 	cmn	w0, #1
-	bne	.L3595
-	add	x27, x24, :lo12:.LANCHOR131
+	bne	.L3648
+	add	x27, x24, :lo12:.LANCHOR68
 	mov	w25, 0
-.L3596:
+.L3649:
 	ldrb	w0, [x27]
 	cmp	w25, w0
-	bcs	.L3592
+	bcs	.L3645
 	madd	w0, w21, w0, w25
 	cmp	w19, w0
-	bhi	.L3597
+	bhi	.L3650
 	ldr	w1, [x29, 148]
 	cmp	w1, w0
-	bls	.L3597
+	bls	.L3650
 	mov	x0, x22
 	add	x22, x22, 512
 	mov	w2, 512
 	mov	w1, 0
 	bl	ftl_memset
-.L3597:
+.L3650:
 	add	w25, w25, 1
-	b	.L3596
-.L3595:
+	b	.L3649
+.L3648:
 	mov	w0, 0
 	bl	buf_alloc
-	cbz	x0, .L3599
+	cbz	x0, .L3652
 	ldr	x2, [x29, 112]
-	ldr	x4, [x2, #:lo12:.LANCHOR110]
+	ldr	x4, [x2, #:lo12:.LANCHOR69]
 	ldr	w2, [x4, 40]
 	add	w2, w2, 1
 	str	w2, [x4, 40]
@@ -23240,16 +23254,16 @@ zftl_read:
 	stp	w21, w2, [x0, 36]
 	str	w2, [x0, 44]
 	bl	zftl_add_read_buf
-	b	.L3592
-.L3615:
-	ldrb	w0, [x25, #:lo12:.LANCHOR133]
+	b	.L3645
+.L3668:
+	ldrb	w0, [x25, #:lo12:.LANCHOR71]
 	cmp	w0, 255
-	bne	.L3603
+	bne	.L3656
 	ldp	x0, x1, [x29, 120]
-	mov	w2, 1281
+	mov	w2, 1280
 	bl	printf
-.L3603:
-	ldrb	w27, [x25, #:lo12:.LANCHOR133]
+.L3656:
+	ldrb	w27, [x25, #:lo12:.LANCHOR71]
 	add	x0, x20, :lo12:.LANCHOR55
 	ubfiz	x1, x27, 6, 8
 	lsl	x2, x27, 6
@@ -23257,29 +23271,29 @@ zftl_read:
 	str	x1, [x29, 136]
 	add	x1, x0, x2
 	ldrb	w0, [x0, x2]
-	strb	w0, [x25, #:lo12:.LANCHOR133]
+	strb	w0, [x25, #:lo12:.LANCHOR71]
 	ldr	w10, [x1, 52]
 	cmn	w10, #1
-	bne	.L3604
+	bne	.L3657
 	adrp	x0, .LANCHOR12
 	str	w10, [x29, 152]
 	ldr	x1, [x0, #:lo12:.LANCHOR12]
 	ldr	w0, [x1, 552]
 	add	w0, w0, 1
 	str	w0, [x1, 552]
-.L3605:
+.L3658:
 	add	x0, x20, :lo12:.LANCHOR55
 	add	x0, x0, x27, lsl 6
 	ldr	x3, [x0, 24]
 	ldr	w0, [x0, 36]
 	ldr	w1, [x3, 4]
 	cmp	w1, w0
-	bne	.L3606
+	bne	.L3659
 	cmn	w10, #1
-	bne	.L3607
-.L3606:
+	bne	.L3660
+.L3659:
 	add	x0, x20, :lo12:.LANCHOR55
-	ldrb	w4, [x24, #:lo12:.LANCHOR131]
+	ldrb	w4, [x24, #:lo12:.LANCHOR68]
 	add	x0, x0, x27, lsl 6
 	mov	w5, 1
 	ldrb	w1, [x0, 56]
@@ -23299,17 +23313,17 @@ zftl_read:
 	and	w0, w0, w5
 	bl	flash_read_page_en
 	mov	w10, w0
-.L3607:
+.L3660:
 	add	x1, x20, :lo12:.LANCHOR55
 	add	x1, x1, x27, lsl 6
 	ldr	x0, [x1, 24]
 	ldr	w3, [x1, 36]
 	ldr	w1, [x0, 4]
 	cmp	w1, w3
-	bne	.L3609
+	bne	.L3662
 	cmn	w10, #1
-	bne	.L3610
-.L3609:
+	bne	.L3663
+.L3662:
 	adrp	x1, .LANCHOR12
 	add	x11, x20, :lo12:.LANCHOR55
 	add	x11, x11, x27, lsl 6
@@ -23325,13 +23339,13 @@ zftl_read:
 	mov	w2, w10
 	ldp	w5, w6, [x0]
 	ldr	w7, [x0, 8]
-	adrp	x0, .LC230
+	adrp	x0, .LC223
 	ldr	w4, [x11, 40]
-	add	x0, x0, :lo12:.LC230
+	add	x0, x0, :lo12:.LC223
 	bl	printf
-	adrp	x0, .LANCHOR74
+	adrp	x0, .LANCHOR80
 	ldr	x11, [x29, 96]
-	ldrh	w2, [x0, #:lo12:.LANCHOR74]
+	ldrh	w2, [x0, #:lo12:.LANCHOR80]
 	adrp	x0, .LANCHOR31
 	ldrb	w1, [x0, #:lo12:.LANCHOR31]
 	mov	w0, 24
@@ -23343,33 +23357,33 @@ zftl_read:
 	sub	w0, w0, #1
 	lsr	w1, w1, w2
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR75
-	ldrb	w2, [x1, #:lo12:.LANCHOR75]
+	adrp	x1, .LANCHOR81
+	ldrb	w2, [x1, #:lo12:.LANCHOR81]
 	mov	x1, 0
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
 	ldr	w10, [x29, 108]
-.L3610:
+.L3663:
 	add	x0, x20, :lo12:.LANCHOR55
 	add	x0, x0, x27, lsl 6
 	ldr	x1, [x0, 24]
 	ldr	w0, [x0, 36]
 	ldr	w1, [x1, 4]
 	cmp	w1, w0
-	bne	.L3611
+	bne	.L3664
 	cmn	w10, #1
-	bne	.L3612
-.L3611:
+	bne	.L3665
+.L3664:
 	ldp	x0, x1, [x29, 120]
-	mov	w2, 1317
+	mov	w2, 1316
 	bl	printf
-.L3612:
+.L3665:
 	add	x0, x20, :lo12:.LANCHOR55
 	add	x8, x0, x27, lsl 6
-	ldrb	w0, [x24, #:lo12:.LANCHOR131]
+	ldrb	w0, [x24, #:lo12:.LANCHOR68]
 	ldrb	w2, [x8, 56]
 	cmp	w0, w2
-	bls	.L3613
+	bls	.L3666
 	ldrb	w0, [x8, 57]
 	lsl	w2, w2, 9
 	ldr	x1, [x8, 8]
@@ -23377,7 +23391,7 @@ zftl_read:
 	add	x1, x1, x0
 	ldr	x0, [x8, 16]
 	bl	ftl_memcpy
-.L3614:
+.L3667:
 	ldr	x1, [x29, 136]
 	adrp	x0, .LANCHOR62
 	add	x0, x0, :lo12:.LANCHOR62
@@ -23387,16 +23401,16 @@ zftl_read:
 	ldrb	w0, [x28]
 	sub	w0, w0, #1
 	strb	w0, [x28]
-	b	.L3602
-.L3604:
+	b	.L3655
+.L3657:
 	cmp	w10, 256
-	bne	.L3605
+	bne	.L3658
 	adrp	x2, .LANCHOR31
-	adrp	x0, .LANCHOR74
+	adrp	x0, .LANCHOR80
 	mov	w4, 24
 	mov	w5, 1
 	ldrb	w2, [x2, #:lo12:.LANCHOR31]
-	ldrh	w0, [x0, #:lo12:.LANCHOR74]
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	sub	w4, w4, w2
 	str	w5, [x29, 96]
 	ldp	w2, w3, [x1, 36]
@@ -23405,11 +23419,11 @@ zftl_read:
 	sub	w4, w4, #1
 	lsr	w0, w3, w0
 	and	w4, w4, w0
-	adrp	x0, .LANCHOR75
-	ldrb	w0, [x0, #:lo12:.LANCHOR75]
+	adrp	x0, .LANCHOR81
+	ldrb	w0, [x0, #:lo12:.LANCHOR81]
 	udiv	w4, w4, w0
-	adrp	x0, .LC229
-	add	x0, x0, :lo12:.LC229
+	adrp	x0, .LC222
+	add	x0, x0, :lo12:.LC222
 	stp	w10, w4, [x29, 104]
 	and	w1, w4, 65535
 	bl	printf
@@ -23420,15 +23434,15 @@ zftl_read:
 	mov	w0, w4
 	bl	gc_add_sblk
 	ldr	w10, [x29, 104]
-	b	.L3605
-.L3613:
+	b	.L3658
+.L3666:
 	ldrb	w0, [x8, 2]
 	and	w0, w0, -9
 	strb	w0, [x8, 2]
-	b	.L3614
-.L3619:
+	b	.L3667
+.L3672:
 	mov	w0, -1
-	b	.L3583
+	b	.L3636
 	.size	zftl_read, .-zftl_read
 	.section	.text.zftl_sys_read,"ax",@progbits
 	.align	2
@@ -23510,50 +23524,50 @@ ftl_update_l2p_map:
 	stp	x21, x22, [sp, 32]
 	mov	x22, x0
 	stp	x19, x20, [sp, 16]
-	adrp	x0, .LANCHOR94
+	adrp	x0, .LANCHOR100
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	ldrh	w23, [x0, #:lo12:.LANCHOR94]
+	ldrh	w23, [x0, #:lo12:.LANCHOR100]
 	ldrb	w0, [x22, 9]
 	ldrh	w19, [x22, 12]
 	mul	w23, w23, w0
-	adrp	x0, .LANCHOR117
+	adrp	x0, .LANCHOR123
 	str	x0, [x29, 104]
-	ldr	x1, [x0, #:lo12:.LANCHOR117]
+	ldr	x1, [x0, #:lo12:.LANCHOR123]
 	add	x19, x1, x19, lsl 2
 	add	x1, x19, x23, sxtw 2
 	ldr	w1, [x1, -4]
 	cmn	w1, #1
-	beq	.L3643
-	adrp	x1, .LANCHOR231
+	beq	.L3696
+	adrp	x1, .LANCHOR234
 	adrp	x0, .LC0
-	mov	w2, 1998
-	add	x1, x1, :lo12:.LANCHOR231
+	mov	w2, 2003
+	add	x1, x1, :lo12:.LANCHOR234
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3643:
-	adrp	x27, .LANCHOR131
+.L3696:
+	adrp	x27, .LANCHOR68
 	mov	x24, 0
-	add	x0, x27, :lo12:.LANCHOR131
+	add	x0, x27, :lo12:.LANCHOR68
 	mov	w21, 0
 	str	x0, [x29, 96]
-.L3644:
+.L3697:
 	cmp	w24, w23
-	blt	.L3650
+	blt	.L3703
 	adrp	x0, .LANCHOR19
 	adrp	x19, .LANCHOR11
 	ldr	w0, [x0, #:lo12:.LANCHOR19]
-	tbz	x0, 12, .L3651
+	tbz	x0, 12, .L3704
 	ldrh	w1, [x22]
 	ldr	x2, [x19, #:lo12:.LANCHOR11]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w3, [x2, x0]
-	adrp	x0, .LC234
+	adrp	x0, .LC227
 	mov	w2, w21
-	add	x0, x0, :lo12:.LC234
+	add	x0, x0, :lo12:.LC227
 	bl	printf
-.L3651:
+.L3704:
 	ldrh	w1, [x22]
 	ldr	x0, [x19, #:lo12:.LANCHOR11]
 	ldp	x23, x24, [sp, 48]
@@ -23564,38 +23578,38 @@ ftl_update_l2p_map:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L3650:
+.L3703:
 	ldr	w2, [x19, x24, lsl 2]
 	cmn	w2, #1
-	beq	.L3645
-	ldrb	w20, [x27, #:lo12:.LANCHOR131]
+	beq	.L3698
+	ldrb	w20, [x27, #:lo12:.LANCHOR68]
 	adrp	x0, .LANCHOR19
 	ldr	w0, [x0, #:lo12:.LANCHOR19]
 	lsl	w20, w20, 7
 	udiv	w20, w2, w20
 	and	w20, w20, 65535
-	tbz	x0, 12, .L3646
-	adrp	x0, .LC231
+	tbz	x0, 12, .L3699
+	adrp	x0, .LC224
 	mov	w3, w24
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC231
+	add	x0, x0, :lo12:.LC224
 	bl	printf
-.L3646:
-	adrp	x25, .LANCHOR111
-	adrp	x26, .LC232
+.L3699:
+	adrp	x25, .LANCHOR117
+	adrp	x26, .LC225
 	mov	x28, x24
-	add	x25, x25, :lo12:.LANCHOR111
-	add	x26, x26, :lo12:.LC232
-.L3649:
+	add	x25, x25, :lo12:.LANCHOR117
+	add	x26, x26, :lo12:.LC225
+.L3702:
 	ldr	w1, [x19, x28, lsl 2]
 	cmn	w1, #1
-	beq	.L3647
+	beq	.L3700
 	ldr	x0, [x29, 96]
 	ldrb	w2, [x0]
 	lsl	w2, w2, 7
 	udiv	w1, w1, w2
 	cmp	w20, w1, uxth
-	bne	.L3647
+	bne	.L3700
 	ldrb	w0, [x22, 9]
 	sdiv	w1, w28, w0
 	msub	w0, w1, w0, w28
@@ -23607,15 +23621,15 @@ ftl_update_l2p_map:
 	str	w2, [x29, 124]
 	ldr	w1, [x19, x28, lsl 2]
 	bl	pm_ppa_update_check
-	cbz	w0, .L3648
+	cbz	w0, .L3701
 	ldr	x0, [x29, 104]
 	mov	w3, w23
 	mov	w2, 4
-	ldr	x1, [x0, #:lo12:.LANCHOR117]
-	adrp	x0, .LC233
-	add	x0, x0, :lo12:.LC233
+	ldr	x1, [x0, #:lo12:.LANCHOR123]
+	adrp	x0, .LC226
+	add	x0, x0, :lo12:.LC226
 	bl	rknand_print_hex
-.L3648:
+.L3701:
 	ldr	w0, [x19, x28, lsl 2]
 	add	w21, w21, 1
 	mov	w2, 1
@@ -23624,13 +23638,13 @@ ftl_update_l2p_map:
 	bl	pm_log2phys
 	mov	w0, -1
 	str	w0, [x19, x28, lsl 2]
-.L3647:
+.L3700:
 	add	x28, x28, 1
 	cmp	w23, w28
-	bgt	.L3649
-.L3645:
+	bgt	.L3702
+.L3698:
 	add	x24, x24, 1
-	b	.L3644
+	b	.L3697
 	.size	ftl_update_l2p_map, .-ftl_update_l2p_map
 	.section	.text.ftl_alloc_new_data_sblk,"ax",@progbits
 	.align	2
@@ -23648,9 +23662,9 @@ ftl_alloc_new_data_sblk:
 	ldrh	w0, [x20]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3673
+	beq	.L3726
 	bl	zftl_insert_data_list
-.L3673:
+.L3726:
 	adrp	x19, .LANCHOR12
 	ldr	x0, [x19, #:lo12:.LANCHOR12]
 	add	x0, x0, 16
@@ -23662,13 +23676,13 @@ ftl_alloc_new_data_sblk:
 	ldr	x0, [x19, #:lo12:.LANCHOR12]
 	ldr	w0, [x0, 560]
 	cmp	w0, w21
-	bne	.L3675
+	bne	.L3728
 	mov	w20, 65535
 	cmp	w21, w20
-	beq	.L3675
+	beq	.L3728
 	mov	w1, w21
-	adrp	x0, .LC235
-	add	x0, x0, :lo12:.LC235
+	adrp	x0, .LC228
+	add	x0, x0, :lo12:.LC228
 	bl	printf
 	ldr	x0, [x19, #:lo12:.LANCHOR12]
 	ldr	w0, [x0, 564]
@@ -23677,7 +23691,7 @@ ftl_alloc_new_data_sblk:
 	mov	w1, -1
 	str	w20, [x0, 560]
 	str	w1, [x0, 564]
-.L3675:
+.L3728:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
@@ -23704,10 +23718,10 @@ ftl_write_commit:
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	str	x0, [x29, 104]
-.L3679:
+.L3732:
 	adrp	x2, .LANCHOR66
 	ldrb	w1, [x2, #:lo12:.LANCHOR66]
-	cbz	w1, .L3681
+	cbz	w1, .L3734
 	adrp	x3, .LANCHOR65
 	adrp	x0, .LANCHOR55
 	add	x0, x0, :lo12:.LANCHOR55
@@ -23721,29 +23735,29 @@ ftl_write_commit:
 	add	x5, x0, x4
 	ldrb	w0, [x0, x4]
 	strb	w0, [x3, #:lo12:.LANCHOR65]
-	adrp	x0, .LANCHOR128
+	adrp	x0, .LANCHOR219
 	ldr	w2, [x5, 36]
 	mov	x19, x0
-	ldr	w1, [x0, #:lo12:.LANCHOR128]
+	ldr	w1, [x0, #:lo12:.LANCHOR219]
 	cmp	w2, w1
-	bcc	.L3683
-	adrp	x1, .LANCHOR232
+	bcc	.L3736
+	adrp	x1, .LANCHOR235
 	adrp	x0, .LC0
-	mov	w2, 604
-	add	x1, x1, :lo12:.LANCHOR232
+	mov	w2, 602
+	add	x1, x1, :lo12:.LANCHOR235
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3683:
+.L3736:
 	ldr	x0, [x29, 120]
-	ldr	w1, [x19, #:lo12:.LANCHOR128]
+	ldr	w1, [x19, #:lo12:.LANCHOR219]
 	add	x0, x24, x0, lsl 6
 	ldr	w22, [x0, 36]
 	cmp	w22, w1
-	bcc	.L3684
+	bcc	.L3737
 	ldr	x0, [x29, 128]
 	bl	zbuf_free
 	mov	w0, -1
-.L3678:
+.L3731:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -23751,35 +23765,35 @@ ftl_write_commit:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L3684:
+.L3737:
 	ldrb	w21, [x0, 57]
 	ldrb	w20, [x0, 56]
 	ldr	x26, [x0, 8]
 	ldr	x23, [x0, 24]
-	adrp	x0, .LANCHOR129
+	adrp	x0, .LANCHOR183
 	str	x0, [x29, 112]
-	ldrb	w1, [x0, #:lo12:.LANCHOR129]
-	cbz	w1, .L3686
-	adrp	x0, .LANCHOR182
-	ldrb	w19, [x0, #:lo12:.LANCHOR182]
+	ldrb	w1, [x0, #:lo12:.LANCHOR183]
+	cbz	w1, .L3739
+	adrp	x0, .LANCHOR184
+	ldrb	w19, [x0, #:lo12:.LANCHOR184]
 	add	x19, x24, x19, lsl 6
-.L3687:
+.L3740:
 	ldrb	w0, [x19]
 	cmp	w0, 255
-	bne	.L3688
+	bne	.L3741
 	ldr	w0, [x19, 36]
 	cmp	w22, w0
-	bne	.L3686
+	bne	.L3739
 	ldr	x0, [x19, 8]
 	ubfiz	x21, x21, 9, 8
 	lsl	w2, w20, 9
 	add	x1, x26, x21
 	add	x0, x0, x21
 	bl	ftl_memcpy
-	adrp	x0, .LANCHOR131
+	adrp	x0, .LANCHOR68
 	ldr	x2, [x19, 8]
 	ldr	x1, [x19, 24]
-	ldrb	w0, [x0, #:lo12:.LANCHOR131]
+	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	add	x1, x1, 16
 	sub	w0, w0, #2
 	lsl	w0, w0, 7
@@ -23788,22 +23802,22 @@ ftl_write_commit:
 	bl	ftl_debug_info_fill
 	ldr	x0, [x29, 128]
 	bl	zbuf_free
-	b	.L3679
-.L3688:
+	b	.L3732
+.L3741:
 	ubfiz	x19, x0, 6, 8
 	add	x19, x24, x19
-	b	.L3687
-.L3686:
+	b	.L3740
+.L3739:
 	mov	w0, w22
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 156]
 	cmn	w0, #1
-	bne	.L3690
+	bne	.L3743
 	mov	w2, 0
 	add	x1, x29, 156
 	mov	w0, w22
 	bl	pm_log2phys
-.L3690:
+.L3743:
 	adrp	x27, .LANCHOR12
 	ldr	w2, [x29, 156]
 	add	x0, x24, 2
@@ -23811,61 +23825,61 @@ ftl_write_commit:
 	ldr	x19, [x27, #:lo12:.LANCHOR12]
 	mov	x25, 0
 	add	x19, x19, 16
-.L3692:
+.L3745:
 	ldr	w1, [x0, 34]
 	cmp	w22, w1
-	bne	.L3691
+	bne	.L3744
 	ldrb	w1, [x0]
-	tbz	x1, 3, .L3691
+	tbz	x1, 3, .L3744
 	ldr	w2, [x0, 38]
 	and	w1, w1, -9
 	ldr	x25, [x0, 6]
 	mov	w3, 1
 	strb	w1, [x0]
-.L3691:
+.L3744:
 	ldr	x1, [x29, 104]
 	add	x0, x0, 64
 	cmp	x0, x1
-	bne	.L3692
-	cbz	w3, .L3693
+	bne	.L3745
+	cbz	w3, .L3746
 	str	w2, [x29, 156]
-.L3693:
-	adrp	x28, .LANCHOR131
+.L3746:
+	adrp	x28, .LANCHOR68
 	str	x28, [x29, 136]
-	ldrb	w0, [x28, #:lo12:.LANCHOR131]
+	ldrb	w0, [x28, #:lo12:.LANCHOR68]
 	cmp	w20, w0
-	bcs	.L3719
+	bcs	.L3772
 	add	w20, w21, w20
-	cbz	x25, .L3695
-	cbz	w21, .L3696
+	cbz	x25, .L3748
+	cbz	w21, .L3749
 	lsl	w2, w21, 9
 	mov	x1, x25
 	mov	x0, x26
 	bl	ftl_memcpy
 	ldr	x19, [x27, #:lo12:.LANCHOR12]
 	add	x19, x19, 48
-.L3696:
+.L3749:
 	ldr	x0, [x29, 136]
-	ldrb	w2, [x0, #:lo12:.LANCHOR131]
+	ldrb	w2, [x0, #:lo12:.LANCHOR68]
 	cmp	w20, w2
-	bcc	.L3697
+	bcc	.L3750
 	ldr	x19, [x27, #:lo12:.LANCHOR12]
 	add	x19, x19, 16
-.L3719:
+.L3772:
 	mov	w25, 0
-	b	.L3694
-.L3697:
+	b	.L3747
+.L3750:
 	ubfiz	x0, x20, 9, 9
 	sub	w2, w2, w20
 	add	x1, x25, x0
 	lsl	w2, w2, 9
 	add	x0, x26, x0
 	bl	ftl_memcpy
-	b	.L3719
-.L3695:
+	b	.L3772
+.L3748:
 	ldr	w0, [x29, 156]
 	cmn	w0, #1
-	beq	.L3698
+	beq	.L3751
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 156]
@@ -23878,11 +23892,11 @@ ftl_write_commit:
 	ldr	w25, [x3, 12]
 	cmp	w22, w0
 	add	w25, w25, 1
-	bne	.L3699
+	bne	.L3752
 	ldr	w0, [x28, 52]
 	cmn	w0, #1
-	bne	.L3700
-.L3699:
+	bne	.L3753
+.L3752:
 	adrp	x0, .LANCHOR31
 	mov	w6, 1
 	ldr	w1, [x28, 40]
@@ -23893,22 +23907,22 @@ ftl_write_commit:
 	ldr	x2, [x29, 136]
 	sub	w6, w6, #1
 	lsl	w7, w6, w0
-	ldrb	w4, [x2, #:lo12:.LANCHOR131]
+	ldrb	w4, [x2, #:lo12:.LANCHOR68]
 	lsr	w0, w1, w0
 	ldr	x2, [x28, 8]
 	bic	w1, w1, w7
 	and	w0, w0, w6
 	bl	flash_read_page_en
 	str	w0, [x28, 52]
-.L3700:
+.L3753:
 	ldr	x0, [x28, 24]
 	ldr	w0, [x0, 4]
 	cmp	w22, w0
-	bne	.L3701
+	bne	.L3754
 	ldr	w0, [x28, 52]
 	cmn	w0, #1
-	bne	.L3702
-.L3701:
+	bne	.L3755
+.L3754:
 	ldr	x1, [x27, #:lo12:.LANCHOR12]
 	mov	w3, w22
 	ldr	w4, [x28, 52]
@@ -23916,53 +23930,53 @@ ftl_write_commit:
 	ldr	w0, [x1, 552]
 	add	w0, w0, 1
 	str	w0, [x1, 552]
-	adrp	x0, .LC236
-	add	x0, x0, :lo12:.LC236
+	adrp	x0, .LC229
+	add	x0, x0, :lo12:.LC229
 	ldrb	w1, [x28, 1]
 	bl	printf
 	ldr	x1, [x28, 24]
 	mov	w3, 4
-	adrp	x0, .LC208
+	adrp	x0, .LC188
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC208
+	add	x0, x0, :lo12:.LC188
 	bl	rknand_print_hex
-.L3702:
+.L3755:
 	ldr	x0, [x28, 24]
 	ldr	w0, [x0, 4]
 	cmp	w22, w0
-	bne	.L3703
+	bne	.L3756
 	ldr	w0, [x28, 52]
 	cmn	w0, #1
-	bne	.L3704
-.L3703:
-	adrp	x1, .LANCHOR232
+	bne	.L3757
+.L3756:
+	adrp	x1, .LANCHOR235
 	adrp	x0, .LC0
-	mov	w2, 696
-	add	x1, x1, :lo12:.LANCHOR232
+	mov	w2, 694
+	add	x1, x1, :lo12:.LANCHOR235
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3704:
-	cbz	w21, .L3705
+.L3757:
+	cbz	w21, .L3758
 	ldr	w0, [x29, 156]
 	lsl	w2, w21, 9
 	cmn	w0, #1
-	beq	.L3706
+	beq	.L3759
 	ldr	x1, [x28, 8]
 	mov	x0, x26
 	bl	ftl_memcpy
-.L3707:
+.L3760:
 	ldr	x19, [x27, #:lo12:.LANCHOR12]
 	add	x19, x19, 48
-.L3705:
+.L3758:
 	ldr	x0, [x29, 136]
-	ldrb	w2, [x0, #:lo12:.LANCHOR131]
+	ldrb	w2, [x0, #:lo12:.LANCHOR68]
 	cmp	w20, w2
-	bcc	.L3708
-	bls	.L3709
+	bcc	.L3761
+	bls	.L3762
 	ldr	x19, [x27, #:lo12:.LANCHOR12]
 	add	x19, x19, 16
-.L3709:
-	cbz	x28, .L3694
+.L3762:
+	cbz	x28, .L3747
 	ldrb	w0, [x28, 2]
 	mov	x1, x28
 	and	w0, w0, -9
@@ -23972,19 +23986,19 @@ ftl_write_commit:
 	bl	buf_remove_buf
 	mov	x0, x28
 	bl	zbuf_free
-.L3694:
+.L3747:
 	ldrh	w0, [x19, 6]
-	cbnz	w0, .L3711
+	cbnz	w0, .L3764
 	bl	ftl_flush
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L3711:
+.L3764:
 	mov	x0, x19
 	bl	ftl_get_new_free_page
 	mov	w10, w0
 	ldr	x0, [x29, 120]
 	mov	x1, x23
-	adrp	x20, .LANCHOR182
+	adrp	x20, .LANCHOR184
 	lsl	x8, x0, 6
 	add	x7, x24, x8
 	ldr	w0, [x7, 32]
@@ -23994,7 +24008,7 @@ ftl_write_commit:
 	str	w0, [x23, 8]
 	ldr	x0, [x29, 136]
 	str	wzr, [x1, 16]!
-	ldrb	w2, [x0, #:lo12:.LANCHOR131]
+	ldrb	w2, [x0, #:lo12:.LANCHOR68]
 	mov	w0, 2
 	sub	w2, w2, #2
 	lsl	w2, w2, 7
@@ -24014,3002 +24028,2502 @@ ftl_write_commit:
 	ldr	x1, [x29, 128]
 	sub	w0, w0, #1
 	strh	w0, [x7, 48]
-	add	x0, x20, :lo12:.LANCHOR182
+	add	x0, x20, :lo12:.LANCHOR184
 	bl	buf_add_tail
 	ldr	x0, [x29, 112]
-	ldrb	w2, [x0, #:lo12:.LANCHOR129]
+	ldrb	w2, [x0, #:lo12:.LANCHOR183]
 	add	w2, w2, 1
 	and	w2, w2, 255
-	strb	w2, [x0, #:lo12:.LANCHOR129]
-	adrp	x0, .LANCHOR233
+	strb	w2, [x0, #:lo12:.LANCHOR183]
+	adrp	x0, .LANCHOR236
 	cmp	w2, 2
-	str	wzr, [x0, #:lo12:.LANCHOR233]
+	str	wzr, [x0, #:lo12:.LANCHOR236]
 	ldrh	w0, [x19, 6]
-	bhi	.L3712
+	bhi	.L3765
 	cmp	w0, 1
-	bne	.L3682
-.L3712:
+	bne	.L3735
+.L3765:
 	ldrb	w1, [x19, 5]
 	cmp	w1, 0
 	mov	w1, 0
 	cset	w4, ne
 	cmp	w0, 1
-	ldrb	w0, [x20, #:lo12:.LANCHOR182]
+	ldrb	w0, [x20, #:lo12:.LANCHOR184]
 	csinc	w4, w2, w4, eq
 	mov	w3, w0
-.L3716:
+.L3769:
 	cmp	w1, w4
-	bne	.L3717
-	strb	w3, [x20, #:lo12:.LANCHOR182]
+	bne	.L3770
+	strb	w3, [x20, #:lo12:.LANCHOR184]
 	and	w1, w1, 255
 	ldr	x3, [x29, 112]
 	sub	w2, w2, w1
 	ubfiz	x0, x0, 6, 8
 	add	x0, x24, x0
-	strb	w2, [x3, #:lo12:.LANCHOR129]
+	strb	w2, [x3, #:lo12:.LANCHOR183]
 	bl	sblk_prog_page
 	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bne	.L3682
+	bne	.L3735
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	mov	x0, x19
 	bl	ftl_write_last_log_page
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L3682:
+.L3735:
 	adrp	x0, .LANCHOR66
 	ldrb	w0, [x0, #:lo12:.LANCHOR66]
-	cbnz	w0, .L3679
-.L3681:
+	cbnz	w0, .L3732
+.L3734:
 	bl	ftl_write_completed
 	mov	w0, 0
-	b	.L3678
-.L3708:
+	b	.L3731
+.L3761:
 	ldr	w0, [x29, 156]
 	sub	w2, w2, w20
 	lsl	w2, w2, 9
 	cmn	w0, #1
 	ubfiz	x0, x20, 7, 9
-	beq	.L3710
+	beq	.L3763
 	ldr	x1, [x28, 8]
 	lsl	x0, x0, 2
 	add	x1, x1, x0
 	add	x0, x26, x0
 	bl	ftl_memcpy
-	b	.L3709
-.L3710:
+	b	.L3762
+.L3763:
 	mov	w1, 0
 	add	x0, x26, x0, lsl 2
 	bl	ftl_memset
-	b	.L3709
-.L3717:
+	b	.L3762
+.L3770:
 	ubfiz	x3, x3, 6, 8
 	add	w1, w1, 1
 	ldrb	w3, [x24, x3]
-	b	.L3716
-.L3718:
+	b	.L3769
+.L3771:
 	lsl	w2, w21, 9
 	mov	x28, 0
 	mov	w25, 0
-.L3706:
+.L3759:
 	mov	w1, 0
 	mov	x0, x26
 	bl	ftl_memset
-	b	.L3707
-.L3698:
-	cbnz	w21, .L3718
+	b	.L3760
+.L3751:
+	cbnz	w21, .L3771
 	mov	w25, 0
 	mov	x28, 0
-	b	.L3705
+	b	.L3758
 	.size	ftl_write_commit, .-ftl_write_commit
-	.section	.text.gc_do_copy_back,"ax",@progbits
+	.section	.text.zftl_write,"ax",@progbits
 	.align	2
-	.global	gc_do_copy_back
-	.type	gc_do_copy_back, %function
-gc_do_copy_back:
-	stp	x29, x30, [sp, -224]!
-	adrp	x0, .LANCHOR84
+	.global	zftl_write
+	.type	zftl_write, %function
+zftl_write:
+	stp	x29, x30, [sp, -112]!
 	add	x29, sp, 0
-	ldrb	w0, [x0, #:lo12:.LANCHOR84]
 	stp	x19, x20, [sp, 16]
+	mov	w19, w0
+	adrp	x0, .LANCHOR19
 	stp	x21, x22, [sp, 32]
-	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	stp	x27, x28, [sp, 80]
-	cbnz	w0, .L3745
-	bl	buf_alloc
-	mov	x19, x0
-	cbz	x0, .L3744
-	adrp	x21, .LANCHOR70
-	add	x3, x21, :lo12:.LANCHOR70
-	ldrh	w2, [x3, 26]
-	mov	w0, w2
-	bl	gc_get_src_ppa_from_index
-	add	w2, w2, 1
-	mov	w22, w0
-	str	w22, [x19, 40]
-	strh	w2, [x3, 26]
-	mov	w1, 1
-	mov	x0, x19
-	bl	sblk_read_page
-	ldr	w0, [x19, 52]
-	cmp	w0, 512
-	ccmn	w0, #1, 4, ne
-	bne	.L3747
-	adrp	x1, .LANCHOR234
-	adrp	x0, .LC0
-	mov	w2, 1032
-	add	x1, x1, :lo12:.LANCHOR234
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L3747:
-	ldr	x0, [x19, 24]
-	ldr	w20, [x0, 4]
-	mov	w0, w20
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 176]
-	cmn	w0, #1
-	bne	.L3748
-	mov	w2, 0
-	add	x1, x29, 176
-	mov	w0, w20
-	bl	pm_log2phys
-.L3748:
-	ldr	w23, [x29, 176]
-	cmp	w22, w23
-	bne	.L3749
-	adrp	x0, .LANCHOR55
-	add	x0, x0, :lo12:.LANCHOR55
-	add	x1, x0, 2
-	add	x0, x0, 1026
-.L3752:
-	ldr	w2, [x1, 34]
-	cmp	w20, w2
-	bne	.L3750
-	ldrb	w2, [x1]
-	tbz	x2, 1, .L3750
-	mov	x0, x19
-	bl	zbuf_free
-	adrp	x0, .LANCHOR19
+	mov	w20, w1
 	ldr	w0, [x0, #:lo12:.LANCHOR19]
-	tbz	x0, 8, .L3744
-	add	x21, x21, :lo12:.LANCHOR70
-	adrp	x0, .LC237
-	mov	w2, w22
-	mov	w1, w20
-	add	x0, x0, :lo12:.LC237
-	ldrh	w3, [x21, 26]
+	mov	w21, w2
+	stp	x23, x24, [sp, 48]
+	mov	x25, x3
+	stp	x27, x28, [sp, 80]
+	tbz	x0, 12, .L3798
+	ldr	w4, [x25]
+	mov	w3, w2
+	adrp	x0, .LC230
+	mov	w2, w1
+	add	x0, x0, :lo12:.LC230
+	mov	w1, w19
 	bl	printf
-.L3744:
+.L3798:
+	cbnz	w19, .L3799
+	adrp	x0, .LANCHOR73
+	mov	w19, 24576
+	ldr	w0, [x0, #:lo12:.LANCHOR73]
+.L3800:
+	cmp	w0, w20
+	ccmp	w0, w21, 0, hi
+	bcc	.L3814
+	add	w1, w20, w21
+	cmp	w0, w1
+	bcc	.L3814
+	adrp	x26, .LANCHOR68
+	add	w19, w19, w20
+	sub	w22, w21, #1
+	adrp	x27, .LANCHOR66
+	ldrb	w0, [x26, #:lo12:.LANCHOR68]
+	add	w22, w22, w19
+	adrp	x28, .LANCHOR57
+	add	x27, x27, :lo12:.LANCHOR66
+	add	x28, x28, :lo12:.LANCHOR57
+	udiv	w24, w19, w0
+	udiv	w22, w22, w0
+	add	x0, x26, :lo12:.LANCHOR68
+	str	x0, [x29, 104]
+	mov	w20, w24
+	sub	w23, w22, w24
+	add	w23, w23, 1
+.L3802:
+	cbnz	w23, .L3811
+	bl	ftl_write_commit
+	bl	ftl_flush
+	mov	w0, 0
+.L3797:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 224
+	ldp	x29, x30, [sp], 112
 	ret
-.L3750:
-	add	x1, x1, 64
-	cmp	x1, x0
-	bne	.L3752
-	adrp	x0, .LANCHOR131
-	strb	wzr, [x19, 57]
-	str	w20, [x19, 36]
-	ldrb	w0, [x0, #:lo12:.LANCHOR131]
-	strb	w0, [x19, 56]
-	ldr	x0, [x19, 24]
-	ldr	w1, [x0]
-	str	w1, [x19, 32]
-	str	wzr, [x0, 16]
-	adrp	x0, .LANCHOR19
-	ldr	w0, [x0, #:lo12:.LANCHOR19]
-	tbz	x0, 8, .L3753
-	mov	w0, w20
-	bl	lpa_hash_get_ppa
-	add	x1, x21, :lo12:.LANCHOR70
-	mov	w3, w0
-	mov	w4, w22
-	adrp	x0, .LC238
-	mov	w2, w23
-	add	x0, x0, :lo12:.LC238
-	ldrh	w5, [x1, 26]
-	mov	w1, w20
-	bl	printf
-.L3753:
-	mov	x0, x19
-	bl	ftl_gc_write_buf
-	bl	ftl_write_commit
-	add	x21, x21, :lo12:.LANCHOR70
-	adrp	x0, .LANCHOR110
-	ldr	x1, [x0, #:lo12:.LANCHOR110]
-	ldr	w0, [x1, 60]
-	add	w0, w0, 1
-	str	w0, [x1, 60]
-	ldrh	w0, [x21, 28]
-	add	w0, w0, 1
-	strh	w0, [x21, 28]
-	b	.L3744
-.L3749:
-	adrp	x0, .LANCHOR19
-	ldr	w0, [x0, #:lo12:.LANCHOR19]
-	tbz	x0, 8, .L3754
-	add	x21, x21, :lo12:.LANCHOR70
-	mov	w0, w20
-	bl	lpa_hash_get_ppa
-	mov	w3, w0
-	mov	w4, w22
-	adrp	x0, .LC238
-	ldrh	w5, [x21, 26]
-	mov	w2, w23
-	mov	w1, w20
-	add	x0, x0, :lo12:.LC238
-	bl	printf
-.L3754:
-	mov	x0, x19
-	bl	zbuf_free
-	b	.L3744
-.L3745:
-	adrp	x2, .LANCHOR12
-	adrp	x1, .LANCHOR79
-	stp	x1, x2, [x29, 136]
-	ldr	x26, [x2, #:lo12:.LANCHOR12]
-	ldrb	w3, [x1, #:lo12:.LANCHOR79]
-	add	x26, x26, 80
-	ldrb	w0, [x26, 9]
-	and	w20, w0, 65535
-	cmp	w3, w20
-	bhi	.L3809
-	cmp	w20, 2
-	mov	w21, 2
-	csel	w21, w20, w21, ls
-	and	w21, w21, 65535
-.L3755:
-	adrp	x1, .LANCHOR78
-	str	x1, [x29, 120]
-	ldrb	w19, [x1, #:lo12:.LANCHOR78]
+.L3799:
 	cmp	w19, 3
-	bne	.L3756
-	adrp	x1, .LANCHOR35
-	ldrb	w1, [x1, #:lo12:.LANCHOR35]
-	cbz	w1, .L3757
-	adrp	x1, .LANCHOR70
-	add	x1, x1, :lo12:.LANCHOR70
-	ldrh	w22, [x1, 2106]
-	adrp	x1, .LANCHOR124
-	ldrb	w1, [x1, #:lo12:.LANCHOR124]
-	sdiv	w2, w22, w0
-	and	w25, w2, 65535
-	cbz	w1, .L3758
-	adrp	x1, .LANCHOR235
-	add	x1, x1, :lo12:.LANCHOR235
-	ldrh	w1, [x1, w2, sxtw 1]
-	cmp	w1, 0
-	cset	w19, ne
-.L3876:
-	add	w19, w19, 1
-.L3759:
-	msub	w20, w20, w25, w22
-	and	w20, w20, 65535
-.L3760:
-	adrp	x1, .LANCHOR85
-	mul	w11, w19, w21
-	adrp	x10, .LANCHOR235
-	sxtw	x13, w25
-	ldrh	w5, [x1, #:lo12:.LANCHOR85]
-	adrp	x1, .LANCHOR224
-	add	x10, x10, :lo12:.LANCHOR235
-	mov	w2, 0
-	mul	w0, w5, w0
-	ldrb	w5, [x1, #:lo12:.LANCHOR224]
-	sub	w5, w0, w5
-	adrp	x0, .LANCHOR124
-	ldrb	w12, [x0, #:lo12:.LANCHOR124]
-	adrp	x0, .LANCHOR160
-	ldr	x8, [x0, #:lo12:.LANCHOR160]
-	adrp	x0, .LANCHOR70
-	add	x6, x0, :lo12:.LANCHOR70
-	ldrh	w14, [x6, 24]
-.L3764:
-	cmp	w2, w11
-	bge	.L3817
-	add	w4, w22, w2
-	cmp	w4, w5
-	blt	.L3765
-	cbz	w12, .L3817
-	ldrh	w0, [x10, x13, lsl 1]
-	cmp	w0, w25
-	bcc	.L3766
-.L3817:
-	mov	w23, 1
-	b	.L3762
-.L3809:
-	mov	w21, 1
-	b	.L3755
-.L3758:
-	adrp	x1, .LANCHOR217
-	ldrb	w1, [x1, #:lo12:.LANCHOR217]
-	cbz	w1, .L3811
-	sub	w1, w25, #62
-	and	w1, w1, 65535
-	cmp	w1, 2159
-	bhi	.L3812
-	udiv	w19, w25, w19
-	add	w19, w19, w19, lsl 1
-	sub	w19, w25, w19
-	and	w19, w19, 65535
-	cmp	w19, 0
-	cset	w19, eq
-	b	.L3876
+	bhi	.L3814
+	lsl	w19, w19, 13
+	mov	w0, 8192
+	b	.L3800
 .L3811:
-	mov	w19, 1
-	b	.L3759
-.L3812:
-	mov	w19, 2
-	b	.L3759
-.L3757:
-	adrp	x1, .LANCHOR83
-	ldrb	w1, [x1, #:lo12:.LANCHOR83]
-	cbz	w1, .L3761
-	adrp	x1, .LANCHOR70
-	add	x1, x1, :lo12:.LANCHOR70
-	add	w20, w0, w0, lsl 1
-	ldrh	w22, [x1, 2106]
-	adrp	x1, .LANCHOR36
-	ldrb	w1, [x1, #:lo12:.LANCHOR36]
-	sdiv	w20, w22, w20
-	and	w25, w20, 65535
-	mul	w20, w0, w20
-	sub	w20, w20, w20, lsl 2
-	add	w20, w20, w22
-	sdiv	w20, w20, w19
-	and	w20, w20, 65535
-	cbz	w1, .L3760
-	add	w3, w25, w25, lsl 1
-	and	w25, w3, 65535
-	b	.L3760
-.L3761:
-	adrp	x1, .LANCHOR70
-	add	x1, x1, :lo12:.LANCHOR70
-	adrp	x2, .LANCHOR236
-	add	x2, x2, :lo12:.LANCHOR236
-	ldrh	w4, [x1, 2106]
-	sdiv	w1, w4, w0
-	ldrh	w23, [x2, w1, sxtw 1]
-	msub	w20, w20, w1, w4
-	and	w20, w20, 65535
-	lsr	w25, w23, 3
-	and	w23, w23, 7
-	cmp	w23, 1
-	madd	w22, w25, w0, w20
-	add	w22, w22, w22, lsl 1
-	and	w22, w22, 65535
-	beq	.L3760
-.L3762:
-	mul	w0, w19, w21
-	stp	wzr, w0, [x29, 152]
-	ubfiz	w0, w21, 1, 15
-	str	w0, [x29, 132]
-	msub	w0, w0, w19, w22
-	and	w0, w0, 65535
-	str	w0, [x29, 128]
-	ldrh	w0, [x29, 128]
-	str	x0, [x29, 112]
-	adrp	x0, .LANCHOR55
-	add	x0, x0, :lo12:.LANCHOR55
-	str	x0, [x29, 104]
-.L3767:
-	ldp	w0, w1, [x29, 152]
-	ldrh	w24, [x29, 152]
-	and	w0, w0, 65535
-	str	w0, [x29, 168]
-	cmp	w0, w1
-	blt	.L3791
-	ldr	x0, [x29, 120]
-	ldrb	w0, [x0, #:lo12:.LANCHOR78]
-	cmp	w0, 3
-	add	x0, x29, 176
-	bne	.L3792
-	adrp	x1, .LANCHOR35
-	ldrb	w1, [x1, #:lo12:.LANCHOR35]
-	cbz	w1, .L3793
-	ldr	w2, [x29, 156]
-	mov	w1, 0
-	sub	w2, w2, #1
-.L3794:
-	cmp	w1, w2
-	blt	.L3795
-.L3880:
-	ldr	x0, [x0, w2, sxtw 3]
-	mov	w1, -1
-	strb	w1, [x0]
-	mul	w1, w21, w19
-	ldr	x0, [x29, 176]
-	bl	sblk_prog_page
-	b	.L3796
-.L3756:
-	adrp	x1, .LANCHOR80
-	ldrb	w1, [x1, #:lo12:.LANCHOR80]
-	cbnz	w1, .L3763
-	adrp	x1, .LANCHOR70
-	add	x1, x1, :lo12:.LANCHOR70
-	mov	w19, 1
-	ldrh	w22, [x1, 2106]
-	sdiv	w25, w22, w0
-	msub	w20, w20, w25, w22
-	and	w20, w20, 65535
-	b	.L3760
-.L3763:
-	adrp	x1, .LANCHOR70
-	add	x1, x1, :lo12:.LANCHOR70
-	mov	w19, 2
-	ldrh	w22, [x1, 2106]
-	sdiv	w25, w22, w0
-	msub	w20, w20, w25, w22
-	and	w20, w20, 65535
-	b	.L3760
-.L3766:
-	tbz	x2, 0, .L3817
-.L3765:
-	sbfiz	x4, x4, 2, 32
-	ldr	w0, [x8, x4]
-	cmn	w0, #1
-	bne	.L3768
-	ldrh	w7, [x6, 26]
-	cmp	w7, w14
-	bcs	.L3744
-	cbz	w12, .L3769
-	ldrh	w0, [x10, x13, lsl 1]
-	cmp	w0, w25
-	bcs	.L3769
-	tbz	x2, 0, .L3769
-	ubfiz	x0, x0, 2, 16
-	ldr	w0, [x8, x0]
-.L3877:
-	str	w0, [x8, x4]
-.L3768:
-	add	w2, w2, 1
-	and	w2, w2, 65535
-	b	.L3764
-.L3769:
-	mov	w0, w7
-	bl	gc_get_src_ppa_from_index
-	add	w7, w7, 1
-	strh	w7, [x6, 26]
-	b	.L3877
-.L3791:
-	ldr	w0, [x29, 168]
-	add	w0, w22, w0
-	str	w0, [x29, 172]
-	sxtw	x0, w0
-	str	x0, [x29, 160]
-	adrp	x0, .LANCHOR82
-	ldr	x1, [x29, 160]
-	ldr	x0, [x0, #:lo12:.LANCHOR82]
-	ldrb	w0, [x0, x1]
-	cmp	w0, 255
-	bne	.L3771
-	mov	w0, 0
-	bl	buf_alloc
-	mov	x27, x0
-	cbnz	x0, .L3772
-	bl	sblk_wait_write_queue_completed
-	bl	ftl_write_completed
-	bl	gc_write_completed
-	bl	gc_free_temp_buf
+	ldrb	w0, [x27]
+	cbz	w0, .L3803
+	ldrb	w0, [x28]
+	cmp	w0, 2
+	bhi	.L3803
+	bl	ftl_write_commit
+.L3803:
 	mov	w0, 0
 	bl	buf_alloc
-	mov	x27, x0
-	cbz	x0, .L3744
-.L3772:
-	adrp	x0, .LANCHOR82
-	ldr	x2, [x29, 160]
-	ldrb	w1, [x27, 1]
-	ldr	x0, [x0, #:lo12:.LANCHOR82]
-	strb	w1, [x0, x2]
-	adrp	x0, .LANCHOR70
-	add	x1, x0, :lo12:.LANCHOR70
-	strb	w23, [x27, 61]
-	ldrb	w0, [x1, 7]
-	add	w0, w0, 1
-	strb	w0, [x1, 7]
-	add	w0, w24, w22
-	strh	w0, [x27, 48]
-	adrp	x0, .LANCHOR85
-	ldr	w1, [x29, 172]
-	ldrh	w6, [x0, #:lo12:.LANCHOR85]
-	adrp	x0, .LANCHOR224
-	ldrb	w5, [x0, #:lo12:.LANCHOR224]
-	ldrb	w0, [x26, 9]
-	mul	w0, w0, w6
-	sub	w0, w0, w5
-	cmp	w1, w0
-	blt	.L3773
-	adrp	x1, .LANCHOR124
-	ldrb	w1, [x1, #:lo12:.LANCHOR124]
-	cbz	w1, .L3774
-	adrp	x1, .LANCHOR235
-	add	x1, x1, :lo12:.LANCHOR235
-	ldrh	w1, [x1, w25, sxtw 1]
-	cmp	w1, w25
-	bcs	.L3774
-	tbnz	x24, 0, .L3773
-.L3774:
-	adrp	x1, .LANCHOR159
-	ldr	w3, [x29, 172]
-	mov	w2, -1
-	cmp	w5, 2
-	ldr	x1, [x1, #:lo12:.LANCHOR159]
-	str	w2, [x1, w3, sxtw 2]
-	bne	.L3775
-	cmp	w3, w0
-	adrp	x28, .LANCHOR221
-	bne	.L3776
-	ldrh	w2, [x28, #:lo12:.LANCHOR221]
-	ldr	x0, [x27, 8]
-	bl	ftl_memcpy
-	adrp	x0, .LANCHOR131
-	mov	w1, 0
-	ldrb	w2, [x0, #:lo12:.LANCHOR131]
-	ldr	x0, [x27, 24]
-	lsl	w2, w2, 1
-	bl	ftl_memset
-	ldr	x6, [x27, 24]
-	mov	w0, 15555
-	movk	w0, 0xf55f, lsl 16
-	ldrh	w1, [x28, #:lo12:.LANCHOR221]
-	str	w0, [x6]
-	ldr	x0, [x27, 8]
-	bl	js_hash
-	str	w0, [x6, 4]
-	ldr	x0, [x29, 144]
-	ldr	x0, [x0, #:lo12:.LANCHOR12]
-	ldr	w0, [x0, 132]
-	stp	w0, wzr, [x6, 8]
-.L3777:
-	ldr	x0, [x27, 24]
-	str	wzr, [x0, 16]
-.L3771:
-	adrp	x0, .LANCHOR82
-	ldrsw	x2, [x29, 168]
-	add	x4, x29, 176
-	ldr	x1, [x0, #:lo12:.LANCHOR82]
-	ldr	x0, [x29, 160]
-	ldrb	w5, [x1, x0]
-	adrp	x0, .LANCHOR55
-	add	x6, x0, :lo12:.LANCHOR55
-	mov	x7, x5
-	ubfiz	x0, x5, 6, 8
-	add	x0, x6, x0
-	add	x6, x6, x5, lsl 6
-	str	x0, [x4, x2, lsl 3]
-	mov	w0, 2
-	strh	w0, [x6, 50]
-	ldr	x0, [x29, 120]
-	strb	w23, [x6, 61]
-	ldrb	w0, [x0, #:lo12:.LANCHOR78]
-	cmp	w0, 3
-	bne	.L3782
-	adrp	x8, .LANCHOR35
-	ldrb	w8, [x8, #:lo12:.LANCHOR35]
-	cbz	w8, .L3783
-	adrp	x0, .LANCHOR124
-	and	w8, w24, 1
-	add	w10, w8, w25
-	ldrb	w0, [x0, #:lo12:.LANCHOR124]
-	cbz	w0, .L3784
-	adrp	x6, .LANCHOR235
-	add	x6, x6, :lo12:.LANCHOR235
-	ldrh	w6, [x6, w25, sxtw 1]
-	cmp	w6, w25
-	bcs	.L3784
-	cmp	w8, 0
-	csel	w10, w10, w6, eq
-.L3784:
-	adrp	x0, .LANCHOR55
-	add	x6, x0, :lo12:.LANCHOR55
-	add	x5, x6, x5, lsl 6
-	udiv	w6, w24, w19
-	add	w6, w6, w20
-	add	x6, x26, x6, sxtw 1
-	ldrh	w0, [x6, 16]
-	adrp	x6, .LANCHOR111
-	ldrh	w6, [x6, #:lo12:.LANCHOR111]
-	madd	w0, w0, w6, w10
-	orr	w0, w0, 50331648
-	str	w0, [x5, 40]
-.L3789:
-	adrp	x0, .LANCHOR55
-	sbfiz	x7, x7, 6, 32
-	add	x0, x0, :lo12:.LANCHOR55
-	add	x0, x0, x7
-	ldrh	w5, [x0, 48]
-	ldr	w6, [x0, 40]
-	adrp	x0, .LANCHOR161
-	ldr	x0, [x0, #:lo12:.LANCHOR161]
-	str	w6, [x0, x5, lsl 2]
-	b	.L3808
-.L3776:
-	ldr	x2, [x29, 136]
-	ldrh	w0, [x28, #:lo12:.LANCHOR221]
-	ldrb	w28, [x2, #:lo12:.LANCHOR79]
-	mul	w28, w28, w6
-	lsl	w28, w28, 2
-	sub	w28, w28, w0
-	and	x0, x0, 65532
-	add	x1, x1, x0
-	ldr	x0, [x27, 8]
-	mov	w2, w28
-	bl	ftl_memcpy
-	adrp	x0, .LANCHOR131
-	mov	w1, 0
-	ldrb	w2, [x0, #:lo12:.LANCHOR131]
-	ldr	x0, [x27, 24]
-	lsl	w2, w2, 1
-	bl	ftl_memset
-	ldr	x6, [x27, 24]
-	mov	w0, 15555
-	movk	w0, 0xf55f, lsl 16
-	mov	w1, w28
-	str	w0, [x6]
-	ldr	x0, [x27, 8]
-	bl	js_hash
-	str	w0, [x6, 4]
-	ldr	x0, [x29, 144]
-	ldr	x0, [x0, #:lo12:.LANCHOR12]
-	ldr	w0, [x0, 132]
-	str	w0, [x6, 8]
-	mov	w0, 1
-	str	w0, [x6, 12]
-	b	.L3777
-.L3775:
-	ldr	x0, [x29, 136]
-	ldrb	w2, [x0, #:lo12:.LANCHOR79]
-	ldr	x0, [x27, 8]
-	mul	w2, w2, w6
-	lsl	w2, w2, 2
-	bl	ftl_memcpy
-	ldr	x1, [x29, 136]
-	adrp	x0, .LANCHOR85
-	ldrh	w0, [x0, #:lo12:.LANCHOR85]
-	ldrb	w1, [x1, #:lo12:.LANCHOR79]
-	mul	w0, w0, w1
-	adrp	x1, .LANCHOR131
-	ldrb	w1, [x1, #:lo12:.LANCHOR131]
-	lsl	w2, w0, 2
-	cmp	w1, w0, lsr 6
-	bge	.L3778
-	adrp	x1, .LANCHOR221
-	ldrh	w1, [x1, #:lo12:.LANCHOR221]
-	sub	w2, w1, w2
-.L3778:
-	adrp	x1, .LANCHOR160
-	ldr	x5, [x27, 8]
-	ldr	x1, [x1, #:lo12:.LANCHOR160]
-	add	x0, x5, x0, sxtw 2
-	bl	ftl_memcpy
-	adrp	x0, .LANCHOR131
-	mov	w1, 0
-	ldrb	w2, [x0, #:lo12:.LANCHOR131]
-	ldr	x0, [x27, 24]
-	lsl	w2, w2, 1
-	bl	ftl_memset
-	ldr	x6, [x27, 24]
-	mov	w0, 15555
-	movk	w0, 0xf55f, lsl 16
-	str	w0, [x6]
-	adrp	x0, .LANCHOR85
-	ldrh	w1, [x0, #:lo12:.LANCHOR85]
-	ldr	x0, [x29, 136]
-	ldrb	w0, [x0, #:lo12:.LANCHOR79]
-	mul	w1, w1, w0
-	ldr	x0, [x27, 8]
-	lsl	w1, w1, 2
-	bl	js_hash
-	str	w0, [x6, 4]
-	ldr	x0, [x29, 144]
-	ldr	x0, [x0, #:lo12:.LANCHOR12]
-	ldr	w0, [x0, 132]
-	str	w0, [x6, 8]
-	b	.L3777
-.L3773:
-	ldr	x0, [x29, 160]
-	mov	w1, 1
-	lsl	x28, x0, 2
-	adrp	x0, .LANCHOR160
-	ldr	x0, [x0, #:lo12:.LANCHOR160]
-	ldr	w0, [x0, x28]
-	str	w0, [x27, 40]
-	mov	x0, x27
-	bl	sblk_read_page
-	ldr	w0, [x27, 52]
-	cmp	w0, 512
-	ccmn	w0, #1, 4, ne
-	bne	.L3780
-	adrp	x0, .LANCHOR74
-	ldrh	w2, [x0, #:lo12:.LANCHOR74]
-	adrp	x0, .LANCHOR31
-	ldrb	w1, [x0, #:lo12:.LANCHOR31]
-	mov	w0, 24
-	sub	w0, w0, w1
-	sub	w1, w0, w2
-	mov	w0, 1
-	lsl	w0, w0, w1
-	ldr	w1, [x27, 40]
-	sub	w0, w0, #1
-	lsr	w1, w1, w2
-	and	w0, w0, w1
-	adrp	x1, .LANCHOR75
-	ldrb	w2, [x1, #:lo12:.LANCHOR75]
-	mov	x1, 0
-	udiv	w0, w0, w2
-	bl	ftl_sblk_dump
-	ldr	w0, [x27, 52]
-	cmp	w0, 512
-	ccmn	w0, #1, 4, ne
-	bne	.L3780
-	ldr	x0, [x27, 24]
-	mov	w1, -1
-	str	w1, [x0, 4]
-	ldr	w0, [x27, 52]
-	cmp	w0, 512
-	ccmp	w0, w1, 4, ne
-	bne	.L3780
-	adrp	x1, .LANCHOR234
-	adrp	x0, .LC0
-	mov	w2, 1223
-	add	x1, x1, :lo12:.LANCHOR234
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L3780:
-	ldr	x0, [x27, 24]
-	adrp	x1, .LANCHOR128
-	ldr	w1, [x1, #:lo12:.LANCHOR128]
-	ldr	w2, [x0, 4]
-	cmp	w2, w1
-	bcc	.L3781
-	mov	w1, -1
-	str	w1, [x0, 4]
-.L3781:
-	adrp	x1, .LANCHOR159
-	ldr	w2, [x0, 4]
-	ldr	x1, [x1, #:lo12:.LANCHOR159]
-	str	w2, [x1, x28]
-	ldr	w1, [x27, 40]
-	str	w1, [x0, 8]
-	b	.L3777
-.L3783:
-	udiv	w0, w24, w0
-	adrp	x7, .LANCHOR36
-	ldrb	w7, [x7, #:lo12:.LANCHOR36]
-	cbz	w7, .L3786
-	add	w7, w0, w20
-	adrp	x8, .LANCHOR111
-	add	x7, x26, x7, sxtw 1
-	add	w0, w0, w0, lsl 1
-	ldrh	w8, [x8, #:lo12:.LANCHOR111]
-	sub	w0, w24, w0
-	ldrh	w7, [x7, 16]
-	madd	w7, w7, w8, w25
-	add	w0, w7, w0, uxth
-.L3881:
-	str	w0, [x6, 40]
-	ldr	x0, [x29, 104]
-	add	x5, x0, x5, lsl 6
-	adrp	x0, .LANCHOR161
-	ldr	x6, [x0, #:lo12:.LANCHOR161]
-	mov	w0, 3
-	ldrh	w7, [x5, 48]
-	udiv	w0, w24, w0
-	ldr	w5, [x5, 40]
-	add	w0, w0, w0, lsl 1
-	sub	w0, w24, w0
-	and	w0, w0, 65535
-	add	w0, w0, 1
-	orr	w0, w5, w0, lsl 24
-	str	w0, [x6, x7, lsl 2]
-.L3808:
-	adrp	x0, .LANCHOR124
-	ldrb	w0, [x0, #:lo12:.LANCHOR124]
-	cbz	w0, .L3790
-	adrp	x0, .LANCHOR235
-	add	x0, x0, :lo12:.LANCHOR235
-	ldrh	w0, [x0, w25, sxtw 1]
-	cmp	w0, w25
-	bcs	.L3790
-	tbz	x24, 0, .L3790
-	ldr	x3, [x29, 160]
-	mov	w0, -1
-	strb	w0, [x1, x3]
-	ldrh	w1, [x29, 128]
-	ldr	x0, [x4, x2, lsl 3]
-	ldr	x2, [x29, 112]
-	strh	w1, [x0, 48]
-	ldrb	w1, [x0, 1]
-	adrp	x0, .LANCHOR82
-	ldr	x0, [x0, #:lo12:.LANCHOR82]
-	strb	w1, [x0, x2]
-	adrp	x0, .LANCHOR160
-	ldr	w2, [x29, 172]
-	mov	w1, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR160]
-	str	w1, [x0, w2, sxtw 2]
-.L3790:
-	ldr	w0, [x29, 152]
-	add	w0, w0, 1
-	str	w0, [x29, 152]
-	b	.L3767
-.L3786:
-	add	w0, w0, w20
-	adrp	x7, .LANCHOR111
-	add	x0, x26, x0, sxtw 1
-	ldrh	w7, [x7, #:lo12:.LANCHOR111]
-	ldrh	w0, [x0, 16]
-	madd	w0, w0, w7, w25
-	b	.L3881
-.L3782:
-	cmp	w0, 2
-	bne	.L3789
-	adrp	x0, .LANCHOR80
-	adrp	x5, .LANCHOR111
-	ldrb	w0, [x0, #:lo12:.LANCHOR80]
-	cbnz	w0, .L3788
-	ldr	w0, [x29, 168]
-	ldrh	w5, [x5, #:lo12:.LANCHOR111]
-	add	w27, w20, w0
-	add	x27, x26, x27, sxtw 1
-	ldrh	w0, [x27, 16]
-	madd	w0, w0, w5, w25
-.L3878:
-	orr	w0, w0, 33554432
-	str	w0, [x6, 40]
-	b	.L3789
-.L3788:
-	add	w0, w20, w24, lsr 1
-	ldrh	w5, [x5, #:lo12:.LANCHOR111]
-	add	x0, x26, x0, sxtw 1
-	ldrh	w0, [x0, 16]
-	madd	w0, w0, w5, w25
-	and	w5, w24, 1
-	add	w0, w0, w5
-	b	.L3878
-.L3795:
-	ldr	x4, [x0, w1, sxtw 3]
-	add	w1, w1, 1
-	ldr	x5, [x0, w1, sxtw 3]
-	and	w1, w1, 65535
-	ldrb	w5, [x5, 1]
-	strb	w5, [x4]
-	b	.L3794
-.L3793:
-	adrp	x1, .LANCHOR83
-	ldrb	w2, [x1, #:lo12:.LANCHOR83]
-	ldr	x1, [x29, 176]
-	cbz	w2, .L3797
-.L3800:
-	strb	wzr, [x1, 60]
-	b	.L3799
-.L3797:
-	cmp	w23, 1
-	bne	.L3798
-	mov	w2, 9
-.L3879:
-	strb	w2, [x1, 60]
-.L3799:
-	mov	w2, w21
-	add	x1, x0, 24
-	bl	sblk_xlc_prog_pages
-.L3796:
-	adrp	x0, .LANCHOR83
-	ldrb	w0, [x0, #:lo12:.LANCHOR83]
-	cbz	w0, .L3805
-	add	w21, w21, w21, lsl 1
-	and	w21, w21, 65535
-.L3806:
-	adrp	x0, .LANCHOR110
-	ldr	x1, [x0, #:lo12:.LANCHOR110]
-	ldr	w0, [x1, 52]
-	add	w0, w0, w21
-	str	w0, [x1, 52]
-	adrp	x0, .LANCHOR70
-	add	x25, x0, :lo12:.LANCHOR70
-	ldrh	w0, [x25, 2106]
-	add	w21, w21, w0
-	adrp	x0, .LANCHOR85
-	and	w21, w21, 65535
-	strh	w21, [x25, 2106]
-	ldrh	w0, [x0, #:lo12:.LANCHOR85]
-	ldrb	w1, [x26, 9]
-	mul	w0, w0, w1
-	cmp	w21, w0
-	blt	.L3807
-	ldr	x0, [x29, 144]
-	ldr	x0, [x0, #:lo12:.LANCHOR12]
-	strh	wzr, [x0, 86]
-.L3807:
-	bl	gc_write_completed
-	b	.L3744
-.L3798:
-	cmp	w23, 2
-	bne	.L3800
-	mov	w2, 13
-	b	.L3879
-.L3792:
-	adrp	x1, .LANCHOR80
-	ldrb	w1, [x1, #:lo12:.LANCHOR80]
-	cbz	w1, .L3818
-	adrp	x1, .LANCHOR81
-	ldrb	w1, [x1, #:lo12:.LANCHOR81]
-	cbnz	w1, .L3802
-.L3801:
-	ldr	w2, [x29, 156]
-	sub	w2, w2, #1
-.L3803:
-	cmp	w1, w2
-	bge	.L3880
-	ldr	x4, [x0, w1, sxtw 3]
-	add	w1, w1, 1
-	ldr	x5, [x0, w1, sxtw 3]
-	and	w1, w1, 65535
-	ldrb	w5, [x5, 1]
-	strb	w5, [x4]
-	b	.L3803
-.L3818:
-	mov	w1, 0
-	b	.L3801
-.L3802:
-	mov	w1, w21
-	bl	sblk_3d_mlc_prog_pages
-	b	.L3796
-.L3805:
-	adrp	x0, .LANCHOR80
-	ldrb	w0, [x0, #:lo12:.LANCHOR80]
-	cbnz	w0, .L3819
-	adrp	x0, .LANCHOR35
-	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbz	w0, .L3806
-	adrp	x0, .LANCHOR124
-	ldrh	w1, [x29, 156]
-	ldrb	w0, [x0, #:lo12:.LANCHOR124]
-	cbz	w0, .L3820
-	adrp	x0, .LANCHOR235
-	add	x0, x0, :lo12:.LANCHOR235
-	ldrh	w0, [x0, w25, sxtw 1]
-	cmp	w0, w25
-	csel	w21, w21, w1, cc
-	b	.L3806
-.L3819:
-	ldr	w21, [x29, 132]
-	b	.L3806
-.L3820:
-	mov	w21, w1
-	b	.L3806
-	.size	gc_do_copy_back, .-gc_do_copy_back
-	.section	.text.zftl_do_gc,"ax",@progbits
-	.align	2
-	.global	zftl_do_gc
-	.type	zftl_do_gc, %function
-zftl_do_gc:
-	sub	sp, sp, #144
-	adrp	x1, .LANCHOR107
-	stp	x29, x30, [sp, 16]
-	add	x29, sp, 16
-	ldrh	w1, [x1, #:lo12:.LANCHOR107]
-	stp	x21, x22, [sp, 48]
-	adrp	x22, .LANCHOR103
-	stp	x19, x20, [sp, 32]
-	adrp	x20, .LANCHOR156
-	stp	x23, x24, [sp, 64]
-	adrp	x23, .LANCHOR12
-	stp	x25, x26, [sp, 80]
-	ldrh	w21, [x22, #:lo12:.LANCHOR103]
-	ldrb	w2, [x20, #:lo12:.LANCHOR156]
-	stp	x27, x28, [sp, 96]
-	add	w21, w1, w21
-	ldr	x26, [x23, #:lo12:.LANCHOR12]
-	cmp	w2, 6
-	bhi	.L3999
-	mov	w25, w0
-	and	w21, w21, 65535
-	adrp	x0, .L3885
-	add	x0, x0, :lo12:.L3885
-	ldrh	w0, [x0,w2,uxtw #1]
-	adr	x2, .Lrtx3885
-	add	x0, x2, w0, sxth #2
-	br	x0
-.Lrtx3885:
-	.section	.rodata.zftl_do_gc,"a",@progbits
-	.align	0
-	.align	2
-.L3885:
-	.2byte	(.L3884 - .Lrtx3885) / 4
-	.2byte	(.L3886 - .Lrtx3885) / 4
-	.2byte	(.L3887 - .Lrtx3885) / 4
-	.2byte	(.L3888 - .Lrtx3885) / 4
-	.2byte	(.L3889 - .Lrtx3885) / 4
-	.2byte	(.L3890 - .Lrtx3885) / 4
-	.2byte	(.L3891 - .Lrtx3885) / 4
-	.section	.text.zftl_do_gc
-.L3890:
-	adrp	x19, .LANCHOR70
-	add	x24, x19, :lo12:.LANCHOR70
-	mov	w22, 0
-.L3892:
-	bl	gc_check_data_one_wl
-	cbz	w0, .L3995
-	ldr	x0, [x23, #:lo12:.LANCHOR12]
-	add	x19, x19, :lo12:.LANCHOR70
-	strh	wzr, [x19, 56]
-	ldrh	w0, [x0, 80]
-	bl	ftl_free_sblk
-	adrp	x2, .LANCHOR110
-	ldr	x1, [x23, #:lo12:.LANCHOR12]
-	mov	w0, -1
-	ldr	x2, [x2, #:lo12:.LANCHOR110]
-	strh	w0, [x1, 80]
-	strh	w0, [x2, 126]
-	strh	w0, [x1, 130]
-	ldr	x0, [x19, 8]
-	bl	zbuf_free
-	strb	wzr, [x20, #:lo12:.LANCHOR156]
-	str	xzr, [x19, 8]
-	b	.L4085
-.L3884:
-	adrp	x0, .LANCHOR105
-	adrp	x27, .LANCHOR97
-	ldrh	w3, [x26, 80]
-	ldrh	w22, [x0, #:lo12:.LANCHOR105]
-	adrp	x0, .LANCHOR99
-	ldrh	w24, [x27, #:lo12:.LANCHOR97]
-	ldrh	w2, [x0, #:lo12:.LANCHOR99]
-	add	w22, w1, w22
-	stp	x0, x27, [x29, 112]
-	and	w22, w22, 65535
-	add	w24, w24, w2
-	mov	w2, 65535
-	and	w24, w24, 65535
-	cmp	w3, w2
-	beq	.L3893
-	cbnz	w25, .L3894
-	adrp	x0, .LANCHOR86
-	ldrh	w0, [x0, #:lo12:.LANCHOR86]
-	cmp	w21, w0, lsl 1
-	blt	.L3894
-.L3999:
-	mov	w19, 16
-	b	.L3882
-.L3894:
-	adrp	x5, .LANCHOR96
-	adrp	x0, .LANCHOR92
-	add	x0, x0, :lo12:.LANCHOR92
-	adrp	x25, .LANCHOR84
-	ldrh	w1, [x5, #:lo12:.LANCHOR96]
-	add	w1, w1, 1
-	and	w1, w1, 65535
-	strh	w1, [x5, #:lo12:.LANCHOR96]
-	bl	_list_get_gc_head_node
-	and	w3, w0, 65535
-	mov	w1, 65535
-	cmp	w3, w1
-	beq	.L3895
-	adrp	x4, .LANCHOR11
-	ubfiz	x3, x3, 1, 16
-	adrp	x1, .LANCHOR157
-	mov	x19, x1
-	ldr	x4, [x4, #:lo12:.LANCHOR11]
-	ldr	w2, [x1, #:lo12:.LANCHOR157]
-	add	w2, w2, 1
-	str	w2, [x1, #:lo12:.LANCHOR157]
-	ldrh	w3, [x4, x3]
-	adrp	x4, .LANCHOR94
-	ldrh	w4, [x4, #:lo12:.LANCHOR94]
-	cmp	w4, w3
-	bcs	.L3896
-	adrp	x1, .LANCHOR8
-	ldrh	w1, [x1, #:lo12:.LANCHOR8]
-	cmp	w2, w1, lsr 4
-	bls	.L3895
-	adrp	x1, .LANCHOR100
-	ldrh	w1, [x1, #:lo12:.LANCHOR100]
-	cmp	w1, w3
-	bls	.L3895
-.L3896:
-	ldrb	w2, [x25, #:lo12:.LANCHOR84]
-	mov	w1, 0
-	bl	gc_add_sblk
-	cbz	w0, .L3897
-	mov	w0, 1
-	str	wzr, [x19, #:lo12:.LANCHOR157]
-	strb	w0, [x20, #:lo12:.LANCHOR156]
-	b	.L3999
-.L3895:
-	strh	wzr, [x5, #:lo12:.LANCHOR96]
-.L3897:
-	cmp	w22, 15
-	bls	.L4001
-	adrp	x0, .LANCHOR91
-	ldrh	w1, [x0, #:lo12:.LANCHOR91]
-	adrp	x0, .LANCHOR101
-	ldrh	w0, [x0, #:lo12:.LANCHOR101]
-	cmp	w1, w0
-	bhi	.L4001
-	cmp	w24, 0
-	cset	w19, eq
-	add	w19, w19, 1
-.L3898:
-	adrp	x0, .LANCHOR19
-	ldr	w0, [x0, #:lo12:.LANCHOR19]
-	tbz	x0, 8, .L3899
-	ldr	x0, [x23, #:lo12:.LANCHOR12]
-	mov	w4, w22
-	ldrb	w2, [x25, #:lo12:.LANCHOR84]
-	mov	w3, w21
-	mov	w1, 2807
-	ldrh	w7, [x0, 122]
-	ldrh	w6, [x0, 120]
-	ldrh	w5, [x0, 124]
-	ldrh	w0, [x26, 80]
-	str	w0, [sp]
-	adrp	x0, .LC239
-	add	x0, x0, :lo12:.LC239
-	bl	printf
-.L3899:
-	ldrb	w0, [x25, #:lo12:.LANCHOR84]
-	mov	w2, 1
-	mov	w1, w19
-	bl	gc_search_src_blk
-	cmp	w0, 0
-	ble	.L3900
-.L3901:
-	mov	w0, 1
-.L4087:
-	strb	w0, [x20, #:lo12:.LANCHOR156]
-	b	.L3999
-.L4001:
-	mov	w19, 2
-	b	.L3898
-.L3900:
-	ldrb	w0, [x25, #:lo12:.LANCHOR84]
-	mov	w2, 1
-	mov	w1, 3
-	bl	gc_search_src_blk
-	cmp	w0, 0
-	bgt	.L3901
-	b	.L3999
-.L3893:
-	cmp	w25, 1
-	bne	.L3903
-	adrp	x0, .LANCHOR110
-	ldr	x0, [x0, #:lo12:.LANCHOR110]
-	ldrh	w0, [x0, 150]
-	cbz	w0, .L3904
-	cmp	w1, 8
-	bls	.L3904
-	bl	gc_ink_check_sblk
-.L3904:
-	bl	gc_scan_static_data
-	adrp	x26, .LANCHOR84
-	ldr	x0, [x23, #:lo12:.LANCHOR12]
-	ldrh	w0, [x0, 122]
-	cbz	w0, .L3905
-.L3906:
-	mov	w0, 1
-	strb	w0, [x26, #:lo12:.LANCHOR84]
-	b	.L4087
-.L3905:
-	bl	gc_static_wearleveling
-	mov	w19, w0
-	cbnz	w0, .L3906
-	adrp	x27, .LANCHOR158
-	cbz	w22, .L3907
-	cmp	w21, w24
-	adrp	x1, .LANCHOR98
-	bcs	.L3908
-	ldrh	w0, [x1, #:lo12:.LANCHOR98]
-	cmp	w0, w21
-	bhi	.L3909
-.L3908:
-	ldrh	w1, [x1, #:lo12:.LANCHOR98]
-	add	w0, w21, w24
-	cmp	w0, w1
-	blt	.L3909
-	adrp	x0, .LANCHOR91
-	ldrh	w1, [x0, #:lo12:.LANCHOR91]
-	adrp	x0, .LANCHOR101
-	ldrh	w0, [x0, #:lo12:.LANCHOR101]
-	cmp	w1, w0
-	bcc	.L3907
-.L3909:
-	mov	w0, 1
-	mov	w1, 16
-	strb	w0, [x26, #:lo12:.LANCHOR84]
-	adrp	x0, .LANCHOR95
-	add	x0, x0, :lo12:.LANCHOR95
-	bl	_list_get_gc_head_node
-	and	w1, w0, 65535
-	mov	w2, 65535
-	adrp	x28, .LANCHOR157
-	cmp	w1, w2
-	beq	.L3910
-	adrp	x2, .LANCHOR11
-	ubfiz	x1, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR11]
-	ldrh	w2, [x2, x1]
-	ldrh	w1, [x27, #:lo12:.LANCHOR158]
-	cmp	w2, w1
-	bcs	.L3910
-	cmp	w21, 2
-	bls	.L3910
-	strb	wzr, [x26, #:lo12:.LANCHOR84]
-	mov	w2, 0
-	str	wzr, [x28, #:lo12:.LANCHOR157]
-	mov	w1, 1
-	bl	gc_add_sblk
-	cbnz	w0, .L3901
-.L3910:
-	mov	w1, 0
-	adrp	x0, .LANCHOR90
-	add	x0, x0, :lo12:.LANCHOR90
-	bl	_list_get_gc_head_node
-	and	w1, w0, 65535
-	mov	w2, 65535
-	cmp	w1, w2
-	beq	.L3911
-	adrp	x2, .LANCHOR11
-	ubfiz	x1, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR11]
-	ldrh	w2, [x2, x1]
-	ldrh	w1, [x27, #:lo12:.LANCHOR158]
-	cmp	w2, w1
-	bcs	.L3911
-	cmp	w21, 2
-	bls	.L3911
-	strb	wzr, [x26, #:lo12:.LANCHOR84]
-	mov	w2, 0
-	str	wzr, [x28, #:lo12:.LANCHOR157]
-	mov	w1, 1
-	bl	gc_add_sblk
-	cbnz	w0, .L3901
-.L3911:
-	ldrh	w0, [x27, #:lo12:.LANCHOR158]
-	adrp	x1, .LANCHOR94
-	add	w0, w0, 1
-	ldrh	w5, [x1, #:lo12:.LANCHOR94]
-	and	w0, w0, 65535
-	strh	w0, [x27, #:lo12:.LANCHOR158]
-	cmp	w0, w5, lsr 5
-	bls	.L3912
-	mov	w0, 4
-	strh	w0, [x27, #:lo12:.LANCHOR158]
-.L3912:
-	adrp	x1, .LANCHOR87
-	ldr	w0, [x28, #:lo12:.LANCHOR157]
-	strh	wzr, [x1, #:lo12:.LANCHOR87]
-	adrp	x1, .LANCHOR88
-	add	w0, w0, 1
-	str	w0, [x28, #:lo12:.LANCHOR157]
-	strh	wzr, [x1, #:lo12:.LANCHOR88]
-	adrp	x1, .LANCHOR89
-	strh	wzr, [x1, #:lo12:.LANCHOR89]
-	adrp	x1, .LANCHOR8
-	ldrh	w1, [x1, #:lo12:.LANCHOR8]
-	cmp	w0, w1, lsr 5
-	adrp	x0, .LANCHOR91
-	bls	.L3913
-	ldrh	w1, [x0, #:lo12:.LANCHOR91]
-	cmp	w1, w22
-	bls	.L3913
-	mov	w1, 0
-	adrp	x0, .LANCHOR92
-	add	x0, x0, :lo12:.LANCHOR92
-	bl	_list_get_gc_head_node
-	and	w0, w0, 65535
-	mov	w1, 65535
-	cmp	w0, w1
-	bne	.L3914
-.L4075:
-	mov	w19, 16
-	b	.L3915
-.L3914:
-	adrp	x1, .LANCHOR11
-	ubfiz	x0, x0, 1, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR11]
-	ldrh	w1, [x1, x0]
-	adrp	x0, .LANCHOR79
-	ldrb	w0, [x0, #:lo12:.LANCHOR79]
-	mul	w0, w0, w5
-	cmp	w1, w0
-	bgt	.L4075
-	str	wzr, [x28, #:lo12:.LANCHOR157]
-	mov	w2, 4
-.L4081:
-	mov	w1, 2
-.L4074:
-	ldrb	w0, [x26, #:lo12:.LANCHOR84]
-	bl	gc_search_src_blk
-	and	w0, w0, 65535
-	cbz	w0, .L4075
-	b	.L3901
-.L3913:
-	ldrh	w1, [x0, #:lo12:.LANCHOR91]
-	adrp	x0, .LANCHOR101
-	ldrh	w0, [x0, #:lo12:.LANCHOR101]
-	cmp	w1, w0
-	bcc	.L3918
-	mov	w2, 1
-	b	.L4081
-.L3918:
-	ldr	x0, [x29, 120]
-	ldrh	w0, [x0, #:lo12:.LANCHOR97]
-	cbnz	w0, .L3919
-	ldr	x0, [x29, 112]
-	ldrh	w0, [x0, #:lo12:.LANCHOR99]
-	cmp	w0, 8
-	bls	.L3920
-.L3919:
-	mov	w2, 4
-	mov	w1, 1
-	b	.L4074
-.L3920:
-	adrp	x0, .LANCHOR70+2110
-	ldrh	w0, [x0, #:lo12:.LANCHOR70+2110]
-	cbnz	w0, .L4075
-.L3915:
-	ldr	x0, [x23, #:lo12:.LANCHOR12]
-	adrp	x28, .LANCHOR84
-	mov	w1, 1
-	mov	x23, x28
-	strb	w1, [x28, #:lo12:.LANCHOR84]
-	ldrh	w0, [x0, 124]
-	cbz	w0, .L3921
-	strb	wzr, [x28, #:lo12:.LANCHOR84]
-	strb	w1, [x20, #:lo12:.LANCHOR156]
-.L3882:
-	mov	w0, w19
-	ldp	x19, x20, [sp, 32]
-	ldp	x21, x22, [sp, 48]
-	ldp	x23, x24, [sp, 64]
-	ldp	x25, x26, [sp, 80]
-	ldp	x27, x28, [sp, 96]
-	ldp	x29, x30, [sp, 16]
-	add	sp, sp, 144
-	ret
-.L3907:
-	adrp	x0, .LANCHOR94
-	ldrh	w1, [x0, #:lo12:.LANCHOR94]
-	ldrh	w0, [x27, #:lo12:.LANCHOR158]
-	cmp	w0, w1, lsr 5
-	bcc	.L4075
-	mov	w0, 4
-	strh	w0, [x27, #:lo12:.LANCHOR158]
-	b	.L4075
-.L3903:
-	adrp	x0, .LANCHOR86
-	ldrh	w0, [x0, #:lo12:.LANCHOR86]
-	cmp	w0, w21
-	bcs	.L4075
-	ldrh	w0, [x26, 124]
-	cbz	w0, .L3999
-	b	.L4075
-.L3921:
-	adrp	x0, .LANCHOR86
 	mov	x26, x0
-	ldrh	w2, [x0, #:lo12:.LANCHOR86]
-	cmp	w21, w2
-	bcs	.L3922
-	cbz	w22, .L3923
-	cmp	w22, 16
-	bls	.L3924
-	adrp	x0, .LANCHOR91
-	ldrh	w2, [x0, #:lo12:.LANCHOR91]
-	adrp	x0, .LANCHOR101
-	ldrh	w0, [x0, #:lo12:.LANCHOR101]
-	cmp	w2, w0
-	bhi	.L3924
-	mov	w2, 4
-	mov	w0, w1
-	bl	gc_search_src_blk
-	tst	w0, 65535
-	bne	.L3925
-.L4082:
-	mov	w2, 4
-	mov	w1, 3
-	ldrb	w0, [x28, #:lo12:.LANCHOR84]
-	b	.L4077
-.L3925:
-	mov	w1, 0
-	adrp	x0, .LANCHOR92
-	add	x0, x0, :lo12:.LANCHOR92
-	bl	_list_get_gc_head_node
-	and	w3, w0, 65535
-	mov	w1, 65535
-	cmp	w3, w1
-	beq	.L3928
-	adrp	x4, .LANCHOR11
-	ubfiz	x3, x3, 1, 16
-	adrp	x1, .LANCHOR157
-	mov	x21, x1
-	ldr	x4, [x4, #:lo12:.LANCHOR11]
-	ldr	w2, [x1, #:lo12:.LANCHOR157]
-	add	w2, w2, 1
-	str	w2, [x1, #:lo12:.LANCHOR157]
-	ldrh	w3, [x4, x3]
-	adrp	x4, .LANCHOR94
-	ldrh	w4, [x4, #:lo12:.LANCHOR94]
-	cmp	w4, w3
-	bcs	.L3929
-	adrp	x1, .LANCHOR8
-	ldrh	w1, [x1, #:lo12:.LANCHOR8]
-	cmp	w2, w1, lsr 4
-	bls	.L3928
-	adrp	x1, .LANCHOR100
-	ldrh	w1, [x1, #:lo12:.LANCHOR100]
-	cmp	w1, w3
-	bls	.L3928
-.L3929:
-	ldrb	w2, [x23, #:lo12:.LANCHOR84]
-	mov	w1, 0
-	bl	gc_add_sblk
-	str	wzr, [x21, #:lo12:.LANCHOR157]
-	adrp	x0, .LANCHOR122
-	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR122]
-.L3928:
-	mov	w0, 1
-	strb	w0, [x20, #:lo12:.LANCHOR156]
-	b	.L3882
-.L3924:
-	mov	w2, 1
-	mov	w1, 2
-	mov	w0, w2
-	bl	gc_search_src_blk
-	tst	w0, 65535
-	bne	.L3928
-	ldrb	w0, [x23, #:lo12:.LANCHOR84]
-	mov	w2, 4
-	mov	w1, 3
-.L4077:
-	bl	gc_search_src_blk
-	and	w0, w0, 65535
-.L3926:
-	cbnz	w0, .L3928
-	b	.L3882
-.L3923:
-	strb	wzr, [x28, #:lo12:.LANCHOR84]
-	cmp	w21, 16
-	bls	.L3931
-	mov	w2, 4
-	mov	w1, 3
-	mov	w0, 0
-	b	.L4077
-.L3931:
-	mov	w2, w1
-	mov	w0, 0
-	bl	gc_search_src_blk
-	tst	w0, 65535
-	bne	.L3928
-	b	.L4082
-.L3922:
-	cmp	w25, 1
-	bne	.L3882
-	cmp	w21, w2, lsl 1
-	bge	.L3932
-	cmp	w24, w22, lsr 1
-	bcs	.L3933
-	adrp	x1, .LANCHOR91
-	ldrh	w2, [x1, #:lo12:.LANCHOR91]
-	adrp	x1, .LANCHOR101
-	ldrh	w1, [x1, #:lo12:.LANCHOR101]
-	cmp	w2, w1
-	bcs	.L3933
-	adrp	x1, .LANCHOR98
-	ldrh	w1, [x1, #:lo12:.LANCHOR98]
-	lsr	w1, w1, 2
-	strh	w1, [x0, #:lo12:.LANCHOR86]
-	b	.L3882
-.L3933:
-	mov	w1, 8
-	adrp	x25, .LANCHOR95
-	add	x0, x25, :lo12:.LANCHOR95
-	bl	_list_get_gc_head_node
-	and	w1, w0, 65535
-	mov	w2, 65535
-	cmp	w1, w2
-	beq	.L3934
-	adrp	x2, .LANCHOR11
-	ubfiz	x1, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR11]
-	ldrh	w1, [x2, x1]
-	cmp	w1, 3
-	bhi	.L3934
-	cbz	w21, .L3934
-	strb	wzr, [x23, #:lo12:.LANCHOR84]
-	mov	w2, 0
-	mov	w1, 1
-	bl	gc_add_sblk
-	cbnz	w0, .L3928
-.L3934:
-	mov	w1, 0
-	adrp	x0, .LANCHOR92
-	add	x0, x0, :lo12:.LANCHOR92
-	bl	_list_get_gc_head_node
-	and	w28, w0, 65535
-	mov	w1, 65535
-	mov	w3, w28
-	cmp	w28, w1
-	bne	.L3935
-.L3940:
-	cmp	w22, 1
-	bhi	.L3936
-.L3937:
-	cmp	w21, w24
-	adrp	x21, .LANCHOR98
-	bcs	.L3944
-	mov	w1, 4
-	strb	wzr, [x23, #:lo12:.LANCHOR84]
-	add	x0, x25, :lo12:.LANCHOR95
-	bl	_list_get_gc_head_node
-	and	w0, w0, 65535
-	mov	w1, 65535
-	cmp	w0, w1
-	beq	.L3944
-	adrp	x1, .LANCHOR11
-	ubfiz	x0, x0, 1, 16
-	adrp	x2, .LANCHOR79
-	ldr	x1, [x1, #:lo12:.LANCHOR11]
-	ldrb	w2, [x2, #:lo12:.LANCHOR79]
-	ldrh	w1, [x1, x0]
-	adrp	x0, .LANCHOR94
-	ldrh	w0, [x0, #:lo12:.LANCHOR94]
-	mul	w0, w0, w2
-	cmp	w1, w0, lsr 1
-	ble	.L3946
-.L3944:
-	ldrh	w0, [x21, #:lo12:.LANCHOR98]
-	lsr	w0, w0, 2
-	strh	w0, [x26, #:lo12:.LANCHOR86]
-	b	.L3882
-.L3935:
-	adrp	x2, .LANCHOR157
-	adrp	x4, .LANCHOR8
-	uxtw	x28, w28
-	ldr	w1, [x2, #:lo12:.LANCHOR157]
-	ldrh	w4, [x4, #:lo12:.LANCHOR8]
-	add	w1, w1, 1
-	str	w1, [x2, #:lo12:.LANCHOR157]
-	cmp	w1, w4, lsr 4
-	adrp	x4, .LANCHOR11
-	bls	.L3938
-	ldr	x1, [x4, #:lo12:.LANCHOR11]
-	str	wzr, [x2, #:lo12:.LANCHOR157]
-	ldrh	w2, [x1, x28, lsl 1]
-	adrp	x1, .LANCHOR100
-	ldrh	w1, [x1, #:lo12:.LANCHOR100]
-	cmp	w2, w1
-	bcs	.L3938
-	mov	w5, 1
-	str	x4, [x29, 96]
-	strb	w5, [x23, #:lo12:.LANCHOR84]
-	mov	w2, 1
-	stp	w3, w5, [x29, 104]
-	mov	w1, 0
-	bl	gc_add_sblk
-	ldp	w3, w5, [x29, 104]
-	ldr	x4, [x29, 96]
-	cbz	w0, .L3938
-	strb	w5, [x20, #:lo12:.LANCHOR156]
-	b	.L3882
-.L3938:
-	ldr	x0, [x4, #:lo12:.LANCHOR11]
-	ldrh	w1, [x0, x28, lsl 1]
-	adrp	x0, .LANCHOR94
-	ldrh	w0, [x0, #:lo12:.LANCHOR94]
-	cmp	w1, w0, lsr 1
-	bhi	.L3939
-	mov	w2, 0
-	mov	w1, 1
-	mov	w0, w3
-	bl	gc_add_sblk
-	b	.L3928
-.L3939:
-	ldp	x2, x0, [x29, 112]
-	ldrh	w2, [x2, #:lo12:.LANCHOR99]
-	ldrh	w0, [x0, #:lo12:.LANCHOR97]
-	add	w0, w0, w2
-	adrp	x2, .LANCHOR98
-	ldrh	w2, [x2, #:lo12:.LANCHOR98]
-	cmp	w0, w2, lsl 1
-	ble	.L3940
-	adrp	x0, .LANCHOR100
-	ldrh	w0, [x0, #:lo12:.LANCHOR100]
-	cmp	w0, w1
-	bcc	.L3937
-	b	.L3940
-.L3936:
-	mov	w1, 1
-	strb	w1, [x23, #:lo12:.LANCHOR84]
-	cmp	w22, 16
-	bls	.L3941
-	adrp	x0, .LANCHOR91
-	ldrh	w2, [x0, #:lo12:.LANCHOR91]
-	adrp	x0, .LANCHOR101
-	ldrh	w0, [x0, #:lo12:.LANCHOR101]
-	cmp	w2, w0
-	bhi	.L3941
-	mov	w0, w1
-	mov	w2, 4
-.L4084:
-	bl	gc_search_src_blk
-	ands	w0, w0, 65535
-	bne	.L3942
-	ldrb	w0, [x23, #:lo12:.LANCHOR84]
-	mov	w2, 4
-	mov	w1, 3
-	bl	gc_search_src_blk
-	and	w0, w0, 65535
-.L3942:
-	adrp	x1, .LANCHOR98
-	cmp	w21, w24, lsr 1
-	ldrh	w1, [x1, #:lo12:.LANCHOR98]
-	bls	.L4078
-	lsr	w1, w1, 2
-.L4079:
-	strh	w1, [x26, #:lo12:.LANCHOR86]
-	b	.L3926
-.L3941:
-	mov	w2, 1
-	mov	w1, 2
-	mov	w0, w2
-	b	.L4084
-.L3946:
-	mov	w1, 3
-	mov	w2, 4
-	mov	w0, 0
-	bl	gc_search_src_blk
-	ldrh	w1, [x21, #:lo12:.LANCHOR98]
-	and	w0, w0, 65535
-.L4078:
-	lsr	w1, w1, 1
-	b	.L4079
-.L3932:
-	adrp	x1, .LANCHOR98
-	ldrh	w1, [x1, #:lo12:.LANCHOR98]
-	lsr	w1, w1, 2
-	strh	w1, [x0, #:lo12:.LANCHOR86]
-	adrp	x0, .LANCHOR70+2110
-	ldrh	w0, [x0, #:lo12:.LANCHOR70+2110]
-	cmp	w0, 0
-	csel	w19, w19, wzr, ne
-	b	.L3882
-.L3886:
-	adrp	x7, .LANCHOR70
-	mov	w0, 65535
-	ldrh	w1, [x7, #:lo12:.LANCHOR70]
-	cmp	w1, w0
-	bne	.L3947
-	bl	gc_get_src_blk
-	strh	w0, [x7, #:lo12:.LANCHOR70]
-.L3947:
-	ldrh	w0, [x7, #:lo12:.LANCHOR70]
-	mov	w1, 65535
-	cmp	w0, w1
-	beq	.L3948
-	adrp	x1, .LANCHOR8
-	ldrh	w1, [x1, #:lo12:.LANCHOR8]
-	cmp	w1, w0
-	bhi	.L3948
+	cbnz	x0, .L3804
+	bl	ftl_write_commit
+	b	.L3802
+.L3804:
+	strb	wzr, [x0, 57]
+	cmp	w20, w24
+	ldr	x0, [x29, 104]
+	ccmp	w20, w22, 4, ne
+	ldrb	w0, [x0]
+	strb	w0, [x26, 56]
+	bne	.L3807
+	cmp	w20, w24
+	bne	.L3808
+	udiv	w1, w19, w0
+	msub	w1, w1, w0, w19
+	and	w1, w1, 255
+	strb	w1, [x26, 57]
+	sub	w0, w0, w1
+	and	w0, w0, 255
+	cmp	w21, w0
+	csel	w0, w21, w0, cc
+.L3822:
+	strb	w0, [x26, 56]
+.L3807:
+	ldr	x4, [x26, 8]
+	mov	x1, x25
+	ldrb	w0, [x26, 57]
+	sub	w23, w23, #1
+	ldrb	w2, [x26, 56]
+	ubfiz	x0, x0, 9, 8
+	lsl	w2, w2, 9
+	add	x0, x4, x0
+	bl	ftl_memcpy
+	adrp	x0, .LANCHOR69
+	ldr	x1, [x0, #:lo12:.LANCHOR69]
+	ldr	w0, [x1, 8]
+	str	w20, [x26, 36]
+	add	w20, w20, 1
+	add	w2, w0, 1
+	str	w2, [x1, 8]
+	str	w0, [x26, 32]
+	mov	x0, x26
+	bl	ftl_write_buf
+	ldrb	w0, [x26, 56]
+	ubfiz	x0, x0, 9, 8
+	add	x25, x25, x0
+	b	.L3802
+.L3808:
+	add	w1, w19, w21
+	msub	w0, w0, w20, w1
+	b	.L3822
+.L3814:
 	mov	w0, -1
-	strh	w0, [x7, #:lo12:.LANCHOR70]
-.L3948:
-	ldrh	w3, [x7, #:lo12:.LANCHOR70]
-	mov	w0, 65535
-	add	x1, x7, :lo12:.LANCHOR70
-	cmp	w3, w0
-	beq	.L4086
-	adrp	x0, .LANCHOR9
-	ldrh	w5, [x1, 56]
-	uxtw	x4, w3
-	ldr	x2, [x0, #:lo12:.LANCHOR9]
-	add	x2, x2, x4, lsl 2
-	cbz	w5, .L3950
-	add	x1, x1, 58
+	b	.L3797
+	.size	zftl_write, .-zftl_write
+	.section	.text.zftl_sys_write,"ax",@progbits
+	.align	2
+	.global	zftl_sys_write
+	.type	zftl_sys_write, %function
+zftl_sys_write:
+	mov	x3, x2
+	mov	w2, w1
+	mov	w1, w0
+	mov	w0, 2
+	b	zftl_write
+	.size	zftl_sys_write, .-zftl_sys_write
+	.section	.text.StorageSysDataStore,"ax",@progbits
+	.align	2
+	.global	StorageSysDataStore
+	.type	StorageSysDataStore, %function
+StorageSysDataStore:
+	mov	x3, x1
+	mov	w2, 1
+	mov	w1, w0
+	mov	w0, 2
+	b	zftl_write
+	.size	StorageSysDataStore, .-StorageSysDataStore
+	.section	.text.FlashBootVendorWrite,"ax",@progbits
+	.align	2
+	.global	FlashBootVendorWrite
+	.type	FlashBootVendorWrite, %function
+FlashBootVendorWrite:
+	mov	x3, x2
+	mov	w2, w1
+	add	w1, w0, 512
+	mov	w0, 2
+	b	zftl_write
+	.size	FlashBootVendorWrite, .-FlashBootVendorWrite
+	.section	.text.ftl_write,"ax",@progbits
+	.align	2
+	.global	ftl_write
+	.type	ftl_write, %function
+ftl_write:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w19, w2
+	stp	x21, x22, [sp, 32]
+	mov	x20, x3
+	mov	w22, w1
+	ands	w21, w0, 255
+	bne	.L3827
+	mov	w3, w2
 	mov	w0, 0
-.L3952:
-	ldrh	w6, [x1], 2
-	cmp	w6, w3
-	bne	.L3951
-.L3956:
-	adrp	x0, .LANCHOR70
-	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR70]
-	b	.L3999
-.L3951:
-	add	w0, w0, 1
-	and	w0, w0, 65535
-	cmp	w5, w0
-	bne	.L3952
-.L3950:
-	ldrb	w0, [x2, 2]
-	and	w1, w0, 224
-	cmp	w1, 224
-	beq	.L3953
-	tst	w0, 192
-	bne	.L3954
-.L3953:
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
-	ldrh	w0, [x0, x4, lsl 1]
-	cbz	w0, .L3956
-	mov	w2, 3306
+	mov	x2, x20
+	bl	idb_write_data
+.L3827:
+	mov	x3, x20
+	mov	w2, w19
+	mov	w1, w22
+	mov	w0, w21
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	b	zftl_write
+	.size	ftl_write, .-ftl_write
+	.section	.text.ftl_vendor_write,"ax",@progbits
+	.align	2
+	.global	ftl_vendor_write
+	.type	ftl_vendor_write, %function
+ftl_vendor_write:
+	mov	x3, x2
+	mov	w2, w1
+	add	w1, w0, 512
+	mov	w0, 2
+	b	zftl_write
+	.size	ftl_vendor_write, .-ftl_vendor_write
+	.section	.text.zftl_vendor_write,"ax",@progbits
+	.align	2
+	.global	zftl_vendor_write
+	.type	zftl_vendor_write, %function
+zftl_vendor_write:
+	b	ftl_vendor_write
+	.size	zftl_vendor_write, .-zftl_vendor_write
+	.section	.text.gc_do_copy_back,"ax",@progbits
+	.align	2
+	.global	gc_do_copy_back
+	.type	gc_do_copy_back, %function
+gc_do_copy_back:
+	stp	x29, x30, [sp, -224]!
+	adrp	x0, .LANCHOR90
+	add	x29, sp, 0
+	ldrb	w0, [x0, #:lo12:.LANCHOR90]
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	cbnz	w0, .L3832
+	bl	buf_alloc
+	mov	x19, x0
+	cbz	x0, .L3831
+	adrp	x21, .LANCHOR76
+	add	x3, x21, :lo12:.LANCHOR76
+	ldrh	w2, [x3, 26]
+	mov	w0, w2
+	bl	gc_get_src_ppa_from_index
+	add	w2, w2, 1
+	mov	w22, w0
+	str	w22, [x19, 40]
+	strh	w2, [x3, 26]
+	mov	w1, 1
+	mov	x0, x19
+	bl	sblk_read_page
+	ldr	w0, [x19, 52]
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	bne	.L3834
 	adrp	x1, .LANCHOR237
 	adrp	x0, .LC0
+	mov	w2, 1032
 	add	x1, x1, :lo12:.LANCHOR237
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3956
-.L3954:
-	mov	w0, 2
-	b	.L4087
-.L3887:
-	bl	gc_scan_src_blk
+.L3834:
+	ldr	x0, [x19, 24]
+	ldr	w20, [x0, 4]
+	mov	w0, w20
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 176]
 	cmn	w0, #1
-	bne	.L3957
-	mov	w0, 3
-	b	.L4087
-.L3957:
-	adrp	x19, .LANCHOR70
-	mov	w2, 65535
-	add	x0, x19, :lo12:.LANCHOR70
-	ldrh	w1, [x19, #:lo12:.LANCHOR70]
-	cmp	w1, w2
-	beq	.L3901
-	ldrh	w2, [x0, 24]
-	cbz	w2, .L3958
-	mov	w1, 4
-	strh	wzr, [x0, 26]
-	strb	w1, [x20, #:lo12:.LANCHOR156]
-	b	.L3999
-.L3958:
-	mov	w0, 1
-	strb	w0, [x20, #:lo12:.LANCHOR156]
-	adrp	x0, .LANCHOR11
-	ubfiz	x1, x1, 1, 16
-	mov	x20, x0
-	ldr	x2, [x0, #:lo12:.LANCHOR11]
-	ldrh	w1, [x2, x1]
-	cbz	w1, .L3959
-	adrp	x1, .LANCHOR237
-	adrp	x0, .LC0
-	mov	w2, 3336
-	add	x1, x1, :lo12:.LANCHOR237
-	add	x0, x0, :lo12:.LC0
+	bne	.L3835
+	mov	w2, 0
+	add	x1, x29, 176
+	mov	w0, w20
+	bl	pm_log2phys
+.L3835:
+	ldr	w23, [x29, 176]
+	cmp	w22, w23
+	bne	.L3836
+	adrp	x0, .LANCHOR55
+	add	x0, x0, :lo12:.LANCHOR55
+	add	x1, x0, 2
+	add	x0, x0, 1026
+.L3839:
+	ldr	w2, [x1, 34]
+	cmp	w20, w2
+	bne	.L3837
+	ldrb	w2, [x1]
+	tbz	x2, 1, .L3837
+	mov	x0, x19
+	bl	zbuf_free
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 8, .L3831
+	add	x21, x21, :lo12:.LANCHOR76
+	adrp	x0, .LC231
+	mov	w2, w22
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC231
+	ldrh	w3, [x21, 26]
 	bl	printf
-.L3959:
-	ldrh	w0, [x19, #:lo12:.LANCHOR70]
-	add	x21, x19, :lo12:.LANCHOR70
-	bl	ftl_free_sblk
-	ldr	x0, [x20, #:lo12:.LANCHOR11]
-	ldrh	w1, [x19, #:lo12:.LANCHOR70]
-	strh	wzr, [x0, x1, lsl 1]
-	ldrh	w0, [x21, 30]
-	add	w0, w0, 1
-	and	w0, w0, 65535
-	cmp	w0, 8
-	bhi	.L3960
-	strh	w0, [x21, 30]
-	b	.L3956
-.L3960:
-	strh	wzr, [x21, 30]
-	bl	ftl_flush
-	bl	pm_flush
-	bl	ftl_ext_info_flush
-	mov	w0, 0
-	bl	ftl_info_flush
-	b	.L3956
-.L3888:
-	adrp	x19, .LANCHOR70
-	adrp	x23, .LANCHOR94
-	add	x22, x19, :lo12:.LANCHOR70
-	add	x23, x23, :lo12:.LANCHOR94
-.L4048:
-	bl	gc_scan_src_blk_one_page
-	ldrh	w1, [x22, 2]
-	ldrh	w0, [x23]
-	cmp	w1, w0
-	bcs	.L3962
-	cmp	w21, 7
-	bls	.L4048
-	b	.L3999
-.L3962:
-	ldrh	w3, [x22, 24]
-	ldrh	w1, [x22]
-	cbz	w3, .L3963
-	mov	w0, 4
-	strb	w0, [x20, #:lo12:.LANCHOR156]
-	adrp	x20, .LANCHOR11
-	ubfiz	x0, x1, 1, 16
-	strh	wzr, [x22, 26]
-	ldr	x2, [x20, #:lo12:.LANCHOR11]
-	ldrh	w2, [x2, x0]
-	cmp	w3, w2
-	beq	.L3964
+.L3831:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 224
+	ret
+.L3837:
+	add	x1, x1, 64
+	cmp	x1, x0
+	bne	.L3839
+	adrp	x0, .LANCHOR68
+	strb	wzr, [x19, 57]
+	str	w20, [x19, 36]
+	ldrb	w0, [x0, #:lo12:.LANCHOR68]
+	strb	w0, [x19, 56]
+	ldr	x0, [x19, 24]
+	ldr	w1, [x0]
+	str	w1, [x19, 32]
+	str	wzr, [x0, 16]
 	adrp	x0, .LANCHOR19
 	ldr	w0, [x0, #:lo12:.LANCHOR19]
-	tbz	x0, 10, .L3964
-	adrp	x0, .LC240
-	add	x0, x0, :lo12:.LC240
-	bl	printf
-.L3964:
-	ldrh	w2, [x19, #:lo12:.LANCHOR70]
-	add	x0, x19, :lo12:.LANCHOR70
-	ldr	x1, [x20, #:lo12:.LANCHOR11]
-	ldrh	w0, [x0, 24]
-	ldrh	w1, [x1, x2, lsl 1]
-	cmp	w1, w0
-	beq	.L3965
-	adrp	x1, .LANCHOR237
-	adrp	x0, .LC0
-	mov	w2, 3379
-	add	x1, x1, :lo12:.LANCHOR237
-	add	x0, x0, :lo12:.LC0
+	tbz	x0, 8, .L3840
+	mov	w0, w20
+	bl	lpa_hash_get_ppa
+	add	x1, x21, :lo12:.LANCHOR76
+	mov	w3, w0
+	mov	w4, w22
+	adrp	x0, .LC232
+	mov	w2, w23
+	add	x0, x0, :lo12:.LC232
+	ldrh	w5, [x1, 26]
+	mov	w1, w20
 	bl	printf
-.L3965:
-	add	x0, x19, :lo12:.LANCHOR70
-	ldrh	w1, [x19, #:lo12:.LANCHOR70]
-	ldrh	w2, [x0, 24]
-	ldr	x0, [x20, #:lo12:.LANCHOR11]
-	strh	w2, [x0, x1, lsl 1]
-	b	.L3999
-.L3963:
-	adrp	x0, .LANCHOR9
-	ldr	x21, [x0, #:lo12:.LANCHOR9]
-	mov	w0, 1
-	strb	w0, [x20, #:lo12:.LANCHOR156]
+.L3840:
+	mov	x0, x19
+	bl	ftl_gc_write_buf
+	bl	ftl_write_commit
+	add	x21, x21, :lo12:.LANCHOR76
+	adrp	x0, .LANCHOR69
+	ldr	x1, [x0, #:lo12:.LANCHOR69]
+	ldr	w0, [x1, 60]
+	add	w0, w0, 1
+	str	w0, [x1, 60]
+	ldrh	w0, [x21, 28]
+	add	w0, w0, 1
+	strh	w0, [x21, 28]
+	b	.L3831
+.L3836:
 	adrp	x0, .LANCHOR19
 	ldr	w0, [x0, #:lo12:.LANCHOR19]
-	add	x21, x21, x1, uxth 2
-	tbz	x0, 8, .L3966
-	ldrb	w2, [x21, 2]
-	adrp	x0, .LC241
-	add	x0, x0, :lo12:.LC241
-	ubfx	x2, x2, 5, 3
-	bl	printf
-.L3966:
-	ldrb	w0, [x21, 2]
-	and	w1, w0, 224
-	cmp	w1, 224
-	beq	.L3967
-	tst	w0, 192
-	bne	.L3968
-.L3967:
-	adrp	x1, .LANCHOR237
-	adrp	x0, .LC0
-	mov	w2, 3389
-	add	x1, x1, :lo12:.LANCHOR237
-	add	x0, x0, :lo12:.LC0
+	tbz	x0, 8, .L3841
+	add	x21, x21, :lo12:.LANCHOR76
+	mov	w0, w20
+	bl	lpa_hash_get_ppa
+	mov	w3, w0
+	mov	w4, w22
+	adrp	x0, .LC232
+	ldrh	w5, [x21, 26]
+	mov	w2, w23
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC232
 	bl	printf
-.L3968:
-	ldrh	w0, [x19, #:lo12:.LANCHOR70]
-	add	x20, x19, :lo12:.LANCHOR70
-	bl	ftl_free_sblk
-	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR70]
-	ldrh	w0, [x20, 30]
-	add	w0, w0, 1
+.L3841:
+	mov	x0, x19
+	bl	zbuf_free
+	b	.L3831
+.L3832:
+	adrp	x2, .LANCHOR12
+	adrp	x1, .LANCHOR85
+	stp	x1, x2, [x29, 136]
+	ldr	x26, [x2, #:lo12:.LANCHOR12]
+	ldrb	w3, [x1, #:lo12:.LANCHOR85]
+	add	x26, x26, 80
+	ldrb	w0, [x26, 9]
+	and	w20, w0, 65535
+	cmp	w3, w20
+	bhi	.L3896
+	cmp	w20, 2
+	mov	w21, 2
+	csel	w21, w20, w21, ls
+	and	w21, w21, 65535
+.L3842:
+	adrp	x1, .LANCHOR84
+	str	x1, [x29, 120]
+	ldrb	w19, [x1, #:lo12:.LANCHOR84]
+	cmp	w19, 3
+	bne	.L3843
+	adrp	x1, .LANCHOR35
+	ldrb	w1, [x1, #:lo12:.LANCHOR35]
+	cbz	w1, .L3844
+	adrp	x1, .LANCHOR76
+	add	x1, x1, :lo12:.LANCHOR76
+	ldrh	w22, [x1, 2106]
+	adrp	x1, .LANCHOR130
+	ldrb	w1, [x1, #:lo12:.LANCHOR130]
+	sdiv	w2, w22, w0
+	and	w25, w2, 65535
+	cbz	w1, .L3845
+	adrp	x1, .LANCHOR238
+	add	x1, x1, :lo12:.LANCHOR238
+	ldrh	w1, [x1, w2, sxtw 1]
+	cmp	w1, 0
+	cset	w19, ne
+.L3963:
+	add	w19, w19, 1
+.L3846:
+	msub	w20, w20, w25, w22
+	and	w20, w20, 65535
+.L3847:
+	adrp	x1, .LANCHOR91
+	mul	w11, w19, w21
+	adrp	x10, .LANCHOR238
+	sxtw	x13, w25
+	ldrh	w5, [x1, #:lo12:.LANCHOR91]
+	adrp	x1, .LANCHOR224
+	add	x10, x10, :lo12:.LANCHOR238
+	mov	w2, 0
+	mul	w0, w5, w0
+	ldrb	w5, [x1, #:lo12:.LANCHOR224]
+	sub	w5, w0, w5
+	adrp	x0, .LANCHOR130
+	ldrb	w12, [x0, #:lo12:.LANCHOR130]
+	adrp	x0, .LANCHOR161
+	ldr	x8, [x0, #:lo12:.LANCHOR161]
+	adrp	x0, .LANCHOR76
+	add	x6, x0, :lo12:.LANCHOR76
+	ldrh	w14, [x6, 24]
+.L3851:
+	cmp	w2, w11
+	bge	.L3904
+	add	w4, w22, w2
+	cmp	w4, w5
+	blt	.L3852
+	cbz	w12, .L3904
+	ldrh	w0, [x10, x13, lsl 1]
+	cmp	w0, w25
+	bcc	.L3853
+.L3904:
+	mov	w23, 1
+	b	.L3849
+.L3896:
+	mov	w21, 1
+	b	.L3842
+.L3845:
+	adrp	x1, .LANCHOR216
+	ldrb	w1, [x1, #:lo12:.LANCHOR216]
+	cbz	w1, .L3898
+	sub	w1, w25, #62
+	and	w1, w1, 65535
+	cmp	w1, 2159
+	bhi	.L3899
+	udiv	w19, w25, w19
+	add	w19, w19, w19, lsl 1
+	sub	w19, w25, w19
+	and	w19, w19, 65535
+	cmp	w19, 0
+	cset	w19, eq
+	b	.L3963
+.L3898:
+	mov	w19, 1
+	b	.L3846
+.L3899:
+	mov	w19, 2
+	b	.L3846
+.L3844:
+	adrp	x1, .LANCHOR89
+	ldrb	w1, [x1, #:lo12:.LANCHOR89]
+	cbz	w1, .L3848
+	adrp	x1, .LANCHOR76
+	add	x1, x1, :lo12:.LANCHOR76
+	add	w20, w0, w0, lsl 1
+	ldrh	w22, [x1, 2106]
+	adrp	x1, .LANCHOR36
+	ldrb	w1, [x1, #:lo12:.LANCHOR36]
+	sdiv	w20, w22, w20
+	and	w25, w20, 65535
+	mul	w20, w0, w20
+	sub	w20, w20, w20, lsl 2
+	add	w20, w20, w22
+	sdiv	w20, w20, w19
+	and	w20, w20, 65535
+	cbz	w1, .L3847
+	add	w3, w25, w25, lsl 1
+	and	w25, w3, 65535
+	b	.L3847
+.L3848:
+	adrp	x1, .LANCHOR76
+	add	x1, x1, :lo12:.LANCHOR76
+	adrp	x2, .LANCHOR239
+	add	x2, x2, :lo12:.LANCHOR239
+	ldrh	w4, [x1, 2106]
+	sdiv	w1, w4, w0
+	ldrh	w23, [x2, w1, sxtw 1]
+	msub	w20, w20, w1, w4
+	and	w20, w20, 65535
+	lsr	w25, w23, 3
+	and	w23, w23, 7
+	cmp	w23, 1
+	madd	w22, w25, w0, w20
+	add	w22, w22, w22, lsl 1
+	and	w22, w22, 65535
+	beq	.L3847
+.L3849:
+	mul	w0, w19, w21
+	stp	wzr, w0, [x29, 152]
+	ubfiz	w0, w21, 1, 15
+	str	w0, [x29, 132]
+	msub	w0, w0, w19, w22
 	and	w0, w0, 65535
-	cmp	w0, 8
-	bhi	.L3969
-	strh	w0, [x20, 30]
-	b	.L3999
-.L3969:
-	strh	wzr, [x20, 30]
-.L4085:
-	bl	flt_sys_flush
-	b	.L3999
-.L3889:
-	ldrh	w1, [x26, 80]
-	mov	w0, 65535
-	cmp	w1, w0
-	bne	.L3970
-	adrp	x0, .LANCHOR84
-	ldrb	w19, [x0, #:lo12:.LANCHOR84]
-	cmp	w19, 1
-	bne	.L3970
-	bl	ftl_flush
-	adrp	x0, .LANCHOR70
-	add	x1, x0, :lo12:.LANCHOR70
-	mov	x20, x0
-	ldrh	w1, [x1, 2192]
-	cbz	w1, .L3971
-	mov	w0, w19
-	mov	w1, 5
-.L4080:
-	bl	zftl_gc_get_free_sblk
-	and	w19, w0, 65535
-	mov	w0, 65535
-	cmp	w19, w0
-	beq	.L3973
-	adrp	x0, .LANCHOR9
-	ldr	x21, [x0, #:lo12:.LANCHOR9]
-	add	x21, x21, x19, uxth 2
-	ldrb	w0, [x21, 2]
-	tst	w0, 224
-	beq	.L3974
-	adrp	x1, .LANCHOR237
-	adrp	x0, .LC0
-	mov	w2, 3423
-	add	x1, x1, :lo12:.LANCHOR237
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L3974:
-	ldrb	w0, [x21, 2]
-	mov	w1, 5
-	bfi	w0, w1, 5, 3
-	orr	w0, w0, 16
-	strb	w0, [x21, 2]
-.L3998:
-	mov	w1, 1
-	mov	w0, w19
-	bl	ftl_erase_sblk
-	adrp	x22, .LANCHOR85
-	mov	w0, 5
-	strb	w0, [x26, 84]
-	add	x1, x26, 96
-	mov	w0, w19
-	bl	ftl_get_blk_list_in_sblk
-	and	w0, w0, 255
-	adrp	x1, .LANCHOR94
-	adrp	x21, .LANCHOR79
-	strb	w0, [x26, 89]
-	ldrh	w1, [x1, #:lo12:.LANCHOR94]
-	ldrh	w2, [x22, #:lo12:.LANCHOR85]
-	strh	w19, [x26, 80]
-	strh	wzr, [x26, 82]
-	mul	w0, w0, w1
-	strb	wzr, [x26, 85]
-	strh	w0, [x26, 86]
-	mov	w1, 255
-	ldrb	w0, [x21, #:lo12:.LANCHOR79]
-	strh	wzr, [x26, 90]
-	mul	w2, w2, w0
-	adrp	x0, .LANCHOR159
-	ldr	x0, [x0, #:lo12:.LANCHOR159]
-	lsl	w2, w2, 2
-	bl	ftl_memset
-	ldrb	w0, [x21, #:lo12:.LANCHOR79]
-	mov	w1, 255
-	ldrh	w2, [x22, #:lo12:.LANCHOR85]
-	mul	w2, w2, w0
-	adrp	x0, .LANCHOR160
-	ldr	x0, [x0, #:lo12:.LANCHOR160]
-	lsl	w2, w2, 2
-	bl	ftl_memset
-	ldrb	w0, [x21, #:lo12:.LANCHOR79]
-	mov	w1, 255
-	ldrh	w2, [x22, #:lo12:.LANCHOR85]
-	mul	w2, w2, w0
-	adrp	x0, .LANCHOR82
-	ldr	x0, [x0, #:lo12:.LANCHOR82]
-	bl	ftl_memset
-	ldr	x0, [x23, #:lo12:.LANCHOR12]
-	mov	w1, -1
-	str	w19, [x0, 132]
-	strh	w1, [x0, 128]
-	strh	w1, [x0, 130]
-	bl	pm_flush
-	bl	ftl_ext_info_flush
-	adrp	x0, .LANCHOR110
+	str	w0, [x29, 128]
+	ldrh	w0, [x29, 128]
+	str	x0, [x29, 112]
+	adrp	x0, .LANCHOR55
+	add	x0, x0, :lo12:.LANCHOR55
+	str	x0, [x29, 104]
+.L3854:
+	ldp	w0, w1, [x29, 152]
+	ldrh	w24, [x29, 152]
+	and	w0, w0, 65535
+	str	w0, [x29, 168]
+	cmp	w0, w1
+	blt	.L3878
+	ldr	x0, [x29, 120]
+	ldrb	w0, [x0, #:lo12:.LANCHOR84]
+	cmp	w0, 3
+	add	x0, x29, 176
+	bne	.L3879
+	adrp	x1, .LANCHOR35
+	ldrb	w1, [x1, #:lo12:.LANCHOR35]
+	cbz	w1, .L3880
+	ldr	w2, [x29, 156]
+	mov	w1, 0
+	sub	w2, w2, #1
+.L3881:
+	cmp	w1, w2
+	blt	.L3882
+.L3967:
+	ldr	x0, [x0, w2, sxtw 3]
 	mov	w1, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR110]
-	strh	w19, [x0, 126]
-	add	x0, x20, :lo12:.LANCHOR70
-	str	w1, [x0, 2196]
-	strh	wzr, [x0, 2106]
-	strh	wzr, [x0, 56]
-	strh	wzr, [x0, 2108]
-	strh	wzr, [x0, 2194]
+	strb	w1, [x0]
+	mul	w1, w21, w19
+	ldr	x0, [x29, 176]
+	bl	sblk_prog_page
+	b	.L3883
+.L3843:
+	adrp	x1, .LANCHOR86
+	ldrb	w1, [x1, #:lo12:.LANCHOR86]
+	cbnz	w1, .L3850
+	adrp	x1, .LANCHOR76
+	add	x1, x1, :lo12:.LANCHOR76
+	mov	w19, 1
+	ldrh	w22, [x1, 2106]
+	sdiv	w25, w22, w0
+	msub	w20, w20, w25, w22
+	and	w20, w20, 65535
+	b	.L3847
+.L3850:
+	adrp	x1, .LANCHOR76
+	add	x1, x1, :lo12:.LANCHOR76
+	mov	w19, 2
+	ldrh	w22, [x1, 2106]
+	sdiv	w25, w22, w0
+	msub	w20, w20, w25, w22
+	and	w20, w20, 65535
+	b	.L3847
+.L3853:
+	tbz	x2, 0, .L3904
+.L3852:
+	sbfiz	x4, x4, 2, 32
+	ldr	w0, [x8, x4]
+	cmn	w0, #1
+	bne	.L3855
+	ldrh	w7, [x6, 26]
+	cmp	w7, w14
+	bcs	.L3831
+	cbz	w12, .L3856
+	ldrh	w0, [x10, x13, lsl 1]
+	cmp	w0, w25
+	bcs	.L3856
+	tbz	x2, 0, .L3856
+	ubfiz	x0, x0, 2, 16
+	ldr	w0, [x8, x0]
+.L3964:
+	str	w0, [x8, x4]
+.L3855:
+	add	w2, w2, 1
+	and	w2, w2, 65535
+	b	.L3851
+.L3856:
+	mov	w0, w7
+	bl	gc_get_src_ppa_from_index
+	add	w7, w7, 1
+	strh	w7, [x6, 26]
+	b	.L3964
+.L3878:
+	ldr	w0, [x29, 168]
+	add	w0, w22, w0
+	str	w0, [x29, 172]
+	sxtw	x0, w0
+	str	x0, [x29, 160]
+	adrp	x0, .LANCHOR88
+	ldr	x1, [x29, 160]
+	ldr	x0, [x0, #:lo12:.LANCHOR88]
+	ldrb	w0, [x0, x1]
+	cmp	w0, 255
+	bne	.L3858
 	mov	w0, 0
-	bl	ftl_info_flush
-	b	.L3999
-.L3971:
-	mov	w1, 5
+	bl	buf_alloc
+	mov	x27, x0
+	cbnz	x0, .L3859
+	bl	sblk_wait_write_queue_completed
+	bl	ftl_write_completed
+	bl	gc_write_completed
+	bl	gc_free_temp_buf
 	mov	w0, 0
-	b	.L4080
-.L3970:
-	cmp	w25, 1
-	mov	w24, 4
-	csinc	w24, w24, wzr, eq
-	cmp	w21, 15
-	mov	w0, w24
-	add	w24, w24, 4
-	adrp	x25, .LANCHOR84
-	adrp	x21, .LANCHOR70
-	csel	w24, w24, w0, ls
-	add	x25, x25, :lo12:.LANCHOR84
-	add	x19, x21, :lo12:.LANCHOR70
-	add	x27, x26, 80
-.L3977:
-	sub	w24, w24, #1
-	and	w24, w24, 255
-	cmp	w24, 255
-	beq	.L3999
-	bl	gc_do_copy_back
-	ldrb	w0, [x25]
-	cbnz	w0, .L3978
-	adrp	x0, .LANCHOR57
-	ldrb	w0, [x0, #:lo12:.LANCHOR57]
-	cmp	w0, 3
-	bhi	.L3979
-	bl	ftl_write_commit
-.L3979:
-	ldrh	w1, [x19, 26]
-	ldrh	w0, [x19, 24]
+	bl	buf_alloc
+	mov	x27, x0
+	cbz	x0, .L3831
+.L3859:
+	adrp	x0, .LANCHOR88
+	ldr	x2, [x29, 160]
+	ldrb	w1, [x27, 1]
+	ldr	x0, [x0, #:lo12:.LANCHOR88]
+	strb	w1, [x0, x2]
+	adrp	x0, .LANCHOR76
+	add	x1, x0, :lo12:.LANCHOR76
+	strb	w23, [x27, 61]
+	ldrb	w0, [x1, 7]
+	add	w0, w0, 1
+	strb	w0, [x1, 7]
+	add	w0, w24, w22
+	strh	w0, [x27, 48]
+	adrp	x0, .LANCHOR91
+	ldr	w1, [x29, 172]
+	ldrh	w6, [x0, #:lo12:.LANCHOR91]
+	adrp	x0, .LANCHOR224
+	ldrb	w5, [x0, #:lo12:.LANCHOR224]
+	ldrb	w0, [x26, 9]
+	mul	w0, w0, w6
+	sub	w0, w0, w5
 	cmp	w1, w0
-	bcc	.L3977
+	blt	.L3860
+	adrp	x1, .LANCHOR130
+	ldrb	w1, [x1, #:lo12:.LANCHOR130]
+	cbz	w1, .L3861
+	adrp	x1, .LANCHOR238
+	add	x1, x1, :lo12:.LANCHOR238
+	ldrh	w1, [x1, w25, sxtw 1]
+	cmp	w1, w25
+	bcs	.L3861
+	tbnz	x24, 0, .L3860
+.L3861:
+	adrp	x1, .LANCHOR160
+	ldr	w3, [x29, 172]
+	mov	w2, -1
+	cmp	w5, 2
+	ldr	x1, [x1, #:lo12:.LANCHOR160]
+	str	w2, [x1, w3, sxtw 2]
+	bne	.L3862
+	cmp	w3, w0
+	adrp	x28, .LANCHOR221
+	bne	.L3863
+	ldrh	w2, [x28, #:lo12:.LANCHOR221]
+	ldr	x0, [x27, 8]
+	bl	ftl_memcpy
+	adrp	x0, .LANCHOR68
+	mov	w1, 0
+	ldrb	w2, [x0, #:lo12:.LANCHOR68]
+	ldr	x0, [x27, 24]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	ldr	x6, [x27, 24]
+	mov	w0, 15555
+	movk	w0, 0xf55f, lsl 16
+	ldrh	w1, [x28, #:lo12:.LANCHOR221]
+	str	w0, [x6]
+	ldr	x0, [x27, 8]
+	bl	js_hash
+	str	w0, [x6, 4]
+	ldr	x0, [x29, 144]
+	ldr	x0, [x0, #:lo12:.LANCHOR12]
+	ldr	w0, [x0, 132]
+	stp	w0, wzr, [x6, 8]
+.L3864:
+	ldr	x0, [x27, 24]
+	str	wzr, [x0, 16]
+.L3858:
+	adrp	x0, .LANCHOR88
+	ldrsw	x2, [x29, 168]
+	add	x4, x29, 176
+	ldr	x1, [x0, #:lo12:.LANCHOR88]
+	ldr	x0, [x29, 160]
+	ldrb	w5, [x1, x0]
+	adrp	x0, .LANCHOR55
+	add	x6, x0, :lo12:.LANCHOR55
+	mov	x7, x5
+	ubfiz	x0, x5, 6, 8
+	add	x0, x6, x0
+	add	x6, x6, x5, lsl 6
+	str	x0, [x4, x2, lsl 3]
+	mov	w0, 2
+	strh	w0, [x6, 50]
+	ldr	x0, [x29, 120]
+	strb	w23, [x6, 61]
+	ldrb	w0, [x0, #:lo12:.LANCHOR84]
+	cmp	w0, 3
+	bne	.L3869
+	adrp	x8, .LANCHOR35
+	ldrb	w8, [x8, #:lo12:.LANCHOR35]
+	cbz	w8, .L3870
+	adrp	x0, .LANCHOR130
+	and	w8, w24, 1
+	add	w10, w8, w25
+	ldrb	w0, [x0, #:lo12:.LANCHOR130]
+	cbz	w0, .L3871
+	adrp	x6, .LANCHOR238
+	add	x6, x6, :lo12:.LANCHOR238
+	ldrh	w6, [x6, w25, sxtw 1]
+	cmp	w6, w25
+	bcs	.L3871
+	cmp	w8, 0
+	csel	w10, w10, w6, eq
+.L3871:
+	adrp	x0, .LANCHOR55
+	add	x6, x0, :lo12:.LANCHOR55
+	add	x5, x6, x5, lsl 6
+	udiv	w6, w24, w19
+	add	w6, w6, w20
+	add	x6, x26, x6, sxtw 1
+	ldrh	w0, [x6, 16]
+	adrp	x6, .LANCHOR117
+	ldrh	w6, [x6, #:lo12:.LANCHOR117]
+	madd	w0, w0, w6, w10
+	orr	w0, w0, 50331648
+	str	w0, [x5, 40]
+.L3876:
+	adrp	x0, .LANCHOR55
+	sbfiz	x7, x7, 6, 32
+	add	x0, x0, :lo12:.LANCHOR55
+	add	x0, x0, x7
+	ldrh	w5, [x0, 48]
+	ldr	w6, [x0, 40]
+	adrp	x0, .LANCHOR162
+	ldr	x0, [x0, #:lo12:.LANCHOR162]
+	str	w6, [x0, x5, lsl 2]
+	b	.L3895
+.L3863:
+	ldr	x2, [x29, 136]
+	ldrh	w0, [x28, #:lo12:.LANCHOR221]
+	ldrb	w28, [x2, #:lo12:.LANCHOR85]
+	mul	w28, w28, w6
+	lsl	w28, w28, 2
+	sub	w28, w28, w0
+	and	x0, x0, 65532
+	add	x1, x1, x0
+	ldr	x0, [x27, 8]
+	mov	w2, w28
+	bl	ftl_memcpy
+	adrp	x0, .LANCHOR68
+	mov	w1, 0
+	ldrb	w2, [x0, #:lo12:.LANCHOR68]
+	ldr	x0, [x27, 24]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	ldr	x6, [x27, 24]
+	mov	w0, 15555
+	movk	w0, 0xf55f, lsl 16
+	mov	w1, w28
+	str	w0, [x6]
+	ldr	x0, [x27, 8]
+	bl	js_hash
+	str	w0, [x6, 4]
+	ldr	x0, [x29, 144]
+	ldr	x0, [x0, #:lo12:.LANCHOR12]
+	ldr	w0, [x0, 132]
+	str	w0, [x6, 8]
+	mov	w0, 1
+	str	w0, [x6, 12]
+	b	.L3864
+.L3862:
+	ldr	x0, [x29, 136]
+	ldrb	w2, [x0, #:lo12:.LANCHOR85]
+	ldr	x0, [x27, 8]
+	mul	w2, w2, w6
+	lsl	w2, w2, 2
+	bl	ftl_memcpy
+	ldr	x1, [x29, 136]
+	adrp	x0, .LANCHOR91
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	ldrb	w1, [x1, #:lo12:.LANCHOR85]
+	mul	w0, w0, w1
+	adrp	x1, .LANCHOR68
+	ldrb	w1, [x1, #:lo12:.LANCHOR68]
+	lsl	w2, w0, 2
+	cmp	w1, w0, lsr 6
+	bge	.L3865
+	adrp	x1, .LANCHOR221
+	ldrh	w1, [x1, #:lo12:.LANCHOR221]
+	sub	w2, w1, w2
+.L3865:
+	adrp	x1, .LANCHOR161
+	ldr	x5, [x27, 8]
+	ldr	x1, [x1, #:lo12:.LANCHOR161]
+	add	x0, x5, x0, sxtw 2
+	bl	ftl_memcpy
+	adrp	x0, .LANCHOR68
+	mov	w1, 0
+	ldrb	w2, [x0, #:lo12:.LANCHOR68]
+	ldr	x0, [x27, 24]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	ldr	x6, [x27, 24]
+	mov	w0, 15555
+	movk	w0, 0xf55f, lsl 16
+	str	w0, [x6]
+	adrp	x0, .LANCHOR91
+	ldrh	w1, [x0, #:lo12:.LANCHOR91]
+	ldr	x0, [x29, 136]
+	ldrb	w0, [x0, #:lo12:.LANCHOR85]
+	mul	w1, w1, w0
+	ldr	x0, [x27, 8]
+	lsl	w1, w1, 2
+	bl	js_hash
+	str	w0, [x6, 4]
+	ldr	x0, [x29, 144]
+	ldr	x0, [x0, #:lo12:.LANCHOR12]
+	ldr	w0, [x0, 132]
+	str	w0, [x6, 8]
+	b	.L3864
+.L3860:
+	ldr	x0, [x29, 160]
+	mov	w1, 1
+	lsl	x28, x0, 2
+	adrp	x0, .LANCHOR161
+	ldr	x0, [x0, #:lo12:.LANCHOR161]
+	ldr	w0, [x0, x28]
+	str	w0, [x27, 40]
+	mov	x0, x27
+	bl	sblk_read_page
+	ldr	w0, [x27, 52]
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	bne	.L3867
+	adrp	x0, .LANCHOR80
+	ldrh	w2, [x0, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR31
+	ldrb	w1, [x0, #:lo12:.LANCHOR31]
+	mov	w0, 24
+	sub	w0, w0, w1
+	sub	w1, w0, w2
 	mov	w0, 1
-	strb	w0, [x20, #:lo12:.LANCHOR156]
-	bl	ftl_write_commit
-	bl	ftl_flush
-	adrp	x0, .LANCHOR11
-	ldrh	w2, [x19]
-	mov	x19, x0
-	ldr	x1, [x0, #:lo12:.LANCHOR11]
-	ldrh	w1, [x1, x2, lsl 1]
-	cbz	w1, .L3981
+	lsl	w0, w0, w1
+	ldr	w1, [x27, 40]
+	sub	w0, w0, #1
+	lsr	w1, w1, w2
+	and	w0, w0, w1
+	adrp	x1, .LANCHOR81
+	ldrb	w2, [x1, #:lo12:.LANCHOR81]
+	mov	x1, 0
+	udiv	w0, w0, w2
+	bl	ftl_sblk_dump
+	ldr	w0, [x27, 52]
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	bne	.L3867
+	ldr	x0, [x27, 24]
+	mov	w1, -1
+	str	w1, [x0, 4]
+	ldr	w0, [x27, 52]
+	cmp	w0, 512
+	ccmp	w0, w1, 4, ne
+	bne	.L3867
 	adrp	x1, .LANCHOR237
 	adrp	x0, .LC0
-	mov	w2, 3507
+	mov	w2, 1223
 	add	x1, x1, :lo12:.LANCHOR237
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3981:
-	ldrh	w0, [x21, #:lo12:.LANCHOR70]
-	ldr	x2, [x19, #:lo12:.LANCHOR11]
-	ubfiz	x1, x0, 1, 16
-	ldrh	w1, [x2, x1]
-	cbnz	w1, .L3982
-	bl	ftl_free_sblk
-	b	.L3956
-.L3982:
-	mov	w2, 1
-	mov	w1, 0
-	bl	gc_add_sblk
-	b	.L3956
-.L3978:
-	ldrh	w0, [x19, 2194]
-	cbz	w0, .L3983
-	strh	wzr, [x19, 2194]
-	bl	sblk_wait_write_queue_completed
-	bl	gc_write_completed
-	ldr	w0, [x19, 2196]
-	adrp	x19, .LANCHOR110
-	cmn	w0, #1
-	beq	.L3984
-	adrp	x1, .LANCHOR124
-	ldrb	w1, [x1, #:lo12:.LANCHOR124]
-	cbnz	w1, .L3985
-	adrp	x1, .LANCHOR80
-	ldrb	w1, [x1, #:lo12:.LANCHOR80]
-	cbz	w1, .L3986
-.L3985:
-	ldr	x1, [x19, #:lo12:.LANCHOR110]
-	ldr	w2, [x1, 156]
-	mov	w1, 20041
-	movk	w1, 0x444b, lsl 16
+.L3867:
+	ldr	x0, [x27, 24]
+	adrp	x1, .LANCHOR219
+	ldr	w1, [x1, #:lo12:.LANCHOR219]
+	ldr	w2, [x0, 4]
 	cmp	w2, w1
-	bne	.L3986
-	adrp	x1, .LANCHOR74
-	ldrh	w3, [x1, #:lo12:.LANCHOR74]
-	adrp	x1, .LANCHOR31
-	ldrb	w2, [x1, #:lo12:.LANCHOR31]
-	mov	w1, 24
-	lsr	w0, w0, w3
-	sub	w1, w1, w2
-	sub	w2, w1, w3
-	mov	w1, 1
-	lsl	w1, w1, w2
-	sub	w1, w1, #1
-	and	w0, w1, w0
-	adrp	x1, .LANCHOR75
-	ldrb	w1, [x1, #:lo12:.LANCHOR75]
-	udiv	w0, w0, w1
-	adrp	x1, .LANCHOR9
-	ldr	x2, [x1, #:lo12:.LANCHOR9]
-	lsl	x0, x0, 2
-	add	x4, x2, x0
-	ldrb	w1, [x4, 2]
-	tbz	x1, 3, .L3984
-	adrp	x5, .LANCHOR98
-	ldrh	w3, [x22, #:lo12:.LANCHOR103]
-	ldrh	w5, [x5, #:lo12:.LANCHOR98]
-	add	w3, w3, 8
-	cmp	w3, w5
-	bge	.L3984
-	and	w1, w1, -25
-	strb	w1, [x4, 2]
-	adrp	x1, .LANCHOR10
-	ldr	w3, [x2, x0]
-	ldrh	w1, [x1, #:lo12:.LANCHOR10]
-	ldrh	w4, [x2, x0]
-	ubfx	x3, x3, 11, 8
-	and	w5, w4, 2047
-	mul	w1, w1, w3
-	lsr	w3, w3, 3
-	add	w1, w1, w1, lsl 1
-	add	w1, w5, w1, lsr 2
-	bfi	w4, w1, 0, 11
-	strh	w4, [x2, x0]
-	ldr	w1, [x2, x0]
-	bfi	w1, w3, 11, 8
-	str	w1, [x2, x0]
-.L3984:
+	bcc	.L3868
+	mov	w1, -1
+	str	w1, [x0, 4]
+.L3868:
+	adrp	x1, .LANCHOR160
+	ldr	w2, [x0, 4]
+	ldr	x1, [x1, #:lo12:.LANCHOR160]
+	str	w2, [x1, x28]
+	ldr	w1, [x27, 40]
+	str	w1, [x0, 8]
+	b	.L3864
+.L3870:
+	udiv	w0, w24, w0
+	adrp	x7, .LANCHOR36
+	ldrb	w7, [x7, #:lo12:.LANCHOR36]
+	cbz	w7, .L3873
+	add	w7, w0, w20
+	adrp	x8, .LANCHOR117
+	add	x7, x26, x7, sxtw 1
+	add	w0, w0, w0, lsl 1
+	ldrh	w8, [x8, #:lo12:.LANCHOR117]
+	sub	w0, w24, w0
+	ldrh	w7, [x7, 16]
+	madd	w7, w7, w8, w25
+	add	w0, w7, w0, uxth
+.L3968:
+	str	w0, [x6, 40]
+	ldr	x0, [x29, 104]
+	add	x5, x0, x5, lsl 6
+	adrp	x0, .LANCHOR162
+	ldr	x6, [x0, #:lo12:.LANCHOR162]
+	mov	w0, 3
+	ldrh	w7, [x5, 48]
+	udiv	w0, w24, w0
+	ldr	w5, [x5, 40]
+	add	w0, w0, w0, lsl 1
+	sub	w0, w24, w0
+	and	w0, w0, 65535
+	add	w0, w0, 1
+	orr	w0, w5, w0, lsl 24
+	str	w0, [x6, x7, lsl 2]
+.L3895:
+	adrp	x0, .LANCHOR130
+	ldrb	w0, [x0, #:lo12:.LANCHOR130]
+	cbz	w0, .L3877
+	adrp	x0, .LANCHOR238
+	add	x0, x0, :lo12:.LANCHOR238
+	ldrh	w0, [x0, w25, sxtw 1]
+	cmp	w0, w25
+	bcs	.L3877
+	tbz	x24, 0, .L3877
+	ldr	x3, [x29, 160]
+	mov	w0, -1
+	strb	w0, [x1, x3]
+	ldrh	w1, [x29, 128]
+	ldr	x0, [x4, x2, lsl 3]
+	ldr	x2, [x29, 112]
+	strh	w1, [x0, 48]
+	ldrb	w1, [x0, 1]
+	adrp	x0, .LANCHOR88
+	ldr	x0, [x0, #:lo12:.LANCHOR88]
+	strb	w1, [x0, x2]
+	adrp	x0, .LANCHOR161
+	ldr	w2, [x29, 172]
+	mov	w1, -1
+	ldr	x0, [x0, #:lo12:.LANCHOR161]
+	str	w1, [x0, w2, sxtw 2]
+.L3877:
+	ldr	w0, [x29, 152]
+	add	w0, w0, 1
+	str	w0, [x29, 152]
+	b	.L3854
+.L3873:
+	add	w0, w0, w20
+	adrp	x7, .LANCHOR117
+	add	x0, x26, x0, sxtw 1
+	ldrh	w7, [x7, #:lo12:.LANCHOR117]
+	ldrh	w0, [x0, 16]
+	madd	w0, w0, w7, w25
+	b	.L3968
+.L3869:
+	cmp	w0, 2
+	bne	.L3876
+	adrp	x0, .LANCHOR86
+	adrp	x5, .LANCHOR117
+	ldrb	w0, [x0, #:lo12:.LANCHOR86]
+	cbnz	w0, .L3875
+	ldr	w0, [x29, 168]
+	ldrh	w5, [x5, #:lo12:.LANCHOR117]
+	add	w27, w20, w0
+	add	x27, x26, x27, sxtw 1
+	ldrh	w0, [x27, 16]
+	madd	w0, w0, w5, w25
+.L3965:
+	orr	w0, w0, 33554432
+	str	w0, [x6, 40]
+	b	.L3876
+.L3875:
+	add	w0, w20, w24, lsr 1
+	ldrh	w5, [x5, #:lo12:.LANCHOR117]
+	add	x0, x26, x0, sxtw 1
+	ldrh	w0, [x0, 16]
+	madd	w0, w0, w5, w25
+	and	w5, w24, 1
+	add	w0, w0, w5
+	b	.L3965
+.L3882:
+	ldr	x4, [x0, w1, sxtw 3]
+	add	w1, w1, 1
+	ldr	x5, [x0, w1, sxtw 3]
+	and	w1, w1, 65535
+	ldrb	w5, [x5, 1]
+	strb	w5, [x4]
+	b	.L3881
+.L3880:
+	adrp	x1, .LANCHOR89
+	ldrb	w2, [x1, #:lo12:.LANCHOR89]
+	ldr	x1, [x29, 176]
+	cbz	w2, .L3884
+.L3887:
+	strb	wzr, [x1, 60]
+	b	.L3886
+.L3884:
+	cmp	w23, 1
+	bne	.L3885
+	mov	w2, 9
+.L3966:
+	strb	w2, [x1, 60]
+.L3886:
+	mov	w2, w21
+	add	x1, x0, 24
+	bl	sblk_xlc_prog_pages
+.L3883:
+	adrp	x0, .LANCHOR89
+	ldrb	w0, [x0, #:lo12:.LANCHOR89]
+	cbz	w0, .L3892
+	add	w21, w21, w21, lsl 1
+	and	w21, w21, 65535
+.L3893:
+	adrp	x0, .LANCHOR69
+	ldr	x1, [x0, #:lo12:.LANCHOR69]
+	ldr	w0, [x1, 52]
+	add	w0, w0, w21
+	str	w0, [x1, 52]
+	adrp	x0, .LANCHOR76
+	add	x25, x0, :lo12:.LANCHOR76
+	ldrh	w0, [x25, 2106]
+	add	w21, w21, w0
+	adrp	x0, .LANCHOR91
+	and	w21, w21, 65535
+	strh	w21, [x25, 2106]
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	ldrb	w1, [x26, 9]
+	mul	w0, w0, w1
+	cmp	w21, w0
+	blt	.L3894
+	ldr	x0, [x29, 144]
+	ldr	x0, [x0, #:lo12:.LANCHOR12]
+	strh	wzr, [x0, 86]
+.L3894:
+	bl	gc_write_completed
+	b	.L3831
+.L3885:
+	cmp	w23, 2
+	bne	.L3887
+	mov	w2, 13
+	b	.L3966
+.L3879:
+	adrp	x1, .LANCHOR86
+	ldrb	w1, [x1, #:lo12:.LANCHOR86]
+	cbz	w1, .L3905
+	adrp	x1, .LANCHOR87
+	ldrb	w1, [x1, #:lo12:.LANCHOR87]
+	cbnz	w1, .L3889
+.L3888:
+	ldr	w2, [x29, 156]
+	sub	w2, w2, #1
+.L3890:
+	cmp	w1, w2
+	bge	.L3967
+	ldr	x4, [x0, w1, sxtw 3]
+	add	w1, w1, 1
+	ldr	x5, [x0, w1, sxtw 3]
+	and	w1, w1, 65535
+	ldrb	w5, [x5, 1]
+	strb	w5, [x4]
+	b	.L3890
+.L3905:
+	mov	w1, 0
+	b	.L3888
+.L3889:
+	mov	w1, w21
+	bl	sblk_3d_mlc_prog_pages
+	b	.L3883
+.L3892:
+	adrp	x0, .LANCHOR86
+	ldrb	w0, [x0, #:lo12:.LANCHOR86]
+	cbnz	w0, .L3906
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbz	w0, .L3893
+	adrp	x0, .LANCHOR130
+	ldrh	w1, [x29, 156]
+	ldrb	w0, [x0, #:lo12:.LANCHOR130]
+	cbz	w0, .L3907
+	adrp	x0, .LANCHOR238
+	add	x0, x0, :lo12:.LANCHOR238
+	ldrh	w0, [x0, w25, sxtw 1]
+	cmp	w0, w25
+	csel	w21, w21, w1, cc
+	b	.L3893
+.L3906:
+	ldr	w21, [x29, 132]
+	b	.L3893
+.L3907:
+	mov	w21, w1
+	b	.L3893
+	.size	gc_do_copy_back, .-gc_do_copy_back
+	.section	.text.zftl_do_gc,"ax",@progbits
+	.align	2
+	.global	zftl_do_gc
+	.type	zftl_do_gc, %function
+zftl_do_gc:
+	sub	sp, sp, #144
+	adrp	x1, .LANCHOR113
+	stp	x29, x30, [sp, 16]
+	add	x29, sp, 16
+	ldrh	w1, [x1, #:lo12:.LANCHOR113]
+	stp	x21, x22, [sp, 48]
+	adrp	x22, .LANCHOR109
+	stp	x19, x20, [sp, 32]
+	adrp	x20, .LANCHOR157
+	stp	x23, x24, [sp, 64]
+	adrp	x23, .LANCHOR12
+	stp	x25, x26, [sp, 80]
+	ldrh	w21, [x22, #:lo12:.LANCHOR109]
+	ldrb	w2, [x20, #:lo12:.LANCHOR157]
+	stp	x27, x28, [sp, 96]
+	add	w21, w1, w21
+	ldr	x26, [x23, #:lo12:.LANCHOR12]
+	cmp	w2, 6
+	bhi	.L4086
+	mov	w25, w0
+	and	w21, w21, 65535
+	adrp	x0, .L3972
+	add	x0, x0, :lo12:.L3972
+	ldrh	w0, [x0,w2,uxtw #1]
+	adr	x2, .Lrtx3972
+	add	x0, x2, w0, sxth #2
+	br	x0
+.Lrtx3972:
+	.section	.rodata.zftl_do_gc,"a",@progbits
+	.align	0
+	.align	2
+.L3972:
+	.2byte	(.L3971 - .Lrtx3972) / 4
+	.2byte	(.L3973 - .Lrtx3972) / 4
+	.2byte	(.L3974 - .Lrtx3972) / 4
+	.2byte	(.L3975 - .Lrtx3972) / 4
+	.2byte	(.L3976 - .Lrtx3972) / 4
+	.2byte	(.L3977 - .Lrtx3972) / 4
+	.2byte	(.L3978 - .Lrtx3972) / 4
+	.section	.text.zftl_do_gc
+.L3977:
+	adrp	x19, .LANCHOR76
+	add	x24, x19, :lo12:.LANCHOR76
+	mov	w22, 0
+.L3979:
+	bl	gc_check_data_one_wl
+	cbz	w0, .L4082
 	ldr	x0, [x23, #:lo12:.LANCHOR12]
-	add	x22, x21, :lo12:.LANCHOR70
-	strh	wzr, [x22, 56]
+	add	x19, x19, :lo12:.LANCHOR76
+	strh	wzr, [x19, 56]
 	ldrh	w0, [x0, 80]
-	str	wzr, [x22, 2196]
 	bl	ftl_free_sblk
+	adrp	x2, .LANCHOR69
 	ldr	x1, [x23, #:lo12:.LANCHOR12]
 	mov	w0, -1
-	ldr	x2, [x19, #:lo12:.LANCHOR110]
+	ldr	x2, [x2, #:lo12:.LANCHOR69]
 	strh	w0, [x1, 80]
 	strh	w0, [x2, 126]
 	strh	w0, [x1, 130]
-	ldr	x0, [x22, 8]
-	cbz	x0, .L3987
+	ldr	x0, [x19, 8]
 	bl	zbuf_free
-.L3987:
-	add	x21, x21, :lo12:.LANCHOR70
-	str	xzr, [x21, 8]
-	bl	flt_sys_flush
-	mov	w2, 3567
-	strb	wzr, [x20, #:lo12:.LANCHOR156]
-	adrp	x1, .LANCHOR237
-	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR237
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-	b	.L3999
-.L3986:
-	bl	ftl_mask_bad_block
-	b	.L3984
+	strb	wzr, [x20, #:lo12:.LANCHOR157]
+	str	xzr, [x19, 8]
+	b	.L4172
+.L3971:
+	adrp	x0, .LANCHOR111
+	adrp	x27, .LANCHOR103
+	ldrh	w3, [x26, 80]
+	ldrh	w22, [x0, #:lo12:.LANCHOR111]
+	adrp	x0, .LANCHOR105
+	ldrh	w24, [x27, #:lo12:.LANCHOR103]
+	ldrh	w2, [x0, #:lo12:.LANCHOR105]
+	add	w22, w1, w22
+	stp	x0, x27, [x29, 112]
+	and	w22, w22, 65535
+	add	w24, w24, w2
+	mov	w2, 65535
+	and	w24, w24, 65535
+	cmp	w3, w2
+	beq	.L3980
+	cbnz	w25, .L3981
+	adrp	x0, .LANCHOR92
+	ldrh	w0, [x0, #:lo12:.LANCHOR92]
+	cmp	w21, w0, lsl 1
+	blt	.L3981
+.L4086:
+	mov	w19, 16
+	b	.L3969
+.L3981:
+	adrp	x5, .LANCHOR102
+	adrp	x0, .LANCHOR98
+	add	x0, x0, :lo12:.LANCHOR98
+	adrp	x25, .LANCHOR90
+	ldrh	w1, [x5, #:lo12:.LANCHOR102]
+	add	w1, w1, 1
+	and	w1, w1, 65535
+	strh	w1, [x5, #:lo12:.LANCHOR102]
+	bl	_list_get_gc_head_node
+	and	w3, w0, 65535
+	mov	w1, 65535
+	cmp	w3, w1
+	beq	.L3982
+	adrp	x4, .LANCHOR11
+	ubfiz	x3, x3, 1, 16
+	adrp	x1, .LANCHOR158
+	mov	x19, x1
+	ldr	x4, [x4, #:lo12:.LANCHOR11]
+	ldr	w2, [x1, #:lo12:.LANCHOR158]
+	add	w2, w2, 1
+	str	w2, [x1, #:lo12:.LANCHOR158]
+	ldrh	w3, [x4, x3]
+	adrp	x4, .LANCHOR100
+	ldrh	w4, [x4, #:lo12:.LANCHOR100]
+	cmp	w4, w3
+	bcs	.L3983
+	adrp	x1, .LANCHOR8
+	ldrh	w1, [x1, #:lo12:.LANCHOR8]
+	cmp	w2, w1, lsr 4
+	bls	.L3982
+	adrp	x1, .LANCHOR106
+	ldrh	w1, [x1, #:lo12:.LANCHOR106]
+	cmp	w1, w3
+	bls	.L3982
 .L3983:
-	ldrh	w0, [x27, 6]
-	ldrh	w1, [x19, 26]
-	cmp	w0, 1
-	ldrh	w0, [x19, 24]
-	bls	.L3988
-	cmp	w1, w0
-	bcc	.L3977
+	ldrb	w2, [x25, #:lo12:.LANCHOR90]
+	mov	w1, 0
+	bl	gc_add_sblk
+	cbz	w0, .L3984
 	mov	w0, 1
-	strb	w0, [x20, #:lo12:.LANCHOR156]
-	ldrh	w0, [x19, 56]
-	add	w1, w0, 1
-	strh	w1, [x19, 56]
-	add	x0, x19, x0, sxtw 1
-	ldrh	w1, [x19]
-	strh	w1, [x0, 58]
-	mov	w0, -1
-	strh	w0, [x19]
-	b	.L3999
-.L3988:
-	mov	w2, 5
-	strb	w2, [x20, #:lo12:.LANCHOR156]
+	str	wzr, [x19, #:lo12:.LANCHOR158]
+	strb	w0, [x20, #:lo12:.LANCHOR157]
+	b	.L4086
+.L3982:
+	strh	wzr, [x5, #:lo12:.LANCHOR102]
+.L3984:
+	cmp	w22, 15
+	bls	.L4088
+	adrp	x0, .LANCHOR97
+	ldrh	w1, [x0, #:lo12:.LANCHOR97]
+	adrp	x0, .LANCHOR107
+	ldrh	w0, [x0, #:lo12:.LANCHOR107]
 	cmp	w1, w0
-	bcc	.L3989
-	ldrh	w0, [x19, 56]
-	add	w1, w0, 1
-	strh	w1, [x19, 56]
-	add	x0, x19, x0, sxtw 1
-	ldrh	w1, [x19]
-	strh	w1, [x0, 58]
-	mov	w0, -1
-	strh	w0, [x19]
-.L3989:
-	bl	ftl_flush
-	bl	sblk_wait_write_queue_completed
-	bl	gc_write_completed
+	bhi	.L4088
+	cmp	w24, 0
+	cset	w19, eq
+	add	w19, w19, 1
+.L3985:
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 8, .L3986
 	ldr	x0, [x23, #:lo12:.LANCHOR12]
-	ldrh	w1, [x26, 80]
-	strh	w1, [x0, 128]
-	bl	pm_flush
-	bl	ftl_ext_info_flush
-	adrp	x1, .LANCHOR94
-	add	x0, x21, :lo12:.LANCHOR70
-	adrp	x2, .LANCHOR35
-	ldrh	w1, [x1, #:lo12:.LANCHOR94]
-	strh	w1, [x0, 18]
-	adrp	x1, .LANCHOR78
-	ldrb	w2, [x2, #:lo12:.LANCHOR35]
-	strh	wzr, [x0, 16]
-	ldrb	w1, [x1, #:lo12:.LANCHOR78]
-	strh	w1, [x0, 20]
-	cbz	w2, .L3990
-	adrp	x2, .LANCHOR85
-	ldrh	w2, [x2, #:lo12:.LANCHOR85]
-	strh	w2, [x0, 18]
+	mov	w4, w22
+	ldrb	w2, [x25, #:lo12:.LANCHOR90]
+	mov	w3, w21
+	mov	w1, 2807
+	ldrh	w7, [x0, 122]
+	ldrh	w6, [x0, 120]
+	ldrh	w5, [x0, 124]
+	ldrh	w0, [x26, 80]
+	str	w0, [sp]
+	adrp	x0, .LC233
+	add	x0, x0, :lo12:.LC233
+	bl	printf
+.L3986:
+	ldrb	w0, [x25, #:lo12:.LANCHOR90]
 	mov	w2, 1
-	strh	w2, [x0, 20]
-.L3990:
-	cmp	w1, 2
-	bne	.L3992
-	add	x0, x21, :lo12:.LANCHOR70
-	ldrh	w1, [x0, 18]
-	ubfiz	w1, w1, 1, 15
-	strh	w1, [x0, 18]
-	adrp	x1, .LANCHOR80
-	ldrb	w1, [x1, #:lo12:.LANCHOR80]
-	cbnz	w1, .L3992
-	mov	w1, 1
-	strh	w1, [x0, 20]
+	mov	w1, w19
+	bl	gc_search_src_blk
+	cmp	w0, 0
+	ble	.L3987
+.L3988:
+	mov	w0, 1
+.L4174:
+	strb	w0, [x20, #:lo12:.LANCHOR157]
+	b	.L4086
+.L4088:
+	mov	w19, 2
+	b	.L3985
+.L3987:
+	ldrb	w0, [x25, #:lo12:.LANCHOR90]
+	mov	w2, 1
+	mov	w1, 3
+	bl	gc_search_src_blk
+	cmp	w0, 0
+	bgt	.L3988
+	b	.L4086
+.L3980:
+	cmp	w25, 1
+	bne	.L3990
+	adrp	x0, .LANCHOR69
+	ldr	x0, [x0, #:lo12:.LANCHOR69]
+	ldrh	w0, [x0, 150]
+	cbz	w0, .L3991
+	cmp	w1, 8
+	bls	.L3991
+	bl	gc_ink_check_sblk
+.L3991:
+	bl	gc_scan_static_data
+	adrp	x26, .LANCHOR90
+	ldr	x0, [x23, #:lo12:.LANCHOR12]
+	ldrh	w0, [x0, 122]
+	cbz	w0, .L3992
+.L3993:
+	mov	w0, 1
+	strb	w0, [x26, #:lo12:.LANCHOR90]
+	b	.L4174
 .L3992:
-	add	x21, x21, :lo12:.LANCHOR70
-	strh	wzr, [x21, 22]
-	b	.L3999
+	bl	gc_static_wearleveling
+	mov	w19, w0
+	cbnz	w0, .L3993
+	adrp	x27, .LANCHOR159
+	cbz	w22, .L3994
+	cmp	w21, w24
+	adrp	x1, .LANCHOR104
+	bcs	.L3995
+	ldrh	w0, [x1, #:lo12:.LANCHOR104]
+	cmp	w0, w21
+	bhi	.L3996
 .L3995:
-	ldrh	w1, [x24, 16]
-	ldrh	w0, [x24, 18]
+	ldrh	w1, [x1, #:lo12:.LANCHOR104]
+	add	w0, w21, w24
+	cmp	w0, w1
+	blt	.L3996
+	adrp	x0, .LANCHOR97
+	ldrh	w1, [x0, #:lo12:.LANCHOR97]
+	adrp	x0, .LANCHOR107
+	ldrh	w0, [x0, #:lo12:.LANCHOR107]
+	cmp	w1, w0
+	bcc	.L3994
+.L3996:
+	mov	w0, 1
+	mov	w1, 16
+	strb	w0, [x26, #:lo12:.LANCHOR90]
+	adrp	x0, .LANCHOR101
+	add	x0, x0, :lo12:.LANCHOR101
+	bl	_list_get_gc_head_node
+	and	w1, w0, 65535
+	mov	w2, 65535
+	adrp	x28, .LANCHOR158
+	cmp	w1, w2
+	beq	.L3997
+	adrp	x2, .LANCHOR11
+	ubfiz	x1, x1, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR11]
+	ldrh	w2, [x2, x1]
+	ldrh	w1, [x27, #:lo12:.LANCHOR159]
+	cmp	w2, w1
+	bcs	.L3997
+	cmp	w21, 2
+	bls	.L3997
+	strb	wzr, [x26, #:lo12:.LANCHOR90]
+	mov	w2, 0
+	str	wzr, [x28, #:lo12:.LANCHOR158]
+	mov	w1, 1
+	bl	gc_add_sblk
+	cbnz	w0, .L3988
+.L3997:
+	mov	w1, 0
+	adrp	x0, .LANCHOR96
+	add	x0, x0, :lo12:.LANCHOR96
+	bl	_list_get_gc_head_node
+	and	w1, w0, 65535
+	mov	w2, 65535
+	cmp	w1, w2
+	beq	.L3998
+	adrp	x2, .LANCHOR11
+	ubfiz	x1, x1, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR11]
+	ldrh	w2, [x2, x1]
+	ldrh	w1, [x27, #:lo12:.LANCHOR159]
+	cmp	w2, w1
+	bcs	.L3998
+	cmp	w21, 2
+	bls	.L3998
+	strb	wzr, [x26, #:lo12:.LANCHOR90]
+	mov	w2, 0
+	str	wzr, [x28, #:lo12:.LANCHOR158]
+	mov	w1, 1
+	bl	gc_add_sblk
+	cbnz	w0, .L3988
+.L3998:
+	ldrh	w0, [x27, #:lo12:.LANCHOR159]
+	adrp	x1, .LANCHOR100
+	add	w0, w0, 1
+	ldrh	w5, [x1, #:lo12:.LANCHOR100]
+	and	w0, w0, 65535
+	strh	w0, [x27, #:lo12:.LANCHOR159]
+	cmp	w0, w5, lsr 5
+	bls	.L3999
+	mov	w0, 4
+	strh	w0, [x27, #:lo12:.LANCHOR159]
+.L3999:
+	adrp	x1, .LANCHOR93
+	ldr	w0, [x28, #:lo12:.LANCHOR158]
+	strh	wzr, [x1, #:lo12:.LANCHOR93]
+	adrp	x1, .LANCHOR94
+	add	w0, w0, 1
+	str	w0, [x28, #:lo12:.LANCHOR158]
+	strh	wzr, [x1, #:lo12:.LANCHOR94]
+	adrp	x1, .LANCHOR95
+	strh	wzr, [x1, #:lo12:.LANCHOR95]
+	adrp	x1, .LANCHOR8
+	ldrh	w1, [x1, #:lo12:.LANCHOR8]
+	cmp	w0, w1, lsr 5
+	adrp	x0, .LANCHOR97
+	bls	.L4000
+	ldrh	w1, [x0, #:lo12:.LANCHOR97]
+	cmp	w1, w22
+	bls	.L4000
+	mov	w1, 0
+	adrp	x0, .LANCHOR98
+	add	x0, x0, :lo12:.LANCHOR98
+	bl	_list_get_gc_head_node
+	and	w0, w0, 65535
+	mov	w1, 65535
+	cmp	w0, w1
+	bne	.L4001
+.L4162:
+	mov	w19, 16
+	b	.L4002
+.L4001:
+	adrp	x1, .LANCHOR11
+	ubfiz	x0, x0, 1, 16
+	ldr	x1, [x1, #:lo12:.LANCHOR11]
+	ldrh	w1, [x1, x0]
+	adrp	x0, .LANCHOR85
+	ldrb	w0, [x0, #:lo12:.LANCHOR85]
+	mul	w0, w0, w5
 	cmp	w1, w0
-	bcc	.L3996
-	mov	w0, 6
-	strb	w0, [x20, #:lo12:.LANCHOR156]
-	ldr	x0, [x24, 8]
-	bl	zbuf_free
-	str	xzr, [x24, 8]
-	b	.L3999
-.L3996:
-	cmp	w21, 15
-	bls	.L3892
-	cmp	w25, 1
-	bne	.L3999
-	add	w22, w22, 1
-	and	w22, w22, 255
-	cmp	w22, 4
-	bls	.L3892
-	b	.L3999
-.L3891:
-	bl	gc_update_l2p_map_new
-	mov	w19, -1
-	bl	gc_free_src_blk
-	bl	ftl_flush
-	bl	pm_flush
-	strh	w19, [x26, 80]
-	bl	ftl_ext_info_flush
-	adrp	x0, .LANCHOR110
-	ldr	x0, [x0, #:lo12:.LANCHOR110]
-	strh	w19, [x0, 126]
-	mov	w0, 0
-	bl	ftl_info_flush
-.L4086:
-	strb	wzr, [x20, #:lo12:.LANCHOR156]
-	b	.L3999
-.L3973:
-	mov	w2, 3430
-	adrp	x1, .LANCHOR237
-	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR237
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-	b	.L3998
-	.size	zftl_do_gc, .-zftl_do_gc
-	.section	.text.zftl_init,"ax",@progbits
-	.align	2
-	.global	zftl_init
-	.type	zftl_init, %function
-zftl_init:
-	stp	x29, x30, [sp, -112]!
-	adrp	x1, .LANCHOR65
-	mov	w0, -1
-	add	x29, sp, 0
-	strb	w0, [x1, #:lo12:.LANCHOR65]
-	adrp	x1, .LANCHOR66
-	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR94
-	strb	wzr, [x1, #:lo12:.LANCHOR66]
-	adrp	x1, .LANCHOR133
-	stp	x19, x20, [sp, 16]
-	adrp	x21, .LANCHOR79
-	strb	w0, [x1, #:lo12:.LANCHOR133]
-	adrp	x1, .LANCHOR134
-	stp	x23, x24, [sp, 48]
-	adrp	x20, .LANCHOR221
-	strb	wzr, [x1, #:lo12:.LANCHOR134]
-	adrp	x1, .LANCHOR182
-	stp	x25, x26, [sp, 64]
-	adrp	x23, .LANCHOR8
-	strb	w0, [x1, #:lo12:.LANCHOR182]
-	adrp	x0, .LANCHOR129
-	mov	w1, -1
-	stp	x27, x28, [sp, 80]
-	strb	wzr, [x0, #:lo12:.LANCHOR129]
-	adrp	x0, .LANCHOR238
-	str	w1, [x0, #:lo12:.LANCHOR238]
-	adrp	x1, .LC242
-	adrp	x0, .LC101
-	add	x1, x1, :lo12:.LC242
-	add	x0, x0, :lo12:.LC101
-	bl	printf
-	adrp	x1, .LANCHOR32
-	add	x1, x1, :lo12:.LANCHOR32
-	adrp	x0, .LANCHOR78
-	adrp	x2, .LANCHOR131
-	adrp	x3, .LANCHOR112
-	adrp	x4, .LANCHOR75
-	ldrb	w7, [x1, 12]
-	strb	w7, [x0, #:lo12:.LANCHOR78]
-	ldrb	w0, [x1, 9]
-	strb	w0, [x2, #:lo12:.LANCHOR131]
-	adrp	x2, .LANCHOR85
-	ldrh	w5, [x1, 10]
-	strh	w5, [x2, #:lo12:.LANCHOR85]
-	adrp	x2, .LANCHOR23
-	ldrh	w8, [x1, 14]
-	ubfiz	w6, w0, 9, 7
-	ldrb	w2, [x2, #:lo12:.LANCHOR23]
-	sdiv	w11, w5, w7
-	strb	w2, [x3, #:lo12:.LANCHOR112]
-	ldrb	w3, [x1, 13]
-	adrp	x1, .LANCHOR2
-	strb	w3, [x4, #:lo12:.LANCHOR75]
-	ldrh	w4, [x1, #:lo12:.LANCHOR2]
-	adrp	x1, .LANCHOR111
-	strh	w11, [x22, #:lo12:.LANCHOR94]
-	mul	w2, w2, w3
-	strh	w4, [x1, #:lo12:.LANCHOR111]
-	strh	w8, [x23, #:lo12:.LANCHOR8]
-	mov	w3, 1
-	and	w2, w2, 255
-	strh	w6, [x20, #:lo12:.LANCHOR221]
-	strb	w2, [x21, #:lo12:.LANCHOR79]
+	bgt	.L4162
+	str	wzr, [x28, #:lo12:.LANCHOR158]
+	mov	w2, 4
+.L4168:
+	mov	w1, 2
+.L4161:
+	ldrb	w0, [x26, #:lo12:.LANCHOR90]
+	bl	gc_search_src_blk
+	and	w0, w0, 65535
+	cbz	w0, .L4162
+	b	.L3988
+.L4000:
+	ldrh	w1, [x0, #:lo12:.LANCHOR97]
+	adrp	x0, .LANCHOR107
+	ldrh	w0, [x0, #:lo12:.LANCHOR107]
+	cmp	w1, w0
+	bcc	.L4005
+	mov	w2, 1
+	b	.L4168
+.L4005:
+	ldr	x0, [x29, 120]
+	ldrh	w0, [x0, #:lo12:.LANCHOR103]
+	cbnz	w0, .L4006
+	ldr	x0, [x29, 112]
+	ldrh	w0, [x0, #:lo12:.LANCHOR105]
+	cmp	w0, 8
+	bls	.L4007
+.L4006:
+	mov	w2, 4
+	mov	w1, 1
+	b	.L4161
+.L4007:
+	adrp	x0, .LANCHOR76+2110
+	ldrh	w0, [x0, #:lo12:.LANCHOR76+2110]
+	cbnz	w0, .L4162
+.L4002:
+	ldr	x0, [x23, #:lo12:.LANCHOR12]
+	adrp	x28, .LANCHOR90
+	mov	w1, 1
+	mov	x23, x28
+	strb	w1, [x28, #:lo12:.LANCHOR90]
+	ldrh	w0, [x0, 124]
+	cbz	w0, .L4008
+	strb	wzr, [x28, #:lo12:.LANCHOR90]
+	strb	w1, [x20, #:lo12:.LANCHOR157]
+.L3969:
+	mov	w0, w19
+	ldp	x19, x20, [sp, 32]
+	ldp	x21, x22, [sp, 48]
+	ldp	x23, x24, [sp, 64]
+	ldp	x25, x26, [sp, 80]
+	ldp	x27, x28, [sp, 96]
+	ldp	x29, x30, [sp, 16]
+	add	sp, sp, 144
+	ret
+.L3994:
+	adrp	x0, .LANCHOR100
+	ldrh	w1, [x0, #:lo12:.LANCHOR100]
+	ldrh	w0, [x27, #:lo12:.LANCHOR159]
+	cmp	w0, w1, lsr 5
+	bcc	.L4162
+	mov	w0, 4
+	strh	w0, [x27, #:lo12:.LANCHOR159]
+	b	.L4162
+.L3990:
+	adrp	x0, .LANCHOR92
+	ldrh	w0, [x0, #:lo12:.LANCHOR92]
+	cmp	w0, w21
+	bcs	.L4162
+	ldrh	w0, [x26, 124]
+	cbz	w0, .L4086
+	b	.L4162
+.L4008:
+	adrp	x0, .LANCHOR92
+	mov	x26, x0
+	ldrh	w2, [x0, #:lo12:.LANCHOR92]
+	cmp	w21, w2
+	bcs	.L4009
+	cbz	w22, .L4010
+	cmp	w22, 16
+	bls	.L4011
+	adrp	x0, .LANCHOR97
+	ldrh	w2, [x0, #:lo12:.LANCHOR97]
+	adrp	x0, .LANCHOR107
+	ldrh	w0, [x0, #:lo12:.LANCHOR107]
+	cmp	w2, w0
+	bhi	.L4011
+	mov	w2, 4
+	mov	w0, w1
+	bl	gc_search_src_blk
+	tst	w0, 65535
+	bne	.L4012
+.L4169:
+	mov	w2, 4
+	mov	w1, 3
+	ldrb	w0, [x28, #:lo12:.LANCHOR90]
+	b	.L4164
+.L4012:
 	mov	w1, 0
-.L4089:
+	adrp	x0, .LANCHOR98
+	add	x0, x0, :lo12:.LANCHOR98
+	bl	_list_get_gc_head_node
+	and	w3, w0, 65535
+	mov	w1, 65535
+	cmp	w3, w1
+	beq	.L4015
+	adrp	x4, .LANCHOR11
+	ubfiz	x3, x3, 1, 16
+	adrp	x1, .LANCHOR158
+	mov	x21, x1
+	ldr	x4, [x4, #:lo12:.LANCHOR11]
+	ldr	w2, [x1, #:lo12:.LANCHOR158]
+	add	w2, w2, 1
+	str	w2, [x1, #:lo12:.LANCHOR158]
+	ldrh	w3, [x4, x3]
+	adrp	x4, .LANCHOR100
+	ldrh	w4, [x4, #:lo12:.LANCHOR100]
 	cmp	w4, w3
-	bcs	.L4090
-	mul	w10, w0, w5
-	adrp	x3, .LANCHOR74
-	sub	w1, w1, #1
-	mov	w4, 0
-	strh	w1, [x3, #:lo12:.LANCHOR74]
+	bcs	.L4016
+	adrp	x1, .LANCHOR8
+	ldrh	w1, [x1, #:lo12:.LANCHOR8]
+	cmp	w2, w1, lsr 4
+	bls	.L4015
+	adrp	x1, .LANCHOR106
+	ldrh	w1, [x1, #:lo12:.LANCHOR106]
+	cmp	w1, w3
+	bls	.L4015
+.L4016:
+	ldrb	w2, [x23, #:lo12:.LANCHOR90]
+	mov	w1, 0
+	bl	gc_add_sblk
+	str	wzr, [x21, #:lo12:.LANCHOR158]
+	adrp	x0, .LANCHOR128
 	mov	w1, 1
-	mul	w3, w8, w10
-	lsr	w12, w3, 21
-.L4091:
-	cmp	w12, w1
-	bcs	.L4092
-	mov	w1, 57344
-	sub	w4, w4, #1
-	movk	w1, 0x1c, lsl 16
-	mul	w3, w3, w2
-	adrp	x28, .LANCHOR128
-	sub	w12, w6, #1
-	mul	w1, w2, w1
-	adrp	x24, .LANCHOR202
-	mul	w11, w11, w2
-	adrp	x27, .LANCHOR240
-	mul	w10, w10, w2
-	adrp	x26, .LANCHOR152
-	lsl	w1, w1, w4
-	adrp	x4, .LANCHOR67
-	sub	w10, w10, #1
-	adrp	x25, .LANCHOR98
-	str	w1, [x4, #:lo12:.LANCHOR67]
-	adrp	x4, .LANCHOR239
-	lsr	w8, w8, 4
-	strh	w8, [x25, #:lo12:.LANCHOR98]
-	str	w3, [x4, #:lo12:.LANCHOR239]
-	add	w3, w1, 24576
-	str	w3, [x27, #:lo12:.LANCHOR240]
-	cmp	w8, 79
-	udiv	w0, w3, w0
-	udiv	w3, w3, w10
-	str	w0, [x28, #:lo12:.LANCHOR128]
-	add	w0, w12, w0, lsl 2
-	add	w3, w3, 8
-	udiv	w0, w0, w6
-	strh	w0, [x24, #:lo12:.LANCHOR202]
-	ubfiz	w0, w0, 4, 16
-	sdiv	w0, w0, w11
-	strh	w0, [x26, #:lo12:.LANCHOR152]
-	adrp	x0, .LANCHOR101
-	str	x0, [x29, 104]
-	strh	w3, [x0, #:lo12:.LANCHOR101]
-	bhi	.L4093
-	mov	w0, 80
-	strh	w0, [x25, #:lo12:.LANCHOR98]
-.L4093:
-	adrp	x12, .LANCHOR126
-	mov	w0, 2000
-	adrp	x11, .LANCHOR125
-	adrp	x3, .LANCHOR149
-	strh	w0, [x12, #:lo12:.LANCHOR126]
-	mov	w0, 50
-	adrp	x8, .LANCHOR150
-	strh	w0, [x11, #:lo12:.LANCHOR125]
-	mov	w0, 256
-	strh	w0, [x3, #:lo12:.LANCHOR149]
-	mov	w0, 48
-	strh	w0, [x8, #:lo12:.LANCHOR150]
-	adrp	x0, .LANCHOR10
-	mov	w10, 32
-	cmp	w7, 2
-	mov	x13, x11
-	strh	w10, [x0, #:lo12:.LANCHOR10]
-	mov	x7, x12
-	mov	x14, x8
-	beq	.L4094
-	adrp	x15, .LANCHOR83
-	ldrb	w15, [x15, #:lo12:.LANCHOR83]
-	cbz	w15, .L4095
-.L4094:
-	mov	w8, 150
-	strh	w8, [x13, #:lo12:.LANCHOR125]
-	mov	w8, 64
-	strh	w8, [x14, #:lo12:.LANCHOR150]
-	mov	w8, 12
-	strh	w8, [x0, #:lo12:.LANCHOR10]
-	adrp	x8, .LANCHOR0
-	ldrb	w8, [x8, #:lo12:.LANCHOR0]
-	cbnz	w8, .L4096
-	mov	w8, 4
-	strh	w8, [x0, #:lo12:.LANCHOR10]
-	mov	w0, 600
-	strh	w0, [x7, #:lo12:.LANCHOR126]
-	mov	w0, 128
-	strh	w0, [x3, #:lo12:.LANCHOR149]
-.L4096:
-	adrp	x0, .LANCHOR36
-	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbz	w0, .L4098
-	mov	w0, 200
-	strh	w0, [x13, #:lo12:.LANCHOR125]
-	mov	w0, 2000
-	strh	w0, [x7, #:lo12:.LANCHOR126]
-.L4098:
-	adrp	x0, .LANCHOR122
-	mul	w2, w5, w2
-	mov	w3, 1
-	str	wzr, [x0, #:lo12:.LANCHOR122]
-	adrp	x0, .LANCHOR224
-	cmp	w6, w2, lsl 2
-	strb	w3, [x0, #:lo12:.LANCHOR224]
-	bge	.L4100
-	mov	w2, 2
-	strb	w2, [x0, #:lo12:.LANCHOR224]
-.L4100:
-	adrp	x19, .LANCHOR19
-	ldr	w0, [x19, #:lo12:.LANCHOR19]
-	tbz	x0, 12, .L4101
+	str	w1, [x0, #:lo12:.LANCHOR128]
+.L4015:
+	mov	w0, 1
+	strb	w0, [x20, #:lo12:.LANCHOR157]
+	b	.L3969
+.L4011:
+	mov	w2, 1
+	mov	w1, 2
+	mov	w0, w2
+	bl	gc_search_src_blk
+	tst	w0, 65535
+	bne	.L4015
+	ldrb	w0, [x23, #:lo12:.LANCHOR90]
+	mov	w2, 4
+	mov	w1, 3
+.L4164:
+	bl	gc_search_src_blk
+	and	w0, w0, 65535
+.L4013:
+	cbnz	w0, .L4015
+	b	.L3969
+.L4010:
+	strb	wzr, [x28, #:lo12:.LANCHOR90]
+	cmp	w21, 16
+	bls	.L4018
+	mov	w2, 4
+	mov	w1, 3
+	mov	w0, 0
+	b	.L4164
+.L4018:
+	mov	w2, w1
+	mov	w0, 0
+	bl	gc_search_src_blk
+	tst	w0, 65535
+	bne	.L4015
+	b	.L4169
+.L4009:
+	cmp	w25, 1
+	bne	.L3969
+	cmp	w21, w2, lsl 1
+	bge	.L4019
+	cmp	w24, w22, lsr 1
+	bcs	.L4020
+	adrp	x1, .LANCHOR97
+	ldrh	w2, [x1, #:lo12:.LANCHOR97]
+	adrp	x1, .LANCHOR107
+	ldrh	w1, [x1, #:lo12:.LANCHOR107]
+	cmp	w2, w1
+	bcs	.L4020
+	adrp	x1, .LANCHOR104
+	ldrh	w1, [x1, #:lo12:.LANCHOR104]
+	lsr	w1, w1, 2
+	strh	w1, [x0, #:lo12:.LANCHOR92]
+	b	.L3969
+.L4020:
+	mov	w1, 8
+	adrp	x25, .LANCHOR101
+	add	x0, x25, :lo12:.LANCHOR101
+	bl	_list_get_gc_head_node
+	and	w1, w0, 65535
+	mov	w2, 65535
+	cmp	w1, w2
+	beq	.L4021
+	adrp	x2, .LANCHOR11
+	ubfiz	x1, x1, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR11]
+	ldrh	w1, [x2, x1]
+	cmp	w1, 3
+	bhi	.L4021
+	cbz	w21, .L4021
+	strb	wzr, [x23, #:lo12:.LANCHOR90]
+	mov	w2, 0
+	mov	w1, 1
+	bl	gc_add_sblk
+	cbnz	w0, .L4015
+.L4021:
+	mov	w1, 0
+	adrp	x0, .LANCHOR98
+	add	x0, x0, :lo12:.LANCHOR98
+	bl	_list_get_gc_head_node
+	and	w28, w0, 65535
+	mov	w1, 65535
+	mov	w3, w28
+	cmp	w28, w1
+	bne	.L4022
+.L4027:
+	cmp	w22, 1
+	bhi	.L4023
+.L4024:
+	cmp	w21, w24
+	adrp	x21, .LANCHOR104
+	bcs	.L4031
+	mov	w1, 4
+	strb	wzr, [x23, #:lo12:.LANCHOR90]
+	add	x0, x25, :lo12:.LANCHOR101
+	bl	_list_get_gc_head_node
+	and	w0, w0, 65535
+	mov	w1, 65535
+	cmp	w0, w1
+	beq	.L4031
+	adrp	x1, .LANCHOR11
+	ubfiz	x0, x0, 1, 16
+	adrp	x2, .LANCHOR85
+	ldr	x1, [x1, #:lo12:.LANCHOR11]
+	ldrb	w2, [x2, #:lo12:.LANCHOR85]
+	ldrh	w1, [x1, x0]
+	adrp	x0, .LANCHOR100
+	ldrh	w0, [x0, #:lo12:.LANCHOR100]
+	mul	w0, w0, w2
+	cmp	w1, w0, lsr 1
+	ble	.L4033
+.L4031:
+	ldrh	w0, [x21, #:lo12:.LANCHOR104]
+	lsr	w0, w0, 2
+	strh	w0, [x26, #:lo12:.LANCHOR92]
+	b	.L3969
+.L4022:
+	adrp	x2, .LANCHOR158
+	adrp	x4, .LANCHOR8
+	uxtw	x28, w28
+	ldr	w1, [x2, #:lo12:.LANCHOR158]
+	ldrh	w4, [x4, #:lo12:.LANCHOR8]
+	add	w1, w1, 1
+	str	w1, [x2, #:lo12:.LANCHOR158]
+	cmp	w1, w4, lsr 4
+	adrp	x4, .LANCHOR11
+	bls	.L4025
+	ldr	x1, [x4, #:lo12:.LANCHOR11]
+	str	wzr, [x2, #:lo12:.LANCHOR158]
+	ldrh	w2, [x1, x28, lsl 1]
+	adrp	x1, .LANCHOR106
+	ldrh	w1, [x1, #:lo12:.LANCHOR106]
+	cmp	w2, w1
+	bcs	.L4025
+	mov	w5, 1
 	str	x4, [x29, 96]
-	adrp	x0, .LC243
-	add	x0, x0, :lo12:.LC243
-	bl	printf
+	strb	w5, [x23, #:lo12:.LANCHOR90]
+	mov	w2, 1
+	stp	w3, w5, [x29, 104]
+	mov	w1, 0
+	bl	gc_add_sblk
+	ldp	w3, w5, [x29, 104]
 	ldr	x4, [x29, 96]
-.L4101:
-	ldr	w0, [x19, #:lo12:.LANCHOR19]
-	tbz	x0, 12, .L4102
-	ldr	w1, [x4, #:lo12:.LANCHOR239]
-	adrp	x0, .LC244
-	add	x0, x0, :lo12:.LC244
-	bl	printf
-.L4102:
-	ldr	w0, [x19, #:lo12:.LANCHOR19]
-	tbz	x0, 12, .L4103
-	ldr	w1, [x28, #:lo12:.LANCHOR128]
-	adrp	x0, .LC245
-	add	x0, x0, :lo12:.LC245
-	bl	printf
-.L4103:
-	ldr	w0, [x19, #:lo12:.LANCHOR19]
-	tbz	x0, 12, .L4104
-	ldr	w1, [x27, #:lo12:.LANCHOR240]
-	adrp	x0, .LC246
-	add	x0, x0, :lo12:.LC246
-	bl	printf
-.L4104:
-	ldr	w0, [x19, #:lo12:.LANCHOR19]
-	tbz	x0, 12, .L4105
-	ldrh	w1, [x24, #:lo12:.LANCHOR202]
-	adrp	x0, .LC247
-	add	x0, x0, :lo12:.LC247
-	bl	printf
-.L4105:
-	ldr	w0, [x19, #:lo12:.LANCHOR19]
-	tbz	x0, 12, .L4106
-	ldrh	w1, [x20, #:lo12:.LANCHOR221]
-	adrp	x0, .LC248
-	add	x0, x0, :lo12:.LC248
-	bl	printf
-.L4106:
-	ldr	w0, [x19, #:lo12:.LANCHOR19]
-	tbz	x0, 12, .L4107
-	ldrh	w1, [x26, #:lo12:.LANCHOR152]
-	adrp	x0, .LC249
-	add	x0, x0, :lo12:.LC249
-	bl	printf
-.L4107:
-	ldr	w0, [x19, #:lo12:.LANCHOR19]
-	tbz	x0, 12, .L4108
-	ldrh	w1, [x25, #:lo12:.LANCHOR98]
-	adrp	x0, .LC250
-	add	x0, x0, :lo12:.LC250
-	bl	printf
-.L4108:
-	ldr	w0, [x19, #:lo12:.LANCHOR19]
-	tbz	x0, 12, .L4109
-	ldr	x0, [x29, 104]
-	ldrh	w1, [x0, #:lo12:.LANCHOR101]
-	adrp	x0, .LC251
-	add	x0, x0, :lo12:.LC251
-	bl	printf
-.L4109:
-	bl	zbuf_init
-	adrp	x25, .LANCHOR197
-	mov	w0, 16384
-	bl	ftl_malloc
-	adrp	x1, .LANCHOR192
-	str	x0, [x1, #:lo12:.LANCHOR192]
-	mov	w0, 16384
-	bl	ftl_malloc
-	str	x0, [x25, #:lo12:.LANCHOR197]
-	mov	w0, 16384
-	bl	ftl_malloc
-	adrp	x1, .LANCHOR187
-	str	x0, [x1, #:lo12:.LANCHOR187]
-	mov	w0, 6
-	ldrh	w1, [x23, #:lo12:.LANCHOR8]
-	mul	w0, w1, w0
-	bl	ftl_malloc
-	adrp	x1, .LANCHOR4
-	str	x0, [x1, #:lo12:.LANCHOR4]
-	ldrb	w1, [x21, #:lo12:.LANCHOR79]
-	ldrh	w0, [x22, #:lo12:.LANCHOR94]
-	mul	w0, w0, w1
-	lsl	w0, w0, 2
-	bl	ftl_malloc
-	adrp	x1, .LANCHOR118
-	ldr	x2, [x25, #:lo12:.LANCHOR197]
-	adrp	x25, .LANCHOR12
-	str	x0, [x1, #:lo12:.LANCHOR118]
-	adrp	x0, .LANCHOR117
-	ldrh	w1, [x22, #:lo12:.LANCHOR94]
-	str	x2, [x0, #:lo12:.LANCHOR117]
-	ldrb	w0, [x21, #:lo12:.LANCHOR79]
-	mul	w1, w1, w0
-	lsl	w0, w1, 1
-	adrp	x1, .LANCHOR11
-	add	x3, x2, x0, sxtw 2
-	str	x3, [x1, #:lo12:.LANCHOR11]
-	ldrh	w1, [x23, #:lo12:.LANCHOR8]
-	add	w1, w0, w1, lsr 1
-	ldr	w0, [x19, #:lo12:.LANCHOR19]
-	add	x1, x2, x1, sxtw 2
-	str	x1, [x25, #:lo12:.LANCHOR12]
-	tbz	x0, 12, .L4110
-	adrp	x0, .LC252
-	add	x0, x0, :lo12:.LC252
-	bl	printf
-.L4110:
-	ldrh	w0, [x22, #:lo12:.LANCHOR94]
-	ldrb	w21, [x21, #:lo12:.LANCHOR79]
-	ldrh	w1, [x23, #:lo12:.LANCHOR8]
-	ldrh	w22, [x24, #:lo12:.LANCHOR202]
-	mul	w21, w0, w21
-	ldr	w0, [x19, #:lo12:.LANCHOR19]
-	add	w21, w1, w21, lsl 2
-	lsl	w1, w1, 2
-	lsl	w21, w21, 1
-	add	w22, w1, w22, lsl 2
-	add	w21, w21, 632
-	add	w22, w22, 704
-	tbz	x0, 12, .L4111
-	ldrh	w3, [x20, #:lo12:.LANCHOR221]
-	adrp	x0, .LC253
-	mov	w2, w22
-	mov	w1, w21
-	add	x0, x0, :lo12:.LC253
-	bl	printf
-.L4111:
-	ldrh	w0, [x20, #:lo12:.LANCHOR221]
-	cmp	w21, w0
-	bhi	.L4112
-	cmp	w22, w0
-	bls	.L4113
-.L4112:
+	cbz	w0, .L4025
+	strb	w5, [x20, #:lo12:.LANCHOR157]
+	b	.L3969
+.L4025:
+	ldr	x0, [x4, #:lo12:.LANCHOR11]
+	ldrh	w1, [x0, x28, lsl 1]
+	adrp	x0, .LANCHOR100
+	ldrh	w0, [x0, #:lo12:.LANCHOR100]
+	cmp	w1, w0, lsr 1
+	bhi	.L4026
+	mov	w2, 0
+	mov	w1, 1
+	mov	w0, w3
+	bl	gc_add_sblk
+	b	.L4015
+.L4026:
+	ldp	x2, x0, [x29, 112]
+	ldrh	w2, [x2, #:lo12:.LANCHOR105]
+	ldrh	w0, [x0, #:lo12:.LANCHOR103]
+	add	w0, w0, w2
+	adrp	x2, .LANCHOR104
+	ldrh	w2, [x2, #:lo12:.LANCHOR104]
+	cmp	w0, w2, lsl 1
+	ble	.L4027
+	adrp	x0, .LANCHOR106
+	ldrh	w0, [x0, #:lo12:.LANCHOR106]
+	cmp	w0, w1
+	bcc	.L4024
+	b	.L4027
+.L4023:
+	mov	w1, 1
+	strb	w1, [x23, #:lo12:.LANCHOR90]
+	cmp	w22, 16
+	bls	.L4028
+	adrp	x0, .LANCHOR97
+	ldrh	w2, [x0, #:lo12:.LANCHOR97]
+	adrp	x0, .LANCHOR107
+	ldrh	w0, [x0, #:lo12:.LANCHOR107]
+	cmp	w2, w0
+	bhi	.L4028
+	mov	w0, w1
+	mov	w2, 4
+.L4171:
+	bl	gc_search_src_blk
+	ands	w0, w0, 65535
+	bne	.L4029
+	ldrb	w0, [x23, #:lo12:.LANCHOR90]
+	mov	w2, 4
+	mov	w1, 3
+	bl	gc_search_src_blk
+	and	w0, w0, 65535
+.L4029:
+	adrp	x1, .LANCHOR104
+	cmp	w21, w24, lsr 1
+	ldrh	w1, [x1, #:lo12:.LANCHOR104]
+	bls	.L4165
+	lsr	w1, w1, 2
 .L4166:
+	strh	w1, [x26, #:lo12:.LANCHOR92]
+	b	.L4013
+.L4028:
+	mov	w2, 1
+	mov	w1, 2
+	mov	w0, w2
+	b	.L4171
+.L4033:
+	mov	w1, 3
+	mov	w2, 4
+	mov	w0, 0
+	bl	gc_search_src_blk
+	ldrh	w1, [x21, #:lo12:.LANCHOR104]
+	and	w0, w0, 65535
+.L4165:
+	lsr	w1, w1, 1
 	b	.L4166
-.L4090:
-	add	w1, w1, 1
-	lsl	w3, w3, 1
-	and	w1, w1, 65535
-	b	.L4089
-.L4092:
-	add	w4, w4, 1
-	lsl	w1, w1, 1
-	and	w4, w4, 65535
-	b	.L4091
-.L4095:
-	adrp	x0, .LANCHOR35
-	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbz	w0, .L4098
-	mov	w0, 1200
-	strh	w10, [x11, #:lo12:.LANCHOR125]
-	strh	w0, [x12, #:lo12:.LANCHOR126]
-	strh	w10, [x8, #:lo12:.LANCHOR150]
-	b	.L4098
-.L4113:
-	bl	sblk_init
-	bl	ftl_info_blk_init
+.L4019:
+	adrp	x1, .LANCHOR104
+	ldrh	w1, [x1, #:lo12:.LANCHOR104]
+	lsr	w1, w1, 2
+	strh	w1, [x0, #:lo12:.LANCHOR92]
+	adrp	x0, .LANCHOR76+2110
+	ldrh	w0, [x0, #:lo12:.LANCHOR76+2110]
+	cmp	w0, 0
+	csel	w19, w19, wzr, ne
+	b	.L3969
+.L3973:
+	adrp	x7, .LANCHOR76
+	mov	w0, 65535
+	ldrh	w1, [x7, #:lo12:.LANCHOR76]
+	cmp	w1, w0
+	bne	.L4034
+	bl	gc_get_src_blk
+	strh	w0, [x7, #:lo12:.LANCHOR76]
+.L4034:
+	ldrh	w0, [x7, #:lo12:.LANCHOR76]
+	mov	w1, 65535
+	cmp	w0, w1
+	beq	.L4035
+	adrp	x1, .LANCHOR8
+	ldrh	w1, [x1, #:lo12:.LANCHOR8]
+	cmp	w1, w0
+	bhi	.L4035
+	mov	w0, -1
+	strh	w0, [x7, #:lo12:.LANCHOR76]
+.L4035:
+	ldrh	w3, [x7, #:lo12:.LANCHOR76]
+	mov	w0, 65535
+	add	x1, x7, :lo12:.LANCHOR76
+	cmp	w3, w0
+	beq	.L4173
+	adrp	x0, .LANCHOR9
+	ldrh	w5, [x1, 56]
+	uxtw	x4, w3
+	ldr	x2, [x0, #:lo12:.LANCHOR9]
+	add	x2, x2, x4, lsl 2
+	cbz	w5, .L4037
+	add	x1, x1, 58
+	mov	w0, 0
+.L4039:
+	ldrh	w6, [x1], 2
+	cmp	w6, w3
+	bne	.L4038
+.L4043:
+	adrp	x0, .LANCHOR76
+	mov	w1, -1
+	strh	w1, [x0, #:lo12:.LANCHOR76]
+	b	.L4086
+.L4038:
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	cmp	w5, w0
+	bne	.L4039
+.L4037:
+	ldrb	w0, [x2, 2]
+	and	w1, w0, 224
+	cmp	w1, 224
+	beq	.L4040
+	tst	w0, 192
+	bne	.L4041
+.L4040:
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
+	ldrh	w0, [x0, x4, lsl 1]
+	cbz	w0, .L4043
+	mov	w2, 3306
+	adrp	x1, .LANCHOR240
+	adrp	x0, .LC0
+	add	x1, x1, :lo12:.LANCHOR240
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+	b	.L4043
+.L4041:
+	mov	w0, 2
+	b	.L4174
+.L3974:
+	bl	gc_scan_src_blk
 	cmn	w0, #1
-	beq	.L4088
-	bl	ftl_ext_info_init
-	adrp	x19, .LANCHOR110
-	bl	gc_init
-	mov	w0, 1
-	bl	pm_init
-	bl	lpa_rebuild_hash
-	ldr	x0, [x25, #:lo12:.LANCHOR12]
-	mov	x1, 0
-	add	x0, x0, 16
-	bl	ftl_open_sblk_recovery
-	ldr	x0, [x25, #:lo12:.LANCHOR12]
-	add	x1, x0, 16
-	add	x0, x0, 48
-	bl	ftl_open_sblk_recovery
-	ldr	x1, [x19, #:lo12:.LANCHOR110]
-	ldr	w0, [x1, 8]
-	add	w0, w0, 16
-	str	w0, [x1, 8]
-	ldr	x0, [x25, #:lo12:.LANCHOR12]
-	add	x0, x0, 16
-	bl	ftl_info_data_recovery
-	ldr	x0, [x25, #:lo12:.LANCHOR12]
-	add	x0, x0, 48
-	bl	ftl_info_data_recovery
-	ldr	x0, [x25, #:lo12:.LANCHOR12]
-	add	x0, x0, 80
-	bl	ftl_info_data_recovery
-	bl	gc_recovery
-	bl	pm_flush
+	bne	.L4044
+	mov	w0, 3
+	b	.L4174
+.L4044:
+	adrp	x19, .LANCHOR76
+	mov	w2, 65535
+	add	x0, x19, :lo12:.LANCHOR76
+	ldrh	w1, [x19, #:lo12:.LANCHOR76]
+	cmp	w1, w2
+	beq	.L3988
+	ldrh	w2, [x0, 24]
+	cbz	w2, .L4045
+	mov	w1, 4
+	strh	wzr, [x0, 26]
+	strb	w1, [x20, #:lo12:.LANCHOR157]
+	b	.L4086
+.L4045:
 	mov	w0, 1
-	bl	ftl_total_vpn_update
-	adrp	x0, .LANCHOR195
-	ldrb	w0, [x0, #:lo12:.LANCHOR195]
-	cbz	w0, .L4115
-	ldr	x1, [x19, #:lo12:.LANCHOR110]
-	ldr	w0, [x1, 68]
-	add	w0, w0, 1
-	str	w0, [x1, 68]
-.L4115:
-	bl	ftl_ext_info_flush
-	mov	w0, 0
-	bl	ftl_info_flush
-	bl	print_ftl_debug_info
-	ldr	x0, [x25, #:lo12:.LANCHOR12]
-	ldrh	w0, [x0, 124]
-	cbnz	w0, .L4122
-	adrp	x0, .LANCHOR103
-	adrp	x1, .LANCHOR107
-	ldrh	w0, [x0, #:lo12:.LANCHOR103]
-	ldrh	w1, [x1, #:lo12:.LANCHOR107]
-	add	w0, w0, w1
-	cmp	w0, 7
-	ble	.L4122
-.L4118:
-	mov	w0, 0
-.L4088:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 112
-	ret
-.L4122:
-	adrp	x20, .LANCHOR103
-	adrp	x21, .LANCHOR107
-	add	x20, x20, :lo12:.LANCHOR103
-	add	x21, x21, :lo12:.LANCHOR107
-	mov	w19, 16384
-.L4119:
-	mov	w1, 1
+	strb	w0, [x20, #:lo12:.LANCHOR157]
+	adrp	x0, .LANCHOR11
+	ubfiz	x1, x1, 1, 16
+	mov	x20, x0
+	ldr	x2, [x0, #:lo12:.LANCHOR11]
+	ldrh	w1, [x2, x1]
+	cbz	w1, .L4046
+	adrp	x1, .LANCHOR240
+	adrp	x0, .LC0
+	mov	w2, 3336
+	add	x1, x1, :lo12:.LANCHOR240
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L4046:
+	ldrh	w0, [x19, #:lo12:.LANCHOR76]
+	add	x21, x19, :lo12:.LANCHOR76
+	bl	ftl_free_sblk
+	ldr	x0, [x20, #:lo12:.LANCHOR11]
+	ldrh	w1, [x19, #:lo12:.LANCHOR76]
+	strh	wzr, [x0, x1, lsl 1]
+	ldrh	w0, [x21, 30]
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	cmp	w0, 8
+	bhi	.L4047
+	strh	w0, [x21, 30]
+	b	.L4043
+.L4047:
+	strh	wzr, [x21, 30]
+	bl	ftl_flush
+	bl	pm_flush
+	bl	ftl_ext_info_flush
 	mov	w0, 0
-	bl	zftl_do_gc
-	mov	w1, 1
-	mov	w0, w1
-	bl	zftl_do_gc
-	ldr	x0, [x25, #:lo12:.LANCHOR12]
-	ldrh	w1, [x0, 124]
-	cbnz	w1, .L4117
-	ldrh	w1, [x0, 80]
-	mov	w0, 65535
+	bl	ftl_info_flush
+	b	.L4043
+.L3975:
+	adrp	x19, .LANCHOR76
+	adrp	x23, .LANCHOR100
+	add	x22, x19, :lo12:.LANCHOR76
+	add	x23, x23, :lo12:.LANCHOR100
+.L4135:
+	bl	gc_scan_src_blk_one_page
+	ldrh	w1, [x22, 2]
+	ldrh	w0, [x23]
 	cmp	w1, w0
-	bne	.L4117
-	ldrh	w0, [x20]
-	ldrh	w1, [x21]
-	add	w0, w0, w1
-	cmp	w0, 7
-	bgt	.L4118
-.L4117:
-	subs	w19, w19, #1
-	bne	.L4119
-	b	.L4118
-	.size	zftl_init, .-zftl_init
-	.section	.text.rk_ftl_init,"ax",@progbits
-	.align	2
-	.global	rk_ftl_init
-	.type	rk_ftl_init, %function
-rk_ftl_init:
-	stp	x29, x30, [sp, -32]!
-	add	x29, sp, 0
-	str	x19, [sp, 16]
-	bl	nand_flash_init
-	cbnz	w0, .L4170
-	bl	zftl_init
-.L4170:
-	mov	w19, w0
-	bl	idb_init
-	mov	w1, w19
-	adrp	x0, .LC254
-	add	x0, x0, :lo12:.LC254
+	bcs	.L4049
+	cmp	w21, 7
+	bls	.L4135
+	b	.L4086
+.L4049:
+	ldrh	w3, [x22, 24]
+	ldrh	w1, [x22]
+	cbz	w3, .L4050
+	mov	w0, 4
+	strb	w0, [x20, #:lo12:.LANCHOR157]
+	adrp	x20, .LANCHOR11
+	ubfiz	x0, x1, 1, 16
+	strh	wzr, [x22, 26]
+	ldr	x2, [x20, #:lo12:.LANCHOR11]
+	ldrh	w2, [x2, x0]
+	cmp	w3, w2
+	beq	.L4051
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 10, .L4051
+	adrp	x0, .LC234
+	add	x0, x0, :lo12:.LC234
 	bl	printf
-	mov	w0, w19
-	ldr	x19, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	ret
-	.size	rk_ftl_init, .-rk_ftl_init
-	.section	.text.zftl_write,"ax",@progbits
-	.align	2
-	.global	zftl_write
-	.type	zftl_write, %function
-zftl_write:
-	stp	x29, x30, [sp, -112]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	w19, w0
+.L4051:
+	ldrh	w2, [x19, #:lo12:.LANCHOR76]
+	add	x0, x19, :lo12:.LANCHOR76
+	ldr	x1, [x20, #:lo12:.LANCHOR11]
+	ldrh	w0, [x0, 24]
+	ldrh	w1, [x1, x2, lsl 1]
+	cmp	w1, w0
+	beq	.L4052
+	adrp	x1, .LANCHOR240
+	adrp	x0, .LC0
+	mov	w2, 3379
+	add	x1, x1, :lo12:.LANCHOR240
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L4052:
+	add	x0, x19, :lo12:.LANCHOR76
+	ldrh	w1, [x19, #:lo12:.LANCHOR76]
+	ldrh	w2, [x0, 24]
+	ldr	x0, [x20, #:lo12:.LANCHOR11]
+	strh	w2, [x0, x1, lsl 1]
+	b	.L4086
+.L4050:
+	adrp	x0, .LANCHOR9
+	ldr	x21, [x0, #:lo12:.LANCHOR9]
+	mov	w0, 1
+	strb	w0, [x20, #:lo12:.LANCHOR157]
 	adrp	x0, .LANCHOR19
-	stp	x21, x22, [sp, 32]
-	stp	x25, x26, [sp, 64]
-	mov	w20, w1
 	ldr	w0, [x0, #:lo12:.LANCHOR19]
-	mov	w21, w2
-	stp	x23, x24, [sp, 48]
-	mov	x25, x3
-	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L4173
-	ldr	w4, [x25]
-	mov	w3, w2
-	adrp	x0, .LC255
-	mov	w2, w1
-	add	x0, x0, :lo12:.LC255
-	mov	w1, w19
+	add	x21, x21, x1, uxth 2
+	tbz	x0, 8, .L4053
+	ldrb	w2, [x21, 2]
+	adrp	x0, .LC235
+	add	x0, x0, :lo12:.LC235
+	ubfx	x2, x2, 5, 3
 	bl	printf
-.L4173:
-	cbnz	w19, .L4174
-	adrp	x0, .LANCHOR67
-	mov	w19, 24576
-	ldr	w0, [x0, #:lo12:.LANCHOR67]
-.L4175:
-	cmp	w0, w20
-	ccmp	w0, w21, 0, hi
-	bcc	.L4193
-	add	w1, w20, w21
-	cmp	w0, w1
-	bcc	.L4193
-	adrp	x26, .LANCHOR131
-	add	w19, w19, w20
-	sub	w22, w21, #1
-	adrp	x27, .LANCHOR66
-	ldrb	w0, [x26, #:lo12:.LANCHOR131]
-	add	w22, w22, w19
-	adrp	x28, .LANCHOR57
-	add	x27, x27, :lo12:.LANCHOR66
-	add	x28, x28, :lo12:.LANCHOR57
-	udiv	w24, w19, w0
-	udiv	w22, w22, w0
-	add	x0, x26, :lo12:.LANCHOR131
-	str	x0, [x29, 104]
-	mov	w20, w24
-	sub	w23, w22, w24
-	add	w23, w23, 1
-.L4177:
-	cbnz	w23, .L4186
-	bl	ftl_write_commit
-	adrp	x20, .LANCHOR103
+.L4053:
+	ldrb	w0, [x21, 2]
+	and	w1, w0, 224
+	cmp	w1, 224
+	beq	.L4054
+	tst	w0, 192
+	bne	.L4055
+.L4054:
+	adrp	x1, .LANCHOR240
+	adrp	x0, .LC0
+	mov	w2, 3389
+	add	x1, x1, :lo12:.LANCHOR240
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L4055:
+	ldrh	w0, [x19, #:lo12:.LANCHOR76]
+	add	x20, x19, :lo12:.LANCHOR76
+	bl	ftl_free_sblk
+	mov	w0, -1
+	strh	w0, [x19, #:lo12:.LANCHOR76]
+	ldrh	w0, [x20, 30]
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	cmp	w0, 8
+	bhi	.L4056
+	strh	w0, [x20, 30]
+	b	.L4086
+.L4056:
+	strh	wzr, [x20, 30]
+.L4172:
+	bl	flt_sys_flush
+	b	.L4086
+.L3976:
+	ldrh	w1, [x26, 80]
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L4057
+	adrp	x0, .LANCHOR90
+	ldrb	w19, [x0, #:lo12:.LANCHOR90]
+	cmp	w19, 1
+	bne	.L4057
 	bl	ftl_flush
-	adrp	x19, .LANCHOR107
-	mov	w1, 1
-	mov	w0, 0
-	bl	zftl_do_gc
-	adrp	x0, .LANCHOR12
-	ldr	x0, [x0, #:lo12:.LANCHOR12]
-	ldrh	w0, [x0, 124]
-	cbnz	w0, .L4187
-	ldrh	w0, [x20, #:lo12:.LANCHOR103]
-	ldrh	w1, [x19, #:lo12:.LANCHOR107]
-	add	w0, w0, w1
-	cmp	w0, 11
-	bgt	.L4188
-.L4187:
+	adrp	x0, .LANCHOR76
+	add	x1, x0, :lo12:.LANCHOR76
+	mov	x20, x0
+	ldrh	w1, [x1, 2192]
+	cbz	w1, .L4058
+	mov	w0, w19
+	mov	w1, 5
+.L4167:
+	bl	zftl_gc_get_free_sblk
+	and	w19, w0, 65535
+	mov	w0, 65535
+	cmp	w19, w0
+	beq	.L4060
+	adrp	x0, .LANCHOR9
+	ldr	x21, [x0, #:lo12:.LANCHOR9]
+	add	x21, x21, x19, uxth 2
+	ldrb	w0, [x21, 2]
+	tst	w0, 224
+	beq	.L4061
+	adrp	x1, .LANCHOR240
+	adrp	x0, .LC0
+	mov	w2, 3423
+	add	x1, x1, :lo12:.LANCHOR240
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L4061:
+	ldrb	w0, [x21, 2]
+	mov	w1, 5
+	bfi	w0, w1, 5, 3
+	orr	w0, w0, 16
+	strb	w0, [x21, 2]
+.L4085:
 	mov	w1, 1
+	mov	w0, w19
+	bl	ftl_erase_sblk
+	adrp	x22, .LANCHOR91
+	mov	w0, 5
+	strb	w0, [x26, 84]
+	add	x1, x26, 96
+	mov	w0, w19
+	bl	ftl_get_blk_list_in_sblk
+	and	w0, w0, 255
+	adrp	x1, .LANCHOR100
+	adrp	x21, .LANCHOR85
+	strb	w0, [x26, 89]
+	ldrh	w1, [x1, #:lo12:.LANCHOR100]
+	ldrh	w2, [x22, #:lo12:.LANCHOR91]
+	strh	w19, [x26, 80]
+	strh	wzr, [x26, 82]
+	mul	w0, w0, w1
+	strb	wzr, [x26, 85]
+	strh	w0, [x26, 86]
+	mov	w1, 255
+	ldrb	w0, [x21, #:lo12:.LANCHOR85]
+	strh	wzr, [x26, 90]
+	mul	w2, w2, w0
+	adrp	x0, .LANCHOR160
+	ldr	x0, [x0, #:lo12:.LANCHOR160]
+	lsl	w2, w2, 2
+	bl	ftl_memset
+	ldrb	w0, [x21, #:lo12:.LANCHOR85]
+	mov	w1, 255
+	ldrh	w2, [x22, #:lo12:.LANCHOR91]
+	mul	w2, w2, w0
+	adrp	x0, .LANCHOR161
+	ldr	x0, [x0, #:lo12:.LANCHOR161]
+	lsl	w2, w2, 2
+	bl	ftl_memset
+	ldrb	w0, [x21, #:lo12:.LANCHOR85]
+	mov	w1, 255
+	ldrh	w2, [x22, #:lo12:.LANCHOR91]
+	mul	w2, w2, w0
+	adrp	x0, .LANCHOR88
+	ldr	x0, [x0, #:lo12:.LANCHOR88]
+	bl	ftl_memset
+	ldr	x0, [x23, #:lo12:.LANCHOR12]
+	mov	w1, -1
+	str	w19, [x0, 132]
+	strh	w1, [x0, 128]
+	strh	w1, [x0, 130]
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	adrp	x0, .LANCHOR69
+	mov	w1, -1
+	ldr	x0, [x0, #:lo12:.LANCHOR69]
+	strh	w19, [x0, 126]
+	add	x0, x20, :lo12:.LANCHOR76
+	str	w1, [x0, 2196]
+	strh	wzr, [x0, 2106]
+	strh	wzr, [x0, 56]
+	strh	wzr, [x0, 2108]
+	strh	wzr, [x0, 2194]
 	mov	w0, 0
-	bl	zftl_do_gc
-.L4188:
-	add	x20, x20, :lo12:.LANCHOR103
-	add	x19, x19, :lo12:.LANCHOR107
-.L4189:
-	ldrh	w0, [x20]
-	ldrh	w1, [x19]
-	add	w0, w0, w1
-	cmp	w0, 7
-	ble	.L4190
+	bl	ftl_info_flush
+	b	.L4086
+.L4058:
+	mov	w1, 5
 	mov	w0, 0
-.L4172:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 112
-	ret
-.L4174:
-	cmp	w19, 3
-	bhi	.L4193
-	lsl	w19, w19, 13
-	mov	w0, 8192
-	b	.L4175
-.L4186:
-	ldrb	w0, [x27]
-	cbz	w0, .L4178
-	ldrb	w0, [x28]
-	cmp	w0, 2
-	bhi	.L4178
+	b	.L4167
+.L4057:
+	cmp	w25, 1
+	mov	w24, 4
+	csinc	w24, w24, wzr, eq
+	cmp	w21, 15
+	mov	w0, w24
+	add	w24, w24, 4
+	adrp	x25, .LANCHOR90
+	adrp	x21, .LANCHOR76
+	csel	w24, w24, w0, ls
+	add	x25, x25, :lo12:.LANCHOR90
+	add	x19, x21, :lo12:.LANCHOR76
+	add	x27, x26, 80
+.L4064:
+	sub	w24, w24, #1
+	and	w24, w24, 255
+	cmp	w24, 255
+	beq	.L4086
+	bl	gc_do_copy_back
+	ldrb	w0, [x25]
+	cbnz	w0, .L4065
+	adrp	x0, .LANCHOR57
+	ldrb	w0, [x0, #:lo12:.LANCHOR57]
+	cmp	w0, 3
+	bhi	.L4066
 	bl	ftl_write_commit
-.L4178:
-	mov	w0, 0
-	bl	buf_alloc
-	mov	x26, x0
-	cbnz	x0, .L4179
+.L4066:
+	ldrh	w1, [x19, 26]
+	ldrh	w0, [x19, 24]
+	cmp	w1, w0
+	bcc	.L4064
+	mov	w0, 1
+	strb	w0, [x20, #:lo12:.LANCHOR157]
 	bl	ftl_write_commit
-	b	.L4177
-.L4179:
-	strb	wzr, [x0, 57]
-	cmp	w20, w24
-	ldr	x0, [x29, 104]
-	ccmp	w20, w22, 4, ne
-	ldrb	w0, [x0]
-	strb	w0, [x26, 56]
-	bne	.L4182
-	cmp	w20, w24
-	bne	.L4183
-	udiv	w1, w19, w0
-	msub	w1, w1, w0, w19
-	and	w1, w1, 255
-	strb	w1, [x26, 57]
-	sub	w0, w0, w1
-	and	w0, w0, 255
-	cmp	w21, w0
-	csel	w0, w21, w0, cc
-.L4201:
-	strb	w0, [x26, 56]
-.L4182:
-	ldr	x4, [x26, 8]
-	mov	x1, x25
-	ldrb	w0, [x26, 57]
-	sub	w23, w23, #1
-	ldrb	w2, [x26, 56]
-	ubfiz	x0, x0, 9, 8
-	lsl	w2, w2, 9
-	add	x0, x4, x0
-	bl	ftl_memcpy
-	adrp	x0, .LANCHOR110
-	ldr	x1, [x0, #:lo12:.LANCHOR110]
-	ldr	w0, [x1, 8]
-	str	w20, [x26, 36]
-	add	w20, w20, 1
-	add	w2, w0, 1
-	str	w2, [x1, 8]
-	str	w0, [x26, 32]
-	mov	x0, x26
-	bl	ftl_write_buf
-	ldrb	w0, [x26, 56]
-	ubfiz	x0, x0, 9, 8
-	add	x25, x25, x0
-	b	.L4177
-.L4183:
-	add	w1, w19, w21
-	msub	w0, w0, w20, w1
-	b	.L4201
-.L4190:
-	mov	w1, 1
-	mov	w0, 0
-	bl	zftl_do_gc
+	bl	ftl_flush
+	adrp	x0, .LANCHOR11
+	ldrh	w2, [x19]
+	mov	x19, x0
+	ldr	x1, [x0, #:lo12:.LANCHOR11]
+	ldrh	w1, [x1, x2, lsl 1]
+	cbz	w1, .L4068
+	adrp	x1, .LANCHOR240
+	adrp	x0, .LC0
+	mov	w2, 3507
+	add	x1, x1, :lo12:.LANCHOR240
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L4068:
+	ldrh	w0, [x21, #:lo12:.LANCHOR76]
+	ldr	x2, [x19, #:lo12:.LANCHOR11]
+	ubfiz	x1, x0, 1, 16
+	ldrh	w1, [x2, x1]
+	cbnz	w1, .L4069
+	bl	ftl_free_sblk
+	b	.L4043
+.L4069:
+	mov	w2, 1
+	mov	w1, 0
+	bl	gc_add_sblk
+	b	.L4043
+.L4065:
+	ldrh	w0, [x19, 2194]
+	cbz	w0, .L4070
+	strh	wzr, [x19, 2194]
+	bl	sblk_wait_write_queue_completed
+	bl	gc_write_completed
+	ldr	w0, [x19, 2196]
+	adrp	x19, .LANCHOR69
+	cmn	w0, #1
+	beq	.L4071
+	adrp	x1, .LANCHOR130
+	ldrb	w1, [x1, #:lo12:.LANCHOR130]
+	cbnz	w1, .L4072
+	adrp	x1, .LANCHOR86
+	ldrb	w1, [x1, #:lo12:.LANCHOR86]
+	cbz	w1, .L4073
+.L4072:
+	ldr	x1, [x19, #:lo12:.LANCHOR69]
+	ldr	w2, [x1, 156]
+	mov	w1, 20041
+	movk	w1, 0x444b, lsl 16
+	cmp	w2, w1
+	bne	.L4073
+	adrp	x1, .LANCHOR80
+	ldrh	w3, [x1, #:lo12:.LANCHOR80]
+	adrp	x1, .LANCHOR31
+	ldrb	w2, [x1, #:lo12:.LANCHOR31]
+	mov	w1, 24
+	lsr	w0, w0, w3
+	sub	w1, w1, w2
+	sub	w2, w1, w3
 	mov	w1, 1
-	mov	w0, w1
-	bl	zftl_do_gc
-	b	.L4189
-.L4193:
+	lsl	w1, w1, w2
+	sub	w1, w1, #1
+	and	w0, w1, w0
+	adrp	x1, .LANCHOR81
+	ldrb	w1, [x1, #:lo12:.LANCHOR81]
+	udiv	w0, w0, w1
+	adrp	x1, .LANCHOR9
+	ldr	x2, [x1, #:lo12:.LANCHOR9]
+	lsl	x0, x0, 2
+	add	x4, x2, x0
+	ldrb	w1, [x4, 2]
+	tbz	x1, 3, .L4071
+	adrp	x5, .LANCHOR104
+	ldrh	w3, [x22, #:lo12:.LANCHOR109]
+	ldrh	w5, [x5, #:lo12:.LANCHOR104]
+	add	w3, w3, 8
+	cmp	w3, w5
+	bge	.L4071
+	and	w1, w1, -25
+	strb	w1, [x4, 2]
+	adrp	x1, .LANCHOR10
+	ldr	w3, [x2, x0]
+	ldrh	w1, [x1, #:lo12:.LANCHOR10]
+	ldrh	w4, [x2, x0]
+	ubfx	x3, x3, 11, 8
+	and	w5, w4, 2047
+	mul	w1, w1, w3
+	lsr	w3, w3, 3
+	add	w1, w1, w1, lsl 1
+	add	w1, w5, w1, lsr 2
+	bfi	w4, w1, 0, 11
+	strh	w4, [x2, x0]
+	ldr	w1, [x2, x0]
+	bfi	w1, w3, 11, 8
+	str	w1, [x2, x0]
+.L4071:
+	ldr	x0, [x23, #:lo12:.LANCHOR12]
+	add	x22, x21, :lo12:.LANCHOR76
+	strh	wzr, [x22, 56]
+	ldrh	w0, [x0, 80]
+	str	wzr, [x22, 2196]
+	bl	ftl_free_sblk
+	ldr	x1, [x23, #:lo12:.LANCHOR12]
 	mov	w0, -1
-	b	.L4172
-	.size	zftl_write, .-zftl_write
-	.section	.text.zftl_sys_write,"ax",@progbits
-	.align	2
-	.global	zftl_sys_write
-	.type	zftl_sys_write, %function
-zftl_sys_write:
-	mov	x3, x2
-	mov	w2, w1
-	mov	w1, w0
-	mov	w0, 2
-	b	zftl_write
-	.size	zftl_sys_write, .-zftl_sys_write
-	.section	.text.StorageSysDataStore,"ax",@progbits
-	.align	2
-	.global	StorageSysDataStore
-	.type	StorageSysDataStore, %function
-StorageSysDataStore:
-	mov	x3, x1
+	ldr	x2, [x19, #:lo12:.LANCHOR69]
+	strh	w0, [x1, 80]
+	strh	w0, [x2, 126]
+	strh	w0, [x1, 130]
+	ldr	x0, [x22, 8]
+	cbz	x0, .L4074
+	bl	zbuf_free
+.L4074:
+	add	x21, x21, :lo12:.LANCHOR76
+	str	xzr, [x21, 8]
+	bl	flt_sys_flush
+	mov	w2, 3567
+	strb	wzr, [x20, #:lo12:.LANCHOR157]
+	adrp	x1, .LANCHOR240
+	adrp	x0, .LC0
+	add	x1, x1, :lo12:.LANCHOR240
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+	b	.L4086
+.L4073:
+	bl	ftl_mask_bad_block
+	b	.L4071
+.L4070:
+	ldrh	w0, [x27, 6]
+	ldrh	w1, [x19, 26]
+	cmp	w0, 1
+	ldrh	w0, [x19, 24]
+	bls	.L4075
+	cmp	w1, w0
+	bcc	.L4064
+	mov	w0, 1
+	strb	w0, [x20, #:lo12:.LANCHOR157]
+	ldrh	w0, [x19, 56]
+	add	w1, w0, 1
+	strh	w1, [x19, 56]
+	add	x0, x19, x0, sxtw 1
+	ldrh	w1, [x19]
+	strh	w1, [x0, 58]
+	mov	w0, -1
+	strh	w0, [x19]
+	b	.L4086
+.L4075:
+	mov	w2, 5
+	strb	w2, [x20, #:lo12:.LANCHOR157]
+	cmp	w1, w0
+	bcc	.L4076
+	ldrh	w0, [x19, 56]
+	add	w1, w0, 1
+	strh	w1, [x19, 56]
+	add	x0, x19, x0, sxtw 1
+	ldrh	w1, [x19]
+	strh	w1, [x0, 58]
+	mov	w0, -1
+	strh	w0, [x19]
+.L4076:
+	bl	ftl_flush
+	bl	sblk_wait_write_queue_completed
+	bl	gc_write_completed
+	ldr	x0, [x23, #:lo12:.LANCHOR12]
+	ldrh	w1, [x26, 80]
+	strh	w1, [x0, 128]
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	adrp	x1, .LANCHOR100
+	add	x0, x21, :lo12:.LANCHOR76
+	adrp	x2, .LANCHOR35
+	ldrh	w1, [x1, #:lo12:.LANCHOR100]
+	strh	w1, [x0, 18]
+	adrp	x1, .LANCHOR84
+	ldrb	w2, [x2, #:lo12:.LANCHOR35]
+	strh	wzr, [x0, 16]
+	ldrb	w1, [x1, #:lo12:.LANCHOR84]
+	strh	w1, [x0, 20]
+	cbz	w2, .L4077
+	adrp	x2, .LANCHOR91
+	ldrh	w2, [x2, #:lo12:.LANCHOR91]
+	strh	w2, [x0, 18]
 	mov	w2, 1
-	mov	w1, w0
-	mov	w0, 2
-	b	zftl_write
-	.size	StorageSysDataStore, .-StorageSysDataStore
-	.section	.text.FlashBootVendorWrite,"ax",@progbits
-	.align	2
-	.global	FlashBootVendorWrite
-	.type	FlashBootVendorWrite, %function
-FlashBootVendorWrite:
-	mov	x3, x2
-	mov	w2, w1
-	add	w1, w0, 512
-	mov	w0, 2
-	b	zftl_write
-	.size	FlashBootVendorWrite, .-FlashBootVendorWrite
-	.section	.text.ftl_write,"ax",@progbits
-	.align	2
-	.global	ftl_write
-	.type	ftl_write, %function
-ftl_write:
-	stp	x29, x30, [sp, -48]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	w19, w2
-	stp	x21, x22, [sp, 32]
-	mov	x20, x3
-	mov	w22, w1
-	ands	w21, w0, 255
-	bne	.L4206
-	mov	w3, w2
+	strh	w2, [x0, 20]
+.L4077:
+	cmp	w1, 2
+	bne	.L4079
+	add	x0, x21, :lo12:.LANCHOR76
+	ldrh	w1, [x0, 18]
+	ubfiz	w1, w1, 1, 15
+	strh	w1, [x0, 18]
+	adrp	x1, .LANCHOR86
+	ldrb	w1, [x1, #:lo12:.LANCHOR86]
+	cbnz	w1, .L4079
+	mov	w1, 1
+	strh	w1, [x0, 20]
+.L4079:
+	add	x21, x21, :lo12:.LANCHOR76
+	strh	wzr, [x21, 22]
+	b	.L4086
+.L4082:
+	ldrh	w1, [x24, 16]
+	ldrh	w0, [x24, 18]
+	cmp	w1, w0
+	bcc	.L4083
+	mov	w0, 6
+	strb	w0, [x20, #:lo12:.LANCHOR157]
+	ldr	x0, [x24, 8]
+	bl	zbuf_free
+	str	xzr, [x24, 8]
+	b	.L4086
+.L4083:
+	cmp	w21, 15
+	bls	.L3979
+	cmp	w25, 1
+	bne	.L4086
+	add	w22, w22, 1
+	and	w22, w22, 255
+	cmp	w22, 4
+	bls	.L3979
+	b	.L4086
+.L3978:
+	bl	gc_update_l2p_map_new
+	mov	w19, -1
+	bl	gc_free_src_blk
+	bl	ftl_flush
+	bl	pm_flush
+	strh	w19, [x26, 80]
+	bl	ftl_ext_info_flush
+	adrp	x0, .LANCHOR69
+	ldr	x0, [x0, #:lo12:.LANCHOR69]
+	strh	w19, [x0, 126]
 	mov	w0, 0
-	mov	x2, x20
-	bl	idb_write_data
-.L4206:
-	mov	x3, x20
-	mov	w2, w19
-	mov	w1, w22
-	mov	w0, w21
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 48
-	b	zftl_write
-	.size	ftl_write, .-ftl_write
-	.section	.text.ftl_vendor_write,"ax",@progbits
-	.align	2
-	.global	ftl_vendor_write
-	.type	ftl_vendor_write, %function
-ftl_vendor_write:
-	mov	x3, x2
-	mov	w2, w1
-	add	w1, w0, 512
-	mov	w0, 2
-	b	zftl_write
-	.size	ftl_vendor_write, .-ftl_vendor_write
-	.section	.text.zftl_vendor_write,"ax",@progbits
-	.align	2
-	.global	zftl_vendor_write
-	.type	zftl_vendor_write, %function
-zftl_vendor_write:
-	b	ftl_vendor_write
-	.size	zftl_vendor_write, .-zftl_vendor_write
+	bl	ftl_info_flush
+.L4173:
+	strb	wzr, [x20, #:lo12:.LANCHOR157]
+	b	.L4086
+.L4060:
+	mov	w2, 3430
+	adrp	x1, .LANCHOR240
+	adrp	x0, .LC0
+	add	x1, x1, :lo12:.LANCHOR240
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+	b	.L4085
+	.size	zftl_do_gc, .-zftl_do_gc
 	.section	.text.zftl_discard,"ax",@progbits
 	.align	2
 	.global	zftl_discard
@@ -27019,18 +26533,18 @@ zftl_discard:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w19, w1
-	adrp	x1, .LANCHOR67
+	adrp	x1, .LANCHOR73
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	ldr	w1, [x1, #:lo12:.LANCHOR67]
+	ldr	w1, [x1, #:lo12:.LANCHOR73]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	cmp	w0, w1
 	ccmp	w19, w1, 2, cc
-	bhi	.L4232
+	bhi	.L4197
 	add	w2, w0, w19
 	cmp	w1, w2
-	bcc	.L4232
+	bcc	.L4197
 	adrp	x24, .LANCHOR241
 	add	w22, w0, 24576
 	adrp	x0, .LANCHOR19
@@ -27039,26 +26553,26 @@ zftl_discard:
 	ldr	w2, [x0, #:lo12:.LANCHOR19]
 	add	w1, w19, w1
 	str	w1, [x24, #:lo12:.LANCHOR241]
-	tbz	x2, 12, .L4212
-	adrp	x0, .LC256
+	tbz	x2, 12, .L4177
+	adrp	x0, .LC236
 	mov	w4, 0
 	mov	w3, w19
 	mov	w2, w22
-	add	x0, x0, :lo12:.LC256
+	add	x0, x0, :lo12:.LC236
 	bl	printf
-.L4212:
-	adrp	x23, .LANCHOR110
-	adrp	x26, .LANCHOR131
-	ldr	x0, [x23, #:lo12:.LANCHOR110]
+.L4177:
+	adrp	x23, .LANCHOR69
+	adrp	x26, .LANCHOR68
+	ldr	x0, [x23, #:lo12:.LANCHOR69]
 	ldr	w27, [x0, 8]
 	add	w1, w27, 1
 	str	w1, [x0, 8]
 	bl	ftl_write_commit
 	bl	ftl_flush
-	ldrb	w21, [x26, #:lo12:.LANCHOR131]
+	ldrb	w21, [x26, #:lo12:.LANCHOR68]
 	udiv	w20, w22, w21
 	msub	w25, w20, w21, w22
-	cbz	w25, .L4213
+	cbz	w25, .L4178
 	sub	w21, w21, w25
 	mov	w0, w20
 	cmp	w21, w19
@@ -27066,20 +26580,20 @@ zftl_discard:
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	bne	.L4214
+	bne	.L4179
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
-.L4214:
+.L4179:
 	ldr	w0, [x29, 120]
 	and	w28, w21, 65535
 	cmn	w0, #1
-	beq	.L4216
+	beq	.L4181
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x3, x0
-	cbz	x0, .L4216
+	cbz	x0, .L4181
 	strb	w25, [x0, 57]
 	ubfiz	x25, x25, 9, 25
 	strb	w21, [x0, 56]
@@ -27094,57 +26608,57 @@ zftl_discard:
 	mov	x0, x3
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-	ldr	x1, [x23, #:lo12:.LANCHOR110]
+	ldr	x1, [x23, #:lo12:.LANCHOR69]
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L4216:
+.L4181:
 	add	w20, w20, 1
 	sub	w19, w19, w28
-.L4213:
-	cbz	w19, .L4218
+.L4178:
+	cbz	w19, .L4183
 	bl	ftl_flush
-.L4218:
-	adrp	x25, .LANCHOR74
-	add	x21, x26, :lo12:.LANCHOR131
-	add	x25, x25, :lo12:.LANCHOR74
+.L4183:
+	adrp	x25, .LANCHOR80
+	add	x21, x26, :lo12:.LANCHOR68
+	add	x25, x25, :lo12:.LANCHOR80
 	mov	w0, -1
 	str	w0, [x29, 124]
-.L4219:
+.L4184:
 	ldrb	w0, [x21]
 	cmp	w19, w0
-	bcs	.L4224
-	cbz	w19, .L4226
+	bcs	.L4189
+	cbz	w19, .L4191
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	bne	.L4227
+	bne	.L4192
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
-.L4227:
+.L4192:
 	ldr	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L4226
+	beq	.L4191
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x21, x0
-	cbz	x0, .L4226
+	cbz	x0, .L4191
 	strb	wzr, [x0, 57]
 	strb	w19, [x0, 56]
 	stp	w27, w20, [x21, 32]
-	ldrb	w0, [x26, #:lo12:.LANCHOR131]
+	ldrb	w0, [x26, #:lo12:.LANCHOR68]
 	cmp	w19, w0
-	bcc	.L4229
+	bcc	.L4194
 	adrp	x1, .LANCHOR242
 	adrp	x0, .LC0
-	mov	w2, 1493
+	mov	w2, 1492
 	add	x1, x1, :lo12:.LANCHOR242
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L4229:
+.L4194:
 	ldr	x0, [x21, 8]
 	lsl	w2, w19, 9
 	mov	w1, 0
@@ -27152,42 +26666,42 @@ zftl_discard:
 	mov	x0, x21
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-	ldr	x1, [x23, #:lo12:.LANCHOR110]
+	ldr	x1, [x23, #:lo12:.LANCHOR69]
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L4226:
+.L4191:
 	ldr	w1, [x24, #:lo12:.LANCHOR241]
 	cmp	w1, 8192
-	bls	.L4233
+	bls	.L4198
 	ldr	x0, [x29, 104]
 	ldr	w0, [x0, #:lo12:.LANCHOR19]
-	tbz	x0, 12, .L4230
-	adrp	x0, .LC256
+	tbz	x0, 12, .L4195
+	adrp	x0, .LC236
 	mov	w4, 0
 	mov	w3, w19
 	mov	w2, w22
-	add	x0, x0, :lo12:.LC256
+	add	x0, x0, :lo12:.LC236
 	bl	printf
-.L4230:
+.L4195:
 	str	wzr, [x24, #:lo12:.LANCHOR241]
 	bl	flt_sys_flush
-	adrp	x0, .LANCHOR122
+	adrp	x0, .LANCHOR128
 	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR122]
-.L4233:
+	str	w1, [x0, #:lo12:.LANCHOR128]
+.L4198:
 	mov	w0, 0
-	b	.L4210
-.L4224:
+	b	.L4175
+.L4189:
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L4220
+	beq	.L4185
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbz	x0, .L4222
+	cbz	x0, .L4187
 	ldrb	w2, [x21]
 	mov	w1, 0
 	strb	w2, [x0, 56]
@@ -27199,24 +26713,24 @@ zftl_discard:
 	mov	x0, x28
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-.L4259:
-	ldr	x1, [x23, #:lo12:.LANCHOR110]
+.L4224:
+	ldr	x1, [x23, #:lo12:.LANCHOR69]
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L4222:
+.L4187:
 	ldrb	w0, [x21]
 	add	w20, w20, 1
 	sub	w19, w19, w0
-	b	.L4219
-.L4220:
+	b	.L4184
+.L4185:
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
 	ldr	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L4222
+	beq	.L4187
 	add	x1, x29, 124
 	mov	w2, 1
 	mov	w0, w20
@@ -27233,14 +26747,14 @@ zftl_discard:
 	sub	w0, w0, #1
 	lsr	w1, w1, w2
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR75
-	ldrb	w1, [x1, #:lo12:.LANCHOR75]
+	adrp	x1, .LANCHOR81
+	ldrb	w1, [x1, #:lo12:.LANCHOR81]
 	udiv	w0, w0, w1
 	bl	ftl_vpn_decrement
-	b	.L4259
-.L4232:
+	b	.L4224
+.L4197:
 	mov	w0, -1
-.L4210:
+.L4175:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -27265,47 +26779,47 @@ ftl_discard:
 dump_pm_blk:
 	stp	x29, x30, [sp, -48]!
 	mov	w2, 4
-	adrp	x0, .LC257
-	add	x0, x0, :lo12:.LC257
+	adrp	x0, .LC237
+	add	x0, x0, :lo12:.LC237
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR110
+	adrp	x20, .LANCHOR69
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR152
-	ldr	x1, [x20, #:lo12:.LANCHOR110]
+	adrp	x21, .LANCHOR153
+	ldr	x1, [x20, #:lo12:.LANCHOR69]
 	mov	w19, 0
 	mov	w22, 65535
 	add	x1, x1, 704
 	ldrh	w3, [x1, -6]
 	bl	rknand_print_hex
-	ldrh	w3, [x21, #:lo12:.LANCHOR152]
-	add	x21, x21, :lo12:.LANCHOR152
-	ldr	x1, [x20, #:lo12:.LANCHOR110]
+	ldrh	w3, [x21, #:lo12:.LANCHOR153]
+	add	x21, x21, :lo12:.LANCHOR153
+	ldr	x1, [x20, #:lo12:.LANCHOR69]
 	mov	w2, 2
-	adrp	x0, .LC258
-	add	x0, x0, :lo12:.LC258
+	adrp	x0, .LC238
+	add	x0, x0, :lo12:.LC238
 	add	x1, x1, 416
 	bl	rknand_print_hex
-.L4262:
+.L4227:
 	ldrh	w0, [x21]
 	cmp	w0, w19
-	bhi	.L4264
+	bhi	.L4229
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L4264:
-	ldr	x0, [x20, #:lo12:.LANCHOR110]
+.L4229:
+	ldr	x0, [x20, #:lo12:.LANCHOR69]
 	add	x0, x0, x19, sxtw 1
 	ldrh	w0, [x0, 416]
 	cmp	w0, w22
-	beq	.L4263
+	beq	.L4228
 	mov	x1, 0
 	bl	ftl_sblk_dump
-.L4263:
+.L4228:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L4262
+	b	.L4227
 	.size	dump_pm_blk, .-dump_pm_blk
 	.global	g_pm_spare
 	.global	pm_first_write
@@ -27487,14 +27001,14 @@ _c_ftl_blk_pre_plane:
 	.zero	2
 	.section	.bss._c_ftl_block_addr_log2,"aw",@nobits
 	.align	1
-	.set	.LANCHOR74,. + 0
+	.set	.LANCHOR80,. + 0
 	.type	_c_ftl_block_addr_log2, %object
 	.size	_c_ftl_block_addr_log2, 2
 _c_ftl_block_addr_log2:
 	.zero	2
 	.section	.bss._c_ftl_block_align_addr,"aw",@nobits
 	.align	1
-	.set	.LANCHOR111,. + 0
+	.set	.LANCHOR117,. + 0
 	.type	_c_ftl_block_align_addr, %object
 	.size	_c_ftl_block_align_addr, 2
 _c_ftl_block_align_addr:
@@ -27519,73 +27033,73 @@ _c_ftl_cs_bits:
 _c_ftl_nand_blks_per_die:
 	.zero	2
 	.section	.bss._c_ftl_nand_die_num,"aw",@nobits
-	.set	.LANCHOR112,. + 0
+	.set	.LANCHOR118,. + 0
 	.type	_c_ftl_nand_die_num, %object
 	.size	_c_ftl_nand_die_num, 1
 _c_ftl_nand_die_num:
 	.zero	1
 	.section	.bss._c_ftl_nand_planes_num,"aw",@nobits
-	.set	.LANCHOR79,. + 0
+	.set	.LANCHOR85,. + 0
 	.type	_c_ftl_nand_planes_num, %object
 	.size	_c_ftl_nand_planes_num, 1
 _c_ftl_nand_planes_num:
 	.zero	1
 	.section	.bss._c_ftl_nand_type,"aw",@nobits
-	.set	.LANCHOR78,. + 0
+	.set	.LANCHOR84,. + 0
 	.type	_c_ftl_nand_type, %object
 	.size	_c_ftl_nand_type, 1
 _c_ftl_nand_type:
 	.zero	1
 	.section	.bss._c_ftl_page_pre_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR85,. + 0
+	.set	.LANCHOR91,. + 0
 	.type	_c_ftl_page_pre_blk, %object
 	.size	_c_ftl_page_pre_blk, 2
 _c_ftl_page_pre_blk:
 	.zero	2
 	.section	.bss._c_ftl_page_pre_slc_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR94,. + 0
+	.set	.LANCHOR100,. + 0
 	.type	_c_ftl_page_pre_slc_blk, %object
 	.size	_c_ftl_page_pre_slc_blk, 2
 _c_ftl_page_pre_slc_blk:
 	.zero	2
 	.section	.bss._c_ftl_planes_per_die,"aw",@nobits
-	.set	.LANCHOR75,. + 0
+	.set	.LANCHOR81,. + 0
 	.type	_c_ftl_planes_per_die, %object
 	.size	_c_ftl_planes_per_die, 1
 _c_ftl_planes_per_die:
 	.zero	1
 	.section	.bss._c_ftl_pm_page_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR202,. + 0
+	.set	.LANCHOR203,. + 0
 	.type	_c_ftl_pm_page_num, %object
 	.size	_c_ftl_pm_page_num, 2
 _c_ftl_pm_page_num:
 	.zero	2
 	.section	.bss._c_ftl_sec_per_page,"aw",@nobits
-	.set	.LANCHOR131,. + 0
+	.set	.LANCHOR68,. + 0
 	.type	_c_ftl_sec_per_page, %object
 	.size	_c_ftl_sec_per_page, 1
 _c_ftl_sec_per_page:
 	.zero	1
 	.section	.bss._c_max_pm_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR152,. + 0
+	.set	.LANCHOR153,. + 0
 	.type	_c_max_pm_sblk, %object
 	.size	_c_max_pm_sblk, 2
 _c_max_pm_sblk:
 	.zero	2
 	.section	.bss._c_mix_max_slc_ec_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR126,. + 0
+	.set	.LANCHOR132,. + 0
 	.type	_c_mix_max_slc_ec_count, %object
 	.size	_c_mix_max_slc_ec_count, 2
 _c_mix_max_slc_ec_count:
 	.zero	2
 	.section	.bss._c_mix_max_xlc_ec_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR125,. + 0
+	.set	.LANCHOR131,. + 0
 	.type	_c_mix_max_xlc_ec_count, %object
 	.size	_c_mix_max_xlc_ec_count, 2
 _c_mix_max_xlc_ec_count:
@@ -27599,42 +27113,42 @@ _c_slc_to_xlc_ec_ratio:
 	.zero	2
 	.section	.bss._c_swl_slc_gc_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR149,. + 0
+	.set	.LANCHOR150,. + 0
 	.type	_c_swl_slc_gc_th, %object
 	.size	_c_swl_slc_gc_th, 2
 _c_swl_slc_gc_th:
 	.zero	2
 	.section	.bss._c_swl_xlc_gc_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR150,. + 0
+	.set	.LANCHOR151,. + 0
 	.type	_c_swl_xlc_gc_th, %object
 	.size	_c_swl_xlc_gc_th, 2
 _c_swl_xlc_gc_th:
 	.zero	2
 	.section	.bss._c_totle_data_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR240,. + 0
+	.set	.LANCHOR228,. + 0
 	.type	_c_totle_data_density, %object
 	.size	_c_totle_data_density, 4
 _c_totle_data_density:
 	.zero	4
 	.section	.bss._c_totle_log_page,"aw",@nobits
 	.align	2
-	.set	.LANCHOR128,. + 0
+	.set	.LANCHOR219,. + 0
 	.type	_c_totle_log_page, %object
 	.size	_c_totle_log_page, 4
 _c_totle_log_page:
 	.zero	4
 	.section	.bss._c_totle_phy_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR239,. + 0
+	.set	.LANCHOR227,. + 0
 	.type	_c_totle_phy_density, %object
 	.size	_c_totle_phy_density, 4
 _c_totle_phy_density:
 	.zero	4
 	.section	.bss._c_user_data_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR67,. + 0
+	.set	.LANCHOR73,. + 0
 	.type	_c_user_data_density, %object
 	.size	_c_user_data_density, 4
 _c_user_data_density:
@@ -27647,7 +27161,7 @@ _ftl_gc_tag_page_num:
 	.zero	1
 	.section	.bss._gc_after_discard_en,"aw",@nobits
 	.align	2
-	.set	.LANCHOR122,. + 0
+	.set	.LANCHOR128,. + 0
 	.type	_gc_after_discard_en, %object
 	.size	_gc_after_discard_en, 4
 _gc_after_discard_en:
@@ -27666,14 +27180,14 @@ _last_write_time:
 	.zero	4
 	.section	.bss._max_xlc_super_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR101,. + 0
+	.set	.LANCHOR107,. + 0
 	.type	_max_xlc_super_block, %object
 	.size	_max_xlc_super_block, 2
 _max_xlc_super_block:
 	.zero	2
 	.section	.bss._min_slc_super_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR98,. + 0
+	.set	.LANCHOR104,. + 0
 	.type	_min_slc_super_block, %object
 	.size	_min_slc_super_block, 2
 _min_slc_super_block:
@@ -27694,14 +27208,14 @@ fill_spare_size:
 	.zero	2
 	.section	.bss.flash_ddr_tuning_sdr_read_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR169,. + 0
+	.set	.LANCHOR170,. + 0
 	.type	flash_ddr_tuning_sdr_read_count, %object
 	.size	flash_ddr_tuning_sdr_read_count, 4
 flash_ddr_tuning_sdr_read_count:
 	.zero	4
 	.section	.bss.flash_read_retry,"aw",@nobits
 	.align	3
-	.set	.LANCHOR171,. + 0
+	.set	.LANCHOR172,. + 0
 	.type	flash_read_retry, %object
 	.size	flash_read_retry, 8
 flash_read_retry:
@@ -27714,89 +27228,89 @@ free_buf_count:
 	.zero	1
 	.section	.bss.free_mix_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR107,. + 0
+	.set	.LANCHOR113,. + 0
 	.type	free_mix_sblk, %object
 	.size	free_mix_sblk, 2
 free_mix_sblk:
 	.zero	2
 	.section	.bss.free_slc_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR103,. + 0
+	.set	.LANCHOR109,. + 0
 	.type	free_slc_sblk, %object
 	.size	free_slc_sblk, 2
 free_slc_sblk:
 	.zero	2
 	.section	.bss.free_xlc_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR105,. + 0
+	.set	.LANCHOR111,. + 0
 	.type	free_xlc_sblk, %object
 	.size	free_xlc_sblk, 2
 free_xlc_sblk:
 	.zero	2
 	.section	.bss.ftl_ext_info_data_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR197,. + 0
+	.set	.LANCHOR199,. + 0
 	.type	ftl_ext_info_data_buffer, %object
 	.size	ftl_ext_info_data_buffer, 8
 ftl_ext_info_data_buffer:
 	.zero	8
 	.section	.bss.ftl_ext_info_first_write,"aw",@nobits
-	.set	.LANCHOR196,. + 0
+	.set	.LANCHOR198,. + 0
 	.type	ftl_ext_info_first_write, %object
 	.size	ftl_ext_info_first_write, 1
 ftl_ext_info_first_write:
 	.zero	1
 	.section	.bss.ftl_flush_jiffies,"aw",@nobits
 	.align	2
-	.set	.LANCHOR233,. + 0
+	.set	.LANCHOR236,. + 0
 	.type	ftl_flush_jiffies, %object
 	.size	ftl_flush_jiffies, 4
 ftl_flush_jiffies:
 	.zero	4
 	.section	.bss.ftl_info_data_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR192,. + 0
+	.set	.LANCHOR194,. + 0
 	.type	ftl_info_data_buffer, %object
 	.size	ftl_info_data_buffer, 8
 ftl_info_data_buffer:
 	.zero	8
 	.section	.bss.ftl_info_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR190,. + 0
+	.set	.LANCHOR192,. + 0
 	.type	ftl_info_spare, %object
 	.size	ftl_info_spare, 256
 ftl_info_spare:
 	.zero	256
 	.section	.bss.ftl_low_format_cur_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR68,. + 0
+	.set	.LANCHOR74,. + 0
 	.type	ftl_low_format_cur_blk, %object
 	.size	ftl_low_format_cur_blk, 2
 ftl_low_format_cur_blk:
 	.zero	2
 	.section	.bss.ftl_power_lost_flag,"aw",@nobits
-	.set	.LANCHOR195,. + 0
+	.set	.LANCHOR197,. + 0
 	.type	ftl_power_lost_flag, %object
 	.size	ftl_power_lost_flag, 1
 ftl_power_lost_flag:
 	.zero	1
 	.section	.bss.ftl_sblk_lpa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR117,. + 0
+	.set	.LANCHOR123,. + 0
 	.type	ftl_sblk_lpa_tbl, %object
 	.size	ftl_sblk_lpa_tbl, 8
 ftl_sblk_lpa_tbl:
 	.zero	8
 	.section	.bss.ftl_sblk_update_list,"aw",@nobits
 	.align	3
-	.set	.LANCHOR73,. + 0
+	.set	.LANCHOR79,. + 0
 	.type	ftl_sblk_update_list, %object
 	.size	ftl_sblk_update_list, 16
 ftl_sblk_update_list:
 	.zero	16
 	.section	.bss.ftl_sblk_update_list_offset,"aw",@nobits
 	.align	1
-	.set	.LANCHOR123,. + 0
+	.set	.LANCHOR129,. + 0
 	.type	ftl_sblk_update_list_offset, %object
 	.size	ftl_sblk_update_list_offset, 2
 ftl_sblk_update_list_offset:
@@ -27810,34 +27324,34 @@ ftl_sblk_vpn:
 	.zero	8
 	.section	.bss.ftl_sblk_vpn_update_id,"aw",@nobits
 	.align	1
-	.set	.LANCHOR72,. + 0
+	.set	.LANCHOR78,. + 0
 	.type	ftl_sblk_vpn_update_id, %object
 	.size	ftl_sblk_vpn_update_id, 2
 ftl_sblk_vpn_update_id:
 	.zero	2
 	.section	.bss.ftl_sys_info_first_write,"aw",@nobits
-	.set	.LANCHOR194,. + 0
+	.set	.LANCHOR196,. + 0
 	.type	ftl_sys_info_first_write, %object
 	.size	ftl_sys_info_first_write, 1
 ftl_sys_info_first_write:
 	.zero	1
 	.section	.bss.ftl_tmp_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR187,. + 0
+	.set	.LANCHOR189,. + 0
 	.type	ftl_tmp_buffer, %object
 	.size	ftl_tmp_buffer, 8
 ftl_tmp_buffer:
 	.zero	8
 	.section	.bss.ftl_tmp_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR188,. + 0
+	.set	.LANCHOR190,. + 0
 	.type	ftl_tmp_spare, %object
 	.size	ftl_tmp_spare, 256
 ftl_tmp_spare:
 	.zero	256
 	.section	.bss.ftl_vpn_update_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR121,. + 0
+	.set	.LANCHOR127,. + 0
 	.type	ftl_vpn_update_count, %object
 	.size	ftl_vpn_update_count, 2
 ftl_vpn_update_count:
@@ -27858,7 +27372,7 @@ g_buf:
 	.zero	1024
 	.section	.bss.g_die_addr,"aw",@nobits
 	.align	2
-	.set	.LANCHOR145,. + 0
+	.set	.LANCHOR146,. + 0
 	.type	g_die_addr, %object
 	.size	g_die_addr, 32
 g_die_addr:
@@ -27871,20 +27385,20 @@ g_die_addr:
 g_die_cs_idx:
 	.zero	8
 	.section	.bss.g_flash_3d_mlc_flag,"aw",@nobits
-	.set	.LANCHOR80,. + 0
+	.set	.LANCHOR86,. + 0
 	.type	g_flash_3d_mlc_flag, %object
 	.size	g_flash_3d_mlc_flag, 1
 g_flash_3d_mlc_flag:
 	.zero	1
 	.section	.bss.g_flash_3d_tlc_flag,"aw",@nobits
-	.set	.LANCHOR83,. + 0
+	.set	.LANCHOR89,. + 0
 	.type	g_flash_3d_tlc_flag, %object
 	.size	g_flash_3d_tlc_flag, 1
 g_flash_3d_tlc_flag:
 	.zero	1
 	.section	.bss.g_flash_blk_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR211,. + 0
+	.set	.LANCHOR210,. + 0
 	.type	g_flash_blk_info, %object
 	.size	g_flash_blk_info, 4
 g_flash_blk_info:
@@ -27903,13 +27417,13 @@ g_flash_cur_mode:
 g_flash_interface_mode:
 	.zero	1
 	.section	.bss.g_flash_micron_3d_tlc_b05a,"aw",@nobits
-	.set	.LANCHOR124,. + 0
+	.set	.LANCHOR130,. + 0
 	.type	g_flash_micron_3d_tlc_b05a, %object
 	.size	g_flash_micron_3d_tlc_b05a, 1
 g_flash_micron_3d_tlc_b05a:
 	.zero	1
 	.section	.bss.g_flash_micron_3d_tlc_b16a,"aw",@nobits
-	.set	.LANCHOR217,. + 0
+	.set	.LANCHOR216,. + 0
 	.type	g_flash_micron_3d_tlc_b16a, %object
 	.size	g_flash_micron_3d_tlc_b16a, 1
 g_flash_micron_3d_tlc_b16a:
@@ -27927,20 +27441,20 @@ g_flash_micron_3d_tlc_flag:
 g_flash_multi_page_prog_en:
 	.zero	1
 	.section	.bss.g_flash_multi_page_read_en,"aw",@nobits
-	.set	.LANCHOR183,. + 0
+	.set	.LANCHOR185,. + 0
 	.type	g_flash_multi_page_read_en, %object
 	.size	g_flash_multi_page_read_en, 1
 g_flash_multi_page_read_en:
 	.zero	1
 	.section	.bss.g_flash_page_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR173,. + 0
+	.set	.LANCHOR174,. + 0
 	.type	g_flash_page_buffer, %object
 	.size	g_flash_page_buffer, 8
 g_flash_page_buffer:
 	.zero	8
 	.section	.bss.g_flash_reversd_blks,"aw",@nobits
-	.set	.LANCHOR216,. + 0
+	.set	.LANCHOR215,. + 0
 	.type	g_flash_reversd_blks, %object
 	.size	g_flash_reversd_blks, 1
 g_flash_reversd_blks:
@@ -27959,28 +27473,28 @@ g_flash_slc_mode:
 	.zero	1
 	.section	.bss.g_flash_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR172,. + 0
+	.set	.LANCHOR173,. + 0
 	.type	g_flash_spare_buffer, %object
 	.size	g_flash_spare_buffer, 8
 g_flash_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_sys_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR210,. + 0
+	.set	.LANCHOR209,. + 0
 	.type	g_flash_sys_spare_buffer, %object
 	.size	g_flash_sys_spare_buffer, 8
 g_flash_sys_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_tmp_page_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR163,. + 0
+	.set	.LANCHOR164,. + 0
 	.type	g_flash_tmp_page_buffer, %object
 	.size	g_flash_tmp_page_buffer, 8
 g_flash_tmp_page_buffer:
 	.zero	8
 	.section	.bss.g_flash_tmp_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR165,. + 0
+	.set	.LANCHOR166,. + 0
 	.type	g_flash_tmp_spare_buffer, %object
 	.size	g_flash_tmp_spare_buffer, 8
 g_flash_tmp_spare_buffer:
@@ -27999,14 +27513,14 @@ g_flash_ymtc_3d_tlc_flag:
 	.zero	1
 	.section	.bss.g_ftl_info_blk,"aw",@nobits
 	.align	6
-	.set	.LANCHOR191,. + 0
+	.set	.LANCHOR193,. + 0
 	.type	g_ftl_info_blk, %object
 	.size	g_ftl_info_blk, 4
 g_ftl_info_blk:
 	.zero	4
 	.section	.bss.g_gc_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR70,. + 0
+	.set	.LANCHOR76,. + 0
 	.type	g_gc_info, %object
 	.size	g_gc_info, 2216
 g_gc_info:
@@ -28037,14 +27551,14 @@ g_lsb_page_tbl:
 g_maxRegNum:
 	.zero	1
 	.section	.bss.g_maxRetryCount,"aw",@nobits
-	.set	.LANCHOR166,. + 0
+	.set	.LANCHOR167,. + 0
 	.type	g_maxRetryCount, %object
 	.size	g_maxRetryCount, 1
 g_maxRetryCount:
 	.zero	1
 	.section	.bss.g_msb_page_tbl,"aw",@nobits
 	.align	2
-	.set	.LANCHOR142,. + 0
+	.set	.LANCHOR143,. + 0
 	.type	g_msb_page_tbl, %object
 	.size	g_msb_page_tbl, 2048
 g_msb_page_tbl:
@@ -28069,7 +27583,7 @@ g_nand_opt_para:
 g_nandc_ecc_bits:
 	.zero	1
 	.section	.bss.g_nandc_tran_timeout,"aw",@nobits
-	.set	.LANCHOR164,. + 0
+	.set	.LANCHOR165,. + 0
 	.type	g_nandc_tran_timeout, %object
 	.size	g_nandc_tran_timeout, 1
 g_nandc_tran_timeout:
@@ -28088,14 +27602,14 @@ g_nandc_v6_master_info:
 g_nandc_ver:
 	.zero	1
 	.section	.bss.g_one_pass_program,"aw",@nobits
-	.set	.LANCHOR81,. + 0
+	.set	.LANCHOR87,. + 0
 	.type	g_one_pass_program, %object
 	.size	g_one_pass_program, 1
 g_one_pass_program:
 	.zero	1
 	.section	.bss.g_pm_spare,"aw",@nobits
 	.align	3
-	.set	.LANCHOR207,. + 0
+	.set	.LANCHOR206,. + 0
 	.type	g_pm_spare, %object
 	.size	g_pm_spare, 8
 g_pm_spare:
@@ -28119,138 +27633,138 @@ g_slc_mode_enable:
 	.zero	1
 	.section	.bss.g_slc_page_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR144,. + 0
+	.set	.LANCHOR145,. + 0
 	.type	g_slc_page_num, %object
 	.size	g_slc_page_num, 2
 g_slc_page_num:
 	.zero	2
 	.section	.bss.g_totle_phy_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR146,. + 0
+	.set	.LANCHOR147,. + 0
 	.type	g_totle_phy_block, %object
 	.size	g_totle_phy_block, 2
 g_totle_phy_block:
 	.zero	2
 	.section	.bss.gc_des_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR161,. + 0
+	.set	.LANCHOR162,. + 0
 	.type	gc_des_ppa_tbl, %object
 	.size	gc_des_ppa_tbl, 8
 gc_des_ppa_tbl:
 	.zero	8
 	.section	.bss.gc_free_slc_sblk_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR86,. + 0
+	.set	.LANCHOR92,. + 0
 	.type	gc_free_slc_sblk_th, %object
 	.size	gc_free_slc_sblk_th, 2
 gc_free_slc_sblk_th:
 	.zero	2
 	.section	.bss.gc_lpa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR159,. + 0
+	.set	.LANCHOR160,. + 0
 	.type	gc_lpa_tbl, %object
 	.size	gc_lpa_tbl, 8
 gc_lpa_tbl:
 	.zero	8
 	.section	.bss.gc_mode,"aw",@nobits
-	.set	.LANCHOR84,. + 0
+	.set	.LANCHOR90,. + 0
 	.type	gc_mode, %object
 	.size	gc_mode, 1
 gc_mode:
 	.zero	1
 	.section	.bss.gc_page_buf_id,"aw",@nobits
 	.align	3
-	.set	.LANCHOR82,. + 0
+	.set	.LANCHOR88,. + 0
 	.type	gc_page_buf_id, %object
 	.size	gc_page_buf_id, 8
 gc_page_buf_id:
 	.zero	8
 	.section	.bss.gc_pre_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR160,. + 0
+	.set	.LANCHOR161,. + 0
 	.type	gc_pre_ppa_tbl, %object
 	.size	gc_pre_ppa_tbl, 8
 gc_pre_ppa_tbl:
 	.zero	8
 	.section	.bss.gc_search_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR157,. + 0
+	.set	.LANCHOR158,. + 0
 	.type	gc_search_count, %object
 	.size	gc_search_count, 4
 gc_search_count:
 	.zero	4
 	.section	.bss.gc_slc_cache_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR88,. + 0
+	.set	.LANCHOR94,. + 0
 	.type	gc_slc_cache_index, %object
 	.size	gc_slc_cache_index, 2
 gc_slc_cache_index:
 	.zero	2
 	.section	.bss.gc_slc_data_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR87,. + 0
+	.set	.LANCHOR93,. + 0
 	.type	gc_slc_data_index, %object
 	.size	gc_slc_data_index, 2
 gc_slc_data_index:
 	.zero	2
 	.section	.bss.gc_slc_mode_slc_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR158,. + 0
+	.set	.LANCHOR159,. + 0
 	.type	gc_slc_mode_slc_vpn_th, %object
 	.size	gc_slc_mode_slc_vpn_th, 2
 gc_slc_mode_slc_vpn_th:
 	.zero	2
 	.section	.bss.gc_slc_mode_tlc_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR93,. + 0
+	.set	.LANCHOR99,. + 0
 	.type	gc_slc_mode_tlc_vpn_th, %object
 	.size	gc_slc_mode_tlc_vpn_th, 2
 gc_slc_mode_tlc_vpn_th:
 	.zero	2
 	.section	.bss.gc_slc_mode_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR69,. + 0
+	.set	.LANCHOR75,. + 0
 	.type	gc_slc_mode_vpn_th, %object
 	.size	gc_slc_mode_vpn_th, 2
 gc_slc_mode_vpn_th:
 	.zero	2
 	.section	.bss.gc_state,"aw",@nobits
-	.set	.LANCHOR156,. + 0
+	.set	.LANCHOR157,. + 0
 	.type	gc_state, %object
 	.size	gc_state, 1
 gc_state:
 	.zero	1
 	.section	.bss.gc_tlc_mode_slc_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR102,. + 0
+	.set	.LANCHOR108,. + 0
 	.type	gc_tlc_mode_slc_vpn_th, %object
 	.size	gc_tlc_mode_slc_vpn_th, 2
 gc_tlc_mode_slc_vpn_th:
 	.zero	2
 	.section	.bss.gc_tlc_mode_tlc_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR100,. + 0
+	.set	.LANCHOR106,. + 0
 	.type	gc_tlc_mode_tlc_vpn_th, %object
 	.size	gc_tlc_mode_tlc_vpn_th, 2
 gc_tlc_mode_tlc_vpn_th:
 	.zero	2
 	.section	.bss.gc_valid_page_ppa,"aw",@nobits
 	.align	3
-	.set	.LANCHOR76,. + 0
+	.set	.LANCHOR82,. + 0
 	.type	gc_valid_page_ppa, %object
 	.size	gc_valid_page_ppa, 8
 gc_valid_page_ppa:
 	.zero	8
 	.section	.bss.gc_xlc_data_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR89,. + 0
+	.set	.LANCHOR95,. + 0
 	.type	gc_xlc_data_index, %object
 	.size	gc_xlc_data_index, 2
 gc_xlc_data_index:
 	.zero	2
 	.section	.bss.gc_xlc_search_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR96,. + 0
+	.set	.LANCHOR102,. + 0
 	.type	gc_xlc_search_index, %object
 	.size	gc_xlc_search_index, 2
 gc_xlc_search_index:
@@ -28264,28 +27778,28 @@ gp_blk_info:
 	.zero	8
 	.section	.bss.gp_data_slc_cache_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR90,. + 0
+	.set	.LANCHOR96,. + 0
 	.type	gp_data_slc_cache_head, %object
 	.size	gp_data_slc_cache_head, 8
 gp_data_slc_cache_head:
 	.zero	8
 	.section	.bss.gp_data_slc_data_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR95,. + 0
+	.set	.LANCHOR101,. + 0
 	.type	gp_data_slc_data_head, %object
 	.size	gp_data_slc_data_head, 8
 gp_data_slc_data_head:
 	.zero	8
 	.section	.bss.gp_data_xlc_data_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR92,. + 0
+	.set	.LANCHOR98,. + 0
 	.type	gp_data_xlc_data_head, %object
 	.size	gp_data_xlc_data_head, 8
 gp_data_xlc_data_head:
 	.zero	8
 	.section	.bss.gp_flash_check_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR141,. + 0
+	.set	.LANCHOR142,. + 0
 	.type	gp_flash_check_buf, %object
 	.size	gp_flash_check_buf, 8
 gp_flash_check_buf:
@@ -28299,21 +27813,21 @@ gp_flash_info:
 	.zero	8
 	.section	.bss.gp_free_mix_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR108,. + 0
+	.set	.LANCHOR114,. + 0
 	.type	gp_free_mix_head, %object
 	.size	gp_free_mix_head, 8
 gp_free_mix_head:
 	.zero	8
 	.section	.bss.gp_free_slc_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR104,. + 0
+	.set	.LANCHOR110,. + 0
 	.type	gp_free_slc_head, %object
 	.size	gp_free_slc_head, 8
 gp_free_slc_head:
 	.zero	8
 	.section	.bss.gp_free_xlc_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR106,. + 0
+	.set	.LANCHOR112,. + 0
 	.type	gp_free_xlc_head, %object
 	.size	gp_free_xlc_head, 8
 gp_free_xlc_head:
@@ -28327,7 +27841,7 @@ gp_ftl_ext_info:
 	.zero	8
 	.section	.bss.gp_ftl_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR110,. + 0
+	.set	.LANCHOR69,. + 0
 	.type	gp_ftl_info, %object
 	.size	gp_ftl_info, 8
 gp_ftl_info:
@@ -28355,41 +27869,41 @@ gp_sblk_list_tbl:
 	.zero	8
 	.section	.bss.idb_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR138,. + 0
+	.set	.LANCHOR139,. + 0
 	.type	idb_buf, %object
 	.size	idb_buf, 8
 idb_buf:
 	.zero	8
 	.section	.bss.idb_last_lba,"aw",@nobits
 	.align	2
-	.set	.LANCHOR174,. + 0
+	.set	.LANCHOR175,. + 0
 	.type	idb_last_lba, %object
 	.size	idb_last_lba, 4
 idb_last_lba:
 	.zero	4
 	.section	.bss.idb_need_write_back,"aw",@nobits
 	.align	2
-	.set	.LANCHOR139,. + 0
+	.set	.LANCHOR140,. + 0
 	.type	idb_need_write_back, %object
 	.size	idb_need_write_back, 4
 idb_need_write_back:
 	.zero	4
 	.section	.bss.idb_write_enable,"aw",@nobits
-	.set	.LANCHOR140,. + 0
+	.set	.LANCHOR141,. + 0
 	.type	idb_write_enable, %object
 	.size	idb_write_enable, 1
 idb_write_enable:
 	.zero	1
 	.section	.bss.lpa_hash,"aw",@nobits
 	.align	3
-	.set	.LANCHOR116,. + 0
+	.set	.LANCHOR122,. + 0
 	.type	lpa_hash, %object
 	.size	lpa_hash, 512
 lpa_hash:
 	.zero	512
 	.section	.bss.lpa_hash_index,"aw",@nobits
 	.align	3
-	.set	.LANCHOR118,. + 0
+	.set	.LANCHOR124,. + 0
 	.type	lpa_hash_index, %object
 	.size	lpa_hash_index, 8
 lpa_hash_index:
@@ -28425,21 +27939,21 @@ p_free_buf_head:
 p_read_ahead_ext_buf:
 	.zero	8
 	.section	.bss.pm_first_write,"aw",@nobits
-	.set	.LANCHOR208,. + 0
+	.set	.LANCHOR207,. + 0
 	.type	pm_first_write, %object
 	.size	pm_first_write, 1
 pm_first_write:
 	.zero	1
 	.section	.bss.pm_force_gc,"aw",@nobits
 	.align	2
-	.set	.LANCHOR148,. + 0
+	.set	.LANCHOR149,. + 0
 	.type	pm_force_gc, %object
 	.size	pm_force_gc, 4
 pm_force_gc:
 	.zero	4
 	.section	.bss.pm_gc_enable,"aw",@nobits
 	.align	2
-	.set	.LANCHOR204,. + 0
+	.set	.LANCHOR134,. + 0
 	.type	pm_gc_enable, %object
 	.size	pm_gc_enable, 4
 pm_gc_enable:
@@ -28451,33 +27965,33 @@ pm_gc_enable:
 pm_last_load_ram_id:
 	.zero	1
 	.section	.bss.pm_last_update_ram_id,"aw",@nobits
-	.set	.LANCHOR136,. + 0
+	.set	.LANCHOR137,. + 0
 	.type	pm_last_update_ram_id, %object
 	.size	pm_last_update_ram_id, 1
 pm_last_update_ram_id:
 	.zero	1
 	.section	.bss.pm_ram_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR135,. + 0
+	.set	.LANCHOR136,. + 0
 	.type	pm_ram_info, %object
 	.size	pm_ram_info, 128
 pm_ram_info:
 	.zero	128
 	.section	.bss.read_ahead_lpa,"aw",@nobits
 	.align	2
-	.set	.LANCHOR238,. + 0
+	.set	.LANCHOR226,. + 0
 	.type	read_ahead_lpa, %object
 	.size	read_ahead_lpa, 4
 read_ahead_lpa:
 	.zero	4
 	.section	.bss.read_buf_count,"aw",@nobits
-	.set	.LANCHOR134,. + 0
+	.set	.LANCHOR72,. + 0
 	.type	read_buf_count, %object
 	.size	read_buf_count, 1
 read_buf_count:
 	.zero	1
 	.section	.bss.read_buf_head,"aw",@nobits
-	.set	.LANCHOR133,. + 0
+	.set	.LANCHOR71,. + 0
 	.type	read_buf_head, %object
 	.size	read_buf_head, 1
 read_buf_head:
@@ -28508,14 +28022,14 @@ sblk_write_completed_queue_head:
 	.zero	1
 	.section	.bss.slc_cache_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR99,. + 0
+	.set	.LANCHOR105,. + 0
 	.type	slc_cache_sblk, %object
 	.size	slc_cache_sblk, 2
 slc_cache_sblk:
 	.zero	2
 	.section	.bss.slc_data_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR97,. + 0
+	.set	.LANCHOR103,. + 0
 	.type	slc_data_sblk, %object
 	.size	slc_data_sblk, 2
 slc_data_sblk:
@@ -28533,27 +28047,27 @@ write_buf_count:
 write_buf_head:
 	.zero	1
 	.section	.bss.write_commit_count,"aw",@nobits
-	.set	.LANCHOR129,. + 0
+	.set	.LANCHOR183,. + 0
 	.type	write_commit_count, %object
 	.size	write_commit_count, 1
 write_commit_count:
 	.zero	1
 	.section	.bss.write_commit_head,"aw",@nobits
-	.set	.LANCHOR182,. + 0
+	.set	.LANCHOR184,. + 0
 	.type	write_commit_head, %object
 	.size	write_commit_head, 1
 write_commit_head:
 	.zero	1
 	.section	.bss.xlc_data_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR91,. + 0
+	.set	.LANCHOR97,. + 0
 	.type	xlc_data_sblk, %object
 	.size	xlc_data_sblk, 2
 xlc_data_sblk:
 	.zero	2
 	.section	.bss.zftl_print_list_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR109,. + 0
+	.set	.LANCHOR115,. + 0
 	.type	zftl_print_list_count, %object
 	.size	zftl_print_list_count, 2
 zftl_print_list_count:
@@ -28594,7 +28108,7 @@ g_nand_para_info:
 	.byte	0
 	.section	.data.hy_f26_ref_value,"aw",@progbits
 	.align	3
-	.set	.LANCHOR162,. + 0
+	.set	.LANCHOR163,. + 0
 	.type	hy_f26_ref_value, %object
 	.size	hy_f26_ref_value, 28
 hy_f26_ref_value:
@@ -28628,7 +28142,7 @@ hy_f26_ref_value:
 	.byte	-37
 	.section	.data.nand_opt_para,"aw",@progbits
 	.align	3
-	.set	.LANCHOR215,. + 0
+	.set	.LANCHOR214,. + 0
 	.type	nand_opt_para, %object
 	.size	nand_opt_para, 128
 nand_opt_para:
@@ -29076,7 +28590,7 @@ sd15_tlc_rr:
 	.byte	0
 	.section	.data.tlc_b05a_prog_tbl,"aw",@progbits
 	.align	3
-	.set	.LANCHOR235,. + 0
+	.set	.LANCHOR238,. + 0
 	.type	tlc_b05a_prog_tbl, %object
 	.size	tlc_b05a_prog_tbl, 1536
 tlc_b05a_prog_tbl:
@@ -29850,7 +29364,7 @@ tlc_b05a_prog_tbl:
 	.hword	0
 	.section	.data.tlc_prog_order,"aw",@progbits
 	.align	3
-	.set	.LANCHOR236,. + 0
+	.set	.LANCHOR239,. + 0
 	.type	tlc_prog_order, %object
 	.size	tlc_prog_order, 768
 tlc_prog_order:
@@ -30247,7 +29761,7 @@ zftl_debug:
 	.word	17476
 	.section	.data.zftl_nand_flash_para_tbl,"aw",@progbits
 	.align	3
-	.set	.LANCHOR214,. + 0
+	.set	.LANCHOR213,. + 0
 	.type	zftl_nand_flash_para_tbl, %object
 	.size	zftl_nand_flash_para_tbl, 1568
 zftl_nand_flash_para_tbl:
@@ -31623,467 +31137,467 @@ zftl_nand_flash_para_tbl:
 	.byte	-38
 	.byte	-33
 	.byte	0
-	.section	.rodata.__func__.7124,"a",@progbits
+	.section	.rodata.__func__.7123,"a",@progbits
 	.align	3
-	.set	.LANCHOR170,. + 0
-	.type	__func__.7124, %object
-	.size	__func__.7124, 19
-__func__.7124:
+	.set	.LANCHOR171,. + 0
+	.type	__func__.7123, %object
+	.size	__func__.7123, 19
+__func__.7123:
 	.string	"flash_read_page_en"
-	.section	.rodata.__func__.7185,"a",@progbits
+	.section	.rodata.__func__.7184,"a",@progbits
 	.align	3
-	.set	.LANCHOR186,. + 0
-	.type	__func__.7185, %object
-	.size	__func__.7185, 19
-__func__.7185:
+	.set	.LANCHOR188,. + 0
+	.type	__func__.7184, %object
+	.size	__func__.7184, 19
+__func__.7184:
 	.string	"flash_prog_page_en"
-	.section	.rodata.__func__.7201,"a",@progbits
+	.section	.rodata.__func__.7200,"a",@progbits
 	.align	3
 	.set	.LANCHOR43,. + 0
-	.type	__func__.7201, %object
-	.size	__func__.7201, 26
-__func__.7201:
+	.type	__func__.7200, %object
+	.size	__func__.7200, 26
+__func__.7200:
 	.string	"flash_erase_duplane_block"
-	.section	.rodata.__func__.7212,"a",@progbits
+	.section	.rodata.__func__.7211,"a",@progbits
 	.align	3
 	.set	.LANCHOR45,. + 0
-	.type	__func__.7212, %object
-	.size	__func__.7212, 21
-__func__.7212:
+	.type	__func__.7211, %object
+	.size	__func__.7211, 21
+__func__.7211:
 	.string	"flash_erase_block_en"
-	.section	.rodata.__func__.7226,"a",@progbits
+	.section	.rodata.__func__.7225,"a",@progbits
 	.align	3
 	.set	.LANCHOR28,. + 0
-	.type	__func__.7226, %object
-	.size	__func__.7226, 28
-__func__.7226:
+	.type	__func__.7225, %object
+	.size	__func__.7225, 28
+__func__.7225:
 	.string	"flash_wait_device_ready_raw"
-	.section	.rodata.__func__.7250,"a",@progbits
+	.section	.rodata.__func__.7249,"a",@progbits
 	.align	3
-	.set	.LANCHOR175,. + 0
-	.type	__func__.7250, %object
-	.size	__func__.7250, 26
-__func__.7250:
+	.set	.LANCHOR176,. + 0
+	.type	__func__.7249, %object
+	.size	__func__.7249, 26
+__func__.7249:
 	.string	"flash_start_tlc_page_prog"
-	.section	.rodata.__func__.7261,"a",@progbits
+	.section	.rodata.__func__.7260,"a",@progbits
 	.align	3
-	.set	.LANCHOR176,. + 0
-	.type	__func__.7261, %object
-	.size	__func__.7261, 29
-__func__.7261:
+	.set	.LANCHOR177,. + 0
+	.type	__func__.7260, %object
+	.size	__func__.7260, 29
+__func__.7260:
 	.string	"flash_start_3d_mlc_page_prog"
-	.section	.rodata.__func__.7279,"a",@progbits
+	.section	.rodata.__func__.7278,"a",@progbits
 	.align	3
-	.set	.LANCHOR177,. + 0
-	.type	__func__.7279, %object
-	.size	__func__.7279, 22
-__func__.7279:
+	.set	.LANCHOR178,. + 0
+	.type	__func__.7278, %object
+	.size	__func__.7278, 22
+__func__.7278:
 	.string	"flash_start_page_prog"
-	.section	.rodata.__func__.7290,"a",@progbits
+	.section	.rodata.__func__.7289,"a",@progbits
 	.align	3
 	.set	.LANCHOR34,. + 0
-	.type	__func__.7290, %object
-	.size	__func__.7290, 22
-__func__.7290:
+	.type	__func__.7289, %object
+	.size	__func__.7289, 22
+__func__.7289:
 	.string	"flash_start_page_read"
-	.section	.rodata.__func__.7303,"a",@progbits
+	.section	.rodata.__func__.7302,"a",@progbits
 	.align	3
-	.set	.LANCHOR178,. + 0
-	.type	__func__.7303, %object
-	.size	__func__.7303, 31
-__func__.7303:
+	.set	.LANCHOR179,. + 0
+	.type	__func__.7302, %object
+	.size	__func__.7302, 31
+__func__.7302:
 	.string	"flash_complete_plane_page_read"
-	.section	.rodata.__func__.7315,"a",@progbits
+	.section	.rodata.__func__.7314,"a",@progbits
 	.align	3
 	.set	.LANCHOR46,. + 0
-	.type	__func__.7315, %object
-	.size	__func__.7315, 23
-__func__.7315:
+	.type	__func__.7314, %object
+	.size	__func__.7314, 23
+__func__.7314:
 	.string	"flash_start_plane_read"
-	.section	.rodata.__func__.7328,"a",@progbits
+	.section	.rodata.__func__.7327,"a",@progbits
 	.align	3
-	.set	.LANCHOR179,. + 0
-	.type	__func__.7328, %object
-	.size	__func__.7328, 25
-__func__.7328:
+	.set	.LANCHOR180,. + 0
+	.type	__func__.7327, %object
+	.size	__func__.7327, 25
+__func__.7327:
 	.string	"flash_complete_page_read"
-	.section	.rodata.__func__.7743,"a",@progbits
+	.section	.rodata.__func__.7742,"a",@progbits
 	.align	3
-	.set	.LANCHOR143,. + 0
-	.type	__func__.7743, %object
-	.size	__func__.7743, 20
-__func__.7743:
+	.set	.LANCHOR144,. + 0
+	.type	__func__.7742, %object
+	.size	__func__.7742, 20
+__func__.7742:
 	.string	"flash_die_info_init"
-	.section	.rodata.__func__.7754,"a",@progbits
+	.section	.rodata.__func__.7753,"a",@progbits
 	.align	3
 	.set	.LANCHOR20,. + 0
-	.type	__func__.7754, %object
-	.size	__func__.7754, 22
-__func__.7754:
+	.type	__func__.7753, %object
+	.size	__func__.7753, 22
+__func__.7753:
 	.string	"nand_flash_print_info"
-	.section	.rodata.__func__.7803,"a",@progbits
+	.section	.rodata.__func__.7802,"a",@progbits
 	.align	3
-	.set	.LANCHOR213,. + 0
-	.type	__func__.7803, %object
-	.size	__func__.7803, 16
-__func__.7803:
+	.set	.LANCHOR212,. + 0
+	.type	__func__.7802, %object
+	.size	__func__.7802, 16
+__func__.7802:
 	.string	"nand_flash_init"
-	.section	.rodata.__func__.7826,"a",@progbits
+	.section	.rodata.__func__.7825,"a",@progbits
 	.align	3
-	.set	.LANCHOR155,. + 0
-	.type	__func__.7826, %object
-	.size	__func__.7826, 11
-__func__.7826:
+	.set	.LANCHOR156,. + 0
+	.type	__func__.7825, %object
+	.size	__func__.7825, 11
+__func__.7825:
 	.string	"nandc_init"
-	.section	.rodata.__func__.7991,"a",@progbits
+	.section	.rodata.__func__.7990,"a",@progbits
 	.align	3
 	.set	.LANCHOR58,. + 0
-	.type	__func__.7991, %object
-	.size	__func__.7991, 13
-__func__.7991:
+	.type	__func__.7990, %object
+	.size	__func__.7990, 13
+__func__.7990:
 	.string	"buf_add_tail"
-	.section	.rodata.__func__.8004,"a",@progbits
+	.section	.rodata.__func__.8003,"a",@progbits
 	.align	3
 	.set	.LANCHOR60,. + 0
-	.type	__func__.8004, %object
-	.size	__func__.8004, 10
-__func__.8004:
+	.type	__func__.8003, %object
+	.size	__func__.8003, 10
+__func__.8003:
 	.string	"buf_alloc"
-	.section	.rodata.__func__.8018,"a",@progbits
+	.section	.rodata.__func__.8017,"a",@progbits
 	.align	3
 	.set	.LANCHOR61,. + 0
-	.type	__func__.8018, %object
-	.size	__func__.8018, 16
-__func__.8018:
+	.type	__func__.8017, %object
+	.size	__func__.8017, 16
+__func__.8017:
 	.string	"buf_remove_free"
-	.section	.rodata.__func__.8039,"a",@progbits
+	.section	.rodata.__func__.8038,"a",@progbits
 	.align	3
-	.set	.LANCHOR212,. + 0
-	.type	__func__.8039, %object
-	.size	__func__.8039, 20
-__func__.8039:
+	.set	.LANCHOR211,. + 0
+	.type	__func__.8038, %object
+	.size	__func__.8038, 20
+__func__.8038:
 	.string	"flash_info_blk_init"
-	.section	.rodata.__func__.8054,"a",@progbits
+	.section	.rodata.__func__.8053,"a",@progbits
 	.align	3
-	.set	.LANCHOR154,. + 0
-	.type	__func__.8054, %object
-	.size	__func__.8054, 21
-__func__.8054:
+	.set	.LANCHOR155,. + 0
+	.type	__func__.8053, %object
+	.size	__func__.8053, 21
+__func__.8053:
 	.string	"flash_info_data_init"
-	.section	.rodata.__func__.8076,"a",@progbits
+	.section	.rodata.__func__.8075,"a",@progbits
 	.align	3
-	.set	.LANCHOR209,. + 0
-	.type	__func__.8076, %object
-	.size	__func__.8076, 17
-__func__.8076:
+	.set	.LANCHOR208,. + 0
+	.type	__func__.8075, %object
+	.size	__func__.8075, 17
+__func__.8075:
 	.string	"flash_info_flush"
-	.section	.rodata.__func__.8152,"a",@progbits
+	.section	.rodata.__func__.8151,"a",@progbits
 	.align	3
-	.set	.LANCHOR147,. + 0
-	.type	__func__.8152, %object
-	.size	__func__.8152, 17
-__func__.8152:
+	.set	.LANCHOR148,. + 0
+	.type	__func__.8151, %object
+	.size	__func__.8151, 17
+__func__.8151:
 	.string	"lpa_rebuild_hash"
-	.section	.rodata.__func__.8202,"a",@progbits
+	.section	.rodata.__func__.8198,"a",@progbits
 	.align	3
-	.set	.LANCHOR232,. + 0
-	.type	__func__.8202, %object
-	.size	__func__.8202, 17
-__func__.8202:
+	.set	.LANCHOR235,. + 0
+	.type	__func__.8198, %object
+	.size	__func__.8198, 17
+__func__.8198:
 	.string	"ftl_write_commit"
-	.section	.rodata.__func__.8220,"a",@progbits
+	.section	.rodata.__func__.8216,"a",@progbits
 	.align	3
-	.set	.LANCHOR130,. + 0
-	.type	__func__.8220, %object
-	.size	__func__.8220, 14
-__func__.8220:
+	.set	.LANCHOR67,. + 0
+	.type	__func__.8216, %object
+	.size	__func__.8216, 14
+__func__.8216:
 	.string	"ftl_write_buf"
-	.section	.rodata.__func__.8265,"a",@progbits
+	.section	.rodata.__func__.8258,"a",@progbits
 	.align	3
-	.set	.LANCHOR132,. + 0
-	.type	__func__.8265, %object
-	.size	__func__.8265, 18
-__func__.8265:
+	.set	.LANCHOR70,. + 0
+	.type	__func__.8258, %object
+	.size	__func__.8258, 18
+__func__.8258:
 	.string	"zftl_add_read_buf"
-	.section	.rodata.__func__.8298,"a",@progbits
+	.section	.rodata.__func__.8291,"a",@progbits
 	.align	3
-	.set	.LANCHOR230,. + 0
-	.type	__func__.8298, %object
-	.size	__func__.8298, 10
-__func__.8298:
+	.set	.LANCHOR233,. + 0
+	.type	__func__.8291, %object
+	.size	__func__.8291, 10
+__func__.8291:
 	.string	"zftl_read"
-	.section	.rodata.__func__.8330,"a",@progbits
+	.section	.rodata.__func__.8323,"a",@progbits
 	.align	3
 	.set	.LANCHOR242,. + 0
-	.type	__func__.8330, %object
-	.size	__func__.8330, 13
-__func__.8330:
+	.type	__func__.8323, %object
+	.size	__func__.8323, 13
+__func__.8323:
 	.string	"_ftl_discard"
-	.section	.rodata.__func__.8476,"a",@progbits
+	.section	.rodata.__func__.8469,"a",@progbits
 	.align	3
 	.set	.LANCHOR225,. + 0
-	.type	__func__.8476, %object
-	.size	__func__.8476, 12
-__func__.8476:
+	.type	__func__.8469, %object
+	.size	__func__.8469, 12
+__func__.8469:
 	.string	"gc_recovery"
-	.section	.rodata.__func__.8486,"a",@progbits
+	.section	.rodata.__func__.8479,"a",@progbits
 	.align	3
-	.set	.LANCHOR71,. + 0
-	.type	__func__.8486, %object
-	.size	__func__.8486, 12
-__func__.8486:
+	.set	.LANCHOR77,. + 0
+	.type	__func__.8479, %object
+	.size	__func__.8479, 12
+__func__.8479:
 	.string	"gc_add_sblk"
-	.section	.rodata.__func__.8533,"a",@progbits
+	.section	.rodata.__func__.8526,"a",@progbits
 	.align	3
-	.set	.LANCHOR185,. + 0
-	.type	__func__.8533, %object
-	.size	__func__.8533, 21
-__func__.8533:
+	.set	.LANCHOR187,. + 0
+	.type	__func__.8526, %object
+	.size	__func__.8526, 21
+__func__.8526:
 	.string	"gc_check_data_one_wl"
-	.section	.rodata.__func__.8565,"a",@progbits
+	.section	.rodata.__func__.8558,"a",@progbits
 	.align	3
-	.set	.LANCHOR226,. + 0
-	.type	__func__.8565, %object
-	.size	__func__.8565, 22
-__func__.8565:
+	.set	.LANCHOR229,. + 0
+	.type	__func__.8558, %object
+	.size	__func__.8558, 22
+__func__.8558:
 	.string	"gc_update_l2p_map_new"
-	.section	.rodata.__func__.8578,"a",@progbits
+	.section	.rodata.__func__.8571,"a",@progbits
 	.align	3
-	.set	.LANCHOR77,. + 0
-	.type	__func__.8578, %object
-	.size	__func__.8578, 19
-__func__.8578:
+	.set	.LANCHOR83,. + 0
+	.type	__func__.8571, %object
+	.size	__func__.8571, 19
+__func__.8571:
 	.string	"gc_write_completed"
-	.section	.rodata.__func__.8608,"a",@progbits
+	.section	.rodata.__func__.8601,"a",@progbits
 	.align	3
-	.set	.LANCHOR234,. + 0
-	.type	__func__.8608, %object
-	.size	__func__.8608, 16
-__func__.8608:
+	.set	.LANCHOR237,. + 0
+	.type	__func__.8601, %object
+	.size	__func__.8601, 16
+__func__.8601:
 	.string	"gc_do_copy_back"
-	.section	.rodata.__func__.8635,"a",@progbits
+	.section	.rodata.__func__.8628,"a",@progbits
 	.align	3
-	.set	.LANCHOR127,. + 0
-	.type	__func__.8635, %object
-	.size	__func__.8635, 16
-__func__.8635:
+	.set	.LANCHOR133,. + 0
+	.type	__func__.8628, %object
+	.size	__func__.8628, 16
+__func__.8628:
 	.string	"gc_free_src_blk"
-	.section	.rodata.__func__.8679,"a",@progbits
+	.section	.rodata.__func__.8672,"a",@progbits
 	.align	3
-	.set	.LANCHOR227,. + 0
-	.type	__func__.8679, %object
-	.size	__func__.8679, 16
-__func__.8679:
+	.set	.LANCHOR230,. + 0
+	.type	__func__.8672, %object
+	.size	__func__.8672, 16
+__func__.8672:
 	.string	"gc_scan_src_blk"
-	.section	.rodata.__func__.8740,"a",@progbits
+	.section	.rodata.__func__.8733,"a",@progbits
 	.align	3
-	.set	.LANCHOR228,. + 0
-	.type	__func__.8740, %object
-	.size	__func__.8740, 20
-__func__.8740:
+	.set	.LANCHOR231,. + 0
+	.type	__func__.8733, %object
+	.size	__func__.8733, 20
+__func__.8733:
 	.string	"gc_scan_static_data"
-	.section	.rodata.__func__.8834,"a",@progbits
+	.section	.rodata.__func__.8827,"a",@progbits
 	.align	3
-	.set	.LANCHOR237,. + 0
-	.type	__func__.8834, %object
-	.size	__func__.8834, 11
-__func__.8834:
+	.set	.LANCHOR240,. + 0
+	.type	__func__.8827, %object
+	.size	__func__.8827, 11
+__func__.8827:
 	.string	"zftl_do_gc"
-	.section	.rodata.__func__.8929,"a",@progbits
+	.section	.rodata.__func__.8922,"a",@progbits
 	.align	3
 	.set	.LANCHOR5,. + 0
-	.type	__func__.8929, %object
-	.size	__func__.8929, 18
-__func__.8929:
+	.type	__func__.8922, %object
+	.size	__func__.8922, 18
+__func__.8922:
 	.string	"_list_remove_node"
-	.section	.rodata.__func__.8954,"a",@progbits
+	.section	.rodata.__func__.8947,"a",@progbits
 	.align	3
 	.set	.LANCHOR13,. + 0
-	.type	__func__.8954, %object
-	.size	__func__.8954, 23
-__func__.8954:
+	.type	__func__.8947, %object
+	.size	__func__.8947, 23
+__func__.8947:
 	.string	"_list_update_data_list"
-	.section	.rodata.__func__.9029,"a",@progbits
+	.section	.rodata.__func__.9022,"a",@progbits
 	.align	3
-	.set	.LANCHOR151,. + 0
-	.type	__func__.9029, %object
-	.size	__func__.9029, 20
-__func__.9029:
+	.set	.LANCHOR152,. + 0
+	.type	__func__.9022, %object
+	.size	__func__.9022, 20
+__func__.9022:
 	.string	"zftl_sblk_list_init"
-	.section	.rodata.__func__.9063,"a",@progbits
+	.section	.rodata.__func__.9056,"a",@progbits
 	.align	3
-	.set	.LANCHOR193,. + 0
-	.type	__func__.9063, %object
-	.size	__func__.9063, 15
-__func__.9063:
+	.set	.LANCHOR195,. + 0
+	.type	__func__.9056, %object
+	.size	__func__.9056, 15
+__func__.9056:
 	.string	"ftl_info_flush"
-	.section	.rodata.__func__.9118,"a",@progbits
+	.section	.rodata.__func__.9091,"a",@progbits
 	.align	3
-	.set	.LANCHOR200,. + 0
-	.type	__func__.9118, %object
-	.size	__func__.9118, 15
-__func__.9118:
+	.set	.LANCHOR116,. + 0
+	.type	__func__.9091, %object
+	.size	__func__.9091, 15
+__func__.9091:
 	.string	"ftl_alloc_sblk"
-	.section	.rodata.__func__.9160,"a",@progbits
+	.section	.rodata.__func__.9132,"a",@progbits
 	.align	3
-	.set	.LANCHOR113,. + 0
-	.type	__func__.9160, %object
-	.size	__func__.9160, 18
-__func__.9160:
+	.set	.LANCHOR119,. + 0
+	.type	__func__.9132, %object
+	.size	__func__.9132, 18
+__func__.9132:
 	.string	"ftl_alloc_sys_blk"
-	.section	.rodata.__func__.9170,"a",@progbits
+	.section	.rodata.__func__.9142,"a",@progbits
 	.align	3
-	.set	.LANCHOR114,. + 0
-	.type	__func__.9170, %object
-	.size	__func__.9170, 17
-__func__.9170:
+	.set	.LANCHOR120,. + 0
+	.type	__func__.9142, %object
+	.size	__func__.9142, 17
+__func__.9142:
 	.string	"ftl_free_sys_blk"
-	.section	.rodata.__func__.9205,"a",@progbits
+	.section	.rodata.__func__.9177,"a",@progbits
 	.align	3
-	.set	.LANCHOR229,. + 0
-	.type	__func__.9205, %object
-	.size	__func__.9205, 14
-__func__.9205:
+	.set	.LANCHOR232,. + 0
+	.type	__func__.9177, %object
+	.size	__func__.9177, 14
+__func__.9177:
 	.string	"ftl_sblk_dump"
-	.section	.rodata.__func__.9229,"a",@progbits
+	.section	.rodata.__func__.9201,"a",@progbits
 	.align	3
-	.set	.LANCHOR218,. + 0
-	.type	__func__.9229, %object
-	.size	__func__.9229, 16
-__func__.9229:
+	.set	.LANCHOR217,. + 0
+	.type	__func__.9201, %object
+	.size	__func__.9201, 16
+__func__.9201:
 	.string	"ftl_sysblk_dump"
-	.section	.rodata.__func__.9254,"a",@progbits
+	.section	.rodata.__func__.9226,"a",@progbits
 	.align	3
-	.set	.LANCHOR219,. + 0
-	.type	__func__.9254, %object
-	.size	__func__.9254, 23
-__func__.9254:
+	.set	.LANCHOR218,. + 0
+	.type	__func__.9226, %object
+	.size	__func__.9226, 23
+__func__.9226:
 	.string	"ftl_open_sblk_recovery"
-	.section	.rodata.__func__.9287,"a",@progbits
+	.section	.rodata.__func__.9259,"a",@progbits
 	.align	3
-	.set	.LANCHOR115,. + 0
-	.type	__func__.9287, %object
-	.size	__func__.9287, 23
-__func__.9287:
+	.set	.LANCHOR121,. + 0
+	.type	__func__.9259, %object
+	.size	__func__.9259, 23
+__func__.9259:
 	.string	"ftl_get_ppa_from_index"
-	.section	.rodata.__func__.9308,"a",@progbits
+	.section	.rodata.__func__.9280,"a",@progbits
 	.align	3
-	.set	.LANCHOR231,. + 0
-	.type	__func__.9308, %object
-	.size	__func__.9308, 19
-__func__.9308:
+	.set	.LANCHOR234,. + 0
+	.type	__func__.9280, %object
+	.size	__func__.9280, 19
+__func__.9280:
 	.string	"ftl_update_l2p_map"
-	.section	.rodata.__func__.9327,"a",@progbits
+	.section	.rodata.__func__.9299,"a",@progbits
 	.align	3
-	.set	.LANCHOR119,. + 0
-	.type	__func__.9327, %object
-	.size	__func__.9327, 22
-__func__.9327:
+	.set	.LANCHOR125,. + 0
+	.type	__func__.9299, %object
+	.size	__func__.9299, 22
+__func__.9299:
 	.string	"ftl_get_new_free_page"
-	.section	.rodata.__func__.9338,"a",@progbits
+	.section	.rodata.__func__.9310,"a",@progbits
 	.align	3
-	.set	.LANCHOR120,. + 0
-	.type	__func__.9338, %object
-	.size	__func__.9338, 22
-__func__.9338:
+	.set	.LANCHOR126,. + 0
+	.type	__func__.9310, %object
+	.size	__func__.9310, 22
+__func__.9310:
 	.string	"ftl_ext_alloc_new_blk"
-	.section	.rodata.__func__.9364,"a",@progbits
+	.section	.rodata.__func__.9336,"a",@progbits
 	.align	3
-	.set	.LANCHOR198,. + 0
-	.type	__func__.9364, %object
-	.size	__func__.9364, 19
-__func__.9364:
+	.set	.LANCHOR200,. + 0
+	.type	__func__.9336, %object
+	.size	__func__.9336, 19
+__func__.9336:
 	.string	"ftl_ext_info_flush"
-	.section	.rodata.__func__.9376,"a",@progbits
+	.section	.rodata.__func__.9348,"a",@progbits
 	.align	3
-	.set	.LANCHOR199,. + 0
-	.type	__func__.9376, %object
-	.size	__func__.9376, 18
-__func__.9376:
+	.set	.LANCHOR201,. + 0
+	.type	__func__.9348, %object
+	.size	__func__.9348, 18
+__func__.9348:
 	.string	"ftl_ext_info_init"
-	.section	.rodata.__func__.9415,"a",@progbits
+	.section	.rodata.__func__.9387,"a",@progbits
 	.align	3
-	.set	.LANCHOR201,. + 0
-	.type	__func__.9415, %object
-	.size	__func__.9415, 25
-__func__.9415:
+	.set	.LANCHOR202,. + 0
+	.type	__func__.9387, %object
+	.size	__func__.9387, 25
+__func__.9387:
 	.string	"ftl_low_format_data_init"
-	.section	.rodata.__func__.9430,"a",@progbits
+	.section	.rodata.__func__.9402,"a",@progbits
 	.align	3
-	.set	.LANCHOR203,. + 0
-	.type	__func__.9430, %object
-	.size	__func__.9430, 15
-__func__.9430:
+	.set	.LANCHOR204,. + 0
+	.type	__func__.9402, %object
+	.size	__func__.9402, 15
+__func__.9402:
 	.string	"ftl_low_format"
-	.section	.rodata.__func__.9478,"a",@progbits
+	.section	.rodata.__func__.9450,"a",@progbits
 	.align	3
-	.set	.LANCHOR189,. + 0
-	.type	__func__.9478, %object
-	.size	__func__.9478, 14
-__func__.9478:
+	.set	.LANCHOR191,. + 0
+	.type	__func__.9450, %object
+	.size	__func__.9450, 14
+__func__.9450:
 	.string	"ftl_prog_page"
-	.section	.rodata.__func__.9601,"a",@progbits
+	.section	.rodata.__func__.9569,"a",@progbits
 	.align	3
-	.set	.LANCHOR180,. + 0
-	.type	__func__.9601, %object
-	.size	__func__.9601, 31
-__func__.9601:
+	.set	.LANCHOR181,. + 0
+	.type	__func__.9569, %object
+	.size	__func__.9569, 31
+__func__.9569:
 	.string	"queue_wait_first_req_completed"
-	.section	.rodata.__func__.9655,"a",@progbits
+	.section	.rodata.__func__.9623,"a",@progbits
 	.align	3
-	.set	.LANCHOR181,. + 0
-	.type	__func__.9655, %object
-	.size	__func__.9655, 15
-__func__.9655:
+	.set	.LANCHOR182,. + 0
+	.type	__func__.9623, %object
+	.size	__func__.9623, 15
+__func__.9623:
 	.string	"sblk_prog_page"
-	.section	.rodata.__func__.9682,"a",@progbits
+	.section	.rodata.__func__.9650,"a",@progbits
 	.align	3
-	.set	.LANCHOR184,. + 0
-	.type	__func__.9682, %object
-	.size	__func__.9682, 15
-__func__.9682:
+	.set	.LANCHOR186,. + 0
+	.type	__func__.9650, %object
+	.size	__func__.9650, 15
+__func__.9650:
 	.string	"sblk_read_page"
-	.section	.rodata.__func__.9752,"a",@progbits
+	.section	.rodata.__func__.9720,"a",@progbits
 	.align	3
 	.set	.LANCHOR220,. + 0
-	.type	__func__.9752, %object
-	.size	__func__.9752, 16
-__func__.9752:
+	.type	__func__.9720, %object
+	.size	__func__.9720, 16
+__func__.9720:
 	.string	"load_l2p_region"
-	.section	.rodata.__func__.9768,"a",@progbits
+	.section	.rodata.__func__.9736,"a",@progbits
 	.align	3
-	.set	.LANCHOR153,. + 0
-	.type	__func__.9768, %object
-	.size	__func__.9768, 13
-__func__.9768:
+	.set	.LANCHOR154,. + 0
+	.type	__func__.9736, %object
+	.size	__func__.9736, 13
+__func__.9736:
 	.string	"pm_free_sblk"
-	.section	.rodata.__func__.9792,"a",@progbits
+	.section	.rodata.__func__.9760,"a",@progbits
 	.align	3
 	.set	.LANCHOR222,. + 0
-	.type	__func__.9792, %object
-	.size	__func__.9792, 6
-__func__.9792:
+	.type	__func__.9760, %object
+	.size	__func__.9760, 6
+__func__.9760:
 	.string	"pm_gc"
-	.section	.rodata.__func__.9808,"a",@progbits
+	.section	.rodata.__func__.9776,"a",@progbits
 	.align	3
-	.set	.LANCHOR205,. + 0
-	.type	__func__.9808, %object
-	.size	__func__.9808, 17
-__func__.9808:
+	.set	.LANCHOR135,. + 0
+	.type	__func__.9776, %object
+	.size	__func__.9776, 17
+__func__.9776:
 	.string	"pm_alloc_new_blk"
-	.section	.rodata.__func__.9818,"a",@progbits
+	.section	.rodata.__func__.9786,"a",@progbits
 	.align	3
-	.set	.LANCHOR206,. + 0
-	.type	__func__.9818, %object
-	.size	__func__.9818, 14
-__func__.9818:
+	.set	.LANCHOR205,. + 0
+	.type	__func__.9786, %object
+	.size	__func__.9786, 14
+__func__.9786:
 	.string	"pm_write_page"
-	.section	.rodata.__func__.9836,"a",@progbits
+	.section	.rodata.__func__.9804,"a",@progbits
 	.align	3
-	.set	.LANCHOR137,. + 0
-	.type	__func__.9836, %object
-	.size	__func__.9836, 21
-__func__.9836:
+	.set	.LANCHOR138,. + 0
+	.type	__func__.9804, %object
+	.size	__func__.9804, 21
+__func__.9804:
 	.string	"pm_select_ram_region"
 	.section	.rodata._list_remove_node.str1.1,"aMS",@progbits,1
 .LC0:
@@ -32103,53 +31617,30 @@ __func__.9836:
 	.string	"free_buf_count = %d\n"
 .LC47:
 	.string	"buf = %d, next=%d, flag=%d gc_write_flag=%d, lun_state=%d, op_status = %d lpa=%x, ppa=%x\n"
-	.section	.rodata.dump_ftl_info.str1.1,"aMS",@progbits,1
-.LC192:
-	.string	"free_buf_count: %d\n"
-.LC193:
-	.string	"g_ftl_info_blk blk:0x%x, index:0x%x, page:0x%x\n"
-.LC194:
-	.string	"ftl_ext_info_blk blk:0x%x, page:0x%x\n"
-.LC195:
-	.string	"ac_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC196:
-	.string	"tmp_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC197:
-	.string	"gc_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC198:
-	.string	"lpa:"
-.LC199:
-	.string	"vpn:"
-.LC200:
-	.string	"sblk:"
-.LC201:
-	.string	"lpa_hash:"
-.LC202:
-	.string	"lpa_hash_index:"
 	.section	.rodata.dump_pm_blk.str1.1,"aMS",@progbits,1
-.LC257:
+.LC237:
 	.string	"pm l2p:"
-.LC258:
+.LC238:
 	.string	"pm blk:"
 	.section	.rodata.dump_sblk_queue.str1.1,"aMS",@progbits,1
-.LC79:
+.LC73:
 	.string	"dump_sblk_queue: %d\n"
-.LC80:
+.LC74:
 	.string	"buf id= %d state = %d ppa = %x\n"
 	.section	.rodata.flash_complete_page_read.str1.1,"aMS",@progbits,1
-.LC136:
+.LC133:
 	.string	"flash_complete_page_read %x %x error_ecc %d %d\n"
 	.section	.rodata.flash_ddr_tuning_read.str1.1,"aMS",@progbits,1
-.LC122:
+.LC119:
 	.string	"%d flash_ddr_tuning_read %x ecc=%d\n"
-.LC123:
+.LC120:
 	.string	"sync para %d\n"
-.LC124:
+.LC121:
 	.string	"DDR mode Read error %x %x\n"
-.LC125:
+.LC122:
 	.string	"SDR mode Read %x %x ecc:%x\n"
 	.section	.rodata.flash_dual_page_prog.str1.1,"aMS",@progbits,1
-.LC130:
+.LC127:
 	.string	"flash_prog_page %x %x %x\n"
 	.section	.rodata.flash_erase_all.str1.1,"aMS",@progbits,1
 .LC35:
@@ -32165,41 +31656,41 @@ __func__.9836:
 .LC32:
 	.string	"flash_erase_duplane_block pageadd = %x status = %x\n"
 	.section	.rodata.flash_get_last_written_page.str1.1,"aMS",@progbits,1
-.LC128:
+.LC125:
 	.string	"flash_get_last_written_page: %x %x %x\n"
 	.section	.rodata.flash_info_blk_init.str1.1,"aMS",@progbits,1
-.LC177:
+.LC169:
 	.string	"...%d @ %s %d %p\n"
-.LC178:
+.LC170:
 	.string	"no sys info %x\n"
 	.section	.rodata.flash_info_data_init.str1.1,"aMS",@progbits,1
-.LC94:
+.LC91:
 	.string	"...%d @ %s\n"
 	.section	.rodata.flash_info_flush.str1.1,"aMS",@progbits,1
-.LC174:
+.LC166:
 	.string	"finfo:"
-.LC175:
+.LC167:
 	.string	"flash_info_flush id = %x, page = %x\n"
-.LC176:
+.LC168:
 	.string	"sys_info_flush error:%x\n"
 	.section	.rodata.flash_mask_bad_block.str1.1,"aMS",@progbits,1
 .LC48:
 	.string	"flash_mask_bad_block %d %d\n"
 	.section	.rodata.flash_prog_page.str1.1,"aMS",@progbits,1
-.LC129:
+.LC126:
 	.string	"flash_prog_page page_addr = %x status = %x\n"
 	.section	.rodata.flash_prog_page_en.str1.1,"aMS",@progbits,1
-.LC144:
+.LC141:
 	.string	"flash_prog_page_en:%x %x %x\n"
-.LC145:
+.LC142:
 	.string	"w d:"
-.LC146:
+.LC143:
 	.string	"w s:"
-.LC147:
+.LC144:
 	.string	"spare"
-.LC148:
+.LC145:
 	.string	"data"
-.LC149:
+.LC146:
 	.string	"write error: %x\n"
 	.section	.rodata.flash_read_id.str1.1,"aMS",@progbits,1
 .LC38:
@@ -32208,9 +31699,9 @@ __func__.9836:
 .LC39:
 	.string	"otp:%x %x %x %x\n"
 	.section	.rodata.flash_read_page_en.str1.1,"aMS",@progbits,1
-.LC126:
+.LC123:
 	.string	"flash_read_page_en %x %x %x %x\n"
-.LC127:
+.LC124:
 	.string	"flash_read_page_en %x %x error_ecc %d %d\n"
 	.section	.rodata.flash_set_interface_mode.str1.1,"aMS",@progbits,1
 .LC36:
@@ -32218,124 +31709,113 @@ __func__.9836:
 .LC37:
 	.string	"nand ddr mode %x\n"
 	.section	.rodata.ftl_alloc_new_data_sblk.str1.1,"aMS",@progbits,1
-.LC235:
+.LC228:
 	.string	"error gc_add_sblk: %x\n"
-	.section	.rodata.ftl_alloc_sblk.str1.1,"aMS",@progbits,1
-.LC167:
-	.string	"alloc sblk %x %d\n"
 	.section	.rodata.ftl_dump_write_open_sblk.str1.1,"aMS",@progbits,1
-.LC159:
-	.string	"ftl_sblk_dump_write = %x %d %d %d %d\n"
 .LC160:
-	.string	"blk= %x, page=%x, ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
+	.string	"ftl_sblk_dump_write = %x %d %d %d %d\n"
 .LC161:
-	.string	"ftl_sblk_dump_write2 = %x %d %d %d\n"
+	.string	"blk= %x, page=%x, ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
 .LC162:
-	.string	"ftl_sblk_dump_write = %x %x\n"
+	.string	"ftl_sblk_dump_write2 = %x %d %d %d\n"
 .LC163:
+	.string	"ftl_sblk_dump_write = %x %x\n"
+.LC164:
 	.string	"ftl_sblk_dump_write done = %x\n"
 	.section	.rodata.ftl_ext_info_init.str1.1,"aMS",@progbits,1
-.LC156:
+.LC153:
 	.string	"%s %d %d %x %x\n"
-.LC157:
+.LC154:
 	.string	"ext info hash %x error\n"
-.LC158:
+.LC155:
 	.string	"%s %x %x %x\n"
 	.section	.rodata.ftl_free_sblk.str1.1,"aMS",@progbits,1
-.LC68:
+.LC70:
 	.string	"swl_slc_free_mini_ec_blk sblk %x\n"
 	.section	.rodata.ftl_info_blk_init.str1.1,"aMS",@progbits,1
-.LC152:
+.LC149:
 	.string	"%d %x @%d %x\n"
-.LC153:
+.LC150:
 	.string	"ftl_info_blk_init %d %d %x\n"
-.LC154:
+.LC151:
 	.string	"ftl info hash %x error\n"
-.LC155:
+.LC152:
 	.string	"ink flag: %x\n"
 	.section	.rodata.ftl_info_flush.str1.1,"aMS",@progbits,1
-.LC151:
+.LC148:
 	.string	"g_ftl_info_blk blk = %x, page = %x version = %d\n"
-	.section	.rodata.ftl_ink_check_sblk.str1.1,"aMS",@progbits,1
-.LC165:
-	.string	"ftl_ink_check_sblk = %x %d %d\n"
-.LC166:
-	.string	"ftl_ink_check_sblk = %x %d %d end\n"
 	.section	.rodata.ftl_low_format.str1.1,"aMS",@progbits,1
-.LC169:
+.LC156:
 	.string	"ftl_low_format %d\n"
-.LC170:
+.LC157:
 	.string	"low format %d %d %d %d\n"
 	.section	.rodata.ftl_mask_bad_block.str1.1,"aMS",@progbits,1
-.LC66:
+.LC68:
 	.string	"mask bad block:cs %x %x block: %x %x\n"
-	.section	.rodata.ftl_open_sblk_init.str1.1,"aMS",@progbits,1
-.LC168:
-	.string	"blk %x is bad block\n"
 	.section	.rodata.ftl_open_sblk_recovery.str1.1,"aMS",@progbits,1
-.LC180:
+.LC172:
 	.string	"saved_active_page  = %x\n"
-.LC181:
+.LC173:
 	.string	"saved_active_plane = %x\n"
-.LC182:
+.LC174:
 	.string	"sblk = %x\n"
-.LC183:
+.LC175:
 	.string	"phy_blk = %x %x\n"
-.LC184:
+.LC176:
 	.string	"num_planes = %x\n"
-.LC185:
+.LC177:
 	.string	"recovery blk=%x, page=%x, ppa = %x, status = %x, hash:%x\n"
-.LC186:
+.LC178:
 	.string	"data:"
-.LC187:
+.LC179:
 	.string	"sblk = %x, vpn0 = %d, vpn1 = %d\n"
-.LC188:
+.LC180:
 	.string	"dump_write_lpa = %x %x %x %x\n"
-.LC189:
+.LC181:
 	.string	"dump write new ppa = %x, last ppa = %x lpa = %x\n"
-.LC190:
+.LC182:
 	.string	"dump write = %x %x %x\n"
-.LC191:
+.LC183:
 	.string	"dump write hash update = %x %x %x\n"
 	.section	.rodata.ftl_re_low_format.str1.1,"aMS",@progbits,1
-.LC171:
+.LC158:
 	.string	"re low format %d\n"
 	.section	.rodata.ftl_sblk_dump.str1.1,"aMS",@progbits,1
-.LC223:
+.LC216:
 	.string	"ftl_sblk_dump = %x %d %d %d %d\n"
-.LC224:
+.LC217:
 	.string	"ftl_sblk_dump = %x %x %x %x\n"
-.LC225:
+.LC218:
 	.string	"page_addr = %x, lpa=%x vpn = %d\n"
-.LC226:
+.LC219:
 	.string	"index= %x, lpa=%x\n"
-.LC227:
+.LC220:
 	.string	"block = %x, vpn=%x check vpn = %x\n"
 	.section	.rodata.ftl_sysblk_dump.str1.1,"aMS",@progbits,1
-.LC179:
+.LC171:
 	.string	"l2p:"
 	.section	.rodata.ftl_test_block.str1.1,"aMS",@progbits,1
-.LC150:
+.LC147:
 	.string	"low format %d\n"
 	.section	.rodata.ftl_update_l2p_map.str1.1,"aMS",@progbits,1
-.LC231:
+.LC224:
 	.string	"ftl_update_l2p_map: %x %x %x\n"
-.LC232:
+.LC225:
 	.string	"ftl_update_l2p_map"
-.LC233:
+.LC226:
 	.string	"lpa_tbl:"
-.LC234:
+.LC227:
 	.string	"sblk %x vpn: %d %d\n"
 	.section	.rodata.ftl_vpn_decrement.str1.1,"aMS",@progbits,1
 .LC65:
 	.string	"ftl_vpn_decrement %x = %d, %d\n"
 	.section	.rodata.ftl_write_commit.str1.1,"aMS",@progbits,1
-.LC236:
+.LC229:
 	.string	"%d read error: ppa:%x, lpa:%x, status:%x\n"
 	.section	.rodata.ftl_write_completed.str1.1,"aMS",@progbits,1
-.LC77:
+.LC66:
 	.string	"ftl prog error =%x, lpa = %x, ppa= %x\n"
-.LC78:
+.LC67:
 	.string	"ftl re prog: lpa = %x, ppa= %x\n"
 	.section	.rodata.gc_add_sblk.str1.1,"aMS",@progbits,1
 .LC49:
@@ -32347,43 +31827,43 @@ __func__.9836:
 .LC52:
 	.string	"gc_add_sblk = %d, %d, %d, %d, %d, %d\n"
 	.section	.rodata.gc_check_data_one_wl.str1.1,"aMS",@progbits,1
-.LC143:
+.LC140:
 	.string	"err: ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
 	.section	.rodata.gc_do_copy_back.str1.1,"aMS",@progbits,1
-.LC237:
+.LC231:
 	.string	"gc page in buf: lpa %x ppa = %x pageindex= %x\n"
-.LC238:
+.LC232:
 	.string	"gc_do_copy_back: lpa %x des_ppa = %x %x gc_ppa= %x page_index= %d\n"
 	.section	.rodata.gc_free_bad_sblk.str1.1,"aMS",@progbits,1
-.LC67:
+.LC69:
 	.string	"gc_free_bad_sblk 0x%x\n"
 	.section	.rodata.gc_free_src_blk.str1.1,"aMS",@progbits,1
-.LC69:
+.LC71:
 	.string	"gc_free_src_blk = %x, vpn = %d\n"
-.LC70:
+.LC72:
 	.string	"gc_free_src_blk %x, %d\n"
 	.section	.rodata.gc_free_temp_buf.str1.1,"aMS",@progbits,1
 .LC55:
 	.string	"%d gc_free_temp_buf buf id= %x\n"
 	.section	.rodata.gc_ink_check_sblk.str1.1,"aMS",@progbits,1
-.LC164:
+.LC165:
 	.string	"%x: ink_scaned_blk_num %x\n"
 	.section	.rodata.gc_mark_bad_ppa.str1.1,"aMS",@progbits,1
 .LC53:
 	.string	"gc_mark_bad_ppa %d %x %x\n"
 	.section	.rodata.gc_recovery.str1.1,"aMS",@progbits,1
-.LC213:
+.LC193:
 	.string	"ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
-.LC214:
+.LC194:
 	.string	"ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
-.LC215:
+.LC195:
 	.string	"gc_recovery: %x vpn = %x\n"
 	.section	.rodata.gc_scan_src_blk.str1.1,"aMS",@progbits,1
-.LC220:
+.LC213:
 	.string	"gc_scan_src_blk = %x, vpn = %d\n"
-.LC221:
+.LC214:
 	.string	"js hash error:%x %x %x\n"
-.LC222:
+.LC215:
 	.string	"gc_scan_src_blk = %x, s vpn0 = %d, c vpn1 = %d\n"
 	.section	.rodata.gc_search_src_blk.str1.1,"aMS",@progbits,1
 .LC57:
@@ -32391,69 +31871,69 @@ __func__.9836:
 .LC58:
 	.string	"gc_search_src_blk mode = %x, src mode = %x, count= %d %d\n"
 	.section	.rodata.gc_static_wearleveling.str1.1,"aMS",@progbits,1
-.LC82:
+.LC79:
 	.string	"gc_static_wearleveling: min blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
-.LC83:
+.LC80:
 	.string	"gc_static_wearleveling: min slc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
-.LC84:
+.LC81:
 	.string	"gc_static_wearleveling: min tlc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
-.LC85:
+.LC82:
 	.string	"gc_static_wearleveling: max slc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
-.LC86:
+.LC83:
 	.string	"gc_static_wearleveling: max xlc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
-.LC87:
+.LC84:
 	.string	"gc_static_wearleveling: slc blk: %x, tlc blk: %d avg slc ec: %d, avg tlc ec: %d \n"
-.LC88:
+.LC85:
 	.string	"gc_static_wearleveling: min slc ec: %x, min tlc ec: %d max slc ec: %d, max tlc ec: %d; %d %d\n"
-.LC89:
+.LC86:
 	.string	"swl add tlc gc = %x, %d, %d, %d, %d, %d\n"
-.LC90:
+.LC87:
 	.string	"swl add slc gc  = %x, %d, %d, %d, %d, %d\n"
 	.section	.rodata.gc_update_l2p_map_new.str1.1,"aMS",@progbits,1
-.LC216:
+.LC209:
 	.string	"gc_update_l2p_map_new sblk %x\n"
-.LC217:
+.LC210:
 	.string	"gc_update_l2p_map_new: %x %x %x\n"
-.LC218:
+.LC211:
 	.string	"lpa: %x %x %x\n"
-.LC219:
+.LC212:
 	.string	"gc_update_l2p_map_new: %x vpn = %x vpn1 = %x done\n"
 	.section	.rodata.gc_write_completed.str1.1,"aMS",@progbits,1
 .LC54:
 	.string	"status: %x, ppa: %x\n"
 	.section	.rodata.hynix_get_read_retry_default.str1.1,"aMS",@progbits,1
-.LC102:
+.LC99:
 	.string	"otp error! %d"
-.LC103:
+.LC100:
 	.string	"rr"
 	.section	.rodata.hynix_read_retrial.str1.1,"aMS",@progbits,1
-.LC121:
+.LC118:
 	.string	"hynix RR %d row=%x, count %d, status=%d\n"
 	.section	.rodata.idb_write_data.str1.1,"aMS",@progbits,1
-.LC132:
+.LC129:
 	.string	"1 write_idblock fix data %x %x %x\n"
-.LC133:
+.LC130:
 	.string	"write_idblock check fail! %x\n"
-.LC134:
+.LC131:
 	.string	"write_idblock fail! %x\n"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",@progbits,1
-.LC204:
+.LC184:
 	.string	"region_id = %d, pm_max_region = %d\n"
-.LC205:
+.LC185:
 	.string	"load_l2p_region no ppa = %x , %x, all setting 0xff....\n"
-.LC206:
+.LC186:
 	.string	"load_l2p_region = %x,%x,%x, %x\n"
-.LC207:
+.LC187:
 	.string	"pm_ppa:"
-.LC208:
+.LC188:
 	.string	"spare:"
 	.section	.rodata.lpa_rebuild_hash.str1.1,"aMS",@progbits,1
-.LC81:
+.LC78:
 	.string	"%s %d %d\n"
 	.section	.rodata.micron_read_retrial.str1.1,"aMS",@progbits,1
-.LC112:
+.LC109:
 	.string	"MT %d row=%x,last status %d,status = %d\n"
-.LC113:
+.LC110:
 	.string	"MT RR %d row=%x,count %d,status=%d\n"
 	.section	.rodata.nand_flash_print_info.str1.1,"aMS",@progbits,1
 .LC1:
@@ -32517,67 +31997,56 @@ __func__.9836:
 .LC30:
 	.string	"g_flash_toggle_mode_en: %x\n"
 	.section	.rodata.nandc_init.str1.1,"aMS",@progbits,1
-.LC95:
+.LC92:
 	.string	"...%s enter... %p\n"
-.LC96:
+.LC93:
 	.string	"0:%x %x %x %x %x\n"
-.LC97:
+.LC94:
 	.string	"g_nandc_ver...%d\n"
 	.section	.rodata.nandc_xfer.str1.1,"aMS",@progbits,1
-.LC109:
+.LC106:
 	.string	"dqs data abort %x\n"
-.LC110:
+.LC107:
 	.string	"dqs data timeout %x\n"
-.LC111:
+.LC108:
 	.string	"xfer error %x\n"
 	.section	.rodata.nandc_xfer_done.str1.1,"aMS",@progbits,1
-.LC104:
+.LC101:
 	.string	"flash_abort_clear = %d\n"
-.LC105:
+.LC102:
 	.string	"%d mtrans_cnt = %d page_num = %d\n"
-.LC106:
+.LC103:
 	.string	"%d flReg.d32=%x %x\n"
-.LC107:
+.LC104:
 	.string	"nandc:"
-.LC108:
+.LC105:
 	.string	"nandc_xfer_done read error %x\n"
 	.section	.rodata.pm_alloc_new_blk.str1.1,"aMS",@progbits,1
-.LC172:
+.LC75:
+	.string	"blk %x is bad block\n"
+.LC76:
 	.string	"pm_alloc_new_blk: %x %x %x %x\n"
 	.section	.rodata.pm_free_sblk.str1.1,"aMS",@progbits,1
-.LC92:
+.LC89:
 	.string	"GC PM block %x %x %x %d\n"
-.LC93:
+.LC90:
 	.string	"ftl_free_no_use_map_blk %x %x %x %d\n"
 	.section	.rodata.pm_init.str1.1,"aMS",@progbits,1
-.LC209:
+.LC189:
 	.string	"pm_init posr %x %x %x\n"
-.LC210:
+.LC190:
 	.string	"pm_init recovery %x %x %x\n"
-.LC211:
+.LC191:
 	.string	"pm_init hash %x error\n"
 	.section	.rodata.pm_log2phys.str1.1,"aMS",@progbits,1
-.LC212:
+.LC192:
 	.string	"pm_log2phys  lpn = %d, max lpn = %d\n"
 	.section	.rodata.pm_ppa_update_check.str1.1,"aMS",@progbits,1
-.LC203:
+.LC77:
 	.string	"%s w error lpn = %x, max ppa = %d\n"
 	.section	.rodata.pm_write_page.str1.1,"aMS",@progbits,1
-.LC173:
+.LC159:
 	.string	"pm_write_page write error: %x\n"
-	.section	.rodata.print_ftl_debug_info.str1.1,"aMS",@progbits,1
-.LC71:
-	.string	"bad blk = %x, %x free blk: s:%x,t:%x,m:%x, data blk:s:%x,%x,t%x vpn: s:%x t:%x, max_vpn: %x\n"
-.LC72:
-	.string	"totle w: %d MB,r: %d MB %d dv:0x%X,poc:%d\n"
-.LC73:
-	.string	"gc xlc page: %d,gc slc page: %d, tmp w: %d MB\n"
-.LC74:
-	.string	"slc ec: %d,%d,%d,%d,%d,tlc ec: %d,%d,%d,%d,%d\n"
-.LC75:
-	.string	"gc th: tlc_tlc: %d tlc_slc: %d slc_slc: %d slc_tlc:%d free_th: %d\n"
-.LC76:
-	.string	"swl : %x %x %x %x %x %x\n"
 	.section	.rodata.print_gc_debug_info.str1.1,"aMS",@progbits,1
 .LC56:
 	.string	"gc: b:%x,p:%x,i:%x; free buf=%d %d free slc th: %d\n"
@@ -32587,15 +32056,15 @@ __func__.9836:
 .LC64:
 	.string	"%d: node:%x %x %x %x, %d %d %d %d %d\n"
 	.section	.rodata.queue_wait_first_req_completed.str1.1,"aMS",@progbits,1
-.LC137:
+.LC134:
 	.string	"read: %x %x %x %x\n"
-.LC138:
+.LC135:
 	.string	"0set buf %d,status = %x, ppa = %x lun state = %d\n"
-.LC139:
+.LC136:
 	.string	"prog end %x %x error_ecc %d %d\n"
-.LC140:
+.LC137:
 	.string	"1set buf %d,status = %x, ppa = %x lun state = %d\n"
-.LC141:
+.LC138:
 	.string	"dp prog end %x %x error_ecc %d %d\n"
 	.section	.rodata.random_seed,"a",@progbits
 	.align	3
@@ -32732,20 +32201,20 @@ random_seed:
 	.hword	17598
 	.hword	28087
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",@progbits,1
-.LC254:
+.LC208:
 	.string	"zftl_init %x\n"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
-.LC98:
+.LC95:
 	.string	"%s %p + 0x%x:"
-.LC99:
+.LC96:
 	.string	"%x "
-.LC100:
+.LC97:
 	.string	""
-.LC101:
+.LC98:
 	.string	"%s\n"
 	.section	.rodata.samsung_14nm_mlc_rr,"a",@progbits
 	.align	3
-	.set	.LANCHOR168,. + 0
+	.set	.LANCHOR169,. + 0
 	.type	samsung_14nm_mlc_rr, %object
 	.size	samsung_14nm_mlc_rr, 104
 samsung_14nm_mlc_rr:
@@ -32855,7 +32324,7 @@ samsung_14nm_mlc_rr:
 	.byte	8
 	.section	.rodata.samsung_14nm_slc_rr,"a",@progbits
 	.align	3
-	.set	.LANCHOR167,. + 0
+	.set	.LANCHOR168,. + 0
 	.type	samsung_14nm_slc_rr, %object
 	.size	samsung_14nm_slc_rr, 26
 samsung_14nm_slc_rr:
@@ -32886,20 +32355,20 @@ samsung_14nm_slc_rr:
 	.byte	-115
 	.byte	100
 	.section	.rodata.samsung_read_retrial.str1.1,"aMS",@progbits,1
-.LC118:
+.LC115:
 	.string	"samsung SRR %d row=%x, status=%d\n"
-.LC119:
+.LC116:
 	.string	"samsung TRR %d row=%x, status=%d\n"
-.LC120:
+.LC117:
 	.string	"samsung RR %d row=%x,count %d,status=%d\n"
 	.section	.rodata.sandisk_prog_test_bad_block.str1.1,"aMS",@progbits,1
 .LC40:
 	.string	"bad block test:%x %x\n"
 	.section	.rodata.sblk_mlc_dump_prog.str1.1,"aMS",@progbits,1
-.LC135:
+.LC132:
 	.string	"sblk_mlc_dump_prog wl_addr= %x ppa = %x ppa = %x\n"
 	.section	.rodata.sblk_prog_page.str1.1,"aMS",@progbits,1
-.LC142:
+.LC139:
 	.string	"sblk_prog_page ppa = %x, count = %d\n"
 	.section	.rodata.toshiba_15ref_value,"a",@progbits
 	.align	3
@@ -33425,11 +32894,11 @@ toshiba_3D_tlc_value:
 	.byte	12
 	.byte	14
 	.section	.rodata.toshiba_3d_read_retrial.str1.1,"aMS",@progbits,1
-.LC114:
+.LC111:
 	.string	"toshiba SRR %d row=%x, status=%d\n"
-.LC115:
+.LC112:
 	.string	"toshiba TRR %d row=%x, status=%d\n"
-.LC116:
+.LC113:
 	.string	"toshiba RR %d row=%x,count %d,status=%d\n"
 	.section	.rodata.toshiba_A19ref_value,"a",@progbits
 	.align	3
@@ -33876,20 +33345,20 @@ ymtc_3D_tlc_value:
 	.byte	12
 	.byte	14
 	.section	.rodata.ymtc_3d_read_retrial.str1.1,"aMS",@progbits,1
-.LC117:
+.LC114:
 	.string	"YMTC RR %d row=%x,count %d,status=%d\n"
 	.section	.rodata.ymtc_flash_tlc_page_prog.str1.1,"aMS",@progbits,1
-.LC131:
+.LC128:
 	.string	"ymtc_flash_tlc_page_prog page_addr = %x status = %x\n"
 	.section	.rodata.zftl_discard.str1.1,"aMS",@progbits,1
-.LC256:
+.LC236:
 	.string	"ftl_discard:(%x, %x, %x, %x)\n"
 	.section	.rodata.zftl_do_gc.str1.1,"aMS",@progbits,1
-.LC239:
+.LC233:
 	.string	"gc %d: %d %d %d %d %d %d %d\n"
-.LC240:
+.LC234:
 	.string	"GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\n"
-.LC241:
+.LC235:
 	.string	"gc free %x, %d\n"
 	.section	.rodata.zftl_gc_get_free_sblk.str1.1,"aMS",@progbits,1
 .LC59:
@@ -33902,40 +33371,40 @@ ymtc_3D_tlc_value:
 .LC62:
 	.string	"swl_slc_free_mini_ec_blk alloc sblk %x\n"
 	.section	.rodata.zftl_init.str1.1,"aMS",@progbits,1
-.LC242:
-	.string	"FTL version: 6.0.24 20210107"
-.LC243:
+.LC196:
+	.string	"FTL version: 6.0.24 20210615"
+.LC197:
 	.string	"_c_user_data_density := %d\n"
-.LC244:
+.LC198:
 	.string	"_c_totle_phy_density := %d\n"
-.LC245:
+.LC199:
 	.string	"_c_totle_log_page := %d\n"
-.LC246:
+.LC200:
 	.string	"_c_totle_data_density := %d\n"
-.LC247:
+.LC201:
 	.string	"_c_ftl_pm_page_num := %d\n"
-.LC248:
+.LC202:
 	.string	"_c_ftl_byte_pre_page := %d\n"
-.LC249:
+.LC203:
 	.string	"_c_max_pm_sblk := %d\n"
-.LC250:
+.LC204:
 	.string	"_min_slc_super_block := %d\n"
-.LC251:
+.LC205:
 	.string	"_max_xlc_super_block := %d\n"
-.LC252:
+.LC206:
 	.string	"gp_ftl_ext_info %p %p %p\n"
-.LC253:
+.LC207:
 	.string	"flash info size: %d %d %d\n"
 	.section	.rodata.zftl_read.str1.1,"aMS",@progbits,1
-.LC228:
+.LC221:
 	.string	"ftl_read %x %x %x\n"
-.LC229:
+.LC222:
 	.string	"ftl_read refresh =%x, lpa = %x, ppa= %x\n"
-.LC230:
+.LC223:
 	.string	"id=%d, status = %x, lpa = %x, ppa = %x spare = %x %x %x %x\n"
 	.section	.rodata.zftl_sblk_list_init.str1.1,"aMS",@progbits,1
-.LC91:
+.LC88:
 	.string	"free blk vpn error: %x %x\n"
 	.section	.rodata.zftl_write.str1.1,"aMS",@progbits,1
-.LC255:
+.LC230:
 	.string	"ftlwrite %x %x %x %x\n"

commit e90784abb282345186169cadf0b2ef14467dba76
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Thu Jun 10 09:24:32 2021 +0800

    rv1126: ddr: fix tx dqs bypass phase setting err
    
    It will set error value when the write leveling results
    are less than clk de-skew. Fix it.
    
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
    Change-Id: I591e07a459e2c11c5f215b95f57cf7a2b575d92e

diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
index 2146ee273e..3202a54357 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -2088,8 +2088,18 @@ static int high_freq_training(struct dram_info *dram,
 	dqs_skew = 0x20;
 
 	if (dramtype == LPDDR4 || dramtype == LPDDR4X) {
-		clk_skew = 0;
-		ca_skew = 0;
+		min_val = 0xff;
+		for (j = 0; j < sdram_params->ch.cap_info.rank; j++)
+			for (i = 0; i < sdram_params->ch.cap_info.bw; i++)
+				min_val = MIN(wrlvl_result[j][i], min_val);
+
+		if (min_val < 0) {
+			clk_skew = -min_val;
+			ca_skew = -min_val;
+		} else {
+			clk_skew = 0;
+			ca_skew = 0;
+		}
 	} else if (dramtype == LPDDR3) {
 		ca_skew = clk_skew - 4;
 	} else {

commit c2a03d5d81e258bd63ceb0404ef0ae83264e8f20
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Tue Jun 8 16:32:57 2021 +0800

    drivers: ram: rv1126: add support lpddr4x
    
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
    Change-Id: I2470a50551fe0576e56c5ac8121f783b61efd70e

diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-loader_params.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-loader_params.inc
index 765c9417a3..4b75f166d3 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-loader_params.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-loader_params.inc
@@ -1,11 +1,12 @@
 0x12345678,
 2,/* version */
-(0 << 0) | (1 << 8) | (8 << 16) | (8 << 24),/* cpu_gen,global index */
-(0 << 0) | (9 << 8) | (16 << 16) | (9 << 24),/* d2,d3 index */
-(25 << 0) | (9 << 8) | (0 << 16) | (0 << 24),/* d4,d5 index */
-(0 << 0) | (9 << 8) | (34 << 16) | (9 << 24),/* lp2,lp3 index */
-(43 << 0) | (13 << 8) | (0 << 16) | (0 << 24),/* lp4,lp5 index */
-(0 << 0) | (0 << 8) | (56 << 16) | (8 << 24),/* skew index, dq_map index */
+(0 << 0) | (1 << 8) | (9 << 16) | (8 << 24),/* cpu_gen,global index */
+(0 << 0) | (9 << 8) | (17 << 16) | (9 << 24),/* d2,d3 index */
+(26 << 0) | (9 << 8) | (0 << 16) | (0 << 24),/* d4,d5 index */
+(0 << 0) | (9 << 8) | (35 << 16) | (9 << 24),/* lp2,lp3 index */
+(44 << 0) | (13 << 8) | (0 << 16) | (0 << 24),/* lp4,lp5 index */
+(0 << 0) | (0 << 8) | (57 << 16) | (8 << 24),/* skew index, dq_map index */
+(65 << 0) | (13 << 8) | (0 << 16) | (0 << 24), /*lp4x index*/
 /* global info */
 0,
 (93 << 16) | 13,/* sr_idle << 16 | pd_idle */
@@ -153,4 +154,45 @@
 	((2 << 0 | 0 << 2 | 2 << 4 | 0 << 6) << 0) |
 	((1 << 0 | 3 << 2 | 3 << 4 | 1 << 6) << 8) |
 	((0 << 0 | 0 << 2 | 1 << 4 | 3 << 6) << 16) |
-	((1 << 0 | 3 << 2 | 2 << 4 | 2 << 6) << 24)
+	((1 << 0 | 3 << 2 | 2 << 4 | 2 << 6) << 24),
+
+/* lpddr4x */
+(1056 << DDR_FREQ_F0_SHIFT) | (328 << DDR_FREQ_F1_SHIFT),
+(528 << DDR_FREQ_F2_SHIFT) | (784 << DDR_FREQ_F3_SHIFT),
+(0 << DDR_FREQ_F4_SHIFT) | (0 << DDR_FREQ_F5_SHIFT),
+
+/* drv when odt on */
+(38 << PHY_DQ_DRV_SHIFT) | (38 << PHY_CA_DRV_SHIFT) |
+	(38 << PHY_CLK_DRV_SHIFT) | (40 << DRAM_DQ_DRV_SHIFT),
+/* drv when odt off */
+(38 << PHY_DQ_DRV_SHIFT) | (38 << PHY_CA_DRV_SHIFT) |
+	(38 << PHY_CLK_DRV_SHIFT) | (40 << DRAM_DQ_DRV_SHIFT),
+/* odt info and PU-cal info */
+(48 << DRAM_ODT_SHIFT) | (60 << PHY_ODT_SHIFT) |
+	(120 << LP4_CA_ODT_SHIFT) |
+	(LPDDR4X_VDDQ_0_6 << LP4_DRV_PU_CAL_ODTEN_SHIFT) |
+	(LPDDR4X_VDDQ_0_6 << LP4_DRV_PU_CAL_ODTOFF_SHIFT) |
+	(0 << PHY_LP4_DRV_PULLDOWN_EN_ODTEN_SHIFT) |
+	(0 << PHY_LP4_DRV_PULLDOWN_EN_ODTOFF_SHIFT),
+/* odt enable freq */
+(0 << PHY_LP4_ODT_EN_FREQ_SHIFT) | (0 << LP4_DQ_ODT_EN_FREQ_SHIFT),
+/* slew rate when odt enable */
+(0xf << PHY_DQ_SR_SHIFT) | (0xf << PHY_CA_SR_SHIFT) |
+	(0xf << PHY_CLK_SR_SHIFT),
+/* slew  ratee when odt disable */
+(0xf << PHY_DQ_SR_SHIFT) | (0xf << PHY_CA_SR_SHIFT) |
+	(0xf << PHY_CLK_SR_SHIFT),
+/* ca odt en freq */
+(333 << LP4_CA_ODT_EN_FREQ_SHIFT),
+/* cs drv info and ca odt info */
+(0 << PHY_LP4_CS_DRV_ODTEN_SHIFT) |
+	(0 << PHY_LP4_CS_DRV_ODTOFF_SHIFT) |
+	(0 << LP4_ODTE_CK_SHIFT) | (0 << LP4_ODTE_CS_EN_SHIFT) |
+	(0 << LP4_ODTD_CA_EN_SHIFT),
+/* vref info when odt enable, phy vddq=1.1V, lp4x vddq=0.6V */
+(153 << PHY_LP4_DQ_VREF_SHIFT) | (515 << LP4_DQ_VREF_SHIFT) |
+	(629 << LP4_CA_VREF_SHIFT),
+/* vref info when odt disable */
+(153 << PHY_LP4_DQ_VREF_SHIFT) | (629 << LP4_DQ_VREF_SHIFT) |
+	(629 << LP4_CA_VREF_SHIFT),
+
diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
index daa3aa5959..2146ee273e 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -774,13 +774,15 @@ static void *get_ddr_drv_odt_info(u32 dramtype)
 		ddr_info = (void *)common_info + index->lp3_index.offset * 4;
 	else if (dramtype == LPDDR4)
 		ddr_info = (void *)common_info + index->lp4_index.offset * 4;
+	else if (dramtype == LPDDR4X)
+		ddr_info = (void *)common_info + index->lp4x_index.offset * 4;
 	else
 		printascii("unsupported dram type\n");
 	return ddr_info;
 }
 
 static void set_lp4_vref(struct dram_info *dram, struct lp4_info *lp4_info,
-			 u32 freq_mhz, u32 dst_fsp)
+			 u32 freq_mhz, u32 dst_fsp, u32 dramtype)
 {
 	void __iomem *pctl_base = dram->pctl;
 	u32 ca_vref, dq_vref;
@@ -795,26 +797,48 @@ static void set_lp4_vref(struct dram_info *dram, struct lp4_info *lp4_info,
 	else
 		dq_vref = LP4_DQ_VREF(lp4_info->vref_when_odten);
 
-	if (ca_vref < 100)
-		ca_vref = 100;
-	if (ca_vref > 420)
-		ca_vref = 420;
+	if (dramtype == LPDDR4) {
+		if (ca_vref < 100)
+			ca_vref = 100;
+		if (ca_vref > 420)
+			ca_vref = 420;
 
-	if (ca_vref <= 300)
-		ca_vref = (0 << 6) | (ca_vref - 100) / 4;
-	else
-		ca_vref = (1 << 6) | (ca_vref - 220) / 4;
+		if (ca_vref <= 300)
+			ca_vref = (0 << 6) | (ca_vref - 100) / 4;
+		else
+			ca_vref = (1 << 6) | (ca_vref - 220) / 4;
 
-	if (dq_vref < 100)
-		dq_vref = 100;
-	if (dq_vref > 420)
-		dq_vref = 420;
+		if (dq_vref < 100)
+			dq_vref = 100;
+		if (dq_vref > 420)
+			dq_vref = 420;
 
-	if (dq_vref <= 300)
-		dq_vref = (0 << 6) | (dq_vref - 100) / 4;
-	else
-		dq_vref = (1 << 6) | (dq_vref - 220) / 4;
+		if (dq_vref <= 300)
+			dq_vref = (0 << 6) | (dq_vref - 100) / 4;
+		else
+			dq_vref = (1 << 6) | (dq_vref - 220) / 4;
+	} else {
+		ca_vref = ca_vref * 11 / 6;
+		if (ca_vref < 150)
+			ca_vref = 150;
+		if (ca_vref > 629)
+			ca_vref = 629;
+
+		if (ca_vref <= 449)
+			ca_vref = (0 << 6) | (ca_vref - 150) / 4;
+		else
+			ca_vref = (1 << 6) | (ca_vref - 329) / 4;
+
+		if (dq_vref < 150)
+			dq_vref = 150;
+		if (dq_vref > 629)
+			dq_vref = 629;
 
+		if (dq_vref <= 449)
+			dq_vref = (0 << 6) | (dq_vref - 150) / 6;
+		else
+			dq_vref = (1 << 6) | (dq_vref - 329) / 6;
+	}
 	sw_set_req(dram);
 	clrsetbits_le32(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +
 			DDR_PCTL2_INIT6,
@@ -899,7 +923,7 @@ static void set_ds_odt(struct dram_info *dram,
 		lp4_pu_cal = LP4_DRV_PU_CAL_ODTEN(lp4_info->odt_info);
 	}
 
-	if (dramtype == LPDDR4) {
+	if (dramtype == LPDDR4 || dramtype == LPDDR4X) {
 		if (phy_odt_ohm) {
 			phy_odt_up_en = 0;
 			phy_odt_dn_en = 1;
@@ -914,7 +938,7 @@ static void set_ds_odt(struct dram_info *dram,
 	if (dramtype == DDR3) {
 		p_drv = d3_phy_drv_2_ohm;
 		p_odt = d3_phy_odt_2_ohm;
-	} else if (dramtype == LPDDR4) {
+	} else if (dramtype == LPDDR4 || dramtype == LPDDR4X) {
 		p_drv = lp4_phy_drv_2_ohm;
 		p_odt = lp4_phy_odt_2_ohm;
 	} else {
@@ -958,7 +982,7 @@ static void set_ds_odt(struct dram_info *dram,
 				break;
 		}
 
-	if (dramtype != LPDDR4) {
+	if (dramtype != LPDDR4 && dramtype != LPDDR4X) {
 		if (!phy_odt_ohm || (phy_odt_up_en && phy_odt_dn_en))
 			vref_inner = 0x80;
 		else if (phy_odt_up_en)
@@ -974,7 +998,7 @@ static void set_ds_odt(struct dram_info *dram,
 		else
 			vref_out = 0x80;
 	} else {
-		/* for lp4 */
+		/* for lp4 and lp4x*/
 		if (phy_odt_ohm)
 			vref_inner =
 				(PHY_LP4_DQ_VREF(lp4_info->vref_when_odten) *
@@ -992,7 +1016,7 @@ static void set_ds_odt(struct dram_info *dram,
 	clrsetbits_le32(PHY_REG(phy_base, 0x101), 0x1f, phy_ca_drv);
 	clrsetbits_le32(PHY_REG(phy_base, 0x102), 0x1f, phy_clk_drv);
 	clrsetbits_le32(PHY_REG(phy_base, 0x103), 0x1f, phy_clk_drv);
-	if (dramtype == LPDDR4) {
+	if (dramtype == LPDDR4 || dramtype == LPDDR4X) {
 		clrsetbits_le32(PHY_REG(phy_base, 0x107), 0x1f, phy_clk_drv);
 		clrsetbits_le32(PHY_REG(phy_base, 0x108), 0x1f, phy_clk_drv);
 	} else {
@@ -1032,8 +1056,8 @@ static void set_ds_odt(struct dram_info *dram,
 	if (dramtype == LPDDR3)
 		udelay(100);
 
-	if (dramtype == LPDDR4)
-		set_lp4_vref(dram, lp4_info, freq, dst_fsp);
+	if (dramtype == LPDDR4 || dramtype == LPDDR4X)
+		set_lp4_vref(dram, lp4_info, freq, dst_fsp, dramtype);
 
 	if (dramtype == DDR3 || dramtype == DDR4) {
 		mr1_mr3 = readl(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +
@@ -1097,7 +1121,7 @@ static void set_ds_odt(struct dram_info *dram,
 			lp3_odt_value = LPDDR3_ODT_120;
 		else
 			lp3_odt_value = LPDDR3_ODT_240;
-	} else {/* for lpddr4 */
+	} else {/* for lpddr4 and lpddr4x */
 		/* MR3 for lp4 PU-CAL and PDDS */
 		mr1_mr3 &= ~(LPDDR4_PDDS_MASK | LPDDR4_PU_CAL_MASK);
 		mr1_mr3 |= lp4_pu_cal;
@@ -1179,6 +1203,9 @@ static int sdram_cmd_dq_path_remap(struct dram_info *dram,
 	map_info = (struct dq_map_info *)((void *)common_info +
 		index->dq_map_index.offset * 4);
 
+	if (dramtype == LPDDR4X)
+		dramtype = LPDDR4;
+
 	if (dramtype <= LPDDR4)
 		writel((map_info->byte_map[dramtype / 4] >>
 			((dramtype % 4) * 8)) & 0xff,
@@ -1223,7 +1250,8 @@ static void phy_cfg(struct dram_info *dram,
 	writel(tmp, PHY_REG(phy_base, 0xf));
 
 	/* lpddr4 odt control by phy, enable cs0 odt */
-	if (sdram_params->base.dramtype == LPDDR4)
+	if (sdram_params->base.dramtype == LPDDR4 ||
+	    sdram_params->base.dramtype == LPDDR4X)
 		clrsetbits_le32(PHY_REG(phy_base, 0x20), 0x7 << 4,
 				(1 << 6) | (1 << 4));
 	/* for ca training ca vref choose range1 */
@@ -1392,7 +1420,7 @@ static void modify_ca_deskew(struct dram_info *dram, u32 dir, int delta_dif,
 	else
 		cs_en = 3;
 
-	if (dramtype == LPDDR4 &&
+	if ((dramtype == LPDDR4 || dramtype == LPDDR4X) &&
 	    ((readl(PHY_REG(phy_base, 0x60)) & BIT(5)) == 0)) {
 		dfi_lp_stat = 1;
 		setbits_le32(PHY_REG(phy_base, 0x60), BIT(5));
@@ -1415,7 +1443,7 @@ static void modify_ca_deskew(struct dram_info *dram, u32 dir, int delta_dif,
 		       delta_sig + delta_dif;
 	writel(tmp, PHY_REG(phy_base, 0x150 + 0x17));
 	writel(tmp, PHY_REG(phy_base, 0x150 + 0x18));
-	if (dramtype == LPDDR4) {
+	if (dramtype == LPDDR4 || dramtype == LPDDR4X) {
 		writel(tmp, PHY_REG(phy_base, 0x150 + 0x4));
 		writel(tmp, PHY_REG(phy_base, 0x150 + 0xa));
 
@@ -1531,7 +1559,7 @@ static int data_training_rg(struct dram_info *dram, u32 cs, u32 dramtype)
 	odt_val_dn = readl(PHY_REG(phy_base, 0x110));
 	odt_val_up = readl(PHY_REG(phy_base, 0x111));
 
-	if (dramtype != LPDDR4) {
+	if (dramtype != LPDDR4 || dramtype != LPDDR4X) {
 		for (i = 0; i < 4; i++) {
 			j = 0x110 + i * 0x10;
 			writel(PHY_DDR4_LPDDR3_RTT_294ohm,
@@ -1563,7 +1591,7 @@ static int data_training_rg(struct dram_info *dram, u32 cs, u32 dramtype)
 	else
 		ret = (ret & 0xf) ^ (readl(PHY_REG(phy_base, 0xf)) & 0xf);
 
-	if (dramtype != LPDDR4) {
+	if (dramtype != LPDDR4 || dramtype != LPDDR4X) {
 		for (i = 0; i < 4; i++) {
 			j = 0x110 + i * 0x10;
 			writel(odt_val_dn, PHY_REG(phy_base, j));
@@ -1851,8 +1879,8 @@ static int data_training_wr(struct dram_info *dram, u32 cs, u32 dramtype,
 
 	pctl_rest_zqcs_aref(dram->pctl, dis_auto_zq);
 
-	/* save LPDDR4 write vref to fsp_param for dfs */
-	if (dramtype == LPDDR4) {
+	/* save LPDDR4/LPDDR4X write vref to fsp_param for dfs */
+	if (dramtype == LPDDR4 || dramtype == LPDDR4X) {
 		fsp_param[dst_fsp].vref_dq[cs] =
 			((readl(PHY_REG(phy_base, 0x384)) & 0x3f) +
 			 (readl(PHY_REG(phy_base, 0x385)) & 0x3f)) / 2;
@@ -2059,7 +2087,7 @@ static int high_freq_training(struct dram_info *dram,
 	clk_skew = 0x20 - dqs_skew;
 	dqs_skew = 0x20;
 
-	if (dramtype == LPDDR4) {
+	if (dramtype == LPDDR4 || dramtype == LPDDR4X) {
 		clk_skew = 0;
 		ca_skew = 0;
 	} else if (dramtype == LPDDR3) {
@@ -2164,7 +2192,8 @@ static void update_noc_timing(struct dram_info *dram,
 	sdram_params->ch.noc_timings.ddrtimingc0.b.burstpenalty =
 		(bl * bw / 8) > 16 ? (bl / 4) : (16 / (bl * bw / 8)) * bl / 4;
 
-	if (sdram_params->base.dramtype == LPDDR4) {
+	if (sdram_params->base.dramtype == LPDDR4 ||
+	    sdram_params->base.dramtype == LPDDR4X) {
 		sdram_params->ch.noc_timings.ddrmode.b.mwrsize =
 			(bw == 16) ? 0x1 : 0x2;
 		sdram_params->ch.noc_timings.ddrtimingc0.b.wrtomwr =
@@ -2444,7 +2473,8 @@ static int sdram_init_(struct dram_info *dram,
 
 	if (sdram_params->base.dramtype == LPDDR3) {
 		pctl_write_mr(dram->pctl, 3, 11, lp3_odt_value, LPDDR3);
-	} else if (sdram_params->base.dramtype == LPDDR4) {
+	} else if (sdram_params->base.dramtype == LPDDR4 ||
+		   sdram_params->base.dramtype == LPDDR4X) {
 		mr_tmp = readl(pctl_base + DDR_PCTL2_INIT6);
 		/* MR11 */
 		pctl_write_mr(dram->pctl, 3, 11,
@@ -2460,10 +2490,6 @@ static int sdram_init_(struct dram_info *dram,
 		pctl_write_mr(dram->pctl, 3, 22,
 			      mr_tmp >> PCTL2_LPDDR4_MR22_SHIFT & PCTL2_MR_MASK,
 			      LPDDR4);
-		/* MR14 */
-		pctl_write_mr(dram->pctl, 3, 14,
-			      mr_tmp >> PCTL2_LPDDR4_MR14_SHIFT & PCTL2_MR_MASK,
-			      LPDDR4);
 	}
 
 	if (data_training(dram, 0, sdram_params, 0, READ_GATE_TRAINING) != 0) {
@@ -2472,6 +2498,21 @@ static int sdram_init_(struct dram_info *dram,
 		return -1;
 	}
 
+	if (sdram_params->base.dramtype == LPDDR4) {
+		mr_tmp = read_mr(dram, 1, 14, LPDDR4);
+
+		if (mr_tmp != 0x4d)
+			return -1;
+	}
+
+	if (sdram_params->base.dramtype == LPDDR4 ||
+	    sdram_params->base.dramtype == LPDDR4X) {
+		mr_tmp = readl(pctl_base + DDR_PCTL2_INIT7);
+		/* MR14 */
+		pctl_write_mr(dram->pctl, 3, 14,
+			      mr_tmp >> PCTL2_LPDDR4_MR14_SHIFT & PCTL2_MR_MASK,
+			      LPDDR4);
+	}
 	if (post_init != 0 && sdram_params->ch.cap_info.rank == 2) {
 		if (data_training(dram, 1, sdram_params, 0,
 				  READ_GATE_TRAINING) != 0) {
@@ -2511,7 +2552,7 @@ static u64 dram_detect_cap(struct dram_info *dram,
 	u32 byte1 = 0, byte0 = 0;
 
 	cap_info->bw = dram_type == DDR3 ? 0 : 1;
-	if (dram_type != LPDDR4) {
+	if (dram_type != LPDDR4 && dram_type != LPDDR4X) {
 		if (dram_type != DDR4) {
 			coltmp = 12;
 			bktmp = 3;
@@ -2561,7 +2602,7 @@ static u64 dram_detect_cap(struct dram_info *dram,
 		cs = 0;
 	cap_info->rank = cs + 1;
 
-	if (dram_type != LPDDR4) {
+	if (dram_type != LPDDR4 && dram_type != LPDDR4X) {
 		setbits_le32(PHY_REG(phy_base, 0xf), 0xf);
 
 		if (data_training(dram, 0, sdram_params, 0,
@@ -2846,7 +2887,7 @@ static void pre_set_rate(struct dram_info *dram,
 	}
 
 	set_ds_odt(dram, sdram_params, dst_fsp);
-	if (dramtype == LPDDR4) {
+	if (dramtype == LPDDR4 || dramtype == LPDDR4X) {
 		mr_tmp = readl(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +
 			       DDR_PCTL2_INIT4);
 		/* MR13 */
@@ -2926,7 +2967,8 @@ static void save_fsp_param(struct dram_info *dram, u32 dst_fsp,
 
 	p_fsp_param->freq_mhz = sdram_params->base.ddr_freq;
 
-	if (sdram_params->base.dramtype == LPDDR4) {
+	if (sdram_params->base.dramtype == LPDDR4 ||
+	    sdram_params->base.dramtype == LPDDR4X) {
 		p_fsp_param->rd_odt_up_en = 0;
 		p_fsp_param->rd_odt_down_en = 1;
 	} else {
@@ -2970,7 +3012,8 @@ static void save_fsp_param(struct dram_info *dram, u32 dst_fsp,
 
 		p_fsp_param->dq_odt = lp3_odt_value;
 		p_fsp_param->ca_odt = p_fsp_param->dq_odt;
-	} else if (sdram_params->base.dramtype == LPDDR4) {
+	} else if (sdram_params->base.dramtype == LPDDR4 ||
+		   sdram_params->base.dramtype == LPDDR4X) {
 		temp = readl(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +
 			     DDR_PCTL2_INIT4);
 		temp = (temp >> PCTL2_LPDDR234_MR3_SHIFT) & PCTL2_MR_MASK;
@@ -3321,7 +3364,7 @@ void ddr_set_rate(struct dram_info *dram,
 				      PCTL2_MR_MASK,
 				      dramtype);
 		}
-	} else if (dramtype == LPDDR4) {
+	} else if (dramtype == LPDDR4 || dramtype == LPDDR4X) {
 		pctl_write_mr(dram->pctl, 3, 13,
 			      ((mr_tmp >> PCTL2_LPDDR4_MR13_SHIFT &
 			       PCTL2_MR_MASK) & (~(BIT(7)))) |
@@ -3436,11 +3479,13 @@ int sdram_init(void)
 	    (index->lp3_index.size !=
 		sizeof(struct ddr2_3_4_lp2_3_info) / 4) ||
 	    (index->lp4_index.size != (sizeof(struct lp4_info) / 4)) ||
+	    (index->lp4x_index.size != (sizeof(struct lp4_info) / 4)) ||
 	    index->global_index.offset == 0 ||
 	    index->ddr3_index.offset == 0 ||
 	    index->ddr4_index.offset == 0 ||
 	    index->lp3_index.offset == 0 ||
-	    index->lp4_index.offset == 0) {
+	    index->lp4_index.offset == 0 ||
+	    index->lp4x_index.offset == 0) {
 		printascii("common info error\n");
 		goto error;
 	}
@@ -3452,7 +3497,10 @@ int sdram_init(void)
 	dram_info.pd_idle = PD_INFO(gbl_info->sr_pd_info);
 
 	sdram_params = &sdram_configs[0];
-
+	#if (CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE == 8)
+	for (j = 0; j < ARRAY_SIZE(sdram_configs); j++)
+		sdram_configs[j].base.dramtype = LPDDR4X;
+	#endif
 	if (sdram_params->base.dramtype == DDR3 ||
 	    sdram_params->base.dramtype == DDR4) {
 		if (DDR_2T_INFO(gbl_info->info_2t))

commit f627cf25e97b0bb49b3faf2118965c992c4dee8f
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Wed Jan 13 17:58:51 2021 +0800

    drivers: ram: rv1126: add split support
    
    The bigger cap must be in low cpu 16bit.
    only support high 16bit row < low 16bit row
    
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
    Change-Id: I0599f672376ff074ff5192a4d298394e7c89c29e

diff --git a/arch/arm/dts/rk3328-sdram-ddr3-666.dtsi b/arch/arm/dts/rk3328-sdram-ddr3-666.dtsi
index 4e3cc001d8..41ec741c51 100644
--- a/arch/arm/dts/rk3328-sdram-ddr3-666.dtsi
+++ b/arch/arm/dts/rk3328-sdram-ddr3-666.dtsi
@@ -18,6 +18,8 @@
 		0
 		0x10
 		0x10
+		0x10
+		0x10
 		0
 
 		0x9028b189
diff --git a/arch/arm/dts/rk3328-sdram-ddr4-666.dtsi b/arch/arm/dts/rk3328-sdram-ddr4-666.dtsi
index 5928ce2b1c..a41418270c 100644
--- a/arch/arm/dts/rk3328-sdram-ddr4-666.dtsi
+++ b/arch/arm/dts/rk3328-sdram-ddr4-666.dtsi
@@ -15,6 +15,8 @@
 		0
 		0x11
 		0x0
+		0x0
+		0x0
 		0
 
 		0x94291288
diff --git a/arch/arm/dts/rk3328-sdram-lpddr3-666.dtsi b/arch/arm/dts/rk3328-sdram-lpddr3-666.dtsi
index 5e89c23d22..f1ff14a14a 100644
--- a/arch/arm/dts/rk3328-sdram-lpddr3-666.dtsi
+++ b/arch/arm/dts/rk3328-sdram-lpddr3-666.dtsi
@@ -18,6 +18,8 @@
 		0
 		0x10
 		0x10
+		0x10
+		0x10
 		0
 
 		0x0c48a18a
diff --git a/arch/arm/dts/rk3399-sdram-ddr3-1333.dtsi b/arch/arm/dts/rk3399-sdram-ddr3-1333.dtsi
index 7f8fd307fe..5dc8da44a1 100644
--- a/arch/arm/dts/rk3399-sdram-ddr3-1333.dtsi
+++ b/arch/arm/dts/rk3399-sdram-ddr3-1333.dtsi
@@ -18,6 +18,8 @@
 		0
 		0xf
 		0xf
+		0xf
+		0xf
 		1
 		0x80120e12
 		0x11030802
@@ -37,6 +39,8 @@
 		0
 		0xf
 		0xf
+		0xf
+		0xf
 		1
 		0x80120e12
 		0x11030802
diff --git a/arch/arm/dts/rk3399-sdram-ddr3-1600.dtsi b/arch/arm/dts/rk3399-sdram-ddr3-1600.dtsi
index a4217ffed8..f4d23f372f 100644
--- a/arch/arm/dts/rk3399-sdram-ddr3-1600.dtsi
+++ b/arch/arm/dts/rk3399-sdram-ddr3-1600.dtsi
@@ -18,6 +18,8 @@
 		0
 		0xf
 		0xf
+		0xf
+		0xf
 		1
 		0x80151015
 		0x14040902
@@ -37,6 +39,8 @@
 		0
 		0xf
 		0xf
+		0xf
+		0xf
 		1
 		0x80151015
 		0x14040902
diff --git a/arch/arm/dts/rk3399-sdram-ddr3-1866.dtsi b/arch/arm/dts/rk3399-sdram-ddr3-1866.dtsi
index 1bcdcc464f..08a9a7b3f2 100644
--- a/arch/arm/dts/rk3399-sdram-ddr3-1866.dtsi
+++ b/arch/arm/dts/rk3399-sdram-ddr3-1866.dtsi
@@ -18,6 +18,8 @@
 		0
 		0xf
 		0xf
+		0xf
+		0xf
 		1
 		0x80181219
 		0x17050a03
@@ -37,6 +39,8 @@
 		0
 		0xf
 		0xf
+		0xf
+		0xf
 		1
 		0x80181219
 		0x17050a03
diff --git a/arch/arm/dts/rk3399-sdram-ddr3-4G-1600.dtsi b/arch/arm/dts/rk3399-sdram-ddr3-4G-1600.dtsi
index fa56142ff7..358892ae23 100644
--- a/arch/arm/dts/rk3399-sdram-ddr3-4G-1600.dtsi
+++ b/arch/arm/dts/rk3399-sdram-ddr3-4G-1600.dtsi
@@ -18,6 +18,8 @@
 		0
 		0xf
 		0xf
+		0xf
+		0xf
 		1
 		0x80151015
 		0x14040902
@@ -37,6 +39,8 @@
 		0
 		0xf
 		0xf
+		0xf
+		0xf
 		1
 		0x80151015
 		0x14040902
diff --git a/arch/arm/dts/rk3399-sdram-lpddr3-4GB-1600.dtsi b/arch/arm/dts/rk3399-sdram-lpddr3-4GB-1600.dtsi
index 7f8ada044f..9b76774323 100644
--- a/arch/arm/dts/rk3399-sdram-lpddr3-4GB-1600.dtsi
+++ b/arch/arm/dts/rk3399-sdram-lpddr3-4GB-1600.dtsi
@@ -18,6 +18,8 @@
 		0
 		0xf
 		0xf
+		0xf
+		0xf
 		1
 		0x1d191519
 		0x14040808
@@ -37,6 +39,8 @@
 		0
 		0xf
 		0xf
+		0xf
+		0xf
 		1
 		0x1d191519
 		0x14040808
diff --git a/arch/arm/dts/rk3399-sdram-lpddr4-100.dtsi b/arch/arm/dts/rk3399-sdram-lpddr4-100.dtsi
index 9f30035b69..c4dc886ef3 100644
--- a/arch/arm/dts/rk3399-sdram-lpddr4-100.dtsi
+++ b/arch/arm/dts/rk3399-sdram-lpddr4-100.dtsi
@@ -15,6 +15,8 @@
 		0
 		0xf
 		0xf
+		0xf
+		0xf
 		1
 		0x80241d22
 		0x15050f08
@@ -34,6 +36,8 @@
 		0
 		0xf
 		0xf
+		0xf
+		0xf
 		1
 		0x80241d22
 		0x15050f08
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h b/arch/arm/include/asm/arch-rockchip/sdram_common.h
index e8e2eb9899..859a3c237f 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_common.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_common.h
@@ -235,6 +235,8 @@ struct sdram_cap_info {
 	unsigned int cs3_row;
 	unsigned int cs0_high16bit_row;
 	unsigned int cs1_high16bit_row;
+	unsigned int cs2_high16bit_row;
+	unsigned int cs3_high16bit_row;
 	unsigned int ddrconfig;
 };
 
@@ -433,7 +435,7 @@ int sdram_detect_row(struct sdram_cap_info *cap_info,
 		     u32 coltmp, u32 bktmp, u32 rowtmp);
 int sdram_detect_row_3_4(struct sdram_cap_info *cap_info,
 			 u32 coltmp, u32 bktmp);
-int sdram_detect_high_row(struct sdram_cap_info *cap_info);
+int sdram_detect_high_row(struct sdram_cap_info *cap_info, u32 dramtype);
 int sdram_detect_cs1_row(struct sdram_cap_info *cap_info, u32 dram_type);
 
 void sdram_print_dram_type(unsigned char dramtype);
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rv1126.h b/arch/arm/include/asm/arch-rockchip/sdram_rv1126.h
index 1785acf752..1e2ef421ff 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_rv1126.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_rv1126.h
@@ -254,6 +254,10 @@
 #define CRU_CLKSFTRST_CON_BASE		0x300
 #define CRU_CLKSFTRST_CON(i)		(CRU_CLKSFTRST_CON_BASE + ((i) * 4))
 
+/* SGRF_SOC_CON2 */
+#define MSCH_AXI_BYPASS_ALL_MASK	(1)
+#define MSCH_AXI_BYPASS_ALL_SHIFT	(15)
+
 /* SGRF_SOC_CON12 */
 #define CLK_DDR_UPCTL_EN_MASK		((0x1 << 2) << 16)
 #define CLK_DDR_UPCTL_EN_SHIFT		(2)
diff --git a/drivers/ram/rockchip/sdram_common.c b/drivers/ram/rockchip/sdram_common.c
index 71afffffc2..f10efb84a1 100644
--- a/drivers/ram/rockchip/sdram_common.c
+++ b/drivers/ram/rockchip/sdram_common.c
@@ -80,8 +80,18 @@ void sdram_print_ddr_info(struct sdram_cap_info *cap_info,
 	if (cap_info->rank > 2) {
 		printascii(" CS2 Row=");
 		printdec(cap_info->cs2_row);
+		if (cap_info->cs2_high16bit_row !=
+			cap_info->cs2_row) {
+			printascii("/");
+			printdec(cap_info->cs2_high16bit_row);
+		}
 		printascii(" CS3 Row=");
 		printdec(cap_info->cs3_row);
+		if (cap_info->cs3_high16bit_row !=
+			cap_info->cs3_row) {
+			printascii("/");
+			printdec(cap_info->cs3_high16bit_row);
+		}
 	}
 	printascii(" CS=");
 	printdec(cap_info->rank);
@@ -402,10 +412,85 @@ int sdram_detect_row_3_4(struct sdram_cap_info *cap_info,
 	return 0;
 }
 
-int sdram_detect_high_row(struct sdram_cap_info *cap_info)
+int sdram_detect_high_row(struct sdram_cap_info *cap_info, u32 dramtype)
 {
-	cap_info->cs0_high16bit_row = cap_info->cs0_row;
-	cap_info->cs1_high16bit_row = cap_info->cs1_row;
+	unsigned long base_addr;
+	u32 cs0_high_row, cs1_high_row, cs;
+	u64 cap = 0, cs0_cap = 0;
+	u32 i;
+	void __iomem *test_addr, *test_addr1;
+#ifdef CONFIG_ROCKCHIP_RK3568
+	u32 cs2_high_row, cs3_high_row;
+#endif
+
+	cs = cap_info->rank;
+	/* 8bit bandwidth no enable axi split*/
+	if (!cap_info->bw) {
+		cs0_high_row = cap_info->cs0_row;
+		cs1_high_row = cap_info->cs1_row;
+	#ifdef CONFIG_ROCKCHIP_RK3568
+		if (cs > 2) {
+			cs2_high_row = cap_info->cs2_row;
+			cs3_high_row = cap_info->cs3_row;
+		}
+	#endif
+		goto out;
+	}
+#ifdef CONFIG_ROCKCHIP_RK3568
+	if (cs > 2) {
+		cs0_high_row = cap_info->cs0_row;
+		cs1_high_row = cap_info->cs1_row;
+		cs2_high_row = cap_info->cs2_row;
+		cs3_high_row = cap_info->cs3_row;
+
+		goto out;
+	}
+#endif
+
+	cs0_cap = sdram_get_cs_cap(cap_info, 0, dramtype);
+	if (cs == 2) {
+		base_addr = CONFIG_SYS_SDRAM_BASE + cs0_cap;
+		cap = sdram_get_cs_cap(cap_info, 1, dramtype);
+	} else {
+		base_addr = CONFIG_SYS_SDRAM_BASE;
+		cap = cs0_cap;
+	}
+	/* detect full bandwidth size */
+	for (i = 0; i < 4; i++) {
+		test_addr = (void __iomem *)base_addr;
+		test_addr1 = (void __iomem *)(base_addr +
+			     (unsigned long)(cap / (1ul << (i + 1))));
+		writel(0x0, test_addr);
+		writel(PATTERN, test_addr1);
+		if ((readl(test_addr) == 0x0) &&
+		    (readl(test_addr1) == PATTERN))
+			break;
+	}
+	if (i == 4 && cs == 1) {
+		printascii("can't support this cap\n");
+		return -1;
+	}
+
+	if (cs == 2) {
+		cs0_high_row = cap_info->cs0_row;
+		if (i == 4)
+			cs1_high_row = 0;
+		else
+			cs1_high_row = cap_info->cs1_row - i;
+	} else {
+		cs0_high_row = cap_info->cs0_row - i;
+		cs1_high_row = 0;
+	}
+
+out:
+	cap_info->cs0_high16bit_row = cs0_high_row;
+	cap_info->cs1_high16bit_row = cs1_high_row;
+#ifdef CONFIG_ROCKCHIP_RK3568
+	if (cs > 2) {
+		cap_info->cs2_high16bit_row = cs2_high_row;
+		cap_info->cs3_high16bit_row = cs3_high_row;
+	}
+#endif
 
 	return 0;
 }
diff --git a/drivers/ram/rockchip/sdram_px30.c b/drivers/ram/rockchip/sdram_px30.c
index 0a6723d0d8..4bbbc8f42f 100644
--- a/drivers/ram/rockchip/sdram_px30.c
+++ b/drivers/ram/rockchip/sdram_px30.c
@@ -627,7 +627,7 @@ static int sdram_init_detect(struct dram_info *dram,
 		writel(sys_reg3, &dram->pmugrf->os_reg[3]);
 	}
 
-	ret = sdram_detect_high_row(cap_info);
+	ret = sdram_detect_high_row(cap_info, sdram_params->base.dramtype);
 
 out:
 	return ret;
diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
index ecc4aa12e5..daa3aa5959 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -62,6 +62,7 @@ struct dram_info {
 #define DDR_PHY_BASE_ADDR		0xff4a0000
 #define UPCTL2_BASE_ADDR		0xffa50000
 
+#define SGRF_SOC_CON2			0x8
 #define SGRF_SOC_CON12			0x30
 #define SGRF_SOC_CON13			0x34
 
@@ -2183,6 +2184,66 @@ static void update_noc_timing(struct dram_info *dram,
 	       &dram->msch->ddr4timing);
 }
 
+static int split_setup(struct dram_info *dram,
+		       struct rv1126_sdram_params *sdram_params)
+{
+	struct sdram_cap_info *cap_info = &sdram_params->ch.cap_info;
+	u32 dramtype = sdram_params->base.dramtype;
+	u32 split_size, split_mode;
+	u64 cs_cap[2], cap;
+
+	cs_cap[0] = sdram_get_cs_cap(cap_info, 0, dramtype);
+	cs_cap[1] = sdram_get_cs_cap(cap_info, 1, dramtype);
+	/* only support the larger cap is in low 16bit */
+	if (cap_info->cs0_high16bit_row < cap_info->cs0_row) {
+		cap = cs_cap[0] / (1 << (cap_info->cs0_row -
+		cap_info->cs0_high16bit_row));
+	} else if ((cap_info->cs1_high16bit_row < cap_info->cs1_row) &&
+		   (cap_info->rank == 2)) {
+		if (!cap_info->cs1_high16bit_row)
+			cap = cs_cap[0];
+		else
+			cap = cs_cap[0] + cs_cap[1] / (1 << (cap_info->cs1_row -
+				cap_info->cs1_high16bit_row));
+	} else {
+		goto out;
+	}
+	split_size = (u32)(cap >> 24) & SPLIT_SIZE_MASK;
+	if (cap_info->bw == 2)
+		split_mode = SPLIT_MODE_32_L16_VALID;
+	else
+		split_mode = SPLIT_MODE_16_L8_VALID;
+
+	rk_clrsetreg(&dram->ddrgrf->grf_ddrsplit_con,
+		     (SPLIT_MODE_MASK << SPLIT_MODE_OFFSET) |
+		     (SPLIT_BYPASS_MASK << SPLIT_BYPASS_OFFSET) |
+		     (SPLIT_SIZE_MASK << SPLIT_SIZE_OFFSET),
+		     (split_mode << SPLIT_MODE_OFFSET) |
+		     (0x0 << SPLIT_BYPASS_OFFSET) |
+		     (split_size << SPLIT_SIZE_OFFSET));
+
+	rk_clrsetreg(BUS_SGRF_BASE_ADDR + SGRF_SOC_CON2,
+		     MSCH_AXI_BYPASS_ALL_MASK << MSCH_AXI_BYPASS_ALL_SHIFT,
+		     0x0 << MSCH_AXI_BYPASS_ALL_SHIFT);
+
+out:
+	return 0;
+}
+
+static void split_bypass(struct dram_info *dram)
+{
+	if ((readl(&dram->ddrgrf->grf_ddrsplit_con) &
+	     (1 << SPLIT_BYPASS_OFFSET)) != 0)
+		return;
+
+	/* bypass split */
+	rk_clrsetreg(&dram->ddrgrf->grf_ddrsplit_con,
+		     (SPLIT_BYPASS_MASK << SPLIT_BYPASS_OFFSET) |
+		     (SPLIT_SIZE_MASK << SPLIT_SIZE_OFFSET),
+		     (0x1 << SPLIT_BYPASS_OFFSET) |
+		     (0x0 << SPLIT_SIZE_OFFSET));
+}
+
 static void dram_all_config(struct dram_info *dram,
 			    struct rv1126_sdram_params *sdram_params)
 {
@@ -2258,6 +2319,8 @@ static void ddr_set_atags(struct dram_info *dram,
 	struct tag_soc_info t_socinfo;
 	u64 cs_cap[2];
 	u32 cs_pst = 0;
+	u32 split, split_size;
+	u64 reduce_cap = 0;
 
 	cs_cap[0] = sdram_get_cs_cap(cap_info, 0, dram_type);
 	cs_cap[1] = sdram_get_cs_cap(cap_info, 1, dram_type);
@@ -2274,10 +2337,14 @@ static void ddr_set_atags(struct dram_info *dram,
 	atags_destroy();
 	atags_set_tag(ATAG_SERIAL,  &t_serial);
 
+	split = readl(&dram->ddrgrf->grf_ddrsplit_con);
 	memset(&t_ddrmem, 0, sizeof(struct tag_ddr_mem));
 	if (cap_info->row_3_4) {
 		cs_cap[0] =  cs_cap[0] * 3 / 4;
 		cs_cap[1] =  cs_cap[1] * 3 / 4;
+	} else if (!(split & (1 << SPLIT_BYPASS_OFFSET))) {
+		split_size = (split >> SPLIT_SIZE_OFFSET) & SPLIT_SIZE_MASK;
+		reduce_cap = (cs_cap[0] + cs_cap[1] - (split_size << 24)) / 2;
 	}
 	t_ddrmem.version = 0;
 	t_ddrmem.bank[0] = CONFIG_SYS_SDRAM_BASE;
@@ -2290,10 +2357,10 @@ static void ddr_set_atags(struct dram_info *dram,
 		t_ddrmem.count = 2;
 		t_ddrmem.bank[1] = 1 << cs_pst;
 		t_ddrmem.bank[2] = cs_cap[0];
-		t_ddrmem.bank[3] = cs_cap[1];
+		t_ddrmem.bank[3] = cs_cap[1] - reduce_cap;
 	} else {
 		t_ddrmem.count = 1;
-		t_ddrmem.bank[1] = (u64)cs_cap[0] + (u64)cs_cap[1];
+		t_ddrmem.bank[1] = (u64)cs_cap[0] + (u64)cs_cap[1] - reduce_cap;
 	}
 
 	atags_set_tag(ATAG_DDR_MEM,  &t_ddrmem);
@@ -2637,6 +2704,7 @@ static int sdram_init_detect(struct dram_info *dram,
 			return -1;
 	}
 
+	split_bypass(dram);
 	if (dram_detect_cap(dram, sdram_params, 0) != 0)
 		return -1;
 
@@ -2657,8 +2725,8 @@ static int sdram_init_detect(struct dram_info *dram,
 		writel(sys_reg3, &dram->pmugrf->os_reg[3]);
 	}
 
-	sdram_detect_high_row(cap_info);
-
+	sdram_detect_high_row(cap_info, sdram_params->base.dramtype);
+	split_setup(dram, sdram_params);
 out:
 	return ret;
 }

commit 0367dfefd7dceefdbde5f0517ac8e0aa6f34e4cd
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Wed Jan 13 17:35:06 2021 +0800

    drivers: ram: rv1126: add ssmod support
    
    It can enable ssmod by loader parameter of g_2t_info.
    And default is disabled.
    
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
    Change-Id: I914ddcc33602bdc7b67b220bd562f5b16750c79b

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h b/arch/arm/include/asm/arch-rockchip/sdram_common.h
index 77d06bbb38..e8e2eb9899 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_common.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_common.h
@@ -42,9 +42,9 @@
 #define STRIDE_TYPE(n)			(((n) >> 16) & 0xff)
 
 #define DDR_2T_INFO(n)			((n) & 1)
-#define SSMOD_SPREAD(n)			(((n) >> 1) & 0x1f)
-#define SSMOD_DIV(n)			(((n) >> 6) & 0xf)
-#define SSMOD_DOWNSPREAD(n)		(((n) >> 10) & 0x1)
+#define PLL_SSMOD_SPREAD(n)		(((n) >> 1) & 0x1f)
+#define PLL_SSMOD_DIV(n)		(((n) >> 6) & 0xf)
+#define PLL_SSMOD_DOWNSPREAD(n)		(((n) >> 10) & 0x1)
 
 /* sdram_head_info_v2 define */
 /* for *_drv_odten and *_drv_odtoff */
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rv1126.h b/arch/arm/include/asm/arch-rockchip/sdram_rv1126.h
index 35f9cfaed0..1785acf752 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_rv1126.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_rv1126.h
@@ -222,6 +222,14 @@
 #define POSTDIV2(n)			((0x7 << (6 + 16)) | ((n) << 6))
 #define REFDIV(n)			((0x3F << 16) | (n))
 
+/* CRU_PLL_CON3 */
+#define SSMOD_SPREAD(n)			((0x1f << (8 + 16)) | ((n) << 8))
+#define SSMOD_DIVVAL(n)			((0xf << (4 + 16)) | ((n) << 4))
+#define SSMOD_DOWNSPREAD(n)		((0x1 << (3 + 16)) | ((n) << 3))
+#define SSMOD_RESET(n)			((0x1 << (2 + 16)) | ((n) << 2))
+#define SSMOD_DIS_SSCG(n)		((0x1 << (1 + 16)) | ((n) << 1))
+#define SSMOD_BP(n)			((0x1 << (0 + 16)) | ((n) << 0))
+
 /* CRU_MODE */
 #define CLOCK_FROM_XIN_OSC		(0)
 #define CLOCK_FROM_PLL			(1)
diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
index bbe276401c..ecc4aa12e5 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -303,7 +303,15 @@ static void rkclk_set_dpll(struct dram_info *dram, unsigned int hz)
 	unsigned int refdiv, postdiv1, postdiv2, fbdiv;
 	int delay = 1000;
 	u32 mhz = hz / MHz;
+	struct global_info *gbl_info;
+	struct sdram_head_info_index_v2 *index =
+		(struct sdram_head_info_index_v2 *)common_info;
+	u32 ssmod_info;
+	u32 dsmpd = 1;
 
+	gbl_info = (struct global_info *)((void *)common_info +
+		    index->global_index.offset * 4);
+	ssmod_info = gbl_info->info_2t;
 	refdiv = 1;
 	if (mhz <= 100) {
 		postdiv1 = 6;
@@ -330,7 +338,20 @@ static void rkclk_set_dpll(struct dram_info *dram, unsigned int hz)
 
 	writel(0x1f000000, &dram->cru->clksel_con[64]);
 	writel(POSTDIV1(postdiv1) | FBDIV(fbdiv), &dram->cru->pll[1].con0);
-	writel(DSMPD(1) | POSTDIV2(postdiv2) | REFDIV(refdiv),
+	/* enable ssmod */
+	if (PLL_SSMOD_SPREAD(ssmod_info)) {
+		dsmpd = 0;
+		clrsetbits_le32(&dram->cru->pll[1].con2,
+				0xffffff << 0, 0x0 << 0);
+		writel(SSMOD_SPREAD(PLL_SSMOD_SPREAD(ssmod_info)) |
+		       SSMOD_DIVVAL(PLL_SSMOD_DIV(ssmod_info)) |
+		       SSMOD_DOWNSPREAD(PLL_SSMOD_DOWNSPREAD(ssmod_info)) |
+		       SSMOD_RESET(0) |
+		       SSMOD_DIS_SSCG(0) |
+		       SSMOD_BP(0),
+		       &dram->cru->pll[1].con3);
+	}
+	writel(DSMPD(dsmpd) | POSTDIV2(postdiv2) | REFDIV(refdiv),
 	       &dram->cru->pll[1].con1);
 
 	while (delay > 0) {

commit 35b12ca6a7662b4343eeacff02edcdd11488ae6b
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Wed Jan 13 17:33:48 2021 +0800

    drivers: ram: rv1126: fix lpddr4 phy side odt err
    
    The minimum odt in phy side is 80ohm in VDDQ/2.5
    
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
    Change-Id: Iae6cf27906dd0501a167063e9a1f33bef51f7866

diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-loader_params.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-loader_params.inc
index d1ceb58236..765c9417a3 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-loader_params.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-loader_params.inc
@@ -93,7 +93,7 @@
 (38 << PHY_DQ_DRV_SHIFT) | (46 << PHY_CA_DRV_SHIFT) |
 	(38 << PHY_CLK_DRV_SHIFT) | (40 << DRAM_DQ_DRV_SHIFT),
 /* odt info and PU-cal info */
-(240 << DRAM_ODT_SHIFT) | (60 << PHY_ODT_SHIFT) |
+(240 << DRAM_ODT_SHIFT) | (80 << PHY_ODT_SHIFT) |
 	(0 << LP4_CA_ODT_SHIFT) |
 	(LPDDR4_VDDQ_2_5 << LP4_DRV_PU_CAL_ODTEN_SHIFT) |
 	(LPDDR4_VDDQ_2_5 << LP4_DRV_PU_CAL_ODTOFF_SHIFT) |

commit 22b43223bd445586c65603755c5932120b63d0b6
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Wed Jan 13 17:23:53 2021 +0800

    drivers: ram: rv1126: workaround pageclose bug
    
    If setting pageclose = 1 && pageclose_timer = 0, will data err
    in lp4 328MHz. But running ok in 1056MHz.
    
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
    Change-Id: Iebc32d05ea0740c0e848bfd1abd341d8bc12f44d

diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
index b6ad3ac446..bbe276401c 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -2320,11 +2320,14 @@ static int sdram_init_(struct dram_info *dram,
 	pctl_cfg(dram->pctl, &sdram_params->pctl_regs,
 		 dram->sr_idle, dram->pd_idle);
 
-	if (sdram_params->ch.cap_info.bw == 2)
+	if (sdram_params->ch.cap_info.bw == 2) {
 		/* 32bit interface use pageclose */
 		setbits_le32(pctl_base + DDR_PCTL2_SCHED, 1 << 2);
-	else
+		/* pageclose = 1, pageclose_timer = 0 will err in lp4 328MHz */
+		clrsetbits_le32(pctl_base + DDR_PCTL2_SCHED1, 0xff, 0x1 << 0);
+	} else {
 		clrbits_le32(pctl_base + DDR_PCTL2_SCHED, 1 << 2);
+	}
 
 #ifdef CONFIG_ROCKCHIP_DRAM_EXTENDED_TEMP_SUPPORT
 	u32 tmp, trefi;

commit 74b82d96352d663d36c285f7ac3c44c046222db1
Author: Zorro Liu <lyx@rock-chips.com>
Date:   Sat Jun 19 17:49:42 2021 +0800

    tools: rockchip: bmp2gray16: support eink power off logo
    
    Signed-off-by: Zorro Liu <lyx@rock-chips.com>
    Change-Id: I61c134868f1e7fdbb98c8c078b47be028bde8c91

diff --git a/tools/rockchip/bmp2gray16.c b/tools/rockchip/bmp2gray16.c
old mode 100755
new mode 100644
index a7f3d68f5b..a331d14397
--- a/tools/rockchip/bmp2gray16.c
+++ b/tools/rockchip/bmp2gray16.c
@@ -133,6 +133,8 @@ void usage(void)
 	printf("\t\t\t Pack low power logo to logo.img from given path\n");
 	printf("\t --kernel-logo path");
 	printf("\t\t\t Pack low power logo to logo.img from given path\n");
+	printf("\t --poweroff-logo path");
+	printf("\t\t\t Pack power off logo to logo.img from given path\n");
 	printf("\t --output path");
 	printf("\t\t\t Output the grayscale image to path\n");
 }
@@ -459,6 +461,18 @@ int main(int argc, char *argv[])
 			in_img_info[logo_count].logo_type = EINK_LOGO_KERNEL;
 			logo_count++;
 			argc--, argv++;
+		} else if (!strcmp("--poweroff-logo", arg)) {
+			int len = strlen(argv[0]);
+
+			if (len > 256) {
+				printf("Poweroff logo path %s is too long\n",
+				       argv[0]);
+				return -1;
+			}
+			memcpy(in_img_info[logo_count].path, argv[0], len);
+			in_img_info[logo_count].logo_type = EINK_LOGO_POWEROFF;
+			logo_count++;
+			argc--, argv++;
 		}  else if (!strcmp("--screen-width", arg)) {
 			screen_w = strtoul(argv[0], NULL, 10);
 			argc--, argv++;

commit 77bac292f4ebd0ec3e4e2e49c2af5551cbc57f2d
Author: Zorro Liu <lyx@rock-chips.com>
Date:   Sat Jun 19 17:48:50 2021 +0800

    rk_eink: support show poweroff image
    
    Signed-off-by: Zorro Liu <lyx@rock-chips.com>
    Change-Id: I138a181901c51a45fe4b5aba1c74e1efa344adc4

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index aaa02b3d74..bb5855dbf6 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -588,15 +588,15 @@ static int charge_animation_show(struct udevice *dev)
 			       charging);
 #ifdef CONFIG_ROCKCHIP_EINK_DISPLAY
 			/*
-			 * If charger is plug out during charging, display white
-			 * screen before device power off.
+			 * If charger is plug out during charging, display poweroff
+			 * image before device power off.
 			 * Irq must be enable if CONFIG_IRQ is defined, because
 			 * ebc need to wait irq to indicate frame is complete.
 			 */
 #ifdef CONFIG_IRQ
 			local_irq_enable();
 #endif
-			ret = rockchip_eink_show_charge_logo(EINK_LOGO_RESET);
+			ret = rockchip_eink_show_charge_logo(EINK_LOGO_POWEROFF);
 			if (ret != 0)
 				printf("Eink display reset logo failed\n");
 #ifdef CONFIG_IRQ
diff --git a/drivers/video/rk_eink/rk_eink_display.c b/drivers/video/rk_eink/rk_eink_display.c
index 523c55923c..a2040dd836 100644
--- a/drivers/video/rk_eink/rk_eink_display.c
+++ b/drivers/video/rk_eink/rk_eink_display.c
@@ -216,6 +216,7 @@ static int get_addr_by_type(struct udevice *dev, u32 logo_type)
 	case EINK_LOGO_CHARGING_4:
 	case EINK_LOGO_CHARGING_5:
 	case EINK_LOGO_CHARGING_LOWPOWER:
+	case EINK_LOGO_POWEROFF:
 	/*
 	 * The MIRROR_TEMP_BUF is used to save the
 	 * non-mirror image data.
@@ -582,41 +583,6 @@ static int rockchip_eink_show_logo(int cur_logo_type, int update_mode)
 			printf("Invalid last logo addr, exit!\n");
 			goto out;
 		}
-
-		/* The last logo of charging logo display */
-		if (cur_logo_type == EINK_LOGO_RESET) {
-			struct udevice *ebc_tcon_dev = priv->ebc_tcon_dev;
-			struct rk_ebc_tcon_ops *ebc_tcon_ops;
-
-			logo_addr = get_addr_by_type(dev, EINK_LOGO_RESET);
-			eink_display(dev, last_logo_addr,
-				     logo_addr,
-				     WF_TYPE_GC16, update_mode);
-			last_logo_type = -1;
-			/*
-			 * For normal logo display, waiting for the last frame
-			 * completion before start a new frame, except one
-			 * situation which charging logo display finished,
-			 * because device will rebooting or shutdown after
-			 * charging logo is competed.
-			 *
-			 * We should take care of the power sequence,
-			 * because ebc can't power off if last frame
-			 * data is still sending, so keep the ebc power
-			 * during u-boot phase and shutdown the
-			 * power only if uboot charging is finished.
-			 */
-			ebc_tcon_ops = ebc_tcon_get_ops(ebc_tcon_dev);
-			ebc_tcon_ops->wait_for_last_frame_complete(ebc_tcon_dev);
-			debug("charging logo displaying is complete\n");
-			/*
-			 *shutdown ebc after charging logo display is complete
-			 */
-			ret = ebc_power_set(dev, EBC_PWR_DOWN);
-			if (ret)
-				printf("Eink power down failed\n");
-			goto out;
-		}
 	}
 	ret = read_needed_logo_from_partition(dev, cur_logo_type,
 					      &loaded_logo);
@@ -640,6 +606,37 @@ static int rockchip_eink_show_logo(int cur_logo_type, int update_mode)
 		backlight_enable(priv->backlight);
 
 	last_logo_type = cur_logo_type;
+
+	if (cur_logo_type == EINK_LOGO_POWEROFF) {
+		struct udevice *ebc_tcon_dev = priv->ebc_tcon_dev;
+		struct rk_ebc_tcon_ops *ebc_tcon_ops;
+
+		last_logo_type = -1;
+		/*
+		 * For normal logo display, waiting for the last frame
+		 * completion before start a new frame, except one
+		 * situation which charging logo display finished,
+		 * because device will rebooting or shutdown after
+		 * charging logo is competed.
+		 *
+		 * We should take care of the power sequence,
+		 * because ebc can't power off if last frame
+		 * data is still sending, so keep the ebc power
+		 * during u-boot phase and shutdown the
+		 * power only if uboot charging is finished.
+		 */
+		ebc_tcon_ops = ebc_tcon_get_ops(ebc_tcon_dev);
+		ebc_tcon_ops->wait_for_last_frame_complete(ebc_tcon_dev);
+		debug("charging logo displaying is complete\n");
+		/*
+		 *shutdown ebc after charging logo display is complete
+		 */
+		ret = ebc_power_set(dev, EBC_PWR_DOWN);
+		if (ret)
+			printf("Eink power down failed\n");
+		goto out;
+	}
+
 	/*
 	 * System will boot up to kernel only when the
 	 * logo is uboot logo
diff --git a/include/rk_eink.h b/include/rk_eink.h
index 2720233f16..27dd66e09e 100644
--- a/include/rk_eink.h
+++ b/include/rk_eink.h
@@ -18,7 +18,8 @@ enum type_logo {
 	EINK_LOGO_CHARGING_4 = 1 << 6,
 	EINK_LOGO_CHARGING_5 = 1 << 7,
 	EINK_LOGO_CHARGING_LOWPOWER = 1 << 8,
-	EINK_LOGO_UNMIRROR_TEMP_BUF = 1 << 9,
+	EINK_LOGO_POWEROFF = 1 << 9,
+	EINK_LOGO_UNMIRROR_TEMP_BUF = 1 << 10,
 };
 
 enum update_mode {

commit 479a1588f9570cee4f7c0f720066a639c3b276c9
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue Jun 15 09:31:23 2021 +0800

    mtd: mtd_blk: Ensure the right mtd device information
    
    According to the following situations:
      1.mtd device get full mtd device information after add_mtd_device();
      2.sf_mtd.c not public the sf_mtd_info which is add_mtd_device();
      3.sf_probe.c probe mtd_blk with the another mtd variable which's
        information is incomplete and get from dev_get_uclass_priv.
    The mtd_blk can not get the correct information in sfc_nor case.
    So add the information here to avoid these situations.
    
    Btw, mtd operation is base on sf_mtd_info, and mtd_blk operation is
    base one the variable in uclass_priv data.
    
    Change-Id: I8839c3d9e3d263b79a411cf845e4865f622225c3
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index 075dadb5ca..456616fe12 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -10,6 +10,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <image.h>
+#include <linux/log2.h>
 #include <malloc.h>
 #include <nand.h>
 #include <part.h>
@@ -650,6 +651,20 @@ static int mtd_blk_probe(struct udevice *udev)
 #endif
 	}
 
+	/* Fill mtd devices information */
+	if (is_power_of_2(mtd->erasesize))
+		mtd->erasesize_shift = ffs(mtd->erasesize) - 1;
+	else
+		mtd->erasesize_shift = 0;
+
+	if (is_power_of_2(mtd->writesize))
+		mtd->writesize_shift = ffs(mtd->writesize) - 1;
+	else
+		mtd->writesize_shift = 0;
+
+	mtd->erasesize_mask = (1 << mtd->erasesize_shift) - 1;
+	mtd->writesize_mask = (1 << mtd->writesize_shift) - 1;
+
 	desc->bdev->priv = mtd;
 	sprintf(desc->vendor, "0x%.4x", 0x2207);
 	if (strncmp(mtd->name, "nand", 4) == 0)

commit 4e2fd546b08aeb23e5de3fd6216a7abd2fdf8965
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue Jun 15 09:25:38 2021 +0800

    Revert "mtd: spinor: Add more mtd information"
    
    This reverts commit 8ff9c29cc8f6c82d68b6e1f3d373e0f4e78b087c.
    
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    Change-Id: I72d3409e3bb3061492de1023b269acb5dfd93667

diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 54c0ece37f..1acff745d1 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -2288,11 +2288,6 @@ int spi_nor_scan(struct spi_nor *nor)
 	mtd->size = params.size;
 	mtd->_erase = spi_nor_erase;
 	mtd->_read = spi_nor_read;
-	if (is_power_of_2(mtd->erasesize))
-		mtd->erasesize_shift = ffs(mtd->erasesize) - 1;
-	else
-		mtd->erasesize_shift = 0;
-	mtd->erasesize_mask = (1 << mtd->erasesize_shift) - 1;
 
 #if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST)
 	/* NOR protection support for STmicro/Micron chips and similar */

commit 51c7597e6d2c6d74108af1078d869d6ff6a5f16b
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Tue Jun 15 15:26:44 2021 +0800

    configs: rk3568_defconfig: select CONFIG_DM_REGULATOR_GPIO
    
    Change-Id: I0b87251ba47e2436305b9d737c6c16f07f32aaf5
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index 8f7e80473b..854682980b 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -148,6 +148,7 @@ CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_FAN53555=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
 CONFIG_REGULATOR_RK8XX=y
 CONFIG_DM_CHARGE_DISPLAY=y
 CONFIG_CHARGE_ANIMATION=y
@@ -211,6 +212,6 @@ CONFIG_AVB_LIBAVB_AB=y
 CONFIG_AVB_LIBAVB_ATX=y
 CONFIG_AVB_LIBAVB_USER=y
 CONFIG_RK_AVB_LIBAVB_USER=y
-CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
 CONFIG_OPTEE_CLIENT=y
 CONFIG_OPTEE_V2=y
+CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y

commit c879435248277e3f357c3d9f45f12cde1b408085
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 2 09:49:15 2021 +0800

    tools: rkcommon: rename "rk356x" to "rk3568"
    
    In order to use "./make.sh --idblock [arg...]" without setting
    a special case for rk3568 in the make.sh.
    
    make.sh simply parse plat name from the file name:
    include/configs/[xxx]_common.h.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I5a3d3fd8e9579d10306a14a174ab426ec4b05424

diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index af2a4835f6..738e365d74 100644
--- a/tools/rkcommon.c
+++ b/tools/rkcommon.c
@@ -136,7 +136,7 @@ static struct spl_info spl_infos[] = {
 	{ "rv1108", "RK11", 0x1800, false, RK_HEADER_V1 },
 	{ "rv1126", "110B", 0x10000 - 0x1000, false, RK_HEADER_V1 },
 	{ "rk1808", "RK18", 0x200000 - 0x2000, false, RK_HEADER_V1 },
-	{ "rk356x", "RK35", 0x10000 - 0x1000, false, RK_HEADER_V2 },
+	{ "rk3568", "RK35", 0x10000 - 0x1000, false, RK_HEADER_V2 },
 };
 
 /**

commit 08c402d4e1990cf3f82cbdaeab503bec4dee4a10
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Thu Jun 10 18:07:29 2021 +0800

    video/drm: add framebuffer_info
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: I80dc55082671856fcef441b23f591a640957b7bf

diff --git a/include/edid.h b/include/edid.h
index ddea22bd6f..6dc5564366 100644
--- a/include/edid.h
+++ b/include/edid.h
@@ -804,6 +804,12 @@ struct base2_gamma_lut_data {
 	u16 lblue[1024];
 };
 
+struct framebuffer_info {
+	u32 framebuffer_width;
+	u32 framebuffer_height;
+	u32 fps;
+};
+
 struct base2_disp_info {
 	char disp_head_flag[6];
 	struct base2_screen_info screen_info[4];
@@ -811,7 +817,8 @@ struct base2_disp_info {
 	struct base_overscan overscan_info;
 	struct base2_gamma_lut_data gamma_lut_data;
 	struct base2_cubic_lut_data cubic_lut_data;
-	u32 reserved[256];
+	struct framebuffer_info framebuffer_info;
+	u32 reserved[244];
 	u32 crc;
 };
 

commit 00fc4eee1a7fa3322621b793248769723baa97c1
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Tue Jun 8 09:25:58 2021 +0800

    rockchip: vendor: Sync vendor id define from Linux
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: I52cc6d87ca19136acfebba52e915911426eb7bb8

diff --git a/arch/arm/include/asm/arch-rockchip/vendor.h b/arch/arm/include/asm/arch-rockchip/vendor.h
index 671669f5d8..72c3909e36 100644
--- a/arch/arm/include/asm/arch-rockchip/vendor.h
+++ b/arch/arm/include/asm/arch-rockchip/vendor.h
@@ -6,10 +6,23 @@
 #ifndef __ROCKCHIP_VENDOR_
 #define __ROCKCHIP_VENDOR_
 
-#define VENDOR_SN_ID		1 /* serialno */
-#define VENDOR_WIFI_MAC_ID	2 /* wifi mac */
-#define VENDOR_LAN_MAC_ID	3 /* lan mac */
-#define VENDOR_BLUETOOTH_ID	4 /* bluetooth mac */
+#define RSV_ID				0
+#define SN_ID				1
+#define WIFI_MAC_ID			2
+#define LAN_MAC_ID			3
+#define BT_MAC_ID			4
+#define HDCP_14_HDMI_ID			5
+#define HDCP_14_DP_ID			6
+#define HDCP_2X_ID			7
+#define DRM_KEY_ID			8
+#define PLAYREADY_CERT_ID		9
+#define ATTENTION_KEY_ID		10
+#define PLAYREADY_ROOT_KEY_0_ID		11
+#define PLAYREADY_ROOT_KEY_1_ID		12
+#define SENSOR_CALIBRATION_ID		13
+#define IMEI_ID				15
+#define LAN_RGMII_DL_ID			16
+#define EINK_VCOM_ID			17
 
 struct vendor_item {
 	u16  id;
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index b41349e7fc..6fd1da89f9 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -97,7 +97,7 @@ static int rockchip_set_ethaddr(void)
 	int ret, i;
 	bool need_write = false, randomed = false;
 
-	ret = vendor_storage_read(VENDOR_LAN_MAC_ID, ethaddr, sizeof(ethaddr));
+	ret = vendor_storage_read(LAN_MAC_ID, ethaddr, sizeof(ethaddr));
 	for (i = 0; i < MAX_ETHERNET; i++) {
 		if (ret <= 0 || !is_valid_ethaddr(&ethaddr[i * ARP_HLEN])) {
 			if (!randomed) {
@@ -127,7 +127,7 @@ static int rockchip_set_ethaddr(void)
 	}
 
 	if (need_write) {
-		ret = vendor_storage_write(VENDOR_LAN_MAC_ID,
+		ret = vendor_storage_write(LAN_MAC_ID,
 					   ethaddr, sizeof(ethaddr));
 		if (ret < 0)
 			printf("%s: vendor_storage_write failed %d\n",
@@ -150,7 +150,7 @@ static int rockchip_set_serialno(void)
 	memset(serialno_str, 0, VENDOR_SN_MAX);
 
 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
-	ret = vendor_storage_read(VENDOR_SN_ID, serialno_str, (VENDOR_SN_MAX-1));
+	ret = vendor_storage_read(SN_ID, serialno_str, (VENDOR_SN_MAX-1));
 	if (ret > 0) {
 		i = strlen(serialno_str);
 		for (; i > 0; i--) {

commit 80ac95fc586c1d3f5244ffbddaa7a63a57af77fa
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Fri May 14 18:50:15 2021 +0800

    mmc: dw_mmc: fixes bus-width=<1> handling
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
    Change-Id: Id9ff1e18d659ceb83eb43f22d2d601917b12b9ba

diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index a8c127cb49..0a4e256b78 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -199,7 +199,6 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data)
 		/* Error during data transfer. */
 		if (mask & (DWMCI_DATA_ERR | DWMCI_DATA_TOUT)) {
 			debug("%s: DATA ERROR!\n", __func__);
-
 			dwmci_wait_reset(host, DWMCI_RESET_ALL);
 			dwmci_writel(host, DWMCI_CMD, DWMCI_CMD_PRV_DAT_WAIT |
 				     DWMCI_CMD_UPD_CLK | DWMCI_CMD_START);
@@ -847,11 +846,21 @@ void dwmci_setup_cfg(struct mmc_config *cfg, struct dwmci_host *host,
 
 	cfg->host_caps = host->caps;
 
-	if (host->buswidth == 8) {
+	switch (host->buswidth) {
+	case 8:
 		cfg->host_caps |= MMC_MODE_8BIT | MMC_MODE_4BIT;
-	} else {
+		break;
+	case 4:
 		cfg->host_caps |= MMC_MODE_4BIT;
 		cfg->host_caps &= ~MMC_MODE_8BIT;
+		break;
+	case 1:
+		cfg->host_caps &= ~MMC_MODE_4BIT;
+		cfg->host_caps &= ~MMC_MODE_8BIT;
+		break;
+	default:
+		printf("Unsupported bus width: %d\n", host->buswidth);
+		break;
 	}
 	cfg->host_caps |= MMC_MODE_HS | MMC_MODE_HS_52MHz;
 

commit 6b07a14baa8c2df166c9d58855bde82b16761453
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue May 25 18:13:16 2021 +0800

    scripts: android2distro.sh transform Android image to Distro image
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I441c5f015f4890c5f32ee44a2396cb723715c269

diff --git a/scripts/android2distro.sh b/scripts/android2distro.sh
new file mode 100755
index 0000000000..15360b77d9
--- /dev/null
+++ b/scripts/android2distro.sh
@@ -0,0 +1,79 @@
+#!/bin/bash
+#
+# Copyright (c) 2021 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier: GPL-2.0
+#
+
+set -e
+
+function usage()
+{
+	echo
+	echo "usage:"
+	echo "    $0 -f [Android boot.img] -o [Distro(ext2) boot.img]"
+	echo
+}
+
+function args_process()
+{
+	if [ $# -ne 4 ]; then
+		usage
+		exit 1
+	fi
+
+	while [ $# -gt 0 ]; do
+		case $1 in
+			-f)
+				BOOT_IMG=$2
+				shift 2
+				;;
+			-o)
+				DISTRO_IMG=$2
+				shift 2
+				;;
+			*)
+				usage
+				exit 1
+				;;
+		esac
+	done
+
+	if [ ! -f ${BOOT_IMG} ]; then
+		echo "ERROR: No ${ITB}"
+		exit 1
+	fi
+}
+
+function android2distro()
+{
+	rm distro/ boot/ ${DISTRO_IMG} -rf
+	mkdir -p boot
+
+	./scripts/unpack_bootimg --boot_img ${BOOT_IMG} --out distro/
+	./scripts/unpack_resource.sh distro/second distro/
+	BOOTARGS=`fdtget -ts distro/rk-kernel.dtb /chosen bootargs`
+
+	cp distro/rk-kernel.dtb boot/rk-kernel.dtb
+	cp distro/kernel boot/kernel
+	cp distro/ramdisk boot/ramdisk
+	mkdir -p boot/extlinux
+	touch boot/extlinux/extlinux.conf
+	echo "label rockchip-linux-kernel" >> boot/extlinux/extlinux.conf
+	echo "    kernel /kernel" >> boot/extlinux/extlinux.conf
+	echo "    fdt /rk-kernel.dtb" >> boot/extlinux/extlinux.conf
+	echo "    initrd /ramdisk" >> boot/extlinux/extlinux.conf
+	echo "    append ${BOOTARGS}" >> boot/extlinux/extlinux.conf
+
+	SIZE_KB=`ls -lh ${BOOT_IMG} | awk '{ print $5 }' | tr -d 'M'`
+	SIZE_KB=`expr ${SIZE_KB} + 2`
+	SIZE_BYTE=$((${SIZE_KB}*1024))
+	genext2fs -b ${SIZE_BYTE} -B 1024 -d boot/ -i 8192 -U ${DISTRO_IMG}
+
+	echo
+	echo "Successful: ${DISTRO_IMG} is ready."
+	echo
+}
+
+args_process $*
+android2distro

commit e5595b468f0c8aaf7493f9085591370c873f178c
Author: Rasmus Villemoes <linux@rasmusvillemoes.dk>
Date:   Wed Sep 19 11:35:56 2018 +0900

    [BACKPORT]: Kbuild: fix # escaping in .cmd files for future Make
    
    [ commit 9564a8cf422d7b58f6e857e3546d346fa970191e in Linux ]
    
    I tried building using a freshly built Make (4.2.1-69-g8a731d1), but
    already the objtool build broke with
    
    orc_dump.c: In function ‘orc_dump’:
    orc_dump.c:106:2: error: ‘elf_getshnum’ is deprecated [-Werror=deprecated-declarations]
      if (elf_getshdrnum(elf, &nr_sections)) {
    
    Turns out that with that new Make, the backslash was not removed, so cpp
    didn't see a #include directive, grep found nothing, and
    -DLIBELF_USE_DEPRECATED was wrongly put in CFLAGS.
    
    Now, that new Make behaviour is documented in their NEWS file:
    
      * WARNING: Backward-incompatibility!
        Number signs (#) appearing inside a macro reference or function invocation
        no longer introduce comments and should not be escaped with backslashes:
        thus a call such as:
          foo := $(shell echo '#')
        is legal.  Previously the number sign needed to be escaped, for example:
          foo := $(shell echo '\#')
        Now this latter will resolve to "\#".  If you want to write makefiles
        portable to both versions, assign the number sign to a variable:
          C := \#
          foo := $(shell echo '$C')
        This was claimed to be fixed in 3.81, but wasn't, for some reason.
        To detect this change search for 'nocomment' in the .FEATURES variable.
    
    This also fixes up the two make-cmd instances to replace # with $(pound)
    rather than with \#. There might very well be other places that need
    similar fixup in preparation for whatever future Make release contains
    the above change, but at least this builds an x86_64 defconfig with the
    new make.
    
    Link: https://bugzilla.kernel.org/show_bug.cgi?id=197847
    Cc: Randy Dunlap <rdunlap@infradead.org>
    Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk>
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Change-Id: Ie20592ab981ffd7007ce4caaee1e2740a1eb44f9

diff --git a/scripts/Kbuild.include b/scripts/Kbuild.include
index 2c7918ad37..13ebddda65 100644
--- a/scripts/Kbuild.include
+++ b/scripts/Kbuild.include
@@ -7,6 +7,7 @@ quote   := "
 squote  := '
 empty   :=
 space   := $(empty) $(empty)
+pound := \#
 
 ###
 # Name of target with a '.' as filename prefix. foo/bar.o => foo/.bar.o
@@ -242,11 +243,11 @@ endif
 
 # Replace >$< with >$$< to preserve $ when reloading the .cmd file
 # (needed for make)
-# Replace >#< with >\#< to avoid starting a comment in the .cmd file
+# Replace >#< with >$(pound)< to avoid starting a comment in the .cmd file
 # (needed for make)
 # Replace >'< with >'\''< to be able to enclose the whole string in '...'
 # (needed for the shell)
-make-cmd = $(call escsq,$(subst \#,\\\#,$(subst $$,$$$$,$(cmd_$(1)))))
+make-cmd = $(call escsq,$(subst $(pound),$$(pound),$(subst $$,$$$$,$(cmd_$(1)))))
 
 # Find any prerequisites that is newer than target or that does not exist.
 # PHONY targets skipped in both cases.

commit 872a502d417a70f578d8d43128dcb53fbbc837d7
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Wed Sep 19 11:35:57 2018 +0900

    [BACKPORT]: kbuild: fix # escaping in appending U-Boot own DT
    
    The escape sequence '\#' does not work for the latest GNU Make from
    the git tree.
    
    Replace it with $(pound) as Linux did.
    
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Change-Id: Iaf2b4cb057f083bf38a0e7405885ab15044e36dc

diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index 12d1123a07..a384b41898 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -308,7 +308,7 @@ quiet_cmd_dtc = DTC     $@
 # Modified for U-Boot
 # Bring in any U-Boot-specific include at the end of the file
 cmd_dtc = mkdir -p $(dir ${dtc-tmp}) ; \
-	(cat $<; $(if $(u_boot_dtsi),echo '\#include "$(u_boot_dtsi)"')) > $(pre-tmp); \
+	(cat $<; $(if $(u_boot_dtsi),echo '$(pound)include "$(u_boot_dtsi)"')) > $(pre-tmp); \
 	$(CPP) $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) $(pre-tmp) ; \
 	$(DTC) -O dtb -o $@ -b 0 \
 		-i $(dir $<) $(DTC_FLAGS) \

commit e863c94ad7e2434ae4504c1a67e2799bbc99224d
Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Date:   Fri Nov 29 19:47:59 2019 +0200

    [BACKPORT]: gcc-9: silence 'address-of-packed-member' warning
    
    GCC 9.x starts complaining about potential misalignment of the pointer to
    the array (in this case alignment=2) in the packed (alignment=1) structures.
    
    Repeating Linus' Torvalds commit 6f303d60534c in the Linux kernel.
    
    Original commit message:
    
      We already did this for clang, but now gcc has that warning too.
      Yes, yes, the address may be unaligned.  And that's kind of the point.
    
    This in particular hides the warnings like
    
    drivers/usb/gadget/composite.c:545:23: warning: taking address of packed member of ‘struct usb_string_descriptor’ may result in an unaligned pointer value [-Waddress-of-packed-member]
      545 |    collect_langs(sp, s->wData);
    
    drivers/usb/gadget/composite.c:550:24: warning: taking address of packed member of ‘struct usb_string_descriptor’ may result in an unaligned pointer value [-Waddress-of-packed-member]
      550 |     collect_langs(sp, s->wData);
    
    drivers/usb/gadget/composite.c:555:25: warning: taking address of packed member of ‘struct usb_string_descriptor’ may result in an unaligned pointer value [-Waddress-of-packed-member]
      555 |      collect_langs(sp, s->wData);
    
    Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
    Change-Id: I49fd82d88be4974f38ce78bf2193ee296a19c87f

diff --git a/Makefile b/Makefile
index d3e3d3764d..ff76e85599 100644
--- a/Makefile
+++ b/Makefile
@@ -605,6 +605,7 @@ ifeq ($(shell $(CONFIG_SHELL) $(srctree)/scripts/gcc-stack-usage.sh $(CC)),y)
 endif
 
 KBUILD_CFLAGS += $(call cc-option,-Wno-format-nonliteral)
+KBUILD_CFLAGS += $(call cc-disable-warning, address-of-packed-member)
 
 # turn jbsr into jsr for m68k
 ifeq ($(ARCH),m68k)

commit 4d770529d65c0a300721ebe5e778af657bb69a1e
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Sun Jul 14 23:31:50 2019 +0200

    [BACKPORT]: lib: uuid: alignment error in gen_rand_uuid()
    
    Packed structures like struct uuid are not aligned. GCC 9.1 therefore
    throws an error when trying to compile gen_rand_uuid().
    
    lib/uuid.c: In function ‘gen_rand_uuid’:
    lib/uuid.c:244:2: error: converting a packed ‘struct uuid’ pointer
    (alignment 1) to a ‘unsigned int’ pointer (alignment 4) may result in
    an unaligned pointer value [-Werror=address-of-packed-member]
      244 |  unsigned int *ptr = (unsigned int *)&uuid;
          |  ^~~~~~~~
    
    Generate the uuid in a properly aligned buffer.
    
    The byte order of a random number should not matter. Do not call
    cpu_to_be32() to change the byte order.
    
    Reported-by: Ramon Fried <rfried.dev@gmail.com>
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Change-Id: I3c1b4e661f8e0da03e90ee137fed871c06e70627

diff --git a/lib/uuid.c b/lib/uuid.c
index 1536c027da..3369e9b52c 100644
--- a/lib/uuid.c
+++ b/lib/uuid.c
@@ -235,23 +235,23 @@ void uuid_bin_to_str(unsigned char *uuid_bin, char *uuid_str, int str_format)
 #if defined(CONFIG_RANDOM_UUID) || defined(CONFIG_CMD_UUID)
 void gen_rand_uuid(unsigned char *uuid_bin)
 {
-	struct uuid uuid;
-	unsigned int *ptr = (unsigned int *)&uuid;
+	u32 ptr[4];
+	struct uuid *uuid = (struct uuid *)ptr;
 	int i;
 
 	/* Set all fields randomly */
-	for (i = 0; i < sizeof(struct uuid) / sizeof(*ptr); i++)
-		*(ptr + i) = cpu_to_be32(rand());
+	for (i = 0; i < 4; i++)
+		ptr[i] = rand();
 
-	clrsetbits_be16(&uuid.time_hi_and_version,
+	clrsetbits_be16(&uuid->time_hi_and_version,
 			UUID_VERSION_MASK,
 			UUID_VERSION << UUID_VERSION_SHIFT);
 
-	clrsetbits_8(&uuid.clock_seq_hi_and_reserved,
+	clrsetbits_8(&uuid->clock_seq_hi_and_reserved,
 		     UUID_VARIANT_MASK,
 		     UUID_VARIANT << UUID_VARIANT_SHIFT);
 
-	memcpy(uuid_bin, &uuid, sizeof(struct uuid));
+	memcpy(uuid_bin, uuid, 16);
 }
 
 /*

commit 156fbe7cda4b7fa76135bfe4f47f55d5f0cc51a7
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Sun Jul 14 18:12:32 2019 +0200

    [BACKPORT]: disk: efi: avoid unaligned pointer error
    
    When building with GCC 9.1 an error occurs:
    
    disk/part_efi.c: In function ‘gpt_verify_partitions’:
    disk/part_efi.c:737:49: error: taking address of packed member of
    ‘struct _gpt_entry’ may result in an unaligned pointer value
    [-Werror=address-of-packed-member]
      737 |   gpt_convert_efi_name_to_char(efi_str, gpt_e[i].partition_name,
          |                                         ~~~~~~~~^~~~~~~~~~~~~~~
    cc1: all warnings being treated as errors
    make[1]: *** [scripts/Makefile.build:279: disk/part_efi.o] Error 1
    make: *** [Makefile:1594: disk] Error 2
    
    Adjust gpt_convert_efi_name_to_char() to accept unaligned strings.
    
    Reported-by: Ramon Fried <rfried.dev@gmail.com>
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Change-Id: Ia32956314ea6122aed9f57b787acdea46a6d0438

diff --git a/disk/part_efi.c b/disk/part_efi.c
index 64a962585b..27f3e4dda3 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -828,9 +828,18 @@ err:
 	return ret;
 }
 
-static void gpt_convert_efi_name_to_char(char *s, efi_char16_t *es, int n)
+/**
+ * gpt_convert_efi_name_to_char() - convert u16 string to char string
+ *
+ * TODO: this conversion only supports ANSI characters
+ *
+ * @s:	target buffer
+ * @es:	u16 string to be converted
+ * @n:	size of target buffer
+ */
+static void gpt_convert_efi_name_to_char(char *s, void *es, int n)
 {
-	char *ess = (char *)es;
+	char *ess = es;
 	int i, j;
 
 	memset(s, '\0', n);

commit d02db1fd3842d09259fc50461d901cf2569f10cf
Author: Peter Robinson <pbrobinson@gmail.com>
Date:   Thu Jan 30 09:37:15 2020 +0000

    [BACKPORT]: Remove redundant YYLOC global declaration
    
    Same as the upstream fix for building dtc with gcc 10.
    
    Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
    Change-Id: I0c1edc6408786a93100d3e027875c8b79007fd5c

diff --git a/scripts/dtc/dtc-lexer.l b/scripts/dtc/dtc-lexer.l
index fd825ebba6..24af549977 100644
--- a/scripts/dtc/dtc-lexer.l
+++ b/scripts/dtc/dtc-lexer.l
@@ -38,7 +38,6 @@ LINECOMMENT	"//".*\n
 #include "srcpos.h"
 #include "dtc-parser.tab.h"
 
-YYLTYPE yylloc;
 extern bool treesource_error;
 
 /* CAUTION: this will stop working if we ever use yyless() or yyunput() */
diff --git a/scripts/dtc/dtc-lexer.lex.c_shipped b/scripts/dtc/dtc-lexer.lex.c_shipped
index 011bb9632f..79952cd3ca 100644
--- a/scripts/dtc/dtc-lexer.lex.c_shipped
+++ b/scripts/dtc/dtc-lexer.lex.c_shipped
@@ -631,7 +631,6 @@ char *yytext;
 #include "srcpos.h"
 #include "dtc-parser.tab.h"
 
-YYLTYPE yylloc;
 extern bool treesource_error;
 
 /* CAUTION: this will stop working if we ever use yyless() or yyunput() */

commit 1344c509cc49ff2ed4dcaf9ddac0d44cd19409e2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu May 20 18:16:30 2021 +0800

    configs: rv1126: remove uimage support
    
    No body needs it.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If2ce1dfea09ead1d69bb5e9d66c2e7ee3d3a3f81

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index 4e97e6d605..73ceee6f50 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -7,7 +7,6 @@ CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
 CONFIG_ROCKCHIP_RV1126=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_ROCKCHIP_FIT_IMAGE=y
-CONFIG_ROCKCHIP_UIMAGE=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y
 CONFIG_ROCKCHIP_UART_MUX_SEL_M=2

commit 1977dc53350ad6aab588a875ac725665276ce1c0
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Jun 1 10:37:08 2021 +0800

    common: correct autoboot_command_fail_handle() position
    
    Call autoboot_command_fail_handle() after run_command_list() but
    not autoboot_command(), so that some operations, like ’ctrl + c‘,
    can be executed in cli_loop().
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ib3ea15a462c1e226ddd4767be328d840ce62d3f1

diff --git a/common/autoboot.c b/common/autoboot.c
index 760f44cf34..c64d566d1c 100644
--- a/common/autoboot.c
+++ b/common/autoboot.c
@@ -341,6 +341,12 @@ const char *bootdelay_process(void)
 	return s;
 }
 
+/*
+ * Board-specific Platform code can reimplement autoboot_command_fail_handle ()
+ * if needed
+ */
+__weak void autoboot_command_fail_handle(void) {}
+
 void autoboot_command(const char *s)
 {
 	debug("### main_loop: bootcmd=\"%s\"\n", s ? s : "<UNDEFINED>");
@@ -351,6 +357,7 @@ void autoboot_command(const char *s)
 #endif
 
 		run_command_list(s, -1, 0);
+		autoboot_command_fail_handle();
 
 #if defined(CONFIG_AUTOBOOT_KEYED) && !defined(CONFIG_AUTOBOOT_KEYED_CTRLC)
 		disable_ctrlc(prev);	/* restore Control C checking */
diff --git a/common/main.c b/common/main.c
index 225d06967b..6a1159879e 100644
--- a/common/main.c
+++ b/common/main.c
@@ -20,12 +20,6 @@ DECLARE_GLOBAL_DATA_PTR;
  */
 __weak void show_boot_progress(int val) {}
 
-/*
- * Board-specific Platform code can reimplement autoboot_command_fail_handle ()
- * if needed
- */
-__weak void autoboot_command_fail_handle(void) {}
-
 static void run_preboot_environment_command(void)
 {
 #ifdef CONFIG_PREBOOT
@@ -70,7 +64,6 @@ void main_loop(void)
 		cli_secure_boot_cmd(s);
 
 	autoboot_command(s);
-	autoboot_command_fail_handle();
 
 	cli_loop();
 	panic("No CLI available");

commit beffd0dc3a899f4ad3246dbede638d2a54398033
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Tue Jun 1 10:21:48 2021 +0800

    configs: rk3368: Enable efuse
    
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
    Change-Id: I2b1089a71346d91ca2f6866a25625aa974c3026d

diff --git a/configs/rk3368_defconfig b/configs/rk3368_defconfig
index 1278434771..91f13feb2a 100644
--- a/configs/rk3368_defconfig
+++ b/configs/rk3368_defconfig
@@ -48,6 +48,8 @@ CONFIG_DM_CRYPTO=y
 CONFIG_ROCKCHIP_CRYPTO_V1=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_ROCKCHIP_EFUSE=y
 CONFIG_DM_KEY=y
 CONFIG_RK8XX_PWRKEY=y
 CONFIG_ADC_KEY=y

commit 758a17b32f4a3d184708cfa2afd68cf2be0460e2
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Tue Jun 1 10:13:12 2021 +0800

    rockchip: efuse: Support rk3368 secure efuse
    
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
    Change-Id: Idc4bfac0a8b7645b72639df297912e0ed7c928bf

diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c
index 325d48401a..933d20907a 100644
--- a/drivers/misc/rockchip-efuse.c
+++ b/drivers/misc/rockchip-efuse.c
@@ -177,6 +177,53 @@ err:
 	return ret;
 }
 
+#ifndef CONFIG_SPL_BUILD
+static int rockchip_rk3368_efuse_read(struct udevice *dev, int offset,
+				      void *buf, int size)
+{
+	struct rockchip_efuse_platdata *plat = dev_get_platdata(dev);
+	struct rockchip_efuse_regs *efuse =
+		(struct rockchip_efuse_regs *)plat->base;
+	u8 *buffer = buf;
+	struct arm_smccc_res res;
+
+	/* Switch to read mode */
+	sip_smc_secure_reg_write((ulong)&efuse->ctrl,
+				 RK3288_LOAD | RK3288_PGENB);
+	udelay(1);
+	while (size--) {
+		res = sip_smc_secure_reg_read((ulong)&efuse->ctrl);
+		sip_smc_secure_reg_write((ulong)&efuse->ctrl, res.a1 &
+					 (~(RK3288_A_MASK << RK3288_A_SHIFT)));
+		/* set addr */
+		res = sip_smc_secure_reg_read((ulong)&efuse->ctrl);
+		sip_smc_secure_reg_write((ulong)&efuse->ctrl, res.a1 |
+					 ((offset++ & RK3288_A_MASK) <<
+					  RK3288_A_SHIFT));
+		udelay(1);
+		/* strobe low to high */
+		res = sip_smc_secure_reg_read((ulong)&efuse->ctrl);
+		sip_smc_secure_reg_write((ulong)&efuse->ctrl,
+					 res.a1 | RK3288_STROBE);
+		ndelay(60);
+		/* read data */
+		res = sip_smc_secure_reg_read((ulong)&efuse->dout);
+		*buffer++ = res.a1;
+		/* reset strobe to low */
+		res = sip_smc_secure_reg_read((ulong)&efuse->ctrl);
+		sip_smc_secure_reg_write((ulong)&efuse->ctrl,
+					 res.a1 & (~RK3288_STROBE));
+		udelay(1);
+	}
+
+	/* Switch to standby mode */
+	sip_smc_secure_reg_write((ulong)&efuse->ctrl,
+				 RK3288_PGENB | RK3288_CSB);
+
+	return 0;
+}
+#endif
+
 static int rockchip_rk3399_efuse_read(struct udevice *dev, int offset,
 				      void *buf, int size)
 {
@@ -440,6 +487,12 @@ static const struct udevice_id rockchip_efuse_ids[] = {
 		.compatible = "rockchip,rk3328-efuse",
 		.data = (ulong)&rockchip_rk3328_efuse_read,
 	},
+#ifndef CONFIG_SPL_BUILD
+	{
+		.compatible = "rockchip,rk3368-efuse",
+		.data = (ulong)&rockchip_rk3368_efuse_read,
+	},
+#endif
 	{
 		.compatible = "rockchip,rk3399-efuse",
 		.data = (ulong)&rockchip_rk3399_efuse_read,

commit 77a82f1512bdde897a24ad297c3c0215043921c8
Author: Bian Jin chen <kenjc.bian@rock-chips.com>
Date:   Thu May 27 14:56:26 2021 +0800

    configs: rk356x: add CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
    
    Signed-off-by: Bian Jin chen <kenjc.bian@rock-chips.com>
    Change-Id: I1c7d66a4fc9b039aa55c18b65980e0b67dd05383

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index 50a55aab11..8f7e80473b 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -211,5 +211,6 @@ CONFIG_AVB_LIBAVB_AB=y
 CONFIG_AVB_LIBAVB_ATX=y
 CONFIG_AVB_LIBAVB_USER=y
 CONFIG_RK_AVB_LIBAVB_USER=y
+CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
 CONFIG_OPTEE_CLIENT=y
 CONFIG_OPTEE_V2=y

commit 850ced9da37844e3cf50e2434d4f64ab9a481536
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Fri May 21 14:36:00 2021 +0800

    f_rockusb: support write ta encryption key
    
    Change-Id: I9fca5f847a9d6146d325e2a9e07de8636fbe7904
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index cb8dfcbf85..8f5c65fe29 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -12,6 +12,7 @@
 #include <asm/arch/chip_info.h>
 #include <write_keybox.h>
 #include <linux/mtd/mtd.h>
+#include <optee_include/OpteeClientInterface.h>
 
 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
 #include <asm/arch/vendor.h>
@@ -477,6 +478,28 @@ static int rkusb_do_vs_write(struct fsg_common *common)
 				}
 #else
 				printf("Please enable CONFIG_RK_AVB_LIBAVB_USER\n");
+#endif
+			} else if (type == 3) {
+				/* efuse or otp*/
+#ifdef CONFIG_OPTEE_CLIENT
+				if (memcmp(data, "TAEK", 4) == 0) {
+					if (vhead->size - 8 != 32) {
+						printf("check ta encryption key size fail!\n");
+						curlun->sense_data = SS_WRITE_ERROR;
+						return -EIO;
+					}
+					if (trusty_write_ta_encryption_key((uint32_t *)(data + 8), 8) != 0) {
+						printf("trusty_write_ta_encryption_key error!");
+						curlun->sense_data = SS_WRITE_ERROR;
+						return -EIO;
+					}
+				} else {
+					printf("Unknown tag\n");
+					curlun->sense_data = SS_WRITE_ERROR;
+					return -EIO;
+				}
+#else
+				printf("Please enable CONFIG_OPTEE_CLIENT\n");
 #endif
 			} else {
 				return -EINVAL;

commit 1ef63c75504081c825b8ecead64a4742787647d2
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Wed May 19 10:14:25 2021 +0800

    lib: optee_client: add interface for write ta encryption key
    
    Change-Id: I7c2c1818a0e79639b1c58ade38527e8f08eea087
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/include/optee_include/OpteeClientInterface.h b/include/optee_include/OpteeClientInterface.h
index 707e4fb911..eb0615009b 100644
--- a/include/optee_include/OpteeClientInterface.h
+++ b/include/optee_include/OpteeClientInterface.h
@@ -33,6 +33,7 @@ uint32_t trusty_notify_optee_uboot_end(void);
 uint32_t trusty_read_vbootkey_hash(uint32_t *buf, uint32_t length);
 uint32_t trusty_write_vbootkey_hash(uint32_t *buf, uint32_t length);
 uint32_t trusty_read_vbootkey_enable_flag(uint8_t *flag);
+uint32_t trusty_write_ta_encryption_key(uint32_t *buf, uint32_t length);
 uint32_t trusty_read_permanent_attributes_flag(uint8_t *attributes);
 uint32_t trusty_write_permanent_attributes_flag(uint8_t attributes);
 uint32_t trusty_attest_dh(uint8_t *dh, uint32_t *dh_size);
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index 5286a1b7a3..0d82e06378 100644
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -20,6 +20,7 @@
 #define STORAGE_CMD_READ_VBOOTKEY_HASH		3
 #define STORAGE_CMD_WRITE_VBOOTKEY_HASH		4
 #define STORAGE_CMD_READ_ENABLE_FLAG		5
+#define STORAGE_CMD_WRITE_TA_ENCRYPTION_KEY	9
 
 static uint8_t b2hs_add_base(uint8_t in)
 {
@@ -548,6 +549,12 @@ uint32_t trusty_read_vbootkey_enable_flag(uint8_t *flag)
 	return TeecResult;
 }
 
+uint32_t trusty_write_ta_encryption_key(uint32_t *buf, uint32_t length)
+{
+	return trusty_base_efuse_or_otp_operation(STORAGE_CMD_WRITE_TA_ENCRYPTION_KEY,
+						  true, buf, length);
+}
+
 uint32_t trusty_attest_dh(uint8_t *dh, uint32_t *dh_size)
 {
 	TEEC_Result TeecResult;

commit c7de5349c9abcd4e28cc34f9eb02efdc19b877b3
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Wed May 19 08:49:45 2021 +0800

    lib: optee_clientApi: remove duplicate code
    
    optee client has a lot of the same duplicate code,
    for the convenience of adding new functions in the future,
    so remove duplicate code.
    
    Change-Id: Ia1005e48d43172adb07954d9ff6cf08387e1b3d9
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/include/optee_include/OpteeClientInterface.h b/include/optee_include/OpteeClientInterface.h
index b99229ee90..707e4fb911 100644
--- a/include/optee_include/OpteeClientInterface.h
+++ b/include/optee_include/OpteeClientInterface.h
@@ -14,7 +14,6 @@
 #define ATTEST_UUID_SIZE     (ATAP_HEX_UUID_LEN+1)
 #define ATTEST_CA_OUT_SIZE     256
 
-uint32_t test_optee(void);
 uint32_t trusty_read_rollback_index(uint32_t slot, uint64_t *value);
 uint32_t trusty_write_rollback_index(uint32_t slot, uint64_t value);
 uint32_t trusty_read_permanent_attributes(uint8_t *attributes, uint32_t size);
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index 5a7efb5ea8..5286a1b7a3 100644
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -14,14 +14,47 @@
 #include <attestation_key.h>
 
 #define	BOOT_FROM_EMMC	(1 << 1)
+#define STORAGE_CMD_READ_ATTRIBUTE_HASH		0
+#define STORAGE_CMD_WRITE_ATTRIBUTE_HASH	1
+#define STORAGE_CMD_UBOOT_END_OTP		2
+#define STORAGE_CMD_READ_VBOOTKEY_HASH		3
+#define STORAGE_CMD_WRITE_VBOOTKEY_HASH		4
+#define STORAGE_CMD_READ_ENABLE_FLAG		5
 
-uint32_t test_optee(void)
+static uint8_t b2hs_add_base(uint8_t in)
+{
+	if (in > 9)
+		return in + 55;
+	else
+		return in + 48;
+}
+
+static uint32_t b2hs(uint8_t *b, uint8_t *hs, uint32_t blen, uint32_t hslen)
+{
+	uint32_t i = 0;
+
+	if (blen * 2 + 1 > hslen)
+		return 0;
+
+	for (; i < blen; i++) {
+		hs[i * 2 + 1] = b2hs_add_base(b[i] & 0xf);
+		hs[i * 2] = b2hs_add_base(b[i] >> 4);
+	}
+	hs[blen * 2] = 0;
+
+	return blen * 2;
+}
+
+static uint32_t trusty_base_write_security_data(char *filename,
+						uint32_t filename_size,
+						uint8_t *data,
+						uint32_t data_size)
 {
 	TEEC_Result TeecResult;
 	TEEC_Context TeecContext;
 	TEEC_Session TeecSession;
 	uint32_t ErrorOrigin;
-	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142, \
+	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
 		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
@@ -41,9 +74,9 @@ uint32_t test_optee(void)
 		return TeecResult;
 
 	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
-						TEEC_NONE,
-						TEEC_NONE,
-						TEEC_NONE);
+						    TEEC_NONE,
+						    TEEC_NONE,
+						    TEEC_NONE);
 	/*0 nand or emmc "security" partition , 1 rpmb*/
 	if (dev_desc->if_type == IF_TYPE_MMC && dev_desc->devnum == 0)
 		TeecOperation.params[0].value.a = 1;
@@ -65,25 +98,25 @@ uint32_t test_optee(void)
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
-	SharedMem0.size = sizeof("filename_test");
+	SharedMem0.size = filename_size;
 	SharedMem0.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
 	if (TeecResult != TEEC_SUCCESS)
 		goto exit;
 
-	memcpy(SharedMem0.buffer, "filename_test", SharedMem0.size);
+	memcpy(SharedMem0.buffer, filename, SharedMem0.size);
 
 	TEEC_SharedMemory SharedMem1 = {0};
 
-	SharedMem1.size = 32;
+	SharedMem1.size = data_size;
 	SharedMem1.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
 	if (TeecResult != TEEC_SUCCESS)
 		goto exit;
 
-	memset(SharedMem1.buffer, 'a', SharedMem1.size);
+	memcpy(SharedMem1.buffer, data, SharedMem1.size);
 
 	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
 	TeecOperation.params[0].tmpref.size = SharedMem0.size;
@@ -108,35 +141,14 @@ exit:
 	TEEC_ReleaseSharedMemory(&SharedMem1);
 	TEEC_CloseSession(&TeecSession);
 	TEEC_FinalizeContext(&TeecContext);
-	return TeecResult;
-}
 
-static uint8_t b2hs_add_base(uint8_t in)
-{
-	if (in > 9)
-		return in + 55;
-	else
-		return in + 48;
-}
-
-uint32_t b2hs(uint8_t *b, uint8_t *hs, uint32_t blen, uint32_t hslen)
-{
-	uint32_t i = 0;
-
-	if (blen * 2 + 1 > hslen)
-		return 0;
-
-	for (; i < blen; i++) {
-		hs[i * 2 + 1] = b2hs_add_base(b[i] & 0xf);
-		hs[i * 2] = b2hs_add_base(b[i] >> 4);
-	}
-	hs[blen * 2] = 0;
-
-	return blen * 2;
+	return TeecResult;
 }
 
-
-uint32_t trusty_read_rollback_index(uint32_t slot, uint64_t *value)
+static uint32_t trusty_base_read_security_data(char *filename,
+					       uint32_t filename_size,
+					       uint8_t *data,
+					       uint32_t data_size)
 {
 	TEEC_Result TeecResult;
 	TEEC_Context TeecContext;
@@ -146,7 +158,6 @@ uint32_t trusty_read_rollback_index(uint32_t slot, uint64_t *value)
 			{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
-	uint8_t hs[9];
 
 	struct blk_desc *dev_desc;
 	dev_desc = rockchip_get_bootdev();
@@ -155,8 +166,6 @@ uint32_t trusty_read_rollback_index(uint32_t slot, uint64_t *value)
 		return -TEEC_ERROR_GENERIC;
 	}
 
-	b2hs((uint8_t *)&slot, hs, 4, 9);
-
 	TeecResult = OpteeClientApiLibInitialize();
 	if (TeecResult != TEEC_SUCCESS)
 		return TeecResult;
@@ -190,18 +199,18 @@ uint32_t trusty_read_rollback_index(uint32_t slot, uint64_t *value)
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
-	SharedMem0.size = 8;
+	SharedMem0.size = filename_size;
 	SharedMem0.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
 	if (TeecResult != TEEC_SUCCESS)
 		goto exit;
 
-	memcpy(SharedMem0.buffer, hs, SharedMem0.size);
+	memcpy(SharedMem0.buffer, filename, SharedMem0.size);
 
 	TEEC_SharedMemory SharedMem1 = {0};
 
-	SharedMem1.size = 8;
+	SharedMem1.size = data_size;
 	SharedMem1.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
@@ -224,7 +233,7 @@ uint32_t trusty_read_rollback_index(uint32_t slot, uint64_t *value)
 					&TeecOperation,
 					&ErrorOrigin);
 	if (TeecResult == TEEC_SUCCESS)
-		memcpy((char *)value, SharedMem1.buffer, SharedMem1.size);
+		memcpy(data, SharedMem1.buffer, SharedMem1.size);
 exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
@@ -234,25 +243,17 @@ exit:
 	return TeecResult;
 }
 
-uint32_t trusty_write_rollback_index(uint32_t slot, uint64_t value)
+static uint32_t trusty_base_end_security_data(void)
 {
 	TEEC_Result TeecResult;
 	TEEC_Context TeecContext;
 	TEEC_Session TeecSession;
 	uint32_t ErrorOrigin;
-	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+	TEEC_UUID  tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
 		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
-	uint8_t hs[9];
-	struct blk_desc *dev_desc;
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: dev_desc is NULL!\n", __func__);
-		return -TEEC_ERROR_GENERIC;
-	}
 
-	b2hs((uint8_t *)&slot, hs, 4, 9);
 	TeecResult = OpteeClientApiLibInitialize();
 	if (TeecResult != TEEC_SUCCESS)
 		return TeecResult;
@@ -261,94 +262,176 @@ uint32_t trusty_write_rollback_index(uint32_t slot, uint64_t value)
 	if (TeecResult != TEEC_SUCCESS)
 		return TeecResult;
 
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
-						TEEC_NONE,
-						TEEC_NONE,
-						TEEC_NONE);
-	/*0 nand or emmc "security" partition , 1 rpmb*/
-	if (dev_desc->if_type == IF_TYPE_MMC && dev_desc->devnum == 0)
-		TeecOperation.params[0].value.a = 1;
-	else
-		TeecOperation.params[0].value.a = 0;
-#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
-	TeecOperation.params[0].value.a = 0;
-#endif
-
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				&TeecSession,
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
-				&TeecOperation,
+				NULL,
 				&ErrorOrigin);
 	if (TeecResult != TEEC_SUCCESS)
 		return TeecResult;
 
-	TEEC_SharedMemory SharedMem0 = {0};
-
-	SharedMem0.size = 8;
-	SharedMem0.flags = 0;
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_NONE,
+						    TEEC_NONE,
+						    TEEC_NONE,
+						    TEEC_NONE);
 
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					2,
+					&TeecOperation,
+					&ErrorOrigin);
 	if (TeecResult != TEEC_SUCCESS)
 		goto exit;
+exit:
+	TEEC_CloseSession(&TeecSession);
+	TEEC_FinalizeContext(&TeecContext);
 
-	memcpy(SharedMem0.buffer, hs, SharedMem0.size);
+	return TeecResult;
+}
 
-	TEEC_SharedMemory SharedMem1 = {0};
+uint32_t trusty_read_rollback_index(uint32_t slot, uint64_t *value)
+{
+	char hs[9];
 
-	SharedMem1.size = 8;
-	SharedMem1.flags = 0;
+	b2hs((uint8_t *)&slot, (uint8_t *)hs, 4, 9);
 
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
-	if (TeecResult != TEEC_SUCCESS)
-		goto exit;
+	return trusty_base_read_security_data(hs, 8, (uint8_t *)value, 8);
+}
 
-	memcpy(SharedMem1.buffer, (char *)&value, SharedMem1.size);
+uint32_t trusty_write_rollback_index(uint32_t slot, uint64_t value)
+{
+	char hs[9];
 
-	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
-	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+	b2hs((uint8_t *)&slot, (uint8_t *)hs, 4, 9);
 
-	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
-	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+	return trusty_base_write_security_data(hs, 8, (uint8_t *)&value, 8);
+}
 
+uint32_t trusty_read_permanent_attributes(uint8_t *attributes, uint32_t size)
+{
+	return trusty_base_read_security_data("attributes",
+		sizeof("attributes"), attributes, size);
+}
 
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
-						TEEC_MEMREF_TEMP_INOUT,
-						TEEC_NONE,
-						TEEC_NONE);
+uint32_t trusty_write_permanent_attributes(uint8_t *attributes, uint32_t size)
+{
+	return trusty_base_write_security_data("attributes",
+		sizeof("attributes"), attributes, size);
+}
+
+uint32_t trusty_read_permanent_attributes_flag(uint8_t *attributes)
+{
+	return trusty_base_read_security_data("attributes_flag",
+		sizeof("attributes_flag"), attributes, 1);
+}
+
+uint32_t trusty_write_permanent_attributes_flag(uint8_t attributes)
+{
+	return trusty_base_write_security_data("attributes_flag",
+		sizeof("attributes_flag"), &attributes, 1);
+}
+
+uint32_t trusty_read_permanent_attributes_cer(uint8_t *attributes,
+					      uint32_t size)
+{
+	return trusty_base_read_security_data("rsacer",
+		sizeof("rsacer"), attributes, size);
+}
+
+uint32_t trusty_write_permanent_attributes_cer(uint8_t *attributes,
+					       uint32_t size)
+{
+	return trusty_base_write_security_data("rsacer",
+		sizeof("rsacer"), attributes, size);
+}
+
+uint32_t trusty_read_lock_state(uint8_t *lock_state)
+{
+	return trusty_base_read_security_data("lock_state",
+		sizeof("lock_state"), lock_state, 1);
+}
+
+uint32_t trusty_write_lock_state(uint8_t lock_state)
+{
+	return trusty_base_write_security_data("lock_state",
+		sizeof("lock_state"), &lock_state, 1);
+}
+
+uint32_t trusty_read_flash_lock_state(uint8_t *flash_lock_state)
+{
+	return trusty_base_read_security_data("flash_lock_state",
+		sizeof("flash_lock_state"), flash_lock_state, 1);
+}
+
+uint32_t trusty_write_flash_lock_state(uint8_t flash_lock_state)
+{
+	return trusty_base_write_security_data("flash_lock_state",
+		sizeof("flash_lock_state"), &flash_lock_state, 1);
+}
+
+static uint32_t trusty_base_end_efuse_or_otp(void)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID tempuuid = { 0x2d26d8a8, 0x5134, 0x4dd8,
+			{ 0xb3, 0x2f, 0xb3, 0x4b, 0xce, 0xeb, 0xc4, 0x71 } };
+
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				      &TeecSession,
+				      TeecUuid,
+				      TEEC_LOGIN_PUBLIC,
+				      NULL,
+				      NULL,
+				      &ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_NONE,
+						    TEEC_NONE,
+						    TEEC_NONE,
+						    TEEC_NONE);
 
 	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					1,
+					STORAGE_CMD_UBOOT_END_OTP,
 					&TeecOperation,
 					&ErrorOrigin);
 	if (TeecResult != TEEC_SUCCESS)
 		goto exit;
 exit:
-	TEEC_ReleaseSharedMemory(&SharedMem0);
-	TEEC_ReleaseSharedMemory(&SharedMem1);
 	TEEC_CloseSession(&TeecSession);
 	TEEC_FinalizeContext(&TeecContext);
 
 	return TeecResult;
 }
 
-uint32_t trusty_read_permanent_attributes(uint8_t *attributes, uint32_t size)
+static uint32_t trusty_base_efuse_or_otp_operation(uint32_t cmd,
+						   uint8_t is_write,
+						   uint32_t *buf,
+						   uint32_t length)
 {
 	TEEC_Result TeecResult;
 	TEEC_Context TeecContext;
 	TEEC_Session TeecSession;
 	uint32_t ErrorOrigin;
-	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
-		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
+
+	TEEC_UUID tempuuid = { 0x2d26d8a8, 0x5134, 0x4dd8,
+			{ 0xb3, 0x2f, 0xb3, 0x4b, 0xce, 0xeb, 0xc4, 0x71 } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
-	struct blk_desc *dev_desc;
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: dev_desc is NULL!\n", __func__);
-		return -TEEC_ERROR_GENERIC;
-	}
 
 	TeecResult = OpteeClientApiLibInitialize();
 	if (TeecResult != TEEC_SUCCESS)
@@ -358,1152 +441,102 @@ uint32_t trusty_read_permanent_attributes(uint8_t *attributes, uint32_t size)
 	if (TeecResult != TEEC_SUCCESS)
 		return TeecResult;
 
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
-						TEEC_NONE,
-						TEEC_NONE,
-						TEEC_NONE);
-	/*0 nand or emmc "security" partition , 1 rpmb*/
-	if (dev_desc->if_type == IF_TYPE_MMC && dev_desc->devnum == 0)
-		TeecOperation.params[0].value.a = 1;
-	else
-		TeecOperation.params[0].value.a = 0;
-
-#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
-	TeecOperation.params[0].value.a = 0;
-#endif
-
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				&TeecSession,
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
-				&TeecOperation,
+				NULL,
 				&ErrorOrigin);
 	if (TeecResult != TEEC_SUCCESS)
 		return TeecResult;
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
-	SharedMem0.size = sizeof("attributes");
+	SharedMem0.size = length * sizeof(uint32_t);
 	SharedMem0.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
 	if (TeecResult != TEEC_SUCCESS)
 		goto exit;
 
-	memcpy(SharedMem0.buffer, "attributes", SharedMem0.size);
-
-	TEEC_SharedMemory SharedMem1 = {0};
-
-	SharedMem1.size = size;
-	SharedMem1.flags = 0;
-
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
-	if (TeecResult != TEEC_SUCCESS)
-		goto exit;
-
 	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
 	TeecOperation.params[0].tmpref.size = SharedMem0.size;
 
-	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
-	TeecOperation.params[1].tmpref.size = SharedMem1.size;
-
-
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
-						TEEC_MEMREF_TEMP_INOUT,
-						TEEC_NONE,
-						TEEC_NONE);
+	if (is_write) {
+		memcpy(SharedMem0.buffer, buf, SharedMem0.size);
+		TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+							    TEEC_NONE,
+							    TEEC_NONE,
+							    TEEC_NONE);
+
+	} else {
+		TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_OUTPUT,
+							    TEEC_NONE,
+							    TEEC_NONE,
+							    TEEC_NONE);
+	}
 
 	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					0,
+					cmd,
 					&TeecOperation,
 					&ErrorOrigin);
-	if (TeecResult == TEEC_SUCCESS)
-		memcpy(attributes, SharedMem1.buffer, SharedMem1.size);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
+
+	if (!is_write)
+		memcpy(buf, SharedMem0.buffer, SharedMem0.size);
+
 exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);
-	TEEC_ReleaseSharedMemory(&SharedMem1);
 	TEEC_CloseSession(&TeecSession);
 	TEEC_FinalizeContext(&TeecContext);
 
 	return TeecResult;
 }
 
-uint32_t trusty_write_permanent_attributes(uint8_t *attributes, uint32_t size)
+uint32_t trusty_read_attribute_hash(uint32_t *buf, uint32_t length)
 {
-	TEEC_Result TeecResult;
-	TEEC_Context TeecContext;
-	TEEC_Session TeecSession;
-	uint32_t ErrorOrigin;
-	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
-		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
-	TEEC_UUID *TeecUuid = &tempuuid;
-	TEEC_Operation TeecOperation = {0};
-	struct blk_desc *dev_desc;
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: dev_desc is NULL!\n", __func__);
-		return -TEEC_ERROR_GENERIC;
-	}
-
-	TeecResult = OpteeClientApiLibInitialize();
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
-						TEEC_NONE,
-						TEEC_NONE,
-						TEEC_NONE);
-	/*0 nand or emmc "security" partition , 1 rpmb*/
-	if (dev_desc->if_type == IF_TYPE_MMC && dev_desc->devnum == 0)
-		TeecOperation.params[0].value.a = 1;
-	else
-		TeecOperation.params[0].value.a = 0;
-
-#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
-	TeecOperation.params[0].value.a = 0;
-#endif
-
-	TeecResult = TEEC_OpenSession(&TeecContext,
-				&TeecSession,
-				TeecUuid,
-				TEEC_LOGIN_PUBLIC,
-				NULL,
-				&TeecOperation,
-				&ErrorOrigin);
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TEEC_SharedMemory SharedMem0 = {0};
-
-	SharedMem0.size = sizeof("attributes");
-	SharedMem0.flags = 0;
-
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
-	if (TeecResult != TEEC_SUCCESS)
-		goto exit;
-
-	memcpy(SharedMem0.buffer, "attributes", SharedMem0.size);
-
-	TEEC_SharedMemory SharedMem1 = {0};
-
-	SharedMem1.size = size;
-	SharedMem1.flags = 0;
-
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
-	if (TeecResult != TEEC_SUCCESS)
-		goto exit;
-
-	memcpy(SharedMem1.buffer, attributes, SharedMem1.size);
-
-	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
-	TeecOperation.params[0].tmpref.size = SharedMem0.size;
-
-	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
-	TeecOperation.params[1].tmpref.size = SharedMem1.size;
-
-
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
-						TEEC_MEMREF_TEMP_INOUT,
-						TEEC_NONE,
-						TEEC_NONE);
-
-	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					1,
-					&TeecOperation,
-					&ErrorOrigin);
-	if (TeecResult != TEEC_SUCCESS)
-		goto exit;
-exit:
-	TEEC_ReleaseSharedMemory(&SharedMem0);
-	TEEC_ReleaseSharedMemory(&SharedMem1);
-	TEEC_CloseSession(&TeecSession);
-	TEEC_FinalizeContext(&TeecContext);
-
-	return TeecResult;
-}
-
-uint32_t trusty_read_permanent_attributes_cer(uint8_t *attributes,
-					      uint32_t size)
-{
-	TEEC_Result TeecResult;
-	TEEC_Context TeecContext;
-	TEEC_Session TeecSession;
-	uint32_t ErrorOrigin;
-	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
-		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
-	TEEC_UUID *TeecUuid = &tempuuid;
-	TEEC_Operation TeecOperation = {0};
-	struct blk_desc *dev_desc;
-
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: dev_desc is NULL!\n", __func__);
-		return -TEEC_ERROR_GENERIC;
-	}
-
-	TeecResult = OpteeClientApiLibInitialize();
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
-						    TEEC_NONE,
-						    TEEC_NONE,
-						    TEEC_NONE);
-	/*0 nand or emmc "security" partition , 1 rpmb*/
-	if (dev_desc->if_type == IF_TYPE_MMC && dev_desc->devnum == 0)
-		TeecOperation.params[0].value.a = 1;
-	else
-		TeecOperation.params[0].value.a = 0;
-
-#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
-	TeecOperation.params[0].value.a = 0;
-#endif
-
-	TeecResult = TEEC_OpenSession(&TeecContext,
-				      &TeecSession,
-				      TeecUuid,
-				      TEEC_LOGIN_PUBLIC,
-				      NULL,
-				      &TeecOperation,
-				      &ErrorOrigin);
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TEEC_SharedMemory SharedMem0 = {0};
-
-	SharedMem0.size = sizeof("rsacer");
-	SharedMem0.flags = 0;
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
-	if (TeecResult != TEEC_SUCCESS)
-		goto exit;
-	memcpy(SharedMem0.buffer, "rsacer", SharedMem0.size);
-	TEEC_SharedMemory SharedMem1 = {0};
-
-	SharedMem1.size = size;
-	SharedMem1.flags = 0;
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
-	if (TeecResult != TEEC_SUCCESS)
-		goto exit;
-	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
-	TeecOperation.params[0].tmpref.size = SharedMem0.size;
-	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
-	TeecOperation.params[1].tmpref.size = SharedMem1.size;
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
-						    TEEC_MEMREF_TEMP_INOUT,
-						    TEEC_NONE,
-						    TEEC_NONE);
-
-	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					0,
-					&TeecOperation,
-					&ErrorOrigin);
-	if (TeecResult == TEEC_SUCCESS)
-		memcpy(attributes, SharedMem1.buffer, SharedMem1.size);
-exit:
-	TEEC_ReleaseSharedMemory(&SharedMem0);
-	TEEC_ReleaseSharedMemory(&SharedMem1);
-	TEEC_CloseSession(&TeecSession);
-	TEEC_FinalizeContext(&TeecContext);
-
-	return TeecResult;
-}
-
-uint32_t trusty_write_permanent_attributes_cer(uint8_t *attributes,
-					       uint32_t size)
-{
-	TEEC_Result TeecResult;
-	TEEC_Context TeecContext;
-	TEEC_Session TeecSession;
-	uint32_t ErrorOrigin;
-	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
-		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
-	TEEC_UUID *TeecUuid = &tempuuid;
-	TEEC_Operation TeecOperation = {0};
-	struct blk_desc *dev_desc;
-
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: dev_desc is NULL!\n", __func__);
-		return -TEEC_ERROR_GENERIC;
-	}
-
-	TeecResult = OpteeClientApiLibInitialize();
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
-						    TEEC_NONE,
-						    TEEC_NONE,
-						    TEEC_NONE);
-	/*0 nand or emmc "security" partition , 1 rpmb*/
-	if (dev_desc->if_type == IF_TYPE_MMC && dev_desc->devnum == 0)
-		TeecOperation.params[0].value.a = 1;
-	else
-		TeecOperation.params[0].value.a = 0;
-
-#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
-	TeecOperation.params[0].value.a = 0;
-#endif
-
-	TeecResult = TEEC_OpenSession(&TeecContext,
-				      &TeecSession,
-				      TeecUuid,
-				      TEEC_LOGIN_PUBLIC,
-				      NULL,
-				      &TeecOperation,
-				      &ErrorOrigin);
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TEEC_SharedMemory SharedMem0 = {0};
-
-	SharedMem0.size = sizeof("rsacer");
-	SharedMem0.flags = 0;
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
-	if (TeecResult != TEEC_SUCCESS)
-		goto exit;
-	memcpy(SharedMem0.buffer, "rsacer", SharedMem0.size);
-	TEEC_SharedMemory SharedMem1 = {0};
-
-	SharedMem1.size = size;
-	SharedMem1.flags = 0;
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
-	if (TeecResult != TEEC_SUCCESS)
-		goto exit;
-	memcpy(SharedMem1.buffer, attributes, SharedMem1.size);
-	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
-	TeecOperation.params[0].tmpref.size = SharedMem0.size;
-	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
-	TeecOperation.params[1].tmpref.size = SharedMem1.size;
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
-						    TEEC_MEMREF_TEMP_INOUT,
-						    TEEC_NONE,
-						    TEEC_NONE);
-
-	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					1,
-					&TeecOperation,
-					&ErrorOrigin);
-	if (TeecResult != TEEC_SUCCESS)
-		goto exit;
-exit:
-	TEEC_ReleaseSharedMemory(&SharedMem0);
-	TEEC_ReleaseSharedMemory(&SharedMem1);
-	TEEC_CloseSession(&TeecSession);
-	TEEC_FinalizeContext(&TeecContext);
-
-	return TeecResult;
-}
-
-uint32_t trusty_read_lock_state(uint8_t *lock_state)
-{
-	TEEC_Result TeecResult;
-	TEEC_Context TeecContext;
-	TEEC_Session TeecSession;
-	uint32_t ErrorOrigin;
-	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
-		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
-	TEEC_UUID *TeecUuid = &tempuuid;
-	TEEC_Operation TeecOperation = {0};
-	struct blk_desc *dev_desc;
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: dev_desc is NULL!\n", __func__);
-		return -TEEC_ERROR_GENERIC;
-	}
-
-	TeecResult = OpteeClientApiLibInitialize();
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
-						TEEC_NONE,
-						TEEC_NONE,
-						TEEC_NONE);
-	/*0 nand or emmc "security" partition , 1 rpmb*/
-	if (dev_desc->if_type == IF_TYPE_MMC && dev_desc->devnum == 0)
-		TeecOperation.params[0].value.a = 1;
-	else
-		TeecOperation.params[0].value.a = 0;
-
-#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
-	TeecOperation.params[0].value.a = 0;
-#endif
-
-	TeecResult = TEEC_OpenSession(&TeecContext,
-				&TeecSession,
-				TeecUuid,
-				TEEC_LOGIN_PUBLIC,
-				NULL,
-				&TeecOperation,
-				&ErrorOrigin);
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TEEC_SharedMemory SharedMem0 = {0};
-
-	SharedMem0.size = sizeof("lock_state");
-	SharedMem0.flags = 0;
-
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
-	if (TeecResult != TEEC_SUCCESS)
-		goto exit;
-
-	memcpy(SharedMem0.buffer, "lock_state", SharedMem0.size);
-
-	TEEC_SharedMemory SharedMem1 = {0};
-
-	SharedMem1.size = 1;
-	SharedMem1.flags = 0;
-
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
-	if (TeecResult != TEEC_SUCCESS)
-		goto exit;
-
-	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
-	TeecOperation.params[0].tmpref.size = SharedMem0.size;
-
-	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
-	TeecOperation.params[1].tmpref.size = SharedMem1.size;
-
-
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
-						TEEC_MEMREF_TEMP_INOUT,
-						TEEC_NONE,
-						TEEC_NONE);
-
-	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					0,
-					&TeecOperation,
-					&ErrorOrigin);
-	if (TeecResult == TEEC_SUCCESS)
-		memcpy(lock_state, SharedMem1.buffer, SharedMem1.size);
-exit:
-	TEEC_ReleaseSharedMemory(&SharedMem0);
-	TEEC_ReleaseSharedMemory(&SharedMem1);
-	TEEC_CloseSession(&TeecSession);
-	TEEC_FinalizeContext(&TeecContext);
-
-	return TeecResult;
-}
-
-uint32_t trusty_write_lock_state(uint8_t lock_state)
-{
-	TEEC_Result TeecResult;
-	TEEC_Context TeecContext;
-	TEEC_Session TeecSession;
-	uint32_t ErrorOrigin;
-	TEEC_UUID  tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
-		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
-	TEEC_UUID *TeecUuid = &tempuuid;
-	TEEC_Operation TeecOperation = {0};
-	struct blk_desc *dev_desc;
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: dev_desc is NULL!\n", __func__);
-		return -TEEC_ERROR_GENERIC;
-	}
-
-	TeecResult = OpteeClientApiLibInitialize();
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
-						TEEC_NONE,
-						TEEC_NONE,
-						TEEC_NONE);
-	/*0 nand or emmc "security" partition , 1 rpmb*/
-	if (dev_desc->if_type == IF_TYPE_MMC && dev_desc->devnum == 0)
-		TeecOperation.params[0].value.a = 1;
-	else
-		TeecOperation.params[0].value.a = 0;
-
-#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
-	TeecOperation.params[0].value.a = 0;
-#endif
-
-	TeecResult = TEEC_OpenSession(&TeecContext,
-				&TeecSession,
-				TeecUuid,
-				TEEC_LOGIN_PUBLIC,
-				NULL,
-				&TeecOperation,
-				&ErrorOrigin);
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TEEC_SharedMemory SharedMem0 = {0};
-
-	SharedMem0.size = sizeof("lock_state");
-	SharedMem0.flags = 0;
-
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
-	if (TeecResult != TEEC_SUCCESS)
-		goto exit;
-
-	memcpy(SharedMem0.buffer, "lock_state", SharedMem0.size);
-
-	TEEC_SharedMemory SharedMem1 = {0};
-
-	SharedMem1.size = 1;
-	SharedMem1.flags = 0;
-
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
-	if (TeecResult != TEEC_SUCCESS)
-		goto exit;
-
-	memcpy(SharedMem1.buffer, &lock_state, SharedMem1.size);
-
-	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
-	TeecOperation.params[0].tmpref.size = SharedMem0.size;
-
-	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
-	TeecOperation.params[1].tmpref.size = SharedMem1.size;
-
-
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
-						TEEC_MEMREF_TEMP_INOUT,
-						TEEC_NONE,
-						TEEC_NONE);
-
-	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					1,
-					&TeecOperation,
-					&ErrorOrigin);
-	if (TeecResult != TEEC_SUCCESS)
-		goto exit;
-exit:
-	TEEC_ReleaseSharedMemory(&SharedMem0);
-	TEEC_ReleaseSharedMemory(&SharedMem1);
-	TEEC_CloseSession(&TeecSession);
-	TEEC_FinalizeContext(&TeecContext);
-
-	return TeecResult;
-}
-
-uint32_t trusty_read_flash_lock_state(uint8_t *flash_lock_state)
-{
-	TEEC_Result TeecResult;
-	TEEC_Context TeecContext;
-	TEEC_Session TeecSession;
-	uint32_t ErrorOrigin;
-	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
-		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
-	TEEC_UUID *TeecUuid = &tempuuid;
-	TEEC_Operation TeecOperation = {0};
-	struct blk_desc *dev_desc;
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: dev_desc is NULL!\n", __func__);
-		return -TEEC_ERROR_GENERIC;
-	}
-
-	TeecResult = OpteeClientApiLibInitialize();
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
-						TEEC_NONE,
-						TEEC_NONE,
-						TEEC_NONE);
-	/*0 nand or emmc "security" partition , 1 rpmb*/
-	if (dev_desc->if_type == IF_TYPE_MMC && dev_desc->devnum == 0)
-		TeecOperation.params[0].value.a = 1;
-	else
-		TeecOperation.params[0].value.a = 0;
-
-#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
-	TeecOperation.params[0].value.a = 0;
-#endif
-
-	TeecResult = TEEC_OpenSession(&TeecContext,
-				&TeecSession,
-				TeecUuid,
-				TEEC_LOGIN_PUBLIC,
-				NULL,
-				&TeecOperation,
-				&ErrorOrigin);
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TEEC_SharedMemory SharedMem0 = {0};
-
-	SharedMem0.size = sizeof("flash_lock_state");
-	SharedMem0.flags = 0;
-
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
-	if (TeecResult != TEEC_SUCCESS)
-		goto exit;
-
-	memcpy(SharedMem0.buffer, "flash_lock_state", SharedMem0.size);
-
-	TEEC_SharedMemory SharedMem1 = {0};
-
-	SharedMem1.size = 1;
-	SharedMem1.flags = 0;
-
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
-	if (TeecResult != TEEC_SUCCESS)
-		goto exit;
-
-	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
-	TeecOperation.params[0].tmpref.size = SharedMem0.size;
-
-	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
-	TeecOperation.params[1].tmpref.size = SharedMem1.size;
-
-
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
-						TEEC_MEMREF_TEMP_INOUT,
-						TEEC_NONE,
-						TEEC_NONE);
-
-	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					0,
-					&TeecOperation,
-					&ErrorOrigin);
-	if (TeecResult == TEEC_SUCCESS)
-		memcpy(flash_lock_state, SharedMem1.buffer, SharedMem1.size);
-exit:
-	TEEC_ReleaseSharedMemory(&SharedMem0);
-	TEEC_ReleaseSharedMemory(&SharedMem1);
-	TEEC_CloseSession(&TeecSession);
-	TEEC_FinalizeContext(&TeecContext);
-
-	return TeecResult;
-}
-
-
-uint32_t trusty_write_flash_lock_state(uint8_t flash_lock_state)
-{
-	TEEC_Result TeecResult;
-	TEEC_Context TeecContext;
-	TEEC_Session TeecSession;
-	uint32_t ErrorOrigin;
-	TEEC_UUID  tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
-		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
-	TEEC_UUID *TeecUuid = &tempuuid;
-	TEEC_Operation TeecOperation = {0};
-	struct blk_desc *dev_desc;
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: dev_desc is NULL!\n", __func__);
-		return -TEEC_ERROR_GENERIC;
-	}
-
-	TeecResult = OpteeClientApiLibInitialize();
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
-						TEEC_NONE,
-						TEEC_NONE,
-						TEEC_NONE);
-	/*0 nand or emmc "security" partition , 1 rpmb*/
-	if (dev_desc->if_type == IF_TYPE_MMC && dev_desc->devnum == 0)
-		TeecOperation.params[0].value.a = 1;
-	else
-		TeecOperation.params[0].value.a = 0;
-
-#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
-	TeecOperation.params[0].value.a = 0;
-#endif
-
-	TeecResult = TEEC_OpenSession(&TeecContext,
-				&TeecSession,
-				TeecUuid,
-				TEEC_LOGIN_PUBLIC,
-				NULL,
-				&TeecOperation,
-				&ErrorOrigin);
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TEEC_SharedMemory SharedMem0 = {0};
-
-	SharedMem0.size = sizeof("flash_lock_state");
-	SharedMem0.flags = 0;
-
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
-	if (TeecResult != TEEC_SUCCESS)
-		goto exit;
-
-	memcpy(SharedMem0.buffer, "flash_lock_state", SharedMem0.size);
-
-	TEEC_SharedMemory SharedMem1 = {0};
-
-	SharedMem1.size = 1;
-	SharedMem1.flags = 0;
-
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
-	if (TeecResult != TEEC_SUCCESS)
-		goto exit;
-
-	memcpy(SharedMem1.buffer, &flash_lock_state, SharedMem1.size);
-
-	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
-	TeecOperation.params[0].tmpref.size = SharedMem0.size;
-
-	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
-	TeecOperation.params[1].tmpref.size = SharedMem1.size;
-
-
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
-						TEEC_MEMREF_TEMP_INOUT,
-						TEEC_NONE,
-						TEEC_NONE);
-
-	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					1,
-					&TeecOperation,
-					&ErrorOrigin);
-	if (TeecResult != TEEC_SUCCESS)
-		goto exit;
-exit:
-	TEEC_ReleaseSharedMemory(&SharedMem0);
-	TEEC_ReleaseSharedMemory(&SharedMem1);
-	TEEC_CloseSession(&TeecSession);
-	TEEC_FinalizeContext(&TeecContext);
-
-	return TeecResult;
-}
-
-uint32_t trusty_read_attribute_hash(uint32_t *buf, uint32_t length)
-{
-	TEEC_Result TeecResult;
-	TEEC_Context TeecContext;
-	TEEC_Session TeecSession;
-	uint32_t ErrorOrigin;
-
-	TEEC_UUID tempuuid = { 0x2d26d8a8, 0x5134, 0x4dd8, \
-			{ 0xb3, 0x2f, 0xb3, 0x4b, 0xce, 0xeb, 0xc4, 0x71 } };
-	TEEC_UUID *TeecUuid = &tempuuid;
-	TEEC_Operation TeecOperation = {0};
-
-	TeecResult = OpteeClientApiLibInitialize();
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TeecResult = TEEC_OpenSession(&TeecContext,
-				&TeecSession,
-				TeecUuid,
-				TEEC_LOGIN_PUBLIC,
-				NULL,
-				NULL,
-				&ErrorOrigin);
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TEEC_SharedMemory SharedMem0 = {0};
-
-	SharedMem0.size = length * sizeof(uint32_t);
-	SharedMem0.flags = 0;
-
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
-	if (TeecResult != TEEC_SUCCESS)
-		goto exit;
-
-	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
-	TeecOperation.params[0].tmpref.size = SharedMem0.size;
-
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_OUTPUT,
-						TEEC_NONE,
-						TEEC_NONE,
-						TEEC_NONE);
-
-	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					0,
-					&TeecOperation,
-					&ErrorOrigin);
-
-	if (TeecResult == TEEC_SUCCESS)
-		memcpy(buf, SharedMem0.buffer, SharedMem0.size);
-exit:
-	TEEC_ReleaseSharedMemory(&SharedMem0);
-	TEEC_CloseSession(&TeecSession);
-	TEEC_FinalizeContext(&TeecContext);
-
-	return TeecResult;
-}
-
-uint32_t trusty_write_attribute_hash(uint32_t *buf, uint32_t length)
-{
-	TEEC_Result TeecResult;
-	TEEC_Context TeecContext;
-	TEEC_Session TeecSession;
-	uint32_t ErrorOrigin;
-
-	TEEC_UUID tempuuid = { 0x2d26d8a8, 0x5134, 0x4dd8, \
-			{ 0xb3, 0x2f, 0xb3, 0x4b, 0xce, 0xeb, 0xc4, 0x71 } };
-	TEEC_UUID *TeecUuid = &tempuuid;
-	TEEC_Operation TeecOperation = {0};
-
-	TeecResult = OpteeClientApiLibInitialize();
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TeecResult = TEEC_OpenSession(&TeecContext,
-				&TeecSession,
-				TeecUuid,
-				TEEC_LOGIN_PUBLIC,
-				NULL,
-				NULL,
-				&ErrorOrigin);
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TEEC_SharedMemory SharedMem0 = {0};
-
-	SharedMem0.size = length * sizeof(uint32_t);
-	SharedMem0.flags = 0;
-
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
-	if (TeecResult != TEEC_SUCCESS)
-		goto exit;
-
-	memcpy(SharedMem0.buffer, buf, SharedMem0.size);
-
-	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
-	TeecOperation.params[0].tmpref.size = SharedMem0.size;
-
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
-						TEEC_NONE,
-						TEEC_NONE,
-						TEEC_NONE);
-
-	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					1,
-					&TeecOperation,
-					&ErrorOrigin);
-	if (TeecResult != TEEC_SUCCESS)
-		goto exit;
-exit:
-	TEEC_ReleaseSharedMemory(&SharedMem0);
-	TEEC_CloseSession(&TeecSession);
-	TEEC_FinalizeContext(&TeecContext);
-
-	return TeecResult;
-}
-
-uint32_t notify_optee_rpmb_ta(void)
-{
-	TEEC_Result TeecResult;
-	TEEC_Context TeecContext;
-	TEEC_Session TeecSession;
-	uint32_t ErrorOrigin;
-	TEEC_UUID  tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
-		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
-	TEEC_UUID *TeecUuid = &tempuuid;
-	TEEC_Operation TeecOperation = {0};
-
-	TeecResult = OpteeClientApiLibInitialize();
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TeecResult = TEEC_OpenSession(&TeecContext,
-				&TeecSession,
-				TeecUuid,
-				TEEC_LOGIN_PUBLIC,
-				NULL,
-				NULL,
-				&ErrorOrigin);
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_NONE,
-						TEEC_NONE,
-						TEEC_NONE,
-						TEEC_NONE);
-
-	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					2,
-					&TeecOperation,
-					&ErrorOrigin);
-	if (TeecResult != TEEC_SUCCESS)
-		goto exit;
-exit:
-	TEEC_CloseSession(&TeecSession);
-	TEEC_FinalizeContext(&TeecContext);
-
-	return TeecResult;
-}
-
-uint32_t notify_optee_efuse_ta(void)
-{
-	TEEC_Result TeecResult;
-	TEEC_Context TeecContext;
-	TEEC_Session TeecSession;
-	uint32_t ErrorOrigin;
-	TEEC_UUID tempuuid = { 0x2d26d8a8, 0x5134, 0x4dd8, \
-			{ 0xb3, 0x2f, 0xb3, 0x4b, 0xce, 0xeb, 0xc4, 0x71 } };
-
-	TEEC_UUID *TeecUuid = &tempuuid;
-	TEEC_Operation TeecOperation = {0};
-
-	TeecResult = OpteeClientApiLibInitialize();
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TeecResult = TEEC_OpenSession(&TeecContext,
-				&TeecSession,
-				TeecUuid,
-				TEEC_LOGIN_PUBLIC,
-				NULL,
-				NULL,
-				&ErrorOrigin);
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_NONE,
-						TEEC_NONE,
-						TEEC_NONE,
-						TEEC_NONE);
-
-	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					2,
-					&TeecOperation,
-					&ErrorOrigin);
-	if (TeecResult != TEEC_SUCCESS)
-		goto exit;
-exit:
-	TEEC_CloseSession(&TeecSession);
-	TEEC_FinalizeContext(&TeecContext);
-
-	return TeecResult;
-}
-
-uint32_t trusty_notify_optee_uboot_end(void)
-{
-	TEEC_Result res;
-	res = notify_optee_rpmb_ta();
-	res |= notify_optee_efuse_ta();
-	return res;
-}
-
-uint32_t trusty_read_vbootkey_hash(uint32_t *buf, uint32_t length)
-{
-	TEEC_Result TeecResult;
-	TEEC_Context TeecContext;
-	TEEC_Session TeecSession;
-	uint32_t ErrorOrigin;
-
-	TEEC_UUID tempuuid = { 0x2d26d8a8, 0x5134, 0x4dd8, \
-			{ 0xb3, 0x2f, 0xb3, 0x4b, 0xce, 0xeb, 0xc4, 0x71 } };
-	TEEC_UUID *TeecUuid = &tempuuid;
-	TEEC_Operation TeecOperation = {0};
-
-	TeecResult = OpteeClientApiLibInitialize();
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TeecResult = TEEC_OpenSession(&TeecContext,
-				&TeecSession,
-				TeecUuid,
-				TEEC_LOGIN_PUBLIC,
-				NULL,
-				NULL,
-				&ErrorOrigin);
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TEEC_SharedMemory SharedMem0 = {0};
-
-	SharedMem0.size = length * sizeof(uint32_t);
-	SharedMem0.flags = 0;
-
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
-	if (TeecResult != TEEC_SUCCESS)
-		goto exit;
-
-	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
-	TeecOperation.params[0].tmpref.size = SharedMem0.size;
-
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_OUTPUT,
-						TEEC_NONE,
-						TEEC_NONE,
-						TEEC_NONE);
-
-	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					3,
-					&TeecOperation,
-					&ErrorOrigin);
-
-	if (TeecResult == TEEC_SUCCESS)
-		memcpy(buf, SharedMem0.buffer, SharedMem0.size);
-exit:
-	TEEC_ReleaseSharedMemory(&SharedMem0);
-	TEEC_CloseSession(&TeecSession);
-	TEEC_FinalizeContext(&TeecContext);
-
-	return TeecResult;
-}
-uint32_t trusty_write_vbootkey_hash(uint32_t *buf, uint32_t length)
-{
-	TEEC_Result TeecResult;
-	TEEC_Context TeecContext;
-	TEEC_Session TeecSession;
-	uint32_t ErrorOrigin;
-
-	TEEC_UUID tempuuid = { 0x2d26d8a8, 0x5134, 0x4dd8, \
-			{ 0xb3, 0x2f, 0xb3, 0x4b, 0xce, 0xeb, 0xc4, 0x71 } };
-	TEEC_UUID *TeecUuid = &tempuuid;
-	TEEC_Operation TeecOperation = {0};
-
-	TeecResult = OpteeClientApiLibInitialize();
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TeecResult = TEEC_OpenSession(&TeecContext,
-				&TeecSession,
-				TeecUuid,
-				TEEC_LOGIN_PUBLIC,
-				NULL,
-				NULL,
-				&ErrorOrigin);
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TEEC_SharedMemory SharedMem0 = {0};
-
-	SharedMem0.size = length * sizeof(uint32_t);
-	SharedMem0.flags = 0;
-
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
-	if (TeecResult != TEEC_SUCCESS)
-		goto exit;
-
-	memcpy(SharedMem0.buffer, buf, SharedMem0.size);
-
-	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
-	TeecOperation.params[0].tmpref.size = SharedMem0.size;
-
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
-						TEEC_NONE,
-						TEEC_NONE,
-						TEEC_NONE);
-
-	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					4,
-					&TeecOperation,
-					&ErrorOrigin);
-	if (TeecResult != TEEC_SUCCESS)
-		goto exit;
-exit:
-	TEEC_ReleaseSharedMemory(&SharedMem0);
-	TEEC_CloseSession(&TeecSession);
-	TEEC_FinalizeContext(&TeecContext);
-
-	return TeecResult;
+	return trusty_base_efuse_or_otp_operation(STORAGE_CMD_READ_ATTRIBUTE_HASH,
+						  false, buf, length);
 }
 
-uint32_t trusty_read_vbootkey_enable_flag(uint8_t *flag)
+uint32_t trusty_write_attribute_hash(uint32_t *buf, uint32_t length)
 {
-	TEEC_Result TeecResult;
-	TEEC_Context TeecContext;
-	TEEC_Session TeecSession;
-	uint32_t ErrorOrigin;
-	uint32_t bootflag;
-
-	TEEC_UUID tempuuid = { 0x2d26d8a8, 0x5134, 0x4dd8, \
-			{ 0xb3, 0x2f, 0xb3, 0x4b, 0xce, 0xeb, 0xc4, 0x71 } };
-	TEEC_UUID *TeecUuid = &tempuuid;
-	TEEC_Operation TeecOperation = {0};
-
-	TeecResult = OpteeClientApiLibInitialize();
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TeecResult = TEEC_OpenSession(&TeecContext,
-				&TeecSession,
-				TeecUuid,
-				TEEC_LOGIN_PUBLIC,
-				NULL,
-				NULL,
-				&ErrorOrigin);
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
+	return trusty_base_efuse_or_otp_operation(STORAGE_CMD_WRITE_ATTRIBUTE_HASH,
+						  true, buf, length);
+}
 
-	TEEC_SharedMemory SharedMem0 = {0};
+uint32_t trusty_notify_optee_uboot_end(void)
+{
+	TEEC_Result res;
 
-	SharedMem0.size = 1 * sizeof(uint32_t);
-	SharedMem0.flags = 0;
+	res = trusty_base_end_security_data();
+	res |= trusty_base_end_efuse_or_otp();
+	return res;
+}
 
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
-	if (TeecResult != TEEC_SUCCESS)
-		goto exit;
+uint32_t trusty_read_vbootkey_hash(uint32_t *buf, uint32_t length)
+{
+	return trusty_base_efuse_or_otp_operation(STORAGE_CMD_READ_VBOOTKEY_HASH,
+						  false, buf, length);
+}
 
-	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
-	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+uint32_t trusty_write_vbootkey_hash(uint32_t *buf, uint32_t length)
+{
+	return trusty_base_efuse_or_otp_operation(STORAGE_CMD_WRITE_VBOOTKEY_HASH,
+						  true, buf, length);
+}
 
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_OUTPUT,
-						TEEC_NONE,
-						TEEC_NONE,
-						TEEC_NONE);
+uint32_t trusty_read_vbootkey_enable_flag(uint8_t *flag)
+{
+	uint32_t bootflag;
+	TEEC_Result TeecResult;
 
-	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					5,
-					&TeecOperation,
-					&ErrorOrigin);
+	TeecResult = trusty_base_efuse_or_otp_operation(STORAGE_CMD_READ_ENABLE_FLAG,
+							false, &bootflag, 1);
 
 	if (TeecResult == TEEC_SUCCESS) {
-		memcpy(&bootflag, SharedMem0.buffer, SharedMem0.size);
 #if defined(CONFIG_ROCKCHIP_RK3288)
 		if (bootflag == 0x00000001)
 			*flag = 1;
@@ -1512,203 +545,6 @@ uint32_t trusty_read_vbootkey_enable_flag(uint8_t *flag)
 			*flag = 1;
 #endif
 	}
-exit:
-	TEEC_ReleaseSharedMemory(&SharedMem0);
-	TEEC_CloseSession(&TeecSession);
-	TEEC_FinalizeContext(&TeecContext);
-
-	return TeecResult;
-}
-
-uint32_t trusty_read_permanent_attributes_flag(uint8_t *attributes)
-{
-	TEEC_Result TeecResult;
-	TEEC_Context TeecContext;
-	TEEC_Session TeecSession;
-	uint32_t ErrorOrigin;
-	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
-		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
-	TEEC_UUID *TeecUuid = &tempuuid;
-	TEEC_Operation TeecOperation = {0};
-	struct blk_desc *dev_desc;
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: dev_desc is NULL!\n", __func__);
-		return -TEEC_ERROR_GENERIC;
-	}
-
-	TeecResult = OpteeClientApiLibInitialize();
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
-						TEEC_NONE,
-						TEEC_NONE,
-						TEEC_NONE);
-	/*0 nand or emmc "security" partition , 1 rpmb*/
-	if (dev_desc->if_type == IF_TYPE_MMC && dev_desc->devnum == 0)
-		TeecOperation.params[0].value.a = 1;
-	else
-		TeecOperation.params[0].value.a = 0;
-
-#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
-	TeecOperation.params[0].value.a = 0;
-#endif
-
-	TeecResult = TEEC_OpenSession(&TeecContext,
-				&TeecSession,
-				TeecUuid,
-				TEEC_LOGIN_PUBLIC,
-				NULL,
-				&TeecOperation,
-				&ErrorOrigin);
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TEEC_SharedMemory SharedMem0 = {0};
-
-	SharedMem0.size = sizeof("attributes_flag");
-	SharedMem0.flags = 0;
-
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
-	if (TeecResult != TEEC_SUCCESS)
-		goto exit;
-
-	memcpy(SharedMem0.buffer, "attributes_flag", SharedMem0.size);
-
-	TEEC_SharedMemory SharedMem1 = {0};
-
-	SharedMem1.size = 1;
-	SharedMem1.flags = 0;
-
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
-	if (TeecResult != TEEC_SUCCESS)
-		goto exit;
-
-	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
-	TeecOperation.params[0].tmpref.size = SharedMem0.size;
-
-	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
-	TeecOperation.params[1].tmpref.size = SharedMem1.size;
-
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
-						TEEC_MEMREF_TEMP_INOUT,
-						TEEC_NONE,
-						TEEC_NONE);
-
-	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					0,
-					&TeecOperation,
-					&ErrorOrigin);
-	if (TeecResult == TEEC_SUCCESS)
-		memcpy(attributes, SharedMem1.buffer, SharedMem1.size);
-exit:
-	TEEC_ReleaseSharedMemory(&SharedMem0);
-	TEEC_ReleaseSharedMemory(&SharedMem1);
-	TEEC_CloseSession(&TeecSession);
-	TEEC_FinalizeContext(&TeecContext);
-
-	return TeecResult;
-}
-
-uint32_t trusty_write_permanent_attributes_flag(uint8_t attributes)
-{
-	TEEC_Result TeecResult;
-	TEEC_Context TeecContext;
-	TEEC_Session TeecSession;
-	uint32_t ErrorOrigin;
-	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
-		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
-	TEEC_UUID *TeecUuid = &tempuuid;
-	TEEC_Operation TeecOperation = {0};
-	struct blk_desc *dev_desc;
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: dev_desc is NULL!\n", __func__);
-		return -TEEC_ERROR_GENERIC;
-	}
-
-	TeecResult = OpteeClientApiLibInitialize();
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
-						TEEC_NONE,
-						TEEC_NONE,
-						TEEC_NONE);
-	/*0 nand or emmc "security" partition , 1 rpmb*/
-	if (dev_desc->if_type == IF_TYPE_MMC && dev_desc->devnum == 0)
-		TeecOperation.params[0].value.a = 1;
-	else
-		TeecOperation.params[0].value.a = 0;
-
-#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
-	TeecOperation.params[0].value.a = 0;
-#endif
-
-	TeecResult = TEEC_OpenSession(&TeecContext,
-				&TeecSession,
-				TeecUuid,
-				TEEC_LOGIN_PUBLIC,
-				NULL,
-				&TeecOperation,
-				&ErrorOrigin);
-	if (TeecResult != TEEC_SUCCESS)
-		return TeecResult;
-
-	TEEC_SharedMemory SharedMem0 = {0};
-
-	SharedMem0.size = sizeof("attributes_flag");
-	SharedMem0.flags = 0;
-
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
-	if (TeecResult != TEEC_SUCCESS)
-		goto exit;
-
-	memcpy(SharedMem0.buffer, "attributes_flag", SharedMem0.size);
-
-	TEEC_SharedMemory SharedMem1 = {0};
-
-	SharedMem1.size = 1;
-	SharedMem1.flags = 0;
-
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
-	if (TeecResult != TEEC_SUCCESS)
-		goto exit;
-
-	memcpy(SharedMem1.buffer, (char *)&attributes, SharedMem1.size);
-
-	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
-	TeecOperation.params[0].tmpref.size = SharedMem0.size;
-
-	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
-	TeecOperation.params[1].tmpref.size = SharedMem1.size;
-
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
-						TEEC_MEMREF_TEMP_INOUT,
-						TEEC_NONE,
-						TEEC_NONE);
-
-	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					1,
-					&TeecOperation,
-					&ErrorOrigin);
-	if (TeecResult != TEEC_SUCCESS)
-		goto exit;
-exit:
-	TEEC_ReleaseSharedMemory(&SharedMem0);
-	TEEC_ReleaseSharedMemory(&SharedMem1);
-	TEEC_CloseSession(&TeecSession);
-	TEEC_FinalizeContext(&TeecContext);
-
 	return TeecResult;
 }
 

commit 65617e2f2fafbac5a6010517ef81b68f9fd3d6b6
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri May 28 16:07:39 2021 +0800

    video/drm: dsi: disable phy when power off
    
    Change-Id: I9925ebecc557e4f0a615358010e4d71ad0e86b84
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/dw_mipi_dsi.c b/drivers/video/drm/dw_mipi_dsi.c
index 8cac4cb02b..3d257311e6 100644
--- a/drivers/video/drm/dw_mipi_dsi.c
+++ b/drivers/video/drm/dw_mipi_dsi.c
@@ -939,6 +939,9 @@ static void dw_mipi_dsi_post_disable(struct dw_mipi_dsi *dsi)
 	dsi_write(dsi, DSI_PWR_UP, RESET);
 	dsi_write(dsi, DSI_PHY_RSTZ, 0);
 
+	if (dsi->dphy.phy)
+		rockchip_phy_power_off(dsi->dphy.phy);
+
 	dsi->prepared = false;
 
 	if (dsi->slave)

commit d3fa6ff33cfbc33ca790eecbe00571344dc86bd0
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri May 28 14:36:40 2021 +0800

    mtd: spinand: Change to correct copyright
    
    Change-Id: I6ec3f54e30d1bbb12253c4eab9510bf5df9424e6
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/hyf.c b/drivers/mtd/nand/spi/hyf.c
index 1006fbe4f8..2aad70153e 100644
--- a/drivers/mtd/nand/spi/hyf.c
+++ b/drivers/mtd/nand/spi/hyf.c
@@ -1,10 +1,9 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Copyright (c) 2020 exceet electronics GmbH
+ * Copyright (c) 2020-2021 Rockchip Electronics Co., Ltd
  *
  * Authors:
- *	Frieder Schrempf <frieder.schrempf@exceet.de>
- *	Boris Brezillon <boris.brezillon@bootlin.com>
+ *	Dingqiang Lin <jon.lin@rock-chips.com>
  */
 
 #ifndef __UBOOT__

commit 4b3d79dc1b676dfb5774b26fbcdf4c845b0f2f96
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri May 28 14:36:24 2021 +0800

    mtd: spinand: Change to correct copyright
    
    Change-Id: I6253fc3d13d338e1c02bf899bcb5f12f2599293d
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/fmsh.c b/drivers/mtd/nand/spi/fmsh.c
index 73c961e84e..2fa9d14cce 100644
--- a/drivers/mtd/nand/spi/fmsh.c
+++ b/drivers/mtd/nand/spi/fmsh.c
@@ -1,10 +1,9 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Copyright (c) 2020 exceet electronics GmbH
+ * Copyright (c) 2020-2021 Rockchip Electronics Co., Ltd
  *
  * Authors:
- *	Frieder Schrempf <frieder.schrempf@exceet.de>
- *	Boris Brezillon <boris.brezillon@bootlin.com>
+ *	Dingqiang Lin <jon.lin@rock-chips.com>
  */
 
 #ifndef __UBOOT__

commit bb28334df0bd770e3358033260e6a20bc3c17c9f
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri May 28 14:33:44 2021 +0800

    mtd: spinand: Change to correct copyright
    
    Change-Id: I4da6e2f1a768c5ed3e0ee426afe5d524da9f3a4e
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/etron.c b/drivers/mtd/nand/spi/etron.c
index 4fdf5953ef..38eaff5561 100644
--- a/drivers/mtd/nand/spi/etron.c
+++ b/drivers/mtd/nand/spi/etron.c
@@ -1,9 +1,6 @@
-// SPDX-License-Identifier: GPL-2.0
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 /*
- * Copyright (c) 2021 Rockchip Electronics Co., Ltd
- *
- * Authors:
- *	Dingqiang Lin <jon.lin@rock-chips.com>
+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
  */
 
 #ifndef __UBOOT__

commit da9bb89bff421d7c6b5aab72cb85a6af29ca1ca7
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri May 28 11:57:17 2021 +0800

    mtd: spinand: Support new device
    
    js28u1gqscahg-83
    
    Change-Id: I45a1d60b01ac52f72ba5d8fc75242dfc6c402d3a
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/Kconfig b/drivers/mtd/nand/spi/Kconfig
index 64cda1b82c..1d4ee2d974 100644
--- a/drivers/mtd/nand/spi/Kconfig
+++ b/drivers/mtd/nand/spi/Kconfig
@@ -89,4 +89,10 @@ config SPI_NAND_ETRON
 	help
 	  Add support for various ETRON SPI Nand flash chips
 
+config SPI_NAND_JSC
+	default y
+	bool "JSC SPI flash support"
+	help
+	  Add support for various JSC SPI Nand flash chips
+
 endif
diff --git a/drivers/mtd/nand/spi/Makefile b/drivers/mtd/nand/spi/Makefile
index 08b035d669..48c2b941a6 100644
--- a/drivers/mtd/nand/spi/Makefile
+++ b/drivers/mtd/nand/spi/Makefile
@@ -14,4 +14,5 @@ obj-$(CONFIG_SPI_NAND_FMSH) += fmsh.o
 obj-$(CONFIG_SPI_NAND_FORESEE) += foresee.o
 obj-$(CONFIG_SPI_NAND_BIWIN) += biwin.o
 obj-$(CONFIG_SPI_NAND_ETRON) += etron.o
+obj-$(CONFIG_SPI_NAND_JSC) += jsc.o
 obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index f15f254e55..0964b32942 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -854,6 +854,9 @@ static const struct spinand_manufacturer *spinand_manufacturers[] = {
 #ifdef CONFIG_SPI_NAND_ETRON
 	&etron_spinand_manufacturer,
 #endif
+#ifdef CONFIG_SPI_NAND_JSC
+	&jsc_spinand_manufacturer,
+#endif
 };
 
 static int spinand_manufacturer_detect(struct spinand_device *spinand)
diff --git a/drivers/mtd/nand/spi/jsc.c b/drivers/mtd/nand/spi/jsc.c
new file mode 100644
index 0000000000..6a5aea71ad
--- /dev/null
+++ b/drivers/mtd/nand/spi/jsc.c
@@ -0,0 +1,131 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd
+ *
+ * Authors:
+ *	Dingqiang Lin <jon.lin@rock-chips.com>
+ */
+
+#ifndef __UBOOT__
+#include <linux/device.h>
+#include <linux/kernel.h>
+#endif
+#include <linux/mtd/spinand.h>
+
+#define SPINAND_MFR_JSC		0xBF
+
+static SPINAND_OP_VARIANTS(read_cache_variants,
+		SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
+
+static SPINAND_OP_VARIANTS(write_cache_variants,
+		SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
+		SPINAND_PROG_LOAD(true, 0, NULL, 0));
+
+static SPINAND_OP_VARIANTS(update_cache_variants,
+		SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
+		SPINAND_PROG_LOAD(false, 0, NULL, 0));
+
+static int js28u1gqscahg_ooblayout_ecc(struct mtd_info *mtd, int section,
+				       struct mtd_oob_region *region)
+{
+	if (section)
+		return -ERANGE;
+
+	region->offset = mtd->oobsize / 2;
+	region->length = mtd->oobsize / 2;
+
+	return 0;
+}
+
+static int js28u1gqscahg_ooblayout_free(struct mtd_info *mtd, int section,
+					struct mtd_oob_region *region)
+{
+	if (section)
+		return -ERANGE;
+
+	/* Reserve 2 bytes for the BBM. */
+	region->offset = 2;
+	region->length = mtd->oobsize / 2 - 2;
+
+	return 0;
+}
+
+static const struct mtd_ooblayout_ops js28u1gqscahg_ooblayout = {
+	.ecc = js28u1gqscahg_ooblayout_ecc,
+	.rfree = js28u1gqscahg_ooblayout_free,
+};
+
+/*
+ * ecc bits: 0xC0[4,6]
+ * [0b000], No bit errors were detected;
+ * [0b001, 0b011], 1~3 Bit errors were detected and corrected. Not
+ *	reach Flipping Bits;
+ * [0b100], Bit error count equals the bit flip
+ *	detection threshold
+ * others, Reserved.
+ */
+static int js28u1gqscahg_ecc_get_status(struct spinand_device *spinand,
+					u8 status)
+{
+	u8 eccsr = (status & GENMASK(6, 4)) >> 2;
+
+	if (eccsr <= 7)
+		return eccsr;
+	else if (eccsr == 12)
+		return 8;
+	else
+		return -EBADMSG;
+}
+
+static const struct spinand_info jsc_spinand_table[] = {
+	SPINAND_INFO("JS28U1GQSCAHG-83", 0x21,
+		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
+		     NAND_ECCREQ(4, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&js28u1gqscahg_ooblayout, js28u1gqscahg_ecc_get_status)),
+};
+
+/**
+ * jsc_spinand_detect - initialize device related part in spinand_device
+ * struct if it is a JSC device.
+ * @spinand: SPI NAND device structure
+ */
+static int jsc_spinand_detect(struct spinand_device *spinand)
+{
+	u8 *id = spinand->id.data;
+	int ret;
+
+	/*
+	 * JSC SPI NAND read ID need a dummy byte,
+	 * so the first byte in raw_id is dummy.
+	 */
+	if (id[1] != SPINAND_MFR_JSC)
+		return 0;
+
+	ret = spinand_match_and_init(spinand, jsc_spinand_table,
+				     ARRAY_SIZE(jsc_spinand_table),
+				     id[2]);
+
+	if (ret)
+		return ret;
+
+	return 1;
+}
+
+static const struct spinand_manufacturer_ops jsc_spinand_manuf_ops = {
+	.detect = jsc_spinand_detect,
+};
+
+const struct spinand_manufacturer jsc_spinand_manufacturer = {
+	.id = SPINAND_MFR_JSC,
+	.name = "JSC",
+	.ops = &jsc_spinand_manuf_ops,
+};
diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
index a588c108dd..efd8f7cdee 100644
--- a/include/linux/mtd/spinand.h
+++ b/include/linux/mtd/spinand.h
@@ -214,6 +214,7 @@ extern const struct spinand_manufacturer fmsh_spinand_manufacturer;
 extern const struct spinand_manufacturer foresee_spinand_manufacturer;
 extern const struct spinand_manufacturer biwin_spinand_manufacturer;
 extern const struct spinand_manufacturer etron_spinand_manufacturer;
+extern const struct spinand_manufacturer jsc_spinand_manufacturer;
 
 /**
  * struct spinand_op_variants - SPI NAND operation variants

commit b9d47743e64ff33672df8796e80eb499f2dc87b4
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri May 28 10:27:23 2021 +0800

    mtd: spinand: Support new device
    
    MT29F1G01ABAGD
    
    Change-Id: I14828a55106ae26cfec849696571a7a5be25905f
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c
index 9c24542f96..8d8720ee32 100644
--- a/drivers/mtd/nand/spi/micron.c
+++ b/drivers/mtd/nand/spi/micron.c
@@ -102,6 +102,15 @@ static const struct spinand_info micron_spinand_table[] = {
 		     0,
 		     SPINAND_ECCINFO(&mt29f2g01abagd_ooblayout,
 				     mt29f2g01abagd_ecc_get_status)),
+	SPINAND_INFO("MT29F1G01ABAGD", 0x14,
+		     NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     0,
+		     SPINAND_ECCINFO(&mt29f2g01abagd_ooblayout,
+				     mt29f2g01abagd_ecc_get_status)),
 };
 
 static int micron_spinand_detect(struct spinand_device *spinand)

commit c925bb36a4fd70d7cc16f699c10129e0316fc16d
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri May 28 10:26:37 2021 +0800

    mtd: spinand: Support new device
    
    XT26G11C
    
    Change-Id: I83a0165e7df8b53dd8ba6dd9857938385dc4ded3
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/xtx.c b/drivers/mtd/nand/spi/xtx.c
index 76e59eed24..51a8f78509 100644
--- a/drivers/mtd/nand/spi/xtx.c
+++ b/drivers/mtd/nand/spi/xtx.c
@@ -109,6 +109,35 @@ static const struct mtd_ooblayout_ops xt26g02b_ooblayout = {
 	.rfree = xt26g02b_ooblayout_free,
 };
 
+static int xt26g01c_ooblayout_ecc(struct mtd_info *mtd, int section,
+				  struct mtd_oob_region *region)
+{
+	if (section)
+		return -ERANGE;
+
+	region->offset = mtd->oobsize / 2;
+	region->length = mtd->oobsize / 2;
+
+	return 0;
+}
+
+static int xt26g01c_ooblayout_free(struct mtd_info *mtd, int section,
+				   struct mtd_oob_region *region)
+{
+	if (section)
+		return -ERANGE;
+
+	region->offset = 2;
+	region->length = mtd->oobsize / 2 - 2;
+
+	return 0;
+}
+
+static const struct mtd_ooblayout_ops xt26g01c_ooblayout = {
+	.ecc = xt26g01c_ooblayout_ecc,
+	.rfree = xt26g01c_ooblayout_free,
+};
+
 /*
  * ecc bits: 0xC0[2,5]
  * [0x0000], No bit errors were detected;
@@ -223,13 +252,13 @@ static const struct spinand_info xtx_spinand_table[] = {
 		     SPINAND_ECCINFO(&xt26g02b_ooblayout,
 				     xt26g02b_ecc_get_status)),
 	SPINAND_INFO("XT26G01C", 0x11,
-		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
+		     NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
 		     NAND_ECCREQ(8, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
 					      &write_cache_variants,
 					      &update_cache_variants),
 		     SPINAND_HAS_QE_BIT,
-		     SPINAND_ECCINFO(&xt26g01b_ooblayout,
+		     SPINAND_ECCINFO(&xt26g01c_ooblayout,
 				     xt26g01c_ecc_get_status)),
 	SPINAND_INFO("XT26G02C", 0x12,
 		     NAND_MEMORG(1, 2048, 64, 64, 2048, 1, 1, 1),
@@ -238,16 +267,25 @@ static const struct spinand_info xtx_spinand_table[] = {
 					      &write_cache_variants,
 					      &update_cache_variants),
 		     SPINAND_HAS_QE_BIT,
-		     SPINAND_ECCINFO(&xt26g01b_ooblayout,
+		     SPINAND_ECCINFO(&xt26g0xa_ooblayout,
 				     xt26g01c_ecc_get_status)),
 	SPINAND_INFO("XT26G04C", 0x13,
-		     NAND_MEMORG(1, 4096, 128, 64, 2048, 1, 1, 1),
+		     NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1),
 		     NAND_ECCREQ(8, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
 					      &write_cache_variants,
 					      &update_cache_variants),
 		     SPINAND_HAS_QE_BIT,
-		     SPINAND_ECCINFO(&xt26g01b_ooblayout,
+		     SPINAND_ECCINFO(&xt26g01c_ooblayout,
+				     xt26g01c_ecc_get_status)),
+	SPINAND_INFO("XT26G11C", 0x15,
+		     NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&xt26g01c_ooblayout,
 				     xt26g01c_ecc_get_status)),
 };
 

commit 6580548a6a846ecab08c5229f0de0c3d9cf1a0e7
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Thu Mar 4 14:20:16 2021 +0800

    drivers: crypto v1: fix RSA2048 multiple call error
    
    RK3288 RSA2048 must reset clk before every calculation.
    
    Change-Id: I89349af8b2143e115d22db9c4b56ef449453096e
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/drivers/crypto/rockchip/crypto_v1.c b/drivers/crypto/rockchip/crypto_v1.c
index 11d1b97fa4..252824e14f 100644
--- a/drivers/crypto/rockchip/crypto_v1.c
+++ b/drivers/crypto/rockchip/crypto_v1.c
@@ -7,6 +7,7 @@
 #include <clk.h>
 #include <crypto.h>
 #include <dm.h>
+#include <reset.h>
 #include <rockchip/crypto_hash_cache.h>
 #include <rockchip/crypto_v1.h>
 #include <asm/io.h>
@@ -24,13 +25,14 @@
 
 struct rockchip_crypto_priv {
 	struct crypto_hash_cache	*hash_cache;
-	struct rk_crypto_reg *reg;
-	struct clk clk;
-	sha_context *ctx;
-	u32 frequency;
-	char *clocks;
-	u32 nclocks;
-	u32 length;
+	struct rk_crypto_reg		*reg;
+	struct clk			clk;
+	struct reset_ctl_bulk		rsts;
+	sha_context			*ctx;
+	u32				frequency;
+	char				*clocks;
+	u32				nclocks;
+	u32				length;
 };
 
 static u32 rockchip_crypto_capability(struct udevice *dev)
@@ -226,6 +228,12 @@ static int rockchip_crypto_rsa_verify(struct udevice *dev, rsa_key *ctx,
 	else
 		return -EINVAL;
 
+	if (priv->rsts.resets && priv->rsts.count) {
+		reset_assert_bulk(&priv->rsts);
+		udelay(10);
+		reset_deassert_bulk(&priv->rsts);
+	}
+
 	/* Specify the nbits of N in PKA calculation */
 	writel(value, &reg->crypto_pka_ctrl);
 
@@ -304,6 +312,9 @@ static int rockchip_crypto_ofdata_to_platdata(struct udevice *dev)
 	priv->frequency = dev_read_u32_default(dev, "clock-frequency",
 					       CRYPTO_V1_DEFAULT_RATE);
 
+	memset(&priv->rsts, 0x00, sizeof(priv->rsts));
+	reset_get_bulk(dev, &priv->rsts);
+
 	return 0;
 }
 

commit c7e7e384237f95901be315a8c00219115a15c712
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Thu May 27 14:46:42 2021 +0800

    rockchip: dts: rk3288: crypto: add reset clk
    
    RK3288 RSA2048 must reset clk before every calculation.
    
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
    Change-Id: I3d5de18ef0b27507151e357ba916b928b3a69bb1

diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index f5e71d612c..1c2834bbda 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -707,6 +707,8 @@
 		reg = <0xff8a0000 0x10000>;
 		clock-names = "sclk_crypto";
 		clocks = <&cru SCLK_CRYPTO>;
+		resets = <&cru SRST_CRYPTO>;
+		reset-names = "reset";
 		status = "disabled";
 	};
 

commit bf922fc8007832c028963fde3cc8676f2433149f
Author: Wesley Yao <wesley.yao@rock-chips.com>
Date:   Wed May 19 09:50:34 2021 +0800

    drivers: ram: rv1126: fix calculating of MSCH_DeviceSize
    
    Shifting 1llu to generate cs_cap[0] in dram_all_config(), in order to
    avoid the shift calculation error.
    
    Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
    Change-Id: I61a1f22955407bb5a32db1c893f78df900be7f96

diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
index ffae640f29..b6ad3ac446 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -2186,7 +2186,7 @@ static void dram_all_config(struct dram_info *dram,
 		cs_pst = (readl(pctl_base + DDR_PCTL2_ADDRMAP0) & 0x1f) +
 			6 + 2;
 		if (cs_pst > 28)
-			cs_cap[0] = 1 << cs_pst;
+			cs_cap[0] = 1llu << cs_pst;
 	}
 
 	writel(((((cs_cap[1] >> 20) / 64) & 0xff) << 8) |

commit e2dc1cc022538df7d2052cb427294f9cd85d5fb6
Author: Wesley Yao <wesley.yao@rock-chips.com>
Date:   Wed May 12 10:19:54 2021 +0800

    drivers: ram: rv1126: Modify tRFC and related timing based on DDR
    capacity
    
    Add pctl_modify_trfc() in ddr_set_rate() to modify tRFC, tXS/tXSR,
    tXS_ABORT & tXS_FAST based on DDR capacity
    
    Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
    Change-Id: I53649af1a32a4eca49348afbc26d68cd2aec6d3c

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h b/arch/arm/include/asm/arch-rockchip/sdram_common.h
index 33951ce416..77d06bbb38 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_common.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_common.h
@@ -278,6 +278,15 @@ struct rw_trn_result {
 	struct fsp_rw_trn_result wr_fsp[FSP_NUM];
 };
 
+/* for modify tRFC and related timing */
+#define DIE_CAP_512MBIT	64
+#define DIE_CAP_1GBIT	128
+#define DIE_CAP_2GBIT	256
+#define DIE_CAP_4GBIT	512
+#define DIE_CAP_8GBIT	1024
+#define DIE_CAP_16GBIT	2048
+#define DIE_CAP_32GBIT	4096
+
 /*
  * sys_reg bitfield struct
  * [31]		row_3_4_ch1
diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
index a8b8251d9c..ffae640f29 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -2943,6 +2943,126 @@ static void copy_fsp_param_to_ddr(void)
 }
 #endif
 
+static void pctl_modify_trfc(struct ddr_pctl_regs *pctl_regs,
+			     struct sdram_cap_info *cap_info, u32 dram_type,
+			     u32 freq)
+{
+	u64 cs0_cap;
+	u32 die_cap;
+	u32 trfc_ns, trfc4_ns;
+	u32 trfc, txsnr;
+	u32 txs_abort_fast = 0;
+	u32 tmp;
+
+	cs0_cap = sdram_get_cs_cap(cap_info, 0, dram_type);
+	die_cap = (u32)(cs0_cap >> (20 + (cap_info->bw - cap_info->dbw)));
+
+	switch (dram_type) {
+	case DDR3:
+		if (die_cap <= DIE_CAP_512MBIT)
+			trfc_ns = 90;
+		else if (die_cap <= DIE_CAP_1GBIT)
+			trfc_ns = 110;
+		else if (die_cap <= DIE_CAP_2GBIT)
+			trfc_ns = 160;
+		else if (die_cap <= DIE_CAP_4GBIT)
+			trfc_ns = 260;
+		else
+			trfc_ns = 350;
+		txsnr = MAX(5, ((trfc_ns + 10) * freq + 999) / 1000);
+		break;
+
+	case DDR4:
+		if (die_cap <= DIE_CAP_2GBIT) {
+			trfc_ns = 160;
+			trfc4_ns = 90;
+		} else if (die_cap <= DIE_CAP_4GBIT) {
+			trfc_ns = 260;
+			trfc4_ns = 110;
+		} else if (die_cap <= DIE_CAP_8GBIT) {
+			trfc_ns = 350;
+			trfc4_ns = 160;
+		} else {
+			trfc_ns = 550;
+			trfc4_ns = 260;
+		}
+		txsnr = ((trfc_ns + 10) * freq + 999) / 1000;
+		txs_abort_fast = ((trfc4_ns + 10) * freq + 999) / 1000;
+		break;
+
+	case LPDDR3:
+		if (die_cap <= DIE_CAP_4GBIT)
+			trfc_ns = 130;
+		else
+			trfc_ns = 210;
+		txsnr = MAX(2, ((trfc_ns + 10) * freq + 999) / 1000);
+		break;
+
+	case LPDDR4:
+	case LPDDR4X:
+		if (die_cap <= DIE_CAP_4GBIT)
+			trfc_ns = 130;
+		else if (die_cap <= DIE_CAP_8GBIT)
+			trfc_ns = 180;
+		else if (die_cap <= DIE_CAP_16GBIT)
+			trfc_ns = 280;
+		else
+			trfc_ns = 380;
+		txsnr = MAX(2, ((trfc_ns + 10) * freq + 999) / 1000);
+		break;
+
+	default:
+		return;
+	}
+	trfc = (trfc_ns * freq + 999) / 1000;
+
+	for (int i = 0; pctl_regs->pctl[i][0] != 0xffffffff; i++) {
+		switch (pctl_regs->pctl[i][0]) {
+		case DDR_PCTL2_RFSHTMG:
+			tmp = pctl_regs->pctl[i][1];
+			/* t_rfc_min */
+			tmp &= ~((u32)0x3ff);
+			tmp |= ((trfc + 1) / 2) & 0x3ff;
+			pctl_regs->pctl[i][1] = tmp;
+			break;
+
+		case DDR_PCTL2_DRAMTMG8:
+			if (dram_type == DDR3 || dram_type == DDR4) {
+				tmp = pctl_regs->pctl[i][1];
+				/* t_xs_x32 */
+				tmp &= ~((u32)0x7f);
+				tmp |= ((txsnr + 63) / 64) & 0x7f;
+
+				if (dram_type == DDR4) {
+					/* t_xs_abort_x32 */
+					tmp &= ~((u32)(0x7f << 16));
+					tmp |= (((txs_abort_fast + 63) / 64) & 0x7f) << 16;
+					/* t_xs_fast_x32 */
+					tmp &= ~((u32)(0x7f << 24));
+					tmp |= (((txs_abort_fast + 63) / 64) & 0x7f) << 24;
+				}
+
+				pctl_regs->pctl[i][1] = tmp;
+			}
+			break;
+
+		case DDR_PCTL2_DRAMTMG14:
+			if (dram_type == LPDDR3 ||
+			    dram_type == LPDDR4 || dram_type == LPDDR4X) {
+				tmp = pctl_regs->pctl[i][1];
+				/* t_xsr */
+				tmp &= ~((u32)0xfff);
+				tmp |= ((txsnr + 1) / 2) & 0xfff;
+				pctl_regs->pctl[i][1] = tmp;
+			}
+			break;
+
+		default:
+			break;
+		}
+	}
+}
+
 void ddr_set_rate(struct dram_info *dram,
 		  struct rv1126_sdram_params *sdram_params,
 		  u32 freq, u32 cur_freq, u32 dst_fsp,
@@ -2961,6 +3081,8 @@ void ddr_set_rate(struct dram_info *dram,
 	sdram_params_new->ch.cap_info.rank = sdram_params->ch.cap_info.rank;
 	sdram_params_new->ch.cap_info.bw = sdram_params->ch.cap_info.bw;
 
+	pctl_modify_trfc(&sdram_params_new->pctl_regs,
+			 &sdram_params->ch.cap_info, dramtype, freq);
 	pre_set_rate(dram, sdram_params_new, dst_fsp, dst_fsp_lp4);
 
 	while ((readl(pctl_base + DDR_PCTL2_STAT) &

commit 330cd12fc3450ef216c05d66aaf26a5a02303c0e
Author: Wesley Yao <wesley.yao@rock-chips.com>
Date:   Wed May 26 11:46:52 2021 +0800

    drivers: ram: rv1126: fix return value of read_mr()
    
    In read_mr(), return the value corrected by dq_map for LPDDR3.
    
    Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
    Change-Id: Ib9de5b9b10e776f53f6fe686ccfdd198f1a0acd1

diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
index bc1602ab84..a8b8251d9c 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -1256,10 +1256,10 @@ int read_mr(struct dram_info *dram, u32 rank, u32 mr_num, u32 dramtype)
 				       ((dqmap >> (i * 4)) & 0xf));
 		}
 	} else {
-		ret = (readl(&dram->ddrgrf->ddr_grf_status[1]) & 0xff);
+		temp = (readl(&dram->ddrgrf->ddr_grf_status[1]) & 0xff);
 	}
 
-	return ret;
+	return temp;
 }
 
 /* before call this function autorefresh should be disabled */

commit 08f6c1141c4a2fe29a8a76be58371a9c717bccfe
Author: shengfei Xu <xsf@rock-chips.com>
Date:   Fri May 28 09:22:14 2021 +0800

    power: pmic: rk8xx: SYS shut down voltage select 2900mV
    
    SYS shut down voltage select 2900mV to avoid pmic reset by vsys drop.
    Include: RK809/817
    
    Signed-off-by: shengfei Xu <xsf@rock-chips.com>
    Change-Id: I056a0a7677f0a71426be7fdf8b6b961b4c2ee86f

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index f959f80f46..22b4662f1f 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -149,7 +149,7 @@ static struct reg_data rk817_init_reg[] = {
  * the under-voltage protection will shutdown the LDO3 and reset the PMIC
  */
 	{ RK817_BUCK4_CMIN, 0x60, 0x60},
-	{ RK817_PMIC_SYS_CFG1, 0x40, 0x40},
+	{ RK817_PMIC_SYS_CFG1, 0x20, 0x70},
 	/* Set pmic_sleep as none function */
 	{ RK817_PMIC_SYS_CFG3, 0x00, 0x18 },
 

commit a712f631aeda53f7f0911a77328efa4a1ccce3a6
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon May 24 11:31:41 2021 +0800

    spl: fit: support pass a/b system info kernel
    
    Call fdt_bootargs_append_ab() to append a/b system info to bootargs.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I959b3aa6b2c91bae62eabf5844122d40c2c621d4

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 2b5a0bc9fa..abf5ed0cc7 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <boot_rkimg.h>
 #include <errno.h>
+#include <fdt_support.h>
 #include <image.h>
 #include <malloc.h>
 #include <mtd_blk.h>
@@ -534,15 +535,22 @@ static int spl_load_kernel_fit(struct spl_image_info *spl_image,
 			return ret;
 
 		/* initial addr or entry point */
-		if (!strcmp(images[i], FIT_FDT_PROP))
+		if (!strcmp(images[i], FIT_FDT_PROP)) {
 			spl_image->fdt_addr = (void *)image_info.load_addr;
-		else if (!strcmp(images[i], FIT_KERNEL_PROP))
+#ifdef CONFIG_SPL_AB
+			char slot_suffix[3] = {0};
+
+			if (!spl_get_current_slot(info->dev, "misc", slot_suffix))
+				fdt_bootargs_append_ab((void *)image_info.load_addr, slot_suffix);
+#endif
+		} else if (!strcmp(images[i], FIT_KERNEL_PROP)) {
 #if CONFIG_IS_ENABLED(OPTEE)
 			spl_image->entry_point_os = image_info.load_addr;
 #endif
 #if CONFIG_IS_ENABLED(ATF)
 			spl_image->entry_point_bl33 = image_info.load_addr;
 #endif
+		}
 	}
 
 	debug("fdt_addr=0x%08lx, entry_point=0x%08lx, entry_point_os=0x%08lx\n",

commit f536dcca49615e024c2ff0d68eff774d7114e0e1
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon May 24 11:16:13 2021 +0800

    common: fdt_support: add fdt_bootargs_append_ab()
    
    Support append data to bootargs, like ab info.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I326a84122423fabba09555787e63742e0f2c3267

diff --git a/common/fdt_support.c b/common/fdt_support.c
index 948565a9da..a1d8849ece 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -8,10 +8,12 @@
  */
 
 #include <common.h>
+#include <android_image.h>
 #include <exports.h>
 #include <fdt_support.h>
 #include <fdtdec.h>
 #include <inttypes.h>
+#include <malloc.h>
 #ifdef CONFIG_MTD_BLK
 #include <mtd_blk.h>
 #endif
@@ -278,6 +280,69 @@ int fdt_initrd(void *fdt, ulong initrd_start, ulong initrd_end)
 	return 0;
 }
 
+static int fdt_bootargs_append(void *fdt, char *data)
+{
+	const char *arr_bootargs[] = { "bootargs", "bootargs_ext" };
+	int nodeoffset, len;
+	const char *bootargs;
+	char *str;
+	int i, ret = 0;
+
+	if (!data)
+		return 0;
+
+	/* find or create "/chosen" node. */
+	nodeoffset = fdt_find_or_add_subnode(fdt, 0, "chosen");
+	if (nodeoffset < 0)
+		return nodeoffset;
+
+	for (i = 0; i < ARRAY_SIZE(arr_bootargs); i++) {
+		bootargs = fdt_getprop(fdt, nodeoffset,
+				       arr_bootargs[i], NULL);
+		if (bootargs) {
+			len = strlen(bootargs) + strlen(data) + 2;
+			str = malloc(len);
+			if (!str)
+				return -ENOMEM;
+
+			fdt_increase_size(fdt, strlen(data) + 1);
+			snprintf(str, len, "%s %s", bootargs, data);
+			ret = fdt_setprop(fdt, nodeoffset, "bootargs",
+					  str, len);
+			if (ret < 0)
+				printf("WARNING: could not set bootargs %s.\n", fdt_strerror(ret));
+
+			free(str);
+			break;
+		}
+	}
+
+	return ret;
+}
+
+int fdt_bootargs_append_ab(void *fdt, char *slot)
+{
+	char *str;
+	int len, ret = 0;
+
+	if (!slot)
+		return 0;
+
+	len = strlen(ANDROID_ARG_SLOT_SUFFIX) + strlen(slot) + 1;
+	str = malloc(len);
+	if (!str)
+		return -ENOMEM;
+
+	snprintf(str, len, "%s%s", ANDROID_ARG_SLOT_SUFFIX, slot);
+	ret = fdt_bootargs_append(fdt, str);
+	if (ret)
+		printf("Apend slot info to bootargs fail");
+
+	free(str);
+
+	return ret;
+}
+
 int fdt_chosen(void *fdt)
 {
 	/*
diff --git a/include/fdt_support.h b/include/fdt_support.h
index fff6ae916e..3dcdfdfe17 100644
--- a/include/fdt_support.h
+++ b/include/fdt_support.h
@@ -27,6 +27,15 @@ u32 fdt_getprop_u32_default(const void *fdt, const char *path,
  */
 int fdt_root(void *fdt);
 
+/**
+ * Append ab info to bootargs
+ *
+ * @param fdt		FDT address in memory
+ * @param slot		slot info
+ * @return 0 if ok, else error
+ */
+int fdt_bootargs_append_ab(void *fdt, char *slot);
+
 /**
  * Add chosen data the FDT before booting the OS.
  *

commit efb5a62dc739025ffe4f833d7c1e0e297a9efeb8
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Mon May 24 18:01:21 2021 +0800

    drm/rockchip: vop2: rk3566 only support 3+3 policy
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: Id67a6c4f1eb2680b3e328a7d011cdccfd6295e03

diff --git a/drivers/video/drm/rockchip_vop2.c b/drivers/video/drm/rockchip_vop2.c
index f53bdad9d9..51697e9916 100644
--- a/drivers/video/drm/rockchip_vop2.c
+++ b/drivers/video/drm/rockchip_vop2.c
@@ -1205,8 +1205,6 @@ static void vop2_global_initial(struct vop2 *vop2, struct display_state *state)
 
 		if (soc_is_rk3566() && active_vp_num > 2)
 			printf("ERROR: rk3566 only support 2 display output!!\n");
-		if (soc_is_rk3566())
-			active_vp_num = 2;
 		plane_mask = vop2->data->plane_mask;
 		plane_mask += (active_vp_num - 1) * VOP2_VP_MAX;
 
@@ -1235,9 +1233,19 @@ static void vop2_global_initial(struct vop2 *vop2, struct display_state *state)
 		/* store plane mask for vop2_fixup_dts */
 		for (i = 0; i < vop2->data->nr_vps; i++) {
 			layer_nr = vop2->vp_plane_mask[i].attached_layers_nr;
-			for (j = 0; j < layer_nr; j++) {
-				layer_phy_id = vop2->vp_plane_mask[i].attached_layers[j];
-				vop2->vp_plane_mask[i].plane_mask |= BIT(layer_phy_id);
+			/* rk3566 only support 3+3 policy */
+			if (soc_is_rk3566() && active_vp_num == 1) {
+				if (cstate->crtc->vps[i].enable) {
+					for (j = 0; j < 3; j++) {
+						layer_phy_id = vop2->vp_plane_mask[i].attached_layers[j];
+						vop2->vp_plane_mask[i].plane_mask |= BIT(layer_phy_id);
+					}
+				}
+			} else {
+				for (j = 0; j < layer_nr; j++) {
+					layer_phy_id = vop2->vp_plane_mask[i].attached_layers[j];
+					vop2->vp_plane_mask[i].plane_mask |= BIT(layer_phy_id);
+				}
 			}
 		}
 	}

commit f32029b0961f13742b9743cc48bc8500cb6a4ff4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon May 24 14:59:06 2021 +0800

    configs: rk3568: disable CONFIG_EFI_LOADER
    
    We are not ready to support it.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I895e8444b26fba0b13b09bfb3c02a02088af9cd9

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index 21890d8d5e..50a55aab11 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -16,7 +16,6 @@ CONFIG_SPL_NAND_SUPPORT=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3568-evb"
-CONFIG_SMBIOS_PRODUCT_NAME=""
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_FIT_IMAGE_POST_PROCESS=y
@@ -51,7 +50,6 @@ CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_CMD_BOOTZ=y
-# CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set
 CONFIG_CMD_DTIMG=y
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set
@@ -207,6 +205,7 @@ CONFIG_SHA512=y
 CONFIG_LZ4=y
 CONFIG_SPL_GZIP=y
 CONFIG_ERRNO_STR=y
+# CONFIG_EFI_LOADER is not set
 CONFIG_AVB_LIBAVB=y
 CONFIG_AVB_LIBAVB_AB=y
 CONFIG_AVB_LIBAVB_ATX=y

commit f6bdb194f1cd5bb55b40eeadb77777efd05d7804
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon May 24 15:03:40 2021 +0800

    configs: rk3568: resync with make savedefconfig
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I5e8c643f76a0e9b86268251b61ded795b444e0f8

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index 3017921487..21890d8d5e 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -29,9 +29,7 @@ CONFIG_BOOTDELAY=0
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
-CONFIG_ANDROID_WRITE_KEYBOX=y
 CONFIG_ANDROID_AVB=y
-CONFIG_ANDROID_KEYMASTER_CA=y
 CONFIG_ANDROID_BOOT_IMAGE_HASH=y
 CONFIG_SPL_BOARD_INIT=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
@@ -139,8 +137,8 @@ CONFIG_DM_ETH_PHY=y
 CONFIG_DWC_ETH_QOS=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
-CONFIG_PHY_ROCKCHIP_NANENG_EDP=y
 CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
+CONFIG_PHY_ROCKCHIP_NANENG_EDP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y

commit 6dce606bd24e1c20ac5c1289b0c551c7595f6145
Author: Gervais, Francois <FGervais@distech-controls.com>
Date:   Sat Feb 16 21:10:32 2019 +0000

    UPSTREAM: cmd/fs: fix build if CMD_BOOTEFI is not set
    
    Fixes:
    cmd/fs.c:29: undefined reference to `efi_set_bootdev'
    
    Signed-off-by: Francois Gervais <fgervais@distech-controls.com>
    Change-Id: Ia4d6696dde0a95dc7d5a90ac286e94d2d9f06fb1

diff --git a/cmd/fs.c b/cmd/fs.c
index abfe5be172..b7ca1f3ea3 100644
--- a/cmd/fs.c
+++ b/cmd/fs.c
@@ -27,8 +27,10 @@ U_BOOT_CMD(
 static int do_load_wrapper(cmd_tbl_t *cmdtp, int flag, int argc,
 				char * const argv[])
 {
+#ifdef CONFIG_CMD_BOOTEFI
 	efi_set_bootdev(argv[1], (argc > 2) ? argv[2] : "",
 			(argc > 4) ? argv[4] : "");
+#endif
 	return do_load(cmdtp, flag, argc, argv, FS_TYPE_ANY);
 }
 

commit 86dcc427ad23badcb9abc11f95c857b0b356619e
Author: Yi Liu <liuyi@rock-chips.com>
Date:   Tue May 18 10:13:40 2021 +0800

    tools: mkimage: add 356X support
    
    From 356X on,boot block takes new structure.
    It was defined as RK_HEADER_V2.
    Each function relative with it ends with 'v2'.
    
    Signed-off-by: Yi Liu <liuyi@rock-chips.com>
    Change-Id: I97c832212c931023f314278c817ae816f56ac945

diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index 1a88b5e837..af2a4835f6 100644
--- a/tools/rkcommon.c
+++ b/tools/rkcommon.c
@@ -11,16 +11,67 @@
 
 #include "imagetool.h"
 #include <image.h>
+#include <u-boot/sha256.h>
 #include <rc4.h>
 #include "mkimage.h"
 #include "rkcommon.h"
 
 enum {
 	RK_MAGIC		= 0x0ff0aa55,
+	RK_MAGIC_V2		= 0x534E4B52,
 };
 
 enum {
 	RK_HEADER_V1	= 1,
+	RK_HEADER_V2	= 2,
+};
+
+enum hash_type {
+	HASH_NONE	= 0,
+	HASH_SHA256	= 1,
+	HASH_SHA512	= 2,
+};
+
+/**
+ * struct image_entry
+ *
+ * @size_and_off:	[31:16]image size;[15:0]image offset
+ * @address:	default as 0xFFFFFFFF
+ * @flag:	no use
+ * @counter:	no use
+ * @hash:	hash of image
+ *
+ */
+struct image_entry {
+	uint32_t size_and_off;
+	uint32_t address;
+	uint32_t flag;
+	uint32_t counter;
+	uint8_t reserved[8];
+	uint8_t hash[64];
+};
+
+/**
+ * struct header0_info_v2 - from rk35 on boot rom using the new header block
+ *
+ * This is stored at SD card block 64 (where each block is 512 bytes)
+ *
+ * @magic:	Magic (must be RK_MAGIC_V2)
+ * @size_and_nimage:	[31:16]number of images;[15:0]
+ *			offset to hash field of header(unit as 4Byte)
+ * @boot_flag:	[3:0]hash type(0:none,1:sha256,2:sha512)
+ * @signature:	hash or signature for header info
+ *
+ */
+struct header0_info_v2 {
+	uint32_t magic;
+	uint8_t reserved[4];
+	uint32_t size_and_nimage;
+	uint32_t boot_flag;
+	uint8_t reserved1[104];
+	struct image_entry images[4];
+	uint8_t reserved2[1064];
+	uint8_t hash[512];
 };
 
 /**
@@ -85,6 +136,7 @@ static struct spl_info spl_infos[] = {
 	{ "rv1108", "RK11", 0x1800, false, RK_HEADER_V1 },
 	{ "rv1126", "110B", 0x10000 - 0x1000, false, RK_HEADER_V1 },
 	{ "rk1808", "RK18", 0x200000 - 0x2000, false, RK_HEADER_V1 },
+	{ "rk356x", "RK35", 0x10000 - 0x1000, false, RK_HEADER_V2 },
 };
 
 /**
@@ -227,6 +279,26 @@ bool rkcommon_need_rc4_spl(struct image_tool_params *params)
 	return info->spl_rc4;
 }
 
+bool rkcommon_is_header_v2(struct image_tool_params *params)
+{
+	struct spl_info *info = rkcommon_get_spl_info(params->imagename);
+
+	/*
+	 * info would not be NULL, because of we checked params before.
+	 */
+	return (info->header_ver == RK_HEADER_V2);
+}
+
+static void do_sha256_hash(uint8_t *buf, uint32_t size, uint8_t *out)
+{
+	sha256_context ctx;
+
+	sha256_starts(&ctx);
+	sha256_update(&ctx, buf, size);
+	sha256_finish(&ctx, out);
+}
+
+
 static void rkcommon_set_header0(void *buf, struct image_tool_params *params)
 {
 	struct header0_info *hdr = buf;
@@ -255,26 +327,64 @@ static void rkcommon_set_header0(void *buf, struct image_tool_params *params)
 	rc4_encode(buf, RK_BLK_SIZE, rc4_key);
 }
 
+static void rkcommon_set_header0_v2(void *buf, struct image_tool_params *params)
+{
+	struct header0_info_v2 *hdr = buf;
+	uint32_t sector_offset, image_sector_count;
+	uint32_t image_size_array[2];
+	uint8_t *image_ptr = NULL;
+	int i;
+
+	memset(buf, '\0', RK_INIT_OFFSET * RK_BLK_SIZE);
+	hdr->magic   = cpu_to_le32(RK_MAGIC_V2);
+	hdr->size_and_nimage = cpu_to_le32((2 << 16) + 384);
+	hdr->boot_flag = cpu_to_le32(HASH_SHA256);
+	sector_offset = 4;
+	image_size_array[0] = spl_params.init_size;
+	image_size_array[1] = spl_params.boot_size;
+
+	for (i = 0; i < 2; i++) {
+		image_sector_count = image_size_array[i] / RK_BLK_SIZE;
+		hdr->images[i].size_and_off = cpu_to_le32((image_sector_count << 16) + sector_offset);
+		hdr->images[i].address = 0xFFFFFFFF;
+		hdr->images[i].counter = cpu_to_le32(i + 1);
+		image_ptr = buf + sector_offset * RK_BLK_SIZE;
+		do_sha256_hash(image_ptr, image_size_array[i], hdr->images[i].hash);
+		sector_offset = sector_offset + image_sector_count;
+	}
+
+	do_sha256_hash(buf, (void *)hdr->hash - buf, hdr->hash);
+}
+
 void rkcommon_set_header(void *buf,  struct stat *sbuf,  int ifd,
 			 struct image_tool_params *params)
 {
 	struct header1_info *hdr = buf + RK_SPL_HDR_START;
 
-	rkcommon_set_header0(buf, params);
-
-	/* Set up the SPL name (i.e. copy spl_hdr over) */
-	if (memcmp(&hdr->magic, "RSAK", 4))
+	if (rkcommon_is_header_v2(params)) {
+		/* Set up the SPL name (i.e. copy spl_hdr over) */
 		memcpy(&hdr->magic, rkcommon_get_spl_hdr(params), RK_SPL_HDR_SIZE);
+		/* because of doing hash in the set_header0_v2
+		*  magic need to be changed first
+		*/
+		rkcommon_set_header0_v2(buf, params);
+	} else {
+		rkcommon_set_header0(buf, params);
 
-	if (rkcommon_need_rc4_spl(params))
-		rkcommon_rc4_encode_spl(buf, RK_SPL_HDR_START,
-					spl_params.init_size);
+		/* Set up the SPL name (i.e. copy spl_hdr over) */
+		if (memcmp(&hdr->magic, "RSAK", 4))
+			memcpy(&hdr->magic, rkcommon_get_spl_hdr(params), RK_SPL_HDR_SIZE);
 
-	if (spl_params.boot_file) {
 		if (rkcommon_need_rc4_spl(params))
-			rkcommon_rc4_encode_spl(buf + RK_SPL_HDR_START,
-						spl_params.init_size,
-						spl_params.boot_size);
+			rkcommon_rc4_encode_spl(buf, RK_SPL_HDR_START,
+						spl_params.init_size);
+
+		if (spl_params.boot_file) {
+			if (rkcommon_need_rc4_spl(params))
+				rkcommon_rc4_encode_spl(buf + RK_SPL_HDR_START,
+							spl_params.init_size,
+							spl_params.boot_size);
+		}
 	}
 }
 
@@ -331,6 +441,43 @@ static int rkcommon_parse_header(const void *buf, struct header0_info *header0,
 	return -1;
 }
 
+static int rkcommon_parse_header_v2(const void *buf,
+				 struct header0_info_v2 *header, struct spl_info **spl_info)
+{
+	unsigned int hdr1_offset;
+	struct header1_info *hdr1_sdmmc, *hdr1_spi;
+	int i;
+
+	if (spl_info)
+		*spl_info = NULL;
+
+	memcpy((void *)header, buf, sizeof(struct header0_info_v2));
+
+	if (le32_to_cpu(header->magic) != RK_MAGIC_V2)
+		return -EPROTO;
+
+	hdr1_offset = ((le32_to_cpu(header->images[0].size_and_off)) & 0xFFFF) * RK_BLK_SIZE;
+	hdr1_sdmmc = (struct header1_info *)(buf + hdr1_offset);
+	hdr1_spi = (struct header1_info *)(buf +
+					   rkcommon_offset_to_spi(hdr1_offset));
+
+	for (i = 0; i < ARRAY_SIZE(spl_infos); i++) {
+		if (!memcmp(&hdr1_sdmmc->magic, spl_infos[i].spl_hdr,
+			    RK_SPL_HDR_SIZE)) {
+			if (spl_info)
+				*spl_info = &spl_infos[i];
+			return IH_TYPE_RKSD;
+		} else if (!memcmp(&hdr1_spi->magic, spl_infos[i].spl_hdr,
+				   RK_SPL_HDR_SIZE)) {
+			if (spl_info)
+				*spl_info = &spl_infos[i];
+			return IH_TYPE_RKSPI;
+		}
+	}
+
+	return -1;
+}
+
 int rkcommon_verify_header(unsigned char *buf, int size,
 			   struct image_tool_params *params)
 {
@@ -365,29 +512,45 @@ int rkcommon_verify_header(unsigned char *buf, int size,
 void rkcommon_print_header(const void *buf)
 {
 	struct header0_info header0;
+	struct header0_info_v2 header0_v2;
 	struct spl_info *spl_info;
 	uint8_t image_type;
-	int ret, boot_size;
+	int ret, boot_size, init_size;
 
-	ret = rkcommon_parse_header(buf, &header0, &spl_info);
-
-	/* If this is the (unimplemented) RC4 case, then fail silently */
-	if (ret == -ENOSYS)
-		return;
+	if ((*(uint32_t *)buf) == RK_MAGIC_V2) {
+		ret = rkcommon_parse_header_v2(buf, &header0_v2, &spl_info);
 
-	if (ret < 0) {
-		fprintf(stderr, "Error: image verification failed\n");
-		return;
-	}
+		if (ret < 0) {
+			fprintf(stderr, "Error: image verification failed\n");
+			return;
+		}
 
-	image_type = ret;
+		image_type = ret;
+		init_size = header0_v2.images[0].size_and_off >> 16;
+		init_size = init_size * RK_BLK_SIZE;
+		boot_size = header0_v2.images[1].size_and_off >> 16;
+		boot_size = boot_size * RK_BLK_SIZE;
+	} else {
+		ret = rkcommon_parse_header(buf, &header0, &spl_info);
+
+		/* If this is the (unimplemented) RC4 case, then fail silently */
+		if (ret == -ENOSYS)
+			return;
+
+		if (ret < 0) {
+			fprintf(stderr, "Error: image verification failed\n");
+			return;
+		}
 
+		image_type = ret;
+		init_size = header0.init_size * RK_BLK_SIZE;
+		boot_size = header0.init_boot_size * RK_BLK_SIZE - init_size;
+	}
 	printf("Image Type:   Rockchip %s (%s) boot image\n",
-	       spl_info->spl_hdr,
-	       (image_type == IH_TYPE_RKSD) ? "SD/MMC" : "SPI");
-	printf("Init Data Size: %d bytes\n", header0.init_size * RK_BLK_SIZE);
+		       spl_info->spl_hdr,
+		       (image_type == IH_TYPE_RKSD) ? "SD/MMC" : "SPI");
+	printf("Init Data Size: %d bytes\n", init_size);
 
-	boot_size = (header0.init_boot_size - header0.init_size) * RK_BLK_SIZE;
 	if (boot_size != RK_MAX_BOOT_SIZE)
 		printf("Boot Data Size: %d bytes\n", boot_size);
 }

commit 7a00f0a44b0ec80f61ab1cd47fc45a04869bbfa3
Author: Yi Liu <liuyi@rock-chips.com>
Date:   Fri May 14 11:30:32 2021 +0800

    tools: mkimage: preparation for 356X support
    
    1.add header_ver into spl_info struct
    2.change signature into magic on header0_info
    
    Signed-off-by: Yi Liu <liuyi@rock-chips.com>
    Change-Id: I5aaaf53106e52f49484643cda7266e2bbc6f46dc

diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index 44e82dfa74..1a88b5e837 100644
--- a/tools/rkcommon.c
+++ b/tools/rkcommon.c
@@ -16,7 +16,11 @@
 #include "rkcommon.h"
 
 enum {
-	RK_SIGNATURE		= 0x0ff0aa55,
+	RK_MAGIC		= 0x0ff0aa55,
+};
+
+enum {
+	RK_HEADER_V1	= 1,
 };
 
 /**
@@ -25,14 +29,14 @@ enum {
  * This is stored at SD card block 64 (where each block is 512 bytes, or at
  * the start of SPI flash. It is encoded with RC4.
  *
- * @signature:		Signature (must be RKSD_SIGNATURE)
+ * @magic:		Magic (must be RK_MAGIC)
  * @disable_rc4:	0 to use rc4 for boot image,  1 to use plain binary
  * @init_offset:	Offset in blocks of the SPL code from this header
  *			block. E.g. 4 means 2KB after the start of this header.
  * Other fields are not used by U-Boot
  */
 struct header0_info {
-	uint32_t signature;
+	uint32_t magic;
 	uint8_t reserved[4];
 	uint32_t disable_rc4;
 	uint16_t init_offset;
@@ -56,30 +60,31 @@ struct header1_info {
  * @spl_hdr:		Boot ROM requires a 4-bytes spl header
  * @spl_size:		Spl size(include extra 4-bytes spl header)
  * @spl_rc4:		RC4 encode the SPL binary (same key as header)
+ * @header_ver:		header block version
  */
-
 struct spl_info {
 	const char *imagename;
 	const char *spl_hdr;
 	const uint32_t spl_size;
 	const bool spl_rc4;
+	const uint32_t header_ver;
 };
 
 static struct spl_info spl_infos[] = {
-	{ "rk3036", "RK30", 0x1000, false },
-	{ "rk3066", "RK30", 0x8000, true, },
-	{ "rk3128", "RK31", 0x1800, false },
-	{ "rk3188", "RK31", 0x8000 - 0x800, true },
-	{ "rk322x", "RK32", 0x8000 - 0x1000, false },
-	{ "rk3288", "RK32", 0x8000, false },
-	{ "rk3308", "RK33", 0x40000 - 0x1000, false},
-	{ "rk3328", "RK32", 0x8000 - 0x800, false },
-	{ "rk3368", "RK33", 0x8000 - 0x1000, false },
-	{ "rk3399", "RK33", 0x30000 - 0x2000, false },
-	{ "px30", "RK33", 0x2800, false },
-	{ "rv1108", "RK11", 0x1800, false },
-	{ "rv1126", "110B", 0x10000 - 0x1000, false},
-	{ "rk1808", "RK18", 0x200000 - 0x2000, false},
+	{ "rk3036", "RK30", 0x1000, false, RK_HEADER_V1 },
+	{ "rk3066", "RK30", 0x8000, true, RK_HEADER_V1 },
+	{ "rk3128", "RK31", 0x1800, false, RK_HEADER_V1 },
+	{ "rk3188", "RK31", 0x8000 - 0x800, true, RK_HEADER_V1 },
+	{ "rk322x", "RK32", 0x8000 - 0x1000, false, RK_HEADER_V1 },
+	{ "rk3288", "RK32", 0x8000, false, RK_HEADER_V1 },
+	{ "rk3308", "RK33", 0x40000 - 0x1000, false, RK_HEADER_V1 },
+	{ "rk3328", "RK32", 0x8000 - 0x800, false, RK_HEADER_V1 },
+	{ "rk3368", "RK33", 0x8000 - 0x1000, false, RK_HEADER_V1 },
+	{ "rk3399", "RK33", 0x30000 - 0x2000, false, RK_HEADER_V1 },
+	{ "px30", "RK33", 0x2800, false, RK_HEADER_V1 },
+	{ "rv1108", "RK11", 0x1800, false, RK_HEADER_V1 },
+	{ "rv1126", "110B", 0x10000 - 0x1000, false, RK_HEADER_V1 },
+	{ "rk1808", "RK18", 0x200000 - 0x2000, false, RK_HEADER_V1 },
 };
 
 /**
@@ -227,7 +232,7 @@ static void rkcommon_set_header0(void *buf, struct image_tool_params *params)
 	struct header0_info *hdr = buf;
 
 	memset(buf, '\0', RK_INIT_OFFSET * RK_BLK_SIZE);
-	hdr->signature = RK_SIGNATURE;
+	hdr->magic = RK_MAGIC;
 	hdr->disable_rc4 = !rkcommon_need_rc4_spl(params);
 	hdr->init_offset = RK_INIT_OFFSET;
 	hdr->init_size = spl_params.init_size / RK_BLK_SIZE;
@@ -299,7 +304,7 @@ static int rkcommon_parse_header(const void *buf, struct header0_info *header0,
 	memcpy((void *)header0, buf, sizeof(struct header0_info));
 	rc4_encode((void *)header0, sizeof(struct header0_info), rc4_key);
 
-	if (header0->signature != RK_SIGNATURE)
+	if (header0->magic != RK_MAGIC)
 		return -EPROTO;
 
 	/* We don't support RC4 encoded image payloads here, yet... */

commit 0f44aebd4c2f65d1bd9cda9887e3b7f33f2860d1
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri May 21 14:54:48 2021 +0800

    rockchip: board: call ab_decrease_tries() earlier
    
    There may call ab_decrease_tries() twice because it has two
    processes to bring-up kernel with two firmware formats which
    rockchip support.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Id1774f9b1c560ca984f8f22e7714c019c8b5abfb

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index ee1e9b1ec2..b41349e7fc 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <amp.h>
+#include <android_ab.h>
 #include <android_bootloader.h>
 #include <android_image.h>
 #include <bidram.h>
@@ -474,6 +475,11 @@ int board_init(void)
 	dvfs_init(true);
 #endif
 
+#ifdef CONFIG_ANDROID_AB
+	if (ab_decrease_tries())
+		printf("Decrease ab tries count fail!\n");
+#endif
+
 	return rk_board_init();
 }
 
diff --git a/cmd/bootfit.c b/cmd/bootfit.c
index 25b088bd10..a0efec780f 100644
--- a/cmd/bootfit.c
+++ b/cmd/bootfit.c
@@ -104,8 +104,6 @@ static int do_boot_fit(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 	strcat(slot_info, slot_suffix);
 	env_update("bootargs", slot_info);
 	ab_update_root_uuid();
-	if (ab_decrease_tries())
-		printf("Decrease ab tries count fail!\n");
 #endif
 
 	ret = do_bootm_states(NULL, 0, ARRAY_SIZE(bootm_args), bootm_args,
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index e62fea4be9..02a70dd997 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -941,9 +941,6 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	/* Get current slot_suffix */
 	if (ab_get_slot_suffix(slot_suffix))
 		return -1;
-
-	if (ab_decrease_tries())
-		printf("Decrease ab tries count fail!\n");
 #endif
 	switch (mode) {
 	case ANDROID_BOOT_MODE_NORMAL:

commit c9c15fdc45e22d24eea9440f556cacdbb301d029
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri May 21 15:34:49 2021 +0800

    rockchip: board: call reset if boot fail when enable ab
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I6dc2506b2c887ce3a7ba3f6b6e8fcc72fcdc02aa

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index bd4593d538..ee1e9b1ec2 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -30,6 +30,7 @@
 #include <video_rockchip.h>
 #include <asm/io.h>
 #include <asm/gpio.h>
+#include <android_avb/rk_avb_ops_user.h>
 #include <dm/uclass-internal.h>
 #include <dm/root.h>
 #include <power/charge_display.h>
@@ -883,14 +884,18 @@ int board_do_bootm(int argc, char * const argv[])
 
 void autoboot_command_fail_handle(void)
 {
-#ifdef CONFIG_AVB_VBMETA_PUBLIC_KEY_VALIDATE
 #ifdef CONFIG_ANDROID_AB
-	run_command("fastboot usb 0;", 0);  /* use fastboot to ative slot */
-#else
+	if (rk_avb_ab_have_bootable_slot() == true)
+		run_command("reset;", 0);
+	else
+		run_command("fastboot usb 0;", 0);
+#endif
+
+#ifdef CONFIG_AVB_VBMETA_PUBLIC_KEY_VALIDATE
 	run_command("rockusb 0 ${devtype} ${devnum}", 0);
 	run_command("fastboot usb 0;", 0);
 #endif
-#endif
+
 }
 
 #ifdef CONFIG_FIT_ROLLBACK_PROTECT

commit 17e05a5663f042f95e0aa6b3aea9b7507923fb6a
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue May 11 15:53:24 2021 +0800

    lib: avb: add function rk_avb_ab_have_bootable_slot()
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ib7e3dc383a1e7d407cdfb69f18f9f8df0cfed7ce

diff --git a/include/android_avb/rk_avb_ops_user.h b/include/android_avb/rk_avb_ops_user.h
index 2198a76df0..613f835802 100644
--- a/include/android_avb/rk_avb_ops_user.h
+++ b/include/android_avb/rk_avb_ops_user.h
@@ -7,6 +7,9 @@
 #ifndef RK_AVB_OPS_USER_H_
 #define RK_AVB_OPS_USER_H_
 
+#include <android_avb/avb_ops_user.h>
+#include <android_avb/libavb_ab.h>
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -324,11 +327,15 @@ int rk_avb_init_ab_metadata(void);
 
 /**
  * rockchip avb commands
- *
  */
 int rk_avb_write_perm_attr(uint16_t id, void *pbuf, uint16_t size);
 int rk_avb_read_perm_attr(uint16_t id, void *pbuf, uint16_t size);
 
+/**
+ * Do the device have boot slot
+ */
+bool rk_avb_ab_have_bootable_slot(void);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/lib/avb/rk_avb_user/rk_ab_ops_user.c b/lib/avb/rk_avb_user/rk_ab_ops_user.c
index 43336dd6c7..2cd1562a6d 100644
--- a/lib/avb/rk_avb_user/rk_ab_ops_user.c
+++ b/lib/avb/rk_avb_user/rk_ab_ops_user.c
@@ -10,10 +10,8 @@
 #include <command.h>
 #include <blk.h>
 #include <part.h>
-#include <android_avb/avb_ops_user.h>
-#include <android_avb/libavb_ab.h>
-#include <android_avb/rk_avb_ops_user.h>
 #include <boot_rkimg.h>
+#include <android_avb/rk_avb_ops_user.h>
 
 static int safe_memcmp(const void *s1, const void *s2, size_t n)
 {
@@ -471,6 +469,16 @@ int rk_avb_get_current_slot(char *select_slot)
 	return ret;
 }
 
+bool rk_avb_ab_have_bootable_slot(void)
+{
+	char slot[3] = {0};
+
+	if (rk_avb_get_current_slot(slot))
+		return false;
+	else
+		return true;
+}
+
 int rk_avb_append_part_slot(const char *part_name, char *new_name)
 {
 	char slot_suffix[3] = {0};
@@ -489,4 +497,4 @@ int rk_avb_append_part_slot(const char *part_name, char *new_name)
 	strcat(new_name, slot_suffix);
 
 	return 0;
-}
\ No newline at end of file
+}

commit 54f3fd85dd86947ad682d8f067019d0a0113c305
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Apr 30 17:00:55 2021 +0800

    common: android: delete reset_cpu_if_android_ab()
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I6910c9c0b320bf3578d6e7c19ed35323039e6cfb

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 7043e06e59..e62fea4be9 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -31,22 +31,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#if defined(CONFIG_ANDROID_AB) && defined(CONFIG_ANDROID_AVB)
-static void reset_cpu_if_android_ab(void)
-{
-	printf("Reset in AB system.\n");
-	flushc();
-	/*
-	 * Since we use the retry-count in ab system, then can
-	 * try reboot if verify fail until the retry-count is
-	 * equal to zero.
-	 */
-	reset_cpu(0);
-}
-#else
-static inline void reset_cpu_if_android_ab(void) {}
-#endif
-
 int android_bootloader_message_load(
 	struct blk_desc *dev_desc,
 	const disk_partition_t *part_info,
@@ -1020,7 +1004,6 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 		if (android_slot_verify(boot_partname, &load_address,
 					slot_suffix)) {
 			printf("AVB verify failed\n");
-			reset_cpu_if_android_ab();
 
 			return -1;
 		}
@@ -1043,7 +1026,6 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 			if (android_slot_verify(boot_partname, &load_address,
 						slot_suffix)) {
 				printf("AVB verify failed\n");
-				reset_cpu_if_android_ab();
 
 				return -1;
 			}

commit 4ad73f9e5e37d703828f8ef767291886178b219b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 21 09:45:15 2021 +0800

    core: dump: show device address
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I7f8e4e0d665c454678fd5f20b4a4fb58b3079ba2

diff --git a/drivers/core/dump.c b/drivers/core/dump.c
index 2d90bb9726..3e6926a82b 100644
--- a/drivers/core/dump.c
+++ b/drivers/core/dump.c
@@ -17,7 +17,8 @@ static void show_devices(struct udevice *dev, int depth, int last_flag)
 	int pre_reloc, remained;
 
 	/* print the first 11 characters to not break the tree-format. */
-	printf(" %-10.10s [ %c ]   %-25.25s  ", dev->uclass->uc_drv->name,
+	printf(" %08lx    %-10.10s [ %c ]   %-25.25s  ",
+	       (ulong)dev, dev->uclass->uc_drv->name,
 	       dev->flags & DM_FLAG_ACTIVATED ? '+' : ' ', dev->driver->name);
 
 	for (i = depth; i >= 0; i--) {
@@ -56,8 +57,8 @@ void dm_dump_all(void)
 
 	root = dm_root();
 	if (root) {
-		printf(" Class      Probed        Driver               Name\n");
-		printf("----------------------------------------------------------\n");
+		printf(" Addr        Class      Probed    Driver                   Name\n");
+		printf("-------------------------------------------------------------------------\n");
 		show_devices(root, -1, 0);
 	}
 }

commit f74dbfeb976696ae2408d9c8bade6ed78fd043f7
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed May 19 15:49:32 2021 +0800

    disk: efi: skip is_pmbr_valid()
    
    It is useless to test mbr is valid or not if use GPT, otherwise
    the gpt is unavailable if mbr is erased.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ib7e8d0e34c4f54b8ad59f1cdcdb664c0a85eeb3b

diff --git a/disk/part_efi.c b/disk/part_efi.c
index 7dc20d129c..64a962585b 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -1074,9 +1074,6 @@ static int is_pmbr_valid(legacy_mbr * mbr)
 {
 	int i = 0;
 
-	if (!mbr || le16_to_cpu(mbr->signature) != MSDOS_MBR_SIGNATURE)
-		return 0;
-
 #ifdef CONFIG_ARCH_ROCKCHIP
 	/*
 	 * In sd-update card, we use RKPARM partition in bootloader to load
@@ -1088,6 +1085,10 @@ static int is_pmbr_valid(legacy_mbr * mbr)
 	 */
 	return 1;
 #endif
+
+	if (!mbr || le16_to_cpu(mbr->signature) != MSDOS_MBR_SIGNATURE)
+		return 0;
+
 	for (i = 0; i < 4; i++) {
 		if (pmbr_part_valid(&mbr->partition_record[i])) {
 			return 1;

commit beef0f23e81a3f317b8b9330c3059d77f894ee72
Author: Shawn Lin <shawn.lin@rock-chips.com>
Date:   Wed May 19 15:36:25 2021 +0800

    driver: pci: rockchip: Decrease waiting time for linking
    
    Change-Id: I3455d937f2134f18da769e2f88f07f5b0f4e7cc2
    Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

diff --git a/drivers/pci/pcie_dw_rockchip.c b/drivers/pci/pcie_dw_rockchip.c
index b5a1bbcdfe..55b5e8d000 100644
--- a/drivers/pci/pcie_dw_rockchip.c
+++ b/drivers/pci/pcie_dw_rockchip.c
@@ -529,7 +529,7 @@ static int rk_pcie_link_up(struct rk_pcie *priv, u32 cap_speed)
 	/* Enable LTSSM */
 	rk_pcie_enable_ltssm(priv);
 
-	for (retries = 0; retries < 10000000; retries++) {
+	for (retries = 0; retries < 50; retries++) {
 		if (is_link_up(priv)) {
 			dev_info(priv->dev, "PCIe Link up, LTSSM is 0x%x\n",
 				 rk_pcie_readl_apb(priv, PCIE_CLIENT_LTSSM_STATUS));
@@ -540,7 +540,7 @@ static int rk_pcie_link_up(struct rk_pcie *priv, u32 cap_speed)
 		dev_info(priv->dev, "PCIe Linking... LTSSM is 0x%x\n",
 			 rk_pcie_readl_apb(priv, PCIE_CLIENT_LTSSM_STATUS));
 		rk_pcie_debug_dump(priv);
-		msleep(1000);
+		msleep(100);
 	}
 
 	dev_err(priv->dev, "PCIe-%d Link Fail\n", priv->dev->seq);

commit 3993b0c711ad03c874c0a033bcc9e53498e7740f
Author: Wesley Yao <wesley.yao@rock-chips.com>
Date:   Fri May 7 18:04:14 2021 +0800

    drivers: ram: rv1126: Set default value of die bus with to x16 when bus
    width is x16/x32 of DDR3
    
    Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
    Change-Id: I4808d2e723e6b238b52482d4d67e7502da9f7cb4

diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
index 9830065e31..bc1602ab84 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -2492,6 +2492,8 @@ static u64 dram_detect_cap(struct dram_info *dram,
 			else
 				cap_info->bw = 0;
 		}
+		if (cap_info->bw > 0)
+			cap_info->dbw = 1;
 	}
 
 	writel(pwrctl, pctl_base + DDR_PCTL2_PWRCTL);

commit 7a20be36360720f8d9364f355a39a2765908c83a
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Wed May 19 17:42:58 2021 +0800

    video/drm: vop2: fix interlace fild pol config error
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: I6491d18bbf2abe70226edc75ff7b49c2f7ac34ee

diff --git a/drivers/video/drm/rockchip_vop2.c b/drivers/video/drm/rockchip_vop2.c
index 58cfa388b2..f53bdad9d9 100644
--- a/drivers/video/drm/rockchip_vop2.c
+++ b/drivers/video/drm/rockchip_vop2.c
@@ -138,6 +138,7 @@
 #define DSP_RB_SWAP				2
 #define CORE_DCLK_DIV_EN_SHIFT			4
 #define P2I_EN_SHIFT				5
+#define DSP_FILED_POL				6
 #define INTERLACE_EN_SHIFT			7
 #define POST_DSP_OUT_R2Y_SHIFT			15
 #define PRE_DITHER_DOWN_EN_SHIFT		16
@@ -1577,6 +1578,8 @@ static int rockchip_vop2_init(struct display_state *state)
 		vop2_writel(vop2, RK3568_VP0_DSP_VS_ST_END_F1 + vp_offset, val);
 		vop2_mask_write(vop2, RK3568_VP0_DSP_CTRL + vp_offset, EN_MASK,
 				INTERLACE_EN_SHIFT, 1, false);
+		vop2_mask_write(vop2, RK3568_VP0_DSP_CTRL + vp_offset, EN_MASK,
+				DSP_FILED_POL, 1, false);
 		vop2_mask_write(vop2, RK3568_VP0_DSP_CTRL + vp_offset, EN_MASK,
 				P2I_EN_SHIFT, 1, false);
 		vtotal += vtotal + 1;

commit 62fc2a1046e8810351354ead9de9c6f26957be45
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Tue May 18 15:00:32 2021 +0800

    drm/rockchip: vop2: force set rk3566 active_vp_num as two
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: I2a39749993941cfd248445924b8770a8ed129db6

diff --git a/drivers/video/drm/rockchip_vop2.c b/drivers/video/drm/rockchip_vop2.c
index a250224a7e..58cfa388b2 100644
--- a/drivers/video/drm/rockchip_vop2.c
+++ b/drivers/video/drm/rockchip_vop2.c
@@ -1204,6 +1204,8 @@ static void vop2_global_initial(struct vop2 *vop2, struct display_state *state)
 
 		if (soc_is_rk3566() && active_vp_num > 2)
 			printf("ERROR: rk3566 only support 2 display output!!\n");
+		if (soc_is_rk3566())
+			active_vp_num = 2;
 		plane_mask = vop2->data->plane_mask;
 		plane_mask += (active_vp_num - 1) * VOP2_VP_MAX;
 

commit 74bd8269b17ac9342c18da9dc6d37c8334bfb8d6
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Wed May 19 09:54:21 2021 +0800

    drm/rockchip: vop2: sync vop2 limit from kernel
    
    1. post scale must align as 2 pixel;
    2. unsupport src_w % 16 == 1 when scale down.
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: I8a1e0a41933f6d7a1fb4f4224e6894df68692be7

diff --git a/drivers/video/drm/rockchip_vop2.c b/drivers/video/drm/rockchip_vop2.c
index 07234da5ef..a250224a7e 100644
--- a/drivers/video/drm/rockchip_vop2.c
+++ b/drivers/video/drm/rockchip_vop2.c
@@ -1108,8 +1108,8 @@ static void vop2_post_config(struct display_state *state, struct vop2 *vop2)
 	u32 bg_ovl_dly, bg_dly, pre_scan_dly;
 	u16 hsync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
 
-	if (mode->flags & DRM_MODE_FLAG_INTERLACE)
-		vsize = round_down(vsize, 2);
+	hsize = round_down(hsize, 2);
+	vsize = round_down(vsize, 2);
 
 	hact_st += hdisplay * (100 - conn_state->overscan.left_margin) / 200;
 	hact_end = hact_st + hsize;
@@ -1707,6 +1707,15 @@ static int rockchip_vop2_set_plane(struct display_state *state)
 		return -EINVAL;
 	}
 
+	/*
+	 * This is workaround solution for IC design:
+	 * esmart can't support scale down when actual_w % 16 == 1.
+	 */
+	if (src_w > crtc_w && (src_w & 0xf) == 1) {
+		printf("WARN: vp%d unsupported act_w[%d] mode 16 = 1 when scale down\n", cstate->crtc_id, src_w);
+		src_w -= 1;
+	}
+
 	act_info = (src_h - 1) << 16;
 	act_info |= (src_w - 1) & 0xffff;
 

commit 77a3e227af6173a36f799bc890f6f58b48373321
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Wed May 19 09:47:45 2021 +0800

    gpt: Force repair backup GPT after factory or OTA upgrade GPT
    
    Factory or OTA only upgrade the Primary GPT, and the backup GPT
    may exist as a valid different partition info.
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: Ifb5b20545384a4fd81b4d335e7cdbbcaf86267dc

diff --git a/disk/part_efi.c b/disk/part_efi.c
index 6c79a9d8e9..7dc20d129c 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -477,6 +477,8 @@ static int part_test_efi(struct blk_desc *dev_desc)
 		if (part_efi_repair(dev_desc, h_gpt_pte, h_gpt_head,
 				    0, 1))
 			printf("Primary GPT repair fail!\n");
+		/* Force repair backup GPT for factory or ota upgrade. */
+		backup_gpt_valid = 0;
 	}
 
 	if (head_gpt_valid == 1 && backup_gpt_valid == 0) {

commit 326cb0a9a3a00df49f69e4f9faccf9e71a4263ad
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu May 20 14:49:11 2021 +0800

    rockchip: fit_misc: correct the config
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I6ddb0c6e8868600279f0f8eb283361f984f72908

diff --git a/arch/arm/mach-rockchip/fit_misc.c b/arch/arm/mach-rockchip/fit_misc.c
index 6a6a27b019..7b4d5222e5 100644
--- a/arch/arm/mach-rockchip/fit_misc.c
+++ b/arch/arm/mach-rockchip/fit_misc.c
@@ -164,7 +164,7 @@ int fit_board_verify_required_sigs(void)
 	uint8_t vboot = 0;
 
 #ifdef CONFIG_SPL_BUILD
-#if defined(CONFIG_SPL_ROCKCHIP_SECURE_OTP) || \
+#if defined(CONFIG_SPL_ROCKCHIP_SECURE_OTP_V1) || \
     defined(CONFIG_SPL_ROCKCHIP_SECURE_OTP_V2)
 	struct udevice *dev;
 

commit 9050e1f82ed3b2eadac14a6627b0fadd2041d4c2
Author: Wesley Yao <wesley.yao@rock-chips.com>
Date:   Fri May 7 15:36:03 2021 +0800

    drivers: ram: rv1126: fix tZQLAT of LPDDR4
    
    set t_zq_short_nop(reg ZQCTL0) to tZQLAT for LPDDR4
    
    Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
    Change-Id: I5fa2e65b642b83529caa60bf5893398bcb84cca5

diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-1056.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-1056.inc
index 04f1a3eab2..705cbfb5cb 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-1056.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-1056.inc
@@ -54,7 +54,7 @@
 			{0x00000130, 0x00020000},	/* DRAMTMG12 */
 			{0x00000134, 0x0a100002},	/* DRAMTMG13 */
 			{0x00000138, 0x00000098},	/* DRAMTMG14 */
-			{0x00000180, 0x02100210},	/* ZQCTL0 */
+			{0x00000180, 0x02100010},	/* ZQCTL0 */
 			{0x00000184, 0x01b00000},	/* ZQCTL1 */
 			{0x00000190, 0x07070001},	/* DFITMG0 */
 			{0x00000198, 0x07000101},	/* DFILPCFG0 */
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-328.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-328.inc
index dc1186e76e..3864b0097f 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-328.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-328.inc
@@ -54,7 +54,7 @@
 			{0x00000130, 0x00020000},	/* DRAMTMG12 */
 			{0x00000134, 0x00100002},	/* DRAMTMG13 */
 			{0x00000138, 0x00000030},	/* DRAMTMG14 */
-			{0x00000180, 0x00a400a4},	/* ZQCTL0 */
+			{0x00000180, 0x00a40005},	/* ZQCTL0 */
 			{0x00000184, 0x00900000},	/* ZQCTL1 */
 			{0x00000190, 0x07040000},	/* DFITMG0 */
 			{0x00000198, 0x07000101},	/* DFILPCFG0 */
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-396.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-396.inc
index bac8148b8e..9018c3a763 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-396.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-396.inc
@@ -54,7 +54,7 @@
 			{0x00000130, 0x00020000},	/* DRAMTMG12 */
 			{0x00000134, 0x00100002},	/* DRAMTMG13 */
 			{0x00000138, 0x00000039},	/* DRAMTMG14 */
-			{0x00000180, 0x00c600c6},	/* ZQCTL0 */
+			{0x00000180, 0x00c60006},	/* ZQCTL0 */
 			{0x00000184, 0x00a00000},	/* ZQCTL1 */
 			{0x00000190, 0x07040000},	/* DFITMG0 */
 			{0x00000198, 0x07000101},	/* DFILPCFG0 */
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-528.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-528.inc
index b4cb969fd4..8c8e14c376 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-528.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-528.inc
@@ -54,7 +54,7 @@
 			{0x00000130, 0x00020000},	/* DRAMTMG12 */
 			{0x00000134, 0x00100002},	/* DRAMTMG13 */
 			{0x00000138, 0x0000004c},	/* DRAMTMG14 */
-			{0x00000180, 0x01080108},	/* ZQCTL0 */
+			{0x00000180, 0x01080008},	/* ZQCTL0 */
 			{0x00000184, 0x00e00000},	/* ZQCTL1 */
 			{0x00000190, 0x07040000},	/* DFITMG0 */
 			{0x00000198, 0x07000101},	/* DFILPCFG0 */
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-664.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-664.inc
index 95ee2d8d12..f601fe5cb6 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-664.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-664.inc
@@ -54,7 +54,7 @@
 			{0x00000130, 0x00020000},	/* DRAMTMG12 */
 			{0x00000134, 0x00100002},	/* DRAMTMG13 */
 			{0x00000138, 0x00000060},	/* DRAMTMG14 */
-			{0x00000180, 0x014c014c},	/* ZQCTL0 */
+			{0x00000180, 0x014c000a},	/* ZQCTL0 */
 			{0x00000184, 0x01100000},	/* ZQCTL1 */
 			{0x00000190, 0x07040000},	/* DFITMG0 */
 			{0x00000198, 0x07000101},	/* DFILPCFG0 */
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-784.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-784.inc
index e968b086ef..b8d9d5f1ce 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-784.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-784.inc
@@ -54,7 +54,7 @@
 			{0x00000130, 0x00020000},	/* DRAMTMG12 */
 			{0x00000134, 0x00100002},	/* DRAMTMG13 */
 			{0x00000138, 0x00000071},	/* DRAMTMG14 */
-			{0x00000180, 0x01880188},	/* ZQCTL0 */
+			{0x00000180, 0x0188000c},	/* ZQCTL0 */
 			{0x00000184, 0x01400000},	/* ZQCTL1 */
 			{0x00000190, 0x07040000},	/* DFITMG0 */
 			{0x00000198, 0x07000101},	/* DFILPCFG0 */
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-924.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-924.inc
index fc02f0d5cc..a2050f6153 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-924.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-924.inc
@@ -54,7 +54,7 @@
 			{0x00000130, 0x00020000},	/* DRAMTMG12 */
 			{0x00000134, 0x0a100002},	/* DRAMTMG13 */
 			{0x00000138, 0x00000085},	/* DRAMTMG14 */
-			{0x00000180, 0x01ce01ce},	/* ZQCTL0 */
+			{0x00000180, 0x01ce000e},	/* ZQCTL0 */
 			{0x00000184, 0x01800000},	/* ZQCTL1 */
 			{0x00000190, 0x07070001},	/* DFITMG0 */
 			{0x00000198, 0x07000101},	/* DFILPCFG0 */

commit a9c46e880ac0c4366d57d560bb8673220697a5ac
Author: Wesley Yao <wesley.yao@rock-chips.com>
Date:   Wed May 12 14:39:38 2021 +0800

    cmd: ddr_tool: ddr_dq_eye: fix print range of DDR DQ eye
    
    Print DQ eye at print_border->far_right to avoid lossing one point of DQ
    eye sometimes.
    
    Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
    Change-Id: I7f108d9b7c063a0ebf748f012013a538a6656f0e

diff --git a/cmd/ddr_tool/ddr_dq_eye.c b/cmd/ddr_tool/ddr_dq_eye.c
index 3cd1fbe345..17aaf44497 100644
--- a/cmd/ddr_tool/ddr_dq_eye.c
+++ b/cmd/ddr_tool/ddr_dq_eye.c
@@ -113,7 +113,7 @@ static void print_ddr_dq_eye(struct fsp_rw_trn_result *fsp_result, u8 cs,
 
 			printf("DQ%-2d ", dqs * 8 + dq);
 			for (i = print_border->far_left;
-			     i < print_border->far_right; i += PRINT_STEP) {
+			     i <= print_border->far_right; i += PRINT_STEP) {
 				if (i / PRINT_STEP == sample / PRINT_STEP)
 					printf("|");
 				else if (i / PRINT_STEP >= min / PRINT_STEP &&

commit 3825dbad9b8cf717c9be5cbf3c5785761c72c72f
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon May 10 21:17:02 2021 +0800

    mtd: spinand: Support DS35Q2GB
    
    Support DS35Q2GB
    
    Change-Id: I98133fcff9a7b6f9de401c8ca5fb8484cc1760d2
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/dosilicon.c b/drivers/mtd/nand/spi/dosilicon.c
index 92fbba425e..6dd695b855 100644
--- a/drivers/mtd/nand/spi/dosilicon.c
+++ b/drivers/mtd/nand/spi/dosilicon.c
@@ -12,7 +12,13 @@
 #endif
 #include <linux/mtd/spinand.h>
 
-#define SPINAND_MFR_DOSILICON		0xE5
+#define SPINAND_MFR_DOSILICON			0xE5
+
+#define DOSICON_STATUS_ECC_MASK			GENMASK(7, 4)
+#define DOSICON_STATUS_ECC_NO_BITFLIPS		(0 << 4)
+#define DOSICON_STATUS_ECC_1TO3_BITFLIPS	(1 << 4)
+#define DOSICON_STATUS_ECC_4TO6_BITFLIPS	(3 << 4)
+#define DOSICON_STATUS_ECC_7TO8_BITFLIPS	(5 << 4)
 
 static SPINAND_OP_VARIANTS(read_cache_variants,
 		SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
@@ -59,6 +65,62 @@ static const struct mtd_ooblayout_ops ds35xxga_ooblayout = {
 	.rfree = ds35xxga_ooblayout_free,
 };
 
+static int ds35xxgb_ooblayout_ecc(struct mtd_info *mtd, int section,
+				  struct mtd_oob_region *region)
+{
+	if (section)
+		return -ERANGE;
+
+	region->offset = 64;
+	region->length = 64;
+
+	return 0;
+}
+
+static int ds35xxgb_ooblayout_free(struct mtd_info *mtd, int section,
+				   struct mtd_oob_region *region)
+{
+	if (section)
+		return -ERANGE;
+
+	/* Reserve 1 bytes for the BBM. */
+	region->offset = 1;
+	region->length = 63;
+
+	return 0;
+}
+
+static const struct mtd_ooblayout_ops ds35xxgb_ooblayout = {
+	.ecc = ds35xxgb_ooblayout_ecc,
+	.rfree = ds35xxgb_ooblayout_free,
+};
+
+static int ds35xxgb_ecc_get_status(struct spinand_device *spinand,
+				   u8 status)
+{
+	switch (status & DOSICON_STATUS_ECC_MASK) {
+	case STATUS_ECC_NO_BITFLIPS:
+		return 0;
+
+	case STATUS_ECC_UNCOR_ERROR:
+		return -EBADMSG;
+
+	case DOSICON_STATUS_ECC_1TO3_BITFLIPS:
+		return 3;
+
+	case DOSICON_STATUS_ECC_4TO6_BITFLIPS:
+		return 6;
+
+	case DOSICON_STATUS_ECC_7TO8_BITFLIPS:
+		return 8;
+
+	default:
+		break;
+	}
+
+	return -EINVAL;
+}
+
 static const struct spinand_info dosilicon_spinand_table[] = {
 	SPINAND_INFO("DS35X1GA", 0x71,
 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
@@ -68,7 +130,7 @@ static const struct spinand_info dosilicon_spinand_table[] = {
 					      &update_cache_variants),
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&ds35xxga_ooblayout, NULL)),
-	SPINAND_INFO("DS35X2GA", 0x72,
+	SPINAND_INFO("DS35Q2GA", 0x72,
 		     NAND_MEMORG(1, 2048, 64, 64, 2048, 2, 1, 1),
 		     NAND_ECCREQ(4, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -76,6 +138,23 @@ static const struct spinand_info dosilicon_spinand_table[] = {
 					      &update_cache_variants),
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&ds35xxga_ooblayout, NULL)),
+	SPINAND_INFO("DS35M1GA", 0x21,
+		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
+		     NAND_ECCREQ(4, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&ds35xxga_ooblayout, NULL)),
+	SPINAND_INFO("DS35Q2GB", 0xF2,
+		     NAND_MEMORG(1, 2048, 128, 64, 2048, 2, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&ds35xxgb_ooblayout,
+				     ds35xxgb_ecc_get_status)),
 };
 
 /**
@@ -96,7 +175,8 @@ static int dosilicon_spinand_detect(struct spinand_device *spinand)
 		return 0;
 
 	ret = spinand_match_and_init(spinand, dosilicon_spinand_table,
-				     ARRAY_SIZE(dosilicon_spinand_table), id[2]);
+				     ARRAY_SIZE(dosilicon_spinand_table),
+				     id[2]);
 	if (ret)
 		return ret;
 

commit 027a4716e56e496655d93edf414340dff022aa51
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon May 10 18:49:08 2021 +0800

    mtd: spinand: Support W25N04KV
    
    Support W25N04KV
    
    Change-Id: I3c0f282656216f1ec64cd9d510416ec8e9df56cc
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/winbond.c b/drivers/mtd/nand/spi/winbond.c
index 3431d895f5..4d737462ac 100644
--- a/drivers/mtd/nand/spi/winbond.c
+++ b/drivers/mtd/nand/spi/winbond.c
@@ -155,7 +155,11 @@ static const struct spinand_info winbond_spinand_table[] = {
 		     0,
 		     SPINAND_ECCINFO(&w25m02gv_ooblayout, NULL),
 		     SPINAND_SELECT_TARGET(w25m02gv_select_target)),
-	SPINAND_INFO("W25N01GV", 0xAA,
+};
+
+/* Another set for the same id[2] devices in one series */
+static const struct spinand_info winbond_spinand_table2[] = {
+	SPINAND_INFO("W25N01GV", 0x21,
 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
 		     NAND_ECCREQ(1, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -164,11 +168,7 @@ static const struct spinand_info winbond_spinand_table[] = {
 		     0,
 		     SPINAND_ECCINFO(&w25m02gv_ooblayout, NULL),
 		     SPINAND_SELECT_TARGET(w25m02gv_select_target)),
-};
-
-/* Another set for the same id[2] devices in one series */
-static const struct spinand_info winbond_spinand_table2[] = {
-	SPINAND_INFO("W25N02KV", 0xAA,
+	SPINAND_INFO("W25N02KV", 0x22,
 		     NAND_MEMORG(1, 2048, 64, 64, 2048, 1, 1, 1),
 		     NAND_ECCREQ(8, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -177,6 +177,15 @@ static const struct spinand_info winbond_spinand_table2[] = {
 		     0,
 		     SPINAND_ECCINFO(&w25n02kv_ooblayout,
 				     w25n02kv_ecc_get_status)),
+	SPINAND_INFO("W25N04KV", 0x23,
+		     NAND_MEMORG(1, 2048, 64, 64, 4096, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     0,
+		     SPINAND_ECCINFO(&w25n02kv_ooblayout,
+				     w25n02kv_ecc_get_status)),
 };
 
 /**
@@ -196,10 +205,10 @@ static int winbond_spinand_detect(struct spinand_device *spinand)
 	if (id[1] != SPINAND_MFR_WINBOND)
 		return 0;
 
-	if (id[2] == 0xAA && id[3] == 0x22)
+	if (id[2] == 0xAA)
 		ret = spinand_match_and_init(spinand, winbond_spinand_table2,
-					     ARRAY_SIZE(winbond_spinand_table),
-					     id[2]);
+					     ARRAY_SIZE(winbond_spinand_table2),
+					     id[3]);
 	else
 		ret = spinand_match_and_init(spinand, winbond_spinand_table,
 					     ARRAY_SIZE(winbond_spinand_table),

commit ca328d7efd5e136039b3e0a722af9f4fd52a0f66
Author: Weixin Zhou <zwx@rock-chips.com>
Date:   Mon Apr 26 19:28:06 2021 +0800

    configs: rk3566-eink: add CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
    
    Signed-off-by: Weixin Zhou <zwx@rock-chips.com>
    Change-Id: I0d864f2113efae01a2be9d6987c2c78e34f591d0

diff --git a/configs/rk3566-eink.config b/configs/rk3566-eink.config
index 9d0dfe5b60..1d93005ef9 100644
--- a/configs/rk3566-eink.config
+++ b/configs/rk3566-eink.config
@@ -5,3 +5,4 @@ CONFIG_ROCKCHIP_EINK_DISPLAY=y
 CONFIG_ROCKCHIP_EINK=y
 CONFIG_ROCKCHIP_TPS65185=y
 CONFIG_TRUST_INI="RK3566TRUST_ULTRA.ini"
+CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y

commit 042c01531e0d3ee5d3e7adca6c04b50ad77225f4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed May 12 20:29:32 2021 +0800

    rockchip: make fit: update padding algo
    
    Enable pss-padding if CONFIG_FIT_ENABLE_RSASSA_PSS_SUPPORT=y.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I45999c56336c9bf9c312500f3734e2dc25651084

diff --git a/arch/arm/mach-rockchip/make_fit_atf.sh b/arch/arm/mach-rockchip/make_fit_atf.sh
index 21f2395bad..4f2780e67b 100755
--- a/arch/arm/mach-rockchip/make_fit_atf.sh
+++ b/arch/arm/mach-rockchip/make_fit_atf.sh
@@ -18,6 +18,10 @@ else
 	SUFFIX=
 fi
 
+if grep  -q '^CONFIG_FIT_ENABLE_RSASSA_PSS_SUPPORT=y' .config ; then
+	ALGO_PADDING="				padding = \"pss\";"
+fi
+
 function generate_uboot_node()
 {
 	echo "		uboot {
@@ -227,7 +231,7 @@ cat << EOF
 			fdt = "fdt"${PROP_KERN_DTB};
 			signature {
 				algo = "sha256,rsa2048";
-				padding = "pss";
+				${ALGO_PADDING}
 				key-name-hint = "dev";
 				sign-images = "fdt", "firmware", "loadables"${STANDALONE_SIGN};
 			};
diff --git a/arch/arm/mach-rockchip/make_fit_boot.sh b/arch/arm/mach-rockchip/make_fit_boot.sh
index 8ad86be715..2db15d89a1 100755
--- a/arch/arm/mach-rockchip/make_fit_boot.sh
+++ b/arch/arm/mach-rockchip/make_fit_boot.sh
@@ -23,6 +23,10 @@ else
 	SUFFIX=
 fi
 
+if grep  -q '^CONFIG_FIT_ENABLE_RSASSA_PSS_SUPPORT=y' .config ; then
+	ALGO_PADDING="				padding = \"pss\";"
+fi
+
 cat << EOF
 /*
  * Copyright (C) 2020 Fuzhou Rockchip Electronics Co., Ltd
@@ -96,7 +100,7 @@ cat << EOF
 			multi = "resource";
 			signature {
 				algo = "sha256,rsa2048";
-				padding = "pss";
+				${ALGO_PADDING}
 				key-name-hint = "dev";
 				sign-images = "fdt", "kernel", "ramdisk", "multi";
 			};
diff --git a/arch/arm/mach-rockchip/make_fit_optee.sh b/arch/arm/mach-rockchip/make_fit_optee.sh
index baa30ee2ad..e569c9d033 100755
--- a/arch/arm/mach-rockchip/make_fit_optee.sh
+++ b/arch/arm/mach-rockchip/make_fit_optee.sh
@@ -17,6 +17,10 @@ else
 	SUFFIX=
 fi
 
+if grep  -q '^CONFIG_FIT_ENABLE_RSASSA_PSS_SUPPORT=y' .config ; then
+	ALGO_PADDING="				padding = \"pss\";"
+fi
+
 # digest
 if [ "${COMPRESSION}" == "gzip" ]; then
 	openssl dgst -sha256 -binary -out ${srctree}/u-boot-nodtb.digest ${srctree}/u-boot-nodtb.bin
@@ -161,7 +165,7 @@ echo "${MCU_STANDALONE}"
 cat  << EOF
 			signature {
 				algo = "sha256,rsa2048";
-				padding = "pss";
+				${ALGO_PADDING}
 				key-name-hint = "dev";
 EOF
 echo "${SIGN_IMAGES}"

commit bff167c5592b134f42f22005fababebf7120f7f4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu May 13 15:17:45 2021 +0800

    scripts: fit-resign.sh: update comment
    
    Add pss-padding arg for openssl sign command.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ie34293b04e220c9981a3703c5f0acbeca7e3d562

diff --git a/scripts/fit-resign.sh b/scripts/fit-resign.sh
index 44b0582bcf..4cd87a04a1 100755
--- a/scripts/fit-resign.sh
+++ b/scripts/fit-resign.sh
@@ -11,7 +11,7 @@ set -e
 #	openssl genpkey -algorithm RSA -out keys/dev.key -pkeyopt rsa_keygen_bits:2048 -pkeyopt rsa_keygen_pubexp:65537
 #	openssl req -batch -new -x509 -key keys/dev.key -out keys/dev.crt
 # [Sign]
-#	openssl dgst -sha256 -sign keys/dev.key -out sha256-rsa2048.sign fit/boot.data2sign
+#	openssl dgst -sha256 -sign keys/dev.key -sigopt rsa_padding_mode:pss -out sha256-rsa2048.sign fit/boot.data2sign
 
 IMG_UBOOT="uboot.img"
 IMG_BOOT="boot.img"

commit 878479ae8e6d5b99d06a056cab6d23d0eb861685
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu May 13 10:00:47 2021 +0800

    configs: rk3399pro: update uboot.img as 2MB*2
    
    Fix pack error:
    ERROR: pack uboot failed! u-boot.bin actual: 1051440 bytes, max limit: 1046528 bytes
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I788bed1139483f2b6639ea37c0e60629a0f81752

diff --git a/configs/rk3399pro_defconfig b/configs/rk3399pro_defconfig
index da8c4715e1..5af187c333 100644
--- a/configs/rk3399pro_defconfig
+++ b/configs/rk3399pro_defconfig
@@ -8,6 +8,8 @@ CONFIG_ROCKCHIP_RK3399=y
 CONFIG_ROCKCHIP_RK3399PRO=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_CHIP_NAME="RK3399PRO"
+CONFIG_UBOOT_SIZE_KB=2048
+CONFIG_UBOOT_NUM=2
 CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y

commit 2122174dd998d6485346881bac32b682d382253f
Author: Wu Liangqing <wlq@rock-chips.com>
Date:   Wed May 12 19:34:51 2021 +0800

    rockusb: support avb bin download
    
    Signed-off-by: Wu Liangqing <wlq@rock-chips.com>
    Change-Id: Ie33d56ee58f49f0a4b62fcdc2a9b121c653d5bcd

diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index 1141dc51b0..cb8dfcbf85 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -6,6 +6,8 @@
  */
 
 #include <asm/io.h>
+#include <android_avb/avb_ops_user.h>
+#include <android_avb/rk_avb_ops_user.h>
 #include <asm/arch/boot_mode.h>
 #include <asm/arch/chip_info.h>
 #include <write_keybox.h>
@@ -14,7 +16,6 @@
 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
 #include <asm/arch/vendor.h>
 #endif
-
 #include <rockusb.h>
 
 #define ROCKUSB_INTERFACE_CLASS	0xff
@@ -453,7 +454,7 @@ static int rkusb_do_vs_write(struct fsg_common *common)
 					curlun->sense_data = SS_WRITE_ERROR;
 					return -EIO;
 				}
-			} else {
+			} else if (type == 1) {
 				/* RPMB */
 				rc =
 				write_keybox_to_secure_storage((u8 *)data,
@@ -462,6 +463,23 @@ static int rkusb_do_vs_write(struct fsg_common *common)
 					curlun->sense_data = SS_WRITE_ERROR;
 					return -EIO;
 				}
+			} else if (type == 2) {
+				/* security storage */
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
+				debug("%s call rk_avb_write_perm_attr %d, %d\n",
+				      __func__, vhead->id, vhead->size);
+				rc = rk_avb_write_perm_attr(vhead->id,
+							    (char __user *)data,
+							    vhead->size);
+				if (rc < 0) {
+					curlun->sense_data = SS_WRITE_ERROR;
+					return -EIO;
+				}
+#else
+				printf("Please enable CONFIG_RK_AVB_LIBAVB_USER\n");
+#endif
+			} else {
+				return -EINVAL;
 			}
 
 			common->residue -= common->data_size;
@@ -527,7 +545,7 @@ static int rkusb_do_vs_read(struct fsg_common *common)
 				return -EIO;
 			}
 			vhead->size = rc;
-		} else {
+		} else if (type == 1) {
 			/* RPMB */
 			rc =
 			read_raw_data_from_secure_storage((u8 *)data,
@@ -537,6 +555,20 @@ static int rkusb_do_vs_read(struct fsg_common *common)
 				return -EIO;
 			}
 			vhead->size = rc;
+		} else if (type == 2) {
+			/* security storage */
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
+			rc = rk_avb_read_perm_attr(vhead->id,
+						   (char __user *)data,
+						   vhead->size);
+			if (rc < 0)
+				return -EIO;
+			vhead->size = rc;
+#else
+			printf("Please enable CONFIG_RK_AVB_LIBAVB_USER!\n");
+#endif
+		} else {
+			return -EINVAL;
 		}
 
 		common->residue   -= common->data_size;

commit 6e2db7c2c8eb14e0a5f8852aae9ff54c059a3817
Author: Wu Liangqing <wlq@rock-chips.com>
Date:   Wed May 12 19:32:33 2021 +0800

    avb: otp: support avb hash download
    
    Change-Id: Idd07a1473d4d1bbe91e309f8db73be08b5b59dd1
    Signed-off-by: Wu Liangqing <wlq@rock-chips.com>

diff --git a/include/android_avb/rk_avb_ops_user.h b/include/android_avb/rk_avb_ops_user.h
index 1d1b8c415d..2198a76df0 100644
--- a/include/android_avb/rk_avb_ops_user.h
+++ b/include/android_avb/rk_avb_ops_user.h
@@ -322,6 +322,13 @@ int rk_avb_get_pub_key(struct rk_pub_key *pub_key);
  */
 int rk_avb_init_ab_metadata(void);
 
+/**
+ * rockchip avb commands
+ *
+ */
+int rk_avb_write_perm_attr(uint16_t id, void *pbuf, uint16_t size);
+int rk_avb_read_perm_attr(uint16_t id, void *pbuf, uint16_t size);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/lib/avb/rk_avb_user/rk_avb_ops_user.c b/lib/avb/rk_avb_user/rk_avb_ops_user.c
index 92dbedec32..98bf5ceead 100644
--- a/lib/avb/rk_avb_user/rk_avb_ops_user.c
+++ b/lib/avb/rk_avb_user/rk_avb_ops_user.c
@@ -24,6 +24,7 @@
 #include <android_avb/avb_atx_validate.h>
 #include <android_avb/rk_avb_ops_user.h>
 #include <boot_rkimg.h>
+#include <u-boot/sha256.h>
 #include <asm/arch/rk_atags.h>
 
 /* rk used */
@@ -661,3 +662,150 @@ int rk_avb_init_ab_metadata(void)
 
 	return 0;
 }
+
+#define AT_PERM_ATTR_FUSE		1
+#define AT_PERM_ATTR_CER_FUSE		2
+#define AT_LOCK_VBOOT			3
+
+int rk_avb_write_perm_attr(u16 id, void *pbuf, u16 size)
+{
+	uint8_t lock_state;
+#ifndef CONFIG_ROCKCHIP_PRELOADER_PUB_KEY
+	sha256_context ctx;
+	uint8_t digest[SHA256_SUM_LEN] = {0};
+	uint8_t digest_temp[SHA256_SUM_LEN] = {0};
+	uint8_t perm_attr_temp[PERM_ATTR_TOTAL_SIZE] = {0};
+	uint8_t flag = 0;
+#endif
+
+	switch (id) {
+	case AT_PERM_ATTR_FUSE:
+		if (size != PERM_ATTR_TOTAL_SIZE) {
+			debug("%s Permanent attribute size is not equal!\n", __func__);
+			return -EINVAL;
+		}
+
+#ifndef CONFIG_ROCKCHIP_PRELOADER_PUB_KEY
+		if (rk_avb_read_perm_attr_flag(&flag)) {
+			debug("%s rk_avb_read_perm_attr_flag error!\n", __func__);
+			return -EIO;
+		}
+
+		if (flag == PERM_ATTR_SUCCESS_FLAG) {
+			if (rk_avb_read_attribute_hash(digest_temp,
+						       SHA256_SUM_LEN)) {
+				debug("%s The efuse IO can not be used!\n", __func__);
+				return -EIO;
+			}
+
+			if (memcmp(digest, digest_temp, SHA256_SUM_LEN) != 0) {
+				if (rk_avb_read_permanent_attributes(perm_attr_temp,
+								     PERM_ATTR_TOTAL_SIZE)) {
+					debug("%s rk_avb_write_permanent_attributes error!\n", __func__);
+					return -EIO;
+				}
+
+				sha256_starts(&ctx);
+				sha256_update(&ctx,
+					      (const uint8_t *)perm_attr_temp,
+					      PERM_ATTR_TOTAL_SIZE);
+				sha256_finish(&ctx, digest);
+				if (memcmp(digest, digest_temp, SHA256_SUM_LEN) == 0) {
+					debug("%s The hash has been written!\n", __func__);
+					return 0;
+				}
+			}
+
+			if (rk_avb_write_perm_attr_flag(0)) {
+				debug("%s Perm attr flag write failure\n", __func__);
+				return -EIO;
+			}
+		}
+#endif
+		if (rk_avb_write_permanent_attributes((uint8_t *)
+						      pbuf,
+						      size)) {
+			if (rk_avb_write_perm_attr_flag(0)) {
+				debug("%s Perm attr flag write failure\n", __func__);
+				return -EIO;
+			}
+
+			debug("%s Perm attr write failed\n", __func__);
+			return -EIO;
+		}
+#ifndef CONFIG_ROCKCHIP_PRELOADER_PUB_KEY
+		memset(digest, 0, SHA256_SUM_LEN);
+		sha256_starts(&ctx);
+		sha256_update(&ctx, (const uint8_t *)pbuf,
+			      PERM_ATTR_TOTAL_SIZE);
+		sha256_finish(&ctx, digest);
+
+		if (rk_avb_write_attribute_hash((uint8_t *)digest,
+						SHA256_SUM_LEN)) {
+			if (rk_avb_read_attribute_hash(digest_temp,
+						       SHA256_SUM_LEN)) {
+				debug("%s The efuse IO can not be used!\n", __func__);
+				return -EIO;
+			}
+
+			if (memcmp(digest, digest_temp, SHA256_SUM_LEN) != 0) {
+				if (rk_avb_write_perm_attr_flag(0)) {
+					debug("%s Perm attr flag write failure\n", __func__);
+					return -EIO;
+				}
+				debug("%s The hash has been written, but is different!\n", __func__);
+				return -EIO;
+			}
+		}
+#endif
+		if (rk_avb_write_perm_attr_flag(PERM_ATTR_SUCCESS_FLAG)) {
+			debug("%s, Perm attr flag write failure\n", __func__);
+			return -EIO;
+		}
+
+		break;
+	case AT_PERM_ATTR_CER_FUSE:
+		if (size != 256) {
+			debug("%s Permanent attribute rsahash size is not equal!\n",
+			      __func__);
+			return -EINVAL;
+		}
+		if (rk_avb_set_perm_attr_cer((uint8_t *)pbuf, size)) {
+			debug("%s FAILSet perm attr cer fail!\n", __func__);
+			return -EIO;
+		}
+		break;
+	case AT_LOCK_VBOOT:
+		lock_state = 0;
+		if (rk_avb_write_lock_state(lock_state)) {
+			debug("%s FAILwrite lock state failed\n", __func__);
+			return -EIO;
+		} else {
+			debug("%s OKAY\n", __func__);
+		}
+		break;
+	}
+	return 0;
+}
+
+int rk_avb_read_perm_attr(u16 id, void *pbuf, u16 size)
+{
+	int ret = 0;
+	debug("%s %d\n", __func__, size);
+
+	switch (id) {
+	case AT_PERM_ATTR_FUSE:
+		size = PERM_ATTR_TOTAL_SIZE;
+		ret = rk_avb_read_permanent_attributes((uint8_t *)pbuf, PERM_ATTR_TOTAL_SIZE);
+		break;
+	case AT_PERM_ATTR_CER_FUSE:
+		size = PERM_ATTR_TOTAL_SIZE;
+		ret = rk_avb_get_perm_attr_cer((uint8_t *)pbuf, 256);
+		break;
+	case AT_LOCK_VBOOT:
+		break;
+	}
+
+	return ret;
+}
+

commit 871b2fe8ad298e6ca9157dfe5115092ae2b07b89
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed May 12 14:22:59 2021 +0800

    lib: avb: avb_atx_validate: fix crypto sha512 fail
    
    The new crypto-v2 drivers requires total data length before sha init,
    let's add it to avoid issue:
    
      ...
      Vboot=0, AVB images, AVB verify
      read_is_device_unlocked() ops returned that device is LOCKED
      total length(0x00000000) != init length(0xeb9f6290)!
      avb_rsa.c:285: ERROR: Hash check failed.
      avb_atx_validate.c:173: ERROR: Invalid certificate signature.
      avb_atx_validate.c:199: ERROR: Invalid PIK certificate.
      avb_slot_verify.c:865: ERROR: vbmeta: Public key used to sign data rejected.
      AVB verify failed
      ...
    
    Fixes: (5b0bc49177 lib: avb: support crypto sha256/512)
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I276041a8b5faadac8c95622f77888a5447ed3a71

diff --git a/lib/avb/libavb_atx/avb_atx_validate.c b/lib/avb/libavb_atx/avb_atx_validate.c
index 2b21caa97e..be4184bfad 100644
--- a/lib/avb/libavb_atx/avb_atx_validate.c
+++ b/lib/avb/libavb_atx/avb_atx_validate.c
@@ -58,6 +58,8 @@ static void sha512(const uint8_t* data,
                    uint32_t length,
                    uint8_t hash[AVB_SHA512_DIGEST_SIZE]) {
   AvbSHA512Ctx context;
+
+  context.tot_len = length;
   avb_sha512_init(&context);
   avb_sha512_update(&context, data, length);
   uint8_t* tmp = avb_sha512_final(&context);

commit 0be173f14dba3816b40f5430c88b70ef9f92fb87
Author: Weiwen Chen <cww@rock-chips.com>
Date:   Wed May 12 10:29:42 2021 +0800

    configs: rv1126-spi-nor-tiny: set spl fit image to 288KB
    
    Signed-off-by: Weiwen Chen <cww@rock-chips.com>
    Change-Id: Ia4af0a783f99600c37c7e79c3734ffa7ee229bf8

diff --git a/configs/rv1126-spi-nor-tiny_defconfig b/configs/rv1126-spi-nor-tiny_defconfig
index cc05601589..9b46da7c5c 100644
--- a/configs/rv1126-spi-nor-tiny_defconfig
+++ b/configs/rv1126-spi-nor-tiny_defconfig
@@ -30,7 +30,7 @@ CONFIG_FIT_IMAGE_POST_PROCESS=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
 # CONFIG_SPL_SYS_DCACHE_OFF is not set
-CONFIG_SPL_FIT_IMAGE_KB=256
+CONFIG_SPL_FIT_IMAGE_KB=288
 CONFIG_SPL_FIT_IMAGE_MULTIPLE=1
 CONFIG_BOOTDELAY=1
 CONFIG_SYS_CONSOLE_INFO_QUIET=y

commit 6086d444e32fb0b69e9b93bff7f809ad9c8da801
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue May 11 17:00:00 2021 +0800

    spl: fit: re-compile the file
    
    Make sure that compile the spl_fit_tb_arm_v7.c by cmd "./make.sh
    rv1126-spi-nor-tb" with enable FIT_SIGNATURE to generate the
    spl_fit_tb_arm_v7.S.
    
    Error log:
    Trying to boot from MTD2
    Verified-boot: 0
    Checking mcu 0x00108000 (gzip @0x00208000) ... sha256+ sha256+ OK
    Checking optee 0x00040000 (gzip @0x00140000) ... sha256+ sha256+ OK
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I3594180bf103d47ba40a774cf575cec1a9636049

diff --git a/common/spl/spl_fit_tb_arm_v7.S b/common/spl/spl_fit_tb_arm_v7.S
index b8e73431e5..aea84e6aa4 100644
--- a/common/spl/spl_fit_tb_arm_v7.S
+++ b/common/spl/spl_fit_tb_arm_v7.S
@@ -20,7 +20,7 @@
 	.fpu softvfp
 	.type	spl_fit_get_image_name.isra.0, %function
 spl_fit_get_image_name.isra.0:
-.LFB217:
+.LFB221:
 	.file 1 "common/spl/spl_fit_tb_arm_v7.c"
 	.loc 1 37 0
 	.cfi_startproc
@@ -165,7 +165,7 @@ spl_fit_get_image_name.isra.0:
 	.word	.LC5
 	.word	.LC6
 	.cfi_endproc
-.LFE217:
+.LFE221:
 	.size	spl_fit_get_image_name.isra.0, .-spl_fit_get_image_name.isra.0
 	.section	.text.spl_fit_get_image_node,"ax",%progbits
 	.align	1
@@ -175,7 +175,7 @@ spl_fit_get_image_name.isra.0:
 	.fpu softvfp
 	.type	spl_fit_get_image_node, %function
 spl_fit_get_image_node:
-.LFB203:
+.LFB207:
 	.loc 1 93 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
@@ -222,7 +222,7 @@ spl_fit_get_image_node:
 	@ sp needed
 	pop	{r4, r5, pc}
 	.cfi_endproc
-.LFE203:
+.LFE207:
 	.size	spl_fit_get_image_node, .-spl_fit_get_image_node
 	.global	__aeabi_idivmod
 	.global	__aeabi_idiv
@@ -234,7 +234,7 @@ spl_fit_get_image_node:
 	.fpu softvfp
 	.type	spl_load_fit_image, %function
 spl_load_fit_image:
-.LFB207:
+.LFB211:
 	.loc 1 171 0
 	.cfi_startproc
 	@ args = 8, pretend = 0, frame = 48
@@ -253,48 +253,42 @@ spl_load_fit_image:
 	sub	sp, sp, #56
 	.cfi_def_cfa_offset 88
 	.loc 1 171 0
-	mov	r4, r2
-	ldr	r5, [sp, #88]
+	ldr	r6, [sp, #88]
+	mov	r5, r2
+	mov	r7, r3
 	.loc 1 181 0
 	add	r2, sp, #56
 .LVL39:
-	.loc 1 171 0
-	mov	r7, r3
-	.loc 1 181 0
 	movs	r3, #255
 .LVL40:
 	.loc 1 171 0
-	str	r1, [sp, #20]
+	str	r1, [sp, #12]
 	.loc 1 181 0
 	strb	r3, [r2, #-29]!
 .LVL41:
 	.loc 1 198 0
-	mov	r1, r5
+	mov	r1, r6
 .LVL42:
-	.loc 1 185 0
-	ldr	r3, [r0]
 	.loc 1 171 0
 	mov	r10, r0
-	.loc 1 198 0
-	mov	r0, r4
 .LVL43:
-	.loc 1 171 0
-	ldr	r6, [sp, #92]
-	.loc 1 185 0
-	str	r3, [sp, #12]
+	.loc 1 198 0
+	mov	r0, r5
 .LVL44:
+	.loc 1 171 0
+	ldr	r4, [sp, #92]
 	.loc 1 198 0
 	bl	fit_image_get_comp
 .LVL45:
 	.loc 1 201 0
 	add	r2, sp, #44
-	mov	r1, r5
-	mov	r0, r4
+	mov	r1, r6
+	mov	r0, r5
 	bl	fit_image_get_load
 .LVL46:
 	cbz	r0, .L17
 	.loc 1 202 0
-	ldr	r3, [r6, #8]
+	ldr	r3, [r4, #8]
 	str	r3, [sp, #44]
 .L17:
 	.loc 1 204 0
@@ -306,50 +300,50 @@ spl_load_fit_image:
 	beq	.L18
 	.loc 1 206 0 is_stmt 1
 	add	r2, sp, #40
-	mov	r1, r5
-	mov	r0, r4
+	mov	r1, r6
+	mov	r0, r5
 	bl	fit_image_get_comp_addr
 .LVL47:
 	cbz	r0, .L19
 	.loc 1 207 0
 	ldr	r3, [sp, #44]
 	add	r3, r3, #1048576
-.L70:
+.L62:
 	.loc 1 209 0
 	str	r3, [sp, #40]
 .L19:
 	.loc 1 212 0
 	add	r2, sp, #28
-	mov	r1, r5
-	mov	r0, r4
+	mov	r1, r6
+	mov	r0, r5
 	bl	fit_image_get_data_position
 .LVL48:
 	cbz	r0, .L20
 	.loc 1 214 0
 	add	r2, sp, #28
-	mov	r1, r5
-	mov	r0, r4
+	mov	r1, r6
+	mov	r0, r5
 	bl	fit_image_get_data_offset
 .LVL49:
 	cmp	r0, #0
 	bne	.L21
 	.loc 1 215 0
 	ldr	r3, [sp, #28]
-	add	r7, r7, r3
+	add	r3, r3, r7
+	str	r3, [sp, #28]
 .LVL50:
-	str	r7, [sp, #28]
-.LVL51:
 .L20:
 	.loc 1 221 0
 	add	r2, sp, #36
-	mov	r1, r5
-	mov	r0, r4
+	mov	r1, r6
+	mov	r0, r5
 	bl	fit_image_get_data_size
-.LVL52:
+.LVL51:
 	cmp	r0, #0
-	bne	.L40
+	bne	.L38
 	.loc 1 224 0
 	ldr	r7, [sp, #40]
+.LVL52:
 	adds	r7, r7, #63
 	bic	r3, r7, #63
 	.loc 1 226 0
@@ -370,25 +364,25 @@ spl_load_fit_image:
 .LBB35:
 .LBB36:
 	.loc 1 134 0
-	ldr	r3, [r10, #12]
+	ldr	r2, [r10, #12]
 .LBE36:
 .LBE35:
 	.loc 1 230 0
 	ldr	r8, [sp, #36]
 	.loc 1 232 0
-	ldr	r0, [sp, #28]
+	ldr	r3, [sp, #28]
+.LVL56:
 	.loc 1 230 0
 	str	r8, [sp, #32]
-.LVL56:
 .LBB39:
 .LBB37:
 	.loc 1 134 0
-	cmp	r3, #0
+	cmp	r2, #0
 	beq	.L23
 	.loc 1 135 0
-	and	fp, r0, #63
-.LVL57:
+	and	fp, r3, #63
 .L24:
+.LVL57:
 .LBE37:
 .LBE39:
 .LBB40:
@@ -397,52 +391,40 @@ spl_load_fit_image:
 	add	r8, r8, fp
 .LVL58:
 	.loc 1 145 0
-	cbnz	r3, .L25
+	cbnz	r2, .L25
 	.loc 1 148 0
 	ldr	r1, [r10, #8]
+	str	r2, [sp, #20]
+	str	r3, [sp, #16]
 	add	r0, r8, r1
 	subs	r0, r0, #1
 	bl	__aeabi_idiv
 .LVL59:
+	ldr	r2, [sp, #20]
 	mov	r8, r0
 .LVL60:
+	ldr	r3, [sp, #16]
+.LVL61:
 .L25:
 .LBE41:
 .LBE40:
-	.loc 1 236 0
-	mov	r1, r5
-	mov	r0, r4
-	bl	fit_image_is_preload
-.LVL61:
-	.loc 1 238 0
-	str	r0, [sp, #16]
-	cbz	r0, .L26
-	.loc 1 239 0
-	ldr	r2, [sp, #12]
-	movs	r3, #1
-	strb	r3, [r2, #14]
-.L26:
 	.loc 1 241 0
-	ldr	r3, [r10, #16]
-	.loc 1 242 0
-	ldr	r0, [sp, #28]
+	ldr	r1, [r10, #16]
+	mov	r7, r1
 .LVL62:
-	.loc 1 241 0
-	mov	r7, r3
 .LBB42:
 .LBB43:
 	.loc 1 120 0
-	ldr	r3, [r10, #12]
-	cmp	r3, #0
-	beq	.L27
+	cmp	r2, #0
+	beq	.L26
 	.loc 1 121 0
-	bic	r0, r0, #63
+	bic	r0, r3, #63
 .LVL63:
-.L28:
+.L27:
 .LBE43:
 .LBE42:
 	.loc 1 241 0
-	ldr	r1, [sp, #20]
+	ldr	r1, [sp, #12]
 	mov	r2, r8
 	ldr	r3, [sp, #8]
 	add	r1, r1, r0
@@ -450,232 +432,222 @@ spl_load_fit_image:
 	blx	r7
 .LVL64:
 	cmp	r8, r0
-	bne	.L37
+	bne	.L35
 	.loc 1 248 0
 	ldr	r3, [sp, #8]
 	add	r3, r3, fp
 	str	r3, [sp, #48]
-	.loc 1 249 0
-	ldr	r3, [sp, #16]
-	cbz	r3, .L30
-	.loc 1 250 0
-	ldr	r3, [sp, #12]
-	ldr	r2, [sp, #12]
-	.loc 1 251 0
-	ldr	r0, .L72
-	.loc 1 250 0
-	ldrb	r3, [r3, #14]	@ zero_extendqisi2
-	bic	r3, r3, #1
-	strb	r3, [r2, #14]
-	.loc 1 251 0
-	bl	printf
 .LVL65:
-.L31:
-	.loc 1 304 0
-	cbz	r6, .L71
-	.loc 1 305 0
-	ldr	r3, [sp, #44]
-	.loc 1 307 0
-	mov	r1, r5
-	ldr	r2, .L72+4
-	mov	r0, r4
-	.loc 1 305 0
-	str	r3, [r6, #8]
-	.loc 1 306 0
-	ldr	r3, [sp, #32]
-	str	r3, [r6, #32]
-	.loc 1 307 0
-	bl	fdt_getprop_u32
-.LVL66:
-	str	r0, [r6, #12]
-.L71:
-	.loc 1 310 0
-	movs	r0, #0
-.LVL67:
-.L16:
-	.loc 1 311 0
-	add	sp, sp, #56
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL68:
-.L18:
-	.cfi_restore_state
-	.loc 1 209 0
-	ldr	r3, [sp, #44]
-	b	.L70
-.LVL69:
-.L23:
-.LBB45:
-.LBB38:
-	.loc 1 137 0
-	ldr	r1, [r10, #8]
-	str	r3, [sp, #16]
-	bl	__aeabi_idivmod
-.LVL70:
-	ldr	r3, [sp, #16]
-	mov	fp, r1
-	b	.L24
-.LVL71:
-.L27:
-.LBE38:
-.LBE45:
-.LBB46:
-.LBB44:
-	.loc 1 123 0
-	ldr	r1, [r10, #8]
-	bl	__aeabi_idiv
-.LVL72:
-	b	.L28
-.LVL73:
-.L68:
-.LBE44:
-.LBE46:
-	.loc 1 262 0
-	ldr	r3, [sp, #52]
-	str	r3, [sp, #48]
-.LVL74:
-.L30:
+.L29:
 	.loc 1 266 0
 	ldrb	r3, [sp, #27]	@ zero_extendqisi2
-.LBB47:
-.LBB48:
+.LBB45:
+.LBB46:
 	.file 2 "include/image.h"
 	.loc 2 1005 0
 	movs	r2, #0
-	mov	r1, r5
-	mov	r0, r4
-.LBE48:
-.LBE47:
+	mov	r1, r6
+	mov	r0, r5
+.LBE46:
+.LBE45:
 	.loc 1 266 0
-	cbz	r3, .L32
-.LVL75:
+	cmp	r3, #0
+	beq	.L30
+.LVL66:
 	.loc 1 266 0 is_stmt 0 discriminator 1
 	cmp	r3, #6
-	beq	.L32
-.LVL76:
-.LBB51:
+	beq	.L30
+.LVL67:
 .LBB49:
+.LBB47:
 	.loc 2 1005 0 is_stmt 1
 	bl	fdt_get_name
-.LVL77:
+.LVL68:
+.LBE47:
 .LBE49:
-.LBE51:
 	.loc 1 269 0
 	movs	r3, #0
-.LBB52:
 .LBB50:
+.LBB48:
 	.loc 2 1005 0
 	mov	r7, r0
-.LVL78:
+.LVL69:
+.LBE48:
 .LBE50:
-.LBE52:
 	.loc 1 269 0
-	ldr	r2, .L72+8
-	mov	r1, r5
-	mov	r0, r4
+	ldr	r2, .L64
+	mov	r1, r6
+	mov	r0, r5
 	.loc 1 267 0
 	ldr	r8, [sp, #44]
 	.loc 1 269 0
 	bl	fdt_getprop
-.LVL79:
+.LVL70:
 	.loc 1 267 0
 	ldr	r3, [sp, #48]
 	mov	r1, r7
 	mov	r2, r8
 	str	r3, [sp]
 	mov	r3, r0
-	ldr	r0, .L72+12
+	ldr	r0, .L64+4
 	bl	printf
-.LVL80:
-.L33:
+.LVL71:
+.L31:
 	.loc 1 279 0
 	ldr	r3, [sp, #32]
-	mov	r1, r5
+	mov	r1, r6
 	ldr	r2, [sp, #48]
-	mov	r0, r4
+	mov	r0, r5
 	bl	fit_image_verify_with_data
-.LVL81:
-	cbz	r0, .L38
+.LVL72:
+	cmp	r0, #0
+	beq	.L36
 	.loc 1 284 0
 	add	r3, sp, #32
 	add	r2, sp, #44
-	mov	r1, r5
+	mov	r1, r6
 	str	r3, [sp]
-	mov	r0, r4
+	mov	r0, r5
 	add	r3, sp, #48
 	bl	board_fit_image_post_process
-.LVL82:
+.LVL73:
 	.loc 1 287 0
-	ldr	r0, .L72+16
+	ldr	r0, .L64+8
 	bl	puts
-.LVL83:
+.LVL74:
 	.loc 1 301 0
 	ldr	r2, [sp, #32]
 	ldr	r1, [sp, #48]
 	ldr	r0, [sp, #44]
 	bl	memcpy
+.LVL75:
+.LDL1:
+	.loc 1 304 0
+	cbz	r4, .L63
+	.loc 1 305 0
+	ldr	r3, [sp, #44]
+	.loc 1 307 0
+	mov	r1, r6
+	ldr	r2, .L64+12
+	mov	r0, r5
+	.loc 1 305 0
+	str	r3, [r4, #8]
+	.loc 1 306 0
+	ldr	r3, [sp, #32]
+	str	r3, [r4, #32]
+	.loc 1 307 0
+	bl	fdt_getprop_u32
+.LVL76:
+	str	r0, [r4, #12]
+.L63:
+	.loc 1 310 0
+	movs	r0, #0
+.LVL77:
+.L16:
+	.loc 1 311 0
+	add	sp, sp, #56
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL78:
+.L18:
+	.cfi_restore_state
+	.loc 1 209 0
+	ldr	r3, [sp, #44]
+	b	.L62
+.LVL79:
+.L23:
+.LBB51:
+.LBB38:
+	.loc 1 137 0
+	mov	r0, r3
+	ldr	r1, [r10, #8]
+	str	r2, [sp, #20]
+	str	r3, [sp, #16]
+	bl	__aeabi_idivmod
+.LVL80:
+	ldr	r2, [sp, #20]
+	mov	fp, r1
+	ldr	r3, [sp, #16]
+	b	.L24
+.LVL81:
+.L26:
+.LBE38:
+.LBE51:
+.LBB52:
+.LBB44:
+	.loc 1 123 0
+	ldr	r1, [r10, #8]
+	mov	r0, r3
+	bl	__aeabi_idiv
+.LVL82:
+	b	.L27
+.LVL83:
+.L60:
+.LBE44:
+.LBE52:
+	.loc 1 262 0
+	ldr	r3, [sp, #52]
+	str	r3, [sp, #48]
+	b	.L29
 .LVL84:
-	b	.L31
-.LVL85:
-.L32:
+.L30:
 .LBB53:
 .LBB54:
 	.loc 2 1005 0
 	bl	fdt_get_name
-.LVL86:
+.LVL85:
 .LBE54:
 .LBE53:
 	.loc 1 272 0
 	ldr	r2, [sp, #44]
 	mov	r1, r0
-	ldr	r0, .L72+20
+	ldr	r0, .L64+16
 	bl	printf
+.LVL86:
+	b	.L31
 .LVL87:
-	b	.L33
-.LVL88:
-.L37:
+.L35:
 	.loc 1 244 0
 	mvn	r0, #4
 	b	.L16
-.LVL89:
-.L38:
+.LVL88:
+.L36:
 	.loc 1 281 0
 	mov	r0, #-1
 	b	.L16
-.LVL90:
+.LVL89:
 .L21:
 	.loc 1 256 0
 	add	r3, sp, #32
 	add	r2, sp, #52
-	mov	r1, r5
-	mov	r0, r4
+	mov	r1, r6
+	mov	r0, r5
 	bl	fit_image_get_data
-.LVL91:
+.LVL90:
 	cmp	r0, #0
-	beq	.L68
+	beq	.L60
 	.loc 1 257 0
-	ldr	r0, .L72+24
+	ldr	r0, .L64+20
 	bl	puts
-.LVL92:
-.L40:
+.LVL91:
+.L38:
 	.loc 1 222 0
 	mvn	r0, #1
-.LVL93:
+.LVL92:
 	b	.L16
-.L73:
+.L65:
 	.align	2
-.L72:
-	.word	.LC7
-	.word	.LC13
+.L64:
+	.word	.LC8
 	.word	.LC9
-	.word	.LC10
-	.word	.LC12
 	.word	.LC11
-	.word	.LC8
+	.word	.LC12
+	.word	.LC10
+	.word	.LC7
 	.cfi_endproc
-.LFE207:
+.LFE211:
 	.size	spl_load_fit_image, .-spl_load_fit_image
 	.section	.text.spl_fit_append_fdt,"ax",%progbits
 	.align	1
@@ -685,12 +657,12 @@ spl_load_fit_image:
 	.fpu softvfp
 	.type	spl_fit_append_fdt, %function
 spl_fit_append_fdt:
-.LFB208:
+.LFB212:
 	.loc 1 316 0
 	.cfi_startproc
 	@ args = 8, pretend = 0, frame = 48
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL94:
+.LVL93:
 	push	{r4, r5, r6, r7, lr}
 	.cfi_def_cfa_offset 20
 	.cfi_offset 4, -20
@@ -707,18 +679,18 @@ spl_fit_append_fdt:
 	mov	r7, r2
 	.loc 1 321 0
 	movs	r3, #0
+.LVL94:
+	ldr	r2, .L68
 .LVL95:
-	ldr	r2, .L76
-.LVL96:
 	ldr	r1, [sp, #80]
-.LVL97:
+.LVL96:
 	mov	r0, r5
-.LVL98:
+.LVL97:
 	bl	spl_fit_get_image_node
-.LVL99:
+.LVL98:
 	.loc 1 322 0
 	cmp	r0, #0
-	blt	.L74
+	blt	.L66
 	.loc 1 331 0
 	ldr	r2, [r4, #32]
 	.loc 1 332 0
@@ -734,36 +706,36 @@ spl_fit_append_fdt:
 	add	r3, sp, #12
 	stm	sp, {r0, r3}
 	mov	r0, r6
-.LVL100:
+.LVL99:
 	ldr	r3, [sp, #84]
 	bl	spl_load_fit_image
-.LVL101:
+.LVL100:
 	.loc 1 335 0
 	cmp	r0, #0
-	blt	.L74
+	blt	.L66
 	.loc 1 339 0
 	ldr	r0, [sp, #20]
-.LVL102:
+.LVL101:
 	.loc 1 342 0
 	mov	r1, #8192
 	.loc 1 339 0
 	str	r0, [r4, #20]
 	.loc 1 342 0
 	bl	fdt_shrink_to_minimum
-.LVL103:
-.L74:
+.LVL102:
+.L66:
 	.loc 1 346 0
 	add	sp, sp, #60
 	.cfi_def_cfa_offset 20
 	@ sp needed
 	pop	{r4, r5, r6, r7, pc}
-.LVL104:
-.L77:
+.LVL103:
+.L69:
 	.align	2
-.L76:
+.L68:
 	.word	.LC0
 	.cfi_endproc
-.LFE208:
+.LFE212:
 	.size	spl_fit_append_fdt, .-spl_fit_append_fdt
 	.section	.text.spl_fit_load_blob,"ax",%progbits
 	.align	1
@@ -773,14 +745,14 @@ spl_fit_append_fdt:
 	.fpu softvfp
 	.type	spl_fit_load_blob, %function
 spl_fit_load_blob:
-.LFB212:
+.LFB216:
 	.loc 1 388 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL105:
+.LVL104:
 	ldr	r2, [r2, #4]
-.LVL106:
+.LVL105:
 	push	{r3, r4, r5, r6, r7, lr}
 	.cfi_def_cfa_offset 24
 	.cfi_offset 3, -24
@@ -793,37 +765,37 @@ spl_fit_load_blob:
 	mov	r4, r0
 	mov	r5, r1
 	rev	r2, r2
-.LVL107:
+.LVL106:
 	.loc 1 401 0
 	addw	r2, r2, #511
-.LVL108:
+.LVL107:
 	.loc 1 402 0
 	bic	r0, r2, #510
-.LVL109:
+.LVL108:
 	bic	r0, r0, #1
 	str	r0, [r3]
 	.loc 1 421 0
-	ldr	r3, .L81
-.LVL110:
+	ldr	r3, .L73
+.LVL109:
 	ldr	r1, [r4, #8]
-.LVL111:
+.LVL110:
 	subs	r3, r3, r1
 	subs	r3, r3, r0
 	.loc 1 422 0
 	bic	r6, r3, #63
-.LVL112:
+.LVL111:
 .LBB61:
 .LBB62:
 	.loc 1 145 0
 	ldr	r3, [r4, #12]
-	cbnz	r3, .L79
+	cbnz	r3, .L71
 	.loc 1 148 0
 	add	r0, r0, r1
-.LVL113:
+.LVL112:
 	subs	r0, r0, #1
 	bl	__aeabi_idiv
-.LVL114:
-.L79:
+.LVL113:
+.L71:
 .LBE62:
 .LBE61:
 	.loc 1 424 0
@@ -833,22 +805,22 @@ spl_fit_load_blob:
 	mov	r1, r5
 	mov	r0, r4
 	blx	r7
-.LVL115:
+.LVL114:
 	.loc 1 427 0
 	cmp	r0, #0
 	.loc 1 431 0
 	ite	ne
 	movne	r0, r6
-.LVL116:
+.LVL115:
 	moveq	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.LVL117:
-.L82:
+.LVL116:
+.L74:
 	.align	2
-.L81:
+.L73:
 	.word	4194241
 	.cfi_endproc
-.LFE212:
+.LFE216:
 	.size	spl_fit_load_blob, .-spl_fit_load_blob
 	.section	.text.fit_config_verify,"ax",%progbits
 	.align	1
@@ -859,19 +831,19 @@ spl_fit_load_blob:
 	.fpu softvfp
 	.type	fit_config_verify, %function
 fit_config_verify:
-.LFB201:
+.LFB205:
 	.loc 1 21 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL118:
+.LVL117:
 	.loc 1 23 0
 	movs	r0, #0
-.LVL119:
+.LVL118:
 	bx	lr
 	.cfi_endproc
-.LFE201:
+.LFE205:
 	.size	fit_config_verify, .-fit_config_verify
 	.section	.text.spl_fit_standalone_release,"ax",%progbits
 	.align	1
@@ -882,19 +854,19 @@ fit_config_verify:
 	.fpu softvfp
 	.type	spl_fit_standalone_release, %function
 spl_fit_standalone_release:
-.LFB211:
+.LFB215:
 	.loc 1 381 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL120:
+.LVL119:
 	.loc 1 383 0
 	movs	r0, #0
-.LVL121:
+.LVL120:
 	bx	lr
 	.cfi_endproc
-.LFE211:
+.LFE215:
 	.size	spl_fit_standalone_release, .-spl_fit_standalone_release
 	.section	.text.spl_kernel_partition,"ax",%progbits
 	.align	1
@@ -905,23 +877,23 @@ spl_fit_standalone_release:
 	.fpu softvfp
 	.type	spl_kernel_partition, %function
 spl_kernel_partition:
-.LFB213:
+.LFB217:
 	.loc 1 437 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL122:
+.LVL121:
 	.loc 1 439 0
-	ldr	r0, .L86
-.LVL123:
+	ldr	r0, .L78
+.LVL122:
 	bx	lr
-.L87:
+.L79:
 	.align	2
-.L86:
-	.word	.LC14
+.L78:
+	.word	.LC13
 	.cfi_endproc
-.LFE213:
+.LFE217:
 	.size	spl_kernel_partition, .-spl_kernel_partition
 	.section	.text.spl_load_simple_fit,"ax",%progbits
 	.align	1
@@ -932,12 +904,12 @@ spl_kernel_partition:
 	.fpu softvfp
 	.type	spl_load_simple_fit, %function
 spl_load_simple_fit:
-.LFB216:
+.LFB220:
 	.loc 1 760 0
 	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 216
+	@ args = 0, pretend = 0, frame = 248
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL124:
+.LVL123:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
 	.cfi_offset 4, -32
@@ -948,419 +920,380 @@ spl_load_simple_fit:
 	.cfi_offset 10, -12
 	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	sub	sp, sp, #232
-	.cfi_def_cfa_offset 264
-	mov	r4, r0
-	mov	r6, r1
+	sub	sp, sp, #264
+	.cfi_def_cfa_offset 296
 	add	r7, sp, #16
-	.cfi_def_cfa 7, 248
+	.cfi_def_cfa 7, 280
+.LVL124:
 	.loc 1 760 0
-	mov	r10, r2
+	mov	r5, r1
+	mov	r4, r0
+	str	r2, [r7, #28]
 .LVL125:
-	.loc 1 762 0
-	mvn	fp, #21
-	.loc 1 760 0
-	str	r3, [r7, #20]
-	.loc 1 765 0
-	movs	r3, #0
+	mov	r2, r3
 .LVL126:
-	str	r3, [r7, #24]
+	ldr	r3, [r3]
 .LVL127:
-.L125:
-	.loc 1 766 0
-	ldr	r3, [r7, #24]
-	cmp	r3, #1
-	bne	.L89
-	.loc 1 768 0
-	ldr	r1, [r6, #8]
-	mov	r0, #2097152
-	bl	__aeabi_idiv
+	.loc 1 776 0
+	ldr	r1, .L143
 .LVL128:
-	.loc 1 767 0
-	add	r10, r10, r0
+	rev	r3, r3
 .LVL129:
-	.loc 1 769 0
-	ldr	r0, .L158
-	mov	r1, r10
-	bl	printf
-.LVL130:
-	.loc 1 770 0
-	ldr	r5, [r6, #16]
-	mov	r1, r10
-	ldr	r3, [r7, #20]
-	mov	r0, r6
-	ldr	r2, [r7, #24]
-	blx	r5
-.LVL131:
-	cmp	r0, #1
-	beq	.L89
-	.loc 1 771 0
-	ldr	r0, .L158+4
-.L157:
+	cmp	r3, r1
+	str	r1, [r7]
+	beq	.L81
 	.loc 1 777 0
+	ldr	r0, .L143+4
+.LVL130:
+.L142:
+.LBB82:
+.LBB83:
+	.loc 1 595 0
 	bl	printf
+.LVL131:
+	.loc 1 596 0
+	mvn	r0, #21
 .LVL132:
-.L90:
-	.loc 1 765 0 discriminator 2
-	ldr	r3, [r7, #24]
-	adds	r3, r3, #1
-	cmp	r3, #2
-	str	r3, [r7, #24]
+.L80:
+.LBE83:
+.LBE82:
+	.loc 1 792 0
+	adds	r7, r7, #248
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	mov	sp, r7
+	.cfi_def_cfa_register 13
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
 .LVL133:
-	beq	.L88
-	b	.L125
-.LVL134:
-.L89:
-	ldr	r3, [r7, #20]
-	.loc 1 776 0
-	ldr	r2, .L158+8
-	ldr	r3, [r3]
-	rev	r3, r3
-.LVL135:
-	cmp	r3, r2
-	beq	.L91
-	.loc 1 777 0
-	ldr	r0, .L158+12
-	b	.L157
-.L91:
-.LVL136:
-.LBB82:
-.LBB83:
+.L81:
+	.cfi_restore_state
+.LBB93:
+.LBB91:
 	.loc 1 569 0
-	add	r3, r7, #40
-	ldr	r2, [r7, #20]
-	mov	r1, r10
-	mov	r0, r6
+	add	r3, r7, #36
+	ldr	r1, [r7, #28]
+	mov	r0, r5
+.LVL134:
 	bl	spl_fit_load_blob
-.LVL137:
+.LVL135:
 	.loc 1 570 0
-	mov	r5, r0
+	mov	r6, r0
 	cmp	r0, #0
-	beq	.L92
+	beq	.L83
 	.loc 1 576 0
-	ldr	r1, .L158+16
+	ldr	r1, .L143+8
 	bl	fdt_path_offset
-.LVL138:
+.LVL136:
 	.loc 1 577 0
-	subs	r3, r0, #0
-	str	r3, [r7, #28]
-	blt	.L92
+	subs	r10, r0, #0
+	blt	.L83
 	.loc 1 583 0
 	bl	fit_board_verify_required_sigs
-.LVL139:
+.LVL137:
 	.loc 1 593 0
 	movs	r1, #0
-	mov	r0, r5
+	mov	r0, r6
 	bl	fit_conf_get_node
-.LVL140:
+.LVL138:
 	.loc 1 594 0
 	subs	r1, r0, #0
-	bgt	.L93
+	bgt	.L84
 	.loc 1 595 0
-	ldr	r0, .L158+20
-.LVL141:
-	bl	printf
-.LVL142:
-	.loc 1 596 0
-	mvn	r0, #21
-.LVL143:
-.L94:
-	mov	fp, r0
-	b	.L90
-.LVL144:
-.L93:
+	ldr	r0, .L143+12
+.LVL139:
+	b	.L142
+.LVL140:
+.L84:
 	.loc 1 599 0
-	mov	r0, r5
-.LVL145:
+	mov	r0, r6
+.LVL141:
 	bl	fit_config_verify
-.LVL146:
+.LVL142:
 	.loc 1 600 0
-	mov	fp, r0
-	cbz	r0, .L95
+	mov	r8, r0
+	cbz	r0, .L86
 	.loc 1 601 0
 	mov	r1, r0
-	ldr	r0, .L158+24
-.LVL147:
+	ldr	r0, .L143+16
+.LVL143:
 	bl	printf
-.LVL148:
-	mov	r0, fp
-	b	.L94
-.L95:
+.LVL144:
+	mov	r0, r8
+	b	.L80
+.L86:
 	.loc 1 604 0
-	ldr	r0, .L158+28
+	ldr	r0, .L143+20
 	bl	printf
-.LVL149:
+.LVL145:
 	.loc 1 632 0
-	mov	r3, fp
-	ldr	r2, .L158+32
-	ldr	r1, [r7, #28]
-	mov	r0, r5
+	mov	r3, r8
+	ldr	r2, .L143+24
+	mov	r1, r10
+	mov	r0, r6
 	bl	spl_fit_get_image_node
-.LVL150:
+.LVL146:
 	.loc 1 634 0
-	subs	r8, r0, #0
-	ble	.L96
+	subs	fp, r0, #0
+	ble	.L87
 	.loc 1 636 0
-	add	r3, r7, #96
-	str	r8, [sp]
+	add	r3, r7, #92
+	str	fp, [sp]
 	str	r3, [sp, #4]
-	mov	r2, r5
-	ldr	r3, [r7, #40]
-	mov	r1, r10
-	mov	r0, r6
-.LVL151:
+	mov	r2, r6
+	ldr	r3, [r7, #36]
+	mov	r0, r5
+.LVL147:
+	ldr	r1, [r7, #28]
 	bl	spl_load_fit_image
-.LVL152:
+.LVL148:
 	.loc 1 638 0
-	cbnz	r0, .L98
+	cbnz	r0, .L89
 	.loc 1 639 0
-	ldr	r3, [r7, #108]
+	ldr	r3, [r7, #104]
 	adds	r3, r3, #1
 	.loc 1 640 0
 	itt	eq
-	ldreq	r3, [r7, #104]
-	streq	r3, [r7, #108]
+	ldreq	r3, [r7, #100]
+	streq	r3, [r7, #104]
 	.loc 1 642 0
-	ldr	r0, [r7, #108]
-.LVL153:
+	ldr	r0, [r7, #104]
+.LVL149:
 	bl	spl_fit_standalone_release
-.LVL154:
+.LVL150:
 	.loc 1 643 0
 	mov	r1, r0
-	cbz	r0, .L98
+	cbz	r0, .L89
 	.loc 1 644 0
-	ldr	r0, .L158+36
-.LVL155:
+	ldr	r0, .L143+28
+.LVL151:
 	bl	printf
-.LVL156:
-.L98:
+.LVL152:
+.L89:
 	.loc 1 659 0
 	movs	r3, #0
-	ldr	r2, .L158+40
-	ldr	r1, [r7, #28]
-	mov	r0, r5
+	ldr	r2, .L143+32
+	mov	r1, r10
+	mov	r0, r6
 	bl	spl_fit_get_image_node
-.LVL157:
+.LVL153:
 	.loc 1 665 0
-	subs	r8, r0, #0
-	bge	.L101
+	subs	fp, r0, #0
+	bge	.L92
 	.loc 1 667 0
 	movs	r3, #0
-	ldr	r2, .L158+44
-	ldr	r1, [r7, #28]
-	mov	r0, r5
-.LVL158:
+	ldr	r2, .L143+36
+	mov	r1, r10
+	mov	r0, r6
+.LVL154:
 	bl	spl_fit_get_image_node
-.LVL159:
+.LVL155:
 	.loc 1 674 0
-	subs	r8, r0, #0
-	blt	.L92
+	subs	fp, r0, #0
+	blt	.L83
 	.loc 1 672 0
-	mov	fp, #1
-	b	.L101
-.LVL160:
-.L96:
+	mov	r8, #1
+	b	.L92
+.LVL156:
+.L87:
 	.loc 1 658 0
-	bne	.L98
-	mov	fp, r8
-.LVL161:
-.L101:
-	.loc 1 681 0
-	str	r4, [sp, #4]
-	mov	r2, r5
-	str	r8, [sp]
-	mov	r1, r10
-	ldr	r3, [r7, #40]
-	mov	r0, r6
-.LVL162:
+	bne	.L89
+	mov	r8, fp
+.LVL157:
+.L92:
+	.loc 1 681 0
+	str	r4, [sp, #4]
+	mov	r2, r6
+	str	fp, [sp]
+	mov	r0, r5
+.LVL158:
+	ldr	r3, [r7, #36]
+	ldr	r1, [r7, #28]
 	bl	spl_load_fit_image
-.LVL163:
+.LVL159:
 	.loc 1 683 0
 	cmp	r0, #0
-	bne	.L94
-.LVL164:
+	bne	.L80
+.LVL160:
 .LBB84:
 .LBB85:
 	.loc 1 376 0
 	adds	r2, r4, #4
-.LVL165:
-	mov	r1, r8
-	mov	r0, r5
-.LVL166:
+.LVL161:
+	mov	r1, fp
+	mov	r0, r6
+.LVL162:
 	bl	fit_image_get_os
-.LVL167:
+.LVL163:
 .LBE85:
 .LBE84:
 	.loc 1 690 0
-	cbz	r0, .L102
+	cbz	r0, .L93
 	.loc 1 694 0
 	movs	r3, #17
 	strb	r3, [r4, #4]
-.L102:
+.L93:
 	.loc 1 701 0
 	ldrb	r3, [r4, #4]	@ zero_extendqisi2
 	cmp	r3, #17
-	bne	.L110
+	bne	.L101
 	.loc 1 702 0
-	ldr	r3, [r7, #40]
-	mov	r2, r10
-	mov	r1, r6
+	ldr	r3, [r7, #36]
+	mov	r1, r5
+	str	r10, [sp]
 	mov	r0, r4
 	str	r3, [sp, #4]
-	ldr	r3, [r7, #28]
-	str	r3, [sp]
-	mov	r3, r5
+	mov	r3, r6
+	ldr	r2, [r7, #28]
 	bl	spl_fit_append_fdt
-.LVL168:
-.L110:
+.LVL164:
+.L101:
 .LBB86:
 	.loc 1 707 0
 	movs	r3, #0
 	.loc 1 709 0
-	ldr	r2, .L158+44
+	ldr	r2, .L143+36
 	.loc 1 707 0
-	strb	r3, [r7, #36]
+	strb	r3, [r7, #32]
 	.loc 1 709 0
-	mov	r0, r5
-	mov	r3, fp
-	ldr	r1, [r7, #28]
+	mov	r1, r10
+	mov	r3, r8
+	mov	r0, r6
 	bl	spl_fit_get_image_node
-.LVL169:
+.LVL165:
 	.loc 1 710 0
 	subs	r3, r0, #0
-	str	r3, [r7, #24]
-	blt	.L104
-.LVL170:
+	blt	.L95
+.LVL166:
 .LBB87:
 .LBB88:
 	.loc 1 376 0
+	add	r2, r7, #32
+.LVL167:
 	mov	r1, r3
-	add	r2, r7, #36
-.LVL171:
-	mov	r0, r5
-.LVL172:
+	mov	r0, r6
+.LVL168:
+	str	r3, [r7, #24]
 	bl	fit_image_get_os
-.LVL173:
+.LVL169:
 .LBE88:
 .LBE87:
 	.loc 1 717 0
-	ldr	r3, [r4, #28]
-	cmp	r3, #2
-	bne	.L105
-	ldrb	r3, [r7, #36]	@ zero_extendqisi2
-	cmp	r3, #17
-	beq	.L113
-.L105:
-	.loc 1 721 0
-	add	r8, r7, #96
-	mov	r2, r5
-	str	r8, [sp, #4]
-	mov	r1, r10
+	ldr	r2, [r4, #28]
 	ldr	r3, [r7, #24]
-	mov	r0, r6
-	str	r3, [sp]
-	ldr	r3, [r7, #40]
+	cmp	r2, #2
+	bne	.L96
+	ldrb	r2, [r7, #32]	@ zero_extendqisi2
+	cmp	r2, #17
+	beq	.L104
+.L96:
+	.loc 1 721 0
+	add	fp, r7, #92
+	mov	r2, r6
+	stm	sp, {r3, fp}
+	mov	r0, r5
+	ldr	r3, [r7, #36]
+	ldr	r1, [r7, #28]
 	bl	spl_load_fit_image
-.LVL174:
+.LVL170:
 	.loc 1 723 0
 	cmp	r0, #0
-	blt	.L113
+	blt	.L104
 	.loc 1 726 0
-	ldrb	r3, [r7, #36]	@ zero_extendqisi2
+	ldrb	r3, [r7, #32]	@ zero_extendqisi2
 	cmp	r3, #17
-	bne	.L107
+	bne	.L98
 	.loc 1 727 0
-	ldr	r3, [r7, #40]
-	mov	r2, r10
-	mov	r1, r6
-	mov	r0, r8
-.LVL175:
+	ldr	r3, [r7, #36]
+	mov	r1, r5
+	str	r10, [sp]
+	mov	r0, fp
+.LVL171:
 	str	r3, [sp, #4]
-	ldr	r3, [r7, #28]
-	str	r3, [sp]
-	mov	r3, r5
+	mov	r3, r6
+	ldr	r2, [r7, #28]
 	bl	spl_fit_append_fdt
-.LVL176:
+.LVL172:
 	.loc 1 729 0
-	ldr	r3, [r7, #116]
+	ldr	r3, [r7, #112]
 	str	r3, [r4, #20]
-.L107:
+.L98:
 	.loc 1 736 0
 	ldr	r3, [r4, #12]
 	adds	r3, r3, #1
-	bne	.L108
+	bne	.L99
 	.loc 1 737 0
-	ldr	r3, [r7, #108]
+	ldr	r3, [r7, #104]
 	.loc 1 736 0
 	adds	r2, r3, #1
 	.loc 1 738 0
 	it	ne
 	strne	r3, [r4, #12]
-.L108:
+.L99:
 	.loc 1 741 0
 	ldr	r3, [r4, #20]
 	str	r3, [r7, #24]
-.LVL177:
+.LVL173:
 	cmp	r3, #0
-	beq	.L113
-.LVL178:
+	beq	.L104
+.LVL174:
 .LBB89:
 .LBB90:
 	.loc 1 356 0
-	add	r3, r7, #52
-.LVL179:
-	mov	r2, fp
-	ldr	r1, .L158+44
-	mov	r0, r5
+	add	r3, r7, #48
+.LVL175:
+	mov	r2, r8
+	ldr	r1, .L143+36
+	mov	r0, r6
 	bl	spl_fit_get_image_name.isra.0
-.LVL180:
+.LVL176:
 	.loc 1 358 0
 	cmp	r0, #0
-	blt	.L113
+	blt	.L104
 	.loc 1 361 0
-	mov	r3, fp
-	ldr	r2, .L158+44
-	ldr	r1, [r7, #28]
-	mov	r0, r5
-.LVL181:
+	mov	r3, r8
+	ldr	r2, .L143+36
+	mov	r1, r10
+	mov	r0, r6
+.LVL177:
 	bl	spl_fit_get_image_node
-.LVL182:
+.LVL178:
 	.loc 1 363 0
-	ldr	r3, [r7, #52]
+	ldr	r3, [r7, #48]
 	.loc 1 365 0
 	mov	r1, r0
 	.loc 1 361 0
-	mov	r8, r0
-.LVL183:
+	mov	fp, r0
+.LVL179:
 	.loc 1 365 0
-	ldr	r2, .L158+48
-	mov	r0, r5
-.LVL184:
+	ldr	r2, .L143+40
+	mov	r0, r6
+.LVL180:
 	.loc 1 363 0
 	str	r3, [r7, #20]
-	ldr	r3, [r7, #104]
+	ldr	r3, [r7, #100]
 	str	r3, [r7, #16]
-	ldr	r3, [r7, #128]
+	ldr	r3, [r7, #124]
 	str	r3, [r7, #12]
-	ldr	r3, [r7, #108]
+	ldr	r3, [r7, #104]
 	str	r3, [r7, #8]
 	.loc 1 365 0
 	movs	r3, #0
 	bl	fdt_getprop
-.LVL185:
+.LVL181:
 	.loc 1 366 0
 	movs	r3, #0
 	.loc 1 365 0
 	str	r0, [r7, #4]
 	.loc 1 366 0
-	ldr	r2, .L158+52
-	mov	r1, r8
-	mov	r0, r5
+	ldr	r2, .L143+44
+	mov	r1, fp
+	mov	r0, r6
 	bl	fdt_getprop
-.LVL186:
+.LVL182:
 	.loc 1 363 0
 	str	r0, [sp, #12]
-	mov	r1, fp
+	mov	r1, r8
 	ldr	r3, [r7, #4]
 	str	r3, [sp, #8]
 	ldr	r3, [r7, #8]
@@ -1371,322 +1304,313 @@ spl_load_simple_fit:
 	ldr	r2, [r7, #20]
 	ldr	r0, [r7, #24]
 	bl	fdt_record_loadable
-.LVL187:
-.L113:
+.LVL183:
+.L104:
 .LBE90:
 .LBE89:
 .LBE86:
 	.loc 1 706 0
-	add	fp, fp, #1
-.LVL188:
-	b	.L110
-.LVL189:
-.L104:
+	add	r8, r8, #1
+.LVL184:
+	b	.L101
+.LVL185:
+.L95:
 	.loc 1 752 0
 	ldr	r3, [r4, #12]
 	subs	r3, r3, #1
 	adds	r3, r3, #3
-	bls	.L112
+	bls	.L103
 	.loc 1 753 0
 	ldr	r3, [r4, #8]
 	str	r3, [r4, #12]
-.L112:
-.LVL190:
-.LBE83:
-.LBE82:
-.LBB92:
-.LBB93:
+.L103:
+.LVL186:
+.LBE91:
+.LBE93:
+.LBB94:
+.LBB95:
 	.loc 1 454 0
-	ldr	r3, .L158+56
+	ldr	r3, .L143+48
 	.loc 1 444 0
-	str	sp, [r7, #20]
+	str	sp, [r7, #24]
 	.loc 1 454 0
 	ldm	r3, {r0, r1, r2}
-	add	r3, r7, #40
+	add	r3, r7, #36
 	stm	r3, {r0, r1, r2}
-.LVL191:
+.LVL187:
 	.loc 1 456 0
-	ldr	r3, [r6, #8]
+	ldr	r3, [r5, #8]
 	adds	r3, r3, #7
 	bic	r3, r3, #7
 	sub	sp, sp, r3
+.LVL188:
 	.loc 1 463 0
 	ldr	r3, [r4, #28]
 	.loc 1 456 0
 	add	r8, sp, #16
-.LVL192:
+.LVL189:
 	.loc 1 463 0
 	cmp	r3, #2
-	bne	.L126
-.LVL193:
+	bne	.L115
+.LVL190:
 	.loc 1 470 0
-	mov	r1, r6
+	mov	r1, r5
 	mov	r0, r4
 	bl	spl_kernel_partition
-.LVL194:
+.LVL191:
 	.loc 1 471 0
-	add	r2, r7, #96
+	add	r2, r7, #92
 	mov	r1, r0
-	ldr	r0, [r6]
-.LVL195:
+	ldr	r0, [r5]
+.LVL192:
 	bl	part_get_info_by_name
-.LVL196:
+.LVL193:
 	cmp	r0, #0
-	bgt	.L114
+	bgt	.L105
 	.loc 1 472 0
-	ldr	r1, .L158+60
-	ldr	r0, .L158+64
-.L155:
+	ldr	r1, .L143+52
+	ldr	r0, .L143+56
+.L140:
 	.loc 1 485 0
 	bl	printf
-.LVL197:
-.L156:
+.LVL194:
+.L141:
 	.loc 1 486 0
-	mvn	fp, #21
-.LVL198:
-.L115:
-	ldr	sp, [r7, #20]
-.LVL199:
-.L88:
-.LBE93:
-.LBE92:
-	.loc 1 792 0
-	mov	r0, fp
-	adds	r7, r7, #216
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-	mov	sp, r7
-	.cfi_def_cfa_register 13
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL200:
-.L114:
-	.cfi_restore_state
-.LBB95:
-.LBB94:
-	.loc 1 475 0
-	ldr	r3, [r7, #96]
-	.loc 1 479 0
-	movs	r2, #1
-	ldr	r5, [r6, #16]
-	mov	r0, r6
+	mvn	r3, #21
+.LVL195:
+.L106:
+.LBE95:
+.LBE94:
+	.loc 1 787 0
+	mov	r0, r3
+.LBB98:
+.LBB96:
+	ldr	sp, [r7, #24]
+.LVL196:
+.LBE96:
+.LBE98:
+	b	.L80
+.LVL197:
+.L105:
+.LBB99:
+.LBB97:
 	.loc 1 475 0
-	str	r3, [r7, #28]
-.LVL201:
+	ldr	r10, [r7, #92]
+.LVL198:
 	.loc 1 479 0
 	mov	r3, r8
-.LVL202:
-	ldr	r1, [r7, #28]
-	blx	r5
-.LVL203:
+	ldr	r6, [r5, #16]
+	movs	r2, #1
+	mov	r0, r5
+	mov	r1, r10
+	blx	r6
+.LVL199:
 	cmp	r0, #1
-	bne	.L128
-.LVL204:
+	bne	.L117
+.LVL200:
 	ldr	r3, [r8]
 	.loc 1 484 0
-	ldr	r2, .L158+8
+	ldr	r2, [r7]
 	rev	r3, r3
-.LVL205:
+.LVL201:
 	cmp	r3, r2
-	beq	.L116
+	beq	.L107
 	.loc 1 485 0
-	ldr	r1, .L158+60
-	ldr	r0, .L158+68
-	b	.L155
-.L159:
-	.align	2
-.L158:
-	.word	.LC15
-	.word	.LC16
-	.word	-804389139
-	.word	.LC17
-	.word	.LC18
-	.word	.LC19
-	.word	.LC20
-	.word	.LC21
-	.word	.LC22
-	.word	.LC23
-	.word	.LC24
-	.word	.LC25
-	.word	.LC26
-	.word	.LC27
-	.word	.LANCHOR1
-	.word	.LANCHOR0
-	.word	.LC28
-	.word	.LC29
-.L116:
+	ldr	r1, .L143+52
+	ldr	r0, .L143+60
+	b	.L140
+.L107:
 	.loc 1 489 0
 	mov	r2, r8
-	add	r3, r7, #36
-	ldr	r1, [r7, #28]
-	mov	r0, r6
+	add	r3, r7, #32
+	mov	r1, r10
+	mov	r0, r5
 	bl	spl_fit_load_blob
-.LVL206:
+.LVL202:
 	.loc 1 490 0
 	mov	r8, r0
-.LVL207:
+.LVL203:
 	cmp	r0, #0
-	beq	.L129
+	beq	.L118
 	.loc 1 499 0
 	movs	r1, #0
 	bl	fit_conf_get_node
-.LVL208:
+.LVL204:
 	.loc 1 500 0
 	subs	r1, r0, #0
-	bgt	.L117
+	bgt	.L108
 	.loc 1 501 0
-	ldr	r0, .L160
-.LVL209:
+	ldr	r0, .L143+12
+.LVL205:
 	bl	printf
-.LVL210:
-	b	.L156
-.LVL211:
-.L117:
+.LVL206:
+	b	.L141
+.LVL207:
+.L108:
 	.loc 1 505 0
 	mov	r0, r8
-.LVL212:
+.LVL208:
 	bl	fit_config_verify
-.LVL213:
+.LVL209:
 	.loc 1 506 0
-	mov	fp, r0
-	cbz	r0, .L118
+	cbz	r0, .L109
 	.loc 1 507 0
 	mov	r1, r0
-	ldr	r0, .L160+4
-.LVL214:
+	str	r0, [r7, #28]
+.LVL210:
+	ldr	r0, .L143+16
+.LVL211:
 	bl	printf
-.LVL215:
-	b	.L115
-.LVL216:
-.L118:
+.LVL212:
+.L119:
+	.loc 1 513 0
+	ldr	r3, [r7, #28]
+	b	.L106
+.L144:
+	.align	2
+.L143:
+	.word	-804389139
+	.word	.LC14
+	.word	.LC15
+	.word	.LC16
+	.word	.LC17
+	.word	.LC18
+	.word	.LC19
+	.word	.LC20
+	.word	.LC21
+	.word	.LC22
+	.word	.LC23
+	.word	.LC24
+	.word	.LANCHOR1
+	.word	.LANCHOR0
+	.word	.LC25
+	.word	.LC26
+.LVL213:
+.L109:
+	str	r0, [r7, #20]
 	.loc 1 510 0
-	ldr	r0, .L160+8
-.LVL217:
+	ldr	r0, .L145
+.LVL214:
 	bl	printf
-.LVL218:
+.LVL215:
 	.loc 1 512 0
-	ldr	r1, .L160+12
+	ldr	r1, .L145+4
 	mov	r0, r8
 	bl	fdt_path_offset
-.LVL219:
+.LVL216:
 	.loc 1 513 0
 	subs	r3, r0, #0
-	str	r3, [r7, #24]
-	blt	.L130
-	mov	r5, fp
-.LVL220:
-.L123:
+	str	r3, [r7, #28]
+.LVL217:
+	blt	.L119
+	ldr	r3, [r7, #20]
+	mov	r6, r3
+.LVL218:
+.L114:
 	.loc 1 520 0
-	add	r3, r7, #40
-	ldr	r1, [r7, #24]
-	ldr	r10, [r3, r5, lsl #2]
+	add	r3, r7, #36
+	ldr	r1, [r7, #28]
+	ldr	fp, [r3, r6, lsl #2]
 	mov	r0, r8
 	movs	r3, #0
-	mov	r2, r10
+	mov	r2, fp
 	bl	spl_fit_get_image_node
-.LVL221:
+.LVL219:
 	.loc 1 522 0
 	cmp	r0, #0
-	blt	.L120
+	blt	.L111
 	.loc 1 527 0
-	add	r3, r7, #52
+	add	r3, r7, #48
 	mov	r2, r8
 	stm	sp, {r0, r3}
-	mov	r0, r6
-.LVL222:
-	ldr	r3, [r7, #36]
-	ldr	r1, [r7, #28]
+	mov	r1, r10
+	ldr	r3, [r7, #32]
+	mov	r0, r5
+.LVL220:
 	bl	spl_load_fit_image
-.LVL223:
+.LVL221:
 	.loc 1 529 0
-	mov	fp, r0
+	mov	r3, r0
 	cmp	r0, #0
-	bne	.L115
+	bne	.L106
 	.loc 1 533 0
-	ldr	r1, .L160+16
-	mov	r0, r10
-.LVL224:
+	ldr	r1, .L145+8
+	mov	r0, fp
+.LVL222:
 	bl	strcmp
-.LVL225:
-	cbnz	r0, .L121
+.LVL223:
+	cbnz	r0, .L112
 	.loc 1 534 0
-	ldr	r3, [r7, #60]
+	ldr	r3, [r7, #56]
 	str	r3, [r4, #20]
-.L120:
+.L111:
 	.loc 1 519 0
-	adds	r5, r5, #1
-.LVL226:
-	cmp	r5, #3
-	bne	.L123
-.LVL227:
-.L126:
+	adds	r6, r6, #1
+.LVL224:
+	cmp	r6, #3
+	bne	.L114
+.LVL225:
+.L115:
 	.loc 1 554 0
-	mov	fp, #0
-	b	.L115
-.LVL228:
-.L121:
+	movs	r3, #0
+	b	.L106
+.LVL226:
+.L112:
 	.loc 1 535 0
-	ldr	r1, .L160+20
-	mov	r0, r10
+	ldr	r1, .L145+12
+	mov	r0, fp
 	bl	strcmp
-.LVL229:
+.LVL227:
 	cmp	r0, #0
-	bne	.L120
+	bne	.L111
 	.loc 1 537 0
-	ldr	r3, [r7, #60]
+	ldr	r3, [r7, #56]
 	str	r3, [r4, #16]
-	b	.L120
-.LVL230:
-.L128:
+	b	.L111
+.LVL228:
+.L117:
 	.loc 1 481 0
-	mvn	fp, #4
-	b	.L115
-.LVL231:
-.L129:
+	mvn	r3, #4
+	b	.L106
+.LVL229:
+.L118:
 	.loc 1 492 0
-	mvn	fp, #18
-	b	.L115
-.LVL232:
-.L130:
-	.loc 1 513 0
-	ldr	fp, [r7, #24]
-.LVL233:
-	b	.L115
-.LVL234:
-.L92:
-.LBE94:
-.LBE95:
-.LBB96:
-.LBB91:
+	mvn	r3, #18
+	b	.L106
+.LVL230:
+.L83:
+.LBE97:
+.LBE99:
+.LBB100:
+.LBB92:
 	.loc 1 572 0
 	mov	r0, #-1
-	b	.L94
-.L161:
+.LVL231:
+	b	.L80
+.L146:
 	.align	2
-.L160:
-	.word	.LC19
-	.word	.LC20
-	.word	.LC21
+.L145:
 	.word	.LC18
+	.word	.LC15
 	.word	.LC0
 	.word	.LC1
-.LBE91:
-.LBE96:
+.LBE92:
+.LBE100:
 	.cfi_endproc
-.LFE216:
+.LFE220:
 	.size	spl_load_simple_fit, .-spl_load_simple_fit
 	.section	.rodata
 	.align	2
 	.set	.LANCHOR1,. + 0
-.LC30:
+.LC27:
 	.word	.LC0
 	.word	.LC1
 	.word	.LC2
-	.section	.rodata.__func__.8769,"a",%progbits
+	.section	.rodata.__func__.8780,"a",%progbits
 	.set	.LANCHOR0,. + 0
-	.type	__func__.8769, %object
-	.size	__func__.8769, 20
-__func__.8769:
+	.type	__func__.8780, %object
+	.size	__func__.8780, 20
+__func__.8780:
 	.ascii	"spl_load_kernel_fit\000"
 	.section	.rodata.spl_fit_get_image_name.isra.0.str1.1,"aMS",%progbits,1
 .LC4:
@@ -1696,53 +1620,47 @@ __func__.8769:
 .LC6:
 	.ascii	"   %s\012\000"
 	.section	.rodata.spl_kernel_partition.str1.1,"aMS",%progbits,1
-.LC14:
+.LC13:
 	.ascii	"boot\000"
 	.section	.rodata.spl_load_fit_image.str1.1,"aMS",%progbits,1
 .LC7:
-	.ascii	"## Preload the image OK.\012\000"
-.LC8:
 	.ascii	"Cannot get image data/size\012\000"
-.LC9:
+.LC8:
 	.ascii	"compression\000"
-.LC10:
+.LC9:
 	.ascii	"## Checking %s 0x%08lx (%s @0x%08lx) ... \000"
-.LC11:
+.LC10:
 	.ascii	"## Checking %s 0x%08lx ... \000"
-.LC12:
+.LC11:
 	.ascii	"OK\012\000"
-.LC13:
+.LC12:
 	.ascii	"entry\000"
 	.section	.rodata.spl_load_simple_fit.str1.1,"aMS",%progbits,1
-.LC15:
-	.ascii	"Trying fit image at 0x%lx sector\012\000"
-.LC16:
-	.ascii	"IO error\012\000"
-.LC17:
+.LC14:
 	.ascii	"Not fit magic\012\000"
-.LC18:
+.LC15:
 	.ascii	"/images\000"
-.LC19:
+.LC16:
 	.ascii	"No default config node\012\000"
-.LC20:
+.LC17:
 	.ascii	"fit verify configure failed, ret=%d\012\000"
-.LC21:
+.LC18:
 	.ascii	"\012\000"
-.LC22:
+.LC19:
 	.ascii	"standalone\000"
-.LC23:
+.LC20:
 	.ascii	"Start standalone fail, ret = %d\012\000"
-.LC24:
+.LC21:
 	.ascii	"firmware\000"
-.LC25:
+.LC22:
 	.ascii	"loadables\000"
-.LC26:
+.LC23:
 	.ascii	"type\000"
-.LC27:
+.LC24:
 	.ascii	"os\000"
-.LC28:
+.LC25:
 	.ascii	"%s: no partition\012\000"
-.LC29:
+.LC26:
 	.ascii	"%s: Not fit magic\012\000"
 	.section	.rodata.str1.1,"aMS",%progbits,1
 .LC0:
@@ -1782,16 +1700,16 @@ __func__.8769:
 	.file 29 "include/stdio.h"
 	.section	.debug_info,"",%progbits
 .Ldebug_info0:
-	.4byte	0x27ac
+	.4byte	0x2836
 	.2byte	0x4
 	.4byte	.Ldebug_abbrev0
 	.byte	0x4
 	.uleb128 0x1
-	.4byte	.LASF398
+	.4byte	.LASF408
 	.byte	0xc
-	.4byte	.LASF399
-	.4byte	.LASF400
-	.4byte	.Ldebug_ranges0+0x88
+	.4byte	.LASF409
+	.4byte	.LASF410
+	.4byte	.Ldebug_ranges0+0x98
 	.4byte	0
 	.4byte	.Ldebug_line0
 	.uleb128 0x2
@@ -2233,7 +2151,7 @@ __func__.8769:
 	.byte	0x8
 	.byte	0
 	.uleb128 0x17
-	.4byte	.LASF401
+	.4byte	.LASF86
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0x3a3
@@ -2292,7 +2210,7 @@ __func__.8769:
 	.4byte	0x405
 	.uleb128 0x14
 	.4byte	.LASF76
-	.byte	0x78
+	.byte	0x9c
 	.byte	0xc
 	.byte	0x39
 	.4byte	0x48c
@@ -2341,8 +2259,8 @@ __func__.8769:
 	.uleb128 0x15
 	.4byte	.LASF81
 	.byte	0xc
-	.byte	0x47
-	.4byte	0x25
+	.byte	0x44
+	.4byte	0x49c
 	.byte	0x75
 	.byte	0
 	.uleb128 0xc
@@ -2380,10 +2298,10 @@ __func__.8769:
 	.byte	0x4
 	.4byte	0x294
 	.uleb128 0x1b
-	.2byte	0xa0c
+	.2byte	0xa10
 	.byte	0xd
 	.byte	0x13
-	.4byte	0x51f
+	.4byte	0x52c
 	.uleb128 0x15
 	.4byte	.LASF78
 	.byte	0xd
@@ -2406,56 +2324,67 @@ __func__.8769:
 	.4byte	.LASF77
 	.byte	0xd
 	.byte	0x17
-	.4byte	0x51f
+	.4byte	0x52c
 	.byte	0xc
 	.uleb128 0x1c
 	.4byte	.LASF85
 	.byte	0xd
 	.byte	0x18
-	.4byte	0x530
+	.4byte	0x53d
 	.2byte	0x80c
+	.uleb128 0x1d
+	.ascii	"mtd\000"
+	.byte	0xd
+	.byte	0x31
+	.4byte	0x553
+	.2byte	0xa0c
 	.byte	0
 	.uleb128 0xc
 	.4byte	0x122
-	.4byte	0x530
-	.uleb128 0x1d
+	.4byte	0x53d
+	.uleb128 0x1e
 	.4byte	0xcb
 	.2byte	0x1ff
 	.byte	0
 	.uleb128 0xc
 	.4byte	0x25
-	.4byte	0x541
-	.uleb128 0x1d
+	.4byte	0x54e
+	.uleb128 0x1e
 	.4byte	0xcb
 	.2byte	0x1ff
 	.byte	0
+	.uleb128 0x17
+	.4byte	.LASF87
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x54e
 	.uleb128 0x2
-	.4byte	.LASF86
+	.4byte	.LASF88
 	.byte	0xd
 	.byte	0x37
 	.4byte	0x4d8
 	.uleb128 0xc
-	.4byte	0x541
-	.4byte	0x557
+	.4byte	0x559
+	.4byte	0x56f
 	.uleb128 0xe
 	.byte	0
 	.uleb128 0x4
-	.4byte	.LASF87
+	.4byte	.LASF89
 	.byte	0xd
 	.byte	0x39
-	.4byte	0x54c
+	.4byte	0x564
 	.uleb128 0x3
 	.byte	0x8
 	.byte	0x4
-	.4byte	.LASF88
+	.4byte	.LASF90
 	.uleb128 0x14
-	.4byte	.LASF89
+	.4byte	.LASF91
 	.byte	0x8
 	.byte	0xe
 	.byte	0x10
-	.4byte	0x58e
+	.4byte	0x5a6
 	.uleb128 0x15
-	.4byte	.LASF90
+	.4byte	.LASF92
 	.byte	0xe
 	.byte	0x11
 	.4byte	0xb5
@@ -2468,11 +2397,11 @@ __func__.8769:
 	.byte	0x4
 	.byte	0
 	.uleb128 0x14
-	.4byte	.LASF91
+	.4byte	.LASF93
 	.byte	0x90
 	.byte	0xe
 	.byte	0x15
-	.4byte	0x5bf
+	.4byte	0x5d7
 	.uleb128 0xb
 	.ascii	"cnt\000"
 	.byte	0xe
@@ -2486,48 +2415,48 @@ __func__.8769:
 	.4byte	0xc0
 	.byte	0x4
 	.uleb128 0x15
-	.4byte	.LASF92
+	.4byte	.LASF94
 	.byte	0xe
 	.byte	0x18
-	.4byte	0x5bf
+	.4byte	0x5d7
 	.byte	0x8
 	.byte	0
 	.uleb128 0xc
-	.4byte	0x569
-	.4byte	0x5cf
+	.4byte	0x581
+	.4byte	0x5e7
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x10
 	.byte	0
-	.uleb128 0x1e
+	.uleb128 0x1f
 	.ascii	"lmb\000"
 	.2byte	0x120
 	.byte	0xe
 	.byte	0x1b
-	.4byte	0x5f5
+	.4byte	0x60d
 	.uleb128 0x15
-	.4byte	.LASF93
+	.4byte	.LASF95
 	.byte	0xe
 	.byte	0x1c
-	.4byte	0x58e
+	.4byte	0x5a6
 	.byte	0
 	.uleb128 0x15
-	.4byte	.LASF94
+	.4byte	.LASF96
 	.byte	0xe
 	.byte	0x1d
-	.4byte	0x58e
+	.4byte	0x5a6
 	.byte	0x90
 	.byte	0
-	.uleb128 0x1f
+	.uleb128 0x20
 	.ascii	"lmb\000"
 	.byte	0xe
 	.byte	0x20
-	.4byte	0x5cf
+	.4byte	0x5e7
 	.uleb128 0xa
 	.byte	0x10
 	.byte	0xf
 	.byte	0x5d
-	.4byte	0x621
+	.4byte	0x639
 	.uleb128 0x15
 	.4byte	.LASF77
 	.byte	0xf
@@ -2542,925 +2471,925 @@ __func__.8769:
 	.byte	0x8
 	.byte	0
 	.uleb128 0x14
-	.4byte	.LASF95
+	.4byte	.LASF97
 	.byte	0x70
 	.byte	0xf
 	.byte	0x1b
-	.4byte	0x71e
+	.4byte	0x736
 	.uleb128 0x15
-	.4byte	.LASF96
+	.4byte	.LASF98
 	.byte	0xf
 	.byte	0x1c
 	.4byte	0x37
 	.byte	0
 	.uleb128 0x15
-	.4byte	.LASF97
+	.4byte	.LASF99
 	.byte	0xf
 	.byte	0x1d
 	.4byte	0xc0
 	.byte	0x4
 	.uleb128 0x15
-	.4byte	.LASF98
+	.4byte	.LASF100
 	.byte	0xf
 	.byte	0x1e
 	.4byte	0x37
 	.byte	0x8
 	.uleb128 0x15
-	.4byte	.LASF99
+	.4byte	.LASF101
 	.byte	0xf
 	.byte	0x1f
 	.4byte	0x37
 	.byte	0xc
 	.uleb128 0x15
-	.4byte	.LASF100
+	.4byte	.LASF102
 	.byte	0xf
 	.byte	0x20
 	.4byte	0x37
 	.byte	0x10
 	.uleb128 0x15
-	.4byte	.LASF101
+	.4byte	.LASF103
 	.byte	0xf
 	.byte	0x21
 	.4byte	0x37
 	.byte	0x14
 	.uleb128 0x15
-	.4byte	.LASF102
+	.4byte	.LASF104
 	.byte	0xf
 	.byte	0x22
 	.4byte	0x37
 	.byte	0x18
 	.uleb128 0x15
-	.4byte	.LASF103
+	.4byte	.LASF105
 	.byte	0xf
 	.byte	0x24
 	.4byte	0x37
 	.byte	0x1c
 	.uleb128 0x15
-	.4byte	.LASF104
+	.4byte	.LASF106
 	.byte	0xf
 	.byte	0x25
 	.4byte	0x37
 	.byte	0x20
 	.uleb128 0x15
-	.4byte	.LASF105
+	.4byte	.LASF107
 	.byte	0xf
 	.byte	0x26
 	.4byte	0x37
 	.byte	0x24
 	.uleb128 0x15
-	.4byte	.LASF106
+	.4byte	.LASF108
 	.byte	0xf
 	.byte	0x31
 	.4byte	0x37
 	.byte	0x28
 	.uleb128 0x15
-	.4byte	.LASF107
+	.4byte	.LASF109
 	.byte	0xf
 	.byte	0x32
 	.4byte	0x37
 	.byte	0x2c
 	.uleb128 0x15
-	.4byte	.LASF108
+	.4byte	.LASF110
 	.byte	0xf
 	.byte	0x33
 	.4byte	0x3cb
 	.byte	0x30
 	.uleb128 0x15
-	.4byte	.LASF109
+	.4byte	.LASF111
 	.byte	0xf
 	.byte	0x34
 	.4byte	0x3e
 	.byte	0x36
 	.uleb128 0x15
-	.4byte	.LASF110
+	.4byte	.LASF112
 	.byte	0xf
 	.byte	0x35
 	.4byte	0x37
 	.byte	0x38
 	.uleb128 0x15
-	.4byte	.LASF111
+	.4byte	.LASF113
 	.byte	0xf
 	.byte	0x36
 	.4byte	0x37
 	.byte	0x3c
 	.uleb128 0x15
-	.4byte	.LASF112
+	.4byte	.LASF114
 	.byte	0xf
 	.byte	0x57
 	.4byte	0x122
 	.byte	0x40
 	.uleb128 0x15
-	.4byte	.LASF113
+	.4byte	.LASF115
 	.byte	0xf
 	.byte	0x58
 	.4byte	0x122
 	.byte	0x44
 	.uleb128 0x15
-	.4byte	.LASF114
+	.4byte	.LASF116
 	.byte	0xf
 	.byte	0x5b
 	.4byte	0x7b
 	.byte	0x48
 	.uleb128 0x15
-	.4byte	.LASF115
+	.4byte	.LASF117
 	.byte	0xf
 	.byte	0x60
-	.4byte	0x71e
+	.4byte	0x736
 	.byte	0x50
 	.byte	0
 	.uleb128 0xc
-	.4byte	0x600
-	.4byte	0x72e
+	.4byte	0x618
+	.4byte	0x746
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x1
 	.byte	0
 	.uleb128 0x2
-	.4byte	.LASF116
+	.4byte	.LASF118
 	.byte	0xf
 	.byte	0x62
-	.4byte	0x621
+	.4byte	0x639
 	.uleb128 0x4
-	.4byte	.LASF117
+	.4byte	.LASF119
 	.byte	0x10
 	.byte	0x13
 	.4byte	0x122
 	.uleb128 0x4
-	.4byte	.LASF118
+	.4byte	.LASF120
 	.byte	0x10
 	.byte	0x14
 	.4byte	0x122
 	.uleb128 0x4
-	.4byte	.LASF119
+	.4byte	.LASF121
 	.byte	0x10
 	.byte	0x15
 	.4byte	0x122
 	.uleb128 0x4
-	.4byte	.LASF120
+	.4byte	.LASF122
 	.byte	0x10
 	.byte	0x16
 	.4byte	0x122
 	.uleb128 0x4
-	.4byte	.LASF121
+	.4byte	.LASF123
 	.byte	0x10
 	.byte	0x17
 	.4byte	0x122
 	.uleb128 0x4
-	.4byte	.LASF122
+	.4byte	.LASF124
 	.byte	0x10
 	.byte	0x18
 	.4byte	0x122
 	.uleb128 0x4
-	.4byte	.LASF123
+	.4byte	.LASF125
 	.byte	0x10
 	.byte	0x19
 	.4byte	0x122
 	.uleb128 0x2
-	.4byte	.LASF124
+	.4byte	.LASF126
 	.byte	0x11
 	.byte	0x11
 	.4byte	0x148
 	.uleb128 0x14
-	.4byte	.LASF125
+	.4byte	.LASF127
 	.byte	0x28
 	.byte	0x12
 	.byte	0x39
-	.4byte	0x816
+	.4byte	0x82e
 	.uleb128 0x15
-	.4byte	.LASF126
+	.4byte	.LASF128
 	.byte	0x12
 	.byte	0x3a
-	.4byte	0x786
+	.4byte	0x79e
 	.byte	0
 	.uleb128 0x15
-	.4byte	.LASF127
+	.4byte	.LASF129
 	.byte	0x12
 	.byte	0x3b
-	.4byte	0x786
+	.4byte	0x79e
 	.byte	0x4
 	.uleb128 0x15
-	.4byte	.LASF128
+	.4byte	.LASF130
 	.byte	0x12
 	.byte	0x3c
-	.4byte	0x786
+	.4byte	0x79e
 	.byte	0x8
 	.uleb128 0x15
-	.4byte	.LASF129
+	.4byte	.LASF131
 	.byte	0x12
 	.byte	0x3d
-	.4byte	0x786
+	.4byte	0x79e
 	.byte	0xc
 	.uleb128 0x15
-	.4byte	.LASF130
+	.4byte	.LASF132
 	.byte	0x12
 	.byte	0x3e
-	.4byte	0x786
+	.4byte	0x79e
 	.byte	0x10
 	.uleb128 0x15
-	.4byte	.LASF131
+	.4byte	.LASF133
 	.byte	0x12
 	.byte	0x3f
-	.4byte	0x786
+	.4byte	0x79e
 	.byte	0x14
 	.uleb128 0x15
-	.4byte	.LASF132
+	.4byte	.LASF134
 	.byte	0x12
 	.byte	0x40
-	.4byte	0x786
+	.4byte	0x79e
 	.byte	0x18
 	.uleb128 0x15
-	.4byte	.LASF133
+	.4byte	.LASF135
 	.byte	0x12
 	.byte	0x43
-	.4byte	0x786
+	.4byte	0x79e
 	.byte	0x1c
 	.uleb128 0x15
-	.4byte	.LASF134
+	.4byte	.LASF136
 	.byte	0x12
 	.byte	0x46
-	.4byte	0x786
+	.4byte	0x79e
 	.byte	0x20
 	.uleb128 0x15
-	.4byte	.LASF135
+	.4byte	.LASF137
 	.byte	0x12
 	.byte	0x49
-	.4byte	0x786
+	.4byte	0x79e
 	.byte	0x24
 	.byte	0
 	.uleb128 0xf
-	.4byte	.LASF136
+	.4byte	.LASF138
 	.byte	0x13
 	.2byte	0x136
-	.4byte	0x822
+	.4byte	0x83a
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x791
-	.uleb128 0x20
+	.4byte	0x7a9
+	.uleb128 0x21
 	.byte	0x4
 	.4byte	0x7b
 	.byte	0x2
 	.byte	0x83
-	.4byte	0x8dd
+	.4byte	0x8f5
 	.uleb128 0x11
-	.4byte	.LASF137
+	.4byte	.LASF139
 	.byte	0
 	.uleb128 0x11
-	.4byte	.LASF138
+	.4byte	.LASF140
 	.byte	0x1
 	.uleb128 0x11
-	.4byte	.LASF139
+	.4byte	.LASF141
 	.byte	0x2
 	.uleb128 0x11
-	.4byte	.LASF140
+	.4byte	.LASF142
 	.byte	0x3
 	.uleb128 0x11
-	.4byte	.LASF141
+	.4byte	.LASF143
 	.byte	0x4
 	.uleb128 0x11
-	.4byte	.LASF142
+	.4byte	.LASF144
 	.byte	0x5
 	.uleb128 0x11
-	.4byte	.LASF143
+	.4byte	.LASF145
 	.byte	0x6
 	.uleb128 0x11
-	.4byte	.LASF144
+	.4byte	.LASF146
 	.byte	0x7
 	.uleb128 0x11
-	.4byte	.LASF145
+	.4byte	.LASF147
 	.byte	0x8
 	.uleb128 0x11
-	.4byte	.LASF146
+	.4byte	.LASF148
 	.byte	0x9
 	.uleb128 0x11
-	.4byte	.LASF147
+	.4byte	.LASF149
 	.byte	0xa
 	.uleb128 0x11
-	.4byte	.LASF148
+	.4byte	.LASF150
 	.byte	0xb
 	.uleb128 0x11
-	.4byte	.LASF149
+	.4byte	.LASF151
 	.byte	0xc
 	.uleb128 0x11
-	.4byte	.LASF150
+	.4byte	.LASF152
 	.byte	0xd
 	.uleb128 0x11
-	.4byte	.LASF151
+	.4byte	.LASF153
 	.byte	0xe
 	.uleb128 0x11
-	.4byte	.LASF152
+	.4byte	.LASF154
 	.byte	0xf
 	.uleb128 0x11
-	.4byte	.LASF153
+	.4byte	.LASF155
 	.byte	0x10
 	.uleb128 0x11
-	.4byte	.LASF154
+	.4byte	.LASF156
 	.byte	0x11
 	.uleb128 0x11
-	.4byte	.LASF155
+	.4byte	.LASF157
 	.byte	0x12
 	.uleb128 0x11
-	.4byte	.LASF156
+	.4byte	.LASF158
 	.byte	0x13
 	.uleb128 0x11
-	.4byte	.LASF157
+	.4byte	.LASF159
 	.byte	0x14
 	.uleb128 0x11
-	.4byte	.LASF158
+	.4byte	.LASF160
 	.byte	0x15
 	.uleb128 0x11
-	.4byte	.LASF159
+	.4byte	.LASF161
 	.byte	0x16
 	.uleb128 0x11
-	.4byte	.LASF160
+	.4byte	.LASF162
 	.byte	0x17
 	.uleb128 0x11
-	.4byte	.LASF161
+	.4byte	.LASF163
 	.byte	0x18
 	.uleb128 0x11
-	.4byte	.LASF162
+	.4byte	.LASF164
 	.byte	0x19
 	.uleb128 0x11
-	.4byte	.LASF163
+	.4byte	.LASF165
 	.byte	0x1a
 	.uleb128 0x11
-	.4byte	.LASF164
+	.4byte	.LASF166
 	.byte	0x1b
 	.byte	0
-	.uleb128 0x20
+	.uleb128 0x21
 	.byte	0x4
 	.4byte	0x7b
 	.byte	0x2
 	.byte	0xf3
-	.4byte	0x9bc
+	.4byte	0x9d4
 	.uleb128 0x11
-	.4byte	.LASF165
+	.4byte	.LASF167
 	.byte	0
 	.uleb128 0x11
-	.4byte	.LASF166
+	.4byte	.LASF168
 	.byte	0x1
 	.uleb128 0x11
-	.4byte	.LASF167
+	.4byte	.LASF169
 	.byte	0x2
 	.uleb128 0x11
-	.4byte	.LASF168
+	.4byte	.LASF170
 	.byte	0x3
 	.uleb128 0x11
-	.4byte	.LASF169
+	.4byte	.LASF171
 	.byte	0x4
 	.uleb128 0x11
-	.4byte	.LASF170
+	.4byte	.LASF172
 	.byte	0x5
 	.uleb128 0x11
-	.4byte	.LASF171
+	.4byte	.LASF173
 	.byte	0x6
 	.uleb128 0x11
-	.4byte	.LASF172
+	.4byte	.LASF174
 	.byte	0x7
 	.uleb128 0x11
-	.4byte	.LASF173
+	.4byte	.LASF175
 	.byte	0x8
 	.uleb128 0x11
-	.4byte	.LASF174
+	.4byte	.LASF176
 	.byte	0x9
 	.uleb128 0x11
-	.4byte	.LASF175
+	.4byte	.LASF177
 	.byte	0xa
 	.uleb128 0x11
-	.4byte	.LASF176
+	.4byte	.LASF178
 	.byte	0xb
 	.uleb128 0x11
-	.4byte	.LASF177
+	.4byte	.LASF179
 	.byte	0xc
 	.uleb128 0x11
-	.4byte	.LASF178
+	.4byte	.LASF180
 	.byte	0xd
 	.uleb128 0x11
-	.4byte	.LASF179
+	.4byte	.LASF181
 	.byte	0xe
 	.uleb128 0x11
-	.4byte	.LASF180
+	.4byte	.LASF182
 	.byte	0xf
 	.uleb128 0x11
-	.4byte	.LASF181
+	.4byte	.LASF183
 	.byte	0x10
 	.uleb128 0x11
-	.4byte	.LASF182
+	.4byte	.LASF184
 	.byte	0x11
 	.uleb128 0x11
-	.4byte	.LASF183
+	.4byte	.LASF185
 	.byte	0x12
 	.uleb128 0x11
-	.4byte	.LASF184
+	.4byte	.LASF186
 	.byte	0x13
 	.uleb128 0x11
-	.4byte	.LASF185
+	.4byte	.LASF187
 	.byte	0x14
 	.uleb128 0x11
-	.4byte	.LASF186
+	.4byte	.LASF188
 	.byte	0x15
 	.uleb128 0x11
-	.4byte	.LASF187
+	.4byte	.LASF189
 	.byte	0x16
 	.uleb128 0x11
-	.4byte	.LASF188
+	.4byte	.LASF190
 	.byte	0x17
 	.uleb128 0x11
-	.4byte	.LASF189
+	.4byte	.LASF191
 	.byte	0x18
 	.uleb128 0x11
-	.4byte	.LASF190
+	.4byte	.LASF192
 	.byte	0x19
 	.uleb128 0x11
-	.4byte	.LASF191
+	.4byte	.LASF193
 	.byte	0x1a
 	.uleb128 0x11
-	.4byte	.LASF192
+	.4byte	.LASF194
 	.byte	0x1b
 	.uleb128 0x11
-	.4byte	.LASF193
+	.4byte	.LASF195
 	.byte	0x1c
 	.uleb128 0x11
-	.4byte	.LASF194
+	.4byte	.LASF196
 	.byte	0x1d
 	.uleb128 0x11
-	.4byte	.LASF195
+	.4byte	.LASF197
 	.byte	0x1e
 	.uleb128 0x11
-	.4byte	.LASF196
+	.4byte	.LASF198
 	.byte	0x1f
 	.uleb128 0x11
-	.4byte	.LASF197
+	.4byte	.LASF199
 	.byte	0x20
 	.uleb128 0x11
-	.4byte	.LASF198
+	.4byte	.LASF200
 	.byte	0x21
 	.uleb128 0x11
-	.4byte	.LASF199
+	.4byte	.LASF201
 	.byte	0x22
 	.byte	0
-	.uleb128 0x21
+	.uleb128 0x22
 	.byte	0x4
 	.4byte	0x7b
 	.byte	0x2
 	.2byte	0x121
-	.4byte	0x9fa
+	.4byte	0xa12
 	.uleb128 0x11
-	.4byte	.LASF200
+	.4byte	.LASF202
 	.byte	0
 	.uleb128 0x11
-	.4byte	.LASF201
+	.4byte	.LASF203
 	.byte	0x1
 	.uleb128 0x11
-	.4byte	.LASF202
+	.4byte	.LASF204
 	.byte	0x2
 	.uleb128 0x11
-	.4byte	.LASF203
+	.4byte	.LASF205
 	.byte	0x3
 	.uleb128 0x11
-	.4byte	.LASF204
+	.4byte	.LASF206
 	.byte	0x4
 	.uleb128 0x11
-	.4byte	.LASF205
+	.4byte	.LASF207
 	.byte	0x5
 	.uleb128 0x11
-	.4byte	.LASF206
+	.4byte	.LASF208
 	.byte	0x6
 	.uleb128 0x11
-	.4byte	.LASF207
+	.4byte	.LASF209
 	.byte	0x7
 	.byte	0
-	.uleb128 0x22
-	.4byte	.LASF208
+	.uleb128 0x23
+	.4byte	.LASF210
 	.byte	0x40
 	.byte	0x2
 	.2byte	0x137
-	.4byte	0xaa4
-	.uleb128 0x23
-	.4byte	.LASF209
+	.4byte	0xabc
+	.uleb128 0x24
+	.4byte	.LASF211
 	.byte	0x2
 	.2byte	0x138
 	.4byte	0x148
 	.byte	0
-	.uleb128 0x23
-	.4byte	.LASF210
+	.uleb128 0x24
+	.4byte	.LASF212
 	.byte	0x2
 	.2byte	0x139
 	.4byte	0x148
 	.byte	0x4
-	.uleb128 0x23
-	.4byte	.LASF211
+	.uleb128 0x24
+	.4byte	.LASF213
 	.byte	0x2
 	.2byte	0x13a
 	.4byte	0x148
 	.byte	0x8
-	.uleb128 0x23
-	.4byte	.LASF212
+	.uleb128 0x24
+	.4byte	.LASF214
 	.byte	0x2
 	.2byte	0x13b
 	.4byte	0x148
 	.byte	0xc
-	.uleb128 0x23
-	.4byte	.LASF213
+	.uleb128 0x24
+	.4byte	.LASF215
 	.byte	0x2
 	.2byte	0x13c
 	.4byte	0x148
 	.byte	0x10
-	.uleb128 0x23
-	.4byte	.LASF214
+	.uleb128 0x24
+	.4byte	.LASF216
 	.byte	0x2
 	.2byte	0x13d
 	.4byte	0x148
 	.byte	0x14
-	.uleb128 0x23
-	.4byte	.LASF215
+	.uleb128 0x24
+	.4byte	.LASF217
 	.byte	0x2
 	.2byte	0x13e
 	.4byte	0x148
 	.byte	0x18
-	.uleb128 0x23
-	.4byte	.LASF216
+	.uleb128 0x24
+	.4byte	.LASF218
 	.byte	0x2
 	.2byte	0x13f
 	.4byte	0x12d
 	.byte	0x1c
-	.uleb128 0x23
-	.4byte	.LASF217
+	.uleb128 0x24
+	.4byte	.LASF219
 	.byte	0x2
 	.2byte	0x140
 	.4byte	0x12d
 	.byte	0x1d
-	.uleb128 0x23
-	.4byte	.LASF218
+	.uleb128 0x24
+	.4byte	.LASF220
 	.byte	0x2
 	.2byte	0x141
 	.4byte	0x12d
 	.byte	0x1e
-	.uleb128 0x23
-	.4byte	.LASF219
+	.uleb128 0x24
+	.4byte	.LASF221
 	.byte	0x2
 	.2byte	0x142
 	.4byte	0x12d
 	.byte	0x1f
-	.uleb128 0x23
-	.4byte	.LASF220
+	.uleb128 0x24
+	.4byte	.LASF222
 	.byte	0x2
 	.2byte	0x143
-	.4byte	0xaa4
+	.4byte	0xabc
 	.byte	0x20
 	.byte	0
 	.uleb128 0xc
 	.4byte	0x12d
-	.4byte	0xab4
+	.4byte	0xacc
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x1f
 	.byte	0
-	.uleb128 0x24
-	.4byte	.LASF221
+	.uleb128 0x25
+	.4byte	.LASF223
 	.byte	0x2
 	.2byte	0x144
-	.4byte	0x9fa
+	.4byte	0xa12
 	.uleb128 0x7
-	.4byte	0xab4
-	.uleb128 0x22
-	.4byte	.LASF222
+	.4byte	0xacc
+	.uleb128 0x23
+	.4byte	.LASF224
 	.byte	0x18
 	.byte	0x2
 	.2byte	0x146
-	.4byte	0xb47
-	.uleb128 0x23
+	.4byte	0xb5f
+	.uleb128 0x24
 	.4byte	.LASF77
 	.byte	0x2
 	.2byte	0x147
 	.4byte	0x122
 	.byte	0
-	.uleb128 0x25
+	.uleb128 0x26
 	.ascii	"end\000"
 	.byte	0x2
 	.2byte	0x147
 	.4byte	0x122
 	.byte	0x4
-	.uleb128 0x23
-	.4byte	.LASF223
+	.uleb128 0x24
+	.4byte	.LASF225
 	.byte	0x2
 	.2byte	0x148
 	.4byte	0x122
 	.byte	0x8
-	.uleb128 0x23
-	.4byte	.LASF224
+	.uleb128 0x24
+	.4byte	.LASF226
 	.byte	0x2
 	.2byte	0x148
 	.4byte	0x122
 	.byte	0xc
-	.uleb128 0x23
-	.4byte	.LASF225
+	.uleb128 0x24
+	.4byte	.LASF227
 	.byte	0x2
 	.2byte	0x149
 	.4byte	0x122
 	.byte	0x10
-	.uleb128 0x23
-	.4byte	.LASF226
+	.uleb128 0x24
+	.4byte	.LASF228
 	.byte	0x2
 	.2byte	0x14a
 	.4byte	0x12d
 	.byte	0x14
-	.uleb128 0x23
+	.uleb128 0x24
 	.4byte	.LASF62
 	.byte	0x2
 	.2byte	0x14a
 	.4byte	0x12d
 	.byte	0x15
-	.uleb128 0x25
+	.uleb128 0x26
 	.ascii	"os\000"
 	.byte	0x2
 	.2byte	0x14a
 	.4byte	0x12d
 	.byte	0x16
-	.uleb128 0x23
-	.4byte	.LASF227
+	.uleb128 0x24
+	.4byte	.LASF229
 	.byte	0x2
 	.2byte	0x14b
 	.4byte	0x12d
 	.byte	0x17
 	.byte	0
-	.uleb128 0x24
-	.4byte	.LASF228
+	.uleb128 0x25
+	.4byte	.LASF230
 	.byte	0x2
 	.2byte	0x14c
-	.4byte	0xac5
-	.uleb128 0x26
-	.4byte	.LASF229
+	.4byte	0xadd
+	.uleb128 0x27
+	.4byte	.LASF231
 	.2byte	0x1e4
 	.byte	0x2
 	.2byte	0x152
-	.4byte	0xce6
-	.uleb128 0x23
-	.4byte	.LASF230
+	.4byte	0xcfe
+	.uleb128 0x24
+	.4byte	.LASF232
 	.byte	0x2
 	.2byte	0x158
-	.4byte	0xce6
+	.4byte	0xcfe
 	.byte	0
-	.uleb128 0x23
-	.4byte	.LASF231
+	.uleb128 0x24
+	.4byte	.LASF233
 	.byte	0x2
 	.2byte	0x159
-	.4byte	0xab4
+	.4byte	0xacc
 	.byte	0x4
-	.uleb128 0x23
-	.4byte	.LASF232
+	.uleb128 0x24
+	.4byte	.LASF234
 	.byte	0x2
 	.2byte	0x15a
 	.4byte	0x122
 	.byte	0x44
-	.uleb128 0x23
-	.4byte	.LASF233
+	.uleb128 0x24
+	.4byte	.LASF235
 	.byte	0x2
 	.2byte	0x15d
 	.4byte	0xd7
 	.byte	0x48
-	.uleb128 0x23
-	.4byte	.LASF234
+	.uleb128 0x24
+	.4byte	.LASF236
 	.byte	0x2
 	.2byte	0x15f
 	.4byte	0x153
 	.byte	0x4c
-	.uleb128 0x23
-	.4byte	.LASF235
+	.uleb128 0x24
+	.4byte	.LASF237
 	.byte	0x2
 	.2byte	0x160
 	.4byte	0xd7
 	.byte	0x50
-	.uleb128 0x23
-	.4byte	.LASF236
+	.uleb128 0x24
+	.4byte	.LASF238
 	.byte	0x2
 	.2byte	0x161
 	.4byte	0x50
 	.byte	0x54
-	.uleb128 0x23
-	.4byte	.LASF237
+	.uleb128 0x24
+	.4byte	.LASF239
 	.byte	0x2
 	.2byte	0x163
 	.4byte	0x153
 	.byte	0x58
-	.uleb128 0x23
-	.4byte	.LASF238
+	.uleb128 0x24
+	.4byte	.LASF240
 	.byte	0x2
 	.2byte	0x164
 	.4byte	0xd7
 	.byte	0x5c
-	.uleb128 0x23
-	.4byte	.LASF239
+	.uleb128 0x24
+	.4byte	.LASF241
 	.byte	0x2
 	.2byte	0x165
 	.4byte	0x50
 	.byte	0x60
-	.uleb128 0x23
-	.4byte	.LASF240
+	.uleb128 0x24
+	.4byte	.LASF242
 	.byte	0x2
 	.2byte	0x167
 	.4byte	0x153
 	.byte	0x64
-	.uleb128 0x23
-	.4byte	.LASF241
+	.uleb128 0x24
+	.4byte	.LASF243
 	.byte	0x2
 	.2byte	0x168
 	.4byte	0xd7
 	.byte	0x68
-	.uleb128 0x23
-	.4byte	.LASF242
+	.uleb128 0x24
+	.4byte	.LASF244
 	.byte	0x2
 	.2byte	0x169
 	.4byte	0x50
 	.byte	0x6c
-	.uleb128 0x23
-	.4byte	.LASF243
+	.uleb128 0x24
+	.4byte	.LASF245
 	.byte	0x2
 	.2byte	0x16b
 	.4byte	0x153
 	.byte	0x70
-	.uleb128 0x23
-	.4byte	.LASF244
+	.uleb128 0x24
+	.4byte	.LASF246
 	.byte	0x2
 	.2byte	0x16c
 	.4byte	0xd7
 	.byte	0x74
-	.uleb128 0x23
-	.4byte	.LASF245
+	.uleb128 0x24
+	.4byte	.LASF247
 	.byte	0x2
 	.2byte	0x16d
 	.4byte	0x50
 	.byte	0x78
-	.uleb128 0x25
+	.uleb128 0x26
 	.ascii	"os\000"
 	.byte	0x2
 	.2byte	0x171
-	.4byte	0xb47
+	.4byte	0xb5f
 	.byte	0x7c
-	.uleb128 0x25
+	.uleb128 0x26
 	.ascii	"ep\000"
 	.byte	0x2
 	.2byte	0x172
 	.4byte	0x122
 	.byte	0x94
-	.uleb128 0x23
-	.4byte	.LASF246
+	.uleb128 0x24
+	.4byte	.LASF248
 	.byte	0x2
 	.2byte	0x174
 	.4byte	0x122
 	.byte	0x98
-	.uleb128 0x23
-	.4byte	.LASF247
+	.uleb128 0x24
+	.4byte	.LASF249
 	.byte	0x2
 	.2byte	0x174
 	.4byte	0x122
 	.byte	0x9c
-	.uleb128 0x23
-	.4byte	.LASF248
+	.uleb128 0x24
+	.4byte	.LASF250
 	.byte	0x2
 	.2byte	0x176
 	.4byte	0xfb
 	.byte	0xa0
-	.uleb128 0x23
-	.4byte	.LASF249
+	.uleb128 0x24
+	.4byte	.LASF251
 	.byte	0x2
 	.2byte	0x177
 	.4byte	0x122
 	.byte	0xa4
-	.uleb128 0x23
-	.4byte	.LASF250
+	.uleb128 0x24
+	.4byte	.LASF252
 	.byte	0x2
 	.2byte	0x179
 	.4byte	0x122
 	.byte	0xa8
-	.uleb128 0x23
-	.4byte	.LASF251
+	.uleb128 0x24
+	.4byte	.LASF253
 	.byte	0x2
 	.2byte	0x17a
 	.4byte	0x122
 	.byte	0xac
-	.uleb128 0x23
-	.4byte	.LASF252
+	.uleb128 0x24
+	.4byte	.LASF254
 	.byte	0x2
 	.2byte	0x17b
 	.4byte	0x122
 	.byte	0xb0
-	.uleb128 0x23
-	.4byte	.LASF253
+	.uleb128 0x24
+	.4byte	.LASF255
 	.byte	0x2
 	.2byte	0x17c
 	.4byte	0x122
 	.byte	0xb4
-	.uleb128 0x25
+	.uleb128 0x26
 	.ascii	"kbd\000"
 	.byte	0x2
 	.2byte	0x17d
-	.4byte	0xcec
+	.4byte	0xd04
 	.byte	0xb8
-	.uleb128 0x23
-	.4byte	.LASF254
+	.uleb128 0x24
+	.4byte	.LASF256
 	.byte	0x2
 	.2byte	0x180
 	.4byte	0x50
 	.byte	0xbc
-	.uleb128 0x23
-	.4byte	.LASF255
+	.uleb128 0x24
+	.4byte	.LASF257
 	.byte	0x2
 	.2byte	0x18d
 	.4byte	0x50
 	.byte	0xc0
-	.uleb128 0x25
+	.uleb128 0x26
 	.ascii	"lmb\000"
 	.byte	0x2
 	.2byte	0x190
-	.4byte	0x5cf
+	.4byte	0x5e7
 	.byte	0xc4
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0xab4
+	.4byte	0xacc
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x72e
-	.uleb128 0x24
-	.4byte	.LASF256
+	.4byte	0x746
+	.uleb128 0x25
+	.4byte	.LASF258
 	.byte	0x2
 	.2byte	0x196
-	.4byte	0xb53
+	.4byte	0xb6b
 	.uleb128 0xf
-	.4byte	.LASF257
+	.4byte	.LASF259
 	.byte	0x2
 	.2byte	0x198
-	.4byte	0xcf2
+	.4byte	0xd0a
 	.uleb128 0xc
 	.4byte	0x138
-	.4byte	0xd15
+	.4byte	0xd2d
 	.uleb128 0xe
 	.byte	0
 	.uleb128 0x7
-	.4byte	0xd0a
+	.4byte	0xd22
 	.uleb128 0x4
-	.4byte	.LASF258
+	.4byte	.LASF260
 	.byte	0x14
 	.byte	0x1a
-	.4byte	0xd15
+	.4byte	0xd2d
 	.uleb128 0x4
-	.4byte	.LASF259
+	.4byte	.LASF261
 	.byte	0x15
 	.byte	0x7
-	.4byte	0xd15
+	.4byte	0xd2d
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0x12d
 	.uleb128 0xc
 	.4byte	0xdd
-	.4byte	0xd46
+	.4byte	0xd5e
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x1f
 	.byte	0
 	.uleb128 0x4
-	.4byte	.LASF260
+	.4byte	.LASF262
 	.byte	0x3
 	.byte	0xad
 	.4byte	0x122
 	.uleb128 0xc
 	.4byte	0x90
-	.4byte	0xd5c
+	.4byte	0xd74
 	.uleb128 0xe
 	.byte	0
 	.uleb128 0x4
-	.4byte	.LASF261
+	.4byte	.LASF263
 	.byte	0x3
 	.byte	0xaf
-	.4byte	0xd51
+	.4byte	0xd69
 	.uleb128 0x4
-	.4byte	.LASF262
+	.4byte	.LASF264
 	.byte	0x3
 	.byte	0xb0
-	.4byte	0xd51
+	.4byte	0xd69
 	.uleb128 0x4
-	.4byte	.LASF263
+	.4byte	.LASF265
 	.byte	0x3
 	.byte	0xfe
 	.4byte	0x122
 	.uleb128 0x4
-	.4byte	.LASF264
+	.4byte	.LASF266
 	.byte	0x3
 	.byte	0xff
 	.4byte	0x122
 	.uleb128 0xf
-	.4byte	.LASF265
+	.4byte	.LASF267
 	.byte	0x3
 	.2byte	0x100
 	.4byte	0x122
 	.uleb128 0x14
-	.4byte	.LASF266
+	.4byte	.LASF268
 	.byte	0x4
 	.byte	0x16
 	.byte	0x2e
-	.4byte	0xdad
+	.4byte	0xdc5
 	.uleb128 0x15
-	.4byte	.LASF267
+	.4byte	.LASF269
 	.byte	0x16
 	.byte	0x2f
 	.4byte	0x148
@@ -3469,199 +3398,329 @@ __func__.8769:
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0x25
-	.uleb128 0xc
-	.4byte	0x90
-	.4byte	0xdc3
-	.uleb128 0xd
-	.4byte	0xcb
-	.byte	0x5
-	.byte	0
-	.uleb128 0xf
-	.4byte	.LASF268
-	.byte	0x16
-	.2byte	0x1fd
-	.4byte	0xd94
-	.uleb128 0xf
-	.4byte	.LASF269
-	.byte	0x16
-	.2byte	0x1fe
-	.4byte	0xd94
-	.uleb128 0xf
+	.uleb128 0x14
 	.4byte	.LASF270
+	.byte	0x40
 	.byte	0x16
-	.2byte	0x200
-	.4byte	0xd94
-	.uleb128 0xf
+	.byte	0xa6
+	.4byte	0xe68
+	.uleb128 0x15
+	.4byte	.LASF74
+	.byte	0x16
+	.byte	0xa8
+	.4byte	0xe68
+	.byte	0
+	.uleb128 0x15
 	.4byte	.LASF271
 	.byte	0x16
-	.2byte	0x205
-	.4byte	0xd36
-	.uleb128 0xf
+	.byte	0xa9
+	.4byte	0x3cb
+	.byte	0x10
+	.uleb128 0x15
 	.4byte	.LASF272
 	.byte	0x16
-	.2byte	0x206
-	.4byte	0xd36
-	.uleb128 0xc
-	.4byte	0xdd
-	.4byte	0xe0f
-	.uleb128 0xd
-	.4byte	0xcb
-	.byte	0x3f
-	.byte	0
-	.uleb128 0xf
+	.byte	0xaa
+	.4byte	0xb5
+	.byte	0x18
+	.uleb128 0x15
+	.4byte	.LASF257
+	.byte	0x16
+	.byte	0xab
+	.4byte	0x50
+	.byte	0x1c
+	.uleb128 0x15
 	.4byte	.LASF273
 	.byte	0x16
-	.2byte	0x207
-	.4byte	0xdff
-	.uleb128 0xf
+	.byte	0xad
+	.4byte	0xe92
+	.byte	0x20
+	.uleb128 0x15
 	.4byte	.LASF274
 	.byte	0x16
-	.2byte	0x209
-	.4byte	0xdb3
-	.uleb128 0xf
+	.byte	0xae
+	.4byte	0xeb1
+	.byte	0x24
+	.uleb128 0x15
 	.4byte	.LASF275
 	.byte	0x16
-	.2byte	0x20a
-	.4byte	0xdb3
-	.uleb128 0xf
+	.byte	0xaf
+	.4byte	0xec6
+	.byte	0x28
+	.uleb128 0x15
 	.4byte	.LASF276
 	.byte	0x16
-	.2byte	0x20b
-	.4byte	0xd94
-	.uleb128 0xf
+	.byte	0xb0
+	.4byte	0xed7
+	.byte	0x2c
+	.uleb128 0x15
 	.4byte	.LASF277
 	.byte	0x16
-	.2byte	0x20c
-	.4byte	0xd94
-	.uleb128 0xf
+	.byte	0xb4
+	.4byte	0xec6
+	.byte	0x30
+	.uleb128 0x15
 	.4byte	.LASF278
 	.byte	0x16
-	.2byte	0x20d
-	.4byte	0xdad
-	.uleb128 0xc
-	.4byte	0xdad
-	.4byte	0xe67
-	.uleb128 0xd
-	.4byte	0xcb
-	.byte	0x3
-	.byte	0
-	.uleb128 0xf
+	.byte	0xb5
+	.4byte	0xe8c
+	.byte	0x34
+	.uleb128 0x15
 	.4byte	.LASF279
 	.byte	0x16
-	.2byte	0x20e
-	.4byte	0xe57
-	.uleb128 0xf
+	.byte	0xb6
+	.4byte	0x50
+	.byte	0x38
+	.uleb128 0x15
 	.4byte	.LASF280
 	.byte	0x16
-	.2byte	0x20f
-	.4byte	0xdad
-	.uleb128 0xf
-	.4byte	.LASF281
-	.byte	0x16
-	.2byte	0x210
-	.4byte	0x50
+	.byte	0xb7
+	.4byte	0x153
+	.byte	0x3c
+	.byte	0
 	.uleb128 0xc
-	.4byte	0x9a
-	.4byte	0xe9b
+	.4byte	0xdd
+	.4byte	0xe78
 	.uleb128 0xd
 	.4byte	0xcb
-	.byte	0x5
+	.byte	0xf
 	.byte	0
-	.uleb128 0x7
-	.4byte	0xe8b
-	.uleb128 0xf
-	.4byte	.LASF282
-	.byte	0x16
-	.2byte	0x211
-	.4byte	0xe9b
-	.uleb128 0xf
-	.4byte	.LASF283
-	.byte	0x16
-	.2byte	0x212
-	.4byte	0xe9b
-	.uleb128 0xf
+	.uleb128 0x19
+	.4byte	0x50
+	.4byte	0xe8c
+	.uleb128 0x1a
+	.4byte	0xe8c
+	.uleb128 0x1a
+	.4byte	0xd04
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xdcb
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xe78
+	.uleb128 0x19
+	.4byte	0x50
+	.4byte	0xeb1
+	.uleb128 0x1a
+	.4byte	0xe8c
+	.uleb128 0x1a
+	.4byte	0x153
+	.uleb128 0x1a
+	.4byte	0x50
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xe98
+	.uleb128 0x19
+	.4byte	0x50
+	.4byte	0xec6
+	.uleb128 0x1a
+	.4byte	0xe8c
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xeb7
+	.uleb128 0x28
+	.4byte	0xed7
+	.uleb128 0x1a
+	.4byte	0xe8c
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xecc
+	.uleb128 0x4
+	.4byte	.LASF281
+	.byte	0x16
+	.byte	0xbd
+	.4byte	0xe8c
+	.uleb128 0xc
+	.4byte	0x90
+	.4byte	0xef8
+	.uleb128 0xd
+	.4byte	0xcb
+	.byte	0x5
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF282
+	.byte	0x16
+	.2byte	0x1fd
+	.4byte	0xdac
+	.uleb128 0xf
+	.4byte	.LASF283
+	.byte	0x16
+	.2byte	0x1fe
+	.4byte	0xdac
+	.uleb128 0xf
 	.4byte	.LASF284
 	.byte	0x16
+	.2byte	0x200
+	.4byte	0xdac
+	.uleb128 0xf
+	.4byte	.LASF285
+	.byte	0x16
+	.2byte	0x205
+	.4byte	0xd4e
+	.uleb128 0xf
+	.4byte	.LASF286
+	.byte	0x16
+	.2byte	0x206
+	.4byte	0xd4e
+	.uleb128 0xc
+	.4byte	0xdd
+	.4byte	0xf44
+	.uleb128 0xd
+	.4byte	0xcb
+	.byte	0x3f
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF287
+	.byte	0x16
+	.2byte	0x207
+	.4byte	0xf34
+	.uleb128 0xf
+	.4byte	.LASF288
+	.byte	0x16
+	.2byte	0x209
+	.4byte	0xee8
+	.uleb128 0xf
+	.4byte	.LASF289
+	.byte	0x16
+	.2byte	0x20a
+	.4byte	0xee8
+	.uleb128 0xf
+	.4byte	.LASF290
+	.byte	0x16
+	.2byte	0x20b
+	.4byte	0xdac
+	.uleb128 0xf
+	.4byte	.LASF291
+	.byte	0x16
+	.2byte	0x20c
+	.4byte	0xdac
+	.uleb128 0xf
+	.4byte	.LASF292
+	.byte	0x16
+	.2byte	0x20d
+	.4byte	0xdc5
+	.uleb128 0xc
+	.4byte	0xdc5
+	.4byte	0xf9c
+	.uleb128 0xd
+	.4byte	0xcb
+	.byte	0x3
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF293
+	.byte	0x16
+	.2byte	0x20e
+	.4byte	0xf8c
+	.uleb128 0xf
+	.4byte	.LASF294
+	.byte	0x16
+	.2byte	0x20f
+	.4byte	0xdc5
+	.uleb128 0xf
+	.4byte	.LASF295
+	.byte	0x16
+	.2byte	0x210
+	.4byte	0x50
+	.uleb128 0xc
+	.4byte	0x9a
+	.4byte	0xfd0
+	.uleb128 0xd
+	.4byte	0xcb
+	.byte	0x5
+	.byte	0
+	.uleb128 0x7
+	.4byte	0xfc0
+	.uleb128 0xf
+	.4byte	.LASF296
+	.byte	0x16
+	.2byte	0x211
+	.4byte	0xfd0
+	.uleb128 0xf
+	.4byte	.LASF297
+	.byte	0x16
+	.2byte	0x212
+	.4byte	0xfd0
+	.uleb128 0xf
+	.4byte	.LASF298
+	.byte	0x16
 	.2byte	0x216
 	.4byte	0x117
 	.uleb128 0xf
-	.4byte	.LASF285
+	.4byte	.LASF299
 	.byte	0x16
 	.2byte	0x217
 	.4byte	0x117
 	.uleb128 0xf
-	.4byte	.LASF286
+	.4byte	.LASF300
 	.byte	0x16
 	.2byte	0x219
 	.4byte	0x50
 	.uleb128 0xc
 	.4byte	0xdd
-	.4byte	0xeed
-	.uleb128 0x1d
+	.4byte	0x1022
+	.uleb128 0x1e
 	.4byte	0xcb
 	.2byte	0x3ff
 	.byte	0
 	.uleb128 0xf
-	.4byte	.LASF287
+	.4byte	.LASF301
 	.byte	0x16
 	.2byte	0x220
-	.4byte	0xedc
+	.4byte	0x1011
 	.uleb128 0xf
-	.4byte	.LASF288
+	.4byte	.LASF302
 	.byte	0x16
 	.2byte	0x222
 	.4byte	0x9f
 	.uleb128 0xf
-	.4byte	.LASF289
+	.4byte	.LASF303
 	.byte	0x16
 	.2byte	0x224
 	.4byte	0x9f
-	.uleb128 0xf
-	.4byte	.LASF290
-	.byte	0x16
-	.2byte	0x230
-	.4byte	0xd94
-	.uleb128 0x27
-	.4byte	.LASF291
+	.uleb128 0x29
+	.4byte	.LASF304
 	.byte	0x4
 	.4byte	0x7b
 	.byte	0x16
 	.2byte	0x286
-	.4byte	0xf47
+	.4byte	0x1070
 	.uleb128 0x11
-	.4byte	.LASF292
+	.4byte	.LASF305
 	.byte	0
 	.uleb128 0x11
-	.4byte	.LASF293
+	.4byte	.LASF306
 	.byte	0x1
 	.uleb128 0x11
-	.4byte	.LASF294
+	.4byte	.LASF307
 	.byte	0x2
 	.uleb128 0x11
-	.4byte	.LASF295
+	.4byte	.LASF308
 	.byte	0x3
 	.byte	0
 	.uleb128 0xf
-	.4byte	.LASF296
+	.4byte	.LASF309
 	.byte	0x16
 	.2byte	0x28c
-	.4byte	0xf1d
+	.4byte	0x1046
 	.uleb128 0x4
-	.4byte	.LASF297
+	.4byte	.LASF310
 	.byte	0x17
 	.byte	0x2b
 	.4byte	0x195
 	.uleb128 0x4
-	.4byte	.LASF298
+	.4byte	.LASF311
 	.byte	0x17
 	.byte	0x2b
 	.4byte	0x195
 	.uleb128 0x14
-	.4byte	.LASF299
+	.4byte	.LASF312
 	.byte	0x2c
 	.byte	0x18
 	.byte	0x1b
-	.4byte	0xff9
+	.4byte	0x1122
 	.uleb128 0x15
 	.4byte	.LASF74
 	.byte	0x18
@@ -3675,37 +3734,37 @@ __func__.8769:
 	.4byte	0x90
 	.byte	0x4
 	.uleb128 0x15
-	.4byte	.LASF263
+	.4byte	.LASF265
 	.byte	0x18
 	.byte	0x1e
 	.4byte	0x101
 	.byte	0x8
 	.uleb128 0x15
-	.4byte	.LASF300
+	.4byte	.LASF313
 	.byte	0x18
 	.byte	0x1f
 	.4byte	0x101
 	.byte	0xc
 	.uleb128 0x15
-	.4byte	.LASF301
+	.4byte	.LASF314
 	.byte	0x18
 	.byte	0x25
 	.4byte	0x101
 	.byte	0x10
 	.uleb128 0x15
-	.4byte	.LASF302
+	.4byte	.LASF315
 	.byte	0x18
 	.byte	0x27
 	.4byte	0x153
 	.byte	0x14
 	.uleb128 0x15
-	.4byte	.LASF303
+	.4byte	.LASF316
 	.byte	0x18
 	.byte	0x28
 	.4byte	0x9f
 	.byte	0x18
 	.uleb128 0x15
-	.4byte	.LASF304
+	.4byte	.LASF317
 	.byte	0x18
 	.byte	0x29
 	.4byte	0x9f
@@ -3717,7 +3776,7 @@ __func__.8769:
 	.4byte	0x9f
 	.byte	0x20
 	.uleb128 0x15
-	.4byte	.LASF305
+	.4byte	.LASF318
 	.byte	0x18
 	.byte	0x2b
 	.4byte	0x9f
@@ -3730,11 +3789,11 @@ __func__.8769:
 	.byte	0x28
 	.byte	0
 	.uleb128 0x14
-	.4byte	.LASF306
+	.4byte	.LASF319
 	.byte	0x14
 	.byte	0x18
 	.byte	0x38
-	.4byte	0x1042
+	.4byte	0x116b
 	.uleb128 0xb
 	.ascii	"dev\000"
 	.byte	0x18
@@ -3742,35 +3801,35 @@ __func__.8769:
 	.4byte	0x153
 	.byte	0
 	.uleb128 0x15
-	.4byte	.LASF307
+	.4byte	.LASF280
 	.byte	0x18
 	.byte	0x3a
 	.4byte	0x153
 	.byte	0x4
 	.uleb128 0x15
-	.4byte	.LASF308
+	.4byte	.LASF320
 	.byte	0x18
 	.byte	0x3b
 	.4byte	0x50
 	.byte	0x8
 	.uleb128 0x15
-	.4byte	.LASF309
+	.4byte	.LASF321
 	.byte	0x18
 	.byte	0x3c
 	.4byte	0xd7
 	.byte	0xc
 	.uleb128 0x15
-	.4byte	.LASF310
+	.4byte	.LASF322
 	.byte	0x18
 	.byte	0x3d
-	.4byte	0x1066
+	.4byte	0x118f
 	.byte	0x10
 	.byte	0
 	.uleb128 0x19
 	.4byte	0x122
-	.4byte	0x1060
+	.4byte	0x1189
 	.uleb128 0x1a
-	.4byte	0x1060
+	.4byte	0x1189
 	.uleb128 0x1a
 	.4byte	0x122
 	.uleb128 0x1a
@@ -3780,162 +3839,163 @@ __func__.8769:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0xff9
+	.4byte	0x1122
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x1042
+	.4byte	0x116b
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0xf69
+	.4byte	0x1092
 	.uleb128 0xf
-	.4byte	.LASF311
+	.4byte	.LASF323
 	.byte	0x19
 	.2byte	0x3ba
 	.4byte	0x122
 	.uleb128 0xf
-	.4byte	.LASF312
+	.4byte	.LASF324
 	.byte	0x19
 	.2byte	0x3bb
 	.4byte	0x122
 	.uleb128 0xf
-	.4byte	.LASF313
+	.4byte	.LASF325
 	.byte	0x19
 	.2byte	0x3bc
 	.4byte	0x122
-	.uleb128 0x28
-	.4byte	.LASF330
+	.uleb128 0x2a
+	.4byte	.LASF341
 	.byte	0x1
 	.2byte	0x2f6
 	.4byte	0x50
-	.4byte	.LFB216
-	.4byte	.LFE216-.LFB216
+	.4byte	.LFB220
+	.4byte	.LFE220-.LFB220
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x18be
-	.uleb128 0x29
-	.4byte	.LASF314
+	.4byte	0x1984
+	.uleb128 0x2b
+	.4byte	.LASF326
 	.byte	0x1
 	.2byte	0x2f6
-	.4byte	0x106c
+	.4byte	0x1195
 	.4byte	.LLST60
-	.uleb128 0x29
-	.4byte	.LASF315
+	.uleb128 0x2b
+	.4byte	.LASF327
 	.byte	0x1
 	.2byte	0x2f7
-	.4byte	0x1060
+	.4byte	0x1189
 	.4byte	.LLST61
-	.uleb128 0x29
-	.4byte	.LASF316
+	.uleb128 0x2b
+	.4byte	.LASF328
 	.byte	0x1
 	.2byte	0x2f7
 	.4byte	0x122
 	.4byte	.LLST62
-	.uleb128 0x2a
+	.uleb128 0x2c
 	.ascii	"fit\000"
 	.byte	0x1
 	.2byte	0x2f7
 	.4byte	0x153
 	.4byte	.LLST63
-	.uleb128 0x2b
-	.4byte	.LASF317
+	.uleb128 0x2d
+	.4byte	.LASF329
 	.byte	0x1
 	.2byte	0x2f9
 	.4byte	0x122
 	.4byte	.LLST64
-	.uleb128 0x2c
+	.uleb128 0x2e
 	.ascii	"ret\000"
 	.byte	0x1
 	.2byte	0x2fa
 	.4byte	0x50
 	.4byte	.LLST65
-	.uleb128 0x2c
+	.uleb128 0x2f
 	.ascii	"i\000"
 	.byte	0x1
 	.2byte	0x2fb
 	.4byte	0x50
-	.4byte	.LLST66
-	.uleb128 0x2d
-	.4byte	0x18be
+	.byte	0
+	.uleb128 0x30
+	.4byte	0x1984
 	.4byte	.LBB82
 	.4byte	.Ldebug_ranges0+0x58
 	.byte	0x1
 	.2byte	0x30d
-	.4byte	0x1617
-	.uleb128 0x2e
-	.4byte	0x18f3
+	.4byte	0x1730
+	.uleb128 0x31
+	.4byte	0x19b9
+	.4byte	.LLST66
+	.uleb128 0x31
+	.4byte	0x19ad
 	.4byte	.LLST67
-	.uleb128 0x2e
-	.4byte	0x18e7
+	.uleb128 0x31
+	.4byte	0x19a1
 	.4byte	.LLST68
-	.uleb128 0x2e
-	.4byte	0x18db
+	.uleb128 0x31
+	.4byte	0x1995
 	.4byte	.LLST69
-	.uleb128 0x2f
-	.4byte	0x18cf
-	.uleb128 0x30
+	.uleb128 0x32
 	.4byte	.Ldebug_ranges0+0x58
-	.uleb128 0x31
-	.4byte	0x18ff
+	.uleb128 0x33
+	.4byte	0x19c5
 	.uleb128 0x3
 	.byte	0x91
-	.sleb128 -152
-	.uleb128 0x31
-	.4byte	0x190b
+	.sleb128 -188
+	.uleb128 0x33
+	.4byte	0x19d1
 	.uleb128 0x3
 	.byte	0x91
-	.sleb128 -208
-	.uleb128 0x32
-	.4byte	0x1917
+	.sleb128 -244
+	.uleb128 0x34
+	.4byte	0x19dd
 	.4byte	.LLST70
-	.uleb128 0x32
-	.4byte	0x1923
+	.uleb128 0x34
+	.4byte	0x19e9
 	.4byte	.LLST71
-	.uleb128 0x32
-	.4byte	0x192f
+	.uleb128 0x34
+	.4byte	0x19f5
 	.4byte	.LLST72
-	.uleb128 0x32
-	.4byte	0x193b
+	.uleb128 0x34
+	.4byte	0x1a01
 	.4byte	.LLST73
-	.uleb128 0x32
-	.4byte	0x1947
+	.uleb128 0x34
+	.4byte	0x1a0d
 	.4byte	.LLST74
-	.uleb128 0x32
-	.4byte	0x1960
-	.4byte	.LLST75
-	.uleb128 0x33
-	.4byte	0x1953
 	.uleb128 0x34
-	.4byte	0x1bee
+	.4byte	0x1a26
+	.4byte	.LLST75
+	.uleb128 0x35
+	.4byte	0x1a19
+	.uleb128 0x36
+	.4byte	0x1cb4
 	.4byte	.LBB84
 	.4byte	.LBE84-.LBB84
 	.byte	0x1
 	.2byte	0x2b2
-	.4byte	0x11f0
-	.uleb128 0x2e
-	.4byte	0x1c17
+	.4byte	0x131a
+	.uleb128 0x31
+	.4byte	0x1cdd
 	.4byte	.LLST76
-	.uleb128 0x2e
-	.4byte	0x1c0b
+	.uleb128 0x31
+	.4byte	0x1cd1
 	.4byte	.LLST77
-	.uleb128 0x2e
-	.4byte	0x1bff
+	.uleb128 0x31
+	.4byte	0x1cc5
 	.4byte	.LLST78
-	.uleb128 0x35
-	.4byte	.LVL167
-	.4byte	0x2650
-	.uleb128 0x36
+	.uleb128 0x37
+	.4byte	.LVL163
+	.4byte	0x26e6
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x78
+	.byte	0x7b
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
@@ -3943,236 +4003,235 @@ __func__.8769:
 	.sleb128 4
 	.byte	0
 	.byte	0
-	.uleb128 0x37
+	.uleb128 0x39
 	.4byte	.LBB86
 	.4byte	.LBE86-.LBB86
-	.4byte	0x1427
-	.uleb128 0x31
-	.4byte	0x196d
+	.4byte	0x154f
+	.uleb128 0x33
+	.4byte	0x1a33
 	.uleb128 0x3
 	.byte	0x91
-	.sleb128 -212
-	.uleb128 0x34
-	.4byte	0x1bee
+	.sleb128 -248
+	.uleb128 0x36
+	.4byte	0x1cb4
 	.4byte	.LBB87
 	.4byte	.LBE87-.LBB87
 	.byte	0x1
 	.2byte	0x2c9
-	.4byte	0x1255
-	.uleb128 0x2e
-	.4byte	0x1c17
+	.4byte	0x137f
+	.uleb128 0x31
+	.4byte	0x1cdd
 	.4byte	.LLST79
-	.uleb128 0x2e
-	.4byte	0x1c0b
+	.uleb128 0x31
+	.4byte	0x1cd1
 	.4byte	.LLST80
-	.uleb128 0x2e
-	.4byte	0x1bff
+	.uleb128 0x31
+	.4byte	0x1cc5
 	.4byte	.LLST81
-	.uleb128 0x35
-	.4byte	.LVL173
-	.4byte	0x2650
-	.uleb128 0x36
+	.uleb128 0x37
+	.4byte	.LVL169
+	.4byte	0x26e6
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x4
 	.byte	0x7d
 	.sleb128 96
 	.byte	0x6
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0x7d
-	.sleb128 108
+	.sleb128 104
 	.byte	0
 	.byte	0
-	.uleb128 0x34
-	.4byte	0x1c23
+	.uleb128 0x36
+	.4byte	0x1ce9
 	.4byte	.LBB89
 	.4byte	.LBE89-.LBB89
 	.byte	0x1
 	.2byte	0x2e6
-	.4byte	0x13a0
-	.uleb128 0x2e
-	.4byte	0x1c64
+	.4byte	0x14c8
+	.uleb128 0x31
+	.4byte	0x1d2a
 	.4byte	.LLST82
-	.uleb128 0x2e
-	.4byte	0x1c58
+	.uleb128 0x31
+	.4byte	0x1d1e
 	.4byte	.LLST83
-	.uleb128 0x2e
-	.4byte	0x1c4c
+	.uleb128 0x31
+	.4byte	0x1d12
 	.4byte	.LLST84
-	.uleb128 0x2f
-	.4byte	0x1c40
-	.uleb128 0x2e
-	.4byte	0x1c34
+	.uleb128 0x3a
+	.4byte	0x1d06
+	.uleb128 0x31
+	.4byte	0x1cfa
 	.4byte	.LLST85
-	.uleb128 0x38
+	.uleb128 0x3b
 	.4byte	.LBB90
 	.4byte	.LBE90-.LBB90
-	.uleb128 0x32
-	.4byte	0x1c70
+	.uleb128 0x34
+	.4byte	0x1d36
 	.4byte	.LLST86
-	.uleb128 0x31
-	.4byte	0x1c7c
+	.uleb128 0x33
+	.4byte	0x1d42
 	.uleb128 0x3
 	.byte	0x91
-	.sleb128 -196
-	.uleb128 0x32
-	.4byte	0x1c88
+	.sleb128 -232
+	.uleb128 0x34
+	.4byte	0x1d4e
 	.4byte	.LLST87
-	.uleb128 0x39
-	.4byte	.LVL180
-	.4byte	0x24f6
-	.4byte	0x12e0
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL176
+	.4byte	0x258c
+	.4byte	0x140a
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC25
-	.uleb128 0x36
+	.4byte	.LC22
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
-	.byte	0x7b
+	.byte	0x78
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x3
 	.byte	0x7d
-	.sleb128 124
+	.sleb128 120
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL182
-	.4byte	0x22f6
-	.4byte	0x130b
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL178
+	.4byte	0x238c
+	.4byte	0x1433
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x4
-	.byte	0x7d
-	.sleb128 100
-	.byte	0x6
-	.uleb128 0x36
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC25
-	.uleb128 0x36
+	.4byte	.LC22
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
-	.byte	0x7b
+	.byte	0x78
 	.sleb128 0
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL185
-	.4byte	0x265c
-	.4byte	0x1333
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL181
+	.4byte	0x26f2
+	.4byte	0x145b
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x78
+	.byte	0x7b
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC26
-	.uleb128 0x36
+	.4byte	.LC23
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x1
 	.byte	0x30
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL186
-	.4byte	0x265c
-	.4byte	0x135b
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL182
+	.4byte	0x26f2
+	.4byte	0x1483
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x78
+	.byte	0x7b
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC27
-	.uleb128 0x36
+	.4byte	.LC24
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x1
 	.byte	0x30
 	.byte	0
-	.uleb128 0x35
-	.4byte	.LVL187
-	.4byte	0x2668
-	.uleb128 0x36
+	.uleb128 0x37
+	.4byte	.LVL183
+	.4byte	0x26fe
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x4
 	.byte	0x7d
 	.sleb128 96
 	.byte	0x6
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x7b
+	.byte	0x78
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x4
 	.byte	0x7d
 	.sleb128 92
 	.byte	0x6
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x4
 	.byte	0x7d
 	.sleb128 88
 	.byte	0x6
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x2
 	.byte	0x7d
 	.sleb128 0
@@ -4180,7 +4239,7 @@ __func__.8769:
 	.byte	0x7d
 	.sleb128 84
 	.byte	0x6
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x2
 	.byte	0x7d
 	.sleb128 4
@@ -4188,7 +4247,7 @@ __func__.8769:
 	.byte	0x7d
 	.sleb128 80
 	.byte	0x6
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x2
 	.byte	0x7d
 	.sleb128 8
@@ -4199,59 +4258,59 @@ __func__.8769:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL169
-	.4byte	0x22f6
-	.4byte	0x13cb
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL165
+	.4byte	0x238c
+	.4byte	0x14f1
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x4
-	.byte	0x7d
-	.sleb128 100
-	.byte	0x6
-	.uleb128 0x36
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC25
-	.uleb128 0x36
+	.4byte	.LC22
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
-	.byte	0x7b
+	.byte	0x78
 	.sleb128 0
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL174
-	.4byte	0x1dc7
-	.4byte	0x13fb
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL170
+	.4byte	0x1e8d
+	.4byte	0x1523
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x4
+	.byte	0x7d
+	.sleb128 100
+	.byte	0x6
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x2
 	.byte	0x7d
 	.sleb128 0
@@ -4259,336 +4318,328 @@ __func__.8769:
 	.byte	0x7d
 	.sleb128 96
 	.byte	0x6
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x2
 	.byte	0x7d
 	.sleb128 4
 	.uleb128 0x2
-	.byte	0x78
+	.byte	0x7b
 	.sleb128 0
 	.byte	0
-	.uleb128 0x35
-	.4byte	.LVL176
-	.4byte	0x1c95
-	.uleb128 0x36
+	.uleb128 0x37
+	.4byte	.LVL172
+	.4byte	0x1d5b
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x78
+	.byte	0x7b
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x4
+	.byte	0x7d
+	.sleb128 100
+	.byte	0x6
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x2
 	.byte	0x7d
 	.sleb128 0
-	.uleb128 0x4
-	.byte	0x7d
-	.sleb128 100
-	.byte	0x6
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL137
-	.4byte	0x1ace
-	.4byte	0x1450
-	.uleb128 0x36
+	.uleb128 0x3d
+	.4byte	.LVL131
+	.4byte	0x2709
+	.uleb128 0x3c
+	.4byte	.LVL135
+	.4byte	0x1b94
+	.4byte	0x1582
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.uleb128 0x36
-	.uleb128 0x1
-	.byte	0x52
 	.uleb128 0x4
 	.byte	0x7d
-	.sleb128 92
+	.sleb128 100
 	.byte	0x6
-	.uleb128 0x36
+	.uleb128 0x38
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x3
 	.byte	0x7d
-	.sleb128 112
+	.sleb128 108
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL138
-	.4byte	0x2673
-	.4byte	0x146d
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL136
+	.4byte	0x2714
+	.4byte	0x159f
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC18
+	.4byte	.LC15
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LVL139
-	.4byte	0x267f
-	.uleb128 0x39
-	.4byte	.LVL140
-	.4byte	0x268b
-	.4byte	0x148f
-	.uleb128 0x36
+	.uleb128 0x3d
+	.4byte	.LVL137
+	.4byte	0x2720
+	.uleb128 0x3c
+	.4byte	.LVL138
+	.4byte	0x272c
+	.4byte	0x15c1
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x1
 	.byte	0x30
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x3c
 	.4byte	.LVL142
-	.4byte	0x2697
-	.4byte	0x14a6
-	.uleb128 0x36
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC19
-	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL146
-	.4byte	0x244c
-	.4byte	0x14ba
-	.uleb128 0x36
+	.4byte	0x24e2
+	.4byte	0x15d5
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x76
 	.sleb128 0
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL148
-	.4byte	0x2697
-	.4byte	0x14d7
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL144
+	.4byte	0x2709
+	.4byte	0x15f2
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC20
-	.uleb128 0x36
+	.4byte	.LC17
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x7b
+	.byte	0x78
 	.sleb128 0
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL149
-	.4byte	0x2697
-	.4byte	0x14ee
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL145
+	.4byte	0x2709
+	.4byte	0x1609
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC21
+	.4byte	.LC18
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL150
-	.4byte	0x22f6
-	.4byte	0x1519
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL146
+	.4byte	0x238c
+	.4byte	0x1632
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x4
-	.byte	0x7d
-	.sleb128 100
-	.byte	0x6
-	.uleb128 0x36
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC22
-	.uleb128 0x36
+	.4byte	.LC19
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
-	.byte	0x7b
+	.byte	0x78
 	.sleb128 0
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL152
-	.4byte	0x1dc7
-	.4byte	0x1548
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL148
+	.4byte	0x1e8d
+	.4byte	0x1663
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x4
+	.byte	0x7d
+	.sleb128 100
+	.byte	0x6
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x2
 	.byte	0x7d
 	.sleb128 0
 	.uleb128 0x2
-	.byte	0x78
+	.byte	0x7b
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x2
 	.byte	0x7d
 	.sleb128 4
 	.uleb128 0x3
 	.byte	0x7d
-	.sleb128 168
+	.sleb128 164
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LVL154
-	.4byte	0x1bc3
-	.uleb128 0x39
-	.4byte	.LVL156
-	.4byte	0x2697
-	.4byte	0x1568
-	.uleb128 0x36
+	.uleb128 0x3d
+	.4byte	.LVL150
+	.4byte	0x1c89
+	.uleb128 0x3c
+	.4byte	.LVL152
+	.4byte	0x2709
+	.4byte	0x1683
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC23
+	.4byte	.LC20
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL157
-	.4byte	0x22f6
-	.4byte	0x1592
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL153
+	.4byte	0x238c
+	.4byte	0x16ab
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x4
-	.byte	0x7d
-	.sleb128 100
-	.byte	0x6
-	.uleb128 0x36
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC24
-	.uleb128 0x36
+	.4byte	.LC21
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x1
 	.byte	0x30
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL159
-	.4byte	0x22f6
-	.4byte	0x15bc
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL155
+	.4byte	0x238c
+	.4byte	0x16d3
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x4
-	.byte	0x7d
-	.sleb128 100
-	.byte	0x6
-	.uleb128 0x36
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC25
-	.uleb128 0x36
+	.4byte	.LC22
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x1
 	.byte	0x30
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL163
-	.4byte	0x1dc7
-	.4byte	0x15ea
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL159
+	.4byte	0x1e8d
+	.4byte	0x1703
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x4
+	.byte	0x7d
+	.sleb128 100
+	.byte	0x6
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x2
 	.byte	0x7d
 	.sleb128 0
 	.uleb128 0x2
-	.byte	0x78
+	.byte	0x7b
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x2
 	.byte	0x7d
 	.sleb128 4
@@ -4596,371 +4647,369 @@ __func__.8769:
 	.byte	0x74
 	.sleb128 0
 	.byte	0
-	.uleb128 0x35
-	.4byte	.LVL168
-	.4byte	0x1c95
-	.uleb128 0x36
+	.uleb128 0x37
+	.4byte	.LVL164
+	.4byte	0x1d5b
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x4
+	.byte	0x7d
+	.sleb128 100
+	.byte	0x6
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x2
 	.byte	0x7d
 	.sleb128 0
-	.uleb128 0x4
-	.byte	0x7d
-	.sleb128 100
-	.byte	0x6
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x2d
-	.4byte	0x1990
-	.4byte	.LBB92
-	.4byte	.Ldebug_ranges0+0x70
+	.uleb128 0x30
+	.4byte	0x1a56
+	.4byte	.LBB94
+	.4byte	.Ldebug_ranges0+0x78
 	.byte	0x1
 	.2byte	0x311
-	.4byte	0x1865
-	.uleb128 0x2e
-	.4byte	0x19ad
+	.4byte	0x197a
+	.uleb128 0x31
+	.4byte	0x1a73
 	.4byte	.LLST88
-	.uleb128 0x2e
-	.4byte	0x19a1
-	.4byte	.LLST89
-	.uleb128 0x30
-	.4byte	.Ldebug_ranges0+0x70
 	.uleb128 0x31
-	.4byte	0x19b9
+	.4byte	0x1a67
+	.4byte	.LLST89
+	.uleb128 0x32
+	.4byte	.Ldebug_ranges0+0x78
+	.uleb128 0x33
+	.4byte	0x1a7f
 	.uleb128 0x3
 	.byte	0x91
-	.sleb128 -208
-	.uleb128 0x31
-	.4byte	0x19c5
+	.sleb128 -244
+	.uleb128 0x33
+	.4byte	0x1a8b
 	.uleb128 0x3
 	.byte	0x91
-	.sleb128 -196
-	.uleb128 0x3b
-	.4byte	0x19d1
-	.4byte	0x263d
+	.sleb128 -232
+	.uleb128 0x3e
+	.4byte	0x1a97
+	.4byte	0x26d3
 	.4byte	.LLST91
-	.uleb128 0x32
-	.4byte	0x19dd
+	.uleb128 0x34
+	.4byte	0x1aa3
 	.4byte	.LLST92
-	.uleb128 0x31
-	.4byte	0x19e9
+	.uleb128 0x33
+	.4byte	0x1aaf
 	.uleb128 0x3
 	.byte	0x91
-	.sleb128 -212
-	.uleb128 0x32
-	.4byte	0x19f5
+	.sleb128 -248
+	.uleb128 0x34
+	.4byte	0x1abb
 	.4byte	.LLST93
-	.uleb128 0x32
-	.4byte	0x1a01
+	.uleb128 0x34
+	.4byte	0x1ac7
 	.4byte	.LLST94
-	.uleb128 0x32
-	.4byte	0x1a0d
+	.uleb128 0x34
+	.4byte	0x1ad3
 	.4byte	.LLST95
-	.uleb128 0x32
-	.4byte	0x1a19
+	.uleb128 0x34
+	.4byte	0x1adf
 	.4byte	.LLST96
-	.uleb128 0x32
-	.4byte	0x1a23
+	.uleb128 0x34
+	.4byte	0x1ae9
 	.4byte	.LLST97
-	.uleb128 0x32
-	.4byte	0x1a2f
+	.uleb128 0x34
+	.4byte	0x1af5
 	.4byte	.LLST98
-	.uleb128 0x31
-	.4byte	0x1a3b
+	.uleb128 0x33
+	.4byte	0x1b01
 	.uleb128 0x3
 	.byte	0x91
-	.sleb128 -152
-	.uleb128 0x32
-	.4byte	0x1a54
+	.sleb128 -188
+	.uleb128 0x34
+	.4byte	0x1b1a
 	.4byte	.LLST99
-	.uleb128 0x33
-	.4byte	0x1a47
-	.uleb128 0x39
-	.4byte	.LVL194
-	.4byte	0x1a95
-	.4byte	0x16da
-	.uleb128 0x36
+	.uleb128 0x35
+	.4byte	0x1b0d
+	.uleb128 0x3c
+	.4byte	.LVL191
+	.4byte	0x1b5b
+	.4byte	0x17f3
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL196
-	.4byte	0x26a2
-	.4byte	0x16ef
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL193
+	.4byte	0x2738
+	.4byte	0x1808
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0x77
-	.sleb128 152
+	.sleb128 148
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LVL197
-	.4byte	0x2697
-	.uleb128 0x3c
-	.4byte	.LVL203
+	.uleb128 0x3d
+	.4byte	.LVL194
+	.4byte	0x2709
+	.uleb128 0x3f
+	.4byte	.LVL199
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x76
 	.sleb128 0
-	.4byte	0x171e
-	.uleb128 0x36
+	.4byte	0x1835
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x4
-	.byte	0x77
-	.sleb128 84
-	.byte	0x6
-	.uleb128 0x36
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x1
 	.byte	0x31
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
 	.byte	0x78
 	.sleb128 0
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL206
-	.4byte	0x1ace
-	.4byte	0x1747
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL202
+	.4byte	0x1b94
+	.4byte	0x185c
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x4
-	.byte	0x77
-	.sleb128 84
-	.byte	0x6
-	.uleb128 0x36
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x78
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x3
 	.byte	0x77
-	.sleb128 92
+	.sleb128 88
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL208
-	.4byte	0x268b
-	.4byte	0x1760
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL204
+	.4byte	0x272c
+	.4byte	0x1875
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x78
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x1
 	.byte	0x30
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL210
-	.4byte	0x2697
-	.4byte	0x1777
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL206
+	.4byte	0x2709
+	.4byte	0x188c
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC19
+	.4byte	.LC16
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL213
-	.4byte	0x244c
-	.4byte	0x178b
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL209
+	.4byte	0x24e2
+	.4byte	0x18a0
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x78
 	.sleb128 0
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL215
-	.4byte	0x2697
-	.4byte	0x17a8
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL212
+	.4byte	0x2709
+	.4byte	0x18bf
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC20
-	.uleb128 0x36
+	.4byte	.LC17
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
+	.uleb128 0x4
+	.byte	0x77
+	.sleb128 84
+	.byte	0x6
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL218
-	.4byte	0x2697
-	.4byte	0x17bf
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL215
+	.4byte	0x2709
+	.4byte	0x18d6
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC21
+	.4byte	.LC18
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL219
-	.4byte	0x2673
-	.4byte	0x17dc
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL216
+	.4byte	0x2714
+	.4byte	0x18f3
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x78
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC18
+	.4byte	.LC15
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL221
-	.4byte	0x22f6
-	.4byte	0x1803
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL219
+	.4byte	0x238c
+	.4byte	0x191a
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x78
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x4
 	.byte	0x77
-	.sleb128 80
+	.sleb128 84
 	.byte	0x6
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
-	.byte	0x7a
+	.byte	0x7b
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x1
 	.byte	0x30
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL223
-	.4byte	0x1dc7
-	.4byte	0x182d
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL221
+	.4byte	0x1e8d
+	.4byte	0x1942
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x4
-	.byte	0x77
-	.sleb128 84
-	.byte	0x6
-	.uleb128 0x36
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x78
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x2
 	.byte	0x7d
 	.sleb128 4
 	.uleb128 0x3
 	.byte	0x77
-	.sleb128 108
+	.sleb128 104
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL225
-	.4byte	0x26ad
-	.4byte	0x184a
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL223
+	.4byte	0x2743
+	.4byte	0x195f
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x7a
+	.byte	0x7b
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	.LC0
 	.byte	0
-	.uleb128 0x35
-	.4byte	.LVL229
-	.4byte	0x26ad
-	.uleb128 0x36
+	.uleb128 0x37
+	.4byte	.LVL227
+	.4byte	0x2743
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x7a
+	.byte	0x7b
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x5
@@ -4969,137 +5018,84 @@ __func__.8769:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x3d
+	.uleb128 0x40
 	.4byte	0xd2
 	.4byte	.LLST90
-	.uleb128 0x39
-	.4byte	.LVL130
-	.4byte	0x2697
-	.4byte	0x188b
-	.uleb128 0x36
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC15
-	.uleb128 0x36
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
 	.byte	0
-	.uleb128 0x3c
-	.4byte	.LVL131
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.4byte	0x18b4
-	.uleb128 0x36
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x36
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.uleb128 0x36
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x4
-	.byte	0x7d
-	.sleb128 96
-	.byte	0x6
-	.uleb128 0x36
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x4
-	.byte	0x7d
-	.sleb128 92
-	.byte	0x6
-	.byte	0
-	.uleb128 0x3a
-	.4byte	.LVL132
-	.4byte	0x2697
-	.byte	0
-	.uleb128 0x3e
-	.4byte	.LASF325
+	.uleb128 0x41
+	.4byte	.LASF336
 	.byte	0x1
 	.2byte	0x22e
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x197b
-	.uleb128 0x3f
-	.4byte	.LASF314
+	.4byte	0x1a41
+	.uleb128 0x42
+	.4byte	.LASF326
 	.byte	0x1
 	.2byte	0x22e
-	.4byte	0x106c
-	.uleb128 0x3f
-	.4byte	.LASF315
+	.4byte	0x1195
+	.uleb128 0x42
+	.4byte	.LASF327
 	.byte	0x1
 	.2byte	0x22f
-	.4byte	0x1060
-	.uleb128 0x3f
-	.4byte	.LASF316
+	.4byte	0x1189
+	.uleb128 0x42
+	.4byte	.LASF328
 	.byte	0x1
 	.2byte	0x230
 	.4byte	0x122
-	.uleb128 0x3f
-	.4byte	.LASF318
+	.uleb128 0x42
+	.4byte	.LASF330
 	.byte	0x1
 	.2byte	0x230
 	.4byte	0x153
-	.uleb128 0x40
-	.4byte	.LASF222
+	.uleb128 0x43
+	.4byte	.LASF224
 	.byte	0x1
 	.2byte	0x232
-	.4byte	0xf69
-	.uleb128 0x40
-	.4byte	.LASF319
+	.4byte	0x1092
+	.uleb128 0x43
+	.4byte	.LASF331
 	.byte	0x1
 	.2byte	0x233
 	.4byte	0x50
-	.uleb128 0x40
-	.4byte	.LASF257
+	.uleb128 0x43
+	.4byte	.LASF259
 	.byte	0x1
 	.2byte	0x234
 	.4byte	0x50
-	.uleb128 0x41
+	.uleb128 0x44
 	.ascii	"ret\000"
 	.byte	0x1
 	.2byte	0x234
 	.4byte	0x50
-	.uleb128 0x40
-	.4byte	.LASF320
+	.uleb128 0x43
+	.4byte	.LASF279
 	.byte	0x1
 	.2byte	0x235
 	.4byte	0x50
-	.uleb128 0x40
-	.4byte	.LASF321
+	.uleb128 0x43
+	.4byte	.LASF332
 	.byte	0x1
 	.2byte	0x236
 	.4byte	0x50
-	.uleb128 0x41
+	.uleb128 0x44
 	.ascii	"fit\000"
 	.byte	0x1
 	.2byte	0x237
 	.4byte	0x153
-	.uleb128 0x42
-	.4byte	.LASF322
-	.4byte	0x198b
-	.4byte	.LASF325
-	.uleb128 0x40
-	.4byte	.LASF323
+	.uleb128 0x45
+	.4byte	.LASF333
+	.4byte	0x1a51
+	.4byte	.LASF336
+	.uleb128 0x43
+	.4byte	.LASF334
 	.byte	0x1
 	.2byte	0x24f
 	.4byte	0x50
+	.uleb128 0x46
 	.uleb128 0x43
-	.uleb128 0x40
-	.4byte	.LASF324
+	.4byte	.LASF335
 	.byte	0x1
 	.2byte	0x2c3
 	.4byte	0x12d
@@ -5107,244 +5103,244 @@ __func__.8769:
 	.byte	0
 	.uleb128 0xc
 	.4byte	0xe4
-	.4byte	0x198b
+	.4byte	0x1a51
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x1c
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x197b
-	.uleb128 0x3e
-	.4byte	.LASF326
+	.4byte	0x1a41
+	.uleb128 0x41
+	.4byte	.LASF337
 	.byte	0x1
 	.2byte	0x1ba
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x1a61
-	.uleb128 0x3f
-	.4byte	.LASF314
+	.4byte	0x1b27
+	.uleb128 0x42
+	.4byte	.LASF326
 	.byte	0x1
 	.2byte	0x1ba
-	.4byte	0x106c
-	.uleb128 0x3f
-	.4byte	.LASF315
+	.4byte	0x1195
+	.uleb128 0x42
+	.4byte	.LASF327
 	.byte	0x1
 	.2byte	0x1bb
-	.4byte	0x1060
-	.uleb128 0x40
-	.4byte	.LASF257
+	.4byte	0x1189
+	.uleb128 0x43
+	.4byte	.LASF259
 	.byte	0x1
 	.2byte	0x1c6
-	.4byte	0x1a61
-	.uleb128 0x40
-	.4byte	.LASF222
+	.4byte	0x1b27
+	.uleb128 0x43
+	.4byte	.LASF224
 	.byte	0x1
 	.2byte	0x1c7
-	.4byte	0xf69
-	.uleb128 0x40
-	.4byte	.LASF318
+	.4byte	0x1092
+	.uleb128 0x43
+	.4byte	.LASF330
 	.byte	0x1
 	.2byte	0x1c8
-	.4byte	0x1a71
-	.uleb128 0x40
-	.4byte	.LASF327
+	.4byte	0x1b37
+	.uleb128 0x43
+	.4byte	.LASF338
 	.byte	0x1
 	.2byte	0x1c9
 	.4byte	0x50
-	.uleb128 0x40
-	.4byte	.LASF319
+	.uleb128 0x43
+	.4byte	.LASF331
 	.byte	0x1
 	.2byte	0x1ca
 	.4byte	0x50
-	.uleb128 0x40
-	.4byte	.LASF316
+	.uleb128 0x43
+	.4byte	.LASF328
 	.byte	0x1
 	.2byte	0x1cb
 	.4byte	0x50
-	.uleb128 0x40
-	.4byte	.LASF321
+	.uleb128 0x43
+	.4byte	.LASF332
 	.byte	0x1
 	.2byte	0x1cc
 	.4byte	0x50
-	.uleb128 0x41
+	.uleb128 0x44
 	.ascii	"ret\000"
 	.byte	0x1
 	.2byte	0x1cc
 	.4byte	0x50
-	.uleb128 0x41
+	.uleb128 0x44
 	.ascii	"i\000"
 	.byte	0x1
 	.2byte	0x1cc
 	.4byte	0x50
-	.uleb128 0x41
+	.uleb128 0x44
 	.ascii	"fit\000"
 	.byte	0x1
 	.2byte	0x1cd
 	.4byte	0x153
-	.uleb128 0x40
-	.4byte	.LASF328
+	.uleb128 0x43
+	.4byte	.LASF339
 	.byte	0x1
 	.2byte	0x1d3
 	.4byte	0xd7
-	.uleb128 0x40
-	.4byte	.LASF329
+	.uleb128 0x43
+	.4byte	.LASF340
 	.byte	0x1
 	.2byte	0x1d4
 	.4byte	0x4ac
-	.uleb128 0x42
-	.4byte	.LASF322
-	.4byte	0x1a90
-	.4byte	.LASF326
-	.uleb128 0x40
-	.4byte	.LASF323
+	.uleb128 0x45
+	.4byte	.LASF333
+	.4byte	0x1b56
+	.4byte	.LASF337
+	.uleb128 0x43
+	.4byte	.LASF334
 	.byte	0x1
 	.2byte	0x1f1
 	.4byte	0x50
 	.byte	0
 	.uleb128 0xc
 	.4byte	0xd7
-	.4byte	0x1a71
+	.4byte	0x1b37
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x2
 	.byte	0
 	.uleb128 0xc
 	.4byte	0xdd
-	.4byte	0x1a80
-	.uleb128 0x44
+	.4byte	0x1b46
+	.uleb128 0x47
 	.4byte	0xcb
 	.byte	0
 	.uleb128 0xc
 	.4byte	0xe4
-	.4byte	0x1a90
+	.4byte	0x1b56
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x13
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x1a80
-	.uleb128 0x45
-	.4byte	.LASF331
+	.4byte	0x1b46
+	.uleb128 0x2a
+	.4byte	.LASF342
 	.byte	0x1
 	.2byte	0x1b3
 	.4byte	0xd7
-	.4byte	.LFB213
-	.4byte	.LFE213-.LFB213
+	.4byte	.LFB217
+	.4byte	.LFE217-.LFB217
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1ace
-	.uleb128 0x2a
+	.4byte	0x1b94
+	.uleb128 0x2c
 	.ascii	"spl\000"
 	.byte	0x1
 	.2byte	0x1b3
-	.4byte	0x106c
+	.4byte	0x1195
 	.4byte	.LLST59
-	.uleb128 0x46
-	.4byte	.LASF315
+	.uleb128 0x48
+	.4byte	.LASF327
 	.byte	0x1
 	.2byte	0x1b4
-	.4byte	0x1060
+	.4byte	0x1189
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0
-	.uleb128 0x47
-	.4byte	.LASF341
+	.uleb128 0x49
+	.4byte	.LASF352
 	.byte	0x1
 	.2byte	0x181
 	.4byte	0x153
-	.4byte	.LFB212
-	.4byte	.LFE212-.LFB212
+	.4byte	.LFB216
+	.4byte	.LFE216-.LFB216
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1bbd
-	.uleb128 0x29
-	.4byte	.LASF315
+	.4byte	0x1c83
+	.uleb128 0x2b
+	.4byte	.LASF327
 	.byte	0x1
 	.2byte	0x181
-	.4byte	0x1060
+	.4byte	0x1189
 	.4byte	.LLST47
-	.uleb128 0x29
-	.4byte	.LASF316
+	.uleb128 0x2b
+	.4byte	.LASF328
 	.byte	0x1
 	.2byte	0x182
 	.4byte	0x122
 	.4byte	.LLST48
-	.uleb128 0x29
-	.4byte	.LASF318
+	.uleb128 0x2b
+	.4byte	.LASF330
 	.byte	0x1
 	.2byte	0x182
 	.4byte	0x153
 	.4byte	.LLST49
-	.uleb128 0x29
-	.4byte	.LASF319
+	.uleb128 0x2b
+	.4byte	.LASF331
 	.byte	0x1
 	.2byte	0x183
-	.4byte	0x1bbd
+	.4byte	0x1c83
 	.4byte	.LLST50
-	.uleb128 0x48
-	.4byte	.LASF332
+	.uleb128 0x4a
+	.4byte	.LASF343
 	.byte	0x1
 	.2byte	0x185
 	.4byte	0x50
 	.byte	0x3f
-	.uleb128 0x2b
-	.4byte	.LASF333
+	.uleb128 0x2d
+	.4byte	.LASF344
 	.byte	0x1
 	.2byte	0x186
 	.4byte	0x122
 	.4byte	.LLST51
-	.uleb128 0x2b
+	.uleb128 0x2d
 	.4byte	.LASF78
 	.byte	0x1
 	.2byte	0x187
 	.4byte	0x122
 	.4byte	.LLST52
-	.uleb128 0x40
-	.4byte	.LASF334
+	.uleb128 0x43
+	.4byte	.LASF345
 	.byte	0x1
 	.2byte	0x188
 	.4byte	0x50
-	.uleb128 0x2c
+	.uleb128 0x2e
 	.ascii	"fit\000"
 	.byte	0x1
 	.2byte	0x189
 	.4byte	0x153
 	.4byte	.LLST53
-	.uleb128 0x34
-	.4byte	0x2276
+	.uleb128 0x36
+	.4byte	0x230c
 	.4byte	.LBB61
 	.4byte	.LBE61-.LBB61
 	.byte	0x1
 	.2byte	0x1a7
-	.4byte	0x1ba1
-	.uleb128 0x2e
-	.4byte	0x229c
+	.4byte	0x1c67
+	.uleb128 0x31
+	.4byte	0x2332
 	.4byte	.LLST54
-	.uleb128 0x2e
-	.4byte	0x2291
+	.uleb128 0x31
+	.4byte	0x2327
 	.4byte	.LLST55
-	.uleb128 0x2e
-	.4byte	0x2286
+	.uleb128 0x31
+	.4byte	0x231c
 	.4byte	.LLST56
 	.byte	0
-	.uleb128 0x49
-	.4byte	.LVL115
+	.uleb128 0x4b
+	.4byte	.LVL114
 	.uleb128 0x2
 	.byte	0x77
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
@@ -5355,222 +5351,222 @@ __func__.8769:
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0x50
-	.uleb128 0x45
-	.4byte	.LASF335
+	.uleb128 0x2a
+	.4byte	.LASF346
 	.byte	0x1
 	.2byte	0x17c
 	.4byte	0x50
-	.4byte	.LFB211
-	.4byte	.LFE211-.LFB211
+	.4byte	.LFB215
+	.4byte	.LFE215-.LFB215
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1bee
-	.uleb128 0x29
-	.4byte	.LASF300
+	.4byte	0x1cb4
+	.uleb128 0x2b
+	.4byte	.LASF313
 	.byte	0x1
 	.2byte	0x17c
 	.4byte	0x101
 	.4byte	.LLST58
 	.byte	0
-	.uleb128 0x3e
-	.4byte	.LASF336
+	.uleb128 0x41
+	.4byte	.LASF347
 	.byte	0x1
 	.2byte	0x173
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x1c23
-	.uleb128 0x4a
+	.4byte	0x1ce9
+	.uleb128 0x4c
 	.ascii	"fit\000"
 	.byte	0x1
 	.2byte	0x173
 	.4byte	0x3ae
-	.uleb128 0x3f
-	.4byte	.LASF337
+	.uleb128 0x42
+	.4byte	.LASF348
 	.byte	0x1
 	.2byte	0x173
 	.4byte	0x50
-	.uleb128 0x4a
+	.uleb128 0x4c
 	.ascii	"os\000"
 	.byte	0x1
 	.2byte	0x173
-	.4byte	0xd30
+	.4byte	0xd48
 	.byte	0
-	.uleb128 0x3e
-	.4byte	.LASF338
+	.uleb128 0x41
+	.4byte	.LASF349
 	.byte	0x1
 	.2byte	0x15c
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x1c95
-	.uleb128 0x4a
+	.4byte	0x1d5b
+	.uleb128 0x4c
 	.ascii	"fit\000"
 	.byte	0x1
 	.2byte	0x15c
 	.4byte	0x3ae
-	.uleb128 0x3f
-	.4byte	.LASF257
+	.uleb128 0x42
+	.4byte	.LASF259
 	.byte	0x1
 	.2byte	0x15c
 	.4byte	0x50
-	.uleb128 0x3f
-	.4byte	.LASF320
+	.uleb128 0x42
+	.4byte	.LASF279
 	.byte	0x1
 	.2byte	0x15c
 	.4byte	0x50
-	.uleb128 0x3f
-	.4byte	.LASF339
+	.uleb128 0x42
+	.4byte	.LASF350
 	.byte	0x1
 	.2byte	0x15d
 	.4byte	0x153
-	.uleb128 0x3f
-	.4byte	.LASF340
+	.uleb128 0x42
+	.4byte	.LASF351
 	.byte	0x1
 	.2byte	0x15d
-	.4byte	0x106c
-	.uleb128 0x41
+	.4byte	0x1195
+	.uleb128 0x44
 	.ascii	"ret\000"
 	.byte	0x1
 	.2byte	0x15f
 	.4byte	0x50
-	.uleb128 0x40
+	.uleb128 0x43
 	.4byte	.LASF74
 	.byte	0x1
 	.2byte	0x161
 	.4byte	0xfb
-	.uleb128 0x40
-	.4byte	.LASF321
+	.uleb128 0x43
+	.4byte	.LASF332
 	.byte	0x1
 	.2byte	0x162
 	.4byte	0x50
 	.byte	0
-	.uleb128 0x4b
-	.4byte	.LASF342
+	.uleb128 0x4d
+	.4byte	.LASF353
 	.byte	0x1
 	.2byte	0x139
 	.4byte	0x50
-	.4byte	.LFB208
-	.4byte	.LFE208-.LFB208
+	.4byte	.LFB212
+	.4byte	.LFE212-.LFB212
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1db2
-	.uleb128 0x29
-	.4byte	.LASF314
+	.4byte	0x1e78
+	.uleb128 0x2b
+	.4byte	.LASF326
 	.byte	0x1
 	.2byte	0x139
-	.4byte	0x106c
+	.4byte	0x1195
 	.4byte	.LLST39
-	.uleb128 0x29
-	.4byte	.LASF315
+	.uleb128 0x2b
+	.4byte	.LASF327
 	.byte	0x1
 	.2byte	0x13a
-	.4byte	0x1060
+	.4byte	0x1189
 	.4byte	.LLST40
-	.uleb128 0x29
-	.4byte	.LASF316
+	.uleb128 0x2b
+	.4byte	.LASF328
 	.byte	0x1
 	.2byte	0x13a
 	.4byte	0x122
 	.4byte	.LLST41
-	.uleb128 0x2a
+	.uleb128 0x2c
 	.ascii	"fit\000"
 	.byte	0x1
 	.2byte	0x13b
 	.4byte	0x153
 	.4byte	.LLST42
-	.uleb128 0x29
-	.4byte	.LASF257
+	.uleb128 0x2b
+	.4byte	.LASF259
 	.byte	0x1
 	.2byte	0x13b
 	.4byte	0x50
 	.4byte	.LLST43
-	.uleb128 0x29
-	.4byte	.LASF319
+	.uleb128 0x2b
+	.4byte	.LASF331
 	.byte	0x1
 	.2byte	0x13b
 	.4byte	0x122
 	.4byte	.LLST44
-	.uleb128 0x4c
-	.4byte	.LASF222
+	.uleb128 0x4e
+	.4byte	.LASF224
 	.byte	0x1
 	.2byte	0x13d
-	.4byte	0xf69
+	.4byte	0x1092
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -68
-	.uleb128 0x2b
-	.4byte	.LASF321
+	.uleb128 0x2d
+	.4byte	.LASF332
 	.byte	0x1
 	.2byte	0x13e
 	.4byte	0x50
 	.4byte	.LLST45
-	.uleb128 0x2c
+	.uleb128 0x2e
 	.ascii	"ret\000"
 	.byte	0x1
 	.2byte	0x13e
 	.4byte	0x50
 	.4byte	.LLST46
-	.uleb128 0x4d
-	.4byte	.LASF322
-	.4byte	0x1dc2
-	.uleb128 0x39
-	.4byte	.LVL99
-	.4byte	0x22f6
-	.4byte	0x1d71
-	.uleb128 0x36
+	.uleb128 0x4f
+	.4byte	.LASF333
+	.4byte	0x1e88
+	.uleb128 0x3c
+	.4byte	.LVL98
+	.4byte	0x238c
+	.4byte	0x1e37
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 0
 	.byte	0x6
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	.LC0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x1
 	.byte	0x30
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL101
-	.4byte	0x1dc7
-	.4byte	0x1da0
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL100
+	.4byte	0x1e8d
+	.4byte	0x1e66
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x77
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 4
 	.byte	0x6
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x2
 	.byte	0x7d
 	.sleb128 4
@@ -5578,10 +5574,10 @@ __func__.8769:
 	.byte	0x91
 	.sleb128 -68
 	.byte	0
-	.uleb128 0x35
-	.4byte	.LVL103
-	.4byte	0x26b8
-	.uleb128 0x36
+	.uleb128 0x37
+	.4byte	.LVL102
+	.4byte	0x274e
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x3
@@ -5591,76 +5587,76 @@ __func__.8769:
 	.byte	0
 	.uleb128 0xc
 	.4byte	0xe4
-	.4byte	0x1dc2
+	.4byte	0x1e88
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x12
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x1db2
-	.uleb128 0x4e
-	.4byte	.LASF343
+	.4byte	0x1e78
+	.uleb128 0x50
+	.4byte	.LASF354
 	.byte	0x1
 	.byte	0xa8
 	.4byte	0x50
-	.4byte	.LFB207
-	.4byte	.LFE207-.LFB207
+	.4byte	.LFB211
+	.4byte	.LFE211-.LFB211
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2276
-	.uleb128 0x4f
-	.4byte	.LASF315
+	.4byte	0x230c
+	.uleb128 0x51
+	.4byte	.LASF327
 	.byte	0x1
 	.byte	0xa8
-	.4byte	0x1060
+	.4byte	0x1189
 	.4byte	.LLST15
-	.uleb128 0x4f
-	.4byte	.LASF316
+	.uleb128 0x51
+	.4byte	.LASF328
 	.byte	0x1
 	.byte	0xa8
 	.4byte	0x122
 	.4byte	.LLST16
-	.uleb128 0x50
+	.uleb128 0x52
 	.ascii	"fit\000"
 	.byte	0x1
 	.byte	0xa9
 	.4byte	0x153
 	.4byte	.LLST17
-	.uleb128 0x4f
-	.4byte	.LASF319
+	.uleb128 0x51
+	.4byte	.LASF331
 	.byte	0x1
 	.byte	0xa9
 	.4byte	0x122
 	.4byte	.LLST18
-	.uleb128 0x4f
-	.4byte	.LASF321
+	.uleb128 0x51
+	.4byte	.LASF332
 	.byte	0x1
 	.byte	0xa9
 	.4byte	0x50
 	.4byte	.LLST19
-	.uleb128 0x4f
-	.4byte	.LASF222
+	.uleb128 0x51
+	.4byte	.LASF224
 	.byte	0x1
 	.byte	0xaa
-	.4byte	0x106c
+	.4byte	0x1195
 	.4byte	.LLST20
-	.uleb128 0x51
-	.4byte	.LASF344
+	.uleb128 0x53
+	.4byte	.LASF355
 	.byte	0x1
 	.byte	0xac
 	.4byte	0x50
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -60
-	.uleb128 0x51
-	.4byte	.LASF345
+	.uleb128 0x53
+	.4byte	.LASF356
 	.byte	0x1
 	.byte	0xad
 	.4byte	0x10c
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -56
-	.uleb128 0x52
+	.uleb128 0x54
 	.ascii	"len\000"
 	.byte	0x1
 	.byte	0xae
@@ -5668,34 +5664,34 @@ __func__.8769:
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -52
-	.uleb128 0x53
+	.uleb128 0x55
 	.4byte	.LASF78
 	.byte	0x1
 	.byte	0xaf
 	.4byte	0x122
-	.uleb128 0x51
-	.4byte	.LASF346
+	.uleb128 0x53
+	.4byte	.LASF357
 	.byte	0x1
 	.byte	0xb0
 	.4byte	0x122
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -48
-	.uleb128 0x51
-	.4byte	.LASF263
+	.uleb128 0x53
+	.4byte	.LASF265
 	.byte	0x1
 	.byte	0xb0
 	.4byte	0x122
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -44
-	.uleb128 0x54
-	.4byte	.LASF347
+	.uleb128 0x56
+	.4byte	.LASF358
 	.byte	0x1
 	.byte	0xb0
 	.4byte	0x122
 	.4byte	.LLST21
-	.uleb128 0x52
+	.uleb128 0x54
 	.ascii	"src\000"
 	.byte	0x1
 	.byte	0xb1
@@ -5703,352 +5699,336 @@ __func__.8769:
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -40
-	.uleb128 0x54
-	.4byte	.LASF348
+	.uleb128 0x56
+	.4byte	.LASF359
 	.byte	0x1
 	.byte	0xb2
 	.4byte	0x122
 	.4byte	.LLST22
-	.uleb128 0x53
-	.4byte	.LASF349
+	.uleb128 0x55
+	.4byte	.LASF360
 	.byte	0x1
 	.byte	0xb3
 	.4byte	0x50
-	.uleb128 0x55
-	.4byte	.LASF332
+	.uleb128 0x57
+	.4byte	.LASF343
 	.byte	0x1
 	.byte	0xb4
 	.4byte	0x50
 	.byte	0x3f
-	.uleb128 0x51
-	.4byte	.LASF350
+	.uleb128 0x53
+	.4byte	.LASF361
 	.byte	0x1
 	.byte	0xb5
 	.4byte	0x12d
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -61
-	.uleb128 0x54
+	.uleb128 0x56
 	.4byte	.LASF62
 	.byte	0x1
 	.byte	0xb5
 	.4byte	0x12d
 	.4byte	.LLST23
-	.uleb128 0x51
-	.4byte	.LASF351
+	.uleb128 0x53
+	.4byte	.LASF362
 	.byte	0x1
 	.byte	0xb6
 	.4byte	0x3ae
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -36
-	.uleb128 0x54
-	.4byte	.LASF352
+	.uleb128 0x56
+	.4byte	.LASF363
 	.byte	0x1
 	.byte	0xb7
 	.4byte	0x18e
 	.4byte	.LLST24
-	.uleb128 0x54
-	.4byte	.LASF353
+	.uleb128 0x57
+	.4byte	.LASF364
 	.byte	0x1
 	.byte	0xb8
 	.4byte	0x18e
-	.4byte	.LLST25
-	.uleb128 0x54
-	.4byte	.LASF354
+	.byte	0
+	.uleb128 0x56
+	.4byte	.LASF365
 	.byte	0x1
 	.byte	0xb9
 	.4byte	0x4d2
-	.4byte	.LLST26
-	.uleb128 0x56
+	.4byte	.LLST25
+	.uleb128 0x58
 	.ascii	"out\000"
 	.byte	0x1
 	.2byte	0x12f
-	.4byte	.L31
-	.uleb128 0x57
-	.4byte	0x22a8
+	.4byte	.LDL1
+	.uleb128 0x59
+	.4byte	0x233e
 	.4byte	.LBB35
 	.4byte	.Ldebug_ranges0+0
 	.byte	0x1
 	.byte	0xe8
-	.4byte	0x1f58
-	.uleb128 0x2e
-	.4byte	0x22c3
+	.4byte	0x201b
+	.uleb128 0x31
+	.4byte	0x2359
+	.4byte	.LLST26
+	.uleb128 0x31
+	.4byte	0x234e
 	.4byte	.LLST27
-	.uleb128 0x2e
-	.4byte	0x22b8
-	.4byte	.LLST28
 	.byte	0
-	.uleb128 0x58
-	.4byte	0x2276
+	.uleb128 0x5a
+	.4byte	0x230c
 	.4byte	.LBB40
 	.4byte	.LBE40-.LBB40
 	.byte	0x1
 	.byte	0xe9
-	.4byte	0x1f83
-	.uleb128 0x2f
-	.4byte	0x229c
-	.uleb128 0x2e
-	.4byte	0x2291
+	.4byte	0x204a
+	.uleb128 0x31
+	.4byte	0x2332
+	.4byte	.LLST28
+	.uleb128 0x31
+	.4byte	0x2327
 	.4byte	.LLST29
-	.uleb128 0x2e
-	.4byte	0x2286
+	.uleb128 0x31
+	.4byte	0x231c
 	.4byte	.LLST30
 	.byte	0
-	.uleb128 0x57
-	.4byte	0x22cf
+	.uleb128 0x59
+	.4byte	0x2365
 	.4byte	.LBB42
 	.4byte	.Ldebug_ranges0+0x20
 	.byte	0x1
 	.byte	0xf2
-	.4byte	0x1fa9
-	.uleb128 0x2e
-	.4byte	0x22ea
+	.4byte	0x2070
+	.uleb128 0x31
+	.4byte	0x2380
 	.4byte	.LLST31
-	.uleb128 0x2e
-	.4byte	0x22df
+	.uleb128 0x31
+	.4byte	0x2375
 	.4byte	.LLST32
 	.byte	0
-	.uleb128 0x2d
-	.4byte	0x2482
-	.4byte	.LBB47
+	.uleb128 0x30
+	.4byte	0x2518
+	.4byte	.LBB45
 	.4byte	.Ldebug_ranges0+0x38
 	.byte	0x1
 	.2byte	0x10b
-	.4byte	0x1ff4
-	.uleb128 0x2e
-	.4byte	0x24ab
+	.4byte	0x20bb
+	.uleb128 0x31
+	.4byte	0x2541
 	.4byte	.LLST33
-	.uleb128 0x2e
-	.4byte	0x249f
+	.uleb128 0x31
+	.4byte	0x2535
 	.4byte	.LLST34
-	.uleb128 0x2e
-	.4byte	0x2493
+	.uleb128 0x31
+	.4byte	0x2529
 	.4byte	.LLST35
-	.uleb128 0x35
-	.4byte	.LVL77
-	.4byte	0x26c3
-	.uleb128 0x36
+	.uleb128 0x37
+	.4byte	.LVL68
+	.4byte	0x2759
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x74
+	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x1
 	.byte	0x30
 	.byte	0
 	.byte	0
-	.uleb128 0x34
-	.4byte	0x2482
+	.uleb128 0x36
+	.4byte	0x2518
 	.4byte	.LBB53
 	.4byte	.LBE53-.LBB53
 	.byte	0x1
 	.2byte	0x110
-	.4byte	0x202d
-	.uleb128 0x2e
-	.4byte	0x24ab
+	.4byte	0x20f4
+	.uleb128 0x31
+	.4byte	0x2541
 	.4byte	.LLST36
-	.uleb128 0x2e
-	.4byte	0x249f
+	.uleb128 0x31
+	.4byte	0x2535
 	.4byte	.LLST37
-	.uleb128 0x2e
-	.4byte	0x2493
+	.uleb128 0x31
+	.4byte	0x2529
 	.4byte	.LLST38
-	.uleb128 0x3a
-	.4byte	.LVL86
-	.4byte	0x26c3
+	.uleb128 0x3d
+	.4byte	.LVL85
+	.4byte	0x2759
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x3c
 	.4byte	.LVL45
-	.4byte	0x26cf
-	.4byte	0x204d
-	.uleb128 0x36
+	.4byte	0x2765
+	.4byte	0x2114
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x74
+	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -61
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x3c
 	.4byte	.LVL46
-	.4byte	0x26db
-	.4byte	0x206d
-	.uleb128 0x36
+	.4byte	0x2771
+	.4byte	0x2134
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x74
+	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -44
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x3c
 	.4byte	.LVL47
-	.4byte	0x26e7
-	.4byte	0x208d
-	.uleb128 0x36
+	.4byte	0x277d
+	.4byte	0x2154
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x74
+	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -48
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x3c
 	.4byte	.LVL48
-	.4byte	0x26f3
-	.4byte	0x20ad
-	.uleb128 0x36
+	.4byte	0x2789
+	.4byte	0x2174
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x74
+	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -60
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x3c
 	.4byte	.LVL49
-	.4byte	0x26ff
-	.4byte	0x20cd
-	.uleb128 0x36
+	.4byte	0x2795
+	.4byte	0x2194
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x74
+	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -60
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL52
-	.4byte	0x270b
-	.4byte	0x20ed
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL51
+	.4byte	0x27a1
+	.4byte	0x21b4
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x74
+	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -52
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x3c
 	.4byte	.LVL54
-	.4byte	0x2717
-	.4byte	0x2101
-	.uleb128 0x36
+	.4byte	0x27ad
+	.4byte	0x21c8
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x40
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL61
-	.4byte	0x2723
-	.4byte	0x211b
-	.uleb128 0x36
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x36
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x59
+	.uleb128 0x5b
 	.4byte	.LVL64
-	.4byte	0x2139
-	.uleb128 0x36
+	.4byte	0x21e6
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x7a
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x78
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x4
@@ -6056,137 +6036,103 @@ __func__.8769:
 	.sleb128 -80
 	.byte	0x6
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL65
-	.4byte	0x2697
-	.4byte	0x2150
-	.uleb128 0x36
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL66
-	.4byte	0x272f
-	.4byte	0x2173
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL70
+	.4byte	0x26f2
+	.4byte	0x220e
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x36
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC13
-	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL79
-	.4byte	0x265c
-	.4byte	0x219b
-	.uleb128 0x36
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC9
-	.uleb128 0x36
+	.4byte	.LC8
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x1
 	.byte	0x30
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL80
-	.4byte	0x2697
-	.4byte	0x21be
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL71
+	.4byte	0x2709
+	.4byte	0x2231
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC10
-	.uleb128 0x36
+	.4byte	.LC9
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x77
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x78
 	.sleb128 0
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL81
-	.4byte	0x273b
-	.4byte	0x21d8
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL72
+	.4byte	0x27b9
+	.4byte	0x224b
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x74
+	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x76
 	.sleb128 0
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL82
-	.4byte	0x2747
-	.4byte	0x2205
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL73
+	.4byte	0x27c5
+	.4byte	0x2278
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x74
+	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -44
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -40
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x2
 	.byte	0x7d
 	.sleb128 0
@@ -6194,165 +6140,188 @@ __func__.8769:
 	.byte	0x91
 	.sleb128 -56
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL83
-	.4byte	0x2753
-	.4byte	0x221c
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL74
+	.4byte	0x27d1
+	.4byte	0x228f
+	.uleb128 0x38
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC11
+	.byte	0
+	.uleb128 0x3d
+	.4byte	.LVL75
+	.4byte	0x27dc
+	.uleb128 0x3c
+	.4byte	.LVL76
+	.4byte	0x27e8
+	.4byte	0x22bb
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x38
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x38
+	.uleb128 0x1
+	.byte	0x52
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	.LC12
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LVL84
-	.4byte	0x275e
-	.uleb128 0x39
-	.4byte	.LVL87
-	.4byte	0x2697
-	.4byte	0x223c
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL86
+	.4byte	0x2709
+	.4byte	0x22d2
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC11
+	.4byte	.LC10
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL91
-	.4byte	0x276a
-	.4byte	0x2262
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL90
+	.4byte	0x27f4
+	.4byte	0x22f8
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x74
+	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -36
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -56
 	.byte	0
-	.uleb128 0x35
-	.4byte	.LVL92
-	.4byte	0x2753
-	.uleb128 0x36
+	.uleb128 0x37
+	.4byte	.LVL91
+	.4byte	0x27d1
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC8
+	.4byte	.LC7
 	.byte	0
 	.byte	0
-	.uleb128 0x5a
-	.4byte	.LASF355
+	.uleb128 0x5c
+	.4byte	.LASF366
 	.byte	0x1
 	.byte	0x8c
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x22a8
-	.uleb128 0x5b
-	.4byte	.LASF315
+	.4byte	0x233e
+	.uleb128 0x5d
+	.4byte	.LASF327
 	.byte	0x1
 	.byte	0x8c
-	.4byte	0x1060
-	.uleb128 0x5b
-	.4byte	.LASF356
+	.4byte	0x1189
+	.uleb128 0x5d
+	.4byte	.LASF367
 	.byte	0x1
 	.byte	0x8c
 	.4byte	0x50
-	.uleb128 0x5b
-	.4byte	.LASF344
+	.uleb128 0x5d
+	.4byte	.LASF355
 	.byte	0x1
 	.byte	0x8d
 	.4byte	0x50
 	.byte	0
-	.uleb128 0x5a
-	.4byte	.LASF357
+	.uleb128 0x5c
+	.4byte	.LASF368
 	.byte	0x1
 	.byte	0x7e
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x22cf
-	.uleb128 0x5b
-	.4byte	.LASF315
+	.4byte	0x2365
+	.uleb128 0x5d
+	.4byte	.LASF327
 	.byte	0x1
 	.byte	0x7e
-	.4byte	0x1060
-	.uleb128 0x5b
-	.4byte	.LASF344
+	.4byte	0x1189
+	.uleb128 0x5d
+	.4byte	.LASF355
 	.byte	0x1
 	.byte	0x7e
 	.4byte	0x50
 	.byte	0
-	.uleb128 0x5a
-	.4byte	.LASF358
+	.uleb128 0x5c
+	.4byte	.LASF369
 	.byte	0x1
 	.byte	0x71
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x22f6
-	.uleb128 0x5b
-	.4byte	.LASF315
+	.4byte	0x238c
+	.uleb128 0x5d
+	.4byte	.LASF327
 	.byte	0x1
 	.byte	0x71
-	.4byte	0x1060
-	.uleb128 0x5b
-	.4byte	.LASF344
+	.4byte	0x1189
+	.uleb128 0x5d
+	.4byte	.LASF355
 	.byte	0x1
 	.byte	0x71
 	.4byte	0x50
 	.byte	0
-	.uleb128 0x5c
-	.4byte	.LASF359
+	.uleb128 0x5e
+	.4byte	.LASF370
 	.byte	0x1
 	.byte	0x5b
 	.4byte	0x50
-	.4byte	.LFB203
-	.4byte	.LFE203-.LFB203
+	.4byte	.LFB207
+	.4byte	.LFE207-.LFB207
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x23be
-	.uleb128 0x50
+	.4byte	0x2454
+	.uleb128 0x52
 	.ascii	"fit\000"
 	.byte	0x1
 	.byte	0x5b
 	.4byte	0x3ae
 	.4byte	.LLST9
-	.uleb128 0x4f
-	.4byte	.LASF257
+	.uleb128 0x51
+	.4byte	.LASF259
 	.byte	0x1
 	.byte	0x5b
 	.4byte	0x50
 	.4byte	.LLST10
-	.uleb128 0x4f
+	.uleb128 0x51
 	.4byte	.LASF62
 	.byte	0x1
 	.byte	0x5c
 	.4byte	0xd7
 	.4byte	.LLST11
-	.uleb128 0x4f
-	.4byte	.LASF320
+	.uleb128 0x51
+	.4byte	.LASF279
 	.byte	0x1
 	.byte	0x5c
 	.4byte	0x50
 	.4byte	.LLST12
-	.uleb128 0x52
+	.uleb128 0x54
 	.ascii	"str\000"
 	.byte	0x1
 	.byte	0x5e
@@ -6360,64 +6329,64 @@ __func__.8769:
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -20
-	.uleb128 0x5d
+	.uleb128 0x5f
 	.ascii	"err\000"
 	.byte	0x1
 	.byte	0x5f
 	.4byte	0x50
 	.4byte	.LLST13
-	.uleb128 0x54
-	.4byte	.LASF321
+	.uleb128 0x56
+	.4byte	.LASF332
 	.byte	0x1
 	.byte	0x60
 	.4byte	0x50
 	.4byte	.LLST14
-	.uleb128 0x39
+	.uleb128 0x3c
 	.4byte	.LVL34
-	.4byte	0x24f6
-	.4byte	0x23a7
-	.uleb128 0x36
+	.4byte	0x258c
+	.4byte	0x243d
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x3
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x52
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x53
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -20
-	.uleb128 0x5e
-	.4byte	0x23d9
+	.uleb128 0x60
+	.4byte	0x246f
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
 	.byte	0
-	.uleb128 0x35
+	.uleb128 0x37
 	.4byte	.LVL36
-	.4byte	0x2776
-	.uleb128 0x36
+	.4byte	0x2800
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
@@ -6425,64 +6394,64 @@ __func__.8769:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x5a
-	.4byte	.LASF360
+	.uleb128 0x5c
+	.4byte	.LASF371
 	.byte	0x1
 	.byte	0x25
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x2446
-	.uleb128 0x5f
+	.4byte	0x24dc
+	.uleb128 0x61
 	.ascii	"fit\000"
 	.byte	0x1
 	.byte	0x25
 	.4byte	0x3ae
-	.uleb128 0x5b
-	.4byte	.LASF257
+	.uleb128 0x5d
+	.4byte	.LASF259
 	.byte	0x1
 	.byte	0x25
 	.4byte	0x50
-	.uleb128 0x5b
+	.uleb128 0x5d
 	.4byte	.LASF62
 	.byte	0x1
 	.byte	0x26
 	.4byte	0xd7
-	.uleb128 0x5b
-	.4byte	.LASF320
+	.uleb128 0x5d
+	.4byte	.LASF279
 	.byte	0x1
 	.byte	0x26
 	.4byte	0x50
-	.uleb128 0x5b
-	.4byte	.LASF361
+	.uleb128 0x5d
+	.4byte	.LASF372
 	.byte	0x1
 	.byte	0x27
-	.4byte	0x2446
-	.uleb128 0x53
+	.4byte	0x24dc
+	.uleb128 0x55
 	.4byte	.LASF74
 	.byte	0x1
 	.byte	0x29
 	.4byte	0xd7
-	.uleb128 0x60
+	.uleb128 0x62
 	.ascii	"str\000"
 	.byte	0x1
 	.byte	0x29
 	.4byte	0xd7
-	.uleb128 0x53
-	.4byte	.LASF321
+	.uleb128 0x55
+	.4byte	.LASF332
 	.byte	0x1
 	.byte	0x2a
 	.4byte	0x50
-	.uleb128 0x53
-	.4byte	.LASF362
+	.uleb128 0x55
+	.4byte	.LASF373
 	.byte	0x1
 	.byte	0x2b
 	.4byte	0x50
-	.uleb128 0x60
+	.uleb128 0x62
 	.ascii	"len\000"
 	.byte	0x1
 	.byte	0x2c
 	.4byte	0x50
-	.uleb128 0x60
+	.uleb128 0x62
 	.ascii	"i\000"
 	.byte	0x1
 	.byte	0x2c
@@ -6491,256 +6460,256 @@ __func__.8769:
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0xfb
-	.uleb128 0x61
-	.4byte	.LASF363
+	.uleb128 0x63
+	.4byte	.LASF374
 	.byte	0x1
 	.byte	0x14
 	.4byte	0x50
-	.4byte	.LFB201
-	.4byte	.LFE201-.LFB201
+	.4byte	.LFB205
+	.4byte	.LFE205-.LFB205
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2482
-	.uleb128 0x50
+	.4byte	0x2518
+	.uleb128 0x52
 	.ascii	"fit\000"
 	.byte	0x1
 	.byte	0x14
 	.4byte	0x3ae
 	.4byte	.LLST57
-	.uleb128 0x62
-	.4byte	.LASF323
+	.uleb128 0x64
+	.4byte	.LASF334
 	.byte	0x1
 	.byte	0x14
 	.4byte	0x50
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0
-	.uleb128 0x3e
-	.4byte	.LASF364
+	.uleb128 0x41
+	.4byte	.LASF375
 	.byte	0x2
 	.2byte	0x3ea
 	.4byte	0xd7
 	.byte	0x3
-	.4byte	0x24b8
-	.uleb128 0x3f
-	.4byte	.LASF365
+	.4byte	0x254e
+	.uleb128 0x42
+	.4byte	.LASF376
 	.byte	0x2
 	.2byte	0x3ea
 	.4byte	0x3ae
-	.uleb128 0x3f
-	.4byte	.LASF337
+	.uleb128 0x42
+	.4byte	.LASF348
 	.byte	0x2
 	.2byte	0x3eb
 	.4byte	0x50
-	.uleb128 0x4a
+	.uleb128 0x4c
 	.ascii	"len\000"
 	.byte	0x2
 	.2byte	0x3eb
-	.4byte	0x1bbd
+	.4byte	0x1c83
 	.byte	0
-	.uleb128 0x3e
-	.4byte	.LASF366
+	.uleb128 0x41
+	.4byte	.LASF377
 	.byte	0x2
 	.2byte	0x2e0
 	.4byte	0x13d
 	.byte	0x3
-	.4byte	0x24d6
-	.uleb128 0x4a
+	.4byte	0x256c
+	.uleb128 0x4c
 	.ascii	"hdr\000"
 	.byte	0x2
 	.2byte	0x2e0
-	.4byte	0x24d6
+	.4byte	0x256c
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0xac0
-	.uleb128 0x5a
-	.4byte	.LASF367
+	.4byte	0xad8
+	.uleb128 0x5c
+	.4byte	.LASF378
 	.byte	0x1a
 	.byte	0x70
 	.4byte	0x70
 	.byte	0x3
-	.4byte	0x24f6
-	.uleb128 0x5f
+	.4byte	0x258c
+	.uleb128 0x61
 	.ascii	"x\000"
 	.byte	0x1a
 	.byte	0x70
 	.4byte	0x70
 	.byte	0
-	.uleb128 0x63
-	.4byte	0x23be
-	.4byte	.LFB217
-	.4byte	.LFE217-.LFB217
+	.uleb128 0x65
+	.4byte	0x2454
+	.4byte	.LFB221
+	.4byte	.LFE221-.LFB221
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x263d
-	.uleb128 0x2e
-	.4byte	0x23ce
+	.4byte	0x26d3
+	.uleb128 0x31
+	.4byte	0x2464
 	.4byte	.LLST0
-	.uleb128 0x2e
-	.4byte	0x23e4
+	.uleb128 0x31
+	.4byte	0x247a
 	.4byte	.LLST1
-	.uleb128 0x2e
-	.4byte	0x23ef
+	.uleb128 0x31
+	.4byte	0x2485
 	.4byte	.LLST2
-	.uleb128 0x2e
-	.4byte	0x23fa
+	.uleb128 0x31
+	.4byte	0x2490
 	.4byte	.LLST3
-	.uleb128 0x64
-	.4byte	0x23d9
+	.uleb128 0x66
+	.4byte	0x246f
 	.uleb128 0x6
 	.byte	0xfa
-	.4byte	0x23d9
+	.4byte	0x246f
 	.byte	0x9f
-	.uleb128 0x32
-	.4byte	0x2405
+	.uleb128 0x34
+	.4byte	0x249b
 	.4byte	.LLST4
-	.uleb128 0x32
-	.4byte	0x2410
+	.uleb128 0x34
+	.4byte	0x24a6
 	.4byte	.LLST5
-	.uleb128 0x32
-	.4byte	0x241b
+	.uleb128 0x34
+	.4byte	0x24b1
 	.4byte	.LLST6
-	.uleb128 0x32
-	.4byte	0x2426
+	.uleb128 0x34
+	.4byte	0x24bc
 	.4byte	.LLST7
-	.uleb128 0x31
-	.4byte	0x2431
+	.uleb128 0x33
+	.4byte	0x24c7
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -28
-	.uleb128 0x32
-	.4byte	0x243c
+	.uleb128 0x34
+	.4byte	0x24d2
 	.4byte	.LLST8
-	.uleb128 0x39
+	.uleb128 0x3c
 	.4byte	.LVL1
-	.4byte	0x2782
-	.4byte	0x2582
-	.uleb128 0x36
+	.4byte	0x280c
+	.4byte	0x2618
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x3c
 	.4byte	.LVL5
-	.4byte	0x2697
-	.4byte	0x2599
-	.uleb128 0x36
+	.4byte	0x2709
+	.4byte	0x262f
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	.LC4
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x3c
 	.4byte	.LVL6
-	.4byte	0x278e
-	.4byte	0x25b3
-	.uleb128 0x36
+	.4byte	0x2818
+	.4byte	0x2649
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x3c
 	.4byte	.LVL11
-	.4byte	0x265c
-	.4byte	0x25d9
-	.uleb128 0x36
+	.4byte	0x26f2
+	.4byte	0x266f
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x77
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -28
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x3c
 	.4byte	.LVL13
-	.4byte	0x2697
-	.4byte	0x25ed
-	.uleb128 0x36
+	.4byte	0x2709
+	.4byte	0x2683
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x78
 	.sleb128 0
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x3c
 	.4byte	.LVL14
-	.4byte	0x2799
-	.4byte	0x2607
-	.uleb128 0x36
+	.4byte	0x2823
+	.4byte	0x269d
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x76
 	.sleb128 0
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x3c
 	.4byte	.LVL18
-	.4byte	0x265c
-	.4byte	0x262d
-	.uleb128 0x36
+	.4byte	0x26f2
+	.4byte	0x26c3
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x78
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -28
 	.byte	0
-	.uleb128 0x35
+	.uleb128 0x37
 	.4byte	.LVL23
-	.4byte	0x27a4
-	.uleb128 0x36
+	.4byte	0x282e
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x1
@@ -6749,159 +6718,154 @@ __func__.8769:
 	.byte	0
 	.uleb128 0xc
 	.4byte	0xdd
-	.4byte	0x2650
-	.uleb128 0x65
+	.4byte	0x26e6
+	.uleb128 0x67
 	.4byte	0xcb
-	.4byte	0x1865
+	.4byte	0x197a
 	.byte	0
-	.uleb128 0x66
-	.4byte	.LASF368
-	.4byte	.LASF368
+	.uleb128 0x68
+	.4byte	.LASF379
+	.4byte	.LASF379
 	.byte	0x2
 	.2byte	0x3f5
-	.uleb128 0x66
-	.4byte	.LASF369
-	.4byte	.LASF369
+	.uleb128 0x68
+	.4byte	.LASF380
+	.4byte	.LASF380
 	.byte	0x1b
 	.2byte	0x2b2
-	.uleb128 0x67
-	.4byte	.LASF370
-	.4byte	.LASF370
+	.uleb128 0x69
+	.4byte	.LASF381
+	.4byte	.LASF381
 	.byte	0x1c
 	.byte	0x98
-	.uleb128 0x66
-	.4byte	.LASF371
-	.4byte	.LASF371
+	.uleb128 0x69
+	.4byte	.LASF382
+	.4byte	.LASF382
+	.byte	0x1d
+	.byte	0x13
+	.uleb128 0x68
+	.4byte	.LASF383
+	.4byte	.LASF383
 	.byte	0x1b
 	.2byte	0x1a8
-	.uleb128 0x66
-	.4byte	.LASF372
-	.4byte	.LASF372
+	.uleb128 0x68
+	.4byte	.LASF384
+	.4byte	.LASF384
 	.byte	0x2
 	.2byte	0x42e
-	.uleb128 0x66
-	.4byte	.LASF373
-	.4byte	.LASF373
+	.uleb128 0x68
+	.4byte	.LASF385
+	.4byte	.LASF385
 	.byte	0x2
 	.2byte	0x437
-	.uleb128 0x67
-	.4byte	.LASF374
-	.4byte	.LASF374
-	.byte	0x1d
-	.byte	0x13
-	.uleb128 0x67
-	.4byte	.LASF375
-	.4byte	.LASF375
+	.uleb128 0x69
+	.4byte	.LASF386
+	.4byte	.LASF386
 	.byte	0xc
 	.byte	0xbd
-	.uleb128 0x67
-	.4byte	.LASF376
-	.4byte	.LASF376
+	.uleb128 0x69
+	.4byte	.LASF387
+	.4byte	.LASF387
 	.byte	0x8
 	.byte	0x27
-	.uleb128 0x67
-	.4byte	.LASF377
-	.4byte	.LASF377
+	.uleb128 0x69
+	.4byte	.LASF388
+	.4byte	.LASF388
 	.byte	0x1c
 	.byte	0xce
-	.uleb128 0x66
-	.4byte	.LASF378
-	.4byte	.LASF378
+	.uleb128 0x68
+	.4byte	.LASF389
+	.4byte	.LASF389
 	.byte	0x1b
 	.2byte	0x1c1
-	.uleb128 0x66
-	.4byte	.LASF379
-	.4byte	.LASF379
+	.uleb128 0x68
+	.4byte	.LASF390
+	.4byte	.LASF390
 	.byte	0x2
 	.2byte	0x3f8
-	.uleb128 0x66
-	.4byte	.LASF380
-	.4byte	.LASF380
+	.uleb128 0x68
+	.4byte	.LASF391
+	.4byte	.LASF391
 	.byte	0x2
 	.2byte	0x3fa
-	.uleb128 0x66
-	.4byte	.LASF381
-	.4byte	.LASF381
+	.uleb128 0x68
+	.4byte	.LASF392
+	.4byte	.LASF392
 	.byte	0x2
 	.2byte	0x3fc
-	.uleb128 0x66
-	.4byte	.LASF382
-	.4byte	.LASF382
+	.uleb128 0x68
+	.4byte	.LASF393
+	.4byte	.LASF393
 	.byte	0x2
 	.2byte	0x402
-	.uleb128 0x66
-	.4byte	.LASF383
-	.4byte	.LASF383
+	.uleb128 0x68
+	.4byte	.LASF394
+	.4byte	.LASF394
 	.byte	0x2
 	.2byte	0x401
-	.uleb128 0x66
-	.4byte	.LASF384
-	.4byte	.LASF384
+	.uleb128 0x68
+	.4byte	.LASF395
+	.4byte	.LASF395
 	.byte	0x2
 	.2byte	0x404
-	.uleb128 0x66
-	.4byte	.LASF385
-	.4byte	.LASF385
+	.uleb128 0x68
+	.4byte	.LASF396
+	.4byte	.LASF396
 	.byte	0x19
 	.2byte	0x371
-	.uleb128 0x66
-	.4byte	.LASF386
-	.4byte	.LASF386
-	.byte	0x2
-	.2byte	0x3f9
-	.uleb128 0x66
-	.4byte	.LASF387
-	.4byte	.LASF387
-	.byte	0x2
-	.2byte	0x59d
-	.uleb128 0x66
-	.4byte	.LASF388
-	.4byte	.LASF388
+	.uleb128 0x68
+	.4byte	.LASF397
+	.4byte	.LASF397
 	.byte	0x2
 	.2byte	0x429
-	.uleb128 0x66
-	.4byte	.LASF389
-	.4byte	.LASF389
+	.uleb128 0x68
+	.4byte	.LASF398
+	.4byte	.LASF398
 	.byte	0x2
 	.2byte	0x596
-	.uleb128 0x67
-	.4byte	.LASF390
-	.4byte	.LASF390
+	.uleb128 0x69
+	.4byte	.LASF399
+	.4byte	.LASF399
 	.byte	0x1d
 	.byte	0x11
-	.uleb128 0x66
-	.4byte	.LASF391
-	.4byte	.LASF391
+	.uleb128 0x68
+	.4byte	.LASF400
+	.4byte	.LASF400
 	.byte	0x19
 	.2byte	0x16d
-	.uleb128 0x66
-	.4byte	.LASF392
-	.4byte	.LASF392
+	.uleb128 0x68
+	.4byte	.LASF401
+	.4byte	.LASF401
+	.byte	0x2
+	.2byte	0x59d
+	.uleb128 0x68
+	.4byte	.LASF402
+	.4byte	.LASF402
 	.byte	0x2
 	.2byte	0x3ff
-	.uleb128 0x66
-	.4byte	.LASF393
-	.4byte	.LASF393
+	.uleb128 0x68
+	.4byte	.LASF403
+	.4byte	.LASF403
 	.byte	0x1b
 	.2byte	0x182
-	.uleb128 0x66
-	.4byte	.LASF394
-	.4byte	.LASF394
+	.uleb128 0x68
+	.4byte	.LASF404
+	.4byte	.LASF404
 	.byte	0x2
 	.2byte	0x5ab
-	.uleb128 0x67
-	.4byte	.LASF395
-	.4byte	.LASF395
+	.uleb128 0x69
+	.4byte	.LASF405
+	.4byte	.LASF405
 	.byte	0x1b
 	.byte	0xa9
-	.uleb128 0x67
-	.4byte	.LASF396
-	.4byte	.LASF396
+	.uleb128 0x69
+	.4byte	.LASF406
+	.4byte	.LASF406
 	.byte	0x1b
 	.byte	0xb6
-	.uleb128 0x67
-	.4byte	.LASF397
-	.4byte	.LASF397
+	.uleb128 0x69
+	.4byte	.LASF407
+	.4byte	.LASF407
 	.byte	0x8
 	.byte	0x33
 	.byte	0
@@ -7234,6 +7198,21 @@ __func__.8769:
 	.byte	0
 	.byte	0
 	.uleb128 0x1d
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x1e
 	.uleb128 0x21
 	.byte	0
 	.uleb128 0x49
@@ -7242,7 +7221,7 @@ __func__.8769:
 	.uleb128 0x5
 	.byte	0
 	.byte	0
-	.uleb128 0x1e
+	.uleb128 0x1f
 	.uleb128 0x13
 	.byte	0x1
 	.uleb128 0x3
@@ -7257,7 +7236,7 @@ __func__.8769:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x1f
+	.uleb128 0x20
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7274,7 +7253,7 @@ __func__.8769:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x20
+	.uleb128 0x21
 	.uleb128 0x4
 	.byte	0x1
 	.uleb128 0xb
@@ -7289,7 +7268,7 @@ __func__.8769:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x21
+	.uleb128 0x22
 	.uleb128 0x4
 	.byte	0x1
 	.uleb128 0xb
@@ -7304,7 +7283,7 @@ __func__.8769:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x22
+	.uleb128 0x23
 	.uleb128 0x13
 	.byte	0x1
 	.uleb128 0x3
@@ -7319,7 +7298,7 @@ __func__.8769:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x23
+	.uleb128 0x24
 	.uleb128 0xd
 	.byte	0
 	.uleb128 0x3
@@ -7334,7 +7313,7 @@ __func__.8769:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x24
+	.uleb128 0x25
 	.uleb128 0x16
 	.byte	0
 	.uleb128 0x3
@@ -7347,7 +7326,7 @@ __func__.8769:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x25
+	.uleb128 0x26
 	.uleb128 0xd
 	.byte	0
 	.uleb128 0x3
@@ -7362,7 +7341,7 @@ __func__.8769:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x26
+	.uleb128 0x27
 	.uleb128 0x13
 	.byte	0x1
 	.uleb128 0x3
@@ -7377,7 +7356,16 @@ __func__.8769:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
+	.uleb128 0x28
+	.uleb128 0x15
+	.byte	0x1
 	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x29
 	.uleb128 0x4
 	.byte	0x1
 	.uleb128 0x3
@@ -7394,7 +7382,7 @@ __func__.8769:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x28
+	.uleb128 0x2a
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -7415,13 +7403,13 @@ __func__.8769:
 	.uleb128 0x6
 	.uleb128 0x40
 	.uleb128 0x18
-	.uleb128 0x2116
+	.uleb128 0x2117
 	.uleb128 0x19
 	.uleb128 0x1
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x29
+	.uleb128 0x2b
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -7436,7 +7424,7 @@ __func__.8769:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x2a
+	.uleb128 0x2c
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -7451,7 +7439,7 @@ __func__.8769:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x2b
+	.uleb128 0x2d
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7466,7 +7454,7 @@ __func__.8769:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x2c
+	.uleb128 0x2e
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7481,7 +7469,22 @@ __func__.8769:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x2d
+	.uleb128 0x2f
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x1c
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x30
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -7498,7 +7501,7 @@ __func__.8769:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x2e
+	.uleb128 0x31
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
@@ -7507,21 +7510,14 @@ __func__.8769:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x2f
-	.uleb128 0x5
-	.byte	0
-	.uleb128 0x31
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x30
+	.uleb128 0x32
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x55
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x31
+	.uleb128 0x33
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -7530,7 +7526,7 @@ __func__.8769:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x32
+	.uleb128 0x34
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -7539,14 +7535,14 @@ __func__.8769:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x33
+	.uleb128 0x35
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x34
+	.uleb128 0x36
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -7563,7 +7559,7 @@ __func__.8769:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x35
+	.uleb128 0x37
 	.uleb128 0x4109
 	.byte	0x1
 	.uleb128 0x11
@@ -7572,7 +7568,7 @@ __func__.8769:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x410a
 	.byte	0
 	.uleb128 0x2
@@ -7581,7 +7577,7 @@ __func__.8769:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x37
+	.uleb128 0x39
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x11
@@ -7592,7 +7588,14 @@ __func__.8769:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x38
+	.uleb128 0x3a
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x3b
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x11
@@ -7601,7 +7604,7 @@ __func__.8769:
 	.uleb128 0x6
 	.byte	0
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x3c
 	.uleb128 0x4109
 	.byte	0x1
 	.uleb128 0x11
@@ -7612,7 +7615,7 @@ __func__.8769:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3a
+	.uleb128 0x3d
 	.uleb128 0x4109
 	.byte	0
 	.uleb128 0x11
@@ -7621,7 +7624,7 @@ __func__.8769:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3b
+	.uleb128 0x3e
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -7632,7 +7635,7 @@ __func__.8769:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x3f
 	.uleb128 0x4109
 	.byte	0x1
 	.uleb128 0x11
@@ -7643,7 +7646,7 @@ __func__.8769:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3d
+	.uleb128 0x40
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x34
@@ -7654,7 +7657,7 @@ __func__.8769:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x3e
+	.uleb128 0x41
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -7673,7 +7676,7 @@ __func__.8769:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3f
+	.uleb128 0x42
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -7686,7 +7689,7 @@ __func__.8769:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x40
+	.uleb128 0x43
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7699,7 +7702,7 @@ __func__.8769:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x41
+	.uleb128 0x44
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7712,7 +7715,7 @@ __func__.8769:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x42
+	.uleb128 0x45
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7725,23 +7728,36 @@ __func__.8769:
 	.uleb128 0xe
 	.byte	0
 	.byte	0
-	.uleb128 0x43
+	.uleb128 0x46
 	.uleb128 0xb
 	.byte	0x1
 	.byte	0
 	.byte	0
-	.uleb128 0x44
+	.uleb128 0x47
 	.uleb128 0x21
 	.byte	0
 	.uleb128 0x49
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x45
+	.uleb128 0x48
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x49
 	.uleb128 0x2e
 	.byte	0x1
-	.uleb128 0x3f
-	.uleb128 0x19
 	.uleb128 0x3
 	.uleb128 0xe
 	.uleb128 0x3a
@@ -7758,14 +7774,14 @@ __func__.8769:
 	.uleb128 0x6
 	.uleb128 0x40
 	.uleb128 0x18
-	.uleb128 0x2117
+	.uleb128 0x2116
 	.uleb128 0x19
 	.uleb128 0x1
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.uleb128 0x5
+	.uleb128 0x4a
+	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
 	.uleb128 0xe
@@ -7775,51 +7791,11 @@ __func__.8769:
 	.uleb128 0x5
 	.uleb128 0x49
 	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x18
+	.uleb128 0x1c
+	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x47
-	.uleb128 0x2e
-	.byte	0x1
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0x5
-	.uleb128 0x27
-	.uleb128 0x19
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x12
-	.uleb128 0x6
-	.uleb128 0x40
-	.uleb128 0x18
-	.uleb128 0x2116
-	.uleb128 0x19
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x48
-	.uleb128 0x34
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0x5
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x1c
-	.uleb128 0xb
-	.byte	0
-	.byte	0
-	.uleb128 0x49
+	.uleb128 0x4b
 	.uleb128 0x4109
 	.byte	0x1
 	.uleb128 0x11
@@ -7828,7 +7804,7 @@ __func__.8769:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x4a
+	.uleb128 0x4c
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -7841,7 +7817,7 @@ __func__.8769:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4b
+	.uleb128 0x4d
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -7866,7 +7842,7 @@ __func__.8769:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4c
+	.uleb128 0x4e
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7881,7 +7857,7 @@ __func__.8769:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x4d
+	.uleb128 0x4f
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7892,7 +7868,7 @@ __func__.8769:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x4e
+	.uleb128 0x50
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -7917,7 +7893,7 @@ __func__.8769:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4f
+	.uleb128 0x51
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -7932,7 +7908,7 @@ __func__.8769:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x50
+	.uleb128 0x52
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -7947,7 +7923,7 @@ __func__.8769:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x51
+	.uleb128 0x53
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7962,7 +7938,7 @@ __func__.8769:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x52
+	.uleb128 0x54
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7977,7 +7953,7 @@ __func__.8769:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x53
+	.uleb128 0x55
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7990,7 +7966,7 @@ __func__.8769:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x54
+	.uleb128 0x56
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -8005,7 +7981,7 @@ __func__.8769:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x55
+	.uleb128 0x57
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -8020,7 +7996,7 @@ __func__.8769:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x56
+	.uleb128 0x58
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x3
@@ -8033,7 +8009,7 @@ __func__.8769:
 	.uleb128 0x1
 	.byte	0
 	.byte	0
-	.uleb128 0x57
+	.uleb128 0x59
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -8050,7 +8026,7 @@ __func__.8769:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x58
+	.uleb128 0x5a
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -8067,7 +8043,7 @@ __func__.8769:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x59
+	.uleb128 0x5b
 	.uleb128 0x4109
 	.byte	0x1
 	.uleb128 0x11
@@ -8076,7 +8052,7 @@ __func__.8769:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x5a
+	.uleb128 0x5c
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -8095,7 +8071,7 @@ __func__.8769:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x5b
+	.uleb128 0x5d
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -8108,7 +8084,7 @@ __func__.8769:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x5c
+	.uleb128 0x5e
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -8133,7 +8109,7 @@ __func__.8769:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x5d
+	.uleb128 0x5f
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -8148,7 +8124,7 @@ __func__.8769:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x5e
+	.uleb128 0x60
 	.uleb128 0x410a
 	.byte	0
 	.uleb128 0x31
@@ -8157,7 +8133,7 @@ __func__.8769:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x5f
+	.uleb128 0x61
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -8170,7 +8146,7 @@ __func__.8769:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x60
+	.uleb128 0x62
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -8183,7 +8159,7 @@ __func__.8769:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x61
+	.uleb128 0x63
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -8210,7 +8186,7 @@ __func__.8769:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x62
+	.uleb128 0x64
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -8225,7 +8201,7 @@ __func__.8769:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x63
+	.uleb128 0x65
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x31
@@ -8242,7 +8218,7 @@ __func__.8769:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x64
+	.uleb128 0x66
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
@@ -8251,7 +8227,7 @@ __func__.8769:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x65
+	.uleb128 0x67
 	.uleb128 0x21
 	.byte	0
 	.uleb128 0x49
@@ -8260,7 +8236,7 @@ __func__.8769:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x66
+	.uleb128 0x68
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -8277,7 +8253,7 @@ __func__.8769:
 	.uleb128 0x5
 	.byte	0
 	.byte	0
-	.uleb128 0x67
+	.uleb128 0x69
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -8298,87 +8274,157 @@ __func__.8769:
 	.section	.debug_loc,"",%progbits
 .Ldebug_loc0:
 .LLST60:
-	.4byte	.LVL124
-	.4byte	.LVL127
+	.4byte	.LVL123
+	.4byte	.LVL130
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL127
-	.4byte	.LFE216
+	.4byte	.LVL130
+	.4byte	.LVL133
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL133
+	.4byte	.LVL134
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL134
+	.4byte	.LFE220
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
 .LLST61:
-	.4byte	.LVL124
-	.4byte	.LVL127
+	.4byte	.LVL123
+	.4byte	.LVL128
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL127
-	.4byte	.LFE216
+	.4byte	.LVL128
+	.4byte	.LFE220
 	.2byte	0x1
-	.byte	0x56
+	.byte	0x55
 	.4byte	0
 	.4byte	0
 .LLST62:
-	.4byte	.LVL124
-	.4byte	.LVL127
+	.4byte	.LVL123
+	.4byte	.LVL126
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL127
-	.4byte	.LFE216
+	.4byte	.LVL126
+	.4byte	.LVL132
+	.2byte	0x3
+	.byte	0x7d
+	.sleb128 100
+	.4byte	.LVL132
+	.4byte	.LVL133
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x52
 	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST63:
-	.4byte	.LVL124
-	.4byte	.LVL126
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL126
-	.4byte	.LVL168
+	.4byte	.LVL133
+	.4byte	.LVL188
 	.2byte	0x3
 	.byte	0x7d
-	.sleb128 92
-	.4byte	.LVL168
-	.4byte	.LVL234
+	.sleb128 100
+	.4byte	.LVL188
+	.4byte	.LVL195
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 84
+	.4byte	.LVL195
+	.4byte	.LVL197
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
-	.byte	0x53
+	.byte	0x52
 	.byte	0x9f
-	.4byte	.LVL234
-	.4byte	.LFE216
+	.4byte	.LVL197
+	.4byte	.LVL210
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 84
+	.4byte	.LVL210
+	.4byte	.LVL213
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	.LVL213
+	.4byte	.LVL217
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 84
+	.4byte	.LVL217
+	.4byte	.LVL228
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	.LVL228
+	.4byte	.LVL230
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 84
+	.4byte	.LVL230
+	.4byte	.LFE220
 	.2byte	0x3
 	.byte	0x7d
-	.sleb128 92
+	.sleb128 100
 	.4byte	0
 	.4byte	0
-.LLST64:
-	.4byte	.LVL125
+.LLST63:
+	.4byte	.LVL123
 	.4byte	.LVL127
 	.2byte	0x1
-	.byte	0x52
+	.byte	0x53
 	.4byte	.LVL127
-	.4byte	.LVL198
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL200
-	.4byte	.LVL220
+	.4byte	.LVL130
 	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL230
-	.4byte	.LFE216
+	.byte	0x52
+	.4byte	.LVL130
+	.4byte	.LVL133
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.4byte	.LVL133
+	.4byte	.LVL135-1
 	.2byte	0x1
-	.byte	0x5a
+	.byte	0x52
+	.4byte	.LVL135-1
+	.4byte	.LFE220
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST65:
+.LLST64:
 	.4byte	.LVL124
-	.4byte	.LVL127
+	.4byte	.LVL125
+	.2byte	0x3
+	.byte	0x7d
+	.sleb128 100
+	.4byte	0
+	.4byte	0
+.LLST65:
+	.4byte	.LVL123
+	.4byte	.LVL132
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xea
+	.byte	0x9f
+	.4byte	.LVL133
+	.4byte	.LVL186
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xea
+	.byte	0x9f
+	.4byte	.LVL230
+	.4byte	.LVL231
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xea
@@ -8386,275 +8432,239 @@ __func__.8769:
 	.4byte	0
 	.4byte	0
 .LLST66:
-	.4byte	.LVL124
-	.4byte	.LVL127
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL127
-	.4byte	.LVL133
-	.2byte	0x3
-	.byte	0x7d
-	.sleb128 96
 	.4byte	.LVL133
-	.4byte	.LVL134
+	.4byte	.LVL135-1
 	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL135-1
+	.4byte	.LVL186
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
 	.byte	0x53
-	.4byte	.LVL134
-	.4byte	.LVL168
-	.2byte	0x3
-	.byte	0x7d
-	.sleb128 96
-	.4byte	.LVL234
-	.4byte	.LFE216
-	.2byte	0x3
-	.byte	0x7d
-	.sleb128 96
+	.byte	0x9f
+	.4byte	.LVL230
+	.4byte	.LVL231
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
 	.4byte	0
 	.4byte	0
 .LLST67:
-	.4byte	.LVL136
-	.4byte	.LVL143
-	.2byte	0x3
-	.byte	0x7d
-	.sleb128 92
-	.4byte	.LVL144
-	.4byte	.LVL168
+	.4byte	.LVL133
+	.4byte	.LVL186
 	.2byte	0x3
 	.byte	0x7d
-	.sleb128 92
-	.4byte	.LVL234
-	.4byte	.LFE216
+	.sleb128 100
+	.4byte	.LVL230
+	.4byte	.LVL231
 	.2byte	0x3
 	.byte	0x7d
-	.sleb128 92
+	.sleb128 100
 	.4byte	0
 	.4byte	0
 .LLST68:
-	.4byte	.LVL136
-	.4byte	.LVL143
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL144
-	.4byte	.LVL190
+	.4byte	.LVL133
+	.4byte	.LVL186
 	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL234
-	.4byte	.LFE216
+	.byte	0x55
+	.4byte	.LVL230
+	.4byte	.LVL231
 	.2byte	0x1
-	.byte	0x5a
+	.byte	0x55
 	.4byte	0
 	.4byte	0
 .LLST69:
-	.4byte	.LVL136
-	.4byte	.LVL143
+	.4byte	.LVL133
+	.4byte	.LVL134
 	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL144
-	.4byte	.LVL190
+	.byte	0x50
+	.4byte	.LVL134
+	.4byte	.LVL186
 	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL234
-	.4byte	.LFE216
+	.byte	0x54
+	.4byte	.LVL230
+	.4byte	.LVL231
 	.2byte	0x1
-	.byte	0x56
+	.byte	0x54
 	.4byte	0
 	.4byte	0
 .LLST70:
-	.4byte	.LVL138
-	.4byte	.LVL139-1
+	.4byte	.LVL136
+	.4byte	.LVL137-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL139-1
-	.4byte	.LVL143
-	.2byte	0x3
-	.byte	0x7d
-	.sleb128 100
-	.4byte	.LVL144
-	.4byte	.LVL190
-	.2byte	0x3
-	.byte	0x7d
-	.sleb128 100
+	.4byte	.LVL137-1
+	.4byte	.LVL186
+	.2byte	0x1
+	.byte	0x5a
 	.4byte	0
 	.4byte	0
 .LLST71:
-	.4byte	.LVL146
-	.4byte	.LVL147
+	.4byte	.LVL142
+	.4byte	.LVL143
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL147
-	.4byte	.LVL148-1
+	.4byte	.LVL143
+	.4byte	.LVL144-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL148-1
-	.4byte	.LVL152
+	.4byte	.LVL144-1
+	.4byte	.LVL148
 	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL152
-	.4byte	.LVL153
+	.byte	0x58
+	.4byte	.LVL148
+	.4byte	.LVL149
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL154
-	.4byte	.LVL155
+	.4byte	.LVL150
+	.4byte	.LVL151
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL155
-	.4byte	.LVL156-1
+	.4byte	.LVL151
+	.4byte	.LVL152-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL160
-	.4byte	.LVL161
+	.4byte	.LVL156
+	.4byte	.LVL157
 	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL163
-	.4byte	.LVL166
+	.byte	0x58
+	.4byte	.LVL159
+	.4byte	.LVL162
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL174
-	.4byte	.LVL175
+	.4byte	.LVL170
+	.4byte	.LVL171
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
 .LLST72:
-	.4byte	.LVL136
-	.4byte	.LVL143
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL144
-	.4byte	.LVL159
+	.4byte	.LVL133
+	.4byte	.LVL155
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL159
-	.4byte	.LVL160
+	.4byte	.LVL155
+	.4byte	.LVL156
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.4byte	.LVL160
-	.4byte	.LVL161
+	.4byte	.LVL156
+	.4byte	.LVL157
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL168
-	.4byte	.LVL190
+	.4byte	.LVL157
+	.4byte	.LVL186
 	.2byte	0x1
-	.byte	0x5b
+	.byte	0x58
 	.4byte	0
 	.4byte	0
 .LLST73:
-	.4byte	.LVL136
-	.4byte	.LVL143
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL144
-	.4byte	.LVL150
+	.4byte	.LVL133
+	.4byte	.LVL146
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL150
-	.4byte	.LVL151
+	.4byte	.LVL146
+	.4byte	.LVL147
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL151
-	.4byte	.LVL156
+	.4byte	.LVL147
+	.4byte	.LVL152
 	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL157
-	.4byte	.LVL158
+	.byte	0x5b
+	.4byte	.LVL153
+	.4byte	.LVL154
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL158
-	.4byte	.LVL159
+	.4byte	.LVL154
+	.4byte	.LVL155
 	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL159
-	.4byte	.LVL162
+	.byte	0x5b
+	.4byte	.LVL155
+	.4byte	.LVL158
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL162
-	.4byte	.LVL163-1
+	.4byte	.LVL158
+	.4byte	.LVL159-1
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
-	.4byte	.LVL163-1
-	.4byte	.LVL168
+	.4byte	.LVL159-1
+	.4byte	.LVL164
 	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL169
-	.4byte	.LVL172
+	.byte	0x5b
+	.4byte	.LVL165
+	.4byte	.LVL168
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL172
-	.4byte	.LVL173-1
+	.4byte	.LVL168
+	.4byte	.LVL169-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL173-1
-	.4byte	.LVL177
+	.4byte	.LVL169-1
+	.4byte	.LVL173
 	.2byte	0x3
 	.byte	0x7d
 	.sleb128 96
-	.4byte	.LVL189
-	.4byte	.LVL190
+	.4byte	.LVL185
+	.4byte	.LVL186
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
 .LLST74:
-	.4byte	.LVL137
-	.4byte	.LVL138-1
+	.4byte	.LVL135
+	.4byte	.LVL136-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL138-1
-	.4byte	.LVL143
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL144
-	.4byte	.LVL190
+	.4byte	.LVL136-1
+	.4byte	.LVL186
 	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL234
-	.4byte	.LFE216
+	.byte	0x56
+	.4byte	.LVL230
+	.4byte	.LVL231
 	.2byte	0x1
-	.byte	0x55
+	.byte	0x56
 	.4byte	0
 	.4byte	0
 .LLST75:
-	.4byte	.LVL140
-	.4byte	.LVL141
+	.4byte	.LVL138
+	.4byte	.LVL139
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL141
-	.4byte	.LVL142-1
+	.4byte	.LVL139
+	.4byte	.LVL140
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL144
-	.4byte	.LVL145
+	.4byte	.LVL140
+	.4byte	.LVL141
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL145
-	.4byte	.LVL146-1
+	.4byte	.LVL141
+	.4byte	.LVL142-1
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
 .LLST76:
-	.4byte	.LVL164
-	.4byte	.LVL165
+	.4byte	.LVL160
+	.4byte	.LVL161
 	.2byte	0x3
 	.byte	0x74
 	.sleb128 4
 	.byte	0x9f
-	.4byte	.LVL165
-	.4byte	.LVL167-1
+	.4byte	.LVL161
+	.4byte	.LVL163-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL167-1
-	.4byte	.LVL167
+	.4byte	.LVL163-1
+	.4byte	.LVL163
 	.2byte	0x3
 	.byte	0x74
 	.sleb128 4
@@ -8662,336 +8672,316 @@ __func__.8769:
 	.4byte	0
 	.4byte	0
 .LLST77:
-	.4byte	.LVL164
-	.4byte	.LVL167
+	.4byte	.LVL160
+	.4byte	.LVL163
 	.2byte	0x1
-	.byte	0x58
+	.byte	0x5b
 	.4byte	0
 	.4byte	0
 .LLST78:
-	.4byte	.LVL164
-	.4byte	.LVL167
+	.4byte	.LVL160
+	.4byte	.LVL163
 	.2byte	0x1
-	.byte	0x55
+	.byte	0x56
 	.4byte	0
 	.4byte	0
 .LLST79:
-	.4byte	.LVL170
-	.4byte	.LVL171
+	.4byte	.LVL166
+	.4byte	.LVL167
 	.2byte	0x4
 	.byte	0x7d
-	.sleb128 108
+	.sleb128 104
 	.byte	0x9f
-	.4byte	.LVL171
-	.4byte	.LVL173-1
+	.4byte	.LVL167
+	.4byte	.LVL169-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL173-1
-	.4byte	.LVL173
+	.4byte	.LVL169-1
+	.4byte	.LVL169
 	.2byte	0x4
 	.byte	0x7d
-	.sleb128 108
+	.sleb128 104
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
 .LLST80:
-	.4byte	.LVL170
-	.4byte	.LVL172
+	.4byte	.LVL166
+	.4byte	.LVL168
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL172
-	.4byte	.LVL173-1
+	.4byte	.LVL168
+	.4byte	.LVL169-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL173-1
-	.4byte	.LVL173
+	.4byte	.LVL169-1
+	.4byte	.LVL169
 	.2byte	0x3
 	.byte	0x7d
 	.sleb128 96
 	.4byte	0
 	.4byte	0
 .LLST81:
-	.4byte	.LVL170
-	.4byte	.LVL173
+	.4byte	.LVL166
+	.4byte	.LVL169
 	.2byte	0x1
-	.byte	0x55
+	.byte	0x56
 	.4byte	0
 	.4byte	0
 .LLST82:
-	.4byte	.LVL178
-	.4byte	.LVL183
+	.4byte	.LVL174
+	.4byte	.LVL179
 	.2byte	0x1
-	.byte	0x58
+	.byte	0x5b
+	.4byte	.LVL179
 	.4byte	.LVL183
-	.4byte	.LVL187
 	.2byte	0x4
 	.byte	0x7d
-	.sleb128 168
+	.sleb128 164
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
 .LLST83:
-	.4byte	.LVL178
-	.4byte	.LVL179
+	.4byte	.LVL174
+	.4byte	.LVL175
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL179
-	.4byte	.LVL187
+	.4byte	.LVL175
+	.4byte	.LVL183
 	.2byte	0x3
 	.byte	0x7d
 	.sleb128 96
 	.4byte	0
 	.4byte	0
 .LLST84:
-	.4byte	.LVL178
-	.4byte	.LVL187
+	.4byte	.LVL174
+	.4byte	.LVL183
 	.2byte	0x1
-	.byte	0x5b
+	.byte	0x58
 	.4byte	0
 	.4byte	0
 .LLST85:
-	.4byte	.LVL178
-	.4byte	.LVL187
+	.4byte	.LVL174
+	.4byte	.LVL183
 	.2byte	0x1
-	.byte	0x55
+	.byte	0x56
 	.4byte	0
 	.4byte	0
 .LLST86:
-	.4byte	.LVL178
-	.4byte	.LVL180
+	.4byte	.LVL174
+	.4byte	.LVL176
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL180
-	.4byte	.LVL181
+	.4byte	.LVL176
+	.4byte	.LVL177
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
 .LLST87:
-	.4byte	.LVL183
-	.4byte	.LVL184
+	.4byte	.LVL179
+	.4byte	.LVL180
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL184
-	.4byte	.LVL185-1
+	.4byte	.LVL180
+	.4byte	.LVL181-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL185-1
-	.4byte	.LVL187
+	.4byte	.LVL181-1
+	.4byte	.LVL183
 	.2byte	0x1
-	.byte	0x58
+	.byte	0x5b
 	.4byte	0
 	.4byte	0
 .LLST88:
-	.4byte	.LVL190
-	.4byte	.LVL199
+	.4byte	.LVL186
+	.4byte	.LVL196
 	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL200
-	.4byte	.LVL234
+	.byte	0x55
+	.4byte	.LVL197
+	.4byte	.LVL230
 	.2byte	0x1
-	.byte	0x56
+	.byte	0x55
 	.4byte	0
 	.4byte	0
 .LLST89:
-	.4byte	.LVL190
-	.4byte	.LVL199
+	.4byte	.LVL186
+	.4byte	.LVL196
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL200
-	.4byte	.LVL234
+	.4byte	.LVL197
+	.4byte	.LVL230
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
 .LLST91:
-	.4byte	.LVL192
-	.4byte	.LVL197
+	.4byte	.LVL189
+	.4byte	.LVL194
 	.2byte	0x2
 	.byte	0x78
 	.sleb128 0
-	.4byte	.LVL197
-	.4byte	.LVL199
+	.4byte	.LVL194
+	.4byte	.LVL196
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 16
-	.4byte	.LVL200
-	.4byte	.LVL207
+	.4byte	.LVL197
+	.4byte	.LVL203
 	.2byte	0x2
 	.byte	0x78
 	.sleb128 0
-	.4byte	.LVL207
-	.4byte	.LVL230
+	.4byte	.LVL203
+	.4byte	.LVL228
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 16
-	.4byte	.LVL230
-	.4byte	.LVL231
+	.4byte	.LVL228
+	.4byte	.LVL229
 	.2byte	0x2
 	.byte	0x78
 	.sleb128 0
-	.4byte	.LVL231
-	.4byte	.LVL234
+	.4byte	.LVL229
+	.4byte	.LVL230
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 16
 	.4byte	0
 	.4byte	0
 .LLST92:
-	.4byte	.LVL219
-	.4byte	.LVL220
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL232
-	.4byte	.LVL234
+	.4byte	.LVL216
+	.4byte	.LVL218
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
 .LLST93:
-	.4byte	.LVL201
-	.4byte	.LVL202
+	.4byte	.LVL198
+	.4byte	.LVL225
 	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL202
-	.4byte	.LVL220
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 84
+	.byte	0x5a
+	.4byte	.LVL226
 	.4byte	.LVL230
-	.4byte	.LVL234
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 84
+	.2byte	0x1
+	.byte	0x5a
 	.4byte	0
 	.4byte	0
 .LLST94:
-	.4byte	.LVL221
-	.4byte	.LVL222
+	.4byte	.LVL219
+	.4byte	.LVL220
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL222
-	.4byte	.LVL223-1
+	.4byte	.LVL220
+	.4byte	.LVL221-1
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
 	.4byte	0
 	.4byte	0
 .LLST95:
-	.4byte	.LVL213
-	.4byte	.LVL214
+	.4byte	.LVL209
+	.4byte	.LVL211
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL214
-	.4byte	.LVL215-1
+	.4byte	.LVL211
+	.4byte	.LVL212-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL215-1
-	.4byte	.LVL216
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL216
-	.4byte	.LVL217
+	.4byte	.LVL212-1
+	.4byte	.LVL212
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 84
+	.4byte	.LVL213
+	.4byte	.LVL214
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL217
-	.4byte	.LVL223
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL223
-	.4byte	.LVL224
+	.4byte	.LVL214
+	.4byte	.LVL218
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 76
+	.4byte	.LVL221
+	.4byte	.LVL222
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL224
-	.4byte	.LVL227
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL228
-	.4byte	.LVL230
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL232
-	.4byte	.LVL233
+	.4byte	.LVL222
+	.4byte	.LVL223-1
 	.2byte	0x1
-	.byte	0x5b
+	.byte	0x53
 	.4byte	0
 	.4byte	0
 .LLST96:
-	.4byte	.LVL220
-	.4byte	.LVL227
+	.4byte	.LVL218
+	.4byte	.LVL225
 	.2byte	0x1
-	.byte	0x55
+	.byte	0x56
+	.4byte	.LVL226
 	.4byte	.LVL228
-	.4byte	.LVL230
 	.2byte	0x1
-	.byte	0x55
+	.byte	0x56
 	.4byte	0
 	.4byte	0
 .LLST97:
-	.4byte	.LVL206
-	.4byte	.LVL208-1
+	.4byte	.LVL202
+	.4byte	.LVL204-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL208-1
-	.4byte	.LVL227
+	.4byte	.LVL204-1
+	.4byte	.LVL225
 	.2byte	0x1
 	.byte	0x58
+	.4byte	.LVL226
 	.4byte	.LVL228
-	.4byte	.LVL230
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL231
-	.4byte	.LVL232
+	.4byte	.LVL229
+	.4byte	.LVL230
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL232
-	.4byte	.LVL234
-	.2byte	0x1
-	.byte	0x58
 	.4byte	0
 	.4byte	0
 .LLST98:
-	.4byte	.LVL193
-	.4byte	.LVL194
+	.4byte	.LVL190
+	.4byte	.LVL191
 	.2byte	0x6
 	.byte	0x3
-	.4byte	.LC14
+	.4byte	.LC13
 	.byte	0x9f
-	.4byte	.LVL194
-	.4byte	.LVL195
+	.4byte	.LVL191
+	.4byte	.LVL192
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL195
-	.4byte	.LVL196-1
+	.4byte	.LVL192
+	.4byte	.LVL193-1
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
 .LLST99:
-	.4byte	.LVL208
-	.4byte	.LVL209
+	.4byte	.LVL204
+	.4byte	.LVL205
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL209
-	.4byte	.LVL210-1
+	.4byte	.LVL205
+	.4byte	.LVL206-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL211
-	.4byte	.LVL212
+	.4byte	.LVL207
+	.4byte	.LVL208
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL212
-	.4byte	.LVL213-1
+	.4byte	.LVL208
+	.4byte	.LVL209-1
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
 .LLST90:
-	.4byte	.LVL191
-	.4byte	.LVL194-1
+	.4byte	.LVL187
+	.4byte	.LVL191-1
 	.2byte	0x6
-	.byte	0x76
+	.byte	0x75
 	.sleb128 8
 	.byte	0x6
 	.byte	0x31
@@ -9000,12 +8990,12 @@ __func__.8769:
 	.4byte	0
 	.4byte	0
 .LLST59:
+	.4byte	.LVL121
 	.4byte	.LVL122
-	.4byte	.LVL123
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL123
-	.4byte	.LFE213
+	.4byte	.LVL122
+	.4byte	.LFE217
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9014,16 +9004,16 @@ __func__.8769:
 	.4byte	0
 	.4byte	0
 .LLST47:
-	.4byte	.LVL105
-	.4byte	.LVL109
+	.4byte	.LVL104
+	.4byte	.LVL108
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL109
-	.4byte	.LVL117
+	.4byte	.LVL108
+	.4byte	.LVL116
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL117
-	.4byte	.LFE212
+	.4byte	.LVL116
+	.4byte	.LFE216
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9032,16 +9022,16 @@ __func__.8769:
 	.4byte	0
 	.4byte	0
 .LLST48:
-	.4byte	.LVL105
-	.4byte	.LVL111
+	.4byte	.LVL104
+	.4byte	.LVL110
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL111
-	.4byte	.LVL117
+	.4byte	.LVL110
+	.4byte	.LVL116
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL117
-	.4byte	.LFE212
+	.4byte	.LVL116
+	.4byte	.LFE216
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9050,12 +9040,12 @@ __func__.8769:
 	.4byte	0
 	.4byte	0
 .LLST49:
+	.4byte	.LVL104
 	.4byte	.LVL105
-	.4byte	.LVL106
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL106
-	.4byte	.LFE212
+	.4byte	.LVL105
+	.4byte	.LFE216
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9064,12 +9054,12 @@ __func__.8769:
 	.4byte	0
 	.4byte	0
 .LLST50:
-	.4byte	.LVL105
-	.4byte	.LVL110
+	.4byte	.LVL104
+	.4byte	.LVL109
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL110
-	.4byte	.LFE212
+	.4byte	.LVL109
+	.4byte	.LFE216
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9078,15 +9068,15 @@ __func__.8769:
 	.4byte	0
 	.4byte	0
 .LLST51:
+	.4byte	.LVL114
 	.4byte	.LVL115
-	.4byte	.LVL116
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
 .LLST52:
+	.4byte	.LVL106
 	.4byte	.LVL107
-	.4byte	.LVL108
 	.2byte	0x2d
 	.byte	0xf3
 	.uleb128 0x1
@@ -9132,8 +9122,8 @@ __func__.8769:
 	.byte	0x24
 	.byte	0x21
 	.byte	0x9f
-	.4byte	.LVL108
-	.4byte	.LVL114-1
+	.4byte	.LVL107
+	.4byte	.LVL113-1
 	.2byte	0x7
 	.byte	0x72
 	.sleb128 0
@@ -9144,27 +9134,27 @@ __func__.8769:
 	.4byte	0
 	.4byte	0
 .LLST53:
-	.4byte	.LVL112
-	.4byte	.LVL117
+	.4byte	.LVL111
+	.4byte	.LVL116
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
 .LLST54:
-	.4byte	.LVL112
-	.4byte	.LVL114
+	.4byte	.LVL111
+	.4byte	.LVL113
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
 .LLST55:
+	.4byte	.LVL111
 	.4byte	.LVL112
-	.4byte	.LVL113
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL113
-	.4byte	.LVL114-1
+	.4byte	.LVL112
+	.4byte	.LVL113-1
 	.2byte	0x7
 	.byte	0x72
 	.sleb128 0
@@ -9175,19 +9165,19 @@ __func__.8769:
 	.4byte	0
 	.4byte	0
 .LLST56:
-	.4byte	.LVL112
-	.4byte	.LVL114
+	.4byte	.LVL111
+	.4byte	.LVL113
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
 .LLST58:
+	.4byte	.LVL119
 	.4byte	.LVL120
-	.4byte	.LVL121
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL121
-	.4byte	.LFE211
+	.4byte	.LVL120
+	.4byte	.LFE215
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9196,16 +9186,16 @@ __func__.8769:
 	.4byte	0
 	.4byte	0
 .LLST39:
-	.4byte	.LVL94
-	.4byte	.LVL98
+	.4byte	.LVL93
+	.4byte	.LVL97
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL98
-	.4byte	.LVL104
+	.4byte	.LVL97
+	.4byte	.LVL103
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL104
-	.4byte	.LFE208
+	.4byte	.LVL103
+	.4byte	.LFE212
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9214,16 +9204,16 @@ __func__.8769:
 	.4byte	0
 	.4byte	0
 .LLST40:
-	.4byte	.LVL94
-	.4byte	.LVL97
+	.4byte	.LVL93
+	.4byte	.LVL96
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL97
-	.4byte	.LVL104
+	.4byte	.LVL96
+	.4byte	.LVL103
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL104
-	.4byte	.LFE208
+	.4byte	.LVL103
+	.4byte	.LFE212
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9232,16 +9222,16 @@ __func__.8769:
 	.4byte	0
 	.4byte	0
 .LLST41:
-	.4byte	.LVL94
-	.4byte	.LVL96
+	.4byte	.LVL93
+	.4byte	.LVL95
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL96
-	.4byte	.LVL104
+	.4byte	.LVL95
+	.4byte	.LVL103
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL104
-	.4byte	.LFE208
+	.4byte	.LVL103
+	.4byte	.LFE212
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9250,16 +9240,16 @@ __func__.8769:
 	.4byte	0
 	.4byte	0
 .LLST42:
+	.4byte	.LVL93
 	.4byte	.LVL94
-	.4byte	.LVL95
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL95
-	.4byte	.LVL104
+	.4byte	.LVL94
+	.4byte	.LVL103
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL104
-	.4byte	.LFE208
+	.4byte	.LVL103
+	.4byte	.LFE212
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9268,57 +9258,57 @@ __func__.8769:
 	.4byte	0
 	.4byte	0
 .LLST43:
-	.4byte	.LVL94
-	.4byte	.LVL104
+	.4byte	.LVL93
+	.4byte	.LVL103
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 0
-	.4byte	.LVL104
-	.4byte	.LFE208
+	.4byte	.LVL103
+	.4byte	.LFE212
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
 	.4byte	0
 	.4byte	0
 .LLST44:
-	.4byte	.LVL94
-	.4byte	.LVL104
+	.4byte	.LVL93
+	.4byte	.LVL103
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 4
-	.4byte	.LVL104
-	.4byte	.LFE208
+	.4byte	.LVL103
+	.4byte	.LFE212
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 4
 	.4byte	0
 	.4byte	0
 .LLST45:
+	.4byte	.LVL98
 	.4byte	.LVL99
-	.4byte	.LVL100
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL100
-	.4byte	.LVL101-1
+	.4byte	.LVL99
+	.4byte	.LVL100-1
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
 	.4byte	0
 	.4byte	0
 .LLST46:
+	.4byte	.LVL100
 	.4byte	.LVL101
-	.4byte	.LVL102
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
 .LLST15:
 	.4byte	.LVL38
-	.4byte	.LVL43
+	.4byte	.LVL44
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL43
-	.4byte	.LFE207
+	.4byte	.LVL44
+	.4byte	.LFE211
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
@@ -9329,10 +9319,10 @@ __func__.8769:
 	.2byte	0x1
 	.byte	0x51
 	.4byte	.LVL42
-	.4byte	.LFE207
+	.4byte	.LFE211
 	.2byte	0x3
 	.byte	0x91
-	.sleb128 -68
+	.sleb128 -76
 	.4byte	0
 	.4byte	0
 .LLST17:
@@ -9341,25 +9331,25 @@ __func__.8769:
 	.2byte	0x1
 	.byte	0x52
 	.4byte	.LVL39
-	.4byte	.LVL75
+	.4byte	.LVL66
 	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL75
-	.4byte	.LVL77-1
+	.byte	0x55
+	.4byte	.LVL66
+	.4byte	.LVL68-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL77-1
-	.4byte	.LVL85
+	.4byte	.LVL68-1
+	.4byte	.LVL84
 	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL85
-	.4byte	.LVL86-1
+	.byte	0x55
+	.4byte	.LVL84
+	.4byte	.LVL85-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL86-1
-	.4byte	.LFE207
+	.4byte	.LVL85-1
+	.4byte	.LFE211
 	.2byte	0x1
-	.byte	0x54
+	.byte	0x55
 	.4byte	0
 	.4byte	0
 .LLST18:
@@ -9368,59 +9358,52 @@ __func__.8769:
 	.2byte	0x1
 	.byte	0x53
 	.4byte	.LVL40
-	.4byte	.LVL50
+	.4byte	.LVL52
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL50
-	.4byte	.LVL68
+	.4byte	.LVL52
+	.4byte	.LVL78
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x53
 	.byte	0x9f
-	.4byte	.LVL68
-	.4byte	.LVL69
+	.4byte	.LVL78
+	.4byte	.LVL79
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL69
-	.4byte	.LVL73
+	.4byte	.LVL79
+	.4byte	.LVL83
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x53
 	.byte	0x9f
-	.4byte	.LVL73
-	.4byte	.LVL74
+	.4byte	.LVL83
+	.4byte	.LVL84
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL74
-	.4byte	.LVL90
+	.4byte	.LVL84
+	.4byte	.LVL89
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x53
 	.byte	0x9f
-	.4byte	.LVL90
-	.4byte	.LVL92
+	.4byte	.LVL89
+	.4byte	.LFE211
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL92
-	.4byte	.LFE207
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
 	.4byte	0
 	.4byte	0
 .LLST19:
 	.4byte	.LVL38
-	.4byte	.LVL68
+	.4byte	.LVL78
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 0
-	.4byte	.LVL68
-	.4byte	.LFE207
+	.4byte	.LVL78
+	.4byte	.LFE211
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 0
@@ -9428,12 +9411,12 @@ __func__.8769:
 	.4byte	0
 .LLST20:
 	.4byte	.LVL38
-	.4byte	.LVL68
+	.4byte	.LVL78
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 4
-	.4byte	.LVL68
-	.4byte	.LFE207
+	.4byte	.LVL78
+	.4byte	.LFE211
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 4
@@ -9449,13 +9432,13 @@ __func__.8769:
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -80
-	.4byte	.LVL69
-	.4byte	.LVL73
+	.4byte	.LVL79
+	.4byte	.LVL83
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -80
+	.4byte	.LVL87
 	.4byte	.LVL88
-	.4byte	.LVL89
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -80
@@ -9466,25 +9449,25 @@ __func__.8769:
 	.4byte	.LVL65
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL71
-	.4byte	.LVL73
+	.4byte	.LVL81
+	.4byte	.LVL83
 	.2byte	0x1
 	.byte	0x5b
+	.4byte	.LVL87
 	.4byte	.LVL88
-	.4byte	.LVL89
 	.2byte	0x1
 	.byte	0x5b
 	.4byte	0
 	.4byte	0
 .LLST23:
 	.4byte	.LVL41
-	.4byte	.LVL67
+	.4byte	.LVL77
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL68
-	.4byte	.LVL93
+	.4byte	.LVL78
+	.4byte	.LVL92
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
@@ -9493,101 +9476,92 @@ __func__.8769:
 	.4byte	0
 .LLST24:
 	.4byte	.LVL41
-	.4byte	.LVL51
+	.4byte	.LVL50
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL51
+	.4byte	.LVL50
 	.4byte	.LVL65
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.4byte	.LVL68
-	.4byte	.LVL69
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL69
-	.4byte	.LVL73
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL73
-	.4byte	.LVL74
+	.4byte	.LVL78
+	.4byte	.LVL79
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL88
-	.4byte	.LVL89
+	.4byte	.LVL79
+	.4byte	.LVL83
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.4byte	.LVL90
-	.4byte	.LVL92
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST25:
-	.4byte	.LVL41
-	.4byte	.LVL61
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL61
-	.4byte	.LVL62
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL68
-	.4byte	.LVL71
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL73
-	.4byte	.LVL74
+	.4byte	.LVL83
+	.4byte	.LVL84
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL90
-	.4byte	.LFE207
+	.4byte	.LVL87
+	.4byte	.LVL88
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL89
+	.4byte	.LVL91
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST26:
+.LLST25:
+	.4byte	.LVL43
+	.4byte	.LVL44
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 0
 	.4byte	.LVL44
 	.4byte	.LVL45-1
+	.2byte	0x2
+	.byte	0x7a
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST26:
+	.4byte	.LVL56
+	.4byte	.LVL57
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL45-1
-	.4byte	.LFE207
+	.4byte	.LVL79
+	.4byte	.LVL80-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL80-1
+	.4byte	.LVL81
 	.2byte	0x3
 	.byte	0x91
-	.sleb128 -76
+	.sleb128 -72
 	.4byte	0
 	.4byte	0
 .LLST27:
 	.4byte	.LVL56
 	.4byte	.LVL57
 	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL69
-	.4byte	.LVL70-1
+	.byte	0x5a
+	.4byte	.LVL79
+	.4byte	.LVL81
 	.2byte	0x1
-	.byte	0x50
+	.byte	0x5a
 	.4byte	0
 	.4byte	0
 .LLST28:
-	.4byte	.LVL56
 	.4byte	.LVL57
+	.4byte	.LVL59-1
 	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL69
-	.4byte	.LVL71
-	.2byte	0x1
-	.byte	0x5a
+	.byte	0x53
+	.4byte	.LVL59-1
+	.4byte	.LVL61
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -72
 	.4byte	0
 	.4byte	0
 .LLST29:
@@ -9599,7 +9573,7 @@ __func__.8769:
 	.4byte	0
 .LLST30:
 	.4byte	.LVL57
-	.4byte	.LVL60
+	.4byte	.LVL61
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
@@ -9608,11 +9582,11 @@ __func__.8769:
 	.4byte	.LVL62
 	.4byte	.LVL63
 	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL71
-	.4byte	.LVL72-1
+	.byte	0x53
+	.4byte	.LVL81
+	.4byte	.LVL82-1
 	.2byte	0x1
-	.byte	0x50
+	.byte	0x53
 	.4byte	0
 	.4byte	0
 .LLST32:
@@ -9620,70 +9594,70 @@ __func__.8769:
 	.4byte	.LVL63
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL71
-	.4byte	.LVL73
+	.4byte	.LVL81
+	.4byte	.LVL83
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
 .LLST33:
-	.4byte	.LVL76
-	.4byte	.LVL78
+	.4byte	.LVL67
+	.4byte	.LVL69
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
 .LLST34:
-	.4byte	.LVL76
-	.4byte	.LVL77-1
+	.4byte	.LVL67
+	.4byte	.LVL68-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL77-1
-	.4byte	.LVL78
+	.4byte	.LVL68-1
+	.4byte	.LVL69
 	.2byte	0x1
-	.byte	0x55
+	.byte	0x56
 	.4byte	0
 	.4byte	0
 .LLST35:
-	.4byte	.LVL76
-	.4byte	.LVL77-1
+	.4byte	.LVL67
+	.4byte	.LVL68-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL77-1
-	.4byte	.LVL78
+	.4byte	.LVL68-1
+	.4byte	.LVL69
 	.2byte	0x1
-	.byte	0x54
+	.byte	0x55
 	.4byte	0
 	.4byte	0
 .LLST36:
+	.4byte	.LVL84
 	.4byte	.LVL85
-	.4byte	.LVL86
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
 .LLST37:
-	.4byte	.LVL85
-	.4byte	.LVL86-1
+	.4byte	.LVL84
+	.4byte	.LVL85-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL86-1
-	.4byte	.LVL86
+	.4byte	.LVL85-1
+	.4byte	.LVL85
 	.2byte	0x1
-	.byte	0x55
+	.byte	0x56
 	.4byte	0
 	.4byte	0
 .LLST38:
-	.4byte	.LVL85
-	.4byte	.LVL86-1
+	.4byte	.LVL84
+	.4byte	.LVL85-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL86-1
-	.4byte	.LVL86
+	.4byte	.LVL85-1
+	.4byte	.LVL85
 	.2byte	0x1
-	.byte	0x54
+	.byte	0x55
 	.4byte	0
 	.4byte	0
 .LLST9:
@@ -9692,7 +9666,7 @@ __func__.8769:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL34-1
-	.4byte	.LFE203
+	.4byte	.LFE207
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
@@ -9703,7 +9677,7 @@ __func__.8769:
 	.2byte	0x1
 	.byte	0x51
 	.4byte	.LVL31
-	.4byte	.LFE203
+	.4byte	.LFE207
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
@@ -9718,7 +9692,7 @@ __func__.8769:
 	.2byte	0x1
 	.byte	0x51
 	.4byte	.LVL34-1
-	.4byte	.LFE203
+	.4byte	.LFE207
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9736,7 +9710,7 @@ __func__.8769:
 	.2byte	0x1
 	.byte	0x52
 	.4byte	.LVL34-1
-	.4byte	.LFE203
+	.4byte	.LFE207
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9759,12 +9733,12 @@ __func__.8769:
 	.4byte	0
 	.4byte	0
 .LLST57:
+	.4byte	.LVL117
 	.4byte	.LVL118
-	.4byte	.LVL119
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL119
-	.4byte	.LFE201
+	.4byte	.LVL118
+	.4byte	.LFE205
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9793,7 +9767,7 @@ __func__.8769:
 	.2byte	0x1
 	.byte	0x55
 	.4byte	.LVL19
-	.4byte	.LFE217
+	.4byte	.LFE221
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9818,7 +9792,7 @@ __func__.8769:
 	.byte	0x51
 	.byte	0x9f
 	.4byte	.LVL16
-	.4byte	.LFE217
+	.4byte	.LFE221
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
@@ -9840,7 +9814,7 @@ __func__.8769:
 	.byte	0x52
 	.byte	0x9f
 	.4byte	.LVL16
-	.4byte	.LFE217
+	.4byte	.LFE221
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
@@ -9862,7 +9836,7 @@ __func__.8769:
 	.byte	0x53
 	.byte	0x9f
 	.4byte	.LVL16
-	.4byte	.LFE217
+	.4byte	.LFE221
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
@@ -9889,7 +9863,7 @@ __func__.8769:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL28
-	.4byte	.LFE217
+	.4byte	.LFE221
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
@@ -9910,7 +9884,7 @@ __func__.8769:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL28
-	.4byte	.LFE217
+	.4byte	.LFE221
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
@@ -9984,24 +9958,24 @@ __func__.8769:
 	.byte	0
 	.2byte	0
 	.2byte	0
-	.4byte	.LFB217
-	.4byte	.LFE217-.LFB217
-	.4byte	.LFB203
-	.4byte	.LFE203-.LFB203
+	.4byte	.LFB221
+	.4byte	.LFE221-.LFB221
 	.4byte	.LFB207
 	.4byte	.LFE207-.LFB207
-	.4byte	.LFB208
-	.4byte	.LFE208-.LFB208
-	.4byte	.LFB212
-	.4byte	.LFE212-.LFB212
-	.4byte	.LFB201
-	.4byte	.LFE201-.LFB201
 	.4byte	.LFB211
 	.4byte	.LFE211-.LFB211
-	.4byte	.LFB213
-	.4byte	.LFE213-.LFB213
+	.4byte	.LFB212
+	.4byte	.LFE212-.LFB212
 	.4byte	.LFB216
 	.4byte	.LFE216-.LFB216
+	.4byte	.LFB205
+	.4byte	.LFE205-.LFB205
+	.4byte	.LFB215
+	.4byte	.LFE215-.LFB215
+	.4byte	.LFB217
+	.4byte	.LFE217-.LFB217
+	.4byte	.LFB220
+	.4byte	.LFE220-.LFB220
 	.4byte	0
 	.4byte	0
 	.section	.debug_ranges,"",%progbits
@@ -10010,202 +9984,206 @@ __func__.8769:
 	.4byte	.LBE35
 	.4byte	.LBB39
 	.4byte	.LBE39
-	.4byte	.LBB45
-	.4byte	.LBE45
+	.4byte	.LBB51
+	.4byte	.LBE51
 	.4byte	0
 	.4byte	0
 	.4byte	.LBB42
 	.4byte	.LBE42
-	.4byte	.LBB46
-	.4byte	.LBE46
-	.4byte	0
-	.4byte	0
-	.4byte	.LBB47
-	.4byte	.LBE47
-	.4byte	.LBB51
-	.4byte	.LBE51
 	.4byte	.LBB52
 	.4byte	.LBE52
 	.4byte	0
 	.4byte	0
+	.4byte	.LBB45
+	.4byte	.LBE45
+	.4byte	.LBB49
+	.4byte	.LBE49
+	.4byte	.LBB50
+	.4byte	.LBE50
+	.4byte	0
+	.4byte	0
 	.4byte	.LBB82
 	.4byte	.LBE82
-	.4byte	.LBB96
-	.4byte	.LBE96
+	.4byte	.LBB93
+	.4byte	.LBE93
+	.4byte	.LBB100
+	.4byte	.LBE100
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB92
-	.4byte	.LBE92
-	.4byte	.LBB95
-	.4byte	.LBE95
+	.4byte	.LBB94
+	.4byte	.LBE94
+	.4byte	.LBB98
+	.4byte	.LBE98
+	.4byte	.LBB99
+	.4byte	.LBE99
 	.4byte	0
 	.4byte	0
-	.4byte	.LFB217
-	.4byte	.LFE217
-	.4byte	.LFB203
-	.4byte	.LFE203
+	.4byte	.LFB221
+	.4byte	.LFE221
 	.4byte	.LFB207
 	.4byte	.LFE207
-	.4byte	.LFB208
-	.4byte	.LFE208
-	.4byte	.LFB212
-	.4byte	.LFE212
-	.4byte	.LFB201
-	.4byte	.LFE201
 	.4byte	.LFB211
 	.4byte	.LFE211
-	.4byte	.LFB213
-	.4byte	.LFE213
+	.4byte	.LFB212
+	.4byte	.LFE212
 	.4byte	.LFB216
 	.4byte	.LFE216
+	.4byte	.LFB205
+	.4byte	.LFE205
+	.4byte	.LFB215
+	.4byte	.LFE215
+	.4byte	.LFB217
+	.4byte	.LFE217
+	.4byte	.LFB220
+	.4byte	.LFE220
 	.4byte	0
 	.4byte	0
 	.section	.debug_line,"",%progbits
 .Ldebug_line0:
 	.section	.debug_str,"MS",%progbits,1
-.LASF385:
+.LASF396:
 	.ascii	"memalign_simple\000"
-.LASF339:
+.LASF350:
 	.ascii	"blob\000"
-.LASF130:
+.LASF132:
 	.ascii	"off_mem_rsvmap\000"
-.LASF201:
+.LASF203:
 	.ascii	"IH_COMP_GZIP\000"
 .LASF18:
 	.ascii	"size_t\000"
-.LASF250:
+.LASF252:
 	.ascii	"initrd_start\000"
 .LASF13:
 	.ascii	"sizetype\000"
-.LASF272:
+.LASF286:
 	.ascii	"net_hostname\000"
 .LASF77:
 	.ascii	"start\000"
-.LASF156:
+.LASF158:
 	.ascii	"IH_OS_ARTOS\000"
-.LASF293:
+.LASF306:
 	.ascii	"NETLOOP_RESTART\000"
 .LASF48:
 	.ascii	"IF_TYPE_MTD\000"
-.LASF377:
+.LASF388:
 	.ascii	"fdt_shrink_to_minimum\000"
-.LASF364:
+.LASF375:
 	.ascii	"fit_get_name\000"
-.LASF209:
+.LASF211:
 	.ascii	"ih_magic\000"
-.LASF322:
+.LASF333:
 	.ascii	"__func__\000"
 .LASF37:
 	.ascii	"IF_TYPE_DOC\000"
-.LASF400:
+.LASF410:
 	.ascii	"/home/zzz/u-boot\000"
 .LASF59:
 	.ascii	"part_type\000"
-.LASF110:
+.LASF112:
 	.ascii	"bi_intfreq\000"
-.LASF183:
+.LASF185:
 	.ascii	"IH_TYPE_ATMELIMAGE\000"
 .LASF11:
 	.ascii	"phys_addr_t\000"
-.LASF260:
+.LASF262:
 	.ascii	"monitor_flash_len\000"
 .LASF5:
 	.ascii	"__u8\000"
 .LASF67:
 	.ascii	"vendor\000"
-.LASF292:
+.LASF305:
 	.ascii	"NETLOOP_CONTINUE\000"
-.LASF86:
+.LASF88:
 	.ascii	"flash_info_t\000"
-.LASF226:
+.LASF228:
 	.ascii	"comp\000"
-.LASF221:
+.LASF223:
 	.ascii	"image_header_t\000"
-.LASF255:
+.LASF257:
 	.ascii	"state\000"
-.LASF332:
+.LASF343:
 	.ascii	"align_len\000"
-.LASF104:
+.LASF106:
 	.ascii	"bi_dsp_freq\000"
-.LASF223:
+.LASF225:
 	.ascii	"image_start\000"
-.LASF328:
+.LASF339:
 	.ascii	"part_name\000"
-.LASF325:
+.LASF336:
 	.ascii	"spl_internal_load_simple_fit\000"
-.LASF202:
+.LASF204:
 	.ascii	"IH_COMP_BZIP2\000"
-.LASF140:
+.LASF142:
 	.ascii	"IH_OS_FREEBSD\000"
 .LASF62:
 	.ascii	"type\000"
 .LASF50:
 	.ascii	"if_type\000"
-.LASF213:
+.LASF215:
 	.ascii	"ih_load\000"
-.LASF174:
+.LASF176:
 	.ascii	"IH_TYPE_KWBIMAGE\000"
 .LASF26:
 	.ascii	"efi_guid_t\000"
-.LASF262:
+.LASF264:
 	.ascii	"__dtb_dt_spl_begin\000"
-.LASF323:
+.LASF334:
 	.ascii	"conf_noffset\000"
-.LASF143:
+.LASF145:
 	.ascii	"IH_OS_SVR4\000"
 .LASF7:
 	.ascii	"__u32\000"
-.LASF307:
+.LASF280:
 	.ascii	"priv\000"
-.LASF182:
+.LASF184:
 	.ascii	"IH_TYPE_GPIMAGE\000"
 .LASF70:
 	.ascii	"bdev\000"
-.LASF277:
+.LASF291:
 	.ascii	"net_server_ip\000"
-.LASF207:
+.LASF209:
 	.ascii	"IH_COMP_COUNT\000"
-.LASF285:
+.LASF299:
 	.ascii	"net_native_vlan\000"
 .LASF63:
 	.ascii	"removable\000"
-.LASF369:
+.LASF380:
 	.ascii	"fdt_getprop\000"
 .LASF24:
 	.ascii	"errno\000"
 .LASF15:
 	.ascii	"long int\000"
-.LASF99:
+.LASF101:
 	.ascii	"bi_flashsize\000"
-.LASF144:
+.LASF146:
 	.ascii	"IH_OS_ESIX\000"
-.LASF170:
+.LASF172:
 	.ascii	"IH_TYPE_FIRMWARE\000"
-.LASF397:
+.LASF407:
 	.ascii	"strchr\000"
-.LASF251:
+.LASF253:
 	.ascii	"initrd_end\000"
-.LASF123:
+.LASF125:
 	.ascii	"IRQ_STACK_START_IN\000"
-.LASF134:
+.LASF136:
 	.ascii	"size_dt_strings\000"
-.LASF390:
+.LASF399:
 	.ascii	"puts\000"
-.LASF366:
+.LASF377:
 	.ascii	"image_get_magic\000"
-.LASF367:
+.LASF378:
 	.ascii	"__fswab32\000"
-.LASF288:
+.LASF302:
 	.ascii	"net_boot_file_size\000"
-.LASF351:
+.LASF362:
 	.ascii	"data\000"
-.LASF278:
+.LASF292:
 	.ascii	"net_tx_packet\000"
-.LASF165:
+.LASF167:
 	.ascii	"IH_TYPE_INVALID\000"
-.LASF215:
+.LASF217:
 	.ascii	"ih_dcrc\000"
-.LASF109:
+.LASF111:
 	.ascii	"bi_ethspeed\000"
 .LASF66:
 	.ascii	"log2blksz\000"
@@ -10213,389 +10191,395 @@ __func__.8769:
 	.ascii	"IF_TYPE_HOST\000"
 .LASF71:
 	.ascii	"ide_bus_offset\000"
-.LASF359:
+.LASF370:
 	.ascii	"spl_fit_get_image_node\000"
-.LASF275:
+.LASF289:
 	.ascii	"net_server_ethaddr\000"
-.LASF112:
+.LASF114:
 	.ascii	"bi_arch_number\000"
-.LASF266:
+.LASF268:
 	.ascii	"in_addr\000"
 .LASF3:
 	.ascii	"signed char\000"
 .LASF21:
 	.ascii	"uint8_t\000"
-.LASF384:
+.LASF395:
 	.ascii	"fit_image_get_data_size\000"
-.LASF401:
+.LASF86:
 	.ascii	"udevice\000"
-.LASF388:
+.LASF397:
 	.ascii	"fit_image_verify_with_data\000"
-.LASF217:
+.LASF219:
 	.ascii	"ih_arch\000"
-.LASF127:
+.LASF129:
 	.ascii	"totalsize\000"
-.LASF210:
+.LASF212:
 	.ascii	"ih_hcrc\000"
-.LASF302:
+.LASF315:
 	.ascii	"fdt_addr\000"
-.LASF191:
+.LASF193:
 	.ascii	"IH_TYPE_ZYNQIMAGE\000"
-.LASF89:
+.LASF91:
 	.ascii	"lmb_property\000"
-.LASF132:
+.LASF134:
 	.ascii	"last_comp_version\000"
-.LASF310:
-	.ascii	"read\000"
 .LASF0:
 	.ascii	"unsigned char\000"
-.LASF114:
+.LASF116:
 	.ascii	"bi_andr_version\000"
 .LASF45:
 	.ascii	"IF_TYPE_SPINAND\000"
-.LASF257:
+.LASF259:
 	.ascii	"images\000"
-.LASF365:
+.LASF376:
 	.ascii	"fit_hdr\000"
-.LASF177:
+.LASF179:
 	.ascii	"IH_TYPE_OMAPIMAGE\000"
 .LASF53:
 	.ascii	"SIG_TYPE_MBR\000"
-.LASF105:
+.LASF107:
 	.ascii	"bi_ddr_freq\000"
-.LASF212:
+.LASF214:
 	.ascii	"ih_size\000"
-.LASF318:
+.LASF330:
 	.ascii	"fit_header\000"
 .LASF27:
 	.ascii	"_Bool\000"
 .LASF52:
 	.ascii	"SIG_TYPE_NONE\000"
-.LASF188:
+.LASF190:
 	.ascii	"IH_TYPE_RKIMAGE\000"
-.LASF193:
+.LASF195:
 	.ascii	"IH_TYPE_FPGA\000"
 .LASF14:
 	.ascii	"char\000"
 .LASF29:
 	.ascii	"_binary_u_boot_bin_start\000"
-.LASF294:
+.LASF307:
 	.ascii	"NETLOOP_SUCCESS\000"
-.LASF139:
+.LASF141:
 	.ascii	"IH_OS_NETBSD\000"
 .LASF74:
 	.ascii	"name\000"
-.LASF291:
+.LASF304:
 	.ascii	"net_loop_state\000"
-.LASF95:
+.LASF97:
 	.ascii	"bd_info\000"
 .LASF58:
 	.ascii	"devnum\000"
-.LASF196:
+.LASF198:
 	.ascii	"IH_TYPE_FIRMWARE_IVT\000"
-.LASF396:
+.LASF271:
+	.ascii	"enetaddr\000"
+.LASF406:
 	.ascii	"fdt_next_subnode\000"
-.LASF309:
+.LASF321:
 	.ascii	"filename\000"
-.LASF240:
+.LASF242:
 	.ascii	"fit_hdr_fdt\000"
-.LASF286:
+.LASF300:
 	.ascii	"net_restart_wrap\000"
-.LASF317:
+.LASF329:
 	.ascii	"sector_offs\000"
-.LASF274:
+.LASF288:
 	.ascii	"net_ethaddr\000"
 .LASF51:
 	.ascii	"sig_type\000"
-.LASF303:
+.LASF316:
 	.ascii	"boot_device\000"
-.LASF155:
+.LASF157:
 	.ascii	"IH_OS_RTEMS\000"
-.LASF305:
+.LASF318:
 	.ascii	"flags\000"
-.LASF218:
+.LASF220:
 	.ascii	"ih_type\000"
-.LASF187:
+.LASF189:
 	.ascii	"IH_TYPE_LOADABLE\000"
-.LASF128:
+.LASF130:
 	.ascii	"off_dt_struct\000"
-.LASF100:
+.LASF102:
 	.ascii	"bi_flashoffset\000"
-.LASF287:
+.LASF301:
 	.ascii	"net_boot_file_name\000"
-.LASF376:
+.LASF387:
 	.ascii	"strcmp\000"
-.LASF211:
+.LASF213:
 	.ascii	"ih_time\000"
-.LASF321:
+.LASF332:
 	.ascii	"node\000"
 .LASF34:
 	.ascii	"IF_TYPE_SCSI\000"
-.LASF298:
+.LASF311:
 	.ascii	"__bss_end\000"
-.LASF227:
+.LASF229:
 	.ascii	"arch\000"
 .LASF65:
 	.ascii	"blksz\000"
 .LASF75:
 	.ascii	"select_hwpart\000"
-.LASF279:
+.LASF293:
 	.ascii	"net_rx_packets\000"
-.LASF311:
+.LASF323:
 	.ascii	"mem_malloc_start\000"
-.LASF361:
+.LASF372:
 	.ascii	"outname\000"
-.LASF122:
+.LASF124:
 	.ascii	"_datarelro_start_ofs\000"
 .LASF20:
 	.ascii	"ulong\000"
-.LASF214:
+.LASF216:
 	.ascii	"ih_ep\000"
-.LASF91:
+.LASF93:
 	.ascii	"lmb_region\000"
-.LASF358:
+.LASF369:
 	.ascii	"get_aligned_image_offset\000"
-.LASF171:
+.LASF173:
 	.ascii	"IH_TYPE_SCRIPT\000"
-.LASF374:
+.LASF382:
 	.ascii	"printf\000"
-.LASF180:
+.LASF182:
 	.ascii	"IH_TYPE_PBLIMAGE\000"
-.LASF235:
+.LASF237:
 	.ascii	"fit_uname_os\000"
-.LASF106:
+.LASF108:
 	.ascii	"bi_bootflags\000"
-.LASF276:
+.LASF290:
 	.ascii	"net_ip\000"
 .LASF47:
 	.ascii	"IF_TYPE_RAMDISK\000"
-.LASF164:
+.LASF166:
 	.ascii	"IH_OS_COUNT\000"
-.LASF270:
+.LASF284:
 	.ascii	"net_dns_server\000"
-.LASF297:
+.LASF310:
 	.ascii	"__bss_start\000"
-.LASF290:
-	.ascii	"net_ping_ip\000"
 .LASF39:
 	.ascii	"IF_TYPE_SD\000"
-.LASF93:
+.LASF95:
 	.ascii	"memory\000"
-.LASF179:
+.LASF181:
 	.ascii	"IH_TYPE_KERNEL_NOLOAD\000"
-.LASF125:
+.LASF127:
 	.ascii	"fdt_header\000"
-.LASF387:
+.LASF401:
 	.ascii	"fdt_getprop_u32\000"
-.LASF312:
+.LASF324:
 	.ascii	"mem_malloc_end\000"
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 	.ascii	"fit_find_config_node\000"
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 	.ascii	"rd_end\000"
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 	.ascii	"spl_fit_standalone_release\000"
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 	.ascii	"cmdline_start\000"
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 	.ascii	"index\000"
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 	.ascii	"nr_sectors\000"
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 	.ascii	"fit_uname_cfg\000"
 .LASF79:
 	.ascii	"bootable\000"
 .LASF1:
 	.ascii	"long unsigned int\000"
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 	.ascii	"IH_TYPE_FILESYSTEM\000"
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 	.ascii	"net_nis_domain\000"
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 	.ascii	"fit_noffset_fdt\000"
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 	.ascii	"bl_len\000"
 .LASF60:
 	.ascii	"target\000"
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 	.ascii	"IH_OS_OSE\000"
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 	.ascii	"spl_fit_record_loadable\000"
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 	.ascii	"fit_board_verify_required_sigs\000"
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 	.ascii	"NETLOOP_FAIL\000"
 .LASF43:
 	.ascii	"IF_TYPE_NVME\000"
-.LASF304:
+.LASF317:
 	.ascii	"next_stage\000"
-.LASF101:
+.LASF103:
 	.ascii	"bi_sramstart\000"
 .LASF30:
 	.ascii	"_binary_u_boot_bin_end\000"
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+.LASF135:
 	.ascii	"boot_cpuid_phys\000"
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 	.ascii	"fit_uname_rd\000"
 .LASF17:
 	.ascii	"uintptr_t\000"
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 	.ascii	"IH_COMP_ZIMAGE\000"
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 	.ascii	"noffset\000"
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 	.ascii	"net_our_vlan\000"
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 	.ascii	"fit_image_get_os\000"
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 	.ascii	"image_info_t\000"
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 	.ascii	"IH_TYPE_MULTI\000"
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 	.ascii	"IH_TYPE_AISIMAGE\000"
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 	.ascii	"sectors\000"
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 	.ascii	"image_len\000"
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 	.ascii	"bi_ip_addr\000"
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 	.ascii	"IH_OS_INVALID\000"
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 	.ascii	"IH_COMP_NONE\000"
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 	.ascii	"IH_OS_4_4BSD\000"
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 	.ascii	"IH_TYPE_LPC32XXIMAGE\000"
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 	.ascii	"legacy_hdr_os_copy\000"
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 	.ascii	"fdt_get_name\000"
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 	.ascii	"sha256_der_prefix\000"
 .LASF9:
 	.ascii	"long long int\000"
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 	.ascii	"IH_TYPE_RKNAND\000"
 .LASF25:
 	.ascii	"___strtok\000"
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 	.ascii	"net_boot_file_expected_size_in_blocks\000"
 .LASF16:
 	.ascii	"__kernel_size_t\000"
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 	.ascii	"bootm_headers\000"
 .LASF85:
 	.ascii	"protect\000"
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 	.ascii	"disk_partition_t\000"
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 	.ascii	"fit_conf_get_node\000"
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 	.ascii	"net_null_ethaddr\000"
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 	.ascii	"spl_fit_get_image_name\000"
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 	.ascii	"load_addr\000"
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 	.ascii	"IH_TYPE_UBLIMAGE\000"
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 	.ascii	"fit_hdr_os\000"
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 	.ascii	"_datarelrolocal_start_ofs\000"
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 	.ascii	"count\000"
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 	.ascii	"IH_TYPE_SOCFPGAIMAGE\000"
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 	.ascii	"fdt_path_offset\000"
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-	.ascii	"sys_ind\000"
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+	.ascii	"read\000"
 .LASF80:
 	.ascii	"uuid\000"
 .LASF8:
 	.ascii	"unsigned int\000"
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 	.ascii	"sector\000"
 .LASF19:
 	.ascii	"ushort\000"
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+	.ascii	"eth_device\000"
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 	.ascii	"net_state\000"
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 	.ascii	"legacy_hdr_os\000"
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 	.ascii	"off_dt_strings\000"
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 	.ascii	"IH_TYPE_TEE\000"
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 	.ascii	"IH_TYPE_X86_SETUP\000"
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 	.ascii	"bi_memsize\000"
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 	.ascii	"image\000"
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 	.ascii	"comp_addr\000"
 .LASF28:
 	.ascii	"image_base\000"
 .LASF36:
 	.ascii	"IF_TYPE_USB\000"
-.LASF199:
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+	.ascii	"write_hwaddr\000"
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 	.ascii	"IH_TYPE_COUNT\000"
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 	.ascii	"offset\000"
 .LASF35:
 	.ascii	"IF_TYPE_ATAPI\000"
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 	.ascii	"fdt_record_loadable\000"
 .LASF46:
 	.ascii	"IF_TYPE_SPINOR\000"
-.LASF154:
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 	.ascii	"IH_OS_U_BOOT\000"
-.LASF256:
+.LASF81:
+	.ascii	"type_guid\000"
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 	.ascii	"bootm_headers_t\000"
-.LASF103:
+.LASF105:
 	.ascii	"bi_arm_freq\000"
-.LASF237:
+.LASF275:
+	.ascii	"recv\000"
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 	.ascii	"fit_hdr_rd\000"
 .LASF44:
 	.ascii	"IF_TYPE_RKNAND\000"
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 	.ascii	"bi_sramsize\000"
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 	.ascii	"overhead\000"
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 	.ascii	"long double\000"
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 	.ascii	"rd_start\000"
 .LASF64:
 	.ascii	"op_flag\000"
 .LASF68:
 	.ascii	"product\000"
-.LASF203:
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 	.ascii	"IH_COMP_LZMA\000"
-.LASF265:
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 	.ascii	"save_size\000"
-.LASF356:
+.LASF367:
 	.ascii	"data_size\000"
-.LASF315:
+.LASF327:
 	.ascii	"info\000"
-.LASF119:
+.LASF272:
+	.ascii	"iobase\000"
+.LASF121:
 	.ascii	"_datarel_start_ofs\000"
 .LASF57:
 	.ascii	"guid_sig\000"
-.LASF220:
+.LASF222:
 	.ascii	"ih_name\000"
-.LASF194:
+.LASF196:
 	.ascii	"IH_TYPE_VYBRIDIMAGE\000"
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 	.ascii	"ih_os\000"
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 	.ascii	"cmdline_end\000"
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 	.ascii	"net_rx_packet\000"
-.LASF145:
+.LASF147:
 	.ascii	"IH_OS_SOLARIS\000"
 .LASF78:
 	.ascii	"size\000"
@@ -10605,189 +10589,195 @@ __func__.8769:
 	.ascii	"long long unsigned int\000"
 .LASF33:
 	.ascii	"IF_TYPE_IDE\000"
-.LASF208:
+.LASF210:
 	.ascii	"image_header\000"
 .LASF31:
 	.ascii	"lbaint_t\000"
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 	.ascii	"length\000"
 .LASF23:
 	.ascii	"__be32\000"
-.LASF98:
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 	.ascii	"bi_flashstart\000"
-.LASF236:
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 	.ascii	"fit_noffset_os\000"
-.LASF149:
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 	.ascii	"IH_OS_NCR\000"
-.LASF222:
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 	.ascii	"image_info\000"
-.LASF389:
+.LASF398:
 	.ascii	"board_fit_image_post_process\000"
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 	.ascii	"IH_OS_OPENRTOS\000"
-.LASF147:
+.LASF149:
 	.ascii	"IH_OS_SCO\000"
-.LASF189:
+.LASF191:
 	.ascii	"IH_TYPE_RKSD\000"
-.LASF299:
+.LASF312:
 	.ascii	"spl_image_info\000"
-.LASF327:
+.LASF338:
 	.ascii	"images_noffset\000"
-.LASF355:
+.LASF366:
 	.ascii	"get_aligned_image_size\000"
-.LASF350:
+.LASF361:
 	.ascii	"image_comp\000"
 .LASF42:
 	.ascii	"IF_TYPE_SYSTEMACE\000"
-.LASF306:
+.LASF319:
 	.ascii	"spl_load_info\000"
-.LASF399:
+.LASF409:
 	.ascii	"common/spl/spl_fit_tb_arm_v7.c\000"
-.LASF395:
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 	.ascii	"fdt_first_subnode\000"
 .LASF49:
 	.ascii	"IF_TYPE_COUNT\000"
-.LASF87:
+.LASF89:
 	.ascii	"flash_info\000"
-.LASF131:
+.LASF133:
 	.ascii	"version\000"
-.LASF92:
+.LASF276:
+	.ascii	"halt\000"
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 	.ascii	"region\000"
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 	.ascii	"size_dt_struct\000"
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 	.ascii	"os_type\000"
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 	.ascii	"desc\000"
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 	.ascii	"fdt32_t\000"
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 	.ascii	"IH_OS_LINUX\000"
 .LASF72:
 	.ascii	"blk_desc\000"
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 	.ascii	"base_offset\000"
-.LASF108:
+.LASF110:
 	.ascii	"bi_enetaddr\000"
-.LASF341:
+.LASF87:
+	.ascii	"mtd_info\000"
+.LASF352:
 	.ascii	"spl_fit_load_blob\000"
 .LASF54:
 	.ascii	"SIG_TYPE_GUID\000"
-.LASF281:
+.LASF295:
 	.ascii	"net_rx_packet_len\000"
+.LASF273:
+	.ascii	"init\000"
 .LASF76:
 	.ascii	"disk_partition\000"
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+.LASF153:
 	.ascii	"IH_OS_VXWORKS\000"
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 	.ascii	"fit_image_get_data_position\000"
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 	.ascii	"__dtb_dt_begin\000"
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 	.ascii	"IH_OS_PLAN9\000"
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 	.ascii	"IH_TYPE_KERNEL\000"
 .LASF38:
 	.ascii	"IF_TYPE_MMC\000"
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 	.ascii	"fit_noffset_rd\000"
 .LASF12:
 	.ascii	"phys_size_t\000"
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 	.ascii	"FIQ_STACK_START\000"
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 	.ascii	"verify\000"
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 	.ascii	"spl_load_kernel_fit\000"
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 	.ascii	"IH_COMP_LZ4\000"
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 	.ascii	"IH_TYPE_IMXIMAGE\000"
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 	.ascii	"bi_busfreq\000"
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 	.ascii	"short int\000"
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 	.ascii	"load_ptr\000"
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 	.ascii	"IH_TYPE_ZYNQMPIMAGE\000"
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 	.ascii	"IH_COMP_LZO\000"
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 	.ascii	"fit_image_get_comp\000"
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 	.ascii	"IH_TYPE_MXSIMAGE\000"
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 	.ascii	"fit_image_get_data_offset\000"
 .LASF56:
 	.ascii	"mbr_sig\000"
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 	.ascii	"save_addr\000"
-.LASF380:
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 	.ascii	"fit_image_get_load\000"
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 	.ascii	"IH_OS_UNITY\000"
-.LASF336:
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 	.ascii	"spl_fit_image_get_os\000"
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 	.ascii	"IH_OS_OPENBSD\000"
-.LASF362:
+.LASF373:
 	.ascii	"conf_node\000"
-.LASF162:
+.LASF164:
 	.ascii	"IH_OS_ARM_TRUSTED_FIRMWARE\000"
-.LASF225:
+.LASF227:
 	.ascii	"load\000"
 .LASF61:
 	.ascii	"hwpart\000"
-.LASF121:
+.LASF123:
 	.ascii	"_datarellocal_start_ofs\000"
-.LASF153:
+.LASF155:
 	.ascii	"IH_OS_QNX\000"
-.LASF314:
+.LASF326:
 	.ascii	"spl_image\000"
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 	.ascii	"sha1_der_prefix\000"
 .LASF73:
 	.ascii	"block_drvr\000"
-.LASF391:
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 	.ascii	"memcpy\000"
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 	.ascii	"spl_load_simple_fit\000"
 .LASF84:
 	.ascii	"flash_id\000"
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 	.ascii	"fit_noffset_setup\000"
-.LASF136:
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 	.ascii	"working_fdt\000"
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 	.ascii	"get_aligned_image_overhead\000"
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 	.ascii	"net_root_path\000"
-.LASF116:
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 	.ascii	"bd_t\000"
-.LASF267:
+.LASF269:
 	.ascii	"s_addr\000"
-.LASF173:
+.LASF175:
 	.ascii	"IH_TYPE_FLATDT\000"
-.LASF282:
+.LASF296:
 	.ascii	"net_bcast_ethaddr\000"
-.LASF113:
+.LASF115:
 	.ascii	"bi_boot_params\000"
 .LASF22:
 	.ascii	"uint32_t\000"
-.LASF313:
+.LASF325:
 	.ascii	"mem_malloc_brk\000"
-.LASF268:
+.LASF282:
 	.ascii	"net_gateway\000"
-.LASF152:
+.LASF154:
 	.ascii	"IH_OS_PSOS\000"
-.LASF150:
+.LASF152:
 	.ascii	"IH_OS_LYNXOS\000"
-.LASF381:
+.LASF392:
 	.ascii	"fit_image_get_comp_addr\000"
-.LASF393:
+.LASF403:
 	.ascii	"fdt_subnode_offset\000"
-.LASF398:
+.LASF408:
 	.ascii	"GNU C11 6.3.1 20170404 -mthumb -mthumb-interwork -m"
 	.ascii	"abi=aapcs-linux -mno-unaligned-access -mfloat-abi=s"
 	.ascii	"oft -march=armv7-a -mtune=cortex-a9 -mfpu=vfpv3-d16"
@@ -10797,81 +10787,87 @@ __func__.8769:
 	.ascii	"s -fdata-sections -fno-common -ffixed-r9\000"
 .LASF32:
 	.ascii	"IF_TYPE_UNKNOWN\000"
-.LASF96:
+.LASF98:
 	.ascii	"bi_memstart\000"
-.LASF197:
+.LASF199:
 	.ascii	"IH_TYPE_PMMC\000"
-.LASF190:
+.LASF192:
 	.ascii	"IH_TYPE_RKSPI\000"
-.LASF163:
+.LASF165:
 	.ascii	"IH_OS_OP_TEE\000"
-.LASF148:
+.LASF281:
+	.ascii	"eth_current\000"
+.LASF150:
 	.ascii	"IH_OS_DELL\000"
-.LASF94:
+.LASF96:
 	.ascii	"reserved\000"
-.LASF342:
+.LASF353:
 	.ascii	"spl_fit_append_fdt\000"
-.LASF300:
+.LASF313:
 	.ascii	"entry_point\000"
-.LASF166:
+.LASF168:
 	.ascii	"IH_TYPE_STANDALONE\000"
-.LASF115:
+.LASF117:
 	.ascii	"bi_dram\000"
 .LASF2:
 	.ascii	"short unsigned int\000"
-.LASF126:
+.LASF128:
 	.ascii	"magic\000"
-.LASF331:
+.LASF342:
 	.ascii	"spl_kernel_partition\000"
-.LASF243:
+.LASF245:
 	.ascii	"fit_hdr_setup\000"
-.LASF232:
+.LASF234:
 	.ascii	"legacy_hdr_valid\000"
-.LASF90:
+.LASF92:
 	.ascii	"base\000"
-.LASF158:
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 	.ascii	"IH_OS_INTEGRITY\000"
 .LASF83:
 	.ascii	"sector_count\000"
-.LASF363:
+.LASF374:
 	.ascii	"fit_config_verify\000"
-.LASF219:
+.LASF221:
 	.ascii	"ih_comp\000"
-.LASF352:
+.LASF363:
 	.ascii	"external_data\000"
-.LASF329:
+.LASF340:
 	.ascii	"part_info\000"
 .LASF40:
 	.ascii	"IF_TYPE_SATA\000"
 .LASF55:
 	.ascii	"SIG_TYPE_COUNT\000"
-.LASF248:
+.LASF250:
 	.ascii	"ft_addr\000"
-.LASF353:
+.LASF364:
 	.ascii	"preload\000"
 .LASF4:
 	.ascii	"uchar\000"
-.LASF375:
+.LASF386:
 	.ascii	"part_get_info_by_name\000"
-.LASF146:
+.LASF148:
 	.ascii	"IH_OS_IRIX\000"
-.LASF249:
+.LASF251:
 	.ascii	"ft_len\000"
-.LASF168:
+.LASF278:
+	.ascii	"next\000"
+.LASF170:
 	.ascii	"IH_TYPE_RAMDISK\000"
-.LASF244:
+.LASF246:
 	.ascii	"fit_uname_setup\000"
-.LASF269:
+.LASF283:
 	.ascii	"net_netmask\000"
-.LASF343:
+.LASF274:
+	.ascii	"send\000"
+.LASF354:
 	.ascii	"spl_load_fit_image\000"
-.LASF117:
+.LASF119:
 	.ascii	"IRQ_STACK_START\000"
-.LASF301:
+.LASF314:
 	.ascii	"entry_point_os\000"
-.LASF241:
+.LASF243:
 	.ascii	"fit_uname_fdt\000"
-.LASF392:
+.LASF402:
 	.ascii	"fit_image_get_data\000"
 	.ident	"GCC: (Linaro GCC 6.3-2017.05) 6.3.1 20170404"
 	.section	.note.GNU-stack,"",%progbits

commit ee988fdb058f7f030c149d34112834dcbfa6af72
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue May 11 15:08:27 2021 +0800

    rockchip: rv1126: Add Space indentation before '#'
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I8b7f549d308a1eb9a6a8f00bd4e7cdf4a1575b11

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126.c b/arch/arm/mach-rockchip/rv1126/rv1126.c
index 5a0d9c944e..03c20fd616 100644
--- a/arch/arm/mach-rockchip/rv1126/rv1126.c
+++ b/arch/arm/mach-rockchip/rv1126/rv1126.c
@@ -679,9 +679,9 @@ int arch_cpu_init(void)
 	 * Init the i2c0 iomux and use it to control electronic voltmeter
 	 * to detect voltage.
 	 */
-#if defined(CONFIG_SPL_KERNEL_BOOT) && defined(CONFIG_SPL_DM_FUEL_GAUGE)
+  #if defined(CONFIG_SPL_KERNEL_BOOT) && defined(CONFIG_SPL_DM_FUEL_GAUGE)
 	writel(0x00770011, PMU_GRF_BASE + PMUGRF_GPIO0B_IOMUX_H);
-#endif
+  #endif
 
 #elif defined(CONFIG_SUPPORT_USBPLUG)
 	/* Just set region 0 to unsecure */

commit 51b38ff1002f2ed4c2c10d9c6ed4444c64ef7fdd
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon May 10 22:02:51 2021 +0800

    rockchip: rv1126: Pull GPIO0_D6 down for spiflash
    
    Change-Id: Id0d6c9b78b45b839c49c7951f5bc6c80be5b8f52
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126.c b/arch/arm/mach-rockchip/rv1126/rv1126.c
index 1189042b82..5a0d9c944e 100644
--- a/arch/arm/mach-rockchip/rv1126/rv1126.c
+++ b/arch/arm/mach-rockchip/rv1126/rv1126.c
@@ -717,11 +717,11 @@ int arch_cpu_init(void)
 	writel(0xFFFF1111, &grf->gpio1a_iomux_l);
   #endif
 
-  #if defined(CONFIG_ROCKCHIP_SFC) && (defined(CONFIG_SPL_BUILD) || defined(CONFIG_SUPPORT_USBPLUG))
+#endif
+
 	/* GPIO0_D6 pull down in default, pull up it for SPI Flash */
 	writel(((0x3 << 12) << 16) | (0x1 << 12), GRF1_GPIO0D_P);
-  #endif
-#endif
+
 	return 0;
 }
 #endif

commit 41372211f3a5743369426780c3496834ab22daca
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon May 10 17:19:56 2021 +0800

    armv8: sleep.S: fix compile error
    
      LD      u-boot
    arch/arm/cpu/armv8/built-in.o: In function `cpu_suspend':
    arch/arm/cpu/armv8/sleep.S:52:(.text+0x588): relocation truncated to fit: R_AARCH64_ADR_PREL_LO21 against `.data'
    arch/arm/cpu/armv8/built-in.o: In function `cpu_resume':
    arch/arm/cpu/armv8/sleep.S:137:(.text+0x654): relocation truncated to fit: R_AARCH64_ADR_PREL_LO21 against `.data'
    Makefile:1281: recipe for target 'u-boot' failed
    make: *** [u-boot] Error 1
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I19cfbe721ff0482eda66c74aa36e1c28d37da93c

diff --git a/arch/arm/cpu/armv8/sleep.S b/arch/arm/cpu/armv8/sleep.S
index a0232739d2..a1cd2fdea8 100644
--- a/arch/arm/cpu/armv8/sleep.S
+++ b/arch/arm/cpu/armv8/sleep.S
@@ -189,7 +189,7 @@ ENTRY(cpu_do_resume)
 	b	suspend_return
 ENDPROC(cpu_do_resume)
 
-.data
 .align 3
 _suspend_gd:
-	.long	0x0
\ No newline at end of file
+	.long	0x0
+

commit c93fd90096063543f17e780684c06d888c4186cd
Author: David Wu <david.wu@rock-chips.com>
Date:   Mon Dec 28 11:46:09 2020 +0800

    net: dwc_eth_qos: Don't reset phy every time
    
    Change-Id: Id2e3322f6171dfb89452757a458b5a0821136da3
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index ac78da8eac..5687fb28d5 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -1113,7 +1113,7 @@ static int eqos_read_rom_hwaddr(struct udevice *dev)
 int eqos_init(struct udevice *dev)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
-	int ret, limit = 10;
+	int ret = 0, limit = 10;
 	ulong rate;
 	u32 val;
 
@@ -1127,13 +1127,16 @@ int eqos_init(struct udevice *dev)
 		}
 	}
 
-	ret = eqos->config->ops->eqos_start_resets(dev);
-	if (ret < 0) {
-		pr_err("eqos_start_resets() failed: %d", ret);
-		goto err_stop_clks;
-	}
+	if (!eqos->mii_reseted) {
+		ret = eqos->config->ops->eqos_start_resets(dev);
+		if (ret < 0) {
+			pr_err("eqos_start_resets() failed: %d", ret);
+			goto err_stop_clks;
+		}
 
-	udelay(10);
+		eqos->mii_reseted = true;
+		udelay(10);
+	}
 
 	eqos->reg_access_ok = true;
 
@@ -1220,6 +1223,7 @@ err_shutdown_phy:
 	phy_shutdown(eqos->phy);
 err_stop_resets:
 	eqos->config->ops->eqos_stop_resets(dev);
+	eqos->mii_reseted = false;
 err_stop_clks:
 	if (eqos->config->ops->eqos_stop_clks)
 		eqos->config->ops->eqos_stop_clks(dev);
@@ -1520,7 +1524,6 @@ void eqos_stop(struct udevice *dev)
 	if (eqos->phy) {
 		phy_shutdown(eqos->phy);
 	}
-	eqos->config->ops->eqos_stop_resets(dev);
 	if (eqos->config->ops->eqos_stop_clks)
 		eqos->config->ops->eqos_stop_clks(dev);
 
diff --git a/drivers/net/dwc_eth_qos.h b/drivers/net/dwc_eth_qos.h
index d0d9735ac8..3490c7a62e 100644
--- a/drivers/net/dwc_eth_qos.h
+++ b/drivers/net/dwc_eth_qos.h
@@ -74,6 +74,7 @@ struct eqos_priv {
 	void *rx_pkt;
 	bool started;
 	bool reg_access_ok;
+	bool mii_reseted;
 };
 
 int eqos_init(struct udevice *dev);

commit da46568126bf60269b9fa6f245e07d8ba71038e2
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Sat May 8 15:57:22 2021 +0800

    rockchip: rk3568: fix compile error
    
    Compile error when enable FIT_SIGNATURE.
    
    error log:
    u-boot-spl section `.u_boot_list' will not fit in region `.sram'
    region `.sram' overflowed by 496 bytes scripts/Makefile.spl:357:
    recipe for target 'spl/u-boot-spl' failed
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I5705287227ef7263005c94e9501a49513fc9e1f0

diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h
index 9fbade6a3a..f98ae421b7 100644
--- a/include/configs/rk3568_common.h
+++ b/include/configs/rk3568_common.h
@@ -11,7 +11,7 @@
 
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_TEXT_BASE		0x00000000
-#define CONFIG_SPL_MAX_SIZE		0x00038000
+#define CONFIG_SPL_MAX_SIZE		0x00040000
 #define CONFIG_SPL_BSS_START_ADDR	0x03fe0000
 #define CONFIG_SPL_BSS_MAX_SIZE		0x00010000
 #define CONFIG_SPL_STACK		0x03fe0000

commit fbf3603b9ab279396e3c22cb440a89391da93c95
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat May 8 14:32:51 2021 +0800

    rockchip: dts: enable psci node
    
    In order to bind psci-sysreset driver if no kernel dtb.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I93c3d08b6113ba9d7c49a4500c69854879554b5b

diff --git a/arch/arm/dts/rk1808-u-boot.dtsi b/arch/arm/dts/rk1808-u-boot.dtsi
index 73542c7866..7fedf6047d 100644
--- a/arch/arm/dts/rk1808-u-boot.dtsi
+++ b/arch/arm/dts/rk1808-u-boot.dtsi
@@ -26,6 +26,11 @@
 
 };
 
+&psci {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 &crypto {
 	u-boot,dm-spl;
 };
diff --git a/arch/arm/dts/rk1808.dtsi b/arch/arm/dts/rk1808.dtsi
index 06d71e26d2..3936aba61d 100644
--- a/arch/arm/dts/rk1808.dtsi
+++ b/arch/arm/dts/rk1808.dtsi
@@ -201,6 +201,11 @@
 		};
 	};
 
+	psci: psci {
+		compatible = "arm,psci-1.0";
+		method = "smc";
+	};
+
 	qos_npu: qos@fe850000 {
 		compatible = "syscon";
 		reg = <0x0 0xfe850000 0x0 0x20>;
diff --git a/arch/arm/dts/rk3036-sdk-u-boot.dtsi b/arch/arm/dts/rk3036-sdk-u-boot.dtsi
index d40a681020..ca97e45095 100644
--- a/arch/arm/dts/rk3036-sdk-u-boot.dtsi
+++ b/arch/arm/dts/rk3036-sdk-u-boot.dtsi
@@ -31,3 +31,9 @@
 &uart2 {
 	u-boot,dm-pre-reloc;
 };
+
+&psci {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
diff --git a/arch/arm/dts/rk3036.dtsi b/arch/arm/dts/rk3036.dtsi
index e97ad32bbd..10ee7b8211 100644
--- a/arch/arm/dts/rk3036.dtsi
+++ b/arch/arm/dts/rk3036.dtsi
@@ -89,6 +89,11 @@
 		#clock-cells = <0>;
 	};
 
+	psci: psci {
+		compatible      = "arm,psci-1.0";
+		method          = "smc";
+	};
+
 	timer {
 		compatible = "arm,armv7-timer";
 		arm,cpu-registers-not-fw-configured;
diff --git a/arch/arm/dts/rk3128-u-boot.dtsi b/arch/arm/dts/rk3128-u-boot.dtsi
index fb5f1f7f07..b009c24705 100644
--- a/arch/arm/dts/rk3128-u-boot.dtsi
+++ b/arch/arm/dts/rk3128-u-boot.dtsi
@@ -15,6 +15,11 @@
 	};
 };
 
+&psci {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 &dmc {
 	u-boot,dm-pre-reloc;
 };
@@ -60,4 +65,4 @@
 &usb_otg {
 	u-boot,dm-pre-reloc;
 	status = "okay";
-};
\ No newline at end of file
+};
diff --git a/arch/arm/dts/rk3128.dtsi b/arch/arm/dts/rk3128.dtsi
index db0f1dbbde..9e4d387f26 100644
--- a/arch/arm/dts/rk3128.dtsi
+++ b/arch/arm/dts/rk3128.dtsi
@@ -151,13 +151,9 @@
 		};
 	};
 
-	psci {
-		compatible      = "arm,psci";
+	psci: psci {
+		compatible      = "arm,psci-1.0";
 		method          = "smc";
-		cpu_suspend     = <0x84000001>;
-		cpu_off         = <0x84000002>;
-		cpu_on          = <0x84000003>;
-		migrate         = <0x84000005>;
 	};
 
 	amba {
diff --git a/arch/arm/dts/rk322x-u-boot.dtsi b/arch/arm/dts/rk322x-u-boot.dtsi
index acb5f506b9..f4fc2f9e6e 100644
--- a/arch/arm/dts/rk322x-u-boot.dtsi
+++ b/arch/arm/dts/rk322x-u-boot.dtsi
@@ -15,6 +15,11 @@
 	};
 };
 
+&psci {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 &cru {
 	u-boot,dm-pre-reloc;
 };
diff --git a/arch/arm/dts/rk322x.dtsi b/arch/arm/dts/rk322x.dtsi
index 0afd4c4650..654cd9b956 100644
--- a/arch/arm/dts/rk322x.dtsi
+++ b/arch/arm/dts/rk322x.dtsi
@@ -96,6 +96,11 @@
 		reg = <0x60000000 0x40000000>;
 	};
 
+	psci: psci {
+		compatible      = "arm,psci-1.0";
+		method          = "smc";
+	};
+
 	timer {
 		compatible = "arm,armv7-timer";
 		arm,cpu-registers-not-fw-configured;
diff --git a/arch/arm/dts/rk3288-u-boot.dtsi b/arch/arm/dts/rk3288-u-boot.dtsi
index a38fc1fd37..c7a222f4e5 100644
--- a/arch/arm/dts/rk3288-u-boot.dtsi
+++ b/arch/arm/dts/rk3288-u-boot.dtsi
@@ -15,6 +15,11 @@
 	};
 };
 
+&psci {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 &uart2 {
 	clock-frequency = <24000000>;
 	u-boot,dm-pre-reloc;
diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index c00699bb98..f5e71d612c 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -149,6 +149,11 @@
 		#clock-cells = <0>;
 	};
 
+	psci: psci {
+		compatible      = "arm,psci-1.0";
+		method          = "smc";
+	};
+
 	timer {
 	        arm,use-physical-timer;
 		compatible = "arm,armv7-timer";
diff --git a/arch/arm/dts/rk3308-u-boot.dtsi b/arch/arm/dts/rk3308-u-boot.dtsi
index bc2ebd73f1..d0502288d2 100644
--- a/arch/arm/dts/rk3308-u-boot.dtsi
+++ b/arch/arm/dts/rk3308-u-boot.dtsi
@@ -16,6 +16,11 @@
 	};
 };
 
+&psci {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 &dmc {
 	u-boot,dm-pre-reloc;
 };
diff --git a/arch/arm/dts/rk3308.dtsi b/arch/arm/dts/rk3308.dtsi
index 6345fba383..ff989ef2a4 100644
--- a/arch/arm/dts/rk3308.dtsi
+++ b/arch/arm/dts/rk3308.dtsi
@@ -101,7 +101,7 @@
 		reg = <0x0 0xff010000 0x0 0x10000>;
 	};
 
-	psci {
+	psci: psci {
 		compatible = "arm,psci-1.0";
 		method = "smc";
 	};
diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi
index 3a182c4001..50669b2e32 100644
--- a/arch/arm/dts/rk3328-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-u-boot.dtsi
@@ -17,6 +17,11 @@
 
 };
 
+&psci {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 &cru {
 	u-boot,dm-pre-reloc;
 };
diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi
index ee5f6cbe09..a41be7f0c0 100644
--- a/arch/arm/dts/rk3328.dtsi
+++ b/arch/arm/dts/rk3328.dtsi
@@ -108,7 +108,7 @@
 		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
 	};
 
-	psci {
+	psci: psci {
 		compatible = "arm,psci-1.0";
 		method = "smc";
 	};
diff --git a/arch/arm/dts/rk3368-u-boot.dtsi b/arch/arm/dts/rk3368-u-boot.dtsi
index 3382bfc2ac..c6215c22fe 100644
--- a/arch/arm/dts/rk3368-u-boot.dtsi
+++ b/arch/arm/dts/rk3368-u-boot.dtsi
@@ -15,6 +15,11 @@
 	};
 };
 
+&psci {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 &uart2 {
 	clock-frequency = <24000000>;
 	u-boot,dm-pre-reloc;
diff --git a/arch/arm/dts/rk3368.dtsi b/arch/arm/dts/rk3368.dtsi
index de9434151d..72fa46669b 100644
--- a/arch/arm/dts/rk3368.dtsi
+++ b/arch/arm/dts/rk3368.dtsi
@@ -204,7 +204,7 @@
 				     <&cpu_b2>, <&cpu_b3>;
 	};
 
-	psci {
+	psci: psci {
 		compatible = "arm,psci-0.2";
 		method = "smc";
 	};
diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi
index a5bac20c2d..6f3a64f876 100644
--- a/arch/arm/dts/rk3399-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-u-boot.dtsi
@@ -16,6 +16,11 @@
 	};
 };
 
+&psci {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 &uart2 {
 	clock-frequency = <24000000>;
 	u-boot,dm-pre-reloc;
diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
index 14183bbe14..26d402318a 100644
--- a/arch/arm/dts/rk3399.dtsi
+++ b/arch/arm/dts/rk3399.dtsi
@@ -154,7 +154,7 @@
 		interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW &ppi_cluster1>;
 	};
 
-	psci {
+	psci: psci {
 		compatible = "arm,psci-1.0";
 		method = "smc";
 	};
diff --git a/arch/arm/dts/rk3568-u-boot.dtsi b/arch/arm/dts/rk3568-u-boot.dtsi
index 52f05e4fc1..f4a466e327 100644
--- a/arch/arm/dts/rk3568-u-boot.dtsi
+++ b/arch/arm/dts/rk3568-u-boot.dtsi
@@ -19,6 +19,11 @@
 	};
 };
 
+&psci {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 &crypto {
 	u-boot,dm-pre-reloc;
 };
diff --git a/arch/arm/dts/rk3568.dtsi b/arch/arm/dts/rk3568.dtsi
index d0826b274c..524d5f08d2 100644
--- a/arch/arm/dts/rk3568.dtsi
+++ b/arch/arm/dts/rk3568.dtsi
@@ -147,7 +147,7 @@
 		status = "disabled";
 	};
 
-	psci {
+	psci: psci {
 		compatible = "arm,psci-1.0";
 		method = "smc";
 	};
diff --git a/arch/arm/dts/rv1126-u-boot.dtsi b/arch/arm/dts/rv1126-u-boot.dtsi
index 1529473146..38ab939107 100644
--- a/arch/arm/dts/rv1126-u-boot.dtsi
+++ b/arch/arm/dts/rv1126-u-boot.dtsi
@@ -22,6 +22,11 @@
 	};
 };
 
+&psci {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 &uart2 {
 	clock-frequency = <24000000>;
 	u-boot,dm-spl;
diff --git a/arch/arm/dts/rv1126.dtsi b/arch/arm/dts/rv1126.dtsi
index 30995ddc81..8ddfcee4e9 100644
--- a/arch/arm/dts/rv1126.dtsi
+++ b/arch/arm/dts/rv1126.dtsi
@@ -285,7 +285,7 @@
 		status = "disabled";
 	};
 
-	psci {
+	psci: psci {
 		compatible = "arm,psci-1.0";
 		method = "smc";
 	};

commit b8c63133a5683c0902ff177f5d66c7a1c9948850
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat May 8 09:40:20 2021 +0800

    arm: bootm: support CONFIG_ARM64_SWITCH_TO_AARCH32
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If4ac9488db237ee33d3ddc4e492ec84895307b0e

diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index 2637e2b3bf..5ce27bac24 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -33,6 +33,7 @@
 #include <asm/armv7.h>
 #endif
 #include <asm/setup.h>
+#include <asm/arch/rockchip_smccc.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -317,6 +318,28 @@ static void switch_to_el1(void)
 #endif
 #endif
 
+#ifdef CONFIG_ARM64_SWITCH_TO_AARCH32
+int arm64_switch_aarch32(bootm_headers_t *images)
+{
+	int es_flag;
+	int ret = 0;
+
+	images->os.arch = IH_ARCH_ARM;
+
+	/* arm aarch32 SVC */
+	es_flag = PE_STATE(0, 0, 0, 0);
+	ret |= sip_smc_amp_cfg(AMP_PE_STATE, 0x100, es_flag);
+	ret |= sip_smc_amp_cfg(AMP_PE_STATE, 0x200, es_flag);
+	ret |= sip_smc_amp_cfg(AMP_PE_STATE, 0x300, es_flag);
+	if (ret) {
+		printf("ARM64 switch aarch32 SiP call failed, ret=%d\n", ret);
+		return 0;
+	}
+
+	return es_flag;
+}
+#endif
+
 /* Subcommand: GO */
 static void boot_jump_linux(bootm_headers_t *images, int flag)
 {
@@ -328,6 +351,8 @@ static void boot_jump_linux(bootm_headers_t *images, int flag)
 
 #if defined(CONFIG_AMP)
 	es_flag = arm64_switch_amp_pe(images);
+#elif defined(CONFIG_ARM64_SWITCH_TO_AARCH32)
+	es_flag = arm64_switch_aarch32(images);
 #endif
 	kernel_entry = (void (*)(void *fdt_addr, void *res0, void *res1,
 				void *res2))images->ep;

commit 2310d0f5336d0a073967975a02beb5d0ae1f36a2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat May 8 09:38:54 2021 +0800

    arm: bootm: update amp PE switch API
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If15d2cc2a683bb2f8d98b99c3d0e3d75002143d6

diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index f7cd3527c7..2637e2b3bf 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -324,13 +324,11 @@ static void boot_jump_linux(bootm_headers_t *images, int flag)
 	void (*kernel_entry)(void *fdt_addr, void *res0, void *res1,
 			void *res2);
 	int fake = (flag & BOOTM_STATE_OS_FAKE_GO);
-#ifdef CONFIG_AMP
-	int flags = amp_flags();
-	images->os.arch = amp_os_arch();
-#else
-	int flags = 0;
-#endif
+	int es_flag = 0;
 
+#if defined(CONFIG_AMP)
+	es_flag = arm64_switch_amp_pe(images);
+#endif
 	kernel_entry = (void (*)(void *fdt_addr, void *res0, void *res1,
 				void *res2))images->ep;
 
@@ -355,11 +353,11 @@ static void boot_jump_linux(bootm_headers_t *images, int flag)
 		if ((IH_ARCH_DEFAULT == IH_ARCH_ARM64) &&
 		    (images->os.arch == IH_ARCH_ARM))
 			armv8_switch_to_el2(0, (u64)gd->bd->bi_arch_number,
-					    (u64)images->ft_addr, flags,
+					    (u64)images->ft_addr, es_flag,
 					    (u64)images->ep,
 					    ES_TO_AARCH32);
 		else
-			armv8_switch_to_el2((u64)images->ft_addr, 0, 0, flags,
+			armv8_switch_to_el2((u64)images->ft_addr, 0, 0, es_flag,
 					    images->ep,
 					    ES_TO_AARCH64);
 #endif

commit 8223aa473433c8c1984e32b05af0dea21b54f352
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat May 8 09:34:33 2021 +0800

    cpu: rockchip amp: add arm64_switch_amp_pe()
    
    Merge other API into this function.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ie7b3d53930b2ad7a7e60e6ad4e67fab74d2239c7

diff --git a/drivers/cpu/rockchip_amp.c b/drivers/cpu/rockchip_amp.c
index eca6520afd..7bdb684fd1 100644
--- a/drivers/cpu/rockchip_amp.c
+++ b/drivers/cpu/rockchip_amp.c
@@ -191,13 +191,9 @@ out:
 	return ret;
 }
 
-int amp_flags(void)
+int arm64_switch_amp_pe(bootm_headers_t *images)
 {
+	images->os.arch = primary_pe_arch;
 	return primary_pe_state;
 }
 
-int amp_os_arch(void)
-{
-	return primary_pe_arch;
-}
-
diff --git a/include/amp.h b/include/amp.h
index 54ed859f6b..383e3adfed 100644
--- a/include/amp.h
+++ b/include/amp.h
@@ -7,6 +7,7 @@
 #define _AMP_H_
 
 #include <dm.h>
+#include <image.h>
 
 #define AMP_I(fmt, args...)	printf("AMP: "fmt, ##args)
 #define AMP_E(fmt, args...)	printf("AMP Error: "fmt, ##args)
@@ -28,8 +29,7 @@
 		((MAP_SECURE(secure) & 0x1) << MODE_SECURE_SHIFT))
 
 int amp_cpus_on(void);
-int amp_flags(void);
-int amp_os_arch(void);
+int arm64_switch_amp_pe(bootm_headers_t *images);
 
 #endif	/* _AMP_H_ */
 

commit 8a155fd4d89f1950c8e514a812f15ced9ac36d33
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 7 10:36:37 2021 +0800

    rockchip: Kconfig: add ARM64_SWITCH_TO_AARCH32
    
    Support AArch64 U-Boot boot AArch32 kernel.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I74f1fae52696b5e50d6dfce35012f872c6750c2d

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index f3ae7e19d5..513e723410 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -515,12 +515,19 @@ config TPL_ROCKCHIP_BACK_TO_BROM
           binary to keep going on.
 
 config ARM64_BOOT_AARCH32
-	bool "Support Boot an ARM64 on AArch32 execution state"
+	bool "Support Boot an ARM64 on AArch32 execution state, ie. U-Boot is in AArch32"
 	select CPU_V7
 	default n
 	help
 	  If you want to boot an ARM64 processor on 32-bit mode, say y here.
 
+config ARM64_SWITCH_TO_AARCH32
+	bool "Support AArch64 U-Boot boot AArch32 kernel"
+	default n
+	help
+	  If you want AArch64 U-Boot to boot AArch32 kernel, say y here.
+	  This feature needs ATF to help switch the PE state.
+
 config ROCKCHIP_BOOT_MODE_REG
 	hex "Rockchip boot mode flag register address"
 	default 0xff010200 if ROCKCHIP_PX30

commit 604816af8fc0f074ae071215102acf27e2444a46
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 7 10:37:36 2021 +0800

    common: bootm: detect zImage depends on CONFIG_CMD_BOOTZ
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I91058a583b1a2ac73161f06dc64b87a4afcf9a1d

diff --git a/common/bootm.c b/common/bootm.c
index 1a7a69a442..9d9436bd01 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -374,7 +374,7 @@ static int handle_decomp_error(int comp_type, size_t uncomp_size,
 
 int bootm_parse_comp(const unsigned char *hdr)
 {
-#if defined(CONFIG_ARM) && !defined(CONFIG_ARM64)
+#if defined(CONFIG_CMD_BOOTZ)
 	ulong start, end;
 
 	if (!bootz_setup((ulong)hdr, &start, &end))

commit 49e18ddb2c82cbdfb90eb5ee2855a5d0112229b2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 20 10:21:45 2021 +0800

    rockchip: board: refactor kernel address update logic
    
    Move kernel to "kernel_addr_no_low_bl32_r" address if possbile.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I9907ef6fba52afd9d68552ae54da487cf76175af

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index bebf2a2aa7..bd4593d538 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -284,13 +284,18 @@ static void env_fixup(void)
 		}
 	}
 #endif
-	/* If BL32 is disabled, move kernel to lower address. */
+	/* No BL32 ? */
 	if (!(gd->flags & GD_FLG_BL32_ENABLED)) {
-		addr_r = env_get("kernel_addr_no_bl32_r");
+		/*
+		 * [1] Move kernel to lower address if possible.
+		 */
+		addr_r = env_get("kernel_addr_no_low_bl32_r");
 		if (addr_r)
 			env_set("kernel_addr_r", addr_r);
 
 		/*
+		 * [2] Move ramdisk at BL32 position if need.
+		 *
 		 * 0x0a200000 and 0x08400000 are rockchip traditional address
 		 * of BL32 and ramdisk:
 		 *
@@ -306,10 +311,21 @@ static void env_fixup(void)
 			if (u_addr_r == 0x0a200000)
 				env_set("ramdisk_addr_r", "0x08400000");
 		}
-
-	/* If BL32 is enlarged, move ramdisk right behind it */
 	} else {
 		mem = param_parse_optee_mem();
+
+		/*
+		 * [1] Move kernel forward if possible.
+		 */
+		if (mem.base > SZ_128M) {
+			addr_r = env_get("kernel_addr_no_low_bl32_r");
+			if (addr_r)
+				env_set("kernel_addr_r", addr_r);
+		}
+
+		/*
+		 * [2] Move ramdisk backward if optee enlarge.
+		 */
 		end = mem.base + mem.size;
 		u_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0);
 		if (u_addr_r >= mem.base && u_addr_r < end)
diff --git a/include/configs/rk1808_common.h b/include/configs/rk1808_common.h
index f94dd1eadf..e6449f9b25 100644
--- a/include/configs/rk1808_common.h
+++ b/include/configs/rk1808_common.h
@@ -54,7 +54,7 @@
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x01f00000\0" \
-	"kernel_addr_no_bl32_r=0x00280000\0" \
+	"kernel_addr_no_low_bl32_r=0x00280000\0" \
 	"kernel_addr_r=0x00680000\0" \
 	"kernel_addr_c=0x04080000\0" \
 	"ramdisk_addr_r=0x0a200000\0"
diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h
index 1c2b9e4461..dd62363cae 100644
--- a/include/configs/rk3308_common.h
+++ b/include/configs/rk3308_common.h
@@ -62,7 +62,7 @@
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x01f00000\0" \
-	"kernel_addr_no_bl32_r=0x00280000\0" \
+	"kernel_addr_no_low_bl32_r=0x00280000\0" \
 	"kernel_addr_r=0x00680000\0" \
 	"kernel_addr_c=0x02480000\0" \
 	"ramdisk_addr_r=0x04000000\0"
diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h
index c869b4e3ce..9fbade6a3a 100644
--- a/include/configs/rk3568_common.h
+++ b/include/configs/rk3568_common.h
@@ -75,7 +75,7 @@
 	"scriptaddr=0x00c00000\0" \
 	"pxefile_addr_r=0x00e00000\0" \
 	"fdt_addr_r=0x0a100000\0" \
-	"kernel_addr_no_bl32_r=0x00280000\0" \
+	"kernel_addr_no_low_bl32_r=0x00280000\0" \
 	"kernel_addr_r=0x00a80000\0" \
 	"kernel_addr_c=0x04080000\0" \
 	"ramdisk_addr_r=0x0a200000\0"

commit 5ccb1b200198126ee125df7b87cbff32a45050e5
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Sat May 8 09:07:53 2021 +0800

    drm/rockchip: hdmi: Support baseparameter2
    
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
    Change-Id: I92cb67d2daeca8fa0a4c5c5ceba7230b6aa30d9c

diff --git a/drivers/video/drm/dw_hdmi.c b/drivers/video/drm/dw_hdmi.c
old mode 100755
new mode 100644
index 162a8d74b9..667a5c1773
--- a/drivers/video/drm/dw_hdmi.c
+++ b/drivers/video/drm/dw_hdmi.c
@@ -2282,16 +2282,10 @@ int rockchip_dw_hdmi_init(struct display_state *state)
 	ofnode hdmi_node = conn_state->node;
 	u32 val;
 	struct device_node *ddc_node;
-	int id;
 
 	hdmi = malloc(sizeof(struct dw_hdmi));
 	if (!hdmi)
 		return -ENOMEM;
-	id = of_alias_get_id(ofnode_to_np(hdmi_node), "hdmi");
-	if (id < 0)
-		id = 0;
-	hdmi->id = id;
-	conn_state->disp_info  = rockchip_get_disp_info(conn_state->type, hdmi->id);
 
 	memset(hdmi, 0, sizeof(struct dw_hdmi));
 	mode_buf = malloc(MODE_LEN * sizeof(struct drm_display_mode));
@@ -2465,7 +2459,7 @@ int rockchip_dw_hdmi_get_timing(struct display_state *state)
 			drm_mode_vrefresh(&hdmi->edid_data.mode_buf[i]);
 
 	drm_mode_sort(&hdmi->edid_data);
-	drm_rk_selete_output(&hdmi->edid_data, &bus_format,
+	drm_rk_selete_output(&hdmi->edid_data, conn_state, &bus_format,
 			     overscan, hdmi->dev_type);
 
 	*mode = *hdmi->edid_data.preferred_mode;
diff --git a/drivers/video/drm/dw_hdmi.h b/drivers/video/drm/dw_hdmi.h
index a3e1fa7c2c..fa2dbaa353 100644
--- a/drivers/video/drm/dw_hdmi.h
+++ b/drivers/video/drm/dw_hdmi.h
@@ -1405,6 +1405,7 @@ enum {
 };
 
 void drm_rk_selete_output(struct hdmi_edid_data *edid_data,
+			  struct connector_state *conn_state,
 			  unsigned int *bus_format,
 			  struct overscan *overscan,
 			  enum dw_hdmi_devtype dev_type);
diff --git a/drivers/video/drm/rockchip_dw_hdmi.c b/drivers/video/drm/rockchip_dw_hdmi.c
index f4e3e5684e..e74538d308 100644
--- a/drivers/video/drm/rockchip_dw_hdmi.c
+++ b/drivers/video/drm/rockchip_dw_hdmi.c
@@ -323,14 +323,17 @@ static unsigned int drm_rk_select_color(struct hdmi_edid_data *edid_data,
 }
 
 void drm_rk_selete_output(struct hdmi_edid_data *edid_data,
+			  struct connector_state *conn_state,
 			  unsigned int *bus_format,
 			  struct overscan *overscan,
 			  enum dw_hdmi_devtype dev_type)
 {
 	int ret, i, screen_size;
 	struct base_disp_info base_parameter;
+	struct base2_disp_info *base2_parameter = conn_state->disp_info;
 	const struct base_overscan *scan;
 	struct base_screen_info *screen_info = NULL;
+	struct base2_screen_info *screen_info2 = NULL;
 	int max_scan = 100;
 	int min_scan = 51;
 	struct blk_desc *dev_desc;
@@ -347,26 +350,62 @@ void drm_rk_selete_output(struct hdmi_edid_data *edid_data,
 	else
 		*bus_format = MEDIA_BUS_FMT_YUV8_1X24;
 
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: Could not find device\n", __func__);
-		return;
-	}
+	if (!base2_parameter) {
+		dev_desc = rockchip_get_bootdev();
+		if (!dev_desc) {
+			printf("%s: Could not find device\n", __func__);
+			return;
+		}
 
-	if (part_get_info_by_name(dev_desc, "baseparameter", &part_info) < 0) {
-		printf("Could not find baseparameter partition\n");
-		return;
-	}
+		ret = part_get_info_by_name(dev_desc, "baseparameter",
+					    &part_info);
+		if (ret < 0) {
+			printf("Could not find baseparameter partition\n");
+			return;
+		}
 
-	ret = blk_dread(dev_desc, part_info.start, 1,
-			(void *)baseparameter_buf);
-	if (ret < 0) {
-		printf("read baseparameter failed\n");
-		return;
-	}
+		ret = blk_dread(dev_desc, part_info.start, 1,
+				(void *)baseparameter_buf);
+		if (ret < 0) {
+			printf("read baseparameter failed\n");
+			return;
+		}
 
-	memcpy(&base_parameter, baseparameter_buf, sizeof(base_parameter));
-	scan = &base_parameter.scan;
+		memcpy(&base_parameter, baseparameter_buf,
+		       sizeof(base_parameter));
+		scan = &base_parameter.scan;
+
+		screen_size = sizeof(base_parameter.screen_list) /
+			sizeof(base_parameter.screen_list[0]);
+
+		for (i = 0; i < screen_size; i++) {
+			if (base_parameter.screen_list[i].type ==
+			    DRM_MODE_CONNECTOR_HDMIA) {
+				screen_info = &base_parameter.screen_list[i];
+				break;
+			}
+		}
+	} else {
+		scan = &base2_parameter->overscan_info;
+		screen_size = sizeof(base2_parameter->screen_info) /
+			sizeof(base2_parameter->screen_info[0]);
+
+		for (i = 0; i < screen_size; i++) {
+			if (base2_parameter->screen_info[i].type ==
+			    DRM_MODE_CONNECTOR_HDMIA) {
+				screen_info2 =
+					&base2_parameter->screen_info[i];
+				break;
+			}
+		}
+		screen_info = malloc(sizeof(*screen_info));
+
+		screen_info->type = screen_info2->type;
+		screen_info->mode = screen_info2->resolution;
+		screen_info->format = screen_info2->format;
+		screen_info->depth = screen_info2->depthc;
+		screen_info->feature = screen_info2->feature;
+	}
 
 	if (scan->leftscale < min_scan && scan->leftscale > 0)
 		overscan->left_margin = min_scan;
@@ -388,16 +427,7 @@ void drm_rk_selete_output(struct hdmi_edid_data *edid_data,
 	else if (scan->bottomscale < max_scan && scan->bottomscale > 0)
 		overscan->bottom_margin = scan->bottomscale;
 
-	screen_size = sizeof(base_parameter.screen_list) /
-		sizeof(base_parameter.screen_list[0]);
 
-	for (i = 0; i < screen_size; i++) {
-		if (base_parameter.screen_list[i].type ==
-		    DRM_MODE_CONNECTOR_HDMIA) {
-			screen_info = &base_parameter.screen_list[i];
-			break;
-		}
-	}
 
 	if (screen_info)
 		printf("base_parameter.mode:%dx%d\n",

commit 37a2a1a7e6ac5eb8a407b84559f1adac93f3200c
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Fri May 7 17:25:11 2021 +0800

    video/drm: display: get disp info offset from header
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: Iacb9b54150f5d799e486d2003ec17a6708db61c3

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 83826f973e..09b7bfcdc3 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -149,17 +149,32 @@ int rockchip_get_baseparameter(void)
 struct base2_disp_info *rockchip_get_disp_info(int type, int id)
 {
 	struct base2_disp_info *disp_info;
-	int i = 0;
+	struct base2_disp_header *disp_header;
+	int i = 0, offset = -1;
 	u32 crc_val;
+	void *base_parameter_addr = (void *)&base_parameter;
 
 	for (i = 0; i < 8; i++) {
-		disp_info = &base_parameter.disp_info[i];
-		if (disp_info->screen_info[0].type == type &&
-		    disp_info->screen_info[0].id == id) {
+		disp_header = &base_parameter.disp_header[i];
+		if (disp_header->connector_type == type &&
+		    disp_header->connector_id == id) {
 			printf("disp info %d, type:%d, id:%d\n", i, type, id);
+			offset = disp_header->offset;
 			break;
 		}
 	}
+
+	if (offset < 0)
+		return NULL;
+	disp_info = base_parameter_addr + offset;
+	if (disp_info->screen_info[0].type != type ||
+	    disp_info->screen_info[0].id != id) {
+		printf("connector type or id is error, type:%d, id:%d\n",
+		       disp_info->screen_info[0].type,
+		       disp_info->screen_info[0].id);
+		return NULL;
+	}
+
 	if (strncasecmp(disp_info->disp_head_flag, "DISP", 4))
 		return NULL;
 

commit a18cd24e5949ef8d329545aeb86a57cb537b7dbf
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 7 18:33:11 2021 +0800

    rockchip: board: update cmdline according to PCBA recovery msg
    
    PCBA test needs more permission.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I9625ff0d2bd52545dbe408b1c52f3a83c2026415

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 4e40770b9f..bebf2a2aa7 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -767,6 +767,10 @@ int bootm_board_start(void)
 	/* disable bootm relcation to save boot time */
 	bootm_no_reloc();
 
+	/* PCBA test needs more permission */
+	if (get_bcb_recovery_msg() == BCB_MSG_RECOVERY_PCBA)
+		env_update("bootargs", "androidboot.selinux=permissive");
+
 	/* sysmem */
 	hotkey_run(HK_SYSMEM);
 	sysmem_overflow_check();
diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index aa09f8bcde..5fd20c23ca 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -46,6 +46,9 @@ static int misc_require_recovery(u32 bcb_offset)
 		recovery = !strcmp(bmsg->command, "boot-recovery");
 		if (!strcmp(bmsg->recovery, "recovery\n--rk_fwupdate\n"))
 			bcb_recovery_msg = BCB_MSG_RECOVERY_RK_FWUPDATE;
+		else if (!strcmp(bmsg->recovery, "recovery\n--factory_mode=whole") ||
+			 !strcmp(bmsg->recovery, "recovery\n--factory_mode=small"))
+			bcb_recovery_msg = BCB_MSG_RECOVERY_PCBA;
 	}
 
 	free(bmsg);

commit 706ec1d419d5924d990899ae5509f90dcdb26d6c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 7 18:32:15 2021 +0800

    rockchip: add get_bcb_recovery_msg() to record recovery msg
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ifabd4c7d4700c17a16551bd8bdea02ea175b3802

diff --git a/arch/arm/include/asm/arch-rockchip/boot_mode.h b/arch/arm/include/asm/arch-rockchip/boot_mode.h
index 97b12316fa..bc1395ee2c 100644
--- a/arch/arm/include/asm/arch-rockchip/boot_mode.h
+++ b/arch/arm/include/asm/arch-rockchip/boot_mode.h
@@ -30,4 +30,10 @@
 int setup_boot_mode(void);
 #endif
 
+enum {
+	BCB_MSG_RECOVERY_NONE,
+	BCB_MSG_RECOVERY_RK_FWUPDATE,
+	BCB_MSG_RECOVERY_PCBA,
+};
+
 #endif
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 598d5ba22d..4e40770b9f 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -337,7 +337,7 @@ static void cmdline_handle(void)
 	if (!dev_desc)
 		return;
 
-	if (env_get_yesno("rk_fwupdate")) {
+	if (get_bcb_recovery_msg() == BCB_MSG_RECOVERY_RK_FWUPDATE) {
 		if (dev_desc->if_type == IF_TYPE_MMC && dev_desc->devnum == 1)
 			env_update("bootargs", "sdfwupdate");
 		else if (dev_desc->if_type == IF_TYPE_USB && dev_desc->devnum == 0)
diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index 7f2eaad0df..aa09f8bcde 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -18,6 +18,8 @@ enum {
 	PL,
 };
 
+static u32 bcb_recovery_msg;
+
 static int misc_require_recovery(u32 bcb_offset)
 {
 	struct bootloader_message *bmsg;
@@ -43,7 +45,7 @@ static int misc_require_recovery(u32 bcb_offset)
 	} else {
 		recovery = !strcmp(bmsg->command, "boot-recovery");
 		if (!strcmp(bmsg->recovery, "recovery\n--rk_fwupdate\n"))
-			env_set("rk_fwupdate", "y"); /* set for late use */
+			bcb_recovery_msg = BCB_MSG_RECOVERY_RK_FWUPDATE;
 	}
 
 	free(bmsg);
@@ -51,6 +53,11 @@ out:
 	return recovery;
 }
 
+int get_bcb_recovery_msg(void)
+{
+	return bcb_recovery_msg;
+}
+
 /*
  * There are three ways to get reboot-mode:
  *
diff --git a/include/boot_rkimg.h b/include/boot_rkimg.h
index f12f62bd94..70c350a435 100644
--- a/include/boot_rkimg.h
+++ b/include/boot_rkimg.h
@@ -67,6 +67,7 @@ struct blk_desc *rockchip_get_bootdev(void);
 void rockchip_set_bootdev(struct blk_desc *desc);
 void board_run_recovery_wipe_data(void);
 void setup_download_mode(void);
+int get_bcb_recovery_msg(void);
 int rockchip_get_boot_mode(void);
 int rockchip_read_dtb_file(void *fdt_addr);
 int init_kernel_dtb(void);

commit 1e9494b524514ed281bd65546248bf4a707d10e2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 22 10:57:42 2021 +0800

    lib: avb: skip descriptor hash check if unlock
    
    What ever there is descriptor hash or not, let's skip
    descriptor hash match check if device is unlock.
    
    We rely on ops->get_preloaded_partition() to load image
    and verify hash, which is more efficient than full load.
    
    By the way, correct the function return code.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If48d7c676fec58b9c3905ba1bcf7ab43b833b323

diff --git a/lib/avb/libavb/avb_slot_verify.c b/lib/avb/libavb/avb_slot_verify.c
index 123701fc3b..af556e510f 100644
--- a/lib/avb/libavb/avb_slot_verify.c
+++ b/lib/avb/libavb/avb_slot_verify.c
@@ -388,7 +388,10 @@ static AvbSlotVerifyResult load_and_verify_hash_partition(
       allow_verification_error);
   if (ret != AVB_SLOT_VERIFY_RESULT_OK) {
     goto out;
+  } else if (image_preloaded) {
+    goto out;
   }
+
   // Although only one of the type might be used, we have to defined the
   // structure here so that they would live outside the 'if/else' scope to be
   // used later.
diff --git a/lib/avb/libavb_user/avb_ops_user.c b/lib/avb/libavb_user/avb_ops_user.c
index e1119c2363..d2151c310d 100644
--- a/lib/avb/libavb_user/avb_ops_user.c
+++ b/lib/avb/libavb_user/avb_ops_user.c
@@ -440,19 +440,19 @@ static AvbIOResult get_preloaded_partition(AvbOps* ops,
 	printf("get image from preloaded partition...\n");
 	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc)
-	    return AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+	    return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
 
 	load_addr = env_get_ulong("kernel_addr_r", 16, 0);
 	if (!load_addr)
-		return AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT;
+		return AVB_IO_RESULT_ERROR_NO_SUCH_VALUE;
 
 	ret = android_image_load_by_partname(dev_desc, partition, &load_addr);
 	if (!ret) {
 		*out_pointer = (u8 *)load_addr;
 		*out_num_bytes_preloaded = num_bytes; /* return what it expects */
-		ret = AVB_SLOT_VERIFY_RESULT_OK;
+		ret = AVB_IO_RESULT_OK;
 	} else {
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+		ret = AVB_IO_RESULT_ERROR_IO;
 	}
 
 	return ret;

commit 39939100a7588d90fc669344a244334e7b949c61
Author: Wenping Zhang <wenping.zhang@rock-chips.com>
Date:   Thu May 6 11:40:32 2021 +0800

    video: rk_eink: optimize the boot time.
    
    Don't power off the ebc duaring the uboot phase in order to
    parellelize the logo displaying, waiting for the completion
    of the last frame before start a new frame.
    And also fix the bug which load all image from logo.img
    partition in function read_needed_logo_from_partition.
    
    Signed-off-by: Wenping Zhang <wenping.zhang@rock-chips.com>
    Change-Id: I3891e278d01063f89fce0d71dfdc145e3647fe90

diff --git a/drivers/video/rk_eink/rk_ebc_tcon.c b/drivers/video/rk_eink/rk_ebc_tcon.c
index 5824f8ac28..c4254500e7 100644
--- a/drivers/video/rk_eink/rk_ebc_tcon.c
+++ b/drivers/video/rk_eink/rk_ebc_tcon.c
@@ -149,8 +149,8 @@ enum ebc_win_data_fmt {
 
 #ifdef CONFIG_IRQ
 #define IRQ_EBC			49
-static volatile int frame_done;
 #endif
+static volatile int last_frame_done = -1;
 static inline void regs_dump(struct ebc_tcon_priv *tcon)
 {
 	int i;
@@ -240,7 +240,7 @@ static void ebc_irq_handler(int irq, void *data)
 	if (intr_status & DSP_END_INT) {
 		tcon_update_bits(tcon, EBC_INT_STATUS,
 				 DSP_END_INT_CLR, DSP_END_INT_CLR);
-		frame_done = 1;
+		last_frame_done = 1;
 	}
 }
 #endif
@@ -408,17 +408,23 @@ static int wait_for_last_frame_complete(struct udevice *dev)
 	struct ebc_tcon_priv *tcon = dev_get_priv(dev);
 
 #ifdef CONFIG_IRQ
-	while (!frame_done)
+	while (1) {
+		if ((last_frame_done == -1) || (last_frame_done == 1))
+			break;
 		msleep(1);
-	frame_done = 0;
+	}
 #else
 	/* wait for frame display end*/
-	do {
-		msleep(1);
+	while (1) {
+		/* first frame don't need to wait*/
+		if (last_frame_done == -1)
+			break;
 		intr_status = readl(tcon->reg + EBC_INT_STATUS);
-	} while (!(intr_status & DSP_END_INT));
+		if (intr_status & DSP_END_INT)
+			break;
+		msleep(1);
+	}
 #endif
-
 	tcon_update_bits(tcon, EBC_INT_STATUS,
 			 DSP_END_INT_CLR, DSP_END_INT_CLR);
 
@@ -437,7 +443,7 @@ static int ebc_tcon_frame_start(struct udevice *dev, int frame_total)
 
 	tcon_update_bits(tcon, EBC_DSP_START,
 			 DSP_FRM_START_MASK, DSP_FRM_START);
-
+	last_frame_done = 0;
 	return 0;
 }
 
diff --git a/drivers/video/rk_eink/rk_eink_display.c b/drivers/video/rk_eink/rk_eink_display.c
index ad74b30394..523c55923c 100644
--- a/drivers/video/rk_eink/rk_eink_display.c
+++ b/drivers/video/rk_eink/rk_eink_display.c
@@ -322,8 +322,9 @@ static int read_needed_logo_from_partition(struct udevice *dev,
 	struct logo_info *hdr = &eink_logo_info;
 	struct logo_part_header *part_hdr = &hdr->part_hdr;
 	struct ebc_panel *panel = dev_get_platdata(dev);
+	u32 logo = needed_logo & (~(*loaded_logo));
 
-	if (*loaded_logo & needed_logo) {
+	if (!logo) {
 		printf("logo[0x%x] is already loaded, just return!\n",
 		       needed_logo);
 		return 0;
@@ -360,7 +361,7 @@ static int read_needed_logo_from_partition(struct udevice *dev,
 		debug("offset=0x%x, size=%d,logo_type=%d,w=%d,h=%d\n",
 		      offset, size, logo_type, img_hdr->w, img_hdr->h);
 
-		if (needed_logo & logo_type) {
+		if (logo & logo_type) {
 			pic_buf = get_addr_by_type(dev, logo_type);
 
 			if (pic_buf <= 0) {
@@ -378,7 +379,7 @@ static int read_needed_logo_from_partition(struct udevice *dev,
 			 * kernel will do the mirror operation, so skip kernel
 			 * logo here.
 			 */
-			if (panel->mirror && needed_logo != EINK_LOGO_KERNEL) {
+			if (panel->mirror && logo_type != EINK_LOGO_KERNEL) {
 				u32 w = panel->vir_width;
 				u32 h = panel->vir_height;
 				u32 mirror_buf = 0;
@@ -401,6 +402,10 @@ static int read_needed_logo_from_partition(struct udevice *dev,
 					   ALIGN((ulong)pic_buf + size,
 						 CONFIG_SYS_CACHELINE_SIZE));
 			*loaded_logo |= logo_type;
+
+			logo &= ~logo_type;
+			if (!logo)
+				break;
 		}
 	}
 
@@ -471,14 +476,13 @@ static int eink_display(struct udevice *dev, u32 pre_img_buf,
 	debug("lut_type=%d, frame num=%d, temp=%d\n", lut_type,
 	      frame_num, temperature);
 
+	ebc_tcon_ops->wait_for_last_frame_complete(ebc_tcon_dev);
 	ebc_tcon_ops->lut_data_set(ebc_tcon_dev, plat->lut_data.data,
 				   frame_num, 0);
 	ebc_tcon_ops->dsp_mode_set(ebc_tcon_dev, update_mode,
 				   LUT_MODE, !THREE_WIN_MODE, !EINK_MODE);
 	ebc_tcon_ops->image_addr_set(ebc_tcon_dev, pre_img_buf, cur_img_buf);
 	ebc_tcon_ops->frame_start(ebc_tcon_dev, frame_num);
-	ebc_tcon_ops->wait_for_last_frame_complete(ebc_tcon_dev);
-
 	return 0;
 }
 
@@ -523,7 +527,7 @@ static int rockchip_eink_show_logo(int cur_logo_type, int update_mode)
 	u32 last_logo_addr;
 	struct ebc_panel *plat;
 	struct udevice *dev;
-	static u32 loaded_logo;
+	static u32 loaded_logo = 0;
 	struct rockchip_eink_display_priv *priv;
 
 	if (!eink_dev) {
@@ -551,15 +555,16 @@ static int rockchip_eink_show_logo(int cur_logo_type, int update_mode)
 	plat = dev_get_platdata(dev);
 	priv = dev_get_priv(dev);
 
-	ret = ebc_power_set(dev, EBC_PWR_ON);
-	if (ret) {
-		printf("Eink power on failed\n");
-		return -1;
-	}
 	/*
 	 * The last_logo_type is -1 means it's first displaying
 	 */
 	if (last_logo_type == -1) {
+		ret = ebc_power_set(dev, EBC_PWR_ON);
+		if (ret) {
+			printf("Eink power on failed\n");
+			return -1;
+		}
+
 		int size = (plat->vir_width * plat->vir_height) >> 1;
 
 		logo_addr = get_addr_by_type(dev, EINK_LOGO_RESET);
@@ -568,7 +573,7 @@ static int rockchip_eink_show_logo(int cur_logo_type, int update_mode)
 				   ALIGN((ulong)logo_addr + size,
 					 CONFIG_SYS_CACHELINE_SIZE));
 		eink_display(dev, logo_addr, logo_addr,
-			     WF_TYPE_RESET, 0);
+			     WF_TYPE_RESET, EINK_LOGO_RESET);
 		last_logo_type = 0;
 		last_logo_addr = logo_addr;
 	} else {
@@ -577,12 +582,39 @@ static int rockchip_eink_show_logo(int cur_logo_type, int update_mode)
 			printf("Invalid last logo addr, exit!\n");
 			goto out;
 		}
+
+		/* The last logo of charging logo display */
 		if (cur_logo_type == EINK_LOGO_RESET) {
+			struct udevice *ebc_tcon_dev = priv->ebc_tcon_dev;
+			struct rk_ebc_tcon_ops *ebc_tcon_ops;
+
 			logo_addr = get_addr_by_type(dev, EINK_LOGO_RESET);
 			eink_display(dev, last_logo_addr,
 				     logo_addr,
 				     WF_TYPE_GC16, update_mode);
 			last_logo_type = -1;
+			/*
+			 * For normal logo display, waiting for the last frame
+			 * completion before start a new frame, except one
+			 * situation which charging logo display finished,
+			 * because device will rebooting or shutdown after
+			 * charging logo is competed.
+			 *
+			 * We should take care of the power sequence,
+			 * because ebc can't power off if last frame
+			 * data is still sending, so keep the ebc power
+			 * during u-boot phase and shutdown the
+			 * power only if uboot charging is finished.
+			 */
+			ebc_tcon_ops = ebc_tcon_get_ops(ebc_tcon_dev);
+			ebc_tcon_ops->wait_for_last_frame_complete(ebc_tcon_dev);
+			debug("charging logo displaying is complete\n");
+			/*
+			 *shutdown ebc after charging logo display is complete
+			 */
+			ret = ebc_power_set(dev, EBC_PWR_DOWN);
+			if (ret)
+				printf("Eink power down failed\n");
 			goto out;
 		}
 	}
@@ -646,9 +678,6 @@ static int rockchip_eink_show_logo(int cur_logo_type, int update_mode)
 	}
 
 out:
-	ret = ebc_power_set(dev, EBC_PWR_DOWN);
-	if (ret)
-		printf("Eink power down failed\n");
 	return ret;
 }
 

commit 3e39a5a16ec30e5475d79ba2742db1719883d503
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Fri Apr 16 17:03:36 2021 +0800

    drm/rockchip: vop2: add support logo scale
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: I3bed0053859bc5ccffda47da6fb1ea2bd1f727bd

diff --git a/drivers/video/drm/rockchip_vop2.c b/drivers/video/drm/rockchip_vop2.c
index f6df97f957..07234da5ef 100644
--- a/drivers/video/drm/rockchip_vop2.c
+++ b/drivers/video/drm/rockchip_vop2.c
@@ -333,10 +333,24 @@
 #define RK3568_ESMART0_REGION0_DSP_INFO		0x1824
 #define RK3568_ESMART0_REGION0_DSP_ST		0x1828
 #define RK3568_ESMART0_REGION0_SCL_CTRL		0x1830
+#define YRGB_XSCL_MODE_MASK			0x3
+#define YRGB_XSCL_MODE_SHIFT			0
+#define YRGB_XSCL_FILTER_MODE_MASK		0x3
+#define YRGB_XSCL_FILTER_MODE_SHIFT		2
+#define YRGB_YSCL_MODE_MASK			0x3
+#define YRGB_YSCL_MODE_SHIFT			4
+#define YRGB_YSCL_FILTER_MODE_MASK		0x3
+#define YRGB_YSCL_FILTER_MODE_SHIFT		6
+
 #define RK3568_ESMART0_REGION0_SCL_FACTOR_YRGB	0x1834
 #define RK3568_ESMART0_REGION0_SCL_FACTOR_CBR	0x1838
 #define RK3568_ESMART0_REGION0_SCL_OFFSET	0x183C
 #define RK3568_ESMART0_REGION1_CTRL		0x1840
+#define YRGB_GT2_MASK				0x1
+#define YRGB_GT2_SHIFT				8
+#define YRGB_GT4_MASK				0x1
+#define YRGB_GT4_SHIFT				9
+
 #define RK3568_ESMART0_REGION1_YRGB_MST		0x1844
 #define RK3568_ESMART0_REGION1_CBR_MST		0x1848
 #define RK3568_ESMART0_REGION1_VIR		0x184C
@@ -580,6 +594,34 @@ enum vop2_layer_phy_id {
 	ROCKCHIP_VOP2_ESMART3,
 };
 
+enum vop2_scale_up_mode {
+	VOP2_SCALE_UP_NRST_NBOR,
+	VOP2_SCALE_UP_BIL,
+	VOP2_SCALE_UP_BIC,
+};
+
+enum vop2_scale_down_mode {
+	VOP2_SCALE_DOWN_NRST_NBOR,
+	VOP2_SCALE_DOWN_BIL,
+	VOP2_SCALE_DOWN_AVG,
+};
+
+enum scale_mode {
+	SCALE_NONE = 0x0,
+	SCALE_UP   = 0x1,
+	SCALE_DOWN = 0x2
+};
+
+struct vop2_layer {
+	u8 id;
+	/**
+	 * @win_phys_id: window id of the layer selected.
+	 * Every layer must make sure to select different
+	 * windows of others.
+	 */
+	u8 win_phys_id;
+};
+
 struct vop2_win_data {
 	char *name;
 	u8 phys_id;
@@ -624,6 +666,73 @@ struct vop2 {
 };
 
 static struct vop2 *rockchip_vop2;
+/*
+ * bli_sd_factor = (src - 1) / (dst - 1) << 12;
+ * avg_sd_factor:
+ * bli_su_factor:
+ * bic_su_factor:
+ * = (src - 1) / (dst - 1) << 16;
+ *
+ * gt2 enable: dst get one line from two line of the src
+ * gt4 enable: dst get one line from four line of the src.
+ *
+ */
+#define VOP2_BILI_SCL_DN(src, dst)	(((src - 1) << 12) / (dst - 1))
+#define VOP2_COMMON_SCL(src, dst)	(((src - 1) << 16) / (dst - 1))
+
+#define VOP2_BILI_SCL_FAC_CHECK(src, dst, fac)	 \
+				(fac * (dst - 1) >> 12 < (src - 1))
+#define VOP2_COMMON_SCL_FAC_CHECK(src, dst, fac) \
+				(fac * (dst - 1) >> 16 < (src - 1))
+
+static uint16_t vop2_scale_factor(enum scale_mode mode,
+				  int32_t filter_mode,
+				  uint32_t src, uint32_t dst)
+{
+	uint32_t fac = 0;
+	int i = 0;
+
+	if (mode == SCALE_NONE)
+		return 0;
+
+	/*
+	 * A workaround to avoid zero div.
+	 */
+	if ((dst == 1) || (src == 1)) {
+		dst = dst + 1;
+		src = src + 1;
+	}
+
+	if ((mode == SCALE_DOWN) && (filter_mode == VOP2_SCALE_DOWN_BIL)) {
+		fac = VOP2_BILI_SCL_DN(src, dst);
+		for (i = 0; i < 100; i++) {
+			if (VOP2_BILI_SCL_FAC_CHECK(src, dst, fac))
+				break;
+			fac -= 1;
+			printf("down fac cali: src:%d, dst:%d, fac:0x%x\n", src, dst, fac);
+		}
+	} else {
+		fac = VOP2_COMMON_SCL(src, dst);
+		for (i = 0; i < 100; i++) {
+			if (VOP2_COMMON_SCL_FAC_CHECK(src, dst, fac))
+				break;
+			fac -= 1;
+			printf("up fac cali:  src:%d, dst:%d, fac:0x%x\n", src, dst, fac);
+		}
+	}
+
+	return fac;
+}
+
+static inline enum scale_mode scl_get_scl_mode(int src, int dst)
+{
+	if (src < dst)
+		return SCALE_UP;
+	else if (src > dst)
+		return SCALE_DOWN;
+
+	return SCALE_NONE;
+}
 
 static u8 vop2_vp_primary_plane_order[VOP2_VP_MAX] = {
 	ROCKCHIP_VOP2_SMART0,
@@ -1503,6 +1612,74 @@ static int rockchip_vop2_init(struct display_state *state)
 	return 0;
 }
 
+static void vop2_setup_scale(struct vop2 *vop2, uint32_t win_offset,
+			     uint32_t src_w, uint32_t src_h, uint32_t dst_w,
+			     uint32_t dst_h)
+{
+	uint16_t yrgb_hor_scl_mode, yrgb_ver_scl_mode;
+	uint16_t hscl_filter_mode, vscl_filter_mode;
+	uint8_t gt2 = 0, gt4 = 0;
+	uint32_t xfac = 0, yfac = 0;
+	uint16_t hsu_filter_mode = VOP2_SCALE_UP_BIC;
+	uint16_t hsd_filter_mode = VOP2_SCALE_DOWN_BIL;
+	uint16_t vsu_filter_mode = VOP2_SCALE_UP_BIL;
+	uint16_t vsd_filter_mode = VOP2_SCALE_DOWN_BIL;
+
+	if (src_h >= (4 * dst_h))
+		gt4 = 1;
+	else if (src_h >= (2 * dst_h))
+		gt2 = 1;
+
+	if (gt4)
+		src_h >>= 2;
+	else if (gt2)
+		src_h >>= 1;
+
+	yrgb_hor_scl_mode = scl_get_scl_mode(src_w, dst_w);
+	yrgb_ver_scl_mode = scl_get_scl_mode(src_h, dst_h);
+
+	if (yrgb_hor_scl_mode == SCALE_UP)
+		hscl_filter_mode = hsu_filter_mode;
+	else
+		hscl_filter_mode = hsd_filter_mode;
+
+	if (yrgb_ver_scl_mode == SCALE_UP)
+		vscl_filter_mode = vsu_filter_mode;
+	else
+		vscl_filter_mode = vsd_filter_mode;
+
+	/*
+	 * RK3568 VOP Esmart/Smart dsp_w should be even pixel
+	 * at scale down mode
+	 */
+	if ((yrgb_hor_scl_mode == SCALE_DOWN) && (dst_w & 0x1)) {
+		printf("win dst_w[%d] should align as 2 pixel\n", dst_w);
+		dst_w += 1;
+	}
+
+	xfac = vop2_scale_factor(yrgb_hor_scl_mode, hscl_filter_mode, src_w, dst_w);
+	yfac = vop2_scale_factor(yrgb_ver_scl_mode, vscl_filter_mode, src_h, dst_h);
+	vop2_writel(vop2, RK3568_ESMART0_REGION0_SCL_FACTOR_YRGB + win_offset,
+		    yfac << 16 | xfac);
+
+	vop2_mask_write(vop2, RK3568_ESMART0_REGION1_CTRL + win_offset,
+			YRGB_GT2_MASK, YRGB_GT2_SHIFT, gt2, false);
+	vop2_mask_write(vop2, RK3568_ESMART0_REGION1_CTRL + win_offset,
+			YRGB_GT4_MASK, YRGB_GT4_SHIFT, gt4, false);
+
+	vop2_mask_write(vop2, RK3568_ESMART0_REGION0_SCL_CTRL + win_offset,
+			YRGB_XSCL_MODE_MASK, YRGB_XSCL_MODE_SHIFT, yrgb_hor_scl_mode, false);
+	vop2_mask_write(vop2, RK3568_ESMART0_REGION0_SCL_CTRL + win_offset,
+			YRGB_YSCL_MODE_MASK, YRGB_YSCL_MODE_SHIFT, yrgb_ver_scl_mode, false);
+
+	vop2_mask_write(vop2, RK3568_ESMART0_REGION0_SCL_CTRL + win_offset,
+			YRGB_XSCL_FILTER_MODE_MASK, YRGB_XSCL_FILTER_MODE_SHIFT,
+			hscl_filter_mode, false);
+	vop2_mask_write(vop2, RK3568_ESMART0_REGION0_SCL_CTRL + win_offset,
+			YRGB_YSCL_FILTER_MODE_MASK, YRGB_YSCL_FILTER_MODE_SHIFT,
+			vscl_filter_mode, false);
+}
+
 static int rockchip_vop2_set_plane(struct display_state *state)
 {
 	struct crtc_state *cstate = &state->crtc_state;
@@ -1545,6 +1722,8 @@ static int rockchip_vop2_set_plane(struct display_state *state)
 	else
 		y_mirror = 0;
 
+	vop2_setup_scale(vop2, win_offset, src_w, src_h, crtc_w, crtc_h);
+
 	if (y_mirror)
 		cstate->dma_addr += (src_h - 1) * xvir * 4;
 	vop2_mask_write(vop2, RK3568_ESMART0_CTRL1 + win_offset, EN_MASK,

commit c55d261eb594553a991c1ea75b810b3c972b6995
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Wed Apr 28 14:35:00 2021 +0800

    video/drm: add support rk356x RGB/BT656/BT1120 output
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: Iab3be3c22987601b85b3b9d163c35339a2b6354a

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index 23b977168d..3017921487 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -195,6 +195,7 @@ CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
+CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_ROCKCHIP_CUBIC_LUT_SIZE=9
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index 8a0ebc8a5d..1a2ad84e67 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -45,14 +45,16 @@ enum rockchip_mcu_cmd {
 /*
  * display output interface supported by rockchip lcdc
  */
-#define ROCKCHIP_OUT_MODE_P888	0
-#define ROCKCHIP_OUT_MODE_P666	1
-#define ROCKCHIP_OUT_MODE_P565	2
+#define ROCKCHIP_OUT_MODE_P888		0
+#define ROCKCHIP_OUT_MODE_BT1120	0
+#define ROCKCHIP_OUT_MODE_P666		1
+#define ROCKCHIP_OUT_MODE_P565		2
+#define ROCKCHIP_OUT_MODE_BT656		5
 #define ROCKCHIP_OUT_MODE_S888		8
 #define ROCKCHIP_OUT_MODE_S888_DUMMY	12
 #define ROCKCHIP_OUT_MODE_YUV420	14
 /* for use special outface */
-#define ROCKCHIP_OUT_MODE_AAAA	15
+#define ROCKCHIP_OUT_MODE_AAAA		15
 
 #define VOP_OUTPUT_IF_RGB	BIT(0)
 #define VOP_OUTPUT_IF_BT1120	BIT(1)
diff --git a/drivers/video/drm/rockchip_rgb.c b/drivers/video/drm/rockchip_rgb.c
index dee9aa0943..a5af15c976 100644
--- a/drivers/video/drm/rockchip_rgb.c
+++ b/drivers/video/drm/rockchip_rgb.c
@@ -43,6 +43,9 @@
 #define RK3368_GRF_SOC_CON15		0x043c
 #define RK3368_FORCE_JETAG(v)		HIWORD_UPDATE(v,  13,  13)
 
+#define RK3568_GRF_VO_CON1		0X0364
+#define RK3568_RGB_DATA_BYPASS(v)	HIWORD_UPDATE(v, 6, 6)
+
 struct rockchip_rgb;
 
 struct rockchip_rgb_funcs {
@@ -126,24 +129,42 @@ static int rockchip_rgb_connector_init(struct display_state *state)
 	switch (conn_state->bus_format) {
 	case MEDIA_BUS_FMT_RGB666_1X18:
 		conn_state->output_mode = ROCKCHIP_OUT_MODE_P666;
+		conn_state->output_if = VOP_OUTPUT_IF_RGB;
 		break;
 	case MEDIA_BUS_FMT_RGB565_1X16:
 		conn_state->output_mode = ROCKCHIP_OUT_MODE_P565;
+		conn_state->output_if = VOP_OUTPUT_IF_RGB;
 		break;
 	case MEDIA_BUS_FMT_SRGB888_3X8:
 	case MEDIA_BUS_FMT_SBGR888_3X8:
 	case MEDIA_BUS_FMT_SRBG888_3X8:
 		conn_state->output_mode = ROCKCHIP_OUT_MODE_S888;
+		conn_state->output_if = VOP_OUTPUT_IF_RGB;
 		break;
 	case MEDIA_BUS_FMT_SRGB888_DUMMY_4X8:
 	case MEDIA_BUS_FMT_SBGR888_DUMMY_4X8:
 	case MEDIA_BUS_FMT_SRBG888_DUMMY_4X8:
 		conn_state->output_mode = ROCKCHIP_OUT_MODE_S888_DUMMY;
+		conn_state->output_if = VOP_OUTPUT_IF_RGB;
+		break;
+	case MEDIA_BUS_FMT_YUYV8_2X8:
+	case MEDIA_BUS_FMT_YVYU8_2X8:
+	case MEDIA_BUS_FMT_UYVY8_2X8:
+	case MEDIA_BUS_FMT_VYUY8_2X8:
+		conn_state->output_mode = ROCKCHIP_OUT_MODE_BT656;
+		conn_state->output_if = VOP_OUTPUT_IF_BT656;
 		break;
+	case MEDIA_BUS_FMT_YUYV8_1X16:
+	case MEDIA_BUS_FMT_YVYU8_1X16:
+	case MEDIA_BUS_FMT_UYVY8_1X16:
+	case MEDIA_BUS_FMT_VYUY8_1X16:
+		conn_state->output_mode = ROCKCHIP_OUT_MODE_BT1120;
+		conn_state->output_if = VOP_OUTPUT_IF_BT1120;
 	case MEDIA_BUS_FMT_RGB888_1X24:
 	case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
 	default:
 		conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
+		conn_state->output_if = VOP_OUTPUT_IF_RGB;
 		break;
 	}
 
@@ -259,6 +280,20 @@ static const struct rockchip_connector rk3368_rgb_driver_data = {
 	.data = &rk3368_rgb_funcs,
 };
 
+static void rk3568_rgb_prepare(struct rockchip_rgb *rgb, int pipe)
+{
+	regmap_write(rgb->grf, RK3568_GRF_VO_CON1, RK3568_RGB_DATA_BYPASS(0));
+}
+
+static const struct rockchip_rgb_funcs rk3568_rgb_funcs = {
+	.prepare = rk3568_rgb_prepare,
+};
+
+static const struct rockchip_connector rk3568_rgb_driver_data = {
+	.funcs = &rockchip_rgb_connector_funcs,
+	.data = &rk3568_rgb_funcs,
+};
+
 static const struct rockchip_connector rockchip_rgb_driver_data = {
 	.funcs = &rockchip_rgb_connector_funcs,
 };
@@ -292,6 +327,10 @@ static const struct udevice_id rockchip_rgb_ids[] = {
 		.compatible = "rockchip,rk3368-rgb",
 		.data = (ulong)&rk3368_rgb_driver_data,
 	},
+	{
+		.compatible = "rockchip,rk3568-rgb",
+		.data = (ulong)&rk3568_rgb_driver_data,
+	},
 	{
 		.compatible = "rockchip,rv1108-rgb",
 		.data = (ulong)&rockchip_rgb_driver_data,
diff --git a/drivers/video/drm/rockchip_vop2.c b/drivers/video/drm/rockchip_vop2.c
index 8b2f708e07..f6df97f957 100644
--- a/drivers/video/drm/rockchip_vop2.c
+++ b/drivers/video/drm/rockchip_vop2.c
@@ -1283,11 +1283,8 @@ static int rockchip_vop2_init(struct display_state *state)
 				1, false);
 		vop2_mask_write(vop2, RK3568_DSP_IF_EN, IF_MUX_MASK,
 				RGB_MUX_SHIFT, cstate->crtc_id, false);
-		vop2_mask_write(vop2, RK3568_DSP_IF_POL, EN_MASK,
-				IF_CRTL_RGB_LVDS_DCLK_POL_SHIT, !!dclk_inv,
-				false);
 		vop2_grf_writel(vop2, RK3568_GRF_VO_CON1, EN_MASK,
-				GRF_RGB_DCLK_INV_SHIFT, !dclk_inv);
+				GRF_RGB_DCLK_INV_SHIFT, dclk_inv);
 	}
 
 	if (conn_state->output_if & VOP_OUTPUT_IF_BT1120) {
@@ -1349,7 +1346,7 @@ static int rockchip_vop2_init(struct display_state *state)
 		vop2_mask_write(vop2, RK3568_DSP_IF_EN, IF_MUX_MASK,
 				MIPI0_MUX_SHIFT, cstate->crtc_id, false);
 		vop2_mask_write(vop2, RK3568_DSP_IF_POL, EN_MASK,
-				IF_CRTL_MIPI_DCLK_POL_SHIT, !!dclk_inv, false);
+				IF_CRTL_MIPI_DCLK_POL_SHIT, dclk_inv, false);
 	}
 
 	if (conn_state->output_if & VOP_OUTPUT_IF_MIPI1) {
@@ -1358,7 +1355,7 @@ static int rockchip_vop2_init(struct display_state *state)
 		vop2_mask_write(vop2, RK3568_DSP_IF_EN, IF_MUX_MASK,
 				MIPI1_MUX_SHIFT, cstate->crtc_id, false);
 		vop2_mask_write(vop2, RK3568_DSP_IF_POL, EN_MASK,
-				IF_CRTL_MIPI_DCLK_POL_SHIT, !!dclk_inv, false);
+				IF_CRTL_MIPI_DCLK_POL_SHIT, dclk_inv, false);
 	}
 
 	if (conn_state->output_flags &
@@ -1376,6 +1373,8 @@ static int rockchip_vop2_init(struct display_state *state)
 				1, false);
 		vop2_mask_write(vop2, RK3568_DSP_IF_EN, IF_MUX_MASK,
 				EDP0_MUX_SHIFT, cstate->crtc_id, false);
+		vop2_mask_write(vop2, RK3568_DSP_IF_POL, EN_MASK,
+				IF_CRTL_EDP_DCLK_POL_SHIT, dclk_inv, false);
 	}
 
 	if (conn_state->output_if & VOP_OUTPUT_IF_HDMI0) {

commit ac500a1f0cbcf45d2e56503d9c68b722a85201c3
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Tue Apr 27 16:50:53 2021 +0800

    video/drm: vop2: add support bcsh
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: I562444063d27839212ce1ec12d0de48476ba7131

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 0c4489965c..83826f973e 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -1882,6 +1882,13 @@ void rockchip_display_fixup(void *blob)
 		FDT_SET_U32("overscan,top_margin", s->conn_state.overscan.top_margin);
 		FDT_SET_U32("overscan,bottom_margin", s->conn_state.overscan.bottom_margin);
 
+		if (s->conn_state.disp_info) {
+			FDT_SET_U32("bcsh,brightness", s->conn_state.disp_info->bcsh_info.brightness);
+			FDT_SET_U32("bcsh,contrast", s->conn_state.disp_info->bcsh_info.contrast);
+			FDT_SET_U32("bcsh,saturation", s->conn_state.disp_info->bcsh_info.saturation);
+			FDT_SET_U32("bcsh,hue", s->conn_state.disp_info->bcsh_info.hue);
+		}
+
 		if (s->conn_state.disp_info->cubic_lut_data.size &&
 		    CONFIG_ROCKCHIP_CUBIC_LUT_SIZE)
 			FDT_SET_U32("cubic_lut,offset", get_cubic_lut_offset(s->crtc_state.crtc_id));
diff --git a/drivers/video/drm/rockchip_vop2.c b/drivers/video/drm/rockchip_vop2.c
index 6c6144db6e..8b2f708e07 100644
--- a/drivers/video/drm/rockchip_vop2.c
+++ b/drivers/video/drm/rockchip_vop2.c
@@ -21,6 +21,7 @@
 #include <linux/ioport.h>
 #include <dm/device.h>
 #include <dm/read.h>
+#include <fixp-arith.h>
 #include <syscon.h>
 
 #include "rockchip_display.h"
@@ -172,6 +173,36 @@
 #define RK3568_VP0_DSP_VS_ST_END_F1		0xC58
 #define RK3568_VP0_DSP_VACT_ST_END_F1		0xC5C
 
+#define RK3568_VP0_BCSH_CTRL			0xC60
+#define BCSH_CTRL_Y2R_SHIFT			0
+#define BCSH_CTRL_Y2R_MASK			0x1
+#define BCSH_CTRL_Y2R_CSC_MODE_SHIFT		2
+#define BCSH_CTRL_Y2R_CSC_MODE_MASK		0x3
+#define BCSH_CTRL_R2Y_SHIFT			4
+#define BCSH_CTRL_R2Y_MASK			0x1
+#define BCSH_CTRL_R2Y_CSC_MODE_SHIFT		6
+#define BCSH_CTRL_R2Y_CSC_MODE_MASK		0x3
+
+#define RK3568_VP0_BCSH_BCS			0xC64
+#define BCSH_BRIGHTNESS_SHIFT			0
+#define BCSH_BRIGHTNESS_MASK			0xFF
+#define BCSH_CONTRAST_SHIFT			8
+#define BCSH_CONTRAST_MASK			0x1FF
+#define BCSH_SATURATION_SHIFT			20
+#define BCSH_SATURATION_MASK			0x3FF
+#define BCSH_OUT_MODE_SHIFT			30
+#define BCSH_OUT_MODE_MASK			0x3
+
+#define RK3568_VP0_BCSH_H			0xC68
+#define BCSH_SIN_HUE_SHIFT			0
+#define BCSH_SIN_HUE_MASK			0x1FF
+#define BCSH_COS_HUE_SHIFT			16
+#define BCSH_COS_HUE_MASK			0x1FF
+
+#define RK3568_VP0_BCSH_COLOR			0xC6C
+#define BCSH_EN_SHIFT				31
+#define BCSH_EN_MASK				1
+
 #define RK3568_VP1_DSP_CTRL			0xD00
 #define RK3568_VP1_MIPI_CTRL			0xD04
 #define RK3568_VP1_COLOR_BAR_CTRL		0xD08
@@ -505,6 +536,13 @@ enum vop2_pol {
 	DCLK_INVERT    = 3
 };
 
+enum vop2_bcsh_out_mode {
+	BCSH_OUT_MODE_BLACK,
+	BCSH_OUT_MODE_BLUE,
+	BCSH_OUT_MODE_COLOR_BAR,
+	BCSH_OUT_MODE_NORMAL_VIDEO,
+};
+
 #define _VOP_REG(off, _mask, _shift, _write_mask) \
 		{ \
 		 .offset = off, \
@@ -593,6 +631,11 @@ static u8 vop2_vp_primary_plane_order[VOP2_VP_MAX] = {
 	ROCKCHIP_VOP2_ESMART1,
 };
 
+static inline int interpolate(int x1, int y1, int x2, int y2, int x)
+{
+	return y1 + (y2 - y1) * (x - x1) / (x2 - x1);
+}
+
 static int vop2_get_primary_plane(struct vop2 *vop2, u32 plane_mask)
 {
 	int i = 0;
@@ -842,6 +885,98 @@ static int rockchip_vop2_cubic_lut_init(struct vop2 *vop2,
 	return 0;
 }
 
+static void vop2_tv_config_update(struct display_state *state, struct vop2 *vop2)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct base_bcsh_info *bcsh_info;
+	struct crtc_state *cstate = &state->crtc_state;
+	int brightness, contrast, saturation, hue, sin_hue, cos_hue;
+	bool bcsh_en = false, post_r2y_en = false, post_y2r_en = false;
+	u32 vp_offset = (cstate->crtc_id * 0x100);
+	int post_csc_mode;
+
+	if (!conn_state->disp_info)
+		return;
+	bcsh_info = &conn_state->disp_info->bcsh_info;
+	if (!bcsh_info)
+		return;
+
+	if (bcsh_info->brightness != 50 ||
+	    bcsh_info->contrast != 50 ||
+	    bcsh_info->saturation != 50 || bcsh_info->hue != 50)
+		bcsh_en = true;
+
+	if (bcsh_en) {
+		if (!cstate->yuv_overlay)
+			post_r2y_en = 1;
+		if (!is_yuv_output(conn_state->bus_format))
+			post_y2r_en = 1;
+	} else {
+		if (!cstate->yuv_overlay && is_yuv_output(conn_state->bus_format))
+			post_r2y_en = 1;
+		if (cstate->yuv_overlay && !is_yuv_output(conn_state->bus_format))
+			post_y2r_en = 1;
+	}
+
+	post_csc_mode = vop2_convert_csc_mode(conn_state->color_space);
+
+
+	vop2_mask_write(vop2, RK3568_VP0_BCSH_CTRL + vp_offset, BCSH_CTRL_R2Y_MASK,
+			BCSH_CTRL_R2Y_SHIFT, post_r2y_en, false);
+	vop2_mask_write(vop2, RK3568_VP0_BCSH_CTRL + vp_offset, BCSH_CTRL_Y2R_MASK,
+			BCSH_CTRL_Y2R_SHIFT, post_y2r_en, false);
+
+	vop2_mask_write(vop2, RK3568_VP0_BCSH_CTRL + vp_offset, BCSH_CTRL_R2Y_CSC_MODE_MASK,
+			BCSH_CTRL_R2Y_CSC_MODE_SHIFT, post_csc_mode, false);
+	vop2_mask_write(vop2, RK3568_VP0_BCSH_CTRL + vp_offset, BCSH_CTRL_Y2R_CSC_MODE_MASK,
+			BCSH_CTRL_Y2R_CSC_MODE_SHIFT, post_csc_mode, false);
+	if (!bcsh_en) {
+		vop2_mask_write(vop2, RK3568_VP0_BCSH_COLOR + vp_offset,
+				BCSH_EN_MASK, BCSH_EN_SHIFT, 0, false);
+		return;
+	}
+
+	if (cstate->feature & VOP_FEATURE_OUTPUT_10BIT)
+		brightness = interpolate(0, -128, 100, 127,
+					 bcsh_info->brightness);
+	else
+		brightness = interpolate(0, -32, 100, 31,
+					 bcsh_info->brightness);
+	contrast = interpolate(0, 0, 100, 511, bcsh_info->contrast);
+	saturation = interpolate(0, 0, 100, 511, bcsh_info->saturation);
+	hue = interpolate(0, -30, 100, 30, bcsh_info->hue);
+
+
+	/*
+	 *  a:[-30~0):
+	 *    sin_hue = 0x100 - sin(a)*256;
+	 *    cos_hue = cos(a)*256;
+	 *  a:[0~30]
+	 *    sin_hue = sin(a)*256;
+	 *    cos_hue = cos(a)*256;
+	 */
+	sin_hue = fixp_sin32(hue) >> 23;
+	cos_hue = fixp_cos32(hue) >> 23;
+
+	vop2_mask_write(vop2, RK3568_VP0_BCSH_BCS + vp_offset,
+			BCSH_BRIGHTNESS_MASK, BCSH_BRIGHTNESS_SHIFT,
+			brightness, false);
+	vop2_mask_write(vop2, RK3568_VP0_BCSH_BCS + vp_offset,
+			BCSH_CONTRAST_MASK, BCSH_CONTRAST_SHIFT, contrast, false);
+	vop2_mask_write(vop2, RK3568_VP0_BCSH_BCS + vp_offset,
+			BCSH_SATURATION_MASK, BCSH_SATURATION_SHIFT,
+			saturation * contrast / 0x100, false);
+	vop2_mask_write(vop2, RK3568_VP0_BCSH_H + vp_offset,
+			BCSH_SIN_HUE_MASK, BCSH_SIN_HUE_SHIFT, sin_hue, false);
+	vop2_mask_write(vop2, RK3568_VP0_BCSH_H + vp_offset,
+			BCSH_COS_HUE_MASK, BCSH_COS_HUE_SHIFT, cos_hue, false);
+	vop2_mask_write(vop2, RK3568_VP0_BCSH_BCS + vp_offset,
+			 BCSH_OUT_MODE_MASK, BCSH_OUT_MODE_SHIFT,
+			BCSH_OUT_MODE_NORMAL_VIDEO, false);
+	vop2_mask_write(vop2, RK3568_VP0_BCSH_COLOR + vp_offset,
+			BCSH_EN_MASK, BCSH_EN_SHIFT, 1, false);
+}
+
 static void vop2_post_config(struct display_state *state, struct vop2 *vop2)
 {
 	struct connector_state *conn_state = &state->conn_state;
@@ -1363,6 +1498,7 @@ static int rockchip_vop2_init(struct display_state *state)
 	vop2_mask_write(vop2, RK3568_VP0_DSP_CTRL + vp_offset, EN_MASK,
 			POST_DSP_OUT_R2Y_SHIFT, yuv_overlay, false);
 
+	vop2_tv_config_update(state, vop2);
 	vop2_post_config(state, vop2);
 
 	return 0;

commit 466b47140afed59ac2c39832431cfa2d1ccf54ba
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Tue Apr 27 16:49:40 2021 +0800

    fixp-arith: add support sin and cos function
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: I44a0a98a937dce7e659b19f03b1a056b0a2e2e70

diff --git a/include/fixp-arith.h b/include/fixp-arith.h
new file mode 100644
index 0000000000..7d7719a634
--- /dev/null
+++ b/include/fixp-arith.h
@@ -0,0 +1,90 @@
+#ifndef _FIXP_ARITH_H
+#define _FIXP_ARITH_H
+
+/*
+ * Simplistic fixed-point arithmetics.
+ * Hmm, I'm probably duplicating some code :(
+ *
+ * Copyright (c) 2002 Johann Deneux
+ */
+
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/types.h>
+
+static const s32 sin_table[] = {
+	0x00000000, 0x023be165, 0x04779632, 0x06b2f1d2, 0x08edc7b6, 0x0b27eb5c,
+	0x0d61304d, 0x0f996a26, 0x11d06c96, 0x14060b67, 0x163a1a7d, 0x186c6ddd,
+	0x1a9cd9ac, 0x1ccb3236, 0x1ef74bf2, 0x2120fb82, 0x234815ba, 0x256c6f9e,
+	0x278dde6e, 0x29ac379f, 0x2bc750e8, 0x2ddf003f, 0x2ff31bdd, 0x32037a44,
+	0x340ff241, 0x36185aee, 0x381c8bb5, 0x3a1c5c56, 0x3c17a4e7, 0x3e0e3ddb,
+	0x3fffffff, 0x41ecc483, 0x43d464fa, 0x45b6bb5d, 0x4793a20f, 0x496af3e1,
+	0x4b3c8c11, 0x4d084650, 0x4ecdfec6, 0x508d9210, 0x5246dd48, 0x53f9be04,
+	0x55a6125a, 0x574bb8e5, 0x58ea90c2, 0x5a827999, 0x5c135399, 0x5d9cff82,
+	0x5f1f5ea0, 0x609a52d1, 0x620dbe8a, 0x637984d3, 0x64dd894f, 0x6639b039,
+	0x678dde6d, 0x68d9f963, 0x6a1de735, 0x6b598ea1, 0x6c8cd70a, 0x6db7a879,
+	0x6ed9eba0, 0x6ff389de, 0x71046d3c, 0x720c8074, 0x730baeec, 0x7401e4bf,
+	0x74ef0ebb, 0x75d31a5f, 0x76adf5e5, 0x777f903b, 0x7847d908, 0x7906c0af,
+	0x79bc384c, 0x7a6831b8, 0x7b0a9f8c, 0x7ba3751c, 0x7c32a67c, 0x7cb82884,
+	0x7d33f0c8, 0x7da5f5a3, 0x7e0e2e31, 0x7e6c924f, 0x7ec11aa3, 0x7f0bc095,
+	0x7f4c7e52, 0x7f834ecf, 0x7fb02dc4, 0x7fd317b3, 0x7fec09e1, 0x7ffb025e,
+	0x7fffffff
+};
+
+/**
+ * __fixp_sin32() returns the sin of an angle in degrees
+ *
+ * @degrees: angle, in degrees, from 0 to 360.
+ *
+ * The returned value ranges from -0x7fffffff to +0x7fffffff.
+ */
+static inline s32 __fixp_sin32(int degrees)
+{
+	s32 ret;
+	bool negative = false;
+
+	if (degrees > 180) {
+		negative = true;
+		degrees -= 180;
+	}
+	if (degrees > 90)
+		degrees = 180 - degrees;
+
+	ret = sin_table[degrees];
+
+	return negative ? -ret : ret;
+}
+
+/**
+ * fixp_sin32() returns the sin of an angle in degrees
+ *
+ * @degrees: angle, in degrees. The angle can be positive or negative
+ *
+ * The returned value ranges from -0x7fffffff to +0x7fffffff.
+ */
+static inline s32 fixp_sin32(int degrees)
+{
+	degrees = (degrees % 360 + 360) % 360;
+
+	return __fixp_sin32(degrees);
+}
+
+/* cos(x) = sin(x + 90 degrees) */
+#define fixp_cos32(v) fixp_sin32((v) + 90)
+
+/*
+ * 16 bits variants
+ *
+ * The returned value ranges from -0x7fff to 0x7fff
+ */
+
+#define fixp_sin16(v) (fixp_sin32(v) >> 16)
+#define fixp_cos16(v) (fixp_cos32(v) >> 16)
+
+#endif

commit 6414e3bc8687dbcc585b804d5c0bdfdb2d979c4b
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Fri Apr 30 14:39:17 2021 +0800

    video/drm: vop2: add suppor cubic lut
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: I5a02c737ba175f4ae65be22d81a0dfa7dd3f85d7

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index 7544347999..23b977168d 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -195,6 +195,7 @@ CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
+CONFIG_ROCKCHIP_CUBIC_LUT_SIZE=9
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
diff --git a/drivers/video/drm/Kconfig b/drivers/video/drm/Kconfig
index 71db4179dc..abcbe82339 100644
--- a/drivers/video/drm/Kconfig
+++ b/drivers/video/drm/Kconfig
@@ -133,3 +133,10 @@ config ROCKCHIP_DRM_TVE
 	  Choose this option to enable support for Rockchip TVE.
 	  Rockchip rk322x and rk322xh SoC has TVE can be used, and
 	  say Y to enable TVE driver.
+
+config ROCKCHIP_CUBIC_LUT_SIZE
+	int "Rockchip cubic lut size"
+	depends on DRM_ROCKCHIP
+	default 0
+	help
+	  Used to calc cubic lut size.
diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 20d4dc54fd..0c4489965c 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -54,6 +54,7 @@ static LIST_HEAD(rockchip_display_list);
 static LIST_HEAD(logo_cache_list);
 
 static unsigned long memory_start;
+static unsigned long cubic_lut_memory_start;
 static unsigned long memory_end;
 static struct base2_info base_parameter;
 static uint32_t crc32_table[256];
@@ -241,6 +242,7 @@ static void init_display_buffer(ulong base)
 {
 	memory_start = base + DRM_ROCKCHIP_FB_SIZE;
 	memory_end = memory_start;
+	cubic_lut_memory_start = memory_start + MEMORY_POOL_SIZE;
 }
 
 void *get_display_buffer(int size)
@@ -264,6 +266,34 @@ static unsigned long get_display_size(void)
 	return memory_end - memory_start;
 }
 
+static unsigned long get_single_cubic_lut_size(void)
+{
+	ulong cubic_lut_size;
+	int cubic_lut_step = CONFIG_ROCKCHIP_CUBIC_LUT_SIZE;
+
+	/* This is depend on IC designed */
+	cubic_lut_size = (cubic_lut_step * cubic_lut_step * cubic_lut_step + 1) / 2 * 16;
+	cubic_lut_size = roundup(cubic_lut_size, PAGE_SIZE);
+
+	return cubic_lut_size;
+}
+
+static unsigned long get_cubic_lut_offset(int crtc_id)
+{
+	return crtc_id * get_single_cubic_lut_size();
+}
+
+unsigned long get_cubic_lut_buffer(int crtc_id)
+{
+	return cubic_lut_memory_start + crtc_id * get_single_cubic_lut_size();
+}
+
+static unsigned long get_cubic_memory_size(void)
+{
+	/* Max support 4 cubic lut */
+	return get_single_cubic_lut_size() * 4;
+}
+
 bool can_direct_logo(int bpp)
 {
 	return bpp == 24 || bpp == 32;
@@ -1779,6 +1809,12 @@ void rockchip_display_fixup(void *blob)
 						    (u64)get_display_size());
 		if (offset < 0)
 			printf("failed to reserve drm-loader-logo memory\n");
+
+		offset = fdt_update_reserved_memory(blob, "rockchip,drm-cubic-lut",
+						    (u64)cubic_lut_memory_start,
+						    (u64)get_cubic_memory_size());
+		if (offset < 0)
+			printf("failed to reserve drm-cubic-lut memory\n");
 	} else {
 		printf("can't found rockchip,drm-logo, use rockchip,fb-logo\n");
 		/* Compatible with rkfb display, only need reserve memory */
@@ -1845,6 +1881,11 @@ void rockchip_display_fixup(void *blob)
 		FDT_SET_U32("overscan,right_margin", s->conn_state.overscan.right_margin);
 		FDT_SET_U32("overscan,top_margin", s->conn_state.overscan.top_margin);
 		FDT_SET_U32("overscan,bottom_margin", s->conn_state.overscan.bottom_margin);
+
+		if (s->conn_state.disp_info->cubic_lut_data.size &&
+		    CONFIG_ROCKCHIP_CUBIC_LUT_SIZE)
+			FDT_SET_U32("cubic_lut,offset", get_cubic_lut_offset(s->crtc_state.crtc_id));
+
 #undef FDT_SET_U32
 	}
 }
diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index 7939d2c372..8a0ebc8a5d 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -206,5 +206,6 @@ struct base2_disp_info *rockchip_get_disp_info(int type, int id);
 
 void drm_mode_max_resolution_filter(struct hdmi_edid_data *edid_data,
 				    struct vop_rect *max_output);
+unsigned long get_cubic_lut_buffer(int crtc_id);
 
 #endif
diff --git a/drivers/video/drm/rockchip_vop2.c b/drivers/video/drm/rockchip_vop2.c
index 3480d2260f..6c6144db6e 100644
--- a/drivers/video/drm/rockchip_vop2.c
+++ b/drivers/video/drm/rockchip_vop2.c
@@ -36,6 +36,9 @@
 
 #define RK3568_AUTO_GATING_CTRL			0x008
 
+#define RK3568_SYS_AXI_LUT_CTRL			0x024
+#define LUT_DMA_EN_SHIFT			0
+
 #define RK3568_DSP_IF_EN			0x028
 #define RGB_EN_SHIFT				0
 #define HDMI0_EN_SHIFT				1
@@ -149,6 +152,12 @@
 #define MIPI_DUAL_SWAP_EN_SHIFT			21
 
 #define RK3568_VP0_COLOR_BAR_CTRL		0xC08
+#define RK3568_VP0_3D_LUT_CTRL			0xC10
+#define VP0_3D_LUT_EN_SHIFT				0
+#define VP0_3D_LUT_UPDATE_SHIFT			2
+
+#define RK3568_VP0_3D_LUT_MST			0xC20
+
 #define RK3568_VP0_DSP_BG			0xC2C
 #define RK3568_VP0_PRE_SCAN_HTIMING		0xC30
 #define RK3568_VP0_POST_DSP_HACT_INFO		0xC34
@@ -780,6 +789,59 @@ static int rockchip_vop2_gamma_lut_init(struct vop2 *vop2,
 	return 0;
 }
 
+static int rockchip_vop2_cubic_lut_init(struct vop2 *vop2,
+					struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct crtc_state *cstate = &state->crtc_state;
+	int i, cubic_lut_len;
+	u32 vp_offset = cstate->crtc_id * 0x100;
+	struct base2_disp_info *disp_info = conn_state->disp_info;
+	struct base2_cubic_lut_data *lut = &conn_state->disp_info->cubic_lut_data;
+	u32 *cubic_lut_addr;
+
+	if (!disp_info || CONFIG_ROCKCHIP_CUBIC_LUT_SIZE == 0)
+		return 0;
+
+	if (!disp_info->cubic_lut_data.size)
+		return 0;
+
+	cubic_lut_addr = (u32 *)get_cubic_lut_buffer(cstate->crtc_id);
+	cubic_lut_len = disp_info->cubic_lut_data.size;
+
+	for (i = 0; i < cubic_lut_len / 2; i++) {
+		*cubic_lut_addr++ = ((lut->lred[2 * i]) & 0xfff) +
+					((lut->lgreen[2 * i] & 0xfff) << 12) +
+					((lut->lblue[2 * i] & 0xff) << 24);
+		*cubic_lut_addr++ = ((lut->lblue[2 * i] & 0xf00) >> 8) +
+					((lut->lred[2 * i + 1] & 0xfff) << 4) +
+					((lut->lgreen[2 * i + 1] & 0xfff) << 16) +
+					((lut->lblue[2 * i + 1] & 0xf) << 28);
+		*cubic_lut_addr++ = (lut->lblue[2 * i + 1] & 0xff0) >> 4;
+		*cubic_lut_addr++ = 0;
+	}
+
+	if (cubic_lut_len % 2) {
+		*cubic_lut_addr++ = (lut->lred[2 * i] & 0xfff) +
+					((lut->lgreen[2 * i] & 0xfff) << 12) +
+					((lut->lblue[2 * i] & 0xff) << 24);
+		*cubic_lut_addr++ = (lut->lblue[2 * i] & 0xf00) >> 8;
+		*cubic_lut_addr++ = 0;
+		*cubic_lut_addr = 0;
+	}
+
+	vop2_writel(vop2, RK3568_VP0_3D_LUT_MST + vp_offset,
+		    get_cubic_lut_buffer(cstate->crtc_id));
+	vop2_mask_write(vop2, RK3568_SYS_AXI_LUT_CTRL,
+			EN_MASK, LUT_DMA_EN_SHIFT, 1, false);
+	vop2_mask_write(vop2, RK3568_VP0_3D_LUT_CTRL + vp_offset,
+			EN_MASK, VP0_3D_LUT_EN_SHIFT, 1, false);
+	vop2_mask_write(vop2, RK3568_VP0_3D_LUT_CTRL + vp_offset,
+			EN_MASK, VP0_3D_LUT_UPDATE_SHIFT, 1, false);
+
+	return 0;
+}
+
 static void vop2_post_config(struct display_state *state, struct vop2 *vop2)
 {
 	struct connector_state *conn_state = &state->conn_state;
@@ -1017,6 +1079,7 @@ static int vop2_initial(struct vop2 *vop2, struct display_state *state)
 
 	vop2_global_initial(vop2, state);
 	rockchip_vop2_gamma_lut_init(vop2, state);
+	rockchip_vop2_cubic_lut_init(vop2, state);
 
 	return 0;
 }
diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c
index b38b2764b2..6a0e4faedf 100644
--- a/drivers/video/video-uclass.c
+++ b/drivers/video/video-uclass.c
@@ -79,7 +79,13 @@ int video_reserve(ulong *addrp)
 
 	gd->video_top = *addrp;
 #ifdef CONFIG_DRM_ROCKCHIP
-	size = DRM_ROCKCHIP_FB_SIZE + MEMORY_POOL_SIZE;
+	int cubic_lut_step = CONFIG_ROCKCHIP_CUBIC_LUT_SIZE;
+	/* This is depend on IC designed */
+	ulong cubic_lut_size = (cubic_lut_step * cubic_lut_step * cubic_lut_step + 1) / 2 * 16;
+	/* Max support 4 cubic lut */
+	cubic_lut_size = roundup(cubic_lut_size, PAGE_SIZE) << 2;
+
+	size = DRM_ROCKCHIP_FB_SIZE + MEMORY_POOL_SIZE + cubic_lut_size;
 	*addrp = *addrp - size;
 	*addrp &= ~((1 << 20) - 1);
 	debug("Reserving %lx Bytes for video at: %lx\n", size, *addrp);

commit cb17ca6c52fc044e0a9c628bc67dae1f1d83d6f4
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Wed Apr 21 20:33:06 2021 +0800

    drm/rockchip: drv: init connector id and get disp info from baseparameter2
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: I4a602b826ca2a61692fff5e9c664f4e45eee0351

diff --git a/drivers/video/drm/analogix_dp.c b/drivers/video/drm/analogix_dp.c
index aa5bd20773..76673689cf 100644
--- a/drivers/video/drm/analogix_dp.c
+++ b/drivers/video/drm/analogix_dp.c
@@ -11,6 +11,7 @@
 #include <asm/unaligned.h>
 #include <asm/io.h>
 #include <dm/device.h>
+#include <dm/of_access.h>
 #include <dm/read.h>
 #include <linux/list.h>
 #include <syscon.h>
@@ -752,6 +753,7 @@ static int analogix_dp_connector_init(struct display_state *state)
 	udelay(1);
 	reset_deassert_bulk(&dp->resets);
 
+	conn_state->disp_info  = rockchip_get_disp_info(conn_state->type, dp->id);
 	generic_phy_power_on(&dp->phy);
 	analogix_dp_init_dp(dp);
 
@@ -866,6 +868,9 @@ static int analogix_dp_probe(struct udevice *dev)
 
 	dp->reg_base = dev_read_addr_ptr(dev);
 
+	dp->id = of_alias_get_id(ofnode_to_np(dev->node), "edp");
+	if (dp->id < 0)
+		dp->id = 0;
 	ret = reset_get_bulk(dev, &dp->resets);
 	if (ret) {
 		dev_err(dev, "failed to get reset control: %d\n", ret);
diff --git a/drivers/video/drm/analogix_dp.h b/drivers/video/drm/analogix_dp.h
index c7f8d49668..8c6893ba04 100644
--- a/drivers/video/drm/analogix_dp.h
+++ b/drivers/video/drm/analogix_dp.h
@@ -540,6 +540,7 @@ struct analogix_dp_plat_data {
 };
 
 struct analogix_dp_device {
+	int id;
 	struct udevice *dev;
 	void *reg_base;
 	struct phy phy;
diff --git a/drivers/video/drm/dw_hdmi.c b/drivers/video/drm/dw_hdmi.c
index c334d58ba5..162a8d74b9 100755
--- a/drivers/video/drm/dw_hdmi.c
+++ b/drivers/video/drm/dw_hdmi.c
@@ -164,6 +164,7 @@ struct dw_hdmi_i2c {
 };
 
 struct dw_hdmi {
+	int id;
 	enum dw_hdmi_devtype dev_type;
 	unsigned int version;
 	struct hdmi_data_info hdmi_data;
@@ -2281,15 +2282,25 @@ int rockchip_dw_hdmi_init(struct display_state *state)
 	ofnode hdmi_node = conn_state->node;
 	u32 val;
 	struct device_node *ddc_node;
+	int id;
 
 	hdmi = malloc(sizeof(struct dw_hdmi));
 	if (!hdmi)
 		return -ENOMEM;
+	id = of_alias_get_id(ofnode_to_np(hdmi_node), "hdmi");
+	if (id < 0)
+		id = 0;
+	hdmi->id = id;
+	conn_state->disp_info  = rockchip_get_disp_info(conn_state->type, hdmi->id);
 
 	memset(hdmi, 0, sizeof(struct dw_hdmi));
 	mode_buf = malloc(MODE_LEN * sizeof(struct drm_display_mode));
 	if (!mode_buf)
 		return -ENOMEM;
+	hdmi->id = of_alias_get_id(ofnode_to_np(hdmi_node), "hdmi");
+	if (hdmi->id < 0)
+		hdmi->id = 0;
+	conn_state->disp_info  = rockchip_get_disp_info(conn_state->type, hdmi->id);
 
 	memset(mode_buf, 0, MODE_LEN * sizeof(struct drm_display_mode));
 
diff --git a/drivers/video/drm/dw_mipi_dsi.c b/drivers/video/drm/dw_mipi_dsi.c
index d3e2ff04f1..8cac4cb02b 100644
--- a/drivers/video/drm/dw_mipi_dsi.c
+++ b/drivers/video/drm/dw_mipi_dsi.c
@@ -1097,6 +1097,7 @@ static int dw_mipi_dsi_connector_init(struct display_state *state)
 	struct connector_state *conn_state = &state->conn_state;
 	struct dw_mipi_dsi *dsi = dev_get_priv(conn_state->dev);
 
+	conn_state->disp_info  = rockchip_get_disp_info(conn_state->type, dsi->id);
 	dsi->dphy.phy = conn_state->phy;
 
 	conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index 9707faec18..7d24403386 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -10,6 +10,7 @@
 #include <dm/device.h>
 #include <dm/read.h>
 #include <dm/ofnode.h>
+#include <dm/of_access.h>
 #include <syscon.h>
 #include <regmap.h>
 #include <dm/device.h>
@@ -91,6 +92,7 @@ struct rockchip_lvds_funcs {
 };
 
 struct rockchip_lvds {
+	int id;
 	struct udevice *dev;
 	struct regmap *grf;
 	struct rockchip_phy *phy;
@@ -125,6 +127,7 @@ static int rockchip_lvds_connector_init(struct display_state *state)
 
 	lvds->mode = &conn_state->mode;
 	lvds->phy = conn_state->phy;
+	conn_state->disp_info  = rockchip_get_disp_info(conn_state->type, lvds->id);
 
 	switch (panel->bus_format) {
 	case MEDIA_BUS_FMT_RGB666_1X7X3_JEIDA:	/* jeida-18 */
@@ -210,6 +213,9 @@ static int rockchip_lvds_probe(struct udevice *dev)
 	lvds->grf = syscon_get_regmap(dev_get_parent(dev));
 	lvds->dual_channel = dev_read_bool(dev, "dual-channel");
 	lvds->data_swap = dev_read_bool(dev, "rockchip,data-swap");
+	lvds->id = of_alias_get_id(ofnode_to_np(dev->node), "lvds");
+	if (lvds->id < 0)
+		lvds->id = 0;
 
 	return 0;
 }
diff --git a/drivers/video/drm/rockchip_rgb.c b/drivers/video/drm/rockchip_rgb.c
index 60015035d3..dee9aa0943 100644
--- a/drivers/video/drm/rockchip_rgb.c
+++ b/drivers/video/drm/rockchip_rgb.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <dm/of_access.h>
 #include <errno.h>
 #include <syscon.h>
 #include <regmap.h>
@@ -50,6 +51,7 @@ struct rockchip_rgb_funcs {
 };
 
 struct rockchip_rgb {
+	int id;
 	struct udevice *dev;
 	struct regmap *grf;
 	bool data_sync_bypass;
@@ -119,6 +121,7 @@ static int rockchip_rgb_connector_init(struct display_state *state)
 	rgb->phy = conn_state->phy;
 
 	conn_state->color_space = V4L2_COLORSPACE_DEFAULT;
+	conn_state->disp_info  = rockchip_get_disp_info(conn_state->type, rgb->id);
 
 	switch (conn_state->bus_format) {
 	case MEDIA_BUS_FMT_RGB666_1X18:
@@ -164,6 +167,9 @@ static int rockchip_rgb_probe(struct udevice *dev)
 	rgb->funcs = connector->data;
 	rgb->grf = syscon_get_regmap(dev_get_parent(dev));
 	rgb->data_sync_bypass = dev_read_bool(dev, "rockchip,data-sync-bypass");
+	rgb->id = of_alias_get_id(ofnode_to_np(dev->node), "rgb");
+	if (rgb->id < 0)
+		rgb->id = 0;
 
 	return 0;
 }

commit 1147faca64c5ffd848e6ab40ba348a43375a127f
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Wed Apr 21 20:32:38 2021 +0800

    video/drm: vop2: add suppor gamma config
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: If52b6db885ba5f08c6069850d97348b6d80ba8e4

diff --git a/drivers/video/drm/rockchip_vop2.c b/drivers/video/drm/rockchip_vop2.c
index 6e7f68b2a4..3480d2260f 100644
--- a/drivers/video/drm/rockchip_vop2.c
+++ b/drivers/video/drm/rockchip_vop2.c
@@ -18,6 +18,7 @@
 #include <clk.h>
 #include <asm/arch/clock.h>
 #include <linux/err.h>
+#include <linux/ioport.h>
 #include <dm/device.h>
 #include <dm/read.h>
 #include <syscon.h>
@@ -69,6 +70,10 @@
 #define IF_CRTL_RGB_LVDS_DCLK_POL_SHIT		3
 #define RK3568_SYS_OTP_WIN_EN			0x50
 #define OTP_WIN_EN_SHIFT			0
+#define RK3568_SYS_LUT_PORT_SEL			0x58
+#define GAMMA_PORT_SEL_MASK			0x3
+#define GAMMA_PORT_SEL_SHIFT			0
+
 #define RK3568_VP0_LINE_FLAG			0x70
 #define RK3568_VP1_LINE_FLAG			0x74
 #define RK3568_VP2_LINE_FLAG			0x78
@@ -133,6 +138,8 @@
 #define POST_DSP_OUT_R2Y_SHIFT			15
 #define PRE_DITHER_DOWN_EN_SHIFT		16
 #define DITHER_DOWN_EN_SHIFT			17
+#define DSP_LUT_EN_SHIFT			28
+
 #define STANDBY_EN_SHIFT			31
 
 #define RK3568_VP0_MIPI_CTRL			0xC04
@@ -555,6 +562,7 @@ struct vop2_data {
 	u8 nr_vps;
 	u8 nr_layers;
 	u8 nr_mixers;
+	u8 nr_gammas;
 };
 
 struct vop2 {
@@ -710,9 +718,65 @@ static inline bool is_hot_plug_devices(int output_type)
 	}
 }
 
-static int rockchip_vop2_init_gamma(struct vop2 *vop2,
-				    struct display_state *state)
+static int rockchip_vop2_gamma_lut_init(struct vop2 *vop2,
+					struct display_state *state)
 {
+	struct connector_state *conn_state = &state->conn_state;
+	struct crtc_state *cstate = &state->crtc_state;
+	struct resource gamma_res;
+	fdt_size_t lut_size;
+	int i, lut_len, ret = 0;
+	u32 *lut_regs;
+	u32 *lut_val;
+	u32 r, g, b;
+	u32 vp_offset = cstate->crtc_id * 0x100;
+	struct base2_disp_info *disp_info = conn_state->disp_info;
+	static int gamma_lut_en_num = 1;
+
+	if (gamma_lut_en_num > vop2->data->nr_gammas) {
+		printf("warn: only %d vp support gamma\n", vop2->data->nr_gammas);
+		return 0;
+	}
+
+	if (!disp_info)
+		return 0;
+
+	if (!disp_info->gamma_lut_data.size)
+		return 0;
+
+	ret = ofnode_read_resource_byname(cstate->node, "gamma_lut", &gamma_res);
+	if (ret)
+		printf("failed to get gamma lut res\n");
+	lut_regs = (u32 *)gamma_res.start;
+	lut_size = gamma_res.end - gamma_res.start + 1;
+	if (lut_regs == (u32 *)FDT_ADDR_T_NONE) {
+		printf("failed to get gamma lut register\n");
+		return 0;
+	}
+	lut_len = lut_size / 4;
+	if (lut_len != 256 && lut_len != 1024) {
+		printf("Warning: unsupport gamma lut table[%d]\n", lut_len);
+		return 0;
+	}
+	lut_val = (u32 *)calloc(1, lut_size);
+	for (i = 0; i < lut_len; i++) {
+		r = disp_info->gamma_lut_data.lred[i] * (lut_len - 1) / 0xffff;
+		g = disp_info->gamma_lut_data.lgreen[i] * (lut_len - 1) / 0xffff;
+		b = disp_info->gamma_lut_data.lblue[i] * (lut_len - 1) / 0xffff;
+
+		lut_val[i] = b * lut_len * lut_len + g * lut_len + r;
+	}
+
+	for (i = 0; i < lut_len; i++)
+		writel(lut_val[i], lut_regs + i);
+
+	vop2_mask_write(vop2, RK3568_SYS_LUT_PORT_SEL,
+			GAMMA_PORT_SEL_MASK, GAMMA_PORT_SEL_SHIFT,
+			cstate->crtc_id , false);
+	vop2_mask_write(vop2, RK3568_VP0_DSP_CTRL + vp_offset,
+			EN_MASK, DSP_LUT_EN_SHIFT, 1, false);
+	gamma_lut_en_num++;
+
 	return 0;
 }
 
@@ -952,7 +1016,7 @@ static int vop2_initial(struct vop2 *vop2, struct display_state *state)
 	}
 
 	vop2_global_initial(vop2, state);
-	rockchip_vop2_init_gamma(vop2, state);
+	rockchip_vop2_gamma_lut_init(vop2, state);
 
 	return 0;
 }
@@ -1521,6 +1585,7 @@ const struct vop2_data rk3568_vop = {
 	.plane_mask = rk356x_vp_plane_mask[0],
 	.nr_layers = 6,
 	.nr_mixers = 5,
+	.nr_gammas = 1,
 };
 
 const struct rockchip_crtc_funcs rockchip_vop2_funcs = {

commit 50a9508e32cf56a7e685d0880ef25c4901ec202e
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Wed Apr 21 20:31:33 2021 +0800

    video/drm: add support baseparameter v2
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: I80770f5282e0702adecf1d15705ff279263e6104

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index da1d369e2a..20d4dc54fd 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -5,6 +5,7 @@
  */
 
 #include <asm/unaligned.h>
+#include <boot_rkimg.h>
 #include <config.h>
 #include <common.h>
 #include <errno.h>
@@ -54,6 +55,8 @@ static LIST_HEAD(logo_cache_list);
 
 static unsigned long memory_start;
 static unsigned long memory_end;
+static struct base2_info base_parameter;
+static uint32_t crc32_table[256];
 
 /*
  * the phy types are used by different connectors in public.
@@ -72,6 +75,103 @@ struct public_phy_data {
 	bool phy_init;
 };
 
+void rockchip_display_make_crc32_table(void)
+{
+	uint32_t c;
+	int n, k;
+	unsigned long poly;		/* polynomial exclusive-or pattern */
+	/* terms of polynomial defining this crc (except x^32): */
+	static const char p[] = {0, 1, 2, 4, 5, 7, 8, 10, 11, 12, 16, 22, 23, 26};
+
+	/* make exclusive-or pattern from polynomial (0xedb88320L) */
+	poly = 0L;
+	for (n = 0; n < sizeof(p) / sizeof(char); n++)
+		poly |= 1L << (31 - p[n]);
+
+	for (n = 0; n < 256; n++) {
+		c = (unsigned long)n;
+		for (k = 0; k < 8; k++)
+		c = c & 1 ? poly ^ (c >> 1) : c >> 1;
+		crc32_table[n] = cpu_to_le32(c);
+	}
+}
+
+uint32_t rockchip_display_crc32c_cal(unsigned char *data, int length)
+{
+	int i;
+	uint32_t crc;
+	crc = 0xFFFFFFFF;
+
+	for (i = 0; i < length; i++) {
+		crc = crc32_table[(crc ^ *data) & 0xff] ^ (crc >> 8);
+		data++;
+	}
+
+	return crc ^ 0xffffffff;
+}
+
+int rockchip_get_baseparameter(void)
+{
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+	int block_num = 2048;
+	char baseparameter_buf[block_num * RK_BLK_SIZE] __aligned(ARCH_DMA_MINALIGN);
+	int ret = 0;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: Could not find device\n", __func__);
+		return -ENOENT;
+	}
+
+	if (part_get_info_by_name(dev_desc, "baseparameter", &part_info) < 0) {
+		printf("Could not find baseparameter partition\n");
+		return -ENOENT;
+	}
+
+	ret = blk_dread(dev_desc, part_info.start, block_num, (void *)baseparameter_buf);
+	if (ret < 0) {
+		printf("read baseparameter failed\n");
+		return ret;
+	}
+
+	memcpy(&base_parameter, baseparameter_buf, sizeof(base_parameter));
+	if (strncasecmp(base_parameter.head_flag, "BASP", 4)) {
+		printf("warning: bad baseparameter\n");
+		memset(&base_parameter, 0, sizeof(base_parameter));
+	}
+	rockchip_display_make_crc32_table();
+
+	return ret;
+}
+
+struct base2_disp_info *rockchip_get_disp_info(int type, int id)
+{
+	struct base2_disp_info *disp_info;
+	int i = 0;
+	u32 crc_val;
+
+	for (i = 0; i < 8; i++) {
+		disp_info = &base_parameter.disp_info[i];
+		if (disp_info->screen_info[0].type == type &&
+		    disp_info->screen_info[0].id == id) {
+			printf("disp info %d, type:%d, id:%d\n", i, type, id);
+			break;
+		}
+	}
+	if (strncasecmp(disp_info->disp_head_flag, "DISP", 4))
+		return NULL;
+
+	crc_val = rockchip_display_crc32c_cal((unsigned char *)disp_info, sizeof(struct base2_disp_info) - 4);
+
+	if (crc_val != disp_info->crc) {
+		printf("error: connector type[%d], id[%d] disp info crc check error\n", type, id);
+		return NULL;
+	}
+
+	return disp_info;
+}
+
 /* check which kind of public phy does connector use */
 static int check_public_use_phy(struct display_state *state)
 {
@@ -1641,6 +1741,7 @@ static int rockchip_display_probe(struct udevice *dev)
 		debug("Failed to found available display route\n");
 		return -ENODEV;
 	}
+	rockchip_get_baseparameter();
 	display_pre_init();
 
 	uc_priv->xsize = DRM_ROCKCHIP_FB_WIDTH;
diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index 5a83695704..7939d2c372 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -143,6 +143,8 @@ struct connector_state {
 	int color_space;
 	unsigned int bpc;
 
+	struct base2_disp_info *disp_info; /* disp_info from baseparameter 2.0 */
+
 	struct {
 		u32 *lut;
 		int size;
@@ -200,6 +202,7 @@ int drm_mode_vrefresh(const struct drm_display_mode *mode);
 int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val);
 bool drm_mode_is_420(const struct drm_display_info *display,
 		     struct drm_display_mode *mode);
+struct base2_disp_info *rockchip_get_disp_info(int type, int id);
 
 void drm_mode_max_resolution_filter(struct hdmi_edid_data *edid_data,
 				    struct vop_rect *max_output);
diff --git a/include/edid.h b/include/edid.h
index acd9113674..ddea22bd6f 100644
--- a/include/edid.h
+++ b/include/edid.h
@@ -737,6 +737,13 @@ enum  base_output_depth {
 	DEPTH_30BIT = 10,
 };
 
+struct base_bcsh_info {
+	unsigned short brightness;
+	unsigned short contrast;
+	unsigned short saturation;
+	unsigned short hue;
+};
+
 struct base_overscan {
 	unsigned int maxvalue;
 	unsigned short leftscale;
@@ -774,6 +781,54 @@ struct base_disp_info {
 	struct base_overscan scan;		/* 12 bytes */
 };
 
+struct base2_cubic_lut_data {
+	u16 size;
+	u16 lred[4913];
+	u16 lgreen[4913];
+	u16 lblue[4913];
+};
+
+struct base2_screen_info {
+	u32 type;
+	u32 id;
+	struct base_drm_display_mode resolution;
+	enum base_output_format  format;
+	enum base_output_depth depthc;
+	u32 feature;
+};
+
+struct base2_gamma_lut_data {
+	u16 size;
+	u16 lred[1024];
+	u16 lgreen[1024];
+	u16 lblue[1024];
+};
+
+struct base2_disp_info {
+	char disp_head_flag[6];
+	struct base2_screen_info screen_info[4];
+	struct base_bcsh_info bcsh_info;
+	struct base_overscan overscan_info;
+	struct base2_gamma_lut_data gamma_lut_data;
+	struct base2_cubic_lut_data cubic_lut_data;
+	u32 reserved[256];
+	u32 crc;
+};
+
+struct base2_disp_header {
+	u32 connector_type;
+	u32 connector_id;
+	u32 offset;
+};
+
+struct base2_info {
+	char head_flag[4];
+	u16 major_version;
+	u16 minor_version;
+	struct base2_disp_header disp_header[8];
+	struct base2_disp_info disp_info[8];
+};
+
 /**
  * Print the EDID info.
  *

commit b098954653820423e9c7d5520b5644ab12c9b3a7
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Mon Apr 12 20:02:08 2021 +0800

    drm/rockchip: vop2: set vp plane mask policy
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: I947969ee52b35bb693b854da5fddcb034111399a

diff --git a/drivers/video/drm/rockchip_vop2.c b/drivers/video/drm/rockchip_vop2.c
index 6b2d8af1cb..6e7f68b2a4 100644
--- a/drivers/video/drm/rockchip_vop2.c
+++ b/drivers/video/drm/rockchip_vop2.c
@@ -512,45 +512,49 @@ enum vop2_video_ports_id {
 	VOP2_VP_MAX,
 };
 
-struct vop2_layer {
-	u8 id;
-	/**
-	 * @win_phys_id: window id of the layer selected.
-	 * Every layer must make sure to select different
-	 * windows of others.
-	 */
-	u8 win_phys_id;
+/* This define must same with kernel win phy id */
+enum vop2_layer_phy_id {
+	ROCKCHIP_VOP2_CLUSTER0 = 0,
+	ROCKCHIP_VOP2_CLUSTER1,
+	ROCKCHIP_VOP2_ESMART0,
+	ROCKCHIP_VOP2_ESMART1,
+	ROCKCHIP_VOP2_SMART0,
+	ROCKCHIP_VOP2_SMART1,
+	ROCKCHIP_VOP2_CLUSTER2,
+	ROCKCHIP_VOP2_CLUSTER3,
+	ROCKCHIP_VOP2_ESMART2,
+	ROCKCHIP_VOP2_ESMART3,
 };
 
-struct vop2_win {
-	u8 id;
-	u8 layer_id;
+struct vop2_win_data {
+	char *name;
 	u8 phys_id;
+	u8 win_sel_port_offset;
+	u8 layer_sel_win_id;
+	u32 reg_offset;
 };
 
 struct vop2_vp_data {
 	u32 feature;
-	u8 vp_use_win_id;
 	u8 pre_scan_max_dly;
 	struct vop_rect max_output;
 };
 
+struct vop2_vp_plane_mask {
+	u8 primary_plane_id; /* use this win to show logo */
+	u8 attached_layers_nr; /* number layers attach to this vp */
+	u8 attached_layers[VOP2_LAYER_MAX]; /* the layers attached to this vp */
+	u32 plane_mask;
+};
+
 struct vop2_data {
 	u32 version;
 	struct vop2_vp_data *vp_data;
-	u8 used_layers[VOP2_MAX_VP];
+	struct vop2_win_data *win_data;
+	struct vop2_vp_plane_mask *plane_mask;
 	u8 nr_vps;
 	u8 nr_layers;
 	u8 nr_mixers;
-	/**
-	 * layer_sel_id: from register LAYER_SEL
-	 *
-	 */
-	u8 layer_sel_id[VOP2_LAYER_MAX];
-	/*
-	 * the win register offset
-	 */
-	u8 win_offset[VOP2_LAYER_MAX];
 };
 
 struct vop2 {
@@ -559,17 +563,31 @@ struct vop2 {
 	void *grf;
 	u32 reg_len;
 	u32 version;
-	u32 win_reg_offset;
 	bool global_init;
 	const struct vop2_data *data;
-	/**
-	 * @nr_wins: active wins attached to the video port
-	 */
-	u8 nr_wins[VOP2_VP_MAX];
+	struct vop2_vp_plane_mask vp_plane_mask[VOP2_VP_MAX];
 };
 
 static struct vop2 *rockchip_vop2;
 
+static u8 vop2_vp_primary_plane_order[VOP2_VP_MAX] = {
+	ROCKCHIP_VOP2_SMART0,
+	ROCKCHIP_VOP2_SMART1,
+	ROCKCHIP_VOP2_ESMART1,
+};
+
+static int vop2_get_primary_plane(struct vop2 *vop2, u32 plane_mask)
+{
+	int i = 0;
+
+	for (i = 0; i < vop2->data->nr_vps; i++) {
+		if (plane_mask & BIT(vop2_vp_primary_plane_order[i]))
+			return vop2_vp_primary_plane_order[i];
+	}
+
+	return ROCKCHIP_VOP2_SMART0;
+}
+
 static inline u16 scl_cal_scale(int src, int dst, int shift)
 {
 	return ((src * 2 - 3) << (shift - 1)) / (dst - 1);
@@ -657,7 +675,7 @@ static int vop2_convert_csc_mode(int csc_mode)
 	}
 }
 
-static __maybe_unused bool is_uv_swap(u32 bus_format, u32 output_mode)
+static bool is_uv_swap(u32 bus_format, u32 output_mode)
 {
 	/*
 	 * FIXME:
@@ -677,21 +695,19 @@ static __maybe_unused bool is_uv_swap(u32 bus_format, u32 output_mode)
 		return false;
 }
 
-static int vop2_get_port_id(struct vop2 *vop2, struct crtc_state *cstate, int win_id)
+static inline bool is_hot_plug_devices(int output_type)
 {
-	int i = 0, last_active_vp_id = 0;
-
-	for (i = 0; i < VOP2_MAX_VP; i++) {
-		if (vop2->data->vp_data[i].vp_use_win_id == win_id && cstate->crtc->vps[i].enable)
-			return i;
-	}
-
-	for (i = 0; i < VOP2_MAX_VP; i++) {
-		if (cstate->crtc->vps[i].enable)
-			last_active_vp_id = i;
+	switch (output_type) {
+	case DRM_MODE_CONNECTOR_HDMIA:
+	case DRM_MODE_CONNECTOR_HDMIB:
+	case DRM_MODE_CONNECTOR_TV:
+	case DRM_MODE_CONNECTOR_DisplayPort:
+	case DRM_MODE_CONNECTOR_VGA:
+	case DRM_MODE_CONNECTOR_Unknown:
+		return true;
+	default:
+		return false;
 	}
-
-	return last_active_vp_id; /* unused win attach to the last port */
 }
 
 static int rockchip_vop2_init_gamma(struct vop2 *vop2,
@@ -762,46 +778,144 @@ static void vop2_post_config(struct display_state *state, struct vop2 *vop2)
 	vop2_writel(vop2, RK3568_VP0_PRE_SCAN_HTIMING + vp_offset, pre_scan_dly);
 }
 
-static void vop2_global_initial(struct vop2 *vop2, struct crtc_state *cstate)
+static void vop2_global_initial(struct vop2 *vop2, struct display_state *state)
 {
-	int i, j, port_mux = 0, total_used_layer = 0, last_active_vp = 0;
+	struct crtc_state *cstate = &state->crtc_state;
+	int i, j, port_mux = 0, total_used_layer = 0;
 	u8 shift = 0;
+	int layer_phy_id = 0;
+	u32 layer_nr = 0;
+	struct vop2_win_data *win_data;
+	struct vop2_vp_plane_mask *plane_mask;
 
 	if (vop2->global_init)
 		return;
 
-	memcpy(vop2->regsbak, vop2->regs, vop2->reg_len);
+	/* OTP must enable at the first time, otherwise mirror layer register is error */
 	if (soc_is_rk3566())
 		vop2_mask_write(vop2, RK3568_SYS_OTP_WIN_EN, EN_MASK,
 				OTP_WIN_EN_SHIFT, 1, false);
+
+	memcpy(vop2->regsbak, vop2->regs, vop2->reg_len);
 	vop2_mask_write(vop2, RK3568_OVL_CTRL, EN_MASK,
 			OVL_PORT_MUX_REG_DONE_IMD_SHIFT, 1, false);
 	vop2_mask_write(vop2, RK3568_DSP_IF_POL, EN_MASK,
 			IF_CTRL_REG_DONE_IMD_SHIFT, 1, false);
+
+	if (cstate->crtc->assign_plane) {/* dts assign plane */
+		u32 plane_mask;
+		int primary_plane_id;
+
+		for (i = 0; i < vop2->data->nr_vps; i++) {
+			plane_mask = cstate->crtc->vps[i].plane_mask;
+			vop2->vp_plane_mask[i].plane_mask = plane_mask;
+			layer_nr = hweight32(plane_mask); /* use bitmap to store plane mask */
+			vop2->vp_plane_mask[i].attached_layers_nr = layer_nr;
+			primary_plane_id = vop2_get_primary_plane(vop2, plane_mask);
+			vop2->vp_plane_mask[i].primary_plane_id =  primary_plane_id;
+			vop2->vp_plane_mask[i].plane_mask = plane_mask;
+
+			/* plane mask[bitmap] convert into layer phy id[enum vop2_layer_phy_id]*/
+			for (j = 0; j < layer_nr; j++) {
+				vop2->vp_plane_mask[i].attached_layers[j] = ffs(plane_mask) - 1;
+				plane_mask &= ~BIT(vop2->vp_plane_mask[i].attached_layers[j]);
+			}
+		}
+	} else {/* need soft assign plane mask */
+		/* find the first unplug devices and set it as main display */
+		int main_vp_index = -1;
+		int active_vp_num = 0;
+
+		for (i = 0; i < vop2->data->nr_vps; i++) {
+			if (cstate->crtc->vps[i].enable)
+				active_vp_num++;
+		}
+		printf("VOP have %d active VP\n", active_vp_num);
+
+		if (soc_is_rk3566() && active_vp_num > 2)
+			printf("ERROR: rk3566 only support 2 display output!!\n");
+		plane_mask = vop2->data->plane_mask;
+		plane_mask += (active_vp_num - 1) * VOP2_VP_MAX;
+
+		for (i = 0; i < vop2->data->nr_vps; i++) {
+			if (!is_hot_plug_devices(cstate->crtc->vps[i].output_type)) {
+				vop2->vp_plane_mask[i] = plane_mask[0]; /* the first store main display plane mask*/
+				main_vp_index = i;
+			}
+		}
+
+		/* if no find unplug devices, use vp0 as main display */
+		if (main_vp_index < 0) {
+			main_vp_index = 0;
+			vop2->vp_plane_mask[0] = plane_mask[0];
+		}
+
+		j = 1; /* plane_mask[0] store main display, so we from plane_mask[1] */
+
+		/* init other display except main display */
+		for (i = 0; i < vop2->data->nr_vps; i++) {
+			if (i == main_vp_index || !cstate->crtc->vps[i].enable) /* main display or no connect devices */
+				continue;
+			vop2->vp_plane_mask[i] = plane_mask[j++];
+		}
+
+		/* store plane mask for vop2_fixup_dts */
+		for (i = 0; i < vop2->data->nr_vps; i++) {
+			layer_nr = vop2->vp_plane_mask[i].attached_layers_nr;
+			for (j = 0; j < layer_nr; j++) {
+				layer_phy_id = vop2->vp_plane_mask[i].attached_layers[j];
+				vop2->vp_plane_mask[i].plane_mask |= BIT(layer_phy_id);
+			}
+		}
+	}
+
+	for (i = 0; i < vop2->data->nr_vps; i++) {
+		printf("vp%d have layer nr:%d[", i, vop2->vp_plane_mask[i].attached_layers_nr);
+		for (j = 0; j < vop2->vp_plane_mask[i].attached_layers_nr; j++)
+			printf("%d ", vop2->vp_plane_mask[i].attached_layers[j]);
+		printf("], primary plane: %d\n", vop2->vp_plane_mask[i].primary_plane_id);
+	}
+
+	shift = 0;
 	/* layer sel win id */
-	for (i = 0; i < vop2->data->nr_layers; i++) {
-		shift = i * 4;
-		vop2_mask_write(vop2, RK3568_OVL_LAYER_SEL, LAYER_SEL_MASK,
-				shift,  vop2->data->layer_sel_id[i], false);
+	for (i = 0; i < vop2->data->nr_vps; i++) {
+		layer_nr = vop2->vp_plane_mask[i].attached_layers_nr;
+		for (j = 0; j < layer_nr; j++) {
+			layer_phy_id = vop2->vp_plane_mask[i].attached_layers[j];
+			win_data = &vop2->data->win_data[layer_phy_id];
+			vop2_mask_write(vop2, RK3568_OVL_LAYER_SEL, LAYER_SEL_MASK,
+					shift, win_data->layer_sel_win_id, false);
+			shift += 4;
+		}
 	}
+
+	/* win sel port */
+	for (i = 0; i < vop2->data->nr_vps; i++) {
+		layer_nr = vop2->vp_plane_mask[i].attached_layers_nr;
+		for (j = 0; j < layer_nr; j++) {
+			if (!cstate->crtc->vps[i].enable)
+				continue;
+			layer_phy_id = vop2->vp_plane_mask[i].attached_layers[j];
+			win_data = &vop2->data->win_data[layer_phy_id];
+			shift = win_data->win_sel_port_offset * 2;
+			vop2_mask_write(vop2, RK3568_OVL_PORT_SEL, LAYER_SEL_PORT_MASK,
+					LAYER_SEL_PORT_SHIFT + shift, i, false);
+		}
+	}
+
 	/**
 	 * port mux config
 	 */
-	for (i = 0; i < vop2->data->nr_vps - 1; i++) {
+	for (i = 0; i < vop2->data->nr_vps; i++) {
 		shift = i * 4;
 		if (cstate->crtc->vps[i].enable) {
-			total_used_layer += vop2->data->used_layers[i];
+			total_used_layer += vop2->vp_plane_mask[i].attached_layers_nr;
 			port_mux = total_used_layer - 1;
 		} else {
 			port_mux = 8;
 		}
 
-		/* if it's last active vp, set all lest of mixer to it */
-		for (j = 0; j < vop2->data->nr_vps; j++) {
-			if (cstate->crtc->vps[j].enable)
-				last_active_vp = j;
-		}
-		if (i == last_active_vp)
+		if (i == vop2->data->nr_vps - 1)
 			port_mux = vop2->data->nr_mixers;
 
 		cstate->crtc->vps[i].bg_ovl_dly = (vop2->data->nr_mixers - port_mux) << 1;
@@ -809,14 +923,6 @@ static void vop2_global_initial(struct vop2 *vop2, struct crtc_state *cstate)
 				PORT_MUX_SHIFT + shift, port_mux, false);
 	}
 
-	/* win sel port */
-	for (i = 0; i < vop2->data->nr_layers; i++) {
-		shift = vop2->data->win_offset[i] * 2;
-		vop2_mask_write(vop2, RK3568_OVL_PORT_SEL, LAYER_SEL_PORT_MASK,
-				LAYER_SEL_PORT_SHIFT + shift,
-				vop2_get_port_id(vop2, cstate, i), false);
-	}
-
 	vop2_writel(vop2, RK3568_AUTO_GATING_CTRL, 0);
 
 	vop2->global_init = true;
@@ -840,11 +946,12 @@ static int vop2_initial(struct vop2 *vop2, struct display_state *state)
 	if (!ret)
 		ret = clk_set_rate(&dclk, mode->clock * 1000);
 	if (IS_ERR_VALUE(ret)) {
-		printf("%s: Failed to set dclk: ret=%d\n", __func__, ret);
+		printf("%s: Failed to set vp%d dclk[%d khz]: ret=%d\n",
+		       __func__, cstate->crtc_id, mode->clock, ret);
 		return ret;
 	}
 
-	vop2_global_initial(vop2, cstate);
+	vop2_global_initial(vop2, state);
 	rockchip_vop2_init_gamma(vop2, state);
 
 	return 0;
@@ -858,7 +965,6 @@ static int rockchip_vop2_preinit(struct display_state *state)
 {
 	struct crtc_state *cstate = &state->crtc_state;
 	const struct vop2_data *vop2_data = cstate->crtc->data;
-	int i = 0;
 
 	if (!rockchip_vop2) {
 		rockchip_vop2 = calloc(1, sizeof(struct vop2));
@@ -873,13 +979,6 @@ static int rockchip_vop2_preinit(struct display_state *state)
 
 		rockchip_vop2->version = vop2_data->version;
 		rockchip_vop2->data = vop2_data;
-		rockchip_vop2->win_reg_offset = vop2_data->vp_data[0].vp_use_win_id;
-
-		/* find the base offset for esmart0 */
-		for (i = 1; i < vop2_data->nr_vps; i++) {
-			if (rockchip_vop2->win_reg_offset > vop2_data->vp_data[i].vp_use_win_id)
-				rockchip_vop2->win_reg_offset = vop2_data->vp_data[i].vp_use_win_id;
-		}
 	}
 
 	cstate->private = rockchip_vop2;
@@ -1160,15 +1259,9 @@ static int rockchip_vop2_set_plane(struct display_state *state)
 	int csc_mode;
 	u32 win_offset;
 	u32 cfg_done = CFG_DONE_EN | BIT(cstate->crtc_id);
-	struct vop2_vp_data *vp_data = &vop2->data->vp_data[cstate->crtc_id];
-
-	if (cstate->crtc_id == 1)
-		win_offset = 0x400; /* port 1 use smart0*/
-	else
-		win_offset = 0; /* port 0 use esmart0*/
-
-	win_offset = (vp_data->vp_use_win_id - vop2->win_reg_offset) * 0x200;
+	u8 primary_plane_id = vop2->vp_plane_mask[cstate->crtc_id].primary_plane_id;
 
+	win_offset = vop2->data->win_data[primary_plane_id].reg_offset;
 	if (crtc_w > cstate->max_output.width) {
 		printf("ERROR: output w[%d] exceeded max width[%d]\n",
 		       crtc_w, cstate->max_output.width);
@@ -1255,37 +1348,167 @@ static int rockchip_vop2_disable(struct display_state *state)
 	return 0;
 }
 
+static int rockchip_vop2_fixup_dts(struct display_state *state, void *blob)
+{
+	struct crtc_state *cstate = &state->crtc_state;
+	struct vop2 *vop2 = cstate->private;
+	ofnode vp_node;
+	struct device_node *port_parent_node = cstate->ports_node;
+	static bool vop_fix_dts;
+	const char *path;
+	u32 plane_mask = 0;
+	int vp_id = 0;
+
+	if (vop_fix_dts)
+		return 0;
+
+	ofnode_for_each_subnode(vp_node, np_to_ofnode(port_parent_node)) {
+		path = vp_node.np->full_name;
+		plane_mask = vop2->vp_plane_mask[vp_id].plane_mask;
+
+		printf("vp%d, plane_mask:0x%x, primary-id:%d\n",
+		       vp_id, plane_mask,
+		       vop2->vp_plane_mask[vp_id].primary_plane_id);
+
+		do_fixup_by_path_u32(blob, path, "rockchip,plane-mask",
+				     plane_mask, 1);
+		do_fixup_by_path_u32(blob, path, "rockchip,primary-plane",
+				     vop2->vp_plane_mask[vp_id].primary_plane_id, 1);
+		vp_id++;
+	}
+
+	vop_fix_dts = true;
+
+	return 0;
+}
+
+static struct vop2_vp_plane_mask rk356x_vp_plane_mask[VOP2_VP_MAX][VOP2_VP_MAX] = {
+	{ /* one display policy */
+		{/* main display */
+			.primary_plane_id = ROCKCHIP_VOP2_SMART0,
+			.attached_layers_nr = 6,
+			.attached_layers = {
+				  ROCKCHIP_VOP2_CLUSTER0, ROCKCHIP_VOP2_ESMART0, ROCKCHIP_VOP2_SMART0,
+				  ROCKCHIP_VOP2_CLUSTER1, ROCKCHIP_VOP2_ESMART1, ROCKCHIP_VOP2_SMART1
+				},
+		},
+		{/* second display */},
+		{/* third  display */},
+		{/* fourth display */},
+	},
+
+	{ /* two display policy */
+		{/* main display */
+			.primary_plane_id = ROCKCHIP_VOP2_SMART0,
+			.attached_layers_nr = 3,
+			.attached_layers = {
+				  ROCKCHIP_VOP2_CLUSTER0, ROCKCHIP_VOP2_ESMART0, ROCKCHIP_VOP2_SMART0
+				},
+		},
+
+		{/* second display */
+			.primary_plane_id = ROCKCHIP_VOP2_SMART1,
+			.attached_layers_nr = 3,
+			.attached_layers = {
+				  ROCKCHIP_VOP2_CLUSTER1, ROCKCHIP_VOP2_ESMART1, ROCKCHIP_VOP2_SMART1
+				},
+		},
+		{/* third  display */},
+		{/* fourth display */},
+	},
+
+	{ /* three display policy */
+		{/* main display */
+			.primary_plane_id = ROCKCHIP_VOP2_SMART0,
+			.attached_layers_nr = 3,
+			.attached_layers = {
+				  ROCKCHIP_VOP2_CLUSTER0, ROCKCHIP_VOP2_ESMART0, ROCKCHIP_VOP2_SMART0
+				},
+		},
+
+		{/* second display */
+			.primary_plane_id = ROCKCHIP_VOP2_SMART1,
+			.attached_layers_nr = 2,
+			.attached_layers = {
+				  ROCKCHIP_VOP2_CLUSTER1, ROCKCHIP_VOP2_SMART1
+				},
+		},
+
+		{/* third  display */
+			.primary_plane_id = ROCKCHIP_VOP2_ESMART1,
+			.attached_layers_nr = 1,
+			.attached_layers = { ROCKCHIP_VOP2_ESMART1 },
+		},
+
+		{/* fourth display */},
+	},
+
+	{/* reserved for four display policy */},
+};
+
+static struct vop2_win_data rk3568_win_data[6] = {
+	{
+		.name = "Cluster0",
+		.phys_id = ROCKCHIP_VOP2_CLUSTER0,
+		.win_sel_port_offset = 0,
+		.layer_sel_win_id = 0,
+		.reg_offset = 0,
+	},
+
+	{
+		.name = "Cluster1",
+		.phys_id = ROCKCHIP_VOP2_CLUSTER1,
+		.win_sel_port_offset = 1,
+		.layer_sel_win_id = 1,
+		.reg_offset = 0x200,
+	},
+
+	{
+		.name = "Esmart0",
+		.phys_id = ROCKCHIP_VOP2_ESMART0,
+		.win_sel_port_offset = 4,
+		.layer_sel_win_id = 2,
+		.reg_offset = 0,
+	},
+
+	{
+		.name = "Esmart1",
+		.phys_id = ROCKCHIP_VOP2_ESMART1,
+		.win_sel_port_offset = 5,
+		.layer_sel_win_id = 6,
+		.reg_offset = 0x200,
+	},
+
+	{
+		.name = "Smart0",
+		.phys_id = ROCKCHIP_VOP2_SMART0,
+		.win_sel_port_offset = 6,
+		.layer_sel_win_id = 3,
+		.reg_offset = 0x400,
+	},
+
+	{
+		.name = "Smart1",
+		.phys_id = ROCKCHIP_VOP2_SMART1,
+		.win_sel_port_offset = 7,
+		.layer_sel_win_id = 7,
+		.reg_offset = 0x600,
+	},
+};
+
 static struct vop2_vp_data rk3568_vp_data[3] = {
-	/**
-	 * vp_use_win_id index
-	 *
-	 * Cluster0-Win0: 0
-	 * Cluster1-Win0: 1
-	 * Esmart0-Win0:  2
-	 * Esmart1-Win0:  3
-	 * Smart0-Win0:   4
-	 * Smart1-Win0:   5
-	 *
-	 * for rk356x
-	 *   Esmart0-Win0[2]->vp0
-	 *   Smart0-Win0[4] ->vp1
-	 *   Esmart1-Win0[3]->vp2
-	 */
 	{
 		.feature = VOP_FEATURE_OUTPUT_10BIT,
-		.vp_use_win_id = 2, /* vp_use_win_id index */
 		.pre_scan_max_dly = 42,
 		.max_output = {4096, 2304},
 	},
 	{
 		.feature = 0,
-		.vp_use_win_id = 4,
 		.pre_scan_max_dly = 40,
 		.max_output = {2048, 1536},
 	},
 	{
 		.feature = 0,
-		.vp_use_win_id = 3,
 		.pre_scan_max_dly = 40,
 		.max_output = {1920, 1080},
 	},
@@ -1294,33 +1517,8 @@ static struct vop2_vp_data rk3568_vp_data[3] = {
 const struct vop2_data rk3568_vop = {
 	.nr_vps = 3,
 	.vp_data = rk3568_vp_data,
-	.used_layers = {1, 1, 4},
-	/**
-	 * layer select win id: for register VOP2_LAYER_SEL
-	 *
-	 * Cluster0-Win0: 0
-	 * Cluster1-Win0: 1
-	 * Esmart0-Win0:  2
-	 * Smart0-Win0:   3
-	 * reserved:      4
-	 * reserved:      5
-	 * Esmart1-Win0:  6
-	 * Smart1-Win0:   7
-	 */
-	.layer_sel_id = {2, 3, 6, 7, 0, 1},
-	/**
-	 * win offset for register VOP2_PORT_SEL and win register
-	 *
-	 * Cluster0-Win0: 0
-	 * Cluster1-Win0: 1
-	 * reserved:      2
-	 * reserved:      3
-	 * Esmart0-Win0:  4
-	 * Smart0-Win0:   5
-	 * Esmart1-Win0:  6
-	 * Smart1-Win0:   7
-	 */
-	.win_offset = {0, 1, 4, 5, 6, 7},
+	.win_data = rk3568_win_data,
+	.plane_mask = rk356x_vp_plane_mask[0],
 	.nr_layers = 6,
 	.nr_mixers = 5,
 };
@@ -1332,4 +1530,5 @@ const struct rockchip_crtc_funcs rockchip_vop2_funcs = {
 	.set_plane = rockchip_vop2_set_plane,
 	.enable = rockchip_vop2_enable,
 	.disable = rockchip_vop2_disable,
+	.fixup_dts = rockchip_vop2_fixup_dts,
 };

commit 6eff7620979a06c8c7afdc87d3f6aae1b0814cd0
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Mon Apr 12 17:35:44 2021 +0800

    video/drm: display: to get plane mask and vp status for vop2
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: Ife45a694435ab26b9ad395d420adb7774a5ba530

diff --git a/drivers/video/drm/rockchip_crtc.h b/drivers/video/drm/rockchip_crtc.h
index 2abf5d5340..7f0a342a65 100644
--- a/drivers/video/drm/rockchip_crtc.h
+++ b/drivers/video/drm/rockchip_crtc.h
@@ -11,8 +11,9 @@
 
 struct rockchip_vp {
 	bool enable;
-	int output_type;
 	u8 bg_ovl_dly;
+	int output_type;
+	u32 plane_mask;
 };
 
 struct rockchip_crtc {
@@ -22,6 +23,7 @@ struct rockchip_crtc {
 	struct rockchip_vp vps[4];
 	bool hdmi_hpd : 1;
 	bool active : 1;
+	bool assign_plane : 1;
 };
 
 struct rockchip_crtc_funcs {
diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 1f55152a68..da1d369e2a 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -1339,6 +1339,21 @@ static struct udevice *rockchip_of_find_connector(ofnode endpoint)
 	return dev;
 }
 
+static bool rockchip_get_display_path_status(ofnode endpoint)
+{
+	ofnode ep;
+	uint phandle;
+
+	if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle))
+		return false;
+
+	ep = ofnode_get_by_phandle(phandle);
+	if (!ofnode_valid(ep) || !ofnode_is_available(ep))
+		return false;
+
+	return true;
+}
+
 static struct rockchip_phy *rockchip_of_find_phy(struct udevice *dev)
 {
 	struct udevice *phy_dev;
@@ -1566,10 +1581,36 @@ static int rockchip_display_probe(struct udevice *dev)
 		s->crtc_state.dev = crtc_dev;
 		s->crtc_state.crtc = crtc;
 		s->crtc_state.crtc_id = get_crtc_id(np_to_ofnode(ep_node));
-		s->crtc_state.crtc->vps[s->crtc_state.crtc_id].enable = true;
 		s->node = node;
-		if (is_ports_node)
+
+		if (is_ports_node) { /* only vop2 will get into here */
+			ofnode vp_node = np_to_ofnode(port_node);
+			static bool get_plane_mask_from_dts;
+
 			s->crtc_state.ports_node = port_parent_node;
+			if (!get_plane_mask_from_dts) {
+				ofnode vp_sub_node;
+				int vp_id = 0;
+				bool vp_enable = false;
+
+				ofnode_for_each_subnode(vp_node, np_to_ofnode(port_parent_node)) {
+					vp_id = ofnode_read_u32_default(vp_node, "reg", 0);
+					ret = ofnode_read_u32_default(vp_node, "rockchip,plane-mask", 0);
+					if (ret) {
+						s->crtc_state.crtc->vps[vp_id].plane_mask = ret;
+						s->crtc_state.crtc->assign_plane |= true;
+						printf("get vp%d plane mask:0x%x from dts\n", vp_id, ret);
+					}
+
+					/* To check current vp status */
+					vp_enable = false;
+					ofnode_for_each_subnode(vp_sub_node, vp_node)
+						vp_enable |= rockchip_get_display_path_status(vp_sub_node);
+					s->crtc_state.crtc->vps[vp_id].enable = vp_enable;
+				}
+				get_plane_mask_from_dts = true;
+			}
+		}
 
 		if (bridge)
 			bridge->state = s;
diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index 8029f5e7a0..5a83695704 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -87,7 +87,7 @@ struct crtc_state {
 	struct rockchip_crtc *crtc;
 	void *private;
 	ofnode node;
-	struct device_node *ports_node;
+	struct device_node *ports_node; /* if (ports_node) it's vop2; */
 	int crtc_id;
 
 	int format;

commit 58c17f51712894bc29a2fd5db7868e3a928ecf55
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Mon Apr 12 15:25:50 2021 +0800

    video/drm: display: add pre_init for connecter
    
    we need to know connecter type before set out plane policy for vop2
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: I90f89894089ba35fd7755ee4d7584c217d71b052

diff --git a/drivers/video/drm/analogix_dp.c b/drivers/video/drm/analogix_dp.c
index 46b080ed0a..aa5bd20773 100644
--- a/drivers/video/drm/analogix_dp.c
+++ b/drivers/video/drm/analogix_dp.c
@@ -730,12 +730,20 @@ retry:
 	return retval;
 }
 
+static int analogix_dp_connector_pre_init(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+
+	conn_state->type = DRM_MODE_CONNECTOR_eDP;
+
+	return 0;
+}
+
 static int analogix_dp_connector_init(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
 	struct analogix_dp_device *dp = dev_get_priv(conn_state->dev);
 
-	conn_state->type = DRM_MODE_CONNECTOR_eDP;
 	conn_state->output_if |= VOP_OUTPUT_IF_eDP0;
 	conn_state->output_mode = ROCKCHIP_OUT_MODE_AAAA;
 	conn_state->color_space = V4L2_COLORSPACE_DEFAULT;
@@ -840,6 +848,7 @@ static int analogix_dp_connector_detect(struct display_state *state)
 }
 
 static const struct rockchip_connector_funcs analogix_dp_connector_funcs = {
+	.pre_init = analogix_dp_connector_pre_init,
 	.init = analogix_dp_connector_init,
 	.get_edid = analogix_dp_connector_get_edid,
 	.enable = analogix_dp_connector_enable,
diff --git a/drivers/video/drm/dw_hdmi.c b/drivers/video/drm/dw_hdmi.c
index c2e07fdfc9..c334d58ba5 100755
--- a/drivers/video/drm/dw_hdmi.c
+++ b/drivers/video/drm/dw_hdmi.c
@@ -2261,6 +2261,15 @@ void dw_hdmi_audio_disable(struct dw_hdmi *hdmi)
 	hdmi_set_cts_n(hdmi, hdmi->audio_cts, 0);
 }
 
+int rockchip_dw_hdmi_pre_init(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+
+	conn_state->type = DRM_MODE_CONNECTOR_HDMIA;
+
+	return 0;
+}
+
 int rockchip_dw_hdmi_init(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
@@ -2339,7 +2348,6 @@ int rockchip_dw_hdmi_init(struct display_state *state)
 					"ddc-i2c-scl-low-time-ns", 4916);
 
 	dw_hdmi_i2c_init(hdmi);
-	conn_state->type = DRM_MODE_CONNECTOR_HDMIA;
 	conn_state->output_if |= VOP_OUTPUT_IF_HDMI0;
 	conn_state->output_mode = ROCKCHIP_OUT_MODE_AAAA;
 
diff --git a/drivers/video/drm/dw_mipi_dsi.c b/drivers/video/drm/dw_mipi_dsi.c
index 29a6e24344..d3e2ff04f1 100644
--- a/drivers/video/drm/dw_mipi_dsi.c
+++ b/drivers/video/drm/dw_mipi_dsi.c
@@ -1083,6 +1083,15 @@ static void dw_mipi_dsi_clear_err(struct dw_mipi_dsi *dsi)
 	dsi_write(dsi, DSI_INT_MSK1, 0);
 }
 
+static int dw_mipi_dsi_connector_pre_init(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+
+	conn_state->type = DRM_MODE_CONNECTOR_DSI;
+
+	return 0;
+}
+
 static int dw_mipi_dsi_connector_init(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
@@ -1092,7 +1101,6 @@ static int dw_mipi_dsi_connector_init(struct display_state *state)
 
 	conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
 	conn_state->color_space = V4L2_COLORSPACE_DEFAULT;
-	conn_state->type = DRM_MODE_CONNECTOR_DSI;
 	conn_state->output_if |=
 		dsi->id ? VOP_OUTPUT_IF_MIPI1 : VOP_OUTPUT_IF_MIPI0;
 
@@ -1315,6 +1323,7 @@ static int dw_mipi_dsi_connector_disable(struct display_state *state)
 }
 
 static const struct rockchip_connector_funcs dw_mipi_dsi_connector_funcs = {
+	.pre_init = dw_mipi_dsi_connector_pre_init,
 	.init = dw_mipi_dsi_connector_init,
 	.prepare = dw_mipi_dsi_connector_prepare,
 	.unprepare = dw_mipi_dsi_connector_unprepare,
diff --git a/drivers/video/drm/inno_hdmi.c b/drivers/video/drm/inno_hdmi.c
index c4f20649ad..f8bc0c9168 100644
--- a/drivers/video/drm/inno_hdmi.c
+++ b/drivers/video/drm/inno_hdmi.c
@@ -620,6 +620,15 @@ static int inno_hdmi_i2c_xfer(struct ddc_adapter *adap,
 	return ret;
 }
 
+int rockchip_inno_hdmi_pre_init(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+
+	conn_state->type = DRM_MODE_CONNECTOR_HDMIA;
+
+	return 0;
+}
+
 static int rockchip_inno_hdmi_init(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
@@ -800,6 +809,7 @@ static int rockchip_inno_hdmi_bind(struct udevice *dev)
 }
 
 const struct rockchip_connector_funcs rockchip_inno_hdmi_funcs = {
+	.pre_init = rockchip_inno_hdmi_pre_init,
 	.init = rockchip_inno_hdmi_init,
 	.deinit = rockchip_inno_hdmi_deinit,
 	.prepare = rockchip_inno_hdmi_prepare,
diff --git a/drivers/video/drm/rockchip_connector.h b/drivers/video/drm/rockchip_connector.h
index 642238b1a7..331e86a5a0 100644
--- a/drivers/video/drm/rockchip_connector.h
+++ b/drivers/video/drm/rockchip_connector.h
@@ -14,6 +14,12 @@ struct rockchip_connector {
 };
 
 struct rockchip_connector_funcs {
+	/*
+	 * pre init connector, prepare some parameter out_if, this will be
+	 * used by rockchip_display.c and vop
+	 */
+	int (*pre_init)(struct display_state *state);
+
 	/*
 	 * init connector, prepare resource to ensure
 	 * detect and get_timing can works
diff --git a/drivers/video/drm/rockchip_crtc.h b/drivers/video/drm/rockchip_crtc.h
index b4f540c99e..2abf5d5340 100644
--- a/drivers/video/drm/rockchip_crtc.h
+++ b/drivers/video/drm/rockchip_crtc.h
@@ -11,6 +11,7 @@
 
 struct rockchip_vp {
 	bool enable;
+	int output_type;
 	u8 bg_ovl_dly;
 };
 
diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 4ea33b5a11..1f55152a68 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -517,6 +517,28 @@ static int display_get_timing(struct display_state *state)
 	return -ENODEV;
 }
 
+static int display_pre_init(void)
+{
+	struct display_state *state;
+	int ret = 0;
+
+	list_for_each_entry(state, &rockchip_display_list, head) {
+		struct connector_state *conn_state = &state->conn_state;
+		const struct rockchip_connector *conn = conn_state->connector;
+		const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
+		struct crtc_state *crtc_state = &state->crtc_state;
+		struct rockchip_crtc *crtc = crtc_state->crtc;
+
+		if (conn_funcs->pre_init) {
+			ret = conn_funcs->pre_init(state);
+			if (ret)
+				printf("pre init conn error\n");
+		}
+		crtc->vps[crtc_state->crtc_id].output_type = conn_state->type;
+	}
+	return ret;
+}
+
 static int display_init(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
@@ -1578,6 +1600,7 @@ static int rockchip_display_probe(struct udevice *dev)
 		debug("Failed to found available display route\n");
 		return -ENODEV;
 	}
+	display_pre_init();
 
 	uc_priv->xsize = DRM_ROCKCHIP_FB_WIDTH;
 	uc_priv->ysize = DRM_ROCKCHIP_FB_HEIGHT;
diff --git a/drivers/video/drm/rockchip_drm_tve.c b/drivers/video/drm/rockchip_drm_tve.c
index 7c68ca7931..6ce8e8f7c0 100644
--- a/drivers/video/drm/rockchip_drm_tve.c
+++ b/drivers/video/drm/rockchip_drm_tve.c
@@ -205,6 +205,15 @@ static u8 rk_get_vdac_value(void)
 	return value;
 }
 
+static int rockchip_drm_tve_pre_init(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+
+	conn_state->type = DRM_MODE_CONNECTOR_TV;
+
+	return 0;
+}
+
 static int rockchip_drm_tve_init(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
@@ -212,7 +221,6 @@ static int rockchip_drm_tve_init(struct display_state *state)
 	int dac_value, getvdac;
 	fdt_addr_t addr;
 
-	conn_state->type = DRM_MODE_CONNECTOR_TV;
 	tve_s.grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 	if (tve_s.grf <= 0) {
 		printf("%s:Get syscon grf failed (ret=%p)\n",
@@ -551,6 +559,7 @@ static int rockchip_drm_tve_probe(struct udevice *dev)
 }
 
 const struct rockchip_connector_funcs rockchip_drm_tve_funcs = {
+	.pre_init = rockchip_drm_tve_pre_init,
 	.init = rockchip_drm_tve_init,
 	.deinit = rockchip_drm_tve_deinit,
 	.prepare = rockchip_drm_tve_prepare,
diff --git a/drivers/video/drm/rockchip_dw_hdmi.c b/drivers/video/drm/rockchip_dw_hdmi.c
index 0de1c8a7ed..f4e3e5684e 100644
--- a/drivers/video/drm/rockchip_dw_hdmi.c
+++ b/drivers/video/drm/rockchip_dw_hdmi.c
@@ -445,6 +445,7 @@ static const struct dw_hdmi_phy_ops inno_dw_hdmi_phy_ops = {
 };
 
 static const struct rockchip_connector_funcs rockchip_dw_hdmi_funcs = {
+	.pre_init = rockchip_dw_hdmi_pre_init,
 	.init = rockchip_dw_hdmi_init,
 	.deinit = rockchip_dw_hdmi_deinit,
 	.prepare = rockchip_dw_hdmi_prepare,
diff --git a/drivers/video/drm/rockchip_dw_hdmi.h b/drivers/video/drm/rockchip_dw_hdmi.h
index fb1ecc1b9a..aa1201baf0 100644
--- a/drivers/video/drm/rockchip_dw_hdmi.h
+++ b/drivers/video/drm/rockchip_dw_hdmi.h
@@ -10,6 +10,7 @@
  * Rockchip connector callbacks.
  * If you want to know the details, please refer to rockchip_connector.h
  */
+int rockchip_dw_hdmi_pre_init(struct display_state *state);
 int rockchip_dw_hdmi_init(struct display_state *state);
 void rockchip_dw_hdmi_deinit(struct display_state *state);
 int rockchip_dw_hdmi_prepare(struct display_state *state);
diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index 2d44420149..9707faec18 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -108,6 +108,15 @@ static inline struct rockchip_lvds *state_to_lvds(struct display_state *state)
 	return dev_get_priv(conn_state->dev);
 }
 
+static int rockchip_lvds_connector_pre_init(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+
+	conn_state->type = DRM_MODE_CONNECTOR_LVDS;
+
+	return 0;
+}
+
 static int rockchip_lvds_connector_init(struct display_state *state)
 {
 	struct rockchip_lvds *lvds = state_to_lvds(state);
@@ -138,7 +147,6 @@ static int rockchip_lvds_connector_init(struct display_state *state)
 		break;
 	}
 
-	conn_state->type = DRM_MODE_CONNECTOR_LVDS;
 	conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
 
 	if ((lvds->format == LVDS_10BIT_MODE_FORMAT_1) ||
@@ -185,6 +193,7 @@ static int rockchip_lvds_connector_disable(struct display_state *state)
 }
 
 static const struct rockchip_connector_funcs rockchip_lvds_connector_funcs = {
+	.pre_init = rockchip_lvds_connector_pre_init,
 	.init = rockchip_lvds_connector_init,
 	.enable = rockchip_lvds_connector_enable,
 	.disable = rockchip_lvds_connector_disable,
diff --git a/drivers/video/drm/rockchip_rgb.c b/drivers/video/drm/rockchip_rgb.c
index 5f63ab2203..60015035d3 100644
--- a/drivers/video/drm/rockchip_rgb.c
+++ b/drivers/video/drm/rockchip_rgb.c
@@ -102,6 +102,15 @@ static void rockchip_rgb_connector_unprepare(struct display_state *state)
 	pinctrl_select_state(rgb->dev, "sleep");
 }
 
+static int rockchip_rgb_connector_pre_init(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+
+	conn_state->type = DRM_MODE_CONNECTOR_LVDS;
+
+	return 0;
+}
+
 static int rockchip_rgb_connector_init(struct display_state *state)
 {
 	struct rockchip_rgb *rgb = state_to_rgb(state);
@@ -109,7 +118,6 @@ static int rockchip_rgb_connector_init(struct display_state *state)
 
 	rgb->phy = conn_state->phy;
 
-	conn_state->type = DRM_MODE_CONNECTOR_LVDS;
 	conn_state->color_space = V4L2_COLORSPACE_DEFAULT;
 
 	switch (conn_state->bus_format) {
@@ -140,6 +148,7 @@ static int rockchip_rgb_connector_init(struct display_state *state)
 }
 
 static const struct rockchip_connector_funcs rockchip_rgb_connector_funcs = {
+	.pre_init = rockchip_rgb_connector_pre_init,
 	.init = rockchip_rgb_connector_init,
 	.prepare = rockchip_rgb_connector_prepare,
 	.unprepare = rockchip_rgb_connector_unprepare,

commit 9c409da6993cc630ce6e1bed1cd806d9ffa5ef9b
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Sep 14 21:37:36 2020 +0800

    mtd: spinand: Support Etron devices
    
    Support EM73C044VCF-OH
    
    Change-Id: I1195c15d3260c309076e55d65f6964bd43b6b1e4
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/Kconfig b/drivers/mtd/nand/spi/Kconfig
index b53b78c1a0..64cda1b82c 100644
--- a/drivers/mtd/nand/spi/Kconfig
+++ b/drivers/mtd/nand/spi/Kconfig
@@ -83,4 +83,10 @@ config SPI_NAND_BIWIN
 	help
 	  Add support for various BIWIN SPI Nand flash chips
 
+config SPI_NAND_ETRON
+	default y
+	bool "ETRON SPI flash support"
+	help
+	  Add support for various ETRON SPI Nand flash chips
+
 endif
diff --git a/drivers/mtd/nand/spi/Makefile b/drivers/mtd/nand/spi/Makefile
index a8ca970920..08b035d669 100644
--- a/drivers/mtd/nand/spi/Makefile
+++ b/drivers/mtd/nand/spi/Makefile
@@ -13,4 +13,5 @@ obj-$(CONFIG_SPI_NAND_HYF) += hyf.o
 obj-$(CONFIG_SPI_NAND_FMSH) += fmsh.o
 obj-$(CONFIG_SPI_NAND_FORESEE) += foresee.o
 obj-$(CONFIG_SPI_NAND_BIWIN) += biwin.o
+obj-$(CONFIG_SPI_NAND_ETRON) += etron.o
 obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index c6bceff2c8..f15f254e55 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -851,6 +851,9 @@ static const struct spinand_manufacturer *spinand_manufacturers[] = {
 #ifdef CONFIG_SPI_NAND_BIWIN
 	&biwin_spinand_manufacturer,
 #endif
+#ifdef CONFIG_SPI_NAND_ETRON
+	&etron_spinand_manufacturer,
+#endif
 };
 
 static int spinand_manufacturer_detect(struct spinand_device *spinand)
diff --git a/drivers/mtd/nand/spi/etron.c b/drivers/mtd/nand/spi/etron.c
new file mode 100644
index 0000000000..4fdf5953ef
--- /dev/null
+++ b/drivers/mtd/nand/spi/etron.c
@@ -0,0 +1,129 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd
+ *
+ * Authors:
+ *	Dingqiang Lin <jon.lin@rock-chips.com>
+ */
+
+#ifndef __UBOOT__
+#include <linux/device.h>
+#include <linux/kernel.h>
+#endif
+#include <linux/mtd/spinand.h>
+
+#define SPINAND_MFR_ETRON		0xD5
+
+static SPINAND_OP_VARIANTS(read_cache_variants,
+		SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
+
+static SPINAND_OP_VARIANTS(write_cache_variants,
+		SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
+		SPINAND_PROG_LOAD(true, 0, NULL, 0));
+
+static SPINAND_OP_VARIANTS(update_cache_variants,
+		SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
+		SPINAND_PROG_LOAD(false, 0, NULL, 0));
+
+static int em73c044vcf_oh_ooblayout_ecc(struct mtd_info *mtd, int section,
+					struct mtd_oob_region *region)
+{
+	if (section > 3)
+		return -ERANGE;
+
+	region->offset = (16 * section) + 8;
+	region->length = 8;
+
+	return 0;
+}
+
+static int em73c044vcf_oh_ooblayout_free(struct mtd_info *mtd, int section,
+					 struct mtd_oob_region *region)
+{
+	if (section > 3)
+		return -ERANGE;
+
+	region->offset = (16 * section) + 2;
+	region->length = 6;
+
+	return 0;
+}
+
+static const struct mtd_ooblayout_ops em73c044vcf_oh_ooblayout = {
+	.ecc = em73c044vcf_oh_ooblayout_ecc,
+	.rfree = em73c044vcf_oh_ooblayout_free,
+};
+
+static int em73c044vcf_oh_ecc_get_status(struct spinand_device *spinand,
+					 u8 status)
+{
+	struct nand_device *nand = spinand_to_nand(spinand);
+
+	switch (status & STATUS_ECC_MASK) {
+	case STATUS_ECC_NO_BITFLIPS:
+		return 0;
+
+	case STATUS_ECC_UNCOR_ERROR:
+		return -EBADMSG;
+
+	case STATUS_ECC_HAS_BITFLIPS:
+		return 1;
+
+	default:
+		return nand->eccreq.strength;
+	}
+
+	return -EINVAL;
+}
+
+static const struct spinand_info etron_spinand_table[] = {
+	SPINAND_INFO("EM73C044VCF-0H", 0x36,
+		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
+		     NAND_ECCREQ(4, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&em73c044vcf_oh_ooblayout,
+				     em73c044vcf_oh_ecc_get_status)),
+};
+
+/**
+ * etron_spinand_detect - initialize device related part in spinand_device
+ * struct if it is a Etron device.
+ * @spinand: SPI NAND device structure
+ */
+static int etron_spinand_detect(struct spinand_device *spinand)
+{
+	u8 *id = spinand->id.data;
+	int ret;
+
+	/*
+	 * Etron SPI NAND read ID need a dummy byte,
+	 * so the first byte in raw_id is dummy.
+	 */
+	if (id[1] != SPINAND_MFR_ETRON)
+		return 0;
+
+	ret = spinand_match_and_init(spinand, etron_spinand_table,
+				     ARRAY_SIZE(etron_spinand_table), id[2]);
+	if (ret)
+		return ret;
+
+	return 1;
+}
+
+static const struct spinand_manufacturer_ops etron_spinand_manuf_ops = {
+	.detect = etron_spinand_detect,
+};
+
+const struct spinand_manufacturer etron_spinand_manufacturer = {
+	.id = SPINAND_MFR_ETRON,
+	.name = "Etron",
+	.ops = &etron_spinand_manuf_ops,
+};
diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
index 043c5d5cc7..a588c108dd 100644
--- a/include/linux/mtd/spinand.h
+++ b/include/linux/mtd/spinand.h
@@ -213,6 +213,7 @@ extern const struct spinand_manufacturer hyf_spinand_manufacturer;
 extern const struct spinand_manufacturer fmsh_spinand_manufacturer;
 extern const struct spinand_manufacturer foresee_spinand_manufacturer;
 extern const struct spinand_manufacturer biwin_spinand_manufacturer;
+extern const struct spinand_manufacturer etron_spinand_manufacturer;
 
 /**
  * struct spinand_op_variants - SPI NAND operation variants

commit 1b78f06b9713c7ffee3c27a2e78febf284857530
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 29 09:51:49 2021 +0800

    common: bootm: support validate LZMA compression type
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ic00d28241d497ec4c325367989b36c51ca804d51

diff --git a/common/bootm.c b/common/bootm.c
index 92f0b9f2f8..1a7a69a442 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -396,6 +396,11 @@ int bootm_parse_comp(const unsigned char *hdr)
 	if ((hdr[0] == 'B') && (hdr[1] == 'Z') && (hdr[2] == 'h'))
 		return IH_COMP_BZIP2;
 #endif
+#if defined(CONFIG_LZMA)
+	if (lzma_is_valid(hdr))
+		return IH_COMP_LZMA;
+#endif
+
 	return IH_COMP_NONE;
 }
 

commit ed988b00d8e7c1d92542f12392da281039bd63e6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 29 09:51:28 2021 +0800

    lib: lzma: add lzma_is_valid()
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I88271fc055bf196c9879aca5fd285f28325aa16d

diff --git a/lib/lzma/LzmaTools.c b/lib/lzma/LzmaTools.c
index f88629b74f..5e2baba336 100644
--- a/lib/lzma/LzmaTools.c
+++ b/lib/lzma/LzmaTools.c
@@ -37,6 +37,16 @@
 static void *SzAlloc(void *p, size_t size) { return malloc(size); }
 static void SzFree(void *p, void *address) { free(address); }
 
+int lzma_is_valid(const unsigned char *buf)
+{
+	if (buf[0] != 0x5d || buf[1] || buf[2])
+		return 0;
+	if (buf[12] && buf[12] != 0xff)
+		return 0;
+
+	return 1;
+}
+
 int lzmaBuffToBuffDecompress (unsigned char *outStream, SizeT *uncompressedSize,
                   unsigned char *inStream,  SizeT  length)
 {
diff --git a/lib/lzma/LzmaTools.h b/lib/lzma/LzmaTools.h
index f8bdd1ffda..a88bfc29b5 100644
--- a/lib/lzma/LzmaTools.h
+++ b/lib/lzma/LzmaTools.h
@@ -14,6 +14,7 @@
 
 #include <lzma/LzmaTypes.h>
 
+extern int lzma_is_valid(const unsigned char *buf);
 extern int lzmaBuffToBuffDecompress (unsigned char *outStream, SizeT *uncompressedSize,
 			      unsigned char *inStream,  SizeT  length);
 #endif

commit 2b69c33a0a391a63c905086881bbfffa73240609
Author: Weiwen Chen <cww@rock-chips.com>
Date:   Wed Apr 28 20:55:30 2021 +0800

    configs: rv1126-spi-nor-tiny: remove PHY_ROCKCHIP_NANENG_USB2
    
    Signed-off-by: Weiwen Chen <cww@rock-chips.com>
    Change-Id: I27c7763c4edbf7cfdf6940b42639411ce7d1e4c2

diff --git a/configs/rv1126-spi-nor-tiny_defconfig b/configs/rv1126-spi-nor-tiny_defconfig
index c652de2c13..cc05601589 100644
--- a/configs/rv1126-spi-nor-tiny_defconfig
+++ b/configs/rv1126-spi-nor-tiny_defconfig
@@ -12,9 +12,9 @@ CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 # CONFIG_ROCKCHIP_SMCCC is not set
 CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y
 CONFIG_ROCKCHIP_UART_MUX_SEL_M=2
+# CONFIG_GICV2 is not set
 CONFIG_LOADER_INI="RV1126MINIALL_SPI_NOR_TINY.ini"
 CONFIG_TRUST_INI="RV1126TOS_SPI_NOR_TINY.ini"
-# CONFIG_GICV2 is not set
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_TARGET_EVB_RV1126=y
@@ -29,9 +29,9 @@ CONFIG_FIT=y
 CONFIG_FIT_IMAGE_POST_PROCESS=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
+# CONFIG_SPL_SYS_DCACHE_OFF is not set
 CONFIG_SPL_FIT_IMAGE_KB=256
 CONFIG_SPL_FIT_IMAGE_MULTIPLE=1
-# CONFIG_SPL_SYS_DCACHE_OFF is not set
 CONFIG_BOOTDELAY=1
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
@@ -79,8 +79,6 @@ CONFIG_SYSCON=y
 CONFIG_SPL_SYSCON=y
 CONFIG_CLK=y
 CONFIG_SPL_CLK=y
-# CONFIG_ROCKCHIP_RSA is not set
-# CONFIG_SPL_ROCKCHIP_RSA is not set
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y
@@ -104,7 +102,6 @@ CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SPI_FLASH_MTD=y
 CONFIG_PHY=y
-CONFIG_PHY_ROCKCHIP_NANENG_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_PMIC=y
 # CONFIG_SPL_PMIC_CHILDREN is not set

commit 60f07e7540c53a0d50f67498a89d6baaeb135e6a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 26 14:32:39 2021 +0800

    rockchip: fix missing "usbfwupdate" to kernel cmdline
    
    We move sd/usbfwupdate flag from IDB to Android BCB from RK356x.
    
    The desc->if_type is to be IF_TYPE_USB at late boot sequence, which
    results in missing "usbfwupdate" to kernel cmdline. So let's record
    update state in env "rk_fwupdate" for late use.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I5c42f2dc232f37e7f9502f424b903ac542d12ebb

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index ca134d3f36..598d5ba22d 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -319,6 +319,8 @@ static void env_fixup(void)
 
 static void cmdline_handle(void)
 {
+	struct blk_desc *dev_desc;
+
 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
 	struct tag *t;
 
@@ -331,6 +333,16 @@ static void cmdline_handle(void)
 			env_update("bootargs", "fuse.programmed=0");
 	}
 #endif
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc)
+		return;
+
+	if (env_get_yesno("rk_fwupdate")) {
+		if (dev_desc->if_type == IF_TYPE_MMC && dev_desc->devnum == 1)
+			env_update("bootargs", "sdfwupdate");
+		else if (dev_desc->if_type == IF_TYPE_USB && dev_desc->devnum == 0)
+			env_update("bootargs", "usbfwupdate");
+	}
 }
 
 int board_late_init(void)
diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index 875e53d0e6..7f2eaad0df 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -42,15 +42,8 @@ static int misc_require_recovery(u32 bcb_offset)
 		recovery = 0;
 	} else {
 		recovery = !strcmp(bmsg->command, "boot-recovery");
-		if ((dev_desc->if_type == IF_TYPE_MMC && dev_desc->devnum == 1) ||
-		    (dev_desc->if_type == IF_TYPE_USB && dev_desc->devnum == 0)) {
-			if (!strcmp(bmsg->recovery, "recovery\n--rk_fwupdate\n")) {
-				if (dev_desc->if_type == IF_TYPE_MMC)
-					env_update("bootargs", "sdfwupdate");
-				else if (dev_desc->if_type == IF_TYPE_USB)
-					env_update("bootargs", "usbfwupdate");
-			}
-		}
+		if (!strcmp(bmsg->recovery, "recovery\n--rk_fwupdate\n"))
+			env_set("rk_fwupdate", "y"); /* set for late use */
 	}
 
 	free(bmsg);

commit ef891bb5be10b1a18a890b8e11d6adb533863aeb
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Sun Apr 25 11:11:38 2021 +0800

    drm/rockchip: vop: fix rk3399 csc r2y ceo error
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: Id2ffb391a39396afad37c509b87e66b6b5b0af59

diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index e3174fd82c..768d313376 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -255,7 +255,7 @@ static const uint32_t vop_csc_r2y_bt601[] = {
 };
 
 static const uint32_t vop_csc_r2y_bt601_12_235[] = {
-	0x02040107, 0xff680064, 0x01c2fed6, 0xffb7fe87,
+	0x02040107, 0xff680064, 0x01c2fed6, 0xfe8701c2,
 	0x0000ffb7, 0x00010200, 0x00080200, 0x00080200,
 };
 

commit 9f58c6d736273f790739eeef148117f4d11dfd67
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Apr 28 10:20:00 2021 +0800

    edid: Fix a typo
    
    Fixes: d8123c4406c7 ("common: edid: fix the mode flag for interlaced")
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
    Change-Id: I71a0b14d05b27fb228e41340d0567cc40233a93d

diff --git a/common/edid.c b/common/edid.c
index c8cbb13a96..d210f54fb3 100644
--- a/common/edid.c
+++ b/common/edid.c
@@ -1582,7 +1582,7 @@ static void decode_mode(u8 *buf, struct drm_display_mode *mode)
 	mode->flags |= EDID_DETAILED_TIMING_FLAG_VSYNC_POLARITY(*t) ?
 		DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
 
-	if (EDID_DETAILED_TIMING_FLAG_INTERLEAVED(*t))
+	if (EDID_DETAILED_TIMING_FLAG_INTERLACED(*t))
 		mode->flags |= DRM_MODE_FLAG_INTERLACE;
 
 	debug("Detailed mode clock %u kHz, %d mm x %d mm, flags[%x]\n"

commit a58651ec74065d7c5342b95feb0a0292dfe204d9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 27 15:07:01 2021 +0800

    configs: rk3399: update uboot.img size as 2MB * 2
    
    u-boot.bin is so large that it overs than 1MB.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I5d568d43411f12f9fb00fda8921e029507e7815e

diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
index 4a624c94ed..6195f9d5c8 100644
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -6,6 +6,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x10000
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_RK3399=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_UBOOT_SIZE_KB=2048
+CONFIG_UBOOT_NUM=2
 CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y

commit bc3a22a726e44b59195ac9b6435bcddaa0936be9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 27 11:53:47 2021 +0800

    make.sh: remove image and build configure to Kconfig option
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Id691230526c6c7ebaf368d7a8198ed2531954ab8

diff --git a/make.sh b/make.sh
index b6d2d452ad..9317b140bf 100755
--- a/make.sh
+++ b/make.sh
@@ -10,51 +10,6 @@ JOB=`sed -n "N;/processor/p" /proc/cpuinfo|wc -l`
 SUPPORT_LIST=`ls configs/*[r,p][x,v,k][0-9][0-9]*_defconfig`
 CMD_ARGS=$1
 
-# @LOADER: map to $RKCHIP_LOADER for loader ini
-# @TRUST:  map to $RKCHIP_TRUST for trust ini
-# @LABEL:  map to $RKCHIP_LEBEL for verbose message
-# @-:      default state/value
-CHIP_TYPE_FIXUP_TABLE=(
-	# CONFIG_XXX                         RKCHIP         LOADER       TRUST         LABEL
-	"CONFIG_ROCKCHIP_RK3368              RK3368H         -            -             -"
-	"CONFIG_ROCKCHIP_RV1108              RV110X          -            -             -"
-	"CONFIG_ROCKCHIP_PX3SE               PX3SE           -            -             -"
-	"CONFIG_ROCKCHIP_RK3126              RK3126          -            -             -"
-	"CONFIG_ROCKCHIP_RK3326              RK3326          -            -             -"
-	"CONFIG_ROCKCHIP_RK3128X             RK3128X         -            -             -"
-	"CONFIG_ROCKCHIP_PX5                 PX5             -            -             -"
-	"CONFIG_ROCKCHIP_RK3399PRO           RK3399PRO       -            -             -"
-	"CONFIG_ROCKCHIP_RK1806              RK1806          -            -             -"
-	"CONFIG_TARGET_GVA_RK3229            RK322X          RK322XAT     -             -"
-	"CONFIG_COPROCESSOR_RK1808           RKNPU-LION      RKNPULION    RKNPULION     -"
-)
-
-# <*> Fixup rsa/sha pack mode for platforms
-#     RSA: RK3308/PX30/RK3326/RK1808 use RSA-PKCS1 V2.1, it's pack magic is "3", and others use default configure.
-#     SHA: RK3368 use rk big endian SHA256, it's pack magic is "2", and others use default configure.
-# <*> Fixup images size pack for platforms
-# <*> Fixup verbose message about AARCH32
-#
-# @RSA:     rsa mode
-# @SHA:     sha mode
-# @A64-KB:  arm64 platform image size: [uboot,trust]
-# @A64-NUM: arm64 platform image number of total: [uboot,trust]
-# @A32-KB:  arm32 platform image size: [uboot,trust]
-# @A32-NUM: arm32 platform image number of total: [uboot,trust]
-# @LOADER:  map to $RKCHIP_LOADER for loader ini
-# @TRUST:   map to $RKCHIP_TRUST for trust ini
-# @-:       default state/value
-CHIP_CFG_FIXUP_TABLE=(
-	# CONFIG_XXX              RSA     SHA     A64-KB      A64-NUM     A32-KB       A32-NUM      LOAER        TRUST
-	"CONFIG_ROCKCHIP_RK3368    -       2       -,-          -,-        -,-          -,-           -           -"
-	"CONFIG_ROCKCHIP_RK3036    -       -       512,512      1,1        -,-          -,-           -           -"
-	"CONFIG_ROCKCHIP_PX30      3       -       -,-          -,-        -,-          -,-           -           -"
-	"CONFIG_ROCKCHIP_RK3326    3       -       -,-          -,-        -,-          -,-           AARCH32     -"
-	"CONFIG_ROCKCHIP_RK3308    3       -       1024,1024    2,2        512,512      2,2           -           AARCH32"
-	"CONFIG_ROCKCHIP_RK1808    3       -       1024,1024    2,2        -,-          -,-           -           -"
-	"CONFIG_ROCKCHIP_RV1126    3       -       -,-          -,-        -,-          -,-           -           -"
-)
-
 ########################################### User can modify #############################################
 # User's rkbin tool relative path
 RKBIN_TOOLS=../rkbin/tools
@@ -73,11 +28,10 @@ TOOLCHAIN_ARM64=../prebuilts/gcc/linux-x86/aarch64/gcc-linaro-6.3.1-2017.05-x86_
 
 ########################################### User not touch #############################################
 # Declare global INI file searching index name for every chip, update in select_chip_info()
-RKCHIP="-"
-RKCHIP_LABEL="-"
-RKCHIP_LOADER="-"
-RKCHIP_TRUST="-"
-
+RKCHIP=
+RKCHIP_LABEL=
+RKCHIP_LOADER=
+RKCHIP_TRUST=
 INI_TRUST=
 INI_LOADER=
 
@@ -341,25 +295,10 @@ function select_chip_info()
 
 	# default
 	RKCHIP=${RKCHIP##*_}
-	# fixup ?
-	for item in "${CHIP_TYPE_FIXUP_TABLE[@]}"
-	do
-		CONFIG_ROCKCHIP_XXX=`echo ${item} | awk '{ print $1 }'`
-		if grep  -q "^${CONFIG_ROCKCHIP_XXX}=y" .config ; then
-			RKCHIP=`echo ${item} | awk '{ print $2 }'`
-			RKCHIP_LOADER=`echo ${item} | awk '{ print $3 }'`
-			RKCHIP_TRUST=`echo  ${item} | awk '{ print $4 }'`
-			RKCHIP_LABEL=`echo  ${item} | awk '{ print $5 }'`
-		fi
-	done
-
-	if [ "${RKCHIP_LOADER}" == "-" ]; then
-		RKCHIP_LOADER=${RKCHIP}
-	fi
-	if [ "${RKCHIP_TRUST}" == "-" ]; then
-		RKCHIP_TRUST=${RKCHIP}
-	fi
-	if [ "${RKCHIP_LABEL}" == "-" ]; then
+	RKCHIP_LOADER=${RKCHIP}
+	RKCHIP_TRUST=${RKCHIP}
+	RKCHIP_LABEL=`sed -n "/CONFIG_CHIP_NAME=/s/CONFIG_CHIP_NAME=//p" .config |tr -d '\r' | tr -d '"'`
+	if [ -z "${RKCHIP_LABEL}" ]; then
 		RKCHIP_LABEL=${RKCHIP}
 	fi
 }
@@ -367,67 +306,28 @@ function select_chip_info()
 # Priority: default < CHIP_CFG_FIXUP_TABLE() < make.sh args
 function fixup_platform_configure()
 {
-	U_KB="-" U_NUM="-" T_KB="-" T_NUM="-"  SHA="-" RSA="-"
-
-	for item in "${CHIP_CFG_FIXUP_TABLE[@]}"
-	do
-		config_xxx=`echo ${item} | awk '{ print $1 }'`
-		if grep  -q "^${config_xxx}=y" .config ; then
-			# <*> Fixup rsa/sha pack mode for platforms
-			RSA=`echo ${item} | awk '{ print $2 }'`
-			SHA=`echo ${item} | awk '{ print $3 }'`
-
-			# <*> Fixup images size pack for platforms, and ini file
-			if grep -q '^CONFIG_ARM64=y' .config ; then
-				U_KB=`echo  ${item} | awk '{ print $4 }' | awk -F "," '{ print $1 }'`
-				T_KB=`echo  ${item} | awk '{ print $4 }' | awk -F "," '{ print $2 }'`
-				U_NUM=`echo ${item} | awk '{ print $5 }' | awk -F "," '{ print $1 }'`
-				T_NUM=`echo ${item} | awk '{ print $5 }' | awk -F "," '{ print $2 }'`
-			else
-				U_KB=`echo  ${item} | awk '{ print $6 }' | awk -F "," '{ print $1 }'`
-				T_KB=`echo  ${item} | awk '{ print $6 }' | awk -F "," '{ print $2 }'`
-				U_NUM=`echo ${item} | awk '{ print $7 }' | awk -F "," '{ print $1 }'`
-				T_NUM=`echo ${item} | awk '{ print $7 }' | awk -F "," '{ print $2 }'`
-				# AArch32
-				if grep -q '^CONFIG_ARM64_BOOT_AARCH32=y' .config ; then
-					PADDING=`echo ${item} | awk '{ print $8 }'`
-					if [ "${PADDING}" != "-" ]; then
-						RKCHIP_LOADER=${RKCHIP_LOADER}${PADDING}
-					fi
-					PADDING=`echo  ${item} | awk '{ print $9 }'`
-					if [ "${PADDING}" != "-" ]; then
-						RKCHIP_TRUST=${RKCHIP_TRUST}${PADDING}
-					fi
-					RKCHIP_LABEL=${RKCHIP_LABEL}"AARCH32"
-				fi
-			fi
-		fi
-	done
-
-	if [ "${SHA}" != "-" ]; then
-		PLAT_SHA="--sha ${SHA}"
-	fi
-	if [ "${RSA}" != "-" ]; then
-		PLAT_RSA="--rsa ${RSA}"
-	fi
-	if [ "${U_KB}" != "-" ]; then
-		PLAT_UBOOT_SIZE="--size ${U_KB} ${U_NUM}"
-	fi
-	if [ "${T_KB}" != "-" ]; then
-		PLAT_TRUST_SIZE="--size ${T_KB} ${T_NUM}"
-	fi
-
-	# args
+	U_KB=`sed -n "/CONFIG_UBOOT_SIZE_KB=/s/CONFIG_UBOOT_SIZE_KB=//p" .config |tr -d '\r' | tr -d '"'`
+	U_NUM=`sed -n "/CONFIG_UBOOT_NUM=/s/CONFIG_UBOOT_NUM=//p" .config |tr -d '\r' | tr -d '"'`
+	T_KB=`sed -n "/CONFIG_TRUST_SIZE_KB=/s/CONFIG_TRUST_SIZE_KB=//p" .config |tr -d '\r' | tr -d '"'`
+	T_NUM=`sed -n "/CONFIG_TRUST_NUM=/s/CONFIG_TRUST_NUM=//p" .config |tr -d '\r' | tr -d '"'`
+	SHA=`sed -n "/CONFIG_TRUST_SHA_MODE=/s/CONFIG_TRUST_SHA_MODE=//p" .config |tr -d '\r' | tr -d '"'`
+	RSA=`sed -n "/CONFIG_TRUST_RSA_MODE=/s/CONFIG_TRUST_RSA_MODE=//p" .config |tr -d '\r' | tr -d '"'`
+
+	# .config
+	PLAT_UBOOT_SIZE="--size ${U_KB} ${U_NUM}"
+	PLAT_TRUST_SIZE="--size ${T_KB} ${T_NUM}"
+	PLAT_SHA="--sha ${SHA}"
+	PLAT_RSA="--rsa ${RSA}"
+
+	# ./make.sh args
 	if [ ! -z "${ARG_UBOOT_SIZE}" ]; then
 		PLAT_UBOOT_SIZE=${ARG_UBOOT_SIZE}
 	fi
-
 	if [ ! -z "${ARG_TRUST_SIZE}" ]; then
 		PLAT_TRUST_SIZE=${ARG_TRUST_SIZE}
 	fi
 }
 
-# Priority: default < CHIP_TYPE_FIXUP_TABLE() < defconfig < make.sh args
 function select_ini_file()
 {
 	# default

commit c6d55e4aee768f6043b619084ad70ff58d3dc8ba
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 27 11:36:48 2021 +0800

    rockchip: Kconfig: add image and build configure option
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Id934d536605b6b34b5639f97384a0814f613318d

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 75df015050..f3ae7e19d5 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -798,12 +798,40 @@ config ROCKCHIP_REBOOT_TEST
 	help
 	  It's a reboot stress test before kernel stages.
 
+config GICV2
+	bool "ARM GICv2"
+
+config GICV3
+	bool "ARM GICv3"
+
+config ROCKCHIP_EMMC_IOMUX
+	bool "ROCKCHIP EMMC IOMUX"
+	default n
+	help
+	  This enable U-Boot to config EMMC iomux.
+
+config ROCKCHIP_NAND_IOMUX
+	bool "ROCKCHIP NAND IOMUX"
+	default n
+	help
+	  This enable U-Boot to config NAND iomux.
+
+config ROCKCHIP_SFC_IOMUX
+	bool "ROCKCHIP SFC IOMUX"
+	default n
+	help
+	  This enable U-Boot to config SFC iomux.
+
 config BASE_DEFCONFIG
 	string "Base defconfig of config fragment"
 	default ""
 	help
 	  Indicate the base defconfig of config fragment.
 
+config CHIP_NAME
+	string "Chip label name"
+	default ""
+
 config LOADER_INI
 	string "Name of Loader ini file in rkbin repository"
 	default ""
@@ -816,29 +844,35 @@ config TRUST_INI
 	help
 	  The ini file is used to pack trust image.
 
-config GICV2
-	bool "ARM GICv2"
+config UBOOT_SIZE_KB
+	int "Per u-boot.bin Image size, unit: KB"
+	default 1024
 
-config GICV3
-	bool "ARM GICv3"
+config UBOOT_NUM
+	int "Number of u-boot.bin image being packed into trust.img"
+	default 4
 
-config ROCKCHIP_EMMC_IOMUX
-	bool "ROCKCHIP EMMC IOMUX"
-	default n
-	help
-	  This enable U-Boot to config EMMC iomux.
+config TRUST_SIZE_KB
+	int "Per trust Image size, unit: KB"
+	default 2048
 
-config ROCKCHIP_NAND_IOMUX
-	bool "ROCKCHIP NAND IOMUX"
-	default n
+config TRUST_NUM
+	int "Number of trust image being packed into trust.img"
+	default 2
+
+config TRUST_RSA_MODE
+	int "RSA mode of trust.img on ARM64"
+	default 2
 	help
-	  This enable U-Boot to config NAND iomux.
+	  The RSA mode for tools to pack, the mode id can be:
+	  0: none; 1: RSA-1024; 2: RSA-2048; 3: RSA-2048-pss.
 
-config ROCKCHIP_SFC_IOMUX
-	bool "ROCKCHIP SFC IOMUX"
-	default n
+config TRUST_SHA_MODE
+	int "SHA mode of trust.img on ARM64"
+	default 3
 	help
-	  This enable U-Boot to config SFC iomux.
+	  The SHA mode for tools to pack, the mode id can be:
+	  0: none; 1: sha1; 2: sha256 RK big endian; 3: sha256 little endian.
 
 source "arch/arm/mach-rockchip/px30/Kconfig"
 source "arch/arm/mach-rockchip/rk3036/Kconfig"

commit 25f7c6d4dfa402078c1b28c1c428eebf1e1cb876
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 27 10:24:39 2021 +0800

    configs: rockchip: add image and build configure
    
    They are coming from make.sh
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I45ddc82241a9b0cad2633dc888566cbb407bd0b8

diff --git a/configs/evb-aarch32-rk3308_defconfig b/configs/evb-aarch32-rk3308_defconfig
index a2731ee1e7..e435dc9c52 100644
--- a/configs/evb-aarch32-rk3308_defconfig
+++ b/configs/evb-aarch32-rk3308_defconfig
@@ -6,6 +6,11 @@ CONFIG_ARM64_BOOT_AARCH32=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 # CONFIG_USING_KERNEL_DTB is not set
+CONFIG_TRUST_INI="RK3308AARCH32TRUST.ini"
+CONFIG_UBOOT_SIZE_KB=512
+CONFIG_UBOOT_NUM=2
+CONFIG_TRUST_SIZE_KB=512
+CONFIG_TRUST_RSA_MODE=3
 CONFIG_TARGET_EVB_RK3308=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3308-evb"
 CONFIG_DEBUG_UART=y
diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 6e6efd8c8d..bfeee9cfc5 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -7,6 +7,7 @@ CONFIG_ROCKCHIP_PX30=y
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_TRUST_RSA_MODE=3
 CONFIG_TARGET_EVB_PX30=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL_STACK_R_ADDR=0x600000
diff --git a/configs/evb-px3se_defconfig b/configs/evb-px3se_defconfig
index 08472d60e2..c30deaaaec 100644
--- a/configs/evb-px3se_defconfig
+++ b/configs/evb-px3se_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x1000
 CONFIG_ROCKCHIP_RK3128=y
 CONFIG_ROCKCHIP_PX3SE=y
+CONFIG_CHIP_NAME="PX3SE"
 CONFIG_DEFAULT_DEVICE_TREE="px3se-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_ANDROID_BOOT_IMAGE=y
diff --git a/configs/evb-px5_defconfig b/configs/evb-px5_defconfig
index e51424d59a..585cb875b2 100644
--- a/configs/evb-px5_defconfig
+++ b/configs/evb-px5_defconfig
@@ -7,6 +7,8 @@ CONFIG_TPL_MAX_SIZE=32768
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_RK3368=y
 CONFIG_ROCKCHIP_PX5=y
+CONFIG_TRUST_SHA_MODE=2
+CONFIG_CHIP_NAME="PX5"
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
diff --git a/configs/evb-rk3036_defconfig b/configs/evb-rk3036_defconfig
index 1d825229b8..5c7db13d0d 100644
--- a/configs/evb-rk3036_defconfig
+++ b/configs/evb-rk3036_defconfig
@@ -9,6 +9,10 @@ CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
 CONFIG_TPL_STACK=0x10081fff
 # CONFIG_SPL_ROCKCHIP_BACK_TO_BROM is not set
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_UBOOT_SIZE_KB=512
+CONFIG_UBOOT_NUM=1
+CONFIG_TRUST_SIZE_KB=512
+CONFIG_TRUST_NUM=1
 CONFIG_TARGET_EVB_RK3036=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL_STACK_R_ADDR=0x60600000
diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index 63db45000a..5672b0deab 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -9,6 +9,9 @@ CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 # CONFIG_USING_KERNEL_DTB is not set
 CONFIG_ROCKCHIP_UART_MUX_SEL_M=1
+CONFIG_UBOOT_NUM=2
+CONFIG_TRUST_SIZE_KB=1024
+CONFIG_TRUST_RSA_MODE=3
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_TARGET_EVB_RK3308=y
 CONFIG_SPL_STACK_R_ADDR=0xc00000
diff --git a/configs/evb-rk3326_defconfig b/configs/evb-rk3326_defconfig
index a5ddcae779..a3bef0a85e 100644
--- a/configs/evb-rk3326_defconfig
+++ b/configs/evb-rk3326_defconfig
@@ -8,6 +8,8 @@ CONFIG_ROCKCHIP_RK3326=y
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_TRUST_RSA_MODE=3
+CONFIG_CHIP_NAME="RK3326"
 CONFIG_TARGET_EVB_PX30=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL_STACK_R_ADDR=0x600000
diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig
index 261db72650..d0d7576224 100644
--- a/configs/evb-rv1108_defconfig
+++ b/configs/evb-rv1108_defconfig
@@ -8,6 +8,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RV1108=y
 CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
 # CONFIG_USING_KERNEL_DTB is not set
+CONFIG_CHIP_NAME="RV110X"
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_TARGET_EVB_RV1108=y
diff --git a/configs/geekbox_defconfig b/configs/geekbox_defconfig
index bc3e179849..df596d9e6e 100644
--- a/configs/geekbox_defconfig
+++ b/configs/geekbox_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x1000
 CONFIG_ROCKCHIP_RK3368=y
+CONFIG_TRUST_SHA_MODE=2
 CONFIG_TARGET_GEEKBOX=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3368-geekbox"
 CONFIG_DEBUG_UART=y
diff --git a/configs/gva-rk3229_defconfig b/configs/gva-rk3229_defconfig
index 191a5a41d9..1080408aac 100644
--- a/configs/gva-rk3229_defconfig
+++ b/configs/gva-rk3229_defconfig
@@ -10,6 +10,8 @@ CONFIG_ROCKCHIP_RK322X=y
 CONFIG_TPL_STACK=0x10088000
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_LOADER_INI="RK322XATMINIALL.ini"
+CONFIG_CHIP_NAME="RK322X"
 CONFIG_TARGET_GVA_RK3229=y
 CONFIG_SPL_STACK_R_ADDR=0x60600000
 CONFIG_DEFAULT_DEVICE_TREE="rk3229-gva"
diff --git a/configs/kylin-rk3036_defconfig b/configs/kylin-rk3036_defconfig
index 27e5990440..38ea5b5edd 100644
--- a/configs/kylin-rk3036_defconfig
+++ b/configs/kylin-rk3036_defconfig
@@ -9,6 +9,10 @@ CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
 CONFIG_TPL_STACK=0x10081fff
 # CONFIG_SPL_ROCKCHIP_BACK_TO_BROM is not set
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_UBOOT_SIZE_KB=512
+CONFIG_UBOOT_NUM=1
+CONFIG_TRUST_SIZE_KB=512
+CONFIG_TRUST_NUM=1
 CONFIG_TARGET_KYLIN_RK3036=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL_STACK_R_ADDR=0x60600000
diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig
index befdfbca9f..44604a75a8 100644
--- a/configs/lion-rk3368_defconfig
+++ b/configs/lion-rk3368_defconfig
@@ -6,6 +6,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TPL_MAX_SIZE=32768
 CONFIG_ROCKCHIP_RK3368=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_TRUST_SHA_MODE=2
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
diff --git a/configs/px30_defconfig b/configs/px30_defconfig
index be9d612c1f..ac5f58e948 100644
--- a/configs/px30_defconfig
+++ b/configs/px30_defconfig
@@ -7,6 +7,7 @@ CONFIG_ROCKCHIP_PX30=y
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_TRUST_RSA_MODE=3
 CONFIG_TARGET_EVB_PX30=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL_STACK_R_ADDR=0x600000
diff --git a/configs/rk1806_defconfig b/configs/rk1806_defconfig
index 17f88d13e3..c253032686 100644
--- a/configs/rk1806_defconfig
+++ b/configs/rk1806_defconfig
@@ -8,6 +8,10 @@ CONFIG_ROCKCHIP_RK1808=y
 CONFIG_ROCKCHIP_RK1806=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_UBOOT_NUM=2
+CONFIG_TRUST_SIZE_KB=1024
+CONFIG_TRUST_RSA_MODE=3
+CONFIG_CHIP_NAME="RK1806"
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL_STACK_R_ADDR=0x3fe0000
diff --git a/configs/rk1808_defconfig b/configs/rk1808_defconfig
index c328e9d0f1..9584ec601d 100644
--- a/configs/rk1808_defconfig
+++ b/configs/rk1808_defconfig
@@ -7,6 +7,9 @@ CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_RK1808=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_UBOOT_NUM=2
+CONFIG_TRUST_SIZE_KB=1024
+CONFIG_TRUST_RSA_MODE=3
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL_STACK_R_ADDR=0x3fe0000
diff --git a/configs/rk3036_defconfig b/configs/rk3036_defconfig
index 28ea56a8c8..d3b19e88c7 100644
--- a/configs/rk3036_defconfig
+++ b/configs/rk3036_defconfig
@@ -10,6 +10,10 @@ CONFIG_TPL_STACK=0x10081fff
 # CONFIG_SPL_ROCKCHIP_BACK_TO_BROM is not set
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_UBOOT_SIZE_KB=512
+CONFIG_UBOOT_NUM=1
+CONFIG_TRUST_SIZE_KB=512
+CONFIG_TRUST_NUM=1
 CONFIG_TARGET_EVB_RK3036=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL_STACK_R_ADDR=0x60600000
diff --git a/configs/rk3126_defconfig b/configs/rk3126_defconfig
index 40f5d97068..bcb27debe9 100644
--- a/configs/rk3126_defconfig
+++ b/configs/rk3126_defconfig
@@ -4,6 +4,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x38000
 CONFIG_ROCKCHIP_RK3128=y
 CONFIG_ROCKCHIP_RK3126=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_CHIP_NAME="RK3126"
 CONFIG_DEFAULT_DEVICE_TREE="rk3126-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
diff --git a/configs/rk3128x_defconfig b/configs/rk3128x_defconfig
index 885a717b2c..ada3b40acc 100644
--- a/configs/rk3128x_defconfig
+++ b/configs/rk3128x_defconfig
@@ -12,6 +12,7 @@ CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
 CONFIG_TPL_STACK=0x10088000
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_CHIP_NAME="RK3128X"
 CONFIG_TARGET_EVB_RK3229=y
 CONFIG_SPL_STACK_R_ADDR=0x60600000
 CONFIG_DEFAULT_DEVICE_TREE="rk3229-evb"
diff --git a/configs/rk3308-aarch32_defconfig b/configs/rk3308-aarch32_defconfig
index 905fc81038..3eefe52fa9 100644
--- a/configs/rk3308-aarch32_defconfig
+++ b/configs/rk3308-aarch32_defconfig
@@ -5,6 +5,11 @@ CONFIG_ROCKCHIP_RK3308=y
 CONFIG_ARM64_BOOT_AARCH32=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_TRUST_INI="RK3308AARCH32TRUST.ini"
+CONFIG_UBOOT_SIZE_KB=512
+CONFIG_UBOOT_NUM=2
+CONFIG_TRUST_SIZE_KB=512
+CONFIG_TRUST_RSA_MODE=3
 CONFIG_TARGET_EVB_RK3308=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3308-evb"
 CONFIG_DEBUG_UART=y
diff --git a/configs/rk3308_defconfig b/configs/rk3308_defconfig
index 6efa533bd2..2f83fa67de 100644
--- a/configs/rk3308_defconfig
+++ b/configs/rk3308_defconfig
@@ -8,6 +8,9 @@ CONFIG_ROCKCHIP_RK3308=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_ROCKCHIP_UART_MUX_SEL_M=1
+CONFIG_UBOOT_NUM=2
+CONFIG_TRUST_SIZE_KB=1024
+CONFIG_TRUST_RSA_MODE=3
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_TARGET_EVB_RK3308=y
 CONFIG_SPL_STACK_R_ADDR=0xc00000
diff --git a/configs/rk3326-aarch32_defconfig b/configs/rk3326-aarch32_defconfig
index 27ab846aab..e6bae29ce1 100644
--- a/configs/rk3326-aarch32_defconfig
+++ b/configs/rk3326-aarch32_defconfig
@@ -6,6 +6,9 @@ CONFIG_ROCKCHIP_RK3326=y
 CONFIG_ARM64_BOOT_AARCH32=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_LOADER_INI="RK3326AARCH32MINIALL.ini"
+CONFIG_TRUST_RSA_MODE=3
+CONFIG_CHIP_NAME="RK3326"
 CONFIG_TARGET_EVB_PX30=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3326-evb"
 CONFIG_DEBUG_UART=y
diff --git a/configs/rk3326_defconfig b/configs/rk3326_defconfig
index dff37ac65d..05323e6541 100644
--- a/configs/rk3326_defconfig
+++ b/configs/rk3326_defconfig
@@ -8,6 +8,8 @@ CONFIG_ROCKCHIP_RK3326=y
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_TRUST_RSA_MODE=3
+CONFIG_CHIP_NAME="RK3326"
 CONFIG_TARGET_EVB_PX30=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL_STACK_R_ADDR=0x600000
diff --git a/configs/rk3368_defconfig b/configs/rk3368_defconfig
index 3a7e4acf34..1278434771 100644
--- a/configs/rk3368_defconfig
+++ b/configs/rk3368_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_ROCKCHIP_RK3368=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_TRUST_SHA_MODE=2
 CONFIG_TARGET_EVB_RK3368=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3368-evb"
 CONFIG_DEBUG_UART=y
diff --git a/configs/rk3399pro_defconfig b/configs/rk3399pro_defconfig
index 6cd6beb338..da8c4715e1 100644
--- a/configs/rk3399pro_defconfig
+++ b/configs/rk3399pro_defconfig
@@ -7,6 +7,7 @@ CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_RK3399=y
 CONFIG_ROCKCHIP_RK3399PRO=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_CHIP_NAME="RK3399PRO"
 CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
diff --git a/configs/rknpu-lion_defconfig b/configs/rknpu-lion_defconfig
index 17eaf6c0a1..e065d417b1 100644
--- a/configs/rknpu-lion_defconfig
+++ b/configs/rknpu-lion_defconfig
@@ -4,6 +4,11 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK1808=y
 CONFIG_COPROCESSOR_RK1808=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_LOADER_INI="RKNPULIONMINIALL.ini"
+CONFIG_TRUST_INI="RKNPULIONTRUST.ini"
+CONFIG_UBOOT_NUM=2
+CONFIG_TRUST_SIZE_KB=1024
+CONFIG_TRUST_RSA_MODE=3
 CONFIG_TARGET_EVB_RK1808=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3399pro-npu-evb"
 CONFIG_DEBUG_UART=y
diff --git a/configs/sheep-rk3368_defconfig b/configs/sheep-rk3368_defconfig
index 30f790fa30..49a21cfb05 100644
--- a/configs/sheep-rk3368_defconfig
+++ b/configs/sheep-rk3368_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x1000
 CONFIG_ROCKCHIP_RK3368=y
+CONFIG_TRUST_SHA_MODE=2
 CONFIG_TARGET_SHEEP=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3368-sheep"
 CONFIG_DEBUG_UART=y

commit 1a7e81424ee175af3b9e449d74a1379bc78b46f5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 27 10:02:41 2021 +0800

    configs: rockchip: sync files
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I8fbe3392fe792d3636fe6c23b57651f3aafc02ec

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index ee82936ac4..6e6efd8c8d 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -6,7 +6,6 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_PX30=y
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
-CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_TARGET_EVB_PX30=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
@@ -108,11 +107,11 @@ CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_OHCI_GENERIC=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_DWC2_OTG=y
-CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
 CONFIG_USB_GADGET_VENDOR_NUM=0x2207
 CONFIG_USB_GADGET_PRODUCT_NUM=0x330d
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
diff --git a/configs/evb-px3se_defconfig b/configs/evb-px3se_defconfig
index 5932370e9c..08472d60e2 100644
--- a/configs/evb-px3se_defconfig
+++ b/configs/evb-px3se_defconfig
@@ -3,7 +3,6 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x1000
 CONFIG_ROCKCHIP_RK3128=y
 CONFIG_ROCKCHIP_PX3SE=y
-CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_DEFAULT_DEVICE_TREE="px3se-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_ANDROID_BOOT_IMAGE=y
@@ -50,10 +49,10 @@ CONFIG_USB_OHCI_GENERIC=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_DWC2_OTG=y
-CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
 CONFIG_USB_GADGET_VENDOR_NUM=0x2207
 CONFIG_USB_GADGET_PRODUCT_NUM=0x310c
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_ERRNO_STR=y
diff --git a/configs/evb-px5_defconfig b/configs/evb-px5_defconfig
index 61fc789c64..e51424d59a 100644
--- a/configs/evb-px5_defconfig
+++ b/configs/evb-px5_defconfig
@@ -4,23 +4,22 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TPL_MAX_SIZE=32768
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_RK3368=y
 CONFIG_ROCKCHIP_PX5=y
-CONFIG_TARGET_EVB_PX5=y
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
-CONFIG_PANIC_HANG=y
+CONFIG_TARGET_EVB_PX5=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
-CONFIG_SPL_STACK_R_ADDR=0x600000
 CONFIG_DEFAULT_DEVICE_TREE="rk3368-px5-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_ANDROID_BOOT_IMAGE=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_BOOTSTAGE=y
 CONFIG_SPL_BOOTSTAGE=y
 CONFIG_BOOTSTAGE_REPORT=y
@@ -32,7 +31,6 @@ CONFIG_SPL_BOOTROM_SUPPORT=y
 # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
 CONFIG_TPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_STACK_R=y
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x4000
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_TPL=y
@@ -70,6 +68,6 @@ CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_SYSRESET=y
 CONFIG_USE_TINY_PRINTF=y
-CONFIG_TPL_TINY_MEMSET=y
 CONFIG_SPL_TINY_MEMSET=y
+CONFIG_TPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
diff --git a/configs/evb-rk3036_defconfig b/configs/evb-rk3036_defconfig
index c02fbebd9b..1d825229b8 100644
--- a/configs/evb-rk3036_defconfig
+++ b/configs/evb-rk3036_defconfig
@@ -3,13 +3,12 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x800
-CONFIG_ROCKCHIP_RK3036=y
 CONFIG_TPL_TEXT_BASE=0x10081000
+CONFIG_ROCKCHIP_RK3036=y
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
 CONFIG_TPL_STACK=0x10081fff
 # CONFIG_SPL_ROCKCHIP_BACK_TO_BROM is not set
-CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
-CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_TARGET_EVB_RK3036=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL_STACK_R_ADDR=0x60600000
@@ -19,7 +18,6 @@ CONFIG_TPL_SYS_MALLOC_F_LEN=0x0
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
@@ -30,7 +28,6 @@ CONFIG_SPL_OPTEE_SUPPORT=y
 CONFIG_SPL_OPTEE=y
 CONFIG_TPL_TINY_FRAMEWORK=y
 CONFIG_TPL_SERIAL_SUPPORT=y
-CONFIG_FASTBOOT_BUF_ADDR=0x60800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
@@ -81,8 +78,8 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x2207
 CONFIG_USB_GADGET_PRODUCT_NUM=0x310a
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_CMD_DHRYSTONE=y
 CONFIG_USE_TINY_PRINTF=y
+CONFIG_CMD_DHRYSTONE=y
 CONFIG_ERRNO_STR=y
 CONFIG_AVB_LIBAVB=y
 CONFIG_AVB_LIBAVB_AB=y
diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index ae25f7f4b9..63db45000a 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -6,9 +6,9 @@ CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_RK3308=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
-CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 # CONFIG_USING_KERNEL_DTB is not set
+CONFIG_ROCKCHIP_UART_MUX_SEL_M=1
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_TARGET_EVB_RK3308=y
 CONFIG_SPL_STACK_R_ADDR=0xc00000
@@ -83,7 +83,6 @@ CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF0C0000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_ROCKCHIP_UART_MUX_SEL_M=1
 CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
@@ -92,11 +91,11 @@ CONFIG_USB_EHCI_GENERIC=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_DWC2_OTG=y
-CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
 CONFIG_USB_GADGET_VENDOR_NUM=0x2207
 CONFIG_USB_GADGET_PRODUCT_NUM=0x330d
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_LZ4=y
diff --git a/configs/evb-rk3326_defconfig b/configs/evb-rk3326_defconfig
index 6888a0f881..a5ddcae779 100644
--- a/configs/evb-rk3326_defconfig
+++ b/configs/evb-rk3326_defconfig
@@ -7,7 +7,6 @@ CONFIG_ROCKCHIP_PX30=y
 CONFIG_ROCKCHIP_RK3326=y
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
-CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_TARGET_EVB_PX30=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
@@ -99,11 +98,11 @@ CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_OHCI_GENERIC=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_DWC2_OTG=y
-CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
 CONFIG_USB_GADGET_VENDOR_NUM=0x2207
 CONFIG_USB_GADGET_PRODUCT_NUM=0x330d
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig
index 32b073382d..261db72650 100644
--- a/configs/evb-rv1108_defconfig
+++ b/configs/evb-rv1108_defconfig
@@ -7,11 +7,10 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RV1108=y
 CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
-CONFIG_RKIMG_BOOTLOADER=y
 # CONFIG_USING_KERNEL_DTB is not set
 CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_TARGET_EVB_RV1108=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
+CONFIG_TARGET_EVB_RV1108=y
 CONFIG_DEFAULT_DEVICE_TREE="rv1108-evb"
 CONFIG_DEBUG_UART=y
 # CONFIG_CONSOLE_MUX is not set
@@ -83,7 +82,6 @@ CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0x10210000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_ROCKCHIP_SFC=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
@@ -103,7 +101,6 @@ CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
-CONFIG_PANIC_HANG=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
 # CONFIG_EFI_LOADER is not set
diff --git a/configs/gva-rk3229_defconfig b/configs/gva-rk3229_defconfig
index 5595e7eb7b..191a5a41d9 100644
--- a/configs/gva-rk3229_defconfig
+++ b/configs/gva-rk3229_defconfig
@@ -3,14 +3,12 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x1000
-CONFIG_ROCKCHIP_RK322X=y
 CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl.lds"
 CONFIG_TPL_TEXT_BASE=0x10081004
 CONFIG_TPL_MAX_SIZE=28672
+CONFIG_ROCKCHIP_RK322X=y
 CONFIG_TPL_STACK=0x10088000
-CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
-CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_TARGET_GVA_RK3229=y
 CONFIG_SPL_STACK_R_ADDR=0x60600000
@@ -18,6 +16,8 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3229-gva"
 CONFIG_DEBUG_UART=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_ANDROID_AB=y
+CONFIG_ANDROID_AVB=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
 CONFIG_SPL_STACK_R=y
@@ -65,18 +65,15 @@ CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0x11030000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_DWC2_OTG=y
-CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
 CONFIG_USB_GADGET_VENDOR_NUM=0x18d1
 CONFIG_USB_GADGET_PRODUCT_NUM=0xd00d
-CONFIG_SHA1=y
-CONFIG_SHA256=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_ERRNO_STR=y
 CONFIG_AVB_LIBAVB=y
 CONFIG_AVB_LIBAVB_AB=y
@@ -85,5 +82,3 @@ CONFIG_AVB_LIBAVB_USER=y
 CONFIG_RK_AVB_LIBAVB_USER=y
 CONFIG_OPTEE_CLIENT=y
 CONFIG_OPTEE_V1=y
-CONFIG_ANDROID_AB=y
-CONFIG_ANDROID_AVB=y
diff --git a/configs/kylin-rk3036_defconfig b/configs/kylin-rk3036_defconfig
index 0f58d2a209..27e5990440 100644
--- a/configs/kylin-rk3036_defconfig
+++ b/configs/kylin-rk3036_defconfig
@@ -3,13 +3,12 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x800
-CONFIG_ROCKCHIP_RK3036=y
 CONFIG_TPL_TEXT_BASE=0x10081000
+CONFIG_ROCKCHIP_RK3036=y
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
 CONFIG_TPL_STACK=0x10081fff
 # CONFIG_SPL_ROCKCHIP_BACK_TO_BROM is not set
-CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
-CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_TARGET_KYLIN_RK3036=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL_STACK_R_ADDR=0x60600000
@@ -20,7 +19,6 @@ CONFIG_TPL_SYS_MALLOC_F_LEN=0x0
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
 # CONFIG_DISPLAY_CPUINFO is not set
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig
index 2185049082..befdfbca9f 100644
--- a/configs/lion-rk3368_defconfig
+++ b/configs/lion-rk3368_defconfig
@@ -9,9 +9,9 @@ CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
-CONFIG_SPL_STACK_R_ADDR=0x600000
 CONFIG_DEFAULT_DEVICE_TREE="rk3368-lion"
 CONFIG_SMBIOS_PRODUCT_NAME="sheep_rk3368"
 CONFIG_DEBUG_UART=y
diff --git a/configs/px30_defconfig b/configs/px30_defconfig
index 0f0cd2adfa..be9d612c1f 100644
--- a/configs/px30_defconfig
+++ b/configs/px30_defconfig
@@ -6,7 +6,6 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_PX30=y
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
-CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_TARGET_EVB_PX30=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
@@ -112,11 +111,11 @@ CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_OHCI_GENERIC=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_DWC2_OTG=y
-CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
 CONFIG_USB_GADGET_VENDOR_NUM=0x2207
 CONFIG_USB_GADGET_PRODUCT_NUM=0x330d
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
diff --git a/configs/rk1806_defconfig b/configs/rk1806_defconfig
index f5791e4a82..17f88d13e3 100644
--- a/configs/rk1806_defconfig
+++ b/configs/rk1806_defconfig
@@ -7,12 +7,11 @@ CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_RK1808=y
 CONFIG_ROCKCHIP_RK1806=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
-CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
-CONFIG_TARGET_EVB_RK1808=y
 CONFIG_SPL_STACK_R_ADDR=0x3fe0000
+CONFIG_TARGET_EVB_RK1808=y
 CONFIG_DEFAULT_DEVICE_TREE="rk1806-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
@@ -113,10 +112,10 @@ CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
 CONFIG_USB_GADGET_VENDOR_NUM=0x2207
 CONFIG_USB_GADGET_PRODUCT_NUM=0x330d
+CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
diff --git a/configs/rk1808_defconfig b/configs/rk1808_defconfig
index cf84bdadf0..c328e9d0f1 100644
--- a/configs/rk1808_defconfig
+++ b/configs/rk1808_defconfig
@@ -6,12 +6,11 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_RK1808=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
-CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
-CONFIG_TARGET_EVB_RK1808=y
 CONFIG_SPL_STACK_R_ADDR=0x3fe0000
+CONFIG_TARGET_EVB_RK1808=y
 CONFIG_DEFAULT_DEVICE_TREE="rk1808-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
@@ -113,10 +112,10 @@ CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
 CONFIG_USB_GADGET_VENDOR_NUM=0x2207
 CONFIG_USB_GADGET_PRODUCT_NUM=0x330d
+CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
diff --git a/configs/rk3036_defconfig b/configs/rk3036_defconfig
index 66a219d274..28ea56a8c8 100644
--- a/configs/rk3036_defconfig
+++ b/configs/rk3036_defconfig
@@ -81,8 +81,6 @@ CONFIG_SPL_RAM=y
 CONFIG_DM_RESET=y
 CONFIG_RKNAND=y
 CONFIG_RKFLASH=y
-CONFIG_RKNANDC_NAND=y
-CONFIG_RKSFC_NAND=y
 CONFIG_RKSFC_NOR=y
 # CONFIG_TPL_DM_SERIAL is not set
 CONFIG_DEBUG_UART_BASE=0x20068000
diff --git a/configs/rk3126_defconfig b/configs/rk3126_defconfig
index 4793fc76c1..40f5d97068 100644
--- a/configs/rk3126_defconfig
+++ b/configs/rk3126_defconfig
@@ -3,7 +3,6 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x38000
 CONFIG_ROCKCHIP_RK3128=y
 CONFIG_ROCKCHIP_RK3126=y
-CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3126-evb"
 CONFIG_DEBUG_UART=y
@@ -81,11 +80,11 @@ CONFIG_USB_OHCI_GENERIC=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_DWC2_OTG=y
-CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
 CONFIG_USB_GADGET_VENDOR_NUM=0x2207
 CONFIG_USB_GADGET_PRODUCT_NUM=0x310c
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_VIDEO_ROCKCHIP=y
diff --git a/configs/rk3128x_defconfig b/configs/rk3128x_defconfig
index 15c47c6387..885a717b2c 100644
--- a/configs/rk3128x_defconfig
+++ b/configs/rk3128x_defconfig
@@ -11,7 +11,6 @@ CONFIG_ROCKCHIP_RK3128X=y
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
 CONFIG_TPL_STACK=0x10088000
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
-CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_TARGET_EVB_RK3229=y
 CONFIG_SPL_STACK_R_ADDR=0x60600000
@@ -110,11 +109,11 @@ CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_DWC2_OTG=y
-CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
 CONFIG_USB_GADGET_VENDOR_NUM=0x18d1
 CONFIG_USB_GADGET_PRODUCT_NUM=0xd00d
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
diff --git a/configs/rk3308_defconfig b/configs/rk3308_defconfig
index 50abe01fd9..6efa533bd2 100644
--- a/configs/rk3308_defconfig
+++ b/configs/rk3308_defconfig
@@ -6,8 +6,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_RK3308=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
-CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_ROCKCHIP_UART_MUX_SEL_M=1
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_TARGET_EVB_RK3308=y
 CONFIG_SPL_STACK_R_ADDR=0xc00000
@@ -99,18 +99,17 @@ CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF0C0000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_ROCKCHIP_UART_MUX_SEL_M=1
 CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_SYSRESET=y
 CONFIG_DM_THERMAL=y
 CONFIG_ROCKCHIP_THERMAL=y
 CONFIG_USB=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_DWC2_OTG=y
-CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
 CONFIG_USB_GADGET_VENDOR_NUM=0x2207
 CONFIG_USB_GADGET_PRODUCT_NUM=0x330d
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_LZ4=y
diff --git a/configs/rk3326-aarch32_defconfig b/configs/rk3326-aarch32_defconfig
index 1c9ddfbee4..27ab846aab 100644
--- a/configs/rk3326-aarch32_defconfig
+++ b/configs/rk3326-aarch32_defconfig
@@ -5,7 +5,6 @@ CONFIG_ROCKCHIP_PX30=y
 CONFIG_ROCKCHIP_RK3326=y
 CONFIG_ARM64_BOOT_AARCH32=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
-CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_TARGET_EVB_PX30=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3326-evb"
@@ -88,11 +87,11 @@ CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_OHCI_GENERIC=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_DWC2_OTG=y
-CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
 CONFIG_USB_GADGET_VENDOR_NUM=0x2207
 CONFIG_USB_GADGET_PRODUCT_NUM=0x330d
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
diff --git a/configs/rk3326_defconfig b/configs/rk3326_defconfig
index 544f3420ec..dff37ac65d 100644
--- a/configs/rk3326_defconfig
+++ b/configs/rk3326_defconfig
@@ -7,7 +7,6 @@ CONFIG_ROCKCHIP_PX30=y
 CONFIG_ROCKCHIP_RK3326=y
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
-CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_TARGET_EVB_PX30=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
@@ -106,11 +105,11 @@ CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_OHCI_GENERIC=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_DWC2_OTG=y
-CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
 CONFIG_USB_GADGET_VENDOR_NUM=0x2207
 CONFIG_USB_GADGET_PRODUCT_NUM=0x330d
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
diff --git a/configs/rk3368_defconfig b/configs/rk3368_defconfig
index b953b3e27a..3a7e4acf34 100644
--- a/configs/rk3368_defconfig
+++ b/configs/rk3368_defconfig
@@ -2,7 +2,6 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_ROCKCHIP_RK3368=y
-CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_TARGET_EVB_RK3368=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3368-evb"
@@ -61,8 +60,8 @@ CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
-CONFIG_POWER_FG_RK817=y
 CONFIG_POWER_FG_RK818=y
+CONFIG_POWER_FG_RK817=y
 CONFIG_IO_DOMAIN=y
 CONFIG_ROCKCHIP_IO_DOMAIN=y
 CONFIG_DM_PMIC=y
@@ -88,11 +87,11 @@ CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_OHCI_GENERIC=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_DWC2_OTG=y
-CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
 CONFIG_USB_GADGET_VENDOR_NUM=0x2207
 CONFIG_USB_GADGET_PRODUCT_NUM=0x330a
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
diff --git a/configs/rk3399pro_defconfig b/configs/rk3399pro_defconfig
index bd4bedca43..6cd6beb338 100644
--- a/configs/rk3399pro_defconfig
+++ b/configs/rk3399pro_defconfig
@@ -6,7 +6,6 @@ CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_RK3399=y
 CONFIG_ROCKCHIP_RK3399PRO=y
-CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb"
 CONFIG_DEBUG_UART=y
@@ -114,10 +113,10 @@ CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
 CONFIG_USB_GADGET_VENDOR_NUM=0x2207
 CONFIG_USB_GADGET_PRODUCT_NUM=0x330a
+CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_ETHER_ASIX88179=y
diff --git a/configs/rknpu-lion_defconfig b/configs/rknpu-lion_defconfig
index 465aebb583..17eaf6c0a1 100644
--- a/configs/rknpu-lion_defconfig
+++ b/configs/rknpu-lion_defconfig
@@ -4,7 +4,6 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK1808=y
 CONFIG_COPROCESSOR_RK1808=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
-CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_TARGET_EVB_RK1808=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3399pro-npu-evb"
 CONFIG_DEBUG_UART=y
@@ -40,7 +39,6 @@ CONFIG_CMD_PART=y
 # CONFIG_CMD_NET is not set
 # CONFIG_CMD_NFS is not set
 # CONFIG_CMD_MISC is not set
-CONFIG_RKPARM_PARTITION=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_REGMAP=y
@@ -66,6 +64,4 @@ CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_SYSRESET=y
 # CONFIG_SYS_WHITE_ON_BLACK is not set
 CONFIG_REGEX=y
-CONFIG_SHA1=y
-CONFIG_SHA256=y
 # CONFIG_EFI_LOADER is not set

commit f5b9d240a5fa9eaabdb8771b4ad4a957532aca24
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Apr 26 11:43:29 2021 +0800

    common: android: call ab_decrease_tries() earlier
    
    Call ab_decrease_tries() earlier so that the system can minus 1
    if load firmware fail.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ica91db91660ab4dfa52155e4bc6b99845a79983c

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 33ee2281c0..7043e06e59 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -957,6 +957,9 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	/* Get current slot_suffix */
 	if (ab_get_slot_suffix(slot_suffix))
 		return -1;
+
+	if (ab_decrease_tries())
+		printf("Decrease ab tries count fail!\n");
 #endif
 	switch (mode) {
 	case ANDROID_BOOT_MODE_NORMAL:
@@ -1098,11 +1101,6 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 		printf("Close optee client failed!\n");
 #endif
 
-#ifdef CONFIG_ANDROID_AB
-	if (ab_decrease_tries())
-		printf("Decrease ab tries count fail!\n");
-#endif
-
 	android_bootloader_boot_kernel(load_address);
 
 	/* TODO: If the kernel doesn't boot mark the selected slot as bad. */

commit 9d5c314b35defd1c678227deba13c3b4dfd4a0f3
Author: Wesley Yao <wesley.yao@rock-chips.com>
Date:   Sun Apr 25 15:59:38 2021 +0800

    drivers: ram: rv1126: Support RV1126 DDR3 x8 bus width
    
    sdram_rv1126.c: 22-28 added to ddrconfig calculate.
    sdram_rv1126.c: BurstSize & BurstPenalty in NOC are set to 0x1 & 0x4
    when x8 bus width
    sdram_rv1126.c: When detecting DDR3 capacity, the initial value of bus
    width is set to 8. Add detection of x8 bus width through read gate
    training
    sdram_common.c: When detecting DDR3 die bus width, dbw = x8 if bw == x8
    sdram-rv1126-ddr3-detect-xxx.inc: Bus width defaults to x8
    
    Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
    Change-Id: Ic6a635bcb3a5902f5f7871516dca6ae5de8398fc

diff --git a/drivers/ram/rockchip/sdram_common.c b/drivers/ram/rockchip/sdram_common.c
index 440bc000d8..71afffffc2 100644
--- a/drivers/ram/rockchip/sdram_common.c
+++ b/drivers/ram/rockchip/sdram_common.c
@@ -307,7 +307,12 @@ int sdram_detect_dbw(struct sdram_cap_info *cap_info, u32 dram_type)
 	u32 row, col, bk, bw, cs_cap, cs;
 	u32 die_bw_0 = 0, die_bw_1 = 0;
 
-	if (dram_type == DDR3 || dram_type == LPDDR4) {
+	if (dram_type == DDR3) {
+		if (cap_info->bw == 0)
+			cap_info->dbw = 0;
+		else
+			cap_info->dbw = 1;
+	} else if (dram_type == LPDDR4) {
 		cap_info->dbw = 1;
 	} else if (dram_type == LPDDR3 || dram_type == LPDDR2) {
 		row = cap_info->cs0_row;
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-1056.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-1056.inc
index 062f04d79a..4cde21565b 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-1056.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-1056.inc
@@ -4,7 +4,7 @@
 			.rank = 0x1,
 			.col = 0xC,
 			.bk = 0x3,
-			.bw = 0x1,
+			.bw = 0x0,
 			.dbw = 0x0,
 			.row_3_4 = 0x0,
 			.cs0_row = 0x10,
@@ -32,7 +32,7 @@
 	},
 	{
 		{
-			{0x00000000, 0x43041001},	/* MSTR */
+			{0x00000000, 0x43042001},	/* MSTR */
 			{0x00000064, 0x008000b9},	/* RFSHTMG */
 			{0x000000d0, 0x00020103},	/* INIT0 */
 			{0x000000d4, 0x00690000},	/* INIT1 */
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-328.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-328.inc
index 1276900cc4..eef61ab500 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-328.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-328.inc
@@ -4,7 +4,7 @@
 			.rank = 0x1,
 			.col = 0xC,
 			.bk = 0x3,
-			.bw = 0x1,
+			.bw = 0x0,
 			.dbw = 0x0,
 			.row_3_4 = 0x0,
 			.cs0_row = 0x10,
@@ -32,7 +32,7 @@
 	},
 	{
 		{
-			{0x00000000, 0x43041001},	/* MSTR */
+			{0x00000000, 0x43042001},	/* MSTR */
 			{0x00000064, 0x0027003a},	/* RFSHTMG */
 			{0x000000d0, 0x00020052},	/* INIT0 */
 			{0x000000d4, 0x00220000},	/* INIT1 */
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-396.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-396.inc
index caefcc2f1d..39a8271815 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-396.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-396.inc
@@ -4,7 +4,7 @@
 			.rank = 0x1,
 			.col = 0xC,
 			.bk = 0x3,
-			.bw = 0x1,
+			.bw = 0x0,
 			.dbw = 0x0,
 			.row_3_4 = 0x0,
 			.cs0_row = 0x10,
@@ -32,7 +32,7 @@
 	},
 	{
 		{
-			{0x00000000, 0x43041001},	/* MSTR */
+			{0x00000000, 0x43042001},	/* MSTR */
 			{0x00000064, 0x00300046},	/* RFSHTMG */
 			{0x000000d0, 0x00020062},	/* INIT0 */
 			{0x000000d4, 0x00280000},	/* INIT1 */
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-528.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-528.inc
index 362585ce46..9dbbb1aa9e 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-528.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-528.inc
@@ -4,7 +4,7 @@
 			.rank = 0x1,
 			.col = 0xC,
 			.bk = 0x3,
-			.bw = 0x1,
+			.bw = 0x0,
 			.dbw = 0x0,
 			.row_3_4 = 0x0,
 			.cs0_row = 0x10,
@@ -32,7 +32,7 @@
 	},
 	{
 		{
-			{0x00000000, 0x43041001},	/* MSTR */
+			{0x00000000, 0x43042001},	/* MSTR */
 			{0x00000064, 0x0040005d},	/* RFSHTMG */
 			{0x000000d0, 0x00020082},	/* INIT0 */
 			{0x000000d4, 0x00350000},	/* INIT1 */
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-664.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-664.inc
index 06bd9ef295..2b57132794 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-664.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-664.inc
@@ -4,7 +4,7 @@
 			.rank = 0x1,
 			.col = 0xC,
 			.bk = 0x3,
-			.bw = 0x1,
+			.bw = 0x0,
 			.dbw = 0x0,
 			.row_3_4 = 0x0,
 			.cs0_row = 0x10,
@@ -32,7 +32,7 @@
 	},
 	{
 		{
-			{0x00000000, 0x43041001},	/* MSTR */
+			{0x00000000, 0x43042001},	/* MSTR */
 			{0x00000064, 0x00500075},	/* RFSHTMG */
 			{0x000000d0, 0x000200a4},	/* INIT0 */
 			{0x000000d4, 0x00420000},	/* INIT1 */
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-784.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-784.inc
index 5cce6903f7..8ad22727fc 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-784.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-784.inc
@@ -4,7 +4,7 @@
 			.rank = 0x1,
 			.col = 0xC,
 			.bk = 0x3,
-			.bw = 0x1,
+			.bw = 0x0,
 			.dbw = 0x0,
 			.row_3_4 = 0x0,
 			.cs0_row = 0x10,
@@ -32,7 +32,7 @@
 	},
 	{
 		{
-			{0x00000000, 0x43041001},	/* MSTR */
+			{0x00000000, 0x43042001},	/* MSTR */
 			{0x00000064, 0x005f008a},	/* RFSHTMG */
 			{0x000000d0, 0x000200c1},	/* INIT0 */
 			{0x000000d4, 0x004e0000},	/* INIT1 */
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-924.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-924.inc
index 3aeb91bb3c..4cc36b05d2 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-924.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-924.inc
@@ -4,7 +4,7 @@
 			.rank = 0x1,
 			.col = 0xC,
 			.bk = 0x3,
-			.bw = 0x1,
+			.bw = 0x0,
 			.dbw = 0x0,
 			.row_3_4 = 0x0,
 			.cs0_row = 0x10,
@@ -32,7 +32,7 @@
 	},
 	{
 		{
-			{0x00000000, 0x43041001},	/* MSTR */
+			{0x00000000, 0x43042001},	/* MSTR */
 			{0x00000064, 0x007000a2},	/* RFSHTMG */
 			{0x000000d0, 0x000200e3},	/* INIT0 */
 			{0x000000d4, 0x005c0000},	/* INIT1 */
diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
index 70e868d7c2..9830065e31 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -420,6 +420,17 @@ static unsigned int
 				ddrconf = i;
 				goto out;
 			}
+
+		for (i = 0; i < 7; i++)
+			if (((tmp & 0x1f) == (ddr_cfg_2_rbc_p2[i] & 0x1f)) &&
+			    ((tmp & (7 << 5)) <=
+			     (ddr_cfg_2_rbc_p2[i] & (7 << 5))) &&
+			    ((tmp & (1 << 8)) <=
+			     (ddr_cfg_2_rbc_p2[i] & (1 << 8)))) {
+				ddrconf = i + 22;
+				goto out;
+			}
+
 		if (cs == 1 && bank == 3 && row <= 17 &&
 		    (col + bw) == 12)
 			ddrconf = 23;
@@ -2119,7 +2130,7 @@ static void update_noc_timing(struct dram_info *dram,
 	bl = ((readl(pctl_base + DDR_PCTL2_MSTR) >> 16) & 0xf) * 2;
 
 	/* update the noc timing related to data bus width */
-	if ((bw / 8 * bl) == 16)
+	if ((bw / 8 * bl) <= 16)
 		sdram_params->ch.noc_timings.ddrmode.b.burstsize = 0;
 	else if ((bw / 8 * bl) == 32)
 		sdram_params->ch.noc_timings.ddrmode.b.burstsize = 1;
@@ -2403,11 +2414,12 @@ static u64 dram_detect_cap(struct dram_info *dram,
 	u32 coltmp;
 	u32 rowtmp;
 	u32 cs;
-	u32 bw = 1;
 	u32 dram_type = sdram_params->base.dramtype;
 	u32 pwrctl;
+	u32 i, dq_map;
+	u32 byte1 = 0, byte0 = 0;
 
-	cap_info->bw = bw;
+	cap_info->bw = dram_type == DDR3 ? 0 : 1;
 	if (dram_type != LPDDR4) {
 		if (dram_type != DDR4) {
 			coltmp = 12;
@@ -2462,10 +2474,24 @@ static u64 dram_detect_cap(struct dram_info *dram,
 		setbits_le32(PHY_REG(phy_base, 0xf), 0xf);
 
 		if (data_training(dram, 0, sdram_params, 0,
-				  READ_GATE_TRAINING) == 0)
+				  READ_GATE_TRAINING) == 0) {
 			cap_info->bw = 2;
-		else
-			cap_info->bw = 1;
+		} else {
+			dq_map = readl(PHY_REG(phy_base, 0x4f));
+			for (i = 0; i < 4; i++) {
+				if (((dq_map >> (i * 2)) & 0x3) == 0)
+					byte0 = i;
+				if (((dq_map >> (i * 2)) & 0x3) == 1)
+					byte1 = i;
+			}
+			clrsetbits_le32(PHY_REG(phy_base, 0xf), PHY_DQ_WIDTH_MASK,
+					BIT(byte0) | BIT(byte1));
+			if (data_training(dram, 0, sdram_params, 0,
+					  READ_GATE_TRAINING) == 0)
+				cap_info->bw = 1;
+			else
+				cap_info->bw = 0;
+		}
 	}
 
 	writel(pwrctl, pctl_base + DDR_PCTL2_PWRCTL);

commit 82ad70b537721c0857884fb1d91434f84220b1ab
Author: Wesley Yao <wesley.yao@rock-chips.com>
Date:   Sun Apr 25 11:03:38 2021 +0800

    drivers: ram: rv1126: Modify the calculation of dqs default skew value
    of write train
    
    Ignore unused bytes when calculating dqs default skew value of write
    train to fit x16/x8 bus width.
    
    Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
    Change-Id: I8a4464ae28162a42897374204710d516d0b9be46

diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
index 0943b646a0..70e868d7c2 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -2009,14 +2009,19 @@ static int high_freq_training(struct dram_info *dram,
 	u32 dramtype = sdram_params->base.dramtype;
 	int min_val;
 	int dqs_skew, clk_skew, ca_skew;
+	u8 byte_en;
 	int ret;
 
+	byte_en = readl(PHY_REG(phy_base, 0xf)) & PHY_DQ_WIDTH_MASK;
 	dqs_skew = 0;
-	for (j = 0; j < sdram_params->ch.cap_info.rank; j++)
-		for (i = 0; i < ARRAY_SIZE(wrlvl_result[0]); i++)
-			dqs_skew += wrlvl_result[j][i];
+	for (j = 0; j < sdram_params->ch.cap_info.rank; j++) {
+		for (i = 0; i < ARRAY_SIZE(wrlvl_result[0]); i++) {
+			if ((byte_en & BIT(i)) != 0)
+				dqs_skew += wrlvl_result[j][i];
+		}
+	}
 	dqs_skew = dqs_skew / (sdram_params->ch.cap_info.rank *
-			       ARRAY_SIZE(wrlvl_result[0]));
+			       (1 << sdram_params->ch.cap_info.bw));
 
 	clk_skew = 0x20 - dqs_skew;
 	dqs_skew = 0x20;

commit 23f3ce8d299b515e1a8b0fb314ab0e3104b54ab5
Author: Wenping Zhang <wenping.zhang@rock-chips.com>
Date:   Thu Apr 22 14:03:31 2021 +0800

    video: rk_eink: add dcache flush for EINK_LOGO_RESET type of logo.
    
    Signed-off-by: Wenping Zhang <wenping.zhang@rock-chips.com>
    Change-Id: I82ecf1d038dcad751accb4e42a186d449671317e

diff --git a/drivers/video/rk_eink/rk_eink_display.c b/drivers/video/rk_eink/rk_eink_display.c
index 3032ff879a..ad74b30394 100644
--- a/drivers/video/rk_eink/rk_eink_display.c
+++ b/drivers/video/rk_eink/rk_eink_display.c
@@ -564,6 +564,9 @@ static int rockchip_eink_show_logo(int cur_logo_type, int update_mode)
 
 		logo_addr = get_addr_by_type(dev, EINK_LOGO_RESET);
 		memset((u32 *)(u64)logo_addr, 0xff, size);
+		flush_dcache_range((ulong)logo_addr,
+				   ALIGN((ulong)logo_addr + size,
+					 CONFIG_SYS_CACHELINE_SIZE));
 		eink_display(dev, logo_addr, logo_addr,
 			     WF_TYPE_RESET, 0);
 		last_logo_type = 0;

commit 33a3075b1803e1a628a6f7bbb0d4c94cea6c59a1
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Apr 23 17:41:53 2021 +0800

    mtd: nand: Using macro to define mtd_blk device devnum
    
    Change-Id: I6c786da13791484ff88a183d65bafff3c64ca924
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/raw/rockchip_nand.c b/drivers/mtd/nand/raw/rockchip_nand.c
index 79024732e9..6d4bcddb92 100644
--- a/drivers/mtd/nand/raw/rockchip_nand.c
+++ b/drivers/mtd/nand/raw/rockchip_nand.c
@@ -696,7 +696,7 @@ static int rockchip_nandc_bind(struct udevice *udev)
 	struct udevice *bdev;
 
 	ret = blk_create_devicef(udev, "mtd_blk", "blk", IF_TYPE_MTD,
-				 0, 512, 0, &bdev);
+				 BLK_MTD_NAND, 512, 0, &bdev);
 	if (ret)
 		printf("Cannot create block device\n");
 #endif
diff --git a/drivers/mtd/nand/raw/rockchip_nand_v9.c b/drivers/mtd/nand/raw/rockchip_nand_v9.c
index 6f53937301..17e2926943 100644
--- a/drivers/mtd/nand/raw/rockchip_nand_v9.c
+++ b/drivers/mtd/nand/raw/rockchip_nand_v9.c
@@ -696,7 +696,7 @@ static int rockchip_nandc_bind(struct udevice *udev)
 	struct udevice *bdev;
 
 	ret = blk_create_devicef(udev, "mtd_blk", "blk", IF_TYPE_MTD,
-				 0, 512, 0, &bdev);
+				 BLK_MTD_NAND, 512, 0, &bdev);
 	if (ret)
 		printf("Cannot create block device\n");
 #endif
diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index eb8cb26462..c6bceff2c8 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -1168,7 +1168,7 @@ static int spinand_bind(struct udevice *udev)
 	struct udevice *bdev;
 
 	ret = blk_create_devicef(udev, "mtd_blk", "blk", IF_TYPE_MTD,
-				 1, 512, 0, &bdev);
+				 BLK_MTD_SPI_NAND, 512, 0, &bdev);
 	if (ret)
 		printf("Cannot create block device\n");
 #endif

commit a3e58bf5a27024d25a508e8fea923e40be391716
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed Apr 21 18:45:58 2021 +0800

    mtd: mtd_blk: Support for all cases of last autosize partition
    
    1.pc tools last partition autosize equals lba - 33
    2.uboot self last partition autosize equals lba - 34
    3.gpt_entry_modify last partition autosize equals lba - 64
    
    Change-Id: Ie742f1cd1668cad7bacd95d74dffcdc12281b7c1
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index 028dc14599..075dadb5ca 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -413,33 +413,42 @@ char *mtd_part_parse(void)
 			 (int)(size_t)info.start << 9,
 			 info.name);
 		strcat(mtd_part_info, ",");
-		if (part_get_info(dev_desc, p + 1, &info) &&
-		    (info.size + info.start + 33) == dev_desc->lba) {
-			if (dev_desc->devnum == BLK_MTD_SPI_NOR) {
-				/* Nor is 64KB erase block(kernel) and gpt table just
-				* resserve 33 sectors for the last partition. This
-				* will erase the backup gpt table by user program,
-				* so reserve one block.
-				*/
-				snprintf(mtd_part_info_p, data_len - 1, "0x%x@0x%x(%s)",
-					(int)(size_t)(info.size -
-					(info.size - 1) %
-					(0x10000 >> 9) - 1) << 9,
-					(int)(size_t)info.start << 9,
-					info.name);
-				break;
+		if (part_get_info(dev_desc, p + 1, &info)) {
+			/* Partition with grow tag in parameter will be resized */
+			if ((info.size + info.start + 64) >= dev_desc->lba) {
+				if (dev_desc->devnum == BLK_MTD_SPI_NOR) {
+					/* Nor is 64KB erase block(kernel) and gpt table just
+					 * resserve 33 sectors for the last partition. This
+					 * will erase the backup gpt table by user program,
+					 * so reserve one block.
+					 */
+					snprintf(mtd_part_info_p, data_len - 1, "0x%x@0x%x(%s)",
+						 (int)(size_t)(info.size -
+						 (info.size - 1) %
+						 (0x10000 >> 9) - 1) << 9,
+						 (int)(size_t)info.start << 9,
+						 info.name);
+					break;
+				} else {
+					/* Nand flash is erased by block and gpt table just
+					 * resserve 33 sectors for the last partition. This
+					 * will erase the backup gpt table by user program,
+					 * so reserve one block.
+					 */
+					snprintf(mtd_part_info_p, data_len - 1, "0x%x@0x%x(%s)",
+						 (int)(size_t)(info.size -
+						 (info.size - 1) %
+						 (mtd->erasesize >> 9) - 1) << 9,
+						 (int)(size_t)info.start << 9,
+						 info.name);
+					break;
+				}
 			} else {
-				/* Nand flash is erased by block and gpt table just
-				* resserve 33 sectors for the last partition. This
-				* will erase the backup gpt table by user program,
-				* so reserve one block.
-				*/
-				snprintf(mtd_part_info_p, data_len - 1, "0x%x@0x%x(%s)",
-					(int)(size_t)(info.size -
-					(info.size - 1) %
-					(mtd->erasesize >> 9) - 1) << 9,
-					(int)(size_t)info.start << 9,
-					info.name);
+				snprintf(mtd_part_info_temp, MTD_SINGLE_PART_INFO_MAX_SIZE - 1,
+					 "0x%x@0x%x(%s)",
+					 (int)(size_t)info.size << 9,
+					 (int)(size_t)info.start << 9,
+					 info.name);
 				break;
 			}
 		}

commit 093b1b43e5536d64da112c93fcb27c5445af2975
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Apr 15 14:35:41 2021 +0800

    rockchip: rk3568: enable SCMI config
    
    Change-Id: I803b035943525a32a155961660792c1e0837f3cd
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index f4923a3ba0..7544347999 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -94,12 +94,14 @@ CONFIG_SYSCON=y
 CONFIG_SPL_SYSCON=y
 CONFIG_CLK=y
 CONFIG_SPL_CLK=y
+CONFIG_CLK_SCMI=y
 CONFIG_DM_CRYPTO=y
 CONFIG_SPL_DM_CRYPTO=y
 CONFIG_ROCKCHIP_CRYPTO_V2=y
 CONFIG_SPL_ROCKCHIP_CRYPTO_V2=y
 CONFIG_DM_RNG=y
 CONFIG_RNG_ROCKCHIP=y
+CONFIG_SCMI_FIRMWARE=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_ROCKCHIP_GPIO_V2=y
 CONFIG_SYS_I2C_ROCKCHIP=y

commit 04931d47e83e2485ef4fd19b5c0111c41af74b73
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Apr 15 11:19:39 2021 +0800

    rockchip: rk3568: enable Fan53555 config
    
    Change-Id: I6869c10d8eed28ea2d89d7270cbeb1169c64dd66
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index 16f71c50a7..f4923a3ba0 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -147,6 +147,7 @@ CONFIG_IO_DOMAIN=y
 CONFIG_ROCKCHIP_IO_DOMAIN=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_FAN53555=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_REGULATOR_RK8XX=y

commit 60410d287b1373642dd42f9820cd956ae4760fd5
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Apr 15 09:27:06 2021 +0800

    rockchip: rk3568: add set_armclk_rate
    
    Support ARM high frequency for fast boot.
    
    Change-Id: If22946894c456853815af2c72996f63cfa350ec5
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/clock.h b/arch/arm/include/asm/arch-rockchip/clock.h
index 8b002616ad..c141b813ad 100644
--- a/arch/arm/include/asm/arch-rockchip/clock.h
+++ b/arch/arm/include/asm/arch-rockchip/clock.h
@@ -168,4 +168,6 @@ void rk3288_clk_configure_cpu(struct rk3288_cru *cru, struct rk3288_grf *grf);
 
 int rockchip_get_clk(struct udevice **devp);
 
+int rockchip_get_scmi_clk(struct udevice **devp);
+
 #endif
diff --git a/arch/arm/mach-rockchip/rk3568/clk_rk3568.c b/arch/arm/mach-rockchip/rk3568/clk_rk3568.c
index b98cb7a34a..fdafca7db4 100644
--- a/arch/arm/mach-rockchip/rk3568/clk_rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/clk_rk3568.c
@@ -16,6 +16,14 @@ int rockchip_get_clk(struct udevice **devp)
 			DM_GET_DRIVER(rockchip_rk3568_cru), devp);
 }
 
+#ifdef CONFIG_CLK_SCMI
+int rockchip_get_scmi_clk(struct udevice **devp)
+{
+	return uclass_get_device_by_driver(UCLASS_CLK,
+			DM_GET_DRIVER(scmi_clock), devp);
+}
+#endif
+
 void *rockchip_get_cru(void)
 {
 	struct rk3568_clk_priv *priv;
diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c
index 6e9807ac23..d788a34505 100644
--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
@@ -4,6 +4,7 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 #include <common.h>
+#include <clk.h>
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/hardware.h>
@@ -11,6 +12,7 @@
 #include <asm/arch/rk_atags.h>
 #include <linux/libfdt.h>
 #include <fdt_support.h>
+#include <asm/arch/clock.h>
 #include <dt-bindings/clock/rk3568-cru.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -936,6 +938,57 @@ int spl_fit_standalone_release(uintptr_t entry_point)
 }
 #endif
 
+#ifdef CONFIG_CLK_SCMI
+#include <dm.h>
+/*
+ * armclk: 1104M:
+ *	rockchip,clk-init = <1104000000>,
+ *	vdd_cpu : regulator-init-microvolt = <825000>;
+ * armclk: 1416M(by default):
+ *	rockchip,clk-init = <1416000000>,
+ *	vdd_cpu : regulator-init-microvolt = <900000>;
+ * armclk: 1608M:
+ *	rockchip,clk-init = <1608000000>,
+ *	vdd_cpu : regulator-init-microvolt = <975000>;
+ */
+
+int set_armclk_rate(void)
+{
+	struct clk clk;
+	u32 *rates = NULL;
+	int ret, size, num_rates;
+
+	ret = rockchip_get_scmi_clk(&clk.dev);
+	if (ret) {
+		printf("Failed to get scmi clk dev\n");
+		return ret;
+	}
+
+	size = dev_read_size(clk.dev, "rockchip,clk-init");
+	if (size < 0)
+		return 0;
+
+	num_rates = size / sizeof(u32);
+	rates = calloc(num_rates, sizeof(u32));
+	if (!rates)
+		return -ENOMEM;
+
+	ret = dev_read_u32_array(clk.dev, "rockchip,clk-init",
+				 rates, num_rates);
+	if (ret) {
+		printf("Cannot get rockchip,clk-init reg\n");
+		return -EINVAL;
+	}
+	clk.id = 0;
+	ret = clk_set_rate(&clk, rates[clk.id]);
+	if (ret < 0) {
+		printf("Failed to set armclk\n");
+		return ret;
+	}
+	return 0;
+}
+#endif
+
 #define CRU_NODE_FDT_PATH	"/clock-controller@fdd20000"
 #define CRU_RATE_CNT_MIN	6
 #define CRU_PARENT_CNT_MIN	3

commit 965911dd17c361326bcc3ed8a73c81a9b26344f8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 19 15:15:44 2021 +0800

    firmware: scmi: fix null ofnode
    
    Use exist ofnode but not offset for binding, otherwise
    the device_bind() would create a null ofnode to bind
    while oflive is activated.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I780fab83aff55e13665215c05f7e86de198a80b8

diff --git a/drivers/firmware/scmi/scmi_agent-uclass.c b/drivers/firmware/scmi/scmi_agent-uclass.c
index 7d35bee958..8a0b6902f2 100644
--- a/drivers/firmware/scmi/scmi_agent-uclass.c
+++ b/drivers/firmware/scmi/scmi_agent-uclass.c
@@ -89,8 +89,8 @@ static int scmi_bind_protocols(struct udevice *dev)
 			continue;
 		}
 
-		ret = device_bind(dev, drv, ofnode_get_name(node), NULL,
-				  ofnode_to_offset(node), NULL);
+		ret = device_bind_with_driver_data(dev, drv,
+				ofnode_get_name(node), 0, node, NULL);
 		if (ret)
 			break;
 	}

commit f6e420d4652232623cd810d9a178370a598fa482
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Apr 20 16:47:58 2021 +0800

    spl: fit: support CONFIG_SPL_FIT_SIGNATURE
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Iea266510cd6a63044c89a8a53a051d2538ddd9e6

diff --git a/common/spl/spl_fit_tb_arm_v7.S b/common/spl/spl_fit_tb_arm_v7.S
index c5cf36222e..b8e73431e5 100644
--- a/common/spl/spl_fit_tb_arm_v7.S
+++ b/common/spl/spl_fit_tb_arm_v7.S
@@ -20,9 +20,9 @@
 	.fpu softvfp
 	.type	spl_fit_get_image_name.isra.0, %function
 spl_fit_get_image_name.isra.0:
-.LFB220:
+.LFB217:
 	.file 1 "common/spl/spl_fit_tb_arm_v7.c"
-	.loc 1 32 0
+	.loc 1 37 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
@@ -35,30 +35,30 @@ spl_fit_get_image_name.isra.0:
 	.cfi_offset 7, -12
 	.cfi_offset 8, -8
 	.cfi_offset 14, -4
-	.loc 1 32 0
+	.loc 1 37 0
 	mov	r5, r0
 	mov	r8, r1
 	mov	r7, r2
 	mov	r6, r3
-	.loc 1 41 0
+	.loc 1 46 0
 	bl	fit_find_config_node
 .LVL1:
-	.loc 1 42 0
+	.loc 1 47 0
 	subs	r4, r0, #0
 	bge	.L2
-	.loc 1 44 0
+	.loc 1 49 0
 	ldr	r0, .L11
 .LVL2:
-	.loc 1 48 0
+	.loc 1 53 0
 	ldr	r7, .L11+4
 .LVL3:
-	.loc 1 49 0
+	.loc 1 54 0
 	ldr	r8, .L11+8
 .LVL4:
-	.loc 1 44 0
+	.loc 1 49 0
 	bl	printf
 .LVL5:
-	.loc 1 45 0
+	.loc 1 50 0
 	mov	r1, r4
 	mov	r0, r5
 	bl	fdt_first_subnode
@@ -70,7 +70,7 @@ spl_fit_get_image_name.isra.0:
 	bge	.L4
 .LVL8:
 .L1:
-	.loc 1 72 0
+	.loc 1 77 0
 	mov	r0, r4
 	add	sp, sp, #8
 	.cfi_remember_state
@@ -80,7 +80,7 @@ spl_fit_get_image_name.isra.0:
 .LVL9:
 .L4:
 	.cfi_restore_state
-	.loc 1 48 0
+	.loc 1 53 0
 	add	r3, sp, #4
 	mov	r2, r7
 	mov	r1, r6
@@ -88,13 +88,13 @@ spl_fit_get_image_name.isra.0:
 .LVL10:
 	bl	fdt_getprop
 .LVL11:
-	.loc 1 49 0
+	.loc 1 54 0
 	mov	r1, r0
 	mov	r0, r8
 .LVL12:
 	bl	printf
 .LVL13:
-	.loc 1 47 0
+	.loc 1 52 0
 	mov	r1, r6
 	mov	r0, r5
 	bl	fdt_next_subnode
@@ -104,7 +104,7 @@ spl_fit_get_image_name.isra.0:
 	b	.L3
 .LVL16:
 .L2:
-	.loc 1 55 0
+	.loc 1 60 0
 	mov	r0, r5
 .LVL17:
 	add	r3, sp, #4
@@ -112,29 +112,29 @@ spl_fit_get_image_name.isra.0:
 	mov	r1, r4
 	bl	fdt_getprop
 .LVL18:
-	.loc 1 56 0
+	.loc 1 61 0
 	mov	r5, r0
 .LVL19:
 	cbz	r0, .L8
 	movs	r4, #0
 .LVL20:
 .L6:
-	.loc 1 62 0
+	.loc 1 67 0
 	cmp	r4, r7
 	blt	.L7
-	.loc 1 70 0
+	.loc 1 75 0
 	str	r0, [r6]
-	.loc 1 71 0
+	.loc 1 76 0
 	movs	r4, #0
 .LVL21:
 	b	.L1
 .LVL22:
 .L7:
-	.loc 1 63 0
+	.loc 1 68 0
 	movs	r1, #0
 	bl	strchr
 .LVL23:
-	.loc 1 64 0
+	.loc 1 69 0
 	adds	r0, r0, #1
 .LVL24:
 	beq	.L10
@@ -142,19 +142,19 @@ spl_fit_get_image_name.isra.0:
 	subs	r3, r0, r5
 	cmp	r3, r2
 	bge	.L10
-	.loc 1 62 0
+	.loc 1 67 0
 	adds	r4, r4, #1
 .LVL25:
 	b	.L6
 .LVL26:
 .L8:
-	.loc 1 58 0
+	.loc 1 63 0
 	mvn	r4, #21
 .LVL27:
 	b	.L1
 .LVL28:
 .L10:
-	.loc 1 66 0
+	.loc 1 71 0
 	mvn	r4, #6
 .LVL29:
 	b	.L1
@@ -165,7 +165,7 @@ spl_fit_get_image_name.isra.0:
 	.word	.LC5
 	.word	.LC6
 	.cfi_endproc
-.LFE220:
+.LFE217:
 	.size	spl_fit_get_image_name.isra.0, .-spl_fit_get_image_name.isra.0
 	.section	.text.spl_fit_get_image_node,"ax",%progbits
 	.align	1
@@ -175,8 +175,8 @@ spl_fit_get_image_name.isra.0:
 	.fpu softvfp
 	.type	spl_fit_get_image_node, %function
 spl_fit_get_image_node:
-.LFB206:
-	.loc 1 88 0
+.LFB203:
+	.loc 1 93 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
@@ -186,43 +186,43 @@ spl_fit_get_image_node:
 	.cfi_offset 4, -12
 	.cfi_offset 5, -8
 	.cfi_offset 14, -4
-	.loc 1 88 0
+	.loc 1 93 0
 	mov	r5, r1
 	mov	r1, r2
 .LVL31:
 	mov	r2, r3
 .LVL32:
-	.loc 1 93 0
+	.loc 1 98 0
 	add	r3, sp, #4
 .LVL33:
-	.loc 1 88 0
-	mov	r4, r0
 	.loc 1 93 0
+	mov	r4, r0
+	.loc 1 98 0
 	bl	spl_fit_get_image_name.isra.0
 .LVL34:
-	.loc 1 94 0
-	cbnz	r0, .L13
 	.loc 1 99 0
+	cbnz	r0, .L13
+	.loc 1 104 0
 	ldr	r2, [sp, #4]
 	mov	r1, r5
 	mov	r0, r4
 .LVL35:
 	bl	fdt_subnode_offset
 .LVL36:
-	.loc 1 100 0
+	.loc 1 105 0
 	cmp	r0, #0
-	.loc 1 102 0
+	.loc 1 107 0
 	it	lt
 	mvnlt	r0, #21
 .LVL37:
 .L13:
-	.loc 1 106 0
+	.loc 1 111 0
 	add	sp, sp, #12
 	.cfi_def_cfa_offset 12
 	@ sp needed
 	pop	{r4, r5, pc}
 	.cfi_endproc
-.LFE206:
+.LFE203:
 	.size	spl_fit_get_image_node, .-spl_fit_get_image_node
 	.global	__aeabi_idivmod
 	.global	__aeabi_idiv
@@ -234,8 +234,8 @@ spl_fit_get_image_node:
 	.fpu softvfp
 	.type	spl_load_fit_image, %function
 spl_load_fit_image:
-.LFB210:
-	.loc 1 166 0
+.LFB207:
+	.loc 1 171 0
 	.cfi_startproc
 	@ args = 8, pretend = 0, frame = 48
 	@ frame_needed = 0, uses_anonymous_args = 0
@@ -252,80 +252,80 @@ spl_load_fit_image:
 	.cfi_offset 14, -4
 	sub	sp, sp, #56
 	.cfi_def_cfa_offset 88
-	.loc 1 166 0
+	.loc 1 171 0
 	mov	r4, r2
 	ldr	r5, [sp, #88]
-	.loc 1 176 0
+	.loc 1 181 0
 	add	r2, sp, #56
 .LVL39:
-	.loc 1 166 0
+	.loc 1 171 0
 	mov	r7, r3
-	.loc 1 176 0
+	.loc 1 181 0
 	movs	r3, #255
 .LVL40:
-	.loc 1 166 0
+	.loc 1 171 0
 	str	r1, [sp, #20]
-	.loc 1 176 0
+	.loc 1 181 0
 	strb	r3, [r2, #-29]!
 .LVL41:
-	.loc 1 193 0
+	.loc 1 198 0
 	mov	r1, r5
 .LVL42:
-	.loc 1 180 0
+	.loc 1 185 0
 	ldr	r3, [r0]
-	.loc 1 166 0
+	.loc 1 171 0
 	mov	r10, r0
-	.loc 1 193 0
+	.loc 1 198 0
 	mov	r0, r4
 .LVL43:
-	.loc 1 166 0
+	.loc 1 171 0
 	ldr	r6, [sp, #92]
-	.loc 1 180 0
+	.loc 1 185 0
 	str	r3, [sp, #12]
 .LVL44:
-	.loc 1 193 0
+	.loc 1 198 0
 	bl	fit_image_get_comp
 .LVL45:
-	.loc 1 196 0
+	.loc 1 201 0
 	add	r2, sp, #44
 	mov	r1, r5
 	mov	r0, r4
 	bl	fit_image_get_load
 .LVL46:
 	cbz	r0, .L17
-	.loc 1 197 0
+	.loc 1 202 0
 	ldr	r3, [r6, #8]
 	str	r3, [sp, #44]
 .L17:
-	.loc 1 199 0
+	.loc 1 204 0
 	ldrb	r3, [sp, #27]	@ zero_extendqisi2
 	cmp	r3, #0
 	beq	.L18
-	.loc 1 199 0 is_stmt 0 discriminator 1
+	.loc 1 204 0 is_stmt 0 discriminator 1
 	cmp	r3, #6
 	beq	.L18
-	.loc 1 201 0 is_stmt 1
+	.loc 1 206 0 is_stmt 1
 	add	r2, sp, #40
 	mov	r1, r5
 	mov	r0, r4
 	bl	fit_image_get_comp_addr
 .LVL47:
 	cbz	r0, .L19
-	.loc 1 202 0
+	.loc 1 207 0
 	ldr	r3, [sp, #44]
 	add	r3, r3, #1048576
 .L70:
-	.loc 1 204 0
+	.loc 1 209 0
 	str	r3, [sp, #40]
 .L19:
-	.loc 1 207 0
+	.loc 1 212 0
 	add	r2, sp, #28
 	mov	r1, r5
 	mov	r0, r4
 	bl	fit_image_get_data_position
 .LVL48:
 	cbz	r0, .L20
-	.loc 1 209 0
+	.loc 1 214 0
 	add	r2, sp, #28
 	mov	r1, r5
 	mov	r0, r4
@@ -333,14 +333,14 @@ spl_load_fit_image:
 .LVL49:
 	cmp	r0, #0
 	bne	.L21
-	.loc 1 210 0
+	.loc 1 215 0
 	ldr	r3, [sp, #28]
 	add	r7, r7, r3
 .LVL50:
 	str	r7, [sp, #28]
 .LVL51:
 .L20:
-	.loc 1 216 0
+	.loc 1 221 0
 	add	r2, sp, #36
 	mov	r1, r5
 	mov	r0, r4
@@ -348,18 +348,18 @@ spl_load_fit_image:
 .LVL52:
 	cmp	r0, #0
 	bne	.L40
-	.loc 1 219 0
+	.loc 1 224 0
 	ldr	r7, [sp, #40]
 	adds	r7, r7, #63
 	bic	r3, r7, #63
-	.loc 1 221 0
+	.loc 1 226 0
 	cmp	r3, #-50331648
-	.loc 1 219 0
+	.loc 1 224 0
 	str	r3, [sp, #8]
 .LVL53:
-	.loc 1 221 0
+	.loc 1 226 0
 	bcc	.L22
-	.loc 1 223 0
+	.loc 1 228 0
 	ldr	r1, [sp, #36]
 	movs	r0, #64
 	bl	memalign_simple
@@ -369,23 +369,23 @@ spl_load_fit_image:
 .L22:
 .LBB35:
 .LBB36:
-	.loc 1 129 0
+	.loc 1 134 0
 	ldr	r3, [r10, #12]
 .LBE36:
 .LBE35:
-	.loc 1 225 0
+	.loc 1 230 0
 	ldr	r8, [sp, #36]
-	.loc 1 227 0
+	.loc 1 232 0
 	ldr	r0, [sp, #28]
-	.loc 1 225 0
+	.loc 1 230 0
 	str	r8, [sp, #32]
 .LVL56:
 .LBB39:
 .LBB37:
-	.loc 1 129 0
+	.loc 1 134 0
 	cmp	r3, #0
 	beq	.L23
-	.loc 1 130 0
+	.loc 1 135 0
 	and	fp, r0, #63
 .LVL57:
 .L24:
@@ -393,12 +393,12 @@ spl_load_fit_image:
 .LBE39:
 .LBB40:
 .LBB41:
-	.loc 1 138 0
+	.loc 1 143 0
 	add	r8, r8, fp
 .LVL58:
-	.loc 1 140 0
+	.loc 1 145 0
 	cbnz	r3, .L25
-	.loc 1 143 0
+	.loc 1 148 0
 	ldr	r1, [r10, #8]
 	add	r0, r8, r1
 	subs	r0, r0, #1
@@ -409,39 +409,39 @@ spl_load_fit_image:
 .L25:
 .LBE41:
 .LBE40:
-	.loc 1 231 0
+	.loc 1 236 0
 	mov	r1, r5
 	mov	r0, r4
 	bl	fit_image_is_preload
 .LVL61:
-	.loc 1 233 0
+	.loc 1 238 0
 	str	r0, [sp, #16]
 	cbz	r0, .L26
-	.loc 1 234 0
+	.loc 1 239 0
 	ldr	r2, [sp, #12]
 	movs	r3, #1
 	strb	r3, [r2, #14]
 .L26:
-	.loc 1 236 0
+	.loc 1 241 0
 	ldr	r3, [r10, #16]
-	.loc 1 237 0
+	.loc 1 242 0
 	ldr	r0, [sp, #28]
 .LVL62:
-	.loc 1 236 0
+	.loc 1 241 0
 	mov	r7, r3
 .LBB42:
 .LBB43:
-	.loc 1 115 0
+	.loc 1 120 0
 	ldr	r3, [r10, #12]
 	cmp	r3, #0
 	beq	.L27
-	.loc 1 116 0
+	.loc 1 121 0
 	bic	r0, r0, #63
 .LVL63:
 .L28:
 .LBE43:
 .LBE42:
-	.loc 1 236 0
+	.loc 1 241 0
 	ldr	r1, [sp, #20]
 	mov	r2, r8
 	ldr	r3, [sp, #8]
@@ -451,49 +451,49 @@ spl_load_fit_image:
 .LVL64:
 	cmp	r8, r0
 	bne	.L37
-	.loc 1 243 0
+	.loc 1 248 0
 	ldr	r3, [sp, #8]
 	add	r3, r3, fp
 	str	r3, [sp, #48]
-	.loc 1 244 0
+	.loc 1 249 0
 	ldr	r3, [sp, #16]
 	cbz	r3, .L30
-	.loc 1 245 0
+	.loc 1 250 0
 	ldr	r3, [sp, #12]
 	ldr	r2, [sp, #12]
-	.loc 1 246 0
+	.loc 1 251 0
 	ldr	r0, .L72
-	.loc 1 245 0
+	.loc 1 250 0
 	ldrb	r3, [r3, #14]	@ zero_extendqisi2
 	bic	r3, r3, #1
 	strb	r3, [r2, #14]
-	.loc 1 246 0
+	.loc 1 251 0
 	bl	printf
 .LVL65:
 .L31:
-	.loc 1 299 0
+	.loc 1 304 0
 	cbz	r6, .L71
-	.loc 1 300 0
+	.loc 1 305 0
 	ldr	r3, [sp, #44]
-	.loc 1 302 0
+	.loc 1 307 0
 	mov	r1, r5
 	ldr	r2, .L72+4
 	mov	r0, r4
-	.loc 1 300 0
+	.loc 1 305 0
 	str	r3, [r6, #8]
-	.loc 1 301 0
+	.loc 1 306 0
 	ldr	r3, [sp, #32]
 	str	r3, [r6, #32]
-	.loc 1 302 0
+	.loc 1 307 0
 	bl	fdt_getprop_u32
 .LVL66:
 	str	r0, [r6, #12]
 .L71:
-	.loc 1 305 0
+	.loc 1 310 0
 	movs	r0, #0
 .LVL67:
 .L16:
-	.loc 1 306 0
+	.loc 1 311 0
 	add	sp, sp, #56
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
@@ -502,14 +502,14 @@ spl_load_fit_image:
 .LVL68:
 .L18:
 	.cfi_restore_state
-	.loc 1 204 0
+	.loc 1 209 0
 	ldr	r3, [sp, #44]
 	b	.L70
 .LVL69:
 .L23:
 .LBB45:
 .LBB38:
-	.loc 1 132 0
+	.loc 1 137 0
 	ldr	r1, [r10, #8]
 	str	r3, [sp, #16]
 	bl	__aeabi_idivmod
@@ -523,7 +523,7 @@ spl_load_fit_image:
 .LBE45:
 .LBB46:
 .LBB44:
-	.loc 1 118 0
+	.loc 1 123 0
 	ldr	r1, [r10, #8]
 	bl	__aeabi_idiv
 .LVL72:
@@ -532,12 +532,12 @@ spl_load_fit_image:
 .L68:
 .LBE44:
 .LBE46:
-	.loc 1 257 0
+	.loc 1 262 0
 	ldr	r3, [sp, #52]
 	str	r3, [sp, #48]
 .LVL74:
 .L30:
-	.loc 1 261 0
+	.loc 1 266 0
 	ldrb	r3, [sp, #27]	@ zero_extendqisi2
 .LBB47:
 .LBB48:
@@ -548,10 +548,10 @@ spl_load_fit_image:
 	mov	r0, r4
 .LBE48:
 .LBE47:
-	.loc 1 261 0
+	.loc 1 266 0
 	cbz	r3, .L32
 .LVL75:
-	.loc 1 261 0 is_stmt 0 discriminator 1
+	.loc 1 266 0 is_stmt 0 discriminator 1
 	cmp	r3, #6
 	beq	.L32
 .LVL76:
@@ -562,7 +562,7 @@ spl_load_fit_image:
 .LVL77:
 .LBE49:
 .LBE51:
-	.loc 1 264 0
+	.loc 1 269 0
 	movs	r3, #0
 .LBB52:
 .LBB50:
@@ -571,16 +571,16 @@ spl_load_fit_image:
 .LVL78:
 .LBE50:
 .LBE52:
-	.loc 1 264 0
+	.loc 1 269 0
 	ldr	r2, .L72+8
 	mov	r1, r5
 	mov	r0, r4
-	.loc 1 262 0
+	.loc 1 267 0
 	ldr	r8, [sp, #44]
-	.loc 1 264 0
+	.loc 1 269 0
 	bl	fdt_getprop
 .LVL79:
-	.loc 1 262 0
+	.loc 1 267 0
 	ldr	r3, [sp, #48]
 	mov	r1, r7
 	mov	r2, r8
@@ -590,7 +590,7 @@ spl_load_fit_image:
 	bl	printf
 .LVL80:
 .L33:
-	.loc 1 274 0
+	.loc 1 279 0
 	ldr	r3, [sp, #32]
 	mov	r1, r5
 	ldr	r2, [sp, #48]
@@ -598,7 +598,7 @@ spl_load_fit_image:
 	bl	fit_image_verify_with_data
 .LVL81:
 	cbz	r0, .L38
-	.loc 1 279 0
+	.loc 1 284 0
 	add	r3, sp, #32
 	add	r2, sp, #44
 	mov	r1, r5
@@ -607,11 +607,11 @@ spl_load_fit_image:
 	add	r3, sp, #48
 	bl	board_fit_image_post_process
 .LVL82:
-	.loc 1 282 0
+	.loc 1 287 0
 	ldr	r0, .L72+16
 	bl	puts
 .LVL83:
-	.loc 1 296 0
+	.loc 1 301 0
 	ldr	r2, [sp, #32]
 	ldr	r1, [sp, #48]
 	ldr	r0, [sp, #44]
@@ -627,7 +627,7 @@ spl_load_fit_image:
 .LVL86:
 .LBE54:
 .LBE53:
-	.loc 1 267 0
+	.loc 1 272 0
 	ldr	r2, [sp, #44]
 	mov	r1, r0
 	ldr	r0, .L72+20
@@ -636,17 +636,17 @@ spl_load_fit_image:
 	b	.L33
 .LVL88:
 .L37:
-	.loc 1 239 0
+	.loc 1 244 0
 	mvn	r0, #4
 	b	.L16
 .LVL89:
 .L38:
-	.loc 1 276 0
+	.loc 1 281 0
 	mov	r0, #-1
 	b	.L16
 .LVL90:
 .L21:
-	.loc 1 251 0
+	.loc 1 256 0
 	add	r3, sp, #32
 	add	r2, sp, #52
 	mov	r1, r5
@@ -655,12 +655,12 @@ spl_load_fit_image:
 .LVL91:
 	cmp	r0, #0
 	beq	.L68
-	.loc 1 252 0
+	.loc 1 257 0
 	ldr	r0, .L72+24
 	bl	puts
 .LVL92:
 .L40:
-	.loc 1 217 0
+	.loc 1 222 0
 	mvn	r0, #1
 .LVL93:
 	b	.L16
@@ -675,7 +675,7 @@ spl_load_fit_image:
 	.word	.LC11
 	.word	.LC8
 	.cfi_endproc
-.LFE210:
+.LFE207:
 	.size	spl_load_fit_image, .-spl_load_fit_image
 	.section	.text.spl_fit_append_fdt,"ax",%progbits
 	.align	1
@@ -685,8 +685,8 @@ spl_load_fit_image:
 	.fpu softvfp
 	.type	spl_fit_append_fdt, %function
 spl_fit_append_fdt:
-.LFB211:
-	.loc 1 311 0
+.LFB208:
+	.loc 1 316 0
 	.cfi_startproc
 	@ args = 8, pretend = 0, frame = 48
 	@ frame_needed = 0, uses_anonymous_args = 0
@@ -701,11 +701,11 @@ spl_fit_append_fdt:
 	mov	r5, r3
 	sub	sp, sp, #60
 	.cfi_def_cfa_offset 80
-	.loc 1 311 0
+	.loc 1 316 0
 	mov	r4, r0
 	mov	r6, r1
 	mov	r7, r2
-	.loc 1 316 0
+	.loc 1 321 0
 	movs	r3, #0
 .LVL95:
 	ldr	r2, .L76
@@ -716,21 +716,21 @@ spl_fit_append_fdt:
 .LVL98:
 	bl	spl_fit_get_image_node
 .LVL99:
-	.loc 1 317 0
+	.loc 1 322 0
 	cmp	r0, #0
 	blt	.L74
-	.loc 1 326 0
+	.loc 1 331 0
 	ldr	r2, [r4, #32]
-	.loc 1 327 0
+	.loc 1 332 0
 	mov	r1, r7
-	.loc 1 326 0
+	.loc 1 331 0
 	ldr	r3, [r4, #8]
 	add	r3, r3, r2
-	.loc 1 327 0
+	.loc 1 332 0
 	mov	r2, r5
-	.loc 1 326 0
+	.loc 1 331 0
 	str	r3, [sp, #20]
-	.loc 1 327 0
+	.loc 1 332 0
 	add	r3, sp, #12
 	stm	sp, {r0, r3}
 	mov	r0, r6
@@ -738,21 +738,21 @@ spl_fit_append_fdt:
 	ldr	r3, [sp, #84]
 	bl	spl_load_fit_image
 .LVL101:
-	.loc 1 330 0
+	.loc 1 335 0
 	cmp	r0, #0
 	blt	.L74
-	.loc 1 334 0
+	.loc 1 339 0
 	ldr	r0, [sp, #20]
 .LVL102:
-	.loc 1 337 0
+	.loc 1 342 0
 	mov	r1, #8192
-	.loc 1 334 0
+	.loc 1 339 0
 	str	r0, [r4, #20]
-	.loc 1 337 0
+	.loc 1 342 0
 	bl	fdt_shrink_to_minimum
 .LVL103:
 .L74:
-	.loc 1 341 0
+	.loc 1 346 0
 	add	sp, sp, #60
 	.cfi_def_cfa_offset 20
 	@ sp needed
@@ -763,7 +763,7 @@ spl_fit_append_fdt:
 .L76:
 	.word	.LC0
 	.cfi_endproc
-.LFE211:
+.LFE208:
 	.size	spl_fit_append_fdt, .-spl_fit_append_fdt
 	.section	.text.spl_fit_load_blob,"ax",%progbits
 	.align	1
@@ -773,8 +773,8 @@ spl_fit_append_fdt:
 	.fpu softvfp
 	.type	spl_fit_load_blob, %function
 spl_fit_load_blob:
-.LFB215:
-	.loc 1 383 0
+.LFB212:
+	.loc 1 388 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
@@ -789,35 +789,35 @@ spl_fit_load_blob:
 	.cfi_offset 6, -12
 	.cfi_offset 7, -8
 	.cfi_offset 14, -4
-	.loc 1 383 0
+	.loc 1 388 0
 	mov	r4, r0
 	mov	r5, r1
 	rev	r2, r2
 .LVL107:
-	.loc 1 396 0
+	.loc 1 401 0
 	addw	r2, r2, #511
 .LVL108:
-	.loc 1 397 0
+	.loc 1 402 0
 	bic	r0, r2, #510
 .LVL109:
 	bic	r0, r0, #1
 	str	r0, [r3]
-	.loc 1 416 0
+	.loc 1 421 0
 	ldr	r3, .L81
 .LVL110:
 	ldr	r1, [r4, #8]
 .LVL111:
 	subs	r3, r3, r1
 	subs	r3, r3, r0
-	.loc 1 417 0
+	.loc 1 422 0
 	bic	r6, r3, #63
 .LVL112:
 .LBB61:
 .LBB62:
-	.loc 1 140 0
+	.loc 1 145 0
 	ldr	r3, [r4, #12]
 	cbnz	r3, .L79
-	.loc 1 143 0
+	.loc 1 148 0
 	add	r0, r0, r1
 .LVL113:
 	subs	r0, r0, #1
@@ -826,7 +826,7 @@ spl_fit_load_blob:
 .L79:
 .LBE62:
 .LBE61:
-	.loc 1 419 0
+	.loc 1 424 0
 	mov	r2, r0
 	ldr	r7, [r4, #16]
 	mov	r3, r6
@@ -834,9 +834,9 @@ spl_fit_load_blob:
 	mov	r0, r4
 	blx	r7
 .LVL115:
-	.loc 1 422 0
+	.loc 1 427 0
 	cmp	r0, #0
-	.loc 1 426 0
+	.loc 1 431 0
 	ite	ne
 	movne	r0, r6
 .LVL116:
@@ -848,8 +848,31 @@ spl_fit_load_blob:
 .L81:
 	.word	4194241
 	.cfi_endproc
-.LFE215:
+.LFE212:
 	.size	spl_fit_load_blob, .-spl_fit_load_blob
+	.section	.text.fit_config_verify,"ax",%progbits
+	.align	1
+	.weak	fit_config_verify
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	fit_config_verify, %function
+fit_config_verify:
+.LFB201:
+	.loc 1 21 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL118:
+	.loc 1 23 0
+	movs	r0, #0
+.LVL119:
+	bx	lr
+	.cfi_endproc
+.LFE201:
+	.size	fit_config_verify, .-fit_config_verify
 	.section	.text.spl_fit_standalone_release,"ax",%progbits
 	.align	1
 	.weak	spl_fit_standalone_release
@@ -859,19 +882,19 @@ spl_fit_load_blob:
 	.fpu softvfp
 	.type	spl_fit_standalone_release, %function
 spl_fit_standalone_release:
-.LFB214:
-	.loc 1 376 0
+.LFB211:
+	.loc 1 381 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL118:
-	.loc 1 378 0
+.LVL120:
+	.loc 1 383 0
 	movs	r0, #0
-.LVL119:
+.LVL121:
 	bx	lr
 	.cfi_endproc
-.LFE214:
+.LFE211:
 	.size	spl_fit_standalone_release, .-spl_fit_standalone_release
 	.section	.text.spl_kernel_partition,"ax",%progbits
 	.align	1
@@ -882,23 +905,23 @@ spl_fit_standalone_release:
 	.fpu softvfp
 	.type	spl_kernel_partition, %function
 spl_kernel_partition:
-.LFB216:
-	.loc 1 432 0
+.LFB213:
+	.loc 1 437 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL120:
-	.loc 1 434 0
-	ldr	r0, .L85
-.LVL121:
+.LVL122:
+	.loc 1 439 0
+	ldr	r0, .L86
+.LVL123:
 	bx	lr
-.L86:
+.L87:
 	.align	2
-.L85:
+.L86:
 	.word	.LC14
 	.cfi_endproc
-.LFE216:
+.LFE213:
 	.size	spl_kernel_partition, .-spl_kernel_partition
 	.section	.text.spl_load_simple_fit,"ax",%progbits
 	.align	1
@@ -909,12 +932,12 @@ spl_kernel_partition:
 	.fpu softvfp
 	.type	spl_load_simple_fit, %function
 spl_load_simple_fit:
-.LFB219:
-	.loc 1 755 0
+.LFB216:
+	.loc 1 760 0
 	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 248
+	@ args = 0, pretend = 0, frame = 216
 	@ frame_needed = 1, uses_anonymous_args = 0
-.LVL122:
+.LVL124:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
 	.cfi_offset 4, -32
@@ -925,349 +948,419 @@ spl_load_simple_fit:
 	.cfi_offset 10, -12
 	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	sub	sp, sp, #264
-	.cfi_def_cfa_offset 296
-	add	r7, sp, #16
-	.cfi_def_cfa 7, 280
-.LVL123:
-	.loc 1 755 0
-	mov	r5, r1
+	sub	sp, sp, #232
+	.cfi_def_cfa_offset 264
 	mov	r4, r0
-	str	r2, [r7, #28]
-.LVL124:
-	mov	r2, r3
+	mov	r6, r1
+	add	r7, sp, #16
+	.cfi_def_cfa 7, 248
+	.loc 1 760 0
+	mov	r10, r2
 .LVL125:
-	ldr	r3, [r3]
+	.loc 1 762 0
+	mvn	fp, #21
+	.loc 1 760 0
+	str	r3, [r7, #20]
+	.loc 1 765 0
+	movs	r3, #0
 .LVL126:
-	.loc 1 771 0
-	ldr	r1, .L145
+	str	r3, [r7, #24]
 .LVL127:
-	rev	r3, r3
+.L125:
+	.loc 1 766 0
+	ldr	r3, [r7, #24]
+	cmp	r3, #1
+	bne	.L89
+	.loc 1 768 0
+	ldr	r1, [r6, #8]
+	mov	r0, #2097152
+	bl	__aeabi_idiv
 .LVL128:
-	cmp	r3, r1
-	str	r1, [r7]
-	beq	.L88
-	.loc 1 772 0
-	ldr	r0, .L145+4
+	.loc 1 767 0
+	add	r10, r10, r0
 .LVL129:
+	.loc 1 769 0
+	ldr	r0, .L158
+	mov	r1, r10
 	bl	printf
 .LVL130:
-	.loc 1 773 0
-	mvn	r0, #21
+	.loc 1 770 0
+	ldr	r5, [r6, #16]
+	mov	r1, r10
+	ldr	r3, [r7, #20]
+	mov	r0, r6
+	ldr	r2, [r7, #24]
+	blx	r5
 .LVL131:
-.L87:
-	.loc 1 787 0
-	adds	r7, r7, #248
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-	mov	sp, r7
-	.cfi_def_cfa_register 13
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+	cmp	r0, #1
+	beq	.L89
+	.loc 1 771 0
+	ldr	r0, .L158+4
+.L157:
+	.loc 1 777 0
+	bl	printf
 .LVL132:
-.L88:
-	.cfi_restore_state
-.LBB82:
-.LBB83:
-	.loc 1 564 0
-	add	r3, r7, #36
-	ldr	r1, [r7, #28]
-	mov	r0, r5
+.L90:
+	.loc 1 765 0 discriminator 2
+	ldr	r3, [r7, #24]
+	adds	r3, r3, #1
+	cmp	r3, #2
+	str	r3, [r7, #24]
 .LVL133:
-	bl	spl_fit_load_blob
+	beq	.L88
+	b	.L125
 .LVL134:
-	.loc 1 565 0
-	mov	r6, r0
-	cmp	r0, #0
-	beq	.L90
-	.loc 1 571 0
-	ldr	r1, .L145+8
-	bl	fdt_path_offset
+.L89:
+	ldr	r3, [r7, #20]
+	.loc 1 776 0
+	ldr	r2, .L158+8
+	ldr	r3, [r3]
+	rev	r3, r3
 .LVL135:
-	.loc 1 572 0
-	subs	r10, r0, #0
-	blt	.L90
-	.loc 1 578 0
-	bl	fit_board_verify_required_sigs
-.LVL136:
-	mov	r8, r0
-	cbz	r0, .L91
-	.loc 1 580 0
-	ldr	r0, .L145+12
-	bl	printf
-.LVL137:
-	.loc 1 581 0
-	bl	hang
-.LVL138:
+	cmp	r3, r2
+	beq	.L91
+	.loc 1 777 0
+	ldr	r0, .L158+12
+	b	.L157
 .L91:
-	.loc 1 627 0
-	mov	r3, r0
-	ldr	r2, .L145+16
+.LVL136:
+.LBB82:
+.LBB83:
+	.loc 1 569 0
+	add	r3, r7, #40
+	ldr	r2, [r7, #20]
 	mov	r1, r10
 	mov	r0, r6
-	bl	spl_fit_get_image_node
+	bl	spl_fit_load_blob
+.LVL137:
+	.loc 1 570 0
+	mov	r5, r0
+	cmp	r0, #0
+	beq	.L92
+	.loc 1 576 0
+	ldr	r1, .L158+16
+	bl	fdt_path_offset
+.LVL138:
+	.loc 1 577 0
+	subs	r3, r0, #0
+	str	r3, [r7, #28]
+	blt	.L92
+	.loc 1 583 0
+	bl	fit_board_verify_required_sigs
 .LVL139:
-	.loc 1 629 0
-	subs	fp, r0, #0
-	ble	.L92
-	.loc 1 631 0
-	add	r3, r7, #92
-	str	fp, [sp]
-	str	r3, [sp, #4]
-	mov	r2, r6
-	ldr	r3, [r7, #36]
+	.loc 1 593 0
+	movs	r1, #0
 	mov	r0, r5
+	bl	fit_conf_get_node
 .LVL140:
-	ldr	r1, [r7, #28]
-	bl	spl_load_fit_image
+	.loc 1 594 0
+	subs	r1, r0, #0
+	bgt	.L93
+	.loc 1 595 0
+	ldr	r0, .L158+20
 .LVL141:
-	.loc 1 633 0
-	cbnz	r0, .L94
-	.loc 1 634 0
-	ldr	r3, [r7, #104]
-	adds	r3, r3, #1
-	.loc 1 635 0
-	itt	eq
-	ldreq	r3, [r7, #100]
-	streq	r3, [r7, #104]
-	.loc 1 637 0
-	ldr	r0, [r7, #104]
+	bl	printf
 .LVL142:
-	bl	spl_fit_standalone_release
+	.loc 1 596 0
+	mvn	r0, #21
 .LVL143:
-	.loc 1 638 0
-	mov	r1, r0
-	cbz	r0, .L94
-	.loc 1 639 0
-	ldr	r0, .L145+20
+.L94:
+	mov	fp, r0
+	b	.L90
 .LVL144:
-	bl	printf
+.L93:
+	.loc 1 599 0
+	mov	r0, r5
 .LVL145:
-.L94:
-	.loc 1 654 0
-	movs	r3, #0
-	ldr	r2, .L145+24
-	mov	r1, r10
-	mov	r0, r6
-	bl	spl_fit_get_image_node
+	bl	fit_config_verify
 .LVL146:
-	.loc 1 660 0
-	subs	fp, r0, #0
-	bge	.L97
-	.loc 1 662 0
-	movs	r3, #0
-	ldr	r2, .L145+28
-	mov	r1, r10
-	mov	r0, r6
+	.loc 1 600 0
+	mov	fp, r0
+	cbz	r0, .L95
+	.loc 1 601 0
+	mov	r1, r0
+	ldr	r0, .L158+24
 .LVL147:
-	bl	spl_fit_get_image_node
+	bl	printf
 .LVL148:
-	.loc 1 669 0
-	subs	fp, r0, #0
-	blt	.L90
-	.loc 1 667 0
-	mov	r8, #1
-	b	.L97
+	mov	r0, fp
+	b	.L94
+.L95:
+	.loc 1 604 0
+	ldr	r0, .L158+28
+	bl	printf
 .LVL149:
-.L92:
-	.loc 1 653 0
-	bne	.L94
-	mov	r8, fp
-.LVL150:
-.L97:
-	.loc 1 676 0
-	str	r4, [sp, #4]
-	mov	r2, r6
-	str	fp, [sp]
+	.loc 1 632 0
+	mov	r3, fp
+	ldr	r2, .L158+32
+	ldr	r1, [r7, #28]
 	mov	r0, r5
+	bl	spl_fit_get_image_node
+.LVL150:
+	.loc 1 634 0
+	subs	r8, r0, #0
+	ble	.L96
+	.loc 1 636 0
+	add	r3, r7, #96
+	str	r8, [sp]
+	str	r3, [sp, #4]
+	mov	r2, r5
+	ldr	r3, [r7, #40]
+	mov	r1, r10
+	mov	r0, r6
 .LVL151:
-	ldr	r3, [r7, #36]
-	ldr	r1, [r7, #28]
 	bl	spl_load_fit_image
 .LVL152:
-	.loc 1 678 0
-	cmp	r0, #0
-	bne	.L87
+	.loc 1 638 0
+	cbnz	r0, .L98
+	.loc 1 639 0
+	ldr	r3, [r7, #108]
+	adds	r3, r3, #1
+	.loc 1 640 0
+	itt	eq
+	ldreq	r3, [r7, #104]
+	streq	r3, [r7, #108]
+	.loc 1 642 0
+	ldr	r0, [r7, #108]
 .LVL153:
-.LBB84:
-.LBB85:
-	.loc 1 371 0
-	adds	r2, r4, #4
+	bl	spl_fit_standalone_release
 .LVL154:
-	mov	r1, fp
-	mov	r0, r6
+	.loc 1 643 0
+	mov	r1, r0
+	cbz	r0, .L98
+	.loc 1 644 0
+	ldr	r0, .L158+36
 .LVL155:
-	bl	fit_image_get_os
+	bl	printf
 .LVL156:
-.LBE85:
-.LBE84:
-	.loc 1 685 0
-	cbz	r0, .L99
-	.loc 1 689 0
-	movs	r3, #17
-	strb	r3, [r4, #4]
-.L99:
-	.loc 1 696 0
-	ldrb	r3, [r4, #4]	@ zero_extendqisi2
-	cmp	r3, #17
-	bne	.L107
-	.loc 1 697 0
-	ldr	r3, [r7, #36]
-	mov	r1, r5
-	str	r10, [sp]
-	mov	r0, r4
-	str	r3, [sp, #4]
-	mov	r3, r6
-	ldr	r2, [r7, #28]
-	bl	spl_fit_append_fdt
-.LVL157:
-.L107:
-.LBB86:
-	.loc 1 702 0
+.L98:
+	.loc 1 659 0
 	movs	r3, #0
-	.loc 1 704 0
-	ldr	r2, .L145+28
-	.loc 1 702 0
-	strb	r3, [r7, #32]
-	.loc 1 704 0
+	ldr	r2, .L158+40
+	ldr	r1, [r7, #28]
+	mov	r0, r5
+	bl	spl_fit_get_image_node
+.LVL157:
+	.loc 1 665 0
+	subs	r8, r0, #0
+	bge	.L101
+	.loc 1 667 0
+	movs	r3, #0
+	ldr	r2, .L158+44
+	ldr	r1, [r7, #28]
+	mov	r0, r5
+.LVL158:
+	bl	spl_fit_get_image_node
+.LVL159:
+	.loc 1 674 0
+	subs	r8, r0, #0
+	blt	.L92
+	.loc 1 672 0
+	mov	fp, #1
+	b	.L101
+.LVL160:
+.L96:
+	.loc 1 658 0
+	bne	.L98
+	mov	fp, r8
+.LVL161:
+.L101:
+	.loc 1 681 0
+	str	r4, [sp, #4]
+	mov	r2, r5
+	str	r8, [sp]
 	mov	r1, r10
-	mov	r3, r8
+	ldr	r3, [r7, #40]
 	mov	r0, r6
+.LVL162:
+	bl	spl_load_fit_image
+.LVL163:
+	.loc 1 683 0
+	cmp	r0, #0
+	bne	.L94
+.LVL164:
+.LBB84:
+.LBB85:
+	.loc 1 376 0
+	adds	r2, r4, #4
+.LVL165:
+	mov	r1, r8
+	mov	r0, r5
+.LVL166:
+	bl	fit_image_get_os
+.LVL167:
+.LBE85:
+.LBE84:
+	.loc 1 690 0
+	cbz	r0, .L102
+	.loc 1 694 0
+	movs	r3, #17
+	strb	r3, [r4, #4]
+.L102:
+	.loc 1 701 0
+	ldrb	r3, [r4, #4]	@ zero_extendqisi2
+	cmp	r3, #17
+	bne	.L110
+	.loc 1 702 0
+	ldr	r3, [r7, #40]
+	mov	r2, r10
+	mov	r1, r6
+	mov	r0, r4
+	str	r3, [sp, #4]
+	ldr	r3, [r7, #28]
+	str	r3, [sp]
+	mov	r3, r5
+	bl	spl_fit_append_fdt
+.LVL168:
+.L110:
+.LBB86:
+	.loc 1 707 0
+	movs	r3, #0
+	.loc 1 709 0
+	ldr	r2, .L158+44
+	.loc 1 707 0
+	strb	r3, [r7, #36]
+	.loc 1 709 0
+	mov	r0, r5
+	mov	r3, fp
+	ldr	r1, [r7, #28]
 	bl	spl_fit_get_image_node
-.LVL158:
-	.loc 1 705 0
+.LVL169:
+	.loc 1 710 0
 	subs	r3, r0, #0
-	blt	.L101
-.LVL159:
+	str	r3, [r7, #24]
+	blt	.L104
+.LVL170:
 .LBB87:
 .LBB88:
-	.loc 1 371 0
-	add	r2, r7, #32
-.LVL160:
+	.loc 1 376 0
 	mov	r1, r3
-	mov	r0, r6
-.LVL161:
-	str	r3, [r7, #24]
+	add	r2, r7, #36
+.LVL171:
+	mov	r0, r5
+.LVL172:
 	bl	fit_image_get_os
-.LVL162:
+.LVL173:
 .LBE88:
 .LBE87:
-	.loc 1 712 0
-	ldr	r2, [r4, #28]
+	.loc 1 717 0
+	ldr	r3, [r4, #28]
+	cmp	r3, #2
+	bne	.L105
+	ldrb	r3, [r7, #36]	@ zero_extendqisi2
+	cmp	r3, #17
+	beq	.L113
+.L105:
+	.loc 1 721 0
+	add	r8, r7, #96
+	mov	r2, r5
+	str	r8, [sp, #4]
+	mov	r1, r10
 	ldr	r3, [r7, #24]
-	cmp	r2, #2
-	bne	.L102
-	ldrb	r2, [r7, #32]	@ zero_extendqisi2
-	cmp	r2, #17
-	beq	.L110
-.L102:
-	.loc 1 716 0
-	add	fp, r7, #92
-	mov	r2, r6
-	stm	sp, {r3, fp}
-	mov	r0, r5
-	ldr	r3, [r7, #36]
-	ldr	r1, [r7, #28]
+	mov	r0, r6
+	str	r3, [sp]
+	ldr	r3, [r7, #40]
 	bl	spl_load_fit_image
-.LVL163:
-	.loc 1 718 0
+.LVL174:
+	.loc 1 723 0
 	cmp	r0, #0
-	blt	.L110
-	.loc 1 721 0
-	ldrb	r3, [r7, #32]	@ zero_extendqisi2
+	blt	.L113
+	.loc 1 726 0
+	ldrb	r3, [r7, #36]	@ zero_extendqisi2
 	cmp	r3, #17
-	bne	.L104
-	.loc 1 722 0
-	ldr	r3, [r7, #36]
-	mov	r1, r5
-	str	r10, [sp]
-	mov	r0, fp
-.LVL164:
+	bne	.L107
+	.loc 1 727 0
+	ldr	r3, [r7, #40]
+	mov	r2, r10
+	mov	r1, r6
+	mov	r0, r8
+.LVL175:
 	str	r3, [sp, #4]
-	mov	r3, r6
-	ldr	r2, [r7, #28]
+	ldr	r3, [r7, #28]
+	str	r3, [sp]
+	mov	r3, r5
 	bl	spl_fit_append_fdt
-.LVL165:
-	.loc 1 724 0
-	ldr	r3, [r7, #112]
+.LVL176:
+	.loc 1 729 0
+	ldr	r3, [r7, #116]
 	str	r3, [r4, #20]
-.L104:
-	.loc 1 731 0
+.L107:
+	.loc 1 736 0
 	ldr	r3, [r4, #12]
 	adds	r3, r3, #1
-	bne	.L105
-	.loc 1 732 0
-	ldr	r3, [r7, #104]
-	.loc 1 731 0
+	bne	.L108
+	.loc 1 737 0
+	ldr	r3, [r7, #108]
+	.loc 1 736 0
 	adds	r2, r3, #1
-	.loc 1 733 0
+	.loc 1 738 0
 	it	ne
 	strne	r3, [r4, #12]
-.L105:
-	.loc 1 736 0
+.L108:
+	.loc 1 741 0
 	ldr	r3, [r4, #20]
 	str	r3, [r7, #24]
-.LVL166:
+.LVL177:
 	cmp	r3, #0
-	beq	.L110
-.LVL167:
+	beq	.L113
+.LVL178:
 .LBB89:
 .LBB90:
-	.loc 1 351 0
-	add	r3, r7, #48
-.LVL168:
-	mov	r2, r8
-	ldr	r1, .L145+28
-	mov	r0, r6
+	.loc 1 356 0
+	add	r3, r7, #52
+.LVL179:
+	mov	r2, fp
+	ldr	r1, .L158+44
+	mov	r0, r5
 	bl	spl_fit_get_image_name.isra.0
-.LVL169:
-	.loc 1 353 0
+.LVL180:
+	.loc 1 358 0
 	cmp	r0, #0
-	blt	.L110
-	.loc 1 356 0
-	mov	r3, r8
-	ldr	r2, .L145+28
-	mov	r1, r10
-	mov	r0, r6
-.LVL170:
+	blt	.L113
+	.loc 1 361 0
+	mov	r3, fp
+	ldr	r2, .L158+44
+	ldr	r1, [r7, #28]
+	mov	r0, r5
+.LVL181:
 	bl	spl_fit_get_image_node
-.LVL171:
-	.loc 1 358 0
-	ldr	r3, [r7, #48]
-	.loc 1 360 0
+.LVL182:
+	.loc 1 363 0
+	ldr	r3, [r7, #52]
+	.loc 1 365 0
 	mov	r1, r0
-	.loc 1 356 0
-	mov	fp, r0
-.LVL172:
-	.loc 1 360 0
-	ldr	r2, .L145+32
-	mov	r0, r6
-.LVL173:
-	.loc 1 358 0
+	.loc 1 361 0
+	mov	r8, r0
+.LVL183:
+	.loc 1 365 0
+	ldr	r2, .L158+48
+	mov	r0, r5
+.LVL184:
+	.loc 1 363 0
 	str	r3, [r7, #20]
-	ldr	r3, [r7, #100]
+	ldr	r3, [r7, #104]
 	str	r3, [r7, #16]
-	ldr	r3, [r7, #124]
+	ldr	r3, [r7, #128]
 	str	r3, [r7, #12]
-	ldr	r3, [r7, #104]
+	ldr	r3, [r7, #108]
 	str	r3, [r7, #8]
-	.loc 1 360 0
+	.loc 1 365 0
 	movs	r3, #0
 	bl	fdt_getprop
-.LVL174:
-	.loc 1 361 0
+.LVL185:
+	.loc 1 366 0
 	movs	r3, #0
-	.loc 1 360 0
+	.loc 1 365 0
 	str	r0, [r7, #4]
-	.loc 1 361 0
-	ldr	r2, .L145+36
-	mov	r1, fp
-	mov	r0, r6
+	.loc 1 366 0
+	ldr	r2, .L158+52
+	mov	r1, r8
+	mov	r0, r5
 	bl	fdt_getprop
-.LVL175:
-	.loc 1 358 0
+.LVL186:
+	.loc 1 363 0
 	str	r0, [sp, #12]
-	mov	r1, r8
+	mov	r1, fp
 	ldr	r3, [r7, #4]
 	str	r3, [sp, #8]
 	ldr	r3, [r7, #8]
@@ -1278,263 +1371,322 @@ spl_load_simple_fit:
 	ldr	r2, [r7, #20]
 	ldr	r0, [r7, #24]
 	bl	fdt_record_loadable
-.LVL176:
-.L110:
+.LVL187:
+.L113:
 .LBE90:
 .LBE89:
 .LBE86:
-	.loc 1 701 0
-	add	r8, r8, #1
-.LVL177:
-	b	.L107
-.LVL178:
-.L101:
-	.loc 1 747 0
+	.loc 1 706 0
+	add	fp, fp, #1
+.LVL188:
+	b	.L110
+.LVL189:
+.L104:
+	.loc 1 752 0
 	ldr	r3, [r4, #12]
 	subs	r3, r3, #1
 	adds	r3, r3, #3
-	bls	.L109
-	.loc 1 748 0
+	bls	.L112
+	.loc 1 753 0
 	ldr	r3, [r4, #8]
 	str	r3, [r4, #12]
-.L109:
-.LVL179:
+.L112:
+.LVL190:
 .LBE83:
 .LBE82:
 .LBB92:
 .LBB93:
-	.loc 1 449 0
-	ldr	r3, .L145+40
-	.loc 1 439 0
-	str	sp, [r7, #24]
-	.loc 1 449 0
+	.loc 1 454 0
+	ldr	r3, .L158+56
+	.loc 1 444 0
+	str	sp, [r7, #20]
+	.loc 1 454 0
 	ldm	r3, {r0, r1, r2}
-	add	r3, r7, #36
+	add	r3, r7, #40
 	stm	r3, {r0, r1, r2}
-.LVL180:
-	.loc 1 451 0
-	ldr	r3, [r5, #8]
+.LVL191:
+	.loc 1 456 0
+	ldr	r3, [r6, #8]
 	adds	r3, r3, #7
 	bic	r3, r3, #7
 	sub	sp, sp, r3
-.LVL181:
-	.loc 1 458 0
+	.loc 1 463 0
 	ldr	r3, [r4, #28]
-	.loc 1 451 0
-	add	r10, sp, #16
-.LVL182:
-	.loc 1 458 0
+	.loc 1 456 0
+	add	r8, sp, #16
+.LVL192:
+	.loc 1 463 0
 	cmp	r3, #2
-	bne	.L119
-.LVL183:
-	.loc 1 465 0
-	mov	r1, r5
+	bne	.L126
+.LVL193:
+	.loc 1 470 0
+	mov	r1, r6
 	mov	r0, r4
 	bl	spl_kernel_partition
-.LVL184:
-	.loc 1 466 0
-	add	r2, r7, #92
+.LVL194:
+	.loc 1 471 0
+	add	r2, r7, #96
 	mov	r1, r0
-	ldr	r0, [r5]
-.LVL185:
+	ldr	r0, [r6]
+.LVL195:
 	bl	part_get_info_by_name
-.LVL186:
+.LVL196:
 	cmp	r0, #0
-	bgt	.L111
-	.loc 1 467 0
-	ldr	r1, .L145+44
-	ldr	r0, .L145+48
-.L144:
-	.loc 1 480 0
+	bgt	.L114
+	.loc 1 472 0
+	ldr	r1, .L158+60
+	ldr	r0, .L158+64
+.L155:
+	.loc 1 485 0
 	bl	printf
-.LVL187:
-	.loc 1 481 0
-	mvn	r0, #21
-.LVL188:
-.L112:
-	ldr	sp, [r7, #24]
-.LVL189:
+.LVL197:
+.L156:
+	.loc 1 486 0
+	mvn	fp, #21
+.LVL198:
+.L115:
+	ldr	sp, [r7, #20]
+.LVL199:
+.L88:
 .LBE93:
 .LBE92:
-	.loc 1 782 0
-	b	.L87
-.LVL190:
-.L111:
+	.loc 1 792 0
+	mov	r0, fp
+	adds	r7, r7, #216
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	mov	sp, r7
+	.cfi_def_cfa_register 13
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL200:
+.L114:
+	.cfi_restore_state
 .LBB95:
 .LBB94:
-	.loc 1 470 0
-	ldr	r8, [r7, #92]
-.LVL191:
-	.loc 1 474 0
-	mov	r3, r10
-	ldr	r6, [r5, #16]
+	.loc 1 475 0
+	ldr	r3, [r7, #96]
+	.loc 1 479 0
 	movs	r2, #1
-	mov	r0, r5
-	mov	r1, r8
-	blx	r6
-.LVL192:
-	cmp	r0, #1
-	bne	.L121
-.LVL193:
-	ldr	r3, [r10]
+	ldr	r5, [r6, #16]
+	mov	r0, r6
+	.loc 1 475 0
+	str	r3, [r7, #28]
+.LVL201:
 	.loc 1 479 0
-	ldr	r2, [r7]
+	mov	r3, r8
+.LVL202:
+	ldr	r1, [r7, #28]
+	blx	r5
+.LVL203:
+	cmp	r0, #1
+	bne	.L128
+.LVL204:
+	ldr	r3, [r8]
+	.loc 1 484 0
+	ldr	r2, .L158+8
 	rev	r3, r3
-.LVL194:
+.LVL205:
 	cmp	r3, r2
-	beq	.L113
-	.loc 1 480 0
-	ldr	r1, .L145+44
-	ldr	r0, .L145+52
-	b	.L144
-.L113:
-	.loc 1 484 0
-	add	r3, r7, #32
-	mov	r2, r10
-	mov	r1, r8
-	mov	r0, r5
-	bl	spl_fit_load_blob
-.LVL195:
+	beq	.L116
 	.loc 1 485 0
-	str	r0, [r7, #28]
-.LVL196:
+	ldr	r1, .L158+60
+	ldr	r0, .L158+68
+	b	.L155
+.L159:
+	.align	2
+.L158:
+	.word	.LC15
+	.word	.LC16
+	.word	-804389139
+	.word	.LC17
+	.word	.LC18
+	.word	.LC19
+	.word	.LC20
+	.word	.LC21
+	.word	.LC22
+	.word	.LC23
+	.word	.LC24
+	.word	.LC25
+	.word	.LC26
+	.word	.LC27
+	.word	.LANCHOR1
+	.word	.LANCHOR0
+	.word	.LC28
+	.word	.LC29
+.L116:
+	.loc 1 489 0
+	mov	r2, r8
+	add	r3, r7, #36
+	ldr	r1, [r7, #28]
+	mov	r0, r6
+	bl	spl_fit_load_blob
+.LVL206:
+	.loc 1 490 0
+	mov	r8, r0
+.LVL207:
 	cmp	r0, #0
-	beq	.L122
+	beq	.L129
+	.loc 1 499 0
+	movs	r1, #0
+	bl	fit_conf_get_node
+.LVL208:
+	.loc 1 500 0
+	subs	r1, r0, #0
+	bgt	.L117
+	.loc 1 501 0
+	ldr	r0, .L160
+.LVL209:
+	bl	printf
+.LVL210:
+	b	.L156
+.LVL211:
+.L117:
+	.loc 1 505 0
+	mov	r0, r8
+.LVL212:
+	bl	fit_config_verify
+.LVL213:
+	.loc 1 506 0
+	mov	fp, r0
+	cbz	r0, .L118
 	.loc 1 507 0
-	ldr	r1, .L145+8
-	bl	fdt_path_offset
-.LVL197:
-	.loc 1 508 0
-	subs	fp, r0, #0
-	blt	.L123
-	movs	r6, #0
-.LVL198:
+	mov	r1, r0
+	ldr	r0, .L160+4
+.LVL214:
+	bl	printf
+.LVL215:
+	b	.L115
+.LVL216:
 .L118:
-	.loc 1 515 0
-	add	r3, r7, #36
-	mov	r1, fp
-	ldr	r10, [r3, r6, lsl #2]
+	.loc 1 510 0
+	ldr	r0, .L160+8
+.LVL217:
+	bl	printf
+.LVL218:
+	.loc 1 512 0
+	ldr	r1, .L160+12
+	mov	r0, r8
+	bl	fdt_path_offset
+.LVL219:
+	.loc 1 513 0
+	subs	r3, r0, #0
+	str	r3, [r7, #24]
+	blt	.L130
+	mov	r5, fp
+.LVL220:
+.L123:
+	.loc 1 520 0
+	add	r3, r7, #40
+	ldr	r1, [r7, #24]
+	ldr	r10, [r3, r5, lsl #2]
+	mov	r0, r8
 	movs	r3, #0
-	ldr	r0, [r7, #28]
 	mov	r2, r10
 	bl	spl_fit_get_image_node
-.LVL199:
-	.loc 1 517 0
-	cmp	r0, #0
-	blt	.L115
+.LVL221:
 	.loc 1 522 0
-	add	r3, r7, #48
-	mov	r1, r8
+	cmp	r0, #0
+	blt	.L120
+	.loc 1 527 0
+	add	r3, r7, #52
+	mov	r2, r8
 	stm	sp, {r0, r3}
-	mov	r0, r5
-.LVL200:
-	ldr	r3, [r7, #32]
-	ldr	r2, [r7, #28]
+	mov	r0, r6
+.LVL222:
+	ldr	r3, [r7, #36]
+	ldr	r1, [r7, #28]
 	bl	spl_load_fit_image
-.LVL201:
-	.loc 1 524 0
+.LVL223:
+	.loc 1 529 0
+	mov	fp, r0
 	cmp	r0, #0
-	bne	.L112
-	.loc 1 528 0
-	ldr	r1, .L145+56
+	bne	.L115
+	.loc 1 533 0
+	ldr	r1, .L160+16
 	mov	r0, r10
-.LVL202:
+.LVL224:
 	bl	strcmp
-.LVL203:
-	cbnz	r0, .L116
-	.loc 1 529 0
-	ldr	r3, [r7, #56]
+.LVL225:
+	cbnz	r0, .L121
+	.loc 1 534 0
+	ldr	r3, [r7, #60]
 	str	r3, [r4, #20]
-.L115:
-	.loc 1 514 0
-	adds	r6, r6, #1
-.LVL204:
-	cmp	r6, #3
-	bne	.L118
-.LVL205:
-.L119:
-	.loc 1 549 0
-	movs	r0, #0
-	b	.L112
-.L146:
-	.align	2
-.L145:
-	.word	-804389139
-	.word	.LC15
-	.word	.LC16
-	.word	.LC17
-	.word	.LC18
-	.word	.LC19
-	.word	.LC20
-	.word	.LC21
-	.word	.LC22
-	.word	.LC23
-	.word	.LANCHOR1
-	.word	.LANCHOR0
-	.word	.LC24
-	.word	.LC25
-	.word	.LC0
-.LVL206:
-.L116:
-	.loc 1 530 0
-	ldr	r1, .L147
+.L120:
+	.loc 1 519 0
+	adds	r5, r5, #1
+.LVL226:
+	cmp	r5, #3
+	bne	.L123
+.LVL227:
+.L126:
+	.loc 1 554 0
+	mov	fp, #0
+	b	.L115
+.LVL228:
+.L121:
+	.loc 1 535 0
+	ldr	r1, .L160+20
 	mov	r0, r10
 	bl	strcmp
-.LVL207:
+.LVL229:
 	cmp	r0, #0
-	bne	.L115
-	.loc 1 532 0
-	ldr	r3, [r7, #56]
+	bne	.L120
+	.loc 1 537 0
+	ldr	r3, [r7, #60]
 	str	r3, [r4, #16]
+	b	.L120
+.LVL230:
+.L128:
+	.loc 1 481 0
+	mvn	fp, #4
 	b	.L115
-.LVL208:
-.L121:
-	.loc 1 476 0
-	mvn	r0, #4
-	b	.L112
-.LVL209:
-.L122:
-	.loc 1 487 0
-	mvn	r0, #18
-.LVL210:
-	b	.L112
-.LVL211:
-.L123:
-	.loc 1 508 0
-	mov	r0, fp
-.LVL212:
-	b	.L112
-.LVL213:
-.L90:
+.LVL231:
+.L129:
+	.loc 1 492 0
+	mvn	fp, #18
+	b	.L115
+.LVL232:
+.L130:
+	.loc 1 513 0
+	ldr	fp, [r7, #24]
+.LVL233:
+	b	.L115
+.LVL234:
+.L92:
 .LBE94:
 .LBE95:
 .LBB96:
 .LBB91:
-	.loc 1 567 0
+	.loc 1 572 0
 	mov	r0, #-1
-.LVL214:
-	b	.L87
-.L148:
+	b	.L94
+.L161:
 	.align	2
-.L147:
+.L160:
+	.word	.LC19
+	.word	.LC20
+	.word	.LC21
+	.word	.LC18
+	.word	.LC0
 	.word	.LC1
 .LBE91:
 .LBE96:
 	.cfi_endproc
-.LFE219:
+.LFE216:
 	.size	spl_load_simple_fit, .-spl_load_simple_fit
 	.section	.rodata
 	.align	2
 	.set	.LANCHOR1,. + 0
-.LC26:
+.LC30:
 	.word	.LC0
 	.word	.LC1
 	.word	.LC2
-	.section	.rodata.__func__.8712,"a",%progbits
+	.section	.rodata.__func__.8769,"a",%progbits
 	.set	.LANCHOR0,. + 0
-	.type	__func__.8712, %object
-	.size	__func__.8712, 20
-__func__.8712:
+	.type	__func__.8769, %object
+	.size	__func__.8769, 20
+__func__.8769:
 	.ascii	"spl_load_kernel_fit\000"
 	.section	.rodata.spl_fit_get_image_name.isra.0.str1.1,"aMS",%progbits,1
 .LC4:
@@ -1563,27 +1715,34 @@ __func__.8712:
 	.ascii	"entry\000"
 	.section	.rodata.spl_load_simple_fit.str1.1,"aMS",%progbits,1
 .LC15:
-	.ascii	"Not fit magic\012\000"
+	.ascii	"Trying fit image at 0x%lx sector\012\000"
 .LC16:
-	.ascii	"/images\000"
+	.ascii	"IO error\012\000"
 .LC17:
-	.ascii	"Verified-boot requires CONFIG_SPL_FIT_SIGNATURE ena"
-	.ascii	"bled\012\000"
+	.ascii	"Not fit magic\012\000"
 .LC18:
-	.ascii	"standalone\000"
+	.ascii	"/images\000"
 .LC19:
-	.ascii	"Start standalone fail, ret = %d\012\000"
+	.ascii	"No default config node\012\000"
 .LC20:
-	.ascii	"firmware\000"
+	.ascii	"fit verify configure failed, ret=%d\012\000"
 .LC21:
-	.ascii	"loadables\000"
+	.ascii	"\012\000"
 .LC22:
-	.ascii	"type\000"
+	.ascii	"standalone\000"
 .LC23:
-	.ascii	"os\000"
+	.ascii	"Start standalone fail, ret = %d\012\000"
 .LC24:
-	.ascii	"%s: no partition\012\000"
+	.ascii	"firmware\000"
 .LC25:
+	.ascii	"loadables\000"
+.LC26:
+	.ascii	"type\000"
+.LC27:
+	.ascii	"os\000"
+.LC28:
+	.ascii	"%s: no partition\012\000"
+.LC29:
 	.ascii	"%s: Not fit magic\012\000"
 	.section	.rodata.str1.1,"aMS",%progbits,1
 .LC0:
@@ -1611,25 +1770,27 @@ __func__.8712:
 	.file 17 "include/linux/libfdt_env.h"
 	.file 18 "include/linux/../../scripts/dtc/libfdt/fdt.h"
 	.file 19 "include/linux/libfdt.h"
-	.file 20 "include/net.h"
-	.file 21 "./arch/arm/include/asm/spl.h"
-	.file 22 "include/spl.h"
-	.file 23 "include/malloc.h"
-	.file 24 "include/linux/byteorder/swab.h"
-	.file 25 "include/linux/../../scripts/dtc/libfdt/libfdt.h"
-	.file 26 "include/fdt_support.h"
-	.file 27 "include/stdio.h"
+	.file 20 "include/u-boot/sha1.h"
+	.file 21 "include/u-boot/sha256.h"
+	.file 22 "include/net.h"
+	.file 23 "./arch/arm/include/asm/spl.h"
+	.file 24 "include/spl.h"
+	.file 25 "include/malloc.h"
+	.file 26 "include/linux/byteorder/swab.h"
+	.file 27 "include/linux/../../scripts/dtc/libfdt/libfdt.h"
+	.file 28 "include/fdt_support.h"
+	.file 29 "include/stdio.h"
 	.section	.debug_info,"",%progbits
 .Ldebug_info0:
-	.4byte	0x2739
+	.4byte	0x27ac
 	.2byte	0x4
 	.4byte	.Ldebug_abbrev0
 	.byte	0x4
 	.uleb128 0x1
-	.4byte	.LASF405
+	.4byte	.LASF398
 	.byte	0xc
-	.4byte	.LASF406
-	.4byte	.LASF407
+	.4byte	.LASF399
+	.4byte	.LASF400
 	.4byte	.Ldebug_ranges0+0x88
 	.4byte	0
 	.4byte	.Ldebug_line0
@@ -1768,6 +1929,8 @@ __func__.8712:
 	.byte	0x6
 	.byte	0x69
 	.4byte	0x5e
+	.uleb128 0x7
+	.4byte	0x12d
 	.uleb128 0x2
 	.4byte	.LASF22
 	.byte	0x6
@@ -1789,17 +1952,17 @@ __func__.8712:
 	.byte	0x10
 	.byte	0x9
 	.byte	0x1f
-	.4byte	0x16e
+	.4byte	0x173
 	.uleb128 0xb
 	.ascii	"b\000"
 	.byte	0x9
 	.byte	0x20
-	.4byte	0x16e
+	.4byte	0x173
 	.byte	0
 	.byte	0
 	.uleb128 0xc
 	.4byte	0x90
-	.4byte	0x17e
+	.4byte	0x183
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0xf
@@ -1808,31 +1971,31 @@ __func__.8712:
 	.4byte	.LASF26
 	.byte	0x9
 	.byte	0x21
-	.4byte	0x15b
+	.4byte	0x160
 	.uleb128 0x3
 	.byte	0x1
 	.byte	0x2
 	.4byte	.LASF27
 	.uleb128 0xc
 	.4byte	0xdd
-	.4byte	0x19b
+	.4byte	0x1a0
 	.uleb128 0xe
 	.byte	0
 	.uleb128 0xf
 	.4byte	.LASF28
 	.byte	0x9
 	.2byte	0x140
-	.4byte	0x190
+	.4byte	0x195
 	.uleb128 0xf
 	.4byte	.LASF29
 	.byte	0x9
 	.2byte	0x143
-	.4byte	0x190
+	.4byte	0x195
 	.uleb128 0xf
 	.4byte	.LASF30
 	.byte	0x9
 	.2byte	0x143
-	.4byte	0x190
+	.4byte	0x195
 	.uleb128 0x2
 	.4byte	.LASF31
 	.byte	0xa
@@ -1844,7 +2007,7 @@ __func__.8712:
 	.4byte	0x7b
 	.byte	0xa
 	.byte	0x18
-	.4byte	0x247
+	.4byte	0x24c
 	.uleb128 0x11
 	.4byte	.LASF32
 	.byte	0
@@ -1906,7 +2069,7 @@ __func__.8712:
 	.4byte	0x7b
 	.byte	0xa
 	.byte	0x3d
-	.4byte	0x270
+	.4byte	0x275
 	.uleb128 0x11
 	.4byte	.LASF52
 	.byte	0
@@ -1924,29 +2087,29 @@ __func__.8712:
 	.byte	0x10
 	.byte	0xa
 	.byte	0x62
-	.4byte	0x28f
+	.4byte	0x294
 	.uleb128 0x13
 	.4byte	.LASF56
 	.byte	0xa
 	.byte	0x63
-	.4byte	0x138
+	.4byte	0x13d
 	.uleb128 0x13
 	.4byte	.LASF57
 	.byte	0xa
 	.byte	0x64
-	.4byte	0x17e
+	.4byte	0x183
 	.byte	0
 	.uleb128 0x14
 	.4byte	.LASF72
 	.byte	0x7c
 	.byte	0xa
 	.byte	0x49
-	.4byte	0x36e
+	.4byte	0x373
 	.uleb128 0x15
 	.4byte	.LASF50
 	.byte	0xa
 	.byte	0x4e
-	.4byte	0x1ca
+	.4byte	0x1cf
 	.byte	0
 	.uleb128 0x15
 	.4byte	.LASF58
@@ -2000,7 +2163,7 @@ __func__.8712:
 	.ascii	"lba\000"
 	.byte	0xa
 	.byte	0x5b
-	.4byte	0x1bf
+	.4byte	0x1c4
 	.byte	0x10
 	.uleb128 0x15
 	.4byte	.LASF65
@@ -2018,79 +2181,79 @@ __func__.8712:
 	.4byte	.LASF67
 	.byte	0xa
 	.byte	0x5e
-	.4byte	0x36e
+	.4byte	0x373
 	.byte	0x1c
 	.uleb128 0x15
 	.4byte	.LASF68
 	.byte	0xa
 	.byte	0x5f
-	.4byte	0x37e
+	.4byte	0x383
 	.byte	0x45
 	.uleb128 0x15
 	.4byte	.LASF69
 	.byte	0xa
 	.byte	0x60
-	.4byte	0x38e
+	.4byte	0x393
 	.byte	0x5a
 	.uleb128 0x15
 	.4byte	.LASF51
 	.byte	0xa
 	.byte	0x61
-	.4byte	0x247
+	.4byte	0x24c
 	.byte	0x64
 	.uleb128 0x16
-	.4byte	0x270
+	.4byte	0x275
 	.byte	0x68
 	.uleb128 0x15
 	.4byte	.LASF70
 	.byte	0xa
 	.byte	0x6c
-	.4byte	0x3a3
+	.4byte	0x3a8
 	.byte	0x78
 	.byte	0
 	.uleb128 0xc
 	.4byte	0xdd
-	.4byte	0x37e
+	.4byte	0x383
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x28
 	.byte	0
 	.uleb128 0xc
 	.4byte	0xdd
-	.4byte	0x38e
+	.4byte	0x393
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x14
 	.byte	0
 	.uleb128 0xc
 	.4byte	0xdd
-	.4byte	0x39e
+	.4byte	0x3a3
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x8
 	.byte	0
 	.uleb128 0x17
-	.4byte	.LASF86
+	.4byte	.LASF401
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x39e
+	.4byte	0x3a3
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x3af
+	.4byte	0x3b4
 	.uleb128 0x18
 	.uleb128 0xc
 	.4byte	0x122
-	.4byte	0x3bb
+	.4byte	0x3c0
 	.uleb128 0xe
 	.byte	0
 	.uleb128 0x4
 	.4byte	.LASF71
 	.byte	0xb
 	.byte	0x10
-	.4byte	0x3b0
+	.4byte	0x3b5
 	.uleb128 0xc
 	.4byte	0x30
-	.4byte	0x3d6
+	.4byte	0x3db
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x5
@@ -2100,7 +2263,7 @@ __func__.8712:
 	.byte	0x8
 	.byte	0xc
 	.byte	0xf
-	.4byte	0x3fb
+	.4byte	0x400
 	.uleb128 0x15
 	.4byte	.LASF74
 	.byte	0xc
@@ -2111,14 +2274,14 @@ __func__.8712:
 	.4byte	.LASF75
 	.byte	0xc
 	.byte	0x11
-	.4byte	0x414
+	.4byte	0x419
 	.byte	0x4
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x3d6
+	.4byte	0x3db
 	.uleb128 0x19
 	.4byte	0x50
-	.4byte	0x414
+	.4byte	0x419
 	.uleb128 0x1a
 	.4byte	0x50
 	.uleb128 0x1a
@@ -2126,24 +2289,24 @@ __func__.8712:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x400
+	.4byte	0x405
 	.uleb128 0x14
 	.4byte	.LASF76
-	.byte	0x9c
+	.byte	0x78
 	.byte	0xc
 	.byte	0x39
-	.4byte	0x487
+	.4byte	0x48c
 	.uleb128 0x15
 	.4byte	.LASF77
 	.byte	0xc
 	.byte	0x3a
-	.4byte	0x1bf
+	.4byte	0x1c4
 	.byte	0
 	.uleb128 0x15
 	.4byte	.LASF78
 	.byte	0xc
 	.byte	0x3b
-	.4byte	0x1bf
+	.4byte	0x1c4
 	.byte	0x4
 	.uleb128 0x15
 	.4byte	.LASF65
@@ -2155,13 +2318,13 @@ __func__.8712:
 	.4byte	.LASF74
 	.byte	0xc
 	.byte	0x3d
-	.4byte	0x487
+	.4byte	0x48c
 	.byte	0xc
 	.uleb128 0x15
 	.4byte	.LASF62
 	.byte	0xc
 	.byte	0x3e
-	.4byte	0x487
+	.4byte	0x48c
 	.byte	0x2c
 	.uleb128 0x15
 	.4byte	.LASF79
@@ -2173,25 +2336,25 @@ __func__.8712:
 	.4byte	.LASF80
 	.byte	0xc
 	.byte	0x41
-	.4byte	0x497
+	.4byte	0x49c
 	.byte	0x50
 	.uleb128 0x15
 	.4byte	.LASF81
 	.byte	0xc
-	.byte	0x44
-	.4byte	0x497
+	.byte	0x47
+	.4byte	0x25
 	.byte	0x75
 	.byte	0
 	.uleb128 0xc
 	.4byte	0x25
-	.4byte	0x497
+	.4byte	0x49c
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x1f
 	.byte	0
 	.uleb128 0xc
 	.4byte	0xdd
-	.4byte	0x4a7
+	.4byte	0x4ac
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x24
@@ -2200,27 +2363,27 @@ __func__.8712:
 	.4byte	.LASF82
 	.byte	0xc
 	.byte	0x49
-	.4byte	0x41a
+	.4byte	0x41f
 	.uleb128 0xc
-	.4byte	0x3fb
-	.4byte	0x4bd
+	.4byte	0x400
+	.4byte	0x4c2
 	.uleb128 0xe
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x4b2
+	.4byte	0x4b7
 	.uleb128 0x4
 	.4byte	.LASF73
 	.byte	0xc
 	.byte	0xce
-	.4byte	0x4bd
+	.4byte	0x4c2
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x28f
+	.4byte	0x294
 	.uleb128 0x1b
-	.2byte	0xa10
+	.2byte	0xa0c
 	.byte	0xd
 	.byte	0x13
-	.4byte	0x527
+	.4byte	0x51f
 	.uleb128 0x15
 	.4byte	.LASF78
 	.byte	0xd
@@ -2243,67 +2406,56 @@ __func__.8712:
 	.4byte	.LASF77
 	.byte	0xd
 	.byte	0x17
-	.4byte	0x527
+	.4byte	0x51f
 	.byte	0xc
 	.uleb128 0x1c
 	.4byte	.LASF85
 	.byte	0xd
 	.byte	0x18
-	.4byte	0x538
+	.4byte	0x530
 	.2byte	0x80c
-	.uleb128 0x1d
-	.ascii	"mtd\000"
-	.byte	0xd
-	.byte	0x31
-	.4byte	0x54e
-	.2byte	0xa0c
 	.byte	0
 	.uleb128 0xc
 	.4byte	0x122
-	.4byte	0x538
-	.uleb128 0x1e
+	.4byte	0x530
+	.uleb128 0x1d
 	.4byte	0xcb
 	.2byte	0x1ff
 	.byte	0
 	.uleb128 0xc
 	.4byte	0x25
-	.4byte	0x549
-	.uleb128 0x1e
+	.4byte	0x541
+	.uleb128 0x1d
 	.4byte	0xcb
 	.2byte	0x1ff
 	.byte	0
-	.uleb128 0x17
-	.4byte	.LASF87
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x549
 	.uleb128 0x2
-	.4byte	.LASF88
+	.4byte	.LASF86
 	.byte	0xd
 	.byte	0x37
-	.4byte	0x4d3
+	.4byte	0x4d8
 	.uleb128 0xc
-	.4byte	0x554
-	.4byte	0x56a
+	.4byte	0x541
+	.4byte	0x557
 	.uleb128 0xe
 	.byte	0
 	.uleb128 0x4
-	.4byte	.LASF89
+	.4byte	.LASF87
 	.byte	0xd
 	.byte	0x39
-	.4byte	0x55f
+	.4byte	0x54c
 	.uleb128 0x3
 	.byte	0x8
 	.byte	0x4
-	.4byte	.LASF90
+	.4byte	.LASF88
 	.uleb128 0x14
-	.4byte	.LASF91
+	.4byte	.LASF89
 	.byte	0x8
 	.byte	0xe
 	.byte	0x10
-	.4byte	0x5a1
+	.4byte	0x58e
 	.uleb128 0x15
-	.4byte	.LASF92
+	.4byte	.LASF90
 	.byte	0xe
 	.byte	0x11
 	.4byte	0xb5
@@ -2316,11 +2468,11 @@ __func__.8712:
 	.byte	0x4
 	.byte	0
 	.uleb128 0x14
-	.4byte	.LASF93
+	.4byte	.LASF91
 	.byte	0x90
 	.byte	0xe
 	.byte	0x15
-	.4byte	0x5d2
+	.4byte	0x5bf
 	.uleb128 0xb
 	.ascii	"cnt\000"
 	.byte	0xe
@@ -2334,48 +2486,48 @@ __func__.8712:
 	.4byte	0xc0
 	.byte	0x4
 	.uleb128 0x15
-	.4byte	.LASF94
+	.4byte	.LASF92
 	.byte	0xe
 	.byte	0x18
-	.4byte	0x5d2
+	.4byte	0x5bf
 	.byte	0x8
 	.byte	0
 	.uleb128 0xc
-	.4byte	0x57c
-	.4byte	0x5e2
+	.4byte	0x569
+	.4byte	0x5cf
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x10
 	.byte	0
-	.uleb128 0x1f
+	.uleb128 0x1e
 	.ascii	"lmb\000"
 	.2byte	0x120
 	.byte	0xe
 	.byte	0x1b
-	.4byte	0x608
+	.4byte	0x5f5
 	.uleb128 0x15
-	.4byte	.LASF95
+	.4byte	.LASF93
 	.byte	0xe
 	.byte	0x1c
-	.4byte	0x5a1
+	.4byte	0x58e
 	.byte	0
 	.uleb128 0x15
-	.4byte	.LASF96
+	.4byte	.LASF94
 	.byte	0xe
 	.byte	0x1d
-	.4byte	0x5a1
+	.4byte	0x58e
 	.byte	0x90
 	.byte	0
-	.uleb128 0x20
+	.uleb128 0x1f
 	.ascii	"lmb\000"
 	.byte	0xe
 	.byte	0x20
-	.4byte	0x5e2
+	.4byte	0x5cf
 	.uleb128 0xa
 	.byte	0x10
 	.byte	0xf
 	.byte	0x5d
-	.4byte	0x634
+	.4byte	0x621
 	.uleb128 0x15
 	.4byte	.LASF77
 	.byte	0xf
@@ -2390,861 +2542,878 @@ __func__.8712:
 	.byte	0x8
 	.byte	0
 	.uleb128 0x14
-	.4byte	.LASF97
+	.4byte	.LASF95
 	.byte	0x70
 	.byte	0xf
 	.byte	0x1b
-	.4byte	0x731
+	.4byte	0x71e
 	.uleb128 0x15
-	.4byte	.LASF98
+	.4byte	.LASF96
 	.byte	0xf
 	.byte	0x1c
 	.4byte	0x37
 	.byte	0
 	.uleb128 0x15
-	.4byte	.LASF99
+	.4byte	.LASF97
 	.byte	0xf
 	.byte	0x1d
 	.4byte	0xc0
 	.byte	0x4
 	.uleb128 0x15
-	.4byte	.LASF100
+	.4byte	.LASF98
 	.byte	0xf
 	.byte	0x1e
 	.4byte	0x37
 	.byte	0x8
 	.uleb128 0x15
-	.4byte	.LASF101
+	.4byte	.LASF99
 	.byte	0xf
 	.byte	0x1f
 	.4byte	0x37
 	.byte	0xc
 	.uleb128 0x15
-	.4byte	.LASF102
+	.4byte	.LASF100
 	.byte	0xf
 	.byte	0x20
 	.4byte	0x37
 	.byte	0x10
 	.uleb128 0x15
-	.4byte	.LASF103
+	.4byte	.LASF101
 	.byte	0xf
 	.byte	0x21
 	.4byte	0x37
 	.byte	0x14
 	.uleb128 0x15
-	.4byte	.LASF104
+	.4byte	.LASF102
 	.byte	0xf
 	.byte	0x22
 	.4byte	0x37
 	.byte	0x18
 	.uleb128 0x15
-	.4byte	.LASF105
+	.4byte	.LASF103
 	.byte	0xf
 	.byte	0x24
 	.4byte	0x37
 	.byte	0x1c
 	.uleb128 0x15
-	.4byte	.LASF106
+	.4byte	.LASF104
 	.byte	0xf
 	.byte	0x25
 	.4byte	0x37
 	.byte	0x20
 	.uleb128 0x15
-	.4byte	.LASF107
+	.4byte	.LASF105
 	.byte	0xf
 	.byte	0x26
 	.4byte	0x37
 	.byte	0x24
 	.uleb128 0x15
-	.4byte	.LASF108
+	.4byte	.LASF106
 	.byte	0xf
 	.byte	0x31
 	.4byte	0x37
 	.byte	0x28
 	.uleb128 0x15
-	.4byte	.LASF109
+	.4byte	.LASF107
 	.byte	0xf
 	.byte	0x32
 	.4byte	0x37
 	.byte	0x2c
 	.uleb128 0x15
-	.4byte	.LASF110
+	.4byte	.LASF108
 	.byte	0xf
 	.byte	0x33
-	.4byte	0x3c6
+	.4byte	0x3cb
 	.byte	0x30
 	.uleb128 0x15
-	.4byte	.LASF111
+	.4byte	.LASF109
 	.byte	0xf
 	.byte	0x34
 	.4byte	0x3e
 	.byte	0x36
 	.uleb128 0x15
-	.4byte	.LASF112
+	.4byte	.LASF110
 	.byte	0xf
 	.byte	0x35
 	.4byte	0x37
 	.byte	0x38
 	.uleb128 0x15
-	.4byte	.LASF113
+	.4byte	.LASF111
 	.byte	0xf
 	.byte	0x36
 	.4byte	0x37
 	.byte	0x3c
 	.uleb128 0x15
-	.4byte	.LASF114
+	.4byte	.LASF112
 	.byte	0xf
 	.byte	0x57
 	.4byte	0x122
 	.byte	0x40
 	.uleb128 0x15
-	.4byte	.LASF115
+	.4byte	.LASF113
 	.byte	0xf
 	.byte	0x58
 	.4byte	0x122
 	.byte	0x44
 	.uleb128 0x15
-	.4byte	.LASF116
+	.4byte	.LASF114
 	.byte	0xf
 	.byte	0x5b
 	.4byte	0x7b
 	.byte	0x48
 	.uleb128 0x15
-	.4byte	.LASF117
+	.4byte	.LASF115
 	.byte	0xf
 	.byte	0x60
-	.4byte	0x731
+	.4byte	0x71e
 	.byte	0x50
 	.byte	0
 	.uleb128 0xc
-	.4byte	0x613
-	.4byte	0x741
+	.4byte	0x600
+	.4byte	0x72e
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x1
 	.byte	0
 	.uleb128 0x2
-	.4byte	.LASF118
+	.4byte	.LASF116
 	.byte	0xf
 	.byte	0x62
-	.4byte	0x634
+	.4byte	0x621
 	.uleb128 0x4
-	.4byte	.LASF119
+	.4byte	.LASF117
 	.byte	0x10
 	.byte	0x13
 	.4byte	0x122
 	.uleb128 0x4
-	.4byte	.LASF120
+	.4byte	.LASF118
 	.byte	0x10
 	.byte	0x14
 	.4byte	0x122
 	.uleb128 0x4
-	.4byte	.LASF121
+	.4byte	.LASF119
 	.byte	0x10
 	.byte	0x15
 	.4byte	0x122
 	.uleb128 0x4
-	.4byte	.LASF122
+	.4byte	.LASF120
 	.byte	0x10
 	.byte	0x16
 	.4byte	0x122
 	.uleb128 0x4
-	.4byte	.LASF123
+	.4byte	.LASF121
 	.byte	0x10
 	.byte	0x17
 	.4byte	0x122
 	.uleb128 0x4
-	.4byte	.LASF124
+	.4byte	.LASF122
 	.byte	0x10
 	.byte	0x18
 	.4byte	0x122
 	.uleb128 0x4
-	.4byte	.LASF125
+	.4byte	.LASF123
 	.byte	0x10
 	.byte	0x19
 	.4byte	0x122
 	.uleb128 0x2
-	.4byte	.LASF126
+	.4byte	.LASF124
 	.byte	0x11
 	.byte	0x11
-	.4byte	0x143
+	.4byte	0x148
 	.uleb128 0x14
-	.4byte	.LASF127
+	.4byte	.LASF125
 	.byte	0x28
 	.byte	0x12
 	.byte	0x39
-	.4byte	0x829
+	.4byte	0x816
 	.uleb128 0x15
-	.4byte	.LASF128
+	.4byte	.LASF126
 	.byte	0x12
 	.byte	0x3a
-	.4byte	0x799
+	.4byte	0x786
 	.byte	0
 	.uleb128 0x15
-	.4byte	.LASF129
+	.4byte	.LASF127
 	.byte	0x12
 	.byte	0x3b
-	.4byte	0x799
+	.4byte	0x786
 	.byte	0x4
 	.uleb128 0x15
-	.4byte	.LASF130
+	.4byte	.LASF128
 	.byte	0x12
 	.byte	0x3c
-	.4byte	0x799
+	.4byte	0x786
 	.byte	0x8
 	.uleb128 0x15
-	.4byte	.LASF131
+	.4byte	.LASF129
 	.byte	0x12
 	.byte	0x3d
-	.4byte	0x799
+	.4byte	0x786
 	.byte	0xc
 	.uleb128 0x15
-	.4byte	.LASF132
+	.4byte	.LASF130
 	.byte	0x12
 	.byte	0x3e
-	.4byte	0x799
+	.4byte	0x786
 	.byte	0x10
 	.uleb128 0x15
-	.4byte	.LASF133
+	.4byte	.LASF131
 	.byte	0x12
 	.byte	0x3f
-	.4byte	0x799
+	.4byte	0x786
 	.byte	0x14
 	.uleb128 0x15
-	.4byte	.LASF134
+	.4byte	.LASF132
 	.byte	0x12
 	.byte	0x40
-	.4byte	0x799
+	.4byte	0x786
 	.byte	0x18
 	.uleb128 0x15
-	.4byte	.LASF135
+	.4byte	.LASF133
 	.byte	0x12
 	.byte	0x43
-	.4byte	0x799
+	.4byte	0x786
 	.byte	0x1c
 	.uleb128 0x15
-	.4byte	.LASF136
+	.4byte	.LASF134
 	.byte	0x12
 	.byte	0x46
-	.4byte	0x799
+	.4byte	0x786
 	.byte	0x20
 	.uleb128 0x15
-	.4byte	.LASF137
+	.4byte	.LASF135
 	.byte	0x12
 	.byte	0x49
-	.4byte	0x799
+	.4byte	0x786
 	.byte	0x24
 	.byte	0
 	.uleb128 0xf
-	.4byte	.LASF138
+	.4byte	.LASF136
 	.byte	0x13
 	.2byte	0x136
-	.4byte	0x835
+	.4byte	0x822
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x7a4
-	.uleb128 0x21
+	.4byte	0x791
+	.uleb128 0x20
 	.byte	0x4
 	.4byte	0x7b
 	.byte	0x2
 	.byte	0x83
-	.4byte	0x8f0
+	.4byte	0x8dd
 	.uleb128 0x11
-	.4byte	.LASF139
+	.4byte	.LASF137
 	.byte	0
 	.uleb128 0x11
-	.4byte	.LASF140
+	.4byte	.LASF138
 	.byte	0x1
 	.uleb128 0x11
-	.4byte	.LASF141
+	.4byte	.LASF139
 	.byte	0x2
 	.uleb128 0x11
-	.4byte	.LASF142
+	.4byte	.LASF140
 	.byte	0x3
 	.uleb128 0x11
-	.4byte	.LASF143
+	.4byte	.LASF141
 	.byte	0x4
 	.uleb128 0x11
-	.4byte	.LASF144
+	.4byte	.LASF142
 	.byte	0x5
 	.uleb128 0x11
-	.4byte	.LASF145
+	.4byte	.LASF143
 	.byte	0x6
 	.uleb128 0x11
-	.4byte	.LASF146
+	.4byte	.LASF144
 	.byte	0x7
 	.uleb128 0x11
-	.4byte	.LASF147
+	.4byte	.LASF145
 	.byte	0x8
 	.uleb128 0x11
-	.4byte	.LASF148
+	.4byte	.LASF146
 	.byte	0x9
 	.uleb128 0x11
-	.4byte	.LASF149
+	.4byte	.LASF147
 	.byte	0xa
 	.uleb128 0x11
-	.4byte	.LASF150
+	.4byte	.LASF148
 	.byte	0xb
 	.uleb128 0x11
-	.4byte	.LASF151
+	.4byte	.LASF149
 	.byte	0xc
 	.uleb128 0x11
-	.4byte	.LASF152
+	.4byte	.LASF150
 	.byte	0xd
 	.uleb128 0x11
-	.4byte	.LASF153
+	.4byte	.LASF151
 	.byte	0xe
 	.uleb128 0x11
-	.4byte	.LASF154
+	.4byte	.LASF152
 	.byte	0xf
 	.uleb128 0x11
-	.4byte	.LASF155
+	.4byte	.LASF153
 	.byte	0x10
 	.uleb128 0x11
-	.4byte	.LASF156
+	.4byte	.LASF154
 	.byte	0x11
 	.uleb128 0x11
-	.4byte	.LASF157
+	.4byte	.LASF155
 	.byte	0x12
 	.uleb128 0x11
-	.4byte	.LASF158
+	.4byte	.LASF156
 	.byte	0x13
 	.uleb128 0x11
-	.4byte	.LASF159
+	.4byte	.LASF157
 	.byte	0x14
 	.uleb128 0x11
-	.4byte	.LASF160
+	.4byte	.LASF158
 	.byte	0x15
 	.uleb128 0x11
-	.4byte	.LASF161
+	.4byte	.LASF159
 	.byte	0x16
 	.uleb128 0x11
-	.4byte	.LASF162
+	.4byte	.LASF160
 	.byte	0x17
 	.uleb128 0x11
-	.4byte	.LASF163
+	.4byte	.LASF161
 	.byte	0x18
 	.uleb128 0x11
-	.4byte	.LASF164
+	.4byte	.LASF162
 	.byte	0x19
 	.uleb128 0x11
-	.4byte	.LASF165
+	.4byte	.LASF163
 	.byte	0x1a
 	.uleb128 0x11
-	.4byte	.LASF166
+	.4byte	.LASF164
 	.byte	0x1b
 	.byte	0
-	.uleb128 0x21
+	.uleb128 0x20
 	.byte	0x4
 	.4byte	0x7b
 	.byte	0x2
 	.byte	0xf3
-	.4byte	0x9cf
+	.4byte	0x9bc
 	.uleb128 0x11
-	.4byte	.LASF167
+	.4byte	.LASF165
 	.byte	0
 	.uleb128 0x11
-	.4byte	.LASF168
+	.4byte	.LASF166
 	.byte	0x1
 	.uleb128 0x11
-	.4byte	.LASF169
+	.4byte	.LASF167
 	.byte	0x2
 	.uleb128 0x11
-	.4byte	.LASF170
+	.4byte	.LASF168
 	.byte	0x3
 	.uleb128 0x11
-	.4byte	.LASF171
+	.4byte	.LASF169
 	.byte	0x4
 	.uleb128 0x11
-	.4byte	.LASF172
+	.4byte	.LASF170
 	.byte	0x5
 	.uleb128 0x11
-	.4byte	.LASF173
+	.4byte	.LASF171
 	.byte	0x6
 	.uleb128 0x11
-	.4byte	.LASF174
+	.4byte	.LASF172
 	.byte	0x7
 	.uleb128 0x11
-	.4byte	.LASF175
+	.4byte	.LASF173
 	.byte	0x8
 	.uleb128 0x11
-	.4byte	.LASF176
+	.4byte	.LASF174
 	.byte	0x9
 	.uleb128 0x11
-	.4byte	.LASF177
+	.4byte	.LASF175
 	.byte	0xa
 	.uleb128 0x11
-	.4byte	.LASF178
+	.4byte	.LASF176
 	.byte	0xb
 	.uleb128 0x11
-	.4byte	.LASF179
+	.4byte	.LASF177
 	.byte	0xc
 	.uleb128 0x11
-	.4byte	.LASF180
+	.4byte	.LASF178
 	.byte	0xd
 	.uleb128 0x11
-	.4byte	.LASF181
+	.4byte	.LASF179
 	.byte	0xe
 	.uleb128 0x11
-	.4byte	.LASF182
+	.4byte	.LASF180
 	.byte	0xf
 	.uleb128 0x11
-	.4byte	.LASF183
+	.4byte	.LASF181
 	.byte	0x10
 	.uleb128 0x11
-	.4byte	.LASF184
+	.4byte	.LASF182
 	.byte	0x11
 	.uleb128 0x11
-	.4byte	.LASF185
+	.4byte	.LASF183
 	.byte	0x12
 	.uleb128 0x11
-	.4byte	.LASF186
+	.4byte	.LASF184
 	.byte	0x13
 	.uleb128 0x11
-	.4byte	.LASF187
+	.4byte	.LASF185
 	.byte	0x14
 	.uleb128 0x11
-	.4byte	.LASF188
+	.4byte	.LASF186
 	.byte	0x15
 	.uleb128 0x11
-	.4byte	.LASF189
+	.4byte	.LASF187
 	.byte	0x16
 	.uleb128 0x11
-	.4byte	.LASF190
+	.4byte	.LASF188
 	.byte	0x17
 	.uleb128 0x11
-	.4byte	.LASF191
+	.4byte	.LASF189
 	.byte	0x18
 	.uleb128 0x11
-	.4byte	.LASF192
+	.4byte	.LASF190
 	.byte	0x19
 	.uleb128 0x11
-	.4byte	.LASF193
+	.4byte	.LASF191
 	.byte	0x1a
 	.uleb128 0x11
-	.4byte	.LASF194
+	.4byte	.LASF192
 	.byte	0x1b
 	.uleb128 0x11
-	.4byte	.LASF195
+	.4byte	.LASF193
 	.byte	0x1c
 	.uleb128 0x11
-	.4byte	.LASF196
+	.4byte	.LASF194
 	.byte	0x1d
 	.uleb128 0x11
-	.4byte	.LASF197
+	.4byte	.LASF195
 	.byte	0x1e
 	.uleb128 0x11
-	.4byte	.LASF198
+	.4byte	.LASF196
 	.byte	0x1f
 	.uleb128 0x11
-	.4byte	.LASF199
+	.4byte	.LASF197
 	.byte	0x20
 	.uleb128 0x11
-	.4byte	.LASF200
+	.4byte	.LASF198
 	.byte	0x21
 	.uleb128 0x11
-	.4byte	.LASF201
+	.4byte	.LASF199
 	.byte	0x22
 	.byte	0
-	.uleb128 0x22
+	.uleb128 0x21
 	.byte	0x4
 	.4byte	0x7b
 	.byte	0x2
 	.2byte	0x121
-	.4byte	0xa0d
+	.4byte	0x9fa
 	.uleb128 0x11
-	.4byte	.LASF202
+	.4byte	.LASF200
 	.byte	0
 	.uleb128 0x11
-	.4byte	.LASF203
+	.4byte	.LASF201
 	.byte	0x1
 	.uleb128 0x11
-	.4byte	.LASF204
+	.4byte	.LASF202
 	.byte	0x2
 	.uleb128 0x11
-	.4byte	.LASF205
+	.4byte	.LASF203
 	.byte	0x3
 	.uleb128 0x11
-	.4byte	.LASF206
+	.4byte	.LASF204
 	.byte	0x4
 	.uleb128 0x11
-	.4byte	.LASF207
+	.4byte	.LASF205
 	.byte	0x5
 	.uleb128 0x11
-	.4byte	.LASF208
+	.4byte	.LASF206
 	.byte	0x6
 	.uleb128 0x11
-	.4byte	.LASF209
+	.4byte	.LASF207
 	.byte	0x7
 	.byte	0
-	.uleb128 0x23
-	.4byte	.LASF210
+	.uleb128 0x22
+	.4byte	.LASF208
 	.byte	0x40
 	.byte	0x2
 	.2byte	0x137
-	.4byte	0xab7
-	.uleb128 0x24
-	.4byte	.LASF211
+	.4byte	0xaa4
+	.uleb128 0x23
+	.4byte	.LASF209
 	.byte	0x2
 	.2byte	0x138
-	.4byte	0x143
+	.4byte	0x148
 	.byte	0
-	.uleb128 0x24
-	.4byte	.LASF212
+	.uleb128 0x23
+	.4byte	.LASF210
 	.byte	0x2
 	.2byte	0x139
-	.4byte	0x143
+	.4byte	0x148
 	.byte	0x4
-	.uleb128 0x24
-	.4byte	.LASF213
+	.uleb128 0x23
+	.4byte	.LASF211
 	.byte	0x2
 	.2byte	0x13a
-	.4byte	0x143
+	.4byte	0x148
 	.byte	0x8
-	.uleb128 0x24
-	.4byte	.LASF214
+	.uleb128 0x23
+	.4byte	.LASF212
 	.byte	0x2
 	.2byte	0x13b
-	.4byte	0x143
+	.4byte	0x148
 	.byte	0xc
-	.uleb128 0x24
-	.4byte	.LASF215
+	.uleb128 0x23
+	.4byte	.LASF213
 	.byte	0x2
 	.2byte	0x13c
-	.4byte	0x143
+	.4byte	0x148
 	.byte	0x10
-	.uleb128 0x24
-	.4byte	.LASF216
+	.uleb128 0x23
+	.4byte	.LASF214
 	.byte	0x2
 	.2byte	0x13d
-	.4byte	0x143
+	.4byte	0x148
 	.byte	0x14
-	.uleb128 0x24
-	.4byte	.LASF217
+	.uleb128 0x23
+	.4byte	.LASF215
 	.byte	0x2
 	.2byte	0x13e
-	.4byte	0x143
+	.4byte	0x148
 	.byte	0x18
-	.uleb128 0x24
-	.4byte	.LASF218
+	.uleb128 0x23
+	.4byte	.LASF216
 	.byte	0x2
 	.2byte	0x13f
 	.4byte	0x12d
 	.byte	0x1c
-	.uleb128 0x24
-	.4byte	.LASF219
+	.uleb128 0x23
+	.4byte	.LASF217
 	.byte	0x2
 	.2byte	0x140
 	.4byte	0x12d
 	.byte	0x1d
-	.uleb128 0x24
-	.4byte	.LASF220
+	.uleb128 0x23
+	.4byte	.LASF218
 	.byte	0x2
 	.2byte	0x141
 	.4byte	0x12d
 	.byte	0x1e
-	.uleb128 0x24
-	.4byte	.LASF221
+	.uleb128 0x23
+	.4byte	.LASF219
 	.byte	0x2
 	.2byte	0x142
 	.4byte	0x12d
 	.byte	0x1f
-	.uleb128 0x24
-	.4byte	.LASF222
+	.uleb128 0x23
+	.4byte	.LASF220
 	.byte	0x2
 	.2byte	0x143
-	.4byte	0xab7
+	.4byte	0xaa4
 	.byte	0x20
 	.byte	0
 	.uleb128 0xc
 	.4byte	0x12d
-	.4byte	0xac7
+	.4byte	0xab4
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x1f
 	.byte	0
-	.uleb128 0x25
-	.4byte	.LASF223
+	.uleb128 0x24
+	.4byte	.LASF221
 	.byte	0x2
 	.2byte	0x144
-	.4byte	0xa0d
+	.4byte	0x9fa
 	.uleb128 0x7
-	.4byte	0xac7
-	.uleb128 0x23
-	.4byte	.LASF224
+	.4byte	0xab4
+	.uleb128 0x22
+	.4byte	.LASF222
 	.byte	0x18
 	.byte	0x2
 	.2byte	0x146
-	.4byte	0xb5a
-	.uleb128 0x24
+	.4byte	0xb47
+	.uleb128 0x23
 	.4byte	.LASF77
 	.byte	0x2
 	.2byte	0x147
 	.4byte	0x122
 	.byte	0
-	.uleb128 0x26
+	.uleb128 0x25
 	.ascii	"end\000"
 	.byte	0x2
 	.2byte	0x147
 	.4byte	0x122
 	.byte	0x4
-	.uleb128 0x24
-	.4byte	.LASF225
+	.uleb128 0x23
+	.4byte	.LASF223
 	.byte	0x2
 	.2byte	0x148
 	.4byte	0x122
 	.byte	0x8
-	.uleb128 0x24
-	.4byte	.LASF226
+	.uleb128 0x23
+	.4byte	.LASF224
 	.byte	0x2
 	.2byte	0x148
 	.4byte	0x122
 	.byte	0xc
-	.uleb128 0x24
-	.4byte	.LASF227
+	.uleb128 0x23
+	.4byte	.LASF225
 	.byte	0x2
 	.2byte	0x149
 	.4byte	0x122
 	.byte	0x10
-	.uleb128 0x24
-	.4byte	.LASF228
+	.uleb128 0x23
+	.4byte	.LASF226
 	.byte	0x2
 	.2byte	0x14a
 	.4byte	0x12d
 	.byte	0x14
-	.uleb128 0x24
+	.uleb128 0x23
 	.4byte	.LASF62
 	.byte	0x2
 	.2byte	0x14a
 	.4byte	0x12d
 	.byte	0x15
-	.uleb128 0x26
+	.uleb128 0x25
 	.ascii	"os\000"
 	.byte	0x2
 	.2byte	0x14a
 	.4byte	0x12d
 	.byte	0x16
-	.uleb128 0x24
-	.4byte	.LASF229
+	.uleb128 0x23
+	.4byte	.LASF227
 	.byte	0x2
 	.2byte	0x14b
 	.4byte	0x12d
 	.byte	0x17
 	.byte	0
-	.uleb128 0x25
-	.4byte	.LASF230
+	.uleb128 0x24
+	.4byte	.LASF228
 	.byte	0x2
 	.2byte	0x14c
-	.4byte	0xad8
-	.uleb128 0x27
-	.4byte	.LASF231
+	.4byte	0xac5
+	.uleb128 0x26
+	.4byte	.LASF229
 	.2byte	0x1e4
 	.byte	0x2
 	.2byte	0x152
-	.4byte	0xcf9
-	.uleb128 0x24
-	.4byte	.LASF232
+	.4byte	0xce6
+	.uleb128 0x23
+	.4byte	.LASF230
 	.byte	0x2
 	.2byte	0x158
-	.4byte	0xcf9
+	.4byte	0xce6
 	.byte	0
-	.uleb128 0x24
-	.4byte	.LASF233
+	.uleb128 0x23
+	.4byte	.LASF231
 	.byte	0x2
 	.2byte	0x159
-	.4byte	0xac7
+	.4byte	0xab4
 	.byte	0x4
-	.uleb128 0x24
-	.4byte	.LASF234
+	.uleb128 0x23
+	.4byte	.LASF232
 	.byte	0x2
 	.2byte	0x15a
 	.4byte	0x122
 	.byte	0x44
-	.uleb128 0x24
-	.4byte	.LASF235
+	.uleb128 0x23
+	.4byte	.LASF233
 	.byte	0x2
 	.2byte	0x15d
 	.4byte	0xd7
 	.byte	0x48
-	.uleb128 0x24
-	.4byte	.LASF236
+	.uleb128 0x23
+	.4byte	.LASF234
 	.byte	0x2
 	.2byte	0x15f
-	.4byte	0x14e
+	.4byte	0x153
 	.byte	0x4c
-	.uleb128 0x24
-	.4byte	.LASF237
+	.uleb128 0x23
+	.4byte	.LASF235
 	.byte	0x2
 	.2byte	0x160
 	.4byte	0xd7
 	.byte	0x50
-	.uleb128 0x24
-	.4byte	.LASF238
+	.uleb128 0x23
+	.4byte	.LASF236
 	.byte	0x2
 	.2byte	0x161
 	.4byte	0x50
 	.byte	0x54
-	.uleb128 0x24
-	.4byte	.LASF239
+	.uleb128 0x23
+	.4byte	.LASF237
 	.byte	0x2
 	.2byte	0x163
-	.4byte	0x14e
+	.4byte	0x153
 	.byte	0x58
-	.uleb128 0x24
-	.4byte	.LASF240
+	.uleb128 0x23
+	.4byte	.LASF238
 	.byte	0x2
 	.2byte	0x164
 	.4byte	0xd7
 	.byte	0x5c
-	.uleb128 0x24
-	.4byte	.LASF241
+	.uleb128 0x23
+	.4byte	.LASF239
 	.byte	0x2
 	.2byte	0x165
 	.4byte	0x50
 	.byte	0x60
-	.uleb128 0x24
-	.4byte	.LASF242
+	.uleb128 0x23
+	.4byte	.LASF240
 	.byte	0x2
 	.2byte	0x167
-	.4byte	0x14e
-	.byte	0x64
-	.uleb128 0x24
-	.4byte	.LASF243
+	.4byte	0x153
+	.byte	0x64
+	.uleb128 0x23
+	.4byte	.LASF241
 	.byte	0x2
 	.2byte	0x168
 	.4byte	0xd7
 	.byte	0x68
-	.uleb128 0x24
-	.4byte	.LASF244
+	.uleb128 0x23
+	.4byte	.LASF242
 	.byte	0x2
 	.2byte	0x169
 	.4byte	0x50
 	.byte	0x6c
-	.uleb128 0x24
-	.4byte	.LASF245
+	.uleb128 0x23
+	.4byte	.LASF243
 	.byte	0x2
 	.2byte	0x16b
-	.4byte	0x14e
+	.4byte	0x153
 	.byte	0x70
-	.uleb128 0x24
-	.4byte	.LASF246
+	.uleb128 0x23
+	.4byte	.LASF244
 	.byte	0x2
 	.2byte	0x16c
 	.4byte	0xd7
 	.byte	0x74
-	.uleb128 0x24
-	.4byte	.LASF247
+	.uleb128 0x23
+	.4byte	.LASF245
 	.byte	0x2
 	.2byte	0x16d
 	.4byte	0x50
 	.byte	0x78
-	.uleb128 0x26
+	.uleb128 0x25
 	.ascii	"os\000"
 	.byte	0x2
 	.2byte	0x171
-	.4byte	0xb5a
+	.4byte	0xb47
 	.byte	0x7c
-	.uleb128 0x26
+	.uleb128 0x25
 	.ascii	"ep\000"
 	.byte	0x2
 	.2byte	0x172
 	.4byte	0x122
 	.byte	0x94
-	.uleb128 0x24
-	.4byte	.LASF248
+	.uleb128 0x23
+	.4byte	.LASF246
 	.byte	0x2
 	.2byte	0x174
 	.4byte	0x122
 	.byte	0x98
-	.uleb128 0x24
-	.4byte	.LASF249
+	.uleb128 0x23
+	.4byte	.LASF247
 	.byte	0x2
 	.2byte	0x174
 	.4byte	0x122
 	.byte	0x9c
-	.uleb128 0x24
-	.4byte	.LASF250
+	.uleb128 0x23
+	.4byte	.LASF248
 	.byte	0x2
 	.2byte	0x176
 	.4byte	0xfb
 	.byte	0xa0
-	.uleb128 0x24
-	.4byte	.LASF251
+	.uleb128 0x23
+	.4byte	.LASF249
 	.byte	0x2
 	.2byte	0x177
 	.4byte	0x122
 	.byte	0xa4
-	.uleb128 0x24
-	.4byte	.LASF252
+	.uleb128 0x23
+	.4byte	.LASF250
 	.byte	0x2
 	.2byte	0x179
 	.4byte	0x122
 	.byte	0xa8
-	.uleb128 0x24
-	.4byte	.LASF253
+	.uleb128 0x23
+	.4byte	.LASF251
 	.byte	0x2
 	.2byte	0x17a
 	.4byte	0x122
 	.byte	0xac
-	.uleb128 0x24
-	.4byte	.LASF254
+	.uleb128 0x23
+	.4byte	.LASF252
 	.byte	0x2
 	.2byte	0x17b
 	.4byte	0x122
 	.byte	0xb0
-	.uleb128 0x24
-	.4byte	.LASF255
+	.uleb128 0x23
+	.4byte	.LASF253
 	.byte	0x2
 	.2byte	0x17c
 	.4byte	0x122
 	.byte	0xb4
-	.uleb128 0x26
+	.uleb128 0x25
 	.ascii	"kbd\000"
 	.byte	0x2
 	.2byte	0x17d
-	.4byte	0xcff
+	.4byte	0xcec
 	.byte	0xb8
-	.uleb128 0x24
-	.4byte	.LASF256
+	.uleb128 0x23
+	.4byte	.LASF254
 	.byte	0x2
 	.2byte	0x180
 	.4byte	0x50
 	.byte	0xbc
-	.uleb128 0x24
-	.4byte	.LASF257
+	.uleb128 0x23
+	.4byte	.LASF255
 	.byte	0x2
 	.2byte	0x18d
 	.4byte	0x50
 	.byte	0xc0
-	.uleb128 0x26
+	.uleb128 0x25
 	.ascii	"lmb\000"
 	.byte	0x2
 	.2byte	0x190
-	.4byte	0x5e2
+	.4byte	0x5cf
 	.byte	0xc4
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0xac7
+	.4byte	0xab4
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x741
-	.uleb128 0x25
-	.4byte	.LASF258
+	.4byte	0x72e
+	.uleb128 0x24
+	.4byte	.LASF256
 	.byte	0x2
 	.2byte	0x196
-	.4byte	0xb66
+	.4byte	0xb53
 	.uleb128 0xf
-	.4byte	.LASF259
+	.4byte	.LASF257
 	.byte	0x2
 	.2byte	0x198
-	.4byte	0xd05
+	.4byte	0xcf2
+	.uleb128 0xc
+	.4byte	0x138
+	.4byte	0xd15
+	.uleb128 0xe
+	.byte	0
+	.uleb128 0x7
+	.4byte	0xd0a
+	.uleb128 0x4
+	.4byte	.LASF258
+	.byte	0x14
+	.byte	0x1a
+	.4byte	0xd15
+	.uleb128 0x4
+	.4byte	.LASF259
+	.byte	0x15
+	.byte	0x7
+	.4byte	0xd15
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0x12d
 	.uleb128 0xc
 	.4byte	0xdd
-	.4byte	0xd33
+	.4byte	0xd46
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x1f
@@ -3256,19 +3425,19 @@ __func__.8712:
 	.4byte	0x122
 	.uleb128 0xc
 	.4byte	0x90
-	.4byte	0xd49
+	.4byte	0xd5c
 	.uleb128 0xe
 	.byte	0
 	.uleb128 0x4
 	.4byte	.LASF261
 	.byte	0x3
 	.byte	0xaf
-	.4byte	0xd3e
+	.4byte	0xd51
 	.uleb128 0x4
 	.4byte	.LASF262
 	.byte	0x3
 	.byte	0xb0
-	.4byte	0xd3e
+	.4byte	0xd51
 	.uleb128 0x4
 	.4byte	.LASF263
 	.byte	0x3
@@ -3287,614 +3456,486 @@ __func__.8712:
 	.uleb128 0x14
 	.4byte	.LASF266
 	.byte	0x4
-	.byte	0x14
+	.byte	0x16
 	.byte	0x2e
-	.4byte	0xd9a
+	.4byte	0xdad
 	.uleb128 0x15
 	.4byte	.LASF267
-	.byte	0x14
+	.byte	0x16
 	.byte	0x2f
-	.4byte	0x143
+	.4byte	0x148
 	.byte	0
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0x25
-	.uleb128 0x14
-	.4byte	.LASF268
-	.byte	0x40
-	.byte	0x14
-	.byte	0xa6
-	.4byte	0xe3d
-	.uleb128 0x15
-	.4byte	.LASF74
-	.byte	0x14
-	.byte	0xa8
-	.4byte	0xe3d
-	.byte	0
-	.uleb128 0x15
-	.4byte	.LASF269
-	.byte	0x14
-	.byte	0xa9
-	.4byte	0x3c6
-	.byte	0x10
-	.uleb128 0x15
-	.4byte	.LASF270
-	.byte	0x14
-	.byte	0xaa
-	.4byte	0xb5
-	.byte	0x18
-	.uleb128 0x15
-	.4byte	.LASF257
-	.byte	0x14
-	.byte	0xab
-	.4byte	0x50
-	.byte	0x1c
-	.uleb128 0x15
-	.4byte	.LASF271
-	.byte	0x14
-	.byte	0xad
-	.4byte	0xe67
-	.byte	0x20
-	.uleb128 0x15
-	.4byte	.LASF272
-	.byte	0x14
-	.byte	0xae
-	.4byte	0xe86
-	.byte	0x24
-	.uleb128 0x15
-	.4byte	.LASF273
-	.byte	0x14
-	.byte	0xaf
-	.4byte	0xe9b
-	.byte	0x28
-	.uleb128 0x15
-	.4byte	.LASF274
-	.byte	0x14
-	.byte	0xb0
-	.4byte	0xeac
-	.byte	0x2c
-	.uleb128 0x15
-	.4byte	.LASF275
-	.byte	0x14
-	.byte	0xb4
-	.4byte	0xe9b
-	.byte	0x30
-	.uleb128 0x15
-	.4byte	.LASF276
-	.byte	0x14
-	.byte	0xb5
-	.4byte	0xe61
-	.byte	0x34
-	.uleb128 0x15
-	.4byte	.LASF277
-	.byte	0x14
-	.byte	0xb6
-	.4byte	0x50
-	.byte	0x38
-	.uleb128 0x15
-	.4byte	.LASF278
-	.byte	0x14
-	.byte	0xb7
-	.4byte	0x14e
-	.byte	0x3c
-	.byte	0
-	.uleb128 0xc
-	.4byte	0xdd
-	.4byte	0xe4d
-	.uleb128 0xd
-	.4byte	0xcb
-	.byte	0xf
-	.byte	0
-	.uleb128 0x19
-	.4byte	0x50
-	.4byte	0xe61
-	.uleb128 0x1a
-	.4byte	0xe61
-	.uleb128 0x1a
-	.4byte	0xcff
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0xda0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0xe4d
-	.uleb128 0x19
-	.4byte	0x50
-	.4byte	0xe86
-	.uleb128 0x1a
-	.4byte	0xe61
-	.uleb128 0x1a
-	.4byte	0x14e
-	.uleb128 0x1a
-	.4byte	0x50
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0xe6d
-	.uleb128 0x19
-	.4byte	0x50
-	.4byte	0xe9b
-	.uleb128 0x1a
-	.4byte	0xe61
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0xe8c
-	.uleb128 0x28
-	.4byte	0xeac
-	.uleb128 0x1a
-	.4byte	0xe61
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0xea1
-	.uleb128 0x4
-	.4byte	.LASF279
-	.byte	0x14
-	.byte	0xbd
-	.4byte	0xe61
 	.uleb128 0xc
 	.4byte	0x90
-	.4byte	0xecd
+	.4byte	0xdc3
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x5
 	.byte	0
 	.uleb128 0xf
-	.4byte	.LASF280
-	.byte	0x14
+	.4byte	.LASF268
+	.byte	0x16
 	.2byte	0x1fd
-	.4byte	0xd81
+	.4byte	0xd94
 	.uleb128 0xf
-	.4byte	.LASF281
-	.byte	0x14
+	.4byte	.LASF269
+	.byte	0x16
 	.2byte	0x1fe
-	.4byte	0xd81
+	.4byte	0xd94
 	.uleb128 0xf
-	.4byte	.LASF282
-	.byte	0x14
+	.4byte	.LASF270
+	.byte	0x16
 	.2byte	0x200
-	.4byte	0xd81
+	.4byte	0xd94
 	.uleb128 0xf
-	.4byte	.LASF283
-	.byte	0x14
+	.4byte	.LASF271
+	.byte	0x16
 	.2byte	0x205
-	.4byte	0xd23
+	.4byte	0xd36
 	.uleb128 0xf
-	.4byte	.LASF284
-	.byte	0x14
+	.4byte	.LASF272
+	.byte	0x16
 	.2byte	0x206
-	.4byte	0xd23
+	.4byte	0xd36
 	.uleb128 0xc
 	.4byte	0xdd
-	.4byte	0xf19
+	.4byte	0xe0f
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x3f
 	.byte	0
 	.uleb128 0xf
-	.4byte	.LASF285
-	.byte	0x14
+	.4byte	.LASF273
+	.byte	0x16
 	.2byte	0x207
-	.4byte	0xf09
+	.4byte	0xdff
 	.uleb128 0xf
-	.4byte	.LASF286
-	.byte	0x14
+	.4byte	.LASF274
+	.byte	0x16
 	.2byte	0x209
-	.4byte	0xebd
+	.4byte	0xdb3
 	.uleb128 0xf
-	.4byte	.LASF287
-	.byte	0x14
+	.4byte	.LASF275
+	.byte	0x16
 	.2byte	0x20a
-	.4byte	0xebd
+	.4byte	0xdb3
 	.uleb128 0xf
-	.4byte	.LASF288
-	.byte	0x14
+	.4byte	.LASF276
+	.byte	0x16
 	.2byte	0x20b
-	.4byte	0xd81
+	.4byte	0xd94
 	.uleb128 0xf
-	.4byte	.LASF289
-	.byte	0x14
+	.4byte	.LASF277
+	.byte	0x16
 	.2byte	0x20c
-	.4byte	0xd81
+	.4byte	0xd94
 	.uleb128 0xf
-	.4byte	.LASF290
-	.byte	0x14
+	.4byte	.LASF278
+	.byte	0x16
 	.2byte	0x20d
-	.4byte	0xd9a
+	.4byte	0xdad
 	.uleb128 0xc
-	.4byte	0xd9a
-	.4byte	0xf71
+	.4byte	0xdad
+	.4byte	0xe67
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x3
 	.byte	0
 	.uleb128 0xf
-	.4byte	.LASF291
-	.byte	0x14
+	.4byte	.LASF279
+	.byte	0x16
 	.2byte	0x20e
-	.4byte	0xf61
+	.4byte	0xe57
 	.uleb128 0xf
-	.4byte	.LASF292
-	.byte	0x14
+	.4byte	.LASF280
+	.byte	0x16
 	.2byte	0x20f
-	.4byte	0xd9a
-	.uleb128 0xf
-	.4byte	.LASF293
-	.byte	0x14
+	.4byte	0xdad
+	.uleb128 0xf
+	.4byte	.LASF281
+	.byte	0x16
 	.2byte	0x210
 	.4byte	0x50
 	.uleb128 0xc
 	.4byte	0x9a
-	.4byte	0xfa5
+	.4byte	0xe9b
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x5
 	.byte	0
 	.uleb128 0x7
-	.4byte	0xf95
+	.4byte	0xe8b
 	.uleb128 0xf
-	.4byte	.LASF294
-	.byte	0x14
+	.4byte	.LASF282
+	.byte	0x16
 	.2byte	0x211
-	.4byte	0xfa5
+	.4byte	0xe9b
 	.uleb128 0xf
-	.4byte	.LASF295
-	.byte	0x14
+	.4byte	.LASF283
+	.byte	0x16
 	.2byte	0x212
-	.4byte	0xfa5
+	.4byte	0xe9b
 	.uleb128 0xf
-	.4byte	.LASF296
-	.byte	0x14
+	.4byte	.LASF284
+	.byte	0x16
 	.2byte	0x216
 	.4byte	0x117
 	.uleb128 0xf
-	.4byte	.LASF297
-	.byte	0x14
+	.4byte	.LASF285
+	.byte	0x16
 	.2byte	0x217
 	.4byte	0x117
 	.uleb128 0xf
-	.4byte	.LASF298
-	.byte	0x14
+	.4byte	.LASF286
+	.byte	0x16
 	.2byte	0x219
 	.4byte	0x50
 	.uleb128 0xc
 	.4byte	0xdd
-	.4byte	0xff7
-	.uleb128 0x1e
+	.4byte	0xeed
+	.uleb128 0x1d
 	.4byte	0xcb
 	.2byte	0x3ff
 	.byte	0
 	.uleb128 0xf
-	.4byte	.LASF299
-	.byte	0x14
+	.4byte	.LASF287
+	.byte	0x16
 	.2byte	0x220
-	.4byte	0xfe6
+	.4byte	0xedc
 	.uleb128 0xf
-	.4byte	.LASF300
-	.byte	0x14
+	.4byte	.LASF288
+	.byte	0x16
 	.2byte	0x222
 	.4byte	0x9f
 	.uleb128 0xf
-	.4byte	.LASF301
-	.byte	0x14
+	.4byte	.LASF289
+	.byte	0x16
 	.2byte	0x224
 	.4byte	0x9f
-	.uleb128 0x29
-	.4byte	.LASF302
+	.uleb128 0xf
+	.4byte	.LASF290
+	.byte	0x16
+	.2byte	0x230
+	.4byte	0xd94
+	.uleb128 0x27
+	.4byte	.LASF291
 	.byte	0x4
 	.4byte	0x7b
-	.byte	0x14
+	.byte	0x16
 	.2byte	0x286
-	.4byte	0x1045
+	.4byte	0xf47
 	.uleb128 0x11
-	.4byte	.LASF303
+	.4byte	.LASF292
 	.byte	0
 	.uleb128 0x11
-	.4byte	.LASF304
+	.4byte	.LASF293
 	.byte	0x1
 	.uleb128 0x11
-	.4byte	.LASF305
+	.4byte	.LASF294
 	.byte	0x2
 	.uleb128 0x11
-	.4byte	.LASF306
+	.4byte	.LASF295
 	.byte	0x3
 	.byte	0
 	.uleb128 0xf
-	.4byte	.LASF307
-	.byte	0x14
+	.4byte	.LASF296
+	.byte	0x16
 	.2byte	0x28c
-	.4byte	0x101b
+	.4byte	0xf1d
 	.uleb128 0x4
-	.4byte	.LASF308
-	.byte	0x15
+	.4byte	.LASF297
+	.byte	0x17
 	.byte	0x2b
-	.4byte	0x190
+	.4byte	0x195
 	.uleb128 0x4
-	.4byte	.LASF309
-	.byte	0x15
+	.4byte	.LASF298
+	.byte	0x17
 	.byte	0x2b
-	.4byte	0x190
+	.4byte	0x195
 	.uleb128 0x14
-	.4byte	.LASF310
+	.4byte	.LASF299
 	.byte	0x2c
-	.byte	0x16
+	.byte	0x18
 	.byte	0x1b
-	.4byte	0x10f7
+	.4byte	0xff9
 	.uleb128 0x15
 	.4byte	.LASF74
-	.byte	0x16
+	.byte	0x18
 	.byte	0x1c
 	.4byte	0xd7
 	.byte	0
 	.uleb128 0xb
 	.ascii	"os\000"
-	.byte	0x16
+	.byte	0x18
 	.byte	0x1d
 	.4byte	0x90
 	.byte	0x4
 	.uleb128 0x15
 	.4byte	.LASF263
-	.byte	0x16
+	.byte	0x18
 	.byte	0x1e
 	.4byte	0x101
 	.byte	0x8
 	.uleb128 0x15
-	.4byte	.LASF311
-	.byte	0x16
+	.4byte	.LASF300
+	.byte	0x18
 	.byte	0x1f
 	.4byte	0x101
 	.byte	0xc
 	.uleb128 0x15
-	.4byte	.LASF312
-	.byte	0x16
+	.4byte	.LASF301
+	.byte	0x18
 	.byte	0x25
 	.4byte	0x101
 	.byte	0x10
 	.uleb128 0x15
-	.4byte	.LASF313
-	.byte	0x16
+	.4byte	.LASF302
+	.byte	0x18
 	.byte	0x27
-	.4byte	0x14e
+	.4byte	0x153
 	.byte	0x14
 	.uleb128 0x15
-	.4byte	.LASF314
-	.byte	0x16
+	.4byte	.LASF303
+	.byte	0x18
 	.byte	0x28
 	.4byte	0x9f
 	.byte	0x18
 	.uleb128 0x15
-	.4byte	.LASF315
-	.byte	0x16
+	.4byte	.LASF304
+	.byte	0x18
 	.byte	0x29
 	.4byte	0x9f
 	.byte	0x1c
 	.uleb128 0x15
 	.4byte	.LASF78
-	.byte	0x16
+	.byte	0x18
 	.byte	0x2a
 	.4byte	0x9f
 	.byte	0x20
 	.uleb128 0x15
-	.4byte	.LASF316
-	.byte	0x16
+	.4byte	.LASF305
+	.byte	0x18
 	.byte	0x2b
 	.4byte	0x9f
 	.byte	0x24
 	.uleb128 0xb
 	.ascii	"arg\000"
-	.byte	0x16
+	.byte	0x18
 	.byte	0x2c
-	.4byte	0x14e
+	.4byte	0x153
 	.byte	0x28
 	.byte	0
 	.uleb128 0x14
-	.4byte	.LASF317
+	.4byte	.LASF306
 	.byte	0x14
-	.byte	0x16
+	.byte	0x18
 	.byte	0x38
-	.4byte	0x1140
+	.4byte	0x1042
 	.uleb128 0xb
 	.ascii	"dev\000"
-	.byte	0x16
+	.byte	0x18
 	.byte	0x39
-	.4byte	0x14e
+	.4byte	0x153
 	.byte	0
 	.uleb128 0x15
-	.4byte	.LASF278
-	.byte	0x16
+	.4byte	.LASF307
+	.byte	0x18
 	.byte	0x3a
-	.4byte	0x14e
+	.4byte	0x153
 	.byte	0x4
 	.uleb128 0x15
-	.4byte	.LASF318
-	.byte	0x16
+	.4byte	.LASF308
+	.byte	0x18
 	.byte	0x3b
 	.4byte	0x50
 	.byte	0x8
 	.uleb128 0x15
-	.4byte	.LASF319
-	.byte	0x16
+	.4byte	.LASF309
+	.byte	0x18
 	.byte	0x3c
 	.4byte	0xd7
 	.byte	0xc
 	.uleb128 0x15
-	.4byte	.LASF320
-	.byte	0x16
+	.4byte	.LASF310
+	.byte	0x18
 	.byte	0x3d
-	.4byte	0x1164
+	.4byte	0x1066
 	.byte	0x10
 	.byte	0
 	.uleb128 0x19
 	.4byte	0x122
-	.4byte	0x115e
+	.4byte	0x1060
 	.uleb128 0x1a
-	.4byte	0x115e
+	.4byte	0x1060
 	.uleb128 0x1a
 	.4byte	0x122
 	.uleb128 0x1a
 	.4byte	0x122
 	.uleb128 0x1a
-	.4byte	0x14e
+	.4byte	0x153
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x10f7
+	.4byte	0xff9
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x1140
+	.4byte	0x1042
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x1067
+	.4byte	0xf69
 	.uleb128 0xf
-	.4byte	.LASF321
-	.byte	0x17
+	.4byte	.LASF311
+	.byte	0x19
 	.2byte	0x3ba
 	.4byte	0x122
 	.uleb128 0xf
-	.4byte	.LASF322
-	.byte	0x17
+	.4byte	.LASF312
+	.byte	0x19
 	.2byte	0x3bb
 	.4byte	0x122
 	.uleb128 0xf
-	.4byte	.LASF323
-	.byte	0x17
+	.4byte	.LASF313
+	.byte	0x19
 	.2byte	0x3bc
 	.4byte	0x122
-	.uleb128 0x2a
-	.4byte	.LASF338
+	.uleb128 0x28
+	.4byte	.LASF330
 	.byte	0x1
-	.2byte	0x2f1
+	.2byte	0x2f6
 	.4byte	0x50
-	.4byte	.LFB219
-	.4byte	.LFE219-.LFB219
+	.4byte	.LFB216
+	.4byte	.LFE216-.LFB216
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x189a
-	.uleb128 0x2b
-	.4byte	.LASF324
-	.byte	0x1
-	.2byte	0x2f1
-	.4byte	0x116a
-	.4byte	.LLST59
-	.uleb128 0x2b
-	.4byte	.LASF325
+	.4byte	0x18be
+	.uleb128 0x29
+	.4byte	.LASF314
 	.byte	0x1
-	.2byte	0x2f2
-	.4byte	0x115e
+	.2byte	0x2f6
+	.4byte	0x106c
 	.4byte	.LLST60
-	.uleb128 0x2b
-	.4byte	.LASF326
+	.uleb128 0x29
+	.4byte	.LASF315
 	.byte	0x1
-	.2byte	0x2f2
-	.4byte	0x122
+	.2byte	0x2f7
+	.4byte	0x1060
 	.4byte	.LLST61
-	.uleb128 0x2c
-	.ascii	"fit\000"
+	.uleb128 0x29
+	.4byte	.LASF316
 	.byte	0x1
-	.2byte	0x2f2
-	.4byte	0x14e
+	.2byte	0x2f7
+	.4byte	0x122
 	.4byte	.LLST62
-	.uleb128 0x2d
-	.4byte	.LASF327
+	.uleb128 0x2a
+	.ascii	"fit\000"
 	.byte	0x1
-	.2byte	0x2f4
-	.4byte	0x122
+	.2byte	0x2f7
+	.4byte	0x153
 	.4byte	.LLST63
-	.uleb128 0x2e
+	.uleb128 0x2b
+	.4byte	.LASF317
+	.byte	0x1
+	.2byte	0x2f9
+	.4byte	0x122
+	.4byte	.LLST64
+	.uleb128 0x2c
 	.ascii	"ret\000"
 	.byte	0x1
-	.2byte	0x2f5
+	.2byte	0x2fa
 	.4byte	0x50
-	.4byte	.LLST64
-	.uleb128 0x2f
+	.4byte	.LLST65
+	.uleb128 0x2c
 	.ascii	"i\000"
 	.byte	0x1
-	.2byte	0x2f6
+	.2byte	0x2fb
 	.4byte	0x50
-	.byte	0
-	.uleb128 0x30
-	.4byte	0x189a
+	.4byte	.LLST66
+	.uleb128 0x2d
+	.4byte	0x18be
 	.4byte	.LBB82
 	.4byte	.Ldebug_ranges0+0x58
 	.byte	0x1
-	.2byte	0x308
-	.4byte	0x16b2
-	.uleb128 0x31
-	.4byte	0x18cf
-	.4byte	.LLST65
-	.uleb128 0x31
-	.4byte	0x18c3
-	.4byte	.LLST66
-	.uleb128 0x31
-	.4byte	0x18b7
+	.2byte	0x30d
+	.4byte	0x1617
+	.uleb128 0x2e
+	.4byte	0x18f3
 	.4byte	.LLST67
-	.uleb128 0x31
-	.4byte	0x18ab
+	.uleb128 0x2e
+	.4byte	0x18e7
 	.4byte	.LLST68
-	.uleb128 0x32
-	.4byte	.Ldebug_ranges0+0x58
-	.uleb128 0x33
+	.uleb128 0x2e
 	.4byte	0x18db
+	.4byte	.LLST69
+	.uleb128 0x2f
+	.4byte	0x18cf
+	.uleb128 0x30
+	.4byte	.Ldebug_ranges0+0x58
+	.uleb128 0x31
+	.4byte	0x18ff
 	.uleb128 0x3
 	.byte	0x91
-	.sleb128 -188
-	.uleb128 0x33
-	.4byte	0x18e7
+	.sleb128 -152
+	.uleb128 0x31
+	.4byte	0x190b
 	.uleb128 0x3
 	.byte	0x91
-	.sleb128 -244
-	.uleb128 0x34
-	.4byte	0x18f3
-	.4byte	.LLST69
-	.uleb128 0x34
-	.4byte	0x18ff
+	.sleb128 -208
+	.uleb128 0x32
+	.4byte	0x1917
 	.4byte	.LLST70
-	.uleb128 0x34
-	.4byte	0x190b
+	.uleb128 0x32
+	.4byte	0x1923
 	.4byte	.LLST71
-	.uleb128 0x34
-	.4byte	0x1917
+	.uleb128 0x32
+	.4byte	0x192f
 	.4byte	.LLST72
-	.uleb128 0x34
-	.4byte	0x1923
+	.uleb128 0x32
+	.4byte	0x193b
 	.4byte	.LLST73
-	.uleb128 0x35
-	.4byte	0x192f
-	.uleb128 0x36
-	.4byte	0x1bb2
+	.uleb128 0x32
+	.4byte	0x1947
+	.4byte	.LLST74
+	.uleb128 0x32
+	.4byte	0x1960
+	.4byte	.LLST75
+	.uleb128 0x33
+	.4byte	0x1953
+	.uleb128 0x34
+	.4byte	0x1bee
 	.4byte	.LBB84
 	.4byte	.LBE84-.LBB84
 	.byte	0x1
-	.2byte	0x2ad
-	.4byte	0x12e6
-	.uleb128 0x31
-	.4byte	0x1bdb
-	.4byte	.LLST74
-	.uleb128 0x31
-	.4byte	0x1bcf
-	.4byte	.LLST75
-	.uleb128 0x31
-	.4byte	0x1bc3
+	.2byte	0x2b2
+	.4byte	0x11f0
+	.uleb128 0x2e
+	.4byte	0x1c17
 	.4byte	.LLST76
-	.uleb128 0x37
-	.4byte	.LVL156
-	.4byte	0x25de
-	.uleb128 0x38
+	.uleb128 0x2e
+	.4byte	0x1c0b
+	.4byte	.LLST77
+	.uleb128 0x2e
+	.4byte	0x1bff
+	.4byte	.LLST78
+	.uleb128 0x35
+	.4byte	.LVL167
+	.4byte	0x2650
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x7b
+	.byte	0x78
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
@@ -3902,235 +3943,236 @@ __func__.8712:
 	.sleb128 4
 	.byte	0
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x37
 	.4byte	.LBB86
 	.4byte	.LBE86-.LBB86
-	.4byte	0x151b
-	.uleb128 0x33
-	.4byte	0x193d
+	.4byte	0x1427
+	.uleb128 0x31
+	.4byte	0x196d
 	.uleb128 0x3
 	.byte	0x91
-	.sleb128 -248
-	.uleb128 0x36
-	.4byte	0x1bb2
+	.sleb128 -212
+	.uleb128 0x34
+	.4byte	0x1bee
 	.4byte	.LBB87
 	.4byte	.LBE87-.LBB87
 	.byte	0x1
-	.2byte	0x2c4
-	.4byte	0x134b
-	.uleb128 0x31
-	.4byte	0x1bdb
-	.4byte	.LLST77
-	.uleb128 0x31
-	.4byte	0x1bcf
-	.4byte	.LLST78
-	.uleb128 0x31
-	.4byte	0x1bc3
+	.2byte	0x2c9
+	.4byte	0x1255
+	.uleb128 0x2e
+	.4byte	0x1c17
 	.4byte	.LLST79
-	.uleb128 0x37
-	.4byte	.LVL162
-	.4byte	0x25de
-	.uleb128 0x38
+	.uleb128 0x2e
+	.4byte	0x1c0b
+	.4byte	.LLST80
+	.uleb128 0x2e
+	.4byte	0x1bff
+	.4byte	.LLST81
+	.uleb128 0x35
+	.4byte	.LVL173
+	.4byte	0x2650
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x4
 	.byte	0x7d
 	.sleb128 96
 	.byte	0x6
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0x7d
-	.sleb128 104
+	.sleb128 108
 	.byte	0
 	.byte	0
-	.uleb128 0x36
-	.4byte	0x1be7
+	.uleb128 0x34
+	.4byte	0x1c23
 	.4byte	.LBB89
 	.4byte	.LBE89-.LBB89
 	.byte	0x1
-	.2byte	0x2e1
-	.4byte	0x1494
-	.uleb128 0x31
-	.4byte	0x1c28
-	.4byte	.LLST80
-	.uleb128 0x31
-	.4byte	0x1c1c
-	.4byte	.LLST81
-	.uleb128 0x31
-	.4byte	0x1c10
+	.2byte	0x2e6
+	.4byte	0x13a0
+	.uleb128 0x2e
+	.4byte	0x1c64
 	.4byte	.LLST82
-	.uleb128 0x3a
-	.4byte	0x1c04
-	.uleb128 0x31
-	.4byte	0x1bf8
+	.uleb128 0x2e
+	.4byte	0x1c58
 	.4byte	.LLST83
-	.uleb128 0x3b
-	.4byte	.LBB90
-	.4byte	.LBE90-.LBB90
-	.uleb128 0x34
-	.4byte	0x1c34
+	.uleb128 0x2e
+	.4byte	0x1c4c
 	.4byte	.LLST84
-	.uleb128 0x33
+	.uleb128 0x2f
 	.4byte	0x1c40
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -232
-	.uleb128 0x34
-	.4byte	0x1c4c
+	.uleb128 0x2e
+	.4byte	0x1c34
 	.4byte	.LLST85
-	.uleb128 0x3c
-	.4byte	.LVL169
-	.4byte	0x2484
-	.4byte	0x13d6
 	.uleb128 0x38
+	.4byte	.LBB90
+	.4byte	.LBE90-.LBB90
+	.uleb128 0x32
+	.4byte	0x1c70
+	.4byte	.LLST86
+	.uleb128 0x31
+	.4byte	0x1c7c
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -196
+	.uleb128 0x32
+	.4byte	0x1c88
+	.4byte	.LLST87
+	.uleb128 0x39
+	.4byte	.LVL180
+	.4byte	0x24f6
+	.4byte	0x12e0
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC21
-	.uleb128 0x38
+	.4byte	.LC25
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
-	.byte	0x78
+	.byte	0x7b
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x3
 	.byte	0x7d
-	.sleb128 120
+	.sleb128 124
 	.byte	0
-	.uleb128 0x3c
-	.4byte	.LVL171
-	.4byte	0x22ba
-	.4byte	0x13ff
-	.uleb128 0x38
+	.uleb128 0x39
+	.4byte	.LVL182
+	.4byte	0x22f6
+	.4byte	0x130b
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x4
+	.byte	0x7d
+	.sleb128 100
+	.byte	0x6
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC21
-	.uleb128 0x38
+	.4byte	.LC25
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
-	.byte	0x78
+	.byte	0x7b
 	.sleb128 0
 	.byte	0
-	.uleb128 0x3c
-	.4byte	.LVL174
-	.4byte	0x25ea
-	.4byte	0x1427
-	.uleb128 0x38
+	.uleb128 0x39
+	.4byte	.LVL185
+	.4byte	0x265c
+	.4byte	0x1333
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x7b
+	.byte	0x78
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC22
-	.uleb128 0x38
+	.4byte	.LC26
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x1
 	.byte	0x30
 	.byte	0
-	.uleb128 0x3c
-	.4byte	.LVL175
-	.4byte	0x25ea
-	.4byte	0x144f
-	.uleb128 0x38
+	.uleb128 0x39
+	.4byte	.LVL186
+	.4byte	0x265c
+	.4byte	0x135b
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x7b
+	.byte	0x78
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC23
-	.uleb128 0x38
+	.4byte	.LC27
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x1
 	.byte	0x30
 	.byte	0
-	.uleb128 0x37
-	.4byte	.LVL176
-	.4byte	0x25f6
-	.uleb128 0x38
+	.uleb128 0x35
+	.4byte	.LVL187
+	.4byte	0x2668
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x4
 	.byte	0x7d
 	.sleb128 96
 	.byte	0x6
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x78
+	.byte	0x7b
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x4
 	.byte	0x7d
 	.sleb128 92
 	.byte	0x6
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x4
 	.byte	0x7d
 	.sleb128 88
 	.byte	0x6
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x2
 	.byte	0x7d
 	.sleb128 0
@@ -4138,7 +4180,7 @@ __func__.8712:
 	.byte	0x7d
 	.sleb128 84
 	.byte	0x6
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x2
 	.byte	0x7d
 	.sleb128 4
@@ -4146,7 +4188,7 @@ __func__.8712:
 	.byte	0x7d
 	.sleb128 80
 	.byte	0x6
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x2
 	.byte	0x7d
 	.sleb128 8
@@ -4157,344 +4199,396 @@ __func__.8712:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x3c
-	.4byte	.LVL158
-	.4byte	0x22ba
-	.4byte	0x14bd
-	.uleb128 0x38
+	.uleb128 0x39
+	.4byte	.LVL169
+	.4byte	0x22f6
+	.4byte	0x13cb
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x4
+	.byte	0x7d
+	.sleb128 100
+	.byte	0x6
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC21
-	.uleb128 0x38
+	.4byte	.LC25
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
-	.byte	0x78
+	.byte	0x7b
 	.sleb128 0
 	.byte	0
-	.uleb128 0x3c
-	.4byte	.LVL163
-	.4byte	0x1d8b
-	.4byte	0x14ef
-	.uleb128 0x38
+	.uleb128 0x39
+	.4byte	.LVL174
+	.4byte	0x1dc7
+	.4byte	0x13fb
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x76
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
 	.uleb128 0x4
 	.byte	0x7d
-	.sleb128 100
+	.sleb128 96
 	.byte	0x6
-	.uleb128 0x38
+	.uleb128 0x36
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 4
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.uleb128 0x35
+	.4byte	.LVL176
+	.4byte	0x1c95
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x36
 	.uleb128 0x1
-	.byte	0x52
+	.byte	0x53
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x2
 	.byte	0x7d
 	.sleb128 0
 	.uleb128 0x4
 	.byte	0x7d
-	.sleb128 96
+	.sleb128 100
 	.byte	0x6
-	.uleb128 0x38
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 4
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
 	.byte	0
-	.uleb128 0x37
-	.4byte	.LVL165
-	.4byte	0x1c59
-	.uleb128 0x38
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LVL137
+	.4byte	0x1ace
+	.4byte	0x1450
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x7b
+	.byte	0x76
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x7a
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x4
 	.byte	0x7d
-	.sleb128 100
+	.sleb128 92
 	.byte	0x6
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x53
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x38
-	.uleb128 0x2
+	.uleb128 0x3
 	.byte	0x7d
-	.sleb128 0
+	.sleb128 112
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LVL138
+	.4byte	0x2673
+	.4byte	0x146d
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
 	.uleb128 0x2
-	.byte	0x7a
+	.byte	0x75
 	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC18
 	.byte	0
-	.byte	0
-	.uleb128 0x3c
-	.4byte	.LVL134
-	.4byte	0x1a92
-	.4byte	0x1545
-	.uleb128 0x38
+	.uleb128 0x3a
+	.4byte	.LVL139
+	.4byte	0x267f
+	.uleb128 0x39
+	.4byte	.LVL140
+	.4byte	0x268b
+	.4byte	0x148f
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x4
-	.byte	0x7d
-	.sleb128 100
-	.byte	0x6
-	.uleb128 0x38
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xf3
 	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x38
+	.byte	0x30
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LVL142
+	.4byte	0x2697
+	.4byte	0x14a6
+	.uleb128 0x36
 	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x3
-	.byte	0x7d
-	.sleb128 108
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC19
 	.byte	0
-	.uleb128 0x3c
-	.4byte	.LVL135
-	.4byte	0x2601
-	.4byte	0x1562
-	.uleb128 0x38
+	.uleb128 0x39
+	.4byte	.LVL146
+	.4byte	0x244c
+	.4byte	0x14ba
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
-	.uleb128 0x38
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LVL148
+	.4byte	0x2697
+	.4byte	0x14d7
+	.uleb128 0x36
 	.uleb128 0x1
-	.byte	0x51
+	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC16
+	.4byte	.LC20
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
 	.byte	0
-	.uleb128 0x3d
-	.4byte	.LVL136
-	.4byte	0x260d
-	.uleb128 0x3c
-	.4byte	.LVL137
-	.4byte	0x2619
-	.4byte	0x1582
-	.uleb128 0x38
+	.uleb128 0x39
+	.4byte	.LVL149
+	.4byte	0x2697
+	.4byte	0x14ee
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC17
+	.4byte	.LC21
 	.byte	0
-	.uleb128 0x3d
-	.4byte	.LVL138
-	.4byte	0x2624
-	.uleb128 0x3c
-	.4byte	.LVL139
-	.4byte	0x22ba
-	.4byte	0x15b4
-	.uleb128 0x38
+	.uleb128 0x39
+	.4byte	.LVL150
+	.4byte	0x22f6
+	.4byte	0x1519
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x4
+	.byte	0x7d
+	.sleb128 100
+	.byte	0x6
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC18
-	.uleb128 0x38
+	.4byte	.LC22
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
-	.byte	0x78
+	.byte	0x7b
 	.sleb128 0
 	.byte	0
-	.uleb128 0x3c
-	.4byte	.LVL141
-	.4byte	0x1d8b
-	.4byte	0x15e5
-	.uleb128 0x38
+	.uleb128 0x39
+	.4byte	.LVL152
+	.4byte	0x1dc7
+	.4byte	0x1548
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x76
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x4
-	.byte	0x7d
-	.sleb128 100
-	.byte	0x6
-	.uleb128 0x38
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x2
 	.byte	0x7d
 	.sleb128 0
 	.uleb128 0x2
-	.byte	0x7b
+	.byte	0x78
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x2
 	.byte	0x7d
 	.sleb128 4
 	.uleb128 0x3
 	.byte	0x7d
-	.sleb128 164
+	.sleb128 168
 	.byte	0
-	.uleb128 0x3d
-	.4byte	.LVL143
-	.4byte	0x1b87
-	.uleb128 0x3c
-	.4byte	.LVL145
-	.4byte	0x2619
-	.4byte	0x1605
-	.uleb128 0x38
+	.uleb128 0x3a
+	.4byte	.LVL154
+	.4byte	0x1bc3
+	.uleb128 0x39
+	.4byte	.LVL156
+	.4byte	0x2697
+	.4byte	0x1568
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC19
+	.4byte	.LC23
 	.byte	0
-	.uleb128 0x3c
-	.4byte	.LVL146
-	.4byte	0x22ba
-	.4byte	0x162d
-	.uleb128 0x38
+	.uleb128 0x39
+	.4byte	.LVL157
+	.4byte	0x22f6
+	.4byte	0x1592
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x4
+	.byte	0x7d
+	.sleb128 100
+	.byte	0x6
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC20
-	.uleb128 0x38
+	.4byte	.LC24
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x1
 	.byte	0x30
 	.byte	0
-	.uleb128 0x3c
-	.4byte	.LVL148
-	.4byte	0x22ba
-	.4byte	0x1655
-	.uleb128 0x38
+	.uleb128 0x39
+	.4byte	.LVL159
+	.4byte	0x22f6
+	.4byte	0x15bc
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x4
+	.byte	0x7d
+	.sleb128 100
+	.byte	0x6
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC21
-	.uleb128 0x38
+	.4byte	.LC25
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x1
 	.byte	0x30
 	.byte	0
-	.uleb128 0x3c
-	.4byte	.LVL152
-	.4byte	0x1d8b
-	.4byte	0x1685
-	.uleb128 0x38
+	.uleb128 0x39
+	.4byte	.LVL163
+	.4byte	0x1dc7
+	.4byte	0x15ea
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x76
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x4
-	.byte	0x7d
-	.sleb128 100
-	.byte	0x6
-	.uleb128 0x38
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x2
 	.byte	0x7d
 	.sleb128 0
 	.uleb128 0x2
-	.byte	0x7b
+	.byte	0x78
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x2
 	.byte	0x7d
 	.sleb128 4
@@ -4502,301 +4596,371 @@ __func__.8712:
 	.byte	0x74
 	.sleb128 0
 	.byte	0
-	.uleb128 0x37
-	.4byte	.LVL157
-	.4byte	0x1c59
-	.uleb128 0x38
+	.uleb128 0x35
+	.4byte	.LVL168
+	.4byte	0x1c95
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x76
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x52
-	.uleb128 0x4
-	.byte	0x7d
-	.sleb128 100
-	.byte	0x6
-	.uleb128 0x38
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x2
 	.byte	0x7d
 	.sleb128 0
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
+	.uleb128 0x4
+	.byte	0x7d
+	.sleb128 100
+	.byte	0x6
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x30
-	.4byte	0x1960
+	.uleb128 0x2d
+	.4byte	0x1990
 	.4byte	.LBB92
 	.4byte	.Ldebug_ranges0+0x70
 	.byte	0x1
-	.2byte	0x30c
-	.4byte	0x187d
-	.uleb128 0x31
-	.4byte	0x197d
-	.4byte	.LLST86
-	.uleb128 0x31
-	.4byte	0x1971
-	.4byte	.LLST87
-	.uleb128 0x32
-	.4byte	.Ldebug_ranges0+0x70
-	.uleb128 0x33
-	.4byte	0x1989
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -244
-	.uleb128 0x33
-	.4byte	0x1995
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -232
-	.uleb128 0x3e
+	.2byte	0x311
+	.4byte	0x1865
+	.uleb128 0x2e
+	.4byte	0x19ad
+	.4byte	.LLST88
+	.uleb128 0x2e
 	.4byte	0x19a1
-	.4byte	0x25cb
 	.4byte	.LLST89
-	.uleb128 0x34
-	.4byte	0x19ad
-	.4byte	.LLST90
-	.uleb128 0x33
+	.uleb128 0x30
+	.4byte	.Ldebug_ranges0+0x70
+	.uleb128 0x31
 	.4byte	0x19b9
 	.uleb128 0x3
 	.byte	0x91
-	.sleb128 -248
-	.uleb128 0x34
+	.sleb128 -208
+	.uleb128 0x31
 	.4byte	0x19c5
-	.4byte	.LLST91
-	.uleb128 0x34
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -196
+	.uleb128 0x3b
 	.4byte	0x19d1
-	.4byte	.LLST92
-	.uleb128 0x34
+	.4byte	0x263d
+	.4byte	.LLST91
+	.uleb128 0x32
 	.4byte	0x19dd
-	.4byte	.LLST93
-	.uleb128 0x34
+	.4byte	.LLST92
+	.uleb128 0x31
 	.4byte	0x19e9
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -212
+	.uleb128 0x32
+	.4byte	0x19f5
+	.4byte	.LLST93
+	.uleb128 0x32
+	.4byte	0x1a01
 	.4byte	.LLST94
-	.uleb128 0x34
-	.4byte	0x19f3
+	.uleb128 0x32
+	.4byte	0x1a0d
 	.4byte	.LLST95
-	.uleb128 0x34
-	.4byte	0x19ff
+	.uleb128 0x32
+	.4byte	0x1a19
 	.4byte	.LLST96
-	.uleb128 0x33
-	.4byte	0x1a0b
+	.uleb128 0x32
+	.4byte	0x1a23
+	.4byte	.LLST97
+	.uleb128 0x32
+	.4byte	0x1a2f
+	.4byte	.LLST98
+	.uleb128 0x31
+	.4byte	0x1a3b
 	.uleb128 0x3
 	.byte	0x91
-	.sleb128 -188
-	.uleb128 0x35
-	.4byte	0x1a17
-	.uleb128 0x3c
-	.4byte	.LVL184
-	.4byte	0x1a59
-	.4byte	0x176c
-	.uleb128 0x38
+	.sleb128 -152
+	.uleb128 0x32
+	.4byte	0x1a54
+	.4byte	.LLST99
+	.uleb128 0x33
+	.4byte	0x1a47
+	.uleb128 0x39
+	.4byte	.LVL194
+	.4byte	0x1a95
+	.4byte	0x16da
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x76
 	.sleb128 0
 	.byte	0
-	.uleb128 0x3c
-	.4byte	.LVL186
-	.4byte	0x262f
-	.4byte	0x1781
-	.uleb128 0x38
+	.uleb128 0x39
+	.4byte	.LVL196
+	.4byte	0x26a2
+	.4byte	0x16ef
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0x77
-	.sleb128 148
+	.sleb128 152
 	.byte	0
-	.uleb128 0x3d
-	.4byte	.LVL187
-	.4byte	0x2619
-	.uleb128 0x3f
-	.4byte	.LVL192
+	.uleb128 0x3a
+	.4byte	.LVL197
+	.4byte	0x2697
+	.uleb128 0x3c
+	.4byte	.LVL203
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x75
 	.sleb128 0
-	.4byte	0x17ae
-	.uleb128 0x38
+	.4byte	0x171e
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x76
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x4
+	.byte	0x77
+	.sleb128 84
+	.byte	0x6
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x1
 	.byte	0x31
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
-	.byte	0x7a
+	.byte	0x78
 	.sleb128 0
 	.byte	0
-	.uleb128 0x3c
-	.4byte	.LVL195
-	.4byte	0x1a92
-	.4byte	0x17d5
-	.uleb128 0x38
+	.uleb128 0x39
+	.4byte	.LVL206
+	.4byte	0x1ace
+	.4byte	0x1747
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x76
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x4
+	.byte	0x77
+	.sleb128 84
+	.byte	0x6
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
-	.byte	0x7a
+	.byte	0x78
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x3
 	.byte	0x77
-	.sleb128 88
+	.sleb128 92
 	.byte	0
-	.uleb128 0x3c
-	.4byte	.LVL197
-	.4byte	0x2601
-	.4byte	0x17f4
-	.uleb128 0x38
+	.uleb128 0x39
+	.4byte	.LVL208
+	.4byte	0x268b
+	.4byte	0x1760
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x4
-	.byte	0x77
-	.sleb128 84
-	.byte	0x6
-	.uleb128 0x38
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LVL210
+	.4byte	0x2697
+	.4byte	0x1777
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC16
+	.4byte	.LC19
 	.byte	0
-	.uleb128 0x3c
-	.4byte	.LVL199
-	.4byte	0x22ba
-	.4byte	0x181b
-	.uleb128 0x38
+	.uleb128 0x39
+	.4byte	.LVL213
+	.4byte	0x244c
+	.4byte	0x178b
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x4
-	.byte	0x77
-	.sleb128 84
-	.byte	0x6
-	.uleb128 0x38
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LVL215
+	.4byte	0x2697
+	.4byte	0x17a8
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC20
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x7b
 	.sleb128 0
-	.uleb128 0x38
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LVL218
+	.4byte	0x2697
+	.4byte	0x17bf
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC21
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LVL219
+	.4byte	0x2673
+	.4byte	0x17dc
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC18
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LVL221
+	.4byte	0x22f6
+	.4byte	0x1803
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x77
+	.sleb128 80
+	.byte	0x6
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x7a
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x1
 	.byte	0x30
 	.byte	0
-	.uleb128 0x3c
-	.4byte	.LVL201
-	.4byte	0x1d8b
-	.4byte	0x1845
-	.uleb128 0x38
+	.uleb128 0x39
+	.4byte	.LVL223
+	.4byte	0x1dc7
+	.4byte	0x182d
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x75
+	.byte	0x76
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x38
-	.uleb128 0x1
-	.byte	0x52
 	.uleb128 0x4
 	.byte	0x77
 	.sleb128 84
 	.byte	0x6
-	.uleb128 0x38
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x36
 	.uleb128 0x2
 	.byte	0x7d
 	.sleb128 4
 	.uleb128 0x3
 	.byte	0x77
-	.sleb128 104
+	.sleb128 108
 	.byte	0
-	.uleb128 0x3c
-	.4byte	.LVL203
-	.4byte	0x263a
-	.4byte	0x1862
-	.uleb128 0x38
+	.uleb128 0x39
+	.4byte	.LVL225
+	.4byte	0x26ad
+	.4byte	0x184a
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x7a
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	.LC0
 	.byte	0
-	.uleb128 0x37
-	.4byte	.LVL207
-	.4byte	0x263a
-	.uleb128 0x38
+	.uleb128 0x35
+	.4byte	.LVL229
+	.4byte	0x26ad
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x7a
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x5
@@ -4805,329 +4969,382 @@ __func__.8712:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x40
+	.uleb128 0x3d
 	.4byte	0xd2
-	.4byte	.LLST88
-	.uleb128 0x37
+	.4byte	.LLST90
+	.uleb128 0x39
 	.4byte	.LVL130
-	.4byte	0x2619
-	.uleb128 0x38
+	.4byte	0x2697
+	.4byte	0x188b
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	.LC15
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.byte	0
+	.uleb128 0x3c
+	.4byte	.LVL131
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.4byte	0x18b4
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x4
+	.byte	0x7d
+	.sleb128 96
+	.byte	0x6
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x4
+	.byte	0x7d
+	.sleb128 92
+	.byte	0x6
 	.byte	0
+	.uleb128 0x3a
+	.4byte	.LVL132
+	.4byte	0x2697
 	.byte	0
-	.uleb128 0x41
-	.4byte	.LASF333
+	.uleb128 0x3e
+	.4byte	.LASF325
 	.byte	0x1
-	.2byte	0x229
+	.2byte	0x22e
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x194b
-	.uleb128 0x42
-	.4byte	.LASF324
+	.4byte	0x197b
+	.uleb128 0x3f
+	.4byte	.LASF314
 	.byte	0x1
-	.2byte	0x229
-	.4byte	0x116a
-	.uleb128 0x42
-	.4byte	.LASF325
+	.2byte	0x22e
+	.4byte	0x106c
+	.uleb128 0x3f
+	.4byte	.LASF315
 	.byte	0x1
-	.2byte	0x22a
-	.4byte	0x115e
-	.uleb128 0x42
-	.4byte	.LASF326
+	.2byte	0x22f
+	.4byte	0x1060
+	.uleb128 0x3f
+	.4byte	.LASF316
 	.byte	0x1
-	.2byte	0x22b
+	.2byte	0x230
 	.4byte	0x122
-	.uleb128 0x42
-	.4byte	.LASF328
+	.uleb128 0x3f
+	.4byte	.LASF318
 	.byte	0x1
-	.2byte	0x22b
-	.4byte	0x14e
-	.uleb128 0x43
-	.4byte	.LASF224
+	.2byte	0x230
+	.4byte	0x153
+	.uleb128 0x40
+	.4byte	.LASF222
 	.byte	0x1
-	.2byte	0x22d
-	.4byte	0x1067
-	.uleb128 0x43
-	.4byte	.LASF329
+	.2byte	0x232
+	.4byte	0xf69
+	.uleb128 0x40
+	.4byte	.LASF319
 	.byte	0x1
-	.2byte	0x22e
+	.2byte	0x233
 	.4byte	0x50
-	.uleb128 0x43
-	.4byte	.LASF259
+	.uleb128 0x40
+	.4byte	.LASF257
 	.byte	0x1
-	.2byte	0x22f
+	.2byte	0x234
 	.4byte	0x50
-	.uleb128 0x44
+	.uleb128 0x41
 	.ascii	"ret\000"
 	.byte	0x1
-	.2byte	0x22f
+	.2byte	0x234
 	.4byte	0x50
-	.uleb128 0x43
-	.4byte	.LASF277
+	.uleb128 0x40
+	.4byte	.LASF320
 	.byte	0x1
-	.2byte	0x230
+	.2byte	0x235
 	.4byte	0x50
-	.uleb128 0x43
-	.4byte	.LASF330
+	.uleb128 0x40
+	.4byte	.LASF321
 	.byte	0x1
-	.2byte	0x231
+	.2byte	0x236
 	.4byte	0x50
-	.uleb128 0x44
+	.uleb128 0x41
 	.ascii	"fit\000"
 	.byte	0x1
-	.2byte	0x232
-	.4byte	0x14e
-	.uleb128 0x45
-	.4byte	.LASF331
-	.4byte	0x195b
-	.4byte	.LASF333
-	.uleb128 0x46
+	.2byte	0x237
+	.4byte	0x153
+	.uleb128 0x42
+	.4byte	.LASF322
+	.4byte	0x198b
+	.4byte	.LASF325
+	.uleb128 0x40
+	.4byte	.LASF323
+	.byte	0x1
+	.2byte	0x24f
+	.4byte	0x50
 	.uleb128 0x43
-	.4byte	.LASF332
+	.uleb128 0x40
+	.4byte	.LASF324
 	.byte	0x1
-	.2byte	0x2be
+	.2byte	0x2c3
 	.4byte	0x12d
 	.byte	0
 	.byte	0
 	.uleb128 0xc
 	.4byte	0xe4
-	.4byte	0x195b
+	.4byte	0x198b
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x1c
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x194b
-	.uleb128 0x41
-	.4byte	.LASF334
+	.4byte	0x197b
+	.uleb128 0x3e
+	.4byte	.LASF326
 	.byte	0x1
-	.2byte	0x1b5
+	.2byte	0x1ba
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x1a25
-	.uleb128 0x42
-	.4byte	.LASF324
+	.4byte	0x1a61
+	.uleb128 0x3f
+	.4byte	.LASF314
 	.byte	0x1
-	.2byte	0x1b5
-	.4byte	0x116a
-	.uleb128 0x42
-	.4byte	.LASF325
+	.2byte	0x1ba
+	.4byte	0x106c
+	.uleb128 0x3f
+	.4byte	.LASF315
 	.byte	0x1
-	.2byte	0x1b6
-	.4byte	0x115e
-	.uleb128 0x43
-	.4byte	.LASF259
+	.2byte	0x1bb
+	.4byte	0x1060
+	.uleb128 0x40
+	.4byte	.LASF257
 	.byte	0x1
-	.2byte	0x1c1
-	.4byte	0x1a25
-	.uleb128 0x43
-	.4byte	.LASF224
+	.2byte	0x1c6
+	.4byte	0x1a61
+	.uleb128 0x40
+	.4byte	.LASF222
 	.byte	0x1
-	.2byte	0x1c2
-	.4byte	0x1067
-	.uleb128 0x43
-	.4byte	.LASF328
+	.2byte	0x1c7
+	.4byte	0xf69
+	.uleb128 0x40
+	.4byte	.LASF318
 	.byte	0x1
-	.2byte	0x1c3
-	.4byte	0x1a35
-	.uleb128 0x43
-	.4byte	.LASF335
+	.2byte	0x1c8
+	.4byte	0x1a71
+	.uleb128 0x40
+	.4byte	.LASF327
 	.byte	0x1
-	.2byte	0x1c4
+	.2byte	0x1c9
 	.4byte	0x50
-	.uleb128 0x43
-	.4byte	.LASF329
+	.uleb128 0x40
+	.4byte	.LASF319
 	.byte	0x1
-	.2byte	0x1c5
+	.2byte	0x1ca
 	.4byte	0x50
-	.uleb128 0x43
-	.4byte	.LASF326
+	.uleb128 0x40
+	.4byte	.LASF316
 	.byte	0x1
-	.2byte	0x1c6
+	.2byte	0x1cb
 	.4byte	0x50
-	.uleb128 0x43
-	.4byte	.LASF330
+	.uleb128 0x40
+	.4byte	.LASF321
 	.byte	0x1
-	.2byte	0x1c7
+	.2byte	0x1cc
 	.4byte	0x50
-	.uleb128 0x44
+	.uleb128 0x41
 	.ascii	"ret\000"
 	.byte	0x1
-	.2byte	0x1c7
+	.2byte	0x1cc
 	.4byte	0x50
-	.uleb128 0x44
+	.uleb128 0x41
 	.ascii	"i\000"
 	.byte	0x1
-	.2byte	0x1c7
+	.2byte	0x1cc
 	.4byte	0x50
-	.uleb128 0x44
+	.uleb128 0x41
 	.ascii	"fit\000"
 	.byte	0x1
-	.2byte	0x1c8
-	.4byte	0x14e
-	.uleb128 0x43
-	.4byte	.LASF336
+	.2byte	0x1cd
+	.4byte	0x153
+	.uleb128 0x40
+	.4byte	.LASF328
 	.byte	0x1
-	.2byte	0x1ce
+	.2byte	0x1d3
 	.4byte	0xd7
-	.uleb128 0x43
-	.4byte	.LASF337
+	.uleb128 0x40
+	.4byte	.LASF329
 	.byte	0x1
-	.2byte	0x1cf
-	.4byte	0x4a7
-	.uleb128 0x45
-	.4byte	.LASF331
-	.4byte	0x1a54
-	.4byte	.LASF334
+	.2byte	0x1d4
+	.4byte	0x4ac
+	.uleb128 0x42
+	.4byte	.LASF322
+	.4byte	0x1a90
+	.4byte	.LASF326
+	.uleb128 0x40
+	.4byte	.LASF323
+	.byte	0x1
+	.2byte	0x1f1
+	.4byte	0x50
 	.byte	0
 	.uleb128 0xc
 	.4byte	0xd7
-	.4byte	0x1a35
+	.4byte	0x1a71
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x2
 	.byte	0
 	.uleb128 0xc
 	.4byte	0xdd
-	.4byte	0x1a44
-	.uleb128 0x47
+	.4byte	0x1a80
+	.uleb128 0x44
 	.4byte	0xcb
 	.byte	0
 	.uleb128 0xc
 	.4byte	0xe4
-	.4byte	0x1a54
+	.4byte	0x1a90
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x13
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x1a44
-	.uleb128 0x2a
-	.4byte	.LASF339
+	.4byte	0x1a80
+	.uleb128 0x45
+	.4byte	.LASF331
 	.byte	0x1
-	.2byte	0x1ae
+	.2byte	0x1b3
 	.4byte	0xd7
-	.4byte	.LFB216
-	.4byte	.LFE216-.LFB216
+	.4byte	.LFB213
+	.4byte	.LFE213-.LFB213
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1a92
-	.uleb128 0x2c
+	.4byte	0x1ace
+	.uleb128 0x2a
 	.ascii	"spl\000"
 	.byte	0x1
-	.2byte	0x1ae
-	.4byte	0x116a
-	.4byte	.LLST58
-	.uleb128 0x48
-	.4byte	.LASF325
+	.2byte	0x1b3
+	.4byte	0x106c
+	.4byte	.LLST59
+	.uleb128 0x46
+	.4byte	.LASF315
 	.byte	0x1
-	.2byte	0x1af
-	.4byte	0x115e
+	.2byte	0x1b4
+	.4byte	0x1060
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF349
+	.uleb128 0x47
+	.4byte	.LASF341
 	.byte	0x1
-	.2byte	0x17c
-	.4byte	0x14e
-	.4byte	.LFB215
-	.4byte	.LFE215-.LFB215
+	.2byte	0x181
+	.4byte	0x153
+	.4byte	.LFB212
+	.4byte	.LFE212-.LFB212
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1b81
-	.uleb128 0x2b
-	.4byte	.LASF325
+	.4byte	0x1bbd
+	.uleb128 0x29
+	.4byte	.LASF315
 	.byte	0x1
-	.2byte	0x17c
-	.4byte	0x115e
+	.2byte	0x181
+	.4byte	0x1060
 	.4byte	.LLST47
-	.uleb128 0x2b
-	.4byte	.LASF326
+	.uleb128 0x29
+	.4byte	.LASF316
 	.byte	0x1
-	.2byte	0x17d
+	.2byte	0x182
 	.4byte	0x122
 	.4byte	.LLST48
-	.uleb128 0x2b
-	.4byte	.LASF328
+	.uleb128 0x29
+	.4byte	.LASF318
 	.byte	0x1
-	.2byte	0x17d
-	.4byte	0x14e
+	.2byte	0x182
+	.4byte	0x153
 	.4byte	.LLST49
-	.uleb128 0x2b
-	.4byte	.LASF329
+	.uleb128 0x29
+	.4byte	.LASF319
 	.byte	0x1
-	.2byte	0x17e
-	.4byte	0x1b81
+	.2byte	0x183
+	.4byte	0x1bbd
 	.4byte	.LLST50
-	.uleb128 0x4a
-	.4byte	.LASF340
+	.uleb128 0x48
+	.4byte	.LASF332
 	.byte	0x1
-	.2byte	0x180
+	.2byte	0x185
 	.4byte	0x50
 	.byte	0x3f
-	.uleb128 0x2d
-	.4byte	.LASF341
+	.uleb128 0x2b
+	.4byte	.LASF333
 	.byte	0x1
-	.2byte	0x181
+	.2byte	0x186
 	.4byte	0x122
 	.4byte	.LLST51
-	.uleb128 0x2d
+	.uleb128 0x2b
 	.4byte	.LASF78
 	.byte	0x1
-	.2byte	0x182
+	.2byte	0x187
 	.4byte	0x122
 	.4byte	.LLST52
-	.uleb128 0x43
-	.4byte	.LASF342
+	.uleb128 0x40
+	.4byte	.LASF334
 	.byte	0x1
-	.2byte	0x183
+	.2byte	0x188
 	.4byte	0x50
-	.uleb128 0x2e
+	.uleb128 0x2c
 	.ascii	"fit\000"
 	.byte	0x1
-	.2byte	0x184
-	.4byte	0x14e
+	.2byte	0x189
+	.4byte	0x153
 	.4byte	.LLST53
-	.uleb128 0x36
-	.4byte	0x223a
+	.uleb128 0x34
+	.4byte	0x2276
 	.4byte	.LBB61
 	.4byte	.LBE61-.LBB61
 	.byte	0x1
-	.2byte	0x1a2
-	.4byte	0x1b65
-	.uleb128 0x31
-	.4byte	0x2260
+	.2byte	0x1a7
+	.4byte	0x1ba1
+	.uleb128 0x2e
+	.4byte	0x229c
 	.4byte	.LLST54
-	.uleb128 0x31
-	.4byte	0x2255
+	.uleb128 0x2e
+	.4byte	0x2291
 	.4byte	.LLST55
-	.uleb128 0x31
-	.4byte	0x224a
+	.uleb128 0x2e
+	.4byte	0x2286
 	.4byte	.LLST56
 	.byte	0
-	.uleb128 0x4b
+	.uleb128 0x49
 	.4byte	.LVL115
 	.uleb128 0x2
 	.byte	0x77
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
@@ -5138,222 +5355,222 @@ __func__.8712:
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0x50
-	.uleb128 0x2a
-	.4byte	.LASF343
+	.uleb128 0x45
+	.4byte	.LASF335
 	.byte	0x1
-	.2byte	0x177
+	.2byte	0x17c
 	.4byte	0x50
-	.4byte	.LFB214
-	.4byte	.LFE214-.LFB214
+	.4byte	.LFB211
+	.4byte	.LFE211-.LFB211
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1bb2
-	.uleb128 0x2b
-	.4byte	.LASF311
+	.4byte	0x1bee
+	.uleb128 0x29
+	.4byte	.LASF300
 	.byte	0x1
-	.2byte	0x177
+	.2byte	0x17c
 	.4byte	0x101
-	.4byte	.LLST57
+	.4byte	.LLST58
 	.byte	0
-	.uleb128 0x41
-	.4byte	.LASF344
+	.uleb128 0x3e
+	.4byte	.LASF336
 	.byte	0x1
-	.2byte	0x16e
+	.2byte	0x173
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x1be7
-	.uleb128 0x4c
+	.4byte	0x1c23
+	.uleb128 0x4a
 	.ascii	"fit\000"
 	.byte	0x1
-	.2byte	0x16e
-	.4byte	0x3a9
-	.uleb128 0x42
-	.4byte	.LASF345
+	.2byte	0x173
+	.4byte	0x3ae
+	.uleb128 0x3f
+	.4byte	.LASF337
 	.byte	0x1
-	.2byte	0x16e
+	.2byte	0x173
 	.4byte	0x50
-	.uleb128 0x4c
+	.uleb128 0x4a
 	.ascii	"os\000"
 	.byte	0x1
-	.2byte	0x16e
-	.4byte	0xd1d
+	.2byte	0x173
+	.4byte	0xd30
 	.byte	0
-	.uleb128 0x41
-	.4byte	.LASF346
+	.uleb128 0x3e
+	.4byte	.LASF338
 	.byte	0x1
-	.2byte	0x157
+	.2byte	0x15c
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x1c59
-	.uleb128 0x4c
+	.4byte	0x1c95
+	.uleb128 0x4a
 	.ascii	"fit\000"
 	.byte	0x1
-	.2byte	0x157
-	.4byte	0x3a9
-	.uleb128 0x42
-	.4byte	.LASF259
+	.2byte	0x15c
+	.4byte	0x3ae
+	.uleb128 0x3f
+	.4byte	.LASF257
 	.byte	0x1
-	.2byte	0x157
+	.2byte	0x15c
 	.4byte	0x50
-	.uleb128 0x42
-	.4byte	.LASF277
+	.uleb128 0x3f
+	.4byte	.LASF320
 	.byte	0x1
-	.2byte	0x157
+	.2byte	0x15c
 	.4byte	0x50
-	.uleb128 0x42
-	.4byte	.LASF347
+	.uleb128 0x3f
+	.4byte	.LASF339
 	.byte	0x1
-	.2byte	0x158
-	.4byte	0x14e
-	.uleb128 0x42
-	.4byte	.LASF348
+	.2byte	0x15d
+	.4byte	0x153
+	.uleb128 0x3f
+	.4byte	.LASF340
 	.byte	0x1
-	.2byte	0x158
-	.4byte	0x116a
-	.uleb128 0x44
+	.2byte	0x15d
+	.4byte	0x106c
+	.uleb128 0x41
 	.ascii	"ret\000"
 	.byte	0x1
-	.2byte	0x15a
+	.2byte	0x15f
 	.4byte	0x50
-	.uleb128 0x43
+	.uleb128 0x40
 	.4byte	.LASF74
 	.byte	0x1
-	.2byte	0x15c
+	.2byte	0x161
 	.4byte	0xfb
-	.uleb128 0x43
-	.4byte	.LASF330
+	.uleb128 0x40
+	.4byte	.LASF321
 	.byte	0x1
-	.2byte	0x15d
+	.2byte	0x162
 	.4byte	0x50
 	.byte	0
-	.uleb128 0x4d
-	.4byte	.LASF350
+	.uleb128 0x4b
+	.4byte	.LASF342
 	.byte	0x1
-	.2byte	0x134
+	.2byte	0x139
 	.4byte	0x50
-	.4byte	.LFB211
-	.4byte	.LFE211-.LFB211
+	.4byte	.LFB208
+	.4byte	.LFE208-.LFB208
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1d76
-	.uleb128 0x2b
-	.4byte	.LASF324
+	.4byte	0x1db2
+	.uleb128 0x29
+	.4byte	.LASF314
 	.byte	0x1
-	.2byte	0x134
-	.4byte	0x116a
+	.2byte	0x139
+	.4byte	0x106c
 	.4byte	.LLST39
-	.uleb128 0x2b
-	.4byte	.LASF325
+	.uleb128 0x29
+	.4byte	.LASF315
 	.byte	0x1
-	.2byte	0x135
-	.4byte	0x115e
+	.2byte	0x13a
+	.4byte	0x1060
 	.4byte	.LLST40
-	.uleb128 0x2b
-	.4byte	.LASF326
+	.uleb128 0x29
+	.4byte	.LASF316
 	.byte	0x1
-	.2byte	0x135
+	.2byte	0x13a
 	.4byte	0x122
 	.4byte	.LLST41
-	.uleb128 0x2c
+	.uleb128 0x2a
 	.ascii	"fit\000"
 	.byte	0x1
-	.2byte	0x136
-	.4byte	0x14e
+	.2byte	0x13b
+	.4byte	0x153
 	.4byte	.LLST42
-	.uleb128 0x2b
-	.4byte	.LASF259
+	.uleb128 0x29
+	.4byte	.LASF257
 	.byte	0x1
-	.2byte	0x136
+	.2byte	0x13b
 	.4byte	0x50
 	.4byte	.LLST43
-	.uleb128 0x2b
-	.4byte	.LASF329
+	.uleb128 0x29
+	.4byte	.LASF319
 	.byte	0x1
-	.2byte	0x136
+	.2byte	0x13b
 	.4byte	0x122
 	.4byte	.LLST44
-	.uleb128 0x4e
-	.4byte	.LASF224
+	.uleb128 0x4c
+	.4byte	.LASF222
 	.byte	0x1
-	.2byte	0x138
-	.4byte	0x1067
+	.2byte	0x13d
+	.4byte	0xf69
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -68
-	.uleb128 0x2d
-	.4byte	.LASF330
+	.uleb128 0x2b
+	.4byte	.LASF321
 	.byte	0x1
-	.2byte	0x139
+	.2byte	0x13e
 	.4byte	0x50
 	.4byte	.LLST45
-	.uleb128 0x2e
+	.uleb128 0x2c
 	.ascii	"ret\000"
 	.byte	0x1
-	.2byte	0x139
+	.2byte	0x13e
 	.4byte	0x50
 	.4byte	.LLST46
-	.uleb128 0x4f
-	.4byte	.LASF331
-	.4byte	0x1d86
-	.uleb128 0x3c
+	.uleb128 0x4d
+	.4byte	.LASF322
+	.4byte	0x1dc2
+	.uleb128 0x39
 	.4byte	.LVL99
-	.4byte	0x22ba
-	.4byte	0x1d35
-	.uleb128 0x38
+	.4byte	0x22f6
+	.4byte	0x1d71
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 0
 	.byte	0x6
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	.LC0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x1
 	.byte	0x30
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x39
 	.4byte	.LVL101
-	.4byte	0x1d8b
-	.4byte	0x1d64
-	.uleb128 0x38
+	.4byte	0x1dc7
+	.4byte	0x1da0
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x76
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x77
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 4
 	.byte	0x6
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x2
 	.byte	0x7d
 	.sleb128 4
@@ -5361,10 +5578,10 @@ __func__.8712:
 	.byte	0x91
 	.sleb128 -68
 	.byte	0
-	.uleb128 0x37
+	.uleb128 0x35
 	.4byte	.LVL103
-	.4byte	0x2645
-	.uleb128 0x38
+	.4byte	0x26b8
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x3
@@ -5374,464 +5591,464 @@ __func__.8712:
 	.byte	0
 	.uleb128 0xc
 	.4byte	0xe4
-	.4byte	0x1d86
+	.4byte	0x1dc2
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x12
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x1d76
-	.uleb128 0x50
-	.4byte	.LASF351
+	.4byte	0x1db2
+	.uleb128 0x4e
+	.4byte	.LASF343
 	.byte	0x1
-	.byte	0xa3
+	.byte	0xa8
 	.4byte	0x50
-	.4byte	.LFB210
-	.4byte	.LFE210-.LFB210
+	.4byte	.LFB207
+	.4byte	.LFE207-.LFB207
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x223a
-	.uleb128 0x51
-	.4byte	.LASF325
+	.4byte	0x2276
+	.uleb128 0x4f
+	.4byte	.LASF315
 	.byte	0x1
-	.byte	0xa3
-	.4byte	0x115e
+	.byte	0xa8
+	.4byte	0x1060
 	.4byte	.LLST15
-	.uleb128 0x51
-	.4byte	.LASF326
+	.uleb128 0x4f
+	.4byte	.LASF316
 	.byte	0x1
-	.byte	0xa3
+	.byte	0xa8
 	.4byte	0x122
 	.4byte	.LLST16
-	.uleb128 0x52
+	.uleb128 0x50
 	.ascii	"fit\000"
 	.byte	0x1
-	.byte	0xa4
-	.4byte	0x14e
+	.byte	0xa9
+	.4byte	0x153
 	.4byte	.LLST17
-	.uleb128 0x51
-	.4byte	.LASF329
+	.uleb128 0x4f
+	.4byte	.LASF319
 	.byte	0x1
-	.byte	0xa4
+	.byte	0xa9
 	.4byte	0x122
 	.4byte	.LLST18
-	.uleb128 0x51
-	.4byte	.LASF330
+	.uleb128 0x4f
+	.4byte	.LASF321
 	.byte	0x1
-	.byte	0xa4
+	.byte	0xa9
 	.4byte	0x50
 	.4byte	.LLST19
-	.uleb128 0x51
-	.4byte	.LASF224
+	.uleb128 0x4f
+	.4byte	.LASF222
 	.byte	0x1
-	.byte	0xa5
-	.4byte	0x116a
+	.byte	0xaa
+	.4byte	0x106c
 	.4byte	.LLST20
-	.uleb128 0x53
-	.4byte	.LASF352
+	.uleb128 0x51
+	.4byte	.LASF344
 	.byte	0x1
-	.byte	0xa7
+	.byte	0xac
 	.4byte	0x50
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -60
-	.uleb128 0x53
-	.4byte	.LASF353
+	.uleb128 0x51
+	.4byte	.LASF345
 	.byte	0x1
-	.byte	0xa8
+	.byte	0xad
 	.4byte	0x10c
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -56
-	.uleb128 0x54
+	.uleb128 0x52
 	.ascii	"len\000"
 	.byte	0x1
-	.byte	0xa9
+	.byte	0xae
 	.4byte	0x50
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -52
-	.uleb128 0x55
+	.uleb128 0x53
 	.4byte	.LASF78
 	.byte	0x1
-	.byte	0xaa
+	.byte	0xaf
 	.4byte	0x122
-	.uleb128 0x53
-	.4byte	.LASF354
+	.uleb128 0x51
+	.4byte	.LASF346
 	.byte	0x1
-	.byte	0xab
+	.byte	0xb0
 	.4byte	0x122
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -48
-	.uleb128 0x53
+	.uleb128 0x51
 	.4byte	.LASF263
 	.byte	0x1
-	.byte	0xab
+	.byte	0xb0
 	.4byte	0x122
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -44
-	.uleb128 0x56
-	.4byte	.LASF355
+	.uleb128 0x54
+	.4byte	.LASF347
 	.byte	0x1
-	.byte	0xab
+	.byte	0xb0
 	.4byte	0x122
 	.4byte	.LLST21
-	.uleb128 0x54
+	.uleb128 0x52
 	.ascii	"src\000"
 	.byte	0x1
-	.byte	0xac
-	.4byte	0x14e
+	.byte	0xb1
+	.4byte	0x153
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -40
-	.uleb128 0x56
-	.4byte	.LASF356
+	.uleb128 0x54
+	.4byte	.LASF348
 	.byte	0x1
-	.byte	0xad
+	.byte	0xb2
 	.4byte	0x122
 	.4byte	.LLST22
-	.uleb128 0x55
-	.4byte	.LASF357
+	.uleb128 0x53
+	.4byte	.LASF349
 	.byte	0x1
-	.byte	0xae
+	.byte	0xb3
 	.4byte	0x50
-	.uleb128 0x57
-	.4byte	.LASF340
+	.uleb128 0x55
+	.4byte	.LASF332
 	.byte	0x1
-	.byte	0xaf
+	.byte	0xb4
 	.4byte	0x50
 	.byte	0x3f
-	.uleb128 0x53
-	.4byte	.LASF358
+	.uleb128 0x51
+	.4byte	.LASF350
 	.byte	0x1
-	.byte	0xb0
+	.byte	0xb5
 	.4byte	0x12d
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -61
-	.uleb128 0x56
+	.uleb128 0x54
 	.4byte	.LASF62
 	.byte	0x1
-	.byte	0xb0
+	.byte	0xb5
 	.4byte	0x12d
 	.4byte	.LLST23
-	.uleb128 0x53
-	.4byte	.LASF359
+	.uleb128 0x51
+	.4byte	.LASF351
 	.byte	0x1
-	.byte	0xb1
-	.4byte	0x3a9
+	.byte	0xb6
+	.4byte	0x3ae
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -36
-	.uleb128 0x56
-	.4byte	.LASF360
+	.uleb128 0x54
+	.4byte	.LASF352
 	.byte	0x1
-	.byte	0xb2
-	.4byte	0x189
+	.byte	0xb7
+	.4byte	0x18e
 	.4byte	.LLST24
-	.uleb128 0x56
-	.4byte	.LASF361
+	.uleb128 0x54
+	.4byte	.LASF353
 	.byte	0x1
-	.byte	0xb3
-	.4byte	0x189
+	.byte	0xb8
+	.4byte	0x18e
 	.4byte	.LLST25
-	.uleb128 0x56
-	.4byte	.LASF362
+	.uleb128 0x54
+	.4byte	.LASF354
 	.byte	0x1
-	.byte	0xb4
-	.4byte	0x4cd
+	.byte	0xb9
+	.4byte	0x4d2
 	.4byte	.LLST26
-	.uleb128 0x58
+	.uleb128 0x56
 	.ascii	"out\000"
 	.byte	0x1
-	.2byte	0x12a
+	.2byte	0x12f
 	.4byte	.L31
-	.uleb128 0x59
-	.4byte	0x226c
+	.uleb128 0x57
+	.4byte	0x22a8
 	.4byte	.LBB35
 	.4byte	.Ldebug_ranges0+0
 	.byte	0x1
-	.byte	0xe3
-	.4byte	0x1f1c
-	.uleb128 0x31
-	.4byte	0x2287
+	.byte	0xe8
+	.4byte	0x1f58
+	.uleb128 0x2e
+	.4byte	0x22c3
 	.4byte	.LLST27
-	.uleb128 0x31
-	.4byte	0x227c
+	.uleb128 0x2e
+	.4byte	0x22b8
 	.4byte	.LLST28
 	.byte	0
-	.uleb128 0x5a
-	.4byte	0x223a
+	.uleb128 0x58
+	.4byte	0x2276
 	.4byte	.LBB40
 	.4byte	.LBE40-.LBB40
 	.byte	0x1
-	.byte	0xe4
-	.4byte	0x1f47
-	.uleb128 0x3a
-	.4byte	0x2260
-	.uleb128 0x31
-	.4byte	0x2255
+	.byte	0xe9
+	.4byte	0x1f83
+	.uleb128 0x2f
+	.4byte	0x229c
+	.uleb128 0x2e
+	.4byte	0x2291
 	.4byte	.LLST29
-	.uleb128 0x31
-	.4byte	0x224a
+	.uleb128 0x2e
+	.4byte	0x2286
 	.4byte	.LLST30
 	.byte	0
-	.uleb128 0x59
-	.4byte	0x2293
+	.uleb128 0x57
+	.4byte	0x22cf
 	.4byte	.LBB42
 	.4byte	.Ldebug_ranges0+0x20
 	.byte	0x1
-	.byte	0xed
-	.4byte	0x1f6d
-	.uleb128 0x31
-	.4byte	0x22ae
+	.byte	0xf2
+	.4byte	0x1fa9
+	.uleb128 0x2e
+	.4byte	0x22ea
 	.4byte	.LLST31
-	.uleb128 0x31
-	.4byte	0x22a3
+	.uleb128 0x2e
+	.4byte	0x22df
 	.4byte	.LLST32
 	.byte	0
-	.uleb128 0x30
-	.4byte	0x2410
+	.uleb128 0x2d
+	.4byte	0x2482
 	.4byte	.LBB47
 	.4byte	.Ldebug_ranges0+0x38
 	.byte	0x1
-	.2byte	0x106
-	.4byte	0x1fb8
-	.uleb128 0x31
-	.4byte	0x2439
+	.2byte	0x10b
+	.4byte	0x1ff4
+	.uleb128 0x2e
+	.4byte	0x24ab
 	.4byte	.LLST33
-	.uleb128 0x31
-	.4byte	0x242d
+	.uleb128 0x2e
+	.4byte	0x249f
 	.4byte	.LLST34
-	.uleb128 0x31
-	.4byte	0x2421
+	.uleb128 0x2e
+	.4byte	0x2493
 	.4byte	.LLST35
-	.uleb128 0x37
+	.uleb128 0x35
 	.4byte	.LVL77
-	.4byte	0x2650
-	.uleb128 0x38
+	.4byte	0x26c3
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x1
 	.byte	0x30
 	.byte	0
 	.byte	0
-	.uleb128 0x36
-	.4byte	0x2410
+	.uleb128 0x34
+	.4byte	0x2482
 	.4byte	.LBB53
 	.4byte	.LBE53-.LBB53
 	.byte	0x1
-	.2byte	0x10b
-	.4byte	0x1ff1
-	.uleb128 0x31
-	.4byte	0x2439
+	.2byte	0x110
+	.4byte	0x202d
+	.uleb128 0x2e
+	.4byte	0x24ab
 	.4byte	.LLST36
-	.uleb128 0x31
-	.4byte	0x242d
+	.uleb128 0x2e
+	.4byte	0x249f
 	.4byte	.LLST37
-	.uleb128 0x31
-	.4byte	0x2421
+	.uleb128 0x2e
+	.4byte	0x2493
 	.4byte	.LLST38
-	.uleb128 0x3d
+	.uleb128 0x3a
 	.4byte	.LVL86
-	.4byte	0x2650
+	.4byte	0x26c3
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x39
 	.4byte	.LVL45
-	.4byte	0x265c
-	.4byte	0x2011
-	.uleb128 0x38
+	.4byte	0x26cf
+	.4byte	0x204d
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -61
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x39
 	.4byte	.LVL46
-	.4byte	0x2668
-	.4byte	0x2031
-	.uleb128 0x38
+	.4byte	0x26db
+	.4byte	0x206d
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -44
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x39
 	.4byte	.LVL47
-	.4byte	0x2674
-	.4byte	0x2051
-	.uleb128 0x38
+	.4byte	0x26e7
+	.4byte	0x208d
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -48
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x39
 	.4byte	.LVL48
-	.4byte	0x2680
-	.4byte	0x2071
-	.uleb128 0x38
+	.4byte	0x26f3
+	.4byte	0x20ad
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -60
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x39
 	.4byte	.LVL49
-	.4byte	0x268c
-	.4byte	0x2091
-	.uleb128 0x38
+	.4byte	0x26ff
+	.4byte	0x20cd
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -60
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x39
 	.4byte	.LVL52
-	.4byte	0x2698
-	.4byte	0x20b1
-	.uleb128 0x38
+	.4byte	0x270b
+	.4byte	0x20ed
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -52
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x39
 	.4byte	.LVL54
-	.4byte	0x26a4
-	.4byte	0x20c5
-	.uleb128 0x38
+	.4byte	0x2717
+	.4byte	0x2101
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x40
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x39
 	.4byte	.LVL61
-	.4byte	0x26b0
-	.4byte	0x20df
-	.uleb128 0x38
+	.4byte	0x2723
+	.4byte	0x211b
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
 	.byte	0
-	.uleb128 0x5b
+	.uleb128 0x59
 	.4byte	.LVL64
-	.4byte	0x20fd
-	.uleb128 0x38
+	.4byte	0x2139
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x7a
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x78
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x4
@@ -5839,137 +6056,137 @@ __func__.8712:
 	.sleb128 -80
 	.byte	0x6
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x39
 	.4byte	.LVL65
-	.4byte	0x2619
-	.4byte	0x2114
-	.uleb128 0x38
+	.4byte	0x2697
+	.4byte	0x2150
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	.LC7
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x39
 	.4byte	.LVL66
-	.4byte	0x26bc
-	.4byte	0x2137
-	.uleb128 0x38
+	.4byte	0x272f
+	.4byte	0x2173
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	.LC13
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x39
 	.4byte	.LVL79
-	.4byte	0x25ea
-	.4byte	0x215f
-	.uleb128 0x38
+	.4byte	0x265c
+	.4byte	0x219b
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	.LC9
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x1
 	.byte	0x30
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x39
 	.4byte	.LVL80
-	.4byte	0x2619
-	.4byte	0x2182
-	.uleb128 0x38
+	.4byte	0x2697
+	.4byte	0x21be
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	.LC10
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x77
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x78
 	.sleb128 0
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x39
 	.4byte	.LVL81
-	.4byte	0x26c8
-	.4byte	0x219c
-	.uleb128 0x38
+	.4byte	0x273b
+	.4byte	0x21d8
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x39
 	.4byte	.LVL82
-	.4byte	0x26d4
-	.4byte	0x21c9
-	.uleb128 0x38
+	.4byte	0x2747
+	.4byte	0x2205
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -44
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -40
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x2
 	.byte	0x7d
 	.sleb128 0
@@ -5977,64 +6194,64 @@ __func__.8712:
 	.byte	0x91
 	.sleb128 -56
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x39
 	.4byte	.LVL83
-	.4byte	0x26e0
-	.4byte	0x21e0
-	.uleb128 0x38
+	.4byte	0x2753
+	.4byte	0x221c
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	.LC12
 	.byte	0
-	.uleb128 0x3d
+	.uleb128 0x3a
 	.4byte	.LVL84
-	.4byte	0x26eb
-	.uleb128 0x3c
+	.4byte	0x275e
+	.uleb128 0x39
 	.4byte	.LVL87
-	.4byte	0x2619
-	.4byte	0x2200
-	.uleb128 0x38
+	.4byte	0x2697
+	.4byte	0x223c
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	.LC11
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x39
 	.4byte	.LVL91
-	.4byte	0x26f7
-	.4byte	0x2226
-	.uleb128 0x38
+	.4byte	0x276a
+	.4byte	0x2262
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -36
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -56
 	.byte	0
-	.uleb128 0x37
+	.uleb128 0x35
 	.4byte	.LVL92
-	.4byte	0x26e0
-	.uleb128 0x38
+	.4byte	0x2753
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
@@ -6042,165 +6259,165 @@ __func__.8712:
 	.4byte	.LC8
 	.byte	0
 	.byte	0
-	.uleb128 0x5c
-	.4byte	.LASF363
+	.uleb128 0x5a
+	.4byte	.LASF355
 	.byte	0x1
-	.byte	0x87
+	.byte	0x8c
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x226c
-	.uleb128 0x5d
-	.4byte	.LASF325
+	.4byte	0x22a8
+	.uleb128 0x5b
+	.4byte	.LASF315
 	.byte	0x1
-	.byte	0x87
-	.4byte	0x115e
-	.uleb128 0x5d
-	.4byte	.LASF364
+	.byte	0x8c
+	.4byte	0x1060
+	.uleb128 0x5b
+	.4byte	.LASF356
 	.byte	0x1
-	.byte	0x87
+	.byte	0x8c
 	.4byte	0x50
-	.uleb128 0x5d
-	.4byte	.LASF352
+	.uleb128 0x5b
+	.4byte	.LASF344
 	.byte	0x1
-	.byte	0x88
+	.byte	0x8d
 	.4byte	0x50
 	.byte	0
-	.uleb128 0x5c
-	.4byte	.LASF365
+	.uleb128 0x5a
+	.4byte	.LASF357
 	.byte	0x1
-	.byte	0x79
+	.byte	0x7e
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x2293
-	.uleb128 0x5d
-	.4byte	.LASF325
+	.4byte	0x22cf
+	.uleb128 0x5b
+	.4byte	.LASF315
 	.byte	0x1
-	.byte	0x79
-	.4byte	0x115e
-	.uleb128 0x5d
-	.4byte	.LASF352
+	.byte	0x7e
+	.4byte	0x1060
+	.uleb128 0x5b
+	.4byte	.LASF344
 	.byte	0x1
-	.byte	0x79
+	.byte	0x7e
 	.4byte	0x50
 	.byte	0
-	.uleb128 0x5c
-	.4byte	.LASF366
+	.uleb128 0x5a
+	.4byte	.LASF358
 	.byte	0x1
-	.byte	0x6c
+	.byte	0x71
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x22ba
-	.uleb128 0x5d
-	.4byte	.LASF325
+	.4byte	0x22f6
+	.uleb128 0x5b
+	.4byte	.LASF315
 	.byte	0x1
-	.byte	0x6c
-	.4byte	0x115e
-	.uleb128 0x5d
-	.4byte	.LASF352
+	.byte	0x71
+	.4byte	0x1060
+	.uleb128 0x5b
+	.4byte	.LASF344
 	.byte	0x1
-	.byte	0x6c
+	.byte	0x71
 	.4byte	0x50
 	.byte	0
-	.uleb128 0x5e
-	.4byte	.LASF367
+	.uleb128 0x5c
+	.4byte	.LASF359
 	.byte	0x1
-	.byte	0x56
+	.byte	0x5b
 	.4byte	0x50
-	.4byte	.LFB206
-	.4byte	.LFE206-.LFB206
+	.4byte	.LFB203
+	.4byte	.LFE203-.LFB203
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2382
-	.uleb128 0x52
+	.4byte	0x23be
+	.uleb128 0x50
 	.ascii	"fit\000"
 	.byte	0x1
-	.byte	0x56
-	.4byte	0x3a9
+	.byte	0x5b
+	.4byte	0x3ae
 	.4byte	.LLST9
-	.uleb128 0x51
-	.4byte	.LASF259
+	.uleb128 0x4f
+	.4byte	.LASF257
 	.byte	0x1
-	.byte	0x56
+	.byte	0x5b
 	.4byte	0x50
 	.4byte	.LLST10
-	.uleb128 0x51
+	.uleb128 0x4f
 	.4byte	.LASF62
 	.byte	0x1
-	.byte	0x57
+	.byte	0x5c
 	.4byte	0xd7
 	.4byte	.LLST11
-	.uleb128 0x51
-	.4byte	.LASF277
+	.uleb128 0x4f
+	.4byte	.LASF320
 	.byte	0x1
-	.byte	0x57
+	.byte	0x5c
 	.4byte	0x50
 	.4byte	.LLST12
-	.uleb128 0x54
+	.uleb128 0x52
 	.ascii	"str\000"
 	.byte	0x1
-	.byte	0x59
+	.byte	0x5e
 	.4byte	0xfb
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -20
-	.uleb128 0x5f
+	.uleb128 0x5d
 	.ascii	"err\000"
 	.byte	0x1
-	.byte	0x5a
+	.byte	0x5f
 	.4byte	0x50
 	.4byte	.LLST13
-	.uleb128 0x56
-	.4byte	.LASF330
+	.uleb128 0x54
+	.4byte	.LASF321
 	.byte	0x1
-	.byte	0x5b
+	.byte	0x60
 	.4byte	0x50
 	.4byte	.LLST14
-	.uleb128 0x3c
+	.uleb128 0x39
 	.4byte	.LVL34
-	.4byte	0x2484
-	.4byte	0x236b
-	.uleb128 0x38
+	.4byte	0x24f6
+	.4byte	0x23a7
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x3
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x52
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x53
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -20
-	.uleb128 0x60
-	.4byte	0x239d
+	.uleb128 0x5e
+	.4byte	0x23d9
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
 	.byte	0
-	.uleb128 0x37
+	.uleb128 0x35
 	.4byte	.LVL36
-	.4byte	0x2703
-	.uleb128 0x38
+	.4byte	0x2776
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
@@ -6208,298 +6425,322 @@ __func__.8712:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x5c
-	.4byte	.LASF368
+	.uleb128 0x5a
+	.4byte	.LASF360
 	.byte	0x1
-	.byte	0x20
+	.byte	0x25
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x240a
-	.uleb128 0x61
+	.4byte	0x2446
+	.uleb128 0x5f
 	.ascii	"fit\000"
 	.byte	0x1
-	.byte	0x20
-	.4byte	0x3a9
-	.uleb128 0x5d
-	.4byte	.LASF259
+	.byte	0x25
+	.4byte	0x3ae
+	.uleb128 0x5b
+	.4byte	.LASF257
 	.byte	0x1
-	.byte	0x20
+	.byte	0x25
 	.4byte	0x50
-	.uleb128 0x5d
+	.uleb128 0x5b
 	.4byte	.LASF62
 	.byte	0x1
-	.byte	0x21
+	.byte	0x26
 	.4byte	0xd7
-	.uleb128 0x5d
-	.4byte	.LASF277
+	.uleb128 0x5b
+	.4byte	.LASF320
 	.byte	0x1
-	.byte	0x21
+	.byte	0x26
 	.4byte	0x50
-	.uleb128 0x5d
-	.4byte	.LASF369
+	.uleb128 0x5b
+	.4byte	.LASF361
 	.byte	0x1
-	.byte	0x22
-	.4byte	0x240a
-	.uleb128 0x55
+	.byte	0x27
+	.4byte	0x2446
+	.uleb128 0x53
 	.4byte	.LASF74
 	.byte	0x1
-	.byte	0x24
+	.byte	0x29
 	.4byte	0xd7
-	.uleb128 0x62
+	.uleb128 0x60
 	.ascii	"str\000"
 	.byte	0x1
-	.byte	0x24
+	.byte	0x29
 	.4byte	0xd7
-	.uleb128 0x55
-	.4byte	.LASF330
+	.uleb128 0x53
+	.4byte	.LASF321
 	.byte	0x1
-	.byte	0x25
+	.byte	0x2a
 	.4byte	0x50
-	.uleb128 0x55
-	.4byte	.LASF370
+	.uleb128 0x53
+	.4byte	.LASF362
 	.byte	0x1
-	.byte	0x26
+	.byte	0x2b
 	.4byte	0x50
-	.uleb128 0x62
+	.uleb128 0x60
 	.ascii	"len\000"
 	.byte	0x1
-	.byte	0x27
+	.byte	0x2c
 	.4byte	0x50
-	.uleb128 0x62
+	.uleb128 0x60
 	.ascii	"i\000"
 	.byte	0x1
-	.byte	0x27
+	.byte	0x2c
 	.4byte	0x50
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0xfb
-	.uleb128 0x41
-	.4byte	.LASF371
+	.uleb128 0x61
+	.4byte	.LASF363
+	.byte	0x1
+	.byte	0x14
+	.4byte	0x50
+	.4byte	.LFB201
+	.4byte	.LFE201-.LFB201
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2482
+	.uleb128 0x50
+	.ascii	"fit\000"
+	.byte	0x1
+	.byte	0x14
+	.4byte	0x3ae
+	.4byte	.LLST57
+	.uleb128 0x62
+	.4byte	.LASF323
+	.byte	0x1
+	.byte	0x14
+	.4byte	0x50
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0
+	.uleb128 0x3e
+	.4byte	.LASF364
 	.byte	0x2
 	.2byte	0x3ea
 	.4byte	0xd7
 	.byte	0x3
-	.4byte	0x2446
-	.uleb128 0x42
-	.4byte	.LASF372
+	.4byte	0x24b8
+	.uleb128 0x3f
+	.4byte	.LASF365
 	.byte	0x2
 	.2byte	0x3ea
-	.4byte	0x3a9
-	.uleb128 0x42
-	.4byte	.LASF345
+	.4byte	0x3ae
+	.uleb128 0x3f
+	.4byte	.LASF337
 	.byte	0x2
 	.2byte	0x3eb
 	.4byte	0x50
-	.uleb128 0x4c
+	.uleb128 0x4a
 	.ascii	"len\000"
 	.byte	0x2
 	.2byte	0x3eb
-	.4byte	0x1b81
+	.4byte	0x1bbd
 	.byte	0
-	.uleb128 0x41
-	.4byte	.LASF373
+	.uleb128 0x3e
+	.4byte	.LASF366
 	.byte	0x2
 	.2byte	0x2e0
-	.4byte	0x138
+	.4byte	0x13d
 	.byte	0x3
-	.4byte	0x2464
-	.uleb128 0x4c
+	.4byte	0x24d6
+	.uleb128 0x4a
 	.ascii	"hdr\000"
 	.byte	0x2
 	.2byte	0x2e0
-	.4byte	0x2464
+	.4byte	0x24d6
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0xad3
-	.uleb128 0x5c
-	.4byte	.LASF374
-	.byte	0x18
+	.4byte	0xac0
+	.uleb128 0x5a
+	.4byte	.LASF367
+	.byte	0x1a
 	.byte	0x70
 	.4byte	0x70
 	.byte	0x3
-	.4byte	0x2484
-	.uleb128 0x61
+	.4byte	0x24f6
+	.uleb128 0x5f
 	.ascii	"x\000"
-	.byte	0x18
+	.byte	0x1a
 	.byte	0x70
 	.4byte	0x70
 	.byte	0
 	.uleb128 0x63
-	.4byte	0x2382
-	.4byte	.LFB220
-	.4byte	.LFE220-.LFB220
+	.4byte	0x23be
+	.4byte	.LFB217
+	.4byte	.LFE217-.LFB217
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x25cb
-	.uleb128 0x31
-	.4byte	0x2392
+	.4byte	0x263d
+	.uleb128 0x2e
+	.4byte	0x23ce
 	.4byte	.LLST0
-	.uleb128 0x31
-	.4byte	0x23a8
+	.uleb128 0x2e
+	.4byte	0x23e4
 	.4byte	.LLST1
-	.uleb128 0x31
-	.4byte	0x23b3
+	.uleb128 0x2e
+	.4byte	0x23ef
 	.4byte	.LLST2
-	.uleb128 0x31
-	.4byte	0x23be
+	.uleb128 0x2e
+	.4byte	0x23fa
 	.4byte	.LLST3
 	.uleb128 0x64
-	.4byte	0x239d
+	.4byte	0x23d9
 	.uleb128 0x6
 	.byte	0xfa
-	.4byte	0x239d
+	.4byte	0x23d9
 	.byte	0x9f
-	.uleb128 0x34
-	.4byte	0x23c9
+	.uleb128 0x32
+	.4byte	0x2405
 	.4byte	.LLST4
-	.uleb128 0x34
-	.4byte	0x23d4
+	.uleb128 0x32
+	.4byte	0x2410
 	.4byte	.LLST5
-	.uleb128 0x34
-	.4byte	0x23df
+	.uleb128 0x32
+	.4byte	0x241b
 	.4byte	.LLST6
-	.uleb128 0x34
-	.4byte	0x23ea
+	.uleb128 0x32
+	.4byte	0x2426
 	.4byte	.LLST7
-	.uleb128 0x33
-	.4byte	0x23f5
+	.uleb128 0x31
+	.4byte	0x2431
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -28
-	.uleb128 0x34
-	.4byte	0x2400
+	.uleb128 0x32
+	.4byte	0x243c
 	.4byte	.LLST8
-	.uleb128 0x3c
+	.uleb128 0x39
 	.4byte	.LVL1
-	.4byte	0x270f
-	.4byte	0x2510
-	.uleb128 0x38
+	.4byte	0x2782
+	.4byte	0x2582
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x39
 	.4byte	.LVL5
-	.4byte	0x2619
-	.4byte	0x2527
-	.uleb128 0x38
+	.4byte	0x2697
+	.4byte	0x2599
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	.LC4
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x39
 	.4byte	.LVL6
-	.4byte	0x271b
-	.4byte	0x2541
-	.uleb128 0x38
+	.4byte	0x278e
+	.4byte	0x25b3
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x39
 	.4byte	.LVL11
-	.4byte	0x25ea
-	.4byte	0x2567
-	.uleb128 0x38
+	.4byte	0x265c
+	.4byte	0x25d9
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x76
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x77
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -28
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x39
 	.4byte	.LVL13
-	.4byte	0x2619
-	.4byte	0x257b
-	.uleb128 0x38
+	.4byte	0x2697
+	.4byte	0x25ed
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x78
 	.sleb128 0
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x39
 	.4byte	.LVL14
-	.4byte	0x2726
-	.4byte	0x2595
-	.uleb128 0x38
+	.4byte	0x2799
+	.4byte	0x2607
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x76
 	.sleb128 0
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x39
 	.4byte	.LVL18
-	.4byte	0x25ea
-	.4byte	0x25bb
-	.uleb128 0x38
+	.4byte	0x265c
+	.4byte	0x262d
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x78
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -28
 	.byte	0
-	.uleb128 0x37
+	.uleb128 0x35
 	.4byte	.LVL23
-	.4byte	0x2731
-	.uleb128 0x38
+	.4byte	0x27a4
+	.uleb128 0x36
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x1
@@ -6508,159 +6749,159 @@ __func__.8712:
 	.byte	0
 	.uleb128 0xc
 	.4byte	0xdd
-	.4byte	0x25de
+	.4byte	0x2650
 	.uleb128 0x65
 	.4byte	0xcb
-	.4byte	0x187d
+	.4byte	0x1865
 	.byte	0
 	.uleb128 0x66
-	.4byte	.LASF375
-	.4byte	.LASF375
+	.4byte	.LASF368
+	.4byte	.LASF368
 	.byte	0x2
 	.2byte	0x3f5
 	.uleb128 0x66
-	.4byte	.LASF376
-	.4byte	.LASF376
-	.byte	0x19
+	.4byte	.LASF369
+	.4byte	.LASF369
+	.byte	0x1b
 	.2byte	0x2b2
 	.uleb128 0x67
-	.4byte	.LASF377
-	.4byte	.LASF377
-	.byte	0x1a
+	.4byte	.LASF370
+	.4byte	.LASF370
+	.byte	0x1c
 	.byte	0x98
 	.uleb128 0x66
-	.4byte	.LASF378
-	.4byte	.LASF378
-	.byte	0x19
+	.4byte	.LASF371
+	.4byte	.LASF371
+	.byte	0x1b
 	.2byte	0x1a8
 	.uleb128 0x66
-	.4byte	.LASF379
-	.4byte	.LASF379
+	.4byte	.LASF372
+	.4byte	.LASF372
 	.byte	0x2
 	.2byte	0x42e
+	.uleb128 0x66
+	.4byte	.LASF373
+	.4byte	.LASF373
+	.byte	0x2
+	.2byte	0x437
 	.uleb128 0x67
-	.4byte	.LASF380
-	.4byte	.LASF380
-	.byte	0x1b
+	.4byte	.LASF374
+	.4byte	.LASF374
+	.byte	0x1d
 	.byte	0x13
 	.uleb128 0x67
-	.4byte	.LASF381
-	.4byte	.LASF381
-	.byte	0x3
-	.byte	0x61
-	.uleb128 0x67
-	.4byte	.LASF382
-	.4byte	.LASF382
+	.4byte	.LASF375
+	.4byte	.LASF375
 	.byte	0xc
 	.byte	0xbd
 	.uleb128 0x67
-	.4byte	.LASF383
-	.4byte	.LASF383
+	.4byte	.LASF376
+	.4byte	.LASF376
 	.byte	0x8
 	.byte	0x27
 	.uleb128 0x67
-	.4byte	.LASF384
-	.4byte	.LASF384
-	.byte	0x1a
+	.4byte	.LASF377
+	.4byte	.LASF377
+	.byte	0x1c
 	.byte	0xce
 	.uleb128 0x66
-	.4byte	.LASF385
-	.4byte	.LASF385
-	.byte	0x19
+	.4byte	.LASF378
+	.4byte	.LASF378
+	.byte	0x1b
 	.2byte	0x1c1
 	.uleb128 0x66
-	.4byte	.LASF386
-	.4byte	.LASF386
+	.4byte	.LASF379
+	.4byte	.LASF379
 	.byte	0x2
 	.2byte	0x3f8
 	.uleb128 0x66
-	.4byte	.LASF387
-	.4byte	.LASF387
+	.4byte	.LASF380
+	.4byte	.LASF380
 	.byte	0x2
 	.2byte	0x3fa
 	.uleb128 0x66
-	.4byte	.LASF388
-	.4byte	.LASF388
+	.4byte	.LASF381
+	.4byte	.LASF381
 	.byte	0x2
 	.2byte	0x3fc
 	.uleb128 0x66
-	.4byte	.LASF389
-	.4byte	.LASF389
+	.4byte	.LASF382
+	.4byte	.LASF382
 	.byte	0x2
 	.2byte	0x402
 	.uleb128 0x66
-	.4byte	.LASF390
-	.4byte	.LASF390
+	.4byte	.LASF383
+	.4byte	.LASF383
 	.byte	0x2
 	.2byte	0x401
 	.uleb128 0x66
-	.4byte	.LASF391
-	.4byte	.LASF391
+	.4byte	.LASF384
+	.4byte	.LASF384
 	.byte	0x2
 	.2byte	0x404
 	.uleb128 0x66
-	.4byte	.LASF392
-	.4byte	.LASF392
-	.byte	0x17
+	.4byte	.LASF385
+	.4byte	.LASF385
+	.byte	0x19
 	.2byte	0x371
 	.uleb128 0x66
-	.4byte	.LASF393
-	.4byte	.LASF393
+	.4byte	.LASF386
+	.4byte	.LASF386
 	.byte	0x2
 	.2byte	0x3f9
 	.uleb128 0x66
-	.4byte	.LASF394
-	.4byte	.LASF394
+	.4byte	.LASF387
+	.4byte	.LASF387
 	.byte	0x2
 	.2byte	0x59d
 	.uleb128 0x66
-	.4byte	.LASF395
-	.4byte	.LASF395
+	.4byte	.LASF388
+	.4byte	.LASF388
 	.byte	0x2
 	.2byte	0x429
 	.uleb128 0x66
-	.4byte	.LASF396
-	.4byte	.LASF396
+	.4byte	.LASF389
+	.4byte	.LASF389
 	.byte	0x2
 	.2byte	0x596
 	.uleb128 0x67
-	.4byte	.LASF397
-	.4byte	.LASF397
-	.byte	0x1b
+	.4byte	.LASF390
+	.4byte	.LASF390
+	.byte	0x1d
 	.byte	0x11
 	.uleb128 0x66
-	.4byte	.LASF398
-	.4byte	.LASF398
-	.byte	0x17
+	.4byte	.LASF391
+	.4byte	.LASF391
+	.byte	0x19
 	.2byte	0x16d
 	.uleb128 0x66
-	.4byte	.LASF399
-	.4byte	.LASF399
+	.4byte	.LASF392
+	.4byte	.LASF392
 	.byte	0x2
 	.2byte	0x3ff
 	.uleb128 0x66
-	.4byte	.LASF400
-	.4byte	.LASF400
-	.byte	0x19
+	.4byte	.LASF393
+	.4byte	.LASF393
+	.byte	0x1b
 	.2byte	0x182
 	.uleb128 0x66
-	.4byte	.LASF401
-	.4byte	.LASF401
+	.4byte	.LASF394
+	.4byte	.LASF394
 	.byte	0x2
 	.2byte	0x5ab
 	.uleb128 0x67
-	.4byte	.LASF402
-	.4byte	.LASF402
-	.byte	0x19
+	.4byte	.LASF395
+	.4byte	.LASF395
+	.byte	0x1b
 	.byte	0xa9
 	.uleb128 0x67
-	.4byte	.LASF403
-	.4byte	.LASF403
-	.byte	0x19
+	.4byte	.LASF396
+	.4byte	.LASF396
+	.byte	0x1b
 	.byte	0xb6
 	.uleb128 0x67
-	.4byte	.LASF404
-	.4byte	.LASF404
+	.4byte	.LASF397
+	.4byte	.LASF397
 	.byte	0x8
 	.byte	0x33
 	.byte	0
@@ -6993,21 +7234,6 @@ __func__.8712:
 	.byte	0
 	.byte	0
 	.uleb128 0x1d
-	.uleb128 0xd
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x38
-	.uleb128 0x5
-	.byte	0
-	.byte	0
-	.uleb128 0x1e
 	.uleb128 0x21
 	.byte	0
 	.uleb128 0x49
@@ -7016,7 +7242,7 @@ __func__.8712:
 	.uleb128 0x5
 	.byte	0
 	.byte	0
-	.uleb128 0x1f
+	.uleb128 0x1e
 	.uleb128 0x13
 	.byte	0x1
 	.uleb128 0x3
@@ -7031,7 +7257,7 @@ __func__.8712:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x20
+	.uleb128 0x1f
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7048,7 +7274,7 @@ __func__.8712:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x21
+	.uleb128 0x20
 	.uleb128 0x4
 	.byte	0x1
 	.uleb128 0xb
@@ -7063,7 +7289,7 @@ __func__.8712:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x22
+	.uleb128 0x21
 	.uleb128 0x4
 	.byte	0x1
 	.uleb128 0xb
@@ -7078,7 +7304,7 @@ __func__.8712:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x23
+	.uleb128 0x22
 	.uleb128 0x13
 	.byte	0x1
 	.uleb128 0x3
@@ -7093,7 +7319,7 @@ __func__.8712:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x24
+	.uleb128 0x23
 	.uleb128 0xd
 	.byte	0
 	.uleb128 0x3
@@ -7108,7 +7334,7 @@ __func__.8712:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x25
+	.uleb128 0x24
 	.uleb128 0x16
 	.byte	0
 	.uleb128 0x3
@@ -7121,7 +7347,7 @@ __func__.8712:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x26
+	.uleb128 0x25
 	.uleb128 0xd
 	.byte	0
 	.uleb128 0x3
@@ -7136,7 +7362,7 @@ __func__.8712:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x27
+	.uleb128 0x26
 	.uleb128 0x13
 	.byte	0x1
 	.uleb128 0x3
@@ -7151,16 +7377,7 @@ __func__.8712:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x28
-	.uleb128 0x15
-	.byte	0x1
 	.uleb128 0x27
-	.uleb128 0x19
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x29
 	.uleb128 0x4
 	.byte	0x1
 	.uleb128 0x3
@@ -7177,7 +7394,7 @@ __func__.8712:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x2a
+	.uleb128 0x28
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -7198,13 +7415,13 @@ __func__.8712:
 	.uleb128 0x6
 	.uleb128 0x40
 	.uleb128 0x18
-	.uleb128 0x2117
+	.uleb128 0x2116
 	.uleb128 0x19
 	.uleb128 0x1
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x2b
+	.uleb128 0x29
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -7219,7 +7436,7 @@ __func__.8712:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x2c
+	.uleb128 0x2a
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -7234,26 +7451,11 @@ __func__.8712:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x2d
-	.uleb128 0x34
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0x5
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x17
-	.byte	0
-	.byte	0
-	.uleb128 0x2e
+	.uleb128 0x2b
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
-	.uleb128 0x8
+	.uleb128 0xe
 	.uleb128 0x3a
 	.uleb128 0xb
 	.uleb128 0x3b
@@ -7264,7 +7466,7 @@ __func__.8712:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x2f
+	.uleb128 0x2c
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7275,11 +7477,11 @@ __func__.8712:
 	.uleb128 0x5
 	.uleb128 0x49
 	.uleb128 0x13
-	.uleb128 0x1c
-	.uleb128 0xb
+	.uleb128 0x2
+	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x30
+	.uleb128 0x2d
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -7296,7 +7498,7 @@ __func__.8712:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x31
+	.uleb128 0x2e
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
@@ -7305,14 +7507,21 @@ __func__.8712:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x32
+	.uleb128 0x2f
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x30
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x55
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x33
+	.uleb128 0x31
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -7321,7 +7530,7 @@ __func__.8712:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x34
+	.uleb128 0x32
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -7330,14 +7539,14 @@ __func__.8712:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x35
+	.uleb128 0x33
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x36
+	.uleb128 0x34
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -7354,7 +7563,7 @@ __func__.8712:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x37
+	.uleb128 0x35
 	.uleb128 0x4109
 	.byte	0x1
 	.uleb128 0x11
@@ -7363,7 +7572,7 @@ __func__.8712:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x38
+	.uleb128 0x36
 	.uleb128 0x410a
 	.byte	0
 	.uleb128 0x2
@@ -7372,7 +7581,7 @@ __func__.8712:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x37
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x11
@@ -7383,14 +7592,7 @@ __func__.8712:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3a
-	.uleb128 0x5
-	.byte	0
-	.uleb128 0x31
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x3b
+	.uleb128 0x38
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x11
@@ -7399,7 +7601,7 @@ __func__.8712:
 	.uleb128 0x6
 	.byte	0
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x39
 	.uleb128 0x4109
 	.byte	0x1
 	.uleb128 0x11
@@ -7410,7 +7612,7 @@ __func__.8712:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3d
+	.uleb128 0x3a
 	.uleb128 0x4109
 	.byte	0
 	.uleb128 0x11
@@ -7419,7 +7621,7 @@ __func__.8712:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3e
+	.uleb128 0x3b
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -7430,7 +7632,7 @@ __func__.8712:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x3f
+	.uleb128 0x3c
 	.uleb128 0x4109
 	.byte	0x1
 	.uleb128 0x11
@@ -7441,7 +7643,7 @@ __func__.8712:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x40
+	.uleb128 0x3d
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x34
@@ -7452,7 +7654,7 @@ __func__.8712:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x41
+	.uleb128 0x3e
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -7471,7 +7673,7 @@ __func__.8712:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x42
+	.uleb128 0x3f
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -7484,7 +7686,7 @@ __func__.8712:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x43
+	.uleb128 0x40
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7497,7 +7699,7 @@ __func__.8712:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x44
+	.uleb128 0x41
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7510,7 +7712,7 @@ __func__.8712:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x45
+	.uleb128 0x42
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7523,19 +7725,46 @@ __func__.8712:
 	.uleb128 0xe
 	.byte	0
 	.byte	0
-	.uleb128 0x46
+	.uleb128 0x43
 	.uleb128 0xb
 	.byte	0x1
 	.byte	0
 	.byte	0
-	.uleb128 0x47
+	.uleb128 0x44
 	.uleb128 0x21
 	.byte	0
 	.uleb128 0x49
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x48
+	.uleb128 0x45
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x6
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x46
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -7550,7 +7779,7 @@ __func__.8712:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x49
+	.uleb128 0x47
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -7575,7 +7804,7 @@ __func__.8712:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4a
+	.uleb128 0x48
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7590,7 +7819,7 @@ __func__.8712:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x4b
+	.uleb128 0x49
 	.uleb128 0x4109
 	.byte	0x1
 	.uleb128 0x11
@@ -7599,7 +7828,7 @@ __func__.8712:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x4c
+	.uleb128 0x4a
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -7612,7 +7841,7 @@ __func__.8712:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4d
+	.uleb128 0x4b
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -7637,7 +7866,7 @@ __func__.8712:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4e
+	.uleb128 0x4c
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7652,7 +7881,7 @@ __func__.8712:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x4f
+	.uleb128 0x4d
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7663,7 +7892,7 @@ __func__.8712:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x50
+	.uleb128 0x4e
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -7688,7 +7917,7 @@ __func__.8712:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x51
+	.uleb128 0x4f
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -7703,7 +7932,7 @@ __func__.8712:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x52
+	.uleb128 0x50
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -7718,7 +7947,7 @@ __func__.8712:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x53
+	.uleb128 0x51
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7733,7 +7962,7 @@ __func__.8712:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x54
+	.uleb128 0x52
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7748,7 +7977,7 @@ __func__.8712:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x55
+	.uleb128 0x53
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7761,7 +7990,7 @@ __func__.8712:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x56
+	.uleb128 0x54
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7776,7 +8005,7 @@ __func__.8712:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x57
+	.uleb128 0x55
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7791,7 +8020,7 @@ __func__.8712:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x58
+	.uleb128 0x56
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x3
@@ -7804,7 +8033,7 @@ __func__.8712:
 	.uleb128 0x1
 	.byte	0
 	.byte	0
-	.uleb128 0x59
+	.uleb128 0x57
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -7821,7 +8050,7 @@ __func__.8712:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x5a
+	.uleb128 0x58
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -7838,7 +8067,7 @@ __func__.8712:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x5b
+	.uleb128 0x59
 	.uleb128 0x4109
 	.byte	0x1
 	.uleb128 0x11
@@ -7847,7 +8076,7 @@ __func__.8712:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x5c
+	.uleb128 0x5a
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -7866,7 +8095,7 @@ __func__.8712:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x5d
+	.uleb128 0x5b
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -7879,7 +8108,7 @@ __func__.8712:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x5e
+	.uleb128 0x5c
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -7904,7 +8133,7 @@ __func__.8712:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x5f
+	.uleb128 0x5d
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7919,7 +8148,7 @@ __func__.8712:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x60
+	.uleb128 0x5e
 	.uleb128 0x410a
 	.byte	0
 	.uleb128 0x31
@@ -7928,7 +8157,7 @@ __func__.8712:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x61
+	.uleb128 0x5f
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -7941,7 +8170,7 @@ __func__.8712:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x62
+	.uleb128 0x60
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7954,6 +8183,48 @@ __func__.8712:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
+	.uleb128 0x61
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x6
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x62
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
 	.uleb128 0x63
 	.uleb128 0x2e
 	.byte	0x1
@@ -8026,643 +8297,701 @@ __func__.8712:
 	.byte	0
 	.section	.debug_loc,"",%progbits
 .Ldebug_loc0:
-.LLST59:
-	.4byte	.LVL122
-	.4byte	.LVL129
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL129
-	.4byte	.LVL132
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL132
-	.4byte	.LVL133
+.LLST60:
+	.4byte	.LVL124
+	.4byte	.LVL127
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL133
-	.4byte	.LFE219
+	.4byte	.LVL127
+	.4byte	.LFE216
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST60:
-	.4byte	.LVL122
+.LLST61:
+	.4byte	.LVL124
 	.4byte	.LVL127
 	.2byte	0x1
 	.byte	0x51
 	.4byte	.LVL127
-	.4byte	.LFE219
+	.4byte	.LFE216
 	.2byte	0x1
-	.byte	0x55
-	.4byte	0
+	.byte	0x56
 	.4byte	0
-.LLST61:
-	.4byte	.LVL122
-	.4byte	.LVL125
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL125
-	.4byte	.LVL131
-	.2byte	0x3
-	.byte	0x7d
-	.sleb128 100
-	.4byte	.LVL131
-	.4byte	.LVL132
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	.LVL132
-	.4byte	.LVL181
-	.2byte	0x3
-	.byte	0x7d
-	.sleb128 100
-	.4byte	.LVL181
-	.4byte	.LVL188
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 84
-	.4byte	.LVL188
-	.4byte	.LVL190
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	.LVL190
-	.4byte	.LVL196
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 84
-	.4byte	.LVL196
-	.4byte	.LVL208
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
+	.4byte	0
+.LLST62:
+	.4byte	.LVL124
+	.4byte	.LVL127
+	.2byte	0x1
 	.byte	0x52
-	.byte	0x9f
-	.4byte	.LVL208
-	.4byte	.LVL209
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 84
-	.4byte	.LVL209
-	.4byte	.LVL213
+	.4byte	.LVL127
+	.4byte	.LFE216
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x52
 	.byte	0x9f
-	.4byte	.LVL213
-	.4byte	.LFE219
-	.2byte	0x3
-	.byte	0x7d
-	.sleb128 100
 	.4byte	0
 	.4byte	0
-.LLST62:
-	.4byte	.LVL122
+.LLST63:
+	.4byte	.LVL124
 	.4byte	.LVL126
 	.2byte	0x1
 	.byte	0x53
 	.4byte	.LVL126
-	.4byte	.LVL130-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL130-1
-	.4byte	.LVL132
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.4byte	.LVL132
-	.4byte	.LVL134-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL134-1
-	.4byte	.LFE219
+	.4byte	.LVL168
+	.2byte	0x3
+	.byte	0x7d
+	.sleb128 92
+	.4byte	.LVL168
+	.4byte	.LVL234
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x53
 	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST63:
-	.4byte	.LVL123
-	.4byte	.LVL124
+	.4byte	.LVL234
+	.4byte	.LFE216
 	.2byte	0x3
 	.byte	0x7d
-	.sleb128 100
+	.sleb128 92
 	.4byte	0
 	.4byte	0
 .LLST64:
-	.4byte	.LVL122
-	.4byte	.LVL131
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xea
-	.byte	0x9f
-	.4byte	.LVL132
-	.4byte	.LVL179
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xea
-	.byte	0x9f
-	.4byte	.LVL213
-	.4byte	.LVL214
+	.4byte	.LVL125
+	.4byte	.LVL127
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL127
+	.4byte	.LVL198
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL200
+	.4byte	.LVL220
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL230
+	.4byte	.LFE216
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST65:
+	.4byte	.LVL124
+	.4byte	.LVL127
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xea
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST65:
-	.4byte	.LVL132
-	.4byte	.LVL134-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL134-1
-	.4byte	.LVL179
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
+.LLST66:
+	.4byte	.LVL124
+	.4byte	.LVL127
+	.2byte	0x2
+	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL213
-	.4byte	.LVL214
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
+	.4byte	.LVL127
+	.4byte	.LVL133
+	.2byte	0x3
+	.byte	0x7d
+	.sleb128 96
+	.4byte	.LVL133
+	.4byte	.LVL134
+	.2byte	0x1
 	.byte	0x53
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST66:
-	.4byte	.LVL132
-	.4byte	.LVL179
+	.4byte	.LVL134
+	.4byte	.LVL168
 	.2byte	0x3
 	.byte	0x7d
-	.sleb128 100
-	.4byte	.LVL213
-	.4byte	.LVL214
+	.sleb128 96
+	.4byte	.LVL234
+	.4byte	.LFE216
 	.2byte	0x3
 	.byte	0x7d
-	.sleb128 100
+	.sleb128 96
 	.4byte	0
 	.4byte	0
 .LLST67:
-	.4byte	.LVL132
-	.4byte	.LVL179
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL213
-	.4byte	.LVL214
-	.2byte	0x1
-	.byte	0x55
+	.4byte	.LVL136
+	.4byte	.LVL143
+	.2byte	0x3
+	.byte	0x7d
+	.sleb128 92
+	.4byte	.LVL144
+	.4byte	.LVL168
+	.2byte	0x3
+	.byte	0x7d
+	.sleb128 92
+	.4byte	.LVL234
+	.4byte	.LFE216
+	.2byte	0x3
+	.byte	0x7d
+	.sleb128 92
 	.4byte	0
 	.4byte	0
 .LLST68:
-	.4byte	.LVL132
-	.4byte	.LVL133
+	.4byte	.LVL136
+	.4byte	.LVL143
 	.2byte	0x1
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-	.4byte	.LVL133
-	.4byte	.LVL179
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 	.2byte	0x1
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-	.4byte	.LVL214
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+	.4byte	.LFE216
 	.2byte	0x1
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 	.4byte	0
 	.4byte	0
 .LLST69:
-	.4byte	.LVL135
-	.4byte	.LVL136-1
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+	.4byte	.LVL143
 	.2byte	0x1
-	.byte	0x50
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 	.2byte	0x1
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+	.4byte	.LFE216
+	.2byte	0x1
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 	.4byte	0
 	.4byte	0
 .LLST70:
-	.4byte	.LVL141
-	.4byte	.LVL142
+	.4byte	.LVL138
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 	.2byte	0x1
 	.byte	0x50
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 	.4byte	.LVL143
+	.2byte	0x3
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+	.sleb128 100
 	.4byte	.LVL144
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+	.sleb128 100
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+	.4byte	.LVL146
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 	.2byte	0x1
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 	.2byte	0x1
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 	.2byte	0x1
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 	.4byte	.LVL163
-	.4byte	.LVL164
+	.4byte	.LVL166
+	.2byte	0x1
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 	.2byte	0x1
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-	.4byte	.LVL132
-	.4byte	.LVL148
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+	.4byte	.LVL136
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 	.2byte	0x2
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-	.4byte	.LVL149
+	.4byte	.LVL144
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 	.2byte	0x2
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-	.4byte	.LVL149
-	.4byte	.LVL150
+	.4byte	.LVL160
+	.4byte	.LVL161
 	.2byte	0x2
 	.byte	0x30
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-	.4byte	.LVL179
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 	.2byte	0x1
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-	.4byte	.LVL132
-	.4byte	.LVL139
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+	.4byte	.LVL136
+	.4byte	.LVL143
 	.2byte	0x3
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 	.byte	0x9f
-	.4byte	.LVL139
-	.4byte	.LVL140
+	.4byte	.LVL144
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+	.2byte	0x3
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+	.4byte	.LVL151
 	.2byte	0x1
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-	.4byte	.LVL145
+	.4byte	.LVL151
+	.4byte	.LVL156
 	.2byte	0x1
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-	.4byte	.LVL147
+	.byte	0x58
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+	.4byte	.LVL158
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL147
-	.4byte	.LVL148
+	.4byte	.LVL158
+	.4byte	.LVL159
 	.2byte	0x1
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-	.4byte	.LVL148
-	.4byte	.LVL151
+	.byte	0x58
+	.4byte	.LVL159
+	.4byte	.LVL162
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL151
-	.4byte	.LVL152-1
+	.4byte	.LVL162
+	.4byte	.LVL163-1
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
-	.4byte	.LVL152-1
-	.4byte	.LVL157
+	.4byte	.LVL163-1
+	.4byte	.LVL168
 	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL158
-	.4byte	.LVL161
+	.byte	0x58
+	.4byte	.LVL169
+	.4byte	.LVL172
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL161
-	.4byte	.LVL162-1
+	.4byte	.LVL172
+	.4byte	.LVL173-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL162-1
-	.4byte	.LVL166
+	.4byte	.LVL173-1
+	.4byte	.LVL177
 	.2byte	0x3
 	.byte	0x7d
 	.sleb128 96
-	.4byte	.LVL178
-	.4byte	.LVL179
+	.4byte	.LVL189
+	.4byte	.LVL190
 	.2byte	0x1
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 	.4byte	0
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-	.4byte	.LVL134
-	.4byte	.LVL135-1
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+	.4byte	.LVL137
+	.4byte	.LVL138-1
 	.2byte	0x1
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-	.4byte	.LVL179
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 	.2byte	0x1
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-	.4byte	.LVL213
-	.4byte	.LVL214
+	.byte	0x55
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 	.2byte	0x1
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+	.4byte	.LFE216
+	.2byte	0x1
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 	.4byte	0
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-	.4byte	.LVL153
-	.4byte	.LVL154
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+	.4byte	.LVL140
+	.4byte	.LVL141
+	.2byte	0x1
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+	.4byte	.LVL164
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 	.2byte	0x3
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 	.sleb128 4
 	.byte	0x9f
-	.4byte	.LVL154
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 	.2byte	0x1
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+	.4byte	.LVL167-1
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 	.2byte	0x3
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 	.sleb128 4
 	.byte	0x9f
 	.4byte	0
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-	.4byte	.LVL153
-	.4byte	.LVL156
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+	.4byte	.LVL164
+	.4byte	.LVL167
 	.2byte	0x1
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-	.4byte	.LVL153
-	.4byte	.LVL156
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+	.4byte	.LVL164
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 	.2byte	0x1
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-	.4byte	.LVL159
-	.4byte	.LVL160
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+	.4byte	.LVL170
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 	.2byte	0x4
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 	.2byte	0x4
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 	.4byte	0
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-	.4byte	.LVL159
-	.4byte	.LVL161
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+	.4byte	.LVL170
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 	.2byte	0x1
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 	.2byte	0x1
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 	.2byte	0x3
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-	.4byte	.LVL159
-	.4byte	.LVL162
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+	.4byte	.LVL170
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 	.2byte	0x1
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-	.4byte	.LVL167
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+	.4byte	.LVL178
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-	.4byte	.LVL167
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+	.4byte	.LVL178
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-	.4byte	.LVL167
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+	.4byte	.LVL178
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-	.4byte	.LVL167
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+	.4byte	.LVL178
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-	.4byte	.LVL167
-	.4byte	.LVL169
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+	.4byte	.LVL178
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-	.4byte	.LVL172
-	.4byte	.LVL173
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+	.4byte	.LVL183
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 	.2byte	0x1
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-	.4byte	.LVL179
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 	.4byte	.LVL190
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-	.4byte	.LVL179
-	.4byte	.LVL189
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+	.4byte	.LVL190
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 	.2byte	0x1
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 	.2byte	0x1
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-	.4byte	.LVL182
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+	.4byte	.LVL192
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 	.2byte	0x2
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 	.sleb128 0
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 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 16
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 	.2byte	0x2
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 	.sleb128 0
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+	.2byte	0x2
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+	.4byte	.LVL219
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+	.2byte	0x1
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+	.4byte	.LVL201
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+	.4byte	.LVL221
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 	.sleb128 0
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-	.4byte	.LVL197
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+	.4byte	.LVL213
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 	.2byte	0x1
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 	.2byte	0x1
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 	.2byte	0x1
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 	.2byte	0x1
 	.byte	0x50
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-	.4byte	.LVL213
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 	.2byte	0x1
 	.byte	0x5b
-	.4byte	0
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-	.4byte	.LVL191
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 	.2byte	0x1
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 	.2byte	0x1
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 	.4byte	0
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-	.4byte	.LVL199
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 	.2byte	0x1
-	.byte	0x50
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-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
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-	.4byte	.LVL201
-	.4byte	.LVL202
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-	.4byte	.LVL198
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 	.2byte	0x1
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 	.2byte	0x1
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-	.4byte	.LVL195
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 	.2byte	0x1
 	.byte	0x50
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-	.2byte	0x3
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-	.sleb128 84
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 	.2byte	0x1
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-	.2byte	0x3
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 	.4byte	0
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-	.4byte	.LVL183
-	.4byte	.LVL184
+.LLST98:
+	.4byte	.LVL193
+	.4byte	.LVL194
 	.2byte	0x6
 	.byte	0x3
 	.4byte	.LC14
 	.byte	0x9f
-	.4byte	.LVL184
-	.4byte	.LVL185
+	.4byte	.LVL194
+	.4byte	.LVL195
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL185
-	.4byte	.LVL186-1
+	.4byte	.LVL195
+	.4byte	.LVL196-1
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST88:
-	.4byte	.LVL180
-	.4byte	.LVL184-1
+.LLST99:
+	.4byte	.LVL208
+	.4byte	.LVL209
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL209
+	.4byte	.LVL210-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL211
+	.4byte	.LVL212
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL212
+	.4byte	.LVL213-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST90:
+	.4byte	.LVL191
+	.4byte	.LVL194-1
 	.2byte	0x6
-	.byte	0x75
+	.byte	0x76
 	.sleb128 8
 	.byte	0x6
 	.byte	0x31
@@ -8670,13 +8999,13 @@ __func__.8712:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST58:
-	.4byte	.LVL120
-	.4byte	.LVL121
+.LLST59:
+	.4byte	.LVL122
+	.4byte	.LVL123
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL121
-	.4byte	.LFE216
+	.4byte	.LVL123
+	.4byte	.LFE213
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -8694,7 +9023,7 @@ __func__.8712:
 	.2byte	0x1
 	.byte	0x54
 	.4byte	.LVL117
-	.4byte	.LFE215
+	.4byte	.LFE212
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -8712,7 +9041,7 @@ __func__.8712:
 	.2byte	0x1
 	.byte	0x55
 	.4byte	.LVL117
-	.4byte	.LFE215
+	.4byte	.LFE212
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -8726,7 +9055,7 @@ __func__.8712:
 	.2byte	0x1
 	.byte	0x52
 	.4byte	.LVL106
-	.4byte	.LFE215
+	.4byte	.LFE212
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -8740,7 +9069,7 @@ __func__.8712:
 	.2byte	0x1
 	.byte	0x53
 	.4byte	.LVL110
-	.4byte	.LFE215
+	.4byte	.LFE212
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -8852,13 +9181,13 @@ __func__.8712:
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST57:
-	.4byte	.LVL118
-	.4byte	.LVL119
+.LLST58:
+	.4byte	.LVL120
+	.4byte	.LVL121
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL119
-	.4byte	.LFE214
+	.4byte	.LVL121
+	.4byte	.LFE211
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -8876,7 +9205,7 @@ __func__.8712:
 	.2byte	0x1
 	.byte	0x54
 	.4byte	.LVL104
-	.4byte	.LFE211
+	.4byte	.LFE208
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -8894,7 +9223,7 @@ __func__.8712:
 	.2byte	0x1
 	.byte	0x56
 	.4byte	.LVL104
-	.4byte	.LFE211
+	.4byte	.LFE208
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -8912,7 +9241,7 @@ __func__.8712:
 	.2byte	0x1
 	.byte	0x57
 	.4byte	.LVL104
-	.4byte	.LFE211
+	.4byte	.LFE208
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -8930,7 +9259,7 @@ __func__.8712:
 	.2byte	0x1
 	.byte	0x55
 	.4byte	.LVL104
-	.4byte	.LFE211
+	.4byte	.LFE208
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -8945,7 +9274,7 @@ __func__.8712:
 	.byte	0x91
 	.sleb128 0
 	.4byte	.LVL104
-	.4byte	.LFE211
+	.4byte	.LFE208
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
@@ -8958,7 +9287,7 @@ __func__.8712:
 	.byte	0x91
 	.sleb128 4
 	.4byte	.LVL104
-	.4byte	.LFE211
+	.4byte	.LFE208
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 4
@@ -8989,7 +9318,7 @@ __func__.8712:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL43
-	.4byte	.LFE210
+	.4byte	.LFE207
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
@@ -9000,7 +9329,7 @@ __func__.8712:
 	.2byte	0x1
 	.byte	0x51
 	.4byte	.LVL42
-	.4byte	.LFE210
+	.4byte	.LFE207
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -68
@@ -9028,7 +9357,7 @@ __func__.8712:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL86-1
-	.4byte	.LFE210
+	.4byte	.LFE207
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
@@ -9076,7 +9405,7 @@ __func__.8712:
 	.2byte	0x1
 	.byte	0x57
 	.4byte	.LVL92
-	.4byte	.LFE210
+	.4byte	.LFE207
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9091,7 +9420,7 @@ __func__.8712:
 	.byte	0x91
 	.sleb128 0
 	.4byte	.LVL68
-	.4byte	.LFE210
+	.4byte	.LFE207
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 0
@@ -9104,7 +9433,7 @@ __func__.8712:
 	.byte	0x91
 	.sleb128 4
 	.4byte	.LVL68
-	.4byte	.LFE210
+	.4byte	.LFE207
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 4
@@ -9221,7 +9550,7 @@ __func__.8712:
 	.byte	0x30
 	.byte	0x9f
 	.4byte	.LVL90
-	.4byte	.LFE210
+	.4byte	.LFE207
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
@@ -9233,7 +9562,7 @@ __func__.8712:
 	.2byte	0x1
 	.byte	0x53
 	.4byte	.LVL45-1
-	.4byte	.LFE210
+	.4byte	.LFE207
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -76
@@ -9363,7 +9692,7 @@ __func__.8712:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL34-1
-	.4byte	.LFE206
+	.4byte	.LFE203
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
@@ -9374,7 +9703,7 @@ __func__.8712:
 	.2byte	0x1
 	.byte	0x51
 	.4byte	.LVL31
-	.4byte	.LFE206
+	.4byte	.LFE203
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
@@ -9389,7 +9718,7 @@ __func__.8712:
 	.2byte	0x1
 	.byte	0x51
 	.4byte	.LVL34-1
-	.4byte	.LFE206
+	.4byte	.LFE203
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9407,7 +9736,7 @@ __func__.8712:
 	.2byte	0x1
 	.byte	0x52
 	.4byte	.LVL34-1
-	.4byte	.LFE206
+	.4byte	.LFE203
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9429,6 +9758,20 @@ __func__.8712:
 	.byte	0x50
 	.4byte	0
 	.4byte	0
+.LLST57:
+	.4byte	.LVL118
+	.4byte	.LVL119
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL119
+	.4byte	.LFE201
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
 .LLST0:
 	.4byte	.LVL0
 	.4byte	.LVL1-1
@@ -9450,7 +9793,7 @@ __func__.8712:
 	.2byte	0x1
 	.byte	0x55
 	.4byte	.LVL19
-	.4byte	.LFE220
+	.4byte	.LFE217
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9475,7 +9818,7 @@ __func__.8712:
 	.byte	0x51
 	.byte	0x9f
 	.4byte	.LVL16
-	.4byte	.LFE220
+	.4byte	.LFE217
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
@@ -9497,7 +9840,7 @@ __func__.8712:
 	.byte	0x52
 	.byte	0x9f
 	.4byte	.LVL16
-	.4byte	.LFE220
+	.4byte	.LFE217
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
@@ -9519,7 +9862,7 @@ __func__.8712:
 	.byte	0x53
 	.byte	0x9f
 	.4byte	.LVL16
-	.4byte	.LFE220
+	.4byte	.LFE217
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
@@ -9546,7 +9889,7 @@ __func__.8712:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL28
-	.4byte	.LFE220
+	.4byte	.LFE217
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
@@ -9567,7 +9910,7 @@ __func__.8712:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL28
-	.4byte	.LFE220
+	.4byte	.LFE217
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
@@ -9634,29 +9977,31 @@ __func__.8712:
 	.4byte	0
 	.4byte	0
 	.section	.debug_aranges,"",%progbits
-	.4byte	0x54
+	.4byte	0x5c
 	.2byte	0x2
 	.4byte	.Ldebug_info0
 	.byte	0x4
 	.byte	0
 	.2byte	0
 	.2byte	0
-	.4byte	.LFB220
-	.4byte	.LFE220-.LFB220
-	.4byte	.LFB206
-	.4byte	.LFE206-.LFB206
-	.4byte	.LFB210
-	.4byte	.LFE210-.LFB210
+	.4byte	.LFB217
+	.4byte	.LFE217-.LFB217
+	.4byte	.LFB203
+	.4byte	.LFE203-.LFB203
+	.4byte	.LFB207
+	.4byte	.LFE207-.LFB207
+	.4byte	.LFB208
+	.4byte	.LFE208-.LFB208
+	.4byte	.LFB212
+	.4byte	.LFE212-.LFB212
+	.4byte	.LFB201
+	.4byte	.LFE201-.LFB201
 	.4byte	.LFB211
 	.4byte	.LFE211-.LFB211
-	.4byte	.LFB215
-	.4byte	.LFE215-.LFB215
-	.4byte	.LFB214
-	.4byte	.LFE214-.LFB214
+	.4byte	.LFB213
+	.4byte	.LFE213-.LFB213
 	.4byte	.LFB216
 	.4byte	.LFE216-.LFB216
-	.4byte	.LFB219
-	.4byte	.LFE219-.LFB219
 	.4byte	0
 	.4byte	0
 	.section	.debug_ranges,"",%progbits
@@ -9695,66 +10040,70 @@ __func__.8712:
 	.4byte	.LBE95
 	.4byte	0
 	.4byte	0
-	.4byte	.LFB220
-	.4byte	.LFE220
-	.4byte	.LFB206
-	.4byte	.LFE206
-	.4byte	.LFB210
-	.4byte	.LFE210
+	.4byte	.LFB217
+	.4byte	.LFE217
+	.4byte	.LFB203
+	.4byte	.LFE203
+	.4byte	.LFB207
+	.4byte	.LFE207
+	.4byte	.LFB208
+	.4byte	.LFE208
+	.4byte	.LFB212
+	.4byte	.LFE212
+	.4byte	.LFB201
+	.4byte	.LFE201
 	.4byte	.LFB211
 	.4byte	.LFE211
-	.4byte	.LFB215
-	.4byte	.LFE215
-	.4byte	.LFB214
-	.4byte	.LFE214
+	.4byte	.LFB213
+	.4byte	.LFE213
 	.4byte	.LFB216
 	.4byte	.LFE216
-	.4byte	.LFB219
-	.4byte	.LFE219
 	.4byte	0
 	.4byte	0
 	.section	.debug_line,"",%progbits
 .Ldebug_line0:
 	.section	.debug_str,"MS",%progbits,1
-.LASF392:
+.LASF385:
 	.ascii	"memalign_simple\000"
-.LASF347:
+.LASF339:
 	.ascii	"blob\000"
-.LASF132:
+.LASF130:
 	.ascii	"off_mem_rsvmap\000"
-.LASF203:
+.LASF201:
 	.ascii	"IH_COMP_GZIP\000"
 .LASF18:
 	.ascii	"size_t\000"
-.LASF252:
+.LASF250:
 	.ascii	"initrd_start\000"
 .LASF13:
 	.ascii	"sizetype\000"
-.LASF284:
+.LASF272:
 	.ascii	"net_hostname\000"
 .LASF77:
 	.ascii	"start\000"
-.LASF158:
+.LASF156:
 	.ascii	"IH_OS_ARTOS\000"
-.LASF304:
+.LASF293:
 	.ascii	"NETLOOP_RESTART\000"
 .LASF48:
 	.ascii	"IF_TYPE_MTD\000"
-.LASF384:
+.LASF377:
 	.ascii	"fdt_shrink_to_minimum\000"
-.LASF371:
+.LASF364:
 	.ascii	"fit_get_name\000"
-.LASF211:
+.LASF209:
 	.ascii	"ih_magic\000"
-.LASF331:
+.LASF322:
 	.ascii	"__func__\000"
 .LASF37:
 	.ascii	"IF_TYPE_DOC\000"
+.LASF400:
+	.ascii	"/home/zzz/u-boot\000"
 .LASF59:
 	.ascii	"part_type\000"
-.LASF112:
+.LASF110:
 	.ascii	"bi_intfreq\000"
-.LASF185:
+.LASF183:
 	.ascii	"IH_TYPE_ATMELIMAGE\000"
 .LASF11:
 	.ascii	"phys_addr_t\000"
@@ -9764,99 +10113,99 @@ __func__.8712:
 	.ascii	"__u8\000"
 .LASF67:
 	.ascii	"vendor\000"
-.LASF303:
+.LASF292:
 	.ascii	"NETLOOP_CONTINUE\000"
-.LASF88:
+.LASF86:
 	.ascii	"flash_info_t\000"
-.LASF228:
+.LASF226:
 	.ascii	"comp\000"
-.LASF223:
+.LASF221:
 	.ascii	"image_header_t\000"
-.LASF257:
+.LASF255:
 	.ascii	"state\000"
-.LASF340:
+.LASF332:
 	.ascii	"align_len\000"
-.LASF106:
+.LASF104:
 	.ascii	"bi_dsp_freq\000"
-.LASF225:
+.LASF223:
 	.ascii	"image_start\000"
-.LASF336:
+.LASF328:
 	.ascii	"part_name\000"
-.LASF333:
+.LASF325:
 	.ascii	"spl_internal_load_simple_fit\000"
-.LASF204:
+.LASF202:
 	.ascii	"IH_COMP_BZIP2\000"
-.LASF142:
+.LASF140:
 	.ascii	"IH_OS_FREEBSD\000"
 .LASF62:
 	.ascii	"type\000"
 .LASF50:
 	.ascii	"if_type\000"
-.LASF215:
+.LASF213:
 	.ascii	"ih_load\000"
-.LASF176:
+.LASF174:
 	.ascii	"IH_TYPE_KWBIMAGE\000"
 .LASF26:
 	.ascii	"efi_guid_t\000"
 .LASF262:
 	.ascii	"__dtb_dt_spl_begin\000"
-.LASF145:
+.LASF323:
+	.ascii	"conf_noffset\000"
+.LASF143:
 	.ascii	"IH_OS_SVR4\000"
 .LASF7:
 	.ascii	"__u32\000"
-.LASF278:
+.LASF307:
 	.ascii	"priv\000"
-.LASF184:
+.LASF182:
 	.ascii	"IH_TYPE_GPIMAGE\000"
 .LASF70:
 	.ascii	"bdev\000"
-.LASF289:
+.LASF277:
 	.ascii	"net_server_ip\000"
-.LASF209:
+.LASF207:
 	.ascii	"IH_COMP_COUNT\000"
-.LASF297:
+.LASF285:
 	.ascii	"net_native_vlan\000"
 .LASF63:
 	.ascii	"removable\000"
-.LASF376:
+.LASF369:
 	.ascii	"fdt_getprop\000"
 .LASF24:
 	.ascii	"errno\000"
 .LASF15:
 	.ascii	"long int\000"
-.LASF101:
+.LASF99:
 	.ascii	"bi_flashsize\000"
-.LASF146:
+.LASF144:
 	.ascii	"IH_OS_ESIX\000"
-.LASF172:
+.LASF170:
 	.ascii	"IH_TYPE_FIRMWARE\000"
-.LASF404:
+.LASF397:
 	.ascii	"strchr\000"
-.LASF253:
+.LASF251:
 	.ascii	"initrd_end\000"
-.LASF125:
+.LASF123:
 	.ascii	"IRQ_STACK_START_IN\000"
-.LASF136:
+.LASF134:
 	.ascii	"size_dt_strings\000"
-.LASF397:
+.LASF390:
 	.ascii	"puts\000"
-.LASF373:
+.LASF366:
 	.ascii	"image_get_magic\000"
-.LASF374:
+.LASF367:
 	.ascii	"__fswab32\000"
-.LASF407:
-	.ascii	"/home/zzz/code/u-boot\000"
-.LASF300:
+.LASF288:
 	.ascii	"net_boot_file_size\000"
-.LASF359:
+.LASF351:
 	.ascii	"data\000"
-.LASF290:
+.LASF278:
 	.ascii	"net_tx_packet\000"
-.LASF167:
+.LASF165:
 	.ascii	"IH_TYPE_INVALID\000"
-.LASF217:
+.LASF215:
 	.ascii	"ih_dcrc\000"
-.LASF111:
+.LASF109:
 	.ascii	"bi_ethspeed\000"
 .LASF66:
 	.ascii	"log2blksz\000"
@@ -9864,11 +10213,11 @@ __func__.8712:
 	.ascii	"IF_TYPE_HOST\000"
 .LASF71:
 	.ascii	"ide_bus_offset\000"
-.LASF367:
+.LASF359:
 	.ascii	"spl_fit_get_image_node\000"
-.LASF287:
+.LASF275:
 	.ascii	"net_server_ethaddr\000"
-.LASF114:
+.LASF112:
 	.ascii	"bi_arch_number\000"
 .LASF266:
 	.ascii	"in_addr\000"
@@ -9876,381 +10225,377 @@ __func__.8712:
 	.ascii	"signed char\000"
 .LASF21:
 	.ascii	"uint8_t\000"
-.LASF391:
+.LASF384:
 	.ascii	"fit_image_get_data_size\000"
-.LASF86:
+.LASF401:
 	.ascii	"udevice\000"
-.LASF395:
+.LASF388:
 	.ascii	"fit_image_verify_with_data\000"
-.LASF219:
+.LASF217:
 	.ascii	"ih_arch\000"
-.LASF129:
+.LASF127:
 	.ascii	"totalsize\000"
-.LASF212:
+.LASF210:
 	.ascii	"ih_hcrc\000"
-.LASF313:
+.LASF302:
 	.ascii	"fdt_addr\000"
-.LASF193:
+.LASF191:
 	.ascii	"IH_TYPE_ZYNQIMAGE\000"
-.LASF91:
+.LASF89:
 	.ascii	"lmb_property\000"
-.LASF134:
+.LASF132:
 	.ascii	"last_comp_version\000"
+.LASF310:
+	.ascii	"read\000"
 .LASF0:
 	.ascii	"unsigned char\000"
-.LASF116:
+.LASF114:
 	.ascii	"bi_andr_version\000"
 .LASF45:
 	.ascii	"IF_TYPE_SPINAND\000"
-.LASF259:
+.LASF257:
 	.ascii	"images\000"
-.LASF372:
+.LASF365:
 	.ascii	"fit_hdr\000"
-.LASF179:
+.LASF177:
 	.ascii	"IH_TYPE_OMAPIMAGE\000"
 .LASF53:
 	.ascii	"SIG_TYPE_MBR\000"
-.LASF107:
+.LASF105:
 	.ascii	"bi_ddr_freq\000"
-.LASF214:
+.LASF212:
 	.ascii	"ih_size\000"
-.LASF328:
+.LASF318:
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-.LASF339:
+.LASF331:
 	.ascii	"spl_kernel_partition\000"
-.LASF245:
+.LASF243:
 	.ascii	"fit_hdr_setup\000"
-.LASF234:
+.LASF232:
 	.ascii	"legacy_hdr_valid\000"
-.LASF92:
+.LASF90:
 	.ascii	"base\000"
-.LASF160:
+.LASF158:
 	.ascii	"IH_OS_INTEGRITY\000"
 .LASF83:
 	.ascii	"sector_count\000"
-.LASF221:
+.LASF363:
+	.ascii	"fit_config_verify\000"
+.LASF219:
 	.ascii	"ih_comp\000"
-.LASF360:
+.LASF352:
 	.ascii	"external_data\000"
-.LASF337:
+.LASF329:
 	.ascii	"part_info\000"
 .LASF40:
 	.ascii	"IF_TYPE_SATA\000"
 .LASF55:
 	.ascii	"SIG_TYPE_COUNT\000"
-.LASF250:
+.LASF248:
 	.ascii	"ft_addr\000"
-.LASF361:
+.LASF353:
 	.ascii	"preload\000"
 .LASF4:
 	.ascii	"uchar\000"
-.LASF382:
+.LASF375:
 	.ascii	"part_get_info_by_name\000"
-.LASF148:
+.LASF146:
 	.ascii	"IH_OS_IRIX\000"
-.LASF251:
+.LASF249:
 	.ascii	"ft_len\000"
-.LASF276:
-	.ascii	"next\000"
-.LASF170:
+.LASF168:
 	.ascii	"IH_TYPE_RAMDISK\000"
-.LASF246:
+.LASF244:
 	.ascii	"fit_uname_setup\000"
-.LASF281:
+.LASF269:
 	.ascii	"net_netmask\000"
-.LASF272:
-	.ascii	"send\000"
-.LASF351:
+.LASF343:
 	.ascii	"spl_load_fit_image\000"
-.LASF119:
+.LASF117:
 	.ascii	"IRQ_STACK_START\000"
-.LASF312:
+.LASF301:
 	.ascii	"entry_point_os\000"
-.LASF243:
+.LASF241:
 	.ascii	"fit_uname_fdt\000"
-.LASF399:
+.LASF392:
 	.ascii	"fit_image_get_data\000"
 	.ident	"GCC: (Linaro GCC 6.3-2017.05) 6.3.1 20170404"
 	.section	.note.GNU-stack,"",%progbits

commit 15ab68fdce1560beb10f58aec22757a87c1ddf8f
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Apr 20 15:47:11 2021 +0800

    common: image-sig: just print error log if not enable device secure boot
    
    Allow bringing up system if enable FIT_SIGNATURE but not enable the
    device secure boot.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ic732777ef0adca90568dff254a4aebef18b6aa16

diff --git a/common/image-sig.c b/common/image-sig.c
index 97f4b558f1..41eda9acd8 100644
--- a/common/image-sig.c
+++ b/common/image-sig.c
@@ -500,7 +500,12 @@ int fit_config_verify_required_sigs(const void *fit, int conf_noffset,
 		if (ret) {
 			printf("Failed to verify required signature '%s'\n",
 			       fit_get_name(sig_blob, noffset, NULL));
+#ifndef USE_HOSTCC
+			if (fit_board_verify_required_sigs())
+				return ret;
+#else
 			return ret;
+#endif
 		}
 	}
 

commit 5ddf13183b7dc6605e47e8415bb3c98eef2234fa
Author: Wesley Yao <wesley.yao@rock-chips.com>
Date:   Wed Apr 7 09:50:48 2021 +0800

    cmd: ddr_tool: ddr_dq_eye.c: adjust write DQ eye print range of RK356x
    
    Adjust write DQ eye print range of RK356x so it is the same as read DQ eye.
    This avoid the users misunderstanding write DQ eye is smaller.
    
    Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
    Change-Id: Ia78a1a01f84c15dc0aa876a1b93a99a005314366

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rk3568.h b/arch/arm/include/asm/arch-rockchip/sdram_rk3568.h
index 0d4524662f..59732b6d97 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_rk3568.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_rk3568.h
@@ -11,6 +11,7 @@
 
 /* store result of read and write training, for ddr_dq_eye tool in u-boot */
 #define RW_TRN_RESULT_ADDR	(0x2000000 + 0x8000)	/* 32M + 32k */
+#define PRINT_STEP		2
 
 #undef FSP_NUM
 #undef CS_NUM
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rv1126.h b/arch/arm/include/asm/arch-rockchip/sdram_rv1126.h
index 149e07ea40..35f9cfaed0 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_rv1126.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_rv1126.h
@@ -361,6 +361,7 @@ struct rv1126_fsp_param {
 
 /* store result of read and write training, for ddr_dq_eye tool in u-boot */
 #define RW_TRN_RESULT_ADDR	(0x2000000 + 0x8000)	/* 32M + 32k */
+#define PRINT_STEP		1
 
 #undef FSP_NUM
 #undef CS_NUM
diff --git a/cmd/ddr_tool/ddr_dq_eye.c b/cmd/ddr_tool/ddr_dq_eye.c
index 1180d9a7e8..3cd1fbe345 100644
--- a/cmd/ddr_tool/ddr_dq_eye.c
+++ b/cmd/ddr_tool/ddr_dq_eye.c
@@ -15,28 +15,81 @@
 #include <asm/arch/sdram_rk3568.h>
 #endif
 
-#define __version__	"0.0.5"
+#define __version__	"0.0.6"
 
-#define PRINT_RANGE_MAX	64
+#define PRINT_LENGTH	64
+#ifndef PRINT_STEP
+#define PRINT_STEP	1
+#endif
+#define PRINT_RANGE	((PRINT_LENGTH) * (PRINT_STEP))
+
+struct print_border {
+	u16 far_left;
+	u16 far_right;
+};
 
 struct rw_trn_result result;
 
-static void print_title_bar(u16 deskew_num)
+static void calc_print_border(struct cs_rw_trn_result *result, u8 byte_en,
+			      u16 deskew_num, struct print_border *print_border)
 {
-	int i;
-	u16 deskew_step;
+	u16 far_left = deskew_num;
+	u16 far_right = 0;
+	u16 mid;
+	u8 dqs;
+	u8 dq;
+
+	if (deskew_num <= PRINT_RANGE) {
+		print_border->far_left = 0;
+		print_border->far_right = deskew_num - 1;
+
+		return;
+	}
+
+	for (dqs = 0; dqs < BYTE_NUM; dqs++) {
+		if ((byte_en & BIT(dqs)) == 0)
+			continue;
 
-	deskew_step = deskew_num <= PRINT_RANGE_MAX ?
-		      1 : deskew_num / PRINT_RANGE_MAX;
+		for (dq = 0; dq < 8; dq++) {
+			if (result->dqs[dqs].dq_min[dq] < far_left)
+				far_left = result->dqs[dqs].dq_min[dq];
+			if (result->dqs[dqs].dq_max[dq] > far_right)
+				far_right = result->dqs[dqs].dq_max[dq];
+		}
+	}
+
+	if (far_right - far_left + 1 > PRINT_RANGE) {
+		print_border->far_left = far_left & ~((u16)(PRINT_STEP * 4 - 1));
+		print_border->far_right = far_right | (PRINT_STEP * 4 - 1);
+	} else {
+		mid = (far_left + far_right) / 2;
+		if (mid < PRINT_RANGE / 2) {
+			print_border->far_left = 0;
+			print_border->far_right = PRINT_RANGE - 1;
+		} else if (mid > deskew_num - PRINT_RANGE / 2) {
+			print_border->far_left = deskew_num - PRINT_RANGE;
+			print_border->far_right = deskew_num - 1;
+		} else {
+			print_border->far_left = mid - PRINT_RANGE / 2;
+			print_border->far_right = mid + PRINT_RANGE / 2 - 1;
+		}
+	}
+}
+
+static void print_title_bar(struct print_border *print_border)
+{
+	int i;
 
 	printf("     ");
-	for (i = 0; i < deskew_num; i += deskew_step * 4)
+	for (i = print_border->far_left; i < print_border->far_right;
+	     i += PRINT_STEP * 4)
 		printf("%-4d", i);
 	printf("	Margin_L Sample Margin_R Width    DQS\n");
 }
 
 static void print_ddr_dq_eye(struct fsp_rw_trn_result *fsp_result, u8 cs,
-			     u8 byte_en, u16 width_ref, u16 deskew_num)
+			     u8 byte_en, u16 width_ref,
+			     struct print_border *print_border)
 {
 	u16 sample;
 	u16 min;
@@ -45,7 +98,6 @@ static void print_ddr_dq_eye(struct fsp_rw_trn_result *fsp_result, u8 cs,
 	u8 dqs;
 	u8 dq;
 	int i;
-	u16 deskew_step;
 	struct cs_rw_trn_result *result = &fsp_result->cs[cs];
 
 	for (dqs = 0; dqs < BYTE_NUM; dqs++) {
@@ -58,15 +110,14 @@ static void print_ddr_dq_eye(struct fsp_rw_trn_result *fsp_result, u8 cs,
 			min = result->dqs[dqs].dq_min[dq];
 			max = result->dqs[dqs].dq_max[dq];
 			dq_eye_width = max >= min ? max - min + 1 : 0;
-			deskew_step = deskew_num <= PRINT_RANGE_MAX ?
-				      1 : deskew_num / PRINT_RANGE_MAX;
 
 			printf("DQ%-2d ", dqs * 8 + dq);
-			for (i = 0; i < deskew_num / deskew_step; i++) {
-				if (i == sample / deskew_step)
+			for (i = print_border->far_left;
+			     i < print_border->far_right; i += PRINT_STEP) {
+				if (i / PRINT_STEP == sample / PRINT_STEP)
 					printf("|");
-				else if (i >= min / deskew_step &&
-					 i <= max / deskew_step)
+				else if (i / PRINT_STEP >= min / PRINT_STEP &&
+					 i / PRINT_STEP <= max / PRINT_STEP)
 					printf("*");
 				else
 					printf("-");
@@ -129,7 +180,7 @@ static int do_ddr_dq_eye(cmd_tbl_t *cmdtp, int flag, int argc,
 	u8 fsp = 0;
 	u8 cs;
 	int i;
-	//struct print_range print_range;
+	struct print_border print_border;
 
 	printf("Rockchip DDR DQ Eye Tool v" __version__ "\n");
 
@@ -249,19 +300,23 @@ static int do_ddr_dq_eye(cmd_tbl_t *cmdtp, int flag, int argc,
 	printf("\n");
 
 	for (cs = 0; cs < result.cs_num; cs++) {
+		calc_print_border(&result.rd_fsp[fsp].cs[cs], result.byte_en,
+				  RD_DESKEW_NUM, &print_border);
 		printf("CS%d %dMHz read DQ eye:\n", cs, result.fsp_mhz[fsp]);
-		print_title_bar(RD_DESKEW_NUM);
+		print_title_bar(&print_border);
 		print_ddr_dq_eye(&result.rd_fsp[fsp], cs, result.byte_en,
-				 rd_width_ref, RD_DESKEW_NUM);
+				 rd_width_ref, &print_border);
 		cs_eye_width = cs_eye_width_min(&result.rd_fsp[fsp].cs[cs],
 						result.byte_en, RD_DESKEW_NUM);
 		if (rd_width > cs_eye_width)
 			rd_width = cs_eye_width;
 
 		printf("CS%d %dMHz write DQ eye:\n", cs, result.fsp_mhz[fsp]);
-		print_title_bar(WR_DESKEW_NUM);
+		calc_print_border(&result.wr_fsp[fsp].cs[cs], result.byte_en,
+				  WR_DESKEW_NUM, &print_border);
+		print_title_bar(&print_border);
 		print_ddr_dq_eye(&result.wr_fsp[fsp], cs, result.byte_en,
-				 wr_width_ref, WR_DESKEW_NUM);
+				 wr_width_ref, &print_border);
 		cs_eye_width = cs_eye_width_min(&result.wr_fsp[fsp].cs[cs],
 						result.byte_en, WR_DESKEW_NUM);
 		if (wr_width > cs_eye_width)

commit 5dfbc8c546b33851a93e075cdfffef9973b94709
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 20 14:29:11 2021 +0800

    make.sh: remove host pyelftools check
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I80a92e3af27272a2cd1e7c7a8428f7bd1ebecd58

diff --git a/make.sh b/make.sh
index 0ab213c566..b6d2d452ad 100755
--- a/make.sh
+++ b/make.sh
@@ -757,13 +757,6 @@ function pack_fit_image()
 		exit 1
 	fi
 
-	if [ "${ARM64_TRUSTZONE}" == "y" ]; then
-		if ! python -c "import elftools" ; then
-			echo "ERROR: No python 'pyelftools', please: pip install pyelftools"
-			exit 1
-		fi
-	fi
-
 	# If we don't plan to have uboot in uboot.img in case of: SPL => Trust => Kernel, creating empty files.
 	if [ "${ARG_NO_UBOOT}" == "y" ]; then
 		rm u-boot-nodtb.bin u-boot.dtb -f
@@ -773,14 +766,6 @@ function pack_fit_image()
 	rm uboot.img trust*.img -rf
 	${SCRIPT_FIT} ${ARG_LIST_FIT} --chip ${RKCHIP_LABEL}
 
-	if [ "${ARM64_TRUSTZONE}" == "y" ]; then
-		if ! fdtget -l uboot.img /images/atf-1 >/dev/null 2>&1 ; then
-			echo -e "\nERROR: Invalid uboot.img, please install: \"pip install pyelftools\""
-			echo
-			exit 1
-		fi
-	fi
-
 	rm ${REP_DIR} -rf
 	echo "pack uboot.img okay! Input: ${INI_TRUST}"
 }

commit 59a90a33e7b7350cad1e878d85c938c7d1d186e2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 20 14:27:27 2021 +0800

    rockchip: decode_bl31.py: Eliminate pyelftools dependency
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I9f0e9101258e1abb8d75e540e8f1b354907fedc4

diff --git a/arch/arm/mach-rockchip/decode_bl31.py b/arch/arm/mach-rockchip/decode_bl31.py
index 45806f3885..301bd15375 100755
--- a/arch/arm/mach-rockchip/decode_bl31.py
+++ b/arch/arm/mach-rockchip/decode_bl31.py
@@ -8,23 +8,37 @@
 A script to decode bl31.elf to binary
 """
 
-# pip install pyelftools
-from elftools.elf.elffile import ELFFile
+import os
+import sys
+import getopt
+import logging
+import struct
 
-ELF_SEG_P_TYPE='p_type'
-ELF_SEG_P_PADDR='p_paddr'
+def unpack_elf(filename):
+    with open(filename, 'rb') as file:
+        elf = file.read()
+    if elf[0:7] != b'\x7fELF\x02\x01\x01' or elf[18:20] != b'\xb7\x00':
+        raise ValueError("Invalid arm64 ELF file '%s'" % filename)
+
+    e_entry, e_phoff = struct.unpack_from('<2Q', elf, 0x18)
+    e_phentsize, e_phnum = struct.unpack_from('<2H', elf, 0x36)
+    segments = []
+
+    for index in range(e_phnum):
+        offset = e_phoff + e_phentsize * index
+        p_type, p_flags, p_offset = struct.unpack_from('<LLQ', elf, offset)
+        if p_type == 1: # PT_LOAD
+            p_paddr, p_filesz = struct.unpack_from('<2Q', elf, offset + 0x18)
+            if p_filesz > 0:
+                p_data = elf[p_offset:p_offset + p_filesz]
+                segments.append((index, e_entry, p_paddr, p_data))
+    return segments
 
 def generate_atf_binary(bl31_file_name):
-    with open(bl31_file_name) as bl31_file:
-        bl31 = ELFFile(bl31_file)
-        num = bl31.num_segments()
-        for i in range(num):
-            seg = bl31.get_segment(i)
-            if ('PT_LOAD' == seg.__getitem__(ELF_SEG_P_TYPE)):
-                paddr = seg.__getitem__(ELF_SEG_P_PADDR)
-                file_name = 'bl31_0x%08x.bin' % paddr
-                with open(file_name, "wb") as atf:
-                    atf.write(seg.data());
+    for index, entry, paddr, data in unpack_elf(bl31_file_name):
+        file_name = 'bl31_0x%08x.bin' % paddr
+        with open(file_name, "wb") as atf:
+            atf.write(data)
 
 def main():
     bl31_elf="./bl31.elf"

commit 84da59db7e6eeee02e121a9bd98aecbf7d709e33
Author: Tony Xu <tony.xu@rock-chips.com>
Date:   Mon Apr 19 14:08:20 2021 +0800

    configs: rk3568: support write keybox
    
    Signed-off-by: Tony Xu <tony.xu@rock-chips.com>
    Change-Id: Ie64294152ad6bf365e0f7a33c1e71ea8172b2963

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index b3b36ac9e7..16f71c50a7 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -29,9 +29,9 @@ CONFIG_BOOTDELAY=0
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
-# CONFIG_ANDROID_WRITE_KEYBOX is not set
+CONFIG_ANDROID_WRITE_KEYBOX=y
 CONFIG_ANDROID_AVB=y
-# CONFIG_ANDROID_KEYMASTER_CA is not set
+CONFIG_ANDROID_KEYMASTER_CA=y
 CONFIG_ANDROID_BOOT_IMAGE_HASH=y
 CONFIG_SPL_BOARD_INIT=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set

commit 6230e224c58a87faad6939b906edc7d042109e70
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Apr 15 15:39:59 2021 +0800

    cmd: rkimgtest: add new idb block head format support
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I6bfe98a0fc36ea209d0de4098c751ebc6ea17119

diff --git a/cmd/rkimgtest.c b/cmd/rkimgtest.c
index 0e6fe3d171..ee67568480 100644
--- a/cmd/rkimgtest.c
+++ b/cmd/rkimgtest.c
@@ -47,6 +47,9 @@ static int do_rkimg_test(cmd_tbl_t *cmdtp, int flag,
 			else
 				env_update("bootargs", "usbfwupdate");
 		}
+	} else if (buffer[0] == 0x534e4b52 || buffer[0] == 0x534e5252) {
+		/* The 0x534e4b52 & 0x534e5252 are the new idb block header tag */
+		ret = CMD_RET_SUCCESS;
 	} else {
 		ret = CMD_RET_FAILURE;
 	}

commit 1d2b091964d0e9eeba3aa940dd72b864c8c15a45
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Apr 15 20:47:40 2021 +0800

    rockchip: boot-mode: add sdfwupdate/usbfwupdate to bootargs
    
    Adding sdfwupdate/usbfwupdate to bootargs depends on the android bcb of recovery
    which is "recovery\n--rk_fwupdate\n".
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I28d065e29b02b5116e82e6445801c47b28a4e8ba

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index 9b87d00316..875e53d0e6 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -38,10 +38,20 @@ static int misc_require_recovery(u32 bcb_offset)
 
 	cnt = DIV_ROUND_UP(sizeof(struct bootloader_message), dev_desc->blksz);
 	bmsg = memalign(ARCH_DMA_MINALIGN, cnt * dev_desc->blksz);
-	if (blk_dread(dev_desc, part.start + bcb_offset, cnt, bmsg) != cnt)
+	if (blk_dread(dev_desc, part.start + bcb_offset, cnt, bmsg) != cnt) {
 		recovery = 0;
-	else
+	} else {
 		recovery = !strcmp(bmsg->command, "boot-recovery");
+		if ((dev_desc->if_type == IF_TYPE_MMC && dev_desc->devnum == 1) ||
+		    (dev_desc->if_type == IF_TYPE_USB && dev_desc->devnum == 0)) {
+			if (!strcmp(bmsg->recovery, "recovery\n--rk_fwupdate\n")) {
+				if (dev_desc->if_type == IF_TYPE_MMC)
+					env_update("bootargs", "sdfwupdate");
+				else if (dev_desc->if_type == IF_TYPE_USB)
+					env_update("bootargs", "usbfwupdate");
+			}
+		}
+	}
 
 	free(bmsg);
 out:

commit 65a0fed902af9c8a775eb157525e104a936be5b9
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed Apr 14 12:01:32 2021 +0800

    drivers: rockusb: Support new spinor IDB layout
    
    1.Related to RK356x/RV1126/RK3308 spinor mtd block case
    2.After RK356x, spinor IDB place in 128KB~1MB
    2.Before RK356x, spinor IDB place in 32KB + 512KB * n(n=0,1,2,3,4)
    
    Change-Id: I06d9245b80f5334d0609573e750b3e2abd89c039
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index b5dd7ece06..1141dc51b0 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -242,6 +242,15 @@ static int rkusb_do_read_flash_info(struct fsg_common *common,
 		}
 	}
 
+	if (desc->if_type == IF_TYPE_MTD && desc->devnum == BLK_MTD_SPI_NOR) {
+		/* RV1126/RK3308 mtd spinor keep the former upgrade mode */
+#if !defined(CONFIG_ROCKCHIP_RV1126) && !defined(CONFIG_ROCKCHIP_RK3308)
+		finfo.block_size = 0x100; /* Aligned to 128KB */
+#else
+		finfo.block_size = ROCKCHIP_FLASH_BLOCK_SIZE;
+#endif
+	}
+
 	debug("Flash info: block_size= %x page_size= %x\n", finfo.block_size,
 	      finfo.page_size);
 
@@ -568,6 +577,11 @@ static int rkusb_do_read_capacity(struct fsg_common *common,
 	    devnum == BLK_MTD_SPI_NAND))
 		buf[0] |= (1 << 6);
 
+#if !defined(CONFIG_ROCKCHIP_RV1126) && !defined(CONFIG_ROCKCHIP_RK3308)
+	if (type == IF_TYPE_MTD && devnum == BLK_MTD_SPI_NOR)
+		buf[0] |= (1 << 6);
+#endif
+
 #if defined(CONFIG_ROCKCHIP_RK3568)
 	buf[1] = BIT(0);
 #endif

commit cc0876a813fd31a8ff5fa42d3f96b57e946c1040
Author: Weiwen Chen <cww@rock-chips.com>
Date:   Thu Apr 15 17:37:50 2021 +0800

    mtd: mtd_blk: support A/B system boot with squashfs
    
    Signed-off-by: Weiwen Chen <cww@rock-chips.com>
    Change-Id: Ifc87bcdef427c0fd8b6b4fe353f4301105ed7aab

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index 117d479f0e..028dc14599 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -22,7 +22,8 @@
 
 #define MTD_PART_NAND_HEAD		"mtdparts="
 #define MTD_ROOT_PART_NUM		"ubi.mtd="
-#define MTD_ROOT_PART_NAME		"root=ubi0:rootfs"
+#define MTD_ROOT_PART_NAME_UBIFS	"root=ubi0:rootfs"
+#define MTD_ROOT_PART_NAME_SQUASHFS	"root=/dev/ubiblock0_0"
 #define MTD_PART_INFO_MAX_SIZE		512
 #define MTD_SINGLE_PART_INFO_MAX_SIZE	40
 
@@ -353,7 +354,7 @@ char *mtd_part_parse(void)
 {
 	char mtd_part_info_temp[MTD_SINGLE_PART_INFO_MAX_SIZE] = {0};
 	u32 length, data_len = MTD_PART_INFO_MAX_SIZE;
-	char mtd_root_part_info[30] = {0};
+	char mtd_root_part_info[40] = {0};
 	struct blk_desc *dev_desc;
 	disk_partition_t info;
 	char *mtd_part_info_p;
@@ -372,7 +373,12 @@ char *mtd_part_parse(void)
 
 	p = part_get_info_by_name(dev_desc, PART_SYSTEM, &info);
 	if (p > 0) {
-		snprintf(mtd_root_part_info, 30, "%s%d %s", MTD_ROOT_PART_NUM, p - 1, MTD_ROOT_PART_NAME);
+		if (strstr(env_get("bootargs"), "rootfstype=squashfs"))
+			snprintf(mtd_root_part_info, ARRAY_SIZE(mtd_root_part_info), "%s%d %s",
+				 MTD_ROOT_PART_NUM, p - 1, MTD_ROOT_PART_NAME_SQUASHFS);
+		else
+			snprintf(mtd_root_part_info, ARRAY_SIZE(mtd_root_part_info), "%s%d %s",
+				 MTD_ROOT_PART_NUM, p - 1, MTD_ROOT_PART_NAME_UBIFS);
 		env_update("bootargs", mtd_root_part_info);
 	}
 

commit ec5fec8d9a71066c2363e9f25b5d7e592c2b5407
Author: XiaoDong Huang <derrick.huang@rock-chips.com>
Date:   Wed Apr 14 19:26:53 2021 +0800

    scmi: smt: fix error of get smt buffer
    
    1. Don't translate resource.start.
    2. Use 4k-aligned address to config smt_buffer's mmu region.
    
    Change-Id: I15f4aa6dfbe05ae1a424132cd1c8b3a5e28b7a06
    Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>

diff --git a/drivers/firmware/scmi/smt.c b/drivers/firmware/scmi/smt.c
index fd77df574f..ee4bdf3315 100644
--- a/drivers/firmware/scmi/smt.c
+++ b/drivers/firmware/scmi/smt.c
@@ -26,7 +26,6 @@ int scmi_dt_get_smt_buffer(struct udevice *dev, struct scmi_smt *smt)
 	int ret;
 	struct ofnode_phandle_args args;
 	struct resource resource;
-	fdt32_t faddr;
 	phys_addr_t paddr;
 
 	ret = dev_read_phandle_with_args(dev, "shmem", NULL, 0, 0, &args);
@@ -37,9 +36,7 @@ int scmi_dt_get_smt_buffer(struct udevice *dev, struct scmi_smt *smt)
 	if (ret)
 		return ret;
 
-	faddr = cpu_to_fdt32(resource.start);
-	paddr = ofnode_translate_address(args.node, &faddr);
-
+	paddr = resource.start;
 	smt->size = resource_size(&resource);
 	if (smt->size < sizeof(struct scmi_smt_header)) {
 		dev_err(dev, "Shared memory buffer too small\n");
@@ -52,8 +49,9 @@ int scmi_dt_get_smt_buffer(struct udevice *dev, struct scmi_smt *smt)
 
 #ifdef CONFIG_ARM
 	if (dcache_status())
-		mmu_set_region_dcache_behaviour((uintptr_t)smt->buf,
-						smt->size, DCACHE_OFF);
+		mmu_set_region_dcache_behaviour(round_down((ulong)smt->buf, SZ_4K),
+						round_up((ulong)smt->size, SZ_4K),
+						DCACHE_OFF);
 #endif
 
 	return 0;

commit f0f5d8434c26534697879fc218c0b790134afa27
Author: XiaoDong Huang <derrick.huang@rock-chips.com>
Date:   Wed Apr 14 19:19:05 2021 +0800

    scmi: fix struct scmi_clk_rate_set_in define error
    
    According to the protocol of SCMI, struct scmi_clk_rate_set_in
    should be as follows:
    struct scmi_clk_rate_set_in {
            u32 flags;
            u32 clock_id;
            u32 rate_lsb;
            u32 rate_msb;
    };
    
    Change-Id: I89955c13887034f5308dac2baa6b6bd53132c5ef
    Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>

diff --git a/include/scmi_protocols.h b/include/scmi_protocols.h
index ccab97c96c..f762d6a3d9 100644
--- a/include/scmi_protocols.h
+++ b/include/scmi_protocols.h
@@ -102,8 +102,8 @@ struct scmi_clk_rate_get_out {
  * @rate_msb:	32bit MSB of the clock rate in Hertz
  */
 struct scmi_clk_rate_set_in {
-	u32 clock_id;
 	u32 flags;
+	u32 clock_id;
 	u32 rate_lsb;
 	u32 rate_msb;
 };

commit 5120375c5f84292fe265e5d86d713a355d4c1694
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 12 21:19:04 2021 +0800

    dm: firmware: bind "firmware" into DM
    
    There is no compatible property in "/firmware", let's
    bind it by default.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ib00c097e51da3f77206e351ea9e2519433d1c1ec

diff --git a/drivers/core/root.c b/drivers/core/root.c
index 0e3562f908..ac18f3c4d8 100644
--- a/drivers/core/root.c
+++ b/drivers/core/root.c
@@ -240,6 +240,10 @@ static int dm_scan_fdt_live(struct udevice *parent,
 			ret = err;
 			debug("%s: ret=%d\n", np->name, ret);
 		}
+
+		if (!pre_reloc_only && !strcmp(np->name, "firmware"))
+			ret = device_bind_driver_to_node(gd->dm_root,
+				"firmware", np->name, np_to_ofnode(np), NULL);
 	}
 
 	if (ret)
diff --git a/drivers/firmware/firmware-uclass.c b/drivers/firmware/firmware-uclass.c
index af781b5b69..ef1e098257 100644
--- a/drivers/firmware/firmware-uclass.c
+++ b/drivers/firmware/firmware-uclass.c
@@ -10,3 +10,11 @@ UCLASS_DRIVER(firmware) = {
 	.id		= UCLASS_FIRMWARE,
 	.name		= "firmware",
 };
+
+U_BOOT_DRIVER(firmware) = {
+	.name	= "firmware",
+	.id	= UCLASS_FIRMWARE,
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	.bind = dm_scan_fdt_dev,
+#endif
+};

commit a9bd1c7342d0a84e6b647c88ad85fecea35febaa
Author: Mario Six <mario.six@gdsys.cc>
Date:   Mon Jan 15 11:07:19 2018 +0100

    UPSTREAM: core: Add {ofnode, dev}_translate_address functions
    
    Change-Id: I7f33518fbc84db70c28d4d634acbb370cb9bd886
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Mario Six <mario.six@gdsys.cc>
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    (cherry picked from commit 147c6074482ed57fe43348ce15fc3dbc3e2c9db7)

diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index 992dd573a2..fe98b2e472 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -702,3 +702,11 @@ int ofnode_read_resource_byname(ofnode node, const char *name,
 
 	return ofnode_read_resource(node, index, res);
 }
+
+u64 ofnode_translate_address(ofnode node, const fdt32_t *in_addr)
+{
+	if (ofnode_is_np(node))
+		return of_translate_address(ofnode_to_np(node), in_addr);
+	else
+		return fdt_translate_address(gd->fdt_blob, ofnode_to_offset(node), in_addr);
+}
diff --git a/drivers/core/read.c b/drivers/core/read.c
index 2692113853..5b8acf14f6 100644
--- a/drivers/core/read.c
+++ b/drivers/core/read.c
@@ -215,3 +215,8 @@ int dev_read_resource_byname(struct udevice *dev, const char *name,
 {
 	return ofnode_read_resource_byname(dev_ofnode(dev), name, res);
 }
+
+u64 dev_translate_address(struct udevice *dev, const fdt32_t *in_addr)
+{
+	return ofnode_translate_address(dev_ofnode(dev), in_addr);
+}
diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index 8a4291a6ad..e3e1d1399c 100644
--- a/include/dm/ofnode.h
+++ b/include/dm/ofnode.h
@@ -691,4 +691,17 @@ int ofnode_read_resource_byname(ofnode node, const char *name,
 	     ofnode_valid(node); \
 	     node = ofnode_next_subnode(node))
 
+/**
+ * ofnode_translate_address() - Tranlate a device-tree address
+ *
+ * Translate an address from the device-tree into a CPU physical address. This
+ * function walks up the tree and applies the various bus mappings along the
+ * way.
+ *
+ * @ofnode: Device tree node giving the context in which to translate the
+ *          address
+ * @in_addr: pointer to the address to translate
+ * @return the translated address; OF_BAD_ADDR on error
+ */
+u64 ofnode_translate_address(ofnode node, const fdt32_t *in_addr);
 #endif
diff --git a/include/dm/read.h b/include/dm/read.h
index 0a78d04815..90f086568d 100644
--- a/include/dm/read.h
+++ b/include/dm/read.h
@@ -439,6 +439,18 @@ int dev_read_resource(struct udevice *dev, uint index, struct resource *res);
 int dev_read_resource_byname(struct udevice *dev, const char *name,
 			     struct resource *res);
 
+/**
+ * dev_translate_address() - Tranlate a device-tree address
+ *
+ * Translate an address from the device-tree into a CPU physical address.  This
+ * function walks up the tree and applies the various bus mappings along the
+ * way.
+ *
+ * @dev: device giving the context in which to translate the address
+ * @in_addr: pointer to the address to translate
+ * @return the translated address; OF_BAD_ADDR on error
+ */
+u64 dev_translate_address(struct udevice *dev, const fdt32_t *in_addr);
 #else /* CONFIG_DM_DEV_READ_INLINE is enabled */
 
 static inline int dev_read_u32_default(struct udevice *dev,
@@ -615,6 +627,11 @@ static inline int dev_read_resource_byname(struct udevice *dev,
 	return ofnode_read_resource_byname(dev_ofnode(dev), name, res);
 }
 
+static inline u64 dev_translate_address(struct udevice *dev, const fdt32_t *in_addr)
+{
+	return ofnode_translate_address(dev_ofnode(dev), in_addr);
+}
+
 #endif /* CONFIG_DM_DEV_READ_INLINE */
 
 /**

commit 95a919af73af99e2b07960ba1b811a884ecfe395
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 12 14:41:11 2021 +0800

    firmware: scmi: fix compile error after backport
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I603faeb2a13a45a324ba5b0880d3c2cf6ae3770e

diff --git a/drivers/firmware/scmi/scmi_agent-uclass.c b/drivers/firmware/scmi/scmi_agent-uclass.c
index 7dc533149b..7d35bee958 100644
--- a/drivers/firmware/scmi/scmi_agent-uclass.c
+++ b/drivers/firmware/scmi/scmi_agent-uclass.c
@@ -5,7 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
-#include <dm/device_compat.h>
+#include <dm/device.h>
 #include <errno.h>
 #include <scmi_agent-uclass.h>
 #include <scmi_protocols.h>
@@ -89,12 +89,13 @@ static int scmi_bind_protocols(struct udevice *dev)
 			continue;
 		}
 
-		ret = device_bind_ofnode(dev, drv, ofnode_get_name(node),
-					 NULL, node, NULL);
+		ret = device_bind(dev, drv, ofnode_get_name(node), NULL,
+				  ofnode_to_offset(node), NULL);
 		if (ret)
 			break;
 	}
 
+
 	return ret;
 }
 
diff --git a/drivers/firmware/scmi/smccc_agent.c b/drivers/firmware/scmi/smccc_agent.c
index 85dbf9195e..582ead5496 100644
--- a/drivers/firmware/scmi/smccc_agent.c
+++ b/drivers/firmware/scmi/smccc_agent.c
@@ -8,8 +8,8 @@
 #include <errno.h>
 #include <scmi_agent.h>
 #include <scmi_agent-uclass.h>
-#include <dm/devres.h>
 #include <dm/device-internal.h>
+#include <dm/read.h>
 #include <linux/arm-smccc.h>
 #include <linux/compat.h>
 
@@ -54,7 +54,8 @@ static int scmi_smccc_probe(struct udevice *dev)
 	u32 func_id;
 	int ret;
 
-	if (dev_read_u32(dev, "arm,smc-id", &func_id)) {
+	func_id = dev_read_u32_default(dev, "arm,smc-id", -ENODATA);
+	if (func_id == -ENODATA) {
 		dev_err(dev, "Missing property func-id\n");
 		return -EINVAL;
 	}
diff --git a/drivers/firmware/scmi/smt.c b/drivers/firmware/scmi/smt.c
index d25478796a..fd77df574f 100644
--- a/drivers/firmware/scmi/smt.c
+++ b/drivers/firmware/scmi/smt.c
@@ -5,9 +5,7 @@
  */
 
 #include <common.h>
-#include <cpu_func.h>
 #include <dm.h>
-#include <dm/device_compat.h>
 #include <errno.h>
 #include <scmi_agent.h>
 #include <asm/cache.h>

commit 6bd8fca8f9608e3beb30d8095639491808d39443
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed Mar 31 09:48:00 2021 +0800

    spi: rockchip_sfc: Optimization method of DLL tuning
    
    According to the actual test window is usually large and in the
    middle.
    
    Change-Id: I77ba78276c021efbe1cd56c26f17b49abc6ac073
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/spi/rockchip_sfc.c b/drivers/spi/rockchip_sfc.c
index 82767b59cd..cc93e6afe9 100644
--- a/drivers/spi/rockchip_sfc.c
+++ b/drivers/spi/rockchip_sfc.c
@@ -718,7 +718,7 @@ static int rockchip_sfc_set_speed(struct udevice *bus, uint speed)
 		clk_set_rate(&sfc->clk, sfc->speed_hz);
 		sfc->speed_hz = clk_get_rate(&sfc->clk);
 		if (sfc->speed_hz > SFC_DLL_THRESHOLD_RATE) {
-			for (right = 0; right <= sfc->max_dll_cells; right++) {
+			for (right = 10; right <= sfc->max_dll_cells; right += 10) {
 				rockchip_sfc_set_delay_lines(sfc, right);
 				rockchip_sfc_read(sfc, 0, (void *)&id_temp, 3);
 				SFC_DBG("sfc dll %d id= %x %x %x\n", right,
@@ -729,7 +729,7 @@ static int rockchip_sfc_set_speed(struct udevice *bus, uint speed)
 					break;
 			}
 
-			if (left >= 0 && (right - left > 10)) {
+			if (left >= 0 && (right - left > 50)) {
 				rockchip_sfc_set_delay_lines(sfc, (u32)((right + left) / 2));
 			} else {
 				rockchip_sfc_disable_delay_lines(sfc);

commit a1f6fc00a03ae255aefc9170884a5086b29d3fa5
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue Apr 13 09:44:25 2021 +0800

    rockchip: rk3568: Modify fspi pins property
    
    Set all data pins level 2
    
    Change-Id: Ifbaca47c54a54c9003fb2206fb2ee12426efc671
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c
index 78d309e8a2..6e9807ac23 100644
--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
@@ -30,6 +30,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define GRF_GPIO1C_DS_3		0x22c
 #define GRF_GPIO1D_DS_0		0x230
 #define GRF_GPIO1D_DS_1		0x234
+#define GRF_GPIO1D_DS_2		0x238
 #define GRF_SOC_CON4		0x510
 #define EDP_PHY_GRF_BASE	0xfdcb0000
 #define EDP_PHY_GRF_CON0	(EDP_PHY_GRF_BASE + 0x00)
@@ -850,11 +851,13 @@ int arch_cpu_init(void)
 #endif
 
 #ifndef CONFIG_TPL_BUILD
-	/* set the fspi d0 cs0 to level 1 */
+	/* set the fspi d0~3 cs0 to level 2 */
 	if (get_bootdev_by_brom_bootsource() == BOOT_TYPE_SPI_NOR ||
 	    get_bootdev_by_brom_bootsource() == BOOT_TYPE_SPI_NAND) {
-		writel(0x3f000300, GRF_BASE + GRF_GPIO1D_DS_0);
-		writel(0x3f000300, GRF_BASE + GRF_GPIO1D_DS_1);
+		writel(0x3f000700, GRF_BASE + GRF_GPIO1C_DS_3);
+		writel(0x3f000700, GRF_BASE + GRF_GPIO1D_DS_0);
+		writel(0x3f3f0707, GRF_BASE + GRF_GPIO1D_DS_1);
+		writel(0x003f0007, GRF_BASE + GRF_GPIO1D_DS_2);
 	}
 #endif
 

commit 2a0b9372577646701ccd8873bdf4de4fc935cee3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 12 10:50:12 2021 +0800

    make.sh: support sign loader for rv1126/rv1109/rk356x
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I3820c25b2208ba57544156f49a17853555e2f382

diff --git a/make.sh b/make.sh
index d30d9816d9..0ab213c566 100755
--- a/make.sh
+++ b/make.sh
@@ -771,7 +771,7 @@ function pack_fit_image()
 	fi
 
 	rm uboot.img trust*.img -rf
-	${SCRIPT_FIT} ${ARG_LIST_FIT}
+	${SCRIPT_FIT} ${ARG_LIST_FIT} --chip ${RKCHIP_LABEL}
 
 	if [ "${ARM64_TRUSTZONE}" == "y" ]; then
 		if ! fdtget -l uboot.img /images/atf-1 >/dev/null 2>&1 ; then
diff --git a/scripts/fit.sh b/scripts/fit.sh
index 9e857c31ec..a9e00c970f 100755
--- a/scripts/fit.sh
+++ b/scripts/fit.sh
@@ -27,6 +27,7 @@ KERNEL_ADDR_PLACEHOLDER="0xffffff01"
 RAMDISK_ADDR_PLACEHOLDER="0xffffff02"
 # tools
 MKIMAGE="./tools/mkimage"
+RK_SIGN_TOOL="../rkbin/tools/rk_sign_tool"
 FIT_UNPACK="./scripts/fit-unpack.sh"
 CHECK_SIGN="./tools/fit_check_sign"
 # key
@@ -100,7 +101,7 @@ function validate_arg()
 		--no-check|--spl-new|--burn-key-hash)
 			shift=1
 			;;
-		--ini-trust|--ini-loader|--rollback-index-boot|--rollback-index-recovery|--rollback-index-uboot|--boot_img|--recovery_img|--version-uboot|--version-boot|--version-recovery)
+		--ini-trust|--ini-loader|--rollback-index-boot|--rollback-index-recovery|--rollback-index-uboot|--boot_img|--recovery_img|--version-uboot|--version-boot|--version-recovery|--chip)
 			shift=2
 			;;
 		*)
@@ -127,6 +128,10 @@ function fit_process_args()
 				ARG_BOOT_IMG=$2
 				shift 2
 				;;
+			--chip)
+				ARG_CHIP=$2
+				shift 2
+				;;
 			--recovery_img) # recovery.img
 				ARG_RECOVERY_IMG=$2
 				shift 2
@@ -573,6 +578,14 @@ function fit_gen_recovery_img()
 	fi
 }
 
+function fit_gen_loader()
+{
+	if grep -Eq '^CONFIG_FIT_SIGNATURE=y' .config ; then
+		${RK_SIGN_TOOL} cc --chip ${ARG_CHIP: 2: 6}
+		${RK_SIGN_TOOL} sl --key ./keys/dev.key --pubkey ./keys/dev.pubkey --loader *_loader_*.bin
+	fi
+}
+
 function fit_msg_uboot()
 {
 	if [ "${ARG_SIGN}" != "y" ]; then
@@ -644,7 +657,12 @@ function fit_msg_recovery()
 function fit_msg_loader()
 {
 	LOADER=`ls *loader*.bin`
-	echo "Image(no-signed):  ${LOADER} (with spl, ddr, usbplug) is ready"
+
+	if grep -q '^CONFIG_FIT_SIGNATURE=y' .config ; then
+		echo "Image(signed):  ${LOADER} (with spl, ddr, usbplug) is ready"
+	else
+		echo "Image(no-signed):  ${LOADER} (with spl, ddr, usbplug) is ready"
+	fi
 }
 
 fit_process_args $*
@@ -664,6 +682,7 @@ else
 	fi
 	fit_gen_uboot_itb
 	fit_gen_uboot_img
+	fit_gen_loader
 
 	echo
 	fit_msg_uboot

commit 6a1c1afad421f332b7af22a5f5422d76e777ad09
Author: Shunqing Chen <csq@rock-chips.com>
Date:   Thu Apr 8 16:56:43 2021 +0800

    fuel gauge: rk817: check if battery is exist
    
    Signed-off-by: Shunqing Chen <csq@rock-chips.com>
    Change-Id: I6778e6725dc0231a46942d7226abecb98ef71bb8

diff --git a/drivers/power/fuel_gauge/fg_rk817.c b/drivers/power/fuel_gauge/fg_rk817.c
index 6cae993ee5..b5abb72a51 100644
--- a/drivers/power/fuel_gauge/fg_rk817.c
+++ b/drivers/power/fuel_gauge/fg_rk817.c
@@ -132,6 +132,7 @@ static int dbg_enable = 0;
 #define CUR_ADC_K2		0x00ae
 #define CUR_ADC_K1		0x00af
 #define CUR_ADC_K0		0x00b0
+#define PMIC_CHRG_STS		0x00eb
 #define BAT_DISCHRG		0x00ec
 #define BAT_CON			BIT(4)
 
@@ -1217,7 +1218,26 @@ static int rk817_bat_update_get_soc(struct udevice *dev)
 		return VIRTUAL_POWER_SOC;
 }
 
+static int rk817_is_bat_exist(struct rk817_battery_device *battery)
+{
+	struct rk8xx_priv *rk8xx = dev_get_priv(battery->dev->parent);
+
+	if (rk8xx->variant == RK817_ID)
+		return (rk817_bat_read(battery, PMIC_CHRG_STS) & 0x80) ? 1 : 0;
+
+	return 1;
+}
+
+static int rk817_bat_bat_is_exist(struct udevice *dev)
+{
+        struct rk817_battery_device *battery = dev_get_priv(dev);
+
+        return rk817_is_bat_exist(battery);
+}
+
+
 static struct dm_fuel_gauge_ops fg_ops = {
+	.bat_is_exist = rk817_bat_bat_is_exist,
 	.get_soc = rk817_bat_update_get_soc,
 	.get_voltage = rk817_bat_update_get_voltage,
 	.get_current = rk817_bat_update_get_current,
@@ -1274,6 +1294,10 @@ static int rk817_fg_ofdata_to_platdata(struct udevice *dev)
 		return -EINVAL;
 	}
 
+	battery->virtual_power = dev_read_u32_default(dev, "virtual_power", 0);
+	if (!rk817_is_bat_exist(battery))
+		battery->virtual_power = 1;
+
 	if (rk8xx->variant == RK809_ID) {
 		battery->bat_res_up  = dev_read_u32_default(dev, "bat_res_up", -1);
 		if (battery->bat_res_up < 0) {

commit 4f14f98f36802bd99774f36118ee816cc84238d0
Author: Wenping Zhang <wenping.zhang@rock-chips.com>
Date:   Tue Apr 6 15:51:56 2021 +0800

    video/rk_eink: add ebook panel mirror support.
    
    Signed-off-by: Wenping Zhang <wenping.zhang@rock-chips.com>
    Change-Id: Id88680f766e752359adb6d0e60c9df62388f1955

diff --git a/drivers/video/rk_eink/rk_eink_display.c b/drivers/video/rk_eink/rk_eink_display.c
index 1a354eb280..3032ff879a 100644
--- a/drivers/video/rk_eink/rk_eink_display.c
+++ b/drivers/video/rk_eink/rk_eink_display.c
@@ -186,6 +186,7 @@ static u32 aligned_image_size_4k(struct udevice *dev)
  *  |---charge_4 logo   ---|
  *  |---charge_5 logo   ---|
  *  |---battery low logo---|
+ *  |---temp un-mirror buffer--|
  */
 static int get_addr_by_type(struct udevice *dev, u32 logo_type)
 {
@@ -215,6 +216,11 @@ static int get_addr_by_type(struct udevice *dev, u32 logo_type)
 	case EINK_LOGO_CHARGING_4:
 	case EINK_LOGO_CHARGING_5:
 	case EINK_LOGO_CHARGING_LOWPOWER:
+	/*
+	 * The MIRROR_TEMP_BUF is used to save the
+	 * non-mirror image data.
+	 */
+	case EINK_LOGO_UNMIRROR_TEMP_BUF:
 		return (plat->disp_pbuf + offset);
 	default:
 		printf("invalid logo type[%d]\n", logo_type);
@@ -274,6 +280,26 @@ static int read_grayscale(struct blk_desc *dev_desc,
 	return 0;
 }
 
+static int image_mirror(u8 *in_buf, u8 *out_buf, u16 w, u16 h)
+{
+	int i;
+
+	if (!in_buf || !out_buf) {
+		printf("mirror in buffer or out buffer is NULL\n");
+		return -EINVAL;
+	}
+
+	for (i = 0; i < h; i++) {
+		u16 column_len = w / 2;
+		u8 *column_in = in_buf + i * column_len;
+		u8 *column_out = out_buf + (h - i - 1) * column_len;
+
+		memcpy(column_out, column_in, column_len);
+	}
+
+	return 0;
+}
+
 /*
  * The eink kernel driver need last frame to do part refresh,
  * so we need to transfer two images to kernel, which is kernel
@@ -347,8 +373,30 @@ static int read_needed_logo_from_partition(struct udevice *dev,
 				printf("disp buffer is not dma aligned\n");
 				return -EINVAL;
 			}
-			read_grayscale(dev_desc, &part, offset, size,
-				       (void *)((ulong)pic_buf));
+			/*
+			 * kernel logo is transmitted to kernel to display, and
+			 * kernel will do the mirror operation, so skip kernel
+			 * logo here.
+			 */
+			if (panel->mirror && needed_logo != EINK_LOGO_KERNEL) {
+				u32 w = panel->vir_width;
+				u32 h = panel->vir_height;
+				u32 mirror_buf = 0;
+
+				mirror_buf = get_addr_by_type(dev,
+							      EINK_LOGO_UNMIRROR_TEMP_BUF);
+				if (mirror_buf <= 0) {
+					printf("get mirror buffer failed\n");
+					return -EIO;
+				}
+				read_grayscale(dev_desc, &part, offset, size,
+					       (void *)((ulong)mirror_buf));
+				image_mirror((u8 *)((ulong)mirror_buf),
+					     (u8 *)((ulong)pic_buf), w, h);
+			} else {
+				read_grayscale(dev_desc, &part, offset, size,
+					       (void *)((ulong)pic_buf));
+			}
 			flush_dcache_range((ulong)pic_buf,
 					   ALIGN((ulong)pic_buf + size,
 						 CONFIG_SYS_CACHELINE_SIZE));
@@ -563,9 +611,16 @@ static int rockchip_eink_show_logo(int cur_logo_type, int update_mode)
 	 */
 	if (cur_logo_type == EINK_LOGO_UBOOT) {
 		char logo_args[64] = {0};
-
-		printf("Transmit uboot logo addr(0x%x) to kernel\n", logo_addr);
-		sprintf(logo_args, "ulogo_addr=0x%x", logo_addr);
+		u32 uboot_logo_buf;
+
+		if (plat->mirror)
+			uboot_logo_buf = get_addr_by_type(dev,
+							  EINK_LOGO_UNMIRROR_TEMP_BUF);
+		else
+			uboot_logo_buf = logo_addr;
+		printf("Transmit uboot logo addr(0x%x) to kernel\n",
+		       uboot_logo_buf);
+		sprintf(logo_args, "ulogo_addr=0x%x", uboot_logo_buf);
 		env_update("bootargs", logo_args);
 		ret = read_needed_logo_from_partition(dev, EINK_LOGO_KERNEL,
 						      &loaded_logo);
diff --git a/include/rk_eink.h b/include/rk_eink.h
index 7bff50c0af..2720233f16 100644
--- a/include/rk_eink.h
+++ b/include/rk_eink.h
@@ -18,6 +18,7 @@ enum type_logo {
 	EINK_LOGO_CHARGING_4 = 1 << 6,
 	EINK_LOGO_CHARGING_5 = 1 << 7,
 	EINK_LOGO_CHARGING_LOWPOWER = 1 << 8,
+	EINK_LOGO_UNMIRROR_TEMP_BUF = 1 << 9,
 };
 
 enum update_mode {

commit 563d12f2d9258b1e0c807f04d3636f97c2c719da
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Fri Apr 9 14:23:21 2021 +0800

    clk: rockchip: rk3568: add uart clk
    
    Change-Id: I92a097e216e9cbb254c5bae5a25bc52f0c53cd38
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3568.h b/arch/arm/include/asm/arch-rockchip/cru_rk3568.h
index f09635d18e..07714ecfeb 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3568.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3568.h
@@ -399,6 +399,26 @@ enum {
 	CLK_TSADC_TSEN_DIV_SHIFT	= 0,
 	CLK_TSADC_TSEN_DIV_MASK		= 0x7 << CLK_TSADC_TSEN_DIV_SHIFT,
 
+	/* CRU_CLK_SEL52_CON */
+	CLK_UART_SEL_SHIFT		= 12,
+	CLK_UART_SEL_MASK		= 0x3 << CLK_UART_SEL_SHIFT,
+	CLK_UART_SEL_SRC		= 0,
+	CLK_UART_SEL_FRAC,
+	CLK_UART_SEL_XIN24M,
+	CLK_UART_SRC_SEL_SHIFT		= 8,
+	CLK_UART_SRC_SEL_MASK		= 0x3 << CLK_UART_SRC_SEL_SHIFT,
+	CLK_UART_SRC_SEL_GPLL		= 0,
+	CLK_UART_SRC_SEL_CPLL,
+	CLK_UART_SRC_SEL_480M,
+	CLK_UART_SRC_DIV_SHIFT		= 0,
+	CLK_UART_SRC_DIV_MASK		= 0x3f << CLK_UART_SRC_DIV_SHIFT,
+
+	/* CRU_CLK_SEL53_CON */
+	CLK_UART_FRAC_NUMERATOR_SHIFT	= 16,
+	CLK_UART_FRAC_NUMERATOR_MASK	= 0xffff << 16,
+	CLK_UART_FRAC_DENOMINATOR_SHIFT	= 0,
+	CLK_UART_FRAC_DENOMINATOR_MASK	= 0xffff,
+
 	/* CRU_CLK_SEL71_CON */
 	CLK_I2C_SEL_SHIFT		= 8,
 	CLK_I2C_SEL_MASK		= 3 << CLK_I2C_SEL_SHIFT,
diff --git a/drivers/clk/rockchip/clk_rk3568.c b/drivers/clk/rockchip/clk_rk3568.c
index c4678fa3fb..11dd460933 100644
--- a/drivers/clk/rockchip/clk_rk3568.c
+++ b/drivers/clk/rockchip/clk_rk3568.c
@@ -2154,6 +2154,141 @@ static ulong rk3568_rkvdec_set_clk(struct rk3568_clk_priv *priv,
 
 	return rk3568_rkvdec_get_clk(priv, clk_id);
 }
+
+static ulong rk3568_uart_get_rate(struct rk3568_clk_priv *priv, ulong clk_id)
+{
+	struct rk3568_cru *cru = priv->cru;
+	u32 reg, con, fracdiv, div, src, p_src, p_rate;
+	unsigned long m, n;
+
+	switch (clk_id) {
+	case SCLK_UART1:
+		reg = 52;
+		break;
+	case SCLK_UART2:
+		reg = 54;
+		break;
+	case SCLK_UART3:
+		reg = 56;
+		break;
+	case SCLK_UART4:
+		reg = 58;
+		break;
+	case SCLK_UART5:
+		reg = 60;
+		break;
+	case SCLK_UART6:
+		reg = 62;
+		break;
+	case SCLK_UART7:
+		reg = 64;
+		break;
+	case SCLK_UART8:
+		reg = 66;
+		break;
+	case SCLK_UART9:
+		reg = 68;
+		break;
+	default:
+		return -ENOENT;
+	}
+	con = readl(&cru->clksel_con[reg]);
+	src = (con & CLK_UART_SEL_MASK) >> CLK_UART_SEL_SHIFT;
+	div = (con & CLK_UART_SRC_DIV_MASK) >> CLK_UART_SRC_DIV_SHIFT;
+	p_src = (con & CLK_UART_SRC_SEL_MASK) >> CLK_UART_SRC_SEL_SHIFT;
+	if (p_src == CLK_UART_SRC_SEL_GPLL)
+		p_rate = priv->gpll_hz;
+	else if (p_src == CLK_UART_SRC_SEL_CPLL)
+		p_rate = priv->cpll_hz;
+	else
+		p_rate = 480000000;
+	if (src == CLK_UART_SEL_SRC) {
+		return DIV_TO_RATE(p_rate, div);
+	} else if (src == CLK_UART_SEL_FRAC) {
+		fracdiv = readl(&cru->clksel_con[reg + 1]);
+		n = fracdiv & CLK_UART_FRAC_NUMERATOR_MASK;
+		n >>= CLK_UART_FRAC_NUMERATOR_SHIFT;
+		m = fracdiv & CLK_UART_FRAC_DENOMINATOR_MASK;
+		m >>= CLK_UART_FRAC_DENOMINATOR_SHIFT;
+		return DIV_TO_RATE(p_rate, div) * n / m;
+	} else {
+		return OSC_HZ;
+	}
+}
+
+static ulong rk3568_uart_set_rate(struct rk3568_clk_priv *priv,
+				  ulong clk_id, ulong rate)
+{
+	struct rk3568_cru *cru = priv->cru;
+	u32 reg, clk_src, uart_src, div;
+	unsigned long m = 0, n = 0, val;
+
+	if (priv->gpll_hz % rate == 0) {
+		clk_src = CLK_UART_SRC_SEL_GPLL;
+		uart_src = CLK_UART_SEL_SRC;
+		div = DIV_ROUND_UP(priv->gpll_hz, rate);
+	} else if (priv->cpll_hz % rate == 0) {
+		clk_src = CLK_UART_SRC_SEL_CPLL;
+		uart_src = CLK_UART_SEL_SRC;
+		div = DIV_ROUND_UP(priv->gpll_hz, rate);
+	} else if (rate == OSC_HZ) {
+		clk_src = CLK_UART_SRC_SEL_GPLL;
+		uart_src = CLK_UART_SEL_XIN24M;
+		div = 2;
+	} else {
+		clk_src = CLK_UART_SRC_SEL_GPLL;
+		uart_src = CLK_UART_SEL_FRAC;
+		div = 2;
+		rational_best_approximation(rate, priv->gpll_hz / div,
+					    GENMASK(16 - 1, 0),
+					    GENMASK(16 - 1, 0),
+					    &m, &n);
+	}
+
+	switch (clk_id) {
+	case SCLK_UART1:
+		reg = 52;
+		break;
+	case SCLK_UART2:
+		reg = 54;
+		break;
+	case SCLK_UART3:
+		reg = 56;
+		break;
+	case SCLK_UART4:
+		reg = 58;
+		break;
+	case SCLK_UART5:
+		reg = 60;
+		break;
+	case SCLK_UART6:
+		reg = 62;
+		break;
+	case SCLK_UART7:
+		reg = 64;
+		break;
+	case SCLK_UART8:
+		reg = 66;
+		break;
+	case SCLK_UART9:
+		reg = 68;
+		break;
+	default:
+		return -ENOENT;
+	}
+	rk_clrsetreg(&cru->clksel_con[reg],
+		     CLK_UART_SEL_MASK | CLK_UART_SRC_SEL_MASK |
+		     CLK_UART_SRC_DIV_MASK,
+		     (clk_src << CLK_UART_SRC_SEL_SHIFT) |
+		     (uart_src << CLK_UART_SEL_SHIFT) |
+		     ((div - 1) << CLK_UART_SRC_DIV_SHIFT));
+	if (m && n) {
+		val = m << CLK_UART_FRAC_NUMERATOR_SHIFT | n;
+		writel(val, &cru->clksel_con[reg + 1]);
+	}
+
+	return rk3568_uart_get_rate(priv, clk_id);
+}
 #endif
 
 static ulong rk3568_clk_get_rate(struct clk *clk)
@@ -2287,6 +2422,17 @@ static ulong rk3568_clk_get_rate(struct clk *clk)
 	case TCLK_WDT_NS:
 		rate = OSC_HZ;
 		break;
+	case SCLK_UART1:
+	case SCLK_UART2:
+	case SCLK_UART3:
+	case SCLK_UART4:
+	case SCLK_UART5:
+	case SCLK_UART6:
+	case SCLK_UART7:
+	case SCLK_UART8:
+	case SCLK_UART9:
+		rate = rk3568_uart_get_rate(priv, clk->id);
+		break;
 #endif
 	case ACLK_SECURE_FLASH:
 	case ACLK_CRYPTO_NS:
@@ -2455,6 +2601,17 @@ static ulong rk3568_clk_set_rate(struct clk *clk, ulong rate)
 	case TCLK_WDT_NS:
 		ret = OSC_HZ;
 		break;
+	case SCLK_UART1:
+	case SCLK_UART2:
+	case SCLK_UART3:
+	case SCLK_UART4:
+	case SCLK_UART5:
+	case SCLK_UART6:
+	case SCLK_UART7:
+	case SCLK_UART8:
+	case SCLK_UART9:
+		ret = rk3568_uart_set_rate(priv, clk->id, rate);
+		break;
 #endif
 	case ACLK_SECURE_FLASH:
 	case ACLK_CRYPTO_NS:

commit e20fb21245d84973d8788f5e95678773df2d80e5
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Apr 7 21:30:33 2021 +0800

    include: rockchip: remove CONFIG_SUPPORT_EMMC_RPMB
    
    The macro is default selected.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I6966779ca63119cd210cd04268f2481ef795fcbf

diff --git a/include/configs/evb_px30.h b/include/configs/evb_px30.h
index 1717f2d1bc..69375a96ef 100644
--- a/include/configs/evb_px30.h
+++ b/include/configs/evb_px30.h
@@ -17,7 +17,6 @@
 
 #undef CONFIG_CONSOLE_SCROLL_LINES
 #define CONFIG_CONSOLE_SCROLL_LINES		10
-#define CONFIG_SUPPORT_EMMC_RPMB
 
 #ifndef CONFIG_SPL_BUILD
 #undef CONFIG_BOOTCOMMAND
diff --git a/include/configs/evb_rk3036.h b/include/configs/evb_rk3036.h
index 36be165fd5..8e70c721f9 100644
--- a/include/configs/evb_rk3036.h
+++ b/include/configs/evb_rk3036.h
@@ -14,7 +14,6 @@
 #define CONFIG_SYS_MMC_ENV_DEV          0
 #define CONFIG_SYS_MMC_ENV_PART         0
 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
-#define CONFIG_SUPPORT_EMMC_RPMB
 
 #ifndef CONFIG_SPL_BUILD
 /* Enable gpt partition table */
diff --git a/include/configs/evb_rk3229.h b/include/configs/evb_rk3229.h
index db1a843e80..0e5dddad93 100644
--- a/include/configs/evb_rk3229.h
+++ b/include/configs/evb_rk3229.h
@@ -17,7 +17,6 @@
 #define CONFIG_SYS_MMC_ENV_DEV          0
 #define CONFIG_SYS_MMC_ENV_PART         0
 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
-#define CONFIG_SUPPORT_EMMC_RPMB
 
 #ifndef CONFIG_SPL_BUILD
 
diff --git a/include/configs/evb_rk3308.h b/include/configs/evb_rk3308.h
index d3cd205bec..5e87e597aa 100644
--- a/include/configs/evb_rk3308.h
+++ b/include/configs/evb_rk3308.h
@@ -9,10 +9,8 @@
 
 #include <configs/rk3308_common.h>
 
-#define CONFIG_SUPPORT_EMMC_RPMB
 #define CONFIG_SYS_MMC_ENV_DEV 0
 
-
 #define ROCKCHIP_DEVICE_SETTINGS \
 			"stdout=serial,vidconsole\0" \
 			"stderr=serial,vidconsole\0"
diff --git a/include/configs/evb_rv1126.h b/include/configs/evb_rv1126.h
index 4c88fae4e2..33b25c1750 100644
--- a/include/configs/evb_rv1126.h
+++ b/include/configs/evb_rv1126.h
@@ -9,8 +9,6 @@
 
 #include <configs/rv1126_common.h>
 
-#define CONFIG_SUPPORT_EMMC_RPMB
-
 #define CONFIG_SYS_MMC_ENV_DEV 0
 
 #define ROCKCHIP_DEVICE_SETTINGS \
diff --git a/include/configs/gva_rk3229.h b/include/configs/gva_rk3229.h
index b8f3e94f84..34a387d312 100644
--- a/include/configs/gva_rk3229.h
+++ b/include/configs/gva_rk3229.h
@@ -20,7 +20,6 @@
 #define CONFIG_SYS_MMC_ENV_DEV          0
 #define CONFIG_SYS_MMC_ENV_PART         0
 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
-#define CONFIG_SUPPORT_EMMC_RPMB
 
 #ifndef CONFIG_SPL_BUILD
 /* Enable gpt partition table */
diff --git a/include/configs/kylin_rk3036.h b/include/configs/kylin_rk3036.h
index 807bf7ec55..15d4a24dbd 100644
--- a/include/configs/kylin_rk3036.h
+++ b/include/configs/kylin_rk3036.h
@@ -14,7 +14,6 @@
 #define CONFIG_SYS_MMC_ENV_DEV          0
 #define CONFIG_SYS_MMC_ENV_PART         0
 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
-#define CONFIG_SUPPORT_EMMC_RPMB
 
 #ifndef CONFIG_SPL_BUILD
 /* Enable gpt partition table */
diff --git a/include/configs/rk1808_common.h b/include/configs/rk1808_common.h
index 4ab12b4f9e..f94dd1eadf 100644
--- a/include/configs/rk1808_common.h
+++ b/include/configs/rk1808_common.h
@@ -31,7 +31,6 @@
 
 /* MMC/SD IP block */
 #define CONFIG_BOUNCE_BUFFER
-#define CONFIG_SUPPORT_EMMC_RPMB
 
 /* Nand */
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h
index e81a1a2044..ee47b2f5da 100644
--- a/include/configs/rk3128_common.h
+++ b/include/configs/rk3128_common.h
@@ -22,8 +22,6 @@
 #define GICC_BASE			0x1013A000
 #define GICD_BASE			0x10139000
 
-#define CONFIG_SUPPORT_EMMC_RPMB
-
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */
 
 #define CONFIG_ROCKUSB_G_DNL_PID	0x310C
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index 35aff11851..1ffa23e750 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -33,8 +33,6 @@
 
 #define CONFIG_ROCKUSB_G_DNL_PID	0x320A
 
-#define CONFIG_SUPPORT_EMMC_RPMB
-
 /* MMC/SD IP block */
 #define CONFIG_BOUNCE_BUFFER
 
diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index 5b6c0a5c91..f43fde48ad 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -28,8 +28,6 @@
 #define GICD_BASE			0xFF811000
 #define GICC_BASE			0xFF812000
 
-#define CONFIG_SUPPORT_EMMC_RPMB
-
 #define CONFIG_ROCKUSB_G_DNL_PID	0x320C
 
 /* MMC/SD IP block */
diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h
index 975b1fcbe7..4a0f87a252 100644
--- a/include/configs/rk3368_common.h
+++ b/include/configs/rk3368_common.h
@@ -42,8 +42,6 @@
 #define COUNTER_FREQUENCY              24000000
 #define CONFIG_PREBOOT
 
-#define CONFIG_SUPPORT_EMMC_RPMB
-
 #ifndef CONFIG_SPL_BUILD
 
 /* usb mass storage */
diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index 69895876fa..c4bd586898 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -26,7 +26,6 @@
 #define CONFIG_SPL_BSS_START_ADDR	0x00400000
 #define CONFIG_SPL_BSS_MAX_SIZE         0x2000
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */
-#define CONFIG_SUPPORT_EMMC_RPMB
 
 #define GICD_BASE			0xFEE00000
 #define GICR_BASE			0xFEF00000
diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h
index 0d1e5fe964..c869b4e3ce 100644
--- a/include/configs/rk3568_common.h
+++ b/include/configs/rk3568_common.h
@@ -60,8 +60,6 @@
 #define CONFIG_SYS_NAND_PAGE_COUNT	64
 #define CONFIG_SYS_NAND_SIZE		(256 * 1024 * 1024)
 
-#define CONFIG_SUPPORT_EMMC_RPMB
-
 #define CONFIG_SYS_SDRAM_BASE		0
 #define SDRAM_MAX_SIZE			0xf0000000
 #define CONFIG_PREBOOT

commit a2b78998d1db79cbcf22050c9abd6fc6a989b9f4
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Apr 8 14:23:22 2021 +0800

    lib: avb: use CONFIG_SUPPORT_EMMC_RPMB to shield the code
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I4d7009af0c0e3f7d26d9b283476ed623bb97dad2

diff --git a/lib/avb/rk_avb_user/rk_avb_ops_user.c b/lib/avb/rk_avb_user/rk_avb_ops_user.c
index c396eb193c..92dbedec32 100644
--- a/lib/avb/rk_avb_user/rk_avb_ops_user.c
+++ b/lib/avb/rk_avb_user/rk_avb_ops_user.c
@@ -502,11 +502,11 @@ void rk_avb_get_at_vboot_state(char *buf)
 	memset(rollback_indices, 0, VBOOT_STATE_SIZE);
 	if (rk_avb_read_all_rollback_index(rollback_indices))
 		avb_error("Can not read avb_min_ver!");
-
+#ifdef CONFIG_SUPPORT_EMMC_RPMB
 	/* bootloader-min-versions */
 	if (rk_avb_get_bootloader_min_version(min_versions))
 		avb_error("Call rk_avb_get_bootloader_min_version error!");
-
+#endif
 	n = snprintf(buf, VBOOT_STATE_SIZE - 1,
 		     "avb-perm-attr-set=%s\n"
 		     "avb-locked=%s\n"

commit fd9c6bd714467f5ed3559801a610975096e9eb5d
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Apr 8 14:22:40 2021 +0800

    lib: optee_client: use CONFIG_SUPPORT_EMMC_RPMB to shield optee compiled
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I46be3361af30d887c347d068f8cb92145ab5eb90

diff --git a/lib/optee_clientApi/OpteeClientRPC.c b/lib/optee_clientApi/OpteeClientRPC.c
index 83005d8418..b46f229b2c 100644
--- a/lib/optee_clientApi/OpteeClientRPC.c
+++ b/lib/optee_clientApi/OpteeClientRPC.c
@@ -236,6 +236,7 @@ Exit:
  */
 
 uint16_t global_block_count;
+#ifdef CONFIG_SUPPORT_EMMC_RPMB
 TEEC_Result OpteeRpcCmdRpmb(t_teesmc32_arg *TeeSmc32Arg)
 {
 	struct tee_rpc_rpmb_dev_info *DevInfo;
@@ -507,6 +508,7 @@ Exit:
 
 	return TeecResult;
 }
+#endif
 
 /*
  * Execute a normal world local file system operation.
@@ -607,10 +609,12 @@ TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs)
 			break;
 
 		}
+#ifdef CONFIG_SUPPORT_EMMC_RPMB
 		case OPTEE_MSG_RPC_CMD_RPMB_V2: {
 			TeecResult = OpteeRpcCmdRpmb(TeeSmc32Arg);
 			break;
 		}
+#endif
 		case OPTEE_MSG_RPC_CMD_FS_V2: {
 			TeecResult = OpteeRpcCmdFs(TeeSmc32Arg);
 			TeeSmc32Arg->ret = TEEC_SUCCESS;

commit 3ad625707a4573739574326a9aae51dc68d481b8
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Apr 9 10:05:04 2021 +0800

    drivers: mmc: add config SUPPORT_EMMC_RPMB
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I372f2b6fd2bde318e39f20e41b4237c6d1b962bd

diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 551f1af53d..52bf888d78 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -55,6 +55,14 @@ config SPL_MMC_TINY
 	  operations too, which can remove the need for malloc support in SPL
 	  and thus further reduce footprint.
 
+config SUPPORT_EMMC_RPMB
+	bool "Support eMMC replay protected memory block (RPMB)"
+	depends on MMC && CMD_MMC
+	default y
+	help
+	  Enable support for reading, writing and programming the
+	  key for the Replay Protection Memory Block partition in eMMC.
+
 config MMC_DAVINCI
 	bool "TI DAVINCI Multimedia Card Interface support"
 	depends on ARCH_DAVINCI

commit 472460eca77c001e1f4efcc0bbfb0a184aef5572
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed Mar 31 09:49:44 2021 +0800

    rkflash: Remove useless hex_dump
    
    Change-Id: Ib8db228981daef65fb2a92b9a13ad1a52c3ac244
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/rkflash_debug.c b/drivers/rkflash/rkflash_debug.c
index 97976c262c..91b34bb756 100644
--- a/drivers/rkflash/rkflash_debug.c
+++ b/drivers/rkflash/rkflash_debug.c
@@ -6,7 +6,6 @@
 
 #include <blk.h>
 #include <common.h>
-#include <hexdump.h>
 
 #include "rkflash_debug.h"
 #include "rkflash_blk.h"
@@ -84,10 +83,6 @@ __printf(1, 2) int rkflash_print_error(const char *fmt, ...)
 
 void rkflash_print_hex(const char *s, const void *buf, int w, size_t len)
 {
-#if PRINT_SWI_ERROR
-	print_hex_dump(s, DUMP_PREFIX_OFFSET, 4, w,
-		       buf, (len) * w, 0);
-#endif
 }
 
 #if (BLK_STRESS_TEST_EN)

commit 88f2dd65d2f7fd700f0c4e3ff15d03759a3cbd73
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Mar 29 14:02:41 2021 +0800

    rkflash: Update map table earlier
    
    Update to SFTL version: 5.0.56 20210329
    
    Change-Id: Ib313ecfbf39a44a128150dace05a3bc3cb4ca8ce
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/rk_sftl_arm_v7.S b/drivers/rkflash/rk_sftl_arm_v7.S
index 741fe7164f..b15514dedc 100644
--- a/drivers/rkflash/rk_sftl_arm_v7.S
+++ b/drivers/rkflash/rk_sftl_arm_v7.S
@@ -2,7 +2,7 @@
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:    GPL-2.0
- * date: 2020-09-25
+ * date: 2021-03-29
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -1392,7 +1392,7 @@ select_l2p_ram_region:
 	bcc	.L164
 	cmp	r4, r2
 	bcc	.L157
-	movw	r2, #789
+	mov	r2, #796
 	ldr	r1, .L165+12
 	ldr	r0, .L165+16
 	bl	printf
@@ -1623,7 +1623,7 @@ make_superblock:
 	ldrh	r3, [r3]
 	cmp	r2, r3
 	bcc	.L197
-	movw	r2, #2150
+	movw	r2, #2157
 	ldr	r1, .L202+4
 	ldr	r0, .L202+8
 	bl	printf
@@ -1883,7 +1883,7 @@ get_new_active_ppa:
 	mov	r4, r0
 	cmp	r2, r3
 	bne	.L232
-	movw	r2, #2785
+	movw	r2, #2792
 	ldr	r1, .L246
 	ldr	r0, .L246+4
 	bl	printf
@@ -1893,14 +1893,14 @@ get_new_active_ppa:
 	ldrh	r3, [r6]
 	cmp	r2, r3
 	bne	.L233
-	movw	r2, #2786
+	movw	r2, #2793
 	ldr	r1, .L246
 	ldr	r0, .L246+4
 	bl	printf
 .L233:
 	ldrh	r3, [r4, #4]
 	cbnz	r3, .L234
-	movw	r2, #2787
+	movw	r2, #2794
 	ldr	r1, .L246
 	ldr	r0, .L246+4
 	bl	printf
@@ -1946,7 +1946,7 @@ get_new_active_ppa:
 	cmp	r3, r6
 	bne	.L231
 	cbz	r2, .L231
-	movw	r2, #2810
+	movw	r2, #2817
 	ldr	r1, .L246
 	ldr	r0, .L246+4
 	bl	printf
@@ -3708,7 +3708,7 @@ SupperBlkListInit:
 	add	r5, r5, r8
 	cmp	r5, r3
 	ble	.L427
-	movw	r2, #2212
+	movw	r2, #2219
 	ldr	r1, .L428+60
 	ldr	r0, .L428+64
 	bl	printf
@@ -4363,7 +4363,7 @@ FtlScanSysBlk:
 	ldr	r3, [r3]
 	cmp	r2, r3
 	bls	.L530
-	movw	r2, #1225
+	mov	r2, #1232
 	ldr	r1, .L592+72
 	ldr	r0, .L592+76
 	bl	printf
@@ -4477,7 +4477,7 @@ FtlScanSysBlk:
 	ldrh	r3, [r10]
 	cmp	r2, r3
 	bls	.L540
-	movw	r2, #1266
+	movw	r2, #1273
 	ldr	r1, .L594
 	ldr	r0, .L594+4
 	bl	printf
@@ -4593,7 +4593,7 @@ FtlScanSysBlk:
 	ldr	r3, [r3]
 	cmp	r2, r3
 	bls	.L588
-	movw	r2, #1391
+	movw	r2, #1398
 	ldr	r1, .L594
 	ldr	r0, .L594+4
 	bl	printf
@@ -5605,7 +5605,7 @@ allocate_data_superblock:
 	ldrh	r2, [r7]
 	cmp	r3, r2
 	ble	.L737
-	movw	r2, #2660
+	movw	r2, #2667
 	ldr	r1, .L774+8
 	ldr	r0, .L774+12
 	bl	printf
@@ -5631,7 +5631,7 @@ allocate_data_superblock:
 	mov	r5, r0
 	uxth	fp, r0
 	cbnz	r3, .L739
-	movw	r2, #2669
+	movw	r2, #2676
 	ldr	r1, .L774+8
 	ldr	r0, .L774+12
 	bl	printf
@@ -5667,7 +5667,7 @@ allocate_data_superblock:
 	ldrh	r2, [r7]
 	cmp	r3, r2
 	ble	.L736
-	movw	r2, #2683
+	movw	r2, #2690
 	ldr	r1, .L774+8
 	ldr	r0, .L774+12
 	bl	printf
@@ -5682,7 +5682,7 @@ allocate_data_superblock:
 	ldrh	r2, [r7]
 	cmp	r3, r2
 	ble	.L743
-	movw	r2, #2686
+	movw	r2, #2693
 	ldr	r1, .L774+8
 	ldr	r0, .L774+12
 	bl	printf
@@ -5701,7 +5701,7 @@ allocate_data_superblock:
 	cmp	r0, r3
 	bne	.L746
 	cbnz	r6, .L747
-	movw	r2, #2697
+	mov	r2, #2704
 	ldr	r1, .L774+8
 	ldr	r0, .L774+12
 	bl	printf
@@ -5710,7 +5710,7 @@ allocate_data_superblock:
 	ldrh	r3, [r3]
 	cmp	r3, fp
 	bne	.L748
-	movw	r2, #2699
+	movw	r2, #2706
 	ldr	r1, .L774+8
 	ldr	r0, .L774+12
 	bl	printf
@@ -5867,7 +5867,7 @@ allocate_data_superblock:
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	cbnz	r3, .L762
 .L761:
-	mov	r2, #2752
+	movw	r2, #2759
 	ldr	r1, .L774+8
 	ldr	r0, .L774+12
 	bl	printf
@@ -6024,7 +6024,7 @@ update_vpc_list:
 	bl	List_remove_node
 	ldrh	r3, [r5]
 	cbnz	r3, .L797
-	movw	r2, #2828
+	movw	r2, #2835
 	ldr	r1, .L802+24
 	ldr	r0, .L802+28
 	bl	printf
@@ -6044,7 +6044,7 @@ update_vpc_list:
 	ldrh	r2, [r2]
 	cmp	r3, r2
 	ble	.L801
-	movw	r2, #2831
+	movw	r2, #2838
 	ldr	r1, .L802+24
 	ldr	r0, .L802+28
 	bl	printf
@@ -6119,7 +6119,7 @@ decrement_vpc_count:
 	mov	r0, r5
 	pop	{r4, r5, r6, pc}
 .L807:
-	movw	r2, #2846
+	movw	r2, #2853
 .L812:
 	ldr	r1, .L813+8
 	ldr	r0, .L813+12
@@ -6160,7 +6160,7 @@ decrement_vpc_count:
 	bne	.L804
 	cmp	r4, r1
 	beq	.L804
-	movw	r2, #2862
+	movw	r2, #2869
 	b	.L812
 .L814:
 	.align	2
@@ -6652,14 +6652,15 @@ FtlMapWritePage:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	lsl	r10, r1, #2
+	ldr	r8, .L894+32
 	mov	r4, r0
-	ldr	r8, .L893+32
 	mov	r7, r1
 	movs	r6, #0
 	str	r2, [sp]
 	mov	fp, r8
 .L870:
-	ldr	r2, .L893
+	ldr	r2, .L894
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
@@ -6681,8 +6682,8 @@ FtlMapWritePage:
 	ldrh	r3, [r3, r2, lsl #1]
 	cbnz	r3, .L873
 	mov	r2, #700
-	ldr	r1, .L893+4
-	ldr	r0, .L893+8
+	ldr	r1, .L894+4
+	ldr	r0, .L894+8
 	bl	printf
 .L873:
 	ldrh	r2, [r4]
@@ -6690,57 +6691,61 @@ FtlMapWritePage:
 	cmp	r2, r3
 	bcc	.L874
 	movw	r2, #701
-	ldr	r1, .L893+4
-	ldr	r0, .L893+8
+	ldr	r1, .L894+4
+	ldr	r0, .L894+8
 	bl	printf
 .L874:
 	ldrh	r2, [r4]
 	movs	r1, #0
 	ldr	r3, [r4, #12]
-	ldr	r5, .L893+12
+	ldr	r5, .L894+12
 	ldrh	r3, [r3, r2, lsl #1]
 	ldrh	r2, [r4, #2]
 	str	r3, [sp, #4]
 	orr	r2, r2, r3, lsl #10
 	ldr	r3, [sp]
 	str	r2, [r5, #4]
-	ldr	r2, .L893+16
+	ldr	r2, .L894+16
 	str	r3, [r5, #8]
 	ldr	r0, [r2]
 	movs	r2, #16
 	str	r0, [r5, #12]
 	bl	ftl_memset
+	ldr	r2, [r5, #12]
 	ldr	r1, [r4, #28]
-	ldr	r10, [r5, #12]
 	ldr	r3, [sp, #4]
-	ldr	r0, [r5, #8]
-	str	r1, [r10, #4]
+	strh	r7, [r2, #8]	@ movhi
+	str	r1, [r2, #4]
 	ldrh	r1, [r4, #4]
-	strh	r3, [r10, #2]	@ movhi
-	ldr	r3, .L893+20
-	strh	r1, [r10]	@ movhi
-	strh	r7, [r10, #8]	@ movhi
+	strh	r3, [r2, #2]	@ movhi
+	ldr	r3, .L894+20
+	strh	r1, [r2]	@ movhi
+	ldr	r0, [r5, #8]
 	ldrh	r1, [r3]
+	str	r2, [sp, #4]
 	bl	js_hash
+	ldr	r2, [sp, #4]
 	movs	r3, #1
-	str	r0, [r10, #12]
-	mov	r2, r3
 	mov	r1, r3
+	str	r0, [r2, #12]
+	mov	r2, r3
 	mov	r0, r5
 	bl	FlashProgPages
 	ldrh	r2, [r4, #2]
-	ldr	r1, [r5]
+	ldr	r3, [r5]
 	adds	r2, r2, #1
 	uxth	r2, r2
-	adds	r3, r1, #1
+	adds	r3, r3, #1
 	strh	r2, [r4, #2]	@ movhi
 	bne	.L875
 	ldr	r1, [r5, #4]
 	adds	r6, r6, #1
-	ldr	r0, .L893+24
+	ldr	r0, .L894+24
 	uxth	r6, r6
+	str	r5, [sp, #4]
 	bl	printf
 	ldrh	r2, [r4, #2]
+	ldr	r3, [sp, #4]
 	cmp	r2, #2
 	ittt	ls
 	ldrhls	r2, [fp]
@@ -6749,8 +6754,8 @@ FtlMapWritePage:
 	cmp	r6, #3
 	bls	.L877
 	mov	r2, r6
-	ldr	r1, [r5, #4]
-	ldr	r0, .L893+28
+	ldr	r1, [r3, #4]
+	ldr	r0, .L894+28
 	bl	printf
 .L878:
 	b	.L878
@@ -6758,29 +6763,38 @@ FtlMapWritePage:
 	ldr	r3, [r4, #32]
 	cmp	r3, #0
 	beq	.L870
-.L892:
-	b	.L892
+.L893:
+	b	.L893
 .L875:
+	ldr	r1, [r5, #4]
 	cmp	r2, #1
+	ldr	r3, [r4, #24]
+	str	r1, [r3, r10]
 	beq	.L881
-	cmp	r1, #256
+	ldr	r3, [r5]
+	cmp	r3, #256
 	beq	.L881
-	ldr	r0, [r4, #36]
-	cbz	r0, .L882
+	ldr	r2, [r4, #36]
+	cbz	r2, .L882
 .L881:
 	movs	r3, #0
 	str	r3, [r4, #36]
 	b	.L870
 .L882:
-	ldr	r2, [r5, #4]
-	ldr	r3, [r4, #24]
-	str	r2, [r3, r7, lsl #2]
+	adds	r3, r3, #1
+	bne	.L883
+	movw	r2, #745
+	ldr	r1, .L894+4
+	ldr	r0, .L894+8
+	bl	printf
+.L883:
+	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L894:
+.L895:
 	.align	2
-.L893:
+.L894:
 	.word	.LANCHOR87
 	.word	.LANCHOR148
 	.word	.LC1
@@ -6802,31 +6816,31 @@ FtlMapWritePage:
 load_l2p_region:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L902
+	ldr	r3, .L903
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r5, r0
 	mov	r10, r1
 	ldrh	r2, [r3]
 	str	r3, [sp, #4]
 	cmp	r2, r0
-	bcs	.L896
+	bcs	.L897
 	movw	r2, #485
-	ldr	r1, .L902+4
-	ldr	r0, .L902+8
+	ldr	r1, .L903+4
+	ldr	r0, .L903+8
 	bl	printf
-.L896:
-	ldr	fp, .L902+48
+.L897:
+	ldr	fp, .L903+48
 	movs	r4, #12
-	ldr	r7, .L902+12
+	ldr	r7, .L903+12
 	ldr	r3, [fp]
 	ldr	r8, [r3, r5, lsl #2]
 	cmp	r8, #0
-	bne	.L897
+	bne	.L898
 	mul	r4, r4, r10
 	ldr	r2, [r7]
 	movs	r1, #255
 	adds	r0, r2, r4
-	ldr	r2, .L902+16
+	ldr	r2, .L903+16
 	ldr	r0, [r0, #8]
 	ldrh	r2, [r2]
 	bl	ftl_memset
@@ -6834,21 +6848,21 @@ load_l2p_region:
 	adds	r1, r2, r4
 	strh	r5, [r2, r4]	@ movhi
 	str	r8, [r1, #4]
-.L898:
+.L899:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L897:
+.L898:
 	mul	r4, r4, r10
 	ldr	r2, [r7]
-	ldr	r6, .L902+20
+	ldr	r6, .L903+20
 	add	r2, r2, r4
 	mov	r0, r6
 	ldr	r2, [r2, #8]
 	str	r8, [r6, #4]
 	str	r2, [r6, #8]
-	ldr	r2, .L902+24
+	ldr	r2, .L903+24
 	ldr	r2, [r2]
 	str	r2, [r6, #12]
 	movs	r2, #1
@@ -6857,55 +6871,55 @@ load_l2p_region:
 	ldr	r10, [r6, #12]
 	ldrh	r2, [r10, #8]
 	cmp	r2, r5
-	beq	.L899
+	beq	.L900
 	mov	r2, r8
 	mov	r1, r5
-	ldr	r0, .L902+28
+	ldr	r0, .L903+28
 	bl	printf
 	movs	r3, #4
 	ldr	r1, [r6, #12]
 	mov	r2, r3
-	ldr	r0, .L902+32
+	ldr	r0, .L903+32
 	bl	rknand_print_hex
 	ldr	r3, [sp, #4]
 	movs	r2, #4
 	ldr	r1, [fp]
-	ldr	r0, .L902+36
+	ldr	r0, .L903+36
 	ldrh	r3, [r3]
 	bl	rknand_print_hex
-.L900:
+.L901:
 	ldrh	r3, [r10, #8]
 	cmp	r3, r5
-	beq	.L901
+	beq	.L902
 	mov	r2, #508
-	ldr	r1, .L902+4
-	ldr	r0, .L902+8
+	ldr	r1, .L903+4
+	ldr	r0, .L903+8
 	bl	printf
-.L901:
+.L902:
 	ldr	r3, [r7]
 	movs	r1, #0
 	adds	r2, r3, r4
 	str	r1, [r2, #4]
 	strh	r5, [r3, r4]	@ movhi
-	b	.L898
-.L899:
+	b	.L899
+.L900:
 	ldr	r2, [r6]
 	cmp	r2, #256
-	bne	.L900
+	bne	.L901
 	mov	r2, r8
 	mov	r1, r5
-	ldr	r0, .L902+40
+	ldr	r0, .L903+40
 	bl	printf
 	ldr	r3, [r7]
 	mov	r1, r5
-	ldr	r0, .L902+44
+	ldr	r0, .L903+44
 	add	r3, r3, r4
 	ldr	r2, [r3, #8]
 	bl	FtlMapWritePage
-	b	.L900
-.L903:
+	b	.L901
+.L904:
 	.align	2
-.L902:
+.L903:
 	.word	.LANCHOR31
 	.word	.LANCHOR149
 	.word	.LC1
@@ -6941,13 +6955,13 @@ ftl_map_blk_gc:
 	ldrh	r2, [r4, #8]
 	subs	r3, r3, #5
 	cmp	r2, r3
-	blt	.L905
+	blt	.L906
 	uxth	r0, r0
 	ldrh	r8, [r5, r0, lsl #1]
 	cmp	r8, #0
-	beq	.L905
+	beq	.L906
 	ldr	r3, [r4, #32]
-	cbnz	r3, .L905
+	cbnz	r3, .L906
 	movs	r2, #1
 	str	r2, [r4, #32]
 	strh	r3, [r5, r0, lsl #1]	@ movhi
@@ -6955,39 +6969,39 @@ ftl_map_blk_gc:
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	ldr	r3, .L920
+	ldr	r3, .L921
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L906
+	bcc	.L907
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L906:
-	ldr	r5, .L920+4
-	movs	r6, #0
 .L907:
+	ldr	r5, .L921+4
+	movs	r6, #0
+.L908:
 	ldrh	r3, [r4, #6]
 	uxth	r10, r6
 	cmp	r3, r10
-	bhi	.L914
+	bhi	.L915
 	movs	r1, #1
 	mov	r0, r8
 	bl	FtlFreeSysBlkQueueIn
 	movs	r3, #0
 	str	r3, [r4, #32]
-.L905:
-	ldr	r3, .L920
+.L906:
+	ldr	r3, .L921
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L915
+	bcc	.L916
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L915:
+.L916:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L914:
+.L915:
 	ldr	r3, [sp]
 	uxth	fp, r6
 	add	r3, r3, fp, lsl #2
@@ -6995,53 +7009,53 @@ ftl_map_blk_gc:
 	ldr	r3, [sp]
 	ldr	r2, [r3, fp, lsl #2]
 	cmp	r8, r2, lsr #10
-	bne	.L908
-	ldr	r3, .L920+8
+	bne	.L909
+	ldr	r3, .L921+8
 	str	r2, [r5, #4]
 	movs	r2, #1
-	ldr	r0, .L920+4
+	ldr	r0, .L921+4
 	ldr	r1, [r3]
 	str	r1, [r5, #8]
-	ldr	r1, .L920+12
+	ldr	r1, .L921+12
 	ldr	r7, [r1]
 	mov	r1, r2
 	str	r7, [r5, #12]
 	bl	FlashReadPages
 	ldrh	r2, [r7, #8]
 	cmp	r2, r10
-	beq	.L909
+	beq	.L910
 	movw	r2, #611
-	ldr	r1, .L920+16
-	ldr	r0, .L920+20
+	ldr	r1, .L921+16
+	ldr	r0, .L921+20
 	bl	printf
-.L909:
+.L910:
 	ldr	r2, [r5]
 	adds	r2, r2, #1
-	bne	.L910
-.L912:
+	bne	.L911
+.L913:
 	ldr	r2, [sp, #4]
 	movs	r3, #0
 	str	r3, [r2]
+.L912:
+	b	.L912
 .L911:
-	b	.L911
-.L910:
 	ldrh	r2, [r7, #8]
 	cmp	r2, r10
-	bne	.L912
+	bne	.L913
 	ldrh	r1, [r7]
 	ldrh	r2, [r4, #4]
 	cmp	r1, r2
-	bne	.L912
+	bne	.L913
 	ldr	r2, [r5, #8]
 	mov	r1, fp
 	mov	r0, r4
 	bl	FtlMapWritePage
-.L908:
+.L909:
 	adds	r6, r6, #1
-	b	.L907
-.L921:
+	b	.L908
+.L922:
 	.align	2
-.L920:
+.L921:
 	.word	.LANCHOR19
 	.word	.LANCHOR137
 	.word	.LANCHOR106
@@ -7062,9 +7076,9 @@ flush_l2p_region:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #12
-	ldr	r5, .L923
+	ldr	r5, .L924
 	muls	r4, r0, r4
-	ldr	r0, .L923+4
+	ldr	r0, .L924+4
 	ldr	r3, [r5]
 	adds	r2, r3, r4
 	ldrh	r1, [r3, r4]
@@ -7077,9 +7091,9 @@ flush_l2p_region:
 	bic	r3, r3, #-2147483648
 	str	r3, [r4, #4]
 	pop	{r3, r4, r5, pc}
-.L924:
+.L925:
 	.align	2
-.L923:
+.L924:
 	.word	.LANCHOR54
 	.word	.LANCHOR128
 	.size	flush_l2p_region, .-flush_l2p_region
@@ -7096,30 +7110,30 @@ l2p_flush:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
 	movs	r4, #0
-	ldr	r5, .L929
-	ldr	r6, .L929+4
-.L926:
+	ldr	r5, .L930
+	ldr	r6, .L930+4
+.L927:
 	ldrh	r3, [r5]
 	uxth	r0, r4
 	cmp	r3, r0
-	bhi	.L928
+	bhi	.L929
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L928:
+.L929:
 	ldr	r2, [r6]
 	uxth	r3, r4
 	movs	r1, #12
 	mla	r3, r1, r3, r2
 	ldr	r3, [r3, #4]
 	cmp	r3, #0
-	bge	.L927
+	bge	.L928
 	bl	flush_l2p_region
-.L927:
+.L928:
 	adds	r4, r4, #1
-	b	.L926
-.L930:
+	b	.L927
+.L931:
 	.align	2
-.L929:
+.L930:
 	.word	.LANCHOR32
 	.word	.LANCHOR54
 	.size	l2p_flush, .-l2p_flush
@@ -7136,36 +7150,36 @@ log2phys:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r7, r2
-	ldr	r4, .L944
+	ldr	r4, .L945
 	mov	r10, r0
 	mov	r5, r1
-	ldr	r3, .L944+4
+	ldr	r3, .L945+4
 	ldr	r2, [r4]
 	ldrh	fp, [r3]
 	cmp	r0, r2
-	bcc	.L932
-	movw	r2, #813
-	ldr	r1, .L944+8
-	ldr	r0, .L944+12
+	bcc	.L933
+	mov	r2, #820
+	ldr	r1, .L945+8
+	ldr	r0, .L945+12
 	bl	printf
-.L932:
+.L933:
 	ldr	r3, [r4]
 	cmp	r10, r3
-	bcs	.L933
-	ldr	r3, .L944+16
+	bcs	.L934
+	ldr	r3, .L945+16
 	add	fp, fp, #7
 	lsr	r6, r10, fp
 	movs	r2, #0
 	ldrh	r1, [r3]
 	uxth	r6, r6
-	ldr	r3, .L944+20
+	ldr	r3, .L945+20
 	ldr	r0, [r3]
 	mov	r8, r3
 	movs	r3, #12
-.L934:
+.L935:
 	uxth	r4, r2
 	cmp	r4, r1
-	bcc	.L939
+	bcc	.L940
 	str	r3, [sp, #4]
 	bl	select_l2p_ram_region
 	ldr	r3, [sp, #4]
@@ -7176,31 +7190,31 @@ log2phys:
 	ldrh	r2, [r2, r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L940
+	beq	.L941
 	ldr	r3, [r1, #4]
 	cmp	r3, #0
-	bge	.L940
+	bge	.L941
 	bl	flush_l2p_region
-.L940:
+.L941:
 	mov	r1, r4
 	mov	r0, r6
 	bl	load_l2p_region
-	b	.L936
-.L933:
+	b	.L937
+.L934:
 	mov	r0, #-1
-	cbnz	r7, .L931
+	cbnz	r7, .L932
 	str	r0, [r5]
-.L931:
+.L932:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L939:
+.L940:
 	adds	r2, r2, #1
 	mla	ip, r3, r2, r0
 	ldrh	ip, [ip, #-12]
 	cmp	ip, r6
-	bne	.L934
-.L936:
+	bne	.L935
+.L937:
 	movs	r0, #1
 	ldr	r2, [r8]
 	lsl	r0, r0, fp
@@ -7209,35 +7223,35 @@ log2phys:
 	and	r0, r0, r10
 	uxth	r0, r0
 	mla	r3, r3, r4, r2
-	cbnz	r7, .L937
+	cbnz	r7, .L938
 	ldr	r3, [r3, #8]
 	ldr	r3, [r3, r0, lsl #2]
 	str	r3, [r5]
-.L938:
+.L939:
 	ldr	r2, [r8]
 	movs	r3, #12
 	mla	r4, r3, r4, r2
 	ldr	r3, [r4, #4]
 	adds	r2, r3, #1
-	beq	.L942
+	beq	.L943
 	adds	r3, r3, #1
 	str	r3, [r4, #4]
-.L942:
+.L943:
 	movs	r0, #0
-	b	.L931
-.L937:
+	b	.L932
+.L938:
 	ldr	r1, [r5]
 	ldr	r2, [r3, #8]
 	str	r1, [r2, r0, lsl #2]
 	ldr	r2, [r3, #4]
 	orr	r2, r2, #-2147483648
 	str	r2, [r3, #4]
-	ldr	r3, .L944+24
+	ldr	r3, .L945+24
 	strh	r6, [r3]	@ movhi
-	b	.L938
-.L945:
+	b	.L939
+.L946:
 	.align	2
-.L944:
+.L945:
 	.word	.LANCHOR151
 	.word	.LANCHOR21
 	.word	.LANCHOR152
@@ -7259,22 +7273,22 @@ FtlReUsePrevPpa:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r6, r0
-	ldr	r5, .L956
+	ldr	r5, .L957
 	ubfx	r0, r1, #10, #16
 	str	r1, [sp, #4]
 	bl	P2V_block_in_plane
 	ldr	r2, [r5]
 	mov	r7, r0
 	ldrh	r3, [r2, r0, lsl #1]
-	cbnz	r3, .L947
-	ldr	r2, .L956+4
+	cbnz	r3, .L948
+	ldr	r2, .L957+4
 	ldr	r4, [r2]
 	cmp	r4, #0
-	beq	.L948
-	ldr	r2, .L956+8
+	beq	.L949
+	ldr	r2, .L957+8
 	movw	lr, #65535
-	ldr	ip, .L956+24
-	ldr	r0, .L956+12
+	ldr	ip, .L957+24
+	ldr	r0, .L957+12
 	ldr	r2, [r2]
 	ldrh	r1, [r0]
 	mov	r8, r0
@@ -7283,22 +7297,22 @@ FtlReUsePrevPpa:
 	mul	r4, ip, r4
 	mov	ip, #6
 	uxth	r4, r4
-.L949:
+.L950:
 	uxth	r0, r3
 	cmp	r1, r0
-	bls	.L948
+	bls	.L949
 	cmp	r4, r7
-	bne	.L950
+	bne	.L951
 	mov	r1, r4
-	ldr	r0, .L956+4
+	ldr	r0, .L957+4
 	bl	List_remove_node
 	ldrh	r3, [r8]
-	cbnz	r3, .L951
-	movw	r2, #1735
-	ldr	r1, .L956+16
-	ldr	r0, .L956+20
+	cbnz	r3, .L952
+	movw	r2, #1742
+	ldr	r1, .L957+16
+	ldr	r0, .L957+20
 	bl	printf
-.L951:
+.L952:
 	ldrh	r3, [r8]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -7306,17 +7320,17 @@ FtlReUsePrevPpa:
 	bl	INSERT_DATA_LIST
 	ldr	r2, [r5]
 	ldrh	r3, [r2, r7, lsl #1]
-.L947:
+.L948:
 	adds	r3, r3, #1
 	strh	r3, [r2, r7, lsl #1]	@ movhi
-	b	.L948
-.L950:
+	b	.L949
+.L951:
 	mul	r4, ip, r4
 	adds	r3, r3, #1
 	ldrh	r4, [r2, r4]
 	cmp	r4, lr
-	bne	.L949
-.L948:
+	bne	.L950
+.L949:
 	movs	r2, #1
 	add	r1, sp, #4
 	mov	r0, r6
@@ -7324,9 +7338,9 @@ FtlReUsePrevPpa:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L957:
+.L958:
 	.align	2
-.L956:
+.L957:
 	.word	.LANCHOR41
 	.word	.LANCHOR45
 	.word	.LANCHOR39
@@ -7352,144 +7366,144 @@ FtlRecoverySuperblock:
 	mov	r8, r0
 	sub	sp, sp, #48
 	cmp	r3, r2
-	beq	.L1090
+	beq	.L1091
 	ldrh	r3, [r0, #2]
 	str	r3, [sp, #4]
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	ldr	r1, [sp, #4]
 	str	r3, [sp, #20]
-	ldr	r3, .L1099
+	ldr	r3, .L1100
 	ldrh	r3, [r3]
 	cmp	r3, r1
 	mov	r3, #0
-	bne	.L961
+	bne	.L962
 	strh	r3, [r0, #4]	@ movhi
-.L1097:
+.L1098:
 	strb	r3, [r8, #6]
-.L1090:
+.L1091:
 	movs	r0, #0
 	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L961:
-	ldrh	r0, [r0, #16]
 .L962:
+	ldrh	r0, [r0, #16]
+.L963:
 	cmp	r0, r2
 	uxth	r5, r3
 	add	r3, r3, #1
-	beq	.L963
+	beq	.L964
 	movs	r1, #1
 	bl	FtlGetLastWrittenPage
 	mov	r4, r0
 	adds	r0, r0, #1
-	beq	.L964
-	ldr	r3, .L1099+4
+	beq	.L965
+	ldr	r3, .L1100+4
 	movs	r2, #0
 	mov	r5, r2
 	movw	fp, #65535
 	mov	r10, #20
 	ldrh	ip, [r3]
-	ldr	r3, .L1099+8
+	ldr	r3, .L1100+8
 	ldr	r0, [r3]
-	ldr	r3, .L1099+12
+	ldr	r3, .L1100+12
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
-	ldr	r3, .L1099+16
+	ldr	r3, .L1100+16
 	ldrh	r7, [r3]
-	ldr	r3, .L1099+20
+	ldr	r3, .L1100+20
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L1099+24
+	ldr	r3, .L1100+24
 	ldrh	lr, [r3]
 	add	r3, r8, #16
 	str	r3, [sp, #16]
 	str	r3, [sp]
-.L965:
+.L966:
 	uxth	r3, r2
 	cmp	ip, r3
-	bhi	.L969
+	bhi	.L970
 	movs	r2, #0
 	mov	r1, r5
 	bl	FlashReadPages
-	ldr	r2, .L1099+28
+	ldr	r2, .L1100+28
 	uxth	r1, r4
 	movw	fp, #65535
 	str	r1, [sp, #12]
 	ldr	r3, [r2]
 	subs	r3, r3, #1
 	str	r3, [sp]
-	ldr	r3, .L1099+8
+	ldr	r3, .L1100+8
 	ldr	r10, [r3]
 	movs	r3, #0
 	mov	r7, r10
-.L970:
+.L971:
 	uxth	r1, r3
 	cmp	r5, r1
-	bhi	.L975
-	bne	.L973
+	bhi	.L976
+	bne	.L974
 	adds	r3, r4, #1
 	uxth	r3, r3
 	str	r3, [sp, #8]
-.L1091:
+.L1092:
 	ldr	r0, [r10, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_plane
-	ldr	r3, .L1099
+	ldr	r3, .L1100
 	mov	r10, r0
 	ldr	r2, [sp, #8]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bne	.L977
+	bne	.L978
 	ldrh	r3, [sp, #8]
 	strh	r3, [r8, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [r8, #6]
 	strh	r3, [r8, #4]	@ movhi
-.L977:
+.L978:
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #4]
 	cmp	r3, r2
-	bne	.L978
+	bne	.L979
 	ldr	r3, [sp, #20]
 	cmp	r10, r3
-	bne	.L978
+	bne	.L979
 	ldr	r1, [sp, #8]
 	mov	r2, r10
-.L1098:
+.L1099:
 	mov	r0, r8
 	bl	ftl_sb_update_avl_pages
-	b	.L1090
-.L963:
+	b	.L1091
+.L964:
 	uxth	r1, r3
 	adds	r1, r1, #8
 	ldrh	r0, [r8, r1, lsl #1]
-	b	.L962
-.L964:
+	b	.L963
+.L965:
 	ldr	r3, [sp, #4]
-	cbz	r3, .L966
-	movw	r2, #1802
-	ldr	r1, .L1099+32
-	ldr	r0, .L1099+36
+	cbz	r3, .L967
+	movw	r2, #1809
+	ldr	r1, .L1100+32
+	ldr	r0, .L1100+36
 	bl	printf
-.L966:
+.L967:
 	ldr	r3, [sp, #20]
-	cbz	r3, .L967
+	cbz	r3, .L968
 	cmp	r5, r3
-	beq	.L967
-	movw	r2, #1803
-	ldr	r1, .L1099+32
-	ldr	r0, .L1099+36
+	beq	.L968
+	movw	r2, #1810
+	ldr	r1, .L1100+32
+	ldr	r0, .L1100+36
 	bl	printf
-.L967:
+.L968:
 	movs	r3, #0
 	strh	r3, [r8, #2]	@ movhi
-	b	.L1097
-.L969:
+	b	.L1098
+.L970:
 	ldr	r1, [sp]
 	ldrh	r3, [r1], #2
 	cmp	r3, fp
 	str	r1, [sp]
-	beq	.L968
+	beq	.L969
 	mla	r1, r10, r5, r0
 	ldr	r6, [sp, #8]
 	orr	r3, r4, r3, lsl #10
@@ -7505,53 +7519,53 @@ FtlRecoverySuperblock:
 	bic	r3, r3, #3
 	add	r3, r3, r6
 	str	r3, [r1, #12]
-.L968:
+.L969:
 	adds	r2, r2, #1
-	b	.L965
-.L975:
+	b	.L966
+.L976:
 	ldr	r1, [r7]
-	cbnz	r1, .L971
+	cbnz	r1, .L972
 	ldr	r1, [r7, #12]
 	ldr	r6, [r1, #4]
 	str	r1, [sp, #8]
 	adds	r1, r6, #1
-	beq	.L972
+	beq	.L973
 	ldr	r1, [r2]
 	mov	r0, r6
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L972
+	cbz	r0, .L973
 	adds	r6, r6, #1
 	str	r6, [r2]
-.L972:
+.L973:
 	ldr	r1, [sp, #8]
 	ldr	r1, [r1]
 	adds	r1, r1, #1
-	bne	.L974
-.L973:
+	bne	.L975
+.L974:
 	uxth	r2, r4
 	uxth	r3, r3
 	str	r2, [sp, #8]
 	movs	r2, #20
 	mla	r10, r2, r3, r10
-	b	.L1091
-.L971:
+	b	.L1092
+.L972:
 	ldr	fp, [sp, #12]
-.L974:
+.L975:
 	adds	r3, r3, #1
 	adds	r7, r7, #20
-	b	.L970
-.L978:
+	b	.L971
+.L979:
 	movw	r3, #65535
 	cmp	fp, r3
-	bne	.L979
+	bne	.L980
 	ldrb	r3, [r8, #8]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L980
-.L979:
-	ldr	r3, .L1099+40
+	bne	.L981
+.L980:
+	ldr	r3, .L1100+40
 	uxth	r6, r4
 	uxth	r4, r4
-	ldr	r7, .L1099+8
+	ldr	r7, .L1100+8
 	ldr	r2, [r3]
 	adds	r2, r2, #1
 	itt	eq
@@ -7564,10 +7578,10 @@ FtlRecoverySuperblock:
 	subgt	r4, r6, #7
 	ldrle	r4, [sp, #4]
 	uxthgt	r4, r4
-.L983:
+.L984:
 	cmp	r4, r6
-	bhi	.L993
-	ldr	r3, .L1099+4
+	bhi	.L994
+	ldr	r3, .L1100+4
 	movw	lr, #65535
 	ldr	r0, [r7]
 	mov	ip, #20
@@ -7576,47 +7590,47 @@ FtlRecoverySuperblock:
 	str	r3, [sp, #12]
 	movs	r3, #0
 	mov	r5, r3
-	b	.L994
-.L985:
+	b	.L995
+.L986:
 	ldr	r1, [sp, #12]
 	ldrh	r2, [r1], #2
 	cmp	r2, lr
 	str	r1, [sp, #12]
-	beq	.L984
+	beq	.L985
 	mla	r1, ip, r5, r0
 	adds	r5, r5, #1
 	orr	r2, r4, r2, lsl #10
 	uxth	r5, r5
 	str	r2, [r1, #4]
-.L984:
+.L985:
 	adds	r3, r3, #1
-.L994:
+.L995:
 	uxth	r2, r3
 	cmp	fp, r2
-	bhi	.L985
+	bhi	.L986
 	mov	r1, r5
 	movs	r2, #0
 	bl	FlashReadPages
-	ldr	r3, .L1099+40
+	ldr	r3, .L1100+40
 	movs	r1, #20
 	movs	r0, #0
 	movw	ip, #65535
 	ldr	r2, [r3]
 	ldr	r3, [r7]
 	mla	r5, r1, r5, r3
-.L986:
+.L987:
 	cmp	r5, r3
-	bne	.L991
-	cbz	r0, .L992
-	ldr	r3, .L1099+40
+	bne	.L992
+	cbz	r0, .L993
+	ldr	r3, .L1100+40
 	str	r2, [r3]
-.L992:
+.L993:
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L983
-.L1100:
+	b	.L984
+.L1101:
 	.align	2
-.L1099:
+.L1100:
 	.word	.LANCHOR18
 	.word	.LANCHOR2
 	.word	.LANCHOR102
@@ -7628,22 +7642,22 @@ FtlRecoverySuperblock:
 	.word	.LANCHOR154
 	.word	.LC1
 	.word	.LANCHOR133
-.L991:
+.L992:
 	ldr	r1, [r3]
 	cmp	r1, #0
-	beq	.L987
-	cbz	r0, .L980
-.L1092:
-	ldr	r3, .L1101
+	beq	.L988
+	cbz	r0, .L981
+.L1093:
+	ldr	r3, .L1102
 	str	r2, [r3]
-.L980:
+.L981:
 	ldr	fp, [sp, #4]
 	movs	r2, #1
-	ldr	r6, .L1101+4
-	ldr	r3, .L1101+8
+	ldr	r6, .L1102+4
+	ldr	r3, .L1102+8
 	strh	r2, [r3]	@ movhi
-.L995:
-	ldr	r3, .L1101+12
+.L996:
+	ldr	r3, .L1102+12
 	movw	lr, #65535
 	ldr	r0, [r6]
 	movs	r7, #20
@@ -7651,64 +7665,64 @@ FtlRecoverySuperblock:
 	ldrh	r4, [r3]
 	movs	r3, #0
 	str	r3, [sp, #12]
-.L996:
+.L997:
 	uxth	r2, r3
 	cmp	r4, r2
-	bhi	.L998
+	bhi	.L999
 	movs	r2, #0
 	ldr	r1, [sp, #12]
 	bl	FlashReadPages
 	movs	r3, #0
-.L1096:
+.L1097:
 	str	r3, [sp, #24]
 	ldr	r2, [sp, #12]
 	ldrh	r3, [sp, #24]
 	cmp	r2, r3
-	bhi	.L1027
-	ldr	r3, .L1101+16
+	bhi	.L1028
+	ldr	r3, .L1102+16
 	add	fp, fp, #1
 	uxth	fp, fp
 	ldrh	r3, [r3]
 	cmp	r3, fp
-	bne	.L995
-	ldr	r2, .L1101+12
+	bne	.L996
+	ldr	r2, .L1102+12
 	movw	r0, #65535
 	movs	r3, #0
 	strh	fp, [r8, #2]	@ movhi
 	strh	r3, [r8, #4]	@ movhi
 	ldrh	r2, [r2]
-.L1028:
+.L1029:
 	uxth	r1, r3
 	cmp	r1, r2
-	bcs	.L1090
+	bcs	.L1091
 	ldr	r1, [sp, #16]
 	ldrh	r4, [r1], #2
 	cmp	r4, r0
 	str	r1, [sp, #16]
 	add	r1, r3, #1
-	bne	.L1097
+	bne	.L1098
 	mov	r3, r1
-	b	.L1028
-.L987:
+	b	.L1029
+.L988:
 	ldr	r1, [r3, #12]
 	ldrh	lr, [r1]
 	cmp	lr, ip
-	beq	.L990
+	beq	.L991
 	ldr	r1, [r1, #4]
 	cmp	r1, #-1
 	itt	ne
 	movne	r2, r1
 	movne	r0, #1
-.L990:
+.L991:
 	adds	r3, r3, #20
-	b	.L986
-.L993:
+	b	.L987
+.L994:
 	mov	r2, #-1
-	b	.L1092
-.L998:
+	b	.L1093
+.L999:
 	ldrh	r2, [r1], #2
 	cmp	r2, lr
-	beq	.L997
+	beq	.L998
 	ldr	r5, [sp, #12]
 	orr	r2, fp, r2, lsl #10
 	mla	ip, r7, r5, r0
@@ -7717,10 +7731,10 @@ FtlRecoverySuperblock:
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r2, [sp, #12]
-.L997:
+.L998:
 	adds	r3, r3, #1
-	b	.L996
-.L1027:
+	b	.L997
+.L1028:
 	ldr	r3, [sp, #24]
 	movs	r5, #20
 	muls	r5, r3, r5
@@ -7733,45 +7747,45 @@ FtlRecoverySuperblock:
 	bl	P2V_plane
 	ldr	r3, [sp, #4]
 	cmp	fp, r3
-	bcc	.L1000
+	bcc	.L1001
 	ldr	r3, [sp, #28]
-	bne	.L1001
+	bne	.L1002
 	ldr	r2, [sp, #20]
 	cmp	r2, r0
-	bhi	.L1000
-.L1001:
+	bhi	.L1001
+.L1002:
 	ldr	r2, [sp, #8]
 	cmp	fp, r2
-	bne	.L1002
+	bne	.L1003
 	cmp	r10, r0
-	beq	.L1003
-.L1002:
+	beq	.L1004
+.L1003:
 	ldr	r3, [r3, r5]
 	adds	r3, r3, #1
-	beq	.L1004
+	beq	.L1005
 	ldr	r3, [r7, #12]
 	movw	r2, #61589
 	ldrh	r1, [r3]
 	cmp	r1, r2
-	beq	.L1005
+	beq	.L1006
 	ldrh	r0, [r8]
-.L1093:
+.L1094:
 	bl	decrement_vpc_count
-	b	.L1000
-.L1005:
+	b	.L1001
+.L1006:
 	ldr	r2, [r3, #4]
 	str	r2, [sp]
 	adds	r2, r2, #1
-	beq	.L1006
-	ldr	r2, .L1101+20
+	beq	.L1007
+	ldr	r2, .L1102+20
 	ldr	r0, [sp]
 	ldr	r1, [r2]
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L1006
+	cbz	r0, .L1007
 	ldr	r1, [sp]
 	adds	r1, r1, #1
 	str	r1, [r2]
-.L1006:
+.L1007:
 	ldr	r4, [r3, #8]
 	add	r1, sp, #40
 	ldr	r3, [r3, #12]
@@ -7779,17 +7793,17 @@ FtlRecoverySuperblock:
 	mov	r0, r4
 	str	r3, [sp, #36]
 	bl	log2phys
-	ldr	r3, .L1101
+	ldr	r3, .L1102
 	ldr	r1, [r3]
 	adds	r3, r1, #1
-	beq	.L1007
+	beq	.L1008
 	ldr	r0, [sp]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1007
+	beq	.L1008
 	ldr	r3, [sp, #36]
 	adds	r7, r3, #1
-	beq	.L1008
+	beq	.L1009
 	ldr	r0, [r6]
 	movs	r2, #0
 	movs	r1, #1
@@ -7801,119 +7815,119 @@ FtlRecoverySuperblock:
 	ldr	r1, [r2, r5]
 	adds	r3, r2, r5
 	adds	r1, r1, #1
-	bne	.L1009
-.L1010:
+	bne	.L1010
+.L1011:
 	mov	r3, #-1
 	str	r3, [sp, #36]
-.L1017:
+.L1018:
 	ldr	r7, [sp, #36]
 	adds	r0, r7, #1
-	beq	.L1000
-.L1031:
+	beq	.L1001
+.L1032:
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L1101+24
+	ldr	r3, .L1102+24
 	mov	r4, r0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bhi	.L1023
-	movw	r2, #2059
-	ldr	r1, .L1101+28
-	ldr	r0, .L1101+32
+	bhi	.L1024
+	movw	r2, #2066
+	ldr	r1, .L1102+28
+	ldr	r0, .L1102+32
 	bl	printf
-.L1023:
-	ldr	r3, .L1101+36
+.L1024:
+	ldr	r3, .L1102+36
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
 	cmp	r3, #0
-	beq	.L1024
+	beq	.L1025
 	mov	r0, r4
-	b	.L1093
-.L1008:
+	b	.L1094
+.L1009:
 	ldr	r3, [sp, #44]
 	ldr	r2, [sp, #40]
 	cmp	r2, r3
-	bne	.L1000
+	bne	.L1001
 	movs	r2, #1
 	add	r1, sp, #36
 	mov	r0, r4
 	bl	log2phys
-.L1000:
+.L1001:
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	b	.L1096
-.L1009:
+	b	.L1097
+.L1010:
 	ldr	r1, [r7, #8]
 	cmp	r4, r1
-	bne	.L1010
-	ldr	r0, .L1101
+	bne	.L1011
+	ldr	r0, .L1102
 	ldr	r1, [r7, #4]
 	ldr	r0, [r0]
 	str	r1, [sp, #28]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1010
+	beq	.L1011
 	ldr	r1, [sp, #40]
 	ldr	r0, [sp, #44]
 	cmp	r1, r0
-	bne	.L1012
-.L1015:
+	bne	.L1013
+.L1016:
 	ldr	r1, [sp, #36]
 	mov	r0, r4
 	bl	FtlReUsePrevPpa
-	b	.L1010
-.L1012:
+	b	.L1011
+.L1013:
 	ldr	r0, [sp, #36]
 	cmp	r1, r0
-	beq	.L1010
+	beq	.L1011
 	adds	r0, r1, #1
-	beq	.L1013
+	beq	.L1014
 	str	r1, [r3, #4]
 	movs	r2, #0
 	movs	r1, #1
 	mov	r0, r3
 	ldr	r7, [r3, #12]
 	bl	FlashReadPages
-.L1014:
+.L1015:
 	ldr	r3, [r6]
 	ldr	r3, [r3, r5]
 	adds	r3, r3, #1
-	beq	.L1015
+	beq	.L1016
 	ldr	r3, [r7, #4]
-	ldr	r2, .L1101
+	ldr	r2, .L1102
 	mov	r1, r3
 	ldr	r0, [r2]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1015
+	beq	.L1016
 	mov	r1, r3
 	ldr	r0, [sp, #28]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1010
-	b	.L1015
-.L1013:
+	beq	.L1011
+	b	.L1016
+.L1014:
 	str	r1, [r2, r5]
-	b	.L1014
-.L1007:
+	b	.L1015
+.L1008:
 	ldr	r3, [sp, #44]
 	ldr	r2, [sp, #40]
 	cmp	r2, r3
-	beq	.L1017
+	beq	.L1018
 	ldr	r1, [sp, #36]
 	adds	r7, r1, #1
-	beq	.L1019
-	ldr	r3, .L1101+40
+	beq	.L1020
+	ldr	r3, .L1102+40
 	ldr	r3, [r3]
 	cmp	r3, r1, lsr #10
-	bhi	.L1019
-	ldr	r0, .L1101+44
-.L1095:
+	bhi	.L1020
+	ldr	r0, .L1102+44
+.L1096:
 	bl	printf
-	b	.L1000
-.L1102:
+	b	.L1001
+.L1103:
 	.align	2
-.L1101:
+.L1102:
 	.word	.LANCHOR133
 	.word	.LANCHOR102
 	.word	.LANCHOR155
@@ -7926,32 +7940,32 @@ FtlRecoverySuperblock:
 	.word	.LANCHOR41
 	.word	.LANCHOR7
 	.word	.LC27
-.L1019:
+.L1020:
 	movs	r2, #1
 	add	r1, sp, #44
 	mov	r0, r4
 	bl	log2phys
 	ldr	r7, [sp, #40]
 	adds	r5, r7, #1
-	beq	.L1017
+	beq	.L1018
 	ldr	r3, [sp, #36]
 	cmp	r7, r3
-	beq	.L1031
+	beq	.L1032
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L1103
+	ldr	r3, .L1104
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L1022
-	ldr	r3, .L1103+4
+	beq	.L1023
+	ldr	r3, .L1104+4
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L1022
-	ldr	r3, .L1103+8
+	beq	.L1023
+	ldr	r3, .L1104+8
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L1017
-.L1022:
+	bne	.L1018
+.L1023:
 	ldr	r0, [r6]
 	movs	r2, #0
 	movs	r1, #1
@@ -7961,57 +7975,57 @@ FtlRecoverySuperblock:
 	ldr	r3, [r6]
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L1017
+	beq	.L1018
 	ldr	r1, [r5, #4]
 	ldr	r0, [sp]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	bne	.L1017
+	bne	.L1018
 	movs	r2, #1
 	add	r1, sp, #40
 	mov	r0, r4
 	bl	log2phys
-	b	.L1017
-.L1024:
+	b	.L1018
+.L1025:
 	mov	r1, r4
-	ldr	r0, .L1103+12
-	b	.L1095
-.L1004:
-	ldr	r3, .L1103+16
+	ldr	r0, .L1104+12
+	b	.L1096
+.L1005:
+	ldr	r3, .L1104+16
 	ldr	r3, [r3]
 	cmp	r3, #31
-	bhi	.L1025
-	ldr	r2, .L1103+20
+	bhi	.L1026
+	ldr	r2, .L1104+20
 	str	r4, [r2, r3, lsl #2]
 	adds	r3, r3, #1
-	ldr	r2, .L1103+16
+	ldr	r2, .L1104+16
 	str	r3, [r2]
-.L1025:
+.L1026:
 	ldrh	r0, [r8]
 	bl	decrement_vpc_count
-	ldr	r3, .L1103+24
+	ldr	r3, .L1104+24
 	ldr	r2, [r3]
 	adds	r1, r2, #1
-	bne	.L1026
+	bne	.L1027
 	ldr	r2, [sp]
-.L1094:
+.L1095:
 	str	r2, [r3]
-	b	.L1000
-.L1026:
+	b	.L1001
+.L1027:
 	ldr	r1, [sp]
 	cmp	r1, r2
-	bcs	.L1000
+	bcs	.L1001
 	mov	r2, r1
-	b	.L1094
-.L1003:
+	b	.L1095
+.L1004:
 	strb	r10, [r8, #6]
 	mov	r2, r10
 	strh	fp, [r8, #2]	@ movhi
 	mov	r1, fp
-	b	.L1098
-.L1104:
+	b	.L1099
+.L1105:
 	.align	2
-.L1103:
+.L1104:
 	.word	.LANCHOR50
 	.word	.LANCHOR51
 	.word	.LANCHOR52
@@ -8033,56 +8047,56 @@ ftl_check_vpc:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r6, .L1129
-	ldr	r5, .L1129+4
-	ldr	r1, .L1129+8
-	ldr	r0, .L1129+12
+	ldr	r6, .L1130
+	ldr	r5, .L1130+4
+	ldr	r1, .L1130+8
+	ldr	r0, .L1130+12
 	bl	printf
 	mov	r2, #8192
 	movs	r1, #0
-	ldr	r0, .L1129+4
+	ldr	r0, .L1130+4
 	bl	ftl_memset
-.L1106:
+.L1107:
 	ldr	r3, [r6]
 	cmp	r4, r3
-	bcc	.L1108
-	ldr	r10, .L1129+48
+	bcc	.L1109
+	ldr	r10, .L1130+48
 	movs	r4, #0
-	ldr	r7, .L1129+16
+	ldr	r7, .L1130+16
 	mov	r6, r4
-.L1109:
+.L1110:
 	ldrh	r2, [r10]
 	uxth	r3, r4
 	cmp	r2, r3
-	bhi	.L1111
-	ldr	r3, .L1129+20
+	bhi	.L1112
+	ldr	r3, .L1130+20
 	ldr	r4, [r3]
-	cbz	r4, .L1112
-	ldr	r3, .L1129+24
+	cbz	r4, .L1113
+	ldr	r3, .L1130+24
 	mov	r8, #0
-	ldr	r5, .L1129+28
-	ldr	r10, .L1129+16
+	ldr	r5, .L1130+28
+	ldr	r10, .L1130+16
 	ldrh	r7, [r3]
 	ldr	r3, [r5]
-	ldr	fp, .L1129+4
+	ldr	fp, .L1130+4
 	subs	r4, r4, r3
-	ldr	r3, .L1129+32
+	ldr	r3, .L1130+32
 	asrs	r4, r4, #1
 	muls	r4, r3, r4
 	uxth	r4, r4
-.L1113:
+.L1114:
 	uxth	r3, r8
 	cmp	r7, r3
-	bls	.L1112
+	bls	.L1113
 	ldr	r3, [r10]
 	ldrh	r2, [r3, r4, lsl #1]
-	cbz	r2, .L1114
+	cbz	r2, .L1115
 	movs	r6, #1
 	ldrh	r3, [fp, r4, lsl #1]
 	mov	r1, r4
-	ldr	r0, .L1129+36
+	ldr	r0, .L1130+36
 	bl	printf
-.L1114:
+.L1115:
 	movs	r3, #6
 	ldr	r2, [r5]
 	muls	r4, r3, r4
@@ -8090,59 +8104,59 @@ ftl_check_vpc:
 	add	r8, r8, #1
 	ldrh	r4, [r2, r4]
 	cmp	r4, r3
-	bne	.L1113
-.L1112:
-	cbz	r6, .L1105
-	movw	r2, #2387
-	ldr	r1, .L1129+8
-	ldr	r0, .L1129+40
+	bne	.L1114
+.L1113:
+	cbz	r6, .L1106
+	movw	r2, #2394
+	ldr	r1, .L1130+8
+	ldr	r0, .L1130+40
 	bl	printf
-.L1105:
+.L1106:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1108:
+.L1109:
 	movs	r2, #0
 	add	r1, sp, #4
 	mov	r0, r4
 	bl	log2phys
 	ldr	r0, [sp, #4]
 	adds	r3, r0, #1
-	beq	.L1107
+	beq	.L1108
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r5, r0, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r5, r0, lsl #1]	@ movhi
-.L1107:
+.L1108:
 	adds	r4, r4, #1
-	b	.L1106
-.L1111:
+	b	.L1107
+.L1112:
 	ldr	r3, [r7]
 	uxth	r5, r4
-	ldr	r8, .L1129+4
+	ldr	r8, .L1130+4
 	ldrh	r2, [r3, r5, lsl #1]
 	ldrh	r3, [r8, r5, lsl #1]
 	cmp	r2, r3
-	beq	.L1110
+	beq	.L1111
 	mov	r1, r5
-	ldr	r0, .L1129+44
+	ldr	r0, .L1130+44
 	bl	printf
 	ldr	r3, [r7]
 	movw	r2, #65535
 	ldrh	r3, [r3, r5, lsl #1]
 	cmp	r3, r2
-	beq	.L1110
+	beq	.L1111
 	ldrh	r2, [r8, r5, lsl #1]
 	cmp	r2, r3
 	it	hi
 	movhi	r6, #1
-.L1110:
+.L1111:
 	adds	r4, r4, #1
-	b	.L1109
-.L1130:
+	b	.L1110
+.L1131:
 	.align	2
-.L1129:
+.L1130:
 	.word	.LANCHOR151
 	.word	check_vpc_table
 	.word	.LANCHOR158
@@ -8170,60 +8184,60 @@ ftl_scan_all_data:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r5, #0
-	ldr	r7, .L1145
+	ldr	r7, .L1146
 	sub	sp, sp, #32
 	movs	r1, #0
-	ldr	r8, .L1145+24
-	ldr	r0, .L1145+4
+	ldr	r8, .L1146+24
+	ldr	r0, .L1146+4
 	bl	printf
-.L1132:
+.L1133:
 	ldr	r3, [r7]
 	cmp	r5, r3
-	bcc	.L1138
+	bcc	.L1139
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1138:
+.L1139:
 	movs	r2, #0
 	add	r1, sp, #28
 	mov	r0, r5
 	bl	log2phys
 	ubfx	r3, r5, #0, #11
-	cbnz	r3, .L1133
+	cbnz	r3, .L1134
 	ldr	r2, [sp, #28]
 	mov	r1, r5
 	mov	r0, r8
 	bl	printf
-.L1133:
+.L1134:
 	ldr	r3, [sp, #28]
 	adds	r2, r3, #1
-	beq	.L1135
-	ldr	r4, .L1145+8
+	beq	.L1136
+	ldr	r4, .L1146+8
 	movs	r2, #0
 	movs	r1, #1
 	str	r3, [r4, #4]
 	mov	r0, r4
-	ldr	r3, .L1145+12
+	ldr	r3, .L1146+12
 	str	r5, [r4, #16]
 	str	r2, [r4]
 	ldr	r3, [r3]
 	str	r3, [r4, #8]
-	ldr	r3, .L1145+16
+	ldr	r3, .L1146+16
 	ldr	r6, [r3]
 	str	r6, [r4, #12]
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	cmp	r3, #256
-	beq	.L1136
+	beq	.L1137
 	adds	r3, r3, #1
-	beq	.L1136
+	beq	.L1137
 	ldr	r3, [r6, #8]
 	cmp	r5, r3
-	beq	.L1135
-.L1136:
+	beq	.L1136
+.L1137:
 	ldr	r2, [r4, #8]
 	ldr	r3, [r4, #12]
-	ldr	r0, .L1145+20
+	ldr	r0, .L1146+20
 	ldr	r1, [r2, #4]
 	str	r1, [sp, #16]
 	mov	r1, r5
@@ -8238,12 +8252,12 @@ ftl_scan_all_data:
 	ldr	r2, [r4, #4]
 	ldr	r3, [r3]
 	bl	printf
-.L1135:
+.L1136:
 	adds	r5, r5, #1
-	b	.L1132
-.L1146:
+	b	.L1133
+.L1147:
 	.align	2
-.L1145:
+.L1146:
 	.word	.LANCHOR151
 	.word	.LC32
 	.word	.LANCHOR137
@@ -8263,7 +8277,7 @@ ftl_scan_all_data:
 FtlGcScanTempBlk:
 	@ args = 0, pretend = 0, frame = 48
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1179
+	ldr	r3, .L1180
 	movw	r2, #65535
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #48
@@ -8271,29 +8285,29 @@ FtlGcScanTempBlk:
 	ldrh	r5, [r3]
 	str	r3, [sp, #20]
 	cmp	r5, r2
-	beq	.L1169
-	cbnz	r5, .L1148
-.L1149:
+	beq	.L1170
+	cbnz	r5, .L1149
+.L1150:
 	bl	FtlGcPageVarInit
-	b	.L1150
-.L1169:
+	b	.L1151
+.L1170:
 	movs	r5, #0
-.L1148:
-	ldr	r3, .L1179+4
+.L1149:
+	ldr	r3, .L1180+4
 	ldrh	r3, [r3]
 	cmp	r3, r1
-	beq	.L1149
-.L1150:
-	ldr	fp, .L1179+56
-.L1166:
+	beq	.L1150
+.L1151:
+	ldr	fp, .L1180+56
+.L1167:
 	ldrh	r2, [r4]
 	movs	r3, #0
 	strb	r3, [r4, #8]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1151
-.L1168:
-	ldr	r3, .L1179+8
+	beq	.L1152
+.L1169:
+	ldr	r3, .L1180+8
 	movs	r2, #0
 	ldr	r0, [fp]
 	mov	r10, r2
@@ -8301,38 +8315,38 @@ FtlGcScanTempBlk:
 	mov	r8, #20
 	ldrh	r3, [r3]
 	str	r3, [sp, #8]
-	ldr	r3, .L1179+12
+	ldr	r3, .L1180+12
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L1179+16
+	ldr	r3, .L1180+16
 	ldrh	r3, [r3]
 	str	r3, [sp, #16]
-	ldr	r3, .L1179+20
+	ldr	r3, .L1180+20
 	ldr	r7, [r3]
-	ldr	r3, .L1179+24
+	ldr	r3, .L1180+24
 	ldrh	ip, [r3]
 	add	r3, r4, #16
 	str	r3, [sp, #4]
-.L1152:
+.L1153:
 	ldr	r1, [sp, #8]
 	uxth	r3, r2
 	cmp	r1, r3
-	bhi	.L1154
+	bhi	.L1155
 	mov	r8, #0
 	movs	r2, #0
 	mov	r1, r10
 	bl	FlashReadPages
-.L1155:
+.L1156:
 	uxth	r3, r8
 	cmp	r10, r3
-	bhi	.L1167
-	ldr	r3, .L1179+4
+	bhi	.L1168
+	ldr	r3, .L1180+4
 	adds	r5, r5, #1
 	uxth	r5, r5
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	bhi	.L1168
-.L1151:
+	bhi	.L1169
+.L1152:
 	ldr	r2, [sp, #20]
 	movw	r3, #65535
 	mov	r0, r4
@@ -8346,12 +8360,12 @@ FtlGcScanTempBlk:
 	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1154:
+.L1155:
 	ldr	r1, [sp, #4]
 	ldrh	r3, [r1], #2
 	cmp	r3, lr
 	str	r1, [sp, #4]
-	beq	.L1153
+	beq	.L1154
 	mla	r1, r8, r10, r0
 	orr	r3, r5, r3, lsl #10
 	str	r3, [r1, #4]
@@ -8368,10 +8382,10 @@ FtlGcScanTempBlk:
 	str	r3, [r1, #12]
 	add	r3, r10, #1
 	uxth	r10, r3
-.L1153:
+.L1154:
 	adds	r2, r2, #1
-	b	.L1152
-.L1167:
+	b	.L1153
+.L1168:
 	movs	r3, #20
 	ldr	r2, [fp]
 	mul	r3, r3, r8
@@ -8381,18 +8395,18 @@ FtlGcScanTempBlk:
 	ldr	r7, [r1, #12]
 	str	r0, [sp, #4]
 	cmp	r6, #0
-	bne	.L1156
+	bne	.L1157
 	ldrh	r1, [r7]
 	movw	r2, #65535
 	cmp	r1, r2
-	beq	.L1177
-	ldr	r2, .L1179+28
+	beq	.L1178
+	ldr	r2, .L1180+28
 	ldr	r0, [r7, #8]
 	ldr	r2, [r2]
 	cmp	r0, r2
-	bls	.L1158
-.L1177:
-	ldr	r3, .L1179+32
+	bls	.L1159
+.L1178:
+	ldr	r3, .L1180+32
 	movs	r1, #0
 	ldrh	r2, [r4]
 	movs	r5, #0
@@ -8400,13 +8414,13 @@ FtlGcScanTempBlk:
 	strh	r1, [r3, r2, lsl #1]	@ movhi
 	ldrh	r0, [r4]
 	bl	INSERT_FREE_LIST
-	ldr	r2, .L1179+36
+	ldr	r2, .L1180+36
 	movw	r3, #65535
 	strh	r3, [r4]	@ movhi
 	strh	r3, [r2]	@ movhi
 	bl	FtlGcPageVarInit
-	b	.L1166
-.L1158:
+	b	.L1167
+.L1159:
 	mov	r2, r6
 	add	r1, sp, #24
 	str	r3, [sp, #8]
@@ -8415,59 +8429,59 @@ FtlGcScanTempBlk:
 	ldr	r1, [sp, #24]
 	ldr	r3, [sp, #8]
 	cmp	r2, r1
-	beq	.L1160
-.L1162:
+	beq	.L1161
+.L1163:
 	ldr	r2, [r7, #8]
-.L1178:
+.L1179:
 	ldr	r1, [sp, #4]
 	add	r8, r8, #1
 	ldr	r0, [r7, #12]
 	bl	FtlGcUpdatePage
-	b	.L1155
-.L1160:
+	b	.L1156
+.L1161:
 	str	r3, [sp, #8]
 	adds	r3, r2, #1
-	beq	.L1162
+	beq	.L1163
 	str	r2, [sp, #32]
 	movs	r1, #1
-	ldr	r2, .L1179+40
+	ldr	r2, .L1180+40
 	add	r0, sp, #28
 	ldr	r2, [r2]
 	str	r2, [sp, #36]
-	ldr	r2, .L1179+44
+	ldr	r2, .L1180+44
 	ldr	r2, [r2]
 	str	r2, [sp, #40]
 	mov	r2, r6
 	bl	FlashReadPages
-	ldr	r2, .L1179+48
+	ldr	r2, .L1180+48
 	ldr	r1, [fp]
 	ldr	r3, [sp, #8]
 	ldrh	r2, [r2]
 	ldr	r0, [sp, #36]
 	add	ip, r3, r1
 	lsls	r2, r2, #7
-.L1163:
+.L1164:
 	cmp	r6, r2
-	beq	.L1162
+	beq	.L1163
 	ldr	r1, [ip, #8]
 	ldr	r3, [r0, r6, lsl #2]
 	ldr	r1, [r1, r6, lsl #2]
 	cmp	r1, r3
-	beq	.L1164
+	beq	.L1165
 	ldr	r2, [sp, #32]
 	ldrh	r1, [r4]
-	ldr	r0, .L1179+52
+	ldr	r0, .L1180+52
 	bl	printf
-	b	.L1177
-.L1164:
+	b	.L1178
+.L1165:
 	adds	r6, r6, #1
-	b	.L1163
-.L1156:
+	b	.L1164
+.L1157:
 	mov	r2, #-1
-	b	.L1178
-.L1180:
+	b	.L1179
+.L1181:
 	.align	2
-.L1179:
+.L1180:
 	.word	.LANCHOR159
 	.word	.LANCHOR18
 	.word	.LANCHOR2
@@ -8495,7 +8509,7 @@ FtlGcScanTempBlk:
 FtlVendorPartWrite:
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1193
+	ldr	r3, .L1194
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #104
 	str	r2, [sp]
@@ -8504,26 +8518,26 @@ FtlVendorPartWrite:
 	mov	r5, r1
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1189
-	ldr	r3, .L1193+4
+	bhi	.L1190
+	ldr	r3, .L1194+4
 	mov	r8, #0
 	ldrh	r6, [r3]
 	lsr	r6, r0, r6
 	lsl	fp, r6, #2
-.L1183:
-	cbnz	r5, .L1188
-.L1181:
+.L1184:
+	cbnz	r5, .L1189
+.L1182:
 	mov	r0, r8
 	add	sp, sp, #104
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1188:
-	ldr	r3, .L1193+8
+.L1189:
+	ldr	r3, .L1194+8
 	mov	r0, r7
-	ldr	r10, .L1193+24
+	ldr	r10, .L1194+24
 	ldr	r3, [r3]
 	ldr	r2, [r3, fp]
-	ldr	r3, .L1193+12
+	ldr	r3, .L1194+12
 	str	r2, [sp, #12]
 	ldrh	r3, [r3]
 	mov	r1, r3
@@ -8537,9 +8551,9 @@ FtlVendorPartWrite:
 	cmp	r5, r4
 	it	cc
 	uxthcc	r4, r5
-	cbz	r2, .L1185
+	cbz	r2, .L1186
 	cmp	r4, r3
-	beq	.L1185
+	beq	.L1186
 	ldr	r3, [r10]
 	add	r0, sp, #20
 	str	r2, [sp, #24]
@@ -8549,7 +8563,7 @@ FtlVendorPartWrite:
 	add	r3, sp, #40
 	str	r3, [sp, #32]
 	bl	FlashReadPages
-.L1186:
+.L1187:
 	lsls	r3, r4, #9
 	ldr	r0, [r10]
 	subs	r5, r5, r4
@@ -8562,7 +8576,7 @@ FtlVendorPartWrite:
 	bl	ftl_memcpy
 	ldr	r2, [r10]
 	mov	r1, r6
-	ldr	r0, .L1193+16
+	ldr	r0, .L1194+16
 	adds	r6, r6, #1
 	bl	FtlMapWritePage
 	ldr	r3, [sp]
@@ -8573,20 +8587,20 @@ FtlVendorPartWrite:
 	ldr	r3, [sp, #8]
 	add	r2, r2, r3
 	str	r2, [sp]
-	b	.L1183
-.L1185:
-	ldr	r3, .L1193+20
+	b	.L1184
+.L1186:
+	ldr	r3, .L1194+20
 	movs	r1, #0
 	ldr	r0, [r10]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-	b	.L1186
-.L1189:
+	b	.L1187
+.L1190:
 	mov	r8, #-1
-	b	.L1181
-.L1194:
+	b	.L1182
+.L1195:
 	.align	2
-.L1193:
+.L1194:
 	.word	.LANCHOR15
 	.word	.LANCHOR21
 	.word	.LANCHOR122
@@ -8607,60 +8621,60 @@ Ftl_save_ext_data:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L1197
-	ldr	r3, .L1197+4
+	ldr	r2, .L1198
+	ldr	r3, .L1198+4
 	ldr	r1, [r2]
 	cmp	r1, r3
-	bne	.L1195
-	ldr	r3, .L1197+8
+	bne	.L1196
+	ldr	r3, .L1198+8
 	movs	r1, #1
 	movs	r0, #0
 	str	r3, [r2, #4]
-	ldr	r3, .L1197+12
+	ldr	r3, .L1198+12
 	ldr	r3, [r3]
 	str	r3, [r2, #88]
-	ldr	r3, .L1197+16
+	ldr	r3, .L1198+16
 	ldr	r3, [r3]
 	str	r3, [r2, #92]
-	ldr	r3, .L1197+20
+	ldr	r3, .L1198+20
 	ldr	r3, [r3]
 	str	r3, [r2, #8]
-	ldr	r3, .L1197+24
+	ldr	r3, .L1198+24
 	ldr	r3, [r3]
 	str	r3, [r2, #12]
-	ldr	r3, .L1197+28
+	ldr	r3, .L1198+28
 	ldr	r3, [r3]
 	str	r3, [r2, #16]
-	ldr	r3, .L1197+32
+	ldr	r3, .L1198+32
 	ldr	r3, [r3]
 	str	r3, [r2, #20]
-	ldr	r3, .L1197+36
+	ldr	r3, .L1198+36
 	ldr	r3, [r3]
 	str	r3, [r2, #28]
-	ldr	r3, .L1197+40
+	ldr	r3, .L1198+40
 	ldr	r3, [r3]
 	str	r3, [r2, #32]
-	ldr	r3, .L1197+44
+	ldr	r3, .L1198+44
 	ldr	r3, [r3]
 	str	r3, [r2, #36]
-	ldr	r3, .L1197+48
+	ldr	r3, .L1198+48
 	ldr	r3, [r3]
 	str	r3, [r2, #40]
-	ldr	r3, .L1197+52
+	ldr	r3, .L1198+52
 	ldr	r3, [r3]
 	str	r3, [r2, #44]
-	ldr	r3, .L1197+56
+	ldr	r3, .L1198+56
 	ldr	r3, [r3]
 	str	r3, [r2, #48]
 	b	FtlVendorPartWrite
-.L1195:
+.L1196:
 	bx	lr
-.L1198:
+.L1199:
 	.align	2
-.L1197:
+.L1198:
 	.word	.LANCHOR134
 	.word	1179929683
-	.word	1342177365
+	.word	1342177366
 	.word	.LANCHOR161
 	.word	.LANCHOR162
 	.word	.LANCHOR83
@@ -8685,7 +8699,7 @@ Ftl_save_ext_data:
 FtlEctTblFlush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L1204
+	ldr	r2, .L1205
 	push	{r3, lr}
 	ldrh	r3, [r2]
 	cmp	r3, #31
@@ -8694,22 +8708,22 @@ FtlEctTblFlush:
 	movhi	r3, #32
 	strhls	r3, [r2]	@ movhi
 	movls	r3, #1
-	ldr	r2, .L1204+4
-	cbnz	r0, .L1201
+	ldr	r2, .L1205+4
+	cbnz	r0, .L1202
 	ldr	r1, [r2]
 	ldr	r0, [r1, #20]
 	ldr	r1, [r1, #16]
 	add	r3, r3, r0
 	cmp	r1, r3
-	bcc	.L1202
-.L1201:
+	bcc	.L1203
+.L1202:
 	ldr	r2, [r2]
 	movs	r0, #64
 	ldr	r3, [r2, #16]
 	str	r3, [r2, #20]
-	ldr	r3, .L1204+8
+	ldr	r3, .L1205+8
 	str	r3, [r2]
-	ldr	r3, .L1204+12
+	ldr	r3, .L1205+12
 	ldrh	r1, [r3]
 	lsls	r3, r1, #9
 	str	r3, [r2, #12]
@@ -8720,12 +8734,12 @@ FtlEctTblFlush:
 	str	r3, [r2, #4]
 	bl	FtlVendorPartWrite
 	bl	Ftl_save_ext_data
-.L1202:
+.L1203:
 	movs	r0, #0
 	pop	{r3, pc}
-.L1205:
+.L1206:
 	.align	2
-.L1204:
+.L1205:
 	.word	.LANCHOR163
 	.word	.LANCHOR117
 	.word	1112818501
@@ -8757,7 +8771,7 @@ sftl_vendor_write:
 FtlVendorPartRead:
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1217
+	ldr	r3, .L1218
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, r2
 	adds	r2, r0, r1
@@ -8766,28 +8780,28 @@ FtlVendorPartRead:
 	mov	r6, r1
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1216
-	ldr	r3, .L1217+4
+	bhi	.L1217
+	ldr	r3, .L1218+4
 	mov	r8, #0
-	ldr	fp, .L1217+28
+	ldr	fp, .L1218+28
 	ldrh	r5, [r3]
 	lsr	r5, r0, r5
 	lsls	r3, r5, #2
 	str	r3, [sp]
-.L1209:
-	cbnz	r6, .L1215
-.L1207:
+.L1210:
+	cbnz	r6, .L1216
+.L1208:
 	mov	r0, r8
 	add	sp, sp, #104
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1215:
-	ldr	r3, .L1217+8
+.L1216:
+	ldr	r3, .L1218+8
 	mov	r0, r7
 	ldr	r2, [sp]
 	ldr	r3, [r3]
 	ldr	r3, [r3, r2]
-	ldr	r2, .L1217+12
+	ldr	r2, .L1218+12
 	str	r3, [sp, #8]
 	ldrh	r4, [r2]
 	mov	r1, r4
@@ -8802,7 +8816,7 @@ FtlVendorPartRead:
 	lsls	r2, r4, #9
 	str	r2, [sp, #8]
 	cmp	r3, #0
-	beq	.L1211
+	beq	.L1212
 	ldr	r2, [fp]
 	add	r0, sp, #20
 	str	r3, [sp, #24]
@@ -8816,28 +8830,28 @@ FtlVendorPartRead:
 	ldr	r2, [sp, #20]
 	ldr	r3, [sp, #12]
 	adds	r2, r2, #1
-	ldr	r2, .L1217+16
+	ldr	r2, .L1218+16
 	it	eq
 	moveq	r8, #-1
 	ldr	r2, [r2]
 	cmp	r2, #256
-	bne	.L1213
+	bne	.L1214
 	mov	r2, r3
 	mov	r1, r5
-	ldr	r0, .L1217+20
+	ldr	r0, .L1218+20
 	bl	printf
 	ldr	r2, [fp]
 	mov	r1, r5
-	ldr	r0, .L1217+24
+	ldr	r0, .L1218+24
 	bl	FtlMapWritePage
-.L1213:
+.L1214:
 	ldr	r1, [fp]
 	lsls	r2, r4, #9
 	ldr	r3, [sp, #4]
 	mov	r0, r10
 	add	r1, r1, r3, lsl #9
 	bl	ftl_memcpy
-.L1214:
+.L1215:
 	ldr	r3, [sp, #8]
 	adds	r5, r5, #1
 	subs	r6, r6, r4
@@ -8846,19 +8860,19 @@ FtlVendorPartRead:
 	ldr	r3, [sp]
 	adds	r3, r3, #4
 	str	r3, [sp]
-	b	.L1209
-.L1211:
+	b	.L1210
+.L1212:
 	lsls	r2, r4, #9
 	mov	r1, r3
 	mov	r0, r10
 	bl	ftl_memset
-	b	.L1214
-.L1216:
+	b	.L1215
+.L1217:
 	mov	r8, #-1
-	b	.L1207
-.L1218:
+	b	.L1208
+.L1219:
 	.align	2
-.L1217:
+.L1218:
 	.word	.LANCHOR15
 	.word	.LANCHOR21
 	.word	.LANCHOR122
@@ -8881,30 +8895,30 @@ FtlLoadEctTbl:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r0, #64
-	ldr	r4, .L1221
-	ldr	r5, .L1221+4
+	ldr	r4, .L1222
+	ldr	r5, .L1222+4
 	ldr	r2, [r4]
 	ldrh	r1, [r5]
 	bl	FtlVendorPartRead
 	ldr	r3, [r4]
 	ldr	r2, [r3]
-	ldr	r3, .L1221+8
+	ldr	r3, .L1222+8
 	cmp	r2, r3
-	beq	.L1220
-	ldr	r1, .L1221+12
-	ldr	r0, .L1221+16
+	beq	.L1221
+	ldr	r1, .L1222+12
+	ldr	r0, .L1222+16
 	bl	printf
 	ldrh	r2, [r5]
 	movs	r1, #0
 	ldr	r0, [r4]
 	lsls	r2, r2, #9
 	bl	ftl_memset
-.L1220:
+.L1221:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L1222:
+.L1223:
 	.align	2
-.L1221:
+.L1222:
 	.word	.LANCHOR117
 	.word	.LANCHOR115
 	.word	1112818501
@@ -8924,75 +8938,75 @@ Ftl_load_ext_data:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r1, #1
-	ldr	r4, .L1226
+	ldr	r4, .L1227
 	movs	r0, #0
-	ldr	r5, .L1226+4
+	ldr	r5, .L1227+4
 	mov	r2, r4
 	bl	FtlVendorPartRead
 	ldr	r3, [r4]
 	cmp	r3, r5
-	beq	.L1224
+	beq	.L1225
 	mov	r2, #512
 	movs	r1, #0
 	mov	r0, r4
 	bl	ftl_memset
 	str	r5, [r4]
-.L1224:
+.L1225:
 	ldr	r3, [r4]
 	cmp	r3, r5
-	ldr	r3, .L1226+8
-	bne	.L1225
+	ldr	r3, .L1227+8
+	bne	.L1226
 	ldr	r1, [r4, #88]
-	ldr	r2, .L1226+12
+	ldr	r2, .L1227+12
 	str	r1, [r2]
 	ldr	r1, [r4, #92]
-	ldr	r2, .L1226+16
+	ldr	r2, .L1227+16
 	str	r1, [r2]
 	ldr	r1, [r4, #8]
-	ldr	r2, .L1226+20
+	ldr	r2, .L1227+20
 	str	r1, [r2]
 	ldr	r1, [r4, #12]
-	ldr	r2, .L1226+24
+	ldr	r2, .L1227+24
 	str	r1, [r2]
 	ldr	r1, [r4, #16]
-	ldr	r2, .L1226+28
+	ldr	r2, .L1227+28
 	str	r1, [r2]
 	ldr	r1, [r4, #20]
-	ldr	r2, .L1226+32
+	ldr	r2, .L1227+32
 	str	r1, [r2]
 	ldr	r2, [r4, #28]
 	ldr	r1, [r4, #32]
 	str	r2, [r3]
-	ldr	r2, .L1226+36
+	ldr	r2, .L1227+36
 	str	r1, [r2]
 	ldr	r1, [r4, #36]
-	ldr	r2, .L1226+40
+	ldr	r2, .L1227+40
 	str	r1, [r2]
 	ldr	r1, [r4, #40]
-	ldr	r2, .L1226+44
+	ldr	r2, .L1227+44
 	str	r1, [r2]
 	ldr	r1, [r4, #44]
-	ldr	r2, .L1226+48
+	ldr	r2, .L1227+48
 	str	r1, [r2]
 	ldr	r1, [r4, #48]
-	ldr	r2, .L1226+52
+	ldr	r2, .L1227+52
 	str	r1, [r2]
-.L1225:
-	ldr	r1, .L1226+56
-	ldr	r2, .L1226+60
+.L1226:
+	ldr	r1, .L1227+56
+	ldr	r2, .L1227+60
 	ldr	r3, [r3]
 	ldr	r0, [r1]
 	ldrh	r2, [r2]
-	ldr	r1, .L1226+64
+	ldr	r1, .L1227+64
 	mla	r0, r0, r2, r3
 	ldrh	r1, [r1]
 	bl	__aeabi_uidiv
-	ldr	r3, .L1226+68
+	ldr	r3, .L1227+68
 	str	r0, [r3]
 	pop	{r3, r4, r5, pc}
-.L1227:
+.L1228:
 	.align	2
-.L1226:
+.L1227:
 	.word	.LANCHOR134
 	.word	1179929683
 	.word	.LANCHOR90
@@ -9042,30 +9056,30 @@ FtlMapBlkWriteDump_data:
 	mov	r4, r0
 	ldr	r3, [r0, #36]
 	cmp	r3, #0
-	beq	.L1229
+	beq	.L1230
 	movs	r3, #0
-	ldr	r5, .L1241
+	ldr	r5, .L1242
 	str	r3, [r0, #36]
-	ldr	r3, .L1241+4
+	ldr	r3, .L1242+4
 	ldrh	r6, [r0, #6]
 	mov	r7, r5
 	ldr	r10, [r0, #24]
 	ldr	r3, [r3]
 	str	r3, [r5, #8]
-	ldr	r3, .L1241+8
+	ldr	r3, .L1242+8
 	ldr	r8, [r3]
 	ldrh	r3, [r0, #2]
 	str	r8, [r5, #12]
-	cbz	r3, .L1231
-	ldr	r2, .L1241+12
+	cbz	r3, .L1232
+	ldr	r2, .L1242+12
 	ldrh	r2, [r2]
 	subs	r2, r2, #1
 	cmp	r3, r2
-	bge	.L1231
+	bge	.L1232
 	ldrh	r2, [r0]
 	movw	r1, #65535
 	cmp	r2, r1
-	beq	.L1231
+	beq	.L1232
 	ldr	r1, [r0, #12]
 	subs	r3, r3, #1
 	mov	r0, r5
@@ -9077,44 +9091,44 @@ FtlMapBlkWriteDump_data:
 	bl	FlashReadPages
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L1231
+	beq	.L1232
 	ldr	r3, [r4, #24]
 	ldrh	r1, [r8, #8]
 	ldr	r2, [r3, r1, lsl #2]
 	ldr	r3, [r5, #4]
 	cmp	r2, r3
-	bne	.L1231
+	bne	.L1232
 	ldr	r2, [r5, #8]
-.L1240:
+.L1241:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
 	b	FtlMapWritePage
-.L1231:
+.L1232:
 	subs	r6, r6, #1
 	uxth	r6, r6
 	ldr	r3, [r10, r6, lsl #2]
 	str	r3, [r7, #4]
-	cbz	r3, .L1232
+	cbz	r3, .L1233
 	movs	r2, #1
-	ldr	r0, .L1241
+	ldr	r0, .L1242
 	mov	r1, r2
 	bl	FlashReadPages
-.L1233:
+.L1234:
 	ldr	r2, [r7, #8]
 	mov	r1, r6
-	b	.L1240
-.L1232:
-	ldr	r3, .L1241+16
+	b	.L1241
+.L1233:
+	ldr	r3, .L1242+16
 	movs	r1, #255
 	ldr	r0, [r7, #8]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-	b	.L1233
-.L1229:
+	b	.L1234
+.L1230:
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L1242:
+.L1243:
 	.align	2
-.L1241:
+.L1242:
 	.word	.LANCHOR137
 	.word	.LANCHOR106
 	.word	.LANCHOR113
@@ -9134,11 +9148,11 @@ FtlVpcTblFlush:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r8, #0
-	ldr	r3, .L1258
-	ldr	r5, .L1258+4
-	ldr	fp, .L1258+72
+	ldr	r3, .L1259
+	ldr	r5, .L1259+4
+	ldr	fp, .L1259+72
 	ldr	r0, [r3]
-	ldr	r6, .L1258+8
+	ldr	r6, .L1259+8
 	ldr	r7, [fp]
 	ldrh	r2, [r5]
 	str	r0, [r6, #8]
@@ -9147,22 +9161,22 @@ FtlVpcTblFlush:
 	movw	r2, #61604
 	strh	r2, [r7]	@ movhi
 	ldr	r2, [r5, #8]
-	ldr	r4, .L1258+12
-	ldr	ip, .L1258+76
+	ldr	r4, .L1259+12
+	ldr	ip, .L1259+76
 	str	r2, [r7, #4]
-	ldr	r2, .L1258+16
+	ldr	r2, .L1259+16
 	str	r8, [r7, #8]
 	str	r8, [r7, #12]
 	stm	r4, {r2, ip}
 	ldrh	r2, [r5, #6]
 	str	r3, [sp]
-	ldr	r10, .L1258+80
+	ldr	r10, .L1259+80
 	strh	r2, [r4, #8]	@ movhi
-	ldr	r2, .L1258+20
-	ldr	r3, .L1258+24
+	ldr	r2, .L1259+20
+	ldr	r3, .L1259+24
 	ldrh	r2, [r2]
 	strb	r2, [r4, #10]
-	ldr	r2, .L1258+28
+	ldr	r2, .L1259+28
 	ldrh	r1, [r2]
 	ldrh	ip, [r2, #2]
 	strh	r1, [r4, #14]	@ movhi
@@ -9170,7 +9184,7 @@ FtlVpcTblFlush:
 	ldrb	r2, [r2, #8]	@ zero_extendqisi2
 	strb	r2, [r4, #11]
 	orr	r1, r1, ip, lsl #6
-	ldr	r2, .L1258+32
+	ldr	r2, .L1259+32
 	strh	r1, [r4, #16]	@ movhi
 	ldrh	r1, [r2]
 	ldrh	ip, [r2, #2]
@@ -9180,7 +9194,7 @@ FtlVpcTblFlush:
 	orr	r1, r1, ip, lsl #6
 	strh	r1, [r4, #20]	@ movhi
 	strb	r2, [r4, #12]
-	ldr	r2, .L1258+36
+	ldr	r2, .L1259+36
 	ldrh	r1, [r2]
 	ldrh	ip, [r2, #2]
 	strh	r1, [r4, #22]	@ movhi
@@ -9188,14 +9202,14 @@ FtlVpcTblFlush:
 	ldrb	r2, [r2, #8]	@ zero_extendqisi2
 	strb	r2, [r4, #13]
 	orr	r1, r1, ip, lsl #6
-	ldr	r2, .L1258+40
+	ldr	r2, .L1259+40
 	strh	r1, [r4, #24]	@ movhi
 	movs	r1, #255
 	ldr	r2, [r2]
 	str	r2, [r4, #32]
 	ldr	r2, [r10]
 	str	r2, [r4, #40]
-	ldr	r2, .L1258+44
+	ldr	r2, .L1259+44
 	ldr	r2, [r2]
 	str	r2, [r4, #36]
 	ldrh	r2, [r3]
@@ -9205,9 +9219,9 @@ FtlVpcTblFlush:
 	ldr	r0, [r6, #8]
 	movw	r4, #65535
 	bl	ftl_memcpy
-	ldr	r2, .L1258+48
+	ldr	r2, .L1259+48
 	ldr	r0, [r6, #8]
-	ldr	r1, .L1258+52
+	ldr	r1, .L1259+52
 	ldrh	r2, [r2]
 	adds	r0, r0, #48
 	ldr	r1, [r1]
@@ -9215,9 +9229,9 @@ FtlVpcTblFlush:
 	bl	ftl_memcpy
 	mov	r0, r8
 	bl	FtlUpdateVaildLpn
-	ldr	r3, .L1258+24
+	ldr	r3, .L1259+24
 	str	r3, [sp, #4]
-.L1244:
+.L1245:
 	ldr	r3, [sp]
 	ldrh	r1, [r5, #2]
 	ldrh	r2, [r5]
@@ -9227,11 +9241,11 @@ FtlVpcTblFlush:
 	str	r3, [r6, #12]
 	orr	r3, r1, r2, lsl #10
 	str	r3, [r6, #4]
-	ldr	r3, .L1258+56
+	ldr	r3, .L1259+56
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r1, r3
-	blt	.L1245
+	blt	.L1246
 	movs	r3, #0
 	ldrh	r4, [r5, #4]
 	strh	r3, [r5, #2]	@ movhi
@@ -9246,7 +9260,7 @@ FtlVpcTblFlush:
 	str	r2, [r6, #4]
 	str	r3, [r7, #4]
 	strh	r0, [r7, #2]	@ movhi
-.L1245:
+.L1246:
 	ldr	r3, [sp, #4]
 	ldrh	r1, [r3]
 	ldr	r3, [sp]
@@ -9256,7 +9270,7 @@ FtlVpcTblFlush:
 	str	r0, [r7, #12]
 	mov	r2, r3
 	mov	r1, r3
-	ldr	r0, .L1258+8
+	ldr	r0, .L1259+8
 	bl	FlashProgPages
 	ldrh	r3, [r5, #2]
 	ldr	r2, [r6]
@@ -9264,50 +9278,50 @@ FtlVpcTblFlush:
 	uxth	r3, r3
 	adds	r1, r2, #1
 	strh	r3, [r5, #2]	@ movhi
-	bne	.L1246
-	cmp	r3, #1
 	bne	.L1247
-	movw	r2, #1138
-	ldr	r1, .L1258+60
-	ldr	r0, .L1258+64
+	cmp	r3, #1
+	bne	.L1248
+	movw	r2, #1145
+	ldr	r1, .L1259+60
+	ldr	r0, .L1259+64
 	bl	printf
-.L1247:
+.L1248:
 	ldrh	r3, [r5, #2]
 	add	r8, r8, #1
 	uxth	r8, r8
 	cmp	r3, #1
 	itttt	eq
-	ldreq	r3, .L1258+56
+	ldreq	r3, .L1259+56
 	ldrheq	r3, [r3]
 	addeq	r3, r3, #-1
 	strheq	r3, [r5, #2]	@ movhi
 	cmp	r8, #3
-	bls	.L1244
+	bls	.L1245
 	mov	r2, r8
 	ldr	r1, [r6, #4]
-	ldr	r0, .L1258+68
+	ldr	r0, .L1259+68
 	bl	printf
-.L1250:
-	b	.L1250
-.L1246:
+.L1251:
+	b	.L1251
+.L1247:
 	cmp	r3, #1
-	beq	.L1244
+	beq	.L1245
 	cmp	r2, #256
-	beq	.L1244
+	beq	.L1245
 	movw	r3, #65535
 	cmp	r4, r3
-	beq	.L1251
+	beq	.L1252
 	movs	r1, #1
 	mov	r0, r4
 	bl	FtlFreeSysBlkQueueIn
-.L1251:
+.L1252:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1259:
+.L1260:
 	.align	2
-.L1258:
+.L1259:
 	.word	.LANCHOR105
 	.word	.LANCHOR138
 	.word	.LANCHOR137
@@ -9327,7 +9341,7 @@ FtlVpcTblFlush:
 	.word	.LC1
 	.word	.LC39
 	.word	.LANCHOR113
-	.word	1342177365
+	.word	1342177366
 	.word	.LANCHOR81
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
 	.section	.text.FtlSysFlush,"ax",%progbits
@@ -9361,17 +9375,17 @@ sftl_deinit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L1263
+	ldr	r3, .L1264
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L1262
+	bne	.L1263
 	bl	FtlSysFlush
-.L1262:
+.L1263:
 	movs	r0, #0
 	pop	{r3, pc}
-.L1264:
+.L1265:
 	.align	2
-.L1263:
+.L1264:
 	.word	.LANCHOR165
 	.size	sftl_deinit, .-sftl_deinit
 	.section	.text.FtlDiscard,"ax",%progbits
@@ -9385,28 +9399,28 @@ sftl_deinit:
 FtlDiscard:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1282
+	ldr	r3, .L1283
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r6, r0
 	mov	r4, r1
 	ldr	r3, [r3]
 	cmp	r3, r0
-	bls	.L1275
+	bls	.L1276
 	cmp	r3, r1
-	bcc	.L1275
+	bcc	.L1276
 	adds	r2, r0, r1
 	cmp	r3, r2
-	bcc	.L1275
+	bcc	.L1276
 	cmp	r1, #31
-	bhi	.L1267
-.L1272:
+	bhi	.L1268
+.L1273:
 	movs	r0, #0
-.L1265:
+.L1266:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1267:
-	ldr	r8, .L1282+12
+.L1268:
+	ldr	r8, .L1283+12
 	ldrh	r5, [r8]
 	mov	r1, r5
 	bl	__aeabi_uidiv
@@ -9414,7 +9428,7 @@ FtlDiscard:
 	mov	r7, r0
 	subs	r6, r6, r3
 	uxth	r6, r6
-	cbz	r6, .L1268
+	cbz	r6, .L1269
 	subs	r5, r5, r6
 	adds	r7, r7, #1
 	cmp	r5, r4
@@ -9422,32 +9436,32 @@ FtlDiscard:
 	movcs	r5, r4
 	uxth	r5, r5
 	subs	r4, r4, r5
-.L1268:
-	ldr	r5, .L1282+4
+.L1269:
+	ldr	r5, .L1283+4
 	mov	r3, #-1
-	ldr	r6, .L1282+8
+	ldr	r6, .L1283+8
 	str	r3, [sp, #4]
-.L1269:
+.L1270:
 	ldrh	r3, [r8]
 	cmp	r4, r3
-	bcs	.L1271
-	ldr	r3, .L1282+4
+	bcs	.L1272
+	ldr	r3, .L1283+4
 	ldr	r2, [r3]
 	cmp	r2, #32
-	bls	.L1272
+	bls	.L1273
 	movs	r4, #0
 	str	r4, [r3]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L1272
-.L1271:
+	b	.L1273
+.L1272:
 	movs	r2, #0
 	mov	r1, sp
 	mov	r0, r7
 	bl	log2phys
 	ldr	r3, [sp]
 	adds	r3, r3, #1
-	beq	.L1270
+	beq	.L1271
 	ldr	r3, [r5]
 	movs	r2, #1
 	add	r1, sp, #4
@@ -9462,17 +9476,17 @@ FtlDiscard:
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L1270:
+.L1271:
 	ldrh	r3, [r8]
 	adds	r7, r7, #1
 	subs	r4, r4, r3
-	b	.L1269
-.L1275:
+	b	.L1270
+.L1276:
 	mov	r0, #-1
-	b	.L1265
-.L1283:
+	b	.L1266
+.L1284:
 	.align	2
-.L1282:
+.L1283:
 	.word	.LANCHOR33
 	.word	.LANCHOR166
 	.word	.LANCHOR85
@@ -9489,47 +9503,47 @@ FtlDiscard:
 allocate_new_data_superblock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1294
+	ldr	r3, .L1295
 	push	{r4, r5, r6, lr}
 	mov	r6, r0
 	ldrh	r4, [r0]
 	ldrh	r3, [r3]
 	cmp	r3, r4
-	bcs	.L1285
-	movw	r2, #2759
-	ldr	r1, .L1294+4
-	ldr	r0, .L1294+8
+	bcs	.L1286
+	movw	r2, #2766
+	ldr	r1, .L1295+4
+	ldr	r0, .L1295+8
 	bl	printf
-.L1285:
+.L1286:
 	movw	r3, #65535
 	cmp	r4, r3
-	beq	.L1286
-	ldr	r3, .L1294+12
+	beq	.L1287
+	ldr	r3, .L1295+12
 	mov	r0, r4
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
-	cbz	r3, .L1287
+	cbz	r3, .L1288
 	bl	INSERT_DATA_LIST
-.L1286:
-	ldr	r5, .L1294+16
+.L1287:
+	ldr	r5, .L1295+16
 	movw	r2, #65535
 	movs	r3, #1
 	strb	r3, [r6, #8]
 	ldrh	r0, [r5]
 	cmp	r0, r2
-	beq	.L1288
+	beq	.L1289
 	cmp	r4, r0
-	bne	.L1289
-	ldr	r3, .L1294+12
+	bne	.L1290
+	ldr	r3, .L1295+12
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L1290
-.L1289:
-	bl	update_vpc_list
+	cbz	r3, .L1291
 .L1290:
+	bl	update_vpc_list
+.L1291:
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.L1288:
+.L1289:
 	mov	r0, r6
 	bl	allocate_data_superblock
 	bl	l2p_flush
@@ -9538,12 +9552,12 @@ allocate_new_data_superblock:
 	bl	FtlVpcTblFlush
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L1287:
+.L1288:
 	bl	INSERT_FREE_LIST
-	b	.L1286
-.L1295:
+	b	.L1287
+.L1296:
 	.align	2
-.L1294:
+.L1295:
 	.word	.LANCHOR4
 	.word	.LANCHOR167
 	.word	.LC1
@@ -9563,31 +9577,31 @@ FtlProgPages:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r6, #0
-	ldr	r10, .L1315+20
+	ldr	r10, .L1316+20
 	mov	r5, r3
 	movs	r2, #0
 	mov	r4, r0
-	ldr	fp, .L1315
+	ldr	fp, .L1316
 	mov	r8, r1
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
 	bl	FlashProgPages
-.L1297:
+.L1298:
 	cmp	r6, r8
-	bne	.L1304
-	ldr	r3, .L1315
+	bne	.L1305
+	ldr	r3, .L1316
 	ldrb	r2, [r5, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1296
+	bcc	.L1297
 	mov	r2, #1000
-	ldr	r1, .L1315+4
-	ldr	r0, .L1315+8
+	ldr	r1, .L1316+4
+	ldr	r0, .L1316+8
 	bl	printf
-.L1296:
+.L1297:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1299:
+.L1300:
 	ldr	r1, [r4, #4]
 	mov	r0, r10
 	bl	printf
@@ -9596,10 +9610,10 @@ FtlProgPages:
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
 	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1298
+	cbnz	r3, .L1299
 	mov	r0, r5
 	bl	allocate_new_data_superblock
-.L1298:
+.L1299:
 	mov	r0, r5
 	bl	get_new_active_ppa
 	movs	r2, #0
@@ -9609,21 +9623,21 @@ FtlProgPages:
 	ldrb	r3, [r5, #9]	@ zero_extendqisi2
 	mov	r0, r4
 	bl	FlashProgPages
-.L1304:
+.L1305:
 	ldr	r2, [r4]
 	adds	r3, r2, #1
-	beq	.L1299
+	beq	.L1300
 	cmp	r2, #256
-	beq	.L1299
+	beq	.L1300
 	ldrb	r2, [r5, #6]	@ zero_extendqisi2
 	ldrh	r3, [fp]
 	cmp	r2, r3
-	bcc	.L1300
+	bcc	.L1301
 	movw	r2, #985
-	ldr	r1, .L1315+4
-	ldr	r0, .L1315+8
+	ldr	r1, .L1316+4
+	ldr	r0, .L1316+8
 	bl	printf
-.L1300:
+.L1301:
 	ldr	r3, [r4, #4]
 	add	r1, sp, #16
 	movs	r2, #1
@@ -9638,24 +9652,24 @@ FtlProgPages:
 	ldr	r3, [sp, #4]
 	mov	r7, r0
 	adds	r3, r3, #1
-	beq	.L1301
-	ldr	r3, .L1315+12
+	beq	.L1302
+	ldr	r3, .L1316+12
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L1302
+	cbnz	r2, .L1303
 	mov	r1, r0
-	ldr	r0, .L1315+16
+	ldr	r0, .L1316+16
 	bl	printf
-.L1302:
+.L1303:
 	mov	r0, r7
 	bl	decrement_vpc_count
-.L1301:
+.L1302:
 	adds	r6, r6, #1
 	adds	r4, r4, #20
-	b	.L1297
-.L1316:
+	b	.L1298
+.L1317:
 	.align	2
-.L1315:
+.L1316:
 	.word	.LANCHOR2
 	.word	.LANCHOR168
 	.word	.LC1
@@ -9676,66 +9690,66 @@ FtlGcFreeTempBlock:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movw	r3, #65535
-	ldr	r4, .L1332
+	ldr	r4, .L1333
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	beq	.L1318
-	ldr	r3, .L1332+4
+	beq	.L1319
+	ldr	r3, .L1333+4
 	mov	r0, r4
 	ldrh	r1, [r3]
 	bl	FtlGcScanTempBlk
 	str	r0, [sp, #12]
-.L1318:
-	ldr	r3, .L1332+8
+.L1319:
+	ldr	r3, .L1333+8
 	movs	r2, #0
 	str	r2, [r3]
 	movw	r3, #65535
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	beq	.L1320
-	ldr	r6, .L1332+4
+	beq	.L1321
+	ldr	r6, .L1333+4
 	ldrb	r0, [r4, #7]	@ zero_extendqisi2
-	ldr	r5, .L1332+12
+	ldr	r5, .L1333+12
 	ldrh	r2, [r6]
 	ldrh	r1, [r5]
 	muls	r2, r0, r2
 	cmp	r1, r2
-	beq	.L1321
+	beq	.L1322
 	movs	r2, #164
-	ldr	r1, .L1332+16
-	ldr	r0, .L1332+20
+	ldr	r1, .L1333+16
+	ldr	r0, .L1333+20
 	bl	printf
-.L1321:
+.L1322:
 	ldrh	r6, [r6]
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	ldr	r2, .L1332+24
+	ldr	r2, .L1333+24
 	ldrh	r0, [r4]
-	ldr	fp, .L1332+56
+	ldr	fp, .L1333+56
 	smulbb	r3, r3, r6
 	ldr	r1, [r2]
 	movs	r6, #0
 	mov	r10, r2
 	strh	r3, [r1, r0, lsl #1]	@ movhi
-	ldr	r1, .L1332+28
+	ldr	r1, .L1333+28
 	ldrh	r3, [r5]
 	ldr	r0, [r1]
 	add	r3, r3, r0
 	str	r3, [r1]
-.L1322:
+.L1323:
 	ldrh	r2, [r5]
 	uxth	r3, r6
 	cmp	r2, r3
-	bhi	.L1326
+	bhi	.L1327
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	ldrh	r0, [r4]
 	ldr	r3, [r10]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	beq	.L1327
+	beq	.L1328
 	bl	INSERT_DATA_LIST
-.L1328:
-	ldr	r2, .L1332+32
+.L1329:
+	ldr	r2, .L1333+32
 	movs	r3, #0
 	movw	r6, #65535
 	strh	r3, [r5]	@ movhi
@@ -9743,38 +9757,38 @@ FtlGcFreeTempBlock:
 	strh	r3, [r2]	@ movhi
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	ldr	r3, .L1332+36
+	ldr	r3, .L1333+36
 	strh	r6, [r3]	@ movhi
-	ldr	r3, .L1332+40
+	ldr	r3, .L1333+40
 	ldrh	r2, [r3]
-	ldr	r3, .L1332+44
+	ldr	r3, .L1333+44
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, asr #2
 	ittt	gt
-	ldrgt	r3, .L1332+48
+	ldrgt	r3, .L1333+48
 	movgt	r2, #20
 	strhgt	r2, [r3]	@ movhi
-.L1320:
+.L1321:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1326:
+.L1327:
 	uxth	r3, r6
 	mov	r8, #12
 	ldr	r2, [fp]
 	mul	r8, r8, r3
-	ldr	r3, .L1332+52
+	ldr	r3, .L1333+52
 	ldr	r3, [r3]
 	add	r7, r3, r8
 	ldr	r0, [r7, #8]
 	cmp	r0, r2
-	bcc	.L1323
-.L1330:
+	bcc	.L1324
+.L1331:
 	ldrh	r0, [r4]
-	b	.L1331
-.L1323:
+	b	.L1332
+.L1324:
 	movs	r2, #0
 	add	r1, sp, #12
 	str	r3, [sp, #4]
@@ -9783,7 +9797,7 @@ FtlGcFreeTempBlock:
 	ldr	r2, [sp, #12]
 	ldr	r0, [r3, r8]
 	cmp	r0, r2
-	bne	.L1325
+	bne	.L1326
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	movs	r2, #1
@@ -9792,22 +9806,22 @@ FtlGcFreeTempBlock:
 	ldr	r0, [r7, #8]
 	bl	log2phys
 	mov	r0, r8
-.L1331:
+.L1332:
 	bl	decrement_vpc_count
-	b	.L1324
-.L1325:
+	b	.L1325
+.L1326:
 	ldr	r3, [r7, #4]
 	cmp	r2, r3
-	bne	.L1330
-.L1324:
+	bne	.L1331
+.L1325:
 	adds	r6, r6, #1
-	b	.L1322
-.L1327:
+	b	.L1323
+.L1328:
 	bl	INSERT_FREE_LIST
-	b	.L1328
-.L1333:
+	b	.L1329
+.L1334:
 	.align	2
-.L1332:
+.L1333:
 	.word	.LANCHOR52
 	.word	.LANCHOR18
 	.word	.LANCHOR132
@@ -9836,27 +9850,27 @@ FtlGcPageRecovery:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	ldr	r4, .L1336
-	ldr	r5, .L1336+4
+	ldr	r4, .L1337
+	ldr	r5, .L1337+4
 	ldrh	r1, [r4]
 	mov	r0, r5
 	bl	FtlGcScanTempBlk
 	ldrh	r2, [r5, #2]
 	ldrh	r3, [r4]
 	cmp	r2, r3
-	bcc	.L1334
-	ldr	r0, .L1336+8
+	bcc	.L1335
+	ldr	r0, .L1337+8
 	bl	FtlMapBlkWriteDump_data
 	movs	r0, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r3, .L1336+12
+	ldr	r3, .L1337+12
 	movs	r2, #0
 	str	r2, [r3]
-.L1334:
+.L1335:
 	pop	{r3, r4, r5, pc}
-.L1337:
+.L1338:
 	.align	2
-.L1336:
+.L1337:
 	.word	.LANCHOR18
 	.word	.LANCHOR52
 	.word	.LANCHOR128
@@ -9875,13 +9889,13 @@ FtlPowerLostRecovery:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #0
-	ldr	r5, .L1339
-	ldr	r3, .L1339+4
+	ldr	r5, .L1340
+	ldr	r3, .L1340+4
 	mov	r0, r5
 	str	r4, [r3]
 	bl	FtlRecoverySuperblock
 	mov	r0, r5
-	ldr	r5, .L1339+8
+	ldr	r5, .L1340+8
 	bl	FtlSlcSuperblockCheck
 	mov	r0, r5
 	bl	FtlRecoverySuperblock
@@ -9892,9 +9906,9 @@ FtlPowerLostRecovery:
 	bl	decrement_vpc_count
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L1340:
+.L1341:
 	.align	2
-.L1339:
+.L1340:
 	.word	.LANCHOR50
 	.word	.LANCHOR156
 	.word	.LANCHOR51
@@ -9912,32 +9926,32 @@ Ftl_gc_temp_data_write_back:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r3, #0
-	ldr	r4, .L1349
+	ldr	r4, .L1350
 	movs	r6, #0
 	movs	r7, #20
 	mov	r2, r3
-	ldr	r5, .L1349+4
+	ldr	r5, .L1350+4
 	ldr	r1, [r4]
 	ldr	r0, [r5]
 	bl	FlashProgPages
-.L1342:
+.L1343:
 	ldr	r1, [r4]
 	uxth	r3, r6
 	cmp	r1, r3
-	bhi	.L1345
+	bhi	.L1346
 	ldr	r0, [r5]
 	bl	FtlGcBufFree
-	ldr	r3, .L1349+8
+	ldr	r3, .L1350+8
 	movs	r0, #0
 	str	r0, [r4]
 	ldrh	r3, [r3, #4]
-	cbnz	r3, .L1341
+	cbnz	r3, .L1342
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
 	movs	r0, #1
-.L1341:
+.L1342:
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1345:
+.L1346:
 	muls	r3, r7, r3
 	ldr	r2, [r5]
 	adds	r6, r6, #1
@@ -9950,10 +9964,10 @@ Ftl_gc_temp_data_write_back:
 	ldrne	r2, [r0, #8]
 	ldr	r0, [r0, #12]
 	bl	FtlGcUpdatePage
-	b	.L1342
-.L1350:
+	b	.L1343
+.L1351:
 	.align	2
-.L1349:
+.L1350:
 	.word	.LANCHOR61
 	.word	.LANCHOR103
 	.word	.LANCHOR52
@@ -9971,34 +9985,34 @@ Ftl_get_new_temp_ppa:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movw	r3, #65535
-	ldr	r4, .L1354
+	ldr	r4, .L1355
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	beq	.L1352
+	beq	.L1353
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1353
-.L1352:
+	cbnz	r3, .L1354
+.L1353:
 	movs	r0, #0
 	movs	r5, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r0, .L1354
+	ldr	r0, .L1355
 	strb	r5, [r4, #8]
 	bl	allocate_data_superblock
-	ldr	r3, .L1354+4
+	ldr	r3, .L1355+4
 	strh	r5, [r3]	@ movhi
-	ldr	r3, .L1354+8
+	ldr	r3, .L1355+8
 	strh	r5, [r3]	@ movhi
 	bl	l2p_flush
 	mov	r0, r5
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1353:
-	ldr	r0, .L1354
+.L1354:
+	ldr	r0, .L1355
 	pop	{r3, r4, r5, lr}
 	b	get_new_active_ppa
-.L1355:
+.L1356:
 	.align	2
-.L1354:
+.L1355:
 	.word	.LANCHOR52
 	.word	.LANCHOR68
 	.word	.LANCHOR69
@@ -10014,188 +10028,188 @@ Ftl_get_new_temp_ppa:
 rk_ftl_garbage_collect:
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1446
+	ldr	r3, .L1447
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #48
 	str	r0, [sp, #28]
 	ldr	r0, [r3]
 	cmp	r0, #0
-	bne	.L1413
-	ldr	r3, .L1446+4
+	bne	.L1414
+	ldr	r3, .L1447+4
 	ldrh	r3, [r3]
 	cmp	r3, #47
-	bls	.L1356
-	ldr	r3, .L1446+8
+	bls	.L1357
+	ldr	r3, .L1447+8
 	movw	r4, #65535
 	ldrh	r0, [r3]
 	cmp	r0, r4
-	beq	.L1358
-	ldr	r1, .L1446+12
+	beq	.L1359
+	ldr	r1, .L1447+12
 	ldrh	r2, [r1]
 	cmp	r2, r4
 	itt	eq
 	strheq	r0, [r1]	@ movhi
 	strheq	r2, [r3]	@ movhi
-.L1358:
+.L1359:
 	ldr	r3, [sp, #28]
 	cmp	r3, #0
-	bne	.L1415
-	ldr	r3, .L1446+16
+	bne	.L1416
+	ldr	r3, .L1447+16
 	ldrh	r3, [r3]
 	cmp	r3, #24
-	bhi	.L1416
-	ldr	r2, .L1446+20
+	bhi	.L1417
+	ldr	r2, .L1447+20
 	cmp	r3, #16
 	ldrh	r4, [r2]
-	bls	.L1361
+	bls	.L1362
 	lsrs	r4, r4, #5
-.L1360:
-	ldr	r2, .L1446+24
+.L1361:
+	ldr	r2, .L1447+24
 	ldrh	r1, [r2]
 	cmp	r1, r3
 	mov	r1, r2
-	bcs	.L1364
-	ldr	r3, .L1446+28
+	bcs	.L1365
+	ldr	r3, .L1447+28
 	movw	r0, #65535
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L1365
-	ldr	r0, .L1446+12
+	bne	.L1366
+	ldr	r0, .L1447+12
 	ldrh	r0, [r0]
 	cmp	r0, r3
-	bne	.L1365
-	ldr	r3, .L1446+32
+	bne	.L1366
+	ldr	r3, .L1447+32
 	ldrh	r0, [r3]
-	cbnz	r0, .L1366
-	ldr	r3, .L1446+36
-	ldr	r4, .L1446+40
+	cbnz	r0, .L1367
+	ldr	r3, .L1447+36
+	ldr	r4, .L1447+40
 	ldr	r3, [r3]
 	ldr	r4, [r4]
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, lsr #2
-	bcs	.L1367
-.L1366:
-	ldr	r3, .L1446+44
+	bcs	.L1368
+.L1367:
+	ldr	r3, .L1447+44
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r1]	@ movhi
-.L1368:
-	ldr	r3, .L1446+48
+.L1369:
+	ldr	r3, .L1447+48
 	movs	r2, #0
 	str	r2, [r3]
-.L1356:
+.L1357:
 	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1361:
+.L1362:
 	cmp	r3, #12
-	bls	.L1362
+	bls	.L1363
 	lsrs	r4, r4, #4
-	b	.L1360
-.L1362:
+	b	.L1361
+.L1363:
 	cmp	r3, #8
-	bls	.L1360
+	bls	.L1361
 	lsrs	r4, r4, #2
-	b	.L1360
-.L1416:
+	b	.L1361
+.L1417:
 	movs	r4, #1
-	b	.L1360
-.L1367:
+	b	.L1361
+.L1368:
 	movs	r3, #18
 	strh	r3, [r2]	@ movhi
-	b	.L1368
-.L1365:
-	ldr	r3, .L1446+44
+	b	.L1369
+.L1366:
+	ldr	r3, .L1447+44
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r1]	@ movhi
-.L1364:
-	ldr	r3, .L1446+52
+.L1365:
+	ldr	r3, .L1447+52
 	ldrh	r3, [r3]
-	cbz	r3, .L1359
+	cbz	r3, .L1360
 	adds	r4, r4, #32
 	uxth	r4, r4
-.L1359:
-	ldr	r5, .L1446+56
+.L1360:
+	ldr	r5, .L1447+56
 	movw	r3, #65535
 	ldrh	r2, [r5]
 	cmp	r2, r3
-	bne	.L1371
-	ldr	r3, .L1446+12
+	bne	.L1372
+	ldr	r3, .L1447+12
 	ldrh	r1, [r3]
 	cmp	r1, r2
-	beq	.L1372
-	ldr	r0, .L1446+60
+	beq	.L1373
+	ldr	r0, .L1447+60
 	ldr	r0, [r0]
 	ldrh	r1, [r0, r1, lsl #1]
-	cbnz	r1, .L1373
+	cbnz	r1, .L1374
 	strh	r2, [r3]	@ movhi
-.L1373:
+.L1374:
 	ldrh	r2, [r3]
 	strh	r2, [r5]	@ movhi
 	movw	r2, #65535
 	strh	r2, [r3]	@ movhi
-.L1372:
+.L1373:
 	ldrh	r0, [r5]
 	movw	r6, #65535
 	movs	r3, #0
 	strb	r3, [r5, #8]
 	cmp	r0, r6
-	beq	.L1371
+	beq	.L1372
 	bl	IsBlkInGcList
-	cbz	r0, .L1375
+	cbz	r0, .L1376
 	strh	r6, [r5]	@ movhi
-.L1375:
+.L1376:
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1371
-	ldr	r0, .L1446+56
+	beq	.L1372
+	ldr	r0, .L1447+56
 	bl	make_superblock
-	ldr	r2, .L1446+64
+	ldr	r2, .L1447+64
 	movs	r3, #0
 	strh	r3, [r5, #2]	@ movhi
 	strb	r3, [r5, #6]
 	strh	r3, [r2]	@ movhi
-	ldr	r3, .L1446+60
+	ldr	r3, .L1447+60
 	ldrh	r2, [r5]
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r2, lsl #1]
-	ldr	r3, .L1446+68
+	ldr	r3, .L1447+68
 	strh	r2, [r3]	@ movhi
-.L1371:
-	ldr	r2, .L1446+72
+.L1372:
+	ldr	r2, .L1447+72
 	ldrh	r3, [r5]
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L1376
-	ldr	r2, .L1446+76
+	beq	.L1377
+	ldr	r2, .L1447+76
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L1376
-	ldr	r2, .L1446+28
+	beq	.L1377
+	ldr	r2, .L1447+28
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bne	.L1377
-.L1376:
+	bne	.L1378
+.L1377:
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.L1377:
-	ldr	r5, .L1446+56
+.L1378:
+	ldr	r5, .L1447+56
 	mov	r6, r5
-.L1412:
+.L1413:
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1378
-	ldr	fp, .L1446+88
+	bne	.L1379
+	ldr	fp, .L1447+88
 	movs	r2, #0
-	ldr	r3, .L1446+48
+	ldr	r3, .L1447+48
 	mov	r8, fp
 	str	r2, [r3]
-.L1379:
+.L1380:
 	ldrh	r7, [fp]
 	mov	r0, r7
 	bl	List_get_gc_head_node
@@ -10203,15 +10217,15 @@ rk_ftl_garbage_collect:
 	movw	r1, #65535
 	cmp	r3, r1
 	strh	r3, [r6]	@ movhi
-	bne	.L1380
+	bne	.L1381
 	movs	r3, #0
 	movs	r0, #8
 	strh	r3, [fp]	@ movhi
-	b	.L1356
-.L1415:
+	b	.L1357
+.L1416:
 	movs	r4, #1
-	b	.L1359
-.L1380:
+	b	.L1360
+.L1381:
 	str	r0, [sp, #16]
 	mov	r0, r3
 	str	r3, [sp, #12]
@@ -10219,60 +10233,60 @@ rk_ftl_garbage_collect:
 	bl	IsBlkInGcList
 	ldr	r3, [sp, #12]
 	ldr	r2, [sp, #16]
-	cbz	r0, .L1381
+	cbz	r0, .L1382
 	strh	r7, [fp]	@ movhi
-	b	.L1379
-.L1381:
+	b	.L1380
+.L1382:
 	uxth	r0, r2
-	ldr	r2, .L1446+20
-	ldr	r10, .L1446+60
+	ldr	r2, .L1447+20
+	ldr	r10, .L1447+60
 	uxth	r7, r7
 	ldrh	lr, [r2]
-	ldr	r2, .L1446+80
+	ldr	r2, .L1447+80
 	ldr	r1, [r10]
 	strh	r7, [fp]	@ movhi
 	ldrh	r2, [r2]
 	ldrh	ip, [r1, r0, lsl #1]
 	mul	r2, r2, lr
 	cmp	ip, r2, asr #1
-	bgt	.L1383
+	bgt	.L1384
 	cmp	r7, #48
-	bls	.L1384
+	bls	.L1385
 	cmp	ip, #8
-	bls	.L1384
-	ldr	r7, .L1446+84
+	bls	.L1385
+	ldr	r7, .L1447+84
 	ldrh	r7, [r7]
 	cmp	r7, #35
-	bhi	.L1384
-.L1383:
+	bhi	.L1385
+.L1384:
 	movs	r7, #0
 	strh	r7, [r8]	@ movhi
-.L1384:
+.L1385:
 	ldrh	r1, [r1, r0, lsl #1]
 	cmp	r2, r1
-	bgt	.L1385
+	bgt	.L1386
 	ldrh	r2, [r8]
 	cmp	r2, #3
-	bhi	.L1385
+	bhi	.L1386
 	movw	r3, #65535
 	strh	r3, [r6]	@ movhi
 	movs	r3, #0
 	strh	r3, [r8]	@ movhi
-.L1445:
-	ldr	r3, .L1446+32
+.L1446:
+	ldr	r3, .L1447+32
 	ldrh	r0, [r3]
-	b	.L1356
-.L1385:
-	cbnz	r1, .L1386
+	b	.L1357
+.L1386:
+	cbnz	r1, .L1387
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	ldrh	r3, [r8]
 	adds	r3, r3, #1
 	strh	r3, [r8]	@ movhi
-	b	.L1379
-.L1447:
+	b	.L1380
+.L1448:
 	.align	2
-.L1446:
+.L1447:
 	.word	.LANCHOR93
 	.word	.LANCHOR43
 	.word	.LANCHOR72
@@ -10296,65 +10310,65 @@ rk_ftl_garbage_collect:
 	.word	.LANCHOR2
 	.word	.LANCHOR68
 	.word	.LANCHOR101
-.L1386:
+.L1387:
 	movs	r2, #0
 	strb	r2, [r6, #8]
-	ldr	r2, .L1448
+	ldr	r2, .L1449
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bne	.L1387
+	bne	.L1388
 	movw	r2, #717
-	ldr	r1, .L1448+4
-	ldr	r0, .L1448+8
+	ldr	r1, .L1449+4
+	ldr	r0, .L1449+8
 	bl	printf
-.L1387:
-	ldr	r3, .L1448+12
+.L1388:
+	ldr	r3, .L1449+12
 	ldrh	r2, [r6]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1388
+	bne	.L1389
 	movw	r2, #718
-	ldr	r1, .L1448+4
-	ldr	r0, .L1448+8
+	ldr	r1, .L1449+4
+	ldr	r0, .L1449+8
 	bl	printf
-.L1388:
-	ldr	r3, .L1448+16
+.L1389:
+	ldr	r3, .L1449+16
 	ldrh	r2, [r6]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1389
+	bne	.L1390
 	movw	r2, #719
-	ldr	r1, .L1448+4
-	ldr	r0, .L1448+8
+	ldr	r1, .L1449+4
+	ldr	r0, .L1449+8
 	bl	printf
-.L1389:
+.L1390:
 	mov	r0, r5
 	bl	make_superblock
-	ldr	r2, .L1448+20
+	ldr	r2, .L1449+20
 	movs	r3, #0
 	ldrh	r1, [r6]
 	strh	r3, [r2]	@ movhi
 	ldr	r2, [r10]
 	ldrh	r1, [r2, r1, lsl #1]
-	ldr	r2, .L1448+24
+	ldr	r2, .L1449+24
 	strh	r3, [r6, #2]	@ movhi
 	strb	r3, [r6, #6]
 	strh	r1, [r2]	@ movhi
-.L1378:
-	ldr	r3, .L1448+28
+.L1379:
+	ldr	r3, .L1449+28
 	movs	r2, #1
 	str	r2, [r3]
-	ldr	r3, .L1448+32
+	ldr	r3, .L1449+32
 	ldrh	r3, [r3]
 	str	r3, [sp, #16]
 	ldr	r3, [sp, #28]
-	cbz	r3, .L1390
-	ldr	r3, .L1448+36
+	cbz	r3, .L1391
+	ldr	r3, .L1449+36
 	ldr	r2, [sp, #16]
 	ldrh	r1, [r6]
 	ldrh	r3, [r3]
 	muls	r3, r2, r3
-	ldr	r2, .L1448+40
+	ldr	r2, .L1449+40
 	ldr	r2, [r2]
 	ldrh	r2, [r2, r1, lsl #1]
 	subs	r3, r3, r2
@@ -10362,10 +10376,10 @@ rk_ftl_garbage_collect:
 	addmi	r3, r3, #3
 	add	r4, r4, r3, asr #2
 	uxth	r4, r4
-.L1390:
+.L1391:
 	ldrh	r3, [r6, #2]
 	ldr	r1, [sp, #16]
-	ldr	fp, .L1448+64
+	ldr	fp, .L1449+64
 	adds	r2, r3, r4
 	cmp	r2, r1
 	itt	gt
@@ -10375,27 +10389,27 @@ rk_ftl_garbage_collect:
 	it	gt
 	uxthgt	r4, r4
 	str	r3, [sp, #24]
-.L1393:
+.L1394:
 	ldrh	r3, [sp, #24]
 	cmp	r4, r3
-	bls	.L1401
-	ldr	r3, .L1448+36
+	bls	.L1402
+	ldr	r3, .L1449+36
 	movw	r10, #65535
 	ldrh	r1, [r5, #2]
 	mov	ip, #20
 	ldr	r0, [fp]
 	ldrh	lr, [r3]
 	ldr	r3, [sp, #24]
-	ldr	r7, .L1448+44
+	ldr	r7, .L1449+44
 	adds	r3, r1, r3
 	str	r3, [sp, #20]
 	movs	r3, #0
 	str	r3, [sp, #12]
-	b	.L1402
-.L1395:
+	b	.L1403
+.L1396:
 	ldrh	r2, [r7, #2]!
 	cmp	r2, r10
-	beq	.L1394
+	beq	.L1395
 	ldr	r1, [sp, #12]
 	mla	r8, ip, r1, r0
 	ldr	r1, [sp, #20]
@@ -10405,27 +10419,27 @@ rk_ftl_garbage_collect:
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r2, [sp, #12]
-.L1394:
+.L1395:
 	adds	r3, r3, #1
-.L1402:
+.L1403:
 	uxth	r2, r3
 	cmp	lr, r2
-	bhi	.L1395
+	bhi	.L1396
 	ldrb	r2, [r5, #8]	@ zero_extendqisi2
 	ldr	r1, [sp, #12]
 	bl	FlashReadPages
 	movs	r3, #0
-.L1444:
+.L1445:
 	str	r3, [sp, #20]
 	ldr	r2, [sp, #12]
 	ldrh	r3, [sp, #20]
 	cmp	r2, r3
-	bhi	.L1400
+	bhi	.L1401
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
 	str	r3, [sp, #24]
-	b	.L1393
-.L1400:
+	b	.L1394
+.L1401:
 	ldr	r3, [sp, #20]
 	movs	r7, #20
 	muls	r7, r3, r7
@@ -10433,20 +10447,20 @@ rk_ftl_garbage_collect:
 	adds	r2, r3, r7
 	ldr	r3, [r3, r7]
 	adds	r3, r3, #1
-	beq	.L1397
+	beq	.L1398
 	ldr	r8, [r2, #12]
 	movw	r3, #61589
 	ldrh	r2, [r8]
 	cmp	r2, r3
-	bne	.L1397
+	bne	.L1398
 	ldr	r10, [r8, #8]
 	cmp	r10, #-1
-	bne	.L1398
+	bne	.L1399
 	movw	r2, #753
-	ldr	r1, .L1448+4
-	ldr	r0, .L1448+8
+	ldr	r1, .L1449+4
+	ldr	r0, .L1449+8
 	bl	printf
-.L1398:
+.L1399:
 	movs	r2, #0
 	add	r1, sp, #40
 	mov	r0, r10
@@ -10456,10 +10470,10 @@ rk_ftl_garbage_collect:
 	add	r0, r0, r7
 	ldr	r2, [r0, #4]
 	cmp	r2, r3
-	bne	.L1397
-	ldr	r2, .L1448+20
-	ldr	r10, .L1448+60
-	ldr	r1, .L1448+48
+	bne	.L1398
+	ldr	r2, .L1449+20
+	ldr	r10, .L1449+60
+	ldr	r1, .L1449+48
 	ldrh	r3, [r2]
 	str	r1, [sp, #36]
 	adds	r3, r3, #1
@@ -10481,7 +10495,7 @@ rk_ftl_garbage_collect:
 	ldr	r0, [fp]
 	mla	r2, r1, r3, r2
 	add	r0, r0, r7
-	ldr	r7, .L1448+16
+	ldr	r7, .L1449+16
 	ldr	r1, [r0, #8]
 	adds	r3, r3, #1
 	str	r1, [r2, #8]
@@ -10492,7 +10506,7 @@ rk_ftl_garbage_collect:
 	str	r2, [r8, #12]
 	ldrh	r2, [r7]
 	strh	r2, [r8, #2]	@ movhi
-	ldr	r2, .L1448+52
+	ldr	r2, .L1449+52
 	str	r3, [r10]
 	ldr	r2, [r2]
 	str	r2, [r8, #4]
@@ -10500,44 +10514,44 @@ rk_ftl_garbage_collect:
 	ldrb	r2, [r7, #7]	@ zero_extendqisi2
 	ldr	r3, [r10]
 	cmp	r2, r3
-	beq	.L1399
+	beq	.L1400
 	ldrh	r3, [r7, #4]
-	cbnz	r3, .L1397
-.L1399:
+	cbnz	r3, .L1398
+.L1400:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	r0, .L1397
-	ldr	r3, .L1448+28
+	cbz	r0, .L1398
+	ldr	r3, .L1449+28
 	movs	r2, #0
 	movw	r1, #65535
 	str	r2, [r3]
-	ldr	r3, .L1448+56
+	ldr	r3, .L1449+56
 	strh	r1, [r3]	@ movhi
 	strh	r2, [r3, #2]	@ movhi
-	b	.L1445
-.L1397:
+	b	.L1446
+.L1398:
 	ldr	r3, [sp, #20]
 	adds	r3, r3, #1
-	b	.L1444
-.L1401:
+	b	.L1445
+.L1402:
 	ldrh	r3, [r5, #2]
 	add	r4, r4, r3
 	ldr	r3, [sp, #16]
 	uxth	r4, r4
 	cmp	r3, r4
 	strh	r4, [r5, #2]	@ movhi
-	bhi	.L1403
-	ldr	r3, .L1448+60
+	bhi	.L1404
+	ldr	r3, .L1449+60
 	ldr	r3, [r3]
-	cbz	r3, .L1404
+	cbz	r3, .L1405
 	bl	Ftl_gc_temp_data_write_back
-	cbz	r0, .L1404
-	ldr	r3, .L1448+28
+	cbz	r0, .L1405
+	ldr	r3, .L1449+28
 	movs	r2, #0
 	str	r2, [r3]
-	b	.L1445
-.L1449:
+	b	.L1446
+.L1450:
 	.align	2
-.L1448:
+.L1449:
 	.word	.LANCHOR50
 	.word	.LANCHOR174
 	.word	.LC1
@@ -10555,50 +10569,50 @@ rk_ftl_garbage_collect:
 	.word	.LANCHOR144
 	.word	.LANCHOR61
 	.word	.LANCHOR65
-.L1404:
-	ldr	r3, .L1450
+.L1405:
+	ldr	r3, .L1451
 	ldrh	r4, [r3]
 	cmp	r4, #0
-	bne	.L1405
-	ldr	r8, .L1450+28
+	bne	.L1406
+	ldr	r8, .L1451+28
 	ldrh	r1, [r5]
 	ldr	r3, [r8]
 	ldrh	r3, [r3, r1, lsl #1]
 	cmp	r3, #0
-	beq	.L1405
-	ldr	r0, .L1450+4
-	ldr	r10, .L1450+32
+	beq	.L1406
+	ldr	r0, .L1451+4
+	ldr	r10, .L1451+32
 	ldrh	r2, [r5, #2]
 	ldrh	r0, [r0]
 	str	r3, [sp]
 	mov	r3, r4
 	str	r0, [sp, #4]
-	ldr	r0, .L1450+8
+	ldr	r0, .L1451+8
 	bl	printf
-.L1406:
+.L1407:
 	ldr	r3, [r10]
 	cmp	r4, r3
-	bcs	.L1408
+	bcs	.L1409
 	movs	r2, #0
 	add	r1, sp, #44
 	mov	r0, r4
 	bl	log2phys
 	ldr	r7, [sp, #44]
 	adds	r3, r7, #1
-	beq	.L1407
+	beq	.L1408
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r5]
 	cmp	r3, r0
-	bne	.L1407
+	bne	.L1408
 	mov	r2, r7
 	mov	r1, r4
-	ldr	r0, .L1450+12
+	ldr	r0, .L1451+12
 	bl	printf
-.L1408:
+.L1409:
 	ldr	r3, [r10]
 	cmp	r4, r3
-	bcc	.L1405
+	bcc	.L1406
 	ldrh	r2, [r5]
 	movs	r1, #0
 	ldr	r3, [r8]
@@ -10607,32 +10621,32 @@ rk_ftl_garbage_collect:
 	bl	update_vpc_list
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1405:
+.L1406:
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.L1403:
-	ldr	r3, .L1450+16
+.L1404:
+	ldr	r3, .L1451+16
 	movs	r2, #0
 	str	r2, [r3]
-	ldr	r3, .L1450+20
+	ldr	r3, .L1451+20
 	ldrh	r0, [r3]
 	cmp	r0, #2
-	bhi	.L1411
-	ldr	r3, .L1450+24
+	bhi	.L1412
+	ldr	r3, .L1451+24
 	ldrh	r4, [r3]
-	b	.L1412
-.L1407:
+	b	.L1413
+.L1408:
 	adds	r4, r4, #1
-	b	.L1406
-.L1411:
+	b	.L1407
+.L1412:
 	adds	r0, r0, #1
-	b	.L1356
-.L1413:
+	b	.L1357
+.L1414:
 	movs	r0, #0
-	b	.L1356
-.L1451:
+	b	.L1357
+.L1452:
 	.align	2
-.L1450:
+.L1451:
 	.word	.LANCHOR172
 	.word	.LANCHOR173
 	.word	.LC42
@@ -10660,34 +10674,34 @@ FtlRead:
 	mov	r5, r1
 	mov	r10, r3
 	str	r2, [sp, #4]
-	bne	.L1453
+	bne	.L1454
 	mov	r2, r3
 	ldr	r1, [sp, #4]
 	add	r0, r5, #256
 	bl	FtlVendorPartRead
 	mov	r4, r0
-.L1452:
+.L1453:
 	mov	r0, r4
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1453:
-	ldr	r3, .L1487
+.L1454:
+	ldr	r3, .L1488
 	ldr	r3, [r3]
 	cmp	r1, r3
-	bcs	.L1476
+	bcs	.L1477
 	ldr	r2, [sp, #4]
 	cmp	r2, r3
-	bhi	.L1476
+	bhi	.L1477
 	adds	r2, r1, r2
 	cmp	r3, r2
 	str	r2, [sp, #12]
-	bcc	.L1476
-	ldr	r3, .L1487+4
+	bcc	.L1477
+	ldr	r3, .L1488+4
 	ldr	r4, [r3]
 	adds	r6, r4, #1
-	beq	.L1452
-	ldr	r3, .L1487+8
+	beq	.L1453
+	ldr	r3, .L1488+8
 	mov	r0, r5
 	mov	r8, #0
 	mov	r7, r8
@@ -10701,7 +10715,7 @@ FtlRead:
 	subs	r0, r3, #1
 	bl	__aeabi_uidiv
 	ldr	r3, [sp, #16]
-	ldr	r2, .L1487+12
+	ldr	r2, .L1488+12
 	ldr	r1, [sp, #4]
 	rsb	r3, r3, #1
 	ldr	r6, [sp, #16]
@@ -10714,53 +10728,53 @@ FtlRead:
 	add	r3, r3, r1
 	ldr	r1, [sp, #8]
 	str	r3, [r2]
-	ldr	r2, .L1487+16
+	ldr	r2, .L1488+16
 	ldr	r3, [r2]
 	add	r3, r3, r1
 	str	r3, [r2]
-.L1455:
+.L1456:
 	ldr	r3, [sp, #8]
-	cbnz	r3, .L1472
-	ldr	r3, .L1487+20
-	ldrh	r3, [r3]
 	cbnz	r3, .L1473
-	ldr	r3, .L1487+24
+	ldr	r3, .L1488+20
+	ldrh	r3, [r3]
+	cbnz	r3, .L1474
+	ldr	r3, .L1488+24
 	ldrh	r3, [r3]
 	cmp	r3, #31
-	bhi	.L1452
-.L1473:
+	bhi	.L1453
+.L1474:
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
-	b	.L1452
-.L1472:
+	b	.L1453
+.L1473:
 	movs	r2, #0
 	add	r1, sp, #52
 	mov	r0, r6
 	bl	log2phys
 	ldr	r3, [sp, #52]
 	adds	r0, r3, #1
-	bne	.L1456
-	ldr	r3, .L1487+8
+	bne	.L1457
+	ldr	r3, .L1488+8
 	mov	fp, #0
-.L1457:
+.L1458:
 	ldrh	r0, [r3]
 	cmp	fp, r0
-	bcc	.L1459
-.L1460:
+	bcc	.L1460
+.L1461:
 	ldr	r3, [sp, #8]
 	adds	r6, r6, #1
 	subs	r3, r3, #1
 	str	r3, [sp, #8]
-	beq	.L1464
-	ldr	r3, .L1487+28
+	beq	.L1465
+	ldr	r3, .L1488+28
 	ldrh	r3, [r3]
 	cmp	r7, r3, lsl #2
-	bne	.L1455
-.L1464:
+	bne	.L1456
+.L1465:
 	cmp	r7, #0
-	beq	.L1455
-	ldr	r3, .L1487+32
+	beq	.L1456
+	ldr	r3, .L1488+32
 	movs	r2, #0
 	mov	r1, r7
 	mov	fp, #0
@@ -10774,31 +10788,31 @@ FtlRead:
 	ldr	r3, [sp, #28]
 	lsls	r3, r3, #9
 	str	r3, [sp, #40]
-.L1471:
+.L1472:
 	movs	r3, #20
 	mul	r3, r3, fp
 	str	r3, [sp, #32]
-	ldr	r3, .L1487+32
+	ldr	r3, .L1488+32
 	ldr	r2, [r3]
 	ldr	r3, [sp, #32]
 	add	r2, r2, r3
 	ldr	r3, [sp, #16]
 	ldr	r1, [r2, #16]
 	cmp	r3, r1
-	bne	.L1466
+	bne	.L1467
 	ldr	r1, [r2, #8]
-	ldr	r2, .L1487+36
+	ldr	r2, .L1488+36
 	ldr	r2, [r2]
 	cmp	r1, r2
-	bne	.L1467
+	bne	.L1468
 	ldr	r3, [sp, #36]
 	mov	r0, r10
 	ldr	r2, [sp, #40]
 	add	r1, r1, r3
-.L1486:
+.L1487:
 	bl	ftl_memcpy
-.L1467:
-	ldr	r3, .L1487+32
+.L1468:
+	ldr	r3, .L1488+32
 	ldr	r2, [sp, #32]
 	ldr	r3, [r3]
 	adds	r2, r3, r2
@@ -10807,32 +10821,32 @@ FtlRead:
 	ldr	r0, [r0, #8]
 	cmp	r1, r0
 	itttt	ne
-	ldrne	r0, .L1487+40
+	ldrne	r0, .L1488+40
 	ldrne	r1, [r0, #72]
 	addne	r1, r1, #1
 	strne	r1, [r0, #72]
 	ldr	r1, [sp, #32]
 	ldr	r3, [r3, r1]
 	adds	r1, r3, #1
-	bne	.L1469
-	ldr	r1, .L1487+40
+	bne	.L1470
+	ldr	r1, .L1488+40
 	mov	r4, r3
 	ldr	r2, [r1, #72]
 	adds	r2, r2, #1
 	str	r2, [r1, #72]
-.L1470:
+.L1471:
 	add	fp, fp, #1
 	cmp	r7, fp
-	bne	.L1471
+	bne	.L1472
 	movs	r7, #0
-	b	.L1455
-.L1459:
+	b	.L1456
+.L1460:
 	mla	r0, r0, r6, fp
 	cmp	r5, r0
-	bhi	.L1458
+	bhi	.L1459
 	ldr	r2, [sp, #12]
 	cmp	r2, r0
-	bls	.L1458
+	bls	.L1459
 	subs	r0, r0, r5
 	mov	r2, #512
 	movs	r1, #0
@@ -10840,20 +10854,20 @@ FtlRead:
 	str	r3, [sp, #32]
 	bl	ftl_memset
 	ldr	r3, [sp, #32]
-.L1458:
+.L1459:
 	add	fp, fp, #1
-	b	.L1457
-.L1456:
-	ldr	r2, .L1487+32
+	b	.L1458
+.L1457:
+	ldr	r2, .L1488+32
 	mov	fp, #20
 	ldr	r2, [r2]
 	mla	fp, fp, r7, r2
 	str	r3, [fp, #4]
 	ldr	r3, [sp, #16]
 	cmp	r6, r3
-	ldr	r3, .L1487+8
-	bne	.L1461
-	ldr	r2, .L1487+36
+	ldr	r3, .L1488+8
+	bne	.L1462
+	ldr	r2, .L1488+36
 	mov	r0, r5
 	ldrh	r3, [r3]
 	ldr	r2, [r2]
@@ -10870,11 +10884,11 @@ FtlRead:
 	movcs	r2, r1
 	cmp	r3, r2
 	str	r2, [sp, #28]
-	bne	.L1462
+	bne	.L1463
 	str	r10, [fp, #8]
-.L1462:
-	ldr	r3, .L1487+44
-	ldr	r2, .L1487+48
+.L1463:
+	ldr	r3, .L1488+44
+	ldr	r2, .L1488+48
 	str	r6, [fp, #16]
 	ldrh	r3, [r3]
 	ldr	r2, [r2]
@@ -10883,12 +10897,12 @@ FtlRead:
 	bic	r3, r3, #3
 	add	r3, r3, r2
 	str	r3, [fp, #12]
-	b	.L1460
-.L1461:
+	b	.L1461
+.L1462:
 	ldr	r2, [sp, #20]
 	cmp	r6, r2
-	bne	.L1463
-	ldr	r2, .L1487+52
+	bne	.L1464
+	ldr	r2, .L1488+52
 	ldr	r1, [sp, #12]
 	ldr	r2, [r2]
 	str	r2, [fp, #8]
@@ -10896,47 +10910,47 @@ FtlRead:
 	mul	r3, r2, r6
 	sub	r8, r1, r3
 	cmp	r2, r8
-	bne	.L1462
-.L1485:
+	bne	.L1463
+.L1486:
 	subs	r3, r3, r5
 	add	r3, r10, r3, lsl #9
 	str	r3, [fp, #8]
-	b	.L1462
-.L1463:
+	b	.L1463
+.L1464:
 	ldrh	r3, [r3]
 	muls	r3, r6, r3
-	b	.L1485
-.L1466:
+	b	.L1486
+.L1467:
 	ldr	r3, [sp, #20]
 	cmp	r3, r1
-	bne	.L1467
-	ldr	r3, .L1487+52
+	bne	.L1468
+	ldr	r3, .L1488+52
 	ldr	r1, [r2, #8]
 	ldr	r2, [r3]
 	cmp	r1, r2
-	bne	.L1467
-	ldr	r2, .L1487+8
+	bne	.L1468
+	ldr	r2, .L1488+8
 	ldr	r3, [sp, #20]
 	ldrh	r0, [r2]
 	ldr	r2, [sp, #44]
 	muls	r0, r3, r0
 	subs	r0, r0, r5
 	add	r0, r10, r0, lsl #9
-	b	.L1486
-.L1469:
+	b	.L1487
+.L1470:
 	cmp	r3, #256
-	bne	.L1470
+	bne	.L1471
 	ldr	r0, [r2, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-	b	.L1470
-.L1476:
+	b	.L1471
+.L1477:
 	mov	r4, #-1
-	b	.L1452
-.L1488:
+	b	.L1453
+.L1489:
 	.align	2
-.L1487:
+.L1488:
 	.word	.LANCHOR33
 	.word	.LANCHOR165
 	.word	.LANCHOR11
@@ -10987,36 +11001,36 @@ FtlWrite:
 	mov	r10, r1
 	str	r2, [sp, #16]
 	str	r3, [sp, #20]
-	bne	.L1491
+	bne	.L1492
 	mov	r2, r3
 	ldr	r1, [sp, #16]
 	add	r0, r10, #256
 	bl	FtlVendorPartWrite
-.L1490:
+.L1491:
 	add	sp, sp, #72
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1491:
-	ldr	r3, .L1537
+.L1492:
+	ldr	r3, .L1538
 	ldr	r3, [r3]
 	cmp	r1, r3
-	bcs	.L1526
+	bcs	.L1527
 	ldr	r2, [sp, #16]
 	cmp	r2, r3
-	bhi	.L1526
+	bhi	.L1527
 	adds	r4, r1, r2
 	cmp	r3, r4
-	bcc	.L1526
-	ldr	r3, .L1537+4
+	bcc	.L1527
+	ldr	r3, .L1538+4
 	ldr	r0, [r3]
 	adds	r1, r0, #1
-	beq	.L1490
-	ldr	r3, .L1537+8
+	beq	.L1491
+	ldr	r3, .L1538+8
 	mov	r2, #2048
 	mov	r0, r10
-	ldr	r7, .L1537+12
+	ldr	r7, .L1538+12
 	str	r2, [r3]
-	ldr	r3, .L1537+16
+	ldr	r3, .L1538+16
 	ldrh	r5, [r3]
 	mov	r1, r5
 	bl	__aeabi_uidiv
@@ -11028,7 +11042,7 @@ FtlWrite:
 	ldr	r1, [sp, #16]
 	ldr	r5, [sp, #12]
 	subs	r3, r0, r2
-	ldr	r2, .L1537+20
+	ldr	r2, .L1538+20
 	str	r3, [sp, #32]
 	adds	r3, r3, #1
 	str	r3, [sp, #8]
@@ -11037,39 +11051,39 @@ FtlWrite:
 	add	r3, r3, r1
 	ldr	r1, [sp, #8]
 	str	r3, [r2]
-	ldr	r2, .L1537+24
+	ldr	r2, .L1538+24
 	ldr	r3, [r2]
 	add	r3, r3, r1
 	str	r3, [r2]
-.L1493:
+.L1494:
 	ldr	r3, [sp, #8]
-	cbnz	r3, .L1519
-	ldr	r5, .L1537+28
+	cbnz	r3, .L1520
+	ldr	r5, .L1538+28
 	mov	r0, r3
 	ldr	r1, [sp, #32]
 	bl	rk_ftl_garbage_collect
 	ldrh	r2, [r5]
 	cmp	r2, #5
-	bls	.L1520
-.L1522:
+	bls	.L1521
+.L1523:
 	movs	r0, #0
-	b	.L1490
-.L1519:
-	ldr	r4, .L1537+32
+	b	.L1491
+.L1520:
+	ldr	r4, .L1538+32
 	ldrb	r2, [r7, #6]	@ zero_extendqisi2
 	ldrh	r3, [r4]
 	cmp	r2, r3
-	bcc	.L1494
+	bcc	.L1495
 	movw	r2, #1041
-	ldr	r1, .L1537+36
-	ldr	r0, .L1537+40
+	ldr	r1, .L1538+36
+	ldr	r0, .L1538+40
 	bl	printf
-.L1494:
+.L1495:
 	ldrh	r3, [r7, #4]
-	cbnz	r3, .L1495
+	cbnz	r3, .L1496
 	mov	r0, r7
 	bl	allocate_new_data_superblock
-.L1495:
+.L1496:
 	ldrb	r3, [r7, #7]	@ zero_extendqisi2
 	ldrh	r2, [r7, #4]
 	lsls	r3, r3, #2
@@ -11084,22 +11098,22 @@ FtlWrite:
 	str	r3, [sp, #44]
 	ldrh	r3, [r4]
 	cmp	r2, r3
-	bcc	.L1496
+	bcc	.L1497
 	movw	r2, #1074
-	ldr	r1, .L1537+36
-	ldr	r0, .L1537+40
+	ldr	r1, .L1538+36
+	ldr	r0, .L1538+40
 	bl	printf
-.L1496:
-	ldr	r8, .L1537+44
+.L1497:
+	ldr	r8, .L1538+44
 	movs	r3, #0
 	str	r3, [sp, #4]
-.L1497:
+.L1498:
 	ldr	r3, [sp, #4]
 	ldr	r2, [sp, #44]
 	cmp	r3, r2
-	bne	.L1517
-.L1498:
-	ldr	r0, .L1537+44
+	bne	.L1518
+.L1499:
+	ldr	r0, .L1538+44
 	mov	r3, r7
 	movs	r2, #0
 	ldr	r1, [sp, #4]
@@ -11108,21 +11122,21 @@ FtlWrite:
 	ldr	r3, [sp, #4]
 	ldr	r2, [sp, #8]
 	cmp	r3, r2
-	bls	.L1518
+	bls	.L1519
 	mov	r2, #1152
-	ldr	r1, .L1537+36
-	ldr	r0, .L1537+40
+	ldr	r1, .L1538+36
+	ldr	r0, .L1538+40
 	bl	printf
-.L1518:
+.L1519:
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #4]
 	subs	r3, r3, r2
 	str	r3, [sp, #8]
-	b	.L1493
-.L1517:
+	b	.L1494
+.L1518:
 	ldrh	r3, [r7, #4]
 	cmp	r3, #0
-	beq	.L1498
+	beq	.L1499
 	movs	r2, #0
 	add	r1, sp, #48
 	mov	r0, r5
@@ -11130,7 +11144,7 @@ FtlWrite:
 	bl	log2phys
 	mov	r0, r7
 	bl	get_new_active_ppa
-	ldr	r2, .L1537+48
+	ldr	r2, .L1538+48
 	ldr	r1, [sp, #4]
 	ldr	r3, [sp, #4]
 	ldrh	r2, [r2]
@@ -11142,7 +11156,7 @@ FtlWrite:
 	bic	r1, r1, #3
 	str	r5, [r3, #16]
 	str	r1, [sp, #36]
-	ldr	r1, .L1537+52
+	ldr	r1, .L1538+52
 	ldr	r0, [sp, #36]
 	ldr	r1, [r1]
 	add	fp, r1, r0
@@ -11152,12 +11166,12 @@ FtlWrite:
 	mov	r0, fp
 	bl	ftl_memset
 	ldr	r3, [sp, #12]
-	ldr	r2, .L1537+16
+	ldr	r2, .L1538+16
 	cmp	r5, r3
-	beq	.L1499
+	beq	.L1500
 	ldr	r3, [sp, #28]
 	cmp	r5, r3
-	bne	.L1532
+	bne	.L1533
 	ldrh	r2, [r2]
 	ldr	r3, [sp, #16]
 	smulbb	r2, r2, r5
@@ -11166,8 +11180,8 @@ FtlWrite:
 	str	r3, [sp, #24]
 	subs	r4, r4, r2
 	uxth	r4, r4
-	b	.L1502
-.L1499:
+	b	.L1503
+.L1500:
 	ldrh	r4, [r2]
 	mov	r0, r10
 	mov	r1, r4
@@ -11178,42 +11192,42 @@ FtlWrite:
 	cmp	r4, r3
 	it	cs
 	movcs	r4, r3
-.L1502:
-	ldr	r3, .L1537+16
+.L1503:
+	ldr	r3, .L1538+16
 	ldrh	r3, [r3]
 	cmp	r4, r3
 	ldr	r3, [sp, #12]
-	bne	.L1503
+	bne	.L1504
 	cmp	r5, r3
 	ldr	r3, [r8]
 	add	r6, r6, r3
-	bne	.L1504
+	bne	.L1505
 	ldr	r3, [sp, #20]
-.L1534:
+.L1535:
 	str	r3, [r6, #8]
-	b	.L1505
-.L1504:
+	b	.L1506
+.L1505:
 	muls	r4, r5, r4
 	ldr	r3, [sp, #20]
 	sub	r4, r4, r10
 	add	r4, r3, r4, lsl #9
 	str	r4, [r6, #8]
-.L1505:
-	ldr	r3, .L1537+32
+.L1506:
+	ldr	r3, .L1538+32
 	ldrb	r2, [r7, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1514
+	bcc	.L1515
 	movw	r2, #1143
-	ldr	r1, .L1537+36
-	ldr	r0, .L1537+40
+	ldr	r1, .L1538+36
+	ldr	r0, .L1538+40
 	bl	printf
-.L1514:
+.L1515:
 	ldr	r2, [sp, #40]
 	movw	r3, #61589
 	ldr	r1, [sp, #36]
 	strh	r3, [r2, r1]	@ movhi
-	ldr	r2, .L1537+56
+	ldr	r2, .L1538+56
 	str	r5, [fp, #8]
 	adds	r5, r5, #1
 	ldr	r3, [r2]
@@ -11230,19 +11244,19 @@ FtlWrite:
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
 	str	r3, [sp, #4]
-	b	.L1497
-.L1503:
+	b	.L1498
+.L1504:
 	cmp	r5, r3
 	ldr	r3, [r8]
 	ite	eq
-	ldreq	r2, .L1537+60
-	ldrne	r2, .L1537+64
+	ldreq	r2, .L1538+60
+	ldrne	r2, .L1538+64
 	add	r3, r3, r6
 	ldr	r2, [r2]
 	str	r2, [r3, #8]
 	ldr	r3, [sp, #48]
 	adds	r2, r3, #1
-	beq	.L1508
+	beq	.L1509
 	str	r3, [sp, #56]
 	movs	r1, #1
 	ldr	r3, [r8]
@@ -11257,52 +11271,52 @@ FtlWrite:
 	bl	FlashReadPages
 	ldr	r3, [sp, #52]
 	adds	r0, r3, #1
-	bne	.L1509
-	ldr	r1, .L1537+68
-	ldr	r0, .L1537+72
+	bne	.L1510
+	ldr	r1, .L1538+68
+	ldr	r0, .L1538+72
 	ldr	r2, [r1, #72]
 	adds	r2, r2, #1
 	str	r2, [r1, #72]
 	mov	r2, r5
 	ldr	r1, [fp, #8]
 	bl	printf
-.L1512:
+.L1513:
 	ldr	r3, [sp, #12]
 	lsls	r2, r4, #9
 	cmp	r5, r3
-	bne	.L1513
+	bne	.L1514
 	ldr	r3, [r8]
 	ldr	r1, [sp, #20]
 	add	r6, r6, r3
 	ldr	r3, [sp, #24]
 	ldr	r0, [r6, #8]
 	add	r0, r0, r3, lsl #9
-.L1535:
+.L1536:
 	bl	ftl_memcpy
-	b	.L1505
-.L1509:
+	b	.L1506
+.L1510:
 	ldr	r1, [fp, #8]
 	cmp	r5, r1
-	beq	.L1511
-	ldr	r2, .L1537+68
-	ldr	r0, .L1537+76
+	beq	.L1512
+	ldr	r2, .L1538+68
+	ldr	r0, .L1538+76
 	ldr	r3, [r2, #72]
 	adds	r3, r3, #1
 	str	r3, [r2, #72]
 	mov	r2, r5
 	bl	printf
-.L1511:
+.L1512:
 	ldr	r3, [fp, #8]
 	cmp	r5, r3
-	beq	.L1512
+	beq	.L1513
 	mov	r2, #1128
-	ldr	r1, .L1537+36
-	ldr	r0, .L1537+40
+	ldr	r1, .L1538+36
+	ldr	r0, .L1538+40
 	bl	printf
-	b	.L1512
-.L1538:
+	b	.L1513
+.L1539:
 	.align	2
-.L1537:
+.L1538:
 	.word	.LANCHOR33
 	.word	.LANCHOR165
 	.word	.LANCHOR175
@@ -11323,17 +11337,17 @@ FtlWrite:
 	.word	.LANCHOR134
 	.word	.LC44
 	.word	.LC45
-.L1508:
+.L1509:
 	ldr	r3, [r8]
 	movs	r1, #0
-	ldr	r2, .L1539
+	ldr	r2, .L1540
 	add	r3, r3, r6
 	ldrh	r2, [r2]
 	ldr	r0, [r3, #8]
 	bl	ftl_memset
-	b	.L1512
-.L1513:
-	ldr	r3, .L1539+4
+	b	.L1513
+.L1514:
+	ldr	r3, .L1540+4
 	ldrh	r1, [r3]
 	ldr	r3, [r8]
 	muls	r1, r5, r1
@@ -11342,8 +11356,8 @@ FtlWrite:
 	ldr	r0, [r6, #8]
 	sub	r1, r1, r10
 	add	r1, r3, r1, lsl #9
-	b	.L1535
-.L1532:
+	b	.L1536
+.L1533:
 	ldr	r3, [r8]
 	add	r6, r6, r3
 	ldrh	r3, [r2]
@@ -11351,30 +11365,30 @@ FtlWrite:
 	muls	r3, r5, r3
 	sub	r3, r3, r10
 	add	r3, r2, r3, lsl #9
-	b	.L1534
-.L1520:
-	ldr	r6, .L1539+8
+	b	.L1535
+.L1521:
+	ldr	r6, .L1540+8
 	mov	r4, #256
-	ldr	r7, .L1539+12
-.L1523:
+	ldr	r7, .L1540+12
+.L1524:
 	ldrh	r3, [r6]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1521
+	bne	.L1522
 	ldrh	r2, [r7]
 	cmp	r2, r3
-	bne	.L1521
+	bne	.L1522
 	movs	r0, #0
 	bl	List_get_gc_head_node
 	uxth	r0, r0
 	bl	FtlGcRefreshBlock
-.L1521:
-	ldr	r2, .L1539+16
+.L1522:
+	ldr	r2, .L1540+16
 	movs	r3, #128
 	movs	r1, #1
 	mov	r0, r1
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L1539+20
+	ldr	r2, .L1540+20
 	strh	r3, [r2]	@ movhi
 	bl	rk_ftl_garbage_collect
 	movs	r1, #1
@@ -11382,16 +11396,16 @@ FtlWrite:
 	bl	rk_ftl_garbage_collect
 	ldrh	r3, [r5]
 	cmp	r3, #2
-	bhi	.L1522
+	bhi	.L1523
 	subs	r4, r4, #1
-	bne	.L1523
-	b	.L1522
-.L1526:
+	bne	.L1524
+	b	.L1523
+.L1527:
 	mov	r0, #-1
-	b	.L1490
-.L1540:
+	b	.L1491
+.L1541:
 	.align	2
-.L1539:
+.L1540:
 	.word	.LANCHOR22
 	.word	.LANCHOR11
 	.word	.LANCHOR144
@@ -11428,16 +11442,16 @@ FtlLoadSysInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r1, #0
-	ldr	r8, .L1572+140
+	ldr	r8, .L1573+140
 	sub	sp, sp, #24
-	ldr	r7, .L1572
+	ldr	r7, .L1573
 	ldr	r3, [r8]
-	ldr	r4, .L1572+4
-	ldr	fp, .L1572+144
+	ldr	r4, .L1573+4
+	ldr	fp, .L1573+144
 	ldrh	r2, [r7]
-	ldr	r5, .L1572+8
+	ldr	r5, .L1573+8
 	str	r3, [r4, #8]
-	ldr	r6, .L1572+12
+	ldr	r6, .L1573+12
 	ldr	r3, [fp]
 	lsls	r2, r2, #1
 	ldr	r0, [r5]
@@ -11447,33 +11461,33 @@ FtlLoadSysInfo:
 	movw	r3, #65535
 	str	r5, [sp, #16]
 	cmp	r0, r3
-	bne	.L1543
-.L1554:
+	bne	.L1544
+.L1555:
 	mov	r0, #-1
-.L1542:
+.L1543:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1543:
+.L1544:
 	movs	r1, #1
 	bl	FtlGetLastWrittenPage
 	ldrsh	r10, [r6]
 	sxth	r5, r0
 	adds	r0, r0, #1
 	strh	r0, [r6, #2]	@ movhi
-.L1545:
+.L1546:
 	cmp	r5, #0
-	bge	.L1551
-	movw	r2, #1467
-	ldr	r1, .L1572+16
-	ldr	r0, .L1572+20
+	bge	.L1552
+	movw	r2, #1474
+	ldr	r1, .L1573+16
+	ldr	r0, .L1573+20
 	bl	printf
-	b	.L1550
-.L1551:
+	b	.L1551
+.L1552:
 	orr	r3, r5, r10, lsl #10
 	movs	r2, #1
 	mov	r1, r2
-	ldr	r0, .L1572+4
+	ldr	r0, .L1573+4
 	str	r3, [r4, #4]
 	ldr	r3, [r8]
 	str	r3, [r4, #8]
@@ -11481,67 +11495,67 @@ FtlLoadSysInfo:
 	ldr	r3, [r4, #12]
 	ldr	r3, [r3, #12]
 	str	r3, [sp, #20]
-	cbz	r3, .L1546
+	cbz	r3, .L1547
 	ldr	r2, [r4]
 	adds	r2, r2, #1
-	beq	.L1546
-	ldr	r2, .L1572+24
+	beq	.L1547
+	ldr	r2, .L1573+24
 	ldr	r0, [r4, #8]
 	ldrh	r1, [r2]
 	bl	js_hash
 	ldr	r3, [sp, #20]
 	cmp	r3, r0
-	beq	.L1546
+	beq	.L1547
 	str	r0, [sp, #8]
 	mov	r2, r10
 	str	r3, [sp, #4]
 	ldrh	r3, [r6, #4]
-	ldr	r1, .L1572+16
-	ldr	r0, .L1572+28
+	ldr	r1, .L1573+16
+	ldr	r0, .L1573+28
 	str	r3, [sp]
 	mov	r3, r5
 	bl	printf
-	cbnz	r5, .L1547
+	cbnz	r5, .L1548
 	ldrh	r3, [r6, #4]
 	cmp	r10, r3
-	beq	.L1547
+	beq	.L1548
 	sxth	r10, r3
-	ldr	r3, .L1572+32
+	ldr	r3, .L1573+32
 	ldrh	r5, [r3]
-.L1549:
+.L1550:
 	subs	r5, r5, #1
 	sxth	r5, r5
-	b	.L1545
-.L1547:
+	b	.L1546
+.L1548:
 	mov	r3, #-1
 	str	r3, [r4]
-.L1546:
+.L1547:
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L1549
+	beq	.L1550
 	ldr	r3, [r8]
-	ldr	r2, .L1572+36
+	ldr	r2, .L1573+36
 	ldr	r3, [r3]
 	cmp	r3, r2
-	bne	.L1549
+	bne	.L1550
 	ldr	r3, [fp]
 	ldrh	r2, [r3]
 	movw	r3, #61604
 	cmp	r2, r3
-	bne	.L1549
-.L1550:
-	ldr	r2, .L1572+24
+	bne	.L1550
+.L1551:
+	ldr	r2, .L1573+24
 	ldrh	r3, [r7]
 	ldrh	r2, [r2]
 	adds	r3, r3, #24
 	cmp	r2, r3, lsl #1
-	bcs	.L1553
-	movw	r2, #1469
-	ldr	r1, .L1572+16
-	ldr	r0, .L1572+20
+	bcs	.L1554
+	movw	r2, #1476
+	ldr	r1, .L1573+16
+	ldr	r0, .L1573+20
 	bl	printf
-.L1553:
-	ldr	r5, .L1572+40
+.L1554:
+	ldr	r5, .L1573+40
 	movs	r2, #48
 	ldr	r1, [r4, #8]
 	mov	r0, r5
@@ -11555,56 +11569,56 @@ FtlLoadSysInfo:
 	ldr	r0, [r3]
 	bl	ftl_memcpy
 	ldr	r2, [r5]
-	ldr	r3, .L1572+36
+	ldr	r3, .L1573+36
 	cmp	r2, r3
-	bne	.L1554
-	ldr	r3, .L1572+44
+	bne	.L1555
+	ldr	r3, .L1573+44
 	ldrb	r2, [r4, #10]	@ zero_extendqisi2
 	ldrh	r5, [r5, #8]
 	ldrh	r3, [r3]
 	strh	r5, [r6, #6]	@ movhi
 	cmp	r2, r3
-	bne	.L1554
-	ldr	r3, .L1572+48
-	ldr	r2, .L1572+52
+	bne	.L1555
+	ldr	r3, .L1573+48
+	ldr	r2, .L1573+52
 	str	r5, [r3]
-	ldr	r3, .L1572+56
+	ldr	r3, .L1573+56
 	ldrh	r3, [r3]
 	muls	r3, r5, r3
 	str	r3, [r2]
-	ldr	r2, .L1572+60
+	ldr	r2, .L1573+60
 	ldrh	r2, [r2]
 	muls	r3, r2, r3
-	ldr	r2, .L1572+64
+	ldr	r2, .L1573+64
 	str	r3, [r2]
-	ldr	r3, .L1572+68
+	ldr	r3, .L1573+68
 	ldr	r6, [r3]
-	ldr	r3, .L1572+72
+	ldr	r3, .L1573+72
 	ldrh	r0, [r3, #6]
-	ldr	r3, .L1572+76
+	ldr	r3, .L1573+76
 	subs	r0, r6, r0
 	ldrh	r1, [r3]
 	subs	r0, r0, r5
 	bl	__aeabi_uidiv
-	ldr	r3, .L1572+80
+	ldr	r3, .L1573+80
 	cmp	r5, r6
 	strh	r0, [r3]	@ movhi
-	bls	.L1555
-	movw	r2, #1491
-	ldr	r1, .L1572+16
-	ldr	r0, .L1572+20
+	bls	.L1556
+	movw	r2, #1498
+	ldr	r1, .L1573+16
+	ldr	r0, .L1573+20
 	bl	printf
-.L1555:
+.L1556:
 	ldrh	r2, [r4, #16]
-	ldr	r3, .L1572+84
+	ldr	r3, .L1573+84
 	ldrh	ip, [r4, #14]
-	ldr	r7, .L1572+88
+	ldr	r7, .L1573+88
 	lsrs	r1, r2, #6
 	and	r2, r2, #63
 	strb	r2, [r3, #6]
 	ldrb	r2, [r4, #11]	@ zero_extendqisi2
 	strh	r1, [r3, #2]	@ movhi
-	ldr	r1, .L1572+92
+	ldr	r1, .L1573+92
 	strb	r2, [r3, #8]
 	ldrh	r2, [r4, #18]
 	strh	ip, [r3]	@ movhi
@@ -11623,7 +11637,7 @@ FtlLoadSysInfo:
 	strh	r5, [r1, #2]	@ movhi
 	ldrh	r5, [r4, #22]
 	strb	r2, [r1, #8]
-	ldr	r2, .L1572+96
+	ldr	r2, .L1573+96
 	strh	r5, [r2]	@ movhi
 	ldrh	r5, [r4, #24]
 	lsrs	r6, r5, #6
@@ -11633,31 +11647,31 @@ FtlLoadSysInfo:
 	strh	r6, [r2, #2]	@ movhi
 	ldr	r6, [r4, #32]
 	strb	r5, [r2, #8]
-	ldr	r5, .L1572+100
+	ldr	r5, .L1573+100
 	str	r3, [r5]
-	ldr	r5, .L1572+104
+	ldr	r5, .L1573+104
 	str	r3, [r5]
-	ldr	r5, .L1572+108
+	ldr	r5, .L1573+108
 	str	r3, [r5]
-	ldr	r5, .L1572+112
+	ldr	r5, .L1573+112
 	str	r3, [r5]
-	ldr	r5, .L1572+116
+	ldr	r5, .L1573+116
 	str	r6, [r5]
 	mov	r6, r1
-	ldr	r5, .L1572+120
+	ldr	r5, .L1573+120
 	str	r3, [r5]
-	ldr	r5, .L1572+124
+	ldr	r5, .L1573+124
 	str	r3, [r5]
-	ldr	r5, .L1572+128
+	ldr	r5, .L1573+128
 	ldr	lr, [r4, #40]
 	str	r3, [r5]
-	ldr	r3, .L1572+132
+	ldr	r3, .L1573+132
 	ldr	r5, [r3]
 	cmp	lr, r5
 	mov	r5, r2
 	it	hi
 	strhi	lr, [r3]
-	ldr	r3, .L1572+136
+	ldr	r3, .L1573+136
 	ldr	r2, [r4, #36]
 	ldr	r1, [r3]
 	cmp	r2, r1
@@ -11665,36 +11679,36 @@ FtlLoadSysInfo:
 	strhi	r2, [r3]
 	movw	r3, #65535
 	cmp	ip, r3
-	beq	.L1558
-	ldr	r0, .L1572+84
-	bl	make_superblock
-.L1558:
-	ldrh	r2, [r6]
-	movw	r3, #65535
-	cmp	r2, r3
 	beq	.L1559
-	ldr	r0, .L1572+92
+	ldr	r0, .L1573+84
 	bl	make_superblock
 .L1559:
-	ldrh	r2, [r5]
+	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
 	beq	.L1560
-	ldr	r0, .L1572+96
+	ldr	r0, .L1573+92
 	bl	make_superblock
 .L1560:
-	ldrh	r2, [r7]
+	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
 	beq	.L1561
-	ldr	r0, .L1572+88
+	ldr	r0, .L1573+96
 	bl	make_superblock
 .L1561:
+	ldrh	r2, [r7]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L1562
+	ldr	r0, .L1573+88
+	bl	make_superblock
+.L1562:
 	movs	r0, #0
-	b	.L1542
-.L1573:
+	b	.L1543
+.L1574:
 	.align	2
-.L1572:
+.L1573:
 	.word	.LANCHOR4
 	.word	.LANCHOR137
 	.word	.LANCHOR41
@@ -11753,7 +11767,7 @@ FtlMapTblRecovery:
 	movs	r7, #0
 	str	r3, [sp, #8]
 	ldr	r3, [r0, #16]
-	ldr	r6, .L1615
+	ldr	r6, .L1616
 	str	r3, [sp, #24]
 	ldrh	r3, [r0, #6]
 	str	r3, [sp, #12]
@@ -11763,13 +11777,13 @@ FtlMapTblRecovery:
 	ldr	r3, [sp, #12]
 	lsls	r2, r3, #2
 	bl	ftl_memset
-	ldr	r3, .L1615+4
+	ldr	r3, .L1616+4
 	str	r7, [r4, #32]
 	str	r7, [r4, #28]
 	ldr	r2, [r3]
 	str	r3, [sp, #20]
 	str	r2, [r6, #8]
-	ldr	r2, .L1615+8
+	ldr	r2, .L1616+8
 	ldr	fp, [r2]
 	movw	r2, #65535
 	str	fp, [r6, #12]
@@ -11777,20 +11791,20 @@ FtlMapTblRecovery:
 	strh	r2, [r4, #2]	@ movhi
 	movs	r2, #1
 	str	r2, [r4, #36]
-.L1575:
+.L1576:
 	ldr	r3, [sp, #16]
 	sxth	r5, r7
 	cmp	r5, r3
-	bge	.L1594
+	bge	.L1595
 	ldr	r3, [sp, #16]
 	subs	r3, r3, #1
 	cmp	r5, r3
-	bne	.L1576
+	bne	.L1577
 	movs	r1, #1
 	ldrh	r0, [r8, r5, lsl #1]
 	bl	FtlGetLastWrittenPage
 	sxth	r3, r0
-	ldr	r6, .L1615
+	ldr	r6, .L1616
 	add	r10, r8, r5, lsl #1
 	strh	r7, [r4]	@ movhi
 	str	r3, [sp, #16]
@@ -11800,22 +11814,22 @@ FtlMapTblRecovery:
 	strh	r0, [r4, #2]	@ movhi
 	ldr	r3, [r3, r5, lsl #2]
 	str	r3, [r4, #28]
-.L1577:
+.L1578:
 	ldr	r3, [sp, #16]
 	sxth	r8, r7
 	cmp	r8, r3
-	ble	.L1580
-.L1594:
+	ble	.L1581
+.L1595:
 	mov	r0, r4
 	bl	ftl_free_no_use_map_blk
-	ldr	r3, .L1615+12
+	ldr	r3, .L1616+12
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1582
+	bne	.L1583
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L1582:
+.L1583:
 	mov	r0, r4
 	bl	ftl_map_blk_gc
 	mov	r0, r4
@@ -11824,9 +11838,9 @@ FtlMapTblRecovery:
 	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1580:
+.L1581:
 	ldrh	r2, [r10]
-	ldr	r0, .L1615
+	ldr	r0, .L1616
 	orr	r2, r8, r2, lsl #10
 	str	r2, [r6, #4]
 	movs	r2, #1
@@ -11835,34 +11849,34 @@ FtlMapTblRecovery:
 	ldr	r2, [r6, #12]
 	ldr	r2, [r2, #12]
 	str	r2, [sp, #20]
-	cbz	r2, .L1578
+	cbz	r2, .L1579
 	ldr	r1, [r6]
 	adds	r1, r1, #1
-	beq	.L1578
-	ldr	r3, .L1615+16
+	beq	.L1579
+	ldr	r3, .L1616+16
 	ldr	r0, [r6, #8]
 	ldrh	r1, [r3]
 	bl	js_hash
 	ldr	r2, [sp, #20]
 	cmp	r2, r0
-	beq	.L1578
+	beq	.L1579
 	str	r0, [sp, #4]
 	mov	r3, r8
 	str	r2, [sp]
 	mov	r2, r5
-	ldr	r1, .L1615+20
-	ldr	r0, .L1615+24
+	ldr	r1, .L1616+20
+	ldr	r0, .L1616+24
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r6]
-.L1578:
+.L1579:
 	ldr	r3, [r6]
 	adds	r3, r3, #1
-	beq	.L1579
+	beq	.L1580
 	ldrh	r3, [fp, #8]
 	ldr	r2, [sp, #12]
 	cmp	r2, r3
-	bls	.L1579
+	bls	.L1580
 	ldrh	r1, [fp]
 	ldrh	r2, [r4, #4]
 	cmp	r1, r2
@@ -11870,15 +11884,15 @@ FtlMapTblRecovery:
 	ldreq	r2, [r6, #4]
 	ldreq	r1, [sp, #8]
 	streq	r2, [r1, r3, lsl #2]
-.L1579:
+.L1580:
 	adds	r7, r7, #1
-	b	.L1577
-.L1576:
+	b	.L1578
+.L1577:
 	ldr	r3, [sp, #20]
-	ldr	r10, .L1615+12
+	ldr	r10, .L1616+12
 	ldrh	r2, [r8, r5, lsl #1]
 	ldr	r3, [r3]
-	ldr	r0, .L1615
+	ldr	r0, .L1616
 	str	r3, [r6, #8]
 	add	r3, r8, r5, lsl #1
 	str	r3, [sp, #28]
@@ -11891,25 +11905,25 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	r3, [r6]
 	adds	r3, r3, #1
-	beq	.L1596
+	beq	.L1597
 	ldrh	r2, [fp]
 	ldrh	r3, [r4, #4]
 	cmp	r2, r3
-	bne	.L1596
+	bne	.L1597
 	ldrh	r2, [fp, #8]
 	movw	r3, #64245
 	cmp	r2, r3
-	beq	.L1584
-.L1596:
+	beq	.L1585
+.L1597:
 	mov	r10, #0
-.L1585:
-	ldr	r2, .L1615+12
+.L1586:
+	ldr	r2, .L1616+12
 	sxth	r3, r10
 	ldrh	r2, [r2]
 	cmp	r3, r2
-	bge	.L1592
+	bge	.L1593
 	ldr	r2, [sp, #28]
-	ldr	r0, .L1615
+	ldr	r0, .L1616
 	str	r3, [sp, #36]
 	ldrh	r2, [r2]
 	orr	r2, r3, r2, lsl #10
@@ -11920,34 +11934,34 @@ FtlMapTblRecovery:
 	ldr	r2, [r6, #12]
 	ldr	r2, [r2, #12]
 	str	r2, [sp, #32]
-	cbz	r2, .L1589
+	cbz	r2, .L1590
 	ldr	r1, [r6]
 	adds	r1, r1, #1
-	beq	.L1589
-	ldr	r1, .L1615+16
+	beq	.L1590
+	ldr	r1, .L1616+16
 	ldr	r0, [r6, #8]
 	ldrh	r1, [r1]
 	bl	js_hash
 	ldr	r2, [sp, #32]
 	cmp	r2, r0
-	beq	.L1589
+	beq	.L1590
 	str	r0, [sp, #4]
 	str	r2, [sp]
 	mov	r2, r5
 	ldr	r3, [sp, #36]
-	ldr	r1, .L1615+20
-	ldr	r0, .L1615+28
+	ldr	r1, .L1616+20
+	ldr	r0, .L1616+28
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r6]
-.L1589:
+.L1590:
 	ldr	r3, [r6]
 	adds	r3, r3, #1
-	beq	.L1590
+	beq	.L1591
 	ldrh	r3, [fp, #8]
 	ldr	r2, [sp, #12]
 	cmp	r2, r3
-	bls	.L1590
+	bls	.L1591
 	ldrh	r1, [fp]
 	ldrh	r2, [r4, #4]
 	cmp	r1, r2
@@ -11955,39 +11969,39 @@ FtlMapTblRecovery:
 	ldreq	r2, [r6, #4]
 	ldreq	r1, [sp, #8]
 	streq	r2, [r1, r3, lsl #2]
-.L1590:
+.L1591:
 	add	r10, r10, #1
-	b	.L1585
-.L1584:
+	b	.L1586
+.L1585:
 	ldr	r3, [sp, #20]
 	movs	r1, #0
 	ldrh	r2, [r10]
 	ldr	r0, [r3]
 	add	lr, r2, #-1
-.L1586:
+.L1587:
 	sxth	r3, r1
 	cmp	r3, lr
-	blt	.L1588
-.L1592:
+	blt	.L1589
+.L1593:
 	adds	r7, r7, #1
-	b	.L1575
-.L1588:
+	b	.L1576
+.L1589:
 	lsls	r5, r3, #3
 	ldr	r3, [r0, r3, lsl #3]
 	ldr	r2, [sp, #12]
 	uxth	ip, r3
 	cmp	r2, ip
-	bls	.L1587
+	bls	.L1588
 	add	r5, r5, r0
 	ldr	r2, [sp, #8]
 	ldr	r5, [r5, #4]
 	str	r5, [r2, ip, lsl #2]
-.L1587:
+.L1588:
 	adds	r1, r1, #1
-	b	.L1586
-.L1616:
+	b	.L1587
+.L1617:
 	.align	2
-.L1615:
+.L1616:
 	.word	.LANCHOR137
 	.word	.LANCHOR105
 	.word	.LANCHOR113
@@ -12009,36 +12023,36 @@ FtlLoadVonderInfo:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L1618
-	ldr	r0, .L1618+4
+	ldr	r3, .L1619
+	ldr	r0, .L1619+4
 	ldrh	r3, [r3]
 	strh	r3, [r0, #10]	@ movhi
 	movw	r3, #61574
 	strh	r3, [r0, #4]	@ movhi
-	ldr	r3, .L1618+8
+	ldr	r3, .L1619+8
 	ldrh	r3, [r3]
 	strh	r3, [r0, #8]	@ movhi
-	ldr	r3, .L1618+12
+	ldr	r3, .L1619+12
 	ldrh	r3, [r3]
 	strh	r3, [r0, #6]	@ movhi
-	ldr	r3, .L1618+16
+	ldr	r3, .L1619+16
 	ldr	r3, [r3]
 	str	r3, [r0, #12]
-	ldr	r3, .L1618+20
+	ldr	r3, .L1619+20
 	ldr	r3, [r3]
 	str	r3, [r0, #16]
-	ldr	r3, .L1618+24
+	ldr	r3, .L1619+24
 	ldr	r3, [r3]
 	str	r3, [r0, #20]
-	ldr	r3, .L1618+28
+	ldr	r3, .L1619+28
 	ldr	r3, [r3]
 	str	r3, [r0, #24]
 	bl	FtlMapTblRecovery
 	movs	r0, #0
 	pop	{r3, pc}
-.L1619:
+.L1620:
 	.align	2
-.L1618:
+.L1619:
 	.word	.LANCHOR26
 	.word	.LANCHOR160
 	.word	.LANCHOR34
@@ -12061,13 +12075,13 @@ FtlLoadMapInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	FtlL2PDataInit
-	ldr	r0, .L1621
+	ldr	r0, .L1622
 	bl	FtlMapTblRecovery
 	movs	r0, #0
 	pop	{r3, pc}
-.L1622:
+.L1623:
 	.align	2
-.L1621:
+.L1622:
 	.word	.LANCHOR128
 	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
 	.section	.text.FtlSysBlkInit,"ax",%progbits
@@ -12083,27 +12097,27 @@ FtlSysBlkInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r3, #0
-	ldr	r4, .L1636
+	ldr	r4, .L1637
 	strh	r3, [r4]	@ movhi
-	ldr	r3, .L1636+4
+	ldr	r3, .L1637+4
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlScanSysBlk
-	ldr	r3, .L1636+8
+	ldr	r3, .L1637+8
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1624
-.L1626:
+	bne	.L1625
+.L1627:
 	mov	r6, #-1
-.L1623:
+.L1624:
 	mov	r0, r6
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1624:
+.L1625:
 	bl	FtlLoadSysInfo
 	mov	r6, r0
 	cmp	r0, #0
-	bne	.L1626
+	bne	.L1627
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -12113,40 +12127,40 @@ FtlSysBlkInit:
 	bl	FtlPowerLostRecovery
 	movs	r0, #1
 	bl	FtlUpdateVaildLpn
-	ldr	r3, .L1636+12
+	ldr	r3, .L1637+12
 	movs	r0, #12
 	ldrh	r1, [r3]
-	ldr	r3, .L1636+16
+	ldr	r3, .L1637+16
 	ldr	r2, [r3]
 	mov	r3, r6
-.L1627:
+.L1628:
 	cmp	r3, r1
-	bge	.L1632
+	bge	.L1633
 	mla	r5, r0, r3, r2
 	ldr	r5, [r5, #4]
 	cmp	r5, #0
-	bge	.L1628
-.L1632:
-	ldr	r0, .L1636+20
+	bge	.L1629
+.L1633:
+	ldr	r0, .L1637+20
 	cmp	r3, r1
 	ldr	r2, [r0]
 	add	r2, r2, #32
 	str	r2, [r0]
-	bge	.L1634
-.L1629:
-	ldr	r5, .L1636+24
-	ldr	r4, .L1636+28
+	bge	.L1635
+.L1630:
+	ldr	r5, .L1637+24
+	ldr	r4, .L1637+28
 	mov	r0, r5
 	bl	FtlSuperblockPowerLostFix
 	mov	r0, r4
 	bl	FtlSuperblockPowerLostFix
-	ldr	r3, .L1636+32
+	ldr	r3, .L1637+32
 	ldrh	r1, [r5]
 	ldrh	r0, [r5, #4]
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
-	ldr	r0, .L1636+36
+	ldr	r0, .L1637+36
 	strh	r3, [r2, r1, lsl #1]	@ movhi
 	ldrh	r7, [r4, #4]
 	ldrh	r3, [r0]
@@ -12162,27 +12176,27 @@ FtlSysBlkInit:
 	strb	r3, [r4, #6]
 	strh	r3, [r4, #4]	@ movhi
 	strh	r2, [r4, #2]	@ movhi
-	ldr	r2, .L1636+40
+	ldr	r2, .L1637+40
 	ldrh	r3, [r2, #30]
 	adds	r3, r3, #1
 	strh	r3, [r2, #30]	@ movhi
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1635:
+.L1636:
 	bl	FtlVpcTblFlush
-	b	.L1623
-.L1628:
+	b	.L1624
+.L1629:
 	adds	r3, r3, #1
-	b	.L1627
-.L1634:
+	b	.L1628
+.L1635:
 	ldrh	r3, [r4]
 	cmp	r3, #0
-	bne	.L1629
+	bne	.L1630
 	bl	l2p_flush
-	b	.L1635
-.L1637:
+	b	.L1636
+.L1638:
 	.align	2
-.L1636:
+.L1637:
 	.word	.LANCHOR155
 	.word	.LANCHOR3
 	.word	.LANCHOR138
@@ -12208,66 +12222,66 @@ ftl_low_format:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #0
-	ldr	r2, .L1662
-	ldr	r4, .L1662+4
+	ldr	r2, .L1663
+	ldr	r4, .L1663+4
 	str	r3, [r2]
-	ldr	r5, .L1662+8
-	ldr	r2, .L1662+12
+	ldr	r5, .L1663+8
+	ldr	r2, .L1663+12
 	mov	r8, r4
 	ldrh	r0, [r4]
 	str	r3, [r5]
 	str	r3, [r2]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	r0, .L1639
+	cbz	r0, .L1640
 	bl	FtlMakeBbt
-.L1639:
-	ldr	r3, .L1662+16
-	ldr	r2, .L1662+20
-	ldr	r7, .L1662+24
+.L1640:
+	ldr	r3, .L1663+16
+	ldr	r2, .L1663+20
+	ldr	r7, .L1663+24
 	ldrh	r1, [r3]
 	ldr	r4, [r2]
-	ldr	r2, .L1662+28
+	ldr	r2, .L1663+28
 	str	r3, [sp, #4]
 	lsls	r1, r1, #7
 	ldr	r6, [r2]
 	movs	r2, #0
-.L1640:
+.L1641:
 	uxth	r3, r2
 	adds	r2, r2, #1
 	cmp	r3, r1
-	blt	.L1641
-	ldr	r7, .L1662+32
+	blt	.L1642
+	ldr	r7, .L1663+32
 	mov	r10, #0
-	ldr	r6, .L1662+36
+	ldr	r6, .L1663+36
 	ldrh	r4, [r7]
 	mov	fp, r6
-.L1642:
+.L1643:
 	ldrh	r3, [r6]
 	cmp	r3, r4
-	bhi	.L1643
-	ldr	r6, .L1662+40
+	bhi	.L1644
+	ldr	r6, .L1663+40
 	sub	r3, r10, #2
 	ldrh	r1, [r6]
 	cmp	r3, r1, lsl #1
-	bgt	.L1644
-.L1648:
+	bgt	.L1645
+.L1649:
 	movs	r4, #0
 	mov	r8, r4
-.L1645:
+.L1646:
 	ldrh	r3, [r7]
 	uxth	r0, r4
 	adds	r4, r4, #1
 	cmp	r3, r0
-	bhi	.L1649
+	bhi	.L1650
 	ldrh	r2, [fp]
-	ldr	r3, .L1662+44
+	ldr	r3, .L1663+44
 	ldrh	r4, [r6]
-	ldr	r6, .L1662+48
+	ldr	r6, .L1663+48
 	str	r2, [r3]
-	ldr	r3, .L1662+52
+	ldr	r3, .L1663+52
 	mov	r1, r4
-	ldr	r7, .L1662+56
+	ldr	r7, .L1663+56
 	ldr	r2, [r3]
 	mov	r0, r2
 	str	r2, [sp, #12]
@@ -12280,7 +12294,7 @@ ftl_low_format:
 	movs	r1, #24
 	muls	r1, r4, r1
 	cmp	r8, r1
-	ble	.L1650
+	ble	.L1651
 	ldr	r2, [sp, #12]
 	mov	r1, r4
 	str	r0, [sp, #8]
@@ -12291,10 +12305,10 @@ ftl_low_format:
 	lsrs	r0, r0, #5
 	adds	r0, r0, #24
 	strh	r0, [r6]	@ movhi
-.L1650:
-	ldr	r2, .L1662+60
+.L1651:
+	ldr	r2, .L1663+60
 	ldrh	r2, [r2]
-	cbz	r2, .L1652
+	cbz	r2, .L1653
 	ldrh	r1, [r6]
 	add	r1, r1, r2, lsr #1
 	strh	r1, [r6]	@ movhi
@@ -12305,39 +12319,39 @@ ftl_low_format:
 	strlt	r3, [r7]
 	addlt	r2, r2, r10
 	strhlt	r2, [r6]	@ movhi
-.L1652:
+.L1653:
 	ldrh	r2, [r6]
 	ldr	r3, [r7]
-	ldr	r6, .L1662+64
+	ldr	r6, .L1663+64
 	subs	r3, r3, r2
 	muls	r4, r3, r4
-	ldr	r3, .L1662+68
+	ldr	r3, .L1663+68
 	ldrh	r3, [r3]
 	str	r4, [r6]
 	muls	r4, r3, r4
 	ldr	r3, [sp, #4]
 	ldrh	r3, [r3]
 	str	r4, [r7]
-	ldr	r7, .L1662+72
+	ldr	r7, .L1663+72
 	muls	r4, r3, r4
-	ldr	r3, .L1662+76
+	ldr	r3, .L1663+76
 	str	r4, [r3]
 	bl	FtlBbmTblFlush
 	ldrh	r2, [fp]
 	movs	r1, #0
 	ldr	r0, [r7]
-	ldr	r4, .L1662+80
+	ldr	r4, .L1663+80
 	lsls	r2, r2, #1
 	mov	r10, r4
 	bl	ftl_memset
-	ldr	r2, .L1662+84
+	ldr	r2, .L1663+84
 	movs	r3, #0
 	movw	r1, #65535
 	strh	r3, [r4, #2]	@ movhi
 	mov	r8, r1
 	strb	r3, [r4, #6]
 	str	r3, [r2]
-	ldr	r2, .L1662+88
+	ldr	r2, .L1663+88
 	strh	r3, [r4]	@ movhi
 	strh	r3, [r2, #2]	@ movhi
 	strb	r3, [r2, #6]
@@ -12345,26 +12359,26 @@ ftl_low_format:
 	movs	r3, #1
 	strh	r1, [r2]	@ movhi
 	strb	r3, [r4, #8]
-.L1654:
+.L1655:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r4]
 	cmp	r3, #0
-	bne	.L1655
+	bne	.L1656
 	ldr	r3, [r7]
 	strh	r8, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	b	.L1654
-.L1641:
+	b	.L1655
+.L1642:
 	mvns	r0, r3
 	orr	r0, r3, r0, lsl #16
 	str	r0, [r4, r3, lsl #2]
 	str	r7, [r6, r3, lsl #2]
-	b	.L1640
-.L1643:
+	b	.L1641
+.L1644:
 	mov	r0, r4
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
@@ -12372,11 +12386,11 @@ ftl_low_format:
 	add	r10, r10, r0
 	uxth	r10, r10
 	uxth	r4, r4
-	b	.L1642
-.L1644:
+	b	.L1643
+.L1645:
 	mov	r0, r10
 	bl	__aeabi_uidiv
-	ldr	r3, .L1662+92
+	ldr	r3, .L1663+92
 	ldr	r3, [r3]
 	add	r0, r0, r3
 	uxth	r0, r0
@@ -12384,23 +12398,23 @@ ftl_low_format:
 	ldrh	r0, [r8]
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	r4, [r7]
-.L1646:
+.L1647:
 	ldrh	r3, [fp]
 	cmp	r3, r4
-	bls	.L1648
+	bls	.L1649
 	mov	r0, r4
 	movs	r1, #1
 	adds	r4, r4, #1
 	bl	FtlLowFormatEraseBlock
 	uxth	r4, r4
-	b	.L1646
-.L1649:
+	b	.L1647
+.L1650:
 	movs	r1, #0
 	bl	FtlLowFormatEraseBlock
 	add	r8, r8, r0
 	uxth	r8, r8
-	b	.L1645
-.L1655:
+	b	.L1646
+.L1656:
 	ldr	r3, [r5]
 	movw	r8, #65535
 	ldrh	r1, [r4, #4]
@@ -12410,7 +12424,7 @@ ftl_low_format:
 	ldr	r3, [r7]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
 	movs	r2, #0
-	ldr	r3, .L1662+96
+	ldr	r3, .L1663+96
 	strh	r2, [r3, #2]	@ movhi
 	mov	r10, r3
 	strb	r2, [r3, #6]
@@ -12420,19 +12434,19 @@ ftl_low_format:
 	strh	r2, [r3]	@ movhi
 	movs	r2, #1
 	strb	r2, [r3, #8]
-.L1656:
+.L1657:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r4]
-	cbnz	r3, .L1657
+	cbnz	r3, .L1658
 	ldr	r3, [r7]
 	strh	r8, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	b	.L1656
-.L1657:
+	b	.L1657
+.L1658:
 	ldr	r3, [r5]
 	ldrh	r1, [r4, #4]
 	str	r3, [r4, #12]
@@ -12441,10 +12455,10 @@ ftl_low_format:
 	movw	r4, #65535
 	ldr	r3, [r7]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L1662+100
+	ldr	r3, .L1663+100
 	strh	r4, [r3]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L1662+104
+	ldr	r3, .L1663+104
 	movs	r2, #0
 	strh	r2, [r3, #2]	@ movhi
 	ldr	r2, [r6]
@@ -12457,18 +12471,18 @@ ftl_low_format:
 	str	r2, [r5]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	r0, .L1658
-	ldr	r3, .L1662+108
+	cbnz	r0, .L1659
+	ldr	r3, .L1663+108
 	movs	r2, #1
 	str	r2, [r3]
-.L1658:
+.L1659:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1663:
+.L1664:
 	.align	2
-.L1662:
+.L1663:
 	.word	.LANCHOR82
 	.word	.LANCHOR3
 	.word	.LANCHOR81
@@ -12511,40 +12525,40 @@ sftl_init:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
 	mov	r3, #-1
-	ldr	r4, .L1676
+	ldr	r4, .L1677
 	movs	r6, #0
-	ldr	r1, .L1676+4
-	ldr	r0, .L1676+8
+	ldr	r1, .L1677+4
+	ldr	r0, .L1677+8
 	str	r3, [r4]
 	bl	printf
-	ldr	r0, .L1676+12
+	ldr	r0, .L1677+12
 	bl	FtlConstantsInit
-	ldr	r5, .L1676+16
+	ldr	r5, .L1677+16
 	bl	FtlMemInit
 	bl	FtlVariablesInit
-	ldr	r3, .L1676+20
+	ldr	r3, .L1677+20
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
-.L1665:
+.L1666:
 	bl	FtlLoadBbt
-	cbz	r0, .L1666
-.L1675:
+	cbz	r0, .L1667
+.L1676:
 	ldr	r3, [r5]
 	cmp	r3, #1
-	bne	.L1665
+	bne	.L1666
 	str	r6, [r5]
 	bl	ftl_low_format
-	b	.L1665
-.L1666:
+	b	.L1666
+.L1667:
 	bl	FtlSysBlkInit
 	cmp	r0, #0
-	bne	.L1675
+	bne	.L1676
 	movs	r3, #1
 	str	r3, [r4]
 	pop	{r4, r5, r6, pc}
-.L1677:
+.L1678:
 	.align	2
-.L1676:
+.L1677:
 	.word	.LANCHOR165
 	.word	.LC49
 	.word	.LC38
@@ -12571,31 +12585,31 @@ FtlWriteToIDB:
 	mov	r4, r0
 	mov	r5, r1
 	mov	r6, r2
-	ldr	r10, .L1746+16
-	bls	.L1679
+	ldr	r10, .L1747+16
+	bls	.L1680
 	cmp	r0, #576
-	bcc	.L1680
-.L1679:
+	bcc	.L1681
+.L1680:
 	ldr	r3, [r10]
-	cbnz	r3, .L1681
-.L1745:
+	cbnz	r3, .L1682
+.L1746:
 	movs	r4, #0
-	b	.L1678
-.L1681:
-	ldr	r3, .L1746
+	b	.L1679
+.L1682:
+	ldr	r3, .L1747
 	ldr	fp, [r3]
-	ldr	r3, .L1746+4
+	ldr	r3, .L1747+4
 	ldr	r2, [fp]
 	cmp	r2, r3
-	bne	.L1683
-	ldr	r3, .L1746+8
+	bne	.L1684
+	ldr	r3, .L1747+8
 	add	r0, fp, #260096
 	movs	r2, #0
 	ldrh	r1, [r3, #10]
 	movw	r3, #65023
-.L1687:
+.L1688:
 	ldr	r4, [r0, #-4]!
-	cbnz	r4, .L1684
+	cbnz	r4, .L1685
 	ldr	r4, [fp, r2, lsl #2]
 	adds	r2, r2, #1
 	cmp	r2, #4096
@@ -12604,13 +12618,13 @@ FtlWriteToIDB:
 	movhi	r2, #0
 	cmp	r3, #4096
 	str	r4, [r0, #2048]
-	bne	.L1687
+	bne	.L1688
 	mov	r3, #512
-	b	.L1742
-.L1684:
+	b	.L1743
+.L1685:
 	adds	r3, r3, #127
 	lsrs	r3, r3, #7
-.L1742:
+.L1743:
 	str	r3, [sp, #8]
 	lsls	r1, r1, #2
 	ldr	r3, [sp, #8]
@@ -12620,7 +12634,7 @@ FtlWriteToIDB:
 	adds	r3, r0, #1
 	ldr	r1, [sp, #8]
 	mov	r2, r3
-	ldr	r0, .L1746+12
+	ldr	r0, .L1747+12
 	str	r3, [sp, #16]
 	bl	printf
 	ldr	r3, [sp, #8]
@@ -12628,60 +12642,60 @@ FtlWriteToIDB:
 	str	r3, [sp, #32]
 	movs	r3, #0
 	str	r3, [sp, #20]
-.L1744:
+.L1745:
 	str	r3, [sp, #12]
 	ldr	r2, [sp, #12]
 	ldr	r3, [sp, #16]
 	add	r3, r3, r2
 	cmp	r3, #8
 	str	r3, [sp, #28]
-	bls	.L1710
+	bls	.L1711
 	ldr	r3, [sp, #20]
-	cbnz	r3, .L1711
-.L1683:
+	cbnz	r3, .L1712
+.L1684:
 	mov	r3, #-1
 	str	r3, [sp, #8]
-.L1711:
-	ldr	r3, .L1746+16
+.L1712:
+	ldr	r3, .L1747+16
 	movs	r2, #0
 	ldr	r4, [sp, #8]
 	str	r2, [r3]
-	ldr	r3, .L1746
+	ldr	r3, .L1747
 	ldr	r0, [r3]
 	bl	free
-	ldr	r3, .L1746+20
+	ldr	r3, .L1747+20
 	ldr	r0, [r3]
 	bl	free
-.L1678:
+.L1679:
 	mov	r0, r4
 	add	sp, sp, #104
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1710:
-	ldr	r3, .L1746+20
+.L1711:
+	ldr	r3, .L1747+20
 	mov	r2, #512
 	movs	r1, #0
 	ldr	r0, [r3]
 	bl	memset
-	ldr	r3, .L1746+8
+	ldr	r3, .L1747+8
 	ldrh	r5, [r3, #10]
 	ldr	r3, [sp, #12]
 	muls	r3, r5, r3
 	str	r3, [sp, #24]
-	ldr	r3, .L1746+24
+	ldr	r3, .L1747+24
 	ldr	r2, [r3, #16]
 	cmp	r2, #0
-	beq	.L1718
+	beq	.L1719
 	ldr	r3, [r3, #20]
 	cmp	r3, #0
 	ite	eq
 	moveq	r6, #6
 	movne	r6, #9
-.L1689:
+.L1690:
 	ldr	r7, [sp, #24]
 	movs	r4, #0
-	ldr	r8, .L1746+24
-.L1690:
+	ldr	r8, .L1747+24
+.L1691:
 	mov	r1, r7
 	ldr	r3, [r8, #4]
 	movs	r0, #0
@@ -12690,20 +12704,20 @@ FtlWriteToIDB:
 	ldr	r3, [sp, #16]
 	add	r7, r7, r5
 	cmp	r3, r4
-	bhi	.L1690
+	bhi	.L1691
 	cmp	r6, #9
-	bne	.L1720
-	ldr	r3, .L1746+20
+	bne	.L1721
+	ldr	r3, .L1747+20
 	mov	r2, #1024
 	movs	r1, #0
 	ldr	r4, [r3]
 	mov	r0, r4
 	bl	ftl_memset
 	movs	r2, #4
-	ldr	r3, .L1746+28
+	ldr	r3, .L1747+28
 	strb	r2, [r4, #17]
 	movs	r1, #12
-	ldr	r2, .L1746+8
+	ldr	r2, .L1747+8
 	adds	r0, r4, r1
 	str	r3, [r4]
 	movs	r3, #0
@@ -12718,17 +12732,17 @@ FtlWriteToIDB:
 	strh	r3, [r4, #22]	@ movhi
 	bl	js_hash
 	str	r0, [r4, #8]
-.L1691:
+.L1692:
 	ldr	r3, [sp, #16]
 	mov	r10, fp
-	ldr	r8, .L1746+24
+	ldr	r8, .L1747+24
 	muls	r3, r5, r3
 	movs	r5, #0
 	str	r3, [sp, #36]
-.L1692:
+.L1693:
 	ldr	r3, [sp, #36]
 	cmp	r5, r3
-	beq	.L1699
+	beq	.L1700
 	cmp	r6, #9
 	ite	ne
 	lslne	r3, r5, #2
@@ -12737,9 +12751,9 @@ FtlWriteToIDB:
 	movw	r3, #61424
 	str	r3, [sp, #44]
 	cmp	r5, #0
-	bne	.L1695
+	bne	.L1696
 	cmp	r6, #9
-	bne	.L1695
+	bne	.L1696
 	ldr	r3, [r8, #16]
 	movs	r0, #70
 	blx	r3
@@ -12749,41 +12763,41 @@ FtlWriteToIDB:
 	ldr	r1, [sp, #24]
 	mov	r0, r5
 	blx	r7
-	ldr	r2, .L1746+8
+	ldr	r2, .L1747+8
 	mov	r7, r0
 	ldr	r3, [r8, #16]
 	ldrb	r0, [r2, #22]	@ zero_extendqisi2
 	blx	r3
 	adds	r7, r7, #1
-	bne	.L1696
-.L1699:
-	ldr	r3, .L1746+20
+	bne	.L1697
+.L1700:
+	ldr	r3, .L1747+20
 	ldr	r7, [r3]
-	ldr	r3, .L1746+8
+	ldr	r3, .L1747+8
 	ldrb	r2, [r3, #14]	@ zero_extendqisi2
 	ldrh	r3, [r3, #10]
 	str	r2, [sp, #24]
 	ldr	r2, [sp, #12]
 	mul	r10, r3, r2
-	ldr	r2, .L1746+24
+	ldr	r2, .L1747+24
 	ldr	r1, [r2, #16]
 	cmp	r1, #0
-	bne	.L1697
+	bne	.L1698
 	mov	r8, #6
-.L1698:
+.L1699:
 	ldr	r2, [sp, #16]
 	movs	r4, #0
-	ldr	r5, .L1746+24
+	ldr	r5, .L1747+24
 	muls	r3, r2, r3
 	str	r3, [sp, #36]
-.L1701:
+.L1702:
 	ldr	r3, [sp, #36]
 	cmp	r4, r3
-	beq	.L1705
+	beq	.L1706
 	cmp	r4, #0
-	bne	.L1702
+	bne	.L1703
 	cmp	r8, #9
-	bne	.L1702
+	bne	.L1703
 	ldr	r3, [r5, #16]
 	movs	r0, #70
 	blx	r3
@@ -12799,57 +12813,57 @@ FtlWriteToIDB:
 	ldr	r3, [r5, #20]
 	ldr	r0, [sp, #24]
 	blx	r3
-	ldr	r2, .L1746+8
+	ldr	r2, .L1747+8
 	ldr	r3, [r5, #16]
 	ldrb	r0, [r2, #22]	@ zero_extendqisi2
 	blx	r3
 	ldr	r3, [r7]
-	ldr	r2, .L1746+28
+	ldr	r2, .L1747+28
 	cmp	r3, r2
-	beq	.L1703
-.L1705:
-	ldr	r3, .L1746+20
+	beq	.L1704
+.L1706:
+	ldr	r3, .L1747+20
 	mov	r1, fp
 	movs	r4, #0
 	ldr	r0, [r3]
-.L1704:
+.L1705:
 	mov	r6, r1
 	ldr	r2, [r0, r4, lsl #2]
 	ldr	r3, [r6]
 	lsls	r5, r4, #2
 	adds	r1, r1, #4
 	cmp	r2, r3
-	beq	.L1707
+	beq	.L1708
 	mov	r2, #512
 	movs	r1, #0
 	bl	memset
-	ldr	r3, .L1746+20
+	ldr	r3, .L1747+20
 	ldr	r1, [sp, #12]
-	ldr	r0, .L1746+32
+	ldr	r0, .L1747+32
 	ldr	r2, [r3]
 	str	r4, [sp]
 	ldr	r3, [r6]
 	ldr	r2, [r2, r5]
 	bl	printf
-	ldr	r3, .L1746+8
+	ldr	r3, .L1747+8
 	movs	r0, #0
 	ldr	r2, [sp, #12]
 	ldrh	r1, [r3, #10]
-	ldr	r3, .L1746+24
+	ldr	r3, .L1747+24
 	muls	r2, r1, r2
 	ldr	r3, [r3, #4]
 	mov	r1, r2
 	blx	r3
-.L1708:
+.L1709:
 	ldr	r3, [sp, #28]
-	b	.L1744
-.L1718:
+	b	.L1745
+.L1719:
 	movs	r6, #6
-	b	.L1689
-.L1720:
+	b	.L1690
+.L1721:
 	movs	r4, #0
-	b	.L1691
-.L1695:
+	b	.L1692
+.L1696:
 	ldr	r1, [sp, #24]
 	add	r3, sp, #40
 	ldr	r7, [r8, #8]
@@ -12858,19 +12872,19 @@ FtlWriteToIDB:
 	add	r1, r1, r5
 	blx	r7
 	adds	r0, r0, #1
-	beq	.L1699
+	beq	.L1700
 	add	r10, r10, #2048
-.L1696:
-	adds	r5, r5, #1
-	b	.L1692
 .L1697:
+	adds	r5, r5, #1
+	b	.L1693
+.L1698:
 	ldr	r2, [r2, #20]
 	cmp	r2, #0
 	ite	eq
 	moveq	r8, #6
 	movne	r8, #9
-	b	.L1698
-.L1702:
+	b	.L1699
+.L1703:
 	add	r3, sp, #40
 	mov	r2, r7
 	add	r1, r10, r4
@@ -12878,29 +12892,29 @@ FtlWriteToIDB:
 	ldr	r6, [r5, #12]
 	blx	r6
 	adds	r0, r0, #1
-	beq	.L1705
+	beq	.L1706
 	ldr	r2, [sp, #44]
 	movw	r3, #61424
 	cmp	r2, r3
-	bne	.L1705
+	bne	.L1706
 	add	r7, r7, #2048
-.L1703:
+.L1704:
 	adds	r4, r4, #1
-	b	.L1701
-.L1707:
+	b	.L1702
+.L1708:
 	ldr	r3, [sp, #32]
 	adds	r4, r4, #1
 	cmp	r4, r3
-	bne	.L1704
+	bne	.L1705
 	ldr	r3, [sp, #20]
 	adds	r3, r3, #1
 	cmp	r3, #5
 	str	r3, [sp, #20]
-	bls	.L1708
-	b	.L1711
-.L1747:
+	bls	.L1709
+	b	.L1712
+.L1748:
 	.align	2
-.L1746:
+.L1747:
 	.word	.LANCHOR182
 	.word	-52655045
 	.word	.LANCHOR0
@@ -12910,31 +12924,31 @@ FtlWriteToIDB:
 	.word	.LANCHOR77
 	.word	1179535694
 	.word	.LC51
-.L1680:
+.L1681:
 	cmp	r0, #64
-	bne	.L1712
-	ldr	fp, .L1748+4
+	bne	.L1713
+	ldr	fp, .L1749+4
 	mov	r0, #262144
 	bl	ftl_malloc
 	str	r0, [fp]
 	mov	r0, #262144
 	bl	ftl_malloc
-	ldr	r3, .L1748
+	ldr	r3, .L1749
 	str	r0, [r3]
 	ldr	r3, [fp]
-	cbz	r3, .L1713
-	cbz	r0, .L1713
+	cbz	r3, .L1714
+	cbz	r0, .L1714
 	movs	r2, #1
 	movs	r1, #0
 	str	r2, [r10]
 	mov	r0, r3
 	mov	r2, #262144
 	bl	ftl_memset
-.L1712:
+.L1713:
 	ldr	r3, [r10]
 	cmp	r3, #0
-	beq	.L1745
-	ldr	r3, .L1748+4
+	beq	.L1746
+	ldr	r3, .L1749+4
 	cmp	r4, #63
 	itett	ls
 	rsbls	r1, r4, #64
@@ -12943,7 +12957,7 @@ FtlWriteToIDB:
 	addls	r1, r6, r1, lsl #9
 	ldr	r0, [r3]
 	ittt	hi
-	ldrhi	r3, .L1748+8
+	ldrhi	r3, .L1749+8
 	addhi	r3, r3, r4
 	addhi	r0, r0, r3, lsl #9
 	cmp	r8, #576
@@ -12952,15 +12966,15 @@ FtlWriteToIDB:
 	subcs	r5, r5, #446
 	lsls	r2, r5, #9
 	bl	ftl_memcpy
-	b	.L1745
-.L1713:
-	ldr	r1, .L1748+12
-	ldr	r0, .L1748+16
+	b	.L1746
+.L1714:
+	ldr	r1, .L1749+12
+	ldr	r0, .L1749+16
 	bl	printf
-	b	.L1712
-.L1749:
+	b	.L1713
+.L1750:
 	.align	2
-.L1748:
+.L1749:
 	.word	.LANCHOR183
 	.word	.LANCHOR182
 	.word	8388544
@@ -12984,24 +12998,24 @@ sftl_write:
 	mov	r5, r2
 	add	r6, r6, r4
 	bl	FtlWriteToIDB
-.L1751:
+.L1752:
 	cmp	r4, #256
 	sub	r1, r6, r4
 	mov	r3, r5
-	bhi	.L1753
+	bhi	.L1754
 	mov	r2, r4
 	movs	r0, #0
 	pop	{r4, r5, r6, lr}
 	b	FtlWrite
-.L1753:
+.L1754:
 	mov	r2, #256
 	movs	r0, #0
 	bl	FtlWrite
-	cbnz	r0, .L1750
+	cbnz	r0, .L1751
 	add	r5, r5, #131072
 	sub	r4, r4, #256
-	b	.L1751
-.L1750:
+	b	.L1752
+.L1751:
 	pop	{r4, r5, r6, pc}
 	.size	sftl_write, .-sftl_write
 	.global	g_nand_ops
@@ -14319,215 +14333,215 @@ power_up_flag:
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",%progbits,1
 .LC1:
 	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
-	.section	.rodata.__func__.10025,"a",%progbits
+	.section	.rodata.__func__.10032,"a",%progbits
 	.set	.LANCHOR169,. + 0
-	.type	__func__.10025, %object
-	.size	__func__.10025, 19
-__func__.10025:
+	.type	__func__.10032, %object
+	.size	__func__.10032, 19
+__func__.10032:
 	.ascii	"FtlGcFreeTempBlock\000"
-	.section	.rodata.__func__.10124,"a",%progbits
+	.section	.rodata.__func__.10131,"a",%progbits
 	.set	.LANCHOR174,. + 0
-	.type	__func__.10124, %object
-	.size	__func__.10124, 23
-__func__.10124:
+	.type	__func__.10131, %object
+	.size	__func__.10131, 23
+__func__.10131:
 	.ascii	"rk_ftl_garbage_collect\000"
-	.section	.rodata.__func__.10392,"a",%progbits
+	.section	.rodata.__func__.10399,"a",%progbits
 	.set	.LANCHOR136,. + 0
-	.type	__func__.10392, %object
-	.size	__func__.10392, 15
-__func__.10392:
+	.type	__func__.10399, %object
+	.size	__func__.10399, 15
+__func__.10399:
 	.ascii	"FlashReadPages\000"
-	.section	.rodata.__func__.10411,"a",%progbits
+	.section	.rodata.__func__.10418,"a",%progbits
 	.set	.LANCHOR141,. + 0
-	.type	__func__.10411, %object
-	.size	__func__.10411, 15
-__func__.10411:
+	.type	__func__.10418, %object
+	.size	__func__.10418, 15
+__func__.10418:
 	.ascii	"FlashProgPages\000"
-	.section	.rodata.__func__.10435,"a",%progbits
+	.section	.rodata.__func__.10442,"a",%progbits
 	.set	.LANCHOR76,. + 0
-	.type	__func__.10435, %object
-	.size	__func__.10435, 17
-__func__.10435:
+	.type	__func__.10442, %object
+	.size	__func__.10442, 17
+__func__.10442:
 	.ascii	"FlashEraseBlocks\000"
-	.section	.rodata.__func__.10554,"a",%progbits
+	.section	.rodata.__func__.10561,"a",%progbits
 	.set	.LANCHOR184,. + 0
-	.type	__func__.10554, %object
-	.size	__func__.10554, 14
-__func__.10554:
+	.type	__func__.10561, %object
+	.size	__func__.10561, 14
+__func__.10561:
 	.ascii	"FtlWriteToIDB\000"
-	.section	.rodata.__func__.9048,"a",%progbits
+	.section	.rodata.__func__.9055,"a",%progbits
 	.set	.LANCHOR168,. + 0
-	.type	__func__.9048, %object
-	.size	__func__.9048, 13
-__func__.9048:
+	.type	__func__.9055, %object
+	.size	__func__.9055, 13
+__func__.9055:
 	.ascii	"FtlProgPages\000"
-	.section	.rodata.__func__.9076,"a",%progbits
+	.section	.rodata.__func__.9083,"a",%progbits
 	.set	.LANCHOR176,. + 0
-	.type	__func__.9076, %object
-	.size	__func__.9076, 9
-__func__.9076:
+	.type	__func__.9083, %object
+	.size	__func__.9083, 9
+__func__.9083:
 	.ascii	"FtlWrite\000"
-	.section	.rodata.__func__.9158,"a",%progbits
+	.section	.rodata.__func__.9165,"a",%progbits
 	.set	.LANCHOR127,. + 0
-	.type	__func__.9158, %object
-	.size	__func__.9158, 14
-__func__.9158:
+	.type	__func__.9165, %object
+	.size	__func__.9165, 14
+__func__.9165:
 	.ascii	"FtlBbt2Bitmap\000"
-	.section	.rodata.__func__.9193,"a",%progbits
+	.section	.rodata.__func__.9200,"a",%progbits
 	.set	.LANCHOR140,. + 0
-	.type	__func__.9193, %object
-	.size	__func__.9193, 11
-__func__.9193:
+	.type	__func__.9200, %object
+	.size	__func__.9200, 11
+__func__.9200:
 	.ascii	"FtlLoadBbt\000"
-	.section	.rodata.__func__.9308,"a",%progbits
+	.section	.rodata.__func__.9315,"a",%progbits
 	.set	.LANCHOR48,. + 0
-	.type	__func__.9308, %object
-	.size	__func__.9308, 17
-__func__.9308:
+	.type	__func__.9315, %object
+	.size	__func__.9315, 17
+__func__.9315:
 	.ascii	"INSERT_FREE_LIST\000"
-	.section	.rodata.__func__.9313,"a",%progbits
+	.section	.rodata.__func__.9320,"a",%progbits
 	.set	.LANCHOR44,. + 0
-	.type	__func__.9313, %object
-	.size	__func__.9313, 17
-__func__.9313:
+	.type	__func__.9320, %object
+	.size	__func__.9320, 17
+__func__.9320:
 	.ascii	"INSERT_DATA_LIST\000"
-	.section	.rodata.__func__.9344,"a",%progbits
+	.section	.rodata.__func__.9351,"a",%progbits
 	.set	.LANCHOR49,. + 0
-	.type	__func__.9344, %object
-	.size	__func__.9344, 17
-__func__.9344:
+	.type	__func__.9351, %object
+	.size	__func__.9351, 17
+__func__.9351:
 	.ascii	"List_remove_node\000"
-	.section	.rodata.__func__.9376,"a",%progbits
+	.section	.rodata.__func__.9383,"a",%progbits
 	.set	.LANCHOR53,. + 0
-	.type	__func__.9376, %object
-	.size	__func__.9376, 22
-__func__.9376:
+	.type	__func__.9383, %object
+	.size	__func__.9383, 22
+__func__.9383:
 	.ascii	"List_update_data_list\000"
-	.section	.rodata.__func__.9385,"a",%progbits
+	.section	.rodata.__func__.9392,"a",%progbits
 	.set	.LANCHOR149,. + 0
-	.type	__func__.9385, %object
-	.size	__func__.9385, 16
-__func__.9385:
+	.type	__func__.9392, %object
+	.size	__func__.9392, 16
+__func__.9392:
 	.ascii	"load_l2p_region\000"
-	.section	.rodata.__func__.9418,"a",%progbits
+	.section	.rodata.__func__.9425,"a",%progbits
 	.set	.LANCHOR80,. + 0
-	.type	__func__.9418, %object
-	.size	__func__.9418, 26
-__func__.9418:
+	.type	__func__.9425, %object
+	.size	__func__.9425, 26
+__func__.9425:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.section	.rodata.__func__.9429,"a",%progbits
+	.section	.rodata.__func__.9436,"a",%progbits
 	.set	.LANCHOR150,. + 0
-	.type	__func__.9429, %object
-	.size	__func__.9429, 15
-__func__.9429:
+	.type	__func__.9436, %object
+	.size	__func__.9436, 15
+__func__.9436:
 	.ascii	"ftl_map_blk_gc\000"
-	.section	.rodata.__func__.9444,"a",%progbits
+	.section	.rodata.__func__.9451,"a",%progbits
 	.set	.LANCHOR147,. + 0
-	.type	__func__.9444, %object
-	.size	__func__.9444, 31
-__func__.9444:
+	.type	__func__.9451, %object
+	.size	__func__.9451, 31
+__func__.9451:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.section	.rodata.__func__.9458,"a",%progbits
+	.section	.rodata.__func__.9465,"a",%progbits
 	.set	.LANCHOR148,. + 0
-	.type	__func__.9458, %object
-	.size	__func__.9458, 16
-__func__.9458:
+	.type	__func__.9465, %object
+	.size	__func__.9465, 16
+__func__.9465:
 	.ascii	"FtlMapWritePage\000"
-	.section	.rodata.__func__.9483,"a",%progbits
+	.section	.rodata.__func__.9490,"a",%progbits
 	.set	.LANCHOR56,. + 0
-	.type	__func__.9483, %object
-	.size	__func__.9483, 22
-__func__.9483:
+	.type	__func__.9490, %object
+	.size	__func__.9490, 22
+__func__.9490:
 	.ascii	"select_l2p_ram_region\000"
-	.section	.rodata.__func__.9500,"a",%progbits
+	.section	.rodata.__func__.9507,"a",%progbits
 	.set	.LANCHOR152,. + 0
-	.type	__func__.9500, %object
-	.size	__func__.9500, 9
-__func__.9500:
+	.type	__func__.9507, %object
+	.size	__func__.9507, 9
+__func__.9507:
 	.ascii	"log2phys\000"
-	.section	.rodata.__func__.9564,"a",%progbits
+	.section	.rodata.__func__.9571,"a",%progbits
 	.set	.LANCHOR164,. + 0
-	.type	__func__.9564, %object
-	.size	__func__.9564, 15
-__func__.9564:
+	.type	__func__.9571, %object
+	.size	__func__.9571, 15
+__func__.9571:
 	.ascii	"FtlVpcTblFlush\000"
-	.section	.rodata.__func__.9586,"a",%progbits
+	.section	.rodata.__func__.9593,"a",%progbits
 	.set	.LANCHOR139,. + 0
-	.type	__func__.9586, %object
-	.size	__func__.9586, 14
-__func__.9586:
+	.type	__func__.9593, %object
+	.size	__func__.9593, 14
+__func__.9593:
 	.ascii	"FtlScanSysBlk\000"
-	.section	.rodata.__func__.9635,"a",%progbits
+	.section	.rodata.__func__.9642,"a",%progbits
 	.set	.LANCHOR177,. + 0
-	.type	__func__.9635, %object
-	.size	__func__.9635, 15
-__func__.9635:
+	.type	__func__.9642, %object
+	.size	__func__.9642, 15
+__func__.9642:
 	.ascii	"FtlLoadSysInfo\000"
-	.section	.rodata.__func__.9657,"a",%progbits
+	.section	.rodata.__func__.9664,"a",%progbits
 	.set	.LANCHOR179,. + 0
-	.type	__func__.9657, %object
-	.size	__func__.9657, 18
-__func__.9657:
+	.type	__func__.9664, %object
+	.size	__func__.9664, 18
+__func__.9664:
 	.ascii	"FtlMapTblRecovery\000"
-	.section	.rodata.__func__.9703,"a",%progbits
+	.section	.rodata.__func__.9710,"a",%progbits
 	.set	.LANCHOR153,. + 0
-	.type	__func__.9703, %object
-	.size	__func__.9703, 16
-__func__.9703:
+	.type	__func__.9710, %object
+	.size	__func__.9710, 16
+__func__.9710:
 	.ascii	"FtlReUsePrevPpa\000"
-	.section	.rodata.__func__.9737,"a",%progbits
+	.section	.rodata.__func__.9744,"a",%progbits
 	.set	.LANCHOR154,. + 0
-	.type	__func__.9737, %object
-	.size	__func__.9737, 22
-__func__.9737:
+	.type	__func__.9744, %object
+	.size	__func__.9744, 22
+__func__.9744:
 	.ascii	"FtlRecoverySuperblock\000"
-	.section	.rodata.__func__.9794,"a",%progbits
+	.section	.rodata.__func__.9801,"a",%progbits
 	.set	.LANCHOR59,. + 0
-	.type	__func__.9794, %object
-	.size	__func__.9794, 16
-__func__.9794:
+	.type	__func__.9801, %object
+	.size	__func__.9801, 16
+__func__.9801:
 	.ascii	"make_superblock\000"
-	.section	.rodata.__func__.9815,"a",%progbits
+	.section	.rodata.__func__.9822,"a",%progbits
 	.set	.LANCHOR135,. + 0
-	.type	__func__.9815, %object
-	.size	__func__.9815, 18
-__func__.9815:
+	.type	__func__.9822, %object
+	.size	__func__.9822, 18
+__func__.9822:
 	.ascii	"SupperBlkListInit\000"
-	.section	.rodata.__func__.9842,"a",%progbits
+	.section	.rodata.__func__.9849,"a",%progbits
 	.set	.LANCHOR158,. + 0
-	.type	__func__.9842, %object
-	.size	__func__.9842, 14
-__func__.9842:
+	.type	__func__.9849, %object
+	.size	__func__.9849, 14
+__func__.9849:
 	.ascii	"ftl_check_vpc\000"
-	.section	.rodata.__func__.9907,"a",%progbits
+	.section	.rodata.__func__.9914,"a",%progbits
 	.set	.LANCHOR143,. + 0
-	.type	__func__.9907, %object
-	.size	__func__.9907, 25
-__func__.9907:
+	.type	__func__.9914, %object
+	.size	__func__.9914, 25
+__func__.9914:
 	.ascii	"allocate_data_superblock\000"
-	.section	.rodata.__func__.9928,"a",%progbits
-	.set	.LANCHOR167,. + 0
-	.type	__func__.9928, %object
-	.size	__func__.9928, 29
-__func__.9928:
-	.ascii	"allocate_new_data_superblock\000"
 	.section	.rodata.__func__.9935,"a",%progbits
-	.set	.LANCHOR60,. + 0
+	.set	.LANCHOR167,. + 0
 	.type	__func__.9935, %object
-	.size	__func__.9935, 19
+	.size	__func__.9935, 29
 __func__.9935:
+	.ascii	"allocate_new_data_superblock\000"
+	.section	.rodata.__func__.9942,"a",%progbits
+	.set	.LANCHOR60,. + 0
+	.type	__func__.9942, %object
+	.size	__func__.9942, 19
+__func__.9942:
 	.ascii	"get_new_active_ppa\000"
-	.section	.rodata.__func__.9948,"a",%progbits
-	.set	.LANCHOR145,. + 0
-	.type	__func__.9948, %object
-	.size	__func__.9948, 16
-__func__.9948:
-	.ascii	"update_vpc_list\000"
 	.section	.rodata.__func__.9955,"a",%progbits
-	.set	.LANCHOR146,. + 0
+	.set	.LANCHOR145,. + 0
 	.type	__func__.9955, %object
-	.size	__func__.9955, 20
+	.size	__func__.9955, 16
 __func__.9955:
+	.ascii	"update_vpc_list\000"
+	.section	.rodata.__func__.9962,"a",%progbits
+	.set	.LANCHOR146,. + 0
+	.type	__func__.9962, %object
+	.size	__func__.9962, 20
+__func__.9962:
 	.ascii	"decrement_vpc_count\000"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",%progbits,1
 .LC21:
@@ -14573,5 +14587,5 @@ __func__.9955:
 	.ascii	"\012\000"
 	.section	.rodata.sftl_init.str1.1,"aMS",%progbits,1
 .LC49:
-	.ascii	"SFTL version: 5.0.55 20200925\000"
+	.ascii	"SFTL version: 5.0.56 20210329\000"
 	.hidden	free
diff --git a/drivers/rkflash/rk_sftl_arm_v8.S b/drivers/rkflash/rk_sftl_arm_v8.S
index 5846acbd25..8a60a9d324 100644
--- a/drivers/rkflash/rk_sftl_arm_v8.S
+++ b/drivers/rkflash/rk_sftl_arm_v8.S
@@ -2,7 +2,7 @@
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:    GPL-2.0
- * date: 2020-09-25
+ * date: 2021-03-29
  */
 	.arch armv8-a+nosimd
 	.file	"rk_sftl.c"
@@ -1055,7 +1055,7 @@ select_l2p_ram_region:
 	bne	.L129
 	cmp	w19, w1
 	bcc	.L122
-	mov	w2, 789
+	mov	w2, 796
 	adrp	x1, .LANCHOR56
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR56
@@ -1251,7 +1251,7 @@ make_superblock:
 	bcc	.L155
 	adrp	x1, .LANCHOR59
 	adrp	x0, .LC1
-	mov	w2, 2150
+	mov	w2, 2157
 	add	x1, x1, :lo12:.LANCHOR59
 	add	x0, x0, :lo12:.LC1
 	bl	printf
@@ -1478,7 +1478,7 @@ get_new_active_ppa:
 	bne	.L192
 	adrp	x1, .LANCHOR60
 	adrp	x0, .LC1
-	mov	w2, 2785
+	mov	w2, 2792
 	add	x1, x1, :lo12:.LANCHOR60
 	add	x0, x0, :lo12:.LC1
 	bl	printf
@@ -1490,7 +1490,7 @@ get_new_active_ppa:
 	bne	.L193
 	adrp	x1, .LANCHOR60
 	adrp	x0, .LC1
-	mov	w2, 2786
+	mov	w2, 2793
 	add	x1, x1, :lo12:.LANCHOR60
 	add	x0, x0, :lo12:.LC1
 	bl	printf
@@ -1499,7 +1499,7 @@ get_new_active_ppa:
 	cbnz	w0, .L194
 	adrp	x1, .LANCHOR60
 	adrp	x0, .LC1
-	mov	w2, 2787
+	mov	w2, 2794
 	add	x1, x1, :lo12:.LANCHOR60
 	add	x0, x0, :lo12:.LC1
 	bl	printf
@@ -1546,7 +1546,7 @@ get_new_active_ppa:
 	cbz	w1, .L191
 	adrp	x1, .LANCHOR60
 	adrp	x0, .LC1
-	mov	w2, 2810
+	mov	w2, 2817
 	add	x1, x1, :lo12:.LANCHOR60
 	add	x0, x0, :lo12:.LC1
 	bl	printf
@@ -3031,7 +3031,7 @@ SupperBlkListInit:
 	ble	.L363
 	adrp	x1, .LANCHOR135
 	adrp	x0, .LC1
-	mov	w2, 2212
+	mov	w2, 2219
 	add	x1, x1, :lo12:.LANCHOR135
 	add	x0, x0, :lo12:.LC1
 	bl	printf
@@ -3644,7 +3644,7 @@ FtlScanSysBlk:
 	bls	.L456
 	ldr	x1, [x29, 136]
 	adrp	x0, .LC1
-	mov	w2, 1225
+	mov	w2, 1232
 	add	x0, x0, :lo12:.LC1
 	bl	printf
 .L456:
@@ -3728,7 +3728,7 @@ FtlScanSysBlk:
 	bls	.L466
 	ldr	x1, [x29, 136]
 	adrp	x0, .LC1
-	mov	w2, 1266
+	mov	w2, 1273
 	add	x0, x0, :lo12:.LC1
 	bl	printf
 .L466:
@@ -3840,7 +3840,7 @@ FtlScanSysBlk:
 	bls	.L513
 	adrp	x1, .LANCHOR139
 	adrp	x0, .LC1
-	mov	w2, 1391
+	mov	w2, 1398
 	add	x1, x1, :lo12:.LANCHOR139
 	add	x0, x0, :lo12:.LC1
 	bl	printf
@@ -4771,7 +4771,7 @@ allocate_data_superblock:
 	ble	.L652
 	adrp	x1, .LANCHOR143
 	adrp	x0, .LC1
-	mov	w2, 2660
+	mov	w2, 2667
 	add	x1, x1, :lo12:.LANCHOR143
 	add	x0, x0, :lo12:.LC1
 	bl	printf
@@ -4800,7 +4800,7 @@ allocate_data_superblock:
 	cbnz	w0, .L654
 	adrp	x1, .LANCHOR143
 	adrp	x0, .LC1
-	mov	w2, 2669
+	mov	w2, 2676
 	add	x1, x1, :lo12:.LANCHOR143
 	add	x0, x0, :lo12:.LC1
 	bl	printf
@@ -4832,7 +4832,7 @@ allocate_data_superblock:
 	ldrh	w1, [x23, #:lo12:.LANCHOR4]
 	cmp	w0, w1
 	ble	.L651
-	mov	w2, 2683
+	mov	w2, 2690
 	adrp	x1, .LANCHOR143
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR143
@@ -4851,7 +4851,7 @@ allocate_data_superblock:
 	ble	.L658
 	adrp	x1, .LANCHOR143
 	adrp	x0, .LC1
-	mov	w2, 2686
+	mov	w2, 2693
 	add	x1, x1, :lo12:.LANCHOR143
 	add	x0, x0, :lo12:.LC1
 	bl	printf
@@ -4873,7 +4873,7 @@ allocate_data_superblock:
 	cbnz	w21, .L662
 	adrp	x1, .LANCHOR143
 	adrp	x0, .LC1
-	mov	w2, 2697
+	mov	w2, 2704
 	add	x1, x1, :lo12:.LANCHOR143
 	add	x0, x0, :lo12:.LC1
 	bl	printf
@@ -4884,7 +4884,7 @@ allocate_data_superblock:
 	bne	.L663
 	adrp	x1, .LANCHOR143
 	adrp	x0, .LC1
-	mov	w2, 2699
+	mov	w2, 2706
 	add	x1, x1, :lo12:.LANCHOR143
 	add	x0, x0, :lo12:.LC1
 	bl	printf
@@ -5031,7 +5031,7 @@ allocate_data_superblock:
 .L676:
 	adrp	x1, .LANCHOR143
 	adrp	x0, .LC1
-	mov	w2, 2752
+	mov	w2, 2759
 	add	x1, x1, :lo12:.LANCHOR143
 	add	x0, x0, :lo12:.LC1
 	bl	printf
@@ -5169,7 +5169,7 @@ update_vpc_list:
 	cbnz	w0, .L710
 	adrp	x1, .LANCHOR145
 	adrp	x0, .LC1
-	mov	w2, 2828
+	mov	w2, 2835
 	add	x1, x1, :lo12:.LANCHOR145
 	add	x0, x0, :lo12:.LC1
 	bl	printf
@@ -5191,7 +5191,7 @@ update_vpc_list:
 	ble	.L714
 	adrp	x1, .LANCHOR145
 	adrp	x0, .LC1
-	mov	w2, 2831
+	mov	w2, 2838
 	add	x1, x1, :lo12:.LANCHOR145
 	add	x0, x0, :lo12:.LC1
 	bl	printf
@@ -5257,7 +5257,7 @@ decrement_vpc_count:
 	ldp	x29, x30, [sp], 48
 	ret
 .L719:
-	mov	w2, 2846
+	mov	w2, 2853
 	adrp	x1, .LANCHOR146
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR146
@@ -5298,7 +5298,7 @@ decrement_vpc_count:
 	cbnz	w1, .L716
 	cmp	w19, w0, uxth
 	beq	.L716
-	mov	w2, 2862
+	mov	w2, 2869
 	adrp	x1, .LANCHOR146
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR146
@@ -5740,26 +5740,27 @@ FtlMapWritePage:
 	stp	x29, x30, [sp, -112]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR87
+	mov	w24, w1
+	stp	x21, x22, [sp, 32]
+	adrp	x23, .LANCHOR148
 	stp	x25, x26, [sp, 64]
-	adrp	x24, .LANCHOR148
+	adrp	x22, .LANCHOR87
 	stp	x27, x28, [sp, 80]
-	adrp	x26, .LANCHOR19
+	adrp	x25, .LANCHOR19
 	stp	x19, x20, [sp, 16]
-	mov	w25, w1
-	mov	x19, x0
 	mov	x27, x2
-	add	x23, x23, :lo12:.LANCHOR87
-	add	x24, x24, :lo12:.LANCHOR148
-	add	x28, x26, :lo12:.LANCHOR19
-	stp	x21, x22, [sp, 32]
-	mov	w22, 0
+	mov	x19, x0
+	ubfiz	x26, x24, 2, 32
+	add	x22, x22, :lo12:.LANCHOR87
+	add	x23, x23, :lo12:.LANCHOR148
+	add	x28, x25, :lo12:.LANCHOR19
+	mov	w21, 0
 .L775:
-	ldr	w0, [x23]
+	ldr	w0, [x22]
 	ldrh	w1, [x19, 2]
 	add	w0, w0, 1
-	str	w0, [x23]
-	ldrh	w0, [x26, #:lo12:.LANCHOR19]
+	str	w0, [x22]
+	ldrh	w0, [x25, #:lo12:.LANCHOR19]
 	sub	w0, w0, #1
 	cmp	w1, w0
 	bge	.L776
@@ -5777,7 +5778,7 @@ FtlMapWritePage:
 	cbnz	w0, .L778
 	adrp	x0, .LC1
 	mov	w2, 700
-	mov	x1, x24
+	mov	x1, x23
 	add	x0, x0, :lo12:.LC1
 	bl	printf
 .L778:
@@ -5787,19 +5788,20 @@ FtlMapWritePage:
 	bcc	.L779
 	adrp	x0, .LC1
 	mov	w2, 701
-	mov	x1, x24
+	mov	x1, x23
 	add	x0, x0, :lo12:.LC1
 	bl	printf
 .L779:
 	ldrh	w1, [x19]
-	adrp	x21, .LANCHOR137
+	adrp	x4, .LANCHOR137
 	ldr	x0, [x19, 16]
-	add	x20, x21, :lo12:.LANCHOR137
+	add	x20, x4, :lo12:.LANCHOR137
+	str	x4, [x29, 96]
 	mov	w2, 16
 	ldrh	w3, [x0, x1, lsl 1]
 	mov	w1, 0
 	ldrh	w0, [x19, 2]
-	str	w3, [x29, 108]
+	str	w3, [x29, 104]
 	str	x27, [x20, 8]
 	orr	w0, w0, w3, lsl 10
 	str	w0, [x20, 4]
@@ -5809,13 +5811,13 @@ FtlMapWritePage:
 	bl	ftl_memset
 	ldr	x6, [x20, 16]
 	ldr	w0, [x19, 48]
-	ldr	w3, [x29, 108]
+	ldr	w3, [x29, 104]
 	str	w0, [x6, 4]
 	ldrh	w0, [x19, 4]
 	strh	w0, [x6]
 	adrp	x0, .LANCHOR22
 	strh	w3, [x6, 2]
-	strh	w25, [x6, 8]
+	strh	w24, [x6, 8]
 	ldrh	w1, [x0, #:lo12:.LANCHOR22]
 	ldr	x0, [x20, 8]
 	bl	js_hash
@@ -5825,61 +5827,74 @@ FtlMapWritePage:
 	mov	w1, w3
 	mov	w2, w3
 	bl	FlashProgPages
+	ldr	x4, [x29, 96]
 	ldrh	w0, [x19, 2]
-	ldr	w1, [x21, #:lo12:.LANCHOR137]
 	add	w0, w0, 1
 	and	w0, w0, 65535
+	ldr	w1, [x4, #:lo12:.LANCHOR137]
 	strh	w0, [x19, 2]
 	cmn	w1, #1
 	bne	.L780
 	ldr	w1, [x20, 4]
 	adrp	x0, .LC22
+	str	x4, [x29, 104]
 	add	x0, x0, :lo12:.LC22
-	add	w22, w22, 1
-	and	w22, w22, 65535
+	add	w21, w21, 1
+	and	w21, w21, 65535
 	bl	printf
 	ldrh	w0, [x19, 2]
+	ldr	x2, [x29, 104]
 	cmp	w0, 2
 	bhi	.L781
 	ldrh	w0, [x28]
 	sub	w0, w0, #1
 	strh	w0, [x19, 2]
 .L781:
-	cmp	w22, 3
+	cmp	w21, 3
 	bls	.L782
-	add	x21, x21, :lo12:.LANCHOR137
+	add	x0, x2, :lo12:.LANCHOR137
+	mov	w2, w21
+	ldr	w1, [x0, 4]
 	adrp	x0, .LC23
-	mov	w2, w22
 	add	x0, x0, :lo12:.LC23
-	ldr	w1, [x21, 4]
 	bl	printf
 .L783:
 	b	.L783
 .L782:
 	ldr	w0, [x19, 52]
 	cbz	w0, .L775
-.L797:
-	b	.L797
+.L798:
+	b	.L798
 .L780:
+	ldr	x1, [x19, 40]
 	cmp	w0, 1
+	ldr	w2, [x20, 4]
+	str	w2, [x1, x26]
 	beq	.L786
-	cmp	w1, 256
+	ldr	w0, [x4, #:lo12:.LANCHOR137]
+	cmp	w0, 256
 	beq	.L786
-	ldr	w0, [x19, 56]
-	cbz	w0, .L787
+	ldr	w1, [x19, 56]
+	cbz	w1, .L787
 .L786:
 	str	wzr, [x19, 56]
 	b	.L775
 .L787:
-	ldr	x0, [x19, 40]
-	ldr	w1, [x20, 4]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x27, x28, [sp, 80]
-	str	w1, [x0, w25, uxtw 2]
+	cmn	w0, #1
+	bne	.L788
+	adrp	x1, .LANCHOR148
+	adrp	x0, .LC1
+	mov	w2, 745
+	add	x1, x1, :lo12:.LANCHOR148
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L788:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
 	.size	FtlMapWritePage, .-FtlMapWritePage
@@ -5900,20 +5915,20 @@ load_l2p_region:
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
 	cmp	w0, w20
-	bcs	.L800
+	bcs	.L801
 	adrp	x1, .LANCHOR149
 	adrp	x0, .LC1
 	mov	w2, 485
 	add	x1, x1, :lo12:.LANCHOR149
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L800:
+.L801:
 	adrp	x27, .LANCHOR123
 	ubfiz	x0, x20, 2, 16
 	adrp	x22, .LANCHOR54
 	ldr	x1, [x27, #:lo12:.LANCHOR123]
 	ldr	w23, [x1, x0]
-	cbnz	w23, .L801
+	cbnz	w23, .L802
 	ldr	x0, [x22, #:lo12:.LANCHOR54]
 	lsl	x19, x19, 4
 	adrp	x1, .LANCHOR22
@@ -5926,7 +5941,7 @@ load_l2p_region:
 	add	x1, x0, x19
 	strh	w20, [x0, x19]
 	str	wzr, [x1, 4]
-.L802:
+.L803:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -5935,7 +5950,7 @@ load_l2p_region:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L801:
+.L802:
 	ldr	x0, [x22, #:lo12:.LANCHOR54]
 	lsl	x19, x19, 4
 	adrp	x26, .LANCHOR137
@@ -5954,7 +5969,7 @@ load_l2p_region:
 	ldr	x25, [x21, 16]
 	ldrh	w0, [x25, 8]
 	cmp	w0, w20
-	beq	.L803
+	beq	.L804
 	mov	w2, w23
 	mov	w1, w20
 	adrp	x0, .LC24
@@ -5972,26 +5987,26 @@ load_l2p_region:
 	mov	w2, 4
 	add	x0, x0, :lo12:.LC25
 	bl	rknand_print_hex
-.L804:
+.L805:
 	ldrh	w0, [x25, 8]
 	cmp	w0, w20
-	beq	.L805
+	beq	.L806
 	adrp	x1, .LANCHOR149
 	adrp	x0, .LC1
 	mov	w2, 508
 	add	x1, x1, :lo12:.LANCHOR149
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L805:
+.L806:
 	ldr	x0, [x22, #:lo12:.LANCHOR54]
 	add	x1, x0, x19
 	str	wzr, [x1, 4]
 	strh	w20, [x0, x19]
-	b	.L802
-.L803:
+	b	.L803
+.L804:
 	ldr	w0, [x26, #:lo12:.LANCHOR137]
 	cmp	w0, 256
-	bne	.L804
+	bne	.L805
 	mov	w2, w23
 	mov	w1, w20
 	adrp	x0, .LC26
@@ -6004,7 +6019,7 @@ load_l2p_region:
 	adrp	x0, .LANCHOR128
 	add	x0, x0, :lo12:.LANCHOR128
 	bl	FtlMapWritePage
-	b	.L804
+	b	.L805
 	.size	load_l2p_region, .-load_l2p_region
 	.section	.text.ftl_map_blk_gc,"ax",@progbits
 	.align	2
@@ -6027,12 +6042,12 @@ ftl_map_blk_gc:
 	ldrh	w2, [x19, 8]
 	sub	w1, w1, #5
 	cmp	w2, w1
-	blt	.L808
+	blt	.L809
 	ubfiz	x0, x0, 1, 16
 	ldrh	w22, [x20, x0]
-	cbz	w22, .L808
+	cbz	w22, .L809
 	ldr	w1, [x19, 52]
-	cbnz	w1, .L808
+	cbnz	w1, .L809
 	mov	w1, 1
 	str	w1, [x19, 52]
 	strh	wzr, [x20, x0]
@@ -6042,31 +6057,31 @@ ftl_map_blk_gc:
 	strh	w0, [x19, 8]
 	ldrh	w0, [x24, #:lo12:.LANCHOR19]
 	cmp	w1, w0
-	bcc	.L809
+	bcc	.L810
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L809:
+.L810:
 	adrp	x26, .LANCHOR137
 	adrp	x23, .LANCHOR150
 	add	x27, x26, :lo12:.LANCHOR137
 	add	x23, x23, :lo12:.LANCHOR150
 	mov	w20, 0
-.L810:
+.L811:
 	ldrh	w0, [x19, 6]
 	cmp	w0, w20
-	bhi	.L817
+	bhi	.L818
 	mov	w1, 1
 	mov	w0, w22
 	bl	FtlFreeSysBlkQueueIn
 	str	wzr, [x19, 52]
-.L808:
+.L809:
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x24, #:lo12:.LANCHOR19]
 	cmp	w1, w0
-	bcc	.L818
+	bcc	.L819
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L818:
+.L819:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6075,12 +6090,12 @@ ftl_map_blk_gc:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L817:
+.L818:
 	ubfiz	x0, x20, 2, 16
 	add	x28, x25, x0
 	ldr	w1, [x25, x0]
 	cmp	w22, w1, lsr 10
-	bne	.L811
+	bne	.L812
 	adrp	x2, .LANCHOR106
 	add	x0, x26, :lo12:.LANCHOR137
 	ldr	x2, [x2, #:lo12:.LANCHOR106]
@@ -6094,36 +6109,36 @@ ftl_map_blk_gc:
 	bl	FlashReadPages
 	ldrh	w0, [x21, 8]
 	cmp	w0, w20
-	beq	.L812
+	beq	.L813
 	adrp	x0, .LC1
 	mov	w2, 611
 	mov	x1, x23
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L812:
+.L813:
 	ldr	w0, [x27]
 	cmn	w0, #1
-	bne	.L813
-.L815:
+	bne	.L814
+.L816:
 	str	wzr, [x28]
+.L815:
+	b	.L815
 .L814:
-	b	.L814
-.L813:
 	ldrh	w0, [x21, 8]
 	cmp	w0, w20
-	bne	.L815
+	bne	.L816
 	ldrh	w1, [x21]
 	ldrh	w0, [x19, 4]
 	cmp	w1, w0
-	bne	.L815
+	bne	.L816
 	ldr	x2, [x27, 8]
 	mov	w1, w20
 	mov	x0, x19
 	bl	FtlMapWritePage
-.L811:
+.L812:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L810
+	b	.L811
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
 	.section	.text.flush_l2p_region,"ax",@progbits
 	.align	2
@@ -6165,27 +6180,27 @@ l2p_flush:
 	str	x21, [sp, 32]
 	mov	w19, 0
 	adrp	x21, .LANCHOR54
-.L827:
+.L828:
 	ldrh	w0, [x20]
 	cmp	w0, w19
-	bhi	.L829
+	bhi	.L830
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L829:
+.L830:
 	ldr	x1, [x21, #:lo12:.LANCHOR54]
 	ubfiz	x0, x19, 4, 16
 	add	x0, x1, x0
 	ldr	w0, [x0, 4]
-	tbz	w0, #31, .L828
+	tbz	w0, #31, .L829
 	mov	w0, w19
 	bl	flush_l2p_region
-.L828:
+.L829:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L827
+	b	.L828
 	.size	l2p_flush, .-l2p_flush
 	.section	.text.log2phys,"ax",@progbits
 	.align	2
@@ -6207,17 +6222,17 @@ log2phys:
 	ldr	w1, [x0, #:lo12:.LANCHOR151]
 	mov	w21, w2
 	cmp	w25, w1
-	bcc	.L832
+	bcc	.L833
 	adrp	x1, .LANCHOR152
 	adrp	x0, .LC1
-	mov	w2, 813
+	mov	w2, 820
 	add	x1, x1, :lo12:.LANCHOR152
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L832:
+.L833:
 	ldr	w0, [x19, #:lo12:.LANCHOR151]
 	cmp	w25, w0
-	bcs	.L833
+	bcs	.L834
 	adrp	x23, .LANCHOR54
 	add	w24, w24, 7
 	adrp	x0, .LANCHOR32
@@ -6226,10 +6241,10 @@ log2phys:
 	and	w22, w22, 65535
 	ldrh	w1, [x0, #:lo12:.LANCHOR32]
 	mov	x0, 0
-.L834:
+.L835:
 	and	x19, x0, 65535
 	cmp	w19, w1
-	bcc	.L839
+	bcc	.L840
 	bl	select_l2p_ram_region
 	and	x19, x0, 65535
 	ldr	x2, [x23, #:lo12:.LANCHOR54]
@@ -6239,33 +6254,33 @@ log2phys:
 	ldrh	w2, [x2, x1]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L840
+	beq	.L841
 	ldr	w1, [x3, 4]
-	tbz	w1, #31, .L840
+	tbz	w1, #31, .L841
 	bl	flush_l2p_region
-.L840:
+.L841:
 	mov	w1, w26
 	mov	w0, w22
 	bl	load_l2p_region
-	b	.L836
-.L833:
+	b	.L837
+.L834:
 	mov	w0, -1
-	cbnz	w21, .L831
+	cbnz	w21, .L832
 	str	w0, [x20]
-.L831:
+.L832:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L839:
+.L840:
 	add	x0, x0, 1
 	add	x3, x2, x0, lsl 4
 	ldrh	w3, [x3, -16]
 	cmp	w3, w22
-	bne	.L834
-.L836:
+	bne	.L835
+.L837:
 	mov	x0, 1
 	ldr	x1, [x23, #:lo12:.LANCHOR54]
 	lsl	x0, x0, x24
@@ -6273,22 +6288,22 @@ log2phys:
 	and	w0, w0, w25
 	and	x0, x0, 65535
 	add	x1, x1, x19, lsl 4
-	cbnz	w21, .L837
+	cbnz	w21, .L838
 	ldr	x1, [x1, 8]
 	ldr	w0, [x1, x0, lsl 2]
 	str	w0, [x20]
-.L838:
+.L839:
 	ldr	x0, [x23, #:lo12:.LANCHOR54]
 	add	x19, x0, x19, lsl 4
 	ldr	w0, [x19, 4]
 	cmn	w0, #1
-	beq	.L842
+	beq	.L843
 	add	w0, w0, 1
 	str	w0, [x19, 4]
-.L842:
+.L843:
 	mov	w0, 0
-	b	.L831
-.L837:
+	b	.L832
+.L838:
 	ldr	x2, [x1, 8]
 	ldr	w3, [x20]
 	str	w3, [x2, x0, lsl 2]
@@ -6297,7 +6312,7 @@ log2phys:
 	str	w0, [x1, 4]
 	adrp	x0, .LANCHOR55
 	strh	w22, [x0, #:lo12:.LANCHOR55]
-	b	.L838
+	b	.L839
 	.size	log2phys, .-log2phys
 	.section	.text.FtlReUsePrevPpa,"ax",@progbits
 	.align	2
@@ -6318,10 +6333,10 @@ FtlReUsePrevPpa:
 	and	w3, w0, 65535
 	ubfiz	x20, x3, 1, 16
 	ldrh	w1, [x2, x20]
-	cbnz	w1, .L846
+	cbnz	w1, .L847
 	adrp	x0, .LANCHOR45
 	ldr	x19, [x0, #:lo12:.LANCHOR45]
-	cbz	x19, .L847
+	cbz	x19, .L848
 	adrp	x2, .LANCHOR39
 	mov	x5, -6148914691236517206
 	movk	x5, 0xaaab, lsl 0
@@ -6334,23 +6349,23 @@ FtlReUsePrevPpa:
 	mul	x19, x19, x5
 	mov	w5, 6
 	and	w19, w19, 65535
-.L848:
+.L849:
 	cmp	w1, w4
-	beq	.L847
+	beq	.L848
 	cmp	w19, w3
-	bne	.L849
+	bne	.L850
 	mov	w1, w19
 	add	x0, x0, :lo12:.LANCHOR45
 	bl	List_remove_node
 	ldrh	w0, [x23, #:lo12:.LANCHOR47]
-	cbnz	w0, .L850
+	cbnz	w0, .L851
 	adrp	x1, .LANCHOR153
 	adrp	x0, .LC1
-	mov	w2, 1735
+	mov	w2, 1742
 	add	x1, x1, :lo12:.LANCHOR153
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L850:
+.L851:
 	ldrh	w0, [x23, #:lo12:.LANCHOR47]
 	sub	w0, w0, #1
 	strh	w0, [x23, #:lo12:.LANCHOR47]
@@ -6360,7 +6375,7 @@ FtlReUsePrevPpa:
 	ldrh	w0, [x1, x20]
 	add	w0, w0, 1
 	strh	w0, [x1, x20]
-.L847:
+.L848:
 	add	x1, x29, 76
 	mov	w2, 1
 	mov	w0, w21
@@ -6370,18 +6385,18 @@ FtlReUsePrevPpa:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L849:
+.L850:
 	umull	x19, w19, w5
 	ldrh	w19, [x2, x19]
 	cmp	w19, w6
-	beq	.L847
+	beq	.L848
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L848
-.L846:
+	b	.L849
+.L847:
 	add	w1, w1, 1
 	strh	w1, [x2, x20]
-	b	.L847
+	b	.L848
 	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
 	.section	.text.FtlRecoverySuperblock,"ax",@progbits
 	.align	2
@@ -6399,7 +6414,7 @@ FtlRecoverySuperblock:
 	stp	x25, x26, [sp, 64]
 	cmp	w0, w1
 	stp	x27, x28, [sp, 80]
-	beq	.L983
+	beq	.L984
 	ldrb	w0, [x19, 6]
 	str	w0, [x29, 164]
 	adrp	x0, .LANCHOR18
@@ -6407,11 +6422,11 @@ FtlRecoverySuperblock:
 	str	x0, [x29, 128]
 	ldrh	w2, [x0, #:lo12:.LANCHOR18]
 	cmp	w2, w26
-	bne	.L859
+	bne	.L860
 	strh	wzr, [x19, 4]
-.L990:
+.L991:
 	strb	wzr, [x19, 6]
-.L983:
+.L984:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -6420,17 +6435,17 @@ FtlRecoverySuperblock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L859:
+.L860:
 	ldrh	w0, [x19, 16]
 	mov	w20, 0
-.L860:
+.L861:
 	cmp	w0, w1
-	beq	.L861
+	beq	.L862
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
 	mov	w23, w0
 	cmn	w0, #1
-	beq	.L862
+	beq	.L863
 	adrp	x1, .LANCHOR63
 	adrp	x2, .LANCHOR2
 	adrp	x20, .LANCHOR102
@@ -6451,9 +6466,9 @@ FtlRecoverySuperblock:
 	ldrh	w1, [x2, #:lo12:.LANCHOR2]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.L863:
+.L864:
 	cmp	x4, x1
-	bne	.L867
+	bne	.L868
 	mov	w2, 0
 	mov	w1, w22
 	bl	FlashReadPages
@@ -6467,69 +6482,69 @@ FtlRecoverySuperblock:
 	mov	w3, 0
 	sub	w21, w21, #1
 	str	x0, [x29, 144]
-.L868:
+.L869:
 	cmp	w22, w3
-	bne	.L873
+	bne	.L874
 	add	w22, w23, 1
 	ldr	w0, [x4, 4]
 	and	w22, w22, 65535
-.L985:
+.L986:
 	lsr	w0, w0, 10
 	bl	P2V_plane
 	and	w27, w0, 65535
 	ldr	x0, [x29, 128]
 	ldrh	w0, [x0, #:lo12:.LANCHOR18]
 	cmp	w0, w22
-	bne	.L875
+	bne	.L876
 	strh	w22, [x19, 2]
 	strb	wzr, [x19, 6]
 	strh	wzr, [x19, 4]
-.L875:
+.L876:
 	ldr	w0, [x29, 164]
 	cmp	w22, w26
 	cset	w1, eq
 	cmp	w27, w0
 	cset	w0, eq
 	tst	w1, w0
-	beq	.L876
-.L991:
+	beq	.L877
+.L992:
 	mov	w2, w27
 	mov	w1, w22
 	mov	x0, x19
 	bl	ftl_sb_update_avl_pages
-	b	.L983
-.L861:
+	b	.L984
+.L862:
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	add	x0, x19, x20, sxtw 1
 	ldrh	w0, [x0, 16]
-	b	.L860
-.L862:
-	cbz	w26, .L864
+	b	.L861
+.L863:
+	cbz	w26, .L865
 	adrp	x1, .LANCHOR154
 	adrp	x0, .LC1
-	mov	w2, 1802
+	mov	w2, 1809
 	add	x1, x1, :lo12:.LANCHOR154
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L864:
+.L865:
 	ldr	w0, [x29, 164]
 	cmp	w0, 0
 	ccmp	w20, w0, 4, ne
-	beq	.L865
+	beq	.L866
 	adrp	x1, .LANCHOR154
 	adrp	x0, .LC1
-	mov	w2, 1803
+	mov	w2, 1810
 	add	x1, x1, :lo12:.LANCHOR154
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L865:
+.L866:
 	strh	wzr, [x19, 2]
-	b	.L990
-.L867:
+	b	.L991
+.L868:
 	ldrh	w3, [x4]
 	cmp	w3, w10
-	beq	.L866
+	beq	.L867
 	ubfiz	x2, x22, 5, 16
 	orr	w3, w23, w3, lsl 10
 	add	x2, x0, x2
@@ -6544,90 +6559,90 @@ FtlRecoverySuperblock:
 	asr	w3, w3, 2
 	add	x3, x7, x3, sxtw 2
 	str	x3, [x2, 16]
-.L866:
+.L867:
 	add	x4, x4, 2
-	b	.L863
-.L873:
+	b	.L864
+.L874:
 	ldr	w0, [x11]
-	cbnz	w0, .L869
+	cbnz	w0, .L870
 	ldr	x8, [x11, 16]
 	ldr	w5, [x8, 4]
 	cmn	w5, #1
-	beq	.L870
+	beq	.L871
 	ldr	w1, [x7]
 	mov	w0, w5
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L870
+	cbz	w0, .L871
 	add	w5, w5, 1
 	str	w5, [x7]
-.L870:
+.L871:
 	ldr	w0, [x8]
 	cmn	w0, #1
-	bne	.L872
+	bne	.L873
 	ubfiz	x3, x3, 5, 16
 	and	w22, w23, 65535
 	add	x3, x4, x3
 	ldr	w0, [x3, 4]
-	b	.L985
-.L869:
+	b	.L986
+.L870:
 	mov	w6, w10
-.L872:
+.L873:
 	add	w3, w3, 1
 	add	x11, x11, 32
 	and	w3, w3, 65535
-	b	.L868
-.L876:
+	b	.L869
+.L877:
 	mov	w0, 65535
 	cmp	w6, w0
-	bne	.L877
+	bne	.L878
 	ldrb	w0, [x19, 8]
-	cbnz	w0, .L878
-.L877:
+	cbnz	w0, .L879
+.L878:
 	adrp	x25, .LANCHOR133
 	and	w28, w23, 65535
 	ldr	w0, [x25, #:lo12:.LANCHOR133]
 	cmn	w0, #1
-	bne	.L879
+	bne	.L880
 	str	w21, [x25, #:lo12:.LANCHOR133]
-.L879:
+.L880:
 	add	w0, w26, 7
 	cmp	w0, w23, uxth
-	bge	.L929
+	bge	.L930
 	sub	w24, w28, #7
 	and	w24, w24, 65535
-.L880:
+.L881:
 	ldr	x0, [x29, 152]
 	mov	w3, 65535
 	mov	w5, 1
 	add	x4, x0, :lo12:.LANCHOR2
-.L881:
+.L882:
 	cmp	w24, w28
-	bhi	.L891
+	bhi	.L892
 	ldrh	w1, [x4]
 	mov	w23, 0
 	ldr	x0, [x20, #:lo12:.LANCHOR102]
 	add	x1, x1, 8
 	ldr	x2, [x29, 168]
 	add	x1, x19, x1, lsl 1
-	b	.L892
-.L929:
+	b	.L893
+.L930:
 	mov	w24, w26
-	b	.L880
-.L883:
+	b	.L881
+.L884:
 	ldrh	w6, [x2]
 	cmp	w6, w3
-	beq	.L882
+	beq	.L883
 	ubfiz	x7, x23, 5, 16
 	add	w23, w23, 1
 	add	x7, x0, x7
 	and	w23, w23, 65535
 	orr	w6, w24, w6, lsl 10
 	str	w6, [x7, 4]
-.L882:
+.L883:
 	add	x2, x2, 2
-.L892:
+.L893:
 	cmp	x1, x2
-	bne	.L883
+	bne	.L884
 	mov	w1, w23
 	mov	w2, 0
 	str	w5, [x29, 112]
@@ -6644,21 +6659,21 @@ FtlRecoverySuperblock:
 	add	x23, x2, x23
 	ldr	x4, [x29, 136]
 	mov	w2, 0
-.L884:
+.L885:
 	cmp	x23, x0
-	bne	.L889
-	cbz	w2, .L890
+	bne	.L890
+	cbz	w2, .L891
 	str	w1, [x25, #:lo12:.LANCHOR133]
-.L890:
+.L891:
 	add	w24, w24, 1
 	and	w24, w24, 65535
-	b	.L881
-.L889:
+	b	.L882
+.L890:
 	ldr	w6, [x0, -16]
-	cbz	w6, .L885
-	cbz	w2, .L878
+	cbz	w6, .L886
+	cbz	w2, .L879
 	str	w1, [x25, #:lo12:.LANCHOR133]
-.L878:
+.L879:
 	adrp	x0, .LANCHOR155
 	mov	w23, w26
 	mov	w1, 1
@@ -6666,7 +6681,7 @@ FtlRecoverySuperblock:
 	strh	w1, [x0, #:lo12:.LANCHOR155]
 	add	x0, x28, :lo12:.LANCHOR133
 	str	x0, [x29, 104]
-.L893:
+.L894:
 	ldr	x1, [x29, 152]
 	mov	w24, 0
 	ldr	x0, [x20, #:lo12:.LANCHOR102]
@@ -6675,9 +6690,9 @@ FtlRecoverySuperblock:
 	ldrh	w1, [x1, #:lo12:.LANCHOR2]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.L894:
+.L895:
 	cmp	x1, x2
-	bne	.L896
+	bne	.L897
 	mov	w2, 0
 	mov	w1, w24
 	bl	FlashReadPages
@@ -6687,62 +6702,62 @@ FtlRecoverySuperblock:
 	adrp	x0, .LANCHOR156
 	add	x0, x0, :lo12:.LANCHOR156
 	str	x0, [x29, 120]
-.L897:
+.L898:
 	ldr	x0, [x29, 112]
 	cmp	x25, x0
-	bne	.L923
+	bne	.L924
 	ldr	x0, [x29, 128]
 	add	w23, w23, 1
 	and	w23, w23, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR18]
 	cmp	w0, w23
-	bne	.L893
+	bne	.L894
 	ldr	x0, [x29, 152]
 	mov	w2, 65535
 	strh	w23, [x19, 2]
 	strh	wzr, [x19, 4]
 	ldrh	w1, [x0, #:lo12:.LANCHOR2]
 	mov	w0, 0
-.L924:
+.L925:
 	cmp	w0, w1
-	beq	.L983
+	beq	.L984
 	ldr	x4, [x29, 168]
 	ldrh	w3, [x4], 2
 	str	x4, [x29, 168]
 	cmp	w3, w2
-	beq	.L925
+	beq	.L926
 	strb	w0, [x19, 6]
-	b	.L983
-.L885:
+	b	.L984
+.L886:
 	ldr	x6, [x0]
 	ldrh	w7, [x6]
 	cmp	w7, w3
-	beq	.L888
+	beq	.L889
 	ldr	w6, [x6, 4]
 	cmn	w6, #1
 	csel	w1, w1, w6, eq
 	csel	w2, w2, w5, eq
-.L888:
+.L889:
 	add	x0, x0, 32
-	b	.L884
-.L891:
+	b	.L885
+.L892:
 	mov	w0, -1
 	str	w0, [x25, #:lo12:.LANCHOR133]
-	b	.L878
-.L896:
+	b	.L879
+.L897:
 	ldrh	w3, [x2]
 	cmp	w3, w5
-	beq	.L895
+	beq	.L896
 	ubfiz	x4, x24, 5, 16
 	add	w24, w24, 1
 	add	x4, x0, x4
 	and	w24, w24, 65535
 	orr	w3, w23, w3, lsl 10
 	str	w3, [x4, 4]
-.L895:
+.L896:
 	add	x2, x2, 2
-	b	.L894
-.L923:
+	b	.L895
+.L924:
 	ldr	x4, [x20, #:lo12:.LANCHOR102]
 	add	x4, x4, x25
 	ldr	w5, [x4, 4]
@@ -6751,38 +6766,38 @@ FtlRecoverySuperblock:
 	bl	P2V_plane
 	and	w0, w0, 65535
 	cmp	w23, w26
-	bcc	.L898
+	bcc	.L899
 	ldr	w1, [x29, 164]
 	ccmp	w1, w0, 0, eq
-	bhi	.L898
+	bhi	.L899
 	cmp	w23, w22
 	ccmp	w27, w0, 0, eq
-	beq	.L899
+	beq	.L900
 	ldr	w0, [x4]
 	cmn	w0, #1
-	beq	.L900
+	beq	.L901
 	ldr	x3, [x4, 16]
 	mov	w0, 61589
 	ldrh	w1, [x3]
 	cmp	w1, w0
-	beq	.L901
+	beq	.L902
 	ldrh	w0, [x19]
-.L987:
+.L988:
 	bl	decrement_vpc_count
-	b	.L898
-.L901:
+	b	.L899
+.L902:
 	ldr	w21, [x3, 4]
 	cmn	w21, #1
-	beq	.L902
+	beq	.L903
 	ldr	x0, [x29, 144]
 	ldr	w1, [x0, #:lo12:.LANCHOR82]
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L902
+	cbz	w0, .L903
 	ldr	x1, [x29, 144]
 	add	w0, w21, 1
 	str	w0, [x1, #:lo12:.LANCHOR82]
-.L902:
+.L903:
 	ldp	w24, w0, [x3, 8]
 	add	x1, x29, 184
 	str	w0, [x29, 180]
@@ -6792,12 +6807,12 @@ FtlRecoverySuperblock:
 	ldr	w1, [x28, #:lo12:.LANCHOR133]
 	ldr	w3, [x29, 180]
 	cmn	w1, #1
-	beq	.L903
+	beq	.L904
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L903
+	cbz	w0, .L904
 	cmn	w3, #1
-	beq	.L904
+	beq	.L905
 	ldr	x0, [x20, #:lo12:.LANCHOR102]
 	mov	w2, 0
 	mov	w1, 1
@@ -6811,15 +6826,15 @@ FtlRecoverySuperblock:
 	add	x3, x0, x25
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	bne	.L905
-.L906:
+	bne	.L906
+.L907:
 	mov	w0, -1
 	str	w0, [x29, 180]
-.L913:
+.L914:
 	ldr	w3, [x29, 180]
 	cmn	w3, #1
-	beq	.L898
-.L928:
+	beq	.L899
+.L929:
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
 	and	w24, w0, 65535
@@ -6827,8 +6842,8 @@ FtlRecoverySuperblock:
 	mov	w3, w24
 	ldrh	w0, [x0, #:lo12:.LANCHOR4]
 	cmp	w0, w24
-	bhi	.L919
-	mov	w2, 2059
+	bhi	.L920
+	mov	w2, 2066
 	adrp	x1, .LANCHOR154
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR154
@@ -6836,50 +6851,50 @@ FtlRecoverySuperblock:
 	str	w24, [x29, 136]
 	bl	printf
 	ldr	w3, [x29, 136]
-.L919:
+.L920:
 	adrp	x1, .LANCHOR41
 	ubfiz	x0, x24, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR41]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L920
+	cbz	w0, .L921
 	mov	w0, w3
-	b	.L987
-.L904:
+	b	.L988
+.L905:
 	ldp	w1, w0, [x29, 184]
 	cmp	w1, w0
-	bne	.L898
+	bne	.L899
 	mov	w2, 1
 	add	x1, x29, 180
 	mov	w0, w24
 	bl	log2phys
-.L898:
+.L899:
 	add	x25, x25, 32
-	b	.L897
-.L905:
+	b	.L898
+.L906:
 	ldr	w0, [x4, 8]
 	cmp	w24, w0
-	bne	.L906
+	bne	.L907
 	ldr	w0, [x4, 4]
 	str	w0, [x29, 136]
 	str	x4, [x29, 96]
 	uxtw	x1, w0
 	ldr	w0, [x28, #:lo12:.LANCHOR133]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L906
+	cbz	w0, .L907
 	ldp	w0, w1, [x29, 184]
 	ldr	x4, [x29, 96]
 	cmp	w0, w1
 	ldr	w1, [x29, 180]
-	bne	.L908
-.L986:
+	bne	.L909
+.L987:
 	mov	w0, w24
 	bl	FtlReUsePrevPpa
-	b	.L906
-.L908:
+	b	.L907
+.L909:
 	cmp	w0, w1
-	beq	.L906
+	beq	.L907
 	cmn	w0, #1
-	beq	.L909
+	beq	.L910
 	ldr	x4, [x3, 16]
 	mov	w2, 0
 	str	w0, [x3, 4]
@@ -6888,70 +6903,70 @@ FtlRecoverySuperblock:
 	mov	x0, x3
 	bl	FlashReadPages
 	ldr	x4, [x29, 96]
-.L910:
+.L911:
 	ldr	x0, [x20, #:lo12:.LANCHOR102]
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	beq	.L911
+	beq	.L912
 	ldr	x0, [x29, 104]
 	ldr	w3, [x4, 4]
 	mov	w1, w3
 	ldr	w0, [x0]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L911
+	cbz	w0, .L912
 	ldr	w0, [x29, 136]
 	mov	w1, w3
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L906
-.L911:
+	cbz	w0, .L907
+.L912:
 	ldr	w1, [x29, 180]
-	b	.L986
-.L909:
+	b	.L987
+.L910:
 	str	w0, [x3]
-	b	.L910
-.L903:
+	b	.L911
+.L904:
 	ldp	w1, w0, [x29, 184]
 	cmp	w1, w0
-	beq	.L913
+	beq	.L914
 	cmn	w3, #1
-	beq	.L915
+	beq	.L916
 	adrp	x0, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
 	cmp	w0, w3, lsr 10
-	bhi	.L915
+	bhi	.L916
 	adrp	x0, .LC27
 	mov	w1, w3
 	add	x0, x0, :lo12:.LC27
-.L989:
+.L990:
 	bl	printf
-	b	.L898
-.L915:
+	b	.L899
+.L916:
 	mov	w2, 1
 	add	x1, x29, 188
 	mov	w0, w24
 	bl	log2phys
 	ldr	w3, [x29, 184]
 	cmn	w3, #1
-	beq	.L913
+	beq	.L914
 	ldr	w0, [x29, 180]
 	cmp	w3, w0
-	beq	.L928
+	beq	.L929
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
 	adrp	x1, .LANCHOR50
 	and	w0, w0, 65535
 	ldrh	w1, [x1, #:lo12:.LANCHOR50]
 	cmp	w1, w0
-	beq	.L918
+	beq	.L919
 	adrp	x1, .LANCHOR51
 	ldrh	w1, [x1, #:lo12:.LANCHOR51]
 	cmp	w1, w0
-	beq	.L918
+	beq	.L919
 	adrp	x1, .LANCHOR52
 	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bne	.L913
-.L918:
+	bne	.L914
+.L919:
 	ldr	x0, [x20, #:lo12:.LANCHOR102]
 	mov	w2, 0
 	mov	w1, 1
@@ -6962,54 +6977,54 @@ FtlRecoverySuperblock:
 	ldr	x0, [x20, #:lo12:.LANCHOR102]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L913
+	beq	.L914
 	ldr	x4, [x29, 136]
 	mov	w0, w21
 	ldr	w1, [x4, 4]
 	bl	ftl_cmp_data_ver
-	cbnz	w0, .L913
+	cbnz	w0, .L914
 	mov	w2, 1
 	add	x1, x29, 184
 	mov	w0, w24
 	bl	log2phys
-	b	.L913
-.L920:
+	b	.L914
+.L921:
 	adrp	x0, .LC28
 	mov	w1, w24
 	add	x0, x0, :lo12:.LC28
-	b	.L989
-.L900:
+	b	.L990
+.L901:
 	ldr	x0, [x29, 120]
 	ldr	w0, [x0]
 	cmp	w0, 31
-	bhi	.L921
+	bhi	.L922
 	adrp	x1, .LANCHOR157
 	add	x1, x1, :lo12:.LANCHOR157
 	str	w5, [x1, w0, uxtw 2]
 	add	w0, w0, 1
 	ldr	x1, [x29, 120]
 	str	w0, [x1]
-.L921:
+.L922:
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
 	ldr	w0, [x28, #:lo12:.LANCHOR133]
 	cmn	w0, #1
-	bne	.L922
-.L988:
+	bne	.L923
+.L989:
 	str	w21, [x28, #:lo12:.LANCHOR133]
-	b	.L898
-.L922:
+	b	.L899
+.L923:
 	cmp	w21, w0
-	bcs	.L898
-	b	.L988
-.L925:
+	bcs	.L899
+	b	.L989
+.L926:
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L924
-.L899:
+	b	.L925
+.L900:
 	strb	w27, [x19, 6]
 	strh	w22, [x19, 2]
-	b	.L991
+	b	.L992
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
 	.section	.text.ftl_check_vpc,"ax",@progbits
 	.align	2
@@ -7037,10 +7052,10 @@ ftl_check_vpc:
 	mov	w1, 0
 	mov	x0, x19
 	bl	ftl_memset
-.L993:
+.L994:
 	ldr	w0, [x23]
 	cmp	w22, w0
-	bcc	.L995
+	bcc	.L996
 	adrp	x22, .LANCHOR4
 	adrp	x24, .LC30
 	add	x22, x22, :lo12:.LANCHOR4
@@ -7049,13 +7064,13 @@ ftl_check_vpc:
 	mov	w23, 0
 	mov	w19, 0
 	adrp	x25, .LANCHOR41
-.L996:
+.L997:
 	ldrh	w0, [x22]
 	cmp	w0, w19
-	bhi	.L998
+	bhi	.L999
 	adrp	x0, .LANCHOR45
 	ldr	x19, [x0, #:lo12:.LANCHOR45]
-	cbz	x19, .L999
+	cbz	x19, .L1000
 	adrp	x0, .LANCHOR47
 	adrp	x25, .LC31
 	add	x20, x20, :lo12:check_vpc_table
@@ -7073,17 +7088,17 @@ ftl_check_vpc:
 	movk	x1, 0xaaab, lsl 0
 	mul	x19, x19, x1
 	and	w19, w19, 65535
-.L1000:
+.L1001:
 	cmp	w22, w26
-	bne	.L1002
-.L999:
-	cbz	w23, .L992
+	bne	.L1003
+.L1000:
+	cbz	w23, .L993
 	adrp	x0, .LC1
-	mov	w2, 2387
+	mov	w2, 2394
 	add	x1, x21, :lo12:.LANCHOR158
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L992:
+.L993:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -7091,31 +7106,31 @@ ftl_check_vpc:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L995:
+.L996:
 	mov	w2, 0
 	add	x1, x29, 108
 	mov	w0, w22
 	bl	log2phys
 	ldr	w0, [x29, 108]
 	cmn	w0, #1
-	beq	.L994
+	beq	.L995
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	and	x0, x0, 65535
 	ldrh	w1, [x19, x0, lsl 1]
 	add	w1, w1, 1
 	strh	w1, [x19, x0, lsl 1]
-.L994:
+.L995:
 	add	w22, w22, 1
-	b	.L993
-.L998:
+	b	.L994
+.L999:
 	ldr	x0, [x25, #:lo12:.LANCHOR41]
 	ubfiz	x28, x19, 1, 16
 	sxtw	x27, w19
 	ldrh	w2, [x0, x28]
 	ldrh	w3, [x26, x27, lsl 1]
 	cmp	w2, w3
-	beq	.L997
+	beq	.L998
 	mov	w1, w19
 	mov	x0, x24
 	bl	printf
@@ -7123,34 +7138,34 @@ ftl_check_vpc:
 	mov	w1, 65535
 	ldrh	w0, [x0, x28]
 	cmp	w0, w1
-	beq	.L997
+	beq	.L998
 	ldrh	w1, [x26, x27, lsl 1]
 	cmp	w1, w0
 	csinc	w23, w23, wzr, ls
-.L997:
+.L998:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L996
-.L1002:
+	b	.L997
+.L1003:
 	ldr	x1, [x27, #:lo12:.LANCHOR41]
 	ubfiz	x0, x19, 1, 16
 	ldrh	w2, [x1, x0]
-	cbz	w2, .L1001
+	cbz	w2, .L1002
 	ldrh	w3, [x20, w19, sxtw 1]
 	mov	w23, 1
 	mov	w1, w19
 	mov	x0, x25
 	bl	printf
-.L1001:
+.L1002:
 	ldr	x0, [x24, #:lo12:.LANCHOR39]
 	umull	x19, w19, w28
 	ldrh	w19, [x0, x19]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L999
+	beq	.L1000
 	add	w22, w22, 1
 	and	w22, w22, 65535
-	b	.L1000
+	b	.L1001
 	.size	ftl_check_vpc, .-ftl_check_vpc
 	.section	.text.ftl_scan_all_data,"ax",@progbits
 	.align	2
@@ -7172,32 +7187,32 @@ ftl_scan_all_data:
 	add	x21, x21, :lo12:.LANCHOR151
 	str	x23, [sp, 64]
 	bl	printf
-.L1018:
+.L1019:
 	ldr	w0, [x21]
 	cmp	w19, w0
-	bcc	.L1024
+	bcc	.L1025
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x29, x30, [sp, 16]
 	ldr	x23, [sp, 64]
 	add	sp, sp, 96
 	ret
-.L1024:
+.L1025:
 	mov	w2, 0
 	add	x1, x29, 76
 	mov	w0, w19
 	bl	log2phys
 	tst	x19, 2047
-	bne	.L1019
+	bne	.L1020
 	ldr	w2, [x29, 76]
 	adrp	x0, .LC33
 	mov	w1, w19
 	add	x0, x0, :lo12:.LC33
 	bl	printf
-.L1019:
+.L1020:
 	ldr	w1, [x29, 76]
 	cmn	w1, #1
-	beq	.L1021
+	beq	.L1022
 	add	x0, x20, :lo12:.LANCHOR137
 	str	wzr, [x20, #:lo12:.LANCHOR137]
 	mov	w2, 0
@@ -7214,11 +7229,11 @@ ftl_scan_all_data:
 	ldr	w0, [x20, #:lo12:.LANCHOR137]
 	cmp	w0, 256
 	ccmn	w0, #1, 4, ne
-	beq	.L1022
+	beq	.L1023
 	ldr	w0, [x23, 8]
 	cmp	w19, w0
-	beq	.L1021
-.L1022:
+	beq	.L1022
+.L1023:
 	ldp	x1, x0, [x22, 8]
 	ldr	w2, [x1, 4]
 	str	w2, [sp]
@@ -7230,9 +7245,9 @@ ftl_scan_all_data:
 	add	x0, x0, :lo12:.LC34
 	mov	w1, w19
 	bl	printf
-.L1021:
+.L1022:
 	add	w19, w19, 1
-	b	.L1018
+	b	.L1019
 	.size	ftl_scan_all_data, .-ftl_scan_all_data
 	.section	.text.FtlGcScanTempBlk,"ax",@progbits
 	.align	2
@@ -7251,28 +7266,28 @@ FtlGcScanTempBlk:
 	stp	x23, x24, [sp, 48]
 	cmp	w20, w0
 	str	x27, [sp, 80]
-	beq	.L1047
-	cbnz	w20, .L1027
-.L1028:
+	beq	.L1048
+	cbnz	w20, .L1028
+.L1029:
 	bl	FtlGcPageVarInit
-	b	.L1029
-.L1047:
+	b	.L1030
+.L1048:
 	mov	w20, 0
-.L1027:
+.L1028:
 	adrp	x0, .LANCHOR18
 	ldrh	w0, [x0, #:lo12:.LANCHOR18]
 	cmp	w0, w1
-	beq	.L1028
-.L1029:
+	beq	.L1029
+.L1030:
 	adrp	x26, .LANCHOR151
 	add	x26, x26, :lo12:.LANCHOR151
-.L1044:
+.L1045:
 	ldrh	w1, [x19]
 	mov	w0, 65535
 	strb	wzr, [x19, 8]
 	cmp	w1, w0
-	beq	.L1030
-.L1046:
+	beq	.L1031
+.L1047:
 	adrp	x1, .LANCHOR63
 	adrp	x24, .LANCHOR102
 	add	x4, x19, 16
@@ -7290,24 +7305,24 @@ FtlGcScanTempBlk:
 	ldrh	w1, [x1, #:lo12:.LANCHOR2]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.L1031:
+.L1032:
 	cmp	x1, x4
-	bne	.L1033
+	bne	.L1034
 	mov	w1, w21
 	ubfiz	x21, x21, 5, 16
 	mov	x22, 0
 	mov	w2, 0
 	bl	FlashReadPages
-.L1034:
+.L1035:
 	cmp	x21, x22
-	bne	.L1045
+	bne	.L1046
 	adrp	x0, .LANCHOR18
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR18]
 	cmp	w0, w20
-	bhi	.L1046
-.L1030:
+	bhi	.L1047
+.L1031:
 	strh	w20, [x19, 2]
 	mov	w0, -1
 	strb	wzr, [x19, 6]
@@ -7324,10 +7339,10 @@ FtlGcScanTempBlk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1033:
+.L1034:
 	ldrh	w3, [x4]
 	cmp	w3, w10
-	beq	.L1032
+	beq	.L1033
 	ubfiz	x2, x21, 5, 16
 	orr	w3, w20, w3, lsl 10
 	add	x2, x0, x2
@@ -7342,25 +7357,25 @@ FtlGcScanTempBlk:
 	asr	w3, w3, 2
 	add	x3, x7, x3, sxtw 2
 	str	x3, [x2, 16]
-.L1032:
+.L1033:
 	add	x4, x4, 2
-	b	.L1031
-.L1045:
+	b	.L1032
+.L1046:
 	ldr	x0, [x24, #:lo12:.LANCHOR102]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
 	ldr	w27, [x1, 4]
 	ldr	x23, [x1, 16]
-	cbnz	w0, .L1035
+	cbnz	w0, .L1036
 	ldrh	w1, [x23]
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L1057
+	beq	.L1058
 	ldr	w0, [x23, 8]
 	ldr	w1, [x26]
 	cmp	w0, w1
-	bls	.L1037
-.L1057:
+	bls	.L1038
+.L1058:
 	adrp	x0, .LANCHOR41
 	ldrh	w1, [x19]
 	mov	w20, 0
@@ -7373,26 +7388,26 @@ FtlGcScanTempBlk:
 	strh	w0, [x19]
 	strh	w0, [x1, #:lo12:.LANCHOR144]
 	bl	FtlGcPageVarInit
-	b	.L1044
-.L1037:
+	b	.L1045
+.L1038:
 	add	x1, x29, 108
 	mov	w2, 0
 	bl	log2phys
 	ldr	w0, [x23, 12]
 	ldr	w1, [x29, 108]
 	cmp	w0, w1
-	beq	.L1039
-.L1041:
+	beq	.L1040
+.L1042:
 	ldr	w2, [x23, 8]
-.L1058:
+.L1059:
 	ldr	w0, [x23, 12]
 	mov	w1, w27
 	add	x22, x22, 32
 	bl	FtlGcUpdatePage
-	b	.L1034
-.L1039:
+	b	.L1035
+.L1040:
 	cmn	w0, #1
-	beq	.L1041
+	beq	.L1042
 	str	w0, [x29, 116]
 	adrp	x0, .LANCHOR109
 	mov	w2, 0
@@ -7411,25 +7426,25 @@ FtlGcScanTempBlk:
 	add	x2, x2, x22
 	mov	x0, 0
 	ubfiz	x1, x1, 9, 16
-.L1042:
+.L1043:
 	cmp	x0, x1
-	beq	.L1041
+	beq	.L1042
 	ldr	x4, [x2, 8]
 	ldr	w5, [x4, x0]
 	add	x0, x0, 4
 	add	x4, x3, x0
 	ldr	w4, [x4, -4]
 	cmp	w5, w4
-	beq	.L1042
+	beq	.L1043
 	ldrh	w1, [x19]
 	adrp	x0, .LC35
 	ldr	w2, [x29, 116]
 	add	x0, x0, :lo12:.LC35
 	bl	printf
-	b	.L1057
-.L1035:
-	mov	w2, -1
 	b	.L1058
+.L1036:
+	mov	w2, -1
+	b	.L1059
 	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
 	.section	.text.FtlVendorPartWrite,"ax",@progbits
 	.align	2
@@ -7449,7 +7464,7 @@ FtlVendorPartWrite:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w1, w0
-	bhi	.L1067
+	bhi	.L1068
 	adrp	x0, .LANCHOR21
 	adrp	x25, .LANCHOR11
 	adrp	x26, .LANCHOR22
@@ -7459,9 +7474,9 @@ FtlVendorPartWrite:
 	add	x26, x26, :lo12:.LANCHOR22
 	mov	w23, 0
 	lsr	w21, w28, w21
-.L1061:
-	cbnz	w20, .L1066
-.L1059:
+.L1062:
+	cbnz	w20, .L1067
+.L1060:
 	mov	w0, w23
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -7470,7 +7485,7 @@ FtlVendorPartWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 208
 	ret
-.L1066:
+.L1067:
 	ldrh	w1, [x25]
 	adrp	x0, .LANCHOR122
 	adrp	x27, .LANCHOR107
@@ -7483,9 +7498,9 @@ FtlVendorPartWrite:
 	and	w19, w19, 65535
 	cmp	w20, w19
 	csel	w19, w0, w19, cc
-	cbz	w2, .L1063
+	cbz	w2, .L1064
 	cmp	w19, w1
-	beq	.L1063
+	beq	.L1064
 	ldr	x0, [x27, #:lo12:.LANCHOR107]
 	str	x0, [x29, 120]
 	add	x0, x29, 144
@@ -7495,7 +7510,7 @@ FtlVendorPartWrite:
 	mov	w1, w2
 	add	x0, x29, 112
 	bl	FlashReadPages
-.L1064:
+.L1065:
 	lsl	w4, w19, 9
 	ldr	x0, [x27, #:lo12:.LANCHOR107]
 	lsl	w22, w22, 7
@@ -7516,16 +7531,16 @@ FtlVendorPartWrite:
 	ldr	w4, [x29, 108]
 	csinv	w23, w23, wzr, ne
 	add	x24, x24, x4, sxtw
-	b	.L1061
-.L1063:
+	b	.L1062
+.L1064:
 	ldrh	w2, [x26]
 	mov	w1, 0
 	ldr	x0, [x27, #:lo12:.LANCHOR107]
 	bl	ftl_memset
-	b	.L1064
-.L1067:
+	b	.L1065
+.L1068:
 	mov	w23, -1
-	b	.L1059
+	b	.L1060
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.section	.text.Ftl_save_ext_data,"ax",@progbits
 	.align	2
@@ -7538,8 +7553,8 @@ Ftl_save_ext_data:
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1072
-	mov	w0, 85
+	bne	.L1073
+	mov	w0, 86
 	mov	w1, 1
 	movk	w0, 0x5000, lsl 16
 	str	w0, [x2, 4]
@@ -7581,7 +7596,7 @@ Ftl_save_ext_data:
 	str	w0, [x2, 48]
 	mov	w0, 0
 	b	FtlVendorPartWrite
-.L1072:
+.L1073:
 	ret
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
 	.section	.text.FtlEctTblFlush,"ax",@progbits
@@ -7592,20 +7607,20 @@ FtlEctTblFlush:
 	adrp	x2, .LANCHOR163
 	ldrh	w1, [x2, #:lo12:.LANCHOR163]
 	cmp	w1, 31
-	bhi	.L1078
+	bhi	.L1079
 	add	w1, w1, 1
 	strh	w1, [x2, #:lo12:.LANCHOR163]
 	mov	w1, 1
-.L1075:
+.L1076:
 	adrp	x2, .LANCHOR117
-	cbnz	w0, .L1076
+	cbnz	w0, .L1077
 	ldr	x0, [x2, #:lo12:.LANCHOR117]
 	ldr	w3, [x0, 20]
 	ldr	w0, [x0, 16]
 	add	w1, w1, w3
 	cmp	w0, w1
-	bcc	.L1080
-.L1076:
+	bcc	.L1081
+.L1077:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	ldr	x2, [x2, #:lo12:.LANCHOR117]
@@ -7628,10 +7643,10 @@ FtlEctTblFlush:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1078:
+.L1079:
 	mov	w1, 32
-	b	.L1075
-.L1080:
+	b	.L1076
+.L1081:
 	mov	w0, 0
 	ret
 	.size	FtlEctTblFlush, .-FtlEctTblFlush
@@ -7661,7 +7676,7 @@ FtlVendorPartRead:
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	cmp	w1, w0
-	bhi	.L1092
+	bhi	.L1093
 	adrp	x0, .LANCHOR21
 	mov	x25, x2
 	mov	w24, 0
@@ -7671,9 +7686,9 @@ FtlVendorPartRead:
 	add	x0, x0, :lo12:.LANCHOR11
 	str	x0, [x29, 104]
 	lsr	w20, w22, w20
-.L1085:
-	cbnz	w21, .L1091
-.L1083:
+.L1086:
+	cbnz	w21, .L1092
+.L1084:
 	mov	w0, w24
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -7682,7 +7697,7 @@ FtlVendorPartRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 208
 	ret
-.L1091:
+.L1092:
 	ldr	x0, [x27, #:lo12:.LANCHOR122]
 	ldr	w4, [x0, w20, uxtw 2]
 	ldr	x0, [x29, 104]
@@ -7695,7 +7710,7 @@ FtlVendorPartRead:
 	cmp	w21, w19
 	csel	w19, w0, w19, cc
 	lsl	w26, w19, 9
-	cbz	w4, .L1087
+	cbz	w4, .L1088
 	adrp	x28, .LANCHOR107
 	mov	w2, 1
 	str	w4, [x29, 96]
@@ -7715,7 +7730,7 @@ FtlVendorPartRead:
 	csinv	w24, w24, wzr, ne
 	ldr	w0, [x0, #:lo12:.LANCHOR137]
 	cmp	w0, 256
-	bne	.L1089
+	bne	.L1090
 	mov	w2, w4
 	mov	w1, w20
 	adrp	x0, .LC36
@@ -7728,28 +7743,28 @@ FtlVendorPartRead:
 	add	x0, x0, :lo12:.LANCHOR160
 	bl	FtlMapWritePage
 	ldr	x5, [x29, 96]
-.L1089:
+.L1090:
 	ldr	x1, [x5, #:lo12:.LANCHOR107]
 	lsl	w23, w23, 7
 	mov	w2, w26
 	mov	x0, x25
 	add	x1, x1, x23, sxtw 2
 	bl	ftl_memcpy
-.L1090:
+.L1091:
 	add	w20, w20, 1
 	sub	w21, w21, w19
 	add	w22, w22, w19
 	add	x25, x25, x26, sxtw
-	b	.L1085
-.L1087:
+	b	.L1086
+.L1088:
 	mov	w2, w26
 	mov	w1, 0
 	mov	x0, x25
 	bl	ftl_memset
-	b	.L1090
-.L1092:
+	b	.L1091
+.L1093:
 	mov	w24, -1
-	b	.L1083
+	b	.L1084
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
 	.section	.text.FtlLoadEctTbl,"ax",@progbits
 	.align	2
@@ -7770,7 +7785,7 @@ FtlLoadEctTbl:
 	mov	w0, 17221
 	movk	w0, 0x4254, lsl 16
 	cmp	w1, w0
-	beq	.L1095
+	beq	.L1096
 	adrp	x1, .LC37
 	adrp	x0, .LC38
 	add	x1, x1, :lo12:.LC37
@@ -7781,7 +7796,7 @@ FtlLoadEctTbl:
 	ldrh	w2, [x20, #:lo12:.LANCHOR115]
 	lsl	w2, w2, 9
 	bl	ftl_memset
-.L1095:
+.L1096:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -7806,18 +7821,18 @@ Ftl_load_ext_data:
 	mov	w20, 19539
 	movk	w20, 0x4654, lsl 16
 	cmp	w0, w20
-	beq	.L1098
+	beq	.L1099
 	mov	w2, 512
 	mov	w1, 0
 	mov	x0, x21
 	bl	ftl_memset
 	str	w20, [x19, #:lo12:.LANCHOR134]
-.L1098:
+.L1099:
 	ldr	w1, [x19, #:lo12:.LANCHOR134]
 	add	x0, x19, :lo12:.LANCHOR134
 	cmp	w1, w20
 	adrp	x1, .LANCHOR90
-	bne	.L1099
+	bne	.L1100
 	adrp	x2, .LANCHOR161
 	ldr	w3, [x0, 88]
 	str	w3, [x2, #:lo12:.LANCHOR161]
@@ -7852,7 +7867,7 @@ Ftl_load_ext_data:
 	ldr	w2, [x0, 48]
 	adrp	x0, .LANCHOR92
 	str	w2, [x0, #:lo12:.LANCHOR92]
-.L1099:
+.L1100:
 	adrp	x0, .LANCHOR13
 	adrp	x2, .LANCHOR89
 	ldr	w1, [x1, #:lo12:.LANCHOR90]
@@ -7883,7 +7898,7 @@ sftl_vendor_read:
 	.type	FtlMapBlkWriteDump_data, %function
 FtlMapBlkWriteDump_data:
 	ldr	w1, [x0, 56]
-	cbz	w1, .L1102
+	cbz	w1, .L1103
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
@@ -7904,16 +7919,16 @@ FtlMapBlkWriteDump_data:
 	str	x24, [x21, 16]
 	str	wzr, [x19, 56]
 	ldr	x25, [x19, 40]
-	cbz	w0, .L1104
+	cbz	w0, .L1105
 	adrp	x1, .LANCHOR19
 	ldrh	w1, [x1, #:lo12:.LANCHOR19]
 	sub	w1, w1, #1
 	cmp	w0, w1
-	bge	.L1104
+	bge	.L1105
 	ldrh	w1, [x19]
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L1104
+	beq	.L1105
 	ldr	x2, [x19, 16]
 	ubfiz	x1, x1, 1, 16
 	sub	w0, w0, #1
@@ -7926,16 +7941,16 @@ FtlMapBlkWriteDump_data:
 	bl	FlashReadPages
 	ldr	w0, [x23, #:lo12:.LANCHOR137]
 	cmn	w0, #1
-	beq	.L1104
+	beq	.L1105
 	ldrh	w1, [x24, 8]
 	ldr	x2, [x19, 40]
 	ubfiz	x0, x1, 2, 16
 	ldr	w2, [x2, x0]
 	ldr	w0, [x21, 4]
 	cmp	w2, w0
-	bne	.L1104
+	bne	.L1105
 	ldr	x2, [x21, 8]
-.L1116:
+.L1117:
 	mov	x0, x19
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -7943,30 +7958,30 @@ FtlMapBlkWriteDump_data:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	b	FtlMapWritePage
-.L1104:
+.L1105:
 	sub	w20, w20, #1
 	and	w20, w20, 65535
 	ubfiz	x0, x20, 2, 16
 	ldr	w1, [x25, x0]
 	add	x0, x22, :lo12:.LANCHOR137
 	str	w1, [x0, 4]
-	cbz	w1, .L1105
+	cbz	w1, .L1106
 	mov	w2, 1
 	mov	w1, w2
 	bl	FlashReadPages
-.L1106:
+.L1107:
 	add	x22, x22, :lo12:.LANCHOR137
 	mov	w1, w20
 	ldr	x2, [x22, 8]
-	b	.L1116
-.L1105:
+	b	.L1117
+.L1106:
 	adrp	x1, .LANCHOR22
 	ldr	x0, [x0, 8]
 	ldrh	w2, [x1, #:lo12:.LANCHOR22]
 	mov	w1, 255
 	bl	ftl_memset
-	b	.L1106
-.L1102:
+	b	.L1107
+.L1103:
 	ret
 	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
 	.section	.text.FtlVpcTblFlush,"ax",@progbits
@@ -8005,7 +8020,7 @@ FtlVpcTblFlush:
 	add	x19, x1, :lo12:.LANCHOR38
 	str	wzr, [x27, 12]
 	str	w2, [x1, #:lo12:.LANCHOR38]
-	mov	w1, 85
+	mov	w1, 86
 	movk	w1, 0x5000, lsl 16
 	str	w1, [x19, 4]
 	ldrh	w1, [x28, 6]
@@ -8074,7 +8089,7 @@ FtlVpcTblFlush:
 	mov	w0, 65535
 	str	x24, [x29, 96]
 	str	w0, [x29, 108]
-.L1118:
+.L1119:
 	ldrh	w2, [x28, 2]
 	ldrh	w1, [x28]
 	ldr	x0, [x22, #:lo12:.LANCHOR105]
@@ -8086,7 +8101,7 @@ FtlVpcTblFlush:
 	ldrh	w0, [x24]
 	sub	w0, w0, #1
 	cmp	w2, w0
-	blt	.L1119
+	blt	.L1120
 	ldrh	w0, [x28, 4]
 	strh	wzr, [x28, 2]
 	strh	w1, [x28, 4]
@@ -8101,7 +8116,7 @@ FtlVpcTblFlush:
 	str	w2, [x19, 4]
 	strh	w0, [x27, 2]
 	str	w1, [x27, 4]
-.L1119:
+.L1120:
 	ldrh	w1, [x26, #:lo12:.LANCHOR22]
 	ldr	x0, [x22, #:lo12:.LANCHOR105]
 	bl	js_hash
@@ -8117,49 +8132,49 @@ FtlVpcTblFlush:
 	and	w0, w0, 65535
 	strh	w0, [x28, 2]
 	cmn	w1, #1
-	bne	.L1120
-	cmp	w0, 1
 	bne	.L1121
+	cmp	w0, 1
+	bne	.L1122
 	adrp	x1, .LANCHOR164
 	adrp	x0, .LC1
-	mov	w2, 1138
+	mov	w2, 1145
 	add	x1, x1, :lo12:.LANCHOR164
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1121:
+.L1122:
 	ldrh	w0, [x28, 2]
 	cmp	w0, 1
-	bne	.L1122
+	bne	.L1123
 	ldr	x0, [x29, 96]
 	ldrh	w0, [x0]
 	sub	w0, w0, #1
 	strh	w0, [x28, 2]
-.L1122:
+.L1123:
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	cmp	w20, 3
-	bls	.L1118
+	bls	.L1119
 	add	x21, x21, :lo12:.LANCHOR137
 	adrp	x0, .LC39
 	mov	w2, w20
 	add	x0, x0, :lo12:.LC39
 	ldr	w1, [x21, 4]
 	bl	printf
-.L1124:
-	b	.L1124
-.L1120:
+.L1125:
+	b	.L1125
+.L1121:
 	cmp	w0, 1
-	beq	.L1118
+	beq	.L1119
 	cmp	w1, 256
-	beq	.L1118
+	beq	.L1119
 	ldr	w1, [x29, 108]
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L1125
+	beq	.L1126
 	ldrh	w0, [x29, 108]
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.L1125:
+.L1126:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -8192,14 +8207,14 @@ sftl_deinit:
 	adrp	x0, .LANCHOR165
 	ldr	w0, [x0, #:lo12:.LANCHOR165]
 	cmp	w0, 1
-	bne	.L1138
+	bne	.L1139
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	FtlSysFlush
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1138:
+.L1139:
 	mov	w0, 0
 	ret
 	.size	sftl_deinit, .-sftl_deinit
@@ -8217,61 +8232,61 @@ FtlDiscard:
 	str	x23, [sp, 48]
 	ldr	w1, [x1, #:lo12:.LANCHOR33]
 	cmp	w1, w0
-	bls	.L1151
+	bls	.L1152
 	cmp	w1, w19
-	bcc	.L1151
+	bcc	.L1152
 	add	w2, w0, w19
 	cmp	w1, w2
-	bcc	.L1151
+	bcc	.L1152
 	cmp	w19, 31
-	bhi	.L1143
-.L1159:
+	bhi	.L1144
+.L1160:
 	mov	w0, 0
-.L1141:
+.L1142:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1143:
+.L1144:
 	adrp	x21, .LANCHOR11
 	ldrh	w1, [x21, #:lo12:.LANCHOR11]
 	udiv	w20, w0, w1
 	msub	w0, w1, w20, w0
 	ands	w0, w0, 65535
-	beq	.L1144
+	beq	.L1145
 	sub	w0, w1, w0
 	add	w20, w20, 1
 	cmp	w0, w19
 	csel	w0, w0, w19, ls
 	sub	w19, w19, w0, uxth
-.L1144:
+.L1145:
 	adrp	x22, .LANCHOR166
 	adrp	x23, .LANCHOR85
 	add	x22, x22, :lo12:.LANCHOR166
 	add	x23, x23, :lo12:.LANCHOR85
 	mov	w0, -1
 	str	w0, [x29, 76]
-.L1145:
+.L1146:
 	ldrh	w0, [x21, #:lo12:.LANCHOR11]
 	cmp	w19, w0
-	bcs	.L1147
+	bcs	.L1148
 	adrp	x0, .LANCHOR166
 	ldr	w1, [x0, #:lo12:.LANCHOR166]
 	cmp	w1, 32
-	bls	.L1159
+	bls	.L1160
 	str	wzr, [x0, #:lo12:.LANCHOR166]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L1159
-.L1147:
+	b	.L1160
+.L1148:
 	mov	w2, 0
 	add	x1, x29, 72
 	mov	w0, w20
 	bl	log2phys
 	ldr	w0, [x29, 72]
 	cmn	w0, #1
-	beq	.L1146
+	beq	.L1147
 	ldr	w0, [x22]
 	mov	w2, 1
 	add	x1, x29, 76
@@ -8286,14 +8301,14 @@ FtlDiscard:
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L1146:
+.L1147:
 	ldrh	w0, [x21, #:lo12:.LANCHOR11]
 	add	w20, w20, 1
 	sub	w19, w19, w0
-	b	.L1145
-.L1151:
+	b	.L1146
+.L1152:
 	mov	w0, -1
-	b	.L1141
+	b	.L1142
 	.size	FtlDiscard, .-FtlDiscard
 	.section	.text.allocate_new_data_superblock,"ax",@progbits
 	.align	2
@@ -8309,25 +8324,25 @@ allocate_new_data_superblock:
 	adrp	x0, .LANCHOR4
 	ldrh	w0, [x0, #:lo12:.LANCHOR4]
 	cmp	w0, w19
-	bcs	.L1161
+	bcs	.L1162
 	adrp	x1, .LANCHOR167
 	adrp	x0, .LC1
-	mov	w2, 2759
+	mov	w2, 2766
 	add	x1, x1, :lo12:.LANCHOR167
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1161:
+.L1162:
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1162
+	beq	.L1163
 	adrp	x1, .LANCHOR41
 	ubfiz	x0, x19, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR41]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1163
+	cbz	w0, .L1164
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-.L1162:
+.L1163:
 	adrp	x1, .LANCHOR130
 	mov	w0, 1
 	strb	w0, [x21, 8]
@@ -8335,20 +8350,20 @@ allocate_new_data_superblock:
 	ldrh	w0, [x1, #:lo12:.LANCHOR130]
 	mov	x20, x1
 	cmp	w0, w2
-	beq	.L1164
+	beq	.L1165
 	cmp	w19, w0
-	bne	.L1165
+	bne	.L1166
 	adrp	x2, .LANCHOR41
 	ubfiz	x1, x0, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR41]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1166
-.L1165:
-	bl	update_vpc_list
+	cbz	w1, .L1167
 .L1166:
+	bl	update_vpc_list
+.L1167:
 	mov	w0, -1
 	strh	w0, [x20, #:lo12:.LANCHOR130]
-.L1164:
+.L1165:
 	mov	x0, x21
 	bl	allocate_data_superblock
 	bl	l2p_flush
@@ -8360,10 +8375,10 @@ allocate_new_data_superblock:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1163:
+.L1164:
 	mov	w0, w19
 	bl	INSERT_FREE_LIST
-	b	.L1162
+	b	.L1163
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
 	.section	.text.FtlProgPages,"ax",@progbits
 	.align	2
@@ -8389,12 +8404,12 @@ FtlProgPages:
 	add	x23, x23, :lo12:.LC40
 	add	x24, x24, :lo12:.LANCHOR2
 	bl	FlashProgPages
-.L1172:
+.L1173:
 	cmp	x21, x19
-	beq	.L1178
+	beq	.L1179
 	sub	x22, x19, #4
-	b	.L1179
-.L1174:
+	b	.L1180
+.L1175:
 	ldr	w1, [x19]
 	mov	x0, x23
 	bl	printf
@@ -8403,10 +8418,10 @@ FtlProgPages:
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
 	ldrh	w0, [x20, 4]
-	cbnz	w0, .L1173
+	cbnz	w0, .L1174
 	mov	x0, x20
 	bl	allocate_new_data_superblock
-.L1173:
+.L1174:
 	mov	x0, x20
 	bl	get_new_active_ppa
 	str	w0, [x19]
@@ -8416,22 +8431,22 @@ FtlProgPages:
 	ldrb	w3, [x20, 9]
 	mov	x0, x22
 	bl	FlashProgPages
-.L1179:
+.L1180:
 	ldr	w2, [x19, -4]
 	cmp	w2, 256
 	ccmn	w2, #1, 4, ne
-	beq	.L1174
+	beq	.L1175
 	ldrb	w1, [x20, 6]
 	ldrh	w0, [x24]
 	cmp	w1, w0
-	bcc	.L1175
+	bcc	.L1176
 	adrp	x1, .LANCHOR168
 	adrp	x0, .LC1
 	mov	w2, 985
 	add	x1, x1, :lo12:.LANCHOR168
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1175:
+.L1176:
 	add	x1, x29, 80
 	ldr	w0, [x22, 4]
 	mov	w2, 1
@@ -8445,35 +8460,35 @@ FtlProgPages:
 	and	w1, w0, 65535
 	mov	w22, w1
 	cmn	w3, #1
-	beq	.L1176
+	beq	.L1177
 	adrp	x2, .LANCHOR41
 	ubfiz	x0, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR41]
 	ldrh	w0, [x2, x0]
-	cbnz	w0, .L1177
+	cbnz	w0, .L1178
 	adrp	x0, .LC41
 	mov	w2, 0
 	add	x0, x0, :lo12:.LC41
 	bl	printf
-.L1177:
+.L1178:
 	mov	w0, w22
 	bl	decrement_vpc_count
-.L1176:
+.L1177:
 	add	x19, x19, 32
-	b	.L1172
-.L1178:
+	b	.L1173
+.L1179:
 	adrp	x0, .LANCHOR2
 	ldrb	w1, [x20, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR2]
 	cmp	w1, w0
-	bcc	.L1171
+	bcc	.L1172
 	adrp	x1, .LANCHOR168
 	adrp	x0, .LC1
 	mov	w2, 1000
 	add	x1, x1, :lo12:.LANCHOR168
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1171:
+.L1172:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -8496,20 +8511,20 @@ FtlGcFreeTempBlock:
 	stp	x25, x26, [sp, 64]
 	cmp	w2, w1
 	stp	x27, x28, [sp, 80]
-	beq	.L1186
+	beq	.L1187
 	adrp	x1, .LANCHOR18
 	add	x0, x19, :lo12:.LANCHOR52
 	ldrh	w1, [x1, #:lo12:.LANCHOR18]
 	bl	FtlGcScanTempBlk
 	str	w0, [x29, 108]
-.L1186:
+.L1187:
 	adrp	x0, .LANCHOR132
 	ldrh	w2, [x19, #:lo12:.LANCHOR52]
 	mov	w1, 65535
 	str	wzr, [x0, #:lo12:.LANCHOR132]
 	cmp	w2, w1
 	add	x0, x19, :lo12:.LANCHOR52
-	beq	.L1188
+	beq	.L1189
 	ldrb	w1, [x0, 7]
 	adrp	x0, .LANCHOR18
 	adrp	x20, .LANCHOR69
@@ -8518,14 +8533,14 @@ FtlGcFreeTempBlock:
 	ldrh	w2, [x20, #:lo12:.LANCHOR69]
 	mul	w1, w1, w3
 	cmp	w2, w1
-	beq	.L1189
+	beq	.L1190
 	adrp	x1, .LANCHOR169
 	adrp	x0, .LC1
 	mov	w2, 164
 	add	x1, x1, :lo12:.LANCHOR169
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1189:
+.L1190:
 	add	x0, x19, :lo12:.LANCHOR52
 	adrp	x22, .LANCHOR41
 	ldrh	w3, [x21, #:lo12:.LANCHOR18]
@@ -8544,19 +8559,19 @@ FtlGcFreeTempBlock:
 	ldr	w2, [x1, #:lo12:.LANCHOR83]
 	add	w0, w0, w2
 	str	w0, [x1, #:lo12:.LANCHOR83]
-.L1190:
+.L1191:
 	ldrh	w0, [x26]
 	cmp	w0, w21
-	bhi	.L1194
+	bhi	.L1195
 	mov	w0, -1
 	bl	decrement_vpc_count
 	ldrh	w0, [x19, #:lo12:.LANCHOR52]
 	ldr	x2, [x22, #:lo12:.LANCHOR41]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1195
+	cbz	w1, .L1196
 	bl	INSERT_DATA_LIST
-.L1196:
+.L1197:
 	adrp	x0, .LANCHOR67
 	mov	w21, -1
 	strh	wzr, [x20, #:lo12:.LANCHOR69]
@@ -8572,11 +8587,11 @@ FtlGcFreeTempBlock:
 	ldrh	w0, [x0, #:lo12:.LANCHOR170]
 	add	w0, w0, w0, lsl 1
 	cmp	w1, w0, lsr 2
-	ble	.L1188
+	ble	.L1189
 	adrp	x0, .LANCHOR99
 	mov	w1, 20
 	strh	w1, [x0, #:lo12:.LANCHOR99]
-.L1188:
+.L1189:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -8585,7 +8600,7 @@ FtlGcFreeTempBlock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1194:
+.L1195:
 	mov	w24, 12
 	ldr	x28, [x27, #:lo12:.LANCHOR70]
 	ldr	w1, [x25]
@@ -8593,18 +8608,18 @@ FtlGcFreeTempBlock:
 	add	x23, x28, x24
 	ldr	w0, [x23, 8]
 	cmp	w0, w1
-	bcc	.L1191
-.L1199:
+	bcc	.L1192
+.L1200:
 	ldrh	w0, [x19, #:lo12:.LANCHOR52]
-	b	.L1200
-.L1191:
+	b	.L1201
+.L1192:
 	add	x1, x29, 108
 	mov	w2, 0
 	bl	log2phys
 	ldr	w0, [x28, x24]
 	ldr	w1, [x29, 108]
 	cmp	w0, w1
-	bne	.L1193
+	bne	.L1194
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	mov	w24, w0
@@ -8613,20 +8628,20 @@ FtlGcFreeTempBlock:
 	add	x1, x23, 4
 	bl	log2phys
 	mov	w0, w24
-.L1200:
+.L1201:
 	bl	decrement_vpc_count
-	b	.L1192
-.L1193:
+	b	.L1193
+.L1194:
 	ldr	w0, [x23, 4]
 	cmp	w1, w0
-	bne	.L1199
-.L1192:
+	bne	.L1200
+.L1193:
 	add	w21, w21, 1
 	and	w21, w21, 65535
-	b	.L1190
-.L1195:
+	b	.L1191
+.L1196:
 	bl	INSERT_FREE_LIST
-	b	.L1196
+	b	.L1197
 	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
 	.section	.text.FtlGcPageRecovery,"ax",@progbits
 	.align	2
@@ -8645,7 +8660,7 @@ FtlGcPageRecovery:
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR18]
 	cmp	w1, w0
-	bcc	.L1201
+	bcc	.L1202
 	adrp	x0, .LANCHOR128
 	add	x0, x0, :lo12:.LANCHOR128
 	bl	FtlMapBlkWriteDump_data
@@ -8653,7 +8668,7 @@ FtlGcPageRecovery:
 	bl	FtlGcFreeTempBlock
 	adrp	x0, .LANCHOR132
 	str	wzr, [x0, #:lo12:.LANCHOR132]
-.L1201:
+.L1202:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -8705,44 +8720,44 @@ Ftl_gc_temp_data_write_back:
 	ldr	x0, [x20, #:lo12:.LANCHOR103]
 	bl	FlashProgPages
 	mov	w11, 0
-.L1207:
+.L1208:
 	ldr	w1, [x19]
 	cmp	w11, w1
-	bcc	.L1210
+	bcc	.L1211
 	ldr	x0, [x20, #:lo12:.LANCHOR103]
 	bl	FtlGcBufFree
 	str	wzr, [x19]
 	adrp	x0, .LANCHOR52+4
 	ldrh	w0, [x0, #:lo12:.LANCHOR52+4]
-	cbnz	w0, .L1212
+	cbnz	w0, .L1213
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
 	mov	w0, 1
-.L1206:
+.L1207:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1210:
+.L1211:
 	ldr	x2, [x20, #:lo12:.LANCHOR103]
 	ubfiz	x0, x11, 5, 16
 	add	x1, x2, x0
 	ldr	w2, [x2, x0]
 	ldr	x3, [x1, 16]
 	cmn	w2, #1
-	bne	.L1208
-.L1214:
+	bne	.L1209
+.L1215:
 	ldr	w1, [x1, 4]
 	ldr	w0, [x3, 12]
 	bl	FtlGcUpdatePage
 	add	w11, w11, 1
 	and	w11, w11, 65535
-	b	.L1207
-.L1208:
+	b	.L1208
+.L1209:
 	ldr	w2, [x3, 8]
-	b	.L1214
-.L1212:
+	b	.L1215
+.L1213:
 	mov	w0, 0
-	b	.L1206
+	b	.L1207
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
 	.section	.text.Ftl_get_new_temp_ppa,"ax",@progbits
 	.align	2
@@ -8757,11 +8772,11 @@ Ftl_get_new_temp_ppa:
 	mov	x19, x0
 	ldrh	w3, [x0, #:lo12:.LANCHOR52]
 	cmp	w3, w2
-	beq	.L1216
+	beq	.L1217
 	add	x1, x0, :lo12:.LANCHOR52
 	ldrh	w0, [x1, 4]
-	cbnz	w0, .L1217
-.L1216:
+	cbnz	w0, .L1218
+.L1217:
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
 	add	x0, x19, :lo12:.LANCHOR52
@@ -8775,7 +8790,7 @@ Ftl_get_new_temp_ppa:
 	mov	w0, 0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1217:
+.L1218:
 	add	x0, x19, :lo12:.LANCHOR52
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -8795,69 +8810,69 @@ rk_ftl_garbage_collect:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w1, .L1276
+	cbnz	w1, .L1277
 	adrp	x1, .LANCHOR43
 	ldrh	w1, [x1, #:lo12:.LANCHOR43]
 	cmp	w1, 47
-	bls	.L1276
+	bls	.L1277
 	adrp	x1, .LANCHOR72
 	mov	w4, 65535
 	ldrh	w3, [x1, #:lo12:.LANCHOR72]
 	cmp	w3, w4
-	beq	.L1221
+	beq	.L1222
 	adrp	x2, .LANCHOR71
 	ldrh	w5, [x2, #:lo12:.LANCHOR71]
 	cmp	w5, w4
-	bne	.L1221
+	bne	.L1222
 	strh	w3, [x2, #:lo12:.LANCHOR71]
 	mov	w2, -1
 	strh	w2, [x1, #:lo12:.LANCHOR72]
-.L1221:
-	cbnz	w0, .L1277
+.L1222:
+	cbnz	w0, .L1278
 	adrp	x1, .LANCHOR47
 	ldrh	w1, [x1, #:lo12:.LANCHOR47]
 	cmp	w1, 24
-	bhi	.L1278
+	bhi	.L1279
 	adrp	x2, .LANCHOR18
 	cmp	w1, 16
 	ldrh	w20, [x2, #:lo12:.LANCHOR18]
-	bls	.L1224
+	bls	.L1225
 	lsr	w20, w20, 5
-.L1223:
+.L1224:
 	adrp	x2, .LANCHOR99
 	ldrh	w3, [x2, #:lo12:.LANCHOR99]
 	cmp	w3, w1
 	mov	x3, x2
-	bcs	.L1227
+	bcs	.L1228
 	adrp	x1, .LANCHOR52
 	mov	w4, 65535
 	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	cmp	w1, w4
-	bne	.L1228
+	bne	.L1229
 	adrp	x4, .LANCHOR71
 	ldrh	w4, [x4, #:lo12:.LANCHOR71]
 	cmp	w4, w1
-	bne	.L1228
+	bne	.L1229
 	adrp	x0, .LANCHOR171
 	ldrh	w0, [x0, #:lo12:.LANCHOR171]
-	cbnz	w0, .L1229
+	cbnz	w0, .L1230
 	adrp	x1, .LANCHOR151
 	adrp	x4, .LANCHOR58
 	ldr	w1, [x1, #:lo12:.LANCHOR151]
 	ldr	w4, [x4, #:lo12:.LANCHOR58]
 	add	w1, w1, w1, lsl 1
 	cmp	w4, w1, lsr 2
-	bcs	.L1230
-.L1229:
+	bcs	.L1231
+.L1230:
 	adrp	x1, .LANCHOR170
 	ldrh	w1, [x1, #:lo12:.LANCHOR170]
 	add	w1, w1, w1, lsl 1
 	asr	w1, w1, 2
 	strh	w1, [x3, #:lo12:.LANCHOR99]
-.L1231:
+.L1232:
 	adrp	x1, .LANCHOR94
 	str	wzr, [x1, #:lo12:.LANCHOR94]
-.L1219:
+.L1220:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -8865,75 +8880,75 @@ rk_ftl_garbage_collect:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1224:
+.L1225:
 	cmp	w1, 12
-	bls	.L1225
+	bls	.L1226
 	lsr	w20, w20, 4
-	b	.L1223
-.L1225:
+	b	.L1224
+.L1226:
 	cmp	w1, 8
-	bls	.L1223
+	bls	.L1224
 	lsr	w20, w20, 2
-	b	.L1223
-.L1278:
+	b	.L1224
+.L1279:
 	mov	w20, 1
-	b	.L1223
-.L1230:
+	b	.L1224
+.L1231:
 	mov	w1, 18
 	strh	w1, [x2, #:lo12:.LANCHOR99]
-	b	.L1231
-.L1228:
+	b	.L1232
+.L1229:
 	adrp	x1, .LANCHOR170
 	ldrh	w1, [x1, #:lo12:.LANCHOR170]
 	add	w1, w1, w1, lsl 1
 	asr	w1, w1, 2
 	strh	w1, [x3, #:lo12:.LANCHOR99]
-.L1227:
+.L1228:
 	adrp	x1, .LANCHOR73
 	ldrh	w1, [x1, #:lo12:.LANCHOR73]
-	cbz	w1, .L1222
+	cbz	w1, .L1223
 	add	w20, w20, 32
 	and	w20, w20, 65535
-.L1222:
+.L1223:
 	adrp	x19, .LANCHOR144
 	str	w0, [x29, 152]
 	mov	w0, 65535
 	ldrh	w2, [x19, #:lo12:.LANCHOR144]
 	cmp	w2, w0
-	bne	.L1234
+	bne	.L1235
 	adrp	x0, .LANCHOR71
 	ldrh	w1, [x0, #:lo12:.LANCHOR71]
 	cmp	w1, w2
-	beq	.L1235
+	beq	.L1236
 	adrp	x2, .LANCHOR41
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR41]
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L1236
+	cbnz	w1, .L1237
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR71]
-.L1236:
+.L1237:
 	ldrh	w1, [x0, #:lo12:.LANCHOR71]
 	strh	w1, [x19, #:lo12:.LANCHOR144]
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR71]
-.L1235:
+.L1236:
 	add	x0, x19, :lo12:.LANCHOR144
 	mov	w1, 65535
 	strb	wzr, [x0, 8]
 	ldrh	w0, [x19, #:lo12:.LANCHOR144]
 	cmp	w0, w1
-	beq	.L1234
+	beq	.L1235
 	bl	IsBlkInGcList
-	cbz	w0, .L1238
+	cbz	w0, .L1239
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR144]
-.L1238:
+.L1239:
 	ldrh	w1, [x19, #:lo12:.LANCHOR144]
 	mov	w0, 65535
 	add	x22, x19, :lo12:.LANCHOR144
 	cmp	w1, w0
-	beq	.L1234
+	beq	.L1235
 	mov	x0, x22
 	bl	make_superblock
 	adrp	x0, .LANCHOR172
@@ -8946,37 +8961,37 @@ rk_ftl_garbage_collect:
 	ldrh	w1, [x0, x1, lsl 1]
 	adrp	x0, .LANCHOR173
 	strh	w1, [x0, #:lo12:.LANCHOR173]
-.L1234:
+.L1235:
 	adrp	x1, .LANCHOR50
 	ldrh	w0, [x19, #:lo12:.LANCHOR144]
 	str	x1, [x29, 128]
 	ldrh	w2, [x1, #:lo12:.LANCHOR50]
 	cmp	w2, w0
-	beq	.L1239
+	beq	.L1240
 	adrp	x1, .LANCHOR51
 	ldrh	w1, [x1, #:lo12:.LANCHOR51]
 	cmp	w1, w0
-	beq	.L1239
+	beq	.L1240
 	adrp	x1, .LANCHOR52
 	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bne	.L1240
-.L1239:
+	bne	.L1241
+.L1240:
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR144]
-.L1240:
+.L1241:
 	adrp	x25, .LANCHOR101
 	add	x26, x25, :lo12:.LANCHOR101
-.L1274:
+.L1275:
 	ldrh	w1, [x19, #:lo12:.LANCHOR144]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1241
+	bne	.L1242
 	adrp	x0, .LANCHOR94
 	adrp	x22, .LANCHOR18
 	add	x22, x22, :lo12:.LANCHOR18
 	str	wzr, [x0, #:lo12:.LANCHOR94]
-.L1242:
+.L1243:
 	ldrh	w5, [x25, #:lo12:.LANCHOR101]
 	add	x7, x25, :lo12:.LANCHOR101
 	mov	w0, w5
@@ -8985,21 +9000,21 @@ rk_ftl_garbage_collect:
 	strh	w6, [x19, #:lo12:.LANCHOR144]
 	mov	w0, 65535
 	cmp	w6, w0
-	bne	.L1243
+	bne	.L1244
 	strh	wzr, [x7]
 	mov	w0, 8
-	b	.L1219
-.L1277:
+	b	.L1220
+.L1278:
 	mov	w20, 1
-	b	.L1222
-.L1243:
+	b	.L1223
+.L1244:
 	mov	w0, w6
 	bl	IsBlkInGcList
 	add	w5, w5, 1
-	cbz	w0, .L1244
+	cbz	w0, .L1245
 	strh	w5, [x25, #:lo12:.LANCHOR101]
-	b	.L1242
-.L1244:
+	b	.L1243
+.L1245:
 	adrp	x23, .LANCHOR41
 	adrp	x4, .LANCHOR2
 	ldrh	w0, [x22]
@@ -9011,77 +9026,77 @@ rk_ftl_garbage_collect:
 	ldrh	w3, [x2, x1]
 	mul	w0, w0, w4
 	cmp	w3, w0, asr 1
-	bgt	.L1246
+	bgt	.L1247
 	cmp	w5, 48
-	bls	.L1247
+	bls	.L1248
 	cmp	w3, 8
-	bls	.L1247
+	bls	.L1248
 	adrp	x3, .LANCHOR67
 	ldrh	w3, [x3, #:lo12:.LANCHOR67]
 	cmp	w3, 35
-	bhi	.L1247
-.L1246:
-	strh	wzr, [x26]
+	bhi	.L1248
 .L1247:
+	strh	wzr, [x26]
+.L1248:
 	ldrh	w1, [x2, x1]
 	cmp	w0, w1
-	bgt	.L1248
+	bgt	.L1249
 	ldrh	w0, [x26]
 	cmp	w0, 3
-	bhi	.L1248
+	bhi	.L1249
 	mov	w0, -1
 	strh	wzr, [x26]
 	strh	w0, [x19, #:lo12:.LANCHOR144]
-.L1307:
+.L1308:
 	adrp	x0, .LANCHOR171
 	ldrh	w0, [x0, #:lo12:.LANCHOR171]
-	b	.L1219
-.L1248:
-	cbnz	w1, .L1249
+	b	.L1220
+.L1249:
+	cbnz	w1, .L1250
 	mov	w0, -1
 	bl	decrement_vpc_count
 	ldrh	w0, [x26]
 	add	w0, w0, 1
 	strh	w0, [x26]
-	b	.L1242
-.L1249:
+	b	.L1243
+.L1250:
 	add	x0, x19, :lo12:.LANCHOR144
 	strb	wzr, [x0, 8]
 	ldr	x0, [x29, 128]
 	ldrh	w0, [x0, #:lo12:.LANCHOR50]
 	cmp	w0, w6
-	bne	.L1250
+	bne	.L1251
 	adrp	x1, .LANCHOR174
 	adrp	x0, .LC1
 	mov	w2, 717
 	add	x1, x1, :lo12:.LANCHOR174
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1250:
+.L1251:
 	adrp	x0, .LANCHOR51
 	ldrh	w1, [x19, #:lo12:.LANCHOR144]
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w1, w0
-	bne	.L1251
+	bne	.L1252
 	adrp	x1, .LANCHOR174
 	adrp	x0, .LC1
 	mov	w2, 718
 	add	x1, x1, :lo12:.LANCHOR174
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1251:
+.L1252:
 	adrp	x0, .LANCHOR52
 	ldrh	w1, [x19, #:lo12:.LANCHOR144]
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bne	.L1252
+	bne	.L1253
 	adrp	x1, .LANCHOR174
 	adrp	x0, .LC1
 	mov	w2, 719
 	add	x1, x1, :lo12:.LANCHOR174
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1252:
+.L1253:
 	add	x22, x19, :lo12:.LANCHOR144
 	mov	x0, x22
 	bl	make_superblock
@@ -9094,7 +9109,7 @@ rk_ftl_garbage_collect:
 	strh	wzr, [x22, 2]
 	strh	w1, [x0, #:lo12:.LANCHOR173]
 	strb	wzr, [x22, 6]
-.L1241:
+.L1242:
 	mov	w0, 1
 	str	w0, [x21, #:lo12:.LANCHOR93]
 	adrp	x0, .LANCHOR18
@@ -9102,7 +9117,7 @@ rk_ftl_garbage_collect:
 	ldrh	w1, [x0, #:lo12:.LANCHOR18]
 	ldr	w0, [x29, 152]
 	str	w1, [x29, 156]
-	cbz	w0, .L1253
+	cbz	w0, .L1254
 	adrp	x0, .LANCHOR2
 	ldrh	w2, [x19, #:lo12:.LANCHOR144]
 	ldrh	w0, [x0, #:lo12:.LANCHOR2]
@@ -9115,23 +9130,23 @@ rk_ftl_garbage_collect:
 	sdiv	w0, w0, w1
 	add	w20, w20, w0
 	and	w20, w20, 65535
-.L1253:
+.L1254:
 	add	x0, x19, :lo12:.LANCHOR144
 	ldr	w2, [x29, 156]
 	ldrh	w0, [x0, 2]
 	add	w1, w0, w20
 	cmp	w1, w2
-	ble	.L1254
+	ble	.L1255
 	sub	w20, w2, w0
 	and	w20, w20, 65535
-.L1254:
+.L1255:
 	adrp	x0, .LANCHOR172
 	mov	w28, 0
 	add	x0, x0, :lo12:.LANCHOR172
 	str	x0, [x29, 144]
-.L1255:
+.L1256:
 	cmp	w20, w28, uxth
-	bls	.L1263
+	bls	.L1264
 	add	x1, x19, :lo12:.LANCHOR144
 	adrp	x0, .LANCHOR2
 	adrp	x23, .LANCHOR65
@@ -9143,24 +9158,24 @@ rk_ftl_garbage_collect:
 	ldr	x0, [x23, #:lo12:.LANCHOR65]
 	mov	w6, 65535
 	add	w4, w4, w28
-	b	.L1264
-.L1257:
+	b	.L1265
+.L1258:
 	ldrh	w3, [x1]
 	cmp	w3, w6
-	beq	.L1256
+	beq	.L1257
 	ubfiz	x5, x22, 5, 16
 	add	w22, w22, 1
 	add	x5, x0, x5
 	and	w22, w22, 65535
 	orr	w3, w4, w3, lsl 10
 	str	w3, [x5, 4]
-.L1256:
+.L1257:
 	add	w2, w2, 1
 	add	x1, x1, 2
 	and	w2, w2, 65535
-.L1264:
+.L1265:
 	cmp	w2, w7
-	bne	.L1257
+	bne	.L1258
 	add	x1, x19, :lo12:.LANCHOR144
 	adrp	x24, .LANCHOR61
 	add	x24, x24, :lo12:.LANCHOR61
@@ -9170,26 +9185,26 @@ rk_ftl_garbage_collect:
 	ubfiz	x0, x22, 5, 16
 	mov	x22, 0
 	str	x0, [x29, 136]
-.L1258:
+.L1259:
 	ldr	x0, [x29, 136]
 	cmp	x22, x0
-	bne	.L1262
+	bne	.L1263
 	add	w28, w28, 1
-	b	.L1255
-.L1262:
+	b	.L1256
+.L1263:
 	ldr	x0, [x23, #:lo12:.LANCHOR65]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	beq	.L1259
+	beq	.L1260
 	ldr	x27, [x1, 16]
 	mov	w0, 61589
 	ldrh	w1, [x27]
 	cmp	w1, w0
-	bne	.L1259
+	bne	.L1260
 	ldr	w4, [x27, 8]
 	cmn	w4, #1
-	bne	.L1260
+	bne	.L1261
 	str	w4, [x29, 112]
 	mov	w2, 753
 	adrp	x1, .LANCHOR174
@@ -9198,7 +9213,7 @@ rk_ftl_garbage_collect:
 	add	x0, x0, :lo12:.LC1
 	bl	printf
 	ldr	w4, [x29, 112]
-.L1260:
+.L1261:
 	mov	w2, 0
 	add	x1, x29, 168
 	mov	w0, w4
@@ -9208,7 +9223,7 @@ rk_ftl_garbage_collect:
 	add	x0, x0, x22
 	ldr	w2, [x0, 4]
 	cmp	w2, w1
-	bne	.L1259
+	bne	.L1260
 	ldr	x1, [x29, 144]
 	adrp	x4, .LANCHOR103
 	ldr	x2, [x29, 144]
@@ -9250,22 +9265,22 @@ rk_ftl_garbage_collect:
 	ldrb	w1, [x11, 7]
 	ldr	w0, [x24]
 	cmp	w1, w0
-	beq	.L1261
+	beq	.L1262
 	ldrh	w0, [x11, 4]
-	cbnz	w0, .L1259
-.L1261:
+	cbnz	w0, .L1260
+.L1262:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	w0, .L1259
+	cbz	w0, .L1260
 	add	x0, x19, :lo12:.LANCHOR144
 	mov	w1, -1
 	str	wzr, [x21, #:lo12:.LANCHOR93]
 	strh	w1, [x19, #:lo12:.LANCHOR144]
 	strh	wzr, [x0, 2]
-	b	.L1307
-.L1259:
+	b	.L1308
+.L1260:
 	add	x22, x22, 32
-	b	.L1258
-.L1263:
+	b	.L1259
+.L1264:
 	add	x1, x19, :lo12:.LANCHOR144
 	ldrh	w0, [x1, 2]
 	add	w20, w20, w0
@@ -9273,25 +9288,25 @@ rk_ftl_garbage_collect:
 	and	w20, w20, 65535
 	strh	w20, [x1, 2]
 	cmp	w0, w20
-	bhi	.L1265
+	bhi	.L1266
 	adrp	x0, .LANCHOR61
 	ldr	w0, [x0, #:lo12:.LANCHOR61]
-	cbz	w0, .L1266
+	cbz	w0, .L1267
 	bl	Ftl_gc_temp_data_write_back
-	cbz	w0, .L1266
+	cbz	w0, .L1267
 	str	wzr, [x21, #:lo12:.LANCHOR93]
-	b	.L1307
-.L1266:
+	b	.L1308
+.L1267:
 	adrp	x0, .LANCHOR172
 	ldrh	w0, [x0, #:lo12:.LANCHOR172]
-	cbnz	w0, .L1267
+	cbnz	w0, .L1268
 	ldrh	w1, [x19, #:lo12:.LANCHOR144]
 	adrp	x20, .LANCHOR41
 	add	x0, x19, :lo12:.LANCHOR144
 	ldr	x3, [x20, #:lo12:.LANCHOR41]
 	ubfiz	x2, x1, 1, 16
 	ldrh	w4, [x3, x2]
-	cbz	w4, .L1267
+	cbz	w4, .L1268
 	adrp	x2, .LANCHOR173
 	adrp	x22, .LANCHOR151
 	add	x23, x22, :lo12:.LANCHOR151
@@ -9302,31 +9317,31 @@ rk_ftl_garbage_collect:
 	adrp	x0, .LC42
 	add	x0, x0, :lo12:.LC42
 	bl	printf
-.L1268:
+.L1269:
 	ldr	w0, [x23]
 	cmp	w24, w0
-	bcs	.L1270
+	bcs	.L1271
 	mov	w2, 0
 	add	x1, x29, 172
 	mov	w0, w24
 	bl	log2phys
 	ldr	w3, [x29, 172]
 	cmn	w3, #1
-	beq	.L1269
+	beq	.L1270
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
 	ldrh	w1, [x19, #:lo12:.LANCHOR144]
 	cmp	w1, w0, uxth
-	bne	.L1269
+	bne	.L1270
 	adrp	x0, .LC43
 	mov	w2, w3
 	mov	w1, w24
 	add	x0, x0, :lo12:.LC43
 	bl	printf
-.L1270:
+.L1271:
 	ldr	w0, [x22, #:lo12:.LANCHOR151]
 	cmp	w24, w0
-	bcc	.L1267
+	bcc	.L1268
 	ldrh	w1, [x19, #:lo12:.LANCHOR144]
 	ldr	x0, [x20, #:lo12:.LANCHOR41]
 	strh	wzr, [x0, x1, lsl 1]
@@ -9334,27 +9349,27 @@ rk_ftl_garbage_collect:
 	bl	update_vpc_list
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1267:
+.L1268:
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR144]
-.L1265:
+.L1266:
 	adrp	x0, .LANCHOR47
 	str	wzr, [x21, #:lo12:.LANCHOR93]
 	ldrh	w0, [x0, #:lo12:.LANCHOR47]
 	cmp	w0, 2
-	bhi	.L1273
+	bhi	.L1274
 	ldr	x0, [x29, 120]
 	ldrh	w20, [x0, #:lo12:.LANCHOR18]
-	b	.L1274
-.L1269:
+	b	.L1275
+.L1270:
 	add	w24, w24, 1
-	b	.L1268
-.L1273:
+	b	.L1269
+.L1274:
 	add	w0, w0, 1
-	b	.L1219
-.L1276:
+	b	.L1220
+.L1277:
 	mov	w0, 0
-	b	.L1219
+	b	.L1220
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
 	.section	.text.FtlRead,"ax",@progbits
 	.align	2
@@ -9373,13 +9388,13 @@ FtlRead:
 	mov	w27, w1
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
-	bne	.L1309
+	bne	.L1310
 	mov	x2, x3
 	mov	w1, w24
 	add	w0, w27, 256
 	bl	FtlVendorPartRead
 	mov	w19, w0
-.L1308:
+.L1309:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9388,21 +9403,21 @@ FtlRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1309:
+.L1310:
 	adrp	x0, .LANCHOR33
 	ldr	w0, [x0, #:lo12:.LANCHOR33]
 	cmp	w1, w0
-	bcs	.L1332
+	bcs	.L1333
 	cmp	w2, w0
-	bhi	.L1332
+	bhi	.L1333
 	add	w1, w1, w2
 	str	w1, [x29, 136]
 	cmp	w0, w1
-	bcc	.L1332
+	bcc	.L1333
 	adrp	x0, .LANCHOR165
 	ldr	w19, [x0, #:lo12:.LANCHOR165]
 	cmn	w19, #1
-	beq	.L1308
+	beq	.L1309
 	adrp	x21, .LANCHOR11
 	adrp	x25, .LANCHOR134
 	add	x25, x25, :lo12:.LANCHOR134
@@ -9430,47 +9445,47 @@ FtlRead:
 	ldr	w0, [x1, #:lo12:.LANCHOR88]
 	add	w0, w0, w2
 	str	w0, [x1, #:lo12:.LANCHOR88]
-.L1311:
+.L1312:
 	ldr	w0, [x29, 156]
-	cbnz	w0, .L1328
+	cbnz	w0, .L1329
 	adrp	x0, .LANCHOR73
 	ldrh	w0, [x0, #:lo12:.LANCHOR73]
-	cbnz	w0, .L1329
+	cbnz	w0, .L1330
 	adrp	x0, .LANCHOR47
 	ldrh	w0, [x0, #:lo12:.LANCHOR47]
 	cmp	w0, 31
-	bhi	.L1308
-.L1329:
+	bhi	.L1309
+.L1330:
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-	b	.L1308
-.L1328:
+	b	.L1309
+.L1329:
 	add	x1, x29, 172
 	mov	w2, 0
 	mov	w0, w20
 	bl	log2phys
 	ldr	w1, [x29, 172]
 	cmn	w1, #1
-	bne	.L1312
+	bne	.L1313
 	add	x6, x21, :lo12:.LANCHOR11
 	mov	w5, 0
-.L1313:
+.L1314:
 	ldrh	w0, [x6]
 	cmp	w5, w0
-	bcc	.L1315
-.L1316:
+	bcc	.L1316
+.L1317:
 	ldr	w0, [x29, 156]
 	add	w20, w20, 1
 	subs	w0, w0, #1
 	str	w0, [x29, 156]
-	beq	.L1320
+	beq	.L1321
 	adrp	x0, .LANCHOR2
 	ldrh	w0, [x0, #:lo12:.LANCHOR2]
 	cmp	w26, w0, lsl 2
-	bne	.L1311
-.L1320:
-	cbz	w26, .L1311
+	bne	.L1312
+.L1321:
+	cbz	w26, .L1312
 	ldr	x0, [x28, #:lo12:.LANCHOR102]
 	mov	w1, w26
 	mov	w2, 0
@@ -9489,57 +9504,57 @@ FtlRead:
 	str	x0, [x29, 104]
 	add	x0, x21, :lo12:.LANCHOR11
 	str	x0, [x29, 96]
-.L1327:
+.L1328:
 	ldr	x0, [x28, #:lo12:.LANCHOR102]
 	ldr	w2, [x29, 152]
 	add	x0, x0, x26
 	ldr	w1, [x0, 24]
 	cmp	w2, w1
-	bne	.L1322
+	bne	.L1323
 	ldr	x1, [x0, 8]
 	adrp	x0, .LANCHOR108
 	ldr	x0, [x0, #:lo12:.LANCHOR108]
 	cmp	x1, x0
-	bne	.L1323
+	bne	.L1324
 	ldr	x0, [x29, 128]
 	ldr	w2, [x29, 120]
 	add	x1, x1, x0
 	mov	x0, x22
-.L1343:
+.L1344:
 	bl	ftl_memcpy
-.L1323:
+.L1324:
 	ldr	x0, [x28, #:lo12:.LANCHOR102]
 	add	x0, x0, x26
 	ldr	x1, [x0, 16]
 	ldr	w2, [x0, 24]
 	ldr	w1, [x1, 8]
 	cmp	w2, w1
-	beq	.L1324
+	beq	.L1325
 	ldr	w1, [x25, 72]
 	add	w1, w1, 1
 	str	w1, [x25, 72]
-.L1324:
+.L1325:
 	ldr	w1, [x0]
 	cmn	w1, #1
-	bne	.L1325
+	bne	.L1326
 	ldr	w0, [x25, 72]
 	mov	w19, w1
 	add	w0, w0, 1
 	str	w0, [x25, 72]
-.L1326:
+.L1327:
 	ldr	x0, [x29, 104]
 	add	x26, x26, 32
 	cmp	x0, x26
-	bne	.L1327
+	bne	.L1328
 	mov	w26, 0
-	b	.L1311
-.L1315:
+	b	.L1312
+.L1316:
 	madd	w0, w20, w0, w5
 	cmp	w27, w0
-	bhi	.L1314
+	bhi	.L1315
 	ldr	w1, [x29, 136]
 	cmp	w1, w0
-	bls	.L1314
+	bls	.L1315
 	sub	w0, w0, w27
 	str	x6, [x29, 120]
 	lsl	w0, w0, 9
@@ -9550,17 +9565,17 @@ FtlRead:
 	bl	ftl_memset
 	ldr	w5, [x29, 128]
 	ldr	x6, [x29, 120]
-.L1314:
+.L1315:
 	add	w5, w5, 1
-	b	.L1313
-.L1312:
+	b	.L1314
+.L1313:
 	ldr	x2, [x28, #:lo12:.LANCHOR102]
 	ubfiz	x0, x26, 5, 32
 	add	x0, x2, x0
 	str	w1, [x0, 4]
 	ldr	w1, [x29, 152]
 	cmp	w20, w1
-	bne	.L1317
+	bne	.L1318
 	adrp	x1, .LANCHOR108
 	ldr	x1, [x1, #:lo12:.LANCHOR108]
 	str	x1, [x0, 8]
@@ -9573,9 +9588,9 @@ FtlRead:
 	csel	w2, w24, w2, ls
 	str	w2, [x29, 144]
 	cmp	w1, w2
-	bne	.L1318
+	bne	.L1319
 	str	x22, [x0, 8]
-.L1318:
+.L1319:
 	adrp	x1, .LANCHOR23
 	adrp	x2, .LANCHOR114
 	str	w20, [x0, 24]
@@ -9586,10 +9601,10 @@ FtlRead:
 	and	x1, x1, 4294967292
 	add	x1, x2, x1
 	str	x1, [x0, 16]
-	b	.L1316
-.L1317:
+	b	.L1317
+.L1318:
 	cmp	w20, w23
-	bne	.L1319
+	bne	.L1320
 	ldrh	w2, [x21, #:lo12:.LANCHOR11]
 	adrp	x1, .LANCHOR109
 	ldr	w3, [x29, 136]
@@ -9599,25 +9614,25 @@ FtlRead:
 	sub	w3, w3, w1
 	str	w3, [x29, 140]
 	cmp	w2, w3
-	bne	.L1318
-.L1342:
+	bne	.L1319
+.L1343:
 	sub	w1, w1, w27
 	lsl	w1, w1, 9
 	add	x1, x22, x1
 	str	x1, [x0, 8]
-	b	.L1318
-.L1319:
+	b	.L1319
+.L1320:
 	ldrh	w1, [x21, #:lo12:.LANCHOR11]
 	mul	w1, w1, w20
-	b	.L1342
-.L1322:
+	b	.L1343
+.L1323:
 	cmp	w23, w1
-	bne	.L1323
+	bne	.L1324
 	ldr	x1, [x0, 8]
 	adrp	x0, .LANCHOR109
 	ldr	x0, [x0, #:lo12:.LANCHOR109]
 	cmp	x1, x0
-	bne	.L1323
+	bne	.L1324
 	ldr	x0, [x29, 96]
 	ldr	w2, [x29, 116]
 	ldrh	w0, [x0]
@@ -9625,18 +9640,18 @@ FtlRead:
 	sub	w0, w0, w27
 	lsl	w0, w0, 9
 	add	x0, x22, x0
-	b	.L1343
-.L1325:
+	b	.L1344
+.L1326:
 	cmp	w1, 256
-	bne	.L1326
+	bne	.L1327
 	ldr	w0, [x0, 4]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-	b	.L1326
-.L1332:
+	b	.L1327
+.L1333:
 	mov	w19, -1
-	b	.L1308
+	b	.L1309
 	.size	FtlRead, .-FtlRead
 	.section	.text.sftl_read,"ax",@progbits
 	.align	2
@@ -9666,12 +9681,12 @@ FtlWrite:
 	mov	x27, x3
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
-	bne	.L1346
+	bne	.L1347
 	mov	x2, x3
 	mov	w1, w26
 	add	w0, w22, 256
 	bl	FtlVendorPartWrite
-.L1345:
+.L1346:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9679,21 +9694,21 @@ FtlWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 224
 	ret
-.L1346:
+.L1347:
 	adrp	x0, .LANCHOR33
 	ldr	w0, [x0, #:lo12:.LANCHOR33]
 	cmp	w1, w0
-	bcs	.L1380
+	bcs	.L1381
 	cmp	w2, w0
-	bhi	.L1380
+	bhi	.L1381
 	add	w1, w1, w2
 	str	w1, [x29, 136]
 	cmp	w0, w1
-	bcc	.L1380
+	bcc	.L1381
 	adrp	x0, .LANCHOR165
 	ldr	w0, [x0, #:lo12:.LANCHOR165]
 	cmn	w0, #1
-	beq	.L1345
+	beq	.L1346
 	adrp	x0, .LANCHOR175
 	mov	w1, 2048
 	add	w2, w22, w2
@@ -9719,8 +9734,8 @@ FtlWrite:
 	str	w0, [x2, #:lo12:.LANCHOR84]
 	adrp	x0, .LANCHOR50
 	add	x20, x0, :lo12:.LANCHOR50
-.L1348:
-	cbnz	w24, .L1373
+.L1349:
+	cbnz	w24, .L1374
 	ldr	w1, [x29, 140]
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
@@ -9728,11 +9743,11 @@ FtlWrite:
 	mov	x22, x0
 	ldrh	w1, [x0, #:lo12:.LANCHOR47]
 	cmp	w1, 5
-	bls	.L1374
-.L1376:
+	bls	.L1375
+.L1377:
 	mov	w0, 0
-	b	.L1345
-.L1373:
+	b	.L1346
+.L1374:
 	adrp	x0, .LANCHOR50
 	add	x0, x0, :lo12:.LANCHOR50
 	adrp	x1, .LANCHOR2
@@ -9740,19 +9755,19 @@ FtlWrite:
 	ldrb	w2, [x0, 6]
 	ldrh	w0, [x1, #:lo12:.LANCHOR2]
 	cmp	w2, w0
-	bcc	.L1349
+	bcc	.L1350
 	adrp	x1, .LANCHOR176
 	adrp	x0, .LC1
 	mov	w2, 1041
 	add	x1, x1, :lo12:.LANCHOR176
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1349:
+.L1350:
 	ldrh	w0, [x20, 4]
-	cbnz	w0, .L1350
+	cbnz	w0, .L1351
 	mov	x0, x20
 	bl	allocate_new_data_superblock
-.L1350:
+.L1351:
 	ldrb	w0, [x20, 7]
 	ldrh	w1, [x20, 4]
 	lsl	w0, w0, 2
@@ -9765,14 +9780,14 @@ FtlWrite:
 	ldr	x0, [x29, 112]
 	ldrh	w0, [x0, #:lo12:.LANCHOR2]
 	cmp	w1, w0
-	bcc	.L1351
+	bcc	.L1352
 	adrp	x1, .LANCHOR176
 	adrp	x0, .LC1
 	mov	w2, 1074
 	add	x1, x1, :lo12:.LANCHOR176
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1351:
+.L1352:
 	adrp	x0, .LANCHOR23
 	add	x0, x0, :lo12:.LANCHOR23
 	str	xzr, [x29, 168]
@@ -9780,33 +9795,33 @@ FtlWrite:
 	adrp	x0, .LANCHOR22
 	add	x0, x0, :lo12:.LANCHOR22
 	str	x0, [x29, 96]
-.L1352:
+.L1353:
 	ldr	w1, [x29, 148]
 	adrp	x28, .LANCHOR104
 	ldr	w23, [x29, 168]
 	cmp	w23, w1
-	bcc	.L1371
+	bcc	.L1372
 	mov	x23, x1
-.L1353:
+.L1354:
 	ldr	x0, [x28, #:lo12:.LANCHOR104]
 	mov	x3, x20
 	mov	w2, 0
 	mov	w1, w23
 	bl	FtlProgPages
 	cmp	w24, w23
-	bcs	.L1372
+	bcs	.L1373
 	adrp	x1, .LANCHOR176
 	adrp	x0, .LC1
 	mov	w2, 1152
 	add	x1, x1, :lo12:.LANCHOR176
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1372:
+.L1373:
 	sub	w24, w24, w23
-	b	.L1348
-.L1371:
+	b	.L1349
+.L1372:
 	ldrh	w0, [x20, 4]
-	cbz	w0, .L1353
+	cbz	w0, .L1354
 	add	x1, x29, 188
 	mov	w2, 0
 	mov	w0, w19
@@ -9836,10 +9851,10 @@ FtlWrite:
 	ldr	w0, [x29, 144]
 	cmp	w19, w25
 	ccmp	w19, w0, 4, ne
-	bne	.L1354
+	bne	.L1355
 	cmp	w19, w25
 	ldr	x0, [x29, 160]
-	bne	.L1355
+	bne	.L1356
 	ldrh	w2, [x0, #:lo12:.LANCHOR11]
 	udiv	w0, w22, w2
 	msub	w0, w0, w2, w22
@@ -9848,30 +9863,30 @@ FtlWrite:
 	cmp	w2, w26
 	csel	w0, w2, w26, ls
 	str	w0, [x29, 156]
-.L1356:
+.L1357:
 	ldr	x0, [x29, 160]
 	ldr	w1, [x29, 156]
 	ldrh	w0, [x0, #:lo12:.LANCHOR11]
 	cmp	w1, w0
 	ldr	x0, [x28, #:lo12:.LANCHOR104]
-	bne	.L1357
+	bne	.L1358
 	add	x21, x0, x21
 	cmp	w19, w25
-	bne	.L1358
+	bne	.L1359
 	str	x27, [x21, 8]
-.L1359:
+.L1360:
 	ldr	x0, [x29, 112]
 	ldrb	w1, [x20, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR2]
 	cmp	w1, w0
-	bcc	.L1368
+	bcc	.L1369
 	adrp	x1, .LANCHOR176
 	adrp	x0, .LC1
 	mov	w2, 1143
 	add	x1, x1, :lo12:.LANCHOR176
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1368:
+.L1369:
 	ldp	x1, x2, [x29, 120]
 	mov	w0, -3947
 	strh	w0, [x1, x2]
@@ -9890,34 +9905,34 @@ FtlWrite:
 	ldr	x0, [x29, 168]
 	add	x0, x0, 1
 	str	x0, [x29, 168]
-	b	.L1352
-.L1355:
+	b	.L1353
+.L1356:
 	ldrh	w2, [x0, #:lo12:.LANCHOR11]
 	ldr	w0, [x29, 136]
 	msub	w2, w19, w2, w0
 	and	w0, w2, 65535
 	stp	wzr, w0, [x29, 152]
-	b	.L1356
-.L1358:
+	b	.L1357
+.L1359:
 	ldr	w0, [x29, 156]
-.L1388:
+.L1389:
 	mul	w0, w0, w19
 	sub	w0, w0, w22
 	lsl	w0, w0, 9
 	add	x0, x27, x0
 	str	x0, [x21, 8]
-	b	.L1359
-.L1357:
+	b	.L1360
+.L1358:
 	add	x0, x0, x21
 	cmp	w19, w25
-	bne	.L1360
+	bne	.L1361
 	adrp	x1, .LANCHOR108
 	ldr	x1, [x1, #:lo12:.LANCHOR108]
-.L1387:
+.L1388:
 	str	x1, [x0, 8]
 	ldr	w0, [x29, 188]
 	cmn	w0, #1
-	beq	.L1362
+	beq	.L1363
 	str	w0, [x29, 196]
 	mov	w2, 0
 	ldr	x0, [x28, #:lo12:.LANCHOR104]
@@ -9930,7 +9945,7 @@ FtlWrite:
 	bl	FlashReadPages
 	ldr	w3, [x29, 192]
 	cmn	w3, #1
-	bne	.L1363
+	bne	.L1364
 	adrp	x0, .LANCHOR134
 	add	x0, x0, :lo12:.LANCHOR134
 	mov	w2, w19
@@ -9941,11 +9956,11 @@ FtlWrite:
 	adrp	x0, .LC44
 	add	x0, x0, :lo12:.LC44
 	bl	printf
-.L1366:
+.L1367:
 	ldr	w0, [x29, 156]
 	cmp	w19, w25
 	lsl	w2, w0, 9
-	bne	.L1367
+	bne	.L1368
 	ldr	x0, [x28, #:lo12:.LANCHOR104]
 	mov	x1, x27
 	add	x21, x0, x21
@@ -9953,17 +9968,17 @@ FtlWrite:
 	ldr	x3, [x21, 8]
 	lsl	w0, w0, 9
 	add	x0, x3, x0
-.L1389:
+.L1390:
 	bl	ftl_memcpy
-	b	.L1359
-.L1360:
+	b	.L1360
+.L1361:
 	adrp	x1, .LANCHOR109
 	ldr	x1, [x1, #:lo12:.LANCHOR109]
-	b	.L1387
-.L1363:
+	b	.L1388
+.L1364:
 	ldr	w1, [x23, 8]
 	cmp	w19, w1
-	beq	.L1365
+	beq	.L1366
 	adrp	x0, .LANCHOR134
 	add	x0, x0, :lo12:.LANCHOR134
 	ldr	w2, [x0, 72]
@@ -9973,18 +9988,18 @@ FtlWrite:
 	mov	w2, w19
 	add	x0, x0, :lo12:.LC45
 	bl	printf
-.L1365:
+.L1366:
 	ldr	w0, [x23, 8]
 	cmp	w19, w0
-	beq	.L1366
+	beq	.L1367
 	mov	w2, 1128
 	adrp	x1, .LANCHOR176
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR176
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	b	.L1366
-.L1362:
+	b	.L1367
+.L1363:
 	ldr	x0, [x28, #:lo12:.LANCHOR104]
 	ldr	x1, [x29, 96]
 	add	x0, x0, x21
@@ -9992,8 +10007,8 @@ FtlWrite:
 	mov	w1, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	b	.L1366
-.L1367:
+	b	.L1367
+.L1368:
 	ldr	x0, [x29, 160]
 	ldrh	w1, [x0, #:lo12:.LANCHOR11]
 	ldr	x0, [x28, #:lo12:.LANCHOR104]
@@ -10003,14 +10018,14 @@ FtlWrite:
 	ldr	x0, [x21, 8]
 	lsl	w1, w1, 9
 	add	x1, x27, x1
-	b	.L1389
-.L1354:
+	b	.L1390
+.L1355:
 	ldr	x0, [x28, #:lo12:.LANCHOR104]
 	add	x21, x0, x21
 	ldr	x0, [x29, 160]
 	ldrh	w0, [x0, #:lo12:.LANCHOR11]
-	b	.L1388
-.L1374:
+	b	.L1389
+.L1375:
 	adrp	x23, .LANCHOR71
 	adrp	x20, .LANCHOR100
 	adrp	x21, .LANCHOR99
@@ -10018,19 +10033,19 @@ FtlWrite:
 	add	x20, x20, :lo12:.LANCHOR100
 	add	x21, x21, :lo12:.LANCHOR99
 	mov	w19, 256
-.L1377:
+.L1378:
 	adrp	x0, .LANCHOR144
 	mov	w1, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR144]
 	cmp	w0, w1
-	bne	.L1375
+	bne	.L1376
 	ldrh	w1, [x23]
 	cmp	w1, w0
-	bne	.L1375
+	bne	.L1376
 	mov	w0, 0
 	bl	List_get_gc_head_node
 	bl	FtlGcRefreshBlock
-.L1375:
+.L1376:
 	mov	w0, 128
 	mov	w1, 1
 	strh	w0, [x20]
@@ -10042,13 +10057,13 @@ FtlWrite:
 	bl	rk_ftl_garbage_collect
 	ldrh	w0, [x22, #:lo12:.LANCHOR47]
 	cmp	w0, 2
-	bhi	.L1376
+	bhi	.L1377
 	subs	w19, w19, #1
-	bne	.L1377
-	b	.L1376
-.L1380:
+	bne	.L1378
+	b	.L1377
+.L1381:
 	mov	w0, -1
-	b	.L1345
+	b	.L1346
 	.size	FtlWrite, .-FtlWrite
 	.section	.text.sftl_gc,"ax",@progbits
 	.align	2
@@ -10090,10 +10105,10 @@ FtlLoadSysInfo:
 	ldrh	w0, [x20, #:lo12:.LANCHOR138]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L1392
-.L1403:
+	bne	.L1393
+.L1404:
 	mov	w0, -1
-.L1391:
+.L1392:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -10101,7 +10116,7 @@ FtlLoadSysInfo:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1392:
+.L1393:
 	add	x24, x20, :lo12:.LANCHOR138
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
@@ -10113,28 +10128,28 @@ FtlLoadSysInfo:
 	ldrsh	w24, [x20, #:lo12:.LANCHOR138]
 	add	x26, x26, :lo12:.LANCHOR22
 	add	x27, x27, :lo12:.LANCHOR177
-.L1394:
-	tbz	w28, #31, .L1400
+.L1395:
+	tbz	w28, #31, .L1401
 	adrp	x1, .LANCHOR177
 	adrp	x0, .LC1
-	mov	w2, 1467
+	mov	w2, 1474
 	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1399:
+.L1400:
 	adrp	x1, .LANCHOR22
 	ldrh	w0, [x21, #:lo12:.LANCHOR4]
 	ldrh	w1, [x1, #:lo12:.LANCHOR22]
 	add	x0, x0, 24
 	cmp	x1, x0, lsl 1
-	bcs	.L1402
+	bcs	.L1403
 	adrp	x1, .LANCHOR177
 	adrp	x0, .LC1
-	mov	w2, 1469
+	mov	w2, 1476
 	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1402:
+.L1403:
 	add	x24, x19, :lo12:.LANCHOR137
 	adrp	x19, .LANCHOR38
 	add	x22, x19, :lo12:.LANCHOR38
@@ -10152,7 +10167,7 @@ FtlLoadSysInfo:
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1403
+	bne	.L1404
 	add	x20, x20, :lo12:.LANCHOR138
 	adrp	x0, .LANCHOR9
 	ldrh	w1, [x22, 8]
@@ -10160,7 +10175,7 @@ FtlLoadSysInfo:
 	ldrh	w0, [x0, #:lo12:.LANCHOR9]
 	strh	w1, [x20, 6]
 	cmp	w2, w0
-	bne	.L1403
+	bne	.L1404
 	adrp	x0, .LANCHOR178
 	adrp	x2, .LANCHOR151
 	adrp	x3, .LANCHOR2
@@ -10185,14 +10200,14 @@ FtlLoadSysInfo:
 	udiv	w0, w0, w3
 	adrp	x3, .LANCHOR170
 	strh	w0, [x3, #:lo12:.LANCHOR170]
-	bls	.L1404
+	bls	.L1405
 	adrp	x1, .LANCHOR177
 	adrp	x0, .LC1
-	mov	w2, 1491
+	mov	w2, 1498
 	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1404:
+.L1405:
 	add	x4, x19, :lo12:.LANCHOR38
 	adrp	x0, .LANCHOR50
 	add	x2, x0, :lo12:.LANCHOR50
@@ -10257,47 +10272,47 @@ FtlLoadSysInfo:
 	adrp	x1, .LANCHOR81
 	ldr	w4, [x1, #:lo12:.LANCHOR81]
 	cmp	w3, w4
-	bls	.L1405
+	bls	.L1406
 	str	w3, [x1, #:lo12:.LANCHOR81]
-.L1405:
+.L1406:
 	add	x19, x19, :lo12:.LANCHOR38
 	adrp	x1, .LANCHOR82
 	ldr	w3, [x1, #:lo12:.LANCHOR82]
 	ldr	w2, [x19, 36]
 	cmp	w2, w3
-	bls	.L1406
+	bls	.L1407
 	str	w2, [x1, #:lo12:.LANCHOR82]
-.L1406:
+.L1407:
 	mov	w1, 65535
 	cmp	w6, w1
-	beq	.L1407
+	beq	.L1408
 	add	x0, x0, :lo12:.LANCHOR50
 	bl	make_superblock
-.L1407:
+.L1408:
 	ldrh	w2, [x20, #:lo12:.LANCHOR51]
 	mov	w1, 65535
 	add	x0, x20, :lo12:.LANCHOR51
 	cmp	w2, w1
-	beq	.L1408
+	beq	.L1409
 	bl	make_superblock
-.L1408:
+.L1409:
 	ldrh	w2, [x21, #:lo12:.LANCHOR52]
 	mov	w1, 65535
 	add	x0, x21, :lo12:.LANCHOR52
 	cmp	w2, w1
-	beq	.L1409
+	beq	.L1410
 	bl	make_superblock
-.L1409:
+.L1410:
 	ldrh	w2, [x22, #:lo12:.LANCHOR144]
 	mov	w1, 65535
 	add	x0, x22, :lo12:.LANCHOR144
 	cmp	w2, w1
-	beq	.L1410
+	beq	.L1411
 	bl	make_superblock
-.L1410:
+.L1411:
 	mov	w0, 0
-	b	.L1391
-.L1400:
+	b	.L1392
+.L1401:
 	add	x3, x19, :lo12:.LANCHOR137
 	orr	w0, w28, w24, lsl 10
 	mov	w2, 1
@@ -10311,15 +10326,15 @@ FtlLoadSysInfo:
 	ldr	x3, [x29, 104]
 	ldr	x0, [x3, 16]
 	ldr	w8, [x0, 12]
-	cbz	w8, .L1395
+	cbz	w8, .L1396
 	ldr	w0, [x19, #:lo12:.LANCHOR137]
 	cmn	w0, #1
-	beq	.L1395
+	beq	.L1396
 	ldrh	w1, [x26]
 	ldr	x0, [x3, 8]
 	bl	js_hash
 	cmp	w8, w0
-	beq	.L1395
+	beq	.L1396
 	add	x10, x20, :lo12:.LANCHOR138
 	mov	w6, w0
 	mov	w5, w8
@@ -10331,39 +10346,39 @@ FtlLoadSysInfo:
 	add	x0, x0, :lo12:.LC46
 	str	x10, [x29, 104]
 	bl	printf
-	cbnz	w28, .L1396
+	cbnz	w28, .L1397
 	ldr	x10, [x29, 104]
 	ldrh	w0, [x10, 4]
 	cmp	w24, w0
-	beq	.L1396
+	beq	.L1397
 	sxth	w24, w0
 	adrp	x0, .LANCHOR19
 	ldrh	w7, [x0, #:lo12:.LANCHOR19]
 	sub	w7, w7, #1
-.L1422:
+.L1423:
 	sxth	w28, w7
-	b	.L1394
-.L1396:
+	b	.L1395
+.L1397:
 	mov	w0, -1
 	str	w0, [x19, #:lo12:.LANCHOR137]
-.L1395:
+.L1396:
 	ldr	w0, [x19, #:lo12:.LANCHOR137]
 	cmn	w0, #1
-	beq	.L1398
+	beq	.L1399
 	ldr	x0, [x22, #:lo12:.LANCHOR105]
 	mov	w1, 19539
 	movk	w1, 0x4654, lsl 16
 	ldr	w0, [x0]
 	cmp	w0, w1
-	bne	.L1398
+	bne	.L1399
 	ldr	x0, [x25, #:lo12:.LANCHOR113]
 	ldrh	w1, [x0]
 	mov	w0, 61604
 	cmp	w1, w0
-	beq	.L1399
-.L1398:
+	beq	.L1400
+.L1399:
 	sub	w7, w28, #1
-	b	.L1422
+	b	.L1423
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
 	.section	.text.FtlMapTblRecovery,"ax",@progbits
 	.align	2
@@ -10412,14 +10427,14 @@ FtlMapTblRecovery:
 	add	x0, x26, :lo12:.LANCHOR19
 	str	w1, [x19, 56]
 	str	x0, [x29, 96]
-.L1424:
+.L1425:
 	ldr	w0, [x29, 152]
 	cmp	w20, w0
-	bge	.L1443
+	bge	.L1444
 	ldr	w0, [x29, 108]
 	sxtw	x28, w20
 	cmp	w20, w0
-	bne	.L1425
+	bne	.L1426
 	lsl	x0, x28, 1
 	mov	w1, 1
 	add	x26, x24, x0
@@ -10440,21 +10455,21 @@ FtlMapTblRecovery:
 	add	x28, x28, :lo12:.LANCHOR179
 	ldr	x0, [x29, 128]
 	add	x22, x0, :lo12:.LANCHOR137
-.L1426:
+.L1427:
 	ldr	w0, [x29, 152]
 	cmp	w24, w0
-	ble	.L1429
-.L1443:
+	ble	.L1430
+.L1444:
 	mov	x0, x19
 	bl	ftl_free_no_use_map_blk
 	adrp	x0, .LANCHOR19
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	cmp	w1, w0
-	bne	.L1431
+	bne	.L1432
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L1431:
+.L1432:
 	mov	x0, x19
 	bl	ftl_map_blk_gc
 	mov	x0, x19
@@ -10467,7 +10482,7 @@ FtlMapTblRecovery:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L1429:
+.L1430:
 	ldrh	w0, [x26]
 	mov	w2, 1
 	mov	w1, w2
@@ -10479,16 +10494,16 @@ FtlMapTblRecovery:
 	ldr	w0, [x0, 12]
 	str	w0, [x29, 156]
 	uxtw	x0, w0
-	cbz	w0, .L1427
+	cbz	w0, .L1428
 	ldr	w0, [x22]
 	cmn	w0, #1
-	beq	.L1427
+	beq	.L1428
 	ldrh	w1, [x27]
 	ldr	x0, [x22, 8]
 	bl	js_hash
 	ldr	w1, [x29, 156]
 	cmp	w1, w0
-	beq	.L1427
+	beq	.L1428
 	mov	w5, w0
 	mov	x4, x1
 	mov	w3, w24
@@ -10499,25 +10514,25 @@ FtlMapTblRecovery:
 	bl	printf
 	mov	w0, -1
 	str	w0, [x22]
-.L1427:
+.L1428:
 	ldr	w0, [x22]
 	cmn	w0, #1
-	beq	.L1428
+	beq	.L1429
 	ldrh	w0, [x21, 8]
 	cmp	w25, w0
-	bls	.L1428
+	bls	.L1429
 	ldrh	w2, [x21]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
-	bne	.L1428
+	bne	.L1429
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x22, 4]
 	str	w1, [x23, x0]
-.L1428:
+.L1429:
 	add	w6, w24, 1
 	sxth	w24, w6
-	b	.L1426
-.L1425:
+	b	.L1427
+.L1426:
 	lsl	x2, x28, 1
 	ldr	x0, [x22, #:lo12:.LANCHOR105]
 	str	x0, [x27, 8]
@@ -10534,16 +10549,16 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	w0, [x27]
 	cmn	w0, #1
-	beq	.L1445
+	beq	.L1446
 	ldrh	w1, [x21]
 	ldrh	w0, [x19, 4]
 	cmp	w1, w0
-	bne	.L1445
+	bne	.L1446
 	ldrh	w1, [x21, 8]
 	mov	w0, 64245
 	cmp	w1, w0
-	beq	.L1433
-.L1445:
+	beq	.L1434
+.L1446:
 	adrp	x0, .LANCHOR22
 	add	x0, x0, :lo12:.LANCHOR22
 	mov	w28, 0
@@ -10551,11 +10566,11 @@ FtlMapTblRecovery:
 	adrp	x0, .LANCHOR179
 	add	x0, x0, :lo12:.LANCHOR179
 	str	x0, [x29, 112]
-.L1434:
+.L1435:
 	ldr	x0, [x29, 96]
 	ldrh	w0, [x0]
 	cmp	w28, w0
-	bge	.L1441
+	bge	.L1442
 	ldr	x0, [x29, 136]
 	mov	w2, 1
 	mov	w1, w2
@@ -10568,17 +10583,17 @@ FtlMapTblRecovery:
 	ldr	w0, [x0, 12]
 	str	w0, [x29, 156]
 	uxtw	x0, w0
-	cbz	w0, .L1438
+	cbz	w0, .L1439
 	ldr	w0, [x27]
 	cmn	w0, #1
-	beq	.L1438
+	beq	.L1439
 	ldr	x0, [x29, 120]
 	ldrh	w1, [x0]
 	ldr	x0, [x27, 8]
 	bl	js_hash
 	ldr	w1, [x29, 156]
 	cmp	w1, w0
-	beq	.L1438
+	beq	.L1439
 	mov	x4, x1
 	ldr	x1, [x29, 112]
 	mov	w5, w0
@@ -10589,51 +10604,51 @@ FtlMapTblRecovery:
 	bl	printf
 	mov	w0, -1
 	str	w0, [x27]
-.L1438:
+.L1439:
 	ldr	w0, [x27]
 	cmn	w0, #1
-	beq	.L1439
+	beq	.L1440
 	ldrh	w0, [x21, 8]
 	cmp	w25, w0
-	bls	.L1439
+	bls	.L1440
 	ldrh	w2, [x21]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
-	bne	.L1439
+	bne	.L1440
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x27, 4]
 	str	w1, [x23, x0]
-.L1439:
+.L1440:
 	add	w7, w28, 1
 	sxth	w28, w7
-	b	.L1434
-.L1433:
+	b	.L1435
+.L1434:
 	ldrh	w3, [x26, #:lo12:.LANCHOR19]
 	mov	w0, 0
 	ldr	x4, [x22, #:lo12:.LANCHOR105]
 	sub	w3, w3, #1
-.L1435:
+.L1436:
 	cmp	w0, w3
-	blt	.L1437
-.L1441:
+	blt	.L1438
+.L1442:
 	add	w20, w20, 1
 	sxth	w20, w20
-	b	.L1424
-.L1437:
+	b	.L1425
+.L1438:
 	lsl	w2, w0, 1
 	sxtw	x2, w2
 	lsl	x1, x2, 2
 	ldrh	w1, [x4, x1]
 	cmp	w25, w1
-	bls	.L1436
+	bls	.L1437
 	add	x2, x2, 1
 	ubfiz	x1, x1, 2, 16
 	ldr	w2, [x4, x2, lsl 2]
 	str	w2, [x23, x1]
-.L1436:
+.L1437:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L1435
+	b	.L1436
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
 	.section	.text.FtlLoadVonderInfo,"ax",@progbits
 	.align	2
@@ -10707,20 +10722,20 @@ FtlSysBlkInit:
 	ldrh	w1, [x0, #:lo12:.LANCHOR138]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1470
-.L1472:
+	bne	.L1471
+.L1473:
 	mov	w21, -1
-.L1469:
+.L1470:
 	mov	w0, w21
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1470:
+.L1471:
 	bl	FtlLoadSysInfo
 	mov	w21, w0
-	cbnz	w0, .L1472
+	cbnz	w0, .L1473
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -10736,19 +10751,19 @@ FtlSysBlkInit:
 	ldr	x1, [x0, #:lo12:.LANCHOR54]
 	mov	w0, 0
 	add	x1, x1, 4
-.L1473:
+.L1474:
 	cmp	w0, w2
-	bge	.L1478
+	bge	.L1479
 	ldr	w3, [x1], 16
-	tbz	w3, #31, .L1474
-.L1478:
+	tbz	w3, #31, .L1475
+.L1479:
 	adrp	x3, .LANCHOR82
 	cmp	w0, w2
 	ldr	w1, [x3, #:lo12:.LANCHOR82]
 	add	w1, w1, 32
 	str	w1, [x3, #:lo12:.LANCHOR82]
-	bge	.L1480
-.L1475:
+	bge	.L1481
+.L1476:
 	adrp	x23, .LANCHOR50
 	add	x20, x23, :lo12:.LANCHOR50
 	mov	x0, x20
@@ -10787,17 +10802,17 @@ FtlSysBlkInit:
 	strh	w1, [x0, 30]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1482:
+.L1483:
 	bl	FtlVpcTblFlush
-	b	.L1469
-.L1474:
+	b	.L1470
+.L1475:
 	add	w0, w0, 1
-	b	.L1473
-.L1480:
+	b	.L1474
+.L1481:
 	ldrh	w0, [x19, #:lo12:.LANCHOR155]
-	cbnz	w0, .L1475
+	cbnz	w0, .L1476
 	bl	l2p_flush
-	b	.L1482
+	b	.L1483
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.section	.text.ftl_low_format,"ax",@progbits
 	.align	2
@@ -10820,9 +10835,9 @@ ftl_low_format:
 	str	wzr, [x20, #:lo12:.LANCHOR81]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	w0, .L1484
+	cbz	w0, .L1485
 	bl	FtlMakeBbt
-.L1484:
+.L1485:
 	adrp	x22, .LANCHOR11
 	adrp	x0, .LANCHOR108
 	mov	w6, 23752
@@ -10833,31 +10848,31 @@ ftl_low_format:
 	lsl	w1, w1, 7
 	ldr	x5, [x0, #:lo12:.LANCHOR109]
 	mov	w0, 0
-.L1485:
+.L1486:
 	cmp	w0, w1
-	blt	.L1486
+	blt	.L1487
 	adrp	x24, .LANCHOR4
 	adrp	x21, .LANCHOR5
 	add	x26, x21, :lo12:.LANCHOR5
 	mov	w19, 0
 	ldrh	w25, [x24, #:lo12:.LANCHOR4]
-.L1487:
+.L1488:
 	ldrh	w0, [x26]
 	cmp	w0, w25
-	bhi	.L1488
+	bhi	.L1489
 	adrp	x25, .LANCHOR2
 	sub	w1, w19, #2
 	ldrh	w0, [x25, #:lo12:.LANCHOR2]
 	cmp	w1, w0, lsl 1
-	bgt	.L1489
-.L1493:
+	bgt	.L1490
+.L1494:
 	add	x24, x24, :lo12:.LANCHOR4
 	mov	w19, 0
 	mov	w23, 0
-.L1490:
+.L1491:
 	ldrh	w0, [x24]
 	cmp	w0, w23
-	bhi	.L1494
+	bhi	.L1495
 	adrp	x0, .LANCHOR98
 	ldrh	w1, [x21, #:lo12:.LANCHOR5]
 	ldrh	w4, [x25, #:lo12:.LANCHOR2]
@@ -10874,28 +10889,28 @@ ftl_low_format:
 	mov	w6, 24
 	mul	w6, w4, w6
 	cmp	w19, w6
-	ble	.L1495
+	ble	.L1496
 	sub	w1, w1, w19
 	udiv	w1, w1, w4
 	str	w1, [x3, #:lo12:.LANCHOR151]
 	lsr	w1, w1, 5
 	add	w1, w1, 24
 	strh	w1, [x2, #:lo12:.LANCHOR170]
-.L1495:
+.L1496:
 	adrp	x1, .LANCHOR14
 	ldrh	w1, [x1, #:lo12:.LANCHOR14]
-	cbz	w1, .L1497
+	cbz	w1, .L1498
 	ldrh	w6, [x2, #:lo12:.LANCHOR170]
 	add	w6, w6, w1, lsr 1
 	strh	w6, [x2, #:lo12:.LANCHOR170]
 	mul	w6, w1, w4
 	cmp	w19, w6
-	bge	.L1497
+	bge	.L1498
 	add	w1, w1, 32
 	str	w5, [x3, #:lo12:.LANCHOR151]
 	add	w1, w0, w1
 	strh	w1, [x2, #:lo12:.LANCHOR170]
-.L1497:
+.L1498:
 	ldrh	w1, [x2, #:lo12:.LANCHOR170]
 	adrp	x23, .LANCHOR178
 	ldr	w0, [x3, #:lo12:.LANCHOR151]
@@ -10935,20 +10950,20 @@ ftl_low_format:
 	strh	wzr, [x19, 2]
 	strb	wzr, [x19, 6]
 	strb	w1, [x19, 8]
-.L1499:
+.L1500:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1500
+	cbnz	w1, .L1501
 	ldr	x1, [x21, #:lo12:.LANCHOR41]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L1499
-.L1486:
+	b	.L1500
+.L1487:
 	ubfiz	x3, x0, 2, 16
 	mvn	w2, w0
 	orr	w2, w0, w2, lsl 16
@@ -10956,8 +10971,8 @@ ftl_low_format:
 	and	w0, w0, 65535
 	str	w2, [x4, x3]
 	str	w6, [x5, x3]
-	b	.L1485
-.L1488:
+	b	.L1486
+.L1489:
 	mov	w0, w25
 	mov	w1, 1
 	add	w25, w25, 1
@@ -10965,8 +10980,8 @@ ftl_low_format:
 	add	w19, w19, w0
 	and	w25, w25, 65535
 	and	w19, w19, 65535
-	b	.L1487
-.L1489:
+	b	.L1488
+.L1490:
 	udiv	w0, w19, w0
 	adrp	x1, .LANCHOR30
 	ldr	w19, [x1, #:lo12:.LANCHOR30]
@@ -10976,17 +10991,17 @@ ftl_low_format:
 	add	x23, x21, :lo12:.LANCHOR5
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	w19, [x24, #:lo12:.LANCHOR4]
-.L1491:
+.L1492:
 	ldrh	w0, [x23]
 	cmp	w0, w19
-	bls	.L1493
+	bls	.L1494
 	mov	w0, w19
 	add	w19, w19, 1
 	mov	w1, 1
 	and	w19, w19, 65535
 	bl	FtlLowFormatEraseBlock
-	b	.L1491
-.L1494:
+	b	.L1492
+.L1495:
 	mov	w0, w23
 	mov	w1, 0
 	add	w23, w23, 1
@@ -10994,8 +11009,8 @@ ftl_low_format:
 	add	w19, w19, w0
 	and	w23, w23, 65535
 	and	w19, w19, 65535
-	b	.L1490
-.L1500:
+	b	.L1491
+.L1501:
 	ldr	w1, [x20, #:lo12:.LANCHOR81]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
@@ -11015,20 +11030,20 @@ ftl_low_format:
 	mov	w1, 1
 	strb	wzr, [x0, 6]
 	strb	w1, [x0, 8]
-.L1501:
+.L1502:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1502
+	cbnz	w1, .L1503
 	ldr	x1, [x21, #:lo12:.LANCHOR41]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L1501
-.L1502:
+	b	.L1502
+.L1503:
 	ldr	w1, [x20, #:lo12:.LANCHOR81]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
@@ -11054,11 +11069,11 @@ ftl_low_format:
 	str	w0, [x20, #:lo12:.LANCHOR81]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	w0, .L1503
+	cbnz	w0, .L1504
 	adrp	x0, .LANCHOR165
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR165]
-.L1503:
+.L1504:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11093,19 +11108,19 @@ sftl_init:
 	adrp	x0, .LANCHOR3
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	bl	FtlFreeSysBlkQueueInit
-.L1509:
+.L1510:
 	bl	FtlLoadBbt
-	cbz	w0, .L1510
-.L1520:
+	cbz	w0, .L1511
+.L1521:
 	ldr	w0, [x19]
 	cmp	w0, 1
-	bne	.L1509
+	bne	.L1510
 	str	wzr, [x19]
 	bl	ftl_low_format
-	b	.L1509
-.L1510:
+	b	.L1510
+.L1511:
 	bl	FtlSysBlkInit
-	cbnz	w0, .L1520
+	cbnz	w0, .L1521
 	mov	w1, 1
 	str	w1, [x20, #:lo12:.LANCHOR165]
 	ldp	x19, x20, [sp, 16]
@@ -11128,17 +11143,17 @@ FtlWriteToIDB:
 	stp	x19, x20, [sp, 16]
 	adrp	x27, .LANCHOR181
 	stp	x25, x26, [sp, 64]
-	bls	.L1522
+	bls	.L1523
 	mov	w19, w0
 	cmp	w0, 575
-	bls	.L1523
-.L1522:
+	bls	.L1524
+.L1523:
 	ldr	w0, [x27, #:lo12:.LANCHOR181]
-	cbnz	w0, .L1524
-.L1588:
+	cbnz	w0, .L1525
+.L1589:
 	mov	w19, 0
-	b	.L1521
-.L1524:
+	b	.L1522
+.L1525:
 	adrp	x0, .LANCHOR182
 	str	x0, [x29, 112]
 	mov	w1, 35899
@@ -11146,7 +11161,7 @@ FtlWriteToIDB:
 	movk	w1, 0xfcdc, lsl 16
 	ldr	w2, [x26]
 	cmp	w2, w1
-	bne	.L1526
+	bne	.L1527
 	adrp	x22, .LANCHOR0
 	add	x0, x22, :lo12:.LANCHOR0
 	add	x1, x26, 258048
@@ -11155,9 +11170,9 @@ FtlWriteToIDB:
 	mov	w3, 4097
 	ldrh	w2, [x0, 10]
 	mov	w0, 0
-.L1530:
+.L1531:
 	ldr	w4, [x1]
-	cbnz	w4, .L1527
+	cbnz	w4, .L1528
 	ldr	w4, [x26, w0, uxtw 2]
 	add	w0, w0, 1
 	str	w4, [x1, 2048]
@@ -11166,13 +11181,13 @@ FtlWriteToIDB:
 	csel	w0, w0, wzr, cc
 	sub	x1, x1, #4
 	cmp	w19, 4096
-	bne	.L1530
+	bne	.L1531
 	mov	w19, 512
-	b	.L1529
-.L1527:
+	b	.L1530
+.L1528:
 	add	w19, w19, 127
 	lsr	w19, w19, 7
-.L1529:
+.L1530:
 	ubfiz	w0, w2, 2, 14
 	add	w21, w19, 4
 	mov	w1, w19
@@ -11188,16 +11203,16 @@ FtlWriteToIDB:
 	adrp	x0, .LANCHOR77
 	add	x20, x0, :lo12:.LANCHOR77
 	str	wzr, [x29, 156]
-.L1531:
+.L1532:
 	add	w0, w21, w24
 	str	w0, [x29, 140]
 	cmp	w0, 8
-	bls	.L1553
+	bls	.L1554
 	ldr	w0, [x29, 156]
-	cbnz	w0, .L1554
-.L1526:
+	cbnz	w0, .L1555
+.L1527:
 	mov	w19, -1
-.L1554:
+.L1555:
 	ldr	x0, [x29, 112]
 	str	wzr, [x27, #:lo12:.LANCHOR181]
 	ldr	x0, [x0, #:lo12:.LANCHOR182]
@@ -11205,7 +11220,7 @@ FtlWriteToIDB:
 	adrp	x0, .LANCHOR183
 	ldr	x0, [x0, #:lo12:.LANCHOR183]
 	bl	free
-.L1521:
+.L1522:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11214,7 +11229,7 @@ FtlWriteToIDB:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 224
 	ret
-.L1553:
+.L1554:
 	adrp	x23, .LANCHOR183
 	mov	w1, 0
 	mov	x2, 512
@@ -11227,16 +11242,16 @@ FtlWriteToIDB:
 	adrp	x0, .LANCHOR77
 	add	x0, x0, :lo12:.LANCHOR77
 	ldr	x1, [x0, 32]
-	cbz	x1, .L1561
+	cbz	x1, .L1562
 	ldr	x0, [x0, 40]
 	mov	w25, 6
 	cmp	x0, 0
 	mov	w0, 9
 	csel	w25, w25, w0, eq
-.L1532:
+.L1533:
 	mul	w4, w24, w3
 	mov	w28, 0
-.L1533:
+.L1534:
 	ldr	x5, [x20, 8]
 	mov	w1, w4
 	str	w3, [x29, 128]
@@ -11248,9 +11263,9 @@ FtlWriteToIDB:
 	cmp	w21, w28
 	ldr	w4, [x29, 152]
 	add	w4, w4, w3
-	bhi	.L1533
+	bhi	.L1534
 	cmp	w25, 9
-	bne	.L1563
+	bne	.L1564
 	ldr	x28, [x23, #:lo12:.LANCHOR183]
 	mov	w2, 1024
 	str	w3, [x29, 152]
@@ -11276,28 +11291,28 @@ FtlWriteToIDB:
 	bl	js_hash
 	str	w0, [x28, 8]
 	ldr	w3, [x29, 152]
-.L1534:
+.L1535:
 	mul	w0, w21, w3
 	mov	x6, x26
 	str	w0, [x29, 152]
 	mov	x5, 0
 	add	x0, x22, :lo12:.LANCHOR0
 	str	x0, [x29, 128]
-.L1535:
+.L1536:
 	ldr	w0, [x29, 152]
 	mov	w1, w5
 	cmp	w5, w0
-	bcs	.L1542
+	bcs	.L1543
 	cmp	w25, 9
-	bne	.L1536
+	bne	.L1537
 	add	w0, w1, 1
-.L1586:
+.L1587:
 	str	w0, [x29, 160]
 	mov	w0, 61424
 	str	w0, [x29, 164]
 	cmp	w1, 0
 	ccmp	w25, 9, 0, eq
-	bne	.L1538
+	bne	.L1539
 	ldr	x1, [x20, 32]
 	mov	w0, 70
 	stp	x6, x5, [x29, 96]
@@ -11317,8 +11332,8 @@ FtlWriteToIDB:
 	ldr	w1, [x29, 120]
 	ldp	x6, x5, [x29, 96]
 	cmn	w1, #1
-	bne	.L1539
-.L1542:
+	bne	.L1540
+.L1543:
 	add	x0, x22, :lo12:.LANCHOR0
 	ldr	x25, [x23, #:lo12:.LANCHOR183]
 	ldrb	w1, [x0, 14]
@@ -11327,22 +11342,22 @@ FtlWriteToIDB:
 	mul	w1, w24, w0
 	str	w1, [x29, 144]
 	ldr	x1, [x20, 32]
-	cbnz	x1, .L1540
+	cbnz	x1, .L1541
 	mov	w1, 6
-.L1587:
+.L1588:
 	mul	w0, w21, w0
 	mov	x28, 0
 	str	w0, [x29, 120]
 	str	w1, [x29, 152]
-.L1544:
+.L1545:
 	ldr	w0, [x29, 120]
 	mov	w1, w28
 	cmp	w0, w28
-	bls	.L1548
+	bls	.L1549
 	ldr	w0, [x29, 152]
 	cmp	w28, 0
 	ccmp	w0, 9, 0, eq
-	bne	.L1545
+	bne	.L1546
 	ldr	x1, [x20, 32]
 	mov	w0, 70
 	blr	x1
@@ -11366,32 +11381,32 @@ FtlWriteToIDB:
 	mov	w1, 18766
 	movk	w1, 0x464e, lsl 16
 	cmp	w0, w1
-	beq	.L1546
-.L1548:
+	beq	.L1547
+.L1549:
 	ldr	x0, [x23, #:lo12:.LANCHOR183]
 	mov	x2, x26
 	mov	x1, 0
-.L1547:
+.L1548:
 	ldr	w3, [x29, 136]
 	mov	w28, w1
 	cmp	w1, w3
-	bcc	.L1551
+	bcc	.L1552
 	ldr	w0, [x29, 156]
 	add	w0, w0, 1
 	str	w0, [x29, 156]
 	cmp	w0, 5
-	bls	.L1550
-	b	.L1554
-.L1561:
+	bls	.L1551
+	b	.L1555
+.L1562:
 	mov	w25, 6
-	b	.L1532
-.L1563:
+	b	.L1533
+.L1564:
 	mov	x28, 0
-	b	.L1534
-.L1536:
+	b	.L1535
+.L1537:
 	lsl	w0, w1, 2
-	b	.L1586
-.L1538:
+	b	.L1587
+.L1539:
 	ldr	x7, [x20, 16]
 	add	x3, x29, 160
 	ldr	w0, [x29, 144]
@@ -11402,21 +11417,21 @@ FtlWriteToIDB:
 	mov	w0, 0
 	blr	x7
 	cmn	w0, #1
-	beq	.L1542
+	beq	.L1543
 	ldr	x6, [x29, 120]
 	ldr	x5, [x29, 104]
 	add	x6, x6, 2048
-.L1539:
-	add	x5, x5, 1
-	b	.L1535
 .L1540:
+	add	x5, x5, 1
+	b	.L1536
+.L1541:
 	ldr	x1, [x20, 40]
 	mov	w2, 6
 	cmp	x1, 0
 	mov	w1, 9
 	csel	w1, w2, w1, eq
-	b	.L1587
-.L1545:
+	b	.L1588
+.L1546:
 	ldr	x6, [x20, 24]
 	add	x3, x29, 160
 	ldr	w0, [x29, 144]
@@ -11425,16 +11440,16 @@ FtlWriteToIDB:
 	mov	w0, 0
 	blr	x6
 	cmn	w0, #1
-	beq	.L1548
+	beq	.L1549
 	ldr	w0, [x29, 164]
 	mov	w1, 61424
 	cmp	w0, w1
-	bne	.L1548
+	bne	.L1549
 	add	x25, x25, 2048
-.L1546:
+.L1547:
 	add	x28, x28, 1
-	b	.L1544
-.L1551:
+	b	.L1545
+.L1552:
 	mov	x25, x2
 	ldr	w4, [x0, x1, lsl 2]
 	lsl	x5, x1, 2
@@ -11442,7 +11457,7 @@ FtlWriteToIDB:
 	add	x1, x1, 1
 	ldr	w3, [x25]
 	cmp	w4, w3
-	beq	.L1547
+	beq	.L1548
 	mov	x2, 512
 	mov	w1, 0
 	str	x5, [x29, 144]
@@ -11462,14 +11477,14 @@ FtlWriteToIDB:
 	mov	w0, 0
 	mul	w1, w1, w24
 	blr	x2
-.L1550:
+.L1551:
 	ldr	w24, [x29, 140]
-	b	.L1531
-.L1523:
+	b	.L1532
+.L1524:
 	mov	w20, w1
 	mov	x21, x2
 	cmp	w0, 64
-	bne	.L1555
+	bne	.L1556
 	adrp	x24, .LANCHOR182
 	mov	w0, 262144
 	bl	ftl_malloc
@@ -11480,47 +11495,47 @@ FtlWriteToIDB:
 	adrp	x0, .LANCHOR183
 	str	x1, [x0, #:lo12:.LANCHOR183]
 	ldr	x0, [x24, #:lo12:.LANCHOR182]
-	cbz	x0, .L1556
-	cbz	x1, .L1556
+	cbz	x0, .L1557
+	cbz	x1, .L1557
 	mov	w1, 1
 	mov	w2, 262144
 	str	w1, [x27, #:lo12:.LANCHOR181]
 	mov	w1, 0
 	bl	ftl_memset
-.L1555:
+.L1556:
 	ldr	w0, [x27, #:lo12:.LANCHOR181]
-	cbz	w0, .L1588
+	cbz	w0, .L1589
 	adrp	x0, .LANCHOR182
 	cmp	w19, 63
 	ldr	x0, [x0, #:lo12:.LANCHOR182]
-	bhi	.L1558
+	bhi	.L1559
 	mov	w1, 64
 	sub	w19, w1, w19
 	sub	w20, w20, w19
 	ubfiz	x19, x19, 9, 25
 	add	x1, x21, x19
-.L1559:
+.L1560:
 	cmp	w23, 575
-	bls	.L1560
+	bls	.L1561
 	sub	w20, w20, w22
 	sub	w20, w20, #446
-.L1560:
+.L1561:
 	lsl	w2, w20, 9
 	bl	ftl_memcpy
-	b	.L1588
-.L1556:
+	b	.L1589
+.L1557:
 	adrp	x1, .LANCHOR184
 	adrp	x0, .LC52
 	add	x1, x1, :lo12:.LANCHOR184
 	add	x0, x0, :lo12:.LC52
 	bl	printf
-	b	.L1555
-.L1558:
+	b	.L1556
+.L1559:
 	lsl	w2, w19, 7
 	mov	x1, x21
 	sub	w2, w2, #8192
 	add	x0, x0, x2, lsl 2
-	b	.L1559
+	b	.L1560
 	.size	FtlWriteToIDB, .-FtlWriteToIDB
 	.section	.text.sftl_write,"ax",@progbits
 	.align	2
@@ -11536,26 +11551,26 @@ sftl_write:
 	add	w21, w19, w21
 	mov	x20, x2
 	bl	FtlWriteToIDB
-.L1590:
+.L1591:
 	sub	w1, w21, w19
 	mov	x3, x20
 	cmp	w19, 256
-	bhi	.L1592
+	bhi	.L1593
 	mov	w2, w19
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x29, x30, [sp], 48
 	b	FtlWrite
-.L1592:
+.L1593:
 	mov	w2, 256
 	mov	w0, 0
 	bl	FtlWrite
-	cbnz	w0, .L1589
+	cbnz	w0, .L1590
 	add	x20, x20, 131072
 	sub	w19, w19, #256
-	b	.L1590
-.L1589:
+	b	.L1591
+.L1590:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -12872,250 +12887,250 @@ power_up_flag:
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",@progbits,1
 .LC1:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
-	.section	.rodata.__func__.6357,"a",@progbits
+	.section	.rodata.__func__.6364,"a",@progbits
 	.align	3
 	.set	.LANCHOR168,. + 0
-	.type	__func__.6357, %object
-	.size	__func__.6357, 13
-__func__.6357:
+	.type	__func__.6364, %object
+	.size	__func__.6364, 13
+__func__.6364:
 	.string	"FtlProgPages"
-	.section	.rodata.__func__.6385,"a",@progbits
+	.section	.rodata.__func__.6392,"a",@progbits
 	.align	3
 	.set	.LANCHOR176,. + 0
-	.type	__func__.6385, %object
-	.size	__func__.6385, 9
-__func__.6385:
+	.type	__func__.6392, %object
+	.size	__func__.6392, 9
+__func__.6392:
 	.string	"FtlWrite"
-	.section	.rodata.__func__.6467,"a",@progbits
+	.section	.rodata.__func__.6474,"a",@progbits
 	.align	3
 	.set	.LANCHOR127,. + 0
-	.type	__func__.6467, %object
-	.size	__func__.6467, 14
-__func__.6467:
+	.type	__func__.6474, %object
+	.size	__func__.6474, 14
+__func__.6474:
 	.string	"FtlBbt2Bitmap"
-	.section	.rodata.__func__.6502,"a",@progbits
+	.section	.rodata.__func__.6509,"a",@progbits
 	.align	3
 	.set	.LANCHOR140,. + 0
-	.type	__func__.6502, %object
-	.size	__func__.6502, 11
-__func__.6502:
+	.type	__func__.6509, %object
+	.size	__func__.6509, 11
+__func__.6509:
 	.string	"FtlLoadBbt"
-	.section	.rodata.__func__.6617,"a",@progbits
+	.section	.rodata.__func__.6624,"a",@progbits
 	.align	3
 	.set	.LANCHOR48,. + 0
-	.type	__func__.6617, %object
-	.size	__func__.6617, 17
-__func__.6617:
+	.type	__func__.6624, %object
+	.size	__func__.6624, 17
+__func__.6624:
 	.string	"INSERT_FREE_LIST"
-	.section	.rodata.__func__.6622,"a",@progbits
+	.section	.rodata.__func__.6629,"a",@progbits
 	.align	3
 	.set	.LANCHOR44,. + 0
-	.type	__func__.6622, %object
-	.size	__func__.6622, 17
-__func__.6622:
+	.type	__func__.6629, %object
+	.size	__func__.6629, 17
+__func__.6629:
 	.string	"INSERT_DATA_LIST"
-	.section	.rodata.__func__.6653,"a",@progbits
+	.section	.rodata.__func__.6660,"a",@progbits
 	.align	3
 	.set	.LANCHOR49,. + 0
-	.type	__func__.6653, %object
-	.size	__func__.6653, 17
-__func__.6653:
+	.type	__func__.6660, %object
+	.size	__func__.6660, 17
+__func__.6660:
 	.string	"List_remove_node"
-	.section	.rodata.__func__.6685,"a",@progbits
+	.section	.rodata.__func__.6692,"a",@progbits
 	.align	3
 	.set	.LANCHOR53,. + 0
-	.type	__func__.6685, %object
-	.size	__func__.6685, 22
-__func__.6685:
+	.type	__func__.6692, %object
+	.size	__func__.6692, 22
+__func__.6692:
 	.string	"List_update_data_list"
-	.section	.rodata.__func__.6694,"a",@progbits
+	.section	.rodata.__func__.6701,"a",@progbits
 	.align	3
 	.set	.LANCHOR149,. + 0
-	.type	__func__.6694, %object
-	.size	__func__.6694, 16
-__func__.6694:
+	.type	__func__.6701, %object
+	.size	__func__.6701, 16
+__func__.6701:
 	.string	"load_l2p_region"
-	.section	.rodata.__func__.6727,"a",@progbits
+	.section	.rodata.__func__.6734,"a",@progbits
 	.align	3
 	.set	.LANCHOR80,. + 0
-	.type	__func__.6727, %object
-	.size	__func__.6727, 26
-__func__.6727:
+	.type	__func__.6734, %object
+	.size	__func__.6734, 26
+__func__.6734:
 	.string	"ftl_map_blk_alloc_new_blk"
-	.section	.rodata.__func__.6738,"a",@progbits
+	.section	.rodata.__func__.6745,"a",@progbits
 	.align	3
 	.set	.LANCHOR150,. + 0
-	.type	__func__.6738, %object
-	.size	__func__.6738, 15
-__func__.6738:
+	.type	__func__.6745, %object
+	.size	__func__.6745, 15
+__func__.6745:
 	.string	"ftl_map_blk_gc"
-	.section	.rodata.__func__.6753,"a",@progbits
+	.section	.rodata.__func__.6760,"a",@progbits
 	.align	3
 	.set	.LANCHOR147,. + 0
-	.type	__func__.6753, %object
-	.size	__func__.6753, 31
-__func__.6753:
+	.type	__func__.6760, %object
+	.size	__func__.6760, 31
+__func__.6760:
 	.string	"Ftl_write_map_blk_to_last_page"
-	.section	.rodata.__func__.6767,"a",@progbits
+	.section	.rodata.__func__.6774,"a",@progbits
 	.align	3
 	.set	.LANCHOR148,. + 0
-	.type	__func__.6767, %object
-	.size	__func__.6767, 16
-__func__.6767:
+	.type	__func__.6774, %object
+	.size	__func__.6774, 16
+__func__.6774:
 	.string	"FtlMapWritePage"
-	.section	.rodata.__func__.6792,"a",@progbits
+	.section	.rodata.__func__.6799,"a",@progbits
 	.align	3
 	.set	.LANCHOR56,. + 0
-	.type	__func__.6792, %object
-	.size	__func__.6792, 22
-__func__.6792:
+	.type	__func__.6799, %object
+	.size	__func__.6799, 22
+__func__.6799:
 	.string	"select_l2p_ram_region"
-	.section	.rodata.__func__.6809,"a",@progbits
+	.section	.rodata.__func__.6816,"a",@progbits
 	.align	3
 	.set	.LANCHOR152,. + 0
-	.type	__func__.6809, %object
-	.size	__func__.6809, 9
-__func__.6809:
+	.type	__func__.6816, %object
+	.size	__func__.6816, 9
+__func__.6816:
 	.string	"log2phys"
-	.section	.rodata.__func__.6873,"a",@progbits
+	.section	.rodata.__func__.6880,"a",@progbits
 	.align	3
 	.set	.LANCHOR164,. + 0
-	.type	__func__.6873, %object
-	.size	__func__.6873, 15
-__func__.6873:
+	.type	__func__.6880, %object
+	.size	__func__.6880, 15
+__func__.6880:
 	.string	"FtlVpcTblFlush"
-	.section	.rodata.__func__.6895,"a",@progbits
+	.section	.rodata.__func__.6902,"a",@progbits
 	.align	3
 	.set	.LANCHOR139,. + 0
-	.type	__func__.6895, %object
-	.size	__func__.6895, 14
-__func__.6895:
+	.type	__func__.6902, %object
+	.size	__func__.6902, 14
+__func__.6902:
 	.string	"FtlScanSysBlk"
-	.section	.rodata.__func__.6944,"a",@progbits
+	.section	.rodata.__func__.6951,"a",@progbits
 	.align	3
 	.set	.LANCHOR177,. + 0
-	.type	__func__.6944, %object
-	.size	__func__.6944, 15
-__func__.6944:
+	.type	__func__.6951, %object
+	.size	__func__.6951, 15
+__func__.6951:
 	.string	"FtlLoadSysInfo"
-	.section	.rodata.__func__.6966,"a",@progbits
+	.section	.rodata.__func__.6973,"a",@progbits
 	.align	3
 	.set	.LANCHOR179,. + 0
-	.type	__func__.6966, %object
-	.size	__func__.6966, 18
-__func__.6966:
+	.type	__func__.6973, %object
+	.size	__func__.6973, 18
+__func__.6973:
 	.string	"FtlMapTblRecovery"
-	.section	.rodata.__func__.7012,"a",@progbits
+	.section	.rodata.__func__.7019,"a",@progbits
 	.align	3
 	.set	.LANCHOR153,. + 0
-	.type	__func__.7012, %object
-	.size	__func__.7012, 16
-__func__.7012:
+	.type	__func__.7019, %object
+	.size	__func__.7019, 16
+__func__.7019:
 	.string	"FtlReUsePrevPpa"
-	.section	.rodata.__func__.7046,"a",@progbits
+	.section	.rodata.__func__.7053,"a",@progbits
 	.align	3
 	.set	.LANCHOR154,. + 0
-	.type	__func__.7046, %object
-	.size	__func__.7046, 22
-__func__.7046:
+	.type	__func__.7053, %object
+	.size	__func__.7053, 22
+__func__.7053:
 	.string	"FtlRecoverySuperblock"
-	.section	.rodata.__func__.7103,"a",@progbits
+	.section	.rodata.__func__.7110,"a",@progbits
 	.align	3
 	.set	.LANCHOR59,. + 0
-	.type	__func__.7103, %object
-	.size	__func__.7103, 16
-__func__.7103:
+	.type	__func__.7110, %object
+	.size	__func__.7110, 16
+__func__.7110:
 	.string	"make_superblock"
-	.section	.rodata.__func__.7124,"a",@progbits
+	.section	.rodata.__func__.7131,"a",@progbits
 	.align	3
 	.set	.LANCHOR135,. + 0
-	.type	__func__.7124, %object
-	.size	__func__.7124, 18
-__func__.7124:
+	.type	__func__.7131, %object
+	.size	__func__.7131, 18
+__func__.7131:
 	.string	"SupperBlkListInit"
-	.section	.rodata.__func__.7151,"a",@progbits
+	.section	.rodata.__func__.7158,"a",@progbits
 	.align	3
 	.set	.LANCHOR158,. + 0
-	.type	__func__.7151, %object
-	.size	__func__.7151, 14
-__func__.7151:
+	.type	__func__.7158, %object
+	.size	__func__.7158, 14
+__func__.7158:
 	.string	"ftl_check_vpc"
-	.section	.rodata.__func__.7216,"a",@progbits
+	.section	.rodata.__func__.7223,"a",@progbits
 	.align	3
 	.set	.LANCHOR143,. + 0
-	.type	__func__.7216, %object
-	.size	__func__.7216, 25
-__func__.7216:
+	.type	__func__.7223, %object
+	.size	__func__.7223, 25
+__func__.7223:
 	.string	"allocate_data_superblock"
-	.section	.rodata.__func__.7237,"a",@progbits
+	.section	.rodata.__func__.7244,"a",@progbits
 	.align	3
 	.set	.LANCHOR167,. + 0
-	.type	__func__.7237, %object
-	.size	__func__.7237, 29
-__func__.7237:
+	.type	__func__.7244, %object
+	.size	__func__.7244, 29
+__func__.7244:
 	.string	"allocate_new_data_superblock"
-	.section	.rodata.__func__.7244,"a",@progbits
+	.section	.rodata.__func__.7251,"a",@progbits
 	.align	3
 	.set	.LANCHOR60,. + 0
-	.type	__func__.7244, %object
-	.size	__func__.7244, 19
-__func__.7244:
+	.type	__func__.7251, %object
+	.size	__func__.7251, 19
+__func__.7251:
 	.string	"get_new_active_ppa"
-	.section	.rodata.__func__.7257,"a",@progbits
+	.section	.rodata.__func__.7264,"a",@progbits
 	.align	3
 	.set	.LANCHOR145,. + 0
-	.type	__func__.7257, %object
-	.size	__func__.7257, 16
-__func__.7257:
+	.type	__func__.7264, %object
+	.size	__func__.7264, 16
+__func__.7264:
 	.string	"update_vpc_list"
-	.section	.rodata.__func__.7264,"a",@progbits
+	.section	.rodata.__func__.7271,"a",@progbits
 	.align	3
 	.set	.LANCHOR146,. + 0
-	.type	__func__.7264, %object
-	.size	__func__.7264, 20
-__func__.7264:
+	.type	__func__.7271, %object
+	.size	__func__.7271, 20
+__func__.7271:
 	.string	"decrement_vpc_count"
-	.section	.rodata.__func__.7334,"a",@progbits
+	.section	.rodata.__func__.7341,"a",@progbits
 	.align	3
 	.set	.LANCHOR169,. + 0
-	.type	__func__.7334, %object
-	.size	__func__.7334, 19
-__func__.7334:
+	.type	__func__.7341, %object
+	.size	__func__.7341, 19
+__func__.7341:
 	.string	"FtlGcFreeTempBlock"
-	.section	.rodata.__func__.7433,"a",@progbits
+	.section	.rodata.__func__.7440,"a",@progbits
 	.align	3
 	.set	.LANCHOR174,. + 0
-	.type	__func__.7433, %object
-	.size	__func__.7433, 23
-__func__.7433:
+	.type	__func__.7440, %object
+	.size	__func__.7440, 23
+__func__.7440:
 	.string	"rk_ftl_garbage_collect"
-	.section	.rodata.__func__.7701,"a",@progbits
+	.section	.rodata.__func__.7708,"a",@progbits
 	.align	3
 	.set	.LANCHOR136,. + 0
-	.type	__func__.7701, %object
-	.size	__func__.7701, 15
-__func__.7701:
+	.type	__func__.7708, %object
+	.size	__func__.7708, 15
+__func__.7708:
 	.string	"FlashReadPages"
-	.section	.rodata.__func__.7720,"a",@progbits
+	.section	.rodata.__func__.7727,"a",@progbits
 	.align	3
 	.set	.LANCHOR141,. + 0
-	.type	__func__.7720, %object
-	.size	__func__.7720, 15
-__func__.7720:
+	.type	__func__.7727, %object
+	.size	__func__.7727, 15
+__func__.7727:
 	.string	"FlashProgPages"
-	.section	.rodata.__func__.7744,"a",@progbits
+	.section	.rodata.__func__.7751,"a",@progbits
 	.align	3
 	.set	.LANCHOR76,. + 0
-	.type	__func__.7744, %object
-	.size	__func__.7744, 17
-__func__.7744:
+	.type	__func__.7751, %object
+	.size	__func__.7751, 17
+__func__.7751:
 	.string	"FlashEraseBlocks"
-	.section	.rodata.__func__.7863,"a",@progbits
+	.section	.rodata.__func__.7870,"a",@progbits
 	.align	3
 	.set	.LANCHOR184,. + 0
-	.type	__func__.7863, %object
-	.size	__func__.7863, 14
-__func__.7863:
+	.type	__func__.7870, %object
+	.size	__func__.7870, 14
+__func__.7870:
 	.string	"FtlWriteToIDB"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",@progbits,1
 .LC21:
@@ -13160,5 +13175,5 @@ __func__.7863:
 	.string	"\n"
 	.section	.rodata.sftl_init.str1.1,"aMS",@progbits,1
 .LC49:
-	.string	"SFTL version: 5.0.55 20200925"
+	.string	"SFTL version: 5.0.56 20210329"
 	.hidden	free

commit 589d4a889477b86077730cd5e1697b2fb1aa92f0
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Apr 7 11:38:46 2021 +0800

    rockchip: rkimg: change the macro the MMC driver depends on
    
    The CONFIG_DM_MMC is always selected by rockchip, but there is a
    compile error if not select mmc driver. So change the macro the MMC
    driver depends on.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I5af6da683bac95445f75361c58389e59a283fc5b

diff --git a/arch/arm/mach-rockchip/boot_rkimg.c b/arch/arm/mach-rockchip/boot_rkimg.c
index 9c558de508..a6fa2a189f 100644
--- a/arch/arm/mach-rockchip/boot_rkimg.c
+++ b/arch/arm/mach-rockchip/boot_rkimg.c
@@ -69,7 +69,7 @@ static void boot_devtype_init(void)
 		env_set("devtype", devtype);
 		env_set("devnum", devnum);
 
-#ifdef CONFIG_DM_MMC
+#ifdef CONFIG_MMC
 		if (!strcmp("mmc", devtype))
 			mmc_initialize(gd->bd);
 #endif
@@ -88,7 +88,7 @@ static void boot_devtype_init(void)
 #endif
 
 	/* Low priority: if not get bootdev by atags, scan all possible */
-#ifdef CONFIG_DM_MMC
+#ifdef CONFIG_MMC
 	mmc_initialize(gd->bd);
 #endif
 	ret = run_command_list(devtype_num_set, -1, 0);

commit 8889aef06aee02f818d36a27baea5f35972583c6
Author: Wesley Yao <wesley.yao@rock-chips.com>
Date:   Wed Mar 31 17:12:48 2021 +0800

    cmd: ddr_tool: ddr_dq_eye_tool: fix the bug if DQ byte select don't use default value
    
    Fix the bug if DQ byte select don't use default value, and read/write training result would be saved and shown correctly for DDR DQ eye tool.
    
    Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
    Change-Id: I9624152585a6fd4a732d5a77957ebcf9a1bee563

diff --git a/cmd/ddr_tool/ddr_dq_eye.c b/cmd/ddr_tool/ddr_dq_eye.c
index 732b762a35..1180d9a7e8 100644
--- a/cmd/ddr_tool/ddr_dq_eye.c
+++ b/cmd/ddr_tool/ddr_dq_eye.c
@@ -48,7 +48,10 @@ static void print_ddr_dq_eye(struct fsp_rw_trn_result *fsp_result, u8 cs,
 	u16 deskew_step;
 	struct cs_rw_trn_result *result = &fsp_result->cs[cs];
 
-	for (dqs = 0; (byte_en & BIT(dqs)) != 0 && dqs < BYTE_NUM; dqs++) {
+	for (dqs = 0; dqs < BYTE_NUM; dqs++) {
+		if ((byte_en & BIT(dqs)) == 0)
+			continue;
+
 		for (dq = 0; dq < 8; dq++) {
 			sample = fsp_result->min_val +
 				 result->dqs[dqs].dq_deskew[dq];
@@ -95,7 +98,10 @@ static u16 cs_eye_width_min(struct cs_rw_trn_result *result, u8 byte_en,
 	u8 dqs;
 	u8 dq;
 
-	for (dqs = 0; (byte_en & BIT(dqs)) != 0 && dqs < BYTE_NUM; dqs++) {
+	for (dqs = 0; dqs < BYTE_NUM; dqs++) {
+		if ((byte_en & BIT(dqs)) == 0)
+			continue;
+
 		for (dq = 0; dq < 8; dq++) {
 			min = result->dqs[dqs].dq_min[dq];
 			max = result->dqs[dqs].dq_max[dq];
diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
index acf33d7406..0943b646a0 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -1937,7 +1937,10 @@ static void save_rw_trn_min_max(void __iomem *phy_base,
 	u8 dqs;
 	u8 dq;
 
-	for (dqs = 0; (byte_en & BIT(dqs)) != 0 && dqs < BYTE_NUM; dqs++) {
+	for (dqs = 0; dqs < BYTE_NUM; dqs++) {
+		if ((byte_en & BIT(dqs)) == 0)
+			continue;
+
 		/* Channel A or B (low or high 16 bit) */
 		phy_ofs = dqs < 2 ? 0x230 : 0x2b0;
 		/* low or high 8 bit */

commit 0efe6414440b4571d194e6fc365eb684ff8ca679
Author: Tony Xu <tony.xu@rock-chips.com>
Date:   Mon Mar 1 19:52:35 2021 +0800

    rockchip: boot mode: add dfu boot mode
    
    Signed-off-by: Tony Xu <tony.xu@rock-chips.com>
    Change-Id: I965982c71d37f4550be364f5fbcc9ae39b22e3d1

diff --git a/arch/arm/include/asm/arch-rockchip/boot_mode.h b/arch/arm/include/asm/arch-rockchip/boot_mode.h
index 806a21d2c7..97b12316fa 100644
--- a/arch/arm/include/asm/arch-rockchip/boot_mode.h
+++ b/arch/arm/include/asm/arch-rockchip/boot_mode.h
@@ -21,6 +21,8 @@
 #define BOOT_CHARGING		(REBOOT_FLAG + 11)
 /* enter usb mass storage mode */
 #define BOOT_UMS		(REBOOT_FLAG + 12)
+/* enter dfu download mode */
+#define BOOT_DFU                (REBOOT_FLAG + 13)
 /* enter bootrom download mode */
 #define BOOT_BROM_DOWNLOAD	0xEF08A53C
 
diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index a615d9086b..9b87d00316 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -136,6 +136,10 @@ int rockchip_get_boot_mode(void)
 		printf("boot mode: loader\n");
 		boot_mode[PH] = BOOT_MODE_LOADER;
 		clear_boot_reg = 1;
+	} else if (reg_boot_mode == BOOT_DFU) {
+		printf("boot mode: dfu\n");
+		boot_mode[PH] = BOOT_MODE_DFU;
+		clear_boot_reg = 1;
 	} else if (reg_boot_mode == BOOT_FASTBOOT) {
 		printf("boot mode: bootloader\n");
 		boot_mode[PH] = BOOT_MODE_BOOTLOADER;
@@ -215,6 +219,12 @@ int setup_boot_mode(void)
 		printf("enter UMS!\n");
 		env_set("preboot", "setenv preboot; ums mmc 0");
 		break;
+#if defined(CONFIG_CMD_DFU)
+	case BOOT_MODE_DFU:
+		printf("enter DFU!\n");
+		env_set("preboot", "setenv preboot; dfu 0 ${devtype} ${devnum}; rbrom");
+		break;
+#endif
 	case BOOT_MODE_LOADER:
 		printf("enter Rockusb!\n");
 		env_set("preboot", "setenv preboot; rockusb 0 ${devtype} ${devnum}; rbrom");
diff --git a/include/boot_rkimg.h b/include/boot_rkimg.h
index 18b1309127..f12f62bd94 100644
--- a/include/boot_rkimg.h
+++ b/include/boot_rkimg.h
@@ -18,6 +18,7 @@ enum _boot_mode {
 	BOOT_MODE_BROM_DOWNLOAD,
 	BOOT_MODE_PANIC,
 	BOOT_MODE_WATCHDOG,
+	BOOT_MODE_DFU,
 	BOOT_MODE_UNDEFINE,
 };
 

commit 3fb0548687b4c590a553a350e315fe5e56d562e9
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Wed Mar 31 10:00:19 2021 +0800

    video/drm: display: Save mode clock
    
    For resolution floating refresh rate such as 59.94 Hz,
    the only difference between the resolution and its
    corresponding integer refresh rate resolution is the clock.
    
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
    Change-Id: I7d7b0de1f011e628c29e32c6e3dbc62e4523d153

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 488852edea..4ea33b5a11 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -1667,6 +1667,7 @@ void rockchip_display_fixup(void *blob)
 		FDT_SET_U32("logo,height", s->logo.height);
 		FDT_SET_U32("logo,bpp", s->logo.bpp);
 		FDT_SET_U32("logo,ymirror", s->logo.ymirror);
+		FDT_SET_U32("video,clock", s->conn_state.mode.clock);
 		FDT_SET_U32("video,hdisplay", s->conn_state.mode.hdisplay);
 		FDT_SET_U32("video,vdisplay", s->conn_state.mode.vdisplay);
 		FDT_SET_U32("video,crtc_hsync_end", s->conn_state.mode.crtc_hsync_end);

commit 32ed8ff28110069c0dd3709ea4fe91754fdf5b95
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Sun Mar 28 15:51:10 2021 +0800

    spi: rockchip_sfc: Support DLL tuning
    
    1.Support after SFC ver 4
    2.If the io rate is high than 100MHz, enable SFC delay line in
    default
    3.Get id byte as data pattern
    
    Change-Id: Id112ec3ae943b6fd131abe56abc508b358a7416f
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/spi/rockchip_sfc.c b/drivers/spi/rockchip_sfc.c
index 3885b42f6a..82767b59cd 100644
--- a/drivers/spi/rockchip_sfc.c
+++ b/drivers/spi/rockchip_sfc.c
@@ -41,12 +41,16 @@ struct rockchip_sfc_reg {
 	u32 sr;
 	u32 risr;
 	u32 ver;
-	u32 reserved[20];
+	u32 qop;
+	u32 ext_ctrl;
+	u32 reserved;
+	u32 dll_ctrl0;
+	u32 reserved1[16];
 	u32 dmatr;
 	u32 dmaaddr;
 	u32 len_ctrl;
 	u32 len_ext;
-	u32 reserved1[28];
+	u32 reserved2[28];
 	u32 cmd;
 	u32 addr;
 	u32 data;
@@ -104,15 +108,22 @@ check_member(rockchip_sfc_reg, data, 0x108);
 #define RX_UF_INT		BIT(1)        /* Rx fifo underflow interrupt */
 #define RX_FULL_INT		BIT(0)        /* Rx fifo full interrupt */
 
+/*SFC_DLL_CTRL0*/
+#define DLL_CTRL0_SCLK_SMP_DLL	BIT(15)       /* SCLK sampling enable dll */
+#define DLL_CTRL0_DLL_MAX_VER4	0xFFU
+#define DLL_CTRL0_DLL_MAX_VER5	0x1FFU
+
 #define SFC_MAX_TRB_VER3	(512 * 31)
 #define SFC_MAX_TRB_VER4	(0xFFFFFFFF)
 
-#define SFC_MAX_RATE		(100 * 1000 * 1000)
+#define SFC_MAX_RATE		(150 * 1000 * 1000)
+#define SFC_DLL_THRESHOLD_RATE	(100 * 1000 * 1000)
 #define SFC_DEFAULT_RATE	(80 * 1000 * 1000)
 #define SFC_MIN_RATE		(10 * 1000 * 1000)
 
 #define SFC_VER_3		0x3
 #define SFC_VER_4		0x4
+#define SFC_VER_5		0x5
 
 enum rockchip_sfc_if_type {
 	IF_TYPE_STD,
@@ -132,6 +143,7 @@ struct rockchip_sfc {
 	unsigned int mode;
 	unsigned int speed_hz;
 	u32 max_iosize;
+	u32 max_dll_cells;
 	bool prepare;
 	u32 last_prepare_size;
 	u32 cmd;
@@ -169,6 +181,23 @@ u32 rockchip_sfc_get_version(struct rockchip_sfc *sfc)
 	return  (u32)(readl(&regs->ver) & 0xFFFF);
 }
 
+int rockchip_sfc_set_delay_lines(struct rockchip_sfc *sfc, u32 cells)
+{
+	struct rockchip_sfc_reg *regs = sfc->regbase;
+
+	if (cells > sfc->max_dll_cells)
+		cells = sfc->max_dll_cells;
+
+	return writel(DLL_CTRL0_SCLK_SMP_DLL | cells, &regs->dll_ctrl0);
+}
+
+int rockchip_sfc_disable_delay_lines(struct rockchip_sfc *sfc)
+{
+	struct rockchip_sfc_reg *regs = sfc->regbase;
+
+	return writel(0, &regs->dll_ctrl0);
+}
+
 static int rockchip_sfc_probe(struct udevice *bus)
 {
 	struct rockchip_sfc_platdata *plat = dev_get_platdata(bus);
@@ -185,11 +214,20 @@ static int rockchip_sfc_probe(struct udevice *bus)
 	clk_set_rate(&sfc->clk, sfc->speed_hz);
 #endif
 	regs = sfc->regbase;
-	if (rockchip_sfc_get_version(sfc) >= SFC_VER_4) {
+	switch (rockchip_sfc_get_version(sfc)) {
+	case SFC_VER_5:
+		sfc->max_dll_cells = DLL_CTRL0_DLL_MAX_VER5;
 		sfc->max_iosize = SFC_MAX_TRB_VER4;
 		writel(1, &regs->len_ctrl);
-	} else {
+		break;
+	case SFC_VER_4:
+		sfc->max_dll_cells = DLL_CTRL0_DLL_MAX_VER4;
+		sfc->max_iosize = SFC_MAX_TRB_VER4;
+		writel(1, &regs->len_ctrl);
+		break;
+	default:
 		sfc->max_iosize = SFC_MAX_TRB_VER3;
+		break;
 	}
 
 	return 0;
@@ -320,7 +358,7 @@ static void rockchip_sfc_setup_xfer(struct rockchip_sfc *sfc, u32 trb)
 		writel(trb, &regs->len_ext);
 	}
 
-	val = 0x02;
+	val = 0x2;
 	val |= (data_width << SFC_DATA_WIDTH_SHIFT);
 
 	SFC_DBG("--- sfc.ctrl %x\n", val);
@@ -663,6 +701,45 @@ static int rockchip_sfc_set_speed(struct udevice *bus, uint speed)
 
 	sfc->speed_hz = speed;
 #if CONFIG_IS_ENABLED(CLK)
+	if (rockchip_sfc_get_version(sfc) >= SFC_VER_4 &&
+	    sfc->speed_hz > SFC_DLL_THRESHOLD_RATE) {
+		u8 id[3], id_temp[3];
+		int right, left = -1;
+
+		sfc->cmd = 0x9f;
+		sfc->addr = 0;
+		sfc->addr_bits = 0;
+		sfc->addr_xbits_ext = 8;
+		sfc->dummy_bits = 0;
+		sfc->rw = 0;
+		clk_set_rate(&sfc->clk, SFC_DLL_THRESHOLD_RATE);
+		rockchip_sfc_read(sfc, 0, (void *)&id, 3);
+
+		clk_set_rate(&sfc->clk, sfc->speed_hz);
+		sfc->speed_hz = clk_get_rate(&sfc->clk);
+		if (sfc->speed_hz > SFC_DLL_THRESHOLD_RATE) {
+			for (right = 0; right <= sfc->max_dll_cells; right++) {
+				rockchip_sfc_set_delay_lines(sfc, right);
+				rockchip_sfc_read(sfc, 0, (void *)&id_temp, 3);
+				SFC_DBG("sfc dll %d id= %x %x %x\n", right,
+					id_temp[0], id_temp[1], id_temp[2]);
+				if (left == -1 && !memcmp(&id, &id_temp, 3))
+					left = right;
+				else if (left >= 0 && memcmp(&id, &id_temp, 3))
+					break;
+			}
+
+			if (left >= 0 && (right - left > 10)) {
+				rockchip_sfc_set_delay_lines(sfc, (u32)((right + left) / 2));
+			} else {
+				rockchip_sfc_disable_delay_lines(sfc);
+				sfc->speed_hz = SFC_DLL_THRESHOLD_RATE;
+			}
+		}
+	} else if (rockchip_sfc_get_version(sfc) >= SFC_VER_4) {
+		rockchip_sfc_disable_delay_lines(sfc);
+	}
+
 	clk_set_rate(&sfc->clk, sfc->speed_hz);
 	SFC_DBG("%s clk= %ld\n", __func__, clk_get_rate(&sfc->clk));
 #endif

commit 42bb6aac60fa789c9daa873d3e572eea186533f8
Author: Tony Xu <tony.xu@rock-chips.com>
Date:   Wed Mar 10 14:17:45 2021 +0800

    driver: dfu: add rawubi part type to support A/B system
    
    Signed-off-by: Tony Xu <tony.xu@rock-chips.com>
    Change-Id: I3572ba1f649b09cc6c512bfa3e201172258a2516

diff --git a/drivers/dfu/dfu_mtd.c b/drivers/dfu/dfu_mtd.c
index 200d99d349..e0b8ce3e90 100644
--- a/drivers/dfu/dfu_mtd.c
+++ b/drivers/dfu/dfu_mtd.c
@@ -126,11 +126,13 @@ int dfu_fill_entity_mtd(struct dfu_entity *dfu, char *devstr, char *s)
 	dfu->dev_type = DFU_DEV_MTD;
 	st = strsep(&s, " ");
 
-	if (!strcmp(st, "raw")) {
+	if (!strcmp(st, "raw") || !strcmp(st, "rawubi")) {
 		dfu->layout = DFU_RAW_ADDR;
 		dfu->data.mtd.start = simple_strtoul(s, &s, 16);
 		s++;
 		dfu->data.mtd.size = simple_strtoul(s, &s, 16);
+		if (!strcmp(st, "rawubi"))
+			dfu->data.mtd.ubi = 1;
 	} else if ((!strcmp(st, "part")) || (!strcmp(st, "partubi"))) {
 		dev_desc = rockchip_get_bootdev();
 		if (!dev_desc) {

commit e091b6c996a68a6a0faa2bd3ffdd90b3ba5f44ce
Author: Wenping Zhang <wenping.zhang@rock-chips.com>
Date:   Fri Mar 26 19:30:25 2021 +0800

    tools: bmp2gray16: fix segment fault because of image size error.
    
    If the image size of gray16 data is not 512 bytes align, it will
    cause segment fault.
    
    Change-Id: Idc7e86226032e5deea225ea90203402661e78528
    Signed-off-by: Wenping Zhang <wenping.zhang@rock-chips.com>

diff --git a/tools/rockchip/bmp2gray16.c b/tools/rockchip/bmp2gray16.c
old mode 100644
new mode 100755
index 27627c812f..a7f3d68f5b
--- a/tools/rockchip/bmp2gray16.c
+++ b/tools/rockchip/bmp2gray16.c
@@ -362,8 +362,7 @@ out:
 	return ret;
 }
 
-void *init_grayscale_logo_buf(int logo_count, uint32_t screen_w,
-			      uint32_t screen_h)
+void *init_grayscale_logo_buf(int logo_count, uint32_t size_one_image)
 {
 	int size;
 	void *out_buf;
@@ -375,7 +374,7 @@ void *init_grayscale_logo_buf(int logo_count, uint32_t screen_w,
 	size = size_of_header();
 	fprintf(stderr, "size of header in logo.img is %d\n", size);
 	//every pixel of the grayscale image is 4 bits
-	size += logo_count * screen_w * screen_h / 2;
+	size += logo_count * size_one_image;
 	out_buf = calloc(1, size);
 
 	return out_buf;
@@ -504,16 +503,16 @@ int main(int argc, char *argv[])
 		usage();
 		return -1;
 	}
+	hdr_size = size_of_header();
+	one_img_size = size_of_one_image();
 
-	out_buf = init_grayscale_logo_buf(logo_count, screen_w, screen_h);
+	out_buf = init_grayscale_logo_buf(logo_count, one_img_size);
 	if (!out_buf) {
 		fprintf(stderr, "Can't malloc buffer for grayscale image.\n");
 		fclose(file);
 		return -1;
 	}
 
-	hdr_size = size_of_header();
-	one_img_size = size_of_one_image();
 	logo_hdr = (struct logo_info *)out_buf;
 	fprintf(stderr, "logo count is %d,one_img_size=%d,size=%d.\n",
 		logo_count, one_img_size, screen_w * screen_h / 2);

commit 03781805684cf20c4d80fa0790a64f1f35170c66
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 10 11:15:40 2021 +0800

    rockchip: kernel dtb: support always use embed kernel dtb
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I7197c65dc315eb513f072a325cf57c2a079c0674

diff --git a/Makefile b/Makefile
index 3506a949d0..d3e3d3764d 100644
--- a/Makefile
+++ b/Makefile
@@ -906,12 +906,12 @@ else ifeq ($(CONFIG_OF_SEPARATE),y)
 u-boot-dtb.bin: u-boot-nodtb.bin dts/dt.dtb FORCE
 	$(call if_changed,cat)
 
-EMBEDED_KERN_DTB := $(CONFIG_EMBEDED_KERNEL_DTB_PATH:"%"=%)
-ifneq ($(wildcard $(EMBEDED_KERN_DTB)),)
+EMBED_KERN_DTB := $(CONFIG_EMBED_KERNEL_DTB_PATH:"%"=%)
+ifneq ($(wildcard $(EMBED_KERN_DTB)),)
 u-boot-dtb-kern.bin: u-boot-dtb.bin FORCE
 	$(call if_changed,copy)
 	$(call if_changed,truncate)
-u-boot.bin: u-boot-dtb-kern.bin $(EMBEDED_KERN_DTB) FORCE
+u-boot.bin: u-boot-dtb-kern.bin $(EMBED_KERN_DTB) FORCE
 	$(call if_changed,cat)
 else
 u-boot.bin: u-boot-dtb.bin FORCE
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 2daeb368f0..75df015050 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -721,10 +721,21 @@ config USING_KERNEL_DTB
 	  the uart and emmc will still using U-Boot dtb, but other devices like
 	  regulator/pmic, display, usb will use dts node from kernel.
 
-config EMBEDED_KERNEL_DTB_PATH
+config EMBED_KERNEL_DTB_PATH
 	string "Embeded kernel dtb file path"
 	depends on USING_KERNEL_DTB
 	default "dts/kern.dtb"
+	help
+	  This file will auto be appended to the u-boot.bin.
+
+config EMBED_KERNEL_DTB_ALWAYS
+	bool "Always using embed kernel dtb"
+	depends on USING_KERNEL_DTB
+	default n
+	help
+	  Allow fallback to always use a prepared kernel dtb even USING_KERNEL_DTB
+	  is set. This makes U-Boot stage more stable but not flexible any more to
+	  compatible different boards.
 
 config ROCKCHIP_CRC
 	bool "Rockchip CRC verify images"
diff --git a/arch/arm/mach-rockchip/kernel_dtb.c b/arch/arm/mach-rockchip/kernel_dtb.c
index 804aac34fc..28ea10dd6f 100644
--- a/arch/arm/mach-rockchip/kernel_dtb.c
+++ b/arch/arm/mach-rockchip/kernel_dtb.c
@@ -255,7 +255,7 @@ int init_kernel_dtb(void)
 {
 	ulong fdt_addr;
 	void *ufdt_blob;
-	int ret;
+	int ret = -ENODEV;
 
 	fdt_addr = env_get_ulong("fdt_addr_r", 16, 0);
 	if (!fdt_addr) {
@@ -263,6 +263,11 @@ int init_kernel_dtb(void)
 		return -ENODEV;
 	}
 
+	if (IS_ENABLED(CONFIG_EMBED_KERNEL_DTB_ALWAYS)) {
+		printf("Always embed kernel dtb\n");
+		goto dtb_embed;
+	}
+
 	ret = rockchip_read_dtb_file((void *)fdt_addr);
 	if (!ret) {
 		if (!dtb_check_ok((void *)fdt_addr, (void *)gd->fdt_blob)) {
@@ -273,6 +278,7 @@ int init_kernel_dtb(void)
 		}
 	}
 
+dtb_embed:
 	if (!fdt_check_header(gd->fdt_blob_kern)) {
 		if (!dtb_check_ok((void *)gd->fdt_blob_kern, (void *)gd->fdt_blob)) {
 			printf("Embedded kernel dtb mismatch this platform!\n");
@@ -284,10 +290,16 @@ int init_kernel_dtb(void)
 		if (!fdt_addr)
 			return -ENOMEM;
 
+		/*
+		 * Alloc another space for this embed kernel dtb.
+		 * Because "fdt_addr_r" *MUST* be the fdt passed to kernel.
+		 */
 		memcpy((void *)fdt_addr, gd->fdt_blob_kern,
 		       fdt_totalsize(gd->fdt_blob_kern));
-		printf("DTB: embedded kern.dtb\n");
-	} else {
+		printf("DTB: %s\n", CONFIG_EMBED_KERNEL_DTB_PATH);
+	}
+
+	if (fdt_check_header((void *)fdt_addr)) {
 		printf("Failed to get kernel dtb, ret=%d\n", ret);
 		return ret;
 	}
diff --git a/arch/arm/mach-rockchip/make_fit_atf.sh b/arch/arm/mach-rockchip/make_fit_atf.sh
index a9723c4fef..21f2395bad 100755
--- a/arch/arm/mach-rockchip/make_fit_atf.sh
+++ b/arch/arm/mach-rockchip/make_fit_atf.sh
@@ -49,7 +49,7 @@ function generate_uboot_node()
 
 function generate_kfdt_node()
 {
-	KERN_DTB=`sed -n "/CONFIG_EMBEDED_KERNEL_DTB_PATH=/s/CONFIG_EMBEDED_KERNEL_DTB_PATH=//p" .config | tr -d '"'`
+	KERN_DTB=`sed -n "/CONFIG_EMBED_KERNEL_DTB_PATH=/s/CONFIG_EMBED_KERNEL_DTB_PATH=//p" .config | tr -d '"'`
 	if [ -z "${KERN_DTB}" ]; then
 		return;
 	fi
@@ -57,7 +57,7 @@ function generate_kfdt_node()
 	if [ -f ${srctree}/${KERN_DTB} ]; then
 	PROP_KERN_DTB=', "kern-fdt"';
 	echo "		kern-fdt {
-			description = \"Kernel dtb\";
+			description = \"${KERN_DTB}\";
 			data = /incbin/(\"${KERN_DTB}\");
 			type = \"flat_dt\";
 			arch = \"${ARCH}\";
diff --git a/arch/arm/mach-rockchip/make_fit_optee.sh b/arch/arm/mach-rockchip/make_fit_optee.sh
index ae767bd5a3..baa30ee2ad 100755
--- a/arch/arm/mach-rockchip/make_fit_optee.sh
+++ b/arch/arm/mach-rockchip/make_fit_optee.sh
@@ -67,14 +67,14 @@ else
 	SIGN_IMAGES="			        sign-images = \"fdt\", \"firmware\", \"loadables\";"
 fi
 
-KERN_DTB=`sed -n "/CONFIG_EMBEDED_KERNEL_DTB_PATH=/s/CONFIG_EMBEDED_KERNEL_DTB_PATH=//p" .config | tr -d '"'`
+KERN_DTB=`sed -n "/CONFIG_EMBED_KERNEL_DTB_PATH=/s/CONFIG_EMBED_KERNEL_DTB_PATH=//p" .config | tr -d '"'`
 if [ -z "${KERN_DTB}" ]; then
 	return;
 fi
 if [ -f ${srctree}/${KERN_DTB} ]; then
 	PROP_KERN_DTB=', "kern-fdt"';
 	KFDT_NODE="		kern-fdt {
-			description = \"Kernel dtb\";
+			description = \"${KERN_DTB}\";
 			data = /incbin/(\"${KERN_DTB}\");
 			type = \"flat_dt\";
 			arch = \"${ARCH}\";

commit e6f9952b8075440b5ff3e6899df6d4b3f01052db
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Mar 24 19:05:20 2021 +0800

    pinctrl: rv1126: Add i2c2 iomux sel
    
    Change-Id: Ib5f6c8e1d66fb8768faabe64fc1863685a9a9c32
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/pinctrl/rockchip/pinctrl-rv1126.c b/drivers/pinctrl/rockchip/pinctrl-rv1126.c
index f82aa60750..17db59f9ee 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rv1126.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rv1126.c
@@ -137,6 +137,7 @@ static struct rockchip_mux_route_data rv1126_mux_route_data[] = {
 
 	MR_PMUGRF(RK_GPIO0, RK_PB6, RK_FUNC_2, 0x0118, RK_GENMASK_VAL(2, 2, 0)), /* UART1_TX_M0 */
 	MR_PMUGRF(RK_GPIO1, RK_PD0, RK_FUNC_5, 0x0118, RK_GENMASK_VAL(2, 2, 1)), /* UART1_TX_M1 */
+	MR_PMUGRF(RK_GPIO0, RK_PC3, RK_FUNC_1, 0x0118, RK_GENMASK_VAL(4, 4, 1)), /* I2C2 */
 };
 
 static int rv1126_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)

commit d81b1e19a8ca6921e9a155a76886fbbaadf88738
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Mon Mar 22 17:16:45 2021 +0800

    arm: mach-rockchip: rk3568: remove phy ref clock confit to 24Mhz
    
    The combo phy using default 25Mhz ref clock config and already support
    De-assert reset, here need to remove the config code.
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: Ief026dacf256f12b613ae90827b2991aa173c0af

diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c
index 5455d20701..78d309e8a2 100644
--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
@@ -914,14 +914,6 @@ int arch_cpu_init(void)
 	writel(((0x1 << 14) << 16) | (0x0 << 14), SGRF_BASE + SGRF_SOC_CON3);
 #endif
 
-#if defined(CONFIG_SCSI) && defined(CONFIG_CMD_SCSI) && defined(CONFIG_AHCI)
-	/*
-	 * De-assert reset and config ref clock to default 24Mhz.
-	 */
-	 writel(0x02a00000, CRU_BASE + CRU_SOFTRST_CON28);
-	 writel(0x0FFF0000, 0xFDD00124);
-#endif
-
 	return 0;
 }
 

commit 4730583a92356c3ccd1df66c1204838fe73df550
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Mar 24 18:51:12 2021 +0800

    pinctrl: rockchip: Add handle for IOMUX_L_SOURCE_PMU offset
    
    Change-Id: Id330158f16606d1683de070a5694725d5deaba6b
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
index f1bfee2bb4..7f1fa1a76a 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
@@ -554,13 +554,14 @@ static struct rockchip_pin_ctrl *rockchip_pinctrl_get_soc_data(struct udevice *d
 
 			/* preset iomux offset value, set new start value */
 			if (iom->offset >= 0) {
-				if (iom->type & IOMUX_SOURCE_PMU)
+				if ((iom->type & IOMUX_SOURCE_PMU) || (iom->type & IOMUX_L_SOURCE_PMU))
 					pmu_offs = iom->offset;
 				else
 					grf_offs = iom->offset;
 			} else { /* set current iomux offset */
-				iom->offset = (iom->type & IOMUX_SOURCE_PMU) ?
-							pmu_offs : grf_offs;
+				iom->offset = ((iom->type & IOMUX_SOURCE_PMU) ||
+						(iom->type & IOMUX_L_SOURCE_PMU)) ?
+						pmu_offs : grf_offs;
 			}
 
 			/* preset drv offset value, set new start value */

commit 1318c13d0c3c417ea8e74f2bbba787cf048e44e3
Author: David Wu <david.wu@rock-chips.com>
Date:   Thu Mar 18 16:58:33 2021 +0800

    rockchip: defconfig: Enable CONFIG_RESET_ROCKCHIP for rk3329-evb
    
    The integtated phy inside the rk3229 need the reset request for power up.
    
    Change-Id: I22eb0cbcca399b001503d277814203c4e6d1cd7d
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index 9fe67375b9..e0f5d384c7 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -68,6 +68,7 @@ CONFIG_PINCTRL=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
+CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0x11030000
 CONFIG_DEBUG_UART_CLOCK=24000000

commit df3abc8d26e95fa316078c80ff5ad035828c874f
Author: David Wu <david.wu@rock-chips.com>
Date:   Thu Mar 18 16:49:19 2021 +0800

    ARM: dts: rockchip: Enable gmac2phy feature for rk3328-evb
    
    In fact, the rk3328-evb is default supported the integrated phy,
    not need to change any hardware. So it is better to enbale it and
    disable external 1000M phy.
    
    Change-Id: I393e9f5dba7f6d87902bc0a7eb4b832c8211197e
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts
index 3025bff09f..b5a64d30e1 100644
--- a/arch/arm/dts/rk3328-evb.dts
+++ b/arch/arm/dts/rk3328-evb.dts
@@ -120,6 +120,16 @@
 	status = "okay";
 };
 
+&gmac2phy {
+	phy-supply = <&vcc_phy>;
+	clock_in_out = "output";
+	assigned-clocks = <&cru SCLK_MAC2PHY_SRC>;
+	assigned-clock-rate = <50000000>;
+	assigned-clocks = <&cru SCLK_MAC2PHY>;
+	assigned-clock-parents = <&cru SCLK_MAC2PHY_SRC>;
+	status = "okay";
+};
+
 &u2phy {
 	status = "okay";
 };

commit 6ab7f324519cae90c5aeff23c67ecb1a7258bf1b
Author: David Wu <david.wu@rock-chips.com>
Date:   Thu Mar 18 16:48:00 2021 +0800

    ARM: dts: rockchip: Add gmac2phy dts node for rk3328
    
    The gmac2phy is connected with integrated with phy, we can
    fix the phy node at dtsi level.
    
    Change-Id: Ieb9f916cac464efba66ea88db2f935c4aec0888e
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi
index d9c0c80a08..ee5f6cbe09 100644
--- a/arch/arm/dts/rk3328.dtsi
+++ b/arch/arm/dts/rk3328.dtsi
@@ -561,6 +561,41 @@
 		status = "disabled";
 	};
 
+	gmac2phy: ethernet@ff550000 {
+		compatible = "rockchip,rk3328-gmac";
+		reg = <0x0 0xff550000 0x0 0x10000>;
+		rockchip,grf = <&grf>;
+		interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "macirq";
+		clocks = <&cru SCLK_MAC2PHY_SRC>, <&cru SCLK_MAC2PHY_RXTX>,
+			 <&cru SCLK_MAC2PHY_RXTX>, <&cru SCLK_MAC2PHY_REF>,
+			 <&cru ACLK_MAC2PHY>, <&cru PCLK_MAC2PHY>,
+			 <&cru SCLK_MAC2PHY_OUT>;
+		clock-names = "stmmaceth", "mac_clk_rx",
+			      "mac_clk_tx", "clk_mac_ref",
+			      "aclk_mac", "pclk_mac",
+			      "clk_macphy";
+		resets = <&cru SRST_GMAC2PHY_A>, <&cru SRST_MACPHY>;
+		reset-names = "stmmaceth", "mac-phy";
+		phy-mode = "rmii";
+		phy-handle = <&phy>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&fephyled_rxm1 &fephyled_linkm1>;
+		status = "disabled";
+
+		mdio {
+			compatible = "snps,dwmac-mdio";
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			phy: phy@0 {
+				compatible = "ethernet-phy-id1234.d400", "ethernet-phy-ieee802.3-c22";
+				reg = <0>;
+				phy-is-integrated;
+			};
+		};
+	};
+
 	usb_host0_ehci: usb@ff5c0000 {
 		compatible = "generic-ehci";
 		reg = <0x0 0xff5c0000 0x0 0x10000>;

commit 67a2a1dd5cea8c393ea31469c8105ef00be632a4
Author: David Wu <david.wu@rock-chips.com>
Date:   Thu Mar 18 16:46:19 2021 +0800

    clk: rk3328: Implement the gmac2phy clock assignment
    
    Implement the setting parent and rate for gmac2phy clock, and
    add internal pll div set for gmac2phy clk.
    
    Change-Id: I6d083a562979c3f9ef71fa581d90af1b3ecb9aa9
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3328.h b/arch/arm/include/asm/arch-rockchip/cru_rk3328.h
index b2f5a7f466..a412c72a87 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3328.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3328.h
@@ -109,6 +109,14 @@ enum {
 	CORE_DBG_DIV_SHIFT		= 0,
 	CORE_DBG_DIV_MASK		= 0x0f << CORE_DBG_DIV_SHIFT,
 
+	/* CLKSEL_CON26 */
+	GMAC2PHY_PLL_SEL_SHIFT          = 7,
+	GMAC2PHY_PLL_SEL_MASK           = 1 << GMAC2PHY_PLL_SEL_SHIFT,
+	GMAC2PHY_PLL_SEL_CPLL           = 0,
+	GMAC2PHY_PLL_SEL_GPLL           = 1,
+	GMAC2PHY_CLK_DIV_MASK           = 0x1f,
+	GMAC2PHY_CLK_DIV_SHIFT          = 0,
+
 	/* CLKSEL_CON27 */
 	GMAC2IO_PLL_SEL_SHIFT		= 7,
 	GMAC2IO_PLL_SEL_MASK		= 1 << GMAC2IO_PLL_SEL_SHIFT,
diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c
index f4feb2f10a..8f55b473e5 100644
--- a/drivers/clk/rockchip/clk_rk3328.c
+++ b/drivers/clk/rockchip/clk_rk3328.c
@@ -278,6 +278,39 @@ static ulong rk3328_gmac2io_set_clk(struct rk3328_clk_priv *priv, ulong rate)
 
 	return ret;
 }
+
+static ulong rk3328_gmac2phy_src_set_clk(struct rk3328_cru *cru, ulong rate)
+{
+	u32 con = readl(&cru->clksel_con[26]);
+	ulong pll_rate;
+	u8 div;
+
+	if ((con >> GMAC2PHY_PLL_SEL_SHIFT) & GMAC2PHY_PLL_SEL_GPLL)
+		pll_rate = GPLL_HZ;
+	else
+		pll_rate = CPLL_HZ;
+
+	div = DIV_ROUND_UP(pll_rate, rate) - 1;
+	if (div <= 0x1f)
+		rk_clrsetreg(&cru->clksel_con[26], GMAC2PHY_CLK_DIV_MASK,
+			     div << GMAC2PHY_CLK_DIV_SHIFT);
+	else
+		debug("Unsupported div for gmac:%d\n", div);
+
+	return DIV_TO_RATE(pll_rate, div);
+}
+
+static ulong rk3328_gmac2phy_set_clk(struct rk3328_cru *cru, ulong rate)
+{
+	struct rk3328_grf_regs *grf;
+
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	if (readl(&grf->mac_con[2]) & BIT(10))
+		/* An external clock will always generate the right rate... */
+		return rate;
+	else
+		return rk3328_gmac2phy_src_set_clk(cru, rate);
+}
 #endif
 
 static ulong rk3328_mmc_get_clk(struct rk3328_clk_priv *priv, uint clk_id)
@@ -887,6 +920,12 @@ static ulong rk3328_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_MAC2IO:
 		ret = rk3328_gmac2io_set_clk(priv, rate);
 		break;
+	case SCLK_MAC2PHY:
+		ret = rk3328_gmac2phy_set_clk(priv->cru, rate);
+		break;
+	case SCLK_MAC2PHY_SRC:
+		ret = rk3328_gmac2phy_src_set_clk(priv->cru, rate);
+		break;
 	case SCLK_PWM:
 		ret = rk3328_pwm_set_clk(priv, rate);
 		break;
@@ -1014,6 +1053,43 @@ static int rk3328_gmac2io_ext_set_parent(struct clk *clk, struct clk *parent)
 	return -EINVAL;
 }
 
+static int rk3328_gmac2phy_set_parent(struct clk *clk, struct clk *parent)
+{
+	struct rk3328_grf_regs *grf;
+	const char *clock_output_name;
+	int ret;
+
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
+	/*
+	 * If the requested parent is in the same clock-controller and the id
+	 * is SCLK_MAC2PHY_SRC ("clk_mac2phy_src"), switch to the internal clock.
+	 */
+	if ((parent->dev == clk->dev) && (parent->id == SCLK_MAC2PHY_SRC)) {
+		debug("%s: switching MAC CLK to SCLK_MAC2IO_PHY\n", __func__);
+		rk_clrreg(&grf->mac_con[2], BIT(10));
+		return 0;
+	}
+
+	/*
+	 * Otherwise, we need to check the clock-output-names of the
+	 * requested parent to see if the requested id is "phy_50m_out".
+	 */
+	ret = dev_read_string_index(parent->dev, "clock-output-names",
+				    parent->id, &clock_output_name);
+	if (ret < 0)
+		return -ENODATA;
+
+	/* If this is "phy_50m_out", switch to the external clock input */
+	if (!strcmp(clock_output_name, "phy_50m_out")) {
+		debug("%s: switching MAC CLK to PHY_50M_OUT\n", __func__);
+		rk_setreg(&grf->mac_con[2], BIT(10));
+		return 0;
+	}
+
+	return -EINVAL;
+}
+
 static int rk3328_lcdc_set_parent(struct clk *clk, struct clk *parent)
 {
 	struct rk3328_clk_priv *priv = dev_get_priv(clk->dev);
@@ -1047,6 +1123,8 @@ static int rk3328_clk_set_parent(struct clk *clk, struct clk *parent)
 		return rk3328_gmac2io_set_parent(clk, parent);
 	case SCLK_MAC2IO_EXT:
 		return rk3328_gmac2io_ext_set_parent(clk, parent);
+	case SCLK_MAC2PHY:
+		return rk3328_gmac2phy_set_parent(clk, parent);
 	case DCLK_LCDC:
 		return rk3328_lcdc_set_parent(clk, parent);
 #endif

commit fed881026f9cd5f3f0bf226ea5adb0f80d571361
Author: David Wu <david.wu@rock-chips.com>
Date:   Thu Mar 18 15:13:45 2021 +0800

    ARM: dts: rockchip: Add integrated phy reset and clock for rk322x
    
    To support the integrated phy for rk322x, add their reset and clock
    property at dtsi level.
    
    Change-Id: I7b0c9e174392cb97f09bf0588720c4641f6d0bc6
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/dts/rk322x.dtsi b/arch/arm/dts/rk322x.dtsi
index f3cb5ad07f..0afd4c4650 100644
--- a/arch/arm/dts/rk322x.dtsi
+++ b/arch/arm/dts/rk322x.dtsi
@@ -525,13 +525,13 @@
 		clocks = <&cru SCLK_MAC>, <&cru SCLK_MAC_RX>,
 			<&cru SCLK_MAC_TX>, <&cru SCLK_MAC_REF>,
 			<&cru SCLK_MAC_REFOUT>, <&cru ACLK_GMAC>,
-			<&cru PCLK_GMAC>;
+			<&cru PCLK_GMAC>, <&cru SCLK_MAC_PHY>;
 		clock-names = "stmmaceth", "mac_clk_rx",
 			"mac_clk_tx", "clk_mac_ref",
 			"clk_mac_refout", "aclk_mac",
-			"pclk_mac";
-		resets = <&cru SRST_GMAC>;
-		reset-names = "stmmaceth";
+			"pclk_mac", "clk_macphy";
+		resets = <&cru SRST_GMAC>, <&cru SRST_MACPHY>;
+		reset-names = "stmmaceth", "mac-phy";
 		rockchip,grf = <&grf>;
 		status = "disabled";
 	};

commit 56e11a8cc32c299b10a419837ecb45defdeb5fdb
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Mar 17 18:55:06 2021 +0800

    clk: rockchip: Add SCLK_MAC_SRC clock rate setup
    
    The SCLK_MAC_SRC is the same as the SCLK_MAC, it is requested
    by the integrated phy usuage.
    
    Change-Id: Ifc63fa7ff9e9734cd5d59fab38f4cde13afa4183
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c
index f638c808c5..bcae538aeb 100644
--- a/drivers/clk/rockchip/clk_rk322x.c
+++ b/drivers/clk/rockchip/clk_rk322x.c
@@ -688,6 +688,7 @@ static ulong rk322x_clk_set_rate(struct clk *clk, ulong rate)
 		ret = rk322x_peri_set_clk(priv, clk->id, rate);
 		break;
 #ifndef CONFIG_SPL_BUILD
+	case SCLK_MAC_SRC:
 	case SCLK_MAC:
 		ret = rk322x_mac_set_clk(priv, rate);
 		break;

commit 4b495484783d53caf4f026c81f68aa6787d518f7
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Mar 17 18:48:52 2021 +0800

    clk: rockchip: fix the gmac selection of pll source for rk322x
    
    There is a wrong selection for gmac pll source, fix it.
    
    Change-Id: I385a6f1f1dc0b9465ddacf1468c2e62d55f2c649
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c
index fe08e344a0..f638c808c5 100644
--- a/drivers/clk/rockchip/clk_rk322x.c
+++ b/drivers/clk/rockchip/clk_rk322x.c
@@ -194,7 +194,7 @@ static ulong rk322x_mac_set_clk(struct rk322x_clk_priv *priv, uint freq)
 		ulong pll_rate;
 		u8 div;
 
-		if ((con >> MAC_PLL_SEL_SHIFT) & MAC_PLL_SEL_MASK)
+		if (con & MAC_PLL_SEL_MASK)
 			pll_rate = priv->gpll_hz;
 		else
 			/* CPLL is not set */

commit 491f3bfbf44a780862ac564f34d6d2c1c828d188
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Mar 17 18:32:09 2021 +0800

    net: gmac_rockchip: Add rmii interface and rmii speed setup for rk3228 and rk3328 integrated phy
    
    The rk3228 and rk3328 Socs both have rmii interface, that might be used,
    so add them for usage. Both they support integrated phy, implement their
    power up function to support it.
    
    Change-Id: I298e9d85fd31851e594b46bce48046533abb24f3
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/net/gmac_rockchip.c b/drivers/net/gmac_rockchip.c
index 2b72bf75ef..ff3a8e4114 100644
--- a/drivers/net/gmac_rockchip.c
+++ b/drivers/net/gmac_rockchip.c
@@ -10,6 +10,7 @@
 #include <dm.h>
 #include <clk.h>
 #include <phy.h>
+#include <reset.h>
 #include <syscon.h>
 #include <asm/io.h>
 #include <asm/arch/periph.h>
@@ -33,6 +34,7 @@
 #include <dt-bindings/clock/rk3288-cru.h>
 #endif
 #include <dm/pinctrl.h>
+#include <dm/of_access.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -42,6 +44,7 @@ struct rockchip_eth_dev {
 #else
 	struct dw_eth_dev dw;
 #endif
+	int phy_interface;
 };
 
 /*
@@ -55,7 +58,10 @@ struct gmac_rockchip_platdata {
 #else
 	struct eth_pdata eth_pdata;
 #endif
+	struct reset_ctl phy_reset;
+	bool integrated_phy;
 	bool clock_input;
+	int phy_interface;
 	int tx_delay;
 	int rx_delay;
 	int bus_id;
@@ -65,9 +71,11 @@ struct rk_gmac_ops {
 #ifdef CONFIG_DWC_ETH_QOS
 	const struct eqos_config config;
 #endif
-	int (*fix_mac_speed)(struct rockchip_eth_dev *dev);
+	int (*fix_mac_speed)(struct gmac_rockchip_platdata *pdata,
+			     struct rockchip_eth_dev *dev);
 	void (*set_to_rmii)(struct gmac_rockchip_platdata *pdata);
 	void (*set_to_rgmii)(struct gmac_rockchip_platdata *pdata);
+	void (*integrated_phy_powerup)(struct gmac_rockchip_platdata *pdata);
 };
 
 #ifdef CONFIG_DWC_ETH_QOS
@@ -96,7 +104,9 @@ void gmac_set_rgmii(struct udevice *dev, u32 tx_delay, u32 rx_delay)
 static int gmac_rockchip_ofdata_to_platdata(struct udevice *dev)
 {
 	struct gmac_rockchip_platdata *pdata = dev_get_platdata(dev);
+	struct ofnode_phandle_args args;
 	const char *string;
+	int ret;
 
 	string = dev_read_string(dev, "clock_in_out");
 	if (!strcmp(string, "input"))
@@ -104,6 +114,25 @@ static int gmac_rockchip_ofdata_to_platdata(struct udevice *dev)
 	else
 		pdata->clock_input = false;
 
+	/* If phy-handle property is passed from DT, use it as the PHY */
+	ret = dev_read_phandle_with_args(dev, "phy-handle", NULL, 0, 0, &args);
+	if (ret) {
+		debug("Cannot get phy phandle: ret=%d\n", ret);
+		pdata->integrated_phy = dev_read_bool(dev, "phy-is-integrated");
+	} else {
+		debug("Found phy-handle subnode\n");
+		pdata->integrated_phy = ofnode_read_bool(args.node,
+							 "phy-is-integrated");
+	}
+
+	if (pdata->integrated_phy) {
+		ret = reset_get_by_name(dev, "mac-phy", &pdata->phy_reset);
+		if (ret) {
+			debug("No PHY reset control found: ret=%d\n", ret);
+			return ret;
+		}
+	}
+
 	/* Check the new naming-style first... */
 	pdata->tx_delay = dev_read_u32_default(dev, "tx_delay", -ENOENT);
 	pdata->rx_delay = dev_read_u32_default(dev, "rx_delay", -ENOENT);
@@ -122,7 +151,8 @@ static int gmac_rockchip_ofdata_to_platdata(struct udevice *dev)
 }
 
 #ifndef CONFIG_DWC_ETH_QOS
-static int px30_gmac_fix_mac_speed(struct rockchip_eth_dev *dev)
+static int px30_gmac_fix_mac_speed(struct gmac_rockchip_platdata *pdata,
+				   struct rockchip_eth_dev *dev)
 {
 	struct dw_eth_dev *priv = &dev->dw;
 	struct px30_grf *grf;
@@ -164,7 +194,8 @@ static int px30_gmac_fix_mac_speed(struct rockchip_eth_dev *dev)
 	return 0;
 }
 
-static int rk1808_gmac_fix_mac_speed(struct rockchip_eth_dev *dev)
+static int rk1808_gmac_fix_mac_speed(struct gmac_rockchip_platdata *pdata,
+				     struct rockchip_eth_dev *dev)
 {
 	struct dw_eth_dev *priv = &dev->dw;
 	struct clk clk_speed;
@@ -199,7 +230,8 @@ static int rk1808_gmac_fix_mac_speed(struct rockchip_eth_dev *dev)
 	return 0;
 }
 
-static int rk3228_gmac_fix_mac_speed(struct rockchip_eth_dev *dev)
+static int rk3228_gmac_fix_mac_speed(struct gmac_rockchip_platdata *pdata,
+				     struct rockchip_eth_dev *dev)
 {
 	struct dw_eth_dev *priv = &dev->dw;
 	struct rk322x_grf *grf;
@@ -210,14 +242,26 @@ static int rk3228_gmac_fix_mac_speed(struct rockchip_eth_dev *dev)
 		RK3228_GMAC_CLK_SEL_125M  = 0 << 8,
 		RK3228_GMAC_CLK_SEL_25M   = 3 << 8,
 		RK3228_GMAC_CLK_SEL_2_5M  = 2 << 8,
+
+		RK3228_GMAC_RMII_CLK_MASK   = BIT(7),
+		RK3228_GMAC_RMII_CLK_2_5M   = 0,
+		RK3228_GMAC_RMII_CLK_25M    = BIT(7),
+
+		RK3228_GMAC_RMII_SPEED_MASK = BIT(2),
+		RK3228_GMAC_RMII_SPEED_10   = 0,
+		RK3228_GMAC_RMII_SPEED_100  = BIT(2),
 	};
 
 	switch (priv->phydev->speed) {
 	case 10:
-		clk = RK3228_GMAC_CLK_SEL_2_5M;
+		clk = (pdata->phy_interface == PHY_INTERFACE_MODE_RMII) ?
+		       (RK3228_GMAC_RMII_CLK_2_5M | RK3228_GMAC_RMII_SPEED_10) :
+		       RK3228_GMAC_CLK_SEL_2_5M;
 		break;
 	case 100:
-		clk = RK3228_GMAC_CLK_SEL_25M;
+		clk = (pdata->phy_interface == PHY_INTERFACE_MODE_RMII) ?
+		       (RK3228_GMAC_RMII_CLK_25M | RK3228_GMAC_RMII_SPEED_100) :
+		       RK3228_GMAC_CLK_SEL_25M;
 		break;
 	case 1000:
 		clk = RK3228_GMAC_CLK_SEL_125M;
@@ -228,12 +272,17 @@ static int rk3228_gmac_fix_mac_speed(struct rockchip_eth_dev *dev)
 	}
 
 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	rk_clrsetreg(&grf->mac_con[1], RK3228_GMAC_CLK_SEL_MASK, clk);
+	rk_clrsetreg(&grf->mac_con[1],
+		     RK3228_GMAC_CLK_SEL_MASK |
+		     RK3228_GMAC_RMII_CLK_MASK |
+		     RK3228_GMAC_RMII_SPEED_MASK,
+		     clk);
 
 	return 0;
 }
 
-static int rk3288_gmac_fix_mac_speed(struct rockchip_eth_dev *dev)
+static int rk3288_gmac_fix_mac_speed(struct gmac_rockchip_platdata *pdata,
+				     struct rockchip_eth_dev *dev)
 {
 	struct dw_eth_dev *priv = &dev->dw;
 	struct rk3288_grf *grf;
@@ -260,7 +309,8 @@ static int rk3288_gmac_fix_mac_speed(struct rockchip_eth_dev *dev)
 	return 0;
 }
 
-static int rk3308_gmac_fix_mac_speed(struct rockchip_eth_dev *dev)
+static int rk3308_gmac_fix_mac_speed(struct gmac_rockchip_platdata *pdata,
+				     struct rockchip_eth_dev *dev)
 {
 	struct dw_eth_dev *priv = &dev->dw;
 	struct rk3308_grf *grf;
@@ -302,7 +352,8 @@ static int rk3308_gmac_fix_mac_speed(struct rockchip_eth_dev *dev)
 	return 0;
 }
 
-static int rk3328_gmac_fix_mac_speed(struct rockchip_eth_dev *dev)
+static int rk3328_gmac_fix_mac_speed(struct gmac_rockchip_platdata *pdata,
+				     struct rockchip_eth_dev *dev)
 {
 	struct dw_eth_dev *priv = &dev->dw;
 	struct rk3328_grf_regs *grf;
@@ -313,14 +364,26 @@ static int rk3328_gmac_fix_mac_speed(struct rockchip_eth_dev *dev)
 		RK3328_GMAC_CLK_SEL_125M  = 0 << 11,
 		RK3328_GMAC_CLK_SEL_25M   = 3 << 11,
 		RK3328_GMAC_CLK_SEL_2_5M  = 2 << 11,
+
+		RK3328_GMAC_RMII_CLK_MASK   = BIT(7),
+		RK3328_GMAC_RMII_CLK_2_5M   = 0,
+		RK3328_GMAC_RMII_CLK_25M    = BIT(7),
+
+		RK3328_GMAC_RMII_SPEED_MASK = BIT(2),
+		RK3328_GMAC_RMII_SPEED_10   = 0,
+		RK3328_GMAC_RMII_SPEED_100  = BIT(2),
 	};
 
 	switch (priv->phydev->speed) {
 	case 10:
-		clk = RK3328_GMAC_CLK_SEL_2_5M;
+		clk = (pdata->phy_interface == PHY_INTERFACE_MODE_RMII) ?
+		       (RK3328_GMAC_RMII_CLK_2_5M | RK3328_GMAC_RMII_SPEED_10) :
+		       RK3328_GMAC_CLK_SEL_2_5M;
 		break;
 	case 100:
-		clk = RK3328_GMAC_CLK_SEL_25M;
+		clk = (pdata->phy_interface == PHY_INTERFACE_MODE_RMII) ?
+		       (RK3328_GMAC_RMII_CLK_25M | RK3328_GMAC_RMII_SPEED_100) :
+		       RK3328_GMAC_CLK_SEL_25M;
 		break;
 	case 1000:
 		clk = RK3328_GMAC_CLK_SEL_125M;
@@ -331,12 +394,17 @@ static int rk3328_gmac_fix_mac_speed(struct rockchip_eth_dev *dev)
 	}
 
 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	rk_clrsetreg(&grf->mac_con[1], RK3328_GMAC_CLK_SEL_MASK, clk);
+	rk_clrsetreg(pdata->integrated_phy ? &grf->mac_con[2] : &grf->mac_con[1],
+		     RK3328_GMAC_CLK_SEL_MASK |
+		     RK3328_GMAC_RMII_CLK_MASK |
+		     RK3328_GMAC_RMII_SPEED_MASK,
+		     clk);
 
 	return 0;
 }
 
-static int rk3368_gmac_fix_mac_speed(struct rockchip_eth_dev *dev)
+static int rk3368_gmac_fix_mac_speed(struct gmac_rockchip_platdata *pdata,
+				     struct rockchip_eth_dev *dev)
 {
 	struct dw_eth_dev *priv = &dev->dw;
 	struct rk3368_grf *grf;
@@ -369,7 +437,8 @@ static int rk3368_gmac_fix_mac_speed(struct rockchip_eth_dev *dev)
 	return 0;
 }
 
-static int rk3399_gmac_fix_mac_speed(struct rockchip_eth_dev *dev)
+static int rk3399_gmac_fix_mac_speed(struct gmac_rockchip_platdata *pdata,
+				     struct rockchip_eth_dev *dev)
 {
 	struct dw_eth_dev *priv = &dev->dw;
 	struct rk3399_grf_regs *grf;
@@ -396,7 +465,8 @@ static int rk3399_gmac_fix_mac_speed(struct rockchip_eth_dev *dev)
 	return 0;
 }
 
-static int rv1108_set_rmii_speed(struct rockchip_eth_dev *dev)
+static int rv1108_set_rmii_speed(struct gmac_rockchip_platdata *pdata,
+				 struct rockchip_eth_dev *dev)
 {
 	struct dw_eth_dev *priv = &dev->dw;
 	struct rv1108_grf *grf;
@@ -432,7 +502,8 @@ static int rv1108_set_rmii_speed(struct rockchip_eth_dev *dev)
 	return 0;
 }
 #else
-static int rv1126_set_rgmii_speed(struct rockchip_eth_dev *dev)
+static int rv1126_set_rgmii_speed(struct gmac_rockchip_platdata *pdata,
+				  struct rockchip_eth_dev *dev)
 {
 	struct eqos_priv *priv = &dev->eqos;
 	struct clk clk_speed;
@@ -572,6 +643,28 @@ static void rk3228_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata)
 		     pdata->tx_delay << RK3228_CLK_TX_DL_CFG_GMAC_SHIFT);
 }
 
+static void rk3228_gmac_set_to_rmii(struct gmac_rockchip_platdata *pdata)
+{
+	struct rk322x_grf *grf;
+	enum {
+		RK3228_GRF_CON_RMII_MODE_MASK = BIT(11),
+		RK3228_GRF_CON_RMII_MODE_SEL = BIT(11),
+		RK3228_RMII_MODE_MASK = BIT(10),
+		RK3228_RMII_MODE_SEL = BIT(10),
+		RK3228_GMAC_PHY_INTF_SEL_MASK  = GENMASK(6, 4),
+		RK3228_GMAC_PHY_INTF_SEL_RMII = BIT(6),
+	};
+
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	rk_clrsetreg(&grf->mac_con[1],
+		     RK3228_GRF_CON_RMII_MODE_MASK |
+		     RK3228_RMII_MODE_MASK |
+		     RK3228_GMAC_PHY_INTF_SEL_MASK,
+		     RK3228_GRF_CON_RMII_MODE_SEL |
+		     RK3228_RMII_MODE_SEL |
+		     RK3228_GMAC_PHY_INTF_SEL_RMII);
+}
+
 static void rk3288_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata)
 {
 	struct rk3288_grf *grf;
@@ -652,6 +745,25 @@ static void rk3328_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata)
 		     pdata->tx_delay << RK3328_CLK_TX_DL_CFG_GMAC_SHIFT);
 }
 
+static void rk3328_gmac_set_to_rmii(struct gmac_rockchip_platdata *pdata)
+{
+	struct rk3328_grf_regs *grf;
+	enum {
+		RK3328_RMII_MODE_MASK  = BIT(9),
+		RK3328_RMII_MODE = BIT(9),
+
+		RK3328_GMAC_PHY_INTF_SEL_MASK  = GENMASK(6, 4),
+		RK3328_GMAC_PHY_INTF_SEL_RMII = BIT(6),
+	};
+
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	rk_clrsetreg(pdata->integrated_phy ? &grf->mac_con[2] : &grf->mac_con[1],
+		     RK3328_RMII_MODE_MASK |
+		     RK3328_GMAC_PHY_INTF_SEL_MASK,
+		     RK3328_GMAC_PHY_INTF_SEL_RMII |
+		     RK3328_RMII_MODE);
+}
+
 static void rk3368_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata)
 {
 	struct rk3368_grf *grf;
@@ -725,6 +837,127 @@ static void rv1108_gmac_set_to_rmii(struct gmac_rockchip_platdata *pdata)
 		     RV1108_GMAC_PHY_INTF_SEL_MASK,
 		     RV1108_GMAC_PHY_INTF_SEL_RMII);
 }
+
+static void rk3228_gmac_integrated_phy_powerup(struct gmac_rockchip_platdata *pdata)
+{
+	struct rk322x_grf *grf;
+	enum {
+		RK3228_GRF_CON_MUX_GMAC_INTEGRATED_PHY_MASK = BIT(15),
+		RK3228_GRF_CON_MUX_GMAC_INTEGRATED_PHY = BIT(15),
+	};
+	enum {
+		RK3228_MACPHY_CFG_CLK_50M_MASK = BIT(14),
+		RK3228_MACPHY_CFG_CLK_50M = BIT(14),
+
+		RK3228_MACPHY_RMII_MODE_MASK = GENMASK(7, 6),
+		RK3228_MACPHY_RMII_MODE = BIT(6),
+
+		RK3228_MACPHY_ENABLE_MASK = BIT(0),
+		RK3228_MACPHY_DISENABLE = 0,
+		RK3228_MACPHY_ENABLE = BIT(0),
+	};
+	enum {
+		RK3228_RK_GRF_CON2_MACPHY_ID_MASK = GENMASK(6, 0),
+		RK3228_RK_GRF_CON2_MACPHY_ID = 0x1234,
+	};
+	enum {
+		RK3228_RK_GRF_CON3_MACPHY_ID_MASK = GENMASK(5, 0),
+		RK3228_RK_GRF_CON3_MACPHY_ID = 0x35,
+	};
+
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	rk_clrsetreg(&grf->con_iomux,
+		     RK3228_GRF_CON_MUX_GMAC_INTEGRATED_PHY_MASK,
+		     RK3228_GRF_CON_MUX_GMAC_INTEGRATED_PHY);
+
+	rk_clrsetreg(&grf->macphy_con[2],
+		     RK3228_RK_GRF_CON2_MACPHY_ID_MASK,
+		     RK3228_RK_GRF_CON2_MACPHY_ID);
+
+	rk_clrsetreg(&grf->macphy_con[3],
+		     RK3228_RK_GRF_CON3_MACPHY_ID_MASK,
+		     RK3228_RK_GRF_CON3_MACPHY_ID);
+
+	/* disabled before trying to reset it &*/
+	rk_clrsetreg(&grf->macphy_con[0],
+		     RK3228_MACPHY_CFG_CLK_50M_MASK |
+		     RK3228_MACPHY_RMII_MODE_MASK |
+		     RK3228_MACPHY_ENABLE_MASK,
+		     RK3228_MACPHY_CFG_CLK_50M |
+		     RK3228_MACPHY_RMII_MODE |
+		     RK3228_MACPHY_DISENABLE);
+
+	reset_assert(&pdata->phy_reset);
+	udelay(10);
+	reset_deassert(&pdata->phy_reset);
+	udelay(10);
+
+	rk_clrsetreg(&grf->macphy_con[0],
+		     RK3228_MACPHY_ENABLE_MASK,
+		     RK3228_MACPHY_ENABLE);
+	udelay(30 * 1000);
+}
+
+static void rk3328_gmac_integrated_phy_powerup(struct gmac_rockchip_platdata *pdata)
+{
+	struct rk3328_grf_regs *grf;
+	enum {
+		RK3328_GRF_CON_RMII_MODE_MASK = BIT(9),
+		RK3328_GRF_CON_RMII_MODE = BIT(9),
+	};
+	enum {
+		RK3328_MACPHY_CFG_CLK_50M_MASK = BIT(14),
+		RK3328_MACPHY_CFG_CLK_50M = BIT(14),
+
+		RK3328_MACPHY_RMII_MODE_MASK = GENMASK(7, 6),
+		RK3328_MACPHY_RMII_MODE = BIT(6),
+
+		RK3328_MACPHY_ENABLE_MASK = BIT(0),
+		RK3328_MACPHY_DISENABLE = 0,
+		RK3328_MACPHY_ENABLE = BIT(0),
+	};
+	enum {
+		RK3328_RK_GRF_CON2_MACPHY_ID_MASK = GENMASK(6, 0),
+		RK3328_RK_GRF_CON2_MACPHY_ID = 0x1234,
+	};
+	enum {
+		RK3328_RK_GRF_CON3_MACPHY_ID_MASK = GENMASK(5, 0),
+		RK3328_RK_GRF_CON3_MACPHY_ID = 0x35,
+	};
+
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	rk_clrsetreg(&grf->macphy_con[1],
+		     RK3328_GRF_CON_RMII_MODE_MASK,
+		     RK3328_GRF_CON_RMII_MODE);
+
+	rk_clrsetreg(&grf->macphy_con[2],
+		     RK3328_RK_GRF_CON2_MACPHY_ID_MASK,
+		     RK3328_RK_GRF_CON2_MACPHY_ID);
+
+	rk_clrsetreg(&grf->macphy_con[3],
+		     RK3328_RK_GRF_CON3_MACPHY_ID_MASK,
+		     RK3328_RK_GRF_CON3_MACPHY_ID);
+
+	/* disabled before trying to reset it &*/
+	rk_clrsetreg(&grf->macphy_con[0],
+		     RK3328_MACPHY_CFG_CLK_50M_MASK |
+		     RK3328_MACPHY_RMII_MODE_MASK |
+		     RK3328_MACPHY_ENABLE_MASK,
+		     RK3328_MACPHY_CFG_CLK_50M |
+		     RK3328_MACPHY_RMII_MODE |
+		     RK3328_MACPHY_DISENABLE);
+
+	reset_assert(&pdata->phy_reset);
+	udelay(10);
+	reset_deassert(&pdata->phy_reset);
+	udelay(10);
+
+	rk_clrsetreg(&grf->macphy_con[0],
+		     RK3328_MACPHY_ENABLE_MASK,
+		     RK3328_MACPHY_ENABLE);
+	udelay(30 * 1000);
+}
+
 #else
 static void rk3568_set_to_rmii(struct gmac_rockchip_platdata *pdata)
 {
@@ -920,6 +1153,11 @@ static int gmac_rockchip_probe(struct udevice *dev)
 	if (ret)
 		return ret;
 
+	pdata->phy_interface = eth_pdata->phy_interface;
+
+	if (pdata->integrated_phy && ops->integrated_phy_powerup)
+		ops->integrated_phy_powerup(pdata);
+
 	switch (eth_pdata->phy_interface) {
 	case PHY_INTERFACE_MODE_RGMII:
 		/*
@@ -1012,8 +1250,8 @@ static int gmac_rockchip_eth_start(struct udevice *dev)
 	struct rockchip_eth_dev *priv = dev_get_priv(dev);
 	struct rk_gmac_ops *ops =
 		(struct rk_gmac_ops *)dev_get_driver_data(dev);
-#ifndef CONFIG_DWC_ETH_QOS
 	struct gmac_rockchip_platdata *pdata = dev_get_platdata(dev);
+#ifndef CONFIG_DWC_ETH_QOS
 	struct dw_eth_pdata *dw_pdata;
 	struct eth_pdata *eth_pdata;
 #endif
@@ -1029,7 +1267,7 @@ static int gmac_rockchip_eth_start(struct udevice *dev)
 #endif
 	if (ret)
 		return ret;
-	ret = ops->fix_mac_speed(priv);
+	ret = ops->fix_mac_speed(pdata, priv);
 	if (ret)
 		return ret;
 
@@ -1075,7 +1313,9 @@ const struct rk_gmac_ops rk1808_gmac_ops = {
 
 const struct rk_gmac_ops rk3228_gmac_ops = {
 	.fix_mac_speed = rk3228_gmac_fix_mac_speed,
+	.set_to_rmii = rk3228_gmac_set_to_rmii,
 	.set_to_rgmii = rk3228_gmac_set_to_rgmii,
+	.integrated_phy_powerup = rk3228_gmac_integrated_phy_powerup,
 };
 
 const struct rk_gmac_ops rk3288_gmac_ops = {
@@ -1090,7 +1330,9 @@ const struct rk_gmac_ops rk3308_gmac_ops = {
 
 const struct rk_gmac_ops rk3328_gmac_ops = {
 	.fix_mac_speed = rk3328_gmac_fix_mac_speed,
+	.set_to_rmii = rk3328_gmac_set_to_rmii,
 	.set_to_rgmii = rk3328_gmac_set_to_rgmii,
+	.integrated_phy_powerup = rk3328_gmac_integrated_phy_powerup,
 };
 
 const struct rk_gmac_ops rk3368_gmac_ops = {

commit c4d8ddf89aad8e0f2dc6377d7999f4534d9d19c1
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Wed Mar 24 17:44:04 2021 +0800

    edid: Change mode flags judgment standard
    
    To avoid some flags such as 3d flag causing misjudgments of
    mode equal. Mode flags judgment standard should include more
    flags.
    
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
    Change-Id: I79043d56482d7f160c5b90ce681c2c1bbffe8e3d

diff --git a/common/edid.c b/common/edid.c
index 503e612642..c8cbb13a96 100644
--- a/common/edid.c
+++ b/common/edid.c
@@ -6171,11 +6171,6 @@ int hdmi_infoframe_unpack(union hdmi_infoframe *frame, void *buffer)
 bool drm_mode_equal(const struct base_drm_display_mode *mode1,
 		    const struct drm_display_mode *mode2)
 {
-	unsigned int flags_mask =
-		DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_PHSYNC |
-		DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC |
-		DRM_MODE_FLAG_NVSYNC;
-
 	if (mode1->clock == mode2->clock &&
 	    mode1->hdisplay == mode2->hdisplay &&
 	    mode1->hsync_start == mode2->hsync_start &&
@@ -6185,9 +6180,8 @@ bool drm_mode_equal(const struct base_drm_display_mode *mode1,
 	    mode1->vsync_start == mode2->vsync_start &&
 	    mode1->vsync_end == mode2->vsync_end &&
 	    mode1->vtotal == mode2->vtotal &&
-	    (mode1->flags & flags_mask) == (mode2->flags & flags_mask)) {
+	    mode1->flags == mode2->flags)
 		return true;
-	}
 
 	return false;
 }

commit 7a110f3a54b91d96a6e345f0ee0fb60cd8631a35
Author: Wesley Yao <wesley.yao@rock-chips.com>
Date:   Wed Mar 24 11:29:53 2021 +0800

    Change Flag of DDR DQ Eye Tool
    
    Use DDR_DQ_EYE_FLAG instead of FSP_FLAG to avoid duplicate definition of FAP_FLAG in ddr branch
    
    Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
    Change-Id: I3bf16fafc2e46d4002481ed03b5c689f26dccfad

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h b/arch/arm/include/asm/arch-rockchip/sdram_common.h
index a98e01b06c..33951ce416 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_common.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_common.h
@@ -247,6 +247,8 @@ struct sdram_base_params {
 };
 
 /* store result of read and write training, for ddr_dq_eye tool in u-boot */
+#define DDR_DQ_EYE_FLAG	0xdddeefa0
+
 #define FSP_NUM		4
 #define CS_NUM		4
 #define BYTE_NUM	5
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rk3568.h b/arch/arm/include/asm/arch-rockchip/sdram_rk3568.h
index 8cc3c02381..0d4524662f 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_rk3568.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_rk3568.h
@@ -9,8 +9,6 @@
 #include <asm/arch-rockchip/sdram.h>
 #include <asm/arch-rockchip/sdram_common.h>
 
-#define FSP_FLAG		0xfead0001
-
 /* store result of read and write training, for ddr_dq_eye tool in u-boot */
 #define RW_TRN_RESULT_ADDR	(0x2000000 + 0x8000)	/* 32M + 32k */
 
diff --git a/cmd/ddr_tool/ddr_dq_eye.c b/cmd/ddr_tool/ddr_dq_eye.c
index 09720eadcf..732b762a35 100644
--- a/cmd/ddr_tool/ddr_dq_eye.c
+++ b/cmd/ddr_tool/ddr_dq_eye.c
@@ -137,7 +137,7 @@ static int do_ddr_dq_eye(cmd_tbl_t *cmdtp, int flag, int argc,
 	return CMD_RET_FAILURE;
 #endif
 
-	if (readl(RW_TRN_RESULT_ADDR) == FSP_FLAG) {
+	if (readl(RW_TRN_RESULT_ADDR) == DDR_DQ_EYE_FLAG) {
 		memcpy(&result, (void *)(RW_TRN_RESULT_ADDR), sizeof(result));
 	} else {
 		printf("Fail to get data of DDR DQ eye.\n");
diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
index 9ce126afa5..acf33d7406 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -1992,7 +1992,7 @@ static void save_rw_trn_deskew(void __iomem *phy_base,
 
 static void save_rw_trn_result_to_ddr(struct rw_trn_result *result)
 {
-	result->flag = FSP_FLAG;
+	result->flag = DDR_DQ_EYE_FLAG;
 	memcpy((void *)(RW_TRN_RESULT_ADDR), result, sizeof(*result));
 }
 #endif

commit 78047ad13a7fbf6b6b69b271398aede3783fb068
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Mar 22 15:25:13 2021 +0800

    include: env: fix compile error
    
    In file included from ./tools/../env/embedded.c:16:0,
                     from tools/env/embedded.c:1:
    include/environment.h:293:58: error: unknown type name ‘bool’; did you mean ‘_Bool’?
     int set_board_env(const char *vars, int size, int flags, bool ready);
                                                              ^~~~
                                                              _Bool
    scripts/Makefile.host:116: recipe for target 'tools/env/embedded.o' failed
    make[1]: *** [tools/env/embedded.o] Error 1
    make[1]: *** Waiting for unfinished jobs....
    Makefile:1304: recipe for target 'tools' failed
    make: *** [tools] Error 2
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I0aa32c64d1dcbae1b2785ae3fa113ba98974de03

diff --git a/include/environment.h b/include/environment.h
index c2aa553c71..4d2d53d5f9 100644
--- a/include/environment.h
+++ b/include/environment.h
@@ -8,6 +8,7 @@
 #ifndef _ENVIRONMENT_H_
 #define _ENVIRONMENT_H_
 
+#include <stdbool.h>
 #include <linux/kconfig.h>
 
 /**************************************************************************

commit 7c7eb7613f9522c26eb156f50a2f47b4d4cf84b4
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Tue Mar 16 11:48:54 2021 +0800

    disk: gpt: modify the last partition size aligned to 4KB
    
    The ext4 block size is 4K, so the partition size need aligned to 4KB too.
    BUG:
    [    3.164255] device-mapper: table: 253:5: len=48490463 not aligned to h/w logical block size 4096 of mmcblk0p18
    [    3.164268] device-mapper: core: Cannot calculate initial queue limits
    [    3.164273] device-mapper: ioctl: unable to set up device queue for new table.
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: I16cee8919f2f806ec0cebc1ea05b9323cd0e7e7b

diff --git a/disk/part_efi.c b/disk/part_efi.c
index 0783289432..6c79a9d8e9 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -367,8 +367,8 @@ static void gpt_entry_modify(struct blk_desc *dev_desc,
 
 	if (gpt_pte[i - 1].ending_lba <= (dev_desc->lba - 0x22))
 		return;
-
-	gpt_pte[i - 1].ending_lba = dev_desc->lba - 0x22;
+	/* The last partition size need align to 4KB, here align to 32KB. */
+	gpt_pte[i - 1].ending_lba = dev_desc->lba - 0x40;
 	calc_crc32 = efi_crc32((const unsigned char *)gpt_pte,
 			       le32_to_cpu(gpt_head->num_partition_entries) *
 			       le32_to_cpu(gpt_head->sizeof_partition_entry));

commit c71eeac45ebcb0694ff72a9b772619f93690ac6b
Author: Wesley Yao <wesley.yao@rock-chips.com>
Date:   Thu Mar 18 16:00:53 2021 +0800

    cmd: ddr_tool: ddr_dq_eye.c: Add DDR DQ eye tool for RV1126 and RK356x
    
    In the loader, store DDR read & write eye training results.
    In U-Boot, use "ddr_dq_eye" command to show DDR DQ eye with the training
    results.
    
    Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
    Change-Id: Ib360acdc843e3a6a6298d598341176746bf463e9

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h b/arch/arm/include/asm/arch-rockchip/sdram_common.h
index db1ab163c3..a98e01b06c 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_common.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_common.h
@@ -246,6 +246,36 @@ struct sdram_base_params {
 	unsigned int odt;
 };
 
+/* store result of read and write training, for ddr_dq_eye tool in u-boot */
+#define FSP_NUM		4
+#define CS_NUM		4
+#define BYTE_NUM	5
+
+struct dqs_rw_trn_result {
+	u16 dq_deskew[8];
+	u16 dqs_deskew;
+	u16 dq_min[8];
+	u16 dq_max[8];
+};
+
+struct cs_rw_trn_result {
+	struct dqs_rw_trn_result dqs[BYTE_NUM];
+};
+
+struct fsp_rw_trn_result {
+	u16 min_val;
+	struct cs_rw_trn_result cs[CS_NUM];
+};
+
+struct rw_trn_result {
+	u32 flag;
+	u8 cs_num;
+	u8 byte_en;
+	u16 fsp_mhz[FSP_NUM];
+	struct fsp_rw_trn_result rd_fsp[FSP_NUM];
+	struct fsp_rw_trn_result wr_fsp[FSP_NUM];
+};
+
 /*
  * sys_reg bitfield struct
  * [31]		row_3_4_ch1
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rk3568.h b/arch/arm/include/asm/arch-rockchip/sdram_rk3568.h
new file mode 100644
index 0000000000..8cc3c02381
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/sdram_rk3568.h
@@ -0,0 +1,59 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2021 Rockchip Electronics Co., Ltd.
+ */
+
+#ifndef _ASM_ARCH_SDRAM_RK3568_H
+#define _ASM_ARCH_SDRAM_RK3568_H
+
+#include <asm/arch-rockchip/sdram.h>
+#include <asm/arch-rockchip/sdram_common.h>
+
+#define FSP_FLAG		0xfead0001
+
+/* store result of read and write training, for ddr_dq_eye tool in u-boot */
+#define RW_TRN_RESULT_ADDR	(0x2000000 + 0x8000)	/* 32M + 32k */
+
+#undef FSP_NUM
+#undef CS_NUM
+#undef BYTE_NUM
+
+#define FSP_NUM			4
+#define CS_NUM			4
+#define BYTE_NUM		5
+#define RD_DESKEW_NUM		128
+#define WR_DESKEW_NUM		256
+
+#define LP4_WIDTH_REF_MHZ_H	1560
+#define LP4_RD_WIDTH_REF_H	25
+#define LP4_WR_WIDTH_REF_H	24
+
+#define LP4_WIDTH_REF_MHZ_L	1184
+#define LP4_RD_WIDTH_REF_L	30
+#define LP4_WR_WIDTH_REF_L	29
+
+#define DDR4_WIDTH_REF_MHZ_H	1560
+#define DDR4_RD_WIDTH_REF_H	30
+#define DDR4_WR_WIDTH_REF_H	22
+
+#define DDR4_WIDTH_REF_MHZ_L	1184
+#define DDR4_RD_WIDTH_REF_L	32
+#define DDR4_WR_WIDTH_REF_L	26
+
+#define LP3_WIDTH_REF_MHZ_H	1184
+#define LP3_RD_WIDTH_REF_H	34
+#define LP3_WR_WIDTH_REF_H	25
+
+#define LP3_WIDTH_REF_MHZ_L	920
+#define LP3_RD_WIDTH_REF_L	39
+#define LP3_WR_WIDTH_REF_L	28
+
+#define DDR3_WIDTH_REF_MHZ_H	1184
+#define DDR3_RD_WIDTH_REF_H	32
+#define DDR3_WR_WIDTH_REF_H	31
+
+#define DDR3_WIDTH_REF_MHZ_L	920
+#define DDR3_RD_WIDTH_REF_L	39
+#define DDR3_WR_WIDTH_REF_L	34
+
+#endif /* _ASM_ARCH_SDRAM_RK3568_H */
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rv1126.h b/arch/arm/include/asm/arch-rockchip/sdram_rv1126.h
index caa5583521..149e07ea40 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_rv1126.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_rv1126.h
@@ -359,4 +359,49 @@ struct rv1126_fsp_param {
  */
 #define FSP_PARAM_STORE_ADDR	(SHARE_MEM_BASE)
 
+/* store result of read and write training, for ddr_dq_eye tool in u-boot */
+#define RW_TRN_RESULT_ADDR	(0x2000000 + 0x8000)	/* 32M + 32k */
+
+#undef FSP_NUM
+#undef CS_NUM
+#undef BYTE_NUM
+
+#define FSP_NUM			4
+#define CS_NUM			2
+#define BYTE_NUM		4
+#define RD_DESKEW_NUM		64
+#define WR_DESKEW_NUM		64
+
+#define LP4_WIDTH_REF_MHZ_H	1056
+#define LP4_RD_WIDTH_REF_H	12
+#define LP4_WR_WIDTH_REF_H	13
+
+#define LP4_WIDTH_REF_MHZ_L	924
+#define LP4_RD_WIDTH_REF_L	15
+#define LP4_WR_WIDTH_REF_L	15
+
+#define DDR4_WIDTH_REF_MHZ_H	1056
+#define DDR4_RD_WIDTH_REF_H	13
+#define DDR4_WR_WIDTH_REF_H	9
+
+#define DDR4_WIDTH_REF_MHZ_L	924
+#define DDR4_RD_WIDTH_REF_L	15
+#define DDR4_WR_WIDTH_REF_L	11
+
+#define LP3_WIDTH_REF_MHZ_H	1056
+#define LP3_RD_WIDTH_REF_H	15
+#define LP3_WR_WIDTH_REF_H	13
+
+#define LP3_WIDTH_REF_MHZ_L	924
+#define LP3_RD_WIDTH_REF_L	16
+#define LP3_WR_WIDTH_REF_L	15
+
+#define DDR3_WIDTH_REF_MHZ_H	1056
+#define DDR3_RD_WIDTH_REF_H	14
+#define DDR3_WR_WIDTH_REF_H	14
+
+#define DDR3_WIDTH_REF_MHZ_L	924
+#define DDR3_RD_WIDTH_REF_L	17
+#define DDR3_WR_WIDTH_REF_L	17
+
 #endif /* _ASM_ARCH_SDRAM_RK1126_H */
diff --git a/cmd/ddr_tool/Makefile b/cmd/ddr_tool/Makefile
index 08fab7e45b..788b40031e 100644
--- a/cmd/ddr_tool/Makefile
+++ b/cmd/ddr_tool/Makefile
@@ -21,3 +21,5 @@ ifndef CONFIG_CMD_MEMTESTER
 obj-$(CONFIG_CMD_DDR_TEST_TOOL) += ../memtester/ddr_tester_common.o
 obj-$(CONFIG_CMD_DDR_TEST_TOOL) += ../memtester/io_map.o
 endif
+obj-$(CONFIG_CMD_DDR_TEST_TOOL) += ddr_dq_eye.o
+
diff --git a/cmd/ddr_tool/ddr_dq_eye.c b/cmd/ddr_tool/ddr_dq_eye.c
new file mode 100644
index 0000000000..09720eadcf
--- /dev/null
+++ b/cmd/ddr_tool/ddr_dq_eye.c
@@ -0,0 +1,280 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2021 Rockchip Electronics Co., Ltd.
+ */
+
+#if defined(CONFIG_ROCKCHIP_RV1126) || defined(CONFIG_ROCKCHIP_RK3568)
+
+#include <common.h>
+#include <console.h>
+#include <asm/io.h>
+#include <asm/arch-rockchip/sdram_common.h>
+#if defined(CONFIG_ROCKCHIP_RV1126)
+#include <asm/arch/sdram_rv1126.h>
+#elif defined(CONFIG_ROCKCHIP_RK3568)
+#include <asm/arch/sdram_rk3568.h>
+#endif
+
+#define __version__	"0.0.5"
+
+#define PRINT_RANGE_MAX	64
+
+struct rw_trn_result result;
+
+static void print_title_bar(u16 deskew_num)
+{
+	int i;
+	u16 deskew_step;
+
+	deskew_step = deskew_num <= PRINT_RANGE_MAX ?
+		      1 : deskew_num / PRINT_RANGE_MAX;
+
+	printf("     ");
+	for (i = 0; i < deskew_num; i += deskew_step * 4)
+		printf("%-4d", i);
+	printf("	Margin_L Sample Margin_R Width    DQS\n");
+}
+
+static void print_ddr_dq_eye(struct fsp_rw_trn_result *fsp_result, u8 cs,
+			     u8 byte_en, u16 width_ref, u16 deskew_num)
+{
+	u16 sample;
+	u16 min;
+	u16 max;
+	u16 dq_eye_width;
+	u8 dqs;
+	u8 dq;
+	int i;
+	u16 deskew_step;
+	struct cs_rw_trn_result *result = &fsp_result->cs[cs];
+
+	for (dqs = 0; (byte_en & BIT(dqs)) != 0 && dqs < BYTE_NUM; dqs++) {
+		for (dq = 0; dq < 8; dq++) {
+			sample = fsp_result->min_val +
+				 result->dqs[dqs].dq_deskew[dq];
+			min = result->dqs[dqs].dq_min[dq];
+			max = result->dqs[dqs].dq_max[dq];
+			dq_eye_width = max >= min ? max - min + 1 : 0;
+			deskew_step = deskew_num <= PRINT_RANGE_MAX ?
+				      1 : deskew_num / PRINT_RANGE_MAX;
+
+			printf("DQ%-2d ", dqs * 8 + dq);
+			for (i = 0; i < deskew_num / deskew_step; i++) {
+				if (i == sample / deskew_step)
+					printf("|");
+				else if (i >= min / deskew_step &&
+					 i <= max / deskew_step)
+					printf("*");
+				else
+					printf("-");
+			}
+
+			printf("	%5d%8d%8d",
+			       sample > min ? sample - min : 0, sample,
+			       max > sample ? max - sample : 0);
+			if (dq_eye_width >= width_ref)
+				printf("%8d%8d\n", dq_eye_width,
+				       fsp_result->min_val +
+				       result->dqs[dqs].dqs_deskew);
+			else
+				printf("    [%3d]%7d\n", dq_eye_width,
+				       fsp_result->min_val +
+				       result->dqs[dqs].dqs_deskew);
+		}
+	}
+	printf("\n");
+}
+
+static u16 cs_eye_width_min(struct cs_rw_trn_result *result, u8 byte_en,
+			    u16 deskew_num)
+{
+	u16 min;
+	u16 max;
+	u16 dq_eye_width;
+	u16 cs_eye_width = deskew_num;
+	u8 dqs;
+	u8 dq;
+
+	for (dqs = 0; (byte_en & BIT(dqs)) != 0 && dqs < BYTE_NUM; dqs++) {
+		for (dq = 0; dq < 8; dq++) {
+			min = result->dqs[dqs].dq_min[dq];
+			max = result->dqs[dqs].dq_max[dq];
+			dq_eye_width = max >= min ? max - min + 1 : 0;
+			if (cs_eye_width > dq_eye_width)
+				cs_eye_width = dq_eye_width;
+		}
+	}
+
+	return cs_eye_width;
+}
+
+static int do_ddr_dq_eye(cmd_tbl_t *cmdtp, int flag, int argc,
+			 char * const argv[])
+{
+	unsigned long freq_mhz;
+
+	u32 ddr_type;
+	u16 rd_width = RD_DESKEW_NUM;
+	u16 wr_width = WR_DESKEW_NUM;
+	u16 cs_eye_width;
+	u16 rd_width_ref;
+	u16 wr_width_ref;
+	u16 width_ref_mhz;
+	u8 fsp = 0;
+	u8 cs;
+	int i;
+	//struct print_range print_range;
+
+	printf("Rockchip DDR DQ Eye Tool v" __version__ "\n");
+
+#if defined(CONFIG_ROCKCHIP_RV1126)
+	ddr_type = (readl(0xfe020208) >> 13) & 0x7;
+#elif defined(CONFIG_ROCKCHIP_RK3568)
+	ddr_type = ((readl(0xfdc2020c)  & (0x3 << 12)) >> 9) |
+		   ((readl(0xfdc20208) >> 13) & 0x7);
+#else
+	printf("Rockchip DDR DQ Eye Tool only support RK356x and RV1126 now.\n");
+	return CMD_RET_FAILURE;
+#endif
+
+	if (readl(RW_TRN_RESULT_ADDR) == FSP_FLAG) {
+		memcpy(&result, (void *)(RW_TRN_RESULT_ADDR), sizeof(result));
+	} else {
+		printf("Fail to get data of DDR DQ eye.\n");
+		printf("Please update the Loader.\n");
+		return CMD_RET_FAILURE;
+	}
+
+	if (argc == 1) {
+		/* use the max freq if no arg */
+		for (i = 0; i < FSP_NUM; i++) {
+			if (result.fsp_mhz[i] > result.fsp_mhz[fsp])
+				fsp = i;
+		}
+	} else if (argc > 1) {
+		if (strict_strtoul(argv[1], 0, &freq_mhz) < 0)
+			return CMD_RET_USAGE;
+
+		if (freq_mhz >= 0 && freq_mhz < FSP_NUM) {
+			/* when user enter the fsp rather than the freq_mhz */
+			fsp = (u8)freq_mhz;
+		} else {
+			for (fsp = 0; fsp < FSP_NUM; fsp++)
+				if (result.fsp_mhz[fsp] == freq_mhz ||
+				    result.fsp_mhz[fsp] == (u16)(freq_mhz / MHZ))
+					break;
+
+			if (fsp >= FSP_NUM)
+				return CMD_RET_USAGE;
+		}
+	} else {
+		return CMD_RET_FAILURE;
+	}
+
+	printf("DDR type: ");
+	switch (ddr_type) {
+	case LPDDR4X:
+		if (result.fsp_mhz[fsp] <
+			(LP4_WIDTH_REF_MHZ_L + LP4_WIDTH_REF_MHZ_H) / 2) {
+			rd_width_ref = LP4_RD_WIDTH_REF_L;
+			wr_width_ref = LP4_WR_WIDTH_REF_L;
+			width_ref_mhz = LP4_WIDTH_REF_MHZ_L;
+		} else {
+			rd_width_ref = LP4_RD_WIDTH_REF_H;
+			wr_width_ref = LP4_WR_WIDTH_REF_H;
+			width_ref_mhz = LP4_WIDTH_REF_MHZ_H;
+		}
+		printf("LPDDR4X");
+		break;
+	case LPDDR4:
+		if (result.fsp_mhz[fsp] <
+			(LP4_WIDTH_REF_MHZ_L + LP4_WIDTH_REF_MHZ_H) / 2) {
+			rd_width_ref = LP4_RD_WIDTH_REF_L;
+			wr_width_ref = LP4_WR_WIDTH_REF_L;
+			width_ref_mhz = LP4_WIDTH_REF_MHZ_L;
+		} else {
+			rd_width_ref = LP4_RD_WIDTH_REF_H;
+			wr_width_ref = LP4_WR_WIDTH_REF_H;
+			width_ref_mhz = LP4_WIDTH_REF_MHZ_H;
+		}
+		printf("LPDDR4");
+		break;
+	case LPDDR3:
+		if (result.fsp_mhz[fsp] <
+			(LP4_WIDTH_REF_MHZ_L + LP4_WIDTH_REF_MHZ_H) / 2) {
+			rd_width_ref = LP3_RD_WIDTH_REF_L;
+			wr_width_ref = LP3_WR_WIDTH_REF_L;
+			width_ref_mhz = LP3_WIDTH_REF_MHZ_L;
+		} else {
+			rd_width_ref = LP3_RD_WIDTH_REF_H;
+			wr_width_ref = LP3_WR_WIDTH_REF_H;
+			width_ref_mhz = LP3_WIDTH_REF_MHZ_H;
+		}
+		printf("LPDDR3");
+		break;
+	case DDR4:
+		if (result.fsp_mhz[fsp] <
+			(DDR4_WIDTH_REF_MHZ_L + DDR4_WIDTH_REF_MHZ_H) / 2) {
+			rd_width_ref = DDR4_RD_WIDTH_REF_L;
+			wr_width_ref = DDR4_WR_WIDTH_REF_L;
+			width_ref_mhz = DDR4_WIDTH_REF_MHZ_L;
+		} else {
+			rd_width_ref = DDR4_RD_WIDTH_REF_H;
+			wr_width_ref = DDR4_WR_WIDTH_REF_H;
+			width_ref_mhz = DDR4_WIDTH_REF_MHZ_H;
+		}
+		printf("DDR4");
+		break;
+	case DDR3:
+	default:
+		if (result.fsp_mhz[fsp] <
+			(DDR3_WIDTH_REF_MHZ_L + DDR3_WIDTH_REF_MHZ_H) / 2) {
+			rd_width_ref = DDR3_RD_WIDTH_REF_L;
+			wr_width_ref = DDR3_WR_WIDTH_REF_L;
+			width_ref_mhz = DDR3_WIDTH_REF_MHZ_L;
+		} else {
+			rd_width_ref = DDR3_RD_WIDTH_REF_H;
+			wr_width_ref = DDR3_WR_WIDTH_REF_H;
+			width_ref_mhz = DDR3_WIDTH_REF_MHZ_H;
+		}
+		printf("DDR3");
+		break;
+	} /* switch (ddr_type) */
+	printf("\n");
+
+	for (cs = 0; cs < result.cs_num; cs++) {
+		printf("CS%d %dMHz read DQ eye:\n", cs, result.fsp_mhz[fsp]);
+		print_title_bar(RD_DESKEW_NUM);
+		print_ddr_dq_eye(&result.rd_fsp[fsp], cs, result.byte_en,
+				 rd_width_ref, RD_DESKEW_NUM);
+		cs_eye_width = cs_eye_width_min(&result.rd_fsp[fsp].cs[cs],
+						result.byte_en, RD_DESKEW_NUM);
+		if (rd_width > cs_eye_width)
+			rd_width = cs_eye_width;
+
+		printf("CS%d %dMHz write DQ eye:\n", cs, result.fsp_mhz[fsp]);
+		print_title_bar(WR_DESKEW_NUM);
+		print_ddr_dq_eye(&result.wr_fsp[fsp], cs, result.byte_en,
+				 wr_width_ref, WR_DESKEW_NUM);
+		cs_eye_width = cs_eye_width_min(&result.wr_fsp[fsp].cs[cs],
+						result.byte_en, WR_DESKEW_NUM);
+		if (wr_width > cs_eye_width)
+			wr_width = cs_eye_width;
+	}
+	printf("DQ eye width min: %d(read), %d(write)\n", rd_width, wr_width);
+	printf("DQ eye width reference: %d(read), %d(write) in %dMHz\n",
+	       rd_width_ref, wr_width_ref, width_ref_mhz);
+	if (rd_width < rd_width_ref || wr_width < wr_width_ref)
+		printf("ERROR: DQ eye width may be unreliable, please check!\n");
+
+	return CMD_RET_SUCCESS;
+}
+
+U_BOOT_CMD(ddr_dq_eye,	2,	1,	do_ddr_dq_eye,
+	   "Rockchip DDR DQ Eye Tool\n",
+	   "arg1: DDR freq in MHz, null for the max freq.\n"
+	   "example:\n"
+	   "	ddr_dq_eye 1056: show the DDR DQ eye in 1056MHz."
+);
+
+#endif /* if defined(CONFIG_ROCKCHIP_RV1126) || defined(CONFIG_ROCKCHIP_RK3568) */
diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
index b55ecfa69a..9ce126afa5 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -113,6 +113,10 @@ u32 common_info[] = {
 	#include "sdram_inc/rv1126/sdram-rv1126-loader_params.inc"
 };
 
+#if defined(CONFIG_CMD_DDR_TEST_TOOL)
+static struct rw_trn_result rw_trn_result;
+#endif
+
 static struct rv1126_fsp_param fsp_param[MAX_IDX];
 
 static u8 lp3_odt_value;
@@ -1911,6 +1915,88 @@ static int get_wrlvl_val(struct dram_info *dram,
 	return ret;
 }
 
+#if defined(CONFIG_CMD_DDR_TEST_TOOL)
+static void init_rw_trn_result_struct(struct rw_trn_result *result,
+				      void __iomem *phy_base, u8 cs_num)
+{
+	int i;
+
+	result->cs_num = cs_num;
+	result->byte_en = readb(PHY_REG(dram_info.phy, 0xf)) &
+			  PHY_DQ_WIDTH_MASK;
+	for (i = 0; i < FSP_NUM; i++)
+		result->fsp_mhz[i] = 0;
+}
+
+static void save_rw_trn_min_max(void __iomem *phy_base,
+				struct cs_rw_trn_result *rd_result,
+				struct cs_rw_trn_result *wr_result,
+				u8 byte_en)
+{
+	u16 phy_ofs;
+	u8 dqs;
+	u8 dq;
+
+	for (dqs = 0; (byte_en & BIT(dqs)) != 0 && dqs < BYTE_NUM; dqs++) {
+		/* Channel A or B (low or high 16 bit) */
+		phy_ofs = dqs < 2 ? 0x230 : 0x2b0;
+		/* low or high 8 bit */
+		phy_ofs += (dqs & 0x1) == 0 ? 0 : 0x9;
+		for (dq = 0; dq < 8; dq++) {
+			rd_result->dqs[dqs].dq_min[dq] =
+				readb(PHY_REG(phy_base, phy_ofs + 0x15 + dq));
+			rd_result->dqs[dqs].dq_max[dq] =
+				readb(PHY_REG(phy_base, phy_ofs + 0x27 + dq));
+			wr_result->dqs[dqs].dq_min[dq] =
+				readb(PHY_REG(phy_base, phy_ofs + 0x3d + dq));
+			wr_result->dqs[dqs].dq_max[dq] =
+				readb(PHY_REG(phy_base, phy_ofs + 0x4f + dq));
+		}
+	}
+}
+
+static void save_rw_trn_deskew(void __iomem *phy_base,
+			       struct fsp_rw_trn_result *result, u8 cs_num,
+			       int min_val, bool rw)
+{
+	u16 phy_ofs;
+	u8 cs;
+	u8 dq;
+
+	result->min_val = min_val;
+
+	for (cs = 0; cs < cs_num; cs++) {
+		phy_ofs = cs == 0 ? 0x170 : 0x1a0;
+		phy_ofs += rw == SKEW_RX_SIGNAL ? 0x1 : 0x17;
+		for (dq = 0; dq < 8; dq++) {
+			result->cs[cs].dqs[0].dq_deskew[dq] =
+				readb(PHY_REG(phy_base, phy_ofs + dq));
+			result->cs[cs].dqs[1].dq_deskew[dq] =
+				readb(PHY_REG(phy_base, phy_ofs + 0xb + dq));
+			result->cs[cs].dqs[2].dq_deskew[dq] =
+				readb(PHY_REG(phy_base, phy_ofs + 0x60 + dq));
+			result->cs[cs].dqs[3].dq_deskew[dq] =
+				readb(PHY_REG(phy_base, phy_ofs + 0x60 + 0xb + dq));
+		}
+
+		result->cs[cs].dqs[0].dqs_deskew =
+			readb(PHY_REG(phy_base, phy_ofs + 0x8));
+		result->cs[cs].dqs[1].dqs_deskew =
+			readb(PHY_REG(phy_base, phy_ofs + 0xb + 0x8));
+		result->cs[cs].dqs[2].dqs_deskew =
+			readb(PHY_REG(phy_base, phy_ofs + 0x60 + 0x8));
+		result->cs[cs].dqs[3].dqs_deskew =
+			readb(PHY_REG(phy_base, phy_ofs + 0x60 + 0xb + 0x8));
+	}
+}
+
+static void save_rw_trn_result_to_ddr(struct rw_trn_result *result)
+{
+	result->flag = FSP_FLAG;
+	memcpy((void *)(RW_TRN_RESULT_ADDR), result, sizeof(*result));
+}
+#endif
+
 static int high_freq_training(struct dram_info *dram,
 			      struct rv1126_sdram_params *sdram_params,
 			      u32 fsp)
@@ -1949,6 +2035,12 @@ static int high_freq_training(struct dram_info *dram,
 	writel(wrlvl_result[0][3] + clk_skew, PHY_REG(phy_base, 0x2b7));
 	ret = data_training(dram, 0, sdram_params, fsp, READ_GATE_TRAINING |
 			    READ_TRAINING | WRITE_TRAINING);
+#if defined(CONFIG_CMD_DDR_TEST_TOOL)
+	rw_trn_result.fsp_mhz[fsp] = (u16)sdram_params->base.ddr_freq;
+	save_rw_trn_min_max(phy_base, &rw_trn_result.rd_fsp[fsp].cs[0],
+			    &rw_trn_result.wr_fsp[fsp].cs[0],
+			    rw_trn_result.byte_en);
+#endif
 	if (sdram_params->ch.cap_info.rank == 2) {
 		writel(wrlvl_result[1][0] + clk_skew, PHY_REG(phy_base, 0x233));
 		writel(wrlvl_result[1][1] + clk_skew, PHY_REG(phy_base, 0x237));
@@ -1957,6 +2049,11 @@ static int high_freq_training(struct dram_info *dram,
 		ret |= data_training(dram, 1, sdram_params, fsp,
 				     READ_GATE_TRAINING | READ_TRAINING |
 				     WRITE_TRAINING);
+#if defined(CONFIG_CMD_DDR_TEST_TOOL)
+		save_rw_trn_min_max(phy_base, &rw_trn_result.rd_fsp[fsp].cs[1],
+				    &rw_trn_result.wr_fsp[fsp].cs[1],
+				    rw_trn_result.byte_en);
+#endif
 	}
 	if (ret)
 		goto out;
@@ -1967,6 +2064,11 @@ static int high_freq_training(struct dram_info *dram,
 				sdram_params->ch.cap_info.rank) * -1;
 	modify_dq_deskew(dram, SKEW_RX_SIGNAL, DESKEW_MDF_DIFF_VAL,
 			 min_val, min_val, sdram_params->ch.cap_info.rank);
+#if defined(CONFIG_CMD_DDR_TEST_TOOL)
+	save_rw_trn_deskew(phy_base, &rw_trn_result.rd_fsp[fsp],
+			   rw_trn_result.cs_num, (u8)(min_val * (-1)),
+			   SKEW_RX_SIGNAL);
+#endif
 
 	min_val = MIN(get_min_value(dram, SKEW_TX_SIGNAL,
 				    sdram_params->ch.cap_info.rank),
@@ -1979,6 +2081,11 @@ static int high_freq_training(struct dram_info *dram,
 
 	modify_dq_deskew(dram, SKEW_TX_SIGNAL, DESKEW_MDF_DIFF_VAL,
 			 min_val, min_val, sdram_params->ch.cap_info.rank);
+#if defined(CONFIG_CMD_DDR_TEST_TOOL)
+	save_rw_trn_deskew(phy_base, &rw_trn_result.wr_fsp[fsp],
+			   rw_trn_result.cs_num, (u8)(min_val * (-1)),
+			   SKEW_TX_SIGNAL);
+#endif
 
 	ret = data_training(dram, 0, sdram_params, 0, READ_GATE_TRAINING);
 	if (sdram_params->ch.cap_info.rank == 2)
@@ -3113,6 +3220,10 @@ int sdram_init(void)
 		goto error;
 	}
 	print_ddr_info(sdram_params);
+#if defined(CONFIG_CMD_DDR_TEST_TOOL)
+	init_rw_trn_result_struct(&rw_trn_result, dram_info.phy,
+				  (u8)sdram_params->ch.cap_info.rank);
+#endif
 
 	ddr_set_rate_for_fsp(&dram_info, sdram_params);
 #ifndef CONFIG_SPL_KERNEL_BOOT
@@ -3120,6 +3231,9 @@ int sdram_init(void)
 #endif
 
 	ddr_set_atags(&dram_info, sdram_params);
+#if defined(CONFIG_CMD_DDR_TEST_TOOL)
+	save_rw_trn_result_to_ddr(&rw_trn_result);
+#endif
 
 	printascii("out\n");
 

commit 79bd95125e56e4222633d67dc146dbba9f350591
Author: Ren Jianing <jianing.ren@rock-chips.com>
Date:   Thu Mar 18 15:33:48 2021 +0800

    rockchip: rk3568: enable CombPHY config
    
    Signed-off-by: Ren Jianing <jianing.ren@rock-chips.com>
    Change-Id: Ib311b2a3b3456d2e69b53b9f21ed8bd25a54ffe8

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index 93a2a00857..b3b36ac9e7 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -138,6 +138,7 @@ CONFIG_DWC_ETH_QOS=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PHY_ROCKCHIP_NANENG_EDP=y
+CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y

commit dbf89912a42ce800d4e5f12bf4c2643a4e3d3773
Author: Ren Jianing <jianing.ren@rock-chips.com>
Date:   Thu Mar 18 15:20:03 2021 +0800

    phy: rockchip: fix reset and clk error for naneng combphy
    
    The combphy has two resets. If we get reset by index 0, we will
    get apb-reset rather than phy-reset. Besides, the delault ref-clk
    of combphy is 25MHz.
    
    Signed-off-by: Ren Jianing <jianing.ren@rock-chips.com>
    Change-Id: I57349b6a28a6e5c15f86f24030bbf85d50be94e8

diff --git a/drivers/phy/phy-rockchip-naneng-combphy.c b/drivers/phy/phy-rockchip-naneng-combphy.c
index 2a3ee55ebe..e55f4d1f01 100644
--- a/drivers/phy/phy-rockchip-naneng-combphy.c
+++ b/drivers/phy/phy-rockchip-naneng-combphy.c
@@ -254,7 +254,7 @@ static int rockchip_combphy_parse_dt(struct udevice *dev,
 		return PTR_ERR(&priv->ref_clk);
 	}
 
-	ret = reset_get_by_index(dev, 0, &priv->phy_rst);
+	ret = reset_get_by_name(dev, "combphy", &priv->phy_rst);
 	if (ret) {
 		dev_err(dev, "no phy reset control specified\n");
 		return ret;
@@ -355,19 +355,8 @@ static int rk3568_combphy_cfg(struct rockchip_combphy_priv *priv)
 		return -EINVAL;
 	}
 
-	/* The default ref clock is 24Mhz */
-	if (priv->mode == PHY_TYPE_USB3 || priv->mode == PHY_TYPE_SATA) {
-		/* Set ssc_cnt[9:0]=0101111101 & 31.5KHz */
-		val = readl(priv->mmio + (0x0e << 2));
-		val &= ~GENMASK(7, 6);
-		val |= 0x01 << 6;
-		writel(val, priv->mmio + (0x0e << 2));
-
-		val = readl(priv->mmio + (0x0f << 2));
-		val &= ~GENMASK(7, 0);
-		val |= 0x5f;
-		writel(val, priv->mmio + (0x0f << 2));
-	}
+	/* The default ref clock is 25Mhz */
+	param_write(priv->phy_grf, &cfg->pipe_clk_25m, true);
 
 	if (dev_read_bool(priv->dev, "rockchip,enable-ssc")) {
 		val = readl(priv->mmio + (0x7 << 2));

commit 610d16c98cc6252133711d2dc89efcb99696707a
Author: Steven Liu <steven.liu@rock-chips.com>
Date:   Fri Mar 19 16:33:03 2021 +0800

    cpu: amp: fix default image address and delay
    
    Signed-off-by: Steven Liu <steven.liu@rock-chips.com>
    Change-Id: Ic5130cb4f360d5baee9e5f0707fec4767ea2a195

diff --git a/drivers/cpu/amp.its b/drivers/cpu/amp.its
index 8553a9f14f..753e9ee1f3 100644
--- a/drivers/cpu/amp.its
+++ b/drivers/cpu/amp.its
@@ -20,7 +20,7 @@
 			thumb        = <0>;      // 0: arm or thumb2; 1: thumb
 			hyp          = <0>;      // 0: el1/svc; 1: el2/hyp
 			load         = <0xa00000>;
-			udelay       = <500000>;
+			udelay       = <1000000>;
 			hash {
 				algo = "sha256";
 			};
@@ -36,7 +36,7 @@
 			thumb        = <0>;
 			hyp          = <0>;
 			load         = <0xb00000>;
-			udelay       = <500000>;
+			udelay       = <1000000>;
 			hash {
 				algo = "sha256";
 			};
@@ -51,8 +51,8 @@
 			cpu          = <0x200>;
 			thumb        = <0>;
 			hyp          = <0>;
-			load         = <0xc00000>;
-			udelay       = <500000>;
+			load         = <0xd00000>;
+			udelay       = <1000000>;
 			hash {
 				algo = "sha256";
 			};
@@ -67,8 +67,8 @@
 			cpu          = <0x300>;
 			thumb        = <0>;
 			hyp          = <0>;
-			load         = <0xd00000>;
-			udelay       = <500000>;
+			load         = <0xe00000>;
+			udelay       = <1000000>;
 			hash {
 				algo = "sha256";
 			};

commit c781c41c99163764fad8e5c007c72f157a989faf
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Thu Mar 11 15:29:53 2021 +0800

    cmd: crypto: add CCM/GCM mode for AES and SM4
    
    Change-Id: Id2b073d8a568c793b7153106a8a63cc08d0a89e4
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/cmd/crypto.c b/cmd/crypto.c
index a4532cd0a9..bdd1d6e191 100644
--- a/cmd/crypto.c
+++ b/cmd/crypto.c
@@ -44,6 +44,10 @@ struct cipher_test_data {
 	u32		plain_len;
 	const u8	*cipher;
 	u32		cipher_len;
+	const u8	*aad;
+	u32		aad_len;
+	const u8	*tag;
+	u32		tag_len;
 };
 
 struct rsa_test_data {
@@ -67,6 +71,8 @@ struct rsa_test_data {
 #define IS_MAC_MODE(mode)	((mode) == RK_MODE_CBC_MAC || \
 				 (mode) == RK_MODE_CMAC)
 
+#define IS_AE_MODE(mode)	((mode) == RK_MODE_CCM || \
+				 (mode) == RK_MODE_GCM)
 #define HASH_TEST(algo_type, data_in, hash_val) {\
 	.algo_name = "HASH", \
 	.mode_name = #algo_type, \
@@ -108,6 +114,26 @@ struct rsa_test_data {
 #define CIPHER_TEST(algo, mode, key, iv, plain, cipher) \
 		CIPHER_XTS_TEST(algo, mode, key, NULL, iv, plain, cipher)
 
+#define CIPHER_AE_TEST(algo_type, mode_type, key_val, iv_val, \
+		       in, out, aad_val, tag_val) { \
+	.algo_name  = #algo_type, \
+	.mode_name  = #mode_type, \
+	.algo       = CRYPTO_##algo_type,\
+	.mode       = RK_MODE_##mode_type, \
+	.key        = (key_val), \
+	.key_len    = sizeof(key_val), \
+	.iv         = (iv_val), \
+	.iv_len     = sizeof(iv_val), \
+	.plain      = (in), \
+	.plain_len  = sizeof(in), \
+	.cipher     = (out), \
+	.cipher_len = sizeof(out), \
+	.aad        = (aad_val), \
+	.aad_len    = sizeof(aad_val), \
+	.tag        = (tag_val), \
+	.tag_len    = sizeof(tag_val), \
+}
+
 #define RSA_TEST(nbits, bn, be, bc, bd, in, out) { \
 	.algo_name    = "RSA", \
 	.mode_name    = #nbits, \
@@ -169,6 +195,10 @@ const struct cipher_test_data cipher_data_set[] = {
 			aes_iv, foo_data, aes_xts_cipher),
 	CIPHER_TEST(AES, CBC_MAC, aes_key, aes_iv, foo_data, aes_cbc_mac),
 	CIPHER_TEST(AES, CMAC, aes_key, aes_iv, foo_data, aes_cmac),
+	CIPHER_AE_TEST(AES, CCM, aes_key, aes_ccm_iv, foo_data, aes_ccm_cipher,
+		       ad_data, aes_ccm_tag),
+	CIPHER_AE_TEST(AES, GCM, aes_key, aes_iv, foo_data, aes_gcm_cipher,
+		       ad_data, aes_gcm_tag),
 
 	EMPTY_TEST(),
 	CIPHER_TEST(SM4, ECB, sm4_key, sm4_iv, foo_data, sm4_ecb_cipher),
@@ -181,6 +211,10 @@ const struct cipher_test_data cipher_data_set[] = {
 			sm4_iv, foo_data, sm4_xts_cipher),
 	CIPHER_TEST(SM4, CBC_MAC, sm4_key, sm4_iv, foo_data, sm4_cbc_mac),
 	CIPHER_TEST(SM4, CMAC, sm4_key, sm4_iv, foo_data, sm4_cmac),
+	CIPHER_AE_TEST(SM4, CCM, sm4_key, sm4_ccm_iv, foo_data, sm4_ccm_cipher,
+		       ad_data, sm4_ccm_tag),
+	CIPHER_AE_TEST(SM4, GCM, sm4_key, sm4_iv, foo_data, sm4_gcm_cipher,
+		       ad_data, sm4_gcm_tag),
 #else
 	EMPTY_TEST(),
 #endif
@@ -313,6 +347,7 @@ int test_cipher_perf(struct udevice *dev, cipher_context *ctx,
 	u32 total_size = PERF_TOTAL_SIZE;
 	u32 data_size = PERF_BUFF_SIZE;
 	u8 *plain = NULL, *cipher = NULL;
+	u8 aad[128], tag[16];
 	int ret = 0, i;
 
 	*MBps = 0;
@@ -333,17 +368,21 @@ int test_cipher_perf(struct udevice *dev, cipher_context *ctx,
 	}
 
 	memset(plain, 0xab, data_size);
+	memset(aad, 0xcb, sizeof(aad));
 
 	ulong start = get_timer(0);
 
 	for (i = 0; i < total_size / data_size; i++) {
 		if (IS_MAC_MODE(ctx->mode))
 			ret = crypto_mac(dev, ctx, plain, data_size, cipher);
+		else if (IS_AE_MODE(ctx->mode))
+			ret = crypto_ae(dev, ctx, plain, data_size,
+					aad, sizeof(aad), cipher, tag);
 		else
 			ret = crypto_cipher(dev, ctx, plain, cipher,
 					    data_size, enc);
 		if (ret) {
-			printf("%s, %d:crypto_aes error! ret = %d\n",
+			printf("%s, %d:crypto calc error! ret = %d\n",
 			       __func__, __LINE__, ret);
 			goto exit;
 		}
@@ -433,7 +472,7 @@ int test_cipher_result(void)
 	const struct cipher_test_data *test_data = NULL;
 	struct udevice *dev;
 	cipher_context ctx;
-	u8 out[256];
+	u8 out[256], tag[16];
 	int ret;
 	u32 i;
 
@@ -471,17 +510,30 @@ int test_cipher_result(void)
 		if (IS_MAC_MODE(ctx.mode))
 			ret = crypto_mac(dev, &ctx, test_data->plain,
 					 test_data->plain_len, out);
+		else if (IS_AE_MODE(ctx.mode))
+			ret = crypto_ae(dev, &ctx,
+					test_data->plain, test_data->plain_len,
+					test_data->aad, test_data->aad_len,
+					out, tag);
 		else
 			ret = crypto_cipher(dev, &ctx, test_data->plain,
 					    out, test_data->plain_len, true);
 		if (ret)
 			goto error;
 
+		if (test_data->tag &&
+		    memcmp(test_data->tag, tag, test_data->tag_len) != 0) {
+			printf("tag mismatch!!!\n");
+			dump_hex("expect", test_data->tag, test_data->tag_len);
+			dump_hex("actual", tag, test_data->tag_len);
+			goto error;
+		}
+
 		print_result_MBps(test_data->algo_name, test_data->mode_name,
 				  "encrypt", MBps, test_data->cipher, out,
 				  test_data->cipher_len);
 
-		if (!IS_MAC_MODE(ctx.mode)) {
+		if (!IS_MAC_MODE(ctx.mode) && !IS_AE_MODE(ctx.mode)) {
 			test_cipher_perf(dev, &ctx, &MBps, false);
 			ret = crypto_cipher(dev, &ctx, test_data->cipher,
 					    out, test_data->cipher_len, false);
diff --git a/include/rockchip/crypto_fix_test_data.h b/include/rockchip/crypto_fix_test_data.h
index f6b1bb57d4..b8045114bf 100644
--- a/include/rockchip/crypto_fix_test_data.h
+++ b/include/rockchip/crypto_fix_test_data.h
@@ -30,6 +30,31 @@ const u8 foo_data[] = {
 
 #if CONFIG_IS_ENABLED(ROCKCHIP_CIPHER)
 
+const u8 ad_data[] = {
+0x5d, 0xe8, 0xa9, 0x49, 0x92, 0xc5, 0x70, 0x12,
+0xd8, 0x17, 0x12, 0xf3, 0xa3, 0xa0, 0xa3, 0x59,
+0x2d, 0xa6, 0x51, 0xa9, 0x5f, 0x06, 0x00, 0x10,
+0x4c, 0x5f, 0x69, 0xd4, 0x6e, 0x1d, 0x01, 0xf6,
+0x07, 0x6f, 0x4f, 0xc5, 0x16, 0x83, 0x9a, 0x82,
+0xb9, 0x68, 0xcc, 0x15, 0x1d, 0xb9, 0x51, 0x69,
+0x92, 0x9b, 0x67, 0x61, 0xed, 0xfd, 0x3a, 0x53,
+0x5c, 0x0b, 0x56, 0xe9, 0xf6, 0x5a, 0xdf, 0x96,
+0xd6, 0x70, 0xda, 0x84, 0x93, 0x85, 0xa2, 0x79,
+0x6a, 0xfb, 0xd9, 0x07, 0x3e, 0x7d, 0x25, 0xfe,
+0x82, 0x44, 0xee, 0x0b, 0x57, 0x86, 0x61, 0x31,
+0x92, 0x05, 0xc0, 0x26, 0xed, 0x69, 0xa8, 0x11,
+0xe9, 0xb8, 0x1b, 0x66, 0xbe, 0x62, 0xe6, 0x29,
+0xc4, 0xb9, 0x37, 0xf0, 0x09, 0xc1, 0x39, 0x50,
+0x86, 0x90, 0xec, 0xbc, 0x7c, 0xcb, 0xa3, 0x66,
+0xf8, 0x81, 0x03, 0x15, 0x59, 0x22, 0x56, 0x45,
+0x1e, 0xa0, 0x66, 0x86, 0x14, 0x3f, 0x2a, 0x65,
+0x16, 0x0a, 0xd8, 0xb1, 0x8a, 0x8e, 0xa9, 0x7c,
+0x59, 0x18, 0x6e, 0xc0, 0xc9, 0xad, 0xf6, 0x57,
+0xf6, 0x18, 0x24, 0x81, 0xdf, 0x14, 0xf6, 0x02,
+0xe7, 0x94, 0xf9, 0x97, 0x5e, 0xe0, 0xb1, 0x42,
+0x6f, 0xbf, 0xf5, 0x53, 0x79, 0x77, 0x74, 0x81,
+};
+
 const u8 des_key[] = {
 0x7d, 0xe3, 0x2d, 0x3a, 0x32, 0xde, 0xb2, 0xac,
 };
@@ -412,6 +437,67 @@ const unsigned char aes_xts_cipher[] = {
 0x6c, 0xe5, 0x9d, 0x29, 0x14, 0x5f, 0x76, 0x90,
 };
 
+const u8 aes_ccm_iv[] = {
+0x80, 0xb8, 0x3f, 0x22, 0x2f, 0x7d, 0x1f, 0x1a,
+0xc6, 0xc1,
+};
+
+const u8 aes_ccm_cipher[] = {
+0x2c, 0x16, 0xfe, 0xff, 0x23, 0xc2, 0xd8, 0x17,
+0x05, 0x1e, 0x88, 0xd0, 0xed, 0x71, 0x03, 0x99,
+0xd1, 0xf4, 0x94, 0x2e, 0x1e, 0xd0, 0xd3, 0x89,
+0x48, 0xff, 0xd9, 0xcc, 0xec, 0xed, 0xff, 0x3e,
+0xb6, 0xe0, 0x8f, 0x6e, 0x5c, 0x54, 0xf9, 0x73,
+0x47, 0x99, 0xee, 0x21, 0xa1, 0xd6, 0x1b, 0x25,
+0x5a, 0xbc, 0xca, 0xac, 0xec, 0xb6, 0xe9, 0x8b,
+0xbe, 0x47, 0xdf, 0x73, 0xfe, 0x85, 0x49, 0xd3,
+0x93, 0x77, 0x10, 0x88, 0xf5, 0x77, 0x2e, 0x22,
+0x7b, 0x51, 0x76, 0x99, 0x45, 0x97, 0xdf, 0x9e,
+0x59, 0x3d, 0xc4, 0x53, 0x45, 0x26, 0x78, 0x22,
+0x37, 0xa1, 0xfc, 0xa9, 0xc2, 0xd6, 0x63, 0x37,
+0x4c, 0x81, 0x2e, 0x35, 0xc3, 0xc7, 0x6d, 0x76,
+0xf6, 0xd4, 0xfd, 0x5b, 0x16, 0xb6, 0xac, 0x0b,
+0x3b, 0x78, 0xd8, 0x4b, 0x8c, 0x29, 0x24, 0x67,
+0x82, 0x16, 0x93, 0xa8, 0x80, 0xff, 0x0e, 0xb3,
+0x1e, 0x59, 0xcd, 0xa3, 0x23, 0x7c, 0x77, 0xe2,
+0x99, 0x54, 0x60, 0x75, 0x65, 0x4f, 0x81, 0xdd,
+0xf6, 0xba, 0xc2, 0x4d, 0x76, 0x99, 0x3a, 0xbc,
+0xdc, 0x74, 0x6f, 0xd2, 0xbb, 0xbd, 0xbb, 0x16,
+};
+
+const u8 aes_ccm_tag[] = {
+0xc7, 0x7c, 0xf0, 0xbe, 0x9a, 0x95, 0x59, 0x0e,
+0x2f, 0x92, 0x9e, 0xa3, 0xdf, 0xd6, 0xd2, 0xc4,
+};
+
+const u8 aes_gcm_cipher[] = {
+0xb4, 0x85, 0x1f, 0x94, 0x1f, 0x6a, 0xb8, 0x82,
+0xb9, 0x18, 0xc6, 0xa9, 0x30, 0x5f, 0x19, 0xf7,
+0x18, 0x5f, 0x69, 0x96, 0x10, 0x86, 0xb0, 0x48,
+0x16, 0x81, 0x76, 0xc3, 0x77, 0x95, 0xed, 0x03,
+0x85, 0xa5, 0xae, 0x2b, 0x5c, 0xd5, 0x01, 0x04,
+0x7c, 0xf0, 0x6e, 0x82, 0x90, 0xbd, 0xf3, 0x92,
+0xfe, 0x21, 0xa7, 0xce, 0xd2, 0x6d, 0xe9, 0xd0,
+0x4d, 0x66, 0x4d, 0xa0, 0x0b, 0x43, 0x66, 0xd3,
+0x8e, 0xad, 0x7e, 0x1b, 0xc0, 0x41, 0xc6, 0xb4,
+0x38, 0x77, 0x51, 0xda, 0xc9, 0x41, 0x8e, 0x2f,
+0x57, 0xe1, 0xba, 0xe4, 0x7e, 0x23, 0x12, 0xda,
+0x82, 0xb5, 0x19, 0xa0, 0xbd, 0x38, 0x09, 0x1a,
+0xf3, 0x46, 0x61, 0x78, 0x12, 0x1a, 0x98, 0x97,
+0xb3, 0x82, 0xea, 0x4c, 0x45, 0xb9, 0xa7, 0xac,
+0x40, 0x6f, 0x5d, 0xd2, 0xcd, 0x89, 0xc2, 0x80,
+0x3f, 0x8f, 0x01, 0x36, 0x90, 0x01, 0x49, 0x9f,
+0x2f, 0x7b, 0x3b, 0xe6, 0xcd, 0xe8, 0xe9, 0x14,
+0x86, 0x29, 0xa0, 0xaf, 0xe4, 0x01, 0x55, 0xe1,
+0x12, 0xe2, 0x20, 0x49, 0xf5, 0x8e, 0xc3, 0x1a,
+0xac, 0xbb, 0xc0, 0x20, 0x7b, 0xb3, 0x3d, 0x09,
+};
+
+const u8 aes_gcm_tag[] = {
+0x4b, 0x26, 0xcf, 0x82, 0x0c, 0x67, 0x97, 0xdd,
+0xdb, 0x1d, 0x78, 0xde, 0x69, 0x7d, 0x52, 0x9c,
+};
+
 const u8 aes_cbc_mac[] = {
 0x9d, 0x8c, 0x05, 0x0a, 0x91, 0xa2, 0x64, 0xe6,
 0x9e, 0x40, 0xc4, 0x27, 0x96, 0xed, 0xfe, 0x1a,
@@ -597,6 +683,67 @@ const u8 sm4_xts_cipher[] = {
 	0x9b, 0xd3, 0x46, 0xbb, 0x55, 0xc0, 0xa2, 0x4b,
 	0x24, 0x73, 0x30, 0x7e, 0x74, 0x5f, 0x67, 0x08,
 };
+
+const u8 sm4_gcm_cipher[] = {
+	0xc8, 0x09, 0x99, 0xfb, 0xa7, 0xc8, 0x0d, 0x91,
+	0xb8, 0x71, 0x71, 0xd9, 0x69, 0xc0, 0x40, 0xf6,
+	0x82, 0xbe, 0xd7, 0x6d, 0xf4, 0xbe, 0x63, 0xc5,
+	0xf2, 0x9d, 0x17, 0xf1, 0x82, 0x2e, 0x29, 0x04,
+	0xd6, 0x53, 0x18, 0x11, 0x08, 0x3b, 0xe3, 0x83,
+	0x68, 0xd5, 0x18, 0x44, 0xd1, 0x57, 0x21, 0x4b,
+	0xa8, 0x3b, 0x0c, 0xad, 0x63, 0x5a, 0xb8, 0x80,
+	0x21, 0x9d, 0xce, 0x59, 0x8b, 0xba, 0xce, 0xc1,
+	0x4a, 0x1d, 0x40, 0x12, 0x94, 0x04, 0x61, 0x3d,
+	0xe7, 0x23, 0x5b, 0xc0, 0x63, 0x33, 0x13, 0x00,
+	0x85, 0xb4, 0x9d, 0x06, 0xf4, 0x70, 0x94, 0x57,
+	0xe9, 0xe4, 0x6b, 0xb6, 0xc7, 0x33, 0xae, 0xf6,
+	0x9e, 0x2c, 0x88, 0xe1, 0x16, 0x48, 0xc0, 0x16,
+	0xcd, 0x8b, 0xa1, 0x64, 0x61, 0xe9, 0x87, 0x72,
+	0xb4, 0x0e, 0xef, 0x40, 0x51, 0x67, 0x19, 0xe5,
+	0x37, 0xe7, 0x3a, 0xfa, 0x11, 0x90, 0x92, 0xec,
+	0x67, 0x48, 0xd8, 0xb9, 0xf3, 0xcb, 0xd0, 0x12,
+	0x5a, 0xbe, 0xee, 0x3b, 0xc6, 0x9b, 0xe4, 0x79,
+	0xbc, 0xe2, 0x55, 0x9d, 0x2b, 0x8d, 0x96, 0x4d,
+	0x26, 0xc7, 0xa2, 0xfb, 0x4b, 0x09, 0xbe, 0xd4,
+};
+
+const u8 sm4_gcm_tag[] = {
+	0x34, 0x54, 0xf0, 0x5f, 0xa1, 0x26, 0x0f, 0xeb,
+	0x45, 0x6a, 0x46, 0x75, 0xdc, 0x93, 0x2d, 0xea,
+};
+
+const u8 sm4_ccm_iv[] = {
+	0x48, 0x5c, 0x38, 0x45, 0x26, 0xa8, 0x72,
+};
+
+const u8 sm4_ccm_cipher[] = {
+	0x20, 0x4e, 0x7b, 0xcb, 0xc6, 0x6a, 0xd0, 0x04,
+	0x99, 0xac, 0xdc, 0x28, 0x51, 0x1c, 0x06, 0x56,
+	0x3b, 0x91, 0x25, 0x29, 0x95, 0x26, 0x11, 0x4a,
+	0x87, 0x69, 0xa0, 0x67, 0xdf, 0xae, 0x27, 0x24,
+	0x9a, 0x76, 0x85, 0xa9, 0x5e, 0xc6, 0x1e, 0xfb,
+	0x43, 0xc9, 0x93, 0x8a, 0x0d, 0x6b, 0xf3, 0x11,
+	0x57, 0x90, 0x34, 0x76, 0x86, 0xc3, 0xf7, 0xeb,
+	0x06, 0xa1, 0x97, 0x4f, 0xbf, 0x26, 0x9b, 0x99,
+	0xb5, 0xc2, 0x10, 0x36, 0xaf, 0xea, 0x76, 0x0b,
+	0xac, 0x12, 0xb1, 0xcf, 0xbb, 0x55, 0x87, 0xf0,
+	0xfb, 0x11, 0x86, 0x47, 0xe9, 0x26, 0xce, 0xe9,
+	0x7e, 0x24, 0x76, 0x7c, 0x0f, 0xdd, 0x31, 0x53,
+	0x65, 0x95, 0x61, 0xb3, 0x7f, 0x18, 0xdd, 0x61,
+	0x72, 0xc1, 0x2e, 0x50, 0xbb, 0xe9, 0x79, 0xcb,
+	0x2f, 0x03, 0xf6, 0x3c, 0xec, 0x76, 0x73, 0x73,
+	0x47, 0x70, 0xb6, 0x29, 0x4a, 0xd6, 0xd2, 0x7d,
+	0x68, 0xb2, 0xd8, 0x79, 0x9b, 0x19, 0x85, 0x86,
+	0x23, 0x99, 0xeb, 0xf7, 0x8a, 0x27, 0xa6, 0xf9,
+	0x40, 0x73, 0xc0, 0x6a, 0x3a, 0x6e, 0x59, 0x2d,
+	0x20, 0x80, 0x07, 0x92, 0x45, 0xa4, 0x4a, 0x83,
+};
+
+const u8 sm4_ccm_tag[] = {
+	0x34, 0x39, 0x3c, 0x43, 0x03, 0xd3, 0x37, 0x76,
+	0xed, 0xde, 0x34, 0xfa, 0xdf, 0xc8, 0x1d, 0x1c,
+};
+
 #endif
 
 const u8 sm4_cbc_mac[] = {

commit c3ce993789b241f7bfc245002cbdd7d111499e3f
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Thu Mar 11 09:59:27 2021 +0800

    drivers: crypto: add CCM/GCM support for AES/SM4
    
    Crypto V2 implements the following interfaces:
    AES: CCM/GCM
    SM4: CCM/GCM
    Change-Id: Id364e3818a02e92865ae30a894a780913cd0c005
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/drivers/crypto/crypto-uclass.c b/drivers/crypto/crypto-uclass.c
index 5bc72941c4..61489d3e3e 100644
--- a/drivers/crypto/crypto-uclass.c
+++ b/drivers/crypto/crypto-uclass.c
@@ -283,6 +283,18 @@ int crypto_mac(struct udevice *dev, cipher_context *ctx,
 	return ops->cipher_mac(dev, ctx, in, len, tag);
 }
 
+int crypto_ae(struct udevice *dev, cipher_context *ctx,
+	      const u8 *in, u32 len, const u8 *aad, u32 aad_len,
+	      u8 *out, u8 *tag)
+{
+	const struct dm_crypto_ops *ops = device_get_ops(dev);
+
+	if (!ops || !ops->cipher_ae)
+		return -ENOSYS;
+
+	return ops->cipher_ae(dev, ctx, in, len, aad, aad_len, out, tag);
+}
+
 UCLASS_DRIVER(crypto) = {
 	.id	= UCLASS_CRYPTO,
 	.name	= "crypto",
diff --git a/drivers/crypto/rockchip/crypto_v2.c b/drivers/crypto/rockchip/crypto_v2.c
index 5177803ab6..e934d5024e 100644
--- a/drivers/crypto/rockchip/crypto_v2.c
+++ b/drivers/crypto/rockchip/crypto_v2.c
@@ -105,11 +105,16 @@ struct rockchip_crypto_priv {
 			     (rk_mode) != RK_MODE_CBC_MAC)
 
 #define IS_NEED_TAG(rk_mode) ((rk_mode) == RK_MODE_CMAC || \
-			      (rk_mode) == RK_MODE_CBC_MAC)
+			      (rk_mode) == RK_MODE_CBC_MAC || \
+			      (rk_mode) == RK_MODE_CCM || \
+			      (rk_mode) == RK_MODE_GCM)
 
 #define IS_MAC_MODE(rk_mode) ((rk_mode) == RK_MODE_CMAC || \
 			      (rk_mode) == RK_MODE_CBC_MAC)
 
+#define IS_AE_MODE(rk_mode) ((rk_mode) == RK_MODE_CCM || \
+			     (rk_mode) == RK_MODE_GCM)
+
 fdt_addr_t crypto_base;
 
 static inline void word2byte_be(u32 word, u8 *ch)
@@ -144,6 +149,21 @@ static inline void clear_key_regs(void)
 	clear_regs(CRYPTO_CH0_KEY_0, CRYPTO_KEY_CHANNEL_NUM * 4);
 }
 
+static inline void read_regs(u32 base, u8 *data, u32 data_len)
+{
+	u8 tmp_buf[4];
+	u32 i;
+
+	for (i = 0; i < data_len / 4; i++)
+		word2byte_be(crypto_read(base + i * 4),
+			     data + i * 4);
+
+	if (data_len % 4) {
+		word2byte_be(crypto_read(base + i * 4), tmp_buf);
+		memcpy(data + i * 4, tmp_buf, data_len % 4);
+	}
+}
+
 static inline void write_regs(u32 base, const u8 *data, u32 data_len)
 {
 	u8 tmp_buf[4];
@@ -181,6 +201,15 @@ static inline void set_iv_reg(u32 chn, const u8 *iv, u32 iv_len)
 	crypto_write(iv_len, CRYPTO_CH0_IV_LEN_0 + 4 * chn);
 }
 
+static inline void get_iv_reg(u32 chn, u8 *iv, u32 iv_len)
+{
+	u32 base_iv;
+
+	base_iv = CRYPTO_CH0_IV_0 + chn * 0x10;
+
+	read_regs(base_iv, iv, iv_len);
+}
+
 static inline void get_tag_from_reg(u32 chn, u8 *tag, u32 tag_len)
 {
 	u32 i;
@@ -392,7 +421,6 @@ int rk_hash_final(void *ctx, u8 *digest, size_t len)
 {
 	struct rk_hash_ctx *tmp_ctx = (struct rk_hash_ctx *)ctx;
 	int ret = -EINVAL;
-	u32 i;
 
 	if (!digest)
 		goto exit;
@@ -408,16 +436,7 @@ int rk_hash_final(void *ctx, u8 *digest, size_t len)
 	ret = RK_POLL_TIMEOUT(!crypto_read(CRYPTO_HASH_VALID),
 			      RK_CRYPTO_TIMEOUT);
 
-	for (i = 0; i < len / 4; i++)
-		word2byte_be(crypto_read(CRYPTO_HASH_DOUT_0 + i * 4),
-			     digest + i * 4);
-
-	if (len % 4) {
-		u8 tmp_buf[4];
-
-		word2byte_be(crypto_read(CRYPTO_HASH_DOUT_0 + i * 4), tmp_buf);
-		memcpy(digest + i * 4, tmp_buf, len % 4);
-	}
+	read_regs(CRYPTO_HASH_DOUT_0, digest, len);
 
 	/* clear hash status */
 	crypto_write(CRYPTO_HASH_IS_VALID, CRYPTO_HASH_VALID);
@@ -593,10 +612,28 @@ static const u32 rk_mode2bc_mode[RK_MODE_MAX] = {
 	[RK_MODE_CFB] = CRYPTO_BC_CFB,
 	[RK_MODE_OFB] = CRYPTO_BC_OFB,
 	[RK_MODE_XTS] = CRYPTO_BC_XTS,
+	[RK_MODE_CCM] = CRYPTO_BC_CCM,
+	[RK_MODE_GCM] = CRYPTO_BC_GCM,
 	[RK_MODE_CMAC] = CRYPTO_BC_CMAC,
 	[RK_MODE_CBC_MAC] = CRYPTO_BC_CBC_MAC,
 };
 
+static inline void set_pc_len_reg(u32 chn, u64 pc_len)
+{
+	u32 chn_base = CRYPTO_CH0_PC_LEN_0 + chn * 0x08;
+
+	crypto_write(pc_len & 0xffffffff, chn_base);
+	crypto_write(pc_len >> 32, chn_base + 4);
+}
+
+static inline void set_aad_len_reg(u32 chn, u64 pc_len)
+{
+	u32 chn_base = CRYPTO_CH0_AAD_LEN_0 + chn * 0x08;
+
+	crypto_write(pc_len & 0xffffffff, chn_base);
+	crypto_write(pc_len >> 32, chn_base + 4);
+}
+
 static inline bool is_des_mode(u32 rk_mode)
 {
 	return (rk_mode == RK_MODE_ECB ||
@@ -648,6 +685,66 @@ static void dump_crypto_state(struct crypto_lli_desc *desc, int ret)
 	     crypto_read(CRYPTO_DMA_DST_RADDR));
 }
 
+static int ccm128_set_iv_reg(u32 chn, const u8 *nonce, u32 nlen)
+{
+	u8 iv_buf[AES_BLOCK_SIZE];
+	u32 L;
+
+	memset(iv_buf, 0x00, sizeof(iv_buf));
+
+	L = 15 - nlen;
+	iv_buf[0] = ((u8)(L - 1) & 7);
+
+	/* the L parameter */
+	L = iv_buf[0] & 7;
+
+	/* nonce is too short */
+	if (nlen < (14 - L))
+		return -EINVAL;
+
+	/* clear aad flag */
+	iv_buf[0] &= ~0x40;
+	memcpy(&iv_buf[1], nonce, 14 - L);
+
+	set_iv_reg(chn, iv_buf, AES_BLOCK_SIZE);
+
+	return 0;
+}
+
+static void ccm_aad_padding(u32 aad_len, u8 *padding, u32 *padding_size)
+{
+	u32 i;
+
+	i = aad_len < (0x10000 - 0x100) ? 2 : 6;
+
+	if (i == 2) {
+		padding[0] = (u8)(aad_len >> 8);
+		padding[1] = (u8)aad_len;
+	} else {
+		padding[0] = 0xFF;
+		padding[1] = 0xFE;
+		padding[2] = (u8)(aad_len >> 24);
+		padding[3] = (u8)(aad_len >> 16);
+		padding[4] = (u8)(aad_len >> 8);
+	}
+
+	*padding_size = i;
+}
+
+static int ccm_compose_aad_iv(u8 *aad_iv, u32 data_len, u32 tag_size)
+{
+	aad_iv[0] |= ((u8)(((tag_size - 2) / 2) & 7) << 3);
+
+	aad_iv[12] = (u8)(data_len >> 24);
+	aad_iv[13] = (u8)(data_len >> 16);
+	aad_iv[14] = (u8)(data_len >> 8);
+	aad_iv[15] = (u8)data_len;
+
+	aad_iv[0] |= 0x40;	//set aad flag
+
+	return 0;
+}
+
 static int hw_cipher_init(u32 chn, const u8 *key, const u8 *twk_key,
 			  u32 key_len, const u8 *iv, u32 iv_len,
 			  u32 algo, u32 mode, bool enc)
@@ -706,7 +803,10 @@ static int hw_cipher_init(u32 chn, const u8 *key, const u8 *twk_key,
 		write_key_reg(key_chn_sel + 4, twk_key, key_len);
 
 	/* set iv reg */
-	set_iv_reg(chn, iv, iv_len);
+	if (rk_mode == RK_MODE_CCM)
+		ccm128_set_iv_reg(chn, iv, iv_len);
+	else
+		set_iv_reg(chn, iv, iv_len);
 
 	/* din_swap set 1, dout_swap set 1, default 1. */
 	crypto_write(0x00030003, CRYPTO_FIFO_CTL);
@@ -719,11 +819,11 @@ static int hw_cipher_init(u32 chn, const u8 *key, const u8 *twk_key,
 }
 
 static int hw_cipher_crypt(const u8 *in, u8 *out, u64 len,
-			   const u8 *aad, u64 aad_len, u8 *tag, u32 tag_len,
-			   u32 mode)
+			   const u8 *aad, u32 aad_len,
+			   u8 *tag, u32 tag_len, u32 mode)
 {
-	struct crypto_lli_desc *data_desc = NULL;
-	u8 *dma_in = NULL, *dma_out = NULL;
+	struct crypto_lli_desc *data_desc = NULL, *aad_desc = NULL;
+	u8 *dma_in = NULL, *dma_out = NULL, *aad_tmp = NULL;
 	u32 rk_mode = RK_GET_RK_MODE(mode);
 	u32 reg_ctrl = 0, tmp_len = 0;
 	u32 expt_int = 0, mask = 0;
@@ -769,10 +869,6 @@ static int hw_cipher_crypt(const u8 *in, u8 *out, u64 len,
 	data_desc->dst_addr    = (u32)virt_to_phys(dma_out);
 	data_desc->dst_len     = dst_len;
 	data_desc->dma_ctrl    = LLI_DMA_CTRL_LAST;
-	data_desc->user_define = LLI_USER_CPIHER_START |
-				 LLI_USER_STRING_START |
-				 LLI_USER_STRING_LAST |
-				 (key_chn << 4);
 
 	if (IS_MAC_MODE(rk_mode)) {
 		expt_int = CRYPTO_LIST_DONE_INT_ST;
@@ -782,10 +878,73 @@ static int hw_cipher_crypt(const u8 *in, u8 *out, u64 len,
 		data_desc->dma_ctrl |= LLI_DMA_CTRL_DST_DONE;
 	}
 
-	crypto_write((u32)virt_to_phys(data_desc), CRYPTO_DMA_LLI_ADDR);
+	if (rk_mode == RK_MODE_CCM || rk_mode == RK_MODE_GCM) {
+		u32 aad_tmp_len = 0;
+
+		data_desc->user_define = LLI_USER_STRING_START |
+					 LLI_USER_STRING_LAST |
+					 (key_chn << 4);
+
+		aad_desc = align_malloc(sizeof(*aad_desc), LLI_ADDR_ALIGN_SIZE);
+		if (!aad_desc)
+			goto exit;
+
+		memset(aad_desc, 0x00, sizeof(*aad_desc));
+		aad_desc->next_addr = (u32)virt_to_phys(data_desc);
+		aad_desc->user_define = LLI_USER_CPIHER_START |
+					 LLI_USER_STRING_START |
+					 LLI_USER_STRING_LAST |
+					 LLI_USER_STRING_AAD |
+					 (key_chn << 4);
+
+		if (rk_mode == RK_MODE_CCM) {
+			u8 padding[AES_BLOCK_SIZE];
+			u32 padding_size = 0;
+
+			memset(padding, 0x00, sizeof(padding));
+			ccm_aad_padding(aad_len, padding, &padding_size);
+
+			aad_tmp_len = aad_len + AES_BLOCK_SIZE + padding_size;
+			aad_tmp_len = ROUNDUP(aad_tmp_len, AES_BLOCK_SIZE);
+			aad_tmp = align_malloc(aad_tmp_len,
+					       DATA_ADDR_ALIGN_SIZE);
+			if (!aad_tmp)
+				goto exit;
+
+			/* read iv data from reg */
+			get_iv_reg(key_chn, aad_tmp, AES_BLOCK_SIZE);
+			ccm_compose_aad_iv(aad_tmp, tmp_len, tag_len);
+			memcpy(aad_tmp + AES_BLOCK_SIZE, padding, padding_size);
+			memset(aad_tmp + aad_tmp_len - AES_BLOCK_SIZE,
+			       0x00, AES_BLOCK_SIZE);
+			memcpy(aad_tmp + AES_BLOCK_SIZE + padding_size,
+			       aad, aad_len);
+		} else {
+			aad_tmp_len = aad_len;
+			aad_tmp = align_malloc(aad_tmp_len,
+					       DATA_ADDR_ALIGN_SIZE);
+			if (!aad_tmp)
+				goto exit;
+
+			memcpy(aad_tmp, aad, aad_tmp_len);
+			set_aad_len_reg(key_chn, aad_tmp_len);
+			set_pc_len_reg(key_chn, tmp_len);
+		}
+
+		aad_desc->src_addr = (u32)virt_to_phys(aad_tmp);
+		aad_desc->src_len  = aad_tmp_len;
+		crypto_write((u32)virt_to_phys(aad_desc), CRYPTO_DMA_LLI_ADDR);
+		cache_op_inner(DCACHE_AREA_CLEAN, aad_tmp, aad_tmp_len);
+		cache_op_inner(DCACHE_AREA_CLEAN, aad_desc, sizeof(*aad_desc));
+	} else {
+		data_desc->user_define = LLI_USER_CPIHER_START |
+					 LLI_USER_STRING_START |
+					 LLI_USER_STRING_LAST |
+					 (key_chn << 4);
+		crypto_write((u32)virt_to_phys(data_desc), CRYPTO_DMA_LLI_ADDR);
+	}
 
 	cache_op_inner(DCACHE_AREA_CLEAN, data_desc, sizeof(*data_desc));
-	cache_op_inner(DCACHE_AREA_CLEAN, (void *)aad, aad_len);
 	cache_op_inner(DCACHE_AREA_CLEAN, dma_in, tmp_len);
 	cache_op_inner(DCACHE_AREA_INVALIDATE, dma_out, tmp_len);
 
@@ -822,6 +981,7 @@ static int hw_cipher_crypt(const u8 *in, u8 *out, u64 len,
 exit:
 	crypto_write(0xffff0000, CRYPTO_BC_CTL);//bc_ctl disable
 	align_free(data_desc);
+	align_free(aad_desc);
 	if (dma_in && dma_in != in)
 		align_free(dma_in);
 	if (dma_out && dma_out != out)
@@ -1014,6 +1174,45 @@ int rockchip_crypto_mac(struct udevice *dev, cipher_context *ctx,
 			     ctx->key, ctx->key_len, in, len, tag);
 }
 
+int rk_crypto_ae(struct udevice *dev, u32 algo, u32 mode,
+		 const u8 *key, u32 key_len, const u8 *nonce, u32 nonce_len,
+		 const u8 *in, u32 len, const u8 *aad, u32 aad_len,
+		 u8 *out, u8 *tag)
+{
+	u32 rk_mode = RK_GET_RK_MODE(mode);
+	int ret;
+
+	if (!IS_AE_MODE(rk_mode))
+		return -EINVAL;
+
+	if (algo != CRYPTO_AES && algo != CRYPTO_SM4)
+		return -EINVAL;
+
+	/* RV1126/RV1109 do not support aes-192 */
+#if defined(CONFIG_ROCKCHIP_RV1126)
+	if (algo == CRYPTO_AES && key_len == AES_KEYSIZE_192)
+		return -EINVAL;
+#endif
+
+	ret = hw_cipher_init(g_key_chn, key, NULL, key_len, nonce, nonce_len,
+			     algo, mode, true);
+	if (ret)
+		return ret;
+
+	return hw_cipher_crypt(in, out, len, aad, aad_len,
+			       tag, AES_BLOCK_SIZE, mode);
+}
+
+int rockchip_crypto_ae(struct udevice *dev, cipher_context *ctx,
+		       const u8 *in, u32 len, const u8 *aad, u32 aad_len,
+		       u8 *out, u8 *tag)
+
+{
+	return rk_crypto_ae(dev, ctx->algo, ctx->mode, ctx->key, ctx->key_len,
+			    ctx->iv, ctx->iv_len, in, len,
+			    aad, aad_len, out, tag);
+}
+
 #endif
 
 #if CONFIG_IS_ENABLED(ROCKCHIP_RSA)
@@ -1097,6 +1296,7 @@ static const struct dm_crypto_ops rockchip_crypto_ops = {
 #if CONFIG_IS_ENABLED(ROCKCHIP_CIPHER)
 	.cipher_crypt = rockchip_crypto_cipher,
 	.cipher_mac = rockchip_crypto_mac,
+	.cipher_ae  = rockchip_crypto_ae,
 #endif
 };
 
diff --git a/include/crypto.h b/include/crypto.h
index d059286373..d5eed1aea2 100644
--- a/include/crypto.h
+++ b/include/crypto.h
@@ -46,6 +46,8 @@ enum RK_CRYPTO_MODE {
 	RK_MODE_CFB,
 	RK_MODE_OFB,
 	RK_MODE_XTS,
+	RK_MODE_CCM,
+	RK_MODE_GCM,
 	RK_MODE_CMAC,
 	RK_MODE_CBC_MAC,
 	RK_MODE_MAX
@@ -99,6 +101,12 @@ struct dm_crypto_ops {
 	/* cipher mac cmac&cbc_mac */
 	int (*cipher_mac)(struct udevice *dev, cipher_context *ctx,
 			  const u8 *in, u32 len, u8 *tag);
+
+	/* cipher aes ccm&gcm */
+	int (*cipher_ae)(struct udevice *dev, cipher_context *ctx,
+			 const u8 *in, u32 len, const u8 *aad, u32 aad_len,
+			 u8 *out, u8 *tag);
+
 };
 
 /**
@@ -250,4 +258,21 @@ int crypto_cipher(struct udevice *dev, cipher_context *ctx,
 int crypto_mac(struct udevice *dev, cipher_context *ctx,
 	       const u8 *in, u32 len, u8 *tag);
 
+/**
+ * crypto_ae() - Crypto cipher authorization and encryption
+ *
+ * @dev: crypto device
+ * @ctx: cipher context
+ * @in: input data buffer
+ * @len: input data length
+ * @aad: associated data buffer
+ * @aad_len: associated data length
+ * @out: output data buffer
+ * @tag: tag buffer
+ * @return 0 on success, otherwise failed
+ */
+int crypto_ae(struct udevice *dev, cipher_context *ctx,
+	      const u8 *in, u32 len, const u8 *aad, u32 aad_len,
+	      u8 *out, u8 *tag);
+
 #endif
diff --git a/include/rockchip/crypto_v2.h b/include/rockchip/crypto_v2.h
index d16dae4623..67071e2410 100644
--- a/include/rockchip/crypto_v2.h
+++ b/include/rockchip/crypto_v2.h
@@ -523,7 +523,7 @@
 #define LLI_USER_CPIHER_START		_BIT(0)
 #define LLI_USER_STRING_START		_BIT(1)
 #define LLI_USER_STRING_LAST		_BIT(2)
-#define LLI_USER_STRING_ADA		_BIT(3)
+#define LLI_USER_STRING_AAD		_BIT(3)
 #define LLI_USER_PRIVACY_KEY		_BIT(7)
 #define LLI_USER_ROOT_KEY		_BIT(8)
 

commit 65ac8e46b20981899f99004644294a40485a7ee3
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Wed Mar 10 09:31:59 2021 +0800

    cmd: crypto: add CMAC/CBC_MAC mode for AES and SM4
    
    Change-Id: Id61acc1822263b1581faa153f35034ca24266d50
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/cmd/crypto.c b/cmd/crypto.c
index 1e34bde1fa..a4532cd0a9 100644
--- a/cmd/crypto.c
+++ b/cmd/crypto.c
@@ -64,6 +64,9 @@ struct rsa_test_data {
 	u32		sign_out_len;
 };
 
+#define IS_MAC_MODE(mode)	((mode) == RK_MODE_CBC_MAC || \
+				 (mode) == RK_MODE_CMAC)
+
 #define HASH_TEST(algo_type, data_in, hash_val) {\
 	.algo_name = "HASH", \
 	.mode_name = #algo_type, \
@@ -164,6 +167,8 @@ const struct cipher_test_data cipher_data_set[] = {
 	CIPHER_TEST(AES, CTR, aes_key, aes_iv, foo_data, aes_ctr_cipher),
 	CIPHER_XTS_TEST(AES, XTS, aes_key, aes_twk_key,
 			aes_iv, foo_data, aes_xts_cipher),
+	CIPHER_TEST(AES, CBC_MAC, aes_key, aes_iv, foo_data, aes_cbc_mac),
+	CIPHER_TEST(AES, CMAC, aes_key, aes_iv, foo_data, aes_cmac),
 
 	EMPTY_TEST(),
 	CIPHER_TEST(SM4, ECB, sm4_key, sm4_iv, foo_data, sm4_ecb_cipher),
@@ -174,6 +179,8 @@ const struct cipher_test_data cipher_data_set[] = {
 	CIPHER_TEST(SM4, CTR, sm4_key, sm4_iv, foo_data, sm4_ctr_cipher),
 	CIPHER_XTS_TEST(SM4, XTS, sm4_key, sm4_twk_key,
 			sm4_iv, foo_data, sm4_xts_cipher),
+	CIPHER_TEST(SM4, CBC_MAC, sm4_key, sm4_iv, foo_data, sm4_cbc_mac),
+	CIPHER_TEST(SM4, CMAC, sm4_key, sm4_iv, foo_data, sm4_cmac),
 #else
 	EMPTY_TEST(),
 #endif
@@ -306,7 +313,7 @@ int test_cipher_perf(struct udevice *dev, cipher_context *ctx,
 	u32 total_size = PERF_TOTAL_SIZE;
 	u32 data_size = PERF_BUFF_SIZE;
 	u8 *plain = NULL, *cipher = NULL;
-	int ret, i;
+	int ret = 0, i;
 
 	*MBps = 0;
 
@@ -330,9 +337,14 @@ int test_cipher_perf(struct udevice *dev, cipher_context *ctx,
 	ulong start = get_timer(0);
 
 	for (i = 0; i < total_size / data_size; i++) {
-		ret = crypto_cipher(dev, ctx, plain, cipher, data_size, enc);
+		if (IS_MAC_MODE(ctx->mode))
+			ret = crypto_mac(dev, ctx, plain, data_size, cipher);
+		else
+			ret = crypto_cipher(dev, ctx, plain, cipher,
+					    data_size, enc);
 		if (ret) {
-			printf("crypto_aes error!\n");
+			printf("%s, %d:crypto_aes error! ret = %d\n",
+			       __func__, __LINE__, ret);
 			goto exit;
 		}
 	}
@@ -455,8 +467,13 @@ int test_cipher_result(void)
 
 		test_cipher_perf(dev, &ctx, &MBps, true);
 
-		ret = crypto_cipher(dev, &ctx, test_data->plain,
-				    out, test_data->plain_len, true);
+		/* AES/SM4 mac */
+		if (IS_MAC_MODE(ctx.mode))
+			ret = crypto_mac(dev, &ctx, test_data->plain,
+					 test_data->plain_len, out);
+		else
+			ret = crypto_cipher(dev, &ctx, test_data->plain,
+					    out, test_data->plain_len, true);
 		if (ret)
 			goto error;
 
@@ -464,22 +481,25 @@ int test_cipher_result(void)
 				  "encrypt", MBps, test_data->cipher, out,
 				  test_data->cipher_len);
 
-		test_cipher_perf(dev, &ctx, &MBps, false);
-
-		ret = crypto_cipher(dev, &ctx, test_data->cipher,
-				    out, test_data->cipher_len, false);
-		if (ret)
-			goto error;
+		if (!IS_MAC_MODE(ctx.mode)) {
+			test_cipher_perf(dev, &ctx, &MBps, false);
+			ret = crypto_cipher(dev, &ctx, test_data->cipher,
+					    out, test_data->cipher_len, false);
+			if (ret)
+				goto error;
 
-		print_result_MBps(test_data->algo_name, test_data->mode_name,
-				  "decrypt", MBps, test_data->plain, out,
-				  test_data->plain_len);
+			print_result_MBps(test_data->algo_name,
+					  test_data->mode_name,
+					  "decrypt", MBps,
+					  test_data->plain, out,
+					  test_data->plain_len);
+		}
 		printf("+++++++++++++++++++++++++++++++++++++++++++++++++++\n");
 	}
 	return 0;
 error:
-	printf("%s %s test error!\n",
-	       test_data->algo_name, test_data->mode_name);
+	printf("%s %s test error, ret = %d!\n",
+	       test_data->algo_name, test_data->mode_name, ret);
 	return ret;
 }
 
diff --git a/include/rockchip/crypto_fix_test_data.h b/include/rockchip/crypto_fix_test_data.h
index 898db36eb2..f6b1bb57d4 100644
--- a/include/rockchip/crypto_fix_test_data.h
+++ b/include/rockchip/crypto_fix_test_data.h
@@ -412,6 +412,16 @@ const unsigned char aes_xts_cipher[] = {
 0x6c, 0xe5, 0x9d, 0x29, 0x14, 0x5f, 0x76, 0x90,
 };
 
+const u8 aes_cbc_mac[] = {
+0x9d, 0x8c, 0x05, 0x0a, 0x91, 0xa2, 0x64, 0xe6,
+0x9e, 0x40, 0xc4, 0x27, 0x96, 0xed, 0xfe, 0x1a,
+};
+
+const u8 aes_cmac[] = {
+0x93, 0xa2, 0xdf, 0x02, 0xb1, 0xa4, 0x94, 0x86,
+0xbe, 0xe1, 0x69, 0x2a, 0x75, 0x57, 0x3d, 0x0a,
+};
+
 const u8 sm4_key[] = {
 	0x8e, 0x30, 0x09, 0x79, 0xae, 0xb3, 0x75, 0x13,
 	0xab, 0x03, 0x4d, 0x11, 0x62, 0xe0, 0xfe, 0x03,
@@ -589,6 +599,16 @@ const u8 sm4_xts_cipher[] = {
 };
 #endif
 
+const u8 sm4_cbc_mac[] = {
+	0xd3, 0xfc, 0xc3, 0x07, 0x94, 0x31, 0xe9, 0x64,
+	0xd3, 0xe9, 0x10, 0x9d, 0x89, 0x03, 0x13, 0xb2,
+};
+
+const u8 sm4_cmac[] = {
+	0xbc, 0x9b, 0x3c, 0x42, 0x45, 0xed, 0xcf, 0xc6,
+	0xd0, 0x92, 0xa1, 0xc4, 0x34, 0xb5, 0x3d, 0xe3,
+};
+
 const u8 hash_md5[] = {
 0x01, 0xea, 0x0b, 0xa4, 0xa9, 0x88, 0xa2, 0xea,
 0x55, 0x1d, 0x7b, 0xab, 0xdb, 0xa3, 0x96, 0x0f,

commit d9332f1c9555e2b415ae536413394adfaebc4308
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Tue Mar 9 15:42:01 2021 +0800

    drivers: crypto: add mac support for AES/SM4
    
    Crypto V2 implements the following interfaces:
    MAC: CMAC/CBC_MAC
    
    Change-Id: Ifc80128f2b9bd6b410119eddef61caf3f0fd1d89
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/drivers/crypto/crypto-uclass.c b/drivers/crypto/crypto-uclass.c
index 6e17e2eafd..5bc72941c4 100644
--- a/drivers/crypto/crypto-uclass.c
+++ b/drivers/crypto/crypto-uclass.c
@@ -272,6 +272,17 @@ int crypto_cipher(struct udevice *dev, cipher_context *ctx,
 	return ops->cipher_crypt(dev, ctx, in, out, len, enc);
 }
 
+int crypto_mac(struct udevice *dev, cipher_context *ctx,
+	       const u8 *in, u32 len, u8 *tag)
+{
+	const struct dm_crypto_ops *ops = device_get_ops(dev);
+
+	if (!ops || !ops->cipher_mac)
+		return -ENOSYS;
+
+	return ops->cipher_mac(dev, ctx, in, len, tag);
+}
+
 UCLASS_DRIVER(crypto) = {
 	.id	= UCLASS_CRYPTO,
 	.name	= "crypto",
diff --git a/drivers/crypto/rockchip/crypto_v2.c b/drivers/crypto/rockchip/crypto_v2.c
index 120d57bc02..5177803ab6 100644
--- a/drivers/crypto/rockchip/crypto_v2.c
+++ b/drivers/crypto/rockchip/crypto_v2.c
@@ -81,6 +81,15 @@ struct rockchip_crypto_priv {
 	(time_out <= 0) ? -ETIMEDOUT : 0; \
 })
 
+#define WAIT_TAG_VALID(channel, timeout) ({ \
+	u32 tag_mask = CRYPTO_CH0_TAG_VALID << (channel);\
+	int ret;\
+	ret = RK_POLL_TIMEOUT(!(crypto_read(CRYPTO_TAG_VALID) & tag_mask),\
+			      timeout);\
+	crypto_write(crypto_read(CRYPTO_TAG_VALID) & tag_mask, CRYPTO_TAG_VALID);\
+	ret;\
+})
+
 #define virt_to_phys(addr)		(((unsigned long)addr) & 0xffffffff)
 #define phys_to_virt(addr, area)	((unsigned long)addr)
 
@@ -91,6 +100,16 @@ struct rockchip_crypto_priv {
 #define cache_op_inner(type, addr, size) \
 					crypto_flush_cacheline((ulong)addr, size)
 
+#define IS_NEED_IV(rk_mode) ((rk_mode) != RK_MODE_ECB && \
+			     (rk_mode) != RK_MODE_CMAC && \
+			     (rk_mode) != RK_MODE_CBC_MAC)
+
+#define IS_NEED_TAG(rk_mode) ((rk_mode) == RK_MODE_CMAC || \
+			      (rk_mode) == RK_MODE_CBC_MAC)
+
+#define IS_MAC_MODE(rk_mode) ((rk_mode) == RK_MODE_CMAC || \
+			      (rk_mode) == RK_MODE_CBC_MAC)
+
 fdt_addr_t crypto_base;
 
 static inline void word2byte_be(u32 word, u8 *ch)
@@ -162,6 +181,15 @@ static inline void set_iv_reg(u32 chn, const u8 *iv, u32 iv_len)
 	crypto_write(iv_len, CRYPTO_CH0_IV_LEN_0 + 4 * chn);
 }
 
+static inline void get_tag_from_reg(u32 chn, u8 *tag, u32 tag_len)
+{
+	u32 i;
+	u32 chn_base = CRYPTO_CH0_TAG_0 + 0x10 * chn;
+
+	for (i = 0; i < tag_len / 4; i++, chn_base += 4)
+		word2byte_be(crypto_read(chn_base), tag + 4 * i);
+}
+
 static int hw_crypto_reset(void)
 {
 	u32 val = 0, mask = 0;
@@ -565,6 +593,8 @@ static const u32 rk_mode2bc_mode[RK_MODE_MAX] = {
 	[RK_MODE_CFB] = CRYPTO_BC_CFB,
 	[RK_MODE_OFB] = CRYPTO_BC_OFB,
 	[RK_MODE_XTS] = CRYPTO_BC_XTS,
+	[RK_MODE_CMAC] = CRYPTO_BC_CMAC,
+	[RK_MODE_CBC_MAC] = CRYPTO_BC_CBC_MAC,
 };
 
 static inline bool is_des_mode(u32 rk_mode)
@@ -738,13 +768,19 @@ static int hw_cipher_crypt(const u8 *in, u8 *out, u64 len,
 	data_desc->src_len     = tmp_len;
 	data_desc->dst_addr    = (u32)virt_to_phys(dma_out);
 	data_desc->dst_len     = dst_len;
-	data_desc->dma_ctrl    = LLI_DMA_CTRL_DST_DONE |
-				 LLI_DMA_CTRL_LAST;
+	data_desc->dma_ctrl    = LLI_DMA_CTRL_LAST;
 	data_desc->user_define = LLI_USER_CPIHER_START |
 				 LLI_USER_STRING_START |
 				 LLI_USER_STRING_LAST |
 				 (key_chn << 4);
-	expt_int = CRYPTO_DST_ITEM_DONE_INT_ST;
+
+	if (IS_MAC_MODE(rk_mode)) {
+		expt_int = CRYPTO_LIST_DONE_INT_ST;
+		data_desc->dma_ctrl |= LLI_DMA_CTRL_LIST_DONE;
+	} else {
+		expt_int = CRYPTO_DST_ITEM_DONE_INT_ST;
+		data_desc->dma_ctrl |= LLI_DMA_CTRL_DST_DONE;
+	}
 
 	crypto_write((u32)virt_to_phys(data_desc), CRYPTO_DMA_LLI_ADDR);
 
@@ -773,6 +809,11 @@ static int hw_cipher_crypt(const u8 *in, u8 *out, u64 len,
 	if ((tmp & mask) == expt_int) {
 		if (out && out != dma_out)
 			memcpy(out, dma_out, len);
+
+		if (IS_NEED_TAG(rk_mode)) {
+			ret = WAIT_TAG_VALID(key_chn, RK_CRYPTO_TIMEOUT);
+			get_tag_from_reg(key_chn, tag, AES_BLOCK_SIZE);
+		}
 	} else {
 		dump_crypto_state(data_desc, ret);
 		ret = -1;
@@ -794,10 +835,13 @@ static int hw_aes_init(u32 chn, const u8 *key, const u8 *twk_key, u32 key_len,
 {
 	u32 rk_mode = RK_GET_RK_MODE(mode);
 
+	if (rk_mode > RK_MODE_XTS)
+		return -EINVAL;
+
 	if (iv_len > AES_BLOCK_SIZE)
 		return -EINVAL;
 
-	if (rk_mode != RK_MODE_ECB) {
+	if (IS_NEED_IV(rk_mode)) {
 		if (!iv || iv_len != AES_BLOCK_SIZE)
 			return -EINVAL;
 	} else {
@@ -826,10 +870,13 @@ static int hw_sm4_init(u32  chn, const u8 *key, const u8 *twk_key, u32 key_len,
 {
 	u32 rk_mode = RK_GET_RK_MODE(mode);
 
+	if (rk_mode > RK_MODE_XTS)
+		return -EINVAL;
+
 	if (iv_len > SM4_BLOCK_SIZE || key_len != SM4_KEYSIZE)
 		return -EINVAL;
 
-	if (rk_mode != RK_MODE_ECB) {
+	if (IS_NEED_IV(rk_mode)) {
 		if (!iv || iv_len != SM4_BLOCK_SIZE)
 			return -EINVAL;
 	} else {
@@ -930,7 +977,43 @@ int rockchip_crypto_cipher(struct udevice *dev, cipher_context *ctx,
 	default:
 		return -EINVAL;
 	}
-} 
+}
+
+int rk_crypto_mac(struct udevice *dev, u32 algo, u32 mode,
+		  const u8 *key, u32 key_len,
+		  const u8 *in, u32 len, u8 *tag)
+{
+	u32 rk_mode = RK_GET_RK_MODE(mode);
+	int ret;
+
+	if (!IS_MAC_MODE(rk_mode))
+		return -EINVAL;
+
+	if (algo != CRYPTO_AES && algo != CRYPTO_SM4)
+		return -EINVAL;
+
+	/* RV1126/RV1109 do not support aes-192 */
+#if defined(CONFIG_ROCKCHIP_RV1126)
+	if (algo == CRYPTO_AES && key_len == AES_KEYSIZE_192)
+		return -EINVAL;
+#endif
+
+	ret = hw_cipher_init(g_key_chn, key, NULL, key_len, NULL, 0,
+			     algo, mode, true);
+	if (ret)
+		return ret;
+
+	return hw_cipher_crypt(in, NULL, len, NULL, 0,
+			       tag, AES_BLOCK_SIZE, mode);
+}
+
+int rockchip_crypto_mac(struct udevice *dev, cipher_context *ctx,
+			const u8 *in, u32 len, u8 *tag)
+{
+	return rk_crypto_mac(dev, ctx->algo, ctx->mode,
+			     ctx->key, ctx->key_len, in, len, tag);
+}
+
 #endif
 
 #if CONFIG_IS_ENABLED(ROCKCHIP_RSA)
@@ -1013,6 +1096,7 @@ static const struct dm_crypto_ops rockchip_crypto_ops = {
 #endif
 #if CONFIG_IS_ENABLED(ROCKCHIP_CIPHER)
 	.cipher_crypt = rockchip_crypto_cipher,
+	.cipher_mac = rockchip_crypto_mac,
 #endif
 };
 
diff --git a/include/crypto.h b/include/crypto.h
index 2211c98011..d059286373 100644
--- a/include/crypto.h
+++ b/include/crypto.h
@@ -46,6 +46,8 @@ enum RK_CRYPTO_MODE {
 	RK_MODE_CFB,
 	RK_MODE_OFB,
 	RK_MODE_XTS,
+	RK_MODE_CMAC,
+	RK_MODE_CBC_MAC,
 	RK_MODE_MAX
 };
 
@@ -93,6 +95,10 @@ struct dm_crypto_ops {
 	/* cipher encryption and decryption */
 	int (*cipher_crypt)(struct udevice *dev, cipher_context *ctx,
 			    const u8 *in, u8 *out, u32 len, bool enc);
+
+	/* cipher mac cmac&cbc_mac */
+	int (*cipher_mac)(struct udevice *dev, cipher_context *ctx,
+			  const u8 *in, u32 len, u8 *tag);
 };
 
 /**
@@ -231,4 +237,17 @@ int crypto_hmac_final(struct udevice *dev, sha_context *ctx, u8 *output);
 int crypto_cipher(struct udevice *dev, cipher_context *ctx,
 		  const u8 *in, u8 *out, u32 len, bool enc);
 
+/**
+ * crypto_mac() - Crypto cipher mac
+ *
+ * @dev: crypto device
+ * @ctx: cipher context
+ * @in: input data buffer
+ * @len: input data length
+ * @tag: output data buffer
+ * @return 0 on success, otherwise failed
+ */
+int crypto_mac(struct udevice *dev, cipher_context *ctx,
+	       const u8 *in, u32 len, u8 *tag);
+
 #endif

commit 3ae0b190b18a9af6c9f59eddca28c377297a59ae
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Thu Mar 18 14:45:21 2021 +0800

    drivers: rknand: ftl: fix non cache aligned buffer access issue
    
    bug:
    ERR [0x0] TEE-CORE:read_block_from_storage:992: Failed to read and decrypt file
    ERR [0x0] TEE-CORE:read_block_no_cache:1275: Unable to read block0 from storage
    ERR [0x0] TEE-CORE:read_block_from_storage:992: Failed to read and decrypt file
    ERR [0x0] TEE-CORE:read_block_no_cache:1275: Unable to read block0 from storage
    
    Change-Id: I0739c433694727d26d62fb74cc7a854fd4163867
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>

diff --git a/drivers/rknand/rk_ftl_arm_v7.S b/drivers/rknand/rk_ftl_arm_v7.S
index 9f469dac47..4089daaa64 100644
--- a/drivers/rknand/rk_ftl_arm_v7.S
+++ b/drivers/rknand/rk_ftl_arm_v7.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2020-09-23
+ * date: 2021-03-18
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -6723,170 +6723,6 @@ idb_init:
 .L946:
 	.word	idb_buf
 	.size	idb_init, .-idb_init
-	.section	.text.ftl_memcpy,"ax",%progbits
-	.align	1
-	.global	ftl_memcpy
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_memcpy, %function
-ftl_memcpy:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	memcpy
-	.size	ftl_memcpy, .-ftl_memcpy
-	.section	.text.FlashReadIdbData,"ax",%progbits
-	.align	1
-	.global	FlashReadIdbData
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FlashReadIdbData, %function
-FlashReadIdbData:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	mov	r2, #2048
-	ldr	r1, .L950
-	bl	ftl_memcpy
-	movs	r0, #0
-	pop	{r3, pc}
-.L951:
-	.align	2
-.L950:
-	.word	.LANCHOR144
-	.size	FlashReadIdbData, .-FlashReadIdbData
-	.section	.text.FlashLoadPhyInfoInRam,"ax",%progbits
-	.align	1
-	.global	FlashLoadPhyInfoInRam
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FlashLoadPhyInfoInRam, %function
-FlashLoadPhyInfoInRam:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, lr}
-	movs	r6, #0
-	ldr	r7, .L960
-	ldr	r5, .L960+4
-.L955:
-	ldrb	r2, [r7, #-1]	@ zero_extendqisi2
-	mov	r1, r5
-	mov	r0, r7
-	lsl	r8, r6, #5
-	bl	FlashMemCmp8
-	mov	r4, r0
-	cbnz	r0, .L953
-	ldr	r5, .L960+8
-	mov	r3, r4
-	ldr	r2, .L960+12
-	add	r5, r5, r8
-	ldrb	r0, [r5, #22]	@ zero_extendqisi2
-	mov	r1, r2
-.L954:
-	lsls	r6, r3, #5
-	ldrb	r6, [r6, r2]	@ zero_extendqisi2
-	cmp	r6, r0
-	beq	.L957
-	adds	r3, r3, #1
-	cmp	r3, #4
-	bne	.L954
-.L957:
-	ldr	r6, .L960+16
-	add	r1, r1, r3, lsl #5
-	movs	r2, #32
-	ldr	r0, .L960+20
-	bl	ftl_memcpy
-	movs	r2, #32
-	mov	r1, r5
-	mov	r0, r6
-	bl	ftl_memcpy
-	ldrh	r0, [r6, #10]
-	bl	FlashBlockAlignInit
-	b	.L952
-.L953:
-	adds	r6, r6, #1
-	adds	r7, r7, #32
-	cmp	r6, #86
-	bne	.L955
-	mov	r4, #-1
-.L952:
-	mov	r0, r4
-	pop	{r4, r5, r6, r7, r8, pc}
-.L961:
-	.align	2
-.L960:
-	.word	.LANCHOR145+1
-	.word	.LANCHOR22
-	.word	.LANCHOR145
-	.word	.LANCHOR146
-	.word	.LANCHOR31
-	.word	.LANCHOR8
-	.size	FlashLoadPhyInfoInRam, .-FlashLoadPhyInfoInRam
-	.section	.text.NandcCopy1KB,"ax",%progbits
-	.align	1
-	.global	NandcCopy1KB
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	NandcCopy1KB, %function
-NandcCopy1KB:
-	@ args = 4, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	cmp	r1, #1
-	push	{r4, r5, r6, lr}
-	mov	r4, r2
-	add	r2, r0, #4096
-	add	r6, r0, #512
-	add	r0, r2, r4, lsl #9
-	ldr	r5, [sp, #16]
-	bne	.L963
-	cbz	r3, .L964
-	mov	r2, #1024
-	mov	r1, r3
-	bl	ftl_memcpy
-.L964:
-	cbz	r5, .L962
-	ldrb	r2, [r5, #1]	@ zero_extendqisi2
-	lsrs	r4, r4, #1
-	ldrb	r3, [r5]	@ zero_extendqisi2
-	add	r4, r4, r4, lsl #1
-	lsls	r4, r4, #4
-	orr	r3, r3, r2, lsl #8
-	ldrb	r2, [r5, #2]	@ zero_extendqisi2
-	orr	r3, r3, r2, lsl #16
-	ldrb	r2, [r5, #3]	@ zero_extendqisi2
-	orr	r3, r3, r2, lsl #24
-	str	r3, [r6, r4]
-	pop	{r4, r5, r6, pc}
-.L963:
-	cbz	r3, .L967
-	mov	r1, r0
-	mov	r2, #1024
-	mov	r0, r3
-	bl	ftl_memcpy
-.L967:
-	cbz	r5, .L962
-	lsrs	r4, r4, #1
-	add	r4, r4, r4, lsl #1
-	lsls	r4, r4, #4
-	ldr	r3, [r6, r4]
-	strb	r3, [r5]
-	lsrs	r2, r3, #8
-	strb	r2, [r5, #1]
-	lsrs	r2, r3, #16
-	lsrs	r3, r3, #24
-	strb	r2, [r5, #2]
-	strb	r3, [r5, #3]
-.L962:
-	pop	{r4, r5, r6, pc}
-	.size	NandcCopy1KB, .-NandcCopy1KB
 	.section	.text.NandcXferData,"ax",%progbits
 	.align	1
 	.global	NandcXferData
@@ -6896,286 +6732,170 @@ NandcCopy1KB:
 	.fpu softvfp
 	.type	NandcXferData, %function
 NandcXferData:
-	@ args = 4, pretend = 0, frame = 88
+	@ args = 4, pretend = 0, frame = 72
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r7, r3
-	ldr	r3, .L1014
-	mov	fp, r2
-	lsls	r2, r7, #26
-	sub	sp, sp, #96
-	mov	r6, r0
-	mov	r5, r1
-	ldr	r4, [sp, #128]
-	ldr	r10, [r3, r0, lsl #3]
-	bne	.L979
-	cbnz	r4, .L980
-	add	r4, sp, #32
+	push	{r4, r5, r6, r7, r8, r10, lr}
+	sub	sp, sp, #84
+	ldr	r6, [sp, #112]
+	mov	r10, r3
+	mov	r8, r0
+	mov	r4, r1
+	ldr	r3, .L970
+	mov	r7, r2
+	ldr	r5, [r3, r0, lsl #3]
+	cbnz	r6, .L949
+	add	r6, sp, #16
 	movs	r2, #64
 	movs	r1, #255
-	add	r0, sp, #32
+	add	r0, sp, #16
 	bl	ftl_memset
-.L980:
-	mov	r1, r5
-	mov	r0, r6
-	str	r4, [sp, #4]
+.L949:
+	mov	r1, r4
+	mov	r0, r8
+	str	r6, [sp, #4]
 	movs	r3, #0
-	str	r7, [sp]
-	mov	r2, fp
+	str	r10, [sp]
+	mov	r2, r7
 	bl	NandcXferStart
-	mov	r1, r5
-	mov	r0, r6
+	mov	r1, r4
+	mov	r0, r8
 	bl	NandcXferComp
-	cmp	r5, #0
-	bne	.L1004
-	ldr	r2, .L1014+4
-	lsr	r0, fp, #1
-	ldr	ip, .L1014+12
-	mov	r1, r5
-	ldr	r3, [r2]
+	cmp	r4, #0
+	bne	.L963
+	ldr	r1, .L970+4
+	lsr	ip, r7, #1
+	ldr	r8, .L970+12
+	mov	r2, r4
+	mov	r0, r4
+	ldr	r3, [r1]
 	cmp	r3, #25
-	mov	r3, r5
+	mov	r3, r6
 	ite	cc
-	movcc	r7, #64
-	movcs	r7, #128
-.L983:
-	cmp	r1, r0
-	add	r4, r4, #4
-	add	r6, r7, r3
-	bcc	.L984
-	ldr	r3, .L1014+8
-	lsr	r4, fp, #2
-	ldr	r0, [r2]
-	movs	r2, #0
-	mov	r8, r2
-	ldr	r1, [r3]
-.L985:
-	cmp	r2, r4
-	bcs	.L981
-	cbnz	r0, .L991
-.L981:
+	movcc	lr, #64
+	movcs	lr, #128
+.L952:
+	cmp	r0, ip
+	add	r3, r3, #4
+	add	r6, lr, r2
+	bcc	.L953
+	ldr	r3, .L970+8
+	lsrs	r2, r7, #2
+	ldr	r7, [r1]
+	movs	r1, #0
+	mov	r0, r1
+	ldr	r6, [r3]
+.L954:
+	cmp	r1, r2
+	bcs	.L950
+	cbnz	r7, .L960
+.L950:
 	movs	r3, #0
-	str	r3, [r10, #16]
-.L992:
-	ldr	r3, .L1014+8
+	str	r3, [r5, #16]
+	ldr	r3, .L970+8
 	ldr	r3, [r3]
 	cmp	r3, #5
-	bls	.L978
-	cbnz	r5, .L978
-	ldr	r3, [r10]
+	bls	.L948
+	cbnz	r4, .L948
+	ldr	r3, [r5]
 	and	r2, r3, #139264
 	cmp	r2, #139264
 	ittt	eq
-	moveq	r8, #-1
+	moveq	r0, #-1
 	orreq	r3, r3, #131072
-	streq	r3, [r10]
-.L978:
-	mov	r0, r8
-	add	sp, sp, #96
+	streq	r3, [r5]
+.L948:
+	add	sp, sp, #84
 	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L984:
-	bic	lr, r3, #3
-	ldr	r3, [ip, #4]
-	adds	r1, r1, #1
-	ldr	r3, [r3, lr]
-	strb	r3, [r4, #-4]
-	lsr	lr, r3, #8
-	strb	lr, [r4, #-3]
-	lsr	lr, r3, #16
-	lsrs	r3, r3, #24
-	strb	lr, [r4, #-2]
-	strb	r3, [r4, #-1]
-	mov	r3, r6
-	b	.L983
-.L991:
-	add	r3, r2, #8
-	ldr	r3, [r10, r3, lsl #2]
-	str	r3, [sp, #28]
-	ldr	r3, [sp, #28]
-	lsls	r6, r3, #29
-	bmi	.L1007
-	ldr	r3, [sp, #28]
-	ubfx	r3, r3, #15, #1
-	cmp	r3, #0
-	bne	.L1007
-	cmp	r1, #5
-	bls	.L987
-	ldr	r6, [sp, #28]
-	ldr	r3, [sp, #28]
-	ubfx	r6, r6, #3, #5
-	ubfx	ip, r3, #27, #1
-	ldr	r3, [sp, #28]
-	ldr	r7, [sp, #28]
-	orr	r6, r6, ip, lsl #5
-	ubfx	r3, r3, #16, #5
-	ubfx	r7, r7, #29, #1
-	orr	r3, r3, r7, lsl #5
-	cmp	r6, r3
-	ldr	r3, [sp, #28]
-	itete	hi
-	ldrhi	r6, [sp, #28]
-	ldrls	r6, [sp, #28]
-	ubfxhi	r3, r3, #3, #5
-	ubfxls	r3, r3, #16, #5
-	ite	hi
-	ubfxhi	r6, r6, #27, #1
-	ubfxls	r6, r6, #29, #1
-.L1013:
-	orr	r3, r3, r6, lsl #5
-.L989:
-	cmp	r8, r3
-	it	cc
-	movcc	r8, r3
-.L986:
-	adds	r2, r2, #1
-	b	.L985
-.L987:
-	cmp	r1, #3
-	bls	.L989
-	ldr	r6, [sp, #28]
-	ldr	r3, [sp, #28]
-	ubfx	r6, r6, #3, #5
-	ubfx	ip, r3, #28, #1
-	ldr	r3, [sp, #28]
-	ldr	r7, [sp, #28]
-	orr	r6, r6, ip, lsl #5
-	ubfx	r3, r3, #16, #5
-	ubfx	r7, r7, #30, #1
-	orr	r3, r3, r7, lsl #5
-	cmp	r6, r3
-	ldr	r3, [sp, #28]
-	itete	hi
-	ldrhi	r6, [sp, #28]
-	ldrls	r6, [sp, #28]
-	ubfxhi	r3, r3, #3, #5
-	ubfxls	r3, r3, #16, #5
-	ite	hi
-	ubfxhi	r6, r6, #28, #1
-	ubfxls	r6, r6, #30, #1
-	b	.L1013
-.L1007:
-	mov	r8, #-1
-	b	.L986
-.L1004:
-	mov	r8, #0
-	b	.L981
-.L979:
-	cmp	r1, #1
-	bne	.L993
-	cmp	r4, #0
-	mov	r8, #0
-	ite	ne
-	movne	r3, #4
-	moveq	r3, #0
-	str	r3, [sp, #16]
-.L994:
-	cmp	r8, fp
-	bcc	.L996
-	mov	r8, #0
-	b	.L992
-.L996:
-	and	r3, r8, #3
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.L953:
+	bic	r10, r2, #3
+	ldr	r2, [r8, #4]
+	adds	r0, r0, #1
+	ldr	r2, [r2, r10]
+	strb	r2, [r3, #-4]
+	lsr	r10, r2, #8
+	strb	r10, [r3, #-3]
+	lsr	r10, r2, #16
+	lsrs	r2, r2, #24
+	strb	r10, [r3, #-2]
+	strb	r2, [r3, #-1]
+	mov	r2, r6
+	b	.L952
+.L960:
+	add	r3, r1, #8
+	ldr	r3, [r5, r3, lsl #2]
 	str	r3, [sp, #12]
-	cbz	r7, .L1009
-	add	r3, r7, r8, lsl #9
-.L995:
-	str	r4, [sp]
-	movs	r1, #1
-	ldr	r2, [sp, #12]
-	mov	r0, r10
-	bl	NandcCopy1KB
-	movs	r3, #0
-	movs	r2, #2
-	str	r3, [sp, #4]
-	movs	r1, #1
-	str	r3, [sp]
-	mov	r0, r6
-	ldr	r3, [sp, #12]
-	add	r8, r8, #2
-	bl	NandcXferStart
-	movs	r1, #1
-	mov	r0, r6
-	bl	NandcXferComp
-	ldr	r3, [sp, #16]
-	add	r4, r4, r3
-	b	.L994
-.L1009:
-	mov	r3, r7
-	b	.L995
-.L993:
-	mov	r8, #0
-	movs	r2, #2
-	mov	r3, r8
-	str	r8, [sp, #4]
-	str	r8, [sp]
-	mov	r1, r8
-	bl	NandcXferStart
-	cmp	r4, r8
-	str	r4, [sp, #12]
-	mov	r4, r8
-	ite	ne
-	movne	r3, #4
-	moveq	r3, r8
-	str	r7, [sp, #16]
-	str	r3, [sp, #20]
-.L997:
-	cmp	r4, fp
-	bcs	.L992
-	mov	r1, r5
-	mov	r0, r6
-	bl	NandcXferComp
-	adds	r4, r4, #2
-	ldr	r3, [r10, #32]
-	cmp	fp, r4
-	str	r3, [sp, #28]
-	bls	.L998
-	movs	r3, #0
-	movs	r2, #2
-	str	r3, [sp, #4]
-	movs	r1, #0
-	str	r3, [sp]
-	mov	r0, r6
-	and	r3, r4, #3
-	bl	NandcXferStart
-.L998:
-	ldr	r3, [sp, #28]
+	ldr	r3, [sp, #12]
 	lsls	r3, r3, #29
-	bmi	.L1010
-	ldr	r3, [sp, #28]
-	ldr	r2, [sp, #28]
-	ubfx	r3, r3, #3, #5
-	ubfx	r2, r2, #27, #1
-	orr	r3, r3, r2, lsl #5
-	cmp	r8, r3
+	bmi	.L966
+	ldr	r3, [sp, #12]
+	ubfx	r3, r3, #15, #1
+	cmp	r3, #0
+	bne	.L966
+	cmp	r6, #5
+	bls	.L956
+	ldr	r3, [sp, #12]
+	ubfx	ip, r3, #3, #5
+	ldr	r3, [sp, #12]
+	ubfx	r8, r3, #27, #1
+	ldr	r3, [sp, #12]
+	ldr	lr, [sp, #12]
+	orr	ip, ip, r8, lsl #5
+	ubfx	r3, r3, #16, #5
+	ubfx	lr, lr, #29, #1
+	orr	r3, r3, lr, lsl #5
+	cmp	ip, r3
+	ldr	r3, [sp, #12]
+	itete	hi
+	ldrhi	ip, [sp, #12]
+	ldrls	ip, [sp, #12]
+	ubfxhi	r3, r3, #3, #5
+	ubfxls	r3, r3, #16, #5
+	ite	hi
+	ubfxhi	ip, ip, #27, #1
+	ubfxls	ip, ip, #29, #1
+.L969:
+	orr	r3, r3, ip, lsl #5
+.L958:
+	cmp	r0, r3
 	it	cc
-	movcc	r8, r3
-.L999:
+	movcc	r0, r3
+.L955:
+	adds	r1, r1, #1
+	b	.L954
+.L956:
+	cmp	r6, #3
+	bls	.L958
 	ldr	r3, [sp, #12]
-	cmp	r7, #0
-	sub	r2, r4, #2
-	mov	r1, #0
-	and	r2, r2, #3
-	mov	r0, r10
-	str	r3, [sp]
-	ldr	r3, [sp, #16]
-	it	eq
-	moveq	r3, #0
-	bl	NandcCopy1KB
-	ldr	r3, [sp, #16]
-	ldr	r2, [sp, #20]
-	add	r3, r3, #1024
-	str	r3, [sp, #16]
+	ubfx	ip, r3, #3, #5
 	ldr	r3, [sp, #12]
-	add	r3, r3, r2
-	str	r3, [sp, #12]
-	b	.L997
-.L1010:
-	mov	r8, #-1
-	b	.L999
-.L1015:
+	ubfx	r8, r3, #28, #1
+	ldr	r3, [sp, #12]
+	ldr	lr, [sp, #12]
+	orr	ip, ip, r8, lsl #5
+	ubfx	r3, r3, #16, #5
+	ubfx	lr, lr, #30, #1
+	orr	r3, r3, lr, lsl #5
+	cmp	ip, r3
+	ldr	r3, [sp, #12]
+	itete	hi
+	ldrhi	ip, [sp, #12]
+	ldrls	ip, [sp, #12]
+	ubfxhi	r3, r3, #3, #5
+	ubfxls	r3, r3, #16, #5
+	ite	hi
+	ubfxhi	ip, ip, #28, #1
+	ubfxls	ip, ip, #30, #1
+	b	.L969
+.L966:
+	mov	r0, #-1
+	b	.L955
+.L963:
+	movs	r0, #0
+	b	.L950
+.L971:
 	.align	2
-.L1014:
+.L970:
 	.word	.LANCHOR0
 	.word	.LANCHOR32
 	.word	.LANCHOR34
@@ -7194,21 +6914,21 @@ FlashReadRawPage:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r8, r3
-	ldr	r3, .L1018
+	ldr	r3, .L974
 	mov	r6, r1
 	mov	r7, r2
 	mov	r4, r0
 	ldrb	r5, [r3, #9]	@ zero_extendqisi2
-	cbnz	r0, .L1017
-	ldr	r3, .L1018+4
-	ldr	r2, .L1018+8
+	cbnz	r0, .L973
+	ldr	r3, .L974+4
+	ldr	r2, .L974+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	ldr	r0, [r2]
 	muls	r0, r3, r0
 	cmp	r0, r1
 	it	hi
 	movhi	r5, #4
-.L1017:
+.L973:
 	mov	r0, r4
 	bl	NandcWaitFlashReady
 	mov	r0, r4
@@ -7231,9 +6951,9 @@ FlashReadRawPage:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1019:
+.L975:
 	.align	2
-.L1018:
+.L974:
 	.word	.LANCHOR31
 	.word	.LANCHOR3
 	.word	.LANCHOR4
@@ -7251,7 +6971,7 @@ FlashDdrTunningRead:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r7, r3
-	ldr	r3, .L1045
+	ldr	r3, .L1001
 	sub	sp, sp, #24
 	str	r0, [sp, #8]
 	ldr	r3, [r3]
@@ -7259,7 +6979,7 @@ FlashDdrTunningRead:
 	str	r2, [sp, #4]
 	ldr	r3, [r3, #304]
 	str	r3, [sp, #20]
-	ldr	r3, .L1045+4
+	ldr	r3, .L1001+4
 	ldr	r3, [r3]
 	cmp	r3, #8
 	ldr	r3, [sp, #56]
@@ -7267,9 +6987,9 @@ FlashDdrTunningRead:
 	movcc	fp, #6
 	movcs	fp, #12
 	cmp	r3, #0
-	beq	.L1034
+	beq	.L990
 	movs	r0, #1
-	ldr	r4, .L1045+8
+	ldr	r4, .L1001+8
 	bl	FlashSetInterfaceMode
 	movs	r0, #1
 	bl	NandcSetMode
@@ -7286,37 +7006,37 @@ FlashDdrTunningRead:
 	ldrb	r0, [r4]	@ zero_extendqisi2
 	bl	NandcSetMode
 	adds	r3, r6, #1
-	bne	.L1023
-.L1032:
+	bne	.L979
+.L988:
 	mov	r6, #-1
-.L1020:
+.L976:
 	mov	r0, r6
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1023:
+.L979:
 	mov	r2, r6
 	ldr	r1, [sp, #12]
-	ldr	r0, .L1045+12
+	ldr	r0, .L1001+12
 	bl	printf
-	ldr	r2, .L1045+16
+	ldr	r2, .L1001+16
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	cmp	r3, #2048
-	bcs	.L1025
+	bcs	.L981
 	str	r3, [r2]
-	b	.L1020
-.L1025:
+	b	.L976
+.L981:
 	movs	r7, #0
 	str	r7, [r2]
 	str	r7, [sp, #4]
-.L1022:
+.L978:
 	mov	r10, #0
 	mov	r8, #-1
 	mov	r5, r10
 	mov	r4, r10
 	str	r10, [sp, #16]
-.L1030:
+.L986:
 	uxtb	r0, fp
 	bl	NandcSetDdrPara
 	mov	r3, r7
@@ -7326,77 +7046,77 @@ FlashDdrTunningRead:
 	bl	FlashReadRawPage
 	adds	r3, r6, #1
 	cmp	r0, r3
-	bhi	.L1026
+	bhi	.L982
 	cmp	r0, #2
-	bhi	.L1036
+	bhi	.L992
 	adds	r4, r4, #1
 	cmp	r4, #9
-	bls	.L1036
+	bls	.L992
 	mov	r3, r5
 	mov	r6, r0
 	sub	r5, fp, r4
 	mov	r8, #0
-.L1028:
+.L984:
 	ldr	r2, [sp, #16]
 	cmp	r4, r2
 	it	ls
 	movls	r5, r3
-.L1029:
-	cbz	r5, .L1031
+.L985:
+	cbz	r5, .L987
 	mov	r1, r5
-	ldr	r0, .L1045+20
+	ldr	r0, .L1001+20
 	bl	printf
 	uxtb	r0, r5
 	bl	NandcSetDdrPara
-.L1031:
+.L987:
 	cmp	r8, #0
-	beq	.L1020
+	beq	.L976
 	ldr	r2, [sp, #12]
 	ldr	r1, [sp, #8]
-	ldr	r0, .L1045+24
+	ldr	r0, .L1001+24
 	bl	printf
 	ldr	r3, [sp, #56]
 	cmp	r3, #0
-	beq	.L1032
+	beq	.L988
 	ldr	r3, [sp, #20]
 	ubfx	r0, r3, #8, #8
 	bl	NandcSetDdrPara
-	b	.L1020
-.L1034:
+	b	.L976
+.L990:
 	mov	r6, #1024
-	b	.L1022
-.L1026:
+	b	.L978
+.L982:
 	ldr	r3, [sp, #16]
 	cmp	r4, r3
-	bls	.L1037
+	bls	.L993
 	cmp	r4, #7
 	sub	r5, r10, r4
-	bhi	.L1029
+	bhi	.L985
 	str	r4, [sp, #16]
-.L1037:
+.L993:
 	movs	r4, #0
-	b	.L1027
-.L1036:
+	b	.L983
+.L992:
 	mov	r8, #0
 	mov	r10, fp
 	mov	r6, r0
 	mov	r7, r8
 	str	r8, [sp, #4]
-.L1027:
+.L983:
 	add	fp, fp, #2
 	cmp	fp, #69
-	bls	.L1030
+	bls	.L986
 	mov	r3, r5
 	mov	r5, r10
-	b	.L1028
-.L1046:
+	b	.L984
+.L1002:
 	.align	2
-.L1045:
+.L1001:
 	.word	.LANCHOR19
 	.word	.LANCHOR34
 	.word	.LANCHOR25
 	.word	.LC9
-	.word	.LANCHOR147
+	.word	.LANCHOR144
 	.word	.LC10
 	.word	.LC11
 	.size	FlashDdrTunningRead, .-FlashDdrTunningRead
@@ -7419,16 +7139,16 @@ FlashReadPage:
 	bl	FlashReadRawPage
 	adds	r2, r0, #1
 	mov	r4, r0
-	bne	.L1048
-	ldr	r10, .L1066+20
+	bne	.L1004
+	ldr	r10, .L1022+20
 	ldrb	fp, [r10]	@ zero_extendqisi2
 	cmp	fp, #0
-	bne	.L1049
-.L1051:
-	ldr	r3, .L1066
+	bne	.L1005
+.L1007:
+	ldr	r3, .L1022
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1048
-	ldr	r3, .L1066+4
+	cbz	r3, .L1004
+	ldr	r3, .L1022+4
 	mov	r1, r6
 	mov	r2, r7
 	mov	r0, r5
@@ -7440,16 +7160,16 @@ FlashReadPage:
 	bl	FlashDdrTunningRead
 	adds	r1, r0, #1
 	mov	r4, r0
-	beq	.L1052
-	ldr	r3, .L1066+8
+	beq	.L1008
+	ldr	r3, .L1022+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r0, r3, lsr #1
-	bls	.L1048
-.L1052:
+	bls	.L1004
+.L1008:
 	ubfx	r0, r10, #8, #8
 	bl	NandcSetDdrPara
-	b	.L1048
-.L1049:
+	b	.L1004
+.L1005:
 	movs	r3, #0
 	mov	r2, r7
 	strb	r3, [r10]
@@ -7459,15 +7179,15 @@ FlashReadPage:
 	bl	FlashReadRawPage
 	adds	r3, r0, #1
 	strb	fp, [r10]
-	beq	.L1051
+	beq	.L1007
 	mov	r4, r0
-.L1048:
-	ldr	r10, .L1066+24
+.L1004:
+	ldr	r10, .L1022+24
 	ldr	fp, [r10]
 	cmp	fp, #0
-	beq	.L1047
+	beq	.L1003
 	adds	r2, r4, #1
-	bne	.L1047
+	bne	.L1003
 	mov	r3, r8
 	mov	r2, r7
 	mov	r1, r6
@@ -7477,13 +7197,13 @@ FlashReadPage:
 	mov	r4, r0
 	mov	r1, r0
 	mov	r2, r5
-	ldr	r0, .L1066+12
+	ldr	r0, .L1022+12
 	bl	printf
 	adds	r3, r4, #1
-	bne	.L1047
-	ldr	r3, .L1066+16
+	bne	.L1003
+	ldr	r3, .L1022+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1047
+	cbz	r3, .L1003
 	mov	r0, r5
 	bl	flash_enter_slc_mode
 	ldr	r4, [r10]
@@ -7495,21 +7215,21 @@ FlashReadPage:
 	mov	r4, r0
 	mov	r0, r5
 	bl	flash_exit_slc_mode
-.L1047:
+.L1003:
 	mov	r0, r4
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1067:
+.L1023:
 	.align	2
-.L1066:
+.L1022:
 	.word	.LANCHOR30
 	.word	.LANCHOR19
 	.word	.LANCHOR33
 	.word	.LC12
 	.word	.LANCHOR16
 	.word	.LANCHOR6
-	.word	.LANCHOR148
+	.word	.LANCHOR145
 	.size	FlashReadPage, .-FlashReadPage
 	.section	.text.FlashDdrParaScan,"ax",%progbits
 	.align	1
@@ -7524,7 +7244,7 @@ FlashDdrParaScan:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r6, r0
-	ldr	r4, .L1079
+	ldr	r4, .L1035
 	movs	r5, #0
 	mov	r7, r1
 	ldrb	r0, [r4]	@ zero_extendqisi2
@@ -7542,33 +7262,33 @@ FlashDdrParaScan:
 	mov	r8, r0
 	mov	r1, r7
 	mov	r0, r6
-	ldr	r5, .L1079+4
+	ldr	r5, .L1035+4
 	bl	FlashReadRawPage
 	adds	r0, r0, #1
-	beq	.L1069
+	beq	.L1025
 	cmp	r8, #-1
-	bne	.L1070
-.L1069:
+	bne	.L1026
+.L1025:
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	lsls	r3, r3, #31
-	bpl	.L1070
+	bpl	.L1026
 	movs	r0, #1
 	bl	FlashSetInterfaceMode
 	movs	r0, #1
 	bl	NandcSetMode
 	movs	r3, #0
-.L1078:
+.L1034:
 	movs	r0, #0
 	strb	r3, [r5]
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1070:
+.L1026:
 	movs	r3, #1
-	b	.L1078
-.L1080:
+	b	.L1034
+.L1036:
 	.align	2
-.L1079:
+.L1035:
 	.word	.LANCHOR25
 	.word	.LANCHOR30
 	.size	FlashDdrParaScan, .-FlashDdrParaScan
@@ -7590,8 +7310,8 @@ ToshibaReadRetrial:
 	mov	fp, r3
 	str	r1, [sp, #20]
 	bl	NandcWaitFlashReady
-	ldr	r3, .L1108
-	ldr	r2, .L1108+4
+	ldr	r3, .L1064
+	ldr	r2, .L1064+4
 	ldr	r4, [r3, r6, lsl #3]
 	add	r3, r3, r6, lsl #3
 	str	r2, [sp, #16]
@@ -7601,83 +7321,83 @@ ToshibaReadRetrial:
 	subs	r3, r3, #67
 	add	r5, r4, r5, lsl #8
 	cmp	r3, #1
-	bls	.L1098
-	ldr	r3, .L1108+8
+	bls	.L1054
+	ldr	r3, .L1064+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1099
+	cbz	r3, .L1055
 	movs	r0, #0
 	bl	NandcSetDdrMode
 	movs	r3, #1
-.L1099:
+.L1055:
 	str	r3, [sp, #8]
 	add	r3, r4, r7, lsl #8
 	movs	r2, #92
 	str	r2, [r3, #2056]
 	movs	r2, #197
 	str	r2, [r3, #2056]
-.L1082:
+.L1038:
 	mov	r8, #1
 	mov	r3, #-1
 	str	r3, [sp, #4]
-.L1084:
-	ldr	r3, .L1108+12
+.L1040:
+	ldr	r3, .L1064+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	cmp	r8, r3
-	bcc	.L1093
+	bcc	.L1049
 	ldr	r10, [sp, #4]
-.L1092:
+.L1048:
 	ldr	r3, [sp, #16]
 	movs	r1, #0
 	mov	r0, r5
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	subs	r2, r2, #67
 	cmp	r2, #1
-	bhi	.L1094
+	bhi	.L1050
 	bl	SandiskSetRRPara
-.L1095:
+.L1051:
 	add	r4, r4, r7, lsl #8
 	movs	r2, #255
 	str	r2, [r4, #2056]
-	ldr	r2, .L1108+16
+	ldr	r2, .L1064+16
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	add	r2, r2, r2, lsl #1
 	cmp	r10, r2, asr #2
-	bcc	.L1096
+	bcc	.L1052
 	cmp	r10, #-1
 	it	ne
 	movne	r10, #256
-.L1096:
+.L1052:
 	mov	r0, r6
 	bl	NandcWaitFlashReady
 	ldr	r3, [sp, #8]
-	cbz	r3, .L1081
+	cbz	r3, .L1037
 	movs	r0, #4
 	bl	NandcSetDdrMode
-.L1081:
+.L1037:
 	mov	r0, r10
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1098:
+.L1054:
 	movs	r3, #0
 	str	r3, [sp, #8]
-	b	.L1082
-.L1093:
+	b	.L1038
+.L1049:
 	ldr	r3, [sp, #16]
 	mov	r0, r5
 	uxtb	r1, r8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	subs	r3, r3, #67
 	cmp	r3, #1
-	bhi	.L1085
+	bhi	.L1041
 	bl	SandiskSetRRPara
-.L1086:
+.L1042:
 	ldr	r3, [sp, #16]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #34
-	bne	.L1087
-	ldr	r3, .L1108+12
+	bne	.L1043
+	ldr	r3, .L1064+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	subs	r3, r3, #3
 	cmp	r8, r3
@@ -7685,14 +7405,14 @@ ToshibaReadRetrial:
 	addeq	r3, r4, r7, lsl #8
 	moveq	r2, #179
 	streq	r2, [r3, #2056]
-.L1087:
+.L1043:
 	add	r3, r4, r7, lsl #8
 	movs	r2, #38
 	str	r2, [r3, #2056]
 	movs	r2, #93
 	str	r2, [r3, #2056]
 	ldr	r3, [sp, #8]
-	cbz	r3, .L1088
+	cbz	r3, .L1044
 	movs	r0, #4
 	bl	NandcSetDdrMode
 	mov	r3, fp
@@ -7703,10 +7423,10 @@ ToshibaReadRetrial:
 	mov	r10, r0
 	movs	r0, #0
 	bl	NandcSetDdrMode
-.L1089:
+.L1045:
 	cmp	r10, #-1
-	beq	.L1090
-	ldr	r2, .L1108+16
+	beq	.L1046
+	ldr	r2, .L1064+16
 	ldr	r3, [sp, #4]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r3, #-1
@@ -7715,33 +7435,33 @@ ToshibaReadRetrial:
 	str	r3, [sp, #4]
 	add	r2, r2, r2, lsl #1
 	cmp	r10, r2, asr #2
-	bcc	.L1092
+	bcc	.L1048
 	mov	fp, #0
 	str	fp, [sp, #12]
-.L1090:
+.L1046:
 	add	r8, r8, #1
-	b	.L1084
-.L1085:
+	b	.L1040
+.L1041:
 	bl	ToshibaSetRRPara
-	b	.L1086
-.L1088:
+	b	.L1042
+.L1044:
 	mov	r3, fp
 	ldr	r2, [sp, #12]
 	ldr	r1, [sp, #20]
 	mov	r0, r6
 	bl	FlashReadRawPage
 	mov	r10, r0
-	b	.L1089
-.L1094:
+	b	.L1045
+.L1050:
 	bl	ToshibaSetRRPara
-	b	.L1095
-.L1109:
+	b	.L1051
+.L1065:
 	.align	2
-.L1108:
+.L1064:
 	.word	.LANCHOR0
 	.word	.LANCHOR10
 	.word	.LANCHOR30
-	.word	.LANCHOR149
+	.word	.LANCHOR146
 	.word	.LANCHOR33
 	.size	ToshibaReadRetrial, .-ToshibaReadRetrial
 	.section	.text.SamsungReadRetrial,"ax",%progbits
@@ -7762,35 +7482,35 @@ SamsungReadRetrial:
 	mov	fp, r1
 	movs	r6, #1
 	bl	NandcWaitFlashReady
-	ldr	r2, .L1123
+	ldr	r2, .L1079
 	mov	r4, #-1
 	add	r3, r2, r7, lsl #3
 	ldrb	r5, [r3, #4]	@ zero_extendqisi2
 	add	r3, r5, #8
 	ldr	r5, [r2, r7, lsl #3]
 	add	r5, r5, r3, lsl #8
-.L1111:
-	ldr	r3, .L1123+4
+.L1067:
+	ldr	r3, .L1079+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	cmp	r6, r3
-	bcc	.L1115
-.L1114:
+	bcc	.L1071
+.L1070:
 	movs	r1, #0
 	mov	r0, r5
 	bl	SamsungSetRRPara
-	ldr	r3, .L1123+8
+	ldr	r3, .L1079+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, asr #2
-	bcc	.L1110
+	bcc	.L1066
 	adds	r3, r4, #1
 	it	ne
 	movne	r4, #256
-.L1110:
+.L1066:
 	mov	r0, r4
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1115:
+.L1071:
 	uxtb	r1, r6
 	mov	r0, r5
 	bl	SamsungSetRRPara
@@ -7800,28 +7520,28 @@ SamsungReadRetrial:
 	mov	r0, r7
 	bl	FlashReadRawPage
 	adds	r2, r0, #1
-	beq	.L1112
-	ldr	r3, .L1123+8
+	beq	.L1068
+	ldr	r3, .L1079+8
 	cmp	r4, #-1
 	it	eq
 	moveq	r4, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r0, r3, asr #2
-	bcc	.L1118
+	bcc	.L1074
 	mov	r8, #0
 	mov	r10, r8
-.L1112:
+.L1068:
 	adds	r6, r6, #1
-	b	.L1111
-.L1118:
+	b	.L1067
+.L1074:
 	mov	r4, r0
-	b	.L1114
-.L1124:
+	b	.L1070
+.L1080:
 	.align	2
-.L1123:
+.L1079:
 	.word	.LANCHOR0
-	.word	.LANCHOR149
+	.word	.LANCHOR146
 	.word	.LANCHOR33
 	.size	SamsungReadRetrial, .-SamsungReadRetrial
 	.section	.text.MicronReadRetrial,"ax",%progbits
@@ -7837,28 +7557,28 @@ MicronReadRetrial:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r7, r3
-	ldr	r3, .L1150
+	ldr	r3, .L1106
 	sub	sp, sp, #40
 	mov	r5, r0
 	str	r2, [sp, #16]
 	ldrb	r2, [r3]	@ zero_extendqisi2
-	ldr	r3, .L1150+4
+	ldr	r3, .L1106+4
 	str	r1, [sp, #28]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1126
+	bne	.L1082
 	add	r2, r2, r2, lsl #1
 	asrs	r3, r2, #2
-.L1149:
-.L1127:
+.L1105:
+.L1083:
 	mov	r8, #0
 	str	r3, [sp, #12]
 	mov	r6, r8
-.L1137:
+.L1093:
 	mov	r0, r5
 	mov	r10, #0
 	bl	NandcWaitFlashReady
-	ldr	r3, .L1150+8
+	ldr	r3, .L1106+8
 	mov	r4, #-1
 	ldr	r2, [r3, r5, lsl #3]
 	add	r3, r3, r5, lsl #3
@@ -7866,12 +7586,12 @@ MicronReadRetrial:
 	str	r2, [sp, #24]
 	lsl	r3, fp, #8
 	str	r3, [sp, #32]
-.L1128:
-	ldr	r3, .L1150+12
+.L1084:
+	ldr	r3, .L1106+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r10, r3
-	bcc	.L1132
-.L1131:
+	bcc	.L1088
+.L1087:
 	ldr	r3, [sp, #24]
 	movs	r0, #200
 	add	fp, r3, fp, lsl #8
@@ -7886,7 +7606,7 @@ MicronReadRetrial:
 	cmp	r4, r3
 	str	r6, [fp, #2048]
 	str	r6, [fp, #2048]
-	bcc	.L1133
+	bcc	.L1089
 	adds	r1, r4, #1
 	mov	r3, r10
 	it	ne
@@ -7894,26 +7614,26 @@ MicronReadRetrial:
 	ldr	r2, [sp, #28]
 	str	r4, [sp]
 	mov	r1, r10
-	ldr	r0, .L1150+16
+	ldr	r0, .L1106+16
 	bl	printf
 	cmp	r8, #0
-	bne	.L1135
-	ldr	r3, .L1150+4
+	bne	.L1091
+	ldr	r3, .L1106+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1125
+	beq	.L1081
 	adds	r2, r4, #1
-	bne	.L1125
+	bne	.L1081
 	movs	r1, #3
 	mov	r0, r5
 	bl	micron_auto_read_calibration_config
 	mov	r8, #1
-	b	.L1137
-.L1126:
-	ldr	r3, .L1150+20
+	b	.L1093
+.L1082:
+	ldr	r3, .L1106+20
 	smull	r2, r3, r2, r3
-	b	.L1149
-.L1132:
+	b	.L1105
+.L1088:
 	ldr	r2, [sp, #32]
 	movs	r0, #200
 	ldr	r3, [sp, #24]
@@ -7938,50 +7658,50 @@ MicronReadRetrial:
 	mov	r3, r7
 	bl	FlashReadRawPage
 	adds	r3, r0, #1
-	beq	.L1129
+	beq	.L1085
 	ldr	r3, [sp, #12]
 	cmp	r4, #-1
 	it	eq
 	moveq	r4, r0
 	cmp	r0, r3
-	bcc	.L1139
+	bcc	.L1095
 	movs	r7, #0
 	str	r7, [sp, #16]
-.L1129:
+.L1085:
 	ldr	r10, [sp, #20]
-	b	.L1128
-.L1139:
+	b	.L1084
+.L1095:
 	movs	r7, #0
 	mov	r4, r0
 	str	r7, [sp, #16]
-	b	.L1131
-.L1135:
+	b	.L1087
+.L1091:
 	movs	r1, #0
 	mov	r0, r5
 	bl	micron_auto_read_calibration_config
 	adds	r3, r4, #1
 	it	ne
 	movne	r4, #256
-.L1125:
+.L1081:
 	mov	r0, r4
 	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1133:
+.L1089:
 	cmp	r8, #0
-	beq	.L1125
+	beq	.L1081
 	movs	r1, #0
 	mov	r0, r5
 	bl	micron_auto_read_calibration_config
 	mov	r4, #256
-	b	.L1125
-.L1151:
+	b	.L1081
+.L1107:
 	.align	2
-.L1150:
+.L1106:
 	.word	.LANCHOR33
 	.word	.LANCHOR16
 	.word	.LANCHOR0
-	.word	.LANCHOR149
+	.word	.LANCHOR146
 	.word	.LC13
 	.word	1431655766
 	.size	MicronReadRetrial, .-MicronReadRetrial
@@ -7998,7 +7718,7 @@ HynixReadRetrial:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, r3
-	ldr	r4, .L1169
+	ldr	r4, .L1125
 	mov	r8, #0
 	mov	r6, #-1
 	mov	fp, r2
@@ -8008,7 +7728,7 @@ HynixReadRetrial:
 	adds	r2, r4, r0
 	ldrb	r5, [r2, #12]	@ zero_extendqisi2
 	str	r3, [sp]
-	ldr	r3, .L1169+4
+	ldr	r3, .L1125+4
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r3, #7
@@ -8016,38 +7736,38 @@ HynixReadRetrial:
 	it	ls
 	ldrbls	r5, [r2, #20]	@ zero_extendqisi2
 	bl	NandcWaitFlashReady
-.L1154:
+.L1110:
 	ldr	r3, [sp]
 	cmp	r8, r3
-	bcc	.L1159
-.L1158:
-	ldr	r3, .L1169+4
+	bcc	.L1115
+.L1114:
+	ldr	r3, .L1125+4
 	add	r4, r4, r7
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r3, #7
 	cmp	r3, #1
-	ldr	r3, .L1169+8
+	ldr	r3, .L1125+8
 	ite	ls
 	strbls	r5, [r4, #20]
 	strbhi	r5, [r4, #12]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r6, r3, asr #2
-	bcc	.L1152
+	bcc	.L1108
 	adds	r3, r6, #1
 	it	ne
 	movne	r6, #256
-.L1152:
+.L1108:
 	mov	r0, r6
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1159:
+.L1115:
 	ldr	r3, [sp]
 	adds	r5, r5, #1
 	uxtb	r5, r5
-	ldr	r2, .L1169+12
+	ldr	r2, .L1125+12
 	ldrb	r1, [r4, #1]	@ zero_extendqisi2
 	mov	r0, r7
 	cmp	r3, r5
@@ -8061,26 +7781,26 @@ HynixReadRetrial:
 	mov	r0, r7
 	bl	FlashReadRawPage
 	adds	r2, r0, #1
-	beq	.L1156
-	ldr	r3, .L1169+8
+	beq	.L1112
+	ldr	r3, .L1125+8
 	cmp	r6, #-1
 	it	eq
 	moveq	r6, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r0, r3, asr #2
-	bcc	.L1163
+	bcc	.L1119
 	mov	r10, #0
 	mov	fp, r10
-.L1156:
+.L1112:
 	add	r8, r8, #1
-	b	.L1154
-.L1163:
+	b	.L1110
+.L1119:
 	mov	r6, r0
-	b	.L1158
-.L1170:
+	b	.L1114
+.L1126:
 	.align	2
-.L1169:
+.L1125:
 	.word	.LANCHOR20
 	.word	.LANCHOR7
 	.word	.LANCHOR33
@@ -8103,15 +7823,15 @@ samsung_read_retrial:
 	mov	r7, r3
 	str	r1, [sp, #16]
 	bl	NandcWaitFlashReady
-	ldr	r3, .L1196
+	ldr	r3, .L1152
 	ldr	r2, [r3, r8, lsl #3]
 	add	r3, r3, r8, lsl #3
 	str	r2, [sp, #12]
-	ldr	r2, .L1196+4
+	ldr	r2, .L1152+4
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, #0
-	bne	.L1172
+	bne	.L1128
 	lsls	r3, r3, #8
 	mov	r4, #-1
 	movs	r6, #1
@@ -8119,14 +7839,14 @@ samsung_read_retrial:
 	ldr	r2, [sp, #20]
 	ldr	r3, [sp, #12]
 	adds	r5, r3, r2
-.L1176:
+.L1132:
 	movs	r3, #239
 	mov	fp, #0
 	str	r3, [r5, #2056]
 	movs	r3, #141
 	str	r3, [r5, #2052]
 	mov	r2, r10
-	ldr	r3, .L1196+8
+	ldr	r3, .L1152+8
 	mov	r0, r8
 	ldr	r1, [sp, #16]
 	ldrsb	r3, [r6, r3]
@@ -8137,40 +7857,40 @@ samsung_read_retrial:
 	str	fp, [r5, #2048]
 	bl	FlashReadRawPage
 	adds	r1, r0, #1
-	beq	.L1173
-	ldr	r3, .L1196+12
+	beq	.L1129
+	ldr	r3, .L1152+12
 	cmp	r4, #-1
 	it	eq
 	moveq	r4, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r0, r3, asr #2
-	bcc	.L1184
+	bcc	.L1140
 	mov	r7, fp
 	mov	r10, fp
-.L1173:
+.L1129:
 	adds	r6, r6, #1
 	cmp	r6, #26
-	bne	.L1176
-.L1175:
+	bne	.L1132
+.L1131:
 	ldr	r2, [sp, #20]
 	ldr	r3, [sp, #12]
 	add	r3, r3, r2
 	movs	r2, #239
 	str	r2, [r3, #2056]
 	movs	r3, #141
-.L1195:
+.L1151:
 	str	r3, [r5, #2052]
 	movs	r3, #0
 	str	r3, [r5, #2048]
 	str	r3, [r5, #2048]
 	str	r3, [r5, #2048]
 	str	r3, [r5, #2048]
-	ldr	r3, .L1196+12
+	ldr	r3, .L1152+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, asr #2
-	bcc	.L1182
+	bcc	.L1138
 	adds	r3, r4, #1
 	ldr	r2, [sp, #16]
 	it	ne
@@ -8178,28 +7898,28 @@ samsung_read_retrial:
 	mov	r3, r6
 	str	r4, [sp]
 	mov	r1, r6
-	ldr	r0, .L1196+16
+	ldr	r0, .L1152+16
 	bl	printf
-.L1182:
+.L1138:
 	mov	r0, r8
 	bl	NandcWaitFlashReady
 	mov	r0, r4
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1184:
+.L1140:
 	mov	r4, r0
-	b	.L1175
-.L1172:
+	b	.L1131
+.L1128:
 	lsls	r3, r3, #8
-	ldr	fp, .L1196+20
+	ldr	fp, .L1152+20
 	mov	r4, #-1
 	str	r3, [sp, #20]
 	movs	r6, #1
 	ldr	r3, [sp, #12]
 	ldr	r2, [sp, #20]
 	adds	r5, r3, r2
-.L1181:
+.L1137:
 	movs	r3, #239
 	mov	r2, r10
 	str	r3, [r5, #2056]
@@ -8218,42 +7938,42 @@ samsung_read_retrial:
 	mov	r3, r7
 	bl	FlashReadRawPage
 	adds	r2, r0, #1
-	beq	.L1178
-	ldr	r3, .L1196+12
+	beq	.L1134
+	ldr	r3, .L1152+12
 	cmp	r4, #-1
 	it	eq
 	moveq	r4, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r0, r3, asr #2
-	bcc	.L1185
+	bcc	.L1141
 	movs	r7, #0
 	mov	r10, r7
-.L1178:
+.L1134:
 	adds	r6, r6, #1
 	add	fp, fp, #4
 	cmp	r6, #26
-	bne	.L1181
-.L1180:
+	bne	.L1137
+.L1136:
 	ldr	r2, [sp, #20]
 	ldr	r3, [sp, #12]
 	add	r3, r3, r2
 	movs	r2, #239
 	str	r2, [r3, #2056]
 	movs	r3, #137
-	b	.L1195
-.L1185:
+	b	.L1151
+.L1141:
 	mov	r4, r0
-	b	.L1180
-.L1197:
+	b	.L1136
+.L1153:
 	.align	2
-.L1196:
+.L1152:
 	.word	.LANCHOR0
 	.word	.LANCHOR24
-	.word	.LANCHOR150
+	.word	.LANCHOR147
 	.word	.LANCHOR33
 	.word	.LC14
-	.word	.LANCHOR151
+	.word	.LANCHOR148
 	.size	samsung_read_retrial, .-samsung_read_retrial
 	.section	.text.FlashProgPage,"ax",%progbits
 	.align	1
@@ -8268,25 +7988,25 @@ FlashProgPage:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r8, r3
-	ldr	r3, .L1201
+	ldr	r3, .L1157
 	mov	r5, r1
 	mov	r7, r2
 	mov	r4, r0
 	ldrb	r6, [r3, #9]	@ zero_extendqisi2
-	cbnz	r0, .L1199
-	ldr	r3, .L1201+4
-	ldr	r2, .L1201+8
+	cbnz	r0, .L1155
+	ldr	r3, .L1157+4
+	ldr	r2, .L1157+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	ldr	r1, [r2]
 	muls	r1, r3, r1
 	cmp	r1, r5
-	bls	.L1199
-	ldr	r3, .L1201+12
+	bls	.L1155
+	ldr	r3, .L1157+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
 	it	ne
 	movne	r6, #4
-.L1199:
+.L1155:
 	mov	r0, r4
 	bl	NandcWaitFlashReady
 	mov	r0, r4
@@ -8315,9 +8035,9 @@ FlashProgPage:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1202:
+.L1158:
 	.align	2
-.L1201:
+.L1157:
 	.word	.LANCHOR31
 	.word	.LANCHOR3
 	.word	.LANCHOR4
@@ -8336,43 +8056,43 @@ FlashPageProgMsbFFData:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
 	mov	r6, r0
-	ldr	r3, .L1223
+	ldr	r3, .L1179
 	mov	r7, r1
 	mov	r4, r2
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1204
-	ldr	r3, .L1223+4
+	cbz	r3, .L1160
+	ldr	r3, .L1179+4
 	ldr	r3, [r3]
-	cbnz	r3, .L1203
-.L1204:
-	ldr	r5, .L1223+8
+	cbnz	r3, .L1159
+.L1160:
+	ldr	r5, .L1179+8
 	ldr	r3, [r5]
 	ldrb	r2, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r2, #5
 	uxtb	r3, r3
 	cmp	r3, #30
-	bhi	.L1205
-	ldr	r1, .L1223+12
+	bhi	.L1161
+	ldr	r1, .L1179+12
 	lsr	r3, r1, r3
 	lsls	r3, r3, #31
-	bmi	.L1206
-.L1210:
+	bmi	.L1162
+.L1166:
 	cmp	r2, #68
-	bne	.L1203
-.L1206:
-	ldr	r10, .L1223+16
-	ldr	r8, .L1223+20
-.L1208:
+	bne	.L1159
+.L1162:
+	ldr	r10, .L1179+16
+	ldr	r8, .L1179+20
+.L1164:
 	ldr	r3, [r5]
 	ldrh	r3, [r3, #10]
 	cmp	r3, r4
-	bhi	.L1209
+	bhi	.L1165
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L1209:
+.L1165:
 	ldrh	r2, [r10, r4, lsl #1]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1203
+	bne	.L1159
 	mov	r2, #32768
 	movs	r1, #255
 	ldr	r0, [r8]
@@ -8384,23 +8104,187 @@ FlashPageProgMsbFFData:
 	uxth	r4, r4
 	mov	r2, r3
 	bl	FlashProgPage
-	b	.L1208
-.L1205:
+	b	.L1164
+.L1161:
 	cmp	r2, #50
-	bne	.L1210
-	b	.L1206
-.L1203:
+	bne	.L1166
+	b	.L1162
+.L1159:
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L1224:
+.L1180:
+	.align	2
+.L1179:
+	.word	.LANCHOR16
+	.word	.LANCHOR29
+	.word	.LANCHOR7
+	.word	1073758215
+	.word	.LANCHOR123
+	.word	.LANCHOR149
+	.size	FlashPageProgMsbFFData, .-FlashPageProgMsbFFData
+	.section	.text.ftl_memcpy,"ax",%progbits
+	.align	1
+	.global	ftl_memcpy
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_memcpy, %function
+ftl_memcpy:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	memcpy
+	.size	ftl_memcpy, .-ftl_memcpy
+	.section	.text.FlashReadIdbData,"ax",%progbits
+	.align	1
+	.global	FlashReadIdbData
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashReadIdbData, %function
+FlashReadIdbData:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	mov	r2, #2048
+	ldr	r1, .L1183
+	bl	ftl_memcpy
+	movs	r0, #0
+	pop	{r3, pc}
+.L1184:
+	.align	2
+.L1183:
+	.word	.LANCHOR150
+	.size	FlashReadIdbData, .-FlashReadIdbData
+	.section	.text.FlashLoadPhyInfoInRam,"ax",%progbits
+	.align	1
+	.global	FlashLoadPhyInfoInRam
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashLoadPhyInfoInRam, %function
+FlashLoadPhyInfoInRam:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, lr}
+	movs	r6, #0
+	ldr	r7, .L1193
+	ldr	r5, .L1193+4
+.L1188:
+	ldrb	r2, [r7, #-1]	@ zero_extendqisi2
+	mov	r1, r5
+	mov	r0, r7
+	lsl	r8, r6, #5
+	bl	FlashMemCmp8
+	mov	r4, r0
+	cbnz	r0, .L1186
+	ldr	r5, .L1193+8
+	mov	r3, r4
+	ldr	r2, .L1193+12
+	add	r5, r5, r8
+	ldrb	r0, [r5, #22]	@ zero_extendqisi2
+	mov	r1, r2
+.L1187:
+	lsls	r6, r3, #5
+	ldrb	r6, [r6, r2]	@ zero_extendqisi2
+	cmp	r6, r0
+	beq	.L1190
+	adds	r3, r3, #1
+	cmp	r3, #4
+	bne	.L1187
+.L1190:
+	ldr	r6, .L1193+16
+	add	r1, r1, r3, lsl #5
+	movs	r2, #32
+	ldr	r0, .L1193+20
+	bl	ftl_memcpy
+	movs	r2, #32
+	mov	r1, r5
+	mov	r0, r6
+	bl	ftl_memcpy
+	ldrh	r0, [r6, #10]
+	bl	FlashBlockAlignInit
+	b	.L1185
+.L1186:
+	adds	r6, r6, #1
+	adds	r7, r7, #32
+	cmp	r6, #86
+	bne	.L1188
+	mov	r4, #-1
+.L1185:
+	mov	r0, r4
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1194:
 	.align	2
-.L1223:
-	.word	.LANCHOR16
-	.word	.LANCHOR29
-	.word	.LANCHOR7
-	.word	1073758215
-	.word	.LANCHOR123
+.L1193:
+	.word	.LANCHOR151+1
+	.word	.LANCHOR22
+	.word	.LANCHOR151
 	.word	.LANCHOR152
-	.size	FlashPageProgMsbFFData, .-FlashPageProgMsbFFData
+	.word	.LANCHOR31
+	.word	.LANCHOR8
+	.size	FlashLoadPhyInfoInRam, .-FlashLoadPhyInfoInRam
+	.section	.text.NandcCopy1KB,"ax",%progbits
+	.align	1
+	.global	NandcCopy1KB
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	NandcCopy1KB, %function
+NandcCopy1KB:
+	@ args = 4, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	cmp	r1, #1
+	push	{r4, r5, r6, lr}
+	mov	r4, r2
+	add	r2, r0, #4096
+	add	r6, r0, #512
+	add	r0, r2, r4, lsl #9
+	ldr	r5, [sp, #16]
+	bne	.L1196
+	cbz	r3, .L1197
+	mov	r2, #1024
+	mov	r1, r3
+	bl	ftl_memcpy
+.L1197:
+	cbz	r5, .L1195
+	ldrb	r2, [r5, #1]	@ zero_extendqisi2
+	lsrs	r4, r4, #1
+	ldrb	r3, [r5]	@ zero_extendqisi2
+	add	r4, r4, r4, lsl #1
+	lsls	r4, r4, #4
+	orr	r3, r3, r2, lsl #8
+	ldrb	r2, [r5, #2]	@ zero_extendqisi2
+	orr	r3, r3, r2, lsl #16
+	ldrb	r2, [r5, #3]	@ zero_extendqisi2
+	orr	r3, r3, r2, lsl #24
+	str	r3, [r6, r4]
+	pop	{r4, r5, r6, pc}
+.L1196:
+	cbz	r3, .L1200
+	mov	r1, r0
+	mov	r2, #1024
+	mov	r0, r3
+	bl	ftl_memcpy
+.L1200:
+	cbz	r5, .L1195
+	lsrs	r4, r4, #1
+	add	r4, r4, r4, lsl #1
+	lsls	r4, r4, #4
+	ldr	r3, [r6, r4]
+	strb	r3, [r5]
+	lsrs	r2, r3, #8
+	strb	r2, [r5, #1]
+	lsrs	r2, r3, #16
+	lsrs	r3, r3, #24
+	strb	r2, [r5, #2]
+	strb	r3, [r5, #3]
+.L1195:
+	pop	{r4, r5, r6, pc}
+	.size	NandcCopy1KB, .-NandcCopy1KB
 	.section	.text.FlashLoadPhyInfo,"ax",%progbits
 	.align	1
 	.global	FlashLoadPhyInfo
@@ -8415,7 +8299,7 @@ FlashLoadPhyInfo:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #60
 	sub	sp, sp, #24
-	ldr	fp, .L1239+32
+	ldr	fp, .L1225+32
 	movs	r4, #0
 	movs	r7, #4
 	strb	r3, [sp, #20]
@@ -8428,21 +8312,21 @@ FlashLoadPhyInfo:
 	mov	r0, r4
 	ldr	r3, [fp]
 	mov	r6, #-1
-	ldr	r8, .L1239+36
-	ldr	r10, .L1239+40
+	ldr	r8, .L1225+36
+	ldr	r10, .L1225+40
 	str	r3, [sp, #4]
-	ldr	r5, .L1239
+	ldr	r5, .L1225
 	ldr	r3, [r8]
 	str	r4, [r10]
 	str	r3, [r5]
 	bl	flash_enter_slc_mode
 	str	r10, [sp, #12]
 	mov	r10, r8
-.L1226:
+.L1212:
 	mov	r8, #0
 	adds	r3, r4, #1
 	str	r3, [sp, #8]
-.L1228:
+.L1214:
 	add	r3, sp, #20
 	ldrb	r0, [r3, r8]	@ zero_extendqisi2
 	bl	FlashBchSel
@@ -8452,58 +8336,58 @@ FlashLoadPhyInfo:
 	mov	r0, r3
 	bl	FlashReadRawPage
 	adds	r0, r0, #1
-	bne	.L1227
+	bne	.L1213
 	movs	r3, #0
 	ldr	r2, [r10]
 	ldr	r1, [sp, #8]
 	mov	r0, r3
 	bl	FlashReadRawPage
 	adds	r0, r0, #1
-	bne	.L1227
+	bne	.L1213
 	add	r8, r8, #1
 	cmp	r8, #4
-	bne	.L1228
-.L1229:
+	bne	.L1214
+.L1215:
 	ldr	r3, [sp, #4]
 	subs	r7, r7, #1
 	add	r4, r4, r3
-	bne	.L1226
+	bne	.L1212
 	mov	r0, r7
-	b	.L1238
-.L1230:
+	b	.L1224
+.L1216:
 	movw	r1, #2036
 	add	r0, r8, #12
 	bl	js_hash
 	ldr	r3, [r8, #8]
 	cmp	r3, r0
-	bne	.L1236
-	ldr	r6, .L1239+4
+	bne	.L1222
+	ldr	r6, .L1225+4
 	movs	r2, #32
 	add	r1, r8, #160
 	mov	r0, r6
 	bl	ftl_memcpy
 	ldr	r1, [r5]
 	movs	r2, #32
-	ldr	r0, .L1239+8
+	ldr	r0, .L1225+8
 	adds	r1, r1, #192
 	bl	ftl_memcpy
 	ldr	r1, [r5]
 	mov	r2, #852
-	ldr	r0, .L1239+12
+	ldr	r0, .L1225+12
 	adds	r1, r1, #224
 	bl	ftl_memcpy
 	ldrh	r0, [r6, #10]
 	bl	FlashBlockAlignInit
 	ldr	r6, [r5]
 	mov	r0, r4
-	ldr	r3, .L1239+16
+	ldr	r3, .L1225+16
 	ldr	r1, [fp]
 	ldr	r2, [r6, #1076]
 	strb	r2, [r3]
 	ldr	r3, [sp, #12]
 	str	r4, [r3]
 	bl	__aeabi_uidiv
-	ldr	r3, .L1239+20
+	ldr	r3, .L1225+20
 	adds	r0, r0, #1
 	cmp	r0, #1
 	itte	ls
@@ -8512,36 +8396,36 @@ FlashLoadPhyInfo:
 	strhi	r0, [r3]
 	ldrh	r2, [r6, #14]
 	movs	r6, #0
-	ldr	r3, .L1239+24
+	ldr	r3, .L1225+24
 	strb	r2, [r3]
-	b	.L1229
-.L1236:
+	b	.L1215
+.L1222:
 	mov	r6, #-1
-	b	.L1229
-.L1227:
+	b	.L1215
+.L1213:
 	ldr	r8, [r5]
-	ldr	r2, .L1239+28
+	ldr	r2, .L1225+28
 	ldr	r3, [r8]
 	cmp	r3, r2
-	bne	.L1229
+	bne	.L1215
 	cmp	r6, #0
-	bne	.L1230
+	bne	.L1216
 	ldr	r1, [fp]
 	mov	r0, r4
 	bl	__aeabi_uidiv
-	ldr	r3, .L1239+20
+	ldr	r3, .L1225+20
 	adds	r0, r0, #1
 	str	r0, [r3]
 	mov	r0, r6
-.L1238:
+.L1224:
 	bl	flash_exit_slc_mode
 	mov	r0, r6
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1240:
+.L1226:
 	.align	2
-.L1239:
+.L1225:
 	.word	.LANCHOR153
 	.word	.LANCHOR31
 	.word	.LANCHOR8
@@ -8566,13 +8450,13 @@ FlashSavePhyInfo:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r6, .L1254
-	ldr	r7, .L1254+4
+	ldr	r6, .L1240
+	ldr	r7, .L1240+4
 	ldr	r3, [r6]
-	ldr	r10, .L1254+64
-	ldr	r8, .L1254+68
+	ldr	r10, .L1240+64
+	ldr	r8, .L1240+68
 	str	r3, [r7]
-	ldr	r3, .L1254+8
+	ldr	r3, .L1240+8
 	ldrb	r0, [r3]	@ zero_extendqisi2
 	bl	FlashBchSel
 	mov	r2, #2048
@@ -8581,42 +8465,42 @@ FlashSavePhyInfo:
 	bl	ftl_memset
 	ldr	r0, [r7]
 	movs	r2, #32
-	ldr	r3, .L1254+12
-	ldr	r1, .L1254+16
+	ldr	r3, .L1240+12
+	ldr	r1, .L1240+16
 	str	r10, [r0]
 	adds	r0, r0, #16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	strh	r3, [r0, #-4]	@ movhi
-	ldr	r3, .L1254+20
+	ldr	r3, .L1240+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	strh	r3, [r0, #-2]	@ movhi
-	ldr	r3, .L1254+24
+	ldr	r3, .L1240+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r3, [r0, #1060]
 	bl	ftl_memcpy
 	ldr	r0, [r7]
 	movs	r2, #8
-	ldr	r1, .L1254+28
+	ldr	r1, .L1240+28
 	adds	r0, r0, #80
 	bl	ftl_memcpy
 	ldr	r0, [r7]
 	movs	r2, #32
-	ldr	r1, .L1254+32
+	ldr	r1, .L1240+32
 	adds	r0, r0, #96
 	bl	ftl_memcpy
 	ldr	r0, [r7]
 	movs	r2, #32
-	ldr	r1, .L1254+36
+	ldr	r1, .L1240+36
 	adds	r0, r0, #160
 	bl	ftl_memcpy
 	ldr	r0, [r7]
 	movs	r2, #32
-	ldr	r1, .L1254+40
+	ldr	r1, .L1240+40
 	adds	r0, r0, #192
 	bl	ftl_memcpy
 	ldr	r0, [r7]
 	mov	r2, #852
-	ldr	r1, .L1254+44
+	ldr	r1, .L1240+44
 	adds	r0, r0, #224
 	bl	ftl_memcpy
 	ldr	r4, [r7]
@@ -8633,21 +8517,21 @@ FlashSavePhyInfo:
 	str	r3, [r7]
 	bl	flash_enter_slc_mode
 	str	r7, [sp, #4]
-	ldr	r7, .L1254+48
+	ldr	r7, .L1240+48
 	str	r10, [sp, #8]
 	mov	fp, r7
-.L1247:
+.L1233:
 	ldr	r1, [r7]
 	movs	r2, #0
 	mov	r0, r2
 	muls	r1, r5, r1
 	bl	FlashEraseBlock
-	ldr	r3, .L1254+52
+	ldr	r3, .L1240+52
 	ldrb	r10, [r3]	@ zero_extendqisi2
 	cmp	r10, #0
-	beq	.L1242
+	beq	.L1228
 	mov	r10, #0
-.L1243:
+.L1229:
 	ldr	r1, [fp]
 	movs	r3, #0
 	ldr	r2, [r6]
@@ -8656,8 +8540,8 @@ FlashSavePhyInfo:
 	add	r10, r10, #1
 	bl	FlashProgPage
 	cmp	r10, #10
-	bne	.L1243
-.L1244:
+	bne	.L1229
+.L1230:
 	ldr	r1, [fp]
 	movs	r3, #0
 	ldr	r2, [r8]
@@ -8666,13 +8550,13 @@ FlashSavePhyInfo:
 	muls	r1, r5, r1
 	bl	FlashReadRawPage
 	adds	r0, r0, #1
-	beq	.L1245
+	beq	.L1231
 	ldr	r3, [sp, #4]
 	ldr	r1, [sp, #8]
 	ldr	r3, [r3]
 	ldr	r2, [r3]
 	cmp	r2, r1
-	bne	.L1245
+	bne	.L1231
 	add	r0, r3, #12
 	movw	r1, #2036
 	str	r3, [sp, #12]
@@ -8680,21 +8564,21 @@ FlashSavePhyInfo:
 	ldr	r3, [sp, #12]
 	ldr	r3, [r3, #8]
 	cmp	r3, r0
-	bne	.L1245
-	ldr	r3, .L1254+56
+	bne	.L1231
+	ldr	r3, .L1240+56
 	cmp	r4, #1
 	str	r10, [r3]
 	ldr	r3, [fp]
 	mul	r5, r5, r3
-	ldr	r3, .L1254+60
+	ldr	r3, .L1240+60
 	str	r5, [r3]
-	beq	.L1248
+	beq	.L1234
 	movs	r4, #1
-.L1245:
+.L1231:
 	mov	r5, r10
 	cmp	r5, #4
-	bne	.L1247
-.L1246:
+	bne	.L1233
+.L1232:
 	movs	r0, #0
 	bl	flash_exit_slc_mode
 	clz	r0, r4
@@ -8703,7 +8587,7 @@ FlashSavePhyInfo:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1242:
+.L1228:
 	ldr	r1, [r7]
 	mov	r3, r10
 	ldr	r2, [r6]
@@ -8717,13 +8601,13 @@ FlashSavePhyInfo:
 	muls	r1, r5, r1
 	adds	r1, r1, #1
 	bl	FlashProgPage
-	b	.L1244
-.L1248:
+	b	.L1230
+.L1234:
 	movs	r4, #2
-	b	.L1246
-.L1255:
+	b	.L1232
+.L1241:
 	.align	2
-.L1254:
+.L1240:
 	.word	.LANCHOR154
 	.word	.LANCHOR153
 	.word	.LANCHOR158
@@ -8741,7 +8625,7 @@ FlashSavePhyInfo:
 	.word	.LANCHOR156
 	.word	.LANCHOR155
 	.word	1312902724
-	.word	.LANCHOR152
+	.word	.LANCHOR149
 	.size	FlashSavePhyInfo, .-FlashSavePhyInfo
 	.section	.text.FlashReadIdbDataRaw,"ax",%progbits
 	.align	1
@@ -8764,45 +8648,45 @@ FlashReadIdbDataRaw:
 	strb	r3, [sp, #14]
 	movs	r3, #16
 	strb	r3, [sp, #15]
-	ldr	r3, .L1274
+	ldr	r3, .L1260
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r3, [sp]
-	ldr	r3, .L1274+4
+	ldr	r3, .L1260+4
 	ldr	r2, [r3]
 	str	r3, [sp, #4]
-	cbz	r2, .L1257
+	cbz	r2, .L1243
 	movs	r0, #0
 	bl	flash_enter_slc_mode
-.L1257:
+.L1243:
 	mov	r7, #-1
 	movs	r4, #2
 	mov	r2, #2048
 	movs	r1, #0
 	mov	r0, r10
 	bl	ftl_memset
-.L1258:
-	ldr	r3, .L1274+8
+.L1244:
+	ldr	r3, .L1260+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r4, r3
-	bcc	.L1263
-.L1262:
+	bcc	.L1249
+.L1248:
 	ldr	r0, [sp]
 	bl	FlashBchSel
 	ldr	r3, [sp, #4]
 	ldr	r3, [r3]
-	cbz	r3, .L1256
+	cbz	r3, .L1242
 	movs	r0, #0
 	bl	flash_exit_slc_mode
-.L1256:
+.L1242:
 	mov	r0, r7
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1263:
-	ldr	r5, .L1274+12
+.L1249:
+	ldr	r5, .L1260+12
 	movs	r6, #0
-	ldr	fp, .L1274+28
-.L1260:
+	ldr	fp, .L1260+28
+.L1246:
 	add	r3, sp, #12
 	ldrb	r8, [r6, r3]	@ zero_extendqisi2
 	mov	r0, r8
@@ -8814,44 +8698,44 @@ FlashReadIdbDataRaw:
 	muls	r1, r4, r1
 	bl	FlashReadRawPage
 	adds	r0, r0, #1
-	bne	.L1259
+	bne	.L1245
 	adds	r6, r6, #1
 	cmp	r6, #4
-	bne	.L1260
-.L1261:
+	bne	.L1246
+.L1247:
 	adds	r4, r4, #1
-	b	.L1258
-.L1266:
+	b	.L1244
+.L1252:
 	movs	r7, #0
-	b	.L1262
-.L1259:
+	b	.L1248
+.L1245:
 	ldr	r3, [r5]
 	ldr	r2, [r3]
-	ldr	r3, .L1274+16
+	ldr	r3, .L1260+16
 	cmp	r2, r3
-	bne	.L1261
+	bne	.L1247
 	mov	r1, r8
-	ldr	r0, .L1274+20
+	ldr	r0, .L1260+20
 	bl	printf
 	mov	r2, #2048
 	ldr	r1, [r5]
 	mov	r0, r10
 	bl	ftl_memcpy
 	ldr	r3, [r5]
-	ldr	r2, .L1274+8
+	ldr	r2, .L1260+8
 	ldr	r3, [r3, #512]
 	strb	r3, [r2]
-	ldr	r3, .L1274+24
+	ldr	r3, .L1260+24
 	ldr	r2, [r3]
 	cmp	r4, r2
-	bcs	.L1266
+	bcs	.L1252
 	str	r4, [r3]
 	movs	r7, #0
 	bl	FlashSavePhyInfo
-	b	.L1261
-.L1275:
+	b	.L1247
+.L1261:
 	.align	2
-.L1274:
+.L1260:
 	.word	.LANCHOR33
 	.word	.LANCHOR29
 	.word	.LANCHOR3
@@ -8878,45 +8762,45 @@ idb_write_data:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	cmp	r2, #63
 	sub	sp, sp, #104
-	bls	.L1277
+	bls	.L1263
 	cmp	r0, #576
-	bcs	.L1278
-	ldr	r2, .L1329
+	bcs	.L1264
+	ldr	r2, .L1315
 	cmp	r0, #64
 	mov	r4, #1
 	str	r4, [r2]
-	bhi	.L1279
+	bhi	.L1265
 	rsb	r0, r0, #64
 	subs	r2, r3, r0
 	add	r1, r1, r0, lsl #9
-	ldr	r0, .L1329+4
+	ldr	r0, .L1315+4
 	lsls	r2, r2, #9
-.L1328:
+.L1314:
 	bl	ftl_memcpy
-.L1317:
+.L1303:
 	movs	r0, #0
 	add	sp, sp, #104
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1279:
+.L1265:
 	rsb	r2, r0, #576
 	subs	r0, r0, #64
 	cmp	r2, r3
 	it	cs
 	movcs	r2, r3
-	ldr	r3, .L1329+4
+	ldr	r3, .L1315+4
 	lsls	r2, r2, #9
 	add	r0, r3, r0, lsl #9
-	b	.L1328
-.L1277:
+	b	.L1314
+.L1263:
 	cmp	r0, #576
-	bcc	.L1317
-.L1278:
-	ldr	r3, .L1329
+	bcc	.L1303
+.L1264:
+	ldr	r3, .L1315
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L1317
-	ldr	r3, .L1329+8
+	beq	.L1303
+	ldr	r3, .L1315+8
 	ldr	r2, [r3]
 	ldrb	r3, [r2, #9]	@ zero_extendqisi2
 	ldrh	r2, [r2, #10]
@@ -8926,14 +8810,14 @@ idb_write_data:
 	addw	r0, r3, #511
 	str	r3, [sp, #8]
 	bl	__aeabi_uidiv
-	ldr	r1, .L1329+4
+	ldr	r1, .L1315+4
 	movs	r3, #0
 	str	r0, [sp, #20]
 	movw	r2, #65535
 	mov	r0, r1
-.L1283:
+.L1269:
 	ldr	r4, [r1, r2, lsl #2]
-	cbnz	r4, .L1281
+	cbnz	r4, .L1267
 	ldr	r4, [r1, r3, lsl #2]
 	adds	r3, r3, #1
 	cmp	r3, #4096
@@ -8942,13 +8826,13 @@ idb_write_data:
 	str	r4, [r1, r2, lsl #2]
 	subs	r2, r2, #1
 	cmp	r2, #4096
-	bne	.L1283
-.L1281:
+	bne	.L1269
+.L1267:
 	ldr	r1, [r0, r2, lsl #2]
 	mov	r3, #512
-	ldr	r0, .L1329+12
+	ldr	r0, .L1315+12
 	bl	printf
-	ldr	r3, .L1329+16
+	ldr	r3, .L1315+16
 	ldr	r2, [sp, #8]
 	ldr	r3, [r3]
 	str	r3, [sp, #16]
@@ -8959,35 +8843,35 @@ idb_write_data:
 	mul	r4, r3, r2
 	movs	r3, #0
 	str	r3, [sp, #12]
-.L1284:
+.L1270:
 	ldr	r3, [sp, #16]
 	cmp	r3, #15
-	bls	.L1301
+	bls	.L1287
 	ldr	r3, [sp, #12]
-	cbnz	r3, .L1303
+	cbnz	r3, .L1289
 	mov	r1, r3
-	ldr	r0, .L1329+20
+	ldr	r0, .L1315+20
 	bl	printf
-.L1303:
-	ldr	r3, .L1329
+.L1289:
+	ldr	r3, .L1315
 	movs	r2, #0
 	str	r2, [r3]
-	b	.L1317
-.L1330:
+	b	.L1303
+.L1316:
 	.align	2
-.L1329:
+.L1315:
 	.word	.LANCHOR159
 	.word	idb_buf
 	.word	.LANCHOR7
 	.word	.LC16
 	.word	.LANCHOR156
 	.word	.LC18
-.L1301:
+.L1287:
 	mov	r2, #512
 	movs	r1, #0
-	ldr	r0, .L1331
+	ldr	r0, .L1317
 	bl	memset
-	ldr	r3, .L1331+4
+	ldr	r3, .L1317+4
 	mov	r0, r4
 	ldr	r3, [r3]
 	ldrb	fp, [r3, #9]	@ zero_extendqisi2
@@ -8996,61 +8880,61 @@ idb_write_data:
 	smulbb	r5, r5, fp
 	uxth	r5, r5
 	cmp	r5, #512
-	bcs	.L1285
+	bcs	.L1271
 	adds	r0, r5, r4
 	bl	FW_FlashBlockErase.constprop.41
-.L1285:
-	ldr	r7, .L1331+8
+.L1271:
+	ldr	r7, .L1317+8
 	mov	r1, r5
-	ldr	r10, .L1331+36
+	ldr	r10, .L1317+36
 	mov	r0, r4
 	bl	__aeabi_uidivmod
 	mov	r6, r1
 	subs	r3, r4, r1
 	str	r3, [sp, #24]
-.L1289:
+.L1275:
 	lsrs	r2, r6, #2
-	beq	.L1286
-	ldr	r0, .L1331+12
+	beq	.L1272
+	ldr	r0, .L1317+12
 	adds	r1, r2, #1
-	ldr	r3, .L1331+16
+	ldr	r3, .L1317+16
 	ldrb	r0, [r0]	@ zero_extendqisi2
 	ldrh	r3, [r3, r1, lsl #1]
-	cbz	r0, .L1287
+	cbz	r0, .L1273
 	ldr	r0, [r10]
-	ldr	r5, .L1331+20
+	ldr	r5, .L1317+20
 	cmp	r0, r5
 	it	eq
 	moveq	r3, r1
-.L1287:
+.L1273:
 	add	r3, r3, #1073741824
 	subs	r3, r3, #1
 	lsls	r3, r3, #2
 	str	r3, [sp, #40]
-.L1286:
+.L1272:
 	movw	r3, #61424
 	str	r3, [sp, #44]
-	ldr	r3, .L1331+16
+	ldr	r3, .L1317+16
 	ldrh	r5, [r3, r2, lsl #1]
-	ldr	r3, .L1331+12
+	ldr	r3, .L1317+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1288
+	cbz	r3, .L1274
 	ldr	r3, [r10]
-	ldr	r1, .L1331+20
+	ldr	r1, .L1317+20
 	cmp	r3, r1
 	it	eq
 	moveq	r5, r2
-.L1288:
+.L1274:
 	ldr	r3, [sp, #24]
 	adds	r6, r6, #4
-	ldr	r2, .L1331+24
-	ldr	r8, .L1331+4
+	ldr	r2, .L1317+24
+	ldr	r8, .L1317+4
 	mla	r3, r5, fp, r3
 	adds	r5, r5, #1
 	uxth	r5, r5
 	str	r3, [sp, #32]
 	ldrb	r3, [r2]	@ zero_extendqisi2
-	ldr	r2, .L1331+28
+	ldr	r2, .L1317+28
 	str	r3, [sp, #28]
 	ldrb	r0, [r2]	@ zero_extendqisi2
 	bl	FlashBchSel
@@ -9078,12 +8962,12 @@ idb_write_data:
 	mov	r1, r0
 	movs	r0, #0
 	bl	FlashPageProgMsbFFData
-	ldr	r3, .L1331+32
+	ldr	r3, .L1317+32
 	cmp	r7, r3
-	bne	.L1289
+	bne	.L1275
 	ldr	r3, [r8]
 	mov	r0, r4
-	ldr	r7, .L1331
+	ldr	r7, .L1317
 	movs	r6, #0
 	ldrb	r8, [r3, #9]	@ zero_extendqisi2
 	ldrh	r1, [r3, #10]
@@ -9095,47 +8979,47 @@ idb_write_data:
 	subs	r3, r4, r1
 	str	r3, [sp, #28]
 	ubfx	r5, r5, #2, #2
-.L1290:
+.L1276:
 	cmp	r6, #512
-	bcs	.L1297
-	ldr	r1, .L1331+12
+	bcs	.L1283
+	ldr	r1, .L1317+12
 	rsb	r3, r5, #4
 	uxth	r3, r3
-	ldr	r2, .L1331+16
+	ldr	r2, .L1317+16
 	ldrb	r1, [r1]	@ zero_extendqisi2
 	str	r3, [sp, #24]
 	add	r3, r10, r6
 	lsrs	r3, r3, #2
 	ldrh	r2, [r2, r3, lsl #1]
-	cbz	r1, .L1291
-	ldr	r1, .L1331+36
-	ldr	r0, .L1331+20
+	cbz	r1, .L1277
+	ldr	r1, .L1317+36
+	ldr	r0, .L1317+20
 	ldr	r1, [r1]
 	cmp	r1, r0
 	it	eq
 	moveq	r2, r3
-.L1291:
+.L1277:
 	ldr	r3, [sp, #28]
 	add	r5, r5, r3
-	ldr	r3, .L1331+24
+	ldr	r3, .L1317+24
 	mla	r5, r2, r8, r5
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r3, [sp, #32]
-	ldr	r3, .L1331+4
+	ldr	r3, .L1317+4
 	ldr	r3, [r3]
 	ldrb	fp, [r3, #9]	@ zero_extendqisi2
-	ldr	r3, .L1331+40
+	ldr	r3, .L1317+40
 	ldrh	r2, [r3, #26]
-	ldr	r3, .L1331+44
+	ldr	r3, .L1317+44
 	ldr	r3, [r3]
 	muls	r3, r2, r3
 	mul	r3, fp, r3
 	cmp	r5, r3
-	bcs	.L1292
-	ldr	r3, .L1331+28
+	bcs	.L1278
+	ldr	r3, .L1317+28
 	ldrb	r0, [r3]	@ zero_extendqisi2
 	bl	FlashBchSel
-.L1292:
+.L1278:
 	movs	r0, #0
 	bl	flash_boot_enter_slc_mode
 	mov	r1, fp
@@ -9149,11 +9033,11 @@ idb_write_data:
 	bl	FlashReadPage
 	adds	r3, r0, #1
 	mov	r5, r0
-	bne	.L1293
-	ldr	r3, .L1331+28
+	bne	.L1279
+	ldr	r3, .L1317+28
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #40
-	beq	.L1293
+	beq	.L1279
 	movs	r0, #40
 	bl	FlashBchSel
 	add	r3, sp, #40
@@ -9162,7 +9046,7 @@ idb_write_data:
 	movs	r0, #0
 	bl	FlashReadPage
 	mov	r5, r0
-.L1293:
+.L1279:
 	movs	r0, #0
 	bl	flash_boot_exit_slc_mode
 	ldr	r0, [sp, #32]
@@ -9171,63 +9055,63 @@ idb_write_data:
 	mov	r5, #-1
 	it	ne
 	movne	r5, #0
-	cbz	r5, .L1294
-.L1297:
-	ldr	r3, .L1331+8
+	cbz	r5, .L1280
+.L1283:
+	ldr	r3, .L1317+8
 	movs	r5, #0
-	ldr	r6, .L1331
-.L1295:
+	ldr	r6, .L1317
+.L1281:
 	mov	r7, r3
 	ldr	r1, [r6, r5, lsl #2]
 	ldr	r2, [r7]
 	adds	r3, r3, #4
 	cmp	r1, r2
-	beq	.L1298
+	beq	.L1284
 	mov	r2, #512
 	movs	r1, #0
-	ldr	r0, .L1331
+	ldr	r0, .L1317
 	bl	memset
 	str	r5, [sp]
 	mov	r1, r4
 	ldr	r3, [r7]
 	ldr	r2, [r6, r5, lsl #2]
-	ldr	r0, .L1331+48
+	ldr	r0, .L1317+48
 	bl	printf
 	mov	r0, r4
 	bl	FW_FlashBlockErase.constprop.41
 	ldr	r3, [sp, #20]
 	cmp	r3, #1
-	bls	.L1299
+	bls	.L1285
 	ldr	r3, [sp, #8]
 	adds	r0, r3, r4
 	bl	FW_FlashBlockErase.constprop.41
-.L1299:
+.L1285:
 	ldr	r3, [sp, #16]
 	ldr	r2, [sp, #20]
 	add	r3, r3, r2
 	str	r3, [sp, #16]
 	ldr	r3, [sp, #36]
 	add	r4, r4, r3
-	b	.L1284
-.L1294:
+	b	.L1270
+.L1280:
 	ldr	r3, [sp, #24]
 	add	r6, r6, r3
 	add	r7, r7, r3, lsl #9
 	uxth	r6, r6
-	b	.L1290
-.L1298:
+	b	.L1276
+.L1284:
 	adds	r5, r5, #1
 	cmp	r5, #65536
-	bne	.L1295
+	bne	.L1281
 	ldr	r3, [sp, #12]
 	adds	r3, r3, #1
 	cmp	r3, #5
 	str	r3, [sp, #12]
-	bls	.L1299
-	b	.L1303
-.L1332:
+	bls	.L1285
+	b	.L1289
+.L1318:
 	.align	2
-.L1331:
+.L1317:
 	.word	gp_flash_check_buf
 	.word	.LANCHOR7
 	.word	idb_buf
@@ -9255,15 +9139,15 @@ ftl_memcpy32:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	movs	r3, #0
 	push	{r4, lr}
-.L1334:
+.L1320:
 	cmp	r3, r2
-	bne	.L1335
+	bne	.L1321
 	pop	{r4, pc}
-.L1335:
+.L1321:
 	ldr	r4, [r1, r3, lsl #2]
 	str	r4, [r0, r3, lsl #2]
 	adds	r3, r3, #1
-	b	.L1334
+	b	.L1320
 	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.ftl_memcmp,"ax",%progbits
 	.align	1
@@ -9291,11 +9175,11 @@ rknand_get_clk_rate:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r0, .L1338
+	ldr	r0, .L1324
 	bx	lr
-.L1339:
+.L1325:
 	.align	2
-.L1338:
+.L1324:
 	.word	148000000
 	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
 	.section	.text.ftl_malloc,"ax",%progbits
@@ -9326,9 +9210,9 @@ NandcInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r2, #1
-	ldr	r3, .L1343
+	ldr	r3, .L1329
 	movs	r4, #0
-	ldr	r5, .L1343+4
+	ldr	r5, .L1329+4
 	str	r2, [r3, #12]
 	movs	r2, #2
 	str	r2, [r3, #20]
@@ -9338,8 +9222,8 @@ NandcInit:
 	str	r0, [r3, #16]
 	str	r2, [r3, #28]
 	str	r0, [r3, #24]
-	ldr	r3, .L1343+8
-	ldr	r2, .L1343+12
+	ldr	r3, .L1329+8
+	ldr	r2, .L1329+12
 	str	r0, [r3]
 	ldr	r3, [r0]
 	and	r3, r3, #253952
@@ -9348,7 +9232,7 @@ NandcInit:
 	str	r1, [r2]
 	orr	r3, r3, #256
 	ldr	r2, [r0, #352]
-	ldr	r1, .L1343+16
+	ldr	r1, .L1329+16
 	ubfx	r2, r2, #16, #4
 	str	r2, [r1]
 	ldr	r2, [r0, #352]
@@ -9364,23 +9248,23 @@ NandcInit:
 	str	r3, [r0, #4]
 	movw	r3, #8322
 	str	r3, [r0, #344]
-	ldr	r3, .L1343+20
+	ldr	r3, .L1329+20
 	str	r3, [r0, #304]
 	mov	r0, #36864
 	bl	ftl_malloc
-	ldr	r3, .L1343+24
+	ldr	r3, .L1329+24
 	str	r0, [r3]
-	ldr	r3, .L1343+28
+	ldr	r3, .L1329+28
 	str	r0, [r3]
 	add	r0, r0, #32768
 	str	r0, [r3, #4]
 	str	r4, [r3, #24]
-	ldr	r3, .L1343+32
+	ldr	r3, .L1329+32
 	str	r4, [r3]
 	pop	{r3, r4, r5, pc}
-.L1344:
+.L1330:
 	.align	2
-.L1343:
+.L1329:
 	.word	.LANCHOR0
 	.word	.LANCHOR122
 	.word	.LANCHOR19
@@ -9402,83 +9286,83 @@ NandcInit:
 FtlMemInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1351
+	ldr	r3, .L1337
 	movs	r0, #128
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r2, .L1351+4
+	ldr	r2, .L1337+4
 	movs	r6, #12
 	movs	r7, #36
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L1351+8
-	ldr	r5, .L1351+12
-	ldr	fp, .L1351+320
+	ldr	r3, .L1337+8
+	ldr	r5, .L1337+12
+	ldr	fp, .L1337+320
 	str	r4, [r3]
-	ldr	r3, .L1351+16
+	ldr	r3, .L1337+16
 	str	r4, [r3]
-	ldr	r3, .L1351+20
+	ldr	r3, .L1337+20
 	str	r4, [r3]
-	ldr	r3, .L1351+24
+	ldr	r3, .L1337+24
 	str	r4, [r3]
-	ldr	r3, .L1351+28
+	ldr	r3, .L1337+28
 	str	r4, [r3]
-	ldr	r3, .L1351+32
+	ldr	r3, .L1337+32
 	str	r4, [r3]
-	ldr	r3, .L1351+36
+	ldr	r3, .L1337+36
 	str	r4, [r3]
-	ldr	r3, .L1351+40
+	ldr	r3, .L1337+40
 	str	r4, [r3]
-	ldr	r3, .L1351+44
+	ldr	r3, .L1337+44
 	str	r4, [r3]
-	ldr	r3, .L1351+48
+	ldr	r3, .L1337+48
 	str	r4, [r3]
-	ldr	r3, .L1351+52
+	ldr	r3, .L1337+52
 	str	r4, [r3]
-	ldr	r3, .L1351+56
+	ldr	r3, .L1337+56
 	str	r4, [r3]
-	ldr	r3, .L1351+60
+	ldr	r3, .L1337+60
 	str	r4, [r3]
-	ldr	r3, .L1351+64
+	ldr	r3, .L1337+64
 	str	r4, [r3]
-	ldr	r3, .L1351+68
+	ldr	r3, .L1337+68
 	str	r4, [r3]
-	ldr	r3, .L1351+72
+	ldr	r3, .L1337+72
 	str	r4, [r3]
-	ldr	r3, .L1351+76
+	ldr	r3, .L1337+76
 	str	r4, [r3]
 	movw	r3, #65535
 	str	r3, [r2]
-	ldr	r2, .L1351+80
+	ldr	r2, .L1337+80
 	str	r4, [r2]
-	ldr	r2, .L1351+84
+	ldr	r2, .L1337+84
 	str	r4, [r2]
-	ldr	r2, .L1351+88
+	ldr	r2, .L1337+88
 	str	r4, [r2]
-	ldr	r2, .L1351+92
+	ldr	r2, .L1337+92
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L1351+96
+	ldr	r2, .L1337+96
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L1351+100
+	ldr	r2, .L1337+100
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L1351+104
+	ldr	r2, .L1337+104
 	strh	r3, [r2]	@ movhi
 	movs	r2, #32
-	ldr	r3, .L1351+108
+	ldr	r3, .L1337+108
 	strh	r2, [r3]	@ movhi
-	ldr	r3, .L1351+112
+	ldr	r3, .L1337+112
 	strh	r0, [r3]	@ movhi
-	ldr	r3, .L1351+116
+	ldr	r3, .L1337+116
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L1351+120
+	ldr	r3, .L1337+120
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L1351+124
+	ldr	r3, .L1337+124
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L1351+128
+	ldr	r3, .L1337+128
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L1351+132
+	ldr	r3, .L1337+132
 	ldrh	r1, [r3]
 	bl	__aeabi_idiv
-	ldr	r2, .L1351+136
+	ldr	r2, .L1337+136
 	str	r0, [r5]
 	ldrh	r3, [r2]
 	mov	r8, r2
@@ -9486,48 +9370,48 @@ FtlMemInit:
 	cmp	r0, r3
 	it	hi
 	strhi	r3, [r5]
-	ldr	r3, .L1351+140
+	ldr	r3, .L1337+140
 	str	r4, [r3]
-	ldr	r4, .L1351+144
+	ldr	r4, .L1337+144
 	ldrh	r0, [r4]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L1351+148
+	ldr	r3, .L1337+148
 	str	r0, [r3]
 	ldrh	r0, [r4]
 	muls	r0, r6, r0
 	bl	ftl_malloc
 	ldrh	r4, [r8]
-	ldr	r3, .L1351+152
+	ldr	r3, .L1337+152
 	muls	r4, r7, r4
 	str	r0, [r3]
 	lsl	r10, r4, #2
 	mov	r0, r10
 	bl	ftl_malloc
-	ldr	r3, .L1351+156
+	ldr	r3, .L1337+156
 	str	r0, [r3]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L1351+160
+	ldr	r3, .L1337+160
 	str	r0, [r3]
 	mov	r0, r10
 	bl	ftl_malloc
-	ldr	r3, .L1351+164
-	ldr	r10, .L1351+324
+	ldr	r3, .L1337+164
+	ldr	r10, .L1337+324
 	str	r0, [r3]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L1351+168
+	ldr	r3, .L1337+168
 	str	r0, [r3]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L1351+172
+	ldr	r3, .L1337+172
 	str	r0, [r3]
 	ldr	r0, [r5]
 	muls	r0, r7, r0
-	ldr	r7, .L1351+176
+	ldr	r7, .L1337+176
 	bl	ftl_malloc
-	ldr	r3, .L1351+180
+	ldr	r3, .L1337+180
 	ldrh	r4, [r7]
 	str	r0, [r3]
 	ldrh	r3, [r8]
@@ -9536,156 +9420,156 @@ FtlMemInit:
 	adds	r3, r3, #1
 	str	r3, [r10]
 	bl	ftl_malloc
-	ldr	r3, .L1351+184
+	ldr	r3, .L1337+184
 	str	r0, [r3]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L1351+188
+	ldr	r3, .L1337+188
 	str	r0, [r3]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L1351+192
+	ldr	r3, .L1337+192
 	str	r0, [r3]
 	ldr	r0, [r10]
 	muls	r0, r4, r0
 	bl	ftl_malloc
-	ldr	r3, .L1351+196
+	ldr	r3, .L1337+196
 	str	r0, [r3]
 	ldr	r0, [r5]
 	muls	r0, r4, r0
 	bl	ftl_malloc
-	ldr	r3, .L1351+200
+	ldr	r3, .L1337+200
 	str	r0, [r3]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L1351+204
+	ldr	r3, .L1337+204
 	str	r0, [r3]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L1351+208
+	ldr	r3, .L1337+208
 	str	r0, [r3]
 	ldr	r0, [r10]
 	muls	r0, r6, r0
 	bl	ftl_malloc
-	ldr	r3, .L1351+212
+	ldr	r3, .L1337+212
 	ldrh	r4, [r8]
-	ldr	r8, .L1351+328
+	ldr	r8, .L1337+328
 	str	r0, [r3]
 	ldrh	r3, [fp]
 	muls	r4, r3, r4
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L1351+216
+	ldr	r3, .L1337+216
 	str	r0, [r3]
 	lsls	r0, r4, #2
-	ldr	r4, .L1351+220
+	ldr	r4, .L1337+220
 	bl	ftl_malloc
-	ldr	r3, .L1351+224
+	ldr	r3, .L1337+224
 	str	r0, [r3]
 	ldrh	r3, [fp]
 	ldr	r0, [r10]
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L1351+228
+	ldr	r3, .L1337+228
 	str	r0, [r3]
 	ldrh	r3, [fp]
 	ldr	r0, [r5]
-	ldr	r5, .L1351+232
+	ldr	r5, .L1337+232
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L1351+236
+	ldr	r3, .L1337+236
 	str	r0, [r3]
 	ldrh	r0, [r4]
 	lsls	r0, r0, #1
 	uxth	r0, r0
 	strh	r0, [r5]	@ movhi
 	bl	ftl_malloc
-	ldr	r3, .L1351+240
+	ldr	r3, .L1337+240
 	str	r0, [r3]
 	ldrh	r3, [r5]
-	ldr	r0, .L1351+244
+	ldr	r0, .L1337+244
 	addw	r3, r3, #547
 	lsrs	r3, r3, #9
 	and	r0, r0, r3, lsl #9
 	strh	r3, [r5]	@ movhi
 	bl	ftl_malloc
-	ldr	r3, .L1351+248
+	ldr	r3, .L1337+248
 	str	r0, [r3]
 	adds	r0, r0, #32
-	ldr	r3, .L1351+252
+	ldr	r3, .L1337+252
 	str	r0, [r3]
 	ldrh	r0, [r4]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
 	ldr	r5, [r8]
-	ldr	r3, .L1351+256
+	ldr	r3, .L1337+256
 	lsls	r5, r5, #1
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1351+260
+	ldr	r3, .L1337+260
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1351+264
-	ldr	r5, .L1351+268
+	ldr	r3, .L1337+264
+	ldr	r5, .L1337+268
 	str	r0, [r3]
 	ldrh	r0, [r4]
 	lsrs	r0, r0, #3
 	adds	r0, r0, #4
 	bl	ftl_malloc
-	ldr	r3, .L1351+272
+	ldr	r3, .L1337+272
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L1351+276
+	ldr	r3, .L1337+276
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L1351+280
+	ldr	r3, .L1337+280
 	str	r0, [r3]
 	ldrh	r0, [r5]
-	ldr	r5, .L1351+284
+	ldr	r5, .L1337+284
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L1351+288
+	ldr	r3, .L1337+288
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
 	ldrh	r2, [r5]
 	movs	r1, #0
-	ldr	r3, .L1351+292
+	ldr	r3, .L1337+292
 	lsls	r2, r2, #2
 	str	r0, [r3]
 	bl	ftl_memset
-	ldr	r3, .L1351+296
+	ldr	r3, .L1337+296
 	ldrh	r5, [r3]
 	lsls	r5, r5, #2
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1351+300
+	ldr	r3, .L1337+300
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1351+304
-	ldr	r5, .L1351+308
+	ldr	r3, .L1337+304
+	ldr	r5, .L1337+308
 	str	r0, [r3]
 	ldr	r0, [r8]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L1351+312
+	ldr	r3, .L1337+312
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	muls	r0, r6, r0
-	ldr	r6, .L1351+316
+	ldr	r6, .L1337+316
 	bl	ftl_malloc
-	b	.L1352
-.L1353:
+	b	.L1338
+.L1339:
 	.align	2
-.L1351:
+.L1337:
 	.word	.LANCHOR142
 	.word	.LANCHOR178
 	.word	.LANCHOR162
@@ -9769,23 +9653,23 @@ FtlMemInit:
 	.word	.LANCHOR58
 	.word	.LANCHOR110
 	.word	.LANCHOR64
-.L1352:
-	ldr	r3, .L1354
+.L1338:
+	ldr	r3, .L1340
 	str	r0, [r3]
 	ldrh	r3, [r5]
 	ldrh	r0, [r7]
-	ldr	r5, .L1354+4
+	ldr	r5, .L1340+4
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L1354+8
+	ldr	r3, .L1340+8
 	str	r0, [r3]
 	movs	r0, #6
 	ldrh	r3, [r4]
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L1354+12
+	ldr	r3, .L1340+12
 	str	r0, [r3]
-	ldr	r3, .L1354+16
+	ldr	r3, .L1340+16
 	ldrh	r0, [r3]
 	ldrh	r3, [r6]
 	adds	r0, r0, #31
@@ -9796,37 +9680,37 @@ FtlMemInit:
 	bl	ftl_malloc
 	ldrh	r1, [r5]
 	movs	r2, #1
-	ldr	r3, .L1354+20
+	ldr	r3, .L1340+20
 	ldrh	r6, [r6]
 	lsls	r1, r1, #2
 	mov	r4, r3
 	str	r0, [r4, #28]!
 	mov	r0, r1
-.L1347:
+.L1333:
 	cmp	r2, r6
-	bcc	.L1348
+	bcc	.L1334
 	add	r3, r3, r2, lsl #2
-	ldr	r2, .L1354+24
+	ldr	r2, .L1340+24
 	movs	r1, #0
 	adds	r3, r3, #24
-.L1349:
+.L1335:
 	cmp	r3, r2
-	bne	.L1350
+	bne	.L1336
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1348:
+.L1334:
 	ldr	r5, [r3, #28]
 	adds	r2, r2, #1
 	add	r5, r5, r0
 	add	r0, r0, r1
 	str	r5, [r4, #4]!
-	b	.L1347
-.L1350:
+	b	.L1333
+.L1336:
 	str	r1, [r3, #4]!
-	b	.L1349
-.L1355:
+	b	.L1335
+.L1341:
 	.align	2
-.L1354:
+.L1340:
 	.word	.LANCHOR98
 	.word	.LANCHOR126
 	.word	.LANCHOR129
@@ -9889,12 +9773,12 @@ rk_ftl_get_capacity:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L1360
+	ldr	r3, .L1346
 	ldr	r0, [r3]
 	bx	lr
-.L1361:
+.L1347:
 	.align	2
-.L1360:
+.L1346:
 	.word	.LANCHOR68
 	.size	rk_ftl_get_capacity, .-rk_ftl_get_capacity
 	.section	.text.rknand_print_hex,"ax",%progbits
@@ -9910,51 +9794,51 @@ rknand_print_hex:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r5, #0
-	ldr	r7, .L1371
+	ldr	r7, .L1357
 	mov	fp, r0
 	mov	r6, r1
 	mov	r8, r2
 	mov	r10, r3
 	mov	r4, r5
-.L1363:
+.L1349:
 	cmp	r4, r10
-	bne	.L1369
-	ldr	r1, .L1371+4
-	ldr	r0, .L1371+8
+	bne	.L1355
+	ldr	r1, .L1357+4
+	ldr	r0, .L1357+8
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
 	b	printf
-.L1369:
-	cbnz	r5, .L1364
+.L1355:
+	cbnz	r5, .L1350
 	mov	r2, r4
 	mov	r1, fp
-	ldr	r0, .L1371+12
+	ldr	r0, .L1357+12
 	bl	printf
-.L1364:
+.L1350:
 	cmp	r8, #4
-	bne	.L1365
+	bne	.L1351
 	ldr	r1, [r6, r4, lsl #2]
-.L1370:
+.L1356:
 	mov	r0, r7
 	adds	r5, r5, #1
 	bl	printf
 	cmp	r5, #15
-	bls	.L1368
+	bls	.L1354
 	movs	r5, #0
-	ldr	r1, .L1371+4
-	ldr	r0, .L1371+8
+	ldr	r1, .L1357+4
+	ldr	r0, .L1357+8
 	bl	printf
-.L1368:
+.L1354:
 	adds	r4, r4, #1
-	b	.L1363
-.L1365:
+	b	.L1349
+.L1351:
 	cmp	r8, #2
 	ite	eq
 	ldrsheq	r1, [r6, r4, lsl #1]
 	ldrbne	r1, [r6, r4]	@ zero_extendqisi2
-	b	.L1370
-.L1372:
+	b	.L1356
+.L1358:
 	.align	2
-.L1371:
+.L1357:
 	.word	.LC20
 	.word	.LC21
 	.word	.LC7
@@ -9973,7 +9857,7 @@ HynixGetReadRetryDefault:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #172
-	ldr	r5, .L1491
+	ldr	r5, .L1477
 	cmp	r0, #2
 	mov	r1, #173
 	mov	r2, #174
@@ -9985,19 +9869,19 @@ HynixGetReadRetryDefault:
 	strb	r1, [r5, #5]
 	strb	r2, [r5, #6]
 	strb	r3, [r5, #7]
-	bne	.L1374
+	bne	.L1360
 	movs	r3, #167
 	mov	fp, #7
 	strb	r3, [r5, #4]
 	movs	r2, #247
-	ldr	r3, .L1491+4
+	ldr	r3, .L1477+4
 	strb	r2, [r3, #17]
-.L1484:
+.L1470:
 	mov	r10, #4
-	b	.L1375
-.L1374:
+	b	.L1361
+.L1360:
 	cmp	r0, #3
-	bne	.L1376
+	bne	.L1362
 	movs	r3, #176
 	strb	r3, [r5, #4]
 	movs	r3, #177
@@ -10013,31 +9897,31 @@ HynixGetReadRetryDefault:
 	movs	r3, #182
 	strb	r3, [r5, #10]
 	movs	r3, #183
-.L1485:
+.L1471:
 	mov	fp, #8
 	strb	r3, [r5, #11]
 	mov	r10, fp
-.L1375:
+.L1361:
 	subs	r3, r4, #1
 	cmp	r3, #1
-	bhi	.L1381
+	bhi	.L1367
 	mov	r8, #0
-.L1382:
-	ldr	r3, .L1491+8
+.L1368:
+	ldr	r3, .L1477+8
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	uxtb	r3, r8
 	cmp	r2, r3
-	bhi	.L1388
-.L1389:
-	ldr	r3, .L1491
+	bhi	.L1374
+.L1375:
+	ldr	r3, .L1477
 	strb	r10, [r3, #1]
 	strb	fp, [r3, #2]
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1376:
+.L1362:
 	cmp	r0, #4
-	bne	.L1377
+	bne	.L1363
 	movs	r0, #204
 	strb	r1, [r5, #9]
 	strb	r0, [r5, #4]
@@ -10050,10 +9934,10 @@ HynixGetReadRetryDefault:
 	movs	r0, #205
 	strb	r0, [r5, #8]
 	strb	r2, [r5, #10]
-	b	.L1485
-.L1377:
+	b	.L1471
+.L1363:
 	cmp	r0, #5
-	bne	.L1378
+	bne	.L1364
 	movs	r3, #56
 	mov	fp, #8
 	strb	r3, [r5, #4]
@@ -10063,10 +9947,10 @@ HynixGetReadRetryDefault:
 	strb	r3, [r5, #6]
 	movs	r3, #59
 	strb	r3, [r5, #7]
-	b	.L1484
-.L1378:
+	b	.L1470
+.L1364:
 	cmp	r0, #6
-	bne	.L1379
+	bne	.L1365
 	movs	r3, #14
 	mov	fp, #12
 	strb	r3, [r5, #4]
@@ -10076,10 +9960,10 @@ HynixGetReadRetryDefault:
 	strb	r3, [r5, #6]
 	movs	r3, #17
 	strb	r3, [r5, #7]
-	b	.L1484
-.L1379:
+	b	.L1470
+.L1365:
 	cmp	r0, #7
-	bne	.L1380
+	bne	.L1366
 	movs	r3, #176
 	mov	fp, #12
 	strb	r3, [r5, #4]
@@ -10102,11 +9986,11 @@ HynixGetReadRetryDefault:
 	movs	r3, #213
 	strb	r3, [r5, #13]
 	mov	r10, #10
-	b	.L1375
-.L1380:
+	b	.L1361
+.L1366:
 	cmp	r0, #8
 	mov	r3, #7
-	bne	.L1439
+	bne	.L1425
 	strb	r3, [r5, #5]
 	movs	r3, #9
 	movs	r2, #6
@@ -10117,15 +10001,15 @@ HynixGetReadRetryDefault:
 	mov	fp, #50
 	strb	r3, [r5, #8]
 	mov	r10, #5
-	b	.L1375
-.L1439:
+	b	.L1361
+.L1425:
 	mov	fp, r3
-	b	.L1484
-.L1388:
-	ldr	r2, .L1491+12
+	b	.L1470
+.L1374:
+	ldr	r2, .L1477+12
 	movs	r6, #0
 	ldrb	r2, [r2, r3]	@ zero_extendqisi2
-	ldr	r3, .L1491+16
+	ldr	r3, .L1477+16
 	ldr	r7, [r3, r2, lsl #3]
 	add	r4, r5, r2, lsl #6
 	add	r3, r3, r2, lsl #3
@@ -10134,7 +10018,7 @@ HynixGetReadRetryDefault:
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
 	add	r7, r7, r3, lsl #8
 	addw	r3, r7, #2056
-.L1383:
+.L1369:
 	adds	r1, r5, r6
 	str	r2, [r3]
 	ldrb	r1, [r1, #4]	@ zero_extendqisi2
@@ -10150,25 +10034,25 @@ HynixGetReadRetryDefault:
 	adds	r6, r6, #1
 	uxtb	r1, r6
 	cmp	r10, r1
-	bhi	.L1383
-	ldr	r7, .L1491+4
+	bhi	.L1369
+	ldr	r7, .L1477+4
 	mov	r1, r4
 	movs	r2, #0
-.L1386:
+.L1372:
 	movs	r3, #1
 	adds	r6, r7, r2
-.L1385:
+.L1371:
 	ldrb	r0, [r6, r3, lsl #2]	@ zero_extendqisi2
 	ldrb	ip, [r1]	@ zero_extendqisi2
 	add	r0, r0, ip
 	strb	r0, [r1, r3, lsl #3]
 	adds	r3, r3, #1
 	cmp	r3, #7
-	bne	.L1385
+	bne	.L1371
 	adds	r2, r2, #1
 	adds	r1, r1, #1
 	cmp	r2, #4
-	bne	.L1386
+	bne	.L1372
 	movs	r3, #0
 	add	r8, r8, #1
 	strb	r3, [r4, #16]
@@ -10178,11 +10062,11 @@ HynixGetReadRetryDefault:
 	strb	r3, [r4, #48]
 	strb	r3, [r4, #41]
 	strb	r3, [r4, #49]
-	b	.L1382
-.L1381:
+	b	.L1368
+.L1367:
 	subs	r3, r4, #3
 	cmp	r3, #5
-	bhi	.L1389
+	bhi	.L1375
 	smulbb	r3, fp, r10
 	asrs	r2, r3, #1
 	lsls	r3, r3, #4
@@ -10193,19 +10077,19 @@ HynixGetReadRetryDefault:
 	lsls	r3, r2, #1
 	str	r3, [sp, #32]
 	movs	r3, #0
-.L1490:
+.L1476:
 	str	r3, [sp, #28]
 	ldrb	r3, [sp, #28]	@ zero_extendqisi2
 	str	r3, [sp, #16]
-	ldr	r3, .L1491+8
+	ldr	r3, .L1477+8
 	ldr	r2, [sp, #16]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r2
-	bls	.L1389
+	bls	.L1375
 	ldr	r2, [sp, #16]
-	ldr	r3, .L1491+12
+	ldr	r3, .L1477+12
 	ldrb	r8, [r3, r2]	@ zero_extendqisi2
-	ldr	r3, .L1491+16
+	ldr	r3, .L1477+16
 	mov	r0, r8
 	ldr	r2, [r3, r8, lsl #3]
 	add	r3, r3, r8, lsl #3
@@ -10219,12 +10103,12 @@ HynixGetReadRetryDefault:
 	str	r3, [r5, #2056]
 	bl	NandcWaitFlashReady
 	cmp	r4, #7
-	bne	.L1391
-	ldr	r3, .L1491
+	bne	.L1377
+	ldr	r3, .L1477
 	movs	r0, #160
 	mla	r0, r0, r8, r3
 	add	r3, r0, #28
-.L1486:
+.L1472:
 	ldr	r2, [sp, #4]
 	cmp	r4, #4
 	str	r3, [sp, #20]
@@ -10232,42 +10116,42 @@ HynixGetReadRetryDefault:
 	add	r3, r3, r2, lsl #8
 	mov	r2, #54
 	str	r2, [r3, #2056]
-	bne	.L1394
+	bne	.L1380
 	movs	r2, #255
 	str	r2, [r3, #2052]
 	movs	r2, #64
 	str	r2, [r3, #2048]
 	movs	r2, #204
-.L1487:
+.L1473:
 	str	r2, [r3, #2052]
 	movs	r2, #77
-	b	.L1488
-.L1391:
+	b	.L1474
+.L1377:
 	cmp	r4, #8
-	beq	.L1393
-	ldr	r0, .L1491
+	beq	.L1379
+	ldr	r0, .L1477
 	add	r0, r0, r8, lsl #6
 	add	r3, r0, #20
-	b	.L1486
-.L1492:
+	b	.L1472
+.L1478:
 	.align	2
-.L1491:
+.L1477:
 	.word	.LANCHOR20
 	.word	.LANCHOR204
 	.word	.LANCHOR26
 	.word	.LANCHOR27
 	.word	.LANCHOR0
-.L1394:
+.L1380:
 	subs	r2, r4, #5
 	cmp	r2, #1
-	bhi	.L1396
-	ldr	r2, .L1493
+	bhi	.L1382
+	ldr	r2, .L1479
 	ldrb	r2, [r2, #4]	@ zero_extendqisi2
 	str	r2, [r3, #2052]
 	movs	r2, #82
-.L1488:
+.L1474:
 	str	r2, [r3, #2048]
-.L1395:
+.L1381:
 	ldr	r2, [sp, #4]
 	cmp	r4, #6
 	ldr	r3, [sp]
@@ -10291,7 +10175,7 @@ HynixGetReadRetryDefault:
 	str	r2, [r3, #2052]
 	movs	r2, #0
 	str	r2, [r3, #2052]
-.L1438:
+.L1424:
 	ldr	r2, [sp, #4]
 	mov	r0, r8
 	ldr	r3, [sp]
@@ -10302,15 +10186,15 @@ HynixGetReadRetryDefault:
 	subs	r3, r4, #5
 	cmp	r3, #1
 	str	r3, [sp, #36]
-	bls	.L1441
+	bls	.L1427
 	cmp	r4, #8
-	beq	.L1441
+	beq	.L1427
 	cmp	r4, #7
 	ite	eq
 	moveq	r2, #32
 	movne	r2, #2
-.L1399:
-	ldr	r3, .L1493+4
+.L1385:
+	ldr	r3, .L1479+4
 	subs	r2, r2, #1
 	ldm	sp, {r5, r6}
 	ldr	r3, [r3]
@@ -10319,83 +10203,83 @@ HynixGetReadRetryDefault:
 	uxtab	r2, r3, r2
 	mov	r0, r1
 	str	r5, [sp, #8]
-.L1400:
+.L1386:
 	ldr	r5, [sp, #8]
 	ldr	r5, [r5, #2048]
 	strb	r5, [r0, #1]!
 	cmp	r0, r2
-	bne	.L1400
+	bne	.L1386
 	cmp	r4, #8
-	bne	.L1401
+	bne	.L1387
 	movs	r2, #0
-.L1403:
+.L1389:
 	ldrb	r0, [r3, r2, lsl #2]	@ zero_extendqisi2
 	uxtb	r1, r2
 	cmp	r0, #50
-	beq	.L1402
+	beq	.L1388
 	add	r0, r3, r2, lsl #2
 	ldrb	r0, [r0, #1]	@ zero_extendqisi2
 	cmp	r0, #5
-	beq	.L1402
+	beq	.L1388
 	adds	r2, r2, #1
 	cmp	r2, #8
-	bne	.L1403
-.L1404:
+	bne	.L1389
+.L1390:
 	movs	r1, #0
-	ldr	r0, .L1493+8
+	ldr	r0, .L1479+8
 	bl	printf
-.L1406:
-	b	.L1406
-.L1396:
+.L1392:
+	b	.L1392
+.L1382:
 	cmp	r4, #7
-	bne	.L1395
+	bne	.L1381
 	movs	r2, #174
 	str	r2, [r3, #2052]
 	movs	r2, #0
 	str	r2, [r3, #2048]
 	movs	r2, #176
-	b	.L1487
-.L1441:
+	b	.L1473
+.L1427:
 	movs	r2, #16
-	b	.L1399
-.L1402:
+	b	.L1385
+.L1388:
 	cmp	r1, #6
-	bhi	.L1404
-.L1405:
-	ldr	r3, .L1493+4
+	bhi	.L1390
+.L1391:
+	ldr	r3, .L1479+4
 	ldr	r2, [r3]
 	mov	r3, r2
-.L1415:
+.L1401:
 	ldr	r0, [sp, #48]
 	subs	r1, r3, r2
 	cmp	r1, r0
-	blt	.L1416
-	ldr	r3, .L1493+4
+	blt	.L1402
+	ldr	r3, .L1479+4
 	ldr	r1, [r3]
 	ldr	r3, [sp, #32]
 	adds	r0, r1, r3
 	movs	r3, #8
-.L1418:
+.L1404:
 	mov	r6, r0
 	movs	r5, #0
-.L1417:
+.L1403:
 	ldrh	r7, [r6]
 	adds	r5, r5, #1
 	mvns	r7, r7
 	strh	r7, [r6], #2	@ movhi
 	ldr	r7, [sp, #12]
 	cmp	r7, r5
-	bgt	.L1417
+	bgt	.L1403
 	ldr	r5, [sp, #44]
 	subs	r3, r3, #1
 	add	r0, r0, r5
-	bne	.L1418
+	bne	.L1404
 	mov	r7, r1
 	str	r3, [sp, #24]
-.L1424:
+.L1410:
 	movs	r5, #0
 	mov	r0, r5
-.L1423:
+.L1409:
 	movs	r3, #1
 	mov	ip, #0
 	lsl	r6, r3, r0
@@ -10403,7 +10287,7 @@ HynixGetReadRetryDefault:
 	str	r3, [sp, #40]
 	mov	lr, r6
 	mov	r6, r7
-.L1421:
+.L1407:
 	ldrh	r3, [r6]
 	str	r3, [sp, #52]
 	ldr	r3, [sp, #52]
@@ -10415,7 +10299,7 @@ HynixGetReadRetryDefault:
 	ldr	r3, [sp, #40]
 	subs	r3, r3, #1
 	str	r3, [sp, #40]
-	bne	.L1421
+	bne	.L1407
 	cmp	ip, #8
 	add	r0, r0, #1
 	ittt	hi
@@ -10423,7 +10307,7 @@ HynixGetReadRetryDefault:
 	orrhi	r5, r5, r3
 	uxthhi	r5, r5
 	cmp	r0, #16
-	bne	.L1423
+	bne	.L1409
 	ldr	r3, [sp, #24]
 	strh	r5, [r7], #2	@ movhi
 	adds	r3, r3, #1
@@ -10431,107 +10315,107 @@ HynixGetReadRetryDefault:
 	ldr	r0, [sp, #24]
 	ldr	r3, [sp, #12]
 	cmp	r3, r0
-	bgt	.L1424
+	bgt	.L1410
 	subs	r0, r1, #4
 	add	r5, r1, #28
 	movs	r3, #0
-.L1427:
+.L1413:
 	ldr	r6, [r0, #4]!
-	cbnz	r6, .L1426
+	cbnz	r6, .L1412
 	adds	r3, r3, #1
-.L1426:
+.L1412:
 	cmp	r5, r0
-	bne	.L1427
+	bne	.L1413
 	cmp	r3, #7
-	ble	.L1428
-	ldr	r0, .L1493+12
+	ble	.L1414
+	ldr	r0, .L1479+12
 	mov	r3, #1024
 	movs	r2, #1
 	bl	rknand_print_hex
 	movs	r1, #0
-	ldr	r0, .L1493+8
+	ldr	r0, .L1479+8
 	bl	printf
-.L1429:
-	b	.L1429
-.L1401:
+.L1415:
+	b	.L1415
+.L1387:
 	cmp	r4, #7
-	bne	.L1407
+	bne	.L1393
 	movs	r2, #0
-.L1409:
+.L1395:
 	ldrb	r0, [r3, r2, lsl #2]	@ zero_extendqisi2
 	uxtb	r1, r2
 	cmp	r0, #12
-	beq	.L1408
+	beq	.L1394
 	add	r0, r3, r2, lsl #2
 	ldrb	r0, [r0, #1]	@ zero_extendqisi2
 	cmp	r0, #10
-	beq	.L1408
+	beq	.L1394
 	adds	r2, r2, #1
 	cmp	r2, #8
-	bne	.L1409
-.L1410:
+	bne	.L1395
+.L1396:
 	movs	r1, #0
-	ldr	r0, .L1493+8
+	ldr	r0, .L1479+8
 	bl	printf
-.L1411:
-	b	.L1411
-.L1408:
+.L1397:
+	b	.L1397
+.L1394:
 	cmp	r1, #6
-	bls	.L1405
-	b	.L1410
-.L1407:
+	bls	.L1391
+	b	.L1396
+.L1393:
 	cmp	r4, #6
-	bne	.L1405
+	bne	.L1391
 	adds	r3, r3, #7
-.L1412:
+.L1398:
 	ldrb	r2, [r1, #1]!	@ zero_extendqisi2
 	cmp	r2, #12
-	beq	.L1405
+	beq	.L1391
 	ldrb	r2, [r1, #8]	@ zero_extendqisi2
 	cmp	r2, #4
-	beq	.L1405
+	beq	.L1391
 	cmp	r1, r3
-	bne	.L1412
+	bne	.L1398
 	movs	r1, #0
-	ldr	r0, .L1493+8
+	ldr	r0, .L1479+8
 	bl	printf
-.L1414:
-	b	.L1414
-.L1416:
+.L1400:
+	b	.L1400
+.L1402:
 	ldr	r1, [sp, #8]
 	ldr	r1, [r1, #2048]
 	strb	r1, [r3], #1
-	b	.L1415
-.L1428:
+	b	.L1401
+.L1414:
 	cmp	r4, #6
-	beq	.L1443
+	beq	.L1429
 	cmp	r4, #7
-	beq	.L1444
+	beq	.L1430
 	cmp	r4, #8
 	ite	eq
 	moveq	r6, #5
 	movne	r6, #8
-.L1430:
+.L1416:
 	add	r3, r10, #-1
 	ldr	r0, [sp, #20]
 	uxtb	r3, r3
 	movs	r5, #0
 	adds	r3, r3, #1
-.L1431:
+.L1417:
 	mov	ip, r0
 	mov	r1, r2
-.L1432:
+.L1418:
 	ldrb	r7, [r1], #1	@ zero_extendqisi2
 	strb	r7, [ip], #1
 	subs	r7, r1, r2
 	uxtb	r7, r7
 	cmp	r10, r7
-	bhi	.L1432
+	bhi	.L1418
 	adds	r5, r5, #1
 	add	r2, r2, r3
 	cmp	fp, r5
 	add	r0, r0, r6
-	bgt	.L1431
+	bgt	.L1417
 	ldr	r3, [sp]
 	mov	r0, r8
 	ldr	r2, [sp, #4]
@@ -10541,12 +10425,12 @@ HynixGetReadRetryDefault:
 	bl	NandcWaitFlashReady
 	ldr	r3, [sp, #36]
 	cmp	r3, #1
-	bhi	.L1434
+	bhi	.L1420
 	movs	r3, #54
 	ldr	r2, [sp, #8]
 	str	r3, [r5, #2056]
 	mov	r1, #-1
-	ldr	r3, .L1493
+	ldr	r3, .L1479
 	ldr	r0, [sp, #16]
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
 	str	r3, [r2, #2052]
@@ -10555,26 +10439,26 @@ HynixGetReadRetryDefault:
 	movs	r3, #22
 	str	r3, [r5, #2056]
 	bl	FlashReadCmd
-.L1435:
+.L1421:
 	mov	r0, r8
 	bl	NandcWaitFlashReady
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
-	b	.L1490
-.L1443:
+	b	.L1476
+.L1429:
 	movs	r6, #4
-	b	.L1430
-.L1444:
+	b	.L1416
+.L1430:
 	movs	r6, #10
-	b	.L1430
-.L1434:
+	b	.L1416
+.L1420:
 	cmp	r4, #8
 	ite	eq
 	moveq	r3, #190
 	movne	r3, #56
 	str	r3, [r5, #2056]
-	b	.L1435
-.L1393:
+	b	.L1421
+.L1379:
 	movs	r3, #120
 	movs	r2, #23
 	str	r3, [r5, #2056]
@@ -10596,12 +10480,12 @@ HynixGetReadRetryDefault:
 	str	r1, [r5, #2052]
 	str	r2, [r5, #2052]
 	str	r3, [r5, #2052]
-	ldr	r3, .L1493+16
+	ldr	r3, .L1479+16
 	str	r3, [sp, #20]
-	b	.L1438
-.L1494:
+	b	.L1424
+.L1480:
 	.align	2
-.L1493:
+.L1479:
 	.word	.LANCHOR20
 	.word	.LANCHOR154
 	.word	.LC22
@@ -10621,72 +10505,72 @@ FlashGetReadRetryDefault:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	mov	r3, r0
-	cbz	r0, .L1495
+	cbz	r0, .L1481
 	subs	r2, r0, #1
 	cmp	r2, #7
-	bhi	.L1497
+	bhi	.L1483
 	b	HynixGetReadRetryDefault
-.L1497:
+.L1483:
 	cmp	r0, #49
-	bne	.L1498
-	ldr	r0, .L1518
+	bne	.L1484
+	ldr	r0, .L1504
 	movs	r2, #64
-	ldr	r1, .L1518+4
+	ldr	r1, .L1504+4
 	strb	r3, [r0]
 	movs	r3, #4
 	strb	r3, [r0, #1]
 	movs	r3, #15
 	strb	r3, [r0, #2]
-.L1516:
+.L1502:
 	adds	r0, r0, #4
 	b	ftl_memcpy
-.L1498:
+.L1484:
 	cmp	r0, #33
-	beq	.L1499
+	beq	.L1485
 	sub	r2, r0, #65
 	cmp	r2, #1
-	bhi	.L1500
-.L1499:
-	ldr	r0, .L1518
+	bhi	.L1486
+.L1485:
+	ldr	r0, .L1504
 	strb	r3, [r0]
 	movs	r3, #4
-.L1517:
+.L1503:
 	strb	r3, [r0, #1]
 	movs	r3, #7
 	strb	r3, [r0, #2]
 	movs	r2, #45
-	ldr	r1, .L1518+8
-	b	.L1516
-.L1500:
+	ldr	r1, .L1504+8
+	b	.L1502
+.L1486:
 	cmp	r0, #34
-	beq	.L1501
+	beq	.L1487
 	cmp	r0, #67
-	bne	.L1502
-.L1501:
-	ldr	r0, .L1518
+	bne	.L1488
+.L1487:
+	ldr	r0, .L1504
 	strb	r3, [r0]
 	movs	r3, #5
-	b	.L1517
-.L1502:
+	b	.L1503
+.L1488:
 	cmp	r0, #35
-	beq	.L1503
+	beq	.L1489
 	cmp	r0, #68
-	bne	.L1495
-.L1503:
-	ldr	r0, .L1518
+	bne	.L1481
+.L1489:
+	ldr	r0, .L1504
 	movs	r2, #95
-	ldr	r1, .L1518+12
+	ldr	r1, .L1504+12
 	strb	r3, [r0]
 	movs	r3, #5
 	strb	r3, [r0, #1]
 	movs	r3, #17
 	strb	r3, [r0, #2]
-	b	.L1516
-.L1495:
+	b	.L1502
+.L1481:
 	bx	lr
-.L1519:
+.L1505:
 	.align	2
-.L1518:
+.L1504:
 	.word	.LANCHOR20
 	.word	.LANCHOR14
 	.word	.LANCHOR9
@@ -10709,29 +10593,29 @@ FlashInit:
 	mov	r0, #32768
 	movs	r5, #0
 	bl	ftl_malloc
-	ldr	r3, .L1628
-	ldr	fp, .L1628+124
-	ldr	r10, .L1628+128
+	ldr	r3, .L1614
+	ldr	fp, .L1614+124
+	ldr	r10, .L1614+128
 	str	r0, [r3]
 	mov	r0, #32768
 	bl	ftl_malloc
-	ldr	r3, .L1628+4
-	ldr	r8, .L1628+132
-	ldr	r6, .L1628+8
+	ldr	r3, .L1614+4
+	ldr	r8, .L1614+132
+	ldr	r6, .L1614+8
 	str	r0, [r3]
 	mov	r0, #4096
 	bl	ftl_malloc
-	ldr	r3, .L1628+12
-	ldr	r7, .L1628+16
+	ldr	r3, .L1614+12
+	ldr	r7, .L1614+16
 	str	r0, [r3]
 	mov	r0, #32768
 	bl	ftl_malloc
-	ldr	r3, .L1628+20
+	ldr	r3, .L1614+20
 	str	r0, [r3]
 	mov	r0, #4096
 	bl	ftl_malloc
-	ldr	r3, .L1628+24
-	ldr	r2, .L1628+28
+	ldr	r3, .L1614+24
+	ldr	r2, .L1614+28
 	strb	r5, [r6]
 	str	r0, [r3]
 	movs	r3, #50
@@ -10739,14 +10623,14 @@ FlashInit:
 	movs	r2, #128
 	strb	r3, [fp]
 	mov	r0, r4
-	ldr	r3, .L1628+32
-	ldr	r4, .L1628+36
+	ldr	r3, .L1614+32
+	ldr	r4, .L1614+36
 	strb	r5, [r10]
 	str	r5, [r3]
-	ldr	r3, .L1628+40
+	ldr	r3, .L1614+40
 	strb	r5, [r8]
 	str	r2, [r3]
-	ldr	r3, .L1628+44
+	ldr	r3, .L1614+44
 	str	r5, [r3]
 	movs	r3, #60
 	strb	r3, [r7]
@@ -10754,8 +10638,8 @@ FlashInit:
 	str	fp, [sp, #24]
 	str	r10, [sp, #20]
 	str	r8, [sp, #28]
-.L1526:
-	ldr	r3, .L1628+48
+.L1512:
+	ldr	r3, .L1614+48
 	uxtb	r8, r5
 	mov	r0, r8
 	ldr	fp, [r3, r5, lsl #3]
@@ -10785,7 +10669,7 @@ FlashInit:
 	strb	r0, [r4, #4]
 	ldr	r0, [fp, #2048]
 	strb	r0, [r4, #5]
-	bne	.L1521
+	bne	.L1507
 	movs	r1, #239
 	movs	r0, #200
 	str	r1, [fp, #2056]
@@ -10797,17 +10681,17 @@ FlashInit:
 	str	r10, [fp, #2048]
 	str	r10, [fp, #2048]
 	str	r10, [fp, #2048]
-.L1521:
+.L1507:
 	mov	r0, r8
 	bl	NandcFlashDeCs
 	ldrb	r2, [r4]	@ zero_extendqisi2
 	subs	r3, r2, #1
 	uxtb	r3, r3
 	cmp	r3, #253
-	bhi	.L1522
+	bhi	.L1508
 	ldrb	r1, [r4, #5]	@ zero_extendqisi2
 	ldrb	r3, [r4, #1]	@ zero_extendqisi2
-	ldr	r0, .L1628+52
+	ldr	r0, .L1614+52
 	str	r1, [sp, #12]
 	ldrb	r1, [r4, #4]	@ zero_extendqisi2
 	str	r1, [sp, #8]
@@ -10817,18 +10701,18 @@ FlashInit:
 	str	r1, [sp]
 	adds	r1, r5, #1
 	bl	printf
-.L1522:
-	cbnz	r5, .L1523
-	ldr	r2, .L1628+36
+.L1508:
+	cbnz	r5, .L1509
+	ldr	r2, .L1614+36
 	ldrb	r3, [r2]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, #253
-	bhi	.L1574
+	bhi	.L1560
 	ldrb	r3, [r2, #1]	@ zero_extendqisi2
 	cmp	r3, #255
-	beq	.L1574
-.L1523:
+	beq	.L1560
+.L1509:
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	adds	r5, r5, #1
 	adds	r4, r4, #8
@@ -10837,57 +10721,57 @@ FlashInit:
 	moveq	r3, #44
 	strbeq	r3, [r4, #-8]
 	cmp	r5, #4
-	bne	.L1526
-	ldr	r3, .L1628+36
+	bne	.L1512
+	ldr	r3, .L1614+36
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	mov	r10, r3
 	cmp	r2, #173
-	beq	.L1527
-	ldr	r3, .L1628+56
+	beq	.L1513
+	ldr	r3, .L1614+56
 	ldr	r0, [r3]
 	bl	NandcSetDdrMode
-.L1527:
-	ldr	r5, .L1628+60
+.L1513:
+	ldr	r5, .L1614+60
 	mov	r2, #852
 	movs	r1, #0
-	ldr	r0, .L1628+64
+	ldr	r0, .L1614+64
 	bl	ftl_memset
 	movs	r2, #0
-	ldr	r4, .L1628+68
+	ldr	r4, .L1614+68
 	strb	r2, [r5]
 	mov	fp, r5
-	ldr	r2, .L1628+72
-	ldr	r3, .L1628+76
+	ldr	r2, .L1614+72
+	ldr	r3, .L1614+76
 	ldr	r1, [r2]
-	ldr	r2, .L1628+80
+	ldr	r2, .L1614+80
 	str	r3, [r4]
 	cmp	r1, r2
 	mov	r8, r2
-	bne	.L1528
+	bne	.L1514
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	cmp	r3, #50
 	ittt	ne
-	ldrne	r3, .L1628+84
+	ldrne	r3, .L1614+84
 	movne	r2, #1
 	strne	r2, [r3]
-.L1528:
+.L1514:
 	ldrb	r3, [r10, #1]	@ zero_extendqisi2
 	cmp	r3, #161
-	beq	.L1529
+	beq	.L1515
 	cmp	r3, #241
-	beq	.L1529
+	beq	.L1515
 	cmp	r3, #218
-	beq	.L1529
+	beq	.L1515
 	and	r2, r3, #253
 	cmp	r2, #209
-	beq	.L1529
+	beq	.L1515
 	cmp	r3, #220
-	bne	.L1530
+	bne	.L1516
 	ldrb	r2, [r10, #3]	@ zero_extendqisi2
 	cmp	r2, #149
-	bne	.L1530
-.L1529:
-	ldr	ip, .L1628+36
+	bne	.L1516
+.L1515:
+	ldr	ip, .L1614+36
 	movs	r0, #1
 	ldr	r2, [sp, #20]
 	ldr	r5, [sp, #24]
@@ -10897,113 +10781,113 @@ FlashInit:
 	strb	r2, [r5]
 	strb	r2, [r7]
 	cmp	lr, #152
-	ldr	r2, .L1628+88
+	ldr	r2, .L1614+88
 	strb	lr, [r2, #1]
 	strb	r3, [r2, #2]
-	bne	.L1532
+	bne	.L1518
 	ldrsb	ip, [ip, #4]
 	cmp	ip, #0
-	blt	.L1533
+	blt	.L1519
 	movs	r0, #24
 	strb	r0, [r7]
-.L1532:
+.L1518:
 	cmp	r1, r8
-	beq	.L1535
+	beq	.L1521
 	movw	r0, #2049
 	cmp	r1, r0
-	bne	.L1536
-.L1535:
+	bne	.L1522
+.L1521:
 	movs	r1, #16
 	strb	r1, [r7]
-.L1536:
+.L1522:
 	cmp	r3, #218
-	bne	.L1537
+	bne	.L1523
 	mov	r1, #2048
-.L1624:
+.L1610:
 	strh	r1, [r2, #14]	@ movhi
 	strb	r3, [r2, #2]
-.L1538:
+.L1524:
 	movs	r2, #32
-	ldr	r1, .L1628+92
-	ldr	r0, .L1628+96
+	ldr	r1, .L1614+92
+	ldr	r0, .L1614+96
 	bl	ftl_memcpy
 	movs	r2, #32
-	ldr	r1, .L1628+88
-	ldr	r0, .L1628+76
+	ldr	r1, .L1614+88
+	ldr	r0, .L1614+76
 	bl	ftl_memcpy
-.L1530:
+.L1516:
 	ldr	r3, [sp, #20]
-	ldr	r10, .L1628+136
+	ldr	r10, .L1614+136
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1541
+	bne	.L1527
 	bl	FlashLoadPhyInfoInRam
-	cbnz	r0, .L1543
+	cbnz	r0, .L1529
 	ldr	r3, [r4]
-	ldr	r7, .L1628+100
+	ldr	r7, .L1614+100
 	ldrh	r3, [r3, #16]
 	lsrs	r3, r3, #8
 	lsls	r1, r3, #31
 	and	r0, r3, #7
 	strb	r0, [r7]
-	bmi	.L1543
+	bmi	.L1529
 	movs	r3, #1
 	strb	r3, [r6]
 	bl	FlashSetInterfaceMode
 	ldrb	r0, [r7]	@ zero_extendqisi2
 	bl	NandcSetMode
-.L1543:
+.L1529:
 	ldr	r3, [r4]
 	ldrb	r3, [r3, #26]	@ zero_extendqisi2
 	strb	r3, [r10]
 	bl	FlashLoadPhyInfo
 	cmp	r0, #0
-	beq	.L1541
+	beq	.L1527
 	ldr	r3, [r4]
-	ldr	r0, .L1628+104
+	ldr	r0, .L1614+104
 	ldrh	r1, [r3, #14]
 	bl	printf
 	bl	FlashLoadPhyInfoInRam
 	adds	r2, r0, #1
-	beq	.L1520
+	beq	.L1506
 	bl	FlashDieInfoInit
 	ldr	r3, [r4]
 	ldrb	r0, [r3, #19]	@ zero_extendqisi2
 	bl	FlashGetReadRetryDefault
 	ldr	r3, [r4]
-	ldr	r2, .L1628+108
+	ldr	r2, .L1614+108
 	ldrb	r1, [r3, #9]	@ zero_extendqisi2
 	ldrh	r2, [r2]
 	addw	r2, r2, #4095
 	cmp	r1, r2, asr #12
-	blt	.L1546
+	blt	.L1532
 	ldrh	r2, [r3, #14]
 	adds	r2, r2, #255
 	cmp	r1, r2, asr #8
-	bge	.L1547
-.L1546:
+	bge	.L1533
+.L1532:
 	ldrh	r2, [r3, #14]
 	bic	r2, r2, #255
 	strh	r2, [r3, #14]	@ movhi
-.L1547:
-	ldr	r3, .L1628+100
+.L1533:
+	ldr	r3, .L1614+100
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	tst	r3, #6
-	beq	.L1548
+	beq	.L1534
 	bl	FlashSavePhyInfo
 	movs	r0, #0
 	bl	flash_enter_slc_mode
-	ldr	r3, .L1628+112
+	ldr	r3, .L1614+112
 	movs	r0, #0
 	ldr	r1, [r3]
 	bl	FlashDdrParaScan
 	movs	r0, #0
 	bl	flash_exit_slc_mode
-.L1548:
+.L1534:
 	bl	FlashSavePhyInfo
-.L1541:
+.L1527:
 	ldr	r7, [r4]
-	ldr	r5, .L1628+116
+	ldr	r5, .L1614+116
 	ldrh	r2, [r7, #16]
 	ldrb	r3, [r7, #26]	@ zero_extendqisi2
 	ldrh	r0, [r7, #10]
@@ -11012,15 +10896,15 @@ FlashInit:
 	ubfx	r3, r2, #7, #1
 	strb	r3, [fp]
 	mov	fp, #0
-	ldr	r3, .L1628+120
+	ldr	r3, .L1614+120
 	str	fp, [r5]
 	strb	r1, [r3]
-	b	.L1629
-.L1630:
+	b	.L1615
+.L1616:
 	.align	2
-.L1628:
+.L1614:
 	.word	.LANCHOR154
-	.word	.LANCHOR152
+	.word	.LANCHOR149
 	.word	.LANCHOR30
 	.word	.LANCHOR205
 	.word	.LANCHOR158
@@ -11030,7 +10914,7 @@ FlashInit:
 	.word	.LANCHOR156
 	.word	.LANCHOR22
 	.word	.LANCHOR4
-	.word	.LANCHOR147
+	.word	.LANCHOR144
 	.word	.LANCHOR0
 	.word	.LC24
 	.word	.LANCHOR160
@@ -11042,24 +10926,24 @@ FlashInit:
 	.word	1446522928
 	.word	.LANCHOR29
 	.word	.LANCHOR209
-	.word	.LANCHOR146+32
+	.word	.LANCHOR152+32
 	.word	.LANCHOR8
 	.word	.LANCHOR25
 	.word	.LC25
 	.word	.LANCHOR125
 	.word	.LANCHOR155
-	.word	.LANCHOR148
+	.word	.LANCHOR145
 	.word	.LANCHOR210
 	.word	.LANCHOR3
 	.word	.LANCHOR2
 	.word	.LANCHOR208
 	.word	.LANCHOR16
-.L1629:
+.L1615:
 	ubfx	r1, r2, #4, #1
-	ldr	r3, .L1631
+	ldr	r3, .L1617
 	ubfx	r2, r2, #8, #3
 	strb	r1, [r3]
-	ldr	r3, .L1631+4
+	ldr	r3, .L1617+4
 	ldrb	r1, [r7, #12]	@ zero_extendqisi2
 	strb	r2, [r3]
 	str	r3, [sp, #28]
@@ -11074,106 +10958,106 @@ FlashInit:
 	ldrh	r1, [r2, #16]
 	mov	r7, r3
 	tst	r1, #64
-	beq	.L1550
+	beq	.L1536
 	ldrb	r0, [r2, #19]	@ zero_extendqisi2
-	ldr	r3, .L1631+8
-	ldr	r1, .L1631+12
+	ldr	r3, .L1617+8
+	ldr	r1, .L1617+12
 	strb	r0, [r3]
 	ldrb	r2, [r1, #1]	@ zero_extendqisi2
-	ldr	r3, .L1631+16
+	ldr	r3, .L1617+16
 	ldrb	r1, [r1, #2]	@ zero_extendqisi2
 	strb	r2, [r3]
-	ldr	r2, .L1631+20
+	ldr	r2, .L1617+20
 	strb	r1, [r2]
 	subs	r1, r0, #1
 	cmp	r1, #7
 	mov	r1, r2
-	bhi	.L1551
-	ldr	r3, .L1631+24
+	bhi	.L1537
+	ldr	r3, .L1617+24
 	str	r3, [r5]
 	subs	r3, r0, #5
 	cmp	r3, #1
-	bls	.L1552
+	bls	.L1538
 	cmp	r0, #8
-	bne	.L1553
-.L1552:
-	ldr	r3, .L1631+28
+	bne	.L1539
+.L1538:
+	ldr	r3, .L1617+28
 	movs	r2, #1
 	str	r2, [r3]
-.L1553:
+.L1539:
 	cmp	r0, #7
-	ldr	r3, .L1631+32
-	beq	.L1554
+	ldr	r3, .L1617+32
+	beq	.L1540
 	sub	r2, r3, #8
 	cmp	r0, #8
 	it	ne
 	movne	r3, r2
-.L1554:
+.L1540:
 	subs	r1, r3, #1
 	movs	r2, #0
 	adds	r3, r3, #31
-.L1556:
+.L1542:
 	ldrsb	r5, [r1, #1]!
-	cbnz	r5, .L1555
+	cbnz	r5, .L1541
 	adds	r2, r2, #1
-.L1555:
+.L1541:
 	cmp	r3, r1
-	bne	.L1556
+	bne	.L1542
 	cmp	r2, #27
-	bls	.L1550
+	bls	.L1536
 	bl	FlashGetReadRetryDefault
 	bl	FlashSavePhyInfo
-.L1550:
-	ldr	r3, .L1631+36
+.L1536:
+	ldr	r3, .L1617+36
 	ldr	r3, [r3]
 	cmp	r3, r8
-	bne	.L1568
+	bne	.L1554
 	ldrb	r3, [r10]	@ zero_extendqisi2
-	cbz	r3, .L1568
-	ldr	r3, .L1631+40
+	cbz	r3, .L1554
+	ldr	r3, .L1617+40
 	movs	r2, #0
 	ldr	r3, [r3]
 	strb	r2, [r3, #18]
-.L1568:
-	ldr	r3, .L1631+44
+.L1554:
+	ldr	r3, .L1617+44
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #44
-	bne	.L1569
+	bne	.L1555
 	ldrb	r3, [r6]	@ zero_extendqisi2
-	cbz	r3, .L1569
+	cbz	r3, .L1555
 	movs	r3, #0
 	movs	r0, #1
 	strb	r3, [r6]
 	bl	FlashSetInterfaceMode
 	movs	r0, #1
 	bl	NandcSetMode
-.L1569:
+.L1555:
 	ldrb	r3, [r7]	@ zero_extendqisi2
 	tst	r3, #6
-	beq	.L1570
+	beq	.L1556
 	ldrb	r2, [r6]	@ zero_extendqisi2
-	cbnz	r2, .L1571
+	cbnz	r2, .L1557
 	lsls	r3, r3, #31
-	bmi	.L1570
-.L1571:
+	bmi	.L1556
+.L1557:
 	movs	r0, #0
 	bl	flash_enter_slc_mode
-	ldr	r3, .L1631+48
+	ldr	r3, .L1617+48
 	movs	r0, #0
 	ldr	r1, [r3]
 	bl	FlashDdrParaScan
 	movs	r0, #0
 	bl	flash_exit_slc_mode
-.L1570:
+.L1556:
 	ldr	r3, [r4]
 	movs	r6, #16
 	ldrb	r0, [r3, #20]	@ zero_extendqisi2
 	bl	FlashBchSel
-	ldr	r0, .L1631+52
+	ldr	r0, .L1617+52
 	bl	FlashReadIdbDataRaw
 	ldr	r7, [r4]
 	ldr	r3, [sp, #24]
-	ldr	r4, .L1631+56
+	ldr	r4, .L1617+56
 	ldrb	r1, [r7, #12]	@ zero_extendqisi2
 	strb	r6, [r3]
 	ldrh	r5, [r7, #10]
@@ -11182,18 +11066,18 @@ FlashInit:
 	ldrh	r8, [r7, #14]
 	mov	r0, r5
 	str	r3, [r4, #4]
-	ldr	r3, .L1631+44
+	ldr	r3, .L1617+44
 	ldrb	r2, [r3, #1]	@ zero_extendqisi2
 	lsl	r3, r2, r6
 	orr	r3, r3, r2, lsl #8
-	ldr	r2, .L1631+44
+	ldr	r2, .L1617+44
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	orrs	r3, r3, r2
-	ldr	r2, .L1631+44
+	ldr	r2, .L1617+44
 	ldrb	r2, [r2, #3]	@ zero_extendqisi2
 	orr	r3, r3, r2, lsl #24
 	str	r3, [r4]
-	ldr	r3, .L1631+60
+	ldr	r3, .L1617+60
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	strh	r3, [r4, #10]	@ movhi
 	ldrb	r3, [r7, #13]	@ zero_extendqisi2
@@ -11213,7 +11097,7 @@ FlashInit:
 	uxth	r5, r5
 	cmp	r2, #1
 	strh	r5, [r4, #22]	@ movhi
-	bne	.L1572
+	bne	.L1558
 	lsls	r3, r3, #1
 	lsr	r2, r8, #1
 	lsls	r5, r5, #1
@@ -11222,112 +11106,112 @@ FlashInit:
 	strh	r2, [r4, #14]	@ movhi
 	strh	r5, [r4, #22]	@ movhi
 	strh	r3, [r4, #26]	@ movhi
-.L1572:
+.L1558:
 	ldrb	r0, [r7, #20]	@ zero_extendqisi2
 	bl	FlashBchSel
 	movs	r0, #0
-.L1520:
+.L1506:
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1537:
+.L1523:
 	cmp	r3, #220
-	bne	.L1539
+	bne	.L1525
 	mov	r1, #4096
-	b	.L1624
-.L1539:
+	b	.L1610
+.L1525:
 	cmp	r3, #211
 	itttt	eq
 	moveq	r3, #4096
 	strheq	r3, [r2, #14]	@ movhi
 	moveq	r3, #2
 	strbeq	r3, [r2, #13]
-	b	.L1538
-.L1551:
+	b	.L1524
+.L1537:
 	sub	lr, r0, #17
 	cmp	lr, #2
-	bhi	.L1558
-	ldr	r3, .L1631+64
+	bhi	.L1544
+	ldr	r3, .L1617+64
 	cmp	r0, #19
 	str	r3, [r5]
 	ite	ne
 	movne	r3, #7
 	moveq	r3, #15
 	strb	r3, [r2]
-	b	.L1550
-.L1558:
+	b	.L1536
+.L1544:
 	cmp	r0, #33
-	beq	.L1560
+	beq	.L1546
 	sub	r2, r0, #65
 	cmp	r2, #1
-	bhi	.L1561
-.L1560:
-	ldr	r2, .L1631+68
+	bhi	.L1547
+.L1546:
+	ldr	r2, .L1617+68
 	str	r2, [ip]
 	movs	r2, #4
 	strb	r2, [r3]
 	movs	r3, #7
 	strb	r3, [r1]
-	b	.L1550
-.L1561:
+	b	.L1536
+.L1547:
 	sub	r2, r0, #67
 	uxtb	r2, r2
 	cmp	r2, #1
-	bls	.L1562
+	bls	.L1548
 	sub	r1, r0, #34
 	cmp	r1, #1
-	bhi	.L1563
-.L1562:
-	ldr	r1, .L1631+72
+	bhi	.L1549
+.L1548:
+	ldr	r1, .L1617+72
 	cmp	r0, #35
-	ldr	r5, .L1631+68
+	ldr	r5, .L1617+68
 	str	r5, [r1]
-	ldr	r1, .L1631+20
-	beq	.L1564
+	ldr	r1, .L1617+20
+	beq	.L1550
 	cmp	r0, #68
-	beq	.L1564
+	beq	.L1550
 	movs	r0, #7
-.L1625:
+.L1611:
 	cmp	r2, #1
 	strb	r0, [r1]
 	ite	ls
 	movls	r2, #4
 	movhi	r2, #5
 	strb	r2, [r3]
-	b	.L1550
-.L1564:
+	b	.L1536
+.L1550:
 	movs	r0, #17
-	b	.L1625
-.L1563:
+	b	.L1611
+.L1549:
 	cmp	r0, #49
-	bne	.L1567
-	ldr	r3, .L1631+76
+	bne	.L1553
+	ldr	r3, .L1617+76
 	str	r3, [r5]
-	b	.L1550
-.L1567:
+	b	.L1536
+.L1553:
 	cmp	r0, #50
 	itttt	eq
-	ldreq	r3, .L1631+80
+	ldreq	r3, .L1617+80
 	streq	r3, [r5]
-	ldreq	r3, .L1631+84
+	ldreq	r3, .L1617+84
 	streq	fp, [r3]
-	b	.L1550
-.L1574:
+	b	.L1536
+.L1560:
 	mvn	r0, #1
-	b	.L1520
-.L1533:
+	b	.L1506
+.L1519:
 	ldr	r5, [sp, #28]
 	strb	r0, [r5]
-	b	.L1532
-.L1632:
+	b	.L1518
+.L1618:
 	.align	2
-.L1631:
+.L1617:
 	.word	.LANCHOR28
 	.word	.LANCHOR25
 	.word	.LANCHOR10
 	.word	.LANCHOR20
 	.word	.LANCHOR13
-	.word	.LANCHOR149
+	.word	.LANCHOR146
 	.word	HynixReadRetrial
 	.word	.LANCHOR36
 	.word	.LANCHOR20+28
@@ -11335,12 +11219,12 @@ FlashInit:
 	.word	.LANCHOR7
 	.word	.LANCHOR22
 	.word	.LANCHOR155
-	.word	.LANCHOR144
+	.word	.LANCHOR150
 	.word	.LANCHOR15
 	.word	.LANCHOR26
 	.word	MicronReadRetrial
 	.word	ToshibaReadRetrial
-	.word	.LANCHOR148
+	.word	.LANCHOR145
 	.word	SamsungReadRetrial
 	.word	samsung_read_retrial
 	.word	.LANCHOR29
@@ -11356,7 +11240,7 @@ FlashInit:
 FlashReadSlc2KPages:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1690
+	ldr	r3, .L1676
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	movs	r7, #0
@@ -11364,15 +11248,15 @@ FlashReadSlc2KPages:
 	ldrb	fp, [r3, #9]	@ zero_extendqisi2
 	str	r1, [sp, #8]
 	str	r2, [sp, #12]
-.L1634:
+.L1620:
 	ldr	r3, [sp, #8]
 	cmp	r7, r3
-	bne	.L1658
+	bne	.L1644
 	movs	r0, #0
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1658:
+.L1644:
 	ldr	r3, [sp, #8]
 	add	r2, sp, #20
 	ldr	r1, [sp, #12]
@@ -11382,26 +11266,26 @@ FlashReadSlc2KPages:
 	str	r3, [sp]
 	add	r3, sp, #16
 	bl	LogAddr2PhyAddr
-	ldr	r2, .L1690+4
+	ldr	r2, .L1676+4
 	ldr	r3, [sp, #16]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, r3
-	bhi	.L1635
+	bhi	.L1621
 	mov	r3, #-1
 	str	r3, [r4]
-.L1636:
+.L1622:
 	adds	r7, r7, #1
 	adds	r4, r4, #36
-	b	.L1634
-.L1635:
-	ldr	r2, .L1690+8
+	b	.L1620
+.L1621:
+	ldr	r2, .L1676+8
 	mov	r8, #0
 	ldrb	r5, [r2, r3]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	NandcWaitFlashReady
 	mov	r0, r5
 	bl	NandcFlashCs
-.L1637:
+.L1623:
 	ldr	r1, [sp, #20]
 	mov	r0, r5
 	bl	FlashReadCmd
@@ -11414,23 +11298,23 @@ FlashReadSlc2KPages:
 	str	r3, [sp]
 	ldr	r3, [r4, #8]
 	bl	NandcXferData
-	ldr	r3, .L1690+12
+	ldr	r3, .L1676+12
 	mov	r6, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1638
-.L1641:
+	bne	.L1624
+.L1627:
 	adds	r3, r6, #1
-	beq	.L1639
-.L1640:
+	beq	.L1625
+.L1626:
 	cmp	r8, #0
-	beq	.L1643
-.L1642:
+	beq	.L1629
+.L1628:
 	mov	r6, #256
-.L1643:
+.L1629:
 	mov	r8, #0
-.L1644:
-	ldr	r3, .L1690+16
+.L1630:
+	ldr	r3, .L1676+16
 	mov	r0, r5
 	ldr	r1, [sp, #20]
 	ldr	r3, [r3]
@@ -11439,109 +11323,109 @@ FlashReadSlc2KPages:
 	mov	r0, r5
 	bl	NandcWaitFlashReady
 	ldr	r3, [r4, #8]
-	cbz	r3, .L1645
+	cbz	r3, .L1631
 	add	r3, r3, #2048
-.L1645:
+.L1631:
 	ldr	r2, [r4, #12]
-	cbz	r2, .L1646
+	cbz	r2, .L1632
 	adds	r2, r2, #8
-.L1646:
+.L1632:
 	str	r2, [sp]
 	movs	r1, #0
 	mov	r2, fp
 	mov	r0, r5
 	bl	NandcXferData
-	ldr	r3, .L1690+12
+	ldr	r3, .L1676+12
 	mov	r10, r0
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	cmp	r2, #0
-	bne	.L1647
-.L1650:
+	bne	.L1633
+.L1636:
 	cmp	r10, #-1
-	beq	.L1648
-.L1649:
+	beq	.L1634
+.L1635:
 	cmp	r8, #0
-	beq	.L1652
-.L1651:
+	beq	.L1638
+.L1637:
 	mov	r10, #256
-.L1652:
+.L1638:
 	mov	r0, r5
 	bl	NandcFlashDeCs
-	ldr	r2, .L1690+20
+	ldr	r2, .L1676+20
 	cmp	r6, r10
 	it	cc
 	movcc	r6, r10
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	add	r3, r2, r2, lsl #1
 	cmp	r6, r3, asr #2
-	bhi	.L1653
+	bhi	.L1639
 	movs	r3, #0
-.L1689:
+.L1675:
 	str	r3, [r4]
 	ldr	r3, [r4, #12]
-	cbz	r3, .L1654
+	cbz	r3, .L1640
 	ldr	r1, [r3, #12]
 	adds	r1, r1, #1
-	bne	.L1654
+	bne	.L1640
 	ldr	r1, [r3, #8]
 	adds	r0, r1, #1
-	bne	.L1654
+	bne	.L1640
 	ldr	r3, [r3]
 	adds	r3, r3, #1
 	it	ne
 	strne	r1, [r4]
-.L1654:
+.L1640:
 	ldr	r3, [r4]
 	adds	r1, r3, #1
-	bne	.L1636
+	bne	.L1622
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1690+24
+	ldr	r0, .L1676+24
 	bl	printf
 	ldr	r1, [r4, #8]
-	cbz	r1, .L1656
+	cbz	r1, .L1642
 	movs	r3, #8
 	movs	r2, #4
-	ldr	r0, .L1690+28
+	ldr	r0, .L1676+28
 	bl	rknand_print_hex
-.L1656:
+.L1642:
 	ldr	r1, [r4, #12]
 	cmp	r1, #0
-	beq	.L1636
+	beq	.L1622
 	movs	r3, #4
-	ldr	r0, .L1690+32
+	ldr	r0, .L1676+32
 	mov	r2, r3
 	bl	rknand_print_hex
-	b	.L1636
-.L1638:
+	b	.L1622
+.L1624:
 	mov	r0, r5
 	bl	flash_read_ecc
 	cmp	r0, #5
-	bls	.L1641
+	bls	.L1627
 	mov	r6, #256
-	b	.L1640
-.L1639:
+	b	.L1626
+.L1625:
 	cmp	r8, #10
-	beq	.L1642
+	beq	.L1628
 	add	r8, r8, #1
-	b	.L1637
-.L1647:
+	b	.L1623
+.L1633:
 	mov	r0, r5
 	bl	flash_read_ecc
 	cmp	r0, #5
-	bls	.L1650
+	bls	.L1636
 	mov	r10, #256
-	b	.L1649
-.L1648:
+	b	.L1635
+.L1634:
 	cmp	r8, #10
-	beq	.L1651
+	beq	.L1637
 	add	r8, r8, #1
-	b	.L1644
-.L1653:
+	b	.L1630
+.L1639:
 	mov	r3, #256
-	b	.L1689
-.L1691:
+	b	.L1675
+.L1677:
 	.align	2
-.L1690:
+.L1676:
 	.word	.LANCHOR31
 	.word	.LANCHOR26
 	.word	.LANCHOR27
@@ -11563,36 +11447,36 @@ FlashReadSlc2KPages:
 FlashReadPages:
 	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1783
+	ldr	r3, .L1769
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #40
 	mov	r10, r0
 	str	r1, [sp, #24]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r2, [sp, #12]
-	cbnz	r3, .L1693
-	ldr	r2, .L1783+4
+	cbnz	r3, .L1679
+	ldr	r2, .L1769+4
 	mov	r8, r3
 	str	r3, [sp, #8]
 	ldrb	r2, [r2, #9]	@ zero_extendqisi2
 	str	r2, [sp, #20]
-	ldr	r2, .L1783+8
+	ldr	r2, .L1769+8
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	str	r2, [sp, #28]
-.L1694:
+.L1680:
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #24]
 	cmp	r3, r2
-	bcc	.L1732
+	bcc	.L1718
 	movs	r0, #0
-	b	.L1692
-.L1693:
+	b	.L1678
+.L1679:
 	bl	FlashReadSlc2KPages
-.L1692:
+.L1678:
 	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1732:
+.L1718:
 	ldr	r2, [sp, #8]
 	movs	r3, #36
 	ldr	r1, [sp, #12]
@@ -11608,86 +11492,86 @@ FlashReadPages:
 	str	r3, [sp]
 	add	r3, sp, #32
 	bl	LogAddr2PhyAddr
-	ldr	r2, .L1783+12
+	ldr	r2, .L1769+12
 	mov	r5, r0
 	ldr	r3, [sp, #32]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, r3
-	bhi	.L1696
+	bhi	.L1682
 	mov	r3, #-1
 	str	r3, [r10, fp]
-.L1697:
+.L1683:
 	ldr	r3, [sp, #8]
 	adds	r3, r3, #1
 	str	r3, [sp, #8]
-	b	.L1694
-.L1696:
-	ldr	r2, .L1783+16
+	b	.L1680
+.L1682:
+	ldr	r2, .L1769+16
 	ldrb	r4, [r2, r3]	@ zero_extendqisi2
-	ldr	r3, .L1783+20
+	ldr	r3, .L1769+20
 	mov	r0, r4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
 	it	eq
 	moveq	r5, #0
 	bl	NandcWaitFlashReady
-	ldr	r3, .L1783+24
+	ldr	r3, .L1769+24
 	ldr	r3, [r3]
 	ldrb	r2, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r2, #1
 	cmp	r3, #7
-	bhi	.L1699
-	ldr	r3, .L1783+28
+	bhi	.L1685
+	ldr	r3, .L1769+28
 	subs	r2, r2, #7
 	cmp	r2, #1
-	ldr	r2, .L1783+32
+	ldr	r2, .L1769+32
 	add	r1, r3, r4
 	ldrb	r3, [r1, #12]	@ zero_extendqisi2
 	ldrb	r2, [r2, r4]	@ zero_extendqisi2
 	it	ls
 	ldrbls	r3, [r1, #20]	@ zero_extendqisi2
 	cmp	r2, r3
-	beq	.L1699
-	ldr	r2, .L1783+36
+	beq	.L1685
+	ldr	r2, .L1769+36
 	mov	r0, r4
 	ldrb	r1, [r2, #-3]	@ zero_extendqisi2
 	bl	HynixSetRRPara
-.L1699:
+.L1685:
 	mov	r0, r4
 	bl	NandcFlashCs
 	ldr	r3, [sp, #12]
 	cmp	r3, #1
-	beq	.L1701
+	beq	.L1687
 	ldr	r3, [sp, #16]
 	cmp	r3, #0
-	bge	.L1702
-.L1701:
-	ldr	r3, .L1783+40
+	bge	.L1688
+.L1687:
+	ldr	r3, .L1769+40
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1702
+	cbz	r3, .L1688
 	mov	r0, r4
 	bl	flash_enter_slc_mode
-.L1709:
+.L1695:
 	ldr	r1, [sp, #36]
 	adds	r6, r1, #1
-	bne	.L1704
+	bne	.L1690
 	cmp	r4, #255
-	beq	.L1734
-.L1704:
-	cbz	r5, .L1706
-	ldr	r3, .L1783+44
+	beq	.L1720
+.L1690:
+	cbz	r5, .L1692
+	ldr	r3, .L1769+44
 	mov	r0, r4
 	ldr	r2, [r3]
 	add	r2, r2, r1
 	bl	FlashReadDpCmd
-.L1707:
+.L1693:
 	mov	r0, r4
 	bl	NandcWaitFlashReady
-	cbz	r5, .L1705
+	cbz	r5, .L1691
 	ldr	r1, [sp, #36]
 	mov	r0, r4
 	bl	FlashReadDpDataOutCmd
-.L1705:
+.L1691:
 	ldr	r3, [r7, #12]
 	movs	r1, #0
 	ldr	r2, [sp, #20]
@@ -11695,30 +11579,30 @@ FlashReadPages:
 	str	r3, [sp]
 	ldr	r3, [r7, #8]
 	bl	NandcXferData
-	ldr	r3, .L1783+8
+	ldr	r3, .L1769+8
 	mov	r6, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1708
+	cbz	r3, .L1694
 	adds	r0, r0, #1
-	bne	.L1708
-	ldr	r3, .L1783+8
+	bne	.L1694
+	ldr	r3, .L1769+8
 	movs	r5, #0
 	strb	r5, [r3]
-	b	.L1709
-.L1702:
+	b	.L1695
+.L1688:
 	mov	r0, r4
 	bl	flash_exit_slc_mode
-	b	.L1709
-.L1706:
+	b	.L1695
+.L1692:
 	mov	r0, r4
 	bl	FlashReadCmd
-	b	.L1707
-.L1734:
+	b	.L1693
+.L1720:
 	movs	r5, #0
-	b	.L1705
-.L1708:
-	cbz	r5, .L1710
-	ldr	r3, .L1783+44
+	b	.L1691
+.L1694:
+	cbz	r5, .L1696
+	ldr	r3, .L1769+44
 	mov	r0, r4
 	ldr	r1, [sp, #36]
 	ldr	r3, [r3]
@@ -11737,30 +11621,30 @@ FlashReadPages:
 	mov	r8, r0
 	it	eq
 	moveq	r5, #0
-.L1710:
+.L1696:
 	mov	r0, r4
 	bl	NandcFlashDeCs
-	ldr	r3, .L1783+8
+	ldr	r3, .L1769+8
 	adds	r1, r6, #1
 	ldrb	r2, [sp, #28]	@ zero_extendqisi2
 	strb	r2, [r3]
-	bne	.L1711
-	ldr	r3, .L1783+48
+	bne	.L1697
+	ldr	r3, .L1769+48
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L1712
-.L1716:
-	ldr	r3, .L1783+52
+	cbnz	r3, .L1698
+.L1702:
+	ldr	r3, .L1769+52
 	ldr	r5, [r3]
 	cmp	r5, #0
-	bne	.L1713
+	bne	.L1699
 	ldr	r3, [r7, #12]
 	mov	r0, r4
 	ldr	r2, [r7, #8]
 	ldr	r1, [sp, #36]
 	bl	FlashReadRawPage
-	b	.L1782
-.L1712:
-	ldr	r3, .L1783+56
+	b	.L1768
+.L1698:
+	ldr	r3, .L1769+56
 	mov	r0, r4
 	ldr	r1, [sp, #36]
 	ldr	r3, [r3]
@@ -11772,33 +11656,33 @@ FlashReadPages:
 	bl	FlashDdrTunningRead
 	adds	r2, r0, #1
 	mov	r6, r0
-	beq	.L1715
-	ldr	r3, .L1783+60
+	beq	.L1701
+	ldr	r3, .L1769+60
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r0, r3, lsr #1
-	bls	.L1735
-.L1715:
+	bls	.L1721
+.L1701:
 	ubfx	r0, r5, #8, #8
 	bl	NandcSetDdrPara
 	adds	r3, r6, #1
-	beq	.L1716
-.L1735:
+	beq	.L1702
+.L1721:
 	movs	r5, #0
-.L1711:
-	ldr	r3, .L1783+60
+.L1697:
+	ldr	r3, .L1769+60
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r6, r3, asr #2
-	bls	.L1724
-	ldr	r3, .L1783+52
+	bls	.L1710
+	ldr	r3, .L1769+52
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L1724
+	bne	.L1710
 	mov	r6, #256
-	b	.L1719
-.L1784:
+	b	.L1705
+.L1770:
 	.align	2
-.L1783:
+.L1769:
 	.word	.LANCHOR2
 	.word	.LANCHOR31
 	.word	.LANCHOR6
@@ -11812,10 +11696,10 @@ FlashReadPages:
 	.word	.LANCHOR16
 	.word	.LANCHOR4
 	.word	.LANCHOR30
-	.word	.LANCHOR148
+	.word	.LANCHOR145
 	.word	.LANCHOR19
 	.word	.LANCHOR33
-.L1713:
+.L1699:
 	ldr	r3, [r7, #12]
 	mov	r0, r4
 	ldr	r2, [r7, #8]
@@ -11823,134 +11707,134 @@ FlashReadPages:
 	blx	r5
 	adds	r5, r0, #1
 	mov	r6, r0
-	bne	.L1717
-	ldr	r3, .L1785
+	bne	.L1703
+	ldr	r3, .L1771
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	cmp	r3, #7
-	bhi	.L1718
-	ldr	r2, .L1785+4
+	bhi	.L1704
+	ldr	r2, .L1771+4
 	movs	r3, #0
 	mov	r0, r4
 	ldrb	r1, [r2, #-3]	@ zero_extendqisi2
 	bl	HynixSetRRPara
-.L1718:
+.L1704:
 	ldr	r3, [r7, #12]
 	mov	r0, r4
 	ldr	r2, [r7, #8]
 	ldr	r1, [sp, #36]
 	bl	FlashReadRawPage
-	ldr	r2, .L1785+8
+	ldr	r2, .L1771+8
 	mov	r6, r0
 	mov	r3, r0
 	ldr	r1, [r7, #4]
-	ldr	r0, .L1785+12
+	ldr	r0, .L1771+12
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	bl	printf
 	adds	r0, r6, #1
-	bne	.L1717
-	ldr	r3, .L1785+16
+	bne	.L1703
+	ldr	r3, .L1771+16
 	ldrb	r5, [r3]	@ zero_extendqisi2
-	cbz	r5, .L1719
+	cbz	r5, .L1705
 	ldr	r3, [sp, #12]
 	mov	r0, r4
 	cmp	r3, #1
-	beq	.L1720
+	beq	.L1706
 	ldr	r3, [sp, #16]
 	cmp	r3, #0
-	bge	.L1721
-.L1720:
+	bge	.L1707
+.L1706:
 	bl	flash_enter_slc_mode
-.L1722:
-	ldr	r3, .L1785+20
+.L1708:
+	ldr	r3, .L1771+20
 	mov	r0, r4
 	ldr	r2, [r7, #8]
 	ldr	r1, [sp, #36]
 	ldr	r5, [r3]
 	ldr	r3, [r7, #12]
 	blx	r5
-.L1782:
+.L1768:
 	adds	r1, r0, #1
 	mov	r6, r0
 	mov	r5, #0
-	bne	.L1724
-.L1719:
+	bne	.L1710
+.L1705:
 	str	r6, [r10, fp]
-.L1725:
+.L1711:
 	ldr	r3, [r10, fp]
 	adds	r2, r3, #1
-	bne	.L1727
-	ldr	r2, .L1785+8
+	bne	.L1713
+	ldr	r2, .L1771+8
 	ldr	r1, [r7, #4]
-	ldr	r0, .L1785+24
+	ldr	r0, .L1771+24
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	bl	printf
 	ldr	r1, [r7, #12]
-	cbz	r1, .L1727
+	cbz	r1, .L1713
 	movs	r3, #4
-	ldr	r0, .L1785+28
+	ldr	r0, .L1771+28
 	mov	r2, r3
 	bl	rknand_print_hex
-.L1727:
-	cbz	r5, .L1729
-	ldr	r3, .L1785+8
+.L1713:
+	cbz	r5, .L1715
+	ldr	r3, .L1771+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r8, r3, asr #2
-	bls	.L1730
-	ldr	r3, .L1785+20
+	bls	.L1716
+	ldr	r3, .L1771+20
 	ldr	r3, [r3]
 	cmp	r3, #0
 	it	eq
 	moveq	r8, #256
-.L1730:
+.L1716:
 	cmp	r8, #-1
 	add	r3, fp, #36
 	str	r8, [r10, r3]
-	beq	.L1729
+	beq	.L1715
 	cmp	r8, #256
 	itt	ne
 	movne	r2, #0
 	strne	r2, [r10, r3]
-.L1729:
+.L1715:
 	ldr	r3, [sp, #8]
 	add	r3, r3, r5
 	str	r3, [sp, #8]
 	ldr	r3, [sp, #12]
 	cmp	r3, #1
-	beq	.L1731
+	beq	.L1717
 	ldr	r3, [sp, #16]
 	cmp	r3, #0
-	bge	.L1697
-.L1731:
-	ldr	r3, .L1785+16
+	bge	.L1683
+.L1717:
+	ldr	r3, .L1771+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1697
+	beq	.L1683
 	mov	r0, r4
 	bl	flash_exit_slc_mode
-	b	.L1697
-.L1721:
+	b	.L1683
+.L1707:
 	bl	flash_exit_slc_mode
-	b	.L1722
-.L1717:
+	b	.L1708
+.L1703:
 	movs	r5, #0
-.L1724:
+.L1710:
 	cmp	r6, #256
-	beq	.L1719
+	beq	.L1705
 	movs	r3, #0
 	str	r3, [r10, fp]
-	b	.L1725
-.L1786:
+	b	.L1711
+.L1772:
 	.align	2
-.L1785:
+.L1771:
 	.word	.LANCHOR7
 	.word	.LANCHOR20+4
 	.word	.LANCHOR33
 	.word	.LC29
 	.word	.LANCHOR16
-	.word	.LANCHOR148
+	.word	.LANCHOR145
 	.word	.LC26
 	.word	.LC28
 	.size	FlashReadPages, .-FlashReadPages
@@ -11965,29 +11849,29 @@ FlashReadPages:
 FlashProgSlc2KPages:
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1814
+	ldr	r3, .L1800
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r8, r1
-	ldr	fp, .L1814+32
+	ldr	fp, .L1800+32
 	mov	r4, r0
 	mov	r6, r0
 	movs	r7, #0
 	ldrb	r10, [r3, #9]	@ zero_extendqisi2
 	sub	sp, sp, #64
 	str	r2, [sp, #12]
-.L1788:
+.L1774:
 	cmp	r7, r8
-	bne	.L1794
-	ldr	r10, .L1814+36
+	bne	.L1780
+	ldr	r10, .L1800+36
 	mov	r8, #0
-.L1795:
+.L1781:
 	cmp	r7, r8
-	bne	.L1802
+	bne	.L1788
 	movs	r0, #0
 	add	sp, sp, #64
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1794:
+.L1780:
 	sub	r3, r8, r7
 	add	r2, sp, #20
 	uxtb	r3, r3
@@ -11996,19 +11880,19 @@ FlashProgSlc2KPages:
 	str	r3, [sp]
 	add	r3, sp, #24
 	bl	LogAddr2PhyAddr
-	ldr	r2, .L1814+4
+	ldr	r2, .L1800+4
 	ldr	r3, [sp, #24]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, r3
-	bhi	.L1789
+	bhi	.L1775
 	mov	r3, #-1
 	str	r3, [r6]
-.L1790:
+.L1776:
 	adds	r7, r7, #1
 	adds	r6, r6, #36
-	b	.L1788
-.L1789:
-	ldr	r2, .L1814+8
+	b	.L1774
+.L1775:
+	ldr	r2, .L1800+8
 	ldrb	r5, [r2, r3]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	NandcWaitFlashReady
@@ -12040,13 +11924,13 @@ FlashProgSlc2KPages:
 	add	r1, r1, r3
 	bl	FlashProgFirstCmd
 	ldr	r3, [r6, #8]
-	cbz	r3, .L1791
+	cbz	r3, .L1777
 	add	r3, r3, #2048
-.L1791:
+.L1777:
 	ldr	r2, [r6, #12]
-	cbz	r2, .L1792
+	cbz	r2, .L1778
 	adds	r2, r2, #8
-.L1792:
+.L1778:
 	str	r2, [sp]
 	movs	r1, #1
 	mov	r2, r10
@@ -12068,21 +11952,21 @@ FlashProgSlc2KPages:
 	movmi	r3, #-1
 	strmi	r3, [r6]
 	bl	NandcFlashDeCs
-	b	.L1790
-.L1802:
+	b	.L1776
+.L1788:
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	bne	.L1796
+	bne	.L1782
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1814+12
+	ldr	r0, .L1800+12
 	bl	printf
-.L1797:
+.L1783:
 	add	r8, r8, #1
 	adds	r4, r4, #36
-	b	.L1795
-.L1796:
+	b	.L1781
+.L1782:
 	sub	r3, r7, r8
-	ldr	fp, .L1814+40
+	ldr	fp, .L1800+40
 	uxtb	r3, r3
 	add	r2, sp, #20
 	ldr	r1, [sp, #12]
@@ -12111,50 +11995,50 @@ FlashProgSlc2KPages:
 	bl	FlashReadPages
 	ldr	r5, [sp, #28]
 	adds	r3, r5, #1
-	bne	.L1798
+	bne	.L1784
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1814+16
+	ldr	r0, .L1800+16
 	bl	printf
 	str	r5, [r4]
-.L1798:
+.L1784:
 	ldr	r5, [sp, #28]
 	cmp	r5, #256
-	bne	.L1799
+	bne	.L1785
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1814+20
+	ldr	r0, .L1800+20
 	bl	printf
 	str	r5, [r4]
-.L1799:
+.L1785:
 	ldr	r3, [r4, #12]
-	cbz	r3, .L1800
+	cbz	r3, .L1786
 	ldr	r2, [r3]
 	ldr	r3, [fp]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L1800
+	beq	.L1786
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1814+24
+	ldr	r0, .L1800+24
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4]
-.L1800:
+.L1786:
 	ldr	r3, [r4, #8]
 	cmp	r3, #0
-	beq	.L1797
+	beq	.L1783
 	ldr	r2, [r3]
 	ldr	r3, [r10]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L1797
+	beq	.L1783
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1814+28
+	ldr	r0, .L1800+28
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4]
-	b	.L1797
-.L1815:
+	b	.L1783
+.L1801:
 	.align	2
-.L1814:
+.L1800:
 	.word	.LANCHOR31
 	.word	.LANCHOR26
 	.word	.LANCHOR27
@@ -12180,7 +12064,7 @@ FlashProgPages:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #72
-	ldr	r5, .L1868
+	ldr	r5, .L1854
 	mov	r4, r0
 	mov	r8, r2
 	str	r1, [sp, #8]
@@ -12188,36 +12072,36 @@ FlashProgPages:
 	str	r3, [sp, #20]
 	ldrb	r5, [r5, #19]	@ zero_extendqisi2
 	str	r5, [sp, #16]
-	ldr	r5, .L1868+4
+	ldr	r5, .L1854+4
 	ldrb	r7, [r5]	@ zero_extendqisi2
-	cbnz	r7, .L1817
-	ldr	r3, .L1868+8
+	cbnz	r7, .L1803
+	ldr	r3, .L1854+8
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
 	str	r3, [sp, #12]
-.L1818:
+.L1804:
 	ldr	r3, [sp, #8]
 	cmp	r7, r3
-	bcc	.L1831
-	ldr	r6, .L1868+12
+	bcc	.L1817
+	ldr	r6, .L1854+12
 	movs	r5, #0
-	ldr	r7, .L1868+16
-.L1832:
+	ldr	r7, .L1854+16
+.L1818:
 	ldrb	r3, [r6]	@ zero_extendqisi2
 	cmp	r5, r3
-	bcc	.L1834
+	bcc	.L1820
 	ldr	r3, [sp, #20]
 	cmp	r3, #0
-	bne	.L1835
-.L1843:
+	bne	.L1821
+.L1829:
 	movs	r0, #0
-	b	.L1816
-.L1817:
+	b	.L1802
+.L1803:
 	bl	FlashProgSlc2KPages
-.L1816:
+.L1802:
 	add	sp, sp, #72
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1831:
+.L1817:
 	ldr	r3, [sp, #8]
 	movs	r6, #36
 	muls	r6, r7, r6
@@ -12230,81 +12114,81 @@ FlashProgPages:
 	mov	r0, fp
 	add	r3, sp, #32
 	bl	LogAddr2PhyAddr
-	ldr	r3, .L1868+12
+	ldr	r3, .L1854+12
 	mov	r10, r0
 	ldr	r0, [sp, #32]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r0
-	bhi	.L1820
+	bhi	.L1806
 	mov	r3, #-1
 	str	r3, [r4, r6]
-.L1821:
+.L1807:
 	adds	r7, r7, #1
-	b	.L1818
-.L1820:
-	ldr	r3, .L1868+20
+	b	.L1804
+.L1806:
+	ldr	r3, .L1854+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	ldr	r3, .L1868+24
+	ldr	r3, .L1854+24
 	it	eq
 	moveq	r10, #0
 	add	r3, r3, r0, lsl #4
 	ldr	r3, [r3, #8]
-	cbz	r3, .L1823
+	cbz	r3, .L1809
 	uxtb	r0, r0
 	bl	FlashWaitCmdDone
-.L1823:
+.L1809:
 	ldr	r3, [sp, #32]
 	movs	r1, #0
-	ldr	r2, .L1868+24
+	ldr	r2, .L1854+24
 	add	r2, r2, r3, lsl #4
 	str	r1, [r2, #12]
 	ldr	r1, [sp, #28]
 	str	fp, [r2, #8]
 	str	r1, [r2, #4]
 	cmp	r10, #0
-	beq	.L1824
+	beq	.L1810
 	add	r1, r6, #36
 	add	r1, r1, r4
 	str	r1, [r2, #12]
-.L1824:
-	ldr	r2, .L1868+28
+.L1810:
+	ldr	r2, .L1854+28
 	ldrb	r5, [r2, r3]	@ zero_extendqisi2
 	lsls	r3, r3, #4
-	ldr	r2, .L1868+24
+	ldr	r2, .L1854+24
 	mov	r0, r5
 	strb	r5, [r2, r3]
-	ldr	r3, .L1868+12
+	ldr	r3, .L1854+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1825
+	bne	.L1811
 	bl	NandcWaitFlashReady
-.L1826:
+.L1812:
 	ldr	r3, [sp, #16]
 	subs	r3, r3, #1
 	cmp	r3, #7
-	bhi	.L1827
-	ldr	r3, .L1868+32
+	bhi	.L1813
+	ldr	r3, .L1854+32
 	ldrb	r3, [r3, r5]	@ zero_extendqisi2
-	cbz	r3, .L1827
-	ldr	r1, .L1868+36
+	cbz	r3, .L1813
+	ldr	r1, .L1854+36
 	movs	r3, #0
 	mov	r0, r5
 	adds	r2, r1, #4
 	ldrb	r1, [r1, #1]	@ zero_extendqisi2
 	bl	HynixSetRRPara
-.L1827:
+.L1813:
 	mov	r0, r5
 	bl	NandcFlashCs
 	cmp	r8, #1
 	mov	r0, r5
-	bne	.L1828
-	ldr	r3, .L1868+16
+	bne	.L1814
+	ldr	r3, .L1854+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1828
+	beq	.L1814
 	bl	flash_enter_slc_mode
-.L1829:
+.L1815:
 	ldr	r1, [sp, #28]
 	mov	r0, r5
 	bl	FlashProgFirstCmd
@@ -12316,11 +12200,11 @@ FlashProgPages:
 	ldr	r3, [fp, #8]
 	bl	NandcXferData
 	cmp	r10, #0
-	beq	.L1830
+	beq	.L1816
 	ldr	r1, [sp, #28]
 	mov	r0, r5
 	bl	FlashProgDpFirstCmd
-	ldr	r3, .L1868+40
+	ldr	r3, .L1854+40
 	mov	r0, r5
 	ldr	r2, [sp, #32]
 	adds	r6, r6, #36
@@ -12331,7 +12215,7 @@ FlashProgPages:
 	it	ne
 	movne	r2, #1
 	bl	FlashWaitReadyEN
-	ldr	r3, .L1868+44
+	ldr	r3, .L1854+44
 	mov	r0, r5
 	ldr	r1, [sp, #28]
 	ldr	r3, [r3]
@@ -12344,19 +12228,19 @@ FlashProgPages:
 	str	r3, [sp]
 	ldr	r3, [r6, #8]
 	bl	NandcXferData
-.L1830:
+.L1816:
 	ldr	r1, [sp, #28]
 	mov	r0, r5
 	bl	FlashProgSecondCmd
 	mov	r0, r5
 	add	r7, r7, r10
 	bl	NandcFlashDeCs
-	b	.L1821
-.L1825:
+	b	.L1807
+.L1811:
 	bl	NandcFlashCs
 	ldr	r2, [sp, #32]
 	mov	r0, r5
-	ldr	r3, .L1868+40
+	ldr	r3, .L1854+40
 	ldr	r1, [sp, #28]
 	ldr	r2, [r3, r2, lsl #2]
 	adds	r2, r2, #0
@@ -12365,45 +12249,45 @@ FlashProgPages:
 	bl	FlashWaitReadyEN
 	mov	r0, r5
 	bl	NandcFlashDeCs
-	b	.L1826
-.L1828:
+	b	.L1812
+.L1814:
 	bl	flash_exit_slc_mode
-	b	.L1829
-.L1834:
+	b	.L1815
+.L1820:
 	uxtb	r0, r5
 	bl	FlashWaitCmdDone
 	cmp	r8, #1
-	bne	.L1833
+	bne	.L1819
 	ldrb	r3, [r7]	@ zero_extendqisi2
-	cbz	r3, .L1833
-	ldr	r2, .L1868+24
+	cbz	r3, .L1819
+	ldr	r2, .L1854+24
 	lsls	r3, r5, #4
 	ldrb	r0, [r2, r3]	@ zero_extendqisi2
 	bl	flash_exit_slc_mode
-.L1833:
+.L1819:
 	adds	r5, r5, #1
-	b	.L1832
-.L1835:
-	ldr	r10, .L1868+64
+	b	.L1818
+.L1821:
+	ldr	r10, .L1854+64
 	movs	r7, #0
-.L1836:
+.L1822:
 	ldr	r3, [sp, #8]
 	cmp	r7, r3
-	beq	.L1843
+	beq	.L1829
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	bne	.L1837
+	bne	.L1823
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1868+48
+	ldr	r0, .L1854+48
 	bl	printf
-.L1838:
+.L1824:
 	adds	r7, r7, #1
 	adds	r4, r4, #36
-	b	.L1836
-.L1837:
+	b	.L1822
+.L1823:
 	ldr	r3, [sp, #8]
 	add	r2, sp, #28
-	ldr	fp, .L1868+68
+	ldr	fp, .L1854+68
 	mov	r1, r8
 	mov	r0, r4
 	mov	r6, r4
@@ -12432,42 +12316,42 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	r5, [sp, #36]
 	adds	r3, r5, #1
-	bne	.L1839
+	bne	.L1825
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1868+52
+	ldr	r0, .L1854+52
 	bl	printf
 	str	r5, [r4]
-.L1839:
+.L1825:
 	ldr	r3, [r4, #12]
-	cbz	r3, .L1840
+	cbz	r3, .L1826
 	ldr	r2, [r3]
 	ldr	r3, [fp]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L1840
+	beq	.L1826
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1868+56
+	ldr	r0, .L1854+56
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4]
-.L1840:
+.L1826:
 	ldr	r3, [r4, #8]
 	cmp	r3, #0
-	beq	.L1838
+	beq	.L1824
 	ldr	r2, [r3]
 	ldr	r3, [r10]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L1838
+	beq	.L1824
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1868+60
+	ldr	r0, .L1854+60
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4]
-	b	.L1838
-.L1869:
+	b	.L1824
+.L1855:
 	.align	2
-.L1868:
+.L1854:
 	.word	.LANCHOR7
 	.word	.LANCHOR2
 	.word	.LANCHOR31
@@ -12498,14 +12382,14 @@ FlashProgPages:
 FlashTestBlk:
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1873
+	ldr	r3, .L1859
 	push	{r4, r5, lr}
 	mov	r4, r0
 	sub	sp, sp, #108
 	ldr	r3, [r3]
 	cmp	r0, r3
-	bcc	.L1872
-	ldr	r5, .L1873+4
+	bcc	.L1858
+	ldr	r5, .L1859+4
 	add	r0, sp, #40
 	movs	r2, #32
 	movs	r1, #165
@@ -12537,19 +12421,19 @@ FlashTestBlk:
 	movne	r4, #1
 	negs	r4, r4
 	bl	FlashEraseBlocks
-.L1870:
+.L1856:
 	mov	r0, r4
 	add	sp, sp, #108
 	@ sp needed
 	pop	{r4, r5, pc}
-.L1872:
+.L1858:
 	movs	r4, #0
-	b	.L1870
-.L1874:
+	b	.L1856
+.L1860:
 	.align	2
-.L1873:
+.L1859:
 	.word	.LANCHOR156
-	.word	.LANCHOR152
+	.word	.LANCHOR149
 	.size	FlashTestBlk, .-FlashTestBlk
 	.section	.text.FtlLowFormatEraseBlock,"ax",%progbits
 	.align	1
@@ -12562,48 +12446,48 @@ FlashTestBlk:
 FtlLowFormatEraseBlock:
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1920
+	ldr	r3, .L1906
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #40
 	str	r0, [sp, #8]
 	ldr	r3, [r3]
 	str	r1, [sp, #4]
 	cmp	r3, #0
-	bne	.L1902
-	ldr	r2, .L1920+4
+	bne	.L1888
+	ldr	r2, .L1906+4
 	mov	r10, r3
 	mov	r5, r3
 	mov	r4, r3
 	mov	r8, #36
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	str	r2, [sp, #20]
-	ldr	r2, .L1920+8
+	ldr	r2, .L1906+8
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	str	r2, [sp, #12]
-	ldr	r2, .L1920+12
+	ldr	r2, .L1906+12
 	str	r0, [r2]
-	ldr	r2, .L1920+16
+	ldr	r2, .L1906+16
 	ldrh	fp, [r2]
-	ldr	r2, .L1920+20
+	ldr	r2, .L1906+20
 	ldr	r7, [r2]
-	ldr	r2, .L1920+24
+	ldr	r2, .L1906+24
 	ldr	r2, [r2]
 	str	r2, [sp, #16]
-	ldr	r2, .L1920+28
+	ldr	r2, .L1906+28
 	ldrh	r2, [r2]
 	str	r2, [sp, #24]
-.L1877:
+.L1863:
 	uxth	r2, r10
 	cmp	fp, r2
-	bhi	.L1881
+	bhi	.L1867
 	cmp	r5, #0
-	beq	.L1875
+	beq	.L1861
 	ldr	r3, [sp, #12]
 	mov	r0, r7
-	ldr	r10, .L1920+4
+	ldr	r10, .L1906+4
 	mov	r8, #0
 	mov	r2, r5
-	ldr	r7, .L1920+20
+	ldr	r7, .L1906+20
 	adds	r6, r3, #0
 	it	ne
 	movne	r6, #1
@@ -12613,44 +12497,44 @@ FtlLowFormatEraseBlock:
 	ldrb	r3, [sp, #20]	@ zero_extendqisi2
 	strb	r3, [r10]
 	mov	r10, #36
-.L1883:
+.L1869:
 	uxth	r3, r8
 	cmp	r5, r3
-	bhi	.L1885
+	bhi	.L1871
 	ldr	r3, [sp, #4]
 	cmp	r3, #0
-	bne	.L1886
+	bne	.L1872
 	uxth	r6, r6
 	movs	r3, #6
 	str	r3, [sp, #16]
 	movs	r3, #1
 	str	r3, [sp, #12]
-.L1887:
+.L1873:
 	mov	r8, #0
-.L1896:
-	ldr	r3, .L1920+16
+.L1882:
+	ldr	r3, .L1906+16
 	mov	fp, #0
 	mov	r5, fp
 	ldrh	r3, [r3]
 	str	r3, [sp, #24]
-	ldr	r3, .L1920+20
+	ldr	r3, .L1906+20
 	ldr	r10, [r3]
-	ldr	r3, .L1920+32
+	ldr	r3, .L1906+32
 	ldr	r3, [r3]
 	str	r3, [sp, #28]
-	ldr	r3, .L1920+36
+	ldr	r3, .L1906+36
 	ldr	r3, [r3]
 	str	r3, [sp, #32]
-	ldr	r3, .L1920+28
+	ldr	r3, .L1906+28
 	ldrh	r3, [r3]
 	str	r3, [sp, #36]
-.L1888:
+.L1874:
 	ldr	r3, [sp, #24]
 	uxth	r2, fp
 	cmp	r3, r2
-	bhi	.L1891
-	cbz	r5, .L1875
-	ldr	fp, .L1920+4
+	bhi	.L1877
+	cbz	r5, .L1861
+	ldr	fp, .L1906+4
 	movs	r3, #1
 	mov	r0, r10
 	movs	r7, #0
@@ -12659,59 +12543,59 @@ FtlLowFormatEraseBlock:
 	strb	r7, [fp]
 	bl	FlashProgPages
 	ldrb	r3, [sp, #20]	@ zero_extendqisi2
-	ldr	r10, .L1920+20
+	ldr	r10, .L1906+20
 	strb	r3, [fp]
 	mov	fp, #36
-.L1893:
+.L1879:
 	uxth	r3, r7
 	cmp	r5, r3
-	bhi	.L1895
+	bhi	.L1881
 	ldr	r3, [sp, #16]
 	add	r8, r8, r3
 	ldr	r3, [sp, #12]
 	uxth	r8, r8
 	cmp	r3, r8
-	bhi	.L1896
-	ldr	r8, .L1920+20
+	bhi	.L1882
+	ldr	r8, .L1906+20
 	movs	r7, #0
 	mov	r10, #36
-.L1897:
+.L1883:
 	uxth	r3, r7
 	cmp	r5, r3
-	bhi	.L1899
+	bhi	.L1885
 	ldr	r3, [sp, #8]
 	cmp	r3, #63
-	bls	.L1900
+	bls	.L1886
 	ldr	r3, [sp, #4]
-	cbz	r3, .L1875
-.L1900:
-	ldr	r3, .L1920+20
+	cbz	r3, .L1861
+.L1886:
+	ldr	r3, .L1906+20
 	mov	r2, r5
 	mov	r1, r6
 	ldr	r0, [r3]
 	bl	FlashEraseBlocks
-.L1875:
+.L1861:
 	mov	r0, r4
 	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1881:
+.L1867:
 	mul	r2, r8, r10
 	movs	r3, #0
 	ldr	r1, [sp, #8]
 	str	r3, [r7, r2]
-	ldr	r3, .L1920+40
+	ldr	r3, .L1906+40
 	ldrb	r0, [r3, r10]	@ zero_extendqisi2
 	bl	V2P_block
 	ldr	r3, [sp, #4]
 	mov	r6, r0
-	cbz	r3, .L1878
+	cbz	r3, .L1864
 	bl	IsBlkInVendorPart
-	cbnz	r0, .L1879
-.L1878:
+	cbnz	r0, .L1865
+.L1864:
 	mov	r0, r6
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L1880
+	cbnz	r0, .L1866
 	ldr	r3, [sp, #24]
 	mla	r1, r8, r5, r7
 	lsls	r6, r6, #10
@@ -12724,62 +12608,62 @@ FtlLowFormatEraseBlock:
 	bic	r2, r2, #3
 	add	r2, r2, r3
 	str	r2, [r1, #12]
-.L1879:
+.L1865:
 	add	r10, r10, #1
-	b	.L1877
-.L1880:
+	b	.L1863
+.L1866:
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L1879
-.L1885:
+	b	.L1865
+.L1871:
 	mul	r3, r10, r8
 	ldr	r2, [r7]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
 	adds	r3, r3, #1
-	bne	.L1884
+	bne	.L1870
 	ldr	r0, [r1, #4]
 	adds	r4, r4, #1
 	uxth	r4, r4
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.L1884:
+.L1870:
 	add	r8, r8, #1
-	b	.L1883
-.L1886:
-	ldr	r3, .L1920+44
+	b	.L1869
+.L1872:
+	ldr	r3, .L1906+44
 	ldrh	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L1920+8
+	ldr	r3, .L1906+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L1903
+	cbnz	r3, .L1889
 	ldr	r3, [sp, #12]
 	movs	r6, #1
 	lsrs	r3, r3, #2
 	str	r3, [sp, #16]
-	b	.L1887
-.L1903:
+	b	.L1873
+.L1889:
 	movs	r6, #1
 	str	r6, [sp, #16]
-	b	.L1887
-.L1891:
+	b	.L1873
+.L1877:
 	movs	r3, #36
 	ldr	r1, [sp, #8]
 	mul	r2, r3, fp
 	movs	r3, #0
 	str	r3, [r10, r2]
-	ldr	r3, .L1920+40
+	ldr	r3, .L1906+40
 	ldrb	r0, [r3, fp]	@ zero_extendqisi2
 	bl	V2P_block
 	ldr	r3, [sp, #4]
 	mov	r7, r0
-	cbz	r3, .L1889
+	cbz	r3, .L1875
 	bl	IsBlkInVendorPart
-	cbnz	r0, .L1890
-.L1889:
+	cbnz	r0, .L1876
+.L1875:
 	mov	r0, r7
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L1890
+	cbnz	r0, .L1876
 	movs	r3, #36
 	add	r7, r8, r7, lsl #10
 	mla	r1, r3, r5, r10
@@ -12794,44 +12678,44 @@ FtlLowFormatEraseBlock:
 	bic	r2, r2, #3
 	add	r2, r2, r3
 	str	r2, [r1, #12]
-.L1890:
+.L1876:
 	add	fp, fp, #1
-	b	.L1888
-.L1895:
+	b	.L1874
+.L1881:
 	mul	r3, fp, r7
 	ldr	r2, [r10]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
-	cbz	r3, .L1894
+	cbz	r3, .L1880
 	ldr	r0, [r1, #4]
 	adds	r4, r4, #1
 	uxth	r4, r4
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.L1894:
+.L1880:
 	adds	r7, r7, #1
-	b	.L1893
-.L1899:
+	b	.L1879
+.L1885:
 	ldr	r3, [sp, #4]
-	cbz	r3, .L1898
+	cbz	r3, .L1884
 	mul	r3, r10, r7
 	ldr	r2, [r8]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
-	cbnz	r3, .L1898
+	cbnz	r3, .L1884
 	ldr	r0, [r1, #4]
 	movs	r1, #1
 	ubfx	r0, r0, #10, #16
 	bl	FtlFreeSysBlkQueueIn
-.L1898:
+.L1884:
 	adds	r7, r7, #1
-	b	.L1897
-.L1902:
+	b	.L1883
+.L1888:
 	movs	r4, #0
-	b	.L1875
-.L1921:
+	b	.L1861
+.L1907:
 	.align	2
-.L1920:
+.L1906:
 	.word	.LANCHOR78
 	.word	.LANCHOR28
 	.word	.LANCHOR16
@@ -12857,33 +12741,33 @@ FtlBbmTblFlush:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L1938
+	ldr	r3, .L1924
 	ldr	r4, [r3]
 	str	r3, [sp, #12]
 	cmp	r4, #0
-	bne	.L1924
-	ldr	r3, .L1938+4
+	bne	.L1910
+	ldr	r3, .L1924+4
 	mov	r1, r4
-	ldr	r7, .L1938+8
-	ldr	r5, .L1938+12
+	ldr	r7, .L1924+8
+	ldr	r5, .L1924+12
 	ldr	r3, [r3]
 	ldr	r0, [r7]
 	mov	fp, r7
-	ldr	r6, .L1938+16
+	ldr	r6, .L1924+16
 	str	r3, [r5, #12]
-	ldr	r7, .L1938+20
-	ldr	r3, .L1938+24
-	ldr	r8, .L1938+56
+	ldr	r7, .L1924+20
+	ldr	r3, .L1924+24
+	ldr	r8, .L1924+56
 	str	r0, [r5, #8]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-.L1925:
+.L1911:
 	ldrh	r3, [r7]
 	cmp	r4, r3
-	blt	.L1926
+	blt	.L1912
 	ldr	r6, [r5, #12]
 	movs	r2, #16
-	ldr	r4, .L1938+28
+	ldr	r4, .L1924+28
 	movs	r1, #255
 	movs	r7, #0
 	mov	r0, r6
@@ -12900,15 +12784,15 @@ FtlBbmTblFlush:
 	strh	r3, [r6, #8]	@ movhi
 	ldrh	r3, [r4, #6]
 	strh	r3, [r6, #10]	@ movhi
-	ldr	r3, .L1938+32
+	ldr	r3, .L1924+32
 	ldr	r3, [r3]
 	strh	r3, [r6, #12]	@ movhi
-.L1927:
+.L1913:
 	ldr	r3, [fp]
 	ldrh	r2, [r4, #2]
 	ldrh	r1, [r4]
 	str	r3, [r5, #8]
-	ldr	r3, .L1938+4
+	ldr	r3, .L1924+4
 	ldrh	r0, [r6, #10]
 	ldr	r3, [r3]
 	str	r3, [r5, #12]
@@ -12918,14 +12802,14 @@ FtlBbmTblFlush:
 	str	r3, [r5, #4]
 	ldrh	r3, [r4, #4]
 	str	r0, [sp]
-	ldr	r0, .L1938+36
+	ldr	r0, .L1924+36
 	bl	printf
-	ldr	r3, .L1938+40
+	ldr	r3, .L1924+40
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1928
+	blt	.L1914
 	ldr	r3, [r4, #8]
 	mov	r1, #0	@ movhi
 	ldrh	r2, [r4]
@@ -12936,7 +12820,7 @@ FtlBbmTblFlush:
 	strh	r2, [r6, #8]	@ movhi
 	ldrh	r3, [r4, #4]
 	strh	r2, [r4, #4]	@ movhi
-	ldr	r2, .L1938+44
+	ldr	r2, .L1924+44
 	strh	r3, [r4]	@ movhi
 	lsls	r3, r3, #10
 	ldr	r0, [r2]
@@ -12945,9 +12829,9 @@ FtlBbmTblFlush:
 	mov	r1, r2
 	str	r3, [r0, #4]
 	bl	FlashEraseBlocks
-.L1928:
+.L1914:
 	movs	r3, #1
-	ldr	r0, .L1938+12
+	ldr	r0, .L1924+12
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
@@ -12956,27 +12840,27 @@ FtlBbmTblFlush:
 	strh	r3, [r10, #2]	@ movhi
 	ldr	r3, [r5]
 	adds	r2, r3, #1
-	bne	.L1929
+	bne	.L1915
 	adds	r7, r7, #1
 	ldr	r1, [r5, #4]
 	uxth	r7, r7
-	ldr	r0, .L1938+48
+	ldr	r0, .L1924+48
 	bl	printf
 	cmp	r7, #3
-	bls	.L1927
+	bls	.L1913
 	mov	r2, r7
 	ldr	r1, [r5, #4]
-	ldr	r0, .L1938+52
+	ldr	r0, .L1924+52
 	bl	printf
 	ldr	r2, [sp, #12]
 	movs	r3, #1
 	str	r3, [r2]
-.L1924:
+.L1910:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1926:
+.L1912:
 	ldrh	r2, [r8]
 	ldr	r3, [r5, #8]
 	ldr	r1, [r6, #4]!
@@ -12985,17 +12869,17 @@ FtlBbmTblFlush:
 	adds	r4, r4, #1
 	add	r0, r3, r0, lsl #2
 	bl	ftl_memcpy
-	b	.L1925
-.L1929:
+	b	.L1911
+.L1915:
 	add	r8, r8, #1
 	cmp	r8, #1
-	beq	.L1927
+	beq	.L1913
 	cmp	r3, #256
-	beq	.L1927
-	b	.L1924
-.L1939:
+	beq	.L1913
+	b	.L1910
+.L1925:
 	.align	2
-.L1938:
+.L1924:
 	.word	.LANCHOR78
 	.word	.LANCHOR195
 	.word	.LANCHOR189
@@ -13023,149 +12907,149 @@ FtlBbmTblFlush:
 allocate_data_superblock:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2005
+	ldr	r3, .L1991
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L1942
-.L1941:
-	ldr	r3, .L2005+4
-	ldr	r8, .L2005+60
-	ldr	r7, .L2005+8
+	bne	.L1928
+.L1927:
+	ldr	r3, .L1991+4
+	ldr	r8, .L1991+60
+	ldr	r7, .L1991+8
 	ldrh	r3, [r3]
 	ldrh	r2, [r8]
 	add	r3, r3, r2
 	ldrh	r2, [r7]
 	cmp	r3, r2
-	ble	.L1943
-	ldr	r1, .L2005+12
+	ble	.L1929
+	ldr	r1, .L1991+12
 	movw	r2, #3507
-	ldr	r0, .L2005+16
+	ldr	r0, .L1991+16
 	bl	printf
-	ldr	r1, .L2005+20
-	ldr	r0, .L2005+24
+	ldr	r1, .L1991+20
+	ldr	r0, .L1991+24
 	bl	printf
-.L1943:
-	ldr	r3, .L2005+28
+.L1929:
+	ldr	r3, .L1991+28
 	ldrb	r2, [r4, #8]	@ zero_extendqisi2
 	cmp	r4, r3
-	bne	.L1944
-	ldr	r3, .L2005+4
+	bne	.L1930
+	ldr	r3, .L1991+4
 	ldrh	r5, [r3]
-	ldr	r3, .L2005+32
+	ldr	r3, .L1991+32
 	ldr	r3, [r3]
 	lsrs	r0, r5, #1
 	adds	r1, r0, #1
 	mul	r6, r3, r5
 	add	r1, r1, r6, lsr #2
-	ldr	r6, .L2005+36
+	ldr	r6, .L1991+36
 	uxth	r1, r1
 	ldr	r6, [r6]
-	cbz	r6, .L1945
-	ldr	r6, .L2005+40
+	cbz	r6, .L1931
+	ldr	r6, .L1991+40
 	ldr	r6, [r6]
 	cmp	r6, #39
-	bhi	.L1945
+	bhi	.L1931
 	cmp	r6, #2
-	bls	.L1979
+	bls	.L1965
 	lsls	r1, r5, #31
-	bpl	.L1975
+	bpl	.L1961
 	cmp	r3, #0
-	beq	.L1979
-.L1975:
+	beq	.L1965
+.L1961:
 	mov	r1, r0
-	b	.L1945
-.L1944:
+	b	.L1931
+.L1930:
 	cmp	r2, #1
-	bne	.L1979
-	ldr	r3, .L2005+44
+	bne	.L1965
+	ldr	r3, .L1991+44
 	ldrh	r3, [r3]
 	cmp	r3, #1
-	beq	.L1979
-	ldr	r3, .L2005+48
+	beq	.L1965
+	ldr	r3, .L1991+48
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1979
-	ldr	r3, .L2005+4
-	ldr	r0, .L2005+36
+	bne	.L1965
+	ldr	r3, .L1991+4
+	ldr	r0, .L1991+36
 	ldrh	r3, [r3]
 	ldr	r0, [r0]
 	lsrs	r1, r3, #3
-	cbz	r0, .L1945
-	ldr	r0, .L2005+40
+	cbz	r0, .L1931
+	ldr	r0, .L1991+40
 	ldr	r0, [r0]
 	cmp	r0, #1
-	bhi	.L1945
+	bhi	.L1931
 	rsb	r3, r3, r3, lsl #3
 	ubfx	r1, r3, #3, #16
-.L1945:
-	cbz	r1, .L1946
+.L1931:
+	cbz	r1, .L1932
 	subs	r1, r1, #1
 	uxth	r1, r1
-.L1946:
-	ldr	r0, .L2005+52
+.L1932:
+	ldr	r0, .L1991+52
 	bl	List_pop_index_node
-	ldr	r3, .L2005+4
+	ldr	r3, .L1991+4
 	mov	r5, r0
 	uxth	r10, r0
 	ldrh	r3, [r3]
-	cbnz	r3, .L1947
-	ldr	r1, .L2005+12
+	cbnz	r3, .L1933
+	ldr	r1, .L1991+12
 	movw	r2, #3532
-	ldr	r0, .L2005+16
+	ldr	r0, .L1991+16
 	bl	printf
-	ldr	r1, .L2005+20
-	ldr	r0, .L2005+24
+	ldr	r1, .L1991+20
+	ldr	r0, .L1991+24
 	bl	printf
-.L1947:
-	ldr	r3, .L2005+4
-	ldr	r2, .L2005+4
+.L1933:
+	ldr	r3, .L1991+4
+	ldr	r2, .L1991+4
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	strh	r3, [r2]	@ movhi
 	ldrh	r3, [r7]
 	cmp	r3, r10
-	bls	.L1941
+	bls	.L1927
 	uxth	r5, r5
 	lsls	r3, r5, #1
 	str	r3, [sp]
-	ldr	r3, .L2005+56
+	ldr	r3, .L1991+56
 	ldr	r3, [r3]
 	ldrh	r6, [r3, r5, lsl #1]
 	cmp	r6, #0
-	bne	.L1941
+	bne	.L1927
 	strh	r10, [r4]	@ movhi
 	mov	r0, r4
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1949
-	ldr	r3, .L2005+56
+	bne	.L1935
+	ldr	r3, .L1991+56
 	movw	r2, #65535
 	ldr	r3, [r3]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
-	ldr	r3, .L2005+4
+	ldr	r3, .L1991+4
 	ldrh	r2, [r8]
 	ldrh	r3, [r3]
 	add	r3, r3, r2
 	ldrh	r2, [r7]
 	cmp	r3, r2
-	ble	.L1941
+	ble	.L1927
 	mov	r2, #3552
-	ldr	r1, .L2005+12
-	ldr	r0, .L2005+16
+	ldr	r1, .L1991+12
+	ldr	r0, .L1991+16
 	bl	printf
-	ldr	r1, .L2005+20
-	ldr	r0, .L2005+24
+	ldr	r1, .L1991+20
+	ldr	r0, .L1991+24
 	bl	printf
-	b	.L1941
-.L1979:
+	b	.L1927
+.L1965:
 	movs	r1, #0
-	b	.L1946
-.L2006:
+	b	.L1932
+.L1992:
 	.align	2
-.L2005:
+.L1991:
 	.word	.LANCHOR78
 	.word	.LANCHOR90
 	.word	.LANCHOR40
@@ -13182,82 +13066,82 @@ allocate_data_superblock:
 	.word	.LANCHOR89
 	.word	.LANCHOR85
 	.word	.LANCHOR87
-.L1949:
-	ldr	r3, .L2007
+.L1935:
+	ldr	r3, .L1993
 	ldrh	r2, [r8]
 	ldrh	r3, [r3]
 	add	r3, r3, r2
 	ldrh	r2, [r7]
 	cmp	r3, r2
-	ble	.L1951
-	ldr	r1, .L2007+4
+	ble	.L1937
+	ldr	r1, .L1993+4
 	movw	r2, #3556
-	ldr	r0, .L2007+8
+	ldr	r0, .L1993+8
 	bl	printf
-	ldr	r1, .L2007+12
-	ldr	r0, .L2007+16
+	ldr	r1, .L1993+12
+	ldr	r0, .L1993+16
 	bl	printf
-.L1951:
-	ldr	r3, .L2007+20
+.L1937:
+	ldr	r3, .L1993+20
 	add	lr, r4, #16
-	ldr	r2, .L2007+24
+	ldr	r2, .L1993+24
 	mov	r8, #0
 	ldr	ip, [r3]
 	ldrh	r0, [r2]
 	movs	r2, #36
 	mov	r3, ip
 	mla	r0, r2, r0, ip
-.L1952:
+.L1938:
 	cmp	r0, r3
-	bne	.L1954
-	cbnz	r6, .L1955
-	ldr	r1, .L2007+4
+	bne	.L1940
+	cbnz	r6, .L1941
+	ldr	r1, .L1993+4
 	movw	r2, #3571
-	ldr	r0, .L2007+8
+	ldr	r0, .L1993+8
 	bl	printf
-	ldr	r1, .L2007+12
-	ldr	r0, .L2007+16
+	ldr	r1, .L1993+12
+	ldr	r0, .L1993+16
 	bl	printf
-.L1955:
-	ldr	r3, .L2007+28
-	ldr	r8, .L2007+80
+.L1941:
+	ldr	r3, .L1993+28
+	ldr	r8, .L1993+80
 	ldr	r3, [r3]
-	cbz	r3, .L1956
-	ldr	r3, .L2007+32
+	cbz	r3, .L1942
+	ldr	r3, .L1993+32
 	cmp	r4, r3
-	bne	.L1956
+	bne	.L1942
 	ldr	r3, [r8]
 	ldrh	r3, [r3, r5, lsl #1]
 	cmp	r3, #40
 	itt	hi
 	movhi	r3, #0
 	strbhi	r3, [r4, #8]
-.L1956:
-	ldr	r3, .L2007+36
+.L1942:
+	ldr	r3, .L1993+36
 	ldrh	r3, [r3]
 	cmp	r3, r10
-	bne	.L1957
-	ldr	r1, .L2007+4
+	bne	.L1943
+	ldr	r1, .L1993+4
 	movw	r2, #3578
-	ldr	r0, .L2007+8
+	ldr	r0, .L1993+8
 	bl	printf
-	ldr	r1, .L2007+12
-	ldr	r0, .L2007+16
+	ldr	r1, .L1993+12
+	ldr	r0, .L1993+16
 	bl	printf
-.L1957:
+.L1943:
 	ldrb	r2, [r4, #8]	@ zero_extendqisi2
-	ldr	r3, .L2007+40
-	ldr	fp, .L2007+84
+	ldr	r3, .L1993+40
+	ldr	fp, .L1993+84
 	cmp	r2, #0
-	bne	.L1958
+	bne	.L1944
 	ldr	r1, [r8]
 	ldrh	r2, [r1, r5, lsl #1]
 	cmp	r2, #0
-	beq	.L1959
-	ldr	r0, .L2007+44
+	beq	.L1945
+	ldr	r0, .L1993+44
 	ldrh	r0, [r0]
 	add	r2, r2, r0
-.L2002:
+.L1988:
 	strh	r2, [r1, r5, lsl #1]	@ movhi
 	mov	r0, r10
 	ldr	r2, [r3]
@@ -13266,43 +13150,43 @@ allocate_data_superblock:
 	adds	r2, r2, #1
 	str	r2, [r3]
 	bl	ftl_set_blk_mode
-.L2003:
+.L1989:
 	ldr	r2, [r8]
 	ldr	r3, [sp, #4]
 	ldrh	r0, [r2, r5, lsl #1]
-	ldr	r2, .L2007+48
+	ldr	r2, .L1993+48
 	ldr	r1, [r2]
 	cmp	r0, r1
 	ldrh	r1, [r7]
 	it	hi
 	strhi	r0, [r2]
-	ldr	r2, .L2007+44
+	ldr	r2, .L1993+44
 	ldr	r0, [r3]
 	ldr	r3, [fp]
 	ldrh	r2, [r2]
-	ldr	r7, .L2007+52
+	ldr	r7, .L1993+52
 	mla	r0, r0, r2, r3
 	bl	__aeabi_uidiv
-	ldr	r3, .L2007+56
+	ldr	r3, .L1993+56
 	str	r0, [r3]
-	ldr	r3, .L2007+60
+	ldr	r3, .L1993+60
 	ldr	r2, [r3]
 	ldr	r3, [r2, #16]
 	adds	r3, r3, #1
 	str	r3, [r2, #16]
-	ldr	r3, .L2007+20
+	ldr	r3, .L1993+20
 	ldr	r0, [r3]
 	movs	r3, #36
 	adds	r1, r0, #4
 	mla	r3, r3, r6, r0
 	adds	r3, r3, #40
-.L1963:
+.L1949:
 	adds	r1, r1, #36
 	cmp	r3, r1
-	bne	.L1964
-	ldr	r3, .L2007+64
+	bne	.L1950
+	ldr	r3, .L1993+64
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1965
+	cbz	r3, .L1951
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	mov	r2, r6
 	cmp	r3, #1
@@ -13310,8 +13194,8 @@ allocate_data_superblock:
 	moveq	r1, #0
 	movne	r1, #1
 	bl	FlashEraseBlocks
-.L1965:
-	ldr	r3, .L2007+20
+.L1951:
+	ldr	r3, .L1993+20
 	movs	r7, #0
 	mov	r8, r7
 	mov	fp, #36
@@ -13319,43 +13203,43 @@ allocate_data_superblock:
 	ldrb	r1, [r4, #8]	@ zero_extendqisi2
 	ldr	r0, [r3]
 	bl	FlashEraseBlocks
-.L1967:
+.L1953:
 	uxth	r3, r7
 	cmp	r6, r3
-	bhi	.L1969
+	bhi	.L1955
 	cmp	r8, #0
-	beq	.L1970
+	beq	.L1956
 	mov	r0, r10
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L1970:
+.L1956:
 	ldrb	r2, [r4, #7]	@ zero_extendqisi2
 	cmp	r2, #0
-	bne	.L1971
-	ldr	r3, .L2007+68
+	bne	.L1957
+	ldr	r3, .L1993+68
 	movw	r2, #65535
 	ldr	r3, [r3]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
-	b	.L1941
-.L1954:
+	b	.L1927
+.L1940:
 	ldrh	r1, [lr], #2
 	movw	fp, #65535
 	str	r8, [r3, #8]
 	str	r8, [r3, #12]
 	cmp	r1, fp
-	beq	.L1953
+	beq	.L1939
 	mla	fp, r2, r6, ip
 	adds	r6, r6, #1
 	lsls	r1, r1, #10
 	uxth	r6, r6
 	str	r1, [fp, #4]
-.L1953:
+.L1939:
 	adds	r3, r3, #36
-	b	.L1952
-.L1959:
+	b	.L1938
+.L1945:
 	movs	r2, #2
-	b	.L2002
-.L1958:
+	b	.L1988
+.L1944:
 	ldr	r1, [r8]
 	mov	r0, r10
 	str	r3, [sp, #4]
@@ -13366,20 +13250,20 @@ allocate_data_superblock:
 	adds	r2, r2, #1
 	str	r2, [fp]
 	bl	ftl_set_blk_mode.part.11
-	b	.L2003
-.L1964:
+	b	.L1989
+.L1950:
 	ldr	r2, [r1, #-36]
 	ands	r2, r2, r7
 	str	r2, [r1, #-36]
-	b	.L1963
-.L1969:
-	ldr	r2, .L2007+20
+	b	.L1949
+.L1955:
+	ldr	r2, .L1993+20
 	mul	r3, fp, r7
 	ldr	r2, [r2]
 	adds	r1, r2, r3
 	ldr	r2, [r2, r3]
 	adds	r3, r2, #1
-	bne	.L1968
+	bne	.L1954
 	ldr	r0, [r1, #4]
 	add	r8, r8, #1
 	str	r2, [sp, #4]
@@ -13391,12 +13275,12 @@ allocate_data_superblock:
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	strb	r3, [r4, #7]
-.L1968:
+.L1954:
 	adds	r7, r7, #1
-	b	.L1967
-.L1971:
-	ldr	r3, .L2007+72
-	ldr	r1, .L2007+76
+	b	.L1953
+.L1957:
+	ldr	r3, .L1993+72
+	ldr	r1, .L1993+76
 	ldrh	r3, [r3]
 	strh	r10, [r4]	@ movhi
 	smulbb	r3, r3, r2
@@ -13409,30 +13293,30 @@ allocate_data_superblock:
 	str	r2, [r4, #12]
 	adds	r2, r2, #1
 	str	r2, [r1]
-	ldr	r2, .L2007+68
+	ldr	r2, .L1993+68
 	ldr	r1, [sp]
 	ldr	r2, [r2]
 	strh	r3, [r2, r1]	@ movhi
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L1972
+	cbz	r3, .L1958
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1942
-.L1972:
-	ldr	r1, .L2007+4
+	cbnz	r3, .L1928
+.L1958:
+	ldr	r1, .L1993+4
 	movw	r2, #3642
-	ldr	r0, .L2007+8
+	ldr	r0, .L1993+8
 	bl	printf
-	ldr	r1, .L2007+12
-	ldr	r0, .L2007+16
+	ldr	r1, .L1993+12
+	ldr	r0, .L1993+16
 	bl	printf
-.L1942:
+.L1928:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2008:
+.L1994:
 	.align	2
-.L2007:
+.L1993:
 	.word	.LANCHOR90
 	.word	.LANCHOR212
 	.word	.LC5
@@ -13469,43 +13353,43 @@ FtlGcFreeBadSuperBlk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, r0
-	ldr	r4, .L2021
+	ldr	r4, .L2007
 	ldrh	r3, [r4]
-	cbz	r3, .L2010
-	ldr	r8, .L2021+12
+	cbz	r3, .L1996
+	ldr	r8, .L2007+12
 	movs	r7, #0
-.L2011:
-	ldr	r3, .L2021+4
+.L1997:
+	ldr	r3, .L2007+4
 	ldrh	r2, [r3]
 	uxth	r3, r7
 	cmp	r2, r3
-	bhi	.L2017
+	bhi	.L2003
 	bl	FtlGcReFreshBadBlk
-.L2010:
+.L1996:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2017:
-	ldr	r2, .L2021+8
+.L2003:
+	ldr	r2, .L2007+8
 	uxth	r3, r7
 	mov	r1, r10
 	mov	fp, #0
 	ldrb	r0, [r2, r3]	@ zero_extendqisi2
 	bl	V2P_block
 	mov	r1, r0
-.L2012:
+.L1998:
 	ldrh	r3, [r4]
 	uxth	r5, fp
 	cmp	r3, r5
-	bhi	.L2016
+	bhi	.L2002
 	adds	r7, r7, #1
-	b	.L2011
-.L2016:
+	b	.L1997
+.L2002:
 	uxth	r6, fp
 	ldrh	r3, [r8, r6, lsl #1]
 	cmp	r3, r1
-	bne	.L2013
+	bne	.L1999
 	mov	r0, r1
 	str	r1, [sp, #4]
 	bl	FtlBbmMapBadBlock
@@ -13513,23 +13397,23 @@ FtlGcFreeBadSuperBlk:
 	ldrh	r2, [r4]
 	add	r3, r8, r6, lsl #1
 	ldr	r1, [sp, #4]
-.L2014:
+.L2000:
 	cmp	r5, r2
-	bcc	.L2015
+	bcc	.L2001
 	subs	r2, r2, #1
 	strh	r2, [r4]	@ movhi
-.L2013:
+.L1999:
 	add	fp, fp, #1
-	b	.L2012
-.L2015:
+	b	.L1998
+.L2001:
 	ldrh	r0, [r3, #2]!
 	adds	r5, r5, #1
 	uxth	r5, r5
 	strh	r0, [r3, #-2]	@ movhi
-	b	.L2014
-.L2022:
+	b	.L2000
+.L2008:
 	.align	2
-.L2021:
+.L2007:
 	.word	.LANCHOR119
 	.word	.LANCHOR38
 	.word	.LANCHOR47
@@ -13548,32 +13432,32 @@ update_vpc_list:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	mov	r4, r0
-	ldr	r3, .L2033
+	ldr	r3, .L2019
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	bne	.L2024
-	ldr	r2, .L2033+4
+	bne	.L2010
+	ldr	r2, .L2019+4
 	ldrh	r1, [r2]
 	cmp	r1, r0
-	bne	.L2025
+	bne	.L2011
 	movw	r3, #65535
 	strh	r3, [r2]	@ movhi
-.L2026:
-	ldr	r5, .L2033+8
+.L2012:
+	ldr	r5, .L2019+8
 	mov	r1, r4
-	ldr	r0, .L2033+12
+	ldr	r0, .L2019+12
 	bl	List_remove_node
 	ldrh	r3, [r5]
-	cbnz	r3, .L2028
-	ldr	r1, .L2033+16
+	cbnz	r3, .L2014
+	ldr	r1, .L2019+16
 	movw	r2, #3767
-	ldr	r0, .L2033+20
+	ldr	r0, .L2019+20
 	bl	printf
-	ldr	r1, .L2033+24
-	ldr	r0, .L2033+28
+	ldr	r1, .L2019+24
+	ldr	r0, .L2019+28
 	bl	printf
-.L2028:
+.L2014:
 	ldrh	r3, [r5]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -13581,47 +13465,47 @@ update_vpc_list:
 	bl	free_data_superblock
 	mov	r0, r4
 	bl	FtlGcFreeBadSuperBlk
-	ldr	r3, .L2033+32
+	ldr	r3, .L2019+32
 	ldrh	r2, [r5]
 	ldrh	r3, [r3]
 	add	r3, r3, r2
-	ldr	r2, .L2033+36
+	ldr	r2, .L2019+36
 	ldrh	r2, [r2]
 	cmp	r3, r2
-	ble	.L2032
-	ldr	r1, .L2033+16
+	ble	.L2018
+	ldr	r1, .L2019+16
 	movw	r2, #3770
-	ldr	r0, .L2033+20
+	ldr	r0, .L2019+20
 	bl	printf
-	ldr	r1, .L2033+24
-	ldr	r0, .L2033+28
+	ldr	r1, .L2019+24
+	ldr	r0, .L2019+28
 	bl	printf
-.L2032:
+.L2018:
 	movs	r3, #1
-	b	.L2023
-.L2025:
-	ldr	r2, .L2033+40
+	b	.L2009
+.L2011:
+	ldr	r2, .L2019+40
 	ldrh	r2, [r2]
 	cmp	r2, r0
-	beq	.L2023
-	ldr	r2, .L2033+44
+	beq	.L2009
+	ldr	r2, .L2019+44
 	ldrh	r2, [r2]
 	cmp	r2, r0
-	beq	.L2023
-	ldr	r2, .L2033+48
+	beq	.L2009
+	ldr	r2, .L2019+48
 	ldrh	r2, [r2]
 	cmp	r2, r0
-	bne	.L2026
-.L2023:
+	bne	.L2012
+.L2009:
 	mov	r0, r3
 	pop	{r3, r4, r5, pc}
-.L2024:
+.L2010:
 	bl	List_update_data_list
 	movs	r3, #0
-	b	.L2023
-.L2034:
+	b	.L2009
+.L2020:
 	.align	2
-.L2033:
+.L2019:
 	.word	.LANCHOR85
 	.word	.LANCHOR213
 	.word	.LANCHOR87
@@ -13651,47 +13535,47 @@ decrement_vpc_count:
 	push	{r4, r5, r6, lr}
 	cmp	r0, r3
 	mov	r4, r0
-	beq	.L2036
-	ldr	r5, .L2047
+	beq	.L2022
+	ldr	r5, .L2033
 	ldr	r3, [r5]
 	ldrh	r2, [r3, r0, lsl #1]
 	cmp	r2, #0
-	bne	.L2037
+	bne	.L2023
 	mov	r1, r0
-	ldr	r0, .L2047+4
+	ldr	r0, .L2033+4
 	bl	printf
 	ldr	r3, [r5]
 	ldrh	r3, [r3, r4, lsl #1]
-	cbnz	r3, .L2038
-	ldr	r1, .L2047+8
+	cbnz	r3, .L2024
+	ldr	r1, .L2033+8
 	movw	r2, #3786
-	ldr	r0, .L2047+12
+	ldr	r0, .L2033+12
 	bl	printf
-	ldr	r1, .L2047+16
-	ldr	r0, .L2047+20
+	ldr	r1, .L2033+16
+	ldr	r0, .L2033+20
 	bl	printf
-.L2038:
+.L2024:
 	ldr	r3, [r5]
 	movs	r2, #32
 	mov	r1, r4
-	ldr	r0, .L2047+24
+	ldr	r0, .L2033+24
 	strh	r2, [r3, r4, lsl #1]	@ movhi
 	bl	test_node_in_list
-	cbz	r0, .L2039
-	ldr	r6, .L2047+28
+	cbz	r0, .L2025
+	ldr	r6, .L2033+28
 	mov	r1, r4
-	ldr	r0, .L2047+24
+	ldr	r0, .L2033+24
 	bl	List_remove_node
 	ldrh	r3, [r6]
-	cbnz	r3, .L2040
-	ldr	r1, .L2047+8
+	cbnz	r3, .L2026
+	ldr	r1, .L2033+8
 	mov	r2, #3792
-	ldr	r0, .L2047+12
+	ldr	r0, .L2033+12
 	bl	printf
-	ldr	r1, .L2047+16
-	ldr	r0, .L2047+20
+	ldr	r1, .L2033+16
+	ldr	r0, .L2033+20
 	bl	printf
-.L2040:
+.L2026:
 	ldrh	r3, [r6]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -13699,33 +13583,33 @@ decrement_vpc_count:
 	bl	INSERT_DATA_LIST
 	ldr	r3, [r5]
 	mov	r1, r4
-	ldr	r0, .L2047+32
+	ldr	r0, .L2033+32
 	ldrh	r2, [r3, r4, lsl #1]
 	bl	printf
-.L2039:
+.L2025:
 	mov	r0, r4
 	bl	FtlGcRefreshBlock
-.L2043:
+.L2029:
 	movs	r5, #0
-	b	.L2035
-.L2037:
+	b	.L2021
+.L2023:
 	subs	r2, r2, #1
 	strh	r2, [r3, r0, lsl #1]	@ movhi
-.L2036:
-	ldr	r6, .L2047+36
+.L2022:
+	ldr	r6, .L2033+36
 	movw	r3, #65535
 	ldrh	r0, [r6]
 	cmp	r0, r3
-	bne	.L2042
+	bne	.L2028
 	strh	r4, [r6]	@ movhi
-	b	.L2043
-.L2042:
+	b	.L2029
+.L2028:
 	cmp	r4, r0
-	beq	.L2043
+	beq	.L2029
 	bl	update_vpc_list
-	ldr	r3, .L2047+40
+	ldr	r3, .L2033+40
 	adds	r5, r0, #0
-	ldr	r2, .L2047+44
+	ldr	r2, .L2033+44
 	it	ne
 	movne	r5, #1
 	strh	r4, [r6]	@ movhi
@@ -13733,28 +13617,28 @@ decrement_vpc_count:
 	ldr	r2, [r2]
 	subs	r3, r3, r2
 	asrs	r2, r3, #1
-	ldr	r3, .L2047+48
+	ldr	r3, .L2033+48
 	muls	r3, r2, r3
-	ldr	r2, .L2047
+	ldr	r2, .L2033
 	ldr	r2, [r2]
 	uxth	r1, r3
 	ldrh	r2, [r2, r1, lsl #1]
-	cbnz	r2, .L2035
+	cbnz	r2, .L2021
 	cmp	r4, r1
-	beq	.L2035
-	ldr	r1, .L2047+8
+	beq	.L2021
+	ldr	r1, .L2033+8
 	movw	r2, #3816
-	ldr	r0, .L2047+12
+	ldr	r0, .L2033+12
 	bl	printf
-	ldr	r1, .L2047+16
-	ldr	r0, .L2047+20
+	ldr	r1, .L2033+16
+	ldr	r0, .L2033+20
 	bl	printf
-.L2035:
+.L2021:
 	mov	r0, r5
 	pop	{r4, r5, r6, pc}
-.L2048:
+.L2034:
 	.align	2
-.L2047:
+.L2033:
 	.word	.LANCHOR85
 	.word	.LC38
 	.word	.LANCHOR216
@@ -13784,71 +13668,71 @@ FtlSlcSuperblockCheck:
 	push	{r4, r5, r6, lr}
 	mov	r4, r0
 	cmp	r3, #0
-	beq	.L2049
+	beq	.L2035
 	ldrh	r2, [r0]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2049
+	beq	.L2035
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
-	ldr	r5, .L2060
-	ldr	r6, .L2060+4
+	ldr	r5, .L2046
+	ldr	r6, .L2046+4
 	adds	r3, r3, #8
 	ldrh	r3, [r0, r3, lsl #1]
-.L2053:
+.L2039:
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L2055
+	beq	.L2041
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L2056
+	bne	.L2042
 	ldrb	r1, [r5]	@ zero_extendqisi2
-	cbnz	r1, .L2056
+	cbnz	r1, .L2042
 	ldrh	r1, [r4, #2]
 	ldrh	r1, [r6, r1, lsl #1]
 	cmp	r1, r2
-	bne	.L2056
+	bne	.L2042
 	ldrh	r3, [r4, #4]
 	ldrh	r0, [r4]
 	subs	r3, r3, #1
 	strh	r3, [r4, #4]	@ movhi
 	bl	decrement_vpc_count
 	ldrh	r2, [r4, #4]
-	cbnz	r2, .L2055
+	cbnz	r2, .L2041
 	ldrh	r3, [r4, #2]
 	strb	r2, [r4, #6]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	pop	{r4, r5, r6, pc}
-.L2055:
+.L2041:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	ldr	r2, .L2060+8
+	ldr	r2, .L2046+8
 	adds	r3, r3, #1
 	ldrh	r2, [r2]
 	uxtb	r3, r3
 	strb	r3, [r4, #6]
 	cmp	r2, r3
-	bne	.L2054
+	bne	.L2040
 	ldrh	r3, [r4, #2]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [r4, #6]
-.L2054:
+.L2040:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r3, [r4, r3, lsl #1]
-	b	.L2053
-.L2056:
+	b	.L2039
+.L2042:
 	ldrb	r2, [r5]	@ zero_extendqisi2
-	cbz	r2, .L2049
+	cbz	r2, .L2035
 	cmp	r3, #1
-	bne	.L2049
-	ldr	r3, .L2060+12
+	bne	.L2035
+	ldr	r3, .L2046+12
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L2049
-	ldr	r3, .L2060+16
+	bcc	.L2035
+	ldr	r3, .L2046+16
 	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
 	ldr	r2, [r3]
@@ -13856,16 +13740,16 @@ FtlSlcSuperblockCheck:
 	subs	r3, r3, r0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
 	movs	r3, #0
-	ldr	r2, .L2060+20
+	ldr	r2, .L2046+20
 	strh	r3, [r4, #4]	@ movhi
 	strb	r3, [r4, #6]
 	ldrh	r2, [r2]
 	strh	r2, [r4, #2]	@ movhi
-.L2049:
+.L2035:
 	pop	{r4, r5, r6, pc}
-.L2061:
+.L2047:
 	.align	2
-.L2060:
+.L2046:
 	.word	.LANCHOR16
 	.word	.LANCHOR123
 	.word	.LANCHOR38
@@ -13889,93 +13773,93 @@ get_new_active_ppa:
 	push	{r4, r5, r6, r7, r8, lr}
 	mov	r4, r0
 	cmp	r2, r3
-	bne	.L2063
-	ldr	r1, .L2084
+	bne	.L2049
+	ldr	r1, .L2070
 	movw	r2, #3700
-	ldr	r0, .L2084+4
+	ldr	r0, .L2070+4
 	bl	printf
-	ldr	r1, .L2084+8
-	ldr	r0, .L2084+12
+	ldr	r1, .L2070+8
+	ldr	r0, .L2070+12
 	bl	printf
-.L2063:
-	ldr	r5, .L2084+16
+.L2049:
+	ldr	r5, .L2070+16
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5]
 	cmp	r2, r3
-	bne	.L2064
-	ldr	r1, .L2084
+	bne	.L2050
+	ldr	r1, .L2070
 	movw	r2, #3701
-	ldr	r0, .L2084+4
+	ldr	r0, .L2070+4
 	bl	printf
-	ldr	r1, .L2084+8
-	ldr	r0, .L2084+12
+	ldr	r1, .L2070+8
+	ldr	r0, .L2070+12
 	bl	printf
-.L2064:
+.L2050:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L2065
-	ldr	r1, .L2084
+	cbnz	r3, .L2051
+	ldr	r1, .L2070
 	movw	r2, #3702
-	ldr	r0, .L2084+4
+	ldr	r0, .L2070+4
 	bl	printf
-	ldr	r1, .L2084+8
-	ldr	r0, .L2084+12
+	ldr	r1, .L2070+8
+	ldr	r0, .L2070+12
 	bl	printf
-.L2065:
+.L2051:
 	movs	r3, #0
-	ldr	r7, .L2084+20
+	ldr	r7, .L2070+20
 	strb	r3, [r4, #10]
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	ldr	r6, .L2084+24
+	ldr	r6, .L2070+24
 	adds	r3, r3, #8
 	ldrh	r2, [r4, r3, lsl #1]
-.L2066:
+.L2052:
 	movw	r0, #65535
 	cmp	r2, r0
-	beq	.L2067
+	beq	.L2053
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	ldrh	r1, [r4, #2]
 	cmp	r3, #1
 	ldrh	r3, [r4, #4]
-	bne	.L2069
+	bne	.L2055
 	ldrb	ip, [r6]	@ zero_extendqisi2
 	cmp	ip, #0
-	bne	.L2069
-	ldr	ip, .L2084+28
+	bne	.L2055
+	ldr	ip, .L2070+28
 	ldrh	ip, [ip, r1, lsl #1]
 	cmp	ip, r0
-	bne	.L2069
+	bne	.L2055
 	subs	r3, r3, #1
 	ldrh	r0, [r4]
 	strh	r3, [r4, #4]	@ movhi
 	bl	decrement_vpc_count
-.L2067:
+.L2053:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	ldrh	r2, [r7]
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r2, r3
 	strb	r3, [r4, #6]
-	bne	.L2068
+	bne	.L2054
 	ldrh	r3, [r4, #2]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [r4, #6]
-.L2068:
+.L2054:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r2, [r4, r3, lsl #1]
-	b	.L2066
-.L2069:
-	ldr	r8, .L2084+24
+	b	.L2052
+.L2055:
+	ldr	r8, .L2070+24
 	orr	r6, r1, r2, lsl #10
 	subs	r3, r3, #1
 	strh	r3, [r4, #4]	@ movhi
-.L2070:
+.L2056:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	movw	r2, #65535
 	ldrh	r0, [r7]
-.L2072:
+.L2058:
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, r0
@@ -13987,31 +13871,31 @@ get_new_active_ppa:
 	add	r1, r3, #8
 	ldrh	r1, [r4, r1, lsl #1]
 	cmp	r1, r2
-	beq	.L2072
+	beq	.L2058
 	strb	r3, [r4, #6]
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L2073
+	bne	.L2059
 	ldrb	r1, [r8]	@ zero_extendqisi2
 	ldrh	r3, [r4, #2]
-	cbnz	r1, .L2074
-	ldr	r1, .L2084+28
+	cbnz	r1, .L2060
+	ldr	r1, .L2070+28
 	ldrh	r3, [r1, r3, lsl #1]
 	cmp	r3, r2
-	bne	.L2073
+	bne	.L2059
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L2073
+	cbz	r3, .L2059
 	subs	r3, r3, #1
 	ldrh	r0, [r4]
 	strh	r3, [r4, #4]	@ movhi
 	bl	decrement_vpc_count
-	b	.L2070
-.L2074:
-	ldr	r2, .L2084+32
+	b	.L2056
+.L2060:
+	ldr	r2, .L2070+32
 	ldrh	r2, [r2]
 	cmp	r3, r2
-	bcc	.L2073
-	ldr	r3, .L2084+36
+	bcc	.L2059
+	ldr	r3, .L2070+36
 	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
 	ldr	r2, [r3]
@@ -14023,26 +13907,26 @@ get_new_active_ppa:
 	strh	r3, [r4, #4]	@ movhi
 	strb	r3, [r4, #6]
 	strh	r2, [r4, #2]	@ movhi
-.L2073:
+.L2059:
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5]
 	cmp	r2, r3
-	bne	.L2062
+	bne	.L2048
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L2062
-	ldr	r1, .L2084
+	cbz	r3, .L2048
+	ldr	r1, .L2070
 	movw	r2, #3752
-	ldr	r0, .L2084+4
+	ldr	r0, .L2070+4
 	bl	printf
-	ldr	r1, .L2084+8
-	ldr	r0, .L2084+12
+	ldr	r1, .L2070+8
+	ldr	r0, .L2070+12
 	bl	printf
-.L2062:
+.L2048:
 	mov	r0, r6
 	pop	{r4, r5, r6, r7, r8, pc}
-.L2085:
+.L2071:
 	.align	2
-.L2084:
+.L2070:
 	.word	.LANCHOR217
 	.word	.LC5
 	.word	.LC6
@@ -14065,16 +13949,16 @@ get_new_active_ppa:
 FtlVpcTblFlush:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L2110
+	ldr	r2, .L2096
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	ldr	r3, [r2]
 	str	r2, [sp, #4]
 	cmp	r3, #0
-	bne	.L2088
-	ldr	r4, .L2110+4
-	ldr	r8, .L2110+112
-	ldr	fp, .L2110+116
-	ldr	r5, .L2110+8
+	bne	.L2074
+	ldr	r4, .L2096+4
+	ldr	r8, .L2096+112
+	ldr	fp, .L2096+116
+	ldr	r5, .L2096+8
 	ldr	r0, [r8]
 	ldr	r6, [fp]
 	ldrh	r2, [r4]
@@ -14082,21 +13966,21 @@ FtlVpcTblFlush:
 	str	r6, [r5, #12]
 	strh	r2, [r6, #2]	@ movhi
 	movw	r2, #61604
-	ldr	r7, .L2110+12
+	ldr	r7, .L2096+12
 	strh	r2, [r6]	@ movhi
 	str	r3, [r6, #12]
-	ldr	ip, .L2110+120
+	ldr	ip, .L2096+120
 	ldr	r2, [r4, #8]
 	str	r3, [r6, #8]
-	ldr	r3, .L2110+16
+	ldr	r3, .L2096+16
 	str	r2, [r6, #4]
 	stm	r7, {r3, ip}
 	ldrh	r3, [r4, #6]
 	strh	r3, [r7, #8]	@ movhi
-	ldr	r3, .L2110+20
+	ldr	r3, .L2096+20
 	ldrh	r3, [r3]
 	strb	r3, [r7, #10]
-	ldr	r3, .L2110+24
+	ldr	r3, .L2096+24
 	ldrh	r2, [r3]
 	ldrh	r1, [r3, #2]
 	strh	r2, [r7, #14]	@ movhi
@@ -14104,7 +13988,7 @@ FtlVpcTblFlush:
 	ldrb	r3, [r3, #8]	@ zero_extendqisi2
 	strb	r3, [r7, #11]
 	orr	r2, r2, r1, lsl #6
-	ldr	r3, .L2110+28
+	ldr	r3, .L2096+28
 	strh	r2, [r7, #16]	@ movhi
 	ldrh	r2, [r3]
 	ldrh	r1, [r3, #2]
@@ -14113,7 +13997,7 @@ FtlVpcTblFlush:
 	ldrb	r3, [r3, #8]	@ zero_extendqisi2
 	strb	r3, [r7, #12]
 	orr	r2, r2, r1, lsl #6
-	ldr	r3, .L2110+32
+	ldr	r3, .L2096+32
 	strh	r2, [r7, #20]	@ movhi
 	ldrh	r2, [r3]
 	strh	r2, [r7, #22]	@ movhi
@@ -14122,33 +14006,33 @@ FtlVpcTblFlush:
 	ldrb	r3, [r3, #8]	@ zero_extendqisi2
 	strb	r3, [r7, #13]
 	orr	r2, r2, r1, lsl #6
-	ldr	r3, .L2110+36
+	ldr	r3, .L2096+36
 	movs	r1, #255
 	strh	r2, [r7, #24]	@ movhi
 	ldr	r3, [r3]
 	str	r3, [r7, #32]
-	ldr	r3, .L2110+40
+	ldr	r3, .L2096+40
 	ldr	r3, [r3]
 	str	r3, [r7, #40]
-	ldr	r3, .L2110+44
+	ldr	r3, .L2096+44
 	ldr	r3, [r3]
 	str	r3, [r7, #36]
-	ldr	r3, .L2110+48
+	ldr	r3, .L2096+48
 	ldrh	r3, [r3]
 	strh	r3, [r7, #44]	@ movhi
-	ldr	r3, .L2110+52
+	ldr	r3, .L2096+52
 	ldrh	r3, [r3]
 	strh	r3, [r7, #46]	@ movhi
-	ldr	r3, .L2110+56
+	ldr	r3, .L2096+56
 	ldrh	r2, [r3]
 	bl	ftl_memset
 	mov	r1, r7
-	ldr	r7, .L2110+60
+	ldr	r7, .L2096+60
 	movs	r2, #48
 	ldr	r0, [r5, #8]
 	bl	ftl_memcpy
 	ldrh	r2, [r7]
-	ldr	r3, .L2110+64
+	ldr	r3, .L2096+64
 	ldr	r0, [r5, #8]
 	ldr	r1, [r3]
 	lsls	r2, r2, #1
@@ -14156,7 +14040,7 @@ FtlVpcTblFlush:
 	bl	ftl_memcpy
 	ldrh	r0, [r7]
 	ldr	r3, [r5, #8]
-	ldr	r1, .L2110+68
+	ldr	r1, .L2096+68
 	lsrs	r2, r0, #3
 	lsls	r0, r0, #1
 	ldr	r1, [r1]
@@ -14165,12 +14049,12 @@ FtlVpcTblFlush:
 	bic	r0, r0, #3
 	add	r0, r0, r3
 	bl	ftl_memcpy
-	ldr	r3, .L2110+72
+	ldr	r3, .L2096+72
 	ldrh	r3, [r3]
-	cbz	r3, .L2089
+	cbz	r3, .L2075
 	ldrh	r0, [r7]
-	ldr	r3, .L2110+76
-	ldr	r1, .L2110+80
+	ldr	r3, .L2096+76
+	ldr	r1, .L2096+80
 	ldrh	r2, [r3]
 	lsrs	r3, r0, #3
 	ldr	r1, [r1]
@@ -14181,12 +14065,12 @@ FtlVpcTblFlush:
 	ubfx	r3, r3, #2, #14
 	add	r0, r0, r3, lsl #2
 	bl	ftl_memcpy
-.L2089:
+.L2075:
 	movs	r7, #0
 	movw	r10, #65535
 	movs	r0, #0
 	bl	FtlUpdateVaildLpn
-.L2090:
+.L2076:
 	ldr	r3, [r8]
 	ldrh	r1, [r4, #2]
 	ldrh	r2, [r4]
@@ -14195,18 +14079,18 @@ FtlVpcTblFlush:
 	str	r3, [r5, #12]
 	orr	r3, r1, r2, lsl #10
 	str	r3, [r5, #4]
-	ldr	r3, .L2110+84
+	ldr	r3, .L2096+84
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r1, r3
-	blt	.L2091
+	blt	.L2077
 	movs	r3, #0
 	ldrh	r10, [r4, #4]
 	strh	r3, [r4, #2]	@ movhi
 	strh	r2, [r4, #4]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L2110+40
-	ldr	r1, .L2110+40
+	ldr	r3, .L2096+40
+	ldr	r1, .L2096+40
 	strh	r0, [r4]	@ movhi
 	ldr	r3, [r3]
 	adds	r2, r3, #1
@@ -14216,18 +14100,18 @@ FtlVpcTblFlush:
 	str	r2, [r5, #4]
 	str	r3, [r6, #4]
 	strh	r0, [r6, #2]	@ movhi
-.L2091:
-	ldr	r3, .L2110+88
+.L2077:
+	ldr	r3, .L2096+88
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2092
-	ldr	r3, .L2110+56
+	cbz	r3, .L2078
+	ldr	r3, .L2096+56
 	ldr	r0, [r8]
 	ldrh	r1, [r3]
 	bl	js_hash
 	str	r0, [r6, #12]
-.L2092:
+.L2078:
 	movs	r3, #1
-	ldr	r0, .L2110+8
+	ldr	r0, .L2096+8
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
@@ -14237,55 +14121,55 @@ FtlVpcTblFlush:
 	uxth	r3, r3
 	adds	r1, r2, #1
 	strh	r3, [r4, #2]	@ movhi
-	bne	.L2093
+	bne	.L2079
 	cmp	r3, #1
-	bne	.L2094
-	ldr	r1, .L2110+92
+	bne	.L2080
+	ldr	r1, .L2096+92
 	movw	r2, #1375
-	ldr	r0, .L2110+96
+	ldr	r0, .L2096+96
 	bl	printf
-	ldr	r1, .L2110+100
-	ldr	r0, .L2110+104
+	ldr	r1, .L2096+100
+	ldr	r0, .L2096+104
 	bl	printf
-.L2094:
+.L2080:
 	ldrh	r3, [r4, #2]
 	adds	r7, r7, #1
 	uxth	r7, r7
 	cmp	r3, #1
 	itttt	eq
-	ldreq	r3, .L2110+84
+	ldreq	r3, .L2096+84
 	ldrheq	r3, [r3]
 	addeq	r3, r3, #-1
 	strheq	r3, [r4, #2]	@ movhi
 	cmp	r7, #3
-	bls	.L2090
+	bls	.L2076
 	mov	r2, r7
 	ldr	r1, [r5, #4]
-	ldr	r0, .L2110+108
+	ldr	r0, .L2096+108
 	bl	printf
 	ldr	r2, [sp, #4]
 	movs	r3, #1
 	str	r3, [r2]
-.L2088:
+.L2074:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2093:
+.L2079:
 	cmp	r3, #1
-	beq	.L2090
+	beq	.L2076
 	cmp	r2, #256
-	beq	.L2090
+	beq	.L2076
 	movw	r3, #65535
 	cmp	r10, r3
-	beq	.L2088
+	beq	.L2074
 	movs	r1, #1
 	mov	r0, r10
 	bl	FtlFreeSysBlkQueueIn
-	b	.L2088
-.L2111:
+	b	.L2074
+.L2097:
 	.align	2
-.L2110:
+.L2096:
 	.word	.LANCHOR78
 	.word	.LANCHOR218
 	.word	.LANCHOR211
@@ -14329,31 +14213,31 @@ FtlVpcTblFlush:
 FtlSuperblockPowerLostFix:
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2127
+	ldr	r3, .L2113
 	push	{r4, r5, r6, r7, r8, r10, lr}
 	mov	r4, r0
 	sub	sp, sp, #44
 	ldr	r8, [r3]
 	cmp	r8, #0
-	bne	.L2112
-	ldr	r3, .L2127+4
+	bne	.L2098
+	ldr	r3, .L2113+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L2123
+	beq	.L2109
 	ldrb	r3, [r0, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L2123
+	bne	.L2109
 	ldrh	r6, [r0, #4]
 	mov	r8, r3
-.L2114:
+.L2100:
 	mov	r3, #-1
-	ldr	r2, .L2127+8
+	ldr	r2, .L2113+8
 	str	r3, [sp, #20]
 	movs	r7, #0
-	ldr	r3, .L2127+12
+	ldr	r3, .L2113+12
 	ldr	r5, [r2]
 	mvn	r2, #2
-	ldr	r10, .L2127+24
+	ldr	r10, .L2113+24
 	ldr	r3, [r3]
 	str	r5, [sp, #16]
 	str	r3, [sp, #12]
@@ -14369,38 +14253,38 @@ FtlSuperblockPowerLostFix:
 	add	r2, r2, #1269760
 	addw	r2, r2, #1507
 	str	r2, [r3, #4]
-.L2115:
+.L2101:
 	adds	r6, r6, #-1
-	bcc	.L2118
+	bcc	.L2104
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L2116
-.L2118:
-	ldr	r3, .L2127+16
+	cbnz	r3, .L2102
+.L2104:
+	ldr	r3, .L2113+16
 	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
-	ldr	r3, .L2127+20
+	ldr	r3, .L2113+20
 	ldrh	r3, [r3]
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [r4, #6]
 	strh	r3, [r4, #4]	@ movhi
-.L2112:
+.L2098:
 	add	sp, sp, #44
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L2123:
+.L2109:
 	movs	r6, #12
-	b	.L2114
-.L2116:
+	b	.L2100
+.L2102:
 	mov	r0, r4
 	bl	get_new_active_ppa
 	str	r0, [sp, #8]
 	adds	r0, r0, #1
-	beq	.L2118
+	beq	.L2104
 	ldr	r3, [r10]
 	movs	r1, #1
 	add	r0, sp, #4
@@ -14415,10 +14299,10 @@ FtlSuperblockPowerLostFix:
 	bl	FlashProgPages
 	ldrh	r0, [r4]
 	bl	decrement_vpc_count
-	b	.L2115
-.L2128:
+	b	.L2101
+.L2114:
 	.align	2
-.L2127:
+.L2113:
 	.word	.LANCHOR78
 	.word	.LANCHOR16
 	.word	.LANCHOR195
@@ -14438,36 +14322,36 @@ FtlSuperblockPowerLostFix:
 FtlLoadFactoryBbt:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2139
+	ldr	r3, .L2125
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r6, #0
-	ldr	r5, .L2139+4
+	ldr	r5, .L2125+4
 	ldr	r3, [r3]
-	ldr	r7, .L2139+8
-	ldr	r10, .L2139+20
+	ldr	r7, .L2125+8
+	ldr	r10, .L2125+20
 	str	r3, [r5, #8]
-	ldr	r3, .L2139+12
+	ldr	r3, .L2125+12
 	ldr	r8, [r3]
 	str	r8, [r5, #12]
-.L2130:
-	ldr	r3, .L2139+16
+.L2116:
+	ldr	r3, .L2125+16
 	ldrh	r3, [r3]
 	cmp	r6, r3
-	bcc	.L2135
+	bcc	.L2121
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2135:
+.L2121:
 	ldrh	r4, [r10]
 	movw	r3, #65535
-	ldr	fp, .L2139+4
+	ldr	fp, .L2125+4
 	strh	r3, [r7, #2]!	@ movhi
 	subs	r4, r4, #1
 	uxth	r4, r4
-.L2131:
+.L2117:
 	ldrh	r3, [r10]
 	sub	r2, r3, #15
 	cmp	r2, r4
-	bgt	.L2133
+	bgt	.L2119
 	mla	r3, r6, r3, r4
 	movs	r2, #1
 	mov	r1, r2
@@ -14477,22 +14361,22 @@ FtlLoadFactoryBbt:
 	bl	FlashReadPages
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L2132
+	beq	.L2118
 	ldrh	r2, [r8]
 	movw	r3, #61664
 	cmp	r2, r3
-	bne	.L2132
+	bne	.L2118
 	strh	r4, [r7]	@ movhi
-.L2133:
+.L2119:
 	adds	r6, r6, #1
-	b	.L2130
-.L2132:
+	b	.L2116
+.L2118:
 	subs	r4, r4, #1
 	uxth	r4, r4
-	b	.L2131
-.L2140:
+	b	.L2117
+.L2126:
 	.align	2
-.L2139:
+.L2125:
 	.word	.LANCHOR189
 	.word	.LANCHOR211
 	.word	.LANCHOR76+10
@@ -14514,12 +14398,12 @@ FtlGetLastWrittenPage:
 	cmp	r1, #1
 	push	{r4, r5, r6, r7, r8, lr}
 	it	eq
-	ldreq	r3, .L2153
+	ldreq	r3, .L2139
 	sub	sp, sp, #104
 	lsl	r7, r0, #10
 	mov	r2, r1
 	it	ne
-	ldrne	r3, .L2153+4
+	ldrne	r3, .L2139+4
 	mov	r8, r1
 	movs	r6, #0
 	movs	r1, #1
@@ -14535,16 +14419,16 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	r3, [sp, #40]
 	adds	r3, r3, #1
-	bne	.L2144
-.L2145:
+	bne	.L2130
+.L2131:
 	cmp	r6, r5
-	ble	.L2148
-.L2144:
+	ble	.L2134
+.L2130:
 	mov	r0, r5
 	add	sp, sp, #104
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L2148:
+.L2134:
 	adds	r3, r6, r5
 	mov	r2, r8
 	add	r3, r3, r3, lsr #31
@@ -14557,23 +14441,23 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	r3, [sp, #40]
 	adds	r3, r3, #1
-	bne	.L2146
+	bne	.L2132
 	ldr	r3, [sp, #44]
 	adds	r3, r3, #1
-	bne	.L2146
+	bne	.L2132
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
-	beq	.L2146
+	beq	.L2132
 	subs	r4, r4, #1
 	sxth	r5, r4
-	b	.L2145
-.L2146:
+	b	.L2131
+.L2132:
 	adds	r4, r4, #1
 	sxth	r6, r4
-	b	.L2145
-.L2154:
+	b	.L2131
+.L2140:
 	.align	2
-.L2153:
+.L2139:
 	.word	.LANCHOR53
 	.word	.LANCHOR52
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
@@ -14589,24 +14473,24 @@ FtlLoadBbt:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	ldr	r8, .L2184+48
-	ldr	r4, .L2184
+	ldr	r8, .L2170+48
+	ldr	r4, .L2170
 	ldr	r3, [r8]
-	ldr	r7, .L2184+4
+	ldr	r7, .L2170+4
 	mov	r10, r4
 	str	r3, [r4, #8]
-	ldr	r3, .L2184+8
+	ldr	r3, .L2170+8
 	ldr	r6, [r3]
 	str	r6, [r4, #12]
 	bl	FtlBbtMemInit
 	ldrh	r5, [r7]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L2156:
+.L2142:
 	ldrh	r3, [r7]
 	subs	r3, r3, #47
 	cmp	r3, r5
-	bgt	.L2159
+	bgt	.L2145
 	lsls	r3, r5, #10
 	movs	r2, #1
 	mov	r1, r2
@@ -14615,7 +14499,7 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	bne	.L2157
+	bne	.L2143
 	ldr	r3, [r4, #4]
 	movs	r2, #1
 	mov	r1, r2
@@ -14623,104 +14507,104 @@ FtlLoadBbt:
 	adds	r3, r3, #1
 	str	r3, [r4, #4]
 	bl	FlashReadPages
-.L2157:
+.L2143:
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L2158
+	beq	.L2144
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L2158
-	ldr	r3, .L2184+12
+	bne	.L2144
+	ldr	r3, .L2170+12
 	ldr	r2, [r6, #4]
 	strh	r5, [r3]	@ movhi
 	str	r2, [r3, #8]
 	ldrh	r2, [r6, #8]
 	strh	r2, [r3, #4]	@ movhi
-.L2159:
-	ldr	r5, .L2184+12
+.L2145:
+	ldr	r5, .L2170+12
 	movw	r2, #65535
 	ldrh	r3, [r5]
 	cmp	r3, r2
-	beq	.L2173
+	beq	.L2159
 	ldrh	r3, [r5, #4]
 	cmp	r3, r2
-	beq	.L2163
+	beq	.L2149
 	lsls	r3, r3, #10
 	movs	r2, #1
 	mov	r1, r2
-	ldr	r0, .L2184
+	ldr	r0, .L2170
 	str	r3, [r4, #4]
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L2163
+	beq	.L2149
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L2163
+	bne	.L2149
 	ldr	r3, [r6, #4]
 	ldr	r2, [r5, #8]
 	cmp	r3, r2
-	bls	.L2163
+	bls	.L2149
 	ldrh	r2, [r5, #4]
 	str	r3, [r5, #8]
 	ldrh	r3, [r6, #8]
 	strh	r2, [r5]	@ movhi
 	strh	r3, [r5, #4]	@ movhi
-.L2163:
-	ldr	r10, .L2184
+.L2149:
+	ldr	r10, .L2170
 	movs	r1, #1
 	ldrh	r0, [r5]
 	bl	FtlGetLastWrittenPage
 	sxth	r7, r0
 	adds	r0, r0, #1
 	strh	r0, [r5, #2]	@ movhi
-.L2165:
+.L2151:
 	cmp	r7, #0
-	bge	.L2168
-	ldr	r1, .L2184+16
+	bge	.L2154
+	ldr	r1, .L2170+16
 	movw	r2, #339
-	ldr	r0, .L2184+20
+	ldr	r0, .L2170+20
 	bl	printf
-	ldr	r1, .L2184+24
-	ldr	r0, .L2184+28
+	ldr	r1, .L2170+24
+	ldr	r0, .L2170+28
 	bl	printf
-.L2167:
+.L2153:
 	ldrh	r3, [r6, #10]
 	ldrh	r0, [r6, #12]
 	strh	r3, [r5, #6]	@ movhi
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L2170
-	ldr	r3, .L2184+32
+	beq	.L2156
+	ldr	r3, .L2170+32
 	ldr	r2, [r3]
 	cmp	r0, r2
-	beq	.L2170
-	ldr	r3, .L2184+36
+	beq	.L2156
+	ldr	r3, .L2170+36
 	ldrh	r3, [r3]
 	lsrs	r3, r3, #2
 	cmp	r2, r3
-	bcs	.L2170
+	bcs	.L2156
 	cmp	r0, r3
-	bcs	.L2170
+	bcs	.L2156
 	bl	FtlSysBlkNumInit
-.L2170:
-	ldr	r6, .L2184+40
+.L2156:
+	ldr	r6, .L2170+40
 	movs	r5, #0
-	ldr	r7, .L2184+44
-	ldr	r8, .L2184+52
-.L2171:
+	ldr	r7, .L2170+44
+	ldr	r8, .L2170+52
+.L2157:
 	ldrh	r3, [r7]
 	cmp	r5, r3
-	bcc	.L2172
+	bcc	.L2158
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L2158:
+.L2144:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L2156
-.L2168:
+	b	.L2142
+.L2154:
 	ldrh	r3, [r5]
 	movs	r2, #1
 	mov	r1, r2
@@ -14732,16 +14616,16 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L2166
+	beq	.L2152
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	beq	.L2167
-.L2166:
+	beq	.L2153
+.L2152:
 	subs	r7, r7, #1
 	sxth	r7, r7
-	b	.L2165
-.L2172:
+	b	.L2151
+.L2158:
 	ldrh	r2, [r8]
 	ldr	r1, [r4, #8]
 	ldr	r0, [r6, #4]!
@@ -14749,13 +14633,13 @@ FtlLoadBbt:
 	mla	r1, r5, r2, r1
 	adds	r5, r5, #1
 	bl	ftl_memcpy
-	b	.L2171
-.L2173:
+	b	.L2157
+.L2159:
 	mov	r0, #-1
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L2185:
+.L2171:
 	.align	2
-.L2184:
+.L2170:
 	.word	.LANCHOR211
 	.word	.LANCHOR51
 	.word	.LANCHOR195
@@ -14792,13 +14676,13 @@ ftl_map_blk_gc:
 	ldrh	r2, [r4, #8]
 	subs	r3, r3, #4
 	cmp	r2, r3
-	blt	.L2187
+	blt	.L2173
 	uxth	r0, r0
 	ldrh	r8, [r5, r0, lsl #1]
 	cmp	r8, #0
-	beq	.L2187
+	beq	.L2173
 	ldr	r3, [r4, #32]
-	cbnz	r3, .L2187
+	cbnz	r3, .L2173
 	movs	r2, #1
 	str	r2, [r4, #32]
 	strh	r3, [r5, r0, lsl #1]	@ movhi
@@ -14806,35 +14690,35 @@ ftl_map_blk_gc:
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	ldr	r3, .L2199
+	ldr	r3, .L2185
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L2188
+	bcc	.L2174
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L2188:
-	ldr	r5, .L2199+4
+.L2174:
+	ldr	r5, .L2185+4
 	movs	r6, #0
-.L2189:
+.L2175:
 	ldrh	r3, [r4, #6]
 	uxth	r10, r6
 	cmp	r3, r10
-	bhi	.L2195
+	bhi	.L2181
 	movs	r1, #1
 	mov	r0, r8
 	bl	FtlFreeSysBlkQueueIn
 	movs	r3, #0
 	str	r3, [r4, #32]
-.L2187:
-	ldr	r3, .L2199
+.L2173:
+	ldr	r3, .L2185
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L2193
+	bcc	.L2179
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-	b	.L2193
-.L2195:
+	b	.L2179
+.L2181:
 	ldr	r3, [sp]
 	uxth	fp, r6
 	add	r3, r3, fp, lsl #2
@@ -14842,65 +14726,65 @@ ftl_map_blk_gc:
 	ldr	r3, [sp]
 	ldr	r2, [r3, fp, lsl #2]
 	cmp	r8, r2, lsr #10
-	bne	.L2190
-	ldr	r3, .L2199+8
+	bne	.L2176
+	ldr	r3, .L2185+8
 	str	r2, [r5, #4]
 	movs	r2, #1
-	ldr	r0, .L2199+4
+	ldr	r0, .L2185+4
 	ldr	r1, [r3]
 	str	r1, [r5, #8]
-	ldr	r1, .L2199+12
+	ldr	r1, .L2185+12
 	ldr	r7, [r1]
 	mov	r1, r2
 	str	r7, [r5, #12]
 	bl	FlashReadPages
 	ldrh	r2, [r7, #8]
 	cmp	r2, r10
-	beq	.L2191
-	ldr	r1, .L2199+16
+	beq	.L2177
+	ldr	r1, .L2185+16
 	mov	r2, #752
-	ldr	r0, .L2199+20
+	ldr	r0, .L2185+20
 	bl	printf
-	ldr	r1, .L2199+24
-	ldr	r0, .L2199+28
+	ldr	r1, .L2185+24
+	ldr	r0, .L2185+28
 	bl	printf
-.L2191:
+.L2177:
 	ldr	r2, [r5]
 	adds	r2, r2, #1
 	ldrh	r2, [r7, #8]
-	bne	.L2192
-.L2194:
+	bne	.L2178
+.L2180:
 	ldr	r1, [sp, #4]
 	movs	r3, #0
-	ldr	r0, .L2199+32
+	ldr	r0, .L2185+32
 	str	r3, [r1]
 	ldr	r1, [r5, #4]
 	bl	printf
-	ldr	r3, .L2199+36
+	ldr	r3, .L2185+36
 	movs	r2, #1
 	str	r2, [r3]
-.L2193:
+.L2179:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2192:
+.L2178:
 	cmp	r2, r10
-	bne	.L2194
+	bne	.L2180
 	ldrh	r0, [r7]
 	ldrh	r1, [r4, #4]
 	cmp	r0, r1
-	bne	.L2194
+	bne	.L2180
 	ldr	r2, [r5, #8]
 	mov	r1, fp
 	mov	r0, r4
 	bl	FtlMapWritePage
-.L2190:
+.L2176:
 	adds	r6, r6, #1
-	b	.L2189
-.L2200:
+	b	.L2175
+.L2186:
 	.align	2
-.L2199:
+.L2185:
 	.word	.LANCHOR53
 	.word	.LANCHOR211
 	.word	.LANCHOR190
@@ -14923,26 +14807,26 @@ ftl_map_blk_gc:
 Ftl_write_map_blk_to_last_page:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2215
+	ldr	r3, .L2201
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	ldr	r5, [r3]
-	cbnz	r5, .L2202
+	cbnz	r5, .L2188
 	ldrh	r3, [r0]
 	movw	r2, #65535
 	ldr	r6, [r0, #12]
 	cmp	r3, r2
-	bne	.L2203
+	bne	.L2189
 	ldrh	r3, [r0, #8]
-	cbz	r3, .L2204
-	ldr	r1, .L2215+4
+	cbz	r3, .L2190
+	ldr	r1, .L2201+4
 	movw	r2, #793
-	ldr	r0, .L2215+8
+	ldr	r0, .L2201+8
 	bl	printf
-	ldr	r1, .L2215+12
-	ldr	r0, .L2215+16
+	ldr	r1, .L2201+12
+	ldr	r0, .L2201+16
 	bl	printf
-.L2204:
+.L2190:
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
@@ -14954,20 +14838,20 @@ Ftl_write_map_blk_to_last_page:
 	ldr	r3, [r4, #28]
 	adds	r3, r3, #1
 	str	r3, [r4, #28]
-.L2202:
+.L2188:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2203:
+.L2189:
 	ldrh	r8, [r6, r3, lsl #1]
 	movs	r1, #255
 	ldrh	r3, [r0, #2]
-	ldr	r7, .L2215+20
-	ldr	fp, .L2215+40
+	ldr	r7, .L2201+20
+	ldr	fp, .L2201+40
 	ldr	r10, [r0, #24]
 	orr	r3, r3, r8, lsl #10
 	ldr	r0, [fp]
 	str	r3, [r7, #4]
-	ldr	r3, .L2215+24
+	ldr	r3, .L2201+24
 	str	r0, [r7, #8]
 	ldr	r6, [r3]
 	ldr	r3, [r4, #28]
@@ -14978,7 +14862,7 @@ Ftl_write_map_blk_to_last_page:
 	ldrh	r3, [r4, #4]
 	strh	r8, [r6, #2]	@ movhi
 	strh	r3, [r6]	@ movhi
-	ldr	r3, .L2215+28
+	ldr	r3, .L2201+28
 	ldrh	r2, [r3]
 	lsls	r2, r2, #3
 	bl	ftl_memset
@@ -14986,46 +14870,46 @@ Ftl_write_map_blk_to_last_page:
 	mov	r3, r5
 	ldr	r1, [fp]
 	mov	r2, r5
-.L2205:
+.L2191:
 	uxth	r0, r3
 	cmp	ip, r0
-	bhi	.L2207
-	ldr	r3, .L2215+32
+	bhi	.L2193
+	ldr	r3, .L2201+32
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2208
-	ldr	r3, .L2215+36
+	cbz	r3, .L2194
+	ldr	r3, .L2201+36
 	ldr	r0, [r7, #8]
 	ldrh	r1, [r3]
 	bl	js_hash
 	str	r0, [r6, #12]
-.L2208:
+.L2194:
 	movs	r2, #1
 	movs	r3, #0
 	mov	r1, r2
-	ldr	r0, .L2215+20
+	ldr	r0, .L2201+20
 	bl	FlashProgPages
 	ldrh	r3, [r4, #2]
 	mov	r0, r4
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	bl	ftl_map_blk_gc
-	b	.L2202
-.L2207:
+	b	.L2188
+.L2193:
 	ldr	r0, [r10, r3, lsl #2]
 	cmp	r8, r0, lsr #10
-	bne	.L2206
+	bne	.L2192
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r3, [r1, r2, lsl #3]
 	add	r5, r1, r2, lsl #3
 	ldr	r0, [r10, r3, lsl #2]
 	str	r0, [r5, #4]
-.L2206:
+.L2192:
 	adds	r3, r3, #1
-	b	.L2205
-.L2216:
+	b	.L2191
+.L2202:
 	.align	2
-.L2215:
+.L2201:
 	.word	.LANCHOR78
 	.word	.LANCHOR222
 	.word	.LC5
@@ -15051,12 +14935,12 @@ FtlMapWritePage:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-	ldr	r10, .L2243+44
+	ldr	r10, .L2229+44
 	mov	r8, r1
 	movs	r6, #0
 	str	r2, [sp, #4]
-.L2218:
-	ldr	r2, .L2243
+.L2204:
+	ldr	r2, .L2229
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
@@ -15064,48 +14948,48 @@ FtlMapWritePage:
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	bge	.L2219
+	bge	.L2205
 	ldrh	r2, [r4]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L2220
-.L2219:
+	bne	.L2206
+.L2205:
 	mov	r0, r4
 	bl	Ftl_write_map_blk_to_last_page
-.L2220:
-	ldr	r3, .L2243+4
+.L2206:
+	ldr	r3, .L2229+4
 	ldr	r2, [r3]
 	str	r3, [sp, #8]
 	cmp	r2, #0
-	bne	.L2238
+	bne	.L2224
 	ldrh	r2, [r4]
 	ldr	r3, [r4, #12]
 	ldrh	r3, [r3, r2, lsl #1]
-	cbnz	r3, .L2222
-	ldr	r1, .L2243+8
+	cbnz	r3, .L2208
+	ldr	r1, .L2229+8
 	movw	r2, #865
-	ldr	r0, .L2243+12
+	ldr	r0, .L2229+12
 	bl	printf
-	ldr	r1, .L2243+16
-	ldr	r0, .L2243+20
+	ldr	r1, .L2229+16
+	ldr	r0, .L2229+20
 	bl	printf
-.L2222:
+.L2208:
 	ldrh	r2, [r4]
 	ldrh	r3, [r4, #10]
 	cmp	r2, r3
-	bcc	.L2223
-	ldr	r1, .L2243+8
+	bcc	.L2209
+	ldr	r1, .L2229+8
 	movw	r2, #866
-	ldr	r0, .L2243+12
+	ldr	r0, .L2229+12
 	bl	printf
-	ldr	r1, .L2243+16
-	ldr	r0, .L2243+20
+	ldr	r1, .L2229+16
+	ldr	r0, .L2229+20
 	bl	printf
-.L2223:
+.L2209:
 	ldrh	r2, [r4]
 	movs	r1, #0
 	ldr	r3, [r4, #12]
-	ldr	r5, .L2243+24
+	ldr	r5, .L2229+24
 	ldrh	r7, [r3, r2, lsl #1]
 	movs	r2, #16
 	ldrh	r3, [r4, #2]
@@ -15114,7 +14998,7 @@ FtlMapWritePage:
 	str	r3, [r5, #4]
 	ldr	r3, [sp, #4]
 	str	r3, [r5, #8]
-	ldr	r3, .L2243+28
+	ldr	r3, .L2229+28
 	ldr	r0, [r3]
 	str	r0, [r5, #12]
 	bl	ftl_memset
@@ -15126,18 +15010,18 @@ FtlMapWritePage:
 	strh	r8, [r3, #8]	@ movhi
 	strh	r7, [r3, #2]	@ movhi
 	strh	r2, [r3]	@ movhi
-	ldr	r2, .L2243+32
+	ldr	r2, .L2229+32
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbz	r2, .L2224
-	ldr	r2, .L2243+36
+	cbz	r2, .L2210
+	ldr	r2, .L2229+36
 	ldr	r0, [r5, #8]
 	ldrh	r1, [r2]
 	bl	js_hash
 	ldr	r3, [sp, #12]
 	str	r0, [r3, #12]
-.L2224:
+.L2210:
 	movs	r3, #1
-	ldr	r0, .L2243+24
+	ldr	r0, .L2229+24
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
@@ -15147,59 +15031,59 @@ FtlMapWritePage:
 	uxth	r3, r3
 	adds	r1, r2, #1
 	strh	r3, [r4, #2]	@ movhi
-	bne	.L2225
+	bne	.L2211
 	ldr	r1, [r5, #4]
 	adds	r6, r6, #1
-	ldr	r0, .L2243+40
+	ldr	r0, .L2229+40
 	uxth	r6, r6
 	bl	printf
 	ldrh	r3, [r4, #2]
 	cmp	r3, #2
 	itttt	ls
-	ldrls	r3, .L2243+44
+	ldrls	r3, .L2229+44
 	ldrhls	r3, [r3]
 	addls	r3, r3, #-1
 	strhls	r3, [r4, #2]	@ movhi
 	cmp	r6, #3
-	bls	.L2218
+	bls	.L2204
 	mov	r2, r6
 	ldr	r1, [fp, #4]
-	ldr	r0, .L2243+48
+	ldr	r0, .L2229+48
 	bl	printf
 	ldr	r2, [sp, #8]
 	movs	r3, #1
 	str	r3, [r2]
-.L2238:
+.L2224:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2225:
-	cbz	r2, .L2228
+.L2211:
+	cbz	r2, .L2214
 	cmp	r3, #1
 	strh	r7, [r4, #40]	@ movhi
-	bne	.L2229
-.L2230:
+	bne	.L2215
+.L2216:
 	movs	r3, #0
 	str	r3, [r4, #36]
-	b	.L2218
-.L2229:
+	b	.L2204
+.L2215:
 	cmp	r2, #256
-.L2242:
-	beq	.L2230
+.L2228:
+	beq	.L2216
 	ldr	r3, [r4, #36]
 	cmp	r3, #0
-	bne	.L2230
+	bne	.L2216
 	ldr	r2, [fp, #4]
 	ldr	r3, [r4, #24]
 	str	r2, [r3, r8, lsl #2]
-	b	.L2238
-.L2228:
+	b	.L2224
+.L2214:
 	cmp	r3, #1
-	b	.L2242
-.L2244:
+	b	.L2228
+.L2230:
 	.align	2
-.L2243:
+.L2229:
 	.word	.LANCHOR170
 	.word	.LANCHOR78
 	.word	.LANCHOR223
@@ -15227,9 +15111,9 @@ flush_l2p_region:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #12
-	ldr	r5, .L2246
+	ldr	r5, .L2232
 	muls	r4, r0, r4
-	ldr	r0, .L2246+4
+	ldr	r0, .L2232+4
 	ldr	r3, [r5]
 	adds	r2, r3, r4
 	ldrh	r1, [r3, r4]
@@ -15242,9 +15126,9 @@ flush_l2p_region:
 	bic	r3, r3, #-2147483648
 	str	r3, [r4, #4]
 	pop	{r3, r4, r5, pc}
-.L2247:
+.L2233:
 	.align	2
-.L2246:
+.L2232:
 	.word	.LANCHOR98
 	.word	.LANCHOR130
 	.size	flush_l2p_region, .-flush_l2p_region
@@ -15261,30 +15145,30 @@ l2p_flush:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
 	movs	r4, #0
-	ldr	r5, .L2252
-	ldr	r6, .L2252+4
-.L2249:
+	ldr	r5, .L2238
+	ldr	r6, .L2238+4
+.L2235:
 	ldrh	r3, [r5]
 	uxth	r0, r4
 	cmp	r3, r0
-	bhi	.L2251
+	bhi	.L2237
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L2251:
+.L2237:
 	ldr	r2, [r6]
 	uxth	r3, r4
 	movs	r1, #12
 	mla	r3, r1, r3, r2
 	ldr	r3, [r3, #4]
 	cmp	r3, #0
-	bge	.L2250
+	bge	.L2236
 	bl	flush_l2p_region
-.L2250:
+.L2236:
 	adds	r4, r4, #1
-	b	.L2249
-.L2253:
+	b	.L2235
+.L2239:
 	.align	2
-.L2252:
+.L2238:
 	.word	.LANCHOR67
 	.word	.LANCHOR98
 	.size	l2p_flush, .-l2p_flush
@@ -15299,7 +15183,7 @@ l2p_flush:
 FtlVendorPartWrite:
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2266
+	ldr	r3, .L2252
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #56
 	str	r2, [sp]
@@ -15308,26 +15192,26 @@ FtlVendorPartWrite:
 	mov	r5, r1
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L2262
-	ldr	r3, .L2266+4
+	bhi	.L2248
+	ldr	r3, .L2252+4
 	mov	r8, #0
 	ldrh	r6, [r3]
 	lsr	r6, r0, r6
 	lsl	fp, r6, #2
-.L2256:
-	cbnz	r5, .L2261
-.L2254:
+.L2242:
+	cbnz	r5, .L2247
+.L2240:
 	mov	r0, r8
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2261:
-	ldr	r3, .L2266+8
+.L2247:
+	ldr	r3, .L2252+8
 	mov	r0, r7
-	ldr	r10, .L2266+24
+	ldr	r10, .L2252+24
 	ldr	r3, [r3]
 	ldr	r2, [r3, fp]
-	ldr	r3, .L2266+12
+	ldr	r3, .L2252+12
 	str	r2, [sp, #12]
 	ldrh	r3, [r3]
 	mov	r1, r3
@@ -15341,9 +15225,9 @@ FtlVendorPartWrite:
 	cmp	r5, r4
 	it	cc
 	uxthcc	r4, r5
-	cbz	r2, .L2258
+	cbz	r2, .L2244
 	cmp	r4, r3
-	beq	.L2258
+	beq	.L2244
 	ldr	r3, [r10]
 	add	r0, sp, #20
 	str	r2, [sp, #24]
@@ -15353,7 +15237,7 @@ FtlVendorPartWrite:
 	movs	r3, #0
 	str	r3, [sp, #32]
 	bl	FlashReadPages
-.L2259:
+.L2245:
 	lsls	r3, r4, #9
 	ldr	r0, [r10]
 	subs	r5, r5, r4
@@ -15366,7 +15250,7 @@ FtlVendorPartWrite:
 	bl	ftl_memcpy
 	ldr	r2, [r10]
 	mov	r1, r6
-	ldr	r0, .L2266+16
+	ldr	r0, .L2252+16
 	adds	r6, r6, #1
 	bl	FtlMapWritePage
 	ldr	r3, [sp]
@@ -15377,20 +15261,20 @@ FtlVendorPartWrite:
 	ldr	r3, [sp, #8]
 	add	r2, r2, r3
 	str	r2, [sp]
-	b	.L2256
-.L2258:
-	ldr	r3, .L2266+20
+	b	.L2242
+.L2244:
+	ldr	r3, .L2252+20
 	movs	r1, #0
 	ldr	r0, [r10]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-	b	.L2259
-.L2262:
+	b	.L2245
+.L2248:
 	mov	r8, #-1
-	b	.L2254
-.L2267:
+	b	.L2240
+.L2253:
 	.align	2
-.L2266:
+.L2252:
 	.word	.LANCHOR50
 	.word	.LANCHOR56
 	.word	.LANCHOR202
@@ -15411,63 +15295,63 @@ Ftl_save_ext_data:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L2270
-	ldr	r3, .L2270+4
+	ldr	r2, .L2256
+	ldr	r3, .L2256+4
 	ldr	r1, [r2]
 	cmp	r1, r3
-	bne	.L2268
-	ldr	r3, .L2270+8
+	bne	.L2254
+	ldr	r3, .L2256+8
 	movs	r1, #1
 	movs	r0, #0
 	str	r3, [r2, #4]
-	ldr	r3, .L2270+12
+	ldr	r3, .L2256+12
 	ldr	r3, [r3]
 	str	r3, [r2, #88]
-	ldr	r3, .L2270+16
+	ldr	r3, .L2256+16
 	ldr	r3, [r3]
 	str	r3, [r2, #92]
-	ldr	r3, .L2270+20
+	ldr	r3, .L2256+20
 	ldr	r3, [r3]
 	str	r3, [r2, #8]
-	ldr	r3, .L2270+24
+	ldr	r3, .L2256+24
 	ldr	r3, [r3]
 	str	r3, [r2, #12]
-	ldr	r3, .L2270+28
+	ldr	r3, .L2256+28
 	ldr	r3, [r3]
 	str	r3, [r2, #16]
-	ldr	r3, .L2270+32
+	ldr	r3, .L2256+32
 	ldr	r3, [r3]
 	str	r3, [r2, #20]
-	ldr	r3, .L2270+36
+	ldr	r3, .L2256+36
 	ldr	r3, [r3]
 	str	r3, [r2, #28]
-	ldr	r3, .L2270+40
+	ldr	r3, .L2256+40
 	ldr	r3, [r3]
 	str	r3, [r2, #32]
-	ldr	r3, .L2270+44
+	ldr	r3, .L2256+44
 	ldr	r3, [r3]
 	str	r3, [r2, #36]
-	ldr	r3, .L2270+48
+	ldr	r3, .L2256+48
 	ldr	r3, [r3]
 	str	r3, [r2, #40]
-	ldr	r3, .L2270+52
+	ldr	r3, .L2256+52
 	ldr	r3, [r3]
 	str	r3, [r2, #44]
-	ldr	r3, .L2270+56
+	ldr	r3, .L2256+56
 	ldr	r3, [r3]
 	str	r3, [r2, #48]
-	ldr	r3, .L2270+60
+	ldr	r3, .L2256+60
 	ldr	r3, [r3]
 	str	r3, [r2, #60]
-	ldr	r3, .L2270+64
+	ldr	r3, .L2256+64
 	ldr	r3, [r3]
 	str	r3, [r2, #64]
 	b	FtlVendorPartWrite
-.L2268:
+.L2254:
 	bx	lr
-.L2271:
+.L2257:
 	.align	2
-.L2270:
+.L2256:
 	.word	.LANCHOR141
 	.word	1179929683
 	.word	1342177379
@@ -15498,40 +15382,40 @@ FtlEctTblFlush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L2279
+	ldr	r3, .L2265
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L2277
-	ldr	r3, .L2279+4
+	beq	.L2263
+	ldr	r3, .L2265+4
 	ldr	r3, [r3]
 	cmp	r3, #39
 	ite	hi
 	movhi	r3, #32
 	movls	r3, #4
-.L2273:
-	ldr	r1, .L2279+8
+.L2259:
+	ldr	r1, .L2265+8
 	ldrh	r2, [r1]
 	cmp	r2, #31
 	ittt	ls
 	addls	r2, r2, #1
 	movls	r3, #1
 	strhls	r2, [r1]	@ movhi
-	ldr	r2, .L2279+12
-	cbnz	r0, .L2275
+	ldr	r2, .L2265+12
+	cbnz	r0, .L2261
 	ldr	r1, [r2]
 	ldr	r0, [r1, #20]
 	ldr	r1, [r1, #16]
 	add	r3, r3, r0
 	cmp	r1, r3
-	bcc	.L2276
-.L2275:
+	bcc	.L2262
+.L2261:
 	ldr	r2, [r2]
 	movs	r0, #64
 	ldr	r3, [r2, #16]
 	str	r3, [r2, #20]
-	ldr	r3, .L2279+16
+	ldr	r3, .L2265+16
 	str	r3, [r2]
-	ldr	r3, .L2279+20
+	ldr	r3, .L2265+20
 	ldrh	r1, [r3]
 	lsls	r3, r1, #9
 	str	r3, [r2, #12]
@@ -15542,15 +15426,15 @@ FtlEctTblFlush:
 	str	r3, [r2, #4]
 	bl	FtlVendorPartWrite
 	bl	Ftl_save_ext_data
-.L2276:
+.L2262:
 	movs	r0, #0
 	pop	{r3, pc}
-.L2277:
+.L2263:
 	movs	r3, #32
-	b	.L2273
-.L2280:
+	b	.L2259
+.L2266:
 	.align	2
-.L2279:
+.L2265:
 	.word	.LANCHOR104
 	.word	.LANCHOR175
 	.word	.LANCHOR227
@@ -15569,108 +15453,108 @@ FtlEctTblFlush:
 allocate_new_data_superblock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2308
+	ldr	r3, .L2294
 	push	{r4, r5, r6, lr}
 	mov	r4, r0
 	ldrh	r5, [r0]
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	bcs	.L2282
-	ldr	r1, .L2308+4
+	bcs	.L2268
+	ldr	r1, .L2294+4
 	movw	r2, #3650
-	ldr	r0, .L2308+8
+	ldr	r0, .L2294+8
 	bl	printf
-	ldr	r1, .L2308+12
-	ldr	r0, .L2308+16
+	ldr	r1, .L2294+12
+	ldr	r0, .L2294+16
 	bl	printf
-.L2282:
-	ldr	r3, .L2308+20
+.L2268:
+	ldr	r3, .L2294+20
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L2283
+	bne	.L2269
 	movw	r3, #65535
 	cmp	r5, r3
-	beq	.L2284
-	ldr	r3, .L2308+24
+	beq	.L2270
+	ldr	r3, .L2294+24
 	mov	r0, r5
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r5, lsl #1]
-	cbz	r3, .L2285
+	cbz	r3, .L2271
 	bl	INSERT_DATA_LIST
-.L2284:
+.L2270:
 	movs	r3, #0
 	strb	r3, [r4, #8]
-	ldr	r3, .L2308+28
+	ldr	r3, .L2294+28
 	cmp	r4, r3
-	beq	.L2286
-	ldr	r3, .L2308+32
+	beq	.L2272
+	ldr	r3, .L2294+32
 	ldrh	r2, [r3]
 	cmp	r2, #1
-	beq	.L2286
-	ldr	r3, .L2308+36
+	beq	.L2272
+	ldr	r3, .L2294+36
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2287
-.L2286:
+	cbz	r3, .L2273
+.L2272:
 	movs	r3, #1
 	strb	r3, [r4, #8]
-.L2288:
-	ldr	r6, .L2308+40
+.L2274:
+	ldr	r6, .L2294+40
 	movw	r2, #65535
 	ldrh	r0, [r6]
 	cmp	r0, r2
-	beq	.L2293
+	beq	.L2279
 	cmp	r5, r0
-	bne	.L2294
-	ldr	r3, .L2308+24
+	bne	.L2280
+	ldr	r3, .L2294+24
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L2295
-.L2294:
+	cbz	r3, .L2281
+.L2280:
 	bl	update_vpc_list
-.L2295:
+.L2281:
 	movw	r3, #65535
 	strh	r3, [r6]	@ movhi
-.L2293:
+.L2279:
 	mov	r0, r4
 	bl	allocate_data_superblock
 	bl	l2p_flush
 	movs	r0, #0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L2283:
+.L2269:
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L2285:
+.L2271:
 	bl	INSERT_FREE_LIST
-	b	.L2284
-.L2287:
-	ldr	r3, .L2308+44
+	b	.L2270
+.L2273:
+	ldr	r3, .L2294+44
 	cmp	r4, r3
-	bne	.L2288
+	bne	.L2274
 	cmp	r2, #3
-	beq	.L2290
-	ldr	r2, .L2308+48
+	beq	.L2276
+	ldr	r2, .L2294+48
 	ldr	r2, [r2]
 	cmp	r2, #1
-	bne	.L2291
-.L2290:
+	bne	.L2277
+.L2276:
 	movs	r2, #1
 	strb	r2, [r3, #8]
-.L2291:
-	ldr	r2, .L2308+52
+.L2277:
+	ldr	r2, .L2294+52
 	ldr	r2, [r2]
 	cmp	r2, #0
-	beq	.L2288
-	ldr	r2, .L2308+56
+	beq	.L2274
+	ldr	r2, .L2294+56
 	ldr	r2, [r2]
 	cmp	r2, #39
 	itt	ls
 	movls	r2, #1
 	strbls	r2, [r3, #8]
-	b	.L2288
-.L2309:
+	b	.L2274
+.L2295:
 	.align	2
-.L2308:
+.L2294:
 	.word	.LANCHOR40
 	.word	.LANCHOR228
 	.word	.LC5
@@ -15698,7 +15582,7 @@ allocate_new_data_superblock:
 FtlVendorPartRead:
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2320
+	ldr	r3, .L2306
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, r2
 	adds	r2, r0, r1
@@ -15707,28 +15591,28 @@ FtlVendorPartRead:
 	mov	r6, r1
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L2319
-	ldr	r3, .L2320+4
+	bhi	.L2305
+	ldr	r3, .L2306+4
 	mov	r8, #0
-	ldr	fp, .L2320+28
+	ldr	fp, .L2306+28
 	ldrh	r5, [r3]
 	lsr	r5, r0, r5
 	lsls	r3, r5, #2
 	str	r3, [sp]
-.L2312:
-	cbnz	r6, .L2318
-.L2310:
+.L2298:
+	cbnz	r6, .L2304
+.L2296:
 	mov	r0, r8
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2318:
-	ldr	r3, .L2320+8
+.L2304:
+	ldr	r3, .L2306+8
 	mov	r0, r7
 	ldr	r2, [sp]
 	ldr	r3, [r3]
 	ldr	r3, [r3, r2]
-	ldr	r2, .L2320+12
+	ldr	r2, .L2306+12
 	str	r3, [sp, #8]
 	ldrh	r4, [r2]
 	mov	r1, r4
@@ -15743,7 +15627,7 @@ FtlVendorPartRead:
 	lsls	r2, r4, #9
 	str	r2, [sp, #8]
 	cmp	r3, #0
-	beq	.L2314
+	beq	.L2300
 	ldr	r2, [fp]
 	add	r0, sp, #20
 	str	r3, [sp, #24]
@@ -15757,28 +15641,28 @@ FtlVendorPartRead:
 	ldr	r2, [sp, #20]
 	ldr	r3, [sp, #12]
 	adds	r2, r2, #1
-	ldr	r2, .L2320+16
+	ldr	r2, .L2306+16
 	it	eq
 	moveq	r8, #-1
 	ldr	r2, [r2]
 	cmp	r2, #256
-	bne	.L2316
+	bne	.L2302
 	mov	r2, r3
 	mov	r1, r5
-	ldr	r0, .L2320+20
+	ldr	r0, .L2306+20
 	bl	printf
 	ldr	r2, [fp]
 	mov	r1, r5
-	ldr	r0, .L2320+24
+	ldr	r0, .L2306+24
 	bl	FtlMapWritePage
-.L2316:
+.L2302:
 	ldr	r1, [fp]
 	lsls	r2, r4, #9
 	ldr	r3, [sp, #4]
 	mov	r0, r10
 	add	r1, r1, r3, lsl #9
 	bl	ftl_memcpy
-.L2317:
+.L2303:
 	ldr	r3, [sp, #8]
 	adds	r5, r5, #1
 	subs	r6, r6, r4
@@ -15787,19 +15671,19 @@ FtlVendorPartRead:
 	ldr	r3, [sp]
 	adds	r3, r3, #4
 	str	r3, [sp]
-	b	.L2312
-.L2314:
+	b	.L2298
+.L2300:
 	lsls	r2, r4, #9
 	mov	r1, r3
 	mov	r0, r10
 	bl	ftl_memset
-	b	.L2317
-.L2319:
+	b	.L2303
+.L2305:
 	mov	r8, #-1
-	b	.L2310
-.L2321:
+	b	.L2296
+.L2307:
 	.align	2
-.L2320:
+.L2306:
 	.word	.LANCHOR50
 	.word	.LANCHOR56
 	.word	.LANCHOR202
@@ -15822,30 +15706,30 @@ FtlLoadEctTbl:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r0, #64
-	ldr	r4, .L2324
-	ldr	r5, .L2324+4
+	ldr	r4, .L2310
+	ldr	r5, .L2310+4
 	ldr	r2, [r4]
 	ldrh	r1, [r5]
 	bl	FtlVendorPartRead
 	ldr	r3, [r4]
 	ldr	r2, [r3]
-	ldr	r3, .L2324+8
+	ldr	r3, .L2310+8
 	cmp	r2, r3
-	beq	.L2323
-	ldr	r1, .L2324+12
-	ldr	r0, .L2324+16
+	beq	.L2309
+	ldr	r1, .L2310+12
+	ldr	r0, .L2310+16
 	bl	printf
 	ldrh	r2, [r5]
 	movs	r1, #0
 	ldr	r0, [r4]
 	lsls	r2, r2, #9
 	bl	ftl_memset
-.L2323:
+.L2309:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L2325:
+.L2311:
 	.align	2
-.L2324:
+.L2310:
 	.word	.LANCHOR199
 	.word	.LANCHOR198
 	.word	1112818501
@@ -15865,99 +15749,99 @@ Ftl_load_ext_data:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r1, #1
-	ldr	r4, .L2331
+	ldr	r4, .L2317
 	movs	r0, #0
-	ldr	r5, .L2331+4
+	ldr	r5, .L2317+4
 	mov	r2, r4
 	bl	FtlVendorPartRead
 	ldr	r3, [r4]
 	cmp	r3, r5
-	beq	.L2327
+	beq	.L2313
 	mov	r2, #512
 	movs	r1, #0
 	mov	r0, r4
 	bl	ftl_memset
 	str	r5, [r4]
-.L2327:
+.L2313:
 	ldr	r3, [r4]
 	cmp	r3, r5
-	ldr	r5, .L2331+8
-	bne	.L2328
+	ldr	r5, .L2317+8
+	bne	.L2314
 	ldr	r2, [r4, #88]
-	ldr	r3, .L2331+12
+	ldr	r3, .L2317+12
 	str	r2, [r3]
 	ldr	r2, [r4, #92]
-	ldr	r3, .L2331+16
+	ldr	r3, .L2317+16
 	str	r2, [r3]
 	ldr	r2, [r4, #8]
-	ldr	r3, .L2331+20
+	ldr	r3, .L2317+20
 	str	r2, [r3]
 	ldr	r2, [r4, #12]
-	ldr	r3, .L2331+24
+	ldr	r3, .L2317+24
 	str	r2, [r3]
 	ldr	r2, [r4, #16]
-	ldr	r3, .L2331+28
+	ldr	r3, .L2317+28
 	str	r2, [r3]
 	ldr	r2, [r4, #20]
-	ldr	r3, .L2331+32
+	ldr	r3, .L2317+32
 	str	r2, [r3]
 	ldr	r3, [r4, #28]
 	ldr	r2, [r4, #32]
 	str	r3, [r5]
-	ldr	r3, .L2331+36
+	ldr	r3, .L2317+36
 	str	r2, [r3]
 	ldr	r2, [r4, #36]
-	ldr	r3, .L2331+40
+	ldr	r3, .L2317+40
 	str	r2, [r3]
 	ldr	r2, [r4, #40]
-	ldr	r3, .L2331+44
+	ldr	r3, .L2317+44
 	str	r2, [r3]
 	ldr	r2, [r4, #44]
-	ldr	r3, .L2331+48
+	ldr	r3, .L2317+48
 	str	r2, [r3]
 	ldr	r2, [r4, #48]
-	ldr	r3, .L2331+52
+	ldr	r3, .L2317+52
 	str	r2, [r3]
 	ldr	r2, [r4, #60]
-	ldr	r3, .L2331+56
+	ldr	r3, .L2317+56
 	str	r2, [r3]
-.L2328:
-	ldr	r2, .L2331+60
+.L2314:
+	ldr	r2, .L2317+60
 	movs	r3, #0
 	ldr	r1, [r4, #68]
 	str	r3, [r2]
-	ldr	r2, .L2331+64
+	ldr	r2, .L2317+64
 	cmp	r1, r2
-	bne	.L2329
-	ldr	r2, .L2331+68
+	bne	.L2315
+	ldr	r2, .L2317+68
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbz	r2, .L2330
+	cbz	r2, .L2316
 	str	r3, [r4, #68]
 	bl	Ftl_save_ext_data
-.L2329:
-	ldr	r3, .L2331+72
-	ldr	r1, .L2331+76
+.L2315:
+	ldr	r3, .L2317+72
+	ldr	r1, .L2317+76
 	ldrh	r2, [r3]
-	ldr	r3, .L2331+80
+	ldr	r3, .L2317+80
 	ldrh	r1, [r1]
 	ldr	r0, [r3]
 	ldr	r3, [r5]
 	mla	r0, r0, r2, r3
 	bl	__aeabi_uidiv
-	ldr	r3, .L2331+84
+	ldr	r3, .L2317+84
 	str	r0, [r3]
 	pop	{r3, r4, r5, pc}
-.L2330:
-	ldr	r3, .L2331+88
+.L2316:
+	ldr	r3, .L2317+88
 	movs	r2, #1
-	ldr	r1, .L2331+92
-	ldr	r0, .L2331+96
+	ldr	r1, .L2317+92
+	ldr	r0, .L2317+96
 	str	r2, [r3]
 	bl	printf
-	b	.L2329
-.L2332:
+	b	.L2315
+.L2318:
 	.align	2
-.L2331:
+.L2317:
 	.word	.LANCHOR141
 	.word	1179929683
 	.word	.LANCHOR173
@@ -15999,34 +15883,34 @@ FtlMapBlkWriteDumpData:
 	mov	r4, r0
 	ldr	r3, [r0, #36]
 	cmp	r3, #0
-	beq	.L2333
+	beq	.L2319
 	movs	r3, #0
 	ldrh	r6, [r0, #6]
 	str	r3, [r0, #36]
-	ldr	r3, .L2347
+	ldr	r3, .L2333
 	ldr	r10, [r0, #24]
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L2333
-	ldr	r3, .L2347+4
-	ldr	r5, .L2347+8
+	bne	.L2319
+	ldr	r3, .L2333+4
+	ldr	r5, .L2333+8
 	ldr	r3, [r3]
 	mov	r7, r5
 	str	r3, [r5, #8]
-	ldr	r3, .L2347+12
+	ldr	r3, .L2333+12
 	ldr	r8, [r3]
 	ldrh	r3, [r0, #2]
 	str	r8, [r5, #12]
-	cbz	r3, .L2337
-	ldr	r2, .L2347+16
+	cbz	r3, .L2323
+	ldr	r2, .L2333+16
 	ldrh	r2, [r2]
 	subs	r2, r2, #1
 	cmp	r3, r2
-	bge	.L2337
+	bge	.L2323
 	ldrh	r2, [r0]
 	movw	r1, #65535
 	cmp	r2, r1
-	beq	.L2337
+	beq	.L2323
 	ldr	r1, [r0, #12]
 	subs	r3, r3, #1
 	mov	r0, r5
@@ -16038,44 +15922,44 @@ FtlMapBlkWriteDumpData:
 	bl	FlashReadPages
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L2337
+	beq	.L2323
 	ldr	r3, [r4, #24]
 	ldrh	r1, [r8, #8]
 	ldr	r2, [r3, r1, lsl #2]
 	ldr	r3, [r5, #4]
 	cmp	r2, r3
-	bne	.L2337
+	bne	.L2323
 	ldr	r2, [r5, #8]
-.L2346:
+.L2332:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
 	b	FtlMapWritePage
-.L2337:
+.L2323:
 	subs	r6, r6, #1
 	uxth	r6, r6
 	ldr	r3, [r10, r6, lsl #2]
 	str	r3, [r7, #4]
-	cbz	r3, .L2338
+	cbz	r3, .L2324
 	movs	r2, #1
-	ldr	r0, .L2347+8
+	ldr	r0, .L2333+8
 	mov	r1, r2
 	bl	FlashReadPages
-.L2339:
+.L2325:
 	ldr	r2, [r7, #8]
 	mov	r1, r6
-	b	.L2346
-.L2338:
-	ldr	r3, .L2347+20
+	b	.L2332
+.L2324:
+	ldr	r3, .L2333+20
 	movs	r1, #255
 	ldr	r0, [r7, #8]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-	b	.L2339
-.L2333:
+	b	.L2325
+.L2319:
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L2348:
+.L2334:
 	.align	2
-.L2347:
+.L2333:
 	.word	.LANCHOR78
 	.word	.LANCHOR190
 	.word	.LANCHOR211
@@ -16096,69 +15980,69 @@ FtlScanSysBlk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r5, .L2431
+	ldr	r5, .L2417
 	sub	sp, sp, #32
 	mov	r1, r4
-	ldr	r3, .L2431+4
+	ldr	r3, .L2417+4
 	ldr	r2, [r5]
-	ldr	r6, .L2431+8
+	ldr	r6, .L2417+8
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L2431+12
+	ldr	r3, .L2417+12
 	lsls	r2, r2, #2
 	strh	r4, [r6]	@ movhi
-	ldr	r7, .L2431+16
+	ldr	r7, .L2417+16
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldr	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L2431+20
+	ldr	r3, .L2417+20
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r7]
 	mov	r1, r4
-	ldr	r3, .L2431+24
+	ldr	r3, .L2417+24
 	lsls	r2, r2, #2
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r7]
 	mov	r1, r4
-	ldr	r3, .L2431+28
+	ldr	r3, .L2417+28
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	movs	r2, #16
 	movs	r1, #255
-	ldr	r0, .L2431+32
+	ldr	r0, .L2417+32
 	bl	ftl_memset
-	ldr	r3, .L2431+36
+	ldr	r3, .L2417+36
 	str	r6, [sp, #12]
 	str	r5, [sp, #16]
 	ldrh	r3, [r3]
 	str	r3, [sp, #4]
-.L2350:
-	ldr	r3, .L2431+40
+.L2336:
+	ldr	r3, .L2417+40
 	ldr	r2, [sp, #4]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bls	.L2392
-	ldr	r3, .L2431+44
+	bls	.L2378
+	ldr	r3, .L2417+44
 	movs	r5, #0
-	ldr	r1, .L2431+48
+	ldr	r1, .L2417+48
 	mov	fp, r5
 	movs	r7, #36
 	ldrh	r8, [r3]
-	ldr	r3, .L2431+52
+	ldr	r3, .L2417+52
 	ldr	r2, [r1]
-	ldr	r1, .L2431+56
+	ldr	r1, .L2417+56
 	ldr	r6, [r3]
-	ldr	r3, .L2431+60
+	ldr	r3, .L2417+60
 	str	r2, [sp, #8]
 	ldrh	r10, [r1]
 	ldr	r3, [r3]
-	ldr	r2, .L2431+64
-	b	.L2393
-.L2352:
+	ldr	r2, .L2417+64
+	b	.L2379
+.L2338:
 	ldrb	r0, [r2, r5]	@ zero_extendqisi2
 	ldr	r1, [sp, #4]
 	str	r3, [sp, #28]
@@ -16168,7 +16052,7 @@ FtlScanSysBlk:
 	bl	FtlBbmIsBadBlock
 	ldr	r2, [sp, #24]
 	ldr	r3, [sp, #28]
-	cbnz	r0, .L2351
+	cbnz	r0, .L2337
 	ldr	r1, [sp, #20]
 	mla	r0, r7, fp, r6
 	ldr	r4, [sp, #8]
@@ -16181,31 +16065,31 @@ FtlScanSysBlk:
 	str	r1, [r0, #12]
 	add	r1, fp, #1
 	uxth	fp, r1
-.L2351:
+.L2337:
 	adds	r5, r5, #1
-.L2393:
+.L2379:
 	uxth	r1, r5
 	cmp	r8, r1
-	bhi	.L2352
+	bhi	.L2338
 	cmp	fp, #0
-	bne	.L2353
-.L2391:
+	bne	.L2339
+.L2377:
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	str	r3, [sp, #4]
-	b	.L2350
-.L2353:
+	b	.L2336
+.L2339:
 	movs	r7, #0
 	movs	r2, #1
 	mov	r1, fp
 	mov	r0, r6
 	bl	FlashReadPages
-.L2354:
+.L2340:
 	uxth	r3, r7
 	cmp	fp, r3
-	bls	.L2391
-	ldr	r3, .L2431+52
+	bls	.L2377
+	ldr	r3, .L2417+52
 	mov	r8, #36
 	mul	r8, r8, r7
 	ldr	r3, [r3]
@@ -16215,10 +16099,10 @@ FtlScanSysBlk:
 	ldr	r6, [r2, #12]
 	adds	r3, r3, #1
 	ubfx	r5, r5, #10, #16
-	bne	.L2357
+	bne	.L2343
 	mov	r10, #16
-.L2359:
-	ldr	r3, .L2431+52
+.L2345:
+	ldr	r3, .L2417+52
 	movs	r2, #1
 	mov	r1, r2
 	ldr	r0, [r3]
@@ -16230,88 +16114,88 @@ FtlScanSysBlk:
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	ldr	r3, .L2431+52
+	ldr	r3, .L2417+52
 	ldr	r3, [r3]
-	bne	.L2356
+	bne	.L2342
 	mov	r2, #-1
 	str	r2, [r3, r8]
-	ldr	r3, .L2431+52
+	ldr	r3, .L2417+52
 	ldr	r3, [r3]
 	ldr	r3, [r3, r8]
 	cmp	r3, r2
-	beq	.L2358
-.L2357:
-	ldr	r3, .L2431+68
+	beq	.L2344
+.L2343:
+	ldr	r3, .L2417+68
 	ldr	r2, [r3]
 	ldr	r3, [r6, #4]
 	adds	r1, r2, #1
-	beq	.L2360
+	beq	.L2346
 	cmp	r2, r3
-	bhi	.L2361
-.L2360:
+	bhi	.L2347
+.L2346:
 	adds	r2, r3, #1
 	ittt	ne
-	ldrne	r1, .L2431+68
+	ldrne	r1, .L2417+68
 	addne	r2, r3, #1
 	strne	r2, [r1]
-.L2361:
+.L2347:
 	ldrh	r2, [r6]
 	movw	r1, #61604
 	cmp	r2, r1
-	beq	.L2363
-	bhi	.L2364
+	beq	.L2349
+	bhi	.L2350
 	movw	r3, #61574
 	cmp	r2, r3
-	beq	.L2365
-.L2362:
+	beq	.L2351
+.L2348:
 	adds	r7, r7, #1
-	b	.L2354
-.L2356:
+	b	.L2340
+.L2342:
 	ldr	r3, [r3, r8]
 	adds	r3, r3, #1
-	bne	.L2357
+	bne	.L2343
 	add	r10, r10, #-1
 	uxth	r10, r10
 	cmp	r10, #0
-	bne	.L2359
-.L2358:
-	ldr	r3, .L2431+72
+	bne	.L2345
+.L2344:
+	ldr	r3, .L2417+72
 	ldrb	r1, [r3]	@ zero_extendqisi2
-	cbnz	r1, .L2430
-.L2389:
+	cbnz	r1, .L2416
+.L2375:
 	mov	r0, r5
 	bl	FtlFreeSysBlkQueueIn
-	b	.L2362
-.L2364:
+	b	.L2348
+.L2350:
 	movw	r3, #61634
 	cmp	r2, r3
-	beq	.L2366
+	beq	.L2352
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L2362
-.L2430:
+	bne	.L2348
+.L2416:
 	movs	r1, #0
-	b	.L2389
-.L2366:
-	ldr	r3, .L2431+8
+	b	.L2375
+.L2352:
+	ldr	r3, .L2417+8
 	ldrh	r2, [r3]
-	ldr	r3, .L2431
+	ldr	r3, .L2417
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bls	.L2368
-	ldr	r1, .L2431+76
+	bls	.L2354
+	ldr	r1, .L2417+76
 	movw	r2, #1469
-	ldr	r0, .L2431+80
+	ldr	r0, .L2417+80
 	bl	printf
-	ldr	r1, .L2431+84
-	ldr	r0, .L2431+88
+	ldr	r1, .L2417+84
+	ldr	r0, .L2417+88
 	bl	printf
-.L2368:
+.L2354:
 	ldr	r3, [sp, #16]
 	ldr	r2, [sp, #12]
 	ldr	r1, [r3]
 	ldrh	r0, [r2]
-	ldr	r2, .L2431+12
+	ldr	r2, .L2417+12
 	uxth	r10, r1
 	ldr	ip, [r2]
 	add	r3, r10, #-1
@@ -16319,61 +16203,61 @@ FtlScanSysBlk:
 	add	r10, r10, #-1
 	sxth	r3, r3
 	sxth	r10, r10
-.L2369:
+.L2355:
 	cmp	r3, r10
-	bgt	.L2375
+	bgt	.L2361
 	cmp	r3, #0
-	bge	.L2408
-	b	.L2362
-.L2375:
+	bge	.L2394
+	b	.L2348
+.L2361:
 	ldr	r2, [ip, r3, lsl #2]
 	add	r8, ip, r3, lsl #2
 	ldr	r4, [r6, #4]
 	cmp	r4, r2
-	bls	.L2370
+	bls	.L2356
 	ldr	r2, [ip]
-	cbnz	r2, .L2371
+	cbnz	r2, .L2357
 	cmp	r1, r0
 	ittt	ne
-	ldrne	r2, .L2431+8
+	ldrne	r2, .L2417+8
 	addne	r0, r0, #1
 	strhne	r0, [r2]	@ movhi
-.L2371:
-	ldr	r2, .L2431+20
+.L2357:
+	ldr	r2, .L2417+20
 	uxth	r10, r3
 	ldr	r0, [r2]
 	movs	r2, #0
-.L2372:
+.L2358:
 	uxth	lr, r2
 	sxth	r1, r2
 	cmp	r10, lr
-	bhi	.L2373
+	bhi	.L2359
 	ldr	r2, [r6, #4]
 	cmp	r3, #0
 	str	r2, [r8]
 	strh	r5, [r0, r3, lsl #1]	@ movhi
-	blt	.L2362
-	ldr	r2, .L2431+8
+	blt	.L2348
+	ldr	r2, .L2417+8
 	ldrh	r0, [r2]
-	ldr	r2, .L2431
+	ldr	r2, .L2417
 	ldr	r2, [r2]
 	subs	r2, r2, r0
 	subs	r2, r2, #1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L2362
-.L2408:
-	ldr	r2, .L2431+8
+	bgt	.L2348
+.L2394:
+	ldr	r2, .L2417+8
 	adds	r0, r0, #1
 	strh	r0, [r2]	@ movhi
 	ldr	r2, [r6, #4]
 	str	r2, [ip, r3, lsl #2]
-	ldr	r2, .L2431+20
-.L2428:
+	ldr	r2, .L2417+20
+.L2414:
 	ldr	r2, [r2]
 	strh	r5, [r2, r3, lsl #1]	@ movhi
-	b	.L2362
-.L2373:
+	b	.L2348
+.L2359:
 	add	lr, ip, r1, lsl #2
 	adds	r2, r2, #1
 	ldr	r4, [lr, #4]
@@ -16381,14 +16265,14 @@ FtlScanSysBlk:
 	ldrh	lr, [lr, #2]
 	str	r4, [ip, r1, lsl #2]
 	strh	lr, [r0, r1, lsl #1]	@ movhi
-	b	.L2372
-.L2370:
+	b	.L2358
+.L2356:
 	subs	r3, r3, #1
 	sxth	r3, r3
-	b	.L2369
-.L2432:
+	b	.L2355
+.L2418:
 	.align	2
-.L2431:
+.L2417:
 	.word	.LANCHOR64
 	.word	.LANCHOR70
 	.word	.LANCHOR131
@@ -16412,75 +16296,75 @@ FtlScanSysBlk:
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-.L2365:
-	ldr	r8, .L2433+20
-	ldr	r10, .L2433+28
+.L2351:
+	ldr	r8, .L2419+20
+	ldr	r10, .L2419+28
 	ldrh	r2, [r8]
 	ldrh	r3, [r10]
 	cmp	r2, r3
-	bls	.L2378
-	ldr	r1, .L2433
+	bls	.L2364
+	ldr	r1, .L2419
 	movw	r2, #1513
-	ldr	r0, .L2433+4
+	ldr	r0, .L2419+4
 	bl	printf
-	ldr	r1, .L2433+8
-	ldr	r0, .L2433+12
+	ldr	r1, .L2419+8
+	ldr	r0, .L2419+12
 	bl	printf
-.L2378:
-	ldr	r2, .L2433+16
+.L2364:
+	ldr	r2, .L2419+16
 	ldrh	lr, [r10]
 	ldrh	ip, [r8]
 	ldr	r0, [r2]
 	add	r10, lr, #-1
 	sxth	r3, r10
 	sub	r10, r10, ip
-.L2379:
+.L2365:
 	cmp	r3, r10
-	ble	.L2384
+	ble	.L2370
 	ldr	r1, [r6, #4]
 	add	r8, r0, r3, lsl #2
 	ldr	r2, [r0, r3, lsl #2]
 	cmp	r1, r2
-	bls	.L2380
+	bls	.L2366
 	ldr	r2, [r0]
-	cbnz	r2, .L2381
+	cbnz	r2, .L2367
 	cmp	lr, ip
 	ittt	ne
-	ldrne	r2, .L2433+20
+	ldrne	r2, .L2419+20
 	addne	ip, ip, #1
 	strhne	ip, [r2]	@ movhi
-.L2381:
-	ldr	r2, .L2433+24
+.L2367:
+	ldr	r2, .L2419+24
 	uxth	r10, r3
 	ldr	ip, [r2]
 	movs	r2, #0
-.L2382:
+.L2368:
 	uxth	lr, r2
 	sxth	r1, r2
 	cmp	r10, lr
-	bhi	.L2383
+	bhi	.L2369
 	ldr	r2, [r6, #4]
 	str	r2, [r8]
 	strh	r5, [ip, r3, lsl #1]	@ movhi
-.L2384:
+.L2370:
 	cmp	r3, #0
-	blt	.L2362
-	ldr	r2, .L2433+28
-	ldr	ip, .L2433+20
+	blt	.L2348
+	ldr	r2, .L2419+28
+	ldr	ip, .L2419+20
 	ldrh	r2, [r2]
 	ldrh	r1, [ip]
 	subs	r2, r2, #1
 	subs	r2, r2, r1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L2362
+	bgt	.L2348
 	ldr	r2, [r6, #4]
 	adds	r1, r1, #1
 	strh	r1, [ip]	@ movhi
 	str	r2, [r0, r3, lsl #2]
-	ldr	r2, .L2433+24
-	b	.L2428
-.L2383:
+	ldr	r2, .L2419+24
+	b	.L2414
+.L2369:
 	add	lr, r0, r1, lsl #2
 	adds	r2, r2, #1
 	ldr	r4, [lr, #4]
@@ -16488,91 +16372,91 @@ FtlScanSysBlk:
 	ldrh	lr, [lr, #2]
 	str	r4, [r0, r1, lsl #2]
 	strh	lr, [ip, r1, lsl #1]	@ movhi
-	b	.L2382
-.L2380:
+	b	.L2368
+.L2366:
 	subs	r3, r3, #1
 	sxth	r3, r3
-	b	.L2379
-.L2363:
-	ldr	r8, .L2433+48
+	b	.L2365
+.L2349:
+	ldr	r8, .L2419+48
 	movw	r2, #65535
 	ldrh	r1, [r8]
 	cmp	r1, r2
-	bne	.L2386
-.L2429:
+	bne	.L2372
+.L2415:
 	strh	r5, [r8]	@ movhi
 	str	r3, [r8, #8]
-	b	.L2362
-.L2386:
+	b	.L2348
+.L2372:
 	ldrh	r0, [r8, #4]
 	cmp	r0, r2
-	beq	.L2387
+	beq	.L2373
 	movs	r1, #1
 	bl	FtlFreeSysBlkQueueIn
-.L2387:
+.L2373:
 	ldr	r3, [r6, #4]
 	ldr	r2, [r8, #8]
 	cmp	r2, r3
-	bcs	.L2388
+	bcs	.L2374
 	ldrh	r2, [r8]
 	strh	r2, [r8, #4]	@ movhi
-	b	.L2429
-.L2388:
+	b	.L2415
+.L2374:
 	strh	r5, [r8, #4]	@ movhi
-	b	.L2362
-.L2392:
-	ldr	r3, .L2433+32
+	b	.L2348
+.L2378:
+	ldr	r3, .L2419+32
 	ldr	r2, [r3]
 	ldrh	r3, [r2]
-	cbz	r3, .L2394
-.L2397:
-	ldr	r3, .L2433+24
+	cbz	r3, .L2380
+.L2383:
+	ldr	r3, .L2419+24
 	ldr	r4, [r3]
 	ldrh	r2, [r4]
 	cmp	r2, #0
-	beq	.L2395
-.L2396:
-	ldr	r3, .L2433+36
+	beq	.L2381
+.L2382:
+	ldr	r3, .L2419+36
 	ldrh	r2, [r3]
-	ldr	r3, .L2433+40
+	ldr	r3, .L2419+40
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bls	.L2427
-	ldr	r1, .L2433
+	bls	.L2413
+	ldr	r1, .L2419
 	movw	r2, #1631
-	ldr	r0, .L2433+4
+	ldr	r0, .L2419+4
 	bl	printf
-	ldr	r1, .L2433+8
-	ldr	r0, .L2433+12
+	ldr	r1, .L2419+8
+	ldr	r0, .L2419+12
 	bl	printf
-.L2427:
+.L2413:
 	movs	r0, #0
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2394:
-	ldr	r1, .L2433+36
+.L2380:
+	ldr	r1, .L2419+36
 	ldrh	r1, [r1]
 	cmp	r1, #0
-	beq	.L2397
-	ldr	r5, .L2433+40
+	beq	.L2383
+	ldr	r5, .L2419+40
 	ldr	r0, [r5]
-.L2398:
+.L2384:
 	sxth	r1, r3
 	cmp	r1, r0
-	bcs	.L2397
+	bcs	.L2383
 	ldrh	r4, [r2, r1, lsl #1]
 	adds	r3, r3, #1
 	cmp	r4, #0
-	beq	.L2398
-	ldr	r3, .L2433+44
+	beq	.L2384
+	ldr	r3, .L2419+44
 	movs	r6, #0
 	ldr	r0, [r3]
 	mov	r3, r1
-.L2399:
+.L2385:
 	ldr	r4, [r5]
 	cmp	r3, r4
-	bcs	.L2397
+	bcs	.L2383
 	ldrh	r7, [r2, r3, lsl #1]
 	subs	r4, r3, r1
 	strh	r7, [r2, r4, lsl #1]	@ movhi
@@ -16581,30 +16465,30 @@ FtlScanSysBlk:
 	strh	r6, [r2, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	sxth	r3, r3
-	b	.L2399
-.L2395:
-	ldr	r3, .L2433+20
+	b	.L2385
+.L2381:
+	ldr	r3, .L2419+20
 	ldrh	r3, [r3]
 	cmp	r3, #0
-	beq	.L2396
-	ldr	r5, .L2433+28
+	beq	.L2382
+	ldr	r5, .L2419+28
 	ldrh	r1, [r5]
-.L2404:
+.L2390:
 	sxth	r3, r2
 	cmp	r3, r1
 	mov	r6, r3
-	bge	.L2396
+	bge	.L2382
 	ldrh	r0, [r4, r3, lsl #1]
 	adds	r2, r2, #1
 	cmp	r0, #0
-	beq	.L2404
-	ldr	r2, .L2433+16
+	beq	.L2390
+	ldr	r2, .L2419+16
 	movs	r0, #0
 	ldr	r2, [r2]
-.L2405:
+.L2391:
 	ldrh	r1, [r5]
 	cmp	r3, r1
-	bge	.L2396
+	bge	.L2382
 	ldrh	r7, [r4, r3, lsl #1]
 	subs	r1, r3, r6
 	strh	r7, [r4, r1, lsl #1]	@ movhi
@@ -16613,10 +16497,10 @@ FtlScanSysBlk:
 	adds	r1, r3, #1
 	strh	r0, [r4, r3, lsl #1]	@ movhi
 	sxth	r3, r1
-	b	.L2405
-.L2434:
+	b	.L2391
+.L2420:
 	.align	2
-.L2433:
+.L2419:
 	.word	.LANCHOR229
 	.word	.LC5
 	.word	.LC6
@@ -16644,88 +16528,88 @@ FtlLoadSysInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r1, #0
-	ldr	r7, .L2469
+	ldr	r7, .L2455
 	sub	sp, sp, #40
-	ldr	r6, .L2469+4
+	ldr	r6, .L2455+4
 	ldr	r3, [r7]
-	ldr	r4, .L2469+8
-	ldr	r8, .L2469+52
+	ldr	r4, .L2455+8
+	ldr	r8, .L2455+52
 	ldrh	r2, [r6]
-	ldr	r5, .L2469+12
+	ldr	r5, .L2455+12
 	str	r3, [r4, #8]
 	ldr	r3, [r8]
 	lsls	r2, r2, #1
 	ldr	r0, [r5]
 	str	r3, [r4, #12]
 	bl	ftl_memset
-	ldr	r3, .L2469+16
+	ldr	r3, .L2455+16
 	movw	r2, #65535
 	str	r8, [sp, #24]
 	str	r5, [sp, #28]
 	ldrh	r0, [r3]
 	mov	fp, r3
 	cmp	r0, r2
-	bne	.L2436
-.L2448:
+	bne	.L2422
+.L2434:
 	mov	r0, #-1
-.L2435:
+.L2421:
 	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2436:
+.L2422:
 	movs	r1, #1
 	bl	FtlGetLastWrittenPage
 	ldrsh	r10, [fp]
 	sxth	r5, r0
 	adds	r0, r0, #1
 	strh	r0, [fp, #2]	@ movhi
-.L2438:
+.L2424:
 	cmp	r5, #0
-	bge	.L2444
+	bge	.L2430
 	movw	r2, #1708
-	ldr	r1, .L2469+20
-	ldr	r0, .L2469+24
+	ldr	r1, .L2455+20
+	ldr	r0, .L2455+24
 	bl	printf
-	ldr	r1, .L2469+28
-	ldr	r0, .L2469+32
+	ldr	r1, .L2455+28
+	ldr	r0, .L2455+32
 	bl	printf
-	b	.L2443
-.L2444:
+	b	.L2429
+.L2430:
 	orr	r3, r5, r10, lsl #10
 	movs	r2, #1
 	mov	r1, r2
-	ldr	r0, .L2469+8
+	ldr	r0, .L2455+8
 	str	r3, [r4, #4]
 	ldr	r3, [r7]
 	str	r3, [r4, #8]
 	bl	FlashReadPages
-	ldr	r3, .L2469+36
+	ldr	r3, .L2455+36
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L2439
+	beq	.L2425
 	ldr	r8, [r4, #12]
 	ldr	r3, [r8, #12]
 	str	r3, [sp, #36]
 	cmp	r3, #0
-	beq	.L2439
+	beq	.L2425
 	ldr	r2, [r4, #8]
-	ldr	r1, .L2469+40
+	ldr	r1, .L2455+40
 	mov	r0, r2
 	str	r2, [sp, #32]
 	ldrh	r1, [r1]
 	bl	js_hash
 	ldr	r3, [sp, #36]
 	cmp	r3, r0
-	beq	.L2439
+	beq	.L2425
 	cmp	r5, #0
-	bne	.L2440
-	ldr	r2, .L2469+16
+	bne	.L2426
+	ldr	r2, .L2455+16
 	ldrh	r1, [r2, #4]
 	cmp	r10, r1
-	beq	.L2440
+	beq	.L2426
 	ldrh	r1, [r2]
 	ldr	r2, [sp, #32]
-	ldr	r0, .L2469+44
+	ldr	r0, .L2455+44
 	ldr	r2, [r2]
 	str	r3, [sp, #12]
 	str	r2, [sp, #16]
@@ -16737,17 +16621,17 @@ FtlLoadSysInfo:
 	str	r3, [sp]
 	ldm	r4, {r2, r3}
 	bl	printf
-	ldr	r3, .L2469+16
+	ldr	r3, .L2455+16
 	ldrsh	r10, [r3, #4]
-	ldr	r3, .L2469+48
+	ldr	r3, .L2455+48
 	ldrh	r5, [r3]
-.L2442:
+.L2428:
 	subs	r5, r5, #1
 	sxth	r5, r5
-	b	.L2438
-.L2470:
+	b	.L2424
+.L2456:
 	.align	2
-.L2469:
+.L2455:
 	.word	.LANCHOR189
 	.word	.LANCHOR40
 	.word	.LANCHOR211
@@ -16762,42 +16646,42 @@ FtlLoadSysInfo:
 	.word	.LC47
 	.word	.LANCHOR53
 	.word	.LANCHOR195
-.L2440:
+.L2426:
 	mov	r3, #-1
 	str	r3, [r4]
-.L2439:
+.L2425:
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L2442
+	beq	.L2428
 	ldr	r3, [r7]
-	ldr	r2, .L2471
+	ldr	r2, .L2457
 	ldr	r3, [r3]
 	cmp	r3, r2
-	bne	.L2442
+	bne	.L2428
 	ldr	r3, [sp, #24]
 	ldr	r3, [r3]
 	ldrh	r2, [r3]
 	movw	r3, #61604
 	cmp	r2, r3
-	bne	.L2442
-.L2443:
-	ldr	r2, .L2471+4
+	bne	.L2428
+.L2429:
+	ldr	r2, .L2457+4
 	ldrh	r3, [r6]
 	ldrh	r2, [r2]
 	adds	r3, r3, #24
 	cmp	r2, r3, lsl #1
-	bcs	.L2446
-	ldr	r1, .L2471+8
+	bcs	.L2432
+	ldr	r1, .L2457+8
 	movw	r2, #1710
-	ldr	r0, .L2471+12
+	ldr	r0, .L2457+12
 	bl	printf
-	ldr	r1, .L2471+16
-	ldr	r0, .L2471+20
+	ldr	r1, .L2457+16
+	ldr	r0, .L2457+20
 	bl	printf
-.L2446:
+.L2432:
 	movs	r2, #48
 	ldr	r1, [r4, #8]
-	ldr	r0, .L2471+24
+	ldr	r0, .L2457+24
 	bl	ftl_memcpy
 	ldrh	r2, [r6]
 	ldr	r3, [sp, #28]
@@ -16814,14 +16698,14 @@ FtlLoadSysInfo:
 	adds	r2, r2, #4
 	bic	r1, r1, #3
 	add	r1, r1, r3
-	ldr	r3, .L2471+28
+	ldr	r3, .L2457+28
 	ldr	r0, [r3]
 	bl	ftl_memcpy
-	ldr	r3, .L2471+32
+	ldr	r3, .L2457+32
 	ldrh	r3, [r3]
-	cbz	r3, .L2447
+	cbz	r3, .L2433
 	ldrh	r1, [r6]
-	ldr	r3, .L2471+36
+	ldr	r3, .L2457+36
 	ldrh	r2, [r3]
 	lsrs	r3, r1, #3
 	add	r3, r3, r1, lsl #1
@@ -16830,65 +16714,65 @@ FtlLoadSysInfo:
 	lsls	r2, r2, #2
 	ubfx	r3, r3, #2, #14
 	add	r1, r1, r3, lsl #2
-	ldr	r3, .L2471+40
+	ldr	r3, .L2457+40
 	ldr	r0, [r3]
 	bl	ftl_memcpy
-.L2447:
-	ldr	r4, .L2471+24
-	ldr	r3, .L2471
+.L2433:
+	ldr	r4, .L2457+24
+	ldr	r3, .L2457
 	ldr	r2, [r4]
 	cmp	r2, r3
-	bne	.L2448
-	ldr	r3, .L2471+44
+	bne	.L2434
+	ldr	r3, .L2457+44
 	ldrb	r2, [r4, #10]	@ zero_extendqisi2
 	ldrh	r5, [r4, #8]
 	ldrh	r3, [r3]
 	strh	r5, [fp, #6]	@ movhi
 	cmp	r2, r3
-	bne	.L2448
-	ldr	r3, .L2471+48
-	ldr	r2, .L2471+52
+	bne	.L2434
+	ldr	r3, .L2457+48
+	ldr	r2, .L2457+52
 	str	r5, [r3]
-	ldr	r3, .L2471+56
+	ldr	r3, .L2457+56
 	ldrh	r3, [r3]
 	muls	r3, r5, r3
 	str	r3, [r2]
-	ldr	r2, .L2471+60
+	ldr	r2, .L2457+60
 	ldrh	r2, [r2]
 	muls	r3, r2, r3
-	ldr	r2, .L2471+64
+	ldr	r2, .L2457+64
 	str	r3, [r2]
-	ldr	r3, .L2471+68
+	ldr	r3, .L2457+68
 	ldr	r6, [r3]
-	ldr	r3, .L2471+72
+	ldr	r3, .L2457+72
 	ldrh	r0, [r3, #6]
-	ldr	r3, .L2471+76
+	ldr	r3, .L2457+76
 	subs	r0, r6, r0
 	ldrh	r1, [r3]
 	subs	r0, r0, r5
 	bl	__aeabi_uidiv
-	ldr	r3, .L2471+80
+	ldr	r3, .L2457+80
 	cmp	r5, r6
 	strh	r0, [r3]	@ movhi
-	bls	.L2449
-	ldr	r1, .L2471+8
+	bls	.L2435
+	ldr	r1, .L2457+8
 	movw	r2, #1739
-	ldr	r0, .L2471+12
+	ldr	r0, .L2457+12
 	bl	printf
-	ldr	r1, .L2471+16
-	ldr	r0, .L2471+20
+	ldr	r1, .L2457+16
+	ldr	r0, .L2457+20
 	bl	printf
-.L2449:
+.L2435:
 	ldrh	r2, [r4, #16]
-	ldr	r3, .L2471+84
+	ldr	r3, .L2457+84
 	ldrh	ip, [r4, #14]
-	ldr	r7, .L2471+88
+	ldr	r7, .L2457+88
 	lsrs	r1, r2, #6
 	and	r2, r2, #63
 	strb	r2, [r3, #6]
 	ldrb	r2, [r4, #11]	@ zero_extendqisi2
 	strh	r1, [r3, #2]	@ movhi
-	ldr	r1, .L2471+92
+	ldr	r1, .L2457+92
 	strb	r2, [r3, #8]
 	ldrh	r2, [r4, #18]
 	strh	ip, [r3]	@ movhi
@@ -16907,7 +16791,7 @@ FtlLoadSysInfo:
 	strh	r5, [r1, #2]	@ movhi
 	ldrh	r5, [r4, #22]
 	strb	r2, [r1, #8]
-	ldr	r2, .L2471+96
+	ldr	r2, .L2457+96
 	strh	r5, [r2]	@ movhi
 	ldrh	r5, [r4, #24]
 	lsrs	r6, r5, #6
@@ -16917,31 +16801,31 @@ FtlLoadSysInfo:
 	strh	r6, [r2, #2]	@ movhi
 	ldr	r6, [r4, #32]
 	strb	r5, [r2, #8]
-	ldr	r5, .L2471+100
+	ldr	r5, .L2457+100
 	str	r3, [r5]
-	ldr	r5, .L2471+104
+	ldr	r5, .L2457+104
 	str	r3, [r5]
-	ldr	r5, .L2471+108
+	ldr	r5, .L2457+108
 	str	r3, [r5]
-	ldr	r5, .L2471+112
+	ldr	r5, .L2457+112
 	str	r3, [r5]
-	ldr	r5, .L2471+116
+	ldr	r5, .L2457+116
 	str	r6, [r5]
 	mov	r6, r1
-	ldr	r5, .L2471+120
+	ldr	r5, .L2457+120
 	str	r3, [r5]
-	ldr	r5, .L2471+124
+	ldr	r5, .L2457+124
 	str	r3, [r5]
-	ldr	r5, .L2471+128
+	ldr	r5, .L2457+128
 	ldr	lr, [r4, #40]
 	str	r3, [r5]
-	ldr	r3, .L2471+132
+	ldr	r3, .L2457+132
 	ldr	r5, [r3]
 	cmp	lr, r5
 	mov	r5, r2
 	it	hi
 	strhi	lr, [r3]
-	ldr	r3, .L2471+136
+	ldr	r3, .L2457+136
 	ldr	r2, [r4, #36]
 	ldr	r1, [r3]
 	cmp	r2, r1
@@ -16949,36 +16833,36 @@ FtlLoadSysInfo:
 	strhi	r2, [r3]
 	movw	r3, #65535
 	cmp	ip, r3
-	beq	.L2452
-	ldr	r0, .L2471+84
+	beq	.L2438
+	ldr	r0, .L2457+84
 	bl	make_superblock
-.L2452:
+.L2438:
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2453
-	ldr	r0, .L2471+92
+	beq	.L2439
+	ldr	r0, .L2457+92
 	bl	make_superblock
-.L2453:
+.L2439:
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2454
-	ldr	r0, .L2471+96
+	beq	.L2440
+	ldr	r0, .L2457+96
 	bl	make_superblock
-.L2454:
+.L2440:
 	ldrh	r2, [r7]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2455
-	ldr	r0, .L2471+88
+	beq	.L2441
+	ldr	r0, .L2457+88
 	bl	make_superblock
-.L2455:
+.L2441:
 	movs	r0, #0
-	b	.L2435
-.L2472:
+	b	.L2421
+.L2458:
 	.align	2
-.L2471:
+.L2457:
 	.word	1179929683
 	.word	.LANCHOR57
 	.word	.LANCHOR230
@@ -17028,97 +16912,97 @@ FtlDumpBlockInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	ubfx	r0, r0, #10, #16
-	ldr	r4, .L2485
+	ldr	r4, .L2471
 	sub	sp, sp, #88
 	mov	r8, r1
 	ldrh	r3, [r4]
 	str	r3, [sp, #24]
 	bl	P2V_block_in_plane
-	ldr	r1, .L2485+4
+	ldr	r1, .L2471+4
 	mov	r6, r0
-	ldr	r0, .L2485+8
+	ldr	r0, .L2471+8
 	bl	printf
-	ldr	r3, .L2485+12
+	ldr	r3, .L2471+12
 	mov	r1, r6
-	ldr	r0, .L2485+16
+	ldr	r0, .L2471+16
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r6, lsl #1]
 	bl	printf
 	add	r0, sp, #88
 	strh	r6, [r0, #-48]!	@ movhi
 	bl	make_superblock
-	ldr	r3, .L2485+20
+	ldr	r3, .L2471+20
 	ldrb	r5, [r3]	@ zero_extendqisi2
-	cbz	r5, .L2474
+	cbz	r5, .L2460
 	cmp	r8, #0
-	bne	.L2483
+	bne	.L2469
 	mov	r0, r6
 	bl	ftl_get_blk_mode
 	cmp	r0, #1
 	mov	r5, r0
-	bne	.L2474
-	ldr	r3, .L2485+24
+	bne	.L2460
+	ldr	r3, .L2471+24
 	ldrh	r3, [r3]
 	str	r3, [sp, #24]
-.L2474:
+.L2460:
 	movs	r6, #0
 	ldrh	r3, [r4]
 	ldr	r2, [sp, #24]
 	mov	r1, r5
-	ldr	r0, .L2485+28
+	ldr	r0, .L2471+28
 	bl	printf
-.L2475:
-	ldr	r3, .L2485+32
+.L2461:
+	ldr	r3, .L2471+32
 	movs	r2, #0
 	add	ip, sp, #54
 	mov	r4, r2
 	movw	r10, #65535
 	mov	fp, #36
 	ldrh	lr, [r3]
-	ldr	r3, .L2485+36
+	ldr	r3, .L2471+36
 	ldr	r0, [r3]
-	ldr	r3, .L2485+40
+	ldr	r3, .L2471+40
 	ldr	r3, [r3]
 	str	r3, [sp, #28]
-	ldr	r3, .L2485+44
+	ldr	r3, .L2471+44
 	ldrh	r3, [r3]
 	str	r3, [sp, #32]
-	ldr	r3, .L2485+48
+	ldr	r3, .L2471+48
 	ldr	r3, [r3]
 	str	r3, [sp, #36]
-	ldr	r3, .L2485+52
+	ldr	r3, .L2471+52
 	ldrh	r8, [r3]
-.L2476:
+.L2462:
 	uxth	r3, r2
 	cmp	lr, r3
-	bhi	.L2478
-	ldr	fp, .L2485+56
+	bhi	.L2464
+	ldr	fp, .L2471+56
 	mov	r8, #0
 	mov	r10, #36
 	mov	r2, r5
 	mov	r1, r4
 	bl	FlashReadPages
-.L2479:
+.L2465:
 	uxth	r3, r8
 	cmp	r4, r3
-	bhi	.L2480
+	bhi	.L2466
 	adds	r6, r6, #1
 	ldr	r3, [sp, #24]
 	uxth	r6, r6
 	cmp	r3, r6
-	bne	.L2475
-.L2481:
+	bne	.L2461
+.L2467:
 	movs	r0, #0
 	add	sp, sp, #88
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2483:
+.L2469:
 	movs	r5, #0
-	b	.L2474
-.L2478:
+	b	.L2460
+.L2464:
 	ldrh	r3, [ip, #2]!
 	cmp	r3, r10
-	beq	.L2477
+	beq	.L2463
 	mla	r1, fp, r4, r0
 	ldr	r7, [sp, #28]
 	orr	r3, r6, r3, lsl #10
@@ -17135,11 +17019,11 @@ FtlDumpBlockInfo:
 	bic	r3, r3, #3
 	add	r3, r3, r7
 	str	r3, [r1, #12]
-.L2477:
+.L2463:
 	adds	r2, r2, #1
-	b	.L2476
-.L2480:
-	ldr	r3, .L2485+36
+	b	.L2462
+.L2466:
+	ldr	r3, .L2471+36
 	mul	r0, r10, r8
 	ldrh	r1, [sp, #40]
 	add	r8, r8, #1
@@ -17163,10 +17047,10 @@ FtlDumpBlockInfo:
 	ldr	r2, [ip, r0]
 	mov	r0, fp
 	bl	printf
-	b	.L2479
-.L2486:
+	b	.L2465
+.L2472:
 	.align	2
-.L2485:
+.L2471:
 	.word	.LANCHOR52
 	.word	.LANCHOR233
 	.word	.LC48
@@ -17196,86 +17080,86 @@ FtlScanAllBlock:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #88
-	ldr	r6, .L2497
-	ldr	r1, .L2497+4
-	ldr	r0, .L2497+8
+	ldr	r6, .L2483
+	ldr	r1, .L2483+4
+	ldr	r0, .L2483+8
 	bl	printf
 	movs	r3, #0
 	str	r3, [sp, #28]
-.L2488:
-	ldr	r3, .L2497+12
+.L2474:
+	ldr	r3, .L2483+12
 	ldrh	r0, [sp, #28]
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bhi	.L2496
+	bhi	.L2482
 	movs	r0, #0
 	add	sp, sp, #88
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2496:
+.L2482:
 	add	r4, sp, #88
 	add	r7, sp, #54
 	strh	r0, [r4, #-48]!	@ movhi
 	movw	r10, #65535
 	bl	ftl_get_blk_mode
-	ldr	r3, .L2497+16
+	ldr	r3, .L2483+16
 	mov	fp, #36
 	ldrh	r1, [sp, #28]
 	ldr	r2, [r3]
 	mov	r3, r0
-	ldr	r0, .L2497+20
+	ldr	r0, .L2483+20
 	ldrh	r2, [r2, r1, lsl #1]
 	bl	printf
 	mov	r0, r4
 	bl	make_superblock
-	ldr	r3, .L2497+24
+	ldr	r3, .L2483+24
 	movs	r2, #0
 	ldr	r0, [r6]
 	mov	r4, r2
 	ldrh	lr, [r3]
-	ldr	r3, .L2497+28
+	ldr	r3, .L2483+28
 	ldr	r3, [r3]
 	str	r3, [sp, #32]
-	ldr	r3, .L2497+32
+	ldr	r3, .L2483+32
 	ldrh	ip, [r3]
-	ldr	r3, .L2497+36
+	ldr	r3, .L2483+36
 	ldr	r3, [r3]
 	str	r3, [sp, #36]
-	ldr	r3, .L2497+40
+	ldr	r3, .L2483+40
 	ldrh	r8, [r3]
-.L2489:
+.L2475:
 	uxth	r3, r2
 	cmp	lr, r3
-	bhi	.L2491
-	ldr	r10, .L2497+44
+	bhi	.L2477
+	ldr	r10, .L2483+44
 	movs	r7, #0
 	mov	r8, #36
 	movs	r2, #0
 	mov	r1, r4
 	bl	FlashReadPages
-.L2492:
+.L2478:
 	uxth	r3, r7
 	cmp	r4, r3
-	bhi	.L2493
-	ldr	r10, .L2497+48
+	bhi	.L2479
+	ldr	r10, .L2483+48
 	movs	r7, #0
 	mov	r8, #36
 	movs	r2, #1
 	mov	r1, r4
 	ldr	r0, [r6]
 	bl	FlashReadPages
-.L2494:
+.L2480:
 	uxth	r3, r7
 	cmp	r4, r3
-	bhi	.L2495
+	bhi	.L2481
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
 	str	r3, [sp, #28]
-	b	.L2488
-.L2491:
+	b	.L2474
+.L2477:
 	ldrh	r3, [r7, #2]!
 	cmp	r3, r10
-	beq	.L2490
+	beq	.L2476
 	mla	r1, fp, r4, r0
 	ldr	r5, [sp, #32]
 	lsls	r3, r3, #10
@@ -17291,10 +17175,10 @@ FtlScanAllBlock:
 	bic	r3, r3, #3
 	add	r3, r3, r5
 	str	r3, [r1, #12]
-.L2490:
+.L2476:
 	adds	r2, r2, #1
-	b	.L2489
-.L2493:
+	b	.L2475
+.L2479:
 	mul	r2, r8, r7
 	ldr	r0, [r6]
 	ldrh	r1, [sp, #40]
@@ -17318,8 +17202,8 @@ FtlScanAllBlock:
 	mov	r0, r10
 	ldr	r3, [lr, #4]
 	bl	printf
-	b	.L2492
-.L2495:
+	b	.L2478
+.L2481:
 	mul	r2, r8, r7
 	ldr	r0, [r6]
 	ldrh	r1, [sp, #40]
@@ -17343,10 +17227,10 @@ FtlScanAllBlock:
 	mov	r0, r10
 	ldr	r3, [lr, #4]
 	bl	printf
-	b	.L2494
-.L2498:
+	b	.L2480
+.L2484:
 	.align	2
-.L2497:
+.L2483:
 	.word	.LANCHOR186
 	.word	.LANCHOR234
 	.word	.LC48
@@ -17388,15 +17272,15 @@ FtlMapTblRecovery:
 	ldr	r0, [sp]
 	str	r3, [sp, #4]
 	bl	ftl_memset
-	ldr	r2, .L2540
-	ldr	r3, .L2540+4
+	ldr	r2, .L2526
+	ldr	r3, .L2526+4
 	str	r6, [r4, #32]
 	ldr	r1, [r2]
 	mov	fp, r3
 	str	r6, [r4, #28]
 	str	r2, [sp, #8]
 	str	r1, [r3, #8]
-	ldr	r1, .L2540+8
+	ldr	r1, .L2526+8
 	ldr	r5, [r1]
 	movw	r1, #65535
 	str	r5, [r3, #12]
@@ -17404,16 +17288,16 @@ FtlMapTblRecovery:
 	strh	r1, [r4, #2]	@ movhi
 	movs	r1, #1
 	str	r1, [r4, #36]
-.L2500:
+.L2486:
 	ldr	r2, [sp, #4]
 	sxth	r3, r6
 	cmp	r3, r2
-	bge	.L2519
+	bge	.L2505
 	ldr	r2, [sp, #4]
 	lsl	r8, r3, #1
 	subs	r2, r2, #1
 	cmp	r3, r2
-	bne	.L2501
+	bne	.L2487
 	ldrh	r0, [r10, r3, lsl #1]
 	movs	r1, #1
 	str	r3, [sp, #4]
@@ -17423,28 +17307,28 @@ FtlMapTblRecovery:
 	add	r8, r8, r10
 	strh	r6, [r4]	@ movhi
 	sxth	r10, r0
-	ldr	r6, .L2540+4
+	ldr	r6, .L2526+4
 	adds	r0, r0, #1
 	mov	r2, r3
 	ldr	r3, [sp, #4]
 	strh	r0, [r4, #2]	@ movhi
 	ldr	r3, [r2, r3, lsl #2]
 	str	r3, [r4, #28]
-.L2502:
+.L2488:
 	sxth	r2, fp
 	cmp	r2, r10
-	ble	.L2505
-.L2519:
+	ble	.L2491
+.L2505:
 	mov	r0, r4
 	bl	ftl_free_no_use_map_blk
-	ldr	r3, .L2540+12
+	ldr	r3, .L2526+12
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L2507
+	bne	.L2493
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L2507:
+.L2493:
 	mov	r0, r4
 	bl	ftl_map_blk_gc
 	mov	r0, r4
@@ -17453,22 +17337,22 @@ FtlMapTblRecovery:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2505:
+.L2491:
 	ldrh	r1, [r8]
-	ldr	r0, .L2540+4
+	ldr	r0, .L2526+4
 	orr	r2, r2, r1, lsl #10
 	str	r2, [r6, #4]
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-	ldr	r3, .L2540+16
+	ldr	r3, .L2526+16
 	ldrb	r2, [r3]	@ zero_extendqisi2
-	cbz	r2, .L2503
+	cbz	r2, .L2489
 	ldr	r2, [r6, #12]
 	ldr	r2, [r2, #12]
 	str	r2, [sp, #4]
-	cbz	r2, .L2503
-	ldr	r1, .L2540+20
+	cbz	r2, .L2489
+	ldr	r1, .L2526+20
 	ldr	r0, [r6, #8]
 	ldrh	r1, [r1]
 	bl	js_hash
@@ -17477,13 +17361,13 @@ FtlMapTblRecovery:
 	itt	ne
 	movne	r2, #-1
 	strne	r2, [r6]
-.L2503:
+.L2489:
 	ldr	r2, [r6]
 	adds	r2, r2, #1
-	beq	.L2504
+	beq	.L2490
 	ldrh	r2, [r5, #8]
 	cmp	r7, r2
-	bls	.L2504
+	bls	.L2490
 	ldrh	r1, [r4, #4]
 	ldrh	r0, [r5]
 	cmp	r0, r1
@@ -17491,16 +17375,16 @@ FtlMapTblRecovery:
 	ldreq	r1, [r6, #4]
 	ldreq	r3, [sp]
 	streq	r1, [r3, r2, lsl #2]
-.L2504:
+.L2490:
 	add	fp, fp, #1
-	b	.L2502
-.L2501:
+	b	.L2488
+.L2487:
 	ldr	r2, [sp, #8]
-	ldr	r0, .L2540+4
+	ldr	r0, .L2526+4
 	ldr	r2, [r2]
 	str	r2, [fp, #8]
 	add	r2, r10, r8
-	ldr	r8, .L2540+12
+	ldr	r8, .L2526+12
 	str	r2, [sp, #16]
 	ldrh	r2, [r10, r3, lsl #1]
 	ldrh	r3, [r8]
@@ -17512,39 +17396,39 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	r3, [fp]
 	adds	r3, r3, #1
-	beq	.L2521
+	beq	.L2507
 	ldrh	r2, [r5]
 	ldrh	r3, [r4, #4]
 	cmp	r2, r3
-	bne	.L2521
+	bne	.L2507
 	ldrh	r2, [r5, #8]
 	movw	r3, #64245
 	cmp	r2, r3
-	beq	.L2509
-.L2521:
+	beq	.L2495
+.L2507:
 	mov	r8, #0
-.L2510:
-	ldr	r2, .L2540+12
+.L2496:
+	ldr	r2, .L2526+12
 	sxth	r3, r8
 	ldrh	r2, [r2]
 	cmp	r3, r2
-	bge	.L2517
+	bge	.L2503
 	ldr	r2, [sp, #16]
-	ldr	r0, .L2540+4
+	ldr	r0, .L2526+4
 	ldrh	r2, [r2]
 	orr	r3, r3, r2, lsl #10
 	movs	r2, #1
 	mov	r1, r2
 	str	r3, [fp, #4]
 	bl	FlashReadPages
-	ldr	r3, .L2540+16
+	ldr	r3, .L2526+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2514
+	cbz	r3, .L2500
 	ldr	r3, [fp, #12]
 	ldr	r3, [r3, #12]
 	str	r3, [sp, #20]
-	cbz	r3, .L2514
-	ldr	r2, .L2540+20
+	cbz	r3, .L2500
+	ldr	r2, .L2526+20
 	ldr	r0, [fp, #8]
 	ldrh	r1, [r2]
 	bl	js_hash
@@ -17553,13 +17437,13 @@ FtlMapTblRecovery:
 	itt	ne
 	movne	r3, #-1
 	strne	r3, [fp]
-.L2514:
+.L2500:
 	ldr	r3, [fp]
 	adds	r3, r3, #1
-	beq	.L2515
+	beq	.L2501
 	ldrh	r3, [r5, #8]
 	cmp	r7, r3
-	bls	.L2515
+	bls	.L2501
 	ldrh	r1, [r5]
 	ldrh	r2, [r4, #4]
 	cmp	r1, r2
@@ -17567,23 +17451,23 @@ FtlMapTblRecovery:
 	ldreq	r2, [fp, #4]
 	ldreq	r1, [sp]
 	streq	r2, [r1, r3, lsl #2]
-.L2515:
+.L2501:
 	add	r8, r8, #1
-	b	.L2510
-.L2509:
+	b	.L2496
+.L2495:
 	ldr	r3, [sp, #8]
 	movs	r1, #0
 	ldrh	r2, [r8]
 	ldr	ip, [r3]
 	subs	r2, r2, #1
-.L2511:
+.L2497:
 	sxth	r3, r1
 	cmp	r3, r2
-	blt	.L2513
-.L2517:
+	blt	.L2499
+.L2503:
 	adds	r6, r6, #1
-	b	.L2500
-.L2513:
+	b	.L2486
+.L2499:
 	lsls	r0, r3, #3
 	ldr	r3, [ip, r3, lsl #3]
 	adds	r1, r1, #1
@@ -17594,10 +17478,10 @@ FtlMapTblRecovery:
 	ldrhi	r3, [sp]
 	ldrhi	r0, [r0, #4]
 	strhi	r0, [r3, lr, lsl #2]
-	b	.L2511
-.L2541:
+	b	.L2497
+.L2527:
 	.align	2
-.L2540:
+.L2526:
 	.word	.LANCHOR189
 	.word	.LANCHOR211
 	.word	.LANCHOR195
@@ -17617,36 +17501,36 @@ FtlLoadVonderInfo:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L2543
-	ldr	r0, .L2543+4
+	ldr	r3, .L2529
+	ldr	r0, .L2529+4
 	ldrh	r3, [r3]
 	strh	r3, [r0, #10]	@ movhi
 	movw	r3, #61574
 	strh	r3, [r0, #4]	@ movhi
-	ldr	r3, .L2543+8
+	ldr	r3, .L2529+8
 	ldrh	r3, [r3]
 	strh	r3, [r0, #8]	@ movhi
-	ldr	r3, .L2543+12
+	ldr	r3, .L2529+12
 	ldrh	r3, [r3]
 	strh	r3, [r0, #6]	@ movhi
-	ldr	r3, .L2543+16
+	ldr	r3, .L2529+16
 	ldr	r3, [r3]
 	str	r3, [r0, #12]
-	ldr	r3, .L2543+20
+	ldr	r3, .L2529+20
 	ldr	r3, [r3]
 	str	r3, [r0, #16]
-	ldr	r3, .L2543+24
+	ldr	r3, .L2529+24
 	ldr	r3, [r3]
 	str	r3, [r0, #20]
-	ldr	r3, .L2543+28
+	ldr	r3, .L2529+28
 	ldr	r3, [r3]
 	str	r3, [r0, #24]
 	bl	FtlMapTblRecovery
 	movs	r0, #0
 	pop	{r3, pc}
-.L2544:
+.L2530:
 	.align	2
-.L2543:
+.L2529:
 	.word	.LANCHOR61
 	.word	.LANCHOR224
 	.word	.LANCHOR70
@@ -17669,13 +17553,13 @@ FtlLoadMapInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	FtlL2PDataInit
-	ldr	r0, .L2546
+	ldr	r0, .L2532
 	bl	FtlMapTblRecovery
 	movs	r0, #0
 	pop	{r3, pc}
-.L2547:
+.L2533:
 	.align	2
-.L2546:
+.L2532:
 	.word	.LANCHOR130
 	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
 	.section	.text.ftl_scan_all_ppa,"ax",%progbits
@@ -17689,76 +17573,76 @@ FtlLoadMapInfo:
 ftl_scan_all_ppa:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2564
+	ldr	r3, .L2550
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #32
-	ldr	r5, .L2564+4
+	ldr	r5, .L2550+4
 	ldrh	r4, [r3]
 	str	r3, [sp, #28]
 	subs	r4, r4, #16
 	lsl	r10, r4, #10
-.L2549:
+.L2535:
 	ldr	r3, [sp, #28]
 	ldrh	r3, [r3]
 	cmp	r4, r3
-	blt	.L2557
-	ldr	r1, .L2564+8
-	ldr	r0, .L2564+12
+	blt	.L2543
+	ldr	r1, .L2550+8
+	ldr	r0, .L2550+12
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
 	b	printf
-.L2557:
+.L2543:
 	uxth	r7, r4
 	mov	r0, r7
 	bl	ftl_get_blk_mode
-	ldr	r3, .L2564+16
+	ldr	r3, .L2550+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2550
-	ldr	r3, .L2564+20
+	cbz	r3, .L2536
+	ldr	r3, .L2550+20
 	ldrh	r3, [r3]
 	cmp	r4, r3
-	bge	.L2551
-	ldr	r3, .L2564+24
+	bge	.L2537
+	ldr	r3, .L2550+24
 	ldrh	r3, [r3]
 	cmp	r4, r3
-	blt	.L2551
-.L2550:
+	blt	.L2537
+.L2536:
 	cmp	r0, #1
-	bne	.L2552
-.L2551:
-	ldr	r3, .L2564+28
+	bne	.L2538
+.L2537:
+	ldr	r3, .L2550+28
 	mov	r8, #-2147483648
 	ldrh	r6, [r3]
-.L2553:
+.L2539:
 	mov	r3, r8
 	mov	r2, r6
 	mov	r1, r4
-	ldr	r0, .L2564+32
+	ldr	r0, .L2550+32
 	bl	printf
 	mov	r0, r7
 	bl	FtlBbmIsBadBlock
-	cbz	r0, .L2554
+	cbz	r0, .L2540
 	mov	r3, r8
 	mov	r2, r6
 	mov	r1, r4
-	ldr	r0, .L2564+36
+	ldr	r0, .L2550+36
 	bl	printf
-.L2554:
-	ldr	fp, .L2564+52
+.L2540:
+	ldr	fp, .L2550+52
 	movs	r7, #0
-.L2555:
+.L2541:
 	cmp	r7, r6
-	bne	.L2556
+	bne	.L2542
 	adds	r4, r4, #1
 	add	r10, r10, #1024
-	b	.L2549
-.L2552:
-	ldr	r3, .L2564+40
+	b	.L2535
+.L2538:
+	ldr	r3, .L2550+40
 	mov	r8, #0
 	ldrh	r6, [r3]
-	b	.L2553
-.L2556:
+	b	.L2539
+.L2542:
 	add	r3, r8, r10
 	movs	r2, #0
 	add	r3, r3, r7
@@ -17769,13 +17653,13 @@ ftl_scan_all_ppa:
 	adds	r7, r7, #1
 	str	r2, [r5]
 	str	r3, [r5, #8]
-	ldr	r3, .L2564+44
+	ldr	r3, .L2550+44
 	ldr	r3, [r3]
 	str	r3, [r5, #12]
 	bl	FlashReadPages
 	ldr	r2, [r5, #8]
 	ldr	r3, [r5, #12]
-	ldr	r0, .L2564+48
+	ldr	r0, .L2550+48
 	ldr	r1, [r2, #4]
 	str	r1, [sp, #16]
 	ldr	r2, [r2]
@@ -17790,10 +17674,10 @@ ftl_scan_all_ppa:
 	ldr	r2, [r5]
 	ldr	r3, [r3]
 	bl	printf
-	b	.L2555
-.L2565:
+	b	.L2541
+.L2551:
 	.align	2
-.L2564:
+.L2550:
 	.word	.LANCHOR51
 	.word	.LANCHOR211
 	.word	.LANCHOR235
@@ -17822,18 +17706,18 @@ FlashReadFacBbtData:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	fp, r2
-	ldr	r2, .L2579
+	ldr	r2, .L2565
 	sub	sp, sp, #48
 	mov	r6, r1
 	mov	r4, r0
-	ldr	r7, .L2579+4
+	ldr	r7, .L2565+4
 	ldrh	r3, [r2, #14]
 	ldrh	r2, [r2, #12]
 	smulbb	r3, r3, r2
 	ldr	r2, [r7]
 	uxth	r3, r3
 	str	r2, [sp, #20]
-	ldr	r2, .L2579+8
+	ldr	r2, .L2565+8
 	subs	r5, r3, #1
 	mul	r10, r6, r3
 	uxth	r5, r5
@@ -17841,12 +17725,12 @@ FlashReadFacBbtData:
 	ldr	r1, [r2]
 	mov	r8, r2
 	str	r1, [sp, #24]
-.L2567:
+.L2553:
 	cmp	r3, r5
-	ble	.L2574
+	ble	.L2560
 	mov	r0, #-1
-	b	.L2566
-.L2574:
+	b	.L2552
+.L2560:
 	add	r2, r5, r10
 	add	r0, sp, #12
 	lsls	r2, r2, #10
@@ -17858,56 +17742,56 @@ FlashReadFacBbtData:
 	ldr	r2, [sp, #12]
 	ldr	r3, [sp, #4]
 	adds	r2, r2, #1
-	beq	.L2568
+	beq	.L2554
 	ldr	r2, [r8]
 	ldrh	r1, [r2]
 	movw	r2, #61664
 	cmp	r1, r2
-	bne	.L2568
-	cbz	r4, .L2575
-	cbz	r6, .L2570
-.L2573:
+	bne	.L2554
+	cbz	r4, .L2561
+	cbz	r6, .L2556
+.L2559:
 	mov	r2, fp
 	ldr	r1, [r7]
 	mov	r0, r4
 	bl	ftl_memcpy
 	movs	r3, #4
-	ldr	r0, .L2579+12
+	ldr	r0, .L2565+12
 	mov	r2, r3
 	mov	r1, r4
 	bl	rknand_print_hex
 	movs	r0, #0
-.L2566:
+.L2552:
 	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2570:
+.L2556:
 	ldr	r1, [r7]
 	mov	ip, #1
-	ldr	r5, .L2579+16
-.L2571:
+	ldr	r5, .L2565+16
+.L2557:
 	ldr	r0, [r5]
 	uxth	r3, r6
 	adds	r6, r6, #1
 	cmp	r3, r0
-	bcs	.L2573
+	bcs	.L2559
 	lsrs	r0, r3, #5
 	and	r3, r3, #31
 	lsl	r3, ip, r3
 	ldr	r2, [r1, r0, lsl #2]
 	orrs	r3, r3, r2
 	str	r3, [r1, r0, lsl #2]
-	b	.L2571
-.L2568:
+	b	.L2557
+.L2554:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L2567
-.L2575:
+	b	.L2553
+.L2561:
 	mov	r0, r4
-	b	.L2566
-.L2580:
+	b	.L2552
+.L2566:
 	.align	2
-.L2579:
+.L2565:
 	.word	.LANCHOR15
 	.word	.LANCHOR154
 	.word	.LANCHOR205
@@ -17927,8 +17811,8 @@ FlashGetBadBlockList:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r5, r0
-	ldr	r3, .L2591
-	ldr	r6, .L2591+4
+	ldr	r3, .L2577
+	ldr	r6, .L2577+4
 	ldr	r3, [r3]
 	ldr	r0, [r6]
 	ldrb	r4, [r3, #13]	@ zero_extendqisi2
@@ -17939,25 +17823,25 @@ FlashGetBadBlockList:
 	asrs	r2, r2, #3
 	bl	FlashReadFacBbtData
 	adds	r0, r0, #1
-	bne	.L2582
-.L2586:
+	bne	.L2568
+.L2572:
 	movs	r3, #0
-.L2583:
+.L2569:
 	movw	r2, #65535
 	movs	r0, #0
 	strh	r2, [r5, r3, lsl #1]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.L2582:
+.L2568:
 	ldr	r7, [r6]
 	movs	r2, #0
 	lsr	ip, r4, #4
 	mov	r3, r2
 	subs	r4, r4, #1
 	mov	lr, #1
-.L2584:
+.L2570:
 	uxth	r1, r2
 	cmp	r1, r4
-	bge	.L2583
+	bge	.L2569
 	lsrs	r6, r1, #5
 	and	r0, r1, #31
 	lsl	r0, lr, r0
@@ -17969,13 +17853,13 @@ FlashGetBadBlockList:
 	strhne	r1, [r5, r3, lsl #1]	@ movhi
 	uxthne	r3, r0
 	cmp	r3, ip
-	bcc	.L2584
-	b	.L2586
-.L2592:
+	bcc	.L2570
+	b	.L2572
+.L2578:
 	.align	2
-.L2591:
+.L2577:
 	.word	.LANCHOR7
-	.word	.LANCHOR152
+	.word	.LANCHOR149
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
 	.section	.text.FtlMakeBbt,"ax",%progbits
 	.align	1
@@ -17988,66 +17872,66 @@ FlashGetBadBlockList:
 FtlMakeBbt:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2613
+	ldr	r3, .L2599
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	ldr	r7, [r3]
 	cmp	r7, #0
-	bne	.L2594
-	ldr	r8, .L2613+40
-	ldr	r4, .L2613+4
+	bne	.L2580
+	ldr	r8, .L2599+40
+	ldr	r4, .L2599+4
 	bl	FtlBbtMemInit
 	sub	r10, r8, #18
 	bl	FtlLoadFactoryBbt
-.L2595:
-	ldr	r3, .L2613+8
+.L2581:
+	ldr	r3, .L2599+8
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	bcc	.L2601
-	ldr	r5, .L2613+12
+	bcc	.L2587
+	ldr	r5, .L2599+12
 	movs	r4, #0
-.L2602:
+.L2588:
 	ldrh	r3, [r5]
 	uxth	r0, r4
 	adds	r4, r4, #1
 	cmp	r3, r0
-	bhi	.L2603
-	ldr	r4, .L2613+16
+	bhi	.L2589
+	ldr	r4, .L2599+16
 	movw	r6, #65535
 	ldrh	r5, [r4, #12]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L2604:
+.L2590:
 	ldrh	r3, [r4, #12]
 	subs	r3, r3, #47
 	cmp	r3, r5
-	bgt	.L2608
+	bgt	.L2594
 	mov	r0, r5
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L2605
+	beq	.L2591
 	mov	r0, r5
 	bl	FlashTestBlk
 	cmp	r0, #0
-	beq	.L2606
+	beq	.L2592
 	mov	r0, r5
 	bl	FtlBbmMapBadBlock
-.L2605:
+.L2591:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L2604
-.L2601:
-	ldr	r3, .L2613+20
+	b	.L2590
+.L2587:
+	ldr	r3, .L2599+20
 	movw	r1, #65535
 	ldrh	r2, [r10, #2]!
 	ldr	r0, [r3]
-	ldr	r3, .L2613+24
+	ldr	r3, .L2599+24
 	cmp	r2, r1
 	str	r0, [r4, #8]
 	ldr	fp, [r3]
 	str	r3, [sp, #4]
-	ldr	r3, .L2613+28
+	ldr	r3, .L2599+28
 	str	fp, [r4, #12]
-	beq	.L2596
+	beq	.L2582
 	ldrh	r6, [r3]
 	mov	r0, r4
 	str	r3, [sp]
@@ -18064,13 +17948,13 @@ FtlMakeBbt:
 	adds	r2, r2, #7
 	asrs	r2, r2, #3
 	bl	ftl_memcpy
-.L2597:
+.L2583:
 	uxth	r0, r6
 	adds	r7, r7, #1
 	add	r8, r8, #4
 	bl	FtlBbmMapBadBlock
-	b	.L2595
-.L2596:
+	b	.L2581
+.L2582:
 	mov	r1, r7
 	str	r3, [sp]
 	bl	FlashGetBadBlockList
@@ -18079,17 +17963,17 @@ FtlMakeBbt:
 	bl	FtlBbt2Bitmap
 	ldr	r3, [sp]
 	ldrh	r5, [r3]
-.L2599:
+.L2585:
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L2598:
+.L2584:
 	ldr	r3, [sp]
 	ldrh	r0, [r3]
 	smlabb	r0, r0, r7, r5
 	uxth	r0, r0
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L2599
+	beq	.L2585
 	ldr	r3, [sp, #4]
 	movs	r2, #16
 	movs	r1, #0
@@ -18109,7 +17993,7 @@ FtlMakeBbt:
 	mla	r6, r7, r6, r3
 	lsls	r3, r6, #10
 	str	r3, [r4, #4]
-	ldr	r3, .L2613+32
+	ldr	r3, .L2599+32
 	ldrh	r2, [r3]
 	lsls	r2, r2, #2
 	bl	ftl_memcpy
@@ -18124,23 +18008,23 @@ FtlMakeBbt:
 	bl	FlashProgPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	bne	.L2597
+	bne	.L2583
 	uxth	r0, r6
 	bl	FtlBbmMapBadBlock
-	b	.L2598
-.L2603:
+	b	.L2584
+.L2589:
 	bl	FtlBbmMapBadBlock
-	b	.L2602
-.L2606:
+	b	.L2588
+.L2592:
 	ldrh	r3, [r4]
 	cmp	r3, r6
-	bne	.L2607
+	bne	.L2593
 	strh	r5, [r4]	@ movhi
-	b	.L2605
-.L2607:
+	b	.L2591
+.L2593:
 	strh	r5, [r4, #4]	@ movhi
-.L2608:
-	ldr	r3, .L2613+36
+.L2594:
+	ldr	r3, .L2599+36
 	movs	r5, #0
 	str	r5, [r4, #8]
 	movs	r2, #2
@@ -18168,14 +18052,14 @@ FtlMakeBbt:
 	strh	r2, [r4]	@ movhi
 	strh	r3, [r4, #4]	@ movhi
 	bl	FtlBbmTblFlush
-.L2594:
+.L2580:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2614:
+.L2600:
 	.align	2
-.L2613:
+.L2599:
 	.word	.LANCHOR78
 	.word	.LANCHOR211
 	.word	.LANCHOR45
@@ -18201,40 +18085,40 @@ log2phys:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #24
-	ldr	r4, .L2633
+	ldr	r4, .L2619
 	mov	fp, r0
 	str	r2, [sp, #16]
 	ldr	r2, [r4]
-	ldr	r3, .L2633+4
+	ldr	r3, .L2619+4
 	str	r1, [sp, #4]
 	cmp	r0, r2
 	ldrh	r5, [r3]
-	bcc	.L2616
-	ldr	r1, .L2633+8
+	bcc	.L2602
+	ldr	r1, .L2619+8
 	mov	r2, #1004
-	ldr	r0, .L2633+12
+	ldr	r0, .L2619+12
 	bl	printf
-	ldr	r1, .L2633+16
-	ldr	r0, .L2633+20
+	ldr	r1, .L2619+16
+	ldr	r0, .L2619+20
 	bl	printf
-.L2616:
+.L2602:
 	ldr	r3, [r4]
 	cmp	fp, r3
-	bcs	.L2617
+	bcs	.L2603
 	adds	r3, r5, #7
-	ldr	r5, .L2633+24
+	ldr	r5, .L2619+24
 	lsr	r7, fp, r3
 	str	r3, [sp, #8]
-	ldr	r3, .L2633+28
+	ldr	r3, .L2619+28
 	movs	r4, #12
 	ldr	r1, [r5]
 	uxth	r6, r7
 	ldrh	r2, [r3]
 	movs	r3, #0
-.L2618:
+.L2604:
 	uxth	r10, r3
 	cmp	r10, r2
-	bcc	.L2623
+	bcc	.L2609
 	bl	select_l2p_ram_region
 	muls	r4, r0, r4
 	ldr	r3, [r5]
@@ -18243,35 +18127,35 @@ log2phys:
 	adds	r2, r3, r4
 	movw	r3, #65535
 	cmp	r1, r3
-	beq	.L2624
+	beq	.L2610
 	ldr	r3, [r2, #4]
 	cmp	r3, #0
-	bge	.L2624
+	bge	.L2610
 	bl	flush_l2p_region
-.L2624:
-	ldr	r3, .L2633+32
+.L2610:
+	ldr	r3, .L2619+32
 	ldrh	r3, [r3]
 	cmp	r3, r6
-	bcs	.L2625
-	ldr	r1, .L2633+36
+	bcs	.L2611
+	ldr	r1, .L2619+36
 	movw	r2, #597
-	ldr	r0, .L2633+12
+	ldr	r0, .L2619+12
 	bl	printf
-	ldr	r1, .L2633+16
-	ldr	r0, .L2633+20
+	ldr	r1, .L2619+16
+	ldr	r0, .L2619+20
 	bl	printf
-.L2625:
-	ldr	r3, .L2633+40
+.L2611:
+	ldr	r3, .L2619+40
 	uxth	r7, r7
 	ldr	r3, [r3]
 	ldr	r3, [r3, r7, lsl #2]
 	cmp	r3, #0
-	bne	.L2626
+	bne	.L2612
 	ldr	r2, [r5]
 	movs	r1, #255
 	str	r3, [sp, #12]
 	adds	r0, r2, r4
-	ldr	r2, .L2633+44
+	ldr	r2, .L2619+44
 	ldr	r0, [r0, #8]
 	ldrh	r2, [r2]
 	bl	ftl_memset
@@ -18280,53 +18164,53 @@ log2phys:
 	adds	r1, r2, r4
 	strh	r6, [r2, r4]	@ movhi
 	str	r3, [r1, #4]
-	b	.L2620
-.L2617:
+	b	.L2606
+.L2603:
 	ldr	r3, [sp, #16]
 	mov	r0, #-1
-	cbnz	r3, .L2615
+	cbnz	r3, .L2601
 	ldr	r3, [sp, #4]
 	str	r0, [r3]
-.L2615:
+.L2601:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2623:
+.L2609:
 	adds	r3, r3, #1
 	mla	r0, r4, r3, r1
 	ldrh	r0, [r0, #-12]
 	cmp	r0, r6
-	bne	.L2618
-.L2620:
+	bne	.L2604
+.L2606:
 	ldr	r2, [sp, #8]
 	movs	r3, #1
 	ldr	r0, [sp, #16]
-	ldr	r1, .L2633+24
+	ldr	r1, .L2619+24
 	lsls	r3, r3, r2
 	movs	r2, #12
 	subs	r3, r3, #1
 	and	r3, r3, fp
 	uxth	r3, r3
-	cbnz	r0, .L2621
+	cbnz	r0, .L2607
 	ldr	r0, [r1]
 	mla	r2, r2, r10, r0
 	ldr	r2, [r2, #8]
 	ldr	r3, [r2, r3, lsl #2]
 	ldr	r2, [sp, #4]
 	str	r3, [r2]
-.L2622:
+.L2608:
 	ldr	r2, [r1]
 	movs	r3, #12
 	mla	r10, r3, r10, r2
 	ldr	r3, [r10, #4]
 	adds	r2, r3, #1
-	beq	.L2631
+	beq	.L2617
 	adds	r3, r3, #1
 	str	r3, [r10, #4]
-.L2631:
+.L2617:
 	movs	r0, #0
-	b	.L2615
-.L2621:
+	b	.L2601
+.L2607:
 	ldr	r0, [r1]
 	mla	r2, r2, r10, r0
 	ldr	r0, [sp, #4]
@@ -18336,19 +18220,19 @@ log2phys:
 	ldr	r3, [r2, #4]
 	orr	r3, r3, #-2147483648
 	str	r3, [r2, #4]
-	ldr	r3, .L2633+48
+	ldr	r3, .L2619+48
 	strh	r6, [r3]	@ movhi
-	b	.L2622
-.L2626:
+	b	.L2608
+.L2612:
 	ldr	r2, [r5]
-	ldr	r8, .L2633+80
+	ldr	r8, .L2619+80
 	str	r3, [sp, #20]
 	add	r2, r2, r4
 	ldr	r2, [r2, #8]
 	mov	r0, r8
 	str	r3, [r8, #4]
 	str	r2, [r8, #8]
-	ldr	r2, .L2633+52
+	ldr	r2, .L2619+52
 	ldr	r2, [r2]
 	str	r2, [r8, #12]
 	movs	r2, #1
@@ -18359,64 +18243,64 @@ log2phys:
 	str	r3, [sp, #12]
 	ldr	r3, [sp, #20]
 	cmp	r2, r6
-	beq	.L2627
+	beq	.L2613
 	mov	r2, r3
 	mov	r1, r7
-	ldr	r0, .L2633+56
+	ldr	r0, .L2619+56
 	bl	printf
 	movs	r3, #4
 	ldr	r1, [r8, #12]
 	mov	r2, r3
-	ldr	r0, .L2633+60
+	ldr	r0, .L2619+60
 	bl	rknand_print_hex
-	ldr	r3, .L2633+32
+	ldr	r3, .L2619+32
 	movs	r2, #4
-	ldr	r1, .L2633+40
-	ldr	r0, .L2633+64
+	ldr	r1, .L2619+40
+	ldr	r0, .L2619+64
 	ldrh	r3, [r3]
 	ldr	r1, [r1]
 	bl	rknand_print_hex
-	ldr	r3, .L2633+68
+	ldr	r3, .L2619+68
 	movs	r2, #1
 	str	r2, [r3]
-.L2628:
+.L2614:
 	ldr	r3, [sp, #12]
 	ldrh	r3, [r3, #8]
 	cmp	r3, r6
-	beq	.L2629
-	ldr	r1, .L2633+36
+	beq	.L2615
+	ldr	r1, .L2619+36
 	mov	r2, #624
-	ldr	r0, .L2633+12
+	ldr	r0, .L2619+12
 	bl	printf
-	ldr	r1, .L2633+16
-	ldr	r0, .L2633+20
+	ldr	r1, .L2619+16
+	ldr	r0, .L2619+20
 	bl	printf
-.L2629:
-	ldr	r3, .L2633+24
+.L2615:
+	ldr	r3, .L2619+24
 	movs	r1, #0
 	ldr	r3, [r3]
 	adds	r2, r3, r4
 	str	r1, [r2, #4]
 	strh	r6, [r3, r4]	@ movhi
-	b	.L2620
-.L2627:
+	b	.L2606
+.L2613:
 	ldr	r2, [r8]
 	cmp	r2, #256
-	bne	.L2628
+	bne	.L2614
 	mov	r2, r3
 	mov	r1, r7
-	ldr	r0, .L2633+72
+	ldr	r0, .L2619+72
 	bl	printf
 	ldr	r3, [r5]
 	mov	r1, r7
-	ldr	r0, .L2633+76
+	ldr	r0, .L2619+76
 	add	r3, r3, r4
 	ldr	r2, [r3, #8]
 	bl	FtlMapWritePage
-	b	.L2628
-.L2634:
+	b	.L2614
+.L2620:
 	.align	2
-.L2633:
+.L2619:
 	.word	.LANCHOR74
 	.word	.LANCHOR56
 	.word	.LANCHOR236
@@ -18452,56 +18336,56 @@ FtlCheckVpc:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r6, .L2659
-	ldr	r5, .L2659+4
-	ldr	r1, .L2659+8
-	ldr	r0, .L2659+12
+	ldr	r6, .L2645
+	ldr	r5, .L2645+4
+	ldr	r1, .L2645+8
+	ldr	r0, .L2645+12
 	bl	printf
 	mov	r2, #8192
 	movs	r1, #0
-	ldr	r0, .L2659+4
+	ldr	r0, .L2645+4
 	bl	memset
-.L2636:
+.L2622:
 	ldr	r3, [r6]
 	cmp	r4, r3
-	bcc	.L2638
-	ldr	r10, .L2659+60
+	bcc	.L2624
+	ldr	r10, .L2645+60
 	movs	r4, #0
-	ldr	r7, .L2659+16
+	ldr	r7, .L2645+16
 	mov	r5, r4
-.L2639:
+.L2625:
 	ldrh	r2, [r10]
 	uxth	r3, r4
 	cmp	r2, r3
-	bhi	.L2641
-	ldr	r3, .L2659+20
+	bhi	.L2627
+	ldr	r3, .L2645+20
 	ldr	r4, [r3]
-	cbz	r4, .L2642
-	ldr	r3, .L2659+24
+	cbz	r4, .L2628
+	ldr	r3, .L2645+24
 	mov	r8, #0
-	ldr	r6, .L2659+28
-	ldr	r10, .L2659+16
+	ldr	r6, .L2645+28
+	ldr	r10, .L2645+16
 	ldrh	r7, [r3]
 	ldr	r3, [r6]
-	ldr	fp, .L2659+4
+	ldr	fp, .L2645+4
 	subs	r4, r4, r3
-	ldr	r3, .L2659+32
+	ldr	r3, .L2645+32
 	asrs	r4, r4, #1
 	muls	r4, r3, r4
 	uxth	r4, r4
-.L2643:
+.L2629:
 	uxth	r3, r8
 	cmp	r7, r3
-	bls	.L2642
+	bls	.L2628
 	ldr	r3, [r10]
 	ldrh	r2, [r3, r4, lsl #1]
-	cbz	r2, .L2644
+	cbz	r2, .L2630
 	movs	r5, #1
 	ldrh	r3, [fp, r4, lsl #1]
 	mov	r1, r4
-	ldr	r0, .L2659+36
+	ldr	r0, .L2645+36
 	bl	printf
-.L2644:
+.L2630:
 	movs	r3, #6
 	ldr	r2, [r6]
 	muls	r4, r3, r4
@@ -18509,65 +18393,65 @@ FtlCheckVpc:
 	add	r8, r8, #1
 	ldrh	r4, [r2, r4]
 	cmp	r4, r3
-	bne	.L2643
-.L2642:
+	bne	.L2629
+.L2628:
 	mov	r1, r5
-	ldr	r0, .L2659+40
+	ldr	r0, .L2645+40
 	bl	printf
-	cbz	r5, .L2635
-	ldr	r1, .L2659+8
+	cbz	r5, .L2621
+	ldr	r1, .L2645+8
 	movw	r2, #1849
-	ldr	r0, .L2659+44
+	ldr	r0, .L2645+44
 	bl	printf
-	ldr	r1, .L2659+48
-	ldr	r0, .L2659+52
+	ldr	r1, .L2645+48
+	ldr	r0, .L2645+52
 	bl	printf
-.L2635:
+.L2621:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2638:
+.L2624:
 	movs	r2, #0
 	add	r1, sp, #4
 	mov	r0, r4
 	bl	log2phys
 	ldr	r0, [sp, #4]
 	adds	r3, r0, #1
-	beq	.L2637
+	beq	.L2623
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r5, r0, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r5, r0, lsl #1]	@ movhi
-.L2637:
+.L2623:
 	adds	r4, r4, #1
-	b	.L2636
-.L2641:
+	b	.L2622
+.L2627:
 	ldr	r3, [r7]
 	uxth	r6, r4
-	ldr	r8, .L2659+4
+	ldr	r8, .L2645+4
 	ldrh	r2, [r3, r6, lsl #1]
 	ldrh	r3, [r8, r6, lsl #1]
 	cmp	r2, r3
-	beq	.L2640
+	beq	.L2626
 	mov	r1, r6
-	ldr	r0, .L2659+56
+	ldr	r0, .L2645+56
 	bl	printf
 	ldr	r3, [r7]
 	movw	r2, #65535
 	ldrh	r3, [r3, r6, lsl #1]
 	cmp	r3, r2
-	beq	.L2640
+	beq	.L2626
 	ldrh	r2, [r8, r6, lsl #1]
 	cmp	r2, r3
 	it	hi
 	movhi	r5, #1
-.L2640:
+.L2626:
 	adds	r4, r4, #1
-	b	.L2639
-.L2660:
+	b	.L2625
+.L2646:
 	.align	2
-.L2659:
+.L2645:
 	.word	.LANCHOR74
 	.word	check_valid_page_count_table
 	.word	.LANCHOR238
@@ -18598,60 +18482,60 @@ Ftlscanalldata:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r5, #0
-	ldr	r7, .L2675
+	ldr	r7, .L2661
 	sub	sp, sp, #32
 	movs	r1, #0
-	ldr	r8, .L2675+24
-	ldr	r0, .L2675+4
+	ldr	r8, .L2661+24
+	ldr	r0, .L2661+4
 	bl	printf
-.L2662:
+.L2648:
 	ldr	r3, [r7]
 	cmp	r5, r3
-	bcc	.L2668
+	bcc	.L2654
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L2668:
+.L2654:
 	movs	r2, #0
 	add	r1, sp, #28
 	mov	r0, r5
 	bl	log2phys
 	ubfx	r3, r5, #0, #11
-	cbnz	r3, .L2663
+	cbnz	r3, .L2649
 	ldr	r2, [sp, #28]
 	mov	r1, r5
 	mov	r0, r8
 	bl	printf
-.L2663:
+.L2649:
 	ldr	r3, [sp, #28]
 	adds	r2, r3, #1
-	beq	.L2665
-	ldr	r4, .L2675+8
+	beq	.L2651
+	ldr	r4, .L2661+8
 	movs	r2, #0
 	movs	r1, #1
 	str	r3, [r4, #4]
 	mov	r0, r4
-	ldr	r3, .L2675+12
+	ldr	r3, .L2661+12
 	str	r5, [r4, #16]
 	str	r2, [r4]
 	ldr	r3, [r3]
 	str	r3, [r4, #8]
-	ldr	r3, .L2675+16
+	ldr	r3, .L2661+16
 	ldr	r6, [r3]
 	str	r6, [r4, #12]
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	cmp	r3, #256
-	beq	.L2666
+	beq	.L2652
 	adds	r3, r3, #1
-	beq	.L2666
+	beq	.L2652
 	ldr	r3, [r6, #8]
 	cmp	r5, r3
-	beq	.L2665
-.L2666:
+	beq	.L2651
+.L2652:
 	ldr	r2, [r4, #8]
 	ldr	r3, [r4, #12]
-	ldr	r0, .L2675+20
+	ldr	r0, .L2661+20
 	ldr	r1, [r2, #4]
 	str	r1, [sp, #16]
 	mov	r1, r5
@@ -18666,12 +18550,12 @@ Ftlscanalldata:
 	ldr	r2, [r4, #4]
 	ldr	r3, [r3]
 	bl	printf
-.L2665:
+.L2651:
 	adds	r5, r5, #1
-	b	.L2662
-.L2676:
+	b	.L2648
+.L2662:
 	.align	2
-.L2675:
+.L2661:
 	.word	.LANCHOR74
 	.word	.LC66
 	.word	.LANCHOR211
@@ -18693,7 +18577,7 @@ FtlReUsePrevPpa:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r6, r0
-	ldr	r5, .L2687
+	ldr	r5, .L2673
 	ubfx	r0, r1, #10, #16
 	str	r1, [sp, #4]
 	bl	P2V_block_in_plane
@@ -18701,15 +18585,15 @@ FtlReUsePrevPpa:
 	mov	r7, r0
 	ldrh	r3, [r2, r0, lsl #1]
 	cmp	r3, #0
-	bne	.L2678
-	ldr	r2, .L2687+4
+	bne	.L2664
+	ldr	r2, .L2673+4
 	ldr	r4, [r2]
 	cmp	r4, #0
-	beq	.L2679
-	ldr	r2, .L2687+8
+	beq	.L2665
+	ldr	r2, .L2673+8
 	movw	lr, #65535
-	ldr	ip, .L2687+32
-	ldr	r0, .L2687+12
+	ldr	ip, .L2673+32
+	ldr	r0, .L2673+12
 	ldr	r2, [r2]
 	ldrh	r1, [r0]
 	mov	r8, r0
@@ -18718,25 +18602,25 @@ FtlReUsePrevPpa:
 	mul	r4, ip, r4
 	mov	ip, #6
 	uxth	r4, r4
-.L2680:
+.L2666:
 	uxth	r0, r3
 	cmp	r1, r0
-	bls	.L2679
+	bls	.L2665
 	cmp	r4, r7
-	bne	.L2681
+	bne	.L2667
 	mov	r1, r4
-	ldr	r0, .L2687+4
+	ldr	r0, .L2673+4
 	bl	List_remove_node
 	ldrh	r3, [r8]
-	cbnz	r3, .L2682
-	ldr	r1, .L2687+16
+	cbnz	r3, .L2668
+	ldr	r1, .L2673+16
 	movw	r2, #2271
-	ldr	r0, .L2687+20
+	ldr	r0, .L2673+20
 	bl	printf
-	ldr	r1, .L2687+24
-	ldr	r0, .L2687+28
+	ldr	r1, .L2673+24
+	ldr	r0, .L2673+28
 	bl	printf
-.L2682:
+.L2668:
 	ldrh	r3, [r8]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -18744,17 +18628,17 @@ FtlReUsePrevPpa:
 	bl	INSERT_DATA_LIST
 	ldr	r2, [r5]
 	ldrh	r3, [r2, r7, lsl #1]
-.L2678:
+.L2664:
 	adds	r3, r3, #1
 	strh	r3, [r2, r7, lsl #1]	@ movhi
-	b	.L2679
-.L2681:
+	b	.L2665
+.L2667:
 	mul	r4, ip, r4
 	adds	r3, r3, #1
 	ldrh	r4, [r2, r4]
 	cmp	r4, lr
-	bne	.L2680
-.L2679:
+	bne	.L2666
+.L2665:
 	movs	r2, #1
 	add	r1, sp, #4
 	mov	r0, r6
@@ -18762,9 +18646,9 @@ FtlReUsePrevPpa:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L2688:
+.L2674:
 	.align	2
-.L2687:
+.L2673:
 	.word	.LANCHOR85
 	.word	.LANCHOR89
 	.word	.LANCHOR83
@@ -18792,181 +18676,181 @@ FtlRecoverySuperblock:
 	mov	r10, r0
 	sub	sp, sp, #56
 	cmp	r3, r2
-	beq	.L2853
+	beq	.L2839
 	ldrh	r3, [r0, #2]
 	str	r3, [sp, #12]
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	ldr	r1, [sp, #12]
 	str	r3, [sp, #28]
-	ldr	r3, .L2862
+	ldr	r3, .L2848
 	ldrh	r3, [r3]
 	cmp	r3, r1
 	mov	r3, #0
-	bne	.L2692
+	bne	.L2678
 	strh	r3, [r0, #4]	@ movhi
-.L2860:
+.L2846:
 	strb	r3, [r10, #6]
-.L2853:
+.L2839:
 	movs	r0, #0
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2692:
+.L2678:
 	ldrh	r0, [r0, #16]
-.L2693:
+.L2679:
 	cmp	r0, r2
 	uxth	r5, r3
 	add	r3, r3, #1
-	beq	.L2694
+	beq	.L2680
 	ldrb	r1, [r10, #8]	@ zero_extendqisi2
 	cmp	r1, #1
-	bne	.L2695
+	bne	.L2681
 	bl	FtlGetLastWrittenPage
 	adds	r6, r0, #1
 	mov	r4, r0
-	beq	.L2696
-	ldr	r3, .L2862+4
+	beq	.L2682
+	ldr	r3, .L2848+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L2774
-	ldr	r3, .L2862+8
+	bne	.L2760
+	ldr	r3, .L2848+8
 	ldrh	r5, [r3, r0, lsl #1]
-.L2697:
-	ldr	r3, .L2862+12
+.L2683:
+	ldr	r3, .L2848+12
 	movw	r8, #65535
 	mov	fp, #36
 	ldrh	ip, [r3]
-	ldr	r3, .L2862+16
+	ldr	r3, .L2848+16
 	ldr	r0, [r3]
-	ldr	r3, .L2862+20
+	ldr	r3, .L2848+20
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
-	ldr	r3, .L2862+24
+	ldr	r3, .L2848+24
 	ldrh	lr, [r3]
 	add	r3, r10, #16
 	str	r3, [sp, #20]
 	str	r3, [sp, #4]
 	movs	r3, #0
 	mov	r6, r3
-.L2698:
+.L2684:
 	uxth	r2, r3
 	cmp	ip, r2
-	bhi	.L2702
+	bhi	.L2688
 	ldrb	r3, [r10, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L2775
-	ldr	r3, .L2862+4
+	bne	.L2761
+	ldr	r3, .L2848+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	adds	r3, r3, #0
 	it	ne
 	movne	r3, #1
-.L2854:
+.L2840:
 	str	r3, [sp, #36]
 	mov	r1, r6
 	ldr	r2, [sp, #36]
 	movs	r7, #0
 	bl	FlashReadPages
-	ldr	r3, .L2862+28
+	ldr	r3, .L2848+28
 	movw	fp, #65535
-	ldr	r8, .L2862+16
+	ldr	r8, .L2848+16
 	ldr	r3, [r3]
 	subs	r3, r3, #1
 	str	r3, [sp, #4]
-.L2704:
+.L2690:
 	uxth	r3, r7
 	cmp	r6, r3
-	bhi	.L2709
-	bne	.L2707
+	bhi	.L2695
+	bne	.L2693
 	adds	r4, r4, #1
 	uxth	r3, r4
 	str	r3, [sp, #8]
 	ldr	r3, [r8]
 	ldr	r0, [r3, #4]
-.L2855:
+.L2841:
 	ubfx	r0, r0, #10, #16
 	bl	P2V_plane
 	ldrb	r3, [r10, #8]	@ zero_extendqisi2
 	str	r0, [sp, #16]
 	cmp	r3, #1
-	bne	.L2711
-	ldr	r2, .L2862+4
+	bne	.L2697
+	ldr	r2, .L2848+4
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbnz	r2, .L2711
+	cbnz	r2, .L2697
 	ldr	r1, [sp, #8]
-	ldr	r2, .L2862+8
+	ldr	r2, .L2848+8
 	ldrh	r2, [r2, r1, lsl #1]
 	str	r2, [sp, #8]
-.L2711:
-	ldr	r2, .L2862
+.L2697:
+	ldr	r2, .L2848
 	ldr	r1, [sp, #8]
 	ldrh	r2, [r2]
 	cmp	r2, r1
-	bne	.L2712
+	bne	.L2698
 	ldrh	r2, [sp, #8]
 	strh	r2, [r10, #2]	@ movhi
 	movs	r2, #0
 	strb	r2, [r10, #6]
 	strh	r2, [r10, #4]	@ movhi
-.L2712:
+.L2698:
 	ldr	r2, [sp, #8]
 	ldr	r1, [sp, #12]
 	cmp	r2, r1
-	bne	.L2713
+	bne	.L2699
 	ldr	r2, [sp, #16]
 	ldr	r1, [sp, #28]
 	cmp	r2, r1
-	bne	.L2713
-.L2861:
+	bne	.L2699
+.L2847:
 	ldr	r1, [sp, #8]
 	mov	r0, r10
 	bl	ftl_sb_update_avl_pages
-	b	.L2853
-.L2694:
+	b	.L2839
+.L2680:
 	uxth	r1, r3
 	adds	r1, r1, #8
 	ldrh	r0, [r10, r1, lsl #1]
-	b	.L2693
-.L2695:
+	b	.L2679
+.L2681:
 	movs	r1, #0
 	bl	FtlGetLastWrittenPage
 	mov	r4, r0
 	adds	r0, r0, #1
-	beq	.L2696
-.L2774:
+	beq	.L2682
+.L2760:
 	mov	r5, r4
-	b	.L2697
-.L2696:
+	b	.L2683
+.L2682:
 	ldr	r3, [sp, #12]
-	cbz	r3, .L2699
-	ldr	r1, .L2862+32
+	cbz	r3, .L2685
+	ldr	r1, .L2848+32
 	movw	r2, #2350
-	ldr	r0, .L2862+36
+	ldr	r0, .L2848+36
 	bl	printf
-	ldr	r1, .L2862+40
-	ldr	r0, .L2862+44
+	ldr	r1, .L2848+40
+	ldr	r0, .L2848+44
 	bl	printf
-.L2699:
+.L2685:
 	ldr	r3, [sp, #28]
-	cbz	r3, .L2700
+	cbz	r3, .L2686
 	cmp	r5, r3
-	beq	.L2700
-	ldr	r1, .L2862+32
+	beq	.L2686
+	ldr	r1, .L2848+32
 	movw	r2, #2351
-	ldr	r0, .L2862+36
+	ldr	r0, .L2848+36
 	bl	printf
-	ldr	r1, .L2862+40
-	ldr	r0, .L2862+44
+	ldr	r1, .L2848+40
+	ldr	r0, .L2848+44
 	bl	printf
-.L2700:
+.L2686:
 	movs	r3, #0
 	strh	r3, [r10, #2]	@ movhi
-	b	.L2860
-.L2702:
+	b	.L2846
+.L2688:
 	ldr	r1, [sp, #4]
 	ldrh	r2, [r1], #2
 	cmp	r2, r8
 	str	r1, [sp, #4]
-	beq	.L2701
+	beq	.L2687
 	mla	r1, fp, r6, r0
 	orr	r2, r5, r2, lsl #10
 	str	r2, [r1, #4]
@@ -18980,36 +18864,36 @@ FtlRecoverySuperblock:
 	ldr	r2, [sp, #8]
 	add	r7, r7, r2
 	str	r7, [r1, #12]
-.L2701:
+.L2687:
 	adds	r3, r3, #1
-	b	.L2698
-.L2775:
+	b	.L2684
+.L2761:
 	movs	r3, #0
-	b	.L2854
-.L2709:
+	b	.L2840
+.L2695:
 	movs	r3, #36
 	ldr	r1, [r8]
 	muls	r3, r7, r3
 	adds	r2, r1, r3
 	ldr	r3, [r1, r3]
-	cbnz	r3, .L2705
+	cbnz	r3, .L2691
 	ldr	r2, [r2, #12]
 	ldr	r3, [r2, #4]
 	adds	r1, r3, #1
-	beq	.L2706
-	ldr	r1, .L2862+28
+	beq	.L2692
+	ldr	r1, .L2848+28
 	mov	r0, r3
 	ldr	r1, [r1]
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L2706
-	ldr	r1, .L2862+28
+	cbz	r0, .L2692
+	ldr	r1, .L2848+28
 	adds	r3, r3, #1
 	str	r3, [r1]
-.L2706:
+.L2692:
 	ldr	r3, [r2]
 	adds	r3, r3, #1
-	bne	.L2708
-.L2707:
+	bne	.L2694
+.L2693:
 	uxth	r3, r4
 	uxth	r7, r7
 	str	r3, [sp, #8]
@@ -19017,26 +18901,26 @@ FtlRecoverySuperblock:
 	ldr	r3, [r8]
 	mla	r7, r2, r7, r3
 	ldr	r0, [r7, #4]
-	b	.L2855
-.L2705:
+	b	.L2841
+.L2691:
 	ldr	r1, [r2, #4]
 	uxth	fp, r5
-	ldr	r0, .L2862+48
+	ldr	r0, .L2848+48
 	bl	printf
 	ldrh	r2, [r10]
-	ldr	r3, .L2862+52
+	ldr	r3, .L2848+52
 	strh	r2, [r3]	@ movhi
-.L2708:
+.L2694:
 	adds	r7, r7, #1
-	b	.L2704
-.L2713:
+	b	.L2690
+.L2699:
 	movw	r2, #65535
 	cmp	fp, r2
-	bne	.L2714
+	bne	.L2700
 	cmp	r3, #0
-	bne	.L2715
-.L2714:
-	ldr	r3, .L2862+56
+	bne	.L2701
+.L2700:
+	ldr	r3, .L2848+56
 	uxth	fp, r5
 	uxth	r5, r5
 	mov	r7, #-1
@@ -19055,63 +18939,63 @@ FtlRecoverySuperblock:
 	subgt	r4, fp, #7
 	ldrle	r4, [sp, #12]
 	uxthgt	r4, r4
-.L2718:
+.L2704:
 	cmp	r4, fp
-	bhi	.L2733
-	ldr	r3, .L2862+12
+	bhi	.L2719
+	ldr	r3, .L2848+12
 	movw	lr, #65535
 	mov	ip, #36
 	ldrh	r8, [r3]
-	ldr	r3, .L2862+16
+	ldr	r3, .L2848+16
 	ldr	r0, [r3]
 	ldr	r3, [sp, #20]
 	str	r3, [sp, #32]
 	movs	r3, #0
 	mov	r5, r3
-	b	.L2734
-.L2720:
+	b	.L2720
+.L2706:
 	ldr	r1, [sp, #32]
 	ldrh	r2, [r1], #2
 	cmp	r2, lr
 	str	r1, [sp, #32]
-	beq	.L2719
+	beq	.L2705
 	mla	r1, ip, r5, r0
 	adds	r5, r5, #1
 	orr	r2, r4, r2, lsl #10
 	uxth	r5, r5
 	str	r2, [r1, #4]
-.L2719:
+.L2705:
 	adds	r3, r3, #1
-.L2734:
+.L2720:
 	uxth	r2, r3
 	cmp	r8, r2
-	bhi	.L2720
+	bhi	.L2706
 	mov	r1, r5
 	ldr	r2, [sp, #36]
 	bl	FlashReadPages
-	ldr	r2, .L2862+4
+	ldr	r2, .L2848+4
 	movs	r1, #36
-	ldr	r3, .L2862+56
+	ldr	r3, .L2848+56
 	movs	r0, #0
 	movw	ip, #65535
 	ldrb	lr, [r2]	@ zero_extendqisi2
-	ldr	r2, .L2862+16
+	ldr	r2, .L2848+16
 	ldr	r3, [r3]
 	ldr	r2, [r2]
 	mla	r5, r1, r5, r2
-.L2721:
+.L2707:
 	cmp	r5, r2
-	bne	.L2731
-	cbz	r0, .L2732
-	ldr	r2, .L2862+56
+	bne	.L2717
+	cbz	r0, .L2718
+	ldr	r2, .L2848+56
 	str	r3, [r2]
-.L2732:
+.L2718:
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L2718
-.L2863:
+	b	.L2704
+.L2849:
 	.align	2
-.L2862:
+.L2848:
 	.word	.LANCHOR52
 	.word	.LANCHOR16
 	.word	.LANCHOR17
@@ -19127,121 +19011,121 @@ FtlRecoverySuperblock:
 	.word	.LC69
 	.word	.LANCHOR241
 	.word	.LANCHOR139
-.L2731:
+.L2717:
 	ldr	r1, [r2]
-	cbnz	r1, .L2722
+	cbnz	r1, .L2708
 	ldr	r1, [r2, #12]
 	ldrh	r8, [r1]
 	cmp	r8, ip
-	beq	.L2778
+	beq	.L2764
 	ldr	r1, [r1, #4]
 	cmp	r1, #-1
-	beq	.L2778
+	beq	.L2764
 	adds	r0, r7, #1
-	bne	.L2780
-	ldr	r0, .L2864
+	bne	.L2766
+	ldr	r0, .L2850
 	ldrh	r0, [r0, r4, lsl #1]
 	cmp	r0, ip
-	bne	.L2724
+	bne	.L2710
 	cmp	lr, #0
-	beq	.L2780
-.L2724:
+	beq	.L2766
+.L2710:
 	ldr	r0, [sp, #4]
 	cmp	r0, r3
 	it	ne
 	movne	r7, r3
-.L2780:
+.L2766:
 	movs	r0, #1
-	b	.L2723
-.L2722:
-	cbz	r0, .L2725
-	ldr	r2, .L2864+4
+	b	.L2709
+.L2708:
+	cbz	r0, .L2711
+	ldr	r2, .L2850+4
 	str	r3, [r2]
-.L2725:
-	ldr	r3, .L2864+8
+.L2711:
+	ldr	r3, .L2850+8
 	ldrh	r2, [r10]
 	strh	r2, [r3]	@ movhi
 	ldrb	r3, [r10, #8]	@ zero_extendqisi2
-	cbnz	r3, .L2715
-	ldr	r3, .L2864
+	cbnz	r3, .L2701
+	ldr	r3, .L2850
 	ldrh	r2, [r3, r4, lsl #1]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L2727
+	bne	.L2713
 	adds	r1, r7, #1
-	ldr	r3, .L2864+4
-	beq	.L2728
+	ldr	r3, .L2850+4
+	beq	.L2714
 	str	r7, [r3]
-.L2715:
+.L2701:
 	ldr	fp, [sp, #12]
 	movs	r2, #1
-	ldr	r6, .L2864+12
-	ldr	r3, .L2864+16
+	ldr	r6, .L2850+12
+	ldr	r3, .L2850+16
 	strh	r2, [r3]	@ movhi
-.L2735:
-	ldr	r3, .L2864+20
+.L2721:
+	ldr	r3, .L2850+20
 	movw	ip, #65535
 	ldr	r0, [r6]
 	mov	lr, #36
 	ldr	r1, [sp, #20]
 	movs	r2, #0
 	ldrh	r5, [r3]
-	ldr	r3, .L2864+24
+	ldr	r3, .L2850+24
 	str	r2, [sp, #24]
 	ldrb	r7, [r3]	@ zero_extendqisi2
-.L2736:
+.L2722:
 	uxth	r3, r2
 	cmp	r3, r5
-	bcc	.L2739
+	bcc	.L2725
 	ldr	r2, [sp, #36]
 	ldr	r1, [sp, #24]
 	bl	FlashReadPages
 	movs	r3, #0
-.L2859:
+.L2845:
 	str	r3, [sp, #32]
 	ldr	r2, [sp, #24]
 	ldrh	r3, [sp, #32]
 	cmp	r2, r3
-	bhi	.L2768
+	bhi	.L2754
 	ldrb	r3, [r10, #8]	@ zero_extendqisi2
 	add	fp, fp, #1
 	uxth	fp, fp
 	cmp	r3, #1
-	bne	.L2769
-	ldr	r3, .L2864+24
+	bne	.L2755
+	ldr	r3, .L2850+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2769
-	ldr	r3, .L2864+28
+	cbz	r3, .L2755
+	ldr	r3, .L2850+28
 	ldrh	r3, [r3]
 	cmp	r3, fp
-	bne	.L2769
+	bne	.L2755
 	ldr	r3, [sp, #8]
 	cmp	r3, fp
-	beq	.L2744
-.L2769:
-	ldr	r3, .L2864+32
+	beq	.L2730
+.L2755:
+	ldr	r3, .L2850+32
 	ldrh	r3, [r3]
 	cmp	r3, fp
-	bne	.L2735
-	ldr	r2, .L2864+20
+	bne	.L2721
+	ldr	r2, .L2850+20
 	movw	r0, #65535
 	movs	r3, #0
 	strh	fp, [r10, #2]	@ movhi
 	strh	r3, [r10, #4]	@ movhi
 	ldrh	r2, [r2]
-.L2770:
+.L2756:
 	uxth	r1, r3
 	cmp	r1, r2
-	bcs	.L2853
+	bcs	.L2839
 	ldr	r1, [sp, #20]
 	ldrh	r4, [r1], #2
 	cmp	r4, r0
 	str	r1, [sp, #20]
 	add	r1, r3, #1
-	bne	.L2860
+	bne	.L2846
 	mov	r3, r1
-	b	.L2770
-.L2728:
+	b	.L2756
+.L2714:
 	ldr	r2, [sp, #4]
 	ldr	r1, [sp, #24]
 	cmp	r2, r1
@@ -19249,62 +19133,62 @@ FtlRecoverySuperblock:
 	ldreq	r2, [r3]
 	movne	r2, r1
 	addeq	r2, r2, #-1
-.L2856:
+.L2842:
 	str	r2, [r3]
-	b	.L2715
-.L2727:
+	b	.L2701
+.L2713:
 	ldr	r3, [sp, #4]
 	cmp	r6, r3
-	beq	.L2730
+	beq	.L2716
 	adds	r2, r6, #1
-	beq	.L2715
-	ldr	r3, .L2864+4
+	beq	.L2701
+	ldr	r3, .L2850+4
 	str	r6, [r3]
-	b	.L2715
-.L2730:
-	ldr	r2, .L2864+4
+	b	.L2701
+.L2716:
+	ldr	r2, .L2850+4
 	ldr	r1, [sp, #4]
 	ldr	r3, [r2]
 	cmp	r1, r3
-	beq	.L2715
+	beq	.L2701
 	subs	r3, r3, #1
 	str	r3, [r2]
-	b	.L2715
-.L2778:
+	b	.L2701
+.L2764:
 	mov	r1, r3
 	mov	r3, r6
-.L2723:
+.L2709:
 	mov	r6, r3
 	adds	r2, r2, #36
 	mov	r3, r1
-	b	.L2721
-.L2733:
+	b	.L2707
+.L2719:
 	mov	r2, #-1
-	ldr	r3, .L2864+4
-	b	.L2856
-.L2739:
+	ldr	r3, .L2850+4
+	b	.L2842
+.L2725:
 	ldrh	r3, [r1], #2
 	cmp	r3, ip
-	beq	.L2737
+	beq	.L2723
 	ldr	r4, [sp, #24]
 	orr	r3, fp, r3, lsl #10
 	mla	r4, lr, r4, r0
 	str	r3, [r4, #4]
 	ldrb	r8, [r10, #8]	@ zero_extendqisi2
 	cmp	r8, #1
-	bne	.L2738
-	cbz	r7, .L2738
+	bne	.L2724
+	cbz	r7, .L2724
 	orr	r3, r3, #-2147483648
 	str	r3, [r4, #4]
-.L2738:
+.L2724:
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	str	r3, [sp, #24]
-.L2737:
+.L2723:
 	adds	r2, r2, #1
-	b	.L2736
-.L2768:
+	b	.L2722
+.L2754:
 	ldr	r3, [sp, #32]
 	movs	r5, #36
 	ldr	r8, [r6]
@@ -19316,45 +19200,45 @@ FtlRecoverySuperblock:
 	bl	P2V_plane
 	ldr	r3, [sp, #12]
 	cmp	fp, r3
-	bcc	.L2741
-	bne	.L2742
+	bcc	.L2727
+	bne	.L2728
 	ldr	r3, [sp, #28]
 	cmp	r3, r0
-	bhi	.L2741
-.L2742:
+	bhi	.L2727
+.L2728:
 	ldr	r3, [sp, #8]
 	cmp	fp, r3
-	bne	.L2743
+	bne	.L2729
 	ldr	r3, [sp, #16]
 	cmp	r3, r0
-	beq	.L2744
-.L2743:
+	beq	.L2730
+.L2729:
 	ldr	r3, [r8, r5]
 	adds	r3, r3, #1
-	beq	.L2745
+	beq	.L2731
 	ldr	r3, [r7, #12]
 	movw	r2, #61589
 	ldrh	r1, [r3]
 	cmp	r1, r2
-	beq	.L2746
+	beq	.L2732
 	ldrh	r0, [r10]
-.L2857:
+.L2843:
 	bl	decrement_vpc_count
-	b	.L2741
-.L2746:
+	b	.L2727
+.L2732:
 	ldr	r2, [r3, #4]
 	str	r2, [sp, #4]
 	adds	r2, r2, #1
-	beq	.L2747
-	ldr	r2, .L2864+36
+	beq	.L2733
+	ldr	r2, .L2850+36
 	ldr	r0, [sp, #4]
 	ldr	r1, [r2]
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L2747
+	cbz	r0, .L2733
 	ldr	r1, [sp, #4]
 	adds	r1, r1, #1
 	str	r1, [r2]
-.L2747:
+.L2733:
 	ldr	r4, [r3, #8]
 	add	r1, sp, #48
 	ldr	r3, [r3, #12]
@@ -19362,17 +19246,17 @@ FtlRecoverySuperblock:
 	mov	r0, r4
 	str	r3, [sp, #44]
 	bl	log2phys
-	ldr	r3, .L2864+4
+	ldr	r3, .L2850+4
 	ldr	r1, [r3]
 	adds	r3, r1, #1
-	beq	.L2748
+	beq	.L2734
 	ldr	r0, [sp, #4]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L2748
+	beq	.L2734
 	ldr	r3, [sp, #44]
 	adds	r7, r3, #1
-	beq	.L2749
+	beq	.L2735
 	ldr	r0, [r6]
 	movs	r2, #0
 	movs	r1, #1
@@ -19384,73 +19268,73 @@ FtlRecoverySuperblock:
 	ldr	r1, [r2, r5]
 	adds	r3, r2, r5
 	adds	r1, r1, #1
-	bne	.L2750
-.L2751:
+	bne	.L2736
+.L2737:
 	mov	r3, #-1
 	str	r3, [sp, #44]
-.L2758:
+.L2744:
 	ldr	r7, [sp, #44]
 	adds	r0, r7, #1
-	beq	.L2741
-.L2773:
+	beq	.L2727
+.L2759:
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L2864+40
+	ldr	r3, .L2850+40
 	mov	r4, r0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bhi	.L2764
-	ldr	r1, .L2864+44
+	bhi	.L2750
+	ldr	r1, .L2850+44
 	movw	r2, #2683
-	ldr	r0, .L2864+48
+	ldr	r0, .L2850+48
 	bl	printf
-	ldr	r1, .L2864+52
-	ldr	r0, .L2864+56
+	ldr	r1, .L2850+52
+	ldr	r0, .L2850+56
 	bl	printf
-.L2764:
-	ldr	r3, .L2864+60
+.L2750:
+	ldr	r3, .L2850+60
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
 	cmp	r3, #0
-	beq	.L2765
+	beq	.L2751
 	mov	r0, r4
-	b	.L2857
-.L2749:
+	b	.L2843
+.L2735:
 	ldr	r3, [sp, #52]
 	ldr	r2, [sp, #48]
 	cmp	r2, r3
-	bne	.L2741
+	bne	.L2727
 	movs	r2, #1
 	add	r1, sp, #44
 	mov	r0, r4
 	bl	log2phys
-.L2741:
+.L2727:
 	ldr	r3, [sp, #32]
 	adds	r3, r3, #1
-	b	.L2859
-.L2750:
+	b	.L2845
+.L2736:
 	ldr	r1, [r7, #8]
 	cmp	r4, r1
-	bne	.L2751
+	bne	.L2737
 	ldr	r8, [r7, #4]
-	ldr	r0, .L2864+4
+	ldr	r0, .L2850+4
 	mov	r1, r8
 	ldr	r0, [r0]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L2751
+	beq	.L2737
 	ldr	r1, [sp, #48]
 	ldr	r0, [sp, #52]
 	cmp	r1, r0
-	bne	.L2753
-.L2756:
+	bne	.L2739
+.L2742:
 	ldr	r1, [sp, #44]
 	mov	r0, r4
 	bl	FtlReUsePrevPpa
-	b	.L2751
-.L2865:
+	b	.L2737
+.L2851:
 	.align	2
-.L2864:
+.L2850:
 	.word	.LANCHOR123
 	.word	.LANCHOR139
 	.word	.LANCHOR241
@@ -19467,78 +19351,78 @@ FtlRecoverySuperblock:
 	.word	.LC6
 	.word	.LC7
 	.word	.LANCHOR85
-.L2753:
+.L2739:
 	ldr	r0, [sp, #44]
 	cmp	r1, r0
-	beq	.L2751
+	beq	.L2737
 	adds	r0, r1, #1
-	beq	.L2754
+	beq	.L2740
 	str	r1, [r3, #4]
 	movs	r2, #0
 	movs	r1, #1
 	mov	r0, r3
 	ldr	r7, [r3, #12]
 	bl	FlashReadPages
-.L2755:
+.L2741:
 	ldr	r3, [r6]
 	ldr	r3, [r3, r5]
 	adds	r3, r3, #1
-	beq	.L2756
+	beq	.L2742
 	ldr	r3, [r7, #4]
-	ldr	r2, .L2866
+	ldr	r2, .L2852
 	mov	r1, r3
 	ldr	r0, [r2]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L2756
+	beq	.L2742
 	mov	r1, r3
 	mov	r0, r8
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L2751
-	b	.L2756
-.L2754:
+	beq	.L2737
+	b	.L2742
+.L2740:
 	str	r1, [r2, r5]
-	b	.L2755
-.L2748:
+	b	.L2741
+.L2734:
 	ldr	r3, [sp, #52]
 	ldr	r2, [sp, #48]
 	cmp	r2, r3
-	beq	.L2758
+	beq	.L2744
 	ldr	r3, [sp, #44]
 	adds	r7, r3, #1
-	beq	.L2760
-	ldr	r2, .L2866+4
+	beq	.L2746
+	ldr	r2, .L2852+4
 	ubfx	r3, r3, #10, #21
 	ldr	r2, [r2]
 	cmp	r3, r2
-	bcs	.L2741
-.L2760:
+	bcs	.L2727
+.L2746:
 	movs	r2, #1
 	add	r1, sp, #52
 	mov	r0, r4
 	bl	log2phys
 	ldr	r7, [sp, #48]
 	adds	r5, r7, #1
-	beq	.L2758
+	beq	.L2744
 	ldr	r3, [sp, #44]
 	cmp	r7, r3
-	beq	.L2773
+	beq	.L2759
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L2866+8
+	ldr	r3, .L2852+8
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L2763
-	ldr	r3, .L2866+12
+	beq	.L2749
+	ldr	r3, .L2852+12
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L2763
-	ldr	r3, .L2866+16
+	beq	.L2749
+	ldr	r3, .L2852+16
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L2758
-.L2763:
+	bne	.L2744
+.L2749:
 	ldr	r0, [r6]
 	movs	r2, #0
 	movs	r1, #1
@@ -19548,66 +19432,66 @@ FtlRecoverySuperblock:
 	ldr	r3, [r6]
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L2758
+	beq	.L2744
 	ldr	r1, [r5, #4]
 	ldr	r0, [sp, #4]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	bne	.L2758
+	bne	.L2744
 	movs	r2, #1
 	add	r1, sp, #48
 	mov	r0, r4
 	bl	log2phys
-	b	.L2758
-.L2765:
+	b	.L2744
+.L2751:
 	mov	r1, r4
-	ldr	r0, .L2866+20
+	ldr	r0, .L2852+20
 	bl	printf
-	b	.L2741
-.L2745:
+	b	.L2727
+.L2731:
 	ldrh	r3, [r10]
 	mov	r1, r4
-	ldr	r2, .L2866+24
-	ldr	r0, .L2866+28
+	ldr	r2, .L2852+24
+	ldr	r0, .L2852+28
 	strh	r3, [r2]	@ movhi
 	ldr	r2, [sp, #4]
 	bl	printf
-	ldr	r2, .L2866+32
+	ldr	r2, .L2852+32
 	ldr	r3, [r2]
 	cmp	r3, #31
-	bhi	.L2766
+	bhi	.L2752
 	ldr	r0, [sp, #52]
-	ldr	r1, .L2866+36
+	ldr	r1, .L2852+36
 	str	r0, [r1, r3, lsl #2]
 	adds	r3, r3, #1
 	str	r3, [r2]
-.L2766:
+.L2752:
 	ldrh	r0, [r10]
 	bl	decrement_vpc_count
-	ldr	r3, .L2866
+	ldr	r3, .L2852
 	ldr	r2, [r3]
 	adds	r1, r2, #1
-	bne	.L2767
+	bne	.L2753
 	ldr	r2, [sp, #4]
-.L2858:
+.L2844:
 	str	r2, [r3]
-	b	.L2741
-.L2767:
+	b	.L2727
+.L2753:
 	ldr	r1, [sp, #4]
 	cmp	r1, r2
-	bcs	.L2741
+	bcs	.L2727
 	mov	r2, r1
-	b	.L2858
-.L2744:
+	b	.L2844
+.L2730:
 	ldrb	r3, [sp, #16]	@ zero_extendqisi2
 	ldr	r2, [sp, #16]
 	strb	r3, [r10, #6]
 	ldrh	r3, [sp, #8]
 	strh	r3, [r10, #2]	@ movhi
-	b	.L2861
-.L2867:
+	b	.L2847
+.L2853:
 	.align	2
-.L2866:
+.L2852:
 	.word	.LANCHOR139
 	.word	.LANCHOR43
 	.word	.LANCHOR93
@@ -19630,38 +19514,38 @@ FtlRecoverySuperblock:
 FtlGcScanTempBlk:
 	@ args = 0, pretend = 0, frame = 64
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2913
+	ldr	r3, .L2899
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	sub	sp, sp, #64
 	ldrh	r5, [r3]
 	movw	r3, #65535
 	cmp	r5, r3
-	beq	.L2897
-	cbnz	r5, .L2869
-.L2870:
+	beq	.L2883
+	cbnz	r5, .L2855
+.L2856:
 	bl	FtlGcPageVarInit
-	b	.L2871
-.L2897:
+	b	.L2857
+.L2883:
 	movs	r5, #0
-.L2869:
-	ldr	r3, .L2913+4
+.L2855:
+	ldr	r3, .L2899+4
 	ldrh	r3, [r3]
 	cmp	r3, r1
-	beq	.L2870
-.L2871:
-	ldr	r8, .L2913+80
+	beq	.L2856
+.L2857:
+	ldr	r8, .L2899+80
 	mov	r3, #-1
 	str	r3, [sp, #8]
-.L2872:
+.L2858:
 	ldrh	r1, [r4]
 	movw	r3, #65535
 	movs	r2, #0
 	strb	r2, [r4, #8]
 	cmp	r1, r3
-	beq	.L2873
-.L2896:
-	ldr	r3, .L2913+8
+	beq	.L2859
+.L2882:
+	ldr	r3, .L2899+8
 	movs	r2, #0
 	ldr	r0, [r8]
 	mov	fp, r2
@@ -19669,45 +19553,45 @@ FtlGcScanTempBlk:
 	mov	r10, #36
 	ldrh	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L2913+12
+	ldr	r3, .L2899+12
 	ldr	r3, [r3]
 	str	r3, [sp, #16]
-	ldr	r3, .L2913+16
+	ldr	r3, .L2899+16
 	ldrh	r3, [r3]
 	str	r3, [sp, #20]
-	ldr	r3, .L2913+20
+	ldr	r3, .L2899+20
 	ldr	r7, [r3]
-	ldr	r3, .L2913+24
+	ldr	r3, .L2899+24
 	ldrh	ip, [r3]
 	add	r3, r4, #16
 	str	r3, [sp, #4]
-.L2874:
+.L2860:
 	ldr	r1, [sp, #12]
 	uxth	r3, r2
 	cmp	r1, r3
-	bhi	.L2876
+	bhi	.L2862
 	mov	r10, #0
 	movs	r2, #0
 	mov	r1, fp
 	bl	FlashReadPages
-.L2877:
+.L2863:
 	uxth	r3, r10
 	cmp	fp, r3
-	bhi	.L2895
-	ldr	r3, .L2913+4
+	bhi	.L2881
+	ldr	r3, .L2899+4
 	adds	r5, r5, #1
 	uxth	r5, r5
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	bhi	.L2896
+	bhi	.L2882
 	movs	r2, #0
-	b	.L2873
-.L2876:
+	b	.L2859
+.L2862:
 	ldr	r1, [sp, #4]
 	ldrh	r3, [r1], #2
 	cmp	r3, lr
 	str	r1, [sp, #4]
-	beq	.L2875
+	beq	.L2861
 	mla	r1, r10, fp, r0
 	orr	r3, r5, r3, lsl #10
 	str	r3, [r1, #4]
@@ -19724,10 +19608,10 @@ FtlGcScanTempBlk:
 	str	r3, [r1, #12]
 	add	r3, fp, #1
 	uxth	fp, r3
-.L2875:
+.L2861:
 	adds	r2, r2, #1
-	b	.L2874
-.L2895:
+	b	.L2860
+.L2881:
 	movs	r7, #36
 	ldr	r6, [r8]
 	mul	r7, r7, r10
@@ -19742,20 +19626,20 @@ FtlGcScanTempBlk:
 	ldr	r3, [sp, #12]
 	ldr	r3, [r3, #12]
 	cmp	r6, #0
-	bne	.L2878
+	bne	.L2864
 	ldrh	r0, [r3]
 	movw	r1, #65535
 	cmp	r0, r1
-	bne	.L2879
-.L2882:
-	ldr	r3, .L2913+28
+	bne	.L2865
+.L2868:
+	ldr	r3, .L2899+28
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2909
-	ldr	r3, .L2913+32
+	cbz	r3, .L2895
+	ldr	r3, .L2899+32
 	movs	r1, #1
 	str	r1, [r3]
-.L2873:
-	ldr	r3, .L2913
+.L2859:
+	ldr	r3, .L2899
 	movw	r1, #65535
 	mov	r0, r4
 	strh	r5, [r4, #2]	@ movhi
@@ -19767,39 +19651,39 @@ FtlGcScanTempBlk:
 	add	sp, sp, #64
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2879:
-	ldr	r1, .L2913+36
+.L2865:
+	ldr	r1, .L2899+36
 	ldr	r0, [r3, #8]
 	ldr	r1, [r1]
 	cmp	r0, r1
-	bhi	.L2882
-	ldr	r2, .L2913+40
+	bhi	.L2868
+	ldr	r2, .L2899+40
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbnz	r2, .L2885
-.L2886:
+	cbnz	r2, .L2871
+.L2872:
 	ldr	r2, [r3, #8]
 	add	r10, r10, #1
 	ldr	r1, [sp, #4]
 	ldr	r0, [r3, #12]
 	bl	FtlGcUpdatePage
-	b	.L2877
-.L2909:
-	ldr	r2, .L2913+44
+	b	.L2863
+.L2895:
+	ldr	r2, .L2899+44
 	ldrh	r1, [r4]
 	ldr	r2, [r2]
 	strh	r3, [r2, r1, lsl #1]	@ movhi
-.L2912:
+.L2898:
 	ldrh	r0, [r4]
 	bl	INSERT_FREE_LIST
-	ldr	r2, .L2913+48
+	ldr	r2, .L2899+48
 	movw	r3, #65535
 	strh	r3, [r4]	@ movhi
 	strh	r3, [r2]	@ movhi
-.L2911:
+.L2897:
 	bl	FtlGcPageVarInit
 	movs	r5, #0
-	b	.L2872
-.L2885:
+	b	.L2858
+.L2871:
 	mov	r2, r6
 	add	r1, sp, #24
 	str	r3, [sp, #12]
@@ -19808,78 +19692,78 @@ FtlGcScanTempBlk:
 	ldr	r1, [sp, #24]
 	ldr	r2, [r3, #12]
 	cmp	r2, r1
-	bne	.L2886
+	bne	.L2872
 	adds	r1, r2, #1
-	beq	.L2886
+	beq	.L2872
 	str	r2, [sp, #32]
 	movs	r1, #1
-	ldr	r2, .L2913+52
+	ldr	r2, .L2899+52
 	add	r0, sp, #28
 	ldr	r2, [r2]
 	str	r2, [sp, #36]
-	ldr	r2, .L2913+56
+	ldr	r2, .L2899+56
 	ldr	r2, [r2]
 	str	r2, [sp, #40]
 	mov	r2, r6
 	bl	FlashReadPages
-	ldr	r2, .L2913+60
+	ldr	r2, .L2899+60
 	ldr	r1, [r8]
 	ldr	r0, [sp, #36]
 	ldrh	r2, [r2]
 	ldr	r3, [sp, #12]
 	add	r7, r7, r1
 	lsl	ip, r2, #7
-.L2887:
+.L2873:
 	cmp	r6, ip
-	beq	.L2886
+	beq	.L2872
 	ldr	r1, [r7, #8]
 	ldr	r2, [r0, r6, lsl #2]
 	ldr	r1, [r1, r6, lsl #2]
 	cmp	r1, r2
-	beq	.L2888
+	beq	.L2874
 	ldr	r2, [sp, #32]
 	ldrh	r1, [r4]
-	ldr	r0, .L2913+64
+	ldr	r0, .L2899+64
 	bl	printf
-	ldr	r3, .L2913+44
+	ldr	r3, .L2899+44
 	movs	r1, #0
 	ldrh	r2, [r4]
 	ldr	r3, [r3]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	b	.L2912
-.L2888:
+	b	.L2898
+.L2874:
 	adds	r6, r6, #1
-	b	.L2887
-.L2878:
+	b	.L2873
+.L2864:
 	ldr	r2, [sp, #4]
 	ldrh	r1, [r4]
-	ldr	r0, .L2913+68
+	ldr	r0, .L2899+68
 	bl	printf
-	ldr	r3, .L2913+72
+	ldr	r3, .L2899+72
 	ldrh	r2, [r4]
 	ldr	r3, [r3]
-	cbnz	r3, .L2891
-	ldr	r3, .L2913+28
+	cbnz	r3, .L2877
+	ldr	r3, .L2899+28
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2892
-.L2891:
-	ldr	r3, .L2913+76
+	cbz	r3, .L2878
+.L2877:
+	ldr	r3, .L2899+76
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r2, lsl #1]
 	cmp	r3, #159
-	bls	.L2893
-.L2892:
+	bls	.L2879
+.L2878:
 	ldr	r3, [r8]
 	ldr	r3, [r3, r7]
 	adds	r3, r3, #1
-	bne	.L2894
-.L2893:
+	bne	.L2880
+.L2879:
 	ldr	r3, [r8]
 	add	r7, r7, r3
 	ldr	r3, [r7, #4]
 	str	r3, [sp, #8]
-.L2894:
-	ldr	r3, .L2913+44
+.L2880:
+	ldr	r3, .L2899+44
 	movs	r1, #0
 	ldr	r3, [r3]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
@@ -19887,10 +19771,10 @@ FtlGcScanTempBlk:
 	bl	INSERT_FREE_LIST
 	movw	r3, #65535
 	strh	r3, [r4]	@ movhi
-	b	.L2911
-.L2914:
+	b	.L2897
+.L2900:
 	.align	2
-.L2913:
+.L2899:
 	.word	.LANCHOR245
 	.word	.LANCHOR52
 	.word	.LANCHOR38
@@ -19925,42 +19809,42 @@ FtlGcFreeTempBlock:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L2939
+	ldr	r3, .L2925
 	ldr	r3, [r3]
-	cbz	r3, .L2916
-.L2921:
+	cbz	r3, .L2902
+.L2907:
 	movs	r0, #0
-.L2915:
+.L2901:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2916:
-	ldr	r0, .L2939+4
+.L2902:
+	ldr	r0, .L2925+4
 	movw	r3, #65535
-	ldr	r5, .L2939+8
+	ldr	r5, .L2925+8
 	ldrh	r6, [r0]
 	mov	r4, r0
 	cmp	r6, r3
-	beq	.L2918
-	ldr	r3, .L2939+12
+	beq	.L2904
+	ldr	r3, .L2925+12
 	ldrh	r1, [r3]
 	bl	FtlGcScanTempBlk
 	str	r0, [sp, #12]
 	adds	r0, r0, #1
-	beq	.L2918
-	ldr	r3, .L2939+16
+	beq	.L2904
+	ldr	r3, .L2925+16
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r6, lsl #1]
 	cmp	r3, #4
-	bls	.L2919
+	bls	.L2905
 	subs	r3, r3, #5
 	movs	r0, #1
 	strh	r3, [r2, r6, lsl #1]	@ movhi
 	bl	FtlEctTblFlush
-.L2919:
+.L2905:
 	ldr	r3, [r5]
-	cbnz	r3, .L2920
-	ldr	r2, .L2939+20
+	cbnz	r3, .L2906
+	ldr	r2, .L2925+20
 	ldr	r0, [sp, #12]
 	ldr	r3, [r2, #96]
 	ubfx	r0, r0, #10, #16
@@ -19968,72 +19852,72 @@ FtlGcFreeTempBlock:
 	str	r3, [r2, #96]
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
-.L2920:
+.L2906:
 	movs	r3, #0
 	movs	r0, #1
 	str	r3, [r5]
-	b	.L2915
-.L2918:
+	b	.L2901
+.L2904:
 	ldrh	r2, [r4]
 	movs	r3, #0
 	str	r3, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2921
-	ldr	r6, .L2939+12
+	beq	.L2907
+	ldr	r6, .L2925+12
 	bl	FtlCacheWriteBack
 	ldrb	r0, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r6]
-	ldr	r5, .L2939+24
+	ldr	r5, .L2925+24
 	muls	r2, r0, r2
 	ldrh	r1, [r5]
 	cmp	r1, r2
-	beq	.L2922
-	ldr	r1, .L2939+28
+	beq	.L2908
+	ldr	r1, .L2925+28
 	movs	r2, #193
-	ldr	r0, .L2939+32
+	ldr	r0, .L2925+32
 	bl	printf
-	ldr	r1, .L2939+36
-	ldr	r0, .L2939+40
+	ldr	r1, .L2925+36
+	ldr	r0, .L2925+40
 	bl	printf
-.L2922:
+.L2908:
 	ldrh	r6, [r6]
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	ldr	r2, .L2939+44
+	ldr	r2, .L2925+44
 	ldrh	r0, [r4]
-	ldr	fp, .L2939+84
+	ldr	fp, .L2925+84
 	smulbb	r3, r3, r6
 	ldr	r1, [r2]
 	movs	r6, #0
 	mov	r10, r2
 	strh	r3, [r1, r0, lsl #1]	@ movhi
-	ldr	r1, .L2939+48
+	ldr	r1, .L2925+48
 	ldrh	r3, [r5]
 	ldr	r0, [r1]
 	add	r3, r3, r0
 	str	r3, [r1]
-.L2923:
+.L2909:
 	ldrh	r2, [r5]
 	uxth	r3, r6
 	cmp	r2, r3
-	bhi	.L2927
+	bhi	.L2913
 	movw	r0, #65535
 	bl	decrement_vpc_count
-	ldr	r3, .L2939+52
+	ldr	r3, .L2925+52
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2928
+	cbz	r3, .L2914
 	ldrh	r1, [r4]
-	ldr	r0, .L2939+56
+	ldr	r0, .L2925+56
 	bl	printf
-.L2928:
+.L2914:
 	ldrh	r0, [r4]
 	ldr	r3, [r10]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	beq	.L2929
+	beq	.L2915
 	bl	INSERT_DATA_LIST
-.L2930:
-	ldr	r3, .L2939+60
+.L2916:
+	ldr	r3, .L2925+60
 	movw	r6, #65535
 	strh	r6, [r4]	@ movhi
 	movs	r4, #0
@@ -20041,35 +19925,35 @@ FtlGcFreeTempBlock:
 	strh	r4, [r3]	@ movhi
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	ldr	r3, .L2939+64
+	ldr	r3, .L2925+64
 	strh	r6, [r3]	@ movhi
-	ldr	r3, .L2939+68
+	ldr	r3, .L2925+68
 	ldrh	r2, [r3]
-	ldr	r3, .L2939+72
+	ldr	r3, .L2925+72
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, asr #2
-	ble	.L2921
-	ldr	r3, .L2939+76
+	ble	.L2907
+	ldr	r3, .L2925+76
 	movs	r2, #20
 	mov	r0, r4
 	strh	r2, [r3]	@ movhi
-	b	.L2915
-.L2927:
+	b	.L2901
+.L2913:
 	uxth	r3, r6
 	mov	r8, #12
 	ldr	r2, [fp]
 	mul	r8, r8, r3
-	ldr	r3, .L2939+80
+	ldr	r3, .L2925+80
 	ldr	r3, [r3]
 	add	r7, r3, r8
 	ldr	r0, [r7, #8]
 	cmp	r0, r2
-	bcc	.L2924
-.L2937:
+	bcc	.L2910
+.L2923:
 	ldrh	r0, [r4]
-	b	.L2938
-.L2924:
+	b	.L2924
+.L2910:
 	movs	r2, #0
 	add	r1, sp, #12
 	str	r3, [sp, #4]
@@ -20078,7 +19962,7 @@ FtlGcFreeTempBlock:
 	ldr	r2, [sp, #12]
 	ldr	r0, [r3, r8]
 	cmp	r0, r2
-	bne	.L2926
+	bne	.L2912
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	movs	r2, #1
@@ -20087,22 +19971,22 @@ FtlGcFreeTempBlock:
 	ldr	r0, [r7, #8]
 	bl	log2phys
 	mov	r0, r8
-.L2938:
+.L2924:
 	bl	decrement_vpc_count
-	b	.L2925
-.L2926:
+	b	.L2911
+.L2912:
 	ldr	r3, [r7, #4]
 	cmp	r2, r3
-	bne	.L2937
-.L2925:
+	bne	.L2923
+.L2911:
 	adds	r6, r6, #1
-	b	.L2923
-.L2929:
+	b	.L2909
+.L2915:
 	bl	INSERT_FREE_LIST
-	b	.L2930
-.L2940:
+	b	.L2916
+.L2926:
 	.align	2
-.L2939:
+.L2925:
 	.word	.LANCHOR78
 	.word	.LANCHOR95
 	.word	.LANCHOR138
@@ -20138,27 +20022,27 @@ FtlGcPageRecovery:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	ldr	r4, .L2943
-	ldr	r5, .L2943+4
+	ldr	r4, .L2929
+	ldr	r5, .L2929+4
 	ldrh	r1, [r4]
 	mov	r0, r5
 	bl	FtlGcScanTempBlk
 	ldrh	r2, [r5, #2]
 	ldrh	r3, [r4]
 	cmp	r2, r3
-	bcc	.L2941
-	ldr	r0, .L2943+8
+	bcc	.L2927
+	ldr	r0, .L2929+8
 	bl	FtlMapBlkWriteDumpData
 	movs	r0, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r3, .L2943+12
+	ldr	r3, .L2929+12
 	movs	r2, #0
 	str	r2, [r3]
-.L2941:
+.L2927:
 	pop	{r3, r4, r5, pc}
-.L2944:
+.L2930:
 	.align	2
-.L2943:
+.L2929:
 	.word	.LANCHOR52
 	.word	.LANCHOR95
 	.word	.LANCHOR130
@@ -20177,13 +20061,13 @@ FtlPowerLostRecovery:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #0
-	ldr	r5, .L2946
-	ldr	r3, .L2946+4
+	ldr	r5, .L2932
+	ldr	r3, .L2932+4
 	mov	r0, r5
 	str	r4, [r3]
 	bl	FtlRecoverySuperblock
 	mov	r0, r5
-	ldr	r5, .L2946+8
+	ldr	r5, .L2932+8
 	bl	FtlSlcSuperblockCheck
 	mov	r0, r5
 	bl	FtlRecoverySuperblock
@@ -20194,9 +20078,9 @@ FtlPowerLostRecovery:
 	bl	decrement_vpc_count
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L2947:
+.L2933:
 	.align	2
-.L2946:
+.L2932:
 	.word	.LANCHOR93
 	.word	.LANCHOR243
 	.word	.LANCHOR94
@@ -20214,30 +20098,30 @@ FtlSysBlkInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r3, #0
-	ldr	r4, .L2961
+	ldr	r4, .L2947
 	movw	r5, #65535
 	strh	r3, [r4]	@ movhi
-	ldr	r3, .L2961+4
+	ldr	r3, .L2947+4
 	strh	r5, [r3]	@ movhi
-	ldr	r3, .L2961+8
+	ldr	r3, .L2947+8
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlScanSysBlk
-	ldr	r3, .L2961+12
+	ldr	r3, .L2947+12
 	ldrh	r3, [r3]
 	cmp	r3, r5
 	mov	r5, r4
-	bne	.L2949
-.L2951:
+	bne	.L2935
+.L2937:
 	mov	r4, #-1
-.L2948:
+.L2934:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, pc}
-.L2949:
+.L2935:
 	bl	FtlLoadSysInfo
 	mov	r4, r0
 	cmp	r0, #0
-	bne	.L2951
+	bne	.L2937
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -20247,42 +20131,42 @@ FtlSysBlkInit:
 	bl	FtlPowerLostRecovery
 	movs	r0, #1
 	bl	FtlUpdateVaildLpn
-	ldr	r3, .L2961+16
+	ldr	r3, .L2947+16
 	movs	r0, #12
 	ldrh	r1, [r3]
-	ldr	r3, .L2961+20
+	ldr	r3, .L2947+20
 	ldr	r2, [r3]
 	mov	r3, r4
-.L2952:
+.L2938:
 	cmp	r3, r1
-	bge	.L2957
+	bge	.L2943
 	mla	r6, r0, r3, r2
 	ldr	r6, [r6, #4]
 	cmp	r6, #0
-	bge	.L2953
-.L2957:
-	ldr	r0, .L2961+24
+	bge	.L2939
+.L2943:
+	ldr	r0, .L2947+24
 	cmp	r3, r1
 	ldr	r2, [r0]
 	add	r2, r2, #32
 	str	r2, [r0]
-	bge	.L2959
-.L2954:
-	ldr	r3, .L2961+28
+	bge	.L2945
+.L2940:
+	ldr	r3, .L2947+28
 	ldr	r1, [r3]
-	ldr	r3, .L2961+32
+	ldr	r3, .L2947+32
 	ldrh	r0, [r3]
 	ldrh	r5, [r3, #4]
 	ldrh	r2, [r1, r0, lsl #1]
 	subs	r2, r2, r5
-	ldr	r5, .L2961+36
+	ldr	r5, .L2947+36
 	strh	r2, [r1, r0, lsl #1]	@ movhi
 	ldrh	r2, [r5]
 	strh	r2, [r3, #2]	@ movhi
 	movs	r2, #0
 	strh	r2, [r3, #4]	@ movhi
 	strb	r2, [r3, #6]
-	ldr	r3, .L2961+40
+	ldr	r3, .L2947+40
 	ldrh	r6, [r3]
 	ldrh	r7, [r3, #4]
 	ldrh	r0, [r1, r6, lsl #1]
@@ -20291,28 +20175,28 @@ FtlSysBlkInit:
 	strb	r2, [r3, #6]
 	ldrh	r1, [r5]
 	strh	r2, [r3, #4]	@ movhi
-	ldr	r2, .L2961+44
+	ldr	r2, .L2947+44
 	strh	r1, [r3, #2]	@ movhi
 	ldrh	r3, [r2, #30]
 	adds	r3, r3, #1
 	strh	r3, [r2, #30]	@ movhi
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L2960:
+.L2946:
 	bl	FtlVpcTblFlush
-	b	.L2948
-.L2953:
+	b	.L2934
+.L2939:
 	adds	r3, r3, #1
-	b	.L2952
-.L2959:
+	b	.L2938
+.L2945:
 	ldrh	r3, [r5]
 	cmp	r3, #0
-	bne	.L2954
+	bne	.L2940
 	bl	l2p_flush
-	b	.L2960
-.L2962:
+	b	.L2946
+.L2948:
 	.align	2
-.L2961:
+.L2947:
 	.word	.LANCHOR242
 	.word	.LANCHOR241
 	.word	.LANCHOR39
@@ -20337,70 +20221,70 @@ FtlSysBlkInit:
 FtlLowFormat:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2994
+	ldr	r3, .L2980
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #24
 	ldr	r4, [r3]
 	cmp	r4, #0
-	bne	.L2965
-	ldr	r5, .L2994+4
+	bne	.L2951
+	ldr	r5, .L2980+4
 	mov	r1, r4
-	ldr	r3, .L2994+8
-	ldr	r6, .L2994+12
+	ldr	r3, .L2980+8
+	ldr	r6, .L2980+12
 	ldrh	r2, [r5]
 	ldr	r0, [r3]
-	ldr	r7, .L2994+16
+	ldr	r7, .L2980+16
 	lsls	r2, r2, #2
 	bl	ftl_memset
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L2994+20
+	ldr	r3, .L2980+20
 	lsls	r2, r2, #2
 	ldr	r0, [r3]
 	bl	ftl_memset
-	ldr	r3, .L2994+24
+	ldr	r3, .L2980+24
 	ldrh	r0, [r6]
 	str	r4, [r7]
 	str	r4, [r3]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	r0, .L2966
+	cbz	r0, .L2952
 	bl	FtlMakeBbt
-.L2966:
-	ldr	r3, .L2994+28
-	ldr	r2, .L2994+32
-	ldr	ip, .L2994+124
+.L2952:
+	ldr	r3, .L2980+28
+	ldr	r2, .L2980+32
+	ldr	ip, .L2980+124
 	ldrh	r1, [r3]
 	ldr	r4, [r2]
-	ldr	r2, .L2994+36
+	ldr	r2, .L2980+36
 	str	r3, [sp, #12]
 	lsls	r1, r1, #7
 	ldr	r5, [r2]
 	movs	r2, #0
-.L2967:
+.L2953:
 	uxth	r3, r2
 	adds	r2, r2, #1
 	cmp	r3, r1
-	blt	.L2968
-	ldr	r3, .L2994+40
+	blt	.L2954
+	ldr	r3, .L2980+40
 	movs	r4, #0
-	ldr	r8, .L2994+128
+	ldr	r8, .L2980+128
 	ldrh	r5, [r3]
 	mov	r10, r8
 	str	r3, [sp]
-.L2969:
+.L2955:
 	ldrh	r3, [r8]
 	cmp	r3, r5
-	bhi	.L2970
-	ldr	r5, .L2994+44
+	bhi	.L2956
+	ldr	r5, .L2980+44
 	subs	r3, r4, #2
 	ldrh	r1, [r5]
 	cmp	r3, r1, lsl #1
-	ble	.L2971
+	ble	.L2957
 	mov	r0, r4
 	movs	r4, #0
 	bl	__aeabi_uidiv
-	ldr	r3, .L2994+48
+	ldr	r3, .L2980+48
 	ldr	r3, [r3]
 	add	r0, r0, r3
 	uxth	r0, r0
@@ -20409,34 +20293,34 @@ FtlLowFormat:
 	bl	FtlFreeSysBlkQueueInit
 	ldr	r3, [sp]
 	ldrh	r6, [r3]
-.L2972:
+.L2958:
 	ldrh	r3, [r10]
 	cmp	r3, r6
-	bhi	.L2973
-.L2971:
+	bhi	.L2959
+.L2957:
 	mov	r8, #0
 	mov	r6, r8
-.L2974:
+.L2960:
 	ldr	r3, [sp]
 	uxth	r0, r8
 	add	r8, r8, #1
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bhi	.L2975
+	bhi	.L2961
 	ldrh	r2, [r10]
-	ldr	r3, .L2994+52
+	ldr	r3, .L2980+52
 	ldrh	r5, [r5]
 	str	r2, [r3]
-	ldr	r3, .L2994+56
+	ldr	r3, .L2980+56
 	mov	r1, r5
 	ldr	r3, [r3]
 	mov	r0, r3
 	str	r3, [sp, #16]
 	bl	__aeabi_uidiv
-	ldr	r1, .L2994+60
+	ldr	r1, .L2980+60
 	mov	fp, r0
 	ubfx	r3, fp, #5, #16
-	ldr	r0, .L2994+64
+	ldr	r0, .L2980+64
 	add	r2, r3, #36
 	str	r3, [sp, #4]
 	strh	r2, [r1]	@ movhi
@@ -20446,7 +20330,7 @@ FtlLowFormat:
 	mov	r8, r0
 	str	r1, [sp, #8]
 	cmp	r6, r2
-	ble	.L2976
+	ble	.L2962
 	ldr	r3, [sp, #16]
 	mov	r1, r5
 	subs	r0, r3, r6
@@ -20456,12 +20340,12 @@ FtlLowFormat:
 	lsrs	r0, r0, #5
 	adds	r0, r0, #24
 	strh	r0, [r3]	@ movhi
-.L2976:
-	ldr	r3, .L2994+68
+.L2962:
+	ldr	r3, .L2980+68
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L2977
-	ldr	r2, .L2994+60
+	bne	.L2963
+	ldr	r2, .L2980+60
 	mov	r1, r5
 	mov	r0, r6
 	ldrh	r3, [r2]
@@ -20473,11 +20357,11 @@ FtlLowFormat:
 	uxtah	r0, r3, r0
 	add	r3, r3, r0, asr #2
 	strh	r3, [r2]	@ movhi
-.L2977:
-	ldr	r3, .L2994+72
+.L2963:
+	ldr	r3, .L2980+72
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2978
-	ldr	r2, .L2994+60
+	cbz	r3, .L2964
+	ldr	r2, .L2980+60
 	mov	r1, r5
 	mov	r0, r6
 	ldrh	r3, [r2]
@@ -20489,31 +20373,31 @@ FtlLowFormat:
 	uxtah	r0, r3, r0
 	add	r3, r3, r0, asr #2
 	strh	r3, [r2]	@ movhi
-.L2978:
-	ldr	r3, .L2994+76
+.L2964:
+	ldr	r3, .L2980+76
 	ldrh	r3, [r3]
-	cbz	r3, .L2980
-	ldr	r2, .L2994+60
+	cbz	r3, .L2966
+	ldr	r2, .L2980+60
 	ldrh	r1, [r2]
 	add	r1, r1, r3, lsr #1
 	strh	r1, [r2]	@ movhi
 	mul	r1, r5, r3
 	cmp	r6, r1
-	bge	.L2980
-	ldr	r1, .L2994+64
+	bge	.L2966
+	ldr	r1, .L2980+64
 	adds	r3, r3, #32
 	str	fp, [r1]
 	ldr	r1, [sp, #4]
 	add	r1, r1, r3
 	strh	r1, [r2]	@ movhi
-.L2980:
+.L2966:
 	ldr	r3, [sp, #8]
-	ldr	fp, .L2994+132
+	ldr	fp, .L2980+132
 	ldrh	r2, [r3]
 	ldr	r3, [r8]
 	subs	r3, r3, r2
 	muls	r5, r3, r5
-	ldr	r3, .L2994+80
+	ldr	r3, .L2980+80
 	ldrh	r3, [r3]
 	str	r5, [fp]
 	muls	r5, r3, r5
@@ -20521,37 +20405,37 @@ FtlLowFormat:
 	ldrh	r3, [r3]
 	str	r5, [r8]
 	muls	r5, r3, r5
-	ldr	r3, .L2994+84
+	ldr	r3, .L2980+84
 	str	r5, [r3]
 	bl	FtlBbmTblFlush
-	ldr	r3, .L2994+88
+	ldr	r3, .L2980+88
 	adds	r1, r4, r6
 	ldr	r2, [r3]
-	ldr	r3, .L2994+92
+	ldr	r3, .L2980+92
 	ldrh	r3, [r3]
 	add	r3, r3, r2, lsr #3
 	cmp	r1, r3
-	bls	.L2982
+	bls	.L2968
 	lsrs	r2, r2, #5
-	ldr	r0, .L2994+96
+	ldr	r0, .L2980+96
 	bl	printf
-.L2982:
+.L2968:
 	ldrh	r2, [r10]
 	movs	r1, #0
-	ldr	r5, .L2994+100
+	ldr	r5, .L2980+100
 	movw	r6, #65535
-	ldr	r4, .L2994+104
+	ldr	r4, .L2980+104
 	lsls	r2, r2, #1
 	ldr	r0, [r5]
 	mov	r8, r4
 	bl	ftl_memset
-	ldr	r2, .L2994+108
+	ldr	r2, .L2980+108
 	movs	r3, #0
 	strh	r3, [r4, #2]	@ movhi
 	movs	r1, #255
 	strb	r3, [r4, #6]
 	str	r3, [r2]
-	ldr	r2, .L2994+112
+	ldr	r2, .L2980+112
 	strh	r3, [r4]	@ movhi
 	strh	r3, [r2, #2]	@ movhi
 	strb	r3, [r2, #6]
@@ -20561,29 +20445,29 @@ FtlLowFormat:
 	ldr	r3, [sp]
 	strh	r6, [r2]	@ movhi
 	ldrh	r2, [r3]
-	ldr	r3, .L2994+116
+	ldr	r3, .L2980+116
 	lsrs	r2, r2, #3
 	ldr	r0, [r3]
 	bl	ftl_memset
-.L2983:
+.L2969:
 	mov	r0, r8
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r4]
-	cbnz	r3, .L2984
+	cbnz	r3, .L2970
 	ldr	r3, [r5]
 	strh	r6, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	b	.L2983
-.L2968:
+	b	.L2969
+.L2954:
 	mvns	r0, r3
 	orr	r0, r3, r0, lsl #16
 	str	r0, [r4, r3, lsl #2]
 	str	ip, [r5, r3, lsl #2]
-	b	.L2967
-.L2970:
+	b	.L2953
+.L2956:
 	mov	r0, r5
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
@@ -20591,8 +20475,8 @@ FtlLowFormat:
 	add	r4, r4, r0
 	uxth	r4, r4
 	uxth	r5, r5
-	b	.L2969
-.L2973:
+	b	.L2955
+.L2959:
 	mov	r0, r6
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
@@ -20600,14 +20484,14 @@ FtlLowFormat:
 	add	r4, r4, r0
 	uxth	r4, r4
 	uxth	r6, r6
-	b	.L2972
-.L2975:
+	b	.L2958
+.L2961:
 	movs	r1, #0
 	bl	FtlLowFormatEraseBlock
 	add	r6, r6, r0
 	uxth	r6, r6
-	b	.L2974
-.L2984:
+	b	.L2960
+.L2970:
 	ldr	r3, [r7]
 	movw	r6, #65535
 	ldrh	r1, [r4, #4]
@@ -20617,7 +20501,7 @@ FtlLowFormat:
 	ldr	r3, [r5]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
 	movs	r2, #0
-	ldr	r3, .L2994+120
+	ldr	r3, .L2980+120
 	strh	r2, [r3, #2]	@ movhi
 	mov	r8, r3
 	strb	r2, [r3, #6]
@@ -20627,22 +20511,22 @@ FtlLowFormat:
 	strh	r2, [r3]	@ movhi
 	movs	r2, #1
 	strb	r2, [r3, #8]
-.L2985:
+.L2971:
 	mov	r0, r8
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r4]
 	cmp	r3, #0
-	bne	.L2986
+	bne	.L2972
 	ldr	r3, [r5]
 	strh	r6, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	b	.L2985
-.L2995:
+	b	.L2971
+.L2981:
 	.align	2
-.L2994:
+.L2980:
 	.word	.LANCHOR78
 	.word	.LANCHOR66
 	.word	.LANCHOR203
@@ -20677,7 +20561,7 @@ FtlLowFormat:
 	.word	168778952
 	.word	.LANCHOR41
 	.word	.LANCHOR231
-.L2986:
+.L2972:
 	ldr	r3, [r7]
 	ldrh	r1, [r4, #4]
 	str	r3, [r4, #12]
@@ -20686,10 +20570,10 @@ FtlLowFormat:
 	movw	r4, #65535
 	ldr	r3, [r5]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L2996
+	ldr	r3, .L2982
 	strh	r4, [r3]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L2996+4
+	ldr	r3, .L2982+4
 	movs	r2, #0
 	strh	r2, [r3, #2]	@ movhi
 	ldr	r2, [fp]
@@ -20702,18 +20586,18 @@ FtlLowFormat:
 	str	r2, [r7]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	r0, .L2965
-	ldr	r3, .L2996+8
+	cbnz	r0, .L2951
+	ldr	r3, .L2982+8
 	movs	r2, #1
 	str	r2, [r3]
-.L2965:
+.L2951:
 	movs	r0, #0
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2997:
+.L2983:
 	.align	2
-.L2996:
+.L2982:
 	.word	.LANCHOR95
 	.word	.LANCHOR218
 	.word	.LANCHOR247
@@ -20730,26 +20614,26 @@ Ftl_gc_temp_data_write_back:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
-	ldr	r3, .L3013
+	ldr	r3, .L2999
 	ldr	r3, [r3]
-	cbz	r3, .L2999
-.L3002:
+	cbz	r3, .L2985
+.L2988:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L2999:
-	ldr	r3, .L3013+4
-	ldr	r5, .L3013+8
+.L2985:
+	ldr	r3, .L2999+4
+	ldr	r5, .L2999+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L3001
+	cbz	r3, .L2987
 	ldr	r3, [r5]
 	lsls	r2, r3, #31
-	bpl	.L3001
-	ldr	r3, .L3013+12
+	bpl	.L2987
+	ldr	r3, .L2999+12
 	ldrh	r3, [r3, #4]
 	cmp	r3, #0
-	bne	.L3002
-.L3001:
-	ldr	r4, .L3013+16
+	bne	.L2988
+.L2987:
+	ldr	r4, .L2999+16
 	movs	r3, #0
 	movs	r6, #0
 	movs	r7, #36
@@ -20757,23 +20641,23 @@ Ftl_gc_temp_data_write_back:
 	ldr	r1, [r5]
 	ldr	r0, [r4]
 	bl	FlashProgPages
-.L3003:
+.L2989:
 	ldr	r1, [r5]
 	uxth	r3, r6
 	cmp	r3, r1
-	bcc	.L3005
+	bcc	.L2991
 	ldr	r0, [r4]
 	bl	FtlGcBufFree
 	movs	r3, #0
 	str	r3, [r5]
-	ldr	r3, .L3013+12
+	ldr	r3, .L2999+12
 	ldrh	r3, [r3, #4]
 	cmp	r3, #0
-	bne	.L3002
+	bne	.L2988
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
-	b	.L3012
-.L3005:
+	b	.L2998
+.L2991:
 	muls	r3, r7, r3
 	ldr	r2, [r4]
 	adds	r6, r6, #1
@@ -20781,15 +20665,15 @@ Ftl_gc_temp_data_write_back:
 	ldr	r2, [r2, r3]
 	ldr	r0, [r1, #12]
 	adds	r3, r2, #1
-	bne	.L3004
-	ldr	r3, .L3013+12
+	bne	.L2990
+	ldr	r3, .L2999+12
 	movs	r5, #0
-	ldr	r0, .L3013+20
+	ldr	r0, .L2999+20
 	ldrh	r4, [r3]
 	ldr	r0, [r0]
 	strh	r5, [r0, r4, lsl #1]	@ movhi
 	strh	r2, [r3]	@ movhi
-	ldr	r2, .L3013+24
+	ldr	r2, .L2999+24
 	ldr	r0, [r1, #4]
 	ldr	r3, [r2, #96]
 	ubfx	r0, r0, #10, #16
@@ -20798,18 +20682,18 @@ Ftl_gc_temp_data_write_back:
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
 	bl	FtlGcPageVarInit
-.L3012:
+.L2998:
 	movs	r0, #1
 	pop	{r3, r4, r5, r6, r7, pc}
-.L3004:
+.L2990:
 	ldr	r2, [r0, #8]
 	ldr	r1, [r1, #4]
 	ldr	r0, [r0, #12]
 	bl	FtlGcUpdatePage
-	b	.L3003
-.L3014:
+	b	.L2989
+.L3000:
 	.align	2
-.L3013:
+.L2999:
 	.word	.LANCHOR78
 	.word	.LANCHOR16
 	.word	.LANCHOR105
@@ -20831,35 +20715,35 @@ Ftl_get_new_temp_ppa:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movw	r3, #65535
-	ldr	r4, .L3018
+	ldr	r4, .L3004
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	beq	.L3016
+	beq	.L3002
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L3017
-.L3016:
+	cbnz	r3, .L3003
+.L3002:
 	bl	FtlCacheWriteBack
 	movs	r0, #0
 	movs	r5, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r0, .L3018
+	ldr	r0, .L3004
 	strb	r5, [r4, #8]
 	bl	allocate_data_superblock
-	ldr	r3, .L3018+4
+	ldr	r3, .L3004+4
 	strh	r5, [r3]	@ movhi
-	ldr	r3, .L3018+8
+	ldr	r3, .L3004+8
 	strh	r5, [r3]	@ movhi
 	bl	l2p_flush
 	mov	r0, r5
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L3017:
-	ldr	r0, .L3018
+.L3003:
+	ldr	r0, .L3004
 	pop	{r3, r4, r5, lr}
 	b	get_new_active_ppa
-.L3019:
+.L3005:
 	.align	2
-.L3018:
+.L3004:
 	.word	.LANCHOR95
 	.word	.LANCHOR112
 	.word	.LANCHOR113
@@ -20875,39 +20759,39 @@ Ftl_get_new_temp_ppa:
 ftl_do_gc:
 	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L3120
+	ldr	r3, .L3106
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	lr, r0
 	sub	sp, sp, #32
 	ldr	r0, [r3]
 	cmp	r0, #0
-	bne	.L3079
-	ldr	r3, .L3120+4
+	bne	.L3065
+	ldr	r3, .L3106+4
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L3020
-	ldr	r3, .L3120+8
+	bne	.L3006
+	ldr	r3, .L3106+8
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L3020
-	ldr	r2, .L3120+12
+	bne	.L3006
+	ldr	r2, .L3106+12
 	ldrh	r2, [r2]
 	cmp	r2, #47
-	bls	.L3082
-	ldr	r5, .L3120+16
+	bls	.L3068
+	ldr	r5, .L3106+16
 	movw	r2, #65535
 	ldrh	ip, [r5]
 	cmp	ip, r2
-	beq	.L3022
-	ldr	r7, .L3120+20
+	beq	.L3008
+	ldr	r7, .L3106+20
 	ldrh	r3, [r7]
 	cmp	r3, r2
-	bne	.L3022
-	ldr	r1, .L3120+24
+	bne	.L3008
+	ldr	r1, .L3106+24
 	ldrh	r6, [r1]
 	cmp	r6, r3
-	beq	.L3022
-	ldr	r2, .L3120+28
+	beq	.L3008
+	ldr	r2, .L3106+28
 	ldrh	r4, [r2]
 	cmp	r4, r3
 	itttt	ne
@@ -20915,172 +20799,172 @@ ftl_do_gc:
 	strhne	r6, [r5]	@ movhi
 	strhne	r4, [r1]	@ movhi
 	strhne	r3, [r2]	@ movhi
-.L3022:
+.L3008:
 	cmp	lr, #0
-	bne	.L3083
-	ldr	r3, .L3120+32
+	bne	.L3069
+	ldr	r3, .L3106+32
 	ldrh	r3, [r3]
 	cmp	r3, #24
-	bhi	.L3084
-	ldr	r2, .L3120+36
+	bhi	.L3070
+	ldr	r2, .L3106+36
 	cmp	r3, #16
 	ldrh	r4, [r2]
-	bls	.L3025
+	bls	.L3011
 	lsrs	r4, r4, #5
-.L3024:
-	ldr	r2, .L3120+40
+.L3010:
+	ldr	r2, .L3106+40
 	ldrh	r1, [r2]
 	cmp	r1, r3
 	mov	r1, r2
-	bcs	.L3028
-	ldr	r3, .L3120+44
+	bcs	.L3014
+	ldr	r3, .L3106+44
 	movw	r0, #65535
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L3029
-	ldr	r0, .L3120+20
+	bne	.L3015
+	ldr	r0, .L3106+20
 	ldrh	r0, [r0]
 	cmp	r0, r3
-	bne	.L3029
-	ldr	r3, .L3120+48
+	bne	.L3015
+	ldr	r3, .L3106+48
 	ldrh	r0, [r3]
-	cbnz	r0, .L3030
-	ldr	r3, .L3120+52
-	ldr	r4, .L3120+56
+	cbnz	r0, .L3016
+	ldr	r3, .L3106+52
+	ldr	r4, .L3106+56
 	ldr	r3, [r3]
 	ldr	r4, [r4]
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, lsr #2
-	bcs	.L3031
-.L3030:
-	ldr	r3, .L3120+60
+	bcs	.L3017
+.L3016:
+	ldr	r3, .L3106+60
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r1]	@ movhi
-.L3032:
-	ldr	r3, .L3120+64
+.L3018:
+	ldr	r3, .L3106+64
 	movs	r2, #0
 	str	r2, [r3]
-.L3020:
+.L3006:
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3025:
+.L3011:
 	cmp	r3, #12
-	bls	.L3026
+	bls	.L3012
 	lsrs	r4, r4, #4
-	b	.L3024
-.L3026:
+	b	.L3010
+.L3012:
 	cmp	r3, #8
-	bls	.L3024
+	bls	.L3010
 	lsrs	r4, r4, #2
-	b	.L3024
-.L3084:
+	b	.L3010
+.L3070:
 	movs	r4, #1
-	b	.L3024
-.L3031:
+	b	.L3010
+.L3017:
 	movs	r3, #18
 	strh	r3, [r2]	@ movhi
-	b	.L3032
-.L3029:
-	ldr	r3, .L3120+60
+	b	.L3018
+.L3015:
+	ldr	r3, .L3106+60
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r1]	@ movhi
-.L3028:
-	ldr	r3, .L3120+68
+.L3014:
+	ldr	r3, .L3106+68
 	ldrh	r3, [r3]
-	cbz	r3, .L3023
+	cbz	r3, .L3009
 	adds	r4, r4, #32
 	uxth	r4, r4
-.L3023:
-	ldr	r5, .L3120+72
+.L3009:
+	ldr	r5, .L3106+72
 	movw	r3, #65535
 	ldrh	r2, [r5]
 	cmp	r2, r3
-	bne	.L3035
-	ldr	r3, .L3120+20
+	bne	.L3021
+	ldr	r3, .L3106+20
 	ldrh	r1, [r3]
 	cmp	r1, r2
-	beq	.L3036
-	ldr	r0, .L3120+76
+	beq	.L3022
+	ldr	r0, .L3106+76
 	ldr	r0, [r0]
 	ldrh	r1, [r0, r1, lsl #1]
-	cbnz	r1, .L3037
+	cbnz	r1, .L3023
 	strh	r2, [r3]	@ movhi
-.L3037:
+.L3023:
 	ldrh	r2, [r3]
 	strh	r2, [r5]	@ movhi
 	movw	r2, #65535
 	strh	r2, [r3]	@ movhi
-.L3036:
+.L3022:
 	ldrh	r0, [r5]
 	movw	r6, #65535
 	movs	r3, #0
 	strb	r3, [r5, #8]
 	cmp	r0, r6
-	beq	.L3035
+	beq	.L3021
 	bl	IsBlkInGcList
-	cbz	r0, .L3039
+	cbz	r0, .L3025
 	strh	r6, [r5]	@ movhi
-.L3039:
-	ldr	r3, .L3120+80
+.L3025:
+	ldr	r3, .L3106+80
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L3040
+	cbz	r3, .L3026
 	ldrh	r0, [r5]
 	bl	ftl_get_blk_mode
 	strb	r0, [r5, #8]
-.L3040:
+.L3026:
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L3035
-	ldr	r0, .L3120+72
+	beq	.L3021
+	ldr	r0, .L3106+72
 	bl	make_superblock
-	ldr	r2, .L3120+84
+	ldr	r2, .L3106+84
 	movs	r3, #0
 	strh	r3, [r5, #2]	@ movhi
 	strb	r3, [r5, #6]
 	strh	r3, [r2]	@ movhi
-	ldr	r3, .L3120+76
+	ldr	r3, .L3106+76
 	ldrh	r2, [r5]
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r2, lsl #1]
-	ldr	r3, .L3120+88
+	ldr	r3, .L3106+88
 	strh	r2, [r3]	@ movhi
-.L3035:
-	ldr	r2, .L3120+92
+.L3021:
+	ldr	r2, .L3106+92
 	ldrh	r3, [r5]
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L3041
-	ldr	r2, .L3120+96
+	beq	.L3027
+	ldr	r2, .L3106+96
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L3041
-	ldr	r2, .L3120+44
+	beq	.L3027
+	ldr	r2, .L3106+44
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bne	.L3042
-.L3041:
+	bne	.L3028
+.L3027:
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.L3042:
-	ldr	r5, .L3120+72
+.L3028:
+	ldr	r5, .L3106+72
 	mov	r6, r5
-.L3078:
+.L3064:
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L3043
-	ldr	r10, .L3120+104
+	bne	.L3029
+	ldr	r10, .L3106+104
 	movs	r2, #0
-	ldr	r3, .L3120+64
+	ldr	r3, .L3106+64
 	mov	r7, r10
 	str	r2, [r3]
-.L3044:
+.L3030:
 	ldrh	r8, [r10]
 	mov	r0, r8
 	bl	List_get_gc_head_node
@@ -21088,29 +20972,29 @@ ftl_do_gc:
 	movw	r3, #65535
 	cmp	fp, r3
 	strh	fp, [r6]	@ movhi
-	bne	.L3045
+	bne	.L3031
 	movs	r3, #0
 	movs	r0, #8
 	strh	r3, [r10]	@ movhi
-	b	.L3020
-.L3083:
+	b	.L3006
+.L3069:
 	movs	r4, #1
-	b	.L3023
-.L3045:
+	b	.L3009
+.L3031:
 	str	r0, [sp]
 	mov	r0, fp
 	bl	IsBlkInGcList
 	add	r3, r8, #1
 	ldr	r2, [sp]
-	cbz	r0, .L3046
+	cbz	r0, .L3032
 	strh	r3, [r10]	@ movhi
-	b	.L3044
-.L3046:
-	ldr	r1, .L3120+36
+	b	.L3030
+.L3032:
+	ldr	r1, .L3106+36
 	uxth	r3, r3
-	ldr	lr, .L3120+108
+	ldr	lr, .L3106+108
 	uxth	r2, r2
-	ldr	r8, .L3120+76
+	ldr	r8, .L3106+76
 	ldrh	r1, [r1]
 	ldrh	lr, [lr]
 	ldr	r0, [r8]
@@ -21118,45 +21002,45 @@ ftl_do_gc:
 	mul	r1, lr, r1
 	ldrh	ip, [r0, r2, lsl #1]
 	cmp	ip, r1, asr #1
-	bgt	.L3048
+	bgt	.L3034
 	cmp	r3, #48
-	bls	.L3049
+	bls	.L3035
 	cmp	ip, #8
-	bls	.L3049
-	ldr	r3, .L3120+100
+	bls	.L3035
+	ldr	r3, .L3106+100
 	ldrh	r3, [r3]
 	cmp	r3, #35
-	bhi	.L3049
-.L3048:
+	bhi	.L3035
+.L3034:
 	movs	r3, #0
 	strh	r3, [r7]	@ movhi
-.L3049:
+.L3035:
 	ldrh	r3, [r0, r2, lsl #1]
 	cmp	r1, r3
-	bgt	.L3050
+	bgt	.L3036
 	ldrh	r2, [r7]
 	cmp	r2, #3
-	bhi	.L3050
+	bhi	.L3036
 	movw	r3, #65535
 	strh	r3, [r6]	@ movhi
 	movs	r3, #0
 	strh	r3, [r7]	@ movhi
-.L3119:
-	ldr	r3, .L3120+48
+.L3105:
+	ldr	r3, .L3106+48
 	ldrh	r0, [r3]
-	b	.L3020
-.L3050:
+	b	.L3006
+.L3036:
 	cmp	r3, #0
-	bne	.L3051
+	bne	.L3037
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	ldrh	r3, [r7]
 	adds	r3, r3, #1
 	strh	r3, [r7]	@ movhi
-	b	.L3044
-.L3121:
+	b	.L3030
+.L3107:
 	.align	2
-.L3120:
+.L3106:
 	.word	.LANCHOR78
 	.word	.LANCHOR247
 	.word	.LANCHOR176
@@ -21185,86 +21069,86 @@ ftl_do_gc:
 	.word	.LANCHOR112
 	.word	.LANCHOR183
 	.word	.LANCHOR38
-.L3051:
+.L3037:
 	movs	r3, #0
 	strb	r3, [r6, #8]
-	ldr	r3, .L3122
+	ldr	r3, .L3108
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L3052
+	cbz	r3, .L3038
 	mov	r0, fp
 	bl	ftl_get_blk_mode
 	strb	r0, [r6, #8]
-.L3052:
-	ldr	r3, .L3122+4
+.L3038:
+	ldr	r3, .L3108+4
 	ldrh	r3, [r3]
 	cmp	r3, fp
-	bne	.L3053
-	ldr	r1, .L3122+8
+	bne	.L3039
+	ldr	r1, .L3108+8
 	movw	r2, #1069
-	ldr	r0, .L3122+12
+	ldr	r0, .L3108+12
 	bl	printf
-	ldr	r1, .L3122+16
-	ldr	r0, .L3122+20
+	ldr	r1, .L3108+16
+	ldr	r0, .L3108+20
 	bl	printf
-.L3053:
-	ldr	r3, .L3122+24
+.L3039:
+	ldr	r3, .L3108+24
 	ldrh	r2, [r6]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L3054
-	ldr	r1, .L3122+8
+	bne	.L3040
+	ldr	r1, .L3108+8
 	movw	r2, #1070
-	ldr	r0, .L3122+12
+	ldr	r0, .L3108+12
 	bl	printf
-	ldr	r1, .L3122+16
-	ldr	r0, .L3122+20
+	ldr	r1, .L3108+16
+	ldr	r0, .L3108+20
 	bl	printf
-.L3054:
-	ldr	r3, .L3122+28
+.L3040:
+	ldr	r3, .L3108+28
 	ldrh	r2, [r6]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L3055
-	ldr	r1, .L3122+8
+	bne	.L3041
+	ldr	r1, .L3108+8
 	movw	r2, #1071
-	ldr	r0, .L3122+12
+	ldr	r0, .L3108+12
 	bl	printf
-	ldr	r1, .L3122+16
-	ldr	r0, .L3122+20
+	ldr	r1, .L3108+16
+	ldr	r0, .L3108+20
 	bl	printf
-.L3055:
+.L3041:
 	mov	r0, r5
 	bl	make_superblock
-	ldr	r2, .L3122+32
+	ldr	r2, .L3108+32
 	movs	r3, #0
 	ldrh	r1, [r6]
 	strh	r3, [r2]	@ movhi
 	ldr	r2, [r8]
 	ldrh	r1, [r2, r1, lsl #1]
-	ldr	r2, .L3122+36
+	ldr	r2, .L3108+36
 	strh	r3, [r6, #2]	@ movhi
 	strb	r3, [r6, #6]
 	strh	r1, [r2]	@ movhi
-.L3043:
-	ldr	r3, .L3122+40
+.L3029:
+	ldr	r3, .L3108+40
 	movs	r2, #1
 	str	r2, [r3]
-	ldr	r3, .L3122+44
+	ldr	r3, .L3108+44
 	ldrh	r3, [r3]
 	str	r3, [sp, #4]
-	ldr	r3, .L3122
+	ldr	r3, .L3108
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L3056
+	cbz	r3, .L3042
 	ldrb	r3, [r6, #8]	@ zero_extendqisi2
 	cmp	r3, r2
 	ittt	eq
-	ldreq	r3, .L3122+48
+	ldreq	r3, .L3108+48
 	ldrheq	r3, [r3]
 	streq	r3, [sp, #4]
-.L3056:
+.L3042:
 	ldrh	r3, [r6, #2]
 	ldr	r1, [sp, #4]
-	ldr	fp, .L3122+76
+	ldr	fp, .L3108+76
 	adds	r2, r3, r4
 	cmp	r2, r1
 	itt	gt
@@ -21274,11 +21158,11 @@ ftl_do_gc:
 	it	gt
 	uxthgt	r4, r4
 	str	r3, [sp, #12]
-.L3058:
+.L3044:
 	ldrh	r3, [sp, #12]
 	cmp	r4, r3
-	bls	.L3066
-	ldr	r3, .L3122+52
+	bls	.L3052
+	ldr	r3, .L3108+52
 	movw	r8, #65535
 	ldrh	lr, [r5, #2]
 	mov	r10, #36
@@ -21286,17 +21170,17 @@ ftl_do_gc:
 	ldrh	r7, [r3]
 	ldr	r3, [sp, #12]
 	add	lr, lr, r3
-	ldr	r3, .L3122+56
+	ldr	r3, .L3108+56
 	str	r3, [sp, #8]
 	movs	r3, #0
 	str	r3, [sp]
-	b	.L3067
-.L3060:
+	b	.L3053
+.L3046:
 	ldr	r1, [sp, #8]
 	ldrh	r2, [r1, #2]!
 	cmp	r2, r8
 	str	r1, [sp, #8]
-	beq	.L3059
+	beq	.L3045
 	ldr	r1, [sp]
 	orr	r2, lr, r2, lsl #10
 	mla	ip, r10, r1, r0
@@ -21305,27 +21189,27 @@ ftl_do_gc:
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r2, [sp]
-.L3059:
+.L3045:
 	adds	r3, r3, #1
-.L3067:
+.L3053:
 	uxth	r2, r3
 	cmp	r7, r2
-	bhi	.L3060
+	bhi	.L3046
 	ldrb	r2, [r5, #8]	@ zero_extendqisi2
 	ldr	r1, [sp]
 	bl	FlashReadPages
 	movs	r3, #0
-.L3118:
+.L3104:
 	str	r3, [sp, #8]
 	ldr	r2, [sp]
 	ldrh	r3, [sp, #8]
 	cmp	r2, r3
-	bhi	.L3065
+	bhi	.L3051
 	ldr	r3, [sp, #12]
 	adds	r3, r3, #1
 	str	r3, [sp, #12]
-	b	.L3058
-.L3065:
+	b	.L3044
+.L3051:
 	ldr	r3, [sp, #8]
 	movs	r7, #36
 	muls	r7, r3, r7
@@ -21333,23 +21217,23 @@ ftl_do_gc:
 	adds	r2, r3, r7
 	ldr	r3, [r3, r7]
 	adds	r3, r3, #1
-	beq	.L3062
+	beq	.L3048
 	ldr	r8, [r2, #12]
 	movw	r3, #61589
 	ldrh	r2, [r8]
 	cmp	r2, r3
-	bne	.L3062
+	bne	.L3048
 	ldr	r10, [r8, #8]
 	cmp	r10, #-1
-	bne	.L3063
-	ldr	r1, .L3122+8
+	bne	.L3049
+	ldr	r1, .L3108+8
 	movw	r2, #1119
-	ldr	r0, .L3122+12
+	ldr	r0, .L3108+12
 	bl	printf
-	ldr	r1, .L3122+16
-	ldr	r0, .L3122+20
+	ldr	r1, .L3108+16
+	ldr	r0, .L3108+20
 	bl	printf
-.L3063:
+.L3049:
 	movs	r2, #0
 	add	r1, sp, #24
 	mov	r0, r10
@@ -21360,10 +21244,10 @@ ftl_do_gc:
 	ldr	r2, [r0, #4]
 	bic	r3, r3, #-2147483648
 	cmp	r3, r2
-	bne	.L3062
-	ldr	r2, .L3122+32
-	ldr	r1, .L3122+60
-	ldr	r10, .L3122+72
+	bne	.L3048
+	ldr	r2, .L3108+32
+	ldr	r1, .L3108+60
+	ldr	r10, .L3108+72
 	ldrh	r3, [r2]
 	str	r1, [sp, #20]
 	adds	r3, r3, #1
@@ -21385,7 +21269,7 @@ ftl_do_gc:
 	ldr	r0, [fp]
 	mla	r2, r1, r3, r2
 	add	r0, r0, r7
-	ldr	r7, .L3122+28
+	ldr	r7, .L3108+28
 	ldr	r1, [r0, #8]
 	adds	r3, r3, #1
 	str	r1, [r2, #8]
@@ -21396,55 +21280,55 @@ ftl_do_gc:
 	str	r2, [r8, #12]
 	ldrh	r2, [r7]
 	strh	r2, [r8, #2]	@ movhi
-	ldr	r2, .L3122+64
+	ldr	r2, .L3108+64
 	str	r3, [r10]
 	ldr	r2, [r2]
 	str	r2, [r8, #4]
 	bl	FtlGcBufAlloc
-	ldr	r3, .L3122
+	ldr	r3, .L3108
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L3064
+	cbnz	r3, .L3050
 	ldrb	r2, [r7, #7]	@ zero_extendqisi2
 	ldr	r3, [r10]
 	cmp	r2, r3
-	beq	.L3064
+	beq	.L3050
 	ldrh	r3, [r7, #4]
-	cbnz	r3, .L3062
-.L3064:
+	cbnz	r3, .L3048
+.L3050:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	r0, .L3062
-	ldr	r3, .L3122+40
+	cbz	r0, .L3048
+	ldr	r3, .L3108+40
 	movs	r2, #0
 	movw	r1, #65535
 	str	r2, [r3]
-	ldr	r3, .L3122+68
+	ldr	r3, .L3108+68
 	strh	r1, [r3]	@ movhi
 	strh	r2, [r3, #2]	@ movhi
-	b	.L3119
-.L3062:
+	b	.L3105
+.L3048:
 	ldr	r3, [sp, #8]
 	adds	r3, r3, #1
-	b	.L3118
-.L3066:
+	b	.L3104
+.L3052:
 	ldrh	r3, [r5, #2]
 	add	r4, r4, r3
 	ldr	r3, [sp, #4]
 	uxth	r4, r4
 	cmp	r3, r4
 	strh	r4, [r5, #2]	@ movhi
-	bhi	.L3068
-	ldr	r3, .L3122+72
+	bhi	.L3054
+	ldr	r3, .L3108+72
 	ldr	r3, [r3]
-	cbz	r3, .L3069
+	cbz	r3, .L3055
 	bl	Ftl_gc_temp_data_write_back
-	cbz	r0, .L3069
-	ldr	r3, .L3122+40
+	cbz	r0, .L3055
+	ldr	r3, .L3108+40
 	movs	r2, #0
 	str	r2, [r3]
-	b	.L3119
-.L3123:
+	b	.L3105
+.L3109:
 	.align	2
-.L3122:
+.L3108:
 	.word	.LANCHOR16
 	.word	.LANCHOR93
 	.word	.LANCHOR251
@@ -21465,36 +21349,36 @@ ftl_do_gc:
 	.word	.LANCHOR213
 	.word	.LANCHOR105
 	.word	.LANCHOR109
-.L3069:
-	ldr	r3, .L3124
+.L3055:
+	ldr	r3, .L3110
 	ldrh	r7, [r3]
-	cbnz	r7, .L3070
-	ldr	r8, .L3124+20
+	cbnz	r7, .L3056
+	ldr	r8, .L3110+20
 	ldrh	r2, [r5]
 	ldr	r3, [r8]
 	ldrh	r3, [r3, r2, lsl #1]
-	cbz	r3, .L3070
-	ldr	r4, .L3124+4
-.L3071:
+	cbz	r3, .L3056
+	ldr	r4, .L3110+4
+.L3057:
 	ldr	r3, [r4]
 	cmp	r7, r3
-	bcs	.L3076
+	bcs	.L3062
 	movs	r2, #0
 	add	r1, sp, #28
 	mov	r0, r7
 	bl	log2phys
 	ldr	r0, [sp, #28]
 	adds	r3, r0, #1
-	beq	.L3072
+	beq	.L3058
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r5]
 	cmp	r3, r0
-	bne	.L3072
-.L3076:
+	bne	.L3058
+.L3062:
 	ldr	r3, [r4]
 	cmp	r7, r3
-	bcc	.L3070
+	bcc	.L3056
 	ldrh	r2, [r5]
 	movs	r1, #0
 	ldr	r3, [r8]
@@ -21504,35 +21388,35 @@ ftl_do_gc:
 	bl	FtlCacheWriteBack
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L3070:
+.L3056:
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.L3068:
-	ldr	r3, .L3124+8
+.L3054:
+	ldr	r3, .L3110+8
 	ldrh	r0, [r3]
 	cmp	r0, #2
-	bhi	.L3077
-	ldr	r3, .L3124+12
+	bhi	.L3063
+	ldr	r3, .L3110+12
 	ldrh	r4, [r3]
-	b	.L3078
-.L3072:
+	b	.L3064
+.L3058:
 	adds	r7, r7, #1
-	b	.L3071
-.L3077:
-	ldr	r3, .L3124+16
+	b	.L3057
+.L3063:
+	ldr	r3, .L3110+16
 	movs	r2, #0
 	adds	r0, r0, #1
 	str	r2, [r3]
-	b	.L3020
-.L3079:
+	b	.L3006
+.L3065:
 	movs	r0, #0
-	b	.L3020
-.L3082:
+	b	.L3006
+.L3068:
 	mov	r0, r3
-	b	.L3020
-.L3125:
+	b	.L3006
+.L3111:
 	.align	2
-.L3124:
+.L3110:
 	.word	.LANCHOR249
 	.word	.LANCHOR74
 	.word	.LANCHOR90
@@ -21552,76 +21436,76 @@ FtlCacheWriteBack:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L3168
+	ldr	r3, .L3154
 	ldr	r10, [r3]
 	str	r3, [sp]
 	cmp	r10, #0
-	bne	.L3128
-	ldr	r3, .L3168+4
+	bne	.L3114
+	ldr	r3, .L3154+4
 	ldr	r1, [r3]
 	mov	r8, r3
-	cbz	r1, .L3128
-	ldr	r3, .L3168+8
+	cbz	r1, .L3114
+	ldr	r3, .L3154+8
 	ldr	r4, [r3]
-	ldr	r3, .L3168+12
+	ldr	r3, .L3154+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L3153
+	cbz	r3, .L3139
 	ldrb	r7, [r4, #8]	@ zero_extendqisi2
 	subs	r0, r7, #1
 	rsbs	r7, r0, #0
 	adcs	r7, r7, r0
-.L3130:
-	ldr	r5, .L3168+16
+.L3116:
+	ldr	r5, .L3154+16
 	movs	r6, #0
-	ldr	fp, .L3168+36
+	ldr	fp, .L3154+36
 	mov	r2, r7
 	ldrb	r3, [r4, #9]	@ zero_extendqisi2
 	ldr	r0, [r5]
 	bl	FlashProgPages
-.L3131:
+.L3117:
 	ldr	r3, [r8]
 	cmp	r6, r3
-	bcc	.L3138
-.L3150:
+	bcc	.L3124
+.L3136:
 	movs	r3, #0
 	str	r3, [r8]
-.L3128:
+.L3114:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3153:
+.L3139:
 	mov	r7, r10
-	b	.L3130
-.L3138:
+	b	.L3116
+.L3124:
 	movs	r3, #36
 	ldr	r2, [r5]
 	muls	r3, r6, r3
 	adds	r0, r2, r3
 	ldr	r2, [r2, r3]
 	adds	r2, r2, #1
-	bne	.L3132
-	ldr	fp, .L3168+36
-.L3133:
+	bne	.L3118
+	ldr	fp, .L3154+36
+.L3119:
 	ldr	r3, [r8]
 	cmp	r10, r3
-	bcc	.L3148
-	ldr	r5, .L3168+20
+	bcc	.L3134
+	ldr	r5, .L3154+20
 	movw	r4, #16386
-.L3151:
+.L3137:
 	ldrh	r3, [r5]
 	cmp	r3, #0
-	beq	.L3150
+	beq	.L3136
 	movs	r1, #1
 	mov	r0, r1
 	bl	ftl_do_gc
 	subs	r4, r4, #1
-	bne	.L3151
-	b	.L3150
-.L3132:
+	bne	.L3137
+	b	.L3136
+.L3118:
 	ldr	r2, [r0, #4]
-	cbnz	r7, .L3134
-.L3166:
+	cbnz	r7, .L3120
+.L3152:
 	str	r2, [sp, #12]
 	add	r1, sp, #12
 	movs	r2, #1
@@ -21634,43 +21518,43 @@ FtlCacheWriteBack:
 	ldr	r3, [r3, #12]
 	ldr	r0, [r3, #12]
 	adds	r2, r0, #1
-	beq	.L3136
+	beq	.L3122
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldr	r2, [fp]
 	mov	r3, r0
 	ldrh	r2, [r2, r0, lsl #1]
-	cbnz	r2, .L3137
+	cbnz	r2, .L3123
 	mov	r1, r0
 	str	r0, [sp, #4]
-	ldr	r0, .L3168+24
+	ldr	r0, .L3154+24
 	bl	printf
 	ldr	r3, [sp, #4]
-.L3137:
+.L3123:
 	mov	r0, r3
 	bl	decrement_vpc_count
-.L3136:
+.L3122:
 	adds	r6, r6, #1
-	b	.L3131
-.L3134:
+	b	.L3117
+.L3120:
 	orr	r2, r2, #-2147483648
-	b	.L3166
-.L3148:
+	b	.L3152
+.L3134:
 	movs	r6, #36
 	ldr	r3, [r5]
 	mul	r6, r6, r10
 	mov	r2, #-1
 	str	r2, [r3, r6]
-.L3139:
+.L3125:
 	ldr	r2, [r5]
 	adds	r3, r2, r6
 	ldr	r2, [r2, r6]
 	ldr	r0, [r3, #4]
 	adds	r2, r2, #1
-	beq	.L3143
+	beq	.L3129
 	cmp	r7, #0
-	bne	.L3144
-.L3167:
+	bne	.L3130
+.L3153:
 	str	r0, [sp, #12]
 	movs	r2, #1
 	ldr	r0, [r3, #16]
@@ -21681,46 +21565,46 @@ FtlCacheWriteBack:
 	ldr	r3, [r6, #12]
 	ldr	r0, [r3, #12]
 	adds	r3, r0, #1
-	beq	.L3146
+	beq	.L3132
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldr	r3, [fp]
 	mov	r6, r0
 	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L3147
+	cbnz	r2, .L3133
 	mov	r1, r0
-	ldr	r0, .L3168+24
+	ldr	r0, .L3154+24
 	bl	printf
-.L3147:
+.L3133:
 	mov	r0, r6
 	bl	decrement_vpc_count
-.L3146:
+.L3132:
 	add	r10, r10, #1
-	b	.L3133
-.L3143:
+	b	.L3119
+.L3129:
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r4]
 	cmp	r3, r0
-	bne	.L3140
+	bne	.L3126
 	ldr	r1, [fp]
 	ldrh	r0, [r4, #4]
 	ldrh	r2, [r1, r3, lsl #1]
 	subs	r2, r2, r0
 	strh	r2, [r1, r3, lsl #1]	@ movhi
-	ldr	r3, .L3168+28
+	ldr	r3, .L3154+28
 	ldrh	r3, [r3]
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [r4, #6]
 	strh	r3, [r4, #4]	@ movhi
-.L3140:
+.L3126:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L3141
+	cbnz	r3, .L3127
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-.L3141:
-	ldr	r2, .L3168+32
+.L3127:
+	ldr	r2, .L3154+32
 	ldr	r3, [r2, #96]
 	adds	r3, r3, #1
 	str	r3, [r2, #96]
@@ -21750,14 +21634,14 @@ FtlCacheWriteBack:
 	ldr	r3, [sp]
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L3139
-	b	.L3128
-.L3144:
+	beq	.L3125
+	b	.L3114
+.L3130:
 	orr	r0, r0, #-2147483648
-	b	.L3167
-.L3169:
+	b	.L3153
+.L3155:
 	.align	2
-.L3168:
+.L3154:
 	.word	.LANCHOR78
 	.word	.LANCHOR72
 	.word	.LANCHOR252
@@ -21780,25 +21664,25 @@ FtlCacheWriteBack:
 FtlSysFlush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L3172
+	ldr	r3, .L3158
 	push	{r4, lr}
 	ldr	r3, [r3]
-	cbnz	r3, .L3171
-	ldr	r3, .L3172+4
+	cbnz	r3, .L3157
+	ldr	r3, .L3158+4
 	ldr	r4, [r3]
 	cmp	r4, #1
-	bne	.L3171
+	bne	.L3157
 	bl	FtlCacheWriteBack
 	bl	l2p_flush
 	mov	r0, r4
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L3171:
+.L3157:
 	movs	r0, #0
 	pop	{r4, pc}
-.L3173:
+.L3159:
 	.align	2
-.L3172:
+.L3158:
 	.word	.LANCHOR78
 	.word	.LANCHOR247
 	.size	FtlSysFlush, .-FtlSysFlush
@@ -21814,17 +21698,17 @@ FtlDeInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L3176
+	ldr	r3, .L3162
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L3175
+	bne	.L3161
 	bl	FtlSysFlush
-.L3175:
+.L3161:
 	movs	r0, #0
 	pop	{r3, pc}
-.L3177:
+.L3163:
 	.align	2
-.L3176:
+.L3162:
 	.word	.LANCHOR247
 	.size	FtlDeInit, .-FtlDeInit
 	.section	.text.ftl_deinit,"ax",%progbits
@@ -21886,32 +21770,32 @@ ftl_cache_flush:
 ftl_discard:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L3198
+	ldr	r3, .L3184
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r6, r1
 	mov	r4, r2
 	ldr	r3, [r3]
 	cmp	r3, r1
-	bls	.L3191
+	bls	.L3177
 	cmp	r3, r2
-	bcc	.L3191
+	bcc	.L3177
 	adds	r2, r1, r2
 	cmp	r3, r2
-	bcc	.L3191
+	bcc	.L3177
 	cmp	r4, #31
-	bhi	.L3183
-.L3184:
+	bhi	.L3169
+.L3170:
 	movs	r0, #0
-.L3181:
+.L3167:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L3183:
-	ldr	r3, .L3198+4
+.L3169:
+	ldr	r3, .L3184+4
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L3184
-	ldr	r8, .L3198+16
+	bne	.L3170
+	ldr	r8, .L3184+16
 	bl	FtlCacheWriteBack
 	mov	r0, r6
 	ldrh	r5, [r8]
@@ -21921,7 +21805,7 @@ ftl_discard:
 	mov	r7, r0
 	subs	r6, r6, r3
 	uxth	r6, r6
-	cbz	r6, .L3185
+	cbz	r6, .L3171
 	subs	r5, r5, r6
 	adds	r7, r7, #1
 	cmp	r5, r4
@@ -21929,32 +21813,32 @@ ftl_discard:
 	movcs	r5, r4
 	uxth	r5, r5
 	subs	r4, r4, r5
-.L3185:
-	ldr	r5, .L3198+8
+.L3171:
+	ldr	r5, .L3184+8
 	mov	r3, #-1
-	ldr	r6, .L3198+12
+	ldr	r6, .L3184+12
 	str	r3, [sp, #4]
-.L3186:
+.L3172:
 	ldrh	r3, [r8]
 	cmp	r4, r3
-	bcs	.L3188
-	ldr	r3, .L3198+8
+	bcs	.L3174
+	ldr	r3, .L3184+8
 	ldr	r2, [r3]
 	cmp	r2, #32
-	bls	.L3184
+	bls	.L3170
 	movs	r4, #0
 	str	r4, [r3]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L3184
-.L3188:
+	b	.L3170
+.L3174:
 	movs	r2, #0
 	mov	r1, sp
 	mov	r0, r7
 	bl	log2phys
 	ldr	r3, [sp]
 	adds	r3, r3, #1
-	beq	.L3187
+	beq	.L3173
 	ldr	r3, [r5]
 	movs	r2, #1
 	add	r1, sp, #4
@@ -21969,17 +21853,17 @@ ftl_discard:
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L3187:
+.L3173:
 	ldrh	r3, [r8]
 	adds	r7, r7, #1
 	subs	r4, r4, r3
-	b	.L3186
-.L3191:
+	b	.L3172
+.L3177:
 	mov	r0, #-1
-	b	.L3181
-.L3199:
+	b	.L3167
+.L3185:
 	.align	2
-.L3198:
+.L3184:
 	.word	.LANCHOR68
 	.word	.LANCHOR78
 	.word	.LANCHOR253
@@ -22001,36 +21885,36 @@ FtlRead:
 	sub	sp, sp, #88
 	str	r3, [sp, #24]
 	mov	r4, r1
-	ldr	r3, .L3245
+	ldr	r3, .L3231
 	str	r2, [sp, #44]
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L3227
+	bne	.L3213
 	cmp	r0, #16
-	bne	.L3202
+	bne	.L3188
 	ldr	r2, [sp, #24]
 	add	r0, r4, #256
 	ldr	r1, [sp, #44]
 	bl	FtlVendorPartRead
 	mov	r7, r0
-.L3200:
+.L3186:
 	mov	r0, r7
 	add	sp, sp, #88
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3202:
-	ldr	r3, .L3245+4
+.L3188:
+	ldr	r3, .L3231+4
 	ldr	r3, [r3]
 	cmp	r1, r3
-	bcs	.L3227
+	bcs	.L3213
 	ldr	r2, [sp, #44]
 	cmp	r2, r3
-	bhi	.L3227
+	bhi	.L3213
 	adds	r2, r1, r2
 	cmp	r3, r2
 	str	r2, [sp, #48]
-	bcc	.L3227
-	ldr	r3, .L3245+8
+	bcc	.L3213
+	ldr	r3, .L3231+8
 	mov	r0, r4
 	ldrh	r5, [r3]
 	mov	r1, r5
@@ -22041,7 +21925,7 @@ FtlRead:
 	subs	r0, r3, #1
 	bl	__aeabi_uidiv
 	ldr	r3, [sp, #36]
-	ldr	r2, .L3245+12
+	ldr	r2, .L3231+12
 	ldr	r1, [sp, #44]
 	rsb	r3, r3, #1
 	str	r0, [sp, #40]
@@ -22051,61 +21935,61 @@ FtlRead:
 	add	r3, r3, r1
 	ldr	r1, [sp, #32]
 	str	r3, [r2]
-	ldr	r2, .L3245+16
+	ldr	r2, .L3231+16
 	ldr	r3, [r2]
 	add	r3, r3, r1
 	mov	r1, r0
 	ldr	r0, [sp, #36]
 	str	r3, [r2]
 	bl	FtlCacheMetchLpa
-	cbz	r0, .L3203
+	cbz	r0, .L3189
 	bl	FtlCacheWriteBack
-.L3203:
+.L3189:
 	ldr	r5, [sp, #36]
 	movs	r3, #0
-	ldr	r10, .L3245+60
+	ldr	r10, .L3231+60
 	mov	r6, r3
 	mov	r7, r3
 	str	r3, [sp, #28]
 	str	r3, [sp, #52]
-.L3204:
+.L3190:
 	ldr	r3, [sp, #32]
-	cbnz	r3, .L3223
-	ldr	r3, .L3245+20
+	cbnz	r3, .L3209
+	ldr	r3, .L3231+20
 	ldrh	r3, [r3]
 	cmp	r3, #0
-	beq	.L3200
+	beq	.L3186
 	movs	r1, #1
 	ldr	r0, [sp, #32]
 	bl	ftl_do_gc
-	b	.L3200
-.L3223:
+	b	.L3186
+.L3209:
 	movs	r2, #0
 	add	r1, sp, #84
 	mov	r0, r5
 	bl	log2phys
 	ldr	r3, [sp, #84]
 	adds	r2, r3, #1
-	bne	.L3205
-	ldr	fp, .L3245+8
+	bne	.L3191
+	ldr	fp, .L3231+8
 	mov	r8, #0
-.L3206:
+.L3192:
 	ldrh	r0, [fp]
 	cmp	r8, r0
-	bcc	.L3208
-.L3209:
+	bcc	.L3194
+.L3195:
 	ldr	r3, [sp, #32]
 	adds	r5, r5, #1
 	subs	r3, r3, #1
 	str	r3, [sp, #32]
-	beq	.L3213
-	ldr	r3, .L3245+24
+	beq	.L3199
+	ldr	r3, .L3231+24
 	ldrh	r3, [r3]
 	cmp	r6, r3, lsl #2
-	bne	.L3204
-.L3213:
+	bne	.L3190
+.L3199:
 	cmp	r6, #0
-	beq	.L3204
+	beq	.L3190
 	movs	r2, #0
 	mov	r1, r6
 	ldr	r0, [r10]
@@ -22120,7 +22004,7 @@ FtlRead:
 	ldr	r3, [sp, #52]
 	lsls	r3, r3, #9
 	str	r3, [sp, #64]
-.L3222:
+.L3208:
 	mov	r8, #36
 	ldr	r3, [r10]
 	mul	r8, r8, fp
@@ -22128,36 +22012,36 @@ FtlRead:
 	add	r3, r3, r8
 	ldr	r2, [r3, #16]
 	cmp	r1, r2
-	bne	.L3215
+	bne	.L3201
 	ldr	r1, [r3, #8]
-	ldr	r3, .L3245+28
+	ldr	r3, .L3231+28
 	ldr	r3, [r3]
 	cmp	r1, r3
-	bne	.L3216
+	bne	.L3202
 	ldr	r3, [sp, #60]
 	ldr	r2, [sp, #64]
 	ldr	r0, [sp, #24]
 	add	r1, r1, r3
-.L3244:
+.L3230:
 	bl	ftl_memcpy
-.L3216:
+.L3202:
 	ldr	r3, [r10]
 	ldr	r1, [r3, r8]
 	add	r2, r3, r8
 	adds	r3, r1, #1
-	bne	.L3217
-	ldr	r0, .L3245+32
+	bne	.L3203
+	ldr	r0, .L3231+32
 	mov	r7, r1
 	ldr	r3, [r0, #72]
 	adds	r3, r3, #1
 	str	r3, [r0, #72]
-.L3217:
+.L3203:
 	ldr	r3, [r2, #12]
 	ldr	lr, [r2, #16]
 	ldr	r0, [r3, #8]
 	cmp	lr, r0
-	beq	.L3218
-	ldr	ip, .L3245+32
+	beq	.L3204
+	ldr	ip, .L3231+32
 	ldr	r0, [ip, #72]
 	adds	r0, r0, #1
 	str	r0, [ip, #72]
@@ -22173,24 +22057,24 @@ FtlRead:
 	str	r0, [sp, #4]
 	ldr	r0, [r3, #4]
 	str	r0, [sp]
-	ldr	r0, .L3245+36
+	ldr	r0, .L3231+36
 	ldr	r3, [r3]
 	ldr	r2, [r2, #4]
 	bl	printf
-.L3218:
+.L3204:
 	ldr	r3, [r10]
 	add	r2, r3, r8
 	ldr	r3, [r3, r8]
 	cmp	r3, #256
-	bne	.L3219
+	bne	.L3205
 	ldr	r0, [r2, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	mov	r8, r0
 	bl	FtlGcRefreshBlock
-	ldr	r2, .L3245+40
-	ldr	r3, .L3245+44
-.L3221:
+	ldr	r2, .L3231+40
+	ldr	r3, .L3231+44
+.L3207:
 	movs	r1, #1
 	str	r2, [sp, #72]
 	mov	r0, r1
@@ -22198,45 +22082,45 @@ FtlRead:
 	bl	ftl_do_gc
 	ldr	r2, [sp, #72]
 	ldr	r1, [r2]
-	cbnz	r1, .L3220
+	cbnz	r1, .L3206
 	ldr	r3, [sp, #76]
 	ldrh	r1, [r3]
 	cmp	r1, r8
-	beq	.L3221
-.L3220:
+	beq	.L3207
+.L3206:
 	bl	FtlSysFlush
-.L3219:
+.L3205:
 	add	fp, fp, #1
 	cmp	r6, fp
-	bne	.L3222
+	bne	.L3208
 	movs	r6, #0
-	b	.L3204
-.L3208:
+	b	.L3190
+.L3194:
 	mla	r0, r0, r5, r8
 	cmp	r4, r0
-	bhi	.L3207
+	bhi	.L3193
 	ldr	r3, [sp, #48]
 	cmp	r3, r0
-	bls	.L3207
+	bls	.L3193
 	ldr	r3, [sp, #24]
 	subs	r0, r0, r4
 	mov	r2, #512
 	movs	r1, #0
 	add	r0, r3, r0, lsl #9
 	bl	ftl_memset
-.L3207:
+.L3193:
 	add	r8, r8, #1
-	b	.L3206
-.L3205:
+	b	.L3192
+.L3191:
 	ldr	r2, [r10]
 	mov	r8, #36
 	mla	r8, r8, r6, r2
 	str	r3, [r8, #4]
 	ldr	r3, [sp, #36]
 	cmp	r5, r3
-	ldr	r3, .L3245+8
-	bne	.L3210
-	ldr	r2, .L3245+28
+	ldr	r3, .L3231+8
+	bne	.L3196
+	ldr	r2, .L3231+28
 	mov	r0, r4
 	ldrh	fp, [r3]
 	ldr	r2, [r2]
@@ -22251,13 +22135,13 @@ FtlRead:
 	movcs	r3, r2
 	cmp	r3, fp
 	str	r3, [sp, #52]
-	bne	.L3211
+	bne	.L3197
 	ldr	r3, [sp, #24]
-.L3242:
+.L3228:
 	str	r3, [r8, #8]
-.L3211:
-	ldr	r3, .L3245+48
-	ldr	r2, .L3245+52
+.L3197:
+	ldr	r3, .L3231+48
+	ldr	r2, .L3231+52
 	str	r5, [r8, #16]
 	ldrh	r3, [r3]
 	ldr	r2, [r2]
@@ -22266,12 +22150,12 @@ FtlRead:
 	bic	r3, r3, #3
 	add	r3, r3, r2
 	str	r3, [r8, #12]
-	b	.L3209
-.L3210:
+	b	.L3195
+.L3196:
 	ldr	r2, [sp, #40]
 	cmp	r5, r2
-	bne	.L3212
-	ldr	r2, .L3245+56
+	bne	.L3198
+	ldr	r2, .L3231+56
 	ldr	r1, [sp, #48]
 	ldr	r2, [r2]
 	str	r2, [r8, #8]
@@ -22280,26 +22164,26 @@ FtlRead:
 	subs	r1, r1, r3
 	cmp	r2, r1
 	str	r1, [sp, #28]
-	bne	.L3211
-.L3243:
+	bne	.L3197
+.L3229:
 	ldr	r2, [sp, #24]
 	subs	r3, r3, r4
 	add	r3, r2, r3, lsl #9
-	b	.L3242
-.L3212:
+	b	.L3228
+.L3198:
 	ldrh	r3, [r3]
 	muls	r3, r5, r3
-	b	.L3243
-.L3215:
+	b	.L3229
+.L3201:
 	ldr	r1, [sp, #40]
 	cmp	r1, r2
-	bne	.L3216
+	bne	.L3202
 	ldr	r1, [r3, #8]
-	ldr	r3, .L3245+56
+	ldr	r3, .L3231+56
 	ldr	r3, [r3]
 	cmp	r1, r3
-	bne	.L3216
-	ldr	r3, .L3245+8
+	bne	.L3202
+	ldr	r3, .L3231+8
 	ldr	r2, [sp, #68]
 	ldrh	r0, [r3]
 	ldr	r3, [sp, #40]
@@ -22307,13 +22191,13 @@ FtlRead:
 	ldr	r3, [sp, #24]
 	subs	r0, r0, r4
 	add	r0, r3, r0, lsl #9
-	b	.L3244
-.L3227:
+	b	.L3230
+.L3213:
 	mov	r7, #-1
-	b	.L3200
-.L3246:
+	b	.L3186
+.L3232:
 	.align	2
-.L3245:
+.L3231:
 	.word	.LANCHOR247
 	.word	.LANCHOR68
 	.word	.LANCHOR55
@@ -22437,62 +22321,62 @@ FtlInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	mov	r3, #-1
-	ldr	r5, .L3262
-	ldr	r2, .L3262+4
+	ldr	r5, .L3248
+	ldr	r2, .L3248+4
 	str	r3, [r5]
 	movs	r3, #0
-	ldr	r1, .L3262+8
+	ldr	r1, .L3248+8
 	str	r3, [r2]
-	ldr	r2, .L3262+12
-	ldr	r0, .L3262+16
+	ldr	r2, .L3248+12
+	ldr	r0, .L3248+16
 	str	r3, [r2]
 	bl	printf
-	ldr	r0, .L3262+20
+	ldr	r0, .L3248+20
 	bl	FtlConstantsInit
 	bl	FtlMemInit
 	bl	FtlVariablesInit
-	ldr	r3, .L3262+24
+	ldr	r3, .L3248+24
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	r0, .L3253
-	ldr	r1, .L3262+28
-	ldr	r0, .L3262+32
-.L3261:
+	cbz	r0, .L3239
+	ldr	r1, .L3248+28
+	ldr	r0, .L3248+32
+.L3247:
 	bl	printf
-.L3254:
+.L3240:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, pc}
-.L3253:
+.L3239:
 	bl	FtlSysBlkInit
 	mov	r4, r0
-	cbz	r0, .L3255
-	ldr	r1, .L3262+28
-	ldr	r0, .L3262+36
-	b	.L3261
-.L3255:
+	cbz	r0, .L3241
+	ldr	r1, .L3248+28
+	ldr	r0, .L3248+36
+	b	.L3247
+.L3241:
 	movs	r1, #1
 	str	r1, [r5]
-	ldr	r5, .L3262+40
+	ldr	r5, .L3248+40
 	bl	ftl_do_gc
 	ldrh	r6, [r5]
 	cmp	r6, #15
-	bhi	.L3254
-	ldr	r7, .L3262+44
-	ldr	r8, .L3262+48
-.L3259:
+	bhi	.L3240
+	ldr	r7, .L3248+44
+	ldr	r8, .L3248+48
+.L3245:
 	ldrh	r3, [r7]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L3257
+	bne	.L3243
 	ldrh	r2, [r8]
 	cmp	r2, r3
-	bne	.L3257
+	bne	.L3243
 	and	r0, r4, #63
 	bl	List_get_gc_head_node
 	uxth	r0, r0
 	bl	FtlGcRefreshBlock
-.L3257:
+.L3243:
 	movs	r1, #1
 	mov	r0, r1
 	bl	ftl_do_gc
@@ -22502,14 +22386,14 @@ FtlInit:
 	ldrh	r2, [r5]
 	adds	r3, r6, #2
 	cmp	r2, r3
-	bhi	.L3254
+	bhi	.L3240
 	adds	r4, r4, #1
 	cmp	r4, #4096
-	bne	.L3259
-	b	.L3254
-.L3263:
+	bne	.L3245
+	b	.L3240
+.L3249:
 	.align	2
-.L3262:
+.L3248:
 	.word	.LANCHOR247
 	.word	.LANCHOR254
 	.word	.LC77
@@ -22538,18 +22422,18 @@ rk_ftl_init:
 	push	{r4, lr}
 	bl	FlashInit
 	mov	r4, r0
-	cbnz	r0, .L3265
+	cbnz	r0, .L3251
 	bl	FtlInit
-.L3265:
+.L3251:
 	bl	idb_init
 	mov	r1, r4
-	ldr	r0, .L3266
+	ldr	r0, .L3252
 	bl	printf
 	mov	r0, r4
 	pop	{r4, pc}
-.L3267:
+.L3253:
 	.align	2
-.L3266:
+.L3252:
 	.word	.LC80
 	.size	rk_ftl_init, .-rk_ftl_init
 	.section	.text.ftl_fix_nand_power_lost_error,"ax",%progbits
@@ -22563,20 +22447,20 @@ rk_ftl_init:
 ftl_fix_nand_power_lost_error:
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L3282
+	ldr	r3, .L3268
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #56
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L3268
-	ldr	r7, .L3282+4
-	ldr	r6, .L3282+8
-	ldr	r10, .L3282+32
+	beq	.L3254
+	ldr	r7, .L3268+4
+	ldr	r6, .L3268+8
+	ldr	r10, .L3268+32
 	ldrh	r5, [r7]
 	ldr	r3, [r6]
-	ldr	r4, .L3282+12
+	ldr	r4, .L3268+12
 	mov	r1, r5
-	ldr	r0, .L3282+16
+	ldr	r0, .L3268+16
 	ldrh	r2, [r3, r5, lsl #1]
 	lsl	r8, r5, #1
 	bl	printf
@@ -22590,44 +22474,44 @@ ftl_fix_nand_power_lost_error:
 	movw	r4, #4097
 	bl	allocate_new_data_superblock
 	str	r7, [sp, #4]
-.L3270:
+.L3256:
 	subs	r4, r4, #1
-	beq	.L3274
+	beq	.L3260
 	movs	r1, #1
 	mov	r0, r1
 	bl	ftl_do_gc
 	ldr	r3, [r6]
 	ldrh	r3, [r3, r8]
 	cmp	r3, #0
-	bne	.L3270
-.L3274:
+	bne	.L3256
+.L3260:
 	ldr	r3, [r6]
 	mov	r1, r5
-	ldr	r0, .L3282+16
+	ldr	r0, .L3268+16
 	ldrh	r2, [r3, r5, lsl #1]
 	bl	printf
 	ldr	r3, [r6]
 	ldrh	r4, [r3, r5, lsl #1]
-	cbnz	r4, .L3272
+	cbnz	r4, .L3258
 	add	r0, sp, #56
-	ldr	r7, .L3282+20
+	ldr	r7, .L3268+20
 	strh	r5, [r0, #-48]!	@ movhi
 	movw	r10, #65535
 	bl	make_superblock
-	ldr	r3, .L3282+24
+	ldr	r3, .L3268+24
 	add	r0, sp, #22
 	ldr	r8, [r7]
 	mov	r2, r4
 	mov	fp, #36
 	mov	ip, r4
 	ldrh	lr, [r3]
-.L3275:
+.L3261:
 	uxth	r3, r2
 	cmp	lr, r3
-	bhi	.L3277
+	bhi	.L3263
 	ldr	r3, [r6]
 	mov	r1, r5
-	ldr	r0, .L3282+28
+	ldr	r0, .L3268+28
 	ldrh	r2, [r3, r5, lsl #1]
 	bl	printf
 	mov	r2, r4
@@ -22638,18 +22522,18 @@ ftl_fix_nand_power_lost_error:
 	movs	r1, #1
 	ldr	r0, [r7]
 	bl	FlashEraseBlocks
-.L3272:
+.L3258:
 	ldr	r2, [sp, #4]
 	movw	r3, #65535
 	strh	r3, [r2]	@ movhi
-.L3268:
+.L3254:
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3277:
+.L3263:
 	ldrh	r3, [r0, #2]!
 	cmp	r3, r10
-	beq	.L3276
+	beq	.L3262
 	mla	r1, fp, r4, r8
 	adds	r4, r4, #1
 	lsls	r3, r3, #10
@@ -22657,12 +22541,12 @@ ftl_fix_nand_power_lost_error:
 	str	r3, [r1, #4]
 	str	ip, [r1, #8]
 	str	ip, [r1, #12]
-.L3276:
+.L3262:
 	adds	r2, r2, #1
-	b	.L3275
-.L3283:
+	b	.L3261
+.L3269:
 	.align	2
-.L3282:
+.L3268:
 	.word	.LANCHOR16
 	.word	.LANCHOR241
 	.word	.LANCHOR85
@@ -22686,42 +22570,42 @@ FtlWrite:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r8, r3
-	ldr	r3, .L3356
+	ldr	r3, .L3342
 	sub	sp, sp, #72
 	mov	r5, r1
 	mov	r7, r2
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L3327
-	ldr	r2, .L3356+4
+	bne	.L3313
+	ldr	r2, .L3342+4
 	ldr	r2, [r2]
 	cmp	r2, #1
-	bne	.L3328
+	bne	.L3314
 	cmp	r0, #16
-	bne	.L3286
+	bne	.L3272
 	mov	r2, r8
 	mov	r1, r7
 	add	r0, r5, #256
 	bl	FtlVendorPartWrite
-.L3284:
+.L3270:
 	add	sp, sp, #72
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3286:
-	ldr	r3, .L3356+8
+.L3272:
+	ldr	r3, .L3342+8
 	ldr	r3, [r3]
 	cmp	r1, r3
-	bcs	.L3331
+	bcs	.L3317
 	cmp	r7, r3
-	bhi	.L3331
+	bhi	.L3317
 	adds	r6, r1, r7
 	cmp	r3, r6
-	bcc	.L3331
-	ldr	r3, .L3356+12
+	bcc	.L3317
+	ldr	r3, .L3342+12
 	mov	r2, #2048
 	mov	r0, r5
 	str	r2, [r3]
-	ldr	r3, .L3356+16
+	ldr	r3, .L3342+16
 	ldrh	r4, [r3]
 	mov	r1, r4
 	bl	__aeabi_uidiv
@@ -22729,7 +22613,7 @@ FtlWrite:
 	mov	fp, r0
 	subs	r0, r6, #1
 	bl	__aeabi_uidiv
-	ldr	r2, .L3356+20
+	ldr	r2, .L3342+20
 	sub	r10, r0, fp
 	add	r6, r10, #1
 	cmp	r7, r4, lsl #1
@@ -22737,7 +22621,7 @@ FtlWrite:
 	ldr	r3, [r2]
 	add	r3, r3, r6
 	str	r3, [r2]
-	ldr	r2, .L3356+24
+	ldr	r2, .L3342+24
 	ldr	r3, [r2]
 	add	r3, r3, r7
 	str	r3, [r2]
@@ -22745,22 +22629,22 @@ FtlWrite:
 	movcs	r3, #1
 	movcc	r3, #0
 	str	r3, [sp, #12]
-	ldr	r3, .L3356+28
+	ldr	r3, .L3342+28
 	ldr	r2, [r3]
 	cmp	r2, #0
-	beq	.L3332
+	beq	.L3318
 	movs	r3, #36
 	muls	r3, r2, r3
-	ldr	r2, .L3356+32
+	ldr	r2, .L3342+32
 	ldr	r2, [r2]
 	subs	r3, r3, #36
 	add	r3, r3, r2
 	ldr	r2, [r3, #16]
 	cmp	fp, r2
-	bne	.L3333
-	ldr	r1, .L3356+36
+	bne	.L3319
+	ldr	r1, .L3342+36
 	mov	r0, r5
-	ldr	r6, .L3356+40
+	ldr	r6, .L3342+40
 	str	r3, [sp, #8]
 	ldr	r2, [r1]
 	adds	r2, r2, #1
@@ -22784,14 +22668,14 @@ FtlWrite:
 	add	r0, r3, r0, lsl #9
 	bl	ftl_memcpy
 	cmp	r10, #0
-	bne	.L3290
+	bne	.L3276
 	ldr	r3, [r6]
 	cmp	r3, #2
-	bgt	.L3290
-.L3327:
+	bgt	.L3276
+.L3313:
 	movs	r0, #0
-	b	.L3284
-.L3290:
+	b	.L3270
+.L3276:
 	ldr	r3, [sp]
 	subs	r7, r7, r4
 	add	r5, r5, r4
@@ -22799,117 +22683,117 @@ FtlWrite:
 	mov	r6, r10
 	add	r3, r3, r8
 	str	r3, [sp]
-.L3289:
-	ldr	r3, .L3356+40
+.L3275:
+	ldr	r3, .L3342+40
 	movs	r2, #0
 	str	r2, [r3]
-.L3288:
+.L3274:
 	ldr	r1, [sp, #4]
 	mov	r0, fp
 	bl	FtlCacheMetchLpa
-	cbz	r0, .L3291
+	cbz	r0, .L3277
 	bl	FtlCacheWriteBack
-.L3291:
-	ldr	r3, .L3356+44
+.L3277:
+	ldr	r3, .L3342+44
 	mov	r4, fp
-	ldr	r2, .L3356+48
+	ldr	r2, .L3342+48
 	str	r2, [r3]
-.L3292:
+.L3278:
 	cmp	r6, #0
-	bne	.L3322
+	bne	.L3308
 	bl	FtlCacheWriteBack
 	ldr	r3, [sp, #4]
 	mov	r0, r6
-	ldr	r4, .L3356+52
+	ldr	r4, .L3342+52
 	sub	r1, r3, fp
 	bl	ftl_do_gc
 	ldrh	r3, [r4]
 	cmp	r3, #5
-	bls	.L3323
+	bls	.L3309
 	cmp	r3, #31
-	bhi	.L3327
-	ldr	r3, .L3356+56
+	bhi	.L3313
+	ldr	r3, .L3342+56
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L3327
-.L3323:
-	ldr	r5, .L3356+60
-	ldr	r7, .L3356+64
-.L3326:
+	bne	.L3313
+.L3309:
+	ldr	r5, .L3342+60
+	ldr	r7, .L3342+64
+.L3312:
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L3325
+	bne	.L3311
 	ldrh	r3, [r7]
 	cmp	r3, r2
-	bne	.L3325
-	ldr	r2, .L3356+68
+	bne	.L3311
+	ldr	r2, .L3342+68
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bne	.L3325
+	bne	.L3311
 	and	r0, r6, #7
 	bl	List_get_gc_head_node
 	uxth	r0, r0
 	bl	FtlGcRefreshBlock
-.L3325:
-	ldr	r2, .L3356+72
+.L3311:
+	ldr	r2, .L3342+72
 	movs	r3, #128
 	movs	r1, #1
 	mov	r0, r1
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L3356+76
+	ldr	r2, .L3342+76
 	strh	r3, [r2]	@ movhi
 	bl	ftl_do_gc
 	movs	r1, #1
 	movs	r0, #0
 	bl	ftl_do_gc
-	ldr	r3, .L3356
+	ldr	r3, .L3342
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L3327
+	bne	.L3313
 	ldrh	r3, [r4]
 	cmp	r3, #2
-	bhi	.L3327
+	bhi	.L3313
 	adds	r6, r6, #1
 	cmp	r6, #256
-	bne	.L3326
-	b	.L3327
-.L3333:
+	bne	.L3312
+	b	.L3313
+.L3319:
 	str	r8, [sp]
-	b	.L3289
-.L3332:
+	b	.L3275
+.L3318:
 	str	r8, [sp]
-	b	.L3288
-.L3322:
-	ldr	r3, .L3356+48
-	ldr	r8, .L3356+100
+	b	.L3274
+.L3308:
+	ldr	r3, .L3342+48
+	ldr	r8, .L3342+100
 	ldrb	r2, [r3, #6]	@ zero_extendqisi2
 	ldrh	r3, [r8]
 	cmp	r2, r3
-	bcc	.L3293
-	ldr	r1, .L3356+80
+	bcc	.L3279
+	ldr	r1, .L3342+80
 	mov	r2, #1472
-	ldr	r0, .L3356+84
+	ldr	r0, .L3342+84
 	bl	printf
-	ldr	r1, .L3356+88
-	ldr	r0, .L3356+92
+	ldr	r1, .L3342+88
+	ldr	r0, .L3342+92
 	bl	printf
-.L3293:
-	ldr	r3, .L3356+48
+.L3279:
+	ldr	r3, .L3342+48
 	ldrh	r3, [r3, #4]
-	cbnz	r3, .L3294
-	ldr	r0, .L3356+48
+	cbnz	r3, .L3280
+	ldr	r0, .L3342+48
 	bl	allocate_new_data_superblock
-	ldr	r3, .L3356+44
-	ldr	r2, .L3356+48
+	ldr	r3, .L3342+44
+	ldr	r2, .L3342+48
 	str	r2, [r3]
-.L3294:
-	ldr	r3, .L3356+96
-	ldr	r2, .L3356+28
+.L3280:
+	ldr	r3, .L3342+96
+	ldr	r2, .L3342+28
 	ldr	r3, [r3]
 	ldr	r2, [r2]
 	subs	r3, r3, r2
-	ldr	r2, .L3356+48
+	ldr	r2, .L3342+48
 	ldrh	r2, [r2, #4]
 	cmp	r3, r2
 	it	cs
@@ -22918,60 +22802,60 @@ FtlWrite:
 	it	cs
 	movcs	r3, r6
 	str	r3, [sp, #28]
-	ldr	r3, .L3356+48
+	ldr	r3, .L3342+48
 	ldrb	r2, [r3, #6]	@ zero_extendqisi2
 	ldrh	r3, [r8]
 	cmp	r2, r3
-	bcc	.L3295
-	ldr	r1, .L3356+80
+	bcc	.L3281
+	ldr	r1, .L3342+80
 	movw	r2, #1515
-	ldr	r0, .L3356+84
+	ldr	r0, .L3342+84
 	bl	printf
-	ldr	r1, .L3356+88
-	ldr	r0, .L3356+92
+	ldr	r1, .L3342+88
+	ldr	r0, .L3342+92
 	bl	printf
-.L3295:
+.L3281:
 	movs	r3, #0
-.L3354:
+.L3340:
 	str	r3, [sp, #8]
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #28]
 	cmp	r3, r2
-	bne	.L3317
-.L3297:
+	bne	.L3303
+.L3283:
 	ldr	r3, [sp, #8]
 	cmp	r6, r3
-	bcs	.L3318
-	ldr	r1, .L3356+80
+	bcs	.L3304
+	ldr	r1, .L3342+80
 	movw	r2, #1609
-	ldr	r0, .L3356+84
+	ldr	r0, .L3342+84
 	bl	printf
-	ldr	r1, .L3356+88
-	ldr	r0, .L3356+92
+	ldr	r1, .L3342+88
+	ldr	r0, .L3342+92
 	bl	printf
-.L3318:
+.L3304:
 	ldr	r3, [sp, #8]
-	ldr	r8, .L3356+28
+	ldr	r8, .L3342+28
 	subs	r6, r6, r3
-	ldr	r3, .L3356+96
+	ldr	r3, .L3342+96
 	ldr	r2, [r8]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bcs	.L3319
+	bcs	.L3305
 	ldr	r3, [sp, #12]
 	cmp	r3, #0
-	bne	.L3319
-	ldr	r3, .L3356+48
+	bne	.L3305
+	ldr	r3, .L3342+48
 	ldrh	r3, [r3, #4]
 	cmp	r3, #0
-	beq	.L3319
-.L3321:
+	beq	.L3305
+.L3307:
 	movs	r3, #0
 	str	r3, [sp, #12]
-	b	.L3292
-.L3357:
+	b	.L3278
+.L3343:
 	.align	2
-.L3356:
+.L3342:
 	.word	.LANCHOR78
 	.word	.LANCHOR247
 	.word	.LANCHOR68
@@ -22998,56 +22882,56 @@ FtlWrite:
 	.word	.LC7
 	.word	.LANCHOR185
 	.word	.LANCHOR38
-.L3317:
-	ldr	r3, .L3358
+.L3303:
+	ldr	r3, .L3344
 	ldrh	r3, [r3, #4]
 	cmp	r3, #0
-	beq	.L3297
+	beq	.L3283
 	ldr	r3, [sp, #12]
-	cbz	r3, .L3298
+	cbz	r3, .L3284
 	ldr	r3, [sp, #4]
 	cmp	r3, r4
-	bne	.L3298
+	bne	.L3284
 	ldr	r3, [sp, #8]
-	cbz	r3, .L3298
-	ldr	r3, .L3358+4
+	cbz	r3, .L3284
+	ldr	r3, .L3344+4
 	ldr	r1, [sp, #4]
 	ldrh	r2, [r3]
 	adds	r3, r5, r7
 	mls	r3, r2, r1, r3
 	cmp	r2, r3
-	bne	.L3297
-.L3298:
+	bne	.L3283
+.L3284:
 	movs	r2, #0
 	add	r1, sp, #32
 	mov	r0, r4
-	ldr	r8, .L3358+28
+	ldr	r8, .L3344+28
 	bl	log2phys
-	ldr	r0, .L3358
+	ldr	r0, .L3344
 	bl	get_new_active_ppa
-	ldr	r3, .L3358+8
+	ldr	r3, .L3344+8
 	movs	r2, #36
 	ldr	r1, [r3]
 	ldr	r3, [r8]
 	mla	ip, r2, r1, r3
-	ldr	r3, .L3358+12
+	ldr	r3, .L3344+12
 	ldrh	r2, [r3]
 	str	r0, [ip, #4]
 	str	r4, [ip, #16]
 	mul	r3, r2, r1
 	bic	r3, r3, #3
 	str	r3, [sp, #20]
-	ldr	r3, .L3358+16
+	ldr	r3, .L3344+16
 	ldr	r0, [sp, #20]
 	ldr	r3, [r3]
 	add	r10, r3, r0
 	str	r3, [sp, #24]
-	ldr	r3, .L3358+20
+	ldr	r3, .L3344+20
 	str	r10, [ip, #12]
 	ldrh	r0, [r3]
 	str	r3, [sp, #16]
 	muls	r1, r0, r1
-	ldr	r0, .L3358+24
+	ldr	r0, .L3344+24
 	ldr	r0, [r0]
 	bic	r1, r1, #3
 	add	r1, r1, r0
@@ -23056,12 +22940,12 @@ FtlWrite:
 	movs	r1, #0
 	bl	ftl_memset
 	cmp	fp, r4
-	ldr	r2, .L3358+4
-	beq	.L3299
+	ldr	r2, .L3344+4
+	beq	.L3285
 	ldr	r3, [sp, #4]
 	cmp	r3, r4
 	ldr	r3, [sp, #16]
-	bne	.L3351
+	bne	.L3337
 	ldrh	r3, [sp, #4]
 	add	r8, r5, r7
 	ldrh	r2, [r2]
@@ -23070,8 +22954,8 @@ FtlWrite:
 	str	r3, [sp, #16]
 	sub	r8, r8, r2
 	uxth	r8, r8
-	b	.L3302
-.L3299:
+	b	.L3288
+.L3285:
 	ldrh	r8, [r2]
 	mov	r0, r5
 	mov	r1, r8
@@ -23081,13 +22965,13 @@ FtlWrite:
 	cmp	r8, r7
 	it	cs
 	movcs	r8, r7
-.L3302:
-	ldr	r3, .L3358+4
-	ldr	r0, .L3358+28
+.L3288:
+	ldr	r3, .L3344+4
+	ldr	r0, .L3344+28
 	ldrh	r3, [r3]
 	cmp	r3, r8
-	ldr	r3, .L3358+8
-	bne	.L3303
+	ldr	r3, .L3344+8
+	bne	.L3289
 	cmp	fp, r4
 	ldr	r3, [r3]
 	ittet	ne
@@ -23099,31 +22983,31 @@ FtlWrite:
 	addne	r1, r2, r1, lsl #9
 	ldr	r2, [sp, #12]
 	cmp	r2, #0
-	beq	.L3305
+	beq	.L3291
 	ldr	r2, [r0]
 	movs	r0, #36
 	mla	r3, r0, r3, r2
 	str	r1, [r3, #8]
-.L3306:
-	ldr	r3, .L3358
+.L3292:
+	ldr	r3, .L3344
 	ldrb	r2, [r3, #6]	@ zero_extendqisi2
-	ldr	r3, .L3358+32
+	ldr	r3, .L3344+32
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L3314
-	ldr	r1, .L3358+36
+	bcc	.L3300
+	ldr	r1, .L3344+36
 	movw	r2, #1599
-	ldr	r0, .L3358+40
+	ldr	r0, .L3344+40
 	bl	printf
-	ldr	r1, .L3358+44
-	ldr	r0, .L3358+48
+	ldr	r1, .L3344+44
+	ldr	r0, .L3344+48
 	bl	printf
-.L3314:
+.L3300:
 	ldr	r2, [sp, #24]
 	movw	r3, #61589
 	ldr	r1, [sp, #20]
 	strh	r3, [r2, r1]	@ movhi
-	ldr	r2, .L3358+52
+	ldr	r2, .L3344+52
 	str	r4, [r10, #8]
 	adds	r4, r4, #1
 	ldr	r3, [r2]
@@ -23134,9 +23018,9 @@ FtlWrite:
 	moveq	r3, #0
 	str	r3, [r2]
 	ldr	r3, [sp, #32]
-	ldr	r2, .L3358+8
+	ldr	r2, .L3344+8
 	str	r3, [r10, #12]
-	ldr	r3, .L3358
+	ldr	r3, .L3344
 	ldrh	r3, [r3]
 	strh	r3, [r10, #2]	@ movhi
 	ldr	r3, [r2]
@@ -23144,21 +23028,21 @@ FtlWrite:
 	str	r3, [r2]
 	ldr	r3, [sp, #8]
 	adds	r3, r3, #1
-	b	.L3354
-.L3305:
-	ldr	r2, .L3358+28
+	b	.L3340
+.L3291:
+	ldr	r2, .L3344+28
 	movs	r0, #36
 	ldr	r2, [r2]
 	mla	r3, r0, r3, r2
-	ldr	r2, .L3358+20
+	ldr	r2, .L3344+20
 	ldrh	r2, [r2]
-.L3355:
+.L3341:
 	ldr	r0, [r3, #8]
-	b	.L3352
-.L3303:
+	b	.L3338
+.L3289:
 	ldr	r2, [sp, #32]
 	adds	r1, r2, #1
-	beq	.L3307
+	beq	.L3293
 	str	r2, [sp, #40]
 	movs	r1, #36
 	ldr	r2, [r0]
@@ -23175,17 +23059,17 @@ FtlWrite:
 	bl	FlashReadPages
 	ldr	r3, [sp, #36]
 	adds	r3, r3, #1
-	bne	.L3308
-	ldr	r2, .L3358+56
+	bne	.L3294
+	ldr	r2, .L3344+56
 	ldr	r3, [r2, #72]
 	adds	r3, r3, #1
 	str	r3, [r2, #72]
-.L3311:
+.L3297:
 	cmp	fp, r4
-	ldr	r0, .L3358+28
+	ldr	r0, .L3344+28
 	lsl	r2, r8, #9
-	bne	.L3312
-	ldr	r3, .L3358+8
+	bne	.L3298
+	ldr	r3, .L3344+8
 	ldr	r1, [r0]
 	movs	r0, #36
 	ldr	r3, [r3]
@@ -23194,60 +23078,60 @@ FtlWrite:
 	ldr	r0, [r3, #8]
 	ldr	r3, [sp, #16]
 	add	r0, r0, r3, lsl #9
-.L3352:
+.L3338:
 	bl	ftl_memcpy
-	b	.L3306
-.L3308:
+	b	.L3292
+.L3294:
 	ldr	r1, [r10, #8]
 	cmp	r4, r1
-	beq	.L3310
-	ldr	r2, .L3358+56
-	ldr	r0, .L3358+60
+	beq	.L3296
+	ldr	r2, .L3344+56
+	ldr	r0, .L3344+60
 	ldr	r3, [r2, #72]
 	adds	r3, r3, #1
 	str	r3, [r2, #72]
 	mov	r2, r4
 	bl	printf
-.L3310:
+.L3296:
 	ldr	r3, [r10, #8]
 	cmp	r4, r3
-	beq	.L3311
+	beq	.L3297
 	movw	r2, #1581
-	ldr	r1, .L3358+36
-	ldr	r0, .L3358+40
+	ldr	r1, .L3344+36
+	ldr	r0, .L3344+40
 	bl	printf
-	ldr	r1, .L3358+44
-	ldr	r0, .L3358+48
+	ldr	r1, .L3344+44
+	ldr	r0, .L3344+48
 	bl	printf
-	b	.L3311
-.L3307:
+	b	.L3297
+.L3293:
 	ldr	r2, [r0]
 	movs	r1, #36
 	ldr	r3, [r3]
 	mla	r3, r1, r3, r2
-	ldr	r2, .L3358+20
+	ldr	r2, .L3344+20
 	movs	r1, #0
 	ldrh	r2, [r2]
 	ldr	r0, [r3, #8]
 	bl	ftl_memset
-	b	.L3311
-.L3312:
-	ldr	r3, .L3358+4
+	b	.L3297
+.L3298:
+	ldr	r3, .L3344+4
 	mov	ip, #36
 	ldr	r0, [r0]
 	ldrh	r1, [r3]
-	ldr	r3, .L3358+8
+	ldr	r3, .L3344+8
 	ldr	r3, [r3]
 	muls	r1, r4, r1
 	mla	r3, ip, r3, r0
 	ldr	r0, [sp]
 	subs	r1, r1, r5
 	add	r1, r0, r1, lsl #9
-	b	.L3355
-.L3351:
+	b	.L3341
+.L3337:
 	ldr	r1, [sp, #12]
-	cbz	r1, .L3313
-	ldr	r3, .L3358+8
+	cbz	r1, .L3299
+	ldr	r3, .L3344+8
 	movs	r0, #36
 	ldr	r1, [r8]
 	ldr	r3, [r3]
@@ -23258,11 +23142,11 @@ FtlWrite:
 	subs	r3, r3, r5
 	add	r3, r2, r3, lsl #9
 	str	r3, [r8, #8]
-	b	.L3306
-.L3313:
+	b	.L3292
+.L3299:
 	ldrh	r1, [r2]
 	mov	ip, #36
-	ldr	r2, .L3358+8
+	ldr	r2, .L3344+8
 	ldr	r0, [r8]
 	ldr	r2, [r2]
 	muls	r1, r4, r1
@@ -23272,23 +23156,23 @@ FtlWrite:
 	subs	r1, r1, r5
 	ldr	r0, [r8, #8]
 	add	r1, r3, r1, lsl #9
-	b	.L3352
-.L3319:
+	b	.L3338
+.L3305:
 	bl	FtlCacheWriteBack
 	cmp	r6, #1
 	mov	r3, #0
 	str	r3, [r8]
-	bhi	.L3292
-	b	.L3321
-.L3331:
+	bhi	.L3278
+	b	.L3307
+.L3317:
 	mov	r0, #-1
-	b	.L3284
-.L3328:
+	b	.L3270
+.L3314:
 	mov	r0, r3
-	b	.L3284
-.L3359:
+	b	.L3270
+.L3345:
 	.align	2
-.L3358:
+.L3344:
 	.word	.LANCHOR93
 	.word	.LANCHOR55
 	.word	.LANCHOR72
@@ -23394,11 +23278,11 @@ ftl_write:
 	mov	r4, r2
 	mov	r5, r3
 	mov	r6, r0
-	cbnz	r0, .L3365
+	cbnz	r0, .L3351
 	mov	r3, r2
 	mov	r2, r5
 	bl	idb_write_data
-.L3365:
+.L3351:
 	mov	r3, r5
 	mov	r2, r4
 	mov	r1, r7
@@ -23419,27 +23303,27 @@ FtlDumpSysBlock:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	lsl	r10, r0, #10
-	ldr	r5, .L3373
+	ldr	r5, .L3359
 	sub	sp, sp, #24
 	mov	r7, r0
 	movs	r6, #0
-	ldr	r4, .L3373+4
+	ldr	r4, .L3359+4
 	ldr	r3, [r5]
-	ldr	r8, .L3373+20
+	ldr	r8, .L3359+20
 	mov	fp, r4
 	str	r3, [r4, #8]
-	ldr	r3, .L3373+8
+	ldr	r3, .L3359+8
 	ldr	r3, [r3]
 	str	r3, [r4, #12]
-.L3367:
+.L3353:
 	ldrh	r2, [r8]
 	sxth	r3, r6
 	cmp	r3, r2
-	blt	.L3369
+	blt	.L3355
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3369:
+.L3355:
 	movs	r2, #1
 	orr	r3, r3, r10
 	mov	r1, r2
@@ -23449,7 +23333,7 @@ FtlDumpSysBlock:
 	ldr	r2, [r4, #8]
 	mov	r1, r7
 	ldr	r3, [r4, #12]
-	ldr	r0, .L3373+12
+	ldr	r0, .L3359+12
 	ldr	r2, [r2]
 	str	r2, [sp, #16]
 	ldr	r2, [r3, #12]
@@ -23465,18 +23349,18 @@ FtlDumpSysBlock:
 	ldr	r3, [r4, #12]
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L3368
+	beq	.L3354
 	mov	r3, #768
 	movs	r2, #4
 	ldr	r1, [r5]
-	ldr	r0, .L3373+16
+	ldr	r0, .L3359+16
 	bl	rknand_print_hex
-.L3368:
+.L3354:
 	adds	r6, r6, #1
-	b	.L3367
-.L3374:
+	b	.L3353
+.L3360:
 	.align	2
-.L3373:
+.L3359:
 	.word	.LANCHOR189
 	.word	.LANCHOR211
 	.word	.LANCHOR195
@@ -23495,32 +23379,32 @@ FtlDumpSysBlock:
 dump_map_info:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L3389
+	ldr	r3, .L3375
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #40
-	ldr	r8, .L3389+72
+	ldr	r8, .L3375+72
 	ldrh	r5, [r3]
-.L3376:
-	ldr	r3, .L3389+4
+.L3362:
+	ldr	r3, .L3375+4
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	bhi	.L3383
-	ldr	r4, .L3389+8
+	bhi	.L3369
+	ldr	r4, .L3375+8
 	movs	r7, #0
-.L3384:
-	ldr	r3, .L3389+12
+.L3370:
+	ldr	r3, .L3375+12
 	sxth	r5, r7
 	ldrh	r3, [r3]
 	cmp	r5, r3
-	bge	.L3387
+	bge	.L3373
 	lsls	r5, r5, #1
 	movs	r6, #0
-	ldr	r8, .L3389+76
-	b	.L3388
-.L3378:
+	ldr	r8, .L3375+76
+	b	.L3374
+.L3364:
 	str	r3, [sp, #36]
 	mov	r1, r5
-	ldr	r3, .L3389+16
+	ldr	r3, .L3375+16
 	str	r2, [sp, #32]
 	ldrb	r0, [r3, r6]	@ zero_extendqisi2
 	bl	V2P_block
@@ -23528,7 +23412,7 @@ dump_map_info:
 	bl	FtlBbmIsBadBlock
 	ldr	r2, [sp, #32]
 	ldr	r3, [sp, #36]
-	cbnz	r0, .L3377
+	cbnz	r0, .L3363
 	ldr	r1, [sp, #28]
 	mla	r0, fp, r4, r7
 	lsls	r1, r1, #10
@@ -23541,29 +23425,29 @@ dump_map_info:
 	ldr	r1, [sp, #24]
 	add	r1, r1, ip
 	str	r1, [r0, #12]
-.L3377:
+.L3363:
 	adds	r6, r6, #1
-.L3385:
+.L3371:
 	uxth	r1, r6
 	cmp	r2, r1
-	bhi	.L3378
-	cbnz	r4, .L3379
-.L3382:
+	bhi	.L3364
+	cbnz	r4, .L3365
+.L3368:
 	adds	r5, r5, #1
 	uxth	r5, r5
-	b	.L3376
-.L3379:
-	ldr	r10, .L3389+80
+	b	.L3362
+.L3365:
+	ldr	r10, .L3375+80
 	mov	r0, r7
 	movs	r6, #0
 	movs	r7, #36
 	movs	r2, #1
 	mov	r1, r4
 	bl	FlashReadPages
-.L3380:
+.L3366:
 	uxth	r3, r6
 	cmp	r4, r3
-	bls	.L3382
+	bls	.L3368
 	ldr	r3, [r8]
 	mla	r3, r7, r6, r3
 	adds	r6, r6, #1
@@ -23584,24 +23468,24 @@ dump_map_info:
 	ldr	r3, [r1]
 	ubfx	r1, r2, #10, #16
 	bl	printf
-	b	.L3380
-.L3383:
-	ldr	r1, .L3389+20
+	b	.L3366
+.L3369:
+	ldr	r1, .L3375+20
 	movs	r6, #0
-	ldr	r3, .L3389+24
+	ldr	r3, .L3375+24
 	mov	r4, r6
 	ldr	r7, [r8]
 	mov	fp, #36
 	ldr	r1, [r1]
 	ldrh	r2, [r3]
-	ldr	r3, .L3389+28
+	ldr	r3, .L3375+28
 	str	r1, [sp, #24]
-	ldr	r1, .L3389+32
+	ldr	r1, .L3375+32
 	ldr	r3, [r3]
 	ldrh	r10, [r1]
-	b	.L3385
-.L3386:
-	ldr	r10, .L3389+44
+	b	.L3371
+.L3372:
+	ldr	r10, .L3375+44
 	mov	r0, r4
 	ldr	r2, [r10]
 	ldrh	r2, [r2, r5]
@@ -23617,7 +23501,7 @@ dump_map_info:
 	ldrh	r1, [r1, r5]
 	str	r0, [sp, #20]
 	ldr	r2, [r2]
-	ldr	r0, .L3389+36
+	ldr	r0, .L3375+36
 	str	r2, [sp, #16]
 	ldr	r2, [r3, #12]
 	str	r2, [sp, #12]
@@ -23629,41 +23513,41 @@ dump_map_info:
 	str	r3, [sp]
 	ldm	r4, {r2, r3}
 	bl	printf
-.L3388:
+.L3374:
 	ldrh	r2, [r8]
 	sxth	r3, r6
 	adds	r6, r6, #1
 	cmp	r3, r2
-	blt	.L3386
+	blt	.L3372
 	adds	r7, r7, #1
-	b	.L3384
-.L3387:
-	ldr	r3, .L3389+40
+	b	.L3370
+.L3373:
+	ldr	r3, .L3375+40
 	movs	r2, #2
-	ldr	r1, .L3389+44
-	ldr	r0, .L3389+48
+	ldr	r1, .L3375+44
+	ldr	r0, .L3375+48
 	ldr	r3, [r3]
 	ldr	r1, [r1]
 	bl	rknand_print_hex
-	ldr	r4, .L3389+52
+	ldr	r4, .L3375+52
 	movs	r2, #4
-	ldr	r1, .L3389+56
-	ldr	r0, .L3389+60
+	ldr	r1, .L3375+56
+	ldr	r0, .L3375+60
 	ldrh	r3, [r4]
 	ldr	r1, [r1]
 	bl	rknand_print_hex
-	ldr	r1, .L3389+64
+	ldr	r1, .L3375+64
 	movs	r2, #4
 	ldrh	r3, [r4]
-	ldr	r0, .L3389+68
+	ldr	r0, .L3375+68
 	ldr	r1, [r1]
 	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
 	b	rknand_print_hex
-.L3390:
+.L3376:
 	.align	2
-.L3389:
+.L3375:
 	.word	.LANCHOR40
 	.word	.LANCHOR41
 	.word	.LANCHOR211
@@ -23941,7 +23825,7 @@ DieCsIndex:
 	.space	8
 	.section	.bss.FlashDdrTunningReadCount,"aw",%nobits
 	.align	2
-	.set	.LANCHOR147,. + 0
+	.set	.LANCHOR144,. + 0
 	.type	FlashDdrTunningReadCount, %object
 	.size	FlashDdrTunningReadCount, 4
 FlashDdrTunningReadCount:
@@ -24270,7 +24154,7 @@ gFlashPageBuffer0:
 	.space	4
 	.section	.bss.gFlashPageBuffer1,"aw",%nobits
 	.align	2
-	.set	.LANCHOR152,. + 0
+	.set	.LANCHOR149,. + 0
 	.type	gFlashPageBuffer1, %object
 	.size	gFlashPageBuffer1, 4
 gFlashPageBuffer1:
@@ -24404,7 +24288,7 @@ gNandIDBResBlkNumSaveInFlash:
 	.space	1
 	.section	.bss.gNandIDataBuf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR144,. + 0
+	.set	.LANCHOR150,. + 0
 	.type	gNandIDataBuf, %object
 	.size	gNandIDataBuf, 2048
 gNandIDataBuf:
@@ -24808,7 +24692,7 @@ g_l2p_last_update_region_id:
 g_maxRegNum:
 	.space	1
 	.section	.bss.g_maxRetryCount,"aw",%nobits
-	.set	.LANCHOR149,. + 0
+	.set	.LANCHOR146,. + 0
 	.type	g_maxRetryCount, %object
 	.size	g_maxRetryCount, 1
 g_maxRetryCount:
@@ -25091,7 +24975,7 @@ gpNandc1:
 	.space	4
 	.section	.bss.gpReadRetrial,"aw",%nobits
 	.align	2
-	.set	.LANCHOR148,. + 0
+	.set	.LANCHOR145,. + 0
 	.type	gpReadRetrial, %object
 	.size	gpReadRetrial, 4
 gpReadRetrial:
@@ -25463,7 +25347,7 @@ LastWritenPbaAddr:
 	.word	-1
 	.section	.data.NandFlashParaTbl,"aw",%progbits
 	.align	1
-	.set	.LANCHOR145,. + 0
+	.set	.LANCHOR151,. + 0
 	.type	NandFlashParaTbl, %object
 	.size	NandFlashParaTbl, 2752
 NandFlashParaTbl:
@@ -27704,7 +27588,7 @@ NandFlashParaTbl:
 	.byte	0
 	.space	4
 	.section	.data.NandOptPara,"aw",%progbits
-	.set	.LANCHOR146,. + 0
+	.set	.LANCHOR152,. + 0
 	.type	NandOptPara, %object
 	.size	NandOptPara, 128
 NandOptPara:
@@ -28361,7 +28245,7 @@ refValueDefault:
 	.ascii	"FtlGcScanTempBlkError ID %x %x!!!!!!!\012\000"
 	.section	.rodata.FtlInit.str1.1,"aMS",%progbits,1
 .LC77:
-	.ascii	"FTL version: 5.0.63 20200923\000"
+	.ascii	"FTL version: 5.0.63 20210318\000"
 .LC78:
 	.ascii	"...%s: no bad block mapping table, format device\012"
 	.ascii	"\000"
@@ -28433,203 +28317,203 @@ refValueDefault:
 	.section	.rodata.MicronReadRetrial.str1.1,"aMS",%progbits,1
 .LC13:
 	.ascii	"micron RR %d row=%x,count %d,status=%d\012\000"
-	.section	.rodata.__func__.10657,"a",%progbits
+	.section	.rodata.__func__.10661,"a",%progbits
 	.set	.LANCHOR255,. + 0
-	.type	__func__.10657, %object
-	.size	__func__.10657, 8
-__func__.10657:
+	.type	__func__.10661, %object
+	.size	__func__.10661, 8
+__func__.10661:
 	.ascii	"FtlInit\000"
-	.section	.rodata.__func__.10761,"a",%progbits
+	.section	.rodata.__func__.10765,"a",%progbits
 	.set	.LANCHOR258,. + 0
-	.type	__func__.10761, %object
-	.size	__func__.10761, 9
-__func__.10761:
+	.type	__func__.10765, %object
+	.size	__func__.10765, 9
+__func__.10765:
 	.ascii	"FtlWrite\000"
-	.section	.rodata.__func__.10851,"a",%progbits
+	.section	.rodata.__func__.10855,"a",%progbits
 	.set	.LANCHOR127,. + 0
-	.type	__func__.10851, %object
-	.size	__func__.10851, 14
-__func__.10851:
+	.type	__func__.10855, %object
+	.size	__func__.10855, 14
+__func__.10855:
 	.ascii	"FtlBbt2Bitmap\000"
-	.section	.rodata.__func__.10897,"a",%progbits
+	.section	.rodata.__func__.10901,"a",%progbits
 	.set	.LANCHOR220,. + 0
-	.type	__func__.10897, %object
-	.size	__func__.10897, 11
-__func__.10897:
+	.type	__func__.10901, %object
+	.size	__func__.10901, 11
+__func__.10901:
 	.ascii	"FtlLoadBbt\000"
-	.section	.rodata.__func__.10990,"a",%progbits
-	.set	.LANCHOR91,. + 0
-	.type	__func__.10990, %object
-	.size	__func__.10990, 17
-__func__.10990:
-	.ascii	"INSERT_FREE_LIST\000"
 	.section	.rodata.__func__.10994,"a",%progbits
-	.set	.LANCHOR88,. + 0
+	.set	.LANCHOR91,. + 0
 	.type	__func__.10994, %object
 	.size	__func__.10994, 17
 __func__.10994:
+	.ascii	"INSERT_FREE_LIST\000"
+	.section	.rodata.__func__.10998,"a",%progbits
+	.set	.LANCHOR88,. + 0
+	.type	__func__.10998, %object
+	.size	__func__.10998, 17
+__func__.10998:
 	.ascii	"INSERT_DATA_LIST\000"
-	.section	.rodata.__func__.11032,"a",%progbits
+	.section	.rodata.__func__.11036,"a",%progbits
 	.set	.LANCHOR92,. + 0
-	.type	__func__.11032, %object
-	.size	__func__.11032, 17
-__func__.11032:
+	.type	__func__.11036, %object
+	.size	__func__.11036, 17
+__func__.11036:
 	.ascii	"List_remove_node\000"
-	.section	.rodata.__func__.11062,"a",%progbits
+	.section	.rodata.__func__.11066,"a",%progbits
 	.set	.LANCHOR96,. + 0
-	.type	__func__.11062, %object
-	.size	__func__.11062, 22
-__func__.11062:
+	.type	__func__.11066, %object
+	.size	__func__.11066, 22
+__func__.11066:
 	.ascii	"List_update_data_list\000"
-	.section	.rodata.__func__.11069,"a",%progbits
+	.section	.rodata.__func__.11073,"a",%progbits
 	.set	.LANCHOR237,. + 0
-	.type	__func__.11069, %object
-	.size	__func__.11069, 20
-__func__.11069:
+	.type	__func__.11073, %object
+	.size	__func__.11073, 20
+__func__.11073:
 	.ascii	"ftl_load_l2p_region\000"
-	.section	.rodata.__func__.11100,"a",%progbits
+	.section	.rodata.__func__.11104,"a",%progbits
 	.set	.LANCHOR97,. + 0
-	.type	__func__.11100, %object
-	.size	__func__.11100, 26
-__func__.11100:
+	.type	__func__.11104, %object
+	.size	__func__.11104, 26
+__func__.11104:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.section	.rodata.__func__.11110,"a",%progbits
+	.section	.rodata.__func__.11114,"a",%progbits
 	.set	.LANCHOR221,. + 0
-	.type	__func__.11110, %object
-	.size	__func__.11110, 15
-__func__.11110:
+	.type	__func__.11114, %object
+	.size	__func__.11114, 15
+__func__.11114:
 	.ascii	"ftl_map_blk_gc\000"
-	.section	.rodata.__func__.11123,"a",%progbits
+	.section	.rodata.__func__.11127,"a",%progbits
 	.set	.LANCHOR222,. + 0
-	.type	__func__.11123, %object
-	.size	__func__.11123, 31
-__func__.11123:
+	.type	__func__.11127, %object
+	.size	__func__.11127, 31
+__func__.11127:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.section	.rodata.__func__.11136,"a",%progbits
+	.section	.rodata.__func__.11140,"a",%progbits
 	.set	.LANCHOR223,. + 0
-	.type	__func__.11136, %object
-	.size	__func__.11136, 16
-__func__.11136:
+	.type	__func__.11140, %object
+	.size	__func__.11140, 16
+__func__.11140:
 	.ascii	"FtlMapWritePage\000"
-	.section	.rodata.__func__.11156,"a",%progbits
+	.section	.rodata.__func__.11160,"a",%progbits
 	.set	.LANCHOR100,. + 0
-	.type	__func__.11156, %object
-	.size	__func__.11156, 22
-__func__.11156:
+	.type	__func__.11160, %object
+	.size	__func__.11160, 22
+__func__.11160:
 	.ascii	"select_l2p_ram_region\000"
-	.section	.rodata.__func__.11172,"a",%progbits
+	.section	.rodata.__func__.11176,"a",%progbits
 	.set	.LANCHOR236,. + 0
-	.type	__func__.11172, %object
-	.size	__func__.11172, 9
-__func__.11172:
+	.type	__func__.11176, %object
+	.size	__func__.11176, 9
+__func__.11176:
 	.ascii	"log2phys\000"
-	.section	.rodata.__func__.11234,"a",%progbits
+	.section	.rodata.__func__.11238,"a",%progbits
 	.set	.LANCHOR219,. + 0
-	.type	__func__.11234, %object
-	.size	__func__.11234, 15
-__func__.11234:
+	.type	__func__.11238, %object
+	.size	__func__.11238, 15
+__func__.11238:
 	.ascii	"FtlVpcTblFlush\000"
-	.section	.rodata.__func__.11253,"a",%progbits
+	.section	.rodata.__func__.11257,"a",%progbits
 	.set	.LANCHOR229,. + 0
-	.type	__func__.11253, %object
-	.size	__func__.11253, 14
-__func__.11253:
+	.type	__func__.11257, %object
+	.size	__func__.11257, 14
+__func__.11257:
 	.ascii	"FtlScanSysBlk\000"
-	.section	.rodata.__func__.11308,"a",%progbits
+	.section	.rodata.__func__.11312,"a",%progbits
 	.set	.LANCHOR230,. + 0
-	.type	__func__.11308, %object
-	.size	__func__.11308, 15
-__func__.11308:
+	.type	__func__.11312, %object
+	.size	__func__.11312, 15
+__func__.11312:
 	.ascii	"FtlLoadSysInfo\000"
-	.section	.rodata.__func__.11319,"a",%progbits
+	.section	.rodata.__func__.11323,"a",%progbits
 	.set	.LANCHOR238,. + 0
-	.type	__func__.11319, %object
-	.size	__func__.11319, 12
-__func__.11319:
+	.type	__func__.11323, %object
+	.size	__func__.11323, 12
+__func__.11323:
 	.ascii	"FtlCheckVpc\000"
-	.section	.rodata.__func__.11351,"a",%progbits
+	.section	.rodata.__func__.11355,"a",%progbits
 	.set	.LANCHOR233,. + 0
-	.type	__func__.11351, %object
-	.size	__func__.11351, 17
-__func__.11351:
+	.type	__func__.11355, %object
+	.size	__func__.11355, 17
+__func__.11355:
 	.ascii	"FtlDumpBlockInfo\000"
-	.section	.rodata.__func__.11370,"a",%progbits
+	.section	.rodata.__func__.11374,"a",%progbits
 	.set	.LANCHOR234,. + 0
-	.type	__func__.11370, %object
-	.size	__func__.11370, 16
-__func__.11370:
+	.type	__func__.11374, %object
+	.size	__func__.11374, 16
+__func__.11374:
 	.ascii	"FtlScanAllBlock\000"
-	.section	.rodata.__func__.11475,"a",%progbits
+	.section	.rodata.__func__.11479,"a",%progbits
 	.set	.LANCHOR239,. + 0
-	.type	__func__.11475, %object
-	.size	__func__.11475, 16
-__func__.11475:
+	.type	__func__.11479, %object
+	.size	__func__.11479, 16
+__func__.11479:
 	.ascii	"FtlReUsePrevPpa\000"
-	.section	.rodata.__func__.11508,"a",%progbits
+	.section	.rodata.__func__.11512,"a",%progbits
 	.set	.LANCHOR240,. + 0
-	.type	__func__.11508, %object
-	.size	__func__.11508, 22
-__func__.11508:
+	.type	__func__.11512, %object
+	.size	__func__.11512, 22
+__func__.11512:
 	.ascii	"FtlRecoverySuperblock\000"
-	.section	.rodata.__func__.11562,"a",%progbits
+	.section	.rodata.__func__.11566,"a",%progbits
 	.set	.LANCHOR103,. + 0
-	.type	__func__.11562, %object
-	.size	__func__.11562, 16
-__func__.11562:
+	.type	__func__.11566, %object
+	.size	__func__.11566, 16
+__func__.11566:
 	.ascii	"make_superblock\000"
-	.section	.rodata.__func__.11582,"a",%progbits
+	.section	.rodata.__func__.11586,"a",%progbits
 	.set	.LANCHOR143,. + 0
-	.type	__func__.11582, %object
-	.size	__func__.11582, 18
-__func__.11582:
+	.type	__func__.11586, %object
+	.size	__func__.11586, 18
+__func__.11586:
 	.ascii	"SupperBlkListInit\000"
-	.section	.rodata.__func__.11628,"a",%progbits
+	.section	.rodata.__func__.11632,"a",%progbits
 	.set	.LANCHOR235,. + 0
-	.type	__func__.11628, %object
-	.size	__func__.11628, 17
-__func__.11628:
+	.type	__func__.11632, %object
+	.size	__func__.11632, 17
+__func__.11632:
 	.ascii	"ftl_scan_all_ppa\000"
-	.section	.rodata.__func__.11673,"a",%progbits
+	.section	.rodata.__func__.11677,"a",%progbits
 	.set	.LANCHOR212,. + 0
-	.type	__func__.11673, %object
-	.size	__func__.11673, 25
-__func__.11673:
+	.type	__func__.11677, %object
+	.size	__func__.11677, 25
+__func__.11677:
 	.ascii	"allocate_data_superblock\000"
-	.section	.rodata.__func__.11687,"a",%progbits
+	.section	.rodata.__func__.11691,"a",%progbits
 	.set	.LANCHOR228,. + 0
-	.type	__func__.11687, %object
-	.size	__func__.11687, 29
-__func__.11687:
+	.type	__func__.11691, %object
+	.size	__func__.11691, 29
+__func__.11691:
 	.ascii	"allocate_new_data_superblock\000"
-	.section	.rodata.__func__.11693,"a",%progbits
+	.section	.rodata.__func__.11697,"a",%progbits
 	.set	.LANCHOR217,. + 0
-	.type	__func__.11693, %object
-	.size	__func__.11693, 19
-__func__.11693:
+	.type	__func__.11697, %object
+	.size	__func__.11697, 19
+__func__.11697:
 	.ascii	"get_new_active_ppa\000"
-	.section	.rodata.__func__.11704,"a",%progbits
+	.section	.rodata.__func__.11708,"a",%progbits
 	.set	.LANCHOR215,. + 0
-	.type	__func__.11704, %object
-	.size	__func__.11704, 16
-__func__.11704:
+	.type	__func__.11708, %object
+	.size	__func__.11708, 16
+__func__.11708:
 	.ascii	"update_vpc_list\000"
-	.section	.rodata.__func__.11709,"a",%progbits
+	.section	.rodata.__func__.11713,"a",%progbits
 	.set	.LANCHOR216,. + 0
-	.type	__func__.11709, %object
-	.size	__func__.11709, 20
-__func__.11709:
+	.type	__func__.11713, %object
+	.size	__func__.11713, 20
+__func__.11713:
 	.ascii	"decrement_vpc_count\000"
-	.section	.rodata.__func__.11777,"a",%progbits
+	.section	.rodata.__func__.11781,"a",%progbits
 	.set	.LANCHOR246,. + 0
-	.type	__func__.11777, %object
-	.size	__func__.11777, 19
-__func__.11777:
+	.type	__func__.11781, %object
+	.size	__func__.11781, 19
+__func__.11781:
 	.ascii	"FtlGcFreeTempBlock\000"
-	.section	.rodata.__func__.11878,"a",%progbits
+	.section	.rodata.__func__.11882,"a",%progbits
 	.set	.LANCHOR251,. + 0
-	.type	__func__.11878, %object
-	.size	__func__.11878, 10
-__func__.11878:
+	.type	__func__.11882, %object
+	.size	__func__.11882, 10
+__func__.11882:
 	.ascii	"ftl_do_gc\000"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",%progbits,1
 .LC38:
@@ -28693,7 +28577,7 @@ __func__.11878:
 .LC21:
 	.ascii	"\000"
 	.section	.rodata.samsung_14nm_mlc_rr,"a",%progbits
-	.set	.LANCHOR151,. + 0
+	.set	.LANCHOR148,. + 0
 	.type	samsung_14nm_mlc_rr, %object
 	.size	samsung_14nm_mlc_rr, 104
 samsung_14nm_mlc_rr:
@@ -28802,7 +28686,7 @@ samsung_14nm_mlc_rr:
 	.byte	9
 	.byte	8
 	.section	.rodata.samsung_14nm_slc_rr,"a",%progbits
-	.set	.LANCHOR150,. + 0
+	.set	.LANCHOR147,. + 0
 	.type	samsung_14nm_slc_rr, %object
 	.size	samsung_14nm_slc_rr, 26
 samsung_14nm_slc_rr:

commit 1f71919f4fef703c4ab1881e06539b1533267634
Author: Shunqing Chen <csq@rock-chips.com>
Date:   Thu Feb 4 11:07:10 2021 +0000

    drm/rockchip: dw-hdmi: support ddc i2c bus
    
    Signed-off-by: Shunqing Chen <csq@rock-chips.com>
    Change-Id: Iec5fc4ea5c5c13069a8fe0895222028d1a739edc

diff --git a/drivers/video/drm/dw_hdmi.c b/drivers/video/drm/dw_hdmi.c
old mode 100644
new mode 100755
index 996499b701..c2e07fdfc9
--- a/drivers/video/drm/dw_hdmi.c
+++ b/drivers/video/drm/dw_hdmi.c
@@ -11,6 +11,7 @@
 #include <asm/arch/vendor.h>
 #include <edid.h>
 #include <dm/device.h>
+#include <dm/of_access.h>
 #include <dm/ofnode.h>
 #include <dm/read.h>
 #include <linux/hdmi.h>
@@ -2270,6 +2271,7 @@ int rockchip_dw_hdmi_init(struct display_state *state)
 	struct drm_display_mode *mode_buf;
 	ofnode hdmi_node = conn_state->node;
 	u32 val;
+	struct device_node *ddc_node;
 
 	hdmi = malloc(sizeof(struct dw_hdmi));
 	if (!hdmi)
@@ -2293,6 +2295,14 @@ int rockchip_dw_hdmi_init(struct display_state *state)
 	else
 		hdmi->hdcp1x_enable = false;
 
+	ddc_node = of_parse_phandle(ofnode_to_np(hdmi_node), "ddc-i2c-bus", 0);
+	if (ddc_node) {
+		uclass_get_device_by_ofnode(UCLASS_I2C, np_to_ofnode(ddc_node),
+					    &hdmi->adap.i2c_bus);
+		if (hdmi->adap.i2c_bus)
+			hdmi->adap.ops = i2c_get_ops(hdmi->adap.i2c_bus);
+	}
+
 	hdmi->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 	if (hdmi->grf <= 0) {
 		printf("%s: Get syscon grf failed (ret=%p)\n",

commit 3186eac9cfaea1382ec794e12d7dad380f4b39e9
Author: Shunqing Chen <csq@rock-chips.com>
Date:   Thu Feb 4 11:04:23 2021 +0000

    edid: support get edid by standard i2c
    
    Signed-off-by: Shunqing Chen <csq@rock-chips.com>
    Change-Id: Ie7d4ebc0a45db55cb6cdd0dcfc763b0d2e1e0778

diff --git a/common/edid.c b/common/edid.c
index 7a69b9be69..503e612642 100644
--- a/common/edid.c
+++ b/common/edid.c
@@ -6366,8 +6366,14 @@ drm_do_probe_ddc_edid(struct ddc_adapter *adap, u8 *buf, unsigned int block,
 			}
 		};
 
-		ret = adap->ddc_xfer(adap, &msgs[3 - xfers], xfers);
-
+		if (adap->ops) {
+			ret = adap->ops->xfer(adap->i2c_bus, &msgs[3 - xfers],
+					      xfers);
+			if (!ret)
+				ret = xfers;
+		} else {
+			ret = adap->ddc_xfer(adap, &msgs[3 - xfers], xfers);
+		}
 	} while (ret != xfers && --retries);
 
 	/* All msg transfer successfully. */
diff --git a/include/edid.h b/include/edid.h
index aa2d0aaa7e..acd9113674 100644
--- a/include/edid.h
+++ b/include/edid.h
@@ -825,6 +825,8 @@ struct hdmi_edid_data {
 struct ddc_adapter {
 	int (*ddc_xfer)(struct ddc_adapter *adap, struct i2c_msg *msgs,
 			int num);
+	struct udevice *i2c_bus;
+	struct dm_i2c_ops *ops;
 };
 
 /**

commit 5158c8f25bf56eacc5a32d79da258fc63f26a3ef
Author: Miquel Raynal <miquel.raynal@bootlin.com>
Date:   Thu Sep 6 09:08:45 2018 +0200

    UPSTREAM: cmd: mtdparts: accept spi-nand devices
    
    Let spi-nand devices be recognized by mtdparts. This is superfluous
    but a full mtdparts rework would be very time-consuming.
    
    Change-Id: I876349174057359b475d2cd4ce367a1c444b4148
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Acked-by: Jagan Teki <jagan@openedev.com>
    Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
    Reviewed-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 00ac922db4085982011438e9471e0fcacca2e8fc)

diff --git a/cmd/mtdparts.c b/cmd/mtdparts.c
index 85d5b99fb7..ad745e6059 100644
--- a/cmd/mtdparts.c
+++ b/cmd/mtdparts.c
@@ -38,7 +38,7 @@
  * mtdids=<idmap>[,<idmap>,...]
  *
  * <idmap>    := <dev-id>=<mtd-id>
- * <dev-id>   := 'nand'|'nor'|'onenand'<dev-num>
+ * <dev-id>   := 'nand'|'nor'|'onenand'|'spi-nand'<dev-num>
  * <dev-num>  := mtd device number, 0...
  * <mtd-id>   := unique device tag used by linux kernel to find mtd device (mtd->name)
  *
@@ -340,7 +340,7 @@ static int part_validate_eraseblock(struct mtdids *id, struct part_info *part)
 
 	if (!mtd->numeraseregions) {
 		/*
-		 * Only one eraseregion (NAND, OneNAND or uniform NOR),
+		 * Only one eraseregion (NAND, SPI-NAND, OneNAND or uniform NOR),
 		 * checking for alignment is easy here
 		 */
 		offset = part->offset;
@@ -1031,7 +1031,7 @@ static struct mtdids* id_find_by_mtd_id(const char *mtd_id, unsigned int mtd_id_
 }
 
 /**
- * Parse device id string <dev-id> := 'nand'|'nor'|'onenand'<dev-num>,
+ * Parse device id string <dev-id> := 'nand'|'nor'|'onenand'|'spi-nand'<dev-num>,
  * return device type and number.
  *
  * @param id string describing device id
@@ -1055,6 +1055,9 @@ int mtd_id_parse(const char *id, const char **ret_id, u8 *dev_type,
 	} else if (strncmp(p, "onenand", 7) == 0) {
 		*dev_type = MTD_DEV_TYPE_ONENAND;
 		p += 7;
+	} else if (strncmp(p, "spi-nand", 8) == 0) {
+		*dev_type = MTD_DEV_TYPE_SPINAND;
+		p += 8;
 	} else {
 		printf("incorrect device type in %s\n", id);
 		return 1;
@@ -1637,7 +1640,7 @@ static int parse_mtdids(const char *const ids)
 	while(p && (*p != '\0')) {
 
 		ret = 1;
-		/* parse 'nor'|'nand'|'onenand'<dev-num> */
+		/* parse 'nor'|'nand'|'onenand'|'spi-nand'<dev-num> */
 		if (mtd_id_parse(p, &p, &type, &num) != 0)
 			break;
 
@@ -2113,7 +2116,7 @@ static char mtdparts_help_text[] =
 	"'mtdids' - linux kernel mtd device id <-> u-boot device id mapping\n\n"
 	"mtdids=<idmap>[,<idmap>,...]\n\n"
 	"<idmap>    := <dev-id>=<mtd-id>\n"
-	"<dev-id>   := 'nand'|'nor'|'onenand'<dev-num>\n"
+	"<dev-id>   := 'nand'|'nor'|'onenand'|'spi-nand'<dev-num>\n"
 	"<dev-num>  := mtd device number, 0...\n"
 	"<mtd-id>   := unique device tag used by linux kernel to find mtd device (mtd->name)\n\n"
 	"'mtdparts' - partition list\n\n"
diff --git a/include/jffs2/load_kernel.h b/include/jffs2/load_kernel.h
index dd0d23fa52..aad19b632f 100644
--- a/include/jffs2/load_kernel.h
+++ b/include/jffs2/load_kernel.h
@@ -17,9 +17,12 @@
 #define MTD_DEV_TYPE_NOR	0x0001
 #define MTD_DEV_TYPE_NAND	0x0002
 #define MTD_DEV_TYPE_ONENAND	0x0004
+#define MTD_DEV_TYPE_SPINAND	0x0008
 
-#define MTD_DEV_TYPE(type) ((type == MTD_DEV_TYPE_NAND) ? "nand" :	\
-			(type == MTD_DEV_TYPE_ONENAND) ? "onenand" : "nor")
+#define MTD_DEV_TYPE(type) (type == MTD_DEV_TYPE_NAND ? "nand" :	\
+			    (type == MTD_DEV_TYPE_NOR ? "nor" :		\
+			     (type == MTD_DEV_TYPE_ONENAND ? "onenand" : \
+			      "spi-nand")))				\
 
 struct mtd_device {
 	struct list_head link;

commit 1132854c2455c1f77b79a3d605359ea5b4107906
Author: Miquel Raynal <miquel.raynal@bootlin.com>
Date:   Thu Aug 16 17:30:21 2018 +0200

    UPSTREAM: cmd: mtdparts: add fallthrough in switch statement
    
    Switch blocks for deriving size naturally use fallthrough between
    'case' statements. Make it explicit.
    
    Change-Id: I1eea633226514ee32bf69edb23bb7552a960725c
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 2b9ace5527d33539844fa831e12ad8357a25246e)

diff --git a/cmd/mtdparts.c b/cmd/mtdparts.c
index d0cda1bea4..85d5b99fb7 100644
--- a/cmd/mtdparts.c
+++ b/cmd/mtdparts.c
@@ -178,13 +178,16 @@ static u64 memsize_parse (const char *const ptr, const char **retptr)
 		case 'G':
 		case 'g':
 			ret <<= 10;
+			/* Fallthrough */
 		case 'M':
 		case 'm':
 			ret <<= 10;
+			/* Fallthrough */
 		case 'K':
 		case 'k':
 			ret <<= 10;
 			(*retptr)++;
+			/* Fallthrough */
 		default:
 			break;
 	}

commit f41fe7ae91193c9c8b964821c6fc8f9936a7d24b
Author: Kay Potthoff <kaypotthoff@gmail.com>
Date:   Tue Jul 17 08:19:39 2018 +0200

    UPSTREAM: mtdparts: fixed buffer overflow bug
    
    In the case that there was no name defined for a partition the
    code assumes that name_len is 22 and therefore allocates exactly
    that space for a dummy name. But the function sprintf() first
    resolves "0x%08llx@0x%08llx" to a string that is longer than 22
    bytes. This leads to a buffer overflow. The replacement function
    snprintf() limits the copied bytes to name_len and therefore
    avoids the buffer overflow.
    
    Change-Id: I2ca3a23a2b056cfd80d19651b0f21b04048ac794
    Signed-off-by: Kay Potthoff <Kay.Potthoff@microsys.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 149c21b098dafc5a2ae619555a844e8d0a9523f6)

diff --git a/cmd/mtdparts.c b/cmd/mtdparts.c
index 9bc977450c..d0cda1bea4 100644
--- a/cmd/mtdparts.c
+++ b/cmd/mtdparts.c
@@ -691,7 +691,7 @@ static int part_parse(const char *const partdef, const char **ret, struct part_i
 		part->auto_name = 0;
 	} else {
 		/* auto generated name in form of size@offset */
-		sprintf(part->name, "0x%08llx@0x%08llx", size, offset);
+		snprintf(part->name, name_len, "0x%08llx@0x%08llx", size, offset);
 		part->auto_name = 1;
 	}
 

commit 7dff1373964757151aacab976978a4f2bfff521f
Author: Simon Glass <sjg@chromium.org>
Date:   Mon Dec 4 13:48:21 2017 -0700

    UPSTREAM: mtdparts: Correct use of debug()
    
    The debug() macro now evaluates its expression so does not need #ifdef
    protection. In fact the current code causes a warning with the new log
    implementation. Adjust the code to fix this.
    
    Change-Id: I45700a2b44f8a336a942b328a2910bf4f6fe3695
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 95b41b80d77b8418dac3393784b2a9cbb7abef64)

diff --git a/cmd/mtdparts.c b/cmd/mtdparts.c
index 3169c33265..9bc977450c 100644
--- a/cmd/mtdparts.c
+++ b/cmd/mtdparts.c
@@ -873,15 +873,12 @@ static int device_parse(const char *const mtd_dev, const char **ret, struct mtd_
 		return 1;
 	}
 
-#ifdef DEBUG
 	pend = strchr(p, ';');
-#endif
 	debug("dev type = %d (%s), dev num = %d, mtd-id = %s\n",
 			id->type, MTD_DEV_TYPE(id->type),
 			id->num, id->mtd_id);
 	debug("parsing partitions %.*s\n", (int)(pend ? pend - p : strlen(p)), p);
 
-
 	/* parse partitions */
 	num_parts = 0;
 

commit 25fbb41f6739e72525dd4ae75a35dd90ede3426f
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Fri Feb 26 15:34:06 2021 +0800

    test: rockchip: add test for sata disk
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: I0df26b22a5e5af1a4be367c6f037f417fd1bd68d

diff --git a/test/rockchip/test-rockchip.h b/test/rockchip/test-rockchip.h
index 7ae713ff37..d321b131d2 100644
--- a/test/rockchip/test-rockchip.h
+++ b/test/rockchip/test-rockchip.h
@@ -27,6 +27,7 @@ enum test_id {
 	TEST_ID_POWER,
 	TEST_ID_STORAGE,
 	TEST_ID_USB,
+	TEST_ID_SCSI,
 	TEST_ID_MAX,
 };
 
diff --git a/test/rockchip/test-storage.c b/test/rockchip/test-storage.c
index 9eca38e73b..65207931a7 100644
--- a/test/rockchip/test-storage.c
+++ b/test/rockchip/test-storage.c
@@ -48,6 +48,10 @@ static enum if_type blk_get_type_by_name_and_num(char *devtype, int devnum)
 #ifdef CONFIG_MTD_BLK
 	else if (!strcmp(devtype, "mtd"))
 		type = IF_TYPE_MTD;
+#endif
+#ifdef CONFIG_SCSI
+	else if (!strcmp(devtype, "scsi"))
+		type = IF_TYPE_SCSI;
 #endif
 	else if (!strcmp(devtype, "usb"))
 		type = IF_TYPE_USB;
@@ -298,6 +302,15 @@ static int do_test_blk(cmd_tbl_t *cmdtp, int flag,
 	return do_test_storage(cmdtp, flag, argc, argv, NULL, NULL, "BLK");
 }
 #endif
+
+#ifdef CONFIG_SCSI
+static int do_test_scsi(cmd_tbl_t *cmdtp, int flag,
+			int argc, char *const argv[])
+{
+	return do_test_storage(cmdtp, flag, argc, argv, "scsi", "0", "BLK");
+}
+#endif
+
 #endif/* defined(CONFIG_MMC) ||\
        * defined(CONFIG_RKNAND) ||\
        * defined(CONFIG_DM_RAMDISK) ||\
@@ -453,6 +466,9 @@ static cmd_tbl_t sub_cmd[] = {
 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
 	UNIT_CMD_DEFINE(vendor, 0),
 #endif
+#ifdef CONFIG_SCSI
+	UNIT_CMD_DEFINE(scsi, 0),
+#endif
 };
 
 static char sub_cmd_help[] =
@@ -494,6 +510,9 @@ static char sub_cmd_help[] =
 #ifdef CONFIG_USB_HOST
 "    [.] rktest usb                         - test usb disk\n"
 #endif
+#ifdef CONFIG_SCSI
+"    [.] rktest scsi                        - test sata disk\n"
+#endif
 ;
 
 const struct cmd_group cmd_grp_storage = {

commit 5d68fdf12b9fbcb2584bc324267454ad8fc040e7
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Fri Feb 26 10:45:00 2021 +0800

    rockchip: support sata device boot
    
    The loader stage does not support SATA, and the boot device
    can only be other storage. Therefore, it is necessary to
    initialize the SATA device before judging the initialization
    of atag boot device.
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: I31a215d6e56480a4f42b04efb735ad101dea537c

diff --git a/arch/arm/mach-rockchip/boot_rkimg.c b/arch/arm/mach-rockchip/boot_rkimg.c
index ac9b8c9f78..9c558de508 100644
--- a/arch/arm/mach-rockchip/boot_rkimg.c
+++ b/arch/arm/mach-rockchip/boot_rkimg.c
@@ -47,6 +47,20 @@ static void boot_devtype_init(void)
 	if (done)
 		return;
 
+#if defined(CONFIG_SCSI) && defined(CONFIG_CMD_SCSI) && defined(CONFIG_AHCI)
+	ret = run_command("scsi scan", 0);
+	if (!ret) {
+		ret = run_command("scsi dev 0", 0);
+		if (!ret) {
+			devtype = "scsi";
+			devnum = "0";
+			env_set("devtype", devtype);
+			env_set("devnum", devnum);
+			goto finish;
+		}
+	}
+#endif
+
 	/* High priority: get bootdev from atags */
 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
 	ret = param_parse_bootdev(&devtype, &devnum);
@@ -130,6 +144,9 @@ static int get_bootdev_type(void)
 	} else if (!strcmp(devtype, "mtd")) {
 		type = IF_TYPE_MTD;
 		boot_media = "mtd";
+	} else if (!strcmp(devtype, "scsi")) {
+		type = IF_TYPE_SCSI;
+		boot_media = "scsi";
 	} else {
 		/* Add new to support */
 	}
diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c
index 78d309e8a2..5455d20701 100644
--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
@@ -914,6 +914,14 @@ int arch_cpu_init(void)
 	writel(((0x1 << 14) << 16) | (0x0 << 14), SGRF_BASE + SGRF_SOC_CON3);
 #endif
 
+#if defined(CONFIG_SCSI) && defined(CONFIG_CMD_SCSI) && defined(CONFIG_AHCI)
+	/*
+	 * De-assert reset and config ref clock to default 24Mhz.
+	 */
+	 writel(0x02a00000, CRU_BASE + CRU_SOFTRST_CON28);
+	 writel(0x0FFF0000, 0xFDD00124);
+#endif
+
 	return 0;
 }
 
diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h
index cce44b52a8..0d1e5fe964 100644
--- a/include/configs/rk3568_common.h
+++ b/include/configs/rk3568_common.h
@@ -46,7 +46,13 @@
 
 /* MMC/SD IP block */
 #define CONFIG_BOUNCE_BUFFER
-
+#ifdef CONFIG_AHCI
+#define CONFIG_SYS_SCSI_MAX_SCSI_ID	1
+#define CONFIG_SYS_SCSI_MAX_LUN		1
+/*#define CONFIG_SCSI_AHCI_PLAT */
+#define CONFIG_SYS_SCSI_MAX_DEVICE	(CONFIG_SYS_SCSI_MAX_SCSI_ID * \
+					 CONFIG_SYS_SCSI_MAX_LUN)
+#endif
 /* Nand */
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #define CONFIG_SYS_NAND_ONFI_DETECTION

commit e30e978d2ff47009a20f5339c38910a76f0c00a1
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Thu Feb 25 15:07:20 2021 +0800

    core: device: Add SATA to bind list if we set GD_FLG_RELOC
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: Ie2773a3a559e9e33e4a42a28516f4b994ffe8947

diff --git a/drivers/core/device.c b/drivers/core/device.c
index 0ff6a00f06..c3c775784e 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -55,7 +55,7 @@ static int device_bind_common(struct udevice *parent, const struct driver *drv,
 		/* For mmc/nand/spiflash, just update from kernel dtb instead bind again*/
 		if (drv->id == UCLASS_MMC || drv->id == UCLASS_RKNAND ||
 		    drv->id == UCLASS_SPI_FLASH || drv->id == UCLASS_MTD ||
-		    drv->id == UCLASS_PCI) {
+		    drv->id == UCLASS_PCI || drv->id == UCLASS_AHCI) {
 			/*
 			 * Reject all mmc device from kernel.
 			 *

commit 693a18378f74b9bef2474ce2e3e5c8193fa86311
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Thu Feb 25 15:04:33 2021 +0800

    drivers: ata: update code with master
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: I49e1b4e3ad7631bc066e54b77630b8608d7c4ad1

diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index 803064aaf1..a587349a52 100644
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -20,6 +20,17 @@ config SATA
 
 	  See also CMD_SATA which provides command-line support.
 
+config LIBATA
+	bool
+	help
+	  Select this to build and link the libata helper functions.
+
+config SCSI_AHCI
+	bool "Enable SCSI interface to SATA devices"
+	select LIBATA
+	help
+	  Enable this to allow interfacing SATA devices via the SCSI layer.
+
 menu "SATA/SCSI device support"
 
 config AHCI_PCI
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index 5e4df19386..f047e0c4b5 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -1,15 +1,18 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) Freescale Semiconductor, Inc. 2006.
  * Author: Jason Jin<Jason.jin@freescale.com>
  *         Zhang Wei<wei.zhang@freescale.com>
  *
- * SPDX-License-Identifier:	GPL-2.0+
- *
  * with the reference on libata and ahci drvier in kernel
  *
  * This driver provides a SCSI interface to SATA.
  */
 #include <common.h>
+#include <blk.h>
+#include <log.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 #include <command.h>
 #include <dm.h>
@@ -51,22 +54,13 @@ struct ahci_uc_priv *probe_ent = NULL;
 #define WAIT_MS_FLUSH	5000
 #define WAIT_MS_LINKUP	200
 
+#define AHCI_CAP_S64A BIT(31)
+
 __weak void __iomem *ahci_port_base(void __iomem *base, u32 port)
 {
 	return base + 0x100 + (port * 0x80);
 }
 
-
-static void ahci_setup_port(struct ahci_ioports *port, void __iomem *base,
-			    unsigned int port_idx)
-{
-	base = ahci_port_base(base, port_idx);
-
-	port->cmd_addr = base;
-	port->scr_addr = base + PORT_SCR;
-}
-
-
 #define msleep(a) udelay(a * 1000)
 
 static void ahci_dcache_flush_range(unsigned long begin, unsigned long len)
@@ -231,15 +225,16 @@ static int ahci_host_init(struct ahci_uc_priv *uc_priv)
 	debug("cap 0x%x  port_map 0x%x  n_ports %d\n",
 	      uc_priv->cap, uc_priv->port_map, uc_priv->n_ports);
 
+#if !defined(CONFIG_DM_SCSI)
 	if (uc_priv->n_ports > CONFIG_SYS_SCSI_MAX_SCSI_ID)
 		uc_priv->n_ports = CONFIG_SYS_SCSI_MAX_SCSI_ID;
+#endif
 
 	for (i = 0; i < uc_priv->n_ports; i++) {
 		if (!(port_map & (1 << i)))
 			continue;
 		uc_priv->port[i].port_mmio = ahci_port_base(mmio, i);
 		port_mmio = (u8 *)uc_priv->port[i].port_mmio;
-		ahci_setup_port(&uc_priv->port[i], mmio, i);
 
 		/* make sure port is not active */
 		tmp = readl(port_mmio + PORT_CMD);
@@ -514,9 +509,15 @@ static int ahci_fill_sg(struct ahci_uc_priv *uc_priv, u8 port,
 	}
 
 	for (i = 0; i < sg_count; i++) {
-		ahci_sg->addr =
-		    cpu_to_le32((unsigned long) buf + i * MAX_DATA_BYTE_COUNT);
-		ahci_sg->addr_hi = 0;
+		/* We assume virt=phys */
+		phys_addr_t pa = (unsigned long)buf + i * MAX_DATA_BYTE_COUNT;
+
+		ahci_sg->addr = cpu_to_le32(lower_32_bits(pa));
+		ahci_sg->addr_hi = cpu_to_le32(upper_32_bits(pa));
+		if (ahci_sg->addr_hi && !(uc_priv->cap & AHCI_CAP_S64A)) {
+			printf("Error: DMA address too high\n");
+			return -1;
+		}
 		ahci_sg->flags_size = cpu_to_le32(0x3fffff &
 					  (buf_len < MAX_DATA_BYTE_COUNT
 					   ? (buf_len - 1)
@@ -559,6 +560,7 @@ static int ahci_port_start(struct ahci_uc_priv *uc_priv, u8 port)
 {
 	struct ahci_ioports *pp = &(uc_priv->port[port]);
 	void __iomem *port_mmio = pp->port_mmio;
+	u64 dma_addr;
 	u32 port_status;
 	void __iomem *mem;
 
@@ -570,15 +572,12 @@ static int ahci_port_start(struct ahci_uc_priv *uc_priv, u8 port)
 		return -1;
 	}
 
-	mem = malloc(AHCI_PORT_PRIV_DMA_SZ + 2048);
+	mem = memalign(2048, AHCI_PORT_PRIV_DMA_SZ);
 	if (!mem) {
 		free(pp);
 		printf("%s: No mem for table!\n", __func__);
 		return -ENOMEM;
 	}
-
-	/* Aligned to 2048-bytes */
-	mem = memalign(2048, AHCI_PORT_PRIV_DMA_SZ);
 	memset(mem, 0, AHCI_PORT_PRIV_DMA_SZ);
 
 	/*
@@ -607,10 +606,12 @@ static int ahci_port_start(struct ahci_uc_priv *uc_priv, u8 port)
 	pp->cmd_tbl_sg =
 			(struct ahci_sg *)(uintptr_t)virt_to_phys((void *)mem);
 
-	writel_with_flush((unsigned long)pp->cmd_slot,
-			  port_mmio + PORT_LST_ADDR);
-
-	writel_with_flush(pp->rx_fis, port_mmio + PORT_FIS_ADDR);
+	dma_addr = (ulong)pp->cmd_slot;
+	writel_with_flush(dma_addr, port_mmio + PORT_LST_ADDR);
+	writel_with_flush(dma_addr >> 32, port_mmio + PORT_LST_ADDR_HI);
+	dma_addr = (ulong)pp->rx_fis;
+	writel_with_flush(dma_addr, port_mmio + PORT_FIS_ADDR);
+	writel_with_flush(dma_addr >> 32, port_mmio + PORT_FIS_ADDR_HI);
 
 #ifdef CONFIG_SUNXI_AHCI
 	sunxi_dma_init(port_mmio);
@@ -981,7 +982,7 @@ static int ahci_start_ports(struct ahci_uc_priv *uc_priv)
 
 	linkmap = uc_priv->link_port_map;
 
-	for (i = 0; i < CONFIG_SYS_SCSI_MAX_SCSI_ID; i++) {
+	for (i = 0; i < uc_priv->n_ports; i++) {
 		if (((linkmap >> i) & 0x01)) {
 			if (ahci_port_start(uc_priv, (u8) i)) {
 				printf("Can not start port %d\n", i);
@@ -1181,6 +1182,14 @@ int ahci_probe_scsi(struct udevice *ahci_dev, ulong base)
 	if (ret)
 		return ret;
 
+	/*
+	 * scsi_scan_dev() scans devices up-to the number of max_id.
+	 * Update max_id if the number of detected ports exceeds max_id.
+	 * This allows SCSI to scan all detected ports.
+	 */
+	uc_plat->max_id = max_t(unsigned long, uc_priv->n_ports,
+				uc_plat->max_id);
+
 	return 0;
 }
 
diff --git a/drivers/ata/dwc_ahci.c b/drivers/ata/dwc_ahci.c
index b16304baed..f1af56b28e 100644
--- a/drivers/ata/dwc_ahci.c
+++ b/drivers/ata/dwc_ahci.c
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * DWC SATA platform driver
  *
@@ -5,8 +6,6 @@
  *     Texas Instruments Incorporated, <www.ti.com>
  *
  * Author: Mugunthan V N <mugunthanvnm@ti.com>
- *
- * SPDX-License-Identifier:     GPL-2.0+
  */
 
 #include <common.h>
@@ -14,29 +13,27 @@
 #include <ahci.h>
 #include <scsi.h>
 #include <sata.h>
-#include <asm/arch/sata.h>
 #include <asm/io.h>
 #include <generic-phy.h>
 
-DECLARE_GLOBAL_DATA_PTR;
-
 struct dwc_ahci_priv {
 	void *base;
 	void *wrapper_base;
 };
 
+static int dwc_ahci_bind(struct udevice *dev)
+{
+	struct udevice *scsi_dev;
+
+	return ahci_bind_scsi(dev, &scsi_dev);
+}
+
 static int dwc_ahci_ofdata_to_platdata(struct udevice *dev)
 {
 	struct dwc_ahci_priv *priv = dev_get_priv(dev);
-	struct scsi_platdata *plat = dev_get_uclass_platdata(dev);
 	fdt_addr_t addr;
 
-	plat->max_id = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev),
-				       "max-id", CONFIG_SYS_SCSI_MAX_SCSI_ID);
-	plat->max_lun = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev),
-					"max-lun", CONFIG_SYS_SCSI_MAX_LUN);
-
-	priv->base = map_physmem(devfdt_get_addr(dev), sizeof(void *),
+	priv->base = map_physmem(dev_read_addr(dev), sizeof(void *),
 				 MAP_NOCACHE);
 
 	addr = devfdt_get_addr_index(dev, 1);
@@ -74,18 +71,7 @@ static int dwc_ahci_probe(struct udevice *dev)
 		return ret;
 	}
 
-	if (priv->wrapper_base) {
-		u32 val = TI_SATA_IDLE_NO | TI_SATA_STANDBY_NO;
-
-		/* Enable SATA module, No Idle, No Standby */
-		writel(val, priv->wrapper_base + TI_SATA_SYSCONFIG);
-	}
-
-	ret = ahci_init_dm(dev, priv->base);
-	if (ret)
-		return ret;
-
-	return achi_start_ports_dm(dev);
+	return ahci_probe_scsi(dev, (ulong)priv->base);
 }
 
 static const struct udevice_id dwc_ahci_ids[] = {
@@ -95,11 +81,11 @@ static const struct udevice_id dwc_ahci_ids[] = {
 
 U_BOOT_DRIVER(dwc_ahci) = {
 	.name	= "dwc_ahci",
-	.id	= UCLASS_SCSI,
+	.id	= UCLASS_AHCI,
 	.of_match = dwc_ahci_ids,
+	.bind	= dwc_ahci_bind,
 	.ofdata_to_platdata = dwc_ahci_ofdata_to_platdata,
 	.ops	= &scsi_ops,
 	.probe	= dwc_ahci_probe,
-	.priv_auto_alloc_size = sizeof(struct dwc_ahci_priv),
-	.flags = DM_FLAG_ALLOC_PRIV_DMA,
+	.priv_auto_alloc_size	= sizeof(struct dwc_ahci_priv),
 };

commit 925c5749ea015ffbc9144ac77e67685672c5be52
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Thu Feb 25 15:02:39 2021 +0800

    drivers: phy: add naneng combphy for rk3568
    
    RK3568 has three combo phys, and PCIe/USB3/SATA/QSGMII controllers
    share one pipe interface for each combo phy, here is the diagram of
    the complex connection.
    
    +----------------+
    |                |     +------+
    | USB3 OTG CTRL0 |---->|      |
    |                |     |      |     +------------+
    +----------------+     | PIPE |     |            |
                           | MUX  |---->| Combo PHY0 |
    +----------------+     |      |     |            |
    |                |     |      |     +------------+
    |   SATA CTRL0   |---->|      |
    |                |     +------+
    +----------------+
    
    +----------------+
    |                |     +------+
    | USB3 HOST CTRL1|---->|      |
    |                |     |      |     +------------+
    +----------------+     | PIPE |     |            |
                           | MUX  |---->| Combo PHY1 |
    +----------------+     |      |     |            |
    |                |---->|      |     +------------+
    |   SATA CTRL1   |  -->|      |
    |                |  |  +------+
    +----------------+  |
                        |
    +----------------+  |
    |                |  |  +------+
    |  QSGMII CTRL   |---->|      |
    |                |     |      |     +------------+
    +----------------+     | PIPE |     |            |
                           | MUX  |---->| Combo PHY2 |
    +----------------+     |      |     |            |
    |                |---->|      |     +------------+
    |   SATA CTRL2   |  -->|      |
    |                |  |  +------+
    +----------------+  |
                        |
    +----------------+  |
    |                |  |
    |  PCIe2 1-Lane  |---
    |                |
    +----------------+
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: I9c035c9df201e3c923c14398e48582e6e877f6fc

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 2759d6c7f1..66fede437e 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -65,6 +65,12 @@ config PHY_ROCKCHIP_INNO_USB2
 	help
 	  Support for Rockchip USB 2.0 PHY with Innosilicon IP block.
 
+config PHY_ROCKCHIP_NANENG_COMBOPHY
+	bool "Support Rockchip NANENG combo PHY Driver"
+	depends on PHY && ARCH_ROCKCHIP
+	help
+	  Enable this to support the Rockchip NANENG combo PHY.
+
 config PHY_ROCKCHIP_NANENG_USB2
 	bool "Support Rockchip Naneng USB2PHY"
 	depends on PHY && ARCH_ROCKCHIP
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index a3dd975226..58798fc588 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -15,3 +15,4 @@ obj-$(CONFIG_PHY_ROCKCHIP_SNPS_PCIE3) += phy-rockchip-snps-pcie3.o
 obj-$(CONFIG_PHY_ROCKCHIP_TYPEC) += phy-rockchip-typec.o
 obj-$(CONFIG_PHY_SANDBOX) += sandbox-phy.o
 obj-$(CONFIG_$(SPL_)PIPE3_PHY) += ti-pipe3-phy.o
+obj-$(CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY) += phy-rockchip-naneng-combphy.o
diff --git a/drivers/phy/phy-rockchip-naneng-combphy.c b/drivers/phy/phy-rockchip-naneng-combphy.c
new file mode 100644
index 0000000000..2a3ee55ebe
--- /dev/null
+++ b/drivers/phy/phy-rockchip-naneng-combphy.c
@@ -0,0 +1,437 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Rockchip USB3.0/PCIe Gen2/SATA/SGMII combphy driver
+ *
+ * Copyright (C) 2021 Rockchip Electronics Co., Ltd.
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <dm/lists.h>
+#include <dt-bindings/phy/phy.h>
+#include <generic-phy.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <regmap.h>
+#include <reset-uclass.h>
+
+#define BIT_WRITEABLE_SHIFT		16
+
+struct rockchip_combphy_priv;
+
+struct combphy_reg {
+	u16 offset;
+	u16 bitend;
+	u16 bitstart;
+	u16 disable;
+	u16 enable;
+};
+
+struct rockchip_combphy_grfcfg {
+	struct combphy_reg pcie_mode_set;
+	struct combphy_reg usb_mode_set;
+	struct combphy_reg sgmii_mode_set;
+	struct combphy_reg qsgmii_mode_set;
+	struct combphy_reg pipe_rxterm_set;
+	struct combphy_reg pipe_txelec_set;
+	struct combphy_reg pipe_txcomp_set;
+	struct combphy_reg pipe_clk_25m;
+	struct combphy_reg pipe_clk_100m;
+	struct combphy_reg pipe_phymode_sel;
+	struct combphy_reg pipe_rate_sel;
+	struct combphy_reg pipe_rxterm_sel;
+	struct combphy_reg pipe_txelec_sel;
+	struct combphy_reg pipe_txcomp_sel;
+	struct combphy_reg pipe_clk_ext;
+	struct combphy_reg pipe_sel_usb;
+	struct combphy_reg pipe_sel_qsgmii;
+	struct combphy_reg pipe_phy_status;
+	struct combphy_reg con0_for_pcie;
+	struct combphy_reg con1_for_pcie;
+	struct combphy_reg con2_for_pcie;
+	struct combphy_reg con3_for_pcie;
+	struct combphy_reg con0_for_sata;
+	struct combphy_reg con1_for_sata;
+	struct combphy_reg con2_for_sata;
+	struct combphy_reg con3_for_sata;
+	struct combphy_reg pipe_con0_for_sata;
+	struct combphy_reg pipe_sgmii_mac_sel;
+	struct combphy_reg pipe_xpcs_phy_ready;
+	struct combphy_reg u3otg0_port_en;
+	struct combphy_reg u3otg1_port_en;
+};
+
+struct rockchip_combphy_cfg {
+	const struct rockchip_combphy_grfcfg *grfcfg;
+	int (*combphy_cfg)(struct rockchip_combphy_priv *priv);
+};
+
+struct rockchip_combphy_priv {
+	u32 mode;
+	void __iomem *mmio;
+	struct udevice *dev;
+	struct regmap *pipe_grf;
+	struct regmap *phy_grf;
+	struct phy *phy;
+	struct reset_ctl phy_rst;
+	struct clk ref_clk;
+	const struct rockchip_combphy_cfg *cfg;
+};
+
+static int param_write(struct regmap *base,
+		       const struct combphy_reg *reg, bool en)
+{
+	u32 val, mask, tmp;
+
+	tmp = en ? reg->enable : reg->disable;
+	mask = GENMASK(reg->bitend, reg->bitstart);
+	val = (tmp << reg->bitstart) | (mask << BIT_WRITEABLE_SHIFT);
+
+	return regmap_write(base, reg->offset, val);
+}
+
+static int rockchip_combphy_pcie_init(struct rockchip_combphy_priv *priv)
+{
+	int ret = 0;
+
+	if (priv->cfg->combphy_cfg) {
+		ret = priv->cfg->combphy_cfg(priv);
+		if (ret) {
+			dev_err(priv->dev, "failed to init phy for pcie\n");
+			return ret;
+		}
+	}
+
+	return ret;
+}
+
+static int rockchip_combphy_usb3_init(struct rockchip_combphy_priv *priv)
+{
+	int ret = 0;
+
+	if (priv->cfg->combphy_cfg) {
+		ret = priv->cfg->combphy_cfg(priv);
+		if (ret) {
+			dev_err(priv->dev, "failed to init phy for usb3\n");
+			return ret;
+		}
+	}
+
+	return ret;
+}
+
+static int rockchip_combphy_sata_init(struct rockchip_combphy_priv *priv)
+{
+	int ret = 0;
+
+	if (priv->cfg->combphy_cfg) {
+		ret = priv->cfg->combphy_cfg(priv);
+		if (ret) {
+			dev_err(priv->dev, "failed to init phy for sata\n");
+			return ret;
+		}
+	}
+
+	return ret;
+}
+
+static int rockchip_combphy_sgmii_init(struct rockchip_combphy_priv *priv)
+{
+	int ret = 0;
+
+	if (priv->cfg->combphy_cfg) {
+		ret = priv->cfg->combphy_cfg(priv);
+		if (ret) {
+			dev_err(priv->dev, "failed to init phy for sgmii\n");
+			return ret;
+		}
+	}
+
+	return ret;
+}
+
+static int rockchip_combphy_set_mode(struct rockchip_combphy_priv *priv)
+{
+	switch (priv->mode) {
+	case PHY_TYPE_PCIE:
+		rockchip_combphy_pcie_init(priv);
+		break;
+	case PHY_TYPE_USB3:
+		rockchip_combphy_usb3_init(priv);
+		break;
+	case PHY_TYPE_SATA:
+		rockchip_combphy_sata_init(priv);
+		break;
+	case PHY_TYPE_SGMII:
+	case PHY_TYPE_QSGMII:
+		return rockchip_combphy_sgmii_init(priv);
+	default:
+		dev_err(priv->dev, "incompatible PHY type\n");
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int rockchip_combphy_init(struct phy *phy)
+{
+	struct rockchip_combphy_priv *priv = dev_get_priv(phy->dev);
+	int ret;
+
+	ret = clk_enable(&priv->ref_clk);
+	if (ret < 0 && ret != -ENOSYS)
+		return ret;
+
+	ret = rockchip_combphy_set_mode(priv);
+	if (ret)
+		goto err_clk;
+
+	reset_deassert(&priv->phy_rst);
+
+	return 0;
+
+err_clk:
+	clk_disable(&priv->ref_clk);
+
+	return ret;
+}
+
+static int rockchip_combphy_exit(struct phy *phy)
+{
+	struct rockchip_combphy_priv *priv = dev_get_priv(phy->dev);
+
+	clk_disable(&priv->ref_clk);
+	reset_assert(&priv->phy_rst);
+
+	return 0;
+}
+
+static int rockchip_combphy_xlate(struct phy *phy, struct ofnode_phandle_args *args)
+{
+	struct rockchip_combphy_priv *priv = dev_get_priv(phy->dev);
+
+	if (args->args_count != 1) {
+		pr_err("invalid number of arguments\n");
+		return -EINVAL;
+	}
+
+	priv->mode = args->args[0];
+
+	return 0;
+}
+
+static const struct phy_ops rochchip_combphy_ops = {
+	.init = rockchip_combphy_init,
+	.exit = rockchip_combphy_exit,
+	.of_xlate = rockchip_combphy_xlate,
+};
+
+static int rockchip_combphy_parse_dt(struct udevice *dev,
+				     struct rockchip_combphy_priv *priv)
+{
+	struct udevice *syscon;
+	int ret;
+
+	ret = uclass_get_device_by_phandle(UCLASS_SYSCON, dev, "rockchip,pipe-grf", &syscon);
+	if (ret) {
+		dev_err(dev, "failed to find peri_ctrl pipe-grf regmap");
+		return ret;
+	}
+	priv->pipe_grf = syscon_get_regmap(syscon);
+
+	ret = uclass_get_device_by_phandle(UCLASS_SYSCON, dev, "rockchip,pipe-phy-grf", &syscon);
+	if (ret) {
+		dev_err(dev, "failed to find peri_ctrl pipe-phy-grf regmap\n");
+		return ret;
+	}
+	priv->phy_grf = syscon_get_regmap(syscon);
+
+	ret = clk_get_by_index(dev, 0, &priv->ref_clk);
+	if (ret) {
+		dev_err(dev, "failed to find ref clock\n");
+		return PTR_ERR(&priv->ref_clk);
+	}
+
+	ret = reset_get_by_index(dev, 0, &priv->phy_rst);
+	if (ret) {
+		dev_err(dev, "no phy reset control specified\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+static int rockchip_combphy_probe(struct udevice *udev)
+{
+	struct rockchip_combphy_priv *priv = dev_get_priv(udev);
+	const struct rockchip_combphy_cfg *phy_cfg;
+	int ret;
+
+	priv->mmio = (void __iomem *)dev_read_addr(udev);
+	if (IS_ERR(priv->mmio))
+		return PTR_ERR(priv->mmio);
+
+	phy_cfg = (const struct rockchip_combphy_cfg *)dev_get_driver_data(udev);
+	if (!phy_cfg) {
+		dev_err(udev, "No OF match data provided\n");
+		return -EINVAL;
+	}
+
+	priv->dev = udev;
+	priv->mode = PHY_TYPE_SATA;
+	priv->cfg = phy_cfg;
+
+	ret = rockchip_combphy_parse_dt(udev, priv);
+	if (ret)
+		return ret;
+
+	ret = rockchip_combphy_set_mode(priv);
+
+	return ret;
+}
+
+static int rk3568_combphy_cfg(struct rockchip_combphy_priv *priv)
+{
+	const struct rockchip_combphy_grfcfg *cfg = priv->cfg->grfcfg;
+	u32 val;
+
+	switch (priv->mode) {
+	case PHY_TYPE_PCIE:
+		/* Set SSC downward spread spectrum */
+		val = readl(priv->mmio + (0x1f << 2));
+		val &= ~GENMASK(5, 4);
+		val |= 0x01 << 4;
+		writel(val, priv->mmio + 0x7c);
+
+		param_write(priv->phy_grf, &cfg->con0_for_pcie, true);
+		param_write(priv->phy_grf, &cfg->con1_for_pcie, true);
+		param_write(priv->phy_grf, &cfg->con2_for_pcie, true);
+		param_write(priv->phy_grf, &cfg->con3_for_pcie, true);
+		break;
+	case PHY_TYPE_USB3:
+		/* Set SSC downward spread spectrum */
+		val = readl(priv->mmio + (0x1f << 2));
+		val &= ~GENMASK(5, 4);
+		val |= 0x01 << 4;
+		writel(val, priv->mmio + 0x7c);
+
+		/* Enable adaptive CTLE for USB3.0 Rx */
+		val = readl(priv->mmio + (0x0e << 2));
+		val &= ~GENMASK(0, 0);
+		val |= 0x01;
+		writel(val, priv->mmio + (0x0e << 2));
+
+		param_write(priv->phy_grf, &cfg->pipe_sel_usb, true);
+		param_write(priv->phy_grf, &cfg->pipe_txcomp_sel, false);
+		param_write(priv->phy_grf, &cfg->pipe_txelec_sel, false);
+		param_write(priv->phy_grf, &cfg->usb_mode_set, true);
+		break;
+	case PHY_TYPE_SATA:
+		writel(0x41, priv->mmio + 0x38);
+		writel(0x8F, priv->mmio + 0x18);
+		param_write(priv->phy_grf, &cfg->con0_for_sata, true);
+		param_write(priv->phy_grf, &cfg->con1_for_sata, true);
+		param_write(priv->phy_grf, &cfg->con2_for_sata, true);
+		param_write(priv->phy_grf, &cfg->con3_for_sata, true);
+		param_write(priv->pipe_grf, &cfg->pipe_con0_for_sata, true);
+		break;
+	case PHY_TYPE_SGMII:
+		param_write(priv->pipe_grf, &cfg->pipe_xpcs_phy_ready, true);
+		param_write(priv->phy_grf, &cfg->pipe_phymode_sel, true);
+		param_write(priv->phy_grf, &cfg->pipe_sel_qsgmii, true);
+		param_write(priv->phy_grf, &cfg->sgmii_mode_set, true);
+		break;
+	case PHY_TYPE_QSGMII:
+		param_write(priv->pipe_grf, &cfg->pipe_xpcs_phy_ready, true);
+		param_write(priv->phy_grf, &cfg->pipe_phymode_sel, true);
+		param_write(priv->phy_grf, &cfg->pipe_rate_sel, true);
+		param_write(priv->phy_grf, &cfg->pipe_sel_qsgmii, true);
+		param_write(priv->phy_grf, &cfg->qsgmii_mode_set, true);
+		break;
+	default:
+		pr_err("%s, phy-type %d\n", __func__, priv->mode);
+		return -EINVAL;
+	}
+
+	/* The default ref clock is 24Mhz */
+	if (priv->mode == PHY_TYPE_USB3 || priv->mode == PHY_TYPE_SATA) {
+		/* Set ssc_cnt[9:0]=0101111101 & 31.5KHz */
+		val = readl(priv->mmio + (0x0e << 2));
+		val &= ~GENMASK(7, 6);
+		val |= 0x01 << 6;
+		writel(val, priv->mmio + (0x0e << 2));
+
+		val = readl(priv->mmio + (0x0f << 2));
+		val &= ~GENMASK(7, 0);
+		val |= 0x5f;
+		writel(val, priv->mmio + (0x0f << 2));
+	}
+
+	if (dev_read_bool(priv->dev, "rockchip,enable-ssc")) {
+		val = readl(priv->mmio + (0x7 << 2));
+		val |= BIT(4);
+		writel(val, priv->mmio + (0x7 << 2));
+	}
+
+	return 0;
+}
+
+static const struct rockchip_combphy_grfcfg rk3568_combphy_grfcfgs = {
+	/* pipe-phy-grf */
+	.pcie_mode_set		= { 0x0000, 5, 0, 0x00, 0x11 },
+	.usb_mode_set		= { 0x0000, 5, 0, 0x00, 0x04 },
+	.sgmii_mode_set		= { 0x0000, 5, 0, 0x00, 0x01 },
+	.qsgmii_mode_set	= { 0x0000, 5, 0, 0x00, 0x21 },
+	.pipe_rxterm_set	= { 0x0000, 12, 12, 0x00, 0x01 },
+	.pipe_txelec_set	= { 0x0004, 1, 1, 0x00, 0x01 },
+	.pipe_txcomp_set	= { 0x0004, 4, 4, 0x00, 0x01 },
+	.pipe_clk_25m		= { 0x0004, 14, 13, 0x00, 0x01 },
+	.pipe_clk_100m		= { 0x0004, 14, 13, 0x00, 0x02 },
+	.pipe_phymode_sel	= { 0x0008, 1, 1, 0x00, 0x01 },
+	.pipe_rate_sel		= { 0x0008, 2, 2, 0x00, 0x01 },
+	.pipe_rxterm_sel	= { 0x0008, 8, 8, 0x00, 0x01 },
+	.pipe_txelec_sel	= { 0x0008, 12, 12, 0x00, 0x01 },
+	.pipe_txcomp_sel	= { 0x0008, 15, 15, 0x00, 0x01 },
+	.pipe_clk_ext		= { 0x000c, 9, 8, 0x02, 0x01 },
+	.pipe_sel_usb		= { 0x000c, 14, 13, 0x00, 0x01 },
+	.pipe_sel_qsgmii	= { 0x000c, 15, 13, 0x00, 0x07 },
+	.pipe_phy_status	= { 0x0034, 6, 6, 0x01, 0x00 },
+	.con0_for_pcie		= { 0x0000, 15, 0, 0x00, 0x1000 },
+	.con1_for_pcie		= { 0x0004, 15, 0, 0x00, 0x0000 },
+	.con2_for_pcie		= { 0x0008, 15, 0, 0x00, 0x0101 },
+	.con3_for_pcie		= { 0x000c, 15, 0, 0x00, 0x0200 },
+	.con0_for_sata		= { 0x0000, 15, 0, 0x00, 0x0119 },
+	.con1_for_sata		= { 0x0004, 15, 0, 0x00, 0x0040 },
+	.con2_for_sata		= { 0x0008, 15, 0, 0x00, 0x80c3 },
+	.con3_for_sata		= { 0x000c, 15, 0, 0x00, 0x4407 },
+	/* pipe-grf */
+	.pipe_con0_for_sata	= { 0x0000, 15, 0, 0x00, 0x2220 },
+	.pipe_sgmii_mac_sel	= { 0x0040, 1, 1, 0x00, 0x01 },
+	.pipe_xpcs_phy_ready	= { 0x0040, 2, 2, 0x00, 0x01 },
+	.u3otg0_port_en		= { 0x0104, 15, 0, 0x0181, 0x1100 },
+	.u3otg1_port_en		= { 0x0144, 15, 0, 0x0181, 0x1100 },
+};
+
+static const struct rockchip_combphy_cfg rk3568_combphy_cfgs = {
+	.grfcfg		= &rk3568_combphy_grfcfgs,
+	.combphy_cfg	= rk3568_combphy_cfg,
+};
+
+static const struct udevice_id rockchip_combphy_ids[] = {
+	{
+		.compatible = "rockchip,rk3568-naneng-combphy",
+		.data = (ulong)&rk3568_combphy_cfgs
+	},
+	{ }
+};
+
+U_BOOT_DRIVER(rockchip_naneng_combphy) = {
+	.name		= "naneng-combphy",
+	.id		= UCLASS_PHY,
+	.of_match	= rockchip_combphy_ids,
+	.ops		= &rochchip_combphy_ops,
+	.probe		= rockchip_combphy_probe,
+	.priv_auto_alloc_size = sizeof(struct rockchip_combphy_priv),
+};

commit e89f80e10eeb7ce7cc087ad6446d9ec8290cd4c7
Author: Michal Simek <michal.simek@xilinx.com>
Date:   Wed Jul 22 13:58:54 2020 +0200

    dt-bindings: Sync include/dt-bindings/phy/phy.h from Linux
    
    Add 4 new phy types which are present in Linux kernel.
    DP and SGMII types are used on Xilinx ZynqMP devices.
    
    Signed-off-by: Michal Simek <michal.simek@xilinx.com>
    Change-Id: I2936173a68a0d42a2e403f2edf4a9b7ae2a89676

diff --git a/include/dt-bindings/phy/phy.h b/include/dt-bindings/phy/phy.h
index d16e8755f6..d3714edd4b 100644
--- a/include/dt-bindings/phy/phy.h
+++ b/include/dt-bindings/phy/phy.h
@@ -16,5 +16,9 @@
 #define PHY_TYPE_USB2		3
 #define PHY_TYPE_USB3		4
 #define PHY_TYPE_UFS		5
+#define PHY_TYPE_DP		6
+#define PHY_TYPE_XPCS		7
+#define PHY_TYPE_SGMII		8
+#define PHY_TYPE_QSGMII		9
 
 #endif /* _DT_BINDINGS_PHY */

commit c613b7ea04ffbb50804660e622edd7d028013fba
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Mon Mar 15 11:20:33 2021 +0800

    drm/rockchip: dw-hdmi: Fixe the condition for EDID read failure
    
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
    Change-Id: I558573eb4e5f5665f41f3e00c7bfe07109db150b

diff --git a/drivers/video/drm/dw_hdmi.c b/drivers/video/drm/dw_hdmi.c
index 03d18cdb21..996499b701 100644
--- a/drivers/video/drm/dw_hdmi.c
+++ b/drivers/video/drm/dw_hdmi.c
@@ -2413,7 +2413,7 @@ int rockchip_dw_hdmi_get_timing(struct display_state *state)
 		hdmi->sink_has_audio = drm_detect_monitor_audio(edid);
 		ret = drm_add_edid_modes(&hdmi->edid_data, conn_state->edid);
 	}
-	if (ret <= 0) {
+	if (ret < 0) {
 		hdmi->sink_is_hdmi = true;
 		hdmi->sink_has_audio = true;
 		do_cea_modes(&hdmi->edid_data, def_modes_vic,

commit 0d2d6a97b51e3ef27ae3ac97934ef7fbf5955e6d
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Mon Mar 15 16:14:58 2021 +0800

    drm/rockchip: vop2: fix display error when reboot loader
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: I456673186d0e3433980d7f25be9077b452854287

diff --git a/drivers/video/drm/rockchip_vop2.c b/drivers/video/drm/rockchip_vop2.c
index b4a4454188..6b2d8af1cb 100644
--- a/drivers/video/drm/rockchip_vop2.c
+++ b/drivers/video/drm/rockchip_vop2.c
@@ -861,7 +861,7 @@ static int rockchip_vop2_preinit(struct display_state *state)
 	int i = 0;
 
 	if (!rockchip_vop2) {
-		rockchip_vop2 = malloc(sizeof(struct vop2));
+		rockchip_vop2 = calloc(1, sizeof(struct vop2));
 		if (!rockchip_vop2)
 			return -ENOMEM;
 		rockchip_vop2->regs = dev_read_addr_ptr(cstate->dev);

commit 4c6453e8b2f024a9f5f1139e994c0313ddbe6a4f
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Thu Mar 11 17:41:09 2021 +0800

    rkflash: Support more slc nand
    
    Change-Id: I215e0ef2c7190508e3bd270730b9eea2dcd21e51
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/flash.c b/drivers/rkflash/flash.c
index 3a15aa78a5..0bb38d9cc4 100644
--- a/drivers/rkflash/flash.c
+++ b/drivers/rkflash/flash.c
@@ -448,6 +448,9 @@ u32 nandc_flash_init(void __iomem *nandc_addr)
 			    id_byte[0][1] != 0xDC &&
 			    id_byte[0][1] != 0xD3 &&
 			    id_byte[0][1] != 0x48 &&
+			    id_byte[0][1] != 0xA1 &&
+			    id_byte[0][1] != 0xAA &&
+			    id_byte[0][1] != 0xAC &&
 			    id_byte[0][1] != 0x6A)
 				return FTL_UNSUPPORTED_FLASH;
 		}
@@ -455,11 +458,11 @@ u32 nandc_flash_init(void __iomem *nandc_addr)
 	if (id_byte[0][0] == 0x98 && (id_byte[0][4] & 0x80))
 		g_nand_ecc_en = 1;
 	nand_para.nand_id[1] = id_byte[0][1];
-	if (id_byte[0][1] == 0xDA) {
+	if (id_byte[0][1] == 0xDA || id_byte[0][1] == 0xAA || id_byte[0][1] == 0x6A) {
 		nand_para.plane_per_die = 2;
-		nand_para.nand_id[1] = 0xDA;
-	} else if (id_byte[0][1] == 0xDC) {
-		nand_para.nand_id[1] = 0xDC;
+		nand_para.nand_id[1] = id_byte[0][1];
+	} else if (id_byte[0][1] == 0xDC || id_byte[0][1] == 0xAC) {
+		nand_para.nand_id[1] = id_byte[0][1];
 		if ((id_byte[0][0] == 0x2C && id_byte[0][3] == 0xA6) ||
 		    (id_byte[0][0] == 0xC2 && id_byte[0][3] == 0xA2)) {
 			nand_para.plane_per_die = 2;

commit 62b8d780f82f212ca3d49b06019913d994c0a96d
Author: William Wu <william.wu@rock-chips.com>
Date:   Thu Mar 11 17:47:31 2021 +0800

    rockchip: dts: rk3128: move u2phy to the child node of grf
    
    This patch fix the issue that rk312x fail to enter rockusb
    with the following log:
    
    RKUSB: LUN 0, dev 0, hwpart 0, sector 0x0, count 0x1e1c000
    get syscon grf failed
    otg_phy_init: get u2phy node failed: -19
    
    Fixes: e475bd5dfda4 ("phy: rockchip-inno-usb2: add usb2 phy support for rk3568")
    Signed-off-by: William Wu <william.wu@rock-chips.com>
    Change-Id: Idb949a81bbfdff48619fe6d137ee831fffd714ab

diff --git a/arch/arm/dts/rk3128.dtsi b/arch/arm/dts/rk3128.dtsi
index 928310aec5..db0f1dbbde 100644
--- a/arch/arm/dts/rk3128.dtsi
+++ b/arch/arm/dts/rk3128.dtsi
@@ -451,35 +451,6 @@
 		interrupts = <GIC_PPI 9 0xf04>;
 	};
 
-	u2phy: usb2-phy {
-		compatible = "rockchip,rk3128-usb2phy";
-		reg = <0x017c 0x0c>;
-		rockchip,grf = <&grf>;
-		clocks = <&cru SCLK_OTGPHY0>;
-		clock-names = "phyclk";
-		#clock-cells = <0>;
-		clock-output-names = "usb480m_phy";
-		#phy-cells = <1>;
-		status = "disabled";
-
-		u2phy_otg: otg-port {
-			#phy-cells = <0>;
-			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
-			interrupt-names = "otg-bvalid", "otg-id",
-					  "linestate";
-			status = "disabled";
-		};
-
-		u2phy_host: host-port {
-			#phy-cells = <0>;
-			interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
-			interrupt-names = "linestate";
-			status = "disabled";
-		};
-	};
-
 	usb_otg: usb@10180000 {
 		compatible = "rockchip,rk3128-usb", "rockchip,rk3288-usb",
 			     "snps,dwc2";
@@ -666,6 +637,35 @@
 				};
 			};
 		};
+
+		u2phy: usb2-phy@17c {
+			compatible = "rockchip,rk3128-usb2phy";
+			reg = <0x017c 0x0c>;
+			clocks = <&cru SCLK_OTGPHY0>;
+			clock-names = "phyclk";
+			#clock-cells = <0>;
+			clock-output-names = "usb480m_phy";
+			assigned-clocks = <&cru SCLK_USB480M>;
+			assigned-clock-parents = <&u2phy>;
+			status = "disabled";
+
+			u2phy_otg: otg-port {
+				#phy-cells = <0>;
+				interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
+					     <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
+					     <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
+				interrupt-names = "otg-bvalid", "otg-id",
+						  "linestate";
+				status = "disabled";
+			};
+
+			u2phy_host: host-port {
+				#phy-cells = <0>;
+				interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
+				interrupt-names = "linestate";
+				status = "disabled";
+			};
+		};
 	};
 
 	pinctrl: pinctrl@20008000 {

commit b407f8b0a64e13cbdfc14cede48feca3a8a9f863
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Mar 11 09:14:20 2021 +0800

    mmc: sdhci: rockchip: reset the mmc dll
    
    Reset the MMC dll when the frequency is lower than 52MHz.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Id6e5946f7f7daa87d36ee634e43e1598e8b2b605

diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index 56105702b4..378eb97d5d 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -350,6 +350,7 @@ static int rk3568_sdhci_emmc_set_clock(struct sdhci_host *host, unsigned int clo
 		udelay(1);
 	} else {
 		/* reset the clock phase when the frequency is lower than 52MHz */
+		sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_CTRL);
 		extra = DLL_RXCLK_NO_INVERTER << DWCMSHC_EMMC_DLL_RXCLK_SRCSEL;
 		sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_RXCLK);
 		sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_TXCLK);

commit c24827627016e56a293b43873dab0ad99563c0b8
Author: Shawn Lin <shawn.lin@rock-chips.com>
Date:   Tue Mar 2 16:51:16 2021 +0800

    drivers: pci: Add bifurcation mode support
    
    Change-Id: I195b72457d299b974059d4122b3143904d893dab
    Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

diff --git a/drivers/pci/pcie_dw_rockchip.c b/drivers/pci/pcie_dw_rockchip.c
index 48506d3157..b5a1bbcdfe 100644
--- a/drivers/pci/pcie_dw_rockchip.c
+++ b/drivers/pci/pcie_dw_rockchip.c
@@ -35,6 +35,7 @@ struct rk_pcie {
 	struct gpio_desc	rst_gpio;
 	struct pci_region	io;
 	struct pci_region	mem;
+	bool		is_bifurcation;
 };
 
 enum {
@@ -553,6 +554,7 @@ static int rockchip_pcie_init_port(struct udevice *dev)
 	int ret;
 	u32 val;
 	struct rk_pcie *priv = dev_get_priv(dev);
+	union phy_configure_opts phy_cfg;
 
 	/* Set power and maybe external ref clk input */
 	if (priv->vpcie3v3) {
@@ -566,6 +568,13 @@ static int rockchip_pcie_init_port(struct udevice *dev)
 
 	msleep(1000);
 
+	if (priv->is_bifurcation) {
+		phy_cfg.pcie.is_bifurcation = true;
+		ret = generic_phy_configure(&priv->phy, &phy_cfg);
+		if (ret)
+			dev_err(dev, "failed to set bifurcation for phy (ret=%d)\n", ret);
+	}
+
 	ret = generic_phy_init(&priv->phy);
 	if (ret) {
 		dev_err(dev, "failed to init phy (ret=%d)\n", ret);
@@ -664,6 +673,9 @@ static int rockchip_pcie_parse_dt(struct udevice *dev)
 		return ret;
 	}
 
+	if (dev_read_bool(dev, "rockchip,bifurcation"))
+		priv->is_bifurcation = true;
+
 	return 0;
 }
 
diff --git a/drivers/phy/phy-rockchip-snps-pcie3.c b/drivers/phy/phy-rockchip-snps-pcie3.c
index bf3aeec876..2baa79bb57 100644
--- a/drivers/phy/phy-rockchip-snps-pcie3.c
+++ b/drivers/phy/phy-rockchip-snps-pcie3.c
@@ -28,6 +28,7 @@ struct rockchip_p3phy_priv {
 	struct clk ref_clk_m;
 	struct clk ref_clk_n;
 	struct clk pclk;
+	bool is_bifurcation;
 };
 
 static int rochchip_p3phy_init(struct phy *phy)
@@ -54,6 +55,14 @@ static int rochchip_p3phy_init(struct phy *phy)
 	regmap_write(priv->phy_grf, GRF_PCIE30PHY_CON9,
 		     (0x1 << 15) | (0x1 << 31));
 
+	/* Set bifurcation if needed */
+	if (priv->is_bifurcation) {
+		regmap_write(priv->phy_grf, GRF_PCIE30PHY_CON6,
+			     0x1 | (0xf << 16));
+		regmap_write(priv->phy_grf, GRF_PCIE30PHY_CON1,
+			     (0x1 << 15) | (0x1 << 31));
+	}
+
 	reset_deassert(&priv->p30phy);
 	udelay(1);
 
@@ -128,9 +137,19 @@ static int rockchip_p3phy_probe(struct udevice *dev)
 	return 0;
 }
 
+static int rockchip_p3phy_configure(struct phy *phy, union phy_configure_opts *opts)
+{
+	struct rockchip_p3phy_priv *priv = dev_get_priv(phy->dev);
+
+	priv->pcie.is_bifurcation = opts->pcie.is_bifurcation;
+
+	return 0;
+}
+
 static struct phy_ops rochchip_p3phy_ops = {
 	.init = rochchip_p3phy_init,
 	.exit = rochchip_p3phy_exit,
+	.configure = rockchip_p3phy_configure,
 };
 
 static const struct udevice_id rockchip_p3phy_of_match[] = {
diff --git a/include/generic-phy-pcie.h b/include/generic-phy-pcie.h
new file mode 100644
index 0000000000..84c06701b4
--- /dev/null
+++ b/include/generic-phy-pcie.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Rockchip Inc.
+ */
+
+#ifndef __PHY_PCIE_H_
+#define __PHY_PCIE_H_
+
+/**
+ * struct phy_configure_opts_pcie - PCIe PHY configuration set
+ *
+ * This structure is used to represent the configuration state of a
+ * PCIe phy.
+ */
+struct phy_configure_opts_pcie {
+	bool is_bifurcation; /* Bifurcation mode support */
+};
+
+#endif /* __PHY_PCIE_H_ */
diff --git a/include/generic-phy.h b/include/generic-phy.h
index 130d044cd2..0392d5fe60 100644
--- a/include/generic-phy.h
+++ b/include/generic-phy.h
@@ -10,6 +10,7 @@
 
 #include <generic-phy-dp.h>
 #include <generic-phy-mipi-dphy.h>
+#include <generic-phy-pcie.h>
 
 enum phy_mode {
 	PHY_MODE_INVALID,
@@ -27,6 +28,7 @@ enum phy_mode {
 union phy_configure_opts {
 	struct phy_configure_opts_mipi_dphy     mipi_dphy;
 	struct phy_configure_opts_dp		dp;
+	struct phy_configure_opts_pcie		pcie;
 };
 
 /**

commit ab26c6f00b1cc6610bb72839ee48ffd03cedc74c
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Mar 9 18:15:43 2021 +0800

    arm: mach-rockchip: fix fdt_stringlist_search for disabled status
    
    Change-Id: Ie762b7cb96a67b5e660ebe290a91efc1d7cd417b
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c
index daa9220a71..78d309e8a2 100644
--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
@@ -971,7 +971,7 @@ static int rk3568_board_fdt_fixup_ethernet(const void *blob, int id)
 
 	/* only fixes the RGMII clock input mode for gmac node */
 	if (fdt_stringlist_search(fdt, gmac_node,
-				  "status", "disabled") >= 0) {
+				  "status", "disabled") < 0) {
 		if (fdt_stringlist_search(fdt, gmac_node,
 					  "phy-mode", "rgmii") >= 0) {
 			if (fdt_stringlist_search(fdt, gmac_node,

commit 71dfb60112b42c23e70ca58553ac5cebb177a873
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Mar 5 09:48:37 2021 +0800

    rockchip: rk3036: decrease malloc length to 20MB
    
    Free more memory space for kernel/fdt/ramdisk, in order
    to fit with 128M memory board.
    
    This avoid issue msg:
    Sysmem Error: "RAMDISK" (0x64000000 - 0x6406f400) alloc is overlap
    with existence "UBOOT" (0x63db94b0 - 0x68000000)
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I84ceb3dc44d26528b067c94c4267953e12e3b19a

diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index 026f11dac0..257d6c1234 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -9,7 +9,7 @@
 #include <asm/arch/hardware.h>
 #include "rockchip-common.h"
 
-#define CONFIG_SYS_MALLOC_LEN		(32 << 20)
+#define CONFIG_SYS_MALLOC_LEN		(20 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
 #define CONFIG_SYS_BOOTM_LEN		(64 << 20)	/*  64M */

commit de52def48ddb76c037c4195a152a6fcb610b48a6
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Mar 8 16:51:00 2021 +0800

    spl: fit: re-compile the file
    
    Error log:
    U-Boot SPL 2017.09-g465b1b6c16-210223-dirty #xzy (Mar 08 2021 - 11:33:47)
    Trying to boot from MTD2
    Verified-boot: 0
    Checking mcu 0x00108000 (gzip @0x00208000) ... sha256+ sha256+ OK
    Checking optee 0x00040000 (gzip @0x00140000) ... sha256+ sha256+ OK
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ideb408d81d6ac183e1a3644ec58bde7a52c1caa4

diff --git a/common/spl/spl_fit_tb_arm_v7.S b/common/spl/spl_fit_tb_arm_v7.S
index f4f5d56910..c5cf36222e 100644
--- a/common/spl/spl_fit_tb_arm_v7.S
+++ b/common/spl/spl_fit_tb_arm_v7.S
@@ -20,7 +20,7 @@
 	.fpu softvfp
 	.type	spl_fit_get_image_name.isra.0, %function
 spl_fit_get_image_name.isra.0:
-.LFB216:
+.LFB220:
 	.file 1 "common/spl/spl_fit_tb_arm_v7.c"
 	.loc 1 32 0
 	.cfi_startproc
@@ -165,7 +165,7 @@ spl_fit_get_image_name.isra.0:
 	.word	.LC5
 	.word	.LC6
 	.cfi_endproc
-.LFE216:
+.LFE220:
 	.size	spl_fit_get_image_name.isra.0, .-spl_fit_get_image_name.isra.0
 	.section	.text.spl_fit_get_image_node,"ax",%progbits
 	.align	1
@@ -175,7 +175,7 @@ spl_fit_get_image_name.isra.0:
 	.fpu softvfp
 	.type	spl_fit_get_image_node, %function
 spl_fit_get_image_node:
-.LFB202:
+.LFB206:
 	.loc 1 88 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
@@ -222,7 +222,7 @@ spl_fit_get_image_node:
 	@ sp needed
 	pop	{r4, r5, pc}
 	.cfi_endproc
-.LFE202:
+.LFE206:
 	.size	spl_fit_get_image_node, .-spl_fit_get_image_node
 	.global	__aeabi_idivmod
 	.global	__aeabi_idiv
@@ -234,7 +234,7 @@ spl_fit_get_image_node:
 	.fpu softvfp
 	.type	spl_load_fit_image, %function
 spl_load_fit_image:
-.LFB206:
+.LFB210:
 	.loc 1 166 0
 	.cfi_startproc
 	@ args = 8, pretend = 0, frame = 48
@@ -542,7 +542,7 @@ spl_load_fit_image:
 .LBB47:
 .LBB48:
 	.file 2 "include/image.h"
-	.loc 2 1003 0
+	.loc 2 1005 0
 	movs	r2, #0
 	mov	r1, r5
 	mov	r0, r4
@@ -557,7 +557,7 @@ spl_load_fit_image:
 .LVL76:
 .LBB51:
 .LBB49:
-	.loc 2 1003 0 is_stmt 1
+	.loc 2 1005 0 is_stmt 1
 	bl	fdt_get_name
 .LVL77:
 .LBE49:
@@ -566,7 +566,7 @@ spl_load_fit_image:
 	movs	r3, #0
 .LBB52:
 .LBB50:
-	.loc 2 1003 0
+	.loc 2 1005 0
 	mov	r7, r0
 .LVL78:
 .LBE50:
@@ -622,7 +622,7 @@ spl_load_fit_image:
 .L32:
 .LBB53:
 .LBB54:
-	.loc 2 1003 0
+	.loc 2 1005 0
 	bl	fdt_get_name
 .LVL86:
 .LBE54:
@@ -675,7 +675,7 @@ spl_load_fit_image:
 	.word	.LC11
 	.word	.LC8
 	.cfi_endproc
-.LFE206:
+.LFE210:
 	.size	spl_load_fit_image, .-spl_load_fit_image
 	.section	.text.spl_fit_append_fdt,"ax",%progbits
 	.align	1
@@ -685,7 +685,7 @@ spl_load_fit_image:
 	.fpu softvfp
 	.type	spl_fit_append_fdt, %function
 spl_fit_append_fdt:
-.LFB207:
+.LFB211:
 	.loc 1 311 0
 	.cfi_startproc
 	@ args = 8, pretend = 0, frame = 48
@@ -763,7 +763,7 @@ spl_fit_append_fdt:
 .L76:
 	.word	.LC0
 	.cfi_endproc
-.LFE207:
+.LFE211:
 	.size	spl_fit_append_fdt, .-spl_fit_append_fdt
 	.section	.text.spl_fit_load_blob,"ax",%progbits
 	.align	1
@@ -773,7 +773,7 @@ spl_fit_append_fdt:
 	.fpu softvfp
 	.type	spl_fit_load_blob, %function
 spl_fit_load_blob:
-.LFB211:
+.LFB215:
 	.loc 1 383 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
@@ -848,7 +848,7 @@ spl_fit_load_blob:
 .L81:
 	.word	4194241
 	.cfi_endproc
-.LFE211:
+.LFE215:
 	.size	spl_fit_load_blob, .-spl_fit_load_blob
 	.section	.text.spl_fit_standalone_release,"ax",%progbits
 	.align	1
@@ -859,7 +859,7 @@ spl_fit_load_blob:
 	.fpu softvfp
 	.type	spl_fit_standalone_release, %function
 spl_fit_standalone_release:
-.LFB210:
+.LFB214:
 	.loc 1 376 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
@@ -871,7 +871,7 @@ spl_fit_standalone_release:
 .LVL119:
 	bx	lr
 	.cfi_endproc
-.LFE210:
+.LFE214:
 	.size	spl_fit_standalone_release, .-spl_fit_standalone_release
 	.section	.text.spl_kernel_partition,"ax",%progbits
 	.align	1
@@ -882,7 +882,7 @@ spl_fit_standalone_release:
 	.fpu softvfp
 	.type	spl_kernel_partition, %function
 spl_kernel_partition:
-.LFB212:
+.LFB216:
 	.loc 1 432 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
@@ -898,7 +898,7 @@ spl_kernel_partition:
 .L85:
 	.word	.LC14
 	.cfi_endproc
-.LFE212:
+.LFE216:
 	.size	spl_kernel_partition, .-spl_kernel_partition
 	.section	.text.spl_load_simple_fit,"ax",%progbits
 	.align	1
@@ -909,10 +909,10 @@ spl_kernel_partition:
 	.fpu softvfp
 	.type	spl_load_simple_fit, %function
 spl_load_simple_fit:
-.LFB215:
+.LFB219:
 	.loc 1 755 0
 	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 216
+	@ args = 0, pretend = 0, frame = 248
 	@ frame_needed = 1, uses_anonymous_args = 0
 .LVL122:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
@@ -925,387 +925,349 @@ spl_load_simple_fit:
 	.cfi_offset 10, -12
 	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	sub	sp, sp, #232
-	.cfi_def_cfa_offset 264
-	mov	r4, r0
-	mov	r5, r1
+	sub	sp, sp, #264
+	.cfi_def_cfa_offset 296
 	add	r7, sp, #16
-	.cfi_def_cfa 7, 248
-	.loc 1 755 0
-	mov	r10, r2
+	.cfi_def_cfa 7, 280
 .LVL123:
-	.loc 1 757 0
-	mvn	fp, #21
 	.loc 1 755 0
-	str	r3, [r7, #20]
-	.loc 1 760 0
-	movs	r3, #0
+	mov	r5, r1
+	mov	r4, r0
+	str	r2, [r7, #28]
 .LVL124:
-	str	r3, [r7, #24]
+	mov	r2, r3
 .LVL125:
-.L121:
-	.loc 1 761 0
-	ldr	r3, [r7, #24]
-	cmp	r3, #1
-	bne	.L88
-	.loc 1 763 0
-	ldr	r1, [r5, #8]
-	mov	r0, #2097152
-	bl	__aeabi_idiv
+	ldr	r3, [r3]
 .LVL126:
-	.loc 1 762 0
-	add	r10, r10, r0
+	.loc 1 771 0
+	ldr	r1, .L145
 .LVL127:
-	.loc 1 764 0
-	ldr	r0, .L153
-	mov	r1, r10
-	bl	printf
+	rev	r3, r3
 .LVL128:
-	.loc 1 765 0
-	ldr	r6, [r5, #16]
-	mov	r1, r10
-	ldr	r3, [r7, #20]
-	mov	r0, r5
-	ldr	r2, [r7, #24]
-	blx	r6
-.LVL129:
-	cmp	r0, #1
+	cmp	r3, r1
+	str	r1, [r7]
 	beq	.L88
-	.loc 1 766 0
-	ldr	r0, .L153+4
-.L152:
 	.loc 1 772 0
+	ldr	r0, .L145+4
+.LVL129:
 	bl	printf
 .LVL130:
-.L89:
-	.loc 1 760 0 discriminator 2
-	ldr	r3, [r7, #24]
-	adds	r3, r3, #1
-	cmp	r3, #2
-	str	r3, [r7, #24]
+	.loc 1 773 0
+	mvn	r0, #21
 .LVL131:
-	beq	.L87
-	b	.L121
+.L87:
+	.loc 1 787 0
+	adds	r7, r7, #248
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	mov	sp, r7
+	.cfi_def_cfa_register 13
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
 .LVL132:
 .L88:
-	ldr	r3, [r7, #20]
-	.loc 1 771 0
-	ldr	r2, .L153+8
-	ldr	r3, [r3]
-	rev	r3, r3
-.LVL133:
-	cmp	r3, r2
-	beq	.L90
-	.loc 1 772 0
-	ldr	r0, .L153+12
-	b	.L152
-.L90:
-.LVL134:
+	.cfi_restore_state
 .LBB82:
 .LBB83:
 	.loc 1 564 0
-	add	r3, r7, #40
-	ldr	r2, [r7, #20]
-	mov	r1, r10
+	add	r3, r7, #36
+	ldr	r1, [r7, #28]
 	mov	r0, r5
+.LVL133:
 	bl	spl_fit_load_blob
-.LVL135:
+.LVL134:
 	.loc 1 565 0
 	mov	r6, r0
 	cmp	r0, #0
-	beq	.L91
+	beq	.L90
 	.loc 1 571 0
-	ldr	r1, .L153+16
+	ldr	r1, .L145+8
 	bl	fdt_path_offset
-.LVL136:
+.LVL135:
 	.loc 1 572 0
-	subs	r3, r0, #0
-	str	r3, [r7, #28]
-	blt	.L91
+	subs	r10, r0, #0
+	blt	.L90
 	.loc 1 578 0
 	bl	fit_board_verify_required_sigs
-.LVL137:
-	mov	fp, r0
-	cbz	r0, .L92
+.LVL136:
+	mov	r8, r0
+	cbz	r0, .L91
 	.loc 1 580 0
-	ldr	r0, .L153+20
+	ldr	r0, .L145+12
 	bl	printf
-.LVL138:
+.LVL137:
 	.loc 1 581 0
 	bl	hang
-.LVL139:
-.L92:
+.LVL138:
+.L91:
 	.loc 1 627 0
 	mov	r3, r0
-	ldr	r2, .L153+24
-	ldr	r1, [r7, #28]
+	ldr	r2, .L145+16
+	mov	r1, r10
 	mov	r0, r6
 	bl	spl_fit_get_image_node
-.LVL140:
+.LVL139:
 	.loc 1 629 0
-	subs	r8, r0, #0
-	ble	.L93
+	subs	fp, r0, #0
+	ble	.L92
 	.loc 1 631 0
-	add	r3, r7, #96
-	str	r8, [sp]
+	add	r3, r7, #92
+	str	fp, [sp]
 	str	r3, [sp, #4]
 	mov	r2, r6
-	ldr	r3, [r7, #40]
-	mov	r1, r10
+	ldr	r3, [r7, #36]
 	mov	r0, r5
-.LVL141:
+.LVL140:
+	ldr	r1, [r7, #28]
 	bl	spl_load_fit_image
-.LVL142:
+.LVL141:
 	.loc 1 633 0
-	cbnz	r0, .L95
+	cbnz	r0, .L94
 	.loc 1 634 0
-	ldr	r3, [r7, #108]
+	ldr	r3, [r7, #104]
 	adds	r3, r3, #1
 	.loc 1 635 0
 	itt	eq
-	ldreq	r3, [r7, #104]
-	streq	r3, [r7, #108]
+	ldreq	r3, [r7, #100]
+	streq	r3, [r7, #104]
 	.loc 1 637 0
-	ldr	r0, [r7, #108]
-.LVL143:
+	ldr	r0, [r7, #104]
+.LVL142:
 	bl	spl_fit_standalone_release
-.LVL144:
+.LVL143:
 	.loc 1 638 0
 	mov	r1, r0
-	cbz	r0, .L95
+	cbz	r0, .L94
 	.loc 1 639 0
-	ldr	r0, .L153+28
-.LVL145:
+	ldr	r0, .L145+20
+.LVL144:
 	bl	printf
-.LVL146:
-.L95:
+.LVL145:
+.L94:
 	.loc 1 654 0
 	movs	r3, #0
-	ldr	r2, .L153+32
-	ldr	r1, [r7, #28]
+	ldr	r2, .L145+24
+	mov	r1, r10
 	mov	r0, r6
 	bl	spl_fit_get_image_node
-.LVL147:
+.LVL146:
 	.loc 1 660 0
-	subs	r8, r0, #0
-	bge	.L98
+	subs	fp, r0, #0
+	bge	.L97
 	.loc 1 662 0
 	movs	r3, #0
-	ldr	r2, .L153+36
-	ldr	r1, [r7, #28]
+	ldr	r2, .L145+28
+	mov	r1, r10
 	mov	r0, r6
-.LVL148:
+.LVL147:
 	bl	spl_fit_get_image_node
-.LVL149:
+.LVL148:
 	.loc 1 669 0
-	subs	r8, r0, #0
-	blt	.L91
+	subs	fp, r0, #0
+	blt	.L90
 	.loc 1 667 0
-	mov	fp, #1
-	b	.L98
-.LVL150:
-.L93:
+	mov	r8, #1
+	b	.L97
+.LVL149:
+.L92:
 	.loc 1 653 0
-	bne	.L95
-	mov	fp, r8
-.LVL151:
-.L98:
+	bne	.L94
+	mov	r8, fp
+.LVL150:
+.L97:
 	.loc 1 676 0
 	str	r4, [sp, #4]
 	mov	r2, r6
-	str	r8, [sp]
-	mov	r1, r10
-	ldr	r3, [r7, #40]
+	str	fp, [sp]
 	mov	r0, r5
-.LVL152:
+.LVL151:
+	ldr	r3, [r7, #36]
+	ldr	r1, [r7, #28]
 	bl	spl_load_fit_image
-.LVL153:
+.LVL152:
 	.loc 1 678 0
 	cmp	r0, #0
-	bne	.L99
-.LVL154:
+	bne	.L87
+.LVL153:
 .LBB84:
 .LBB85:
 	.loc 1 371 0
 	adds	r2, r4, #4
-.LVL155:
-	mov	r1, r8
+.LVL154:
+	mov	r1, fp
 	mov	r0, r6
-.LVL156:
+.LVL155:
 	bl	fit_image_get_os
-.LVL157:
+.LVL156:
 .LBE85:
 .LBE84:
 	.loc 1 685 0
-	cbz	r0, .L100
+	cbz	r0, .L99
 	.loc 1 689 0
 	movs	r3, #17
 	strb	r3, [r4, #4]
-.L100:
+.L99:
 	.loc 1 696 0
 	ldrb	r3, [r4, #4]	@ zero_extendqisi2
 	cmp	r3, #17
-	bne	.L108
+	bne	.L107
 	.loc 1 697 0
-	ldr	r3, [r7, #40]
-	mov	r2, r10
+	ldr	r3, [r7, #36]
 	mov	r1, r5
+	str	r10, [sp]
 	mov	r0, r4
 	str	r3, [sp, #4]
-	ldr	r3, [r7, #28]
-	str	r3, [sp]
 	mov	r3, r6
+	ldr	r2, [r7, #28]
 	bl	spl_fit_append_fdt
-.LVL158:
-.L108:
+.LVL157:
+.L107:
 .LBB86:
 	.loc 1 702 0
 	movs	r3, #0
 	.loc 1 704 0
-	ldr	r2, .L153+36
+	ldr	r2, .L145+28
 	.loc 1 702 0
-	strb	r3, [r7, #36]
+	strb	r3, [r7, #32]
 	.loc 1 704 0
+	mov	r1, r10
+	mov	r3, r8
 	mov	r0, r6
-	mov	r3, fp
-	ldr	r1, [r7, #28]
 	bl	spl_fit_get_image_node
-.LVL159:
+.LVL158:
 	.loc 1 705 0
 	subs	r3, r0, #0
-	str	r3, [r7, #24]
-	blt	.L102
-.LVL160:
+	blt	.L101
+.LVL159:
 .LBB87:
 .LBB88:
 	.loc 1 371 0
+	add	r2, r7, #32
+.LVL160:
 	mov	r1, r3
-	add	r2, r7, #36
-.LVL161:
 	mov	r0, r6
-.LVL162:
+.LVL161:
+	str	r3, [r7, #24]
 	bl	fit_image_get_os
-.LVL163:
+.LVL162:
 .LBE88:
 .LBE87:
 	.loc 1 712 0
-	ldr	r3, [r4, #28]
-	cmp	r3, #2
-	bne	.L103
-	ldrb	r3, [r7, #36]	@ zero_extendqisi2
-	cmp	r3, #17
-	beq	.L111
-.L103:
+	ldr	r2, [r4, #28]
+	ldr	r3, [r7, #24]
+	cmp	r2, #2
+	bne	.L102
+	ldrb	r2, [r7, #32]	@ zero_extendqisi2
+	cmp	r2, #17
+	beq	.L110
+.L102:
 	.loc 1 716 0
-	add	r8, r7, #96
+	add	fp, r7, #92
 	mov	r2, r6
-	str	r8, [sp, #4]
-	mov	r1, r10
-	ldr	r3, [r7, #24]
+	stm	sp, {r3, fp}
 	mov	r0, r5
-	str	r3, [sp]
-	ldr	r3, [r7, #40]
+	ldr	r3, [r7, #36]
+	ldr	r1, [r7, #28]
 	bl	spl_load_fit_image
-.LVL164:
+.LVL163:
 	.loc 1 718 0
 	cmp	r0, #0
-	blt	.L111
+	blt	.L110
 	.loc 1 721 0
-	ldrb	r3, [r7, #36]	@ zero_extendqisi2
+	ldrb	r3, [r7, #32]	@ zero_extendqisi2
 	cmp	r3, #17
-	bne	.L105
+	bne	.L104
 	.loc 1 722 0
-	ldr	r3, [r7, #40]
-	mov	r2, r10
+	ldr	r3, [r7, #36]
 	mov	r1, r5
-	mov	r0, r8
-.LVL165:
+	str	r10, [sp]
+	mov	r0, fp
+.LVL164:
 	str	r3, [sp, #4]
-	ldr	r3, [r7, #28]
-	str	r3, [sp]
 	mov	r3, r6
+	ldr	r2, [r7, #28]
 	bl	spl_fit_append_fdt
-.LVL166:
+.LVL165:
 	.loc 1 724 0
-	ldr	r3, [r7, #116]
+	ldr	r3, [r7, #112]
 	str	r3, [r4, #20]
-.L105:
+.L104:
 	.loc 1 731 0
 	ldr	r3, [r4, #12]
 	adds	r3, r3, #1
-	bne	.L106
+	bne	.L105
 	.loc 1 732 0
-	ldr	r3, [r7, #108]
+	ldr	r3, [r7, #104]
 	.loc 1 731 0
 	adds	r2, r3, #1
 	.loc 1 733 0
 	it	ne
 	strne	r3, [r4, #12]
-.L106:
+.L105:
 	.loc 1 736 0
 	ldr	r3, [r4, #20]
 	str	r3, [r7, #24]
-.LVL167:
+.LVL166:
 	cmp	r3, #0
-	beq	.L111
-.LVL168:
+	beq	.L110
+.LVL167:
 .LBB89:
 .LBB90:
 	.loc 1 351 0
-	add	r3, r7, #52
-.LVL169:
-	mov	r2, fp
-	ldr	r1, .L153+36
+	add	r3, r7, #48
+.LVL168:
+	mov	r2, r8
+	ldr	r1, .L145+28
 	mov	r0, r6
 	bl	spl_fit_get_image_name.isra.0
-.LVL170:
+.LVL169:
 	.loc 1 353 0
 	cmp	r0, #0
-	blt	.L111
+	blt	.L110
 	.loc 1 356 0
-	mov	r3, fp
-	ldr	r2, .L153+36
-	ldr	r1, [r7, #28]
+	mov	r3, r8
+	ldr	r2, .L145+28
+	mov	r1, r10
 	mov	r0, r6
-.LVL171:
+.LVL170:
 	bl	spl_fit_get_image_node
-.LVL172:
+.LVL171:
 	.loc 1 358 0
-	ldr	r3, [r7, #52]
+	ldr	r3, [r7, #48]
 	.loc 1 360 0
 	mov	r1, r0
 	.loc 1 356 0
-	mov	r8, r0
-.LVL173:
+	mov	fp, r0
+.LVL172:
 	.loc 1 360 0
-	ldr	r2, .L153+40
+	ldr	r2, .L145+32
 	mov	r0, r6
-.LVL174:
+.LVL173:
 	.loc 1 358 0
 	str	r3, [r7, #20]
-	ldr	r3, [r7, #104]
+	ldr	r3, [r7, #100]
 	str	r3, [r7, #16]
-	ldr	r3, [r7, #128]
+	ldr	r3, [r7, #124]
 	str	r3, [r7, #12]
-	ldr	r3, [r7, #108]
+	ldr	r3, [r7, #104]
 	str	r3, [r7, #8]
 	.loc 1 360 0
 	movs	r3, #0
 	bl	fdt_getprop
-.LVL175:
+.LVL174:
 	.loc 1 361 0
 	movs	r3, #0
 	.loc 1 360 0
 	str	r0, [r7, #4]
 	.loc 1 361 0
-	ldr	r2, .L153+44
-	mov	r1, r8
+	ldr	r2, .L145+36
+	mov	r1, fp
 	mov	r0, r6
 	bl	fdt_getprop
-.LVL176:
+.LVL175:
 	.loc 1 358 0
 	str	r0, [sp, #12]
-	mov	r1, fp
+	mov	r1, r8
 	ldr	r3, [r7, #4]
 	str	r3, [sp, #8]
 	ldr	r3, [r7, #8]
@@ -1316,45 +1278,46 @@ spl_load_simple_fit:
 	ldr	r2, [r7, #20]
 	ldr	r0, [r7, #24]
 	bl	fdt_record_loadable
-.LVL177:
-.L111:
+.LVL176:
+.L110:
 .LBE90:
 .LBE89:
 .LBE86:
 	.loc 1 701 0
-	add	fp, fp, #1
+	add	r8, r8, #1
+.LVL177:
+	b	.L107
 .LVL178:
-	b	.L108
-.LVL179:
-.L102:
+.L101:
 	.loc 1 747 0
 	ldr	r3, [r4, #12]
 	subs	r3, r3, #1
 	adds	r3, r3, #3
-	bls	.L110
+	bls	.L109
 	.loc 1 748 0
 	ldr	r3, [r4, #8]
 	str	r3, [r4, #12]
-.L110:
-.LVL180:
+.L109:
+.LVL179:
 .LBE83:
 .LBE82:
 .LBB92:
 .LBB93:
 	.loc 1 449 0
-	ldr	r3, .L153+48
+	ldr	r3, .L145+40
 	.loc 1 439 0
-	str	sp, [r7, #20]
+	str	sp, [r7, #24]
 	.loc 1 449 0
 	ldm	r3, {r0, r1, r2}
-	add	r3, r7, #40
+	add	r3, r7, #36
 	stm	r3, {r0, r1, r2}
-.LVL181:
+.LVL180:
 	.loc 1 451 0
 	ldr	r3, [r5, #8]
 	adds	r3, r3, #7
 	bic	r3, r3, #7
 	sub	sp, sp, r3
+.LVL181:
 	.loc 1 458 0
 	ldr	r3, [r4, #28]
 	.loc 1 451 0
@@ -1362,7 +1325,7 @@ spl_load_simple_fit:
 .LVL182:
 	.loc 1 458 0
 	cmp	r3, #2
-	bne	.L122
+	bne	.L119
 .LVL183:
 	.loc 1 465 0
 	mov	r1, r5
@@ -1370,46 +1333,38 @@ spl_load_simple_fit:
 	bl	spl_kernel_partition
 .LVL184:
 	.loc 1 466 0
-	add	r2, r7, #96
+	add	r2, r7, #92
 	mov	r1, r0
 	ldr	r0, [r5]
 .LVL185:
 	bl	part_get_info_by_name
 .LVL186:
 	cmp	r0, #0
-	bgt	.L112
+	bgt	.L111
 	.loc 1 467 0
-	ldr	r1, .L153+52
-	ldr	r0, .L153+56
-.L151:
-	.loc 1 481 0
-	mvn	fp, #21
+	ldr	r1, .L145+44
+	ldr	r0, .L145+48
+.L144:
 	.loc 1 480 0
 	bl	printf
 .LVL187:
-.L113:
-	ldr	sp, [r7, #20]
+	.loc 1 481 0
+	mvn	r0, #21
 .LVL188:
-.L87:
+.L112:
+	ldr	sp, [r7, #24]
+.LVL189:
 .LBE93:
 .LBE92:
-	.loc 1 787 0
-	mov	r0, fp
-	adds	r7, r7, #216
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-	mov	sp, r7
-	.cfi_def_cfa_register 13
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL189:
-.L112:
-	.cfi_restore_state
+	.loc 1 782 0
+	b	.L87
+.LVL190:
+.L111:
 .LBB95:
 .LBB94:
 	.loc 1 470 0
-	ldr	r8, [r7, #96]
-.LVL190:
+	ldr	r8, [r7, #92]
+.LVL191:
 	.loc 1 474 0
 	mov	r3, r10
 	ldr	r6, [r5, #16]
@@ -1417,174 +1372,169 @@ spl_load_simple_fit:
 	mov	r0, r5
 	mov	r1, r8
 	blx	r6
-.LVL191:
-	cmp	r0, #1
-	bne	.L124
 .LVL192:
-	ldr	r3, [r10]
+	cmp	r0, #1
+	bne	.L121
+.LVL193:
+	ldr	r3, [r10]
 	.loc 1 479 0
-	ldr	r2, .L153+8
+	ldr	r2, [r7]
 	rev	r3, r3
-.LVL193:
+.LVL194:
 	cmp	r3, r2
-	beq	.L114
+	beq	.L113
 	.loc 1 480 0
-	ldr	r1, .L153+52
-	ldr	r0, .L153+60
-	b	.L151
-.L154:
-	.align	2
-.L153:
-	.word	.LC15
-	.word	.LC16
-	.word	-804389139
-	.word	.LC17
-	.word	.LC18
-	.word	.LC19
-	.word	.LC20
-	.word	.LC21
-	.word	.LC22
-	.word	.LC23
-	.word	.LC24
-	.word	.LC25
-	.word	.LANCHOR1
-	.word	.LANCHOR0
-	.word	.LC26
-	.word	.LC27
-.L114:
+	ldr	r1, .L145+44
+	ldr	r0, .L145+52
+	b	.L144
+.L113:
 	.loc 1 484 0
-	add	r3, r7, #36
+	add	r3, r7, #32
 	mov	r2, r10
 	mov	r1, r8
 	mov	r0, r5
 	bl	spl_fit_load_blob
-.LVL194:
+.LVL195:
 	.loc 1 485 0
 	str	r0, [r7, #28]
+.LVL196:
 	cmp	r0, #0
-	beq	.L125
+	beq	.L122
 	.loc 1 507 0
-	ldr	r1, .L155
+	ldr	r1, .L145+8
 	bl	fdt_path_offset
-.LVL195:
+.LVL197:
 	.loc 1 508 0
-	subs	r3, r0, #0
-	str	r3, [r7, #24]
-	blt	.L126
+	subs	fp, r0, #0
+	blt	.L123
 	movs	r6, #0
-.LVL196:
-.L119:
+.LVL198:
+.L118:
 	.loc 1 515 0
-	add	r3, r7, #40
-	ldr	r1, [r7, #24]
+	add	r3, r7, #36
+	mov	r1, fp
 	ldr	r10, [r3, r6, lsl #2]
 	movs	r3, #0
 	ldr	r0, [r7, #28]
 	mov	r2, r10
 	bl	spl_fit_get_image_node
-.LVL197:
+.LVL199:
 	.loc 1 517 0
 	cmp	r0, #0
-	blt	.L116
+	blt	.L115
 	.loc 1 522 0
-	add	r3, r7, #52
+	add	r3, r7, #48
 	mov	r1, r8
 	stm	sp, {r0, r3}
 	mov	r0, r5
-.LVL198:
-	ldr	r3, [r7, #36]
+.LVL200:
+	ldr	r3, [r7, #32]
 	ldr	r2, [r7, #28]
 	bl	spl_load_fit_image
-.LVL199:
+.LVL201:
 	.loc 1 524 0
-	mov	fp, r0
 	cmp	r0, #0
-	bne	.L113
+	bne	.L112
 	.loc 1 528 0
-	ldr	r1, .L155+4
+	ldr	r1, .L145+56
 	mov	r0, r10
-.LVL200:
+.LVL202:
 	bl	strcmp
-.LVL201:
-	cbnz	r0, .L117
+.LVL203:
+	cbnz	r0, .L116
 	.loc 1 529 0
-	ldr	r3, [r7, #60]
+	ldr	r3, [r7, #56]
 	str	r3, [r4, #20]
-.LVL202:
-.L116:
+.L115:
 	.loc 1 514 0
 	adds	r6, r6, #1
-.LVL203:
-	cmp	r6, #3
-	bne	.L119
 .LVL204:
-.L122:
-	.loc 1 549 0
-	mov	fp, #0
-	b	.L113
+	cmp	r6, #3
+	bne	.L118
 .LVL205:
-.L117:
+.L119:
+	.loc 1 549 0
+	movs	r0, #0
+	b	.L112
+.L146:
+	.align	2
+.L145:
+	.word	-804389139
+	.word	.LC15
+	.word	.LC16
+	.word	.LC17
+	.word	.LC18
+	.word	.LC19
+	.word	.LC20
+	.word	.LC21
+	.word	.LC22
+	.word	.LC23
+	.word	.LANCHOR1
+	.word	.LANCHOR0
+	.word	.LC24
+	.word	.LC25
+	.word	.LC0
+.LVL206:
+.L116:
 	.loc 1 530 0
-	ldr	r1, .L155+8
+	ldr	r1, .L147
 	mov	r0, r10
 	bl	strcmp
-.LVL206:
+.LVL207:
 	cmp	r0, #0
-	bne	.L116
+	bne	.L115
 	.loc 1 532 0
-	ldr	r3, [r7, #60]
+	ldr	r3, [r7, #56]
 	str	r3, [r4, #16]
-	b	.L116
-.LVL207:
-.L124:
-	.loc 1 476 0
-	mvn	fp, #4
-	b	.L113
+	b	.L115
 .LVL208:
-.L125:
-	.loc 1 487 0
-	mvn	fp, #18
-	b	.L113
+.L121:
+	.loc 1 476 0
+	mvn	r0, #4
+	b	.L112
 .LVL209:
-.L126:
-	.loc 1 508 0
-	ldr	fp, [r7, #24]
-	b	.L113
+.L122:
+	.loc 1 487 0
+	mvn	r0, #18
 .LVL210:
-.L91:
+	b	.L112
+.LVL211:
+.L123:
+	.loc 1 508 0
+	mov	r0, fp
+.LVL212:
+	b	.L112
+.LVL213:
+.L90:
 .LBE94:
 .LBE95:
 .LBB96:
 .LBB91:
 	.loc 1 567 0
 	mov	r0, #-1
-.L99:
-.LVL211:
-	mov	fp, r0
-	b	.L89
-.L156:
+.LVL214:
+	b	.L87
+.L148:
 	.align	2
-.L155:
-	.word	.LC18
-	.word	.LC0
+.L147:
 	.word	.LC1
 .LBE91:
 .LBE96:
 	.cfi_endproc
-.LFE215:
+.LFE219:
 	.size	spl_load_simple_fit, .-spl_load_simple_fit
 	.section	.rodata
 	.align	2
 	.set	.LANCHOR1,. + 0
-.LC28:
+.LC26:
 	.word	.LC0
 	.word	.LC1
 	.word	.LC2
-	.section	.rodata.__func__.8692,"a",%progbits
+	.section	.rodata.__func__.8712,"a",%progbits
 	.set	.LANCHOR0,. + 0
-	.type	__func__.8692, %object
-	.size	__func__.8692, 20
-__func__.8692:
+	.type	__func__.8712, %object
+	.size	__func__.8712, 20
+__func__.8712:
 	.ascii	"spl_load_kernel_fit\000"
 	.section	.rodata.spl_fit_get_image_name.isra.0.str1.1,"aMS",%progbits,1
 .LC4:
@@ -1613,31 +1563,27 @@ __func__.8692:
 	.ascii	"entry\000"
 	.section	.rodata.spl_load_simple_fit.str1.1,"aMS",%progbits,1
 .LC15:
-	.ascii	"Trying fit image at 0x%lx sector\012\000"
-.LC16:
-	.ascii	"IO error\012\000"
-.LC17:
 	.ascii	"Not fit magic\012\000"
-.LC18:
+.LC16:
 	.ascii	"/images\000"
-.LC19:
+.LC17:
 	.ascii	"Verified-boot requires CONFIG_SPL_FIT_SIGNATURE ena"
 	.ascii	"bled\012\000"
-.LC20:
+.LC18:
 	.ascii	"standalone\000"
-.LC21:
+.LC19:
 	.ascii	"Start standalone fail, ret = %d\012\000"
-.LC22:
+.LC20:
 	.ascii	"firmware\000"
-.LC23:
+.LC21:
 	.ascii	"loadables\000"
-.LC24:
+.LC22:
 	.ascii	"type\000"
-.LC25:
+.LC23:
 	.ascii	"os\000"
-.LC26:
+.LC24:
 	.ascii	"%s: no partition\012\000"
-.LC27:
+.LC25:
 	.ascii	"%s: Not fit magic\012\000"
 	.section	.rodata.str1.1,"aMS",%progbits,1
 .LC0:
@@ -1675,15 +1621,15 @@ __func__.8692:
 	.file 27 "include/stdio.h"
 	.section	.debug_info,"",%progbits
 .Ldebug_info0:
-	.4byte	0x2650
+	.4byte	0x2739
 	.2byte	0x4
 	.4byte	.Ldebug_abbrev0
 	.byte	0x4
 	.uleb128 0x1
-	.4byte	.LASF394
+	.4byte	.LASF405
 	.byte	0xc
-	.4byte	.LASF395
-	.4byte	.LASF396
+	.4byte	.LASF406
+	.4byte	.LASF407
 	.4byte	.Ldebug_ranges0+0x88
 	.4byte	0
 	.4byte	.Ldebug_line0
@@ -2124,7 +2070,7 @@ __func__.8692:
 	.byte	0x8
 	.byte	0
 	.uleb128 0x17
-	.4byte	.LASF397
+	.4byte	.LASF86
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0x39e
@@ -2183,7 +2129,7 @@ __func__.8692:
 	.4byte	0x400
 	.uleb128 0x14
 	.4byte	.LASF76
-	.byte	0x78
+	.byte	0x9c
 	.byte	0xc
 	.byte	0x39
 	.4byte	0x487
@@ -2232,8 +2178,8 @@ __func__.8692:
 	.uleb128 0x15
 	.4byte	.LASF81
 	.byte	0xc
-	.byte	0x47
-	.4byte	0x25
+	.byte	0x44
+	.4byte	0x497
 	.byte	0x75
 	.byte	0
 	.uleb128 0xc
@@ -2271,10 +2217,10 @@ __func__.8692:
 	.byte	0x4
 	.4byte	0x28f
 	.uleb128 0x1b
-	.2byte	0xa0c
+	.2byte	0xa10
 	.byte	0xd
 	.byte	0x13
-	.4byte	0x51a
+	.4byte	0x527
 	.uleb128 0x15
 	.4byte	.LASF78
 	.byte	0xd
@@ -2297,56 +2243,67 @@ __func__.8692:
 	.4byte	.LASF77
 	.byte	0xd
 	.byte	0x17
-	.4byte	0x51a
+	.4byte	0x527
 	.byte	0xc
 	.uleb128 0x1c
 	.4byte	.LASF85
 	.byte	0xd
 	.byte	0x18
-	.4byte	0x52b
+	.4byte	0x538
 	.2byte	0x80c
+	.uleb128 0x1d
+	.ascii	"mtd\000"
+	.byte	0xd
+	.byte	0x31
+	.4byte	0x54e
+	.2byte	0xa0c
 	.byte	0
 	.uleb128 0xc
 	.4byte	0x122
-	.4byte	0x52b
-	.uleb128 0x1d
+	.4byte	0x538
+	.uleb128 0x1e
 	.4byte	0xcb
 	.2byte	0x1ff
 	.byte	0
 	.uleb128 0xc
 	.4byte	0x25
-	.4byte	0x53c
-	.uleb128 0x1d
+	.4byte	0x549
+	.uleb128 0x1e
 	.4byte	0xcb
 	.2byte	0x1ff
 	.byte	0
+	.uleb128 0x17
+	.4byte	.LASF87
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x549
 	.uleb128 0x2
-	.4byte	.LASF86
+	.4byte	.LASF88
 	.byte	0xd
 	.byte	0x37
 	.4byte	0x4d3
 	.uleb128 0xc
-	.4byte	0x53c
-	.4byte	0x552
+	.4byte	0x554
+	.4byte	0x56a
 	.uleb128 0xe
 	.byte	0
 	.uleb128 0x4
-	.4byte	.LASF87
+	.4byte	.LASF89
 	.byte	0xd
 	.byte	0x39
-	.4byte	0x547
+	.4byte	0x55f
 	.uleb128 0x3
 	.byte	0x8
 	.byte	0x4
-	.4byte	.LASF88
+	.4byte	.LASF90
 	.uleb128 0x14
-	.4byte	.LASF89
+	.4byte	.LASF91
 	.byte	0x8
 	.byte	0xe
 	.byte	0x10
-	.4byte	0x589
+	.4byte	0x5a1
 	.uleb128 0x15
-	.4byte	.LASF90
+	.4byte	.LASF92
 	.byte	0xe
 	.byte	0x11
 	.4byte	0xb5
@@ -2359,11 +2316,11 @@ __func__.8692:
 	.byte	0x4
 	.byte	0
 	.uleb128 0x14
-	.4byte	.LASF91
+	.4byte	.LASF93
 	.byte	0x90
 	.byte	0xe
 	.byte	0x15
-	.4byte	0x5ba
+	.4byte	0x5d2
 	.uleb128 0xb
 	.ascii	"cnt\000"
 	.byte	0xe
@@ -2377,48 +2334,48 @@ __func__.8692:
 	.4byte	0xc0
 	.byte	0x4
 	.uleb128 0x15
-	.4byte	.LASF92
+	.4byte	.LASF94
 	.byte	0xe
 	.byte	0x18
-	.4byte	0x5ba
+	.4byte	0x5d2
 	.byte	0x8
 	.byte	0
 	.uleb128 0xc
-	.4byte	0x564
-	.4byte	0x5ca
+	.4byte	0x57c
+	.4byte	0x5e2
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x10
 	.byte	0
-	.uleb128 0x1e
+	.uleb128 0x1f
 	.ascii	"lmb\000"
 	.2byte	0x120
 	.byte	0xe
 	.byte	0x1b
-	.4byte	0x5f0
+	.4byte	0x608
 	.uleb128 0x15
-	.4byte	.LASF93
+	.4byte	.LASF95
 	.byte	0xe
 	.byte	0x1c
-	.4byte	0x589
+	.4byte	0x5a1
 	.byte	0
 	.uleb128 0x15
-	.4byte	.LASF94
+	.4byte	.LASF96
 	.byte	0xe
 	.byte	0x1d
-	.4byte	0x589
+	.4byte	0x5a1
 	.byte	0x90
 	.byte	0
-	.uleb128 0x1f
+	.uleb128 0x20
 	.ascii	"lmb\000"
 	.byte	0xe
 	.byte	0x20
-	.4byte	0x5ca
+	.4byte	0x5e2
 	.uleb128 0xa
 	.byte	0x10
 	.byte	0xf
 	.byte	0x5d
-	.4byte	0x61c
+	.4byte	0x634
 	.uleb128 0x15
 	.4byte	.LASF77
 	.byte	0xf
@@ -2433,908 +2390,908 @@ __func__.8692:
 	.byte	0x8
 	.byte	0
 	.uleb128 0x14
-	.4byte	.LASF95
+	.4byte	.LASF97
 	.byte	0x70
 	.byte	0xf
 	.byte	0x1b
-	.4byte	0x719
+	.4byte	0x731
 	.uleb128 0x15
-	.4byte	.LASF96
+	.4byte	.LASF98
 	.byte	0xf
 	.byte	0x1c
 	.4byte	0x37
 	.byte	0
 	.uleb128 0x15
-	.4byte	.LASF97
+	.4byte	.LASF99
 	.byte	0xf
 	.byte	0x1d
 	.4byte	0xc0
 	.byte	0x4
 	.uleb128 0x15
-	.4byte	.LASF98
+	.4byte	.LASF100
 	.byte	0xf
 	.byte	0x1e
 	.4byte	0x37
 	.byte	0x8
 	.uleb128 0x15
-	.4byte	.LASF99
+	.4byte	.LASF101
 	.byte	0xf
 	.byte	0x1f
 	.4byte	0x37
 	.byte	0xc
 	.uleb128 0x15
-	.4byte	.LASF100
+	.4byte	.LASF102
 	.byte	0xf
 	.byte	0x20
 	.4byte	0x37
 	.byte	0x10
 	.uleb128 0x15
-	.4byte	.LASF101
+	.4byte	.LASF103
 	.byte	0xf
 	.byte	0x21
 	.4byte	0x37
 	.byte	0x14
 	.uleb128 0x15
-	.4byte	.LASF102
+	.4byte	.LASF104
 	.byte	0xf
 	.byte	0x22
 	.4byte	0x37
 	.byte	0x18
 	.uleb128 0x15
-	.4byte	.LASF103
+	.4byte	.LASF105
 	.byte	0xf
 	.byte	0x24
 	.4byte	0x37
 	.byte	0x1c
 	.uleb128 0x15
-	.4byte	.LASF104
+	.4byte	.LASF106
 	.byte	0xf
 	.byte	0x25
 	.4byte	0x37
 	.byte	0x20
 	.uleb128 0x15
-	.4byte	.LASF105
+	.4byte	.LASF107
 	.byte	0xf
 	.byte	0x26
 	.4byte	0x37
 	.byte	0x24
 	.uleb128 0x15
-	.4byte	.LASF106
+	.4byte	.LASF108
 	.byte	0xf
 	.byte	0x31
 	.4byte	0x37
 	.byte	0x28
 	.uleb128 0x15
-	.4byte	.LASF107
+	.4byte	.LASF109
 	.byte	0xf
 	.byte	0x32
 	.4byte	0x37
 	.byte	0x2c
 	.uleb128 0x15
-	.4byte	.LASF108
+	.4byte	.LASF110
 	.byte	0xf
 	.byte	0x33
 	.4byte	0x3c6
 	.byte	0x30
 	.uleb128 0x15
-	.4byte	.LASF109
+	.4byte	.LASF111
 	.byte	0xf
 	.byte	0x34
 	.4byte	0x3e
 	.byte	0x36
 	.uleb128 0x15
-	.4byte	.LASF110
+	.4byte	.LASF112
 	.byte	0xf
 	.byte	0x35
 	.4byte	0x37
 	.byte	0x38
 	.uleb128 0x15
-	.4byte	.LASF111
+	.4byte	.LASF113
 	.byte	0xf
 	.byte	0x36
 	.4byte	0x37
 	.byte	0x3c
 	.uleb128 0x15
-	.4byte	.LASF112
+	.4byte	.LASF114
 	.byte	0xf
 	.byte	0x57
 	.4byte	0x122
 	.byte	0x40
 	.uleb128 0x15
-	.4byte	.LASF113
+	.4byte	.LASF115
 	.byte	0xf
 	.byte	0x58
 	.4byte	0x122
 	.byte	0x44
 	.uleb128 0x15
-	.4byte	.LASF114
+	.4byte	.LASF116
 	.byte	0xf
 	.byte	0x5b
 	.4byte	0x7b
 	.byte	0x48
 	.uleb128 0x15
-	.4byte	.LASF115
+	.4byte	.LASF117
 	.byte	0xf
 	.byte	0x60
-	.4byte	0x719
+	.4byte	0x731
 	.byte	0x50
 	.byte	0
 	.uleb128 0xc
-	.4byte	0x5fb
-	.4byte	0x729
+	.4byte	0x613
+	.4byte	0x741
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x1
 	.byte	0
 	.uleb128 0x2
-	.4byte	.LASF116
+	.4byte	.LASF118
 	.byte	0xf
 	.byte	0x62
-	.4byte	0x61c
+	.4byte	0x634
 	.uleb128 0x4
-	.4byte	.LASF117
+	.4byte	.LASF119
 	.byte	0x10
 	.byte	0x13
 	.4byte	0x122
 	.uleb128 0x4
-	.4byte	.LASF118
+	.4byte	.LASF120
 	.byte	0x10
 	.byte	0x14
 	.4byte	0x122
 	.uleb128 0x4
-	.4byte	.LASF119
+	.4byte	.LASF121
 	.byte	0x10
 	.byte	0x15
 	.4byte	0x122
 	.uleb128 0x4
-	.4byte	.LASF120
+	.4byte	.LASF122
 	.byte	0x10
 	.byte	0x16
 	.4byte	0x122
 	.uleb128 0x4
-	.4byte	.LASF121
+	.4byte	.LASF123
 	.byte	0x10
 	.byte	0x17
 	.4byte	0x122
 	.uleb128 0x4
-	.4byte	.LASF122
+	.4byte	.LASF124
 	.byte	0x10
 	.byte	0x18
 	.4byte	0x122
 	.uleb128 0x4
-	.4byte	.LASF123
+	.4byte	.LASF125
 	.byte	0x10
 	.byte	0x19
 	.4byte	0x122
 	.uleb128 0x2
-	.4byte	.LASF124
+	.4byte	.LASF126
 	.byte	0x11
 	.byte	0x11
 	.4byte	0x143
 	.uleb128 0x14
-	.4byte	.LASF125
+	.4byte	.LASF127
 	.byte	0x28
 	.byte	0x12
 	.byte	0x39
-	.4byte	0x811
+	.4byte	0x829
 	.uleb128 0x15
-	.4byte	.LASF126
+	.4byte	.LASF128
 	.byte	0x12
 	.byte	0x3a
-	.4byte	0x781
+	.4byte	0x799
 	.byte	0
 	.uleb128 0x15
-	.4byte	.LASF127
+	.4byte	.LASF129
 	.byte	0x12
 	.byte	0x3b
-	.4byte	0x781
+	.4byte	0x799
 	.byte	0x4
 	.uleb128 0x15
-	.4byte	.LASF128
+	.4byte	.LASF130
 	.byte	0x12
 	.byte	0x3c
-	.4byte	0x781
+	.4byte	0x799
 	.byte	0x8
 	.uleb128 0x15
-	.4byte	.LASF129
+	.4byte	.LASF131
 	.byte	0x12
 	.byte	0x3d
-	.4byte	0x781
+	.4byte	0x799
 	.byte	0xc
 	.uleb128 0x15
-	.4byte	.LASF130
+	.4byte	.LASF132
 	.byte	0x12
 	.byte	0x3e
-	.4byte	0x781
+	.4byte	0x799
 	.byte	0x10
 	.uleb128 0x15
-	.4byte	.LASF131
+	.4byte	.LASF133
 	.byte	0x12
 	.byte	0x3f
-	.4byte	0x781
+	.4byte	0x799
 	.byte	0x14
 	.uleb128 0x15
-	.4byte	.LASF132
+	.4byte	.LASF134
 	.byte	0x12
 	.byte	0x40
-	.4byte	0x781
+	.4byte	0x799
 	.byte	0x18
 	.uleb128 0x15
-	.4byte	.LASF133
+	.4byte	.LASF135
 	.byte	0x12
 	.byte	0x43
-	.4byte	0x781
+	.4byte	0x799
 	.byte	0x1c
 	.uleb128 0x15
-	.4byte	.LASF134
+	.4byte	.LASF136
 	.byte	0x12
 	.byte	0x46
-	.4byte	0x781
+	.4byte	0x799
 	.byte	0x20
 	.uleb128 0x15
-	.4byte	.LASF135
+	.4byte	.LASF137
 	.byte	0x12
 	.byte	0x49
-	.4byte	0x781
+	.4byte	0x799
 	.byte	0x24
 	.byte	0
 	.uleb128 0xf
-	.4byte	.LASF136
+	.4byte	.LASF138
 	.byte	0x13
 	.2byte	0x136
-	.4byte	0x81d
+	.4byte	0x835
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x78c
-	.uleb128 0x20
+	.4byte	0x7a4
+	.uleb128 0x21
 	.byte	0x4
 	.4byte	0x7b
 	.byte	0x2
-	.byte	0x82
-	.4byte	0x8d8
+	.byte	0x83
+	.4byte	0x8f0
 	.uleb128 0x11
-	.4byte	.LASF137
+	.4byte	.LASF139
 	.byte	0
 	.uleb128 0x11
-	.4byte	.LASF138
+	.4byte	.LASF140
 	.byte	0x1
 	.uleb128 0x11
-	.4byte	.LASF139
+	.4byte	.LASF141
 	.byte	0x2
 	.uleb128 0x11
-	.4byte	.LASF140
+	.4byte	.LASF142
 	.byte	0x3
 	.uleb128 0x11
-	.4byte	.LASF141
+	.4byte	.LASF143
 	.byte	0x4
 	.uleb128 0x11
-	.4byte	.LASF142
+	.4byte	.LASF144
 	.byte	0x5
 	.uleb128 0x11
-	.4byte	.LASF143
+	.4byte	.LASF145
 	.byte	0x6
 	.uleb128 0x11
-	.4byte	.LASF144
+	.4byte	.LASF146
 	.byte	0x7
 	.uleb128 0x11
-	.4byte	.LASF145
+	.4byte	.LASF147
 	.byte	0x8
 	.uleb128 0x11
-	.4byte	.LASF146
+	.4byte	.LASF148
 	.byte	0x9
 	.uleb128 0x11
-	.4byte	.LASF147
+	.4byte	.LASF149
 	.byte	0xa
 	.uleb128 0x11
-	.4byte	.LASF148
+	.4byte	.LASF150
 	.byte	0xb
 	.uleb128 0x11
-	.4byte	.LASF149
+	.4byte	.LASF151
 	.byte	0xc
 	.uleb128 0x11
-	.4byte	.LASF150
+	.4byte	.LASF152
 	.byte	0xd
 	.uleb128 0x11
-	.4byte	.LASF151
+	.4byte	.LASF153
 	.byte	0xe
 	.uleb128 0x11
-	.4byte	.LASF152
+	.4byte	.LASF154
 	.byte	0xf
 	.uleb128 0x11
-	.4byte	.LASF153
+	.4byte	.LASF155
 	.byte	0x10
 	.uleb128 0x11
-	.4byte	.LASF154
+	.4byte	.LASF156
 	.byte	0x11
 	.uleb128 0x11
-	.4byte	.LASF155
+	.4byte	.LASF157
 	.byte	0x12
 	.uleb128 0x11
-	.4byte	.LASF156
+	.4byte	.LASF158
 	.byte	0x13
 	.uleb128 0x11
-	.4byte	.LASF157
+	.4byte	.LASF159
 	.byte	0x14
 	.uleb128 0x11
-	.4byte	.LASF158
+	.4byte	.LASF160
 	.byte	0x15
 	.uleb128 0x11
-	.4byte	.LASF159
+	.4byte	.LASF161
 	.byte	0x16
 	.uleb128 0x11
-	.4byte	.LASF160
+	.4byte	.LASF162
 	.byte	0x17
 	.uleb128 0x11
-	.4byte	.LASF161
+	.4byte	.LASF163
 	.byte	0x18
 	.uleb128 0x11
-	.4byte	.LASF162
+	.4byte	.LASF164
 	.byte	0x19
 	.uleb128 0x11
-	.4byte	.LASF163
+	.4byte	.LASF165
 	.byte	0x1a
 	.uleb128 0x11
-	.4byte	.LASF164
+	.4byte	.LASF166
 	.byte	0x1b
 	.byte	0
-	.uleb128 0x20
+	.uleb128 0x21
 	.byte	0x4
 	.4byte	0x7b
 	.byte	0x2
-	.byte	0xf2
-	.4byte	0x9b7
+	.byte	0xf3
+	.4byte	0x9cf
 	.uleb128 0x11
-	.4byte	.LASF165
+	.4byte	.LASF167
 	.byte	0
 	.uleb128 0x11
-	.4byte	.LASF166
+	.4byte	.LASF168
 	.byte	0x1
 	.uleb128 0x11
-	.4byte	.LASF167
+	.4byte	.LASF169
 	.byte	0x2
 	.uleb128 0x11
-	.4byte	.LASF168
+	.4byte	.LASF170
 	.byte	0x3
 	.uleb128 0x11
-	.4byte	.LASF169
+	.4byte	.LASF171
 	.byte	0x4
 	.uleb128 0x11
-	.4byte	.LASF170
+	.4byte	.LASF172
 	.byte	0x5
 	.uleb128 0x11
-	.4byte	.LASF171
+	.4byte	.LASF173
 	.byte	0x6
 	.uleb128 0x11
-	.4byte	.LASF172
+	.4byte	.LASF174
 	.byte	0x7
 	.uleb128 0x11
-	.4byte	.LASF173
+	.4byte	.LASF175
 	.byte	0x8
 	.uleb128 0x11
-	.4byte	.LASF174
+	.4byte	.LASF176
 	.byte	0x9
 	.uleb128 0x11
-	.4byte	.LASF175
+	.4byte	.LASF177
 	.byte	0xa
 	.uleb128 0x11
-	.4byte	.LASF176
+	.4byte	.LASF178
 	.byte	0xb
 	.uleb128 0x11
-	.4byte	.LASF177
+	.4byte	.LASF179
 	.byte	0xc
 	.uleb128 0x11
-	.4byte	.LASF178
+	.4byte	.LASF180
 	.byte	0xd
 	.uleb128 0x11
-	.4byte	.LASF179
+	.4byte	.LASF181
 	.byte	0xe
 	.uleb128 0x11
-	.4byte	.LASF180
+	.4byte	.LASF182
 	.byte	0xf
 	.uleb128 0x11
-	.4byte	.LASF181
+	.4byte	.LASF183
 	.byte	0x10
 	.uleb128 0x11
-	.4byte	.LASF182
+	.4byte	.LASF184
 	.byte	0x11
 	.uleb128 0x11
-	.4byte	.LASF183
+	.4byte	.LASF185
 	.byte	0x12
 	.uleb128 0x11
-	.4byte	.LASF184
+	.4byte	.LASF186
 	.byte	0x13
 	.uleb128 0x11
-	.4byte	.LASF185
+	.4byte	.LASF187
 	.byte	0x14
 	.uleb128 0x11
-	.4byte	.LASF186
+	.4byte	.LASF188
 	.byte	0x15
 	.uleb128 0x11
-	.4byte	.LASF187
+	.4byte	.LASF189
 	.byte	0x16
 	.uleb128 0x11
-	.4byte	.LASF188
+	.4byte	.LASF190
 	.byte	0x17
 	.uleb128 0x11
-	.4byte	.LASF189
+	.4byte	.LASF191
 	.byte	0x18
 	.uleb128 0x11
-	.4byte	.LASF190
+	.4byte	.LASF192
 	.byte	0x19
 	.uleb128 0x11
-	.4byte	.LASF191
+	.4byte	.LASF193
 	.byte	0x1a
 	.uleb128 0x11
-	.4byte	.LASF192
+	.4byte	.LASF194
 	.byte	0x1b
 	.uleb128 0x11
-	.4byte	.LASF193
+	.4byte	.LASF195
 	.byte	0x1c
 	.uleb128 0x11
-	.4byte	.LASF194
+	.4byte	.LASF196
 	.byte	0x1d
 	.uleb128 0x11
-	.4byte	.LASF195
+	.4byte	.LASF197
 	.byte	0x1e
 	.uleb128 0x11
-	.4byte	.LASF196
+	.4byte	.LASF198
 	.byte	0x1f
 	.uleb128 0x11
-	.4byte	.LASF197
+	.4byte	.LASF199
 	.byte	0x20
 	.uleb128 0x11
-	.4byte	.LASF198
+	.4byte	.LASF200
 	.byte	0x21
 	.uleb128 0x11
-	.4byte	.LASF199
+	.4byte	.LASF201
 	.byte	0x22
 	.byte	0
-	.uleb128 0x21
+	.uleb128 0x22
 	.byte	0x4
 	.4byte	0x7b
 	.byte	0x2
-	.2byte	0x120
-	.4byte	0x9f5
+	.2byte	0x121
+	.4byte	0xa0d
 	.uleb128 0x11
-	.4byte	.LASF200
+	.4byte	.LASF202
 	.byte	0
 	.uleb128 0x11
-	.4byte	.LASF201
+	.4byte	.LASF203
 	.byte	0x1
 	.uleb128 0x11
-	.4byte	.LASF202
+	.4byte	.LASF204
 	.byte	0x2
 	.uleb128 0x11
-	.4byte	.LASF203
+	.4byte	.LASF205
 	.byte	0x3
 	.uleb128 0x11
-	.4byte	.LASF204
+	.4byte	.LASF206
 	.byte	0x4
 	.uleb128 0x11
-	.4byte	.LASF205
+	.4byte	.LASF207
 	.byte	0x5
 	.uleb128 0x11
-	.4byte	.LASF206
+	.4byte	.LASF208
 	.byte	0x6
 	.uleb128 0x11
-	.4byte	.LASF207
+	.4byte	.LASF209
 	.byte	0x7
 	.byte	0
-	.uleb128 0x22
-	.4byte	.LASF208
-	.byte	0x40
-	.byte	0x2
-	.2byte	0x136
-	.4byte	0xa9f
 	.uleb128 0x23
-	.4byte	.LASF209
+	.4byte	.LASF210
+	.byte	0x40
 	.byte	0x2
 	.2byte	0x137
+	.4byte	0xab7
+	.uleb128 0x24
+	.4byte	.LASF211
+	.byte	0x2
+	.2byte	0x138
 	.4byte	0x143
 	.byte	0
-	.uleb128 0x23
-	.4byte	.LASF210
+	.uleb128 0x24
+	.4byte	.LASF212
 	.byte	0x2
-	.2byte	0x138
+	.2byte	0x139
 	.4byte	0x143
 	.byte	0x4
-	.uleb128 0x23
-	.4byte	.LASF211
+	.uleb128 0x24
+	.4byte	.LASF213
 	.byte	0x2
-	.2byte	0x139
+	.2byte	0x13a
 	.4byte	0x143
 	.byte	0x8
-	.uleb128 0x23
-	.4byte	.LASF212
+	.uleb128 0x24
+	.4byte	.LASF214
 	.byte	0x2
-	.2byte	0x13a
+	.2byte	0x13b
 	.4byte	0x143
 	.byte	0xc
-	.uleb128 0x23
-	.4byte	.LASF213
+	.uleb128 0x24
+	.4byte	.LASF215
 	.byte	0x2
-	.2byte	0x13b
+	.2byte	0x13c
 	.4byte	0x143
 	.byte	0x10
-	.uleb128 0x23
-	.4byte	.LASF214
+	.uleb128 0x24
+	.4byte	.LASF216
 	.byte	0x2
-	.2byte	0x13c
+	.2byte	0x13d
 	.4byte	0x143
 	.byte	0x14
-	.uleb128 0x23
-	.4byte	.LASF215
+	.uleb128 0x24
+	.4byte	.LASF217
 	.byte	0x2
-	.2byte	0x13d
+	.2byte	0x13e
 	.4byte	0x143
 	.byte	0x18
-	.uleb128 0x23
-	.4byte	.LASF216
+	.uleb128 0x24
+	.4byte	.LASF218
 	.byte	0x2
-	.2byte	0x13e
+	.2byte	0x13f
 	.4byte	0x12d
 	.byte	0x1c
-	.uleb128 0x23
-	.4byte	.LASF217
+	.uleb128 0x24
+	.4byte	.LASF219
 	.byte	0x2
-	.2byte	0x13f
+	.2byte	0x140
 	.4byte	0x12d
 	.byte	0x1d
-	.uleb128 0x23
-	.4byte	.LASF218
+	.uleb128 0x24
+	.4byte	.LASF220
 	.byte	0x2
-	.2byte	0x140
+	.2byte	0x141
 	.4byte	0x12d
 	.byte	0x1e
-	.uleb128 0x23
-	.4byte	.LASF219
+	.uleb128 0x24
+	.4byte	.LASF221
 	.byte	0x2
-	.2byte	0x141
+	.2byte	0x142
 	.4byte	0x12d
 	.byte	0x1f
-	.uleb128 0x23
-	.4byte	.LASF220
+	.uleb128 0x24
+	.4byte	.LASF222
 	.byte	0x2
-	.2byte	0x142
-	.4byte	0xa9f
+	.2byte	0x143
+	.4byte	0xab7
 	.byte	0x20
 	.byte	0
 	.uleb128 0xc
 	.4byte	0x12d
-	.4byte	0xaaf
+	.4byte	0xac7
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x1f
 	.byte	0
-	.uleb128 0x24
-	.4byte	.LASF221
+	.uleb128 0x25
+	.4byte	.LASF223
 	.byte	0x2
-	.2byte	0x143
-	.4byte	0x9f5
+	.2byte	0x144
+	.4byte	0xa0d
 	.uleb128 0x7
-	.4byte	0xaaf
-	.uleb128 0x22
-	.4byte	.LASF222
+	.4byte	0xac7
+	.uleb128 0x23
+	.4byte	.LASF224
 	.byte	0x18
 	.byte	0x2
-	.2byte	0x145
-	.4byte	0xb42
-	.uleb128 0x23
+	.2byte	0x146
+	.4byte	0xb5a
+	.uleb128 0x24
 	.4byte	.LASF77
 	.byte	0x2
-	.2byte	0x146
+	.2byte	0x147
 	.4byte	0x122
 	.byte	0
-	.uleb128 0x25
+	.uleb128 0x26
 	.ascii	"end\000"
 	.byte	0x2
-	.2byte	0x146
+	.2byte	0x147
 	.4byte	0x122
 	.byte	0x4
-	.uleb128 0x23
-	.4byte	.LASF223
+	.uleb128 0x24
+	.4byte	.LASF225
 	.byte	0x2
-	.2byte	0x147
+	.2byte	0x148
 	.4byte	0x122
 	.byte	0x8
-	.uleb128 0x23
-	.4byte	.LASF224
+	.uleb128 0x24
+	.4byte	.LASF226
 	.byte	0x2
-	.2byte	0x147
+	.2byte	0x148
 	.4byte	0x122
 	.byte	0xc
-	.uleb128 0x23
-	.4byte	.LASF225
+	.uleb128 0x24
+	.4byte	.LASF227
 	.byte	0x2
-	.2byte	0x148
+	.2byte	0x149
 	.4byte	0x122
 	.byte	0x10
-	.uleb128 0x23
-	.4byte	.LASF226
+	.uleb128 0x24
+	.4byte	.LASF228
 	.byte	0x2
-	.2byte	0x149
+	.2byte	0x14a
 	.4byte	0x12d
 	.byte	0x14
-	.uleb128 0x23
+	.uleb128 0x24
 	.4byte	.LASF62
 	.byte	0x2
-	.2byte	0x149
+	.2byte	0x14a
 	.4byte	0x12d
 	.byte	0x15
-	.uleb128 0x25
+	.uleb128 0x26
 	.ascii	"os\000"
 	.byte	0x2
-	.2byte	0x149
+	.2byte	0x14a
 	.4byte	0x12d
 	.byte	0x16
-	.uleb128 0x23
-	.4byte	.LASF227
+	.uleb128 0x24
+	.4byte	.LASF229
 	.byte	0x2
-	.2byte	0x14a
+	.2byte	0x14b
 	.4byte	0x12d
 	.byte	0x17
 	.byte	0
-	.uleb128 0x24
-	.4byte	.LASF228
+	.uleb128 0x25
+	.4byte	.LASF230
 	.byte	0x2
-	.2byte	0x14b
-	.4byte	0xac0
-	.uleb128 0x26
-	.4byte	.LASF229
+	.2byte	0x14c
+	.4byte	0xad8
+	.uleb128 0x27
+	.4byte	.LASF231
 	.2byte	0x1e4
 	.byte	0x2
-	.2byte	0x151
-	.4byte	0xce1
-	.uleb128 0x23
-	.4byte	.LASF230
+	.2byte	0x152
+	.4byte	0xcf9
+	.uleb128 0x24
+	.4byte	.LASF232
 	.byte	0x2
-	.2byte	0x157
-	.4byte	0xce1
+	.2byte	0x158
+	.4byte	0xcf9
 	.byte	0
-	.uleb128 0x23
-	.4byte	.LASF231
+	.uleb128 0x24
+	.4byte	.LASF233
 	.byte	0x2
-	.2byte	0x158
-	.4byte	0xaaf
+	.2byte	0x159
+	.4byte	0xac7
 	.byte	0x4
-	.uleb128 0x23
-	.4byte	.LASF232
+	.uleb128 0x24
+	.4byte	.LASF234
 	.byte	0x2
-	.2byte	0x159
+	.2byte	0x15a
 	.4byte	0x122
 	.byte	0x44
-	.uleb128 0x23
-	.4byte	.LASF233
+	.uleb128 0x24
+	.4byte	.LASF235
 	.byte	0x2
-	.2byte	0x15c
+	.2byte	0x15d
 	.4byte	0xd7
 	.byte	0x48
-	.uleb128 0x23
-	.4byte	.LASF234
+	.uleb128 0x24
+	.4byte	.LASF236
 	.byte	0x2
-	.2byte	0x15e
+	.2byte	0x15f
 	.4byte	0x14e
 	.byte	0x4c
-	.uleb128 0x23
-	.4byte	.LASF235
+	.uleb128 0x24
+	.4byte	.LASF237
 	.byte	0x2
-	.2byte	0x15f
+	.2byte	0x160
 	.4byte	0xd7
 	.byte	0x50
-	.uleb128 0x23
-	.4byte	.LASF236
+	.uleb128 0x24
+	.4byte	.LASF238
 	.byte	0x2
-	.2byte	0x160
+	.2byte	0x161
 	.4byte	0x50
 	.byte	0x54
-	.uleb128 0x23
-	.4byte	.LASF237
+	.uleb128 0x24
+	.4byte	.LASF239
 	.byte	0x2
-	.2byte	0x162
+	.2byte	0x163
 	.4byte	0x14e
 	.byte	0x58
-	.uleb128 0x23
-	.4byte	.LASF238
+	.uleb128 0x24
+	.4byte	.LASF240
 	.byte	0x2
-	.2byte	0x163
+	.2byte	0x164
 	.4byte	0xd7
 	.byte	0x5c
-	.uleb128 0x23
-	.4byte	.LASF239
+	.uleb128 0x24
+	.4byte	.LASF241
 	.byte	0x2
-	.2byte	0x164
+	.2byte	0x165
 	.4byte	0x50
 	.byte	0x60
-	.uleb128 0x23
-	.4byte	.LASF240
+	.uleb128 0x24
+	.4byte	.LASF242
 	.byte	0x2
-	.2byte	0x166
+	.2byte	0x167
 	.4byte	0x14e
 	.byte	0x64
-	.uleb128 0x23
-	.4byte	.LASF241
+	.uleb128 0x24
+	.4byte	.LASF243
 	.byte	0x2
-	.2byte	0x167
+	.2byte	0x168
 	.4byte	0xd7
 	.byte	0x68
-	.uleb128 0x23
-	.4byte	.LASF242
+	.uleb128 0x24
+	.4byte	.LASF244
 	.byte	0x2
-	.2byte	0x168
+	.2byte	0x169
 	.4byte	0x50
 	.byte	0x6c
-	.uleb128 0x23
-	.4byte	.LASF243
+	.uleb128 0x24
+	.4byte	.LASF245
 	.byte	0x2
-	.2byte	0x16a
+	.2byte	0x16b
 	.4byte	0x14e
 	.byte	0x70
-	.uleb128 0x23
-	.4byte	.LASF244
+	.uleb128 0x24
+	.4byte	.LASF246
 	.byte	0x2
-	.2byte	0x16b
+	.2byte	0x16c
 	.4byte	0xd7
 	.byte	0x74
-	.uleb128 0x23
-	.4byte	.LASF245
+	.uleb128 0x24
+	.4byte	.LASF247
 	.byte	0x2
-	.2byte	0x16c
+	.2byte	0x16d
 	.4byte	0x50
 	.byte	0x78
-	.uleb128 0x25
+	.uleb128 0x26
 	.ascii	"os\000"
 	.byte	0x2
-	.2byte	0x170
-	.4byte	0xb42
+	.2byte	0x171
+	.4byte	0xb5a
 	.byte	0x7c
-	.uleb128 0x25
+	.uleb128 0x26
 	.ascii	"ep\000"
 	.byte	0x2
-	.2byte	0x171
+	.2byte	0x172
 	.4byte	0x122
 	.byte	0x94
-	.uleb128 0x23
-	.4byte	.LASF246
+	.uleb128 0x24
+	.4byte	.LASF248
 	.byte	0x2
-	.2byte	0x173
+	.2byte	0x174
 	.4byte	0x122
 	.byte	0x98
-	.uleb128 0x23
-	.4byte	.LASF247
+	.uleb128 0x24
+	.4byte	.LASF249
 	.byte	0x2
-	.2byte	0x173
+	.2byte	0x174
 	.4byte	0x122
 	.byte	0x9c
-	.uleb128 0x23
-	.4byte	.LASF248
+	.uleb128 0x24
+	.4byte	.LASF250
 	.byte	0x2
-	.2byte	0x175
+	.2byte	0x176
 	.4byte	0xfb
 	.byte	0xa0
-	.uleb128 0x23
-	.4byte	.LASF249
+	.uleb128 0x24
+	.4byte	.LASF251
 	.byte	0x2
-	.2byte	0x176
+	.2byte	0x177
 	.4byte	0x122
 	.byte	0xa4
-	.uleb128 0x23
-	.4byte	.LASF250
+	.uleb128 0x24
+	.4byte	.LASF252
 	.byte	0x2
-	.2byte	0x178
+	.2byte	0x179
 	.4byte	0x122
 	.byte	0xa8
-	.uleb128 0x23
-	.4byte	.LASF251
+	.uleb128 0x24
+	.4byte	.LASF253
 	.byte	0x2
-	.2byte	0x179
+	.2byte	0x17a
 	.4byte	0x122
 	.byte	0xac
-	.uleb128 0x23
-	.4byte	.LASF252
+	.uleb128 0x24
+	.4byte	.LASF254
 	.byte	0x2
-	.2byte	0x17a
+	.2byte	0x17b
 	.4byte	0x122
 	.byte	0xb0
-	.uleb128 0x23
-	.4byte	.LASF253
+	.uleb128 0x24
+	.4byte	.LASF255
 	.byte	0x2
-	.2byte	0x17b
+	.2byte	0x17c
 	.4byte	0x122
 	.byte	0xb4
-	.uleb128 0x25
+	.uleb128 0x26
 	.ascii	"kbd\000"
 	.byte	0x2
-	.2byte	0x17c
-	.4byte	0xce7
+	.2byte	0x17d
+	.4byte	0xcff
 	.byte	0xb8
-	.uleb128 0x23
-	.4byte	.LASF254
+	.uleb128 0x24
+	.4byte	.LASF256
 	.byte	0x2
-	.2byte	0x17f
+	.2byte	0x180
 	.4byte	0x50
 	.byte	0xbc
-	.uleb128 0x23
-	.4byte	.LASF255
+	.uleb128 0x24
+	.4byte	.LASF257
 	.byte	0x2
-	.2byte	0x18c
+	.2byte	0x18d
 	.4byte	0x50
 	.byte	0xc0
-	.uleb128 0x25
+	.uleb128 0x26
 	.ascii	"lmb\000"
 	.byte	0x2
-	.2byte	0x18f
-	.4byte	0x5ca
+	.2byte	0x190
+	.4byte	0x5e2
 	.byte	0xc4
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0xaaf
+	.4byte	0xac7
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x729
-	.uleb128 0x24
-	.4byte	.LASF256
+	.4byte	0x741
+	.uleb128 0x25
+	.4byte	.LASF258
 	.byte	0x2
-	.2byte	0x195
-	.4byte	0xb4e
+	.2byte	0x196
+	.4byte	0xb66
 	.uleb128 0xf
-	.4byte	.LASF257
+	.4byte	.LASF259
 	.byte	0x2
-	.2byte	0x197
-	.4byte	0xced
+	.2byte	0x198
+	.4byte	0xd05
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0x12d
 	.uleb128 0xc
 	.4byte	0xdd
-	.4byte	0xd1b
+	.4byte	0xd33
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x1f
 	.byte	0
 	.uleb128 0x4
-	.4byte	.LASF258
+	.4byte	.LASF260
 	.byte	0x3
 	.byte	0xad
 	.4byte	0x122
 	.uleb128 0xc
 	.4byte	0x90
-	.4byte	0xd31
+	.4byte	0xd49
 	.uleb128 0xe
 	.byte	0
 	.uleb128 0x4
-	.4byte	.LASF259
+	.4byte	.LASF261
 	.byte	0x3
 	.byte	0xaf
-	.4byte	0xd26
+	.4byte	0xd3e
 	.uleb128 0x4
-	.4byte	.LASF260
+	.4byte	.LASF262
 	.byte	0x3
 	.byte	0xb0
-	.4byte	0xd26
+	.4byte	0xd3e
 	.uleb128 0x4
-	.4byte	.LASF261
+	.4byte	.LASF263
 	.byte	0x3
 	.byte	0xfe
 	.4byte	0x122
 	.uleb128 0x4
-	.4byte	.LASF262
+	.4byte	.LASF264
 	.byte	0x3
 	.byte	0xff
 	.4byte	0x122
 	.uleb128 0xf
-	.4byte	.LASF263
+	.4byte	.LASF265
 	.byte	0x3
 	.2byte	0x100
 	.4byte	0x122
 	.uleb128 0x14
-	.4byte	.LASF264
+	.4byte	.LASF266
 	.byte	0x4
 	.byte	0x14
 	.byte	0x2e
-	.4byte	0xd82
+	.4byte	0xd9a
 	.uleb128 0x15
-	.4byte	.LASF265
+	.4byte	.LASF267
 	.byte	0x14
 	.byte	0x2f
 	.4byte	0x143
@@ -3343,199 +3300,329 @@ __func__.8692:
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0x25
+	.uleb128 0x14
+	.4byte	.LASF268
+	.byte	0x40
+	.byte	0x14
+	.byte	0xa6
+	.4byte	0xe3d
+	.uleb128 0x15
+	.4byte	.LASF74
+	.byte	0x14
+	.byte	0xa8
+	.4byte	0xe3d
+	.byte	0
+	.uleb128 0x15
+	.4byte	.LASF269
+	.byte	0x14
+	.byte	0xa9
+	.4byte	0x3c6
+	.byte	0x10
+	.uleb128 0x15
+	.4byte	.LASF270
+	.byte	0x14
+	.byte	0xaa
+	.4byte	0xb5
+	.byte	0x18
+	.uleb128 0x15
+	.4byte	.LASF257
+	.byte	0x14
+	.byte	0xab
+	.4byte	0x50
+	.byte	0x1c
+	.uleb128 0x15
+	.4byte	.LASF271
+	.byte	0x14
+	.byte	0xad
+	.4byte	0xe67
+	.byte	0x20
+	.uleb128 0x15
+	.4byte	.LASF272
+	.byte	0x14
+	.byte	0xae
+	.4byte	0xe86
+	.byte	0x24
+	.uleb128 0x15
+	.4byte	.LASF273
+	.byte	0x14
+	.byte	0xaf
+	.4byte	0xe9b
+	.byte	0x28
+	.uleb128 0x15
+	.4byte	.LASF274
+	.byte	0x14
+	.byte	0xb0
+	.4byte	0xeac
+	.byte	0x2c
+	.uleb128 0x15
+	.4byte	.LASF275
+	.byte	0x14
+	.byte	0xb4
+	.4byte	0xe9b
+	.byte	0x30
+	.uleb128 0x15
+	.4byte	.LASF276
+	.byte	0x14
+	.byte	0xb5
+	.4byte	0xe61
+	.byte	0x34
+	.uleb128 0x15
+	.4byte	.LASF277
+	.byte	0x14
+	.byte	0xb6
+	.4byte	0x50
+	.byte	0x38
+	.uleb128 0x15
+	.4byte	.LASF278
+	.byte	0x14
+	.byte	0xb7
+	.4byte	0x14e
+	.byte	0x3c
+	.byte	0
+	.uleb128 0xc
+	.4byte	0xdd
+	.4byte	0xe4d
+	.uleb128 0xd
+	.4byte	0xcb
+	.byte	0xf
+	.byte	0
+	.uleb128 0x19
+	.4byte	0x50
+	.4byte	0xe61
+	.uleb128 0x1a
+	.4byte	0xe61
+	.uleb128 0x1a
+	.4byte	0xcff
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xda0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xe4d
+	.uleb128 0x19
+	.4byte	0x50
+	.4byte	0xe86
+	.uleb128 0x1a
+	.4byte	0xe61
+	.uleb128 0x1a
+	.4byte	0x14e
+	.uleb128 0x1a
+	.4byte	0x50
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xe6d
+	.uleb128 0x19
+	.4byte	0x50
+	.4byte	0xe9b
+	.uleb128 0x1a
+	.4byte	0xe61
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xe8c
+	.uleb128 0x28
+	.4byte	0xeac
+	.uleb128 0x1a
+	.4byte	0xe61
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xea1
+	.uleb128 0x4
+	.4byte	.LASF279
+	.byte	0x14
+	.byte	0xbd
+	.4byte	0xe61
 	.uleb128 0xc
 	.4byte	0x90
-	.4byte	0xd98
+	.4byte	0xecd
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x5
 	.byte	0
 	.uleb128 0xf
-	.4byte	.LASF266
+	.4byte	.LASF280
 	.byte	0x14
 	.2byte	0x1fd
-	.4byte	0xd69
+	.4byte	0xd81
 	.uleb128 0xf
-	.4byte	.LASF267
+	.4byte	.LASF281
 	.byte	0x14
 	.2byte	0x1fe
-	.4byte	0xd69
+	.4byte	0xd81
 	.uleb128 0xf
-	.4byte	.LASF268
+	.4byte	.LASF282
 	.byte	0x14
 	.2byte	0x200
-	.4byte	0xd69
+	.4byte	0xd81
 	.uleb128 0xf
-	.4byte	.LASF269
+	.4byte	.LASF283
 	.byte	0x14
 	.2byte	0x205
-	.4byte	0xd0b
+	.4byte	0xd23
 	.uleb128 0xf
-	.4byte	.LASF270
+	.4byte	.LASF284
 	.byte	0x14
 	.2byte	0x206
-	.4byte	0xd0b
+	.4byte	0xd23
 	.uleb128 0xc
 	.4byte	0xdd
-	.4byte	0xde4
+	.4byte	0xf19
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x3f
 	.byte	0
 	.uleb128 0xf
-	.4byte	.LASF271
+	.4byte	.LASF285
 	.byte	0x14
 	.2byte	0x207
-	.4byte	0xdd4
+	.4byte	0xf09
 	.uleb128 0xf
-	.4byte	.LASF272
+	.4byte	.LASF286
 	.byte	0x14
 	.2byte	0x209
-	.4byte	0xd88
+	.4byte	0xebd
 	.uleb128 0xf
-	.4byte	.LASF273
+	.4byte	.LASF287
 	.byte	0x14
 	.2byte	0x20a
-	.4byte	0xd88
+	.4byte	0xebd
 	.uleb128 0xf
-	.4byte	.LASF274
+	.4byte	.LASF288
 	.byte	0x14
 	.2byte	0x20b
-	.4byte	0xd69
+	.4byte	0xd81
 	.uleb128 0xf
-	.4byte	.LASF275
+	.4byte	.LASF289
 	.byte	0x14
 	.2byte	0x20c
-	.4byte	0xd69
+	.4byte	0xd81
 	.uleb128 0xf
-	.4byte	.LASF276
+	.4byte	.LASF290
 	.byte	0x14
 	.2byte	0x20d
-	.4byte	0xd82
+	.4byte	0xd9a
 	.uleb128 0xc
-	.4byte	0xd82
-	.4byte	0xe3c
+	.4byte	0xd9a
+	.4byte	0xf71
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x3
 	.byte	0
 	.uleb128 0xf
-	.4byte	.LASF277
+	.4byte	.LASF291
 	.byte	0x14
 	.2byte	0x20e
-	.4byte	0xe2c
+	.4byte	0xf61
 	.uleb128 0xf
-	.4byte	.LASF278
+	.4byte	.LASF292
 	.byte	0x14
 	.2byte	0x20f
-	.4byte	0xd82
+	.4byte	0xd9a
 	.uleb128 0xf
-	.4byte	.LASF279
+	.4byte	.LASF293
 	.byte	0x14
 	.2byte	0x210
 	.4byte	0x50
 	.uleb128 0xc
 	.4byte	0x9a
-	.4byte	0xe70
+	.4byte	0xfa5
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x5
 	.byte	0
 	.uleb128 0x7
-	.4byte	0xe60
+	.4byte	0xf95
 	.uleb128 0xf
-	.4byte	.LASF280
+	.4byte	.LASF294
 	.byte	0x14
 	.2byte	0x211
-	.4byte	0xe70
+	.4byte	0xfa5
 	.uleb128 0xf
-	.4byte	.LASF281
+	.4byte	.LASF295
 	.byte	0x14
 	.2byte	0x212
-	.4byte	0xe70
+	.4byte	0xfa5
 	.uleb128 0xf
-	.4byte	.LASF282
+	.4byte	.LASF296
 	.byte	0x14
 	.2byte	0x216
 	.4byte	0x117
 	.uleb128 0xf
-	.4byte	.LASF283
+	.4byte	.LASF297
 	.byte	0x14
 	.2byte	0x217
 	.4byte	0x117
 	.uleb128 0xf
-	.4byte	.LASF284
+	.4byte	.LASF298
 	.byte	0x14
 	.2byte	0x219
 	.4byte	0x50
 	.uleb128 0xc
 	.4byte	0xdd
-	.4byte	0xec2
-	.uleb128 0x1d
+	.4byte	0xff7
+	.uleb128 0x1e
 	.4byte	0xcb
 	.2byte	0x3ff
 	.byte	0
 	.uleb128 0xf
-	.4byte	.LASF285
+	.4byte	.LASF299
 	.byte	0x14
 	.2byte	0x220
-	.4byte	0xeb1
+	.4byte	0xfe6
 	.uleb128 0xf
-	.4byte	.LASF286
+	.4byte	.LASF300
 	.byte	0x14
 	.2byte	0x222
 	.4byte	0x9f
 	.uleb128 0xf
-	.4byte	.LASF287
+	.4byte	.LASF301
 	.byte	0x14
 	.2byte	0x224
 	.4byte	0x9f
-	.uleb128 0xf
-	.4byte	.LASF288
-	.byte	0x14
-	.2byte	0x230
-	.4byte	0xd69
-	.uleb128 0x27
-	.4byte	.LASF289
+	.uleb128 0x29
+	.4byte	.LASF302
 	.byte	0x4
 	.4byte	0x7b
 	.byte	0x14
 	.2byte	0x286
-	.4byte	0xf1c
+	.4byte	0x1045
 	.uleb128 0x11
-	.4byte	.LASF290
+	.4byte	.LASF303
 	.byte	0
 	.uleb128 0x11
-	.4byte	.LASF291
+	.4byte	.LASF304
 	.byte	0x1
 	.uleb128 0x11
-	.4byte	.LASF292
+	.4byte	.LASF305
 	.byte	0x2
 	.uleb128 0x11
-	.4byte	.LASF293
+	.4byte	.LASF306
 	.byte	0x3
 	.byte	0
 	.uleb128 0xf
-	.4byte	.LASF294
+	.4byte	.LASF307
 	.byte	0x14
 	.2byte	0x28c
-	.4byte	0xef2
+	.4byte	0x101b
 	.uleb128 0x4
-	.4byte	.LASF295
+	.4byte	.LASF308
 	.byte	0x15
-	.byte	0x2a
+	.byte	0x2b
 	.4byte	0x190
 	.uleb128 0x4
-	.4byte	.LASF296
+	.4byte	.LASF309
 	.byte	0x15
-	.byte	0x2a
+	.byte	0x2b
 	.4byte	0x190
 	.uleb128 0x14
-	.4byte	.LASF297
+	.4byte	.LASF310
 	.byte	0x2c
 	.byte	0x16
 	.byte	0x1b
-	.4byte	0xfce
+	.4byte	0x10f7
 	.uleb128 0x15
 	.4byte	.LASF74
 	.byte	0x16
@@ -3549,37 +3636,37 @@ __func__.8692:
 	.4byte	0x90
 	.byte	0x4
 	.uleb128 0x15
-	.4byte	.LASF261
+	.4byte	.LASF263
 	.byte	0x16
 	.byte	0x1e
 	.4byte	0x101
 	.byte	0x8
 	.uleb128 0x15
-	.4byte	.LASF298
+	.4byte	.LASF311
 	.byte	0x16
 	.byte	0x1f
 	.4byte	0x101
 	.byte	0xc
 	.uleb128 0x15
-	.4byte	.LASF299
+	.4byte	.LASF312
 	.byte	0x16
 	.byte	0x25
 	.4byte	0x101
 	.byte	0x10
 	.uleb128 0x15
-	.4byte	.LASF300
+	.4byte	.LASF313
 	.byte	0x16
 	.byte	0x27
 	.4byte	0x14e
 	.byte	0x14
 	.uleb128 0x15
-	.4byte	.LASF301
+	.4byte	.LASF314
 	.byte	0x16
 	.byte	0x28
 	.4byte	0x9f
 	.byte	0x18
 	.uleb128 0x15
-	.4byte	.LASF302
+	.4byte	.LASF315
 	.byte	0x16
 	.byte	0x29
 	.4byte	0x9f
@@ -3591,7 +3678,7 @@ __func__.8692:
 	.4byte	0x9f
 	.byte	0x20
 	.uleb128 0x15
-	.4byte	.LASF303
+	.4byte	.LASF316
 	.byte	0x16
 	.byte	0x2b
 	.4byte	0x9f
@@ -3604,11 +3691,11 @@ __func__.8692:
 	.byte	0x28
 	.byte	0
 	.uleb128 0x14
-	.4byte	.LASF304
+	.4byte	.LASF317
 	.byte	0x14
 	.byte	0x16
 	.byte	0x38
-	.4byte	0x1017
+	.4byte	0x1140
 	.uleb128 0xb
 	.ascii	"dev\000"
 	.byte	0x16
@@ -3616,35 +3703,35 @@ __func__.8692:
 	.4byte	0x14e
 	.byte	0
 	.uleb128 0x15
-	.4byte	.LASF305
+	.4byte	.LASF278
 	.byte	0x16
 	.byte	0x3a
 	.4byte	0x14e
 	.byte	0x4
 	.uleb128 0x15
-	.4byte	.LASF306
+	.4byte	.LASF318
 	.byte	0x16
 	.byte	0x3b
 	.4byte	0x50
 	.byte	0x8
 	.uleb128 0x15
-	.4byte	.LASF307
+	.4byte	.LASF319
 	.byte	0x16
 	.byte	0x3c
 	.4byte	0xd7
 	.byte	0xc
 	.uleb128 0x15
-	.4byte	.LASF308
+	.4byte	.LASF320
 	.byte	0x16
 	.byte	0x3d
-	.4byte	0x103b
+	.4byte	0x1164
 	.byte	0x10
 	.byte	0
 	.uleb128 0x19
 	.4byte	0x122
-	.4byte	0x1035
+	.4byte	0x115e
 	.uleb128 0x1a
-	.4byte	0x1035
+	.4byte	0x115e
 	.uleb128 0x1a
 	.4byte	0x122
 	.uleb128 0x1a
@@ -3654,159 +3741,160 @@ __func__.8692:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0xfce
+	.4byte	0x10f7
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x1017
+	.4byte	0x1140
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0xf3e
+	.4byte	0x1067
 	.uleb128 0xf
-	.4byte	.LASF309
+	.4byte	.LASF321
 	.byte	0x17
 	.2byte	0x3ba
 	.4byte	0x122
 	.uleb128 0xf
-	.4byte	.LASF310
+	.4byte	.LASF322
 	.byte	0x17
 	.2byte	0x3bb
 	.4byte	0x122
 	.uleb128 0xf
-	.4byte	.LASF311
+	.4byte	.LASF323
 	.byte	0x17
 	.2byte	0x3bc
 	.4byte	0x122
-	.uleb128 0x28
-	.4byte	.LASF327
+	.uleb128 0x2a
+	.4byte	.LASF338
 	.byte	0x1
 	.2byte	0x2f1
 	.4byte	0x50
-	.4byte	.LFB215
-	.4byte	.LFE215-.LFB215
+	.4byte	.LFB219
+	.4byte	.LFE219-.LFB219
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x17b1
-	.uleb128 0x29
-	.4byte	.LASF312
+	.4byte	0x189a
+	.uleb128 0x2b
+	.4byte	.LASF324
 	.byte	0x1
 	.2byte	0x2f1
-	.4byte	0x1041
+	.4byte	0x116a
 	.4byte	.LLST59
-	.uleb128 0x29
-	.4byte	.LASF313
+	.uleb128 0x2b
+	.4byte	.LASF325
 	.byte	0x1
 	.2byte	0x2f2
-	.4byte	0x1035
+	.4byte	0x115e
 	.4byte	.LLST60
-	.uleb128 0x29
-	.4byte	.LASF314
+	.uleb128 0x2b
+	.4byte	.LASF326
 	.byte	0x1
 	.2byte	0x2f2
 	.4byte	0x122
 	.4byte	.LLST61
-	.uleb128 0x2a
+	.uleb128 0x2c
 	.ascii	"fit\000"
 	.byte	0x1
 	.2byte	0x2f2
 	.4byte	0x14e
 	.4byte	.LLST62
-	.uleb128 0x2b
-	.4byte	.LASF315
+	.uleb128 0x2d
+	.4byte	.LASF327
 	.byte	0x1
 	.2byte	0x2f4
 	.4byte	0x122
 	.4byte	.LLST63
-	.uleb128 0x2c
+	.uleb128 0x2e
 	.ascii	"ret\000"
 	.byte	0x1
 	.2byte	0x2f5
 	.4byte	0x50
 	.4byte	.LLST64
-	.uleb128 0x2c
+	.uleb128 0x2f
 	.ascii	"i\000"
 	.byte	0x1
 	.2byte	0x2f6
 	.4byte	0x50
-	.4byte	.LLST65
-	.uleb128 0x2d
-	.4byte	0x17b1
+	.byte	0
+	.uleb128 0x30
+	.4byte	0x189a
 	.4byte	.LBB82
 	.4byte	.Ldebug_ranges0+0x58
 	.byte	0x1
 	.2byte	0x308
-	.4byte	0x158b
-	.uleb128 0x2e
-	.4byte	0x17e6
+	.4byte	0x16b2
+	.uleb128 0x31
+	.4byte	0x18cf
+	.4byte	.LLST65
+	.uleb128 0x31
+	.4byte	0x18c3
 	.4byte	.LLST66
-	.uleb128 0x2e
-	.4byte	0x17da
+	.uleb128 0x31
+	.4byte	0x18b7
 	.4byte	.LLST67
-	.uleb128 0x2e
-	.4byte	0x17ce
+	.uleb128 0x31
+	.4byte	0x18ab
 	.4byte	.LLST68
-	.uleb128 0x2f
-	.4byte	0x17c2
-	.uleb128 0x30
+	.uleb128 0x32
 	.4byte	.Ldebug_ranges0+0x58
-	.uleb128 0x31
-	.4byte	0x17f2
+	.uleb128 0x33
+	.4byte	0x18db
 	.uleb128 0x3
 	.byte	0x91
-	.sleb128 -152
-	.uleb128 0x31
-	.4byte	0x17fe
+	.sleb128 -188
+	.uleb128 0x33
+	.4byte	0x18e7
 	.uleb128 0x3
 	.byte	0x91
-	.sleb128 -208
-	.uleb128 0x32
-	.4byte	0x180a
+	.sleb128 -244
+	.uleb128 0x34
+	.4byte	0x18f3
 	.4byte	.LLST69
-	.uleb128 0x32
-	.4byte	0x1816
+	.uleb128 0x34
+	.4byte	0x18ff
 	.4byte	.LLST70
-	.uleb128 0x32
-	.4byte	0x1822
+	.uleb128 0x34
+	.4byte	0x190b
 	.4byte	.LLST71
-	.uleb128 0x32
-	.4byte	0x182e
+	.uleb128 0x34
+	.4byte	0x1917
 	.4byte	.LLST72
-	.uleb128 0x32
-	.4byte	0x183a
-	.4byte	.LLST73
-	.uleb128 0x33
-	.4byte	0x1846
 	.uleb128 0x34
-	.4byte	0x1ac9
+	.4byte	0x1923
+	.4byte	.LLST73
+	.uleb128 0x35
+	.4byte	0x192f
+	.uleb128 0x36
+	.4byte	0x1bb2
 	.4byte	.LBB84
 	.4byte	.LBE84-.LBB84
 	.byte	0x1
 	.2byte	0x2ad
-	.4byte	0x11bc
-	.uleb128 0x2e
-	.4byte	0x1af2
+	.4byte	0x12e6
+	.uleb128 0x31
+	.4byte	0x1bdb
 	.4byte	.LLST74
-	.uleb128 0x2e
-	.4byte	0x1ae6
+	.uleb128 0x31
+	.4byte	0x1bcf
 	.4byte	.LLST75
-	.uleb128 0x2e
-	.4byte	0x1ada
+	.uleb128 0x31
+	.4byte	0x1bc3
 	.4byte	.LLST76
-	.uleb128 0x35
-	.4byte	.LVL157
-	.4byte	0x24f5
-	.uleb128 0x36
+	.uleb128 0x37
+	.4byte	.LVL156
+	.4byte	0x25de
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x78
+	.byte	0x7b
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
@@ -3814,236 +3902,235 @@ __func__.8692:
 	.sleb128 4
 	.byte	0
 	.byte	0
-	.uleb128 0x37
+	.uleb128 0x39
 	.4byte	.LBB86
 	.4byte	.LBE86-.LBB86
-	.4byte	0x13f3
-	.uleb128 0x31
-	.4byte	0x1854
+	.4byte	0x151b
+	.uleb128 0x33
+	.4byte	0x193d
 	.uleb128 0x3
 	.byte	0x91
-	.sleb128 -212
-	.uleb128 0x34
-	.4byte	0x1ac9
+	.sleb128 -248
+	.uleb128 0x36
+	.4byte	0x1bb2
 	.4byte	.LBB87
 	.4byte	.LBE87-.LBB87
 	.byte	0x1
 	.2byte	0x2c4
-	.4byte	0x1221
-	.uleb128 0x2e
-	.4byte	0x1af2
+	.4byte	0x134b
+	.uleb128 0x31
+	.4byte	0x1bdb
 	.4byte	.LLST77
-	.uleb128 0x2e
-	.4byte	0x1ae6
+	.uleb128 0x31
+	.4byte	0x1bcf
 	.4byte	.LLST78
-	.uleb128 0x2e
-	.4byte	0x1ada
+	.uleb128 0x31
+	.4byte	0x1bc3
 	.4byte	.LLST79
-	.uleb128 0x35
-	.4byte	.LVL163
-	.4byte	0x24f5
-	.uleb128 0x36
+	.uleb128 0x37
+	.4byte	.LVL162
+	.4byte	0x25de
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x4
 	.byte	0x7d
 	.sleb128 96
 	.byte	0x6
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0x7d
-	.sleb128 108
+	.sleb128 104
 	.byte	0
 	.byte	0
-	.uleb128 0x34
-	.4byte	0x1afe
+	.uleb128 0x36
+	.4byte	0x1be7
 	.4byte	.LBB89
 	.4byte	.LBE89-.LBB89
 	.byte	0x1
 	.2byte	0x2e1
-	.4byte	0x136c
-	.uleb128 0x2e
-	.4byte	0x1b3f
+	.4byte	0x1494
+	.uleb128 0x31
+	.4byte	0x1c28
 	.4byte	.LLST80
-	.uleb128 0x2e
-	.4byte	0x1b33
+	.uleb128 0x31
+	.4byte	0x1c1c
 	.4byte	.LLST81
-	.uleb128 0x2e
-	.4byte	0x1b27
+	.uleb128 0x31
+	.4byte	0x1c10
 	.4byte	.LLST82
-	.uleb128 0x2f
-	.4byte	0x1b1b
-	.uleb128 0x2e
-	.4byte	0x1b0f
+	.uleb128 0x3a
+	.4byte	0x1c04
+	.uleb128 0x31
+	.4byte	0x1bf8
 	.4byte	.LLST83
-	.uleb128 0x38
+	.uleb128 0x3b
 	.4byte	.LBB90
 	.4byte	.LBE90-.LBB90
-	.uleb128 0x32
-	.4byte	0x1b4b
+	.uleb128 0x34
+	.4byte	0x1c34
 	.4byte	.LLST84
-	.uleb128 0x31
-	.4byte	0x1b57
+	.uleb128 0x33
+	.4byte	0x1c40
 	.uleb128 0x3
 	.byte	0x91
-	.sleb128 -196
-	.uleb128 0x32
-	.4byte	0x1b63
+	.sleb128 -232
+	.uleb128 0x34
+	.4byte	0x1c4c
 	.4byte	.LLST85
-	.uleb128 0x39
-	.4byte	.LVL170
-	.4byte	0x239b
-	.4byte	0x12ac
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL169
+	.4byte	0x2484
+	.4byte	0x13d6
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC23
-	.uleb128 0x36
+	.4byte	.LC21
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
-	.byte	0x7b
+	.byte	0x78
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x3
 	.byte	0x7d
-	.sleb128 124
+	.sleb128 120
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL172
-	.4byte	0x21d1
-	.4byte	0x12d7
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL171
+	.4byte	0x22ba
+	.4byte	0x13ff
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x4
-	.byte	0x7d
-	.sleb128 100
-	.byte	0x6
-	.uleb128 0x36
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC23
-	.uleb128 0x36
+	.4byte	.LC21
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
-	.byte	0x7b
+	.byte	0x78
 	.sleb128 0
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL175
-	.4byte	0x2501
-	.4byte	0x12ff
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL174
+	.4byte	0x25ea
+	.4byte	0x1427
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x78
+	.byte	0x7b
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC24
-	.uleb128 0x36
+	.4byte	.LC22
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x1
 	.byte	0x30
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL176
-	.4byte	0x2501
-	.4byte	0x1327
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL175
+	.4byte	0x25ea
+	.4byte	0x144f
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x78
+	.byte	0x7b
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC25
-	.uleb128 0x36
+	.4byte	.LC23
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x1
 	.byte	0x30
 	.byte	0
-	.uleb128 0x35
-	.4byte	.LVL177
-	.4byte	0x250d
-	.uleb128 0x36
+	.uleb128 0x37
+	.4byte	.LVL176
+	.4byte	0x25f6
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x4
 	.byte	0x7d
 	.sleb128 96
 	.byte	0x6
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x7b
+	.byte	0x78
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x4
 	.byte	0x7d
 	.sleb128 92
 	.byte	0x6
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x4
 	.byte	0x7d
 	.sleb128 88
 	.byte	0x6
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x2
 	.byte	0x7d
 	.sleb128 0
@@ -4051,7 +4138,7 @@ __func__.8692:
 	.byte	0x7d
 	.sleb128 84
 	.byte	0x6
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x2
 	.byte	0x7d
 	.sleb128 4
@@ -4059,7 +4146,7 @@ __func__.8692:
 	.byte	0x7d
 	.sleb128 80
 	.byte	0x6
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x2
 	.byte	0x7d
 	.sleb128 8
@@ -4070,59 +4157,59 @@ __func__.8692:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL159
-	.4byte	0x21d1
-	.4byte	0x1397
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL158
+	.4byte	0x22ba
+	.4byte	0x14bd
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x4
-	.byte	0x7d
-	.sleb128 100
-	.byte	0x6
-	.uleb128 0x36
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC23
-	.uleb128 0x36
+	.4byte	.LC21
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
-	.byte	0x7b
+	.byte	0x78
 	.sleb128 0
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL164
-	.4byte	0x1ca2
-	.4byte	0x13c7
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL163
+	.4byte	0x1d8b
+	.4byte	0x14ef
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x4
+	.byte	0x7d
+	.sleb128 100
+	.byte	0x6
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x2
 	.byte	0x7d
 	.sleb128 0
@@ -4130,284 +4217,284 @@ __func__.8692:
 	.byte	0x7d
 	.sleb128 96
 	.byte	0x6
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x2
 	.byte	0x7d
 	.sleb128 4
 	.uleb128 0x2
-	.byte	0x78
+	.byte	0x7b
 	.sleb128 0
 	.byte	0
-	.uleb128 0x35
-	.4byte	.LVL166
-	.4byte	0x1b70
-	.uleb128 0x36
+	.uleb128 0x37
+	.4byte	.LVL165
+	.4byte	0x1c59
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x78
+	.byte	0x7b
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x4
+	.byte	0x7d
+	.sleb128 100
+	.byte	0x6
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
 	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x2
 	.byte	0x7d
 	.sleb128 0
-	.uleb128 0x4
-	.byte	0x7d
-	.sleb128 100
-	.byte	0x6
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL135
-	.4byte	0x19a9
-	.4byte	0x141c
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL134
+	.4byte	0x1a92
+	.4byte	0x1545
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.uleb128 0x36
-	.uleb128 0x1
-	.byte	0x52
 	.uleb128 0x4
 	.byte	0x7d
-	.sleb128 92
+	.sleb128 100
 	.byte	0x6
-	.uleb128 0x36
+	.uleb128 0x38
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x3
 	.byte	0x7d
-	.sleb128 112
+	.sleb128 108
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL136
-	.4byte	0x2518
-	.4byte	0x1439
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL135
+	.4byte	0x2601
+	.4byte	0x1562
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC18
+	.4byte	.LC16
 	.byte	0
-	.uleb128 0x3a
+	.uleb128 0x3d
+	.4byte	.LVL136
+	.4byte	0x260d
+	.uleb128 0x3c
 	.4byte	.LVL137
-	.4byte	0x2524
-	.uleb128 0x39
-	.4byte	.LVL138
-	.4byte	0x2530
-	.4byte	0x1459
-	.uleb128 0x36
+	.4byte	0x2619
+	.4byte	0x1582
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC19
+	.4byte	.LC17
 	.byte	0
-	.uleb128 0x3a
+	.uleb128 0x3d
+	.4byte	.LVL138
+	.4byte	0x2624
+	.uleb128 0x3c
 	.4byte	.LVL139
-	.4byte	0x253b
-	.uleb128 0x39
-	.4byte	.LVL140
-	.4byte	0x21d1
-	.4byte	0x148d
-	.uleb128 0x36
+	.4byte	0x22ba
+	.4byte	0x15b4
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x4
-	.byte	0x7d
-	.sleb128 100
-	.byte	0x6
-	.uleb128 0x36
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC20
-	.uleb128 0x36
+	.4byte	.LC18
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
-	.byte	0x7b
+	.byte	0x78
 	.sleb128 0
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL142
-	.4byte	0x1ca2
-	.4byte	0x14bc
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL141
+	.4byte	0x1d8b
+	.4byte	0x15e5
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x4
+	.byte	0x7d
+	.sleb128 100
+	.byte	0x6
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x2
 	.byte	0x7d
 	.sleb128 0
 	.uleb128 0x2
-	.byte	0x78
+	.byte	0x7b
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x2
 	.byte	0x7d
 	.sleb128 4
 	.uleb128 0x3
 	.byte	0x7d
-	.sleb128 168
+	.sleb128 164
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LVL144
-	.4byte	0x1a9e
-	.uleb128 0x39
-	.4byte	.LVL146
-	.4byte	0x2530
-	.4byte	0x14dc
-	.uleb128 0x36
+	.uleb128 0x3d
+	.4byte	.LVL143
+	.4byte	0x1b87
+	.uleb128 0x3c
+	.4byte	.LVL145
+	.4byte	0x2619
+	.4byte	0x1605
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC21
+	.4byte	.LC19
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL147
-	.4byte	0x21d1
-	.4byte	0x1506
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL146
+	.4byte	0x22ba
+	.4byte	0x162d
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x4
-	.byte	0x7d
-	.sleb128 100
-	.byte	0x6
-	.uleb128 0x36
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC22
-	.uleb128 0x36
+	.4byte	.LC20
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x1
 	.byte	0x30
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL149
-	.4byte	0x21d1
-	.4byte	0x1530
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL148
+	.4byte	0x22ba
+	.4byte	0x1655
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x4
-	.byte	0x7d
-	.sleb128 100
-	.byte	0x6
-	.uleb128 0x36
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC23
-	.uleb128 0x36
+	.4byte	.LC21
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x1
 	.byte	0x30
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL153
-	.4byte	0x1ca2
-	.4byte	0x155e
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL152
+	.4byte	0x1d8b
+	.4byte	0x1685
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x4
+	.byte	0x7d
+	.sleb128 100
+	.byte	0x6
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x2
 	.byte	0x7d
 	.sleb128 0
 	.uleb128 0x2
-	.byte	0x78
+	.byte	0x7b
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x2
 	.byte	0x7d
 	.sleb128 4
@@ -4415,436 +4502,392 @@ __func__.8692:
 	.byte	0x74
 	.sleb128 0
 	.byte	0
-	.uleb128 0x35
-	.4byte	.LVL158
-	.4byte	0x1b70
-	.uleb128 0x36
+	.uleb128 0x37
+	.4byte	.LVL157
+	.4byte	0x1c59
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x4
+	.byte	0x7d
+	.sleb128 100
+	.byte	0x6
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
 	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x2
 	.byte	0x7d
 	.sleb128 0
-	.uleb128 0x4
-	.byte	0x7d
-	.sleb128 100
-	.byte	0x6
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x2d
-	.4byte	0x1877
+	.uleb128 0x30
+	.4byte	0x1960
 	.4byte	.LBB92
 	.4byte	.Ldebug_ranges0+0x70
 	.byte	0x1
 	.2byte	0x30c
-	.4byte	0x1758
-	.uleb128 0x2e
-	.4byte	0x1894
+	.4byte	0x187d
+	.uleb128 0x31
+	.4byte	0x197d
 	.4byte	.LLST86
-	.uleb128 0x2e
-	.4byte	0x1888
+	.uleb128 0x31
+	.4byte	0x1971
 	.4byte	.LLST87
-	.uleb128 0x30
+	.uleb128 0x32
 	.4byte	.Ldebug_ranges0+0x70
-	.uleb128 0x31
-	.4byte	0x18a0
+	.uleb128 0x33
+	.4byte	0x1989
 	.uleb128 0x3
 	.byte	0x91
-	.sleb128 -208
-	.uleb128 0x31
-	.4byte	0x18ac
+	.sleb128 -244
+	.uleb128 0x33
+	.4byte	0x1995
 	.uleb128 0x3
 	.byte	0x91
-	.sleb128 -196
-	.uleb128 0x3b
-	.4byte	0x18b8
-	.4byte	0x24e2
+	.sleb128 -232
+	.uleb128 0x3e
+	.4byte	0x19a1
+	.4byte	0x25cb
 	.4byte	.LLST89
-	.uleb128 0x32
-	.4byte	0x18c4
+	.uleb128 0x34
+	.4byte	0x19ad
 	.4byte	.LLST90
-	.uleb128 0x31
-	.4byte	0x18d0
+	.uleb128 0x33
+	.4byte	0x19b9
 	.uleb128 0x3
 	.byte	0x91
-	.sleb128 -212
-	.uleb128 0x32
-	.4byte	0x18dc
+	.sleb128 -248
+	.uleb128 0x34
+	.4byte	0x19c5
 	.4byte	.LLST91
-	.uleb128 0x32
-	.4byte	0x18e8
+	.uleb128 0x34
+	.4byte	0x19d1
 	.4byte	.LLST92
-	.uleb128 0x32
-	.4byte	0x18f4
+	.uleb128 0x34
+	.4byte	0x19dd
 	.4byte	.LLST93
-	.uleb128 0x32
-	.4byte	0x1900
+	.uleb128 0x34
+	.4byte	0x19e9
 	.4byte	.LLST94
-	.uleb128 0x32
-	.4byte	0x190a
+	.uleb128 0x34
+	.4byte	0x19f3
 	.4byte	.LLST95
-	.uleb128 0x32
-	.4byte	0x1916
+	.uleb128 0x34
+	.4byte	0x19ff
 	.4byte	.LLST96
-	.uleb128 0x31
-	.4byte	0x1922
+	.uleb128 0x33
+	.4byte	0x1a0b
 	.uleb128 0x3
 	.byte	0x91
-	.sleb128 -152
-	.uleb128 0x33
-	.4byte	0x192e
-	.uleb128 0x39
+	.sleb128 -188
+	.uleb128 0x35
+	.4byte	0x1a17
+	.uleb128 0x3c
 	.4byte	.LVL184
-	.4byte	0x1970
-	.4byte	0x1645
-	.uleb128 0x36
+	.4byte	0x1a59
+	.4byte	0x176c
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x3c
 	.4byte	.LVL186
-	.4byte	0x2546
-	.4byte	0x165a
-	.uleb128 0x36
+	.4byte	0x262f
+	.4byte	0x1781
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0x77
-	.sleb128 152
+	.sleb128 148
 	.byte	0
-	.uleb128 0x3a
+	.uleb128 0x3d
 	.4byte	.LVL187
-	.4byte	0x2530
-	.uleb128 0x3c
-	.4byte	.LVL191
+	.4byte	0x2619
+	.uleb128 0x3f
+	.4byte	.LVL192
 	.uleb128 0x2
 	.byte	0x76
 	.sleb128 0
-	.4byte	0x1687
-	.uleb128 0x36
+	.4byte	0x17ae
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x78
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x1
 	.byte	0x31
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
 	.byte	0x7a
 	.sleb128 0
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL194
-	.4byte	0x19a9
-	.4byte	0x16ae
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL195
+	.4byte	0x1a92
+	.4byte	0x17d5
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x78
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x7a
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x3
 	.byte	0x77
-	.sleb128 92
+	.sleb128 88
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL195
-	.4byte	0x2518
-	.4byte	0x16cd
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL197
+	.4byte	0x2601
+	.4byte	0x17f4
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x4
 	.byte	0x77
 	.sleb128 84
 	.byte	0x6
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC18
+	.4byte	.LC16
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL197
-	.4byte	0x21d1
-	.4byte	0x16f6
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL199
+	.4byte	0x22ba
+	.4byte	0x181b
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x4
 	.byte	0x77
 	.sleb128 84
 	.byte	0x6
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x4
-	.byte	0x77
-	.sleb128 80
-	.byte	0x6
-	.uleb128 0x36
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x7a
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x1
 	.byte	0x30
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL199
-	.4byte	0x1ca2
-	.4byte	0x1720
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL201
+	.4byte	0x1d8b
+	.4byte	0x1845
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x78
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x4
 	.byte	0x77
 	.sleb128 84
 	.byte	0x6
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x2
 	.byte	0x7d
 	.sleb128 4
 	.uleb128 0x3
 	.byte	0x77
-	.sleb128 108
+	.sleb128 104
 	.byte	0
-	.uleb128 0x39
-	.4byte	.LVL201
-	.4byte	0x2551
-	.4byte	0x173d
-	.uleb128 0x36
+	.uleb128 0x3c
+	.4byte	.LVL203
+	.4byte	0x263a
+	.4byte	0x1862
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x7a
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	.LC0
 	.byte	0
-	.uleb128 0x35
-	.4byte	.LVL206
-	.4byte	0x2551
-	.uleb128 0x36
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.uleb128 0x36
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x3d
-	.4byte	0xd2
-	.4byte	.LLST88
-	.uleb128 0x39
-	.4byte	.LVL128
-	.4byte	0x2530
-	.4byte	0x177e
-	.uleb128 0x36
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC15
-	.uleb128 0x36
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.byte	0
-	.uleb128 0x3c
-	.4byte	.LVL129
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.4byte	0x17a7
-	.uleb128 0x36
+	.uleb128 0x37
+	.4byte	.LVL207
+	.4byte	0x263a
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x36
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.uleb128 0x36
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x4
-	.byte	0x7d
-	.sleb128 96
-	.byte	0x6
-	.uleb128 0x36
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x4
-	.byte	0x7d
-	.sleb128 92
-	.byte	0x6
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x38
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
 	.byte	0
-	.uleb128 0x3a
+	.byte	0
+	.byte	0
+	.uleb128 0x40
+	.4byte	0xd2
+	.4byte	.LLST88
+	.uleb128 0x37
 	.4byte	.LVL130
-	.4byte	0x2530
+	.4byte	0x2619
+	.uleb128 0x38
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC15
 	.byte	0
-	.uleb128 0x3e
-	.4byte	.LASF322
+	.byte	0
+	.uleb128 0x41
+	.4byte	.LASF333
 	.byte	0x1
 	.2byte	0x229
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x1862
-	.uleb128 0x3f
-	.4byte	.LASF312
+	.4byte	0x194b
+	.uleb128 0x42
+	.4byte	.LASF324
 	.byte	0x1
 	.2byte	0x229
-	.4byte	0x1041
-	.uleb128 0x3f
-	.4byte	.LASF313
+	.4byte	0x116a
+	.uleb128 0x42
+	.4byte	.LASF325
 	.byte	0x1
 	.2byte	0x22a
-	.4byte	0x1035
-	.uleb128 0x3f
-	.4byte	.LASF314
+	.4byte	0x115e
+	.uleb128 0x42
+	.4byte	.LASF326
 	.byte	0x1
 	.2byte	0x22b
 	.4byte	0x122
-	.uleb128 0x3f
-	.4byte	.LASF316
+	.uleb128 0x42
+	.4byte	.LASF328
 	.byte	0x1
 	.2byte	0x22b
 	.4byte	0x14e
-	.uleb128 0x40
-	.4byte	.LASF222
+	.uleb128 0x43
+	.4byte	.LASF224
 	.byte	0x1
 	.2byte	0x22d
-	.4byte	0xf3e
-	.uleb128 0x40
-	.4byte	.LASF317
+	.4byte	0x1067
+	.uleb128 0x43
+	.4byte	.LASF329
 	.byte	0x1
 	.2byte	0x22e
 	.4byte	0x50
-	.uleb128 0x40
-	.4byte	.LASF257
+	.uleb128 0x43
+	.4byte	.LASF259
 	.byte	0x1
 	.2byte	0x22f
 	.4byte	0x50
-	.uleb128 0x41
+	.uleb128 0x44
 	.ascii	"ret\000"
 	.byte	0x1
 	.2byte	0x22f
 	.4byte	0x50
-	.uleb128 0x40
-	.4byte	.LASF318
+	.uleb128 0x43
+	.4byte	.LASF277
 	.byte	0x1
 	.2byte	0x230
 	.4byte	0x50
-	.uleb128 0x40
-	.4byte	.LASF319
+	.uleb128 0x43
+	.4byte	.LASF330
 	.byte	0x1
 	.2byte	0x231
 	.4byte	0x50
-	.uleb128 0x41
+	.uleb128 0x44
 	.ascii	"fit\000"
 	.byte	0x1
 	.2byte	0x232
 	.4byte	0x14e
-	.uleb128 0x42
-	.4byte	.LASF320
-	.4byte	0x1872
-	.4byte	.LASF322
+	.uleb128 0x45
+	.4byte	.LASF331
+	.4byte	0x195b
+	.4byte	.LASF333
+	.uleb128 0x46
 	.uleb128 0x43
-	.uleb128 0x40
-	.4byte	.LASF321
+	.4byte	.LASF332
 	.byte	0x1
 	.2byte	0x2be
 	.4byte	0x12d
@@ -4852,239 +4895,239 @@ __func__.8692:
 	.byte	0
 	.uleb128 0xc
 	.4byte	0xe4
-	.4byte	0x1872
+	.4byte	0x195b
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x1c
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x1862
-	.uleb128 0x3e
-	.4byte	.LASF323
+	.4byte	0x194b
+	.uleb128 0x41
+	.4byte	.LASF334
 	.byte	0x1
 	.2byte	0x1b5
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x193c
-	.uleb128 0x3f
-	.4byte	.LASF312
+	.4byte	0x1a25
+	.uleb128 0x42
+	.4byte	.LASF324
 	.byte	0x1
 	.2byte	0x1b5
-	.4byte	0x1041
-	.uleb128 0x3f
-	.4byte	.LASF313
+	.4byte	0x116a
+	.uleb128 0x42
+	.4byte	.LASF325
 	.byte	0x1
 	.2byte	0x1b6
-	.4byte	0x1035
-	.uleb128 0x40
-	.4byte	.LASF257
+	.4byte	0x115e
+	.uleb128 0x43
+	.4byte	.LASF259
 	.byte	0x1
 	.2byte	0x1c1
-	.4byte	0x193c
-	.uleb128 0x40
-	.4byte	.LASF222
+	.4byte	0x1a25
+	.uleb128 0x43
+	.4byte	.LASF224
 	.byte	0x1
 	.2byte	0x1c2
-	.4byte	0xf3e
-	.uleb128 0x40
-	.4byte	.LASF316
+	.4byte	0x1067
+	.uleb128 0x43
+	.4byte	.LASF328
 	.byte	0x1
 	.2byte	0x1c3
-	.4byte	0x194c
-	.uleb128 0x40
-	.4byte	.LASF324
+	.4byte	0x1a35
+	.uleb128 0x43
+	.4byte	.LASF335
 	.byte	0x1
 	.2byte	0x1c4
 	.4byte	0x50
-	.uleb128 0x40
-	.4byte	.LASF317
+	.uleb128 0x43
+	.4byte	.LASF329
 	.byte	0x1
 	.2byte	0x1c5
 	.4byte	0x50
-	.uleb128 0x40
-	.4byte	.LASF314
+	.uleb128 0x43
+	.4byte	.LASF326
 	.byte	0x1
 	.2byte	0x1c6
 	.4byte	0x50
-	.uleb128 0x40
-	.4byte	.LASF319
+	.uleb128 0x43
+	.4byte	.LASF330
 	.byte	0x1
 	.2byte	0x1c7
 	.4byte	0x50
-	.uleb128 0x41
+	.uleb128 0x44
 	.ascii	"ret\000"
 	.byte	0x1
 	.2byte	0x1c7
 	.4byte	0x50
-	.uleb128 0x41
+	.uleb128 0x44
 	.ascii	"i\000"
 	.byte	0x1
 	.2byte	0x1c7
 	.4byte	0x50
-	.uleb128 0x41
+	.uleb128 0x44
 	.ascii	"fit\000"
 	.byte	0x1
 	.2byte	0x1c8
 	.4byte	0x14e
-	.uleb128 0x40
-	.4byte	.LASF325
+	.uleb128 0x43
+	.4byte	.LASF336
 	.byte	0x1
 	.2byte	0x1ce
 	.4byte	0xd7
-	.uleb128 0x40
-	.4byte	.LASF326
+	.uleb128 0x43
+	.4byte	.LASF337
 	.byte	0x1
 	.2byte	0x1cf
 	.4byte	0x4a7
-	.uleb128 0x42
-	.4byte	.LASF320
-	.4byte	0x196b
-	.4byte	.LASF323
+	.uleb128 0x45
+	.4byte	.LASF331
+	.4byte	0x1a54
+	.4byte	.LASF334
 	.byte	0
 	.uleb128 0xc
 	.4byte	0xd7
-	.4byte	0x194c
+	.4byte	0x1a35
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x2
 	.byte	0
 	.uleb128 0xc
 	.4byte	0xdd
-	.4byte	0x195b
-	.uleb128 0x44
+	.4byte	0x1a44
+	.uleb128 0x47
 	.4byte	0xcb
 	.byte	0
 	.uleb128 0xc
 	.4byte	0xe4
-	.4byte	0x196b
+	.4byte	0x1a54
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x13
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x195b
-	.uleb128 0x45
-	.4byte	.LASF328
+	.4byte	0x1a44
+	.uleb128 0x2a
+	.4byte	.LASF339
 	.byte	0x1
 	.2byte	0x1ae
 	.4byte	0xd7
-	.4byte	.LFB212
-	.4byte	.LFE212-.LFB212
+	.4byte	.LFB216
+	.4byte	.LFE216-.LFB216
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x19a9
-	.uleb128 0x2a
+	.4byte	0x1a92
+	.uleb128 0x2c
 	.ascii	"spl\000"
 	.byte	0x1
 	.2byte	0x1ae
-	.4byte	0x1041
+	.4byte	0x116a
 	.4byte	.LLST58
-	.uleb128 0x46
-	.4byte	.LASF313
+	.uleb128 0x48
+	.4byte	.LASF325
 	.byte	0x1
 	.2byte	0x1af
-	.4byte	0x1035
+	.4byte	0x115e
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0
-	.uleb128 0x47
-	.4byte	.LASF338
+	.uleb128 0x49
+	.4byte	.LASF349
 	.byte	0x1
 	.2byte	0x17c
 	.4byte	0x14e
-	.4byte	.LFB211
-	.4byte	.LFE211-.LFB211
+	.4byte	.LFB215
+	.4byte	.LFE215-.LFB215
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1a98
-	.uleb128 0x29
-	.4byte	.LASF313
+	.4byte	0x1b81
+	.uleb128 0x2b
+	.4byte	.LASF325
 	.byte	0x1
 	.2byte	0x17c
-	.4byte	0x1035
+	.4byte	0x115e
 	.4byte	.LLST47
-	.uleb128 0x29
-	.4byte	.LASF314
+	.uleb128 0x2b
+	.4byte	.LASF326
 	.byte	0x1
 	.2byte	0x17d
 	.4byte	0x122
 	.4byte	.LLST48
-	.uleb128 0x29
-	.4byte	.LASF316
+	.uleb128 0x2b
+	.4byte	.LASF328
 	.byte	0x1
 	.2byte	0x17d
 	.4byte	0x14e
 	.4byte	.LLST49
-	.uleb128 0x29
-	.4byte	.LASF317
+	.uleb128 0x2b
+	.4byte	.LASF329
 	.byte	0x1
 	.2byte	0x17e
-	.4byte	0x1a98
+	.4byte	0x1b81
 	.4byte	.LLST50
-	.uleb128 0x48
-	.4byte	.LASF329
+	.uleb128 0x4a
+	.4byte	.LASF340
 	.byte	0x1
 	.2byte	0x180
 	.4byte	0x50
 	.byte	0x3f
-	.uleb128 0x2b
-	.4byte	.LASF330
+	.uleb128 0x2d
+	.4byte	.LASF341
 	.byte	0x1
 	.2byte	0x181
 	.4byte	0x122
 	.4byte	.LLST51
-	.uleb128 0x2b
+	.uleb128 0x2d
 	.4byte	.LASF78
 	.byte	0x1
 	.2byte	0x182
 	.4byte	0x122
 	.4byte	.LLST52
-	.uleb128 0x40
-	.4byte	.LASF331
+	.uleb128 0x43
+	.4byte	.LASF342
 	.byte	0x1
 	.2byte	0x183
 	.4byte	0x50
-	.uleb128 0x2c
+	.uleb128 0x2e
 	.ascii	"fit\000"
 	.byte	0x1
 	.2byte	0x184
 	.4byte	0x14e
 	.4byte	.LLST53
-	.uleb128 0x34
-	.4byte	0x2151
+	.uleb128 0x36
+	.4byte	0x223a
 	.4byte	.LBB61
 	.4byte	.LBE61-.LBB61
 	.byte	0x1
 	.2byte	0x1a2
-	.4byte	0x1a7c
-	.uleb128 0x2e
-	.4byte	0x2177
+	.4byte	0x1b65
+	.uleb128 0x31
+	.4byte	0x2260
 	.4byte	.LLST54
-	.uleb128 0x2e
-	.4byte	0x216c
+	.uleb128 0x31
+	.4byte	0x2255
 	.4byte	.LLST55
-	.uleb128 0x2e
-	.4byte	0x2161
+	.uleb128 0x31
+	.4byte	0x224a
 	.4byte	.LLST56
 	.byte	0
-	.uleb128 0x49
+	.uleb128 0x4b
 	.4byte	.LVL115
 	.uleb128 0x2
 	.byte	0x77
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
@@ -5095,222 +5138,222 @@ __func__.8692:
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0x50
-	.uleb128 0x45
-	.4byte	.LASF332
+	.uleb128 0x2a
+	.4byte	.LASF343
 	.byte	0x1
 	.2byte	0x177
 	.4byte	0x50
-	.4byte	.LFB210
-	.4byte	.LFE210-.LFB210
+	.4byte	.LFB214
+	.4byte	.LFE214-.LFB214
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1ac9
-	.uleb128 0x29
-	.4byte	.LASF298
+	.4byte	0x1bb2
+	.uleb128 0x2b
+	.4byte	.LASF311
 	.byte	0x1
 	.2byte	0x177
 	.4byte	0x101
 	.4byte	.LLST57
 	.byte	0
-	.uleb128 0x3e
-	.4byte	.LASF333
+	.uleb128 0x41
+	.4byte	.LASF344
 	.byte	0x1
 	.2byte	0x16e
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x1afe
-	.uleb128 0x4a
+	.4byte	0x1be7
+	.uleb128 0x4c
 	.ascii	"fit\000"
 	.byte	0x1
 	.2byte	0x16e
 	.4byte	0x3a9
-	.uleb128 0x3f
-	.4byte	.LASF334
+	.uleb128 0x42
+	.4byte	.LASF345
 	.byte	0x1
 	.2byte	0x16e
 	.4byte	0x50
-	.uleb128 0x4a
+	.uleb128 0x4c
 	.ascii	"os\000"
 	.byte	0x1
 	.2byte	0x16e
-	.4byte	0xd05
+	.4byte	0xd1d
 	.byte	0
-	.uleb128 0x3e
-	.4byte	.LASF335
+	.uleb128 0x41
+	.4byte	.LASF346
 	.byte	0x1
 	.2byte	0x157
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x1b70
-	.uleb128 0x4a
+	.4byte	0x1c59
+	.uleb128 0x4c
 	.ascii	"fit\000"
 	.byte	0x1
 	.2byte	0x157
 	.4byte	0x3a9
-	.uleb128 0x3f
-	.4byte	.LASF257
+	.uleb128 0x42
+	.4byte	.LASF259
 	.byte	0x1
 	.2byte	0x157
 	.4byte	0x50
-	.uleb128 0x3f
-	.4byte	.LASF318
+	.uleb128 0x42
+	.4byte	.LASF277
 	.byte	0x1
 	.2byte	0x157
 	.4byte	0x50
-	.uleb128 0x3f
-	.4byte	.LASF336
+	.uleb128 0x42
+	.4byte	.LASF347
 	.byte	0x1
 	.2byte	0x158
-	.4byte	0x14e
-	.uleb128 0x3f
-	.4byte	.LASF337
+	.4byte	0x14e
+	.uleb128 0x42
+	.4byte	.LASF348
 	.byte	0x1
 	.2byte	0x158
-	.4byte	0x1041
-	.uleb128 0x41
+	.4byte	0x116a
+	.uleb128 0x44
 	.ascii	"ret\000"
 	.byte	0x1
 	.2byte	0x15a
 	.4byte	0x50
-	.uleb128 0x40
+	.uleb128 0x43
 	.4byte	.LASF74
 	.byte	0x1
 	.2byte	0x15c
 	.4byte	0xfb
-	.uleb128 0x40
-	.4byte	.LASF319
+	.uleb128 0x43
+	.4byte	.LASF330
 	.byte	0x1
 	.2byte	0x15d
 	.4byte	0x50
 	.byte	0
-	.uleb128 0x4b
-	.4byte	.LASF339
+	.uleb128 0x4d
+	.4byte	.LASF350
 	.byte	0x1
 	.2byte	0x134
 	.4byte	0x50
-	.4byte	.LFB207
-	.4byte	.LFE207-.LFB207
+	.4byte	.LFB211
+	.4byte	.LFE211-.LFB211
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1c8d
-	.uleb128 0x29
-	.4byte	.LASF312
+	.4byte	0x1d76
+	.uleb128 0x2b
+	.4byte	.LASF324
 	.byte	0x1
 	.2byte	0x134
-	.4byte	0x1041
+	.4byte	0x116a
 	.4byte	.LLST39
-	.uleb128 0x29
-	.4byte	.LASF313
+	.uleb128 0x2b
+	.4byte	.LASF325
 	.byte	0x1
 	.2byte	0x135
-	.4byte	0x1035
+	.4byte	0x115e
 	.4byte	.LLST40
-	.uleb128 0x29
-	.4byte	.LASF314
+	.uleb128 0x2b
+	.4byte	.LASF326
 	.byte	0x1
 	.2byte	0x135
 	.4byte	0x122
 	.4byte	.LLST41
-	.uleb128 0x2a
+	.uleb128 0x2c
 	.ascii	"fit\000"
 	.byte	0x1
 	.2byte	0x136
 	.4byte	0x14e
 	.4byte	.LLST42
-	.uleb128 0x29
-	.4byte	.LASF257
+	.uleb128 0x2b
+	.4byte	.LASF259
 	.byte	0x1
 	.2byte	0x136
 	.4byte	0x50
 	.4byte	.LLST43
-	.uleb128 0x29
-	.4byte	.LASF317
+	.uleb128 0x2b
+	.4byte	.LASF329
 	.byte	0x1
 	.2byte	0x136
 	.4byte	0x122
 	.4byte	.LLST44
-	.uleb128 0x4c
-	.4byte	.LASF222
+	.uleb128 0x4e
+	.4byte	.LASF224
 	.byte	0x1
 	.2byte	0x138
-	.4byte	0xf3e
+	.4byte	0x1067
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -68
-	.uleb128 0x2b
-	.4byte	.LASF319
+	.uleb128 0x2d
+	.4byte	.LASF330
 	.byte	0x1
 	.2byte	0x139
 	.4byte	0x50
 	.4byte	.LLST45
-	.uleb128 0x2c
+	.uleb128 0x2e
 	.ascii	"ret\000"
 	.byte	0x1
 	.2byte	0x139
 	.4byte	0x50
 	.4byte	.LLST46
-	.uleb128 0x4d
-	.4byte	.LASF320
-	.4byte	0x1c9d
-	.uleb128 0x39
+	.uleb128 0x4f
+	.4byte	.LASF331
+	.4byte	0x1d86
+	.uleb128 0x3c
 	.4byte	.LVL99
-	.4byte	0x21d1
-	.4byte	0x1c4c
-	.uleb128 0x36
+	.4byte	0x22ba
+	.4byte	0x1d35
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 0
 	.byte	0x6
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	.LC0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x1
 	.byte	0x30
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x3c
 	.4byte	.LVL101
-	.4byte	0x1ca2
-	.4byte	0x1c7b
-	.uleb128 0x36
+	.4byte	0x1d8b
+	.4byte	0x1d64
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x77
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 4
 	.byte	0x6
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x2
 	.byte	0x7d
 	.sleb128 4
@@ -5318,10 +5361,10 @@ __func__.8692:
 	.byte	0x91
 	.sleb128 -68
 	.byte	0
-	.uleb128 0x35
+	.uleb128 0x37
 	.4byte	.LVL103
-	.4byte	0x255c
-	.uleb128 0x36
+	.4byte	0x2645
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x3
@@ -5331,76 +5374,76 @@ __func__.8692:
 	.byte	0
 	.uleb128 0xc
 	.4byte	0xe4
-	.4byte	0x1c9d
+	.4byte	0x1d86
 	.uleb128 0xd
 	.4byte	0xcb
 	.byte	0x12
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x1c8d
-	.uleb128 0x4e
-	.4byte	.LASF340
+	.4byte	0x1d76
+	.uleb128 0x50
+	.4byte	.LASF351
 	.byte	0x1
 	.byte	0xa3
 	.4byte	0x50
-	.4byte	.LFB206
-	.4byte	.LFE206-.LFB206
+	.4byte	.LFB210
+	.4byte	.LFE210-.LFB210
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2151
-	.uleb128 0x4f
-	.4byte	.LASF313
+	.4byte	0x223a
+	.uleb128 0x51
+	.4byte	.LASF325
 	.byte	0x1
 	.byte	0xa3
-	.4byte	0x1035
+	.4byte	0x115e
 	.4byte	.LLST15
-	.uleb128 0x4f
-	.4byte	.LASF314
+	.uleb128 0x51
+	.4byte	.LASF326
 	.byte	0x1
 	.byte	0xa3
 	.4byte	0x122
 	.4byte	.LLST16
-	.uleb128 0x50
+	.uleb128 0x52
 	.ascii	"fit\000"
 	.byte	0x1
 	.byte	0xa4
 	.4byte	0x14e
 	.4byte	.LLST17
-	.uleb128 0x4f
-	.4byte	.LASF317
+	.uleb128 0x51
+	.4byte	.LASF329
 	.byte	0x1
 	.byte	0xa4
 	.4byte	0x122
 	.4byte	.LLST18
-	.uleb128 0x4f
-	.4byte	.LASF319
+	.uleb128 0x51
+	.4byte	.LASF330
 	.byte	0x1
 	.byte	0xa4
 	.4byte	0x50
 	.4byte	.LLST19
-	.uleb128 0x4f
-	.4byte	.LASF222
+	.uleb128 0x51
+	.4byte	.LASF224
 	.byte	0x1
 	.byte	0xa5
-	.4byte	0x1041
+	.4byte	0x116a
 	.4byte	.LLST20
-	.uleb128 0x51
-	.4byte	.LASF341
+	.uleb128 0x53
+	.4byte	.LASF352
 	.byte	0x1
 	.byte	0xa7
 	.4byte	0x50
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -60
-	.uleb128 0x51
-	.4byte	.LASF342
+	.uleb128 0x53
+	.4byte	.LASF353
 	.byte	0x1
 	.byte	0xa8
 	.4byte	0x10c
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -56
-	.uleb128 0x52
+	.uleb128 0x54
 	.ascii	"len\000"
 	.byte	0x1
 	.byte	0xa9
@@ -5408,34 +5451,34 @@ __func__.8692:
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -52
-	.uleb128 0x53
+	.uleb128 0x55
 	.4byte	.LASF78
 	.byte	0x1
 	.byte	0xaa
 	.4byte	0x122
-	.uleb128 0x51
-	.4byte	.LASF343
+	.uleb128 0x53
+	.4byte	.LASF354
 	.byte	0x1
 	.byte	0xab
 	.4byte	0x122
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -48
-	.uleb128 0x51
-	.4byte	.LASF261
+	.uleb128 0x53
+	.4byte	.LASF263
 	.byte	0x1
 	.byte	0xab
 	.4byte	0x122
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -44
-	.uleb128 0x54
-	.4byte	.LASF344
+	.uleb128 0x56
+	.4byte	.LASF355
 	.byte	0x1
 	.byte	0xab
 	.4byte	0x122
 	.4byte	.LLST21
-	.uleb128 0x52
+	.uleb128 0x54
 	.ascii	"src\000"
 	.byte	0x1
 	.byte	0xac
@@ -5443,352 +5486,352 @@ __func__.8692:
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -40
-	.uleb128 0x54
-	.4byte	.LASF345
+	.uleb128 0x56
+	.4byte	.LASF356
 	.byte	0x1
 	.byte	0xad
 	.4byte	0x122
 	.4byte	.LLST22
-	.uleb128 0x53
-	.4byte	.LASF346
+	.uleb128 0x55
+	.4byte	.LASF357
 	.byte	0x1
 	.byte	0xae
 	.4byte	0x50
-	.uleb128 0x55
-	.4byte	.LASF329
+	.uleb128 0x57
+	.4byte	.LASF340
 	.byte	0x1
 	.byte	0xaf
 	.4byte	0x50
 	.byte	0x3f
-	.uleb128 0x51
-	.4byte	.LASF347
+	.uleb128 0x53
+	.4byte	.LASF358
 	.byte	0x1
 	.byte	0xb0
 	.4byte	0x12d
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -61
-	.uleb128 0x54
+	.uleb128 0x56
 	.4byte	.LASF62
 	.byte	0x1
 	.byte	0xb0
 	.4byte	0x12d
 	.4byte	.LLST23
-	.uleb128 0x51
-	.4byte	.LASF348
+	.uleb128 0x53
+	.4byte	.LASF359
 	.byte	0x1
 	.byte	0xb1
 	.4byte	0x3a9
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -36
-	.uleb128 0x54
-	.4byte	.LASF349
+	.uleb128 0x56
+	.4byte	.LASF360
 	.byte	0x1
 	.byte	0xb2
 	.4byte	0x189
 	.4byte	.LLST24
-	.uleb128 0x54
-	.4byte	.LASF350
+	.uleb128 0x56
+	.4byte	.LASF361
 	.byte	0x1
 	.byte	0xb3
 	.4byte	0x189
 	.4byte	.LLST25
-	.uleb128 0x54
-	.4byte	.LASF351
+	.uleb128 0x56
+	.4byte	.LASF362
 	.byte	0x1
 	.byte	0xb4
 	.4byte	0x4cd
 	.4byte	.LLST26
-	.uleb128 0x56
+	.uleb128 0x58
 	.ascii	"out\000"
 	.byte	0x1
 	.2byte	0x12a
 	.4byte	.L31
-	.uleb128 0x57
-	.4byte	0x2183
+	.uleb128 0x59
+	.4byte	0x226c
 	.4byte	.LBB35
 	.4byte	.Ldebug_ranges0+0
 	.byte	0x1
 	.byte	0xe3
-	.4byte	0x1e33
-	.uleb128 0x2e
-	.4byte	0x219e
+	.4byte	0x1f1c
+	.uleb128 0x31
+	.4byte	0x2287
 	.4byte	.LLST27
-	.uleb128 0x2e
-	.4byte	0x2193
+	.uleb128 0x31
+	.4byte	0x227c
 	.4byte	.LLST28
 	.byte	0
-	.uleb128 0x58
-	.4byte	0x2151
+	.uleb128 0x5a
+	.4byte	0x223a
 	.4byte	.LBB40
 	.4byte	.LBE40-.LBB40
 	.byte	0x1
 	.byte	0xe4
-	.4byte	0x1e5e
-	.uleb128 0x2f
-	.4byte	0x2177
-	.uleb128 0x2e
-	.4byte	0x216c
+	.4byte	0x1f47
+	.uleb128 0x3a
+	.4byte	0x2260
+	.uleb128 0x31
+	.4byte	0x2255
 	.4byte	.LLST29
-	.uleb128 0x2e
-	.4byte	0x2161
+	.uleb128 0x31
+	.4byte	0x224a
 	.4byte	.LLST30
 	.byte	0
-	.uleb128 0x57
-	.4byte	0x21aa
+	.uleb128 0x59
+	.4byte	0x2293
 	.4byte	.LBB42
 	.4byte	.Ldebug_ranges0+0x20
 	.byte	0x1
 	.byte	0xed
-	.4byte	0x1e84
-	.uleb128 0x2e
-	.4byte	0x21c5
+	.4byte	0x1f6d
+	.uleb128 0x31
+	.4byte	0x22ae
 	.4byte	.LLST31
-	.uleb128 0x2e
-	.4byte	0x21ba
+	.uleb128 0x31
+	.4byte	0x22a3
 	.4byte	.LLST32
 	.byte	0
-	.uleb128 0x2d
-	.4byte	0x2327
+	.uleb128 0x30
+	.4byte	0x2410
 	.4byte	.LBB47
 	.4byte	.Ldebug_ranges0+0x38
 	.byte	0x1
 	.2byte	0x106
-	.4byte	0x1ecf
-	.uleb128 0x2e
-	.4byte	0x2350
+	.4byte	0x1fb8
+	.uleb128 0x31
+	.4byte	0x2439
 	.4byte	.LLST33
-	.uleb128 0x2e
-	.4byte	0x2344
+	.uleb128 0x31
+	.4byte	0x242d
 	.4byte	.LLST34
-	.uleb128 0x2e
-	.4byte	0x2338
+	.uleb128 0x31
+	.4byte	0x2421
 	.4byte	.LLST35
-	.uleb128 0x35
+	.uleb128 0x37
 	.4byte	.LVL77
-	.4byte	0x2567
-	.uleb128 0x36
+	.4byte	0x2650
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x1
 	.byte	0x30
 	.byte	0
 	.byte	0
-	.uleb128 0x34
-	.4byte	0x2327
+	.uleb128 0x36
+	.4byte	0x2410
 	.4byte	.LBB53
 	.4byte	.LBE53-.LBB53
 	.byte	0x1
 	.2byte	0x10b
-	.4byte	0x1f08
-	.uleb128 0x2e
-	.4byte	0x2350
+	.4byte	0x1ff1
+	.uleb128 0x31
+	.4byte	0x2439
 	.4byte	.LLST36
-	.uleb128 0x2e
-	.4byte	0x2344
+	.uleb128 0x31
+	.4byte	0x242d
 	.4byte	.LLST37
-	.uleb128 0x2e
-	.4byte	0x2338
+	.uleb128 0x31
+	.4byte	0x2421
 	.4byte	.LLST38
-	.uleb128 0x3a
+	.uleb128 0x3d
 	.4byte	.LVL86
-	.4byte	0x2567
+	.4byte	0x2650
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x3c
 	.4byte	.LVL45
-	.4byte	0x2573
-	.4byte	0x1f28
-	.uleb128 0x36
+	.4byte	0x265c
+	.4byte	0x2011
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -61
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x3c
 	.4byte	.LVL46
-	.4byte	0x257f
-	.4byte	0x1f48
-	.uleb128 0x36
+	.4byte	0x2668
+	.4byte	0x2031
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -44
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x3c
 	.4byte	.LVL47
-	.4byte	0x258b
-	.4byte	0x1f68
-	.uleb128 0x36
+	.4byte	0x2674
+	.4byte	0x2051
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -48
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x3c
 	.4byte	.LVL48
-	.4byte	0x2597
-	.4byte	0x1f88
-	.uleb128 0x36
+	.4byte	0x2680
+	.4byte	0x2071
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -60
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x3c
 	.4byte	.LVL49
-	.4byte	0x25a3
-	.4byte	0x1fa8
-	.uleb128 0x36
+	.4byte	0x268c
+	.4byte	0x2091
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -60
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x3c
 	.4byte	.LVL52
-	.4byte	0x25af
-	.4byte	0x1fc8
-	.uleb128 0x36
+	.4byte	0x2698
+	.4byte	0x20b1
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -52
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x3c
 	.4byte	.LVL54
-	.4byte	0x25bb
-	.4byte	0x1fdc
-	.uleb128 0x36
+	.4byte	0x26a4
+	.4byte	0x20c5
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x40
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x3c
 	.4byte	.LVL61
-	.4byte	0x25c7
-	.4byte	0x1ff6
-	.uleb128 0x36
+	.4byte	0x26b0
+	.4byte	0x20df
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
 	.byte	0
-	.uleb128 0x59
+	.uleb128 0x5b
 	.4byte	.LVL64
-	.4byte	0x2014
-	.uleb128 0x36
+	.4byte	0x20fd
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x7a
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x78
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x4
@@ -5796,137 +5839,137 @@ __func__.8692:
 	.sleb128 -80
 	.byte	0x6
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x3c
 	.4byte	.LVL65
-	.4byte	0x2530
-	.4byte	0x202b
-	.uleb128 0x36
+	.4byte	0x2619
+	.4byte	0x2114
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	.LC7
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x3c
 	.4byte	.LVL66
-	.4byte	0x25d3
-	.4byte	0x204e
-	.uleb128 0x36
+	.4byte	0x26bc
+	.4byte	0x2137
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	.LC13
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x3c
 	.4byte	.LVL79
-	.4byte	0x2501
-	.4byte	0x2076
-	.uleb128 0x36
+	.4byte	0x25ea
+	.4byte	0x215f
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	.LC9
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x1
 	.byte	0x30
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x3c
 	.4byte	.LVL80
-	.4byte	0x2530
-	.4byte	0x2099
-	.uleb128 0x36
+	.4byte	0x2619
+	.4byte	0x2182
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	.LC10
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x77
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x78
 	.sleb128 0
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x3c
 	.4byte	.LVL81
-	.4byte	0x25df
-	.4byte	0x20b3
-	.uleb128 0x36
+	.4byte	0x26c8
+	.4byte	0x219c
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x3c
 	.4byte	.LVL82
-	.4byte	0x25eb
-	.4byte	0x20e0
-	.uleb128 0x36
+	.4byte	0x26d4
+	.4byte	0x21c9
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -44
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -40
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x2
 	.byte	0x7d
 	.sleb128 0
@@ -5934,64 +5977,64 @@ __func__.8692:
 	.byte	0x91
 	.sleb128 -56
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x3c
 	.4byte	.LVL83
-	.4byte	0x25f7
-	.4byte	0x20f7
-	.uleb128 0x36
+	.4byte	0x26e0
+	.4byte	0x21e0
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	.LC12
 	.byte	0
-	.uleb128 0x3a
+	.uleb128 0x3d
 	.4byte	.LVL84
-	.4byte	0x2602
-	.uleb128 0x39
+	.4byte	0x26eb
+	.uleb128 0x3c
 	.4byte	.LVL87
-	.4byte	0x2530
-	.4byte	0x2117
-	.uleb128 0x36
+	.4byte	0x2619
+	.4byte	0x2200
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	.LC11
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x3c
 	.4byte	.LVL91
-	.4byte	0x260e
-	.4byte	0x213d
-	.uleb128 0x36
+	.4byte	0x26f7
+	.4byte	0x2226
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -36
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -56
 	.byte	0
-	.uleb128 0x35
+	.uleb128 0x37
 	.4byte	.LVL92
-	.4byte	0x25f7
-	.uleb128 0x36
+	.4byte	0x26e0
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
@@ -5999,100 +6042,100 @@ __func__.8692:
 	.4byte	.LC8
 	.byte	0
 	.byte	0
-	.uleb128 0x5a
-	.4byte	.LASF352
+	.uleb128 0x5c
+	.4byte	.LASF363
 	.byte	0x1
 	.byte	0x87
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x2183
-	.uleb128 0x5b
-	.4byte	.LASF313
+	.4byte	0x226c
+	.uleb128 0x5d
+	.4byte	.LASF325
 	.byte	0x1
 	.byte	0x87
-	.4byte	0x1035
-	.uleb128 0x5b
-	.4byte	.LASF353
+	.4byte	0x115e
+	.uleb128 0x5d
+	.4byte	.LASF364
 	.byte	0x1
 	.byte	0x87
 	.4byte	0x50
-	.uleb128 0x5b
-	.4byte	.LASF341
+	.uleb128 0x5d
+	.4byte	.LASF352
 	.byte	0x1
 	.byte	0x88
 	.4byte	0x50
 	.byte	0
-	.uleb128 0x5a
-	.4byte	.LASF354
+	.uleb128 0x5c
+	.4byte	.LASF365
 	.byte	0x1
 	.byte	0x79
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x21aa
-	.uleb128 0x5b
-	.4byte	.LASF313
+	.4byte	0x2293
+	.uleb128 0x5d
+	.4byte	.LASF325
 	.byte	0x1
 	.byte	0x79
-	.4byte	0x1035
-	.uleb128 0x5b
-	.4byte	.LASF341
+	.4byte	0x115e
+	.uleb128 0x5d
+	.4byte	.LASF352
 	.byte	0x1
 	.byte	0x79
 	.4byte	0x50
 	.byte	0
-	.uleb128 0x5a
-	.4byte	.LASF355
+	.uleb128 0x5c
+	.4byte	.LASF366
 	.byte	0x1
 	.byte	0x6c
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x21d1
-	.uleb128 0x5b
-	.4byte	.LASF313
+	.4byte	0x22ba
+	.uleb128 0x5d
+	.4byte	.LASF325
 	.byte	0x1
 	.byte	0x6c
-	.4byte	0x1035
-	.uleb128 0x5b
-	.4byte	.LASF341
+	.4byte	0x115e
+	.uleb128 0x5d
+	.4byte	.LASF352
 	.byte	0x1
 	.byte	0x6c
 	.4byte	0x50
 	.byte	0
-	.uleb128 0x5c
-	.4byte	.LASF356
+	.uleb128 0x5e
+	.4byte	.LASF367
 	.byte	0x1
 	.byte	0x56
 	.4byte	0x50
-	.4byte	.LFB202
-	.4byte	.LFE202-.LFB202
+	.4byte	.LFB206
+	.4byte	.LFE206-.LFB206
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2299
-	.uleb128 0x50
+	.4byte	0x2382
+	.uleb128 0x52
 	.ascii	"fit\000"
 	.byte	0x1
 	.byte	0x56
 	.4byte	0x3a9
 	.4byte	.LLST9
-	.uleb128 0x4f
-	.4byte	.LASF257
+	.uleb128 0x51
+	.4byte	.LASF259
 	.byte	0x1
 	.byte	0x56
 	.4byte	0x50
 	.4byte	.LLST10
-	.uleb128 0x4f
+	.uleb128 0x51
 	.4byte	.LASF62
 	.byte	0x1
 	.byte	0x57
 	.4byte	0xd7
 	.4byte	.LLST11
-	.uleb128 0x4f
-	.4byte	.LASF318
+	.uleb128 0x51
+	.4byte	.LASF277
 	.byte	0x1
 	.byte	0x57
 	.4byte	0x50
 	.4byte	.LLST12
-	.uleb128 0x52
+	.uleb128 0x54
 	.ascii	"str\000"
 	.byte	0x1
 	.byte	0x59
@@ -6100,64 +6143,64 @@ __func__.8692:
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -20
-	.uleb128 0x5d
+	.uleb128 0x5f
 	.ascii	"err\000"
 	.byte	0x1
 	.byte	0x5a
 	.4byte	0x50
 	.4byte	.LLST13
-	.uleb128 0x54
-	.4byte	.LASF319
+	.uleb128 0x56
+	.4byte	.LASF330
 	.byte	0x1
 	.byte	0x5b
 	.4byte	0x50
 	.4byte	.LLST14
-	.uleb128 0x39
+	.uleb128 0x3c
 	.4byte	.LVL34
-	.4byte	0x239b
-	.4byte	0x2282
-	.uleb128 0x36
+	.4byte	0x2484
+	.4byte	0x236b
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x3
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x52
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x53
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -20
-	.uleb128 0x5e
-	.4byte	0x22b4
+	.uleb128 0x60
+	.4byte	0x239d
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
 	.byte	0
-	.uleb128 0x35
+	.uleb128 0x37
 	.4byte	.LVL36
-	.4byte	0x261a
-	.uleb128 0x36
+	.4byte	0x2703
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
@@ -6165,64 +6208,64 @@ __func__.8692:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x5a
-	.4byte	.LASF357
+	.uleb128 0x5c
+	.4byte	.LASF368
 	.byte	0x1
 	.byte	0x20
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x2321
-	.uleb128 0x5f
+	.4byte	0x240a
+	.uleb128 0x61
 	.ascii	"fit\000"
 	.byte	0x1
 	.byte	0x20
 	.4byte	0x3a9
-	.uleb128 0x5b
-	.4byte	.LASF257
+	.uleb128 0x5d
+	.4byte	.LASF259
 	.byte	0x1
 	.byte	0x20
 	.4byte	0x50
-	.uleb128 0x5b
+	.uleb128 0x5d
 	.4byte	.LASF62
 	.byte	0x1
 	.byte	0x21
 	.4byte	0xd7
-	.uleb128 0x5b
-	.4byte	.LASF318
+	.uleb128 0x5d
+	.4byte	.LASF277
 	.byte	0x1
 	.byte	0x21
 	.4byte	0x50
-	.uleb128 0x5b
-	.4byte	.LASF358
+	.uleb128 0x5d
+	.4byte	.LASF369
 	.byte	0x1
 	.byte	0x22
-	.4byte	0x2321
-	.uleb128 0x53
+	.4byte	0x240a
+	.uleb128 0x55
 	.4byte	.LASF74
 	.byte	0x1
 	.byte	0x24
 	.4byte	0xd7
-	.uleb128 0x60
+	.uleb128 0x62
 	.ascii	"str\000"
 	.byte	0x1
 	.byte	0x24
 	.4byte	0xd7
-	.uleb128 0x53
-	.4byte	.LASF319
+	.uleb128 0x55
+	.4byte	.LASF330
 	.byte	0x1
 	.byte	0x25
 	.4byte	0x50
-	.uleb128 0x53
-	.4byte	.LASF359
+	.uleb128 0x55
+	.4byte	.LASF370
 	.byte	0x1
 	.byte	0x26
 	.4byte	0x50
-	.uleb128 0x60
+	.uleb128 0x62
 	.ascii	"len\000"
 	.byte	0x1
 	.byte	0x27
 	.4byte	0x50
-	.uleb128 0x60
+	.uleb128 0x62
 	.ascii	"i\000"
 	.byte	0x1
 	.byte	0x27
@@ -6231,232 +6274,232 @@ __func__.8692:
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0xfb
-	.uleb128 0x3e
-	.4byte	.LASF360
+	.uleb128 0x41
+	.4byte	.LASF371
 	.byte	0x2
-	.2byte	0x3e8
+	.2byte	0x3ea
 	.4byte	0xd7
 	.byte	0x3
-	.4byte	0x235d
-	.uleb128 0x3f
-	.4byte	.LASF361
+	.4byte	0x2446
+	.uleb128 0x42
+	.4byte	.LASF372
 	.byte	0x2
-	.2byte	0x3e8
+	.2byte	0x3ea
 	.4byte	0x3a9
-	.uleb128 0x3f
-	.4byte	.LASF334
+	.uleb128 0x42
+	.4byte	.LASF345
 	.byte	0x2
-	.2byte	0x3e9
+	.2byte	0x3eb
 	.4byte	0x50
-	.uleb128 0x4a
+	.uleb128 0x4c
 	.ascii	"len\000"
 	.byte	0x2
-	.2byte	0x3e9
-	.4byte	0x1a98
+	.2byte	0x3eb
+	.4byte	0x1b81
 	.byte	0
-	.uleb128 0x3e
-	.4byte	.LASF362
+	.uleb128 0x41
+	.4byte	.LASF373
 	.byte	0x2
-	.2byte	0x2df
+	.2byte	0x2e0
 	.4byte	0x138
 	.byte	0x3
-	.4byte	0x237b
-	.uleb128 0x4a
+	.4byte	0x2464
+	.uleb128 0x4c
 	.ascii	"hdr\000"
 	.byte	0x2
-	.2byte	0x2df
-	.4byte	0x237b
+	.2byte	0x2e0
+	.4byte	0x2464
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0xabb
-	.uleb128 0x5a
-	.4byte	.LASF363
+	.4byte	0xad3
+	.uleb128 0x5c
+	.4byte	.LASF374
 	.byte	0x18
 	.byte	0x70
 	.4byte	0x70
 	.byte	0x3
-	.4byte	0x239b
-	.uleb128 0x5f
+	.4byte	0x2484
+	.uleb128 0x61
 	.ascii	"x\000"
 	.byte	0x18
 	.byte	0x70
 	.4byte	0x70
 	.byte	0
-	.uleb128 0x61
-	.4byte	0x2299
-	.4byte	.LFB216
-	.4byte	.LFE216-.LFB216
+	.uleb128 0x63
+	.4byte	0x2382
+	.4byte	.LFB220
+	.4byte	.LFE220-.LFB220
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x24e2
-	.uleb128 0x2e
-	.4byte	0x22a9
+	.4byte	0x25cb
+	.uleb128 0x31
+	.4byte	0x2392
 	.4byte	.LLST0
-	.uleb128 0x2e
-	.4byte	0x22bf
+	.uleb128 0x31
+	.4byte	0x23a8
 	.4byte	.LLST1
-	.uleb128 0x2e
-	.4byte	0x22ca
+	.uleb128 0x31
+	.4byte	0x23b3
 	.4byte	.LLST2
-	.uleb128 0x2e
-	.4byte	0x22d5
+	.uleb128 0x31
+	.4byte	0x23be
 	.4byte	.LLST3
-	.uleb128 0x62
-	.4byte	0x22b4
+	.uleb128 0x64
+	.4byte	0x239d
 	.uleb128 0x6
 	.byte	0xfa
-	.4byte	0x22b4
+	.4byte	0x239d
 	.byte	0x9f
-	.uleb128 0x32
-	.4byte	0x22e0
+	.uleb128 0x34
+	.4byte	0x23c9
 	.4byte	.LLST4
-	.uleb128 0x32
-	.4byte	0x22eb
+	.uleb128 0x34
+	.4byte	0x23d4
 	.4byte	.LLST5
-	.uleb128 0x32
-	.4byte	0x22f6
+	.uleb128 0x34
+	.4byte	0x23df
 	.4byte	.LLST6
-	.uleb128 0x32
-	.4byte	0x2301
+	.uleb128 0x34
+	.4byte	0x23ea
 	.4byte	.LLST7
-	.uleb128 0x31
-	.4byte	0x230c
+	.uleb128 0x33
+	.4byte	0x23f5
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -28
-	.uleb128 0x32
-	.4byte	0x2317
+	.uleb128 0x34
+	.4byte	0x2400
 	.4byte	.LLST8
-	.uleb128 0x39
+	.uleb128 0x3c
 	.4byte	.LVL1
-	.4byte	0x2626
-	.4byte	0x2427
-	.uleb128 0x36
+	.4byte	0x270f
+	.4byte	0x2510
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x3c
 	.4byte	.LVL5
-	.4byte	0x2530
-	.4byte	0x243e
-	.uleb128 0x36
+	.4byte	0x2619
+	.4byte	0x2527
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	.LC4
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x3c
 	.4byte	.LVL6
-	.4byte	0x2632
-	.4byte	0x2458
-	.uleb128 0x36
+	.4byte	0x271b
+	.4byte	0x2541
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x3c
 	.4byte	.LVL11
-	.4byte	0x2501
-	.4byte	0x247e
-	.uleb128 0x36
+	.4byte	0x25ea
+	.4byte	0x2567
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x76
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x77
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -28
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x3c
 	.4byte	.LVL13
-	.4byte	0x2530
-	.4byte	0x2492
-	.uleb128 0x36
+	.4byte	0x2619
+	.4byte	0x257b
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x78
 	.sleb128 0
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x3c
 	.4byte	.LVL14
-	.4byte	0x263d
-	.4byte	0x24ac
-	.uleb128 0x36
+	.4byte	0x2726
+	.4byte	0x2595
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x76
 	.sleb128 0
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x3c
 	.4byte	.LVL18
-	.4byte	0x2501
-	.4byte	0x24d2
-	.uleb128 0x36
+	.4byte	0x25ea
+	.4byte	0x25bb
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x78
 	.sleb128 0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -28
 	.byte	0
-	.uleb128 0x35
+	.uleb128 0x37
 	.4byte	.LVL23
-	.4byte	0x2648
-	.uleb128 0x36
+	.4byte	0x2731
+	.uleb128 0x38
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x1
@@ -6465,159 +6508,159 @@ __func__.8692:
 	.byte	0
 	.uleb128 0xc
 	.4byte	0xdd
-	.4byte	0x24f5
-	.uleb128 0x63
+	.4byte	0x25de
+	.uleb128 0x65
 	.4byte	0xcb
-	.4byte	0x1758
+	.4byte	0x187d
 	.byte	0
-	.uleb128 0x64
-	.4byte	.LASF364
-	.4byte	.LASF364
+	.uleb128 0x66
+	.4byte	.LASF375
+	.4byte	.LASF375
 	.byte	0x2
-	.2byte	0x3f3
-	.uleb128 0x64
-	.4byte	.LASF365
-	.4byte	.LASF365
+	.2byte	0x3f5
+	.uleb128 0x66
+	.4byte	.LASF376
+	.4byte	.LASF376
 	.byte	0x19
 	.2byte	0x2b2
-	.uleb128 0x65
-	.4byte	.LASF366
-	.4byte	.LASF366
+	.uleb128 0x67
+	.4byte	.LASF377
+	.4byte	.LASF377
 	.byte	0x1a
 	.byte	0x98
-	.uleb128 0x64
-	.4byte	.LASF367
-	.4byte	.LASF367
+	.uleb128 0x66
+	.4byte	.LASF378
+	.4byte	.LASF378
 	.byte	0x19
 	.2byte	0x1a8
-	.uleb128 0x64
-	.4byte	.LASF368
-	.4byte	.LASF368
+	.uleb128 0x66
+	.4byte	.LASF379
+	.4byte	.LASF379
 	.byte	0x2
-	.2byte	0x42c
-	.uleb128 0x65
-	.4byte	.LASF369
-	.4byte	.LASF369
+	.2byte	0x42e
+	.uleb128 0x67
+	.4byte	.LASF380
+	.4byte	.LASF380
 	.byte	0x1b
 	.byte	0x13
-	.uleb128 0x65
-	.4byte	.LASF370
-	.4byte	.LASF370
+	.uleb128 0x67
+	.4byte	.LASF381
+	.4byte	.LASF381
 	.byte	0x3
 	.byte	0x61
-	.uleb128 0x65
-	.4byte	.LASF371
-	.4byte	.LASF371
+	.uleb128 0x67
+	.4byte	.LASF382
+	.4byte	.LASF382
 	.byte	0xc
 	.byte	0xbd
-	.uleb128 0x65
-	.4byte	.LASF372
-	.4byte	.LASF372
+	.uleb128 0x67
+	.4byte	.LASF383
+	.4byte	.LASF383
 	.byte	0x8
 	.byte	0x27
-	.uleb128 0x65
-	.4byte	.LASF373
-	.4byte	.LASF373
+	.uleb128 0x67
+	.4byte	.LASF384
+	.4byte	.LASF384
 	.byte	0x1a
 	.byte	0xce
-	.uleb128 0x64
-	.4byte	.LASF374
-	.4byte	.LASF374
+	.uleb128 0x66
+	.4byte	.LASF385
+	.4byte	.LASF385
 	.byte	0x19
 	.2byte	0x1c1
-	.uleb128 0x64
-	.4byte	.LASF375
-	.4byte	.LASF375
-	.byte	0x2
-	.2byte	0x3f6
-	.uleb128 0x64
-	.4byte	.LASF376
-	.4byte	.LASF376
+	.uleb128 0x66
+	.4byte	.LASF386
+	.4byte	.LASF386
 	.byte	0x2
 	.2byte	0x3f8
-	.uleb128 0x64
-	.4byte	.LASF377
-	.4byte	.LASF377
+	.uleb128 0x66
+	.4byte	.LASF387
+	.4byte	.LASF387
 	.byte	0x2
 	.2byte	0x3fa
-	.uleb128 0x64
-	.4byte	.LASF378
-	.4byte	.LASF378
-	.byte	0x2
-	.2byte	0x400
-	.uleb128 0x64
-	.4byte	.LASF379
-	.4byte	.LASF379
+	.uleb128 0x66
+	.4byte	.LASF388
+	.4byte	.LASF388
 	.byte	0x2
-	.2byte	0x3ff
-	.uleb128 0x64
-	.4byte	.LASF380
-	.4byte	.LASF380
+	.2byte	0x3fc
+	.uleb128 0x66
+	.4byte	.LASF389
+	.4byte	.LASF389
 	.byte	0x2
 	.2byte	0x402
-	.uleb128 0x64
-	.4byte	.LASF381
-	.4byte	.LASF381
+	.uleb128 0x66
+	.4byte	.LASF390
+	.4byte	.LASF390
+	.byte	0x2
+	.2byte	0x401
+	.uleb128 0x66
+	.4byte	.LASF391
+	.4byte	.LASF391
+	.byte	0x2
+	.2byte	0x404
+	.uleb128 0x66
+	.4byte	.LASF392
+	.4byte	.LASF392
 	.byte	0x17
 	.2byte	0x371
-	.uleb128 0x64
-	.4byte	.LASF382
-	.4byte	.LASF382
+	.uleb128 0x66
+	.4byte	.LASF393
+	.4byte	.LASF393
 	.byte	0x2
-	.2byte	0x3f7
-	.uleb128 0x64
-	.4byte	.LASF383
-	.4byte	.LASF383
+	.2byte	0x3f9
+	.uleb128 0x66
+	.4byte	.LASF394
+	.4byte	.LASF394
 	.byte	0x2
-	.2byte	0x598
-	.uleb128 0x64
-	.4byte	.LASF384
-	.4byte	.LASF384
+	.2byte	0x59d
+	.uleb128 0x66
+	.4byte	.LASF395
+	.4byte	.LASF395
 	.byte	0x2
-	.2byte	0x427
-	.uleb128 0x64
-	.4byte	.LASF385
-	.4byte	.LASF385
+	.2byte	0x429
+	.uleb128 0x66
+	.4byte	.LASF396
+	.4byte	.LASF396
 	.byte	0x2
-	.2byte	0x591
-	.uleb128 0x65
-	.4byte	.LASF386
-	.4byte	.LASF386
+	.2byte	0x596
+	.uleb128 0x67
+	.4byte	.LASF397
+	.4byte	.LASF397
 	.byte	0x1b
 	.byte	0x11
-	.uleb128 0x64
-	.4byte	.LASF387
-	.4byte	.LASF387
+	.uleb128 0x66
+	.4byte	.LASF398
+	.4byte	.LASF398
 	.byte	0x17
 	.2byte	0x16d
-	.uleb128 0x64
-	.4byte	.LASF388
-	.4byte	.LASF388
+	.uleb128 0x66
+	.4byte	.LASF399
+	.4byte	.LASF399
 	.byte	0x2
-	.2byte	0x3fd
-	.uleb128 0x64
-	.4byte	.LASF389
-	.4byte	.LASF389
+	.2byte	0x3ff
+	.uleb128 0x66
+	.4byte	.LASF400
+	.4byte	.LASF400
 	.byte	0x19
 	.2byte	0x182
-	.uleb128 0x64
-	.4byte	.LASF390
-	.4byte	.LASF390
+	.uleb128 0x66
+	.4byte	.LASF401
+	.4byte	.LASF401
 	.byte	0x2
-	.2byte	0x5a6
-	.uleb128 0x65
-	.4byte	.LASF391
-	.4byte	.LASF391
+	.2byte	0x5ab
+	.uleb128 0x67
+	.4byte	.LASF402
+	.4byte	.LASF402
 	.byte	0x19
 	.byte	0xa9
-	.uleb128 0x65
-	.4byte	.LASF392
-	.4byte	.LASF392
+	.uleb128 0x67
+	.4byte	.LASF403
+	.4byte	.LASF403
 	.byte	0x19
 	.byte	0xb6
-	.uleb128 0x65
-	.4byte	.LASF393
-	.4byte	.LASF393
+	.uleb128 0x67
+	.4byte	.LASF404
+	.4byte	.LASF404
 	.byte	0x8
 	.byte	0x33
 	.byte	0
@@ -6950,6 +6993,21 @@ __func__.8692:
 	.byte	0
 	.byte	0
 	.uleb128 0x1d
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x1e
 	.uleb128 0x21
 	.byte	0
 	.uleb128 0x49
@@ -6958,7 +7016,7 @@ __func__.8692:
 	.uleb128 0x5
 	.byte	0
 	.byte	0
-	.uleb128 0x1e
+	.uleb128 0x1f
 	.uleb128 0x13
 	.byte	0x1
 	.uleb128 0x3
@@ -6973,7 +7031,7 @@ __func__.8692:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x1f
+	.uleb128 0x20
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -6990,7 +7048,7 @@ __func__.8692:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x20
+	.uleb128 0x21
 	.uleb128 0x4
 	.byte	0x1
 	.uleb128 0xb
@@ -7005,7 +7063,7 @@ __func__.8692:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x21
+	.uleb128 0x22
 	.uleb128 0x4
 	.byte	0x1
 	.uleb128 0xb
@@ -7020,7 +7078,7 @@ __func__.8692:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x22
+	.uleb128 0x23
 	.uleb128 0x13
 	.byte	0x1
 	.uleb128 0x3
@@ -7035,7 +7093,7 @@ __func__.8692:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x23
+	.uleb128 0x24
 	.uleb128 0xd
 	.byte	0
 	.uleb128 0x3
@@ -7050,7 +7108,7 @@ __func__.8692:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x24
+	.uleb128 0x25
 	.uleb128 0x16
 	.byte	0
 	.uleb128 0x3
@@ -7063,7 +7121,7 @@ __func__.8692:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x25
+	.uleb128 0x26
 	.uleb128 0xd
 	.byte	0
 	.uleb128 0x3
@@ -7078,7 +7136,7 @@ __func__.8692:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x26
+	.uleb128 0x27
 	.uleb128 0x13
 	.byte	0x1
 	.uleb128 0x3
@@ -7093,7 +7151,16 @@ __func__.8692:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
+	.uleb128 0x28
+	.uleb128 0x15
+	.byte	0x1
 	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x29
 	.uleb128 0x4
 	.byte	0x1
 	.uleb128 0x3
@@ -7110,7 +7177,7 @@ __func__.8692:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x28
+	.uleb128 0x2a
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -7131,13 +7198,13 @@ __func__.8692:
 	.uleb128 0x6
 	.uleb128 0x40
 	.uleb128 0x18
-	.uleb128 0x2116
+	.uleb128 0x2117
 	.uleb128 0x19
 	.uleb128 0x1
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x29
+	.uleb128 0x2b
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -7152,7 +7219,7 @@ __func__.8692:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x2a
+	.uleb128 0x2c
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -7167,7 +7234,7 @@ __func__.8692:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x2b
+	.uleb128 0x2d
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7182,7 +7249,7 @@ __func__.8692:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x2c
+	.uleb128 0x2e
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7197,7 +7264,22 @@ __func__.8692:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x2d
+	.uleb128 0x2f
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x1c
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x30
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -7214,7 +7296,7 @@ __func__.8692:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x2e
+	.uleb128 0x31
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
@@ -7223,21 +7305,14 @@ __func__.8692:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x2f
-	.uleb128 0x5
-	.byte	0
-	.uleb128 0x31
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x30
+	.uleb128 0x32
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x55
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x31
+	.uleb128 0x33
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -7246,7 +7321,7 @@ __func__.8692:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x32
+	.uleb128 0x34
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -7255,14 +7330,14 @@ __func__.8692:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x33
+	.uleb128 0x35
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x34
+	.uleb128 0x36
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -7279,7 +7354,7 @@ __func__.8692:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x35
+	.uleb128 0x37
 	.uleb128 0x4109
 	.byte	0x1
 	.uleb128 0x11
@@ -7288,7 +7363,7 @@ __func__.8692:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x36
+	.uleb128 0x38
 	.uleb128 0x410a
 	.byte	0
 	.uleb128 0x2
@@ -7297,7 +7372,7 @@ __func__.8692:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x37
+	.uleb128 0x39
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x11
@@ -7308,7 +7383,14 @@ __func__.8692:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x38
+	.uleb128 0x3a
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x3b
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x11
@@ -7317,7 +7399,7 @@ __func__.8692:
 	.uleb128 0x6
 	.byte	0
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x3c
 	.uleb128 0x4109
 	.byte	0x1
 	.uleb128 0x11
@@ -7328,7 +7410,7 @@ __func__.8692:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3a
+	.uleb128 0x3d
 	.uleb128 0x4109
 	.byte	0
 	.uleb128 0x11
@@ -7337,7 +7419,7 @@ __func__.8692:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3b
+	.uleb128 0x3e
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -7348,7 +7430,7 @@ __func__.8692:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x3f
 	.uleb128 0x4109
 	.byte	0x1
 	.uleb128 0x11
@@ -7359,7 +7441,7 @@ __func__.8692:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3d
+	.uleb128 0x40
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x34
@@ -7370,7 +7452,7 @@ __func__.8692:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x3e
+	.uleb128 0x41
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -7389,7 +7471,7 @@ __func__.8692:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3f
+	.uleb128 0x42
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -7402,7 +7484,7 @@ __func__.8692:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x40
+	.uleb128 0x43
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7415,7 +7497,7 @@ __func__.8692:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x41
+	.uleb128 0x44
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7428,7 +7510,7 @@ __func__.8692:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x42
+	.uleb128 0x45
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7441,46 +7523,19 @@ __func__.8692:
 	.uleb128 0xe
 	.byte	0
 	.byte	0
-	.uleb128 0x43
+	.uleb128 0x46
 	.uleb128 0xb
 	.byte	0x1
 	.byte	0
 	.byte	0
-	.uleb128 0x44
+	.uleb128 0x47
 	.uleb128 0x21
 	.byte	0
 	.uleb128 0x49
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x45
-	.uleb128 0x2e
-	.byte	0x1
-	.uleb128 0x3f
-	.uleb128 0x19
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0x5
-	.uleb128 0x27
-	.uleb128 0x19
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x12
-	.uleb128 0x6
-	.uleb128 0x40
-	.uleb128 0x18
-	.uleb128 0x2117
-	.uleb128 0x19
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x46
+	.uleb128 0x48
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -7495,7 +7550,7 @@ __func__.8692:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x47
+	.uleb128 0x49
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -7520,7 +7575,7 @@ __func__.8692:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x48
+	.uleb128 0x4a
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7535,7 +7590,7 @@ __func__.8692:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x49
+	.uleb128 0x4b
 	.uleb128 0x4109
 	.byte	0x1
 	.uleb128 0x11
@@ -7544,7 +7599,7 @@ __func__.8692:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x4a
+	.uleb128 0x4c
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -7557,7 +7612,7 @@ __func__.8692:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4b
+	.uleb128 0x4d
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -7582,7 +7637,7 @@ __func__.8692:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4c
+	.uleb128 0x4e
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7597,7 +7652,7 @@ __func__.8692:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x4d
+	.uleb128 0x4f
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7608,7 +7663,7 @@ __func__.8692:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x4e
+	.uleb128 0x50
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -7633,7 +7688,7 @@ __func__.8692:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4f
+	.uleb128 0x51
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -7648,7 +7703,7 @@ __func__.8692:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x50
+	.uleb128 0x52
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -7663,7 +7718,7 @@ __func__.8692:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x51
+	.uleb128 0x53
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7678,7 +7733,7 @@ __func__.8692:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x52
+	.uleb128 0x54
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7693,7 +7748,7 @@ __func__.8692:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x53
+	.uleb128 0x55
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7706,7 +7761,7 @@ __func__.8692:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x54
+	.uleb128 0x56
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7721,7 +7776,7 @@ __func__.8692:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x55
+	.uleb128 0x57
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7736,7 +7791,7 @@ __func__.8692:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x56
+	.uleb128 0x58
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x3
@@ -7749,7 +7804,7 @@ __func__.8692:
 	.uleb128 0x1
 	.byte	0
 	.byte	0
-	.uleb128 0x57
+	.uleb128 0x59
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -7766,7 +7821,7 @@ __func__.8692:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x58
+	.uleb128 0x5a
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -7783,7 +7838,7 @@ __func__.8692:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x59
+	.uleb128 0x5b
 	.uleb128 0x4109
 	.byte	0x1
 	.uleb128 0x11
@@ -7792,7 +7847,7 @@ __func__.8692:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x5a
+	.uleb128 0x5c
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -7811,7 +7866,7 @@ __func__.8692:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x5b
+	.uleb128 0x5d
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -7824,7 +7879,7 @@ __func__.8692:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x5c
+	.uleb128 0x5e
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -7849,7 +7904,7 @@ __func__.8692:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x5d
+	.uleb128 0x5f
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7864,7 +7919,7 @@ __func__.8692:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x5e
+	.uleb128 0x60
 	.uleb128 0x410a
 	.byte	0
 	.uleb128 0x31
@@ -7873,7 +7928,7 @@ __func__.8692:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x5f
+	.uleb128 0x61
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -7886,7 +7941,7 @@ __func__.8692:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x60
+	.uleb128 0x62
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7899,7 +7954,7 @@ __func__.8692:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x61
+	.uleb128 0x63
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x31
@@ -7916,7 +7971,7 @@ __func__.8692:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x62
+	.uleb128 0x64
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
@@ -7925,7 +7980,7 @@ __func__.8692:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x63
+	.uleb128 0x65
 	.uleb128 0x21
 	.byte	0
 	.uleb128 0x49
@@ -7934,7 +7989,7 @@ __func__.8692:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x64
+	.uleb128 0x66
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -7951,7 +8006,7 @@ __func__.8692:
 	.uleb128 0x5
 	.byte	0
 	.byte	0
-	.uleb128 0x65
+	.uleb128 0x67
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -7973,22 +8028,30 @@ __func__.8692:
 .Ldebug_loc0:
 .LLST59:
 	.4byte	.LVL122
-	.4byte	.LVL125
+	.4byte	.LVL129
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL125
-	.4byte	.LFE215
+	.4byte	.LVL129
+	.4byte	.LVL132
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL132
+	.4byte	.LVL133
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL133
+	.4byte	.LFE219
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
 .LLST60:
 	.4byte	.LVL122
-	.4byte	.LVL125
+	.4byte	.LVL127
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL125
-	.4byte	.LFE215
+	.4byte	.LVL127
+	.4byte	.LFE219
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
@@ -7999,56 +8062,117 @@ __func__.8692:
 	.2byte	0x1
 	.byte	0x52
 	.4byte	.LVL125
-	.4byte	.LFE215
+	.4byte	.LVL131
+	.2byte	0x3
+	.byte	0x7d
+	.sleb128 100
+	.4byte	.LVL131
+	.4byte	.LVL132
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	.LVL132
+	.4byte	.LVL181
+	.2byte	0x3
+	.byte	0x7d
+	.sleb128 100
+	.4byte	.LVL181
+	.4byte	.LVL188
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 84
+	.4byte	.LVL188
+	.4byte	.LVL190
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	.LVL190
+	.4byte	.LVL196
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 84
+	.4byte	.LVL196
+	.4byte	.LVL208
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	.LVL208
+	.4byte	.LVL209
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 84
+	.4byte	.LVL209
+	.4byte	.LVL213
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x52
 	.byte	0x9f
+	.4byte	.LVL213
+	.4byte	.LFE219
+	.2byte	0x3
+	.byte	0x7d
+	.sleb128 100
 	.4byte	0
 	.4byte	0
 .LLST62:
 	.4byte	.LVL122
-	.4byte	.LVL124
+	.4byte	.LVL126
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL124
-	.4byte	.LVL158
-	.2byte	0x3
-	.byte	0x7d
-	.sleb128 92
-	.4byte	.LVL158
-	.4byte	.LVL210
+	.4byte	.LVL126
+	.4byte	.LVL130-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL130-1
+	.4byte	.LVL132
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.4byte	.LVL132
+	.4byte	.LVL134-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL134-1
+	.4byte	.LFE219
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x53
 	.byte	0x9f
-	.4byte	.LVL210
-	.4byte	.LFE215
-	.2byte	0x3
-	.byte	0x7d
-	.sleb128 92
 	.4byte	0
 	.4byte	0
 .LLST63:
 	.4byte	.LVL123
-	.4byte	.LVL125
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL125
-	.4byte	.LVL182
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL210
-	.4byte	.LFE215
-	.2byte	0x1
-	.byte	0x5a
+	.4byte	.LVL124
+	.2byte	0x3
+	.byte	0x7d
+	.sleb128 100
 	.4byte	0
 	.4byte	0
 .LLST64:
 	.4byte	.LVL122
-	.4byte	.LVL125
+	.4byte	.LVL131
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xea
+	.byte	0x9f
+	.4byte	.LVL132
+	.4byte	.LVL179
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xea
+	.byte	0x9f
+	.4byte	.LVL213
+	.4byte	.LVL214
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xea
@@ -8056,207 +8180,204 @@ __func__.8692:
 	.4byte	0
 	.4byte	0
 .LLST65:
-	.4byte	.LVL122
-	.4byte	.LVL125
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL125
-	.4byte	.LVL131
-	.2byte	0x3
-	.byte	0x7d
-	.sleb128 96
-	.4byte	.LVL131
 	.4byte	.LVL132
+	.4byte	.LVL134-1
 	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL134-1
+	.4byte	.LVL179
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
 	.byte	0x53
-	.4byte	.LVL132
-	.4byte	.LVL158
-	.2byte	0x3
-	.byte	0x7d
-	.sleb128 96
-	.4byte	.LVL210
-	.4byte	.LFE215
-	.2byte	0x3
-	.byte	0x7d
-	.sleb128 96
+	.byte	0x9f
+	.4byte	.LVL213
+	.4byte	.LVL214
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
 	.4byte	0
 	.4byte	0
 .LLST66:
-	.4byte	.LVL134
-	.4byte	.LVL158
+	.4byte	.LVL132
+	.4byte	.LVL179
 	.2byte	0x3
 	.byte	0x7d
-	.sleb128 92
-	.4byte	.LVL210
-	.4byte	.LVL211
+	.sleb128 100
+	.4byte	.LVL213
+	.4byte	.LVL214
 	.2byte	0x3
 	.byte	0x7d
-	.sleb128 92
+	.sleb128 100
 	.4byte	0
 	.4byte	0
 .LLST67:
-	.4byte	.LVL134
-	.4byte	.LVL180
+	.4byte	.LVL132
+	.4byte	.LVL179
 	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL210
-	.4byte	.LVL211
+	.byte	0x55
+	.4byte	.LVL213
+	.4byte	.LVL214
 	.2byte	0x1
-	.byte	0x5a
+	.byte	0x55
 	.4byte	0
 	.4byte	0
 .LLST68:
-	.4byte	.LVL134
-	.4byte	.LVL180
+	.4byte	.LVL132
+	.4byte	.LVL133
 	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL210
-	.4byte	.LVL211
+	.byte	0x50
+	.4byte	.LVL133
+	.4byte	.LVL179
 	.2byte	0x1
-	.byte	0x55
+	.byte	0x54
+	.4byte	.LVL213
+	.4byte	.LVL214
+	.2byte	0x1
+	.byte	0x54
 	.4byte	0
 	.4byte	0
 .LLST69:
-	.4byte	.LVL136
-	.4byte	.LVL137-1
+	.4byte	.LVL135
+	.4byte	.LVL136-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL137-1
-	.4byte	.LVL180
-	.2byte	0x3
-	.byte	0x7d
-	.sleb128 100
+	.4byte	.LVL136-1
+	.4byte	.LVL179
+	.2byte	0x1
+	.byte	0x5a
 	.4byte	0
 	.4byte	0
 .LLST70:
+	.4byte	.LVL141
 	.4byte	.LVL142
-	.4byte	.LVL143
 	.2byte	0x1
 	.byte	0x50
+	.4byte	.LVL143
 	.4byte	.LVL144
-	.4byte	.LVL145
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL145
-	.4byte	.LVL146-1
+	.4byte	.LVL144
+	.4byte	.LVL145-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL153
-	.4byte	.LVL156
+	.4byte	.LVL152
+	.4byte	.LVL155
 	.2byte	0x1
 	.byte	0x50
+	.4byte	.LVL163
 	.4byte	.LVL164
-	.4byte	.LVL165
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
 .LLST71:
-	.4byte	.LVL134
-	.4byte	.LVL149
+	.4byte	.LVL132
+	.4byte	.LVL148
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
+	.4byte	.LVL148
 	.4byte	.LVL149
-	.4byte	.LVL150
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
+	.4byte	.LVL149
 	.4byte	.LVL150
-	.4byte	.LVL151
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL158
-	.4byte	.LVL180
+	.4byte	.LVL150
+	.4byte	.LVL179
 	.2byte	0x1
-	.byte	0x5b
+	.byte	0x58
 	.4byte	0
 	.4byte	0
 .LLST72:
-	.4byte	.LVL134
-	.4byte	.LVL140
+	.4byte	.LVL132
+	.4byte	.LVL139
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
+	.4byte	.LVL139
 	.4byte	.LVL140
-	.4byte	.LVL141
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL141
-	.4byte	.LVL146
+	.4byte	.LVL140
+	.4byte	.LVL145
 	.2byte	0x1
-	.byte	0x58
+	.byte	0x5b
+	.4byte	.LVL146
 	.4byte	.LVL147
-	.4byte	.LVL148
 	.2byte	0x1
 	.byte	0x50
+	.4byte	.LVL147
 	.4byte	.LVL148
-	.4byte	.LVL149
 	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL149
-	.4byte	.LVL152
+	.byte	0x5b
+	.4byte	.LVL148
+	.4byte	.LVL151
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL152
-	.4byte	.LVL153-1
+	.4byte	.LVL151
+	.4byte	.LVL152-1
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
-	.4byte	.LVL153-1
-	.4byte	.LVL158
+	.4byte	.LVL152-1
+	.4byte	.LVL157
 	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL159
-	.4byte	.LVL162
+	.byte	0x5b
+	.4byte	.LVL158
+	.4byte	.LVL161
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL162
-	.4byte	.LVL163-1
+	.4byte	.LVL161
+	.4byte	.LVL162-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL163-1
-	.4byte	.LVL167
+	.4byte	.LVL162-1
+	.4byte	.LVL166
 	.2byte	0x3
 	.byte	0x7d
 	.sleb128 96
+	.4byte	.LVL178
 	.4byte	.LVL179
-	.4byte	.LVL180
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
 .LLST73:
-	.4byte	.LVL135
-	.4byte	.LVL136-1
+	.4byte	.LVL134
+	.4byte	.LVL135-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL136-1
-	.4byte	.LVL180
+	.4byte	.LVL135-1
+	.4byte	.LVL179
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL210
-	.4byte	.LVL211
+	.4byte	.LVL213
+	.4byte	.LVL214
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
 .LLST74:
+	.4byte	.LVL153
 	.4byte	.LVL154
-	.4byte	.LVL155
 	.2byte	0x3
 	.byte	0x74
 	.sleb128 4
 	.byte	0x9f
-	.4byte	.LVL155
-	.4byte	.LVL157-1
+	.4byte	.LVL154
+	.4byte	.LVL156-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL157-1
-	.4byte	.LVL157
+	.4byte	.LVL156-1
+	.4byte	.LVL156
 	.2byte	0x3
 	.byte	0x74
 	.sleb128 4
@@ -8264,253 +8385,257 @@ __func__.8692:
 	.4byte	0
 	.4byte	0
 .LLST75:
-	.4byte	.LVL154
-	.4byte	.LVL157
+	.4byte	.LVL153
+	.4byte	.LVL156
 	.2byte	0x1
-	.byte	0x58
+	.byte	0x5b
 	.4byte	0
 	.4byte	0
 .LLST76:
-	.4byte	.LVL154
-	.4byte	.LVL157
+	.4byte	.LVL153
+	.4byte	.LVL156
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
 .LLST77:
+	.4byte	.LVL159
 	.4byte	.LVL160
-	.4byte	.LVL161
 	.2byte	0x4
 	.byte	0x7d
-	.sleb128 108
+	.sleb128 104
 	.byte	0x9f
-	.4byte	.LVL161
-	.4byte	.LVL163-1
+	.4byte	.LVL160
+	.4byte	.LVL162-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL163-1
-	.4byte	.LVL163
+	.4byte	.LVL162-1
+	.4byte	.LVL162
 	.2byte	0x4
 	.byte	0x7d
-	.sleb128 108
+	.sleb128 104
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
 .LLST78:
-	.4byte	.LVL160
-	.4byte	.LVL162
+	.4byte	.LVL159
+	.4byte	.LVL161
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL162
-	.4byte	.LVL163-1
+	.4byte	.LVL161
+	.4byte	.LVL162-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL163-1
-	.4byte	.LVL163
+	.4byte	.LVL162-1
+	.4byte	.LVL162
 	.2byte	0x3
 	.byte	0x7d
 	.sleb128 96
 	.4byte	0
 	.4byte	0
 .LLST79:
-	.4byte	.LVL160
-	.4byte	.LVL163
+	.4byte	.LVL159
+	.4byte	.LVL162
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
 .LLST80:
-	.4byte	.LVL168
-	.4byte	.LVL173
+	.4byte	.LVL167
+	.4byte	.LVL172
 	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL173
-	.4byte	.LVL177
+	.byte	0x5b
+	.4byte	.LVL172
+	.4byte	.LVL176
 	.2byte	0x4
 	.byte	0x7d
-	.sleb128 168
+	.sleb128 164
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
 .LLST81:
+	.4byte	.LVL167
 	.4byte	.LVL168
-	.4byte	.LVL169
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL169
-	.4byte	.LVL177
+	.4byte	.LVL168
+	.4byte	.LVL176
 	.2byte	0x3
 	.byte	0x7d
 	.sleb128 96
 	.4byte	0
 	.4byte	0
 .LLST82:
-	.4byte	.LVL168
-	.4byte	.LVL177
+	.4byte	.LVL167
+	.4byte	.LVL176
 	.2byte	0x1
-	.byte	0x5b
+	.byte	0x58
 	.4byte	0
 	.4byte	0
 .LLST83:
-	.4byte	.LVL168
-	.4byte	.LVL177
+	.4byte	.LVL167
+	.4byte	.LVL176
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
 .LLST84:
-	.4byte	.LVL168
-	.4byte	.LVL170
+	.4byte	.LVL167
+	.4byte	.LVL169
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
+	.4byte	.LVL169
 	.4byte	.LVL170
-	.4byte	.LVL171
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
 .LLST85:
+	.4byte	.LVL172
 	.4byte	.LVL173
-	.4byte	.LVL174
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL174
-	.4byte	.LVL175-1
+	.4byte	.LVL173
+	.4byte	.LVL174-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL175-1
-	.4byte	.LVL177
+	.4byte	.LVL174-1
+	.4byte	.LVL176
 	.2byte	0x1
-	.byte	0x58
+	.byte	0x5b
 	.4byte	0
 	.4byte	0
 .LLST86:
-	.4byte	.LVL180
-	.4byte	.LVL188
+	.4byte	.LVL179
+	.4byte	.LVL189
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL189
-	.4byte	.LVL210
+	.4byte	.LVL190
+	.4byte	.LVL213
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
 .LLST87:
-	.4byte	.LVL180
-	.4byte	.LVL188
+	.4byte	.LVL179
+	.4byte	.LVL189
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL189
-	.4byte	.LVL210
+	.4byte	.LVL190
+	.4byte	.LVL213
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
 .LLST89:
 	.4byte	.LVL182
-	.4byte	.LVL187
+	.4byte	.LVL188
 	.2byte	0x2
 	.byte	0x7a
 	.sleb128 0
-	.4byte	.LVL187
 	.4byte	.LVL188
+	.4byte	.LVL189
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 16
-	.4byte	.LVL189
-	.4byte	.LVL196
+	.4byte	.LVL190
+	.4byte	.LVL198
 	.2byte	0x2
 	.byte	0x7a
 	.sleb128 0
-	.4byte	.LVL196
-	.4byte	.LVL207
+	.4byte	.LVL198
+	.4byte	.LVL208
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 16
-	.4byte	.LVL207
-	.4byte	.LVL210
+	.4byte	.LVL208
+	.4byte	.LVL213
 	.2byte	0x2
 	.byte	0x7a
 	.sleb128 0
 	.4byte	0
 	.4byte	0
 .LLST90:
-	.4byte	.LVL195
-	.4byte	.LVL196
+	.4byte	.LVL197
+	.4byte	.LVL198
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL209
-	.4byte	.LVL210
+	.4byte	.LVL198
+	.4byte	.LVL205
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL206
+	.4byte	.LVL208
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL211
+	.4byte	.LVL212
 	.2byte	0x1
 	.byte	0x50
+	.4byte	.LVL212
+	.4byte	.LVL213
+	.2byte	0x1
+	.byte	0x5b
 	.4byte	0
 	.4byte	0
 .LLST91:
-	.4byte	.LVL190
-	.4byte	.LVL204
+	.4byte	.LVL191
+	.4byte	.LVL205
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL205
-	.4byte	.LVL210
+	.4byte	.LVL206
+	.4byte	.LVL213
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
 .LLST92:
-	.4byte	.LVL197
-	.4byte	.LVL198
+	.4byte	.LVL199
+	.4byte	.LVL200
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL198
-	.4byte	.LVL199-1
+	.4byte	.LVL200
+	.4byte	.LVL201-1
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
 	.4byte	0
 	.4byte	0
 .LLST93:
-	.4byte	.LVL199
-	.4byte	.LVL200
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL200
+	.4byte	.LVL201
 	.4byte	.LVL202
 	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL205
-	.4byte	.LVL207
-	.2byte	0x1
-	.byte	0x5b
+	.byte	0x50
 	.4byte	0
 	.4byte	0
 .LLST94:
-	.4byte	.LVL196
-	.4byte	.LVL204
+	.4byte	.LVL198
+	.4byte	.LVL205
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL205
-	.4byte	.LVL207
+	.4byte	.LVL206
+	.4byte	.LVL208
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
 .LLST95:
-	.4byte	.LVL194
-	.4byte	.LVL195-1
+	.4byte	.LVL195
+	.4byte	.LVL197-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL195-1
-	.4byte	.LVL196
+	.4byte	.LVL197-1
+	.4byte	.LVL198
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 84
-	.4byte	.LVL208
 	.4byte	.LVL209
+	.4byte	.LVL210
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL209
 	.4byte	.LVL210
+	.4byte	.LVL213
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 84
@@ -8534,7 +8659,7 @@ __func__.8692:
 	.4byte	0
 	.4byte	0
 .LLST88:
-	.4byte	.LVL181
+	.4byte	.LVL180
 	.4byte	.LVL184-1
 	.2byte	0x6
 	.byte	0x75
@@ -8551,7 +8676,7 @@ __func__.8692:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL121
-	.4byte	.LFE212
+	.4byte	.LFE216
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -8569,7 +8694,7 @@ __func__.8692:
 	.2byte	0x1
 	.byte	0x54
 	.4byte	.LVL117
-	.4byte	.LFE211
+	.4byte	.LFE215
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -8587,7 +8712,7 @@ __func__.8692:
 	.2byte	0x1
 	.byte	0x55
 	.4byte	.LVL117
-	.4byte	.LFE211
+	.4byte	.LFE215
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -8601,7 +8726,7 @@ __func__.8692:
 	.2byte	0x1
 	.byte	0x52
 	.4byte	.LVL106
-	.4byte	.LFE211
+	.4byte	.LFE215
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -8615,7 +8740,7 @@ __func__.8692:
 	.2byte	0x1
 	.byte	0x53
 	.4byte	.LVL110
-	.4byte	.LFE211
+	.4byte	.LFE215
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -8733,7 +8858,7 @@ __func__.8692:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL119
-	.4byte	.LFE210
+	.4byte	.LFE214
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -8751,7 +8876,7 @@ __func__.8692:
 	.2byte	0x1
 	.byte	0x54
 	.4byte	.LVL104
-	.4byte	.LFE207
+	.4byte	.LFE211
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -8769,7 +8894,7 @@ __func__.8692:
 	.2byte	0x1
 	.byte	0x56
 	.4byte	.LVL104
-	.4byte	.LFE207
+	.4byte	.LFE211
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -8787,7 +8912,7 @@ __func__.8692:
 	.2byte	0x1
 	.byte	0x57
 	.4byte	.LVL104
-	.4byte	.LFE207
+	.4byte	.LFE211
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -8805,7 +8930,7 @@ __func__.8692:
 	.2byte	0x1
 	.byte	0x55
 	.4byte	.LVL104
-	.4byte	.LFE207
+	.4byte	.LFE211
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -8820,7 +8945,7 @@ __func__.8692:
 	.byte	0x91
 	.sleb128 0
 	.4byte	.LVL104
-	.4byte	.LFE207
+	.4byte	.LFE211
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
@@ -8833,7 +8958,7 @@ __func__.8692:
 	.byte	0x91
 	.sleb128 4
 	.4byte	.LVL104
-	.4byte	.LFE207
+	.4byte	.LFE211
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 4
@@ -8864,7 +8989,7 @@ __func__.8692:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL43
-	.4byte	.LFE206
+	.4byte	.LFE210
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
@@ -8875,7 +9000,7 @@ __func__.8692:
 	.2byte	0x1
 	.byte	0x51
 	.4byte	.LVL42
-	.4byte	.LFE206
+	.4byte	.LFE210
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -68
@@ -8903,7 +9028,7 @@ __func__.8692:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL86-1
-	.4byte	.LFE206
+	.4byte	.LFE210
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
@@ -8951,7 +9076,7 @@ __func__.8692:
 	.2byte	0x1
 	.byte	0x57
 	.4byte	.LVL92
-	.4byte	.LFE206
+	.4byte	.LFE210
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -8966,7 +9091,7 @@ __func__.8692:
 	.byte	0x91
 	.sleb128 0
 	.4byte	.LVL68
-	.4byte	.LFE206
+	.4byte	.LFE210
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 0
@@ -8979,7 +9104,7 @@ __func__.8692:
 	.byte	0x91
 	.sleb128 4
 	.4byte	.LVL68
-	.4byte	.LFE206
+	.4byte	.LFE210
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 4
@@ -9096,7 +9221,7 @@ __func__.8692:
 	.byte	0x30
 	.byte	0x9f
 	.4byte	.LVL90
-	.4byte	.LFE206
+	.4byte	.LFE210
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
@@ -9108,7 +9233,7 @@ __func__.8692:
 	.2byte	0x1
 	.byte	0x53
 	.4byte	.LVL45-1
-	.4byte	.LFE206
+	.4byte	.LFE210
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -76
@@ -9238,7 +9363,7 @@ __func__.8692:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL34-1
-	.4byte	.LFE202
+	.4byte	.LFE206
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
@@ -9249,7 +9374,7 @@ __func__.8692:
 	.2byte	0x1
 	.byte	0x51
 	.4byte	.LVL31
-	.4byte	.LFE202
+	.4byte	.LFE206
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
@@ -9264,7 +9389,7 @@ __func__.8692:
 	.2byte	0x1
 	.byte	0x51
 	.4byte	.LVL34-1
-	.4byte	.LFE202
+	.4byte	.LFE206
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9282,7 +9407,7 @@ __func__.8692:
 	.2byte	0x1
 	.byte	0x52
 	.4byte	.LVL34-1
-	.4byte	.LFE202
+	.4byte	.LFE206
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9325,7 +9450,7 @@ __func__.8692:
 	.2byte	0x1
 	.byte	0x55
 	.4byte	.LVL19
-	.4byte	.LFE216
+	.4byte	.LFE220
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9350,7 +9475,7 @@ __func__.8692:
 	.byte	0x51
 	.byte	0x9f
 	.4byte	.LVL16
-	.4byte	.LFE216
+	.4byte	.LFE220
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
@@ -9372,7 +9497,7 @@ __func__.8692:
 	.byte	0x52
 	.byte	0x9f
 	.4byte	.LVL16
-	.4byte	.LFE216
+	.4byte	.LFE220
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
@@ -9394,7 +9519,7 @@ __func__.8692:
 	.byte	0x53
 	.byte	0x9f
 	.4byte	.LVL16
-	.4byte	.LFE216
+	.4byte	.LFE220
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
@@ -9421,7 +9546,7 @@ __func__.8692:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL28
-	.4byte	.LFE216
+	.4byte	.LFE220
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
@@ -9442,7 +9567,7 @@ __func__.8692:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL28
-	.4byte	.LFE216
+	.4byte	.LFE220
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
@@ -9516,22 +9641,22 @@ __func__.8692:
 	.byte	0
 	.2byte	0
 	.2byte	0
-	.4byte	.LFB216
-	.4byte	.LFE216-.LFB216
-	.4byte	.LFB202
-	.4byte	.LFE202-.LFB202
+	.4byte	.LFB220
+	.4byte	.LFE220-.LFB220
 	.4byte	.LFB206
 	.4byte	.LFE206-.LFB206
-	.4byte	.LFB207
-	.4byte	.LFE207-.LFB207
-	.4byte	.LFB211
-	.4byte	.LFE211-.LFB211
 	.4byte	.LFB210
 	.4byte	.LFE210-.LFB210
-	.4byte	.LFB212
-	.4byte	.LFE212-.LFB212
+	.4byte	.LFB211
+	.4byte	.LFE211-.LFB211
 	.4byte	.LFB215
 	.4byte	.LFE215-.LFB215
+	.4byte	.LFB214
+	.4byte	.LFE214-.LFB214
+	.4byte	.LFB216
+	.4byte	.LFE216-.LFB216
+	.4byte	.LFB219
+	.4byte	.LFE219-.LFB219
 	.4byte	0
 	.4byte	0
 	.section	.debug_ranges,"",%progbits
@@ -9570,168 +9695,168 @@ __func__.8692:
 	.4byte	.LBE95
 	.4byte	0
 	.4byte	0
-	.4byte	.LFB216
-	.4byte	.LFE216
-	.4byte	.LFB202
-	.4byte	.LFE202
+	.4byte	.LFB220
+	.4byte	.LFE220
 	.4byte	.LFB206
 	.4byte	.LFE206
-	.4byte	.LFB207
-	.4byte	.LFE207
-	.4byte	.LFB211
-	.4byte	.LFE211
 	.4byte	.LFB210
 	.4byte	.LFE210
-	.4byte	.LFB212
-	.4byte	.LFE212
+	.4byte	.LFB211
+	.4byte	.LFE211
 	.4byte	.LFB215
 	.4byte	.LFE215
+	.4byte	.LFB214
+	.4byte	.LFE214
+	.4byte	.LFB216
+	.4byte	.LFE216
+	.4byte	.LFB219
+	.4byte	.LFE219
 	.4byte	0
 	.4byte	0
 	.section	.debug_line,"",%progbits
 .Ldebug_line0:
 	.section	.debug_str,"MS",%progbits,1
-.LASF381:
+.LASF392:
 	.ascii	"memalign_simple\000"
-.LASF336:
+.LASF347:
 	.ascii	"blob\000"
-.LASF130:
+.LASF132:
 	.ascii	"off_mem_rsvmap\000"
-.LASF201:
+.LASF203:
 	.ascii	"IH_COMP_GZIP\000"
 .LASF18:
 	.ascii	"size_t\000"
-.LASF250:
+.LASF252:
 	.ascii	"initrd_start\000"
 .LASF13:
 	.ascii	"sizetype\000"
-.LASF270:
+.LASF284:
 	.ascii	"net_hostname\000"
 .LASF77:
 	.ascii	"start\000"
-.LASF156:
+.LASF158:
 	.ascii	"IH_OS_ARTOS\000"
-.LASF291:
+.LASF304:
 	.ascii	"NETLOOP_RESTART\000"
 .LASF48:
 	.ascii	"IF_TYPE_MTD\000"
-.LASF373:
+.LASF384:
 	.ascii	"fdt_shrink_to_minimum\000"
-.LASF360:
+.LASF371:
 	.ascii	"fit_get_name\000"
-.LASF209:
+.LASF211:
 	.ascii	"ih_magic\000"
-.LASF320:
+.LASF331:
 	.ascii	"__func__\000"
 .LASF37:
 	.ascii	"IF_TYPE_DOC\000"
 .LASF59:
 	.ascii	"part_type\000"
-.LASF110:
+.LASF112:
 	.ascii	"bi_intfreq\000"
-.LASF183:
+.LASF185:
 	.ascii	"IH_TYPE_ATMELIMAGE\000"
 .LASF11:
 	.ascii	"phys_addr_t\000"
-.LASF258:
+.LASF260:
 	.ascii	"monitor_flash_len\000"
 .LASF5:
 	.ascii	"__u8\000"
 .LASF67:
 	.ascii	"vendor\000"
-.LASF290:
+.LASF303:
 	.ascii	"NETLOOP_CONTINUE\000"
-.LASF86:
+.LASF88:
 	.ascii	"flash_info_t\000"
-.LASF226:
+.LASF228:
 	.ascii	"comp\000"
-.LASF221:
+.LASF223:
 	.ascii	"image_header_t\000"
-.LASF255:
+.LASF257:
 	.ascii	"state\000"
-.LASF329:
+.LASF340:
 	.ascii	"align_len\000"
-.LASF104:
+.LASF106:
 	.ascii	"bi_dsp_freq\000"
-.LASF223:
+.LASF225:
 	.ascii	"image_start\000"
-.LASF325:
+.LASF336:
 	.ascii	"part_name\000"
-.LASF322:
+.LASF333:
 	.ascii	"spl_internal_load_simple_fit\000"
-.LASF202:
+.LASF204:
 	.ascii	"IH_COMP_BZIP2\000"
-.LASF140:
+.LASF142:
 	.ascii	"IH_OS_FREEBSD\000"
 .LASF62:
 	.ascii	"type\000"
 .LASF50:
 	.ascii	"if_type\000"
-.LASF213:
+.LASF215:
 	.ascii	"ih_load\000"
-.LASF174:
+.LASF176:
 	.ascii	"IH_TYPE_KWBIMAGE\000"
 .LASF26:
 	.ascii	"efi_guid_t\000"
-.LASF260:
+.LASF262:
 	.ascii	"__dtb_dt_spl_begin\000"
-.LASF143:
+.LASF145:
 	.ascii	"IH_OS_SVR4\000"
 .LASF7:
 	.ascii	"__u32\000"
-.LASF305:
+.LASF278:
 	.ascii	"priv\000"
-.LASF182:
+.LASF184:
 	.ascii	"IH_TYPE_GPIMAGE\000"
 .LASF70:
 	.ascii	"bdev\000"
-.LASF275:
+.LASF289:
 	.ascii	"net_server_ip\000"
-.LASF207:
+.LASF209:
 	.ascii	"IH_COMP_COUNT\000"
-.LASF283:
+.LASF297:
 	.ascii	"net_native_vlan\000"
 .LASF63:
 	.ascii	"removable\000"
-.LASF365:
+.LASF376:
 	.ascii	"fdt_getprop\000"
 .LASF24:
 	.ascii	"errno\000"
 .LASF15:
 	.ascii	"long int\000"
-.LASF99:
+.LASF101:
 	.ascii	"bi_flashsize\000"
-.LASF144:
+.LASF146:
 	.ascii	"IH_OS_ESIX\000"
-.LASF170:
+.LASF172:
 	.ascii	"IH_TYPE_FIRMWARE\000"
-.LASF393:
+.LASF404:
 	.ascii	"strchr\000"
-.LASF251:
+.LASF253:
 	.ascii	"initrd_end\000"
-.LASF123:
+.LASF125:
 	.ascii	"IRQ_STACK_START_IN\000"
-.LASF134:
+.LASF136:
 	.ascii	"size_dt_strings\000"
-.LASF386:
+.LASF397:
 	.ascii	"puts\000"
-.LASF362:
+.LASF373:
 	.ascii	"image_get_magic\000"
-.LASF363:
+.LASF374:
 	.ascii	"__fswab32\000"
-.LASF396:
+.LASF407:
 	.ascii	"/home/zzz/code/u-boot\000"
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 	.ascii	"net_boot_file_size\000"
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 	.ascii	"data\000"
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 	.ascii	"IH_TYPE_INVALID\000"
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 	.ascii	"ih_dcrc\000"
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 	.ascii	"bi_ethspeed\000"
 .LASF66:
 	.ascii	"log2blksz\000"
@@ -9739,385 +9864,393 @@ __func__.8692:
 	.ascii	"IF_TYPE_HOST\000"
 .LASF71:
 	.ascii	"ide_bus_offset\000"
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 	.ascii	"spl_fit_get_image_node\000"
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 	.ascii	"in_addr\000"
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 	.ascii	"signed char\000"
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 	.ascii	"uint8_t\000"
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 	.ascii	"fit_image_get_data_size\000"
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 	.ascii	"udevice\000"
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 	.ascii	"fit_image_verify_with_data\000"
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 	.ascii	"fdt_addr\000"
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 	.ascii	"last_comp_version\000"
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 	.ascii	"bi_andr_version\000"
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 	.ascii	"fit_hdr\000"
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 	.ascii	"IH_TYPE_FIRMWARE_IVT\000"
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 	.ascii	"flags\000"
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 	.ascii	"ih_type\000"
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 	.ascii	"printf\000"
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@@ -10127,189 +10260,195 @@ __func__.8692:
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-.LASF354:
+.LASF365:
 	.ascii	"get_aligned_image_overhead\000"
-.LASF271:
+.LASF285:
 	.ascii	"net_root_path\000"
-.LASF116:
+.LASF118:
 	.ascii	"bd_t\000"
-.LASF265:
+.LASF267:
 	.ascii	"s_addr\000"
-.LASF173:
+.LASF175:
 	.ascii	"IH_TYPE_FLATDT\000"
-.LASF280:
+.LASF294:
 	.ascii	"net_bcast_ethaddr\000"
-.LASF113:
+.LASF115:
 	.ascii	"bi_boot_params\000"
 .LASF22:
 	.ascii	"uint32_t\000"
-.LASF311:
+.LASF323:
 	.ascii	"mem_malloc_brk\000"
-.LASF266:
+.LASF280:
 	.ascii	"net_gateway\000"
-.LASF152:
+.LASF154:
 	.ascii	"IH_OS_PSOS\000"
-.LASF150:
+.LASF152:
 	.ascii	"IH_OS_LYNXOS\000"
-.LASF377:
+.LASF388:
 	.ascii	"fit_image_get_comp_addr\000"
-.LASF389:
+.LASF400:
 	.ascii	"fdt_subnode_offset\000"
-.LASF394:
+.LASF405:
 	.ascii	"GNU C11 6.3.1 20170404 -mthumb -mthumb-interwork -m"
 	.ascii	"abi=aapcs-linux -mno-unaligned-access -mfloat-abi=s"
 	.ascii	"oft -march=armv7-a -mtune=cortex-a9 -mfpu=vfpv3-d16"
@@ -10319,79 +10458,85 @@ __func__.8692:
 	.ascii	"s -fdata-sections -fno-common -ffixed-r9\000"
 .LASF32:
 	.ascii	"IF_TYPE_UNKNOWN\000"
-.LASF96:
+.LASF98:
 	.ascii	"bi_memstart\000"
-.LASF197:
+.LASF199:
 	.ascii	"IH_TYPE_PMMC\000"
-.LASF190:
+.LASF192:
 	.ascii	"IH_TYPE_RKSPI\000"
-.LASF163:
+.LASF165:
 	.ascii	"IH_OS_OP_TEE\000"
-.LASF148:
+.LASF279:
+	.ascii	"eth_current\000"
+.LASF150:
 	.ascii	"IH_OS_DELL\000"
-.LASF94:
+.LASF96:
 	.ascii	"reserved\000"
-.LASF339:
+.LASF350:
 	.ascii	"spl_fit_append_fdt\000"
-.LASF298:
+.LASF311:
 	.ascii	"entry_point\000"
-.LASF166:
+.LASF168:
 	.ascii	"IH_TYPE_STANDALONE\000"
-.LASF115:
+.LASF117:
 	.ascii	"bi_dram\000"
 .LASF2:
 	.ascii	"short unsigned int\000"
-.LASF126:
+.LASF128:
 	.ascii	"magic\000"
-.LASF328:
+.LASF339:
 	.ascii	"spl_kernel_partition\000"
-.LASF243:
+.LASF245:
 	.ascii	"fit_hdr_setup\000"
-.LASF232:
+.LASF234:
 	.ascii	"legacy_hdr_valid\000"
-.LASF90:
+.LASF92:
 	.ascii	"base\000"
-.LASF158:
+.LASF160:
 	.ascii	"IH_OS_INTEGRITY\000"
 .LASF83:
 	.ascii	"sector_count\000"
-.LASF219:
+.LASF221:
 	.ascii	"ih_comp\000"
-.LASF349:
+.LASF360:
 	.ascii	"external_data\000"
-.LASF326:
+.LASF337:
 	.ascii	"part_info\000"
 .LASF40:
 	.ascii	"IF_TYPE_SATA\000"
 .LASF55:
 	.ascii	"SIG_TYPE_COUNT\000"
-.LASF248:
+.LASF250:
 	.ascii	"ft_addr\000"
-.LASF350:
+.LASF361:
 	.ascii	"preload\000"
 .LASF4:
 	.ascii	"uchar\000"
-.LASF371:
+.LASF382:
 	.ascii	"part_get_info_by_name\000"
-.LASF146:
+.LASF148:
 	.ascii	"IH_OS_IRIX\000"
-.LASF249:
+.LASF251:
 	.ascii	"ft_len\000"
-.LASF168:
+.LASF276:
+	.ascii	"next\000"
+.LASF170:
 	.ascii	"IH_TYPE_RAMDISK\000"
-.LASF244:
+.LASF246:
 	.ascii	"fit_uname_setup\000"
-.LASF267:
+.LASF281:
 	.ascii	"net_netmask\000"
-.LASF340:
+.LASF272:
+	.ascii	"send\000"
+.LASF351:
 	.ascii	"spl_load_fit_image\000"
-.LASF117:
+.LASF119:
 	.ascii	"IRQ_STACK_START\000"
-.LASF299:
+.LASF312:
 	.ascii	"entry_point_os\000"
-.LASF241:
+.LASF243:
 	.ascii	"fit_uname_fdt\000"
-.LASF388:
+.LASF399:
 	.ascii	"fit_image_get_data\000"
 	.ident	"GCC: (Linaro GCC 6.3-2017.05) 6.3.1 20170404"
 	.section	.note.GNU-stack,"",%progbits

commit abfd1c5e3dc976f81a24bf2f58246e413aada4b2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Feb 2 16:59:59 2021 +0800

    rockchip: support assign kernel dtb name which is build-in
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I708b8b41ef5cda59bca78eafb4ecacd568528e75

diff --git a/Makefile b/Makefile
index de68fa12be..3506a949d0 100644
--- a/Makefile
+++ b/Makefile
@@ -906,11 +906,12 @@ else ifeq ($(CONFIG_OF_SEPARATE),y)
 u-boot-dtb.bin: u-boot-nodtb.bin dts/dt.dtb FORCE
 	$(call if_changed,cat)
 
-ifneq ($(wildcard dts/kern.dtb),)
+EMBEDED_KERN_DTB := $(CONFIG_EMBEDED_KERNEL_DTB_PATH:"%"=%)
+ifneq ($(wildcard $(EMBEDED_KERN_DTB)),)
 u-boot-dtb-kern.bin: u-boot-dtb.bin FORCE
 	$(call if_changed,copy)
 	$(call if_changed,truncate)
-u-boot.bin: u-boot-dtb-kern.bin dts/kern.dtb FORCE
+u-boot.bin: u-boot-dtb-kern.bin $(EMBEDED_KERN_DTB) FORCE
 	$(call if_changed,cat)
 else
 u-boot.bin: u-boot-dtb.bin FORCE
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 2b88d67be5..2daeb368f0 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -721,6 +721,11 @@ config USING_KERNEL_DTB
 	  the uart and emmc will still using U-Boot dtb, but other devices like
 	  regulator/pmic, display, usb will use dts node from kernel.
 
+config EMBEDED_KERNEL_DTB_PATH
+	string "Embeded kernel dtb file path"
+	depends on USING_KERNEL_DTB
+	default "dts/kern.dtb"
+
 config ROCKCHIP_CRC
 	bool "Rockchip CRC verify images"
 	help
diff --git a/arch/arm/mach-rockchip/make_fit_atf.sh b/arch/arm/mach-rockchip/make_fit_atf.sh
index b15964b357..a9723c4fef 100755
--- a/arch/arm/mach-rockchip/make_fit_atf.sh
+++ b/arch/arm/mach-rockchip/make_fit_atf.sh
@@ -49,10 +49,16 @@ function generate_uboot_node()
 
 function generate_kfdt_node()
 {
-	if [ -f ${srctree}/dts/kern.dtb ]; then
-	echo "		kernel-fdt {
+	KERN_DTB=`sed -n "/CONFIG_EMBEDED_KERNEL_DTB_PATH=/s/CONFIG_EMBEDED_KERNEL_DTB_PATH=//p" .config | tr -d '"'`
+	if [ -z "${KERN_DTB}" ]; then
+		return;
+	fi
+
+	if [ -f ${srctree}/${KERN_DTB} ]; then
+	PROP_KERN_DTB=', "kern-fdt"';
+	echo "		kern-fdt {
 			description = \"Kernel dtb\";
-			data = /incbin/(\"./dts/kern.dtb\");
+			data = /incbin/(\"${KERN_DTB}\");
 			type = \"flat_dt\";
 			arch = \"${ARCH}\";
 			compression = \"none\";
@@ -218,7 +224,7 @@ cat << EOF
 			firmware = "atf-1";
 			loadables = "uboot"${LOADABLE_ATF}${LOADABLE_OPTEE};
 			${STANDALONE_MCU}
-			fdt = "fdt";
+			fdt = "fdt"${PROP_KERN_DTB};
 			signature {
 				algo = "sha256,rsa2048";
 				padding = "pss";
diff --git a/arch/arm/mach-rockchip/make_fit_optee.sh b/arch/arm/mach-rockchip/make_fit_optee.sh
index 5dabcddfc6..ae767bd5a3 100755
--- a/arch/arm/mach-rockchip/make_fit_optee.sh
+++ b/arch/arm/mach-rockchip/make_fit_optee.sh
@@ -67,10 +67,15 @@ else
 	SIGN_IMAGES="			        sign-images = \"fdt\", \"firmware\", \"loadables\";"
 fi
 
-if [ -f ${srctree}/dts/kern.dtb ]; then
-	KFDT_NODE="		kernel-fdt {
+KERN_DTB=`sed -n "/CONFIG_EMBEDED_KERNEL_DTB_PATH=/s/CONFIG_EMBEDED_KERNEL_DTB_PATH=//p" .config | tr -d '"'`
+if [ -z "${KERN_DTB}" ]; then
+	return;
+fi
+if [ -f ${srctree}/${KERN_DTB} ]; then
+	PROP_KERN_DTB=', "kern-fdt"';
+	KFDT_NODE="		kern-fdt {
 			description = \"Kernel dtb\";
-			data = /incbin/(\"./dts/kern.dtb\");
+			data = /incbin/(\"${KERN_DTB}\");
 			type = \"flat_dt\";
 			arch = \"${ARCH}\";
 			compression = \"none\";
@@ -150,7 +155,7 @@ cat  << EOF
 			rollback-index = <0x0>;
 			firmware = "optee";
 			loadables = "uboot";
-			fdt = "fdt";
+			fdt = "fdt"${PROP_KERN_DTB};
 EOF
 echo "${MCU_STANDALONE}"
 cat  << EOF

commit ac05169a9fa6722007c0087d4432421a54e188aa
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Feb 2 17:10:03 2021 +0800

    scripts: fit: set data offset as 0xe00 for all cases
    
    We don't want complicated confgure.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I72e7e0b3a31abea17a63e54b81c1e7d7ad53d7a6

diff --git a/scripts/fit.sh b/scripts/fit.sh
index b05e9ee94e..9e857c31ec 100755
--- a/scripts/fit.sh
+++ b/scripts/fit.sh
@@ -18,12 +18,7 @@ SIG_UBOOT="${FIT_DIR}/uboot.data2sign"
 SIG_BOOT="${FIT_DIR}/boot.data2sign"
 SIG_RECOVERY="${FIT_DIR}/recovery.data2sign"
 # offs
-OFFS_NS_UBOOT="0xc00"
-OFFS_S_UBOOT="0xc00"
-OFFS_NS_BOOT="0x800"
-OFFS_S_BOOT="0xc00"
-OFFS_NS_RECOVERY="0x800"
-OFFS_S_RECOVERY="0xc00"
+OFFS_DATA="0xE00"
 # file
 CHIP_FILE="arch/arm/lib/.asm-offsets.s.cmd"
 # placeholder address
@@ -220,7 +215,7 @@ function fit_gen_uboot_itb()
 	check_its ${ITS_UBOOT}
 
 	if [ "${ARG_SIGN}" != "y" ]; then
-		${MKIMAGE} -f ${ITS_UBOOT} -E -p ${OFFS_NS_UBOOT} ${ITB_UBOOT} -v ${ARG_VER_UBOOT}
+		${MKIMAGE} -f ${ITS_UBOOT} -E -p ${OFFS_DATA} ${ITB_UBOOT} -v ${ARG_VER_UBOOT}
 		if [ "${ARG_SPL_NEW}" == "y" ]; then
 			./make.sh --spl ${ARG_INI_LOADER}
 			echo "pack loader with new: spl/u-boot-spl.bin"
@@ -258,12 +253,12 @@ function fit_gen_uboot_itb()
 		# Generally, boot.img is signed before uboot.img, so the ras key can be found
 		# in u-boot.dtb. If not found, let's insert rsa key anyway.
 		if ! fdtget -l ${UBOOT_DTB} /signature >/dev/null 2>&1 ; then
-			${MKIMAGE} -f ${ITS_UBOOT} -k ${KEY_DIR} -K ${UBOOT_DTB} -E -p ${OFFS_S_UBOOT} -r ${ITB_UBOOT} -v ${ARG_VER_UBOOT}
+			${MKIMAGE} -f ${ITS_UBOOT} -k ${KEY_DIR} -K ${UBOOT_DTB} -E -p ${OFFS_DATA} -r ${ITB_UBOOT} -v ${ARG_VER_UBOOT}
 			echo "## Adding RSA public key into ${UBOOT_DTB}"
 		fi
 
 		# Pack
-		${MKIMAGE} -f ${ITS_UBOOT} -k ${KEY_DIR} -K ${SPL_DTB} -E -p ${OFFS_S_UBOOT} -r ${ITB_UBOOT} -v ${ARG_VER_UBOOT}
+		${MKIMAGE} -f ${ITS_UBOOT} -k ${KEY_DIR} -K ${SPL_DTB} -E -p ${OFFS_DATA} -r ${ITB_UBOOT} -v ${ARG_VER_UBOOT}
 		mv ${SIG_BIN} ${SIG_UBOOT}
 
 		# burn-key-hash
@@ -361,7 +356,7 @@ function fit_gen_boot_itb()
 	fi
 
 	if [ "${ARG_SIGN}" != "y" ]; then
-		${MKIMAGE} -f ${ITS_BOOT} -E -p ${OFFS_NS_BOOT} ${ITB_BOOT} -v ${ARG_VER_BOOT}
+		${MKIMAGE} -f ${ITS_BOOT} -E -p ${OFFS_DATA} ${ITB_BOOT} -v ${ARG_VER_BOOT}
 	else
 		if [ ! -f ${RSA_PRI_KEY}  ]; then
 			echo "ERROR: No ${RSA_PRI_KEY}"
@@ -401,7 +396,7 @@ function fit_gen_boot_itb()
 			sed -i "s/rollback-index = ${VERSION}/rollback-index = <${ARG_ROLLBACK_IDX_BOOT}>;/g" ${ITS_BOOT}
 		fi
 
-		${MKIMAGE} -f ${ITS_BOOT} -k ${KEY_DIR} -K ${UBOOT_DTB} -E -p ${OFFS_S_BOOT} -r ${ITB_BOOT} -v ${ARG_VER_BOOT}
+		${MKIMAGE} -f ${ITS_BOOT} -k ${KEY_DIR} -K ${UBOOT_DTB} -E -p ${OFFS_DATA} -r ${ITB_BOOT} -v ${ARG_VER_BOOT}
 		mv ${SIG_BIN} ${SIG_BOOT}
 
 		# rollback-index read back check
@@ -449,7 +444,7 @@ function fit_gen_recovery_itb()
 	fi
 
 	if [ "${ARG_SIGN}" != "y" ]; then
-		${MKIMAGE} -f ${ITS_RECOVERY} -E -p ${OFFS_NS_RECOVERY} ${ITB_RECOVERY} -v ${ARG_VER_RECOVERY}
+		${MKIMAGE} -f ${ITS_RECOVERY} -E -p ${OFFS_DATA} ${ITB_RECOVERY} -v ${ARG_VER_RECOVERY}
 	else
 		if [ ! -f ${RSA_PRI_KEY}  ]; then
 			echo "ERROR: No ${RSA_PRI_KEY}"
@@ -489,7 +484,7 @@ function fit_gen_recovery_itb()
 			sed -i "s/rollback-index = ${VERSION}/rollback-index = <${ARG_ROLLBACK_IDX_RECOVERY}>;/g" ${ITS_RECOVERY}
 		fi
 
-		${MKIMAGE} -f ${ITS_RECOVERY} -k ${KEY_DIR} -K ${UBOOT_DTB} -E -p ${OFFS_S_RECOVERY} -r ${ITB_RECOVERY} -v ${ARG_VER_RECOVERY}
+		${MKIMAGE} -f ${ITS_RECOVERY} -k ${KEY_DIR} -K ${UBOOT_DTB} -E -p ${OFFS_DATA} -r ${ITB_RECOVERY} -v ${ARG_VER_RECOVERY}
 		mv ${SIG_BIN} ${SIG_RECOVERY}
 
 		# rollback-index read back check

commit 0f74a6513591085e1b74031a393a27006637e1fe
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Feb 2 17:01:05 2021 +0800

    spl: fit: get kernel fdt from index 1 of "fdt" property
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I27df8b231f3323725b0e03c01fe8d53d766ee592

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 018d749f87..2b5a0bc9fa 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -332,9 +332,11 @@ static int spl_fit_append_fdt(struct spl_image_info *spl_image,
 	 * kernel FDT is for U-Boot if there is not valid one
 	 * from images, ie: resource.img, boot.img or recovery.img.
 	 */
-	node = fdt_subnode_offset(fit, images, FIT_KERNEL_FDT_PROP);
-	if (node < 0)
+	node = spl_fit_get_image_node(fit, images, FIT_FDT_PROP, 1);
+	if (node < 0) {
+		debug("%s: cannot find FDT node\n", __func__);
 		return ret;
+	}
 
 	image_info.load_addr =
 		(ulong)spl_image->fdt_addr + fdt_totalsize(spl_image->fdt_addr);
diff --git a/include/image.h b/include/image.h
index de1b5cbf04..8258de42c3 100644
--- a/include/image.h
+++ b/include/image.h
@@ -933,7 +933,6 @@ int bootz_setup(ulong image, ulong *start, ulong *end);
 #define FIT_LOAD_PROP		"load"
 #define FIT_PRE_LOAD_PROP	"preload"
 #define FIT_ROLLBACK_PROP	"rollback-index"
-#define FIT_KERNEL_FDT_PROP	"kernel-fdt"
 
 /* configuration node */
 #define FIT_KERNEL_PROP		"kernel"

commit 4de9812423beee65c99756cf5388bd3c637d1c8a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 3 09:57:18 2021 +0800

    lib: optee client: add dependent for Kconfig option
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I9e475b1a8658dfc8d0d70dac0a8dd166a9e8d483

diff --git a/lib/optee_clientApi/Kconfig b/lib/optee_clientApi/Kconfig
index 2e61c40bf8..f17b7ceefd 100644
--- a/lib/optee_clientApi/Kconfig
+++ b/lib/optee_clientApi/Kconfig
@@ -8,6 +8,7 @@ config OPTEE_CLIENT
 
 config OPTEE_V1
 	bool "Support OPTEE version 1.0"
+	depends on OPTEE_CLIENT
 	help
 	  U-boot can communicate with trust if
 	  the config is enable. This function can
@@ -16,6 +17,7 @@ config OPTEE_V1
 
 config OPTEE_V2
 	bool "Support OPTEE version 2.0"
+	depends on OPTEE_CLIENT
 	help
 	  U-boot can communicate with trust if
 	  the config is enable. This function can
@@ -24,6 +26,7 @@ config OPTEE_V2
 
 config OPTEE_ALWAYS_USE_SECURITY_PARTITION
 	bool "Support use emmc security partition for OPTEE"
+	depends on OPTEE_CLIENT
 	help
 	  U-boot can secure store data to security partition
 	  for nand or emmc, do not to store data to rpmb.

commit f88031d0d884835969b931c5f029d8c9ab071d17
Author: David Wu <david.wu@rock-chips.com>
Date:   Fri Feb 26 17:33:36 2021 +0800

    arm: rockchip: rk3568: Add the compatible with gmac
    
    Change-Id: I364519a77c38d4f7219646a4ea86c1dc75df8362
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c
index 404d1921ae..daa9220a71 100644
--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
@@ -10,6 +10,7 @@
 #include <asm/arch/grf_rk3568.h>
 #include <asm/arch/rk_atags.h>
 #include <linux/libfdt.h>
+#include <fdt_support.h>
 #include <dt-bindings/clock/rk3568-cru.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -225,6 +226,12 @@ enum {
 	GPIO2B4_GMAC0_TXD1,
 	GPIO2B4_UART1_TXM0,
 
+	/* GRF_GPIO2C_IOMUX_L */
+	GPIO2C2_SHIFT		= 8,
+	GPIO2C2_MASK		= GENMASK(10, 8),
+	GPIO2C2_GPIO		= 0,
+	GPIO2C2_GMAC0_MCLKINOUT	= 2,
+
 	/* GRF_GPIO2C_IOMUX_H */
 	GPIO2C6_SHIFT		= 8,
 	GPIO2C6_MASK		= GENMASK(10, 8),
@@ -394,6 +401,14 @@ enum {
 	GPIO4A4_UART9_TXM2,
 	GPIO4A4_I2S2_LRCKTXM1,
 
+	/* GRF_GPIO4C_IOMUX_L */
+	GPIO4C1_SHIFT		= 4,
+	GPIO4C1_MASK		= GENMASK(6, 4),
+	GPIO4C1_GPIO		= 0,
+	GPIO4C1_CIF_CLKIN,
+	GPIO4C1_EBC_SDCLK,
+	GPIO4C1_GMAC1_MCLKINOUTM1,
+
 	/* GRF_GPIO4C_IOMUX_H */
 	GPIO4C6_SHIFT		= 8,
 	GPIO4C6_MASK		= GENMASK(10, 8),
@@ -926,6 +941,116 @@ int spl_fit_standalone_release(uintptr_t entry_point)
 #define RKVDEC_NORMAL_RATE_CNT_MIN     5
 #define RKVDEC_RATE_CNT_MIN     4
 
+#define GMAC0_NODE_FDT_PATH    "/ethernet@fe2a0000"
+#define GMAC1_NODE_FDT_PATH    "/ethernet@fe010000"
+
+#define GMAC0_CLKIN_NODE_FDT_PATH "/external-gmac0-clock"
+#define GMAC1_CLKIN_NODE_FDT_PATH "/external-gmac1-clock"
+
+#define GMAC1M0_MIIM_PINCTRL_PATH "/pinctrl/gmac1/gmac1m0-miim"
+
+static int rk3568_board_fdt_fixup_ethernet(const void *blob, int id)
+{
+	int gmac_node, clkin_node, miim_node, len;
+	const char *gmac_path, *clkin_path;
+	void *fdt = (void *)gd->fdt_blob;
+	u32 phandle, *pp;
+
+	/* get the gmac node and clockin node path at DTB */
+	if (id == 1) {
+		gmac_path = GMAC1_NODE_FDT_PATH;
+		clkin_path = GMAC1_CLKIN_NODE_FDT_PATH;
+	} else {
+		gmac_path = GMAC0_NODE_FDT_PATH;
+		clkin_path = GMAC0_CLKIN_NODE_FDT_PATH;
+	}
+
+	gmac_node = fdt_path_offset(gd->fdt_blob, gmac_path);
+	if (gmac_node < 0)
+		return 0;
+
+	/* only fixes the RGMII clock input mode for gmac node */
+	if (fdt_stringlist_search(fdt, gmac_node,
+				  "status", "disabled") >= 0) {
+		if (fdt_stringlist_search(fdt, gmac_node,
+					  "phy-mode", "rgmii") >= 0) {
+			if (fdt_stringlist_search(fdt, gmac_node,
+						  "clock_in_out", "output") >= 0) {
+				struct rk3568_grf *grf = (void *)GRF_BASE;
+
+				clkin_node = fdt_path_offset(fdt, clkin_path);
+				if (clkin_node < 0)
+					return 0;
+				phandle = fdt_get_phandle(blob, clkin_node);
+				if (!phandle)
+					return 0;
+				/*
+				 * before fixed:
+				 *	assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>;
+				 * after fixed:
+				 *	assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&gmac_clkin 0>;
+				 */
+				pp = (u32 *)fdt_getprop(blob, gmac_node,
+							"assigned-clock-parents",
+							&len);
+				if (!pp)
+					return 0;
+				if ((len / 8) >= 2) {
+					pp[2] = cpu_to_fdt32(phandle);
+					pp[3] = cpu_to_fdt32(0);
+				}
+
+				/*
+				 * before fixed:
+				 *	clock_in_out = "output";
+				 * after fixed:
+				 *	clock_in_out = "input";
+				 */
+
+				do_fixup_by_path(fdt, gmac_path, "clock_in_out",
+						 "input", 6, 0);
+				/*
+				 * set gmac_clkinout pin iomux for rgmii
+				 * input mode.
+				 */
+				if (!id) {
+					rk_clrsetreg(&grf->gpio2c_iomux_l,
+						     GPIO2C2_MASK,
+						     GPIO2C2_GMAC0_MCLKINOUT << GPIO2C2_SHIFT);
+				} else {
+					/*
+					 * get the miim pins phandle to check
+					 * m0 or m1 for gmac1_clkinout.
+					 */
+					miim_node = fdt_path_offset(fdt,
+								    GMAC1M0_MIIM_PINCTRL_PATH);
+					if (miim_node < 0)
+						goto gmac1_mclkinoutm1;
+					phandle = fdt_get_phandle(blob, miim_node);
+					if (!phandle)
+						goto gmac1_mclkinoutm1;
+
+					pp = (u32 *)fdt_getprop(blob, gmac_node, "pinctrl-0", &len);
+					if (!pp)
+						goto gmac1_mclkinoutm1;
+					if (pp[0] == cpu_to_fdt32(phandle)) {
+						rk_clrsetreg(&grf->gpio3c_iomux_l,
+							     GPIO3C0_MASK,
+							     GPIO3C0_GMAC1_MCLKINOUTM0 << GPIO3C0_SHIFT);
+						return 0;
+					}
+gmac1_mclkinoutm1:
+					rk_clrsetreg(&grf->gpio4c_iomux_l,
+						     GPIO4C1_MASK,
+						     GPIO4C1_GMAC1_MCLKINOUTM1 << GPIO4C1_SHIFT);
+				}
+			}
+		}
+	}
+
+	return 0;
+}
+
 int rk_board_fdt_fixup(const void *blob)
 {
 	int node, len;
@@ -993,5 +1118,8 @@ int rk_board_fdt_fixup(const void *blob)
 		pp[3] = cpu_to_fdt32(400000000);
 	}
 
+	rk3568_board_fdt_fixup_ethernet(blob, 0);
+	rk3568_board_fdt_fixup_ethernet(blob, 1);
+
 	return 0;
 }

commit bf4a120065ade3dba0b4e1a59fb7a1d4d547f119
Author: Weiwen Chen <cww@rock-chips.com>
Date:   Fri Mar 5 18:40:52 2021 +0800

    configs: rv1126-spi-nor-tiny: remove crypto
    
    Signed-off-by: Weiwen Chen <cww@rock-chips.com>
    Change-Id: Iac52dac930498e4142d9b1bd84c69f369c3b5380

diff --git a/configs/rv1126-spi-nor-tiny_defconfig b/configs/rv1126-spi-nor-tiny_defconfig
index a652cf8036..c652de2c13 100644
--- a/configs/rv1126-spi-nor-tiny_defconfig
+++ b/configs/rv1126-spi-nor-tiny_defconfig
@@ -27,10 +27,8 @@ CONFIG_DEBUG_UART=y
 CONFIG_ANDROID_BOOT_IMAGE=y
 CONFIG_FIT=y
 CONFIG_FIT_IMAGE_POST_PROCESS=y
-CONFIG_FIT_HW_CRYPTO=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
-CONFIG_SPL_FIT_HW_CRYPTO=y
 CONFIG_SPL_FIT_IMAGE_KB=256
 CONFIG_SPL_FIT_IMAGE_MULTIPLE=1
 # CONFIG_SPL_SYS_DCACHE_OFF is not set
@@ -42,7 +40,6 @@ CONFIG_SPL_BOARD_INIT=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
 CONFIG_SPL_SHA256_SUPPORT=y
-CONFIG_SPL_CRYPTO_SUPPORT=y
 CONFIG_SPL_HASH_SUPPORT=y
 CONFIG_SPL_MTD_SUPPORT=y
 CONFIG_MTD_BLK_U_BOOT_OFFS=0x200
@@ -82,12 +79,8 @@ CONFIG_SYSCON=y
 CONFIG_SPL_SYSCON=y
 CONFIG_CLK=y
 CONFIG_SPL_CLK=y
-CONFIG_DM_CRYPTO=y
-CONFIG_SPL_DM_CRYPTO=y
 # CONFIG_ROCKCHIP_RSA is not set
 # CONFIG_SPL_ROCKCHIP_RSA is not set
-CONFIG_ROCKCHIP_CRYPTO_V2=y
-CONFIG_SPL_ROCKCHIP_CRYPTO_V2=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y

commit 362b1be1673decde03f1626c45e1dbd93bb2dab6
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Mar 5 15:47:43 2021 +0800

    drivers: rkflash: Support new spiflash
    
    1.spinand: MX35UF1GE4AC, MX35UF2GE4AC, GD5F4GQ6RExxG, GD5F4GQ6UExxG,
    XT26G01C, XT26G04C, BWJX08K-2Gb, XT26G02C
    2.spinor: GD25Q128E, GD25Q256E, GD25Q256B, GD25LQ32E, GD25LQ32E,
    W25Q32JW, MX25U3232F, MX25U6432F, MX25U12832F, MX25U25645GZ4I,,
    XT25F32BS, XT25F16BS, P25Q64H, P25Q128H, P25Q16H, FM25Q64A, FM25M64C,
    FM25M4AA, DS25M4AB
    
    Change-Id: Iee16c4a5cf4687c99db993b6d8635f849e58a2e7
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/sfc_nand.c b/drivers/rkflash/sfc_nand.c
index 263a9674c2..a212c29eaa 100644
--- a/drivers/rkflash/sfc_nand.c
+++ b/drivers/rkflash/sfc_nand.c
@@ -21,6 +21,7 @@ static u32 sfc_nand_get_ecc_status3(void);
 static u32 sfc_nand_get_ecc_status4(void);
 static u32 sfc_nand_get_ecc_status5(void);
 static u32 sfc_nand_get_ecc_status6(void);
+static u32 sfc_nand_get_ecc_status7(void);
 
 static struct nand_info spi_nand_tbl[] = {
 	/* TC58CVG0S0HxAIx */
@@ -41,9 +42,11 @@ static struct nand_info spi_nand_tbl[] = {
 	/* MX35LF2GE4AD */
 	{ 0xC2, 0x26, 0x00, 4, 0x40, 1, 2048, 0x0C, 19, 0x8, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
 	/* MX35LF4GE4AD */
-	{ 0xC2, 0x37, 0x00, 8, 0x40, 1, 2048, 0x0C, 19, 0x8, 1, { 0x04, 0x08, 0x14, 0x18 }, &sfc_nand_get_ecc_status0 },
-	/* MT29F1G01ZAC */
-	{ 0x2C, 0x12, 0x00, 4, 0x40, 1, 1024, 0x00, 18, 0x1, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
+	{ 0xC2, 0x37, 0x00, 8, 0x40, 1, 2048, 0x0C, 20, 0x8, 1, { 0x04, 0x08, 0x14, 0x18 }, &sfc_nand_get_ecc_status0 },
+	/* MX35UF1GE4AC */
+	{ 0xC2, 0x92, 0x00, 4, 0x40, 1, 1024, 0x0C, 18, 0x4, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
+	/* MX35UF2GE4AC */
+	{ 0xC2, 0xA2, 0x00, 4, 0x40, 1, 2048, 0x0C, 19, 0x4, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
 
 	/* GD5F1GQ4UAYIG */
 	{ 0xC8, 0xF1, 0x00, 4, 0x40, 1, 1024, 0x0C, 18, 0x8, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
@@ -57,6 +60,10 @@ static struct nand_info spi_nand_tbl[] = {
 	{ 0xC8, 0x52, 0x00, 4, 0x40, 1, 2048, 0x4C, 19, 0x4, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status2 },
 	/* GD5F1GQ4R */
 	{ 0xC8, 0xC1, 0x00, 4, 0x40, 1, 1024, 0x0C, 18, 0x8, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status3 },
+	/* GD5F4GQ6RExxG 1*4096 */
+	{ 0xC8, 0x45, 0x00, 4, 0x40, 2, 2048, 0x4C, 20, 0x4, 1, { 0x04, 0x08, 0X14, 0x18 }, &sfc_nand_get_ecc_status2 },
+	/* GD5F4GQ6UExxG 1*4096 */
+	{ 0xC8, 0x55, 0x00, 4, 0x40, 2, 2048, 0x4C, 20, 0x4, 1, { 0x04, 0x08, 0X14, 0x18 }, &sfc_nand_get_ecc_status2 },
 
 	/* W25N01GV */
 	{ 0xEF, 0xAA, 0x21, 4, 0x40, 1, 1024, 0x4C, 18, 0x1, 0, { 0x04, 0x14, 0x24, 0xFF }, &sfc_nand_get_ecc_status1 },
@@ -104,17 +111,23 @@ static struct nand_info spi_nand_tbl[] = {
 	{ 0xD5, 0x03, 0x00, 8, 0x40, 1, 2048, 0x4C, 20, 0x8, 1, { 0x04, 0x28, 0x08, 0x2C }, &sfc_nand_get_ecc_status0 },
 
 	/* XT26G02A */
-	{ 0x0B, 0xE2, 0x00, 4, 0x40, 1, 2048, 0x4C, 19, 0x1, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status4 },
+	{ 0x0B, 0xE2, 0x00, 4, 0x40, 1, 2048, 0x4C, 19, 0x8, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status4 },
 	/* XT26G01A */
-	{ 0x0B, 0xE1, 0x00, 4, 0x40, 1, 1024, 0x4C, 18, 0x1, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status4 },
+	{ 0x0B, 0xE1, 0x00, 4, 0x40, 1, 1024, 0x4C, 18, 0x8, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status4 },
 	/* XT26G04A */
-	{ 0x0B, 0xE3, 0x00, 4, 0x80, 1, 2048, 0x4C, 20, 0x1, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status4 },
+	{ 0x0B, 0xE3, 0x00, 4, 0x80, 1, 2048, 0x4C, 20, 0x8, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status4 },
 	/* XT26G01B */
-	{ 0x0B, 0xF1, 0x00, 4, 0x40, 1, 1024, 0x4C, 18, 0x1, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status4 },
+	{ 0x0B, 0xF1, 0x00, 4, 0x40, 1, 1024, 0x4C, 18, 0x8, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status4 },
 	/* XT26G02B */
-	{ 0x0B, 0xF2, 0x00, 4, 0x40, 1, 2048, 0x4C, 19, 0x1, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status5 },
-
-	/* MT29F2G1ABA, XT26G02E, F50L2G41XA */
+	{ 0x0B, 0xF2, 0x00, 4, 0x40, 1, 2048, 0x4C, 19, 0x4, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status5 },
+	/* XT26G01C */
+	{ 0x0B, 0x11, 0x00, 4, 0x40, 1, 1024, 0x4C, 18, 0x8, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status7 },
+	/* XT26G02C */
+	{ 0x0B, 0x12, 0x00, 4, 0x40, 1, 2048, 0x4C, 19, 0x8, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status7 },
+	/* XT26G04C */
+	{ 0x0B, 0x13, 0x00, 8, 0x40, 1, 2048, 0x4C, 20, 0x8, 1, { 0x04, 0x08, 0x0C, 0x10 }, &sfc_nand_get_ecc_status7 },
+
+	/* MT29F2G01ABA, XT26G02E, F50L2G41XA */
 	{ 0x2C, 0x24, 0x00, 4, 0x40, 2, 1024, 0x4C, 19, 0x1, 1, { 0x20, 0x24, 0xFF, 0xFF }, &sfc_nand_get_ecc_status6 },
 
 	/* FM25S01 */
@@ -130,6 +143,8 @@ static struct nand_info spi_nand_tbl[] = {
 	{ 0xC8, 0x01, 0x00, 4, 0x40, 1, 1024, 0x4C, 18, 0x1, 0, { 0x14, 0x24, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
 	/* ATO25D1GA */
 	{ 0x9B, 0x12, 0x00, 4, 0x40, 1, 1024, 0x40, 18, 0x1, 1, { 0x14, 0x24, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
+	/* BWJX08K-2Gb */
+	{ 0xBC, 0xB3, 0x00, 4, 0x40, 1, 2048, 0x4C, 19, 0x8, 1, { 0x04, 0x10, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
 };
 
 static struct nand_info *p_nand_info;
@@ -263,7 +278,7 @@ static int sfc_nand_wait_busy(u8 *data, int timeout)
  * 0b01, Bit errors were detected and corrected.
  * 0b10, Multiple bit errors were detected and not corrected.
  * 0b11, Bits errors were detected and corrected, bit error count
- *	exceed the bit flip detection threshold
+ *	reach the bit flip detection threshold
  */
 static u32 sfc_nand_get_ecc_status0(void)
 {
@@ -569,6 +584,49 @@ static u32 sfc_nand_get_ecc_status6(void)
 	return ret;
 }
 
+/*
+ * ecc spectial type7:
+ * ecc bits: 0xC0[4,7]
+ * [0b0000], No bit errors were detected;
+ * [0b0001, 0b0111], 1-7 Bit errors were detected and corrected. Not
+ *	reach Flipping Bits;
+ * [0b1000], 8 Bit errors were detected and corrected. Bit error count
+ * 	equals the bit flip detectionthreshold;
+ * [0b1111], Bit errors greater than ECC capability(8 bits) and not corrected;
+ * others, Reserved.
+ */
+static u32 sfc_nand_get_ecc_status7(void)
+{
+	u32 ret;
+	u32 i;
+	u8 ecc;
+	u8 status;
+	u32 timeout = 1000 * 1000;
+
+	for (i = 0; i < timeout; i++) {
+		ret = sfc_nand_read_feature(0xC0, &status);
+
+		if (ret != SFC_OK)
+			return SFC_NAND_ECC_ERROR;
+
+		if (!(status & (1 << 0)))
+			break;
+
+		sfc_delay(1);
+	}
+
+	ecc = (status >> 4) & 0xf;
+
+	if (ecc < 7)
+		ret = SFC_NAND_ECC_OK;
+	else if (ecc == 7 || ecc == 8)
+		ret = SFC_NAND_ECC_REFRESH;
+	else
+		ret = (u32)SFC_NAND_ECC_ERROR;
+
+	return ret;
+}
+
 u32 sfc_nand_erase_block(u8 cs, u32 addr)
 {
 	int ret;
diff --git a/drivers/rkflash/sfc_nor.c b/drivers/rkflash/sfc_nor.c
index 17b1a1bc47..a934f27741 100644
--- a/drivers/rkflash/sfc_nor.c
+++ b/drivers/rkflash/sfc_nor.c
@@ -16,21 +16,29 @@ static struct flash_info spi_flash_tbl[] = {
 	{ 0xc84016, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 13, 9, 0 },
 	/* GD25Q64B */
 	{ 0xc84017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 14, 9, 0 },
-	/* GD25Q127C and GD25Q128C*/
+	/* GD25Q127C and GD25Q128C/E */
 	{ 0xc84018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 9, 0 },
-	/* GD25Q256B/C/D */
+	/* GD25Q256B/C/D/E */
 	{ 0xc84019, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x1C, 16, 6, 0 },
 	/* GD25Q512MC */
-	{ 0xc84020, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x3C, 17, 6, 0 },
+	{ 0xc84020, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x1C, 17, 6, 0 },
+	/* GD25LQ64C */
+	{ 0xc86017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 14, 9, 0 },
+	/* GD25LQ32E */
+	{ 0xc86016, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 13, 9, 0 },
 	/* GD25B512MEYIG */
-	{ 0xc8471A, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x3C, 17, 0, 0 },
+	{ 0xc8471A, 128, 8, 0x13, 0x12, 0x6C, 0x34, 0x21, 0xDC, 0x1C, 17, 0, 0 },
 
+	/* W25Q32JV */
+	{ 0xef4016, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 13, 9, 0 },
 	/* W25Q64JVSSIQ */
 	{ 0xef4017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0 },
 	/* W25Q128FV and W25Q128JV*/
 	{ 0xef4018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 9, 0 },
 	/* W25Q256F/J */
 	{ 0xef4019, 128, 8, 0x13, 0x02, 0x6C, 0x32, 0x20, 0xD8, 0x3C, 16, 9, 0 },
+	/* W25Q32JW */
+	{ 0xef6016, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 13, 9, 0 },
 	/* W25Q256JWEQ*/
 	{ 0xef6019, 128, 8, 0x13, 0x02, 0x6C, 0x32, 0x20, 0xD8, 0x3C, 16, 9, 0 },
 	/* W25Q64FWSSIG */
@@ -46,12 +54,20 @@ static struct flash_info spi_flash_tbl[] = {
 	{ 0xc22017, 128, 8, 0x03, 0x02, 0x6B, 0x38, 0x20, 0xD8, 0x0E, 14, 6, 0 },
 	/* MX25L12835E/F MX25L12833FMI-10G */
 	{ 0xc22018, 128, 8, 0x03, 0x02, 0x6B, 0x38, 0x20, 0xD8, 0x0E, 15, 6, 0 },
-	/* MX25L25635E/F MX25L25645G MX25L25645GMI-08G*/
-	{ 0xc22019, 128, 8, 0x13, 0x12, 0x6C, 0x38, 0x21, 0xDC, 0x3E, 16, 6, 0 },
+	/* MX25L25635E/F MX25L25645G MX25L25645GMI-08G */
+	{ 0xc22019, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x1E, 16, 6, 0 },
 	/* MX25L51245GMI */
-	{ 0xc2201a, 128, 8, 0x13, 0x12, 0x6C, 0x38, 0x21, 0xDC, 0x3E, 17, 6, 0 },
+	{ 0xc2201a, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x1E, 17, 6, 0 },
 	/* MX25U51245G */
 	{ 0xc2253a, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x1E, 17, 6, 0 },
+	/* MX25U3232F */
+	{ 0xc22536, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0E, 13, 6, 0 },
+	/* MX25U6432F */
+	{ 0xc22537, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0E, 14, 6, 0 },
+	/* MX25U12832F */
+	{ 0xc22538, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0E, 15, 6, 0 },
+	/* MX25U25645GZ4I-00 */
+	{ 0xc22539, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x1E, 16, 6, 0 },
 
 	/* XM25QH32C */
 	{ 0x204016, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 13, 9, 0 },
@@ -72,6 +88,10 @@ static struct flash_info spi_flash_tbl[] = {
 	{ 0x0b4018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 15, 9, 0 },
 	/* XT25F256BSFIGU */
 	{ 0x0b4019, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 16, 9, 0 },
+	/* XT25F32BS */
+	{ 0x0b4016, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 13, 9, 0 },
+	/* XT25F16BS */
+	{ 0x0b4015, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 12, 9, 0 },
 
 	/* EN25QH64A */
 	{ 0x1c7017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 0, 0 },
@@ -86,6 +106,17 @@ static struct flash_info spi_flash_tbl[] = {
 	/* EN25QH256A */
 	{ 0x1c7019, 128, 8, 0x13, 0x12, 0x6C, 0x34, 0x21, 0xDC, 0x3C, 16, 0, 0 },
 
+	/* P25Q64H */
+	{ 0x856017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0 },
+	/* P25Q128H */
+	{ 0x856018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 9, 0 },
+	/* P25Q16H-SUH-IT */
+	{ 0x856015, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 12, 9, 0 },
+	/* FM25Q64A */
+	{ 0xf83217, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 14, 9, 0 },
+	/* FM25M64C */
+	{ 0xf84317, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 14, 9, 0 },
+
 	/* ZB25VQ64 */
 	{ 0x5e4017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0 },
 	/* ZB25VQ128 */
@@ -97,6 +128,7 @@ static struct flash_info spi_flash_tbl[] = {
 	{ 0x684018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 9, 0 },
 	/* BH25Q64BS */
 	{ 0x684017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0 },
+
 	/* P25Q64H */
 	{ 0x856017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0 },
 	/* P25Q32SH-SSH-IT */
@@ -109,6 +141,10 @@ static struct flash_info spi_flash_tbl[] = {
 
 	/* FM25Q64A */
 	{ 0xf83217, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 14, 9, 0 },
+	/* FM25M4AA */
+	{ 0xf84218, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 15, 9, 0 },
+	/* DS25M4AB-1AIB4 */
+	{ 0xe54218, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 9, 0 },
 };
 
 static int snor_write_en(void)

commit fc8db7dcba99b82860f42f440587363b5ca9a570
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Mar 5 14:32:21 2021 +0800

    rkflash: Support F59L2G81KA and F59L4G81KA
    
    Change-Id: Iad6d7d56f591004db6dbc497249cba3e8e4a3f87
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/flash.c b/drivers/rkflash/flash.c
index 36d00f68ce..3a15aa78a5 100644
--- a/drivers/rkflash/flash.c
+++ b/drivers/rkflash/flash.c
@@ -447,7 +447,8 @@ u32 nandc_flash_init(void __iomem *nandc_addr)
 			    id_byte[0][1] != 0x95 &&
 			    id_byte[0][1] != 0xDC &&
 			    id_byte[0][1] != 0xD3 &&
-			    id_byte[0][1] != 0x48)
+			    id_byte[0][1] != 0x48 &&
+			    id_byte[0][1] != 0x6A)
 				return FTL_UNSUPPORTED_FLASH;
 		}
 	}
@@ -463,7 +464,8 @@ u32 nandc_flash_init(void __iomem *nandc_addr)
 		    (id_byte[0][0] == 0xC2 && id_byte[0][3] == 0xA2)) {
 			nand_para.plane_per_die = 2;
 			nand_para.sec_per_page = 8;
-		} else if (id_byte[0][0] == 0x98 && id_byte[0][3] == 0x26) {
+		} else if ((id_byte[0][0] == 0x98 && id_byte[0][3] == 0x26) ||
+			   (id_byte[0][0] == 0xC8 && ((id_byte[0][3] & 0x3) == 1))) {
 			nand_para.blk_per_plane = 1024;
 			nand_para.sec_per_page = 8;
 			nand_para.plane_per_die = 2;

commit 415ed02b36e045a6c767da1d596a1c602f906662
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Tue Mar 2 18:13:06 2021 +0800

    cmd: crypto: add DES/AES/SM4/HASH/HMAC/RSA perf case
    
    Change-Id: I87ce9d0eb0f14586beb286f8a60a6d4b734f2e7a
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/cmd/crypto.c b/cmd/crypto.c
index af624e7762..1e34bde1fa 100644
--- a/cmd/crypto.c
+++ b/cmd/crypto.c
@@ -13,6 +13,11 @@
 #include <u-boot/sha512.h>
 #include <rockchip/crypto_fix_test_data.h>
 
+#define PERF_TOTAL_SIZE			(128 * 1024 * 1024)
+#define PERF_BUFF_SIZE			(4 * 1024 * 1024)
+
+#define CALC_RATE_MPBS(bytes, ms)	(((bytes) / 1024) / (ms))
+
 struct hash_test_data {
 	const char	*algo_name;
 	const char	*mode_name;
@@ -176,8 +181,15 @@ const struct cipher_test_data cipher_data_set[] = {
 
 const struct rsa_test_data rsa_data_set[] = {
 #if CONFIG_IS_ENABLED(ROCKCHIP_RSA)
+
+#ifdef CONFIG_ROCKCHIP_CRYPTO_V1
 	RSA_TEST(2048, rsa2048_n, rsa2048_e, rsa2048_c, rsa2048_d,
 		 rsa2048_sign_in, rsa2048_sign_out),
+#else
+	RSA_TEST(4096, rsa4096_n, rsa4096_e, NULL, rsa4096_d,
+		 rsa4096_sign_in, rsa4096_sign_out),
+#endif
+
 #else
 	EMPTY_TEST(),
 #endif
@@ -196,13 +208,30 @@ static void dump_hex(const char *name, const u8 *array, u32 len)
 	printf("\n");
 }
 
-static inline void check_result(const char *algo_name, const char *mode_name,
-				const char *crypt,
-				const u8 *expect, const u8 *actual, u32 len)
+static inline void print_result_MBps(const char *algo_name,
+				     const char *mode_name,
+				     const char *crypt, ulong MBps,
+				     const u8 *expect, const u8 *actual,
+				     u32 len)
 {
 	if (memcmp(expect, actual, len) == 0) {
-		printf("[%s] %-8s%-8s PASS\n",
+		printf("[%s] %-8s%-8s PASS    (%luMBps)\n",
+		       algo_name, mode_name, crypt, MBps);
+	} else {
+		printf("[%s] %-8s%-8s FAIL\n",
 		       algo_name, mode_name, crypt);
+		dump_hex("expect", expect, len);
+		dump_hex("actual", actual, len);
+	}
+}
+
+static inline void print_result_ms(const char *algo_name, const char *mode_name,
+				   const char *crypt, ulong time_cost,
+				   const u8 *expect, const u8 *actual, u32 len)
+{
+	if (memcmp(expect, actual, len) == 0) {
+		printf("[%s] %-8s%-8s PASS    (%lums)\n",
+		       algo_name, mode_name, crypt, time_cost);
 	} else {
 		printf("[%s] %-8s%-8s FAIL\n",
 		       algo_name, mode_name, crypt);
@@ -211,6 +240,113 @@ static inline void check_result(const char *algo_name, const char *mode_name,
 	}
 }
 
+int test_hash_perf(struct udevice *dev, u32 algo,
+		   const u8 *key, u32 key_len, ulong *MBps)
+{
+	u32 total_size = PERF_TOTAL_SIZE;
+	u32 data_size = PERF_BUFF_SIZE;
+	sha_context ctx;
+	u8 *data = NULL;
+	u8 hash_out[64];
+	int ret, i;
+
+	*MBps = 0;
+
+	ctx.algo = algo;
+	ctx.length = total_size;
+
+	data = (u8 *)memalign(CONFIG_SYS_CACHELINE_SIZE, data_size);
+	if (!data) {
+		printf("%s, %d: memalign %u error!\n",
+		       __func__, __LINE__, data_size);
+		return -EINVAL;
+	}
+
+	memset(data, 0xab, data_size);
+
+	ulong start = get_timer(0);
+
+	if (key)
+		ret = crypto_hmac_init(dev, &ctx, (u8 *)key, key_len);
+	else
+		ret = crypto_sha_init(dev, &ctx);
+
+	if (ret) {
+		printf("crypto_sha_init error ret = %d!\n", ret);
+		goto exit;
+	}
+
+	for (i = 0; i < total_size / data_size; i++) {
+		ret = crypto_sha_update(dev, (u32 *)data, data_size);
+		if (ret) {
+			printf("crypto_sha_update error!\n");
+			goto exit;
+		}
+	}
+
+	ret = crypto_sha_final(dev, &ctx, hash_out);
+	if (ret) {
+		printf("crypto_sha_final error ret = %d!\n", ret);
+		goto exit;
+	}
+
+	ulong time_cost = get_timer(start);
+
+	*MBps = CALC_RATE_MPBS(total_size, time_cost);
+
+exit:
+	free(data);
+
+	return ret;
+}
+
+int test_cipher_perf(struct udevice *dev, cipher_context *ctx,
+		     ulong *MBps, bool enc)
+{
+	u32 total_size = PERF_TOTAL_SIZE;
+	u32 data_size = PERF_BUFF_SIZE;
+	u8 *plain = NULL, *cipher = NULL;
+	int ret, i;
+
+	*MBps = 0;
+
+	plain = (u8 *)memalign(CONFIG_SYS_CACHELINE_SIZE, data_size);
+	if (!plain) {
+		printf("%s, %d: memalign %u error!\n",
+		       __func__, __LINE__, data_size);
+		return -EINVAL;
+	}
+
+	cipher = (u8 *)memalign(CONFIG_SYS_CACHELINE_SIZE, data_size);
+	if (!cipher) {
+		printf("%s, %d: memalign %u error!\n",
+		       __func__, __LINE__, data_size);
+		free(plain);
+		return -EINVAL;
+	}
+
+	memset(plain, 0xab, data_size);
+
+	ulong start = get_timer(0);
+
+	for (i = 0; i < total_size / data_size; i++) {
+		ret = crypto_cipher(dev, ctx, plain, cipher, data_size, enc);
+		if (ret) {
+			printf("crypto_aes error!\n");
+			goto exit;
+		}
+	}
+
+	ulong time_cost = get_timer(start);
+
+	*MBps = CALC_RATE_MPBS(total_size, time_cost);
+exit:
+	free(plain);
+	free(cipher);
+
+	return ret;
+}
+
 int test_hash_result(void)
 {
 	const struct hash_test_data *test_data = NULL;
@@ -263,8 +399,13 @@ int test_hash_result(void)
 			}
 		}
 
-		check_result(test_data->algo_name, test_data->mode_name,
-			     "", test_data->hash, out, test_data->hash_len);
+		ulong MBps = 0;
+
+		test_hash_perf(dev, test_data->algo,
+			       test_data->key, test_data->key_len, &MBps);
+		print_result_MBps(test_data->algo_name, test_data->mode_name,
+				  "", MBps, test_data->hash, out,
+				  test_data->hash_len);
 		printf("+++++++++++++++++++++++++++++++++++++++++++++++++++\n");
 	}
 
@@ -310,23 +451,29 @@ int test_cipher_result(void)
 		ctx.iv      = test_data->iv;
 		ctx.iv_len  = test_data->iv_len;
 
+		ulong MBps = 0;
+
+		test_cipher_perf(dev, &ctx, &MBps, true);
+
 		ret = crypto_cipher(dev, &ctx, test_data->plain,
 				    out, test_data->plain_len, true);
 		if (ret)
 			goto error;
 
-		check_result(test_data->algo_name, test_data->mode_name,
-			     "encrypt", test_data->cipher, out,
-			     test_data->cipher_len);
+		print_result_MBps(test_data->algo_name, test_data->mode_name,
+				  "encrypt", MBps, test_data->cipher, out,
+				  test_data->cipher_len);
+
+		test_cipher_perf(dev, &ctx, &MBps, false);
 
 		ret = crypto_cipher(dev, &ctx, test_data->cipher,
 				    out, test_data->cipher_len, false);
 		if (ret)
 			goto error;
 
-		check_result(test_data->algo_name, test_data->mode_name,
-			     "decrypt", test_data->plain, out,
-			     test_data->plain_len);
+		print_result_MBps(test_data->algo_name, test_data->mode_name,
+				  "decrypt", MBps, test_data->plain, out,
+				  test_data->plain_len);
 		printf("+++++++++++++++++++++++++++++++++++++++++++++++++++\n");
 	}
 	return 0;
@@ -341,6 +488,7 @@ int test_rsa_result(void)
 	const struct rsa_test_data *test_data = NULL;
 	u8 *hard_out = NULL, *e_tmp;
 	u32 data_size = 4096 / 8;
+	ulong start, time_cost;
 	struct udevice *dev;
 	rsa_key rsa_key;
 	int ret, i;
@@ -383,16 +531,17 @@ int test_rsa_result(void)
 		rsa_key.c = (u32 *)test_data->c;
 #endif
 
+		start = get_timer(0);
 		ret = crypto_rsa_verify(dev, &rsa_key,
 					(u8 *)test_data->sign_in, hard_out);
 		if (ret) {
 			printf("sign test error, ret = %d\n", ret);
 			goto error;
 		}
-
-		check_result(test_data->algo_name, test_data->mode_name,
-			     "sign", test_data->sign_out,
-			     hard_out, test_data->n_len);
+		time_cost = get_timer(start);
+		print_result_ms(test_data->algo_name, test_data->mode_name,
+				"sign", time_cost, test_data->sign_out,
+				hard_out, test_data->n_len);
 
 		/* verify test */
 		memset(&rsa_key, 0x00, sizeof(rsa_key));
@@ -405,16 +554,18 @@ int test_rsa_result(void)
 		rsa_key.c = (u32 *)test_data->c;
 #endif
 
+		start = get_timer(0);
 		ret = crypto_rsa_verify(dev, &rsa_key,
 					(u8 *)test_data->sign_out, hard_out);
 		if (ret) {
 			printf("verify test error, ret = %d\n", ret);
 			goto error;
 		}
+		time_cost = get_timer(start);
 
-		check_result(test_data->algo_name, test_data->mode_name,
-			     "verify", test_data->sign_in,
-			     hard_out, test_data->n_len);
+		print_result_ms(test_data->algo_name, test_data->mode_name,
+				"verify", time_cost, test_data->sign_in,
+				hard_out, test_data->n_len);
 
 		printf("+++++++++++++++++++++++++++++++++++++++++++++++++++\n");
 	}
diff --git a/include/rockchip/crypto_fix_test_data.h b/include/rockchip/crypto_fix_test_data.h
index 03cfb7834d..898db36eb2 100644
--- a/include/rockchip/crypto_fix_test_data.h
+++ b/include/rockchip/crypto_fix_test_data.h
@@ -703,6 +703,7 @@ const u8 hmac_sm3[] = {
 
 #if CONFIG_IS_ENABLED(ROCKCHIP_RSA)
 
+#ifdef CONFIG_ROCKCHIP_CRYPTO_V1
 const u8 rsa2048_n[] = {
 0x4d, 0xcf, 0xbf, 0x13, 0xf2, 0x45, 0xa6, 0xe4,
 0x45, 0x0c, 0x12, 0x51, 0x1e, 0xe3, 0x2f, 0xfa,
@@ -742,41 +743,6 @@ const u8 rsa2048_e[] = {
 0x01, 0x00, 0x01
 };
 
-const u8 rsa2048_c[] = {
-0x5f, 0x2f, 0xd1, 0xa1, 0x85, 0x3b, 0x07, 0xd3,
-0xf2, 0x93, 0x21, 0xcc, 0x28, 0xfb, 0x80, 0x0a,
-0xc1, 0x52, 0x83, 0xbf, 0x6d, 0xea, 0x4f, 0x54,
-0x74, 0x2f, 0x58, 0xcc, 0xef, 0x37, 0x3b, 0x8c,
-0xe3, 0x5a, 0xa4, 0x81, 0x77, 0x9a, 0x0b, 0x72,
-0xb5, 0x58, 0x36, 0xf3, 0x17, 0x80, 0x47, 0x90,
-0xb3, 0x8c, 0x18, 0xb3, 0x2e, 0x15, 0xd4, 0xf0,
-0x71, 0xf2, 0x6f, 0x3e, 0xfd, 0x51, 0xf7, 0xc4,
-0xb0, 0x60, 0x06, 0xb8, 0x47, 0x12, 0x89, 0x5f,
-0xfd, 0x2b, 0xb5, 0x2c, 0x25, 0x10, 0x5f, 0xac,
-0x88, 0x6a, 0xb5, 0xd7, 0x1c, 0x44, 0x53, 0x04,
-0x87, 0x88, 0xd0, 0xae, 0x3d, 0xc0, 0x59, 0x1e,
-0xc5, 0x99, 0x56, 0x00, 0x2b, 0x5a, 0x9d, 0xce,
-0x17, 0xa1, 0x85, 0xd6, 0xff, 0x07, 0x91, 0x2d,
-0x7b, 0xe3, 0x6e, 0xc5, 0x21, 0xb0, 0xd0, 0x5e,
-0xa8, 0x3c, 0xee, 0xa9, 0xbd, 0x43, 0x50, 0xde,
-0xe2, 0xa4, 0x94, 0xb1, 0x10, 0x20, 0x55, 0x81,
-0xa8, 0xcf, 0x24, 0x10, 0x65, 0xe2, 0x80, 0xd6,
-0x08, 0xf4, 0xf9, 0xeb, 0xae, 0xde, 0xbb, 0xcb,
-0xa2, 0x2f, 0x04, 0x15, 0x0b, 0xed, 0xcd, 0x4d,
-0xca, 0xf8, 0x61, 0x46, 0xf5, 0xd6, 0xcb, 0x60,
-0x86, 0x4c, 0x16, 0x7e, 0x7c, 0x1f, 0x53, 0xb7,
-0x92, 0xff, 0xd2, 0x35, 0xcf, 0xa6, 0xf5, 0xfc,
-0x75, 0xf5, 0x1e, 0x1a, 0xd4, 0x68, 0xa6, 0x58,
-0x4d, 0x63, 0xf5, 0xbf, 0x05, 0xdc, 0x67, 0xd1,
-0xdc, 0xed, 0x08, 0x9d, 0x75, 0xe3, 0xb5, 0x2f,
-0xad, 0x32, 0xd5, 0xce, 0xb7, 0x03, 0xfb, 0xfd,
-0xb9, 0x49, 0xec, 0x40, 0xe5, 0x76, 0x01, 0xc5,
-0xcf, 0xc6, 0x07, 0xc3, 0x03, 0xee, 0xbc, 0x92,
-0xf8, 0xdc, 0x76, 0xd8, 0x99, 0x11, 0xd5, 0x1e,
-0x02, 0x7a, 0xca, 0x0e, 0x60, 0x58, 0x4e, 0xc1,
-0x0e, 0x35, 0x27, 0xec, 0xaa, 0x31, 0x97, 0x19,
-};
-
 const u8 rsa2048_d[] = {
 0x21, 0x36, 0x36, 0x52, 0x38, 0x04, 0x00, 0xbd,
 0xae, 0xb8, 0x5b, 0x13, 0xcc, 0xb6, 0xbb, 0x48,
@@ -812,6 +778,41 @@ const u8 rsa2048_d[] = {
 0x36, 0x22, 0x90, 0x19, 0x0a, 0xf2, 0x54, 0x51,
 };
 
+const u8 rsa2048_c[] = {
+0x5f, 0x2f, 0xd1, 0xa1, 0x85, 0x3b, 0x07, 0xd3,
+0xf2, 0x93, 0x21, 0xcc, 0x28, 0xfb, 0x80, 0x0a,
+0xc1, 0x52, 0x83, 0xbf, 0x6d, 0xea, 0x4f, 0x54,
+0x74, 0x2f, 0x58, 0xcc, 0xef, 0x37, 0x3b, 0x8c,
+0xe3, 0x5a, 0xa4, 0x81, 0x77, 0x9a, 0x0b, 0x72,
+0xb5, 0x58, 0x36, 0xf3, 0x17, 0x80, 0x47, 0x90,
+0xb3, 0x8c, 0x18, 0xb3, 0x2e, 0x15, 0xd4, 0xf0,
+0x71, 0xf2, 0x6f, 0x3e, 0xfd, 0x51, 0xf7, 0xc4,
+0xb0, 0x60, 0x06, 0xb8, 0x47, 0x12, 0x89, 0x5f,
+0xfd, 0x2b, 0xb5, 0x2c, 0x25, 0x10, 0x5f, 0xac,
+0x88, 0x6a, 0xb5, 0xd7, 0x1c, 0x44, 0x53, 0x04,
+0x87, 0x88, 0xd0, 0xae, 0x3d, 0xc0, 0x59, 0x1e,
+0xc5, 0x99, 0x56, 0x00, 0x2b, 0x5a, 0x9d, 0xce,
+0x17, 0xa1, 0x85, 0xd6, 0xff, 0x07, 0x91, 0x2d,
+0x7b, 0xe3, 0x6e, 0xc5, 0x21, 0xb0, 0xd0, 0x5e,
+0xa8, 0x3c, 0xee, 0xa9, 0xbd, 0x43, 0x50, 0xde,
+0xe2, 0xa4, 0x94, 0xb1, 0x10, 0x20, 0x55, 0x81,
+0xa8, 0xcf, 0x24, 0x10, 0x65, 0xe2, 0x80, 0xd6,
+0x08, 0xf4, 0xf9, 0xeb, 0xae, 0xde, 0xbb, 0xcb,
+0xa2, 0x2f, 0x04, 0x15, 0x0b, 0xed, 0xcd, 0x4d,
+0xca, 0xf8, 0x61, 0x46, 0xf5, 0xd6, 0xcb, 0x60,
+0x86, 0x4c, 0x16, 0x7e, 0x7c, 0x1f, 0x53, 0xb7,
+0x92, 0xff, 0xd2, 0x35, 0xcf, 0xa6, 0xf5, 0xfc,
+0x75, 0xf5, 0x1e, 0x1a, 0xd4, 0x68, 0xa6, 0x58,
+0x4d, 0x63, 0xf5, 0xbf, 0x05, 0xdc, 0x67, 0xd1,
+0xdc, 0xed, 0x08, 0x9d, 0x75, 0xe3, 0xb5, 0x2f,
+0xad, 0x32, 0xd5, 0xce, 0xb7, 0x03, 0xfb, 0xfd,
+0xb9, 0x49, 0xec, 0x40, 0xe5, 0x76, 0x01, 0xc5,
+0xcf, 0xc6, 0x07, 0xc3, 0x03, 0xee, 0xbc, 0x92,
+0xf8, 0xdc, 0x76, 0xd8, 0x99, 0x11, 0xd5, 0x1e,
+0x02, 0x7a, 0xca, 0x0e, 0x60, 0x58, 0x4e, 0xc1,
+0x0e, 0x35, 0x27, 0xec, 0xaa, 0x31, 0x97, 0x19,
+};
+
 const u8 rsa2048_sign_in[] = {
 0x21, 0x5b, 0x61, 0xed, 0xff, 0xe7, 0xc1, 0x8c,
 0x80, 0xa7, 0xad, 0xd7, 0x1b, 0xa1, 0x20, 0xc6,
@@ -882,6 +883,282 @@ const u8 rsa2048_sign_out[] = {
 0x22, 0xff, 0x60, 0x1a, 0xa5, 0x71, 0x0c, 0x00,
 };
 
+#else
+
+const u8 rsa4096_n[] = {
+0x3f, 0xcf, 0x76, 0x36, 0x21, 0x95, 0x0a, 0xbb,
+0x82, 0xb9, 0x3a, 0xa5, 0x3c, 0x4f, 0x5b, 0xc8,
+0xaf, 0x59, 0xea, 0x02, 0x32, 0x74, 0x64, 0x8f,
+0xc6, 0x26, 0x67, 0xf8, 0x1d, 0x85, 0x80, 0xa8,
+0xe1, 0xa9, 0xeb, 0xfe, 0xce, 0x14, 0xfa, 0x1e,
+0x59, 0x70, 0x81, 0xbd, 0x3e, 0x59, 0x67, 0x2e,
+0x41, 0xe2, 0xd8, 0xfc, 0x52, 0x39, 0x8e, 0xa1,
+0x13, 0x14, 0x9c, 0x6a, 0x65, 0x3b, 0xbf, 0x97,
+0x38, 0x11, 0xa6, 0x0c, 0x10, 0x0d, 0xb1, 0xb1,
+0xf2, 0x52, 0xbe, 0xfd, 0x73, 0x69, 0x92, 0x00,
+0x79, 0xc9, 0x5c, 0x26, 0x8f, 0x02, 0xa0, 0xda,
+0x3c, 0x45, 0x80, 0x9f, 0x0f, 0xa3, 0x8f, 0x1f,
+0xb7, 0x79, 0x22, 0xfc, 0x15, 0x1b, 0x17, 0x42,
+0xee, 0xa8, 0x5e, 0x8e, 0xc0, 0x5a, 0xe9, 0xc1,
+0xdd, 0xfd, 0x04, 0xdf, 0x59, 0x49, 0xeb, 0xce,
+0x09, 0x42, 0x4b, 0x03, 0xa5, 0x4c, 0x3f, 0x4c,
+0xb4, 0x7b, 0x0a, 0x5b, 0x32, 0xbf, 0x6f, 0xf8,
+0x0d, 0x80, 0x86, 0x33, 0x9a, 0x85, 0xaa, 0x4a,
+0xf2, 0xe0, 0x78, 0x80, 0x47, 0x64, 0x7f, 0xc6,
+0xbd, 0x85, 0xf4, 0x6a, 0xb7, 0x7a, 0xa8, 0xb5,
+0x8c, 0x34, 0x5a, 0x0c, 0x28, 0x3d, 0x63, 0xa9,
+0xb0, 0xa6, 0x3a, 0x10, 0x83, 0x2c, 0x99, 0x1f,
+0x41, 0xe8, 0x98, 0x4e, 0x38, 0xb9, 0xde, 0x40,
+0x7a, 0x34, 0x47, 0xff, 0x68, 0xf6, 0x19, 0x65,
+0x04, 0xd7, 0xdd, 0x15, 0xee, 0x9c, 0x4d, 0x2d,
+0x37, 0x46, 0xc8, 0x94, 0x42, 0x7b, 0x16, 0xfd,
+0x15, 0x99, 0x3f, 0x71, 0x12, 0x02, 0x32, 0xf4,
+0xac, 0xca, 0x02, 0x7d, 0x30, 0x83, 0xac, 0xce,
+0x0f, 0xe6, 0x10, 0xd9, 0x7d, 0x09, 0x7b, 0x8e,
+0xfe, 0x67, 0x77, 0x62, 0xb3, 0x92, 0x04, 0x0a,
+0xce, 0xa6, 0xd2, 0xd4, 0x41, 0x8f, 0x76, 0xef,
+0x88, 0x1b, 0x74, 0xae, 0xd4, 0xca, 0x56, 0x59,
+0x3d, 0x14, 0x75, 0xe3, 0xcf, 0x20, 0xa8, 0x0b,
+0x00, 0x33, 0x59, 0xa0, 0xdc, 0x5f, 0x8b, 0x3e,
+0x17, 0x3b, 0xfd, 0xdb, 0x79, 0x84, 0x19, 0xa5,
+0x47, 0x77, 0x77, 0xe1, 0xe9, 0xbd, 0xc8, 0x80,
+0x79, 0x64, 0x9f, 0x01, 0xe1, 0x5e, 0x37, 0xb8,
+0xf0, 0x91, 0x88, 0x0f, 0x7f, 0xcf, 0x98, 0x96,
+0xd0, 0xb9, 0x96, 0x71, 0xda, 0x60, 0xb8, 0xfb,
+0xa4, 0x7d, 0xa6, 0x8d, 0x67, 0x56, 0x70, 0xd2,
+0x56, 0x2e, 0x2a, 0xee, 0x46, 0x46, 0xce, 0xc5,
+0xf6, 0x19, 0x49, 0xd5, 0x9b, 0x24, 0x04, 0xdd,
+0xdc, 0xb2, 0x19, 0x18, 0x5f, 0x72, 0x52, 0x74,
+0xe6, 0xa3, 0x54, 0x11, 0x36, 0x2c, 0x4a, 0x71,
+0xac, 0x4c, 0x3d, 0x14, 0xd5, 0x70, 0xbb, 0x3c,
+0x71, 0x29, 0x71, 0xba, 0xaa, 0x89, 0x44, 0x2b,
+0xb4, 0x5b, 0xfe, 0x65, 0x54, 0x56, 0x0b, 0x7e,
+0x54, 0x87, 0x7a, 0x13, 0xb7, 0xcd, 0xc1, 0x6f,
+0xff, 0x54, 0x59, 0x6a, 0x14, 0x8d, 0x71, 0x2b,
+0x37, 0xa4, 0x0b, 0x51, 0x11, 0xeb, 0xe9, 0x09,
+0xce, 0x20, 0x93, 0xe0, 0x84, 0xb2, 0x06, 0xf6,
+0x0e, 0xc8, 0x90, 0xc1, 0x3f, 0x23, 0x30, 0x1d,
+0xfa, 0x75, 0x5a, 0x18, 0x2c, 0x5e, 0x7a, 0x53,
+0xb9, 0xfb, 0xee, 0xcf, 0x11, 0x93, 0x6d, 0xdb,
+0x88, 0x41, 0xc0, 0x6c, 0x75, 0xb5, 0xb8, 0x07,
+0xae, 0x67, 0xc3, 0x4c, 0x33, 0x80, 0x04, 0x8c,
+0x12, 0xca, 0x3b, 0x67, 0xa8, 0x73, 0xa1, 0x3f,
+0xd2, 0xe9, 0xe2, 0xe9, 0xbd, 0xaa, 0x4e, 0x25,
+0x12, 0x43, 0xcb, 0x75, 0x41, 0x7e, 0x15, 0x05,
+0xea, 0x31, 0x21, 0x0b, 0x07, 0xd4, 0xe5, 0x4c,
+0xe9, 0x81, 0xb5, 0x9f, 0x44, 0x3d, 0xfa, 0x0b,
+0xef, 0xff, 0xee, 0x4a, 0x9d, 0xa4, 0x5c, 0x8d,
+0x61, 0xf6, 0xd8, 0x49, 0xd7, 0x30, 0x06, 0x5c,
+0x19, 0x77, 0x2c, 0x66, 0x2f, 0x20, 0xfe, 0x5c,
+};
+
+const u8 rsa4096_e[] = {
+0x01, 0x00, 0x01
+};
+
+const u8 rsa4096_d[] = {
+0xc1, 0x8d, 0x33, 0x92, 0x23, 0xd6, 0xf7, 0x22,
+0xb7, 0x9c, 0x59, 0x3f, 0xd7, 0x79, 0x40, 0xca,
+0x2a, 0x09, 0x61, 0x95, 0xd0, 0x66, 0xc4, 0xd3,
+0xb4, 0xd3, 0x87, 0x56, 0xac, 0xc5, 0xa7, 0xbc,
+0x5f, 0x8d, 0xcc, 0x0e, 0x23, 0xde, 0x68, 0xa2,
+0x35, 0x03, 0x9c, 0xfb, 0xe8, 0x5c, 0xfa, 0xf2,
+0xd8, 0xb5, 0x99, 0xf0, 0xf0, 0xd4, 0xf4, 0x9e,
+0xfb, 0x4c, 0x6a, 0x41, 0x9d, 0x01, 0xde, 0x22,
+0x61, 0xf9, 0xb7, 0x67, 0x2c, 0x29, 0xbd, 0x4f,
+0xa7, 0xa5, 0xe4, 0x90, 0xeb, 0xb4, 0x26, 0xea,
+0x3b, 0x9c, 0x7d, 0xe8, 0x69, 0xab, 0xbd, 0xa8,
+0xfd, 0x35, 0x98, 0x7d, 0x58, 0x20, 0x34, 0xe5,
+0x83, 0xc1, 0xd6, 0xf9, 0x1f, 0x04, 0x79, 0xd1,
+0x0a, 0x94, 0x2c, 0xe6, 0x77, 0xd1, 0xa8, 0x10,
+0x5c, 0x94, 0x68, 0xcb, 0x5e, 0x0c, 0x93, 0x5d,
+0xb2, 0x66, 0x88, 0xe1, 0xd2, 0xc3, 0x81, 0xcd,
+0xbf, 0xed, 0xde, 0xe2, 0x22, 0x3e, 0xe6, 0x6c,
+0x3c, 0x6f, 0x18, 0xc7, 0xf8, 0xf2, 0x50, 0x14,
+0x3c, 0x58, 0x51, 0x87, 0x7a, 0xff, 0x41, 0x7d,
+0xde, 0x44, 0x1e, 0x86, 0x61, 0xcf, 0xff, 0x84,
+0x37, 0xfa, 0xbf, 0xf8, 0xb2, 0xb6, 0xbe, 0x5c,
+0x51, 0xc7, 0x49, 0xbf, 0x02, 0x14, 0xe4, 0x7a,
+0xa8, 0x55, 0x91, 0x30, 0xae, 0x26, 0x2b, 0x9a,
+0x68, 0x98, 0xa4, 0x75, 0x4e, 0xfa, 0x7b, 0x38,
+0x62, 0xd2, 0x2b, 0x47, 0x59, 0x63, 0x2f, 0x11,
+0xb0, 0xa2, 0xf8, 0x37, 0xe0, 0xfe, 0x24, 0xd4,
+0x6a, 0xb5, 0x35, 0x03, 0xc3, 0x1b, 0x21, 0x37,
+0xe8, 0xe6, 0x71, 0x68, 0xc1, 0x2e, 0xd7, 0xec,
+0x7c, 0xbc, 0xd3, 0xf5, 0xdc, 0x83, 0xb4, 0xf1,
+0xf6, 0x67, 0xb2, 0xdd, 0xcf, 0x51, 0xf0, 0xb4,
+0xc5, 0xf7, 0xa2, 0x87, 0xc9, 0x56, 0xa0, 0xb3,
+0x78, 0xfa, 0x84, 0x45, 0x95, 0x35, 0xa6, 0x61,
+0x5d, 0x37, 0xe5, 0x7c, 0x9e, 0x39, 0xa8, 0x9b,
+0x47, 0xf3, 0xa9, 0x21, 0x62, 0xd1, 0x71, 0x6f,
+0xae, 0xad, 0x73, 0x4c, 0x0e, 0x98, 0x5f, 0x4f,
+0x48, 0x3b, 0x9b, 0x34, 0xa9, 0xf1, 0x1a, 0x84,
+0x20, 0x2a, 0x52, 0x08, 0xfd, 0x2d, 0x61, 0x05,
+0xbf, 0x12, 0xda, 0x5a, 0x0c, 0x6a, 0xae, 0x15,
+0x70, 0xa3, 0xb3, 0xe6, 0xd4, 0x17, 0x0e, 0xe9,
+0x1d, 0x3d, 0xb7, 0x4e, 0xfc, 0xe0, 0xee, 0x28,
+0xdc, 0x51, 0x27, 0x98, 0xa3, 0xad, 0xfe, 0xca,
+0x47, 0xa7, 0x43, 0x11, 0xf1, 0x0a, 0x38, 0x64,
+0xee, 0x3a, 0x1a, 0x50, 0xe5, 0x76, 0x5a, 0x79,
+0xee, 0xb2, 0x7a, 0x83, 0x65, 0xc9, 0x59, 0x32,
+0x31, 0x8c, 0x67, 0xce, 0xdb, 0x7e, 0x91, 0xac,
+0x6a, 0xce, 0x16, 0x79, 0x4c, 0x38, 0x00, 0x59,
+0x9f, 0x26, 0x43, 0xef, 0x4e, 0xda, 0xd8, 0x34,
+0x09, 0x7b, 0x6f, 0xf7, 0x0f, 0x73, 0xb3, 0x09,
+0x76, 0xd8, 0xb6, 0xc0, 0x72, 0xdd, 0x59, 0x7d,
+0x68, 0xb7, 0x18, 0x0e, 0xfa, 0x07, 0x01, 0x44,
+0xb5, 0x58, 0x58, 0x35, 0xac, 0x0d, 0xa0, 0x7e,
+0x98, 0x28, 0xf5, 0x57, 0xe3, 0xa0, 0x96, 0xfc,
+0xb7, 0x12, 0x6d, 0x02, 0x31, 0x8b, 0xc9, 0xce,
+0x7b, 0xc2, 0x20, 0x9d, 0x74, 0x84, 0x88, 0xf8,
+0xcb, 0xd0, 0x33, 0xb8, 0xbb, 0x60, 0x80, 0xf2,
+0xe7, 0x05, 0xd3, 0x62, 0x63, 0x24, 0x47, 0xa9,
+0x3b, 0xd0, 0x4c, 0x2c, 0xe2, 0x92, 0x49, 0x29,
+0xc4, 0x0c, 0x11, 0x14, 0x16, 0x60, 0x55, 0x28,
+0x0e, 0xac, 0xa3, 0x81, 0xcd, 0xc2, 0x8c, 0xbf,
+0xe9, 0x5b, 0x22, 0x2d, 0xe5, 0xe3, 0xff, 0x00,
+0xdb, 0x2c, 0xac, 0x7e, 0xbe, 0x4f, 0xa7, 0x62,
+0xa1, 0x86, 0x7c, 0x23, 0x13, 0xd7, 0x82, 0xc2,
+0xf4, 0xda, 0xe9, 0x59, 0xf0, 0x43, 0x30, 0x0b,
+0x2b, 0xf4, 0xd4, 0x91, 0x20, 0xa3, 0x56, 0x37,
+};
+
+const u8 rsa4096_sign_in[] = {
+0x21, 0x70, 0x7d, 0x26, 0x81, 0xcd, 0x27, 0x4c,
+0x71, 0xa0, 0xee, 0x37, 0xd0, 0xf8, 0x3f, 0x50,
+0x7e, 0xfb, 0x7c, 0x58, 0x99, 0x55, 0x01, 0x68,
+0x42, 0x91, 0x43, 0x11, 0x28, 0xec, 0x09, 0x80,
+0xa0, 0xe7, 0x03, 0x54, 0xe8, 0x4d, 0xa6, 0xe2,
+0x6e, 0xc7, 0xd7, 0x2f, 0x2a, 0x30, 0xf4, 0xc0,
+0x38, 0xab, 0xfb, 0x2b, 0x04, 0xb4, 0xd6, 0x76,
+0x9a, 0xc0, 0x6f, 0xdf, 0xba, 0x65, 0x0b, 0x2a,
+0xd9, 0x48, 0x9a, 0xad, 0x1e, 0xa3, 0x32, 0x98,
+0x58, 0xc4, 0xa5, 0x15, 0xf7, 0x12, 0xf7, 0xb2,
+0x06, 0x3e, 0xe7, 0x8f, 0x16, 0xc4, 0x18, 0xf8,
+0x33, 0x87, 0xc0, 0x77, 0x80, 0xb4, 0xe0, 0x3c,
+0xdb, 0xd7, 0x93, 0x5e, 0xbb, 0x55, 0x35, 0x59,
+0xd6, 0x3d, 0x70, 0x16, 0x3e, 0x90, 0x02, 0x82,
+0x8a, 0x56, 0xf3, 0x74, 0x46, 0x8c, 0xc8, 0x5e,
+0xe4, 0x8d, 0xa0, 0x5f, 0xde, 0x33, 0x1a, 0x94,
+0xef, 0xad, 0xe7, 0xba, 0x84, 0x11, 0x6d, 0x0c,
+0xc1, 0xda, 0xa5, 0xd9, 0x6a, 0x36, 0xcd, 0xb1,
+0x98, 0x41, 0x8d, 0xf6, 0x1c, 0x99, 0x73, 0x24,
+0xd7, 0x59, 0xca, 0x25, 0xc2, 0x24, 0xf2, 0x8e,
+0x3e, 0x77, 0x6c, 0x0a, 0x25, 0xf9, 0xbb, 0x6c,
+0xb7, 0xd3, 0x33, 0x29, 0x98, 0x66, 0xed, 0xb7,
+0x24, 0x9e, 0x72, 0xba, 0x0c, 0xcd, 0xb5, 0xb1,
+0x79, 0xfb, 0xf2, 0xf9, 0x90, 0x99, 0xea, 0xf2,
+0xa5, 0xa4, 0x07, 0x77, 0x3c, 0x91, 0xa8, 0x4c,
+0xf9, 0x49, 0x00, 0xde, 0x24, 0x34, 0x8f, 0xcb,
+0x57, 0x37, 0xc5, 0x02, 0xa5, 0x08, 0x7d, 0x74,
+0x14, 0xdb, 0x19, 0xf6, 0xa0, 0xa0, 0x8e, 0xf4,
+0x4d, 0x54, 0xb4, 0x3e, 0xf0, 0xd3, 0x4e, 0x21,
+0x90, 0x57, 0x3a, 0xb3, 0xc0, 0x3b, 0x8f, 0x4d,
+0x25, 0x95, 0x54, 0x9c, 0x6d, 0x24, 0xe8, 0x8a,
+0x65, 0x86, 0x7a, 0x61, 0xe4, 0x25, 0xe2, 0x0d,
+0xa5, 0xba, 0xdc, 0x2d, 0x4d, 0xc1, 0xbb, 0x71,
+0x2f, 0xdf, 0xc3, 0xa5, 0x05, 0x13, 0xd8, 0xa3,
+0x39, 0xa0, 0xd0, 0xad, 0x21, 0x36, 0xbd, 0xc4,
+0xc6, 0xcc, 0xb2, 0x00, 0xe4, 0x7a, 0xe2, 0x5e,
+0x5c, 0x57, 0x6a, 0x03, 0xed, 0x83, 0x52, 0x95,
+0x58, 0x56, 0x64, 0xe6, 0x32, 0xbc, 0xc2, 0x40,
+0xd7, 0x6a, 0x48, 0x7a, 0x0a, 0x15, 0x55, 0x28,
+0xe1, 0x6b, 0xb1, 0x4d, 0x49, 0x85, 0x9d, 0x31,
+0x7b, 0x0a, 0xde, 0x66, 0x9b, 0x50, 0x36, 0x1f,
+0xb4, 0xe0, 0x22, 0xb6, 0xff, 0x8d, 0xa3, 0xa6,
+0x92, 0x57, 0xe0, 0xd5, 0x88, 0xde, 0xd0, 0x7d,
+0xaf, 0xf8, 0x54, 0x1e, 0x2f, 0x0a, 0x40, 0x60,
+0x4f, 0xe8, 0xdd, 0xc0, 0x3c, 0x55, 0xbe, 0x9b,
+0x61, 0x11, 0x18, 0x8c, 0x0a, 0xd5, 0xcd, 0xfe,
+0xc3, 0xd0, 0xcf, 0x18, 0x6e, 0xd7, 0x85, 0xca,
+0x4e, 0x4d, 0x74, 0xb3, 0xb2, 0x27, 0xb9, 0xd2,
+0x8c, 0x5c, 0x1c, 0xce, 0xe2, 0x6c, 0x0c, 0x32,
+0xd7, 0xa3, 0xbd, 0xb6, 0x15, 0x3a, 0xc8, 0xec,
+0x2b, 0xa0, 0xb8, 0x09, 0xd6, 0x11, 0x20, 0xd0,
+0xf0, 0xc9, 0x26, 0xe6, 0x85, 0x5b, 0x2e, 0x59,
+0x79, 0x5c, 0xc7, 0x28, 0xd8, 0xb1, 0xf9, 0xba,
+0x93, 0x2b, 0xc1, 0x7d, 0x99, 0xab, 0x79, 0xc2,
+0x1f, 0x21, 0x0f, 0xb4, 0x9d, 0x95, 0x46, 0x4e,
+0x37, 0x42, 0xd2, 0xc7, 0x65, 0x24, 0x46, 0x22,
+0x9a, 0x66, 0x9b, 0x84, 0xeb, 0x66, 0x14, 0x0c,
+0x50, 0x61, 0xa0, 0xed, 0x1b, 0xd2, 0x75, 0x89,
+0x61, 0xc3, 0xbc, 0xec, 0x72, 0xa3, 0x59, 0xae,
+0xae, 0x6c, 0xe0, 0x8e, 0xcb, 0xf9, 0xe6, 0x8d,
+0x25, 0x9e, 0x9b, 0x15, 0x78, 0xe4, 0x19, 0xaf,
+0x26, 0xfa, 0xe8, 0x93, 0xb3, 0x9e, 0x51, 0x8b,
+0xca, 0xfd, 0xf6, 0x62, 0x82, 0xf4, 0x44, 0xa1,
+0x4c, 0x04, 0x1d, 0x74, 0x9e, 0xd8, 0x0e, 0x3c,
+};
+
+const u8 rsa4096_sign_out[] = {
+0x10, 0x8d, 0x29, 0xbd, 0x8e, 0xd3, 0x68, 0xd9,
+0x5d, 0xcd, 0x0f, 0x15, 0x8f, 0x4d, 0x76, 0xd8,
+0xeb, 0x17, 0xf1, 0x83, 0x9b, 0x5d, 0x3e, 0xad,
+0x60, 0x82, 0xd1, 0x15, 0x5e, 0xf3, 0xc6, 0x29,
+0x35, 0x23, 0x7e, 0x16, 0x1c, 0xec, 0xd8, 0x09,
+0x00, 0x9b, 0x96, 0xb1, 0x6b, 0x3e, 0x9b, 0x3d,
+0xdc, 0x02, 0x37, 0x67, 0x7c, 0x48, 0xcf, 0xc3,
+0x34, 0xd0, 0x03, 0x88, 0x33, 0x11, 0x9d, 0xaf,
+0x4f, 0x1a, 0xdc, 0x29, 0x6b, 0x94, 0xb6, 0x25,
+0xea, 0xaf, 0x10, 0x9e, 0xe6, 0xb1, 0x78, 0x32,
+0xd5, 0xc5, 0xbf, 0x8c, 0xd3, 0xc3, 0xfe, 0x25,
+0x9f, 0x18, 0xd0, 0xed, 0x81, 0x57, 0xa3, 0xa2,
+0xcb, 0x9a, 0xdd, 0x95, 0xf1, 0x6e, 0x92, 0x2b,
+0x86, 0x7b, 0x0a, 0x71, 0xe2, 0x7d, 0x7c, 0x02,
+0x58, 0x8c, 0x7a, 0xd9, 0x86, 0x8e, 0x8c, 0x17,
+0x7e, 0xd3, 0xe1, 0xab, 0x98, 0x07, 0xd8, 0x84,
+0x5a, 0x57, 0xa5, 0x46, 0x89, 0x32, 0x23, 0xd9,
+0xa4, 0x24, 0xe9, 0x15, 0xe4, 0xc8, 0x62, 0x2a,
+0xc6, 0x6c, 0x53, 0xbe, 0xc7, 0x31, 0x42, 0xd9,
+0x7b, 0xbd, 0x27, 0x19, 0x82, 0xd9, 0x77, 0x33,
+0xb0, 0x2f, 0x02, 0xb6, 0x17, 0x20, 0x58, 0x11,
+0x82, 0xe4, 0xe2, 0x33, 0x69, 0xe0, 0x58, 0x0c,
+0xdf, 0x47, 0x73, 0xce, 0xe7, 0xc4, 0x8a, 0xe2,
+0x68, 0x43, 0x22, 0x93, 0x6c, 0x98, 0x32, 0xe2,
+0xaa, 0xc6, 0x78, 0xeb, 0x33, 0x48, 0xba, 0x75,
+0x6a, 0xd7, 0x5f, 0x38, 0x82, 0x45, 0x07, 0x6c,
+0x0c, 0x9d, 0xdf, 0x63, 0xb3, 0x1f, 0x47, 0x16,
+0x3c, 0xfa, 0xf7, 0x25, 0x5b, 0x79, 0x4e, 0x41,
+0x51, 0xad, 0xa7, 0x89, 0x21, 0xba, 0x17, 0xc3,
+0x51, 0xa7, 0xbe, 0x64, 0x5b, 0x25, 0x77, 0x71,
+0xa5, 0x5e, 0x53, 0xf8, 0x40, 0xe6, 0xad, 0x79,
+0x73, 0x6a, 0x21, 0xd9, 0x1f, 0xdc, 0xd8, 0x53,
+0x0c, 0xd6, 0xd9, 0xf8, 0x43, 0xb3, 0x39, 0x50,
+0xcd, 0x2d, 0x97, 0x94, 0xec, 0x7a, 0x37, 0x2f,
+0x01, 0xda, 0x0d, 0x47, 0x1a, 0x63, 0xa1, 0xf2,
+0x69, 0x2e, 0x1a, 0x6c, 0x9c, 0xcf, 0xee, 0x89,
+0xc2, 0xdc, 0xbe, 0x82, 0x50, 0xa6, 0x12, 0xc8,
+0xaa, 0x89, 0x8c, 0x26, 0x86, 0xe3, 0x4b, 0x97,
+0xf8, 0x85, 0xc7, 0xa4, 0x5b, 0x8a, 0x3e, 0x2f,
+0xcd, 0x19, 0x39, 0xcb, 0xbb, 0xd8, 0xe0, 0x23,
+0x6b, 0x48, 0x2e, 0x6e, 0x99, 0x59, 0x60, 0x25,
+0xce, 0x49, 0x1f, 0x25, 0x77, 0xb5, 0xd8, 0xa6,
+0xcc, 0xc7, 0x06, 0x1a, 0x44, 0xde, 0x2c, 0xf4,
+0x96, 0x9b, 0xed, 0xc6, 0x10, 0x4a, 0x39, 0x32,
+0xed, 0x64, 0xae, 0xdb, 0x42, 0xdd, 0x42, 0x21,
+0x4b, 0xef, 0x2a, 0x52, 0x97, 0x25, 0x49, 0xf7,
+0xf1, 0x50, 0x21, 0xc1, 0x16, 0x62, 0xe2, 0x51,
+0x89, 0xce, 0x5a, 0xad, 0x41, 0xf2, 0x5b, 0xbb,
+0x50, 0x49, 0x9e, 0xfc, 0xa9, 0xe1, 0xde, 0x7d,
+0xe9, 0x24, 0x29, 0xab, 0x62, 0x54, 0xab, 0x85,
+0x95, 0x6b, 0xbb, 0x80, 0x4d, 0x2f, 0x30, 0xed,
+0xcc, 0x29, 0x8b, 0x72, 0xac, 0xe1, 0xf9, 0x4c,
+0x75, 0x50, 0x86, 0x21, 0x70, 0x0b, 0x03, 0xbd,
+0x51, 0x2e, 0x5f, 0xd4, 0x24, 0xd5, 0x0b, 0x1c,
+0x73, 0xa2, 0x22, 0xa8, 0x02, 0x35, 0x43, 0xf7,
+0x5b, 0x58, 0xd7, 0x27, 0x16, 0x94, 0x90, 0x5f,
+0x68, 0x1a, 0x2d, 0x6a, 0x8d, 0x29, 0x7c, 0xa7,
+0x96, 0x69, 0xac, 0xb9, 0xc8, 0x59, 0xa1, 0x5f,
+0x44, 0xf5, 0xa5, 0x5e, 0x93, 0xc3, 0xf2, 0x6d,
+0x10, 0xe3, 0x7e, 0x1a, 0x78, 0x5a, 0x93, 0x7d,
+0x2d, 0xca, 0xc8, 0x8d, 0x5e, 0x3e, 0x63, 0x09,
+0x2d, 0x30, 0x5e, 0xad, 0xe7, 0x3f, 0x7f, 0x13,
+0xe9, 0x0e, 0x4d, 0x01, 0x2f, 0x57, 0x26, 0x66,
+0x4c, 0x83, 0xd5, 0xa8, 0x0b, 0x4d, 0xf8, 0x19,
+};
+
+#endif
+
 #endif
 
 #endif

commit 495c8ff485bc8cfdba6b11a32566b33b6bb0c373
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Mon Mar 1 17:29:44 2021 +0800

    cmd: crypto: add DES/AES/SM4/HASH/HMAC/RSA test case
    
    Change-Id: Ic69b5ae792b75f3beb68b0133a206ffeec635d6c
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/cmd/crypto.c b/cmd/crypto.c
index 91903b3353..af624e7762 100644
--- a/cmd/crypto.c
+++ b/cmd/crypto.c
@@ -11,371 +11,451 @@
 #include <u-boot/sha1.h>
 #include <u-boot/sha256.h>
 #include <u-boot/sha512.h>
-
-#define HASH_PERF_EVAL(dev, algo)	hash_perf_eval(dev, algo, #algo)
-
-__cacheline_aligned static u8 foo_data[] = {
-	0x52, 0x53, 0x41, 0x4b, 0x00, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x00,
-	0xda, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xd5, 0xf2, 0xfc, 0xbb,
-	0x1a, 0x39, 0x61, 0xf5, 0x63, 0x7f, 0xa6, 0xeb, 0x5d, 0xc5, 0x22, 0xe2,
-	0x65, 0x03, 0xcc, 0x61, 0x92, 0x60, 0x4c, 0x5f, 0x4e, 0x81, 0x96, 0x3d,
-	0x89, 0x1d, 0xa3, 0x5c, 0xb7, 0x88, 0xc3, 0x75, 0xcd, 0x71, 0xf0, 0x16,
-	0x04, 0x5e, 0xef, 0x85, 0xdf, 0x30, 0x57, 0x7e, 0x06, 0x0d, 0x44, 0x3b,
-	0x80, 0x22, 0x41, 0xcd, 0xba, 0x40, 0xb5, 0xfa, 0xbe, 0x8f, 0xa9, 0x61,
-	0x4d, 0xc6, 0x2a, 0xd9, 0x96, 0x57, 0x57, 0xc6, 0xc0, 0x99, 0xc0, 0x94,
-	0x57, 0x21, 0x0a, 0xad, 0xde, 0x4c, 0xe1, 0xaa, 0x6e, 0x11, 0xc6, 0xeb,
-	0xa2, 0x09, 0x65, 0xd9, 0xd5, 0xc6, 0x8f, 0x8d, 0xb6, 0xec, 0xb3, 0xca,
-	0x29, 0xa4, 0x9f, 0xab, 0x90, 0x7e, 0xf2, 0x86, 0x92, 0x25, 0x71, 0xf4,
-	0x17, 0x70, 0x92, 0xe0, 0xd0, 0xe2, 0xe1, 0x57, 0xc4, 0xca, 0x44, 0xbb,
-	0x14, 0xdc, 0xf8, 0x1a, 0x27, 0x00, 0x8f, 0x30, 0xcd, 0x0a, 0x4a, 0x26,
-	0x42, 0x07, 0xa1, 0x1e, 0x69, 0x7e, 0xfd, 0xc4, 0x38, 0xf8, 0x53, 0xfe,
-	0xcd, 0xa7, 0xfc, 0x7d, 0xa1, 0x87, 0xe8, 0xec, 0x52, 0x01, 0x37, 0x43,
-	0x0c, 0xf2, 0x2e, 0x89, 0x3d, 0xaa, 0xed, 0x9d, 0x83, 0x13, 0x8f, 0x79,
-	0xec, 0xb3, 0x7f, 0xbe, 0xf9, 0x36, 0x99, 0x8d, 0x93, 0xc2, 0x4d, 0x8f,
-	0x8f, 0x18, 0x1e, 0x94, 0x25, 0xe7, 0x0b, 0xdc, 0xd9, 0x85, 0x88, 0x77,
-	0x7e, 0x25, 0x80, 0x10, 0xde, 0xb6, 0xdd, 0xe6, 0xb6, 0xba, 0xe9, 0x1d,
-	0xac, 0xd2, 0xd7, 0x1c, 0x8e, 0x86, 0x5e, 0xd1, 0xc0, 0x97, 0x59, 0x79,
-	0x7e, 0x1a, 0x96, 0x6a, 0xa1, 0x09, 0xc0, 0x45, 0xb0, 0x71, 0x2d, 0xd1,
-	0x87, 0x6f, 0xbe, 0x31, 0x21, 0xcb, 0x52, 0xde, 0x48, 0x41, 0x73, 0x7e,
-	0x4a, 0x2f, 0xf8, 0x95, 0x0c, 0x2d, 0xb4, 0x9d, 0x53, 0x70, 0xcd, 0xa5,
-	0x01, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0xa5, 0x0d, 0xc2, 0xc6, 0xf1, 0x08, 0x95, 0x55,
-	0x1d, 0xb3, 0xf9, 0x43, 0xb0, 0x7b, 0x5b, 0x96, 0xa0, 0x72, 0xe8, 0xd6,
-	0x95, 0xd6, 0x98, 0xec, 0x53, 0x6b, 0x85, 0x77, 0x74, 0x21, 0xf1, 0x22,
-	0x5c, 0x4d, 0x56, 0x55, 0x89, 0x0d, 0x60, 0xa5, 0x2b, 0x68, 0xf8, 0x71,
-	0x6d, 0x72, 0xed, 0x67, 0x55, 0x3e, 0x5f, 0xd1, 0x9e, 0x21, 0xa7, 0x6e,
-	0x5c, 0xf2, 0xac, 0xe8, 0x66, 0x1d, 0x4e, 0xe5, 0x58, 0x76, 0xed, 0x2b,
-	0xfe, 0x2b, 0xc9, 0xf6, 0x7f, 0xb7, 0x02, 0x27, 0xfd, 0x25, 0x3f, 0x2d,
-	0x7c, 0x1c, 0x37, 0x80, 0x29, 0x7f, 0x12, 0xd2, 0xd5, 0xae, 0x27, 0xc6,
-	0x68, 0x24, 0x83, 0xc5, 0x61, 0x8b, 0xea, 0x1a, 0xbd, 0x07, 0x96, 0xe4,
-	0xd1, 0xc5, 0xd4, 0x21, 0x39, 0x4a, 0xaa, 0x66, 0xd2, 0x3f, 0xd2, 0x67,
-	0x55, 0x39, 0xbf, 0x40, 0x66, 0x66, 0x5a, 0x92, 0xdd, 0x8d, 0xda, 0x5a,
-	0x89, 0x7e, 0x78, 0xd9, 0x5f, 0x42, 0xe4, 0x16, 0xdb, 0x76, 0x49, 0xe0,
-	0x71, 0x98, 0x8e, 0xed, 0x61, 0xd9, 0x63, 0x0a, 0x11, 0xf6, 0x24, 0x7f,
-	0x9b, 0xf2, 0xee, 0xfc, 0xa4, 0x4c, 0x98, 0x81, 0xfb, 0x2d, 0xd3, 0x8f,
-	0x29, 0x77, 0x63, 0xd9, 0x51, 0xfc, 0xe1, 0x17, 0x3f, 0xc3, 0xce, 0xca,
-	0xbe, 0xec, 0xf2, 0xc9, 0x07, 0x48, 0x74, 0x54, 0xbb, 0x1d, 0x02, 0xe7,
-	0xaf, 0x18, 0x27, 0x39, 0xb8, 0xc4, 0x90, 0x05, 0x20, 0x5b, 0x38, 0x7b,
-	0x3a, 0x15, 0x94, 0x7e, 0xe8, 0xc1, 0xa5, 0x8c, 0xc0, 0x6c, 0x86, 0x96,
-	0xeb, 0x46, 0xfa, 0xad, 0x2e, 0x69, 0x12, 0x56, 0xb9, 0x51, 0x91, 0x9c,
-	0xea, 0x83, 0x4b, 0xd3, 0x5f, 0xb7, 0xdd, 0x29, 0x99, 0xb9, 0x66, 0x65,
-	0x5e, 0xe2, 0x59, 0x16, 0x20, 0xa2, 0xda, 0x0e, 0x8e, 0xd4, 0x41, 0xdc,
-	0x1e, 0x75, 0x32, 0xf8, 0x73, 0xfa, 0x22, 0x7b, 0x22, 0x7c, 0x7d, 0x9d,
-	0x03, 0x89, 0x54, 0x27, 0x8f, 0xbb, 0x12, 0xbb, 0x29, 0x0a, 0xe0, 0x41,
-	0x4e, 0x80, 0x1b, 0x3f, 0x9c, 0x6d, 0xc1, 0x79, 0xdb, 0x3c, 0xc4, 0xd2,
-	0x65, 0x99, 0xd7, 0x16, 0xff, 0xff, 0xff, 0xff, 0xd1, 0x95, 0x46, 0x66,
-	0x83, 0xe2, 0x1b, 0xd4, 0x35, 0x1f, 0x5d, 0xf2, 0x1e, 0xb5, 0x43, 0x22,
-	0xe4, 0x41, 0xe6, 0x6a, 0x46, 0x93, 0x24, 0x89, 0x1b, 0x74, 0x3c, 0xa0,
-	0x20, 0x3b, 0x4e, 0x64, 0xff, 0xff, 0xff, 0xff,
+#include <rockchip/crypto_fix_test_data.h>
+
+struct hash_test_data {
+	const char	*algo_name;
+	const char	*mode_name;
+	u32		algo;
+	const u8	*data;
+	u32		data_len;
+	const u8	*hash;
+	u32		hash_len;
+	const u8	*key;
+	u32		key_len;
 };
 
-#if CONFIG_IS_ENABLED(ROCKCHIP_RSA)
-
-static u8 rsa2048_n[] = {
-	0xd5, 0xf2, 0xfc, 0xbb, 0x1a, 0x39, 0x61, 0xf5, 0x63, 0x7f, 0xa6, 0xeb,
-	0x5d, 0xc5, 0x22, 0xe2, 0x65, 0x03, 0xcc, 0x61, 0x92, 0x60, 0x4c, 0x5f,
-	0x4e, 0x81, 0x96, 0x3d, 0x89, 0x1d, 0xa3, 0x5c, 0xb7, 0x88, 0xc3, 0x75,
-	0xcd, 0x71, 0xf0, 0x16, 0x04, 0x5e, 0xef, 0x85, 0xdf, 0x30, 0x57, 0x7e,
-	0x06, 0x0d, 0x44, 0x3b, 0x80, 0x22, 0x41, 0xcd, 0xba, 0x40, 0xb5, 0xfa,
-	0xbe, 0x8f, 0xa9, 0x61, 0x4d, 0xc6, 0x2a, 0xd9, 0x96, 0x57, 0x57, 0xc6,
-	0xc0, 0x99, 0xc0, 0x94, 0x57, 0x21, 0x0a, 0xad, 0xde, 0x4c, 0xe1, 0xaa,
-	0x6e, 0x11, 0xc6, 0xeb, 0xa2, 0x09, 0x65, 0xd9, 0xd5, 0xc6, 0x8f, 0x8d,
-	0xb6, 0xec, 0xb3, 0xca, 0x29, 0xa4, 0x9f, 0xab, 0x90, 0x7e, 0xf2, 0x86,
-	0x92, 0x25, 0x71, 0xf4, 0x17, 0x70, 0x92, 0xe0, 0xd0, 0xe2, 0xe1, 0x57,
-	0xc4, 0xca, 0x44, 0xbb, 0x14, 0xdc, 0xf8, 0x1a, 0x27, 0x00, 0x8f, 0x30,
-	0xcd, 0x0a, 0x4a, 0x26, 0x42, 0x07, 0xa1, 0x1e, 0x69, 0x7e, 0xfd, 0xc4,
-	0x38, 0xf8, 0x53, 0xfe, 0xcd, 0xa7, 0xfc, 0x7d, 0xa1, 0x87, 0xe8, 0xec,
-	0x52, 0x01, 0x37, 0x43, 0x0c, 0xf2, 0x2e, 0x89, 0x3d, 0xaa, 0xed, 0x9d,
-	0x83, 0x13, 0x8f, 0x79, 0xec, 0xb3, 0x7f, 0xbe, 0xf9, 0x36, 0x99, 0x8d,
-	0x93, 0xc2, 0x4d, 0x8f, 0x8f, 0x18, 0x1e, 0x94, 0x25, 0xe7, 0x0b, 0xdc,
-	0xd9, 0x85, 0x88, 0x77, 0x7e, 0x25, 0x80, 0x10, 0xde, 0xb6, 0xdd, 0xe6,
-	0xb6, 0xba, 0xe9, 0x1d, 0xac, 0xd2, 0xd7, 0x1c, 0x8e, 0x86, 0x5e, 0xd1,
-	0xc0, 0x97, 0x59, 0x79, 0x7e, 0x1a, 0x96, 0x6a, 0xa1, 0x09, 0xc0, 0x45,
-	0xb0, 0x71, 0x2d, 0xd1, 0x87, 0x6f, 0xbe, 0x31, 0x21, 0xcb, 0x52, 0xde,
-	0x48, 0x41, 0x73, 0x7e, 0x4a, 0x2f, 0xf8, 0x95, 0x0c, 0x2d, 0xb4, 0x9d,
-	0x53, 0x70, 0xcd, 0xa5,
+struct cipher_test_data {
+	const char	*algo_name;
+	const char	*mode_name;
+	u32		algo;
+	u32		mode;
+	const u8	*key;
+	const u8	*twk_key;
+	u32		key_len;
+	const u8	*iv;
+	u32		iv_len;
+	const u8	*plain;
+	u32		plain_len;
+	const u8	*cipher;
+	u32		cipher_len;
 };
 
-static u8 rsa2048_e[] = {
-	0x01, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00,
+struct rsa_test_data {
+	const char	*algo_name;
+	const char	*mode_name;
+	u32		algo;
+	const u8	*n;
+	u32		n_len;
+	const u8	*e;
+	u32		e_len;
+	const u8	*d;
+	u32		d_len;
+	const u8	*c;
+	u32		c_len;
+	const u8	*sign_in;
+	u32		sign_in_len;
+	const u8	*sign_out;
+	u32		sign_out_len;
 };
 
-#ifdef CONFIG_ROCKCHIP_CRYPTO_V1
-static u8 rsa2048_c[] = {
-	0xa5, 0x0d, 0xc2, 0xc6, 0xf1, 0x08, 0x95, 0x55, 0x1d, 0xb3, 0xf9, 0x43,
-	0xb0, 0x7b, 0x5b, 0x96, 0xa0, 0x72, 0xe8, 0xd6, 0x95, 0xd6, 0x98, 0xec,
-	0x53, 0x6b, 0x85, 0x77, 0x74, 0x21, 0xf1, 0x22, 0x5c, 0x4d, 0x56, 0x55,
-	0x89, 0x0d, 0x60, 0xa5, 0x2b, 0x68, 0xf8, 0x71, 0x6d, 0x72, 0xed, 0x67,
-	0x55, 0x3e, 0x5f, 0xd1, 0x9e, 0x21, 0xa7, 0x6e, 0x5c, 0xf2, 0xac, 0xe8,
-	0x66, 0x1d, 0x4e, 0xe5, 0x58, 0x76, 0xed, 0x2b, 0xfe, 0x2b, 0xc9, 0xf6,
-	0x7f, 0xb7, 0x02, 0x27, 0xfd, 0x25, 0x3f, 0x2d, 0x7c, 0x1c, 0x37, 0x80,
-	0x29, 0x7f, 0x12, 0xd2, 0xd5, 0xae, 0x27, 0xc6, 0x68, 0x24, 0x83, 0xc5,
-	0x61, 0x8b, 0xea, 0x1a, 0xbd, 0x07, 0x96, 0xe4, 0xd1, 0xc5, 0xd4, 0x21,
-	0x39, 0x4a, 0xaa, 0x66, 0xd2, 0x3f, 0xd2, 0x67, 0x55, 0x39, 0xbf, 0x40,
-	0x66, 0x66, 0x5a, 0x92, 0xdd, 0x8d, 0xda, 0x5a, 0x89, 0x7e, 0x78, 0xd9,
-	0x5f, 0x42, 0xe4, 0x16, 0xdb, 0x76, 0x49, 0xe0, 0x71, 0x98, 0x8e, 0xed,
-	0x61, 0xd9, 0x63, 0x0a, 0x11, 0xf6, 0x24, 0x7f, 0x9b, 0xf2, 0xee, 0xfc,
-	0xa4, 0x4c, 0x98, 0x81, 0xfb, 0x2d, 0xd3, 0x8f, 0x29, 0x77, 0x63, 0xd9,
-	0x51, 0xfc, 0xe1, 0x17, 0x3f, 0xc3, 0xce, 0xca, 0xbe, 0xec, 0xf2, 0xc9,
-	0x07, 0x48, 0x74, 0x54, 0xbb, 0x1d, 0x02, 0xe7, 0xaf, 0x18, 0x27, 0x39,
-	0xb8, 0xc4, 0x90, 0x05, 0x20, 0x5b, 0x38, 0x7b, 0x3a, 0x15, 0x94, 0x7e,
-	0xe8, 0xc1, 0xa5, 0x8c, 0xc0, 0x6c, 0x86, 0x96, 0xeb, 0x46, 0xfa, 0xad,
-	0x2e, 0x69, 0x12, 0x56, 0xb9, 0x51, 0x91, 0x9c, 0xea, 0x83, 0x4b, 0xd3,
-	0x5f, 0xb7, 0xdd, 0x29, 0x99, 0xb9, 0x66, 0x65, 0x5e, 0xe2, 0x59, 0x16,
-	0x20, 0xa2, 0xda, 0x0e, 0x8e, 0xd4, 0x41, 0xdc, 0x1e, 0x75, 0x32, 0xf8,
-	0x73, 0xfa, 0x22, 0x7b,
-};
+#define HASH_TEST(algo_type, data_in, hash_val) {\
+	.algo_name = "HASH", \
+	.mode_name = #algo_type, \
+	.algo      = CRYPTO_##algo_type, \
+	.data      = (data_in),\
+	.data_len  = sizeof(data_in), \
+	.hash      = (hash_val), \
+	.hash_len  = sizeof(hash_val) \
+}
+
+#define HMAC_TEST(algo_type, data_in, hash_val, hmac_key) {\
+	.algo_name = "HMAC", \
+	.mode_name = #algo_type, \
+	.algo      = CRYPTO_HMAC_##algo_type, \
+	.data      = (data_in),\
+	.data_len  = sizeof(data_in), \
+	.hash      = (hash_val), \
+	.hash_len  = sizeof(hash_val), \
+	.key       = (hmac_key), \
+	.key_len   = sizeof(hmac_key)\
+}
+
+#define CIPHER_XTS_TEST(algo_type, mode_type, key1, key2, iv_val, in, out) { \
+	.algo_name  = #algo_type, \
+	.mode_name  = #mode_type, \
+	.algo       = CRYPTO_##algo_type,\
+	.mode       = RK_MODE_##mode_type, \
+	.key        = (key1), \
+	.twk_key    = (key2), \
+	.key_len    = sizeof(key1), \
+	.iv         = (iv_val), \
+	.iv_len     = sizeof(iv_val), \
+	.plain      = (in), \
+	.plain_len  = sizeof(in), \
+	.cipher     = (out), \
+	.cipher_len = sizeof(out) \
+}
+
+#define CIPHER_TEST(algo, mode, key, iv, plain, cipher) \
+		CIPHER_XTS_TEST(algo, mode, key, NULL, iv, plain, cipher)
+
+#define RSA_TEST(nbits, bn, be, bc, bd, in, out) { \
+	.algo_name    = "RSA", \
+	.mode_name    = #nbits, \
+	.algo         = CRYPTO_RSA##nbits, \
+	.n            = (bn), \
+	.n_len        = sizeof(bn), \
+	.e            = (be), \
+	.e_len        = sizeof(be), \
+	.d            = (bd), \
+	.d_len        = sizeof(bd), \
+	.c            = (bc), \
+	.c_len        = sizeof(bc), \
+	.sign_in      = (in), \
+	.sign_in_len  = sizeof(in), \
+	.sign_out     = (out), \
+	.sign_out_len = sizeof(out) \
+}
+
+#define EMPTY_TEST() {}
+
+const struct hash_test_data hash_data_set[] = {
+	HASH_TEST(MD5,    foo_data, hash_md5),
+	HASH_TEST(SHA1,   foo_data, hash_sha1),
+	HASH_TEST(SHA256, foo_data, hash_sha256),
+	HASH_TEST(SHA512, foo_data, hash_sha512),
+	HASH_TEST(SM3,    foo_data, hash_sm3),
+
+#if CONFIG_IS_ENABLED(ROCKCHIP_HMAC)
+	EMPTY_TEST(),
+	HMAC_TEST(MD5,    foo_data, hmac_md5,    hmac_key),
+	HMAC_TEST(SHA1,   foo_data, hmac_sha1,   hmac_key),
+	HMAC_TEST(SHA256, foo_data, hmac_sha256, hmac_key),
+	HMAC_TEST(SHA512, foo_data, hmac_sha512, hmac_key),
+	HMAC_TEST(SM3,    foo_data, hmac_sm3,    hmac_key),
 #endif
+};
 
-/* RSA2048-SHA256 sign data of foo_data[] */
-static u8 rsa2048_sha256_sign[] = {
-	0xd4, 0x05, 0x21, 0x34, 0x2c, 0x92, 0xaf, 0x73, 0x72, 0x13, 0x54, 0x92,
-	0x9b, 0x57, 0x63, 0x82, 0xd4, 0x7c, 0x41, 0xba, 0x58, 0x3e, 0xa6, 0x82,
-	0xe8, 0x56, 0x9f, 0x1c, 0xc2, 0x6d, 0x07, 0x6d, 0xe0, 0xca, 0x4c, 0x93,
-	0xb4, 0xa4, 0x82, 0x53, 0x41, 0x58, 0xeb, 0x77, 0xd5, 0x2c, 0xf5, 0x3f,
-	0x3d, 0x1b, 0x54, 0x1b, 0x6a, 0x18, 0x30, 0xc1, 0x93, 0x14, 0x8f, 0xdd,
-	0x77, 0xe4, 0xed, 0xb8, 0xd3, 0xfc, 0x63, 0xed, 0x88, 0x2f, 0xf4, 0x35,
-	0xc4, 0xdb, 0x89, 0x94, 0x4a, 0xcd, 0x88, 0x88, 0x4f, 0xc3, 0xeb, 0x14,
-	0x03, 0xd9, 0x85, 0x2e, 0x7a, 0x27, 0xbd, 0xc9, 0x19, 0xbf, 0x55, 0x50,
-	0x2a, 0x29, 0x23, 0x02, 0xe4, 0xaf, 0x16, 0x5c, 0x17, 0x81, 0x38, 0x79,
-	0xf1, 0x2b, 0x9a, 0xc7, 0xd2, 0x9d, 0x66, 0xca, 0xf7, 0x6b, 0xf0, 0x83,
-	0x81, 0x57, 0xfc, 0x56, 0xae, 0x6d, 0x98, 0xae, 0xe2, 0xec, 0x00, 0x19,
-	0x6b, 0x75, 0x06, 0xdc, 0x1c, 0x6e, 0xbd, 0x23, 0x15, 0xb1, 0x3a, 0x43,
-	0x7e, 0x3c, 0x8b, 0x32, 0x9c, 0x4d, 0xa2, 0xcf, 0x14, 0xee, 0xd8, 0x7a,
-	0x12, 0x90, 0x70, 0xd2, 0x9f, 0xd5, 0x6d, 0x50, 0x67, 0x35, 0x93, 0x97,
-	0x2e, 0xff, 0x8f, 0xbf, 0x34, 0x4c, 0xa9, 0xee, 0x6a, 0xaa, 0x87, 0x09,
-	0x1f, 0x6b, 0xcc, 0x3d, 0xeb, 0x88, 0xca, 0x8f, 0x45, 0x86, 0xb7, 0xb2,
-	0xd6, 0xd8, 0xe5, 0x3e, 0x94, 0x02, 0x4b, 0xa7, 0x74, 0xb8, 0x5f, 0x1f,
-	0xe3, 0xbc, 0x95, 0x72, 0x3b, 0x51, 0xd4, 0xec, 0x8d, 0x87, 0xca, 0xb0,
-	0x69, 0xca, 0xa9, 0x68, 0xfc, 0x34, 0xf9, 0xb5, 0x67, 0xef, 0xac, 0xc2,
-	0x10, 0x1a, 0x39, 0x56, 0xcb, 0x38, 0x45, 0x92, 0x74, 0x2e, 0x24, 0x1c,
-	0x4e, 0x31, 0x80, 0xd9, 0x2d, 0x5f, 0x74, 0x48, 0xfe, 0x46, 0x4e, 0xf6,
-	0x19, 0x9a, 0x1d, 0x32,
+const struct cipher_test_data cipher_data_set[] = {
+#if CONFIG_IS_ENABLED(ROCKCHIP_CIPHER)
+	CIPHER_TEST(DES, ECB, des_key, des_iv, foo_data, des_ecb_cipher),
+	CIPHER_TEST(DES, CBC, des_key, des_iv, foo_data, des_cbc_cipher),
+	CIPHER_TEST(DES, CFB, des_key, des_iv, foo_data, des_cfb_cipher),
+	CIPHER_TEST(DES, OFB, des_key, des_iv, foo_data, des_ofb_cipher),
+
+	EMPTY_TEST(),
+	CIPHER_TEST(DES, ECB, tdes_key, tdes_iv, foo_data, tdes_ecb_cipher),
+	CIPHER_TEST(DES, CBC, tdes_key, tdes_iv, foo_data, tdes_cbc_cipher),
+	CIPHER_TEST(DES, CFB, tdes_key, tdes_iv, foo_data, tdes_cfb_cipher),
+	CIPHER_TEST(DES, OFB, tdes_key, tdes_iv, foo_data, tdes_ofb_cipher),
+
+	EMPTY_TEST(),
+	CIPHER_TEST(AES, ECB, aes_key, aes_iv, foo_data, aes_ecb_cipher),
+	CIPHER_TEST(AES, CBC, aes_key, aes_iv, foo_data, aes_cbc_cipher),
+	CIPHER_TEST(AES, CFB, aes_key, aes_iv, foo_data, aes_cfb_cipher),
+	CIPHER_TEST(AES, OFB, aes_key, aes_iv, foo_data, aes_ofb_cipher),
+	CIPHER_TEST(AES, CTS, aes_key, aes_iv, foo_data, aes_cts_cipher),
+	CIPHER_TEST(AES, CTR, aes_key, aes_iv, foo_data, aes_ctr_cipher),
+	CIPHER_XTS_TEST(AES, XTS, aes_key, aes_twk_key,
+			aes_iv, foo_data, aes_xts_cipher),
+
+	EMPTY_TEST(),
+	CIPHER_TEST(SM4, ECB, sm4_key, sm4_iv, foo_data, sm4_ecb_cipher),
+	CIPHER_TEST(SM4, CBC, sm4_key, sm4_iv, foo_data, sm4_cbc_cipher),
+	CIPHER_TEST(SM4, CFB, sm4_key, sm4_iv, foo_data, sm4_cfb_cipher),
+	CIPHER_TEST(SM4, OFB, sm4_key, sm4_iv, foo_data, sm4_ofb_cipher),
+	CIPHER_TEST(SM4, CTS, sm4_key, sm4_iv, foo_data, sm4_cts_cipher),
+	CIPHER_TEST(SM4, CTR, sm4_key, sm4_iv, foo_data, sm4_ctr_cipher),
+	CIPHER_XTS_TEST(SM4, XTS, sm4_key, sm4_twk_key,
+			sm4_iv, foo_data, sm4_xts_cipher),
+#else
+	EMPTY_TEST(),
+#endif
 };
 
+const struct rsa_test_data rsa_data_set[] = {
+#if CONFIG_IS_ENABLED(ROCKCHIP_RSA)
+	RSA_TEST(2048, rsa2048_n, rsa2048_e, rsa2048_c, rsa2048_d,
+		 rsa2048_sign_in, rsa2048_sign_out),
+#else
+	EMPTY_TEST(),
 #endif
+};
 
-static void dump_hash(const char *title, void *hard_d, void *soft_d, u32 nbits)
+static void dump_hex(const char *name, const u8 *array, u32 len)
 {
-	int i, same;
-	char *buf;
-
-	same = !memcmp(hard_d, soft_d, BITS2BYTE(nbits));
-	printf("[%s]: %s\n", title, same ? "OK" : "FAIL");
-
-	printf("    hard: ");
-	buf = hard_d;
-	for (i = 0; i < BITS2BYTE(nbits); i++)
-		printf("%02x ", buf[i]);
+	int i;
 
-	printf("\n    soft: ");
-	buf = soft_d;
-	for (i = 0; i < BITS2BYTE(nbits); i++)
-		printf("%02x ", buf[i]);
+	printf("[%s]: %uByte", name, len);
+	for (i = 0; i < len; i++) {
+		if (i % 32 == 0)
+			printf("\n");
+		printf("%02x ", array[i]);
+	}
+	printf("\n");
+}
 
-	printf("\n\n");
+static inline void check_result(const char *algo_name, const char *mode_name,
+				const char *crypt,
+				const u8 *expect, const u8 *actual, u32 len)
+{
+	if (memcmp(expect, actual, len) == 0) {
+		printf("[%s] %-8s%-8s PASS\n",
+		       algo_name, mode_name, crypt);
+	} else {
+		printf("[%s] %-8s%-8s FAIL\n",
+		       algo_name, mode_name, crypt);
+		dump_hex("expect", expect, len);
+		dump_hex("actual", actual, len);
+	}
 }
 
-static int hash_perf_eval(struct udevice *dev, u32 algo, char *algo_name)
+int test_hash_result(void)
 {
-	sha_context ctx;
-	u32 data_size = 8 * 1024;
-	u8 *data = NULL;
-	u8 hash_out[64];
+	const struct hash_test_data *test_data = NULL;
+	sha_context csha_ctx;
+	struct udevice *dev;
+	unsigned int i;
+	u8 out[64];
 	int ret;
 
-	ctx.algo = algo;
-	ctx.length = 100 * 1024 * 1024;
-
-	data = (u8 *)memalign(CONFIG_SYS_CACHELINE_SIZE, data_size);
-	if (!data) {
-		printf("%s, %d: memalign %u error!\n",
-		       __func__, __LINE__, data_size);
-		return -EINVAL;
+	printf("\n=================== hash & hmac test ===================\n");
+
+	for (i = 0; i < ARRAY_SIZE(hash_data_set); i++) {
+		test_data = &hash_data_set[i];
+		if (test_data->algo == 0) {
+			printf("\n");
+			continue;
+		}
+
+		dev = crypto_get_device(test_data->algo);
+		if (!dev) {
+			printf("[%s] %-16s unsupported!!!\n",
+			       test_data->algo_name,
+			       test_data->mode_name);
+			continue;
+		}
+
+		csha_ctx.algo   = test_data->algo;
+		csha_ctx.length = test_data->data_len;
+
+		memset(out, 0x00, sizeof(out));
+		if (test_data->key) {
+			ret = crypto_hmac_init(dev, &csha_ctx,
+					       (u8 *)test_data->key,
+					       test_data->key_len);
+			ret |= crypto_hmac_update(dev, (void *)test_data->data,
+						  test_data->data_len);
+			ret |= crypto_hmac_final(dev, &csha_ctx, out);
+			if (ret) {
+				printf("hmac calc error ret = %d\n", ret);
+				goto error;
+			}
+		} else {
+			ret = crypto_sha_init(dev, &csha_ctx);
+			ret |= crypto_sha_update(dev, (void *)test_data->data,
+						 test_data->data_len);
+			ret |= crypto_sha_final(dev, &csha_ctx, out);
+			if (ret) {
+				printf("hash calc error ret = %d\n", ret);
+				goto error;
+			}
+		}
+
+		check_result(test_data->algo_name, test_data->mode_name,
+			     "", test_data->hash, out, test_data->hash_len);
+		printf("+++++++++++++++++++++++++++++++++++++++++++++++++++\n");
 	}
 
-	memset(data, 0xab, data_size);
-
-	ulong start = get_timer(0);
-
-	ret = crypto_sha_init(dev, &ctx);
-	if (ret)
-		goto exit;
+	return 0;
+error:
+	printf("%s %s test error!\n",
+	       test_data->algo_name, test_data->mode_name);
+	return ret;
+}
 
-	for (u32 i = 0; i < ctx.length / data_size; i++) {
-		ret = crypto_sha_update(dev, (u32 *)data, data_size);
+int test_cipher_result(void)
+{
+	const struct cipher_test_data *test_data = NULL;
+	struct udevice *dev;
+	cipher_context ctx;
+	u8 out[256];
+	int ret;
+	u32 i;
+
+	printf("\n===================== cipher test ======================\n");
+
+	for (i = 0; i < ARRAY_SIZE(cipher_data_set); i++) {
+		test_data = &cipher_data_set[i];
+		if (test_data->algo == 0) {
+			printf("\n");
+			continue;
+		}
+
+		dev = crypto_get_device(test_data->algo);
+		if (!dev) {
+			printf("[%s] %-16s unsupported!!!\n",
+			       test_data->algo_name, test_data->mode_name);
+			continue;
+		}
+
+		memset(&ctx, 0x00, sizeof(ctx));
+
+		ctx.algo    = test_data->algo;
+		ctx.mode    = test_data->mode;
+		ctx.key     = test_data->key;
+		ctx.twk_key = test_data->twk_key;
+		ctx.key_len = test_data->key_len;
+		ctx.iv      = test_data->iv;
+		ctx.iv_len  = test_data->iv_len;
+
+		ret = crypto_cipher(dev, &ctx, test_data->plain,
+				    out, test_data->plain_len, true);
 		if (ret)
-			goto exit;
-	}
-
-	ret = crypto_sha_final(dev, &ctx, hash_out);
+			goto error;
 
-	ulong time_cost = get_timer(start);
+		check_result(test_data->algo_name, test_data->mode_name,
+			     "encrypt", test_data->cipher, out,
+			     test_data->cipher_len);
 
-	printf("%s, hash performance = %luMBps\n",
-	       algo_name, (100 * 1000) / time_cost);
-exit:
-	free(data);
+		ret = crypto_cipher(dev, &ctx, test_data->cipher,
+				    out, test_data->cipher_len, false);
+		if (ret)
+			goto error;
 
+		check_result(test_data->algo_name, test_data->mode_name,
+			     "decrypt", test_data->plain, out,
+			     test_data->plain_len);
+		printf("+++++++++++++++++++++++++++++++++++++++++++++++++++\n");
+	}
+	return 0;
+error:
+	printf("%s %s test error!\n",
+	       test_data->algo_name, test_data->mode_name);
 	return ret;
 }
 
-static int do_crypto(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int test_rsa_result(void)
 {
+	const struct rsa_test_data *test_data = NULL;
+	u8 *hard_out = NULL, *e_tmp;
+	u32 data_size = 4096 / 8;
 	struct udevice *dev;
-	sha_context csha_ctx;
-	sha1_context sha1_ctx;
-	sha256_context sha256_ctx;
-	sha512_context sha512_ctx;
-	u8 hard_out[256];
-	u8 soft_out[64];
-	u32 cap;
-
-	/* CRYPTO_V1 TODO: SHA512 is not available */
-#ifdef CONFIG_ROCKCHIP_CRYPTO_V1
-	cap = CRYPTO_MD5 | CRYPTO_SHA1 | CRYPTO_SHA256 |
-	      CRYPTO_RSA2048;
-#else
-	cap = CRYPTO_MD5 | CRYPTO_SHA1 | CRYPTO_SHA256 |
-#if !defined(CONFIG_ROCKCHIP_RK1808)
-	      CRYPTO_SHA512 |
-#endif
-	      CRYPTO_RSA2048;
-#endif
-	dev = crypto_get_device(cap);
-	if (!dev) {
-		printf("Can't find crypto device for expected capability\n");
-		return -ENODEV;
-	}
+	rsa_key rsa_key;
+	int ret, i;
 
-	/* MD5 */
-	if (cap & CRYPTO_MD5) {
-		HASH_PERF_EVAL(dev, CRYPTO_MD5);
-		csha_ctx.algo = CRYPTO_MD5;
-		csha_ctx.length = sizeof(foo_data);
-		memset(hard_out, 0x00, sizeof(hard_out));
-		crypto_sha_csum(dev, &csha_ctx, (char *)foo_data,
-				sizeof(foo_data), hard_out);
-		md5(foo_data, sizeof(foo_data), soft_out);
-		dump_hash("MD5", hard_out, soft_out,
-			  crypto_algo_nbits(csha_ctx.algo));
+	hard_out = (u8 *)memalign(CONFIG_SYS_CACHELINE_SIZE, data_size);
+	if (!hard_out) {
+		printf("%s, %d: memalign %u error!\n",
+		       __func__, __LINE__, data_size);
+		return -EINVAL;
 	}
 
-	/* SHA1 */
-	if (cap & CRYPTO_SHA1) {
-		HASH_PERF_EVAL(dev, CRYPTO_SHA1);
-		csha_ctx.algo = CRYPTO_SHA1;
-		csha_ctx.length = sizeof(foo_data);
-		memset(hard_out, 0x00, sizeof(hard_out));
-		crypto_sha_csum(dev, &csha_ctx, (char *)foo_data,
-				sizeof(foo_data), hard_out);
-		sha1_starts(&sha1_ctx);
-		sha1_update(&sha1_ctx, (const u8 *)foo_data, sizeof(foo_data));
-		sha1_finish(&sha1_ctx, soft_out);
-		dump_hash("SHA1", hard_out, soft_out,
-			  crypto_algo_nbits(csha_ctx.algo));
+	e_tmp = (u8 *)memalign(CONFIG_SYS_CACHELINE_SIZE, data_size);
+	if (!e_tmp) {
+		printf("%s, %d: memalign %u error!\n",
+		       __func__, __LINE__, data_size);
+		return -EINVAL;
 	}
 
-	/* SHA512 */
-	if (cap & CRYPTO_SHA512) {
-		HASH_PERF_EVAL(dev, CRYPTO_SHA512);
-		csha_ctx.algo = CRYPTO_SHA512;
-		csha_ctx.length = sizeof(foo_data);
-		memset(hard_out, 0x00, sizeof(hard_out));
-		crypto_sha_csum(dev, &csha_ctx, (char *)foo_data,
-				sizeof(foo_data), hard_out);
-		sha512_starts(&sha512_ctx);
-		sha512_update(&sha512_ctx, (const u8 *)foo_data,
-			      sizeof(foo_data));
-		sha512_finish(&sha512_ctx, soft_out);
-		dump_hash("SHA512", hard_out, soft_out,
-			  crypto_algo_nbits(csha_ctx.algo));
-	}
+	printf("\n====================== rsa test ========================\n");
+	for (i = 0; i < ARRAY_SIZE(rsa_data_set); i++) {
+		test_data = &rsa_data_set[i];
+		if (test_data->algo == 0) {
+			printf("\n");
+			continue;
+		}
+
+		dev = crypto_get_device(test_data->algo);
+		if (!dev) {
+			printf("[%s] %-16s unsupported!!!\n",
+			       test_data->algo_name, test_data->mode_name);
+			continue;
+		}
+
+		/* sign test */
+		memset(&rsa_key, 0x00, sizeof(rsa_key));
+		rsa_key.algo = test_data->algo;
+		rsa_key.n = (u32 *)test_data->n;
+		rsa_key.e = (u32 *)test_data->d;
+#ifdef CONFIG_ROCKCHIP_CRYPTO_V1
+		rsa_key.c = (u32 *)test_data->c;
+#endif
 
-	/* SHA256 */
-	if (cap & CRYPTO_SHA256) {
-		HASH_PERF_EVAL(dev, CRYPTO_SHA256);
-		csha_ctx.algo = CRYPTO_SHA256;
-		csha_ctx.length = sizeof(foo_data);
-		memset(hard_out, 0x00, sizeof(hard_out));
-		crypto_sha_csum(dev, &csha_ctx, (char *)foo_data,
-				sizeof(foo_data), hard_out);
-		sha256_starts(&sha256_ctx);
-		sha256_update(&sha256_ctx, (const u8 *)foo_data,
-			      sizeof(foo_data));
-		sha256_finish(&sha256_ctx, soft_out);
-		dump_hash("SHA256", hard_out, soft_out,
-			  crypto_algo_nbits(csha_ctx.algo));
-	}
+		ret = crypto_rsa_verify(dev, &rsa_key,
+					(u8 *)test_data->sign_in, hard_out);
+		if (ret) {
+			printf("sign test error, ret = %d\n", ret);
+			goto error;
+		}
 
-#if CONFIG_IS_ENABLED(ROCKCHIP_RSA)
-	/* RSA2048-SHA256 */
-	if (cap & CRYPTO_RSA2048) {
-		rsa_key rsa_key;
+		check_result(test_data->algo_name, test_data->mode_name,
+			     "sign", test_data->sign_out,
+			     hard_out, test_data->n_len);
 
+		/* verify test */
 		memset(&rsa_key, 0x00, sizeof(rsa_key));
-		rsa_key.algo = CRYPTO_RSA2048;
-		rsa_key.n = (u32 *)&rsa2048_n;
-		rsa_key.e = (u32 *)&rsa2048_e;
+		memset(e_tmp, 0x00, data_size);
+		memcpy(e_tmp, test_data->e, test_data->e_len);
+		rsa_key.algo = test_data->algo;
+		rsa_key.n = (u32 *)test_data->n;
+		rsa_key.e = (u32 *)e_tmp;
 #ifdef CONFIG_ROCKCHIP_CRYPTO_V1
-		rsa_key.c = (u32 *)&rsa2048_c;
+		rsa_key.c = (u32 *)test_data->c;
 #endif
-		memset(hard_out, 0x00, sizeof(hard_out));
-		crypto_rsa_verify(dev, &rsa_key, rsa2048_sha256_sign, hard_out);
-		sha256_starts(&sha256_ctx);
-		sha256_update(&sha256_ctx, (const u8 *)foo_data,
-			      sizeof(foo_data));
-		sha256_finish(&sha256_ctx, soft_out);
-		dump_hash("RSA2048-SHA256", hard_out,
-			  soft_out, crypto_algo_nbits(csha_ctx.algo));
+
+		ret = crypto_rsa_verify(dev, &rsa_key,
+					(u8 *)test_data->sign_out, hard_out);
+		if (ret) {
+			printf("verify test error, ret = %d\n", ret);
+			goto error;
+		}
+
+		check_result(test_data->algo_name, test_data->mode_name,
+			     "verify", test_data->sign_in,
+			     hard_out, test_data->n_len);
+
+		printf("+++++++++++++++++++++++++++++++++++++++++++++++++++\n");
 	}
-#endif
 
+	free(hard_out);
+	free(e_tmp);
+
+	return 0;
+error:
+	free(hard_out);
+	free(e_tmp);
+	printf("%s %s test error!\n",
+	       test_data->algo_name, test_data->mode_name);
+	return ret;
+}
+
+static int test_all_result(void)
+{
+	int ret = 0;
+
+	ret = test_hash_result();
+	if (ret)
+		goto exit;
+
+	ret = test_cipher_result();
+	if (ret)
+		goto exit;
+
+	ret = test_rsa_result();
+	if (ret)
+		goto exit;
+
+exit:
 	return 0;
 }
 
+static int do_crypto(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+	return test_all_result();
+}
+
 U_BOOT_CMD(
 	crypto, 1, 1, do_crypto,
 	"crypto test",
diff --git a/include/rockchip/crypto_fix_test_data.h b/include/rockchip/crypto_fix_test_data.h
new file mode 100644
index 0000000000..03cfb7834d
--- /dev/null
+++ b/include/rockchip/crypto_fix_test_data.h
@@ -0,0 +1,887 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2021 Rockchip Electronics Co., Ltd
+ */
+#ifndef __CRYPTO_FIX_TEST_DATA_H__
+#define __CRYPTO_FIX_TEST_DATA_H__
+
+const u8 foo_data[] = {
+0xa4, 0xd2, 0xe1, 0x0a, 0x80, 0x17, 0x43, 0x67,
+0x05, 0x08, 0x07, 0x3d, 0xe3, 0x46, 0x13, 0x15,
+0xef, 0x5e, 0xa3, 0xaf, 0x1d, 0x3b, 0x8d, 0x18,
+0xa2, 0x30, 0x68, 0x66, 0x78, 0x68, 0x59, 0x2a,
+0xb5, 0x29, 0xc1, 0xef, 0xa3, 0x91, 0xc4, 0x1c,
+0x55, 0xa8, 0x58, 0x84, 0xd8, 0x4c, 0x2a, 0x0f,
+0x60, 0x3b, 0x4f, 0xfc, 0x56, 0x60, 0x88, 0x28,
+0xc1, 0x9a, 0x91, 0xbe, 0xae, 0xf3, 0x37, 0x65,
+0xfd, 0x65, 0x1d, 0xa1, 0x71, 0x17, 0x3b, 0xbd,
+0x2c, 0x84, 0x3d, 0xcc, 0x2e, 0x7b, 0xff, 0x13,
+0x82, 0xed, 0x0e, 0x6b, 0x4e, 0x5b, 0xc8, 0xae,
+0x0b, 0xc7, 0xbe, 0xfa, 0xc0, 0xc6, 0xa5, 0xee,
+0x99, 0xbf, 0x2e, 0xb0, 0x55, 0x0d, 0xb8, 0xc6,
+0x4c, 0x28, 0xb2, 0x1d, 0xd0, 0x58, 0x57, 0xbd,
+0x78, 0x21, 0x32, 0xef, 0xf5, 0xaa, 0x8c, 0x41,
+0x7c, 0x99, 0x6f, 0xac, 0xc1, 0x37, 0x72, 0x0f,
+0x1d, 0xaa, 0xfc, 0x2c, 0xf2, 0xf5, 0x0b, 0x29,
+0xd9, 0xe4, 0x0d, 0xc8, 0xda, 0x29, 0x66, 0xac,
+0xa9, 0x1a, 0x3a, 0x19, 0xc4, 0x07, 0x46, 0x1d,
+0xe3, 0x85, 0x97, 0xee, 0x23, 0xbe, 0xe9, 0xfc,
+};
+
+#if CONFIG_IS_ENABLED(ROCKCHIP_CIPHER)
+
+const u8 des_key[] = {
+0x7d, 0xe3, 0x2d, 0x3a, 0x32, 0xde, 0xb2, 0xac,
+};
+
+const u8 des_iv[] = {
+0x6b, 0x43, 0x2d, 0x3f, 0xe3, 0x83, 0x2f, 0x7d,
+};
+
+const u8 des_ecb_cipher[] = {
+0x4d, 0x33, 0x53, 0x58, 0x4b, 0xbe, 0x74, 0xfa,
+0xcf, 0x89, 0xbf, 0x4d, 0x2f, 0x2c, 0x84, 0x26,
+0x7f, 0x09, 0xe4, 0x44, 0xf5, 0x22, 0x69, 0x94,
+0x0a, 0x58, 0xa3, 0xe9, 0x9d, 0xb5, 0xf5, 0x30,
+0x27, 0xff, 0xee, 0xb6, 0x1a, 0xe6, 0x8e, 0xde,
+0x3e, 0x02, 0x2b, 0xf1, 0xfa, 0xab, 0x91, 0x13,
+0x0e, 0xac, 0x02, 0xd8, 0x01, 0x16, 0xb2, 0x61,
+0x6a, 0x57, 0xe7, 0xbb, 0xf5, 0x9a, 0x77, 0x81,
+0x3a, 0x22, 0xdb, 0x47, 0xd2, 0xe7, 0x3a, 0xe2,
+0x64, 0x6f, 0x76, 0xa0, 0x79, 0xe9, 0x03, 0x04,
+0xd9, 0xd4, 0x71, 0x7f, 0xb5, 0x52, 0x55, 0x6a,
+0xcf, 0xe5, 0x84, 0xc3, 0x13, 0x3e, 0x41, 0xaa,
+0xbb, 0x6b, 0xfa, 0x0f, 0xfd, 0x1f, 0xdf, 0x0d,
+0xe8, 0x79, 0xa4, 0x48, 0x89, 0x07, 0x84, 0x50,
+0x21, 0x7e, 0x40, 0x3b, 0xdd, 0x9e, 0xe4, 0x34,
+0xef, 0xea, 0x6c, 0x7d, 0x91, 0xc3, 0x7a, 0xd8,
+0x9a, 0x52, 0xfa, 0x51, 0xe8, 0xd6, 0x3b, 0x52,
+0x07, 0xb0, 0x7a, 0xc6, 0x18, 0x90, 0x53, 0x6b,
+0x2d, 0x89, 0x3c, 0x27, 0x98, 0x27, 0x6b, 0x51,
+0x94, 0x4f, 0xaa, 0x02, 0xa2, 0xb7, 0x54, 0x67,
+};
+
+const u8 des_cbc_cipher[] = {
+0xf0, 0x59, 0x44, 0x2d, 0xca, 0xd1, 0x0c, 0xb6,
+0x83, 0x15, 0xfa, 0x05, 0x2f, 0x4e, 0x22, 0xb0,
+0xbf, 0x79, 0x86, 0x5a, 0x13, 0xa1, 0xe6, 0xcd,
+0xdf, 0xdf, 0x77, 0xa4, 0xec, 0xdd, 0x13, 0x04,
+0xdf, 0x55, 0x59, 0xaa, 0x19, 0x70, 0x39, 0xe7,
+0xc1, 0xd6, 0xe0, 0x58, 0xb4, 0x62, 0xf3, 0xbe,
+0xf1, 0xbc, 0xa0, 0x10, 0x17, 0x7d, 0x4b, 0x75,
+0x61, 0xb1, 0x06, 0x0f, 0x3d, 0x1a, 0x35, 0x2d,
+0x18, 0x87, 0x1c, 0xe1, 0x21, 0x2d, 0x72, 0x65,
+0x49, 0x31, 0x70, 0x93, 0xbe, 0x1f, 0x2f, 0xcc,
+0xa8, 0xf0, 0x58, 0x91, 0x38, 0x1a, 0x03, 0x88,
+0x7b, 0xbd, 0x4c, 0xf8, 0xa6, 0xbe, 0x5e, 0xf6,
+0x98, 0x7a, 0xd3, 0xbd, 0x1e, 0x1a, 0x74, 0xf5,
+0x26, 0x29, 0xe1, 0xe2, 0xdc, 0x88, 0xcc, 0xb0,
+0x86, 0x64, 0x7a, 0x48, 0x8c, 0x80, 0xd3, 0xdb,
+0x75, 0x7b, 0xdb, 0x18, 0xa3, 0xbd, 0x70, 0x4c,
+0xf7, 0xb4, 0x44, 0x03, 0x88, 0x7e, 0xb5, 0x8c,
+0xcb, 0x8b, 0x0c, 0x2c, 0xe4, 0xb9, 0xbb, 0x5d,
+0x67, 0x69, 0x4f, 0x6a, 0x92, 0xfd, 0xb8, 0xc0,
+0x1b, 0x27, 0x11, 0xdf, 0x37, 0xf1, 0x43, 0x49,
+};
+
+const u8 des_cfb_cipher[] = {
+0x07, 0x63, 0xdc, 0xf5, 0x99, 0x4d, 0x69, 0x12,
+0xd5, 0x1a, 0x6e, 0x9f, 0xba, 0x29, 0x44, 0x49,
+0x64, 0x6e, 0xf5, 0x04, 0x10, 0xd5, 0x3c, 0x0b,
+0xd1, 0x01, 0x14, 0xe5, 0xe6, 0xd2, 0xef, 0xa2,
+0xe6, 0x73, 0xff, 0x0a, 0xff, 0x73, 0xa4, 0x48,
+0x9d, 0x3e, 0x15, 0xbc, 0xfd, 0x76, 0xd7, 0x1c,
+0x54, 0x8e, 0xde, 0xb3, 0x5c, 0xd8, 0xee, 0x3b,
+0x7e, 0x7e, 0xa3, 0x4f, 0x2d, 0xe9, 0x4d, 0xcc,
+0x25, 0x12, 0xa0, 0xc6, 0x56, 0x3d, 0x98, 0x44,
+0x0b, 0xcf, 0x12, 0x88, 0xa2, 0x7a, 0x7f, 0x28,
+0xb0, 0x3a, 0x5d, 0x3b, 0xc4, 0xcf, 0x07, 0x0c,
+0x30, 0xa2, 0x1b, 0x3a, 0x69, 0x43, 0xee, 0x31,
+0x2b, 0xf4, 0x15, 0x95, 0x66, 0x3b, 0x38, 0x1f,
+0xc1, 0xed, 0xc3, 0xb8, 0x3d, 0xd3, 0xef, 0x4b,
+0x93, 0x44, 0x05, 0xcc, 0xb6, 0x19, 0x59, 0x55,
+0x65, 0x72, 0x6d, 0x77, 0x7b, 0x18, 0xe8, 0xb7,
+0x2d, 0x24, 0x1e, 0xde, 0x16, 0xe2, 0xa4, 0xfe,
+0x11, 0x3b, 0xf3, 0x93, 0xa4, 0xbb, 0xcc, 0xbc,
+0x58, 0x8a, 0x31, 0x20, 0x7c, 0xcc, 0x15, 0xdc,
+0xa3, 0x53, 0x43, 0x22, 0xb9, 0xce, 0xa7, 0x35,
+};
+
+const u8 des_ofb_cipher[] = {
+0x07, 0x63, 0xdc, 0xf5, 0x99, 0x4d, 0x69, 0x12,
+0x01, 0xa2, 0xbf, 0x0d, 0x29, 0xb1, 0x06, 0x40,
+0xb2, 0x90, 0xe0, 0xa3, 0x73, 0x58, 0xc9, 0x4a,
+0x2e, 0x9b, 0x80, 0xc7, 0xe3, 0x87, 0xc2, 0x68,
+0x4f, 0x2d, 0x18, 0x21, 0x33, 0x4e, 0xf3, 0xd9,
+0x88, 0xb9, 0x5c, 0x07, 0xf0, 0x16, 0x7b, 0x7e,
+0xf8, 0x0c, 0x01, 0xfc, 0xaf, 0x27, 0x52, 0x63,
+0xcb, 0x28, 0x93, 0x4c, 0xe1, 0x92, 0x36, 0x1c,
+0x0d, 0x4f, 0xdf, 0x2e, 0x11, 0x7b, 0x89, 0xce,
+0xcf, 0x05, 0x05, 0x9d, 0x93, 0x13, 0xbc, 0xde,
+0x22, 0xde, 0xd9, 0x77, 0x75, 0x79, 0x22, 0x90,
+0x6e, 0x91, 0x78, 0xf2, 0x86, 0xb3, 0x2f, 0xc2,
+0x00, 0x30, 0x14, 0xc9, 0xbb, 0x92, 0xe8, 0x0a,
+0xd6, 0x84, 0x26, 0xec, 0x75, 0x4e, 0x77, 0x3e,
+0x68, 0xbe, 0xca, 0xbd, 0xcb, 0x0b, 0xeb, 0x56,
+0x17, 0x95, 0xab, 0xea, 0x47, 0xf2, 0x5a, 0x3e,
+0x2e, 0xaa, 0xb6, 0xd3, 0x7a, 0x5f, 0x58, 0xcc,
+0xb4, 0x4f, 0x7f, 0x9a, 0xad, 0x30, 0xcb, 0xe7,
+0x17, 0x16, 0x1b, 0x96, 0x89, 0xe9, 0x51, 0xde,
+0xa6, 0xa0, 0x79, 0x2f, 0xc3, 0xe3, 0x53, 0x8f,
+};
+
+const u8 tdes_key[] = {
+0x33, 0x1f, 0xc4, 0x23, 0xb4, 0xc5, 0xb5, 0xc4,
+0xa1, 0x66, 0x90, 0x19, 0x63, 0x9b, 0xaf, 0xc3,
+0xae, 0xb3, 0x71, 0x84, 0x69, 0x17, 0x50, 0x02,
+};
+
+const u8 tdes_iv[] = {
+0x24, 0xbc, 0x96, 0x9d, 0x3e, 0x35, 0x81, 0x33,
+};
+
+const u8 tdes_ecb_cipher[] = {
+0xc8, 0xf9, 0xff, 0x99, 0x16, 0xbd, 0xe1, 0x6a,
+0xfb, 0xa3, 0xce, 0x26, 0x71, 0x1a, 0xef, 0x9b,
+0x99, 0x16, 0x17, 0xc2, 0x36, 0xe7, 0x80, 0xda,
+0x8d, 0xdb, 0x6a, 0xb1, 0x0b, 0xae, 0x95, 0x03,
+0x23, 0x8f, 0xde, 0xe8, 0x0d, 0xfa, 0x0d, 0xd3,
+0x6b, 0x1c, 0xf0, 0x05, 0x38, 0x37, 0xd7, 0xb9,
+0x49, 0x96, 0x3c, 0x53, 0x3b, 0xe8, 0x87, 0x53,
+0xae, 0xc5, 0x17, 0x76, 0xde, 0xbe, 0x21, 0x94,
+0xc1, 0xfd, 0x87, 0xf0, 0x08, 0x1f, 0xf3, 0x1e,
+0x00, 0x88, 0x8a, 0xfe, 0x33, 0xf5, 0x2a, 0x5d,
+0x12, 0xed, 0xf4, 0xa8, 0x42, 0x30, 0x45, 0x68,
+0x60, 0x3c, 0xb6, 0xdd, 0xab, 0xd9, 0x6a, 0xc9,
+0x35, 0x7f, 0xdc, 0x6b, 0xab, 0xbc, 0x09, 0x9f,
+0xfb, 0xc7, 0xd1, 0xec, 0xcd, 0xa3, 0x2a, 0xa3,
+0x2d, 0xa0, 0xb7, 0x19, 0xda, 0x28, 0x38, 0xc3,
+0xed, 0x56, 0x9b, 0xbf, 0xd8, 0x07, 0x14, 0x3b,
+0x95, 0x47, 0x65, 0x66, 0x17, 0x1a, 0xfd, 0x5f,
+0x0f, 0x8d, 0xe9, 0x4e, 0x48, 0x24, 0x9d, 0xae,
+0x85, 0xc8, 0xd4, 0xa7, 0x09, 0xf5, 0x08, 0x2d,
+0x44, 0x25, 0x75, 0x96, 0x7e, 0x7b, 0xfb, 0xca,
+};
+
+const u8 tdes_cbc_cipher[] = {
+0x60, 0x77, 0x36, 0xdb, 0xcc, 0x60, 0xe3, 0xcc,
+0x62, 0x43, 0x74, 0x78, 0xb1, 0x85, 0xb4, 0x08,
+0x4f, 0x37, 0x25, 0x2e, 0xd9, 0x85, 0x48, 0x15,
+0x34, 0x42, 0x07, 0x46, 0x4d, 0xbb, 0xc3, 0xed,
+0xd5, 0x9d, 0xef, 0x43, 0x33, 0x43, 0x58, 0xd7,
+0x10, 0x52, 0x0b, 0x15, 0xae, 0xe4, 0xba, 0xf6,
+0xdf, 0xe6, 0xc6, 0x5b, 0x7c, 0x7a, 0x49, 0xc0,
+0xab, 0xa6, 0x2a, 0x05, 0xed, 0x31, 0x94, 0x43,
+0x50, 0x03, 0x1a, 0x75, 0x92, 0x67, 0x93, 0x1b,
+0xb0, 0xa5, 0xcd, 0xb6, 0xe8, 0x74, 0xcf, 0xa4,
+0xe0, 0x02, 0x12, 0xe0, 0xe7, 0x66, 0x45, 0xac,
+0x7d, 0x43, 0xdb, 0x83, 0xcc, 0x97, 0xa7, 0x77,
+0x0d, 0x38, 0x76, 0x9f, 0x27, 0x8e, 0xaf, 0x4a,
+0x08, 0xc3, 0x90, 0x4a, 0x8b, 0xa5, 0x7e, 0xe2,
+0xae, 0xb2, 0x25, 0xa4, 0xcb, 0xc4, 0xe9, 0xf1,
+0xfd, 0x8b, 0xcc, 0xc2, 0xb2, 0x79, 0xec, 0xca,
+0x3e, 0x1a, 0xd8, 0x92, 0x8f, 0x7e, 0x31, 0x79,
+0x9d, 0x3b, 0xb7, 0xaf, 0xb6, 0x44, 0x67, 0xdc,
+0xe4, 0xea, 0xbb, 0x3f, 0xfa, 0x30, 0x21, 0x93,
+0x4d, 0x46, 0xe8, 0xd5, 0xf6, 0x9d, 0x19, 0x14,
+};
+
+const u8 tdes_cfb_cipher[] = {
+0x9b, 0x0e, 0x80, 0x04, 0x7e, 0x40, 0xf5, 0x4b,
+0xe0, 0x7b, 0x36, 0x7d, 0x70, 0x6e, 0xfe, 0x2e,
+0x35, 0xd6, 0x37, 0xe4, 0x6b, 0x70, 0x43, 0x8f,
+0x51, 0xe2, 0x6b, 0x33, 0x0c, 0x3b, 0x71, 0xd8,
+0x66, 0xe2, 0x41, 0x18, 0x1a, 0x8d, 0x5e, 0xf0,
+0x9a, 0xc2, 0x7e, 0x9b, 0x83, 0xa5, 0x8e, 0x84,
+0x09, 0x9e, 0xe4, 0xf5, 0xe4, 0x46, 0x44, 0x03,
+0x74, 0xb6, 0xbe, 0x6b, 0xda, 0x2b, 0x89, 0xce,
+0x85, 0xc6, 0xce, 0x22, 0x30, 0xa2, 0xf8, 0x5e,
+0x8c, 0x7d, 0x8c, 0xcd, 0xb6, 0xef, 0x0e, 0xec,
+0x76, 0x2e, 0xbe, 0x90, 0x08, 0x30, 0x34, 0x71,
+0xf3, 0xa7, 0x76, 0x4b, 0xdf, 0x0f, 0x74, 0x21,
+0x21, 0xc1, 0xa4, 0x9b, 0x9c, 0xc2, 0x1d, 0x78,
+0x04, 0x31, 0xed, 0xc8, 0x88, 0x64, 0x31, 0x81,
+0x2c, 0x5d, 0x07, 0x01, 0x56, 0xfe, 0x64, 0x65,
+0x19, 0xa6, 0x9a, 0xf3, 0x21, 0xe7, 0xd6, 0x53,
+0x46, 0x2a, 0x33, 0x19, 0x29, 0x9a, 0x9e, 0x4b,
+0xfc, 0xd1, 0xfe, 0xca, 0xa3, 0xfa, 0x28, 0x8c,
+0x9c, 0x5d, 0xbe, 0xaa, 0x20, 0xeb, 0x85, 0xc1,
+0xb7, 0xed, 0xfd, 0x05, 0xda, 0x0d, 0x2c, 0x36,
+};
+
+const u8 tdes_ofb_cipher[] = {
+0x9b, 0x0e, 0x80, 0x04, 0x7e, 0x40, 0xf5, 0x4b,
+0x9a, 0x31, 0xa5, 0xca, 0xd5, 0xac, 0xf9, 0x16,
+0x4c, 0x63, 0x07, 0xff, 0x49, 0x43, 0x97, 0x5b,
+0xe6, 0x2d, 0xae, 0xbf, 0x7d, 0x86, 0x85, 0x6d,
+0xac, 0x5f, 0xd0, 0x9e, 0xb0, 0xf6, 0x43, 0x66,
+0x81, 0xb5, 0x80, 0xc4, 0xa1, 0x52, 0x00, 0xe7,
+0x48, 0xb4, 0xb1, 0xea, 0x0b, 0x80, 0x84, 0xc2,
+0xcd, 0x06, 0x53, 0x04, 0x76, 0x0f, 0xd7, 0x88,
+0x43, 0x69, 0x72, 0xf2, 0x8d, 0xb5, 0xb1, 0xc5,
+0x74, 0x2f, 0x35, 0x53, 0xcc, 0x87, 0xfa, 0xa4,
+0xb2, 0xe7, 0x58, 0x21, 0xc9, 0xd9, 0x57, 0x34,
+0x5f, 0x5f, 0x24, 0xe4, 0x05, 0xc6, 0xbd, 0x63,
+0xfd, 0xcf, 0x91, 0xd0, 0xcd, 0x56, 0x43, 0x54,
+0xd6, 0x5c, 0x6d, 0xac, 0xcb, 0xe5, 0x59, 0x35,
+0x21, 0xf8, 0x57, 0x15, 0x34, 0x46, 0x4e, 0x85,
+0xdb, 0x9d, 0x00, 0xb9, 0xca, 0xee, 0x46, 0x32,
+0x7c, 0x46, 0xe2, 0xb1, 0x3d, 0x8d, 0xef, 0xe0,
+0x6a, 0xf0, 0x73, 0x7c, 0xaf, 0x28, 0x39, 0xa1,
+0xed, 0x4f, 0xa8, 0xee, 0x18, 0x10, 0x40, 0x69,
+0x36, 0x1f, 0x40, 0xc4, 0x22, 0xfc, 0x40, 0x73,
+};
+
+const u8 aes_key[] = {
+0xb2, 0xc2, 0x1c, 0xf5, 0xcc, 0xe2, 0xb3, 0xda,
+0x3c, 0xd6, 0xaf, 0x73, 0x15, 0x45, 0x7f, 0x49,
+0x32, 0xe9, 0x42, 0x4f, 0x6b, 0x43, 0x7d, 0x77,
+0x38, 0x8c, 0x19, 0xf8, 0x36, 0x63, 0x9a, 0xfd,
+};
+
+const u8 aes_twk_key[] = {
+0x93, 0x73, 0xbe, 0xab, 0x15, 0xe6, 0xa5, 0xd7,
+0xc0, 0x0a, 0xbb, 0xad, 0x9b, 0x29, 0x0c, 0x34,
+0x48, 0x5c, 0x38, 0x45, 0x26, 0xa8, 0x72, 0xd7,
+0x49, 0x54, 0xbf, 0x41, 0x24, 0xe8, 0x97, 0xab,
+};
+
+const u8 aes_iv[] = {
+0x80, 0xb8, 0x3f, 0x22, 0x2f, 0x7d, 0x1f, 0x1a,
+0xc6, 0xc1, 0x19, 0x92, 0x02, 0xcc, 0x7a, 0x12,
+};
+
+const u8 aes_ecb_cipher[] = {
+0x5c, 0xd6, 0xbb, 0xc3, 0x49, 0x36, 0x47, 0x2d,
+0x58, 0xfc, 0xd9, 0x3f, 0x7d, 0xc1, 0x58, 0xc0,
+0x6e, 0x09, 0x40, 0xb1, 0x5a, 0x3a, 0x1a, 0x27,
+0x3a, 0x22, 0xbb, 0xf5, 0x51, 0xed, 0x05, 0x0b,
+0x7f, 0x57, 0xa6, 0xf8, 0x92, 0xe5, 0xc5, 0xfc,
+0xff, 0x1b, 0x92, 0x07, 0x24, 0xbe, 0x93, 0xed,
+0x64, 0x2e, 0x31, 0xb2, 0x8a, 0x3c, 0xd5, 0xaa,
+0xf5, 0xd9, 0xb6, 0x3e, 0x7d, 0xce, 0xae, 0xd1,
+0xeb, 0xfa, 0x1c, 0xf3, 0x8f, 0x4b, 0xc3, 0xc7,
+0xc8, 0x7b, 0x84, 0x70, 0x51, 0xd6, 0xaf, 0xa8,
+0x94, 0x02, 0x39, 0x26, 0x17, 0xd9, 0x2d, 0x27,
+0x7b, 0xa9, 0x4b, 0x9b, 0xc2, 0x58, 0xa5, 0x48,
+0x7f, 0xd1, 0x82, 0xf7, 0x34, 0x06, 0xf6, 0x88,
+0xb1, 0xc9, 0x9c, 0xbe, 0x40, 0xf1, 0x69, 0xd0,
+0xd1, 0x23, 0x1c, 0x1b, 0x94, 0x31, 0x64, 0x6b,
+0xdc, 0x28, 0xab, 0x00, 0xaf, 0x2a, 0xeb, 0xb3,
+0x28, 0xb4, 0x59, 0x8a, 0x57, 0x98, 0xdb, 0xdb,
+0xcf, 0x41, 0x85, 0x7f, 0x00, 0xd0, 0xea, 0x67,
+0x47, 0x8f, 0x19, 0xc6, 0x6e, 0x5b, 0x58, 0x02,
+0x7d, 0xb0, 0xd9, 0x4c, 0xb5, 0x4b, 0xed, 0xb8,
+};
+
+const u8 aes_cbc_cipher[] = {
+0x52, 0x3e, 0x1b, 0x92, 0xd3, 0x3c, 0x9c, 0xbe,
+0x07, 0xdb, 0x4b, 0xb0, 0x80, 0xd0, 0x76, 0x2f,
+0xc7, 0x0a, 0x51, 0x9e, 0xe5, 0x64, 0x74, 0x07,
+0x05, 0x3c, 0x2d, 0x12, 0x8c, 0x5c, 0x12, 0x78,
+0xf1, 0x0b, 0x2c, 0xed, 0x9c, 0x4b, 0xbd, 0x96,
+0x3a, 0x0b, 0x6a, 0x76, 0x98, 0x72, 0x7a, 0x2e,
+0x15, 0x6d, 0x9d, 0xb8, 0xaa, 0x32, 0xc0, 0xfb,
+0x65, 0x2a, 0x5a, 0x3c, 0xa7, 0xff, 0xfd, 0x33,
+0x5c, 0x98, 0xcf, 0x86, 0x22, 0x2e, 0xdb, 0x52,
+0x93, 0xd5, 0x0b, 0xa6, 0xf2, 0x4b, 0x80, 0x24,
+0x6b, 0x3f, 0x54, 0xc4, 0x7e, 0xf8, 0x90, 0x22,
+0xc2, 0xf7, 0x7f, 0xcf, 0xf2, 0x5d, 0x4e, 0x50,
+0xf1, 0x5b, 0x8c, 0x79, 0x49, 0xbc, 0x26, 0xa9,
+0x1f, 0xea, 0x76, 0x7f, 0xd5, 0x14, 0x2b, 0xab,
+0x2b, 0x3a, 0xc7, 0x45, 0xaf, 0x39, 0x3d, 0xc4,
+0x13, 0x9f, 0x2f, 0x34, 0x8e, 0xa9, 0xec, 0xa5,
+0x95, 0xaf, 0x2c, 0xd4, 0x73, 0x9d, 0x2a, 0x89,
+0xb4, 0x55, 0x39, 0x6d, 0x89, 0x3c, 0xdf, 0xae,
+0x01, 0xab, 0x62, 0x3c, 0x98, 0x88, 0x07, 0x9e,
+0x1d, 0x81, 0x17, 0x08, 0xf7, 0xdd, 0x70, 0x57,
+};
+
+const u8 aes_cfb_cipher[] = {
+0x7e, 0x58, 0x16, 0xfa, 0xae, 0xf2, 0xd6, 0xd9,
+0xe8, 0x72, 0x0b, 0x60, 0x2e, 0x07, 0xe7, 0xe1,
+0x63, 0xbd, 0x24, 0xf2, 0xee, 0x2b, 0x6c, 0xcf,
+0xf2, 0x56, 0x27, 0xe2, 0x5c, 0x28, 0xcb, 0xc0,
+0xfa, 0xf9, 0x11, 0x16, 0xf8, 0xa1, 0x62, 0xd9,
+0x72, 0xe5, 0x41, 0x28, 0xfa, 0x4a, 0xc0, 0xa0,
+0x26, 0x3e, 0x24, 0x27, 0x25, 0xd3, 0x5e, 0x40,
+0xde, 0x4c, 0xd7, 0x36, 0xac, 0xa9, 0x65, 0x78,
+0x4e, 0x1e, 0x5f, 0xb3, 0x14, 0x85, 0x00, 0x68,
+0xdc, 0x3c, 0xa7, 0x88, 0xe1, 0x1a, 0x61, 0xa7,
+0xae, 0xa6, 0xdd, 0xb2, 0xd6, 0x93, 0x76, 0xe3,
+0xe5, 0x32, 0xbe, 0xc6, 0x21, 0x50, 0xda, 0xae,
+0xa1, 0xde, 0x21, 0x1c, 0xca, 0x7e, 0xeb, 0x65,
+0x22, 0xd3, 0x7d, 0x01, 0x39, 0xf4, 0x6b, 0xfe,
+0x84, 0x96, 0x41, 0x4b, 0x35, 0x51, 0x05, 0xe4,
+0xc1, 0x9a, 0xaa, 0xa7, 0x49, 0xc7, 0xfa, 0xca,
+0xfc, 0x35, 0xe2, 0xf3, 0xae, 0x5b, 0x80, 0xae,
+0x42, 0x7c, 0x07, 0x3a, 0xed, 0x67, 0x81, 0x1f,
+0x9a, 0x43, 0xc7, 0xc7, 0x91, 0xbf, 0xdf, 0x8c,
+0x6c, 0xe2, 0xb6, 0x5b, 0xa5, 0x93, 0x69, 0x08,
+};
+
+const u8 aes_ofb_cipher[] = {
+0x7e, 0x58, 0x16, 0xfa, 0xae, 0xf2, 0xd6, 0xd9,
+0xe8, 0x72, 0x0b, 0x60, 0x2e, 0x07, 0xe7, 0xe1,
+0x7c, 0xaa, 0xb3, 0x1b, 0x1c, 0x20, 0xc6, 0xea,
+0x02, 0x49, 0xe1, 0xe3, 0x77, 0xa0, 0xde, 0x76,
+0x83, 0x63, 0x73, 0x92, 0x0d, 0x2d, 0x41, 0xe7,
+0x3b, 0x00, 0x6b, 0x91, 0xf2, 0x05, 0x63, 0xbe,
+0xe6, 0xd5, 0x46, 0xe9, 0x8b, 0xeb, 0x8d, 0x77,
+0x8e, 0xf2, 0x14, 0x95, 0xfb, 0x99, 0x7e, 0xf0,
+0xb1, 0x80, 0xd0, 0x00, 0x00, 0x92, 0x8f, 0xe2,
+0x62, 0xa5, 0x21, 0x39, 0x04, 0x02, 0x16, 0x22,
+0x2f, 0xbb, 0x40, 0xdd, 0xfa, 0xfd, 0xb1, 0xb4,
+0x5b, 0x3c, 0x5a, 0xba, 0x9e, 0xd1, 0xc7, 0x60,
+0xb5, 0xc3, 0x54, 0x7b, 0x9f, 0xaa, 0x31, 0x4b,
+0x91, 0x0a, 0xf5, 0x0c, 0x39, 0x25, 0x2b, 0x77,
+0x61, 0xf6, 0x88, 0xf8, 0xa9, 0x18, 0x54, 0x47,
+0xe9, 0x21, 0x3b, 0x69, 0xe0, 0x11, 0x21, 0x43,
+0x0e, 0xe4, 0x9f, 0xc2, 0x83, 0x0a, 0x33, 0x80,
+0xb8, 0x07, 0x98, 0xba, 0xd5, 0xee, 0x63, 0x16,
+0x31, 0x2c, 0x1b, 0xdc, 0xd0, 0xb8, 0xcf, 0x0c,
+0xc5, 0x3f, 0x5b, 0x4a, 0x1f, 0x1b, 0x01, 0x39,
+};
+
+const u8 aes_ctr_cipher[] = {
+0x7e, 0x58, 0x16, 0xfa, 0xae, 0xf2, 0xd6, 0xd9,
+0xe8, 0x72, 0x0b, 0x60, 0x2e, 0x07, 0xe7, 0xe1,
+0x6d, 0xd2, 0xc5, 0x3c, 0x6b, 0x01, 0x48, 0x0b,
+0x63, 0x4c, 0x00, 0x3f, 0x9a, 0xc5, 0x67, 0xaf,
+0x7f, 0x00, 0x93, 0xd6, 0x48, 0xcf, 0xba, 0x2e,
+0x2f, 0xa6, 0x1f, 0x1c, 0x73, 0xb8, 0x6a, 0x42,
+0x7f, 0x0d, 0x83, 0x16, 0x60, 0xdb, 0x82, 0x36,
+0xa1, 0x4f, 0xe2, 0x08, 0x4c, 0xd9, 0x2e, 0xdf,
+0x12, 0x80, 0x71, 0x3f, 0x12, 0x8a, 0x5e, 0x8c,
+0xf5, 0xfc, 0x8b, 0xf3, 0x15, 0x92, 0x76, 0x11,
+0x29, 0x26, 0xd8, 0x6f, 0xe0, 0x52, 0xd0, 0x2a,
+0x9c, 0x50, 0x08, 0x79, 0x3d, 0x0e, 0x8c, 0x5c,
+0x2f, 0xb6, 0xff, 0x24, 0x44, 0x42, 0x53, 0xdd,
+0xaa, 0x7f, 0x19, 0x1d, 0xd4, 0x06, 0xda, 0xa8,
+0xd2, 0x40, 0x07, 0xf6, 0x0a, 0xb6, 0x3c, 0x21,
+0xdf, 0x5d, 0x3c, 0x9c, 0x35, 0x26, 0xea, 0x2c,
+0x14, 0x46, 0x76, 0xff, 0xc4, 0xee, 0x26, 0x7a,
+0x88, 0xde, 0x29, 0x2a, 0x48, 0x04, 0xb7, 0xaa,
+0x52, 0x4c, 0x52, 0xed, 0x64, 0xd4, 0x75, 0xe3,
+0xda, 0xa3, 0x42, 0xf4, 0xb8, 0x39, 0x78, 0x3b,
+};
+
+const u8 aes_cts_cipher[] = {
+0x52, 0x3e, 0x1b, 0x92, 0xd3, 0x3c, 0x9c, 0xbe,
+0x07, 0xdb, 0x4b, 0xb0, 0x80, 0xd0, 0x76, 0x2f,
+0xc7, 0x0a, 0x51, 0x9e, 0xe5, 0x64, 0x74, 0x07,
+0x05, 0x3c, 0x2d, 0x12, 0x8c, 0x5c, 0x12, 0x78,
+0xf1, 0x0b, 0x2c, 0xed, 0x9c, 0x4b, 0xbd, 0x96,
+0x3a, 0x0b, 0x6a, 0x76, 0x98, 0x72, 0x7a, 0x2e,
+0x15, 0x6d, 0x9d, 0xb8, 0xaa, 0x32, 0xc0, 0xfb,
+0x65, 0x2a, 0x5a, 0x3c, 0xa7, 0xff, 0xfd, 0x33,
+0x5c, 0x98, 0xcf, 0x86, 0x22, 0x2e, 0xdb, 0x52,
+0x93, 0xd5, 0x0b, 0xa6, 0xf2, 0x4b, 0x80, 0x24,
+0x6b, 0x3f, 0x54, 0xc4, 0x7e, 0xf8, 0x90, 0x22,
+0xc2, 0xf7, 0x7f, 0xcf, 0xf2, 0x5d, 0x4e, 0x50,
+0xf1, 0x5b, 0x8c, 0x79, 0x49, 0xbc, 0x26, 0xa9,
+0x1f, 0xea, 0x76, 0x7f, 0xd5, 0x14, 0x2b, 0xab,
+0x2b, 0x3a, 0xc7, 0x45, 0xaf, 0x39, 0x3d, 0xc4,
+0x13, 0x9f, 0x2f, 0x34, 0x8e, 0xa9, 0xec, 0xa5,
+0x01, 0xab, 0x62, 0x3c, 0x98, 0x88, 0x07, 0x9e,
+0x1d, 0x81, 0x17, 0x08, 0xf7, 0xdd, 0x70, 0x57,
+0x95, 0xaf, 0x2c, 0xd4, 0x73, 0x9d, 0x2a, 0x89,
+0xb4, 0x55, 0x39, 0x6d, 0x89, 0x3c, 0xdf, 0xae,
+};
+
+const unsigned char aes_xts_cipher[] = {
+0x8f, 0xe6, 0xeb, 0x96, 0xc8, 0x97, 0x63, 0x6f,
+0x6d, 0xdb, 0x9e, 0x1a, 0x78, 0xea, 0x69, 0x0a,
+0x52, 0x26, 0xe3, 0x63, 0x15, 0xab, 0xe7, 0x11,
+0xaf, 0x18, 0x15, 0x57, 0x7a, 0xd1, 0xe2, 0xac,
+0x43, 0x89, 0x95, 0x02, 0x19, 0xe0, 0x68, 0xf4,
+0x4b, 0x81, 0x3b, 0x5d, 0x9f, 0x68, 0x21, 0x56,
+0x30, 0x86, 0x73, 0xc5, 0xc8, 0x05, 0xeb, 0x86,
+0xef, 0x18, 0xe9, 0x49, 0xc1, 0xa8, 0x7f, 0x14,
+0xbc, 0x57, 0x38, 0x8d, 0x16, 0x85, 0x26, 0x1f,
+0x89, 0xab, 0xb8, 0xa9, 0xbd, 0x87, 0x9c, 0xd7,
+0xa1, 0x0d, 0x44, 0x6a, 0x09, 0xd9, 0x19, 0xb7,
+0x8e, 0x2a, 0xde, 0xbf, 0x53, 0x35, 0x28, 0x26,
+0x1e, 0x56, 0x2d, 0x76, 0x55, 0x1a, 0xf9, 0x03,
+0xfe, 0x75, 0x5c, 0xd0, 0x70, 0x83, 0x96, 0x6d,
+0x28, 0x7d, 0x22, 0x97, 0x04, 0xf9, 0x0c, 0x9f,
+0x96, 0x99, 0xa5, 0x6b, 0xae, 0x9d, 0x99, 0x95,
+0x16, 0x4b, 0xf9, 0xcb, 0xd7, 0xb0, 0x9f, 0x59,
+0xce, 0x87, 0xe2, 0x9d, 0x4d, 0x94, 0x6b, 0x56,
+0x44, 0x2a, 0x05, 0x15, 0x31, 0xf5, 0xca, 0xba,
+0x6c, 0xe5, 0x9d, 0x29, 0x14, 0x5f, 0x76, 0x90,
+};
+
+const u8 sm4_key[] = {
+	0x8e, 0x30, 0x09, 0x79, 0xae, 0xb3, 0x75, 0x13,
+	0xab, 0x03, 0x4d, 0x11, 0x62, 0xe0, 0xfe, 0x03,
+};
+
+const u8 sm4_twk_key[] = {
+	0xf3, 0x38, 0x97, 0xb9, 0xeb, 0x95, 0x7a, 0xf5,
+	0xed, 0x72, 0xd2, 0x6e, 0xfc, 0xf7, 0xd6, 0xa7,
+};
+
+const u8 sm4_iv[] = {
+	0x48, 0x5c, 0x38, 0x45, 0x26, 0xa8, 0x72, 0xd7,
+	0x49, 0x54, 0xbf, 0x41, 0x24, 0xe8, 0x97, 0xab,
+};
+
+const u8 sm4_ecb_cipher[] = {
+	0xbb, 0x4f, 0x2c, 0xa0, 0x5b, 0x78, 0x62, 0xc1,
+	0xad, 0xcf, 0xb1, 0x2b, 0x64, 0x95, 0xc8, 0xa8,
+	0xca, 0xa0, 0x62, 0xc5, 0xf4, 0x38, 0x8f, 0x51,
+	0x13, 0x41, 0x59, 0x96, 0xe7, 0x06, 0x71, 0xee,
+	0x72, 0xea, 0x87, 0xc3, 0xf7, 0xef, 0x7d, 0x49,
+	0xdf, 0xf2, 0xe5, 0x6f, 0x03, 0xeb, 0x4d, 0xca,
+	0x25, 0x42, 0x61, 0xee, 0x3f, 0x86, 0x48, 0x9a,
+	0xda, 0xc0, 0xcb, 0x88, 0x01, 0x2f, 0xdb, 0xc8,
+	0xee, 0x11, 0xa1, 0x98, 0x24, 0x3c, 0xf4, 0x86,
+	0x4b, 0x16, 0xf6, 0x5f, 0x91, 0xc6, 0x47, 0x25,
+	0xa0, 0x2d, 0x87, 0xb8, 0xbe, 0xdc, 0xd1, 0x55,
+	0x92, 0x74, 0x22, 0x5f, 0xbc, 0x97, 0x03, 0x4b,
+	0xda, 0x3f, 0x66, 0xd1, 0x22, 0xee, 0x3b, 0xd8,
+	0xfc, 0x55, 0x89, 0x80, 0xf7, 0x94, 0xe1, 0x3f,
+	0x4c, 0x78, 0xb9, 0x67, 0x35, 0x27, 0xf2, 0x05,
+	0x79, 0x59, 0xbd, 0x69, 0xec, 0x03, 0xd4, 0x61,
+	0x98, 0xc5, 0x75, 0x77, 0x8d, 0xcd, 0xc9, 0xe4,
+	0xa0, 0xe4, 0x2e, 0x9c, 0x55, 0x70, 0xb8, 0x3d,
+	0x81, 0xbf, 0x6b, 0xa3, 0x51, 0xb7, 0x41, 0xd3,
+	0x3e, 0x51, 0xae, 0xa5, 0x9e, 0x26, 0x71, 0xb1,
+};
+
+const u8 sm4_cbc_cipher[] = {
+	0x74, 0x79, 0xc4, 0xe5, 0xcc, 0x20, 0x40, 0x8b,
+	0x47, 0xdd, 0x90, 0xfb, 0x00, 0x08, 0xbb, 0xce,
+	0x6e, 0x18, 0x4b, 0x47, 0x45, 0xab, 0x79, 0x1c,
+	0x79, 0x8b, 0xc0, 0xd8, 0xe5, 0x87, 0x97, 0x9f,
+	0x2a, 0xa6, 0x77, 0x23, 0xd7, 0x13, 0xb5, 0x9c,
+	0x83, 0xd0, 0x6d, 0xb5, 0xa9, 0x2b, 0xa1, 0x27,
+	0x68, 0x78, 0xb1, 0x40, 0x82, 0xa1, 0x02, 0xc0,
+	0x6f, 0x41, 0xae, 0x74, 0x0f, 0x8f, 0x04, 0xb1,
+	0xdc, 0xc3, 0x90, 0x3d, 0x3f, 0x1a, 0x6a, 0xe0,
+	0x31, 0x3a, 0x89, 0x74, 0xc3, 0x15, 0x73, 0xb4,
+	0x6f, 0xb3, 0x19, 0xab, 0xc1, 0x14, 0x74, 0xb1,
+	0x50, 0xdb, 0x70, 0x97, 0x07, 0x80, 0x9c, 0xbb,
+	0x2f, 0x2b, 0xaf, 0x92, 0xdf, 0xc1, 0xe6, 0x12,
+	0x67, 0x53, 0x74, 0xe5, 0x36, 0x71, 0x88, 0xb6,
+	0x5d, 0xf5, 0x88, 0x77, 0xc2, 0x61, 0xab, 0xd4,
+	0xd8, 0xa6, 0x1c, 0x08, 0xde, 0x49, 0x0a, 0xe3,
+	0xd8, 0x32, 0x21, 0xca, 0xd1, 0xba, 0xfb, 0x9b,
+	0x52, 0xde, 0xe7, 0x72, 0x52, 0xd8, 0xa2, 0x7d,
+	0x39, 0x7c, 0x71, 0xb3, 0x06, 0x37, 0x3d, 0xb0,
+	0xda, 0x51, 0xc2, 0x7e, 0x4e, 0xc5, 0x6e, 0xe1,
+};
+
+const u8 sm4_ofb_cipher[] = {
+	0x17, 0xb0, 0xac, 0x00, 0x8a, 0x03, 0x6c, 0x7d,
+	0x98, 0x0e, 0x09, 0x18, 0x06, 0x85, 0x3e, 0x41,
+	0xae, 0x29, 0xbc, 0x78, 0xe2, 0x1b, 0xa9, 0x4b,
+	0xa0, 0x9d, 0xc7, 0xaa, 0x8f, 0x00, 0xe7, 0xb1,
+	0x1a, 0xff, 0x8a, 0x85, 0xbc, 0xc4, 0xf1, 0xfd,
+	0x28, 0xb2, 0xcf, 0xe2, 0x01, 0x4e, 0x52, 0xfd,
+	0x2d, 0x1a, 0xdf, 0x5e, 0x37, 0x9e, 0x48, 0x4f,
+	0x91, 0xa0, 0x83, 0x8e, 0xcb, 0x74, 0x9b, 0x53,
+	0xd1, 0x2b, 0xfe, 0x0a, 0x9d, 0x55, 0x27, 0x59,
+	0x98, 0x88, 0xc0, 0x49, 0x68, 0x4e, 0x1b, 0x40,
+	0x97, 0x82, 0x62, 0x47, 0x5b, 0x6e, 0x80, 0x52,
+	0x18, 0xa6, 0xd3, 0x73, 0x29, 0x53, 0xaa, 0x24,
+	0xb0, 0x93, 0xd1, 0x8a, 0xfa, 0x15, 0x46, 0xa7,
+	0x37, 0x4a, 0x53, 0x52, 0x1a, 0x6f, 0xc8, 0xb2,
+	0x88, 0x4b, 0xa9, 0xf1, 0x6f, 0xdb, 0xb1, 0x80,
+	0xf9, 0x32, 0x95, 0xf7, 0x61, 0x3d, 0xf0, 0x1f,
+	0xe3, 0x18, 0xb5, 0x03, 0x14, 0x1a, 0x72, 0x4a,
+	0xbd, 0xaa, 0x61, 0x30, 0xf0, 0xbd, 0x60, 0xff,
+	0x5b, 0x02, 0x0b, 0xe4, 0xfb, 0xae, 0x10, 0x2b,
+	0x90, 0x86, 0x74, 0x94, 0x45, 0xf5, 0x3b, 0x4a,
+};
+
+const u8 sm4_cfb_cipher[] = {
+	0x17, 0xb0, 0xac, 0x00, 0x8a, 0x03, 0x6c, 0x7d,
+	0x98, 0x0e, 0x09, 0x18, 0x06, 0x85, 0x3e, 0x41,
+	0x6e, 0x04, 0x0d, 0x4d, 0x87, 0x00, 0x36, 0xf3,
+	0xb8, 0x96, 0x9f, 0x84, 0x4b, 0x4b, 0x71, 0x21,
+	0x3c, 0xf1, 0xad, 0x3f, 0x8c, 0x75, 0xd6, 0xcf,
+	0x49, 0xfa, 0xb1, 0xbe, 0x61, 0xa3, 0x46, 0x36,
+	0x89, 0x8f, 0x1b, 0x81, 0xd4, 0x04, 0x99, 0x79,
+	0x20, 0x29, 0xd6, 0xe2, 0x46, 0x6b, 0x2d, 0xd3,
+	0x03, 0xba, 0x52, 0x13, 0xfd, 0x0c, 0x33, 0x15,
+	0x4d, 0xa1, 0x36, 0x6a, 0x65, 0xbb, 0xcd, 0x1f,
+	0xcc, 0x31, 0xbc, 0x53, 0xff, 0xbc, 0xe4, 0x2c,
+	0x5c, 0xc1, 0xbf, 0xcf, 0x7b, 0x17, 0xba, 0x19,
+	0xdd, 0x8b, 0x6d, 0x57, 0x4a, 0xbf, 0x9a, 0x4f,
+	0xc8, 0x25, 0xee, 0xbb, 0x83, 0x36, 0x3f, 0x41,
+	0x7b, 0x01, 0x39, 0xeb, 0x56, 0xfc, 0x0f, 0x4f,
+	0xea, 0xe1, 0x7f, 0xc7, 0x9e, 0xa2, 0x11, 0x10,
+	0x36, 0x63, 0x51, 0xe9, 0xef, 0x21, 0x65, 0xc6,
+	0xd7, 0x67, 0x53, 0xb0, 0xf3, 0x16, 0xa0, 0xe9,
+	0xcb, 0x57, 0x2c, 0x85, 0x0c, 0x0e, 0x3b, 0x7c,
+	0xc6, 0x01, 0x2e, 0x44, 0xc7, 0x03, 0x07, 0x69,
+};
+
+const u8 sm4_cts_cipher[] = {
+	0x74, 0x79, 0xc4, 0xe5, 0xcc, 0x20, 0x40, 0x8b,
+	0x47, 0xdd, 0x90, 0xfb, 0x00, 0x08, 0xbb, 0xce,
+	0x6e, 0x18, 0x4b, 0x47, 0x45, 0xab, 0x79, 0x1c,
+	0x79, 0x8b, 0xc0, 0xd8, 0xe5, 0x87, 0x97, 0x9f,
+	0x2a, 0xa6, 0x77, 0x23, 0xd7, 0x13, 0xb5, 0x9c,
+	0x83, 0xd0, 0x6d, 0xb5, 0xa9, 0x2b, 0xa1, 0x27,
+	0x68, 0x78, 0xb1, 0x40, 0x82, 0xa1, 0x02, 0xc0,
+	0x6f, 0x41, 0xae, 0x74, 0x0f, 0x8f, 0x04, 0xb1,
+	0xdc, 0xc3, 0x90, 0x3d, 0x3f, 0x1a, 0x6a, 0xe0,
+	0x31, 0x3a, 0x89, 0x74, 0xc3, 0x15, 0x73, 0xb4,
+	0x6f, 0xb3, 0x19, 0xab, 0xc1, 0x14, 0x74, 0xb1,
+	0x50, 0xdb, 0x70, 0x97, 0x07, 0x80, 0x9c, 0xbb,
+	0x2f, 0x2b, 0xaf, 0x92, 0xdf, 0xc1, 0xe6, 0x12,
+	0x67, 0x53, 0x74, 0xe5, 0x36, 0x71, 0x88, 0xb6,
+	0x5d, 0xf5, 0x88, 0x77, 0xc2, 0x61, 0xab, 0xd4,
+	0xd8, 0xa6, 0x1c, 0x08, 0xde, 0x49, 0x0a, 0xe3,
+	0x39, 0x7c, 0x71, 0xb3, 0x06, 0x37, 0x3d, 0xb0,
+	0xda, 0x51, 0xc2, 0x7e, 0x4e, 0xc5, 0x6e, 0xe1,
+	0xd8, 0x32, 0x21, 0xca, 0xd1, 0xba, 0xfb, 0x9b,
+	0x52, 0xde, 0xe7, 0x72, 0x52, 0xd8, 0xa2, 0x7d,
+};
+
+const u8 sm4_ctr_cipher[] = {
+	0x17, 0xb0, 0xac, 0x00, 0x8a, 0x03, 0x6c, 0x7d,
+	0x98, 0x0e, 0x09, 0x18, 0x06, 0x85, 0x3e, 0x41,
+	0xdd, 0xc6, 0x89, 0xb2, 0xc3, 0x2b, 0xf0, 0x17,
+	0x68, 0x33, 0xaa, 0x4f, 0x13, 0xb8, 0xd4, 0x93,
+	0x22, 0x3e, 0x92, 0x3b, 0xe8, 0xd4, 0x0a, 0x01,
+	0x8e, 0xfe, 0x3d, 0x8c, 0x65, 0xc3, 0xb5, 0xb1,
+	0xb7, 0x3c, 0x1f, 0x1b, 0xc9, 0xa0, 0x06, 0x3f,
+	0x01, 0xc8, 0x2c, 0xe2, 0x8c, 0x4f, 0xc4, 0xfa,
+	0x71, 0x9a, 0x6d, 0x73, 0x22, 0x22, 0xa3, 0xff,
+	0x3b, 0x09, 0xd6, 0x32, 0x01, 0xe8, 0x1c, 0xb6,
+	0xe0, 0x81, 0x16, 0xf3, 0x12, 0x32, 0x2b, 0x2e,
+	0x17, 0xae, 0x03, 0x80, 0x7d, 0xb9, 0xcc, 0x79,
+	0x62, 0xfd, 0x17, 0x2a, 0x93, 0x99, 0x53, 0x8b,
+	0x2d, 0xbb, 0x18, 0x8d, 0x44, 0xca, 0xcd, 0x4f,
+	0x02, 0x27, 0x5e, 0x18, 0x2d, 0x9e, 0x9a, 0x53,
+	0x9f, 0xd6, 0xe4, 0xf1, 0x56, 0x49, 0x61, 0x42,
+	0xcc, 0xe3, 0x86, 0x27, 0xf8, 0x83, 0x02, 0x52,
+	0x9e, 0xc8, 0x18, 0xf1, 0x61, 0x89, 0x01, 0x51,
+	0x5c, 0x81, 0xa8, 0x96, 0x28, 0xd3, 0xcc, 0xfc,
+	0x2f, 0x0d, 0xca, 0x45, 0xb6, 0x6f, 0xc4, 0xcf,
+};
+
+const u8 sm4_xts_cipher[] = {
+	0x00, 0xf3, 0x48, 0x66, 0x7e, 0x6a, 0x81, 0x0b,
+	0xf3, 0xd2, 0xcd, 0xd5, 0x29, 0x1b, 0x00, 0x3b,
+	0x72, 0xbc, 0x2d, 0xc8, 0xe5, 0x35, 0xc4, 0x58,
+	0xc9, 0x0a, 0x9c, 0xc8, 0xed, 0x5f, 0x9e, 0x71,
+	0xb1, 0x6b, 0xb5, 0xe1, 0x88, 0x58, 0x96, 0x1f,
+	0x22, 0x8d, 0xe6, 0x57, 0x24, 0x6f, 0xfd, 0x7f,
+	0xc3, 0x95, 0xf8, 0x67, 0xea, 0xba, 0x12, 0xd1,
+	0xb8, 0x72, 0xb0, 0xf8, 0xcc, 0xf8, 0x9d, 0xbf,
+	0xac, 0x3d, 0x62, 0xac, 0x95, 0xce, 0x05, 0x0d,
+	0x22, 0x66, 0xf0, 0xf8, 0x7f, 0x68, 0x75, 0x4e,
+	0xd8, 0x0c, 0x49, 0x04, 0x1b, 0xf6, 0xac, 0xc8,
+	0x84, 0x70, 0xdd, 0xf1, 0x2c, 0xe8, 0x21, 0xcf,
+	0xce, 0xf3, 0x69, 0x60, 0x20, 0x97, 0x21, 0x42,
+	0xf8, 0xf7, 0x3d, 0xa3, 0x6a, 0x3f, 0x37, 0x8c,
+	0xa2, 0x99, 0x09, 0x24, 0xfd, 0x7c, 0x31, 0x61,
+	0x83, 0x09, 0x6d, 0x35, 0x58, 0x60, 0x3b, 0x65,
+	0x2f, 0x5a, 0x11, 0x32, 0x89, 0x99, 0x5e, 0x6e,
+	0x66, 0x94, 0x56, 0x33, 0xb0, 0x5a, 0xc6, 0x16,
+	0x9b, 0xd3, 0x46, 0xbb, 0x55, 0xc0, 0xa2, 0x4b,
+	0x24, 0x73, 0x30, 0x7e, 0x74, 0x5f, 0x67, 0x08,
+};
+#endif
+
+const u8 hash_md5[] = {
+0x01, 0xea, 0x0b, 0xa4, 0xa9, 0x88, 0xa2, 0xea,
+0x55, 0x1d, 0x7b, 0xab, 0xdb, 0xa3, 0x96, 0x0f,
+};
+
+const u8 hash_sha1[] = {
+0xe5, 0xfe, 0x0b, 0x07, 0x06, 0xaf, 0xdb, 0x15,
+0x9b, 0x53, 0xf2, 0xf4, 0x42, 0x35, 0xd0, 0x82,
+0xcf, 0xce, 0x99, 0xed,
+};
+
+const u8 hash_sha256[] = {
+0x9b, 0xa8, 0x85, 0x0a, 0xa8, 0x2c, 0x21, 0x6a,
+0x36, 0x89, 0xf8, 0x0f, 0x10, 0xa4, 0x0d, 0x01,
+0x8b, 0x1c, 0xce, 0x7e, 0xe4, 0xa2, 0xc8, 0xa8,
+0xa7, 0xff, 0x4d, 0x4b, 0x14, 0x1a, 0x67, 0xf0,
+};
+
+const u8 hash_sha224[] = {
+0x21, 0x55, 0x40, 0x7b, 0x94, 0x32, 0x53, 0xd8,
+0x6c, 0x12, 0xca, 0x44, 0xf4, 0x5c, 0x98, 0xe3,
+0x1a, 0x5c, 0xbf, 0xe7, 0x05, 0x91, 0x0c, 0xd0,
+0xd2, 0x54, 0x95, 0x56,
+};
+
+const u8 hash_sha512[] = {
+0xbb, 0x32, 0xe9, 0x7b, 0x49, 0x5e, 0x1a, 0xe0,
+0x3b, 0xb7, 0x20, 0xbd, 0xa8, 0xec, 0x91, 0x7e,
+0x3d, 0xfa, 0xd5, 0x60, 0x71, 0x6c, 0x9f, 0xa8,
+0xf6, 0x48, 0xea, 0x93, 0x7c, 0x81, 0xe1, 0x59,
+0xfb, 0x3e, 0xe3, 0xb8, 0xbd, 0x77, 0x31, 0xf2,
+0xa2, 0x64, 0x20, 0x40, 0x8d, 0x6f, 0x11, 0xd3,
+0x30, 0xcc, 0x65, 0xd2, 0x56, 0xc9, 0xd8, 0x5e,
+0x0d, 0x18, 0xe0, 0xfe, 0x7c, 0x7c, 0x2f, 0x57,
+};
+
+const u8 hash_sha384[] = {
+0x80, 0x27, 0xc1, 0xb9, 0x84, 0x51, 0xf1, 0x50,
+0x9e, 0xa5, 0x26, 0xac, 0xc6, 0x01, 0x20, 0xbb,
+0xeb, 0x00, 0x5d, 0x9a, 0x21, 0x2c, 0xde, 0x5a,
+0x36, 0x5d, 0x1d, 0xca, 0xfb, 0xf7, 0x8b, 0x78,
+0xfb, 0x61, 0x0d, 0x86, 0x9b, 0x3d, 0x7a, 0xf3,
+0xfa, 0x8b, 0x80, 0x4a, 0x7f, 0xb7, 0x56, 0xf7,
+};
+
+const u8 hash_sha512_224[] = {
+0x15, 0x52, 0x59, 0xea, 0xe2, 0x4b, 0xa7, 0xc6,
+0x26, 0xd1, 0x27, 0x59, 0x26, 0x3a, 0x78, 0x63,
+0x2b, 0xed, 0x33, 0x8f, 0xba, 0x07, 0xee, 0x13,
+0x2f, 0xfb, 0x88, 0xab,
+};
+
+const u8 hash_sha512_256[] = {
+0x99, 0x6d, 0x6f, 0xe2, 0xf8, 0x44, 0x62, 0x68,
+0xe5, 0x58, 0x86, 0x6c, 0xab, 0x5b, 0x91, 0x97,
+0x63, 0x36, 0x05, 0x0a, 0xa4, 0x77, 0xc9, 0x70,
+0x46, 0xcb, 0x06, 0xc6, 0xaf, 0x69, 0x7f, 0xc7,
+};
+
+const u8 hash_sm3[] = {
+0x23, 0x03, 0xa3, 0xf1, 0xaa, 0x24, 0x8f, 0x13,
+0xae, 0xea, 0x16, 0x6d, 0xd0, 0xce, 0xe8, 0x25,
+0x34, 0xb3, 0x02, 0x61, 0xce, 0xaa, 0x00, 0xdc,
+0xf1, 0x0d, 0x34, 0x92, 0x02, 0x08, 0x49, 0xbb,
+};
+
+#if CONFIG_IS_ENABLED(ROCKCHIP_CIPHER)
+
+const u8 hmac_key[] = {
+0x12, 0x83, 0x3f, 0x50, 0x37, 0x48, 0xcc, 0x23,
+0x6f, 0xe3, 0x49, 0x6d, 0x60, 0xc0, 0x7f, 0x46,
+0xd9, 0x7c, 0x4d, 0x88, 0x77, 0x1c, 0x01, 0x6c,
+0x99, 0x49, 0x14, 0x1a, 0x7b, 0xb2, 0x6c, 0xf7,
+};
+
+const u8 hmac_sha1[] = {
+0x83, 0x95, 0xf2, 0x9f, 0x9f, 0x99, 0x94, 0x48,
+0x63, 0x72, 0xda, 0xc1, 0xfb, 0x4f, 0xf0, 0xf5,
+0x68, 0x4a, 0xf1, 0x24,
+};
+
+const u8 hmac_sha256[] = {
+0xbf, 0x56, 0x68, 0xc0, 0xa8, 0x0b, 0x87, 0xb4,
+0xcf, 0x76, 0xb8, 0x39, 0xec, 0xbc, 0x90, 0xd2,
+0x05, 0x04, 0x86, 0x3d, 0x80, 0x5d, 0xbe, 0xe2,
+0x1a, 0xcc, 0x8f, 0x9a, 0x06, 0xdb, 0x08, 0x3c,
+};
+
+const u8 hmac_sha512[] = {
+0xdd, 0xab, 0x41, 0x15, 0x43, 0x02, 0xa7, 0x0f,
+0xef, 0x8f, 0x39, 0x20, 0xdf, 0x30, 0xb7, 0xa7,
+0x56, 0x12, 0x8c, 0xcc, 0xff, 0x43, 0x9f, 0xc7,
+0xad, 0x35, 0x07, 0x82, 0xcd, 0x82, 0x44, 0xa5,
+0x4a, 0x66, 0x4e, 0x5b, 0x8a, 0xa9, 0xfd, 0x5d,
+0x43, 0x38, 0x65, 0x11, 0x13, 0xd3, 0xc8, 0x2f,
+0xa2, 0x38, 0x95, 0x8b, 0x0e, 0xd5, 0x30, 0xc5,
+0x9f, 0xd8, 0x76, 0x15, 0x34, 0x69, 0xb5, 0xd5,
+};
+
+const u8 hmac_md5[] = {
+0x28, 0x6e, 0x5c, 0xf1, 0xac, 0x21, 0x35, 0x92,
+0x12, 0xf5, 0x75, 0xff, 0x55, 0xe2, 0x09, 0x5a,
+};
+
+const u8 hmac_sm3[] = {
+0xad, 0x34, 0xd6, 0xae, 0x03, 0x4a, 0x99, 0x5b,
+0x0d, 0x2c, 0x8c, 0x5a, 0xb9, 0x57, 0x93, 0xd1,
+0xf0, 0x2c, 0x5b, 0x68, 0x35, 0x0e, 0x3e, 0xae,
+0xda, 0x6e, 0xdf, 0xad, 0x2c, 0xfd, 0x61, 0x3d,
+};
+#endif
+
+#if CONFIG_IS_ENABLED(ROCKCHIP_RSA)
+
+const u8 rsa2048_n[] = {
+0x4d, 0xcf, 0xbf, 0x13, 0xf2, 0x45, 0xa6, 0xe4,
+0x45, 0x0c, 0x12, 0x51, 0x1e, 0xe3, 0x2f, 0xfa,
+0x0d, 0xf0, 0xfb, 0x33, 0x1c, 0x05, 0xf8, 0xd6,
+0x61, 0x18, 0x32, 0x4e, 0x92, 0x40, 0xed, 0x0b,
+0x96, 0x8f, 0x53, 0xb5, 0xf8, 0xc4, 0x8c, 0x23,
+0xbd, 0x09, 0x36, 0xfc, 0x29, 0x5b, 0xef, 0x39,
+0x38, 0x8d, 0xf7, 0xd1, 0xe8, 0x67, 0x7e, 0x52,
+0x64, 0x9d, 0xc2, 0xb4, 0xbb, 0x13, 0x4a, 0x71,
+0x40, 0xd2, 0xca, 0xd4, 0x7e, 0x1a, 0x40, 0x7e,
+0x56, 0xa1, 0x47, 0x7d, 0x7f, 0xb1, 0x0c, 0x8d,
+0x01, 0xe1, 0xa5, 0xb4, 0xd3, 0x4a, 0x94, 0x7a,
+0x95, 0xc8, 0x87, 0x02, 0xcc, 0x98, 0x37, 0x85,
+0x58, 0x5f, 0x02, 0x50, 0xa0, 0x46, 0x0c, 0xe5,
+0x4e, 0xac, 0x50, 0xce, 0x27, 0x8e, 0x28, 0xdc,
+0xfe, 0xb8, 0xc4, 0xd7, 0x52, 0xf1, 0x8f, 0x73,
+0x5b, 0xa7, 0xa4, 0x19, 0x64, 0x83, 0xfd, 0x93,
+0x10, 0x0d, 0xbe, 0x1a, 0x7b, 0xa5, 0xad, 0xda,
+0x2b, 0xfe, 0x87, 0xf0, 0x13, 0x7a, 0x66, 0x42,
+0x11, 0x45, 0x9d, 0xc3, 0xbf, 0x91, 0x60, 0x30,
+0x32, 0x9d, 0x80, 0x8f, 0x64, 0xd0, 0x13, 0x10,
+0x38, 0xb8, 0x10, 0xaf, 0x6f, 0x44, 0x05, 0x81,
+0xf2, 0xc1, 0xe4, 0x1f, 0xe4, 0x9d, 0xee, 0x96,
+0xfa, 0x4b, 0xff, 0xdb, 0xd3, 0xb0, 0x32, 0x8f,
+0x2a, 0x95, 0x13, 0x3d, 0x7f, 0x6d, 0x60, 0x0f,
+0xd8, 0xf4, 0xbc, 0xdc, 0x7f, 0xf9, 0xd3, 0x0f,
+0x00, 0x4b, 0xdb, 0xd7, 0x69, 0x84, 0xd1, 0x0e,
+0xa4, 0x3c, 0x50, 0x14, 0xdb, 0x19, 0xcc, 0x47,
+0xb2, 0x9f, 0x4b, 0x3b, 0x1d, 0x90, 0x8e, 0xe6,
+0xbc, 0xd3, 0x4e, 0x33, 0xaa, 0x30, 0x63, 0x52,
+0xb7, 0x68, 0xe5, 0x46, 0xd0, 0x85, 0xad, 0x09,
+0x9c, 0xd8, 0x0a, 0xee, 0x68, 0x51, 0xe5, 0xd3,
+0x32, 0x04, 0x1a, 0x8a, 0x0a, 0xd8, 0x1d, 0x61,
+};
+
+const u8 rsa2048_e[] = {
+0x01, 0x00, 0x01
+};
+
+const u8 rsa2048_c[] = {
+0x5f, 0x2f, 0xd1, 0xa1, 0x85, 0x3b, 0x07, 0xd3,
+0xf2, 0x93, 0x21, 0xcc, 0x28, 0xfb, 0x80, 0x0a,
+0xc1, 0x52, 0x83, 0xbf, 0x6d, 0xea, 0x4f, 0x54,
+0x74, 0x2f, 0x58, 0xcc, 0xef, 0x37, 0x3b, 0x8c,
+0xe3, 0x5a, 0xa4, 0x81, 0x77, 0x9a, 0x0b, 0x72,
+0xb5, 0x58, 0x36, 0xf3, 0x17, 0x80, 0x47, 0x90,
+0xb3, 0x8c, 0x18, 0xb3, 0x2e, 0x15, 0xd4, 0xf0,
+0x71, 0xf2, 0x6f, 0x3e, 0xfd, 0x51, 0xf7, 0xc4,
+0xb0, 0x60, 0x06, 0xb8, 0x47, 0x12, 0x89, 0x5f,
+0xfd, 0x2b, 0xb5, 0x2c, 0x25, 0x10, 0x5f, 0xac,
+0x88, 0x6a, 0xb5, 0xd7, 0x1c, 0x44, 0x53, 0x04,
+0x87, 0x88, 0xd0, 0xae, 0x3d, 0xc0, 0x59, 0x1e,
+0xc5, 0x99, 0x56, 0x00, 0x2b, 0x5a, 0x9d, 0xce,
+0x17, 0xa1, 0x85, 0xd6, 0xff, 0x07, 0x91, 0x2d,
+0x7b, 0xe3, 0x6e, 0xc5, 0x21, 0xb0, 0xd0, 0x5e,
+0xa8, 0x3c, 0xee, 0xa9, 0xbd, 0x43, 0x50, 0xde,
+0xe2, 0xa4, 0x94, 0xb1, 0x10, 0x20, 0x55, 0x81,
+0xa8, 0xcf, 0x24, 0x10, 0x65, 0xe2, 0x80, 0xd6,
+0x08, 0xf4, 0xf9, 0xeb, 0xae, 0xde, 0xbb, 0xcb,
+0xa2, 0x2f, 0x04, 0x15, 0x0b, 0xed, 0xcd, 0x4d,
+0xca, 0xf8, 0x61, 0x46, 0xf5, 0xd6, 0xcb, 0x60,
+0x86, 0x4c, 0x16, 0x7e, 0x7c, 0x1f, 0x53, 0xb7,
+0x92, 0xff, 0xd2, 0x35, 0xcf, 0xa6, 0xf5, 0xfc,
+0x75, 0xf5, 0x1e, 0x1a, 0xd4, 0x68, 0xa6, 0x58,
+0x4d, 0x63, 0xf5, 0xbf, 0x05, 0xdc, 0x67, 0xd1,
+0xdc, 0xed, 0x08, 0x9d, 0x75, 0xe3, 0xb5, 0x2f,
+0xad, 0x32, 0xd5, 0xce, 0xb7, 0x03, 0xfb, 0xfd,
+0xb9, 0x49, 0xec, 0x40, 0xe5, 0x76, 0x01, 0xc5,
+0xcf, 0xc6, 0x07, 0xc3, 0x03, 0xee, 0xbc, 0x92,
+0xf8, 0xdc, 0x76, 0xd8, 0x99, 0x11, 0xd5, 0x1e,
+0x02, 0x7a, 0xca, 0x0e, 0x60, 0x58, 0x4e, 0xc1,
+0x0e, 0x35, 0x27, 0xec, 0xaa, 0x31, 0x97, 0x19,
+};
+
+const u8 rsa2048_d[] = {
+0x21, 0x36, 0x36, 0x52, 0x38, 0x04, 0x00, 0xbd,
+0xae, 0xb8, 0x5b, 0x13, 0xcc, 0xb6, 0xbb, 0x48,
+0x25, 0x65, 0x54, 0x27, 0x6c, 0x2b, 0x0b, 0x0a,
+0x2d, 0xcf, 0xdb, 0x60, 0x35, 0xac, 0xe9, 0x7b,
+0xe8, 0xe5, 0xb7, 0x77, 0x37, 0xcd, 0x16, 0xf2,
+0xf4, 0x4b, 0x22, 0x0f, 0xe2, 0x38, 0x76, 0x7d,
+0xe8, 0x39, 0x74, 0x8a, 0x50, 0x36, 0x6e, 0xbf,
+0xb9, 0xb9, 0x5f, 0xb4, 0x0a, 0x39, 0x0f, 0xb7,
+0xc9, 0x61, 0x26, 0x4c, 0xd7, 0x0b, 0x45, 0xd3,
+0x9a, 0xbb, 0xca, 0xbe, 0xaa, 0x7e, 0xc1, 0x6e,
+0x63, 0x1b, 0xe9, 0xa5, 0x21, 0x45, 0xb9, 0x92,
+0x3d, 0xd6, 0xd2, 0xaa, 0x4f, 0x02, 0x26, 0x02,
+0x52, 0xfe, 0x68, 0xc6, 0x91, 0x86, 0x30, 0xcb,
+0x33, 0xe0, 0xb8, 0xd8, 0xda, 0x44, 0x5a, 0x41,
+0x1c, 0x99, 0x30, 0x41, 0x26, 0xaf, 0x85, 0xae,
+0xbf, 0xbe, 0x6b, 0x83, 0xf7, 0xef, 0x3a, 0x66,
+0x21, 0x77, 0xc4, 0xf4, 0x27, 0x3d, 0xaf, 0x31,
+0x6b, 0xbe, 0xb4, 0xd5, 0x3a, 0xff, 0x3f, 0xdd,
+0x10, 0xd0, 0xb7, 0xd4, 0x75, 0xf9, 0x79, 0xd6,
+0xc3, 0x22, 0x62, 0xfe, 0x3f, 0x49, 0xc5, 0x9e,
+0xc9, 0xec, 0xcd, 0x1e, 0x9a, 0x3d, 0xaf, 0x10,
+0xd8, 0x2b, 0x89, 0xa3, 0x20, 0x5a, 0x00, 0xaa,
+0x08, 0xca, 0x33, 0x6b, 0x49, 0x72, 0x87, 0x6c,
+0xf7, 0x00, 0x74, 0x76, 0xcd, 0x19, 0xc6, 0x92,
+0x52, 0xa3, 0xe6, 0x67, 0x11, 0xea, 0x20, 0x87,
+0x20, 0x1d, 0x16, 0x5d, 0x1d, 0x5b, 0x3c, 0xa2,
+0xe0, 0x6e, 0x78, 0xa7, 0xf1, 0xae, 0x31, 0x42,
+0x29, 0xc7, 0x2b, 0xd5, 0xed, 0x75, 0xc9, 0xac,
+0x78, 0xc5, 0xa0, 0x5d, 0x69, 0x1c, 0x67, 0x4f,
+0xcb, 0x3f, 0x40, 0x7e, 0x2f, 0x68, 0x22, 0x77,
+0x84, 0x6e, 0xd5, 0x8c, 0x8d, 0x48, 0xf9, 0x02,
+0x36, 0x22, 0x90, 0x19, 0x0a, 0xf2, 0x54, 0x51,
+};
+
+const u8 rsa2048_sign_in[] = {
+0x21, 0x5b, 0x61, 0xed, 0xff, 0xe7, 0xc1, 0x8c,
+0x80, 0xa7, 0xad, 0xd7, 0x1b, 0xa1, 0x20, 0xc6,
+0x0d, 0xad, 0x01, 0x2d, 0x3c, 0x4c, 0x5f, 0x3d,
+0x16, 0xde, 0x24, 0x6e, 0xc8, 0xfc, 0x9e, 0x9a,
+0x19, 0x02, 0x0e, 0x8f, 0x6d, 0x39, 0x45, 0x5d,
+0xc7, 0xdc, 0x7d, 0x2a, 0x53, 0x61, 0xed, 0xf9,
+0x28, 0x83, 0x48, 0xe6, 0x39, 0xb2, 0x84, 0x6d,
+0xd2, 0xa5, 0xa5, 0x27, 0x60, 0x07, 0x92, 0xa9,
+0xf5, 0x50, 0x00, 0xb5, 0x93, 0x77, 0x74, 0xd7,
+0x67, 0x88, 0x43, 0xf0, 0x2f, 0xbb, 0x7b, 0x14,
+0x59, 0xdf, 0x98, 0x96, 0xa3, 0x31, 0x7c, 0x29,
+0x9a, 0x20, 0x4b, 0x1a, 0x8e, 0xc9, 0xf8, 0xde,
+0x31, 0x51, 0x84, 0x3f, 0x5a, 0xbb, 0xcc, 0xc2,
+0xfe, 0x09, 0x10, 0xb4, 0x94, 0x8a, 0x8a, 0x74,
+0x8c, 0xec, 0x3b, 0x07, 0x03, 0x35, 0x18, 0x8a,
+0x75, 0xce, 0x15, 0x48, 0xeb, 0x66, 0x93, 0xd3,
+0x33, 0x20, 0x7e, 0xe0, 0xd9, 0x8f, 0x1f, 0x9b,
+0xaf, 0x85, 0x50, 0x2b, 0xf6, 0x83, 0x84, 0xf2,
+0xed, 0x4c, 0x78, 0xd6, 0x2c, 0x66, 0x11, 0xf9,
+0xe7, 0xc0, 0x87, 0xa7, 0xe1, 0xa3, 0x35, 0xf2,
+0xd9, 0xe2, 0xf5, 0xbb, 0x01, 0x55, 0x3a, 0x02,
+0xcf, 0x39, 0x85, 0x08, 0x7b, 0xb0, 0x29, 0xfc,
+0x83, 0xaf, 0x4b, 0xb9, 0x44, 0xa7, 0xe5, 0xfa,
+0xc4, 0xaa, 0xb3, 0xcb, 0xb8, 0xff, 0x24, 0x16,
+0x46, 0x24, 0x13, 0x3a, 0x6a, 0x51, 0x37, 0x32,
+0xbd, 0xb6, 0xe2, 0x81, 0xbe, 0x4a, 0x20, 0xb2,
+0x18, 0xc7, 0x52, 0xf0, 0x21, 0xe8, 0xb8, 0x0c,
+0xbf, 0xed, 0x28, 0x1b, 0x65, 0x94, 0x26, 0xb2,
+0xc2, 0xa9, 0x97, 0x4e, 0xd6, 0xc7, 0x97, 0xf1,
+0x2d, 0x17, 0x16, 0xf0, 0xc2, 0x07, 0x72, 0x78,
+0xff, 0xd8, 0xf2, 0x46, 0x23, 0x4f, 0x23, 0x54,
+0x6f, 0x51, 0x59, 0x92, 0xa5, 0xaf, 0x1c, 0x35,
+};
+
+const u8 rsa2048_sign_out[] = {
+0x8a, 0x31, 0xf2, 0x91, 0xe3, 0x62, 0x5a, 0xa2,
+0x73, 0xaa, 0xc2, 0x17, 0x1f, 0xec, 0x13, 0xc5,
+0xcf, 0x62, 0xef, 0x52, 0x73, 0x5c, 0x14, 0x74,
+0xf8, 0xdd, 0xda, 0x75, 0xa4, 0x07, 0x42, 0x98,
+0x97, 0x59, 0xa6, 0x02, 0xcf, 0xbe, 0x8c, 0xe5,
+0x0b, 0x48, 0x5c, 0xec, 0xb8, 0x0c, 0xaf, 0xcb,
+0xa5, 0x65, 0xc9, 0x2c, 0xb4, 0x05, 0x9f, 0x33,
+0xd8, 0x97, 0x48, 0xa4, 0x06, 0xda, 0xf1, 0xbf,
+0x29, 0x33, 0xc4, 0xb4, 0xf8, 0x86, 0x58, 0xfc,
+0x38, 0x45, 0x40, 0xcd, 0xf0, 0x89, 0x69, 0xa1,
+0x2a, 0x4e, 0x19, 0x82, 0xf1, 0xfc, 0x1f, 0x4a,
+0xc5, 0xa9, 0xac, 0xd9, 0xf9, 0x56, 0xf3, 0x3f,
+0x5d, 0xf3, 0x05, 0xfa, 0xec, 0x0c, 0x8b, 0xc2,
+0x69, 0x7e, 0xe0, 0x12, 0x52, 0xb8, 0x5f, 0x43,
+0xb9, 0xea, 0x0e, 0xe8, 0x67, 0xb2, 0xf2, 0xac,
+0xeb, 0x2a, 0x66, 0xc6, 0xd5, 0x9a, 0x5e, 0x7c,
+0x9e, 0x11, 0x82, 0xa1, 0xc2, 0x59, 0xfe, 0xd3,
+0xfd, 0x67, 0x56, 0x6e, 0x60, 0x86, 0xe9, 0xcc,
+0x36, 0x76, 0x68, 0x62, 0xda, 0x71, 0xf2, 0xea,
+0x4a, 0xbb, 0x2d, 0xb4, 0xf7, 0xf3, 0x74, 0xf8,
+0x6e, 0xa5, 0xeb, 0x26, 0x91, 0xe4, 0xa7, 0x25,
+0x76, 0x28, 0xd1, 0x3f, 0x0a, 0x63, 0x7a, 0xfa,
+0x4f, 0x05, 0x03, 0xf6, 0xd8, 0xce, 0x4f, 0x06,
+0xea, 0x0c, 0xde, 0x08, 0xed, 0xda, 0x07, 0xac,
+0x8a, 0x5e, 0xa6, 0xfc, 0x03, 0x12, 0x02, 0x86,
+0xc0, 0x3a, 0x37, 0x9e, 0xf5, 0x59, 0xd7, 0x64,
+0xca, 0x39, 0x31, 0xf5, 0xf2, 0x59, 0x0b, 0xc9,
+0xa8, 0xae, 0x06, 0x65, 0xd6, 0x4a, 0xed, 0x36,
+0x12, 0xe8, 0x0a, 0x8f, 0x08, 0x92, 0xf3, 0x78,
+0x4e, 0xe6, 0xf0, 0x96, 0x2d, 0xcd, 0x2b, 0xaa,
+0xe7, 0xb2, 0x7f, 0xd4, 0x59, 0x4c, 0xf9, 0x1a,
+0x22, 0xff, 0x60, 0x1a, 0xa5, 0x71, 0x0c, 0x00,
+};
+
+#endif
+
+#endif

commit 49a2135e4b869844b65124bf91e88486c793cb1d
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Fri Feb 26 14:21:18 2021 +0800

    drivers: crypto: add des/aes/sm4/hmac support
    
    Crypto V2 implements the following interfaces:
    DES:  ECB/CBC/CFB/OFB
    AES:  ECB/CBC/CFB/OFB/CTS/CTR/XTS
    SM4:  ECB/CBC/CFB/OFB/CTS/CTR/XTS
    HASH: SM3
    HMAC: MD5/SHA1/SHA256/SHA512/SM3
    
    Change-Id: I10472c69912a07aeeacf0166b6a1a02780f411c9
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/drivers/crypto/crypto-uclass.c b/drivers/crypto/crypto-uclass.c
index c1c4c08bc9..6e17e2eafd 100644
--- a/drivers/crypto/crypto-uclass.c
+++ b/drivers/crypto/crypto-uclass.c
@@ -34,17 +34,31 @@ static const u8 null_hash_sha512_value[] = {
 	0xa5, 0x38, 0x32, 0x7a, 0xf9, 0x27, 0xda, 0x3e
 };
 
+const static u8 null_hash_sm3_value[] = {
+	0x1a, 0xb2, 0x1d, 0x83, 0x55, 0xcf, 0xa1, 0x7f,
+	0x8e, 0x61, 0x19, 0x48, 0x31, 0xe8, 0x1a, 0x8f,
+	0x22, 0xbe, 0xc8, 0xc7, 0x28, 0xfe, 0xfb, 0x74,
+	0x7e, 0xd0, 0x35, 0xeb, 0x50, 0x82, 0xaa, 0x2b
+};
+
 u32 crypto_algo_nbits(u32 algo)
 {
 	switch (algo) {
 	case CRYPTO_MD5:
+	case CRYPTO_HMAC_MD5:
 		return 128;
 	case CRYPTO_SHA1:
+	case CRYPTO_HMAC_SHA1:
 		return 160;
 	case CRYPTO_SHA256:
+	case CRYPTO_HMAC_SHA256:
 		return 256;
 	case CRYPTO_SHA512:
+	case CRYPTO_HMAC_SHA512:
 		return 512;
+	case CRYPTO_SM3:
+	case CRYPTO_HMAC_SM3:
+		return 256;
 	case CRYPTO_RSA512:
 		return 512;
 	case CRYPTO_RSA1024:
@@ -139,6 +153,10 @@ int crypto_sha_final(struct udevice *dev, sha_context *ctx, u8 *output)
 			null_hash = null_hash_sha512_value;
 			hash_size = sizeof(null_hash_sha512_value);
 			break;
+		case CRYPTO_SM3:
+			null_hash = null_hash_sm3_value;
+			hash_size = sizeof(null_hash_sm3_value);
+			break;
 		default:
 			return -EINVAL;
 		}
@@ -154,6 +172,43 @@ int crypto_sha_final(struct udevice *dev, sha_context *ctx, u8 *output)
 	return ops->sha_final(dev, ctx, output);
 }
 
+int crypto_hmac_init(struct udevice *dev, sha_context *ctx,
+		     u8 *key, u32 key_len)
+{
+	const struct dm_crypto_ops *ops = device_get_ops(dev);
+
+	if (ctx && !ctx->length)
+		return -EINVAL;
+
+	if (!ops || !ops->hmac_init)
+		return -ENOSYS;
+
+	return ops->hmac_init(dev, ctx, key, key_len);
+}
+
+int crypto_hmac_update(struct udevice *dev, u32 *input, u32 len)
+{
+	const struct dm_crypto_ops *ops = device_get_ops(dev);
+
+	if (!len)
+		return 0;
+
+	if (!ops || !ops->hmac_update)
+		return -ENOSYS;
+
+	return ops->hmac_update(dev, input, len);
+}
+
+int crypto_hmac_final(struct udevice *dev, sha_context *ctx, u8 *output)
+{
+	const struct dm_crypto_ops *ops = device_get_ops(dev);
+
+	if (!ops || !ops->hmac_final)
+		return -ENOSYS;
+
+	return ops->hmac_final(dev, ctx, output);
+}
+
 int crypto_sha_csum(struct udevice *dev, sha_context *ctx,
 		    char *input, u32 input_len, u8 *output)
 {
@@ -206,6 +261,17 @@ int crypto_rsa_verify(struct udevice *dev, rsa_key *ctx, u8 *sign, u8 *output)
 	return ops->rsa_verify(dev, ctx, sign, output);
 }
 
+int crypto_cipher(struct udevice *dev, cipher_context *ctx,
+		  const u8 *in, u8 *out, u32 len, bool enc)
+{
+	const struct dm_crypto_ops *ops = device_get_ops(dev);
+
+	if (!ops || !ops->cipher_crypt)
+		return -ENOSYS;
+
+	return ops->cipher_crypt(dev, ctx, in, out, len, enc);
+}
+
 UCLASS_DRIVER(crypto) = {
 	.id	= UCLASS_CRYPTO,
 	.name	= "crypto",
diff --git a/drivers/crypto/rockchip/Kconfig b/drivers/crypto/rockchip/Kconfig
index 752a50e7df..eb53f782ac 100644
--- a/drivers/crypto/rockchip/Kconfig
+++ b/drivers/crypto/rockchip/Kconfig
@@ -14,6 +14,38 @@ config SPL_ROCKCHIP_RSA
 	  This enable RSA512/RSA1024/RSA2048 algorithm support for
 	  rockchip crypto module.
 
+config ROCKCHIP_CIPHER
+	bool "Enable rockchip cipher support"
+	depends on ROCKCHIP_CRYPTO_V1 || ROCKCHIP_CRYPTO_V2
+	default n
+	help
+	  This enable DES/AES/SM4 algorithm support for
+	  rockchip crypto module.
+
+config SPL_ROCKCHIP_CIPHER
+	bool "Enable rockchip cipher support in spl"
+	depends on SPL_ROCKCHIP_CRYPTO_V1 || SPL_ROCKCHIP_CRYPTO_V2
+	default n
+	help
+	  This enable DES/AES/SM4 algorithm support for
+	  rockchip crypto module.
+
+config ROCKCHIP_HMAC
+	bool "Enable rockchip hmac support"
+	depends on ROCKCHIP_CRYPTO_V1 || ROCKCHIP_CRYPTO_V2
+	default n
+	help
+	  This enable HMAC algorithm support for
+	  rockchip crypto module.
+
+config SPL_ROCKCHIP_HMAC
+	bool "Enable rockchip hmac support in spl"
+	depends on SPL_ROCKCHIP_CRYPTO_V1 || SPL_ROCKCHIP_CRYPTO_V2
+	default n
+	help
+	  This enable HMAC algorithm support for
+	  rockchip crypto module.
+
 config ROCKCHIP_CRYPTO_V1
 	bool "Enable rockchip crypto v1 support"
 	depends on DM_CRYPTO
diff --git a/drivers/crypto/rockchip/crypto_hash_cache.c b/drivers/crypto/rockchip/crypto_hash_cache.c
index 409038ead5..f755016e38 100644
--- a/drivers/crypto/rockchip/crypto_hash_cache.c
+++ b/drivers/crypto/rockchip/crypto_hash_cache.c
@@ -80,6 +80,9 @@ void crypto_flush_cacheline(ulong addr, ulong size)
 	ulong alignment = CONFIG_SYS_CACHELINE_SIZE;
 	ulong aligned_input, aligned_len;
 
+	if (!addr || !size)
+		return;
+
 	/* Must flush dcache before crypto DMA fetch data region */
 	aligned_input = round_down(addr, alignment);
 	aligned_len = round_up(size + (addr - aligned_input), alignment);
diff --git a/drivers/crypto/rockchip/crypto_v1.c b/drivers/crypto/rockchip/crypto_v1.c
index 4ac2a26a16..11d1b97fa4 100644
--- a/drivers/crypto/rockchip/crypto_v1.c
+++ b/drivers/crypto/rockchip/crypto_v1.c
@@ -18,9 +18,9 @@
 #define HASH_UPDATE_LIMIT	(32 * 1024 * 1024)
 #define RK_CRYPTO_TIME_OUT	500000
 
-#define LLI_ADDR_ALIGIN_SIZE	8
-#define DATA_ADDR_ALIGIN_SIZE	8
-#define DATA_LEN_ALIGIN_SIZE	64
+#define LLI_ADDR_ALIGN_SIZE	8
+#define DATA_ADDR_ALIGN_SIZE	8
+#define DATA_LEN_ALIGN_SIZE	64
 
 struct rockchip_crypto_priv {
 	struct crypto_hash_cache	*hash_cache;
@@ -89,8 +89,8 @@ static int rockchip_crypto_sha_init(struct udevice *dev, sha_context *ctx)
 
 	priv->hash_cache = crypto_hash_cache_alloc(rk_hash_direct_calc,
 						   priv, ctx->length,
-						   DATA_ADDR_ALIGIN_SIZE,
-						   DATA_LEN_ALIGIN_SIZE);
+						   DATA_ADDR_ALIGN_SIZE,
+						   DATA_LEN_ALIGN_SIZE);
 	if (!priv->hash_cache)
 		return -EFAULT;
 
diff --git a/drivers/crypto/rockchip/crypto_v2.c b/drivers/crypto/rockchip/crypto_v2.c
index 85c26b152b..120d57bc02 100644
--- a/drivers/crypto/rockchip/crypto_v2.c
+++ b/drivers/crypto/rockchip/crypto_v2.c
@@ -16,17 +16,12 @@
 
 #define	RK_HASH_CTX_MAGIC		0x1A1A1A1A
 
-#define CRYPTO_TRNG_MAX			32
-
-enum endian_mode {
-	BIG_ENDIAN = 0,
-	LITTLE_ENDIAN
-};
-
-enum clk_type {
-	CLK = 0,
-	HCLK
-};
+#ifdef DEBUG
+#define IMSG(format, ...) printf("[%s, %05d]-trace: " format "\n", \
+				 __func__, __LINE__, ##__VA_ARGS__)
+#else
+#define IMSG(format, ...)
+#endif
 
 struct crypto_lli_desc {
 	u32 src_addr;
@@ -48,89 +43,139 @@ struct rk_hash_ctx {
 	u8				reserved[3];
 };
 
+struct rk_crypto_soc_data {
+	u32 capability;
+};
+
 struct rockchip_crypto_priv {
-	fdt_addr_t reg;
-	struct clk clk;
-	u32 frequency;
-	char *clocks;
-	u32 *frequencies;
-	u32 nclocks;
-	u32 length;
-	struct rk_hash_ctx *hw_ctx;
+	fdt_addr_t			reg;
+	struct clk			clk;
+	u32				frequency;
+	char				*clocks;
+	u32				*frequencies;
+	u32				nclocks;
+	u32				length;
+	struct rk_hash_ctx		*hw_ctx;
+	struct rk_crypto_soc_data	*soc_data;
 };
 
-#define LLI_ADDR_ALIGIN_SIZE	8
-#define DATA_ADDR_ALIGIN_SIZE	8
-#define DATA_LEN_ALIGIN_SIZE	64
+#define LLI_ADDR_ALIGN_SIZE	8
+#define DATA_ADDR_ALIGN_SIZE	8
+#define DATA_LEN_ALIGN_SIZE	64
 
 /* crypto timeout 500ms, must support more than 32M data per times*/
 #define HASH_UPDATE_LIMIT	(32 * 1024 * 1024)
-#define RK_CRYPTO_TIME_OUT	500000
-
-#define RK_WHILE_TIME_OUT(condition, timeout, ret) { \
-			u32 time_out = timeout; \
-			ret = 0; \
-			while (condition) { \
-				if (time_out-- == 0) { \
-					debug("[%s] %d: time out!\n", __func__,\
-						__LINE__); \
-					ret = -ETIME; \
-					break; \
-				} \
-				udelay(1); \
-			} \
-		} while (0)
-
-typedef u32 paddr_t;
+#define RK_CRYPTO_TIMEOUT	500000
+
+#define RK_POLL_TIMEOUT(condition, timeout) \
+({ \
+	int time_out = timeout; \
+	while (condition) { \
+		if (--time_out <= 0) { \
+			debug("[%s] %d: time out!\n", __func__,\
+				__LINE__); \
+			break; \
+		} \
+		udelay(1); \
+	} \
+	(time_out <= 0) ? -ETIMEDOUT : 0; \
+})
+
 #define virt_to_phys(addr)		(((unsigned long)addr) & 0xffffffff)
 #define phys_to_virt(addr, area)	((unsigned long)addr)
 
+#define align_malloc(bytes, alignment)	memalign(alignment, bytes)
+#define align_free(addr)		free(addr)
+
+#define ROUNDUP(size, alignment)	round_up(size, alignment)
+#define cache_op_inner(type, addr, size) \
+					crypto_flush_cacheline((ulong)addr, size)
+
 fdt_addr_t crypto_base;
 
-static void word2byte(u32 word, u8 *ch, u32 endian)
-{
-	/* 0: Big-Endian 1: Little-Endian */
-	if (endian == BIG_ENDIAN) {
-		ch[0] = (word >> 24) & 0xff;
-		ch[1] = (word >> 16) & 0xff;
-		ch[2] = (word >> 8) & 0xff;
-		ch[3] = (word >> 0) & 0xff;
-	} else if (endian == LITTLE_ENDIAN) {
-		ch[0] = (word >> 0) & 0xff;
-		ch[1] = (word >> 8) & 0xff;
-		ch[2] = (word >> 16) & 0xff;
-		ch[3] = (word >> 24) & 0xff;
-	} else {
-		ch[0] = 0;
-		ch[1] = 0;
-		ch[2] = 0;
-		ch[3] = 0;
-	}
+static inline void word2byte_be(u32 word, u8 *ch)
+{
+	ch[0] = (word >> 24) & 0xff;
+	ch[1] = (word >> 16) & 0xff;
+	ch[2] = (word >> 8) & 0xff;
+	ch[3] = (word >> 0) & 0xff;
 }
 
-static inline void clear_hash_out_reg(void)
+static inline u32 byte2word_be(const u8 *ch)
+{
+	return (*ch << 24) + (*(ch + 1) << 16) + (*(ch + 2) << 8) + *(ch + 3);
+}
+
+static inline void clear_regs(u32 base, u32 words)
 {
 	int i;
 
 	/*clear out register*/
-	for (i = 0; i < 16; i++)
-		crypto_write(0, CRYPTO_HASH_DOUT_0 + 4 * i);
+	for (i = 0; i < words; i++)
+		crypto_write(0, base + 4 * i);
+}
+
+static inline void clear_hash_out_reg(void)
+{
+	clear_regs(CRYPTO_HASH_DOUT_0, 16);
+}
+
+static inline void clear_key_regs(void)
+{
+	clear_regs(CRYPTO_CH0_KEY_0, CRYPTO_KEY_CHANNEL_NUM * 4);
+}
+
+static inline void write_regs(u32 base, const u8 *data, u32 data_len)
+{
+	u8 tmp_buf[4];
+	u32 i;
+
+	for (i = 0; i < data_len / 4; i++, base += 4)
+		crypto_write(byte2word_be(data + i * 4), base);
+
+	if (data_len % 4) {
+		memset(tmp_buf, 0x00, sizeof(tmp_buf));
+		memcpy((u8 *)tmp_buf, data + i * 4, data_len % 4);
+		crypto_write(byte2word_be(tmp_buf), base);
+	}
+}
+
+static inline void write_key_reg(u32 chn, const u8 *key, u32 key_len)
+{
+	write_regs(CRYPTO_CH0_KEY_0 + chn * 0x10, key, key_len);
+}
+
+static inline void set_iv_reg(u32 chn, const u8 *iv, u32 iv_len)
+{
+	u32 base_iv;
+
+	base_iv = CRYPTO_CH0_IV_0 + chn * 0x10;
+
+	/* clear iv */
+	clear_regs(base_iv, 4);
+
+	if (!iv || iv_len == 0)
+		return;
+
+	write_regs(base_iv, iv, iv_len);
+
+	crypto_write(iv_len, CRYPTO_CH0_IV_LEN_0 + 4 * chn);
 }
 
 static int hw_crypto_reset(void)
 {
-	u32 tmp = 0, tmp_mask = 0;
+	u32 val = 0, mask = 0;
 	int ret;
 
-	tmp = CRYPTO_SW_PKA_RESET | CRYPTO_SW_CC_RESET;
-	tmp_mask = tmp << CRYPTO_WRITE_MASK_SHIFT;
+	val = CRYPTO_SW_PKA_RESET | CRYPTO_SW_CC_RESET;
+	mask = val << CRYPTO_WRITE_MASK_SHIFT;
 
 	/* reset pka and crypto modules*/
-	crypto_write(tmp | tmp_mask, CRYPTO_RST_CTL);
+	crypto_write(val | mask, CRYPTO_RST_CTL);
 
 	/* wait reset compelete */
-	RK_WHILE_TIME_OUT(crypto_read(CRYPTO_RST_CTL),
-			  RK_CRYPTO_TIME_OUT, ret);
+	ret = RK_POLL_TIMEOUT(crypto_read(CRYPTO_RST_CTL), RK_CRYPTO_TIMEOUT);
+
 	return ret;
 }
 
@@ -161,29 +206,37 @@ static int rk_hash_init(void *hw_ctx, u32 algo)
 		     CRYPTO_RST_CTL);
 
 	/* wait reset compelete */
-	RK_WHILE_TIME_OUT(crypto_read(CRYPTO_RST_CTL),
-			  RK_CRYPTO_TIME_OUT, ret);
+	ret = RK_POLL_TIMEOUT(crypto_read(CRYPTO_RST_CTL),
+			      RK_CRYPTO_TIMEOUT);
 
 	reg_ctrl = 0;
 	tmp_ctx->algo = algo;
 	switch (algo) {
 	case CRYPTO_MD5:
+	case CRYPTO_HMAC_MD5:
 		reg_ctrl |= CRYPTO_MODE_MD5;
 		tmp_ctx->digest_size = 16;
 		break;
 	case CRYPTO_SHA1:
+	case CRYPTO_HMAC_SHA1:
 		reg_ctrl |= CRYPTO_MODE_SHA1;
 		tmp_ctx->digest_size = 20;
 		break;
 	case CRYPTO_SHA256:
+	case CRYPTO_HMAC_SHA256:
 		reg_ctrl |= CRYPTO_MODE_SHA256;
 		tmp_ctx->digest_size = 32;
 		break;
 	case CRYPTO_SHA512:
+	case CRYPTO_HMAC_SHA512:
 		reg_ctrl |= CRYPTO_MODE_SHA512;
 		tmp_ctx->digest_size = 64;
 		break;
-
+	case CRYPTO_SM3:
+	case CRYPTO_HMAC_SM3:
+		reg_ctrl |= CRYPTO_MODE_SM3;
+		tmp_ctx->digest_size = 32;
+		break;
 	default:
 		ret = -EINVAL;
 		goto exit;
@@ -222,8 +275,8 @@ static int rk_hash_direct_calc(void *hw_data, const u8 *data,
 	int ret = -EINVAL;
 	u32 tmp = 0, mask = 0;
 
-	assert(IS_ALIGNED((ulong)data, DATA_ADDR_ALIGIN_SIZE));
-	assert(is_last || IS_ALIGNED(data_len, DATA_LEN_ALIGIN_SIZE));
+	assert(IS_ALIGNED((ulong)data, DATA_ADDR_ALIGN_SIZE));
+	assert(is_last || IS_ALIGNED(data_len, DATA_LEN_ALIGN_SIZE));
 
 	debug("%s: data = %p, len = %u, s = %x, l = %x\n",
 	      __func__, data, data_len, *started_flag, is_last);
@@ -265,8 +318,8 @@ static int rk_hash_direct_calc(void *hw_data, const u8 *data,
 	mask = ~(mask | CRYPTO_SYNC_LOCKSTEP_INT_ST);
 
 	/* wait calc ok */
-	RK_WHILE_TIME_OUT(!(crypto_read(CRYPTO_DMA_INT_ST) & mask),
-			  RK_CRYPTO_TIME_OUT, ret);
+	ret = RK_POLL_TIMEOUT(!(crypto_read(CRYPTO_DMA_INT_ST) & mask),
+			      RK_CRYPTO_TIMEOUT);
 
 	/* clear interrupt status */
 	tmp = crypto_read(CRYPTO_DMA_INT_ST);
@@ -324,18 +377,17 @@ int rk_hash_final(void *ctx, u8 *digest, size_t len)
 	}
 
 	/* wait hash value ok */
-	RK_WHILE_TIME_OUT(!crypto_read(CRYPTO_HASH_VALID),
-			  RK_CRYPTO_TIME_OUT, ret);
+	ret = RK_POLL_TIMEOUT(!crypto_read(CRYPTO_HASH_VALID),
+			      RK_CRYPTO_TIMEOUT);
 
 	for (i = 0; i < len / 4; i++)
-		word2byte(crypto_read(CRYPTO_HASH_DOUT_0 + i * 4),
-			  digest + i * 4, BIG_ENDIAN);
+		word2byte_be(crypto_read(CRYPTO_HASH_DOUT_0 + i * 4),
+			     digest + i * 4);
 
 	if (len % 4) {
 		u8 tmp_buf[4];
 
-		word2byte(crypto_read(CRYPTO_HASH_DOUT_0 + i * 4),
-			  tmp_buf, BIG_ENDIAN);
+		word2byte_be(crypto_read(CRYPTO_HASH_DOUT_0 + i * 4), tmp_buf);
 		memcpy(digest + i * 4, tmp_buf, len % 4);
 	}
 
@@ -350,21 +402,26 @@ exit:
 
 static u32 rockchip_crypto_capability(struct udevice *dev)
 {
-	u32 val = 0;
+	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
+	u32 capability, mask = 0;
+
+	capability = priv->soc_data->capability;
+
+#if !(CONFIG_IS_ENABLED(ROCKCHIP_CIPHER))
+	mask |= (CRYPTO_DES | CRYPTO_AES | CRYPTO_SM4);
+#endif
+
+#if !(CONFIG_IS_ENABLED(ROCKCHIP_HMAC))
+	mask |= (CRYPTO_HMAC_MD5 | CRYPTO_HMAC_SHA1 | CRYPTO_HMAC_SHA256 |
+			 CRYPTO_HMAC_SHA512 | CRYPTO_HMAC_SM3);
+#endif
 
-	val =  CRYPTO_MD5 |
-	       CRYPTO_SHA1 |
-	       CRYPTO_SHA256 |
-#if !defined(CONFIG_ROCKCHIP_RK1808)
-	       CRYPTO_SHA512 |
+#if !(CONFIG_IS_ENABLED(ROCKCHIP_RSA))
+	mask |= (CRYPTO_RSA512 | CRYPTO_RSA1024 | CRYPTO_RSA2048 |
+			 CRYPTO_RSA3072 | CRYPTO_RSA4096);
 #endif
-	       CRYPTO_RSA512 |
-	       CRYPTO_RSA1024 |
-	       CRYPTO_RSA2048 |
-	       CRYPTO_RSA3072 |
-	       CRYPTO_RSA4096;
 
-	return val;
+	return capability & (~mask);
 }
 
 static int rockchip_crypto_sha_init(struct udevice *dev, sha_context *ctx)
@@ -381,8 +438,8 @@ static int rockchip_crypto_sha_init(struct udevice *dev, sha_context *ctx)
 
 	hash_ctx->hash_cache = crypto_hash_cache_alloc(rk_hash_direct_calc,
 						       priv, ctx->length,
-						       DATA_ADDR_ALIGIN_SIZE,
-						       DATA_LEN_ALIGIN_SIZE);
+						       DATA_ADDR_ALIGN_SIZE,
+						       DATA_LEN_ALIGN_SIZE);
 	if (!hash_ctx->hash_cache)
 		return -EFAULT;
 
@@ -437,6 +494,445 @@ exit:
 	return ret;
 }
 
+#if CONFIG_IS_ENABLED(ROCKCHIP_HMAC)
+int rk_hmac_init(void *hw_ctx, u32 algo, u8 *key, u32 key_len)
+{
+	u32 reg_ctrl = 0;
+	int ret;
+
+	if (!key || !key_len || key_len > 64)
+		return -EINVAL;
+
+	clear_key_regs();
+
+	write_key_reg(0, key, key_len);
+
+	ret = rk_hash_init(hw_ctx, algo);
+	if (ret)
+		return ret;
+
+	reg_ctrl = crypto_read(CRYPTO_HASH_CTL) | CRYPTO_HMAC_ENABLE;
+	crypto_write(reg_ctrl | CRYPTO_WRITE_MASK_ALL, CRYPTO_HASH_CTL);
+
+	return ret;
+}
+
+static int rockchip_crypto_hmac_init(struct udevice *dev,
+				     sha_context *ctx, u8 *key, u32 key_len)
+{
+	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
+	struct rk_hash_ctx *hash_ctx = priv->hw_ctx;
+
+	if (!ctx)
+		return -EINVAL;
+
+	memset(hash_ctx, 0x00, sizeof(*hash_ctx));
+
+	priv->length = 0;
+
+	hash_ctx->hash_cache = crypto_hash_cache_alloc(rk_hash_direct_calc,
+						       priv, ctx->length,
+						       DATA_ADDR_ALIGN_SIZE,
+						       DATA_LEN_ALIGN_SIZE);
+	if (!hash_ctx->hash_cache)
+		return -EFAULT;
+
+	return rk_hmac_init(priv->hw_ctx, ctx->algo, key, key_len);
+}
+
+static int rockchip_crypto_hmac_update(struct udevice *dev,
+				       u32 *input, u32 len)
+{
+	return rockchip_crypto_sha_update(dev, input, len);
+}
+
+static int rockchip_crypto_hmac_final(struct udevice *dev,
+				      sha_context *ctx, u8 *output)
+{
+	return rockchip_crypto_sha_final(dev, ctx, output);
+}
+
+#endif
+
+#if CONFIG_IS_ENABLED(ROCKCHIP_CIPHER)
+static u8 g_key_chn;
+
+static const u32 rk_mode2bc_mode[RK_MODE_MAX] = {
+	[RK_MODE_ECB] = CRYPTO_BC_ECB,
+	[RK_MODE_CBC] = CRYPTO_BC_CBC,
+	[RK_MODE_CTS] = CRYPTO_BC_CTS,
+	[RK_MODE_CTR] = CRYPTO_BC_CTR,
+	[RK_MODE_CFB] = CRYPTO_BC_CFB,
+	[RK_MODE_OFB] = CRYPTO_BC_OFB,
+	[RK_MODE_XTS] = CRYPTO_BC_XTS,
+};
+
+static inline bool is_des_mode(u32 rk_mode)
+{
+	return (rk_mode == RK_MODE_ECB ||
+		rk_mode == RK_MODE_CBC ||
+		rk_mode == RK_MODE_CFB ||
+		rk_mode == RK_MODE_OFB);
+}
+
+static void dump_crypto_state(struct crypto_lli_desc *desc, int ret)
+{
+	IMSG("%s\n", ret == -ETIME ? "timeout" : "dismatch");
+
+	IMSG("CRYPTO_DMA_INT_ST = %08x, expect_int = %08x\n",
+	     tmp, expt_int);
+	IMSG("data desc		= %p\n", desc);
+	IMSG("\taddr_in		= [%08x <=> %08x]\n",
+	     desc->src_addr, (u32)virt_to_phys(in));
+	IMSG("\taddr_out	= [%08x <=> %08x]\n",
+	     desc->dst_addr, (u32)virt_to_phys(out));
+	IMSG("\tsrc_len		= [%08x <=> %08x]\n",
+	     desc->src_len, (u32)len);
+	IMSG("\tdst_len		= %08x\n", desc->dst_len);
+	IMSG("\tdma_ctl		= %08x\n", desc->dma_ctrl);
+	IMSG("\tuser_define	= %08x\n", desc->user_define);
+
+	IMSG("\n\nDMA CRYPTO_DMA_LLI_ADDR status = %08x\n",
+	     crypto_read(CRYPTO_DMA_LLI_ADDR));
+	IMSG("DMA CRYPTO_DMA_ST status = %08x\n",
+	     crypto_read(CRYPTO_DMA_ST));
+	IMSG("DMA CRYPTO_DMA_STATE status = %08x\n",
+	     crypto_read(CRYPTO_DMA_STATE));
+	IMSG("DMA CRYPTO_DMA_LLI_RADDR status = %08x\n",
+	     crypto_read(CRYPTO_DMA_LLI_RADDR));
+	IMSG("DMA CRYPTO_DMA_SRC_RADDR status = %08x\n",
+	     crypto_read(CRYPTO_DMA_SRC_RADDR));
+	IMSG("DMA CRYPTO_DMA_DST_RADDR status = %08x\n",
+	     crypto_read(CRYPTO_DMA_DST_RADDR));
+	IMSG("DMA CRYPTO_CIPHER_ST status = %08x\n",
+	     crypto_read(CRYPTO_CIPHER_ST));
+	IMSG("DMA CRYPTO_CIPHER_STATE status = %08x\n",
+	     crypto_read(CRYPTO_CIPHER_STATE));
+	IMSG("DMA CRYPTO_TAG_VALID status = %08x\n",
+	     crypto_read(CRYPTO_TAG_VALID));
+	IMSG("LOCKSTEP status = %08x\n\n",
+	     crypto_read(0x618));
+
+	IMSG("dst %dbyte not transferred\n",
+	     desc->dst_addr + desc->dst_len -
+	     crypto_read(CRYPTO_DMA_DST_RADDR));
+}
+
+static int hw_cipher_init(u32 chn, const u8 *key, const u8 *twk_key,
+			  u32 key_len, const u8 *iv, u32 iv_len,
+			  u32 algo, u32 mode, bool enc)
+{
+	u32 rk_mode = RK_GET_RK_MODE(mode);
+	u32 key_chn_sel = chn;
+	u32 reg_ctrl = 0;
+
+	IMSG("%s: key addr is %p, key_len is %d, iv addr is %p",
+	     __func__, key, key_len, iv);
+	if (rk_mode >= RK_MODE_MAX)
+		return -EINVAL;
+
+	switch (algo) {
+	case CRYPTO_DES:
+		if (key_len > DES_BLOCK_SIZE)
+			reg_ctrl |= CRYPTO_BC_TDES;
+		else
+			reg_ctrl |= CRYPTO_BC_DES;
+		break;
+	case CRYPTO_AES:
+		reg_ctrl |= CRYPTO_BC_AES;
+		break;
+	case CRYPTO_SM4:
+		reg_ctrl |= CRYPTO_BC_SM4;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	if (algo == CRYPTO_AES || algo == CRYPTO_SM4) {
+		switch (key_len) {
+		case AES_KEYSIZE_128:
+			reg_ctrl |= CRYPTO_BC_128_bit_key;
+			break;
+		case AES_KEYSIZE_192:
+			reg_ctrl |= CRYPTO_BC_192_bit_key;
+			break;
+		case AES_KEYSIZE_256:
+			reg_ctrl |= CRYPTO_BC_256_bit_key;
+			break;
+		default:
+			return -EINVAL;
+		}
+	}
+
+	reg_ctrl |= rk_mode2bc_mode[rk_mode];
+	if (!enc)
+		reg_ctrl |= CRYPTO_BC_DECRYPT;
+
+	/* write key data to reg */
+	write_key_reg(key_chn_sel, key, key_len);
+
+	/* write twk key for xts mode */
+	if (rk_mode == RK_MODE_XTS)
+		write_key_reg(key_chn_sel + 4, twk_key, key_len);
+
+	/* set iv reg */
+	set_iv_reg(chn, iv, iv_len);
+
+	/* din_swap set 1, dout_swap set 1, default 1. */
+	crypto_write(0x00030003, CRYPTO_FIFO_CTL);
+	crypto_write(CRYPTO_LIST_DONE_INT_EN | CRYPTO_DST_ITEM_DONE_INT_EN,
+		     CRYPTO_DMA_INT_EN);
+
+	crypto_write(reg_ctrl | CRYPTO_WRITE_MASK_ALL, CRYPTO_BC_CTL);
+
+	return 0;
+}
+
+static int hw_cipher_crypt(const u8 *in, u8 *out, u64 len,
+			   const u8 *aad, u64 aad_len, u8 *tag, u32 tag_len,
+			   u32 mode)
+{
+	struct crypto_lli_desc *data_desc = NULL;
+	u8 *dma_in = NULL, *dma_out = NULL;
+	u32 rk_mode = RK_GET_RK_MODE(mode);
+	u32 reg_ctrl = 0, tmp_len = 0;
+	u32 expt_int = 0, mask = 0;
+	u32 key_chn = g_key_chn;
+	u32 tmp, dst_len = 0;
+	int ret = -1;
+
+	if (rk_mode == RK_MODE_CTS && len <= AES_BLOCK_SIZE) {
+		printf("CTS mode length %u < 16Byte\n", (u32)len);
+		return -EINVAL;
+	}
+
+	tmp_len = (rk_mode == RK_MODE_CTR) ? ROUNDUP(len, AES_BLOCK_SIZE) : len;
+
+	data_desc = align_malloc(sizeof(*data_desc), LLI_ADDR_ALIGN_SIZE);
+	if (!data_desc)
+		goto exit;
+
+	if (IS_ALIGNED((ulong)in, DATA_ADDR_ALIGN_SIZE) && tmp_len == len)
+		dma_in = (void *)in;
+	else
+		dma_in = align_malloc(tmp_len, DATA_ADDR_ALIGN_SIZE);
+	if (!dma_in)
+		goto exit;
+
+	if (out) {
+		if (IS_ALIGNED((ulong)out, DATA_ADDR_ALIGN_SIZE) &&
+		    tmp_len == len)
+			dma_out = out;
+		else
+			dma_out = align_malloc(tmp_len, DATA_ADDR_ALIGN_SIZE);
+		if (!dma_out)
+			goto exit;
+		dst_len = tmp_len;
+	}
+
+	memset(data_desc, 0x00, sizeof(*data_desc));
+	if (dma_in != in)
+		memcpy(dma_in, in, len);
+
+	data_desc->src_addr    = (u32)virt_to_phys(dma_in);
+	data_desc->src_len     = tmp_len;
+	data_desc->dst_addr    = (u32)virt_to_phys(dma_out);
+	data_desc->dst_len     = dst_len;
+	data_desc->dma_ctrl    = LLI_DMA_CTRL_DST_DONE |
+				 LLI_DMA_CTRL_LAST;
+	data_desc->user_define = LLI_USER_CPIHER_START |
+				 LLI_USER_STRING_START |
+				 LLI_USER_STRING_LAST |
+				 (key_chn << 4);
+	expt_int = CRYPTO_DST_ITEM_DONE_INT_ST;
+
+	crypto_write((u32)virt_to_phys(data_desc), CRYPTO_DMA_LLI_ADDR);
+
+	cache_op_inner(DCACHE_AREA_CLEAN, data_desc, sizeof(*data_desc));
+	cache_op_inner(DCACHE_AREA_CLEAN, (void *)aad, aad_len);
+	cache_op_inner(DCACHE_AREA_CLEAN, dma_in, tmp_len);
+	cache_op_inner(DCACHE_AREA_INVALIDATE, dma_out, tmp_len);
+
+	/* din_swap set 1, dout_swap set 1, default 1. */
+	crypto_write(0x00030003, CRYPTO_FIFO_CTL);
+	crypto_write(CRYPTO_DST_ITEM_DONE_INT_EN | CRYPTO_LIST_DONE_INT_EN,
+		     CRYPTO_DMA_INT_EN);
+
+	reg_ctrl = crypto_read(CRYPTO_BC_CTL) | CRYPTO_BC_ENABLE;
+	crypto_write(reg_ctrl | CRYPTO_WRITE_MASK_ALL, CRYPTO_BC_CTL);
+	crypto_write(0x00010001, CRYPTO_DMA_CTL);//start
+
+	mask = ~(mask | CRYPTO_SYNC_LOCKSTEP_INT_ST);
+
+	/* wait calc ok */
+	ret = RK_POLL_TIMEOUT(!(crypto_read(CRYPTO_DMA_INT_ST) & mask),
+			      RK_CRYPTO_TIMEOUT);
+	tmp = crypto_read(CRYPTO_DMA_INT_ST);
+	crypto_write(tmp, CRYPTO_DMA_INT_ST);
+
+	if ((tmp & mask) == expt_int) {
+		if (out && out != dma_out)
+			memcpy(out, dma_out, len);
+	} else {
+		dump_crypto_state(data_desc, ret);
+		ret = -1;
+	}
+
+exit:
+	crypto_write(0xffff0000, CRYPTO_BC_CTL);//bc_ctl disable
+	align_free(data_desc);
+	if (dma_in && dma_in != in)
+		align_free(dma_in);
+	if (dma_out && dma_out != out)
+		align_free(dma_out);
+
+	return ret;
+}
+
+static int hw_aes_init(u32 chn, const u8 *key, const u8 *twk_key, u32 key_len,
+		       const u8 *iv, u32 iv_len, u32 mode, bool enc)
+{
+	u32 rk_mode = RK_GET_RK_MODE(mode);
+
+	if (iv_len > AES_BLOCK_SIZE)
+		return -EINVAL;
+
+	if (rk_mode != RK_MODE_ECB) {
+		if (!iv || iv_len != AES_BLOCK_SIZE)
+			return -EINVAL;
+	} else {
+		iv_len = 0;
+	}
+
+	if (rk_mode == RK_MODE_XTS) {
+		if (key_len != AES_KEYSIZE_128 && key_len != AES_KEYSIZE_256)
+			return -EINVAL;
+
+		if (!key || !twk_key)
+			return -EINVAL;
+	} else {
+		if (key_len != AES_KEYSIZE_128 &&
+		    key_len != AES_KEYSIZE_192 &&
+		    key_len != AES_KEYSIZE_256)
+			return -EINVAL;
+	}
+
+	return hw_cipher_init(chn, key, twk_key, key_len, iv, iv_len,
+			      CRYPTO_AES, mode, enc);
+}
+
+static int hw_sm4_init(u32  chn, const u8 *key, const u8 *twk_key, u32 key_len,
+		       const u8 *iv, u32 iv_len, u32 mode, bool enc)
+{
+	u32 rk_mode = RK_GET_RK_MODE(mode);
+
+	if (iv_len > SM4_BLOCK_SIZE || key_len != SM4_KEYSIZE)
+		return -EINVAL;
+
+	if (rk_mode != RK_MODE_ECB) {
+		if (!iv || iv_len != SM4_BLOCK_SIZE)
+			return -EINVAL;
+	} else {
+		iv_len = 0;
+	}
+
+	if (rk_mode == RK_MODE_XTS) {
+		if (!key || !twk_key)
+			return -EINVAL;
+	}
+
+	return hw_cipher_init(chn, key, twk_key, key_len, iv, iv_len,
+			      CRYPTO_SM4, mode, enc);
+}
+
+int rk_crypto_des(struct udevice *dev, u32 mode, const u8 *key, u32 key_len,
+		  const u8 *iv, const u8 *in, u8 *out, u32 len, bool enc)
+{
+	u32 rk_mode = RK_GET_RK_MODE(mode);
+	u8 tmp_key[24];
+	int ret;
+
+	if (!is_des_mode(rk_mode))
+		return -EINVAL;
+
+	if (key_len == DES_BLOCK_SIZE || key_len == 3 * DES_BLOCK_SIZE) {
+		memcpy(tmp_key, key, key_len);
+	} else if (key_len == 2 * DES_BLOCK_SIZE) {
+		memcpy(tmp_key, key, 16);
+		memcpy(tmp_key + 16, key, 8);
+		key_len = 3 * DES_BLOCK_SIZE;
+	} else {
+		return -EINVAL;
+	}
+
+	ret = hw_cipher_init(0, tmp_key, NULL, key_len, iv, DES_BLOCK_SIZE,
+			     CRYPTO_DES, mode, enc);
+	if (ret)
+		goto exit;
+
+	ret = hw_cipher_crypt(in, out, len, NULL, 0,
+			      NULL, 0, mode);
+
+exit:
+	return ret;
+}
+
+int rk_crypto_aes(struct udevice *dev, u32 mode,
+		  const u8 *key, const u8 *twk_key, u32 key_len,
+		  const u8 *iv, u32 iv_len,
+		  const u8 *in, u8 *out, u32 len, bool enc)
+{
+	int ret;
+
+	/* RV1126/RV1109 do not support aes-192 */
+#if defined(CONFIG_ROCKCHIP_RV1126)
+	if (key_len == AES_KEYSIZE_192)
+		return -EINVAL;
+#endif
+
+	ret = hw_aes_init(0, key, twk_key, key_len, iv, iv_len, mode, enc);
+	if (ret)
+		return ret;
+
+	return hw_cipher_crypt(in, out, len, NULL, 0,
+			       NULL, 0, mode);
+}
+
+int rk_crypto_sm4(struct udevice *dev, u32 mode,
+		  const u8 *key, const u8 *twk_key, u32 key_len,
+		  const u8 *iv, u32 iv_len,
+		  const u8 *in, u8 *out, u32 len, bool enc)
+{
+	int ret;
+
+	ret = hw_sm4_init(0, key, twk_key, key_len, iv, iv_len, mode, enc);
+	if (ret)
+		return ret;
+
+	return hw_cipher_crypt(in, out, len, NULL, 0, NULL, 0, mode);
+}
+
+int rockchip_crypto_cipher(struct udevice *dev, cipher_context *ctx,
+			   const u8 *in, u8 *out, u32 len, bool enc)
+{
+	switch (ctx->algo) {
+	case CRYPTO_DES:
+		return rk_crypto_des(dev, ctx->mode, ctx->key, ctx->key_len,
+				     ctx->iv, in, out, len, enc);
+	case CRYPTO_AES:
+		return rk_crypto_aes(dev, ctx->mode,
+				     ctx->key, ctx->twk_key, ctx->key_len,
+				     ctx->iv, ctx->iv_len, in, out, len, enc);
+	case CRYPTO_SM4:
+		return rk_crypto_sm4(dev, ctx->mode,
+				     ctx->key, ctx->twk_key, ctx->key_len,
+				     ctx->iv, ctx->iv_len, in, out, len, enc);
+	default:
+		return -EINVAL;
+	}
+} 
+#endif
+
 #if CONFIG_IS_ENABLED(ROCKCHIP_RSA)
 static int rockchip_crypto_rsa_verify(struct udevice *dev, rsa_key *ctx,
 				      u8 *sign, u8 *output)
@@ -500,20 +996,24 @@ exit:
 
 	return ret;
 }
-#else
-static int rockchip_crypto_rsa_verify(struct udevice *dev, rsa_key *ctx,
-				      u8 *sign, u8 *output)
-{
-	return -ENOSYS;
-}
 #endif
 
 static const struct dm_crypto_ops rockchip_crypto_ops = {
-	.capability = rockchip_crypto_capability,
-	.sha_init   = rockchip_crypto_sha_init,
-	.sha_update = rockchip_crypto_sha_update,
-	.sha_final  = rockchip_crypto_sha_final,
-	.rsa_verify = rockchip_crypto_rsa_verify,
+	.capability   = rockchip_crypto_capability,
+	.sha_init     = rockchip_crypto_sha_init,
+	.sha_update   = rockchip_crypto_sha_update,
+	.sha_final    = rockchip_crypto_sha_final,
+#if CONFIG_IS_ENABLED(ROCKCHIP_RSA)
+	.rsa_verify   = rockchip_crypto_rsa_verify,
+#endif
+#if CONFIG_IS_ENABLED(ROCKCHIP_HMAC)
+	.hmac_init    = rockchip_crypto_hmac_init,
+	.hmac_update  = rockchip_crypto_hmac_update,
+	.hmac_final   = rockchip_crypto_hmac_final,
+#endif
+#if CONFIG_IS_ENABLED(ROCKCHIP_CIPHER)
+	.cipher_crypt = rockchip_crypto_cipher,
+#endif
 };
 
 /*
@@ -584,10 +1084,14 @@ exit:
 static int rockchip_crypto_probe(struct udevice *dev)
 {
 	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
+	struct rk_crypto_soc_data *sdata;
 	int i, ret = 0;
 	u32* clocks;
 
-	priv->hw_ctx = memalign(LLI_ADDR_ALIGIN_SIZE,
+	sdata = (struct rk_crypto_soc_data *)dev_get_driver_data(dev);
+	priv->soc_data = sdata;
+
+	priv->hw_ctx = memalign(LLI_ADDR_ALIGN_SIZE,
 				sizeof(struct rk_hash_ctx));
 	if (!priv->hw_ctx)
 		return -ENOMEM;
@@ -614,12 +1118,80 @@ static int rockchip_crypto_probe(struct udevice *dev)
 	return 0;
 }
 
+static const struct rk_crypto_soc_data soc_data_base = {
+	.capability = CRYPTO_MD5 |
+		      CRYPTO_SHA1 |
+		      CRYPTO_SHA256 |
+		      CRYPTO_SHA512 |
+		      CRYPTO_HMAC_MD5 |
+		      CRYPTO_HMAC_SHA1 |
+		      CRYPTO_HMAC_SHA256 |
+		      CRYPTO_HMAC_SHA512 |
+		      CRYPTO_RSA512 |
+		      CRYPTO_RSA1024 |
+		      CRYPTO_RSA2048 |
+		      CRYPTO_RSA3072 |
+		      CRYPTO_RSA4096 |
+		      CRYPTO_DES |
+		      CRYPTO_AES,
+};
+
+static const struct rk_crypto_soc_data soc_data_base_sm = {
+	.capability = CRYPTO_MD5 |
+		      CRYPTO_SHA1 |
+		      CRYPTO_SHA256 |
+		      CRYPTO_SHA512 |
+		      CRYPTO_SM3 |
+		      CRYPTO_HMAC_MD5 |
+		      CRYPTO_HMAC_SHA1 |
+		      CRYPTO_HMAC_SHA256 |
+		      CRYPTO_HMAC_SHA512 |
+		      CRYPTO_HMAC_SM3 |
+		      CRYPTO_RSA512 |
+		      CRYPTO_RSA1024 |
+		      CRYPTO_RSA2048 |
+		      CRYPTO_RSA3072 |
+		      CRYPTO_RSA4096 |
+		      CRYPTO_DES |
+		      CRYPTO_AES |
+		      CRYPTO_SM4,
+};
+
+static const struct rk_crypto_soc_data soc_data_rk1808 = {
+	.capability = CRYPTO_MD5 |
+		      CRYPTO_SHA1 |
+		      CRYPTO_SHA256 |
+		      CRYPTO_HMAC_MD5 |
+		      CRYPTO_HMAC_SHA1 |
+		      CRYPTO_HMAC_SHA256 |
+		      CRYPTO_RSA512 |
+		      CRYPTO_RSA1024 |
+		      CRYPTO_RSA2048 |
+		      CRYPTO_RSA3072 |
+		      CRYPTO_RSA4096,
+};
+
 static const struct udevice_id rockchip_crypto_ids[] = {
-	{ .compatible = "rockchip,px30-crypto" },
-	{ .compatible = "rockchip,rk1808-crypto" },
-	{ .compatible = "rockchip,rk3308-crypto" },
-	{ .compatible = "rockchip,rv1126-crypto" },
-	{ .compatible = "rockchip,rk3568-crypto" },
+	{
+		.compatible = "rockchip,px30-crypto",
+		.data = (ulong)&soc_data_base
+	},
+	{
+		.compatible = "rockchip,rk1808-crypto",
+		.data = (ulong)&soc_data_rk1808
+	},
+	{
+		.compatible = "rockchip,rk3308-crypto",
+		.data = (ulong)&soc_data_base
+	},
+	{
+		.compatible = "rockchip,rv1126-crypto",
+		.data = (ulong)&soc_data_base_sm
+	},
+	{
+		.compatible = "rockchip,rk3568-crypto",
+		.data = (ulong)&soc_data_base_sm
+	},
 	{ }
 };
 
diff --git a/include/crypto.h b/include/crypto.h
index 8b28192058..2211c98011 100644
--- a/include/crypto.h
+++ b/include/crypto.h
@@ -16,6 +16,7 @@
 #define CRYPTO_SHA1		BIT(1)
 #define CRYPTO_SHA256		BIT(2)
 #define CRYPTO_SHA512		BIT(3)
+#define CRYPTO_SM3		BIT(4)
 
 #define CRYPTO_RSA512		BIT(10)
 #define CRYPTO_RSA1024		BIT(11)
@@ -23,10 +24,31 @@
 #define CRYPTO_RSA3072		BIT(13)
 #define CRYPTO_RSA4096		BIT(14)
 
+#define CRYPTO_DES		BIT(20)
+#define CRYPTO_AES		BIT(21)
+#define CRYPTO_SM4		BIT(22)
+
+#define CRYPTO_HMAC_MD5		BIT(25)
+#define CRYPTO_HMAC_SHA1	BIT(26)
+#define CRYPTO_HMAC_SHA256	BIT(27)
+#define CRYPTO_HMAC_SHA512	BIT(28)
+#define CRYPTO_HMAC_SM3		BIT(29)
+
 #define BYTE2WORD(bytes)	((bytes) / 4)
 #define BITS2BYTE(nbits)	((nbits) / 8)
 #define BITS2WORD(nbits)	((nbits) / 32)
 
+enum RK_CRYPTO_MODE {
+	RK_MODE_ECB = 0,
+	RK_MODE_CBC,
+	RK_MODE_CTS,
+	RK_MODE_CTR,
+	RK_MODE_CFB,
+	RK_MODE_OFB,
+	RK_MODE_XTS,
+	RK_MODE_MAX
+};
+
 typedef struct {
 	u32 algo;	/* Algorithm: CRYPTO_MD5/CRYPTO_SHA1/CRYPTO_RSA2048... */
 	u32 length;	/* Data total length */
@@ -40,6 +62,16 @@ typedef struct {
 	u32 *c;		/* Optional, a accelerate factor for some crypto */
 } rsa_key;
 
+typedef struct {
+	u32		algo;
+	u32		mode;
+	const u8	*key;
+	const u8	*twk_key;
+	u32		key_len;
+	const u8	*iv;
+	u32		iv_len;
+} cipher_context;
+
 struct dm_crypto_ops {
 	/* Hardware algorithm capability */
 	u32 (*capability)(struct udevice *dev);
@@ -52,6 +84,15 @@ struct dm_crypto_ops {
 	/* RSA verify */
 	int (*rsa_verify)(struct udevice *dev, rsa_key *ctx,
 			  u8 *sign, u8 *output);
+	/* HMAC init/update/final */
+	int (*hmac_init)(struct udevice *dev, sha_context *ctx,
+			 u8 *key, u32 key_len);
+	int (*hmac_update)(struct udevice *dev, u32 *input, u32 len);
+	int (*hmac_final)(struct udevice *dev, sha_context *ctx, u8 *output);
+
+	/* cipher encryption and decryption */
+	int (*cipher_crypt)(struct udevice *dev, cipher_context *ctx,
+			    const u8 *in, u8 *out, u32 len, bool enc);
 };
 
 /**
@@ -143,4 +184,51 @@ int crypto_sha_regions_csum(struct udevice *dev, sha_context *ctx,
  */
 int crypto_rsa_verify(struct udevice *dev, rsa_key *ctx, u8 *sign, u8 *output);
 
+/**
+ * crypto_hmac_init() - Crypto hmac init
+ *
+ * @dev: crypto device
+ * @ctx: sha context
+ *
+ * @return 0 on success, otherwise failed
+ */
+int crypto_hmac_init(struct udevice *dev, sha_context *ctx,
+		     u8 *key, u32 key_len);
+
+/**
+ * crypto_hmac_update() - Crypto hmac update
+ *
+ * @dev: crypto device
+ * @input: input data buffer
+ * @len: input data length
+ *
+ * @return 0 on success, otherwise failed
+ */
+int crypto_hmac_update(struct udevice *dev, u32 *input, u32 len);
+
+/**
+ * crypto_sha_final() - Crypto hmac finish and get result
+ *
+ * @dev: crypto device
+ * @ctx: sha context
+ * @output: output hash data
+ *
+ * @return 0 on success, otherwise failed
+ */
+int crypto_hmac_final(struct udevice *dev, sha_context *ctx, u8 *output);
+
+/**
+ * crypto_cipher() - Crypto cipher crypt
+ *
+ * @dev: crypto device
+ * @ctx: cipher context
+ * @in: input data buffer
+ * @out: output data buffer
+ * @len: input data length
+ * @enc: true for encrypt, false for decrypt
+ * @return 0 on success, otherwise failed
+ */
+int crypto_cipher(struct udevice *dev, cipher_context *ctx,
+		  const u8 *in, u8 *out, u32 len, bool enc);
+
 #endif
diff --git a/include/rockchip/crypto_v2.h b/include/rockchip/crypto_v2.h
index e17e6625b9..d16dae4623 100644
--- a/include/rockchip/crypto_v2.h
+++ b/include/rockchip/crypto_v2.h
@@ -8,27 +8,12 @@
 
 #include <asm/io.h>
 
-#define	RK_CRYPTO_KEY_ROOT		   0x00010000
-#define	RK_CRYPTO_KEY_PRIVATE		   0x00020000
-#define	RK_CRYPTO_MODE_MASK		   0x0000ffff
-#define	RK_GET_CRYPTO_MODE(mode)	   (mode & RK_CRYPTO_MODE_MASK)
-#define	RK_IS_CRYPTO_USE_ROOT_KEY(mode)    (!!(mode & RK_CRYPTO_KEY_ROOT))
-#define	RK_IS_CRYPTO_USE_PRIVATE_KEY(mode) (!!(mode & RK_CRYPTO_KEY_PRIVATE)
+#define	RK_MODE_MASK		   0x0000ffff
+#define	RK_GET_RK_MODE(mode)	   ((mode) & RK_MODE_MASK)
 
 #define	RK_AES_HASH_RX	0
 #define	RK_AES_HASH_TX	1
 
-enum rk_hash_algo {
-	TEE_ALG_SHA1 = 1,
-	TEE_ALG_MD5,
-	TEE_ALG_SHA256,
-	TEE_ALG_SHA224,
-	TEE_ALG_SHA512,
-	TEE_ALG_SHA384,
-	TEE_ALG_SHA512_224,
-	TEE_ALG_SHA512_256,
-};
-
 #define	_SBF(s,	v)			((v) <<	(s))
 #define	_BIT(b)				_SBF(b,	1)
 
@@ -37,27 +22,11 @@ enum rk_hash_algo {
 #define	AES_KEYSIZE_128			16
 #define	AES_KEYSIZE_192			24
 #define	AES_KEYSIZE_256			32
+#define	SM4_KEYSIZE			16
 
 #define	DES_BLOCK_SIZE			8
 #define	AES_BLOCK_SIZE			16
-
-#define	RK_MODE_ENCRYPT			0
-#define	RK_MODE_DECRYPT			1
-
-#define	_SBF(s,	v)			((v) <<	(s))
-#define	_BIT(b)				_SBF(b,	1)
-
-#define	DES_KEYSIZE			8
-#define	TDES_EDE_KEYSIZE		24
-#define	AES_KEYSIZE_128			16
-#define	AES_KEYSIZE_192			24
-#define	AES_KEYSIZE_256			32
-
-#define	DES_BLOCK_SIZE			8
-#define	AES_BLOCK_SIZE			16
-
-#define	RK_MODE_ENCRYPT			0
-#define	RK_MODE_DECRYPT			1
+#define	SM4_BLOCK_SIZE			16
 
 #define	CRYPTO_WRITE_MASK_SHIFT		(16)
 #define	CRYPTO_WRITE_MASK_ALL		((0xffffu << CRYPTO_WRITE_MASK_SHIFT))
@@ -140,6 +109,7 @@ enum rk_hash_algo {
 /* Block Cipher	Control	Register */
 #define	CRYPTO_BC_CTL			0x0044
 #define	CRYPTO_BC_AES			_SBF(8,	0x00)
+#define CRYPTO_BC_SM4			_SBF(8, 0x01)
 #define	CRYPTO_BC_DES			_SBF(8,	0x02)
 #define	CRYPTO_BC_TDES			_SBF(8,	0x03)
 #define	CRYPTO_BC_ECB			_SBF(4,	0x00)
@@ -165,6 +135,7 @@ enum rk_hash_algo {
 #define	CRYPTO_MODE_MD5			_SBF(4,	0x01)
 #define	CRYPTO_MODE_SHA256		_SBF(4,	0x02)
 #define	CRYPTO_MODE_SHA224		_SBF(4,	0x03)
+#define	CRYPTO_MODE_SM3			_SBF(4,	0x06)
 #define	CRYPTO_MODE_SHA512		_SBF(4,	0x08)
 #define	CRYPTO_MODE_SHA384		_SBF(4,	0x09)
 #define	CRYPTO_MODE_SHA512_224		_SBF(4,	0x0A)
@@ -269,7 +240,7 @@ enum rk_hash_algo {
 #define	CRYPTO_CH7_KEY_1		0x01f4
 #define	CRYPTO_CH7_KEY_2		0x01f8
 #define	CRYPTO_CH7_KEY_3		0x01fc
-#define	CRYPTO_KEY_CHANNLE_NUM		8
+#define	CRYPTO_KEY_CHANNEL_NUM		8
 
 #define	CRYPTO_CH0_PKEY_0		0x0200
 #define	CRYPTO_CH0_PKEY_1		0x0204
@@ -303,7 +274,7 @@ enum rk_hash_algo {
 #define	CRYPTO_CH7_PKEY_1		0x0274
 #define	CRYPTO_CH7_PKEY_2		0x0278
 #define	CRYPTO_CH7_PKEY_3		0x027c
-#define	CRYPTO_PKEY_CHANNLE_NUM		8
+#define	CRYPTO_PKEY_CHANNEL_NUM		8
 
 #define	CRYPTO_CH0_PC_LEN_0		0x0280
 #define	CRYPTO_CH0_PC_LEN_1		0x0284

commit d0d8a8fac1f5c317826af7194d124740134d91f4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Mar 5 09:41:26 2021 +0800

    rockchip: dts: rk3126-evb: update cru compatible
    
    After commit: (20647277f1 rockchip: kernel-dtb: check mismatch of kernel dtb),
    we do a simple check while loading kernel dtb according to cru compatible.
    
    If we don't update the cru compatible in U-Boot, it happens mismatch:
    ......
    Found DTB in recovery part
    DTB: rk-kernel.dtb
    HASH(s): OK
    ANDROID: fdt overlay OK
    Kernel dtb mismatch this platform!
    Failed to get kernel dtb, ret=-22
    ......
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I012b82003c1b76b6eeff9099b659d4a586e8e069

diff --git a/arch/arm/dts/rk3126-evb.dts b/arch/arm/dts/rk3126-evb.dts
index 263d524163..bd53ffdf41 100644
--- a/arch/arm/dts/rk3126-evb.dts
+++ b/arch/arm/dts/rk3126-evb.dts
@@ -45,6 +45,10 @@
 	};
 };
 
+&cru {
+	compatible = "rockchip,rk3126-cru";
+};
+
 &u2phy {
 	status = "okay";
 };

commit 63cb669fbb45f329aa3e000c0dd2893ada30d553
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Tue Mar 2 11:46:05 2021 +0800

    video/drm: vop2: add support two display
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: I934097d59556130519624a0c2848996751578bf2

diff --git a/drivers/video/drm/rockchip_crtc.h b/drivers/video/drm/rockchip_crtc.h
index c761388fb7..b4f540c99e 100644
--- a/drivers/video/drm/rockchip_crtc.h
+++ b/drivers/video/drm/rockchip_crtc.h
@@ -7,10 +7,18 @@
 #ifndef _ROCKCHIP_CRTC_H_
 #define _ROCKCHIP_CRTC_H_
 
+#define VOP2_MAX_VP				4
+
+struct rockchip_vp {
+	bool enable;
+	u8 bg_ovl_dly;
+};
+
 struct rockchip_crtc {
 	const struct rockchip_crtc_funcs *funcs;
 	const void *data;
 	struct drm_display_mode active_mode;
+	struct rockchip_vp vps[4];
 	bool hdmi_hpd : 1;
 	bool active : 1;
 };
diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index b7359f6aeb..488852edea 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -1544,6 +1544,7 @@ static int rockchip_display_probe(struct udevice *dev)
 		s->crtc_state.dev = crtc_dev;
 		s->crtc_state.crtc = crtc;
 		s->crtc_state.crtc_id = get_crtc_id(np_to_ofnode(ep_node));
+		s->crtc_state.crtc->vps[s->crtc_state.crtc_id].enable = true;
 		s->node = node;
 		if (is_ports_node)
 			s->crtc_state.ports_node = port_parent_node;
diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index 91e4bc6074..8029f5e7a0 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -106,6 +106,7 @@ struct crtc_state {
 	bool yuv_overlay;
 	struct rockchip_mcu_timing mcu_timing;
 	u32 dual_channel_swap;
+	u32 feature;
 	struct vop_rect max_output;
 };
 
diff --git a/drivers/video/drm/rockchip_vop2.c b/drivers/video/drm/rockchip_vop2.c
index 58a875c45e..b4a4454188 100644
--- a/drivers/video/drm/rockchip_vop2.c
+++ b/drivers/video/drm/rockchip_vop2.c
@@ -31,9 +31,10 @@
 #define	CFG_DONE_EN				BIT(15)
 
 #define RK3568_VERSION_INFO			0x004
-
 #define EN_MASK					1
 
+#define RK3568_AUTO_GATING_CTRL			0x008
+
 #define RK3568_DSP_IF_EN			0x028
 #define RGB_EN_SHIFT				0
 #define HDMI0_EN_SHIFT				1
@@ -87,78 +88,6 @@
 #define RK3568_VP2_INT_CLR			0xC4
 #define RK3568_VP2_INT_STATUS			0xC8
 
-/* Video Port registers definition */
-#define RK3568_VP0_DSP_CTRL				0xC00
-#define OUT_MODE_MASK					0xf
-#define OUT_MODE_SHIFT					0
-#define DATA_SWAP_MASK					0x1f
-#define DATA_SWAP_SHIFT					8
-#define DSP_RB_SWAP					2
-#define CORE_DCLK_DIV_EN_SHIFT				4
-#define P2I_EN_SHIFT					5
-#define INTERLACE_EN_SHIFT				7
-#define POST_DSP_OUT_R2Y_SHIFT				15
-#define PRE_DITHER_DOWN_EN_SHIFT			16
-#define DITHER_DOWN_EN_SHIFT				17
-#define STANDBY_EN_SHIFT				31
-
-#define RK3568_VP0_MIPI_CTRL				0xC04
-#define DCLK_DIV2_SHIFT					4
-#define DCLK_DIV2_MASK					0x3
-#define MIPI_DUAL_EN_SHIFT				20
-#define MIPI_DUAL_SWAP_EN_SHIFT				21
-
-#define RK3568_VP0_COLOR_BAR_CTRL			0xC08
-#define RK3568_VP0_DSP_BG				0xC2C
-#define RK3568_VP0_PRE_SCAN_HTIMING			0xC30
-#define RK3568_VP0_POST_DSP_HACT_INFO			0xC34
-#define RK3568_VP0_POST_DSP_VACT_INFO			0xC38
-#define RK3568_VP0_POST_SCL_FACTOR_YRGB			0xC3C
-#define RK3568_VP0_POST_SCL_CTRL			0xC40
-#define RK3568_VP0_POST_DSP_VACT_INFO_F1		0xC44
-#define RK3568_VP0_DSP_HTOTAL_HS_END			0xC48
-#define RK3568_VP0_DSP_HACT_ST_END			0xC4C
-#define RK3568_VP0_DSP_VTOTAL_VS_END			0xC50
-#define RK3568_VP0_DSP_VACT_ST_END			0xC54
-#define RK3568_VP0_DSP_VS_ST_END_F1			0xC58
-#define RK3568_VP0_DSP_VACT_ST_END_F1			0xC5C
-
-#define RK3568_VP1_DSP_CTRL				0xD00
-#define RK3568_VP1_MIPI_CTRL				0xD04
-#define RK3568_VP1_COLOR_BAR_CTRL			0xD08
-#define RK3568_VP1_PRE_SCAN_HTIMING			0xD30
-#define RK3568_VP1_POST_DSP_HACT_INFO			0xD34
-#define RK3568_VP1_POST_DSP_VACT_INFO			0xD38
-#define RK3568_VP1_POST_SCL_FACTOR_YRGB			0xD3C
-#define RK3568_VP1_POST_SCL_CTRL			0xD40
-#define RK3568_VP1_DSP_HACT_INFO			0xD34
-#define RK3568_VP1_DSP_VACT_INFO			0xD38
-#define RK3568_VP1_POST_DSP_VACT_INFO_F1		0xD44
-#define RK3568_VP1_DSP_HTOTAL_HS_END			0xD48
-#define RK3568_VP1_DSP_HACT_ST_END			0xD4C
-#define RK3568_VP1_DSP_VTOTAL_VS_END			0xD50
-#define RK3568_VP1_DSP_VACT_ST_END			0xD54
-#define RK3568_VP1_DSP_VS_ST_END_F1			0xD58
-#define RK3568_VP1_DSP_VACT_ST_END_F1			0xD5C
-
-#define RK3568_VP2_DSP_CTRL				0xE00
-#define RK3568_VP2_MIPI_CTRL				0xE04
-#define RK3568_VP2_COLOR_BAR_CTRL			0xE08
-#define RK3568_VP2_PRE_SCAN_HTIMING			0xE30
-#define RK3568_VP2_POST_DSP_HACT_INFO			0xE34
-#define RK3568_VP2_POST_DSP_VACT_INFO			0xE38
-#define RK3568_VP2_POST_SCL_FACTOR_YRGB			0xE3C
-#define RK3568_VP2_POST_SCL_CTRL			0xE40
-#define RK3568_VP2_DSP_HACT_INFO			0xE34
-#define RK3568_VP2_DSP_VACT_INFO			0xE38
-#define RK3568_VP2_POST_DSP_VACT_INFO_F1		0xE44
-#define RK3568_VP2_DSP_HTOTAL_HS_END			0xE48
-#define RK3568_VP2_DSP_HACT_ST_END			0xE4C
-#define RK3568_VP2_DSP_VTOTAL_VS_END			0xE50
-#define RK3568_VP2_DSP_VACT_ST_END			0xE54
-#define RK3568_VP2_DSP_VS_ST_END_F1			0xE58
-#define RK3568_VP2_DSP_VACT_ST_END_F1			0xE5C
-
 /* Overlay registers definition    */
 #define RK3568_OVL_CTRL				0x600
 #define OVL_PORT_MUX_REG_DONE_IMD_SHIFT		28
@@ -169,7 +98,7 @@
 #define PORT_MUX_MASK				0xf
 #define PORT_MUX_SHIFT				0
 #define LAYER_SEL_PORT_MASK			0x3
-#define LAYER_SEL_PORT_SHIFT			24
+#define LAYER_SEL_PORT_SHIFT			16
 
 #define RK3568_CLUSTER0_MIX_SRC_COLOR_CTRL	0x610
 #define RK3568_CLUSTER0_MIX_DST_COLOR_CTRL	0x614
@@ -184,11 +113,85 @@
 #define RK3568_HDR0_SRC_ALPHA_CTRL		0x6C8
 #define RK3568_HDR0_DST_ALPHA_CTRL		0x6CC
 #define RK3568_VP0_BG_MIX_CTRL			0x6E0
+#define BG_MIX_CTRL_MASK			0xff
+#define BG_MIX_CTRL_SHIFT			24
 #define RK3568_VP1_BG_MIX_CTRL			0x6E4
 #define RK3568_VP2_BG_MIX_CTRL			0x6E8
 #define RK3568_CLUSTER_DLY_NUM			0x6F0
 #define RK3568_SMART_DLY_NUM			0x6F8
 
+/* Video Port registers definition */
+#define RK3568_VP0_DSP_CTRL			0xC00
+#define OUT_MODE_MASK				0xf
+#define OUT_MODE_SHIFT				0
+#define DATA_SWAP_MASK				0x1f
+#define DATA_SWAP_SHIFT				8
+#define DSP_RB_SWAP				2
+#define CORE_DCLK_DIV_EN_SHIFT			4
+#define P2I_EN_SHIFT				5
+#define INTERLACE_EN_SHIFT			7
+#define POST_DSP_OUT_R2Y_SHIFT			15
+#define PRE_DITHER_DOWN_EN_SHIFT		16
+#define DITHER_DOWN_EN_SHIFT			17
+#define STANDBY_EN_SHIFT			31
+
+#define RK3568_VP0_MIPI_CTRL			0xC04
+#define DCLK_DIV2_SHIFT				4
+#define DCLK_DIV2_MASK				0x3
+#define MIPI_DUAL_EN_SHIFT			20
+#define MIPI_DUAL_SWAP_EN_SHIFT			21
+
+#define RK3568_VP0_COLOR_BAR_CTRL		0xC08
+#define RK3568_VP0_DSP_BG			0xC2C
+#define RK3568_VP0_PRE_SCAN_HTIMING		0xC30
+#define RK3568_VP0_POST_DSP_HACT_INFO		0xC34
+#define RK3568_VP0_POST_DSP_VACT_INFO		0xC38
+#define RK3568_VP0_POST_SCL_FACTOR_YRGB		0xC3C
+#define RK3568_VP0_POST_SCL_CTRL		0xC40
+#define RK3568_VP0_POST_DSP_VACT_INFO_F1	0xC44
+#define RK3568_VP0_DSP_HTOTAL_HS_END		0xC48
+#define RK3568_VP0_DSP_HACT_ST_END		0xC4C
+#define RK3568_VP0_DSP_VTOTAL_VS_END		0xC50
+#define RK3568_VP0_DSP_VACT_ST_END		0xC54
+#define RK3568_VP0_DSP_VS_ST_END_F1		0xC58
+#define RK3568_VP0_DSP_VACT_ST_END_F1		0xC5C
+
+#define RK3568_VP1_DSP_CTRL			0xD00
+#define RK3568_VP1_MIPI_CTRL			0xD04
+#define RK3568_VP1_COLOR_BAR_CTRL		0xD08
+#define RK3568_VP1_PRE_SCAN_HTIMING		0xD30
+#define RK3568_VP1_POST_DSP_HACT_INFO		0xD34
+#define RK3568_VP1_POST_DSP_VACT_INFO		0xD38
+#define RK3568_VP1_POST_SCL_FACTOR_YRGB		0xD3C
+#define RK3568_VP1_POST_SCL_CTRL		0xD40
+#define RK3568_VP1_DSP_HACT_INFO		0xD34
+#define RK3568_VP1_DSP_VACT_INFO		0xD38
+#define RK3568_VP1_POST_DSP_VACT_INFO_F1	0xD44
+#define RK3568_VP1_DSP_HTOTAL_HS_END		0xD48
+#define RK3568_VP1_DSP_HACT_ST_END		0xD4C
+#define RK3568_VP1_DSP_VTOTAL_VS_END		0xD50
+#define RK3568_VP1_DSP_VACT_ST_END		0xD54
+#define RK3568_VP1_DSP_VS_ST_END_F1		0xD58
+#define RK3568_VP1_DSP_VACT_ST_END_F1		0xD5C
+
+#define RK3568_VP2_DSP_CTRL			0xE00
+#define RK3568_VP2_MIPI_CTRL			0xE04
+#define RK3568_VP2_COLOR_BAR_CTRL		0xE08
+#define RK3568_VP2_PRE_SCAN_HTIMING		0xE30
+#define RK3568_VP2_POST_DSP_HACT_INFO		0xE34
+#define RK3568_VP2_POST_DSP_VACT_INFO		0xE38
+#define RK3568_VP2_POST_SCL_FACTOR_YRGB		0xE3C
+#define RK3568_VP2_POST_SCL_CTRL		0xE40
+#define RK3568_VP2_DSP_HACT_INFO		0xE34
+#define RK3568_VP2_DSP_VACT_INFO		0xE38
+#define RK3568_VP2_POST_DSP_VACT_INFO_F1	0xE44
+#define RK3568_VP2_DSP_HTOTAL_HS_END		0xE48
+#define RK3568_VP2_DSP_HACT_ST_END		0xE4C
+#define RK3568_VP2_DSP_VTOTAL_VS_END		0xE50
+#define RK3568_VP2_DSP_VACT_ST_END		0xE54
+#define RK3568_VP2_DSP_VS_ST_END_F1		0xE58
+#define RK3568_VP2_DSP_VACT_ST_END_F1		0xE5C
+
 /* Cluster0 register definition */
 #define RK3568_CLUSTER0_WIN0_CTRL0		0x1000
 #define RK3568_CLUSTER0_WIN0_CTRL1		0x1004
@@ -469,7 +472,8 @@
 #define GRF_RGB_DCLK_INV_SHIFT			3
 
 #define VOP2_LAYER_MAX				8
-#define VOP2_MAX_VP				4
+
+#define VOP_FEATURE_OUTPUT_10BIT		BIT(0)
 
 enum vop2_csc_format {
 	CSC_BT601L,
@@ -509,37 +513,44 @@ enum vop2_video_ports_id {
 };
 
 struct vop2_layer {
-	uint8_t id;
+	u8 id;
 	/**
 	 * @win_phys_id: window id of the layer selected.
 	 * Every layer must make sure to select different
 	 * windows of others.
 	 */
-	uint8_t win_phys_id;
+	u8 win_phys_id;
 };
 
 struct vop2_win {
-	uint8_t id;
-	uint8_t layer_id;
-	uint8_t phys_id;
+	u8 id;
+	u8 layer_id;
+	u8 phys_id;
+};
+
+struct vop2_vp_data {
+	u32 feature;
+	u8 vp_use_win_id;
+	u8 pre_scan_max_dly;
+	struct vop_rect max_output;
 };
 
 struct vop2_data {
 	u32 version;
-	struct vop_rect max_output[VOP2_MAX_VP];
+	struct vop2_vp_data *vp_data;
+	u8 used_layers[VOP2_MAX_VP];
+	u8 nr_vps;
+	u8 nr_layers;
+	u8 nr_mixers;
 	/**
-	 * win_id: id of window attach to VP0,VP1,VP2,VP3,
-	 * Only support one window for one VP in u-boot.
+	 * layer_sel_id: from register LAYER_SEL
 	 *
 	 */
-	uint8_t win_id[VOP2_MAX_VP];
-	uint8_t nr_vps;
-	uint8_t nr_layers;
-	/**
-	 * win_sel_id: from register LAYER_SEL
-	 *
+	u8 layer_sel_id[VOP2_LAYER_MAX];
+	/*
+	 * the win register offset
 	 */
-	uint8_t win_sel_id[VOP2_LAYER_MAX];
+	u8 win_offset[VOP2_LAYER_MAX];
 };
 
 struct vop2 {
@@ -548,24 +559,23 @@ struct vop2 {
 	void *grf;
 	u32 reg_len;
 	u32 version;
+	u32 win_reg_offset;
+	bool global_init;
 	const struct vop2_data *data;
 	/**
 	 * @nr_wins: active wins attached to the video port
 	 */
-	uint8_t nr_wins[VOP2_VP_MAX];
-	struct vop2_win win[VOP2_LAYER_MAX];
-	struct vop2_layer layer[VOP2_LAYER_MAX];
+	u8 nr_wins[VOP2_VP_MAX];
 };
 
 static struct vop2 *rockchip_vop2;
-static void vop2_setup_win_for_vp(struct display_state *state);
 
-static inline uint16_t scl_cal_scale(int src, int dst, int shift)
+static inline u16 scl_cal_scale(int src, int dst, int shift)
 {
 	return ((src * 2 - 3) << (shift - 1)) / (dst - 1);
 }
 
-static inline uint16_t scl_cal_scale2(int src, int dst)
+static inline u16 scl_cal_scale2(int src, int dst)
 {
 	return ((src - 1) << 12) / (dst - 1);
 }
@@ -667,6 +677,23 @@ static __maybe_unused bool is_uv_swap(u32 bus_format, u32 output_mode)
 		return false;
 }
 
+static int vop2_get_port_id(struct vop2 *vop2, struct crtc_state *cstate, int win_id)
+{
+	int i = 0, last_active_vp_id = 0;
+
+	for (i = 0; i < VOP2_MAX_VP; i++) {
+		if (vop2->data->vp_data[i].vp_use_win_id == win_id && cstate->crtc->vps[i].enable)
+			return i;
+	}
+
+	for (i = 0; i < VOP2_MAX_VP; i++) {
+		if (cstate->crtc->vps[i].enable)
+			last_active_vp_id = i;
+	}
+
+	return last_active_vp_id; /* unused win attach to the last port */
+}
+
 static int rockchip_vop2_init_gamma(struct vop2 *vop2,
 				    struct display_state *state)
 {
@@ -692,15 +719,9 @@ static void vop2_post_config(struct display_state *state, struct vop2 *vop2)
 			conn_state->overscan.bottom_margin) / 200;
 	u16 hact_end, vact_end;
 	u32 val;
-	u16 nr_mixers = 5, used_layer = 2, pre_scan_max_dly;
 	u32 bg_ovl_dly, bg_dly, pre_scan_dly;
 	u16 hsync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
 
-	if (cstate->crtc_id == 0)
-		pre_scan_max_dly = 69;
-	else
-		pre_scan_max_dly = 40;
-
 	if (mode->flags & DRM_MODE_FLAG_INTERLACE)
 		vsize = round_down(vsize, 2);
 
@@ -731,42 +752,74 @@ static void vop2_post_config(struct display_state *state, struct vop2 *vop2)
 		vop2_writel(vop2, RK3568_VP0_POST_DSP_VACT_INFO_F1 + vp_offset, val);
 	}
 
-	bg_ovl_dly = (nr_mixers - used_layer) << 1;
-	bg_dly = pre_scan_max_dly - bg_ovl_dly;
+	bg_ovl_dly = cstate->crtc->vps[cstate->crtc_id].bg_ovl_dly;
+	bg_dly =  vop2->data->vp_data[cstate->crtc_id].pre_scan_max_dly;
+	bg_dly -= bg_ovl_dly;
 	pre_scan_dly = bg_dly + (hdisplay >> 1) - 1;
 	pre_scan_dly = (pre_scan_dly << 16) | hsync_len;
+	vop2_mask_write(vop2, RK3568_VP0_BG_MIX_CTRL + cstate->crtc_id * 4,
+			BG_MIX_CTRL_MASK, BG_MIX_CTRL_SHIFT, bg_dly, false);
 	vop2_writel(vop2, RK3568_VP0_PRE_SCAN_HTIMING + vp_offset, pre_scan_dly);
 }
 
-static void vop2_layer_map_initial(struct vop2 *vop2)
+static void vop2_global_initial(struct vop2 *vop2, struct crtc_state *cstate)
 {
-	struct vop2_layer *layer;
-	struct vop2_win *win;
-	u32 layer_map, sel;
-	int i, j;
+	int i, j, port_mux = 0, total_used_layer = 0, last_active_vp = 0;
+	u8 shift = 0;
 
-	layer_map = vop2_readl(vop2, RK3568_OVL_LAYER_SEL);
+	if (vop2->global_init)
+		return;
 
+	memcpy(vop2->regsbak, vop2->regs, vop2->reg_len);
+	if (soc_is_rk3566())
+		vop2_mask_write(vop2, RK3568_SYS_OTP_WIN_EN, EN_MASK,
+				OTP_WIN_EN_SHIFT, 1, false);
+	vop2_mask_write(vop2, RK3568_OVL_CTRL, EN_MASK,
+			OVL_PORT_MUX_REG_DONE_IMD_SHIFT, 1, false);
+	vop2_mask_write(vop2, RK3568_DSP_IF_POL, EN_MASK,
+			IF_CTRL_REG_DONE_IMD_SHIFT, 1, false);
+	/* layer sel win id */
 	for (i = 0; i < vop2->data->nr_layers; i++) {
-		sel = (layer_map >> (4 * i)) & 0xf;
-		layer = &vop2->layer[i];
-		win = NULL;
-		for (j = 0; j < vop2->data->nr_layers; j++) {
-			if (sel == vop2->data->win_sel_id[j]) {
-				win = &vop2->win[j];
-				break;
-			}
+		shift = i * 4;
+		vop2_mask_write(vop2, RK3568_OVL_LAYER_SEL, LAYER_SEL_MASK,
+				shift,  vop2->data->layer_sel_id[i], false);
+	}
+	/**
+	 * port mux config
+	 */
+	for (i = 0; i < vop2->data->nr_vps - 1; i++) {
+		shift = i * 4;
+		if (cstate->crtc->vps[i].enable) {
+			total_used_layer += vop2->data->used_layers[i];
+			port_mux = total_used_layer - 1;
+		} else {
+			port_mux = 8;
 		}
 
-		if (!win) {
-			printf("invalid layer map :0x%x\n", layer_map);
-			return;
+		/* if it's last active vp, set all lest of mixer to it */
+		for (j = 0; j < vop2->data->nr_vps; j++) {
+			if (cstate->crtc->vps[j].enable)
+				last_active_vp = j;
 		}
+		if (i == last_active_vp)
+			port_mux = vop2->data->nr_mixers;
 
-		layer->win_phys_id = j;
-		win->layer_id = i;
-		debug("layer%d select %d\n", i, j);
+		cstate->crtc->vps[i].bg_ovl_dly = (vop2->data->nr_mixers - port_mux) << 1;
+		vop2_mask_write(vop2, RK3568_OVL_PORT_SEL, PORT_MUX_MASK,
+				PORT_MUX_SHIFT + shift, port_mux, false);
 	}
+
+	/* win sel port */
+	for (i = 0; i < vop2->data->nr_layers; i++) {
+		shift = vop2->data->win_offset[i] * 2;
+		vop2_mask_write(vop2, RK3568_OVL_PORT_SEL, LAYER_SEL_PORT_MASK,
+				LAYER_SEL_PORT_SHIFT + shift,
+				vop2_get_port_id(vop2, cstate, i), false);
+	}
+
+	vop2_writel(vop2, RK3568_AUTO_GATING_CTRL, 0);
+
+	vop2->global_init = true;
 }
 
 static int vop2_initial(struct vop2 *vop2, struct display_state *state)
@@ -776,8 +829,7 @@ static int vop2_initial(struct vop2 *vop2, struct display_state *state)
 	struct drm_display_mode *mode = &conn_state->mode;
 	char dclk_name[9];
 	struct clk dclk;
-	uint8_t shift = 0;
-	int i, ret;
+	int ret;
 
 	/* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
 	ret = clk_set_defaults(cstate->dev);
@@ -787,28 +839,13 @@ static int vop2_initial(struct vop2 *vop2, struct display_state *state)
 	ret = clk_get_by_name(cstate->dev, dclk_name, &dclk);
 	if (!ret)
 		ret = clk_set_rate(&dclk, mode->clock * 1000);
-
 	if (IS_ERR_VALUE(ret)) {
 		printf("%s: Failed to set dclk: ret=%d\n", __func__, ret);
 		return ret;
 	}
 
-	if (soc_is_rk3566())
-		vop2_mask_write(vop2, RK3568_SYS_OTP_WIN_EN, EN_MASK,
-				OTP_WIN_EN_SHIFT, 1, false);
-	memcpy(vop2->regsbak, vop2->regs, vop2->reg_len);
-
+	vop2_global_initial(vop2, cstate);
 	rockchip_vop2_init_gamma(vop2, state);
-	vop2_mask_write(vop2, RK3568_OVL_CTRL, EN_MASK,
-			OVL_PORT_MUX_REG_DONE_IMD_SHIFT, 1, false);
-	vop2_mask_write(vop2, RK3568_DSP_IF_POL, EN_MASK,
-			IF_CTRL_REG_DONE_IMD_SHIFT, 1, false);
-	for (i = 0; i < vop2->data->nr_vps - 1; i++) {
-		shift = i * 4;
-		vop2_mask_write(vop2, RK3568_OVL_PORT_SEL, PORT_MUX_MASK, PORT_MUX_SHIFT + shift, 8, false);	//todo
-	}
-
-	vop2_layer_map_initial(vop2);
 
 	return 0;
 }
@@ -821,6 +858,7 @@ static int rockchip_vop2_preinit(struct display_state *state)
 {
 	struct crtc_state *cstate = &state->crtc_state;
 	const struct vop2_data *vop2_data = cstate->crtc->data;
+	int i = 0;
 
 	if (!rockchip_vop2) {
 		rockchip_vop2 = malloc(sizeof(struct vop2));
@@ -829,18 +867,24 @@ static int rockchip_vop2_preinit(struct display_state *state)
 		rockchip_vop2->regs = dev_read_addr_ptr(cstate->dev);
 		rockchip_vop2->regsbak = malloc(RK3568_MAX_REG);
 		rockchip_vop2->reg_len = RK3568_MAX_REG;
-		rockchip_vop2->grf =
-		    syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+		rockchip_vop2->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 		if (rockchip_vop2->grf <= 0)
-			printf("%s: Get syscon grf failed (ret=%p)\n", __func__,
-			       rockchip_vop2->grf);
+			printf("%s: Get syscon grf failed (ret=%p)\n", __func__, rockchip_vop2->grf);
 
 		rockchip_vop2->version = vop2_data->version;
 		rockchip_vop2->data = vop2_data;
+		rockchip_vop2->win_reg_offset = vop2_data->vp_data[0].vp_use_win_id;
+
+		/* find the base offset for esmart0 */
+		for (i = 1; i < vop2_data->nr_vps; i++) {
+			if (rockchip_vop2->win_reg_offset > vop2_data->vp_data[i].vp_use_win_id)
+				rockchip_vop2->win_reg_offset = vop2_data->vp_data[i].vp_use_win_id;
+		}
 	}
 
 	cstate->private = rockchip_vop2;
-	cstate->max_output = vop2_data->max_output[cstate->crtc_id];
+	cstate->max_output = vop2_data->vp_data[cstate->crtc_id].max_output;
+	cstate->feature = vop2_data->vp_data[cstate->crtc_id].feature;
 
 	return 0;
 }
@@ -850,8 +894,6 @@ static int rockchip_vop2_init(struct display_state *state)
 	struct crtc_state *cstate = &state->crtc_state;
 	struct connector_state *conn_state = &state->conn_state;
 	struct drm_display_mode *mode = &conn_state->mode;
-	//const struct rockchip_crtc *crtc = cstate->crtc;
-	//const struct vop2_data *vop2_data = crtc->data;
 	struct vop2 *vop2 = cstate->private;
 	u16 hsync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
 	u16 hdisplay = mode->crtc_hdisplay;
@@ -864,16 +906,11 @@ static int rockchip_vop2_init(struct display_state *state)
 	u16 vact_st = mode->crtc_vtotal - mode->crtc_vsync_start;
 	u16 vact_end = vact_st + vdisplay;
 	bool yuv_overlay = false;
-	//bool yuv_overlay = false, post_r2y_en = false, post_y2r_en = false;
 	u32 vp_offset = (cstate->crtc_id * 0x100);
-	//struct clk dclk;
-	//fdt_size_t len;
 	u32 val;
-	//int ret;
 	bool dclk_inv;
-	uint8_t dither_down_en = 0;
-	uint8_t pre_dither_down_en = 0;
-	//uint8_t dither_down_mode = RGB888_TO_RGB666;
+	u8 dither_down_en = 0;
+	u8 pre_dither_down_en = 0;
 
 	vop2_initial(vop2, state);
 	dclk_inv = (mode->flags & DRM_MODE_FLAG_PPIXDATA) ? 0 : 1;
@@ -951,7 +988,7 @@ static int rockchip_vop2_init(struct display_state *state)
 		vop2_mask_write(vop2, RK3568_DSP_IF_EN, IF_MUX_MASK,
 				MIPI0_MUX_SHIFT, cstate->crtc_id, false);
 		vop2_mask_write(vop2, RK3568_DSP_IF_POL, EN_MASK,
-				IF_CRTL_MIPI_DCLK_POL_SHIT, ! !dclk_inv, false);
+				IF_CRTL_MIPI_DCLK_POL_SHIT, !!dclk_inv, false);
 	}
 
 	if (conn_state->output_if & VOP_OUTPUT_IF_MIPI1) {
@@ -960,7 +997,7 @@ static int rockchip_vop2_init(struct display_state *state)
 		vop2_mask_write(vop2, RK3568_DSP_IF_EN, IF_MUX_MASK,
 				MIPI1_MUX_SHIFT, cstate->crtc_id, false);
 		vop2_mask_write(vop2, RK3568_DSP_IF_POL, EN_MASK,
-				IF_CRTL_MIPI_DCLK_POL_SHIT, ! !dclk_inv, false);
+				IF_CRTL_MIPI_DCLK_POL_SHIT, !!dclk_inv, false);
 	}
 
 	if (conn_state->output_flags &
@@ -992,7 +1029,8 @@ static int rockchip_vop2_init(struct display_state *state)
 				IF_CRTL_HDMI_PIN_POL_SHIT, val, false);
 	}
 
-	if (conn_state->output_mode == ROCKCHIP_OUT_MODE_AAAA && cstate->crtc_id != 0)
+	if (conn_state->output_mode == ROCKCHIP_OUT_MODE_AAAA &&
+	    !(cstate->feature & VOP_FEATURE_OUTPUT_10BIT))
 		conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
 
 	if (is_uv_swap(conn_state->bus_format, conn_state->output_mode))
@@ -1079,16 +1117,16 @@ static int rockchip_vop2_init(struct display_state *state)
 	}
 	vop2_writel(vop2, RK3568_VP0_DSP_VTOTAL_VS_END + vp_offset,
 		    (vtotal << 16) | vsync_len);
-	val = ! !(mode->flags & DRM_MODE_FLAG_DBLCLK);
+	val = !!(mode->flags & DRM_MODE_FLAG_DBLCLK);
 	vop2_mask_write(vop2, RK3568_VP0_DSP_CTRL + vp_offset, EN_MASK,
 			CORE_DCLK_DIV_EN_SHIFT, val, false);
 
 	if (conn_state->output_mode == ROCKCHIP_OUT_MODE_YUV420)
-		vop2_mask_write(vop2, RK3568_VP0_MIPI_CTRL + vp_offset, DCLK_DIV2_MASK,
-				DCLK_DIV2_SHIFT, 0x3, false);
+		vop2_mask_write(vop2, RK3568_VP0_MIPI_CTRL + vp_offset,
+				DCLK_DIV2_MASK, DCLK_DIV2_SHIFT, 0x3, false);
 	else
-		vop2_mask_write(vop2, RK3568_VP0_MIPI_CTRL + vp_offset, DCLK_DIV2_MASK,
-				DCLK_DIV2_SHIFT, 0, false);
+		vop2_mask_write(vop2, RK3568_VP0_MIPI_CTRL + vp_offset,
+				DCLK_DIV2_MASK, DCLK_DIV2_SHIFT, 0, false);
 
 	if (yuv_overlay)
 		val = 0x20010200;
@@ -1100,76 +1138,10 @@ static int rockchip_vop2_init(struct display_state *state)
 			POST_DSP_OUT_R2Y_SHIFT, yuv_overlay, false);
 
 	vop2_post_config(state, vop2);
-	vop2_setup_win_for_vp(state);
 
 	return 0;
 }
 
-static void vop2_setup_win_for_vp(struct display_state *state)
-{
-	struct crtc_state *cstate = &state->crtc_state;
-	const struct rockchip_crtc *crtc = cstate->crtc;
-	const struct vop2_data *vop2_data = crtc->data;
-	struct vop2 *vop2 = cstate->private;
-	u8 port_id = cstate->crtc_id;
-	struct vop2_win *win;
-	struct vop2_layer *layer;
-	u8 used_layers = 0;
-	u8 layer_id, win_phys_id, win_sel_id;
-	u8 shift;
-	int i;
-
-	for (i = 0; i < port_id; i++)
-		used_layers += vop2->nr_wins[i];
-
-	vop2->nr_wins[port_id]++;
-	/*
-	 * Win and layer must map one by one, if a win is selected
-	 * by two layers, unexpected error may happen.
-	 * So when we attach a new win to a layer, we also move the
-	 * old win of the layer to the layer where the new win comes from.
-	 *
-	 */
-	layer = &vop2->layer[used_layers];
-	win = &vop2->win[port_id];
-	shift = port_id * 2;
-	vop2_mask_write(vop2, RK3568_OVL_PORT_SEL, LAYER_SEL_PORT_MASK,
-			LAYER_SEL_PORT_SHIFT + shift, port_id, false);
-	shift = used_layers * 4;
-	win_phys_id = vop2->data->win_id[port_id];
-	win_sel_id = vop2->data->win_sel_id[win_phys_id];
-	vop2_mask_write(vop2, RK3568_OVL_LAYER_SEL, LAYER_SEL_PORT_MASK, shift,
-			win_sel_id, false);
-	layer_id = win->layer_id;
-	win_phys_id = layer->win_phys_id;
-	win->layer_id = layer->id;
-	layer->win_phys_id = win->phys_id;
-	layer = &vop2->layer[layer_id];
-	win = &vop2->win[win_phys_id];
-	shift = layer_id * 4;
-	win_sel_id = vop2->data->win_sel_id[win_phys_id];
-	vop2_mask_write(vop2, RK3568_OVL_LAYER_SEL, LAYER_SEL_PORT_MASK, shift,
-			win_sel_id, false);
-	win->layer_id = layer_id;
-	layer->win_phys_id = win_phys_id;
-
-	if (port_id == (vop2_data->nr_vps - 1))
-		used_layers = vop2_data->nr_layers;
-	shift = port_id * 4;
-	vop2_mask_write(vop2, RK3568_OVL_PORT_SEL, PORT_MUX_MASK, shift,
-			used_layers, false);
-
-	if (port_id == 0) {
-		vop2_writel(vop2, 0x604, 0x54760123);
-		vop2_writel(vop2, 0x608, 0x00000755);
-		vop2_writel(vop2, 0x6e0, 0x2a000000);
-	} else {
-		vop2_writel(vop2, 0x604, 0x54760312);
-		vop2_writel(vop2, 0x608, 0x55050728);
-		vop2_writel(vop2, 0x6e4, 0x1e000000);
-	}
-}
-
 static int rockchip_vop2_set_plane(struct display_state *state)
 {
 	struct crtc_state *cstate = &state->crtc_state;
@@ -1188,12 +1160,15 @@ static int rockchip_vop2_set_plane(struct display_state *state)
 	int csc_mode;
 	u32 win_offset;
 	u32 cfg_done = CFG_DONE_EN | BIT(cstate->crtc_id);
+	struct vop2_vp_data *vp_data = &vop2->data->vp_data[cstate->crtc_id];
 
 	if (cstate->crtc_id == 1)
 		win_offset = 0x400; /* port 1 use smart0*/
 	else
 		win_offset = 0; /* port 0 use esmart0*/
 
+	win_offset = (vp_data->vp_use_win_id - vop2->win_reg_offset) * 0x200;
+
 	if (crtc_w > cstate->max_output.width) {
 		printf("ERROR: output w[%d] exceeded max width[%d]\n",
 		       crtc_w, cstate->max_output.width);
@@ -1280,40 +1255,74 @@ static int rockchip_vop2_disable(struct display_state *state)
 	return 0;
 }
 
-const struct vop2_data rk3568_vop = {
-	.nr_vps = 3,
-	.max_output = {
-		       [VOP2_VP0] = {4096, 2304},
-		       [VOP2_VP1] = {2048, 1536},
-		       [VOP2_VP2] = {1920, 1080},
-		       },
-
-	/*
+static struct vop2_vp_data rk3568_vp_data[3] = {
+	/**
+	 * vp_use_win_id index
+	 *
 	 * Cluster0-Win0: 0
 	 * Cluster1-Win0: 1
 	 * Esmart0-Win0:  2
 	 * Esmart1-Win0:  3
 	 * Smart0-Win0:   4
 	 * Smart1-Win0:   5
+	 *
+	 * for rk356x
+	 *   Esmart0-Win0[2]->vp0
+	 *   Smart0-Win0[4] ->vp1
+	 *   Esmart1-Win0[3]->vp2
 	 */
-	.win_id = {
-		   [VOP2_VP0] = 2,
-		   [VOP2_VP1] = 3,
-		   [VOP2_VP2] = 4,
-		   },
+	{
+		.feature = VOP_FEATURE_OUTPUT_10BIT,
+		.vp_use_win_id = 2, /* vp_use_win_id index */
+		.pre_scan_max_dly = 42,
+		.max_output = {4096, 2304},
+	},
+	{
+		.feature = 0,
+		.vp_use_win_id = 4,
+		.pre_scan_max_dly = 40,
+		.max_output = {2048, 1536},
+	},
+	{
+		.feature = 0,
+		.vp_use_win_id = 3,
+		.pre_scan_max_dly = 40,
+		.max_output = {1920, 1080},
+	},
+};
 
+const struct vop2_data rk3568_vop = {
+	.nr_vps = 3,
+	.vp_data = rk3568_vp_data,
+	.used_layers = {1, 1, 4},
 	/**
-	 * Win select id: from register LAYER_SEL
+	 * layer select win id: for register VOP2_LAYER_SEL
 	 *
 	 * Cluster0-Win0: 0
 	 * Cluster1-Win0: 1
 	 * Esmart0-Win0:  2
-	 * Esmart1-Win0:  6
 	 * Smart0-Win0:   3
+	 * reserved:      4
+	 * reserved:      5
+	 * Esmart1-Win0:  6
+	 * Smart1-Win0:   7
+	 */
+	.layer_sel_id = {2, 3, 6, 7, 0, 1},
+	/**
+	 * win offset for register VOP2_PORT_SEL and win register
+	 *
+	 * Cluster0-Win0: 0
+	 * Cluster1-Win0: 1
+	 * reserved:      2
+	 * reserved:      3
+	 * Esmart0-Win0:  4
+	 * Smart0-Win0:   5
+	 * Esmart1-Win0:  6
 	 * Smart1-Win0:   7
 	 */
-	.win_sel_id = {0, 1, 2, 6, 3, 7},
+	.win_offset = {0, 1, 4, 5, 6, 7},
 	.nr_layers = 6,
+	.nr_mixers = 5,
 };
 
 const struct rockchip_crtc_funcs rockchip_vop2_funcs = {

commit a5afbabdc36e0555959b239d60a9b30b5f08706b
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Thu Feb 25 20:15:03 2021 +0800

    video/drm: display: add support rk356x
    
    vop2 not support mirror connector now.
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: I2fba9d43ad1d135124dfa0ee0edcb2e5118e0a96

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index e40bd24611..b7359f6aeb 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -546,7 +546,7 @@ static int display_init(struct display_state *state)
 		return -ENXIO;
 	}
 
-	if (crtc_state->crtc->active &&
+	if (crtc_state->crtc->active && !crtc_state->ports_node &&
 	    memcmp(&crtc_state->crtc->active_mode, &conn_state->mode,
 		   sizeof(struct drm_display_mode))) {
 		printf("%s has been used for output type: %d, mode: %dx%dp%d\n",
@@ -1545,6 +1545,8 @@ static int rockchip_display_probe(struct udevice *dev)
 		s->crtc_state.crtc = crtc;
 		s->crtc_state.crtc_id = get_crtc_id(np_to_ofnode(ep_node));
 		s->node = node;
+		if (is_ports_node)
+			s->crtc_state.ports_node = port_parent_node;
 
 		if (bridge)
 			bridge->state = s;
diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index dcf28fcc59..91e4bc6074 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -87,6 +87,7 @@ struct crtc_state {
 	struct rockchip_crtc *crtc;
 	void *private;
 	ofnode node;
+	struct device_node *ports_node;
 	int crtc_id;
 
 	int format;

commit 7e781998565925d5b20e86f38c43d2d2917cb068
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 3 11:02:23 2021 +0800

    arm: cache_v7: optimise dcache inval for unaligned range
    
    - inval: flush first and last cacheline
    - disable range alignment check(noisy vebose)
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ie448c1c97a7ef15e3a10d3c984d5f36350df4eea

diff --git a/arch/arm/cpu/armv7/cache_v7.c b/arch/arm/cpu/armv7/cache_v7.c
index c4bbcc3cc3..e1c783e80b 100644
--- a/arch/arm/cpu/armv7/cache_v7.c
+++ b/arch/arm/cpu/armv7/cache_v7.c
@@ -44,8 +44,22 @@ static void v7_dcache_inval_range(u32 start, u32 stop, u32 line_len)
 {
 	u32 mva;
 
-	if (!check_cache_range(start, stop))
-		return;
+#ifdef DEBUG
+	check_cache_range(start, stop);
+#endif
+	/* aligned ? backward and flush a line_len */
+	if (start & (line_len - 1)) {
+		mva = start & ~(line_len - 1);
+		asm volatile ("mcr p15, 0, %0, c7, c14, 1" : : "r" (mva));
+		start = mva + line_len;
+	}
+
+	/* aligned ? forward and flush a line_len */
+	if (stop & (line_len - 1)) {
+		mva = stop & ~(line_len - 1);
+		asm volatile ("mcr p15, 0, %0, c7, c14, 1" : : "r" (mva));
+		stop = mva;
+	}
 
 	for (mva = start; mva < stop; mva = mva + line_len) {
 		/* DCIMVAC - Invalidate data cache by MVA to PoC */
@@ -117,8 +131,9 @@ void flush_dcache_all(void)
  */
 void invalidate_dcache_range(unsigned long start, unsigned long stop)
 {
+#ifdef DEBUG
 	check_cache_range(start, stop);
-
+#endif
 	v7_dcache_maint_range(start, stop, ARMV7_DCACHE_INVAL_RANGE);
 
 	v7_outer_cache_inval_range(start, stop);
@@ -131,8 +146,9 @@ void invalidate_dcache_range(unsigned long start, unsigned long stop)
  */
 void flush_dcache_range(unsigned long start, unsigned long stop)
 {
+#ifdef DEBUG
 	check_cache_range(start, stop);
-
+#endif
 	v7_dcache_maint_range(start, stop, ARMV7_DCACHE_CLEAN_INVAL_RANGE);
 
 	v7_outer_cache_flush_range(start, stop);

commit c2abcd78e97ff7668d953bffb983ccfd72d47714
Author: Sean Anderson <seanga2@gmail.com>
Date:   Sun Oct 4 21:39:44 2020 -0400

    UPSTREAM: firmware: scmi: Include device_compat.h
    
    This header is necessary for the dev_xxx macros.
    
    Signed-off-by: Sean Anderson <seanga2@gmail.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    
    (cherry picked from commit 66e7348fe7cbd40091dad017363f0d788ea69739)
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I8e225067f8a4204e0306d307914a547d2a66270d

diff --git a/drivers/firmware/scmi/mailbox_agent.c b/drivers/firmware/scmi/mailbox_agent.c
index 7d9fb3622e..a85cff1097 100644
--- a/drivers/firmware/scmi/mailbox_agent.c
+++ b/drivers/firmware/scmi/mailbox_agent.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <dm/device_compat.h>
 #include <errno.h>
 #include <mailbox.h>
 #include <scmi_agent.h>
diff --git a/drivers/firmware/scmi/scmi_agent-uclass.c b/drivers/firmware/scmi/scmi_agent-uclass.c
index 77160b1999..7dc533149b 100644
--- a/drivers/firmware/scmi/scmi_agent-uclass.c
+++ b/drivers/firmware/scmi/scmi_agent-uclass.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <dm/device_compat.h>
 #include <errno.h>
 #include <scmi_agent-uclass.h>
 #include <scmi_protocols.h>
diff --git a/drivers/firmware/scmi/smt.c b/drivers/firmware/scmi/smt.c
index ce8fe49939..d25478796a 100644
--- a/drivers/firmware/scmi/smt.c
+++ b/drivers/firmware/scmi/smt.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <dm.h>
+#include <dm/device_compat.h>
 #include <errno.h>
 #include <scmi_agent.h>
 #include <asm/cache.h>

commit 3cdb50e61826b9de0e070cec703df08a030e5624
Author: Etienne Carriere <etienne.carriere@linaro.org>
Date:   Wed Sep 9 18:44:06 2020 +0200

    UPSTREAM: reset: add reset controller driver for SCMI agents
    
    This change introduces a reset controller driver for SCMI agent devices.
    When SCMI agent and SCMI reset domain drivers are enabled, SCMI agent
    binds a reset controller device for each SCMI reset domain protocol
    devices enabled in the FDT.
    
    SCMI reset driver is embedded upon CONFIG_RESET_SCMI=y. If enabled,
    CONFIG_SCMI_AGENT is also enabled.
    
    SCMI Reset Domain protocol is defined in the SCMI specification [1].
    
    Links: [1] https://developer.arm.com/architectures/system-architectures/software-standards/scmi
    Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
    Cc: Simon Glass <sjg@chromium.org>
    Cc: Peng Fan <peng.fan@nxp.com>
    Cc: Sudeep Holla <sudeep.holla@arm.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    
    Conflicts:
           drivers/reset/Kconfig
           drivers/reset/Makefile
    
    (cherry picked from commit 34d76fefb2667d0ca138ff4fcf8bc8443032449f)
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I8c6dd9bb49e58cd9df9a67c1cd101d8da27f3691

diff --git a/drivers/firmware/scmi/scmi_agent-uclass.c b/drivers/firmware/scmi/scmi_agent-uclass.c
index 1f36f23b6d..77160b1999 100644
--- a/drivers/firmware/scmi/scmi_agent-uclass.c
+++ b/drivers/firmware/scmi/scmi_agent-uclass.c
@@ -74,6 +74,10 @@ static int scmi_bind_protocols(struct udevice *dev)
 			if (IS_ENABLED(CONFIG_CLK_SCMI))
 				drv = DM_GET_DRIVER(scmi_clock);
 			break;
+		case SCMI_PROTOCOL_ID_RESET_DOMAIN:
+			if (IS_ENABLED(CONFIG_RESET_SCMI))
+				drv = DM_GET_DRIVER(scmi_reset_domain);
+			break;
 		default:
 			break;
 		}
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index 08d8674c27..f045b9a163 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -93,4 +93,12 @@ config SPL_RESET_ROCKCHIP
         help
           Support for reset controller on rockchip SoC. The main limitation though
           is that some reset signals, like I2C or MISC reset multiple devices.
+
+config RESET_SCMI
+	bool "Enable SCMI reset domain driver"
+	select SCMI_FIRMWARE
+	help
+	  Enable this option if you want to support reset controller
+	  devices exposed by a SCMI agent based on SCMI reset domain
+	  protocol communication with a SCMI server.
 endmenu
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index 02615a58d8..92b0c41375 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -12,3 +12,4 @@ obj-$(CONFIG_RESET_BCM6345) += reset-bcm6345.o
 obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o
 obj-$(CONFIG_AST2500_RESET) += ast2500-reset.o
 obj-$(CONFIG_$(SPL_)RESET_ROCKCHIP) += reset-rockchip.o
+obj-$(CONFIG_RESET_SCMI) += reset-scmi.o
diff --git a/drivers/reset/reset-scmi.c b/drivers/reset/reset-scmi.c
new file mode 100644
index 0000000000..1bff8075ee
--- /dev/null
+++ b/drivers/reset/reset-scmi.c
@@ -0,0 +1,81 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019-2020 Linaro Limited
+ */
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <reset-uclass.h>
+#include <scmi_agent.h>
+#include <scmi_protocols.h>
+#include <asm/types.h>
+
+static int scmi_reset_set_level(struct reset_ctl *rst, bool assert_not_deassert)
+{
+	struct scmi_rd_reset_in in = {
+		.domain_id = rst->id,
+		.flags = assert_not_deassert ? SCMI_RD_RESET_FLAG_ASSERT : 0,
+		.reset_state = 0,
+	};
+	struct scmi_rd_reset_out out;
+	struct scmi_msg msg = SCMI_MSG_IN(SCMI_PROTOCOL_ID_RESET_DOMAIN,
+					  SCMI_RESET_DOMAIN_RESET,
+					  in, out);
+	int ret;
+
+	ret = devm_scmi_process_msg(rst->dev->parent, &msg);
+	if (ret)
+		return ret;
+
+	return scmi_to_linux_errno(out.status);
+}
+
+static int scmi_reset_assert(struct reset_ctl *rst)
+{
+	return scmi_reset_set_level(rst, true);
+}
+
+static int scmi_reset_deassert(struct reset_ctl *rst)
+{
+	return scmi_reset_set_level(rst, false);
+}
+
+static int scmi_reset_request(struct reset_ctl *rst)
+{
+	struct scmi_rd_attr_in in = {
+		.domain_id = rst->id,
+	};
+	struct scmi_rd_attr_out out;
+	struct scmi_msg msg = SCMI_MSG_IN(SCMI_PROTOCOL_ID_RESET_DOMAIN,
+					  SCMI_RESET_DOMAIN_ATTRIBUTES,
+					  in, out);
+	int ret;
+
+	/*
+	 * We don't really care about the attribute, just check
+	 * the reset domain exists.
+	 */
+	ret = devm_scmi_process_msg(rst->dev->parent, &msg);
+	if (ret)
+		return ret;
+
+	return scmi_to_linux_errno(out.status);
+}
+
+static int scmi_reset_rfree(struct reset_ctl *rst)
+{
+	return 0;
+}
+
+static const struct reset_ops scmi_reset_domain_ops = {
+	.request	= scmi_reset_request,
+	.rfree		= scmi_reset_rfree,
+	.rst_assert	= scmi_reset_assert,
+	.rst_deassert	= scmi_reset_deassert,
+};
+
+U_BOOT_DRIVER(scmi_reset_domain) = {
+	.name = "scmi_reset_domain",
+	.id = UCLASS_RESET,
+	.ops = &scmi_reset_domain_ops,
+};
diff --git a/include/scmi_protocols.h b/include/scmi_protocols.h
index 4778bcfc47..ccab97c96c 100644
--- a/include/scmi_protocols.h
+++ b/include/scmi_protocols.h
@@ -116,4 +116,64 @@ struct scmi_clk_rate_set_out {
 	s32 status;
 };
 
+/*
+ * SCMI Reset Domain Protocol
+ */
+
+enum scmi_reset_domain_message_id {
+	SCMI_RESET_DOMAIN_ATTRIBUTES = 0x3,
+	SCMI_RESET_DOMAIN_RESET = 0x4,
+};
+
+#define SCMI_RD_NAME_LEN		16
+
+#define SCMI_RD_ATTRIBUTES_FLAG_ASYNC	BIT(31)
+#define SCMI_RD_ATTRIBUTES_FLAG_NOTIF	BIT(30)
+
+#define SCMI_RD_RESET_FLAG_ASYNC	BIT(2)
+#define SCMI_RD_RESET_FLAG_ASSERT	BIT(1)
+#define SCMI_RD_RESET_FLAG_CYCLE	BIT(0)
+
+/**
+ * struct scmi_rd_attr_in - Payload for RESET_DOMAIN_ATTRIBUTES message
+ * @domain_id:	SCMI reset domain ID
+ */
+struct scmi_rd_attr_in {
+	u32 domain_id;
+};
+
+/**
+ * struct scmi_rd_attr_out - Payload for RESET_DOMAIN_ATTRIBUTES response
+ * @status:	SCMI command status
+ * @attributes:	Retrieved attributes of the reset domain
+ * @latency:	Reset cycle max lantency
+ * @name:	Reset domain name
+ */
+struct scmi_rd_attr_out {
+	s32 status;
+	u32 attributes;
+	u32 latency;
+	char name[SCMI_RD_NAME_LEN];
+};
+
+/**
+ * struct scmi_rd_reset_in - Message payload for RESET command
+ * @domain_id:		SCMI reset domain ID
+ * @flags:		Flags for the reset request
+ * @reset_state:	Reset target state
+ */
+struct scmi_rd_reset_in {
+	u32 domain_id;
+	u32 flags;
+	u32 reset_state;
+};
+
+/**
+ * struct scmi_rd_reset_out - Response payload for RESET command
+ * @status:	SCMI command status
+ */
+struct scmi_rd_reset_out {
+	s32 status;
+};
+
 #endif /* _SCMI_PROTOCOLS_H */

commit 7c4b6f223c370d11c12d314111186b35e650119a
Author: Etienne Carriere <etienne.carriere@linaro.org>
Date:   Wed Sep 9 18:44:04 2020 +0200

    UPSTREAM: clk: add clock driver for SCMI agents
    
    This change introduces a clock driver for SCMI agent devices. When
    SCMI agent and SCMI clock drivers are enabled, SCMI agent binds a
    clock device for each SCMI clock protocol devices enabled in the FDT.
    
    SCMI clock driver is embedded upon CONFIG_CLK_SCMI=y. If enabled,
    CONFIG_SCMI_AGENT is also enabled.
    
    SCMI Clock protocol is defined in the SCMI specification [1].
    
    Links: [1] https://developer.arm.com/architectures/system-architectures/software-standards/scmi
    Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
    Cc: Lukasz Majewski <lukma@denx.de>
    Cc: Simon Glass <sjg@chromium.org>
    Cc: Peng Fan <peng.fan@nxp.com>
    Cc: Sudeep Holla <sudeep.holla@arm.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    
    Conflics:
            drivers/clk/Kconfig
            drivers/clk/Makefile
    
    (cherry picked from commit 60388844836f5639e6c9a4331335ff22298128da)
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I2063cff170f75be6edb169619c7321a07051583c

diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index baa60a52e6..7ff5f7e3cf 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -61,6 +61,14 @@ config CLK_ZYNQMP
 	  This clock driver adds support for clock realted settings for
 	  ZynqMP platform.
 
+config CLK_SCMI
+	bool "Enable SCMI clock driver"
+	depends on SCMI_FIRMWARE
+	help
+	  Enable this option if you want to support clock devices exposed
+	  by a SCMI agent based on SCMI clock protocol communication
+	  with a SCMI server.
+
 source "drivers/clk/tegra/Kconfig"
 source "drivers/clk/uniphier/Kconfig"
 source "drivers/clk/exynos/Kconfig"
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index b7735933be..a3c68d140b 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -9,6 +9,7 @@ obj-$(CONFIG_$(SPL_TPL_)CLK) += clk-uclass.o clk_fixed_rate.o
 obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
 obj-$(CONFIG_SANDBOX) += clk_sandbox.o
 obj-$(CONFIG_SANDBOX) += clk_sandbox_test.o
+obj-$(CONFIG_CLK_SCMI) += clk_scmi.o
 obj-$(CONFIG_MACH_PIC32) += clk_pic32.o
 obj-$(CONFIG_CLK_RENESAS) += renesas/
 obj-$(CONFIG_CLK_ZYNQ) += clk_zynq.o
diff --git a/drivers/clk/clk_scmi.c b/drivers/clk/clk_scmi.c
new file mode 100644
index 0000000000..93a4819501
--- /dev/null
+++ b/drivers/clk/clk_scmi.c
@@ -0,0 +1,99 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019-2020 Linaro Limited
+ */
+#include <common.h>
+#include <clk-uclass.h>
+#include <dm.h>
+#include <scmi_agent.h>
+#include <scmi_protocols.h>
+#include <asm/types.h>
+
+static int scmi_clk_gate(struct clk *clk, int enable)
+{
+	struct scmi_clk_state_in in = {
+		.clock_id = clk->id,
+		.attributes = enable,
+	};
+	struct scmi_clk_state_out out;
+	struct scmi_msg msg = SCMI_MSG_IN(SCMI_PROTOCOL_ID_CLOCK,
+					  SCMI_CLOCK_CONFIG_SET,
+					  in, out);
+	int ret;
+
+	ret = devm_scmi_process_msg(clk->dev->parent, &msg);
+	if (ret)
+		return ret;
+
+	return scmi_to_linux_errno(out.status);
+}
+
+static int scmi_clk_enable(struct clk *clk)
+{
+	return scmi_clk_gate(clk, 1);
+}
+
+static int scmi_clk_disable(struct clk *clk)
+{
+	return scmi_clk_gate(clk, 0);
+}
+
+static ulong scmi_clk_get_rate(struct clk *clk)
+{
+	struct scmi_clk_rate_get_in in = {
+		.clock_id = clk->id,
+	};
+	struct scmi_clk_rate_get_out out;
+	struct scmi_msg msg = SCMI_MSG_IN(SCMI_PROTOCOL_ID_CLOCK,
+					  SCMI_CLOCK_RATE_GET,
+					  in, out);
+	int ret;
+
+	ret = devm_scmi_process_msg(clk->dev->parent, &msg);
+	if (ret < 0)
+		return ret;
+
+	ret = scmi_to_linux_errno(out.status);
+	if (ret < 0)
+		return ret;
+
+	return (ulong)(((u64)out.rate_msb << 32) | out.rate_lsb);
+}
+
+static ulong scmi_clk_set_rate(struct clk *clk, ulong rate)
+{
+	struct scmi_clk_rate_set_in in = {
+		.clock_id = clk->id,
+		.flags = SCMI_CLK_RATE_ROUND_CLOSEST,
+		.rate_lsb = (u32)rate,
+		.rate_msb = (u32)((u64)rate >> 32),
+	};
+	struct scmi_clk_rate_set_out out;
+	struct scmi_msg msg = SCMI_MSG_IN(SCMI_PROTOCOL_ID_CLOCK,
+					  SCMI_CLOCK_RATE_SET,
+					  in, out);
+	int ret;
+
+	ret = devm_scmi_process_msg(clk->dev->parent, &msg);
+	if (ret < 0)
+		return ret;
+
+	ret = scmi_to_linux_errno(out.status);
+	if (ret < 0)
+		return ret;
+
+	return scmi_clk_get_rate(clk);
+}
+
+static const struct clk_ops scmi_clk_ops = {
+	.enable = scmi_clk_enable,
+	.disable = scmi_clk_disable,
+	.get_rate = scmi_clk_get_rate,
+	.set_rate = scmi_clk_set_rate,
+};
+
+U_BOOT_DRIVER(scmi_clock) = {
+	.name = "scmi_clk",
+	.id = UCLASS_CLK,
+	.ops = &scmi_clk_ops,
+};
diff --git a/drivers/firmware/scmi/scmi_agent-uclass.c b/drivers/firmware/scmi/scmi_agent-uclass.c
index 67a6f907c9..1f36f23b6d 100644
--- a/drivers/firmware/scmi/scmi_agent-uclass.c
+++ b/drivers/firmware/scmi/scmi_agent-uclass.c
@@ -58,9 +58,9 @@ static int scmi_bind_protocols(struct udevice *dev)
 {
 	int ret = 0;
 	ofnode node;
-	struct driver *drv;
 
 	dev_for_each_subnode(node, dev) {
+		struct driver *drv = NULL;
 		u32 protocol_id;
 
 		if (!ofnode_is_available(node))
@@ -70,9 +70,17 @@ static int scmi_bind_protocols(struct udevice *dev)
 			continue;
 
 		switch (protocol_id) {
+		case SCMI_PROTOCOL_ID_CLOCK:
+			if (IS_ENABLED(CONFIG_CLK_SCMI))
+				drv = DM_GET_DRIVER(scmi_clock);
+			break;
 		default:
-			dev_info(dev, "Ignore unsupported SCMI protocol %#x\n",
-				 protocol_id);
+			break;
+		}
+
+		if (!drv) {
+			dev_dbg(dev, "Ignore unsupported SCMI protocol %#x\n",
+				protocol_id);
 			continue;
 		}
 
diff --git a/include/scmi_protocols.h b/include/scmi_protocols.h
index 86a2d109c8..4778bcfc47 100644
--- a/include/scmi_protocols.h
+++ b/include/scmi_protocols.h
@@ -7,6 +7,7 @@
 #define _SCMI_PROTOCOLS_H
 
 #include <linux/bitops.h>
+#include <asm/types.h>
 
 /*
  * Subset the SCMI protocols definition
@@ -38,4 +39,81 @@ enum scmi_status_code {
 	SCMI_PROTOCOL_ERROR = -10,
 };
 
+/*
+ * SCMI Clock Protocol
+ */
+
+enum scmi_clock_message_id {
+	SCMI_CLOCK_RATE_SET = 0x5,
+	SCMI_CLOCK_RATE_GET = 0x6,
+	SCMI_CLOCK_CONFIG_SET = 0x7,
+};
+
+#define SCMI_CLK_RATE_ASYNC_NOTIFY	BIT(0)
+#define SCMI_CLK_RATE_ASYNC_NORESP	(BIT(0) | BIT(1))
+#define SCMI_CLK_RATE_ROUND_DOWN	0
+#define SCMI_CLK_RATE_ROUND_UP		BIT(2)
+#define SCMI_CLK_RATE_ROUND_CLOSEST	BIT(3)
+
+/**
+ * struct scmi_clk_state_in - Message payload for CLOCK_CONFIG_SET command
+ * @clock_id:	SCMI clock ID
+ * @attributes:	Attributes of the targets clock state
+ */
+struct scmi_clk_state_in {
+	u32 clock_id;
+	u32 attributes;
+};
+
+/**
+ * struct scmi_clk_state_out - Response payload for CLOCK_CONFIG_SET command
+ * @status:	SCMI command status
+ */
+struct scmi_clk_state_out {
+	s32 status;
+};
+
+/**
+ * struct scmi_clk_state_in - Message payload for CLOCK_RATE_GET command
+ * @clock_id:	SCMI clock ID
+ * @attributes:	Attributes of the targets clock state
+ */
+struct scmi_clk_rate_get_in {
+	u32 clock_id;
+};
+
+/**
+ * struct scmi_clk_rate_get_out - Response payload for CLOCK_RATE_GET command
+ * @status:	SCMI command status
+ * @rate_lsb:	32bit LSB of the clock rate in Hertz
+ * @rate_msb:	32bit MSB of the clock rate in Hertz
+ */
+struct scmi_clk_rate_get_out {
+	s32 status;
+	u32 rate_lsb;
+	u32 rate_msb;
+};
+
+/**
+ * struct scmi_clk_state_in - Message payload for CLOCK_RATE_SET command
+ * @clock_id:	SCMI clock ID
+ * @flags:	Flags for the clock rate set request
+ * @rate_lsb:	32bit LSB of the clock rate in Hertz
+ * @rate_msb:	32bit MSB of the clock rate in Hertz
+ */
+struct scmi_clk_rate_set_in {
+	u32 clock_id;
+	u32 flags;
+	u32 rate_lsb;
+	u32 rate_msb;
+};
+
+/**
+ * struct scmi_clk_rate_set_out - Response payload for CLOCK_RATE_SET command
+ * @status:	SCMI command status
+ */
+struct scmi_clk_rate_set_out {
+	s32 status;
+};
+
 #endif /* _SCMI_PROTOCOLS_H */

commit 3c68533725d3a5ea015957f23ce5c72918c4f6d3
Author: Etienne Carriere <etienne.carriere@linaro.org>
Date:   Wed Sep 9 18:44:02 2020 +0200

    UPSTREAM: firmware: scmi: support Arm SMCCC transport
    
    This change implements a SMCCC transport for SCMI exchanges. This
    implementation follows the Linux kernel as references implementation
    for SCMI message processing, using the SMT format for communication
    channel meta-data.
    
    Use of SMCCC transport in SCMI FDT bindings are defined in the Linux
    kernel DT bindings since v5.8. SMCCC with SMT is implemented in OP-TEE
    from tag 3.9.0 [2].
    
    Links: [2] https://github.com/OP-TEE/optee_os/commit/a58c4d706d23
    Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
    Cc: Simon Glass <sjg@chromium.org>
    Cc: Peng Fan <peng.fan@nxp.com>
    Cc: Sudeep Holla <sudeep.holla@arm.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    
    (cherry picked from commit 1e35913a2677b1d0511769425a53cd9ae113c238)
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I3f1f28405b00578695087bd0a1b51f1d0e0183f6

diff --git a/drivers/firmware/scmi/Kconfig b/drivers/firmware/scmi/Kconfig
index c501bf4943..c3a109beac 100644
--- a/drivers/firmware/scmi/Kconfig
+++ b/drivers/firmware/scmi/Kconfig
@@ -2,7 +2,7 @@ config SCMI_FIRMWARE
 	bool "Enable SCMI support"
 	select FIRMWARE
 	select OF_TRANSLATE
-	depends on SANDBOX || DM_MAILBOX
+	depends on SANDBOX || DM_MAILBOX || ARM_SMCCC
 	help
 	  System Control and Management Interface (SCMI) is a communication
 	  protocol that defines standard interfaces for power, performance
@@ -15,5 +15,5 @@ config SCMI_FIRMWARE
 
 	  Communications between agent (client) and the SCMI server are
 	  based on message exchange. Messages can be exchange over tranport
-	  channels as a mailbox device with some piece of identified shared
-	  memory.
+	  channels as a mailbox device or an Arm SMCCC service with some
+	  piece of identified shared memory.
diff --git a/drivers/firmware/scmi/Makefile b/drivers/firmware/scmi/Makefile
index d22f53efe7..2f782bbd55 100644
--- a/drivers/firmware/scmi/Makefile
+++ b/drivers/firmware/scmi/Makefile
@@ -1,4 +1,5 @@
 obj-y	+= scmi_agent-uclass.o
 obj-y	+= smt.o
+obj-$(CONFIG_ARM_SMCCC) 	+= smccc_agent.o
 obj-$(CONFIG_DM_MAILBOX)	+= mailbox_agent.o
 obj-$(CONFIG_SANDBOX)		+= sandbox-scmi_agent.o
diff --git a/drivers/firmware/scmi/smccc_agent.c b/drivers/firmware/scmi/smccc_agent.c
new file mode 100644
index 0000000000..85dbf9195e
--- /dev/null
+++ b/drivers/firmware/scmi/smccc_agent.c
@@ -0,0 +1,89 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2020 Linaro Limited.
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <scmi_agent.h>
+#include <scmi_agent-uclass.h>
+#include <dm/devres.h>
+#include <dm/device-internal.h>
+#include <linux/arm-smccc.h>
+#include <linux/compat.h>
+
+#include "smt.h"
+
+#define SMCCC_RET_NOT_SUPPORTED         ((unsigned long)-1)
+
+/**
+ * struct scmi_smccc_channel - Description of an SCMI SMCCC transport
+ * @func_id:	SMCCC function ID used by the SCMI transport
+ * @smt:	Shared memory buffer
+ */
+struct scmi_smccc_channel {
+	ulong func_id;
+	struct scmi_smt smt;
+};
+
+static int scmi_smccc_process_msg(struct udevice *dev, struct scmi_msg *msg)
+{
+	struct scmi_smccc_channel *chan = dev_get_priv(dev);
+	struct arm_smccc_res res;
+	int ret;
+
+	ret = scmi_write_msg_to_smt(dev, &chan->smt, msg);
+	if (ret)
+		return ret;
+
+	arm_smccc_smc(chan->func_id, 0, 0, 0, 0, 0, 0, 0, &res);
+	if (res.a0 == SMCCC_RET_NOT_SUPPORTED)
+		ret = -ENXIO;
+	else
+		ret = scmi_read_resp_from_smt(dev, &chan->smt, msg);
+
+	scmi_clear_smt_channel(&chan->smt);
+
+	return ret;
+}
+
+static int scmi_smccc_probe(struct udevice *dev)
+{
+	struct scmi_smccc_channel *chan = dev_get_priv(dev);
+	u32 func_id;
+	int ret;
+
+	if (dev_read_u32(dev, "arm,smc-id", &func_id)) {
+		dev_err(dev, "Missing property func-id\n");
+		return -EINVAL;
+	}
+
+	chan->func_id = func_id;
+
+	ret = scmi_dt_get_smt_buffer(dev, &chan->smt);
+	if (ret) {
+		dev_err(dev, "Failed to get smt resources: %d\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static const struct udevice_id scmi_smccc_ids[] = {
+	{ .compatible = "arm,scmi-smc" },
+	{ }
+};
+
+static const struct scmi_agent_ops scmi_smccc_ops = {
+	.process_msg = scmi_smccc_process_msg,
+};
+
+U_BOOT_DRIVER(scmi_smccc) = {
+	.name		= "scmi-over-smccc",
+	.id		= UCLASS_SCMI_AGENT,
+	.of_match	= scmi_smccc_ids,
+	.priv_auto_alloc_size = sizeof(struct scmi_smccc_channel),
+	.probe		= scmi_smccc_probe,
+	.ops		= &scmi_smccc_ops,
+};

commit 533e551cef1e9620ba425ebbf7a96ad9388a2307
Author: Etienne Carriere <etienne.carriere@linaro.org>
Date:   Wed Sep 9 18:44:01 2020 +0200

    UPSTREAM: firmware: scmi: mailbox/smt agent device
    
    This change implements a mailbox transport using SMT format for SCMI
    exchanges. This implementation follows the Linux kernel and
    SCP-firmware [1] as references implementation for SCMI message
    processing using SMT format for communication channel meta-data.
    
    Use of mailboxes in SCMI FDT bindings are defined in the Linux kernel
    DT bindings since v4.17.
    
    Links: [1] https://github.com/ARM-software/SCP-firmware
    Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
    Cc: Simon Glass <sjg@chromium.org>
    Cc: Peng Fan <peng.fan@nxp.com>
    Cc: Sudeep Holla <sudeep.holla@arm.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    
    (cherry picked from commit 240720e9052fa7459e4d8a46d508db1ae41ed238)
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I02ed9ea6925d9d90e8b46deecd9137ed78172f94

diff --git a/drivers/firmware/scmi/Kconfig b/drivers/firmware/scmi/Kconfig
index 57e2ebbe42..c501bf4943 100644
--- a/drivers/firmware/scmi/Kconfig
+++ b/drivers/firmware/scmi/Kconfig
@@ -2,7 +2,7 @@ config SCMI_FIRMWARE
 	bool "Enable SCMI support"
 	select FIRMWARE
 	select OF_TRANSLATE
-	depends on SANDBOX
+	depends on SANDBOX || DM_MAILBOX
 	help
 	  System Control and Management Interface (SCMI) is a communication
 	  protocol that defines standard interfaces for power, performance
@@ -14,4 +14,6 @@ config SCMI_FIRMWARE
 	  or a companion host in the CPU system.
 
 	  Communications between agent (client) and the SCMI server are
-	  based on message exchange.
+	  based on message exchange. Messages can be exchange over tranport
+	  channels as a mailbox device with some piece of identified shared
+	  memory.
diff --git a/drivers/firmware/scmi/Makefile b/drivers/firmware/scmi/Makefile
index 336ea1f2a3..d22f53efe7 100644
--- a/drivers/firmware/scmi/Makefile
+++ b/drivers/firmware/scmi/Makefile
@@ -1,2 +1,4 @@
 obj-y	+= scmi_agent-uclass.o
+obj-y	+= smt.o
+obj-$(CONFIG_DM_MAILBOX)	+= mailbox_agent.o
 obj-$(CONFIG_SANDBOX)		+= sandbox-scmi_agent.o
diff --git a/drivers/firmware/scmi/mailbox_agent.c b/drivers/firmware/scmi/mailbox_agent.c
new file mode 100644
index 0000000000..7d9fb3622e
--- /dev/null
+++ b/drivers/firmware/scmi/mailbox_agent.c
@@ -0,0 +1,102 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2020 Linaro Limited.
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <mailbox.h>
+#include <scmi_agent.h>
+#include <scmi_agent-uclass.h>
+#include <dm/devres.h>
+#include <linux/compat.h>
+
+#include "smt.h"
+
+#define TIMEOUT_US_10MS			10000
+
+/**
+ * struct scmi_mbox_channel - Description of an SCMI mailbox transport
+ * @smt:	Shared memory buffer
+ * @mbox:	Mailbox channel description
+ * @timeout_us:	Timeout in microseconds for the mailbox transfer
+ */
+struct scmi_mbox_channel {
+	struct scmi_smt smt;
+	struct mbox_chan mbox;
+	ulong timeout_us;
+};
+
+static int scmi_mbox_process_msg(struct udevice *dev, struct scmi_msg *msg)
+{
+	struct scmi_mbox_channel *chan = dev_get_priv(dev);
+	int ret;
+
+	ret = scmi_write_msg_to_smt(dev, &chan->smt, msg);
+	if (ret)
+		return ret;
+
+	/* Give shm addr to mbox in case it is meaningful */
+	ret = mbox_send(&chan->mbox, chan->smt.buf);
+	if (ret) {
+		dev_err(dev, "Message send failed: %d\n", ret);
+		goto out;
+	}
+
+	/* Receive the response */
+	ret = mbox_recv(&chan->mbox, chan->smt.buf, chan->timeout_us);
+	if (ret) {
+		dev_err(dev, "Response failed: %d, abort\n", ret);
+		goto out;
+	}
+
+	ret = scmi_read_resp_from_smt(dev, &chan->smt, msg);
+
+out:
+	scmi_clear_smt_channel(&chan->smt);
+
+	return ret;
+}
+
+int scmi_mbox_probe(struct udevice *dev)
+{
+	struct scmi_mbox_channel *chan = dev_get_priv(dev);
+	int ret;
+
+	chan->timeout_us = TIMEOUT_US_10MS;
+
+	ret = mbox_get_by_index(dev, 0, &chan->mbox);
+	if (ret) {
+		dev_err(dev, "Failed to find mailbox: %d\n", ret);
+		goto out;
+	}
+
+	ret = scmi_dt_get_smt_buffer(dev, &chan->smt);
+	if (ret)
+		dev_err(dev, "Failed to get shm resources: %d\n", ret);
+
+out:
+	if (ret)
+		devm_kfree(dev, chan);
+
+	return ret;
+}
+
+static const struct udevice_id scmi_mbox_ids[] = {
+	{ .compatible = "arm,scmi" },
+	{ }
+};
+
+static const struct scmi_agent_ops scmi_mbox_ops = {
+	.process_msg = scmi_mbox_process_msg,
+};
+
+U_BOOT_DRIVER(scmi_mbox) = {
+	.name		= "scmi-over-mailbox",
+	.id		= UCLASS_SCMI_AGENT,
+	.of_match	= scmi_mbox_ids,
+	.priv_auto_alloc_size = sizeof(struct scmi_mbox_channel),
+	.probe		= scmi_mbox_probe,
+	.ops		= &scmi_mbox_ops,
+};
diff --git a/drivers/firmware/scmi/smt.c b/drivers/firmware/scmi/smt.c
new file mode 100644
index 0000000000..ce8fe49939
--- /dev/null
+++ b/drivers/firmware/scmi/smt.c
@@ -0,0 +1,139 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2015-2019, Arm Limited and Contributors. All rights reserved.
+ * Copyright (C) 2019-2020 Linaro Limited.
+ */
+
+#include <common.h>
+#include <cpu_func.h>
+#include <dm.h>
+#include <errno.h>
+#include <scmi_agent.h>
+#include <asm/cache.h>
+#include <asm/system.h>
+#include <dm/ofnode.h>
+#include <linux/compat.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+
+#include "smt.h"
+
+/**
+ * Get shared memory configuration defined by the referred DT phandle
+ * Return with a errno compliant value.
+ */
+int scmi_dt_get_smt_buffer(struct udevice *dev, struct scmi_smt *smt)
+{
+	int ret;
+	struct ofnode_phandle_args args;
+	struct resource resource;
+	fdt32_t faddr;
+	phys_addr_t paddr;
+
+	ret = dev_read_phandle_with_args(dev, "shmem", NULL, 0, 0, &args);
+	if (ret)
+		return ret;
+
+	ret = ofnode_read_resource(args.node, 0, &resource);
+	if (ret)
+		return ret;
+
+	faddr = cpu_to_fdt32(resource.start);
+	paddr = ofnode_translate_address(args.node, &faddr);
+
+	smt->size = resource_size(&resource);
+	if (smt->size < sizeof(struct scmi_smt_header)) {
+		dev_err(dev, "Shared memory buffer too small\n");
+		return -EINVAL;
+	}
+
+	smt->buf = devm_ioremap(dev, paddr, smt->size);
+	if (!smt->buf)
+		return -ENOMEM;
+
+#ifdef CONFIG_ARM
+	if (dcache_status())
+		mmu_set_region_dcache_behaviour((uintptr_t)smt->buf,
+						smt->size, DCACHE_OFF);
+#endif
+
+	return 0;
+}
+
+/**
+ * Write SCMI message @msg into a SMT shared buffer @smt.
+ * Return 0 on success and with a negative errno in case of error.
+ */
+int scmi_write_msg_to_smt(struct udevice *dev, struct scmi_smt *smt,
+			  struct scmi_msg *msg)
+{
+	struct scmi_smt_header *hdr = (void *)smt->buf;
+
+	if ((!msg->in_msg && msg->in_msg_sz) ||
+	    (!msg->out_msg && msg->out_msg_sz))
+		return -EINVAL;
+
+	if (!(hdr->channel_status & SCMI_SHMEM_CHAN_STAT_CHANNEL_FREE)) {
+		dev_dbg(dev, "Channel busy\n");
+		return -EBUSY;
+	}
+
+	if (smt->size < (sizeof(*hdr) + msg->in_msg_sz) ||
+	    smt->size < (sizeof(*hdr) + msg->out_msg_sz)) {
+		dev_dbg(dev, "Buffer too small\n");
+		return -ETOOSMALL;
+	}
+
+	/* Load message in shared memory */
+	hdr->channel_status &= ~SCMI_SHMEM_CHAN_STAT_CHANNEL_FREE;
+	hdr->length = msg->in_msg_sz + sizeof(hdr->msg_header);
+	hdr->msg_header = SMT_HEADER_TOKEN(0) |
+			  SMT_HEADER_MESSAGE_TYPE(0) |
+			  SMT_HEADER_PROTOCOL_ID(msg->protocol_id) |
+			  SMT_HEADER_MESSAGE_ID(msg->message_id);
+
+	memcpy_toio(hdr->msg_payload, msg->in_msg, msg->in_msg_sz);
+
+	return 0;
+}
+
+/**
+ * Read SCMI message from a SMT shared buffer @smt and copy it into @msg.
+ * Return 0 on success and with a negative errno in case of error.
+ */
+int scmi_read_resp_from_smt(struct udevice *dev, struct scmi_smt *smt,
+			    struct scmi_msg *msg)
+{
+	struct scmi_smt_header *hdr = (void *)smt->buf;
+
+	if (!(hdr->channel_status & SCMI_SHMEM_CHAN_STAT_CHANNEL_FREE)) {
+		dev_err(dev, "Channel unexpectedly busy\n");
+		return -EBUSY;
+	}
+
+	if (hdr->channel_status & SCMI_SHMEM_CHAN_STAT_CHANNEL_ERROR) {
+		dev_err(dev, "Channel error reported, reset channel\n");
+		return -ECOMM;
+	}
+
+	if (hdr->length > msg->out_msg_sz + sizeof(hdr->msg_header)) {
+		dev_err(dev, "Buffer to small\n");
+		return -ETOOSMALL;
+	}
+
+	/* Get the data */
+	msg->out_msg_sz = hdr->length - sizeof(hdr->msg_header);
+	memcpy_fromio(msg->out_msg, hdr->msg_payload, msg->out_msg_sz);
+
+	return 0;
+}
+
+/**
+ * Clear SMT flags in shared buffer to allow further message exchange
+ */
+void scmi_clear_smt_channel(struct scmi_smt *smt)
+{
+	struct scmi_smt_header *hdr = (void *)smt->buf;
+
+	hdr->channel_status &= ~SCMI_SHMEM_CHAN_STAT_CHANNEL_ERROR;
+}
diff --git a/drivers/firmware/scmi/smt.h b/drivers/firmware/scmi/smt.h
new file mode 100644
index 0000000000..a8c0987bd3
--- /dev/null
+++ b/drivers/firmware/scmi/smt.h
@@ -0,0 +1,86 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2015-2019, Arm Limited and Contributors. All rights reserved.
+ * Copyright (C) 2019-2020 Linaro Limited.
+ */
+#ifndef SCMI_SMT_H
+#define SCMI_SMT_H
+
+#include <asm/types.h>
+
+/**
+ * struct scmi_smt_header - Description of the shared memory message buffer
+ *
+ * SMT stands for Shared Memory based Transport.
+ * SMT uses 28 byte header prior message payload to handle the state of
+ * the communication channel realized by the shared memory area and
+ * to define SCMI protocol information the payload relates to.
+ */
+struct scmi_smt_header {
+	__le32 reserved;
+	__le32 channel_status;
+#define SCMI_SHMEM_CHAN_STAT_CHANNEL_ERROR	BIT(1)
+#define SCMI_SHMEM_CHAN_STAT_CHANNEL_FREE	BIT(0)
+	__le32 reserved1[2];
+	__le32 flags;
+#define SCMI_SHMEM_FLAG_INTR_ENABLED		BIT(0)
+	__le32 length;
+	__le32 msg_header;
+	u8 msg_payload[0];
+};
+
+#define SMT_HEADER_TOKEN(token)		(((token) << 18) & GENMASK(31, 18))
+#define SMT_HEADER_PROTOCOL_ID(proto)	(((proto) << 10) & GENMASK(17, 10))
+#define SMT_HEADER_MESSAGE_TYPE(type)	(((type) << 18) & GENMASK(9, 8))
+#define SMT_HEADER_MESSAGE_ID(id)	((id) & GENMASK(7, 0))
+
+/**
+ * struct scmi_smt - Description of a SMT memory buffer
+ * @buf:	Shared memory base address
+ * @size:	Shared memory byte size
+ */
+struct scmi_smt {
+	u8 *buf;
+	size_t size;
+};
+
+static inline bool scmi_smt_channel_is_free(struct scmi_smt *smt)
+{
+	struct scmi_smt_header *hdr = (void *)smt->buf;
+
+	return hdr->channel_status & SCMI_SHMEM_CHAN_STAT_CHANNEL_FREE;
+}
+
+static inline bool scmi_smt_channel_reports_error(struct scmi_smt *smt)
+{
+	struct scmi_smt_header *hdr = (void *)smt->buf;
+
+	return hdr->channel_status & SCMI_SHMEM_CHAN_STAT_CHANNEL_ERROR;
+}
+
+static inline void scmi_smt_get_channel(struct scmi_smt *smt)
+{
+	struct scmi_smt_header *hdr = (void *)smt->buf;
+
+	hdr->channel_status &= ~SCMI_SHMEM_CHAN_STAT_CHANNEL_FREE;
+}
+
+static inline void scmi_smt_put_channel(struct scmi_smt *smt)
+{
+	struct scmi_smt_header *hdr = (void *)smt->buf;
+
+	hdr->channel_status |= SCMI_SHMEM_CHAN_STAT_CHANNEL_FREE;
+	hdr->channel_status &= ~SCMI_SHMEM_CHAN_STAT_CHANNEL_ERROR;
+}
+
+int scmi_dt_get_smt_buffer(struct udevice *dev, struct scmi_smt *smt);
+
+int scmi_write_msg_to_smt(struct udevice *dev, struct scmi_smt *smt,
+			  struct scmi_msg *msg);
+
+int scmi_read_resp_from_smt(struct udevice *dev, struct scmi_smt *smt,
+			    struct scmi_msg *msg);
+
+void scmi_clear_smt_channel(struct scmi_smt *smt);
+
+#endif /* SCMI_SMT_H */

commit 1afcdfc6b83091af305af477f46c5828c42399d8
Author: Etienne Carriere <etienne.carriere@linaro.org>
Date:   Wed Sep 9 18:44:00 2020 +0200

    UPSTREAM: firmware: add SCMI agent uclass
    
    This change introduces SCMI agent uclass to interact with a firmware
    using the SCMI protocols [1].
    
    SCMI agent uclass currently supports a single method to request
    processing of the SCMI message by an identified server. A SCMI message
    is made of a byte payload associated to a protocol ID and a message ID,
    all defined by the SCMI specification [1]. On return from process_msg()
    method, the caller gets the service response.
    
    SCMI agent uclass defines a post bind generic sequence for all devices.
    The sequence binds all the SCMI protocols listed in the FDT for that
    SCMI agent device. Currently none, but later change will introduce
    protocols.
    
    This change implements a simple sandbox device for the SCMI agent uclass.
    The sandbox nicely answers SCMI_NOT_SUPPORTED to SCMI messages.
    To prepare for further test support, the sandbox exposes a architecture
    function for test application to read the sandbox emulated devices state.
    Currently supports 2 SCMI agents, identified by an ID in the FDT device
    name. The simplistic DM test does nothing yet.
    
    SCMI agent uclass is designed for platforms that embed a SCMI server in
    a firmware hosted somewhere, for example in a companion co-processor or
    in the secure world of the executing processor. SCMI protocols allow an
    SCMI agent to discover and access external resources as clock, reset
    controllers and more. SCMI agent and server communicate following the
    SCMI specification [1]. This SCMI agent implementation complies with
    the DT bindings defined in the Linux kernel source tree regarding
    SCMI agent description since v5.8.
    
    Links: [1] https://developer.arm.com/architectures/system-architectures/software-standards/scmi
    Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
    Cc: Simon Glass <sjg@chromium.org>
    Cc: Peng Fan <peng.fan@nxp.com>
    Cc: Sudeep Holla <sudeep.holla@arm.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    
    Conflicts:
            arch/sandbox/dts/test.dts
            configs/sandbox_defconfig
            drivers/firmware/Kconfig
            drivers/firmware/Makefile
            test/dm/Makefile
    
    (cherry picked from commit 358599efd827b0ee48af864537cc86facc9167c0)
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I251bf48c2bb60af041e71c5904e0eb73f0243439

diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 5e2f1bb95f..25e9b41783 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -172,6 +172,28 @@
 		fake-host-hwaddr = <0x00 0x00 0x66 0x44 0x22 0x22>;
 	};
 
+	firmware {
+		sandbox_firmware: sandbox-firmware {
+			compatible = "sandbox,firmware";
+		};
+
+		sandbox-scmi-agent@0 {
+			compatible = "sandbox,scmi-agent";
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		sandbox-scmi-agent@1 {
+			compatible = "sandbox,scmi-agent";
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			protocol@10 {
+				reg = <0x10>;
+			};
+		};
+	};
+
 	gpio_a: base-gpios {
 		compatible = "sandbox,gpio";
 		gpio-controller;
diff --git a/arch/sandbox/include/asm/scmi_test.h b/arch/sandbox/include/asm/scmi_test.h
new file mode 100644
index 0000000000..a811fe19c3
--- /dev/null
+++ b/arch/sandbox/include/asm/scmi_test.h
@@ -0,0 +1,43 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2020, Linaro Limited
+ */
+
+#ifndef __SANDBOX_SCMI_TEST_H
+#define __SANDBOX_SCMI_TEST_H
+
+struct udevice;
+struct sandbox_scmi_agent;
+struct sandbox_scmi_service;
+
+/**
+ * struct sandbox_scmi_agent - Simulated SCMI service seen by SCMI agent
+ * @idx:	Identifier for the SCMI agent, its index
+ */
+struct sandbox_scmi_agent {
+	uint idx;
+};
+
+/**
+ * struct sandbox_scmi_service - Reference to simutaed SCMI agents/services
+ * @agent:		Pointer to SCMI sandbox agent pointers array
+ * @agent_count:	Number of emulated agents exposed in array @agent.
+ */
+struct sandbox_scmi_service {
+	struct sandbox_scmi_agent **agent;
+	size_t agent_count;
+};
+
+#ifdef CONFIG_SCMI_FIRMWARE
+/**
+ * sandbox_scmi_service_context - Get the simulated SCMI services context
+ * @return:	Reference to backend simulated resources state
+ */
+struct sandbox_scmi_service *sandbox_scmi_service_ctx(void);
+#else
+static inline struct sandbox_scmi_service *sandbox_scmi_service_ctx(void)
+{
+	return NULL;
+}
+#endif /* CONFIG_SCMI_FIRMWARE */
+#endif /* __SANDBOX_SCMI_TEST_H */
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index 240f0a4adc..8c0d038ba2 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -82,6 +82,8 @@ CONFIG_CPU=y
 CONFIG_DM_DEMO=y
 CONFIG_DM_DEMO_SIMPLE=y
 CONFIG_DM_DEMO_SHAPE=y
+CONFIG_FIRMWARE=y
+CONFIG_SCMI_FIRMWARE=y
 CONFIG_PM8916_GPIO=y
 CONFIG_SANDBOX_GPIO=y
 CONFIG_DM_I2C_COMPAT=y
diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig
index 4c32426e0e..b034317b55 100644
--- a/drivers/firmware/Kconfig
+++ b/drivers/firmware/Kconfig
@@ -4,3 +4,5 @@ config FIRMWARE
 config ARM_PSCI_FW
 	bool
 	select FIRMWARE
+
+source "drivers/firmware/scmi/Kconfig"
diff --git a/drivers/firmware/Makefile b/drivers/firmware/Makefile
index b208255368..59782dd325 100644
--- a/drivers/firmware/Makefile
+++ b/drivers/firmware/Makefile
@@ -1,2 +1,3 @@
 obj-$(CONFIG_FIRMWARE)		+= firmware-uclass.o
 obj-$(CONFIG_ARM_PSCI_FW)	+= psci.o
+obj-$(CONFIG_SCMI_FIRMWARE)	+= scmi/
diff --git a/drivers/firmware/scmi/Kconfig b/drivers/firmware/scmi/Kconfig
new file mode 100644
index 0000000000..57e2ebbe42
--- /dev/null
+++ b/drivers/firmware/scmi/Kconfig
@@ -0,0 +1,17 @@
+config SCMI_FIRMWARE
+	bool "Enable SCMI support"
+	select FIRMWARE
+	select OF_TRANSLATE
+	depends on SANDBOX
+	help
+	  System Control and Management Interface (SCMI) is a communication
+	  protocol that defines standard interfaces for power, performance
+	  and system management. The SCMI specification is available at
+	  https://developer.arm.com/architectures/system-architectures/software-standards/scmi
+
+	  An SCMI agent communicates with a related SCMI server firmware
+	  located in another sub-system, as a companion micro controller
+	  or a companion host in the CPU system.
+
+	  Communications between agent (client) and the SCMI server are
+	  based on message exchange.
diff --git a/drivers/firmware/scmi/Makefile b/drivers/firmware/scmi/Makefile
new file mode 100644
index 0000000000..336ea1f2a3
--- /dev/null
+++ b/drivers/firmware/scmi/Makefile
@@ -0,0 +1,2 @@
+obj-y	+= scmi_agent-uclass.o
+obj-$(CONFIG_SANDBOX)		+= sandbox-scmi_agent.o
diff --git a/drivers/firmware/scmi/sandbox-scmi_agent.c b/drivers/firmware/scmi/sandbox-scmi_agent.c
new file mode 100644
index 0000000000..3179438aab
--- /dev/null
+++ b/drivers/firmware/scmi/sandbox-scmi_agent.c
@@ -0,0 +1,142 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2020, Linaro Limited
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <malloc.h>
+#include <scmi_agent.h>
+#include <scmi_agent-uclass.h>
+#include <scmi_protocols.h>
+#include <asm/io.h>
+#include <asm/scmi_test.h>
+#include <dm/device_compat.h>
+
+/*
+ * The sandbox SCMI agent driver simulates to some extend a SCMI message
+ * processing. It simulates few of the SCMI services for some of the
+ * SCMI protocols embedded in U-Boot. Currently none.
+ *
+ * This driver simulates 2 SCMI agents for test purpose.
+ *
+ * This Driver exports sandbox_scmi_service_ct() for the test sequence to
+ * get the state of the simulated services (clock state, rate, ...) and
+ * check back-end device state reflects the request send through the
+ * various uclass devices, currently nothing.
+ */
+
+#define SANDBOX_SCMI_AGENT_COUNT	2
+
+/* The list saves to simulted end devices references for test purpose */
+struct sandbox_scmi_agent *sandbox_scmi_agent_list[SANDBOX_SCMI_AGENT_COUNT];
+
+static struct sandbox_scmi_service sandbox_scmi_service_state = {
+	.agent = sandbox_scmi_agent_list,
+	.agent_count = SANDBOX_SCMI_AGENT_COUNT,
+};
+
+struct sandbox_scmi_service *sandbox_scmi_service_ctx(void)
+{
+	return &sandbox_scmi_service_state;
+}
+
+static void debug_print_agent_state(struct udevice *dev, char *str)
+{
+	struct sandbox_scmi_agent *agent = dev_get_priv(dev);
+
+	dev_dbg(dev, "Dump sandbox_scmi_agent %u: %s\n", agent->idx, str);
+};
+
+static int sandbox_scmi_test_process_msg(struct udevice *dev,
+					 struct scmi_msg *msg)
+{
+	switch (msg->protocol_id) {
+	case SCMI_PROTOCOL_ID_BASE:
+	case SCMI_PROTOCOL_ID_POWER_DOMAIN:
+	case SCMI_PROTOCOL_ID_SYSTEM:
+	case SCMI_PROTOCOL_ID_PERF:
+	case SCMI_PROTOCOL_ID_CLOCK:
+	case SCMI_PROTOCOL_ID_SENSOR:
+	case SCMI_PROTOCOL_ID_RESET_DOMAIN:
+		*(u32 *)msg->out_msg = SCMI_NOT_SUPPORTED;
+		return 0;
+	default:
+		break;
+	}
+
+	dev_err(dev, "%s(%s): Unhandled protocol_id %#x/message_id %#x\n",
+		__func__, dev->name, msg->protocol_id, msg->message_id);
+
+	if (msg->out_msg_sz < sizeof(u32))
+		return -EINVAL;
+
+	/* Intentionnaly report unhandled IDs through the SCMI return code */
+	*(u32 *)msg->out_msg = SCMI_PROTOCOL_ERROR;
+	return 0;
+}
+
+static int sandbox_scmi_test_remove(struct udevice *dev)
+{
+	struct sandbox_scmi_agent *agent = dev_get_priv(dev);
+
+	debug_print_agent_state(dev, "removed");
+
+	/* We only need to dereference the agent in the context */
+	sandbox_scmi_service_ctx()->agent[agent->idx] = NULL;
+
+	return 0;
+}
+
+static int sandbox_scmi_test_probe(struct udevice *dev)
+{
+	static const char basename[] = "sandbox-scmi-agent@";
+	struct sandbox_scmi_agent *agent = dev_get_priv(dev);
+	const size_t basename_size = sizeof(basename) - 1;
+
+	if (strncmp(basename, dev->name, basename_size))
+		return -ENOENT;
+
+	switch (dev->name[basename_size]) {
+	case '0':
+		*agent = (struct sandbox_scmi_agent){
+			.idx = 0,
+		};
+		break;
+	case '1':
+		*agent = (struct sandbox_scmi_agent){
+			.idx = 1,
+		};
+		break;
+	default:
+		dev_err(dev, "%s(): Unexpected agent ID %s\n",
+			__func__, dev->name + basename_size);
+		return -ENOENT;
+	}
+
+	debug_print_agent_state(dev, "probed");
+
+	/* Save reference for tests purpose */
+	sandbox_scmi_service_ctx()->agent[agent->idx] = agent;
+
+	return 0;
+};
+
+static const struct udevice_id sandbox_scmi_test_ids[] = {
+	{ .compatible = "sandbox,scmi-agent" },
+	{ }
+};
+
+struct scmi_agent_ops sandbox_scmi_test_ops = {
+	.process_msg = sandbox_scmi_test_process_msg,
+};
+
+U_BOOT_DRIVER(sandbox_scmi_agent) = {
+	.name = "sandbox-scmi_agent",
+	.id = UCLASS_SCMI_AGENT,
+	.of_match = sandbox_scmi_test_ids,
+	.priv_auto_alloc_size = sizeof(struct sandbox_scmi_agent),
+	.probe = sandbox_scmi_test_probe,
+	.remove = sandbox_scmi_test_remove,
+	.ops = &sandbox_scmi_test_ops,
+};
diff --git a/drivers/firmware/scmi/scmi_agent-uclass.c b/drivers/firmware/scmi/scmi_agent-uclass.c
new file mode 100644
index 0000000000..67a6f907c9
--- /dev/null
+++ b/drivers/firmware/scmi/scmi_agent-uclass.c
@@ -0,0 +1,107 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2020 Linaro Limited.
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <scmi_agent-uclass.h>
+#include <scmi_protocols.h>
+
+#include <dm/device-internal.h>
+#include <linux/compat.h>
+
+/**
+ * struct error_code - Helper structure for SCMI error code conversion
+ * @scmi:	SCMI error code
+ * @errno:	Related standard error number
+ */
+struct error_code {
+	int scmi;
+	int errno;
+};
+
+static const struct error_code scmi_linux_errmap[] = {
+	{ .scmi = SCMI_NOT_SUPPORTED, .errno = -EOPNOTSUPP, },
+	{ .scmi = SCMI_INVALID_PARAMETERS, .errno = -EINVAL, },
+	{ .scmi = SCMI_DENIED, .errno = -EACCES, },
+	{ .scmi = SCMI_NOT_FOUND, .errno = -ENOENT, },
+	{ .scmi = SCMI_OUT_OF_RANGE, .errno = -ERANGE, },
+	{ .scmi = SCMI_BUSY, .errno = -EBUSY, },
+	{ .scmi = SCMI_COMMS_ERROR, .errno = -ECOMM, },
+	{ .scmi = SCMI_GENERIC_ERROR, .errno = -EIO, },
+	{ .scmi = SCMI_HARDWARE_ERROR, .errno = -EREMOTEIO, },
+	{ .scmi = SCMI_PROTOCOL_ERROR, .errno = -EPROTO, },
+};
+
+int scmi_to_linux_errno(s32 scmi_code)
+{
+	int n;
+
+	if (!scmi_code)
+		return 0;
+
+	for (n = 0; n < ARRAY_SIZE(scmi_linux_errmap); n++)
+		if (scmi_code == scmi_linux_errmap[n].scmi)
+			return scmi_linux_errmap[1].errno;
+
+	return -EPROTO;
+}
+
+/*
+ * SCMI agent devices binds devices of various uclasses depeding on
+ * the FDT description. scmi_bind_protocol() is a generic bind sequence
+ * called by the uclass at bind stage, that is uclass post_bind.
+ */
+static int scmi_bind_protocols(struct udevice *dev)
+{
+	int ret = 0;
+	ofnode node;
+	struct driver *drv;
+
+	dev_for_each_subnode(node, dev) {
+		u32 protocol_id;
+
+		if (!ofnode_is_available(node))
+			continue;
+
+		if (ofnode_read_u32(node, "reg", &protocol_id))
+			continue;
+
+		switch (protocol_id) {
+		default:
+			dev_info(dev, "Ignore unsupported SCMI protocol %#x\n",
+				 protocol_id);
+			continue;
+		}
+
+		ret = device_bind_ofnode(dev, drv, ofnode_get_name(node),
+					 NULL, node, NULL);
+		if (ret)
+			break;
+	}
+
+	return ret;
+}
+
+static const struct scmi_agent_ops *transport_dev_ops(struct udevice *dev)
+{
+	return (const struct scmi_agent_ops *)dev->driver->ops;
+}
+
+int devm_scmi_process_msg(struct udevice *dev, struct scmi_msg *msg)
+{
+	const struct scmi_agent_ops *ops = transport_dev_ops(dev);
+
+	if (ops->process_msg)
+		return ops->process_msg(dev, msg);
+
+	return -EPROTONOSUPPORT;
+}
+
+UCLASS_DRIVER(scmi_agent) = {
+	.id		= UCLASS_SCMI_AGENT,
+	.name		= "scmi_agent",
+	.post_bind	= scmi_bind_protocols,
+};
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 6a65da3311..213bab72ce 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -77,6 +77,7 @@ enum uclass_id {
 	UCLASS_RKNAND,		/* Rockchip nand device with ftl */
 	UCLASS_RAMDISK,		/* Virtual ram disk */
 	UCLASS_RTC,		/* Real time clock device */
+	UCLASS_SCMI_AGENT,	/* Interface with an SCMI server */
 	UCLASS_SCSI,		/* SCSI device */
 	UCLASS_SERIAL,		/* Serial UART */
 	UCLASS_SPI,		/* SPI bus */
diff --git a/include/scmi_agent-uclass.h b/include/scmi_agent-uclass.h
new file mode 100644
index 0000000000..a501d1b482
--- /dev/null
+++ b/include/scmi_agent-uclass.h
@@ -0,0 +1,24 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2019-2020 Linaro Limited.
+ */
+#ifndef _SCMI_AGENT_UCLASS_H
+#define _SCMI_AGENT_UCLASS_H
+
+struct udevice;
+struct scmi_msg;
+
+/**
+ * struct scmi_transport_ops - The functions that a SCMI transport layer must implement.
+ */
+struct scmi_agent_ops {
+	/*
+	 * process_msg - Request transport to get the SCMI message processed
+	 *
+	 * @agent:		Agent using the transport
+	 * @msg:		SCMI message to be transmitted
+	 */
+	int (*process_msg)(struct udevice *dev, struct scmi_msg *msg);
+};
+
+#endif /* _SCMI_TRANSPORT_UCLASS_H */
diff --git a/include/scmi_agent.h b/include/scmi_agent.h
new file mode 100644
index 0000000000..f1be9ff209
--- /dev/null
+++ b/include/scmi_agent.h
@@ -0,0 +1,68 @@
+/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
+/*
+ * Copyright (c) 2015-2019, Arm Limited and Contributors. All rights reserved.
+ * Copyright (C) 2019-2020, Linaro Limited
+ *
+ * An SCMI agent device represent on communication path from a
+ * device driver to the remote SCMI server which driver sends
+ * messages to and receives response messages from.
+ */
+#ifndef SCMI_AGENT_H
+#define SCMI_AGENT_H
+
+#include <asm/types.h>
+
+struct udevice;
+
+/*
+ * struct scmi_msg - Context of a SCMI message sent and the response received
+ *
+ * @protocol_id:	SCMI protocol ID
+ * @message_id:		SCMI message ID for a defined protocol ID
+ * @in_msg:		Pointer to the message payload sent by the driver
+ * @in_msg_sz:		Byte size of the message payload sent
+ * @out_msg:		Pointer to buffer to store response message payload
+ * @out_msg_sz:		Byte size of the response buffer and response payload
+ */
+struct scmi_msg {
+	unsigned int protocol_id;
+	unsigned int message_id;
+	u8 *in_msg;
+	size_t in_msg_sz;
+	u8 *out_msg;
+	size_t out_msg_sz;
+};
+
+/* Helper macro to match a message on input/output array references */
+#define SCMI_MSG_IN(_protocol, _message, _in_array, _out_array) \
+	(struct scmi_msg){			\
+		.protocol_id = (_protocol),	\
+		.message_id = (_message),	\
+		.in_msg = (uint8_t *)&(_in_array),	\
+		.in_msg_sz = sizeof(_in_array),	\
+		.out_msg = (uint8_t *)&(_out_array),	\
+		.out_msg_sz = sizeof(_out_array),	\
+	}
+
+/**
+ * scmi_send_and_process_msg() - send and process a SCMI message
+ *
+ * Send a message to a SCMI server through a target SCMI agent device.
+ * Caller sets scmi_msg::out_msg_sz to the output message buffer size.
+ * On return, scmi_msg::out_msg_sz stores the response payload size.
+ *
+ * @dev:	SCMI agent device
+ * @msg:	Message structure reference
+ * @return 0 on success and a negative errno on failure
+ */
+int devm_scmi_process_msg(struct udevice *dev, struct scmi_msg *msg);
+
+/**
+ * scmi_to_linux_errno() - Convert an SCMI error code into a Linux errno code
+ *
+ * @scmi_errno:	SCMI error code value
+ * @return 0 for successful status and a negative errno otherwise
+ */
+int scmi_to_linux_errno(s32 scmi_errno);
+
+#endif /* SCMI_H */
diff --git a/include/scmi_protocols.h b/include/scmi_protocols.h
new file mode 100644
index 0000000000..86a2d109c8
--- /dev/null
+++ b/include/scmi_protocols.h
@@ -0,0 +1,41 @@
+/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
+/*
+ * Copyright (c) 2015-2019, Arm Limited and Contributors. All rights reserved.
+ * Copyright (C) 2019-2020, Linaro Limited
+ */
+#ifndef _SCMI_PROTOCOLS_H
+#define _SCMI_PROTOCOLS_H
+
+#include <linux/bitops.h>
+
+/*
+ * Subset the SCMI protocols definition
+ * based on SCMI specification v2.0 (DEN0056B)
+ * https://developer.arm.com/docs/den0056/b
+ */
+
+enum scmi_std_protocol {
+	SCMI_PROTOCOL_ID_BASE = 0x10,
+	SCMI_PROTOCOL_ID_POWER_DOMAIN = 0x11,
+	SCMI_PROTOCOL_ID_SYSTEM = 0x12,
+	SCMI_PROTOCOL_ID_PERF = 0x13,
+	SCMI_PROTOCOL_ID_CLOCK = 0x14,
+	SCMI_PROTOCOL_ID_SENSOR = 0x15,
+	SCMI_PROTOCOL_ID_RESET_DOMAIN = 0x16,
+};
+
+enum scmi_status_code {
+	SCMI_SUCCESS =  0,
+	SCMI_NOT_SUPPORTED = -1,
+	SCMI_INVALID_PARAMETERS = -2,
+	SCMI_DENIED = -3,
+	SCMI_NOT_FOUND = -4,
+	SCMI_OUT_OF_RANGE = -5,
+	SCMI_BUSY = -6,
+	SCMI_COMMS_ERROR = -7,
+	SCMI_GENERIC_ERROR = -8,
+	SCMI_HARDWARE_ERROR = -9,
+	SCMI_PROTOCOL_ERROR = -10,
+};
+
+#endif /* _SCMI_PROTOCOLS_H */
diff --git a/test/dm/Makefile b/test/dm/Makefile
index ef4f134444..c5a0022b09 100644
--- a/test/dm/Makefile
+++ b/test/dm/Makefile
@@ -45,4 +45,5 @@ obj-$(CONFIG_DM_VIDEO) += video.o
 obj-$(CONFIG_ADC) += adc.o
 obj-$(CONFIG_SPMI) += spmi.o
 obj-$(CONFIG_WDT) += wdt.o
+obj-$(CONFIG_SCMI_FIRMWARE) += scmi.o
 endif
diff --git a/test/dm/scmi.c b/test/dm/scmi.c
new file mode 100644
index 0000000000..d8c1e71f12
--- /dev/null
+++ b/test/dm/scmi.c
@@ -0,0 +1,38 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2020, Linaro Limited
+ *
+ * Tests scmi_agent uclass and the SCMI drivers implemented in other
+ * uclass devices probe when a SCMI server exposes resources.
+ *
+ * Note in test.dts the protocol@10 node in agent 1. Protocol 0x10 is not
+ * implemented in U-Boot SCMI components but the implementation is exepected
+ * to not complain on unknown protocol IDs, as long as it is not used. Note
+ * in test.dts tests that SCMI drivers probing does not fail for such an
+ * unknown SCMI protocol ID.
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <asm/scmi_test.h>
+#include <dm/device-internal.h>
+#include <dm/test.h>
+#include <test/ut.h>
+
+/*
+ * Test SCMI states when loading and releasing resources
+ * related to SCMI drivers.
+ */
+static int dm_test_scmi_sandbox_agent(struct unit_test_state *uts)
+{
+	struct sandbox_scmi_service *scmi_ctx = sandbox_scmi_service_ctx();
+
+	ut_assertnonnull(scmi_ctx);
+	ut_asserteq(2, scmi_ctx->agent_count);
+	ut_assertnull(scmi_ctx->agent[0]);
+	ut_assertnull(scmi_ctx->agent[1]);
+
+	return 0;
+}
+
+DM_TEST(dm_test_scmi_sandbox_agent, UT_TESTF_SCAN_FDT);

commit 9590331b67903ae9b9831095c3af62c943727400
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 3 12:00:03 2021 +0800

    common: Kconfig: add dependent for SKIP_RELOCATE_UBOOT
    
    If armv8 aarch32 mode, don't skip reloc. It avoids kernel
    image overlay U-Boot address.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I7a74631cb9690f861be6da6b44dc2ead7a0a0569

diff --git a/common/Kconfig b/common/Kconfig
index d478ab2337..86904f1d5e 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -657,7 +657,7 @@ config ANDROID_BOOT_IMAGE_HASH
 
 config SKIP_RELOCATE_UBOOT
 	bool "Skip U-Boot relocation"
-	default y if !ARM64
+	default y if !ARM64 && !ARM64_BOOT_AARCH32
 	help
 	  This enable support for skipping U-Boot relocation.
 

commit cf4004ba4e8d10fa928a0c497da5e38883670f38
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 3 11:59:32 2021 +0800

    configs: rk3568-aarch32: disable amp and skip reloc
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I1abde6a905b5947e99e289c838eb200e09c848e4

diff --git a/configs/rk3568-aarch32.config b/configs/rk3568-aarch32.config
index 2449878666..95dab753a7 100644
--- a/configs/rk3568-aarch32.config
+++ b/configs/rk3568-aarch32.config
@@ -1,4 +1,3 @@
-CONFIG_AMP=y
 CONFIG_ARM64_BOOT_AARCH32=y
 # CONFIG_ARM64_SUPPORT_AARCH32 is not set
 # CONFIG_ARMV7_LPAE is not set
@@ -12,8 +11,6 @@ CONFIG_HAS_THUMB2=y
 CONFIG_HAS_VBAR=y
 CONFIG_HAVE_PRIVATE_LIBGCC=y
 # CONFIG_PHYS_64BIT is not set
-CONFIG_ROCKCHIP_AMP=y
-CONFIG_SKIP_RELOCATE_UBOOT=y
 # CONFIG_SPL_DM_SERIAL is not set
 # CONFIG_SPL_OF_LIBFDT is not set
 CONFIG_SPL_SYS_THUMB_BUILD=y

commit 9451935867573d256db4916628873e85a394b431
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 3 11:21:03 2021 +0800

    rockchip: rk3568: update scriptaddr and pxefile_addr_r
    
    Set scriptaddr and pxefile_addr_r at a safe address.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I5cb618ba173cd9d59ae9fc3076ece9b64f494831

diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h
index bf3ded3aee..cce44b52a8 100644
--- a/include/configs/rk3568_common.h
+++ b/include/configs/rk3568_common.h
@@ -68,8 +68,8 @@
 #define CONFIG_ROCKUSB_G_DNL_PID	0x350a
 
 #define ENV_MEM_LAYOUT_SETTINGS \
-	"scriptaddr=0x00b00000\0" \
-	"pxefile_addr_r=0x00a00000\0" \
+	"scriptaddr=0x00c00000\0" \
+	"pxefile_addr_r=0x00e00000\0" \
 	"fdt_addr_r=0x0a100000\0" \
 	"kernel_addr_no_bl32_r=0x00280000\0" \
 	"kernel_addr_r=0x00a80000\0" \

commit bd6765492009dd863fbe744acaf335ccfc01afcd
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue Mar 2 16:55:15 2021 +0800

    mtd: mtd_blk: Support map erase
    
    Erase block with map address to implify partition bad
    block processing.
    No impact on existing framework.
    
    Change-Id: Ia118f3741446eb2716120a3c1b181f325c5a6e65
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index 823773912f..117d479f0e 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -320,15 +320,20 @@ static __maybe_unused int mtd_map_erase(struct mtd_info *mtd, loff_t offset,
 	}
 
 	while (len) {
-		if (mtd_block_isbad(mtd, pos) || mtd_block_isreserved(mtd, pos)) {
-			pr_debug("attempt to erase a bad/reserved block @%llx\n",
-				 pos);
-			pos += mtd->erasesize;
-			continue;
+		loff_t mapped_offset;
+
+		mapped_offset = pos;
+		if (!get_mtd_blk_map_address(mtd, &mapped_offset)) {
+			if (mtd_block_isbad(mtd, pos) || mtd_block_isreserved(mtd, pos)) {
+				pr_debug("attempt to erase a bad/reserved block @%llx\n",
+					 pos);
+				pos += mtd->erasesize;
+				continue;
+			}
 		}
 
 		memset(&ei, 0, sizeof(struct erase_info));
-		ei.addr = pos;
+		ei.addr = mapped_offset;
 		ei.len  = mtd->erasesize;
 		ret = mtd_erase(mtd, &ei);
 		if (ret) {

commit a5c695603cd033ec99eb9cf90f4cbdb92bafa606
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue Mar 2 16:28:32 2021 +0800

    mtd: mtd_blk: Pass rk-nand to match the kernel nand device
    
    u-boot nand dev - nand0
    kernel nand dev - rk-nand
    so u-boot transfer mtdparts with rk-nand device name
    
    Change-Id: I657c6aa7ad25f68ddb557c310666ff41999ebdfd
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index df80451e26..823773912f 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -632,7 +632,10 @@ static int mtd_blk_probe(struct udevice *udev)
 
 	desc->bdev->priv = mtd;
 	sprintf(desc->vendor, "0x%.4x", 0x2207);
-	memcpy(desc->product, mtd->name, strlen(mtd->name));
+	if (strncmp(mtd->name, "nand", 4) == 0)
+		memcpy(desc->product, "rk-nand", strlen("rk-nand"));
+	else
+		memcpy(desc->product, mtd->name, strlen(mtd->name));
 	memcpy(desc->revision, "V1.00", sizeof("V1.00"));
 	if (mtd->type == MTD_NANDFLASH) {
 #ifdef CONFIG_NAND

commit c3edf06bc147a462ec7f3fae9d288379c38343e0
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue Mar 2 16:22:52 2021 +0800

    mtd: nand: rockchip: Reuse nand0 as dev name
    
    For uboot nand framework, "nand0" is the keywords to
    match.
    
    Change-Id: I27aa40b6507859c3e2f1062bbe87a8c12160db46
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/raw/rockchip_nand.c b/drivers/mtd/nand/raw/rockchip_nand.c
index ef5ba8cde9..79024732e9 100644
--- a/drivers/mtd/nand/raw/rockchip_nand.c
+++ b/drivers/mtd/nand/raw/rockchip_nand.c
@@ -627,7 +627,6 @@ static int rockchip_nand_chip_init(int node, struct rk_nand *rknand, int devnum)
 		debug("Failed to register mtd device: %d\n", ret);
 		return ret;
 	}
-	mtd->name = "rk-nand";
 	memcpy(&rknand->mtd, mtd, sizeof(struct mtd_info));
 
 	return 0;
diff --git a/drivers/mtd/nand/raw/rockchip_nand_spl.c b/drivers/mtd/nand/raw/rockchip_nand_spl.c
index 5e1f300df2..3846416842 100644
--- a/drivers/mtd/nand/raw/rockchip_nand_spl.c
+++ b/drivers/mtd/nand/raw/rockchip_nand_spl.c
@@ -393,7 +393,6 @@ static int rockchip_nandc_probe(struct udevice *dev)
 		mtd->dev = rknand->dev;
 		mtd->priv = rknand;
 		add_mtd_device(mtd);
-		mtd->name = "rk-nand";
 		rknand->mtd = mtd;
 		ret = 0;
 	}
diff --git a/drivers/mtd/nand/raw/rockchip_nand_spl_v9.c b/drivers/mtd/nand/raw/rockchip_nand_spl_v9.c
index 0065406794..3874237b09 100644
--- a/drivers/mtd/nand/raw/rockchip_nand_spl_v9.c
+++ b/drivers/mtd/nand/raw/rockchip_nand_spl_v9.c
@@ -388,7 +388,6 @@ static int rockchip_nandc_probe(struct udevice *dev)
 		mtd->dev = rknand->dev;
 		mtd->priv = rknand;
 		add_mtd_device(mtd);
-		mtd->name = "rk-nand";
 		rknand->mtd = mtd;
 		ret = 0;
 	}
diff --git a/drivers/mtd/nand/raw/rockchip_nand_v9.c b/drivers/mtd/nand/raw/rockchip_nand_v9.c
index 8c7dbac59d..6f53937301 100644
--- a/drivers/mtd/nand/raw/rockchip_nand_v9.c
+++ b/drivers/mtd/nand/raw/rockchip_nand_v9.c
@@ -627,7 +627,6 @@ static int rockchip_nand_chip_init(int node, struct rk_nand *rknand, int devnum)
 		debug("Failed to register mtd device: %d\n", ret);
 		return ret;
 	}
-	mtd->name = "rk-nand";
 	memcpy(&rknand->mtd, mtd, sizeof(struct mtd_info));
 
 	return 0;

commit 894688431927c1b73c64860c8aa71463c2593ea2
Author: Patrice Chotard <patrice.chotard@st.com>
Date:   Fri Apr 27 15:51:23 2018 +0200

    UPSTREAM: ubifs: avoid assert failed in ubifs.c
    
    This patch solves assert failed displayed in the console during a boot.
    The root cause is that the ubifs_inode is not already allocated when
    ubifs_printdir and ubifs_finddir functions are called.
    
    Trace showing the issue:
    feed 'boot.scr.uimg', ino 94, new f_pos 0x17b40ece
    dent->ch.sqnum '7132', creat_sqnum 3886945402880
    UBIFS assert failed in ubifs_finddir at 436
    INODE ALLOCATION: creat_sqnum '7129'
    Found U-Boot script /boot.scr.uimg
    
    Change-Id: Ic506a4613d8209f1a01c118c563736915ca3d975
    Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
    Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 87deefeccc49756ee33b5c0fb6dbe331dfdff487)

diff --git a/fs/ubifs/ubifs.c b/fs/ubifs/ubifs.c
index 8f1c9d167d..739df5d301 100644
--- a/fs/ubifs/ubifs.c
+++ b/fs/ubifs/ubifs.c
@@ -350,7 +350,9 @@ static int ubifs_printdir(struct file *file, void *dirent)
 		dbg_gen("feed '%s', ino %llu, new f_pos %#x",
 			dent->name, (unsigned long long)le64_to_cpu(dent->inum),
 			key_hash_flash(c, &dent->key));
+#ifndef __UBOOT__
 		ubifs_assert(le64_to_cpu(dent->ch.sqnum) > ubifs_inode(dir)->creat_sqnum);
+#endif
 
 		nm.len = le16_to_cpu(dent->nlen);
 		over = filldir(c, (char *)dent->name, nm.len,
@@ -432,7 +434,9 @@ static int ubifs_finddir(struct super_block *sb, char *dirname,
 		dbg_gen("feed '%s', ino %llu, new f_pos %#x",
 			dent->name, (unsigned long long)le64_to_cpu(dent->inum),
 			key_hash_flash(c, &dent->key));
+#ifndef __UBOOT__
 		ubifs_assert(le64_to_cpu(dent->ch.sqnum) > ubifs_inode(dir)->creat_sqnum);
+#endif
 
 		nm.len = le16_to_cpu(dent->nlen);
 		if ((strncmp(dirname, (char *)dent->name, nm.len) == 0) &&

commit ecfe22e694bf2819ff85b237df878e570a44fcaa
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 2 19:03:19 2021 +0800

    spl: fit: not allow load fit image fail
    
    It handles the sub-image hash verify failed, making
    bootflow to try the other backup itb.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Id735f4d4b01d3c368726a3779f4e4df2dd13d1ac

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index f76fc93cc4..018d749f87 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -637,15 +637,15 @@ static int spl_internal_load_simple_fit(struct spl_image_info *spl_image,
 		/* Load the image and set up the spl_image structure */
 		ret = spl_load_fit_image(info, sector, fit, base_offset, node,
 					 &image_info);
-		if (!ret) {
-			if (image_info.entry_point == FDT_ERROR)
-				image_info.entry_point = image_info.load_addr;
+		if (ret)
+			return ret;
 
-			ret = spl_fit_standalone_release(image_info.entry_point);
-			if (ret)
-				printf("Start standalone fail, ret = %d\n",
-				       ret);
-		}
+		if (image_info.entry_point == FDT_ERROR)
+			image_info.entry_point = image_info.load_addr;
+
+		ret = spl_fit_standalone_release(image_info.entry_point);
+		if (ret)
+			printf("Start standalone fail, ret = %d\n", ret);
 
 		/* standalone is special one, continue to find others */
 		node = -1;
@@ -723,7 +723,7 @@ static int spl_internal_load_simple_fit(struct spl_image_info *spl_image,
 		ret = spl_load_fit_image(info, sector, fit, base_offset, node,
 					 &image_info);
 		if (ret < 0)
-			continue;
+			return ret;
 
 		if (os_type == IH_OS_U_BOOT) {
 #if CONFIG_IS_ENABLED(ATF)

commit 094597990e8977c417aa012bf69cf67253481f56
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 2 20:09:27 2021 +0800

    drivers: cpu: remove unused file
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I1cd331230112fed469fc792169f300802aaffdc5

diff --git a/drivers/cpu/amp-uclass.c b/drivers/cpu/amp-uclass.c
deleted file mode 100644
index 46c6875225..0000000000
--- a/drivers/cpu/amp-uclass.c
+++ /dev/null
@@ -1,186 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
- */
-
-#include <common.h>
-#include <amp.h>
-#include <dm.h>
-#include <dm/lists.h>
-
-int amp_cpu_on(u32 cpu)
-{
-	struct dm_amp_uclass_platdata *uc_pdata;
-	const struct dm_amp_ops *ops;
-	struct udevice *dev;
-	struct uclass *uc;
-	bool this_cpu;
-	int ret;
-
-	ret = uclass_get(UCLASS_AMP, &uc);
-	if (ret)
-		return ret;
-
-	for (uclass_first_device(UCLASS_AMP, &dev);
-	     dev;
-	     uclass_next_device(&dev)) {
-		uc_pdata = dev_get_uclass_platdata(dev);
-		if (!uc_pdata || uc_pdata->cpu != cpu)
-			continue;
-
-		ops = dev_get_driver_ops(dev);
-		if (!ops || !ops->cpu_on)
-			return -ENOSYS;
-
-		this_cpu = (read_mpidr() & 0x0fff) == uc_pdata->cpu;
-		return ops->cpu_on(dev, this_cpu);
-	}
-
-	return -ENODEV;
-}
-
-int amp_cpus_on(void)
-{
-	struct dm_amp_uclass_platdata *uc_pdata;
-	struct udevice *this_cpu_dev = NULL;
-	const struct dm_amp_ops *ops;
-	struct udevice *dev;
-	struct uclass *uc;
-	ulong mpidr = read_mpidr() & 0x0fff;
-	int ret;
-
-	ret = uclass_get(UCLASS_AMP, &uc);
-	if (ret)
-		return ret;
-
-	for (uclass_first_device(UCLASS_AMP, &dev);
-	     dev;
-	     uclass_next_device(&dev)) {
-		ops = dev_get_driver_ops(dev);
-		if (!ops || !ops->cpu_on)
-			continue;
-
-		uc_pdata = dev_get_uclass_platdata(dev);
-		if ((mpidr == uc_pdata->cpu) && !uc_pdata->linux_os) {
-			this_cpu_dev = dev;
-			continue;
-		}
-
-		ret = ops->cpu_on(dev, false);
-	}
-
-	if (this_cpu_dev) {
-		ops = dev_get_driver_ops(this_cpu_dev);
-		ret = ops->cpu_on(this_cpu_dev, true);
-	}
-
-	return ret;
-}
-
-int amp_bind_children(struct udevice *dev, const char *drv_name)
-{
-	const char *name;
-	ofnode node;
-	int ret;
-
-	dev_for_each_subnode(node, dev) {
-		/*
-		 * If this node has "compatible" property, this is not
-		 * a amp subnode, but a normal device. skip.
-		 */
-		ofnode_get_property(node, "compatible", &ret);
-		if (ret >= 0)
-			continue;
-
-		if (ret != -FDT_ERR_NOTFOUND)
-			return ret;
-
-		name = ofnode_get_name(node);
-		if (!name)
-			return -EINVAL;
-		ret = device_bind_driver_to_node(dev, drv_name, name,
-						 node, NULL);
-		if (ret)
-			return ret;
-	}
-
-	return 0;
-}
-
-static int amp_pre_probe(struct udevice *dev)
-{
-	struct dm_amp_uclass_platdata *uc_pdata;
-
-	uc_pdata = dev_get_uclass_platdata(dev);
-	if (!uc_pdata)
-		return -ENXIO;
-
-	uc_pdata->desc = dev_read_string(dev, "description");
-	uc_pdata->partition = dev_read_string(dev, "partition");
-	uc_pdata->cpu = dev_read_u32_default(dev, "cpu", -ENODATA);
-	uc_pdata->aarch64 = IS_ENABLED(CONFIG_ARM64) ?
-			dev_read_u32_default(dev, "aarch64", 1) : 0;
-	uc_pdata->hyp = dev_read_u32_default(dev, "hyp", 0);
-	uc_pdata->thumb = dev_read_u32_default(dev, "thumb", 0);
-	uc_pdata->secure = dev_read_u32_default(dev, "secure", 0);
-	uc_pdata->load = dev_read_u32_default(dev, "load", -ENODATA);
-	uc_pdata->entry = dev_read_u32_default(dev, "entry", -ENODATA);
-	/* optional */
-	dev_read_u32_array(dev, "memory", uc_pdata->reserved_mem,
-			   ARRAY_SIZE(uc_pdata->reserved_mem));
-	if ((read_mpidr() & 0x0fff) == uc_pdata->cpu)
-		uc_pdata->linux_os = dev_read_bool(dev, "linux-os");
-
-	/* Must assign property if not run linux os */
-	if (!uc_pdata->linux_os) {
-		if (!uc_pdata->desc || !uc_pdata->partition ||
-		    uc_pdata->cpu == -ENODATA ||
-		    uc_pdata->load == -ENODATA ||
-		    uc_pdata->entry == -ENODATA) {
-			printf("AMP: \"%s\" there is property missing\n", dev->name);
-			return -EINVAL;
-		}
-	}
-
-#ifdef DEBUG
-	printf("[%s]:\n", dev_read_name(dev));
-	printf("    descrption: %s\n", uc_pdata->desc);
-	printf("     partition: %s\n", uc_pdata->partition);
-	printf("           cpu: 0x%x\n", uc_pdata->cpu);
-	printf("       aarch64: %d\n", uc_pdata->aarch64);
-	printf("           hyp: %d\n", uc_pdata->hyp);
-	printf("         thumb: %d\n", uc_pdata->thumb);
-	printf("        secure: %d\n", uc_pdata->secure);
-	printf("          load: 0x%08x\n", uc_pdata->load);
-	printf("         entry: 0x%08x\n", uc_pdata->entry);
-	printf("      linux-os: %d\n", uc_pdata->linux_os);
-	printf("  reserved_mem: 0x%08x - 0x%08x\n\n",
-	       uc_pdata->reserved_mem[0],
-	       uc_pdata->reserved_mem[0] + uc_pdata->reserved_mem[1]);
-#endif
-
-	return 0;
-}
-
-UCLASS_DRIVER(amp) = {
-	.id		= UCLASS_AMP,
-	.name		= "amp",
-	.pre_probe	= amp_pre_probe,
-	.per_device_platdata_auto_alloc_size =
-			sizeof(struct dm_amp_uclass_platdata),
-};
-
-#ifdef DEBUG
-static int do_amp_cpus_on(cmd_tbl_t *cmdtp, int flag,
-			  int argc, char *const argv[])
-{
-	amp_cpus_on();
-	return 0;
-}
-
-U_BOOT_CMD(
-	amp_cpus_on, 1, 1, do_amp_cpus_on,
-	"Brought up all amp cpus",
-	""
-);
-#endif

commit 4f59883b198022776394193e15e8ea451a373b5b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Feb 24 18:55:01 2021 +0800

    arm: bootm: support primary amp core parameter
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I2aa08d87b077bbf414f32b1f65dd1dbd68b9f199

diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index bcf22a2ab1..f7cd3527c7 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -14,6 +14,7 @@
 
 #include <common.h>
 #include <command.h>
+#include <amp.h>
 #include <dm.h>
 #include <dm/root.h>
 #include <image.h>
@@ -323,6 +324,12 @@ static void boot_jump_linux(bootm_headers_t *images, int flag)
 	void (*kernel_entry)(void *fdt_addr, void *res0, void *res1,
 			void *res2);
 	int fake = (flag & BOOTM_STATE_OS_FAKE_GO);
+#ifdef CONFIG_AMP
+	int flags = amp_flags();
+	images->os.arch = amp_os_arch();
+#else
+	int flags = 0;
+#endif
 
 	kernel_entry = (void (*)(void *fdt_addr, void *res0, void *res1,
 				void *res2))images->ep;
@@ -348,11 +355,11 @@ static void boot_jump_linux(bootm_headers_t *images, int flag)
 		if ((IH_ARCH_DEFAULT == IH_ARCH_ARM64) &&
 		    (images->os.arch == IH_ARCH_ARM))
 			armv8_switch_to_el2(0, (u64)gd->bd->bi_arch_number,
-					    (u64)images->ft_addr, 0,
+					    (u64)images->ft_addr, flags,
 					    (u64)images->ep,
 					    ES_TO_AARCH32);
 		else
-			armv8_switch_to_el2((u64)images->ft_addr, 0, 0, 0,
+			armv8_switch_to_el2((u64)images->ft_addr, 0, 0, flags,
 					    images->ep,
 					    ES_TO_AARCH64);
 #endif

commit 31f8f6ebae796097f7f10c67dff58fd907371c63
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Feb 24 14:34:25 2021 +0800

    cpu: amp: support brought up rockchip fit image
    
    ./tools/mkimage -f amp.its -E -p 0xe00 amp.img
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Icdaf370900472622cf31df402aff84ecc6821fe4

diff --git a/drivers/cpu/Makefile b/drivers/cpu/Makefile
index d50912ffe5..963bf1e341 100644
--- a/drivers/cpu/Makefile
+++ b/drivers/cpu/Makefile
@@ -5,7 +5,6 @@
 # SPDX-License-Identifier:      GPL-2.0+
 #
 obj-$(CONFIG_CPU) += cpu-uclass.o
-obj-$(CONFIG_AMP) += amp-uclass.o
 
 obj-$(CONFIG_ARCH_BMIPS) += bmips_cpu.o
 obj-$(CONFIG_ROCKCHIP_AMP) += rockchip_amp.o
diff --git a/drivers/cpu/amp.its b/drivers/cpu/amp.its
new file mode 100644
index 0000000000..8553a9f14f
--- /dev/null
+++ b/drivers/cpu/amp.its
@@ -0,0 +1,93 @@
+/*
+ * Copyright (C) 2021 Fuzhou Rockchip Electronics Co., Ltd
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+/dts-v1/;
+/ {
+	description = "FIT source file for rockchip AMP";
+	#address-cells = <1>;
+
+	images {
+
+		amp0 {
+			description  = "bare-mental-core0";
+			data         = /incbin/("../../hal0.bin");
+			type         = "firmware";
+			compression  = "none";
+			arch         = "arm";	 // "arm64" or "arm"
+			cpu          = <0x000>;  // mpidr
+			thumb        = <0>;      // 0: arm or thumb2; 1: thumb
+			hyp          = <0>;      // 0: el1/svc; 1: el2/hyp
+			load         = <0xa00000>;
+			udelay       = <500000>;
+			hash {
+				algo = "sha256";
+			};
+		};
+
+		amp1 {
+			description  = "bare-mental-core1";
+			data         = /incbin/("../../hal1.bin");
+			type         = "firmware";
+			compression  = "none";
+			arch         = "arm";
+			cpu          = <0x100>;
+			thumb        = <0>;
+			hyp          = <0>;
+			load         = <0xb00000>;
+			udelay       = <500000>;
+			hash {
+				algo = "sha256";
+			};
+		};
+
+		amp2 {
+			description  = "bare-mental-core2";
+			data         = /incbin/("../../hal2.bin");
+			type         = "firmware";
+			compression  = "none";
+			arch         = "arm";
+			cpu          = <0x200>;
+			thumb        = <0>;
+			hyp          = <0>;
+			load         = <0xc00000>;
+			udelay       = <500000>;
+			hash {
+				algo = "sha256";
+			};
+		};
+
+		amp3 {
+			description  = "bare-mental-core3";
+			data         = /incbin/("../../hal3.bin");
+			type         = "firmware";
+			compression  = "none";
+			arch         = "arm";
+			cpu          = <0x300>;
+			thumb        = <0>;
+			hyp          = <0>;
+			load         = <0xd00000>;
+			udelay       = <500000>;
+			hash {
+				algo = "sha256";
+			};
+		};
+	};
+
+	configurations {
+		default = "conf";
+		conf {
+			description = "Rockchip AMP images";
+			rollback-index = <0x0>;
+			loadables = "amp0", "amp1", "amp2", "amp3";
+
+			signature {
+				algo = "sha256,rsa2048";
+				padding = "pss";
+				key-name-hint = "dev";
+				sign-images = "loadables";
+			};
+		};
+	};
+};
diff --git a/drivers/cpu/rockchip_amp.c b/drivers/cpu/rockchip_amp.c
index 2b1ba62105..eca6520afd 100644
--- a/drivers/cpu/rockchip_amp.c
+++ b/drivers/cpu/rockchip_amp.c
@@ -1,229 +1,203 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd
  */
+
 #include <common.h>
 #include <amp.h>
-#include <boot_rkimg.h>
 #include <bidram.h>
-#include <dm.h>
+#include <boot_rkimg.h>
 #include <sysmem.h>
 #include <asm/arch/rockchip_smccc.h>
-#include <asm/u-boot-arm.h>
 
-#define AMP_I(fmt, args...)	printf("AMP: "fmt, ##args)
-#define AMP_E(fmt, args...)	printf("AMP Error: "fmt, ##args)
+#define AMP_PART	"amp"
 
-/*
- * non-OTA packaged kernel.img & boot.img return the image size on success,
- * and a negative value on error.
- */
-static int read_rockchip_image(struct blk_desc *dev_desc,
-			       disk_partition_t *part, void *dst)
+static u32 primary_pe_arch;
+static u32 primary_pe_state;
+
+static u32 fit_get_u32_default(const void *fit, int noffset,
+			       const char *prop, u32 def)
 {
-	struct rockchip_image *img;
-	int header_len = 8;
-	int cnt, ret;
-#ifdef CONFIG_ROCKCHIP_CRC
-	u32 crc32;
-#endif
+	const fdt32_t *val;
 
-	img = memalign(ARCH_DMA_MINALIGN, RK_BLK_SIZE);
-	if (!img)
-		return -ENOMEM;
+	val = fdt_getprop(fit, noffset, prop, NULL);
+	if (!val)
+		return def;
 
-	/* read first block with header imformation */
-	ret = blk_dread(dev_desc, part->start, 1, img);
-	if (ret != 1) {
-		ret = -EIO;
-		goto err;
-	}
+	return fdt32_to_cpu(*val);
+}
 
-	if (img->tag != TAG_KERNEL) {
-		printf("Invalid %s image tag(0x%x)\n", part->name, img->tag);
-		ret = -EINVAL;
-		goto err;
-	}
+static int brought_up_all_amp(void *fit, const char *fit_uname_cfg)
+{
+	const char *uname, *desc;
+	u32 cpu, aarch64, hyp;
+	u32 thumb, us, secure = 0;
+	u32 pe_state, entry, load;
+	u32 reserved_mem[2] = { 0, 0, };
+	u32 primary_pe_entry = 0;
+	int primary_on_linux = 0;
+	int conf_noffset, noffset;
+	int loadables_index;
+	int data_size = -ENODATA;
+	u8 arch = -ENODATA;
+	int ret;
+
+	aarch64 = IS_ENABLED(CONFIG_ARM64) ? 1 : 0;
+	conf_noffset = fit_conf_get_node(fit, fit_uname_cfg);
+	for (loadables_index = 0;
+	     uname = fdt_stringlist_get(fit, conf_noffset,
+			FIT_LOADABLE_PROP, loadables_index, NULL), uname;
+	     loadables_index++) {
+		noffset = fit_image_get_node(fit, uname);
+
+		desc = fdt_getprop(fit, noffset, "description", NULL);
+		cpu = fit_get_u32_default(fit, noffset, "cpu", -ENODATA);
+		hyp = fit_get_u32_default(fit, noffset, "hyp", 0);
+		thumb = fit_get_u32_default(fit, noffset, "thumb", 0);
+		load = fit_get_u32_default(fit, noffset, "load", -ENODATA);
+		us = fit_get_u32_default(fit, noffset, "udelay", 0);
+		fit_image_get_arch(fit, noffset, &arch);
+		fit_image_get_data_size(fit, noffset, &data_size);
+		fdtdec_get_int_array(fit, noffset, "memory", reserved_mem, 2);
+
+		if (!desc || cpu == -ENODATA || data_size == -ENODATA ||
+		    load == -ENODATA || arch == -ENODATA) {
+			AMP_I("property missing!\n");
+			return -EINVAL;
+		}
 
-	/*
-	 * read the rest blks
-	 * total size = image size + 8 bytes header + 4 bytes crc32
-	 */
-	cnt = DIV_ROUND_UP(img->size + 8 + 4, RK_BLK_SIZE);
-	if (!sysmem_alloc_base_by_name((const char *)part->name,
-				       (phys_addr_t)dst,
-				       cnt * dev_desc->blksz)) {
-		ret = -ENXIO;
-		goto err;
-	}
+		entry = load;
+		aarch64 = (arch == IH_ARCH_ARM) ? 0 : 1;
+		pe_state = PE_STATE(aarch64, hyp, thumb, secure);
+
+#ifdef DEBUG
+		AMP_I("   pe_state: 0x%08x\n", pe_state);
+		AMP_I("        cpu: 0x%x\n", cpu);
+		AMP_I("    aarch64: %d\n", aarch64);
+		AMP_I("        hyp: %d\n", hyp);
+		AMP_I("      thumb: %d\n", thumb);
+		AMP_I("     secure: %d\n", secure);
+		AMP_I("      entry: 0x%08x\n", entry);
+		AMP_I("        mem: 0x%08x - 0x%08x\n\n",
+		      reserved_mem[0], reserved_mem[0] + reserved_mem[1]);
+#endif
+		if (!data_size)
+			continue;
+
+		if (reserved_mem[1]) {
+			ret = bidram_reserve_by_name(desc, reserved_mem[0],
+						     reserved_mem[1]);
+			if (ret) {
+				AMP_E("Reserve \"%s\" region at 0x%08x - 0x%08x failed, ret=%d\n",
+				      desc, reserved_mem[0],
+				      reserved_mem[0] + reserved_mem[1], ret);
+				return -ENOMEM;
+			}
+		} else if (!sysmem_alloc_base_by_name(desc,
+					(phys_addr_t)load, data_size)) {
+			return -ENXIO;
+		}
 
-	memcpy(dst, img->image, RK_BLK_SIZE - header_len);
-	ret = blk_dread(dev_desc, part->start + 1, cnt - 1,
-			dst + RK_BLK_SIZE - header_len);
-	if (ret != (cnt - 1)) {
-		printf("Failed to read %s part, ret=%d\n", part->name, ret);
-		ret = -EIO;
-	} else {
-		ret = img->size;
+		if ((read_mpidr() & 0x0fff) == cpu) {
+			primary_pe_arch = arch;
+			primary_pe_state = pe_state;
+			primary_pe_entry = entry;
+			primary_on_linux =
+				!!fdt_getprop(fit, noffset, "linux-os", NULL);
+			continue;
+		}
+
+		AMP_I("Brought up cpu[%x] with state 0x%x, entry 0x%08x ...",
+		      cpu, pe_state, entry);
+
+		ret = sip_smc_amp_cfg(AMP_PE_STATE, cpu, pe_state);
+		if (ret) {
+			printf("amp cfg failed, ret=%d\n", ret);
+			return ret;
+		}
+
+		ret = psci_cpu_on(cpu, entry);
+		if (ret) {
+			printf("cpu up failed, ret=%d\n", ret);
+			return ret;
+		}
+		printf("OK\n");
+		if (us)
+			udelay(us);
 	}
 
-#ifdef CONFIG_ROCKCHIP_CRC
-	printf("%s image rk crc32 verify... ", part->name);
-	crc32 = crc32_verify((uchar *)(ulong)dst, img->size + 4);
-	if (!crc32) {
-		printf("fail!\n");
-		ret = -EINVAL;
-	} else {
-		printf("okay.\n");
+	if (!primary_on_linux && primary_pe_entry) {
+		flush_dcache_all();
+		AMP_I("Brought up cpu[%x, self] with state 0x%x, entry 0x%08x ...",
+		      (u32)read_mpidr() & 0x0fff, primary_pe_state, primary_pe_entry);
+		cleanup_before_linux();
+		printf("OK\n");
+		armv8_switch_to_el2(0, 0, 0, primary_pe_state,
+				    (u64)primary_pe_entry,
+				    aarch64 ? ES_TO_AARCH64 : ES_TO_AARCH32);
 	}
-#endif
 
-err:
-	free(img);
 	return ret;
 }
 
-/*
- * An example for amps dts node configure:
- *
- * amps {
- *	compatible = "uboot,rockchip-amp";
- *	status = "okay";
- *
- *	amp@0 {
- *		description  = "mcu-os1";
- *		partition    = "mcu1";
- *		cpu          = <0x1>;		// this is mpidr!
- *		aarch64	     = <1>;	     	// 0: aarch32, 1: aarch64
- *		thumb	     = <0>;		// 0: arm, 1: thumb
- *		hyp	     = <1>;	 	// 0: el1/svc, 1: el2/hyp
- *		secure	     = <0>;		// 0: non-secure, 1: secure
- *		load         = <0x800000>;
- *		entry        = <0x800000>;
- *		memory       = <0x800000 0x400000>;
- *	};
- *
- *	amp@1 {
- *		......
- *	};
- *
- *	......
- * };
- *
- * U-Boot load "mcu-os1" firmware to "0x800000" address from partiton
- * "mcu1" for cpu[1] with ARM, aarch64, hyp(el2) and non-secure state,
- * running on 0x800000.
- *
- * U-Boot reserve memory from 0x800000 with 0x400000 size in order
- * to make it invisible for kernel.
- *
- * Please use rockchip tool "mkkrnlimg" to pack firmware binary, example:
- * ./scripts/mkkrnlimg mcu-os1.bin mcu-os1.img
- */
-
-static int rockchip_amp_cpu_on(struct udevice *dev, bool this_cpu)
+int amp_cpus_on(void)
 {
-	struct dm_amp_uclass_platdata *uc_pdata;
 	struct blk_desc *dev_desc;
-	disk_partition_t part_info;
-	int ret, size;
-	u32 pe_state;
-	u32 es_to_aarch;
-
-	uc_pdata = dev_get_uclass_platdata(dev);
-	if (!uc_pdata)
-		return -ENXIO;
+	bootm_headers_t images;
+	disk_partition_t part;
+	void *fit;
+	int ret = 0;
 
 	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc)
-		return -EEXIST;
+		return -EIO;
 
-	ret = part_get_info_by_name(dev_desc, uc_pdata->partition, &part_info);
-	if (ret < 0) {
-		AMP_E("\"%s\" find partition \"%s\" failed\n",
-		      uc_pdata->desc, uc_pdata->partition);
-		return ret;
-	}
+	if (part_get_info_by_name(dev_desc, AMP_PART, &part) < 0)
+		return -ENODEV;
 
-	if (uc_pdata->reserved_mem[1]) {
-		ret = bidram_reserve_by_name(uc_pdata->partition,
-					     uc_pdata->reserved_mem[0],
-					     uc_pdata->reserved_mem[1]);
-		if (ret) {
-			AMP_E("Reserve \"%s\" region at 0x%08x - 0x%08x failed, ret=%d\n",
-			      uc_pdata->desc, uc_pdata->reserved_mem[0],
-			      uc_pdata->reserved_mem[0] +
-			      uc_pdata->reserved_mem[1], ret);
-			return -ENOMEM;
-		}
-	}
+	fit = sysmem_alloc(MEM_FIT, part.size * part.blksz);
+	if (!fit)
+		return -ENOMEM;
 
-	size = read_rockchip_image(dev_desc, &part_info,
-				   (void *)(ulong)uc_pdata->load);
-	if (size < 0) {
-		AMP_E("\"%s\" load at 0x%08x failed\n",
-		      uc_pdata->desc, uc_pdata->load);
-		return size;
+	if (blk_dread(dev_desc, part.start, part.size, fit) != part.size) {
+		ret = -EIO;
+		goto out;
 	}
 
-	flush_dcache_range(uc_pdata->load,
-			   uc_pdata->load + ALIGN(size, ARCH_DMA_MINALIGN));
-
-	pe_state = PE_STATE(uc_pdata->aarch64, uc_pdata->hyp,
-			    uc_pdata->thumb, uc_pdata->secure);
+	if (fdt_check_header(fit)) {
+		printf("No fdt header\n");
+		ret = -EINVAL;
+		goto out;
+	}
 
-	if (this_cpu) {
-		AMP_I("Brought up cpu[%x] from \"%s\" with state 0x%x, entry 0x%08x ...",
-		      uc_pdata->cpu, uc_pdata->desc, pe_state, uc_pdata->entry);
+	memset(&images, 0, sizeof(images));
+	images.fit_uname_cfg = "conf";
+	images.fit_hdr_os = fit;
+	images.verify = 1;
+	ret = boot_get_loadable(0, NULL, &images,
+				IH_ARCH_DEFAULT, NULL, NULL);
+	if (ret) {
+		AMP_E("Failed to load image, ret=%d\n", ret);
+		return ret;
+	}
 
-		cleanup_before_linux();
-		es_to_aarch = uc_pdata->aarch64 ? ES_TO_AARCH64 : ES_TO_AARCH32;
-		printf("OK\n");
-		armv8_switch_to_el2(0, 0, 0, pe_state, (u64)uc_pdata->entry, es_to_aarch);
-	} else {
-		AMP_I("Brought up cpu[%x] from \"%s\" with state 0x%x, entry 0x%08x ...",
-		      uc_pdata->cpu, uc_pdata->desc, pe_state, uc_pdata->entry);
+	/* flush */
+	flush_dcache_all();
 
-		ret = sip_smc_amp_cfg(AMP_PE_STATE, uc_pdata->cpu, pe_state);
-		if (ret) {
-			printf("amp cfg failed, ret=%d\n", ret);
-			return ret;
-		}
-		ret = psci_cpu_on(uc_pdata->cpu, uc_pdata->entry);
-		if (ret) {
-			printf("cpu up failed, ret=%d\n", ret);
-			return ret;
-		}
-		printf("OK\n");
-	}
+	ret = brought_up_all_amp(images.fit_hdr_os, images.fit_uname_cfg);
+out:
+	sysmem_free((phys_addr_t)fit);
 
-	return 0;
+	return ret;
 }
 
-static const struct dm_amp_ops rockchip_amp_ops = {
-	.cpu_on = rockchip_amp_cpu_on,
-};
-
-U_BOOT_DRIVER(rockchip_amp) = {
-	.name	   = "rockchip_amp",
-	.id	   = UCLASS_AMP,
-	.ops	   = &rockchip_amp_ops,
-};
+int amp_flags(void)
+{
+	return primary_pe_state;
+}
 
-/* AMP bus driver as all amp parent */
-static int rockchip_amp_bus_bind(struct udevice *dev)
+int amp_os_arch(void)
 {
-	return amp_bind_children(dev, "rockchip_amp");
+	return primary_pe_arch;
 }
 
-static const struct udevice_id rockchip_amp_bus_match[] = {
-	{ .compatible = "uboot,rockchip-amp", },
-	{},
-};
-
-U_BOOT_DRIVER(rockchip_amp_bus) = {
-	.name	   = "rockchip_amp_bus",
-	.id	   = UCLASS_SIMPLE_BUS,
-	.of_match  = rockchip_amp_bus_match,
-	.bind	   = rockchip_amp_bus_bind,
-};
diff --git a/include/amp.h b/include/amp.h
index e94f42f7ad..54ed859f6b 100644
--- a/include/amp.h
+++ b/include/amp.h
@@ -8,6 +8,9 @@
 
 #include <dm.h>
 
+#define AMP_I(fmt, args...)	printf("AMP: "fmt, ##args)
+#define AMP_E(fmt, args...)	printf("AMP Error: "fmt, ##args)
+
 #define MAP_AARCH(aarch64)	((aarch64) ? 1 : 0)
 #define MAP_HYP(hyp)		((hyp) ? 1 : 0)
 #define MAP_THUMB(thumb)	((thumb) ? 1 : 0)
@@ -24,27 +27,9 @@
 		((MAP_THUMB(thumb) & 0x1) << MODE_THUMB_SHIFT) |	\
 		((MAP_SECURE(secure) & 0x1) << MODE_SECURE_SHIFT))
 
-struct dm_amp_ops {
-	int (*cpu_on)(struct udevice *dev, bool this_cpu);
-};
-
-struct dm_amp_uclass_platdata {
-	const char *desc;
-	const char *partition;
-	u32 cpu;		/* cpu mpidr */
-	u32 aarch64;
-	u32 hyp;
-	u32 thumb;
-	u32 secure;
-	u32 load;
-	u32 entry;
-	u32 reserved_mem[2];	/* [0]: start, [1]: size */
-	bool linux_os;
-};
-
-int amp_bind_children(struct udevice *dev, const char *drv_name);
 int amp_cpus_on(void);
-int amp_cpu_on(u32 cpu);
+int amp_flags(void);
+int amp_os_arch(void);
 
 #endif	/* _AMP_H_ */
 

commit 45c3b4380b667cb77897c65bb58e3847989ddfec
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Feb 21 11:19:04 2021 +0800

    rockchip: board: brought up amps after download check
    
    In order to enter download mode before amps.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I8bc2564e2afef5e5f28cf9e7f2f4d31c22a2495b

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index d1e59655e0..ca134d3f36 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -341,6 +341,9 @@ int board_late_init(void)
 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0)
 	setup_boot_mode();
 #endif
+#ifdef CONFIG_AMP
+	amp_cpus_on();
+#endif
 #ifdef CONFIG_ROCKCHIP_USB_BOOT
 	boot_from_udisk();
 #endif
@@ -594,13 +597,6 @@ parse_fn_t board_bidram_parse_fn(void)
 }
 #endif
 
-#ifdef CONFIG_ROCKCHIP_AMP
-void cpu_secondary_init_r(void)
-{
-	amp_cpus_on();
-}
-#endif
-
 int board_init_f_boot_flags(void)
 {
 	int boot_flags = 0;

commit 39be8a089b3adec6a9a16f79b9faecd03dd8ea68
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Feb 7 16:18:19 2021 +0800

    cpu: rockchip amp: support boot core0 as aarch32
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If2e74c0877c04c61cc219cda04682d26d6f957b2

diff --git a/drivers/cpu/amp-uclass.c b/drivers/cpu/amp-uclass.c
index 33a3050894..46c6875225 100644
--- a/drivers/cpu/amp-uclass.c
+++ b/drivers/cpu/amp-uclass.c
@@ -14,6 +14,7 @@ int amp_cpu_on(u32 cpu)
 	const struct dm_amp_ops *ops;
 	struct udevice *dev;
 	struct uclass *uc;
+	bool this_cpu;
 	int ret;
 
 	ret = uclass_get(UCLASS_AMP, &uc);
@@ -31,7 +32,8 @@ int amp_cpu_on(u32 cpu)
 		if (!ops || !ops->cpu_on)
 			return -ENOSYS;
 
-		return ops->cpu_on(dev);
+		this_cpu = (read_mpidr() & 0x0fff) == uc_pdata->cpu;
+		return ops->cpu_on(dev, this_cpu);
 	}
 
 	return -ENODEV;
@@ -39,9 +41,12 @@ int amp_cpu_on(u32 cpu)
 
 int amp_cpus_on(void)
 {
+	struct dm_amp_uclass_platdata *uc_pdata;
+	struct udevice *this_cpu_dev = NULL;
 	const struct dm_amp_ops *ops;
 	struct udevice *dev;
 	struct uclass *uc;
+	ulong mpidr = read_mpidr() & 0x0fff;
 	int ret;
 
 	ret = uclass_get(UCLASS_AMP, &uc);
@@ -54,7 +59,19 @@ int amp_cpus_on(void)
 		ops = dev_get_driver_ops(dev);
 		if (!ops || !ops->cpu_on)
 			continue;
-		ret = ops->cpu_on(dev);
+
+		uc_pdata = dev_get_uclass_platdata(dev);
+		if ((mpidr == uc_pdata->cpu) && !uc_pdata->linux_os) {
+			this_cpu_dev = dev;
+			continue;
+		}
+
+		ret = ops->cpu_on(dev, false);
+	}
+
+	if (this_cpu_dev) {
+		ops = dev_get_driver_ops(this_cpu_dev);
+		ret = ops->cpu_on(this_cpu_dev, true);
 	}
 
 	return ret;
@@ -101,26 +118,28 @@ static int amp_pre_probe(struct udevice *dev)
 	uc_pdata->desc = dev_read_string(dev, "description");
 	uc_pdata->partition = dev_read_string(dev, "partition");
 	uc_pdata->cpu = dev_read_u32_default(dev, "cpu", -ENODATA);
-#ifdef CONFIG_ARM64
-	uc_pdata->aarch64 = dev_read_u32_default(dev, "aarch64", 1);
-#else
-	uc_pdata->aarch64 = 0;
-#endif
+	uc_pdata->aarch64 = IS_ENABLED(CONFIG_ARM64) ?
+			dev_read_u32_default(dev, "aarch64", 1) : 0;
 	uc_pdata->hyp = dev_read_u32_default(dev, "hyp", 0);
 	uc_pdata->thumb = dev_read_u32_default(dev, "thumb", 0);
 	uc_pdata->secure = dev_read_u32_default(dev, "secure", 0);
 	uc_pdata->load = dev_read_u32_default(dev, "load", -ENODATA);
 	uc_pdata->entry = dev_read_u32_default(dev, "entry", -ENODATA);
-
-	dev_read_u32_array(dev, "memory",
-			   uc_pdata->reserved_mem,
+	/* optional */
+	dev_read_u32_array(dev, "memory", uc_pdata->reserved_mem,
 			   ARRAY_SIZE(uc_pdata->reserved_mem));
-
-	if (!uc_pdata->desc || !uc_pdata->partition ||
-	    uc_pdata->cpu == -ENODATA || uc_pdata->load == -ENODATA ||
-	    uc_pdata->entry == -ENODATA) {
-		printf("AMP: \"%s\" is not complete\n", dev->name);
-		return -EINVAL;
+	if ((read_mpidr() & 0x0fff) == uc_pdata->cpu)
+		uc_pdata->linux_os = dev_read_bool(dev, "linux-os");
+
+	/* Must assign property if not run linux os */
+	if (!uc_pdata->linux_os) {
+		if (!uc_pdata->desc || !uc_pdata->partition ||
+		    uc_pdata->cpu == -ENODATA ||
+		    uc_pdata->load == -ENODATA ||
+		    uc_pdata->entry == -ENODATA) {
+			printf("AMP: \"%s\" there is property missing\n", dev->name);
+			return -EINVAL;
+		}
 	}
 
 #ifdef DEBUG
@@ -134,6 +153,7 @@ static int amp_pre_probe(struct udevice *dev)
 	printf("        secure: %d\n", uc_pdata->secure);
 	printf("          load: 0x%08x\n", uc_pdata->load);
 	printf("         entry: 0x%08x\n", uc_pdata->entry);
+	printf("      linux-os: %d\n", uc_pdata->linux_os);
 	printf("  reserved_mem: 0x%08x - 0x%08x\n\n",
 	       uc_pdata->reserved_mem[0],
 	       uc_pdata->reserved_mem[0] + uc_pdata->reserved_mem[1]);
diff --git a/drivers/cpu/rockchip_amp.c b/drivers/cpu/rockchip_amp.c
index d07d876077..2b1ba62105 100644
--- a/drivers/cpu/rockchip_amp.c
+++ b/drivers/cpu/rockchip_amp.c
@@ -9,6 +9,7 @@
 #include <dm.h>
 #include <sysmem.h>
 #include <asm/arch/rockchip_smccc.h>
+#include <asm/u-boot-arm.h>
 
 #define AMP_I(fmt, args...)	printf("AMP: "fmt, ##args)
 #define AMP_E(fmt, args...)	printf("AMP Error: "fmt, ##args)
@@ -120,13 +121,14 @@ err:
  * ./scripts/mkkrnlimg mcu-os1.bin mcu-os1.img
  */
 
-static int rockchip_amp_cpu_on(struct udevice *dev)
+static int rockchip_amp_cpu_on(struct udevice *dev, bool this_cpu)
 {
 	struct dm_amp_uclass_platdata *uc_pdata;
 	struct blk_desc *dev_desc;
 	disk_partition_t part_info;
 	int ret, size;
 	u32 pe_state;
+	u32 es_to_aarch;
 
 	uc_pdata = dev_get_uclass_platdata(dev);
 	if (!uc_pdata)
@@ -170,16 +172,30 @@ static int rockchip_amp_cpu_on(struct udevice *dev)
 	pe_state = PE_STATE(uc_pdata->aarch64, uc_pdata->hyp,
 			    uc_pdata->thumb, uc_pdata->secure);
 
-	AMP_I("Brought up cpu[%x] with state(%x) from \"%s\" entry 0x%08x ...",
-	      uc_pdata->cpu, pe_state, uc_pdata->desc, uc_pdata->entry);
+	if (this_cpu) {
+		AMP_I("Brought up cpu[%x] from \"%s\" with state 0x%x, entry 0x%08x ...",
+		      uc_pdata->cpu, uc_pdata->desc, pe_state, uc_pdata->entry);
 
-	sip_smc_amp_cfg(AMP_PE_STATE, uc_pdata->cpu, pe_state);
-	ret = psci_cpu_on(uc_pdata->cpu, uc_pdata->entry);
-	if (ret) {
-		printf("failed\n");
-		return ret;
+		cleanup_before_linux();
+		es_to_aarch = uc_pdata->aarch64 ? ES_TO_AARCH64 : ES_TO_AARCH32;
+		printf("OK\n");
+		armv8_switch_to_el2(0, 0, 0, pe_state, (u64)uc_pdata->entry, es_to_aarch);
+	} else {
+		AMP_I("Brought up cpu[%x] from \"%s\" with state 0x%x, entry 0x%08x ...",
+		      uc_pdata->cpu, uc_pdata->desc, pe_state, uc_pdata->entry);
+
+		ret = sip_smc_amp_cfg(AMP_PE_STATE, uc_pdata->cpu, pe_state);
+		if (ret) {
+			printf("amp cfg failed, ret=%d\n", ret);
+			return ret;
+		}
+		ret = psci_cpu_on(uc_pdata->cpu, uc_pdata->entry);
+		if (ret) {
+			printf("cpu up failed, ret=%d\n", ret);
+			return ret;
+		}
+		printf("OK\n");
 	}
-	printf("OK\n");
 
 	return 0;
 }
diff --git a/include/amp.h b/include/amp.h
index a6bb55279b..e94f42f7ad 100644
--- a/include/amp.h
+++ b/include/amp.h
@@ -25,7 +25,7 @@
 		((MAP_SECURE(secure) & 0x1) << MODE_SECURE_SHIFT))
 
 struct dm_amp_ops {
-	int (*cpu_on)(struct udevice *dev);
+	int (*cpu_on)(struct udevice *dev, bool this_cpu);
 };
 
 struct dm_amp_uclass_platdata {
@@ -39,6 +39,7 @@ struct dm_amp_uclass_platdata {
 	u32 load;
 	u32 entry;
 	u32 reserved_mem[2];	/* [0]: start, [1]: size */
+	bool linux_os;
 };
 
 int amp_bind_children(struct udevice *dev, const char *drv_name);

commit d4e052e64b788d618f082bcdfff76e30c81959c9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Feb 6 10:15:04 2021 +0800

    rockchip: armv8: implement armv8_el2_to_aarch32()
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I9faa79ecfaca43fe201ae2f62fa0cf1c6e36706e

diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 5375a84cee..a8808407af 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -27,6 +27,7 @@ ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
 
 obj-y += chip_info.o
 ifndef CONFIG_SUPPORT_USBPLUG
+obj-y += lowlevel_init.o
 obj-y += boot_mode.o
 obj-y += boot_rkimg.o
 obj-y += board.o
diff --git a/arch/arm/mach-rockchip/lowlevel_init.S b/arch/arm/mach-rockchip/lowlevel_init.S
new file mode 100644
index 0000000000..a13e508f74
--- /dev/null
+++ b/arch/arm/mach-rockchip/lowlevel_init.S
@@ -0,0 +1,37 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2021 Rockchip Electronics Co., Ltd
+ */
+
+#include <config.h>
+
+#ifdef CONFIG_ARM64
+/*
+ * Switch from AArch64 EL2 to AArch32 EL2
+ *
+ * @param inputs:
+ * x0: argument, zero
+ * x1: machine nr
+ * x2: fdt address
+ * x3: input argument
+ * x4: kernel entry point
+ *
+ * @param outputs for secure firmware:
+ * x0: function id
+ * x1: kernel entry point
+ * x2: machine nr
+ * x3: fdt address
+ * x4: input argument
+ */
+.global armv8_el2_to_aarch32
+armv8_el2_to_aarch32:
+	mov x0, x3
+	mov x3, x2
+	mov x2, x1
+	mov x1, x4
+	mov x4, x0
+	ldr x0, =0x82000023
+	smc #0
+	ret
+#endif
+

commit eada11de1080fab608b2b7f174b79ba177c0f5bc
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon Mar 1 17:17:31 2021 +0800

    configs: lp3_emmc-tb: disable low power detect in spl
    
    Change-Id: Ifc5707daf49d1a1abb246a32dc31e5bc43e07274
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/configs/rv1126-lp3-emmc-tb.config b/configs/rv1126-lp3-emmc-tb.config
index 0d2451ac36..1903413df6 100644
--- a/configs/rv1126-lp3-emmc-tb.config
+++ b/configs/rv1126-lp3-emmc-tb.config
@@ -1,2 +1,5 @@
 CONFIG_BASE_DEFCONFIG="rv1126-emmc-tb.config"
 CONFIG_LOADER_INI="RV1126MINIALL_LP3_EMMC_TB.ini"
+# CONFIG_SPL_DM_FUEL_GAUGE is not set
+# CONFIG_SPL_I2C_SUPPORT=y is not set
+# CONFIG_SPL_POWER_FG_RK817 is not set

commit 3f41a9427d6c14f3aaafa35b7deb095456dc985a
Author: Weixin Zhou <zwx@rock-chips.com>
Date:   Tue Mar 2 09:01:50 2021 +0800

    video/rk_eink: add backlight support
    
    Signed-off-by: Weixin Zhou <zwx@rock-chips.com>
    Change-Id: I3f963c8ded7114f2a819caa70ad33c8d3c17ceb7

diff --git a/drivers/video/rk_eink/rk_eink_display.c b/drivers/video/rk_eink/rk_eink_display.c
index 7a4701a128..1a354eb280 100644
--- a/drivers/video/rk_eink/rk_eink_display.c
+++ b/drivers/video/rk_eink/rk_eink_display.c
@@ -16,6 +16,7 @@
 #include <dm/uclass-id.h>
 #include <boot_rkimg.h>
 #include <rk_eink.h>
+#include <backlight.h>
 #include "rk_ebc.h"
 #include "epdlut/epd_lut.h"
 
@@ -87,6 +88,7 @@ struct rockchip_eink_display_priv {
 	struct udevice *ebc_tcon_dev;
 	struct udevice *ebc_pwr_dev;
 	int vcom;
+	struct udevice *backlight;
 };
 
 enum {
@@ -474,6 +476,7 @@ static int rockchip_eink_show_logo(int cur_logo_type, int update_mode)
 	struct ebc_panel *plat;
 	struct udevice *dev;
 	static u32 loaded_logo;
+	struct rockchip_eink_display_priv *priv;
 
 	if (!eink_dev) {
 		static bool first_init = true;
@@ -498,6 +501,7 @@ static int rockchip_eink_show_logo(int cur_logo_type, int update_mode)
 	}
 
 	plat = dev_get_platdata(dev);
+	priv = dev_get_priv(dev);
 
 	ret = ebc_power_set(dev, EBC_PWR_ON);
 	if (ret) {
@@ -548,6 +552,10 @@ static int rockchip_eink_show_logo(int cur_logo_type, int update_mode)
 	}
 
 	eink_display(dev, last_logo_addr, logo_addr, WF_TYPE_GC16, update_mode);
+
+	if (priv->backlight)
+		backlight_enable(priv->backlight);
+
 	last_logo_type = cur_logo_type;
 	/*
 	 * System will boot up to kernel only when the
@@ -621,6 +629,12 @@ static int rockchip_eink_display_probe(struct udevice *dev)
 		return ret;
 	}
 
+	ret = uclass_get_device_by_phandle(UCLASS_PANEL_BACKLIGHT, dev,
+					   "backlight", &priv->backlight);
+	if (ret && ret != -ENOENT) {
+		printf("%s: Cannot get backlight: %d\n", __func__, ret);
+	}
+
 	vcom = read_vcom_from_vendor();
 	if (vcom <= 0) {
 		printf("read vcom from vendor failed, use default vcom\n");
@@ -648,6 +662,7 @@ static int rockchip_eink_display_probe(struct udevice *dev)
 	}
 
 	eink_dev = dev;
+
 	return 0;
 }
 

commit 0a7416590bd9f039b665b94536e15d934bb16682
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Mar 2 09:33:58 2021 +0800

    clk: rockchip: rk3568: support aclk_vop setting 500M
    
    add cpll as aclk_vop parent.
    
    Change-Id: I4dd4bb846191c6f44f430ddbeea92017c1276d93
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3568.c b/drivers/clk/rockchip/clk_rk3568.c
index 7e8f1dd12a..c4678fa3fb 100644
--- a/drivers/clk/rockchip/clk_rk3568.c
+++ b/drivers/clk/rockchip/clk_rk3568.c
@@ -1706,13 +1706,19 @@ static ulong rk3568_aclk_vop_get_clk(struct rk3568_clk_priv *priv)
 static ulong rk3568_aclk_vop_set_clk(struct rk3568_clk_priv *priv, ulong rate)
 {
 	struct rk3568_cru *cru = priv->cru;
-	int src_clk_div;
+	int src_clk_div, src_clk_mux;
 
-	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);
+	if ((priv->cpll_hz % rate) == 0) {
+		src_clk_div = DIV_ROUND_UP(priv->cpll_hz, rate);
+		src_clk_mux = ACLK_VOP_PRE_SEL_CPLL;
+	} else {
+		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);
+		src_clk_mux = ACLK_VOP_PRE_SEL_GPLL;
+	}
 	assert(src_clk_div - 1 <= 31);
 	rk_clrsetreg(&cru->clksel_con[38],
 		     ACLK_VOP_PRE_SEL_MASK | ACLK_VOP_PRE_DIV_MASK,
-		     ACLK_VOP_PRE_SEL_GPLL << ACLK_VOP_PRE_SEL_SHIFT |
+		     src_clk_mux << ACLK_VOP_PRE_SEL_SHIFT |
 		     (src_clk_div - 1) << ACLK_VOP_PRE_DIV_SHIFT);
 
 	return rk3568_aclk_vop_get_clk(priv);

commit 33273e09fd8c70f30afe5da51578283c35910fd7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 2 09:41:58 2021 +0800

    driver: core: reject all mmc device from kernel
    
    - we always follow the rule: use mmc device from U-Boot;
    - avoid alias id on defferent device between U-Boot and kernel,
      which the U-Boot is not able to handle(rescue).
    
    Example issue:
    
    // kernel:
    aliases {
            mmc0 = "/dwmmc@fe310000";
            mmc1 = "/dwmmc@fe320000";
            mmc2 = "/sdhci@fe330000";
    };
    
    // U-Boot:
    aliases {
            mmc0 = "/sdhci@fe330000";
            mmc1 = "/dwmmc@fe320000";
    };
    
    // Log error:
    Hit key to stop autoboot('CTRL+C'):  0
    Device 'dwmmc@fe310000': seq 0 is in use by 'sdhci@fe330000'
    MMC error: The cmd index is 1, ret is -110
    Card did not respond to voltage select!
    mmc_init: -95, time 51
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I8afede0d304b3e6155766c2aefa2b3b0fd21b068

diff --git a/drivers/core/device.c b/drivers/core/device.c
index 4390d5221b..0ff6a00f06 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -56,6 +56,16 @@ static int device_bind_common(struct udevice *parent, const struct driver *drv,
 		if (drv->id == UCLASS_MMC || drv->id == UCLASS_RKNAND ||
 		    drv->id == UCLASS_SPI_FLASH || drv->id == UCLASS_MTD ||
 		    drv->id == UCLASS_PCI) {
+			/*
+			 * Reject all mmc device from kernel.
+			 *
+			 * - we always follow the rule: use mmc device from U-Boot
+			 * - avoid alias id on defferent device between U-Boot and kernel
+			 */
+			if ((gd->flags & GD_FLG_KDTB_READY) &&
+			     (drv->id == UCLASS_MMC))
+				return 0;
+
 			list_for_each_entry(dev, &uc->dev_head, uclass_node) {
 				if (!strcmp(name, dev->name)) {
 					debug("%s do not bind dev already in list %s\n",
diff --git a/drivers/core/of_access.c b/drivers/core/of_access.c
index db2f64bd56..3729487387 100644
--- a/drivers/core/of_access.c
+++ b/drivers/core/of_access.c
@@ -731,6 +731,10 @@ static void of_alias_add(struct alias_prop *ap, struct device_node *np,
 	mutex_lock(&of_mutex);
 	list_for_each_entry(oldap, &aliases_lookup, link) {
 		if (stem && !strcmp(stem, oldap->alias) && (id == oldap->id)) {
+			/* Always use from U-Boot aliase */
+			if (strcmp(stem, "mmc"))
+				continue;
+
 			list_del(&oldap->link);
 			break;
 		}

commit a85a3b31d7198ea4815b338b6ff8b8abaff45e2d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 2 09:41:33 2021 +0800

    rockchip: kernel dtb: set kernel dtb ready flag
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I0930dc6da8557655eee76a7661c46d1261d6252d

diff --git a/arch/arm/mach-rockchip/kernel_dtb.c b/arch/arm/mach-rockchip/kernel_dtb.c
index 1dbf65bcd4..804aac34fc 100644
--- a/arch/arm/mach-rockchip/kernel_dtb.c
+++ b/arch/arm/mach-rockchip/kernel_dtb.c
@@ -308,6 +308,7 @@ dtb_okay:
 	phandles_fixup_cru((void *)gd->fdt_blob);
 	phandles_fixup_gpio((void *)gd->fdt_blob, (void *)ufdt_blob);
 
+	gd->flags |= GD_FLG_KDTB_READY;
 	of_live_build((void *)gd->fdt_blob, (struct device_node **)&gd->of_root);
 	dm_scan_fdt((void *)gd->fdt_blob, false);
 

commit cc7c06a279508f59d81b6ae8d097ab81215636d1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 2 09:40:54 2021 +0800

    include: global_data: add GD_FLG_KDTB_READY flag
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I7a9c1b58e20838110a73060839dd8b1bb4854932

diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index b27870655d..52c1f76978 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -180,6 +180,7 @@ typedef struct global_data {
 #define GD_FLG_ENV_DEFAULT	0x02000 /* Default variable flag	   */
 #define GD_FLG_SPL_EARLY_INIT	0x04000 /* Early SPL init is done	   */
 #define GD_FLG_LOG_READY	0x08000 /* Log system is ready for use	   */
+#define GD_FLG_KDTB_READY	0x10000 /* Kernel dtb is ready for use	   */
 
 #ifdef CONFIG_ARCH_ROCKCHIP
 /* BL32 is enabled */

commit 497d7897d46c63b9742ce1f57f218615279f9506
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Mar 1 10:17:52 2021 +0800

    rockchip: rkimg: indicate hotkey download
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I254780583afaba9e4d8604d30f26c92efce503ba

diff --git a/arch/arm/mach-rockchip/boot_rkimg.c b/arch/arm/mach-rockchip/boot_rkimg.c
index 35309a1b46..ac9b8c9f78 100644
--- a/arch/arm/mach-rockchip/boot_rkimg.c
+++ b/arch/arm/mach-rockchip/boot_rkimg.c
@@ -303,7 +303,8 @@ void setup_download_mode(void)
 	 * At the most time, USB is enabled and this feature is not applied.
 	 */
 	if (rockchip_dnl_key_pressed() || is_hotkey(HK_ROCKUSB_DNL)) {
-		printf("download key pressed... ");
+		printf("download %skey pressed... ",
+		       is_hotkey(HK_ROCKUSB_DNL) ? "hot" : "");
 #ifdef CONFIG_CMD_ROCKUSB
 		vbus = rockchip_u2phy_vbus_detect();
 #endif

commit e3338b7743226d16d3ca276662cd83158e923f83
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jul 5 18:50:59 2019 +0800

    fuel gauge: rk816: support different sample resistor
    
    Change-Id: Ib08c82e837cbded07e1002ea0941f3180fdfde1d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk816.c b/drivers/power/fuel_gauge/fg_rk816.c
index 769721d0db..5596db7a43 100644
--- a/drivers/power/fuel_gauge/fg_rk816.c
+++ b/drivers/power/fuel_gauge/fg_rk816.c
@@ -120,6 +120,8 @@ static int dbg_enable = 0;
 #define DC_ADC_TRIGGER		150
 #define DIV(x)			((x) ? (x) : 1)
 
+#define SAMPLE_RES_20MR		20
+
 /***********************************************************/
 struct battery_priv {
 	struct udevice *dev;
@@ -141,6 +143,7 @@ struct battery_priv {
 	u32		*ocv_table;
 	u32		ocv_size;
 	int		virtual_power;
+	int		sample_res;
 	int		pwroff_min;
 	int		sm_old_cap;
 	int		sm_linek;
@@ -170,6 +173,8 @@ struct battery_priv {
 	int		pwr_dsoc;
 	int		pwr_rsoc;
 	int		pwr_vol;
+	int		res_fac;
+	int		over_20mR;
 };
 
 enum charger_type {
@@ -194,6 +199,36 @@ static const char *charger_type_to_name[] = {
 	"UNKN",
 };
 
+/*
+ * If sample resistor changes, we need caculate a new CHRG_CUR_SEL[] table.
+ *
+ * Calculation method:
+ * 1. find 20mR(default) current charge table, that is:
+ *	20mR: [1000, 1200, 1400, 1600, 1800, 2000, 2250, 2400]
+ *
+ * 2. caculate Rfac(not care much, just using it) by sample resistor(ie. Rsam);
+ *	Rsam = 20mR: Rfac = 10;
+ *	Rsam > 20mR: Rfac = Rsam * 10 / 20;
+ *	Rsam < 20mR: Rfac = 20 * 10 / Rsam;
+ *
+ * 3. from step2, we get Rfac, then we can get new charge current table by 20mR
+ *    charge table:
+ *	Iorg: member from 20mR charge table; Inew: new member for charge table.
+ *
+ *	Rsam > 20mR: Inew = Iorg * 10 / Rfac;
+ *	Rsam < 20mR: Inew = Iorg * Rfac / 10;
+ *
+ * Notice: Inew should round up if it is not a integer!!!
+ *
+ * Example:
+ *	10mR: [2000, 2400, 2800, 3200, 3600, 4000, 4500, 4800]
+ *	20mR: [1000, 1200, 1400, 1600, 1800, 2000, 2250, 2400]
+ *	40mR: [500,  600,  700,  800,  900,  1000, 1125, 1200]
+ *	50mR: [400,  480,  560,  640,  720,  800,  900,  960]
+ *	60mR: [334,  400,  467,  534,  600,  667,  750,  800]
+ *
+ * You should add property 'sample_res = <Rsam>' at battery node.
+ */
 static const u32 CHRG_VOL_SEL[] = {
 	4050, 4100, 4150, 4200, 4250, 4300, 4350
 };
@@ -206,6 +241,12 @@ static const u32 CHRG_CUR_INPUT[] = {
 	450, 800, 850, 1000, 1250, 1500, 1750, 2000
 };
 
+/* 'res_fac' has been *10, so we need divide 10 */
+#define RES_FAC_MUX(value, res_fac)    ((value) * res_fac / 10)
+
+/* 'res_fac' has been *10, so we need 'value * 10' before divide 'res_fac' */
+#define RES_FAC_DIV(value, res_fac)    ((value) * 10 / res_fac)
+
 static int rk816_bat_read(struct battery_priv *di, u8 reg)
 {
 	return pmic_reg_read(di->dev->parent, reg);
@@ -370,16 +411,19 @@ static int rk816_bat_get_ocv_voltage(struct battery_priv *di)
 
 static int rk816_bat_get_avg_current(struct battery_priv *di)
 {
-	int val = 0;
+	int cur, val = 0;
 
 	val |= rk816_bat_read(di, BAT_CUR_AVG_REGL) << 0;
 	val |= rk816_bat_read(di, BAT_CUR_AVG_REGH) << 8;
 
 	if (val & 0x800)
 		val -= 4096;
-	val = val * 1506 / 1000;
+	if (!di->over_20mR)
+		cur = RES_FAC_MUX(val * 1506, di->res_fac) / 1000;
+	else
+		cur = RES_FAC_DIV(val * 1506, di->res_fac) / 1000;
 
-	return val;
+	return cur;
 }
 
 static int rk816_bat_get_avg_voltage(struct battery_priv *di)
@@ -405,7 +449,7 @@ static int rk816_bat_get_est_voltage(struct battery_priv *di)
 	return (est_vol > 2800) ? est_vol : vol;
 }
 
-static u8 rk816_bat_finish_ma(int fcc)
+static u8 rk816_bat_finish_ma(struct battery_priv *di, int fcc)
 {
 	u8 ma;
 
@@ -418,6 +462,21 @@ static u8 rk816_bat_finish_ma(int fcc)
 	else
 		ma = FINISH_100MA;
 
+	/* adjust ma according to sample resistor */
+	if (di->sample_res < 20) {
+		/* ma should div 2 */
+		if (ma == FINISH_200MA)
+			ma = FINISH_100MA;
+		else if (ma == FINISH_250MA)
+			ma = FINISH_150MA;
+	} else if (di->sample_res > 20) {
+		/* ma should mux 2 */
+		if (ma == FINISH_100MA)
+			ma = FINISH_200MA;
+		else if (ma == FINISH_150MA)
+			ma = FINISH_250MA;
+	}
+
 	return ma;
 }
 
@@ -429,6 +488,19 @@ static void rk816_bat_select_chrg_cv(struct battery_priv *di)
 	chrg_cur_sel = di->dts_cur_sel;
 	chrg_cur_input = di->dts_cur_input;
 
+	if (di->sample_res < 20) {
+		if (chrg_cur_sel > 2000)
+			chrg_cur_sel = RES_FAC_DIV(chrg_cur_sel, di->res_fac);
+		else
+			chrg_cur_sel = 1000;
+	} else if (di->sample_res > 20) {
+		chrg_cur_sel = RES_FAC_MUX(chrg_cur_sel, di->res_fac);
+		if (chrg_cur_sel > 2400)
+			chrg_cur_sel = 2400;
+		if (chrg_cur_sel < 1000)
+			chrg_cur_sel = 1000;
+	}
+
 	for (index = 0; index < ARRAY_SIZE(CHRG_VOL_SEL); index++) {
 		if (chrg_vol_sel < CHRG_VOL_SEL[index])
 			break;
@@ -457,7 +529,7 @@ static void rk816_bat_init_chrg_config(struct battery_priv *di)
 	u8 sup_sts, ggcon, thermal, finish_ma;
 
 	rk816_bat_select_chrg_cv(di);
-	finish_ma = rk816_bat_finish_ma(di->fcc);
+	finish_ma = rk816_bat_finish_ma(di, di->fcc);
 
 	ggcon = rk816_bat_read(di, GGCON_REG);
 	sup_sts = rk816_bat_read(di, SUP_STS_REG);
@@ -629,15 +701,19 @@ static u8 rk816_bat_get_pwroff_min(struct battery_priv *di)
 
 static int rk816_bat_get_coulomb_cap(struct battery_priv *di)
 {
-	int val = 0;
+	int cap, val = 0;
 
 	val |= rk816_bat_read(di, GASCNT_REG3) << 24;
 	val |= rk816_bat_read(di, GASCNT_REG2) << 16;
 	val |= rk816_bat_read(di, GASCNT_REG1) << 8;
 	val |= rk816_bat_read(di, GASCNT_REG0) << 0;
-	val /= 2390;
 
-	return val;
+	if (!di->over_20mR)
+		cap = RES_FAC_MUX(val / 2390, di->res_fac);
+	else
+		cap = RES_FAC_DIV(val / 2390, di->res_fac);
+
+	return cap;
 }
 
 static void rk816_bat_init_capacity(struct battery_priv *di, u32 capacity)
@@ -650,7 +726,11 @@ static void rk816_bat_init_capacity(struct battery_priv *di, u32 capacity)
 	if (!delta)
 		return;
 
-	cap = capacity * 2390;
+	if (!di->over_20mR)
+		cap = RES_FAC_DIV(capacity * 2390, di->res_fac);
+	else
+		cap = RES_FAC_MUX(capacity * 2390, di->res_fac);
+
 	buf = (cap >> 24) & 0xff;
 	rk816_bat_write(di, GASCNT_CAL_REG3, buf);
 	buf = (cap >> 16) & 0xff;
@@ -895,6 +975,20 @@ static void rk816_bat_init_poffset(struct battery_priv *di)
 	di->poffset = coffset - ioffset;
 }
 
+static void rk816_bat_select_sample_res(struct battery_priv *di)
+{
+	/* Here, res_fac is 10 times of real value for good calcuation */
+	if (di->sample_res == SAMPLE_RES_20MR) {
+		di->over_20mR = 0;
+		di->res_fac = 10;
+	} else if (di->sample_res > SAMPLE_RES_20MR) {
+		di->over_20mR = 1;
+		di->res_fac = di->sample_res * 10 / SAMPLE_RES_20MR;
+	} else {
+		di->over_20mR = 0;
+		di->res_fac = SAMPLE_RES_20MR * 10 / di->sample_res;
+	}
+}
 static bool is_rk816_bat_exist(struct  battery_priv *di)
 {
 	return (rk816_bat_read(di, SUP_STS_REG) & BAT_EXS) ? true : false;
@@ -1028,6 +1122,7 @@ static int rk816_fg_init(struct battery_priv *di)
 	rk816_bat_set_vol_instant_mode(di);
 	rk816_bat_init_voltage_kb(di);
 	rk816_bat_init_poffset(di);
+	rk816_bat_select_sample_res(di);
 	rk816_bat_clr_initialized_state(di);
 	di->dsoc = rk816_bat_get_dsoc(di);
 	di->remain_cap = rk816_bat_get_prev_cap(di);
@@ -1117,6 +1212,7 @@ static void rk816_bat_debug_info(struct battery_priv *di)
 {
 	u8 sup_sts, ggcon, ggsts, vb_mod, rtc, thermal, misc;
 	u8 usb_ctrl, chrg_ctrl1, chrg_ctrl2, chrg_ctrl3;
+	uint32_t chrg_cur;
 	static const char *name[] = {"NONE", "USB", "AC", "DC", "UNDEF"};
 
 	if (!dbg_enable)
@@ -1132,6 +1228,12 @@ static void rk816_bat_debug_info(struct battery_priv *di)
 	chrg_ctrl1 = rk816_bat_read(di, CHRG_CTRL_REG1);
 	chrg_ctrl2 = rk816_bat_read(di, CHRG_CTRL_REG2);
 	chrg_ctrl3 = rk816_bat_read(di, CHRG_CTRL_REG3);
+	if (!di->over_20mR)
+		chrg_cur = RES_FAC_MUX(CHRG_CUR_SEL[chrg_ctrl1 & 0x0f],
+				       di->res_fac);
+	else
+		chrg_cur = RES_FAC_DIV(CHRG_CUR_SEL[chrg_ctrl1 & 0x0f],
+				       di->res_fac);
 
 	DBG("\n---------------------- DEBUG REGS ------------------------\n"
 	    "GGCON=0x%2x, GGSTS=0x%2x, RTC=0x%2x, SUP_STS= 0x%2x\n"
@@ -1142,19 +1244,21 @@ static void rk816_bat_debug_info(struct battery_priv *di)
 	    );
 	DBG("----------------------------------------------------------\n"
 	    "Dsoc=%d, Rsoc=%d, Vavg=%d, Iavg=%d, Cap=%d, Fcc=%d, d=%d\n"
-	    "K=%d, old_cap=%d, charger=%s, Is=%d, Ip=%d, Vs=%d\n"
-	    "min=%d, meet: soc=%d, calc: dsoc=%d, rsoc=%d, Vocv=%d\n"
+	    "K=%d, old_cap=%d, charger=%s, Is=%d, Ip=%d, Vs=%d, Rfac=%d\n"
+	    "min=%d, meet: soc=%d, calc: dsoc=%d, rsoc=%d, Vocv=%d, Rsam=%d\n"
 	    "off: i=0x%x, c=0x%x, max=%d, ocv_c=%d, halt: st=%d, cnt=%d\n"
 	    "pwr: dsoc=%d, rsoc=%d, vol=%d, exist=%d\n",
 	    di->dsoc, rk816_bat_get_rsoc(di), rk816_bat_get_avg_voltage(di),
 	    rk816_bat_get_avg_current(di), di->remain_cap, di->fcc,
 	    di->rsoc - di->dsoc,
 	    di->sm_linek, di->sm_old_cap, name[di->chrg_type],
-	    CHRG_CUR_SEL[chrg_ctrl1 & 0x0f],
+	    chrg_cur,
 	    CHRG_CUR_INPUT[usb_ctrl & 0x0f],
-	    CHRG_VOL_SEL[(chrg_ctrl1 & 0x70) >> 4],  di->pwroff_min,
+	    CHRG_VOL_SEL[(chrg_ctrl1 & 0x70) >> 4], di->res_fac,
+	    di->pwroff_min,
 	    di->sm_meet_soc, di->calc_dsoc, di->calc_rsoc,
-	    rk816_bat_get_ocv_voltage(di), rk816_bat_get_ioffset(di),
+	    rk816_bat_get_ocv_voltage(di), di->sample_res,
+	    rk816_bat_get_ioffset(di),
 	    rk816_bat_get_coffset(di), di->is_max_soc_offset,
 	    di->is_ocv_calib, di->is_halt, di->halt_cnt, di->pwr_dsoc,
 	    di->pwr_rsoc, di->pwr_vol, is_rk816_bat_exist(di)
@@ -1417,6 +1521,7 @@ static int rk816_fg_ofdata_to_platdata(struct udevice *dev)
 	di->dts_cur_sel = dev_read_u32_default(dev, "max_chrg_current", 1200);
 	di->max_soc_offset = dev_read_u32_default(dev, "max_soc_offset", 70);
 	di->virtual_power = dev_read_u32_default(dev, "virtual_power", 0);
+	di->sample_res = dev_read_u32_default(dev, "sample_res", 20);
 	di->bat_res = dev_read_u32_default(dev, "bat_res", 135);
 
 	/* Parse dc type */
@@ -1444,6 +1549,7 @@ static int rk816_fg_ofdata_to_platdata(struct udevice *dev)
 	DBG("design_qmax:%d\n", di->qmax);
 	DBG("max_soc_offset:%d\n", di->max_soc_offset);
 	DBG("dc_det_adc:%d\n", di->dc_det_adc);
+	DBG("res_sample:%d\n", di->sample_res);
 
 	return 0;
 }

commit d46ff1ab85601381d5d4c5efae9fa17e1952dbf0
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Thu Feb 25 15:35:56 2021 +0800

    mtd: spinand: Support new device
    
    XT26G02C
    
    Change-Id: Ia3ccd73bd98206d1c96ea0a1f0264cad45f5c376
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/xtx.c b/drivers/mtd/nand/spi/xtx.c
index 2ef72ce1a9..76e59eed24 100644
--- a/drivers/mtd/nand/spi/xtx.c
+++ b/drivers/mtd/nand/spi/xtx.c
@@ -231,6 +231,15 @@ static const struct spinand_info xtx_spinand_table[] = {
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&xt26g01b_ooblayout,
 				     xt26g01c_ecc_get_status)),
+	SPINAND_INFO("XT26G02C", 0x12,
+		     NAND_MEMORG(1, 2048, 64, 64, 2048, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&xt26g01b_ooblayout,
+				     xt26g01c_ecc_get_status)),
 	SPINAND_INFO("XT26G04C", 0x13,
 		     NAND_MEMORG(1, 4096, 128, 64, 2048, 1, 1, 1),
 		     NAND_ECCREQ(8, 512),

commit d2aeaf65343baa292e79fe177101b287b5033207
Author: Zorro Liu <lyx@rock-chips.com>
Date:   Fri Feb 26 15:28:39 2021 +0800

    drivers: video: rk_eink: add new waveform version for pvi
    
    Signed-off-by: Zorro Liu <lyx@rock-chips.com>
    Change-Id: Ieaf60e6528a778e531174197393e9193625965bc

diff --git a/drivers/video/rk_eink/epdlut/pvi_waveform.S b/drivers/video/rk_eink/epdlut/pvi_waveform.S
index 759c6d7476..30137c0617 100644
--- a/drivers/video/rk_eink/epdlut/pvi_waveform.S
+++ b/drivers/video/rk_eink/epdlut/pvi_waveform.S
@@ -12,9 +12,9 @@
 	.align	2
 	.type	get_wf_mode_index, %function
 get_wf_mode_index:
-.LFB217:
+.LFB213:
 	.file 1 "drivers/video/rk_eink/epdlut/pvi_waveform.c"
-	.loc 1 242 0
+	.loc 1 263 0
 	.cfi_startproc
 .LVL0:
 	stp	x29, x30, [sp, -32]!
@@ -26,281 +26,348 @@ get_wf_mode_index:
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -16
 	.cfi_offset 20, -8
-	.loc 1 242 0
+	.loc 1 263 0
 	mov	w20, w0
-	.loc 1 243 0
+	.loc 1 264 0
 	adrp	x0, .LANCHOR0
 .LVL1:
 	adrp	x19, .LANCHOR1
 	ldr	x2, [x0, #:lo12:.LANCHOR0]
 .LVL2:
-.LBB45:
-.LBB46:
-	.loc 1 166 0
+.LBB42:
+.LBB43:
+	.loc 1 164 0
 	ldrb	w1, [x2, 16]
 	cmp	w1, 25
 	beq	.L3
 	bhi	.L4
 	cmp	w1, 18
 	beq	.L5
-	cmp	w1, 24
-.L31:
-	.loc 1 169 0
-	str	wzr, [x19, #:lo12:.LANCHOR1]
+	bhi	.L6
+	cmp	w1, 9
+	beq	.L7
+.L2:
+	.loc 1 245 0
 	add	x0, x19, :lo12:.LANCHOR1
-	.loc 1 166 0
+	.loc 1 246 0
+	mov	w3, 1
+	.loc 1 251 0
+	mov	w4, 5
+	.loc 1 245 0
+	str	wzr, [x19, #:lo12:.LANCHOR1]
+	.loc 1 247 0
+	stp	w3, w3, [x0, 4]
+	.loc 1 248 0
+	mov	w3, 2
+	str	w3, [x0, 12]
+	.loc 1 249 0
+	mov	w3, 3
+	.loc 1 251 0
+	str	w4, [x0, 24]
+	.loc 1 252 0
+	mov	w4, 6
+	.loc 1 249 0
+	str	w3, [x0, 16]
+	.loc 1 250 0
+	mov	w3, 4
+	.loc 1 252 0
+	str	w4, [x0, 28]
+	.loc 1 250 0
+	str	w3, [x0, 20]
+	.loc 1 253 0
+	str	w3, [x0, 32]
+	.loc 1 254 0
+	adrp	x0, .LC0
+	add	x0, x0, :lo12:.LC0
+	ldrb	w2, [x2, 22]
+.LVL3:
+	bl	printf
+.LVL4:
+	b	.L13
+.LVL5:
+.L6:
+	.loc 1 164 0
+	cmp	w1, 22
+	beq	.L8
+	cmp	w1, 24
+.L41:
 	bne	.L2
-	.loc 1 170 0
+	.loc 1 189 0
+	add	x0, x19, :lo12:.LANCHOR1
+	.loc 1 190 0
 	mov	w1, 1
+	.loc 1 189 0
+	str	wzr, [x19, #:lo12:.LANCHOR1]
+	.loc 1 190 0
 	str	w1, [x0, 4]
-.L33:
-	.loc 1 193 0
+.L45:
+	.loc 1 214 0
 	str	w1, [x0, 8]
-	.loc 1 194 0
+	.loc 1 215 0
 	mov	w1, 2
-	.loc 1 197 0
+	.loc 1 218 0
 	mov	w2, 5
-.LVL3:
-	.loc 1 194 0
+.LVL6:
+	.loc 1 215 0
 	str	w1, [x0, 12]
-	.loc 1 195 0
+	.loc 1 216 0
 	mov	w1, 3
-	.loc 1 197 0
+	.loc 1 218 0
 	str	w2, [x0, 24]
-	.loc 1 195 0
+	.loc 1 216 0
 	str	w1, [x0, 16]
-	.loc 1 198 0
+	.loc 1 219 0
 	mov	w2, 6
-	.loc 1 196 0
+	.loc 1 217 0
 	mov	w1, 4
 	str	w1, [x0, 20]
-	b	.L32
-.LVL4:
+	b	.L43
+.LVL7:
 .L4:
-	.loc 1 166 0
+	.loc 1 164 0
 	cmp	w1, 35
-	beq	.L7
-	cmp	w1, 84
-	beq	.L8
+	beq	.L10
+	bhi	.L11
 	cmp	w1, 32
-	b	.L31
-.L8:
-	.loc 1 180 0
+	b	.L41
+.L11:
+	cmp	w1, 67
+	beq	.L3
+	cmp	w1, 84
+	bne	.L2
+	.loc 1 200 0
 	add	x0, x19, :lo12:.LANCHOR1
-	.loc 1 181 0
+	.loc 1 201 0
 	mov	w1, 1
-	.loc 1 180 0
+	.loc 1 200 0
 	str	wzr, [x19, #:lo12:.LANCHOR1]
-	.loc 1 187 0
+	.loc 1 207 0
 	mov	w2, 5
-.LVL5:
-	.loc 1 182 0
+.LVL8:
+	.loc 1 202 0
 	stp	w1, w1, [x0, 4]
-	.loc 1 183 0
+	.loc 1 203 0
 	mov	w1, 2
 	str	w1, [x0, 12]
-	.loc 1 184 0
+	.loc 1 204 0
 	mov	w1, 3
 	str	w1, [x0, 16]
-	.loc 1 185 0
+	.loc 1 205 0
 	mov	w1, 4
-	.loc 1 186 0
+	.loc 1 206 0
 	stp	w1, w1, [x0, 20]
-.L32:
-	.loc 1 188 0
+.L43:
+	.loc 1 242 0
 	stp	w2, w1, [x0, 28]
-.LVL6:
-.L9:
-.LBE46:
-.LBE45:
-	.loc 1 249 0
+	b	.L13
+.LVL9:
+.L7:
+	.loc 1 166 0
+	add	x0, x19, :lo12:.LANCHOR1
+	.loc 1 167 0
+	mov	w1, 1
+	.loc 1 166 0
+	str	wzr, [x19, #:lo12:.LANCHOR1]
+	.loc 1 168 0
+	stp	w1, w1, [x0, 4]
+	.loc 1 169 0
+	mov	w1, 2
+	str	w1, [x0, 12]
+	.loc 1 170 0
+	mov	w1, 3
+	.loc 1 171 0
+	stp	w1, w1, [x0, 16]
+	.loc 1 172 0
+	str	w1, [x0, 24]
+	.loc 1 173 0
+	str	w1, [x0, 32]
+	.loc 1 174 0
+	mov	w1, 4
+.L42:
+	.loc 1 185 0
+	str	w1, [x0, 28]
+.LVL10:
+.L13:
+.LBE43:
+.LBE42:
+	.loc 1 270 0
 	cmp	w20, 5
-	beq	.L23
-	.loc 1 252 0
+	beq	.L27
+	.loc 1 273 0
 	cmp	w20, 2
-	beq	.L23
-	.loc 1 255 0
+	beq	.L27
+	.loc 1 276 0
 	sub	w20, w20, #1
-.LVL7:
+.LVL11:
 	cmp	w20, 9
-	bhi	.L11
-	adrp	x0, .L13
-	add	x0, x0, :lo12:.L13
+	bhi	.L15
+	adrp	x0, .L17
+	add	x0, x0, :lo12:.L17
 	ldrb	w0, [x0,w20,uxtw]
-	adr	x1, .Lrtx13
+	adr	x1, .Lrtx17
 	add	x0, x1, w0, sxtb #2
 	br	x0
-.Lrtx13:
+.Lrtx17:
 	.section	.rodata.get_wf_mode_index,"a",@progbits
 	.align	0
 	.align	2
-.L13:
-	.byte	(.L12 - .Lrtx13) / 4
-	.byte	(.L11 - .Lrtx13) / 4
-	.byte	(.L14 - .Lrtx13) / 4
-	.byte	(.L15 - .Lrtx13) / 4
-	.byte	(.L11 - .Lrtx13) / 4
-	.byte	(.L16 - .Lrtx13) / 4
-	.byte	(.L23 - .Lrtx13) / 4
-	.byte	(.L17 - .Lrtx13) / 4
-	.byte	(.L18 - .Lrtx13) / 4
-	.byte	(.L19 - .Lrtx13) / 4
+.L17:
+	.byte	(.L16 - .Lrtx17) / 4
+	.byte	(.L15 - .Lrtx17) / 4
+	.byte	(.L18 - .Lrtx17) / 4
+	.byte	(.L19 - .Lrtx17) / 4
+	.byte	(.L15 - .Lrtx17) / 4
+	.byte	(.L20 - .Lrtx17) / 4
+	.byte	(.L27 - .Lrtx17) / 4
+	.byte	(.L21 - .Lrtx17) / 4
+	.byte	(.L22 - .Lrtx17) / 4
+	.byte	(.L23 - .Lrtx17) / 4
 	.section	.text.get_wf_mode_index
-.LVL8:
+.LVL12:
+.L8:
+.LBB45:
+.LBB44:
+	.loc 1 177 0
+	add	x0, x19, :lo12:.LANCHOR1
+	.loc 1 178 0
+	mov	w1, 1
+	.loc 1 177 0
+	str	wzr, [x19, #:lo12:.LANCHOR1]
+	.loc 1 179 0
+	stp	w1, w1, [x0, 4]
+	.loc 1 180 0
+	mov	w1, 2
+	str	w1, [x0, 12]
+	.loc 1 181 0
+	mov	w1, 3
+	str	w1, [x0, 16]
+	.loc 1 182 0
+	mov	w1, 4
+	.loc 1 183 0
+	stp	w1, w1, [x0, 20]
+	.loc 1 184 0
+	mov	w1, 5
+	str	w1, [x0, 32]
+	.loc 1 185 0
+	mov	w1, 6
+	b	.L42
 .L3:
-.LBB48:
-.LBB47:
-	.loc 1 191 0
+	.loc 1 212 0
 	add	x0, x19, :lo12:.LANCHOR1
-	.loc 1 192 0
+	.loc 1 213 0
 	mov	w1, 1
-	.loc 1 191 0
+	.loc 1 212 0
 	str	wzr, [x19, #:lo12:.LANCHOR1]
-	.loc 1 192 0
+	.loc 1 213 0
 	str	w1, [x0, 4]
-	.loc 1 193 0
+	.loc 1 214 0
 	mov	w1, 7
-	b	.L33
+	b	.L45
 .L5:
-	.loc 1 202 0
+	.loc 1 223 0
 	add	x0, x19, :lo12:.LANCHOR1
-	.loc 1 203 0
+	.loc 1 224 0
 	mov	w1, 1
-	.loc 1 208 0
+	.loc 1 229 0
 	mov	w2, 6
-.LVL9:
-	.loc 1 202 0
+.LVL13:
+	.loc 1 223 0
 	str	wzr, [x19, #:lo12:.LANCHOR1]
-	.loc 1 203 0
+	.loc 1 224 0
 	str	w1, [x0, 4]
-	.loc 1 204 0
+	.loc 1 225 0
 	mov	w1, 7
 	str	w1, [x0, 8]
-	.loc 1 205 0
+	.loc 1 226 0
 	mov	w1, 3
-	.loc 1 208 0
+	.loc 1 229 0
 	str	w2, [x0, 24]
-	.loc 1 206 0
+	.loc 1 227 0
 	stp	w1, w1, [x0, 12]
-	.loc 1 207 0
+	.loc 1 228 0
 	mov	w1, 5
 	str	w1, [x0, 20]
-.L34:
-	.loc 1 220 0
+.L44:
+	.loc 1 241 0
 	mov	w2, 4
-	b	.L32
-.LVL10:
-.L7:
-	.loc 1 213 0
+	b	.L43
+.LVL14:
+.L10:
+	.loc 1 234 0
 	add	x0, x19, :lo12:.LANCHOR1
-	.loc 1 214 0
+	.loc 1 235 0
 	mov	w1, 1
-	.loc 1 213 0
+	.loc 1 234 0
 	str	wzr, [x19, #:lo12:.LANCHOR1]
-	.loc 1 214 0
+	.loc 1 235 0
 	str	w1, [x0, 4]
-	.loc 1 215 0
+	.loc 1 236 0
 	mov	w1, 5
 	str	w1, [x0, 8]
-	.loc 1 216 0
+	.loc 1 237 0
 	mov	w1, 2
 	str	w1, [x0, 12]
-	.loc 1 217 0
+	.loc 1 238 0
 	mov	w1, 3
-	.loc 1 218 0
+	.loc 1 239 0
 	stp	w1, w1, [x0, 16]
-	.loc 1 219 0
+	.loc 1 240 0
 	str	w1, [x0, 24]
-	b	.L34
-.L2:
-	.loc 1 225 0
-	mov	w3, 1
-	.loc 1 226 0
-	stp	w3, w3, [x0, 4]
-	.loc 1 227 0
-	mov	w3, 2
-	.loc 1 230 0
-	mov	w4, 5
-	.loc 1 227 0
-	str	w3, [x0, 12]
-	.loc 1 228 0
-	mov	w3, 3
-	.loc 1 230 0
-	str	w4, [x0, 24]
-	.loc 1 231 0
-	mov	w4, 6
-	.loc 1 228 0
-	str	w3, [x0, 16]
-	.loc 1 229 0
-	mov	w3, 4
-	.loc 1 231 0
-	str	w4, [x0, 28]
-	.loc 1 229 0
-	str	w3, [x0, 20]
-	.loc 1 232 0
-	str	w3, [x0, 32]
-	.loc 1 233 0
-	adrp	x0, .LC0
-	add	x0, x0, :lo12:.LC0
-	ldrb	w2, [x2, 22]
-.LVL11:
-	bl	printf
-.LVL12:
-	b	.L9
-.LVL13:
-.L12:
-.LBE47:
-.LBE48:
-	.loc 1 260 0
+	b	.L44
+.LVL15:
+.L16:
+.LBE44:
+.LBE45:
+	.loc 1 281 0
 	mov	w0, 0
-.LVL14:
-.L10:
-	.loc 1 285 0
+.LVL16:
+.L14:
+	.loc 1 306 0
 	add	x19, x19, :lo12:.LANCHOR1
 	ldr	w0, [x19, w0, sxtw 2]
-.LVL15:
+.LVL17:
 	b	.L1
-.LVL16:
-.L17:
-	.loc 1 266 0
+.LVL18:
+.L21:
+	.loc 1 287 0
 	mov	w0, 4
-	.loc 1 267 0
-	b	.L10
-.LVL17:
-.L18:
-	.loc 1 269 0
+	.loc 1 288 0
+	b	.L14
+.LVL19:
+.L22:
+	.loc 1 290 0
 	mov	w0, 5
-	.loc 1 270 0
-	b	.L10
-.LVL18:
-.L19:
-	.loc 1 272 0
+	.loc 1 291 0
+	b	.L14
+.LVL20:
+.L23:
+	.loc 1 293 0
 	mov	w0, 6
-	.loc 1 273 0
-	b	.L10
-.LVL19:
-.L14:
-	.loc 1 275 0
+	.loc 1 294 0
+	b	.L14
+.LVL21:
+.L18:
+	.loc 1 296 0
 	mov	w0, 2
-	.loc 1 276 0
-	b	.L10
-.LVL20:
-.L15:
-	.loc 1 278 0
+	.loc 1 297 0
+	b	.L14
+.LVL22:
+.L19:
+	.loc 1 299 0
 	mov	w0, 1
-	.loc 1 279 0
-	b	.L10
-.LVL21:
-.L11:
-	.loc 1 281 0
+	.loc 1 300 0
+	b	.L14
+.LVL23:
+.L15:
+	.loc 1 302 0
 	adrp	x0, .LC1
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL22:
-	.loc 1 282 0
+.LVL24:
+	.loc 1 303 0
 	mov	w0, -1
 .L1:
-	.loc 1 286 0
+	.loc 1 307 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	.cfi_remember_state
@@ -310,117 +377,117 @@ get_wf_mode_index:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL23:
-.L16:
+.LVL25:
+.L20:
 	.cfi_restore_state
-	.loc 1 257 0
+	.loc 1 278 0
 	mov	w0, 7
-	b	.L10
-.LVL24:
-.L23:
-	.loc 1 263 0
+	b	.L14
+.LVL26:
+.L27:
+	.loc 1 284 0
 	mov	w0, 3
-	b	.L10
+	b	.L14
 	.cfi_endproc
-.LFE217:
+.LFE213:
 	.size	get_wf_mode_index, .-get_wf_mode_index
-	.section	.text.get_lut_gray8_data.isra.3,"ax",@progbits
+	.section	.text.get_lut_gray16_data,"ax",@progbits
 	.align	2
-	.type	get_lut_gray8_data.isra.3, %function
-get_lut_gray8_data.isra.3:
-.LFB238:
-	.loc 1 479 0
+	.type	get_lut_gray16_data, %function
+get_lut_gray16_data:
+.LFB222:
+	.loc 1 530 0
 	.cfi_startproc
-.LVL25:
+.LVL27:
 	stp	x29, x30, [sp, -48]!
 	.cfi_def_cfa_offset 48
 	.cfi_offset 29, -48
 	.cfi_offset 30, -40
-	.loc 1 487 0
+	.loc 1 536 0
 	mov	x2, 19200
-	.loc 1 479 0
+	.loc 1 530 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -32
 	.cfi_offset 20, -24
-	.loc 1 487 0
+	.loc 1 536 0
 	adrp	x19, gray_data
-	.loc 1 479 0
+	.loc 1 530 0
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -16
 	.cfi_offset 22, -8
-	.loc 1 487 0
+	.loc 1 536 0
 	add	x21, x19, :lo12:gray_data
-	.loc 1 479 0
+	.loc 1 530 0
 	mov	x22, x0
 	mov	w20, w1
-	.loc 1 487 0
+	.loc 1 536 0
 	mov	x0, x21
-.LVL26:
+.LVL28:
 	mov	w1, 0
-.LVL27:
+.LVL29:
 	bl	memset
-.LVL28:
+.LVL30:
 	adrp	x0, waveformdata
 	add	x0, x0, :lo12:waveformdata
 	mov	x4, 0
-.LVL29:
-.L36:
+.LVL31:
+.L47:
 	lsl	w8, w4, 1
-	.loc 1 479 0
+	.loc 1 530 0
 	mov	x3, 0
-	b	.L41
-.LVL30:
-.L37:
-.LBB49:
-.LBB50:
-	.loc 1 159 0
+	b	.L52
+.LVL32:
+.L48:
+.LBB46:
+.LBB47:
+	.loc 1 157 0
 	lsl	x2, x5, 10
 	add	x7, x21, x5, lsl 6
 	add	x5, x5, 1
-.LVL31:
-.LBE50:
-.LBE49:
-	.loc 1 493 0
+.LVL33:
+.LBE47:
+.LBE46:
+	.loc 1 541 0
 	ldrb	w2, [x1, x2]
 	lsl	w6, w2, w8
 	ldr	w2, [x7, x3]
 	orr	w2, w2, w6
 	str	w2, [x7, x3]
-.LVL32:
-.L39:
-	.loc 1 490 0
+.L50:
+.LVL34:
+	.loc 1 539 0 discriminator 1
 	cmp	w20, w5
-	bgt	.L37
+	bgt	.L48
 	add	x3, x3, 4
-	.loc 1 489 0
+	.loc 1 538 0 discriminator 2
 	cmp	x3, 64
-	beq	.L38
-.LVL33:
-.L41:
+	beq	.L49
+.LVL35:
+.L52:
 	add	x1, x4, x3, lsl 3
-	.loc 1 479 0
+	.loc 1 530 0
 	mov	x5, 0
 	add	x1, x1, x0
-	b	.L39
-.LVL34:
-.L38:
+	b	.L50
+.LVL36:
+.L49:
 	add	x4, x4, 1
-.LVL35:
-	.loc 1 488 0
+.LVL37:
+	.loc 1 537 0 discriminator 2
 	cmp	x4, 16
-	bne	.L36
-	.loc 1 498 0
+	bne	.L47
+	.loc 1 546 0
 	lsl	w2, w20, 6
 	add	x1, x19, :lo12:gray_data
 	mov	x0, x22
 	sxtw	x2, w2
-	.loc 1 499 0
+	.loc 1 547 0
 	ldp	x19, x20, [sp, 16]
-.LVL36:
+.LVL38:
 	ldp	x21, x22, [sp, 32]
-.LVL37:
+.LVL39:
 	ldp	x29, x30, [sp], 48
 	.cfi_restore 30
 	.cfi_restore 29
@@ -429,127 +496,128 @@ get_lut_gray8_data.isra.3:
 	.cfi_restore 19
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
-	.loc 1 498 0
+	.loc 1 546 0
 	b	memcpy
-.LVL38:
+.LVL40:
 	.cfi_endproc
-.LFE238:
-	.size	get_lut_gray8_data.isra.3, .-get_lut_gray8_data.isra.3
-	.section	.text.get_lut_gray2_data.isra.4,"ax",@progbits
+.LFE222:
+	.size	get_lut_gray16_data, .-get_lut_gray16_data
+	.section	.text.get_lut_gray2_data,"ax",@progbits
 	.align	2
-	.type	get_lut_gray2_data.isra.4, %function
-get_lut_gray2_data.isra.4:
-.LFB239:
-	.loc 1 459 0
+	.type	get_lut_gray2_data, %function
+get_lut_gray2_data:
+.LFB220:
+	.loc 1 485 0
 	.cfi_startproc
-.LVL39:
+.LVL41:
 	stp	x29, x30, [sp, -48]!
 	.cfi_def_cfa_offset 48
 	.cfi_offset 29, -48
 	.cfi_offset 30, -40
-	.loc 1 465 0
+	.loc 1 490 0
 	mov	x2, 2400
-	.loc 1 459 0
+	.loc 1 485 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -32
 	.cfi_offset 20, -24
-	.loc 1 465 0
+	.loc 1 490 0
 	adrp	x20, .LANCHOR2
 	add	x19, x20, :lo12:.LANCHOR2
-	.loc 1 459 0
+	.loc 1 485 0
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -16
 	.cfi_offset 22, -8
-	.loc 1 459 0
+	.loc 1 485 0
 	mov	x22, x0
 	mov	w21, w1
-	.loc 1 465 0
+	.loc 1 490 0
 	mov	x0, x19
-.LVL40:
+.LVL42:
 	mov	w1, 0
-.LVL41:
+.LVL43:
 	bl	memset
-.LVL42:
+.LVL44:
 	adrp	x3, waveformdata+15
 	add	x0, x19, 4
 	add	x3, x3, :lo12:waveformdata+15
-	.loc 1 466 0
+	.loc 1 491 0
 	mov	w2, 0
-.LVL43:
-.L44:
+.LVL45:
+.L55:
+	.loc 1 491 0 is_stmt 0 discriminator 1
 	cmp	w2, w21
-	bge	.L45
+	bge	.L56
 	ldr	w1, [x0, -4]
-.LBB51:
-.LBB52:
-.LBB53:
-	.loc 1 159 0
+.LBB48:
+.LBB49:
+.LBB50:
+	.loc 1 157 0 is_stmt 1
 	sub	x7, x3, #15
-.LBE53:
-.LBE52:
-.LBE51:
-	.loc 1 466 0
+.LBE50:
+.LBE49:
+.LBE48:
+	.loc 1 491 0
 	mov	x4, 0
-.L46:
-.LVL44:
-.LBB56:
-.LBB55:
-.LBB54:
-	.loc 1 159 0
+.L57:
+.LVL46:
+.LBB53:
+.LBB52:
+.LBB51:
+	.loc 1 157 0
 	lsl	x5, x4, 5
-.LBE54:
-.LBE55:
-	.loc 1 471 0
+.LBE51:
+.LBE52:
+	.loc 1 496 0
 	lsl	w6, w4, 1
 	add	x4, x4, 1
-.LVL45:
-.LBE56:
-	.loc 1 468 0
+.LVL47:
+.LBE53:
+	.loc 1 493 0
 	cmp	x4, 16
-.LBB57:
-	.loc 1 471 0
+.LBB54:
+	.loc 1 496 0
 	ldrb	w5, [x7, x5]
 	lsl	w5, w5, w6
 	orr	w1, w1, w5
-.LBE57:
-	.loc 1 468 0
-	bne	.L46
+.LBE54:
+	.loc 1 493 0
+	bne	.L57
 	ldr	w4, [x0]
 	mov	x6, x3
 	str	w1, [x0, -4]
 	mov	w1, 0
-.L47:
-.LBB58:
-	.loc 1 471 0
+.L58:
+.LBB55:
+	.loc 1 496 0
 	ldrb	w5, [x6], 32
 	lsl	w5, w5, w1
 	add	w1, w1, 2
 	orr	w4, w4, w5
-.LBE58:
-	.loc 1 468 0
+.LBE55:
+	.loc 1 493 0
 	cmp	w1, 32
-	bne	.L47
+	bne	.L58
 	str	w4, [x0], 8
-.LVL46:
-	.loc 1 466 0
+.LVL48:
+	.loc 1 491 0 discriminator 1
 	add	w2, w2, 1
-.LVL47:
+.LVL49:
 	add	x3, x3, 1024
-	b	.L44
-.LVL48:
-.L45:
-	.loc 1 476 0
+	b	.L55
+.LVL50:
+.L56:
+	.loc 1 501 0
 	lsl	w2, w21, 3
-.LVL49:
+.LVL51:
 	add	x1, x20, :lo12:.LANCHOR2
 	mov	x0, x22
 	sxtw	x2, w2
-	.loc 1 477 0
+	.loc 1 502 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-.LVL50:
+.LVL52:
 	ldp	x29, x30, [sp], 48
 	.cfi_restore 30
 	.cfi_restore 29
@@ -558,461 +626,469 @@ get_lut_gray2_data.isra.4:
 	.cfi_restore 19
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
-	.loc 1 476 0
+	.loc 1 501 0
 	b	memcpy
-.LVL51:
+.LVL53:
 	.cfi_endproc
-.LFE239:
-	.size	get_lut_gray2_data.isra.4, .-get_lut_gray2_data.isra.4
+.LFE220:
+	.size	get_lut_gray2_data, .-get_lut_gray2_data
 	.section	.text.decodewaveform,"ax",@progbits
 	.align	2
 	.global	decodewaveform
 	.type	decodewaveform, %function
 decodewaveform:
-.LFB214:
-	.loc 1 49 0
+.LFB210:
+	.loc 1 50 0
 	.cfi_startproc
-.LVL52:
-	.loc 1 57 0
-	cmp	w3, 32
-	ccmp	w3, 16, 4, ne
-	bne	.L69
-	.loc 1 49 0
+.LVL54:
+	.loc 1 58 0
+	cmp	w1, 32
+	ccmp	w1, 16, 4, ne
+	beq	.L65
+	.loc 1 58 0 is_stmt 0 discriminator 1
+	cmp	w2, 32
+	ccmp	w2, 16, 4, ne
+	bne	.L81
+.L65:
+	.loc 1 50 0 is_stmt 1
 	stp	x29, x30, [sp, -64]!
 	.cfi_def_cfa_offset 64
 	.cfi_offset 29, -64
 	.cfi_offset 30, -56
-	.loc 1 60 0
-	mov	w1, 0
-.LVL53:
-	mov	x2, 524288
-.LVL54:
-	.loc 1 49 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -32
 	.cfi_offset 22, -24
-	.loc 1 60 0
-	adrp	x21, waveformdata
-	.loc 1 49 0
-	str	x23, [sp, 48]
+	.loc 1 61 0
+	adrp	x22, waveformdata
+	.loc 1 50 0
+	stp	x23, x24, [sp, 48]
 	.cfi_offset 23, -16
-	.loc 1 60 0
-	add	x23, x21, :lo12:waveformdata
-	.loc 1 49 0
+	.cfi_offset 24, -8
+	.loc 1 61 0
+	add	x24, x22, :lo12:waveformdata
+	.loc 1 50 0
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -48
 	.cfi_offset 20, -40
-	mov	x22, x0
-	mov	w20, w3
-	.loc 1 60 0
-	mov	x0, x23
+	mov	w21, w1
+	mov	w20, w2
+	mov	x23, x0
+	.loc 1 61 0
+	mov	x2, 524288
 .LVL55:
-	bl	memset
+	mov	w1, 0
 .LVL56:
-	.loc 1 51 0
-	mov	w19, 0
-	.loc 1 117 0
-	mov	x4, x23
-	.loc 1 55 0
+	mov	x0, x24
+.LVL57:
+	bl	memset
+.LVL58:
+	.loc 1 118 0
+	mov	x5, x24
+	.loc 1 56 0
 	mov	w10, 1
-	.loc 1 52 0
+	.loc 1 53 0
 	mov	w0, 0
-	.loc 1 50 0
-	mov	w1, 0
-	mov	w5, 0
-.LVL57:
-.L55:
-	.loc 1 68 0
-	ldrb	w2, [x22, w0, uxtw]
-	cmp	w2, 255
-	beq	.L56
-	.loc 1 73 0
-	cmp	w2, 252
-	bne	.L57
+	.loc 1 52 0
+	mov	w19, 0
+	.loc 1 51 0
+	mov	w3, 0
+	mov	w6, 0
+.LVL59:
+.L67:
+	.loc 1 69 0
+	ldrb	w1, [x23, w0, uxtw]
+	cmp	w1, 255
+	beq	.L68
 	.loc 1 74 0
-	eor	w10, w10, 1
-.LVL58:
+	cmp	w1, 252
+	bne	.L69
 	.loc 1 75 0
+	eor	w10, w10, 1
+.LVL60:
+	.loc 1 76 0
 	add	w0, w0, 1
-.LVL59:
-.L57:
-	uxtw	x7, w1
-	add	w6, w1, 1
-	add	w12, w1, 3
-	add	w3, w1, 2
+.LVL61:
+.L69:
+	uxtw	x7, w3
+	add	w2, w3, 1
+	add	w12, w3, 3
+	add	w1, w3, 2
 	uxtw	x13, w0
 	add	w11, w0, 1
-	uxtw	x8, w5
-	uxtw	x2, w19
-	add	w1, w1, 4
-	.loc 1 78 0
-	cbz	w10, .L58
-	.loc 1 81 0
-	lsl	x2, x2, 5
+	uxtw	x8, w6
+	uxtw	x4, w19
+	add	w3, w3, 4
 	.loc 1 79 0
-	ldrb	w16, [x22, x13]
-.LVL60:
-	.loc 1 81 0
-	add	x7, x2, x7
+	cbz	w10, .L70
 	.loc 1 82 0
-	add	x6, x2, x6, uxtw
-	.loc 1 81 0
-	add	x7, x4, x7, lsl 5
+	lsl	x4, x4, 5
+	.loc 1 80 0
+	ldrb	w16, [x23, x13]
+.LVL62:
+	.loc 1 82 0
+	add	x7, x4, x7
 	.loc 1 83 0
-	add	x3, x2, x3, uxtw
+	add	x2, x4, x2, uxtw
 	.loc 1 82 0
-	add	x6, x4, x6, lsl 5
+	add	x7, x5, x7, lsl 5
 	.loc 1 83 0
-	add	x3, x4, x3, lsl 5
-	.loc 1 84 0
-	add	x2, x2, x12, uxtw
-	.loc 1 81 0
+	add	x2, x5, x2, lsl 5
+	.loc 1 82 0
 	and	w13, w16, 3
+	.loc 1 83 0
+	ubfx	x14, x16, 2, 2
 	.loc 1 84 0
-	add	x2, x4, x2, lsl 5
-	.loc 1 81 0
-	strb	w13, [x7, x8]
+	ubfx	x15, x16, 4, 2
+	.loc 1 89 0
+	cmp	w3, w21
 	.loc 1 82 0
-	ubfx	x14, x16, 2, 2
-	strb	w14, [x6, x8]
-.LVL61:
+	strb	w13, [x7, x8]
 	.loc 1 83 0
-	ubfx	x15, x16, 4, 2
-	strb	w15, [x3, x8]
-.LVL62:
-	.loc 1 84 0
-	lsr	w3, w16, 6
-	strb	w3, [x2, x8]
+	strb	w14, [x2, x8]
 .LVL63:
-	.loc 1 88 0
-	cmp	w1, w20
-	bcc	.L59
+	.loc 1 84 0
+	add	x2, x4, x1, uxtw
+	add	x2, x5, x2, lsl 5
+	.loc 1 85 0
+	add	x4, x4, x12, uxtw
+	add	x4, x5, x4, lsl 5
+	lsr	w1, w16, 6
+	.loc 1 84 0
+	strb	w15, [x2, x8]
 .LVL64:
-	.loc 1 90 0
-	add	w5, w5, 1
+	.loc 1 85 0
+	strb	w1, [x4, x8]
 .LVL65:
-	cmp	w20, w5
-	bhi	.L70
-.LVL66:
-	.loc 1 92 0
-	add	w19, w19, 1
-.LVL67:
 	.loc 1 89 0
-	mov	w1, 0
+	bcc	.L71
+.LVL66:
 	.loc 1 91 0
-	mov	w5, 0
+	add	w6, w6, 1
+.LVL67:
+	cmp	w21, w6
+	bhi	.L82
 .LVL68:
-.L59:
-	.loc 1 96 0
-	ldrb	w6, [x22, w11, uxtw]
+	.loc 1 93 0
+	add	w19, w19, 1
 .LVL69:
-.L60:
-	.loc 1 97 0 discriminator 1
-	cbnz	w6, .L62
-	.loc 1 112 0
-	add	w0, w0, 2
+	.loc 1 90 0
+	mov	w3, 0
+	.loc 1 92 0
+	mov	w6, 0
 .LVL70:
-	b	.L63
+.L71:
+	.loc 1 97 0
+	ldrb	w4, [x23, w11, uxtw]
 .LVL71:
 .L72:
-	.loc 1 125 0
-	mov	w1, 0
+	.loc 1 98 0 discriminator 1
+	cbnz	w4, .L74
+	.loc 1 113 0
+	add	w0, w0, 2
 .LVL72:
-.L63:
-	.loc 1 63 0
-	cmp	w19, 511
-	bls	.L55
+	b	.L75
+.LVL73:
+.L84:
+	.loc 1 126 0
+	mov	w3, 0
+.LVL74:
+.L75:
 	.loc 1 64 0
+	cmp	w19, 511
+	bls	.L67
+	.loc 1 65 0
 	adrp	x0, .LC2
-.LVL73:
+.LVL75:
 	add	x0, x0, :lo12:.LC2
 	bl	printf
-.LVL74:
-.L56:
+.LVL76:
+.L68:
 	.loc 1 135 0
-	cmp	w20, 16
-	beq	.L83
-	add	x21, x21, :lo12:waveformdata
+	cmp	w21, 32
+	ccmp	w20, 16, 0, eq
+	bne	.L76
+	add	x22, x22, :lo12:waveformdata
 	mov	w0, 0
-.L65:
-.LVL75:
-	.loc 1 139 0 discriminator 1
+.L77:
+.LVL77:
+	.loc 1 137 0 discriminator 1
 	cmp	w0, w19
-	bcc	.L73
-.LVL76:
-.L83:
-	.loc 1 153 0
+	bcc	.L85
+.LVL78:
+.L76:
+	.loc 1 152 0
 	mov	w0, w19
-	.loc 1 154 0
-	ldr	x23, [sp, 48]
+	.loc 1 153 0
 	ldp	x19, x20, [sp, 16]
-.LVL77:
+.LVL79:
 	ldp	x21, x22, [sp, 32]
-.LVL78:
+.LVL80:
+	ldp	x23, x24, [sp, 48]
+.LVL81:
 	ldp	x29, x30, [sp], 64
 	.cfi_remember_state
 	.cfi_restore 30
 	.cfi_restore 29
 	.cfi_restore 23
+	.cfi_restore 24
 	.cfi_restore 21
 	.cfi_restore 22
 	.cfi_restore 19
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL79:
-.L70:
+.LVL82:
+.L82:
 	.cfi_restore_state
-	.loc 1 89 0
-	mov	w1, 0
-	b	.L59
-.LVL80:
-.L62:
-	.loc 1 98 0
-	ubfiz	x11, x19, 5, 32
+	.loc 1 90 0
+	mov	w3, 0
+	b	.L71
+.LVL83:
+.L74:
 	.loc 1 99 0
-	add	w8, w1, 1
-	.loc 1 98 0
-	add	x7, x11, x1, uxtw
-	uxtw	x2, w5
-	add	x7, x4, x7, lsl 5
+	ubfiz	x11, x19, 5, 32
+	.loc 1 100 0
+	add	w8, w3, 1
 	.loc 1 99 0
+	add	x7, x11, x3, uxtw
+	uxtw	x2, w6
+	add	x7, x5, x7, lsl 5
+	.loc 1 100 0
 	add	x8, x11, x8
-	add	x8, x4, x8, lsl 5
-	.loc 1 98 0
+	add	x8, x5, x8, lsl 5
+	.loc 1 99 0
 	strb	w13, [x7, x2]
+	.loc 1 101 0
+	add	w7, w3, 3
+.LVL84:
 	.loc 1 100 0
-	add	w7, w1, 3
-.LVL81:
-	.loc 1 99 0
 	strb	w14, [x8, x2]
-	.loc 1 100 0
-	add	w8, w1, 2
-	add	x8, x11, x8
 	.loc 1 101 0
+	add	w8, w3, 2
+	add	x8, x11, x8
+	.loc 1 102 0
 	add	x7, x11, x7, uxtw
-.LVL82:
-	.loc 1 100 0
-	add	x8, x4, x8, lsl 5
-	.loc 1 101 0
-	add	x7, x4, x7, lsl 5
-	add	w1, w1, 4
-.LVL83:
-	.loc 1 103 0
-	cmp	w20, w1
-	.loc 1 100 0
-	strb	w15, [x8, x2]
-.LVL84:
-	.loc 1 101 0
-	strb	w3, [x7, x2]
-	.loc 1 103 0
-	bhi	.L61
 .LVL85:
-	.loc 1 105 0
-	add	w5, w5, 1
+	.loc 1 101 0
+	add	x8, x5, x8, lsl 5
+	.loc 1 102 0
+	add	x7, x5, x7, lsl 5
+	add	w3, w3, 4
 .LVL86:
-	cmp	w20, w5
-	bhi	.L71
+	.loc 1 104 0
+	cmp	w21, w3
+	.loc 1 101 0
+	strb	w15, [x8, x2]
 .LVL87:
-	.loc 1 107 0
-	add	w19, w19, 1
-.LVL88:
+	.loc 1 102 0
+	strb	w1, [x7, x2]
 	.loc 1 104 0
-	mov	w1, 0
+	bhi	.L73
+.LVL88:
 	.loc 1 106 0
-	mov	w5, 0
+	add	w6, w6, 1
 .LVL89:
-.L61:
-	.loc 1 97 0
-	sub	w6, w6, #1
+	cmp	w21, w6
+	bhi	.L83
 .LVL90:
-	and	w6, w6, 255
+	.loc 1 108 0
+	add	w19, w19, 1
 .LVL91:
-	b	.L60
+	.loc 1 105 0
+	mov	w3, 0
+	.loc 1 107 0
+	mov	w6, 0
 .LVL92:
-.L71:
-	.loc 1 104 0
-	mov	w1, 0
-	b	.L61
+.L73:
+	.loc 1 98 0
+	sub	w4, w4, #1
 .LVL93:
-.L58:
-	.loc 1 117 0
-	lsl	x2, x2, 5
-	.loc 1 115 0
-	ldrb	w0, [x22, x13]
+	and	w4, w4, 255
 .LVL94:
-	.loc 1 117 0
-	add	x7, x2, x7
+	b	.L72
+.LVL95:
+.L83:
+	.loc 1 105 0
+	mov	w3, 0
+	b	.L73
+.LVL96:
+.L70:
 	.loc 1 118 0
-	add	x6, x2, x6, uxtw
-	.loc 1 117 0
-	add	x7, x4, x7, lsl 5
+	lsl	x4, x4, 5
+	.loc 1 116 0
+	ldrb	w0, [x23, x13]
+.LVL97:
 	.loc 1 118 0
-	add	x6, x4, x6, lsl 5
+	add	x7, x4, x7
 	.loc 1 119 0
-	add	x3, x2, x3, uxtw
-	.loc 1 120 0
-	add	x2, x2, x12, uxtw
+	add	x2, x4, x2, uxtw
+	.loc 1 118 0
+	add	x7, x5, x7, lsl 5
 	.loc 1 119 0
-	add	x3, x4, x3, lsl 5
-	.loc 1 117 0
-	and	w13, w0, 3
+	add	x2, x5, x2, lsl 5
 	.loc 1 120 0
-	add	x2, x4, x2, lsl 5
-	.loc 1 117 0
-	strb	w13, [x7, x8]
+	add	x1, x4, x1, uxtw
+	.loc 1 121 0
+	add	x4, x4, x12, uxtw
+	.loc 1 120 0
+	add	x1, x5, x1, lsl 5
 	.loc 1 118 0
-	ubfx	x7, x0, 2, 2
-	strb	w7, [x6, x8]
-.LVL95:
+	and	w13, w0, 3
+	.loc 1 121 0
+	add	x4, x5, x4, lsl 5
+	.loc 1 118 0
+	strb	w13, [x7, x8]
 	.loc 1 119 0
-	ubfx	x6, x0, 4, 2
-	strb	w6, [x3, x8]
-.LVL96:
-	.loc 1 120 0
-	lsr	w0, w0, 6
-.LVL97:
-	strb	w0, [x2, x8]
-	.loc 1 124 0
-	cmp	w1, w20
-	.loc 1 122 0
-	mov	w0, w11
+	ubfx	x7, x0, 2, 2
+	strb	w7, [x2, x8]
 .LVL98:
-	.loc 1 124 0
-	bcc	.L63
+	.loc 1 120 0
+	ubfx	x2, x0, 4, 2
+	strb	w2, [x1, x8]
 .LVL99:
-	.loc 1 126 0
-	add	w5, w5, 1
+	.loc 1 121 0
+	lsr	w0, w0, 6
 .LVL100:
-	cmp	w20, w5
-	bhi	.L72
+	strb	w0, [x4, x8]
+	.loc 1 125 0
+	cmp	w3, w21
+	.loc 1 123 0
+	mov	w0, w11
 .LVL101:
-	.loc 1 128 0
-	add	w19, w19, 1
-.LVL102:
 	.loc 1 125 0
-	mov	w1, 0
+	bcc	.L75
+.LVL102:
 	.loc 1 127 0
-	mov	w5, 0
-	b	.L63
+	add	w6, w6, 1
 .LVL103:
-.L73:
-	.loc 1 147 0
+	cmp	w21, w6
+	bhi	.L84
+.LVL104:
+	.loc 1 129 0
+	add	w19, w19, 1
+.LVL105:
+	.loc 1 126 0
+	mov	w3, 0
+	.loc 1 128 0
+	mov	w6, 0
+	b	.L75
+.LVL106:
+.L85:
+	.loc 1 145 0
 	sbfiz	x5, x0, 5, 32
 	mov	x2, 0
-.L68:
-.LVL104:
+.L80:
+.LVL107:
 	and	x1, x2, 2147483647
 	add	x4, x2, x0, uxtw 4
 	add	x1, x5, x1
-	add	x4, x21, x4, lsl 6
-	add	x1, x21, x1, lsl 5
+	add	x4, x22, x4, lsl 6
+	add	x1, x22, x1, lsl 5
 	mov	x3, 0
-.LVL105:
-.L66:
-	.loc 1 146 0 discriminator 3
+.LVL108:
+.L78:
+	.loc 1 144 0 discriminator 3
 	lsl	x6, x3, 1
 	ldrb	w7, [x4, x6]
-.LVL106:
-	.loc 1 147 0 discriminator 3
+.LVL109:
+	.loc 1 145 0 discriminator 3
 	and	x6, x3, 2147483647
 	add	x3, x3, 1
-.LVL107:
-	.loc 1 141 0 discriminator 3
+.LVL110:
+	.loc 1 139 0 discriminator 3
 	cmp	x3, 16
-	.loc 1 147 0 discriminator 3
+	.loc 1 145 0 discriminator 3
 	strb	w7, [x1, x6]
-	.loc 1 141 0 discriminator 3
-	bne	.L66
-.LVL108:
+	.loc 1 139 0 discriminator 3
+	bne	.L78
+.LVL111:
 	add	x2, x2, 1
-.LVL109:
-	.loc 1 140 0 discriminator 2
+.LVL112:
+	.loc 1 138 0 discriminator 2
 	cmp	x2, 16
-	bne	.L68
-	.loc 1 139 0 discriminator 2
+	bne	.L80
+	.loc 1 137 0 discriminator 2
 	add	w0, w0, 1
-.LVL110:
+.LVL113:
 	and	w0, w0, 255
-.LVL111:
-	b	.L65
-.LVL112:
-.L69:
+.LVL114:
+	b	.L77
+.LVL115:
+.L81:
 	.cfi_def_cfa 31, 0
 	.cfi_restore 19
 	.cfi_restore 20
 	.cfi_restore 21
 	.cfi_restore 22
 	.cfi_restore 23
+	.cfi_restore 24
 	.cfi_restore 29
 	.cfi_restore 30
-	.loc 1 58 0
+	.loc 1 59 0
 	mov	w0, -22
-.LVL113:
+.LVL116:
 	ret
 	.cfi_endproc
-.LFE214:
+.LFE210:
 	.size	decodewaveform, .-decodewaveform
 	.section	.text.get_wf_frm_num,"ax",@progbits
 	.align	2
 	.type	get_wf_frm_num, %function
 get_wf_frm_num:
-.LFB219:
-	.loc 1 309 0
+.LFB215:
+	.loc 1 330 0
 	.cfi_startproc
-.LVL114:
+.LVL117:
 	stp	x29, x30, [sp, -16]!
 	.cfi_def_cfa_offset 16
 	.cfi_offset 29, -16
 	.cfi_offset 30, -8
-	mov	w2, w0
-	.loc 1 310 0
-	adrp	x0, .LANCHOR0
-.LVL115:
-	.loc 1 309 0
+	.loc 1 331 0
+	adrp	x3, .LANCHOR0
+	.loc 1 330 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	.loc 1 310 0
-	ldr	x6, [x0, #:lo12:.LANCHOR0]
-.LVL116:
-	.loc 1 315 0
-	ldrb	w5, [x6, 32]
-	add	w5, w5, w2, lsl 2
-.LVL117:
-	.loc 1 317 0
-	sxtw	x5, w5
-	ldrb	w10, [x6, x5]
+	.loc 1 331 0
+	ldr	x4, [x3, #:lo12:.LANCHOR0]
 .LVL118:
-	.loc 1 318 0
-	add	x5, x6, x5
+	.loc 1 336 0
+	ldrb	w3, [x4, 32]
+	add	w0, w3, w0, lsl 2
 .LVL119:
-	ldrb	w4, [x5, 1]
+	.loc 1 338 0
+	sxtw	x0, w0
+	ldrb	w8, [x4, x0]
 .LVL120:
-	.loc 1 319 0
-	ldrb	w7, [x5, 2]
+	.loc 1 339 0
+	add	x0, x4, x0
 .LVL121:
-	.loc 1 320 0
-	ldrb	w3, [x5, 3]
-	.loc 1 321 0
-	add	w0, w4, w7
-	add	w0, w0, w10
-	cmp	w3, w0, uxtb
-	beq	.L85
-	.loc 1 322 0
-	mov	w2, 322
+	ldrb	w5, [x0, 1]
 .LVL122:
-.L93:
-	.loc 1 336 0
-	adrp	x1, .LANCHOR3
+	.loc 1 340 0
+	ldrb	w6, [x0, 2]
 .LVL123:
+	.loc 1 341 0
+	ldrb	w3, [x0, 3]
+	.loc 1 342 0
+	add	w0, w5, w6
+	add	w0, w0, w8
+	cmp	w3, w0, uxtb
+	beq	.L101
+	.loc 1 343 0
+	mov	w2, 343
+.LVL124:
+.L111:
+	.loc 1 357 0
+	adrp	x1, .LANCHOR3
 	adrp	x0, .LC3
 	add	x1, x1, :lo12:.LANCHOR3
 	add	x0, x0, :lo12:.LC3
 	bl	printf
-.LVL124:
-	.loc 1 354 0
+.LVL125:
+.L100:
+	.loc 1 379 0
 	mov	w0, -22
 	ldp	x29, x30, [sp], 16
 	.cfi_remember_state
@@ -1020,91 +1096,94 @@ get_wf_frm_num:
 	.cfi_restore 29
 	.cfi_def_cfa 31, 0
 	ret
-.LVL125:
-.L85:
-	.cfi_restore_state
-	.loc 1 326 0
-	lsl	w3, w7, 16
-	mov	w8, w1
-	orr	w3, w3, w4, lsl 8
-	orr	w3, w3, w10
 .LVL126:
-	.loc 1 328 0
-	add	w3, w3, w1, lsl 2
+.L101:
+	.cfi_restore_state
+	.loc 1 347 0
+	lsl	w3, w6, 16
+	orr	w3, w3, w5, lsl 8
+	orr	w3, w3, w8
 .LVL127:
-	.loc 1 330 0
-	sxtw	x3, w3
-	ldrb	w0, [x6, x3]
+	.loc 1 349 0
+	add	w3, w3, w1, lsl 2
 .LVL128:
-	.loc 1 331 0
-	add	x3, x6, x3
+	.loc 1 351 0
+	sxtw	x3, w3
+	ldrb	w6, [x4, x3]
 .LVL129:
-	ldrb	w5, [x3, 1]
+	.loc 1 352 0
+	add	x3, x4, x3
 .LVL130:
-	.loc 1 332 0
-	ldrb	w4, [x3, 2]
+	ldrb	w1, [x3, 1]
 .LVL131:
-	.loc 1 333 0
-	ldrb	w7, [x3, 3]
+	.loc 1 353 0
+	ldrb	w5, [x3, 2]
 .LVL132:
-	.loc 1 335 0
-	add	w3, w5, w4
-	add	w3, w3, w0
-	cmp	w7, w3, uxtb
-	beq	.L87
+	.loc 1 354 0
+	ldrb	w0, [x3, 3]
+	.loc 1 356 0
+	add	w3, w1, w5
+	add	w3, w3, w6
+	cmp	w0, w3, uxtb
+	beq	.L103
+	.loc 1 357 0
+	mov	w2, 357
 .LVL133:
-	.loc 1 336 0
-	mov	w2, 336
+	b	.L111
 .LVL134:
-	b	.L93
+.L103:
+	.loc 1 361 0
+	lsl	w0, w5, 16
+	mov	w7, w2
+	orr	w0, w0, w1, lsl 8
+	ldrb	w1, [x4, 16]
 .LVL135:
-.L87:
-	.loc 1 340 0
-	lsl	w4, w4, 16
+	orr	w0, w0, w6
 .LVL136:
-	.loc 1 342 0
-	ldrb	w3, [x6, 16]
-	.loc 1 340 0
-	orr	w4, w4, w5, lsl 8
-	orr	w4, w4, w0
+	sub	w1, w1, #22
+	and	w1, w1, 255
+	cmp	w1, 45
+	bhi	.L104
+	mov	x3, 1
+	lsl	x1, x3, x1
+	mov	x3, 1037
+	movk	x3, 0x2000, lsl 32
+	tst	x1, x3
+	beq	.L104
+	.loc 1 369 0
+	mov	w1, 32
 .LVL137:
-	cmp	w3, 32
-	bhi	.L88
-	mov	x0, 1
-.LVL138:
-	lsl	x0, x0, x3
-	mov	x3, 50331648
-	movk	x3, 0x1, lsl 32
-	tst	x0, x3
-	beq	.L88
-	.loc 1 346 0
-	mov	w3, 32
-.L94:
-	.loc 1 354 0
+.L112:
+	.loc 1 379 0
 	ldp	x29, x30, [sp], 16
 	.cfi_remember_state
 	.cfi_restore 30
 	.cfi_restore 29
 	.cfi_def_cfa 31, 0
-	.loc 1 349 0
-	add	x0, x6, x4
+	.loc 1 374 0
+	add	x0, x4, x0
+.LVL138:
 	b	decodewaveform
 .LVL139:
-.L88:
+.L104:
 	.cfi_restore_state
-	mov	w3, 16
-	mov	w1, w8
+	.loc 1 372 0
+	cmp	w7, 32
+	beq	.L100
+	.loc 1 374 0
+	mov	w2, 16
 .LVL140:
-	b	.L94
+	mov	w1, w2
+	b	.L112
 	.cfi_endproc
-.LFE219:
+.LFE215:
 	.size	get_wf_frm_num, .-get_wf_frm_num
 	.section	.text.parse_wf_gray16_with_lut_type,"ax",@progbits
 	.align	2
 	.type	parse_wf_gray16_with_lut_type, %function
 parse_wf_gray16_with_lut_type:
-.LFB229:
-	.loc 1 572 0
+.LFB227:
+	.loc 1 638 0
 	.cfi_startproc
 .LVL141:
 	stp	x29, x30, [sp, -32]!
@@ -1116,28 +1195,29 @@ parse_wf_gray16_with_lut_type:
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -16
 	.cfi_offset 20, -8
-	.loc 1 572 0
+	.loc 1 638 0
 	mov	x20, x0
 	mov	w19, w1
-	.loc 1 576 0
+	.loc 1 642 0
 	mov	w0, w2
 .LVL142:
 	bl	get_wf_mode_index
 .LVL143:
-	.loc 1 577 0
+	.loc 1 643 0
 	mov	w1, w19
+	mov	w2, 16
 	bl	get_wf_frm_num
 .LVL144:
-	.loc 1 579 0
+	.loc 1 645 0
 	str	w0, [x20]
-	.loc 1 577 0
+	.loc 1 643 0
 	mov	w19, w0
 .LVL145:
-	.loc 1 580 0
+	.loc 1 646 0
 	lsl	w0, w0, 6
 .LVL146:
-.LBB59:
-.LBB60:
+.LBB56:
+.LBB57:
 	.file 2 "include/linux/compat.h"
 	.loc 2 58 0
 	mov	w1, 32768
@@ -1145,20 +1225,20 @@ parse_wf_gray16_with_lut_type:
 .LVL147:
 	bl	kmalloc
 .LVL148:
-.LBE60:
-.LBE59:
-	.loc 1 580 0
+.LBE57:
+.LBE56:
+	.loc 1 646 0
 	str	x0, [x20, 8]
-	.loc 1 581 0
-	cbz	x0, .L97
-	.loc 1 584 0
+	.loc 1 647 0
+	cbz	x0, .L115
+	.loc 1 650 0
 	mov	w1, w19
-	bl	get_lut_gray8_data.isra.3
+	bl	get_lut_gray16_data
 .LVL149:
-	.loc 1 586 0
+	.loc 1 652 0
 	mov	w0, 0
-.L95:
-	.loc 1 587 0
+.L113:
+	.loc 1 653 0
 	ldp	x19, x20, [sp, 16]
 .LVL150:
 	ldp	x29, x30, [sp], 32
@@ -1170,20 +1250,20 @@ parse_wf_gray16_with_lut_type:
 	.cfi_def_cfa 31, 0
 	ret
 .LVL151:
-.L97:
+.L115:
 	.cfi_restore_state
-	.loc 1 582 0
+	.loc 1 648 0
 	mov	w0, -12
-	b	.L95
+	b	.L113
 	.cfi_endproc
-.LFE229:
+.LFE227:
 	.size	parse_wf_gray16_with_lut_type, .-parse_wf_gray16_with_lut_type
 	.section	.text.parse_wf_gray2,"ax",@progbits
 	.align	2
 	.type	parse_wf_gray2, %function
 parse_wf_gray2:
-.LFB227:
-	.loc 1 528 0
+.LFB224:
+	.loc 1 576 0
 	.cfi_startproc
 .LVL152:
 	stp	x29, x30, [sp, -48]!
@@ -1198,87 +1278,88 @@ parse_wf_gray2:
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -32
 	.cfi_offset 20, -24
-	.loc 1 533 0
+	.loc 1 581 0
 	mov	w0, 4
 .LVL153:
-	.loc 1 528 0
+	.loc 1 576 0
 	mov	w19, w1
-	.loc 1 533 0
+	.loc 1 581 0
 	bl	get_wf_mode_index
 .LVL154:
-	.loc 1 534 0
+	.loc 1 582 0
 	mov	w1, w19
+	mov	w2, 16
 	bl	get_wf_frm_num
 .LVL155:
-	.loc 1 536 0
+	.loc 1 584 0
 	str	w0, [x21]
-	.loc 1 534 0
+	.loc 1 582 0
 	mov	w19, w0
 .LVL156:
-	.loc 1 537 0
+	.loc 1 585 0
 	lsl	w0, w0, 3
 .LVL157:
-.LBB69:
-.LBB70:
+.LBB66:
+.LBB67:
 	.loc 2 58 0
 	mov	w1, 32768
 	sxtw	x0, w0
 .LVL158:
 	bl	kmalloc
 .LVL159:
-.LBE70:
-.LBE69:
-	.loc 1 538 0
-	cbz	x0, .L105
+.LBE67:
+.LBE66:
+	.loc 1 586 0
+	cbz	x0, .L123
 	mov	x20, x0
-	.loc 1 541 0
+	.loc 1 589 0
 	mov	w1, w19
-	bl	get_lut_gray2_data.isra.4
+	bl	get_lut_gray2_data
 .LVL160:
-	.loc 1 545 0
+	.loc 1 593 0
 	str	w19, [x21]
 .LVL161:
+.LBB68:
+.LBB69:
+.LBB70:
 .LBB71:
-.LBB72:
-.LBB73:
-.LBB74:
 	.loc 2 58 0
 	mov	w1, 32768
 	lsl	w0, w19, 6
 .LVL162:
 	bl	kmalloc
 .LVL163:
-.LBE74:
-.LBE73:
-	.loc 1 401 0
-	cbz	x0, .L106
+.LBE71:
+.LBE70:
+	.loc 1 426 0
+	cbz	x0, .L124
 	mov	x5, x0
 	mov	x4, x20
 	mov	w3, 0
 .LVL164:
-.L102:
-	.loc 1 404 0
+.L120:
+	.loc 1 429 0
 	cmp	w19, w3
-	bgt	.L104
+	bgt	.L122
 .LVL165:
-.L101:
-.LBE72:
-.LBE71:
-	.loc 1 546 0
+.L119:
+.LBE69:
+.LBE68:
+	.loc 1 594 0
 	str	x0, [x21, 8]
 .LVL166:
-.LBB76:
-.LBB77:
+.LBB73:
+.LBB74:
 	.loc 2 81 0
 	mov	x0, x20
 	bl	free
 .LVL167:
-.LBE77:
-.LBE76:
-	.loc 1 550 0
+.LBE74:
+.LBE73:
+	.loc 1 598 0
 	mov	w0, 0
-.L99:
-	.loc 1 551 0
+.L117:
+	.loc 1 599 0
 	ldp	x19, x20, [sp, 16]
 .LVL168:
 	ldr	x21, [sp, 32]
@@ -1293,83 +1374,83 @@ parse_wf_gray2:
 	.cfi_def_cfa 31, 0
 	ret
 .LVL170:
-.L104:
+.L122:
 	.cfi_restore_state
-.LBB78:
 .LBB75:
-	.loc 1 405 0
+.LBB72:
+	.loc 1 430 0
 	ldr	w8, [x4], 8
 .LVL171:
-	.loc 1 406 0
+	.loc 1 431 0
 	mov	x2, 0
 	ldr	w7, [x4, -4]
 .LVL172:
-.L103:
+.L121:
 	lsl	w1, w2, 1
 .LVL173:
-	.loc 1 409 0
+	.loc 1 434 0
 	asr	w6, w8, w1
 	and	w6, w6, 3
-	.loc 1 410 0
+	.loc 1 435 0
 	asr	w1, w7, w1
 .LVL174:
-	.loc 1 411 0
+	.loc 1 436 0
 	orr	w1, w6, w1, lsl 30
-	.loc 1 412 0
+	.loc 1 437 0
 	str	w1, [x5, x2, lsl 2]
 .LVL175:
 	add	x2, x2, 1
 .LVL176:
-	.loc 1 408 0
+	.loc 1 433 0
 	cmp	x2, 16
-	bne	.L103
-	.loc 1 404 0
+	bne	.L121
+	.loc 1 429 0
 	add	w3, w3, 1
 .LVL177:
 	add	x5, x5, 64
-	b	.L102
+	b	.L120
 .LVL178:
-.L106:
-	.loc 1 402 0
+.L124:
+	.loc 1 427 0
 	mov	x0, 0
-	b	.L101
+	b	.L119
 .LVL179:
-.L105:
+.L123:
+.LBE72:
 .LBE75:
-.LBE78:
-	.loc 1 539 0
+	.loc 1 587 0
 	mov	w0, -12
-	b	.L99
+	b	.L117
 	.cfi_endproc
-.LFE227:
+.LFE224:
 	.size	parse_wf_gray2, .-parse_wf_gray2
 	.section	.text.pvi_wf_get_lut,"ax",@progbits
 	.align	2
 	.global	pvi_wf_get_lut
 	.type	pvi_wf_get_lut, %function
 pvi_wf_get_lut:
-.LFB232:
-	.loc 1 649 0
+.LFB230:
+	.loc 1 715 0
 	.cfi_startproc
 .LVL180:
-	.loc 1 655 0
+	.loc 1 721 0
 	adrp	x3, .LANCHOR0
 	ldr	x4, [x3, #:lo12:.LANCHOR0]
-	cbz	x4, .L144
-	.loc 1 658 0
-	cbz	x0, .L145
-	.loc 1 662 0
+	cbz	x4, .L171
+	.loc 1 724 0
+	cbz	x0, .L172
+	.loc 1 728 0
 	adrp	x3, .LANCHOR4
 	ldr	w5, [x3, #:lo12:.LANCHOR4]
 	cmp	w5, w2
 	adrp	x5, .LANCHOR5
-	bne	.L111
-	.loc 1 662 0 is_stmt 0 discriminator 1
+	bne	.L129
+	.loc 1 728 0 is_stmt 0 discriminator 1
 	ldr	w6, [x5, #:lo12:.LANCHOR5]
 	cmp	w6, w1
-	beq	.L146
-.L111:
-	.loc 1 649 0 is_stmt 1
+	beq	.L173
+.L129:
+	.loc 1 715 0 is_stmt 1
 	stp	x29, x30, [sp, -80]!
 	.cfi_def_cfa_offset 80
 	.cfi_offset 29, -80
@@ -1387,258 +1468,261 @@ pvi_wf_get_lut:
 	.cfi_offset 23, -32
 	.cfi_offset 24, -24
 	.cfi_offset 25, -16
-	.loc 1 665 0
+	.loc 1 731 0
 	str	w2, [x3, #:lo12:.LANCHOR4]
-.LBB116:
-.LBB117:
-	.loc 1 291 0
+.LBB121:
+.LBB122:
+	.loc 1 312 0
 	mov	x3, 0
 	ldrb	w20, [x4, 38]
-.LBE117:
-.LBE116:
-	.loc 1 666 0
+.LBE122:
+.LBE121:
+	.loc 1 732 0
 	str	w1, [x5, #:lo12:.LANCHOR5]
 .LVL181:
-.L112:
+.L130:
 	mov	w5, w3
 .LVL182:
-.LBB120:
-.LBB118:
-	.loc 1 295 0
+.LBB125:
+.LBB123:
+	.loc 1 316 0
 	cmp	w20, w3
-	bgt	.L114
-	.loc 1 302 0
+	bgt	.L132
+	.loc 1 323 0
 	cmp	w20, w3
-	bne	.L147
-	.loc 1 303 0
+	bne	.L174
+	.loc 1 324 0
 	sub	w20, w20, #1
 .LVL183:
-	b	.L113
+	b	.L131
 .LVL184:
-.L114:
-	.loc 1 296 0
+.L132:
+	.loc 1 317 0
 	add	x6, x4, x3
 	add	x3, x3, 1
 .LVL185:
 	ldrb	w6, [x6, 48]
 	cmp	w2, w6
-	bge	.L112
-	.loc 1 297 0
+	bge	.L130
+	.loc 1 318 0
 	sub	w20, w5, #1
 .LVL186:
-.L113:
+.L131:
 	mov	x19, x0
 .LVL187:
-.LBE118:
-.LBE120:
-	.loc 1 671 0
+.LBE123:
+.LBE125:
+	.loc 1 737 0
 	ldr	x0, [x0, 8]
 .LVL188:
 	mov	w21, w1
-	cbz	x0, .L115
+	cbz	x0, .L133
 .LVL189:
-.LBB121:
-.LBB122:
+.LBB126:
+.LBB127:
 	.loc 2 81 0
 	bl	free
 .LVL190:
-.LBE122:
-.LBE121:
-	.loc 1 673 0
+.LBE127:
+.LBE126:
+	.loc 1 739 0
 	str	xzr, [x19, 8]
-.L115:
-	.loc 1 677 0
+.L133:
+	.loc 1 743 0
 	sub	w1, w21, #1
-	cmp	w1, 10
-	bhi	.L138
-	adrp	x0, .L117
-	add	x0, x0, :lo12:.L117
+	cmp	w1, 11
+	bhi	.L157
+	adrp	x0, .L135
+	add	x0, x0, :lo12:.L135
 	ldrh	w0, [x0,w1,uxtw #1]
-	adr	x1, .Lrtx117
+	adr	x1, .Lrtx135
 	add	x0, x1, w0, sxth #2
 	br	x0
-.Lrtx117:
+.Lrtx135:
 	.section	.rodata.pvi_wf_get_lut,"a",@progbits
 	.align	0
 	.align	2
-.L117:
-	.2byte	(.L116 - .Lrtx117) / 4
-	.2byte	(.L118 - .Lrtx117) / 4
-	.2byte	(.L119 - .Lrtx117) / 4
-	.2byte	(.L171 - .Lrtx117) / 4
-	.2byte	(.L121 - .Lrtx117) / 4
-	.2byte	(.L122 - .Lrtx117) / 4
-	.2byte	(.L123 - .Lrtx117) / 4
-	.2byte	(.L124 - .Lrtx117) / 4
-	.2byte	(.L125 - .Lrtx117) / 4
-	.2byte	(.L126 - .Lrtx117) / 4
-	.2byte	(.L127 - .Lrtx117) / 4
+.L135:
+	.2byte	(.L134 - .Lrtx135) / 4
+	.2byte	(.L136 - .Lrtx135) / 4
+	.2byte	(.L137 - .Lrtx135) / 4
+	.2byte	(.L201 - .Lrtx135) / 4
+	.2byte	(.L139 - .Lrtx135) / 4
+	.2byte	(.L140 - .Lrtx135) / 4
+	.2byte	(.L141 - .Lrtx135) / 4
+	.2byte	(.L142 - .Lrtx135) / 4
+	.2byte	(.L143 - .Lrtx135) / 4
+	.2byte	(.L144 - .Lrtx135) / 4
+	.2byte	(.L145 - .Lrtx135) / 4
+	.2byte	(.L146 - .Lrtx135) / 4
 	.section	.text.pvi_wf_get_lut
 .LVL191:
-.L147:
-.LBB123:
-.LBB119:
-	.loc 1 292 0
+.L174:
+.LBB128:
+.LBB124:
+	.loc 1 313 0
 	mov	w20, -1
 .LVL192:
-	b	.L113
+	b	.L131
 .LVL193:
-.L116:
-.LBE119:
-.LBE123:
-.LBB124:
-.LBB125:
-	.loc 1 507 0
+.L134:
+.LBE124:
+.LBE128:
+.LBB129:
+.LBB130:
+	.loc 1 555 0
 	mov	w0, 1
 	bl	get_wf_mode_index
 .LVL194:
-	.loc 1 508 0
+	.loc 1 556 0
 	mov	w1, w20
+	mov	w2, 16
 	bl	get_wf_frm_num
 .LVL195:
-	.loc 1 510 0
+	.loc 1 558 0
 	add	w21, w0, 3
 .LVL196:
 	mov	w20, 4
-	.loc 1 508 0
-	mov	w22, w0
 .LVL197:
-.LBB126:
-.LBB127:
+	.loc 1 556 0
+	mov	w22, w0
+.LVL198:
+.LBB131:
+.LBB132:
 	.loc 2 58 0
 	mov	w1, 32768
-.LBE127:
-.LBE126:
-	.loc 1 510 0
+.LBE132:
+.LBE131:
+	.loc 1 558 0
 	sdiv	w20, w21, w20
 	sxtw	x20, w20
-.LVL198:
-.LBB129:
-.LBB128:
+.LVL199:
+.LBB134:
+.LBB133:
 	.loc 2 58 0
 	mov	x0, x20
-.LVL199:
-	bl	kmalloc
 .LVL200:
-	mov	x24, x0
+	bl	kmalloc
 .LVL201:
-.LBE128:
-.LBE129:
-	.loc 1 511 0
-	cbz	x0, .L138
+	mov	x24, x0
 .LVL202:
-.LBB130:
-.LBB131:
-	.loc 1 450 0
+.LBE133:
+.LBE134:
+	.loc 1 559 0
+	cbz	x0, .L157
+.LVL203:
+.LBB135:
+.LBB136:
+	.loc 1 475 0
 	adrp	x25, .LANCHOR6
 	add	x23, x25, :lo12:.LANCHOR6
 	mov	x2, 1200
 	mov	w1, 0
 	mov	x0, x23
-.LVL203:
-	bl	memset
 .LVL204:
-.LBB132:
-.LBB133:
-	.loc 1 159 0
+	bl	memset
+.LVL205:
+.LBB137:
+.LBB138:
+	.loc 1 157 0
 	adrp	x4, waveformdata
 	add	x4, x4, :lo12:waveformdata
-.LBE133:
-.LBE132:
-	.loc 1 450 0
+.LBE138:
+.LBE137:
+	.loc 1 475 0
 	mov	x3, 0
-	.loc 1 453 0
+	.loc 1 478 0
 	mov	w5, 16
-.LVL205:
-.L129:
-	mov	w2, w3
 .LVL206:
-	.loc 1 451 0
+.L148:
+	mov	w2, w3
+.LVL207:
+	.loc 1 476 0
 	cmp	w22, w3
-	bgt	.L130
-	.loc 1 456 0
+	bgt	.L149
+	.loc 1 481 0
 	mov	x2, x20
-.LVL207:
+.LVL208:
 	add	x1, x25, :lo12:.LANCHOR6
 	mov	x0, x24
 	bl	memcpy
-.LVL208:
-.LBE131:
-.LBE130:
-	.loc 1 518 0
-	str	w22, [x19]
 .LVL209:
-.LBB137:
-.LBB138:
-	.loc 1 364 0
-	lsr	w21, w21, 2
+.LBE136:
+.LBE135:
+	.loc 1 566 0
+	str	w22, [x19]
 .LVL210:
-.LBB139:
-.LBB140:
+.LBB142:
+.LBB143:
+	.loc 1 389 0
+	lsr	w21, w21, 2
+.LVL211:
+.LBB144:
+.LBB145:
 	.loc 2 58 0
 	mov	w1, 32768
 	lsl	w0, w22, 10
 	bl	kmalloc
-.LVL211:
-.LBE140:
-.LBE139:
-	.loc 1 368 0
-	cbz	x0, .L149
-	mov	x2, 0
 .LVL212:
-.L132:
-	.loc 1 371 0
-	cmp	w21, w2
-	bgt	.L136
+.LBE145:
+.LBE144:
+	.loc 1 393 0
+	cbz	x0, .L176
+	mov	x2, 0
 .LVL213:
-.L131:
-.LBE138:
-.LBE137:
-	.loc 1 520 0
-	str	x0, [x19, 8]
+.L151:
+	.loc 1 396 0
+	cmp	w21, w2
+	bgt	.L155
 .LVL214:
-.LBB143:
-.LBB144:
-	.loc 2 81 0
-	mov	x0, x24
-.LVL215:
-.L175:
-.LBE144:
+.L150:
 .LBE143:
-.LBE125:
-.LBE124:
+.LBE142:
+	.loc 1 568 0
+	str	x0, [x19, 8]
+.LVL215:
 .LBB148:
 .LBB149:
-.LBB150:
-.LBB151:
-	bl	free
+	.loc 2 81 0
+	mov	x0, x24
 .LVL216:
-	b	.L170
-.LVL217:
-.L130:
-.LBE151:
-.LBE150:
+.L204:
 .LBE149:
 .LBE148:
-.LBB165:
-.LBB147:
-.LBB145:
-.LBB136:
-	.loc 1 453 0
+.LBE130:
+.LBE129:
+.LBB153:
+.LBB154:
+.LBB155:
+.LBB156:
+	bl	free
+.LVL217:
+	b	.L200
+.LVL218:
+.L149:
+.LBE156:
+.LBE155:
+.LBE154:
+.LBE153:
+.LBB176:
+.LBB152:
+.LBB150:
+.LBB141:
+	.loc 1 478 0
 	sdiv	w1, w3, w5
-.LBB135:
-.LBB134:
-	.loc 1 159 0
+.LBB140:
+.LBB139:
+	.loc 1 157 0
 	lsl	x0, x3, 10
-.LBE134:
-.LBE135:
-	.loc 1 453 0
+.LBE139:
+.LBE140:
+	.loc 1 478 0
 	negs	w2, w2
-.LVL218:
+.LVL219:
 	and	w6, w3, 15
 	and	w2, w2, 15
 	add	x3, x3, 1
-.LVL219:
+.LVL220:
 	ldrb	w0, [x0, x4]
 	csneg	w2, w6, w2, mi
 	sxtw	x1, w1
@@ -1647,150 +1731,151 @@ pvi_wf_get_lut:
 	ldr	w0, [x23, x1, lsl 2]
 	orr	w2, w2, w0
 	str	w2, [x23, x1, lsl 2]
-	b	.L129
-.LVL220:
-.L136:
-.LBE136:
-.LBE145:
-.LBB146:
-.LBB142:
-	.loc 1 372 0
-	ldr	w6, [x24, x2, lsl 2]
+	b	.L148
 .LVL221:
+.L155:
+.LBE141:
+.LBE150:
+.LBB151:
+.LBB147:
+	.loc 1 397 0
+	ldr	w6, [x24, x2, lsl 2]
+.LVL222:
 	lsl	x7, x2, 8
 	mov	x3, 0
-.LVL222:
-.L135:
-.LBB141:
-	.loc 1 374 0
+.LVL223:
+.L154:
+.LBB146:
+	.loc 1 399 0
 	lsl	w1, w3, 1
 	mov	w4, 0
 	asr	w1, w6, w1
 	and	w1, w1, 3
-.LVL223:
-	.loc 1 375 0
-	mov	w5, w1
 .LVL224:
-.L133:
-	.loc 1 378 0
+	.loc 1 400 0
+	mov	w5, w1
+.LVL225:
+.L152:
+	.loc 1 403 0
 	lsl	w8, w1, w4
 	add	w4, w4, 2
 	orr	w5, w5, w8
-.LVL225:
-	.loc 1 377 0
+.LVL226:
+	.loc 1 402 0
 	cmp	w4, 32
-	bne	.L133
+	bne	.L152
 	add	x4, x7, x3, lsl 4
 	mov	x1, 0
-.LVL226:
-	add	x4, x0, x4, lsl 2
 .LVL227:
-.L134:
-	.loc 1 381 0
-	str	w5, [x4, x1, lsl 2]
+	add	x4, x0, x4, lsl 2
 .LVL228:
-	add	x1, x1, 1
+.L153:
+	.loc 1 406 0
+	str	w5, [x4, x1, lsl 2]
 .LVL229:
-	.loc 1 380 0
-	cmp	x1, 16
-	bne	.L134
+	add	x1, x1, 1
 .LVL230:
-	add	x3, x3, 1
+	.loc 1 405 0
+	cmp	x1, 16
+	bne	.L153
 .LVL231:
-.LBE141:
-	.loc 1 373 0
-	cmp	x3, 16
-	bne	.L135
+	add	x3, x3, 1
 .LVL232:
-	add	x2, x2, 1
+.LBE146:
+	.loc 1 398 0
+	cmp	x3, 16
+	bne	.L154
 .LVL233:
-	b	.L132
+	add	x2, x2, 1
 .LVL234:
-.L149:
-	.loc 1 369 0
-	mov	x0, 0
-	b	.L131
+	b	.L151
 .LVL235:
-.L118:
-.LBE142:
-.LBE146:
+.L176:
+	.loc 1 394 0
+	mov	x0, 0
+	b	.L150
+.LVL236:
+.L136:
 .LBE147:
-.LBE165:
-.LBB166:
-.LBB167:
-	.loc 1 558 0
+.LBE151:
+.LBE152:
+.LBE176:
+.LBB177:
+.LBB178:
+	.loc 1 624 0
 	mov	w0, 2
 	bl	get_wf_mode_index
-.LVL236:
-	.loc 1 559 0
+.LVL237:
+	.loc 1 625 0
 	mov	w1, w20
+	mov	w2, 16
 	bl	get_wf_frm_num
-.LVL237:
-	mov	w20, w0
 .LVL238:
-	.loc 1 561 0
-	str	w20, [x19]
+	mov	w20, w0
 .LVL239:
-	.loc 1 562 0
-	lsl	w0, w0, 6
+	.loc 1 627 0
+	str	w20, [x19]
 .LVL240:
-.LBB168:
-.LBB169:
+	.loc 1 628 0
+	lsl	w0, w0, 6
+.LVL241:
+.LBB179:
+.LBB180:
 	.loc 2 58 0
 	mov	w1, 32768
 	sxtw	x0, w0
-.LVL241:
-	bl	kmalloc
 .LVL242:
-.LBE169:
-.LBE168:
-	.loc 1 562 0
-	str	x0, [x19, 8]
-	.loc 1 563 0
-	cbnz	x0, .L137
+	bl	kmalloc
 .LVL243:
-.L138:
-.LBE167:
-.LBE166:
-	.loc 1 733 0
-	mov	w0, -1
-	b	.L109
+.LBE180:
+.LBE179:
+	.loc 1 628 0
+	str	x0, [x19, 8]
+	.loc 1 629 0
+	cbnz	x0, .L156
 .LVL244:
-.L137:
-.LBB171:
-.LBB170:
-	.loc 1 566 0
-	mov	w1, w20
+.L157:
+.LBE178:
+.LBE177:
+	.loc 1 799 0
+	mov	w0, -1
+	b	.L127
 .LVL245:
-.L173:
-.LBE170:
-.LBE171:
-.LBB172:
-.LBB173:
-	.loc 1 605 0
-	bl	get_lut_gray8_data.isra.3
+.L156:
+.LBB182:
+.LBB181:
+	.loc 1 632 0
+	mov	w1, w20
 .LVL246:
-	b	.L170
+.L205:
+.LBE181:
+.LBE182:
+.LBB183:
+.LBB184:
+	.loc 1 671 0
+	bl	get_lut_gray16_data
 .LVL247:
-.L123:
-.LBE173:
-.LBE172:
-	.loc 1 691 0
+	b	.L200
+.LVL248:
+.L141:
+.LBE184:
+.LBE183:
+	.loc 1 757 0
 	mov	w2, 7
-.L174:
-	.loc 1 715 0
+.L203:
+	.loc 1 781 0
 	mov	w1, w20
 	mov	x0, x19
 	bl	parse_wf_gray16_with_lut_type
-.LVL248:
-.L172:
-	.loc 1 738 0
+.LVL249:
+.L202:
+	.loc 1 804 0
 	cmp	w0, 0
 	csetm	w0, ne
-.L109:
-	.loc 1 747 0
+.LVL250:
+.L127:
+	.loc 1 817 0
 	ldp	x19, x20, [sp, 16]
-.LVL249:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
@@ -1807,374 +1892,560 @@ pvi_wf_get_lut:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL250:
-.L124:
+.LVL251:
+.L142:
 	.cfi_restore_state
-	.loc 1 697 0
+	.loc 1 763 0
 	mov	w2, 8
-	b	.L174
-.L125:
-	.loc 1 703 0
+	b	.L203
+.L143:
+	.loc 1 769 0
 	mov	w2, 9
-	b	.L174
-.L126:
-	.loc 1 709 0
+	b	.L203
+.L144:
+	.loc 1 775 0
 	mov	w2, 10
-	b	.L174
-.L127:
-	.loc 1 715 0
+	b	.L203
+.L145:
+	.loc 1 781 0
 	mov	w2, 11
-	b	.L174
-.L119:
-	.loc 1 721 0
+	b	.L203
+.L137:
+	.loc 1 787 0
 	adrp	x0, .LC4
 	add	x0, x0, :lo12:.LC4
 	bl	printf
-.LVL251:
-.L170:
-	.loc 1 746 0
-	mov	w0, 0
-	b	.L109
 .LVL252:
-.L121:
-.LBB177:
-.LBB164:
-	.loc 1 617 0
+.L200:
+	.loc 1 816 0
+	mov	w0, 0
+	b	.L127
+.LVL253:
+.L139:
+.LBB188:
+.LBB173:
+	.loc 1 683 0
 	mov	w0, 5
 	bl	get_wf_mode_index
-.LVL253:
-	.loc 1 618 0
+.LVL254:
+	.loc 1 684 0
+	mov	w2, 16
 	mov	w1, w20
 	bl	get_wf_frm_num
-.LVL254:
-	mov	w21, w0
 .LVL255:
-	.loc 1 620 0
-	str	w21, [x19]
+	mov	w21, w0
 .LVL256:
-	.loc 1 621 0
-	lsl	w0, w0, 6
+	.loc 1 686 0
+	str	w21, [x19]
 .LVL257:
-.LBB153:
-.LBB154:
+	.loc 1 687 0
+	lsl	w0, w0, 6
+.LVL258:
+.LBB158:
+.LBB159:
 	.loc 2 58 0
 	mov	w1, 32768
 	sxtw	x0, w0
-.LVL258:
-	bl	kmalloc
 .LVL259:
-.LBE154:
-.LBE153:
-	.loc 1 621 0
+	bl	kmalloc
+.LVL260:
+.LBE159:
+.LBE158:
+	.loc 1 687 0
 	str	x0, [x19, 8]
-	.loc 1 622 0
-	cbz	x0, .L138
-	.loc 1 625 0
+	.loc 1 688 0
+	cbz	x0, .L157
+	.loc 1 691 0
 	mov	w1, w21
-	bl	get_lut_gray8_data.isra.3
-.LVL260:
-	.loc 1 628 0
+	bl	get_lut_gray16_data
+.LVL261:
+	.loc 1 694 0
 	mov	w0, 4
 	bl	get_wf_mode_index
-.LVL261:
-	.loc 1 629 0
+.LVL262:
+	.loc 1 695 0
 	mov	w1, w20
+	mov	w2, 16
 	bl	get_wf_frm_num
-.LVL262:
-	mov	w20, w0
 .LVL263:
-	.loc 1 632 0
-	ldr	w0, [x19]
+	mov	w20, w0
 .LVL264:
-.LBB155:
-.LBB156:
+	.loc 1 698 0
+	ldr	w0, [x19]
+.LVL265:
+.LBB160:
+.LBB161:
 	.loc 2 58 0
 	mov	w1, 32768
-.LBE156:
-.LBE155:
-	.loc 1 632 0
+.LBE161:
+.LBE160:
+	.loc 1 698 0
 	orr	w0, w0, w20, lsl 8
 	str	w0, [x19]
-.LVL265:
-	.loc 1 634 0
+.LVL266:
+	.loc 1 700 0
 	lsl	w0, w20, 3
-.LBB158:
-.LBB157:
+.LBB163:
+.LBB162:
 	.loc 2 58 0
 	sxtw	x0, w0
-.LVL266:
-	bl	kmalloc
 .LVL267:
-	mov	x21, x0
+	bl	kmalloc
 .LVL268:
-.LBE157:
-.LBE158:
-	.loc 1 635 0
-	cbz	x0, .L138
-	.loc 1 638 0
-	mov	w1, w20
-	bl	get_lut_gray2_data.isra.4
+	mov	x21, x0
 .LVL269:
+.LBE162:
+.LBE163:
+	.loc 1 701 0
+	cbz	x0, .L157
+	.loc 1 704 0
+	mov	w1, w20
+	bl	get_lut_gray2_data
+.LVL270:
 	mov	x0, 4
 	ldr	x3, [x19, 8]
-.LVL270:
-	add	x20, x0, x20, uxtw 3
 .LVL271:
+	add	x20, x0, x20, uxtw 3
+.LVL272:
 	add	x2, x21, 4
 	add	x20, x21, x20
-.LVL272:
-.L139:
-.LBB159:
-.LBB160:
-	.loc 1 431 0
-	cmp	x20, x2
-	bne	.L141
 .LVL273:
-.LBE160:
-.LBE159:
-.LBB162:
-.LBB152:
+.L158:
+.LBB164:
+.LBB165:
+	.loc 1 456 0
+	cmp	x2, x20
+	bne	.L160
+.LVL274:
+.LBE165:
+.LBE164:
+.LBB169:
+.LBB157:
 	.loc 2 81 0
 	mov	x0, x21
-	b	.L175
-.LVL274:
-.L141:
-.LBE152:
-.LBE162:
-.LBB163:
-.LBB161:
-	.loc 1 433 0
-	ldp	w7, w6, [x2, -4]
+	b	.L204
 .LVL275:
-	mov	x1, 0
+.L160:
+.LBE157:
+.LBE169:
+.LBB170:
+.LBB166:
+	.loc 1 458 0
+	ldp	w7, w6, [x2, -4]
 .LVL276:
-.L140:
-	.loc 1 435 0
-	ldr	w0, [x3, x1, lsl 2]
+	mov	x1, 0
 .LVL277:
-	.loc 1 436 0
-	and	w4, w0, 1073741820
+.L159:
+	.loc 1 460 0
+	ldr	w0, [x3, x1, lsl 2]
 .LVL278:
-	lsl	w0, w1, 1
+	.loc 1 461 0
+	and	w4, w0, 1073741820
 .LVL279:
-	.loc 1 437 0
+	lsl	w0, w1, 1
+.LVL280:
+	.loc 1 462 0
 	asr	w5, w7, w0
 	and	w5, w5, 3
-	.loc 1 438 0
+	.loc 1 463 0
 	asr	w0, w6, w0
-.LVL280:
-	.loc 1 437 0
+.LVL281:
+	.loc 1 462 0
 	orr	w0, w5, w0, lsl 30
 	orr	w0, w0, w4
-	.loc 1 439 0
+	.loc 1 464 0
 	str	w0, [x3, x1, lsl 2]
-.LVL281:
-	add	x1, x1, 1
 .LVL282:
-	.loc 1 434 0
+	add	x1, x1, 1
+.LVL283:
+	.loc 1 459 0
 	cmp	x1, 16
-	bne	.L140
+	bne	.L159
 	add	x3, x3, 64
-.LVL283:
-	add	x2, x2, 8
 .LVL284:
-	b	.L139
+	add	x2, x2, 8
 .LVL285:
-.L122:
-.LBE161:
-.LBE163:
-.LBE164:
-.LBE177:
-.LBB178:
-.LBB176:
-	.loc 1 594 0
+	b	.L158
+.LVL286:
+.L140:
+.LBE166:
+.LBE170:
+.LBE173:
+.LBE188:
+.LBB189:
+.LBB187:
+	.loc 1 660 0
 	mov	w0, 6
 	bl	get_wf_mode_index
-.LVL286:
-	.loc 1 595 0
+.LVL287:
+	.loc 1 661 0
+	mov	w2, 16
 	mov	w1, w20
 	bl	get_wf_frm_num
-.LVL287:
-	mov	w21, w0
 .LVL288:
-	.loc 1 597 0
-	cmp	w0, 0
-	bgt	.L142
+	mov	w21, w0
 .LVL289:
-.L171:
-	.loc 1 598 0
+	.loc 1 663 0
+	cmp	w0, 0
+	bgt	.L161
+.LVL290:
+.L201:
+	.loc 1 664 0
 	mov	w1, w20
 	mov	x0, x19
 	bl	parse_wf_gray2
-.LVL290:
-	b	.L172
 .LVL291:
-.L142:
-	.loc 1 600 0
-	str	w21, [x19]
+	b	.L202
 .LVL292:
-	.loc 1 601 0
-	lsl	w0, w0, 6
+.L161:
+	.loc 1 666 0
+	str	w21, [x19]
 .LVL293:
-.LBB174:
-.LBB175:
+	.loc 1 667 0
+	lsl	w0, w0, 6
+.LVL294:
+.LBB185:
+.LBB186:
 	.loc 2 58 0
 	mov	w1, 32768
 	sxtw	x0, w0
 	bl	kmalloc
-.LVL294:
-.LBE175:
-.LBE174:
-	.loc 1 601 0
+.LVL295:
+.LBE186:
+.LBE185:
+	.loc 1 667 0
 	str	x0, [x19, 8]
-	.loc 1 602 0
-	cbz	x0, .L138
-	.loc 1 605 0
+	.loc 1 668 0
+	cbz	x0, .L157
+	.loc 1 671 0
 	mov	w1, w21
-	b	.L173
-.LVL295:
-.L144:
-	.cfi_def_cfa 31, 0
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 25
-	.cfi_restore 29
-	.cfi_restore 30
-.LBE176:
-.LBE178:
-	.loc 1 656 0
-	mov	w0, -19
+	b	.L205
 .LVL296:
-	ret
-.LVL297:
-.L145:
-	.loc 1 659 0
-	mov	w0, -22
-.LVL298:
-	ret
-.LVL299:
 .L146:
-	.loc 1 663 0
-	mov	w0, 0
+.LBE187:
+.LBE189:
+.LBB190:
+.LBB191:
+	.loc 1 606 0
+	mov	w0, 7
+	bl	get_wf_mode_index
+.LVL297:
+	.loc 1 607 0
+	mov	w1, w20
+	mov	w2, 32
+	bl	get_wf_frm_num
+.LVL298:
+	mov	w23, w0
+.LVL299:
+	.loc 1 610 0
+	lsl	w20, w0, 8
 .LVL300:
+	.loc 1 609 0
+	str	w23, [x19]
+	.loc 1 610 0
+	sxtw	x20, w20
+.LVL301:
+.LBB192:
+.LBB193:
+	.loc 2 58 0
+	mov	w1, 32768
+	mov	x0, x20
+.LVL302:
+	bl	kmalloc
+.LVL303:
+.LBE193:
+.LBE192:
+	.loc 1 610 0
+	str	x0, [x19, 8]
+.LBB195:
+.LBB194:
+	.loc 2 58 0
+	mov	x22, x0
+.LVL304:
+.LBE194:
+.LBE195:
+	.loc 1 611 0
+	cbz	x0, .L157
+.LVL305:
+.LBB196:
+.LBB197:
+	.loc 1 511 0
+	adrp	x21, gray32_data
+.LVL306:
+	mov	x2, 11264
+	add	x19, x21, :lo12:gray32_data
+.LVL307:
+	mov	w1, 0
+	movk	x2, 0x1, lsl 16
+	mov	x0, x19
+.LVL308:
+	bl	memset
+.LVL309:
+	adrp	x5, waveformdata
+	add	x5, x5, :lo12:waveformdata
+	mov	w1, -32
+	mov	x3, 0
+.LVL310:
+.L163:
+	lsl	w12, w3, 1
+.LBE197:
+.LBE196:
+.LBE191:
+.LBE190:
+.LBB208:
+.LBB174:
+.LBB171:
+.LBB167:
+	.loc 1 458 0
+	mov	x2, 0
+	b	.L170
+.LVL311:
+.L166:
+.LBE167:
+.LBE171:
+.LBE174:
+.LBE208:
+.LBB209:
+.LBB206:
+.LBB204:
+.LBB202:
+.LBB198:
+.LBB199:
+	.loc 1 157 0
+	lsl	x4, x0, 2
+	add	x11, x0, x19
+.LBE199:
+.LBE198:
+	.loc 1 516 0
+	cmp	x3, 15
+.LBB201:
+.LBB200:
+	.loc 1 157 0
+	ldrb	w4, [x7, x4]
+.LVL312:
+.LBE200:
+.LBE201:
+	.loc 1 516 0
+	bhi	.L164
+	.loc 1 517 0
+	ldr	w8, [x11, x2]
+	lsl	w4, w4, w12
+	orr	w4, w8, w4
+	str	w4, [x11, x2]
+.L165:
+	.loc 1 514 0
+	add	w6, w6, 1
+.LVL313:
+	add	x0, x0, 256
+.LVL314:
+.L168:
+	cmp	w23, w6
+	bgt	.L166
+	add	x2, x2, 8
+	.loc 1 513 0
+	cmp	x2, 256
+	beq	.L167
+.LVL315:
+.L170:
+	add	x7, x3, x2, lsl 2
+.LBE202:
+.LBE204:
+.LBE206:
+.LBE209:
+.LBB210:
+.LBB175:
+.LBB172:
+.LBB168:
+	.loc 1 458 0
+	mov	x0, 0
+	add	x7, x7, x5
+	mov	w6, 0
+	add	x10, x2, 4
+	b	.L168
+.LVL316:
+.L164:
+.LBE168:
+.LBE172:
+.LBE175:
+.LBE210:
+.LBB211:
+.LBB207:
+.LBB205:
+.LBB203:
+	.loc 1 520 0
+	ldr	w8, [x11, x10]
+	lsl	w4, w4, w1
+	orr	w4, w8, w4
+	str	w4, [x11, x10]
+	b	.L165
+.L167:
+.LVL317:
+	add	x3, x3, 1
+.LVL318:
+	add	w1, w1, 2
+	.loc 1 512 0
+	cmp	x3, 32
+	bne	.L163
+	.loc 1 526 0
+	mov	x2, x20
+	add	x1, x21, :lo12:gray32_data
+	mov	x0, x22
+	bl	memcpy
+.LVL319:
+	b	.L200
+.LVL320:
+.L171:
+	.cfi_def_cfa 31, 0
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 25
+	.cfi_restore 29
+	.cfi_restore 30
+.LBE203:
+.LBE205:
+.LBE207:
+.LBE211:
+	.loc 1 722 0
+	mov	w0, -19
+.LVL321:
+	ret
+.LVL322:
+.L172:
+	.loc 1 725 0
+	mov	w0, -22
+.LVL323:
+	ret
+.LVL324:
+.L173:
+	.loc 1 729 0
+	mov	w0, 0
+.LVL325:
 	ret
 	.cfi_endproc
-.LFE232:
+.LFE230:
 	.size	pvi_wf_get_lut, .-pvi_wf_get_lut
 	.section	.text.pvi_wf_input,"ax",@progbits
 	.align	2
 	.global	pvi_wf_input
 	.type	pvi_wf_input, %function
 pvi_wf_input:
-.LFB233:
-	.loc 1 756 0
+.LFB231:
+	.loc 1 827 0
 	.cfi_startproc
-.LVL301:
-	.loc 1 759 0
+.LVL326:
+	.loc 1 830 0
 	adrp	x1, .LANCHOR0
 	ldr	x3, [x1, #:lo12:.LANCHOR0]
-	cbnz	x3, .L181
+	cbnz	x3, .L212
 	mov	x2, x1
-	.loc 1 763 0
+	.loc 1 834 0
 	ldrb	w1, [x0, 16]
 	cmp	w1, 25
-	bhi	.L179
+	bhi	.L209
 	cmp	w1, 24
-	bcs	.L180
+	bcs	.L210
 	cmp	w1, 18
-.L198:
-	beq	.L180
-	.loc 1 756 0
+	beq	.L210
+	cmp	w1, 22
+	beq	.L210
+	cmp	w1, 9
+.L237:
+	beq	.L210
+	.loc 1 827 0
 	stp	x29, x30, [sp, -16]!
 	.cfi_def_cfa_offset 16
 	.cfi_offset 29, -16
 	.cfi_offset 30, -8
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	.loc 1 772 0
+	.loc 1 846 0
 	ldrb	w2, [x0, 22]
 	adrp	x0, .LC5
-.LVL302:
+.LVL327:
 	add	x0, x0, :lo12:.LC5
 	bl	printf
-.LVL303:
-	.loc 1 774 0
+.LVL328:
+	.loc 1 848 0
 	mov	w0, -8
-	.loc 1 780 0
+	.loc 1 854 0
 	ldp	x29, x30, [sp], 16
 	.cfi_restore 30
 	.cfi_restore 29
 	.cfi_def_cfa 31, 0
 	ret
-.LVL304:
-.L179:
-	.loc 1 763 0
+.LVL329:
+.L209:
+	.loc 1 834 0
 	cmp	w1, 35
-	beq	.L180
-	cmp	w1, 84
-	beq	.L180
+	beq	.L210
+	bhi	.L211
 	cmp	w1, 32
-	b	.L198
-.L180:
-	.loc 1 777 0
+	b	.L237
+.L211:
+	cmp	w1, 67
+	beq	.L210
+	cmp	w1, 84
+	b	.L237
+.L210:
+	.loc 1 851 0
 	str	x0, [x2, #:lo12:.LANCHOR0]
-	.loc 1 779 0
+	.loc 1 853 0
 	mov	w0, 0
-.LVL305:
+.LVL330:
 	ret
-.LVL306:
-.L181:
-	.loc 1 760 0
+.LVL331:
+.L212:
+	.loc 1 831 0
 	mov	w0, -16
-.LVL307:
+.LVL332:
 	ret
 	.cfi_endproc
-.LFE233:
+.LFE231:
 	.size	pvi_wf_input, .-pvi_wf_input
 	.section	.text.pvi_wf_get_version,"ax",@progbits
 	.align	2
 	.global	pvi_wf_get_version
 	.type	pvi_wf_get_version, %function
 pvi_wf_get_version:
-.LFB234:
-	.loc 1 789 0
+.LFB232:
+	.loc 1 864 0
 	.cfi_startproc
-	.loc 1 790 0
+	.loc 1 865 0
 	adrp	x0, .LANCHOR0
 	ldr	x2, [x0, #:lo12:.LANCHOR0]
-.LVL308:
-	.loc 1 794 0
-	cbz	x2, .L202
-	.loc 1 798 0 discriminator 3
+.LVL333:
+	.loc 1 869 0
+	cbz	x2, .L242
+	.loc 1 873 0 discriminator 3
 	adrp	x0, .LANCHOR7
 	add	x0, x0, :lo12:.LANCHOR7
 	mov	x1, 0
-.L201:
-.LVL309:
+.L241:
+.LVL334:
 	add	x3, x2, x1
 	ldrb	w3, [x3, 65]
 	strb	w3, [x1, x0]
-.LVL310:
+.LVL335:
 	add	x1, x1, 1
-.LVL311:
-	.loc 1 797 0 discriminator 3
+.LVL336:
+	.loc 1 872 0 discriminator 3
 	cmp	x1, 31
-	bne	.L201
-	.loc 1 800 0
+	bne	.L241
+	.loc 1 875 0
 	strb	wzr, [x0, 31]
-	.loc 1 802 0
+	.loc 1 877 0
 	ret
-.L202:
-	.loc 1 795 0
+.L242:
+	.loc 1 870 0
 	mov	x0, 0
-	.loc 1 803 0
+	.loc 1 878 0
 	ret
 	.cfi_endproc
-.LFE234:
+.LFE232:
 	.size	pvi_wf_get_version, .-pvi_wf_get_version
 	.section	.bss.global_waveform,"aw",@nobits
 	.align	3
@@ -2183,6 +2454,12 @@ pvi_wf_get_version:
 	.size	global_waveform, 8
 global_waveform:
 	.zero	8
+	.section	.bss.gray32_data,"aw",@nobits
+	.align	3
+	.type	gray32_data, %object
+	.size	gray32_data, 76800
+gray32_data:
+	.zero	76800
 	.section	.bss.gray_2_data,"aw",@nobits
 	.align	3
 	.set	.LANCHOR2,. + 0
@@ -2196,12 +2473,12 @@ gray_2_data:
 	.size	gray_data, 19200
 gray_data:
 	.zero	19200
-	.section	.bss.pvi_modes.5987,"aw",@nobits
+	.section	.bss.pvi_modes.5991,"aw",@nobits
 	.align	3
 	.set	.LANCHOR1,. + 0
-	.type	pvi_modes.5987, %object
-	.size	pvi_modes.5987, 36
-pvi_modes.5987:
+	.type	pvi_modes.5991, %object
+	.size	pvi_modes.5991, 36
+pvi_modes.5991:
 	.zero	36
 	.section	.bss.reset_data,"aw",@nobits
 	.align	3
@@ -2210,12 +2487,12 @@ pvi_modes.5987:
 	.size	reset_data, 1200
 reset_data:
 	.zero	1200
-	.section	.bss.spi_id_buffer.6229,"aw",@nobits
+	.section	.bss.spi_id_buffer.6260,"aw",@nobits
 	.align	3
 	.set	.LANCHOR7,. + 0
-	.type	spi_id_buffer.6229, %object
-	.size	spi_id_buffer.6229, 32
-spi_id_buffer.6229:
+	.type	spi_id_buffer.6260, %object
+	.size	spi_id_buffer.6260, 32
+spi_id_buffer.6260:
 	.zero	32
 	.section	.bss.waveformdata,"aw",@nobits
 	.align	3
@@ -2223,26 +2500,26 @@ spi_id_buffer.6229:
 	.size	waveformdata, 524288
 waveformdata:
 	.zero	524288
-	.section	.data.sftemp.6197,"aw",@progbits
+	.section	.data.sftemp.6224,"aw",@progbits
 	.align	2
 	.set	.LANCHOR4,. + 0
-	.type	sftemp.6197, %object
-	.size	sftemp.6197, 4
-sftemp.6197:
+	.type	sftemp.6224, %object
+	.size	sftemp.6224, 4
+sftemp.6224:
 	.word	-1
-	.section	.data.stype.6196,"aw",@progbits
+	.section	.data.stype.6223,"aw",@progbits
 	.align	2
 	.set	.LANCHOR5,. + 0
-	.type	stype.6196, %object
-	.size	stype.6196, 4
-stype.6196:
+	.type	stype.6223, %object
+	.size	stype.6223, 4
+stype.6223:
 	.word	13
-	.section	.rodata.__func__.6033,"a",@progbits
+	.section	.rodata.__func__.6041,"a",@progbits
 	.align	3
 	.set	.LANCHOR3,. + 0
-	.type	__func__.6033, %object
-	.size	__func__.6033, 15
-__func__.6033:
+	.type	__func__.6041, %object
+	.size	__func__.6041, 15
+__func__.6041:
 	.string	"get_wf_frm_num"
 	.section	.rodata.decodewaveform.str1.1,"aMS",@progbits,1
 .LC2:
@@ -2288,16 +2565,16 @@ __func__.6033:
 	.file 25 "include/log.h"
 	.section	.debug_info,"",@progbits
 .Ldebug_info0:
-	.4byte	0x2725
+	.4byte	0x2766
 	.2byte	0x4
 	.4byte	.Ldebug_abbrev0
 	.byte	0x8
 	.uleb128 0x1
-	.4byte	.LASF418
+	.4byte	.LASF411
 	.byte	0xc
-	.4byte	.LASF419
-	.4byte	.LASF420
-	.4byte	.Ldebug_ranges0+0x330
+	.4byte	.LASF412
+	.4byte	.LASF413
+	.4byte	.Ldebug_ranges0+0x450
 	.8byte	0
 	.4byte	.Ldebug_line0
 	.uleb128 0x2
@@ -2598,7 +2875,7 @@ __func__.6033:
 	.2byte	0x1ff
 	.byte	0
 	.uleb128 0x17
-	.4byte	.LASF421
+	.4byte	.LASF414
 	.uleb128 0x8
 	.byte	0x8
 	.4byte	0x297
@@ -3332,12 +3609,12 @@ __func__.6033:
 	.2byte	0x198
 	.4byte	0x88f
 	.uleb128 0x24
-	.4byte	.LASF280
+	.4byte	.LASF269
 	.byte	0x4
 	.4byte	0x54
 	.byte	0x15
 	.byte	0xe
-	.4byte	0xaf2
+	.4byte	0xaf8
 	.uleb128 0x25
 	.4byte	.LASF140
 	.byte	0
@@ -3620,8 +3897,11 @@ __func__.6033:
 	.uleb128 0x25
 	.4byte	.LASF233
 	.byte	0x5d
-	.uleb128 0x26
+	.uleb128 0x25
 	.4byte	.LASF234
+	.byte	0x5e
+	.uleb128 0x26
+	.4byte	.LASF235
 	.sleb128 -1
 	.byte	0
 	.uleb128 0x27
@@ -3629,61 +3909,61 @@ __func__.6033:
 	.4byte	0x84
 	.byte	0x19
 	.byte	0xf6
-	.4byte	0xb05
+	.4byte	0xb0b
 	.uleb128 0x25
-	.4byte	.LASF235
+	.4byte	.LASF236
 	.byte	0x5
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xec
-	.4byte	0xb15
+	.4byte	0xb1b
 	.uleb128 0xe
 	.4byte	0xdf
 	.byte	0x1f
 	.byte	0
 	.uleb128 0x4
-	.4byte	.LASF236
+	.4byte	.LASF237
 	.byte	0x3
 	.byte	0xad
 	.4byte	0x126
 	.uleb128 0xa
 	.4byte	0x99
-	.4byte	0xb2b
+	.4byte	0xb31
 	.uleb128 0xb
 	.byte	0
 	.uleb128 0x4
-	.4byte	.LASF237
+	.4byte	.LASF238
 	.byte	0x3
 	.byte	0xaf
-	.4byte	0xb20
+	.4byte	0xb26
 	.uleb128 0x4
-	.4byte	.LASF238
+	.4byte	.LASF239
 	.byte	0x3
 	.byte	0xb0
-	.4byte	0xb20
+	.4byte	0xb26
 	.uleb128 0x4
-	.4byte	.LASF239
+	.4byte	.LASF240
 	.byte	0x3
 	.byte	0xfe
 	.4byte	0x126
 	.uleb128 0x4
-	.4byte	.LASF240
+	.4byte	.LASF241
 	.byte	0x3
 	.byte	0xff
 	.4byte	0x126
 	.uleb128 0xc
-	.4byte	.LASF241
+	.4byte	.LASF242
 	.byte	0x3
 	.2byte	0x100
 	.4byte	0x126
 	.uleb128 0xf
-	.4byte	.LASF242
+	.4byte	.LASF243
 	.byte	0x4
 	.byte	0x14
 	.byte	0x2e
-	.4byte	0xb7c
+	.4byte	0xb82
 	.uleb128 0x10
-	.4byte	.LASF243
+	.4byte	.LASF244
 	.byte	0x14
 	.byte	0x2f
 	.4byte	0x13c
@@ -3692,354 +3972,219 @@ __func__.6033:
 	.uleb128 0x8
 	.byte	0x8
 	.4byte	0x29
-	.uleb128 0xf
-	.4byte	.LASF244
-	.byte	0x68
-	.byte	0x14
-	.byte	0xa6
-	.4byte	0xc1f
-	.uleb128 0x10
-	.4byte	.LASF30
-	.byte	0x14
-	.byte	0xa8
-	.4byte	0xc1f
-	.byte	0
-	.uleb128 0x10
-	.4byte	.LASF245
-	.byte	0x14
-	.byte	0xa9
-	.4byte	0x1b2
-	.byte	0x10
-	.uleb128 0x10
-	.4byte	.LASF246
-	.byte	0x14
-	.byte	0xaa
-	.4byte	0xc9
-	.byte	0x18
-	.uleb128 0x10
-	.4byte	.LASF137
-	.byte	0x14
-	.byte	0xab
-	.4byte	0x54
-	.byte	0x20
-	.uleb128 0x10
-	.4byte	.LASF247
-	.byte	0x14
-	.byte	0xad
-	.4byte	0xc49
-	.byte	0x28
-	.uleb128 0x10
-	.4byte	.LASF248
-	.byte	0x14
-	.byte	0xae
-	.4byte	0xc68
-	.byte	0x30
-	.uleb128 0x10
-	.4byte	.LASF249
-	.byte	0x14
-	.byte	0xaf
-	.4byte	0xc7d
-	.byte	0x38
-	.uleb128 0x10
-	.4byte	.LASF250
-	.byte	0x14
-	.byte	0xb0
-	.4byte	0xc8e
-	.byte	0x40
-	.uleb128 0x10
-	.4byte	.LASF251
-	.byte	0x14
-	.byte	0xb4
-	.4byte	0xc7d
-	.byte	0x48
-	.uleb128 0x10
-	.4byte	.LASF252
-	.byte	0x14
-	.byte	0xb5
-	.4byte	0xc43
-	.byte	0x50
-	.uleb128 0x10
-	.4byte	.LASF253
-	.byte	0x14
-	.byte	0xb6
-	.4byte	0x54
-	.byte	0x58
-	.uleb128 0x10
-	.4byte	.LASF254
-	.byte	0x14
-	.byte	0xb7
-	.4byte	0x152
-	.byte	0x60
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xec
-	.4byte	0xc2f
-	.uleb128 0xe
-	.4byte	0xdf
-	.byte	0xf
-	.byte	0
-	.uleb128 0x11
-	.4byte	0x54
-	.4byte	0xc43
-	.uleb128 0x12
-	.4byte	0xc43
-	.uleb128 0x12
-	.4byte	0x889
-	.byte	0
-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0xb82
-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0xc2f
-	.uleb128 0x11
-	.4byte	0x54
-	.4byte	0xc68
-	.uleb128 0x12
-	.4byte	0xc43
-	.uleb128 0x12
-	.4byte	0x152
-	.uleb128 0x12
-	.4byte	0x54
-	.byte	0
-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0xc4f
-	.uleb128 0x11
-	.4byte	0x54
-	.4byte	0xc7d
-	.uleb128 0x12
-	.4byte	0xc43
-	.byte	0
-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0xc6e
-	.uleb128 0x28
-	.4byte	0xc8e
-	.uleb128 0x12
-	.4byte	0xc43
-	.byte	0
-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0xc83
-	.uleb128 0x4
-	.4byte	.LASF255
-	.byte	0x14
-	.byte	0xbd
-	.4byte	0xc43
 	.uleb128 0x28
-	.4byte	0xcaf
+	.4byte	0xb98
 	.uleb128 0x12
 	.4byte	0x152
 	.uleb128 0x12
 	.4byte	0x54
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF256
+	.4byte	.LASF245
 	.byte	0x14
 	.2byte	0x11e
-	.4byte	0xcbb
+	.4byte	0xba4
 	.uleb128 0x8
 	.byte	0x8
-	.4byte	0xc9f
+	.4byte	0xb88
 	.uleb128 0xa
 	.4byte	0x99
-	.4byte	0xcd1
+	.4byte	0xbba
 	.uleb128 0xe
 	.4byte	0xdf
 	.byte	0x5
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF257
+	.4byte	.LASF246
 	.byte	0x14
 	.2byte	0x1fd
-	.4byte	0xb63
+	.4byte	0xb69
 	.uleb128 0xc
-	.4byte	.LASF258
+	.4byte	.LASF247
 	.byte	0x14
 	.2byte	0x1fe
-	.4byte	0xb63
+	.4byte	0xb69
 	.uleb128 0xc
-	.4byte	.LASF259
+	.4byte	.LASF248
 	.byte	0x14
 	.2byte	0x200
-	.4byte	0xb63
+	.4byte	0xb69
 	.uleb128 0xc
-	.4byte	.LASF260
+	.4byte	.LASF249
 	.byte	0x14
 	.2byte	0x205
-	.4byte	0xb05
+	.4byte	0xb0b
 	.uleb128 0xc
-	.4byte	.LASF261
+	.4byte	.LASF250
 	.byte	0x14
 	.2byte	0x206
-	.4byte	0xb05
+	.4byte	0xb0b
 	.uleb128 0xa
 	.4byte	0xec
-	.4byte	0xd1d
+	.4byte	0xc06
 	.uleb128 0xe
 	.4byte	0xdf
 	.byte	0x3f
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF262
+	.4byte	.LASF251
 	.byte	0x14
 	.2byte	0x207
-	.4byte	0xd0d
+	.4byte	0xbf6
 	.uleb128 0xc
-	.4byte	.LASF263
+	.4byte	.LASF252
 	.byte	0x14
 	.2byte	0x209
-	.4byte	0xcc1
+	.4byte	0xbaa
 	.uleb128 0xc
-	.4byte	.LASF264
+	.4byte	.LASF253
 	.byte	0x14
 	.2byte	0x20a
-	.4byte	0xcc1
+	.4byte	0xbaa
 	.uleb128 0xc
-	.4byte	.LASF265
+	.4byte	.LASF254
 	.byte	0x14
 	.2byte	0x20b
-	.4byte	0xb63
+	.4byte	0xb69
 	.uleb128 0xc
-	.4byte	.LASF266
+	.4byte	.LASF255
 	.byte	0x14
 	.2byte	0x20c
-	.4byte	0xb63
+	.4byte	0xb69
 	.uleb128 0xc
-	.4byte	.LASF267
+	.4byte	.LASF256
 	.byte	0x14
 	.2byte	0x20d
-	.4byte	0xb7c
+	.4byte	0xb82
 	.uleb128 0xa
-	.4byte	0xb7c
-	.4byte	0xd75
+	.4byte	0xb82
+	.4byte	0xc5e
 	.uleb128 0xe
 	.4byte	0xdf
 	.byte	0x3
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF268
+	.4byte	.LASF257
 	.byte	0x14
 	.2byte	0x20e
-	.4byte	0xd65
+	.4byte	0xc4e
 	.uleb128 0xc
-	.4byte	.LASF269
+	.4byte	.LASF258
 	.byte	0x14
 	.2byte	0x20f
-	.4byte	0xb7c
+	.4byte	0xb82
 	.uleb128 0xc
-	.4byte	.LASF270
+	.4byte	.LASF259
 	.byte	0x14
 	.2byte	0x210
 	.4byte	0x54
 	.uleb128 0xa
 	.4byte	0xa3
-	.4byte	0xda9
+	.4byte	0xc92
 	.uleb128 0xe
 	.4byte	0xdf
 	.byte	0x5
 	.byte	0
 	.uleb128 0x6
-	.4byte	0xd99
+	.4byte	0xc82
 	.uleb128 0xc
-	.4byte	.LASF271
+	.4byte	.LASF260
 	.byte	0x14
 	.2byte	0x211
-	.4byte	0xda9
+	.4byte	0xc92
 	.uleb128 0xc
-	.4byte	.LASF272
+	.4byte	.LASF261
 	.byte	0x14
 	.2byte	0x212
-	.4byte	0xda9
+	.4byte	0xc92
 	.uleb128 0xc
-	.4byte	.LASF273
+	.4byte	.LASF262
 	.byte	0x14
 	.2byte	0x216
 	.4byte	0x11b
 	.uleb128 0xc
-	.4byte	.LASF274
+	.4byte	.LASF263
 	.byte	0x14
 	.2byte	0x217
 	.4byte	0x11b
 	.uleb128 0xc
-	.4byte	.LASF275
+	.4byte	.LASF264
 	.byte	0x14
 	.2byte	0x219
 	.4byte	0x54
 	.uleb128 0xa
 	.4byte	0xec
-	.4byte	0xdfb
+	.4byte	0xce4
 	.uleb128 0x16
 	.4byte	0xdf
 	.2byte	0x3ff
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF276
+	.4byte	.LASF265
 	.byte	0x14
 	.2byte	0x220
-	.4byte	0xdea
+	.4byte	0xcd3
 	.uleb128 0xc
-	.4byte	.LASF277
+	.4byte	.LASF266
 	.byte	0x14
 	.2byte	0x222
 	.4byte	0xb3
 	.uleb128 0xc
-	.4byte	.LASF278
+	.4byte	.LASF267
 	.byte	0x14
 	.2byte	0x224
 	.4byte	0xb3
 	.uleb128 0xc
-	.4byte	.LASF279
+	.4byte	.LASF268
 	.byte	0x14
 	.2byte	0x230
-	.4byte	0xb63
+	.4byte	0xb69
 	.uleb128 0x29
-	.4byte	.LASF281
+	.4byte	.LASF270
 	.byte	0x4
 	.4byte	0x84
 	.byte	0x14
 	.2byte	0x286
-	.4byte	0xe55
+	.4byte	0xd3e
 	.uleb128 0x25
-	.4byte	.LASF282
+	.4byte	.LASF271
 	.byte	0
 	.uleb128 0x25
-	.4byte	.LASF283
+	.4byte	.LASF272
 	.byte	0x1
 	.uleb128 0x25
-	.4byte	.LASF284
+	.4byte	.LASF273
 	.byte	0x2
 	.uleb128 0x25
-	.4byte	.LASF285
+	.4byte	.LASF274
 	.byte	0x3
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF286
+	.4byte	.LASF275
 	.byte	0x14
 	.2byte	0x28c
-	.4byte	0xe2b
+	.4byte	0xd14
 	.uleb128 0xc
-	.4byte	.LASF287
+	.4byte	.LASF276
 	.byte	0x16
 	.2byte	0x3ba
 	.4byte	0x126
 	.uleb128 0xc
-	.4byte	.LASF288
+	.4byte	.LASF277
 	.byte	0x16
 	.2byte	0x3bb
 	.4byte	0x126
 	.uleb128 0xc
-	.4byte	.LASF289
+	.4byte	.LASF278
 	.byte	0x16
 	.2byte	0x3bc
 	.4byte	0x126
 	.uleb128 0xf
-	.4byte	.LASF290
+	.4byte	.LASF279
 	.byte	0x4
 	.byte	0x2
 	.byte	0xd
-	.4byte	0xe9e
+	.4byte	0xd87
 	.uleb128 0x19
 	.string	"pid"
 	.byte	0x2
@@ -4048,115 +4193,115 @@ __func__.6033:
 	.byte	0
 	.byte	0
 	.uleb128 0x4
-	.4byte	.LASF291
+	.4byte	.LASF280
 	.byte	0x2
 	.byte	0x11
-	.4byte	0xea9
+	.4byte	0xd92
 	.uleb128 0x8
 	.byte	0x8
-	.4byte	0xe85
+	.4byte	0xd6e
 	.uleb128 0x24
-	.4byte	.LASF292
+	.4byte	.LASF281
 	.byte	0x4
 	.4byte	0x84
 	.byte	0x17
 	.byte	0x14
-	.4byte	0xf0e
+	.4byte	0xdf7
 	.uleb128 0x25
-	.4byte	.LASF293
+	.4byte	.LASF282
 	.byte	0x1
 	.uleb128 0x25
-	.4byte	.LASF294
+	.4byte	.LASF283
 	.byte	0x2
 	.uleb128 0x25
-	.4byte	.LASF295
+	.4byte	.LASF284
 	.byte	0x3
 	.uleb128 0x25
-	.4byte	.LASF296
+	.4byte	.LASF285
 	.byte	0x4
 	.uleb128 0x25
-	.4byte	.LASF297
+	.4byte	.LASF286
 	.byte	0x5
 	.uleb128 0x25
-	.4byte	.LASF298
+	.4byte	.LASF287
 	.byte	0x6
 	.uleb128 0x25
-	.4byte	.LASF299
+	.4byte	.LASF288
 	.byte	0x7
 	.uleb128 0x25
-	.4byte	.LASF300
+	.4byte	.LASF289
 	.byte	0x8
 	.uleb128 0x25
-	.4byte	.LASF301
+	.4byte	.LASF290
 	.byte	0x9
 	.uleb128 0x25
-	.4byte	.LASF302
+	.4byte	.LASF291
 	.byte	0xa
 	.uleb128 0x25
-	.4byte	.LASF303
+	.4byte	.LASF292
 	.byte	0xb
 	.uleb128 0x25
-	.4byte	.LASF304
+	.4byte	.LASF293
 	.byte	0xc
 	.uleb128 0x25
-	.4byte	.LASF305
+	.4byte	.LASF294
 	.byte	0xd
 	.byte	0
 	.uleb128 0x24
-	.4byte	.LASF306
+	.4byte	.LASF295
 	.byte	0x4
 	.4byte	0x84
 	.byte	0x17
 	.byte	0x2a
-	.4byte	0xf5b
+	.4byte	0xe44
 	.uleb128 0x25
-	.4byte	.LASF307
+	.4byte	.LASF296
 	.byte	0
 	.uleb128 0x25
-	.4byte	.LASF308
+	.4byte	.LASF297
 	.byte	0x1
 	.uleb128 0x25
-	.4byte	.LASF309
+	.4byte	.LASF298
 	.byte	0x2
 	.uleb128 0x25
-	.4byte	.LASF310
+	.4byte	.LASF299
 	.byte	0x3
 	.uleb128 0x25
-	.4byte	.LASF311
+	.4byte	.LASF300
 	.byte	0x4
 	.uleb128 0x25
-	.4byte	.LASF312
+	.4byte	.LASF301
 	.byte	0x5
 	.uleb128 0x25
-	.4byte	.LASF313
+	.4byte	.LASF302
 	.byte	0x6
 	.uleb128 0x25
-	.4byte	.LASF314
+	.4byte	.LASF303
 	.byte	0x7
 	.uleb128 0x25
-	.4byte	.LASF315
+	.4byte	.LASF304
 	.byte	0x8
 	.uleb128 0x25
-	.4byte	.LASF316
+	.4byte	.LASF305
 	.byte	0x9
 	.byte	0
 	.uleb128 0xf
-	.4byte	.LASF317
+	.4byte	.LASF306
 	.byte	0x10
 	.byte	0x17
 	.byte	0x43
-	.4byte	0xf80
+	.4byte	0xe69
 	.uleb128 0x10
-	.4byte	.LASF318
+	.4byte	.LASF307
 	.byte	0x17
 	.byte	0x44
 	.4byte	0x84
 	.byte	0
 	.uleb128 0x10
-	.4byte	.LASF319
+	.4byte	.LASF308
 	.byte	0x17
 	.byte	0x45
-	.4byte	0xf80
+	.4byte	0xe69
 	.byte	0x8
 	.byte	0
 	.uleb128 0x8
@@ -4164,93 +4309,93 @@ __func__.6033:
 	.4byte	0x84
 	.uleb128 0x8
 	.byte	0x8
-	.4byte	0xf5b
+	.4byte	0xe44
 	.uleb128 0xf
-	.4byte	.LASF320
+	.4byte	.LASF309
 	.byte	0x30
 	.byte	0x1
 	.byte	0xc
-	.4byte	0x10a1
+	.4byte	0xf8a
 	.uleb128 0x10
-	.4byte	.LASF321
+	.4byte	.LASF310
 	.byte	0x1
 	.byte	0xd
 	.4byte	0xb3
 	.byte	0
 	.uleb128 0x10
-	.4byte	.LASF322
+	.4byte	.LASF311
 	.byte	0x1
 	.byte	0xe
 	.4byte	0xb3
 	.byte	0x4
 	.uleb128 0x10
-	.4byte	.LASF323
+	.4byte	.LASF312
 	.byte	0x1
 	.byte	0xf
 	.4byte	0xb3
 	.byte	0x8
 	.uleb128 0x10
-	.4byte	.LASF324
+	.4byte	.LASF313
 	.byte	0x1
 	.byte	0x10
 	.4byte	0x99
 	.byte	0xc
 	.uleb128 0x10
-	.4byte	.LASF325
+	.4byte	.LASF314
 	.byte	0x1
 	.byte	0x11
 	.4byte	0x99
 	.byte	0xd
 	.uleb128 0x10
-	.4byte	.LASF326
+	.4byte	.LASF315
 	.byte	0x1
 	.byte	0x12
 	.4byte	0xa8
 	.byte	0xe
 	.uleb128 0x10
-	.4byte	.LASF327
+	.4byte	.LASF316
 	.byte	0x1
 	.byte	0x13
 	.4byte	0x99
 	.byte	0x10
 	.uleb128 0x10
-	.4byte	.LASF328
+	.4byte	.LASF317
 	.byte	0x1
 	.byte	0x14
 	.4byte	0x99
 	.byte	0x11
 	.uleb128 0x10
-	.4byte	.LASF329
+	.4byte	.LASF318
 	.byte	0x1
 	.byte	0x15
 	.4byte	0x99
 	.byte	0x12
 	.uleb128 0x10
-	.4byte	.LASF330
+	.4byte	.LASF319
 	.byte	0x1
 	.byte	0x16
 	.4byte	0x99
 	.byte	0x13
 	.uleb128 0x10
-	.4byte	.LASF331
+	.4byte	.LASF320
 	.byte	0x1
 	.byte	0x17
 	.4byte	0x99
 	.byte	0x14
 	.uleb128 0x10
-	.4byte	.LASF332
+	.4byte	.LASF321
 	.byte	0x1
 	.byte	0x18
 	.4byte	0x99
 	.byte	0x15
 	.uleb128 0x10
-	.4byte	.LASF333
+	.4byte	.LASF322
 	.byte	0x1
 	.byte	0x19
 	.4byte	0x99
 	.byte	0x16
 	.uleb128 0x10
-	.4byte	.LASF334
+	.4byte	.LASF323
 	.byte	0x1
 	.byte	0x1a
 	.4byte	0x99
@@ -4262,16 +4407,16 @@ __func__.6033:
 	.4byte	0xb3
 	.byte	0x18
 	.uleb128 0x10
-	.4byte	.LASF335
+	.4byte	.LASF324
 	.byte	0x1
 	.byte	0x1c
 	.4byte	0x99
 	.byte	0x1c
 	.uleb128 0x10
-	.4byte	.LASF336
+	.4byte	.LASF325
 	.byte	0x1
 	.byte	0x1d
-	.4byte	0x10a1
+	.4byte	0xf8a
 	.byte	0x1d
 	.uleb128 0x19
 	.string	"sc1"
@@ -4280,54 +4425,54 @@ __func__.6033:
 	.4byte	0x99
 	.byte	0x20
 	.uleb128 0x10
-	.4byte	.LASF337
+	.4byte	.LASF326
 	.byte	0x1
 	.byte	0x1f
-	.4byte	0x10b1
+	.4byte	0xf9a
 	.byte	0x21
 	.uleb128 0x10
-	.4byte	.LASF338
+	.4byte	.LASF327
 	.byte	0x1
 	.byte	0x20
 	.4byte	0x99
 	.byte	0x25
 	.uleb128 0x10
-	.4byte	.LASF339
+	.4byte	.LASF328
 	.byte	0x1
 	.byte	0x21
 	.4byte	0x99
 	.byte	0x26
 	.uleb128 0x10
-	.4byte	.LASF340
+	.4byte	.LASF329
 	.byte	0x1
 	.byte	0x22
-	.4byte	0x10c1
+	.4byte	0xfaa
 	.byte	0x27
 	.byte	0
 	.uleb128 0xa
 	.4byte	0x99
-	.4byte	0x10b1
+	.4byte	0xf9a
 	.uleb128 0xe
 	.4byte	0xdf
 	.byte	0x2
 	.byte	0
 	.uleb128 0xa
 	.4byte	0x99
-	.4byte	0x10c1
+	.4byte	0xfaa
 	.uleb128 0xe
 	.4byte	0xdf
 	.byte	0x3
 	.byte	0
 	.uleb128 0xa
 	.4byte	0x99
-	.4byte	0x10d1
+	.4byte	0xfba
 	.uleb128 0xe
 	.4byte	0xdf
 	.byte	0x8
 	.byte	0
 	.uleb128 0xa
 	.4byte	0x34
-	.4byte	0x10ee
+	.4byte	0xfd7
 	.uleb128 0x16
 	.4byte	0xdf
 	.2byte	0x1ff
@@ -4339,16 +4484,16 @@ __func__.6033:
 	.byte	0x1f
 	.byte	0
 	.uleb128 0x2a
-	.4byte	.LASF341
+	.4byte	.LASF330
 	.byte	0x1
 	.byte	0x2a
-	.4byte	0x10d1
+	.4byte	0xfba
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	waveformdata
 	.uleb128 0xa
 	.4byte	0x84
-	.4byte	0x111a
+	.4byte	0x1003
 	.uleb128 0x16
 	.4byte	0xdf
 	.2byte	0x12b
@@ -4357,31 +4502,31 @@ __func__.6033:
 	.byte	0xf
 	.byte	0
 	.uleb128 0x2a
-	.4byte	.LASF342
+	.4byte	.LASF331
 	.byte	0x1
 	.byte	0x2b
-	.4byte	0x1103
+	.4byte	0xfec
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	gray_data
 	.uleb128 0xa
 	.4byte	0x84
-	.4byte	0x1140
+	.4byte	0x1029
 	.uleb128 0x16
 	.4byte	0xdf
 	.2byte	0x12b
 	.byte	0
 	.uleb128 0x2a
-	.4byte	.LASF343
+	.4byte	.LASF332
 	.byte	0x1
 	.byte	0x2c
-	.4byte	0x112f
+	.4byte	0x1018
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	reset_data
 	.uleb128 0xa
 	.4byte	0x84
-	.4byte	0x116c
+	.4byte	0x1055
 	.uleb128 0x16
 	.4byte	0xdf
 	.2byte	0x12b
@@ -4390,81 +4535,99 @@ __func__.6033:
 	.byte	0x1
 	.byte	0
 	.uleb128 0x2a
-	.4byte	.LASF344
+	.4byte	.LASF333
 	.byte	0x1
 	.byte	0x2d
-	.4byte	0x1155
+	.4byte	0x103e
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	gray_2_data
+	.uleb128 0xa
+	.4byte	0x84
+	.4byte	0x1081
+	.uleb128 0x16
+	.4byte	0xdf
+	.2byte	0x12b
+	.uleb128 0xe
+	.4byte	0xdf
+	.byte	0x3f
+	.byte	0
 	.uleb128 0x2a
-	.4byte	.LASF345
+	.4byte	.LASF334
 	.byte	0x1
 	.byte	0x2e
-	.4byte	0x1196
+	.4byte	0x106a
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	gray32_data
+	.uleb128 0x2a
+	.4byte	.LASF335
+	.byte	0x1
+	.byte	0x2f
+	.4byte	0x10ab
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	global_waveform
 	.uleb128 0x8
 	.byte	0x8
-	.4byte	0xf8c
+	.4byte	0xe75
 	.uleb128 0x2b
-	.4byte	.LASF348
+	.4byte	.LASF338
 	.byte	0x1
-	.2byte	0x314
+	.2byte	0x35f
 	.4byte	0xe6
-	.8byte	.LFB234
-	.8byte	.LFE234-.LFB234
+	.8byte	.LFB232
+	.8byte	.LFE232-.LFB232
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x11f1
+	.4byte	0x1106
 	.uleb128 0x2c
-	.4byte	.LASF346
+	.4byte	.LASF336
 	.byte	0x1
-	.2byte	0x316
+	.2byte	0x361
 	.4byte	0xe6
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2c
-	.4byte	.LASF347
+	.4byte	.LASF337
 	.byte	0x1
-	.2byte	0x317
-	.4byte	0xb05
+	.2byte	0x362
+	.4byte	0xb0b
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	spi_id_buffer.6229
+	.8byte	spi_id_buffer.6260
 	.uleb128 0x2d
 	.string	"i"
 	.byte	0x1
-	.2byte	0x318
+	.2byte	0x363
 	.4byte	0x54
-	.4byte	.LLST122
+	.4byte	.LLST135
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF349
+	.4byte	.LASF339
 	.byte	0x1
-	.2byte	0x2f3
+	.2byte	0x33a
 	.4byte	0x54
-	.8byte	.LFB233
-	.8byte	.LFE233-.LFB233
+	.8byte	.LFB231
+	.8byte	.LFE231-.LFB231
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x124f
+	.4byte	0x1164
 	.uleb128 0x2e
-	.4byte	.LASF352
+	.4byte	.LASF342
 	.byte	0x1
-	.2byte	0x2f3
+	.2byte	0x33a
 	.4byte	0x152
-	.4byte	.LLST120
+	.4byte	.LLST133
 	.uleb128 0x2f
-	.4byte	.LASF350
+	.4byte	.LASF340
 	.byte	0x1
-	.2byte	0x2f5
-	.4byte	0x1196
-	.4byte	.LLST121
+	.2byte	0x33c
+	.4byte	0x10ab
+	.4byte	.LLST134
 	.uleb128 0x30
-	.8byte	.LVL303
-	.4byte	0x26ee
+	.8byte	.LVL328
+	.4byte	0x272f
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
@@ -4474,137 +4637,138 @@ __func__.6033:
 	.byte	0
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF351
+	.4byte	.LASF341
 	.byte	0x1
-	.2byte	0x288
+	.2byte	0x2ca
 	.4byte	0x54
-	.8byte	.LFB232
-	.8byte	.LFE232-.LFB232
+	.8byte	.LFB230
+	.8byte	.LFE230-.LFB230
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x19da
+	.4byte	0x1a83
 	.uleb128 0x2e
-	.4byte	.LASF353
+	.4byte	.LASF343
 	.byte	0x1
-	.2byte	0x288
-	.4byte	0xf86
-	.4byte	.LLST64
+	.2byte	0x2ca
+	.4byte	0xe6f
+	.4byte	.LLST60
 	.uleb128 0x2e
-	.4byte	.LASF354
+	.4byte	.LASF344
 	.byte	0x1
-	.2byte	0x288
-	.4byte	0xeaf
-	.4byte	.LLST65
+	.2byte	0x2ca
+	.4byte	0xd98
+	.4byte	.LLST61
 	.uleb128 0x2e
-	.4byte	.LASF355
+	.4byte	.LASF345
 	.byte	0x1
-	.2byte	0x288
+	.2byte	0x2ca
 	.4byte	0x54
-	.4byte	.LLST66
+	.4byte	.LLST62
 	.uleb128 0x2c
-	.4byte	.LASF356
+	.4byte	.LASF346
 	.byte	0x1
-	.2byte	0x28a
-	.4byte	0xeaf
+	.2byte	0x2cc
+	.4byte	0xd98
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	stype.6196
+	.8byte	stype.6223
 	.uleb128 0x2c
-	.4byte	.LASF357
+	.4byte	.LASF347
 	.byte	0x1
-	.2byte	0x28b
+	.2byte	0x2cd
 	.4byte	0x54
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	sftemp.6197
+	.8byte	sftemp.6224
 	.uleb128 0x32
-	.4byte	.LASF358
+	.4byte	.LASF348
 	.byte	0x1
-	.2byte	0x28c
+	.2byte	0x2ce
 	.4byte	0x54
 	.uleb128 0x33
 	.string	"ret"
 	.byte	0x1
-	.2byte	0x28d
+	.2byte	0x2cf
 	.4byte	0x54
 	.uleb128 0x34
-	.4byte	0x2216
-	.8byte	.LBB116
+	.4byte	0x246a
+	.8byte	.LBB121
 	.4byte	.Ldebug_ranges0+0xe0
 	.byte	0x1
-	.2byte	0x29c
-	.4byte	0x1331
+	.2byte	0x2de
+	.4byte	0x1246
 	.uleb128 0x35
-	.4byte	0x2227
-	.4byte	.LLST67
+	.4byte	0x247b
+	.4byte	.LLST63
 	.uleb128 0x36
 	.4byte	.Ldebug_ranges0+0xe0
 	.uleb128 0x37
-	.4byte	0x2233
-	.4byte	.LLST68
+	.4byte	0x2487
+	.4byte	.LLST64
 	.uleb128 0x37
-	.4byte	0x223f
-	.4byte	.LLST69
+	.4byte	0x2493
+	.4byte	.LLST65
 	.uleb128 0x37
-	.4byte	0x224b
-	.4byte	.LLST70
+	.4byte	0x249f
+	.4byte	.LLST66
 	.uleb128 0x37
-	.4byte	0x2257
-	.4byte	.LLST71
+	.4byte	0x24ab
+	.4byte	.LLST67
 	.byte	0
 	.byte	0
 	.uleb128 0x38
-	.4byte	0x24bb
-	.8byte	.LBB121
-	.8byte	.LBE121-.LBB121
+	.4byte	0x26f0
+	.8byte	.LBB126
+	.8byte	.LBE126-.LBB126
 	.byte	0x1
-	.2byte	0x2a0
-	.4byte	0x1364
+	.2byte	0x2e2
+	.4byte	0x1279
 	.uleb128 0x35
-	.4byte	0x24c7
-	.4byte	.LLST72
+	.4byte	0x26fc
+	.4byte	.LLST68
 	.uleb128 0x39
 	.8byte	.LVL190
-	.4byte	0x26f9
+	.4byte	0x273a
 	.byte	0
 	.uleb128 0x34
-	.4byte	0x1dd8
-	.8byte	.LBB124
+	.4byte	0x1ec4
+	.8byte	.LBB129
 	.4byte	.Ldebug_ranges0+0x120
 	.byte	0x1
-	.2byte	0x2a7
-	.4byte	0x15ec
-	.uleb128 0x3a
-	.4byte	0x1df5
+	.2byte	0x2e9
+	.4byte	0x14f6
 	.uleb128 0x35
-	.4byte	0x1de9
-	.4byte	.LLST73
+	.4byte	0x1ee1
+	.4byte	.LLST69
+	.uleb128 0x35
+	.4byte	0x1ed5
+	.4byte	.LLST70
 	.uleb128 0x36
 	.4byte	.Ldebug_ranges0+0x120
-	.uleb128 0x3b
-	.4byte	0x1e01
+	.uleb128 0x3a
+	.4byte	0x1eed
 	.uleb128 0x37
-	.4byte	0x1e0d
-	.4byte	.LLST74
+	.4byte	0x1ef9
+	.4byte	.LLST71
 	.uleb128 0x37
-	.4byte	0x1e19
-	.4byte	.LLST75
+	.4byte	0x1f05
+	.4byte	.LLST72
 	.uleb128 0x34
-	.4byte	0x24d3
-	.8byte	.LBB126
+	.4byte	0x2708
+	.8byte	.LBB131
 	.4byte	.Ldebug_ranges0+0x150
 	.byte	0x1
-	.2byte	0x1fe
-	.4byte	0x13ec
+	.2byte	0x22e
+	.4byte	0x1305
 	.uleb128 0x35
-	.4byte	0x24ee
-	.4byte	.LLST76
+	.4byte	0x2723
+	.4byte	.LLST73
 	.uleb128 0x35
-	.4byte	0x24e3
-	.4byte	.LLST77
+	.4byte	0x2718
+	.4byte	.LLST74
 	.uleb128 0x30
-	.8byte	.LVL200
-	.4byte	0x2705
+	.8byte	.LVL201
+	.4byte	0x2746
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
@@ -4620,51 +4784,43 @@ __func__.6033:
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.4byte	0x1f00
-	.8byte	.LBB130
+	.4byte	0x215c
+	.8byte	.LBB135
 	.4byte	.Ldebug_ranges0+0x180
 	.byte	0x1
-	.2byte	0x202
-	.4byte	0x14b2
-	.uleb128 0x3a
-	.4byte	0x1f19
-	.uleb128 0x3a
-	.4byte	0x1f25
+	.2byte	0x232
+	.4byte	0x13b7
 	.uleb128 0x35
-	.4byte	0x1f31
-	.4byte	.LLST78
+	.4byte	0x2175
+	.4byte	.LLST75
 	.uleb128 0x35
-	.4byte	0x1f0d
-	.4byte	.LLST79
+	.4byte	0x2169
+	.4byte	.LLST76
 	.uleb128 0x36
 	.4byte	.Ldebug_ranges0+0x180
-	.uleb128 0x3b
-	.4byte	0x1f3d
+	.uleb128 0x3a
+	.4byte	0x2181
 	.uleb128 0x37
-	.4byte	0x1f49
-	.4byte	.LLST80
+	.4byte	0x218d
+	.4byte	.LLST77
 	.uleb128 0x34
-	.4byte	0x236f
-	.8byte	.LBB132
+	.4byte	0x25c9
+	.8byte	.LBB137
 	.4byte	.Ldebug_ranges0+0x1b0
 	.byte	0x1
-	.2byte	0x1c4
-	.4byte	0x1465
-	.uleb128 0x3a
-	.4byte	0x237f
-	.uleb128 0x3a
-	.4byte	0x238a
-	.uleb128 0x3a
-	.4byte	0x23ab
-	.uleb128 0x3a
-	.4byte	0x23a0
-	.uleb128 0x3a
-	.4byte	0x2395
+	.2byte	0x1dd
+	.4byte	0x136a
+	.uleb128 0x3b
+	.4byte	0x25ef
+	.uleb128 0x3b
+	.4byte	0x25e4
+	.uleb128 0x3b
+	.4byte	0x25d9
 	.byte	0
 	.uleb128 0x3c
-	.8byte	.LVL204
-	.4byte	0x2710
-	.4byte	0x1489
+	.8byte	.LVL205
+	.4byte	0x2751
+	.4byte	0x138e
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
@@ -4684,8 +4840,8 @@ __func__.6033:
 	.2byte	0x4b0
 	.byte	0
 	.uleb128 0x30
-	.8byte	.LVL208
-	.4byte	0x271c
+	.8byte	.LVL209
+	.4byte	0x275d
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
@@ -4708,58 +4864,58 @@ __func__.6033:
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.4byte	0x206a
-	.8byte	.LBB137
+	.4byte	0x22ae
+	.8byte	.LBB142
 	.4byte	.Ldebug_ranges0+0x1e0
 	.byte	0x1
-	.2byte	0x208
-	.4byte	0x1599
+	.2byte	0x238
+	.4byte	0x149e
 	.uleb128 0x35
-	.4byte	0x207b
-	.4byte	.LLST81
+	.4byte	0x22bf
+	.4byte	.LLST78
 	.uleb128 0x36
 	.4byte	.Ldebug_ranges0+0x1e0
 	.uleb128 0x37
-	.4byte	0x2087
+	.4byte	0x22cb
+	.4byte	.LLST79
+	.uleb128 0x3a
+	.4byte	0x22d7
+	.uleb128 0x37
+	.4byte	0x22e3
+	.4byte	.LLST80
+	.uleb128 0x37
+	.4byte	0x22ed
+	.4byte	.LLST81
+	.uleb128 0x37
+	.4byte	0x22f7
 	.4byte	.LLST82
-	.uleb128 0x3b
-	.4byte	0x2093
 	.uleb128 0x37
-	.4byte	0x209f
+	.4byte	0x2301
 	.4byte	.LLST83
 	.uleb128 0x37
-	.4byte	0x20a9
+	.4byte	0x230b
 	.4byte	.LLST84
 	.uleb128 0x37
-	.4byte	0x20b3
+	.4byte	0x2317
 	.4byte	.LLST85
 	.uleb128 0x37
-	.4byte	0x20bd
+	.4byte	0x2323
 	.4byte	.LLST86
-	.uleb128 0x37
-	.4byte	0x20c7
-	.4byte	.LLST87
-	.uleb128 0x37
-	.4byte	0x20d3
-	.4byte	.LLST88
-	.uleb128 0x37
-	.4byte	0x20df
-	.4byte	.LLST89
 	.uleb128 0x38
-	.4byte	0x24d3
-	.8byte	.LBB139
-	.8byte	.LBE139-.LBB139
+	.4byte	0x2708
+	.8byte	.LBB144
+	.8byte	.LBE144-.LBB144
 	.byte	0x1
-	.2byte	0x16f
-	.4byte	0x1573
+	.2byte	0x188
+	.4byte	0x1478
 	.uleb128 0x35
-	.4byte	0x24ee
-	.4byte	.LLST90
-	.uleb128 0x3a
-	.4byte	0x24e3
+	.4byte	0x2723
+	.4byte	.LLST87
+	.uleb128 0x3b
+	.4byte	0x2718
 	.uleb128 0x30
-	.8byte	.LVL211
-	.4byte	0x2705
+	.8byte	.LVL212
+	.4byte	0x2746
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
@@ -4780,32 +4936,32 @@ __func__.6033:
 	.byte	0
 	.byte	0
 	.uleb128 0x3d
-	.8byte	.LBB141
-	.8byte	.LBE141-.LBB141
+	.8byte	.LBB146
+	.8byte	.LBE146-.LBB146
 	.uleb128 0x37
-	.4byte	0x20ec
-	.4byte	.LLST91
+	.4byte	0x2330
+	.4byte	.LLST88
 	.uleb128 0x37
-	.4byte	0x20f8
-	.4byte	.LLST92
+	.4byte	0x233c
+	.4byte	.LLST89
 	.byte	0
 	.byte	0
 	.byte	0
 	.uleb128 0x38
-	.4byte	0x24bb
-	.8byte	.LBB143
-	.8byte	.LBE143-.LBB143
+	.4byte	0x26f0
+	.8byte	.LBB148
+	.8byte	.LBE148-.LBB148
 	.byte	0x1
-	.2byte	0x20a
-	.4byte	0x15bf
+	.2byte	0x23a
+	.4byte	0x14c4
 	.uleb128 0x35
-	.4byte	0x24c7
-	.4byte	.LLST93
+	.4byte	0x26fc
+	.4byte	.LLST90
 	.byte	0
 	.uleb128 0x3c
 	.8byte	.LVL194
-	.4byte	0x2262
-	.4byte	0x15d6
+	.4byte	0x24b6
+	.4byte	0x14db
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
@@ -4814,68 +4970,74 @@ __func__.6033:
 	.byte	0
 	.uleb128 0x30
 	.8byte	.LVL195
-	.4byte	0x2106
+	.4byte	0x234a
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x84
 	.sleb128 0
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x40
 	.byte	0
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.4byte	0x19da
-	.8byte	.LBB148
+	.4byte	0x1a83
+	.8byte	.LBB153
 	.4byte	.Ldebug_ranges0+0x210
 	.byte	0x1
-	.2byte	0x2db
-	.4byte	0x17fd
-	.uleb128 0x3a
-	.4byte	0x19f7
+	.2byte	0x31d
+	.4byte	0x1715
 	.uleb128 0x35
-	.4byte	0x19eb
-	.4byte	.LLST94
+	.4byte	0x1aa0
+	.4byte	.LLST91
+	.uleb128 0x35
+	.4byte	0x1a94
+	.4byte	.LLST92
 	.uleb128 0x36
 	.4byte	.Ldebug_ranges0+0x210
-	.uleb128 0x3b
-	.4byte	0x1a03
+	.uleb128 0x3a
+	.4byte	0x1aac
 	.uleb128 0x37
-	.4byte	0x1a0f
-	.4byte	.LLST95
+	.4byte	0x1ab8
+	.4byte	.LLST93
 	.uleb128 0x37
-	.4byte	0x1a1b
-	.4byte	.LLST96
+	.4byte	0x1ac4
+	.4byte	.LLST94
 	.uleb128 0x34
-	.4byte	0x24bb
-	.8byte	.LBB150
-	.4byte	.Ldebug_ranges0+0x240
+	.4byte	0x26f0
+	.8byte	.LBB155
+	.4byte	.Ldebug_ranges0+0x260
 	.byte	0x1
-	.2byte	0x283
-	.4byte	0x165d
+	.2byte	0x2c5
+	.4byte	0x156b
 	.uleb128 0x35
-	.4byte	0x24c7
-	.4byte	.LLST97
+	.4byte	0x26fc
+	.4byte	.LLST95
 	.uleb128 0x39
-	.8byte	.LVL216
-	.4byte	0x26f9
+	.8byte	.LVL217
+	.4byte	0x273a
 	.byte	0
 	.uleb128 0x38
-	.4byte	0x24d3
-	.8byte	.LBB153
-	.8byte	.LBE153-.LBB153
+	.4byte	0x2708
+	.8byte	.LBB158
+	.8byte	.LBE158-.LBB158
 	.byte	0x1
-	.2byte	0x26d
-	.4byte	0x16af
+	.2byte	0x2af
+	.4byte	0x15bd
 	.uleb128 0x35
-	.4byte	0x24ee
-	.4byte	.LLST98
+	.4byte	0x2723
+	.4byte	.LLST96
 	.uleb128 0x35
-	.4byte	0x24e3
-	.4byte	.LLST99
+	.4byte	0x2718
+	.4byte	.LLST97
 	.uleb128 0x30
-	.8byte	.LVL259
-	.4byte	0x2705
+	.8byte	.LVL260
+	.4byte	0x2746
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
@@ -4899,21 +5061,21 @@ __func__.6033:
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.4byte	0x24d3
-	.8byte	.LBB155
-	.4byte	.Ldebug_ranges0+0x270
+	.4byte	0x2708
+	.8byte	.LBB160
+	.4byte	.Ldebug_ranges0+0x290
 	.byte	0x1
-	.2byte	0x27a
-	.4byte	0x16fd
+	.2byte	0x2bc
+	.4byte	0x160b
 	.uleb128 0x35
-	.4byte	0x24ee
-	.4byte	.LLST100
+	.4byte	0x2723
+	.4byte	.LLST98
 	.uleb128 0x35
-	.4byte	0x24e3
-	.4byte	.LLST101
+	.4byte	0x2718
+	.4byte	.LLST99
 	.uleb128 0x30
-	.8byte	.LVL267
-	.4byte	0x2705
+	.8byte	.LVL268
+	.4byte	0x2746
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
@@ -4937,48 +5099,48 @@ __func__.6033:
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.4byte	0x1f54
-	.8byte	.LBB159
-	.4byte	.Ldebug_ranges0+0x2a0
+	.4byte	0x2198
+	.8byte	.LBB164
+	.4byte	.Ldebug_ranges0+0x2c0
 	.byte	0x1
-	.2byte	0x281
-	.4byte	0x176b
+	.2byte	0x2c3
+	.4byte	0x1679
 	.uleb128 0x35
-	.4byte	0x1f6d
-	.4byte	.LLST102
+	.4byte	0x21b1
+	.4byte	.LLST100
 	.uleb128 0x35
-	.4byte	0x1f61
-	.4byte	.LLST103
+	.4byte	0x21a5
+	.4byte	.LLST101
 	.uleb128 0x36
-	.4byte	.Ldebug_ranges0+0x2a0
+	.4byte	.Ldebug_ranges0+0x2c0
 	.uleb128 0x37
-	.4byte	0x1f79
-	.4byte	.LLST104
+	.4byte	0x21bd
+	.4byte	.LLST102
 	.uleb128 0x3e
-	.4byte	0x1f85
+	.4byte	0x21c9
 	.uleb128 0x1
 	.byte	0x57
 	.uleb128 0x37
-	.4byte	0x1f91
+	.4byte	0x21d5
+	.4byte	.LLST103
+	.uleb128 0x37
+	.4byte	0x21e1
+	.4byte	.LLST104
+	.uleb128 0x37
+	.4byte	0x21ed
 	.4byte	.LLST105
 	.uleb128 0x37
-	.4byte	0x1f9d
+	.4byte	0x21f9
 	.4byte	.LLST106
 	.uleb128 0x37
-	.4byte	0x1fa9
+	.4byte	0x2205
 	.4byte	.LLST107
-	.uleb128 0x37
-	.4byte	0x1fb5
-	.4byte	.LLST108
-	.uleb128 0x37
-	.4byte	0x1fc1
-	.4byte	.LLST109
 	.byte	0
 	.byte	0
 	.uleb128 0x3c
-	.8byte	.LVL253
-	.4byte	0x2262
-	.4byte	0x1782
+	.8byte	.LVL254
+	.4byte	0x24b6
+	.4byte	0x1690
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
@@ -4986,20 +5148,25 @@ __func__.6033:
 	.byte	0x35
 	.byte	0
 	.uleb128 0x3c
-	.8byte	.LVL254
-	.4byte	0x2106
-	.4byte	0x179a
+	.8byte	.LVL255
+	.4byte	0x234a
+	.4byte	0x16ad
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x84
 	.sleb128 0
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x40
 	.byte	0
 	.uleb128 0x3c
-	.8byte	.LVL260
-	.4byte	0x24fa
-	.4byte	0x17b2
+	.8byte	.LVL261
+	.4byte	0x1f12
+	.4byte	0x16c5
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x51
@@ -5008,9 +5175,9 @@ __func__.6033:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x3c
-	.8byte	.LVL261
-	.4byte	0x2262
-	.4byte	0x17c9
+	.8byte	.LVL262
+	.4byte	0x24b6
+	.4byte	0x16dc
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
@@ -5018,19 +5185,24 @@ __func__.6033:
 	.byte	0x34
 	.byte	0
 	.uleb128 0x3c
-	.8byte	.LVL262
-	.4byte	0x2106
-	.4byte	0x17e1
+	.8byte	.LVL263
+	.4byte	0x234a
+	.4byte	0x16f9
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x84
 	.sleb128 0
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x40
 	.byte	0
 	.uleb128 0x30
-	.8byte	.LVL269
-	.4byte	0x25f3
+	.8byte	.LVL270
+	.4byte	0x2060
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
@@ -5047,41 +5219,42 @@ __func__.6033:
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.4byte	0x1b7d
-	.8byte	.LBB166
-	.4byte	.Ldebug_ranges0+0x2d0
+	.4byte	0x1c22
+	.8byte	.LBB177
+	.4byte	.Ldebug_ranges0+0x310
 	.byte	0x1
-	.2byte	0x2ad
-	.4byte	0x18b9
-	.uleb128 0x3a
-	.4byte	0x1b9a
+	.2byte	0x2ef
+	.4byte	0x17da
 	.uleb128 0x35
-	.4byte	0x1b8e
-	.4byte	.LLST110
+	.4byte	0x1c3f
+	.4byte	.LLST108
+	.uleb128 0x35
+	.4byte	0x1c33
+	.4byte	.LLST109
 	.uleb128 0x36
-	.4byte	.Ldebug_ranges0+0x2d0
+	.4byte	.Ldebug_ranges0+0x310
 	.uleb128 0x37
-	.4byte	0x1ba6
-	.4byte	.LLST111
+	.4byte	0x1c4b
+	.4byte	.LLST110
 	.uleb128 0x37
-	.4byte	0x1bb2
-	.4byte	.LLST112
+	.4byte	0x1c57
+	.4byte	.LLST111
 	.uleb128 0x38
-	.4byte	0x24d3
-	.8byte	.LBB168
-	.8byte	.LBE168-.LBB168
+	.4byte	0x2708
+	.8byte	.LBB179
+	.8byte	.LBE179-.LBB179
 	.byte	0x1
-	.2byte	0x232
-	.4byte	0x188c
+	.2byte	0x274
+	.4byte	0x17a8
 	.uleb128 0x35
-	.4byte	0x24ee
-	.4byte	.LLST113
+	.4byte	0x2723
+	.4byte	.LLST112
 	.uleb128 0x35
-	.4byte	0x24e3
-	.4byte	.LLST114
+	.4byte	0x2718
+	.4byte	.LLST113
 	.uleb128 0x30
-	.8byte	.LVL242
-	.4byte	0x2705
+	.8byte	.LVL243
+	.4byte	0x2746
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
@@ -5105,9 +5278,9 @@ __func__.6033:
 	.byte	0
 	.byte	0
 	.uleb128 0x3c
-	.8byte	.LVL236
-	.4byte	0x2262
-	.4byte	0x18a3
+	.8byte	.LVL237
+	.4byte	0x24b6
+	.4byte	0x17bf
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
@@ -5115,53 +5288,59 @@ __func__.6033:
 	.byte	0x32
 	.byte	0
 	.uleb128 0x30
-	.8byte	.LVL237
-	.4byte	0x2106
+	.8byte	.LVL238
+	.4byte	0x234a
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x84
 	.sleb128 0
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x40
 	.byte	0
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.4byte	0x1a28
-	.8byte	.LBB172
-	.4byte	.Ldebug_ranges0+0x300
+	.4byte	0x1ad1
+	.8byte	.LBB183
+	.4byte	.Ldebug_ranges0+0x340
 	.byte	0x1
-	.2byte	0x2e1
-	.4byte	0x19a0
-	.uleb128 0x3a
-	.4byte	0x1a45
+	.2byte	0x323
+	.4byte	0x18ca
 	.uleb128 0x35
-	.4byte	0x1a39
+	.4byte	0x1aee
+	.4byte	.LLST114
+	.uleb128 0x35
+	.4byte	0x1ae2
 	.4byte	.LLST115
 	.uleb128 0x36
-	.4byte	.Ldebug_ranges0+0x300
+	.4byte	.Ldebug_ranges0+0x340
 	.uleb128 0x37
-	.4byte	0x1a51
+	.4byte	0x1afa
 	.4byte	.LLST116
 	.uleb128 0x37
-	.4byte	0x1a5d
+	.4byte	0x1b06
 	.4byte	.LLST117
 	.uleb128 0x38
-	.4byte	0x24d3
-	.8byte	.LBB174
-	.8byte	.LBE174-.LBB174
+	.4byte	0x2708
+	.8byte	.LBB185
+	.8byte	.LBE185-.LBB185
 	.byte	0x1
-	.2byte	0x259
-	.4byte	0x1948
+	.2byte	0x29b
+	.4byte	0x186d
 	.uleb128 0x35
-	.4byte	0x24ee
+	.4byte	0x2723
 	.4byte	.LLST118
 	.uleb128 0x35
-	.4byte	0x24e3
+	.4byte	0x2718
 	.4byte	.LLST119
 	.uleb128 0x30
-	.8byte	.LVL294
-	.4byte	0x2705
+	.8byte	.LVL295
+	.4byte	0x2746
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
@@ -5185,12 +5364,12 @@ __func__.6033:
 	.byte	0
 	.byte	0
 	.uleb128 0x39
-	.8byte	.LVL246
-	.4byte	0x24fa
+	.8byte	.LVL247
+	.4byte	0x1f12
 	.uleb128 0x3c
-	.8byte	.LVL286
-	.4byte	0x2262
-	.4byte	0x196c
+	.8byte	.LVL287
+	.4byte	0x24b6
+	.4byte	0x1891
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
@@ -5198,19 +5377,24 @@ __func__.6033:
 	.byte	0x36
 	.byte	0
 	.uleb128 0x3c
-	.8byte	.LVL287
-	.4byte	0x2106
-	.4byte	0x1984
+	.8byte	.LVL288
+	.4byte	0x234a
+	.4byte	0x18ae
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x84
 	.sleb128 0
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x40
 	.byte	0
 	.uleb128 0x30
-	.8byte	.LVL290
-	.4byte	0x1bbf
+	.8byte	.LVL291
+	.4byte	0x1ca6
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
@@ -5226,151 +5410,312 @@ __func__.6033:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x3c
-	.8byte	.LVL248
-	.4byte	0x1a6a
-	.4byte	0x19be
+	.uleb128 0x34
+	.4byte	0x1c64
+	.8byte	.LBB190
+	.4byte	.Ldebug_ranges0+0x370
+	.byte	0x1
+	.2byte	0x328
+	.4byte	0x1a49
+	.uleb128 0x35
+	.4byte	0x1c81
+	.4byte	.LLST120
+	.uleb128 0x35
+	.4byte	0x1c75
+	.4byte	.LLST121
+	.uleb128 0x36
+	.4byte	.Ldebug_ranges0+0x370
+	.uleb128 0x37
+	.4byte	0x1c8d
+	.4byte	.LLST122
+	.uleb128 0x37
+	.4byte	0x1c99
+	.4byte	.LLST123
+	.uleb128 0x34
+	.4byte	0x2708
+	.8byte	.LBB192
+	.4byte	.Ldebug_ranges0+0x3b0
+	.byte	0x1
+	.2byte	0x262
+	.4byte	0x1951
+	.uleb128 0x35
+	.4byte	0x2723
+	.4byte	.LLST124
+	.uleb128 0x35
+	.4byte	0x2718
+	.4byte	.LLST125
+	.uleb128 0x30
+	.8byte	.LVL303
+	.4byte	0x2746
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x83
+	.byte	0x84
 	.sleb128 0
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x51
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x8000
+	.byte	0
+	.byte	0
+	.uleb128 0x34
+	.4byte	0x200c
+	.8byte	.LBB196
+	.4byte	.Ldebug_ranges0+0x3e0
+	.byte	0x1
+	.2byte	0x266
+	.4byte	0x1a16
+	.uleb128 0x35
+	.4byte	0x2025
+	.4byte	.LLST126
+	.uleb128 0x35
+	.4byte	0x2019
+	.4byte	.LLST127
+	.uleb128 0x36
+	.4byte	.Ldebug_ranges0+0x3e0
+	.uleb128 0x3a
+	.4byte	0x2031
+	.uleb128 0x37
+	.4byte	0x203d
+	.4byte	.LLST128
+	.uleb128 0x37
+	.4byte	0x2049
+	.4byte	.LLST129
+	.uleb128 0x37
+	.4byte	0x2055
+	.4byte	.LLST130
+	.uleb128 0x34
+	.4byte	0x25c9
+	.8byte	.LBB198
+	.4byte	.Ldebug_ranges0+0x420
+	.byte	0x1
+	.2byte	0x203
+	.4byte	0x19d0
+	.uleb128 0x35
+	.4byte	0x25ef
+	.4byte	.LLST131
+	.uleb128 0x3b
+	.4byte	0x25e4
+	.uleb128 0x35
+	.4byte	0x25d9
+	.4byte	.LLST132
+	.byte	0
+	.uleb128 0x3c
+	.8byte	.LVL309
+	.4byte	0x2751
+	.4byte	0x19ed
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x50
 	.uleb128 0x2
-	.byte	0x84
+	.byte	0x83
 	.sleb128 0
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
 	.byte	0
 	.uleb128 0x30
-	.8byte	.LVL251
-	.4byte	0x26ee
+	.8byte	.LVL319
+	.4byte	0x275d
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC4
+	.8byte	gray32_data
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x3f
-	.4byte	.LASF361
-	.byte	0x1
-	.2byte	0x262
-	.4byte	0x54
-	.byte	0x1
-	.4byte	0x1a28
-	.uleb128 0x40
-	.4byte	.LASF353
+	.byte	0
+	.uleb128 0x3c
+	.8byte	.LVL297
+	.4byte	0x24b6
+	.4byte	0x1a2d
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x37
+	.byte	0
+	.uleb128 0x30
+	.8byte	.LVL298
+	.4byte	0x234a
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x3c
+	.8byte	.LVL249
+	.4byte	0x1b13
+	.4byte	0x1a67
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x30
+	.8byte	.LVL252
+	.4byte	0x272f
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC4
+	.byte	0
+	.byte	0
+	.uleb128 0x3f
+	.4byte	.LASF351
 	.byte	0x1
-	.2byte	0x262
-	.4byte	0xf86
+	.2byte	0x2a4
+	.4byte	0x54
+	.byte	0x1
+	.4byte	0x1ad1
 	.uleb128 0x40
-	.4byte	.LASF358
+	.4byte	.LASF343
 	.byte	0x1
-	.2byte	0x262
+	.2byte	0x2a4
+	.4byte	0xe6f
+	.uleb128 0x40
+	.4byte	.LASF348
+	.byte	0x1
+	.2byte	0x2a4
 	.4byte	0x54
 	.uleb128 0x32
-	.4byte	.LASF359
+	.4byte	.LASF349
 	.byte	0x1
-	.2byte	0x264
-	.4byte	0xf5b
+	.2byte	0x2a6
+	.4byte	0xe44
 	.uleb128 0x32
-	.4byte	.LASF360
+	.4byte	.LASF350
 	.byte	0x1
-	.2byte	0x265
+	.2byte	0x2a7
 	.4byte	0x54
 	.uleb128 0x32
-	.4byte	.LASF318
+	.4byte	.LASF307
 	.byte	0x1
-	.2byte	0x266
+	.2byte	0x2a8
 	.4byte	0x54
 	.byte	0
 	.uleb128 0x3f
-	.4byte	.LASF362
+	.4byte	.LASF352
 	.byte	0x1
-	.2byte	0x24d
+	.2byte	0x28f
 	.4byte	0x54
 	.byte	0x1
-	.4byte	0x1a6a
+	.4byte	0x1b13
 	.uleb128 0x40
-	.4byte	.LASF353
+	.4byte	.LASF343
 	.byte	0x1
-	.2byte	0x24d
-	.4byte	0xf86
+	.2byte	0x28f
+	.4byte	0xe6f
 	.uleb128 0x40
-	.4byte	.LASF358
+	.4byte	.LASF348
 	.byte	0x1
-	.2byte	0x24d
+	.2byte	0x28f
 	.4byte	0x54
 	.uleb128 0x32
-	.4byte	.LASF360
+	.4byte	.LASF350
 	.byte	0x1
-	.2byte	0x24f
+	.2byte	0x291
 	.4byte	0x54
 	.uleb128 0x32
-	.4byte	.LASF318
+	.4byte	.LASF307
 	.byte	0x1
-	.2byte	0x250
+	.2byte	0x292
 	.4byte	0x54
 	.byte	0
 	.uleb128 0x41
-	.4byte	.LASF364
+	.4byte	.LASF355
 	.byte	0x1
-	.2byte	0x23b
+	.2byte	0x27d
 	.4byte	0x54
-	.8byte	.LFB229
-	.8byte	.LFE229-.LFB229
+	.8byte	.LFB227
+	.8byte	.LFE227-.LFB227
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1b7d
+	.4byte	0x1c22
 	.uleb128 0x2e
-	.4byte	.LASF353
+	.4byte	.LASF343
 	.byte	0x1
-	.2byte	0x23b
-	.4byte	0xf86
-	.4byte	.LLST37
+	.2byte	0x27d
+	.4byte	0xe6f
+	.4byte	.LLST33
 	.uleb128 0x2e
-	.4byte	.LASF358
+	.4byte	.LASF348
 	.byte	0x1
-	.2byte	0x23b
+	.2byte	0x27d
 	.4byte	0x54
-	.4byte	.LLST38
+	.4byte	.LLST34
 	.uleb128 0x2e
-	.4byte	.LASF354
+	.4byte	.LASF344
 	.byte	0x1
-	.2byte	0x23b
-	.4byte	0xeaf
-	.4byte	.LLST39
+	.2byte	0x27d
+	.4byte	0xd98
+	.4byte	.LLST35
 	.uleb128 0x2f
-	.4byte	.LASF360
+	.4byte	.LASF350
 	.byte	0x1
-	.2byte	0x23d
+	.2byte	0x27f
 	.4byte	0x54
-	.4byte	.LLST40
+	.4byte	.LLST36
 	.uleb128 0x2f
-	.4byte	.LASF318
+	.4byte	.LASF307
 	.byte	0x1
-	.2byte	0x23e
+	.2byte	0x280
 	.4byte	0x54
-	.4byte	.LLST41
+	.4byte	.LLST37
 	.uleb128 0x38
-	.4byte	0x24d3
-	.8byte	.LBB59
-	.8byte	.LBE59-.LBB59
+	.4byte	0x2708
+	.8byte	.LBB56
+	.8byte	.LBE56-.LBB56
 	.byte	0x1
-	.2byte	0x244
-	.4byte	0x1b2e
+	.2byte	0x286
+	.4byte	0x1bd7
 	.uleb128 0x35
-	.4byte	0x24ee
-	.4byte	.LLST42
+	.4byte	0x2723
+	.4byte	.LLST38
 	.uleb128 0x35
-	.4byte	0x24e3
-	.4byte	.LLST43
+	.4byte	0x2718
+	.4byte	.LLST39
 	.uleb128 0x30
 	.8byte	.LVL148
-	.4byte	0x2705
+	.4byte	0x2746
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
@@ -5395,8 +5740,8 @@ __func__.6033:
 	.byte	0
 	.uleb128 0x3c
 	.8byte	.LVL143
-	.4byte	0x2262
-	.4byte	0x1b47
+	.4byte	0x24b6
+	.4byte	0x1bf0
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
@@ -5407,115 +5752,142 @@ __func__.6033:
 	.byte	0
 	.uleb128 0x3c
 	.8byte	.LVL144
-	.4byte	0x2106
-	.4byte	0x1b5f
+	.4byte	0x234a
+	.4byte	0x1c0d
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x83
 	.sleb128 0
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x40
 	.byte	0
 	.uleb128 0x30
 	.8byte	.LVL149
-	.4byte	0x24fa
+	.4byte	0x1f12
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x83
 	.sleb128 0
-	.uleb128 0x42
-	.4byte	0x1e4b
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
 	.byte	0
 	.byte	0
 	.uleb128 0x3f
-	.4byte	.LASF363
+	.4byte	.LASF353
 	.byte	0x1
-	.2byte	0x229
+	.2byte	0x26b
 	.4byte	0x54
 	.byte	0x1
-	.4byte	0x1bbf
+	.4byte	0x1c64
 	.uleb128 0x40
-	.4byte	.LASF353
+	.4byte	.LASF343
 	.byte	0x1
-	.2byte	0x229
-	.4byte	0xf86
+	.2byte	0x26b
+	.4byte	0xe6f
 	.uleb128 0x40
-	.4byte	.LASF358
+	.4byte	.LASF348
 	.byte	0x1
-	.2byte	0x229
+	.2byte	0x26b
 	.4byte	0x54
 	.uleb128 0x32
-	.4byte	.LASF360
+	.4byte	.LASF350
 	.byte	0x1
-	.2byte	0x22b
+	.2byte	0x26d
 	.4byte	0x54
 	.uleb128 0x32
-	.4byte	.LASF318
+	.4byte	.LASF307
+	.byte	0x1
+	.2byte	0x26e
+	.4byte	0x54
+	.byte	0
+	.uleb128 0x3f
+	.4byte	.LASF354
+	.byte	0x1
+	.2byte	0x259
+	.4byte	0x54
+	.byte	0x1
+	.4byte	0x1ca6
+	.uleb128 0x40
+	.4byte	.LASF343
+	.byte	0x1
+	.2byte	0x259
+	.4byte	0xe6f
+	.uleb128 0x40
+	.4byte	.LASF348
+	.byte	0x1
+	.2byte	0x259
+	.4byte	0x54
+	.uleb128 0x32
+	.4byte	.LASF350
+	.byte	0x1
+	.2byte	0x25b
+	.4byte	0x54
+	.uleb128 0x32
+	.4byte	.LASF307
 	.byte	0x1
-	.2byte	0x22c
+	.2byte	0x25c
 	.4byte	0x54
 	.byte	0
 	.uleb128 0x41
-	.4byte	.LASF365
+	.4byte	.LASF356
 	.byte	0x1
-	.2byte	0x20f
+	.2byte	0x23f
 	.4byte	0x54
-	.8byte	.LFB227
-	.8byte	.LFE227-.LFB227
+	.8byte	.LFB224
+	.8byte	.LFE224-.LFB224
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1dd8
+	.4byte	0x1ec4
 	.uleb128 0x2e
-	.4byte	.LASF353
+	.4byte	.LASF343
 	.byte	0x1
-	.2byte	0x20f
-	.4byte	0xf86
-	.4byte	.LLST44
+	.2byte	0x23f
+	.4byte	0xe6f
+	.4byte	.LLST40
 	.uleb128 0x2e
-	.4byte	.LASF358
+	.4byte	.LASF348
 	.byte	0x1
-	.2byte	0x20f
+	.2byte	0x23f
 	.4byte	0x54
-	.4byte	.LLST45
+	.4byte	.LLST41
 	.uleb128 0x32
-	.4byte	.LASF359
+	.4byte	.LASF349
 	.byte	0x1
-	.2byte	0x211
-	.4byte	0xf5b
+	.2byte	0x241
+	.4byte	0xe44
 	.uleb128 0x2f
-	.4byte	.LASF360
+	.4byte	.LASF350
 	.byte	0x1
-	.2byte	0x212
+	.2byte	0x242
 	.4byte	0x54
-	.4byte	.LLST46
+	.4byte	.LLST42
 	.uleb128 0x2f
-	.4byte	.LASF318
+	.4byte	.LASF307
 	.byte	0x1
-	.2byte	0x213
+	.2byte	0x243
 	.4byte	0x54
-	.4byte	.LLST47
+	.4byte	.LLST43
 	.uleb128 0x38
-	.4byte	0x24d3
-	.8byte	.LBB69
-	.8byte	.LBE69-.LBB69
+	.4byte	0x2708
+	.8byte	.LBB66
+	.8byte	.LBE66-.LBB66
 	.byte	0x1
-	.2byte	0x219
-	.4byte	0x1c7f
+	.2byte	0x249
+	.4byte	0x1d66
 	.uleb128 0x35
-	.4byte	0x24ee
-	.4byte	.LLST48
+	.4byte	0x2723
+	.4byte	.LLST44
 	.uleb128 0x35
-	.4byte	0x24e3
-	.4byte	.LLST49
+	.4byte	0x2718
+	.4byte	.LLST45
 	.uleb128 0x30
 	.8byte	.LVL159
-	.4byte	0x2705
+	.4byte	0x2746
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
@@ -5539,64 +5911,64 @@ __func__.6033:
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.4byte	0x1fcc
-	.8byte	.LBB71
+	.4byte	0x2210
+	.8byte	.LBB68
 	.4byte	.Ldebug_ranges0+0xb0
 	.byte	0x1
-	.2byte	0x222
-	.4byte	0x1d54
+	.2byte	0x252
+	.4byte	0x1e3b
 	.uleb128 0x35
-	.4byte	0x1fdd
-	.4byte	.LLST50
+	.4byte	0x2221
+	.4byte	.LLST46
 	.uleb128 0x36
 	.4byte	.Ldebug_ranges0+0xb0
 	.uleb128 0x37
-	.4byte	0x1fe9
+	.4byte	0x222d
+	.4byte	.LLST47
+	.uleb128 0x3a
+	.4byte	0x2239
+	.uleb128 0x37
+	.4byte	0x2245
+	.4byte	.LLST48
+	.uleb128 0x37
+	.4byte	0x2251
+	.4byte	.LLST49
+	.uleb128 0x37
+	.4byte	0x225d
+	.4byte	.LLST50
+	.uleb128 0x37
+	.4byte	0x2269
 	.4byte	.LLST51
-	.uleb128 0x3b
-	.4byte	0x1ff5
 	.uleb128 0x37
-	.4byte	0x2001
+	.4byte	0x2275
 	.4byte	.LLST52
 	.uleb128 0x37
-	.4byte	0x200d
+	.4byte	0x2281
 	.4byte	.LLST53
 	.uleb128 0x37
-	.4byte	0x2019
+	.4byte	0x228d
 	.4byte	.LLST54
 	.uleb128 0x37
-	.4byte	0x2025
+	.4byte	0x2297
 	.4byte	.LLST55
 	.uleb128 0x37
-	.4byte	0x2031
+	.4byte	0x22a1
 	.4byte	.LLST56
-	.uleb128 0x37
-	.4byte	0x203d
-	.4byte	.LLST57
-	.uleb128 0x37
-	.4byte	0x2049
-	.4byte	.LLST58
-	.uleb128 0x37
-	.4byte	0x2053
-	.4byte	.LLST59
-	.uleb128 0x37
-	.4byte	0x205d
-	.4byte	.LLST60
-	.uleb128 0x43
-	.4byte	0x24d3
-	.8byte	.LBB73
-	.8byte	.LBE73-.LBB73
+	.uleb128 0x42
+	.4byte	0x2708
+	.8byte	.LBB70
+	.8byte	.LBE70-.LBB70
 	.byte	0x1
-	.2byte	0x190
+	.2byte	0x1a9
 	.uleb128 0x35
-	.4byte	0x24ee
-	.4byte	.LLST61
+	.4byte	0x2723
+	.4byte	.LLST57
 	.uleb128 0x35
-	.4byte	0x24e3
-	.4byte	.LLST62
+	.4byte	0x2718
+	.4byte	.LLST58
 	.uleb128 0x30
 	.8byte	.LVL163
-	.4byte	0x2705
+	.4byte	0x2746
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
@@ -5619,18 +5991,18 @@ __func__.6033:
 	.byte	0
 	.byte	0
 	.uleb128 0x38
-	.4byte	0x24bb
-	.8byte	.LBB76
-	.8byte	.LBE76-.LBB76
+	.4byte	0x26f0
+	.8byte	.LBB73
+	.8byte	.LBE73-.LBB73
 	.byte	0x1
-	.2byte	0x224
-	.4byte	0x1d8e
+	.2byte	0x254
+	.4byte	0x1e75
 	.uleb128 0x35
-	.4byte	0x24c7
-	.4byte	.LLST63
+	.4byte	0x26fc
+	.4byte	.LLST59
 	.uleb128 0x30
 	.8byte	.LVL167
-	.4byte	0x26f9
+	.4byte	0x273a
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
@@ -5641,8 +6013,8 @@ __func__.6033:
 	.byte	0
 	.uleb128 0x3c
 	.8byte	.LVL154
-	.4byte	0x2262
-	.4byte	0x1da5
+	.4byte	0x24b6
+	.4byte	0x1e8c
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
@@ -5651,18 +6023,23 @@ __func__.6033:
 	.byte	0
 	.uleb128 0x3c
 	.8byte	.LVL155
-	.4byte	0x2106
-	.4byte	0x1dbd
+	.4byte	0x234a
+	.4byte	0x1ea9
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x83
 	.sleb128 0
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x40
 	.byte	0
 	.uleb128 0x30
 	.8byte	.LVL160
-	.4byte	0x25f3
+	.4byte	0x2060
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
@@ -5678,434 +6055,600 @@ __func__.6033:
 	.byte	0
 	.byte	0
 	.uleb128 0x3f
-	.4byte	.LASF366
+	.4byte	.LASF357
 	.byte	0x1
-	.2byte	0x1f5
+	.2byte	0x225
 	.4byte	0x54
 	.byte	0x1
-	.4byte	0x1e26
+	.4byte	0x1f12
 	.uleb128 0x40
-	.4byte	.LASF353
+	.4byte	.LASF343
 	.byte	0x1
-	.2byte	0x1f5
-	.4byte	0xf86
+	.2byte	0x225
+	.4byte	0xe6f
 	.uleb128 0x40
-	.4byte	.LASF358
+	.4byte	.LASF348
 	.byte	0x1
-	.2byte	0x1f5
+	.2byte	0x225
 	.4byte	0x54
 	.uleb128 0x32
-	.4byte	.LASF359
+	.4byte	.LASF349
 	.byte	0x1
-	.2byte	0x1f7
-	.4byte	0xf5b
+	.2byte	0x227
+	.4byte	0xe44
 	.uleb128 0x32
-	.4byte	.LASF360
+	.4byte	.LASF350
 	.byte	0x1
-	.2byte	0x1f8
+	.2byte	0x228
 	.4byte	0x54
 	.uleb128 0x32
-	.4byte	.LASF318
+	.4byte	.LASF307
 	.byte	0x1
-	.2byte	0x1f9
+	.2byte	0x229
 	.4byte	0x54
 	.byte	0
-	.uleb128 0x44
-	.4byte	.LASF369
-	.byte	0x1
-	.2byte	0x1df
+	.uleb128 0x43
+	.4byte	.LASF360
 	.byte	0x1
-	.4byte	0x1e92
-	.uleb128 0x45
+	.2byte	0x211
+	.8byte	.LFB222
+	.8byte	.LFE222-.LFB222
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x200c
+	.uleb128 0x44
 	.string	"dst"
 	.byte	0x1
-	.2byte	0x1df
-	.4byte	0xf80
-	.uleb128 0x40
-	.4byte	.LASF360
+	.2byte	0x211
+	.4byte	0xe69
+	.4byte	.LLST4
+	.uleb128 0x2e
+	.4byte	.LASF307
 	.byte	0x1
-	.2byte	0x1df
+	.2byte	0x211
 	.4byte	0x54
-	.uleb128 0x40
+	.4byte	.LLST5
+	.uleb128 0x32
+	.4byte	.LASF308
+	.byte	0x1
+	.2byte	0x213
+	.4byte	0x34
+	.uleb128 0x2f
 	.4byte	.LASF358
 	.byte	0x1
-	.2byte	0x1df
+	.2byte	0x214
+	.4byte	0x54
+	.4byte	.LLST6
+	.uleb128 0x2f
+	.4byte	.LASF359
+	.byte	0x1
+	.2byte	0x215
+	.4byte	0x54
+	.4byte	.LLST7
+	.uleb128 0x2d
+	.string	"j"
+	.byte	0x1
+	.2byte	0x216
 	.4byte	0x54
+	.4byte	.LLST8
+	.uleb128 0x38
+	.4byte	0x25c9
+	.8byte	.LBB46
+	.8byte	.LBE46-.LBB46
+	.byte	0x1
+	.2byte	0x21c
+	.4byte	0x1fb6
+	.uleb128 0x3b
+	.4byte	0x25ef
+	.uleb128 0x3b
+	.4byte	0x25e4
+	.uleb128 0x3b
+	.4byte	0x25d9
+	.byte	0
+	.uleb128 0x3c
+	.8byte	.LVL30
+	.4byte	0x2751
+	.4byte	0x1fda
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x4b00
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL40
+	.4byte	0x275d
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	gray_data
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0xb
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x36
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF362
+	.byte	0x1
+	.2byte	0x1f8
+	.byte	0x1
+	.4byte	0x2060
+	.uleb128 0x47
+	.string	"dst"
+	.byte	0x1
+	.2byte	0x1f8
+	.4byte	0xe69
 	.uleb128 0x40
-	.4byte	.LASF318
+	.4byte	.LASF307
 	.byte	0x1
-	.2byte	0x1e0
+	.2byte	0x1f8
 	.4byte	0x54
 	.uleb128 0x32
-	.4byte	.LASF319
+	.4byte	.LASF308
 	.byte	0x1
-	.2byte	0x1e2
+	.2byte	0x1fa
 	.4byte	0x34
 	.uleb128 0x32
-	.4byte	.LASF367
+	.4byte	.LASF358
 	.byte	0x1
-	.2byte	0x1e3
+	.2byte	0x1fb
 	.4byte	0x54
 	.uleb128 0x32
-	.4byte	.LASF368
+	.4byte	.LASF359
 	.byte	0x1
-	.2byte	0x1e4
+	.2byte	0x1fc
 	.4byte	0x54
 	.uleb128 0x33
 	.string	"j"
 	.byte	0x1
-	.2byte	0x1e5
+	.2byte	0x1fd
 	.4byte	0x54
 	.byte	0
-	.uleb128 0x44
-	.4byte	.LASF370
-	.byte	0x1
-	.2byte	0x1cb
+	.uleb128 0x43
+	.4byte	.LASF361
 	.byte	0x1
-	.4byte	0x1f00
-	.uleb128 0x45
+	.2byte	0x1e4
+	.8byte	.LFB220
+	.8byte	.LFE220-.LFB220
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x215c
+	.uleb128 0x44
 	.string	"dst"
 	.byte	0x1
-	.2byte	0x1cb
-	.4byte	0xf80
-	.uleb128 0x40
-	.4byte	.LASF360
+	.2byte	0x1e4
+	.4byte	0xe69
+	.4byte	.LLST9
+	.uleb128 0x2e
+	.4byte	.LASF307
 	.byte	0x1
-	.2byte	0x1cb
+	.2byte	0x1e4
 	.4byte	0x54
-	.uleb128 0x40
+	.4byte	.LLST10
+	.uleb128 0x2f
 	.4byte	.LASF358
 	.byte	0x1
-	.2byte	0x1cb
-	.4byte	0x54
-	.uleb128 0x40
-	.4byte	.LASF318
-	.byte	0x1
-	.2byte	0x1cb
+	.2byte	0x1e6
 	.4byte	0x54
-	.uleb128 0x32
-	.4byte	.LASF367
-	.byte	0x1
-	.2byte	0x1cd
-	.4byte	0x54
-	.uleb128 0x32
-	.4byte	.LASF368
+	.4byte	.LLST11
+	.uleb128 0x2f
+	.4byte	.LASF359
 	.byte	0x1
-	.2byte	0x1ce
+	.2byte	0x1e7
 	.4byte	0x54
-	.uleb128 0x33
+	.4byte	.LLST12
+	.uleb128 0x2d
 	.string	"j"
 	.byte	0x1
-	.2byte	0x1cf
+	.2byte	0x1e8
 	.4byte	0x54
-	.uleb128 0x46
+	.4byte	.LLST13
+	.uleb128 0x48
+	.4byte	.Ldebug_ranges0+0x30
+	.4byte	0x2106
 	.uleb128 0x32
-	.4byte	.LASF319
+	.4byte	.LASF308
 	.byte	0x1
-	.2byte	0x1d5
+	.2byte	0x1ee
 	.4byte	0x34
+	.uleb128 0x49
+	.4byte	0x25c9
+	.8byte	.LBB49
+	.4byte	.Ldebug_ranges0+0x80
+	.byte	0x1
+	.2byte	0x1ef
+	.uleb128 0x3b
+	.4byte	0x25ef
+	.uleb128 0x3b
+	.4byte	0x25e4
+	.uleb128 0x3b
+	.4byte	0x25d9
 	.byte	0
 	.byte	0
-	.uleb128 0x44
-	.4byte	.LASF371
-	.byte	0x1
-	.2byte	0x1bd
-	.byte	0x1
-	.4byte	0x1f54
+	.uleb128 0x3c
+	.8byte	.LVL44
+	.4byte	0x2751
+	.4byte	0x212a
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x960
+	.byte	0
 	.uleb128 0x45
-	.string	"dst"
+	.8byte	.LVL53
+	.4byte	0x275d
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR2
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0xb
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x33
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF363
 	.byte	0x1
-	.2byte	0x1bd
-	.4byte	0xf80
-	.uleb128 0x40
-	.4byte	.LASF360
+	.2byte	0x1d6
 	.byte	0x1
-	.2byte	0x1bd
-	.4byte	0x54
-	.uleb128 0x40
-	.4byte	.LASF358
+	.4byte	0x2198
+	.uleb128 0x47
+	.string	"dst"
 	.byte	0x1
-	.2byte	0x1bd
-	.4byte	0x54
+	.2byte	0x1d6
+	.4byte	0xe69
 	.uleb128 0x40
-	.4byte	.LASF318
+	.4byte	.LASF307
 	.byte	0x1
-	.2byte	0x1bd
+	.2byte	0x1d6
 	.4byte	0x54
 	.uleb128 0x32
-	.4byte	.LASF319
+	.4byte	.LASF308
 	.byte	0x1
-	.2byte	0x1bf
+	.2byte	0x1d8
 	.4byte	0x34
 	.uleb128 0x33
 	.string	"j"
 	.byte	0x1
-	.2byte	0x1c0
+	.2byte	0x1d9
 	.4byte	0x54
 	.byte	0
-	.uleb128 0x44
-	.4byte	.LASF372
+	.uleb128 0x46
+	.4byte	.LASF364
 	.byte	0x1
-	.2byte	0x1a4
+	.2byte	0x1bd
 	.byte	0x1
-	.4byte	0x1fcc
+	.4byte	0x2210
 	.uleb128 0x40
-	.4byte	.LASF359
+	.4byte	.LASF349
 	.byte	0x1
-	.2byte	0x1a4
-	.4byte	0xf86
+	.2byte	0x1bd
+	.4byte	0xe6f
 	.uleb128 0x40
-	.4byte	.LASF353
+	.4byte	.LASF343
 	.byte	0x1
-	.2byte	0x1a5
-	.4byte	0xf86
+	.2byte	0x1be
+	.4byte	0xe6f
 	.uleb128 0x32
-	.4byte	.LASF373
+	.4byte	.LASF365
 	.byte	0x1
-	.2byte	0x1a7
+	.2byte	0x1c0
 	.4byte	0x54
 	.uleb128 0x32
-	.4byte	.LASF374
+	.4byte	.LASF366
 	.byte	0x1
-	.2byte	0x1a7
+	.2byte	0x1c0
 	.4byte	0x54
 	.uleb128 0x32
-	.4byte	.LASF375
+	.4byte	.LASF367
 	.byte	0x1
-	.2byte	0x1a7
+	.2byte	0x1c0
 	.4byte	0x54
 	.uleb128 0x32
-	.4byte	.LASF376
+	.4byte	.LASF368
 	.byte	0x1
-	.2byte	0x1a8
-	.4byte	0xf80
+	.2byte	0x1c1
+	.4byte	0xe69
 	.uleb128 0x32
-	.4byte	.LASF377
+	.4byte	.LASF369
 	.byte	0x1
-	.2byte	0x1a8
-	.4byte	0xf80
+	.2byte	0x1c1
+	.4byte	0xe69
 	.uleb128 0x32
-	.4byte	.LASF378
+	.4byte	.LASF370
 	.byte	0x1
-	.2byte	0x1a9
+	.2byte	0x1c2
 	.4byte	0x54
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x1
-	.2byte	0x1aa
+	.2byte	0x1c3
 	.4byte	0x54
 	.byte	0
 	.uleb128 0x3f
-	.4byte	.LASF379
+	.4byte	.LASF371
 	.byte	0x1
-	.2byte	0x184
-	.4byte	0xf80
+	.2byte	0x19d
+	.4byte	0xe69
 	.byte	0x1
-	.4byte	0x206a
+	.4byte	0x22ae
 	.uleb128 0x40
-	.4byte	.LASF359
+	.4byte	.LASF349
 	.byte	0x1
-	.2byte	0x184
-	.4byte	0xf86
+	.2byte	0x19d
+	.4byte	0xe6f
 	.uleb128 0x32
-	.4byte	.LASF376
+	.4byte	.LASF368
 	.byte	0x1
-	.2byte	0x186
-	.4byte	0xf80
+	.2byte	0x19f
+	.4byte	0xe69
 	.uleb128 0x32
-	.4byte	.LASF377
+	.4byte	.LASF369
 	.byte	0x1
-	.2byte	0x186
-	.4byte	0xf80
+	.2byte	0x19f
+	.4byte	0xe69
 	.uleb128 0x32
-	.4byte	.LASF374
+	.4byte	.LASF366
 	.byte	0x1
-	.2byte	0x187
+	.2byte	0x1a0
 	.4byte	0x54
 	.uleb128 0x32
-	.4byte	.LASF375
+	.4byte	.LASF367
 	.byte	0x1
-	.2byte	0x187
+	.2byte	0x1a0
 	.4byte	0x54
 	.uleb128 0x32
-	.4byte	.LASF380
+	.4byte	.LASF372
 	.byte	0x1
-	.2byte	0x187
+	.2byte	0x1a0
 	.4byte	0x54
 	.uleb128 0x32
-	.4byte	.LASF381
+	.4byte	.LASF373
 	.byte	0x1
-	.2byte	0x188
+	.2byte	0x1a1
 	.4byte	0x54
 	.uleb128 0x32
-	.4byte	.LASF382
+	.4byte	.LASF374
 	.byte	0x1
-	.2byte	0x188
+	.2byte	0x1a1
 	.4byte	0x54
 	.uleb128 0x33
 	.string	"num"
 	.byte	0x1
-	.2byte	0x189
+	.2byte	0x1a2
 	.4byte	0x54
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x1
-	.2byte	0x18a
+	.2byte	0x1a3
 	.4byte	0x54
 	.uleb128 0x33
 	.string	"j"
 	.byte	0x1
-	.2byte	0x18a
+	.2byte	0x1a3
 	.4byte	0x54
 	.uleb128 0x33
 	.string	"len"
 	.byte	0x1
-	.2byte	0x18b
+	.2byte	0x1a4
 	.4byte	0x54
 	.byte	0
 	.uleb128 0x3f
-	.4byte	.LASF383
+	.4byte	.LASF375
 	.byte	0x1
-	.2byte	0x164
-	.4byte	0xf80
+	.2byte	0x17d
+	.4byte	0xe69
 	.byte	0x1
-	.4byte	0x2106
+	.4byte	0x234a
 	.uleb128 0x40
-	.4byte	.LASF359
+	.4byte	.LASF349
 	.byte	0x1
-	.2byte	0x164
-	.4byte	0xf86
+	.2byte	0x17d
+	.4byte	0xe6f
 	.uleb128 0x32
-	.4byte	.LASF376
+	.4byte	.LASF368
 	.byte	0x1
-	.2byte	0x166
-	.4byte	0xf80
+	.2byte	0x17f
+	.4byte	0xe69
 	.uleb128 0x32
-	.4byte	.LASF377
+	.4byte	.LASF369
 	.byte	0x1
-	.2byte	0x166
-	.4byte	0xf80
+	.2byte	0x17f
+	.4byte	0xe69
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x1
-	.2byte	0x167
+	.2byte	0x180
 	.4byte	0x54
 	.uleb128 0x33
 	.string	"j"
 	.byte	0x1
-	.2byte	0x167
+	.2byte	0x180
 	.4byte	0x54
 	.uleb128 0x33
 	.string	"k"
 	.byte	0x1
-	.2byte	0x167
+	.2byte	0x180
 	.4byte	0x54
 	.uleb128 0x33
 	.string	"h"
 	.byte	0x1
-	.2byte	0x167
+	.2byte	0x180
 	.4byte	0x54
 	.uleb128 0x32
-	.4byte	.LASF384
+	.4byte	.LASF376
 	.byte	0x1
-	.2byte	0x168
+	.2byte	0x181
 	.4byte	0x54
 	.uleb128 0x33
 	.string	"num"
 	.byte	0x1
-	.2byte	0x169
+	.2byte	0x182
 	.4byte	0x54
 	.uleb128 0x33
 	.string	"len"
 	.byte	0x1
-	.2byte	0x16a
+	.2byte	0x183
 	.4byte	0x54
-	.uleb128 0x46
+	.uleb128 0x4a
 	.uleb128 0x32
-	.4byte	.LASF378
+	.4byte	.LASF370
 	.byte	0x1
-	.2byte	0x176
+	.2byte	0x18f
 	.4byte	0x54
 	.uleb128 0x32
-	.4byte	.LASF385
+	.4byte	.LASF377
 	.byte	0x1
-	.2byte	0x177
+	.2byte	0x190
 	.4byte	0x54
 	.byte	0
 	.byte	0
 	.uleb128 0x41
-	.4byte	.LASF386
+	.4byte	.LASF378
 	.byte	0x1
-	.2byte	0x134
+	.2byte	0x149
 	.4byte	0x54
-	.8byte	.LFB219
-	.8byte	.LFE219-.LFB219
+	.8byte	.LFB215
+	.8byte	.LFE215-.LFB215
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2201
+	.4byte	0x2455
 	.uleb128 0x2e
-	.4byte	.LASF387
+	.4byte	.LASF379
 	.byte	0x1
-	.2byte	0x134
+	.2byte	0x149
 	.4byte	0x54
-	.4byte	.LLST29
+	.4byte	.LLST24
 	.uleb128 0x2e
-	.4byte	.LASF358
+	.4byte	.LASF348
 	.byte	0x1
-	.2byte	0x134
+	.2byte	0x149
 	.4byte	0x54
-	.4byte	.LLST30
+	.4byte	.LLST25
+	.uleb128 0x2e
+	.4byte	.LASF380
+	.byte	0x1
+	.2byte	0x149
+	.4byte	0x54
+	.4byte	.LLST26
 	.uleb128 0x2f
-	.4byte	.LASF346
+	.4byte	.LASF336
 	.byte	0x1
-	.2byte	0x136
+	.2byte	0x14b
 	.4byte	0x4ea
-	.4byte	.LLST31
+	.4byte	.LLST27
 	.uleb128 0x2f
-	.4byte	.LASF385
+	.4byte	.LASF377
 	.byte	0x1
-	.2byte	0x137
+	.2byte	0x14c
 	.4byte	0x84
-	.4byte	.LLST32
+	.4byte	.LLST28
 	.uleb128 0x2f
-	.4byte	.LASF388
+	.4byte	.LASF381
 	.byte	0x1
-	.2byte	0x137
+	.2byte	0x14c
 	.4byte	0x84
-	.4byte	.LLST33
+	.4byte	.LLST29
 	.uleb128 0x2f
-	.4byte	.LASF389
+	.4byte	.LASF382
 	.byte	0x1
-	.2byte	0x137
+	.2byte	0x14c
 	.4byte	0x84
-	.4byte	.LLST34
+	.4byte	.LLST30
 	.uleb128 0x2f
-	.4byte	.LASF390
+	.4byte	.LASF383
 	.byte	0x1
-	.2byte	0x137
+	.2byte	0x14c
 	.4byte	0x84
-	.4byte	.LLST35
+	.4byte	.LLST31
 	.uleb128 0x32
-	.4byte	.LASF391
+	.4byte	.LASF384
 	.byte	0x1
-	.2byte	0x138
+	.2byte	0x14d
 	.4byte	0x84
 	.uleb128 0x2f
-	.4byte	.LASF392
+	.4byte	.LASF385
 	.byte	0x1
-	.2byte	0x139
+	.2byte	0x14e
 	.4byte	0x54
-	.4byte	.LLST36
-	.uleb128 0x47
-	.4byte	.LASF393
-	.4byte	0x2211
+	.4byte	.LLST32
+	.uleb128 0x4b
+	.4byte	.LASF386
+	.4byte	0x2465
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6033
+	.8byte	__func__.6041
 	.uleb128 0x3c
-	.8byte	.LVL124
-	.4byte	0x26ee
-	.4byte	0x21f3
+	.8byte	.LVL125
+	.4byte	0x272f
+	.4byte	0x2447
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
@@ -6119,105 +6662,105 @@ __func__.6033:
 	.byte	0x3
 	.8byte	.LANCHOR3
 	.byte	0
-	.uleb128 0x48
+	.uleb128 0x4c
 	.8byte	.LVL139
-	.4byte	0x23b7
+	.4byte	0x25fb
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xf3
-	.4byte	0x2211
+	.4byte	0x2465
 	.uleb128 0xe
 	.4byte	0xdf
 	.byte	0xe
 	.byte	0
 	.uleb128 0x6
-	.4byte	0x2201
+	.4byte	0x2455
 	.uleb128 0x3f
-	.4byte	.LASF394
+	.4byte	.LASF387
 	.byte	0x1
-	.2byte	0x120
+	.2byte	0x135
 	.4byte	0x54
 	.byte	0x1
-	.4byte	0x2262
+	.4byte	0x24b6
 	.uleb128 0x40
-	.4byte	.LASF355
+	.4byte	.LASF345
 	.byte	0x1
-	.2byte	0x120
+	.2byte	0x135
 	.4byte	0x54
 	.uleb128 0x32
-	.4byte	.LASF346
+	.4byte	.LASF336
 	.byte	0x1
-	.2byte	0x122
+	.2byte	0x137
 	.4byte	0x4ea
 	.uleb128 0x32
-	.4byte	.LASF395
+	.4byte	.LASF388
 	.byte	0x1
-	.2byte	0x123
+	.2byte	0x138
 	.4byte	0x54
 	.uleb128 0x32
-	.4byte	.LASF396
+	.4byte	.LASF389
 	.byte	0x1
-	.2byte	0x124
+	.2byte	0x139
 	.4byte	0x54
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x1
-	.2byte	0x125
+	.2byte	0x13a
 	.4byte	0x54
 	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF397
+	.uleb128 0x41
+	.4byte	.LASF390
 	.byte	0x1
-	.byte	0xf1
+	.2byte	0x106
 	.4byte	0x54
-	.8byte	.LFB217
-	.8byte	.LFE217-.LFB217
+	.8byte	.LFB213
+	.8byte	.LFE213-.LFB213
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2328
-	.uleb128 0x4a
-	.4byte	.LASF354
+	.4byte	0x2582
+	.uleb128 0x2e
+	.4byte	.LASF344
 	.byte	0x1
-	.byte	0xf1
-	.4byte	0xeaf
+	.2byte	0x106
+	.4byte	0xd98
 	.4byte	.LLST0
-	.uleb128 0x4b
-	.4byte	.LASF346
+	.uleb128 0x2f
+	.4byte	.LASF336
 	.byte	0x1
-	.byte	0xf3
-	.4byte	0x1196
+	.2byte	0x108
+	.4byte	0x10ab
 	.4byte	.LLST1
-	.uleb128 0x4c
-	.4byte	.LASF398
+	.uleb128 0x32
+	.4byte	.LASF391
 	.byte	0x1
-	.byte	0xf4
-	.4byte	0x2328
-	.uleb128 0x4b
-	.4byte	.LASF387
+	.2byte	0x109
+	.4byte	0x2582
+	.uleb128 0x2f
+	.4byte	.LASF379
 	.byte	0x1
-	.byte	0xf5
+	.2byte	0x10a
 	.4byte	0x54
 	.4byte	.LLST2
-	.uleb128 0x4d
-	.4byte	0x232e
-	.8byte	.LBB45
+	.uleb128 0x34
+	.4byte	0x2588
+	.8byte	.LBB42
 	.4byte	.Ldebug_ranges0+0
 	.byte	0x1
-	.byte	0xf7
-	.4byte	0x230c
+	.2byte	0x10c
+	.4byte	0x2566
 	.uleb128 0x35
-	.4byte	0x233e
+	.4byte	0x2598
 	.4byte	.LLST1
 	.uleb128 0x36
 	.4byte	.Ldebug_ranges0+0
 	.uleb128 0x3e
-	.4byte	0x2349
+	.4byte	0x25a3
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	pvi_modes.5987
+	.8byte	pvi_modes.5991
 	.uleb128 0x30
-	.8byte	.LVL12
-	.4byte	0x26ee
+	.8byte	.LVL4
+	.4byte	0x272f
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
@@ -6228,8 +6771,8 @@ __func__.6033:
 	.byte	0
 	.byte	0
 	.uleb128 0x30
-	.8byte	.LVL22
-	.4byte	0x26ee
+	.8byte	.LVL24
+	.4byte	0x272f
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
@@ -6241,152 +6784,136 @@ __func__.6033:
 	.uleb128 0x8
 	.byte	0x8
 	.4byte	0x5b
-	.uleb128 0x4e
-	.4byte	.LASF399
+	.uleb128 0x4d
+	.4byte	.LASF392
 	.byte	0x1
-	.byte	0xa2
-	.4byte	0x2328
+	.byte	0xa0
+	.4byte	0x2582
 	.byte	0x1
-	.4byte	0x235f
-	.uleb128 0x4f
-	.4byte	.LASF346
+	.4byte	0x25b9
+	.uleb128 0x4e
+	.4byte	.LASF336
 	.byte	0x1
-	.byte	0xa2
-	.4byte	0x1196
+	.byte	0xa0
+	.4byte	0x10ab
 	.uleb128 0x2a
-	.4byte	.LASF398
+	.4byte	.LASF391
 	.byte	0x1
-	.byte	0xa4
-	.4byte	0x235f
+	.byte	0xa2
+	.4byte	0x25b9
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	pvi_modes.5987
+	.8byte	pvi_modes.5991
 	.byte	0
 	.uleb128 0xa
 	.4byte	0x54
-	.4byte	0x236f
+	.4byte	0x25c9
 	.uleb128 0xe
 	.4byte	0xdf
 	.byte	0x8
 	.byte	0
-	.uleb128 0x4e
-	.4byte	.LASF400
+	.uleb128 0x4d
+	.4byte	.LASF393
 	.byte	0x1
-	.byte	0x9c
+	.byte	0x9b
 	.4byte	0x34
 	.byte	0x1
-	.4byte	0x23b7
-	.uleb128 0x4f
-	.4byte	.LASF387
-	.byte	0x1
-	.byte	0x9c
-	.4byte	0x54
-	.uleb128 0x4f
-	.4byte	.LASF355
-	.byte	0x1
-	.byte	0x9c
-	.4byte	0x54
-	.uleb128 0x4f
-	.4byte	.LASF401
+	.4byte	0x25fb
+	.uleb128 0x4e
+	.4byte	.LASF394
 	.byte	0x1
-	.byte	0x9c
+	.byte	0x9b
 	.4byte	0x54
-	.uleb128 0x4f
-	.4byte	.LASF367
+	.uleb128 0x4e
+	.4byte	.LASF358
 	.byte	0x1
-	.byte	0x9d
+	.byte	0x9b
 	.4byte	0x54
-	.uleb128 0x4f
-	.4byte	.LASF368
+	.uleb128 0x4e
+	.4byte	.LASF359
 	.byte	0x1
-	.byte	0x9d
+	.byte	0x9b
 	.4byte	0x54
 	.byte	0
-	.uleb128 0x50
-	.4byte	.LASF402
+	.uleb128 0x4f
+	.4byte	.LASF395
 	.byte	0x1
-	.byte	0x30
+	.byte	0x31
 	.4byte	0x54
-	.8byte	.LFB214
-	.8byte	.LFE214-.LFB214
+	.8byte	.LFB210
+	.8byte	.LFE210-.LFB210
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x24bb
-	.uleb128 0x4a
-	.4byte	.LASF319
+	.4byte	0x26f0
+	.uleb128 0x50
+	.4byte	.LASF308
 	.byte	0x1
-	.byte	0x30
+	.byte	0x31
 	.4byte	0x4ea
-	.4byte	.LLST18
-	.uleb128 0x51
-	.string	"tmp"
+	.4byte	.LLST14
+	.uleb128 0x50
+	.4byte	.LASF396
 	.byte	0x1
-	.byte	0x30
+	.byte	0x31
 	.4byte	0x54
-	.4byte	.LLST19
-	.uleb128 0x4a
-	.4byte	.LASF387
+	.4byte	.LLST15
+	.uleb128 0x50
+	.4byte	.LASF380
 	.byte	0x1
-	.byte	0x30
+	.byte	0x31
 	.4byte	0x54
-	.4byte	.LLST20
-	.uleb128 0x4a
-	.4byte	.LASF403
+	.4byte	.LLST16
+	.uleb128 0x51
+	.4byte	.LASF397
 	.byte	0x1
-	.byte	0x30
-	.4byte	0x54
-	.4byte	.LLST21
-	.uleb128 0x4b
-	.4byte	.LASF404
-	.byte	0x1
-	.byte	0x32
-	.4byte	0x84
-	.4byte	.LLST22
-	.uleb128 0x4b
-	.4byte	.LASF405
-	.byte	0x1
-	.byte	0x32
+	.byte	0x33
 	.4byte	0x84
-	.4byte	.LLST23
-	.uleb128 0x4b
-	.4byte	.LASF406
+	.4byte	.LLST17
+	.uleb128 0x51
+	.4byte	.LASF398
 	.byte	0x1
 	.byte	0x33
 	.4byte	0x84
-	.4byte	.LLST24
-	.uleb128 0x4b
-	.4byte	.LASF392
+	.4byte	.LLST18
+	.uleb128 0x51
+	.4byte	.LASF399
 	.byte	0x1
 	.byte	0x34
 	.4byte	0x84
-	.4byte	.LLST25
-	.uleb128 0x4b
-	.4byte	.LASF407
+	.4byte	.LLST19
+	.uleb128 0x51
+	.4byte	.LASF385
 	.byte	0x1
 	.byte	0x35
+	.4byte	0x84
+	.4byte	.LLST20
+	.uleb128 0x51
+	.4byte	.LASF400
+	.byte	0x1
+	.byte	0x36
 	.4byte	0x34
-	.4byte	.LLST26
+	.4byte	.LLST21
 	.uleb128 0x52
 	.string	"i"
 	.byte	0x1
-	.byte	0x36
+	.byte	0x37
 	.4byte	0x34
-	.4byte	.LLST27
-	.uleb128 0x4b
-	.4byte	.LASF408
+	.4byte	.LLST22
+	.uleb128 0x51
+	.4byte	.LASF401
 	.byte	0x1
-	.byte	0x37
+	.byte	0x38
 	.4byte	0x15f
-	.4byte	.LLST28
+	.4byte	.LLST23
 	.uleb128 0x3c
-	.8byte	.LVL56
-	.4byte	0x2710
-	.4byte	0x249f
+	.8byte	.LVL58
+	.4byte	0x2751
+	.4byte	0x26d4
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x87
+	.byte	0x88
 	.sleb128 0
 	.uleb128 0x31
 	.uleb128 0x1
@@ -6402,8 +6929,8 @@ __func__.6033:
 	.byte	0x24
 	.byte	0
 	.uleb128 0x30
-	.8byte	.LVL74
-	.4byte	0x26ee
+	.8byte	.LVL76
+	.4byte	0x272f
 	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
@@ -6413,327 +6940,102 @@ __func__.6033:
 	.byte	0
 	.byte	0
 	.uleb128 0x53
-	.4byte	.LASF409
+	.4byte	.LASF402
 	.byte	0x2
 	.byte	0x4f
 	.byte	0x3
-	.4byte	0x24d3
-	.uleb128 0x4f
-	.4byte	.LASF410
+	.4byte	0x2708
+	.uleb128 0x4e
+	.4byte	.LASF403
 	.byte	0x2
 	.byte	0x4f
 	.4byte	0x195
 	.byte	0
-	.uleb128 0x4e
-	.4byte	.LASF411
+	.uleb128 0x4d
+	.4byte	.LASF404
 	.byte	0x2
 	.byte	0x38
 	.4byte	0x152
 	.byte	0x3
-	.4byte	0x24fa
-	.uleb128 0x4f
+	.4byte	0x272f
+	.uleb128 0x4e
 	.4byte	.LASF33
 	.byte	0x2
 	.byte	0x38
 	.4byte	0x110
-	.uleb128 0x4f
-	.4byte	.LASF412
+	.uleb128 0x4e
+	.4byte	.LASF405
 	.byte	0x2
 	.byte	0x38
 	.4byte	0x147
 	.byte	0
 	.uleb128 0x54
-	.4byte	0x1e26
-	.8byte	.LFB238
-	.8byte	.LFE238-.LFB238
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x25f3
-	.uleb128 0x35
-	.4byte	0x1e33
-	.4byte	.LLST4
-	.uleb128 0x35
-	.4byte	0x1e57
-	.4byte	.LLST5
+	.4byte	.LASF406
+	.4byte	.LASF406
+	.byte	0x18
+	.byte	0x13
 	.uleb128 0x55
-	.4byte	0x1e4b
-	.uleb128 0x6
-	.byte	0xfa
-	.4byte	0x1e4b
-	.byte	0x9f
+	.4byte	.LASF407
+	.4byte	.LASF407
+	.byte	0x16
+	.2byte	0x399
+	.uleb128 0x54
+	.4byte	.LASF408
+	.4byte	.LASF408
+	.byte	0x2
+	.byte	0x36
 	.uleb128 0x55
-	.4byte	0x1e3f
-	.uleb128 0x6
-	.byte	0xfa
-	.4byte	0x1e3f
-	.byte	0x9f
-	.uleb128 0x3b
-	.4byte	0x1e63
-	.uleb128 0x37
-	.4byte	0x1e6f
-	.4byte	.LLST6
-	.uleb128 0x37
-	.4byte	0x1e7b
-	.4byte	.LLST7
-	.uleb128 0x37
-	.4byte	0x1e87
-	.4byte	.LLST8
-	.uleb128 0x38
-	.4byte	0x236f
-	.8byte	.LBB49
-	.8byte	.LBE49-.LBB49
-	.byte	0x1
-	.2byte	0x1eb
-	.4byte	0x259d
-	.uleb128 0x35
-	.4byte	0x237f
-	.4byte	.LLST9
-	.uleb128 0x35
-	.4byte	0x238a
-	.4byte	.LLST10
-	.uleb128 0x3a
-	.4byte	0x23ab
-	.uleb128 0x3a
-	.4byte	0x23a0
-	.uleb128 0x3a
-	.4byte	0x2395
-	.byte	0
-	.uleb128 0x3c
-	.8byte	.LVL28
-	.4byte	0x2710
-	.4byte	0x25c1
-	.uleb128 0x31
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
-	.uleb128 0x31
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x31
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x4b00
+	.4byte	.LASF409
+	.4byte	.LASF409
+	.byte	0x16
+	.2byte	0x16c
+	.uleb128 0x55
+	.4byte	.LASF410
+	.4byte	.LASF410
+	.byte	0x16
+	.2byte	0x16d
 	.byte	0
-	.uleb128 0x56
-	.8byte	.LVL38
-	.4byte	0x271c
-	.uleb128 0x31
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x31
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	gray_data
-	.uleb128 0x31
+	.section	.debug_abbrev,"",@progbits
+.Ldebug_abbrev0:
 	.uleb128 0x1
-	.byte	0x52
+	.uleb128 0x11
+	.byte	0x1
+	.uleb128 0x25
+	.uleb128 0xe
+	.uleb128 0x13
 	.uleb128 0xb
-	.byte	0xf3
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x1b
+	.uleb128 0xe
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x11
 	.uleb128 0x1
-	.byte	0x51
-	.byte	0x36
-	.byte	0x24
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x8
-	.byte	0x20
-	.byte	0x26
+	.uleb128 0x10
+	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x54
-	.4byte	0x1e92
-	.8byte	.LFB239
-	.8byte	.LFE239-.LFB239
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x26ee
-	.uleb128 0x35
-	.4byte	0x1e9f
-	.4byte	.LLST11
-	.uleb128 0x35
-	.4byte	0x1ec3
-	.4byte	.LLST12
-	.uleb128 0x55
-	.4byte	0x1eb7
-	.uleb128 0x6
-	.byte	0xfa
-	.4byte	0x1eb7
-	.byte	0x9f
-	.uleb128 0x55
-	.4byte	0x1eab
-	.uleb128 0x6
-	.byte	0xfa
-	.4byte	0x1eab
-	.byte	0x9f
-	.uleb128 0x37
-	.4byte	0x1ecf
-	.4byte	.LLST13
-	.uleb128 0x37
-	.4byte	0x1edb
-	.4byte	.LLST14
-	.uleb128 0x37
-	.4byte	0x1ee7
-	.4byte	.LLST15
-	.uleb128 0x57
-	.4byte	.Ldebug_ranges0+0x30
-	.4byte	0x2698
-	.uleb128 0x3b
-	.4byte	0x1ef2
-	.uleb128 0x58
-	.4byte	0x236f
-	.8byte	.LBB52
-	.4byte	.Ldebug_ranges0+0x80
-	.byte	0x1
-	.2byte	0x1d6
-	.uleb128 0x35
-	.4byte	0x237f
-	.4byte	.LLST16
-	.uleb128 0x35
-	.4byte	0x238a
-	.4byte	.LLST17
-	.uleb128 0x3a
-	.4byte	0x23ab
-	.uleb128 0x3a
-	.4byte	0x23a0
+	.uleb128 0x2
+	.uleb128 0x16
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
 	.uleb128 0x3a
-	.4byte	0x2395
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3c
-	.8byte	.LVL42
-	.4byte	0x2710
-	.4byte	0x26bc
-	.uleb128 0x31
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.uleb128 0x31
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x31
-	.uleb128 0x1
-	.byte	0x52
 	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x960
-	.byte	0
-	.uleb128 0x56
-	.8byte	.LVL51
-	.4byte	0x271c
-	.uleb128 0x31
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x31
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR2
-	.uleb128 0x31
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0xb
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x33
-	.byte	0x24
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x8
-	.byte	0x20
-	.byte	0x26
-	.byte	0
-	.byte	0
-	.uleb128 0x59
-	.4byte	.LASF413
-	.4byte	.LASF413
-	.byte	0x18
-	.byte	0x13
-	.uleb128 0x5a
-	.4byte	.LASF414
-	.4byte	.LASF414
-	.byte	0x16
-	.2byte	0x399
-	.uleb128 0x59
-	.4byte	.LASF415
-	.4byte	.LASF415
-	.byte	0x2
-	.byte	0x36
-	.uleb128 0x5a
-	.4byte	.LASF416
-	.4byte	.LASF416
-	.byte	0x16
-	.2byte	0x16c
-	.uleb128 0x5a
-	.4byte	.LASF417
-	.4byte	.LASF417
-	.byte	0x16
-	.2byte	0x16d
-	.byte	0
-	.section	.debug_abbrev,"",@progbits
-.Ldebug_abbrev0:
-	.uleb128 0x1
-	.uleb128 0x11
-	.byte	0x1
-	.uleb128 0x25
-	.uleb128 0xe
-	.uleb128 0x13
-	.uleb128 0xb
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x1b
-	.uleb128 0xe
-	.uleb128 0x55
-	.uleb128 0x17
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x10
-	.uleb128 0x17
-	.byte	0
-	.byte	0
-	.uleb128 0x2
-	.uleb128 0x16
+	.uleb128 0x24
 	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x24
-	.byte	0
-	.uleb128 0xb
-	.uleb128 0xb
-	.uleb128 0x3e
-	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3e
+	.uleb128 0xb
 	.uleb128 0x3
 	.uleb128 0xe
 	.byte	0
@@ -7425,14 +7727,14 @@ __func__.6033:
 	.byte	0
 	.byte	0
 	.uleb128 0x3a
-	.uleb128 0x5
+	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
 	.uleb128 0x3b
-	.uleb128 0x34
+	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
@@ -7525,15 +7827,6 @@ __func__.6033:
 	.byte	0
 	.byte	0
 	.uleb128 0x42
-	.uleb128 0x410a
-	.byte	0
-	.uleb128 0x31
-	.uleb128 0x13
-	.uleb128 0x2111
-	.uleb128 0x18
-	.byte	0
-	.byte	0
-	.uleb128 0x43
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -7548,7 +7841,7 @@ __func__.6033:
 	.uleb128 0x5
 	.byte	0
 	.byte	0
-	.uleb128 0x44
+	.uleb128 0x43
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -7559,13 +7852,19 @@ __func__.6033:
 	.uleb128 0x5
 	.uleb128 0x27
 	.uleb128 0x19
-	.uleb128 0x20
-	.uleb128 0xb
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
 	.uleb128 0x1
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x45
+	.uleb128 0x44
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -7576,29 +7875,13 @@ __func__.6033:
 	.uleb128 0x5
 	.uleb128 0x49
 	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x46
-	.uleb128 0xb
-	.byte	0x1
-	.byte	0
-	.byte	0
-	.uleb128 0x47
-	.uleb128 0x34
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x34
-	.uleb128 0x19
 	.uleb128 0x2
-	.uleb128 0x18
+	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x48
+	.uleb128 0x45
 	.uleb128 0x4109
-	.byte	0
+	.byte	0x1
 	.uleb128 0x11
 	.uleb128 0x1
 	.uleb128 0x2115
@@ -7607,7 +7890,7 @@ __func__.6033:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x49
+	.uleb128 0x46
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -7615,67 +7898,38 @@ __func__.6033:
 	.uleb128 0x3a
 	.uleb128 0xb
 	.uleb128 0x3b
-	.uleb128 0xb
+	.uleb128 0x5
 	.uleb128 0x27
 	.uleb128 0x19
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x12
-	.uleb128 0x7
-	.uleb128 0x40
-	.uleb128 0x18
-	.uleb128 0x2117
-	.uleb128 0x19
+	.uleb128 0x20
+	.uleb128 0xb
 	.uleb128 0x1
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4a
+	.uleb128 0x47
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
-	.uleb128 0xe
+	.uleb128 0x8
 	.uleb128 0x3a
 	.uleb128 0xb
 	.uleb128 0x3b
-	.uleb128 0xb
+	.uleb128 0x5
 	.uleb128 0x49
 	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x4b
-	.uleb128 0x34
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
+	.uleb128 0x48
 	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x2
+	.byte	0x1
+	.uleb128 0x55
 	.uleb128 0x17
-	.byte	0
-	.byte	0
-	.uleb128 0x4c
-	.uleb128 0x34
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
+	.uleb128 0x1
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4d
+	.uleb128 0x49
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -7687,12 +7941,39 @@ __func__.6033:
 	.uleb128 0x58
 	.uleb128 0xb
 	.uleb128 0x59
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x4a
 	.uleb128 0xb
+	.byte	0x1
+	.byte	0
+	.byte	0
+	.uleb128 0x4b
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x34
+	.uleb128 0x19
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x4c
+	.uleb128 0x4109
+	.byte	0
+	.uleb128 0x11
 	.uleb128 0x1
+	.uleb128 0x2115
+	.uleb128 0x19
+	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4e
+	.uleb128 0x4d
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -7711,7 +7992,7 @@ __func__.6033:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4f
+	.uleb128 0x4e
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -7724,7 +8005,7 @@ __func__.6033:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x50
+	.uleb128 0x4f
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -7751,11 +8032,26 @@ __func__.6033:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x51
+	.uleb128 0x50
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
-	.uleb128 0x8
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x51
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
 	.uleb128 0x3a
 	.uleb128 0xb
 	.uleb128 0x3b
@@ -7800,67 +8096,6 @@ __func__.6033:
 	.byte	0
 	.uleb128 0x54
 	.uleb128 0x2e
-	.byte	0x1
-	.uleb128 0x31
-	.uleb128 0x13
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x12
-	.uleb128 0x7
-	.uleb128 0x40
-	.uleb128 0x18
-	.uleb128 0x2117
-	.uleb128 0x19
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x55
-	.uleb128 0x5
-	.byte	0
-	.uleb128 0x31
-	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x18
-	.byte	0
-	.byte	0
-	.uleb128 0x56
-	.uleb128 0x4109
-	.byte	0x1
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x2115
-	.uleb128 0x19
-	.uleb128 0x31
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x57
-	.uleb128 0xb
-	.byte	0x1
-	.uleb128 0x55
-	.uleb128 0x17
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x58
-	.uleb128 0x1d
-	.byte	0x1
-	.uleb128 0x31
-	.uleb128 0x13
-	.uleb128 0x52
-	.uleb128 0x1
-	.uleb128 0x55
-	.uleb128 0x17
-	.uleb128 0x58
-	.uleb128 0xb
-	.uleb128 0x59
-	.uleb128 0x5
-	.byte	0
-	.byte	0
-	.uleb128 0x59
-	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
 	.uleb128 0x19
@@ -7876,7 +8111,7 @@ __func__.6033:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x5a
+	.uleb128 0x55
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -7896,46 +8131,46 @@ __func__.6033:
 	.byte	0
 	.section	.debug_loc,"",@progbits
 .Ldebug_loc0:
-.LLST122:
-	.8byte	.LVL309
-	.8byte	.LVL310
+.LLST135:
+	.8byte	.LVL334
+	.8byte	.LVL335
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL310
-	.8byte	.LVL311
+	.8byte	.LVL335
+	.8byte	.LVL336
 	.2byte	0x3
 	.byte	0x71
 	.sleb128 1
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST120:
-	.8byte	.LVL301
-	.8byte	.LVL302
+.LLST133:
+	.8byte	.LVL326
+	.8byte	.LVL327
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL302
-	.8byte	.LVL304
+	.8byte	.LVL327
+	.8byte	.LVL329
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL304
-	.8byte	.LVL305
+	.8byte	.LVL329
+	.8byte	.LVL330
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL305
-	.8byte	.LVL306
+	.8byte	.LVL330
+	.8byte	.LVL331
 	.2byte	0x9
 	.byte	0x3
 	.8byte	global_waveform
-	.8byte	.LVL306
-	.8byte	.LVL307
+	.8byte	.LVL331
+	.8byte	.LVL332
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL307
-	.8byte	.LFE233
+	.8byte	.LVL332
+	.8byte	.LFE231
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -7943,33 +8178,33 @@ __func__.6033:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST121:
-	.8byte	.LVL301
-	.8byte	.LVL302
+.LLST134:
+	.8byte	.LVL326
+	.8byte	.LVL327
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL302
-	.8byte	.LVL304
+	.8byte	.LVL327
+	.8byte	.LVL329
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL304
-	.8byte	.LVL305
+	.8byte	.LVL329
+	.8byte	.LVL330
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL305
-	.8byte	.LVL306
+	.8byte	.LVL330
+	.8byte	.LVL331
 	.2byte	0x9
 	.byte	0x3
 	.8byte	global_waveform
-	.8byte	.LVL306
-	.8byte	.LVL307
+	.8byte	.LVL331
+	.8byte	.LVL332
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL307
-	.8byte	.LFE233
+	.8byte	.LVL332
+	.8byte	.LFE231
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -7977,7 +8212,7 @@ __func__.6033:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST64:
+.LLST60:
 	.8byte	.LVL180
 	.8byte	.LVL188
 	.2byte	0x1
@@ -7991,48 +8226,66 @@ __func__.6033:
 	.2byte	0x1
 	.byte	0x50
 	.8byte	.LVL193
-	.8byte	.LVL249
+	.8byte	.LVL250
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL249
 	.8byte	.LVL250
+	.8byte	.LVL251
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL250
-	.8byte	.LVL295
+	.8byte	.LVL251
+	.8byte	.LVL252
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL295
-	.8byte	.LVL296
+	.8byte	.LVL252
+	.8byte	.LVL253
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL253
+	.8byte	.LVL307
 	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL307
+	.8byte	.LVL320
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
 	.byte	0x50
-	.8byte	.LVL296
-	.8byte	.LVL297
+	.byte	0x9f
+	.8byte	.LVL320
+	.8byte	.LVL321
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL321
+	.8byte	.LVL322
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL297
-	.8byte	.LVL298
+	.8byte	.LVL322
+	.8byte	.LVL323
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL298
-	.8byte	.LVL299
+	.8byte	.LVL323
+	.8byte	.LVL324
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL299
-	.8byte	.LVL300
+	.8byte	.LVL324
+	.8byte	.LVL325
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL300
-	.8byte	.LFE232
+	.8byte	.LVL325
+	.8byte	.LFE230
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -8040,7 +8293,7 @@ __func__.6033:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST65:
+.LLST61:
 	.8byte	.LVL180
 	.8byte	.LVL190-1
 	.2byte	0x1
@@ -8058,85 +8311,96 @@ __func__.6033:
 	.2byte	0x1
 	.byte	0x65
 	.8byte	.LVL196
-	.8byte	.LVL235
+	.8byte	.LVL236
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL235
-	.8byte	.LVL243
+	.8byte	.LVL236
+	.8byte	.LVL244
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL243
 	.8byte	.LVL244
+	.8byte	.LVL245
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL244
 	.8byte	.LVL245
+	.8byte	.LVL246
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL245
-	.8byte	.LVL247
+	.8byte	.LVL246
+	.8byte	.LVL248
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL247
 	.8byte	.LVL248
+	.8byte	.LVL249
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL248
-	.8byte	.LVL250
+	.8byte	.LVL249
+	.8byte	.LVL251
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL250
 	.8byte	.LVL251
+	.8byte	.LVL252
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL251
 	.8byte	.LVL252
+	.8byte	.LVL253
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL252
-	.8byte	.LVL255
+	.8byte	.LVL253
+	.8byte	.LVL256
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL255
-	.8byte	.LVL285
+	.8byte	.LVL256
+	.8byte	.LVL286
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL285
-	.8byte	.LVL288
+	.8byte	.LVL286
+	.8byte	.LVL289
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL288
-	.8byte	.LVL295
+	.8byte	.LVL289
+	.8byte	.LVL296
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL295
-	.8byte	.LFE232
+	.8byte	.LVL296
+	.8byte	.LVL306
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL306
+	.8byte	.LVL320
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL320
+	.8byte	.LFE230
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST66:
+.LLST62:
 	.8byte	.LVL180
 	.8byte	.LVL190-1
 	.2byte	0x1
@@ -8153,19 +8417,19 @@ __func__.6033:
 	.2byte	0x1
 	.byte	0x52
 	.8byte	.LVL193
-	.8byte	.LVL295
+	.8byte	.LVL320
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x52
 	.byte	0x9f
-	.8byte	.LVL295
-	.8byte	.LFE232
+	.8byte	.LVL320
+	.8byte	.LFE230
 	.2byte	0x1
 	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST67:
+.LLST63:
 	.8byte	.LVL181
 	.8byte	.LVL187
 	.2byte	0x1
@@ -8176,7 +8440,7 @@ __func__.6033:
 	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST68:
+.LLST64:
 	.8byte	.LVL181
 	.8byte	.LVL187
 	.2byte	0x1
@@ -8187,7 +8451,7 @@ __func__.6033:
 	.byte	0x54
 	.8byte	0
 	.8byte	0
-.LLST69:
+.LLST65:
 	.8byte	.LVL181
 	.8byte	.LVL183
 	.2byte	0x1
@@ -8230,7 +8494,7 @@ __func__.6033:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST70:
+.LLST66:
 	.8byte	.LVL181
 	.8byte	.LVL183
 	.2byte	0x3
@@ -8255,7 +8519,7 @@ __func__.6033:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST71:
+.LLST67:
 	.8byte	.LVL182
 	.8byte	.LVL185
 	.2byte	0x1
@@ -8270,133 +8534,140 @@ __func__.6033:
 	.byte	0x53
 	.8byte	0
 	.8byte	0
-.LLST72:
+.LLST68:
 	.8byte	.LVL189
 	.8byte	.LVL190-1
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST73:
+.LLST69:
 	.8byte	.LVL193
-	.8byte	.LVL215
+	.8byte	.LVL197
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST70:
+	.8byte	.LVL193
+	.8byte	.LVL216
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL217
-	.8byte	.LVL235
+	.8byte	.LVL218
+	.8byte	.LVL236
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST74:
+.LLST71:
 	.8byte	.LVL194
 	.8byte	.LVL195-1
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST75:
-	.8byte	.LVL197
-	.8byte	.LVL199
+.LLST72:
+	.8byte	.LVL198
+	.8byte	.LVL200
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL199
-	.8byte	.LVL215
+	.8byte	.LVL200
+	.8byte	.LVL216
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL217
-	.8byte	.LVL235
+	.8byte	.LVL218
+	.8byte	.LVL236
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST76:
-	.8byte	.LVL198
-	.8byte	.LVL201
+.LLST73:
+	.8byte	.LVL199
+	.8byte	.LVL202
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST77:
-	.8byte	.LVL198
-	.8byte	.LVL201
+.LLST74:
+	.8byte	.LVL199
+	.8byte	.LVL202
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST78:
-	.8byte	.LVL202
-	.8byte	.LVL208
+.LLST75:
+	.8byte	.LVL203
+	.8byte	.LVL209
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL217
-	.8byte	.LVL220
+	.8byte	.LVL218
+	.8byte	.LVL221
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST79:
-	.8byte	.LVL202
+.LLST76:
 	.8byte	.LVL203
+	.8byte	.LVL204
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL203
-	.8byte	.LVL208
+	.8byte	.LVL204
+	.8byte	.LVL209
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL217
-	.8byte	.LVL220
+	.8byte	.LVL218
+	.8byte	.LVL221
 	.2byte	0x1
 	.byte	0x68
 	.8byte	0
 	.8byte	0
-.LLST80:
-	.8byte	.LVL204
+.LLST77:
 	.8byte	.LVL205
+	.8byte	.LVL206
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL206
 	.8byte	.LVL207
+	.8byte	.LVL208
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL207
-	.8byte	.LVL208-1
+	.8byte	.LVL208
+	.8byte	.LVL209-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL217
 	.8byte	.LVL218
+	.8byte	.LVL219
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL218
 	.8byte	.LVL219
+	.8byte	.LVL220
 	.2byte	0x1
 	.byte	0x53
 	.8byte	0
 	.8byte	0
-.LLST81:
-	.8byte	.LVL209
-	.8byte	.LVL213
+.LLST78:
+	.8byte	.LVL210
+	.8byte	.LVL214
 	.2byte	0x6
 	.byte	0xf2
-	.4byte	.Ldebug_info0+5007
+	.4byte	.Ldebug_info0+4776
 	.sleb128 0
-	.8byte	.LVL220
-	.8byte	.LVL235
+	.8byte	.LVL221
+	.8byte	.LVL236
 	.2byte	0x6
 	.byte	0xf2
-	.4byte	.Ldebug_info0+5007
+	.4byte	.Ldebug_info0+4776
 	.sleb128 0
 	.8byte	0
 	.8byte	0
-.LLST82:
-	.8byte	.LVL210
-	.8byte	.LVL212
+.LLST79:
+	.8byte	.LVL211
+	.8byte	.LVL213
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL212
 	.8byte	.LVL213
+	.8byte	.LVL214
 	.2byte	0x8
 	.byte	0x72
 	.sleb128 0
@@ -8406,8 +8677,8 @@ __func__.6033:
 	.sleb128 0
 	.byte	0x22
 	.byte	0x9f
-	.8byte	.LVL220
-	.8byte	.LVL233
+	.8byte	.LVL221
+	.8byte	.LVL234
 	.2byte	0x8
 	.byte	0x72
 	.sleb128 1
@@ -8417,8 +8688,8 @@ __func__.6033:
 	.sleb128 0
 	.byte	0x22
 	.byte	0x9f
-	.8byte	.LVL233
 	.8byte	.LVL234
+	.8byte	.LVL235
 	.2byte	0x8
 	.byte	0x72
 	.sleb128 0
@@ -8428,99 +8699,99 @@ __func__.6033:
 	.sleb128 0
 	.byte	0x22
 	.byte	0x9f
-	.8byte	.LVL234
 	.8byte	.LVL235
+	.8byte	.LVL236
 	.2byte	0x1
 	.byte	0x68
 	.8byte	0
 	.8byte	0
-.LLST83:
-	.8byte	.LVL212
+.LLST80:
 	.8byte	.LVL213
+	.8byte	.LVL214
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL220
-	.8byte	.LVL232
+	.8byte	.LVL221
+	.8byte	.LVL233
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL232
 	.8byte	.LVL233
+	.8byte	.LVL234
 	.2byte	0x3
 	.byte	0x72
 	.sleb128 1
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST84:
-	.8byte	.LVL221
+.LLST81:
 	.8byte	.LVL222
+	.8byte	.LVL223
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL222
-	.8byte	.LVL230
+	.8byte	.LVL223
+	.8byte	.LVL231
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL230
 	.8byte	.LVL231
+	.8byte	.LVL232
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 1
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST85:
-	.8byte	.LVL223
+.LLST82:
 	.8byte	.LVL224
+	.8byte	.LVL225
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST86:
-	.8byte	.LVL227
+.LLST83:
 	.8byte	.LVL228
+	.8byte	.LVL229
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL228
 	.8byte	.LVL229
+	.8byte	.LVL230
 	.2byte	0x3
 	.byte	0x71
 	.sleb128 1
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST87:
-	.8byte	.LVL221
-	.8byte	.LVL234
+.LLST84:
+	.8byte	.LVL222
+	.8byte	.LVL235
 	.2byte	0x1
 	.byte	0x56
 	.8byte	0
 	.8byte	0
-.LLST88:
-	.8byte	.LVL209
-	.8byte	.LVL212
+.LLST85:
+	.8byte	.LVL210
+	.8byte	.LVL213
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL212
 	.8byte	.LVL213
+	.8byte	.LVL214
 	.2byte	0x5
 	.byte	0x72
 	.sleb128 0
 	.byte	0x38
 	.byte	0x24
 	.byte	0x9f
-	.8byte	.LVL220
-	.8byte	.LVL222
+	.8byte	.LVL221
+	.8byte	.LVL223
 	.2byte	0x5
 	.byte	0x72
 	.sleb128 0
 	.byte	0x38
 	.byte	0x24
 	.byte	0x9f
-	.8byte	.LVL222
-	.8byte	.LVL227
+	.8byte	.LVL223
+	.8byte	.LVL228
 	.2byte	0xa
 	.byte	0x73
 	.sleb128 0
@@ -8532,8 +8803,8 @@ __func__.6033:
 	.byte	0x24
 	.byte	0x22
 	.byte	0x9f
-	.8byte	.LVL227
 	.8byte	.LVL228
+	.8byte	.LVL229
 	.2byte	0xd
 	.byte	0x73
 	.sleb128 0
@@ -8548,8 +8819,8 @@ __func__.6033:
 	.sleb128 0
 	.byte	0x22
 	.byte	0x9f
-	.8byte	.LVL228
 	.8byte	.LVL229
+	.8byte	.LVL230
 	.2byte	0xf
 	.byte	0x73
 	.sleb128 0
@@ -8566,8 +8837,8 @@ __func__.6033:
 	.byte	0x23
 	.uleb128 0x1
 	.byte	0x9f
-	.8byte	.LVL230
 	.8byte	.LVL231
+	.8byte	.LVL232
 	.2byte	0xc
 	.byte	0x73
 	.sleb128 0
@@ -8581,39 +8852,39 @@ __func__.6033:
 	.byte	0x23
 	.uleb128 0x10
 	.byte	0x9f
-	.8byte	.LVL234
 	.8byte	.LVL235
+	.8byte	.LVL236
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST89:
-	.8byte	.LVL210
-	.8byte	.LVL213
+.LLST86:
+	.8byte	.LVL211
+	.8byte	.LVL214
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL220
-	.8byte	.LVL235
+	.8byte	.LVL221
+	.8byte	.LVL236
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST90:
-	.8byte	.LVL210
+.LLST87:
 	.8byte	.LVL211
+	.8byte	.LVL212
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST91:
-	.8byte	.LVL223
-	.8byte	.LVL226
+.LLST88:
+	.8byte	.LVL224
+	.8byte	.LVL227
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL226
-	.8byte	.LVL231
+	.8byte	.LVL227
+	.8byte	.LVL232
 	.2byte	0xd
 	.byte	0x76
 	.sleb128 0
@@ -8630,79 +8901,86 @@ __func__.6033:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST92:
-	.8byte	.LVL223
+.LLST89:
 	.8byte	.LVL224
+	.8byte	.LVL225
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL224
-	.8byte	.LVL234
+	.8byte	.LVL225
+	.8byte	.LVL235
 	.2byte	0x1
 	.byte	0x55
 	.8byte	0
 	.8byte	0
-.LLST93:
-	.8byte	.LVL214
+.LLST90:
 	.8byte	.LVL215
+	.8byte	.LVL216
 	.2byte	0x1
 	.byte	0x68
 	.8byte	0
 	.8byte	0
-.LLST94:
-	.8byte	.LVL252
-	.8byte	.LVL285
+.LLST91:
+	.8byte	.LVL253
+	.8byte	.LVL264
 	.2byte	0x1
-	.byte	0x63
+	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST95:
+.LLST92:
 	.8byte	.LVL253
-	.8byte	.LVL254-1
+	.8byte	.LVL286
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST93:
+	.8byte	.LVL254
+	.8byte	.LVL255-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL261
-	.8byte	.LVL262-1
+	.8byte	.LVL262
+	.8byte	.LVL263-1
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST96:
-	.8byte	.LVL255
-	.8byte	.LVL257
+.LLST94:
+	.8byte	.LVL256
+	.8byte	.LVL258
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL257
-	.8byte	.LVL263
+	.8byte	.LVL258
+	.8byte	.LVL264
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL263
 	.8byte	.LVL264
+	.8byte	.LVL265
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL264
-	.8byte	.LVL271
+	.8byte	.LVL265
+	.8byte	.LVL272
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST97:
-	.8byte	.LVL273
+.LLST95:
 	.8byte	.LVL274
+	.8byte	.LVL275
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST98:
-	.8byte	.LVL256
-	.8byte	.LVL259
+.LLST96:
+	.8byte	.LVL257
+	.8byte	.LVL260
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST99:
-	.8byte	.LVL256
+.LLST97:
 	.8byte	.LVL257
+	.8byte	.LVL258
 	.2byte	0xb
 	.byte	0x70
 	.sleb128 0
@@ -8715,8 +8993,8 @@ __func__.6033:
 	.byte	0x20
 	.byte	0x26
 	.byte	0x9f
-	.8byte	.LVL257
 	.8byte	.LVL258
+	.8byte	.LVL259
 	.2byte	0xb
 	.byte	0x85
 	.sleb128 0
@@ -8729,12 +9007,12 @@ __func__.6033:
 	.byte	0x20
 	.byte	0x26
 	.byte	0x9f
-	.8byte	.LVL258
-	.8byte	.LVL259-1
+	.8byte	.LVL259
+	.8byte	.LVL260-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL259-1
-	.8byte	.LVL259
+	.8byte	.LVL260-1
+	.8byte	.LVL260
 	.2byte	0xb
 	.byte	0x85
 	.sleb128 0
@@ -8749,17 +9027,17 @@ __func__.6033:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST100:
-	.8byte	.LVL265
-	.8byte	.LVL268
+.LLST98:
+	.8byte	.LVL266
+	.8byte	.LVL269
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST101:
-	.8byte	.LVL265
+.LLST99:
 	.8byte	.LVL266
+	.8byte	.LVL267
 	.2byte	0xb
 	.byte	0x84
 	.sleb128 0
@@ -8772,12 +9050,12 @@ __func__.6033:
 	.byte	0x20
 	.byte	0x26
 	.byte	0x9f
-	.8byte	.LVL266
-	.8byte	.LVL267-1
+	.8byte	.LVL267
+	.8byte	.LVL268-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL267-1
-	.8byte	.LVL268
+	.8byte	.LVL268-1
+	.8byte	.LVL269
 	.2byte	0xb
 	.byte	0x84
 	.sleb128 0
@@ -8792,87 +9070,87 @@ __func__.6033:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST102:
-	.8byte	.LVL270
-	.8byte	.LVL285
+.LLST100:
+	.8byte	.LVL271
+	.8byte	.LVL286
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST103:
-	.8byte	.LVL270
-	.8byte	.LVL273
+.LLST101:
+	.8byte	.LVL271
+	.8byte	.LVL274
 	.2byte	0x6
 	.byte	0xf2
-	.4byte	.Ldebug_info0+5655
+	.4byte	.Ldebug_info0+5413
 	.sleb128 0
-	.8byte	.LVL274
-	.8byte	.LVL285
+	.8byte	.LVL275
+	.8byte	.LVL286
 	.2byte	0x6
 	.byte	0xf2
-	.4byte	.Ldebug_info0+5655
+	.4byte	.Ldebug_info0+5413
 	.sleb128 0
 	.8byte	0
 	.8byte	0
-.LLST104:
-	.8byte	.LVL275
+.LLST102:
 	.8byte	.LVL276
+	.8byte	.LVL277
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL276
-	.8byte	.LVL281
+	.8byte	.LVL277
+	.8byte	.LVL282
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL281
 	.8byte	.LVL282
+	.8byte	.LVL283
 	.2byte	0x3
 	.byte	0x71
 	.sleb128 1
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST105:
-	.8byte	.LVL275
-	.8byte	.LVL285
+.LLST103:
+	.8byte	.LVL276
+	.8byte	.LVL286
 	.2byte	0x1
 	.byte	0x56
 	.8byte	0
 	.8byte	0
-.LLST106:
-	.8byte	.LVL270
-	.8byte	.LVL272
+.LLST104:
+	.8byte	.LVL271
+	.8byte	.LVL273
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL272
 	.8byte	.LVL273
+	.8byte	.LVL274
 	.2byte	0x3
 	.byte	0x72
 	.sleb128 -4
 	.byte	0x9f
-	.8byte	.LVL274
-	.8byte	.LVL284
+	.8byte	.LVL275
+	.8byte	.LVL285
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL284
 	.8byte	.LVL285
+	.8byte	.LVL286
 	.2byte	0x3
 	.byte	0x72
 	.sleb128 -8
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST107:
-	.8byte	.LVL270
-	.8byte	.LVL273
+.LLST105:
+	.8byte	.LVL271
+	.8byte	.LVL274
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL274
-	.8byte	.LVL276
+	.8byte	.LVL275
+	.8byte	.LVL277
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL276
-	.8byte	.LVL281
+	.8byte	.LVL277
+	.8byte	.LVL282
 	.2byte	0x8
 	.byte	0x71
 	.sleb128 0
@@ -8882,8 +9160,8 @@ __func__.6033:
 	.sleb128 0
 	.byte	0x22
 	.byte	0x9f
-	.8byte	.LVL281
 	.8byte	.LVL282
+	.8byte	.LVL283
 	.2byte	0x8
 	.byte	0x71
 	.sleb128 1
@@ -8893,8 +9171,8 @@ __func__.6033:
 	.sleb128 0
 	.byte	0x22
 	.byte	0x9f
-	.8byte	.LVL282
 	.8byte	.LVL283
+	.8byte	.LVL284
 	.2byte	0x8
 	.byte	0x71
 	.sleb128 0
@@ -8904,8 +9182,8 @@ __func__.6033:
 	.sleb128 0
 	.byte	0x22
 	.byte	0x9f
-	.8byte	.LVL283
-	.8byte	.LVL285
+	.8byte	.LVL284
+	.8byte	.LVL286
 	.2byte	0xb
 	.byte	0x71
 	.sleb128 0
@@ -8920,17 +9198,17 @@ __func__.6033:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST108:
-	.8byte	.LVL277
+.LLST106:
 	.8byte	.LVL278
+	.8byte	.LVL279
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL278
 	.8byte	.LVL279
+	.8byte	.LVL280
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL279
 	.8byte	.LVL280
+	.8byte	.LVL281
 	.2byte	0x13
 	.byte	0x77
 	.sleb128 0
@@ -8951,8 +9229,8 @@ __func__.6033:
 	.sleb128 0
 	.byte	0x21
 	.byte	0x9f
-	.8byte	.LVL280
-	.8byte	.LVL282
+	.8byte	.LVL281
+	.8byte	.LVL283
 	.2byte	0x17
 	.byte	0x77
 	.sleb128 0
@@ -8979,58 +9257,65 @@ __func__.6033:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST109:
-	.8byte	.LVL270
-	.8byte	.LVL272
+.LLST107:
+	.8byte	.LVL271
+	.8byte	.LVL273
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST110:
-	.8byte	.LVL235
-	.8byte	.LVL243
+.LLST108:
+	.8byte	.LVL236
+	.8byte	.LVL239
 	.2byte	0x1
-	.byte	0x63
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST109:
+	.8byte	.LVL236
 	.8byte	.LVL244
+	.2byte	0x1
+	.byte	0x63
 	.8byte	.LVL245
+	.8byte	.LVL246
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST111:
-	.8byte	.LVL236
-	.8byte	.LVL237-1
+.LLST110:
+	.8byte	.LVL237
+	.8byte	.LVL238-1
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST112:
-	.8byte	.LVL238
-	.8byte	.LVL240
+.LLST111:
+	.8byte	.LVL239
+	.8byte	.LVL241
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL240
-	.8byte	.LVL243
+	.8byte	.LVL241
+	.8byte	.LVL244
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL244
 	.8byte	.LVL245
+	.8byte	.LVL246
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST113:
-	.8byte	.LVL239
-	.8byte	.LVL242
+.LLST112:
+	.8byte	.LVL240
+	.8byte	.LVL243
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST114:
-	.8byte	.LVL239
+.LLST113:
 	.8byte	.LVL240
+	.8byte	.LVL241
 	.2byte	0xb
 	.byte	0x70
 	.sleb128 0
@@ -9043,8 +9328,8 @@ __func__.6033:
 	.byte	0x20
 	.byte	0x26
 	.byte	0x9f
-	.8byte	.LVL240
 	.8byte	.LVL241
+	.8byte	.LVL242
 	.2byte	0xb
 	.byte	0x84
 	.sleb128 0
@@ -9057,12 +9342,12 @@ __func__.6033:
 	.byte	0x20
 	.byte	0x26
 	.byte	0x9f
-	.8byte	.LVL241
-	.8byte	.LVL242-1
+	.8byte	.LVL242
+	.8byte	.LVL243-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL242-1
-	.8byte	.LVL242
+	.8byte	.LVL243-1
+	.8byte	.LVL243
 	.2byte	0xb
 	.byte	0x84
 	.sleb128 0
@@ -9077,50 +9362,61 @@ __func__.6033:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
+.LLST114:
+	.8byte	.LVL286
+	.8byte	.LVL290
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL292
+	.8byte	.LVL296
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
 .LLST115:
-	.8byte	.LVL285
-	.8byte	.LVL289
+	.8byte	.LVL286
+	.8byte	.LVL290
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL291
-	.8byte	.LVL295
+	.8byte	.LVL292
+	.8byte	.LVL296
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
 .LLST116:
-	.8byte	.LVL286
-	.8byte	.LVL287-1
+	.8byte	.LVL287
+	.8byte	.LVL288-1
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
 .LLST117:
-	.8byte	.LVL288
 	.8byte	.LVL289
+	.8byte	.LVL290
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL291
-	.8byte	.LVL293
+	.8byte	.LVL292
+	.8byte	.LVL294
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL293
-	.8byte	.LVL295
+	.8byte	.LVL294
+	.8byte	.LVL296
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
 .LLST118:
-	.8byte	.LVL292
-	.8byte	.LVL294
+	.8byte	.LVL293
+	.8byte	.LVL295
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
 .LLST119:
-	.8byte	.LVL292
-	.8byte	.LVL294-1
+	.8byte	.LVL293
+	.8byte	.LVL295-1
 	.2byte	0xd
 	.byte	0x83
 	.sleb128 0
@@ -9135,8 +9431,8 @@ __func__.6033:
 	.byte	0x20
 	.byte	0x26
 	.byte	0x9f
-	.8byte	.LVL294-1
-	.8byte	.LVL294
+	.8byte	.LVL295-1
+	.8byte	.LVL295
 	.2byte	0xb
 	.byte	0x85
 	.sleb128 0
@@ -9151,7 +9447,130 @@ __func__.6033:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST37:
+.LLST120:
+	.8byte	.LVL296
+	.8byte	.LVL300
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST121:
+	.8byte	.LVL296
+	.8byte	.LVL307
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL307
+	.8byte	.LVL320
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST122:
+	.8byte	.LVL297
+	.8byte	.LVL298-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST123:
+	.8byte	.LVL299
+	.8byte	.LVL302
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL302
+	.8byte	.LVL320
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST124:
+	.8byte	.LVL301
+	.8byte	.LVL304
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST125:
+	.8byte	.LVL301
+	.8byte	.LVL304
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST126:
+	.8byte	.LVL305
+	.8byte	.LVL320
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST127:
+	.8byte	.LVL305
+	.8byte	.LVL308
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+	.8byte	.LVL308
+	.8byte	.LVL320
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST128:
+	.8byte	.LVL310
+	.8byte	.LVL311
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST129:
+	.8byte	.LVL309
+	.8byte	.LVL310
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL310
+	.8byte	.LVL317
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL317
+	.8byte	.LVL318
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST130:
+	.8byte	.LVL311
+	.8byte	.LVL315
+	.2byte	0x1
+	.byte	0x56
+	.8byte	.LVL316
+	.8byte	.LVL319-1
+	.2byte	0x1
+	.byte	0x56
+	.8byte	0
+	.8byte	0
+.LLST131:
+	.8byte	.LVL311
+	.8byte	.LVL312
+	.2byte	0x1
+	.byte	0x53
+	.8byte	0
+	.8byte	0
+.LLST132:
+	.8byte	.LVL311
+	.8byte	.LVL312
+	.2byte	0x1
+	.byte	0x56
+	.8byte	0
+	.8byte	0
+.LLST33:
 	.8byte	.LVL141
 	.8byte	.LVL142
 	.2byte	0x1
@@ -9168,12 +9587,12 @@ __func__.6033:
 	.byte	0x50
 	.byte	0x9f
 	.8byte	.LVL151
-	.8byte	.LFE229
+	.8byte	.LFE227
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST38:
+.LLST34:
 	.8byte	.LVL141
 	.8byte	.LVL143-1
 	.2byte	0x1
@@ -9183,7 +9602,7 @@ __func__.6033:
 	.2byte	0x1
 	.byte	0x63
 	.8byte	.LVL145
-	.8byte	.LFE229
+	.8byte	.LFE227
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9191,13 +9610,13 @@ __func__.6033:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST39:
+.LLST35:
 	.8byte	.LVL141
 	.8byte	.LVL143-1
 	.2byte	0x1
 	.byte	0x52
 	.8byte	.LVL143-1
-	.8byte	.LFE229
+	.8byte	.LFE227
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9205,14 +9624,14 @@ __func__.6033:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST40:
+.LLST36:
 	.8byte	.LVL143
 	.8byte	.LVL144-1
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST41:
+.LLST37:
 	.8byte	.LVL145
 	.8byte	.LVL146
 	.2byte	0x1
@@ -9222,12 +9641,12 @@ __func__.6033:
 	.2byte	0x1
 	.byte	0x63
 	.8byte	.LVL151
-	.8byte	.LFE229
+	.8byte	.LFE227
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST42:
+.LLST38:
 	.8byte	.LVL145
 	.8byte	.LVL148
 	.2byte	0x2
@@ -9235,7 +9654,7 @@ __func__.6033:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST43:
+.LLST39:
 	.8byte	.LVL145
 	.8byte	.LVL146
 	.2byte	0xb
@@ -9284,7 +9703,7 @@ __func__.6033:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST44:
+.LLST40:
 	.8byte	.LVL152
 	.8byte	.LVL153
 	.2byte	0x1
@@ -9301,12 +9720,12 @@ __func__.6033:
 	.byte	0x50
 	.byte	0x9f
 	.8byte	.LVL170
-	.8byte	.LFE227
+	.8byte	.LFE224
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST45:
+.LLST41:
 	.8byte	.LVL152
 	.8byte	.LVL154-1
 	.2byte	0x1
@@ -9316,7 +9735,7 @@ __func__.6033:
 	.2byte	0x1
 	.byte	0x63
 	.8byte	.LVL156
-	.8byte	.LFE227
+	.8byte	.LFE224
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9324,14 +9743,14 @@ __func__.6033:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST46:
+.LLST42:
 	.8byte	.LVL154
 	.8byte	.LVL155-1
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST47:
+.LLST43:
 	.8byte	.LVL156
 	.8byte	.LVL157
 	.2byte	0x1
@@ -9341,12 +9760,12 @@ __func__.6033:
 	.2byte	0x1
 	.byte	0x63
 	.8byte	.LVL170
-	.8byte	.LFE227
+	.8byte	.LFE224
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST48:
+.LLST44:
 	.8byte	.LVL156
 	.8byte	.LVL159
 	.2byte	0x2
@@ -9354,7 +9773,7 @@ __func__.6033:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST49:
+.LLST45:
 	.8byte	.LVL156
 	.8byte	.LVL157
 	.2byte	0xb
@@ -9403,22 +9822,22 @@ __func__.6033:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST50:
+.LLST46:
 	.8byte	.LVL161
 	.8byte	.LVL165
 	.2byte	0x6
 	.byte	0xf2
-	.4byte	.Ldebug_info0+7169
+	.4byte	.Ldebug_info0+7400
 	.sleb128 0
 	.8byte	.LVL170
 	.8byte	.LVL179
 	.2byte	0x6
 	.byte	0xf2
-	.4byte	.Ldebug_info0+7169
+	.4byte	.Ldebug_info0+7400
 	.sleb128 0
 	.8byte	0
 	.8byte	0
-.LLST51:
+.LLST47:
 	.8byte	.LVL161
 	.8byte	.LVL164
 	.2byte	0x1
@@ -9443,7 +9862,7 @@ __func__.6033:
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST52:
+.LLST48:
 	.8byte	.LVL173
 	.8byte	.LVL174
 	.2byte	0x8
@@ -9470,7 +9889,7 @@ __func__.6033:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST53:
+.LLST49:
 	.8byte	.LVL173
 	.8byte	.LVL174
 	.2byte	0x8
@@ -9497,7 +9916,7 @@ __func__.6033:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST54:
+.LLST50:
 	.8byte	.LVL173
 	.8byte	.LVL174
 	.2byte	0x10
@@ -9542,21 +9961,21 @@ __func__.6033:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST55:
+.LLST51:
 	.8byte	.LVL171
 	.8byte	.LVL178
 	.2byte	0x1
 	.byte	0x58
 	.8byte	0
 	.8byte	0
-.LLST56:
+.LLST52:
 	.8byte	.LVL172
 	.8byte	.LVL178
 	.2byte	0x1
 	.byte	0x57
 	.8byte	0
 	.8byte	0
-.LLST57:
+.LLST53:
 	.8byte	.LVL161
 	.8byte	.LVL164
 	.2byte	0x2
@@ -9609,7 +10028,7 @@ __func__.6033:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST58:
+.LLST54:
 	.8byte	.LVL164
 	.8byte	.LVL165
 	.2byte	0x1
@@ -9620,7 +10039,7 @@ __func__.6033:
 	.byte	0x53
 	.8byte	0
 	.8byte	0
-.LLST59:
+.LLST55:
 	.8byte	.LVL172
 	.8byte	.LVL175
 	.2byte	0x1
@@ -9633,7 +10052,7 @@ __func__.6033:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST60:
+.LLST56:
 	.8byte	.LVL161
 	.8byte	.LVL165
 	.2byte	0x1
@@ -9644,7 +10063,7 @@ __func__.6033:
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST61:
+.LLST57:
 	.8byte	.LVL161
 	.8byte	.LVL163
 	.2byte	0x2
@@ -9652,7 +10071,7 @@ __func__.6033:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST62:
+.LLST58:
 	.8byte	.LVL161
 	.8byte	.LVL162
 	.2byte	0xb
@@ -9681,818 +10100,304 @@ __func__.6033:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST63:
+.LLST59:
 	.8byte	.LVL166
 	.8byte	.LVL167
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST29:
-	.8byte	.LVL114
-	.8byte	.LVL115
+.LLST4:
+	.8byte	.LVL27
+	.8byte	.LVL28
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL115
-	.8byte	.LVL122
+	.8byte	.LVL28
+	.8byte	.LVL39
 	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL122
-	.8byte	.LVL125
+	.byte	0x66
+	.8byte	.LVL39
+	.8byte	.LVL40-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL40-1
+	.8byte	.LFE222
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL125
-	.8byte	.LVL134
+	.8byte	0
+	.8byte	0
+.LLST5:
+	.8byte	.LVL27
+	.8byte	.LVL29
 	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL134
-	.8byte	.LVL135
+	.byte	0x51
+	.8byte	.LVL29
+	.8byte	.LVL38
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL38
+	.8byte	.LFE222
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
-	.byte	0x50
+	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL135
-	.8byte	.LVL139-1
+	.8byte	0
+	.8byte	0
+.LLST6:
+	.8byte	.LVL31
+	.8byte	.LVL32
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST7:
+	.8byte	.LVL30
+	.8byte	.LVL31
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL31
+	.8byte	.LVL36
 	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL139-1
-	.8byte	.LVL139
+	.byte	0x54
+	.8byte	.LVL36
+	.8byte	.LVL37
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST8:
+	.8byte	.LVL32
+	.8byte	.LVL33
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL34
+	.8byte	.LVL35
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL36
+	.8byte	.LVL40-1
+	.2byte	0x1
+	.byte	0x55
+	.8byte	0
+	.8byte	0
+.LLST9:
+	.8byte	.LVL41
+	.8byte	.LVL42
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL42
+	.8byte	.LVL52
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL52
+	.8byte	.LVL53-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL53-1
+	.8byte	.LFE220
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL139
-	.8byte	.LFE219
+	.8byte	0
+	.8byte	0
+.LLST10:
+	.8byte	.LVL41
+	.8byte	.LVL43
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL43
+	.8byte	.LVL52
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL52
+	.8byte	.LFE220
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST11:
+	.8byte	.LVL48
+	.8byte	.LVL50
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST12:
+	.8byte	.LVL46
+	.8byte	.LVL47
+	.2byte	0x1
+	.byte	0x54
+	.8byte	0
+	.8byte	0
+.LLST13:
+	.8byte	.LVL44
+	.8byte	.LVL45
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL45
+	.8byte	.LVL51
 	.2byte	0x1
 	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST30:
-	.8byte	.LVL114
-	.8byte	.LVL123
+.LLST24:
+	.8byte	.LVL117
+	.8byte	.LVL119
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL119
+	.8byte	.LFE215
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST25:
+	.8byte	.LVL117
+	.8byte	.LVL124
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL123
-	.8byte	.LVL125
+	.8byte	.LVL124
+	.8byte	.LVL126
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL125
-	.8byte	.LVL139-1
+	.8byte	.LVL126
+	.8byte	.LVL131
 	.2byte	0x1
 	.byte	0x51
+	.8byte	.LVL131
+	.8byte	.LFE215
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST26:
+	.8byte	.LVL117
+	.8byte	.LVL124
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL124
+	.8byte	.LVL126
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	.LVL126
+	.8byte	.LVL133
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL133
+	.8byte	.LVL134
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	.LVL134
+	.8byte	.LVL137
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL137
+	.8byte	.LVL139-1
+	.2byte	0x1
+	.byte	0x57
 	.8byte	.LVL139-1
 	.8byte	.LVL139
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
-	.byte	0x51
+	.byte	0x52
 	.byte	0x9f
 	.8byte	.LVL139
 	.8byte	.LVL140
 	.2byte	0x1
-	.byte	0x51
+	.byte	0x52
 	.8byte	.LVL140
-	.8byte	.LFE219
+	.8byte	.LFE215
 	.2byte	0x1
-	.byte	0x58
+	.byte	0x57
 	.8byte	0
 	.8byte	0
-.LLST31:
-	.8byte	.LVL116
-	.8byte	.LVL124-1
+.LLST27:
+	.8byte	.LVL118
+	.8byte	.LVL125-1
 	.2byte	0x1
-	.byte	0x56
-	.8byte	.LVL125
+	.byte	0x54
+	.8byte	.LVL126
+	.8byte	.LVL139-1
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL139
+	.8byte	.LFE215
+	.2byte	0x1
+	.byte	0x54
+	.8byte	0
+	.8byte	0
+.LLST28:
+	.8byte	.LVL120
+	.8byte	.LVL124
+	.2byte	0x1
+	.byte	0x58
+	.8byte	.LVL126
+	.8byte	.LVL129
+	.2byte	0x1
+	.byte	0x58
+	.8byte	.LVL129
 	.8byte	.LVL139-1
 	.2byte	0x1
 	.byte	0x56
 	.8byte	.LVL139
-	.8byte	.LFE219
+	.8byte	.LFE215
 	.2byte	0x1
 	.byte	0x56
 	.8byte	0
 	.8byte	0
-.LLST32:
-	.8byte	.LVL118
+.LLST29:
 	.8byte	.LVL122
+	.8byte	.LVL124
 	.2byte	0x1
-	.byte	0x5a
-	.8byte	.LVL125
-	.8byte	.LVL128
+	.byte	0x55
+	.8byte	.LVL126
+	.8byte	.LVL131
 	.2byte	0x1
-	.byte	0x5a
-	.8byte	.LVL128
-	.8byte	.LVL138
+	.byte	0x55
+	.8byte	.LVL131
+	.8byte	.LVL135
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL138
+	.byte	0x51
+	.8byte	.LVL135
 	.8byte	.LVL139-1
-	.2byte	0x54
-	.byte	0x72
-	.sleb128 0
-	.byte	0x32
-	.byte	0x24
-	.byte	0x76
-	.sleb128 32
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x22
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x8
-	.byte	0x20
-	.byte	0x26
-	.byte	0x76
-	.sleb128 0
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x1
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x38
-	.byte	0x24
-	.byte	0x72
-	.sleb128 0
-	.byte	0x32
-	.byte	0x24
-	.byte	0x76
-	.sleb128 32
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x22
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x8
-	.byte	0x20
-	.byte	0x26
-	.byte	0x76
-	.sleb128 0
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x2
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x40
-	.byte	0x24
-	.byte	0x21
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x21
-	.byte	0x71
-	.sleb128 0
-	.byte	0x32
-	.byte	0x24
-	.byte	0x22
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x8
-	.byte	0x20
-	.byte	0x26
-	.byte	0x76
-	.sleb128 0
-	.byte	0x22
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.8byte	.LVL139
-	.8byte	.LVL140
-	.2byte	0x54
-	.byte	0x72
-	.sleb128 0
-	.byte	0x32
-	.byte	0x24
-	.byte	0x76
-	.sleb128 32
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x22
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x8
-	.byte	0x20
-	.byte	0x26
-	.byte	0x76
-	.sleb128 0
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x1
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x38
-	.byte	0x24
-	.byte	0x72
-	.sleb128 0
-	.byte	0x32
-	.byte	0x24
-	.byte	0x76
-	.sleb128 32
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x22
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x8
-	.byte	0x20
-	.byte	0x26
-	.byte	0x76
-	.sleb128 0
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x2
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x40
-	.byte	0x24
-	.byte	0x21
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x21
-	.byte	0x71
-	.sleb128 0
-	.byte	0x32
-	.byte	0x24
-	.byte	0x22
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x8
-	.byte	0x20
-	.byte	0x26
-	.byte	0x76
-	.sleb128 0
-	.byte	0x22
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.8byte	.LVL140
-	.8byte	.LFE219
-	.2byte	0x54
-	.byte	0x72
-	.sleb128 0
-	.byte	0x32
-	.byte	0x24
-	.byte	0x76
-	.sleb128 32
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x22
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x8
-	.byte	0x20
-	.byte	0x26
-	.byte	0x76
-	.sleb128 0
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x1
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x38
-	.byte	0x24
-	.byte	0x72
-	.sleb128 0
-	.byte	0x32
-	.byte	0x24
-	.byte	0x76
-	.sleb128 32
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x22
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x8
-	.byte	0x20
-	.byte	0x26
-	.byte	0x76
-	.sleb128 0
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x2
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x40
-	.byte	0x24
-	.byte	0x21
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x21
-	.byte	0x78
-	.sleb128 0
-	.byte	0x32
-	.byte	0x24
-	.byte	0x22
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x8
-	.byte	0x20
-	.byte	0x26
-	.byte	0x76
-	.sleb128 0
-	.byte	0x22
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST33:
-	.8byte	.LVL120
-	.8byte	.LVL122
-	.2byte	0x1
-	.byte	0x54
-	.8byte	.LVL125
-	.8byte	.LVL130
-	.2byte	0x1
-	.byte	0x54
-	.8byte	.LVL130
-	.8byte	.LVL139-1
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL139
-	.8byte	.LFE219
-	.2byte	0x1
-	.byte	0x55
-	.8byte	0
-	.8byte	0
-.LLST34:
-	.8byte	.LVL121
-	.8byte	.LVL122
-	.2byte	0x1
-	.byte	0x57
-	.8byte	.LVL125
-	.8byte	.LVL131
-	.2byte	0x1
-	.byte	0x57
-	.8byte	.LVL131
-	.8byte	.LVL136
-	.2byte	0x1
-	.byte	0x54
-	.8byte	.LVL136
-	.8byte	.LVL139-1
-	.2byte	0x56
-	.byte	0x72
-	.sleb128 0
-	.byte	0x32
-	.byte	0x24
-	.byte	0x76
-	.sleb128 32
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x22
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x8
-	.byte	0x20
-	.byte	0x26
-	.byte	0x76
-	.sleb128 0
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x1
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x38
-	.byte	0x24
-	.byte	0x72
-	.sleb128 0
-	.byte	0x32
-	.byte	0x24
-	.byte	0x76
-	.sleb128 32
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x22
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x8
-	.byte	0x20
-	.byte	0x26
-	.byte	0x76
-	.sleb128 0
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x2
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x40
-	.byte	0x24
-	.byte	0x21
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x21
-	.byte	0x71
-	.sleb128 0
-	.byte	0x32
-	.byte	0x24
-	.byte	0x22
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x8
-	.byte	0x20
-	.byte	0x26
-	.byte	0x76
-	.sleb128 0
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x2
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.8byte	.LVL139
-	.8byte	.LVL140
-	.2byte	0x56
-	.byte	0x72
-	.sleb128 0
-	.byte	0x32
-	.byte	0x24
-	.byte	0x76
-	.sleb128 32
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x22
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x8
-	.byte	0x20
-	.byte	0x26
-	.byte	0x76
-	.sleb128 0
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x1
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x38
-	.byte	0x24
-	.byte	0x72
-	.sleb128 0
-	.byte	0x32
-	.byte	0x24
-	.byte	0x76
-	.sleb128 32
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x22
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x8
-	.byte	0x20
-	.byte	0x26
-	.byte	0x76
-	.sleb128 0
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x2
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x40
-	.byte	0x24
-	.byte	0x21
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x21
-	.byte	0x71
-	.sleb128 0
-	.byte	0x32
-	.byte	0x24
-	.byte	0x22
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x8
-	.byte	0x20
-	.byte	0x26
-	.byte	0x76
-	.sleb128 0
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x2
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.8byte	.LVL140
-	.8byte	.LFE219
-	.2byte	0x56
-	.byte	0x72
-	.sleb128 0
-	.byte	0x32
-	.byte	0x24
-	.byte	0x76
-	.sleb128 32
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x22
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x8
-	.byte	0x20
-	.byte	0x26
-	.byte	0x76
-	.sleb128 0
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x1
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x38
-	.byte	0x24
-	.byte	0x72
-	.sleb128 0
-	.byte	0x32
-	.byte	0x24
-	.byte	0x76
-	.sleb128 32
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x22
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x8
-	.byte	0x20
-	.byte	0x26
-	.byte	0x76
-	.sleb128 0
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x2
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x40
-	.byte	0x24
-	.byte	0x21
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x21
-	.byte	0x78
-	.sleb128 0
-	.byte	0x32
-	.byte	0x24
-	.byte	0x22
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x8
-	.byte	0x20
-	.byte	0x26
-	.byte	0x76
-	.sleb128 0
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x2
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST35:
-	.8byte	.LVL121
-	.8byte	.LVL122
-	.2byte	0x1d
-	.byte	0x72
-	.sleb128 0
-	.byte	0x32
-	.byte	0x24
-	.byte	0x76
-	.sleb128 32
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x22
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x8
-	.byte	0x20
-	.byte	0x26
-	.byte	0x76
-	.sleb128 0
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x3
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.8byte	.LVL125
-	.8byte	.LVL131
-	.2byte	0x1d
-	.byte	0x72
-	.sleb128 0
-	.byte	0x32
-	.byte	0x24
-	.byte	0x76
-	.sleb128 32
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x22
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x8
-	.byte	0x20
-	.byte	0x26
-	.byte	0x76
-	.sleb128 0
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x3
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.8byte	.LVL131
-	.8byte	.LVL132
-	.2byte	0x3c
-	.byte	0x72
-	.sleb128 0
-	.byte	0x32
-	.byte	0x24
-	.byte	0x76
-	.sleb128 32
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x22
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x8
-	.byte	0x20
-	.byte	0x26
-	.byte	0x76
-	.sleb128 0
-	.byte	0x22
-	.byte	0x23
+	.2byte	0x59
+	.byte	0xf3
 	.uleb128 0x1
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x38
-	.byte	0x24
-	.byte	0x77
-	.sleb128 0
-	.byte	0x40
-	.byte	0x24
-	.byte	0x21
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x21
-	.byte	0x78
-	.sleb128 0
-	.byte	0x32
-	.byte	0x24
-	.byte	0x22
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x8
-	.byte	0x20
-	.byte	0x26
-	.byte	0x76
-	.sleb128 0
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x3
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.8byte	.LVL132
-	.8byte	.LVL133
-	.2byte	0x56
-	.byte	0x72
-	.sleb128 0
+	.byte	0x50
 	.byte	0x32
 	.byte	0x24
-	.byte	0x76
+	.byte	0x74
 	.sleb128 32
 	.byte	0x94
 	.byte	0x1
@@ -10506,7 +10411,7 @@ __func__.6033:
 	.byte	0x8
 	.byte	0x20
 	.byte	0x26
-	.byte	0x76
+	.byte	0x74
 	.sleb128 0
 	.byte	0x22
 	.byte	0x23
@@ -10518,11 +10423,12 @@ __func__.6033:
 	.byte	0x1a
 	.byte	0x38
 	.byte	0x24
-	.byte	0x72
-	.sleb128 0
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
 	.byte	0x32
 	.byte	0x24
-	.byte	0x76
+	.byte	0x74
 	.sleb128 32
 	.byte	0x94
 	.byte	0x1
@@ -10536,7 +10442,7 @@ __func__.6033:
 	.byte	0x8
 	.byte	0x20
 	.byte	0x26
-	.byte	0x76
+	.byte	0x74
 	.sleb128 0
 	.byte	0x22
 	.byte	0x23
@@ -10549,11 +10455,12 @@ __func__.6033:
 	.byte	0x40
 	.byte	0x24
 	.byte	0x21
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x21
 	.byte	0x78
 	.sleb128 0
+	.byte	0x21
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
 	.byte	0x32
 	.byte	0x24
 	.byte	0x22
@@ -10563,25 +10470,26 @@ __func__.6033:
 	.byte	0x8
 	.byte	0x20
 	.byte	0x26
-	.byte	0x76
+	.byte	0x74
 	.sleb128 0
 	.byte	0x22
 	.byte	0x23
-	.uleb128 0x3
+	.uleb128 0x1
 	.byte	0x94
 	.byte	0x1
 	.byte	0x8
 	.byte	0xff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL133
-	.8byte	.LVL134
-	.2byte	0x56
-	.byte	0x72
-	.sleb128 0
+	.8byte	.LVL139
+	.8byte	.LFE215
+	.2byte	0x59
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
 	.byte	0x32
 	.byte	0x24
-	.byte	0x76
+	.byte	0x74
 	.sleb128 32
 	.byte	0x94
 	.byte	0x1
@@ -10595,7 +10503,7 @@ __func__.6033:
 	.byte	0x8
 	.byte	0x20
 	.byte	0x26
-	.byte	0x76
+	.byte	0x74
 	.sleb128 0
 	.byte	0x22
 	.byte	0x23
@@ -10607,11 +10515,12 @@ __func__.6033:
 	.byte	0x1a
 	.byte	0x38
 	.byte	0x24
-	.byte	0x72
-	.sleb128 0
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
 	.byte	0x32
 	.byte	0x24
-	.byte	0x76
+	.byte	0x74
 	.sleb128 32
 	.byte	0x94
 	.byte	0x1
@@ -10625,7 +10534,7 @@ __func__.6033:
 	.byte	0x8
 	.byte	0x20
 	.byte	0x26
-	.byte	0x76
+	.byte	0x74
 	.sleb128 0
 	.byte	0x22
 	.byte	0x23
@@ -10638,11 +10547,12 @@ __func__.6033:
 	.byte	0x40
 	.byte	0x24
 	.byte	0x21
-	.byte	0x7a
+	.byte	0x78
 	.sleb128 0
 	.byte	0x21
-	.byte	0x71
-	.sleb128 0
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
 	.byte	0x32
 	.byte	0x24
 	.byte	0x22
@@ -10652,26 +10562,37 @@ __func__.6033:
 	.byte	0x8
 	.byte	0x20
 	.byte	0x26
-	.byte	0x76
+	.byte	0x74
 	.sleb128 0
 	.byte	0x22
 	.byte	0x23
-	.uleb128 0x3
+	.uleb128 0x1
 	.byte	0x94
 	.byte	0x1
 	.byte	0x8
 	.byte	0xff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL134
-	.8byte	.LVL135
-	.2byte	0x58
+	.8byte	0
+	.8byte	0
+.LLST30:
+	.8byte	.LVL123
+	.8byte	.LVL124
+	.2byte	0x1
+	.byte	0x56
+	.8byte	.LVL126
+	.8byte	.LVL129
+	.2byte	0x1
+	.byte	0x56
+	.8byte	.LVL129
+	.8byte	.LVL132
+	.2byte	0x1e
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x32
 	.byte	0x24
-	.byte	0x76
+	.byte	0x74
 	.sleb128 32
 	.byte	0x94
 	.byte	0x1
@@ -10685,24 +10606,37 @@ __func__.6033:
 	.byte	0x8
 	.byte	0x20
 	.byte	0x26
-	.byte	0x76
+	.byte	0x74
 	.sleb128 0
 	.byte	0x22
 	.byte	0x23
-	.uleb128 0x1
+	.uleb128 0x2
 	.byte	0x94
 	.byte	0x1
 	.byte	0x8
 	.byte	0xff
 	.byte	0x1a
-	.byte	0x38
-	.byte	0x24
+	.byte	0x9f
+	.8byte	.LVL132
+	.8byte	.LVL139-1
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL139
+	.8byte	.LFE215
+	.2byte	0x1
+	.byte	0x55
+	.8byte	0
+	.8byte	0
+.LLST31:
+	.8byte	.LVL123
+	.8byte	.LVL124
+	.2byte	0x1e
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x32
 	.byte	0x24
-	.byte	0x76
+	.byte	0x74
 	.sleb128 32
 	.byte	0x94
 	.byte	0x1
@@ -10716,34 +10650,7 @@ __func__.6033:
 	.byte	0x8
 	.byte	0x20
 	.byte	0x26
-	.byte	0x76
-	.sleb128 0
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x2
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x40
-	.byte	0x24
-	.byte	0x21
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x21
-	.byte	0x71
-	.sleb128 0
-	.byte	0x32
-	.byte	0x24
-	.byte	0x22
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x8
-	.byte	0x20
-	.byte	0x26
-	.byte	0x76
+	.byte	0x74
 	.sleb128 0
 	.byte	0x22
 	.byte	0x23
@@ -10754,44 +10661,15 @@ __func__.6033:
 	.byte	0xff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL135
-	.8byte	.LVL139-1
-	.2byte	0x56
-	.byte	0x72
-	.sleb128 0
-	.byte	0x32
-	.byte	0x24
-	.byte	0x76
-	.sleb128 32
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x22
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x8
-	.byte	0x20
-	.byte	0x26
-	.byte	0x76
-	.sleb128 0
-	.byte	0x22
-	.byte	0x23
+	.8byte	.LVL126
+	.8byte	.LVL132
+	.2byte	0x1e
+	.byte	0xf3
 	.uleb128 0x1
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x38
-	.byte	0x24
-	.byte	0x72
-	.sleb128 0
+	.byte	0x50
 	.byte	0x32
 	.byte	0x24
-	.byte	0x76
+	.byte	0x74
 	.sleb128 32
 	.byte	0x94
 	.byte	0x1
@@ -10805,34 +10683,7 @@ __func__.6033:
 	.byte	0x8
 	.byte	0x20
 	.byte	0x26
-	.byte	0x76
-	.sleb128 0
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x2
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x40
-	.byte	0x24
-	.byte	0x21
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x21
-	.byte	0x71
-	.sleb128 0
-	.byte	0x32
-	.byte	0x24
-	.byte	0x22
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x8
-	.byte	0x20
-	.byte	0x26
-	.byte	0x76
+	.byte	0x74
 	.sleb128 0
 	.byte	0x22
 	.byte	0x23
@@ -10843,14 +10694,15 @@ __func__.6033:
 	.byte	0xff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL139
-	.8byte	.LVL140
-	.2byte	0x56
-	.byte	0x72
-	.sleb128 0
+	.8byte	.LVL132
+	.8byte	.LVL139-1
+	.2byte	0x59
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
 	.byte	0x32
 	.byte	0x24
-	.byte	0x76
+	.byte	0x74
 	.sleb128 32
 	.byte	0x94
 	.byte	0x1
@@ -10864,7 +10716,7 @@ __func__.6033:
 	.byte	0x8
 	.byte	0x20
 	.byte	0x26
-	.byte	0x76
+	.byte	0x74
 	.sleb128 0
 	.byte	0x22
 	.byte	0x23
@@ -10876,11 +10728,12 @@ __func__.6033:
 	.byte	0x1a
 	.byte	0x38
 	.byte	0x24
-	.byte	0x72
-	.sleb128 0
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
 	.byte	0x32
 	.byte	0x24
-	.byte	0x76
+	.byte	0x74
 	.sleb128 32
 	.byte	0x94
 	.byte	0x1
@@ -10894,7 +10747,7 @@ __func__.6033:
 	.byte	0x8
 	.byte	0x20
 	.byte	0x26
-	.byte	0x76
+	.byte	0x74
 	.sleb128 0
 	.byte	0x22
 	.byte	0x23
@@ -10907,11 +10760,12 @@ __func__.6033:
 	.byte	0x40
 	.byte	0x24
 	.byte	0x21
-	.byte	0x7a
+	.byte	0x78
 	.sleb128 0
 	.byte	0x21
-	.byte	0x71
-	.sleb128 0
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
 	.byte	0x32
 	.byte	0x24
 	.byte	0x22
@@ -10921,7 +10775,7 @@ __func__.6033:
 	.byte	0x8
 	.byte	0x20
 	.byte	0x26
-	.byte	0x76
+	.byte	0x74
 	.sleb128 0
 	.byte	0x22
 	.byte	0x23
@@ -10932,14 +10786,15 @@ __func__.6033:
 	.byte	0xff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL140
-	.8byte	.LFE219
-	.2byte	0x56
-	.byte	0x72
-	.sleb128 0
+	.8byte	.LVL139
+	.8byte	.LFE215
+	.2byte	0x59
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
 	.byte	0x32
 	.byte	0x24
-	.byte	0x76
+	.byte	0x74
 	.sleb128 32
 	.byte	0x94
 	.byte	0x1
@@ -10953,7 +10808,7 @@ __func__.6033:
 	.byte	0x8
 	.byte	0x20
 	.byte	0x26
-	.byte	0x76
+	.byte	0x74
 	.sleb128 0
 	.byte	0x22
 	.byte	0x23
@@ -10965,11 +10820,12 @@ __func__.6033:
 	.byte	0x1a
 	.byte	0x38
 	.byte	0x24
-	.byte	0x72
-	.sleb128 0
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
 	.byte	0x32
 	.byte	0x24
-	.byte	0x76
+	.byte	0x74
 	.sleb128 32
 	.byte	0x94
 	.byte	0x1
@@ -10983,7 +10839,7 @@ __func__.6033:
 	.byte	0x8
 	.byte	0x20
 	.byte	0x26
-	.byte	0x76
+	.byte	0x74
 	.sleb128 0
 	.byte	0x22
 	.byte	0x23
@@ -10996,11 +10852,12 @@ __func__.6033:
 	.byte	0x40
 	.byte	0x24
 	.byte	0x21
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x21
 	.byte	0x78
 	.sleb128 0
+	.byte	0x21
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
 	.byte	0x32
 	.byte	0x24
 	.byte	0x22
@@ -11010,7 +10867,7 @@ __func__.6033:
 	.byte	0x8
 	.byte	0x20
 	.byte	0x26
-	.byte	0x76
+	.byte	0x74
 	.sleb128 0
 	.byte	0x22
 	.byte	0x23
@@ -11023,15 +10880,15 @@ __func__.6033:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST36:
-	.8byte	.LVL116
-	.8byte	.LVL117
+.LLST32:
+	.8byte	.LVL118
+	.8byte	.LVL119
 	.2byte	0xd
-	.byte	0x72
+	.byte	0x70
 	.sleb128 0
 	.byte	0x32
 	.byte	0x24
-	.byte	0x76
+	.byte	0x74
 	.sleb128 32
 	.byte	0x94
 	.byte	0x1
@@ -11040,18 +10897,19 @@ __func__.6033:
 	.byte	0x1a
 	.byte	0x22
 	.byte	0x9f
-	.8byte	.LVL117
 	.8byte	.LVL119
+	.8byte	.LVL121
 	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL119
-	.8byte	.LVL122
-	.2byte	0xd
-	.byte	0x72
-	.sleb128 0
+	.byte	0x50
+	.8byte	.LVL121
+	.8byte	.LVL124
+	.2byte	0xe
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
 	.byte	0x32
 	.byte	0x24
-	.byte	0x76
+	.byte	0x74
 	.sleb128 32
 	.byte	0x94
 	.byte	0x1
@@ -11060,14 +10918,15 @@ __func__.6033:
 	.byte	0x1a
 	.byte	0x22
 	.byte	0x9f
-	.8byte	.LVL125
 	.8byte	.LVL126
-	.2byte	0xd
-	.byte	0x72
-	.sleb128 0
+	.8byte	.LVL127
+	.2byte	0xe
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
 	.byte	0x32
 	.byte	0x24
-	.byte	0x76
+	.byte	0x74
 	.sleb128 32
 	.byte	0x94
 	.byte	0x1
@@ -11076,10 +10935,10 @@ __func__.6033:
 	.byte	0x1a
 	.byte	0x22
 	.byte	0x9f
-	.8byte	.LVL126
 	.8byte	.LVL127
+	.8byte	.LVL128
 	.2byte	0x8
-	.byte	0x78
+	.byte	0x71
 	.sleb128 0
 	.byte	0x32
 	.byte	0x24
@@ -11087,116 +10946,23 @@ __func__.6033:
 	.sleb128 0
 	.byte	0x22
 	.byte	0x9f
-	.8byte	.LVL127
-	.8byte	.LVL129
+	.8byte	.LVL128
+	.8byte	.LVL130
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL129
-	.8byte	.LVL131
-	.2byte	0x12
-	.byte	0x74
-	.sleb128 0
-	.byte	0x38
-	.byte	0x24
-	.byte	0x77
-	.sleb128 0
-	.byte	0x40
-	.byte	0x24
-	.byte	0x21
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x21
-	.byte	0x78
-	.sleb128 0
-	.byte	0x32
-	.byte	0x24
-	.byte	0x22
-	.byte	0x9f
+	.8byte	.LVL130
 	.8byte	.LVL131
-	.8byte	.LVL132
-	.2byte	0x2c
-	.byte	0x72
+	.2byte	0x2d
+	.byte	0x75
 	.sleb128 0
-	.byte	0x32
-	.byte	0x24
-	.byte	0x76
-	.sleb128 32
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x22
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x8
-	.byte	0x20
-	.byte	0x26
-	.byte	0x76
-	.sleb128 0
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x1
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
 	.byte	0x38
 	.byte	0x24
-	.byte	0x77
-	.sleb128 0
-	.byte	0x40
-	.byte	0x24
-	.byte	0x21
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x21
-	.byte	0x78
-	.sleb128 0
-	.byte	0x32
-	.byte	0x24
-	.byte	0x22
-	.byte	0x9f
-	.8byte	.LVL132
-	.8byte	.LVL133
-	.2byte	0x46
-	.byte	0x72
-	.sleb128 0
-	.byte	0x32
-	.byte	0x24
-	.byte	0x76
-	.sleb128 32
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x22
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x8
-	.byte	0x20
-	.byte	0x26
-	.byte	0x76
-	.sleb128 0
-	.byte	0x22
-	.byte	0x23
+	.byte	0xf3
 	.uleb128 0x1
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x38
-	.byte	0x24
-	.byte	0x72
-	.sleb128 0
+	.byte	0x50
 	.byte	0x32
 	.byte	0x24
-	.byte	0x76
+	.byte	0x74
 	.sleb128 32
 	.byte	0x94
 	.byte	0x1
@@ -11210,7 +10976,7 @@ __func__.6033:
 	.byte	0x8
 	.byte	0x20
 	.byte	0x26
-	.byte	0x76
+	.byte	0x74
 	.sleb128 0
 	.byte	0x22
 	.byte	0x23
@@ -11223,53 +10989,28 @@ __func__.6033:
 	.byte	0x40
 	.byte	0x24
 	.byte	0x21
-	.byte	0x7a
+	.byte	0x78
 	.sleb128 0
 	.byte	0x21
-	.byte	0x78
+	.byte	0x71
 	.sleb128 0
 	.byte	0x32
 	.byte	0x24
 	.byte	0x22
 	.byte	0x9f
-	.8byte	.LVL133
-	.8byte	.LVL134
-	.2byte	0x46
-	.byte	0x72
-	.sleb128 0
-	.byte	0x32
-	.byte	0x24
-	.byte	0x76
-	.sleb128 32
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x22
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x8
-	.byte	0x20
-	.byte	0x26
-	.byte	0x76
+	.8byte	.LVL131
+	.8byte	.LVL132
+	.2byte	0x2e
+	.byte	0x75
 	.sleb128 0
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x1
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
 	.byte	0x38
 	.byte	0x24
-	.byte	0x72
-	.sleb128 0
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
 	.byte	0x32
 	.byte	0x24
-	.byte	0x76
+	.byte	0x74
 	.sleb128 32
 	.byte	0x94
 	.byte	0x1
@@ -11283,7 +11024,7 @@ __func__.6033:
 	.byte	0x8
 	.byte	0x20
 	.byte	0x26
-	.byte	0x76
+	.byte	0x74
 	.sleb128 0
 	.byte	0x22
 	.byte	0x23
@@ -11296,24 +11037,25 @@ __func__.6033:
 	.byte	0x40
 	.byte	0x24
 	.byte	0x21
-	.byte	0x7a
+	.byte	0x78
 	.sleb128 0
 	.byte	0x21
-	.byte	0x71
-	.sleb128 0
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
 	.byte	0x32
 	.byte	0x24
 	.byte	0x22
 	.byte	0x9f
-	.8byte	.LVL134
-	.8byte	.LVL135
-	.2byte	0x48
+	.8byte	.LVL132
+	.8byte	.LVL136
+	.2byte	0x49
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x32
 	.byte	0x24
-	.byte	0x76
+	.byte	0x74
 	.sleb128 32
 	.byte	0x94
 	.byte	0x1
@@ -11327,7 +11069,7 @@ __func__.6033:
 	.byte	0x8
 	.byte	0x20
 	.byte	0x26
-	.byte	0x76
+	.byte	0x74
 	.sleb128 0
 	.byte	0x22
 	.byte	0x23
@@ -11344,7 +11086,7 @@ __func__.6033:
 	.byte	0x50
 	.byte	0x32
 	.byte	0x24
-	.byte	0x76
+	.byte	0x74
 	.sleb128 32
 	.byte	0x94
 	.byte	0x1
@@ -11358,7 +11100,7 @@ __func__.6033:
 	.byte	0x8
 	.byte	0x20
 	.byte	0x26
-	.byte	0x76
+	.byte	0x74
 	.sleb128 0
 	.byte	0x22
 	.byte	0x23
@@ -11371,23 +11113,29 @@ __func__.6033:
 	.byte	0x40
 	.byte	0x24
 	.byte	0x21
-	.byte	0x7a
+	.byte	0x78
 	.sleb128 0
 	.byte	0x21
-	.byte	0x71
-	.sleb128 0
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
 	.byte	0x32
 	.byte	0x24
 	.byte	0x22
 	.byte	0x9f
-	.8byte	.LVL135
-	.8byte	.LVL137
-	.2byte	0x46
-	.byte	0x72
-	.sleb128 0
+	.8byte	.LVL136
+	.8byte	.LVL138
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL138
+	.8byte	.LVL139-1
+	.2byte	0x63
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
 	.byte	0x32
 	.byte	0x24
-	.byte	0x76
+	.byte	0x74
 	.sleb128 32
 	.byte	0x94
 	.byte	0x1
@@ -11401,7 +11149,7 @@ __func__.6033:
 	.byte	0x8
 	.byte	0x20
 	.byte	0x26
-	.byte	0x76
+	.byte	0x74
 	.sleb128 0
 	.byte	0x22
 	.byte	0x23
@@ -11413,11 +11161,12 @@ __func__.6033:
 	.byte	0x1a
 	.byte	0x38
 	.byte	0x24
-	.byte	0x72
-	.sleb128 0
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
 	.byte	0x32
 	.byte	0x24
-	.byte	0x76
+	.byte	0x74
 	.sleb128 32
 	.byte	0x94
 	.byte	0x1
@@ -11431,7 +11180,7 @@ __func__.6033:
 	.byte	0x8
 	.byte	0x20
 	.byte	0x26
-	.byte	0x76
+	.byte	0x74
 	.sleb128 0
 	.byte	0x22
 	.byte	0x23
@@ -11444,23 +11193,46 @@ __func__.6033:
 	.byte	0x40
 	.byte	0x24
 	.byte	0x21
-	.byte	0x7a
+	.byte	0x78
 	.sleb128 0
 	.byte	0x21
-	.byte	0x71
-	.sleb128 0
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
 	.byte	0x32
 	.byte	0x24
 	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x74
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x38
+	.byte	0x24
+	.byte	0x75
+	.sleb128 0
+	.byte	0x40
+	.byte	0x24
+	.byte	0x21
+	.byte	0x76
+	.sleb128 0
+	.byte	0x21
 	.byte	0x9f
-	.8byte	.LVL137
-	.8byte	.LVL139-1
-	.2byte	0x1
-	.byte	0x54
 	.8byte	.LVL139
-	.8byte	.LFE219
+	.8byte	.LFE215
 	.2byte	0x1
-	.byte	0x54
+	.byte	0x50
 	.8byte	0
 	.8byte	0
 .LLST0:
@@ -11469,53 +11241,53 @@ __func__.6033:
 	.2byte	0x1
 	.byte	0x50
 	.8byte	.LVL1
-	.8byte	.LVL7
+	.8byte	.LVL11
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL7
-	.8byte	.LVL8
+	.8byte	.LVL11
+	.8byte	.LVL12
 	.2byte	0x3
 	.byte	0x84
 	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL8
-	.8byte	.LVL13
+	.8byte	.LVL12
+	.8byte	.LVL15
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL13
-	.8byte	.LVL14
+	.8byte	.LVL15
+	.8byte	.LVL16
 	.2byte	0x3
 	.byte	0x84
 	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL14
 	.8byte	.LVL16
+	.8byte	.LVL18
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL16
-	.8byte	.LVL21
+	.8byte	.LVL18
+	.8byte	.LVL23
 	.2byte	0x3
 	.byte	0x84
 	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL21
 	.8byte	.LVL23
+	.8byte	.LVL25
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL23
-	.8byte	.LVL24
+	.8byte	.LVL25
+	.8byte	.LVL26
 	.2byte	0x3
 	.byte	0x84
 	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL24
-	.8byte	.LFE217
+	.8byte	.LVL26
+	.8byte	.LFE213
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -11529,97 +11301,105 @@ __func__.6033:
 	.2byte	0x1
 	.byte	0x52
 	.8byte	.LVL3
-	.8byte	.LVL4
+	.8byte	.LVL4-1
 	.2byte	0x9
 	.byte	0x3
 	.8byte	global_waveform
-	.8byte	.LVL4
 	.8byte	.LVL5
+	.8byte	.LVL6
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL5
 	.8byte	.LVL6
+	.8byte	.LVL7
 	.2byte	0x9
 	.byte	0x3
 	.8byte	global_waveform
+	.8byte	.LVL7
 	.8byte	.LVL8
-	.8byte	.LVL9
 	.2byte	0x1
 	.byte	0x52
+	.8byte	.LVL8
 	.8byte	.LVL9
-	.8byte	.LVL10
 	.2byte	0x9
 	.byte	0x3
 	.8byte	global_waveform
+	.8byte	.LVL9
 	.8byte	.LVL10
-	.8byte	.LVL11
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL11
-	.8byte	.LVL12-1
+	.8byte	.LVL12
+	.8byte	.LVL13
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL13
+	.8byte	.LVL14
 	.2byte	0x9
 	.byte	0x3
 	.8byte	global_waveform
-	.8byte	0
-	.8byte	0
-.LLST2:
 	.8byte	.LVL14
 	.8byte	.LVL15
 	.2byte	0x1
-	.byte	0x50
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST2:
 	.8byte	.LVL16
 	.8byte	.LVL17
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL18
+	.8byte	.LVL19
 	.2byte	0x2
 	.byte	0x34
 	.byte	0x9f
-	.8byte	.LVL17
-	.8byte	.LVL18
+	.8byte	.LVL19
+	.8byte	.LVL20
 	.2byte	0x2
 	.byte	0x35
 	.byte	0x9f
-	.8byte	.LVL18
-	.8byte	.LVL19
+	.8byte	.LVL20
+	.8byte	.LVL21
 	.2byte	0x2
 	.byte	0x36
 	.byte	0x9f
-	.8byte	.LVL19
-	.8byte	.LVL20
+	.8byte	.LVL21
+	.8byte	.LVL22
 	.2byte	0x2
 	.byte	0x32
 	.byte	0x9f
-	.8byte	.LVL20
-	.8byte	.LVL21
+	.8byte	.LVL22
+	.8byte	.LVL23
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST18:
-	.8byte	.LVL52
-	.8byte	.LVL55
+.LLST14:
+	.8byte	.LVL54
+	.8byte	.LVL57
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL55
-	.8byte	.LVL78
+	.8byte	.LVL57
+	.8byte	.LVL81
 	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL78
-	.8byte	.LVL79
+	.byte	0x67
+	.8byte	.LVL81
+	.8byte	.LVL82
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL79
-	.8byte	.LVL112
+	.8byte	.LVL82
+	.8byte	.LVL115
 	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL112
-	.8byte	.LVL113
+	.byte	0x67
+	.8byte	.LVL115
+	.8byte	.LVL116
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL113
-	.8byte	.LFE214
+	.8byte	.LVL116
+	.8byte	.LFE210
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -11627,548 +11407,354 @@ __func__.6033:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST19:
-	.8byte	.LVL52
-	.8byte	.LVL53
+.LLST15:
+	.8byte	.LVL54
+	.8byte	.LVL56
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL53
-	.8byte	.LVL112
+	.8byte	.LVL56
+	.8byte	.LVL80
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL80
+	.8byte	.LVL82
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL112
-	.8byte	.LFE214
+	.8byte	.LVL82
+	.8byte	.LVL115
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL115
+	.8byte	.LFE210
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST20:
-	.8byte	.LVL52
-	.8byte	.LVL54
-	.2byte	0x1
-	.byte	0x52
+.LLST16:
 	.8byte	.LVL54
-	.8byte	.LVL112
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.8byte	.LVL112
-	.8byte	.LFE214
+	.8byte	.LVL55
 	.2byte	0x1
 	.byte	0x52
-	.8byte	0
-	.8byte	0
-.LLST21:
-	.8byte	.LVL52
-	.8byte	.LVL56-1
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL56-1
-	.8byte	.LVL77
+	.8byte	.LVL55
+	.8byte	.LVL79
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL77
 	.8byte	.LVL79
+	.8byte	.LVL82
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
-	.byte	0x53
+	.byte	0x52
 	.byte	0x9f
-	.8byte	.LVL79
-	.8byte	.LVL112
+	.8byte	.LVL82
+	.8byte	.LVL115
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL112
-	.8byte	.LFE214
+	.8byte	.LVL115
+	.8byte	.LFE210
 	.2byte	0x1
-	.byte	0x53
+	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST22:
-	.8byte	.LVL52
-	.8byte	.LVL57
+.LLST17:
+	.8byte	.LVL54
+	.8byte	.LVL59
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL57
-	.8byte	.LVL66
+	.8byte	.LVL59
+	.8byte	.LVL68
 	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL66
+	.byte	0x56
 	.8byte	.LVL68
+	.8byte	.LVL70
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL68
-	.8byte	.LVL74-1
+	.8byte	.LVL70
+	.8byte	.LVL76-1
 	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL79
-	.8byte	.LVL87
+	.byte	0x56
+	.8byte	.LVL82
+	.8byte	.LVL90
 	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL87
-	.8byte	.LVL89
+	.byte	0x56
+	.8byte	.LVL90
+	.8byte	.LVL92
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL89
-	.8byte	.LVL101
+	.8byte	.LVL92
+	.8byte	.LVL104
 	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL101
-	.8byte	.LVL103
+	.byte	0x56
+	.8byte	.LVL104
+	.8byte	.LVL106
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL104
-	.8byte	.LVL105
+	.8byte	.LVL107
+	.8byte	.LVL108
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL105
-	.8byte	.LVL107
+	.8byte	.LVL108
+	.8byte	.LVL110
 	.2byte	0x5
 	.byte	0x73
 	.sleb128 0
 	.byte	0x31
 	.byte	0x24
 	.byte	0x9f
-	.8byte	.LVL112
-	.8byte	.LFE214
+	.8byte	.LVL115
+	.8byte	.LFE210
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST23:
-	.8byte	.LVL52
-	.8byte	.LVL57
+.LLST18:
+	.8byte	.LVL54
+	.8byte	.LVL59
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL61
-	.8byte	.LVL62
-	.2byte	0x1
-	.byte	0x5c
-	.8byte	.LVL62
+	.8byte	.LVL63
 	.8byte	.LVL64
 	.2byte	0x1
-	.byte	0x51
+	.byte	0x5c
 	.8byte	.LVL64
-	.8byte	.LVL68
+	.8byte	.LVL66
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL66
+	.8byte	.LVL70
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL71
-	.8byte	.LVL72
+	.8byte	.LVL73
+	.8byte	.LVL74
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL79
-	.8byte	.LVL80
+	.8byte	.LVL82
+	.8byte	.LVL83
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL81
-	.8byte	.LVL82
+	.8byte	.LVL84
+	.8byte	.LVL85
 	.2byte	0x1
 	.byte	0x57
-	.8byte	.LVL82
-	.8byte	.LVL83
+	.8byte	.LVL85
+	.8byte	.LVL86
 	.2byte	0x3
-	.byte	0x71
+	.byte	0x73
 	.sleb128 3
 	.byte	0x9f
-	.8byte	.LVL83
-	.8byte	.LVL84
+	.8byte	.LVL86
+	.8byte	.LVL87
 	.2byte	0x3
-	.byte	0x71
+	.byte	0x73
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL85
-	.8byte	.LVL89
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
+	.8byte	.LVL88
 	.8byte	.LVL92
-	.8byte	.LVL93
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	.LVL95
 	.8byte	.LVL96
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL98
+	.8byte	.LVL99
 	.2byte	0x1
 	.byte	0x5c
-	.8byte	.LVL96
 	.8byte	.LVL99
+	.8byte	.LVL102
 	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL99
-	.8byte	.LVL103
+	.byte	0x53
+	.8byte	.LVL102
+	.8byte	.LVL106
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL104
-	.8byte	.LVL108
+	.8byte	.LVL107
+	.8byte	.LVL111
 	.2byte	0x5
 	.byte	0x72
 	.sleb128 0
 	.byte	0x31
 	.byte	0x24
 	.byte	0x9f
-	.8byte	.LVL108
-	.8byte	.LVL109
+	.8byte	.LVL111
+	.8byte	.LVL112
 	.2byte	0x5
 	.byte	0x72
 	.sleb128 1
 	.byte	0x31
 	.byte	0x24
 	.byte	0x9f
-	.8byte	.LVL112
-	.8byte	.LFE214
+	.8byte	.LVL115
+	.8byte	.LFE210
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST24:
-	.8byte	.LVL52
-	.8byte	.LVL57
+.LLST19:
+	.8byte	.LVL54
+	.8byte	.LVL59
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL57
-	.8byte	.LVL77
+	.8byte	.LVL59
+	.8byte	.LVL79
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL77
 	.8byte	.LVL79
+	.8byte	.LVL82
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL79
-	.8byte	.LVL112
+	.8byte	.LVL82
+	.8byte	.LVL115
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL112
-	.8byte	.LFE214
+	.8byte	.LVL115
+	.8byte	.LFE210
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST25:
-	.8byte	.LVL52
-	.8byte	.LVL57
+.LLST20:
+	.8byte	.LVL54
+	.8byte	.LVL59
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL57
-	.8byte	.LVL63
+	.8byte	.LVL59
+	.8byte	.LVL65
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL63
-	.8byte	.LVL69
+	.8byte	.LVL65
+	.8byte	.LVL71
 	.2byte	0x1
 	.byte	0x5b
-	.8byte	.LVL69
-	.8byte	.LVL70
+	.8byte	.LVL71
+	.8byte	.LVL72
 	.2byte	0x3
 	.byte	0x70
 	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL70
-	.8byte	.LVL73
+	.8byte	.LVL72
+	.8byte	.LVL75
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL79
-	.8byte	.LVL80
+	.8byte	.LVL82
+	.8byte	.LVL83
 	.2byte	0x1
 	.byte	0x5b
-	.8byte	.LVL80
-	.8byte	.LVL93
+	.8byte	.LVL83
+	.8byte	.LVL96
 	.2byte	0x3
 	.byte	0x70
 	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL93
-	.8byte	.LVL94
+	.8byte	.LVL96
+	.8byte	.LVL97
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL94
-	.8byte	.LVL98
+	.8byte	.LVL97
+	.8byte	.LVL101
 	.2byte	0x3
 	.byte	0x7b
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL98
-	.8byte	.LVL99
+	.8byte	.LVL101
+	.8byte	.LVL102
 	.2byte	0x1
 	.byte	0x5b
-	.8byte	.LVL99
-	.8byte	.LVL103
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL112
-	.8byte	.LFE214
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST26:
-	.8byte	.LVL60
-	.8byte	.LVL71
-	.2byte	0x1
-	.byte	0x60
-	.8byte	.LVL79
-	.8byte	.LVL93
-	.2byte	0x1
-	.byte	0x60
-	.8byte	.LVL94
-	.8byte	.LVL97
-	.2byte	0x1
-	.byte	0x50
+	.8byte	.LVL102
 	.8byte	.LVL106
-	.8byte	.LVL112
-	.2byte	0x1
-	.byte	0x57
-	.8byte	0
-	.8byte	0
-.LLST27:
-	.8byte	.LVL69
-	.8byte	.LVL71
-	.2byte	0x1
-	.byte	0x56
-	.8byte	.LVL75
-	.8byte	.LVL76
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL80
-	.8byte	.LVL90
-	.2byte	0x1
-	.byte	0x56
-	.8byte	.LVL91
-	.8byte	.LVL93
-	.2byte	0x1
-	.byte	0x56
-	.8byte	.LVL103
-	.8byte	.LVL110
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL111
-	.8byte	.LVL112
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST28:
-	.8byte	.LVL52
-	.8byte	.LVL57
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.8byte	.LVL57
-	.8byte	.LVL74-1
-	.2byte	0x1
-	.byte	0x5a
-	.8byte	.LVL79
-	.8byte	.LVL103
-	.2byte	0x1
-	.byte	0x5a
-	.8byte	.LVL112
-	.8byte	.LFE214
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST4:
-	.8byte	.LVL25
-	.8byte	.LVL26
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL26
-	.8byte	.LVL37
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL37
-	.8byte	.LVL38-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL38-1
-	.8byte	.LFE238
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST5:
-	.8byte	.LVL25
-	.8byte	.LVL27
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL27
-	.8byte	.LVL36
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL36
-	.8byte	.LFE238
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST6:
-	.8byte	.LVL29
-	.8byte	.LVL30
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST7:
-	.8byte	.LVL28
-	.8byte	.LVL29
+	.8byte	.LVL115
+	.8byte	.LFE210
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL29
-	.8byte	.LVL34
-	.2byte	0x1
-	.byte	0x54
-	.8byte	.LVL34
-	.8byte	.LVL35
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 1
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST8:
-	.8byte	.LVL30
-	.8byte	.LVL31
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL32
-	.8byte	.LVL33
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL34
-	.8byte	.LVL38-1
-	.2byte	0x1
-	.byte	0x55
-	.8byte	0
-	.8byte	0
-.LLST9:
-	.8byte	.LVL30
-	.8byte	.LVL32
-	.2byte	0x6
-	.byte	0xfa
-	.4byte	0x1e3f
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST10:
-	.8byte	.LVL30
-	.8byte	.LVL32
-	.2byte	0x6
-	.byte	0xfa
-	.4byte	0x1e4b
-	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST11:
-	.8byte	.LVL39
-	.8byte	.LVL40
+.LLST21:
+	.8byte	.LVL62
+	.8byte	.LVL73
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL40
-	.8byte	.LVL50
+	.byte	0x60
+	.8byte	.LVL82
+	.8byte	.LVL96
 	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL50
-	.8byte	.LVL51-1
+	.byte	0x60
+	.8byte	.LVL97
+	.8byte	.LVL100
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL51-1
-	.8byte	.LFE239
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
+	.8byte	.LVL109
+	.8byte	.LVL115
+	.2byte	0x1
+	.byte	0x57
 	.8byte	0
 	.8byte	0
-.LLST12:
-	.8byte	.LVL39
-	.8byte	.LVL41
+.LLST22:
+	.8byte	.LVL71
+	.8byte	.LVL73
 	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL41
-	.8byte	.LVL50
+	.byte	0x54
+	.8byte	.LVL77
+	.8byte	.LVL78
 	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL50
-	.8byte	.LFE239
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST13:
-	.8byte	.LVL46
-	.8byte	.LVL48
-	.2byte	0x2
-	.byte	0x32
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST14:
-	.8byte	.LVL44
-	.8byte	.LVL45
+	.byte	0x50
+	.8byte	.LVL83
+	.8byte	.LVL93
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL94
+	.8byte	.LVL96
 	.2byte	0x1
 	.byte	0x54
+	.8byte	.LVL106
+	.8byte	.LVL113
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL114
+	.8byte	.LVL115
+	.2byte	0x1
+	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST15:
-	.8byte	.LVL42
-	.8byte	.LVL43
+.LLST23:
+	.8byte	.LVL54
+	.8byte	.LVL59
 	.2byte	0x2
-	.byte	0x30
+	.byte	0x31
 	.byte	0x9f
-	.8byte	.LVL43
-	.8byte	.LVL49
+	.8byte	.LVL59
+	.8byte	.LVL76-1
 	.2byte	0x1
-	.byte	0x52
-	.8byte	0
-	.8byte	0
-.LLST16:
-	.8byte	.LVL44
-	.8byte	.LVL48
-	.2byte	0x6
-	.byte	0xfa
-	.4byte	0x1eab
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST17:
-	.8byte	.LVL44
-	.8byte	.LVL48
-	.2byte	0x6
-	.byte	0xfa
-	.4byte	0x1eb7
+	.byte	0x5a
+	.8byte	.LVL82
+	.8byte	.LVL106
+	.2byte	0x1
+	.byte	0x5a
+	.8byte	.LVL115
+	.8byte	.LFE210
+	.2byte	0x2
+	.byte	0x31
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
@@ -12180,160 +11766,196 @@ __func__.6033:
 	.byte	0
 	.2byte	0
 	.2byte	0
-	.8byte	.LFB217
-	.8byte	.LFE217-.LFB217
-	.8byte	.LFB238
-	.8byte	.LFE238-.LFB238
-	.8byte	.LFB239
-	.8byte	.LFE239-.LFB239
-	.8byte	.LFB214
-	.8byte	.LFE214-.LFB214
-	.8byte	.LFB219
-	.8byte	.LFE219-.LFB219
-	.8byte	.LFB229
-	.8byte	.LFE229-.LFB229
+	.8byte	.LFB213
+	.8byte	.LFE213-.LFB213
+	.8byte	.LFB222
+	.8byte	.LFE222-.LFB222
+	.8byte	.LFB220
+	.8byte	.LFE220-.LFB220
+	.8byte	.LFB210
+	.8byte	.LFE210-.LFB210
+	.8byte	.LFB215
+	.8byte	.LFE215-.LFB215
 	.8byte	.LFB227
 	.8byte	.LFE227-.LFB227
+	.8byte	.LFB224
+	.8byte	.LFE224-.LFB224
+	.8byte	.LFB230
+	.8byte	.LFE230-.LFB230
+	.8byte	.LFB231
+	.8byte	.LFE231-.LFB231
 	.8byte	.LFB232
 	.8byte	.LFE232-.LFB232
-	.8byte	.LFB233
-	.8byte	.LFE233-.LFB233
-	.8byte	.LFB234
-	.8byte	.LFE234-.LFB234
 	.8byte	0
 	.8byte	0
 	.section	.debug_ranges,"",@progbits
 .Ldebug_ranges0:
+	.8byte	.LBB42
+	.8byte	.LBE42
 	.8byte	.LBB45
 	.8byte	.LBE45
-	.8byte	.LBB48
-	.8byte	.LBE48
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB51
-	.8byte	.LBE51
-	.8byte	.LBB56
-	.8byte	.LBE56
-	.8byte	.LBB57
-	.8byte	.LBE57
-	.8byte	.LBB58
-	.8byte	.LBE58
-	.8byte	0
-	.8byte	0
-	.8byte	.LBB52
-	.8byte	.LBE52
+	.8byte	.LBB48
+	.8byte	.LBE48
+	.8byte	.LBB53
+	.8byte	.LBE53
+	.8byte	.LBB54
+	.8byte	.LBE54
 	.8byte	.LBB55
 	.8byte	.LBE55
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB71
-	.8byte	.LBE71
-	.8byte	.LBB78
-	.8byte	.LBE78
+	.8byte	.LBB49
+	.8byte	.LBE49
+	.8byte	.LBB52
+	.8byte	.LBE52
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB116
-	.8byte	.LBE116
-	.8byte	.LBB120
-	.8byte	.LBE120
-	.8byte	.LBB123
-	.8byte	.LBE123
+	.8byte	.LBB68
+	.8byte	.LBE68
+	.8byte	.LBB75
+	.8byte	.LBE75
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB124
-	.8byte	.LBE124
-	.8byte	.LBB165
-	.8byte	.LBE165
+	.8byte	.LBB121
+	.8byte	.LBE121
+	.8byte	.LBB125
+	.8byte	.LBE125
+	.8byte	.LBB128
+	.8byte	.LBE128
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB126
-	.8byte	.LBE126
 	.8byte	.LBB129
 	.8byte	.LBE129
+	.8byte	.LBB176
+	.8byte	.LBE176
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB130
-	.8byte	.LBE130
-	.8byte	.LBB145
-	.8byte	.LBE145
+	.8byte	.LBB131
+	.8byte	.LBE131
+	.8byte	.LBB134
+	.8byte	.LBE134
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB132
-	.8byte	.LBE132
 	.8byte	.LBB135
 	.8byte	.LBE135
+	.8byte	.LBB150
+	.8byte	.LBE150
 	.8byte	0
 	.8byte	0
 	.8byte	.LBB137
 	.8byte	.LBE137
-	.8byte	.LBB146
-	.8byte	.LBE146
+	.8byte	.LBB140
+	.8byte	.LBE140
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB148
-	.8byte	.LBE148
-	.8byte	.LBB177
-	.8byte	.LBE177
+	.8byte	.LBB142
+	.8byte	.LBE142
+	.8byte	.LBB151
+	.8byte	.LBE151
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB150
-	.8byte	.LBE150
-	.8byte	.LBB162
-	.8byte	.LBE162
+	.8byte	.LBB153
+	.8byte	.LBE153
+	.8byte	.LBB188
+	.8byte	.LBE188
+	.8byte	.LBB208
+	.8byte	.LBE208
+	.8byte	.LBB210
+	.8byte	.LBE210
 	.8byte	0
 	.8byte	0
 	.8byte	.LBB155
 	.8byte	.LBE155
-	.8byte	.LBB158
-	.8byte	.LBE158
+	.8byte	.LBB169
+	.8byte	.LBE169
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB159
-	.8byte	.LBE159
+	.8byte	.LBB160
+	.8byte	.LBE160
 	.8byte	.LBB163
 	.8byte	.LBE163
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB166
-	.8byte	.LBE166
+	.8byte	.LBB164
+	.8byte	.LBE164
+	.8byte	.LBB170
+	.8byte	.LBE170
 	.8byte	.LBB171
 	.8byte	.LBE171
-	.8byte	0
-	.8byte	0
 	.8byte	.LBB172
 	.8byte	.LBE172
-	.8byte	.LBB178
-	.8byte	.LBE178
-	.8byte	0
-	.8byte	0
-	.8byte	.LFB217
-	.8byte	.LFE217
-	.8byte	.LFB238
-	.8byte	.LFE238
-	.8byte	.LFB239
-	.8byte	.LFE239
-	.8byte	.LFB214
-	.8byte	.LFE214
-	.8byte	.LFB219
-	.8byte	.LFE219
-	.8byte	.LFB229
-	.8byte	.LFE229
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB177
+	.8byte	.LBE177
+	.8byte	.LBB182
+	.8byte	.LBE182
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB183
+	.8byte	.LBE183
+	.8byte	.LBB189
+	.8byte	.LBE189
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB190
+	.8byte	.LBE190
+	.8byte	.LBB209
+	.8byte	.LBE209
+	.8byte	.LBB211
+	.8byte	.LBE211
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB192
+	.8byte	.LBE192
+	.8byte	.LBB195
+	.8byte	.LBE195
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB196
+	.8byte	.LBE196
+	.8byte	.LBB204
+	.8byte	.LBE204
+	.8byte	.LBB205
+	.8byte	.LBE205
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB198
+	.8byte	.LBE198
+	.8byte	.LBB201
+	.8byte	.LBE201
+	.8byte	0
+	.8byte	0
+	.8byte	.LFB213
+	.8byte	.LFE213
+	.8byte	.LFB222
+	.8byte	.LFE222
+	.8byte	.LFB220
+	.8byte	.LFE220
+	.8byte	.LFB210
+	.8byte	.LFE210
+	.8byte	.LFB215
+	.8byte	.LFE215
 	.8byte	.LFB227
 	.8byte	.LFE227
+	.8byte	.LFB224
+	.8byte	.LFE224
+	.8byte	.LFB230
+	.8byte	.LFE230
+	.8byte	.LFB231
+	.8byte	.LFE231
 	.8byte	.LFB232
 	.8byte	.LFE232
-	.8byte	.LFB233
-	.8byte	.LFE233
-	.8byte	.LFB234
-	.8byte	.LFE234
 	.8byte	0
 	.8byte	0
 	.section	.debug_line,"",@progbits
 .Ldebug_line0:
 	.section	.debug_str,"MS",@progbits,1
-.LASF396:
+.LASF389:
 	.string	"level"
-.LASF375:
+.LASF367:
 	.string	"white"
 .LASF82:
 	.string	"off_mem_rsvmap"
@@ -12349,9 +11971,9 @@ __func__.6033:
 	.string	"UCLASS_I2C"
 .LASF13:
 	.string	"sizetype"
-.LASF261:
+.LASF250:
 	.string	"net_hostname"
-.LASF256:
+.LASF245:
 	.string	"push_packet"
 .LASF36:
 	.string	"start"
@@ -12359,27 +11981,25 @@ __func__.6033:
 	.string	"UCLASS_SPI"
 .LASF168:
 	.string	"UCLASS_I2S"
-.LASF283:
+.LASF272:
 	.string	"NETLOOP_RESTART"
-.LASF364:
+.LASF355:
 	.string	"parse_wf_gray16_with_lut_type"
-.LASF351:
+.LASF341:
 	.string	"pvi_wf_get_lut"
 .LASF166:
 	.string	"UCLASS_I2C_GENERIC"
-.LASF380:
+.LASF372:
 	.string	"total"
 .LASF178:
 	.string	"UCLASS_MOD_EXP"
 .LASF227:
 	.string	"UCLASS_IO_DOMAIN"
-.LASF326:
-	.string	"fpl_lot"
-.LASF300:
+.LASF289:
 	.string	"WF_TYPE_GL16"
-.LASF349:
+.LASF339:
 	.string	"pvi_wf_input"
-.LASF311:
+.LASF300:
 	.string	"PVI_WF_GL16"
 .LASF199:
 	.string	"UCLASS_RKNAND"
@@ -12393,15 +12013,15 @@ __func__.6033:
 	.string	"UCLASS_KEY"
 .LASF62:
 	.string	"bi_intfreq"
-.LASF393:
+.LASF386:
 	.string	"__func__"
 .LASF11:
 	.string	"phys_addr_t"
-.LASF419:
+.LASF412:
 	.string	"drivers/video/rk_eink/epdlut/pvi_waveform.c"
 .LASF5:
 	.string	"__u8"
-.LASF282:
+.LASF271:
 	.string	"NETLOOP_CONTINUE"
 .LASF207:
 	.string	"UCLASS_SPI_GENERIC"
@@ -12417,9 +12037,11 @@ __func__.6033:
 	.string	"state"
 .LASF158:
 	.string	"UCLASS_CROS_EC"
+.LASF413:
+	.string	"/home/lyx/rk3566-11-eink/u-boot"
 .LASF56:
 	.string	"bi_dsp_freq"
-.LASF371:
+.LASF363:
 	.string	"get_lut_reset_data"
 .LASF104:
 	.string	"image_start"
@@ -12427,49 +12049,49 @@ __func__.6033:
 	.string	"UCLASS_TEST_FDT"
 .LASF47:
 	.string	"bd_info"
-.LASF365:
+.LASF356:
 	.string	"parse_wf_gray2"
-.LASF280:
+.LASF269:
 	.string	"uclass_id"
-.LASF306:
+.LASF295:
 	.string	"pvi_wf_mode"
 .LASF94:
 	.string	"ih_load"
-.LASF238:
+.LASF239:
 	.string	"__dtb_dt_spl_begin"
-.LASF322:
+.LASF311:
 	.string	"file_length"
-.LASF330:
+.LASF319:
 	.string	"wf_type"
 .LASF7:
 	.string	"__u32"
 .LASF148:
 	.string	"UCLASS_PCI_EMUL"
-.LASF394:
+.LASF387:
 	.string	"get_wf_temp_index"
-.LASF317:
+.LASF306:
 	.string	"epd_lut_data"
-.LASF267:
+.LASF256:
 	.string	"net_tx_packet"
 .LASF222:
 	.string	"UCLASS_FG"
-.LASF266:
+.LASF255:
 	.string	"net_server_ip"
-.LASF363:
+.LASF353:
 	.string	"parse_wf_gray16"
-.LASF313:
+.LASF302:
 	.string	"PVI_WF_GLD16"
-.LASF274:
+.LASF263:
 	.string	"net_native_vlan"
 .LASF220:
 	.string	"UCLASS_VIDEO_CRTC"
-.LASF398:
+.LASF391:
 	.string	"pvi_modes"
-.LASF293:
+.LASF282:
 	.string	"WF_TYPE_RESET"
 .LASF157:
 	.string	"UCLASS_CODEC"
-.LASF418:
+.LASF411:
 	.ascii	"GNU C11 6.3.1 20170404 -ms"
 	.string	"trict-align -march=armv8-a+nosimd -mlittle-endian -mabi=lp64 -g -Os -fno-builtin -ffreestanding -fshort-wchar -fno-stack-protector -fno-delete-null-pointer-checks -fstack-usage -fno-pic -ffunction-sections -fdata-sections -ffixed-r9 -fno-common -ffixed-x18"
 .LASF23:
@@ -12486,23 +12108,25 @@ __func__.6033:
 	.string	"size_dt_strings"
 .LASF217:
 	.string	"UCLASS_VIDEO"
-.LASF404:
+.LASF397:
 	.string	"oldpic"
-.LASF277:
+.LASF266:
 	.string	"net_boot_file_size"
-.LASF383:
-	.string	"decode_wf_reset"
+.LASF354:
+	.string	"parse_wf_gray32"
 .LASF96:
 	.string	"ih_dcrc"
 .LASF61:
 	.string	"bi_ethspeed"
 .LASF140:
 	.string	"UCLASS_ROOT"
-.LASF386:
+.LASF378:
 	.string	"get_wf_frm_num"
 .LASF29:
 	.string	"ide_bus_offset"
-.LASF264:
+.LASF362:
+	.string	"get_lut_gray32_data"
+.LASF253:
 	.string	"net_server_ethaddr"
 .LASF64:
 	.string	"bi_arch_number"
@@ -12512,25 +12136,25 @@ __func__.6033:
 	.string	"UCLASS_KEYBOARD"
 .LASF20:
 	.string	"uint8_t"
-.LASF341:
+.LASF330:
 	.string	"waveformdata"
 .LASF98:
 	.string	"ih_arch"
 .LASF79:
 	.string	"totalsize"
-.LASF406:
+.LASF399:
 	.string	"frame_tmp"
 .LASF91:
 	.string	"ih_hcrc"
-.LASF376:
+.LASF368:
 	.string	"idata"
 .LASF106:
 	.string	"load"
-.LASF299:
+.LASF288:
 	.string	"WF_TYPE_GC16"
 .LASF212:
 	.string	"UCLASS_TPM"
-.LASF310:
+.LASF299:
 	.string	"PVI_WF_GC16"
 .LASF41:
 	.string	"lmb_property"
@@ -12542,8 +12166,6 @@ __func__.6033:
 	.string	"bi_andr_version"
 .LASF139:
 	.string	"images"
-.LASF254:
-	.string	"priv"
 .LASF226:
 	.string	"UCLASS_DVFS"
 .LASF57:
@@ -12552,19 +12174,19 @@ __func__.6033:
 	.string	"UCLASS_LED"
 .LASF93:
 	.string	"ih_size"
-.LASF405:
+.LASF398:
 	.string	"newpic"
 .LASF230:
 	.string	"UCLASS_MDIO"
 .LASF25:
 	.string	"_Bool"
-.LASF286:
+.LASF275:
 	.string	"net_state"
-.LASF347:
+.LASF337:
 	.string	"spi_id_buffer"
 .LASF167:
 	.string	"UCLASS_I2C_MUX"
-.LASF318:
+.LASF307:
 	.string	"frame_num"
 .LASF14:
 	.string	"char"
@@ -12572,33 +12194,31 @@ __func__.6033:
 	.string	"_binary_u_boot_bin_start"
 .LASF216:
 	.string	"UCLASS_USB_GADGET_GENERIC"
-.LASF284:
+.LASF273:
 	.string	"NETLOOP_SUCCESS"
-.LASF353:
+.LASF343:
 	.string	"output"
-.LASF290:
+.LASF279:
 	.string	"p_current"
-.LASF281:
+.LASF270:
 	.string	"net_loop_state"
-.LASF309:
+.LASF298:
 	.string	"PVI_WF_DU4"
-.LASF245:
-	.string	"enetaddr"
 .LASF156:
 	.string	"UCLASS_AMP"
 .LASF194:
 	.string	"UCLASS_PWRSEQ"
 .LASF122:
 	.string	"fit_hdr_fdt"
-.LASF275:
+.LASF264:
 	.string	"net_restart_wrap"
-.LASF263:
+.LASF252:
 	.string	"net_ethaddr"
-.LASF412:
+.LASF405:
 	.string	"flags"
-.LASF373:
+.LASF365:
 	.string	"gray"
-.LASF402:
+.LASF395:
 	.string	"decodewaveform"
 .LASF99:
 	.string	"ih_type"
@@ -12606,7 +12226,7 @@ __func__.6033:
 	.string	"off_dt_struct"
 .LASF52:
 	.string	"bi_flashoffset"
-.LASF276:
+.LASF265:
 	.string	"net_boot_file_name"
 .LASF142:
 	.string	"UCLASS_TEST"
@@ -12620,67 +12240,67 @@ __func__.6033:
 	.string	"image_info"
 .LASF218:
 	.string	"UCLASS_VIDEO_BRIDGE"
-.LASF384:
+.LASF376:
 	.string	"temp_data"
 .LASF109:
 	.string	"arch"
-.LASF359:
+.LASF349:
 	.string	"input"
-.LASF378:
+.LASF370:
 	.string	"temp"
 .LASF31:
 	.string	"select_hwpart"
-.LASF268:
+.LASF257:
 	.string	"net_rx_packets"
-.LASF287:
+.LASF276:
 	.string	"mem_malloc_start"
 .LASF74:
 	.string	"_datarelro_start_ofs"
 .LASF19:
 	.string	"ulong"
-.LASF361:
+.LASF351:
 	.string	"parse_wf_auto"
 .LASF95:
 	.string	"ih_ep"
 .LASF43:
 	.string	"lmb_region"
-.LASF346:
+.LASF336:
 	.string	"waveform"
-.LASF413:
+.LASF406:
 	.string	"printf"
 .LASF117:
 	.string	"fit_uname_os"
 .LASF58:
 	.string	"bi_bootflags"
-.LASF265:
+.LASF254:
 	.string	"net_ip"
-.LASF259:
+.LASF248:
 	.string	"net_dns_server"
-.LASF279:
+.LASF268:
 	.string	"net_ping_ip"
 .LASF45:
 	.string	"memory"
-.LASF370:
+.LASF334:
+	.string	"gray32_data"
+.LASF361:
 	.string	"get_lut_gray2_data"
 .LASF77:
 	.string	"fdt_header"
-.LASF288:
+.LASF277:
 	.string	"mem_malloc_end"
-.LASF339:
+.LASF328:
 	.string	"temperaturenumber"
 .LASF174:
 	.string	"UCLASS_MAILBOX"
 .LASF129:
 	.string	"rd_end"
-.LASF315:
+.LASF304:
 	.string	"PVI_WF_GCC16"
 .LASF134:
 	.string	"cmdline_start"
-.LASF253:
-	.string	"index"
-.LASF355:
+.LASF345:
 	.string	"temperture"
-.LASF377:
+.LASF369:
 	.string	"odata"
 .LASF202:
 	.string	"UCLASS_SCSI"
@@ -12688,23 +12308,23 @@ __func__.6033:
 	.string	"UCLASS_USB_DEV_GENERIC"
 .LASF175:
 	.string	"UCLASS_MASS_STORAGE"
-.LASF411:
+.LASF404:
 	.string	"kzalloc"
 .LASF1:
 	.string	"long unsigned int"
 .LASF150:
 	.string	"UCLASS_SIMPLE_BUS"
-.LASF260:
+.LASF249:
 	.string	"net_nis_domain"
-.LASF295:
+.LASF284:
 	.string	"WF_TYPE_GRAY4"
 .LASF124:
 	.string	"fit_noffset_fdt"
-.LASF285:
+.LASF274:
 	.string	"NETLOOP_FAIL"
 .LASF221:
 	.string	"UCLASS_WDT"
-.LASF403:
+.LASF396:
 	.string	"maxpic"
 .LASF53:
 	.string	"bi_sramstart"
@@ -12714,7 +12334,7 @@ __func__.6033:
 	.string	"boot_cpuid_phys"
 .LASF120:
 	.string	"fit_uname_rd"
-.LASF360:
+.LASF350:
 	.string	"mode_index"
 .LASF208:
 	.string	"UCLASS_SYSCON"
@@ -12722,9 +12342,9 @@ __func__.6033:
 	.string	"fit_uname_cfg"
 .LASF203:
 	.string	"UCLASS_SERIAL"
-.LASF273:
+.LASF262:
 	.string	"net_our_vlan"
-.LASF323:
+.LASF312:
 	.string	"serial"
 .LASF153:
 	.string	"UCLASS_BLK"
@@ -12732,15 +12352,15 @@ __func__.6033:
 	.string	"image_info_t"
 .LASF149:
 	.string	"UCLASS_USB_EMUL"
-.LASF316:
+.LASF305:
 	.string	"PVI_WF_MAX"
-.LASF335:
+.LASF324:
 	.string	"vcom_offset"
 .LASF187:
 	.string	"UCLASS_PCI_GENERIC"
-.LASF345:
+.LASF335:
 	.string	"global_waveform"
-.LASF336:
+.LASF325:
 	.string	"xwia"
 .LASF105:
 	.string	"image_len"
@@ -12748,19 +12368,21 @@ __func__.6033:
 	.string	"bi_ip_addr"
 .LASF189:
 	.string	"UCLASS_PINCONFIG"
-.LASF248:
-	.string	"send"
+.LASF375:
+	.string	"decode_wf_reset"
 .LASF210:
 	.string	"UCLASS_THERMAL"
 .LASF113:
 	.string	"legacy_hdr_os_copy"
 .LASF9:
 	.string	"long long int"
-.LASF301:
+.LASF380:
+	.string	"want_pic"
+.LASF290:
 	.string	"WF_TYPE_GLR16"
 .LASF24:
 	.string	"___strtok"
-.LASF278:
+.LASF267:
 	.string	"net_boot_file_expected_size_in_blocks"
 .LASF16:
 	.string	"__kernel_size_t"
@@ -12776,81 +12398,79 @@ __func__.6033:
 	.string	"UCLASS_RC"
 .LASF159:
 	.string	"UCLASS_DISPLAY"
-.LASF272:
+.LASF261:
 	.string	"net_null_ethaddr"
-.LASF338:
+.LASF327:
 	.string	"modenumber"
 .LASF71:
 	.string	"_datarel_start_ofs"
 .LASF225:
 	.string	"UCLASS_CHARGE_DISPLAY"
-.LASF239:
+.LASF240:
 	.string	"load_addr"
 .LASF116:
 	.string	"fit_hdr_os"
 .LASF72:
 	.string	"_datarelrolocal_start_ofs"
-.LASF324:
+.LASF313:
 	.string	"run_type"
 .LASF8:
 	.string	"unsigned int"
 .LASF18:
 	.string	"ushort"
-.LASF331:
+.LASF320:
 	.string	"panel_size"
-.LASF244:
-	.string	"eth_device"
-.LASF385:
+.LASF377:
 	.string	"temp1"
-.LASF333:
+.LASF322:
 	.string	"wfm_rev"
-.LASF304:
+.LASF293:
 	.string	"WF_TYPE_GRAY32"
-.LASF401:
+.LASF394:
 	.string	"frame"
 .LASF191:
 	.string	"UCLASS_PMIC"
-.LASF358:
+.LASF348:
 	.string	"temp_index"
 .LASF112:
 	.string	"legacy_hdr_os"
 .LASF81:
 	.string	"off_dt_strings"
-.LASF236:
+.LASF237:
 	.string	"monitor_flash_len"
 .LASF176:
 	.string	"UCLASS_MISC"
 .LASF49:
 	.string	"bi_memsize"
-.LASF307:
+.LASF296:
 	.string	"PVI_WF_RESET"
-.LASF337:
+.LASF326:
 	.string	"unknown1"
-.LASF340:
+.LASF329:
 	.string	"unknown2"
 .LASF26:
 	.string	"image_base"
 .LASF209:
 	.string	"UCLASS_SYSRESET"
-.LASF297:
+.LASF286:
 	.string	"WF_TYPE_AUTO"
-.LASF291:
+.LASF280:
 	.string	"current"
 .LASF163:
 	.string	"UCLASS_FIRMWARE"
 .LASF173:
 	.string	"UCLASS_LPC"
-.LASF388:
+.LASF381:
 	.string	"temp2"
-.LASF389:
+.LASF382:
 	.string	"temp3"
-.LASF390:
+.LASF383:
 	.string	"temp4"
 .LASF169:
 	.string	"UCLASS_IDE"
-.LASF408:
+.LASF401:
 	.string	"israr"
-.LASF410:
+.LASF403:
 	.string	"block"
 .LASF138:
 	.string	"bootm_headers_t"
@@ -12858,13 +12478,11 @@ __func__.6033:
 	.string	"bi_arm_freq"
 .LASF197:
 	.string	"UCLASS_REMOTEPROC"
-.LASF249:
-	.string	"recv"
 .LASF108:
 	.string	"type"
 .LASF119:
 	.string	"fit_hdr_rd"
-.LASF314:
+.LASF303:
 	.string	"PVI_WF_A2"
 .LASF54:
 	.string	"bi_sramsize"
@@ -12874,7 +12492,7 @@ __func__.6033:
 	.string	"UCLASS_PWM"
 .LASF40:
 	.string	"long double"
-.LASF407:
+.LASF400:
 	.string	"tempdata"
 .LASF128:
 	.string	"rd_start"
@@ -12882,29 +12500,27 @@ __func__.6033:
 	.string	"UCLASS_POWER_DOMAIN"
 .LASF196:
 	.string	"UCLASS_REGULATOR"
-.LASF334:
+.LASF323:
 	.string	"frame_rate"
-.LASF241:
+.LASF242:
 	.string	"save_size"
 .LASF154:
 	.string	"UCLASS_CLK"
-.LASF321:
+.LASF310:
 	.string	"checksum"
-.LASF348:
+.LASF338:
 	.string	"pvi_wf_get_version"
-.LASF246:
-	.string	"iobase"
 .LASF101:
 	.string	"ih_name"
 .LASF97:
 	.string	"ih_os"
-.LASF302:
+.LASF291:
 	.string	"WF_TYPE_GLD16"
 .LASF135:
 	.string	"cmdline_end"
-.LASF269:
+.LASF258:
 	.string	"net_rx_packet"
-.LASF235:
+.LASF236:
 	.string	"LOGF_MAX_CATEGORIES"
 .LASF33:
 	.string	"size"
@@ -12912,7 +12528,7 @@ __func__.6033:
 	.string	"long long unsigned int"
 .LASF89:
 	.string	"image_header"
-.LASF296:
+.LASF285:
 	.string	"WF_TYPE_GRAY2"
 .LASF21:
 	.string	"__be32"
@@ -12922,71 +12538,67 @@ __func__.6033:
 	.string	"fit_noffset_os"
 .LASF177:
 	.string	"UCLASS_MMC"
-.LASF251:
-	.string	"write_hwaddr"
-.LASF369:
-	.string	"get_lut_gray8_data"
-.LASF234:
+.LASF235:
 	.string	"UCLASS_INVALID"
 .LASF215:
 	.string	"UCLASS_USB_HUB"
-.LASF328:
+.LASF360:
+	.string	"get_lut_gray16_data"
+.LASF317:
 	.string	"wf_version"
 .LASF231:
 	.string	"UCLASS_EBC"
-.LASF305:
+.LASF294:
 	.string	"WF_TYPE_MAX"
-.LASF416:
+.LASF409:
 	.string	"memset"
 .LASF39:
 	.string	"flash_info"
 .LASF83:
 	.string	"version"
-.LASF250:
-	.string	"halt"
 .LASF44:
 	.string	"region"
 .LASF87:
 	.string	"size_dt_struct"
-.LASF308:
+.LASF297:
 	.string	"PVI_WF_DU"
+.LASF233:
+	.string	"UCLASS_RNG"
 .LASF179:
 	.string	"UCLASS_MTD"
-.LASF379:
+.LASF371:
 	.string	"decode_wf_gray2"
 .LASF76:
 	.string	"fdt32_t"
-.LASF354:
+.LASF344:
 	.string	"lut_type"
 .LASF181:
 	.string	"UCLASS_NORTHBRIDGE"
 .LASF60:
 	.string	"bi_enetaddr"
-.LASF325:
+.LASF314:
 	.string	"fpl_platform"
-.LASF421:
+.LASF414:
 	.string	"mtd_info"
-.LASF381:
+.LASF373:
 	.string	"_data"
-.LASF242:
+.LASF243:
 	.string	"in_addr"
-.LASF270:
+.LASF259:
 	.string	"net_rx_packet_len"
-.LASF247:
-	.string	"init"
-.LASF343:
+.LASF332:
 	.string	"reset_data"
-.LASF356:
+.LASF346:
 	.string	"stype"
-.LASF332:
+.LASF321:
 	.string	"amepd_part_number"
-.LASF392:
+.LASF385:
 	.string	"offset"
-.LASF237:
+.LASF238:
 	.string	"__dtb_dt_begin"
-.LASF395:
+.LASF388:
 	.string	"temp_num"
-.LASF374:
+.LASF366:
 	.string	"black"
 .LASF198:
 	.string	"UCLASS_RESET"
@@ -12996,7 +12608,7 @@ __func__.6033:
 	.string	"UCLASS_AHCI"
 .LASF12:
 	.string	"phys_size_t"
-.LASF391:
+.LASF384:
 	.string	"frm_num"
 .LASF155:
 	.string	"UCLASS_CPU"
@@ -13006,15 +12618,15 @@ __func__.6033:
 	.string	"verify"
 .LASF30:
 	.string	"name"
-.LASF399:
+.LASF392:
 	.string	"parse_mode_version"
-.LASF415:
+.LASF408:
 	.string	"kmalloc"
 .LASF232:
 	.string	"UCLASS_EINK_DISPLAY"
 .LASF184:
 	.string	"UCLASS_PANEL_BACKLIGHT"
-.LASF350:
+.LASF340:
 	.string	"pvi_wf"
 .LASF211:
 	.string	"UCLASS_TIMER"
@@ -13024,13 +12636,13 @@ __func__.6033:
 	.string	"bi_busfreq"
 .LASF6:
 	.string	"short int"
-.LASF368:
+.LASF359:
 	.string	"oldgray"
 .LASF190:
 	.string	"UCLASS_PINCTRL"
 .LASF200:
 	.string	"UCLASS_RAMDISK"
-.LASF387:
+.LASF379:
 	.string	"mode"
 .LASF147:
 	.string	"UCLASS_I2C_EMUL"
@@ -13038,29 +12650,27 @@ __func__.6033:
 	.string	"UCLASS_SPMI"
 .LASF144:
 	.string	"UCLASS_TEST_BUS"
-.LASF240:
+.LASF241:
 	.string	"save_addr"
-.LASF420:
-	.string	"/home2/zwp/2_rk3568_11.0/u-boot"
-.LASF362:
+.LASF352:
 	.string	"parse_wf_a2"
 .LASF133:
 	.string	"initrd_end"
-.LASF409:
+.LASF402:
 	.string	"kfree"
-.LASF366:
+.LASF357:
 	.string	"parse_wf_reset"
 .LASF73:
 	.string	"_datarellocal_start_ofs"
-.LASF367:
+.LASF358:
 	.string	"newgray"
-.LASF233:
+.LASF234:
 	.string	"UCLASS_COUNT"
-.LASF329:
+.LASF318:
 	.string	"wf_subversion"
 .LASF32:
 	.string	"block_drvr"
-.LASF417:
+.LASF410:
 	.string	"memcpy"
 .LASF22:
 	.string	"gfp_t"
@@ -13072,41 +12682,41 @@ __func__.6033:
 	.string	"fit_noffset_setup"
 .LASF88:
 	.string	"working_fdt"
-.LASF262:
+.LASF251:
 	.string	"net_root_path"
 .LASF160:
 	.string	"UCLASS_DMA"
 .LASF68:
 	.string	"bd_t"
-.LASF243:
+.LASF244:
 	.string	"s_addr"
-.LASF271:
+.LASF260:
 	.string	"net_bcast_ethaddr"
 .LASF65:
 	.string	"bi_boot_params"
-.LASF357:
+.LASF347:
 	.string	"sftemp"
-.LASF289:
+.LASF278:
 	.string	"mem_malloc_brk"
-.LASF257:
+.LASF246:
 	.string	"net_gateway"
 .LASF48:
 	.string	"bi_memstart"
-.LASF292:
+.LASF281:
 	.string	"epd_lut_type"
 .LASF219:
 	.string	"UCLASS_VIDEO_CONSOLE"
-.LASF298:
+.LASF287:
 	.string	"WF_TYPE_A2"
-.LASF255:
-	.string	"eth_current"
+.LASF315:
+	.string	"fpl_lot"
 .LASF46:
 	.string	"reserved"
-.LASF414:
+.LASF407:
 	.string	"free"
-.LASF400:
+.LASF393:
 	.string	"getwaveformdata"
-.LASF320:
+.LASF309:
 	.string	"pvi_waveform"
 .LASF67:
 	.string	"bi_dram"
@@ -13116,7 +12726,7 @@ __func__.6033:
 	.string	"magic"
 .LASF125:
 	.string	"fit_hdr_setup"
-.LASF303:
+.LASF292:
 	.string	"WF_TYPE_GCC16"
 .LASF114:
 	.string	"legacy_hdr_valid"
@@ -13128,29 +12738,27 @@ __func__.6033:
 	.string	"sector_count"
 .LASF100:
 	.string	"ih_comp"
-.LASF294:
+.LASF283:
 	.string	"WF_TYPE_GRAY16"
-.LASF312:
+.LASF301:
 	.string	"PVI_WF_GLR16"
-.LASF382:
+.LASF374:
 	.string	"_data1"
-.LASF344:
+.LASF333:
 	.string	"gray_2_data"
 .LASF130:
 	.string	"ft_addr"
 .LASF229:
 	.string	"UCLASS_ETH_PHY"
-.LASF342:
+.LASF331:
 	.string	"gray_data"
-.LASF327:
+.LASF316:
 	.string	"mode_version"
 .LASF4:
 	.string	"uchar"
 .LASF131:
 	.string	"ft_len"
-.LASF252:
-	.string	"next"
-.LASF319:
+.LASF308:
 	.string	"data"
 .LASF180:
 	.string	"UCLASS_NOP"
@@ -13160,19 +12768,19 @@ __func__.6033:
 	.string	"UCLASS_PCH"
 .LASF186:
 	.string	"UCLASS_PCI"
-.LASF258:
+.LASF247:
 	.string	"net_netmask"
 .LASF69:
 	.string	"IRQ_STACK_START"
 .LASF151:
 	.string	"UCLASS_ADC"
-.LASF397:
+.LASF390:
 	.string	"get_wf_mode_index"
-.LASF352:
+.LASF342:
 	.string	"waveform_file"
 .LASF146:
 	.string	"UCLASS_SPI_EMUL"
-.LASF372:
+.LASF364:
 	.string	"decode_wf_auto"
 .LASF123:
 	.string	"fit_uname_fdt"
diff --git a/drivers/video/rk_eink/epdlut/rkf_waveform.S b/drivers/video/rk_eink/epdlut/rkf_waveform.S
index 0907710ee1..3c5798257b 100644
--- a/drivers/video/rk_eink/epdlut/rkf_waveform.S
+++ b/drivers/video/rk_eink/epdlut/rkf_waveform.S
@@ -3,7 +3,6 @@
  *
  * SPDX-License-Identifier:     GPL-2.0+
  */
-
 	.arch armv8-a+nosimd
 	.file	"rkf_waveform.c"
 	.text
@@ -13,19 +12,19 @@
 	.align	2
 	.type	get_wf_buf, %function
 get_wf_buf:
-.LFB219:
+.LFB217:
 	.file 1 "drivers/video/rk_eink/epdlut/rkf_waveform.c"
-	.loc 1 144 0
+	.loc 1 193 0
 	.cfi_startproc
 .LVL0:
-	.loc 1 145 0
+	.loc 1 194 0
 	adrp	x2, .LANCHOR0
-	.loc 1 152 0
+	.loc 1 201 0
 	cmp	w1, 6
-	.loc 1 145 0
+	.loc 1 194 0
 	ldr	x2, [x2, #:lo12:.LANCHOR0]
 .LVL1:
-	.loc 1 152 0
+	.loc 1 201 0
 	bhi	.L15
 	adrp	x3, .L4
 	add	x3, x3, :lo12:.L4
@@ -48,32 +47,32 @@ get_wf_buf:
 	.byte	(.L10 - .Lrtx4) / 4
 	.section	.text.get_wf_buf
 .L3:
-	.loc 1 154 0
+	.loc 1 203 0
 	add	x1, x2, 148
 .LVL3:
-	.loc 1 155 0
+	.loc 1 204 0
 	add	x3, x2, 596
 .LVL4:
 .L11:
 .LBB31:
 .LBB32:
 .LBB33:
-	.loc 1 127 0
+	.loc 1 176 0
 	cmp	w0, 0
 .LBE33:
 .LBB34:
-	.loc 1 128 0
+	.loc 1 177 0
 	mov	w4, 49
 .LBE34:
 .LBB35:
-	.loc 1 127 0
+	.loc 1 176 0
 	csel	w0, w0, wzr, ge
 .LVL5:
 .LBE35:
-	.loc 1 124 0
+	.loc 1 173 0
 	mov	w5, 0
 .LBB36:
-	.loc 1 128 0
+	.loc 1 177 0
 	cmp	w0, 49
 	csel	w0, w0, w4, le
 .LVL6:
@@ -81,12 +80,12 @@ get_wf_buf:
 .LVL7:
 .L14:
 .LBE36:
-	.loc 1 131 0
+	.loc 1 180 0
 	ldrb	w6, [x1, x4]
 	cmp	w0, w6
 	bgt	.L12
 .LVL8:
-	.loc 1 136 0
+	.loc 1 185 0
 	add	x5, x1, x4
 	ldrb	w5, [x5, 1]
 	cbz	w5, .L16
@@ -95,103 +94,103 @@ get_wf_buf:
 .LVL9:
 	add	x4, x4, 1
 .LVL10:
-	.loc 1 130 0
+	.loc 1 179 0
 	cmp	x4, 50
 	bne	.L14
 .LVL11:
 .L13:
 .LBE32:
 .LBE31:
-	.loc 1 187 0
+	.loc 1 236 0
 	ldr	w0, [x3, w5, sxtw 2]
 	add	x0, x2, x0
-	.loc 1 189 0
+	.loc 1 238 0
 	ret
 .LVL12:
 .L5:
-	.loc 1 158 0
+	.loc 1 207 0
 	add	x1, x2, 468
 .LVL13:
-	.loc 1 159 0
+	.loc 1 208 0
 	add	x3, x2, 1876
 .LVL14:
-	.loc 1 160 0
+	.loc 1 209 0
 	b	.L11
 .LVL15:
 .L6:
-	.loc 1 162 0
+	.loc 1 211 0
 	add	x1, x2, 212
 .LVL16:
-	.loc 1 163 0
+	.loc 1 212 0
 	add	x3, x2, 852
 .LVL17:
-	.loc 1 164 0
+	.loc 1 213 0
 	b	.L11
 .LVL18:
 .L7:
-	.loc 1 166 0
+	.loc 1 215 0
 	add	x1, x2, 276
 .LVL19:
-	.loc 1 167 0
+	.loc 1 216 0
 	add	x3, x2, 1108
 .LVL20:
-	.loc 1 168 0
+	.loc 1 217 0
 	b	.L11
 .LVL21:
 .L8:
-	.loc 1 170 0
+	.loc 1 219 0
 	add	x1, x2, 340
 .LVL22:
-	.loc 1 171 0
+	.loc 1 220 0
 	add	x3, x2, 1364
 .LVL23:
-	.loc 1 172 0
+	.loc 1 221 0
 	b	.L11
 .LVL24:
 .L9:
-	.loc 1 174 0
+	.loc 1 223 0
 	add	x1, x2, 404
 .LVL25:
-	.loc 1 175 0
+	.loc 1 224 0
 	add	x3, x2, 1620
 .LVL26:
-	.loc 1 176 0
+	.loc 1 225 0
 	b	.L11
 .LVL27:
 .L10:
-	.loc 1 178 0
+	.loc 1 227 0
 	add	x1, x2, 532
 .LVL28:
-	.loc 1 179 0
+	.loc 1 228 0
 	add	x3, x2, 2132
 .LVL29:
-	.loc 1 180 0
+	.loc 1 229 0
 	b	.L11
 .LVL30:
 .L16:
 .LBB38:
 .LBB37:
-	.loc 1 136 0
+	.loc 1 185 0
 	mov	w5, w4
 	b	.L13
 .LVL31:
 .L15:
 .LBE37:
 .LBE38:
-	.loc 1 182 0
+	.loc 1 231 0
 	mov	x0, 0
 .LVL32:
-	.loc 1 190 0
+	.loc 1 239 0
 	ret
 	.cfi_endproc
-.LFE219:
+.LFE217:
 	.size	get_wf_buf, .-get_wf_buf
 	.section	.text.decode_wf_data,"ax",@progbits
 	.align	2
 	.type	decode_wf_data, %function
 decode_wf_data:
-.LFB221:
-	.loc 1 199 0
+.LFB219:
+	.loc 1 248 0
 	.cfi_startproc
 .LVL33:
 	stp	x29, x30, [sp, -48]!
@@ -203,10 +202,10 @@ decode_wf_data:
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -32
 	.cfi_offset 20, -24
-	.loc 1 202 0
+	.loc 1 251 0
 	uxtw	x20, w1
 .LVL34:
-	.loc 1 199 0
+	.loc 1 248 0
 	str	x21, [sp, 32]
 	.cfi_offset 21, -16
 .LBB39:
@@ -217,7 +216,7 @@ decode_wf_data:
 .LVL35:
 .LBE40:
 .LBE39:
-	.loc 1 199 0
+	.loc 1 248 0
 	mov	x21, x0
 .LBB42:
 .LBB41:
@@ -230,15 +229,15 @@ decode_wf_data:
 .LVL38:
 .LBE41:
 .LBE42:
-	.loc 1 203 0
+	.loc 1 252 0
 	cbz	x0, .L19
-	.loc 1 206 0
+	.loc 1 255 0
 	mov	x2, x20
 	add	x1, x21, 4
 	bl	memcpy
 .LVL39:
 .L19:
-	.loc 1 209 0
+	.loc 1 258 0
 	mov	x0, x19
 	ldr	x21, [sp, 32]
 .LVL40:
@@ -253,14 +252,14 @@ decode_wf_data:
 	.cfi_def_cfa 31, 0
 	ret
 	.cfi_endproc
-.LFE221:
+.LFE219:
 	.size	decode_wf_data, .-decode_wf_data
 	.section	.text.parse_wf_gray16,"ax",@progbits
 	.align	2
 	.type	parse_wf_gray16, %function
 parse_wf_gray16:
-.LFB225:
-	.loc 1 300 0
+.LFB223:
+	.loc 1 349 0
 	.cfi_startproc
 .LVL42:
 	stp	x29, x30, [sp, -32]!
@@ -271,30 +270,30 @@ parse_wf_gray16:
 	.cfi_def_cfa_register 29
 	str	x19, [sp, 16]
 	.cfi_offset 19, -16
-	.loc 1 300 0
+	.loc 1 349 0
 	mov	x19, x0
 	mov	w0, w1
 .LVL43:
-	.loc 1 306 0
+	.loc 1 355 0
 	mov	w1, w2
 .LVL44:
 	bl	get_wf_buf
 .LVL45:
-	.loc 1 307 0
+	.loc 1 356 0
 	ldrb	w1, [x0]
 .LVL46:
-	.loc 1 309 0
+	.loc 1 358 0
 	str	w1, [x19]
 .LVL47:
-	.loc 1 313 0
+	.loc 1 362 0
 	lsl	w1, w1, 6
 .LVL48:
 	bl	decode_wf_data
 .LVL49:
 	str	x0, [x19, 8]
-	.loc 1 317 0
+	.loc 1 366 0
 	cmp	x0, 0
-	.loc 1 318 0
+	.loc 1 367 0
 	ldr	x19, [sp, 16]
 .LVL50:
 	mov	w0, -22
@@ -306,15 +305,15 @@ parse_wf_gray16:
 	csel	w0, w0, wzr, eq
 	ret
 	.cfi_endproc
-.LFE225:
+.LFE223:
 	.size	parse_wf_gray16, .-parse_wf_gray16
 	.section	.text.rkf_wf_input,"ax",@progbits
 	.align	2
 	.global	rkf_wf_input
 	.type	rkf_wf_input, %function
 rkf_wf_input:
-.LFB229:
-	.loc 1 409 0
+.LFB214:
+	.loc 1 129 0
 	.cfi_startproc
 .LVL51:
 	stp	x29, x30, [sp, -80]!
@@ -326,13 +325,13 @@ rkf_wf_input:
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -48
 	.cfi_offset 22, -40
-	.loc 1 413 0
+	.loc 1 133 0
 	adrp	x22, .LANCHOR0
-	.loc 1 409 0
+	.loc 1 129 0
 	stp	x19, x20, [sp, 16]
-	.loc 1 413 0
+	.loc 1 133 0
 	ldr	x1, [x22, #:lo12:.LANCHOR0]
-	.loc 1 409 0
+	.loc 1 129 0
 	stp	x23, x24, [sp, 48]
 	str	x25, [sp, 64]
 	.cfi_offset 19, -64
@@ -340,7 +339,7 @@ rkf_wf_input:
 	.cfi_offset 23, -32
 	.cfi_offset 24, -24
 	.cfi_offset 25, -16
-	.loc 1 413 0
+	.loc 1 133 0
 	cbnz	x1, .L40
 	mov	x19, x0
 .LVL52:
@@ -363,14 +362,14 @@ rkf_wf_input:
 .LVL55:
 .LBE52:
 .LBE51:
-	.loc 1 418 0
+	.loc 1 138 0
 	adrp	x0, .LC2
 	add	x0, x0, :lo12:.LC2
 .L44:
-	.loc 1 424 0
+	.loc 1 144 0
 	bl	printf
 .LVL56:
-	.loc 1 425 0
+	.loc 1 145 0
 	mov	w21, -1
 	b	.L28
 .LVL57:
@@ -394,11 +393,11 @@ rkf_wf_input:
 .LBE55:
 .LBE54:
 .LBE53:
-	.loc 1 414 0
+	.loc 1 134 0
 	mov	w21, -16
 .LVL61:
 .L28:
-	.loc 1 433 0
+	.loc 1 153 0
 	mov	w0, w21
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -524,61 +523,61 @@ rkf_wf_input:
 .L38:
 .LBE69:
 .LBE70:
-	.loc 1 424 0
+	.loc 1 144 0
 	adrp	x0, .LC4
 	add	x0, x0, :lo12:.LC4
 	b	.L44
 .LVL75:
 .L37:
-	.loc 1 428 0
+	.loc 1 148 0
 	add	x1, x19, 20
 	adrp	x0, .LC5
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 .LVL76:
-	.loc 1 430 0
+	.loc 1 150 0
 	str	x19, [x22, #:lo12:.LANCHOR0]
-	.loc 1 432 0
+	.loc 1 152 0
 	b	.L28
 	.cfi_endproc
-.LFE229:
+.LFE214:
 	.size	rkf_wf_input, .-rkf_wf_input
 	.section	.text.rkf_wf_get_version,"ax",@progbits
 	.align	2
 	.global	rkf_wf_get_version
 	.type	rkf_wf_get_version, %function
 rkf_wf_get_version:
-.LFB230:
-	.loc 1 442 0
+.LFB215:
+	.loc 1 163 0
 	.cfi_startproc
-	.loc 1 443 0
+	.loc 1 164 0
 	adrp	x0, .LANCHOR0
 	ldr	x1, [x0, #:lo12:.LANCHOR0]
-	.loc 1 446 0
+	.loc 1 167 0
 	add	x0, x1, 84
 	cmp	x1, 0
-	.loc 1 447 0
+	.loc 1 168 0
 	csel	x0, x0, xzr, ne
 	ret
 	.cfi_endproc
-.LFE230:
+.LFE215:
 	.size	rkf_wf_get_version, .-rkf_wf_get_version
 	.section	.text.rkf_wf_get_lut,"ax",@progbits
 	.align	2
 	.global	rkf_wf_get_lut
 	.type	rkf_wf_get_lut, %function
 rkf_wf_get_lut:
-.LFB231:
-	.loc 1 460 0
+.LFB227:
+	.loc 1 462 0
 	.cfi_startproc
 .LVL77:
-	.loc 1 465 0
+	.loc 1 467 0
 	adrp	x3, .LANCHOR0
 	ldr	x3, [x3, #:lo12:.LANCHOR0]
 	cbz	x3, .L74
-	.loc 1 468 0
+	.loc 1 470 0
 	cbz	x0, .L75
-	.loc 1 460 0
+	.loc 1 462 0
 	stp	x29, x30, [sp, -48]!
 	.cfi_def_cfa_offset 48
 	.cfi_offset 29, -48
@@ -588,32 +587,32 @@ rkf_wf_get_lut:
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -32
 	.cfi_offset 20, -24
-	.loc 1 472 0
+	.loc 1 474 0
 	adrp	x20, .LANCHOR2
-	.loc 1 460 0
+	.loc 1 462 0
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -16
 	.cfi_offset 22, -8
-	.loc 1 472 0
+	.loc 1 474 0
 	ldr	w3, [x20, #:lo12:.LANCHOR2]
 	cmp	w3, w2
 	adrp	x3, .LANCHOR3
 	bne	.L50
-	.loc 1 472 0 is_stmt 0 discriminator 1
+	.loc 1 474 0 is_stmt 0 discriminator 1
 	ldr	w4, [x3, #:lo12:.LANCHOR3]
 	cmp	w4, w1
 	beq	.L76
 .L50:
 	mov	x19, x0
-	.loc 1 479 0 is_stmt 1
+	.loc 1 481 0 is_stmt 1
 	ldr	x0, [x0, 8]
 .LVL78:
-	.loc 1 475 0
+	.loc 1 477 0
 	str	w2, [x20, #:lo12:.LANCHOR2]
 	mov	w21, w1
-	.loc 1 476 0
+	.loc 1 478 0
 	str	w1, [x3, #:lo12:.LANCHOR3]
-	.loc 1 479 0
+	.loc 1 481 0
 	cbz	x0, .L51
 .LVL79:
 .LBB104:
@@ -623,16 +622,16 @@ rkf_wf_get_lut:
 .LVL80:
 .LBE105:
 .LBE104:
-	.loc 1 481 0
+	.loc 1 483 0
 	str	xzr, [x19, 8]
 .L51:
-	.loc 1 484 0
+	.loc 1 486 0
 	cmp	w21, 2
 	beq	.L56
-	.loc 1 487 0
+	.loc 1 489 0
 	cmp	w21, 11
 	beq	.L53
-	.loc 1 491 0
+	.loc 1 493 0
 	sub	w21, w21, #1
 .LVL81:
 	cmp	w21, 9
@@ -663,28 +662,28 @@ rkf_wf_get_lut:
 .LVL82:
 .LBB106:
 .LBB107:
-	.loc 1 276 0
+	.loc 1 325 0
 	ldr	w0, [x20, #:lo12:.LANCHOR2]
 	mov	w1, 0
 	bl	get_wf_buf
 .LVL83:
-	.loc 1 277 0
+	.loc 1 326 0
 	ldrb	w22, [x0]
 .LVL84:
-	.loc 1 280 0
+	.loc 1 329 0
 	add	w20, w22, 15
 	lsr	w20, w20, 4
 .LVL85:
-	.loc 1 281 0
+	.loc 1 330 0
 	lsl	w1, w20, 2
 .LVL86:
 	bl	decode_wf_data
 .LVL87:
 	mov	x21, x0
 .LVL88:
-	.loc 1 282 0
+	.loc 1 331 0
 	cbz	x0, .L70
-	.loc 1 286 0
+	.loc 1 335 0
 	str	w22, [x19]
 .LVL89:
 .LBB108:
@@ -699,21 +698,21 @@ rkf_wf_get_lut:
 .LVL91:
 .LBE111:
 .LBE110:
-	.loc 1 223 0
+	.loc 1 272 0
 	cbz	x0, .L78
 	mov	x2, 0
 .LVL92:
 .L64:
-	.loc 1 226 0
+	.loc 1 275 0
 	cmp	w20, w2
 	bgt	.L68
 .LVL93:
 .L63:
 .LBE109:
 .LBE108:
-	.loc 1 289 0
+	.loc 1 338 0
 	str	x0, [x19, 8]
-	.loc 1 290 0
+	.loc 1 339 0
 	cbnz	x0, .L69
 .LVL94:
 .LBB114:
@@ -727,7 +726,7 @@ rkf_wf_get_lut:
 .LBE114:
 .LBE107:
 .LBE106:
-	.loc 1 537 0
+	.loc 1 539 0
 	mov	w0, -1
 	b	.L48
 .LVL96:
@@ -736,7 +735,7 @@ rkf_wf_get_lut:
 .LBB119:
 .LBB116:
 .LBB113:
-	.loc 1 227 0
+	.loc 1 276 0
 	ldr	w7, [x21, x2, lsl 2]
 .LVL97:
 	lsl	x6, x2, 8
@@ -744,22 +743,22 @@ rkf_wf_get_lut:
 .LVL98:
 .L67:
 .LBB112:
-	.loc 1 229 0
+	.loc 1 278 0
 	lsl	w1, w3, 1
 	mov	w4, 0
 	asr	w1, w7, w1
 	and	w1, w1, 3
 .LVL99:
-	.loc 1 230 0
+	.loc 1 279 0
 	mov	w5, w1
 .LVL100:
 .L65:
-	.loc 1 233 0
+	.loc 1 282 0
 	lsl	w8, w1, w4
 	add	w4, w4, 2
 	orr	w5, w5, w8
 .LVL101:
-	.loc 1 232 0
+	.loc 1 281 0
 	cmp	w4, 32
 	bne	.L65
 	add	x4, x6, x3, lsl 4
@@ -768,19 +767,19 @@ rkf_wf_get_lut:
 	add	x4, x0, x4, lsl 2
 .LVL103:
 .L66:
-	.loc 1 236 0
+	.loc 1 285 0
 	str	w5, [x4, x1, lsl 2]
 .LVL104:
 	add	x1, x1, 1
 .LVL105:
-	.loc 1 235 0
+	.loc 1 284 0
 	cmp	x1, 16
 	bne	.L66
 .LVL106:
 	add	x3, x3, 1
 .LVL107:
 .LBE112:
-	.loc 1 228 0
+	.loc 1 277 0
 	cmp	x3, 16
 	bne	.L67
 .LVL108:
@@ -789,7 +788,7 @@ rkf_wf_get_lut:
 	b	.L64
 .LVL110:
 .L78:
-	.loc 1 224 0
+	.loc 1 273 0
 	mov	x0, 0
 	b	.L63
 .LVL111:
@@ -818,7 +817,7 @@ rkf_wf_get_lut:
 .LBE123:
 .LBE122:
 .LBE121:
-	.loc 1 505 0
+	.loc 1 507 0
 	mov	w2, 3
 .LVL114:
 .L106:
@@ -826,12 +825,12 @@ rkf_wf_get_lut:
 	mov	x0, x19
 	bl	parse_wf_gray16
 .LVL115:
-	.loc 1 506 0
+	.loc 1 508 0
 	cmp	w0, 0
 	csetm	w0, ne
 .LVL116:
 .L48:
-	.loc 1 551 0
+	.loc 1 553 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -847,97 +846,97 @@ rkf_wf_get_lut:
 .LVL117:
 .L53:
 	.cfi_restore_state
-	.loc 1 511 0
+	.loc 1 513 0
 	mov	w2, 4
 	b	.L106
 .LVL118:
 .L61:
-	.loc 1 517 0
+	.loc 1 519 0
 	mov	w2, 5
 	b	.L106
 .LVL119:
 .L56:
-	.loc 1 523 0
+	.loc 1 525 0
 	mov	w2, 2
 	b	.L106
 .LVL120:
 .L57:
 .LBB130:
 .LBB131:
-	.loc 1 327 0
+	.loc 1 376 0
 	ldr	w0, [x20, #:lo12:.LANCHOR2]
 	mov	w1, 1
 	bl	get_wf_buf
 .LVL121:
-	.loc 1 328 0
+	.loc 1 377 0
 	ldrb	w20, [x0]
 .LVL122:
-	.loc 1 332 0
+	.loc 1 381 0
 	lsl	w1, w20, 6
 .LVL123:
 	bl	decode_wf_data
 .LVL124:
 	str	x0, [x19, 8]
-	.loc 1 333 0
+	.loc 1 382 0
 	cbz	x0, .L70
-	.loc 1 336 0
+	.loc 1 385 0
 	str	w20, [x19]
 .LVL125:
 .L76:
 .LBE131:
 .LBE130:
-	.loc 1 473 0
+	.loc 1 475 0
 	mov	w0, 0
 	b	.L48
 .LVL126:
 .L58:
-	.loc 1 535 0
+	.loc 1 537 0
 	ldr	w20, [x20, #:lo12:.LANCHOR2]
 .LVL127:
 .LBB132:
 .LBB129:
-	.loc 1 349 0
+	.loc 1 398 0
 	mov	w1, 2
 	mov	w0, w20
 	bl	get_wf_buf
 .LVL128:
-	.loc 1 350 0
+	.loc 1 399 0
 	ldrb	w1, [x0]
 .LVL129:
-	.loc 1 352 0
+	.loc 1 401 0
 	str	w1, [x19]
 .LVL130:
-	.loc 1 356 0
+	.loc 1 405 0
 	lsl	w1, w1, 6
 .LVL131:
 	bl	decode_wf_data
 .LVL132:
 	str	x0, [x19, 8]
-	.loc 1 357 0
+	.loc 1 406 0
 	cbz	x0, .L70
-	.loc 1 362 0
+	.loc 1 411 0
 	mov	w1, 1
 	mov	w0, w20
 	bl	get_wf_buf
 .LVL133:
 .LBB125:
 .LBB126:
-	.loc 1 194 0
+	.loc 1 243 0
 	ldrb	w20, [x0]
 .LVL134:
 .LBE126:
 .LBE125:
-	.loc 1 365 0
+	.loc 1 414 0
 	ldr	w1, [x19]
 	orr	w1, w1, w20, lsl 8
 	str	w1, [x19]
 .LVL135:
-	.loc 1 370 0
+	.loc 1 419 0
 	lsl	w1, w20, 6
 .LVL136:
 	bl	decode_wf_data
 .LVL137:
-	.loc 1 371 0
+	.loc 1 420 0
 	cbz	x0, .L70
 	ldr	x7, [x19, 8]
 .LVL138:
@@ -951,32 +950,32 @@ rkf_wf_get_lut:
 .LVL141:
 .LBB127:
 .LBB128:
-	.loc 1 254 0
+	.loc 1 303 0
 	cmp	x2, x20
 	beq	.L107
 	mov	x1, 0
 .LVL142:
 .L72:
-	.loc 1 256 0
+	.loc 1 305 0
 	ldr	w3, [x6, x1]
 .LVL143:
-	.loc 1 258 0
+	.loc 1 307 0
 	ldr	w4, [x5, x1]
 .LVL144:
-	.loc 1 257 0
+	.loc 1 306 0
 	and	w3, w3, -1073741821
 .LVL145:
-	.loc 1 259 0
+	.loc 1 308 0
 	and	w4, w4, 1073741820
 .LVL146:
-	.loc 1 261 0
+	.loc 1 310 0
 	orr	w3, w3, w4
 .LVL147:
 	str	w3, [x5, x1]
 .LVL148:
 	add	x1, x1, 4
 .LVL149:
-	.loc 1 255 0
+	.loc 1 304 0
 	cmp	x1, 64
 	bne	.L72
 	add	x2, x2, 64
@@ -989,27 +988,27 @@ rkf_wf_get_lut:
 .LBE132:
 .LBB133:
 .LBB134:
-	.loc 1 388 0
+	.loc 1 437 0
 	ldr	w0, [x20, #:lo12:.LANCHOR2]
 	mov	w1, 6
 	bl	get_wf_buf
 .LVL151:
-	.loc 1 389 0
+	.loc 1 438 0
 	ldrb	w1, [x0]
 .LVL152:
-	.loc 1 391 0
+	.loc 1 440 0
 	str	w1, [x19]
 .LVL153:
-	.loc 1 395 0
+	.loc 1 444 0
 	lsl	w1, w1, 6
 .LVL154:
 	bl	decode_wf_data
 .LVL155:
-	.loc 1 396 0
+	.loc 1 445 0
 	cmp	x0, 0
-	.loc 1 395 0
+	.loc 1 444 0
 	str	x0, [x19, 8]
-	.loc 1 396 0
+	.loc 1 445 0
 	csetm	w0, eq
 	b	.L48
 .LVL156:
@@ -1023,18 +1022,18 @@ rkf_wf_get_lut:
 	.cfi_restore 30
 .LBE134:
 .LBE133:
-	.loc 1 466 0
+	.loc 1 468 0
 	mov	w0, -19
 .LVL157:
 	ret
 .LVL158:
 .L75:
-	.loc 1 469 0
+	.loc 1 471 0
 	mov	w0, -22
 .LVL159:
 	ret
 	.cfi_endproc
-.LFE231:
+.LFE227:
 	.size	rkf_wf_get_lut, .-rkf_wf_get_lut
 	.section	.bss.crc32_table,"aw",@nobits
 	.align	3
@@ -1050,19 +1049,19 @@ crc32_table:
 	.size	global_waveform, 8
 global_waveform:
 	.zero	8
-	.section	.data.sftemp.6124,"aw",@progbits
+	.section	.data.sftemp.6130,"aw",@progbits
 	.align	2
 	.set	.LANCHOR2,. + 0
-	.type	sftemp.6124, %object
-	.size	sftemp.6124, 4
-sftemp.6124:
+	.type	sftemp.6130, %object
+	.size	sftemp.6130, 4
+sftemp.6130:
 	.word	-1
-	.section	.data.stype.6123,"aw",@progbits
+	.section	.data.stype.6129,"aw",@progbits
 	.align	2
 	.set	.LANCHOR3,. + 0
-	.type	stype.6123, %object
-	.size	stype.6123, 4
-stype.6123:
+	.type	stype.6129, %object
+	.size	stype.6129, 4
+stype.6129:
 	.word	13
 	.section	.rodata.rkf_wf_input.str1.1,"aMS",@progbits,1
 .LC0:
@@ -1104,15 +1103,15 @@ stype.6123:
 	.file 25 "include/log.h"
 	.section	.debug_info,"",@progbits
 .Ldebug_info0:
-	.4byte	0x1e83
+	.4byte	0x1d8c
 	.2byte	0x4
 	.4byte	.Ldebug_abbrev0
 	.byte	0x8
 	.uleb128 0x1
-	.4byte	.LASF399
+	.4byte	.LASF388
 	.byte	0xc
-	.4byte	.LASF400
-	.4byte	.LASF401
+	.4byte	.LASF389
+	.4byte	.LASF390
 	.4byte	.Ldebug_ranges0+0x210
 	.8byte	0
 	.4byte	.Ldebug_line0
@@ -1409,7 +1408,7 @@ stype.6123:
 	.2byte	0x1ff
 	.byte	0
 	.uleb128 0x17
-	.4byte	.LASF402
+	.4byte	.LASF391
 	.uleb128 0x8
 	.byte	0x8
 	.4byte	0x28c
@@ -2146,12 +2145,12 @@ stype.6123:
 	.2byte	0x198
 	.4byte	0x88a
 	.uleb128 0x24
-	.4byte	.LASF280
+	.4byte	.LASF269
 	.byte	0x4
 	.4byte	0x59
 	.byte	0x15
 	.byte	0xe
-	.4byte	0xaed
+	.4byte	0xaf3
 	.uleb128 0x25
 	.4byte	.LASF140
 	.byte	0
@@ -2434,8 +2433,11 @@ stype.6123:
 	.uleb128 0x25
 	.4byte	.LASF233
 	.byte	0x5d
-	.uleb128 0x26
+	.uleb128 0x25
 	.4byte	.LASF234
+	.byte	0x5e
+	.uleb128 0x26
+	.4byte	.LASF235
 	.sleb128 -1
 	.byte	0
 	.uleb128 0x27
@@ -2443,61 +2445,61 @@ stype.6123:
 	.4byte	0x84
 	.byte	0x19
 	.byte	0xf6
-	.4byte	0xb00
+	.4byte	0xb06
 	.uleb128 0x25
-	.4byte	.LASF235
+	.4byte	.LASF236
 	.byte	0x5
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xe1
-	.4byte	0xb10
+	.4byte	0xb16
 	.uleb128 0xe
 	.4byte	0xd4
 	.byte	0x1f
 	.byte	0
 	.uleb128 0x5
-	.4byte	.LASF236
+	.4byte	.LASF237
 	.byte	0x3
 	.byte	0xad
 	.4byte	0x11b
 	.uleb128 0xa
 	.4byte	0x99
-	.4byte	0xb26
+	.4byte	0xb2c
 	.uleb128 0xb
 	.byte	0
 	.uleb128 0x5
-	.4byte	.LASF237
+	.4byte	.LASF238
 	.byte	0x3
 	.byte	0xaf
-	.4byte	0xb1b
+	.4byte	0xb21
 	.uleb128 0x5
-	.4byte	.LASF238
+	.4byte	.LASF239
 	.byte	0x3
 	.byte	0xb0
-	.4byte	0xb1b
+	.4byte	0xb21
 	.uleb128 0x5
-	.4byte	.LASF239
+	.4byte	.LASF240
 	.byte	0x3
 	.byte	0xfe
 	.4byte	0x11b
 	.uleb128 0x5
-	.4byte	.LASF240
+	.4byte	.LASF241
 	.byte	0x3
 	.byte	0xff
 	.4byte	0x11b
 	.uleb128 0xc
-	.4byte	.LASF241
+	.4byte	.LASF242
 	.byte	0x3
 	.2byte	0x100
 	.4byte	0x11b
 	.uleb128 0xf
-	.4byte	.LASF242
+	.4byte	.LASF243
 	.byte	0x4
 	.byte	0x14
 	.byte	0x2e
-	.4byte	0xb77
+	.4byte	0xb7d
 	.uleb128 0x10
-	.4byte	.LASF243
+	.4byte	.LASF244
 	.byte	0x14
 	.byte	0x2f
 	.4byte	0x131
@@ -2506,354 +2508,219 @@ stype.6123:
 	.uleb128 0x8
 	.byte	0x8
 	.4byte	0x29
-	.uleb128 0xf
-	.4byte	.LASF244
-	.byte	0x68
-	.byte	0x14
-	.byte	0xa6
-	.4byte	0xc1a
-	.uleb128 0x10
-	.4byte	.LASF30
-	.byte	0x14
-	.byte	0xa8
-	.4byte	0xc1a
-	.byte	0
-	.uleb128 0x10
-	.4byte	.LASF245
-	.byte	0x14
-	.byte	0xa9
-	.4byte	0x1a7
-	.byte	0x10
-	.uleb128 0x10
-	.4byte	.LASF246
-	.byte	0x14
-	.byte	0xaa
-	.4byte	0xbe
-	.byte	0x18
-	.uleb128 0x10
-	.4byte	.LASF137
-	.byte	0x14
-	.byte	0xab
-	.4byte	0x59
-	.byte	0x20
-	.uleb128 0x10
-	.4byte	.LASF247
-	.byte	0x14
-	.byte	0xad
-	.4byte	0xc44
-	.byte	0x28
-	.uleb128 0x10
-	.4byte	.LASF248
-	.byte	0x14
-	.byte	0xae
-	.4byte	0xc63
-	.byte	0x30
-	.uleb128 0x10
-	.4byte	.LASF249
-	.byte	0x14
-	.byte	0xaf
-	.4byte	0xc78
-	.byte	0x38
-	.uleb128 0x10
-	.4byte	.LASF250
-	.byte	0x14
-	.byte	0xb0
-	.4byte	0xc89
-	.byte	0x40
-	.uleb128 0x10
-	.4byte	.LASF251
-	.byte	0x14
-	.byte	0xb4
-	.4byte	0xc78
-	.byte	0x48
-	.uleb128 0x10
-	.4byte	.LASF252
-	.byte	0x14
-	.byte	0xb5
-	.4byte	0xc3e
-	.byte	0x50
-	.uleb128 0x10
-	.4byte	.LASF253
-	.byte	0x14
-	.byte	0xb6
-	.4byte	0x59
-	.byte	0x58
-	.uleb128 0x10
-	.4byte	.LASF254
-	.byte	0x14
-	.byte	0xb7
-	.4byte	0x147
-	.byte	0x60
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xe1
-	.4byte	0xc2a
-	.uleb128 0xe
-	.4byte	0xd4
-	.byte	0xf
-	.byte	0
-	.uleb128 0x11
-	.4byte	0x59
-	.4byte	0xc3e
-	.uleb128 0x12
-	.4byte	0xc3e
-	.uleb128 0x12
-	.4byte	0x884
-	.byte	0
-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0xb7d
-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0xc2a
-	.uleb128 0x11
-	.4byte	0x59
-	.4byte	0xc63
-	.uleb128 0x12
-	.4byte	0xc3e
-	.uleb128 0x12
-	.4byte	0x147
-	.uleb128 0x12
-	.4byte	0x59
-	.byte	0
-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0xc4a
-	.uleb128 0x11
-	.4byte	0x59
-	.4byte	0xc78
-	.uleb128 0x12
-	.4byte	0xc3e
-	.byte	0
-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0xc69
 	.uleb128 0x28
-	.4byte	0xc89
-	.uleb128 0x12
-	.4byte	0xc3e
-	.byte	0
-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0xc7e
-	.uleb128 0x5
-	.4byte	.LASF255
-	.byte	0x14
-	.byte	0xbd
-	.4byte	0xc3e
-	.uleb128 0x28
-	.4byte	0xcaa
+	.4byte	0xb93
 	.uleb128 0x12
 	.4byte	0x147
 	.uleb128 0x12
 	.4byte	0x59
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF256
+	.4byte	.LASF245
 	.byte	0x14
 	.2byte	0x11e
-	.4byte	0xcb6
+	.4byte	0xb9f
 	.uleb128 0x8
 	.byte	0x8
-	.4byte	0xc9a
+	.4byte	0xb83
 	.uleb128 0xa
 	.4byte	0x99
-	.4byte	0xccc
+	.4byte	0xbb5
 	.uleb128 0xe
 	.4byte	0xd4
 	.byte	0x5
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF257
+	.4byte	.LASF246
 	.byte	0x14
 	.2byte	0x1fd
-	.4byte	0xb5e
+	.4byte	0xb64
 	.uleb128 0xc
-	.4byte	.LASF258
+	.4byte	.LASF247
 	.byte	0x14
 	.2byte	0x1fe
-	.4byte	0xb5e
+	.4byte	0xb64
 	.uleb128 0xc
-	.4byte	.LASF259
+	.4byte	.LASF248
 	.byte	0x14
 	.2byte	0x200
-	.4byte	0xb5e
+	.4byte	0xb64
 	.uleb128 0xc
-	.4byte	.LASF260
+	.4byte	.LASF249
 	.byte	0x14
 	.2byte	0x205
-	.4byte	0xb00
+	.4byte	0xb06
 	.uleb128 0xc
-	.4byte	.LASF261
+	.4byte	.LASF250
 	.byte	0x14
 	.2byte	0x206
-	.4byte	0xb00
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 	.uleb128 0xa
 	.4byte	0xe1
-	.4byte	0xd18
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 	.uleb128 0xe
 	.4byte	0xd4
 	.byte	0x3f
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF262
+	.4byte	.LASF251
 	.byte	0x14
 	.2byte	0x207
-	.4byte	0xd08
+	.4byte	0xbf1
 	.uleb128 0xc
-	.4byte	.LASF263
+	.4byte	.LASF252
 	.byte	0x14
 	.2byte	0x209
-	.4byte	0xcbc
+	.4byte	0xba5
 	.uleb128 0xc
-	.4byte	.LASF264
+	.4byte	.LASF253
 	.byte	0x14
 	.2byte	0x20a
-	.4byte	0xcbc
+	.4byte	0xba5
 	.uleb128 0xc
-	.4byte	.LASF265
+	.4byte	.LASF254
 	.byte	0x14
 	.2byte	0x20b
-	.4byte	0xb5e
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 	.uleb128 0xc
-	.4byte	.LASF266
+	.4byte	.LASF255
 	.byte	0x14
 	.2byte	0x20c
-	.4byte	0xb5e
+	.4byte	0xb64
 	.uleb128 0xc
-	.4byte	.LASF267
+	.4byte	.LASF256
 	.byte	0x14
 	.2byte	0x20d
-	.4byte	0xb77
+	.4byte	0xb7d
 	.uleb128 0xa
-	.4byte	0xb77
-	.4byte	0xd70
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+	.4byte	0xc59
 	.uleb128 0xe
 	.4byte	0xd4
 	.byte	0x3
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF268
+	.4byte	.LASF257
 	.byte	0x14
 	.2byte	0x20e
-	.4byte	0xd60
+	.4byte	0xc49
 	.uleb128 0xc
-	.4byte	.LASF269
+	.4byte	.LASF258
 	.byte	0x14
 	.2byte	0x20f
-	.4byte	0xb77
+	.4byte	0xb7d
 	.uleb128 0xc
-	.4byte	.LASF270
+	.4byte	.LASF259
 	.byte	0x14
 	.2byte	0x210
 	.4byte	0x59
 	.uleb128 0xa
 	.4byte	0xa3
-	.4byte	0xda4
+	.4byte	0xc8d
 	.uleb128 0xe
 	.4byte	0xd4
 	.byte	0x5
 	.byte	0
 	.uleb128 0x4
-	.4byte	0xd94
+	.4byte	0xc7d
 	.uleb128 0xc
-	.4byte	.LASF271
+	.4byte	.LASF260
 	.byte	0x14
 	.2byte	0x211
-	.4byte	0xda4
+	.4byte	0xc8d
 	.uleb128 0xc
-	.4byte	.LASF272
+	.4byte	.LASF261
 	.byte	0x14
 	.2byte	0x212
-	.4byte	0xda4
+	.4byte	0xc8d
 	.uleb128 0xc
-	.4byte	.LASF273
+	.4byte	.LASF262
 	.byte	0x14
 	.2byte	0x216
 	.4byte	0x110
 	.uleb128 0xc
-	.4byte	.LASF274
+	.4byte	.LASF263
 	.byte	0x14
 	.2byte	0x217
 	.4byte	0x110
 	.uleb128 0xc
-	.4byte	.LASF275
+	.4byte	.LASF264
 	.byte	0x14
 	.2byte	0x219
 	.4byte	0x59
 	.uleb128 0xa
 	.4byte	0xe1
-	.4byte	0xdf6
+	.4byte	0xcdf
 	.uleb128 0x16
 	.4byte	0xd4
 	.2byte	0x3ff
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF276
+	.4byte	.LASF265
 	.byte	0x14
 	.2byte	0x220
-	.4byte	0xde5
+	.4byte	0xcce
 	.uleb128 0xc
-	.4byte	.LASF277
+	.4byte	.LASF266
 	.byte	0x14
 	.2byte	0x222
 	.4byte	0xa8
 	.uleb128 0xc
-	.4byte	.LASF278
+	.4byte	.LASF267
 	.byte	0x14
 	.2byte	0x224
 	.4byte	0xa8
 	.uleb128 0xc
-	.4byte	.LASF279
+	.4byte	.LASF268
 	.byte	0x14
 	.2byte	0x230
-	.4byte	0xb5e
+	.4byte	0xb64
 	.uleb128 0x29
-	.4byte	.LASF281
+	.4byte	.LASF270
 	.byte	0x4
 	.4byte	0x84
 	.byte	0x14
 	.2byte	0x286
-	.4byte	0xe50
+	.4byte	0xd39
 	.uleb128 0x25
-	.4byte	.LASF282
+	.4byte	.LASF271
 	.byte	0
 	.uleb128 0x25
-	.4byte	.LASF283
+	.4byte	.LASF272
 	.byte	0x1
 	.uleb128 0x25
-	.4byte	.LASF284
+	.4byte	.LASF273
 	.byte	0x2
 	.uleb128 0x25
-	.4byte	.LASF285
+	.4byte	.LASF274
 	.byte	0x3
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF286
+	.4byte	.LASF275
 	.byte	0x14
 	.2byte	0x28c
-	.4byte	0xe26
+	.4byte	0xd0f
 	.uleb128 0xc
-	.4byte	.LASF287
+	.4byte	.LASF276
 	.byte	0x16
 	.2byte	0x3ba
 	.4byte	0x11b
 	.uleb128 0xc
-	.4byte	.LASF288
+	.4byte	.LASF277
 	.byte	0x16
 	.2byte	0x3bb
 	.4byte	0x11b
 	.uleb128 0xc
-	.4byte	.LASF289
+	.4byte	.LASF278
 	.byte	0x16
 	.2byte	0x3bc
 	.4byte	0x11b
 	.uleb128 0xf
-	.4byte	.LASF290
+	.4byte	.LASF279
 	.byte	0x4
 	.byte	0x2
 	.byte	0xd
-	.4byte	0xe99
+	.4byte	0xd82
 	.uleb128 0x19
 	.string	"pid"
 	.byte	0x2
@@ -2862,77 +2729,77 @@ stype.6123:
 	.byte	0
 	.byte	0
 	.uleb128 0x5
-	.4byte	.LASF291
+	.4byte	.LASF280
 	.byte	0x2
 	.byte	0x11
-	.4byte	0xea4
+	.4byte	0xd8d
 	.uleb128 0x8
 	.byte	0x8
-	.4byte	0xe80
+	.4byte	0xd69
 	.uleb128 0x24
-	.4byte	.LASF292
+	.4byte	.LASF281
 	.byte	0x4
 	.4byte	0x84
 	.byte	0x17
 	.byte	0x14
-	.4byte	0xf09
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 	.uleb128 0x25
-	.4byte	.LASF293
+	.4byte	.LASF282
 	.byte	0x1
 	.uleb128 0x25
-	.4byte	.LASF294
+	.4byte	.LASF283
 	.byte	0x2
 	.uleb128 0x25
-	.4byte	.LASF295
+	.4byte	.LASF284
 	.byte	0x3
 	.uleb128 0x25
-	.4byte	.LASF296
+	.4byte	.LASF285
 	.byte	0x4
 	.uleb128 0x25
-	.4byte	.LASF297
+	.4byte	.LASF286
 	.byte	0x5
 	.uleb128 0x25
-	.4byte	.LASF298
+	.4byte	.LASF287
 	.byte	0x6
 	.uleb128 0x25
-	.4byte	.LASF299
+	.4byte	.LASF288
 	.byte	0x7
 	.uleb128 0x25
-	.4byte	.LASF300
+	.4byte	.LASF289
 	.byte	0x8
 	.uleb128 0x25
-	.4byte	.LASF301
+	.4byte	.LASF290
 	.byte	0x9
 	.uleb128 0x25
-	.4byte	.LASF302
+	.4byte	.LASF291
 	.byte	0xa
 	.uleb128 0x25
-	.4byte	.LASF303
+	.4byte	.LASF292
 	.byte	0xb
 	.uleb128 0x25
-	.4byte	.LASF304
+	.4byte	.LASF293
 	.byte	0xc
 	.uleb128 0x25
-	.4byte	.LASF305
+	.4byte	.LASF294
 	.byte	0xd
 	.byte	0
 	.uleb128 0xf
-	.4byte	.LASF306
+	.4byte	.LASF295
 	.byte	0x10
 	.byte	0x17
 	.byte	0x43
-	.4byte	0xf2e
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 	.uleb128 0x10
-	.4byte	.LASF307
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 	.byte	0x17
 	.byte	0x44
 	.4byte	0x84
 	.byte	0
 	.uleb128 0x10
-	.4byte	.LASF308
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 	.byte	0x17
 	.byte	0x45
-	.4byte	0xf2e
+	.4byte	0xe17
 	.byte	0x8
 	.byte	0
 	.uleb128 0x8
@@ -2940,347 +2807,354 @@ stype.6123:
 	.4byte	0x84
 	.uleb128 0x8
 	.byte	0x8
-	.4byte	0xf09
+	.4byte	0xdf2
 	.uleb128 0x24
-	.4byte	.LASF309
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 	.byte	0x4
 	.4byte	0x84
 	.byte	0x1
 	.byte	0x15
-	.4byte	0xf75
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 	.uleb128 0x25
-	.4byte	.LASF310
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 	.byte	0
 	.uleb128 0x25
-	.4byte	.LASF311
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 	.byte	0x1
 	.uleb128 0x25
-	.4byte	.LASF312
+	.4byte	.LASF301
 	.byte	0x2
 	.uleb128 0x25
-	.4byte	.LASF313
+	.4byte	.LASF302
 	.byte	0x3
 	.uleb128 0x25
-	.4byte	.LASF314
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 	.uleb128 0x25
-	.4byte	.LASF315
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 	.byte	0x5
 	.uleb128 0x25
-	.4byte	.LASF316
+	.4byte	.LASF305
 	.byte	0x6
 	.byte	0
 	.uleb128 0x18
-	.4byte	.LASF317
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 	.2byte	0x954
 	.byte	0x1
 	.byte	0x1f
-	.4byte	0x108b
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 	.uleb128 0x10
-	.4byte	.LASF318
+	.4byte	.LASF307
 	.byte	0x1
 	.byte	0x20
 	.4byte	0x59
 	.byte	0
 	.uleb128 0x10
-	.4byte	.LASF319
+	.4byte	.LASF308
 	.byte	0x1
 	.byte	0x21
-	.4byte	0xc1a
+	.4byte	0xf74
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF83
 	.byte	0x1
 	.byte	0x22
-	.4byte	0xc1a
+	.4byte	0xf74
 	.byte	0x14
 	.uleb128 0x10
-	.4byte	.LASF320
+	.4byte	.LASF309
 	.byte	0x1
 	.byte	0x23
-	.4byte	0xc1a
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 	.uleb128 0x10
-	.4byte	.LASF321
+	.4byte	.LASF310
 	.byte	0x1
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-	.4byte	0xc1a
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 	.uleb128 0x10
-	.4byte	.LASF322
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 	.byte	0x1
 	.byte	0x25
-	.4byte	0xc1a
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 	.uleb128 0x10
-	.4byte	.LASF323
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 	.byte	0x1
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-	.4byte	0xd08
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 	.uleb128 0x10
-	.4byte	.LASF324
+	.4byte	.LASF313
 	.byte	0x1
 	.byte	0x27
-	.4byte	0xd08
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 	.byte	0x94
 	.uleb128 0x10
-	.4byte	.LASF325
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 	.byte	0x1
 	.byte	0x28
-	.4byte	0xd08
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 	.byte	0xd4
 	.uleb128 0x14
-	.4byte	.LASF326
+	.4byte	.LASF315
 	.byte	0x1
 	.byte	0x29
-	.4byte	0xd08
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 	.2byte	0x114
 	.uleb128 0x14
-	.4byte	.LASF327
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 	.byte	0x1
 	.byte	0x2a
-	.4byte	0xd08
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 	.2byte	0x154
 	.uleb128 0x14
-	.4byte	.LASF328
+	.4byte	.LASF317
 	.byte	0x1
 	.byte	0x2b
-	.4byte	0xd08
+	.4byte	0xbf1
 	.2byte	0x194
 	.uleb128 0x14
-	.4byte	.LASF329
+	.4byte	.LASF318
 	.byte	0x1
 	.byte	0x2c
-	.4byte	0xd08
+	.4byte	0xbf1
 	.2byte	0x1d4
 	.uleb128 0x14
-	.4byte	.LASF330
+	.4byte	.LASF319
 	.byte	0x1
 	.byte	0x2d
-	.4byte	0xd08
+	.4byte	0xbf1
 	.2byte	0x214
 	.uleb128 0x14
-	.4byte	.LASF331
+	.4byte	.LASF320
 	.byte	0x1
 	.byte	0x2e
-	.4byte	0x108b
+	.4byte	0xf84
 	.2byte	0x254
 	.uleb128 0x14
-	.4byte	.LASF332
+	.4byte	.LASF321
 	.byte	0x1
 	.byte	0x2f
-	.4byte	0x108b
+	.4byte	0xf84
 	.2byte	0x354
 	.uleb128 0x14
-	.4byte	.LASF333
+	.4byte	.LASF322
 	.byte	0x1
 	.byte	0x30
-	.4byte	0x108b
+	.4byte	0xf84
 	.2byte	0x454
 	.uleb128 0x14
-	.4byte	.LASF334
+	.4byte	.LASF323
 	.byte	0x1
 	.byte	0x31
-	.4byte	0x108b
+	.4byte	0xf84
 	.2byte	0x554
 	.uleb128 0x14
-	.4byte	.LASF335
+	.4byte	.LASF324
 	.byte	0x1
 	.byte	0x32
-	.4byte	0x108b
+	.4byte	0xf84
 	.2byte	0x654
 	.uleb128 0x14
-	.4byte	.LASF336
+	.4byte	.LASF325
 	.byte	0x1
 	.byte	0x33
-	.4byte	0x108b
+	.4byte	0xf84
 	.2byte	0x754
 	.uleb128 0x14
-	.4byte	.LASF337
+	.4byte	.LASF326
 	.byte	0x1
 	.byte	0x34
-	.4byte	0x108b
+	.4byte	0xf84
 	.2byte	0x854
 	.byte	0
 	.uleb128 0xa
+	.4byte	0xe1
+	.4byte	0xf84
+	.uleb128 0xe
+	.4byte	0xd4
+	.byte	0xf
+	.byte	0
+	.uleb128 0xa
 	.4byte	0x84
-	.4byte	0x109b
+	.4byte	0xf94
 	.uleb128 0xe
 	.4byte	0xd4
 	.byte	0x3f
 	.byte	0
 	.uleb128 0x2a
-	.4byte	.LASF338
+	.4byte	.LASF327
 	.byte	0x1
 	.byte	0x38
-	.4byte	0x10b0
+	.4byte	0xfa9
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	global_waveform
 	.uleb128 0x8
 	.byte	0x8
-	.4byte	0xf75
+	.4byte	0xe5e
 	.uleb128 0xa
 	.4byte	0x84
-	.4byte	0x10c6
+	.4byte	0xfbf
 	.uleb128 0xe
 	.4byte	0xd4
 	.byte	0xff
 	.byte	0
 	.uleb128 0x2a
-	.4byte	.LASF339
+	.4byte	.LASF328
 	.byte	0x1
 	.byte	0x39
-	.4byte	0x10b6
+	.4byte	0xfaf
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	crc32_table
 	.uleb128 0x2b
-	.4byte	.LASF345
+	.4byte	.LASF362
 	.byte	0x1
-	.2byte	0x1cb
+	.2byte	0x1cd
 	.4byte	0x59
-	.8byte	.LFB231
-	.8byte	.LFE231-.LFB231
+	.8byte	.LFB227
+	.8byte	.LFE227-.LFB227
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x15fa
+	.4byte	0x14f4
 	.uleb128 0x2c
-	.4byte	.LASF340
+	.4byte	.LASF329
 	.byte	0x1
-	.2byte	0x1cb
-	.4byte	0xf34
+	.2byte	0x1cd
+	.4byte	0xe1d
 	.4byte	.LLST35
 	.uleb128 0x2c
-	.4byte	.LASF341
+	.4byte	.LASF330
 	.byte	0x1
-	.2byte	0x1cb
-	.4byte	0xeaa
+	.2byte	0x1cd
+	.4byte	0xd93
 	.4byte	.LLST36
 	.uleb128 0x2c
-	.4byte	.LASF342
+	.4byte	.LASF331
 	.byte	0x1
-	.2byte	0x1cb
+	.2byte	0x1cd
 	.4byte	0x59
 	.4byte	.LLST37
 	.uleb128 0x2d
-	.4byte	.LASF343
+	.4byte	.LASF332
 	.byte	0x1
-	.2byte	0x1cd
-	.4byte	0xeaa
+	.2byte	0x1cf
+	.4byte	0xd93
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	stype.6123
+	.8byte	stype.6129
 	.uleb128 0x2d
-	.4byte	.LASF344
+	.4byte	.LASF333
 	.byte	0x1
-	.2byte	0x1ce
+	.2byte	0x1d0
 	.4byte	0x59
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	sftemp.6124
+	.8byte	sftemp.6130
 	.uleb128 0x2e
 	.string	"ret"
 	.byte	0x1
-	.2byte	0x1cf
+	.2byte	0x1d1
 	.4byte	0x59
 	.4byte	.LLST38
 	.uleb128 0x2f
-	.4byte	0x1e02
+	.4byte	0x1d0b
 	.8byte	.LBB104
 	.8byte	.LBE104-.LBB104
 	.byte	0x1
-	.2byte	0x1e0
-	.4byte	0x119c
+	.2byte	0x1e2
+	.4byte	0x1095
 	.uleb128 0x30
-	.4byte	0x1e0e
+	.4byte	0x1d17
 	.4byte	.LLST39
 	.uleb128 0x31
 	.8byte	.LVL80
-	.4byte	0x1e41
+	.4byte	0x1d4a
 	.byte	0
 	.uleb128 0x32
-	.4byte	0x19aa
+	.4byte	0x169a
 	.8byte	.LBB106
 	.4byte	.Ldebug_ranges0+0x180
 	.byte	0x1
-	.2byte	0x1ed
-	.4byte	0x1362
+	.2byte	0x1ef
+	.4byte	0x125c
 	.uleb128 0x30
-	.4byte	0x19c7
+	.4byte	0x16b7
 	.4byte	.LLST40
 	.uleb128 0x30
-	.4byte	0x19bb
+	.4byte	0x16ab
 	.4byte	.LLST41
 	.uleb128 0x33
 	.4byte	.Ldebug_ranges0+0x180
 	.uleb128 0x34
-	.4byte	0x19d3
+	.4byte	0x16c3
 	.uleb128 0x35
-	.4byte	0x19df
+	.4byte	0x16cf
 	.4byte	.LLST42
 	.uleb128 0x35
-	.4byte	0x19eb
+	.4byte	0x16db
 	.4byte	.LLST43
 	.uleb128 0x35
-	.4byte	0x19f7
+	.4byte	0x16e7
 	.4byte	.LLST44
 	.uleb128 0x32
-	.4byte	0x1a67
+	.4byte	0x1760
 	.8byte	.LBB108
 	.4byte	.Ldebug_ranges0+0x1b0
 	.byte	0x1
-	.2byte	0x121
-	.4byte	0x12d3
+	.2byte	0x152
+	.4byte	0x11cd
 	.uleb128 0x30
-	.4byte	0x1a77
+	.4byte	0x1771
 	.4byte	.LLST45
 	.uleb128 0x33
 	.4byte	.Ldebug_ranges0+0x1b0
 	.uleb128 0x35
-	.4byte	0x1a82
+	.4byte	0x177d
 	.4byte	.LLST46
 	.uleb128 0x34
-	.4byte	0x1a8d
+	.4byte	0x1789
 	.uleb128 0x35
-	.4byte	0x1a98
+	.4byte	0x1795
 	.4byte	.LLST47
 	.uleb128 0x35
-	.4byte	0x1aa1
+	.4byte	0x179f
 	.4byte	.LLST48
 	.uleb128 0x35
-	.4byte	0x1aaa
+	.4byte	0x17a9
 	.4byte	.LLST49
 	.uleb128 0x35
-	.4byte	0x1ab3
+	.4byte	0x17b3
 	.4byte	.LLST50
 	.uleb128 0x35
-	.4byte	0x1abc
+	.4byte	0x17bd
 	.4byte	.LLST51
 	.uleb128 0x35
-	.4byte	0x1ac7
+	.4byte	0x17c9
 	.4byte	.LLST52
 	.uleb128 0x35
-	.4byte	0x1ad2
+	.4byte	0x17d5
 	.4byte	.LLST53
-	.uleb128 0x36
-	.4byte	0x1e1a
+	.uleb128 0x2f
+	.4byte	0x1d23
 	.8byte	.LBB110
 	.8byte	.LBE110-.LBB110
 	.byte	0x1
-	.byte	0xde
-	.4byte	0x12ad
+	.2byte	0x10f
+	.4byte	0x11a7
 	.uleb128 0x30
-	.4byte	0x1e35
+	.4byte	0x1d3e
 	.4byte	.LLST54
 	.uleb128 0x30
-	.4byte	0x1e2a
+	.4byte	0x1d33
 	.4byte	.LLST55
-	.uleb128 0x37
+	.uleb128 0x36
 	.8byte	.LVL91
-	.4byte	0x1e4d
-	.uleb128 0x38
+	.4byte	0x1d56
+	.uleb128 0x37
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x8
@@ -3291,7 +3165,7 @@ stype.6123:
 	.byte	0xa
 	.2byte	0x7c00
 	.byte	0x1a
-	.uleb128 0x38
+	.uleb128 0x37
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x3
@@ -3299,32 +3173,32 @@ stype.6123:
 	.2byte	0x8000
 	.byte	0
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x38
 	.8byte	.LBB112
 	.8byte	.LBE112-.LBB112
 	.uleb128 0x35
-	.4byte	0x1ade
+	.4byte	0x17e2
 	.4byte	.LLST56
 	.uleb128 0x35
-	.4byte	0x1ae9
+	.4byte	0x17ee
 	.4byte	.LLST57
 	.byte	0
 	.byte	0
 	.byte	0
 	.uleb128 0x2f
-	.4byte	0x1e02
+	.4byte	0x1d0b
 	.8byte	.LBB114
 	.8byte	.LBE114-.LBB114
 	.byte	0x1
-	.2byte	0x123
-	.4byte	0x130d
+	.2byte	0x154
+	.4byte	0x1207
 	.uleb128 0x30
-	.4byte	0x1e0e
+	.4byte	0x1d17
 	.4byte	.LLST58
-	.uleb128 0x37
+	.uleb128 0x36
 	.8byte	.LVL95
-	.4byte	0x1e41
-	.uleb128 0x38
+	.4byte	0x1d4a
+	.uleb128 0x37
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
@@ -3333,30 +3207,30 @@ stype.6123:
 	.byte	0
 	.byte	0
 	.uleb128 0x2f
-	.4byte	0x1e02
+	.4byte	0x1d0b
 	.8byte	.LBB117
 	.8byte	.LBE117-.LBB117
 	.byte	0x1
-	.2byte	0x127
-	.4byte	0x1333
+	.2byte	0x158
+	.4byte	0x122d
 	.uleb128 0x30
-	.4byte	0x1e0e
+	.4byte	0x1d17
 	.4byte	.LLST59
 	.byte	0
-	.uleb128 0x3a
+	.uleb128 0x39
 	.8byte	.LVL83
-	.4byte	0x1bc2
-	.4byte	0x134a
-	.uleb128 0x38
+	.4byte	0x18c8
+	.4byte	0x1244
+	.uleb128 0x37
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x1
 	.byte	0x30
 	.byte	0
-	.uleb128 0x37
+	.uleb128 0x36
 	.8byte	.LVL87
-	.4byte	0x1af6
-	.uleb128 0x38
+	.4byte	0x17fc
+	.uleb128 0x37
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x4
@@ -3368,102 +3242,102 @@ stype.6123:
 	.byte	0
 	.byte	0
 	.uleb128 0x32
-	.4byte	0x1852
+	.4byte	0x1542
 	.8byte	.LBB121
 	.4byte	.Ldebug_ranges0+0x1e0
 	.byte	0x1
-	.2byte	0x217
-	.4byte	0x14dc
+	.2byte	0x219
+	.4byte	0x13d6
 	.uleb128 0x30
-	.4byte	0x186f
+	.4byte	0x155f
 	.4byte	.LLST60
 	.uleb128 0x30
-	.4byte	0x1863
+	.4byte	0x1553
 	.4byte	.LLST61
 	.uleb128 0x33
 	.4byte	.Ldebug_ranges0+0x1e0
 	.uleb128 0x34
-	.4byte	0x187b
+	.4byte	0x156b
 	.uleb128 0x35
-	.4byte	0x1887
+	.4byte	0x1577
 	.4byte	.LLST62
 	.uleb128 0x35
-	.4byte	0x1893
+	.4byte	0x1583
 	.4byte	.LLST63
 	.uleb128 0x35
-	.4byte	0x189f
+	.4byte	0x158f
 	.4byte	.LLST64
 	.uleb128 0x2f
-	.4byte	0x1e02
+	.4byte	0x1d0b
 	.8byte	.LBB123
 	.8byte	.LBE123-.LBB123
 	.byte	0x1
-	.2byte	0x179
-	.4byte	0x13e4
+	.2byte	0x1aa
+	.4byte	0x12de
 	.uleb128 0x30
-	.4byte	0x1e0e
+	.4byte	0x1d17
 	.4byte	.LLST65
 	.uleb128 0x31
 	.8byte	.LVL113
-	.4byte	0x1e41
+	.4byte	0x1d4a
 	.byte	0
 	.uleb128 0x2f
-	.4byte	0x1ba6
+	.4byte	0x18ac
 	.8byte	.LBB125
 	.8byte	.LBE125-.LBB125
 	.byte	0x1
-	.2byte	0x16b
-	.4byte	0x140a
+	.2byte	0x19c
+	.4byte	0x1304
 	.uleb128 0x30
-	.4byte	0x1bb6
+	.4byte	0x18bc
 	.4byte	.LLST66
 	.byte	0
 	.uleb128 0x2f
-	.4byte	0x1a04
+	.4byte	0x16f4
 	.8byte	.LBB127
 	.8byte	.LBE127-.LBB127
 	.byte	0x1
-	.2byte	0x177
-	.4byte	0x147d
+	.2byte	0x1a8
+	.4byte	0x1377
 	.uleb128 0x30
-	.4byte	0x1a1b
+	.4byte	0x170d
 	.4byte	.LLST67
 	.uleb128 0x30
-	.4byte	0x1a10
+	.4byte	0x1701
 	.4byte	.LLST68
-	.uleb128 0x39
+	.uleb128 0x38
 	.8byte	.LBB128
 	.8byte	.LBE128-.LBB128
 	.uleb128 0x34
-	.4byte	0x1a26
+	.4byte	0x1719
 	.uleb128 0x35
-	.4byte	0x1a31
+	.4byte	0x1725
 	.4byte	.LLST69
 	.uleb128 0x35
-	.4byte	0x1a3c
+	.4byte	0x1731
 	.4byte	.LLST70
 	.uleb128 0x35
-	.4byte	0x1a47
+	.4byte	0x173d
 	.4byte	.LLST71
 	.uleb128 0x35
-	.4byte	0x1a52
+	.4byte	0x1749
 	.4byte	.LLST72
 	.uleb128 0x35
-	.4byte	0x1a5d
+	.4byte	0x1755
 	.4byte	.LLST73
 	.byte	0
 	.byte	0
-	.uleb128 0x3a
+	.uleb128 0x39
 	.8byte	.LVL128
-	.4byte	0x1bc2
-	.4byte	0x149a
-	.uleb128 0x38
+	.4byte	0x18c8
+	.4byte	0x1394
+	.uleb128 0x37
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x84
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x37
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x1
@@ -3471,27 +3345,27 @@ stype.6123:
 	.byte	0
 	.uleb128 0x31
 	.8byte	.LVL132
-	.4byte	0x1af6
-	.uleb128 0x3a
+	.4byte	0x17fc
+	.uleb128 0x39
 	.8byte	.LVL133
-	.4byte	0x1bc2
-	.4byte	0x14c4
-	.uleb128 0x38
+	.4byte	0x18c8
+	.4byte	0x13be
+	.uleb128 0x37
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x84
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x37
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x1
 	.byte	0x31
 	.byte	0
-	.uleb128 0x37
+	.uleb128 0x36
 	.8byte	.LVL137
-	.4byte	0x1af6
-	.uleb128 0x38
+	.4byte	0x17fc
+	.uleb128 0x37
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x4
@@ -3503,44 +3377,44 @@ stype.6123:
 	.byte	0
 	.byte	0
 	.uleb128 0x2f
-	.4byte	0x18ac
+	.4byte	0x159c
 	.8byte	.LBB130
 	.8byte	.LBE130-.LBB130
 	.byte	0x1
-	.2byte	0x211
-	.4byte	0x1565
+	.2byte	0x213
+	.4byte	0x145f
 	.uleb128 0x30
-	.4byte	0x18c9
+	.4byte	0x15b9
 	.4byte	.LLST74
 	.uleb128 0x30
-	.4byte	0x18bd
+	.4byte	0x15ad
 	.4byte	.LLST75
-	.uleb128 0x39
+	.uleb128 0x38
 	.8byte	.LBB131
 	.8byte	.LBE131-.LBB131
 	.uleb128 0x35
-	.4byte	0x18d5
+	.4byte	0x15c5
 	.4byte	.LLST76
 	.uleb128 0x35
-	.4byte	0x18e1
+	.4byte	0x15d1
 	.4byte	.LLST77
 	.uleb128 0x35
-	.4byte	0x18ed
+	.4byte	0x15dd
 	.4byte	.LLST78
-	.uleb128 0x3a
+	.uleb128 0x39
 	.8byte	.LVL121
-	.4byte	0x1bc2
-	.4byte	0x154d
-	.uleb128 0x38
+	.4byte	0x18c8
+	.4byte	0x1447
+	.uleb128 0x37
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x1
 	.byte	0x31
 	.byte	0
-	.uleb128 0x37
+	.uleb128 0x36
 	.8byte	.LVL124
-	.4byte	0x1af6
-	.uleb128 0x38
+	.4byte	0x17fc
+	.uleb128 0x37
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x4
@@ -3552,35 +3426,35 @@ stype.6123:
 	.byte	0
 	.byte	0
 	.uleb128 0x2f
-	.4byte	0x1804
+	.4byte	0x14f4
 	.8byte	.LBB133
 	.8byte	.LBE133-.LBB133
 	.byte	0x1
-	.2byte	0x21d
-	.4byte	0x15e5
+	.2byte	0x21f
+	.4byte	0x14df
 	.uleb128 0x30
-	.4byte	0x1821
+	.4byte	0x1511
 	.4byte	.LLST79
 	.uleb128 0x30
-	.4byte	0x1815
+	.4byte	0x1505
 	.4byte	.LLST80
-	.uleb128 0x39
+	.uleb128 0x38
 	.8byte	.LBB134
 	.8byte	.LBE134-.LBB134
 	.uleb128 0x35
-	.4byte	0x182d
+	.4byte	0x151d
 	.4byte	.LLST81
 	.uleb128 0x35
-	.4byte	0x1839
+	.4byte	0x1529
 	.4byte	.LLST82
 	.uleb128 0x35
-	.4byte	0x1845
+	.4byte	0x1535
 	.4byte	.LLST83
-	.uleb128 0x3a
+	.uleb128 0x39
 	.8byte	.LVL151
-	.4byte	0x1bc2
-	.4byte	0x15d6
-	.uleb128 0x38
+	.4byte	0x18c8
+	.4byte	0x14d0
+	.uleb128 0x37
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x1
@@ -3588,13 +3462,13 @@ stype.6123:
 	.byte	0
 	.uleb128 0x31
 	.8byte	.LVL155
-	.4byte	0x1af6
+	.4byte	0x17fc
 	.byte	0
 	.byte	0
-	.uleb128 0x37
+	.uleb128 0x36
 	.8byte	.LVL115
-	.4byte	0x18fa
-	.uleb128 0x38
+	.4byte	0x15ea
+	.uleb128 0x37
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
@@ -3602,373 +3476,168 @@ stype.6123:
 	.sleb128 0
 	.byte	0
 	.byte	0
+	.uleb128 0x3a
+	.4byte	.LASF336
+	.byte	0x1
+	.2byte	0x1af
+	.4byte	0x59
+	.byte	0x1
+	.4byte	0x1542
 	.uleb128 0x3b
-	.4byte	.LASF403
+	.4byte	.LASF329
 	.byte	0x1
-	.2byte	0x1b9
-	.4byte	0xdb
-	.8byte	.LFB230
-	.8byte	.LFE230-.LFB230
-	.uleb128 0x1
-	.byte	0x9c
-	.uleb128 0x2b
-	.4byte	.LASF346
+	.2byte	0x1af
+	.4byte	0xe1d
+	.uleb128 0x3b
+	.4byte	.LASF334
 	.byte	0x1
-	.2byte	0x198
+	.2byte	0x1af
 	.4byte	0x59
-	.8byte	.LFB229
-	.8byte	.LFE229-.LFB229
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x1804
-	.uleb128 0x2c
-	.4byte	.LASF347
-	.byte	0x1
-	.2byte	0x198
-	.4byte	0x147
-	.4byte	.LLST22
 	.uleb128 0x3c
-	.string	"ret"
-	.byte	0x1
-	.2byte	0x19a
-	.4byte	0x59
-	.uleb128 0x2e
-	.string	"wf"
-	.byte	0x1
-	.2byte	0x19b
-	.4byte	0x10b0
-	.4byte	.LLST23
-	.uleb128 0x2f
-	.4byte	0x1d60
-	.8byte	.LBB51
-	.8byte	.LBE51-.LBB51
-	.byte	0x1
-	.2byte	0x1a0
-	.4byte	0x16d0
-	.uleb128 0x30
-	.4byte	0x1d70
-	.4byte	.LLST24
-	.uleb128 0x3a
-	.8byte	.LVL54
-	.4byte	0x1e58
-	.4byte	0x16b4
-	.uleb128 0x38
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 4
-	.uleb128 0x38
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC0
-	.uleb128 0x38
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x3c
-	.byte	0
-	.uleb128 0x37
-	.8byte	.LVL55
-	.4byte	0x1e63
-	.uleb128 0x38
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.byte	0
-	.byte	0
-	.uleb128 0x32
-	.4byte	0x1d2e
-	.8byte	.LBB53
-	.4byte	.Ldebug_ranges0+0xc0
-	.byte	0x1
-	.2byte	0x1a6
-	.4byte	0x17d5
-	.uleb128 0x30
-	.4byte	0x1d3e
-	.4byte	.LLST25
-	.uleb128 0x33
-	.4byte	.Ldebug_ranges0+0xc0
-	.uleb128 0x34
-	.4byte	0x1d49
-	.uleb128 0x35
-	.4byte	0x1d54
-	.4byte	.LLST26
-	.uleb128 0x3d
-	.4byte	0x1d7c
-	.8byte	.LBB55
-	.4byte	.Ldebug_ranges0+0xf0
-	.byte	0x1
-	.byte	0x6f
-	.4byte	0x17b2
-	.uleb128 0x30
-	.4byte	0x1d97
-	.4byte	.LLST27
-	.uleb128 0x30
-	.4byte	0x1d8c
-	.4byte	.LLST28
-	.uleb128 0x33
-	.4byte	.Ldebug_ranges0+0xf0
-	.uleb128 0x35
-	.4byte	0x1da2
-	.4byte	.LLST29
-	.uleb128 0x35
-	.4byte	0x1dab
-	.4byte	.LLST30
-	.uleb128 0x3d
-	.4byte	0x1db7
-	.8byte	.LBB57
-	.4byte	.Ldebug_ranges0+0x130
-	.byte	0x1
-	.byte	0x55
-	.4byte	0x1790
-	.uleb128 0x3e
-	.4byte	0x1dc3
-	.uleb128 0x3e
-	.4byte	0x1dce
-	.uleb128 0x33
-	.4byte	.Ldebug_ranges0+0x130
-	.uleb128 0x35
-	.4byte	0x1dd9
-	.4byte	.LLST31
-	.uleb128 0x35
-	.4byte	0x1de2
-	.4byte	.LLST32
-	.uleb128 0x35
-	.4byte	0x1deb
-	.4byte	.LLST33
-	.uleb128 0x35
-	.4byte	0x1df6
-	.4byte	.LLST34
-	.byte	0
-	.byte	0
-	.uleb128 0x37
-	.8byte	.LVL64
-	.4byte	0x1e6e
-	.uleb128 0x38
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x87
-	.sleb128 0
-	.uleb128 0x38
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x38
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x400
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x37
-	.8byte	.LVL74
-	.4byte	0x1e63
-	.uleb128 0x38
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC3
-	.uleb128 0x38
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x89
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x31
-	.8byte	.LVL56
-	.4byte	0x1e63
-	.uleb128 0x37
-	.8byte	.LVL76
-	.4byte	0x1e63
-	.uleb128 0x38
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC5
-	.uleb128 0x38
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 20
-	.byte	0
-	.byte	0
-	.uleb128 0x3f
-	.4byte	.LASF350
-	.byte	0x1
-	.2byte	0x17e
-	.4byte	0x59
-	.byte	0x1
-	.4byte	0x1852
-	.uleb128 0x40
-	.4byte	.LASF340
-	.byte	0x1
-	.2byte	0x17e
-	.4byte	0xf34
-	.uleb128 0x40
-	.4byte	.LASF348
-	.byte	0x1
-	.2byte	0x17e
-	.4byte	0x59
-	.uleb128 0x41
-	.4byte	.LASF349
+	.4byte	.LASF335
 	.byte	0x1
-	.2byte	0x180
+	.2byte	0x1b1
 	.4byte	0x4df
-	.uleb128 0x41
-	.4byte	.LASF307
+	.uleb128 0x3c
+	.4byte	.LASF296
 	.byte	0x1
-	.2byte	0x181
+	.2byte	0x1b2
 	.4byte	0x84
-	.uleb128 0x41
-	.4byte	.LASF318
+	.uleb128 0x3c
+	.4byte	.LASF307
 	.byte	0x1
-	.2byte	0x182
+	.2byte	0x1b3
 	.4byte	0x84
 	.byte	0
-	.uleb128 0x3f
-	.4byte	.LASF351
+	.uleb128 0x3a
+	.4byte	.LASF337
 	.byte	0x1
-	.2byte	0x155
+	.2byte	0x186
 	.4byte	0x59
 	.byte	0x1
-	.4byte	0x18ac
-	.uleb128 0x40
-	.4byte	.LASF340
+	.4byte	0x159c
+	.uleb128 0x3b
+	.4byte	.LASF329
 	.byte	0x1
-	.2byte	0x155
-	.4byte	0xf34
-	.uleb128 0x40
-	.4byte	.LASF348
+	.2byte	0x186
+	.4byte	0xe1d
+	.uleb128 0x3b
+	.4byte	.LASF334
 	.byte	0x1
-	.2byte	0x155
+	.2byte	0x186
 	.4byte	0x59
-	.uleb128 0x41
-	.4byte	.LASF352
+	.uleb128 0x3c
+	.4byte	.LASF338
 	.byte	0x1
-	.2byte	0x157
-	.4byte	0xf09
-	.uleb128 0x41
-	.4byte	.LASF349
+	.2byte	0x188
+	.4byte	0xdf2
+	.uleb128 0x3c
+	.4byte	.LASF335
 	.byte	0x1
-	.2byte	0x158
+	.2byte	0x189
 	.4byte	0x4df
-	.uleb128 0x41
-	.4byte	.LASF307
+	.uleb128 0x3c
+	.4byte	.LASF296
 	.byte	0x1
-	.2byte	0x159
+	.2byte	0x18a
 	.4byte	0x84
-	.uleb128 0x41
-	.4byte	.LASF318
+	.uleb128 0x3c
+	.4byte	.LASF307
 	.byte	0x1
-	.2byte	0x15a
+	.2byte	0x18b
 	.4byte	0x84
 	.byte	0
-	.uleb128 0x3f
-	.4byte	.LASF353
+	.uleb128 0x3a
+	.4byte	.LASF339
 	.byte	0x1
-	.2byte	0x140
+	.2byte	0x171
 	.4byte	0x59
 	.byte	0x1
-	.4byte	0x18fa
-	.uleb128 0x40
-	.4byte	.LASF340
+	.4byte	0x15ea
+	.uleb128 0x3b
+	.4byte	.LASF329
 	.byte	0x1
-	.2byte	0x140
-	.4byte	0xf34
-	.uleb128 0x40
-	.4byte	.LASF348
+	.2byte	0x171
+	.4byte	0xe1d
+	.uleb128 0x3b
+	.4byte	.LASF334
 	.byte	0x1
-	.2byte	0x140
+	.2byte	0x171
 	.4byte	0x59
-	.uleb128 0x41
-	.4byte	.LASF349
+	.uleb128 0x3c
+	.4byte	.LASF335
 	.byte	0x1
-	.2byte	0x142
+	.2byte	0x173
 	.4byte	0x4df
-	.uleb128 0x41
-	.4byte	.LASF307
+	.uleb128 0x3c
+	.4byte	.LASF296
 	.byte	0x1
-	.2byte	0x143
+	.2byte	0x174
 	.4byte	0x84
-	.uleb128 0x41
-	.4byte	.LASF318
+	.uleb128 0x3c
+	.4byte	.LASF307
 	.byte	0x1
-	.2byte	0x144
+	.2byte	0x175
 	.4byte	0x84
 	.byte	0
-	.uleb128 0x42
-	.4byte	.LASF361
+	.uleb128 0x3d
+	.4byte	.LASF347
 	.byte	0x1
-	.2byte	0x12b
+	.2byte	0x15c
 	.4byte	0x59
-	.8byte	.LFB225
-	.8byte	.LFE225-.LFB225
+	.8byte	.LFB223
+	.8byte	.LFE223-.LFB223
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x19aa
+	.4byte	0x169a
 	.uleb128 0x2c
-	.4byte	.LASF340
+	.4byte	.LASF329
 	.byte	0x1
-	.2byte	0x12b
-	.4byte	0xf34
+	.2byte	0x15c
+	.4byte	0xe1d
 	.4byte	.LLST16
 	.uleb128 0x2c
-	.4byte	.LASF348
+	.4byte	.LASF334
 	.byte	0x1
-	.2byte	0x12b
+	.2byte	0x15c
 	.4byte	0x59
 	.4byte	.LLST17
 	.uleb128 0x2c
-	.4byte	.LASF341
+	.4byte	.LASF330
 	.byte	0x1
-	.2byte	0x12b
-	.4byte	0xf3a
+	.2byte	0x15c
+	.4byte	0xe23
 	.4byte	.LLST18
-	.uleb128 0x43
-	.4byte	.LASF349
+	.uleb128 0x3e
+	.4byte	.LASF335
 	.byte	0x1
-	.2byte	0x12d
+	.2byte	0x15e
 	.4byte	0x4df
 	.4byte	.LLST19
-	.uleb128 0x43
-	.4byte	.LASF307
+	.uleb128 0x3e
+	.4byte	.LASF296
 	.byte	0x1
-	.2byte	0x12e
+	.2byte	0x15f
 	.4byte	0x84
 	.4byte	.LLST20
-	.uleb128 0x43
-	.4byte	.LASF318
+	.uleb128 0x3e
+	.4byte	.LASF307
 	.byte	0x1
-	.2byte	0x12f
+	.2byte	0x160
 	.4byte	0x84
 	.4byte	.LLST21
-	.uleb128 0x3a
+	.uleb128 0x39
 	.8byte	.LVL45
-	.4byte	0x1bc2
-	.4byte	0x199c
-	.uleb128 0x38
+	.4byte	0x18c8
+	.4byte	0x168c
+	.uleb128 0x37
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x3
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x38
+	.uleb128 0x37
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x3
@@ -3978,213 +3647,213 @@ stype.6123:
 	.byte	0
 	.uleb128 0x31
 	.8byte	.LVL49
-	.4byte	0x1af6
+	.4byte	0x17fc
 	.byte	0
-	.uleb128 0x3f
-	.4byte	.LASF354
+	.uleb128 0x3a
+	.4byte	.LASF340
 	.byte	0x1
-	.2byte	0x10c
+	.2byte	0x13d
 	.4byte	0x59
 	.byte	0x1
-	.4byte	0x1a04
-	.uleb128 0x40
-	.4byte	.LASF340
+	.4byte	0x16f4
+	.uleb128 0x3b
+	.4byte	.LASF329
 	.byte	0x1
-	.2byte	0x10c
-	.4byte	0xf34
-	.uleb128 0x40
-	.4byte	.LASF348
+	.2byte	0x13d
+	.4byte	0xe1d
+	.uleb128 0x3b
+	.4byte	.LASF334
 	.byte	0x1
-	.2byte	0x10c
+	.2byte	0x13d
 	.4byte	0x59
-	.uleb128 0x41
-	.4byte	.LASF352
+	.uleb128 0x3c
+	.4byte	.LASF338
 	.byte	0x1
-	.2byte	0x10e
-	.4byte	0xf09
-	.uleb128 0x41
-	.4byte	.LASF349
+	.2byte	0x13f
+	.4byte	0xdf2
+	.uleb128 0x3c
+	.4byte	.LASF335
 	.byte	0x1
-	.2byte	0x10f
+	.2byte	0x140
 	.4byte	0x4df
-	.uleb128 0x41
-	.4byte	.LASF307
+	.uleb128 0x3c
+	.4byte	.LASF296
 	.byte	0x1
-	.2byte	0x110
+	.2byte	0x141
 	.4byte	0x84
-	.uleb128 0x41
-	.4byte	.LASF318
+	.uleb128 0x3c
+	.4byte	.LASF307
 	.byte	0x1
-	.2byte	0x111
+	.2byte	0x142
 	.4byte	0x84
 	.byte	0
-	.uleb128 0x44
-	.4byte	.LASF384
+	.uleb128 0x3f
+	.4byte	.LASF373
 	.byte	0x1
-	.byte	0xf3
+	.2byte	0x124
 	.byte	0x1
-	.4byte	0x1a67
-	.uleb128 0x45
-	.4byte	.LASF352
+	.4byte	0x1760
+	.uleb128 0x3b
+	.4byte	.LASF338
 	.byte	0x1
-	.byte	0xf3
-	.4byte	0xf34
-	.uleb128 0x45
-	.4byte	.LASF340
+	.2byte	0x124
+	.4byte	0xe1d
+	.uleb128 0x3b
+	.4byte	.LASF329
 	.byte	0x1
-	.byte	0xf4
-	.4byte	0xf34
-	.uleb128 0x46
-	.4byte	.LASF355
+	.2byte	0x125
+	.4byte	0xe1d
+	.uleb128 0x3c
+	.4byte	.LASF341
 	.byte	0x1
-	.byte	0xf6
+	.2byte	0x127
 	.4byte	0x59
-	.uleb128 0x46
-	.4byte	.LASF356
+	.uleb128 0x3c
+	.4byte	.LASF342
 	.byte	0x1
-	.byte	0xf7
-	.4byte	0xf2e
-	.uleb128 0x46
-	.4byte	.LASF357
+	.2byte	0x128
+	.4byte	0xe17
+	.uleb128 0x3c
+	.4byte	.LASF343
 	.byte	0x1
-	.byte	0xf7
-	.4byte	0xf2e
-	.uleb128 0x46
-	.4byte	.LASF348
+	.2byte	0x128
+	.4byte	0xe17
+	.uleb128 0x3c
+	.4byte	.LASF334
 	.byte	0x1
-	.byte	0xf8
+	.2byte	0x129
 	.4byte	0x59
-	.uleb128 0x46
-	.4byte	.LASF358
+	.uleb128 0x3c
+	.4byte	.LASF344
 	.byte	0x1
-	.byte	0xf8
+	.2byte	0x129
 	.4byte	0x59
-	.uleb128 0x47
+	.uleb128 0x40
 	.string	"i"
 	.byte	0x1
-	.byte	0xf9
+	.2byte	0x12a
 	.4byte	0x59
 	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF359
+	.uleb128 0x3a
+	.4byte	.LASF345
 	.byte	0x1
-	.byte	0xd3
-	.4byte	0xf2e
+	.2byte	0x104
+	.4byte	0xe17
 	.byte	0x1
-	.4byte	0x1af6
-	.uleb128 0x45
-	.4byte	.LASF352
+	.4byte	0x17fc
+	.uleb128 0x3b
+	.4byte	.LASF338
 	.byte	0x1
-	.byte	0xd3
-	.4byte	0xf34
-	.uleb128 0x46
-	.4byte	.LASF356
+	.2byte	0x104
+	.4byte	0xe1d
+	.uleb128 0x3c
+	.4byte	.LASF342
 	.byte	0x1
-	.byte	0xd5
-	.4byte	0xf2e
-	.uleb128 0x46
-	.4byte	.LASF357
+	.2byte	0x106
+	.4byte	0xe17
+	.uleb128 0x3c
+	.4byte	.LASF343
 	.byte	0x1
-	.byte	0xd5
-	.4byte	0xf2e
-	.uleb128 0x47
+	.2byte	0x106
+	.4byte	0xe17
+	.uleb128 0x40
 	.string	"i"
 	.byte	0x1
-	.byte	0xd6
+	.2byte	0x107
 	.4byte	0x59
-	.uleb128 0x47
+	.uleb128 0x40
 	.string	"j"
 	.byte	0x1
-	.byte	0xd6
+	.2byte	0x107
 	.4byte	0x59
-	.uleb128 0x47
+	.uleb128 0x40
 	.string	"k"
 	.byte	0x1
-	.byte	0xd6
+	.2byte	0x107
 	.4byte	0x59
-	.uleb128 0x47
+	.uleb128 0x40
 	.string	"h"
 	.byte	0x1
-	.byte	0xd6
+	.2byte	0x107
 	.4byte	0x59
-	.uleb128 0x46
-	.4byte	.LASF360
+	.uleb128 0x3c
+	.4byte	.LASF346
 	.byte	0x1
-	.byte	0xd7
+	.2byte	0x108
 	.4byte	0x59
-	.uleb128 0x47
+	.uleb128 0x40
 	.string	"num"
 	.byte	0x1
-	.byte	0xd8
+	.2byte	0x109
 	.4byte	0x59
-	.uleb128 0x47
+	.uleb128 0x40
 	.string	"len"
 	.byte	0x1
-	.byte	0xd9
+	.2byte	0x10a
 	.4byte	0x59
-	.uleb128 0x49
-	.uleb128 0x46
-	.4byte	.LASF348
+	.uleb128 0x41
+	.uleb128 0x3c
+	.4byte	.LASF334
 	.byte	0x1
-	.byte	0xe5
+	.2byte	0x116
 	.4byte	0x59
-	.uleb128 0x46
-	.4byte	.LASF358
+	.uleb128 0x3c
+	.4byte	.LASF344
 	.byte	0x1
-	.byte	0xe6
+	.2byte	0x117
 	.4byte	0x59
 	.byte	0
 	.byte	0
-	.uleb128 0x4a
-	.4byte	.LASF362
+	.uleb128 0x42
+	.4byte	.LASF348
 	.byte	0x1
-	.byte	0xc5
-	.4byte	0xf2e
-	.8byte	.LFB221
-	.8byte	.LFE221-.LFB221
+	.byte	0xf6
+	.4byte	0xe17
+	.8byte	.LFB219
+	.8byte	.LFE219-.LFB219
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1ba6
-	.uleb128 0x4b
-	.4byte	.LASF349
+	.4byte	0x18ac
+	.uleb128 0x43
+	.4byte	.LASF335
 	.byte	0x1
-	.byte	0xc5
+	.byte	0xf6
 	.4byte	0x4df
 	.4byte	.LLST12
-	.uleb128 0x4b
-	.4byte	.LASF318
+	.uleb128 0x43
+	.4byte	.LASF307
 	.byte	0x1
-	.byte	0xc6
+	.byte	0xf7
 	.4byte	0x84
 	.4byte	.LLST13
-	.uleb128 0x47
+	.uleb128 0x44
 	.string	"out"
 	.byte	0x1
-	.byte	0xc8
+	.byte	0xf9
 	.4byte	0x4e5
-	.uleb128 0x3d
-	.4byte	0x1e1a
+	.uleb128 0x45
+	.4byte	0x1d23
 	.8byte	.LBB39
 	.4byte	.Ldebug_ranges0+0x90
 	.byte	0x1
-	.byte	0xca
-	.4byte	0x1b85
+	.byte	0xfb
+	.4byte	0x188b
 	.uleb128 0x30
-	.4byte	0x1e35
+	.4byte	0x1d3e
 	.4byte	.LLST14
 	.uleb128 0x30
-	.4byte	0x1e2a
+	.4byte	0x1d33
 	.4byte	.LLST15
-	.uleb128 0x37
+	.uleb128 0x36
 	.8byte	.LVL37
-	.4byte	0x1e4d
-	.uleb128 0x38
+	.4byte	0x1d56
+	.uleb128 0x37
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x84
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x37
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x3
@@ -4192,22 +3861,22 @@ stype.6123:
 	.2byte	0x8000
 	.byte	0
 	.byte	0
-	.uleb128 0x37
+	.uleb128 0x36
 	.8byte	.LVL39
-	.4byte	0x1e7a
-	.uleb128 0x38
+	.4byte	0x1d61
+	.uleb128 0x37
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x83
 	.sleb128 0
-	.uleb128 0x38
+	.uleb128 0x37
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x85
 	.sleb128 4
-	.uleb128 0x38
+	.uleb128 0x37
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
@@ -4215,331 +3884,536 @@ stype.6123:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF363
+	.uleb128 0x46
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 	.4byte	0x34
 	.byte	0x3
-	.4byte	0x1bc2
-	.uleb128 0x45
-	.4byte	.LASF349
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+	.uleb128 0x47
+	.4byte	.LASF335
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 	.byte	0
-	.uleb128 0x4a
-	.4byte	.LASF364
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 	.4byte	0x4df
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-	.8byte	.LFE219-.LFB219
+	.8byte	.LFB217
+	.8byte	.LFE217-.LFB217
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1cbf
-	.uleb128 0x4b
-	.4byte	.LASF348
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 	.4byte	.LLST0
-	.uleb128 0x4b
-	.4byte	.LASF365
+	.uleb128 0x43
+	.4byte	.LASF351
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 	.uleb128 0x2a
-	.4byte	.LASF366
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-	.4byte	0x10b0
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 	.4byte	.LLST2
-	.uleb128 0x4c
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+	.4byte	.LASF354
 	.byte	0x1
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 	.4byte	0xff
 	.4byte	.LLST3
-	.uleb128 0x4c
-	.4byte	.LASF369
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 	.4byte	0x84
 	.4byte	.LLST4
-	.uleb128 0x4d
+	.uleb128 0x49
 	.string	"pt"
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 	.4byte	.LLST5
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-	.4byte	.LASF349
+	.uleb128 0x4a
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 	.byte	0x1
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-	.uleb128 0x4e
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 	.8byte	.LBB31
 	.4byte	.Ldebug_ranges0+0
 	.byte	0x1
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 	.uleb128 0x30
-	.4byte	0x1cda
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 	.4byte	.LLST6
 	.uleb128 0x30
-	.4byte	0x1ccf
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 	.uleb128 0x33
 	.4byte	.Ldebug_ranges0+0
 	.uleb128 0x35
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 	.uleb128 0x35
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-	.uleb128 0x4f
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 	.uleb128 0x34
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 	.uleb128 0x34
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 	.byte	0
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x48
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-	.uleb128 0x47
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 	.string	"i"
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 	.byte	0x1
 	.byte	0x80
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-	.uleb128 0x46
-	.4byte	.LASF375
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 	.byte	0x1
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+	.uleb128 0x44
+	.string	"ret"
+	.byte	0x1
+	.byte	0x82
 	.4byte	0x59
+	.uleb128 0x49
+	.string	"wf"
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+	.8byte	.LBE51-.LBB51
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 	.string	"buf"
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 	.string	"i"
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 	.string	"i"
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 	.string	"j"
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+	.4byte	.LASF372
 	.byte	0x1
 	.byte	0x3f
 	.4byte	0x84
 	.byte	0
-	.uleb128 0x44
-	.4byte	.LASF389
+	.uleb128 0x53
+	.4byte	.LASF378
 	.byte	0x2
 	.byte	0x4f
 	.byte	0x3
-	.4byte	0x1e1a
-	.uleb128 0x45
-	.4byte	.LASF390
+	.4byte	0x1d23
+	.uleb128 0x47
+	.4byte	.LASF379
 	.byte	0x2
 	.byte	0x4f
 	.4byte	0x18a
 	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF391
+	.uleb128 0x46
+	.4byte	.LASF380
 	.byte	0x2
 	.byte	0x38
 	.4byte	0x147
 	.byte	0x3
-	.4byte	0x1e41
-	.uleb128 0x45
+	.4byte	0x1d4a
+	.uleb128 0x47
 	.4byte	.LASF33
 	.byte	0x2
 	.byte	0x38
 	.4byte	0x105
-	.uleb128 0x45
-	.4byte	.LASF392
+	.uleb128 0x47
+	.4byte	.LASF381
 	.byte	0x2
 	.byte	0x38
 	.4byte	0x13c
 	.byte	0
-	.uleb128 0x52
-	.4byte	.LASF393
-	.4byte	.LASF393
+	.uleb128 0x54
+	.4byte	.LASF382
+	.4byte	.LASF382
 	.byte	0x16
 	.2byte	0x399
-	.uleb128 0x53
-	.4byte	.LASF394
-	.4byte	.LASF394
+	.uleb128 0x55
+	.4byte	.LASF383
+	.4byte	.LASF383
 	.byte	0x2
 	.byte	0x36
-	.uleb128 0x53
-	.4byte	.LASF395
-	.4byte	.LASF395
+	.uleb128 0x54
+	.4byte	.LASF384
+	.4byte	.LASF384
+	.byte	0x16
+	.2byte	0x16d
+	.uleb128 0x55
+	.4byte	.LASF385
+	.4byte	.LASF385
 	.byte	0x8
 	.byte	0x2a
-	.uleb128 0x53
-	.4byte	.LASF396
-	.4byte	.LASF396
+	.uleb128 0x55
+	.4byte	.LASF386
+	.4byte	.LASF386
 	.byte	0x18
 	.byte	0x13
-	.uleb128 0x52
-	.4byte	.LASF397
-	.4byte	.LASF397
+	.uleb128 0x54
+	.4byte	.LASF387
+	.4byte	.LASF387
 	.byte	0x16
 	.2byte	0x16c
-	.uleb128 0x52
-	.4byte	.LASF398
-	.4byte	.LASF398
-	.byte	0x16
-	.2byte	0x16d
 	.byte	0
 	.section	.debug_abbrev,"",@progbits
 .Ldebug_abbrev0:
@@ -5221,23 +5095,6 @@ stype.6123:
 	.byte	0
 	.byte	0
 	.uleb128 0x36
-	.uleb128 0x1d
-	.byte	0x1
-	.uleb128 0x31
-	.uleb128 0x13
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x12
-	.uleb128 0x7
-	.uleb128 0x58
-	.uleb128 0xb
-	.uleb128 0x59
-	.uleb128 0xb
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x37
 	.uleb128 0x4109
 	.byte	0x1
 	.uleb128 0x11
@@ -5246,7 +5103,7 @@ stype.6123:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x38
+	.uleb128 0x37
 	.uleb128 0x410a
 	.byte	0
 	.uleb128 0x2
@@ -5255,7 +5112,7 @@ stype.6123:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x38
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x11
@@ -5264,7 +5121,7 @@ stype.6123:
 	.uleb128 0x7
 	.byte	0
 	.byte	0
-	.uleb128 0x3a
+	.uleb128 0x39
 	.uleb128 0x4109
 	.byte	0x1
 	.uleb128 0x11
@@ -5275,69 +5132,7 @@ stype.6123:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3b
-	.uleb128 0x2e
-	.byte	0
-	.uleb128 0x3f
-	.uleb128 0x19
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0x5
-	.uleb128 0x27
-	.uleb128 0x19
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x12
-	.uleb128 0x7
-	.uleb128 0x40
-	.uleb128 0x18
-	.uleb128 0x2117
-	.uleb128 0x19
-	.byte	0
-	.byte	0
-	.uleb128 0x3c
-	.uleb128 0x34
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
 	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0x5
-	.uleb128 0x49
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x3d
-	.uleb128 0x1d
-	.byte	0x1
-	.uleb128 0x31
-	.uleb128 0x13
-	.uleb128 0x52
-	.uleb128 0x1
-	.uleb128 0x55
-	.uleb128 0x17
-	.uleb128 0x58
-	.uleb128 0xb
-	.uleb128 0x59
-	.uleb128 0xb
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x3e
-	.uleb128 0x5
-	.byte	0
-	.uleb128 0x31
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x3f
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -5356,7 +5151,7 @@ stype.6123:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x40
+	.uleb128 0x3b
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -5369,7 +5164,7 @@ stype.6123:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x41
+	.uleb128 0x3c
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -5382,7 +5177,7 @@ stype.6123:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x42
+	.uleb128 0x3d
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -5407,7 +5202,7 @@ stype.6123:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x43
+	.uleb128 0x3e
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -5422,7 +5217,7 @@ stype.6123:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x44
+	.uleb128 0x3f
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -5430,7 +5225,7 @@ stype.6123:
 	.uleb128 0x3a
 	.uleb128 0xb
 	.uleb128 0x3b
-	.uleb128 0xb
+	.uleb128 0x5
 	.uleb128 0x27
 	.uleb128 0x19
 	.uleb128 0x20
@@ -5439,21 +5234,51 @@ stype.6123:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x45
+	.uleb128 0x40
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
 	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x41
+	.uleb128 0xb
+	.byte	0x1
+	.byte	0
 	.byte	0
+	.uleb128 0x42
+	.uleb128 0x2e
+	.byte	0x1
 	.uleb128 0x3
 	.uleb128 0xe
 	.uleb128 0x3a
 	.uleb128 0xb
 	.uleb128 0x3b
 	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
 	.uleb128 0x49
 	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.uleb128 0x34
+	.uleb128 0x43
+	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
 	.uleb128 0xe
@@ -5463,9 +5288,11 @@ stype.6123:
 	.uleb128 0xb
 	.uleb128 0x49
 	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x47
+	.uleb128 0x44
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -5478,7 +5305,24 @@ stype.6123:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x48
+	.uleb128 0x45
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x52
+	.uleb128 0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x46
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -5497,38 +5341,21 @@ stype.6123:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x49
-	.uleb128 0xb
-	.byte	0x1
-	.byte	0
+	.uleb128 0x47
+	.uleb128 0x5
 	.byte	0
-	.uleb128 0x4a
-	.uleb128 0x2e
-	.byte	0x1
 	.uleb128 0x3
 	.uleb128 0xe
 	.uleb128 0x3a
 	.uleb128 0xb
 	.uleb128 0x3b
 	.uleb128 0xb
-	.uleb128 0x27
-	.uleb128 0x19
 	.uleb128 0x49
 	.uleb128 0x13
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x12
-	.uleb128 0x7
-	.uleb128 0x40
-	.uleb128 0x18
-	.uleb128 0x2117
-	.uleb128 0x19
-	.uleb128 0x1
-	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4b
-	.uleb128 0x5
+	.uleb128 0x48
+	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
 	.uleb128 0xe
@@ -5542,11 +5369,11 @@ stype.6123:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x4c
+	.uleb128 0x49
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
-	.uleb128 0xe
+	.uleb128 0x8
 	.uleb128 0x3a
 	.uleb128 0xb
 	.uleb128 0x3b
@@ -5557,22 +5384,20 @@ stype.6123:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x4d
+	.uleb128 0x4a
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
-	.uleb128 0x8
+	.uleb128 0xe
 	.uleb128 0x3a
 	.uleb128 0xb
 	.uleb128 0x3b
 	.uleb128 0xb
 	.uleb128 0x49
 	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x4e
+	.uleb128 0x4b
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -5587,7 +5412,7 @@ stype.6123:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x4f
+	.uleb128 0x4c
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x55
@@ -5596,31 +5421,124 @@ stype.6123:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x50
+	.uleb128 0x4d
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x1
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x51
-	.uleb128 0x5
+	.uleb128 0x4e
+	.uleb128 0x2e
 	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
 	.uleb128 0x3
-	.uleb128 0x8
+	.uleb128 0xe
 	.uleb128 0x3a
 	.uleb128 0xb
 	.uleb128 0x3b
 	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
 	.uleb128 0x49
 	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x52
-	.uleb128 0x2e
-	.byte	0
-	.uleb128 0x3f
-	.uleb128 0x19
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.byte	0
+	.byte	0
+	.uleb128 0x4f
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x50
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x51
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x52
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x53
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x20
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x54
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
 	.uleb128 0x3c
 	.uleb128 0x19
 	.uleb128 0x6e
@@ -5633,7 +5551,7 @@ stype.6123:
 	.uleb128 0x5
 	.byte	0
 	.byte	0
-	.uleb128 0x53
+	.uleb128 0x55
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -5700,7 +5618,7 @@ stype.6123:
 	.2byte	0x1
 	.byte	0x50
 	.8byte	.LVL159
-	.8byte	.LFE231
+	.8byte	.LFE227
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -5776,7 +5694,7 @@ stype.6123:
 	.sleb128 1
 	.byte	0x9f
 	.8byte	.LVL156
-	.8byte	.LFE231
+	.8byte	.LFE227
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
@@ -5794,7 +5712,7 @@ stype.6123:
 	.byte	0x52
 	.byte	0x9f
 	.8byte	.LVL156
-	.8byte	.LFE231
+	.8byte	.LFE227
 	.2byte	0x1
 	.byte	0x52
 	.8byte	0
@@ -5818,7 +5736,7 @@ stype.6123:
 	.8byte	.LVL83-1
 	.2byte	0x9
 	.byte	0x3
-	.8byte	sftemp.6124
+	.8byte	sftemp.6130
 	.8byte	0
 	.8byte	0
 .LLST41:
@@ -5886,13 +5804,13 @@ stype.6123:
 	.8byte	.LVL93
 	.2byte	0x6
 	.byte	0xf2
-	.4byte	.Ldebug_info0+4555
+	.4byte	.Ldebug_info0+4292
 	.sleb128 0
 	.8byte	.LVL96
 	.8byte	.LVL111
 	.2byte	0x6
 	.byte	0xf2
-	.4byte	.Ldebug_info0+4555
+	.4byte	.Ldebug_info0+4292
 	.sleb128 0
 	.8byte	0
 	.8byte	0
@@ -6147,649 +6065,380 @@ stype.6123:
 	.byte	0x73
 	.sleb128 0
 	.byte	0x31
-	.byte	0x24
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x26
-	.byte	0x33
-	.byte	0x1a
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST57:
-	.8byte	.LVL99
-	.8byte	.LVL100
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL100
-	.8byte	.LVL110
-	.2byte	0x1
-	.byte	0x55
-	.8byte	0
-	.8byte	0
-.LLST58:
-	.8byte	.LVL94
-	.8byte	.LVL95
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST59:
-	.8byte	.LVL111
-	.8byte	.LVL112
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST60:
-	.8byte	.LVL127
-	.8byte	.LVL134
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST61:
-	.8byte	.LVL127
-	.8byte	.LVL150
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST62:
-	.8byte	.LVL128
-	.8byte	.LVL132-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL133
-	.8byte	.LVL137-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST63:
-	.8byte	.LVL129
-	.8byte	.LVL131
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL131
-	.8byte	.LVL132-1
-	.2byte	0x2
-	.byte	0x83
-	.sleb128 0
-	.8byte	.LVL134
-	.8byte	.LVL139
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST64:
-	.8byte	.LVL130
-	.8byte	.LVL131
-	.2byte	0x5
-	.byte	0x71
-	.sleb128 0
-	.byte	0x36
-	.byte	0x24
-	.byte	0x9f
-	.8byte	.LVL131
-	.8byte	.LVL132-1
-	.2byte	0x1
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-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL67
-	.8byte	.LVL68
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL70
-	.8byte	.LVL72
+.LLST82:
+	.8byte	.LVL152
+	.8byte	.LVL154
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL72
-	.8byte	.LVL74-1
-	.2byte	0x7
-	.byte	0x87
-	.sleb128 0
-	.byte	0x73
-	.sleb128 0
-	.byte	0x22
-	.byte	0x34
-	.byte	0x1c
-	.8byte	.LVL75
-	.8byte	.LVL76-1
-	.2byte	0x7
-	.byte	0x87
+	.8byte	.LVL154
+	.8byte	.LVL155-1
+	.2byte	0x2
+	.byte	0x83
 	.sleb128 0
-	.byte	0x73
+	.8byte	0
+	.8byte	0
+.LLST83:
+	.8byte	.LVL153
+	.8byte	.LVL154
+	.2byte	0x5
+	.byte	0x71
 	.sleb128 0
-	.byte	0x22
-	.byte	0x34
-	.byte	0x1c
+	.byte	0x36
+	.byte	0x24
+	.byte	0x9f
+	.8byte	.LVL154
+	.8byte	.LVL155-1
+	.2byte	0x1
+	.byte	0x51
 	.8byte	0
 	.8byte	0
 .LLST16:
@@ -6802,7 +6451,7 @@ stype.6123:
 	.2byte	0x1
 	.byte	0x63
 	.8byte	.LVL50
-	.8byte	.LFE225
+	.8byte	.LFE223
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -6820,7 +6469,7 @@ stype.6123:
 	.2byte	0x1
 	.byte	0x50
 	.8byte	.LVL45-1
-	.8byte	.LFE225
+	.8byte	.LFE223
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -6834,7 +6483,7 @@ stype.6123:
 	.2byte	0x1
 	.byte	0x52
 	.8byte	.LVL45-1
-	.8byte	.LFE225
+	.8byte	.LFE223
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -6886,7 +6535,7 @@ stype.6123:
 	.2byte	0x1
 	.byte	0x65
 	.8byte	.LVL40
-	.8byte	.LFE221
+	.8byte	.LFE219
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -6904,7 +6553,7 @@ stype.6123:
 	.2byte	0x1
 	.byte	0x64
 	.8byte	.LVL41
-	.8byte	.LFE221
+	.8byte	.LFE219
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -6955,7 +6604,7 @@ stype.6123:
 	.2byte	0x1
 	.byte	0x50
 	.8byte	.LVL32
-	.8byte	.LFE219
+	.8byte	.LFE217
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -6976,7 +6625,7 @@ stype.6123:
 	.byte	0x51
 	.byte	0x9f
 	.8byte	.LVL31
-	.8byte	.LFE219
+	.8byte	.LFE217
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
@@ -7120,111 +6769,380 @@ stype.6123:
 	.8byte	.LVL30
 	.8byte	.LVL31
 	.2byte	0x1
-	.byte	0x50
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST7:
+	.8byte	.LVL4
+	.8byte	.LVL11
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL30
+	.8byte	.LVL31
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST8:
+	.8byte	.LVL4
+	.8byte	.LVL7
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL7
+	.8byte	.LVL8
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL9
+	.8byte	.LVL11
+	.2byte	0x1
+	.byte	0x55
+	.8byte	0
+	.8byte	0
+.LLST9:
+	.8byte	.LVL6
+	.8byte	.LVL7
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL7
+	.8byte	.LVL9
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL9
+	.8byte	.LVL10
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL30
+	.8byte	.LVL31
+	.2byte	0x1
+	.byte	0x54
+	.8byte	0
+	.8byte	0
+.LLST10:
+	.8byte	.LVL4
+	.8byte	.LVL5
+	.2byte	0x13
+	.byte	0x70
+	.sleb128 0
+	.byte	0x12
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x30
+	.byte	0x16
+	.byte	0x14
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x2b
+	.byte	0x28
+	.2byte	0x1
+	.byte	0x16
+	.byte	0x13
+	.byte	0x9f
+	.8byte	.LVL5
+	.8byte	.LVL6
+	.2byte	0x14
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x12
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x30
+	.byte	0x16
+	.byte	0x14
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x2b
+	.byte	0x28
+	.2byte	0x1
+	.byte	0x16
+	.byte	0x13
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST11:
+	.8byte	.LVL4
+	.8byte	.LVL6
+	.2byte	0x3
+	.byte	0x8
+	.byte	0x31
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST22:
+	.8byte	.LVL51
+	.8byte	.LVL53
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL53
+	.8byte	.LVL60
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL60
+	.8byte	.LVL61
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL61
+	.8byte	.LVL62
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL62
+	.8byte	.LFE214
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST23:
+	.8byte	.LVL51
+	.8byte	.LVL53
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL53
+	.8byte	.LVL60
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL60
+	.8byte	.LVL61
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL61
+	.8byte	.LVL62
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL62
+	.8byte	.LFE214
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST24:
+	.8byte	.LVL52
+	.8byte	.LVL53
+	.2byte	0x3
+	.byte	0x70
+	.sleb128 4
+	.byte	0x9f
+	.8byte	.LVL53
+	.8byte	.LVL54-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL54-1
+	.8byte	.LVL55
+	.2byte	0x3
+	.byte	0x83
+	.sleb128 4
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST25:
+	.8byte	.LVL57
+	.8byte	.LVL60
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL62
+	.8byte	.LVL74
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST26:
+	.8byte	.LVL57
+	.8byte	.LVL60
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL63
+	.8byte	.LVL74
+	.2byte	0x1
+	.byte	0x69
+	.8byte	0
+	.8byte	0
+.LLST27:
+	.8byte	.LVL57
+	.8byte	.LVL60
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL63
+	.8byte	.LVL64-1
+	.2byte	0x2
+	.byte	0x83
+	.sleb128 0
+	.8byte	.LVL64-1
+	.8byte	.LVL73
+	.2byte	0x1
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST28:
+	.8byte	.LVL57
+	.8byte	.LVL58
+	.2byte	0x8
+	.byte	0x83
+	.sleb128 0
+	.byte	0x71
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x9f
+	.8byte	.LVL58
+	.8byte	.LVL60
+	.2byte	0x6
+	.byte	0x83
+	.sleb128 0
+	.byte	0x71
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.8byte	.LVL63
+	.8byte	.LVL72
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL72
+	.8byte	.LVL73
+	.2byte	0x6
+	.byte	0x83
+	.sleb128 0
+	.byte	0x71
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST7:
-	.8byte	.LVL4
-	.8byte	.LVL11
+.LLST29:
+	.8byte	.LVL57
+	.8byte	.LVL58
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL30
-	.8byte	.LVL31
+	.8byte	.LVL72
+	.8byte	.LVL73
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST8:
-	.8byte	.LVL4
-	.8byte	.LVL7
+.LLST30:
+	.8byte	.LVL57
+	.8byte	.LVL60
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL63
+	.8byte	.LVL72
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL7
-	.8byte	.LVL8
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL9
-	.8byte	.LVL11
+	.8byte	.LVL72
+	.8byte	.LVL73
 	.2byte	0x1
-	.byte	0x55
+	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST9:
-	.8byte	.LVL6
-	.8byte	.LVL7
+.LLST31:
+	.8byte	.LVL64
+	.8byte	.LVL65
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL7
-	.8byte	.LVL9
-	.2byte	0x1
-	.byte	0x54
-	.8byte	.LVL9
-	.8byte	.LVL10
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 1
-	.byte	0x9f
-	.8byte	.LVL30
-	.8byte	.LVL31
-	.2byte	0x1
-	.byte	0x54
 	.8byte	0
 	.8byte	0
-.LLST10:
-	.8byte	.LVL4
-	.8byte	.LVL5
-	.2byte	0x13
-	.byte	0x70
-	.sleb128 0
-	.byte	0x12
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
+.LLST32:
+	.8byte	.LVL66
+	.8byte	.LVL67
+	.2byte	0x2
 	.byte	0x30
-	.byte	0x16
-	.byte	0x14
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x2b
-	.byte	0x28
-	.2byte	0x1
-	.byte	0x16
-	.byte	0x13
 	.byte	0x9f
-	.8byte	.LVL5
-	.8byte	.LVL6
-	.2byte	0x14
-	.byte	0xf3
-	.uleb128 0x1
+	.8byte	.LVL67
+	.8byte	.LVL70
+	.2byte	0x5
+	.byte	0x38
+	.byte	0x72
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	.LVL70
+	.8byte	.LVL71
+	.2byte	0x5
+	.byte	0x39
+	.byte	0x72
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	.LVL71
+	.8byte	.LVL72
+	.2byte	0x5
+	.byte	0x38
+	.byte	0x72
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST33:
+	.8byte	.LVL66
+	.8byte	.LVL69
+	.2byte	0x1
 	.byte	0x50
-	.byte	0x12
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x30
-	.byte	0x16
-	.byte	0x14
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x2b
-	.byte	0x28
+	.8byte	.LVL70
+	.8byte	.LVL72
 	.2byte	0x1
-	.byte	0x16
-	.byte	0x13
-	.byte	0x9f
+	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST11:
-	.8byte	.LVL4
-	.8byte	.LVL6
-	.2byte	0x3
-	.byte	0x8
-	.byte	0x31
+.LLST34:
+	.8byte	.LVL57
+	.8byte	.LVL60
+	.2byte	0x7
+	.byte	0x87
+	.sleb128 0
+	.byte	0x73
+	.sleb128 0
+	.byte	0x22
+	.byte	0x34
+	.byte	0x1c
+	.8byte	.LVL66
+	.8byte	.LVL67
+	.2byte	0x2
+	.byte	0x30
 	.byte	0x9f
+	.8byte	.LVL67
+	.8byte	.LVL68
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL70
+	.8byte	.LVL72
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL72
+	.8byte	.LVL74-1
+	.2byte	0x7
+	.byte	0x87
+	.sleb128 0
+	.byte	0x73
+	.sleb128 0
+	.byte	0x22
+	.byte	0x34
+	.byte	0x1c
+	.8byte	.LVL75
+	.8byte	.LVL76-1
+	.2byte	0x7
+	.byte	0x87
+	.sleb128 0
+	.byte	0x73
+	.sleb128 0
+	.byte	0x22
+	.byte	0x34
+	.byte	0x1c
 	.8byte	0
 	.8byte	0
 	.section	.debug_aranges,"",@progbits
@@ -7235,18 +7153,18 @@ stype.6123:
 	.byte	0
 	.2byte	0
 	.2byte	0
+	.8byte	.LFB217
+	.8byte	.LFE217-.LFB217
 	.8byte	.LFB219
 	.8byte	.LFE219-.LFB219
-	.8byte	.LFB221
-	.8byte	.LFE221-.LFB221
-	.8byte	.LFB225
-	.8byte	.LFE225-.LFB225
-	.8byte	.LFB229
-	.8byte	.LFE229-.LFB229
-	.8byte	.LFB230
-	.8byte	.LFE230-.LFB230
-	.8byte	.LFB231
-	.8byte	.LFE231-.LFB231
+	.8byte	.LFB223
+	.8byte	.LFE223-.LFB223
+	.8byte	.LFB214
+	.8byte	.LFE214-.LFB214
+	.8byte	.LFB215
+	.8byte	.LFE215-.LFB215
+	.8byte	.LFB227
+	.8byte	.LFE227-.LFB227
 	.8byte	0
 	.8byte	0
 	.section	.debug_ranges,"",@progbits
@@ -7317,32 +7235,32 @@ stype.6123:
 	.8byte	.LBE132
 	.8byte	0
 	.8byte	0
+	.8byte	.LFB217
+	.8byte	.LFE217
 	.8byte	.LFB219
 	.8byte	.LFE219
-	.8byte	.LFB221
-	.8byte	.LFE221
-	.8byte	.LFB225
-	.8byte	.LFE225
-	.8byte	.LFB229
-	.8byte	.LFE229
-	.8byte	.LFB230
-	.8byte	.LFE230
-	.8byte	.LFB231
-	.8byte	.LFE231
+	.8byte	.LFB223
+	.8byte	.LFE223
+	.8byte	.LFB214
+	.8byte	.LFE214
+	.8byte	.LFB215
+	.8byte	.LFE215
+	.8byte	.LFB227
+	.8byte	.LFE227
 	.8byte	0
 	.8byte	0
 	.section	.debug_line,"",@progbits
 .Ldebug_line0:
 	.section	.debug_str,"MS",@progbits,1
-.LASF377:
+.LASF366:
 	.string	"crccheck"
-.LASF371:
+.LASF357:
 	.string	"level"
 .LASF82:
 	.string	"off_mem_rsvmap"
 .LASF165:
 	.string	"UCLASS_I2C_EEPROM"
-.LASF328:
+.LASF317:
 	.string	"gld16_temp_list"
 .LASF17:
 	.string	"size_t"
@@ -7354,9 +7272,9 @@ stype.6123:
 	.string	"UCLASS_I2C"
 .LASF13:
 	.string	"sizetype"
-.LASF261:
+.LASF250:
 	.string	"net_hostname"
-.LASF256:
+.LASF245:
 	.string	"push_packet"
 .LASF36:
 	.string	"start"
@@ -7364,7 +7282,7 @@ stype.6123:
 	.string	"UCLASS_SPI"
 .LASF168:
 	.string	"UCLASS_I2S"
-.LASF283:
+.LASF272:
 	.string	"NETLOOP_RESTART"
 .LASF166:
 	.string	"UCLASS_I2C_GENERIC"
@@ -7372,17 +7290,17 @@ stype.6123:
 	.string	"UCLASS_MOD_EXP"
 .LASF227:
 	.string	"UCLASS_IO_DOMAIN"
-.LASF300:
+.LASF289:
 	.string	"WF_TYPE_GL16"
 .LASF199:
 	.string	"UCLASS_RKNAND"
 .LASF141:
 	.string	"UCLASS_DEMO"
-.LASF333:
+.LASF322:
 	.string	"gl16_list"
 .LASF90:
 	.string	"ih_magic"
-.LASF330:
+.LASF319:
 	.string	"a2_temp_list"
 .LASF145:
 	.string	"UCLASS_TEST_PROBE"
@@ -7398,9 +7316,9 @@ stype.6123:
 	.string	"__u8"
 .LASF214:
 	.string	"UCLASS_USB_DEV_GENERIC"
-.LASF369:
+.LASF355:
 	.string	"wf_offset"
-.LASF282:
+.LASF271:
 	.string	"NETLOOP_CONTINUE"
 .LASF207:
 	.string	"UCLASS_SPI_GENERIC"
@@ -7416,6 +7334,8 @@ stype.6123:
 	.string	"state"
 .LASF158:
 	.string	"UCLASS_CROS_EC"
+.LASF390:
+	.string	"/home/lyx/rk3566-11-eink/u-boot"
 .LASF56:
 	.string	"bi_dsp_freq"
 .LASF104:
@@ -7424,44 +7344,44 @@ stype.6123:
 	.string	"UCLASS_TEST_FDT"
 .LASF47:
 	.string	"bd_info"
-.LASF353:
+.LASF339:
 	.string	"parse_wf_gray2"
-.LASF280:
+.LASF269:
 	.string	"uclass_id"
 .LASF94:
 	.string	"ih_load"
-.LASF238:
+.LASF239:
 	.string	"__dtb_dt_spl_begin"
-.LASF350:
+.LASF336:
 	.string	"parse_wf_a2"
 .LASF7:
 	.string	"__u32"
 .LASF148:
 	.string	"UCLASS_PCI_EMUL"
-.LASF306:
+.LASF295:
 	.string	"epd_lut_data"
-.LASF267:
+.LASF256:
 	.string	"net_tx_packet"
 .LASF222:
 	.string	"UCLASS_FG"
-.LASF266:
+.LASF255:
 	.string	"net_server_ip"
-.LASF361:
+.LASF347:
 	.string	"parse_wf_gray16"
-.LASF274:
+.LASF263:
 	.string	"net_native_vlan"
 .LASF220:
 	.string	"UCLASS_VIDEO_CRTC"
-.LASF293:
+.LASF282:
 	.string	"WF_TYPE_RESET"
 .LASF157:
 	.string	"UCLASS_CODEC"
-.LASF399:
+.LASF388:
 	.ascii	"GNU C11 6.3.1 20170404 -ms"
 	.string	"trict-align -march=armv8-a+nosimd -mlittle-endian -mabi=lp64 -g -Os -fno-builtin -ffreestanding -fshort-wchar -fno-stack-protector -fno-delete-null-pointer-checks -fstack-usage -fno-pic -ffunction-sections -fdata-sections -ffixed-r9 -fno-common -ffixed-x18"
 .LASF23:
 	.string	"errno"
-.LASF312:
+.LASF301:
 	.string	"RKF_WF_GC16"
 .LASF15:
 	.string	"long int"
@@ -7475,23 +7395,21 @@ stype.6123:
 	.string	"size_dt_strings"
 .LASF217:
 	.string	"UCLASS_VIDEO"
-.LASF277:
+.LASF266:
 	.string	"net_boot_file_size"
-.LASF320:
+.LASF309:
 	.string	"timeandday"
-.LASF359:
-	.string	"decode_wf_reset"
 .LASF96:
 	.string	"ih_dcrc"
 .LASF61:
 	.string	"bi_ethspeed"
 .LASF140:
 	.string	"UCLASS_ROOT"
-.LASF363:
+.LASF349:
 	.string	"get_wf_frm_num"
 .LASF29:
 	.string	"ide_bus_offset"
-.LASF264:
+.LASF253:
 	.string	"net_server_ethaddr"
 .LASF64:
 	.string	"bi_arch_number"
@@ -7507,11 +7425,11 @@ stype.6123:
 	.string	"totalsize"
 .LASF91:
 	.string	"ih_hcrc"
-.LASF356:
+.LASF342:
 	.string	"idata"
 .LASF106:
 	.string	"load"
-.LASF299:
+.LASF288:
 	.string	"WF_TYPE_GC16"
 .LASF212:
 	.string	"UCLASS_TPM"
@@ -7525,8 +7443,6 @@ stype.6123:
 	.string	"bi_andr_version"
 .LASF139:
 	.string	"images"
-.LASF254:
-	.string	"priv"
 .LASF226:
 	.string	"UCLASS_DVFS"
 .LASF57:
@@ -7539,51 +7455,49 @@ stype.6123:
 	.string	"UCLASS_MDIO"
 .LASF25:
 	.string	"_Bool"
-.LASF286:
+.LASF275:
 	.string	"net_state"
 .LASF167:
 	.string	"UCLASS_I2C_MUX"
-.LASF307:
+.LASF296:
 	.string	"frame_num"
 .LASF14:
 	.string	"char"
 .LASF27:
 	.string	"_binary_u_boot_bin_start"
-.LASF397:
+.LASF387:
 	.string	"memset"
 .LASF216:
 	.string	"UCLASS_USB_GADGET_GENERIC"
-.LASF284:
+.LASF273:
 	.string	"NETLOOP_SUCCESS"
-.LASF340:
+.LASF329:
 	.string	"output"
-.LASF349:
+.LASF335:
 	.string	"pbuf"
-.LASF290:
+.LASF279:
 	.string	"p_current"
-.LASF281:
+.LASF270:
 	.string	"net_loop_state"
-.LASF368:
+.LASF354:
 	.string	"templist"
-.LASF314:
+.LASF303:
 	.string	"RKF_WF_GLR16"
-.LASF245:
-	.string	"enetaddr"
 .LASF156:
 	.string	"UCLASS_AMP"
 .LASF194:
 	.string	"UCLASS_PWRSEQ"
 .LASF122:
 	.string	"fit_hdr_fdt"
-.LASF275:
+.LASF264:
 	.string	"net_restart_wrap"
-.LASF263:
+.LASF252:
 	.string	"net_ethaddr"
-.LASF375:
+.LASF361:
 	.string	"_min2"
-.LASF392:
+.LASF381:
 	.string	"flags"
-.LASF355:
+.LASF341:
 	.string	"gray"
 .LASF99:
 	.string	"ih_type"
@@ -7591,15 +7505,15 @@ stype.6123:
 	.string	"off_dt_struct"
 .LASF52:
 	.string	"bi_flashoffset"
-.LASF276:
+.LASF265:
 	.string	"net_boot_file_name"
-.LASF376:
+.LASF365:
 	.string	"check_wf_crc"
 .LASF142:
 	.string	"UCLASS_TEST"
 .LASF92:
 	.string	"ih_time"
-.LASF370:
+.LASF356:
 	.string	"get_wf_level"
 .LASF195:
 	.string	"UCLASS_RAM"
@@ -7607,71 +7521,69 @@ stype.6123:
 	.string	"UCLASS_ETH"
 .LASF103:
 	.string	"image_info"
-.LASF360:
+.LASF346:
 	.string	"temp_data"
 .LASF109:
 	.string	"arch"
-.LASF337:
+.LASF326:
 	.string	"a2_list"
-.LASF352:
+.LASF338:
 	.string	"input"
-.LASF348:
+.LASF334:
 	.string	"temp"
 .LASF31:
 	.string	"select_hwpart"
-.LASF268:
+.LASF257:
 	.string	"net_rx_packets"
-.LASF287:
+.LASF276:
 	.string	"mem_malloc_start"
 .LASF74:
 	.string	"_datarelro_start_ofs"
 .LASF19:
 	.string	"ulong"
-.LASF351:
+.LASF337:
 	.string	"parse_wf_auto"
 .LASF95:
 	.string	"ih_ep"
 .LASF43:
 	.string	"lmb_region"
-.LASF366:
+.LASF352:
 	.string	"waveform"
-.LASF396:
+.LASF386:
 	.string	"printf"
 .LASF117:
 	.string	"fit_uname_os"
 .LASF58:
 	.string	"bi_bootflags"
-.LASF265:
+.LASF254:
 	.string	"net_ip"
-.LASF259:
+.LASF248:
 	.string	"net_dns_server"
-.LASF279:
+.LASF268:
 	.string	"net_ping_ip"
 .LASF45:
 	.string	"memory"
 .LASF77:
 	.string	"fdt_header"
-.LASF288:
+.LASF277:
 	.string	"mem_malloc_end"
 .LASF174:
 	.string	"UCLASS_MAILBOX"
 .LASF129:
 	.string	"rd_end"
-.LASF345:
+.LASF362:
 	.string	"rkf_wf_get_lut"
 .LASF134:
 	.string	"cmdline_start"
-.LASF253:
-	.string	"index"
-.LASF342:
+.LASF331:
 	.string	"temperture"
-.LASF357:
+.LASF343:
 	.string	"odata"
-.LASF331:
+.LASF320:
 	.string	"reset_list"
 .LASF202:
 	.string	"UCLASS_SCSI"
-.LASF400:
+.LASF389:
 	.string	"drivers/video/rk_eink/epdlut/rkf_waveform.c"
 .LASF175:
 	.string	"UCLASS_MASS_STORAGE"
@@ -7679,21 +7591,21 @@ stype.6123:
 	.string	"long unsigned int"
 .LASF150:
 	.string	"UCLASS_SIMPLE_BUS"
-.LASF310:
+.LASF299:
 	.string	"RKF_WF_RESET"
-.LASF319:
+.LASF308:
 	.string	"format"
-.LASF260:
+.LASF249:
 	.string	"net_nis_domain"
-.LASF295:
+.LASF284:
 	.string	"WF_TYPE_GRAY4"
-.LASF372:
+.LASF358:
 	.string	"_max1"
-.LASF373:
+.LASF359:
 	.string	"_max2"
 .LASF124:
 	.string	"fit_noffset_fdt"
-.LASF285:
+.LASF274:
 	.string	"NETLOOP_FAIL"
 .LASF221:
 	.string	"UCLASS_WDT"
@@ -7705,7 +7617,7 @@ stype.6123:
 	.string	"boot_cpuid_phys"
 .LASF120:
 	.string	"fit_uname_rd"
-.LASF329:
+.LASF318:
 	.string	"du_temp_list"
 .LASF208:
 	.string	"UCLASS_SYSCON"
@@ -7713,7 +7625,7 @@ stype.6123:
 	.string	"fit_uname_cfg"
 .LASF203:
 	.string	"UCLASS_SERIAL"
-.LASF273:
+.LASF262:
 	.string	"net_our_vlan"
 .LASF153:
 	.string	"UCLASS_BLK"
@@ -7721,39 +7633,39 @@ stype.6123:
 	.string	"image_info_t"
 .LASF149:
 	.string	"UCLASS_USB_EMUL"
-.LASF394:
+.LASF383:
 	.string	"kmalloc"
-.LASF315:
+.LASF304:
 	.string	"RKF_WF_GLD16"
 .LASF187:
 	.string	"UCLASS_PCI_GENERIC"
-.LASF339:
+.LASF328:
 	.string	"crc32_table"
 .LASF105:
 	.string	"image_len"
-.LASF327:
+.LASF316:
 	.string	"glr16_temp_list"
 .LASF59:
 	.string	"bi_ip_addr"
-.LASF378:
+.LASF367:
 	.string	"readcrc"
 .LASF189:
 	.string	"UCLASS_PINCONFIG"
-.LASF248:
-	.string	"send"
+.LASF345:
+	.string	"decode_wf_reset"
 .LASF210:
 	.string	"UCLASS_THERMAL"
 .LASF113:
 	.string	"legacy_hdr_os_copy"
 .LASF9:
 	.string	"long long int"
-.LASF362:
+.LASF348:
 	.string	"decode_wf_data"
-.LASF301:
+.LASF290:
 	.string	"WF_TYPE_GLR16"
 .LASF24:
 	.string	"___strtok"
-.LASF278:
+.LASF267:
 	.string	"net_boot_file_expected_size_in_blocks"
 .LASF16:
 	.string	"__kernel_size_t"
@@ -7769,17 +7681,17 @@ stype.6123:
 	.string	"UCLASS_RC"
 .LASF159:
 	.string	"UCLASS_DISPLAY"
-.LASF272:
+.LASF261:
 	.string	"net_null_ethaddr"
-.LASF336:
+.LASF325:
 	.string	"du_list"
 .LASF225:
 	.string	"UCLASS_CHARGE_DISPLAY"
-.LASF239:
+.LASF240:
 	.string	"load_addr"
 .LASF116:
 	.string	"fit_hdr_os"
-.LASF383:
+.LASF372:
 	.string	"n_accum"
 .LASF72:
 	.string	"_datarelrolocal_start_ofs"
@@ -7787,11 +7699,9 @@ stype.6123:
 	.string	"unsigned int"
 .LASF18:
 	.string	"ushort"
-.LASF244:
-	.string	"eth_device"
-.LASF358:
+.LASF344:
 	.string	"temp1"
-.LASF304:
+.LASF293:
 	.string	"WF_TYPE_GRAY32"
 .LASF191:
 	.string	"UCLASS_PMIC"
@@ -7799,27 +7709,27 @@ stype.6123:
 	.string	"legacy_hdr_os"
 .LASF81:
 	.string	"off_dt_strings"
-.LASF236:
+.LASF237:
 	.string	"monitor_flash_len"
 .LASF176:
 	.string	"UCLASS_MISC"
 .LASF49:
 	.string	"bi_memsize"
-.LASF317:
+.LASF306:
 	.string	"rkf_waveform"
-.LASF338:
+.LASF327:
 	.string	"global_waveform"
 .LASF26:
 	.string	"image_base"
-.LASF388:
+.LASF377:
 	.string	"n_data"
 .LASF209:
 	.string	"UCLASS_SYSRESET"
-.LASF297:
+.LASF286:
 	.string	"WF_TYPE_AUTO"
-.LASF291:
+.LASF280:
 	.string	"current"
-.LASF316:
+.LASF305:
 	.string	"RKF_WF_A2"
 .LASF163:
 	.string	"UCLASS_FIRMWARE"
@@ -7827,9 +7737,9 @@ stype.6123:
 	.string	"UCLASS_LPC"
 .LASF169:
 	.string	"UCLASS_IDE"
-.LASF367:
+.LASF353:
 	.string	"list"
-.LASF390:
+.LASF379:
 	.string	"block"
 .LASF138:
 	.string	"bootm_headers_t"
@@ -7837,15 +7747,13 @@ stype.6123:
 	.string	"bi_arm_freq"
 .LASF197:
 	.string	"UCLASS_REMOTEPROC"
-.LASF249:
-	.string	"recv"
 .LASF108:
 	.string	"type"
 .LASF119:
 	.string	"fit_hdr_rd"
 .LASF54:
 	.string	"bi_sramsize"
-.LASF324:
+.LASF313:
 	.string	"reset_temp_list"
 .LASF162:
 	.string	"UCLASS_GPIO"
@@ -7853,9 +7761,9 @@ stype.6123:
 	.string	"UCLASS_PWM"
 .LASF40:
 	.string	"long double"
-.LASF395:
+.LASF385:
 	.string	"strncmp"
-.LASF334:
+.LASF323:
 	.string	"glr16_list"
 .LASF128:
 	.string	"rd_start"
@@ -7863,27 +7771,25 @@ stype.6123:
 	.string	"UCLASS_POWER_DOMAIN"
 .LASF196:
 	.string	"UCLASS_REGULATOR"
-.LASF241:
+.LASF242:
 	.string	"save_size"
 .LASF154:
 	.string	"UCLASS_CLK"
-.LASF246:
-	.string	"iobase"
 .LASF71:
 	.string	"_datarel_start_ofs"
 .LASF101:
 	.string	"ih_name"
 .LASF97:
 	.string	"ih_os"
-.LASF302:
+.LASF291:
 	.string	"WF_TYPE_GLD16"
 .LASF135:
 	.string	"cmdline_end"
-.LASF269:
+.LASF258:
 	.string	"net_rx_packet"
-.LASF235:
+.LASF236:
 	.string	"LOGF_MAX_CATEGORIES"
-.LASF382:
+.LASF371:
 	.string	"a_size"
 .LASF33:
 	.string	"size"
@@ -7891,9 +7797,9 @@ stype.6123:
 	.string	"long long unsigned int"
 .LASF89:
 	.string	"image_header"
-.LASF318:
+.LASF307:
 	.string	"length"
-.LASF296:
+.LASF285:
 	.string	"WF_TYPE_GRAY2"
 .LASF21:
 	.string	"__be32"
@@ -7901,59 +7807,55 @@ stype.6123:
 	.string	"bi_flashstart"
 .LASF118:
 	.string	"fit_noffset_os"
-.LASF374:
+.LASF360:
 	.string	"_min1"
 .LASF177:
 	.string	"UCLASS_MMC"
-.LASF251:
-	.string	"write_hwaddr"
-.LASF234:
+.LASF235:
 	.string	"UCLASS_INVALID"
-.LASF311:
+.LASF300:
 	.string	"RKF_WF_DU"
 .LASF215:
 	.string	"UCLASS_USB_HUB"
 .LASF231:
 	.string	"UCLASS_EBC"
-.LASF305:
+.LASF294:
 	.string	"WF_TYPE_MAX"
-.LASF403:
+.LASF392:
 	.string	"rkf_wf_get_version"
 .LASF39:
 	.string	"flash_info"
 .LASF83:
 	.string	"version"
-.LASF250:
-	.string	"halt"
 .LASF44:
 	.string	"region"
 .LASF87:
 	.string	"size_dt_struct"
+.LASF233:
+	.string	"UCLASS_RNG"
 .LASF179:
 	.string	"UCLASS_MTD"
-.LASF387:
+.LASF376:
 	.string	"crc_table"
 .LASF76:
 	.string	"fdt32_t"
-.LASF341:
+.LASF330:
 	.string	"lut_type"
 .LASF181:
 	.string	"UCLASS_NORTHBRIDGE"
 .LASF60:
 	.string	"bi_enetaddr"
-.LASF391:
+.LASF380:
 	.string	"kzalloc"
-.LASF402:
+.LASF391:
 	.string	"mtd_info"
-.LASF242:
+.LASF243:
 	.string	"in_addr"
-.LASF270:
+.LASF259:
 	.string	"net_rx_packet_len"
-.LASF247:
-	.string	"init"
-.LASF343:
+.LASF332:
 	.string	"stype"
-.LASF237:
+.LASF238:
 	.string	"__dtb_dt_begin"
 .LASF198:
 	.string	"UCLASS_RESET"
@@ -7979,7 +7881,7 @@ stype.6123:
 	.string	"UCLASS_TIMER"
 .LASF206:
 	.string	"UCLASS_SPI_FLASH"
-.LASF325:
+.LASF314:
 	.string	"gc16_temp_list"
 .LASF63:
 	.string	"bi_busfreq"
@@ -7989,9 +7891,9 @@ stype.6123:
 	.string	"UCLASS_PINCTRL"
 .LASF200:
 	.string	"UCLASS_RAMDISK"
-.LASF365:
+.LASF351:
 	.string	"mode"
-.LASF385:
+.LASF374:
 	.string	"crc_build_table32"
 .LASF147:
 	.string	"UCLASS_I2C_EMUL"
@@ -7999,31 +7901,29 @@ stype.6123:
 	.string	"UCLASS_SPMI"
 .LASF144:
 	.string	"UCLASS_TEST_BUS"
-.LASF380:
+.LASF369:
 	.string	"crc_32"
-.LASF309:
+.LASF298:
 	.string	"rkf_waveform_type"
-.LASF240:
+.LASF241:
 	.string	"save_addr"
-.LASF401:
-	.string	"/home2/zwp/2_rk3568_11.0/u-boot"
 .LASF133:
 	.string	"initrd_end"
-.LASF389:
+.LASF378:
 	.string	"kfree"
-.LASF354:
+.LASF340:
 	.string	"parse_wf_reset"
-.LASF335:
+.LASF324:
 	.string	"gld16_list"
 .LASF73:
 	.string	"_datarellocal_start_ofs"
-.LASF322:
+.LASF311:
 	.string	"panel_info"
-.LASF233:
+.LASF234:
 	.string	"UCLASS_COUNT"
 .LASF32:
 	.string	"block_drvr"
-.LASF398:
+.LASF384:
 	.string	"memcpy"
 .LASF22:
 	.string	"gfp_t"
@@ -8035,55 +7935,53 @@ stype.6123:
 	.string	"fit_noffset_setup"
 .LASF88:
 	.string	"working_fdt"
-.LASF262:
+.LASF251:
 	.string	"net_root_path"
 .LASF160:
 	.string	"UCLASS_DMA"
 .LASF68:
 	.string	"bd_t"
-.LASF243:
+.LASF244:
 	.string	"s_addr"
-.LASF364:
+.LASF350:
 	.string	"get_wf_buf"
-.LASF323:
+.LASF312:
 	.string	"full_version"
-.LASF271:
+.LASF260:
 	.string	"net_bcast_ethaddr"
 .LASF65:
 	.string	"bi_boot_params"
-.LASF344:
+.LASF333:
 	.string	"sftemp"
-.LASF289:
+.LASF278:
 	.string	"mem_malloc_brk"
-.LASF257:
+.LASF246:
 	.string	"net_gateway"
 .LASF48:
 	.string	"bi_memstart"
-.LASF292:
+.LASF281:
 	.string	"epd_lut_type"
 .LASF219:
 	.string	"UCLASS_VIDEO_CONSOLE"
-.LASF298:
+.LASF287:
 	.string	"WF_TYPE_A2"
-.LASF255:
-	.string	"eth_current"
 .LASF46:
 	.string	"reserved"
-.LASF393:
+.LASF382:
 	.string	"free"
 .LASF67:
 	.string	"bi_dram"
-.LASF386:
+.LASF375:
 	.string	"a_poly"
 .LASF2:
 	.string	"short unsigned int"
 .LASF78:
 	.string	"magic"
-.LASF381:
+.LASF370:
 	.string	"a_data"
 .LASF125:
 	.string	"fit_hdr_setup"
-.LASF303:
+.LASF292:
 	.string	"WF_TYPE_GCC16"
 .LASF114:
 	.string	"legacy_hdr_valid"
@@ -8095,29 +7993,27 @@ stype.6123:
 	.string	"sector_count"
 .LASF100:
 	.string	"ih_comp"
-.LASF294:
+.LASF283:
 	.string	"WF_TYPE_GRAY16"
 .LASF130:
 	.string	"ft_addr"
 .LASF229:
 	.string	"UCLASS_ETH_PHY"
-.LASF313:
+.LASF302:
 	.string	"RKF_WF_GL16"
-.LASF379:
+.LASF368:
 	.string	"check_wf_format"
-.LASF346:
+.LASF363:
 	.string	"rkf_wf_input"
 .LASF4:
 	.string	"uchar"
 .LASF131:
 	.string	"ft_len"
-.LASF384:
+.LASF373:
 	.string	"decode_wf_auto"
-.LASF326:
+.LASF315:
 	.string	"gl16_temp_list"
-.LASF252:
-	.string	"next"
-.LASF308:
+.LASF297:
 	.string	"data"
 .LASF180:
 	.string	"UCLASS_NOP"
@@ -8127,19 +8023,19 @@ stype.6123:
 	.string	"UCLASS_PCH"
 .LASF186:
 	.string	"UCLASS_PCI"
-.LASF258:
+.LASF247:
 	.string	"net_netmask"
-.LASF332:
+.LASF321:
 	.string	"gc16_list"
 .LASF69:
 	.string	"IRQ_STACK_START"
 .LASF151:
 	.string	"UCLASS_ADC"
-.LASF347:
+.LASF364:
 	.string	"waveform_file"
 .LASF146:
 	.string	"UCLASS_SPI_EMUL"
-.LASF321:
+.LASF310:
 	.string	"panel_name"
 .LASF123:
 	.string	"fit_uname_fdt"

commit f0d72b5c81361746b9e1d76cd18f426804cca53f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Feb 21 15:37:56 2021 +0800

    rockchip: rk3568: use API rockchip_get_cpu_version()
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Idaf41f8c280535f6807cf1202acde26a3f17add5

diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c
index e9eef451fd..404d1921ae 100644
--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
@@ -4,8 +4,8 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 #include <common.h>
-#include <asm/armv8/mmu.h>
 #include <asm/io.h>
+#include <asm/arch/cpu.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/grf_rk3568.h>
 #include <asm/arch/rk_atags.h>
@@ -932,7 +932,7 @@ int rk_board_fdt_fixup(const void *blob)
 	u32 *pp;
 
 	/* Don't go further if new variant */
-	if (readl(PMUGRF_SOC_CON15) & GENMASK(15, 14))
+	if (rockchip_get_cpu_version() > 0)
 		return 0;
 
 	node = fdt_path_offset(blob, CRU_NODE_FDT_PATH);

commit ddb7bfe222fb50625f5801543b26de04429f2439
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Feb 22 18:13:45 2021 +0800

    cmd: add "crypto_sum" for checksum
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ibdc58f55580ab0230cb8751bc08fb9ea89fb26d8

diff --git a/cmd/Kconfig b/cmd/Kconfig
index f8afa9c26c..ebd9e8fb05 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -550,6 +550,12 @@ config CMD_CRYPTO
 	help
 	  Crypto test.
 
+config CMD_CRYPTO_SUM
+	bool "crypto checksum engine"
+	depends on DM_CRYPTO
+	default y
+	help
+	  Crypto checksum engine for sha1/sha256/sha512/md5.
 endmenu
 
 menu "Compression commands"
diff --git a/cmd/Makefile b/cmd/Makefile
index afab39477f..b2c7dcd4a6 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -41,6 +41,7 @@ obj-$(CONFIG_CMD_CONSOLE) += console.o
 obj-$(CONFIG_CMD_CPU) += cpu.o
 obj-$(CONFIG_CMD_CHARGE_DISPLAY) += charge.o
 obj-$(CONFIG_CMD_CRYPTO) += crypto.o
+obj-$(CONFIG_CMD_CRYPTO_SUM) += crypto_sum.o
 obj-$(CONFIG_DATAFLASH_MMC_SELECT) += dataflash_mmc_mux.o
 obj-$(CONFIG_CMD_DATE) += date.o
 obj-$(CONFIG_CMD_DEMO) += demo.o
diff --git a/cmd/crypto_sum.c b/cmd/crypto_sum.c
new file mode 100644
index 0000000000..5189d5fae2
--- /dev/null
+++ b/cmd/crypto_sum.c
@@ -0,0 +1,93 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <crypto.h>
+
+static void dump_hash(const char *label, void *hash,
+		      u32 nbits, char *addr, int len)
+{
+	char *buf;
+	int i;
+
+	printf("%s for %08lx ... %08lx ==> ", label, (ulong)addr, (ulong)addr + len);
+	buf = hash;
+	for (i = 0; i < BITS2BYTE(nbits); i++)
+		printf("%02x", buf[i]);
+
+	printf("\n\n");
+}
+
+static int do_crypto_csum(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+	sha_context csha_ctx;
+	struct udevice *dev;
+	char *input_data;
+	int input_len;
+	u8 hash[256];
+	u32 cap;
+
+	if (argc != 4)
+		return CMD_RET_USAGE;
+
+	if (!strcmp(argv[1], "md5"))
+		cap = CRYPTO_MD5;
+	else if (!strcmp(argv[1], "sha1"))
+		cap = CRYPTO_SHA1;
+	else if (!strcmp(argv[1], "sha256"))
+		cap = CRYPTO_SHA256;
+	else if (!strcmp(argv[1], "sha512"))
+		cap = CRYPTO_SHA512;
+	else
+		return CMD_RET_USAGE;
+
+	input_data = (char *)simple_strtoul(argv[2], NULL, 16);
+	input_len = simple_strtoul(argv[3], NULL, 16);
+
+	dev = crypto_get_device(cap);
+	if (!dev) {
+		printf("Can't find crypto device for %s\n", argv[1]);
+		return -ENODEV;
+	}
+
+	if (cap == CRYPTO_MD5) {
+		csha_ctx.algo = CRYPTO_MD5;
+		csha_ctx.length = input_len;
+		memset(hash, 0, sizeof(hash));
+		crypto_sha_csum(dev, &csha_ctx, input_data, input_len, hash);
+		dump_hash("md5", hash, crypto_algo_nbits(csha_ctx.algo),
+			  input_data, input_len);
+	} else if (cap == CRYPTO_SHA1) {
+		csha_ctx.algo = CRYPTO_SHA1;
+		csha_ctx.length = input_len;
+		memset(hash, 0, sizeof(hash));
+		crypto_sha_csum(dev, &csha_ctx, input_data, input_len, hash);
+		dump_hash("sha1", hash, crypto_algo_nbits(csha_ctx.algo),
+			  input_data, input_len);
+	} else if (cap == CRYPTO_SHA256) {
+		csha_ctx.algo = CRYPTO_SHA256;
+		csha_ctx.length = input_len;
+		memset(hash, 0, sizeof(hash));
+		crypto_sha_csum(dev, &csha_ctx, input_data, input_len, hash);
+		dump_hash("sha256", hash, crypto_algo_nbits(csha_ctx.algo),
+			  input_data, input_len);
+	} else if (cap == CRYPTO_SHA512) {
+		csha_ctx.algo = CRYPTO_SHA512;
+		csha_ctx.length = input_len;
+		memset(hash, 0, sizeof(hash));
+		crypto_sha_csum(dev, &csha_ctx, input_data, input_len, hash);
+		dump_hash("sha512", hash, crypto_algo_nbits(csha_ctx.algo),
+			  input_data, input_len);
+	}
+
+	return 0;
+}
+
+U_BOOT_CMD(
+	crypto_sum,	4,	1,	do_crypto_csum,
+	"crypto checksum engine",
+	"[md5|sha1|sha256|sha512] [addr] [length]"
+);
+

commit 465b1b6c168b96c522896fa77b48ef7c71969a0b
Author: shengfei Xu <xsf@rock-chips.com>
Date:   Tue Feb 23 14:57:40 2021 +0800

    power: pmic: rk8xx: SYS shut down voltage select 3100mV
    
    Let the CPU stop working earlier so that the last operation
    of spinand can be maintained at a better power supply level.
    
    Signed-off-by: shengfei Xu <xsf@rock-chips.com>
    Change-Id: I5bb008abaa6d5da3431f2edcee50579f7ab14eff

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index ef11cc46d4..f959f80f46 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -149,7 +149,7 @@ static struct reg_data rk817_init_reg[] = {
  * the under-voltage protection will shutdown the LDO3 and reset the PMIC
  */
 	{ RK817_BUCK4_CMIN, 0x60, 0x60},
-
+	{ RK817_PMIC_SYS_CFG1, 0x40, 0x40},
 	/* Set pmic_sleep as none function */
 	{ RK817_PMIC_SYS_CFG3, 0x00, 0x18 },
 
diff --git a/include/power/rk8xx_pmic.h b/include/power/rk8xx_pmic.h
index b76bd9420e..70b11c0337 100644
--- a/include/power/rk8xx_pmic.h
+++ b/include/power/rk8xx_pmic.h
@@ -198,7 +198,6 @@ enum {
 	RK817_POWER_EN2,
 	RK817_POWER_EN3,
 };
-
 #define RK817_POWER_EN_SAVE0	0x99
 #define RK817_POWER_EN_SAVE1	0xa4
 
@@ -206,6 +205,7 @@ enum {
 #define RK817_ID_LSB	0xee
 #define RK8XX_ID_MSK	0xfff0
 
+#define RK817_PMIC_SYS_CFG1	0xf1
 #define RK817_PMIC_SYS_CFG3	0xf4
 #define RK817_GPIO_INT_CFG	0xfe
 

commit feffd38e6d7f7ff7fb50564e9b9d39689b7bc4f9
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Mon Feb 22 10:47:30 2021 +0800

    drm/rockchip: vop2: enable OTP en for rk3566
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: Ia44c3dec6b6d5b2f66b87d80a6f209138af05c40

diff --git a/drivers/video/drm/rockchip_vop2.c b/drivers/video/drm/rockchip_vop2.c
index a00d9f03d3..58a875c45e 100644
--- a/drivers/video/drm/rockchip_vop2.c
+++ b/drivers/video/drm/rockchip_vop2.c
@@ -10,6 +10,7 @@
 #include <malloc.h>
 #include <fdtdec.h>
 #include <fdt_support.h>
+#include <asm/arch/cpu.h>
 #include <asm/unaligned.h>
 #include <asm/io.h>
 #include <linux/list.h>
@@ -65,6 +66,8 @@
 #define IF_CRTL_HDMI_PIN_POL_MASK		0x7
 #define IF_CRTL_HDMI_PIN_POL_SHIT		4
 #define IF_CRTL_RGB_LVDS_DCLK_POL_SHIT		3
+#define RK3568_SYS_OTP_WIN_EN			0x50
+#define OTP_WIN_EN_SHIFT			0
 #define RK3568_VP0_LINE_FLAG			0x70
 #define RK3568_VP1_LINE_FLAG			0x74
 #define RK3568_VP2_LINE_FLAG			0x78
@@ -790,6 +793,9 @@ static int vop2_initial(struct vop2 *vop2, struct display_state *state)
 		return ret;
 	}
 
+	if (soc_is_rk3566())
+		vop2_mask_write(vop2, RK3568_SYS_OTP_WIN_EN, EN_MASK,
+				OTP_WIN_EN_SHIFT, 1, false);
 	memcpy(vop2->regsbak, vop2->regs, vop2->reg_len);
 
 	rockchip_vop2_init_gamma(vop2, state);

commit 11f53190744c7adab833544c780574961009e774
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Sun Feb 21 18:39:38 2021 +0800

    drm/rockchip: vop2: add support lvds
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: I6814be4bcb8764cb9a6d75022760506ecba0f6c0

diff --git a/drivers/video/drm/rockchip_vop2.c b/drivers/video/drm/rockchip_vop2.c
index bf808b05c8..a00d9f03d3 100644
--- a/drivers/video/drm/rockchip_vop2.c
+++ b/drivers/video/drm/rockchip_vop2.c
@@ -49,7 +49,7 @@
 #define EDP0_MUX_SHIFT				14
 #define MIPI0_MUX_SHIFT				16
 #define MIPI1_MUX_SHIFT				21
-#define LVDS0_MUX_SHIFT				5
+#define LVDS0_MUX_SHIFT				18
 #define LVDS1_MUX_SHIFT				25
 
 #define RK3568_DSP_IF_CTRL			0x02c
@@ -911,6 +911,8 @@ static int rockchip_vop2_init(struct display_state *state)
 				1, false);
 		vop2_mask_write(vop2, RK3568_DSP_IF_EN, IF_MUX_MASK,
 				LVDS0_MUX_SHIFT, cstate->crtc_id, false);
+		vop2_mask_write(vop2, RK3568_DSP_IF_POL, EN_MASK,
+				IF_CRTL_RGB_LVDS_DCLK_POL_SHIT, dclk_inv, false);
 	}
 
 	if (conn_state->output_if & VOP_OUTPUT_IF_LVDS1) {
@@ -918,6 +920,8 @@ static int rockchip_vop2_init(struct display_state *state)
 				1, false);
 		vop2_mask_write(vop2, RK3568_DSP_IF_EN, IF_MUX_MASK,
 				LVDS1_MUX_SHIFT, cstate->crtc_id, false);
+		vop2_mask_write(vop2, RK3568_DSP_IF_POL, EN_MASK,
+				IF_CRTL_RGB_LVDS_DCLK_POL_SHIT, dclk_inv, false);
 	}
 
 	if (conn_state->output_flags &

commit 3a148966319350b9d6507f7e41ac3d6c2bff535d
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Mon Feb 8 10:51:54 2021 +0800

    rockchip: rk3568: enable LVDS config
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: I5d8f6c44d937fb083b604135da8b525d76bccb70

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index f0fece4127..93a2a00857 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -187,8 +187,10 @@ CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_HDMI=y
 CONFIG_DRM_ROCKCHIP_INNO_MIPI_PHY=y
+CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
+CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y

commit aeb5dd225d3f6f128011b2b834633b8976fc802f
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Mon Feb 8 10:51:06 2021 +0800

    drm/rockchip: lvds: Add support RK356X LVDS
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: Id7f31ae8a7090aa0f6f4983facaa798ab73f0b3e

diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index b5ddb184d2..2d44420149 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -58,6 +58,22 @@
 #define RK3368_LVDS_MSBSEL(x)		HIWORD_UPDATE(x, 11, 11)
 #define RK3368_LVDS_P2S_EN(x)		HIWORD_UPDATE(x,  6,  6)
 
+#define RK3568_GRF_VO_CON0		0x0360
+#define RK3568_LVDS1_SELECT(x)		HIWORD_UPDATE(x, 13, 12)
+#define RK3568_LVDS1_MSBSEL(x)		HIWORD_UPDATE(x, 11, 11)
+#define RK3568_LVDS0_SELECT(x)		HIWORD_UPDATE(x,  5,  4)
+#define RK3568_LVDS0_MSBSEL(x)		HIWORD_UPDATE(x,  3,  3)
+#define RK3568_GRF_VO_CON2		0x0368
+#define RK3568_LVDS0_DCLK_INV_SEL(x)	HIWORD_UPDATE(x,  9,  9)
+#define RK3568_LVDS0_DCLK_DIV2_SEL(x)	HIWORD_UPDATE(x,  8,  8)
+#define RK3568_LVDS0_MODE_EN(x)		HIWORD_UPDATE(x,  1,  1)
+#define RK3568_LVDS0_P2S_EN(x)		HIWORD_UPDATE(x,  0,  0)
+#define RK3568_GRF_VO_CON3		0x036c
+#define RK3568_LVDS1_DCLK_INV_SEL(x)	HIWORD_UPDATE(x,  9,  9)
+#define RK3568_LVDS1_DCLK_DIV2_SEL(x)	HIWORD_UPDATE(x,  8,  8)
+#define RK3568_LVDS1_MODE_EN(x)		HIWORD_UPDATE(x,  1,  1)
+#define RK3568_LVDS1_P2S_EN(x)		HIWORD_UPDATE(x,  0,  0)
+
 enum lvds_format {
 	LVDS_8BIT_MODE_FORMAT_1,
 	LVDS_8BIT_MODE_FORMAT_2,
@@ -130,6 +146,7 @@ static int rockchip_lvds_connector_init(struct display_state *state)
 		conn_state->output_mode = ROCKCHIP_OUT_MODE_AAAA;
 
 	conn_state->color_space = V4L2_COLORSPACE_DEFAULT;
+	conn_state->output_if = VOP_OUTPUT_IF_LVDS0;
 
 	return 0;
 }
@@ -307,6 +324,30 @@ static const struct rockchip_connector rk3368_lvds_driver_data = {
 	 .data = &rk3368_lvds_funcs,
 };
 
+static void rk3568_lvds_enable(struct rockchip_lvds *lvds, int pipe)
+{
+	regmap_write(lvds->grf, RK3568_GRF_VO_CON2,
+		     RK3568_LVDS0_MODE_EN(1) | RK3568_LVDS0_P2S_EN(1) |
+		     RK3568_LVDS0_DCLK_INV_SEL(1));
+	regmap_write(lvds->grf, RK3568_GRF_VO_CON0,
+		     RK3568_LVDS0_SELECT(lvds->format) | RK3568_LVDS0_MSBSEL(1));
+}
+
+static void rk3568_lvds_disable(struct rockchip_lvds *lvds)
+{
+	regmap_write(lvds->grf, RK3568_GRF_VO_CON2, RK3568_LVDS0_MODE_EN(0));
+}
+
+static const struct rockchip_lvds_funcs rk3568_lvds_funcs = {
+	.enable = rk3568_lvds_enable,
+	.disable = rk3568_lvds_disable,
+};
+
+static const struct rockchip_connector rk3568_lvds_driver_data = {
+	.funcs = &rockchip_lvds_connector_funcs,
+	.data = &rk3568_lvds_funcs,
+};
+
 static const struct udevice_id rockchip_lvds_ids[] = {
 	{
 		.compatible = "rockchip,px30-lvds",
@@ -324,6 +365,10 @@ static const struct udevice_id rockchip_lvds_ids[] = {
 		.compatible = "rockchip,rk3368-lvds",
 		.data = (ulong)&rk3368_lvds_driver_data,
 	},
+	{
+		.compatible = "rockchip,rk3568-lvds",
+		.data = (ulong)&rk3568_lvds_driver_data,
+	},
 	{}
 };
 

commit 22dd40273d5e9ce459faa38f7de1fb6d6c67b7a4
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Mon Feb 8 10:50:44 2021 +0800

    video/drm: combo_phy: Add support RK356X LVDS
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: Ieb7cf88e00201540388599b063e9c77dd019d8e8

diff --git a/drivers/video/drm/inno_video_combo_phy.c b/drivers/video/drm/inno_video_combo_phy.c
index af4020858c..615bd55a17 100644
--- a/drivers/video/drm/inno_video_combo_phy.c
+++ b/drivers/video/drm/inno_video_combo_phy.c
@@ -83,6 +83,14 @@
 #define SAMPLE_CLOCK_DIRECTION_MASK		BIT(4)
 #define SAMPLE_CLOCK_DIRECTION_REVERSE		BIT(4)
 #define SAMPLE_CLOCK_DIRECTION_FORWARD		0
+#define LOWFRE_EN_MASK				BIT(5)
+#define PLL_OUTPUT_FREQUENCY_DIV_BY_1		0
+#define PLL_OUTPUT_FREQUENCY_DIV_BY_2		1
+/* Analog Register Part: reg1e */
+#define PLL_MODE_SEL_MASK			GENMASK(6, 5)
+#define PLL_MODE_SEL_LVDS_MODE			0
+#define PLL_MODE_SEL_MIPI_MODE			BIT(5)
+
 /* Digital Register Part: reg00 */
 #define REG_DIG_RSTN_MASK			BIT(0)
 #define REG_DIG_RSTN_NORMAL			BIT(0)
@@ -433,8 +441,9 @@ static void inno_video_phy_lvds_mode_enable(struct inno_video_phy *inno)
 
 	/* Sample clock reverse direction */
 	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x08,
-			SAMPLE_CLOCK_DIRECTION_MASK,
-			SAMPLE_CLOCK_DIRECTION_REVERSE);
+			SAMPLE_CLOCK_DIRECTION_MASK | LOWFRE_EN_MASK,
+			SAMPLE_CLOCK_DIRECTION_REVERSE |
+			PLL_OUTPUT_FREQUENCY_DIV_BY_1);
 	/* Select LVDS mode */
 	phy_update_bits(inno, REGISTER_PART_LVDS, 0x03,
 			MODE_ENABLE_MASK, LVDS_MODE_ENABLE);
@@ -456,6 +465,10 @@ static void inno_video_phy_lvds_mode_enable(struct inno_video_phy *inno)
 	if (ret)
 		dev_err(phy->dev, "PLL is not lock\n");
 
+	/* Select PLL mode */
+	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x1e,
+			PLL_MODE_SEL_MASK, PLL_MODE_SEL_LVDS_MODE);
+
 	/* Reset LVDS digital logic */
 	phy_update_bits(inno, REGISTER_PART_LVDS, 0x00,
 			LVDS_DIGITAL_INTERNAL_RESET_MASK,
@@ -707,6 +720,10 @@ static const struct udevice_id inno_video_phy_ids[] = {
 		.compatible = "rockchip,rk3368-video-phy",
 		.data = (ulong)&inno_video_phy_driver_data,
 	},
+	{
+		.compatible = "rockchip,rk3568-video-phy",
+		.data = (ulong)&inno_video_phy_driver_data,
+	},
 	{}
 };
 

commit 5f0cde7958e8032806d6e6eafadf3170dc15ca2c
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Mon Feb 8 10:46:44 2021 +0800

    video/drm: display: add compatible rk356x lvds dts config
    
    after this commit, can support parse the following two config:
    
    1.
    panel {
        ...
    
        display-timings {
            ...
        };
    
        port@0 {
            reg = <0>;
            panel_in_lvds: endpoint {
                remote-endpoint = <&lvds_out_panel>;
            };
        };
    };
    
    2.
    panel {
        ...
    
        display-timings {
            ...
        };
    
        ports {
            #address-cells = <1>;
            #size-cells = <0>;
    
            port@0 {
                reg = <0>;
                panel_in_lvds: endpoint {
                    remote-endpoint = <&lvds_out_panel>;
                };
            };
        };
    };
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: Idbcc31bbe29d00fe5ceea1f5041543cdfe9bc34e

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 11bf7209cb..e40bd24611 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -1165,7 +1165,7 @@ enum {
 
 static struct rockchip_panel *rockchip_of_find_panel(struct udevice *dev)
 {
-	ofnode panel_node, ports, port, ep;
+	ofnode panel_node, ports, port, ep, port_parent_node;
 	struct udevice *panel_dev;
 	int ret;
 
@@ -1193,6 +1193,7 @@ static struct rockchip_panel *rockchip_of_find_panel(struct udevice *dev)
 		ofnode_for_each_subnode(ep, port) {
 			ofnode _ep, _port;
 			uint phandle;
+			bool is_ports_node = false;
 
 			if (ofnode_read_u32(ep, "remote-endpoint", &phandle))
 				continue;
@@ -1205,7 +1206,12 @@ static struct rockchip_panel *rockchip_of_find_panel(struct udevice *dev)
 			if (!ofnode_valid(_port))
 				continue;
 
-			panel_node = ofnode_get_parent(_port);
+			port_parent_node = ofnode_get_parent(_port);
+			is_ports_node = strstr(port_parent_node.np->full_name, "ports") ? 1 : 0;
+			if (is_ports_node)
+				panel_node = ofnode_get_parent(port_parent_node);
+			else
+				panel_node = ofnode_get_parent(_port);
 			if (!ofnode_valid(panel_node))
 				continue;
 

commit b9e9168c089ed67fe3c25802bf079030e579fab0
Author: shengfei Xu <xsf@rock-chips.com>
Date:   Sun Feb 21 17:56:00 2021 +0800

    power: pmic: rk8xx: add not_save_power_en
    
    add not_save_power_en to judge whether save the PMIC_POWER_EN register.
    
    Signed-off-by: shengfei Xu <xsf@rock-chips.com>
    Change-Id: I6e2117ca947dacee41eead631a5c877bd6be3e7a

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index 3435f86bb8..ef11cc46d4 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -411,6 +411,9 @@ static int rk8xx_ofdata_to_platdata(struct udevice *dev)
 	else
 		rk8xx->lp_action = RK8XX_LP_OFF;
 
+	val = dev_read_u32_default(dev, "not-save-power-en", 0);
+	rk8xx->not_save_power_en = val;
+
 	return 0;
 }
 
@@ -539,6 +542,9 @@ static int rk8xx_probe(struct udevice *dev)
 		lp_act_msk = RK8XX_LP_ACTION_MSK;
 		init_data = rk817_init_reg;
 		init_data_num = ARRAY_SIZE(rk817_init_reg);
+		/* judge whether save the PMIC_POWER_EN register */
+		if (priv->not_save_power_en)
+			break;
 		power_en0 = pmic_reg_read(dev, RK817_POWER_EN0);
 		power_en1 = pmic_reg_read(dev, RK817_POWER_EN1);
 		power_en2 = pmic_reg_read(dev, RK817_POWER_EN2);
diff --git a/include/power/rk8xx_pmic.h b/include/power/rk8xx_pmic.h
index 87bb555817..b76bd9420e 100644
--- a/include/power/rk8xx_pmic.h
+++ b/include/power/rk8xx_pmic.h
@@ -283,6 +283,7 @@ struct rk8xx_priv {
 	int lp_off_time;
 	int lp_action;
 	uint8_t sleep_pin;
+	int not_save_power_en;
 };
 
 int rk8xx_spl_configure_buck(struct udevice *pmic, int buck, int uvolt);

commit 8d4402d317e9287e117da58d1573fe9314208dc1
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Feb 22 09:09:15 2021 +0800

    mtd: spinand: Support new devices
    
    XT26G04C
    
    Change-Id: I9004728fc1dfd03a54578fbf344171c4bdc3d69d
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/xtx.c b/drivers/mtd/nand/spi/xtx.c
index 51c82995ed..2ef72ce1a9 100644
--- a/drivers/mtd/nand/spi/xtx.c
+++ b/drivers/mtd/nand/spi/xtx.c
@@ -231,6 +231,15 @@ static const struct spinand_info xtx_spinand_table[] = {
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&xt26g01b_ooblayout,
 				     xt26g01c_ecc_get_status)),
+	SPINAND_INFO("XT26G04C", 0x13,
+		     NAND_MEMORG(1, 4096, 128, 64, 2048, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&xt26g01b_ooblayout,
+				     xt26g01c_ecc_get_status)),
 };
 
 static int xtx_spinand_detect(struct spinand_device *spinand)

commit 7bdd0eb6694f45a4f11d9b648ee04aa5f2dc139a
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Sun Feb 21 16:48:29 2021 +0800

    drm/rockchip: vop2: only port0 support RGB 10BIT output
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: I51c5a25705d2cf7ecd05f9ae5e82b98f4536a698

diff --git a/drivers/video/drm/rockchip_vop2.c b/drivers/video/drm/rockchip_vop2.c
index 10b39be39e..bf808b05c8 100644
--- a/drivers/video/drm/rockchip_vop2.c
+++ b/drivers/video/drm/rockchip_vop2.c
@@ -982,6 +982,9 @@ static int rockchip_vop2_init(struct display_state *state)
 				IF_CRTL_HDMI_PIN_POL_SHIT, val, false);
 	}
 
+	if (conn_state->output_mode == ROCKCHIP_OUT_MODE_AAAA && cstate->crtc_id != 0)
+		conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
+
 	if (is_uv_swap(conn_state->bus_format, conn_state->output_mode))
 		vop2_mask_write(vop2, RK3568_VP0_DSP_CTRL + vp_offset,
 				DATA_SWAP_MASK, DATA_SWAP_SHIFT, DSP_RB_SWAP,

commit 10bd57236c4857823552585754d5a4ce3c8327d6
Author: Guochun Huang <hero.huang@rock-chips.com>
Date:   Sun Feb 21 15:30:40 2021 +0800

    video/drm: display: add support swap two channel data of MIPI
    
    Change-Id: I44630143c7d59a0a7deff4d7b9ee690b621d1a0f
    Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>

diff --git a/drivers/video/drm/dw_mipi_dsi.c b/drivers/video/drm/dw_mipi_dsi.c
index adb6be1e63..29a6e24344 100644
--- a/drivers/video/drm/dw_mipi_dsi.c
+++ b/drivers/video/drm/dw_mipi_dsi.c
@@ -245,6 +245,7 @@ struct dw_mipi_dsi {
 	u32 mode_flags;
 	struct mipi_dphy dphy;
 	struct drm_display_mode mode;
+	bool data_swap;
 
 	const struct dw_mipi_dsi_plat_data *pdata;
 };
@@ -1140,6 +1141,9 @@ static int dw_mipi_dsi_connector_init(struct display_state *state)
 		dsi->slave->channel = dsi->channel;
 		conn_state->output_flags =
 				ROCKCHIP_OUTPUT_DUAL_CHANNEL_LEFT_RIGHT_MODE;
+		if (dsi->data_swap)
+			conn_state->output_flags |= ROCKCHIP_OUTPUT_DATA_SWAP;
+
 		conn_state->output_if |= VOP_OUTPUT_IF_MIPI1;
 
 #if defined(CONFIG_ROCKCHIP_RK3568)
@@ -1338,6 +1342,7 @@ static int dw_mipi_dsi_probe(struct udevice *dev)
 	dsi->dev = dev;
 	dsi->pdata = pdata;
 	dsi->id = id;
+	dsi->data_swap = dev_read_bool(dsi->dev, "rockchip,data-swap");
 
 	return 0;
 }

commit 30567cf7224af1e5de827269be0605305ffd983e
Author: Liang Chen <cl@rock-chips.com>
Date:   Sun Feb 21 16:02:01 2021 +0800

    rockchip: fix compile error for cpu.h
    
    Fixes: 39293fce26 (rockchip: add soc id and version for rk356x)
    
    Change-Id: I58cbd1611423500785c4924a90041d7b9a1d70a2
    Signed-off-by: Liang Chen <cl@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cpu.h b/arch/arm/include/asm/arch-rockchip/cpu.h
index 49cb8528ca..e73819d8d6 100644
--- a/arch/arm/include/asm/arch-rockchip/cpu.h
+++ b/arch/arm/include/asm/arch-rockchip/cpu.h
@@ -8,6 +8,7 @@
 #define __ASM_ARCH_CPU_H
 
 #include <asm/io.h>
+#include <dm/device.h>
 
 #define ROCKCHIP_CPU_MASK       0xffff0000
 #define ROCKCHIP_CPU_RK312X     0x31260000

commit 94aae7c79d2223269020ff9908498bddceb56ef8
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Feb 17 16:04:28 2021 +0800

    configs: rv1126-emmc-tb: support low power detect in spl
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I207c15a009cbc53292482d663507887cf3d0a5a1

diff --git a/configs/rv1126-emmc-tb.config b/configs/rv1126-emmc-tb.config
index 3784940a80..967d78e0b8 100644
--- a/configs/rv1126-emmc-tb.config
+++ b/configs/rv1126-emmc-tb.config
@@ -4,8 +4,8 @@ CONFIG_BASE_DEFCONFIG="rv1126_defconfig"
 # CONFIG_CMD_SF is not set
 # CONFIG_CMD_SPI is not set
 CONFIG_LOADER_INI="RV1126MINIALL_EMMC_TB.ini"
-# CONFIG_MTD is not set
 # CONFIG_MTD_DEVICE is not set
+# CONFIG_MTD is not set
 # CONFIG_MTD_NAND_BBT_USING_FLASH is not set
 # CONFIG_NAND is not set
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
@@ -14,15 +14,21 @@ CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-cl
 # CONFIG_SPI_FLASH is not set
 # CONFIG_SPI_MEM is not set
 # CONFIG_SPL_AB is not set
+CONFIG_SPL_ADC_KEY=y
 CONFIG_SPL_ADC_SUPPORT=y
 CONFIG_SPL_BLK_READ_PREPARE=y
+# CONFIG_SPL_CROS_EC_KEYB is not set
+CONFIG_SPL_DM_FUEL_GAUGE=y
+CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_INPUT=y
 CONFIG_SPL_KERNEL_BOOT=y
 # CONFIG_SPL_MTD_SUPPORT is not set
 # CONFIG_SPL_NAND_SUPPORT is not set
 # CONFIG_SPL_PINCTRL is not set
+# CONFIG_SPL_POWER_FG_CW201X is not set
+CONFIG_SPL_POWER_FG_RK817=y
+# CONFIG_SPL_POWER_FG_RK818 is not set
+CONFIG_SPL_POWER_LOW_VOLTAGE_THRESHOLD=3400
 # CONFIG_SPL_SPI_FLASH_SUPPORT is not set
 # CONFIG_SPL_SPI_SUPPORT is not set
 CONFIG_TRUST_INI="RV1126TOS_TB.ini"
-CONFIG_SPL_ADC_KEY=y
-# CONFIG_SPL_CROS_EC_KEYB is not set

commit a9f6f74ccb5d6f0733ff18ba9dc268990b643925
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Sep 28 11:28:22 2020 +0800

    rockchip: dts: rv1126: add i2c0 node
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: If2a15112290831d34f8445325329537e2697c866

diff --git a/arch/arm/dts/rv1126-u-boot.dtsi b/arch/arm/dts/rv1126-u-boot.dtsi
index c49fe2a010..1529473146 100644
--- a/arch/arm/dts/rv1126-u-boot.dtsi
+++ b/arch/arm/dts/rv1126-u-boot.dtsi
@@ -151,6 +151,18 @@
 	status = "okay";
 };
 
+&i2c0 {
+	u-boot,dm-spl;
+	status = "okay";
+	rk817_fg@20 {
+		u-boot,dm-spl;
+		compatible = "rk817,battery";
+		reg = <0x20>;
+		bat_res_up = <140>;
+		bat_res_down = <20>;
+	};
+};
+
 &u2phy0 {
 	u-boot,dm-pre-reloc;
 	status = "okay";

commit a0c4f82828141bf38bb2c64dd6c7c0bbc14263ae
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Sep 28 11:26:52 2020 +0800

    rockchip: rv1126: init the i2c0 iomux
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I0d9854f3d22eaa42fb3a196cc58d429339532f1e

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126.c b/arch/arm/mach-rockchip/rv1126/rv1126.c
index c7ba5b63fe..1189042b82 100644
--- a/arch/arm/mach-rockchip/rv1126/rv1126.c
+++ b/arch/arm/mach-rockchip/rv1126/rv1126.c
@@ -102,6 +102,9 @@ DECLARE_GLOBAL_DATA_PTR;
 #define OTP_S_BASE		0xFF5D0000
 #define OTP_NVM_TRWH		0x28
 
+#define PMU_GRF_BASE		0xFE020000
+#define PMUGRF_GPIO0B_IOMUX_H	0xc
+
 enum {
 	GPIO1A7_SHIFT		= 12,
 	GPIO1A7_MASK		= GENMASK(14, 12),
@@ -672,6 +675,14 @@ int arch_cpu_init(void)
 	/* enable dynamic priority */
 	writel(0x1, ISP_PRIORITY_EX_REG);
 
+	/*
+	 * Init the i2c0 iomux and use it to control electronic voltmeter
+	 * to detect voltage.
+	 */
+#if defined(CONFIG_SPL_KERNEL_BOOT) && defined(CONFIG_SPL_DM_FUEL_GAUGE)
+	writel(0x00770011, PMU_GRF_BASE + PMUGRF_GPIO0B_IOMUX_H);
+#endif
+
 #elif defined(CONFIG_SUPPORT_USBPLUG)
 	/* Just set region 0 to unsecure */
 	writel(0, FIREWALL_APB_BASE + FW_DDR_CON_REG);

commit c90ee5c73d23d53f54841f141e1155b83b4e5f56
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Sep 28 14:52:00 2020 +0800

    rockchip: spl: support low power detect
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ibcb5996369348d31248596dcdb5018ad6526786e

diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index 0e92ee5da2..44bff8e0a6 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -14,6 +14,7 @@
 #include <ram.h>
 #include <spl.h>
 #include <optee_include/OpteeClientInterface.h>
+#include <power/fuel_gauge.h>
 #include <asm/arch/bootrom.h>
 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
 #include <asm/arch/rk_atags.h>
@@ -316,6 +317,26 @@ static int spl_rockchip_dnl_key_pressed(void)
 #endif
 }
 
+#ifdef CONFIG_SPL_DM_FUEL_GAUGE
+bool spl_is_low_power(void)
+{
+	struct udevice *dev;
+	int ret, voltage;
+
+	ret = uclass_get_device(UCLASS_FG, 0, &dev);
+	if (ret) {
+		debug("Get charge display failed, ret=%d\n", ret);
+		return false;
+	}
+
+	voltage = fuel_gauge_get_voltage(dev);
+	if (voltage >= CONFIG_SPL_POWER_LOW_VOLTAGE_THRESHOLD)
+		return false;
+
+	return true;
+}
+#endif
+
 void spl_next_stage(struct spl_image_info *spl)
 {
 	uint32_t reg_boot_mode;
@@ -324,6 +345,12 @@ void spl_next_stage(struct spl_image_info *spl)
 		spl->next_stage = SPL_NEXT_STAGE_UBOOT;
 		return;
 	}
+#ifdef CONFIG_SPL_DM_FUEL_GAUGE
+	if (spl_is_low_power()) {
+		spl->next_stage = SPL_NEXT_STAGE_UBOOT;
+		return;
+	}
+#endif
 
 	reg_boot_mode = readl((void *)CONFIG_ROCKCHIP_BOOT_MODE_REG);
 	switch (reg_boot_mode) {
diff --git a/drivers/power/fuel_gauge/Kconfig b/drivers/power/fuel_gauge/Kconfig
index 2ff2448082..2485ffe879 100644
--- a/drivers/power/fuel_gauge/Kconfig
+++ b/drivers/power/fuel_gauge/Kconfig
@@ -57,3 +57,13 @@ config SPL_POWER_FG_RK816
 	depends on DM_FUEL_GAUGE && PMIC_RK8XX
 	help
 	  This adds support for RK816 fuel gauge support.
+
+config SPL_POWER_LOW_VOLTAGE_THRESHOLD
+	int "Set the low voltage threshold"
+	default 3400
+	depends on SPL_DM_FUEL_GAUGE
+	help
+	  Set the low voltage threshold. If the voltage, which is detected,
+	  is lower than the low voltage threshold, load and boot the U-Boot
+	  and goto charge the power.
+
diff --git a/drivers/power/fuel_gauge/Makefile b/drivers/power/fuel_gauge/Makefile
index a5fe837edd..5aa110a8ec 100644
--- a/drivers/power/fuel_gauge/Makefile
+++ b/drivers/power/fuel_gauge/Makefile
@@ -5,7 +5,7 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
 
-obj-$(CONFIG_DM_FUEL_GAUGE) += fuel_gauge_uclass.o
+obj-$(CONFIG_$(SPL_)DM_FUEL_GAUGE) += fuel_gauge_uclass.o
 
 obj-$(CONFIG_POWER_FG_CW201X) += fg_cw201x.o
 obj-$(CONFIG_POWER_FG_MAX17042) += fg_max17042.o

commit c056ffb327284e13dc390afee8f00f947d72e906
Author: shengfei Xu <xsf@rock-chips.com>
Date:   Sun Apr 26 17:11:29 2020 +0800

    fuel gauge: rk817/rk809: add for spl
    
    Signed-off-by: shengfei Xu <xsf@rock-chips.com>
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I700d796d2b506c7defad416feba1074de185441c

diff --git a/drivers/power/fuel_gauge/Makefile b/drivers/power/fuel_gauge/Makefile
index 9f9f8912ee..a5fe837edd 100644
--- a/drivers/power/fuel_gauge/Makefile
+++ b/drivers/power/fuel_gauge/Makefile
@@ -10,5 +10,10 @@ obj-$(CONFIG_DM_FUEL_GAUGE) += fuel_gauge_uclass.o
 obj-$(CONFIG_POWER_FG_CW201X) += fg_cw201x.o
 obj-$(CONFIG_POWER_FG_MAX17042) += fg_max17042.o
 obj-$(CONFIG_POWER_FG_RK818) += fg_rk818.o
-obj-$(CONFIG_POWER_FG_RK817) += fg_rk817.o
 obj-$(CONFIG_POWER_FG_RK816) += fg_rk816.o
+
+ifdef CONFIG_SPL_BUILD
+obj-$(CONFIG_SPL_POWER_FG_RK817) += spl_fg_rk817.o
+else
+obj-$(CONFIG_POWER_FG_RK817) += fg_rk817.o
+endif
diff --git a/drivers/power/fuel_gauge/spl_fg_rk817.c b/drivers/power/fuel_gauge/spl_fg_rk817.c
new file mode 100644
index 0000000000..0d5b119ca4
--- /dev/null
+++ b/drivers/power/fuel_gauge/spl_fg_rk817.c
@@ -0,0 +1,173 @@
+// SPDX-License-Identifier:     GPL-2.0+
+/*
+ * (C) Copyright 2020 Rockchip Electronics Co., Ltd
+ *
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <i2c.h>
+#include <power/fuel_gauge.h>
+
+#define DIV(div)		((div) ? (div) : 1)
+#define BAT_VOL_H		0x0078
+#define BAT_VOL_L		0x0079
+#define VCALIB0_H		0x0093
+#define VCALIB0_L		0x0094
+#define VCALIB1_H		0x0095
+#define VCALIB1_L		0x0096
+#define GG_CON			0x0056
+#define VIRTUAL_POWER_VOL	3600
+#define INSTANT_MODE		0x02
+
+struct rk817_battery_device {
+	struct udevice *dev;
+	int voltage_k;
+	int voltage_b;
+	u32 virtual_power;
+	u32 bat_res_up;
+	u32 bat_res_down;
+};
+
+static u8 rk817_bat_read(struct rk817_battery_device *battery, u8 reg)
+{
+	int ret;
+	u8 buf;
+
+	ret = dm_i2c_read(battery->dev, reg, &buf, 1);
+	if (ret) {
+		printf("%s: read reg 0x%02x failed, ret=%d\n",
+		       __func__, reg, ret);
+		return ret;
+	}
+
+	return buf;
+}
+
+static int rk817_bat_write(struct rk817_battery_device *battery,
+			    u8 reg, u8 buf)
+{
+	int ret;
+
+	ret = dm_i2c_write(battery->dev, reg, &buf, 1);
+	if (ret) {
+		printf("%s: write reg 0x%02x failed, ret=%d\n",
+		       __func__, reg, ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int rk817_bat_get_vaclib0(struct rk817_battery_device *battery)
+{
+	int val = 0;
+
+	val |= rk817_bat_read(battery, VCALIB0_L) << 0;
+	val |= rk817_bat_read(battery, VCALIB0_H) << 8;
+
+	return val;
+}
+
+static int rk817_bat_get_vaclib1(struct rk817_battery_device *battery)
+{
+	int val = 0;
+
+	val |= rk817_bat_read(battery, VCALIB1_L) << 0;
+	val |= rk817_bat_read(battery, VCALIB1_H) << 8;
+
+	return val;
+}
+
+static void rk817_bat_init_voltage_kb(struct rk817_battery_device *battery)
+{
+	int vcalib0, vcalib1;
+
+	vcalib0 = rk817_bat_get_vaclib0(battery);
+	vcalib1 = rk817_bat_get_vaclib1(battery);
+
+	battery->voltage_k = (1050 - 600) * 1000 / DIV(vcalib1 - vcalib0);
+	battery->voltage_b = 1050 - (battery->voltage_k * vcalib1) / 1000;
+}
+
+static int rk817_bat_get_battery_voltage(struct rk817_battery_device *battery)
+{
+	int vol, val = 0;
+
+	val |= rk817_bat_read(battery, BAT_VOL_L) << 0;
+	val |= rk817_bat_read(battery, BAT_VOL_H) << 8;
+	vol = battery->voltage_k * val / 1000 + battery->voltage_b;
+
+	return (vol * battery->bat_res_up / battery->bat_res_down + vol);
+}
+
+static int rk817_bat_update_get_voltage(struct udevice *dev)
+{
+	struct rk817_battery_device *battery = dev_get_priv(dev);
+
+	if (!battery->virtual_power && battery->voltage_k)
+		return rk817_bat_get_battery_voltage(battery);
+	else
+		return VIRTUAL_POWER_VOL;
+}
+
+static struct dm_fuel_gauge_ops fg_ops = {
+	.get_voltage = rk817_bat_update_get_voltage,
+};
+
+static int rk817_fg_ofdata_to_platdata(struct udevice *dev)
+{
+	struct rk817_battery_device *battery = dev_get_priv(dev);
+
+	battery->dev = dev;
+	battery->bat_res_up = dev_read_u32_default(dev, "bat_res_up", -1);
+	if (battery->bat_res_up < 0) {
+		printf("can't read bat_res_up\n");
+		return -EINVAL;
+	}
+
+	battery->bat_res_down = dev_read_u32_default(dev, "bat_res_down", -1);
+	if (battery->bat_res_down < 0) {
+		printf("can't read bat_res_down\n");
+		return -EINVAL;
+	}
+
+	battery->virtual_power = dev_read_u32_default(dev, "virtual_power", -1);
+
+	return 0;
+}
+
+static int rk817_fg_init(struct rk817_battery_device *battery)
+{
+	u8 val;
+
+	val = rk817_bat_read(battery, GG_CON);
+	if (!(val & INSTANT_MODE)) {
+		val |= INSTANT_MODE;
+		rk817_bat_write(battery, GG_CON, val);
+	}
+
+	rk817_bat_init_voltage_kb(battery);
+
+	return 0;
+}
+
+static int rk817_fg_probe(struct udevice *dev)
+{
+	return rk817_fg_init(dev_get_priv(dev));
+}
+
+static const struct udevice_id rk817_battery_ids[] = {
+	{ .compatible = "rk817,battery" },
+	{ }
+};
+
+U_BOOT_DRIVER(rk817_fg) = {
+	.name = "rk817_fg",
+	.id = UCLASS_FG,
+	.of_match = rk817_battery_ids,
+	.probe = rk817_fg_probe,
+	.ops = &fg_ops,
+	.ofdata_to_platdata = rk817_fg_ofdata_to_platdata,
+	.priv_auto_alloc_size = sizeof(struct rk817_battery_device),
+};

commit dd3fa9997d0a42d28e5fd28e1e71757638742615
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 29 17:22:22 2020 +0800

    drivers: Makefile: use more strict name to add modules
    
    Allow modules to be omitted from CONFIG_SPL_POWER_SUPPORT.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Iaa3291d8bfc99c24ac01897fccb9ea7d6677927d

diff --git a/drivers/Makefile b/drivers/Makefile
index 53be94849b..cccc60a049 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -31,9 +31,10 @@ obj-$(CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT) += ddr/fsl/
 obj-$(CONFIG_ARMADA_38X) += ddr/marvell/a38x/
 obj-$(CONFIG_ARMADA_XP) += ddr/marvell/axp/
 obj-$(CONFIG_ALTERA_SDRAM) += ddr/altera/
-obj-$(CONFIG_SPL_POWER_SUPPORT) += power/ power/pmic/
-obj-$(CONFIG_SPL_POWER_SUPPORT) += power/regulator/
-obj-$(CONFIG_SPL_POWER_SUPPORT) += power/fuel_gauge/
+obj-$(CONFIG_SPL_POWER_SUPPORT) += power/
+obj-$(CONFIG_SPL_DM_PMIC) += power/pmic/
+obj-$(CONFIG_SPL_DM_REGULATOR) += power/regulator/
+obj-$(CONFIG_SPL_DM_FUEL_GAUGE) += power/fuel_gauge/
 obj-$(CONFIG_SPL_PWM_SUPPORT) += pwm/
 obj-$(CONFIG_SPL_MTD_SUPPORT) += mtd/
 obj-$(CONFIG_SPL_ONENAND_SUPPORT) += mtd/onenand/

commit 89c126aeb5c6e7716cd364b008f66d2358a6e0ca
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Sep 30 16:34:55 2020 +0800

    configs: phycore-rk3288: add SPL pmic and regulator
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I3ece9c6d5e11c63e7888bfc64146e710eee96449

diff --git a/configs/phycore-rk3288_defconfig b/configs/phycore-rk3288_defconfig
index b2bdaa16ca..f5b8a6c420 100644
--- a/configs/phycore-rk3288_defconfig
+++ b/configs/phycore-rk3288_defconfig
@@ -3,7 +3,6 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3288=y
 CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
-CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_TARGET_PHYCORE_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-phycore-rdk"
@@ -57,7 +56,9 @@ CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_DM_PMIC=y
+CONFIG_SPL_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
+CONFIG_SPL_DM_REGULATOR=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y

commit 743acd001ab45679fe46d6b8004475ad07f21b1f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Sep 30 16:34:04 2020 +0800

    power: pmic: add config SPL_DM_PMIC
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I43251c3802d7f3284b64ff9da728741d8d587255

diff --git a/drivers/power/pmic/Kconfig b/drivers/power/pmic/Kconfig
index e3f9e4dfc0..f1a46f3ae2 100644
--- a/drivers/power/pmic/Kconfig
+++ b/drivers/power/pmic/Kconfig
@@ -10,6 +10,18 @@ config DM_PMIC
 	- 'drivers/power/pmic/pmic-uclass.c'
 	- 'include/power/pmic.h'
 
+config SPL_DM_PMIC
+        bool "Enable Driver Model for PMIC drivers (UCLASS_PMIC) in SPL"
+        depends on DM && SPL
+        ---help---
+        This config enables the driver-model PMIC support.
+        UCLASS_PMIC - designed to provide an I/O interface for PMIC devices.
+        For the multi-function PMIC devices, this can be used as parent I/O
+        device for each IC's interface. Then, each children uses its parent
+        for read/write. For detailed description, please refer to the files:
+        - 'drivers/power/pmic/pmic-uclass.c'
+        - 'include/power/pmic.h'
+
 config PMIC_CHILDREN
 	bool "Allow child devices for PMICs"
 	depends on DM_PMIC

commit 2b2e3d7041094469daa9c3e2b9b1a3b84cb2ffd8
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Thu Feb 18 15:22:32 2021 +0800

    drm/rockchip: vop2: add support rk3566
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: Iab0e2f626a0a6ce765bf584a7b815268a338cb85

diff --git a/drivers/video/drm/rockchip_vop2.c b/drivers/video/drm/rockchip_vop2.c
index 0e88e2144b..10b39be39e 100644
--- a/drivers/video/drm/rockchip_vop2.c
+++ b/drivers/video/drm/rockchip_vop2.c
@@ -689,10 +689,15 @@ static void vop2_post_config(struct display_state *state, struct vop2 *vop2)
 			conn_state->overscan.bottom_margin) / 200;
 	u16 hact_end, vact_end;
 	u32 val;
-	u16 nr_mixers = 5, used_layer = 2, pre_scan_max_dly = 40;
+	u16 nr_mixers = 5, used_layer = 2, pre_scan_max_dly;
 	u32 bg_ovl_dly, bg_dly, pre_scan_dly;
 	u16 hsync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
 
+	if (cstate->crtc_id == 0)
+		pre_scan_max_dly = 69;
+	else
+		pre_scan_max_dly = 40;
+
 	if (mode->flags & DRM_MODE_FLAG_INTERLACE)
 		vsize = round_down(vsize, 2);
 
@@ -1142,12 +1147,12 @@ static void vop2_setup_win_for_vp(struct display_state *state)
 			used_layers, false);
 
 	if (port_id == 0) {
-		vop2_writel(vop2, 0x604, 0x54760312);
-		vop2_writel(vop2, 0x608, 0x84000781);
-		vop2_writel(vop2, 0x6e0, 0x22000000);
+		vop2_writel(vop2, 0x604, 0x54760123);
+		vop2_writel(vop2, 0x608, 0x00000755);
+		vop2_writel(vop2, 0x6e0, 0x2a000000);
 	} else {
-		vop2_writel(vop2, 0x604, 0x54720316);
-		vop2_writel(vop2, 0x608, 0x84000708);
+		vop2_writel(vop2, 0x604, 0x54760312);
+		vop2_writel(vop2, 0x608, 0x55050728);
 		vop2_writel(vop2, 0x6e4, 0x1e000000);
 	}
 }
@@ -1168,9 +1173,14 @@ static int rockchip_vop2_set_plane(struct display_state *state)
 	int xvir = cstate->xvir;
 	int y_mirror = 0;
 	int csc_mode;
-	u32 win_offset = cstate->crtc_id * 0x200;
+	u32 win_offset;
 	u32 cfg_done = CFG_DONE_EN | BIT(cstate->crtc_id);
 
+	if (cstate->crtc_id == 1)
+		win_offset = 0x400; /* port 1 use smart0*/
+	else
+		win_offset = 0; /* port 0 use esmart0*/
+
 	if (crtc_w > cstate->max_output.width) {
 		printf("ERROR: output w[%d] exceeded max width[%d]\n",
 		       crtc_w, cstate->max_output.width);

commit 39293fce268dcee0b3a651e085a14907f342ccea
Author: Liang Chen <cl@rock-chips.com>
Date:   Sun Feb 21 14:59:42 2021 +0800

    rockchip: add soc id and version for rk356x
    
    Change-Id: Ib1efa652f2b759cfdd85405b89bd1d1838308ddd
    Signed-off-by: Liang Chen <cl@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cpu.h b/arch/arm/include/asm/arch-rockchip/cpu.h
index 110c4addfd..49cb8528ca 100644
--- a/arch/arm/include/asm/arch-rockchip/cpu.h
+++ b/arch/arm/include/asm/arch-rockchip/cpu.h
@@ -13,6 +13,8 @@
 #define ROCKCHIP_CPU_RK312X     0x31260000
 #define ROCKCHIP_CPU_RK3288     0x32880000
 #define ROCKCHIP_CPU_RK3308	0x33080000
+#define ROCKCHIP_CPU_RK3566	0x35660000
+#define ROCKCHIP_CPU_RK3568	0x35680000
 
 #define ROCKCHIP_SOC_MASK	(ROCKCHIP_CPU_MASK | 0xff)
 #define ROCKCHIP_SOC_RK3126     (ROCKCHIP_CPU_RK312X | 0x00)
@@ -23,6 +25,21 @@
 #define ROCKCHIP_SOC_RK3288W    (ROCKCHIP_CPU_RK3288 | 0x01)
 #define ROCKCHIP_SOC_RK3308	(ROCKCHIP_CPU_RK3308 | 0x00)
 #define ROCKCHIP_SOC_RK3308B	(ROCKCHIP_CPU_RK3308 | 0x01)
+#define ROCKCHIP_SOC_RK3566	(ROCKCHIP_CPU_RK3566 | 0x00)
+#define ROCKCHIP_SOC_RK3568	(ROCKCHIP_CPU_RK3568 | 0x00)
+
+static inline unsigned long rockchip_get_cpu_version(void)
+{
+#if defined(CONFIG_ROCKCHIP_RK3568)
+#define PMUGRF_SOC_CON15	0xfdc20100
+	if (readl(PMUGRF_SOC_CON15) & GENMASK(15, 14))
+		return 1;
+	else
+		return 0;
+#else
+	return 0;
+#endif
+}
 
 static inline int rockchip_soc_id(void)
 {
@@ -43,6 +60,11 @@ static inline int rockchip_soc_id(void)
 		return ROCKCHIP_SOC_RK3308;
 	else
 		return ROCKCHIP_SOC_RK3308B;
+#elif defined(CONFIG_ROCKCHIP_RK3568)
+	if (of_machine_is_compatible("rockchip,rk3566"))
+		return ROCKCHIP_SOC_RK3566;
+	else
+		return ROCKCHIP_SOC_RK3568;
 #else
 	return 0;
 #endif
@@ -65,5 +87,7 @@ ROCKCHIP_SOC(rk3288, RK3288)
 ROCKCHIP_SOC(rk3288w, RK3288W)
 ROCKCHIP_SOC(rk3308, RK3308)
 ROCKCHIP_SOC(rk3308b, RK3308B)
+ROCKCHIP_SOC(rk3566, RK3566)
+ROCKCHIP_SOC(rk3568, RK3568)
 
 #endif

commit b014c5e23fb9cc035b861c640153ae35a37a4866
Author: Guochun Huang <hero.huang@rock-chips.com>
Date:   Thu Feb 18 11:31:33 2021 +0800

    video/drm: display: rk356x series drive mipi pixdata on posedge
    
    Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
    Change-Id: I4494ca32618be93aa53907800ce08780f966e137

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 865b89da83..11bf7209cb 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -527,6 +527,7 @@ static int display_init(struct display_state *state)
 	struct rockchip_crtc *crtc = crtc_state->crtc;
 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
 	struct drm_display_mode *mode = &conn_state->mode;
+	const char *compatible;
 	int ret = 0;
 	static bool __print_once = false;
 #if defined(CONFIG_I2C_EDID)
@@ -654,6 +655,11 @@ static int display_init(struct display_state *state)
 	if (ret)
 		goto deinit;
 
+	/* rk356x series drive mipi pixdata on posedge */
+	compatible = dev_read_string(conn_state->dev, "compatible");
+	if (!strcmp(compatible, "rockchip,rk3568-mipi-dsi"))
+		conn_state->mode.flags |= DRM_MODE_FLAG_PPIXDATA;
+
 	printf("Detailed mode clock %u kHz, flags[%x]\n"
 	       "    H: %04d %04d %04d %04d\n"
 	       "    V: %04d %04d %04d %04d\n"

commit fc04460b2eee00337e8769b6fb8688a91208c00a
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Feb 8 16:45:47 2021 +0800

    common: android: support boot recovery system
    
    In android A/B system, there is no recovery partition, but in the linux
    system, we need the recovery to update system.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Idac88720b260791b1ad4c51a5ebc7aae9c66ca67

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index d173f906db..a87bbc5b2c 100644
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -5,6 +5,7 @@
  */
 #include <common.h>
 #include <adc.h>
+#include <android_ab.h>
 #include <android_bootloader.h>
 #include <android_image.h>
 #include <boot_rkimg.h>
@@ -416,13 +417,18 @@ static int get_resource_base_sector(struct blk_desc *dev_desc,
 #ifdef CONFIG_ANDROID_BOOT_IMAGE
 	struct andr_img_hdr *hdr;
 	u32 os_ver = 0, os_lvl;
+	const char *part_boot = PART_BOOT;
 
 	/*
-	 * Anyway, we must read android hdr firstly from boot partition to get
-	 * the 'os_version' for android_bcb_msg_sector_offset(), in order to
-	 * confirm BCB message offset of *MISC* partition.
+	 * Anyway, we must read android hdr firstly from boot/recovery partition
+	 * to get the 'os_version' for android_bcb_msg_sector_offset(), in order
+	 * to confirm BCB message offset of *MISC* partition.
 	 */
-	if (part_get_info_by_name(dev_desc, PART_BOOT, &part) < 0)
+#ifdef CONFIG_ANDROID_AB
+	part_boot = ab_can_find_recovery_part() ? PART_RECOVERY : PART_BOOT;
+#endif
+
+	if (part_get_info_by_name(dev_desc, part_boot, &part) < 0)
 		goto resource_part;
 
 	hdr = populate_andr_img_hdr(dev_desc, &part);
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 1ef2925843..33ee2281c0 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -795,23 +795,27 @@ int android_fdt_overlay_apply(void *fdt_addr)
 {
 	struct andr_img_hdr *hdr;
 	struct blk_desc *dev_desc;
-	const char *part_boot;
+	const char *part_boot = PART_BOOT;
 	disk_partition_t part_info;
 	char *fdt_backup;
-	char *part_dtbo;
+	char *part_dtbo = PART_DTBO;
 	char buf[32] = {0};
 	ulong fdt_dtbo = -1;
 	u32 totalsize;
 	int index = -1;
 	int ret;
 
-	if (IS_ENABLED(CONFIG_ANDROID_AB) ||
-	    (rockchip_get_boot_mode() != BOOT_MODE_RECOVERY)) {
-		part_boot = PART_BOOT;
-		part_dtbo = PART_DTBO;
-	} else {
+	if (rockchip_get_boot_mode() == BOOT_MODE_RECOVERY) {
+#ifdef CONFIG_ANDROID_AB
+		bool can_find_recovery;
+
+		can_find_recovery = ab_can_find_recovery_part();
+		part_boot = can_find_recovery ? PART_RECOVERY : PART_BOOT;
+		part_dtbo = can_find_recovery ? PART_RECOVERY : PART_DTBO;
+#else
 		part_boot = PART_RECOVERY;
 		part_dtbo = PART_RECOVERY;
+#endif
 	}
 
 	dev_desc = rockchip_get_bootdev();
@@ -978,10 +982,15 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 #endif
 		break;
 	case ANDROID_BOOT_MODE_RECOVERY:
-		/* In recovery mode we still boot the kernel from "boot" but
-		 * don't skip the initramfs so it boots to recovery.
+		/*
+		 * In recovery mode, if have recovery partition, we still boot the
+		 * kernel from "recovery". If not, don't skip the initramfs so it
+		 * boots to recovery from image in partition "boot".
 		 */
-#ifndef CONFIG_ANDROID_AB
+#ifdef CONFIG_ANDROID_AB
+		boot_partname = ab_can_find_recovery_part() ?
+			ANDROID_PARTITION_RECOVERY : ANDROID_PARTITION_BOOT;
+#else
 		boot_partname = ANDROID_PARTITION_RECOVERY;
 #endif
 		break;

commit 66f2fdd9d85941bd4a3ac90df135883282ce6de3
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Feb 8 16:45:16 2021 +0800

    common: android_ab: add function ab_can_find_recovery_part
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ic8f225699915063b9a2e069a4cb248fd4d5a6976

diff --git a/common/android_ab.c b/common/android_ab.c
index a80dc088eb..2182d3da50 100644
--- a/common/android_ab.c
+++ b/common/android_ab.c
@@ -505,3 +505,29 @@ int ab_decrease_tries(void)
 
 	return 0;
 }
+
+/*
+ * In android A/B system, there is no recovery partition,
+ * but in the linux system, we need the recovery to update system.
+ * This function is used to find firmware in recovery partition
+ * when enable CONFIG_ANDROID_AB.
+ */
+bool ab_can_find_recovery_part(void)
+{
+	disk_partition_t part_info;
+	struct blk_desc *dev_desc;
+	int part_num;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: Could not find device\n", __func__);
+		return false;
+	}
+
+	part_num = part_get_info_by_name(dev_desc, ANDROID_PARTITION_RECOVERY,
+					 &part_info);
+	if (part_num < 0)
+		return false;
+	else
+		return true;
+}
diff --git a/include/android_ab.h b/include/android_ab.h
index 921407b0f2..aa621ca426 100644
--- a/include/android_ab.h
+++ b/include/android_ab.h
@@ -51,5 +51,6 @@ void ab_update_root_uuid(void);
 int ab_get_slot_suffix(char *slot_suffix);
 int ab_is_support_dynamic_partition(struct blk_desc *dev_desc);
 int ab_decrease_tries(void);
+bool ab_can_find_recovery_part(void);
 
 #endif

commit 9876686da075a33673f67693e7e4962659995e39
Author: Wenping Zhang <wenping.zhang@rock-chips.com>
Date:   Mon Feb 8 06:54:06 2021 +0000

    video/rk_eink: add virtual width and height support.
    
    Signed-off-by: Wenping Zhang <wenping.zhang@rock-chips.com>
    Change-Id: I60f026b0aa2ac62b6827675a7e780418d0928386

diff --git a/drivers/video/rk_eink/rk_ebc.h b/drivers/video/rk_eink/rk_ebc.h
index 80c103e249..d3142a82f8 100644
--- a/drivers/video/rk_eink/rk_ebc.h
+++ b/drivers/video/rk_eink/rk_ebc.h
@@ -13,6 +13,8 @@
 struct ebc_panel {
 	u32 width;
 	u32 height;
+	u32 vir_width;
+	u32 vir_height;
 	u32 width_mm;
 	u32 height_mm;
 
diff --git a/drivers/video/rk_eink/rk_ebc_tcon.c b/drivers/video/rk_eink/rk_ebc_tcon.c
index 6f90110358..5824f8ac28 100644
--- a/drivers/video/rk_eink/rk_ebc_tcon.c
+++ b/drivers/video/rk_eink/rk_ebc_tcon.c
@@ -271,8 +271,8 @@ static int ebc_tcon_enable(struct udevice *dev, struct ebc_panel *panel)
 		   DSP_HEIGHT(panel->height) |
 		   DSP_WIDTH(panel->width));
 	tcon_write(tcon, EBC_WIN_VIR,
-		   WIN_VIR_HEIGHT(panel->height) |
-		   WIN_VIR_WIDTH(panel->width));
+		   WIN_VIR_HEIGHT(panel->vir_height) |
+		   WIN_VIR_WIDTH(panel->vir_width));
 	tcon_write(tcon, EBC_WIN_ACT,
 		   WIN_ACT_HEIGHT(panel->height) |
 		   WIN_ACT_WIDTH(panel->width));
diff --git a/drivers/video/rk_eink/rk_eink_display.c b/drivers/video/rk_eink/rk_eink_display.c
index 72ffcf69f5..7a4701a128 100644
--- a/drivers/video/rk_eink/rk_eink_display.c
+++ b/drivers/video/rk_eink/rk_eink_display.c
@@ -158,8 +158,8 @@ static int read_waveform(struct udevice *dev)
 static u32 aligned_image_size_4k(struct udevice *dev)
 {
 	struct ebc_panel *plat = dev_get_platdata(dev);
-	u32 w = plat->width;
-	u32 h = plat->height;
+	u32 w = plat->vir_width;
+	u32 h = plat->vir_height;
 
 	return ALIGN((w * h) >> 1, 4096);
 }
@@ -314,11 +314,11 @@ static int read_needed_logo_from_partition(struct udevice *dev,
 		printf("eink logo read header failed,ret = %d\n", ret);
 		return -EINVAL;
 	}
-	if (part_hdr->screen_width != panel->width ||
-	    part_hdr->screen_height != panel->height){
+	if (part_hdr->screen_width != panel->vir_width ||
+	    part_hdr->screen_height != panel->vir_height){
 		printf("logo size(%dx%d) is not same as screen size(%dx%d)\n",
 		       part_hdr->screen_width, part_hdr->screen_height,
-			panel->width, panel->height);
+			panel->vir_width, panel->vir_height);
 		return -EINVAL;
 	}
 
@@ -508,7 +508,7 @@ static int rockchip_eink_show_logo(int cur_logo_type, int update_mode)
 	 * The last_logo_type is -1 means it's first displaying
 	 */
 	if (last_logo_type == -1) {
-		int size = (plat->width * plat->height) >> 1;
+		int size = (plat->vir_width * plat->vir_height) >> 1;
 
 		logo_addr = get_addr_by_type(dev, EINK_LOGO_RESET);
 		memset((u32 *)(u64)logo_addr, 0xff, size);
@@ -661,6 +661,8 @@ static int rockchip_eink_display_ofdata_to_platdata(struct udevice *dev)
 
 	plat->width = dev_read_u32_default(dev, "panel,width", 0);
 	plat->height = dev_read_u32_default(dev, "panel,height", 0);
+	plat->vir_width = dev_read_u32_default(dev, "panel,vir_width", plat->width);
+	plat->vir_height = dev_read_u32_default(dev, "panel,vir_height", plat->height);
 	plat->sdck = dev_read_u32_default(dev, "panel,sdck", 0);
 	plat->lsl = dev_read_u32_default(dev, "panel,lsl", 0);
 	plat->lbl = dev_read_u32_default(dev, "panel,lbl", 0);

commit 20618a45d94e9c3e7d00317eef0ed33f337c0a17
Author: Guochun Huang <hero.huang@rock-chips.com>
Date:   Sat Feb 20 15:36:13 2021 +0800

    video/drm: display: fix display route for compatibility
    
    Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
    Change-Id: I70e237967d2074d5a341d86f69c2791b5ba183ff

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index dc587e43e0..865b89da83 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -33,6 +33,7 @@
 #include <dm.h>
 #include <dm/of_access.h>
 #include <dm/ofnode.h>
+#include <asm/io.h>
 
 #define DRIVER_VERSION	"v1.0.1"
 
@@ -1316,6 +1317,80 @@ static struct rockchip_phy *rockchip_of_find_phy(struct udevice *dev)
 	return (struct rockchip_phy *)dev_get_driver_data(phy_dev);
 }
 
+#if defined(CONFIG_ROCKCHIP_RK3568)
+static int rockchip_display_fixup_dts(void *blob)
+{
+	ofnode route_node, route_subnode, conn_ep, conn_port;
+	const struct device_node *route_sub_devnode;
+	const struct device_node *ep_node, *conn_ep_dev_node;
+	u32 phandle;
+	int conn_ep_offset;
+	const char *route_sub_path, *path;
+
+	/* Don't go further if new variant after
+	 * reading PMUGRF_SOC_CON15
+	 */
+	if ((readl(0xfdc20100) & GENMASK(15, 14)))
+		return 0;
+
+	route_node = ofnode_path("/display-subsystem/route");
+	if (!ofnode_valid(route_node))
+		return -EINVAL;
+
+	ofnode_for_each_subnode(route_subnode, route_node) {
+		if (!ofnode_is_available(route_subnode))
+			continue;
+
+		route_sub_devnode = ofnode_to_np(route_subnode);
+		route_sub_path = route_sub_devnode->full_name;
+		if (!strstr(ofnode_get_name(route_subnode), "dsi") &&
+		    !strstr(ofnode_get_name(route_subnode), "edp"))
+			return 0;
+
+		phandle = ofnode_read_u32_default(route_subnode, "connect", -1);
+		if (phandle < 0) {
+			printf("Warn: can't find connect node's handle\n");
+			continue;
+		}
+
+		ep_node = of_find_node_by_phandle(phandle);
+		if (!ofnode_valid(np_to_ofnode(ep_node))) {
+			printf("Warn: can't find endpoint node from phandle\n");
+			continue;
+		}
+
+		ofnode_read_u32(np_to_ofnode(ep_node), "remote-endpoint", &phandle);
+		conn_ep = ofnode_get_by_phandle(phandle);
+		if (!ofnode_valid(conn_ep) || !ofnode_is_available(conn_ep))
+			return -ENODEV;
+
+		conn_port = ofnode_get_parent(conn_ep);
+		if (!ofnode_valid(conn_port))
+			return -ENODEV;
+
+		ofnode_for_each_subnode(conn_ep, conn_port) {
+			conn_ep_dev_node = ofnode_to_np(conn_ep);
+			path = conn_ep_dev_node->full_name;
+			ofnode_read_u32(conn_ep, "remote-endpoint", &phandle);
+			conn_ep_offset = fdt_path_offset(blob, path);
+
+			if (!ofnode_is_available(conn_ep) &&
+			    strstr(ofnode_get_name(conn_ep), "endpoint@0")) {
+				do_fixup_by_path_u32(blob, route_sub_path,
+						     "connect", phandle, 1);
+				fdt_status_okay(blob, conn_ep_offset);
+
+			} else if (ofnode_is_available(conn_ep) &&
+				   strstr(ofnode_get_name(conn_ep), "endpoint@1")) {
+				fdt_status_disabled(blob, conn_ep_offset);
+			}
+		}
+	}
+
+	return 0;
+}
+#endif
+
 static int rockchip_display_probe(struct udevice *dev)
 {
 	struct video_priv *uc_priv = dev_get_uclass_priv(dev);
@@ -1336,6 +1411,10 @@ static int rockchip_display_probe(struct udevice *dev)
 	struct public_phy_data *data;
 	bool is_ports_node = false;
 
+#if defined(CONFIG_ROCKCHIP_RK3568)
+	rockchip_display_fixup_dts((void *)blob);
+#endif
+
 	/* Before relocation we don't need to do anything */
 	if (!(gd->flags & GD_FLG_RELOC))
 		return 0;

commit 63f3640c3acbfa3552c34fff3bb7786588a8a901
Author: Guochun Huang <hero.huang@rock-chips.com>
Date:   Sun Feb 21 10:40:39 2021 +0800

    video/drm:: dsi: the max bit rate is 1.2Gbps per lane in rk3568
    
    Change-Id: I7a9c7fe6eeb57a23694761b4a6ad61d05e52dd07
    Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>

diff --git a/drivers/video/drm/dw_mipi_dsi.c b/drivers/video/drm/dw_mipi_dsi.c
index 0ea2ed5255..adb6be1e63 100644
--- a/drivers/video/drm/dw_mipi_dsi.c
+++ b/drivers/video/drm/dw_mipi_dsi.c
@@ -1535,7 +1535,7 @@ static const u32 rk3568_dsi1_grf_reg_fields[MAX_FIELDS] = {
 static const struct dw_mipi_dsi_plat_data rk3568_mipi_dsi_plat_data = {
 	.dsi0_grf_reg_fields = rk3568_dsi0_grf_reg_fields,
 	.dsi1_grf_reg_fields = rk3568_dsi1_grf_reg_fields,
-	.max_bit_rate_per_lane = 1000000000UL,
+	.max_bit_rate_per_lane = 1200000000UL,
 };
 static const struct rockchip_connector rk3568_mipi_dsi_driver_data = {
 	 .funcs = &dw_mipi_dsi_connector_funcs,

commit f19896d177ad79502b6c7eac8e1ece59404c4f94
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Feb 8 11:11:19 2021 +0800

    configs: rockchip: add emmc/nand/sfc fragment for all platforms
    
    We expect they are to be common fragment for different storage,
    maybe there will be more configurations to be add in the future.
    
    Example:
        make rv1126_defconfig rk-emmc.config  // generate .config
        ./make.sh                             // build with exist .config
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ib7bc64aaf16777eba8b64409674f8874a4ee8481

diff --git a/configs/rk-emmc.config b/configs/rk-emmc.config
new file mode 100644
index 0000000000..ece14d47b0
--- /dev/null
+++ b/configs/rk-emmc.config
@@ -0,0 +1 @@
+CONFIG_ROCKCHIP_EMMC_IOMUX=y
diff --git a/configs/rk-nand.config b/configs/rk-nand.config
new file mode 100644
index 0000000000..d31c2030ce
--- /dev/null
+++ b/configs/rk-nand.config
@@ -0,0 +1 @@
+CONFIG_ROCKCHIP_NAND_IOMUX=y
diff --git a/configs/rk-sfc.config b/configs/rk-sfc.config
new file mode 100644
index 0000000000..ce30768a8e
--- /dev/null
+++ b/configs/rk-sfc.config
@@ -0,0 +1 @@
+CONFIG_ROCKCHIP_SFC_IOMUX=y

commit fbdf150e841bb31659609ac124a8a60f2e22dc1d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Feb 8 10:48:28 2021 +0800

    rockchip: rv1126: make #if...#else...#endif more clearly
    
    Add Space indentation before '#'.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I7ded69adb328513b97f2ffb36329d8584cd5d2cd

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126.c b/arch/arm/mach-rockchip/rv1126/rv1126.c
index 78bd7032f1..c7ba5b63fe 100644
--- a/arch/arm/mach-rockchip/rv1126/rv1126.c
+++ b/arch/arm/mach-rockchip/rv1126/rv1126.c
@@ -552,7 +552,7 @@ int arch_cpu_init(void)
 		writel(WDT_RESET_SRC_CLR, PMUGRF_RSTFUNC_CLR);
 	}
 
-#ifdef CONFIG_SPL_BUILD
+  #ifdef CONFIG_SPL_BUILD
 	/* set otp tRWH to 0x9 for stable read */
 	writel(0x9, OTP_NS_BASE + OTP_NVM_TRWH);
 	writel(0x9, OTP_S_BASE + OTP_NVM_TRWH);
@@ -562,7 +562,7 @@ int arch_cpu_init(void)
 	 * (Note: only secure-world can access this register)
 	 */
 	writel(0, FIREWALL_APB_BASE + FW_DDR_CON_REG);
-#endif
+  #endif
 
 	/* disable force jtag mux route to both group0 and group1 */
 	writel(0x00300000, GRF_IOFUNC_CON3);
@@ -578,7 +578,7 @@ int arch_cpu_init(void)
 	writel(0xffffffff, PMU_BASE_ADDR + PMU_NOC_AUTO_CON0);
 	writel(0xffffffff, PMU_BASE_ADDR + PMU_NOC_AUTO_CON1);
 
-#ifdef CONFIG_SPL_KERNEL_BOOT
+  #ifdef CONFIG_SPL_KERNEL_BOOT
 	/* Adjust the parameters of GPLL's VCO for reduce power*/
 	writel(0x00030000, CRU_PMU_BASE);
 	writel(0xffff1063, CRU_PMU_BASE + CRU_PMU_GPLL_CON0);
@@ -601,7 +601,7 @@ int arch_cpu_init(void)
 	writel(0x00ff0045, CRU_BASE + CRU_CLKSEL_CON68);
 	writel(0x00ff0043, CRU_BASE + CRU_CLKSEL_CON69);
 
-#endif
+  #endif
 	/* enable all pd */
 	writel(0xffff0000, PMU_BASE_ADDR + PMU_PWR_GATE_SFTCON);
 	delay = 1000;
@@ -683,33 +683,33 @@ int arch_cpu_init(void)
 
 	/* hold pmugrf's io reset */
 	writel(0x1 << 7 | 1 << 23, PMUGRF_SOC_CON1);
-#else
+
+#else /* U-Boot */
 	/* uboot: config iomux for sd boot upgrade firmware */
-#if defined(CONFIG_ROCKCHIP_SFC_IOMUX)
+  #if defined(CONFIG_ROCKCHIP_SFC_IOMUX)
 	static struct rv1126_grf * const grf = (void *)GRF_BASE;
 
 	writel(0x0F0F0303, &grf->gpio0d_iomux_h);
 	writel(0xFFFF3333, &grf->gpio1a_iomux_l);
-#elif defined(CONFIG_ROCKCHIP_EMMC_IOMUX)
+  #elif defined(CONFIG_ROCKCHIP_EMMC_IOMUX)
 	static struct rv1126_grf * const grf = (void *)GRF_BASE;
 
 	writel(0xFFFF2222, &grf->gpio0c_iomux_h);
 	writel(0xFFFF2222, &grf->gpio0d_iomux_l);
 	writel(0xF0F02020, &grf->gpio0d_iomux_h);
-#elif defined(CONFIG_ROCKCHIP_NAND_IOMUX)
+  #elif defined(CONFIG_ROCKCHIP_NAND_IOMUX)
 	static struct rv1126_grf * const grf = (void *)GRF_BASE;
 
 	writel(0xFFFF1111, &grf->gpio0c_iomux_h);
 	writel(0xFFFF1111, &grf->gpio0d_iomux_l);
 	writel(0xF0FF1011, &grf->gpio0d_iomux_h);
 	writel(0xFFFF1111, &grf->gpio1a_iomux_l);
-#endif
-
-#endif
+  #endif
 
-#if defined(CONFIG_ROCKCHIP_SFC) && (defined(CONFIG_SPL_BUILD) || defined(CONFIG_SUPPORT_USBPLUG))
+  #if defined(CONFIG_ROCKCHIP_SFC) && (defined(CONFIG_SPL_BUILD) || defined(CONFIG_SUPPORT_USBPLUG))
 	/* GPIO0_D6 pull down in default, pull up it for SPI Flash */
 	writel(((0x3 << 12) << 16) | (0x1 << 12), GRF1_GPIO0D_P);
+  #endif
 #endif
 	return 0;
 }

commit bc8c2a6ddbebde0d060345f59d20d5812ec96209
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Feb 8 14:10:47 2021 +0800

    configs: Add rv1126-spl-spi-nand_defconfig
    
    Rename rv1126-spi-nand_defconfig to rv1126-spl-spi-nand_defconfig
    
    Change-Id: I7443d9961be6019e8abb62315feed336aa2d9c0a
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/configs/rv1126-spi-nand_defconfig b/configs/rv1126-spl-spi-nand_defconfig
similarity index 100%
rename from configs/rv1126-spi-nand_defconfig
rename to configs/rv1126-spl-spi-nand_defconfig

commit f757541b5768f1c94bf639a24ab72c09adec7d68
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Feb 8 11:58:23 2021 +0800

    configs: Add rk3568-spl-spi-nand_defconfig
    
    Rename rk3568-spi-nand_defconfig to rk3568-spl-spi-nand_defconfig
    
    Change-Id: I36bc4995b63d4fd267c5b7ab8e4194da2395d3e4
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/configs/rk3568-spi-nand_defconfig b/configs/rk3568-spl-spi-nand_defconfig
old mode 100644
new mode 100755
similarity index 94%
rename from configs/rk3568-spi-nand_defconfig
rename to configs/rk3568-spl-spi-nand_defconfig
index 60d86fa8e6..99801350d9
--- a/configs/rk3568-spi-nand_defconfig
+++ b/configs/rk3568-spl-spi-nand_defconfig
@@ -34,6 +34,7 @@ CONFIG_SPL_BOARD_INIT=y
 CONFIG_SPL_SEPARATE_BSS=y
 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
 CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_MTD_BLK_U_BOOT_OFFS=0x2000
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_FASTBOOT_BUF_ADDR=0xc00800
@@ -103,6 +104,13 @@ CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
 CONFIG_SYS_NAND_U_BOOT_OFFS=0x8000
 CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND=0x10000
 CONFIG_MTD_SPI_NAND=y
+# CONFIG_SPI_NAND_MACRONIX is not set
+# CONFIG_SPI_NAND_TOSHIBA is not set
+# CONFIG_SPI_NAND_WINBOND is not set
+# CONFIG_SPI_NAND_XTX is not set
+# CONFIG_SPI_NAND_HYF is not set
+# CONFIG_SPI_NAND_FMSH is not set
+# CONFIG_SPI_NAND_FORESEE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_SPI_FLASH_WINBOND=y

commit 3ff518af86481f908b65b2cc1b2fb8ea64f3bc08
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Feb 5 14:49:40 2021 +0800

    configs: rk3568: enable non-secure OTP driver
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I3b35e54ce26aacb3c239d228c544dbfcb9fd8112

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index 8693615909..f0fece4127 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -108,6 +108,7 @@ CONFIG_RK8XX_PWRKEY=y
 CONFIG_ADC_KEY=y
 CONFIG_MISC=y
 CONFIG_SPL_MISC=y
+CONFIG_ROCKCHIP_OTP=y
 CONFIG_SPL_ROCKCHIP_SECURE_OTP_V1=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y

commit 5f10b8465d2d4b5fca1dc66410c6295e096272c2
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Sat Feb 6 09:45:32 2021 +0800

    rv1126: add iomux config for sd card boot
    
    When the devices without firmware boot from the SD card,
    the iomux of the storage interface is not configured,
    so the firmware cannot be upgraded to the storage.
    It needs to be configured by uboot.
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: If3f4a0a37e37b2fc9e0f4d7e5869dbf156649505

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 744faa25e4..2b88d67be5 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -806,6 +806,24 @@ config GICV2
 config GICV3
 	bool "ARM GICv3"
 
+config ROCKCHIP_EMMC_IOMUX
+	bool "ROCKCHIP EMMC IOMUX"
+	default n
+	help
+	  This enable U-Boot to config EMMC iomux.
+
+config ROCKCHIP_NAND_IOMUX
+	bool "ROCKCHIP NAND IOMUX"
+	default n
+	help
+	  This enable U-Boot to config NAND iomux.
+
+config ROCKCHIP_SFC_IOMUX
+	bool "ROCKCHIP SFC IOMUX"
+	default n
+	help
+	  This enable U-Boot to config SFC iomux.
+
 source "arch/arm/mach-rockchip/px30/Kconfig"
 source "arch/arm/mach-rockchip/rk3036/Kconfig"
 source "arch/arm/mach-rockchip/rk3066/Kconfig"
diff --git a/arch/arm/mach-rockchip/rv1126/rv1126.c b/arch/arm/mach-rockchip/rv1126/rv1126.c
index 54b7196b6b..78bd7032f1 100644
--- a/arch/arm/mach-rockchip/rv1126/rv1126.c
+++ b/arch/arm/mach-rockchip/rv1126/rv1126.c
@@ -683,6 +683,28 @@ int arch_cpu_init(void)
 
 	/* hold pmugrf's io reset */
 	writel(0x1 << 7 | 1 << 23, PMUGRF_SOC_CON1);
+#else
+	/* uboot: config iomux for sd boot upgrade firmware */
+#if defined(CONFIG_ROCKCHIP_SFC_IOMUX)
+	static struct rv1126_grf * const grf = (void *)GRF_BASE;
+
+	writel(0x0F0F0303, &grf->gpio0d_iomux_h);
+	writel(0xFFFF3333, &grf->gpio1a_iomux_l);
+#elif defined(CONFIG_ROCKCHIP_EMMC_IOMUX)
+	static struct rv1126_grf * const grf = (void *)GRF_BASE;
+
+	writel(0xFFFF2222, &grf->gpio0c_iomux_h);
+	writel(0xFFFF2222, &grf->gpio0d_iomux_l);
+	writel(0xF0F02020, &grf->gpio0d_iomux_h);
+#elif defined(CONFIG_ROCKCHIP_NAND_IOMUX)
+	static struct rv1126_grf * const grf = (void *)GRF_BASE;
+
+	writel(0xFFFF1111, &grf->gpio0c_iomux_h);
+	writel(0xFFFF1111, &grf->gpio0d_iomux_l);
+	writel(0xF0FF1011, &grf->gpio0d_iomux_h);
+	writel(0xFFFF1111, &grf->gpio1a_iomux_l);
+#endif
+
 #endif
 
 #if defined(CONFIG_ROCKCHIP_SFC) && (defined(CONFIG_SPL_BUILD) || defined(CONFIG_SUPPORT_USBPLUG))

commit 1f161166c605a98c1483dd2275ad21b4b0940e77
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Thu Jan 28 17:41:35 2021 +0800

    mtd: spinand: Support GD5F4GQ6UExxG
    
    Change-Id: Ib72399ca0166ec82fdaf900ac51059076c155de3
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/gigadevice.c b/drivers/mtd/nand/spi/gigadevice.c
index 52a3766708..999d137295 100644
--- a/drivers/mtd/nand/spi/gigadevice.c
+++ b/drivers/mtd/nand/spi/gigadevice.c
@@ -176,7 +176,7 @@ static const struct spinand_info gigadevice_spinand_table[] = {
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&gd5fxgq4xexxg_ooblayout,
 				     gd5fxgq5xexxg_ecc_get_status)),
-	SPINAND_INFO("GD5F2GQ4UBExxG", 0xd2,
+	SPINAND_INFO("GD5F2GQ4UBxxG", 0xd2,
 		     NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
 		     NAND_ECCREQ(8, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -185,6 +185,15 @@ static const struct spinand_info gigadevice_spinand_table[] = {
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&gd5fxgq4xexxg_ooblayout,
 				     gd5f1gq4xexxg_ecc_get_status)),
+	SPINAND_INFO("GD5F4GQ6UExxG", 0x55,
+		     NAND_MEMORG(1, 2048, 128, 64, 4096, 1, 1, 1),
+		     NAND_ECCREQ(4, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&gd5fxgq4xexxg_ooblayout,
+				     gd5fxgq5xexxg_ecc_get_status)),
 };
 
 static int gigadevice_spinand_detect(struct spinand_device *spinand)

commit f06413e4334dd336c1c9975d18eb5b153fb60f5a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Feb 3 14:39:31 2021 +0800

    cpu: rockchip amp: support set PE state
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I6b5eb621af1472983cdfbaebfdaa61a4c85b1856

diff --git a/drivers/cpu/amp-uclass.c b/drivers/cpu/amp-uclass.c
index 7d52722a2d..33a3050894 100644
--- a/drivers/cpu/amp-uclass.c
+++ b/drivers/cpu/amp-uclass.c
@@ -102,10 +102,13 @@ static int amp_pre_probe(struct udevice *dev)
 	uc_pdata->partition = dev_read_string(dev, "partition");
 	uc_pdata->cpu = dev_read_u32_default(dev, "cpu", -ENODATA);
 #ifdef CONFIG_ARM64
-	uc_pdata->aarch = dev_read_u32_default(dev, "aarch", 64);
+	uc_pdata->aarch64 = dev_read_u32_default(dev, "aarch64", 1);
 #else
-	uc_pdata->aarch = dev_read_u32_default(dev, "aarch", 32);
+	uc_pdata->aarch64 = 0;
 #endif
+	uc_pdata->hyp = dev_read_u32_default(dev, "hyp", 0);
+	uc_pdata->thumb = dev_read_u32_default(dev, "thumb", 0);
+	uc_pdata->secure = dev_read_u32_default(dev, "secure", 0);
 	uc_pdata->load = dev_read_u32_default(dev, "load", -ENODATA);
 	uc_pdata->entry = dev_read_u32_default(dev, "entry", -ENODATA);
 
@@ -115,9 +118,7 @@ static int amp_pre_probe(struct udevice *dev)
 
 	if (!uc_pdata->desc || !uc_pdata->partition ||
 	    uc_pdata->cpu == -ENODATA || uc_pdata->load == -ENODATA ||
-	    uc_pdata->entry == -ENODATA || !uc_pdata->reserved_mem[0] ||
-	    !uc_pdata->reserved_mem[1] ||
-	    (uc_pdata->aarch != 64 && uc_pdata->aarch != 32)) {
+	    uc_pdata->entry == -ENODATA) {
 		printf("AMP: \"%s\" is not complete\n", dev->name);
 		return -EINVAL;
 	}
@@ -127,7 +128,10 @@ static int amp_pre_probe(struct udevice *dev)
 	printf("    descrption: %s\n", uc_pdata->desc);
 	printf("     partition: %s\n", uc_pdata->partition);
 	printf("           cpu: 0x%x\n", uc_pdata->cpu);
-	printf("         aarch: %d\n", uc_pdata->aarch);
+	printf("       aarch64: %d\n", uc_pdata->aarch64);
+	printf("           hyp: %d\n", uc_pdata->hyp);
+	printf("         thumb: %d\n", uc_pdata->thumb);
+	printf("        secure: %d\n", uc_pdata->secure);
 	printf("          load: 0x%08x\n", uc_pdata->load);
 	printf("         entry: 0x%08x\n", uc_pdata->entry);
 	printf("  reserved_mem: 0x%08x - 0x%08x\n\n",
diff --git a/drivers/cpu/rockchip_amp.c b/drivers/cpu/rockchip_amp.c
index 6ca0850d35..d07d876077 100644
--- a/drivers/cpu/rockchip_amp.c
+++ b/drivers/cpu/rockchip_amp.c
@@ -93,6 +93,10 @@ err:
  *		description  = "mcu-os1";
  *		partition    = "mcu1";
  *		cpu          = <0x1>;		// this is mpidr!
+ *		aarch64	     = <1>;	     	// 0: aarch32, 1: aarch64
+ *		thumb	     = <0>;		// 0: arm, 1: thumb
+ *		hyp	     = <1>;	 	// 0: el1/svc, 1: el2/hyp
+ *		secure	     = <0>;		// 0: non-secure, 1: secure
  *		load         = <0x800000>;
  *		entry        = <0x800000>;
  *		memory       = <0x800000 0x400000>;
@@ -105,8 +109,10 @@ err:
  *	......
  * };
  *
- * U-Boot loads "mcu-os1" firmware to "0x800000" address from partiton
- * "mcu1" for cpu[1], the cpu[1] entry address is 0x800000. And
+ * U-Boot load "mcu-os1" firmware to "0x800000" address from partiton
+ * "mcu1" for cpu[1] with ARM, aarch64, hyp(el2) and non-secure state,
+ * running on 0x800000.
+ *
  * U-Boot reserve memory from 0x800000 with 0x400000 size in order
  * to make it invisible for kernel.
  *
@@ -120,6 +126,7 @@ static int rockchip_amp_cpu_on(struct udevice *dev)
 	struct blk_desc *dev_desc;
 	disk_partition_t part_info;
 	int ret, size;
+	u32 pe_state;
 
 	uc_pdata = dev_get_uclass_platdata(dev);
 	if (!uc_pdata)
@@ -136,14 +143,17 @@ static int rockchip_amp_cpu_on(struct udevice *dev)
 		return ret;
 	}
 
-	ret = bidram_reserve_by_name(uc_pdata->partition,
-				     uc_pdata->reserved_mem[0],
-				     uc_pdata->reserved_mem[1]);
-	if (ret) {
-		AMP_E("Reserve \"%s\" region at 0x%08x - 0x%08x failed, ret=%d\n",
-		      uc_pdata->desc, uc_pdata->reserved_mem[0],
-		      uc_pdata->reserved_mem[0] + uc_pdata->reserved_mem[1], ret);
-		return -ENOMEM;
+	if (uc_pdata->reserved_mem[1]) {
+		ret = bidram_reserve_by_name(uc_pdata->partition,
+					     uc_pdata->reserved_mem[0],
+					     uc_pdata->reserved_mem[1]);
+		if (ret) {
+			AMP_E("Reserve \"%s\" region at 0x%08x - 0x%08x failed, ret=%d\n",
+			      uc_pdata->desc, uc_pdata->reserved_mem[0],
+			      uc_pdata->reserved_mem[0] +
+			      uc_pdata->reserved_mem[1], ret);
+			return -ENOMEM;
+		}
 	}
 
 	size = read_rockchip_image(dev_desc, &part_info,
@@ -157,9 +167,13 @@ static int rockchip_amp_cpu_on(struct udevice *dev)
 	flush_dcache_range(uc_pdata->load,
 			   uc_pdata->load + ALIGN(size, ARCH_DMA_MINALIGN));
 
-	AMP_I("Brought up cpu[%x] on \"%s\" entry 0x%08x ...",
-	      uc_pdata->cpu, uc_pdata->desc, uc_pdata->entry);
+	pe_state = PE_STATE(uc_pdata->aarch64, uc_pdata->hyp,
+			    uc_pdata->thumb, uc_pdata->secure);
+
+	AMP_I("Brought up cpu[%x] with state(%x) from \"%s\" entry 0x%08x ...",
+	      uc_pdata->cpu, pe_state, uc_pdata->desc, uc_pdata->entry);
 
+	sip_smc_amp_cfg(AMP_PE_STATE, uc_pdata->cpu, pe_state);
 	ret = psci_cpu_on(uc_pdata->cpu, uc_pdata->entry);
 	if (ret) {
 		printf("failed\n");
diff --git a/include/amp.h b/include/amp.h
index 629dcdcd04..a6bb55279b 100644
--- a/include/amp.h
+++ b/include/amp.h
@@ -8,6 +8,22 @@
 
 #include <dm.h>
 
+#define MAP_AARCH(aarch64)	((aarch64) ? 1 : 0)
+#define MAP_HYP(hyp)		((hyp) ? 1 : 0)
+#define MAP_THUMB(thumb)	((thumb) ? 1 : 0)
+#define MAP_SECURE(secure)	((secure) ? 0 : 1)
+
+#define	MODE_AARCH64_SHIFT	1
+#define	MODE_HYP_SHIFT		2
+#define	MODE_THUMB_SHIFT	3
+#define	MODE_SECURE_SHIFT	4
+
+#define PE_STATE(aarch64, hyp, thumb, secure)				\
+	       (((MAP_AARCH(aarch64) & 0x1) << MODE_AARCH64_SHIFT) |	\
+		((MAP_HYP(hyp) & 0x1) << MODE_HYP_SHIFT) |		\
+		((MAP_THUMB(thumb) & 0x1) << MODE_THUMB_SHIFT) |	\
+		((MAP_SECURE(secure) & 0x1) << MODE_SECURE_SHIFT))
+
 struct dm_amp_ops {
 	int (*cpu_on)(struct udevice *dev);
 };
@@ -16,7 +32,10 @@ struct dm_amp_uclass_platdata {
 	const char *desc;
 	const char *partition;
 	u32 cpu;		/* cpu mpidr */
-	u32 aarch;
+	u32 aarch64;
+	u32 hyp;
+	u32 thumb;
+	u32 secure;
 	u32 load;
 	u32 entry;
 	u32 reserved_mem[2];	/* [0]: start, [1]: size */
@@ -27,3 +46,4 @@ int amp_cpus_on(void);
 int amp_cpu_on(u32 cpu);
 
 #endif	/* _AMP_H_ */
+

commit c3e08fa050aa3e8eb31fbd76f4d1e28c00ffe0b4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Feb 3 18:36:20 2021 +0800

    rockchip: smccc: add sip_smc_amp_cfg()
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ida367c95f72e910f6dbb9919888479250512f3b4

diff --git a/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h b/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
index c290553615..85d0bce943 100644
--- a/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
+++ b/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
@@ -27,6 +27,7 @@
 #define SIP_VPU_RESET			0x8200000c
 #define SIP_SOC_BUS_DIV			0x8200000d
 #define SIP_LAST_LOG			0x8200000e
+#define SIP_AMP_CFG			0x82000022
 
 #define ROCKCHIP_SIP_CONFIG_DRAM_INIT		0x00
 #define ROCKCHIP_SIP_CONFIG_DRAM_SET_RATE	0x01
@@ -56,6 +57,9 @@
 #define SECURE_REG_RD			0x0
 #define SECURE_REG_WR			0x1
 
+/* SIP_AMP_CFG */
+#define AMP_PE_STATE			0x0
+
 /* Share mem page types */
 typedef enum {
 	SHARE_PAGE_TYPE_INVALID = 0,
@@ -73,6 +77,11 @@ int sip_smc_set_suspend_mode(unsigned long ctrl,
 			     unsigned long config1,
 			     unsigned long config2);
 
+/*
+ * sip_smc_amp_cfg() - config AMP
+ */
+int sip_smc_amp_cfg(unsigned long func, unsigned long arg0, unsigned long arg1);
+
 /*
  * sip_smc_dram() - Set dram configure for trust.
  *
diff --git a/arch/arm/mach-rockchip/rockchip_smccc.c b/arch/arm/mach-rockchip/rockchip_smccc.c
index 8ec9bad8f4..0caa642294 100644
--- a/arch/arm/mach-rockchip/rockchip_smccc.c
+++ b/arch/arm/mach-rockchip/rockchip_smccc.c
@@ -61,6 +61,14 @@ int sip_smc_set_suspend_mode(unsigned long ctrl,
 	return res.a0;
 }
 
+int sip_smc_amp_cfg(unsigned long func, unsigned long arg0, unsigned long arg1)
+{
+	struct arm_smccc_res res;
+
+	res = __invoke_sip_fn_smc(SIP_AMP_CFG, func, arg0, arg1);
+	return res.a0;
+}
+
 struct arm_smccc_res sip_smc_dram(unsigned long arg0,
 				  unsigned long arg1,
 				  unsigned long arg2)

commit 52ee18acb8af5acfef14b34d363eea60ef066857
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Tue Jan 5 10:25:28 2021 +0800

    drm/rockchip: vop2: add support port1 to mipi dsi
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: Iee86d5da9df9ae185b261a46e3919375f8f0fd2d

diff --git a/drivers/video/drm/rockchip_vop2.c b/drivers/video/drm/rockchip_vop2.c
index dd529b1ae5..0e88e2144b 100644
--- a/drivers/video/drm/rockchip_vop2.c
+++ b/drivers/video/drm/rockchip_vop2.c
@@ -31,7 +31,7 @@
 
 #define RK3568_VERSION_INFO			0x004
 
-#define EN_MASK				1
+#define EN_MASK					1
 
 #define RK3568_DSP_IF_EN			0x028
 #define RGB_EN_SHIFT				0
@@ -460,6 +460,11 @@
 
 #define RK3568_MAX_REG				0x1ED0
 
+#define RK3568_GRF_VO_CON1			0x0364
+#define GRF_BT656_CLK_INV_SHIFT			1
+#define GRF_BT1120_CLK_INV_SHIFT		2
+#define GRF_RGB_DCLK_INV_SHIFT			3
+
 #define VOP2_LAYER_MAX				8
 #define VOP2_MAX_VP				4
 
@@ -492,17 +497,6 @@ enum dither_down_mode {
 	RGB888_TO_RGB666 = 0x1
 };
 
-struct vop2_reg {
-	uint32_t mask;
-	uint32_t offset:12;
-	uint32_t shift:5;
-	uint32_t write_mask:1;
-};
-
-struct vop2_grf_ctrl {
-	struct vop2_reg dclk_inv;
-};
-
 enum vop2_video_ports_id {
 	VOP2_VP0,
 	VOP2_VP1,
@@ -528,7 +522,7 @@ struct vop2_win {
 };
 
 struct vop2_data {
-	uint32_t version;
+	u32 version;
 	struct vop_rect max_output[VOP2_MAX_VP];
 	/**
 	 * win_id: id of window attach to VP0,VP1,VP2,VP3,
@@ -543,15 +537,14 @@ struct vop2_data {
 	 *
 	 */
 	uint8_t win_sel_id[VOP2_LAYER_MAX];
-	struct vop2_grf_ctrl *grf_ctrl;
 };
 
 struct vop2 {
 	u32 *regsbak;
 	void *regs;
 	void *grf;
-	uint32_t reg_len;
-	uint32_t version;
+	u32 reg_len;
+	u32 version;
 	const struct vop2_data *data;
 	/**
 	 * @nr_wins: active wins attached to the video port
@@ -574,19 +567,19 @@ static inline uint16_t scl_cal_scale2(int src, int dst)
 	return ((src - 1) << 12) / (dst - 1);
 }
 
-static inline void vop2_writel(struct vop2 *vop2, uint32_t offset, uint32_t v)
+static inline void vop2_writel(struct vop2 *vop2, u32 offset, u32 v)
 {
 	writel(v, vop2->regs + offset);
 	vop2->regsbak[offset >> 2] = v;
 }
 
-static inline uint32_t vop2_readl(struct vop2 *vop2, uint32_t offset)
+static inline u32 vop2_readl(struct vop2 *vop2, u32 offset)
 {
 	return readl(vop2->regs + offset);
 }
 
-static inline void vop2_mask_write(struct vop2 *vop2, uint32_t offset,
-				   uint32_t mask, uint32_t shift, uint32_t v,
+static inline void vop2_mask_write(struct vop2 *vop2, u32 offset,
+				   u32 mask, u32 shift, u32 v,
 				   bool write_mask)
 {
 	if (!mask)
@@ -595,7 +588,7 @@ static inline void vop2_mask_write(struct vop2 *vop2, uint32_t offset,
 	if (write_mask) {
 		v = ((v & mask) << shift) | (mask << (shift + 16));
 	} else {
-		uint32_t cached_val = vop2->regsbak[offset >> 2];
+		u32 cached_val = vop2->regsbak[offset >> 2];
 
 		v = (cached_val & ~(mask << shift)) | ((v & mask) << shift);
 		vop2->regsbak[offset >> 2] = v;
@@ -604,12 +597,21 @@ static inline void vop2_mask_write(struct vop2 *vop2, uint32_t offset,
 	writel(v, vop2->regs + offset);
 }
 
+static inline void vop2_grf_writel(struct vop2 *vop, u32 offset,
+				   u32 mask, u32 shift, u32 v)
+{
+	u32 val = 0;
+
+	val = (v << shift) | (mask << (shift + 16));
+	writel(val, vop->grf + offset);
+}
+
 static inline int us_to_vertical_line(struct drm_display_mode *mode, int us)
 {
 	return us * mode->clock / mode->htotal / 1000;
 }
 
-static bool is_yuv_output(uint32_t bus_format)
+static bool is_yuv_output(u32 bus_format)
 {
 	switch (bus_format) {
 	case MEDIA_BUS_FMT_YUV8_1X24:
@@ -642,7 +644,7 @@ static int vop2_convert_csc_mode(int csc_mode)
 	}
 }
 
-static __maybe_unused bool is_uv_swap(uint32_t bus_format, uint32_t output_mode)
+static __maybe_unused bool is_uv_swap(u32 bus_format, u32 output_mode)
 {
 	/*
 	 * FIXME:
@@ -672,6 +674,8 @@ static void vop2_post_config(struct display_state *state, struct vop2 *vop2)
 {
 	struct connector_state *conn_state = &state->conn_state;
 	struct drm_display_mode *mode = &conn_state->mode;
+	struct crtc_state *cstate = &state->crtc_state;
+	u32 vp_offset = (cstate->crtc_id * 0x100);
 	u16 vtotal = mode->crtc_vtotal;
 	u16 hact_st = mode->crtc_htotal - mode->crtc_hsync_start;
 	u16 vact_st = mode->crtc_vtotal - mode->crtc_vsync_start;
@@ -697,18 +701,18 @@ static void vop2_post_config(struct display_state *state, struct vop2 *vop2)
 	val = hact_st << 16;
 	val |= hact_end;
 
-	vop2_writel(vop2, RK3568_VP0_POST_DSP_HACT_INFO, val);
+	vop2_writel(vop2, RK3568_VP0_POST_DSP_HACT_INFO + vp_offset, val);
 	vact_st += vdisplay * (100 - conn_state->overscan.top_margin) / 200;
 	vact_end = vact_st + vsize;
 	val = vact_st << 16;
 	val |= vact_end;
-	vop2_writel(vop2, RK3568_VP0_POST_DSP_VACT_INFO, val);
+	vop2_writel(vop2, RK3568_VP0_POST_DSP_VACT_INFO + vp_offset, val);
 	val = scl_cal_scale2(vdisplay, vsize) << 16;
 	val |= scl_cal_scale2(hdisplay, hsize);
-	vop2_writel(vop2, RK3568_VP0_POST_SCL_FACTOR_YRGB, val);
+	vop2_writel(vop2, RK3568_VP0_POST_SCL_FACTOR_YRGB + vp_offset, val);
 #define POST_HORIZONTAL_SCALEDOWN_EN(x)		((x) << 0)
 #define POST_VERTICAL_SCALEDOWN_EN(x)		((x) << 1)
-	vop2_writel(vop2, RK3568_VP0_POST_SCL_CTRL,
+	vop2_writel(vop2, RK3568_VP0_POST_SCL_CTRL + vp_offset,
 		    POST_HORIZONTAL_SCALEDOWN_EN(hdisplay != hsize) |
 		    POST_VERTICAL_SCALEDOWN_EN(vdisplay != vsize));
 	if (mode->flags & DRM_MODE_FLAG_INTERLACE) {
@@ -716,21 +720,21 @@ static void vop2_post_config(struct display_state *state, struct vop2 *vop2)
 		u16 vact_end_f1 = vact_st_f1 + vsize;
 
 		val = vact_st_f1 << 16 | vact_end_f1;
-		vop2_writel(vop2, RK3568_VP0_POST_DSP_VACT_INFO_F1, val);
+		vop2_writel(vop2, RK3568_VP0_POST_DSP_VACT_INFO_F1 + vp_offset, val);
 	}
 
 	bg_ovl_dly = (nr_mixers - used_layer) << 1;
 	bg_dly = pre_scan_max_dly - bg_ovl_dly;
 	pre_scan_dly = bg_dly + (hdisplay >> 1) - 1;
 	pre_scan_dly = (pre_scan_dly << 16) | hsync_len;
-	vop2_writel(vop2, RK3568_VP0_PRE_SCAN_HTIMING, pre_scan_dly);
+	vop2_writel(vop2, RK3568_VP0_PRE_SCAN_HTIMING + vp_offset, pre_scan_dly);
 }
 
 static void vop2_layer_map_initial(struct vop2 *vop2)
 {
 	struct vop2_layer *layer;
 	struct vop2_win *win;
-	uint32_t layer_map, sel;
+	u32 layer_map, sel;
 	int i, j;
 
 	layer_map = vop2_readl(vop2, RK3568_OVL_LAYER_SEL);
@@ -850,7 +854,7 @@ static int rockchip_vop2_init(struct display_state *state)
 	u16 vact_end = vact_st + vdisplay;
 	bool yuv_overlay = false;
 	//bool yuv_overlay = false, post_r2y_en = false, post_y2r_en = false;
-	uint32_t vp_offset = (cstate->crtc_id * 0x100);
+	u32 vp_offset = (cstate->crtc_id * 0x100);
 	//struct clk dclk;
 	//fdt_size_t len;
 	u32 val;
@@ -861,7 +865,6 @@ static int rockchip_vop2_init(struct display_state *state)
 	//uint8_t dither_down_mode = RGB888_TO_RGB666;
 
 	vop2_initial(vop2, state);
-
 	dclk_inv = (mode->flags & DRM_MODE_FLAG_PPIXDATA) ? 0 : 1;
 	val = (mode->flags & DRM_MODE_FLAG_NHSYNC) ? 0 : BIT(HSYNC_POSITIVE);
 	val |= (mode->flags & DRM_MODE_FLAG_NVSYNC) ? 0 : BIT(VSYNC_POSITIVE);
@@ -872,16 +875,21 @@ static int rockchip_vop2_init(struct display_state *state)
 		vop2_mask_write(vop2, RK3568_DSP_IF_EN, IF_MUX_MASK,
 				RGB_MUX_SHIFT, cstate->crtc_id, false);
 		vop2_mask_write(vop2, RK3568_DSP_IF_POL, EN_MASK,
-				IF_CRTL_RGB_LVDS_DCLK_POL_SHIT, ! !dclk_inv,
+				IF_CRTL_RGB_LVDS_DCLK_POL_SHIT, !!dclk_inv,
 				false);
-		//VOP2_GRF_SET(vop2, dclk_inv, dclk_inv);
+		vop2_grf_writel(vop2, RK3568_GRF_VO_CON1, EN_MASK,
+				GRF_RGB_DCLK_INV_SHIFT, !dclk_inv);
 	}
 
 	if (conn_state->output_if & VOP_OUTPUT_IF_BT1120) {
+		vop2_mask_write(vop2, RK3568_DSP_IF_EN, EN_MASK, RGB_EN_SHIFT,
+				1, false);
 		vop2_mask_write(vop2, RK3568_DSP_IF_EN, EN_MASK,
 				BT1120_EN_SHIFT, 1, false);
 		vop2_mask_write(vop2, RK3568_DSP_IF_EN, IF_MUX_MASK,
 				RGB_MUX_SHIFT, cstate->crtc_id, false);
+		vop2_grf_writel(vop2, RK3568_GRF_VO_CON1, EN_MASK,
+				GRF_BT1120_CLK_INV_SHIFT, !dclk_inv);
 	}
 
 	if (conn_state->output_if & VOP_OUTPUT_IF_BT656) {
@@ -889,6 +897,8 @@ static int rockchip_vop2_init(struct display_state *state)
 				1, false);
 		vop2_mask_write(vop2, RK3568_DSP_IF_EN, IF_MUX_MASK,
 				RGB_MUX_SHIFT, cstate->crtc_id, false);
+		vop2_grf_writel(vop2, RK3568_GRF_VO_CON1, EN_MASK,
+				GRF_BT656_CLK_INV_SHIFT, !dclk_inv);
 	}
 
 	if (conn_state->output_if & VOP_OUTPUT_IF_LVDS0) {
@@ -921,7 +931,6 @@ static int rockchip_vop2_init(struct display_state *state)
 	}
 
 	if (conn_state->output_if & VOP_OUTPUT_IF_MIPI0) {
-		//cstate->crtc_id = 0;
 		vop2_mask_write(vop2, RK3568_DSP_IF_EN, EN_MASK, MIPI0_EN_SHIFT,
 				1, false);
 		vop2_mask_write(vop2, RK3568_DSP_IF_EN, IF_MUX_MASK,
@@ -1132,9 +1141,15 @@ static void vop2_setup_win_for_vp(struct display_state *state)
 	vop2_mask_write(vop2, RK3568_OVL_PORT_SEL, PORT_MUX_MASK, shift,
 			used_layers, false);
 
-	vop2_writel(vop2, 0x604, 0x54760312);
-	vop2_writel(vop2, 0x608, 0x84000781);
-	vop2_writel(vop2, 0x6e0, 0x22000000);
+	if (port_id == 0) {
+		vop2_writel(vop2, 0x604, 0x54760312);
+		vop2_writel(vop2, 0x608, 0x84000781);
+		vop2_writel(vop2, 0x6e0, 0x22000000);
+	} else {
+		vop2_writel(vop2, 0x604, 0x54720316);
+		vop2_writel(vop2, 0x608, 0x84000708);
+		vop2_writel(vop2, 0x6e4, 0x1e000000);
+	}
 }
 
 static int rockchip_vop2_set_plane(struct display_state *state)
@@ -1153,8 +1168,8 @@ static int rockchip_vop2_set_plane(struct display_state *state)
 	int xvir = cstate->xvir;
 	int y_mirror = 0;
 	int csc_mode;
-	uint32_t win_offset = cstate->crtc_id * 0x200;
-	uint32_t cfg_done = CFG_DONE_EN | BIT(cstate->crtc_id);
+	u32 win_offset = cstate->crtc_id * 0x200;
+	u32 cfg_done = CFG_DONE_EN | BIT(cstate->crtc_id);
 
 	if (crtc_w > cstate->max_output.width) {
 		printf("ERROR: output w[%d] exceeded max width[%d]\n",
@@ -1218,8 +1233,8 @@ static int rockchip_vop2_enable(struct display_state *state)
 {
 	struct crtc_state *cstate = &state->crtc_state;
 	struct vop2 *vop2 = cstate->private;
-	uint32_t vp_offset = (cstate->crtc_id * 0x100);
-	uint32_t cfg_done = CFG_DONE_EN | BIT(cstate->crtc_id);
+	u32 vp_offset = (cstate->crtc_id * 0x100);
+	u32 cfg_done = CFG_DONE_EN | BIT(cstate->crtc_id);
 
 	vop2_mask_write(vop2, RK3568_VP0_DSP_CTRL + vp_offset, EN_MASK,
 			STANDBY_EN_SHIFT, 0, false);
@@ -1232,8 +1247,8 @@ static int rockchip_vop2_disable(struct display_state *state)
 {
 	struct crtc_state *cstate = &state->crtc_state;
 	struct vop2 *vop2 = cstate->private;
-	uint32_t vp_offset = (cstate->crtc_id * 0x100);
-	uint32_t cfg_done = CFG_DONE_EN | BIT(cstate->crtc_id);
+	u32 vp_offset = (cstate->crtc_id * 0x100);
+	u32 cfg_done = CFG_DONE_EN | BIT(cstate->crtc_id);
 
 	vop2_mask_write(vop2, RK3568_VP0_DSP_CTRL + vp_offset, EN_MASK,
 			STANDBY_EN_SHIFT, 1, false);

commit 926664c9a034a2d3dd1d0ab9e3df5802cf5a6693
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Sat Jan 30 10:23:15 2021 +0800

    lib: avb: reduce write rollback index operations
    
    The optee is used to storage security data in U-Boot, and a file
    which occupy 16KB is created when write a rollback index. But the
    security space is only 512KB, the sapce is not enough when write
    too many items.
    
    And here we write rollback index 32 times, but the avb only use
    rollback_index_location 0 to verify the rollback index with vbmeta.
    So just get the rollback_index_location 0 in this process.
    
    Test:
            fastboot getvar at-vboot-state
    
    Error log:
            TEEC: reference out of data: -1
            TEEC: Not enough space available in secure storage!
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Id69b852553a4ef9111dabe6f23e25038b0928bb3

diff --git a/lib/avb/rk_avb_user/rk_avb_ops_user.c b/lib/avb/rk_avb_user/rk_avb_ops_user.c
index 0ce3457bb3..c396eb193c 100644
--- a/lib/avb/rk_avb_user/rk_avb_ops_user.c
+++ b/lib/avb/rk_avb_user/rk_avb_ops_user.c
@@ -309,7 +309,6 @@ int rk_avb_read_all_rollback_index(char *buffer)
 	uint64_t stored_rollback_index = 0;
 	AvbIOResult io_ret;
 	char temp[ROLLBACK_MAX_SIZE] = {0};
-	int n;
 
 	ops = avb_ops_user_new();
 	if (ops == NULL) {
@@ -317,19 +316,17 @@ int rk_avb_read_all_rollback_index(char *buffer)
 		return -1;
 	}
 
-	for (n = 0; n < AVB_MAX_NUMBER_OF_ROLLBACK_INDEX_LOCATIONS; n++) {
-		io_ret = ops->read_rollback_index(
-			ops, n, &stored_rollback_index);
-		if (io_ret != AVB_IO_RESULT_OK)
-			goto out;
-		snprintf(temp, sizeof(int) + 1, "%d", n);
-		strncat(buffer, temp, ROLLBACK_MAX_SIZE);
-		strncat(buffer, ":", 1);
-		snprintf(temp, sizeof(uint64_t) + 1, "%lld",
-			 stored_rollback_index);
-		strncat(buffer, temp, ROLLBACK_MAX_SIZE);
-		strncat(buffer, ",", 1);
-	}
+	/* Actually the rollback_index_location 0 is used. */
+	io_ret = ops->read_rollback_index(ops, 0, &stored_rollback_index);
+	if (io_ret != AVB_IO_RESULT_OK)
+		goto out;
+	snprintf(temp, sizeof(int) + 1, "%d", 0);
+	strncat(buffer, temp, ROLLBACK_MAX_SIZE);
+	strncat(buffer, ":", 1);
+	snprintf(temp, sizeof(uint64_t) + 1, "%lld",
+		 stored_rollback_index);
+	strncat(buffer, temp, ROLLBACK_MAX_SIZE);
+	strncat(buffer, ",", 1);
 
 	io_ret =
 		ops->read_rollback_index(ops,

commit 72f40a61fa1f1c9412c20be2775e6335af7f36f3
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Thu Jan 28 14:56:15 2021 +0800

    configs: rk3568: add usbplug config
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: Ib341adf59f8566b54dbe27ecd7f949526bdf1264

diff --git a/configs/rk3568-usbplug.config b/configs/rk3568-usbplug.config
new file mode 100644
index 0000000000..a91c4b1a7c
--- /dev/null
+++ b/configs/rk3568-usbplug.config
@@ -0,0 +1,10 @@
+CONFIG_BASE_DEFCONFIG="rockchip-usbplug_defconfig"
+# CONFIG_TARGET_EVB_RV1126 is not set
+# CONFIG_ROCKCHIP_RV1126 is not set
+CONFIG_DEBUG_UART_BASE=0xFE660000
+CONFIG_DEFAULT_DEVICE_TREE="rk3568-evb"
+CONFIG_ROCKCHIP_RK3568=y
+CONFIG_TARGET_EVB_RK3568=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y

commit 5f73fdb14a9746951f63999d6fad3313295beae1
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Thu Jan 28 14:55:43 2021 +0800

    rockchip: rk3568: support usbplug
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: If2c56d1db774f79689cfbe87bcae7cfcadacae82

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 8ccac93638..744faa25e4 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -385,7 +385,7 @@ config ROCKCHIP_RK3568
 	bool "Support Rockchip RK3568"
 	select ARM64 if !ARM64_BOOT_AARCH32
 	select ARM_SMCCC
-	select GICV3 if !ARM64_BOOT_AARCH32
+	select GICV3 if !ARM64_BOOT_AARCH32 && !SUPPORT_USBPLUG
 	select SUPPORT_TPL if !ARM64_BOOT_AARCH32
 	select SUPPORT_SPL if !ARM64_BOOT_AARCH32
 	select TPL_TINY_FRAMEWORK if TPL
diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c
index 314dfb9dc7..e9eef451fd 100644
--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
@@ -16,6 +16,11 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #define PMUGRF_BASE		0xfdc20000
 #define GRF_BASE		0xfdc60000
+#define GRF_GPIO1B_IOMUX_H	0x0C
+#define GRF_GPIO1C_IOMUX_L	0x10
+#define GRF_GPIO1C_IOMUX_H	0x14
+#define GRF_GPIO1D_IOMUX_L	0x18
+#define GRF_GPIO1D_IOMUX_H	0x1C
 #define GRF_GPIO1B_DS_2		0x218
 #define GRF_GPIO1B_DS_3		0x21c
 #define GRF_GPIO1C_DS_0		0x220
@@ -863,6 +868,35 @@ int arch_cpu_init(void)
 #ifndef CONFIG_TPL_BUILD
 	qos_priority_init();
 #endif
+#elif defined(CONFIG_SUPPORT_USBPLUG)
+	/*
+	 * When perform idle operation, corresponding clock can
+	 * be opened or gated automatically.
+	 */
+	writel(0xffffffff, PMU_BASE_ADDR + PMU_NOC_AUTO_CON0);
+	writel(0x000f000f, PMU_BASE_ADDR + PMU_NOC_AUTO_CON1);
+
+	writel(0x00030000, SGRF_BASE + SGRF_SOC_CON4); /* usb3otg0 master secure setting */
+
+	/* Set the emmc sdmmc0 to secure */
+	writel(((0x3 << 11 | 0x1 << 4) << 16), SGRF_BASE + SGRF_SOC_CON4);
+	/* set the emmc ds to level 2 */
+	writel(0x3f3f0707, GRF_BASE + GRF_GPIO1B_DS_2);
+	writel(0x3f3f0707, GRF_BASE + GRF_GPIO1B_DS_3);
+	writel(0x3f3f0707, GRF_BASE + GRF_GPIO1C_DS_0);
+	writel(0x3f3f0707, GRF_BASE + GRF_GPIO1C_DS_1);
+	writel(0x3f3f0707, GRF_BASE + GRF_GPIO1C_DS_2);
+	writel(0x3f3f0707, GRF_BASE + GRF_GPIO1C_DS_3);
+
+	/* emmc and sfc iomux */
+	writel((0x7777UL << 16) | (0x1111), GRF_BASE + GRF_GPIO1B_IOMUX_H);
+	writel((0x7777UL << 16) | (0x1111), GRF_BASE + GRF_GPIO1C_IOMUX_L);
+	writel((0x7777UL << 16) | (0x2111), GRF_BASE + GRF_GPIO1C_IOMUX_H);
+	writel((0x7777UL << 16) | (0x1111), GRF_BASE + GRF_GPIO1D_IOMUX_L);
+	writel(((7 << 0) << 16) | (1 << 0), GRF_BASE + GRF_GPIO1D_IOMUX_H);
+
+	/* Set the fspi to secure */
+	writel(((0x1 << 14) << 16) | (0x0 << 14), SGRF_BASE + SGRF_SOC_CON3);
 #endif
 
 	return 0;
diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h
index 32c6ed100a..bf3ded3aee 100644
--- a/include/configs/rk3568_common.h
+++ b/include/configs/rk3568_common.h
@@ -19,7 +19,13 @@
 #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
+
+#ifdef CONFIG_SUPPORT_USBPLUG
+#define CONFIG_SYS_TEXT_BASE		0x00000000
+#else
 #define CONFIG_SYS_TEXT_BASE		0x00a00000
+#endif
+
 #define CONFIG_SYS_INIT_SP_ADDR		0x00c00000
 #define CONFIG_SYS_LOAD_ADDR		0x00c00800
 #define CONFIG_SYS_BOOTM_LEN		(64 << 20)	/* 64M */

commit 42b8fbc43fce910e7ca971f1985a185b48a5d3aa
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Wed Jan 20 14:58:49 2021 +0800

    configs: add dfu configs for rk3568
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: I3b4a126cf42d2c5efc604fc87ef26bb65f8ad6c4

diff --git a/configs/rk3568-dfu.config b/configs/rk3568-dfu.config
new file mode 100644
index 0000000000..3a65a8c7fd
--- /dev/null
+++ b/configs/rk3568-dfu.config
@@ -0,0 +1,9 @@
+CONFIG_BASE_DEFCONFIG="rk3568_defconfig"
+CONFIG_CMD_DFU=y
+CONFIG_DFU_MMC=y
+CONFIG_DFU_MTD=y
+# CONFIG_DFU_NAND is not set
+# CONFIG_DFU_RAM is not set
+# CONFIG_DFU_SF is not set
+# CONFIG_DFU_TFTP is not set
+CONFIG_USB_FUNCTION_DFU=y

commit 8292f3589a102daa48e78f8c2f9e044057a8663e
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Wed Jan 20 14:33:52 2021 +0800

    configs: add dfu part info for rk3568
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: Ib275162d137bec5e2550bf9c21455acf7bffc762

diff --git a/include/configs/evb_rk3568.h b/include/configs/evb_rk3568.h
index 03eca0ed44..4cf4d3e80d 100644
--- a/include/configs/evb_rk3568.h
+++ b/include/configs/evb_rk3568.h
@@ -20,6 +20,24 @@
 
 #undef CONFIG_BOOTCOMMAND
 #define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
-#endif
+
+#define CONFIG_SET_DFU_ALT_INFO
+#define DFU_ALT_BOOT_EMMC \
+	"gpt raw 0x0 0x20000;" \
+	"loader raw 0x20000 0xE0000;"\
+	"uboot part uboot;" \
+	"boot part boot;" \
+	"rootfs partubi rootfs;" \
+	"userdata partubi userdata\0"
+
+#define DFU_ALT_BOOT_MTD \
+	"gpt raw 0x0 0x20000;" \
+	"loader raw 0x20000 0xE0000;"\
+	"vnvm part vnvm;" \
+	"uboot part uboot;" \
+	"boot part boot;" \
+	"rootfs partubi rootfs;" \
+	"userdata partubi userdata\0"
 
 #endif
+#endif
\ No newline at end of file

commit 01abb59cacd6b64040e752305a1fa43f58ce9733
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Wed Jan 20 14:42:51 2021 +0800

    configs: add dfu configs for rv1126
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: If4b314c4fc01f559e581503e0e7740126c3957ee

diff --git a/configs/rv1126-dfu.config b/configs/rv1126-dfu.config
new file mode 100644
index 0000000000..014bd65c3c
--- /dev/null
+++ b/configs/rv1126-dfu.config
@@ -0,0 +1,9 @@
+CONFIG_BASE_DEFCONFIG="rv1126_defconfig"
+CONFIG_CMD_DFU=y
+CONFIG_DFU_MMC=y
+CONFIG_DFU_MTD=y
+# CONFIG_DFU_NAND is not set
+# CONFIG_DFU_RAM is not set
+# CONFIG_DFU_SF is not set
+# CONFIG_DFU_TFTP is not set
+CONFIG_USB_FUNCTION_DFU=y

commit 6984d2db2bb62e8b7ea021ca3b98f13d8259122e
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Wed Jan 20 14:33:03 2021 +0800

    configs: add dfu part info for rv1126
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: If05ba8e00865d8950fb0f042fb07ff1e197eb88d

diff --git a/include/configs/evb_rv1126.h b/include/configs/evb_rv1126.h
index 464b5e0d7b..4c88fae4e2 100644
--- a/include/configs/evb_rv1126.h
+++ b/include/configs/evb_rv1126.h
@@ -37,6 +37,23 @@
 #else
 #define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
 #endif
-#endif /* !CONFIG_SPL_BUILD */
 
+#define CONFIG_SET_DFU_ALT_INFO
+#define DFU_ALT_BOOT_EMMC \
+	"gpt raw 0x0 0x20000;" \
+	"loader raw 0x20000 0xE0000;"\
+	"uboot part uboot;" \
+	"boot part boot;" \
+	"rootfs partubi rootfs;" \
+	"userdata partubi userdata\0"
+
+#define DFU_ALT_BOOT_MTD \
+	"gpt raw 0x0 0x20000;" \
+	"loader raw 0x20000 0xE0000;"\
+	"vnvm part vnvm;" \
+	"uboot part uboot;" \
+	"boot part boot;" \
+	"rootfs partubi rootfs;" \
+	"userdata partubi userdata\0"
+#endif /* !CONFIG_SPL_BUILD */
 #endif

commit da041cba1fc1eb055b195f9ce190d8a1e67ba2f5
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Wed Jan 20 14:31:05 2021 +0800

    arch: rockchip: add set dfu alt info api
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: Idc6bd66c5b85a2bb100da3f270dd86b48dec8886

diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 57e73452da..5375a84cee 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -77,3 +77,4 @@ obj-$(CONFIG_SPL_BUILD) += $(obj-spl-y)
 obj-$(CONFIG_TPL_BUILD) += $(obj-tpl-y)
 
 obj-$(CONFIG_ROCKCHIP_PRELOADER_ATAGS) += rk_atags.o
+obj-$(CONFIG_SET_DFU_ALT_INFO) += dfu_alt_info.o
diff --git a/arch/arm/mach-rockchip/dfu_alt_info.c b/arch/arm/mach-rockchip/dfu_alt_info.c
new file mode 100644
index 0000000000..74fa4eb788
--- /dev/null
+++ b/arch/arm/mach-rockchip/dfu_alt_info.c
@@ -0,0 +1,66 @@
+/*
+ * (C) Copyright 2021 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <boot_rkimg.h>
+#include <memalign.h>
+
+#define CONFIG_SET_DFU_ALT_BUF_LEN	(SZ_1K)
+static char *get_dfu_alt(char *interface, char *devstr)
+{
+	struct blk_desc *dev_desc;
+	char *alt_boot;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return NULL;
+	}
+
+	switch (dev_desc->if_type) {
+#ifdef CONFIG_MMC
+	case IF_TYPE_MMC:
+		alt_boot = DFU_ALT_BOOT_EMMC;
+		break;
+#endif
+#ifdef CONFIG_MTD_BLK
+	case IF_TYPE_MTD:
+		alt_boot = DFU_ALT_BOOT_MTD;
+		break;
+#endif
+	default:
+		printf("[dfu ERROR]:Boot device type is invalid!\n");
+		return NULL;
+	}
+
+	return alt_boot;
+}
+
+void set_dfu_alt_info(char *interface, char *devstr)
+{
+	size_t buf_size = CONFIG_SET_DFU_ALT_BUF_LEN;
+	ALLOC_CACHE_ALIGN_BUFFER(char, buf, buf_size);
+	char *alt_info = "Settings not found!";
+	char *status = "error!\n";
+	char *alt_setting;
+	int offset = 0;
+
+	puts("DFU alt info setting: ");
+
+	alt_setting = get_dfu_alt(interface, devstr);
+	if (alt_setting) {
+		env_set("dfu_alt_boot", alt_setting);
+		offset = snprintf(buf, buf_size, "%s", alt_setting);
+	}
+
+	if (offset) {
+		alt_info = buf;
+		status = "done\n";
+	}
+
+	env_set("dfu_alt_info", alt_info);
+	puts(status);
+}

commit 0bcaecc8ee67bca03ac7c620478fcf43788e9a58
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Wed Jan 20 11:39:21 2021 +0800

    drivers: dfu: add DFU to read and write to MTD base storage
    
    Add DFU to read and write to MTD base storage.
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: I84cb160b182c31d7f84ed700896a4970845a3ca8

diff --git a/drivers/dfu/Kconfig b/drivers/dfu/Kconfig
index 56a98f5273..f0ceede2d1 100644
--- a/drivers/dfu/Kconfig
+++ b/drivers/dfu/Kconfig
@@ -23,6 +23,12 @@ config DFU_NAND
 	  This option enables using DFU to read and write to NAND based
 	  storage.
 
+config DFU_MTD
+	bool "MTD back end for DFU"
+	help
+	  This option enables using DFU to read and write to MTD based
+	  storage.
+
 config DFU_RAM
 	bool "RAM back end for DFU"
 	help
diff --git a/drivers/dfu/Makefile b/drivers/dfu/Makefile
index 61f2b71f91..c769d8c52a 100644
--- a/drivers/dfu/Makefile
+++ b/drivers/dfu/Makefile
@@ -7,6 +7,7 @@
 
 obj-$(CONFIG_USB_FUNCTION_DFU) += dfu.o
 obj-$(CONFIG_DFU_MMC) += dfu_mmc.o
+obj-$(CONFIG_DFU_MTD) += dfu_mtd.o
 obj-$(CONFIG_DFU_NAND) += dfu_nand.o
 obj-$(CONFIG_DFU_RAM) += dfu_ram.o
 obj-$(CONFIG_DFU_SF) += dfu_sf.o
diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c
index 2c22b625b8..7bd5389b2b 100644
--- a/drivers/dfu/dfu.c
+++ b/drivers/dfu/dfu.c
@@ -400,6 +400,9 @@ static int dfu_fill_entity(struct dfu_entity *dfu, char *s, int alt,
 	if (strcmp(interface, "mmc") == 0) {
 		if (dfu_fill_entity_mmc(dfu, devstr, s))
 			return -1;
+	} else if (strcmp(interface, "mtd") == 0) {
+		if (dfu_fill_entity_mtd(dfu, devstr, s))
+			return -1;
 	} else if (strcmp(interface, "nand") == 0) {
 		if (dfu_fill_entity_nand(dfu, devstr, s))
 			return -1;
diff --git a/drivers/dfu/dfu_mtd.c b/drivers/dfu/dfu_mtd.c
new file mode 100644
index 0000000000..200d99d349
--- /dev/null
+++ b/drivers/dfu/dfu_mtd.c
@@ -0,0 +1,163 @@
+/*
+ * (C) Copyright 2021 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#include <common.h>
+#include <boot_rkimg.h>
+#include <div64.h>
+#include <dfu.h>
+#include <errno.h>
+#include <linux/mtd/mtd.h>
+#include <malloc.h>
+#include <part.h>
+
+static int dfu_write_medium_mtd(struct dfu_entity *dfu,	u64 offset, void *buf, long *len)
+{
+	struct blk_desc *dev_desc;
+	u64 block_start, block_len;
+	int ret = -ENODEV;
+
+	switch (dfu->layout) {
+	case DFU_RAW_ADDR:
+		/* if buf == NULL return total size of the area */
+		if (!buf) {
+			*len = dfu->data.nand.size;
+			return 0;
+		}
+
+		dev_desc = rockchip_get_bootdev();
+		if (!dev_desc) {
+			printf("%s: dev_desc is NULL!\n", __func__);
+			return -ENODEV;
+		}
+
+		/* in case of ubi partition, erase rest of the partition */
+		if (dfu->data.mtd.ubi && !offset) {
+			block_start = dfu->data.mtd.start >> 9;
+			block_len = dfu->data.mtd.size >> 9;
+
+			ret = blk_derase(dev_desc, block_start, block_len);
+			if (ret != 0)
+				printf("Failure erase: %d\n", ret);
+		}
+
+		block_start = (dfu->data.mtd.start + offset) >> 9;
+		block_len = (*len) >> 9;
+
+		ret = blk_dwrite(dev_desc, block_start, block_len, buf);
+		if (ret == block_len)
+			ret = 0;
+		break;
+	default:
+		printf("%s: Layout (%s) not (yet) supported!\n", __func__,
+		       dfu_get_layout(dfu->layout));
+	}
+
+	return ret;
+}
+
+static int dfu_get_medium_size_mtd(struct dfu_entity *dfu, u64 *size)
+{
+	*size = dfu->data.mtd.size;
+
+	return 0;
+}
+
+static int dfu_read_medium_mtd(struct dfu_entity *dfu, u64 offset, void *buf, long *len)
+{
+	struct blk_desc *dev_desc;
+	u64 block_start, block_len;
+	int ret = -ENODEV;
+
+	switch (dfu->layout) {
+	case DFU_RAW_ADDR:
+		/* if buf == NULL return total size of the area */
+		if (!buf) {
+			*len = dfu->data.nand.size;
+			return 0;
+		}
+
+		dev_desc = rockchip_get_bootdev();
+		if (!dev_desc) {
+			printf("%s: dev_desc is NULL!\n", __func__);
+			return -ENODEV;
+		}
+
+		block_start = (dfu->data.mtd.start + offset) >> 9;
+		block_len = (*len) >> 9;
+
+		ret = blk_dread(dev_desc, block_start, block_len, buf);
+		if (ret == block_len)
+			ret = 0;
+		break;
+	default:
+		printf("%s: Layout (%s) not (yet) supported!\n", __func__,
+		       dfu_get_layout(dfu->layout));
+	}
+
+	return ret;
+}
+
+static int dfu_flush_medium_mtd(struct dfu_entity *dfu)
+{
+	return 0;
+}
+
+unsigned int dfu_polltimeout_mtd(struct dfu_entity *dfu)
+{
+	/*
+	 * Currently, Poll Timeout != 0 is only needed on nand
+	 * ubi partition, as the not used sectors need an erase
+	 */
+	if (dfu->data.mtd.ubi)
+		return DFU_MANIFEST_POLL_TIMEOUT;
+
+	return DFU_DEFAULT_POLL_TIMEOUT;
+}
+
+int dfu_fill_entity_mtd(struct dfu_entity *dfu, char *devstr, char *s)
+{
+	struct blk_desc *dev_desc;
+	disk_partition_t dfu_part;
+	char *st;
+
+	dfu->data.mtd.ubi = 0;
+	dfu->dev_type = DFU_DEV_MTD;
+	st = strsep(&s, " ");
+
+	if (!strcmp(st, "raw")) {
+		dfu->layout = DFU_RAW_ADDR;
+		dfu->data.mtd.start = simple_strtoul(s, &s, 16);
+		s++;
+		dfu->data.mtd.size = simple_strtoul(s, &s, 16);
+	} else if ((!strcmp(st, "part")) || (!strcmp(st, "partubi"))) {
+		dev_desc = rockchip_get_bootdev();
+		if (!dev_desc) {
+			printf("%s: dev_desc is NULL!\n", __func__);
+			return -ENODEV;
+		}
+		dfu->layout = DFU_RAW_ADDR;
+		if (part_get_info_by_name(dev_desc, s, &dfu_part) < 0)
+			return -EIO;
+
+		dfu->data.mtd.start = dfu_part.start << 9;
+		dfu->data.mtd.size = dfu_part.size << 9;
+		if (!strcmp(st, "partubi"))
+			dfu->data.mtd.ubi = 1;
+	} else {
+		printf("%s: Memory layout (%s) not supported!\n", __func__, st);
+		return -1;
+	}
+
+	dfu->get_medium_size = dfu_get_medium_size_mtd;
+	dfu->read_medium = dfu_read_medium_mtd;
+	dfu->write_medium = dfu_write_medium_mtd;
+	dfu->flush_medium = dfu_flush_medium_mtd;
+	dfu->poll_timeout = dfu_polltimeout_mtd;
+
+	/* initial state */
+	dfu->inited = 0;
+
+	return 0;
+}
diff --git a/include/dfu.h b/include/dfu.h
index 7e322d9d27..506291a49e 100644
--- a/include/dfu.h
+++ b/include/dfu.h
@@ -23,6 +23,7 @@ enum dfu_device_type {
 	DFU_DEV_NAND,
 	DFU_DEV_RAM,
 	DFU_DEV_SF,
+	DFU_DEV_MTD,
 };
 
 enum dfu_layout {
@@ -67,6 +68,17 @@ struct nand_internal_data {
 	unsigned int ubi;
 };
 
+struct mtd_internal_data {
+	/* RAW programming */
+	u64 start;
+	u64 size;
+
+	unsigned int dev;
+	unsigned int part;
+	/* for nand/ubi use */
+	unsigned int ubi;
+};
+
 struct ram_internal_data {
 	void		*start;
 	unsigned int	size;
@@ -108,6 +120,7 @@ struct dfu_entity {
 		struct nand_internal_data nand;
 		struct ram_internal_data ram;
 		struct sf_internal_data sf;
+		struct mtd_internal_data mtd;
 	} data;
 
 	int (*get_medium_size)(struct dfu_entity *dfu, u64 *size);
@@ -214,6 +227,17 @@ static inline int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *devstr,
 }
 #endif
 
+#ifdef CONFIG_DFU_MTD
+extern int dfu_fill_entity_mtd(struct dfu_entity *dfu, char *devstr, char *s);
+#else
+static inline int dfu_fill_entity_mtd(struct dfu_entity *dfu, char *devstr,
+				      char *s)
+{
+	puts("MTD support not available!\n");
+	return -1;
+}
+#endif
+
 #ifdef CONFIG_DFU_NAND
 extern int dfu_fill_entity_nand(struct dfu_entity *dfu, char *devstr, char *s);
 #else

commit ca42250799bf3f1fa3a9302c7c000a66e7d9d0a9
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Wed Jan 20 11:35:57 2021 +0800

    drivers: usb: add usb pid for dfu
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: Id823187c0b74fe99c4fdff7fdb85f6d995ed9d28

diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index 3a4c1fcf61..b5dd7ece06 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -87,6 +87,10 @@ int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
 		/* Fix to Google's VID and PID */
 		dev->idVendor  = __constant_cpu_to_le16(0x18d1);
 		dev->idProduct = __constant_cpu_to_le16(0xd00d);
+	} else if (!strncmp(name, "usb_dnl_dfu", 11)) {
+		/* Fix to Rockchip's VID and PID for DFU */
+		dev->idVendor  = cpu_to_le16(0x2207);
+		dev->idProduct = cpu_to_le16(0x0107);
 	}
 
 	return 0;

commit 9c5e2f1dbb99eaf369ad4db5eb753d1bd4ae53d8
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Feb 4 11:55:56 2021 +0800

    disk: efi: correct the partition_entry_lba location
    
    Set partition_entry_lba to 0x2 but not 0x22, otherwise it will
    overlay write the rockchip's idb data in the location 32KB.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ic02859fb135ece6d609320a9df030f041af93a8e

diff --git a/disk/part_efi.c b/disk/part_efi.c
index 1d18302971..0783289432 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -415,7 +415,7 @@ static int part_efi_repair(struct blk_desc *dev_desc, gpt_entry *gpt_pte,
 		gpt_head->header_crc32 = 0;
 		gpt_head->my_lba = 1;
 		gpt_head->alternate_lba = dev_desc->lba - 1;
-		gpt_head->partition_entry_lba = 0x22;
+		gpt_head->partition_entry_lba = 0x2;
 		gpt_head->last_usable_lba = cpu_to_le64(dev_desc->lba - 34);
 		gpt_entry_modify(dev_desc, gpt_pte, gpt_head);
 		calc_crc32 = efi_crc32((const unsigned char *)gpt_head,

commit f703e20cccbf96883145088dadc3c89c39915f83
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 26 21:03:50 2021 +0800

    configs: add rk3568-aarch32.config
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If3fb2c2febae8dc3a810f6748283d5527e248439

diff --git a/configs/rk3568-aarch32.config b/configs/rk3568-aarch32.config
new file mode 100644
index 0000000000..2449878666
--- /dev/null
+++ b/configs/rk3568-aarch32.config
@@ -0,0 +1,30 @@
+CONFIG_AMP=y
+CONFIG_ARM64_BOOT_AARCH32=y
+# CONFIG_ARM64_SUPPORT_AARCH32 is not set
+# CONFIG_ARMV7_LPAE is not set
+CONFIG_BASE_DEFCONFIG="rk3568_defconfig"
+CONFIG_BOOTP_PXE_CLIENTARCH=0x15
+CONFIG_BOOTP_VCI_STRING="U-Boot.armv7"
+CONFIG_CPU_V7=y
+# CONFIG_DEBUG_LL is not set
+# CONFIG_GICV3 is not set
+CONFIG_HAS_THUMB2=y
+CONFIG_HAS_VBAR=y
+CONFIG_HAVE_PRIVATE_LIBGCC=y
+# CONFIG_PHYS_64BIT is not set
+CONFIG_ROCKCHIP_AMP=y
+CONFIG_SKIP_RELOCATE_UBOOT=y
+# CONFIG_SPL_DM_SERIAL is not set
+# CONFIG_SPL_OF_LIBFDT is not set
+CONFIG_SPL_SYS_THUMB_BUILD=y
+CONFIG_SPL_USE_ARCH_MEMCPY=y
+CONFIG_SPL_USE_ARCH_MEMSET=y
+CONFIG_SYS_ARM_ARCH=7
+CONFIG_SYS_CPU="armv7"
+CONFIG_SYS_THUMB_BUILD=y
+# CONFIG_TPL_DM_SERIAL is not set
+CONFIG_TPL_USE_ARCH_MEMCPY=y
+CONFIG_TPL_USE_ARCH_MEMSET=y
+CONFIG_USE_ARCH_MEMCPY=y
+CONFIG_USE_ARCH_MEMSET=y
+CONFIG_USE_PRIVATE_LIBGCC=y

commit f345af8b360a5ef4527e2f382894ed7ec3b83fea
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 26 17:58:52 2021 +0800

    rockchip: rk3568: add AArch32 build support
    
    SPL and TPL is still in AArch64 mode.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I4768903d1dbdd06359eb196607b67fb128dea644

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index be5c8d7a1a..8ccac93638 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -383,16 +383,15 @@ endif
 
 config ROCKCHIP_RK3568
 	bool "Support Rockchip RK3568"
-	select ARM64
+	select ARM64 if !ARM64_BOOT_AARCH32
 	select ARM_SMCCC
-	select GICV3
-	select SPL
-	select SUPPORT_TPL
-	select SUPPORT_SPL
+	select GICV3 if !ARM64_BOOT_AARCH32
+	select SUPPORT_TPL if !ARM64_BOOT_AARCH32
+	select SUPPORT_SPL if !ARM64_BOOT_AARCH32
 	select TPL_TINY_FRAMEWORK if TPL
 	select DEBUG_UART_BOARD_INIT
-	imply TPL
-	imply SPL
+	imply TPL if !ARM64_BOOT_AARCH32
+	imply SPL if !ARM64_BOOT_AARCH32
 	imply TPL_SERIAL_SUPPORT
 	help
 	  The Rockchip RK3568 is a ARM-based SoC with a quad-core Cortex-A55.
diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c
index 14396a3bef..314dfb9dc7 100644
--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
@@ -458,6 +458,9 @@ enum {
 	UART5_IO_SEL_M1,
 };
 
+#ifdef CONFIG_ARM64
+#include <asm/armv8/mmu.h>
+
 static struct mm_region rk3568_mem_map[] = {
 	{
 		.virt = 0x0UL,
@@ -486,6 +489,7 @@ static struct mm_region rk3568_mem_map[] = {
 };
 
 struct mm_region *mem_map = rk3568_mem_map;
+#endif
 
 void board_debug_uart_init(void)
 {

commit 89031de1320fb4c9aaefd4297dbfd9161787470a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 26 20:49:21 2021 +0800

    Kconfig: Add CONFIG_FIT dependent for fit image generation
    
    It's possible that we don't need SPL if we set CONFIG_ARM64_BOOT_AARCH32=y,
    but uboot.img with FIT format is still required to be generated.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I5330f58f9ca5a18a119bdcbfd4e9e716a69b1131

diff --git a/Kconfig b/Kconfig
index 1345a0671c..05aa539ccc 100644
--- a/Kconfig
+++ b/Kconfig
@@ -317,9 +317,24 @@ config SPL_FIT_IMAGE_POST_PROCESS
 	  injected into the FIT creation (i.e. the blobs would have been pre-
 	  processed before being added to the FIT image).
 
+config SPL_FIT_HW_CRYPTO
+	bool "Enable SPL hardware crypto for FIT image checksum and rsa verify"
+	depends on SPL_DM_CRYPTO
+	help
+	  Enable SPL hardware crypto for FIT image checksum and rsa verify.
+
+config SPL_SYS_DCACHE_OFF
+	bool "Disable SPL dcache"
+	default y
+	help
+	  Disable SPL dcache. Please make sure CONFIG_SPL_SYS_MALLOC_F_LEN
+	  is large enough to malloc TLB and bd_t buffer while enabling dcache.
+
+endif # SPL
+
 config SPL_FIT_SOURCE
 	string ".its source file for U-Boot FIT image"
-	depends on SPL_FIT
+	depends on SPL_FIT || FIT
 	help
 	  Specifies a (platform specific) FIT source file to generate the
 	  U-Boot FIT image. This could specify further image to load and/or
@@ -327,7 +342,7 @@ config SPL_FIT_SOURCE
 
 config SPL_FIT_GENERATOR
 	string ".its file generator script for U-Boot FIT image"
-	depends on SPL_FIT
+	depends on SPL_FIT || FIT
 	default "board/sunxi/mksunxi_fit_atf.sh" if SPL_LOAD_FIT && ARCH_SUNXI
 	help
 	  Specifies a (platform specific) script file to generate the FIT
@@ -335,35 +350,20 @@ config SPL_FIT_GENERATOR
 	  passed a list of supported device tree file stub names to
 	  include in the generated image.
 
-config SPL_FIT_HW_CRYPTO
-	bool "Enable SPL hardware crypto for FIT image checksum and rsa verify"
-	depends on SPL_DM_CRYPTO
-	help
-	  Enable SPL hardware crypto for FIT image checksum and rsa verify.
-
 config SPL_FIT_IMAGE_KB
 	int "SPL FIT image size in KiB"
-	depends on SPL_FIT
+	depends on SPL_FIT || FIT
 	default 2048
 	help
 	  SPL FIT image size in KiB, default 2048KB = 1024KB(u-boot) + 1024KB(tee/atf + others).
 
 config SPL_FIT_IMAGE_MULTIPLE
 	int "SPL FIT image multiple number"
-	depends on SPL_FIT
+	depends on SPL_FIT || FIT
 	default 2
 	help
 	  SPL FIT image multiple number.
 
-config SPL_SYS_DCACHE_OFF
-	bool "Disable SPL dcache"
-	default y
-	help
-	  Disable SPL dcache. Please make sure CONFIG_SPL_SYS_MALLOC_F_LEN
-	  is large enough to malloc TLB and bd_t buffer while enabling dcache.
-
-endif # SPL
-
 endif # FIT
 
 config OF_BOARD_SETUP

commit 3ae4136e017706fd7fc2181d7927f079c7308ee3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jan 29 20:08:03 2021 +0800

    rockchip: rk3568: enable hardware rand library
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ib537ad840d81fe152969166d6a37c4ddb64f1de7

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index 532e312669..8693615909 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -190,7 +190,6 @@ CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
-CONFIG_LIB_RAND=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_RSA=y
 CONFIG_SPL_RSA=y
diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h
index 712ae83b51..32c6ed100a 100644
--- a/include/configs/rk3568_common.h
+++ b/include/configs/rk3568_common.h
@@ -90,4 +90,6 @@
 #define CONFIG_USB_OHCI_NEW
 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	1
 
+#define CONFIG_LIB_HW_RAND
+
 #endif

commit 3f0522ce8f818e3e777279b8f7c55abc694954a3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jan 29 20:06:29 2021 +0800

    rng: rockchip: add hardware rand library
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Id22c5725158d86cc8a2ff80fdf09b0146d04be41

diff --git a/drivers/rng/Makefile b/drivers/rng/Makefile
index 471cf5d6a4..58cee3a56e 100644
--- a/drivers/rng/Makefile
+++ b/drivers/rng/Makefile
@@ -5,3 +5,8 @@
 
 obj-$(CONFIG_DM_RNG) += rng-uclass.o
 obj-$(CONFIG_RNG_ROCKCHIP) += rockchip_rng.o
+
+ifdef CONFIG_LIB_HW_RAND
+obj-$(CONFIG_RNG_ROCKCHIP) += rockchip_rand.o
+endif
+
diff --git a/drivers/rng/rockchip_rand.c b/drivers/rng/rockchip_rand.c
new file mode 100644
index 0000000000..e8bac8f629
--- /dev/null
+++ b/drivers/rng/rockchip_rand.c
@@ -0,0 +1,40 @@
+/*
+ * (C) Copyright 2021 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#include <common.h>
+#include <dm.h>
+#include <rng.h>
+
+unsigned int rand_r(unsigned int *seedp)
+{
+	struct udevice *dev;
+	unsigned int rand;
+	int ret;
+
+	ret = uclass_get_device(UCLASS_RNG, 0, &dev);
+	if (ret) {
+		printf("No RNG device, ret=%d\n", ret);
+		return ret;
+	}
+
+	ret = dm_rng_read(dev, &rand, sizeof(unsigned int));
+	if (ret) {
+		printf("Reading RNG failed, ret=%d\n", ret);
+		return ret;
+	}
+
+	return rand;
+}
+
+unsigned int rand(void)
+{
+	return rand_r(0);
+}
+
+void srand(unsigned int seed)
+{
+	/* nothing to do */
+}
+

commit 61269371229b5981bc6e192da2bb53bab7324ba5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jan 29 19:14:12 2021 +0800

    net: Kconfig: imply LIB_RAND for NET_RANDOM_ETHADDR
    
    Allow disabled in defconfig.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ic7794bb9c1619e30f07b008aca60addcc8ef22fd

diff --git a/net/Kconfig b/net/Kconfig
index 414c5497c7..90d5a2fb99 100644
--- a/net/Kconfig
+++ b/net/Kconfig
@@ -9,7 +9,7 @@ if NET
 
 config NET_RANDOM_ETHADDR
 	bool "Random ethaddr if unset"
-	select LIB_RAND
+	imply LIB_RAND
 	help
 	  Selecting this will allow the Ethernet interface to function
 	  even when the ethaddr variable for that interface is unset.

commit a225402cf7b41b5aeba9f2f2be4b49db81a7dd4b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jan 25 09:38:23 2021 +0800

    rockchip: board.c: support reboot stess test
    
    It's a way to test system stability before kernel stages.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I6679fbbbaa7233750b409b6b832849d8dbd36893

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index f1c2ec3045..be5c8d7a1a 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -777,6 +777,12 @@ config ROCKCHIP_UART_MUX_SEL_M
 	help
 	  This select uart multiplexer for debug uart iomux in board_debug_uart_init.
 
+config ROCKCHIP_REBOOT_TEST
+	bool "Rockchip reboot stress test before kernel"
+	default n
+	help
+	  It's a reboot stress test before kernel stages.
+
 config BASE_DEFCONFIG
 	string "Base defconfig of config fragment"
 	default ""
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 6e9f03e5a6..d1e59655e0 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -912,6 +912,10 @@ void board_quiesce_devices(void *images)
 	atags_destroy();
 #endif
 
+#ifdef CONFIG_ROCKCHIP_REBOOT_TEST
+	do_reset(NULL, 0, 0, NULL);
+#endif
+
 #ifdef CONFIG_FIT_ROLLBACK_PROTECT
 	int ret;
 

commit 4b1cd58cd07765061b4c2d805777355a9d2a7ba4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Jan 17 18:06:29 2021 +0800

    scripts: fit: support sign recovery.img
    
    Add args:
            --recovery_img
            --rollback-index-recovery
            --version-recovery
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Iabd9a78155f1d6e10b9539bb9fee6d17153b8074

diff --git a/scripts/fit.sh b/scripts/fit.sh
index 66aa61244c..b05e9ee94e 100755
--- a/scripts/fit.sh
+++ b/scripts/fit.sh
@@ -9,16 +9,21 @@ set -e
 FIT_DIR="fit"
 IMG_UBOOT="uboot.img"
 IMG_BOOT="boot.img"
+IMG_RECOVERY="recovery.img"
 ITB_UBOOT="${FIT_DIR}/uboot.itb"
 ITB_BOOT="${FIT_DIR}/boot.itb"
+ITB_RECOVERY="${FIT_DIR}/recovery.itb"
 SIG_BIN="data2sign.bin"
 SIG_UBOOT="${FIT_DIR}/uboot.data2sign"
 SIG_BOOT="${FIT_DIR}/boot.data2sign"
+SIG_RECOVERY="${FIT_DIR}/recovery.data2sign"
 # offs
 OFFS_NS_UBOOT="0xc00"
 OFFS_S_UBOOT="0xc00"
 OFFS_NS_BOOT="0x800"
 OFFS_S_BOOT="0xc00"
+OFFS_NS_RECOVERY="0x800"
+OFFS_S_RECOVERY="0xc00"
 # file
 CHIP_FILE="arch/arm/lib/.asm-offsets.s.cmd"
 # placeholder address
@@ -39,8 +44,10 @@ UBOOT_DTB="u-boot.dtb"
 # its
 ITS_UBOOT="u-boot.its"
 ITS_BOOT="boot.its"
+ITS_RECOVERY="recovery.its"
 ARG_VER_UBOOT="0"
 ARG_VER_BOOT="0"
+ARG_VER_RECOVERY="0"
 
 function help()
 {
@@ -49,16 +56,19 @@ function help()
 	echo "    $0 [args]"
 	echo
 	echo "args:"
-	echo "    --rollback-index-boot   <decimal integer>"
-	echo "    --rollback-index-uboot  <decimal integer>"
-	echo "    --version-uboot         <decimal integer>"
-	echo "    --version-boot          <decimal integer>"
-	echo "    --ini-trust"
-	echo "    --ini-loader"
+	echo "    --rollback-index-recovery  <decimal integer>"
+	echo "    --rollback-index-boot      <decimal integer>"
+	echo "    --rollback-index-uboot     <decimal integer>"
+	echo "    --version-recovery         <decimal integer>"
+	echo "    --version-boot             <decimal integer>"
+	echo "    --version-uboot            <decimal integer>"
+	echo "    --boot_img                 <boot image>"
+	echo "    --recovery_img             <recovery image>"
+	echo "    --args                     <arg>"
+	echo "    --ini-loader               <loader ini file>"
+	echo "    --ini-trust                <trust ini file>"
 	echo "    --no-check"
 	echo "    --spl-new"
-	echo "    --boot_img"
-	echo "    --args"
 	echo
 }
 
@@ -95,7 +105,7 @@ function validate_arg()
 		--no-check|--spl-new|--burn-key-hash)
 			shift=1
 			;;
-		--ini-trust|--ini-loader|--rollback-index-boot|--rollback-index-uboot|--boot_img|--version-uboot|--version-boot)
+		--ini-trust|--ini-loader|--rollback-index-boot|--rollback-index-recovery|--rollback-index-uboot|--boot_img|--recovery_img|--version-uboot|--version-boot|--version-recovery)
 			shift=2
 			;;
 		*)
@@ -122,6 +132,10 @@ function fit_process_args()
 				ARG_BOOT_IMG=$2
 				shift 2
 				;;
+			--recovery_img) # recovery.img
+				ARG_RECOVERY_IMG=$2
+				shift 2
+				;;
 			--boot_img_dir) # boot.img components directory
 				ARG_BOOT_IMG_DIR=$2
 				shift 2
@@ -147,6 +161,11 @@ function fit_process_args()
 				arg_check_decimal $2
 				shift 2
 				;;
+			--rollback-index-recovery)
+				ARG_ROLLBACK_IDX_RECOVERY=$2
+				arg_check_decimal $2
+				shift 2
+				;;
 			--rollback-index-uboot)
 				ARG_ROLLBACK_IDX_UBOOT=$2
 				arg_check_decimal $2
@@ -162,6 +181,11 @@ function fit_process_args()
 				arg_check_decimal $2
 				shift 2
 				;;
+			--version-recovery)
+				ARG_VER_RECOVERY=$2
+				arg_check_decimal $2
+				shift 2
+				;;
 			--burn-key-hash)
 				ARG_BURN_KEY_HASH="y"
 				shift 1
@@ -414,6 +438,94 @@ function fit_gen_boot_itb()
 	mv ${ITS_BOOT} ${FIT_DIR}
 }
 
+function fit_gen_recovery_itb()
+{
+	if [ ! -z ${ARG_RECOVERY_IMG} ]; then
+		${FIT_UNPACK} -f ${ARG_RECOVERY_IMG} -o ${FIT_DIR}/unpack
+		ITS_RECOVERY="${FIT_DIR}/unpack/image.its"
+	else
+		echo "ERROR: No recovery.img"
+		exit 1
+	fi
+
+	if [ "${ARG_SIGN}" != "y" ]; then
+		${MKIMAGE} -f ${ITS_RECOVERY} -E -p ${OFFS_NS_RECOVERY} ${ITB_RECOVERY} -v ${ARG_VER_RECOVERY}
+	else
+		if [ ! -f ${RSA_PRI_KEY}  ]; then
+			echo "ERROR: No ${RSA_PRI_KEY}"
+			exit 1
+		elif [ ! -f ${RSA_PUB_KEY}  ]; then
+			echo "ERROR: No ${RSA_PUB_KEY}"
+			exit 1
+		fi
+
+		if ! grep -q '^CONFIG_FIT_SIGNATURE=y' .config ; then
+			echo "ERROR: CONFIG_FIT_SIGNATURE is disabled"
+			exit 1
+		fi
+
+		if grep -q '^CONFIG_FIT_ROLLBACK_PROTECT=y' .config ; then
+			ARG_ROLLBACK_PROTECT="y"
+			if [ -z ${ARG_ROLLBACK_IDX_RECOVERY} ]; then
+				echo "ERROR: No arg \"--rollback-index-recovery <n>\""
+				exit 1
+			fi
+		fi
+
+		# fixup
+		COMMON_FILE=`sed -n "/_common.h/p" ${CHIP_FILE} | awk '{ print $1 }'`
+		FDT_ADDR_R=`awk /fdt_addr_r/         ${COMMON_FILE} | awk -F '=' '{ print $2 }' | awk -F '\\' '{ print $1 }'`
+		KERNEL_ADDR_R=`awk /kernel_addr_r/   ${COMMON_FILE} | awk -F '=' '{ print $2 }' | awk -F '\\' '{ print $1 }'`
+		RMADISK_ADDR_R=`awk /ramdisk_addr_r/ ${COMMON_FILE} | awk -F '=' '{ print $2 }' | awk -F '\\' '{ print $1 }'`
+		sed -i "s/${FDT_ADDR_PLACEHOLDER}/${FDT_ADDR_R}/g"         ${ITS_RECOVERY}
+		sed -i "s/${KERNEL_ADDR_PLACEHOLDER}/${KERNEL_ADDR_R}/g"   ${ITS_RECOVERY}
+		sed -i "s/${RAMDISK_ADDR_PLACEHOLDER}/${RMADISK_ADDR_R}/g" ${ITS_RECOVERY}
+		if grep -q '^CONFIG_ARM64=y' .config ; then
+			sed -i 's/arch = "arm";/arch = "arm64";/g' ${ITS_RECOVERY}
+		fi
+
+		if [ "${ARG_ROLLBACK_PROTECT}" == "y" ]; then
+			VERSION=`grep 'rollback-index' ${ITS_RECOVERY} | awk -F '=' '{ printf $2 }' | tr -d ' '`
+			sed -i "s/rollback-index = ${VERSION}/rollback-index = <${ARG_ROLLBACK_IDX_RECOVERY}>;/g" ${ITS_RECOVERY}
+		fi
+
+		${MKIMAGE} -f ${ITS_RECOVERY} -k ${KEY_DIR} -K ${UBOOT_DTB} -E -p ${OFFS_S_RECOVERY} -r ${ITB_RECOVERY} -v ${ARG_VER_RECOVERY}
+		mv ${SIG_BIN} ${SIG_RECOVERY}
+
+		# rollback-index read back check
+		if [ "${ARG_ROLLBACK_PROTECT}" == "y" ]; then
+			VERSION=`fdtget -ti ${ITB_RECOVERY} /configurations/conf rollback-index`
+			if [ "${VERSION}" != "${ARG_ROLLBACK_IDX_RECOVERY}" ]; then
+				echo "ERROR: Failed to set rollback-index for ${ITB_RECOVERY}";
+				exit 1
+			fi
+		fi
+
+		# host check signature
+		if [ "${ARG_NO_CHECK}" != "y" ]; then
+			 ${CHECK_SIGN} -f ${ITB_RECOVERY} -k ${UBOOT_DTB}
+		fi
+
+		# minimize u-boot.dtb: clearn as 0 but not remove property.
+		if grep -q '^CONFIG_FIT_HW_CRYPTO=y' .config ; then
+			fdtput -tx ${UBOOT_DTB} ${SIGNATURE_KEY_NODE} rsa,r-squared 0x0
+			if grep -q '^CONFIG_ROCKCHIP_CRYPTO_V1=y' .config ; then
+				fdtput -tx ${UBOOT_DTB} ${SIGNATURE_KEY_NODE} rsa,np 0x0
+			else
+				fdtput -tx ${UBOOT_DTB} ${SIGNATURE_KEY_NODE} rsa,c 0x0
+			fi
+		else
+			fdtput -tx ${UBOOT_DTB} ${SIGNATURE_KEY_NODE} rsa,c 0x0
+			fdtput -tx ${UBOOT_DTB} ${SIGNATURE_KEY_NODE} rsa,np 0x0
+			fdtput -tx ${UBOOT_DTB} ${SIGNATURE_KEY_NODE} rsa,exponent-BN 0x0
+		fi
+		fdtput -r ${UBOOT_DTB} ${SIGNATURE_KEY_NODE}/hash@c
+		fdtput -r ${UBOOT_DTB} ${SIGNATURE_KEY_NODE}/hash@np
+	fi
+
+	mv ${ITS_RECOVERY} ${FIT_DIR}
+}
+
 function fit_gen_uboot_img()
 {
 	ITB=$1
@@ -453,6 +565,19 @@ function fit_gen_boot_img()
 	fi
 }
 
+function fit_gen_recovery_img()
+{
+	ITB=$1
+
+	if [ -z ${ITB} ]; then
+		ITB=${ITB_RECOVERY}
+	fi
+
+	if [ "${ITB}" != "${IMG_RECOVERY}" ]; then
+		cp ${ITB} ${IMG_RECOVERY} -f
+	fi
+}
+
 function fit_msg_uboot()
 {
 	if [ "${ARG_SIGN}" != "y" ]; then
@@ -475,6 +600,10 @@ function fit_msg_uboot()
 
 function fit_msg_boot()
 {
+	if [ -z "${ARG_BOOT_IMG}" ]; then
+		return;
+	fi
+
 	if [ "${ARG_SIGN}" != "y" ]; then
 		MSG_SIGN="no-signed"
 	else
@@ -493,42 +622,57 @@ function fit_msg_boot()
 	fi
 }
 
+function fit_msg_recovery()
+{
+	if [ -z "${ARG_RECOVERY_IMG}" ]; then
+		return;
+	fi
+
+	if [ "${ARG_SIGN}" != "y" ]; then
+		MSG_SIGN="no-signed"
+	else
+		MSG_SIGN="signed"
+	fi
+
+	VERSION=`fdtget -ti ${ITB_RECOVERY} / version`
+	if [ "${VERSION}" != "" ]; then
+		MSG_VER=", version=${VERSION}"
+	fi
+
+	if [ "${ARG_ROLLBACK_PROTECT}" == "y" ]; then
+		echo "Image(${MSG_SIGN}${MSG_VER}, rollback-index=${ARG_ROLLBACK_IDX_RECOVERY}):  ${IMG_RECOVERY} is ready"
+	else
+		echo "Image(${MSG_SIGN}${MSG_VER}):  ${IMG_RECOVERY} (FIT with kernel, fdt, resource...) is ready"
+	fi
+}
+
 function fit_msg_loader()
 {
 	LOADER=`ls *loader*.bin`
 	echo "Image(no-signed):  ${LOADER} (with spl, ddr, usbplug) is ready"
 }
 
-function fit_generate_uboot()
-{
-	fit_raw_compile
-	fit_gen_uboot_itb
-	fit_gen_uboot_img
-	echo
-	fit_msg_uboot
-}
+fit_process_args $*
 
-function fit_generate_uboot_boot()
-{
+if [ ! -z "${ARG_VALIDATE}" ]; then
+	validate_arg ${ARG_VALIDATE}
+else
 	fit_raw_compile
-	fit_gen_boot_itb
-	fit_gen_boot_img
+	if [ ! -z "${ARG_RECOVERY_IMG}" ]; then
+		fit_gen_recovery_itb
+		fit_gen_recovery_img
+	fi
+	# "--boot_img_dir" is for U-Boot debug only
+	if [ ! -z "${ARG_BOOT_IMG}" -o ! -z "${ARG_BOOT_IMG_DIR}" ]; then
+		fit_gen_boot_itb
+		fit_gen_boot_img
+	fi
 	fit_gen_uboot_itb
 	fit_gen_uboot_img
-	echo
 
+	echo
 	fit_msg_uboot
+	fit_msg_recovery
 	fit_msg_boot
 	fit_msg_loader
-	echo
-}
-
-fit_process_args $*
-if [ ! -z "${ARG_VALIDATE}" ]; then
-	validate_arg ${ARG_VALIDATE}
-elif [ ! -z "${ARG_BOOT_IMG}" -o ! -z "${ARG_BOOT_IMG_DIR}" ]; then
-	fit_generate_uboot_boot
-else
-	fit_generate_uboot
 fi
-

commit 6221c090c7379f5b2e9f3d64529647bd4c7a6668
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Sat Jan 30 15:43:02 2021 +0800

    dm: mmc: add more conditions to judge whether print the info
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I94f60c9102c8708d7fa84e729762bfe2956d4fd5

diff --git a/drivers/mmc/mmc-uclass.c b/drivers/mmc/mmc-uclass.c
index ddfb045e10..4c89eb45bf 100644
--- a/drivers/mmc/mmc-uclass.c
+++ b/drivers/mmc/mmc-uclass.c
@@ -29,7 +29,8 @@ int dm_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
 		ret = -ENOSYS;
 	mmmc_trace_after_send(mmc, cmd, ret);
 
-	if (ret)
+	if (ret && cmd->cmdidx != SD_CMD_SEND_IF_COND
+	    && cmd->cmdidx != MMC_CMD_APP_CMD)
 		printf("MMC error: The cmd index is %d, ret is %d\n", cmd->cmdidx, ret);
 
 	return ret;
@@ -49,7 +50,8 @@ int dm_mmc_send_cmd_prepare(struct udevice *dev, struct mmc_cmd *cmd,
 	else
 		ret = -ENOSYS;
 	mmmc_trace_after_send(mmc, cmd, ret);
-	if (ret)
+	if (ret && cmd->cmdidx != SD_CMD_SEND_IF_COND
+	    && cmd->cmdidx != MMC_CMD_APP_CMD)
 		printf("MMC error: The cmd index is %d, ret is %d\n", cmd->cmdidx, ret);
 
 	return ret;

commit cc7b616de815e58f1098f82b95af19fb5ea66ea3
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue Jan 26 14:02:18 2021 +0800

    mtd: spinand: Enable FM25S02A QE bits
    
    Change-Id: I247212779443f0166a633968203824e6552d669e
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/fmsh.c b/drivers/mtd/nand/spi/fmsh.c
index 97a4c1467b..73c961e84e 100644
--- a/drivers/mtd/nand/spi/fmsh.c
+++ b/drivers/mtd/nand/spi/fmsh.c
@@ -93,12 +93,12 @@ static const struct spinand_info fmsh_spinand_table[] = {
 		     0,
 		     SPINAND_ECCINFO(&fm25s01a_ooblayout, NULL)),
 	SPINAND_INFO("FM25S02A", 0xE5,
-		     NAND_MEMORG(1, 2048, 64, 64, 2048, 1, 1, 1),
+		     NAND_MEMORG(1, 2048, 64, 64, 2048, 2, 1, 1),
 		     NAND_ECCREQ(1, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
 					      &write_cache_variants,
 					      &update_cache_variants),
-		     0,
+		     1,
 		     SPINAND_ECCINFO(&fm25s01a_ooblayout, NULL)),
 	SPINAND_INFO("FM25S01", 0xA1,
 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),

commit f54f4b43d9a358593f28a638c2e782b08a2d9ff7
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Fri Jan 29 16:56:47 2021 +0800

    rockchip: dts: rv1126: modify rng & crypto node
    
    The RNG driver is separate from the Crypto driver.
    
    Change-Id: I51b39e337106988d5444246a53e46c27644effb0
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/arch/arm/dts/rv1126-u-boot.dtsi b/arch/arm/dts/rv1126-u-boot.dtsi
index 53df9e2ff3..c49fe2a010 100644
--- a/arch/arm/dts/rv1126-u-boot.dtsi
+++ b/arch/arm/dts/rv1126-u-boot.dtsi
@@ -15,14 +15,6 @@
 		u-boot,spl-boot-order = &sdmmc, &spi_nand, &spi_nor, &nandc, &emmc;
 	};
 
-	crypto: crypto@ff500000 {
-		compatible = "rockchip,rv1126-crypto";
-		reg = <0xff500000 0x10000>;
-		clock-names = "sclk_crypto", "sclk_crypto_apk";
-		clocks = <&cru CLK_CRYPTO_CORE>, <&cru CLK_CRYPTO_PKA>;
-		clock-frequency = <200000000>, <300000000>;
-	};
-
 	secure_otp: secure_otp@0xff5d0000 {
 		compatible = "rockchip,rv1126-secure-otp";
 		reg = <0xff5d0000 0x4000>;
@@ -275,6 +267,11 @@
 	status = "okay";
 };
 
+&rng {
+	u-boot,dm-spl;
+	status = "okay";
+};
+
 &clk_out_ethernetm1_pins{
 	u-boot,dm-pre-reloc;
 	status = "okay";
diff --git a/arch/arm/dts/rv1126.dtsi b/arch/arm/dts/rv1126.dtsi
index 85cce78727..30995ddc81 100644
--- a/arch/arm/dts/rv1126.dtsi
+++ b/arch/arm/dts/rv1126.dtsi
@@ -995,20 +995,17 @@
 		status = "disabled";
 	};
 
+	crypto: crypto@ff500000 {
+		compatible = "rockchip,rv1126-crypto";
+		reg = <0xff500000 0x10000>;
+		clock-names = "sclk_crypto", "sclk_crypto_apk";
+		clocks = <&cru CLK_CRYPTO_CORE>, <&cru CLK_CRYPTO_PKA>;
+		clock-frequency = <200000000>, <300000000>;
+	};
+
 	rng: rng@ff500000 {
 		compatible = "rockchip,cryptov2-rng";
-		reg = <0xff500000 0x4000>;
-		clocks = <&cru CLK_CRYPTO_CORE>, <&cru CLK_CRYPTO_PKA>,
-			<&cru ACLK_CRYPTO>, <&cru HCLK_CRYPTO>;
-		clock-names = "clk_crypto", "clk_crypto_apk",
-				"aclk_crypto", "hclk_crypto";
-		assigned-clocks = <&cru CLK_CRYPTO_CORE>, <&cru CLK_CRYPTO_PKA>,
-					<&cru ACLK_CRYPTO>, <&cru HCLK_CRYPTO>;
-		assigned-clock-rates = <150000000>, <150000000>,
-					<200000000>, <100000000>;
-		power-domains = <&power RV1126_PD_CRYPTO>;
-		resets = <&cru SRST_CRYPTO_CORE>;
-		reset-names = "reset";
+		reg = <0xff500000 0x2000>;
 		status = "disabled";
 	};
 

commit 395a594bd597f73b76009404346a50baeb03862e
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Fri Jan 29 10:14:13 2021 +0800

    configs: rv1126: enable rng module
    
    CONFIG_DM_RNG=y
    CONFIG_RNG_ROCKCHIP=y
    
    Change-Id: Ia0ad252c4886fed33ffca681df926d6ed4e6bc73
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index d7b80dbccb..4e97e6d605 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -96,6 +96,8 @@ CONFIG_DM_CRYPTO=y
 CONFIG_SPL_DM_CRYPTO=y
 CONFIG_ROCKCHIP_CRYPTO_V2=y
 CONFIG_SPL_ROCKCHIP_CRYPTO_V2=y
+CONFIG_DM_RNG=y
+CONFIG_RNG_ROCKCHIP=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y

commit 548715c7d5ed761875cc95bcb03b9b4519687db6
Author: David Wu <david.wu@rock-chips.com>
Date:   Fri Jan 8 10:53:05 2021 +0800

    UPSTREAM: net: eth-uclass: Change uclass driver name to ethernet
    
    dev_read_alias_seq() used uc_drv->name compared to alias
    stem string, Ethernet's alias stem uses "ethernet", which
    does not match the eth-uclass driver name "eth", can not
    get the correct index of ethernet alias namer. So it seems
    change uclass driver name to match the alias stem is a more
    reasonable way.
    
    (cherry picked from commit 1231184caacad32c180d7e2338a645f7dfe9571a)
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    
    Change-Id: I2ebbf20ae2a127456f92dc79461610b7b339c8f3
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/net/eth-uclass.c b/net/eth-uclass.c
index ff28351a0d..bd153ac13a 100644
--- a/net/eth-uclass.c
+++ b/net/eth-uclass.c
@@ -546,8 +546,8 @@ static int eth_pre_remove(struct udevice *dev)
 	return 0;
 }
 
-UCLASS_DRIVER(eth) = {
-	.name		= "eth",
+UCLASS_DRIVER(ethernet) = {
+	.name		= "ethernet",
 	.id		= UCLASS_ETH,
 	.post_bind	= eth_post_bind,
 	.pre_unbind	= eth_pre_unbind,

commit a3341e90177f5e5bdb9f99c5f909c3c73fb2c390
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Fri Jan 29 09:13:52 2021 +0800

    drivers: crypto: drop rng api from crypto driver
    
    rng module is not belongs to crypto driver anymore.
    
    Change-Id: I6d837397621267edb586034ff87b82fc33a30d5b
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/drivers/crypto/crypto-uclass.c b/drivers/crypto/crypto-uclass.c
index c6e4c2dbdc..c1c4c08bc9 100644
--- a/drivers/crypto/crypto-uclass.c
+++ b/drivers/crypto/crypto-uclass.c
@@ -206,16 +206,6 @@ int crypto_rsa_verify(struct udevice *dev, rsa_key *ctx, u8 *sign, u8 *output)
 	return ops->rsa_verify(dev, ctx, sign, output);
 }
 
-int crypto_get_trng(struct udevice *dev, u8 *output, u32 len)
-{
-	const struct dm_crypto_ops *ops = device_get_ops(dev);
-
-	if (!ops || !ops->get_trng)
-		return -ENOSYS;
-
-	return ops->get_trng(dev, output, len);
-}
-
 UCLASS_DRIVER(crypto) = {
 	.id	= UCLASS_CRYPTO,
 	.name	= "crypto",
diff --git a/drivers/crypto/rockchip/crypto_v2.c b/drivers/crypto/rockchip/crypto_v2.c
index aef4de95bd..85c26b152b 100644
--- a/drivers/crypto/rockchip/crypto_v2.c
+++ b/drivers/crypto/rockchip/crypto_v2.c
@@ -87,19 +87,6 @@ typedef u32 paddr_t;
 
 fdt_addr_t crypto_base;
 
-static int hw_check_trng_exist(void)
-{
-	u32 tmp = 0, val = 0;
-
-	tmp = crypto_read(CRYPTO_RNG_SAMPLE_CNT);
-	crypto_write(50, CRYPTO_RNG_SAMPLE_CNT);
-
-	val = crypto_read(CRYPTO_RNG_SAMPLE_CNT);
-	crypto_write(tmp, CRYPTO_RNG_SAMPLE_CNT);
-
-	return val;
-}
-
 static void word2byte(u32 word, u8 *ch, u32 endian)
 {
 	/* 0: Big-Endian 1: Little-Endian */
@@ -361,42 +348,6 @@ exit:
 	return ret;
 }
 
-static int rk_trng(u8 *trng, u32 len)
-{
-	u32 i, reg_ctrl = 0;
-	int ret = -EINVAL;
-	u32 buf[8];
-
-	if (len > CRYPTO_TRNG_MAX)
-		return -EINVAL;
-
-	memset(buf, 0, sizeof(buf));
-
-	/* enable osc_ring to get entropy, sample period is set as 50 */
-	crypto_write(50, CRYPTO_RNG_SAMPLE_CNT);
-
-	reg_ctrl |= CRYPTO_RNG_256_bit_len;
-	reg_ctrl |= CRYPTO_RNG_SLOWER_SOC_RING_1;
-	reg_ctrl |= CRYPTO_RNG_ENABLE;
-	reg_ctrl |= CRYPTO_RNG_START;
-	reg_ctrl |= CRYPTO_WRITE_MASK_ALL;
-
-	crypto_write(reg_ctrl | CRYPTO_WRITE_MASK_ALL, CRYPTO_RNG_CTL);
-	RK_WHILE_TIME_OUT(crypto_read(CRYPTO_RNG_CTL) & CRYPTO_RNG_START,
-			  RK_CRYPTO_TIME_OUT, ret);
-
-	if (ret == 0) {
-		for (i = 0; i < ARRAY_SIZE(buf); i++)
-			buf[i] = crypto_read(CRYPTO_RNG_DOUT_0 + i * 4);
-		memcpy(trng, buf, len);
-	}
-
-	/* close TRNG */
-	crypto_write(0 | CRYPTO_WRITE_MASK_ALL, CRYPTO_RNG_CTL);
-
-	return ret;
-}
-
 static u32 rockchip_crypto_capability(struct udevice *dev)
 {
 	u32 val = 0;
@@ -413,9 +364,6 @@ static u32 rockchip_crypto_capability(struct udevice *dev)
 	       CRYPTO_RSA3072 |
 	       CRYPTO_RSA4096;
 
-	if (hw_check_trng_exist())
-		val |= CRYPTO_TRNG;
-
 	return val;
 }
 
@@ -560,33 +508,12 @@ static int rockchip_crypto_rsa_verify(struct udevice *dev, rsa_key *ctx,
 }
 #endif
 
-static int rockchip_crypto_get_trng(struct udevice *dev, u8 *output, u32 len)
-{
-	int ret;
-	u32 i;
-
-	if (!dev || !output || !len)
-		return -EINVAL;
-
-	for (i = 0; i < len / CRYPTO_TRNG_MAX; i++) {
-		ret = rk_trng(output + i * CRYPTO_TRNG_MAX, CRYPTO_TRNG_MAX);
-		if (ret)
-			goto fail;
-	}
-
-	ret = rk_trng(output + i * CRYPTO_TRNG_MAX, len % CRYPTO_TRNG_MAX);
-
-fail:
-	return ret;
-}
-
 static const struct dm_crypto_ops rockchip_crypto_ops = {
 	.capability = rockchip_crypto_capability,
 	.sha_init   = rockchip_crypto_sha_init,
 	.sha_update = rockchip_crypto_sha_update,
 	.sha_final  = rockchip_crypto_sha_final,
 	.rsa_verify = rockchip_crypto_rsa_verify,
-	.get_trng = rockchip_crypto_get_trng,
 };
 
 /*
diff --git a/include/crypto.h b/include/crypto.h
index 396c455bae..8b28192058 100644
--- a/include/crypto.h
+++ b/include/crypto.h
@@ -23,8 +23,6 @@
 #define CRYPTO_RSA3072		BIT(13)
 #define CRYPTO_RSA4096		BIT(14)
 
-#define CRYPTO_TRNG		BIT(15)
-
 #define BYTE2WORD(bytes)	((bytes) / 4)
 #define BITS2BYTE(nbits)	((nbits) / 8)
 #define BITS2WORD(nbits)	((nbits) / 32)
@@ -54,9 +52,6 @@ struct dm_crypto_ops {
 	/* RSA verify */
 	int (*rsa_verify)(struct udevice *dev, rsa_key *ctx,
 			  u8 *sign, u8 *output);
-
-	/* TRNG get */
-	int (*get_trng)(struct udevice *dev, u8 *output, u32 len);
 };
 
 /**
@@ -148,15 +143,4 @@ int crypto_sha_regions_csum(struct udevice *dev, sha_context *ctx,
  */
 int crypto_rsa_verify(struct udevice *dev, rsa_key *ctx, u8 *sign, u8 *output);
 
-/**
- * crypto_get_trng() - Crypto get trng
- *
- * @dev: crypto device
- * @output: output trng data
- * @len: trng len to get
- *
- * @return 0 on success, otherwise failed
- */
-int crypto_get_trng(struct udevice *dev, u8 *output, u32 len);
-
 #endif

commit b6b83d2acb339dc3668a9f540f3a5aefe26df7ee
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Fri Jan 29 09:10:09 2021 +0800

    cmd: crypto: drop rng test from crypto test
    
    rng module is not belongs to crypto driver anymore.
    
    Change-Id: I0f2dd50e93666ba6c8a9a43fab786beb1eeb93a8
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/cmd/crypto.c b/cmd/crypto.c
index 9ccc412883..91903b3353 100644
--- a/cmd/crypto.c
+++ b/cmd/crypto.c
@@ -218,19 +218,6 @@ static void dump_hash(const char *title, void *hard_d, void *soft_d, u32 nbits)
 	printf("\n\n");
 }
 
-static void dump_hex(const char *name, const u8 *array, u32 len)
-{
-	int i;
-
-	printf("[%s]: %uByte", name, len);
-	for (i = 0; i < len; i++) {
-		if (i % 32 == 0)
-			printf("\n");
-		printf("%02x ", array[i]);
-	}
-	printf("\n");
-}
-
 static int hash_perf_eval(struct udevice *dev, u32 algo, char *algo_name)
 {
 	sha_context ctx;
@@ -386,16 +373,6 @@ static int do_crypto(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	}
 #endif
 
-	dev = crypto_get_device(CRYPTO_TRNG);
-	if (dev) {
-		memset(hard_out, 0x00, sizeof(hard_out));
-		crypto_get_trng(dev, hard_out, sizeof(hard_out));
-		dump_hex("TRNG", hard_out, sizeof(hard_out));
-
-	} else {
-		printf("Can't find crypto device for CRYPTO_TRNG\n");
-	}
-
 	return 0;
 }
 

commit dd239d3008822f18620cd5f8648a400e31f5de6c
Author: Patrick Delaunay <patrick.delaunay@st.com>
Date:   Mon Mar 12 10:46:06 2018 +0100

    UPSTREAM: arm: armv7: solve issue for timer_rate_hz in arch timer
    
    The current value timer_rate_hz causes a problem with function
    timer_get_us() from lib time and then an issue with
    readx_poll_timeout() function.
    
    With corrected value for tbclk() = timer_rate_hz = CONFIG_SYS_HZ_CLOCK
    the weak functions in lib timer can be used:
    - get_timer()
    - __udelay()
    So the specific function in this file are removed.
    
    Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
    (cherry picked from commit 77aace579a9a84c74e99d2e86ecc08b1d9ca402b)
    Change-Id: Id289de433e49d396a95e3a72acf210be3a2d910b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/cpu/armv7/arch_timer.c b/arch/arm/cpu/armv7/arch_timer.c
index 30915d28aa..545c518506 100644
--- a/arch/arm/cpu/armv7/arch_timer.c
+++ b/arch/arm/cpu/armv7/arch_timer.c
@@ -17,7 +17,7 @@ int timer_init(void)
 	gd->arch.tbl = 0;
 	gd->arch.tbu = 0;
 
-	gd->arch.timer_rate_hz = CONFIG_SYS_HZ_CLOCK / CONFIG_SYS_HZ;
+	gd->arch.timer_rate_hz = CONFIG_SYS_HZ_CLOCK;
 	return 0;
 }
 
@@ -34,27 +34,9 @@ unsigned long long get_ticks(void)
 }
 
 
-ulong get_timer(ulong base)
-{
-	return lldiv(get_ticks(), gd->arch.timer_rate_hz) - base;
-}
-
 ulong timer_get_boot_us(void)
 {
-	return lldiv(get_ticks(), CONFIG_SYS_HZ_CLOCK / (CONFIG_SYS_HZ * 1000));
-}
-
-void __udelay(unsigned long usec)
-{
-	unsigned long long endtime;
-
-	endtime = lldiv((unsigned long long)usec * gd->arch.timer_rate_hz,
-			1000UL);
-
-	endtime += get_ticks();
-
-	while (get_ticks() < endtime)
-		;
+	return lldiv(get_ticks(), CONFIG_SYS_HZ_CLOCK / 1000000);
 }
 
 ulong get_tbclk(void)

commit c39f2cf7f6dc22ed85b94bacc1c9ce2eec21f7ac
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Thu Jan 28 19:40:31 2021 +0800

    configs: rk3568: enable rng driver
    
    CONFIG_DM_RNG=y
    CONFIG_RNG_ROCKCHIP=y
    
    Change-Id: I3d937db599874ecf07f96f4d7ec94956972b895f
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index cdbf647696..532e312669 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -98,6 +98,8 @@ CONFIG_DM_CRYPTO=y
 CONFIG_SPL_DM_CRYPTO=y
 CONFIG_ROCKCHIP_CRYPTO_V2=y
 CONFIG_SPL_ROCKCHIP_CRYPTO_V2=y
+CONFIG_DM_RNG=y
+CONFIG_RNG_ROCKCHIP=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_ROCKCHIP_GPIO_V2=y
 CONFIG_SYS_I2C_ROCKCHIP=y

commit 529dfdedda26c4de34c1fa331aeba80216781264
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Thu Jan 28 19:29:11 2021 +0800

    rockchip: dts: rk3568: add rng node and enable
    
    Change-Id: Ie58d30776facf7f2bd6060fad06c4cbb53727e68
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/arch/arm/dts/rk3568-u-boot.dtsi b/arch/arm/dts/rk3568-u-boot.dtsi
index 9ddc2e9292..52f05e4fc1 100644
--- a/arch/arm/dts/rk3568-u-boot.dtsi
+++ b/arch/arm/dts/rk3568-u-boot.dtsi
@@ -91,6 +91,11 @@
 	status = "okay";
 };
 
+&rng {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 &sfc {
 	u-boot,dm-spl;
 	/delete-property/ pinctrl-names;
diff --git a/arch/arm/dts/rk3568.dtsi b/arch/arm/dts/rk3568.dtsi
index a48611b8ec..d0826b274c 100644
--- a/arch/arm/dts/rk3568.dtsi
+++ b/arch/arm/dts/rk3568.dtsi
@@ -1883,6 +1883,12 @@
 		status = "disabled";
 	};
 
+	rng: rng@fe388000 {
+		compatible = "rockchip,cryptov2-rng";
+		reg = <0x0 0xfe388000 0x0 0x2000>;
+		status = "disabled";
+	};
+
 	secure_otp: secure_otp@fe3a0000 {
 		compatible = "rockchip,rk3568-secure-otp";
 		reg = <0x0 0xfe3a0000 0x0 0x4000>;

commit 025272a2d2c9d3a1841e130b4202d5997ede5cc2
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Tue Dec 24 22:17:37 2019 +0100

    UPSTREAM: cmd: add rng command
    
    For the RNG uclass we currently only have a test working on the sandbox.
    
    Provide a command to test the hardware random number generator on
    non-sandbox systems.
    
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    (cherry picked from commit 4f24ac08afccd5f51f0b4c7023fc8cf45efe8163)
    
    Change-Id: Icb2a9359417a8168a38e1fc009960e8c6df924e4
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/cmd/Kconfig b/cmd/Kconfig
index b522771ce0..f8afa9c26c 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1260,6 +1260,13 @@ config CMD_GETTIME
 	  milliseconds. See also the 'bootstage' command which provides more
 	  flexibility for boot timing.
 
+config CMD_RNG
+	bool "rng command"
+	depends on DM_RNG
+	select HEXDUMP
+	help
+	  Print bytes from the hardware random number generator.
+
 # TODO: rename to CMD_SLEEP
 config CMD_MISC
 	bool "sleep"
diff --git a/cmd/Makefile b/cmd/Makefile
index 4744a1490e..afab39477f 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -118,6 +118,7 @@ obj-$(CONFIG_CMD_READ) += read.o
 obj-$(CONFIG_CMD_REGINFO) += reginfo.o
 obj-$(CONFIG_CMD_REISER) += reiser.o
 obj-$(CONFIG_CMD_REMOTEPROC) += remoteproc.o
+obj-$(CONFIG_CMD_RNG) += rng.o
 obj-$(CONFIG_SANDBOX) += host.o
 obj-$(CONFIG_CMD_SATA) += sata.o
 obj-$(CONFIG_CMD_NVME) += nvme.o
diff --git a/cmd/rng.c b/cmd/rng.c
new file mode 100644
index 0000000000..36ca7a101c
--- /dev/null
+++ b/cmd/rng.c
@@ -0,0 +1,56 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * The 'rng' command prints bytes from the hardware random number generator.
+ *
+ * Copyright (c) 2019, Heinrich Schuchardt <xypron.glpk@gmx.de>
+ */
+#include <common.h>
+#include <command.h>
+#include <dm.h>
+#include <hexdump.h>
+#include <rng.h>
+
+static int do_rng(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+	size_t n = 0x40;
+	struct udevice *dev;
+	void *buf;
+	int ret = CMD_RET_SUCCESS;
+
+	if (uclass_get_device(UCLASS_RNG, 0, &dev) || !dev) {
+		printf("No RNG device\n");
+		return CMD_RET_FAILURE;
+	}
+
+	if (argc >= 2)
+		n = simple_strtoul(argv[1], NULL, 16);
+
+	buf = malloc(n);
+	if (!buf) {
+		printf("Out of memory\n");
+		return CMD_RET_FAILURE;
+	}
+
+	if (dm_rng_read(dev, buf, n)) {
+		printf("Reading RNG failed\n");
+		ret = CMD_RET_FAILURE;
+	} else {
+		print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, buf, n);
+	}
+
+	free(buf);
+
+	return ret;
+}
+
+#ifdef CONFIG_SYS_LONGHELP
+static char rng_help_text[] =
+	"[n]\n"
+	"  - print n random bytes\n";
+#endif
+
+U_BOOT_CMD(
+	rng, 2, 0, do_rng,
+	"print bytes from the hardware random number generator",
+	rng_help_text
+);

commit 3ebc872de9b4df86df606e08801977787ac45cfb
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Fri Mar 13 18:05:28 2020 +0800

    UPSTREAM: rockchip: rng: Add a driver for random number generator(rng) device
    
    Add a driver for the rng device found on rockchip platforms.
    Support rng module of crypto v1 and crypto v2.
    
    Change-Id: I5be779aa08452977965d032e366f4e36c930b12e
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
    (cherry picked from commit b072d00c225e5b8147ed7444ebeae4ddd336870b)
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/drivers/rng/Kconfig b/drivers/rng/Kconfig
index dd44cc0242..beb95e29b9 100644
--- a/drivers/rng/Kconfig
+++ b/drivers/rng/Kconfig
@@ -5,3 +5,15 @@ config DM_RNG
 	  Enable driver model for random number generator(rng) devices.
 	  This interface is used to initialise the rng device and to
 	  read the random seed from the device.
+
+if DM_RNG
+
+config RNG_ROCKCHIP
+	bool "Enable random number generator for rockchip crypto rng"
+	depends on ARCH_ROCKCHIP && DM_RNG
+	default n
+	help
+	  Enable random number generator for rockchip.This driver is
+	  support rng module of crypto v1 and crypto v2.
+
+endif
diff --git a/drivers/rng/Makefile b/drivers/rng/Makefile
index 311705b6e6..471cf5d6a4 100644
--- a/drivers/rng/Makefile
+++ b/drivers/rng/Makefile
@@ -4,3 +4,4 @@
 #
 
 obj-$(CONFIG_DM_RNG) += rng-uclass.o
+obj-$(CONFIG_RNG_ROCKCHIP) += rockchip_rng.o
diff --git a/drivers/rng/rockchip_rng.c b/drivers/rng/rockchip_rng.c
new file mode 100644
index 0000000000..47fb140077
--- /dev/null
+++ b/drivers/rng/rockchip_rng.c
@@ -0,0 +1,224 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd
+ */
+#include <asm/arch-rockchip/hardware.h>
+#include <asm/io.h>
+#include <common.h>
+#include <dm.h>
+#include <linux/iopoll.h>
+#include <linux/string.h>
+#include <rng.h>
+
+#define RK_HW_RNG_MAX 32
+
+#define _SBF(s, v)	((v) << (s))
+
+/* start of CRYPTO V1 register define */
+#define CRYPTO_V1_CTRL				0x0008
+#define CRYPTO_V1_RNG_START			BIT(8)
+#define CRYPTO_V1_RNG_FLUSH			BIT(9)
+
+#define CRYPTO_V1_TRNG_CTRL			0x0200
+#define CRYPTO_V1_OSC_ENABLE			BIT(16)
+#define CRYPTO_V1_TRNG_SAMPLE_PERIOD(x)		(x)
+
+#define CRYPTO_V1_TRNG_DOUT_0			0x0204
+/* end of CRYPTO V1 register define */
+
+/* start of CRYPTO V2 register define */
+#define CRYPTO_V2_RNG_CTL			0x0400
+#define CRYPTO_V2_RNG_64_BIT_LEN		_SBF(4, 0x00)
+#define CRYPTO_V2_RNG_128_BIT_LEN		_SBF(4, 0x01)
+#define CRYPTO_V2_RNG_192_BIT_LEN		_SBF(4, 0x02)
+#define CRYPTO_V2_RNG_256_BIT_LEN		_SBF(4, 0x03)
+#define CRYPTO_V2_RNG_FATESY_SOC_RING		_SBF(2, 0x00)
+#define CRYPTO_V2_RNG_SLOWER_SOC_RING_0		_SBF(2, 0x01)
+#define CRYPTO_V2_RNG_SLOWER_SOC_RING_1		_SBF(2, 0x02)
+#define CRYPTO_V2_RNG_SLOWEST_SOC_RING		_SBF(2, 0x03)
+#define CRYPTO_V2_RNG_ENABLE			BIT(1)
+#define CRYPTO_V2_RNG_START			BIT(0)
+#define CRYPTO_V2_RNG_SAMPLE_CNT		0x0404
+#define CRYPTO_V2_RNG_DOUT_0			0x0410
+/* end of CRYPTO V2 register define */
+
+#define RK_RNG_TIME_OUT	50000  /* max 50ms */
+
+struct rk_rng_soc_data {
+	int (*rk_rng_read)(struct udevice *dev, void *data, size_t len);
+};
+
+struct rk_rng_platdata {
+	fdt_addr_t base;
+	struct rk_rng_soc_data *soc_data;
+};
+
+static int rk_rng_read_regs(fdt_addr_t addr, void *buf, size_t size)
+{
+	u32 count = RK_HW_RNG_MAX / sizeof(u32);
+	u32 reg, tmp_len;
+
+	if (size > RK_HW_RNG_MAX)
+		return -EINVAL;
+
+	while (size && count) {
+		reg = readl(addr);
+		tmp_len = min(size, sizeof(u32));
+		memcpy(buf, &reg, tmp_len);
+		addr += sizeof(u32);
+		buf += tmp_len;
+		size -= tmp_len;
+		count--;
+	}
+
+	return 0;
+}
+
+static int rk_v1_rng_read(struct udevice *dev, void *data, size_t len)
+{
+	struct rk_rng_platdata *pdata = dev_get_priv(dev);
+	u32 reg = 0;
+	int retval;
+
+	if (len > RK_HW_RNG_MAX)
+		return -EINVAL;
+
+	/* enable osc_ring to get entropy, sample period is set as 100 */
+	writel(CRYPTO_V1_OSC_ENABLE | CRYPTO_V1_TRNG_SAMPLE_PERIOD(100),
+	       pdata->base + CRYPTO_V1_TRNG_CTRL);
+
+	rk_clrsetreg(pdata->base + CRYPTO_V1_CTRL, CRYPTO_V1_RNG_START,
+		     CRYPTO_V1_RNG_START);
+
+	retval = readl_poll_timeout(pdata->base + CRYPTO_V1_CTRL, reg,
+				    !(reg & CRYPTO_V1_RNG_START),
+				    RK_RNG_TIME_OUT);
+	if (retval)
+		goto exit;
+
+	rk_rng_read_regs(pdata->base + CRYPTO_V1_TRNG_DOUT_0, data, len);
+
+exit:
+	/* close TRNG */
+	rk_clrreg(pdata->base + CRYPTO_V1_CTRL, CRYPTO_V1_RNG_START);
+
+	return 0;
+}
+
+static int rk_v2_rng_read(struct udevice *dev, void *data, size_t len)
+{
+	struct rk_rng_platdata *pdata = dev_get_priv(dev);
+	u32 reg = 0;
+	int retval;
+
+	if (len > RK_HW_RNG_MAX)
+		return -EINVAL;
+
+	/* enable osc_ring to get entropy, sample period is set as 100 */
+	writel(100, pdata->base + CRYPTO_V2_RNG_SAMPLE_CNT);
+
+	reg |= CRYPTO_V2_RNG_256_BIT_LEN;
+	reg |= CRYPTO_V2_RNG_SLOWER_SOC_RING_0;
+	reg |= CRYPTO_V2_RNG_ENABLE;
+	reg |= CRYPTO_V2_RNG_START;
+
+	rk_clrsetreg(pdata->base + CRYPTO_V2_RNG_CTL, 0xffff, reg);
+
+	retval = readl_poll_timeout(pdata->base + CRYPTO_V2_RNG_CTL, reg,
+				    !(reg & CRYPTO_V2_RNG_START),
+				    RK_RNG_TIME_OUT);
+	if (retval)
+		goto exit;
+
+	rk_rng_read_regs(pdata->base + CRYPTO_V2_RNG_DOUT_0, data, len);
+
+exit:
+	/* close TRNG */
+	rk_clrreg(pdata->base + CRYPTO_V2_RNG_CTL, 0xffff);
+
+	return retval;
+}
+
+static int rockchip_rng_read(struct udevice *dev, void *data, size_t len)
+{
+	unsigned char *buf = data;
+	unsigned int i;
+	int ret = -EIO;
+
+	struct rk_rng_platdata *pdata = dev_get_priv(dev);
+
+	if (!len)
+		return 0;
+
+	if (!pdata->soc_data || !pdata->soc_data->rk_rng_read)
+		return -EINVAL;
+
+	for (i = 0; i < len / RK_HW_RNG_MAX; i++, buf += RK_HW_RNG_MAX) {
+		ret = pdata->soc_data->rk_rng_read(dev, buf, RK_HW_RNG_MAX);
+		if (ret)
+			goto exit;
+	}
+
+	if (len % RK_HW_RNG_MAX)
+		ret = pdata->soc_data->rk_rng_read(dev, buf,
+						   len % RK_HW_RNG_MAX);
+
+exit:
+	return ret;
+}
+
+static int rockchip_rng_ofdata_to_platdata(struct udevice *dev)
+{
+	struct rk_rng_platdata *pdata = dev_get_priv(dev);
+
+	memset(pdata, 0x00, sizeof(*pdata));
+
+	pdata->base = (fdt_addr_t)dev_read_addr_ptr(dev);
+	if (!pdata->base)
+		return -ENOMEM;
+
+	return 0;
+}
+
+static int rockchip_rng_probe(struct udevice *dev)
+{
+	struct rk_rng_platdata *pdata = dev_get_priv(dev);
+
+	pdata->soc_data = (struct rk_rng_soc_data *)dev_get_driver_data(dev);
+
+	return 0;
+}
+
+static const struct rk_rng_soc_data rk_rng_v1_soc_data = {
+	.rk_rng_read = rk_v1_rng_read,
+};
+
+static const struct rk_rng_soc_data rk_rng_v2_soc_data = {
+	.rk_rng_read = rk_v2_rng_read,
+};
+
+static const struct dm_rng_ops rockchip_rng_ops = {
+	.read = rockchip_rng_read,
+};
+
+static const struct udevice_id rockchip_rng_match[] = {
+	{
+		.compatible = "rockchip,cryptov1-rng",
+		.data = (ulong)&rk_rng_v1_soc_data,
+	},
+	{
+		.compatible = "rockchip,cryptov2-rng",
+		.data = (ulong)&rk_rng_v2_soc_data,
+	},
+	{},
+};
+
+U_BOOT_DRIVER(rockchip_rng) = {
+	.name = "rockchip-rng",
+	.id = UCLASS_RNG,
+	.of_match = rockchip_rng_match,
+	.ops = &rockchip_rng_ops,
+	.probe = rockchip_rng_probe,
+	.ofdata_to_platdata = rockchip_rng_ofdata_to_platdata,
+	.priv_auto_alloc_size = sizeof(struct rk_rng_platdata),
+};

commit 28507ac336d6a31c182ab824d4e8fa2b5536f773
Author: Sughosh Ganu <sughosh.ganu@linaro.org>
Date:   Sat Dec 28 23:58:27 2019 +0530

    UPSTREAM: dm: rng: Add random number generator(rng) uclass
    
    Add a uclass for reading a random number seed from a random number
    generator device.
    
    Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
    Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
    Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    (cherry picked from commit a2487684003b0bc380955e1a38cdd71da3ca4366)
    
    Change-Id: Ife2287132db695181d663653f2ceaab0e343b41f
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/drivers/Kconfig b/drivers/Kconfig
index a18ba97135..21ed0cf56c 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -18,6 +18,8 @@ source "drivers/cpu/Kconfig"
 
 source "drivers/crypto/Kconfig"
 
+source "drivers/rng/Kconfig"
+
 source "drivers/ddr/Kconfig"
 
 source "drivers/demo/Kconfig"
diff --git a/drivers/Makefile b/drivers/Makefile
index 49af8d4f8a..53be94849b 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -5,6 +5,7 @@
 obj-$(CONFIG_$(SPL_TPL_)CLK) += clk/
 obj-$(CONFIG_$(SPL_TPL_)DM) += core/
 obj-$(CONFIG_$(SPL_TPL_)DM_CRYPTO) += crypto/
+obj-$(CONFIG_$(SPL_TPL_)DM_RNG) += rng/
 obj-$(CONFIG_$(SPL_TPL_)DRIVERS_MISC_SUPPORT) += misc/ sysreset/ firmware/
 obj-$(CONFIG_$(SPL_TPL_)I2C_SUPPORT) += i2c/
 obj-$(CONFIG_$(SPL_TPL_)LED) += led/
diff --git a/drivers/rng/Kconfig b/drivers/rng/Kconfig
new file mode 100644
index 0000000000..dd44cc0242
--- /dev/null
+++ b/drivers/rng/Kconfig
@@ -0,0 +1,7 @@
+config DM_RNG
+	bool "Driver support for Random Number Generator devices"
+	depends on DM
+	help
+	  Enable driver model for random number generator(rng) devices.
+	  This interface is used to initialise the rng device and to
+	  read the random seed from the device.
diff --git a/drivers/rng/Makefile b/drivers/rng/Makefile
new file mode 100644
index 0000000000..311705b6e6
--- /dev/null
+++ b/drivers/rng/Makefile
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (c) 2019, Linaro Limited
+#
+
+obj-$(CONFIG_DM_RNG) += rng-uclass.o
diff --git a/drivers/rng/rng-uclass.c b/drivers/rng/rng-uclass.c
new file mode 100644
index 0000000000..b6af3b8606
--- /dev/null
+++ b/drivers/rng/rng-uclass.c
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2019, Linaro Limited
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <rng.h>
+
+int dm_rng_read(struct udevice *dev, void *buffer, size_t size)
+{
+	const struct dm_rng_ops *ops = device_get_ops(dev);
+
+	if (!ops->read)
+		return -ENOSYS;
+
+	return ops->read(dev, buffer, size);
+}
+
+UCLASS_DRIVER(rng) = {
+	.name = "rng",
+	.id = UCLASS_RNG,
+};
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 638bf15ede..6a65da3311 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -109,6 +109,7 @@ enum uclass_id {
 	UCLASS_MDIO,		/* MDIO bus */
 	UCLASS_EBC,		/* EBC Controller for eink screen */
 	UCLASS_EINK_DISPLAY,	/* EINK screen display driver */
+	UCLASS_RNG,		/* Random Number Generator */
 	UCLASS_COUNT,
 	UCLASS_INVALID = -1,
 };
diff --git a/include/rng.h b/include/rng.h
new file mode 100644
index 0000000000..d2c0f9af62
--- /dev/null
+++ b/include/rng.h
@@ -0,0 +1,33 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2019, Linaro Limited
+ */
+
+#if !defined _RNG_H_
+#define _RNG_H_
+
+struct udevice;
+
+/**
+ * dm_rng_read() - read a random number seed from the rng device
+ * @buffer:	input buffer to put the read random seed into
+ * @size:	number of bytes of random seed read
+ *
+ * Return: 0 if OK, -ve on error
+ */
+int dm_rng_read(struct udevice *dev, void *buffer, size_t size);
+
+/* struct dm_rng_ops - Operations for the hwrng uclass */
+struct dm_rng_ops {
+	/**
+	 * @read() - read a random number seed
+	 *
+	 * @data:	input buffer to read the random seed
+	 * @max:	total number of bytes to read
+	 *
+	 * Return: 0 if OK, -ve on error
+	 */
+	int (*read)(struct udevice *dev, void *data, size_t max);
+};
+
+#endif /* _RNG_H_ */

commit d0aa80fb69403641545adaa1d5cf23e936c85d0d
Author: William Wu <william.wu@rock-chips.com>
Date:   Thu Jan 28 10:29:13 2021 +0800

    configs: rv1126: enable usb dwc3 host
    
    Signed-off-by: William Wu <william.wu@rock-chips.com>
    Change-Id: I8296e122285d3e6b3208607ad5a91fc12e8e074a

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index 3ff665af71..d7b80dbccb 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -161,10 +161,12 @@ CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_ROCKCHIP_SFC=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_GENERIC=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_DWC3_GENERIC=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_MANUFACTURER="Rockchip"

commit 631619a42f9578c0b4232a59f3f3f1b7adfc3090
Author: William Wu <william.wu@rock-chips.com>
Date:   Thu Jan 28 10:11:51 2021 +0800

    usb: dwc3-generic: support host mode if dr_mode is otg
    
    The Rockchip DWC3 controller only support DRD mode (Dual Role
    Device), but not support OTG mode. So if the dr_mode in DTS is
    configured to OTG, then we force it to Host mode. This patch
    does not affect the device function of OTG, such as rockusb.
    
    Signed-off-by: William Wu <william.wu@rock-chips.com>
    Change-Id: I806623aa9b0bb8b595417755db7d9c6b6c4f38f1

diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c
index c5106d98fc..ea5aeaa9b3 100644
--- a/drivers/usb/dwc3/dwc3-generic.c
+++ b/drivers/usb/dwc3/dwc3-generic.c
@@ -120,6 +120,10 @@ static int dwc3_generic_ofdata_to_platdata(struct udevice *dev)
 	if (plat->dr_mode == USB_DR_MODE_UNKNOWN) {
 		pr_err("Invalid usb mode setup\n");
 		return -ENODEV;
+	} else if (plat->dr_mode != USB_DR_MODE_HOST &&
+		   !strcmp(dev->driver->name, "dwc3-generic-host")) {
+		pr_info("Set dr_mode to HOST\n");
+		plat->dr_mode = USB_DR_MODE_HOST;
 	}
 
 	return 0;
@@ -310,8 +314,13 @@ static int dwc3_glue_bind(struct udevice *parent)
 		dr_mode = usb_get_dr_mode(node);
 
 		switch (dr_mode) {
-		case USB_DR_MODE_PERIPHERAL:
 		case USB_DR_MODE_OTG:
+#if defined(CONFIG_ARCH_ROCKCHIP) && defined(CONFIG_USB_XHCI_HCD)
+			debug("%s: dr_mode: force to HOST\n", __func__);
+			driver = "dwc3-generic-host";
+			break;
+#endif
+		case USB_DR_MODE_PERIPHERAL:
 #if CONFIG_IS_ENABLED(DM_USB_GADGET)
 			debug("%s: dr_mode: OTG or Peripheral\n", __func__);
 			driver = "dwc3-generic-peripheral";

commit 3a711d9c6259d2ffb7733d14ed6d91feaa92fd7e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jan 22 15:07:31 2021 +0800

    make.sh: add host tool check for fit image
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I16bb64c3d0cb9be5d3c2dc55b61400dfb0bb23be

diff --git a/make.sh b/make.sh
index 4320db3f89..d30d9816d9 100755
--- a/make.sh
+++ b/make.sh
@@ -652,6 +652,10 @@ function pack_uboot_itb_image()
 		MCU=`awk -F"," '/MCU=/  { printf $1 }' ${INI} | tr -d ' ' | cut -c 5-`
 		cp ${RKBIN}/${MCU} mcu.bin
 		MCU_OFFSET=`awk -F"," '/MCU=/ { printf $2 }' ${INI} | tr -d ' '`
+		if [ -z ${MCU_OFFSET} ]; then
+			echo "ERROR: No mcu address in ${INI}"
+			exit 1
+		fi
 		MCU_ARG="-m ${MCU_OFFSET}"
 	fi
 
@@ -670,6 +674,7 @@ function pack_uboot_itb_image()
 		cp ${SPL_FIT_SOURCE} u-boot.its
 	else
 		SPL_FIT_GENERATOR=`sed -n "/CONFIG_SPL_FIT_GENERATOR=/s/CONFIG_SPL_FIT_GENERATOR=//p" .config | tr -d '""'`
+		# *.py is the legacy one.
 		if [[ ${SPL_FIT_GENERATOR} == *.py ]]; then
 			${SPL_FIT_GENERATOR} u-boot.dtb > u-boot.its
 		else
@@ -746,6 +751,19 @@ function pack_trust_image()
 
 function pack_fit_image()
 {
+	# check host tools
+	if ! which dtc >/dev/null 2>&1 ; then
+		echo "ERROR: No 'dtc', please: apt-get install device-tree-compiler"
+		exit 1
+	fi
+
+	if [ "${ARM64_TRUSTZONE}" == "y" ]; then
+		if ! python -c "import elftools" ; then
+			echo "ERROR: No python 'pyelftools', please: pip install pyelftools"
+			exit 1
+		fi
+	fi
+
 	# If we don't plan to have uboot in uboot.img in case of: SPL => Trust => Kernel, creating empty files.
 	if [ "${ARG_NO_UBOOT}" == "y" ]; then
 		rm u-boot-nodtb.bin u-boot.dtb -f

commit b23020efaf079dccd7e1435c2a9aa4d6d3dd9176
Author: William Wu <william.wu@rock-chips.com>
Date:   Thu Jan 28 11:50:09 2021 +0800

    rockchip: rk3568: set usb2 phy0 and phy1 in suspend mode
    
    This patch set the USB 2.0 PHY0 port0 and PHY1 port0 and
    port1 in suspend mode to save power. And set the USB 2.0
    PHY0 port0 for OTG interface still in normal mode.
    
    Signed-off-by: William Wu <william.wu@rock-chips.com>
    Change-Id: I684e3bf8ce7934402e745ea7cfe110b987f5d9db

diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c
index 800bfd728b..14396a3bef 100644
--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
@@ -40,6 +40,11 @@ DECLARE_GLOBAL_DATA_PTR;
 #define PMUGRF_SOC_CON15	0xfdc20100
 #define CPU_GRF_BASE		0xfdc30000
 #define GRF_CORE_PVTPLL_CON0	(0x10)
+#define USBPHY_U3_GRF		0xfdca0000
+#define USBPHY_U3_GRF_CON1	(USBPHY_U3_GRF + 0x04)
+#define USBPHY_U2_GRF		0xfdca8000
+#define USBPHY_U2_GRF_CON0	(USBPHY_U2_GRF + 0x00)
+#define USBPHY_U2_GRF_CON1	(USBPHY_U2_GRF + 0x04)
 
 #define PMU_PWR_GATE_SFTCON	(0xA0)
 #define PMU_PWR_DWN_ST		(0x98)
@@ -842,6 +847,15 @@ int arch_cpu_init(void)
 	 */
 	 writel(0x02a002a0, CRU_BASE + CRU_SOFTRST_CON28);
 
+	 /*
+	  * Set USB 2.0 PHY0 port1 and PHY1 port0 and port1
+	  * enter suspend mode to to save power. And USB 2.0
+	  * PHY0 port0 for OTG interface still in normal mode.
+	  */
+	 writel(0x01ff01d1, USBPHY_U3_GRF_CON1);
+	 writel(0x01ff01d1, USBPHY_U2_GRF_CON0);
+	 writel(0x01ff01d1, USBPHY_U2_GRF_CON1);
+
 #ifndef CONFIG_TPL_BUILD
 	qos_priority_init();
 #endif

commit 074c7ac45f1b501584cbaf970ffdc4fe494b6ec8
Author: Wenping Zhang <wenping.zhang@rock-chips.com>
Date:   Fri Dec 25 02:15:55 2020 +0000

    video/rk_eink: Don't read image from emmc to ddr if it's already loaded.
    
    Signed-off-by: Wenping Zhang <wenping.zhang@rock-chips.com>
    Change-Id: I02b141e5adb8391bf85ce77c6a7e280f645c96d5

diff --git a/drivers/video/rk_eink/rk_eink_display.c b/drivers/video/rk_eink/rk_eink_display.c
index ea2a562eae..72ffcf69f5 100644
--- a/drivers/video/rk_eink/rk_eink_display.c
+++ b/drivers/video/rk_eink/rk_eink_display.c
@@ -281,8 +281,8 @@ static int read_grayscale(struct blk_desc *dev_desc,
  * u32 needed_logo: we only load needed logo image into ram, such as
  *                   uboot logo + kernel logo or charger logo + kernel
  *                   logo
- * u32 *real_logo: because the needed logo may not exist in logo.img,
- *                  so have really loaded logo in para loaded_logo.
+ * u32 *loaded_logo: because the needed logo may not exist in logo.img,
+ *                  store the really loaded logo in para loaded_logo.
  */
 static int read_needed_logo_from_partition(struct udevice *dev,
 					   u32 needed_logo,
@@ -295,6 +295,11 @@ static int read_needed_logo_from_partition(struct udevice *dev,
 	struct logo_part_header *part_hdr = &hdr->part_hdr;
 	struct ebc_panel *panel = dev_get_platdata(dev);
 
+	if (*loaded_logo & needed_logo) {
+		printf("logo[0x%x] is already loaded, just return!\n",
+		       needed_logo);
+		return 0;
+	}
 	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {
 		printf("%s: Could not find device\n", __func__);
@@ -317,7 +322,6 @@ static int read_needed_logo_from_partition(struct udevice *dev,
 		return -EINVAL;
 	}
 
-	*loaded_logo = 0;
 	for (i = 0; i < part_hdr->logo_count; i++) {
 		struct grayscale_header *img_hdr = &hdr->img_hdr[i];
 		int pic_buf;
@@ -465,11 +469,11 @@ static int rk_eink_display_init(void)
 static int rockchip_eink_show_logo(int cur_logo_type, int update_mode)
 {
 	int ret = 0;
-	u32 read_logo = 0;
 	u32 logo_addr;
 	u32 last_logo_addr;
 	struct ebc_panel *plat;
 	struct udevice *dev;
+	static u32 loaded_logo;
 
 	if (!eink_dev) {
 		static bool first_init = true;
@@ -528,9 +532,10 @@ static int rockchip_eink_show_logo(int cur_logo_type, int update_mode)
 		}
 	}
 	ret = read_needed_logo_from_partition(dev, cur_logo_type,
-					      &read_logo);
-	if (ret || !(read_logo & cur_logo_type)) {
-		printf("read uboot logo failed, read_logo=%d\n", read_logo);
+					      &loaded_logo);
+	if (ret || !(loaded_logo & cur_logo_type)) {
+		printf("read logo[0x%x] failed, loaded_logo=0x%x\n",
+		       cur_logo_type, loaded_logo);
 		ret = -EIO;
 		goto out;
 	}
@@ -555,8 +560,8 @@ static int rockchip_eink_show_logo(int cur_logo_type, int update_mode)
 		sprintf(logo_args, "ulogo_addr=0x%x", logo_addr);
 		env_update("bootargs", logo_args);
 		ret = read_needed_logo_from_partition(dev, EINK_LOGO_KERNEL,
-						      &read_logo);
-		if (ret || !(read_logo & EINK_LOGO_KERNEL)) {
+						      &loaded_logo);
+		if (ret || !(loaded_logo & EINK_LOGO_KERNEL)) {
 			printf("No invalid kernel logo in logo.img\n");
 		} else {
 			int klogo_addr = get_addr_by_type(dev,

commit b978e52ca504f28d0bbb4dbd38383d4bc074c9b4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jan 15 16:24:22 2021 +0800

    power: pmic: rk8xx: inactive pmic_sleep by default
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ia5729341c5a94d0109a8a28e48ad8eb79b80962e

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index a92b5faf42..3435f86bb8 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -149,12 +149,11 @@ static struct reg_data rk817_init_reg[] = {
  * the under-voltage protection will shutdown the LDO3 and reset the PMIC
  */
 	{ RK817_BUCK4_CMIN, 0x60, 0x60},
-/*
- * Only when system suspend while U-Boot charge needs this config support
- */
+
+	/* Set pmic_sleep as none function */
+	{ RK817_PMIC_SYS_CFG3, 0x00, 0x18 },
+
 #ifdef CONFIG_DM_CHARGE_DISPLAY
-	/* Set pmic_sleep as sleep function */
-	{ RK817_PMIC_SYS_CFG3, 0x08, 0x18 },
 	/* Set pmic_int active low */
 	{ RK817_GPIO_INT_CFG,  0x00, 0x02 },
 #endif

commit 06b61291ba610c445335c28e91616b556cb71b69
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 14 20:39:01 2021 +0800

    power: charge animation: add pmic suspend/resume
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ia1b6d232b0a9c0d0ce2e8ee47ae84aaa6d40bfac

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 10e1fb7274..aaa02b3d74 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -210,14 +210,16 @@ static int system_suspend_enter(struct udevice *dev)
 	if (pdata->system_suspend && IS_ENABLED(CONFIG_ARM_SMCCC)) {
 		printf("\nSystem suspend: ");
 		putc('0');
-		regulators_enable_state_mem(false);
-		putc('1');
 		local_irq_disable();
+		putc('1');
+		regulators_enable_state_mem(false);
 		putc('2');
-		irqs_suspend();
+		pmic_suspend(priv->pmic);
 		putc('3');
-		device_suspend();
+		irqs_suspend();
 		putc('4');
+		device_suspend();
+		putc('5');
 		putc('\n');
 
 		/* Trap into ATF for low power mode */
@@ -229,8 +231,10 @@ static int system_suspend_enter(struct udevice *dev)
 		putc('3');
 		irqs_resume();
 		putc('2');
-		local_irq_enable();
+		pmic_resume(priv->pmic);
 		putc('1');
+		local_irq_enable();
+		putc('0');
 		putc('\n');
 	} else {
 		irqs_suspend();

commit 40db74046cf93dc2119ab6a4ba64bb05d55a6122
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 14 20:38:29 2021 +0800

    power: pmic: rk8xx: implement suspend/resume callback
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I46b13886fcb3e7733155cd6f5fce15473c439da3

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index ca952ea1a0..a92b5faf42 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -233,6 +233,48 @@ static int rk8xx_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
 	return 0;
 }
 
+static int rk8xx_suspend(struct udevice *dev)
+{
+	struct rk8xx_priv *priv = dev_get_priv(dev);
+	int ret = 0;
+	u8 val;
+
+	switch (priv->variant) {
+	case RK809_ID:
+	case RK817_ID:
+		/* pmic_sleep active high */
+		ret = rk8xx_read(dev, RK817_PMIC_SYS_CFG3, &val, 1);
+		if (ret)
+			return ret;
+		priv->sleep_pin = val;
+		val &= ~0x38;
+		val |= 0x28;
+		ret = rk8xx_write(dev, RK817_PMIC_SYS_CFG3, &val, 1);
+		break;
+	default:
+		return 0;
+	}
+
+	return ret;
+}
+
+static int rk8xx_resume(struct udevice *dev)
+{
+	struct rk8xx_priv *priv = dev_get_priv(dev);
+	int ret = 0;
+
+	switch (priv->variant) {
+	case RK809_ID:
+	case RK817_ID:
+		ret = rk8xx_write(dev, RK817_PMIC_SYS_CFG3, &priv->sleep_pin, 1);
+		break;
+	default:
+		return 0;
+	}
+
+	return ret;
+}
+
 static int rk8xx_shutdown(struct udevice *dev)
 {
 	struct rk8xx_priv *priv = dev_get_priv(dev);
@@ -568,6 +610,8 @@ static struct dm_pmic_ops rk8xx_ops = {
 	.reg_count = rk8xx_reg_count,
 	.read = rk8xx_read,
 	.write = rk8xx_write,
+	.suspend = rk8xx_suspend,
+	.resume = rk8xx_resume,
 	.shutdown = rk8xx_shutdown,
 };
 
diff --git a/include/power/rk8xx_pmic.h b/include/power/rk8xx_pmic.h
index 5f3bb30a37..87bb555817 100644
--- a/include/power/rk8xx_pmic.h
+++ b/include/power/rk8xx_pmic.h
@@ -277,11 +277,12 @@ struct rk8xx_reg_table {
 };
 
 struct rk8xx_priv {
+	struct virq_chip *irq_chip;
 	int variant;
 	int irq;
-	struct virq_chip *irq_chip;
 	int lp_off_time;
 	int lp_action;
+	uint8_t sleep_pin;
 };
 
 int rk8xx_spl_configure_buck(struct udevice *pmic, int buck, int uvolt);

commit 2a7051be6cb4eddfbb7c8a7288750ec77adc42f3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 14 20:38:15 2021 +0800

    dm: pmic: add suspend/resume callback
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Iaa3b0b7f7b3a0563370baace876e095deb64c28f

diff --git a/drivers/power/pmic/pmic-uclass.c b/drivers/power/pmic/pmic-uclass.c
index 8b77b3143e..127f24481a 100644
--- a/drivers/power/pmic/pmic-uclass.c
+++ b/drivers/power/pmic/pmic-uclass.c
@@ -189,6 +189,25 @@ int pmic_clrsetbits(struct udevice *dev, uint reg, uint clr, uint set)
 	return pmic_reg_write(dev, reg, byte);
 }
 
+int pmic_suspend(struct udevice *dev)
+{
+	const struct dm_pmic_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->suspend)
+		return -ENOSYS;
+
+	return ops->suspend(dev);
+}
+
+int pmic_resume(struct udevice *dev)
+{
+	const struct dm_pmic_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->resume)
+		return -ENOSYS;
+
+	return ops->resume(dev);
+}
 
 int pmic_shutdown(struct udevice *dev)
 {
diff --git a/include/power/pmic.h b/include/power/pmic.h
index 8eca9680f7..68ad5e571a 100644
--- a/include/power/pmic.h
+++ b/include/power/pmic.h
@@ -165,6 +165,8 @@ struct dm_pmic_ops {
 	int (*read)(struct udevice *dev, uint reg, uint8_t *buffer, int len);
 	int (*write)(struct udevice *dev, uint reg, const uint8_t *buffer,
 		     int len);
+	int (*suspend)(struct udevice *dev);
+	int (*resume)(struct udevice *dev);
 	int (*shutdown)(struct udevice *dev);
 };
 
@@ -300,6 +302,22 @@ int pmic_reg_write(struct udevice *dev, uint reg, uint value);
  */
 int pmic_clrsetbits(struct udevice *dev, uint reg, uint clr, uint set);
 
+/**
+ * pmic_suspend() - suspend of PMIC
+ *
+ * @dev:	PMIC device
+ * @return 0 on success or negative value of errno.
+ */
+int pmic_suspend(struct udevice *dev);
+
+/**
+ * pmic_resume() - resume of PMIC
+ *
+ * @dev:	PMIC device
+ * @return 0 on success or negative value of errno.
+ */
+int pmic_resume(struct udevice *dev);
+
 /**
  * pmic_shutdown() - power off supplies of PMIC
  *

commit e632c0509c1dfd4d32a9482a45b7f7f98262f935
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 27 11:20:46 2021 +0800

    configs: add rk3566-eink.config
    
    - Build command:
            ./make.sh rk3566-eink
    
    - Update command for rk3566-eink.config:
            ./scripts/sync-fragment.sh configs/rk3566-eink.config
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I5253b5bdc8dda950dcc3a310e058df9045ddb751

diff --git a/configs/rk3566-eink.config b/configs/rk3566-eink.config
new file mode 100644
index 0000000000..9d0dfe5b60
--- /dev/null
+++ b/configs/rk3566-eink.config
@@ -0,0 +1,7 @@
+CONFIG_BASE_DEFCONFIG="rk3568_defconfig"
+CONFIG_LOADER_INI="RK3566MINIALL_ULTRA.ini"
+CONFIG_ROCKCHIP_EBC_TCON=y
+CONFIG_ROCKCHIP_EINK_DISPLAY=y
+CONFIG_ROCKCHIP_EINK=y
+CONFIG_ROCKCHIP_TPS65185=y
+CONFIG_TRUST_INI="RK3566TRUST_ULTRA.ini"

commit c995c47b7dbe5aaacaa85b0a72367576a4d87e07
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 27 11:18:03 2021 +0800

    configs: rk3568: remove Eink support
    
    They will be added into rk3566-eink.config.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I0538b2af2bfa73190118df645143a3412e8a2ffe

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index 2a1c7a594b..cdbf647696 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -187,10 +187,6 @@ CONFIG_DRM_ROCKCHIP_INNO_MIPI_PHY=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
 CONFIG_LCD=y
-CONFIG_ROCKCHIP_EINK=y
-CONFIG_ROCKCHIP_EBC_TCON=y
-CONFIG_ROCKCHIP_TPS65185=y
-CONFIG_ROCKCHIP_EINK_DISPLAY=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_LIB_RAND=y
 CONFIG_SPL_TINY_MEMSET=y

commit 374d259683ff35fd2e8732fea9f13d516b999e1f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Jan 17 16:48:33 2021 +0800

    scripts: fit.sh: add more comments
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ia283f3abad0afe683db073a8fc1fc9220f796e09

diff --git a/scripts/fit.sh b/scripts/fit.sh
index 6ba4cc802b..66aa61244c 100755
--- a/scripts/fit.sh
+++ b/scripts/fit.sh
@@ -189,7 +189,10 @@ function fit_raw_compile()
 
 function fit_gen_uboot_itb()
 {
+	# generate u-boot.its file
 	./make.sh itb ${ARG_INI_TRUST}
+
+	# check existance of file in its
 	check_its ${ITS_UBOOT}
 
 	if [ "${ARG_SIGN}" != "y" ]; then
@@ -228,7 +231,8 @@ function fit_gen_uboot_itb()
 			sed -i "s/rollback-index = ${VERSION}/rollback-index = <${ARG_ROLLBACK_IDX_UBOOT}>;/g" ${ITS_UBOOT}
 		fi
 
-		# u-boot.dtb must contains rsa key
+		# Generally, boot.img is signed before uboot.img, so the ras key can be found
+		# in u-boot.dtb. If not found, let's insert rsa key anyway.
 		if ! fdtget -l ${UBOOT_DTB} /signature >/dev/null 2>&1 ; then
 			${MKIMAGE} -f ${ITS_UBOOT} -k ${KEY_DIR} -K ${UBOOT_DTB} -E -p ${OFFS_S_UBOOT} -r ${ITB_UBOOT} -v ${ARG_VER_UBOOT}
 			echo "## Adding RSA public key into ${UBOOT_DTB}"
@@ -242,6 +246,7 @@ function fit_gen_uboot_itb()
 		if [ "${ARG_BURN_KEY_HASH}" == "y" ]; then
 			fdtput -tx ${SPL_DTB} ${SIGNATURE_KEY_NODE} burn-key-hash 0x1
 		fi
+
 		# rollback-index read back check
 		if [ "${ARG_SPL_ROLLBACK_PROTECT}" == "y" ]; then
 			VERSION=`fdtget -ti ${ITB_UBOOT} /configurations/conf rollback-index`
@@ -275,7 +280,7 @@ function fit_gen_uboot_itb()
 			fi
 		fi
 
-		# minimize u-boot-spl.dtb
+		# minimize u-boot-spl.dtb: clear as 0 but not remove property.
 		if grep -q '^CONFIG_SPL_FIT_HW_CRYPTO=y' .config ; then
 			fdtput -tx ${SPL_DTB} ${SIGNATURE_KEY_NODE} rsa,r-squared 0x0
 			if grep -q '^CONFIG_SPL_ROCKCHIP_CRYPTO_V1=y' .config ; then
@@ -384,11 +389,12 @@ function fit_gen_boot_itb()
 			fi
 		fi
 
+		# host check signature
 		if [ "${ARG_NO_CHECK}" != "y" ]; then
 			 ${CHECK_SIGN} -f ${ITB_BOOT} -k ${UBOOT_DTB}
 		fi
 
-		# minimize u-boot.dtb
+		# minimize u-boot.dtb: clearn as 0 but not remove property.
 		if grep -q '^CONFIG_FIT_HW_CRYPTO=y' .config ; then
 			fdtput -tx ${UBOOT_DTB} ${SIGNATURE_KEY_NODE} rsa,r-squared 0x0
 			if grep -q '^CONFIG_ROCKCHIP_CRYPTO_V1=y' .config ; then

commit 327b5d57230497208a77d8c8897a1d799026e061
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Jan 21 14:40:14 2021 +0800

    dm: mmc: print the cmd index when sending cmd error occur
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I08aab678c5e539000fadccf4a8ad9e97e3693894

diff --git a/drivers/mmc/mmc-uclass.c b/drivers/mmc/mmc-uclass.c
index b36e601369..ddfb045e10 100644
--- a/drivers/mmc/mmc-uclass.c
+++ b/drivers/mmc/mmc-uclass.c
@@ -29,6 +29,9 @@ int dm_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
 		ret = -ENOSYS;
 	mmmc_trace_after_send(mmc, cmd, ret);
 
+	if (ret)
+		printf("MMC error: The cmd index is %d, ret is %d\n", cmd->cmdidx, ret);
+
 	return ret;
 }
 
@@ -46,6 +49,8 @@ int dm_mmc_send_cmd_prepare(struct udevice *dev, struct mmc_cmd *cmd,
 	else
 		ret = -ENOSYS;
 	mmmc_trace_after_send(mmc, cmd, ret);
+	if (ret)
+		printf("MMC error: The cmd index is %d, ret is %d\n", cmd->cmdidx, ret);
 
 	return ret;
 }

commit a2a2f053f6cbfbf8c68eb76a4b54a108fe4f2ea8
Author: Weiwen Chen <cww@rock-chips.com>
Date:   Tue Jan 19 17:45:04 2021 +0800

    configs: rv1126-spi-nor-tiny: spl enable gpt
    
    Signed-off-by: Weiwen Chen <cww@rock-chips.com>
    Change-Id: I372ecc4eac94bd7d9f699d674b4e5ee81cb1ccf0

diff --git a/configs/rv1126-spi-nor-tiny_defconfig b/configs/rv1126-spi-nor-tiny_defconfig
index 97307d2e23..a652cf8036 100644
--- a/configs/rv1126-spi-nor-tiny_defconfig
+++ b/configs/rv1126-spi-nor-tiny_defconfig
@@ -18,6 +18,7 @@ CONFIG_TRUST_INI="RV1126TOS_SPI_NOR_TINY.ini"
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_TARGET_EVB_RV1126=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
 CONFIG_DEFAULT_DEVICE_TREE="rv1126-evb"
@@ -69,7 +70,7 @@ CONFIG_CMD_SPI=y
 # CONFIG_CMD_MISC is not set
 CONFIG_CMD_MTD_BLK=y
 CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
-# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_PARTITION_TYPE_GUID=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_SPL_DTB_MINIMUM=y
 CONFIG_OF_LIVE=y

commit e42c20580331b02b0d7d7a98e18ab03bd3f29e2b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 19 16:52:44 2021 +0800

    configs: rk3568: enable SPL secure otp
    
    Fix compile error if enable CONFIG_SPL_FIT_SIGNATURE:
    
      LD      spl/u-boot-spl
    lib/built-in.o: In function `rsa_burn_key_hash':
    /home4/cjh/uboot-nextdev/lib/rsa/rsa-verify.c:591: undefined reference to `misc_otp_get_device'
    /home4/cjh/uboot-nextdev/lib/rsa/rsa-verify.c:595: undefined reference to `misc_otp_read'
    /home4/cjh/uboot-nextdev/lib/rsa/rsa-verify.c:661: undefined reference to `misc_otp_read'
    /home4/cjh/uboot-nextdev/lib/rsa/rsa-verify.c:673: undefined reference to `misc_otp_write'
    /home4/cjh/uboot-nextdev/lib/rsa/rsa-verify.c:678: undefined reference to `misc_otp_read'
    /home4/cjh/uboot-nextdev/lib/rsa/rsa-verify.c:688: undefined reference to `misc_otp_write'
    scripts/Makefile.spl:357: recipe for target 'spl/u-boot-spl' failed
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I48c6a2349bc10451f7c2c1f99f8b522e1244fad6

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index 46440b6d21..2a1c7a594b 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -105,6 +105,8 @@ CONFIG_DM_KEY=y
 CONFIG_RK8XX_PWRKEY=y
 CONFIG_ADC_KEY=y
 CONFIG_MISC=y
+CONFIG_SPL_MISC=y
+CONFIG_SPL_ROCKCHIP_SECURE_OTP_V1=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MMC_SDHCI=y

commit 34d21c9ad8bfc75e132533de6de366cf6f633ae1
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Jan 19 10:23:36 2021 +0800

    UPSTREAM: mmc: dw_mmc: Calculate timeout from transfer length
    
    The current 4-minute data transfer timeout is misleading and broken.
    Instead of such a long wait, calculate the timeout duration based on
    the length of the data transfer. The current formula is the transfer
    length in bits, divided by a multiplication of bus frequency in Hz,
    bus width, DDR mode and converted the mSec. The value is bounded from
    the bottom to 10000 mSec.
    
    Signed-off-by: Marek Vasut <marex@denx.de>
    Cc: Jaehoon Chung <jh80.chung@samsung.com>
    Cc: Simon Glass <sjg@chromium.org>
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I168b6ceba917d3e621559a92a63fac78abca6bff
    (cherry picked from commit 4e16f0a67d80b4ce11995b870b5d9c8d11266d0d)

diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 7e8fde320e..a8c127cb49 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -158,19 +158,32 @@ static void dwmci_prepare_data(struct dwmci_host *host,
 	dwmci_writel(host, DWMCI_BYTCNT, data->blocksize * data->blocks);
 }
 
+static unsigned int dwmci_get_timeout(struct mmc *mmc, const unsigned int size)
+{
+	unsigned int timeout;
+
+	timeout = size * 8;	/* counting in bits */
+	timeout *= 10;		/* wait 10 times as long */
+	timeout /= mmc->clock;
+	timeout /= mmc->bus_width;
+	timeout *= 1000;	/* counting in msec */
+	timeout = (timeout < 10000) ? 10000 : timeout;
+
+	return timeout;
+}
+
 static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data)
 {
 	int ret = 0;
 	int reset_timeout = 100;
-	u32 timeout = 240000;
-	u32 status, ctrl, mask, size, i, len = 0;
+	u32 timeout, status, ctrl, mask, size, i, len = 0;
 	u32 *buf = NULL;
 	ulong start = get_timer(0);
 	u32 fifo_depth = (((host->fifoth_val & RX_WMARK_MASK) >>
 			    RX_WMARK_SHIFT) + 1) * 2;
 	bool stride;
 
-	size = data->blocksize * data->blocks / 4;
+	size = data->blocksize * data->blocks;
 	/* Still use legacy PIO mode if size < 512(128 * 4) Bytes */
 	stride = host->stride_pio && size > 128;
 	if (data->flags == MMC_DATA_READ)
@@ -178,6 +191,9 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data)
 	else
 		buf = (unsigned int *)data->src;
 
+	timeout = dwmci_get_timeout(host->mmc, size);
+	size /= 4;
+
 	for (;;) {
 		mask = dwmci_readl(host, DWMCI_RINTSTS);
 		/* Error during data transfer. */

commit f7a0277a1d43e9f2c7c30d09902b26895a2694f3
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue Jan 19 09:16:38 2021 +0800

    rockchip: rk3568: Enable FSPI secure
    
    Change-Id: Id46debc74bfac7060244079582b06b35817b51cd
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c
index 233a777689..800bfd728b 100644
--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
@@ -35,6 +35,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define CRU_SOFTRST_CON26	0x468
 #define CRU_SOFTRST_CON28	0x470
 #define SGRF_BASE		0xFDD18000
+#define SGRF_SOC_CON3		0xC
 #define SGRF_SOC_CON4		0x10
 #define PMUGRF_SOC_CON15	0xfdc20100
 #define CPU_GRF_BASE		0xfdc30000
@@ -814,6 +815,11 @@ int arch_cpu_init(void)
 	writel(0x3f3f0707, GRF_BASE + GRF_GPIO1C_DS_2);
 	writel(0x3f3f0707, GRF_BASE + GRF_GPIO1C_DS_3);
 
+#if defined(CONFIG_ROCKCHIP_SFC)
+	/* Set the fspi to secure */
+	writel(((0x1 << 14) << 16) | (0x0 << 14), SGRF_BASE + SGRF_SOC_CON3);
+#endif
+
 #ifndef CONFIG_TPL_BUILD
 	/* set the fspi d0 cs0 to level 1 */
 	if (get_bootdev_by_brom_bootsource() == BOOT_TYPE_SPI_NOR ||

commit 7862d7bff3263682e328a4f8b077623cac405f78
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Thu Jan 14 20:13:50 2021 +0800

    UPSTREAM: core: uclass: fix to u32 for phandle of fdt
    
    The function has a little fix during upstream review, do fix to sync
    with upstream.
    
    Change-Id: I9e1c43a660b2f83395d1639aa962988ca04494e5
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c
index be7c8ddf1a..096f0253f7 100644
--- a/drivers/core/uclass.c
+++ b/drivers/core/uclass.c
@@ -460,7 +460,7 @@ int uclass_get_device_by_ofnode(enum uclass_id id, ofnode node,
 }
 
 #if CONFIG_IS_ENABLED(OF_CONTROL)
-int uclass_get_device_by_phandle_id(enum uclass_id id, int phandle_id,
+int uclass_get_device_by_phandle_id(enum uclass_id id, uint phandle_id,
 				    struct udevice **devp)
 {
 	struct udevice *dev;
diff --git a/include/dm/uclass.h b/include/dm/uclass.h
index d54683a106..b935a83b38 100644
--- a/include/dm/uclass.h
+++ b/include/dm/uclass.h
@@ -223,7 +223,7 @@ int uclass_get_device_by_ofnode(enum uclass_id id, ofnode node,
  * @return 0 if OK, -ENODEV if there is no device match the phandle, other
  *	-ve on error
  */
-int uclass_get_device_by_phandle_id(enum uclass_id id, int phandle_id,
+int uclass_get_device_by_phandle_id(enum uclass_id id, uint phandle_id,
 				    struct udevice **devp);
 
 /**

commit 2a2a073c3c80687caaba8a3d7ec032faa5d12f6f
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Sat Jan 9 14:25:54 2021 +0800

    mtd: spinor: mx25u25635f enable quad read
    
    Change-Id: I66ef7cf13b58b1a3c2a4e8ea78c1c3a8090c57df
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index ec8840b69c..113823c635 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -153,7 +153,7 @@ const struct flash_info spi_nor_ids[] = {
 	{ INFO("mx25l12805d", 0xc22018, 0, 64 * 1024, 256, SPI_NOR_QUAD_READ) },
 	{ INFO("mx25l12855e", 0xc22618, 0, 64 * 1024, 256, 0) },
 	{ INFO("mx25l25635e", 0xc22019, 0, 64 * 1024, 512, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-	{ INFO("mx25u25635f", 0xc22539, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_4B_OPCODES) },
+	{ INFO("mx25u25635f", 0xc22539, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
 	{ INFO("mx25l25655e", 0xc22619, 0, 64 * 1024, 512, 0) },
 	{ INFO("mx66l51235l", 0xc2201a, 0, 64 * 1024, 1024, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
 	{ INFO("mx66u51235f", 0xc2253a, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },

commit 8c4105cc49281a3f9609ab7714977818d2a0a0e1
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Sun Jan 17 17:20:17 2021 +0800

    mtd: spinand: Support BWJX08K
    
    Change-Id: Iddcc569cb4865bc73d0829fd5e6a33c7c85632b5
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/Kconfig b/drivers/mtd/nand/spi/Kconfig
index b58b769c54..b53b78c1a0 100644
--- a/drivers/mtd/nand/spi/Kconfig
+++ b/drivers/mtd/nand/spi/Kconfig
@@ -77,4 +77,10 @@ config SPI_NAND_FORESEE
 	help
 	  Add support for various FORESEE SPI Nand flash chips
 
+config SPI_NAND_BIWIN
+	default y
+	bool "BIWIN SPI flash support"
+	help
+	  Add support for various BIWIN SPI Nand flash chips
+
 endif
diff --git a/drivers/mtd/nand/spi/Makefile b/drivers/mtd/nand/spi/Makefile
index 2ec3b33285..a8ca970920 100644
--- a/drivers/mtd/nand/spi/Makefile
+++ b/drivers/mtd/nand/spi/Makefile
@@ -12,4 +12,5 @@ obj-$(CONFIG_SPI_NAND_XTX) += xtx.o
 obj-$(CONFIG_SPI_NAND_HYF) += hyf.o
 obj-$(CONFIG_SPI_NAND_FMSH) += fmsh.o
 obj-$(CONFIG_SPI_NAND_FORESEE) += foresee.o
+obj-$(CONFIG_SPI_NAND_BIWIN) += biwin.o
 obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
diff --git a/drivers/mtd/nand/spi/biwin.c b/drivers/mtd/nand/spi/biwin.c
new file mode 100644
index 0000000000..5c0629547c
--- /dev/null
+++ b/drivers/mtd/nand/spi/biwin.c
@@ -0,0 +1,130 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
+ */
+
+#ifndef __UBOOT__
+#include <linux/device.h>
+#include <linux/kernel.h>
+#endif
+#include <linux/mtd/spinand.h>
+
+#define SPINAND_MFR_BIWIN		0xBC
+
+#define BIWIN_CFG_BUF_READ		BIT(3)
+#define BIWIN_STATUS_ECC_HAS_BITFLIPS_T	(3 << 4)
+
+static SPINAND_OP_VARIANTS(read_cache_variants,
+		SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
+
+static SPINAND_OP_VARIANTS(write_cache_variants,
+		SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
+		SPINAND_PROG_LOAD(true, 0, NULL, 0));
+
+static SPINAND_OP_VARIANTS(update_cache_variants,
+		SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
+		SPINAND_PROG_LOAD(false, 0, NULL, 0));
+
+static int bwjx08k_ooblayout_ecc(struct mtd_info *mtd, int section,
+				 struct mtd_oob_region *region)
+{
+	if (section > 3)
+		return -ERANGE;
+
+	region->offset = (16 * section) + 12;
+	region->length = 4;
+
+	return 0;
+}
+
+static int bwjx08k_ooblayout_free(struct mtd_info *mtd, int section,
+				  struct mtd_oob_region *region)
+{
+	if (section > 3)
+		return -ERANGE;
+
+	region->offset = (16 * section) + 2;
+	region->length = 10;
+
+	return 0;
+}
+
+static const struct mtd_ooblayout_ops bwjx08k_ooblayout = {
+	.ecc = bwjx08k_ooblayout_ecc,
+	.rfree = bwjx08k_ooblayout_free,
+};
+
+static int bwjx08k_ecc_get_status(struct spinand_device *spinand,
+				  u8 status)
+{
+	struct nand_device *nand = spinand_to_nand(spinand);
+
+	switch (status & STATUS_ECC_MASK) {
+	case STATUS_ECC_NO_BITFLIPS:
+		return 0;
+
+	case STATUS_ECC_UNCOR_ERROR:
+		return -EBADMSG;
+
+	case STATUS_ECC_HAS_BITFLIPS:
+		return 1;
+
+	default:
+		return nand->eccreq.strength;
+	}
+
+	return -EINVAL;
+}
+
+/* Another set for the same id[2] devices in one series */
+static const struct spinand_info biwin_spinand_table[] = {
+	SPINAND_INFO("BWJX08K", 0xB3,
+		     NAND_MEMORG(1, 2048, 64, 64, 2048, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&bwjx08k_ooblayout,
+				     bwjx08k_ecc_get_status)),
+};
+
+/**
+ * biwin_spinand_detect - initialize device related part in spinand_device
+ * struct if it is a Winbond device.
+ * @spinand: SPI NAND device structure
+ */
+static int biwin_spinand_detect(struct spinand_device *spinand)
+{
+	u8 *id = spinand->id.data;
+	int ret;
+
+	/*
+	 * BIWIN SPI NAND read ID need a dummy byte,
+	 * so the first byte in raw_id is dummy.
+	 */
+	if (id[1] != SPINAND_MFR_BIWIN)
+		return 0;
+
+	ret = spinand_match_and_init(spinand, biwin_spinand_table,
+				     ARRAY_SIZE(biwin_spinand_table), id[2]);
+	if (ret)
+		return ret;
+
+	return 1;
+}
+
+static const struct spinand_manufacturer_ops biwin_spinand_manuf_ops = {
+	.detect = biwin_spinand_detect,
+};
+
+const struct spinand_manufacturer biwin_spinand_manufacturer = {
+	.id = SPINAND_MFR_BIWIN,
+	.name = "BIWIN",
+	.ops = &biwin_spinand_manuf_ops,
+};
diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index ebbfe5ab17..eb8cb26462 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -848,6 +848,9 @@ static const struct spinand_manufacturer *spinand_manufacturers[] = {
 #ifdef CONFIG_SPI_NAND_FORESEE
 	&foresee_spinand_manufacturer,
 #endif
+#ifdef CONFIG_SPI_NAND_BIWIN
+	&biwin_spinand_manufacturer,
+#endif
 };
 
 static int spinand_manufacturer_detect(struct spinand_device *spinand)
diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
index 7050d90a1c..043c5d5cc7 100644
--- a/include/linux/mtd/spinand.h
+++ b/include/linux/mtd/spinand.h
@@ -212,6 +212,7 @@ extern const struct spinand_manufacturer xtx_spinand_manufacturer;
 extern const struct spinand_manufacturer hyf_spinand_manufacturer;
 extern const struct spinand_manufacturer fmsh_spinand_manufacturer;
 extern const struct spinand_manufacturer foresee_spinand_manufacturer;
+extern const struct spinand_manufacturer biwin_spinand_manufacturer;
 
 /**
  * struct spinand_op_variants - SPI NAND operation variants

commit bd3ad955a3cc8367062de9abdc193070874f403e
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Thu Jan 14 14:43:48 2021 +0800

    scripts/dtc: phandle index start from 0x1000000
    
    Change-Id: I1141545e4592bfebf812f2477d1851d178ee8bd8
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/scripts/dtc/livetree.c b/scripts/dtc/livetree.c
index 6846ad2fd6..ed9d2cc117 100644
--- a/scripts/dtc/livetree.c
+++ b/scripts/dtc/livetree.c
@@ -569,7 +569,7 @@ struct node *get_node_by_ref(struct node *tree, const char *ref)
 
 cell_t get_node_phandle(struct node *root, struct node *node)
 {
-	static cell_t phandle = 1; /* FIXME: ick, static local */
+	static cell_t phandle = 0x10000000; /* FIXME: ick, static local */
 
 	if ((node->phandle != 0) && (node->phandle != -1))
 		return node->phandle;

commit 69bb6ffab410df1e7558c31f21eed51e9ff827a0
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Thu Jan 14 14:33:40 2021 +0800

    mtd: mtd_blk: Only reserve for last partition with grow tag
    
    Change-Id: Icd3bd87b45bdb3af6688269a2332463f570f4d46
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index f0fbe6bd18..df80451e26 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -402,7 +402,8 @@ char *mtd_part_parse(void)
 			 (int)(size_t)info.start << 9,
 			 info.name);
 		strcat(mtd_part_info, ",");
-		if (part_get_info(dev_desc, p + 1, &info)) {
+		if (part_get_info(dev_desc, p + 1, &info) &&
+		    (info.size + info.start + 33) == dev_desc->lba) {
 			if (dev_desc->devnum == BLK_MTD_SPI_NOR) {
 				/* Nor is 64KB erase block(kernel) and gpt table just
 				* resserve 33 sectors for the last partition. This

commit ce9d2743bad9006120c201dbdf6bea58757a3d39
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Thu Jan 14 11:59:30 2021 +0800

    mtd: mtd_blk: spinor reserved area aligned to 64KB
    
    1.reserve for GPT
    2.kernel spinor erasesize is 64KB
    
    Change-Id: I32a5b26f8f39b4b226ec54342ce5d8d3d71f1c4d
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index 2ee5b87137..f0fbe6bd18 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -403,18 +403,33 @@ char *mtd_part_parse(void)
 			 info.name);
 		strcat(mtd_part_info, ",");
 		if (part_get_info(dev_desc, p + 1, &info)) {
-			/* Nand flash is erased by block and gpt table just
-			 * resserve 33 sectors for the last partition. This
-			 * will erase the backup gpt table by user program,
-			 * so reserve one block.
-			 */
-			snprintf(mtd_part_info_p, data_len - 1, "0x%x@0x%x(%s)",
-				 (int)(size_t)(info.size -
-				 (info.size - 1) %
-				 (mtd->erasesize >> 9) - 1) << 9,
-				 (int)(size_t)info.start << 9,
-				 info.name);
-			break;
+			if (dev_desc->devnum == BLK_MTD_SPI_NOR) {
+				/* Nor is 64KB erase block(kernel) and gpt table just
+				* resserve 33 sectors for the last partition. This
+				* will erase the backup gpt table by user program,
+				* so reserve one block.
+				*/
+				snprintf(mtd_part_info_p, data_len - 1, "0x%x@0x%x(%s)",
+					(int)(size_t)(info.size -
+					(info.size - 1) %
+					(0x10000 >> 9) - 1) << 9,
+					(int)(size_t)info.start << 9,
+					info.name);
+				break;
+			} else {
+				/* Nand flash is erased by block and gpt table just
+				* resserve 33 sectors for the last partition. This
+				* will erase the backup gpt table by user program,
+				* so reserve one block.
+				*/
+				snprintf(mtd_part_info_p, data_len - 1, "0x%x@0x%x(%s)",
+					(int)(size_t)(info.size -
+					(info.size - 1) %
+					(mtd->erasesize >> 9) - 1) << 9,
+					(int)(size_t)info.start << 9,
+					info.name);
+				break;
+			}
 		}
 		length = strlen(mtd_part_info_temp);
 		data_len -= length;

commit e3a5bc90c02bbc2746c2c54ad85e17ae46c5c60d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Jan 17 16:03:55 2021 +0800

    rockchip: rk3568: add distro boot support
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Id1edbf251a363698f07b2b9c069fd0890c7c55ff

diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h
index 33aceeec6b..712ae83b51 100644
--- a/include/configs/rk3568_common.h
+++ b/include/configs/rk3568_common.h
@@ -74,7 +74,7 @@
 
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	ENV_MEM_LAYOUT_SETTINGS \
-	"partitions=" PARTS_DEFAULT \
+	"partitions=" PARTS_RKIMG \
 	ROCKCHIP_DEVICE_SETTINGS \
 	RKIMG_DET_BOOTDEV \
 	BOOTENV
@@ -82,7 +82,8 @@
 #undef RKIMG_BOOTCOMMAND
 #define RKIMG_BOOTCOMMAND		\
 	"boot_fit;"			\
-	"boot_android ${devtype} ${devnum};"
+	"boot_android ${devtype} ${devnum};" \
+	"run distro_bootcmd;"
 #endif
 
 /* rockchip ohci host driver */

commit 5e0c61290d43072c799dd9bbc82ea418fc673d52
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jan 11 02:40:39 2021 +0000

    rockchip: resource: add gpio-v2 support for hw-id dtb
    
    It's for rv1126/rk356x.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ic5a58483e43154c8ba61be466214f87753e47dd3

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 3d5f29e9f7..d173f906db 100644
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -586,11 +586,48 @@ int rockchip_read_resource_file(void *buf, const char *name,
 #define KEY_WORDS_ADC_CTRL	"#_"
 #define KEY_WORDS_ADC_CH	"_ch"
 #define KEY_WORDS_GPIO		"#gpio"
-#define GPIO_SWPORT_DDR		0x04
-#define GPIO_EXT_PORT		0x50
 #define MAX_ADC_CH_NR		10
 #define MAX_GPIO_NR		10
 
+#ifdef CONFIG_ROCKCHIP_GPIO_V2
+#define GPIO_SWPORT_DDR		0x08
+#define GPIO_EXT_PORT		0x70
+#define WMSK_SETBIT(n)		(n << 16 | n)
+#define WMSK_CLRBIT(n)		(n << 16)
+#define REG_PLUS4(off, n)	(off + (n >= BIT(16) ? 4 : 0))
+#define BIT_SUB16(n)		(n >= BIT(16) ? (n >> 16) : n)
+
+static int gpio_read(fdt_addr_t gpio_addr,
+		     int gpio_bank, int gpio_pin)
+{
+	uint32_t offset, bit;
+
+	bit = gpio_bank * 8 + gpio_pin;
+
+	offset = REG_PLUS4(GPIO_SWPORT_DDR, bit);
+	bit = BIT_SUB16(bit);
+	writel(WMSK_CLRBIT(bit), gpio_addr + offset);
+
+	return readl(gpio_addr + GPIO_EXT_PORT);
+}
+
+#else
+#define GPIO_SWPORT_DDR		0x04
+#define GPIO_EXT_PORT		0x50
+
+static int gpio_read(fdt_addr_t gpio_addr,
+		     int gpio_bank, int gpio_pin)
+{
+	uint32_t val;
+
+	val = readl(gpio_addr + GPIO_SWPORT_DDR);
+	val &= ~(1 << (gpio_bank * 8 + gpio_pin));
+	writel(val, gpio_addr + GPIO_SWPORT_DDR);
+
+	return readl(gpio_addr + GPIO_EXT_PORT);
+}
+#endif
+
 /*
  * How to make it works ?
  *
@@ -684,8 +721,7 @@ static int gpio_parse_base_address(fdt_addr_t *gpio_base_addr)
 {
 	static int initialized;
 	ofnode parent, node;
-	const char *name;
-	int idx, nr = 0;
+	int idx = 0;
 
 	if (initialized)
 		return 0;
@@ -698,23 +734,15 @@ static int gpio_parse_base_address(fdt_addr_t *gpio_base_addr)
 
 	ofnode_for_each_subnode(node, parent) {
 		if (!ofnode_get_property(node, "gpio-controller", NULL)) {
-			debug("   - Can't find gpio-controller\n");
+			debug("   - Not gpio controller node\n");
 			continue;
 		}
-
-		name = ofnode_get_name(node);
-		if (!is_digit((char)*(name + 4))) {
-			debug("   - bad gpio node name: %s\n", name);
-			continue;
-		}
-
-		nr++;
-		idx = *(name + 4) - '0';
 		gpio_base_addr[idx] = ofnode_get_addr(node);
 		debug("   - gpio%d: 0x%x\n", idx, (uint32_t)gpio_base_addr[idx]);
+		idx++;
 	}
 
-	if (nr == 0) {
+	if (idx == 0) {
 		debug("   - parse gpio address failed\n");
 		return -EINVAL;
 	}
@@ -735,19 +763,19 @@ static int gpio_parse_base_address(fdt_addr_t *gpio_base_addr)
  *    eg: ...#gpio0a6=1#gpio1c2=0....dtb
  *
  * 2. U-Boot dtsi about gpio node:
- *    (1) enable "u-boot,dm-pre-reloc;" for all gpio node;
+ *    (1) enable "u-boot,dm-pre-reloc;" for [all] gpio node;
  *    (2) set all gpio status "disabled"(Because we just want their property);
  */
 static int rockchip_read_dtb_by_gpio(const char *file_name)
 {
 	static uint32_t cached_v[MAX_GPIO_NR];
-	fdt_addr_t gpio_base_addr[MAX_GPIO_NR];
+	static fdt_addr_t gpio_base_addr[MAX_GPIO_NR];
 	int ret, found = 0, offset = strlen(KEY_WORDS_GPIO);
 	uint8_t port, pin, bank, lvl, val;
 	char *strgpio, *p;
 	uint32_t bit;
 
-	debug("%s\n", file_name);
+	debug("[*] %s\n", file_name);
 
 	/* Parse gpio address */
 	memset(gpio_base_addr, 0, sizeof(gpio_base_addr));
@@ -787,25 +815,20 @@ static int rockchip_read_dtb_by_gpio(const char *file_name)
 				debug("   - can't find gpio%d base address\n", port);
 				return 0;
 			}
-
-			/* Input mode */
-			val = readl(gpio_base_addr[port] + GPIO_SWPORT_DDR);
-			val &= ~(1 << (bank * 8 + pin));
-			writel(val, gpio_base_addr[port] + GPIO_SWPORT_DDR);
-
-			cached_v[port] =
-				readl(gpio_base_addr[port] + GPIO_EXT_PORT);
+			cached_v[port] = gpio_read(gpio_base_addr[port], bank, pin);
+			debug("   - gpio-val[%d]: 0x%08x\n", port, cached_v[port]);
 		}
 
 		/* Verify result */
 		bit = bank * 8 + pin;
 		val = cached_v[port] & (1 << bit) ? 1 : 0;
-
 		if (val == !!lvl) {
 			found = 1;
 			strgpio = strstr(p, KEY_WORDS_GPIO);
 		} else {
 			found = 0;
+			debug("   - parse: gpio%d%c%d=%d, read=%d %s\n",
+			      port, bank + 'a', pin, lvl, val, found ? "(Y)" : "(N)");
 			break;
 		}
 
@@ -813,6 +836,8 @@ static int rockchip_read_dtb_by_gpio(const char *file_name)
 		      port, bank + 'a', pin, lvl, val, found ? "(Y)" : "(N)");
 	}
 
+	debug("   # result: %s\n", found ? "OK" : "Try next one ..");
+
 	return found ? 0 : -ENOENT;
 }
 

commit a39ea6856429845ac930b6ebc79531208b16f9fb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Jan 16 12:07:19 2021 +0800

    rockchip: rk3568: select ARM_SMCCC to enable psci reset
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I1887d599e6219541c11e7a087a2a7480589244f6

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 3a0ba456fd..f1c2ec3045 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -384,6 +384,7 @@ endif
 config ROCKCHIP_RK3568
 	bool "Support Rockchip RK3568"
 	select ARM64
+	select ARM_SMCCC
 	select GICV3
 	select SPL
 	select SUPPORT_TPL

commit d63e2d24c51d436c11c43538ac46ecef4f2a5d52
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Jan 15 02:55:06 2021 +0000

    video/drm: analogix_dp: Fix voltage_swing/pre_emphasis level calculation
    
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
    Change-Id: I07a071b77a254cbe940b4df4dd6b52b069339076

diff --git a/drivers/video/drm/analogix_dp_reg.c b/drivers/video/drm/analogix_dp_reg.c
index e27d60a9ea..d2cb10cc0e 100644
--- a/drivers/video/drm/analogix_dp_reg.c
+++ b/drivers/video/drm/analogix_dp_reg.c
@@ -996,10 +996,10 @@ void analogix_dp_set_lane_link_training(struct analogix_dp_device *dp)
 				  ANALOGIX_DP_LN0_LINK_TRAINING_CTL + 4 * lane,
 				  dp->link_train.training_lane[lane]);
 
-		vs = (training_lane >> DP_TRAIN_VOLTAGE_SWING_SHIFT) &
-		     DP_TRAIN_VOLTAGE_SWING_MASK;
-		pe = (training_lane >> DP_TRAIN_PRE_EMPHASIS_SHIFT) &
-		     DP_TRAIN_PRE_EMPHASIS_MASK;
+		vs = (training_lane & DP_TRAIN_VOLTAGE_SWING_MASK) >>
+		     DP_TRAIN_VOLTAGE_SWING_SHIFT;
+		pe = (training_lane & DP_TRAIN_PRE_EMPHASIS_MASK) >>
+		     DP_TRAIN_PRE_EMPHASIS_SHIFT;
 		phy_cfg.dp.voltage[lane] = vs;
 		phy_cfg.dp.pre[lane] = pe;
 	}

commit c69667e0e2bf4290ab1f408fcde58b8806ac266b
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Wed Jan 13 17:06:03 2021 +0800

    drivers: ram: sdram_common: add os reg v3 define
    
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>
    Change-Id: I2cedcddcebdfd32da113edd1e18d2498b5813e22

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h b/arch/arm/include/asm/arch-rockchip/sdram_common.h
index 0676c969cc..db1ab163c3 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_common.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_common.h
@@ -273,6 +273,7 @@ struct sdram_base_params {
 #define SYS_REG_ENC_ROW_3_4(n, ch)	((n) << (30 + (ch)))
 #define SYS_REG_DEC_ROW_3_4(n, ch)	(((n) >> (30 + (ch))) & 0x1)
 #define SYS_REG_ENC_CHINFO(ch)		(1 << (28 + (ch)))
+#define SYS_REG_DEC_CHINFO(n, ch)	(((n) >> (28 + (ch))) & 0x1)
 #define SYS_REG_ENC_DDRTYPE(n)		((n) << 13)
 #define SYS_REG_DEC_DDRTYPE(n)		(((n) >> 13) & 0x7)
 #define SYS_REG_ENC_NUM_CH(n)		(((n) - 1) << 12)
@@ -292,6 +293,8 @@ struct sdram_base_params {
 #define SYS_REG_ENC_VERSION(n)		((n) << 28)
 #define SYS_REG_DEC_VERSION(n)		(((n) >> 28) & 0xf)
 #define SYS_REG_ENC_CS0_ROW(n, os_reg2, os_reg3, ch) do { \
+			(os_reg2) &= (~(0x3 << (6 + 16 * (ch)))); \
+			(os_reg3) &= (~(0x1 << (5 + 2 * (ch)))); \
 			(os_reg2) |= (((n) - 13) & 0x3) << (6 + 16 * (ch)); \
 			(os_reg3) |= ((((n) - 13) & 0x4) >> 2) << \
 				     (5 + 2 * (ch)); \
@@ -316,10 +319,66 @@ struct sdram_base_params {
 #define SYS_REG_ENC_CS1_COL(n, ch)	(((n) - 9) << (0 + 2 * (ch)))
 #define SYS_REG_DEC_CS1_COL(n, ch)	(9 + (((n) >> (0 + 2 * (ch))) & 0x3))
 
+/* DDR SYS REG Version 3 */
+#define DDR_SYS_REG_VERSION_3		(0x3)
+#define SYS_REG_ENC_ROW_3_4_V3(row3_4, ch)	SYS_REG_ENC_ROW_3_4(row3_4, ch)
+#define SYS_REG_DEC_ROW_3_4_V3(reg2, ch)	SYS_REG_DEC_ROW_3_4(reg2, ch)
+#define SYS_REG_ENC_CHINFO_V3(ch)	SYS_REG_ENC_CHINFO(ch)
+#define SYS_REG_DEC_CHINFO_V3(reg2, ch)	SYS_REG_DEC_CHINFO(reg2, ch)
+#define SYS_REG_ENC_DDRTYPE_V3(n, reg2, reg3)	do { \
+		(reg2) &= (~(0x7 << 13)); \
+		(reg3) &= (~(0x3 << 12)); \
+		(reg2) |= (((n) & 0x7) << 13); \
+		(reg3) |= (((n) >> 3) & 0x3) << 12; \
+	} while (0)
+#define SYS_REG_DEC_DDRTYPE_V3(reg2, reg3) \
+	((((reg2) >> 13) & 0x7) | \
+	 ((((reg3) >> 12) & 0x3) << 3))
+
+#define SYS_REG_ENC_NUM_CH_V3(n)		SYS_REG_ENC_NUM_CH(n)
+#define SYS_REG_DEC_NUM_CH_V3(reg2)		SYS_REG_DEC_NUM_CH(reg2)
+#define SYS_REG_ENC_CH1_3_RANK(cs)		SYS_REG_ENC_RANK(cs, 1)
+#define SYS_REG_DEC_CH1_3_RANK(reg2)		SYS_REG_DEC_RANK(reg2, 1)
+#define SYS_REG_ENC_CH0_2_RANK_V3(n, reg2, reg3)	do { \
+		(reg2) &= (~(1 << 11)); \
+		(reg3) &= (~(1 << 14)); \
+		(reg2) |= (((n) == 2) ? 1 : 0) << 11; \
+		(reg3) |= (((n) == 4) ? 1 : 0) << 14; \
+	} while (0)
+#define SYS_REG_DEC_CH0_2_RANK_V3(reg2, reg3) \
+		(1 << ((((reg2) >> 11) & 1) | ((((reg3) >> 14) & 1) << 1)))
+#define SYS_REG_ENC_COL_V3(col, ch)		SYS_REG_ENC_COL(col, ch)
+#define SYS_REG_DEC_COL_V3(reg2, ch)		SYS_REG_DEC_COL(reg2, ch)
+#define SYS_REG_ENC_BK_V3(bk, ch)		SYS_REG_ENC_BK(bk, ch)
+#define SYS_REG_DEC_BK_V3(reg2, ch)		SYS_REG_DEC_BK(reg2, ch)
+#define SYS_REG_ENC_BW_V3(bw, ch)		SYS_REG_ENC_BW(bw, ch)
+#define SYS_REG_DEC_BW_V3(reg2, ch)		SYS_REG_DEC_BW(reg2, ch)
+#define SYS_REG_ENC_DBW_V3(dbw, ch)		SYS_REG_ENC_DBW(dbw, ch)
+#define SYS_REG_DEC_DBW_V3(reg2, ch)		SYS_REG_DEC_DBW(reg2, ch)
+#define SYS_REG_ENC_VERSION_V3(n)		SYS_REG_ENC_VERSION(n)
+#define SYS_REG_DEC_VERSION_V3(reg3)		SYS_REG_DEC_VERSION(reg3)
+#define SYS_REG_ENC_CS0_ROW_V3(row, reg2, reg3, ch) \
+		SYS_REG_ENC_CS0_ROW(row, reg2, reg3, ch)
+#define SYS_REG_DEC_CS0_ROW_V3(reg2, reg3, ch) \
+		SYS_REG_DEC_CS0_ROW(reg2, reg3, ch)
+#define SYS_REG_ENC_CS1_ROW_V3(row, reg2, reg3, ch) \
+		SYS_REG_ENC_CS1_ROW(row, reg2, reg3, ch)
+#define SYS_REG_DEC_CS1_ROW_V3(reg2, reg3, ch) \
+		SYS_REG_DEC_CS1_ROW(reg2, reg3, ch)
+#define SYS_REG_ENC_CS2_DELTA_ROW_V3(row_del)	((row_del) << 15)
+#define SYS_REG_DEC_CS2_DELTA_ROW_V3(reg3)	(((reg3) >> 15) & 1)
+#define SYS_REG_ENC_CS3_DELTA_ROW_V3(row_del)	((row_del) << 16)
+#define SYS_REG_DEC_CS3_DELTA_ROW_V3(reg3)	(((reg3) >> 16) & 1)
+
+#define SYS_REG_ENC_CS1_COL_V3(col, ch)		SYS_REG_ENC_CS1_COL(col, ch)
+#define SYS_REG_DEC_CS1_COL_V3(reg3, ch)	SYS_REG_DEC_CS1_COL(reg3, ch)
+
 void sdram_org_config(struct sdram_cap_info *cap_info,
 		      struct sdram_base_params *base,
 		      u32 *p_os_reg2, u32 *p_os_reg3, u32 channel);
-
+void sdram_org_config_v3(struct sdram_cap_info *cap_info,
+			 struct sdram_base_params *base,
+			 u32 *p_os_reg2, u32 *p_os_reg3, u32 channel);
 int sdram_detect_bw(struct sdram_cap_info *cap_info);
 int sdram_detect_cs(struct sdram_cap_info *cap_info);
 int sdram_detect_col(struct sdram_cap_info *cap_info,
diff --git a/drivers/ram/rockchip/sdram_common.c b/drivers/ram/rockchip/sdram_common.c
index 93980ad701..440bc000d8 100644
--- a/drivers/ram/rockchip/sdram_common.c
+++ b/drivers/ram/rockchip/sdram_common.c
@@ -178,6 +178,48 @@ void sdram_org_config(struct sdram_cap_info *cap_info,
 	*p_os_reg3 |= SYS_REG_ENC_VERSION(DDR_SYS_REG_VERSION);
 }
 
+void sdram_org_config_v3(struct sdram_cap_info *cap_info,
+			 struct sdram_base_params *base,
+			 u32 *p_os_reg2, u32 *p_os_reg3, u32 channel)
+{
+	SYS_REG_ENC_DDRTYPE_V3(base->dramtype, *p_os_reg2, *p_os_reg3);
+
+	*p_os_reg2 |= SYS_REG_ENC_NUM_CH_V3((base->num_channels > 2) ?
+					    2 : base->num_channels);
+
+	*p_os_reg2 |= SYS_REG_ENC_ROW_3_4_V3(cap_info->row_3_4, channel);
+	*p_os_reg2 |= SYS_REG_ENC_CHINFO_V3((channel >= 2) ? channel - 2 : channel);
+	if (channel == 0 || channel == 2)
+		SYS_REG_ENC_CH0_2_RANK_V3(cap_info->rank,
+					  *p_os_reg2, *p_os_reg3);
+	else
+		*p_os_reg2 |= SYS_REG_ENC_CH1_3_RANK(cap_info->rank);
+
+	*p_os_reg2 |= SYS_REG_ENC_COL_V3(cap_info->col, channel);
+	*p_os_reg2 |= SYS_REG_ENC_BK_V3(cap_info->bk, channel);
+	*p_os_reg2 |= SYS_REG_ENC_BW_V3(cap_info->bw, channel);
+	*p_os_reg2 |= SYS_REG_ENC_DBW_V3(cap_info->dbw, channel);
+
+	SYS_REG_ENC_CS0_ROW_V3(cap_info->cs0_row, *p_os_reg2, *p_os_reg3, channel);
+	if (cap_info->cs1_row)
+		SYS_REG_ENC_CS1_ROW_V3(cap_info->cs1_row, *p_os_reg2,
+				       *p_os_reg3, channel);
+	if ((channel == 0 || channel == 2) && cap_info->rank > 2) {
+		if (cap_info->cs2_row == cap_info->cs0_row)
+			*p_os_reg3 |= SYS_REG_ENC_CS2_DELTA_ROW_V3(0);
+		else
+			*p_os_reg3 |= SYS_REG_ENC_CS2_DELTA_ROW_V3(1);
+
+		if (cap_info->cs3_row == cap_info->cs0_row)
+			*p_os_reg3 |= SYS_REG_ENC_CS3_DELTA_ROW_V3(0);
+		else
+			*p_os_reg3 |= SYS_REG_ENC_CS3_DELTA_ROW_V3(1);
+	}
+
+	*p_os_reg3 |= SYS_REG_ENC_CS1_COL_V3(cap_info->col, channel);
+	*p_os_reg3 |= SYS_REG_ENC_VERSION(DDR_SYS_REG_VERSION_3);
+}
+
 int sdram_detect_bw(struct sdram_cap_info *cap_info)
 {
 	return 0;

commit a903774da2be54148b1080f60c4e5f9f168dff30
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Wed Jan 13 16:54:06 2021 +0800

    rockchip: dts: rk3399: update dmc node for new sdram_cap_info
    
    new sdram_cap_info add cs2,cs3 row info
    
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>
    Change-Id: Ia7eab3d473dbc8d98a277df6cffefe99463967f3

diff --git a/arch/arm/dts/rk3399-sdram-ddr3-1333.dtsi b/arch/arm/dts/rk3399-sdram-ddr3-1333.dtsi
index d0d7c6439d..7f8fd307fe 100644
--- a/arch/arm/dts/rk3399-sdram-ddr3-1333.dtsi
+++ b/arch/arm/dts/rk3399-sdram-ddr3-1333.dtsi
@@ -14,6 +14,8 @@
 		0x0
 		0xf
 		0xf
+		0
+		0
 		0xf
 		0xf
 		1
@@ -31,6 +33,8 @@
 		0x0
 		0xf
 		0xf
+		0
+		0
 		0xf
 		0xf
 		1
diff --git a/arch/arm/dts/rk3399-sdram-ddr3-1600.dtsi b/arch/arm/dts/rk3399-sdram-ddr3-1600.dtsi
index cab72af48b..a4217ffed8 100644
--- a/arch/arm/dts/rk3399-sdram-ddr3-1600.dtsi
+++ b/arch/arm/dts/rk3399-sdram-ddr3-1600.dtsi
@@ -14,6 +14,8 @@
 		0x0
 		0xf
 		0xf
+		0
+		0
 		0xf
 		0xf
 		1
@@ -31,6 +33,8 @@
 		0x0
 		0xf
 		0xf
+		0
+		0
 		0xf
 		0xf
 		1
diff --git a/arch/arm/dts/rk3399-sdram-ddr3-1866.dtsi b/arch/arm/dts/rk3399-sdram-ddr3-1866.dtsi
index db407df2de..1bcdcc464f 100644
--- a/arch/arm/dts/rk3399-sdram-ddr3-1866.dtsi
+++ b/arch/arm/dts/rk3399-sdram-ddr3-1866.dtsi
@@ -14,6 +14,8 @@
 		0x0
 		0xf
 		0xf
+		0
+		0
 		0xf
 		0xf
 		1
@@ -31,6 +33,8 @@
 		0x0
 		0xf
 		0xf
+		0
+		0
 		0xf
 		0xf
 		1
diff --git a/arch/arm/dts/rk3399-sdram-ddr3-4G-1600.dtsi b/arch/arm/dts/rk3399-sdram-ddr3-4G-1600.dtsi
index 45db141f08..fa56142ff7 100644
--- a/arch/arm/dts/rk3399-sdram-ddr3-4G-1600.dtsi
+++ b/arch/arm/dts/rk3399-sdram-ddr3-4G-1600.dtsi
@@ -14,6 +14,8 @@
 		0x0
 		0xf
 		0xf
+		0
+		0
 		0xf
 		0xf
 		1
@@ -31,6 +33,8 @@
 		0x0
 		0xf
 		0xf
+		0
+		0
 		0xf
 		0xf
 		1
diff --git a/arch/arm/dts/rk3399-sdram-lpddr3-4GB-1600.dtsi b/arch/arm/dts/rk3399-sdram-lpddr3-4GB-1600.dtsi
index ad2d943ced..7f8ada044f 100644
--- a/arch/arm/dts/rk3399-sdram-lpddr3-4GB-1600.dtsi
+++ b/arch/arm/dts/rk3399-sdram-lpddr3-4GB-1600.dtsi
@@ -14,6 +14,8 @@
 		0x0
 		0xf
 		0xf
+		0
+		0
 		0xf
 		0xf
 		1
@@ -31,6 +33,8 @@
 		0x0
 		0xf
 		0xf
+		0
+		0
 		0xf
 		0xf
 		1
diff --git a/arch/arm/dts/rk3399-sdram-lpddr4-100.dtsi b/arch/arm/dts/rk3399-sdram-lpddr4-100.dtsi
index da5bf40b3a..9f30035b69 100644
--- a/arch/arm/dts/rk3399-sdram-lpddr4-100.dtsi
+++ b/arch/arm/dts/rk3399-sdram-lpddr4-100.dtsi
@@ -11,6 +11,8 @@
 		0x0
 		0xf
 		0xf
+		0
+		0
 		0xf
 		0xf
 		1
@@ -28,6 +30,8 @@
 		0x0
 		0xf
 		0xf
+		0
+		0
 		0xf
 		0xf
 		1

commit 59b9aa0550a14495cb39ecb2468a6bd2ca32c858
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Wed Jan 13 16:50:29 2021 +0800

    rockchip: dts: rk3328: update dmc node for new sdram_cap_info
    
    new sdram_cap_info add cs2,cs3 row info
    
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>
    Change-Id: Id276447507752c581632d9d92a0524f2ba276dd8

diff --git a/arch/arm/dts/rk3328-sdram-ddr3-666.dtsi b/arch/arm/dts/rk3328-sdram-ddr3-666.dtsi
index 3e88ed443b..4e3cc001d8 100644
--- a/arch/arm/dts/rk3328-sdram-ddr3-666.dtsi
+++ b/arch/arm/dts/rk3328-sdram-ddr3-666.dtsi
@@ -14,6 +14,8 @@
 		0x0
 		0x10
 		0x10
+		0
+		0
 		0x10
 		0x10
 		0
diff --git a/arch/arm/dts/rk3328-sdram-ddr4-666.dtsi b/arch/arm/dts/rk3328-sdram-ddr4-666.dtsi
index 0859649a69..5928ce2b1c 100644
--- a/arch/arm/dts/rk3328-sdram-ddr4-666.dtsi
+++ b/arch/arm/dts/rk3328-sdram-ddr4-666.dtsi
@@ -11,6 +11,8 @@
 		0x0
 		0x11
 		0x0
+		0
+		0
 		0x11
 		0x0
 		0
diff --git a/arch/arm/dts/rk3328-sdram-lpddr3-666.dtsi b/arch/arm/dts/rk3328-sdram-lpddr3-666.dtsi
index b9d3b3b948..5e89c23d22 100644
--- a/arch/arm/dts/rk3328-sdram-lpddr3-666.dtsi
+++ b/arch/arm/dts/rk3328-sdram-lpddr3-666.dtsi
@@ -14,6 +14,8 @@
 		0x0
 		0x10
 		0x10
+		0
+		0
 		0x10
 		0x10
 		0

commit 1a6462e18b332d3d7224ca63f04699cdae79be46
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Wed Jan 13 16:36:10 2021 +0800

    drivers: ram: sdram_common: add 4rank support for sdram_cap_info
    
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>
    Change-Id: Icda7bdc73e6c36c1351f0671b374a9d906dafec8

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h b/arch/arm/include/asm/arch-rockchip/sdram_common.h
index 3e8f6ed83d..0676c969cc 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_common.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_common.h
@@ -231,10 +231,8 @@ struct sdram_cap_info {
 	unsigned int row_3_4;
 	unsigned int cs0_row;
 	unsigned int cs1_row;
-#ifdef CONFIG_ROCKCHIP_RK3568
 	unsigned int cs2_row;
 	unsigned int cs3_row;
-#endif
 	unsigned int cs0_high16bit_row;
 	unsigned int cs1_high16bit_row;
 	unsigned int ddrconfig;
diff --git a/drivers/ram/rockchip/sdram_common.c b/drivers/ram/rockchip/sdram_common.c
index c00fd89d28..93980ad701 100644
--- a/drivers/ram/rockchip/sdram_common.c
+++ b/drivers/ram/rockchip/sdram_common.c
@@ -77,14 +77,12 @@ void sdram_print_ddr_info(struct sdram_cap_info *cap_info,
 			printdec(cap_info->cs1_high16bit_row);
 		}
 	}
-#ifdef CONFIG_ROCKCHIP_RK3568
 	if (cap_info->rank > 2) {
 		printascii(" CS2 Row=");
 		printdec(cap_info->cs2_row);
 		printascii(" CS3 Row=");
 		printdec(cap_info->cs3_row);
 	}
-#endif
 	printascii(" CS=");
 	printdec(cap_info->rank);
 	printascii(" Die BW=");
@@ -127,7 +125,7 @@ u64 sdram_get_cs_cap(struct sdram_cap_info *cap_info, u32 cs, u32 dram_type)
 			bg + cap_info->bk + cap_info->cs1_row);
 	else
 		cap[1] = 0;
-#ifdef CONFIG_ROCKCHIP_RK3568
+
 	if (cap_info->rank == 4) {
 		cap[2] = 1llu << (cap_info->bw + cap_info->col +
 			bg + cap_info->bk + cap_info->cs2_row);
@@ -137,10 +135,6 @@ u64 sdram_get_cs_cap(struct sdram_cap_info *cap_info, u32 cs, u32 dram_type)
 		cap[2] = 0;
 		cap[3] = 0;
 	}
-#else
-	cap[2] = 0;
-	cap[3] = 0;
-#endif
 	if (cs == 0)
 		return cap[0];
 	else if (cs == 1)

commit b1c0e43cef9371f02f9c70aa89359a1980fe3f54
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Wed Jan 13 09:33:35 2021 +0800

    vendor: rockchip: fix mtd write issue
    
    The page offset is need point to empty page.
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: Ib677e2937fd39b4b56622066cecfbe9a0da297ce

diff --git a/arch/arm/mach-rockchip/vendor.c b/arch/arm/mach-rockchip/vendor.c
index 2e5983c7c3..51fa0de172 100644
--- a/arch/arm/mach-rockchip/vendor.c
+++ b/arch/arm/mach-rockchip/vendor.c
@@ -220,13 +220,13 @@ static int mtd_vendor_storage_init(struct blk_desc *dev_desc)
 					1,
 					(u8 *)buf);
 
-			/* the page is not programed */
+			/* the page is not programmed */
 			if (ret == 1 && vendor_info.hdr->tag == 0xFFFFFFFF)
 				continue;
 
-			/* point to the last programed page */
+			/* point to the next free page */
 			if (s_flash_info.page_offset < offset)
-				s_flash_info.page_offset = offset;
+				s_flash_info.page_offset = offset + s_flash_info.ops_size;
 
 			if (ret != 1 || vendor_info.hdr->tag != VENDOR_TAG)
 				continue;

commit 39c952ae4eb8487bdc81b558bae44a2d9ccd07d1
Author: Weixin Zhou <zwx@rock-chips.com>
Date:   Mon Jan 11 10:35:53 2021 +0800

    video/rk_eink: add poweren for tps65185
    
    Signed-off-by: Weixin Zhou <zwx@rock-chips.com>
    Change-Id: Icc6059a723f9e5d0b90c623497f0b03adea9e726

diff --git a/drivers/video/rk_eink/tps65185.c b/drivers/video/rk_eink/tps65185.c
index 5d9802c857..9a7d90a3d0 100644
--- a/drivers/video/rk_eink/tps65185.c
+++ b/drivers/video/rk_eink/tps65185.c
@@ -15,6 +15,7 @@
 struct tps65185_priv_data {
 	struct udevice *dev;
 	struct gpio_desc pwr_up_gpio;
+	struct gpio_desc pwr_en_gpio;
 	struct gpio_desc vcom_gpio;
 	struct gpio_desc wake_up_gpio;
 	u8 rev_id;
@@ -428,6 +429,13 @@ static int tps65185_probe(struct udevice *dev)
 		printf("Cannot get vcom_gpio GPIO: %d\n", ret);
 		return ret;
 	}
+	ret = gpio_request_by_name(dev, "poweren-gpios", 0,
+				   &tps65185_priv->pwr_en_gpio, GPIOD_IS_OUT);
+	if (!ret)
+		dm_gpio_set_value(&tps65185_priv->pwr_en_gpio, 1);
+	else
+		printf("Cannot get pwren_pin GPIO: %d\n", ret);
+
 	ret = tps65185_hw_init(dev);
 	if (ret) {
 		printf("Cannot init hardware for tps65185: %d\n", ret);

commit fd7b5182835a7c6a57411514986dc70498efef52
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Mon Dec 7 15:11:02 2020 +0800

    rockchip: otp: Add support for rk3568
    
    This adds the necessary data for handling otp on the rk3568.
    
    Change-Id: Id5e8a3a1561604bb307ef17e06d11d7e62d8a840
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/misc/rockchip-otp.c b/drivers/misc/rockchip-otp.c
index f3b6c69bbf..84aecd14d6 100644
--- a/drivers/misc/rockchip-otp.c
+++ b/drivers/misc/rockchip-otp.c
@@ -97,6 +97,57 @@ read_end:
 	return ret;
 }
 
+static int rockchip_rk3568_otp_read(struct udevice *dev, int offset, void *buf,
+				    int size)
+{
+	struct rockchip_otp_platdata *otp = dev_get_platdata(dev);
+	unsigned int addr_start, addr_end, addr_offset, addr_len;
+	u32 out_value;
+	u8 *buffer;
+	int ret = 0, i = 0;
+
+	addr_start = rounddown(offset, RK3568_NBYTES) / RK3568_NBYTES;
+	addr_end = roundup(offset + size, RK3568_NBYTES) / RK3568_NBYTES;
+	addr_offset = offset % RK3568_NBYTES;
+	addr_len = addr_end - addr_start;
+
+	buffer = calloc(1, sizeof(*buffer) * addr_len * RK3568_NBYTES);
+	if (!buffer)
+		return -ENOMEM;
+
+	ret = rockchip_otp_ecc_enable(otp, false);
+	if (ret < 0) {
+		printf("%s rockchip_otp_ecc_enable err\n", __func__);
+		return ret;
+	}
+
+	writel(OTPC_USE_USER | OTPC_USE_USER_MASK, otp->base + OTPC_USER_CTRL);
+	udelay(5);
+	while (addr_len--) {
+		writel(addr_start++ | OTPC_USER_ADDR_MASK,
+		       otp->base + OTPC_USER_ADDR);
+		writel(OTPC_USER_FSM_ENABLE | OTPC_USER_FSM_ENABLE_MASK,
+		       otp->base + OTPC_USER_ENABLE);
+		ret = rockchip_otp_wait_status(otp, OTPC_USER_DONE);
+		if (ret < 0) {
+			printf("%s timeout during read setup\n", __func__);
+			goto read_end;
+		}
+		out_value = readl(otp->base + OTPC_USER_Q);
+		memcpy(&buffer[i], &out_value, RK3568_NBYTES);
+		i += RK3568_NBYTES;
+	}
+
+	memcpy(buf, buffer + addr_offset, size);
+
+read_end:
+	writel(0x0 | OTPC_USE_USER_MASK, otp->base + OTPC_USER_CTRL);
+
+	kfree(buffer);
+
+	return ret;
+}
+
 static int rockchip_rv1126_otp_init(struct udevice *dev)
 {
 	struct rockchip_otp_platdata *otp = dev_get_platdata(dev);
@@ -189,6 +240,10 @@ static const struct otp_data px30_data = {
 	.read = rockchip_px30_otp_read,
 };
 
+static const struct otp_data rk3568_data = {
+	.read = rockchip_rk3568_otp_read,
+};
+
 static const struct otp_data rv1126_data = {
 	.init = rockchip_rv1126_otp_init,
 	.read = rockchip_rv1126_otp_read,
@@ -203,6 +258,10 @@ static const struct udevice_id rockchip_otp_ids[] = {
 		.compatible = "rockchip,rk3308-otp",
 		.data = (ulong)&px30_data,
 	},
+	{
+		.compatible = "rockchip,rk3568-otp",
+		.data = (ulong)&rk3568_data,
+	},
 	{
 		.compatible = "rockchip,rv1126-otp",
 		.data = (ulong)&rv1126_data,
diff --git a/include/rockchip-otp.h b/include/rockchip-otp.h
index bd9915a8f1..176b207d5e 100644
--- a/include/rockchip-otp.h
+++ b/include/rockchip-otp.h
@@ -42,6 +42,8 @@
 
 #define OTPC_TIMEOUT			10000
 
+#define RK3568_NBYTES			2
+
 #define RV1126_OTP_NVM_CEB		0x00
 #define RV1126_OTP_NVM_RSTB		0x04
 #define RV1126_OTP_NVM_ST		0x18

commit b0760df876891a6eff9284359e058c3d840ceefd
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Jan 12 20:16:24 2021 +0800

    rockchip: dts: rk3568: set the sdmmc0-det pin pcfg_pull_up
    
    Since the sdmmc0-det is set to pcfg_pull_none and there is no sd
    card, it has a current loss of 2 mA.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ifb6184d134155a39dc6986632a8346ffc342263f

diff --git a/arch/arm/dts/rk3568-pinctrl.dtsi b/arch/arm/dts/rk3568-pinctrl.dtsi
index 859c227371..a569c01b99 100644
--- a/arch/arm/dts/rk3568-pinctrl.dtsi
+++ b/arch/arm/dts/rk3568-pinctrl.dtsi
@@ -1523,7 +1523,7 @@
 		};
 		sdmmc0_det: sdmmc0-det {
 			rockchip,pins =
-				<0 RK_PA4 1 &pcfg_pull_none>;
+				<0 RK_PA4 1 &pcfg_pull_up>;
 		};
 		sdmmc0_pwren: sdmmc0-pwren {
 			rockchip,pins =
diff --git a/arch/arm/dts/rk3568-u-boot.dtsi b/arch/arm/dts/rk3568-u-boot.dtsi
index 9d424706d2..9ddc2e9292 100644
--- a/arch/arm/dts/rk3568-u-boot.dtsi
+++ b/arch/arm/dts/rk3568-u-boot.dtsi
@@ -401,6 +401,10 @@
 	u-boot,dm-spl;
 };
 
+&pcfg_pull_up {
+	u-boot,dm-spl;
+};
+
 &pcfg_pull_none {
 	u-boot,dm-pre-reloc;
 };

commit 8d52d662b5ba37473a50d475b1e27faf03f7c9f2
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Dec 16 09:56:00 2020 +0000

    clk: rockchip: rk3288: Fix i2c clk rate calc
    
    Change-Id: I083e2b8ceaa3eee7729174aa2e17b8a08cec9c05
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index cd23635f45..2f45dcfce3 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -106,7 +106,8 @@ enum {
 	M0_DIV_MASK		= 0xf << M0_DIV_SHIFT,
 
 	/* CLKSEL1: pd bus clk pll sel: codec or general */
-	PD_BUS_SEL_PLL_MASK	= 15,
+	PD_BUS_SEL_PLL_SHIFT	= 15,
+	PD_BUS_SEL_PLL_MASK	= 1 << PD_BUS_SEL_PLL_SHIFT,
 	PD_BUS_SEL_CPLL		= 0,
 	PD_BUS_SEL_GPLL,
 
@@ -852,6 +853,89 @@ static ulong rockchip_spi_set_clk(struct rk3288_cru *cru, uint gclk_rate,
 	return rockchip_spi_get_clk(cru, gclk_rate, periph);
 }
 
+static ulong rockchip_aclk_peri_get_clk(struct rk3288_cru *cru)
+{
+	uint div, mux;
+	u32 con;
+	ulong rate, parent_rate;
+
+	con = readl(&cru->cru_clksel_con[10]);
+	mux = (con & PERI_SEL_PLL_MASK) >> PERI_SEL_PLL_SHIFT;
+	div = (con & PERI_ACLK_DIV_MASK) >> PERI_ACLK_DIV_SHIFT;
+	if (mux)
+		parent_rate = rkclk_pll_get_rate(cru, CLK_GENERAL);
+	else
+		parent_rate = rkclk_pll_get_rate(cru, CLK_CODEC);
+	rate = DIV_TO_RATE(parent_rate, div);
+
+	return rate;
+}
+
+static ulong rockchip_aclk_cpu_get_clk(struct rk3288_cru *cru)
+{
+	uint div, mux;
+	u32 con;
+	ulong rate, parent_rate;
+
+	con = readl(&cru->cru_clksel_con[1]);
+	mux = (con & PD_BUS_SEL_PLL_MASK) >> PD_BUS_SEL_PLL_SHIFT;
+	div = (con & PD_BUS_ACLK_DIV0_MASK) >> PD_BUS_ACLK_DIV0_SHIFT;
+	if (mux)
+		parent_rate = rkclk_pll_get_rate(cru, CLK_GENERAL);
+	else
+		parent_rate = rkclk_pll_get_rate(cru, CLK_CODEC);
+	parent_rate = DIV_TO_RATE(parent_rate, div);
+
+	div = (con & PD_BUS_ACLK_DIV1_MASK) >> PD_BUS_ACLK_DIV1_SHIFT;
+	rate = DIV_TO_RATE(parent_rate, div);
+
+	return rate;
+}
+
+static ulong rockchip_pclk_peri_get_clk(struct rk3288_cru *cru)
+{
+	uint div;
+	u32 con;
+	ulong rate, parent_rate;
+
+	parent_rate = rockchip_aclk_peri_get_clk(cru);
+	con = readl(&cru->cru_clksel_con[10]);
+	div = (con & PERI_PCLK_DIV_MASK) >> PERI_PCLK_DIV_SHIFT;
+	rate = parent_rate / (1 << div);
+
+	return rate;
+}
+
+static ulong rockchip_pclk_cpu_get_clk(struct rk3288_cru *cru)
+{
+	uint div;
+	u32 con;
+	ulong rate, parent_rate;
+
+	parent_rate = rockchip_aclk_cpu_get_clk(cru);
+	con = readl(&cru->cru_clksel_con[1]);
+	div = (con & PD_BUS_PCLK_DIV_MASK) >> PD_BUS_PCLK_DIV_SHIFT;
+	rate = DIV_TO_RATE(parent_rate, div);
+
+	return rate;
+}
+
+static ulong rockchip_i2c_get_clk(struct rk3288_cru *cru, int periph)
+{
+	switch (periph) {
+	case PCLK_I2C0:
+	case PCLK_I2C2:
+		return rockchip_pclk_cpu_get_clk(cru);
+	case PCLK_I2C1:
+	case PCLK_I2C3:
+	case PCLK_I2C4:
+	case PCLK_I2C5:
+		return rockchip_pclk_peri_get_clk(cru);
+	default:
+		return -EINVAL;
+	}
+}
+
 static ulong rockchip_saradc_get_clk(struct rk3288_cru *cru)
 {
 	u32 div, val;
@@ -902,35 +986,24 @@ static ulong rockchip_tsadc_set_clk(struct rk3288_cru *cru, uint hz)
 	return rockchip_tsadc_get_clk(cru);
 }
 
-static ulong rockchip_aclk_cpu_get_clk(struct rk3288_cru *cru, uint gclk_rate)
-{
-	u32 div, val;
-
-	val = readl(&cru->cru_clksel_con[1]);
-	div = (val & PD_BUS_ACLK_DIV0_MASK) >> PD_BUS_ACLK_DIV0_SHIFT;
-
-	return DIV_TO_RATE(gclk_rate, div);
-}
-
 #ifndef CONFIG_SPL_BUILD
 
-static ulong rockchip_crypto_get_clk(struct rk3288_cru *cru, uint gclk_rate)
+static ulong rockchip_crypto_get_clk(struct rk3288_cru *cru)
 {
 	u32 div, val;
 
 	val = readl(&cru->cru_clksel_con[26]);
 	div = (val & CLK_CRYPTO_DIV_CON_MASK) >> CLK_CRYPTO_DIV_CON_SHIFT;
 
-	return DIV_TO_RATE(rockchip_aclk_cpu_get_clk(cru, gclk_rate), div);
+	return DIV_TO_RATE(rockchip_aclk_cpu_get_clk(cru), div);
 }
 
-static ulong rockchip_crypto_set_clk(struct rk3288_cru *cru,
-				     uint gclk_rate, uint hz)
+static ulong rockchip_crypto_set_clk(struct rk3288_cru *cru, uint hz)
 {
 	int src_clk_div;
 	uint p_rate;
 
-	p_rate = rockchip_aclk_cpu_get_clk(cru, gclk_rate);
+	p_rate = rockchip_aclk_cpu_get_clk(cru);
 	src_clk_div = DIV_ROUND_UP(p_rate, hz) - 1;
 	assert(src_clk_div < 3);
 
@@ -938,7 +1011,7 @@ static ulong rockchip_crypto_set_clk(struct rk3288_cru *cru,
 		     CLK_CRYPTO_DIV_CON_MASK,
 		     src_clk_div << CLK_CRYPTO_DIV_CON_SHIFT);
 
-	return rockchip_crypto_get_clk(cru, gclk_rate);
+	return rockchip_crypto_get_clk(cru);
 }
 
 static ulong rk3288_alive_get_clk(struct rk3288_cru *cru, uint gclk_rate)
@@ -984,7 +1057,8 @@ static ulong rk3288_clk_get_rate(struct clk *clk)
 	case PCLK_I2C3:
 	case PCLK_I2C4:
 	case PCLK_I2C5:
-		return gclk_rate;
+		new_rate = rockchip_i2c_get_clk(priv->cru, clk->id);
+		break;
 	case PCLK_PWM:
 		return PD_BUS_PCLK_HZ;
 	case SCLK_SARADC:
@@ -994,11 +1068,20 @@ static ulong rk3288_clk_get_rate(struct clk *clk)
 		new_rate = rockchip_tsadc_get_clk(priv->cru);
 		break;
 	case ACLK_CPU:
-		new_rate = rockchip_aclk_cpu_get_clk(priv->cru, gclk_rate);
+		new_rate = rockchip_aclk_cpu_get_clk(priv->cru);
+		break;
+	case ACLK_PERI:
+		new_rate = rockchip_aclk_peri_get_clk(priv->cru);
+		break;
+	case PCLK_CPU:
+		new_rate = rockchip_pclk_cpu_get_clk(priv->cru);
+		break;
+	case PCLK_PERI:
+		new_rate = rockchip_pclk_peri_get_clk(priv->cru);
 		break;
 #ifndef CONFIG_SPL_BUILD
 	case SCLK_CRYPTO:
-		new_rate = rockchip_crypto_get_clk(priv->cru, gclk_rate);
+		new_rate = rockchip_crypto_get_clk(priv->cru);
 		break;
 	case PCLK_WDT:
 		new_rate = rk3288_alive_get_clk(priv->cru, gclk_rate);
@@ -1073,7 +1156,7 @@ static ulong rk3288_clk_set_rate(struct clk *clk, ulong rate)
 		new_rate = rate;
 		break;
 	case SCLK_CRYPTO:
-		new_rate = rockchip_crypto_set_clk(priv->cru, gclk_rate, rate);
+		new_rate = rockchip_crypto_set_clk(priv->cru, rate);
 		break;
 #endif
 	case SCLK_SARADC:

commit d6ea9a156399af24ef2453bf24fed44e6dc79651
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Jan 9 10:42:24 2021 +0000

    rockchip: rkimg: remove unused variables
    
    fix compile error.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I3202eb2eab89a3530d0170fe9b0b7f890aec1f3a

diff --git a/arch/arm/mach-rockchip/boot_rkimg.c b/arch/arm/mach-rockchip/boot_rkimg.c
index 87bf980aba..35309a1b46 100644
--- a/arch/arm/mach-rockchip/boot_rkimg.c
+++ b/arch/arm/mach-rockchip/boot_rkimg.c
@@ -449,8 +449,6 @@ static int rockchip_read_distro_dtb(void *fdt_addr)
 	char devnum_part[12];
 	char fdt_hex_str[19];
 	char *fs_argv[5];
-	int size;
-	int ret;
 
 	if (!rockchip_get_bootdev() || !fdt_addr)
 		return -ENODEV;

commit aa6eaeb21f3bfe93108120d719d27ba004944103
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Jan 8 20:59:27 2021 +0800

    rockchip: dts: rk3308: Add spi node
    
    Change-Id: I73568c5355e9acb6a92887992e3c8dca371ab455
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/dts/rk3308.dtsi b/arch/arm/dts/rk3308.dtsi
index 9c68260146..6345fba383 100644
--- a/arch/arm/dts/rk3308.dtsi
+++ b/arch/arm/dts/rk3308.dtsi
@@ -25,6 +25,9 @@
 		serial4 = &uart4;
 		mmc0 = &emmc;
 		mmc1 = &sdmmc;
+		spi0 = &spi0;
+		spi1 = &spi1;
+		spi2 = &spi2;
 	};
 
 	cpus {
@@ -219,6 +222,48 @@
 		status = "disabled";
 	};
 
+	spi0: spi@ff120000 {
+		compatible = "rockchip,rk3308-spi", "rockchip,rk3066-spi";
+		reg = <0x0 0xff120000 0x0 0x1000>;
+		interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
+		clock-names = "spiclk", "apb_pclk";
+		pinctrl-names = "default", "high_speed";
+		pinctrl-0 = <&spi0_clk &spi0_csn0 &spi0_miso &spi0_mosi>;
+		pinctrl-1 = <&spi0_clk_hs &spi0_csn0 &spi0_miso_hs &spi0_mosi_hs>;
+		status = "disabled";
+	};
+
+	spi1: spi@ff130000 {
+		compatible = "rockchip,rk3308-spi", "rockchip,rk3066-spi";
+		reg = <0x0 0xff130000 0x0 0x1000>;
+		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&cru SCLK_SPI1>, <&cru PCLK_SPI1>;
+		clock-names = "spiclk", "apb_pclk";
+		pinctrl-names = "default", "high_speed";
+		pinctrl-0 = <&spi1_clk &spi1_csn0 &spi1_miso &spi1_mosi>;
+		pinctrl-1 = <&spi2_clk_hs &spi2_csn0 &spi2_miso_hs &spi2_mosi_hs>;
+		status = "disabled";
+	};
+
+	spi2: spi@ff140000 {
+		compatible = "rockchip,rk3308-spi", "rockchip,rk3066-spi";
+		reg = <0x0 0xff140000 0x0 0x1000>;
+		interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&cru SCLK_SPI2>, <&cru PCLK_SPI2>;
+		clock-names = "spiclk", "apb_pclk";
+		pinctrl-names = "default", "high_speed";
+		pinctrl-0 = <&spi2_clk &spi2_csn0 &spi2_miso &spi2_mosi>;
+		pinctrl-1 = <&spi2_clk_hs &spi2_csn0 &spi2_miso_hs &spi2_mosi_hs>;
+		status = "disabled";
+	};
+
 	secure_otp: secure_otp@0xff2a8000 {
 		compatible = "rockchip,rk3308-secure-otp";
 		reg = <0x0 0xff2a8000 0x0 0x4000>;
@@ -817,6 +862,20 @@
 				rockchip,pins =
 					<2 RK_PA1 2 &pcfg_pull_up>;
 			};
+			spi0_clk_hs: spi0-clk-hs {
+				rockchip,pins =
+					<2 RK_PA2 2 &pcfg_pull_up_8ma>;
+			};
+
+			spi0_miso_hs: spi0-miso-hs {
+				rockchip,pins =
+					<2 RK_PA0 2 &pcfg_pull_up_8ma>;
+			};
+
+			spi0_mosi_hs: spi0-mosi-hs {
+				rockchip,pins =
+					<2 RK_PA1 2 &pcfg_pull_up_8ma>;
+			};
 		};
 
 		spi1 {
@@ -839,6 +898,20 @@
 				rockchip,pins =
 					<3 RK_PB4 3 &pcfg_pull_up>;
 			};
+			spi1_clk_hs: spi1-clk-hs {
+				rockchip,pins =
+					<3 RK_PB3 3 &pcfg_pull_up_8ma>;
+			};
+
+			spi1_miso_hs: spi1-miso-hs {
+				rockchip,pins =
+					<3 RK_PB2 3 &pcfg_pull_up_8ma>;
+			};
+
+			spi1_mosi_hs: spi1-mosi-hs {
+				rockchip,pins =
+					<3 RK_PB4 3 &pcfg_pull_up_8ma>;
+			};
 		};
 
 		spi2 {
@@ -861,6 +934,20 @@
 				rockchip,pins =
 					<1 RK_PC7 3 &pcfg_pull_up>;
 			};
+			spi2_clk_hs: spi2-clk-hs {
+				rockchip,pins =
+					<1 RK_PD0 3 &pcfg_pull_up_8ma>;
+			};
+
+			spi2_miso_hs: spi2-miso-hs {
+				rockchip,pins =
+					<1 RK_PC6 3 &pcfg_pull_up_8ma>;
+			};
+
+			spi2_mosi_hs: spi2-mosi-hs {
+				rockchip,pins =
+					<1 RK_PC7 3 &pcfg_pull_up_8ma>;
+			};
 		};
 
 		sdmmc_pin: sdmmc_pin {

commit e6d86e002395a8e6af50627ab80871d232bd2404
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jan 8 18:57:09 2021 +0800

    configs: rv1126-spi-nand: reduce the code size
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I4c9273ad1cbbe0730c7057e932a55075ff6e1942

diff --git a/configs/rv1126-spi-nand_defconfig b/configs/rv1126-spi-nand_defconfig
new file mode 100644
index 0000000000..9b3290f097
--- /dev/null
+++ b/configs/rv1126-spi-nand_defconfig
@@ -0,0 +1,178 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x80000
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
+CONFIG_ROCKCHIP_RV1126=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+# CONFIG_SPL_MMC_SUPPORT is not set
+CONFIG_ROCKCHIP_FIT_IMAGE=y
+CONFIG_ROCKCHIP_UIMAGE=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y
+CONFIG_ROCKCHIP_UART_MUX_SEL_M=2
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_TARGET_EVB_RV1126=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_DEFAULT_DEVICE_TREE="rv1126-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_FIT_IMAGE_POST_PROCESS=y
+CONFIG_FIT_HW_CRYPTO=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
+CONFIG_SPL_FIT_HW_CRYPTO=y
+CONFIG_BOOTDELAY=0
+# CONFIG_CONSOLE_MUX is not set
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+# CONFIG_ANDROID_WRITE_KEYBOX is not set
+# CONFIG_ANDROID_KEYMASTER_CA is not set
+CONFIG_ANDROID_BOOT_IMAGE_HASH=y
+CONFIG_SPL_BOARD_INIT=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
+CONFIG_SPL_SHA256_SUPPORT=y
+CONFIG_SPL_CRYPTO_SUPPORT=y
+CONFIG_SPL_HASH_SUPPORT=y
+CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD_WRITE=y
+CONFIG_SPL_OPTEE=y
+CONFIG_FASTBOOT_BUF_ADDR=0x800800
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPT=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_ITEST is not set
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_TFTP_BOOTM=y
+CONFIG_CMD_TFTP_FLASH=y
+# CONFIG_CMD_NFS is not set
+# CONFIG_CMD_MISC is not set
+# CONFIG_CMD_CHARGE_DISPLAY is not set
+CONFIG_CMD_MTD_BLK=y
+# CONFIG_ISO_PARTITION is not set
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_SPL_DTB_MINIMUM=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_U_BOOT_REMOVE_PROPS="interrupt-parent"
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_DM_CRYPTO=y
+CONFIG_SPL_DM_CRYPTO=y
+CONFIG_ROCKCHIP_CRYPTO_V2=y
+CONFIG_SPL_ROCKCHIP_CRYPTO_V2=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_RK8XX_PWRKEY=y
+CONFIG_ADC_KEY=y
+CONFIG_MISC=y
+CONFIG_SPL_MISC=y
+CONFIG_MISC_DECOMPRESS=y
+CONFIG_SPL_MISC_DECOMPRESS=y
+CONFIG_ROCKCHIP_OTP=y
+CONFIG_ROCKCHIP_HW_DECOMPRESS=y
+CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS=y
+CONFIG_SPL_ROCKCHIP_SECURE_OTP_V2=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MTD=y
+CONFIG_MTD_BLK=y
+CONFIG_MTD_DEVICE=y
+CONFIG_NAND=y
+CONFIG_NAND_ROCKCHIP=y
+CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
+CONFIG_SYS_NAND_U_BOOT_OFFS=0x4000
+CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND=0x10000
+CONFIG_MTD_SPI_NAND=y
+CONFIG_SF_DEFAULT_MODE=0x1
+CONFIG_SF_DEFAULT_SPEED=50000000
+CONFIG_DM_ETH=y
+CONFIG_DM_ETH_PHY=y
+CONFIG_DWC_ETH_QOS=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PHY_ROCKCHIP_NANENG_USB2=y
+CONFIG_PINCTRL=y
+CONFIG_DM_FUEL_GAUGE=y
+CONFIG_POWER_FG_RK817=y
+CONFIG_IO_DOMAIN=y
+CONFIG_ROCKCHIP_IO_DOMAIN=y
+CONFIG_DM_PMIC=y
+# CONFIG_SPL_PMIC_CHILDREN is not set
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_DM_CHARGE_DISPLAY=y
+CONFIG_CHARGE_ANIMATION=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
+CONFIG_ROCKCHIP_SDRAM_COMMON=y
+CONFIG_DM_RESET=y
+CONFIG_SPL_DM_RESET=y
+CONFIG_SPL_RESET_ROCKCHIP=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0xff570000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_ROCKCHIP_SFC=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x110b
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_INNO_MIPI_PHY=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_DRM_ROCKCHIP_RGB=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_RSA=y
+CONFIG_SPL_RSA=y
+CONFIG_RSA_C_SIZE=0x14
+CONFIG_SHA512=y
+CONFIG_ERRNO_STR=y
+# CONFIG_EFI_LOADER is not set
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V2=y

commit a2875f15a8784a1811f5220796e6767d9533bf62
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jan 11 11:12:58 2021 +0800

    dm: blk: fix spi flash uclass different error when use mtd block
    
    Add more condition to decide which dev is "mtd 2".
    More info seen in 82ee4254158e33c79021caade5639182d8116b64.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Iea84b5a7307969dad785f3136b0af8b9f45e94f6

diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
index 0d3574ffb7..0746f6dabd 100644
--- a/drivers/block/blk-uclass.c
+++ b/drivers/block/blk-uclass.c
@@ -135,8 +135,9 @@ struct blk_desc *blk_get_devnum_by_typename(const char *if_typename, int devnum)
 			 * the UCLASS_MTD when find the mtd block device.
 			 * Fix it here when enable CONFIG_MTD_BLK.
 			 */
-			if ((if_type == IF_TYPE_MTD) &&
-			    (devnum == BLK_MTD_SPI_NOR)) {
+			if (device_get_uclass_id(dev->parent) == UCLASS_SPI_FLASH &&
+			    if_type == IF_TYPE_MTD &&
+			    devnum == BLK_MTD_SPI_NOR) {
 				debug("Fix the spi flash uclass different\n");
 			} else {
 				debug("%s: parent uclass %d, this dev %d\n",

commit d84179b5cb8b0f06758c0bd26ed8181823a0ddf9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Jan 9 08:41:06 2021 +0000

    rockchip: make_fit_boot: add lz4 kernel support
    
    Don't handle ramdisk.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Id8c04a6d916a8fd4ae1f3154c75e597c3e6980bc

diff --git a/arch/arm/mach-rockchip/make_fit_boot.sh b/arch/arm/mach-rockchip/make_fit_boot.sh
index 0c5993e455..8ad86be715 100755
--- a/arch/arm/mach-rockchip/make_fit_boot.sh
+++ b/arch/arm/mach-rockchip/make_fit_boot.sh
@@ -14,8 +14,10 @@ fi
 
 if [ "${COMPRESSION}" == "gzip" ]; then
 	gzip -k -f -9 ${srctree}/images/kernel
-	gzip -k -f -9 ${srctree}/images/ramdisk
 	SUFFIX=".gz"
+elif [ "${COMPRESSION}" == "lz4" ]; then
+	lz4c -9 -f ${srctree}/images/kernel > ${srctree}/images/kernel.lz4
+	SUFFIX=".lz4"
 else
 	COMPRESSION="none"
 	SUFFIX=
@@ -48,10 +50,8 @@ cat << EOF
 		};
 
 		kernel {
-EOF
-echo "			data = /incbin/(\"./images/kernel${SUFFIX}\");"
-echo "			compression = \"${COMPRESSION}\";"
-cat << EOF
+			data = /incbin/("./images/kernel${SUFFIX}");
+			compression = "${COMPRESSION}";
 			type = "kernel";
 			arch = "${ARCH}";
 			os = "linux";
@@ -63,10 +63,8 @@ cat << EOF
 		};
 
 		ramdisk {
-EOF
-echo "			data = /incbin/(\"./images/ramdisk${SUFFIX}\");"
-echo "			compression = \"${COMPRESSION}\";"
-cat << EOF
+			data = /incbin/("./images/ramdisk");
+			compression = "none";
 			type = "ramdisk";
 			arch = "${ARCH}";
 			os = "linux";

commit fae486e4076acd421e41805d832bf2e2e24dd302
Author: Shawn Lin <shawn.lin@rock-chips.com>
Date:   Thu Jan 7 11:48:38 2021 +0800

    power: regulator: Use dev_read_size in gpio-regulator
    
    Change-Id: Iff2e643d6dad6975fe0838dc439a31ecd5299f41
    Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

diff --git a/drivers/power/regulator/gpio-regulator.c b/drivers/power/regulator/gpio-regulator.c
index 5bf4563916..c73c2ae12a 100644
--- a/drivers/power/regulator/gpio-regulator.c
+++ b/drivers/power/regulator/gpio-regulator.c
@@ -29,8 +29,7 @@ static int gpio_regulator_ofdata_to_platdata(struct udevice *dev)
 	struct dm_regulator_uclass_platdata *uc_pdata;
 	struct gpio_regulator_platdata *dev_pdata;
 	struct gpio_desc *gpio;
-	const void *blob = gd->fdt_blob;
-	int ret, count, i, j;
+	int ret, len, i, j;
 	u32 states_array[8];
 
 	dev_pdata = dev_get_platdata(dev);
@@ -53,15 +52,17 @@ static int gpio_regulator_ofdata_to_platdata(struct udevice *dev)
 	if (ret)
 		debug("regulator gpio - not found! Error: %d", ret);
 
-	blob = dev_read_prop(dev, "states", &count);
-	if (!blob)
-		return -EINVAL;
+	len = dev_read_size(dev, "states");
+	if (len < 0)
+		return len;
+
+	len /= sizeof(fdt32_t);
 
-	ret = dev_read_u32_array(dev, "states", states_array, count / 4);
+	ret = dev_read_u32_array(dev, "states", states_array, len);
 	if (ret)
 		return -EINVAL;
 
-	for (i = 0, j = 0; i < count / 4; i += 2) {
+	for (i = 0, j = 0; i < len; i += 2) {
 		dev_pdata->voltages[j] = states_array[i];
 		dev_pdata->states[j] = states_array[i + 1];
 		j++;

commit ec7aa9fc77b764ec540cf931a76455a5546a7516
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Jan 7 11:14:19 2021 +0800

    configs: rk3568: redefine the CONFIG_FASTBOOT_BUF_ADDR
    
    According to the CONFIG_SYS_LOAD_ADDR.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ie2679791283618a9b86447ac26a0d2ef7574eb86

diff --git a/configs/rk3568-spi-nand_defconfig b/configs/rk3568-spi-nand_defconfig
index 8217548976..60d86fa8e6 100644
--- a/configs/rk3568-spi-nand_defconfig
+++ b/configs/rk3568-spi-nand_defconfig
@@ -36,7 +36,7 @@ CONFIG_SPL_SEPARATE_BSS=y
 CONFIG_SPL_MTD_SUPPORT=y
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
-CONFIG_FASTBOOT_BUF_ADDR=0x800800
+CONFIG_FASTBOOT_BUF_ADDR=0xc00800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index 017e5b294e..46440b6d21 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -48,7 +48,7 @@ CONFIG_SPL_MTD_WRITE=y
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_SPL_AB=y
-CONFIG_FASTBOOT_BUF_ADDR=0x800800
+CONFIG_FASTBOOT_BUF_ADDR=0xc00800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0

commit b822206b1f4d27529a161df3b8a260250f48169e
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Dec 31 11:48:06 2020 +0800

    configs: rk3568-nand: reduce the code size
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Icc72cf5af4a843ec3f721d538085d2870e47ecbc

diff --git a/configs/rk3568-nand.config b/configs/rk3568-nand.config
index 983d9d3027..4e11f744a1 100644
--- a/configs/rk3568-nand.config
+++ b/configs/rk3568-nand.config
@@ -4,20 +4,30 @@ CONFIG_BASE_DEFCONFIG="rk3568_defconfig"
 # CONFIG_CMD_NAND is not set
 CONFIG_CMD_RKNAND=y
 # CONFIG_DM_CRYPTO is not set
+# CONFIG_DOS_PARTITION is not set
 CONFIG_LOADER_INI="RK3568MINIALL_NAND.ini"
 # CONFIG_MTD_DEVICE is not set
 # CONFIG_MTD is not set
 # CONFIG_MTD_NAND_BBT_USING_FLASH is not set
 # CONFIG_NAND is not set
+CONFIG_RKNAND_BLK_U_BOOT_OFFS=0x4000
 CONFIG_RKNAND=y
 # CONFIG_SPI_FLASH is not set
 # CONFIG_SPI_MEM is not set
+# CONFIG_SPL_CRYPTO_SUPPORT is not set
 # CONFIG_SPL_DM_CRYPTO is not set
+# CONFIG_SPL_GZIP is not set
+# CONFIG_SPL_HASH_SUPPORT is not set
+# CONFIG_SPL_MMC_SUPPORT is not set
 # CONFIG_SPL_MTD_SUPPORT is not set
 # CONFIG_SPL_NAND_SUPPORT is not set
+# CONFIG_SPL_PARTITION_UUIDS is not set
+# CONFIG_SPL_PINCTRL is not set
+# CONFIG_SPL_PMIC_CHILDREN is not set
 CONFIG_SPL_RKNAND_SUPPORT=y
+# CONFIG_SPL_SHA256_SUPPORT is not set
 # CONFIG_SPL_SPI_FLASH_SUPPORT is not set
 # CONFIG_SPL_SPI_SUPPORT is not set
 CONFIG_SPL_SYS_MALLOC_F_LEN=0x100000
-CONFIG_SYS_MALLOC_F_LEN=0x100000
+# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
 CONFIG_ZFTL=y

commit 7cd717205f8b1b1e406f7100462a2fa556145e82
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Thu Jan 7 10:38:10 2021 +0800

    drivers: rknand: zftl: fix to support samsung ss14 8GB NAND FLASH
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: I86d47db8988b56d36ae76d08997c840b34f0b0d8

diff --git a/drivers/rknand/rk_zftl_arm_v7.S b/drivers/rknand/rk_zftl_arm_v7.S
index ff0bc33715..334b778efc 100644
--- a/drivers/rknand/rk_zftl_arm_v7.S
+++ b/drivers/rknand/rk_zftl_arm_v7.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2020-11-30
+ * date: 2021-01-07
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -183,54 +183,62 @@ _list_remove_node:
 	.word	.LANCHOR5
 	.word	.LC0
 	.size	_list_remove_node, .-_list_remove_node
-	.section	.text._list_pop_index_node,"ax",%progbits
+	.section	.text.hynix_set_rr_para,"ax",%progbits
 	.align	1
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	_list_pop_index_node, %function
-_list_pop_index_node:
+	.type	hynix_set_rr_para, %function
+hynix_set_rr_para:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	ldr	r5, [r0]
-	cbz	r5, .L34
-	ldr	r3, .L35
-	movw	r6, #65535
-	movs	r7, #6
-	ldr	r4, [r3]
-.L30:
-	cbnz	r1, .L31
-.L33:
-	subs	r4, r5, r4
-	asrs	r3, r4, #1
-	ldr	r4, .L35+4
-	muls	r4, r3, r4
-	uxth	r1, r4
-	bl	_list_remove_node
-	movw	r3, #65535
-	uxth	r0, r4
-	strh	r3, [r5]	@ movhi
-	strh	r3, [r5, #2]	@ movhi
-	pop	{r3, r4, r5, r6, r7, pc}
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	lsls	r7, r0, #8
+	ldr	r3, .L33
+	ldr	r4, .L33+4
+	ldr	r6, [r3]
+	ldr	r8, [r4]
+	ldrb	r2, [r6, #113]	@ zero_extendqisi2
+	add	r4, r6, #112
+	ldrb	r5, [r6, #112]	@ zero_extendqisi2
+	add	ip, r6, #128
+	adds	r6, r6, #127
+	muls	r1, r2, r1
+	cmp	r5, #8
+	it	ne
+	movne	r5, #160
+	add	r2, r2, #-1
+	add	r10, ip, r2
+	add	r1, r1, #32
+	it	ne
+	smlabbne	r1, r5, r0, r1
+	add	r5, r8, r7
+	add	r4, r4, r1
+	movs	r1, #54
+	subs	r4, r4, #1
+	str	r1, [r5, #2056]
 .L31:
-	ldrh	r3, [r5]
-	cmp	r3, r6
-	beq	.L33
-	subs	r1, r1, #1
-	mla	r5, r7, r3, r4
-	uxth	r1, r1
-	b	.L30
+	cmp	r6, r10
+	bne	.L32
+	add	r7, r7, r8
+	movs	r3, #22
+	str	r3, [r7, #2056]
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L32:
+	ldrb	r3, [r6, #1]!	@ zero_extendqisi2
+	movs	r0, #1
+	str	r3, [r5, #2052]
+	bl	udelay
+	ldrsb	r3, [r4, #1]!
+	str	r3, [r5, #2048]
+	b	.L31
 .L34:
-	movw	r0, #65535
-	pop	{r3, r4, r5, r6, r7, pc}
-.L36:
 	.align	2
-.L35:
-	.word	.LANCHOR4
-	.word	-1431655765
-	.size	_list_pop_index_node, .-_list_pop_index_node
+.L33:
+	.word	.LANCHOR6
+	.word	.LANCHOR7
+	.size	hynix_set_rr_para, .-hynix_set_rr_para
 	.section	.text._insert_free_list,"ax",%progbits
 	.align	1
 	.syntax unified
@@ -241,32 +249,32 @@ _list_pop_index_node:
 _insert_free_list:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L45
+	ldr	r3, .L43
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	ldrh	r3, [r3]
 	cmp	r3, r1
-	bls	.L37
+	bls	.L35
 	ldrh	r3, [r2]
 	movw	r10, #65535
 	ldr	r7, [r0]
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
 	movs	r2, #6
-	ldr	r3, .L45+4
+	ldr	r3, .L43+4
 	mul	lr, r2, r1
 	ldr	r5, [r3]
 	add	r6, r5, lr
 	strh	r10, [r6, #2]	@ movhi
 	strh	r10, [r5, lr]	@ movhi
-	cbnz	r7, .L39
-.L44:
+	cbnz	r7, .L37
+.L42:
 	str	r6, [r0]
-	b	.L37
-.L39:
-	ldr	r3, .L45+8
+	b	.L35
+.L37:
+	ldr	r3, .L43+8
 	str	r2, [sp, #4]
 	ldr	ip, [r3]
-	ldr	r3, .L45+12
+	ldr	r3, .L43+12
 	ldrh	r4, [ip, r1, lsl #2]
 	ldrh	r8, [r3]
 	ldr	r3, [ip, r1, lsl #2]
@@ -278,11 +286,11 @@ _insert_free_list:
 	str	r3, [sp]
 	subs	r3, r7, r5
 	asrs	r4, r3, #1
-	ldr	r3, .L45+16
+	ldr	r3, .L43+16
 	muls	r3, r4, r3
 	mov	r4, r7
 	uxth	r3, r3
-.L42:
+.L40:
 	ldr	r2, [ip, r3, lsl #2]
 	ldrh	fp, [ip, r3, lsl #2]
 	ubfx	r2, r2, #11, #8
@@ -292,43 +300,43 @@ _insert_free_list:
 	uxth	fp, r2
 	ldr	r2, [sp]
 	cmp	r2, fp
-	bls	.L40
+	bls	.L38
 	ldrh	r2, [r4]
 	cmp	r2, r10
-	bne	.L41
+	bne	.L39
 	strh	r3, [r6, #2]	@ movhi
 	strh	r1, [r4]	@ movhi
-.L37:
+.L35:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L41:
+.L39:
 	ldr	r3, [sp, #4]
 	mla	r4, r3, r2, r5
 	mov	r3, r2
-	b	.L42
-.L40:
+	b	.L40
+.L38:
 	ldrh	r2, [r4, #2]
 	cmp	r7, r4
 	strh	r2, [r6, #2]	@ movhi
 	strh	r3, [r5, lr]	@ movhi
-	bne	.L43
+	bne	.L41
 	strh	r1, [r7, #2]	@ movhi
-	b	.L44
-.L43:
+	b	.L42
+.L41:
 	ldrh	r2, [r4, #2]
 	movs	r3, #6
 	muls	r3, r2, r3
 	strh	r1, [r5, r3]	@ movhi
 	strh	r1, [r4, #2]	@ movhi
-	b	.L37
-.L46:
+	b	.L35
+.L44:
 	.align	2
-.L45:
-	.word	.LANCHOR6
-	.word	.LANCHOR4
-	.word	.LANCHOR7
+.L43:
 	.word	.LANCHOR8
+	.word	.LANCHOR4
+	.word	.LANCHOR9
+	.word	.LANCHOR10
 	.word	-1431655765
 	.size	_insert_free_list, .-_insert_free_list
 	.section	.text._insert_data_list,"ax",%progbits
@@ -341,18 +349,18 @@ _insert_free_list:
 _insert_data_list:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L69
+	ldr	r3, .L67
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	lr, r0
 	sub	sp, sp, #24
 	ldrh	r3, [r3]
 	cmp	r3, r1
-	bls	.L47
+	bls	.L45
 	ldrh	r3, [r2]
 	ldr	r0, [r0]
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
-	ldr	r3, .L69+4
+	ldr	r3, .L67+4
 	ldr	r5, [r3]
 	movs	r3, #6
 	mul	r10, r3, r1
@@ -360,35 +368,35 @@ _insert_data_list:
 	add	r6, r5, r10
 	strh	r3, [r6, #2]	@ movhi
 	strh	r3, [r5, r10]	@ movhi
-	cbnz	r0, .L50
-.L68:
+	cbnz	r0, .L48
+.L66:
 	str	r6, [lr]
-	b	.L47
-.L50:
-	ldr	r3, .L69+8
+	b	.L45
+.L48:
+	ldr	r3, .L67+8
 	ldrh	r7, [r6, #4]
 	ldr	r3, [r3]
 	ldrh	r4, [r3, r1, lsl #1]
 	muls	r4, r7, r4
 	str	r3, [sp, #8]
-	ldr	r3, .L69+12
+	ldr	r3, .L67+12
 	str	r4, [sp]
 	ldr	r8, [r3]
 	ldr	r3, [r8, r1, lsl #2]
 	ubfx	r2, r3, #11, #8
-	ldr	r3, .L69+16
+	ldr	r3, .L67+16
 	ldrh	r3, [r3]
 	str	r3, [sp, #12]
 	ldrh	r3, [r8, r1, lsl #2]
 	ubfx	r3, r3, #0, #11
-	beq	.L51
+	beq	.L49
 	ldrh	r4, [sp, #12]
 	smulbb	r2, r2, r4
 	add	r3, r3, r2
 	ldr	r2, [sp]
 	uxtah	r3, r2, r3
 	str	r3, [sp]
-.L51:
+.L49:
 	ldr	r3, [sp]
 	cmp	r7, #0
 	it	eq
@@ -398,14 +406,14 @@ _insert_data_list:
 	str	r3, [sp]
 	subs	r3, r0, r5
 	asrs	r2, r3, #1
-	ldr	r3, .L69+20
+	ldr	r3, .L67+20
 	muls	r3, r2, r3
-	ldr	r2, .L69
+	ldr	r2, .L67
 	ldrh	r2, [r2]
 	uxth	r3, r3
 	str	r2, [sp, #20]
 	mov	r2, r0
-.L57:
+.L55:
 	ldr	r7, [sp, #4]
 	adds	r7, r7, #1
 	uxth	r7, r7
@@ -413,9 +421,9 @@ _insert_data_list:
 	str	r7, [sp, #4]
 	ldr	r7, [sp, #20]
 	cmp	r4, r7
-	bhi	.L47
+	bhi	.L45
 	cmp	r1, r3
-	beq	.L47
+	beq	.L45
 	ldrh	r7, [r2, #4]
 	ldr	r4, [r8, r3, lsl #2]
 	ldrh	ip, [r8, r3, lsl #2]
@@ -433,93 +441,50 @@ _insert_data_list:
 	itt	ne
 	addne	fp, fp, ip
 	uxtahne	r7, r7, fp
-	cbz	r4, .L55
+	cbz	r4, .L53
 	ldr	r4, [sp]
 	cmp	r4, r7
-	bls	.L55
+	bls	.L53
 	ldrh	r7, [r2]
 	movw	r4, #65535
 	cmp	r7, r4
-	bne	.L56
+	bne	.L54
 	strh	r3, [r6, #2]	@ movhi
 	strh	r1, [r2]	@ movhi
-.L47:
+.L45:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L56:
+.L54:
 	movs	r3, #6
 	mla	r2, r3, r7, r5
 	mov	r3, r7
-	b	.L57
-.L55:
+	b	.L55
+.L53:
 	ldrh	r4, [r2, #2]
 	cmp	r0, r2
 	strh	r4, [r6, #2]	@ movhi
 	strh	r3, [r5, r10]	@ movhi
-	bne	.L58
+	bne	.L56
 	strh	r1, [r0, #2]	@ movhi
-	b	.L68
-.L58:
+	b	.L66
+.L56:
 	ldrh	r0, [r2, #2]
 	movs	r3, #6
 	muls	r3, r0, r3
 	strh	r1, [r5, r3]	@ movhi
 	strh	r1, [r2, #2]	@ movhi
-	b	.L47
-.L70:
+	b	.L45
+.L68:
 	.align	2
-.L69:
-	.word	.LANCHOR6
+.L67:
+	.word	.LANCHOR8
 	.word	.LANCHOR4
+	.word	.LANCHOR11
 	.word	.LANCHOR9
-	.word	.LANCHOR7
-	.word	.LANCHOR8
+	.word	.LANCHOR10
 	.word	-1431655765
 	.size	_insert_data_list, .-_insert_data_list
-	.section	.text._list_get_gc_head_node.isra.2,"ax",%progbits
-	.align	1
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	_list_get_gc_head_node.isra.2, %function
-_list_get_gc_head_node.isra.2:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, lr}
-	cbz	r0, .L76
-	ldr	r3, .L78
-	movw	r2, #65535
-	movs	r4, #6
-	ldr	r3, [r3]
-.L73:
-	cbz	r1, .L74
-	ldrh	r0, [r0]
-	cmp	r0, r2
-	bne	.L75
-	pop	{r4, pc}
-.L75:
-	subs	r1, r1, #1
-	mla	r0, r4, r0, r3
-	uxth	r1, r1
-	b	.L73
-.L76:
-	movw	r0, #65535
-	pop	{r4, pc}
-.L74:
-	subs	r0, r0, r3
-	asrs	r3, r0, #1
-	ldr	r0, .L78+4
-	muls	r0, r3, r0
-	uxth	r0, r0
-	pop	{r4, pc}
-.L79:
-	.align	2
-.L78:
-	.word	.LANCHOR4
-	.word	-1431655765
-	.size	_list_get_gc_head_node.isra.2, .-_list_get_gc_head_node.isra.2
 	.section	.text._list_update_data_list,"ax",%progbits
 	.align	1
 	.syntax unified
@@ -530,7 +495,7 @@ _list_get_gc_head_node.isra.2:
 _list_update_data_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L90
+	ldr	r3, .L79
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r6, r2
 	mov	r7, r0
@@ -538,14 +503,14 @@ _list_update_data_list:
 	ldr	r3, [r3]
 	ldrh	r2, [r3, #16]
 	cmp	r2, r1
-	beq	.L80
+	beq	.L69
 	ldrh	r2, [r3, #48]
 	cmp	r2, r1
-	beq	.L80
+	beq	.L69
 	ldrh	r3, [r3, #80]
 	cmp	r3, r1
-	beq	.L80
-	ldr	r3, .L90+4
+	beq	.L69
+	ldr	r3, .L79+4
 	movs	r5, #6
 	muls	r5, r1, r5
 	ldr	r2, [r0]
@@ -553,48 +518,48 @@ _list_update_data_list:
 	mov	r8, r3
 	add	r10, fp, r5
 	cmp	r10, r2
-	beq	.L80
+	beq	.L69
 	ldrh	r3, [r10, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L84
+	bne	.L73
 	ldrh	r2, [fp, r5]
 	cmp	r2, r3
-	bne	.L84
+	bne	.L73
 	movw	r2, #273
-	ldr	r1, .L90+8
-	ldr	r0, .L90+12
+	ldr	r1, .L79+8
+	ldr	r0, .L79+12
 	bl	printf
-.L84:
+.L73:
 	ldrh	r3, [r10, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L85
+	bne	.L74
 	ldrh	r2, [fp, r5]
 	cmp	r2, r3
-	beq	.L80
-.L85:
-	ldr	r2, .L90+16
+	beq	.L69
+.L74:
+	ldr	r2, .L79+16
 	ldr	r0, [r2]
 	ldrh	r2, [r10, #4]
 	ldrh	r1, [r0, r4, lsl #1]
-	cbz	r2, .L88
+	cbz	r2, .L77
 	muls	r2, r1, r2
-.L86:
+.L75:
 	movs	r1, #6
 	muls	r1, r3, r1
-	ldr	r3, .L90+20
+	ldr	r3, .L79+20
 	asrs	r5, r1, #1
 	muls	r3, r5, r3
 	ldrh	r5, [r0, r3, lsl #1]
 	ldr	r0, [r8]
 	add	r1, r1, r0
 	ldrh	r3, [r1, #4]
-	cbz	r3, .L89
+	cbz	r3, .L78
 	muls	r3, r5, r3
-.L87:
+.L76:
 	cmp	r2, r3
-	bcs	.L80
+	bcs	.L69
 	mov	r2, r6
 	mov	r1, r4
 	mov	r0, r7
@@ -604,67 +569,167 @@ _list_update_data_list:
 	mov	r0, r7
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
 	b	_insert_data_list
-.L88:
+.L77:
 	mov	r2, #-1
-	b	.L86
-.L89:
+	b	.L75
+.L78:
 	mov	r3, #-1
-	b	.L87
-.L80:
+	b	.L76
+.L69:
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L91:
+.L80:
 	.align	2
-.L90:
-	.word	.LANCHOR10
+.L79:
+	.word	.LANCHOR12
 	.word	.LANCHOR4
-	.word	.LANCHOR11
+	.word	.LANCHOR13
 	.word	.LC0
-	.word	.LANCHOR9
+	.word	.LANCHOR11
 	.word	-1431655765
 	.size	_list_update_data_list, .-_list_update_data_list
-	.section	.text.zftl_get_gc_node.part.9,"ax",%progbits
+	.section	.text.nandc_de_cs.constprop.32,"ax",%progbits
 	.align	1
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	zftl_get_gc_node.part.9, %function
-zftl_get_gc_node.part.9:
+	.type	nandc_de_cs.constprop.32, %function
+nandc_de_cs.constprop.32:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+	ldr	r3, .L82
+	ldr	r2, [r3]
+	ldr	r3, [r2]
+	bfc	r3, #0, #8
+	bfc	r3, #17, #1
+	str	r3, [r2]
+	bx	lr
+.L83:
+	.align	2
+.L82:
+	.word	.LANCHOR7
+	.size	nandc_de_cs.constprop.32, .-nandc_de_cs.constprop.32
+	.section	.text.flash_read_status,"ax",%progbits
+	.align	1
+	.global	flash_read_status
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_read_status, %function
+flash_read_status:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	movs	r3, #112
+	push	{r4, lr}
+	mov	r4, r0
+	str	r3, [r0, #8]
+	movs	r0, #1
+	bl	udelay
+	ldr	r0, [r4]
+	uxtb	r0, r0
+	pop	{r4, pc}
+	.size	flash_read_status, .-flash_read_status
+	.section	.text.toshiba_set_rr_para,"ax",%progbits
+	.align	1
+	.global	toshiba_set_rr_para
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	toshiba_set_rr_para, %function
+toshiba_set_rr_para:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	add	r7, r1, r1, lsl #2
+	ldr	r10, .L93+12
+	mov	r5, r0
+	mov	r6, r1
+	movs	r4, #0
+	ldr	r8, .L93+16
+.L86:
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	cmp	r4, r3
+	bcc	.L90
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L90:
+	movs	r3, #85
+	movs	r0, #1
+	str	r3, [r5, #8]
+	ldrsb	r3, [r4, r8]
+	str	r3, [r5, #4]
+	bl	udelay
 	ldr	r3, .L93
-	mov	r1, r0
-	ldr	r0, [r3]
-	b	_list_get_gc_head_node.isra.2
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #34
+	bne	.L87
+	adds	r3, r4, r7
+	add	r3, r3, r8
+.L92:
+	ldrsb	r3, [r3, #5]
+.L91:
+	str	r3, [r5]
+	adds	r4, r4, #1
+	b	.L86
+.L87:
+	cmp	r3, #35
+	bne	.L89
+	ldr	r3, .L93+4
+	adds	r2, r4, r7
+	add	r3, r3, r2
+	b	.L92
+.L89:
+	ldr	r3, .L93+8
+	ldrsb	r3, [r3, r6]
+	b	.L91
 .L94:
 	.align	2
 .L93:
-	.word	.LANCHOR12
-	.size	zftl_get_gc_node.part.9, .-zftl_get_gc_node.part.9
-	.section	.text.nandc_de_cs.constprop.33,"ax",%progbits
+	.word	.LANCHOR15
+	.word	.LANCHOR16
+	.word	.LANCHOR17
+	.word	.LANCHOR18
+	.word	.LANCHOR14
+	.size	toshiba_set_rr_para, .-toshiba_set_rr_para
+	.section	.text.hynix_reconfig_rr_para,"ax",%progbits
 	.align	1
+	.global	hynix_reconfig_rr_para
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	nandc_de_cs.constprop.33, %function
-nandc_de_cs.constprop.33:
+	.type	hynix_reconfig_rr_para, %function
+hynix_reconfig_rr_para:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L96
-	ldr	r2, [r3]
-	ldr	r3, [r2]
-	bfc	r3, #0, #8
-	bfc	r3, #17, #1
-	str	r3, [r2]
-	bx	lr
-.L97:
+	push	{r3, r4, r5, lr}
+	mov	r4, r0
+	ldr	r3, .L100
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	subs	r3, r3, #1
+	cmp	r3, #7
+	bhi	.L95
+	ldr	r5, .L100+4
+	ldr	r3, [r5]
+	add	r3, r3, r0
+	ldrb	r3, [r3, #120]	@ zero_extendqisi2
+	cbz	r3, .L95
+	movs	r1, #0
+	bl	hynix_set_rr_para
+	ldr	r0, [r5]
+	movs	r3, #0
+	add	r0, r0, r4
+	strb	r3, [r0, #120]
+.L95:
+	pop	{r3, r4, r5, pc}
+.L101:
 	.align	2
-.L96:
-	.word	.LANCHOR13
-	.size	nandc_de_cs.constprop.33, .-nandc_de_cs.constprop.33
+.L100:
+	.word	.LANCHOR15
+	.word	.LANCHOR6
+	.size	hynix_reconfig_rr_para, .-hynix_reconfig_rr_para
 	.section	.text.nand_flash_print_info,"ax",%progbits
 	.align	1
 	.global	nand_flash_print_info
@@ -678,18 +743,18 @@ nand_flash_print_info:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, lr}
 	sub	sp, sp, #20
-	ldr	r4, .L216
+	ldr	r4, .L220
 	ldr	r3, [r4]
 	lsls	r5, r3, #19
-	bpl	.L99
-	ldr	r1, .L216+4
-	ldr	r0, .L216+8
+	bpl	.L103
+	ldr	r1, .L220+4
+	ldr	r0, .L220+8
 	bl	printf
-.L99:
+.L103:
 	ldr	r3, [r4]
 	lsls	r0, r3, #19
-	bpl	.L100
-	ldr	r3, .L216+12
+	bpl	.L104
+	ldr	r3, .L220+12
 	ldr	r0, [r3]
 	ldrb	r5, [r0, #6]	@ zero_extendqisi2
 	ldrb	r3, [r0, #3]	@ zero_extendqisi2
@@ -700,274 +765,274 @@ nand_flash_print_info:
 	str	r5, [sp, #4]
 	ldrb	r0, [r0, #4]	@ zero_extendqisi2
 	str	r0, [sp]
-	ldr	r0, .L216+16
+	ldr	r0, .L220+16
 	bl	printf
-.L100:
+.L104:
 	ldr	r3, [r4]
 	lsls	r1, r3, #19
-	bpl	.L101
-	ldr	r3, .L216+12
-	ldr	r0, .L216+20
+	bpl	.L105
+	ldr	r3, .L220+12
+	ldr	r0, .L220+20
 	ldr	r3, [r3]
 	ldrb	r1, [r3, #8]	@ zero_extendqisi2
 	bl	printf
-.L101:
+.L105:
 	ldr	r3, [r4]
 	lsls	r2, r3, #19
-	bpl	.L102
-	ldr	r3, .L216+12
-	ldr	r0, .L216+24
+	bpl	.L106
+	ldr	r3, .L220+12
+	ldr	r0, .L220+24
 	ldr	r3, [r3]
 	ldrb	r1, [r3, #9]	@ zero_extendqisi2
 	bl	printf
-.L102:
+.L106:
 	ldr	r3, [r4]
 	lsls	r3, r3, #19
-	bpl	.L103
-	ldr	r3, .L216+12
-	ldr	r0, .L216+28
+	bpl	.L107
+	ldr	r3, .L220+12
+	ldr	r0, .L220+28
 	ldr	r3, [r3]
 	ldrh	r1, [r3, #10]
 	bl	printf
-.L103:
+.L107:
 	ldr	r3, [r4]
 	lsls	r5, r3, #19
-	bpl	.L104
-	ldr	r3, .L216+12
-	ldr	r0, .L216+32
+	bpl	.L108
+	ldr	r3, .L220+12
+	ldr	r0, .L220+32
 	ldr	r3, [r3]
 	ldrb	r1, [r3, #12]	@ zero_extendqisi2
 	bl	printf
-.L104:
+.L108:
 	ldr	r3, [r4]
 	lsls	r0, r3, #19
-	bpl	.L105
-	ldr	r3, .L216+12
-	ldr	r0, .L216+36
+	bpl	.L109
+	ldr	r3, .L220+12
+	ldr	r0, .L220+36
 	ldr	r3, [r3]
 	ldrb	r1, [r3, #13]	@ zero_extendqisi2
 	bl	printf
-.L105:
+.L109:
 	ldr	r3, [r4]
 	lsls	r1, r3, #19
-	bpl	.L106
-	ldr	r3, .L216+12
-	ldr	r0, .L216+40
+	bpl	.L110
+	ldr	r3, .L220+12
+	ldr	r0, .L220+40
 	ldr	r3, [r3]
 	ldrh	r1, [r3, #14]
 	bl	printf
-.L106:
+.L110:
 	ldr	r3, [r4]
 	lsls	r2, r3, #19
-	bpl	.L107
-	ldr	r3, .L216+12
-	ldr	r0, .L216+44
+	bpl	.L111
+	ldr	r3, .L220+12
+	ldr	r0, .L220+44
 	ldr	r3, [r3]
 	ldrb	r1, [r3, #23]	@ zero_extendqisi2
 	bl	printf
-.L107:
+.L111:
 	ldr	r3, [r4]
 	lsls	r3, r3, #19
-	bpl	.L108
-	ldr	r3, .L216+12
-	ldr	r0, .L216+48
+	bpl	.L112
+	ldr	r3, .L220+12
+	ldr	r0, .L220+48
 	ldr	r3, [r3]
 	ldrb	r1, [r3, #18]	@ zero_extendqisi2
 	bl	printf
-.L108:
+.L112:
 	ldr	r3, [r4]
 	lsls	r5, r3, #19
-	bpl	.L109
-	ldr	r3, .L216+12
-	ldr	r0, .L216+52
+	bpl	.L113
+	ldr	r3, .L220+12
+	ldr	r0, .L220+52
 	ldr	r3, [r3]
 	ldrb	r1, [r3, #19]	@ zero_extendqisi2
 	bl	printf
-.L109:
+.L113:
 	ldr	r3, [r4]
 	lsls	r0, r3, #19
-	bpl	.L110
-	ldr	r3, .L216+12
-	ldr	r0, .L216+56
+	bpl	.L114
+	ldr	r3, .L220+12
+	ldr	r0, .L220+56
 	ldr	r3, [r3]
 	ldrb	r1, [r3, #20]	@ zero_extendqisi2
 	bl	printf
-.L110:
+.L114:
 	ldr	r3, [r4]
 	lsls	r1, r3, #19
-	bpl	.L111
-	ldr	r3, .L216+60
-	ldr	r0, .L216+64
+	bpl	.L115
+	ldr	r3, .L220+60
+	ldr	r0, .L220+64
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	bl	printf
-.L111:
+.L115:
 	ldr	r3, [r4]
 	lsls	r2, r3, #19
-	bpl	.L112
-	ldr	r3, .L216+12
-	ldr	r0, .L216+68
+	bpl	.L116
+	ldr	r3, .L220+12
+	ldr	r0, .L220+68
 	ldr	r3, [r3]
 	ldrb	r1, [r3, #22]	@ zero_extendqisi2
 	bl	printf
-.L112:
+.L116:
 	ldr	r3, [r4]
 	lsls	r3, r3, #19
-	bpl	.L113
-	ldr	r3, .L216+72
-	ldr	r0, .L216+76
+	bpl	.L117
+	ldr	r3, .L220+72
+	ldr	r0, .L220+76
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	bl	printf
-.L113:
+.L117:
 	ldr	r3, [r4]
 	lsls	r5, r3, #19
-	bpl	.L114
-	ldr	r3, .L216+12
-	ldr	r0, .L216+80
+	bpl	.L118
+	ldr	r3, .L220+12
+	ldr	r0, .L220+80
 	ldr	r3, [r3]
 	ldrb	r1, [r3, #16]	@ zero_extendqisi2
 	and	r1, r1, #1
 	bl	printf
-.L114:
+.L118:
 	ldr	r3, [r4]
 	lsls	r0, r3, #19
-	bpl	.L115
-	ldr	r3, .L216+12
-	ldr	r0, .L216+84
+	bpl	.L119
+	ldr	r3, .L220+12
+	ldr	r0, .L220+84
 	ldr	r3, [r3]
 	ldrh	r1, [r3, #16]
 	ubfx	r1, r1, #1, #1
 	bl	printf
-.L115:
+.L119:
 	ldr	r3, [r4]
 	lsls	r1, r3, #19
-	bpl	.L116
-	ldr	r3, .L216+12
-	ldr	r0, .L216+88
+	bpl	.L120
+	ldr	r3, .L220+12
+	ldr	r0, .L220+88
 	ldr	r3, [r3]
 	ldrh	r1, [r3, #16]
 	ubfx	r1, r1, #2, #1
 	bl	printf
-.L116:
+.L120:
 	ldr	r3, [r4]
 	lsls	r2, r3, #19
-	bpl	.L117
-	ldr	r3, .L216+12
-	ldr	r0, .L216+92
+	bpl	.L121
+	ldr	r3, .L220+12
+	ldr	r0, .L220+92
 	ldr	r3, [r3]
 	ldrh	r1, [r3, #16]
 	ubfx	r1, r1, #3, #1
 	bl	printf
-.L117:
+.L121:
 	ldr	r3, [r4]
 	lsls	r3, r3, #19
-	bpl	.L118
-	ldr	r3, .L216+12
-	ldr	r0, .L216+96
+	bpl	.L122
+	ldr	r3, .L220+12
+	ldr	r0, .L220+96
 	ldr	r3, [r3]
 	ldrh	r1, [r3, #16]
 	ubfx	r1, r1, #4, #1
 	bl	printf
-.L118:
+.L122:
 	ldr	r3, [r4]
 	lsls	r5, r3, #19
-	bpl	.L119
-	ldr	r3, .L216+12
-	ldr	r0, .L216+100
+	bpl	.L123
+	ldr	r3, .L220+12
+	ldr	r0, .L220+100
 	ldr	r3, [r3]
 	ldrh	r1, [r3, #16]
 	ubfx	r1, r1, #5, #1
 	bl	printf
-.L119:
+.L123:
 	ldr	r3, [r4]
 	lsls	r0, r3, #19
-	bpl	.L120
-	ldr	r3, .L216+12
-	ldr	r0, .L216+104
+	bpl	.L124
+	ldr	r3, .L220+12
+	ldr	r0, .L220+104
 	ldr	r3, [r3]
 	ldrh	r1, [r3, #16]
 	ubfx	r1, r1, #6, #1
 	bl	printf
-.L120:
+.L124:
 	ldr	r3, [r4]
 	lsls	r1, r3, #19
-	bpl	.L121
-	ldr	r3, .L216+12
-	ldr	r0, .L216+108
+	bpl	.L125
+	ldr	r3, .L220+12
+	ldr	r0, .L220+108
 	ldr	r3, [r3]
 	ldrh	r1, [r3, #16]
 	ubfx	r1, r1, #7, #1
 	bl	printf
-.L121:
+.L125:
 	ldr	r3, [r4]
 	lsls	r2, r3, #19
-	bpl	.L122
-	ldr	r3, .L216+12
-	ldr	r0, .L216+112
+	bpl	.L126
+	ldr	r3, .L220+12
+	ldr	r0, .L220+112
 	ldr	r3, [r3]
 	ldrh	r1, [r3, #16]
 	ubfx	r1, r1, #8, #1
 	bl	printf
-.L122:
+.L126:
 	ldr	r3, [r4]
 	lsls	r3, r3, #19
-	bpl	.L123
-	ldr	r3, .L216+12
-	ldr	r0, .L216+116
+	bpl	.L127
+	ldr	r3, .L220+12
+	ldr	r0, .L220+116
 	ldr	r3, [r3]
 	ldrh	r1, [r3, #16]
 	ubfx	r1, r1, #9, #1
 	bl	printf
-.L123:
+.L127:
 	ldr	r3, [r4]
 	lsls	r5, r3, #19
-	bpl	.L124
-	ldr	r3, .L216+12
-	ldr	r0, .L216+120
+	bpl	.L128
+	ldr	r3, .L220+12
+	ldr	r0, .L220+120
 	ldr	r3, [r3]
 	ldrh	r1, [r3, #16]
 	ubfx	r1, r1, #10, #1
 	bl	printf
-.L124:
+.L128:
 	ldr	r3, [r4]
 	lsls	r0, r3, #19
-	bpl	.L125
-	ldr	r3, .L216+124
-	ldr	r0, .L216+128
+	bpl	.L129
+	ldr	r3, .L220+124
+	ldr	r0, .L220+128
 	ldrb	r2, [r3]	@ zero_extendqisi2
-	ldr	r3, .L216+132
+	ldr	r3, .L220+132
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	bl	printf
-.L125:
+.L129:
 	ldr	r3, [r4]
 	lsls	r1, r3, #19
-	bpl	.L126
-	ldr	r3, .L216+136
-	ldr	r0, .L216+140
+	bpl	.L130
+	ldr	r3, .L220+136
+	ldr	r0, .L220+140
 	ldrb	r2, [r3, #11]	@ zero_extendqisi2
 	ldrb	r1, [r3, #10]	@ zero_extendqisi2
 	bl	printf
-.L126:
+.L130:
 	ldr	r3, [r4]
 	lsls	r2, r3, #19
-	bpl	.L127
-	ldr	r3, .L216+136
-	ldr	r0, .L216+144
+	bpl	.L131
+	ldr	r3, .L220+136
+	ldr	r0, .L220+144
 	ldrb	r2, [r3, #9]	@ zero_extendqisi2
 	ldrb	r1, [r3, #8]	@ zero_extendqisi2
 	bl	printf
-.L127:
+.L131:
 	ldr	r3, [r4]
 	lsls	r3, r3, #19
-	bpl	.L98
-	ldr	r3, .L216+148
-	b	.L217
-.L218:
+	bpl	.L102
+	ldr	r3, .L220+148
+	b	.L221
+.L222:
 	.align	2
-.L216:
-	.word	.LANCHOR14
-	.word	.LANCHOR15
+.L220:
+	.word	.LANCHOR19
+	.word	.LANCHOR20
 	.word	.LC1
-	.word	.LANCHOR16
+	.word	.LANCHOR21
 	.word	.LC2
 	.word	.LC3
 	.word	.LC4
@@ -979,10 +1044,10 @@ nand_flash_print_info:
 	.word	.LC10
 	.word	.LC11
 	.word	.LC12
-	.word	.LANCHOR17
+	.word	.LANCHOR22
 	.word	.LC13
 	.word	.LC14
-	.word	.LANCHOR18
+	.word	.LANCHOR23
 	.word	.LC15
 	.word	.LC16
 	.word	.LC17
@@ -995,27 +1060,27 @@ nand_flash_print_info:
 	.word	.LC24
 	.word	.LC25
 	.word	.LC26
-	.word	.LANCHOR19
+	.word	.LANCHOR24
 	.word	.LC27
 	.word	.LANCHOR0
-	.word	.LANCHOR20
+	.word	.LANCHOR25
 	.word	.LC28
 	.word	.LC29
-	.word	.LANCHOR21
-.L217:
-	ldr	r0, .L219
+	.word	.LANCHOR26
+.L221:
+	ldr	r0, .L223
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	add	sp, sp, #20
 	@ sp needed
 	pop	{r4, r5, lr}
 	b	printf
-.L98:
+.L102:
 	add	sp, sp, #20
 	@ sp needed
 	pop	{r4, r5, pc}
-.L220:
+.L224:
 	.align	2
-.L219:
+.L223:
 	.word	.LC30
 	.size	nand_flash_print_info, .-nand_flash_print_info
 	.section	.text.timer_delay_ns,"ax",%progbits
@@ -1027,275 +1092,97 @@ nand_flash_print_info:
 	.fpu softvfp
 	.type	timer_delay_ns, %function
 timer_delay_ns:
-	@ args = 0, pretend = 0, frame = 8
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	lsrs	r0, r0, #4
-	sub	sp, sp, #8
-	str	r0, [sp, #4]
-.L222:
-	ldr	r3, [sp, #4]
-	subs	r2, r3, #1
-	str	r2, [sp, #4]
-	cmp	r3, #0
-	bne	.L222
-	add	sp, sp, #8
-	@ sp needed
-	bx	lr
+	ldr	r3, .L226
+	addw	r0, r0, #999
+	umull	r0, r1, r0, r3
+	lsrs	r0, r1, #6
+	b	udelay
+.L227:
+	.align	2
+.L226:
+	.word	274877907
 	.size	timer_delay_ns, .-timer_delay_ns
-	.section	.text.flash_read_status,"ax",%progbits
-	.align	1
-	.global	flash_read_status
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	flash_read_status, %function
-flash_read_status:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	movs	r3, #112
-	mov	r1, r0
-	str	r3, [r0, #8]
-	movs	r0, #120
-	bl	timer_delay_ns
-	ldr	r0, [r1]
-	uxtb	r0, r0
-	pop	{r3, pc}
-	.size	flash_read_status, .-flash_read_status
-	.section	.text.toshiba_set_rr_para,"ax",%progbits
+	.section	.text.nandc_set_ddr_para,"ax",%progbits
 	.align	1
-	.global	toshiba_set_rr_para
+	.global	nandc_set_ddr_para
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	toshiba_set_rr_para, %function
-toshiba_set_rr_para:
+	.type	nandc_set_ddr_para, %function
+nandc_set_ddr_para:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, lr}
-	add	r6, r1, r1, lsl #2
-	ldr	r8, .L233+16
-	mov	r5, r0
-	movs	r4, #0
-	ldr	r7, .L233
-.L226:
-	ldrb	r3, [r8]	@ zero_extendqisi2
-	cmp	r4, r3
-	bcc	.L230
-	pop	{r4, r5, r6, r7, r8, pc}
-.L230:
-	movs	r3, #85
-	movs	r0, #200
-	str	r3, [r5, #8]
-	ldrsb	r3, [r4, r7]
-	str	r3, [r5, #4]
-	bl	timer_delay_ns
-	ldr	r3, .L233+4
+	@ link register save eliminated.
+	ldr	r3, .L231
+	ldr	r2, .L231+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #34
-	bne	.L227
-	adds	r3, r4, r6
-	add	r3, r3, r7
+	ldr	r2, [r2]
+	cmp	r3, #9
+	lsl	r3, r0, #16
+	lsl	r0, r0, #8
+	orr	r3, r3, r0
+	orr	r3, r3, #3
+	ite	eq
+	streq	r3, [r2, #80]
+	strne	r3, [r2, #304]
+	bx	lr
 .L232:
-	ldrsb	r3, [r3, #5]
-.L231:
-	str	r3, [r5]
-	adds	r4, r4, #1
-	b	.L226
-.L227:
-	cmp	r3, #35
-	bne	.L229
-	ldr	r3, .L233+8
-	adds	r2, r4, r6
-	add	r3, r3, r2
-	b	.L232
-.L229:
-	ldr	r3, .L233+12
-	ldrsb	r3, [r3, r1]
-	b	.L231
-.L234:
 	.align	2
-.L233:
-	.word	.LANCHOR22
-	.word	.LANCHOR23
-	.word	.LANCHOR24
-	.word	.LANCHOR25
-	.word	.LANCHOR26
-	.size	toshiba_set_rr_para, .-toshiba_set_rr_para
-	.section	.text.hynix_set_rr_para,"ax",%progbits
+.L231:
+	.word	.LANCHOR27
+	.word	.LANCHOR7
+	.size	nandc_set_ddr_para, .-nandc_set_ddr_para
+	.section	.text.nandc_get_ddr_para,"ax",%progbits
 	.align	1
+	.global	nandc_get_ddr_para
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	hynix_set_rr_para, %function
-hynix_set_rr_para:
+	.type	nandc_get_ddr_para, %function
+nandc_get_ddr_para:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L240
-	push	{r4, r5, r6, r7, r8, lr}
-	lsls	r6, r0, #8
-	ldr	r4, .L240+4
+	@ link register save eliminated.
+	ldr	r3, .L237
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #9
+	ldr	r3, .L237+4
 	ldr	r3, [r3]
-	ldr	r7, [r4]
-	ldrb	r2, [r3, #113]	@ zero_extendqisi2
-	add	ip, r3, #128
-	ldrb	r5, [r3, #112]	@ zero_extendqisi2
-	mul	r4, r1, r2
-	cmp	r5, #8
-	it	ne
-	movne	r5, #160
-	add	r1, r3, #112
-	add	r2, r2, #-1
-	add	r8, ip, r2
-	add	r4, r4, #32
-	it	ne
-	smlabbne	r4, r5, r0, r4
-	add	r5, r3, #127
-	movs	r0, #54
-	add	r1, r1, r4
-	adds	r4, r7, r6
-	subs	r1, r1, #1
-	str	r0, [r4, #2056]
+	ite	eq
+	ldreq	r0, [r3, #80]
+	ldrne	r0, [r3, #304]
+	ubfx	r0, r0, #8, #8
+	bx	lr
 .L238:
-	cmp	r5, r8
-	bne	.L239
-	add	r6, r6, r7
-	movs	r3, #22
-	str	r3, [r6, #2056]
-	pop	{r4, r5, r6, r7, r8, pc}
-.L239:
-	ldrb	r3, [r5, #1]!	@ zero_extendqisi2
-	movs	r0, #120
-	str	r3, [r4, #2052]
-	bl	timer_delay_ns
-	ldrsb	r3, [r1, #1]!
-	str	r3, [r4, #2048]
-	b	.L238
-.L241:
 	.align	2
-.L240:
+.L237:
 	.word	.LANCHOR27
-	.word	.LANCHOR13
-	.size	hynix_set_rr_para, .-hynix_set_rr_para
-	.section	.text.hynix_reconfig_rr_para,"ax",%progbits
+	.word	.LANCHOR7
+	.size	nandc_get_ddr_para, .-nandc_get_ddr_para
+	.section	.text.nandc_set_if_mode,"ax",%progbits
 	.align	1
-	.global	hynix_reconfig_rr_para
+	.global	nandc_set_if_mode
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	hynix_reconfig_rr_para, %function
-hynix_reconfig_rr_para:
+	.type	nandc_set_if_mode, %function
+nandc_set_if_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	mov	r4, r0
+	@ link register save eliminated.
 	ldr	r3, .L247
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	subs	r3, r3, #1
-	cmp	r3, #7
-	bhi	.L242
-	ldr	r5, .L247+4
-	ldr	r3, [r5]
-	add	r3, r3, r0
-	ldrb	r3, [r3, #120]	@ zero_extendqisi2
-	cbz	r3, .L242
-	movs	r1, #0
-	bl	hynix_set_rr_para
-	ldr	r0, [r5]
-	movs	r3, #0
-	add	r0, r0, r4
-	strb	r3, [r0, #120]
-.L242:
-	pop	{r3, r4, r5, pc}
-.L248:
-	.align	2
-.L247:
-	.word	.LANCHOR23
-	.word	.LANCHOR27
-	.size	hynix_reconfig_rr_para, .-hynix_reconfig_rr_para
-	.section	.text.nandc_set_ddr_para,"ax",%progbits
-	.align	1
-	.global	nandc_set_ddr_para
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	nandc_set_ddr_para, %function
-nandc_set_ddr_para:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L252
-	ldr	r2, .L252+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	ldr	r2, [r2]
-	cmp	r3, #9
-	lsl	r3, r0, #16
-	lsl	r0, r0, #8
-	orr	r3, r3, r0
-	orr	r3, r3, #3
-	ite	eq
-	streq	r3, [r2, #80]
-	strne	r3, [r2, #304]
-	bx	lr
-.L253:
-	.align	2
-.L252:
-	.word	.LANCHOR28
-	.word	.LANCHOR13
-	.size	nandc_set_ddr_para, .-nandc_set_ddr_para
-	.section	.text.nandc_get_ddr_para,"ax",%progbits
-	.align	1
-	.global	nandc_get_ddr_para
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	nandc_get_ddr_para, %function
-nandc_get_ddr_para:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L258
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #9
-	ldr	r3, .L258+4
-	ldr	r3, [r3]
-	ite	eq
-	ldreq	r0, [r3, #80]
-	ldrne	r0, [r3, #304]
-	ubfx	r0, r0, #8, #8
-	bx	lr
-.L259:
-	.align	2
-.L258:
-	.word	.LANCHOR28
-	.word	.LANCHOR13
-	.size	nandc_get_ddr_para, .-nandc_get_ddr_para
-	.section	.text.nandc_set_if_mode,"ax",%progbits
-	.align	1
-	.global	nandc_set_if_mode
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	nandc_set_if_mode, %function
-nandc_set_if_mode:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L268
 	ands	r1, r0, #6
 	ldr	r3, [r3]
 	ldr	r2, [r3]
-	beq	.L261
+	beq	.L240
 	lsls	r1, r0, #29
-	ldr	r1, .L268+4
+	ldr	r1, .L247+4
 	orr	r2, r2, #24576
 	bfc	r2, #15, #1
 	ldrb	r1, [r1]	@ zero_extendqisi2
@@ -1303,8 +1190,8 @@ nandc_set_if_mode:
 	it	mi
 	orrmi	r2, r2, #32768
 	cmp	r1, #9
-	ldr	r1, .L268+8
-	bne	.L263
+	ldr	r1, .L247+8
+	bne	.L242
 	movw	r0, #8321
 	str	r0, [r3, #8]
 	str	r1, [r3, #80]
@@ -1312,10 +1199,10 @@ nandc_set_if_mode:
 	str	r1, [r3, #84]
 	movs	r1, #39
 	str	r1, [r3, #84]
-.L264:
+.L243:
 	str	r2, [r3]
 	bx	lr
-.L263:
+.L242:
 	movw	r0, #8322
 	str	r0, [r3, #344]
 	str	r1, [r3, #304]
@@ -1323,15 +1210,15 @@ nandc_set_if_mode:
 	str	r1, [r3, #308]
 	movs	r1, #39
 	str	r1, [r3, #308]
-	b	.L264
-.L261:
+	b	.L243
+.L240:
 	bfi	r2, r1, #13, #1
-	b	.L264
-.L269:
+	b	.L243
+.L248:
 	.align	2
-.L268:
-	.word	.LANCHOR13
-	.word	.LANCHOR28
+.L247:
+	.word	.LANCHOR7
+	.word	.LANCHOR27
 	.word	1052675
 	.size	nandc_set_if_mode, .-nandc_set_if_mode
 	.section	.text.nandc_cs,"ax",%progbits
@@ -1346,7 +1233,7 @@ nandc_cs:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L271
+	ldr	r3, .L250
 	movs	r2, #1
 	lsl	r0, r2, r0
 	ldr	r1, [r3]
@@ -1354,10 +1241,10 @@ nandc_cs:
 	bfi	r3, r0, #0, #8
 	str	r3, [r1]
 	bx	lr
-.L272:
+.L251:
 	.align	2
-.L271:
-	.word	.LANCHOR13
+.L250:
+	.word	.LANCHOR7
 	.size	nandc_cs, .-nandc_cs
 	.section	.text.flash_wait_device_ready_raw,"ax",%progbits
 	.align	1
@@ -1370,60 +1257,60 @@ nandc_cs:
 flash_wait_device_ready_raw:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L283
+	ldr	r3, .L262
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	mov	r5, r1
 	mov	fp, r2
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r0
-	bhi	.L274
-	movw	r2, #805
-	ldr	r1, .L283+4
-	ldr	r0, .L283+8
+	bhi	.L253
+	mov	r2, #812
+	ldr	r1, .L262+4
+	ldr	r0, .L262+8
 	bl	printf
-.L274:
-	ldr	r3, .L283+12
+.L253:
+	ldr	r3, .L262+12
 	lsrs	r7, r5, #8
 	lsr	r8, r5, #16
 	lsr	r10, r5, #24
 	ldrb	r6, [r3, r4]	@ zero_extendqisi2
-	ldr	r3, .L283+16
+	ldr	r3, .L262+16
 	ldr	r4, [r3]
 	add	r4, r4, r6, lsl #8
-.L280:
+.L259:
 	mov	r0, r6
 	bl	nandc_cs
 	movs	r3, #120
 	str	r3, [r4, #2056]
 	uxtb	r3, r5
 	str	r3, [r4, #2052]
-	ldr	r3, .L283+20
+	ldr	r3, .L262+20
 	str	r7, [r4, #2052]
 	str	r8, [r4, #2052]
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L275
+	cbz	r3, .L254
 	str	r10, [r4, #2052]
-.L275:
-	movs	r0, #120
-	bl	timer_delay_ns
+.L254:
+	movs	r0, #1
+	bl	udelay
 	ldr	r0, [r4, #2048]
 	uxtb	r0, r0
-	bl	nandc_de_cs.constprop.33
+	bl	nandc_de_cs.constprop.32
 	bics	r3, fp, r0
-	bne	.L280
+	bne	.L259
 	cmp	r0, #255
-	beq	.L280
+	beq	.L259
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L284:
+.L263:
 	.align	2
-.L283:
-	.word	.LANCHOR18
-	.word	.LANCHOR29
+.L262:
+	.word	.LANCHOR23
+	.word	.LANCHOR28
 	.word	.LC0
+	.word	.LANCHOR29
+	.word	.LANCHOR7
 	.word	.LANCHOR30
-	.word	.LANCHOR13
-	.word	.LANCHOR31
 	.size	flash_wait_device_ready_raw, .-flash_wait_device_ready_raw
 	.section	.text.flash_wait_device_ready,"ax",%progbits
 	.align	1
@@ -1438,7 +1325,7 @@ flash_wait_device_ready:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
 	tst	r0, #50331648
-	ldr	r3, .L295
+	ldr	r3, .L274
 	mov	r7, r1
 	ldrb	r5, [r3]	@ zero_extendqisi2
 	mov	r3, #1
@@ -1451,15 +1338,15 @@ flash_wait_device_ready:
 	and	r5, r5, r6
 	and	r4, r4, r0
 	uxtb	r5, r5
-	bne	.L286
-	ldr	r3, .L295+4
-	ldr	r10, .L295+16
+	bne	.L265
+	ldr	r3, .L274+4
+	ldr	r10, .L274+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L287
+	cbz	r3, .L266
 	ldrb	r3, [r10]	@ zero_extendqisi2
-	cbz	r3, .L286
-.L287:
-	ldr	r3, .L295+8
+	cbz	r3, .L265
+.L266:
+	ldr	r3, .L274+8
 	mov	r0, r4
 	ldrh	r6, [r3]
 	mov	r1, r6
@@ -1469,23 +1356,23 @@ flash_wait_device_ready:
 	mov	r0, r4
 	bl	__aeabi_uidivmod
 	ldrb	r3, [r10]	@ zero_extendqisi2
-	cbz	r3, .L288
+	cbz	r3, .L267
 	add	r4, r8, r1, lsl #1
-.L286:
+.L265:
 	mov	r2, r7
 	mov	r1, r4
 	mov	r0, r5
 	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
 	b	flash_wait_device_ready_raw
-.L288:
-	ldr	r3, .L295+12
+.L267:
+	ldr	r3, .L274+12
 	ldrh	r4, [r3, r1, lsl #1]
 	add	r4, r4, r8
-	b	.L286
-.L296:
+	b	.L265
+.L275:
 	.align	2
-.L295:
-	.word	.LANCHOR32
+.L274:
+	.word	.LANCHOR31
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.word	.LANCHOR3
@@ -1503,17 +1390,17 @@ nandc_de_cs:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L298
+	ldr	r3, .L277
 	ldr	r2, [r3]
 	ldr	r3, [r2]
 	bfc	r3, #0, #8
 	bfc	r3, #17, #1
 	str	r3, [r2]
 	bx	lr
-.L299:
+.L278:
 	.align	2
-.L298:
-	.word	.LANCHOR13
+.L277:
+	.word	.LANCHOR7
 	.size	nandc_de_cs, .-nandc_de_cs
 	.section	.text.nandc_wait_flash_ready_no_delay,"ax",%progbits
 	.align	1
@@ -1526,33 +1413,33 @@ nandc_de_cs:
 nandc_wait_flash_ready_no_delay:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, lr}
-	ldr	r1, .L305
-	ldr	r4, .L305+4
-.L302:
-	ldr	r3, [r4]
+	push	{r0, r1, r2, r4, r5, lr}
+	ldr	r4, .L284
+	ldr	r5, .L284+4
+.L281:
+	ldr	r3, [r5]
 	ldr	r3, [r3]
 	str	r3, [sp, #4]
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #22
-	bmi	.L303
-	movs	r0, #10
-	bl	timer_delay_ns
-	subs	r1, r1, #1
-	bne	.L302
+	bmi	.L282
+	movs	r0, #1
+	bl	udelay
+	subs	r4, r4, #1
+	bne	.L281
 	mov	r0, #-1
-.L300:
-	add	sp, sp, #8
+.L279:
+	add	sp, sp, #12
 	@ sp needed
-	pop	{r4, pc}
-.L303:
+	pop	{r4, r5, pc}
+.L282:
 	movs	r0, #0
-	b	.L300
-.L306:
+	b	.L279
+.L285:
 	.align	2
-.L305:
+.L284:
 	.word	100000
-	.word	.LANCHOR13
+	.word	.LANCHOR7
 	.size	nandc_wait_flash_ready_no_delay, .-nandc_wait_flash_ready_no_delay
 	.section	.text.zftl_flash_enter_slc_mode,"ax",%progbits
 	.align	1
@@ -1565,74 +1452,76 @@ nandc_wait_flash_ready_no_delay:
 zftl_flash_enter_slc_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L327
-	push	{r4, r5, r6, lr}
-	mov	r6, r0
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r7, r0
+	ldr	r3, .L305
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L307
-	ldr	r2, .L327+4
+	cmp	r3, #0
+	beq	.L286
+	ldr	r2, .L305+4
 	cmp	r3, #1
 	ldr	r4, [r2]
-	bne	.L310
-	ldr	r3, .L327+8
+	bne	.L289
+	ldr	r3, .L305+8
 	ldrb	r3, [r3, #29]	@ zero_extendqisi2
-	cbz	r3, .L307
-.L326:
-	add	r4, r4, r6, lsl #8
-.L325:
+	cmp	r3, #0
+	beq	.L286
+.L304:
+	add	r4, r4, r7, lsl #8
 	str	r3, [r4, #2056]
-.L307:
-	pop	{r4, r5, r6, pc}
-.L310:
+	pop	{r3, r4, r5, r6, r7, pc}
+.L289:
 	cmp	r3, #2
-	bne	.L312
-	ldr	r3, .L327+12
+	bne	.L291
+	ldr	r3, .L305+12
 	ldrb	r2, [r3, r0]	@ zero_extendqisi2
-	cmp	r2, #0
-	beq	.L307
-	ldr	r5, .L327+8
+	cbz	r2, .L286
+	ldr	r5, .L305+8
 	movs	r2, #0
 	strb	r2, [r3, r0]
 	ldrb	r3, [r5, #29]	@ zero_extendqisi2
-	cmp	r3, #0
-	beq	.L307
+	cbz	r3, .L286
 	bl	nandc_wait_flash_ready_no_delay
 	ldrb	r3, [r5, #29]	@ zero_extendqisi2
-	b	.L326
-.L312:
+	b	.L304
+.L291:
 	cmp	r3, #3
-	bne	.L307
-	ldr	r5, .L327+12
-	ldrb	r3, [r5, r0]	@ zero_extendqisi2
-	cmp	r3, #0
-	beq	.L307
-	add	r4, r4, r6, lsl #8
+	bne	.L286
+	ldr	r6, .L305+12
+	ldrb	r3, [r6, r0]	@ zero_extendqisi2
+	cbz	r3, .L286
+	add	r4, r4, r7, lsl #8
+	movs	r5, #0
 	bl	nandc_wait_flash_ready_no_delay
 	movs	r3, #239
-	movs	r1, #0
+	strb	r5, [r6, r7]
 	str	r3, [r4, #2056]
 	movs	r3, #145
 	str	r3, [r4, #2052]
-	movs	r0, #100
-	strb	r1, [r5, r6]
-	bl	timer_delay_ns
-	movs	r3, #1
-	str	r1, [r4, #2048]
-	movs	r0, #150
-	str	r3, [r4, #2048]
-	str	r1, [r4, #2048]
-	str	r1, [r4, #2048]
-	bl	timer_delay_ns
+	movs	r6, #1
+	movs	r0, #1
+	bl	udelay
+	str	r5, [r4, #2048]
+	mov	r0, r6
+	str	r6, [r4, #2048]
+	str	r5, [r4, #2048]
+	str	r5, [r4, #2048]
+	bl	udelay
 	bl	nandc_wait_flash_ready_no_delay
 	movs	r3, #218
-	b	.L325
-.L328:
+	mov	r0, r6
+	str	r3, [r4, #2056]
+	pop	{r3, r4, r5, r6, r7, lr}
+	b	udelay
+.L286:
+	pop	{r3, r4, r5, r6, r7, pc}
+.L306:
 	.align	2
-.L327:
+.L305:
 	.word	.LANCHOR0
-	.word	.LANCHOR13
+	.word	.LANCHOR7
+	.word	.LANCHOR32
 	.word	.LANCHOR33
-	.word	.LANCHOR34
 	.size	zftl_flash_enter_slc_mode, .-zftl_flash_enter_slc_mode
 	.section	.text.zftl_flash_exit_slc_mode,"ax",%progbits
 	.align	1
@@ -1645,89 +1534,93 @@ zftl_flash_enter_slc_mode:
 zftl_flash_exit_slc_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L350
-	push	{r4, r5, r6, r7, r8, lr}
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
 	mov	r4, r0
+	ldr	r3, .L328
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L329
-	ldr	r2, .L350+4
+	beq	.L307
+	ldr	r2, .L328+4
 	cmp	r3, #1
-	ldr	r5, [r2]
-	bne	.L332
-	ldr	r3, .L350+8
+	ldr	r6, [r2]
+	bne	.L310
+	ldr	r3, .L328+8
 	ldrb	r3, [r3, #30]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L329
-.L349:
-	add	r4, r5, r4, lsl #8
+	beq	.L307
+.L327:
+	add	r4, r6, r4, lsl #8
 	str	r3, [r4, #2056]
-	pop	{r4, r5, r6, r7, r8, pc}
-.L332:
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L310:
 	cmp	r3, #2
-	bne	.L334
-	ldr	r2, .L350+12
+	bne	.L312
+	ldr	r2, .L328+12
 	ldrb	r3, [r2, r0]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L329
-	ldr	r6, .L350+8
-	ldrb	r3, [r6, #12]	@ zero_extendqisi2
+	bne	.L307
+	ldr	r5, .L328+8
+	ldrb	r3, [r5, #12]	@ zero_extendqisi2
 	cmp	r3, #2
 	it	ne
 	movne	r3, #4
 	strb	r3, [r2, r0]
-	ldrb	r3, [r6, #30]	@ zero_extendqisi2
-	cbz	r3, .L329
+	ldrb	r3, [r5, #30]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L307
 	bl	nandc_wait_flash_ready_no_delay
-	ldrb	r3, [r6, #30]	@ zero_extendqisi2
-	b	.L349
-.L334:
+	ldrb	r3, [r5, #30]	@ zero_extendqisi2
+	b	.L327
+.L312:
 	cmp	r3, #3
-	bne	.L329
-	ldr	r6, .L350+12
-	ldrb	r3, [r6, r0]	@ zero_extendqisi2
-	cbnz	r3, .L329
-	ldr	r8, .L350+8
-	lsls	r7, r4, #8
+	bne	.L307
+	ldr	r7, .L328+12
+	ldrb	r3, [r7, r0]	@ zero_extendqisi2
+	cbnz	r3, .L307
+	ldr	r10, .L328+8
+	lsl	r8, r4, #8
 	bl	nandc_wait_flash_ready_no_delay
-	ldrb	r3, [r8, #12]	@ zero_extendqisi2
-	adds	r1, r5, r7
-	movs	r0, #100
-	add	r5, r5, r7
+	ldrb	r3, [r10, #12]	@ zero_extendqisi2
+	add	r5, r6, r8
+	movs	r0, #1
+	add	r6, r6, r8
 	cmp	r3, #2
 	it	ne
 	movne	r3, #4
-	strb	r3, [r6, r4]
+	strb	r3, [r7, r4]
 	movs	r3, #239
-	str	r3, [r1, #2056]
+	str	r3, [r5, #2056]
 	movs	r3, #145
-	str	r3, [r1, #2052]
-	bl	timer_delay_ns
-	ldrb	r3, [r8, #7]	@ zero_extendqisi2
-	movs	r0, #150
+	str	r3, [r5, #2052]
+	bl	udelay
+	ldrb	r3, [r10, #7]	@ zero_extendqisi2
+	movs	r0, #1
 	cmp	r3, #9
 	mov	r3, #1
 	itet	ne
-	ldrbne	r2, [r6, r4]	@ zero_extendqisi2
-	streq	r3, [r1, #2048]
-	strne	r2, [r1, #2048]
-	str	r3, [r1, #2048]
+	ldrbne	r2, [r7, r4]	@ zero_extendqisi2
+	streq	r3, [r5, #2048]
+	strne	r2, [r5, #2048]
+	str	r3, [r5, #2048]
 	movs	r3, #0
-	str	r3, [r1, #2048]
-	str	r3, [r1, #2048]
-	bl	timer_delay_ns
+	str	r3, [r5, #2048]
+	str	r3, [r5, #2048]
+	bl	udelay
 	bl	nandc_wait_flash_ready_no_delay
 	movs	r3, #223
-	str	r3, [r5, #2056]
+	movs	r0, #1
+	str	r3, [r6, #2056]
+	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
+	b	udelay
+.L307:
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
 .L329:
-	pop	{r4, r5, r6, r7, r8, pc}
-.L351:
 	.align	2
-.L350:
+.L328:
 	.word	.LANCHOR0
-	.word	.LANCHOR13
+	.word	.LANCHOR7
+	.word	.LANCHOR32
 	.word	.LANCHOR33
-	.word	.LANCHOR34
 	.size	zftl_flash_exit_slc_mode, .-zftl_flash_exit_slc_mode
 	.section	.text.flash_start_page_read,"ax",%progbits
 	.align	1
@@ -1740,10 +1633,10 @@ zftl_flash_exit_slc_mode:
 flash_start_page_read:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L366
+	ldr	r3, .L344
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r5, r0
-	ldr	r4, .L366+4
+	ldr	r4, .L344+4
 	mov	fp, r1
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	movs	r3, #1
@@ -1755,22 +1648,22 @@ flash_start_page_read:
 	ldrb	r2, [r4]	@ zero_extendqisi2
 	uxtb	r8, r3
 	cmp	r2, r8
-	bhi	.L353
-	movw	r2, #1001
-	ldr	r1, .L366+8
-	ldr	r0, .L366+12
+	bhi	.L331
+	movw	r2, #1013
+	ldr	r1, .L344+8
+	ldr	r0, .L344+12
 	bl	printf
-.L353:
+.L331:
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	cmp	r3, r8
-	bls	.L352
-	ldr	r3, .L366+16
+	bls	.L330
+	ldr	r3, .L344+16
 	movs	r4, #1
 	lsls	r4, r4, r7
-	ldr	r6, .L366+20
+	ldr	r6, .L344+20
 	ldrb	r10, [r3, r8]	@ zero_extendqisi2
 	subs	r4, r4, #1
-	ldr	r3, .L366+24
+	ldr	r3, .L344+24
 	and	r4, r4, fp
 	ubfx	fp, fp, #24, #2
 	mov	r0, r10
@@ -1778,27 +1671,27 @@ flash_start_page_read:
 	lsl	r8, r10, #8
 	bl	nandc_cs
 	cmp	fp, #0
-	bne	.L355
+	bne	.L333
 	mov	r0, r4
 	bl	slc_phy_page_address_calc
-	ldr	r3, .L366+28
+	ldr	r3, .L344+28
 	mov	r4, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L356
+	cbz	r3, .L334
 	mov	r0, r10
 	bl	zftl_flash_enter_slc_mode
-.L356:
+.L334:
 	ldr	r3, [r6]
 	ldrb	r2, [r3, #7]	@ zero_extendqisi2
 	cmp	r2, #1
-	bne	.L358
+	bne	.L336
 	ldrb	r3, [r3, #12]	@ zero_extendqisi2
 	cmp	r3, #2
 	ittt	eq
 	addeq	r3, r7, r8
 	moveq	r2, #38
 	streq	r2, [r3, #2056]
-.L358:
+.L336:
 	add	r3, r7, r8
 	movs	r2, #0
 	str	r2, [r3, #2056]
@@ -1810,48 +1703,48 @@ flash_start_page_read:
 	str	r2, [r3, #2052]
 	lsrs	r2, r4, #16
 	str	r2, [r3, #2052]
-	ldr	r2, .L366+32
+	ldr	r2, .L344+32
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbz	r2, .L359
+	cbz	r2, .L337
 	lsrs	r4, r4, #24
 	str	r4, [r3, #2052]
-.L359:
+.L337:
 	add	r3, r7, r8
 	str	r5, [r3, #2056]
-.L352:
+.L330:
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L355:
+.L333:
 	ldr	r3, [r6]
 	ldrb	r3, [r3, #12]	@ zero_extendqisi2
 	cmp	r3, #3
-	bne	.L357
-	ldr	r3, .L366+36
+	bne	.L335
+	ldr	r3, .L344+36
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L357
-	ldr	r3, .L366+40
+	cbnz	r3, .L335
+	ldr	r3, .L344+40
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L357
+	cbnz	r3, .L335
 	add	r3, r7, r8
 	str	fp, [r3, #2056]
-	b	.L356
-.L357:
+	b	.L334
+.L335:
 	mov	r0, r10
 	bl	zftl_flash_exit_slc_mode
-	b	.L356
-.L367:
+	b	.L334
+.L345:
 	.align	2
-.L366:
-	.word	.LANCHOR32
-	.word	.LANCHOR18
-	.word	.LANCHOR35
+.L344:
+	.word	.LANCHOR31
+	.word	.LANCHOR23
+	.word	.LANCHOR34
 	.word	.LC0
-	.word	.LANCHOR30
-	.word	.LANCHOR16
-	.word	.LANCHOR13
+	.word	.LANCHOR29
+	.word	.LANCHOR21
+	.word	.LANCHOR7
 	.word	.LANCHOR0
-	.word	.LANCHOR31
+	.word	.LANCHOR30
+	.word	.LANCHOR35
 	.word	.LANCHOR36
-	.word	.LANCHOR37
 	.size	flash_start_page_read, .-flash_start_page_read
 	.section	.text.nandc_wait_flash_ready,"ax",%progbits
 	.align	1
@@ -1864,35 +1757,35 @@ flash_start_page_read:
 nandc_wait_flash_ready:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, lr}
-	movs	r0, #150
-	bl	timer_delay_ns
-	ldr	r4, .L373
-	ldr	r1, .L373+4
-.L370:
-	ldr	r3, [r4]
-	ldr	r3, [r3]
-	str	r3, [sp, #4]
+	push	{r0, r1, r2, r4, r5, lr}
+	movs	r0, #1
+	ldr	r4, .L351
+	ldr	r5, .L351+4
+	bl	udelay
+.L348:
+	ldr	r3, [r5]
+	ldr	r3, [r3]
+	str	r3, [sp, #4]
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #22
-	bmi	.L371
-	movs	r0, #10
-	bl	timer_delay_ns
-	subs	r1, r1, #1
-	bne	.L370
+	bmi	.L349
+	movs	r0, #1
+	bl	udelay
+	subs	r4, r4, #1
+	bne	.L348
 	mov	r0, #-1
-.L368:
-	add	sp, sp, #8
+.L346:
+	add	sp, sp, #12
 	@ sp needed
-	pop	{r4, pc}
-.L371:
+	pop	{r4, r5, pc}
+.L349:
 	movs	r0, #0
-	b	.L368
-.L374:
+	b	.L346
+.L352:
 	.align	2
-.L373:
-	.word	.LANCHOR13
+.L351:
 	.word	100000
+	.word	.LANCHOR7
 	.size	nandc_wait_flash_ready, .-nandc_wait_flash_ready
 	.section	.text.sandisk_set_rr_para,"ax",%progbits
 	.align	1
@@ -1909,40 +1802,41 @@ sandisk_set_rr_para:
 	movs	r3, #239
 	str	r3, [r0, #8]
 	movs	r3, #17
-	mov	r4, r0
+	mov	r5, r0
+	mov	r4, r1
 	str	r3, [r0, #4]
-	movs	r0, #200
-	bl	timer_delay_ns
-	ldr	r3, .L381
-	add	r1, r1, r1, lsl #2
-	ldr	r6, .L381+4
+	movs	r0, #1
+	bl	udelay
+	ldr	r3, .L359
+	add	r4, r4, r4, lsl #2
+	ldr	r6, .L359+4
 	movs	r2, #0
-	ldr	r7, .L381+8
+	ldr	r7, .L359+8
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	ldr	r3, .L359+12
 	ldrb	r0, [r3]	@ zero_extendqisi2
-	ldr	r3, .L381+12
-	ldrb	r5, [r3]	@ zero_extendqisi2
-.L376:
-	cmp	r2, r0
-	bcc	.L379
+.L354:
+	cmp	r2, r1
+	bcc	.L357
 	pop	{r3, r4, r5, r6, r7, lr}
 	b	nandc_wait_flash_ready
-.L379:
-	adds	r3, r2, r1
-	cmp	r5, #67
+.L357:
+	adds	r3, r2, r4
+	cmp	r0, #67
 	ite	eq
 	addeq	r3, r3, r7
 	addne	r3, r3, r6
 	ldrsb	r3, [r3, #5]
 	adds	r2, r2, #1
-	str	r3, [r4]
-	b	.L376
-.L382:
+	str	r3, [r5]
+	b	.L354
+.L360:
 	.align	2
-.L381:
-	.word	.LANCHOR26
-	.word	.LANCHOR24
-	.word	.LANCHOR22
-	.word	.LANCHOR23
+.L359:
+	.word	.LANCHOR18
+	.word	.LANCHOR16
+	.word	.LANCHOR14
+	.word	.LANCHOR15
 	.size	sandisk_set_rr_para, .-sandisk_set_rr_para
 	.section	.text.toshiba_3d_set_tlc_rr_para,"ax",%progbits
 	.align	1
@@ -1965,7 +1859,7 @@ toshiba_3d_set_tlc_rr_para:
 	rsb	r1, r1, r1, lsl #3
 	str	r6, [r0, #4]
 	str	r3, [r0, #4]
-	ldr	r3, .L384
+	ldr	r3, .L362
 	adds	r5, r3, r1
 	ldrsb	r3, [r3, r1]
 	str	r3, [r0]
@@ -1989,10 +1883,10 @@ toshiba_3d_set_tlc_rr_para:
 	str	r6, [r4]
 	pop	{r3, r4, r5, r6, r7, lr}
 	b	nandc_wait_flash_ready
-.L385:
+.L363:
 	.align	2
-.L384:
-	.word	.LANCHOR38
+.L362:
+	.word	.LANCHOR37
 	.size	toshiba_3d_set_tlc_rr_para, .-toshiba_3d_set_tlc_rr_para
 	.section	.text.toshiba_3d_set_slc_rr_para,"ax",%progbits
 	.align	1
@@ -2012,7 +1906,7 @@ toshiba_3d_set_slc_rr_para:
 	movs	r3, #0
 	str	r3, [r0, #4]
 	str	r2, [r0, #4]
-	ldr	r2, .L387
+	ldr	r2, .L365
 	add	r1, r1, r2
 	ldrsb	r2, [r1, #1]
 	str	r2, [r0]
@@ -2020,10 +1914,10 @@ toshiba_3d_set_slc_rr_para:
 	str	r3, [r0]
 	str	r3, [r0]
 	b	nandc_wait_flash_ready
-.L388:
+.L366:
 	.align	2
-.L387:
-	.word	.LANCHOR39
+.L365:
+	.word	.LANCHOR38
 	.size	toshiba_3d_set_slc_rr_para, .-toshiba_3d_set_slc_rr_para
 	.section	.text.toshiba_tlc_set_rr_para,"ax",%progbits
 	.align	1
@@ -2040,11 +1934,11 @@ toshiba_tlc_set_rr_para:
 	movs	r6, #239
 	mov	r4, r0
 	str	r6, [r0, #8]
-	cbz	r2, .L390
+	cbz	r2, .L368
 	movs	r3, #18
 	rsb	r1, r1, r1, lsl #3
 	str	r3, [r0, #4]
-	ldr	r3, .L392
+	ldr	r3, .L370
 	adds	r5, r3, r1
 	ldrb	r3, [r3, r1]	@ zero_extendqisi2
 	str	r3, [r0]
@@ -2066,24 +1960,24 @@ toshiba_tlc_set_rr_para:
 	str	r3, [r4]
 	movs	r3, #0
 	str	r3, [r4]
-.L391:
+.L369:
 	pop	{r4, r5, r6, lr}
 	b	nandc_wait_flash_ready
-.L390:
+.L368:
 	movs	r3, #20
 	str	r3, [r0, #4]
-	ldr	r3, .L392+4
+	ldr	r3, .L370+4
 	ldrb	r3, [r3, r1]	@ zero_extendqisi2
 	str	r3, [r0]
 	str	r2, [r0]
 	str	r2, [r0]
 	str	r2, [r0]
-	b	.L391
-.L393:
+	b	.L369
+.L371:
 	.align	2
-.L392:
+.L370:
+	.word	.LANCHOR39
 	.word	.LANCHOR40
-	.word	.LANCHOR41
 	.size	toshiba_tlc_set_rr_para, .-toshiba_tlc_set_rr_para
 	.section	.text.ymtc_3d_set_tlc_rr_para,"ax",%progbits
 	.align	1
@@ -2104,7 +1998,7 @@ ymtc_3d_set_tlc_rr_para:
 	movs	r6, #0
 	str	r3, [r0, #4]
 	mov	r4, r0
-	ldr	r3, .L395
+	ldr	r3, .L373
 	adds	r5, r3, r1
 	ldrsb	r3, [r3, r1]
 	str	r3, [r0]
@@ -2135,10 +2029,10 @@ ymtc_3d_set_tlc_rr_para:
 	str	r6, [r4]
 	pop	{r3, r4, r5, r6, r7, lr}
 	b	nandc_wait_flash_ready
-.L396:
+.L374:
 	.align	2
-.L395:
-	.word	.LANCHOR42
+.L373:
+	.word	.LANCHOR41
 	.size	ymtc_3d_set_tlc_rr_para, .-ymtc_3d_set_tlc_rr_para
 	.section	.text.ymtc_3d_set_slc_rr_para,"ax",%progbits
 	.align	1
@@ -2156,7 +2050,7 @@ ymtc_3d_set_slc_rr_para:
 	str	r3, [r0, #8]
 	movs	r3, #163
 	str	r3, [r0, #4]
-	ldr	r3, .L398
+	ldr	r3, .L376
 	ldrsb	r3, [r3, r1]
 	str	r3, [r0]
 	movs	r3, #0
@@ -2164,10 +2058,10 @@ ymtc_3d_set_slc_rr_para:
 	str	r3, [r0]
 	str	r3, [r0]
 	b	nandc_wait_flash_ready
-.L399:
+.L377:
 	.align	2
-.L398:
-	.word	.LANCHOR43
+.L376:
+	.word	.LANCHOR42
 	.size	ymtc_3d_set_slc_rr_para, .-ymtc_3d_set_slc_rr_para
 	.section	.text.flash_erase_duplane_block,"ax",%progbits
 	.align	1
@@ -2182,45 +2076,45 @@ flash_erase_duplane_block:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r5, r2
-	ldr	r4, .L424
+	ldr	r4, .L402
 	mov	r7, r0
 	mov	r6, r1
 	mov	r10, r3
 	ldrb	r2, [r4]	@ zero_extendqisi2
 	cmp	r2, r0
-	bhi	.L401
-	mov	r2, #688
-	ldr	r1, .L424+4
-	ldr	r0, .L424+8
+	bhi	.L379
+	movw	r2, #695
+	ldr	r1, .L402+4
+	ldr	r0, .L402+8
 	bl	printf
-.L401:
+.L379:
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	cmp	r3, r7
-	bls	.L410
-	ldr	r3, .L424+12
+	bls	.L388
+	ldr	r3, .L402+12
 	ldrb	r4, [r3, r7]	@ zero_extendqisi2
-	ldr	r3, .L424+16
+	ldr	r3, .L402+16
 	add	r7, r4, #8
 	ldr	r8, [r3]
-	ldr	r3, .L424+20
+	ldr	r3, .L402+20
 	ldr	r3, [r3]
 	add	r7, r8, r7, lsl #8
 	lsls	r3, r3, #27
-	bpl	.L403
+	bpl	.L381
 	mov	r3, r10
 	mov	r2, r5
 	mov	r1, r4
-	ldr	r0, .L424+24
+	ldr	r0, .L402+24
 	bl	printf
-.L403:
+.L381:
 	bl	nandc_wait_flash_ready
 	mov	r0, r4
 	bl	nandc_cs
 	mov	r0, r4
 	cmp	r6, #0
-	bne	.L404
+	bne	.L382
 	bl	zftl_flash_enter_slc_mode
-.L405:
+.L383:
 	lsls	r4, r4, #8
 	movs	r3, #96
 	add	r6, r8, r4
@@ -2231,16 +2125,16 @@ flash_erase_duplane_block:
 	str	r3, [r6, #2052]
 	lsrs	r3, r5, #16
 	str	r3, [r6, #2052]
-	ldr	r3, .L424+28
+	ldr	r3, .L402+28
 	ldrb	r2, [r3]	@ zero_extendqisi2
-	cbz	r2, .L406
+	cbz	r2, .L384
 	lsrs	r2, r5, #24
 	str	r2, [r6, #2052]
-.L406:
-	ldr	r2, .L424+32
+.L384:
+	ldr	r2, .L402+32
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, #0
-	bne	.L411
+	bne	.L389
 	add	r2, r8, r4
 	movs	r1, #208
 	str	r1, [r2, #2056]
@@ -2250,7 +2144,7 @@ flash_erase_duplane_block:
 	bl	flash_read_status
 	ldr	r3, [sp, #4]
 	and	fp, r0, #5
-.L407:
+.L385:
 	add	r2, r8, r4
 	movs	r1, #96
 	str	r1, [r2, #2056]
@@ -2261,51 +2155,51 @@ flash_erase_duplane_block:
 	str	r2, [r6, #2052]
 	lsr	r2, r10, #16
 	str	r2, [r6, #2052]
-	cbz	r3, .L408
+	cbz	r3, .L386
 	lsr	r2, r10, #24
 	str	r2, [r6, #2052]
-.L408:
+.L386:
 	movs	r3, #208
 	add	r0, r8, r4
 	str	r3, [r0, #2056]
 	bl	nandc_wait_flash_ready
 	mov	r0, r7
 	bl	flash_read_status
-	bl	nandc_de_cs.constprop.33
+	bl	nandc_de_cs.constprop.32
 	and	r3, r0, #5
 	orrs	fp, r3, fp
-	beq	.L409
+	beq	.L387
 	mov	r2, r0
 	mov	r1, r5
-	ldr	r0, .L424+36
+	ldr	r0, .L402+36
 	bl	printf
-.L409:
+.L387:
 	mov	r0, fp
-.L400:
+.L378:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L404:
+.L382:
 	bl	zftl_flash_exit_slc_mode
-	b	.L405
-.L411:
+	b	.L383
+.L389:
 	mov	fp, #0
-	b	.L407
-.L410:
+	b	.L385
+.L388:
 	mov	r0, #-1
-	b	.L400
-.L425:
+	b	.L378
+.L403:
 	.align	2
-.L424:
-	.word	.LANCHOR18
-	.word	.LANCHOR44
+.L402:
+	.word	.LANCHOR23
+	.word	.LANCHOR43
 	.word	.LC0
-	.word	.LANCHOR30
-	.word	.LANCHOR13
-	.word	.LANCHOR14
+	.word	.LANCHOR29
+	.word	.LANCHOR7
+	.word	.LANCHOR19
 	.word	.LC31
-	.word	.LANCHOR31
-	.word	.LANCHOR45
+	.word	.LANCHOR30
+	.word	.LANCHOR44
 	.word	.LC32
 	.size	flash_erase_duplane_block, .-flash_erase_duplane_block
 	.section	.text.flash_erase_block_en,"ax",%progbits
@@ -2319,10 +2213,10 @@ flash_erase_duplane_block:
 flash_erase_block_en:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L444
+	ldr	r3, .L422
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r7, r2
-	ldr	r5, .L444+4
+	ldr	r5, .L422+4
 	mov	r6, r0
 	mov	fp, r1
 	ldrb	r4, [r3]	@ zero_extendqisi2
@@ -2333,39 +2227,39 @@ flash_erase_block_en:
 	ands	r4, r4, r2
 	ldrb	r2, [r5]	@ zero_extendqisi2
 	cmp	r2, r0
-	bhi	.L427
-	movw	r2, #750
-	ldr	r1, .L444+8
-	ldr	r0, .L444+12
+	bhi	.L405
+	movw	r2, #757
+	ldr	r1, .L422+8
+	ldr	r0, .L422+12
 	bl	printf
-.L427:
+.L405:
 	ldrb	r3, [r5]	@ zero_extendqisi2
 	cmp	r3, r6
-	bls	.L434
-	ldr	r3, .L444+16
+	bls	.L412
+	ldr	r3, .L422+16
 	ldrb	r5, [r3, r6]	@ zero_extendqisi2
-	ldr	r3, .L444+20
+	ldr	r3, .L422+20
 	add	r10, r5, #8
 	ldr	r8, [r3]
-	ldr	r3, .L444+24
+	ldr	r3, .L422+24
 	ldr	r3, [r3]
 	add	r10, r8, r10, lsl #8
 	lsls	r3, r3, #27
-	bpl	.L429
+	bpl	.L407
 	mov	r3, fp
 	mov	r2, r7
 	mov	r1, r5
-	ldr	r0, .L444+28
+	ldr	r0, .L422+28
 	bl	printf
-.L429:
+.L407:
 	bl	nandc_wait_flash_ready
 	mov	r0, r5
 	bl	nandc_cs
 	mov	r0, r5
 	cmp	fp, #0
-	bne	.L430
+	bne	.L408
 	bl	zftl_flash_enter_slc_mode
-.L431:
+.L409:
 	lsls	r5, r5, #8
 	movs	r2, #96
 	add	r3, r8, r5
@@ -2376,22 +2270,22 @@ flash_erase_block_en:
 	str	r2, [r3, #2052]
 	lsrs	r2, r4, #16
 	str	r2, [r3, #2052]
-	ldr	r2, .L444+32
+	ldr	r2, .L422+32
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbz	r2, .L432
+	cbz	r2, .L410
 	lsrs	r4, r4, #24
 	str	r4, [r3, #2052]
-.L432:
+.L410:
 	movs	r3, #208
 	add	r5, r5, r8
 	str	r3, [r5, #2056]
 	bl	nandc_wait_flash_ready
 	mov	r0, r10
 	bl	flash_read_status
-	bl	nandc_de_cs.constprop.33
+	bl	nandc_de_cs.constprop.32
 	ands	r4, r0, #5
-	beq	.L433
-	ldr	r3, .L444+36
+	beq	.L411
+	ldr	r3, .L422+36
 	mov	r0, r7
 	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
@@ -2399,29 +2293,29 @@ flash_erase_block_en:
 	mov	r4, #-1
 	mov	r2, r0
 	mov	r1, r6
-	ldr	r0, .L444+40
+	ldr	r0, .L422+40
 	bl	printf
-.L433:
+.L411:
 	mov	r0, r4
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L430:
+.L408:
 	bl	zftl_flash_exit_slc_mode
-	b	.L431
-.L434:
+	b	.L409
+.L412:
 	mov	r0, #-1
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L445:
+.L423:
 	.align	2
-.L444:
-	.word	.LANCHOR32
-	.word	.LANCHOR18
-	.word	.LANCHOR46
+.L422:
+	.word	.LANCHOR31
+	.word	.LANCHOR23
+	.word	.LANCHOR45
 	.word	.LC0
-	.word	.LANCHOR30
-	.word	.LANCHOR13
-	.word	.LANCHOR14
+	.word	.LANCHOR29
+	.word	.LANCHOR7
+	.word	.LANCHOR19
 	.word	.LC33
-	.word	.LANCHOR31
+	.word	.LANCHOR30
 	.word	.LANCHOR2
 	.word	.LC34
 	.size	flash_erase_block_en, .-flash_erase_block_en
@@ -2452,50 +2346,50 @@ flash_erase_block:
 flash_erase_all:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L452
+	ldr	r3, .L430
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r5, #0
-	ldr	r7, .L452+4
+	ldr	r7, .L430+4
 	ldrb	r4, [r3, #13]	@ zero_extendqisi2
 	ldrh	r3, [r3, #14]
 	smulbb	r4, r4, r3
 	uxth	r4, r4
-.L448:
-	ldr	r3, .L452+8
+.L426:
+	ldr	r3, .L430+8
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	uxth	r3, r5
 	cmp	r2, r3
-	bhi	.L451
+	bhi	.L429
 	movs	r1, #0
-	ldr	r0, .L452+12
+	ldr	r0, .L430+12
 	pop	{r4, r5, r6, r7, r8, lr}
 	b	printf
-.L451:
-	ldr	r2, .L452+16
+.L429:
+	ldr	r2, .L430+16
 	uxth	r3, r5
 	movs	r6, #0
 	ldrb	r8, [r2, r3]	@ zero_extendqisi2
-.L449:
+.L427:
 	uxth	r3, r6
 	cmp	r4, r3
-	bhi	.L450
+	bhi	.L428
 	adds	r5, r5, #1
-	b	.L448
-.L450:
+	b	.L426
+.L428:
 	ldrh	r1, [r7]
 	mov	r0, r8
 	muls	r1, r6, r1
 	adds	r6, r6, #1
 	bl	flash_erase_block
-	b	.L449
-.L453:
+	b	.L427
+.L431:
 	.align	2
-.L452:
-	.word	.LANCHOR33
+.L430:
+	.word	.LANCHOR32
 	.word	.LANCHOR2
-	.word	.LANCHOR18
+	.word	.LANCHOR23
 	.word	.LC35
-	.word	.LANCHOR30
+	.word	.LANCHOR29
 	.size	flash_erase_all, .-flash_erase_all
 	.section	.text.flash_start_plane_read,"ax",%progbits
 	.align	1
@@ -2508,7 +2402,7 @@ flash_erase_all:
 flash_start_plane_read:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L482
+	ldr	r3, .L460
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	ubfx	r10, r0, #24, #2
 	ldrb	r5, [r3]	@ zero_extendqisi2
@@ -2516,7 +2410,7 @@ flash_start_plane_read:
 	rsb	r2, r5, #24
 	lsl	r4, r3, r2
 	lsl	r5, r3, r5
-	ldr	r3, .L482+4
+	ldr	r3, .L460+4
 	lsr	r2, r0, r2
 	subs	r5, r5, #1
 	ands	r5, r5, r2
@@ -2526,40 +2420,40 @@ flash_start_plane_read:
 	and	r7, r4, r0
 	ands	r4, r4, r1
 	cmp	r3, r5
-	bhi	.L455
-	mov	r2, #1128
-	ldr	r1, .L482+8
-	ldr	r0, .L482+12
-	bl	printf
-.L455:
-	ldr	r3, .L482+16
-	ldr	fp, .L482+44
+	bhi	.L433
+	movw	r2, #1148
+	ldr	r1, .L460+8
+	ldr	r0, .L460+12
+	bl	printf
+.L433:
+	ldr	r3, .L460+16
+	ldr	fp, .L460+44
 	ldrb	r5, [r3, r5]	@ zero_extendqisi2
-	ldr	r3, .L482+20
+	ldr	r3, .L460+20
 	mov	r0, r5
 	ldr	r6, [r3]
 	lsl	r8, r5, #8
 	bl	nandc_cs
 	cmp	r10, #0
-	bne	.L456
+	bne	.L434
 	mov	r0, r7
 	bl	slc_phy_page_address_calc
 	mov	r7, r0
 	mov	r0, r4
 	bl	slc_phy_page_address_calc
-	ldr	r3, .L482+24
+	ldr	r3, .L460+24
 	mov	r4, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L457
+	cbz	r3, .L435
 	mov	r0, r5
 	bl	zftl_flash_enter_slc_mode
-.L457:
-	ldr	r2, .L482+28
+.L435:
+	ldr	r2, .L460+28
 	uxtb	ip, r7
 	lsrs	r0, r7, #8
 	ldrb	r3, [r2, #16]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L459
+	bne	.L437
 	ldrb	r3, [r2, #8]	@ zero_extendqisi2
 	add	r5, r6, r8
 	str	r3, [r5, #2056]
@@ -2570,12 +2464,12 @@ flash_start_plane_read:
 	str	ip, [r5, #2052]
 	str	r0, [r5, #2052]
 	str	r3, [r5, #2052]
-	ldr	r3, .L482+32
+	ldr	r3, .L460+32
 	ldrb	r1, [r3]	@ zero_extendqisi2
-	cbz	r1, .L460
+	cbz	r1, .L438
 	lsrs	r7, r7, #24
 	str	r7, [r5, #2052]
-.L460:
+.L438:
 	ldrb	r2, [r2, #9]	@ zero_extendqisi2
 	add	r7, r6, r8
 	str	r3, [sp, #4]
@@ -2585,11 +2479,11 @@ flash_start_plane_read:
 	ldr	r3, [sp, #4]
 	ldrb	r2, [r2, #12]	@ zero_extendqisi2
 	cmp	r2, #3
-	bne	.L461
+	bne	.L439
 	cmp	r10, #0
-	beq	.L461
+	beq	.L439
 	str	r10, [r7, #2056]
-.L461:
+.L439:
 	movs	r2, #0
 	add	r1, r6, r8
 	str	r2, [r1, #2056]
@@ -2602,48 +2496,47 @@ flash_start_plane_read:
 	str	r2, [r5, #2052]
 	lsrs	r2, r4, #16
 	str	r2, [r5, #2052]
-	cbz	r3, .L462
+	cbz	r3, .L440
 	lsrs	r4, r4, #24
 	str	r4, [r5, #2052]
-.L462:
+.L440:
 	add	r6, r6, r8
-.L481:
+.L459:
 	movs	r3, #48
 	str	r3, [r6, #2056]
 	add	sp, sp, #8
 	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
-	b	nandc_de_cs.constprop.33
-.L456:
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L434:
 	ldr	r3, [fp]
 	ldrb	r3, [r3, #12]	@ zero_extendqisi2
 	cmp	r3, #3
-	bne	.L458
-	ldr	r3, .L482+36
+	bne	.L436
+	ldr	r3, .L460+36
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L458
-	ldr	r3, .L482+40
+	cbnz	r3, .L436
+	ldr	r3, .L460+40
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L458
+	cbnz	r3, .L436
 	add	r3, r6, r8
 	str	r10, [r3, #2056]
-	b	.L457
-.L458:
+	b	.L435
+.L436:
 	mov	r0, r5
 	bl	zftl_flash_exit_slc_mode
-	b	.L457
-.L459:
+	b	.L435
+.L437:
 	ldr	r1, [fp]
 	ldrb	r3, [r1, #7]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L464
+	bne	.L442
 	ldrb	r3, [r1, #12]	@ zero_extendqisi2
 	cmp	r3, #2
 	ittt	eq
 	addeq	r3, r6, r8
 	moveq	r5, #38
 	streq	r5, [r3, #2056]
-.L464:
+.L442:
 	ldrb	r5, [r2, #8]	@ zero_extendqisi2
 	lsrs	r7, r7, #16
 	add	r3, r6, r8
@@ -2653,11 +2546,11 @@ flash_start_plane_read:
 	str	r7, [r3, #2052]
 	ldrb	r1, [r1, #12]	@ zero_extendqisi2
 	cmp	r1, #3
-	bne	.L465
+	bne	.L443
 	cmp	r10, #0
-	beq	.L465
+	beq	.L443
 	str	r10, [r3, #2056]
-.L465:
+.L443:
 	ldrb	r2, [r2, #9]	@ zero_extendqisi2
 	add	r6, r6, r8
 	str	r2, [r6, #2056]
@@ -2667,22 +2560,22 @@ flash_start_plane_read:
 	lsrs	r4, r4, #16
 	str	r2, [r3, #2052]
 	str	r4, [r3, #2052]
-	b	.L481
-.L483:
+	b	.L459
+.L461:
 	.align	2
-.L482:
-	.word	.LANCHOR32
-	.word	.LANCHOR18
-	.word	.LANCHOR47
+.L460:
+	.word	.LANCHOR31
+	.word	.LANCHOR23
+	.word	.LANCHOR46
 	.word	.LC0
-	.word	.LANCHOR30
-	.word	.LANCHOR13
+	.word	.LANCHOR29
+	.word	.LANCHOR7
 	.word	.LANCHOR0
-	.word	.LANCHOR20
-	.word	.LANCHOR31
+	.word	.LANCHOR25
+	.word	.LANCHOR30
+	.word	.LANCHOR35
 	.word	.LANCHOR36
-	.word	.LANCHOR37
-	.word	.LANCHOR16
+	.word	.LANCHOR21
 	.size	flash_start_plane_read, .-flash_start_plane_read
 	.section	.text.flash_set_interface_mode,"ax",%progbits
 	.align	1
@@ -2697,102 +2590,102 @@ flash_set_interface_mode:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
 	mov	r6, r0
-	ldr	r7, .L528
+	ldr	r7, .L506
 	mov	r10, #0
-	ldr	r8, .L528+24
-.L498:
+	ldr	r8, .L506+24
+.L476:
 	ldrb	r5, [r7, r10, lsl #3]	@ zero_extendqisi2
 	cmp	r5, #69
-	beq	.L485
+	beq	.L463
 	cmp	r5, #44
-	beq	.L485
+	beq	.L463
 	add	r3, r5, #119
 	uxtb	r3, r3
 	cmp	r3, #18
-	bhi	.L486
-	ldr	r2, .L528+4
+	bhi	.L464
+	ldr	r2, .L506+4
 	lsr	r3, r2, r3
 	lsls	r2, r3, #31
-	bpl	.L486
-.L485:
-	ldr	r3, .L528+8
+	bpl	.L464
+.L463:
+	ldr	r3, .L506+8
 	cmp	r6, #1
 	ldr	r4, [r8]
 	ldrb	r1, [r3]	@ zero_extendqisi2
-	bne	.L487
+	bne	.L465
 	lsls	r3, r1, #31
-	bpl	.L486
-	ldr	r3, .L528+12
+	bpl	.L464
+	ldr	r3, .L506+12
 	ldr	r3, [r3]
 	lsls	r0, r3, #19
-	bpl	.L488
-	ldr	r0, .L528+16
+	bpl	.L466
+	ldr	r0, .L506+16
 	bl	printf
-.L488:
+.L466:
 	lsl	r3, r10, #8
 	cmp	r5, #44
 	mov	r1, #239
 	add	r2, r4, r3
 	str	r1, [r2, #2056]
-	beq	.L489
+	beq	.L467
 	cmp	r5, #137
-	bne	.L490
-.L489:
+	bne	.L468
+.L467:
 	adds	r2, r4, r3
-.L527:
+.L505:
 	movs	r1, #1
 	str	r1, [r2, #2052]
 	movs	r1, #5
-.L524:
+.L502:
 	add	r4, r4, r3
 	str	r1, [r2, #2048]
-.L526:
+.L504:
 	movs	r3, #0
 	str	r3, [r4, #2048]
 	str	r3, [r4, #2048]
 	str	r3, [r4, #2048]
-.L486:
+.L464:
 	add	r10, r10, #1
 	cmp	r10, #4
-	bne	.L498
+	bne	.L476
 	bl	nandc_wait_flash_ready
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L490:
+.L468:
 	cmp	r5, #155
-	beq	.L527
+	beq	.L505
 	movs	r1, #128
 	str	r1, [r2, #2052]
 	movs	r1, #1
-	b	.L524
-.L487:
+	b	.L502
+.L465:
 	lsls	r2, r1, #29
-	bpl	.L486
-	ldr	r3, .L528+12
+	bpl	.L464
+	ldr	r3, .L506+12
 	ldr	r3, [r3]
 	lsls	r3, r3, #19
-	bpl	.L493
-	ldr	r0, .L528+20
+	bpl	.L471
+	ldr	r0, .L506+20
 	bl	printf
-.L493:
+.L471:
 	lsl	r2, r10, #8
 	cmp	r5, #44
 	mov	r1, #239
 	add	r3, r4, r2
 	str	r1, [r3, #2056]
-	beq	.L494
+	beq	.L472
 	cmp	r5, #137
-	bne	.L495
-.L494:
+	bne	.L473
+.L472:
 	movs	r1, #1
 	adds	r3, r4, r2
 	str	r1, [r3, #2052]
 	movs	r1, #35
-.L525:
+.L503:
 	str	r1, [r3, #2048]
 	add	r4, r4, r2
-	b	.L526
-.L495:
+	b	.L504
+.L473:
 	cmp	r5, #155
 	itett	eq
 	moveq	r1, #1
@@ -2802,17 +2695,17 @@ flash_set_interface_mode:
 	itt	ne
 	strne	r1, [r3, #2052]
 	movne	r1, #0
-	b	.L525
-.L529:
+	b	.L503
+.L507:
 	.align	2
-.L528:
-	.word	.LANCHOR48
+.L506:
+	.word	.LANCHOR47
 	.word	294913
-	.word	.LANCHOR49
-	.word	.LANCHOR14
+	.word	.LANCHOR48
+	.word	.LANCHOR19
 	.word	.LC36
 	.word	.LC37
-	.word	.LANCHOR13
+	.word	.LANCHOR7
 	.size	flash_set_interface_mode, .-flash_set_interface_mode
 	.section	.text.mt_auto_read_calibration_config,"ax",%progbits
 	.align	1
@@ -2828,25 +2721,25 @@ mt_auto_read_calibration_config:
 	mov	r5, r1
 	mov	r6, r0
 	bl	nandc_wait_flash_ready
-	ldr	r3, .L531
-	movs	r0, #200
+	ldr	r3, .L509
+	movs	r0, #1
 	ldr	r4, [r3]
 	movs	r3, #239
 	add	r4, r4, r6, lsl #8
 	str	r3, [r4, #2056]
 	movs	r3, #150
 	str	r3, [r4, #2052]
-	bl	timer_delay_ns
+	bl	udelay
 	movs	r3, #0
 	str	r5, [r4, #2048]
 	str	r3, [r4, #2048]
 	str	r3, [r4, #2048]
 	str	r3, [r4, #2048]
 	pop	{r4, r5, r6, pc}
-.L532:
+.L510:
 	.align	2
-.L531:
-	.word	.LANCHOR13
+.L509:
+	.word	.LANCHOR7
 	.size	mt_auto_read_calibration_config, .-mt_auto_read_calibration_config
 	.section	.text.flash_reset,"ax",%progbits
 	.align	1
@@ -2860,16 +2753,16 @@ flash_reset:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L534
+	ldr	r3, .L512
 	ldr	r3, [r3]
 	add	r0, r3, r0, lsl #8
 	movs	r3, #255
 	str	r3, [r0, #2056]
 	b	nandc_wait_flash_ready
-.L535:
+.L513:
 	.align	2
-.L534:
-	.word	.LANCHOR13
+.L512:
+	.word	.LANCHOR7
 	.size	flash_reset, .-flash_reset
 	.section	.text.flash_read_id,"ax",%progbits
 	.align	1
@@ -2883,45 +2776,45 @@ flash_read_id:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, lr}
-	mov	r5, r0
-	ldr	r3, .L538
+	mov	r6, r0
+	ldr	r3, .L516
 	mov	r4, r1
-	ldr	r6, [r3]
+	ldr	r5, [r3]
 	bl	flash_reset
-	mov	r0, r5
+	mov	r0, r6
 	bl	nandc_cs
-	add	r6, r6, r5, lsl #8
+	add	r5, r5, r6, lsl #8
 	movs	r3, #144
-	movs	r0, #200
-	str	r3, [r6, #2056]
+	movs	r0, #1
+	str	r3, [r5, #2056]
 	movs	r3, #0
-	str	r3, [r6, #2052]
-	bl	timer_delay_ns
-	ldr	r3, [r6, #2048]
+	str	r3, [r5, #2052]
+	bl	udelay
+	ldr	r3, [r5, #2048]
 	strb	r3, [r4]
-	ldr	r3, [r6, #2048]
+	ldr	r3, [r5, #2048]
 	strb	r3, [r4, #1]
-	ldr	r3, [r6, #2048]
+	ldr	r3, [r5, #2048]
 	strb	r3, [r4, #2]
-	ldr	r3, [r6, #2048]
+	ldr	r3, [r5, #2048]
 	strb	r3, [r4, #3]
-	ldr	r3, [r6, #2048]
+	ldr	r3, [r5, #2048]
 	strb	r3, [r4, #4]
-	ldr	r3, [r6, #2048]
+	ldr	r3, [r5, #2048]
 	strb	r3, [r4, #5]
-	ldr	r3, [r6, #2048]
+	ldr	r3, [r5, #2048]
 	strb	r3, [r4, #6]
-	ldr	r3, [r6, #2048]
+	ldr	r3, [r5, #2048]
 	strb	r3, [r4, #7]
-	bl	nandc_de_cs.constprop.33
+	bl	nandc_de_cs.constprop.32
 	ldrb	r2, [r4]	@ zero_extendqisi2
 	subs	r3, r2, #1
 	uxtb	r3, r3
 	cmp	r3, #253
-	bhi	.L536
+	bhi	.L514
 	ldrb	r1, [r4, #5]	@ zero_extendqisi2
 	ldrb	r3, [r4, #1]	@ zero_extendqisi2
-	ldr	r0, .L538+4
+	ldr	r0, .L516+4
 	str	r1, [sp, #12]
 	ldrb	r1, [r4, #4]	@ zero_extendqisi2
 	str	r1, [sp, #8]
@@ -2929,16 +2822,16 @@ flash_read_id:
 	str	r1, [sp, #4]
 	ldrb	r1, [r4, #2]	@ zero_extendqisi2
 	str	r1, [sp]
-	adds	r1, r5, #1
+	adds	r1, r6, #1
 	bl	printf
-.L536:
+.L514:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, pc}
-.L539:
+.L517:
 	.align	2
-.L538:
-	.word	.LANCHOR13
+.L516:
+	.word	.LANCHOR7
 	.word	.LC38
 	.size	flash_read_id, .-flash_read_id
 	.section	.text.flash_read_spare,"ax",%progbits
@@ -2954,8 +2847,8 @@ flash_read_spare:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	mov	r5, r2
-	ldr	r3, .L541
-	ldr	r2, .L541+4
+	ldr	r3, .L519
+	ldr	r2, .L519+4
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
 	ldr	r4, [r2]
 	movs	r2, #0
@@ -2977,11 +2870,11 @@ flash_read_spare:
 	ldr	r3, [r4, #2048]
 	strb	r3, [r5]
 	pop	{r3, r4, r5, pc}
-.L542:
+.L520:
 	.align	2
-.L541:
-	.word	.LANCHOR33
-	.word	.LANCHOR13
+.L519:
+	.word	.LANCHOR32
+	.word	.LANCHOR7
 	.size	flash_read_spare, .-flash_read_spare
 	.section	.text.flash_read_otp_data,"ax",%progbits
 	.align	1
@@ -2994,7 +2887,7 @@ flash_read_spare:
 flash_read_otp_data:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L546
+	ldr	r3, .L524
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r8, r0
 	lsl	r8, r8, #8
@@ -3004,12 +2897,12 @@ flash_read_otp_data:
 	mov	fp, #144
 	bl	nandc_cs
 	movs	r3, #239
-	movs	r0, #50
+	movs	r0, #1
 	add	r4, r7, r8
 	mov	r10, #0
 	str	r3, [r4, #2056]
 	str	fp, [r4, #2052]
-	bl	timer_delay_ns
+	bl	udelay
 	movs	r3, #1
 	str	r3, [r4, #2048]
 	str	r10, [r4, #2048]
@@ -3017,7 +2910,7 @@ flash_read_otp_data:
 	str	r10, [r4, #2048]
 	bl	nandc_wait_flash_ready
 	movs	r3, #238
-	ldr	r0, .L546+4
+	ldr	r0, .L524+4
 	str	r3, [r4, #2056]
 	str	fp, [r4, #2052]
 	ldr	r2, [r4, #2048]
@@ -3041,18 +2934,18 @@ flash_read_otp_data:
 	bl	nandc_wait_flash_ready
 	add	r3, r5, #16384
 	mov	r2, r5
-.L544:
+.L522:
 	ldr	r1, [r4, #2048]
 	strb	r1, [r2], #1
 	cmp	r2, r3
-	bne	.L544
+	bne	.L522
 	add	r7, r7, r8
 	movs	r3, #239
 	str	r3, [r7, #2056]
 	movs	r3, #144
 	str	r3, [r4, #2052]
-	movs	r0, #50
-	bl	timer_delay_ns
+	movs	r0, #1
+	bl	udelay
 	movs	r3, #0
 	str	r3, [r4, #2048]
 	str	r3, [r4, #2048]
@@ -3061,11 +2954,11 @@ flash_read_otp_data:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
-	b	nandc_de_cs.constprop.33
-.L547:
+	b	nandc_de_cs.constprop.32
+.L525:
 	.align	2
-.L546:
-	.word	.LANCHOR13
+.L524:
+	.word	.LANCHOR7
 	.word	.LC39
 	.size	flash_read_otp_data, .-flash_read_otp_data
 	.section	.text.sandisk_prog_test_bad_block,"ax",%progbits
@@ -3081,15 +2974,16 @@ sandisk_prog_test_bad_block:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	mov	r8, r1
-	ldr	r3, .L562
+	ldr	r3, .L541
 	lsls	r6, r0, #8
-	ldr	r7, .L562+4
+	ldr	r7, .L541+4
 	ldr	r5, [r3]
 	ldrb	r3, [r7, #29]	@ zero_extendqisi2
-	cbz	r3, .L549
+	cmp	r3, #0
+	beq	.L527
 	adds	r2, r5, r6
 	str	r3, [r2, #2056]
-.L550:
+.L528:
 	adds	r4, r5, r6
 	movs	r3, #128
 	str	r3, [r4, #2056]
@@ -3106,38 +3000,41 @@ sandisk_prog_test_bad_block:
 	str	r3, [r4, #2056]
 	bl	nandc_wait_flash_ready
 	movs	r3, #112
-	movs	r0, #80
+	movs	r0, #1
 	str	r3, [r4, #2056]
-	bl	timer_delay_ns
+	bl	udelay
 	ldr	r2, [r4, #2048]
+	cmp	r2, #255
+	it	eq
+	ldreq	r2, [r4, #2048]
 	ands	r4, r2, #5
-	beq	.L551
-	ldr	r3, .L562+8
+	beq	.L530
+	ldr	r3, .L541+8
 	ldr	r3, [r3]
 	lsls	r3, r3, #19
-	bpl	.L551
+	bpl	.L530
 	mov	r1, r8
-	ldr	r0, .L562+12
+	ldr	r0, .L541+12
 	bl	printf
-.L551:
+.L530:
 	ldrb	r3, [r7, #30]	@ zero_extendqisi2
-	cbz	r3, .L548
+	cbz	r3, .L526
 	add	r5, r5, r6
 	str	r3, [r5, #2056]
-.L548:
+.L526:
 	mov	r0, r4
 	pop	{r4, r5, r6, r7, r8, pc}
-.L549:
+.L527:
 	adds	r3, r5, r6
 	movs	r2, #162
 	str	r2, [r3, #2056]
-	b	.L550
-.L563:
+	b	.L528
+.L542:
 	.align	2
-.L562:
-	.word	.LANCHOR13
-	.word	.LANCHOR33
-	.word	.LANCHOR14
+.L541:
+	.word	.LANCHOR7
+	.word	.LANCHOR32
+	.word	.LANCHOR19
 	.word	.LC40
 	.size	sandisk_prog_test_bad_block, .-sandisk_prog_test_bad_block
 	.section	.text.nandc_rdy_status,"ax",%progbits
@@ -3152,7 +3049,7 @@ nandc_rdy_status:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L565
+	ldr	r3, .L544
 	sub	sp, sp, #8
 	ldr	r3, [r3]
 	ldr	r3, [r3]
@@ -3162,10 +3059,10 @@ nandc_rdy_status:
 	add	sp, sp, #8
 	@ sp needed
 	bx	lr
-.L566:
+.L545:
 	.align	2
-.L565:
-	.word	.LANCHOR13
+.L544:
+	.word	.LANCHOR7
 	.size	nandc_rdy_status, .-nandc_rdy_status
 	.section	.text.nandc_bch_sel,"ax",%progbits
 	.align	1
@@ -3184,25 +3081,25 @@ nandc_bch_sel:
 	ldr	r2, [sp, #4]
 	orr	r2, r2, #1
 	str	r2, [sp, #4]
-	ldr	r2, .L578
+	ldr	r2, .L557
 	strb	r0, [r2]
-	ldr	r2, .L578+4
+	ldr	r2, .L557+4
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, #9
-	ldr	r2, .L578+8
-	bne	.L568
+	ldr	r2, .L557+8
+	bne	.L547
 	ldr	r2, [r2]
 	cmp	r0, #70
 	ldr	r1, [sp, #4]
 	str	r1, [r2, #16]
-	beq	.L569
+	beq	.L548
 	cmp	r0, #60
-	beq	.L575
+	beq	.L554
 	cmp	r0, #40
 	ite	eq
 	moveq	r3, #2
 	movne	r3, #1
-.L569:
+.L548:
 	movs	r1, #0
 	str	r1, [sp]
 	ldr	r1, [sp]
@@ -3213,14 +3110,14 @@ nandc_bch_sel:
 	str	r3, [sp]
 	ldr	r3, [sp]
 	str	r3, [r2, #32]
-.L567:
+.L546:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, pc}
-.L575:
+.L554:
 	movs	r3, #3
-	b	.L569
-.L568:
+	b	.L548
+.L547:
 	ldr	r1, [r2]
 	movs	r4, #16
 	ldr	r2, [sp, #4]
@@ -3233,26 +3130,26 @@ nandc_bch_sel:
 	ldr	r2, [sp]
 	bfi	r2, r3, #18, #1
 	str	r2, [sp]
-	bne	.L571
-.L577:
+	bne	.L550
+.L556:
 	ldr	r2, [sp]
 	bfi	r2, r3, #4, #1
 	str	r2, [sp]
-	b	.L572
-.L571:
+	b	.L551
+.L550:
 	cmp	r0, #24
-	bne	.L573
+	bne	.L552
 	ldr	r3, [sp]
 	orr	r3, r3, #16
 	str	r3, [sp]
-.L572:
+.L551:
 	ldr	r3, [sp]
 	orr	r3, r3, #1
 	str	r3, [sp]
 	ldr	r3, [sp]
 	str	r3, [r1, #12]
-	b	.L567
-.L573:
+	b	.L546
+.L552:
 	ldr	r2, [sp]
 	cmp	r0, #40
 	orr	r2, r2, #262144
@@ -3260,14 +3157,14 @@ nandc_bch_sel:
 	ldr	r2, [sp]
 	orr	r2, r2, #16
 	str	r2, [sp]
-	bne	.L572
-	b	.L577
-.L579:
+	bne	.L551
+	b	.L556
+.L558:
 	.align	2
-.L578:
-	.word	.LANCHOR50
-	.word	.LANCHOR28
-	.word	.LANCHOR13
+.L557:
+	.word	.LANCHOR49
+	.word	.LANCHOR27
+	.word	.LANCHOR7
 	.size	nandc_bch_sel, .-nandc_bch_sel
 	.section	.text.zftl_nandc_get_irq_status,"ax",%progbits
 	.align	1
@@ -3281,17 +3178,17 @@ zftl_nandc_get_irq_status:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L583
+	ldr	r3, .L562
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #9
 	ite	eq
 	ldreq	r0, [r0, #296]
 	ldrne	r0, [r0, #372]
 	bx	lr
-.L584:
+.L563:
 	.align	2
-.L583:
-	.word	.LANCHOR28
+.L562:
+	.word	.LANCHOR27
 	.size	zftl_nandc_get_irq_status, .-zftl_nandc_get_irq_status
 	.section	.text.rk_nandc_flash_ready,"ax",%progbits
 	.align	1
@@ -3348,14 +3245,14 @@ nandc_xfer_start:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r5, r0
-	ldr	r0, .L604
+	ldr	r0, .L583
 	and	lr, r5, #1
-	ldr	r4, .L604+4
+	ldr	r4, .L583+4
 	ldrb	r0, [r0]	@ zero_extendqisi2
-	ldr	r7, .L604+8
+	ldr	r7, .L583+8
 	cmp	r0, #9
 	add	r0, r1, #1
-	bne	.L589
+	bne	.L568
 	movs	r6, #0
 	mov	ip, #1
 	str	r6, [sp, #4]
@@ -3384,16 +3281,16 @@ nandc_xfer_start:
 	ldr	r1, [sp, #4]
 	orr	r1, r1, #128
 	str	r1, [sp, #4]
-	ldr	r1, .L604+12
+	ldr	r1, .L583+12
 	ldrb	r1, [r1]	@ zero_extendqisi2
-	cbz	r1, .L590
-	ldr	r1, .L604+16
+	cbz	r1, .L569
+	ldr	r1, .L583+16
 	ldrb	r1, [r1]	@ zero_extendqisi2
-	cbz	r1, .L590
+	cbz	r1, .L569
 	ldr	r1, [sp, #4]
 	orr	r1, r1, #512
 	str	r1, [sp, #4]
-.L590:
+.L569:
 	ldr	r1, [sp, #4]
 	bic	r0, r2, #63
 	str	r3, [r4, #8]
@@ -3442,7 +3339,7 @@ nandc_xfer_start:
 	ldr	r2, [sp, #8]
 	orr	r2, r2, #1
 	str	r2, [sp, #8]
-	ldr	r2, .L604+20
+	ldr	r2, .L583+20
 	ldrh	r1, [r2]
 	ldr	r2, [sp, #8]
 	bfi	r2, r1, #16, #11
@@ -3456,11 +3353,11 @@ nandc_xfer_start:
 	str	r2, [sp, #4]
 	ldr	r2, [sp, #4]
 	str	r2, [r3, #16]
-.L588:
+.L567:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L589:
+.L568:
 	ldr	r6, [r7]
 	mov	ip, #16
 	ubfx	r0, r0, #1, #6
@@ -3500,8 +3397,8 @@ nandc_xfer_start:
 	bfi	ip, r0, #22, #6
 	str	ip, [sp, #4]
 	cmp	r5, #0
-	beq	.L592
-	ldr	r0, .L604+24
+	beq	.L571
+	ldr	r0, .L583+24
 	lsrs	r1, r1, #1
 	ldr	r8, [r4]
 	ldrb	r0, [r0]	@ zero_extendqisi2
@@ -3510,12 +3407,12 @@ nandc_xfer_start:
 	ite	cc
 	movcc	lr, #64
 	movcs	lr, #128
-.L594:
+.L573:
 	cmp	r0, r1
 	add	fp, r3, r0, lsl #2
 	add	r10, lr, r6
-	blt	.L595
-.L596:
+	blt	.L574
+.L575:
 	ldr	r3, [r4]
 	bic	r0, r2, #63
 	ldr	r1, [sp, #4]
@@ -3578,8 +3475,8 @@ nandc_xfer_start:
 	str	r2, [sp, #4]
 	ldr	r2, [sp, #4]
 	str	r2, [r3, #8]
-	b	.L588
-.L595:
+	b	.L567
+.L574:
 	ldrh	ip, [r3, r0, lsl #2]
 	bic	r6, r6, #3
 	ldrh	fp, [fp, #2]
@@ -3587,21 +3484,21 @@ nandc_xfer_start:
 	orr	ip, ip, fp, lsl #16
 	str	ip, [r8, r6]
 	mov	r6, r10
-	b	.L594
-.L592:
+	b	.L573
+.L571:
 	ldr	r3, [r4]
 	str	lr, [r3]
-	b	.L596
-.L605:
+	b	.L575
+.L584:
 	.align	2
-.L604:
-	.word	.LANCHOR28
-	.word	.LANCHOR53
-	.word	.LANCHOR13
-	.word	.LANCHOR51
+.L583:
+	.word	.LANCHOR27
 	.word	.LANCHOR52
-	.word	.LANCHOR54
+	.word	.LANCHOR7
 	.word	.LANCHOR50
+	.word	.LANCHOR51
+	.word	.LANCHOR53
+	.word	.LANCHOR49
 	.size	nandc_xfer_start, .-nandc_xfer_start
 	.section	.text.nandc_set_seed,"ax",%progbits
 	.align	1
@@ -3615,30 +3512,30 @@ nandc_set_seed:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L613
+	ldr	r2, .L592
 	and	r0, r0, #127
-	ldr	r3, .L613+4
+	ldr	r3, .L592+4
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r2, .L607
+	cbz	r2, .L586
 	orr	r3, r3, #-1073741824
-.L607:
-	ldr	r2, .L613+8
+.L586:
+	ldr	r2, .L592+8
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, #9
-	ldr	r2, .L613+12
+	ldr	r2, .L592+12
 	ldr	r2, [r2]
 	ite	eq
 	streq	r3, [r2, #520]
 	strne	r3, [r2, #336]
 	bx	lr
-.L614:
+.L593:
 	.align	2
-.L613:
-	.word	.LANCHOR52
-	.word	.LANCHOR55
-	.word	.LANCHOR28
-	.word	.LANCHOR13
+.L592:
+	.word	.LANCHOR51
+	.word	.LANCHOR54
+	.word	.LANCHOR27
+	.word	.LANCHOR7
 	.size	nandc_set_seed, .-nandc_set_seed
 	.section	.text.zftl_flash_de_init,"ax",%progbits
 	.align	1
@@ -3653,54 +3550,54 @@ zftl_flash_de_init:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
 	bl	nandc_wait_flash_ready
-	ldr	r3, .L634
+	ldr	r3, .L613
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L616
-	ldr	r3, .L634+4
+	cbz	r3, .L595
+	ldr	r3, .L613+4
 	ldrb	r0, [r3]	@ zero_extendqisi2
-	cbnz	r0, .L616
-	ldr	r3, .L634+8
+	cbnz	r0, .L595
+	ldr	r3, .L613+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #9
-	beq	.L616
+	beq	.L595
 	bl	zftl_flash_exit_slc_mode
-.L616:
-	ldr	r4, .L634+12
+.L595:
+	ldr	r4, .L613+12
 	movs	r0, #0
 	bl	hynix_reconfig_rr_para
 	ldrb	r3, [r4]	@ zero_extendqisi2
-	cbz	r3, .L617
-	ldr	r3, .L634+16
+	cbz	r3, .L596
+	ldr	r3, .L613+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	lsls	r3, r3, #31
-	bpl	.L617
+	bpl	.L596
 	movs	r0, #1
 	bl	flash_set_interface_mode
 	movs	r0, #1
 	bl	nandc_set_if_mode
 	movs	r3, #0
 	strb	r3, [r4]
-.L617:
-	ldr	r1, .L634+20
+.L596:
+	ldr	r1, .L613+20
 	ldrb	r3, [r1]	@ zero_extendqisi2
-	cbz	r3, .L618
+	cbz	r3, .L597
 	movs	r0, #0
 	strb	r0, [r1]
 	bl	nandc_set_seed
 	movs	r3, #1
 	strb	r3, [r1]
-.L618:
+.L597:
 	movs	r0, #0
 	pop	{r4, pc}
-.L635:
+.L614:
 	.align	2
-.L634:
+.L613:
 	.word	.LANCHOR0
-	.word	.LANCHOR19
-	.word	.LANCHOR28
-	.word	.LANCHOR21
-	.word	.LANCHOR49
-	.word	.LANCHOR52
+	.word	.LANCHOR24
+	.word	.LANCHOR27
+	.word	.LANCHOR26
+	.word	.LANCHOR48
+	.word	.LANCHOR51
 	.size	zftl_flash_de_init, .-zftl_flash_de_init
 	.section	.text.nandc_randomizer_enable,"ax",%progbits
 	.align	1
@@ -3714,13 +3611,13 @@ nandc_randomizer_enable:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L637
+	ldr	r3, .L616
 	strb	r0, [r3]
 	bx	lr
-.L638:
+.L617:
 	.align	2
-.L637:
-	.word	.LANCHOR52
+.L616:
+	.word	.LANCHOR51
 	.size	nandc_randomizer_enable, .-nandc_randomizer_enable
 	.section	.text.nandc_get_chip_if,"ax",%progbits
 	.align	1
@@ -3734,15 +3631,15 @@ nandc_get_chip_if:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L640
+	ldr	r3, .L619
 	adds	r0, r0, #8
 	ldr	r3, [r3]
 	add	r0, r3, r0, lsl #8
 	bx	lr
-.L641:
+.L620:
 	.align	2
-.L640:
-	.word	.LANCHOR13
+.L619:
+	.word	.LANCHOR7
 	.size	nandc_get_chip_if, .-nandc_get_chip_if
 	.section	.text.buf_reinit,"ax",%progbits
 	.align	1
@@ -3755,12 +3652,12 @@ nandc_get_chip_if:
 buf_reinit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L645
+	ldr	r3, .L624
 	movs	r2, #0
 	push	{r4, r5, lr}
 	mov	r1, r2
 	mov	r4, r3
-.L643:
+.L622:
 	uxtb	r0, r2
 	adds	r2, r2, #1
 	cmp	r2, #32
@@ -3770,20 +3667,20 @@ buf_reinit:
 	strb	r5, [r3]
 	add	r3, r3, #48
 	str	r1, [r3, #-40]
-	bne	.L643
+	bne	.L622
 	movs	r3, #255
 	strb	r3, [r4, #1488]
-	ldr	r3, .L645+4
+	ldr	r3, .L624+4
 	strb	r1, [r3]
-	ldr	r3, .L645+8
+	ldr	r3, .L624+8
 	strb	r2, [r3]
 	pop	{r4, r5, pc}
-.L646:
+.L625:
 	.align	2
-.L645:
+.L624:
+	.word	.LANCHOR55
 	.word	.LANCHOR56
 	.word	.LANCHOR57
-	.word	.LANCHOR58
 	.size	buf_reinit, .-buf_reinit
 	.section	.text.buf_add_tail,"ax",%progbits
 	.align	1
@@ -3803,47 +3700,47 @@ buf_add_tail:
 	mov	r4, r1
 	ldrb	r3, [r0]	@ zero_extendqisi2
 	cmp	r3, #255
-	bne	.L648
+	bne	.L627
 	ldrb	r3, [r1, #1]	@ zero_extendqisi2
 	cmp	r3, #255
-	bne	.L649
+	bne	.L628
 	movs	r2, #74
-	ldr	r1, .L654
-	ldr	r0, .L654+4
+	ldr	r1, .L633
+	ldr	r0, .L633+4
 	bl	printf
-.L649:
+.L628:
 	ldrb	r3, [r4, #1]	@ zero_extendqisi2
 	strb	r3, [r5]
 	pop	{r4, r5, r6, pc}
-.L648:
-	ldr	r2, .L654+8
+.L627:
+	ldr	r2, .L633+8
 	movs	r1, #48
 	mov	r6, r2
-.L653:
+.L632:
 	mov	r5, r3
 	muls	r3, r1, r3
 	ldrb	r3, [r2, r3]	@ zero_extendqisi2
 	cmp	r3, #255
-	bne	.L653
+	bne	.L632
 	ldrb	r3, [r4, #1]	@ zero_extendqisi2
 	cmp	r3, #255
-	bne	.L651
+	bne	.L630
 	movs	r2, #81
-	ldr	r1, .L654
-	ldr	r0, .L654+4
+	ldr	r1, .L633
+	ldr	r0, .L633+4
 	bl	printf
-.L651:
+.L630:
 	movs	r3, #48
 	ldrb	r2, [r4, #1]	@ zero_extendqisi2
 	muls	r3, r5, r3
 	strb	r2, [r6, r3]
 	pop	{r4, r5, r6, pc}
-.L655:
+.L634:
 	.align	2
-.L654:
-	.word	.LANCHOR59
+.L633:
+	.word	.LANCHOR58
 	.word	.LC0
-	.word	.LANCHOR56
+	.word	.LANCHOR55
 	.size	buf_add_tail, .-buf_add_tail
 	.section	.text.queue_read_cmd,"ax",%progbits
 	.align	1
@@ -3867,13 +3764,13 @@ queue_read_cmd:
 	strb	r3, [r4, #43]
 	movs	r3, #255
 	strb	r3, [r4]
-	ldr	r0, .L657
+	ldr	r0, .L636
 	pop	{r4, lr}
 	b	buf_add_tail
-.L658:
+.L637:
 	.align	2
-.L657:
-	.word	.LANCHOR60
+.L636:
+	.word	.LANCHOR59
 	.size	queue_read_cmd, .-queue_read_cmd
 	.section	.text.zbuf_free,"ax",%progbits
 	.align	1
@@ -3891,30 +3788,30 @@ zbuf_free:
 	ldrb	r3, [r0, #2]	@ zero_extendqisi2
 	and	r3, r3, #8
 	strb	r3, [r0, #2]
-	cbz	r3, .L660
+	cbz	r3, .L639
 	ldr	r3, [r0, #20]
 	adds	r3, r3, #1
-	beq	.L660
-	ldr	r0, .L668
+	beq	.L639
+	ldr	r0, .L647
 	bl	buf_add_tail
-.L661:
-	ldr	r2, .L668+4
+.L640:
+	ldr	r2, .L647+4
 	ldrb	r3, [r2]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	strb	r3, [r2]
 	pop	{r3, pc}
-.L660:
-	ldr	r3, .L668
+.L639:
+	ldr	r3, .L647
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	strb	r2, [r1]
 	ldrb	r2, [r1, #1]	@ zero_extendqisi2
 	strb	r2, [r3]
-	b	.L661
-.L669:
+	b	.L640
+.L648:
 	.align	2
-.L668:
+.L647:
+	.word	.LANCHOR56
 	.word	.LANCHOR57
-	.word	.LANCHOR58
 	.size	zbuf_free, .-zbuf_free
 	.section	.text.buf_alloc,"ax",%progbits
 	.align	1
@@ -3929,17 +3826,17 @@ buf_alloc:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r7, r0
-	ldr	r4, .L680
+	ldr	r4, .L659
 	ldrb	r3, [r4]	@ zero_extendqisi2
-	cbz	r3, .L671
-.L674:
-	ldr	r5, .L680+4
-	ldr	r2, .L680+8
+	cbz	r3, .L650
+.L653:
+	ldr	r5, .L659+4
+	ldr	r2, .L659+8
 	ldrb	r6, [r5]	@ zero_extendqisi2
 	add	r0, r6, r6, lsl #1
 	add	r0, r2, r0, lsl #4
-	cbz	r7, .L672
-.L673:
+	cbz	r7, .L651
+.L652:
 	movs	r1, #48
 	muls	r1, r6, r1
 	ldrb	r6, [r2, r1]	@ zero_extendqisi2
@@ -3960,29 +3857,29 @@ buf_alloc:
 	strb	r2, [r3, #40]
 	strb	r2, [r3, #41]
 	pop	{r3, r4, r5, r6, r7, pc}
-.L671:
+.L650:
 	movs	r2, #121
-	ldr	r1, .L680+12
-	ldr	r0, .L680+16
+	ldr	r1, .L659+12
+	ldr	r0, .L659+16
 	bl	printf
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L674
-.L676:
+	bne	.L653
+.L655:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L672:
+.L651:
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L673
-	b	.L676
-.L681:
+	bne	.L652
+	b	.L655
+.L660:
 	.align	2
-.L680:
-	.word	.LANCHOR58
+.L659:
 	.word	.LANCHOR57
 	.word	.LANCHOR56
-	.word	.LANCHOR61
+	.word	.LANCHOR55
+	.word	.LANCHOR60
 	.word	.LC0
 	.size	buf_alloc, .-buf_alloc
 	.section	.text.buf_remove_buf,"ax",%progbits
@@ -4000,36 +3897,36 @@ buf_remove_buf:
 	ldrb	r4, [r1, #1]	@ zero_extendqisi2
 	ldrb	r3, [r0]	@ zero_extendqisi2
 	cmp	r4, r3
-	bne	.L683
+	bne	.L662
 	ldrb	r3, [r1]	@ zero_extendqisi2
 	strb	r3, [r0]
-.L688:
+.L667:
 	movs	r0, #1
 	pop	{r4, r5, pc}
-.L686:
+.L665:
 	mov	r5, r3
 	muls	r3, r2, r3
 	ldrb	r3, [r0, r3]	@ zero_extendqisi2
 	cmp	r4, r3
-	bne	.L685
+	bne	.L664
 	muls	r2, r5, r2
 	ldrb	r3, [r1]	@ zero_extendqisi2
 	strb	r3, [r0, r2]
 	movs	r3, #255
 	strb	r3, [r1]
-	b	.L688
-.L683:
-	ldr	r0, .L689
+	b	.L667
+.L662:
+	ldr	r0, .L668
 	movs	r2, #48
-.L685:
+.L664:
 	cmp	r3, #255
-	bne	.L686
+	bne	.L665
 	movs	r0, #0
 	pop	{r4, r5, pc}
-.L690:
+.L669:
 	.align	2
-.L689:
-	.word	.LANCHOR56
+.L668:
+	.word	.LANCHOR55
 	.size	buf_remove_buf, .-buf_remove_buf
 	.section	.text.buf_remove_free,"ax",%progbits
 	.align	1
@@ -4044,36 +3941,36 @@ buf_remove_free:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	mov	r5, r0
-	ldr	r4, .L696
+	ldr	r4, .L675
 	ldrb	r3, [r4]	@ zero_extendqisi2
-	cbnz	r3, .L692
+	cbnz	r3, .L671
 	movs	r2, #172
-	ldr	r1, .L696+4
-	ldr	r0, .L696+8
+	ldr	r1, .L675+4
+	ldr	r0, .L675+8
 	bl	printf
-.L692:
+.L671:
 	ldrb	r3, [r4]	@ zero_extendqisi2
-	cbz	r3, .L691
+	cbz	r3, .L670
 	mov	r1, r5
-	ldr	r0, .L696+12
+	ldr	r0, .L675+12
 	bl	buf_remove_buf
 	cmp	r0, #1
-	bne	.L691
+	bne	.L670
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	strb	r3, [r4]
 	ldrb	r3, [r5, #2]	@ zero_extendqisi2
 	orr	r3, r3, #1
 	strb	r3, [r5, #2]
-.L691:
+.L670:
 	pop	{r3, r4, r5, pc}
-.L697:
+.L676:
 	.align	2
-.L696:
-	.word	.LANCHOR58
-	.word	.LANCHOR62
-	.word	.LC0
+.L675:
 	.word	.LANCHOR57
+	.word	.LANCHOR61
+	.word	.LC0
+	.word	.LANCHOR56
 	.size	buf_remove_free, .-buf_remove_free
 	.section	.text.dump_buf_info,"ax",%progbits
 	.align	1
@@ -4086,36 +3983,36 @@ buf_remove_free:
 dump_buf_info:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L701
+	ldr	r3, .L680
 	push	{r4, r5, r6, lr}
 	sub	sp, sp, #24
-	ldr	r0, .L701+4
+	ldr	r0, .L680+4
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	bl	printf
-	ldr	r3, .L701+8
-	ldr	r0, .L701+12
-	ldr	r4, .L701+16
+	ldr	r3, .L680+8
+	ldr	r0, .L680+12
+	ldr	r4, .L680+16
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	bl	printf
-	ldr	r3, .L701+20
+	ldr	r3, .L680+20
 	add	r5, r4, #1536
-	ldr	r0, .L701+24
-	ldr	r6, .L701+28
+	ldr	r0, .L680+24
+	ldr	r6, .L680+28
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	bl	printf
-	ldr	r3, .L701+32
-	ldr	r0, .L701+36
+	ldr	r3, .L680+32
+	ldr	r0, .L680+36
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	bl	printf
-	ldr	r3, .L701+40
-	ldr	r0, .L701+44
+	ldr	r3, .L680+40
+	ldr	r0, .L680+44
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	bl	printf
-	ldr	r3, .L701+48
-	ldr	r0, .L701+52
+	ldr	r3, .L680+48
+	ldr	r0, .L680+52
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	bl	printf
-.L699:
+.L678:
 	ldr	r0, [r4, #24]
 	adds	r4, r4, #48
 	ldrb	r3, [r4, #-46]	@ zero_extendqisi2
@@ -4133,26 +4030,26 @@ dump_buf_info:
 	mov	r0, r6
 	bl	printf
 	cmp	r4, r5
-	bne	.L699
+	bne	.L678
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, pc}
-.L702:
+.L681:
 	.align	2
-.L701:
-	.word	.LANCHOR60
+.L680:
+	.word	.LANCHOR59
 	.word	.LC41
-	.word	.LANCHOR63
+	.word	.LANCHOR62
 	.word	.LC42
-	.word	.LANCHOR56
-	.word	.LANCHOR64
+	.word	.LANCHOR55
+	.word	.LANCHOR63
 	.word	.LC43
 	.word	.LC47
-	.word	.LANCHOR65
+	.word	.LANCHOR64
 	.word	.LC44
-	.word	.LANCHOR57
+	.word	.LANCHOR56
 	.word	.LC45
-	.word	.LANCHOR58
+	.word	.LANCHOR57
 	.word	.LC46
 	.size	dump_buf_info, .-dump_buf_info
 	.section	.text.flash_check_bad_block,"ax",%progbits
@@ -4166,14 +4063,14 @@ dump_buf_info:
 flash_check_bad_block:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L704
+	ldr	r2, .L683
 	push	{r4, lr}
 	lsrs	r4, r1, #5
 	and	r1, r1, #31
 	ldrb	r3, [r2, #13]	@ zero_extendqisi2
 	ldrh	r2, [r2, #14]
 	smulbb	r3, r3, r2
-	ldr	r2, .L704+4
+	ldr	r2, .L683+4
 	uxth	r3, r3
 	ldr	r2, [r2]
 	adds	r3, r3, #31
@@ -4186,11 +4083,11 @@ flash_check_bad_block:
 	lsrs	r0, r0, r1
 	and	r0, r0, #1
 	pop	{r4, pc}
-.L705:
+.L684:
 	.align	2
-.L704:
-	.word	.LANCHOR33
-	.word	.LANCHOR27
+.L683:
+	.word	.LANCHOR32
+	.word	.LANCHOR6
 	.size	flash_check_bad_block, .-flash_check_bad_block
 	.section	.text.flash_mask_bad_block,"ax",%progbits
 	.align	1
@@ -4203,7 +4100,7 @@ flash_check_bad_block:
 flash_mask_bad_block:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L707
+	ldr	r3, .L686
 	mov	r2, r1
 	push	{r4, r5, r6, lr}
 	mov	r5, r0
@@ -4211,11 +4108,11 @@ flash_mask_bad_block:
 	mov	r1, r0
 	ldrb	r4, [r3, #13]	@ zero_extendqisi2
 	ldrh	r3, [r3, #14]
-	ldr	r0, .L707+4
+	ldr	r0, .L686+4
 	smulbb	r4, r4, r3
 	bl	printf
 	uxth	r4, r4
-	ldr	r3, .L707+8
+	ldr	r3, .L686+8
 	add	r0, r4, #31
 	asrs	r0, r0, #5
 	ldr	r2, [r3]
@@ -4232,12 +4129,12 @@ flash_mask_bad_block:
 	orrs	r3, r3, r6
 	str	r3, [r2, r0]
 	pop	{r4, r5, r6, pc}
-.L708:
+.L687:
 	.align	2
-.L707:
-	.word	.LANCHOR33
+.L686:
+	.word	.LANCHOR32
 	.word	.LC48
-	.word	.LANCHOR27
+	.word	.LANCHOR6
 	.size	flash_mask_bad_block, .-flash_mask_bad_block
 	.section	.text.ftl_gc_write_buf,"ax",%progbits
 	.align	1
@@ -4255,19 +4152,19 @@ ftl_gc_write_buf:
 	ldrb	r3, [r0, #2]	@ zero_extendqisi2
 	orr	r3, r3, #2
 	strb	r3, [r0, #2]
-	ldr	r0, .L710
+	ldr	r0, .L689
 	bl	buf_add_tail
-	ldr	r3, .L710+4
+	ldr	r3, .L689+4
 	ldrb	r0, [r3]	@ zero_extendqisi2
 	adds	r0, r0, #1
 	uxtb	r0, r0
 	strb	r0, [r3]
 	pop	{r3, pc}
-.L711:
+.L690:
 	.align	2
-.L710:
+.L689:
+	.word	.LANCHOR65
 	.word	.LANCHOR66
-	.word	.LANCHOR67
 	.size	ftl_gc_write_buf, .-ftl_gc_write_buf
 	.section	.text.zftl_cache_flush,"ax",%progbits
 	.align	1
@@ -4295,20 +4192,20 @@ zftl_get_density:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	cbnz	r0, .L714
-	ldr	r3, .L717
+	cbnz	r0, .L693
+	ldr	r3, .L696
 	ldr	r0, [r3]
 	bx	lr
-.L714:
+.L693:
 	cmp	r0, #4
 	ite	cc
 	movcc	r0, #8192
 	movcs	r0, #0
 	bx	lr
-.L718:
+.L697:
 	.align	2
-.L717:
-	.word	.LANCHOR68
+.L696:
+	.word	.LANCHOR67
 	.size	zftl_get_density, .-zftl_get_density
 	.section	.text.gc_hook,"ax",%progbits
 	.align	1
@@ -4364,13 +4261,13 @@ FtlGetCurEraseBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L723
+	ldr	r3, .L702
 	ldrh	r0, [r3]
 	bx	lr
-.L724:
+.L703:
 	.align	2
-.L723:
-	.word	.LANCHOR69
+.L702:
+	.word	.LANCHOR68
 	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
 	.section	.text.FtlGetAllBlockNum,"ax",%progbits
 	.align	1
@@ -4384,13 +4281,13 @@ FtlGetAllBlockNum:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L726
+	ldr	r3, .L705
 	ldrh	r0, [r3]
 	bx	lr
-.L727:
+.L706:
 	.align	2
-.L726:
-	.word	.LANCHOR6
+.L705:
+	.word	.LANCHOR8
 	.size	FtlGetAllBlockNum, .-FtlGetAllBlockNum
 	.section	.text.FtlLowFormat,"ax",%progbits
 	.align	1
@@ -4420,135 +4317,135 @@ gc_add_sblk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r8, r2
-	ldr	r3, .L764
+	ldr	r3, .L743
 	mov	r5, r0
 	mov	r4, r1
 	ldr	r2, [r3]
 	mov	r10, r3
 	tst	r2, #256
-	beq	.L730
-	ldr	r3, .L764+4
+	beq	.L709
+	ldr	r3, .L743+4
 	mov	r2, r1
 	mov	r1, r0
 	ldrh	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L764+8
+	ldr	r3, .L743+8
 	ldrh	r3, [r3, #52]
 	str	r3, [sp, #8]
-	ldr	r3, .L764+12
+	ldr	r3, .L743+12
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	str	r3, [sp, #4]
-	ldr	r3, .L764+16
+	ldr	r3, .L743+16
 	ldr	r3, [r3]
 	add	r3, r3, r0, lsl #2
-	ldr	r0, .L764+20
+	ldr	r0, .L743+20
 	ldrb	r3, [r3, #2]	@ zero_extendqisi2
 	lsrs	r3, r3, #5
 	str	r3, [sp]
 	mov	r3, r8
 	bl	printf
-.L730:
-	ldr	r6, .L764+24
+.L709:
+	ldr	r6, .L743+24
 	ldrh	r2, [r6]
 	cmp	r2, r5
-	bhi	.L731
+	bhi	.L710
 	movw	r2, #543
-	ldr	r1, .L764+28
-	ldr	r0, .L764+32
+	ldr	r1, .L743+28
+	ldr	r0, .L743+32
 	bl	printf
-.L731:
+.L710:
 	ldrh	r3, [r6]
 	cmp	r3, r5
-	bhi	.L732
+	bhi	.L711
 	ldr	r0, [r10]
 	ands	r0, r0, #1024
-	beq	.L729
+	beq	.L708
 	mov	r3, r8
 	mov	r2, r4
 	mov	r1, r5
-	ldr	r0, .L764+36
+	ldr	r0, .L743+36
 	bl	printf
-.L752:
+.L731:
 	movs	r0, #0
-	b	.L729
-.L732:
-	ldr	r2, .L764+16
-	ldr	r3, .L764+12
+	b	.L708
+.L711:
+	ldr	r2, .L743+16
+	ldr	r3, .L743+12
 	ldr	r2, [r2]
 	ldr	r3, [r3]
 	add	r2, r2, r5, lsl #2
 	ldrh	r3, [r3, r5, lsl #1]
 	ldrb	r2, [r2, #2]	@ zero_extendqisi2
 	ands	r6, r2, #224
-	bne	.L734
+	bne	.L713
 	cmp	r3, #0
-	beq	.L752
+	beq	.L731
 	movw	r2, #553
-	ldr	r1, .L764+28
-	ldr	r0, .L764+32
+	ldr	r1, .L743+28
+	ldr	r0, .L743+32
 	bl	printf
-	b	.L752
-.L734:
-	ldr	r6, .L764+8
+	b	.L731
+.L713:
+	ldr	r6, .L743+8
 	ldrh	r1, [r6]
 	cmp	r1, r5
-	beq	.L752
-	ldr	r7, .L764+40
+	beq	.L731
+	ldr	r7, .L743+40
 	ldr	r1, [r7]
 	ldrh	r0, [r1, #48]
 	cmp	r0, r5
-	beq	.L752
+	beq	.L731
 	ldrh	r0, [r1, #16]
 	cmp	r0, r5
-	beq	.L752
+	beq	.L731
 	ldrh	r0, [r1, #80]
 	cmp	r0, r5
-	beq	.L752
+	beq	.L731
 	ldrh	ip, [r6, #52]!
 	movs	r0, #0
-.L735:
+.L714:
 	cmp	r0, ip
-	bcc	.L736
+	bcc	.L715
 	cmp	r4, #0
-	bne	.L740
-	ldr	r0, .L764+44
+	bne	.L719
+	ldr	r0, .L743+44
 	ldrh	r6, [r0]
 	mov	r0, r4
 	cmp	r5, r6
-	beq	.L729
-	ldr	lr, .L764+56
-.L739:
+	beq	.L708
+	ldr	lr, .L743+56
+.L718:
 	ldrh	fp, [lr, r0, lsl #1]
 	cmp	r5, fp
-	bne	.L738
+	bne	.L717
 	ldr	r0, [r10]
 	ands	r0, r0, #256
-	beq	.L729
+	beq	.L708
 	stm	sp, {r5, r6}
 	lsrs	r2, r2, #5
 	mov	r1, r5
-	ldr	r0, .L764+48
+	ldr	r0, .L743+48
 	bl	printf
-	b	.L752
-.L736:
+	b	.L731
+.L715:
 	ldrh	lr, [r6, #2]!
 	cmp	lr, r5
-	beq	.L752
+	beq	.L731
 	adds	r0, r0, #1
-	b	.L735
-.L738:
+	b	.L714
+.L717:
 	adds	r0, r0, #1
 	cmp	r0, #8
-	bne	.L739
+	bne	.L718
 	add	r1, r1, r8, lsl #7
 	add	r6, r1, #136
-.L741:
+.L720:
 	ldr	r1, [r10]
 	lsls	r1, r1, #23
-	bpl	.L742
-	ldr	r1, .L764+4
-	ldr	r0, .L764+52
+	bpl	.L721
+	ldr	r1, .L743+4
+	ldr	r0, .L743+52
 	ldrh	r1, [r1]
 	stm	sp, {r3, ip}
 	lsrs	r3, r2, #5
@@ -4556,60 +4453,60 @@ gc_add_sblk:
 	str	r1, [sp, #8]
 	mov	r1, r5
 	bl	printf
-.L742:
+.L721:
 	mov	r3, r6
 	add	r1, r6, #128
 	movw	r0, #65535
-.L745:
+.L724:
 	mov	r2, r3
 	adds	r3, r3, #2
 	ldrh	r6, [r2]
 	cmp	r6, r0
-	bne	.L743
+	bne	.L722
 	strh	r5, [r2]	@ movhi
-	cbz	r4, .L744
+	cbz	r4, .L723
 	ldr	r2, [r7]
 	ldrh	r3, [r2, #124]
 	adds	r3, r3, #1
 	strh	r3, [r2, #124]	@ movhi
-.L763:
+.L742:
 	movs	r0, #1
-.L729:
+.L708:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L740:
+.L719:
 	add	r6, r1, #392
-	b	.L741
-.L744:
+	b	.L720
+.L723:
 	ldr	r3, [r7]
 	add	r8, r3, r8, lsl #1
 	ldrh	r3, [r8, #120]
 	adds	r3, r3, #1
 	strh	r3, [r8, #120]	@ movhi
-	b	.L763
-.L743:
+	b	.L742
+.L722:
 	cmp	r3, r1
-	bne	.L745
-	b	.L763
-.L765:
+	bne	.L724
+	b	.L742
+.L744:
 	.align	2
-.L764:
-	.word	.LANCHOR14
+.L743:
+	.word	.LANCHOR19
+	.word	.LANCHOR69
 	.word	.LANCHOR70
-	.word	.LANCHOR71
+	.word	.LANCHOR11
 	.word	.LANCHOR9
-	.word	.LANCHOR7
 	.word	.LC49
-	.word	.LANCHOR6
-	.word	.LANCHOR72
+	.word	.LANCHOR8
+	.word	.LANCHOR71
 	.word	.LC0
 	.word	.LC50
-	.word	.LANCHOR10
-	.word	.LANCHOR73
+	.word	.LANCHOR12
+	.word	.LANCHOR72
 	.word	.LC51
 	.word	.LC52
-	.word	.LANCHOR74
+	.word	.LANCHOR73
 	.size	gc_add_sblk, .-gc_add_sblk
 	.section	.text.gc_mark_bad_ppa,"ax",%progbits
 	.align	1
@@ -4624,17 +4521,17 @@ gc_mark_bad_ppa:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
 	mov	r7, r0
-	ldr	r3, .L770
+	ldr	r3, .L749
 	movs	r6, #1
-	ldr	r2, .L770+4
+	ldr	r2, .L749+4
 	ldrh	r3, [r3]
-	ldr	r8, .L770+16
+	ldr	r8, .L749+16
 	lsr	r4, r0, r3
 	ldrb	r0, [r2]	@ zero_extendqisi2
 	uxth	r5, r4
 	rsb	r0, r0, #24
 	subs	r0, r0, r3
-	ldr	r3, .L770+8
+	ldr	r3, .L749+8
 	lsl	r0, r6, r0
 	subs	r0, r0, #1
 	ldrb	r1, [r3]	@ zero_extendqisi2
@@ -4643,43 +4540,43 @@ gc_mark_bad_ppa:
 	uxth	r10, r0
 	mov	r3, r7
 	mov	r2, r5
-	ldr	r1, [r8, #2116]
-	ldr	r0, .L770+12
+	ldr	r1, [r8, #2188]
+	ldr	r0, .L749+12
 	bl	printf
 	mov	r1, r6
 	movs	r2, #0
 	mov	r0, r10
 	bl	gc_add_sblk
-	ldr	r3, [r8, #2116]
+	ldr	r3, [r8, #2188]
 	movs	r1, #0
-.L767:
+.L746:
 	uxth	r2, r1
 	cmp	r3, r2
-	bhi	.L769
+	bhi	.L748
 	cmp	r3, #5
 	itttt	ls
 	addls	r2, r3, #1
-	addwls	r3, r3, #1060
-	strls	r2, [r8, #2116]
+	addls	r3, r3, #1096
+	strls	r2, [r8, #2188]
 	strhls	r5, [r8, r3, lsl #1]	@ movhi
-	b	.L768
-.L769:
-	addw	r2, r2, #1060
+	b	.L747
+.L748:
+	add	r2, r2, #1096
 	adds	r1, r1, #1
 	ldrh	r2, [r8, r2, lsl #1]
 	cmp	r5, r2
-	bne	.L767
-.L768:
+	bne	.L746
+.L747:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L771:
+.L750:
 	.align	2
-.L770:
+.L749:
+	.word	.LANCHOR74
+	.word	.LANCHOR31
 	.word	.LANCHOR75
-	.word	.LANCHOR32
-	.word	.LANCHOR76
 	.word	.LC53
-	.word	.LANCHOR71
+	.word	.LANCHOR70
 	.size	gc_mark_bad_ppa, .-gc_mark_bad_ppa
 	.section	.text.gc_get_src_ppa_from_index,"ax",%progbits
 	.align	1
@@ -4693,14 +4590,14 @@ gc_get_src_ppa_from_index:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L773
+	ldr	r3, .L752
 	ldr	r3, [r3]
 	ldr	r0, [r3, r0, lsl #2]
 	bx	lr
-.L774:
+.L753:
 	.align	2
-.L773:
-	.word	.LANCHOR77
+.L752:
+	.word	.LANCHOR76
 	.size	gc_get_src_ppa_from_index, .-gc_get_src_ppa_from_index
 	.section	.text.gc_write_completed,"ax",%progbits
 	.align	1
@@ -4714,16 +4611,16 @@ gc_write_completed:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r5, .L802
-.L776:
-	ldr	r1, .L802+4
+	ldr	r5, .L781
+.L755:
+	ldr	r1, .L781+4
 	ldrb	r8, [r1]	@ zero_extendqisi2
 	cmp	r8, #255
-	bne	.L789
+	bne	.L768
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L789:
+.L768:
 	movs	r3, #48
 	mul	r3, r3, r8
 	adds	r2, r5, r3
@@ -4731,41 +4628,41 @@ gc_write_completed:
 	ldrh	r6, [r2, #32]
 	strb	r3, [r1]
 	ldr	r1, [r2, #36]
-	cbz	r1, .L777
-	ldr	r3, .L802+8
+	cbz	r1, .L756
+	ldr	r3, .L781+8
 	movs	r0, #1
 	ldr	r2, [r2, #24]
-	strh	r0, [r3, #2108]	@ movhi
-	ldr	r0, .L802+12
-	str	r2, [r3, #2112]
+	strh	r0, [r3, #2182]	@ movhi
+	ldr	r0, .L781+12
+	str	r2, [r3, #2184]
 	bl	printf
 	mov	r2, #956
-	ldr	r1, .L802+16
-	ldr	r0, .L802+20
+	ldr	r1, .L781+16
+	ldr	r0, .L781+20
 	bl	printf
-.L777:
-	ldr	r10, .L802+56
+.L756:
+	ldr	r10, .L781+56
 	ldrb	r3, [r10]	@ zero_extendqisi2
 	cmp	r3, #3
-	bne	.L778
-	ldr	r3, .L802+24
+	bne	.L757
+	ldr	r3, .L781+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L778
-	ldr	r3, .L802+28
+	bne	.L757
+	ldr	r3, .L781+28
 	ldr	r3, [r3]
 	ldrb	r4, [r3, #89]	@ zero_extendqisi2
-	ldr	r3, .L802+32
+	ldr	r3, .L781+32
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r4
-	bhi	.L790
+	bhi	.L769
 	cmp	r4, #2
 	it	cs
 	movcs	r4, #2
-.L779:
+.L758:
 	add	r4, r4, r4, lsl #1
-.L780:
-	ldr	r3, .L802+36
+.L759:
+	ldr	r3, .L781+36
 	movs	r2, #48
 	mla	r2, r2, r8, r5
 	ldr	r1, [r3]
@@ -4774,80 +4671,80 @@ gc_write_completed:
 	ldrb	r2, [r2, #1]	@ zero_extendqisi2
 	ldrb	r1, [r1, r6]	@ zero_extendqisi2
 	cmp	r1, r2
-	beq	.L781
+	beq	.L760
 	mov	r2, #976
-	ldr	r1, .L802+16
-	ldr	r0, .L802+20
+	ldr	r1, .L781+16
+	ldr	r0, .L781+20
 	str	r3, [sp, #4]
 	bl	printf
 	ldr	r3, [sp, #4]
-.L781:
+.L760:
 	movs	r2, #48
 	mla	r8, r2, r8, r5
 	ldrb	r2, [r8, #45]	@ zero_extendqisi2
 	cmp	r2, #3
-	beq	.L782
+	beq	.L761
 	ldrb	r2, [r10]	@ zero_extendqisi2
 	cmp	r2, #3
-	bne	.L782
-	ldr	r2, .L802+40
+	bne	.L761
+	ldr	r2, .L781+40
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbnz	r2, .L782
-	ldr	r2, .L802+24
+	cbnz	r2, .L761
+	ldr	r2, .L781+24
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbnz	r2, .L782
-	ldr	r2, .L802+44
+	cbnz	r2, .L761
+	ldr	r2, .L781+44
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbnz	r2, .L782
-	ldr	r2, .L802+48
+	cbnz	r2, .L761
+	ldr	r2, .L781+48
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbz	r2, .L783
-	ldr	r2, .L802+52
+	cbz	r2, .L762
+	ldr	r2, .L781+52
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbnz	r2, .L782
-.L783:
+	cbnz	r2, .L761
+.L762:
 	ldr	r2, [r3]
 	movs	r3, #0
 	movs	r1, #48
 	mov	r0, r3
 	add	r6, r6, r2
-.L784:
+.L763:
 	uxth	r2, r3
 	cmp	r4, r2
-	bls	.L776
+	bls	.L755
 	ldrb	r2, [r6, r3]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	mla	r2, r1, r2, r5
 	strb	r0, [r2, #45]
-	b	.L784
-.L790:
+	b	.L763
+.L769:
 	movs	r4, #1
-	b	.L779
-.L778:
-	ldr	r3, .L802+48
+	b	.L758
+.L757:
+	ldr	r3, .L781+48
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L791
-	ldr	r3, .L802+52
+	cbz	r3, .L770
+	ldr	r3, .L781+52
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
 	ite	eq
 	moveq	r4, #1
 	movne	r4, #2
-	b	.L780
-.L791:
+	b	.L759
+.L770:
 	movs	r4, #1
-	b	.L780
-.L782:
-	ldr	r3, .L802+8
+	b	.L759
+.L761:
+	ldr	r3, .L781+8
 	mov	r10, #255
 	strh	r6, [r3, #2104]	@ movhi
 	mov	r8, r3
 	movs	r3, #48
-.L785:
+.L764:
 	subs	r2, r7, r6
 	uxth	r2, r2
 	cmp	r4, r2
-	bls	.L776
+	bls	.L755
 	ldr	r2, [fp]
 	movs	r1, #0
 	str	r3, [sp, #4]
@@ -4863,25 +4760,25 @@ gc_write_completed:
 	ldr	r3, [sp, #4]
 	subs	r2, r2, #1
 	strb	r2, [r8, #7]
-	b	.L785
-.L803:
+	b	.L764
+.L782:
 	.align	2
-.L802:
-	.word	.LANCHOR56
-	.word	.LANCHOR64
-	.word	.LANCHOR71
+.L781:
+	.word	.LANCHOR55
+	.word	.LANCHOR63
+	.word	.LANCHOR70
 	.word	.LC54
-	.word	.LANCHOR78
+	.word	.LANCHOR77
 	.word	.LC0
+	.word	.LANCHOR35
+	.word	.LANCHOR12
+	.word	.LANCHOR79
+	.word	.LANCHOR82
+	.word	.LANCHOR83
 	.word	.LANCHOR36
-	.word	.LANCHOR10
 	.word	.LANCHOR80
-	.word	.LANCHOR83
-	.word	.LANCHOR84
-	.word	.LANCHOR37
 	.word	.LANCHOR81
-	.word	.LANCHOR82
-	.word	.LANCHOR79
+	.word	.LANCHOR78
 	.size	gc_write_completed, .-gc_write_completed
 	.section	.text.gc_get_src_blk,"ax",%progbits
 	.align	1
@@ -4894,54 +4791,54 @@ gc_write_completed:
 gc_get_src_blk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L813
+	ldr	r3, .L792
 	push	{r4, r5, r6, r7, lr}
 	ldr	r2, [r3]
-	ldr	r3, .L813+4
+	ldr	r3, .L792+4
 	ldrh	r4, [r2, #124]
 	ldrb	r1, [r3]	@ zero_extendqisi2
-	cbz	r4, .L805
+	cbz	r4, .L784
 	add	r3, r2, #392
 	movs	r4, #1
-.L806:
+.L785:
 	add	r6, r3, #128
 	movw	r5, #65535
-.L810:
+.L789:
 	mov	r7, r3
 	ldrh	r0, [r3], #2
 	cmp	r0, r5
-	beq	.L808
+	beq	.L787
 	strh	r5, [r7]	@ movhi
-	cbz	r4, .L809
+	cbz	r4, .L788
 	ldrh	r3, [r2, #124]
 	subs	r3, r3, #1
 	strh	r3, [r2, #124]	@ movhi
 	pop	{r4, r5, r6, r7, pc}
-.L805:
+.L784:
 	add	r3, r1, #60
 	ldrh	r3, [r2, r3, lsl #1]
-	cbz	r3, .L811
+	cbz	r3, .L790
 	add	r3, r2, r1, lsl #7
 	adds	r3, r3, #136
-	b	.L806
-.L809:
+	b	.L785
+.L788:
 	add	r2, r2, r1, lsl #1
 	ldrh	r3, [r2, #120]
 	subs	r3, r3, #1
 	strh	r3, [r2, #120]	@ movhi
 	pop	{r4, r5, r6, r7, pc}
-.L808:
+.L787:
 	cmp	r3, r6
-	bne	.L810
+	bne	.L789
 	pop	{r4, r5, r6, r7, pc}
-.L811:
+.L790:
 	movw	r0, #65535
 	pop	{r4, r5, r6, r7, pc}
-.L814:
+.L793:
 	.align	2
-.L813:
-	.word	.LANCHOR10
-	.word	.LANCHOR85
+.L792:
+	.word	.LANCHOR12
+	.word	.LANCHOR84
 	.size	gc_get_src_blk, .-gc_get_src_blk
 	.section	.text.gc_free_temp_buf,"ax",%progbits
 	.align	1
@@ -4955,55 +4852,55 @@ gc_free_temp_buf:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
-	ldr	r5, .L829
+	ldr	r5, .L808
 	ldrb	r0, [r5, #7]	@ zero_extendqisi2
-	cbz	r0, .L815
-	ldr	r3, .L829+4
+	cbz	r0, .L794
+	ldr	r3, .L808+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #1
-	bhi	.L822
-	ldr	r3, .L829+8
+	bhi	.L801
+	ldr	r3, .L808+8
 	movs	r7, #48
 	ldrh	r4, [r5, #2104]
-	ldr	r6, .L829+12
+	ldr	r6, .L808+12
 	ldrh	r2, [r3]
-	ldr	r3, .L829+16
+	ldr	r3, .L808+16
 	add	r1, r4, #24
-	ldr	r0, .L829+20
+	ldr	r0, .L808+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	muls	r2, r3, r2
 	cmp	r2, r1
 	it	cs
 	movcs	r2, r1
 	ldr	r1, [r6]
-.L817:
+.L796:
 	cmp	r4, r2
-	bcc	.L820
-.L822:
+	bcc	.L799
+.L801:
 	movs	r0, #0
-.L815:
+.L794:
 	pop	{r3, r4, r5, r6, r7, pc}
-.L820:
+.L799:
 	ldrb	r3, [r1, r4]	@ zero_extendqisi2
 	cmp	r3, #255
-	beq	.L818
+	beq	.L797
 	mla	ip, r7, r3, r0
 	ldrb	ip, [ip, #45]	@ zero_extendqisi2
 	cmp	ip, #0
-	bne	.L818
+	bne	.L797
 	add	r3, r3, r3, lsl #1
 	add	r0, r0, r3, lsl #4
 	bl	zbuf_free
-	ldr	r3, .L829+24
+	ldr	r3, .L808+24
 	ldr	r3, [r3]
 	lsls	r3, r3, #23
-	bpl	.L819
+	bpl	.L798
 	ldr	r3, [r6]
 	mov	r1, r4
-	ldr	r0, .L829+28
+	ldr	r0, .L808+28
 	ldrb	r2, [r3, r4]	@ zero_extendqisi2
 	bl	printf
-.L819:
+.L798:
 	ldr	r3, [r6]
 	movs	r2, #255
 	movs	r0, #1
@@ -5012,21 +4909,49 @@ gc_free_temp_buf:
 	subs	r3, r3, #1
 	strb	r3, [r5, #7]
 	pop	{r3, r4, r5, r6, r7, pc}
-.L818:
+.L797:
 	adds	r4, r4, #1
-	b	.L817
-.L830:
+	b	.L796
+.L809:
 	.align	2
-.L829:
-	.word	.LANCHOR71
-	.word	.LANCHOR58
-	.word	.LANCHOR86
-	.word	.LANCHOR83
-	.word	.LANCHOR80
-	.word	.LANCHOR56
-	.word	.LANCHOR14
+.L808:
+	.word	.LANCHOR70
+	.word	.LANCHOR57
+	.word	.LANCHOR85
+	.word	.LANCHOR82
+	.word	.LANCHOR79
+	.word	.LANCHOR55
+	.word	.LANCHOR19
 	.word	.LC55
 	.size	gc_free_temp_buf, .-gc_free_temp_buf
+	.section	.text.get_ink_scaned_blk,"ax",%progbits
+	.align	1
+	.global	get_ink_scaned_blk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	get_ink_scaned_blk, %function
+get_ink_scaned_blk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r2, .L813
+	ldrh	r3, [r2, #2108]
+	cbz	r3, .L812
+	add	r1, r2, r3, lsl #1
+	subs	r3, r3, #1
+	strh	r3, [r2, #2108]	@ movhi
+	ldrh	r0, [r1, #2108]
+	bx	lr
+.L812:
+	movw	r0, #65535
+	bx	lr
+.L814:
+	.align	2
+.L813:
+	.word	.LANCHOR70
+	.size	get_ink_scaned_blk, .-get_ink_scaned_blk
 	.section	.text.print_gc_debug_info,"ax",%progbits
 	.align	1
 	.global	print_gc_debug_info
@@ -5039,8 +4964,8 @@ print_gc_debug_info:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, lr}
-	ldr	r4, .L832
-	ldr	r0, .L832+4
+	ldr	r4, .L816
+	ldr	r0, .L816+4
 	ldrh	r4, [r4]
 	ldrh	r3, [r0, #2102]
 	ldrh	r2, [r0, #2]
@@ -5048,55 +4973,116 @@ print_gc_debug_info:
 	str	r4, [sp, #8]
 	ldrb	r0, [r0, #7]	@ zero_extendqisi2
 	str	r0, [sp, #4]
-	ldr	r0, .L832+8
+	ldr	r0, .L816+8
 	ldrb	r0, [r0]	@ zero_extendqisi2
 	str	r0, [sp]
-	ldr	r0, .L832+12
+	ldr	r0, .L816+12
 	bl	printf
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, pc}
-.L833:
+.L817:
 	.align	2
-.L832:
-	.word	.LANCHOR87
-	.word	.LANCHOR71
-	.word	.LANCHOR58
+.L816:
+	.word	.LANCHOR86
+	.word	.LANCHOR70
+	.word	.LANCHOR57
 	.word	.LC56
 	.size	print_gc_debug_info, .-print_gc_debug_info
-	.section	.text.zftl_get_gc_node,"ax",%progbits
+	.section	.text._list_pop_index_node,"ax",%progbits
 	.align	1
-	.global	zftl_get_gc_node
+	.global	_list_pop_index_node
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	zftl_get_gc_node, %function
-zftl_get_gc_node:
+	.type	_list_pop_index_node, %function
+_list_pop_index_node:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	cmp	r1, #5
-	bne	.L835
-	ldr	r3, .L838
-	mov	r1, r0
-.L837:
-	ldr	r0, [r3]
-	b	_list_get_gc_head_node.isra.2
+	push	{r3, r4, r5, r6, r7, lr}
+	ldr	r5, [r0]
+	cbz	r5, .L824
+	ldr	r3, .L825
+	movw	r6, #65535
+	movs	r7, #6
+	ldr	r4, [r3]
+.L820:
+	cbnz	r1, .L821
+.L823:
+	subs	r4, r5, r4
+	asrs	r3, r4, #1
+	ldr	r4, .L825+4
+	muls	r4, r3, r4
+	uxth	r1, r4
+	bl	_list_remove_node
+	movw	r3, #65535
+	uxth	r0, r4
+	strh	r3, [r5]	@ movhi
+	strh	r3, [r5, #2]	@ movhi
+	pop	{r3, r4, r5, r6, r7, pc}
+.L821:
+	ldrh	r3, [r5]
+	cmp	r3, r6
+	beq	.L823
+	subs	r1, r1, #1
+	mla	r5, r7, r3, r4
+	uxth	r1, r1
+	b	.L820
+.L824:
+	movw	r0, #65535
+	pop	{r3, r4, r5, r6, r7, pc}
+.L826:
+	.align	2
+.L825:
+	.word	.LANCHOR4
+	.word	-1431655765
+	.size	_list_pop_index_node, .-_list_pop_index_node
+	.section	.text._list_get_gc_head_node,"ax",%progbits
+	.align	1
+	.global	_list_get_gc_head_node
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	_list_get_gc_head_node, %function
+_list_get_gc_head_node:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r0, [r0]
+	push	{r4, lr}
+	cbz	r0, .L832
+	ldr	r3, .L834
+	movw	r2, #65535
+	movs	r4, #6
+	ldr	r3, [r3]
+.L829:
+	cbz	r1, .L830
+	ldrh	r0, [r0]
+	cmp	r0, r2
+	bne	.L831
+	pop	{r4, pc}
+.L831:
+	subs	r1, r1, #1
+	mla	r0, r4, r0, r3
+	uxth	r1, r1
+	b	.L829
+.L832:
+	movw	r0, #65535
+	pop	{r4, pc}
+.L830:
+	subs	r0, r0, r3
+	asrs	r3, r0, #1
+	ldr	r0, .L834+4
+	muls	r0, r3, r0
+	uxth	r0, r0
+	pop	{r4, pc}
 .L835:
-	cmp	r1, #2
-	bne	.L836
-	b	zftl_get_gc_node.part.9
-.L836:
-	mov	r1, r0
-	ldr	r3, .L838+4
-	b	.L837
-.L839:
 	.align	2
-.L838:
-	.word	.LANCHOR88
-	.word	.LANCHOR89
-	.size	zftl_get_gc_node, .-zftl_get_gc_node
+.L834:
+	.word	.LANCHOR4
+	.word	-1431655765
+	.size	_list_get_gc_head_node, .-_list_get_gc_head_node
 	.section	.text.gc_search_src_blk,"ax",%progbits
 	.align	1
 	.global	gc_search_src_blk
@@ -5108,526 +5094,531 @@ zftl_get_gc_node:
 gc_search_src_blk:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L951
+	ldr	r3, .L947
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #32
-	str	r0, [sp, #8]
+	str	r0, [sp, #12]
 	mov	r6, r2
 	ldr	r0, [r3]
-	ldr	r3, [sp, #8]
+	ldr	r3, [sp, #12]
 	str	r1, [sp, #20]
 	adds	r3, r3, #60
-	ldrh	r3, [r0, r3, lsl #1]
-	str	r3, [sp, #16]
-	cbz	r3, .L841
-	mov	r0, r3
-.L840:
+	ldrh	r7, [r0, r3, lsl #1]
+	cbz	r7, .L837
+	mov	r0, r7
+.L836:
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L841:
-	ldr	r3, .L951+4
+.L837:
+	ldr	r3, .L947+4
 	ldrh	r2, [r3, #52]
 	cmp	r2, #1
-	bhi	.L843
-	ldrh	r4, [sp, #16]
-	ldr	r1, .L951+8
-	strh	r4, [r1]	@ movhi
-	ldr	r1, .L951+12
-	strh	r4, [r1]	@ movhi
-	ldr	r1, .L951+16
-	strh	r4, [r1]	@ movhi
-.L843:
-	ldr	r1, [sp, #8]
+	bhi	.L839
+	ldr	r1, .L947+8
+	strh	r7, [r1]	@ movhi
+	ldr	r1, .L947+12
+	strh	r7, [r1]	@ movhi
+	ldr	r1, .L947+16
+	strh	r7, [r1]	@ movhi
+.L839:
+	ldr	r1, [sp, #12]
 	cmp	r1, #0
-	bne	.L844
-	ldr	r7, .L951+12
+	bne	.L840
+	ldr	r7, .L947+12
 	mov	r8, r1
 	mov	r4, r1
-.L845:
+.L841:
 	uxth	r3, r8
 	cmp	r6, r3
-	blt	.L850
+	blt	.L846
 	ldrh	r10, [r7]
-	movs	r1, #3
-	mov	r0, r10
-	bl	zftl_get_gc_node
+	ldr	r0, .L947+20
+	mov	r1, r10
+	bl	_list_get_gc_head_node
 	add	r2, r10, #1
 	movw	r3, #65535
 	uxth	r2, r2
 	cmp	r0, r3
 	mov	r5, r0
 	strh	r2, [r7]	@ movhi
-	beq	.L846
-	ldr	r3, .L951+20
-	ldr	r10, .L951+40
+	beq	.L842
+	ldr	r3, .L947+24
+	ldr	r10, .L947+48
 	ldr	r3, [r3]
 	tst	r3, #256
-	beq	.L847
+	beq	.L843
 	ldr	r3, [r10]
 	mov	r1, r0
 	ldrh	r3, [r3, r0, lsl #1]
-	ldr	r0, .L951+24
+	ldr	r0, .L947+28
 	bl	printf
-.L847:
+.L843:
 	ldr	r3, [r10]
 	ldrh	r2, [r3, r5, lsl #1]
-	ldr	r3, .L951+28
+	ldr	r3, .L947+32
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcs	.L846
+	bcs	.L842
 	movs	r2, #0
 	mov	r0, r5
 	mov	r1, r2
 	bl	gc_add_sblk
 	cmp	r0, #0
-	beq	.L849
+	beq	.L845
 	adds	r4, r4, #1
 	uxth	r4, r4
 	cmp	r4, r6
-	bcc	.L849
-.L850:
+	bcc	.L845
+.L846:
 	ldr	r3, [sp, #20]
 	lsls	r0, r3, #30
-	bpl	.L852
-	ldr	r3, .L951+32
+	bpl	.L848
+	ldr	r3, .L947+36
 	ldrh	r3, [r3]
 	cmp	r3, #32
-	bls	.L852
-	ldr	r5, .L951+36
+	bls	.L848
+	ldr	r5, .L947+40
 	mov	r10, #0
-	ldr	r7, .L951+16
-.L853:
+	ldr	r7, .L947+16
+.L849:
 	uxth	r3, r10
 	cmp	r6, r3
-	blt	.L857
+	blt	.L853
 	ldrh	r8, [r7]
-	movs	r1, #5
-	mov	r0, r8
+	ldr	r0, .L947+44
+	mov	r1, r8
 	add	r8, r8, #1
-	bl	zftl_get_gc_node
+	bl	_list_get_gc_head_node
 	movw	r2, #65535
 	strh	r8, [r7]	@ movhi
 	cmp	r0, r2
-	beq	.L854
-	ldr	r2, .L951+40
+	beq	.L850
+	ldr	r2, .L947+48
 	ldrh	r3, [r5]
 	ldr	r2, [r2]
 	ldrh	r2, [r2, r0, lsl #1]
 	cmp	r2, r3
-	bcs	.L854
+	bcs	.L850
 	movs	r2, #0
 	mov	r1, r2
 	bl	gc_add_sblk
 	cmp	r0, #0
-	beq	.L856
+	beq	.L852
 	adds	r4, r4, #1
 	uxth	r4, r4
 	cmp	r4, r6
-	bcc	.L856
-.L857:
+	bcc	.L852
+.L853:
 	cmp	r4, r6
-	ldr	r1, .L951+44
-	bcs	.L859
-	ldr	r3, .L951+48
+	ldr	r1, .L947+52
+	bcs	.L855
+	ldr	r3, .L947+56
 	ldrh	r1, [r1]
 	ldrh	r2, [r5]
 	ldrh	r0, [r3]
-	ldr	r3, .L951+52
+	ldr	r3, .L947+60
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	muls	r3, r0, r3
 	sub	r3, r3, r1, lsr #2
 	cmp	r2, r3
-	bge	.L852
+	bge	.L848
 	add	r2, r2, r1, lsr #3
 	strh	r2, [r5]	@ movhi
-.L852:
+.L848:
 	ldr	r3, [sp, #20]
 	lsls	r1, r3, #31
-	bpl	.L860
+	bpl	.L856
 	uxth	r5, r6
 	cmp	r4, r5
-	bcs	.L860
-	ldr	r10, .L951+8
+	bcs	.L856
+	ldr	r10, .L947+8
 	movs	r7, #0
-	movw	r8, #65535
-.L865:
+	ldr	r8, .L947+68
+.L861:
 	ldrh	fp, [r10]
-	mov	r0, fp
+	mov	r0, r8
+	mov	r1, fp
 	add	fp, fp, #1
-	bl	zftl_get_gc_node.part.9
-	cmp	r0, r8
+	bl	_list_get_gc_head_node
+	movw	r3, #65535
 	strh	fp, [r10]	@ movhi
-	beq	.L861
+	cmp	r0, r3
+	beq	.L857
 	movs	r2, #0
 	mov	r1, r2
 	bl	gc_add_sblk
 	cmp	r0, #0
-	beq	.L862
+	beq	.L858
 	adds	r4, r4, #1
 	uxth	r4, r4
 	cmp	r5, r4
-	bhi	.L862
-.L863:
-	ldr	r3, .L951+44
-	ldr	r2, .L951+28
+	bhi	.L858
+.L859:
+	ldr	r3, .L947+52
+	ldr	r2, .L947+32
 	ldrh	r1, [r3]
 	ldrh	r3, [r2]
 	cmp	r3, r1, lsr #1
-	bls	.L860
+	bls	.L856
 	sub	r3, r3, r1, lsr #3
-	b	.L950
-.L846:
+	b	.L946
+.L842:
 	movs	r3, #0
 	strh	r3, [r7]	@ movhi
-	b	.L850
-.L849:
+	b	.L846
+.L845:
 	add	r8, r8, #1
-	b	.L845
-.L854:
+	b	.L841
+.L850:
 	movs	r3, #0
 	strh	r3, [r7]	@ movhi
-	b	.L857
-.L856:
-	add	r10, r10, #1
 	b	.L853
-.L859:
+.L852:
+	add	r10, r10, #1
+	b	.L849
+.L855:
 	ldrh	r3, [r5]
 	ldrh	r2, [r1]
 	cmp	r3, r2
 	itt	hi
 	subhi	r3, r3, r2, lsr #3
 	strhhi	r3, [r5]	@ movhi
-	b	.L852
-.L861:
+	b	.L848
+.L857:
 	movs	r3, #0
 	strh	r3, [r10]	@ movhi
-.L864:
+.L860:
 	cmp	r4, r5
-	bcs	.L863
-	ldr	r2, .L951+28
-	ldr	r1, .L951+44
+	bcs	.L859
+	ldr	r2, .L947+32
+	ldr	r1, .L947+52
 	ldrh	r3, [r2]
 	ldrh	r1, [r1]
 	cmp	r3, r1
-	bcs	.L860
+	bcs	.L856
 	add	r3, r3, r1, lsr #3
-.L950:
+.L946:
 	strh	r3, [r2]	@ movhi
-.L860:
-	ldr	r3, .L951+20
+.L856:
+	ldr	r3, .L947+24
 	ldr	r3, [r3]
 	lsls	r3, r3, #23
-	bpl	.L896
+	bpl	.L892
 	str	r6, [sp]
 	mov	r3, r4
 	ldr	r2, [sp, #20]
-	ldr	r1, [sp, #8]
-	ldr	r0, .L951+56
+	ldr	r1, [sp, #12]
+	ldr	r0, .L947+64
 	bl	printf
-.L896:
+.L892:
 	mov	r0, r4
-	b	.L840
-.L862:
+	b	.L836
+.L858:
 	adds	r7, r7, #1
 	uxth	r3, r7
 	cmp	r5, r3
-	bhi	.L865
-	b	.L864
-.L952:
+	bhi	.L861
+	b	.L860
+.L948:
 	.align	2
-.L951:
-	.word	.LANCHOR10
-	.word	.LANCHOR71
+.L947:
+	.word	.LANCHOR12
+	.word	.LANCHOR70
+	.word	.LANCHOR87
+	.word	.LANCHOR88
+	.word	.LANCHOR89
 	.word	.LANCHOR90
-	.word	.LANCHOR91
-	.word	.LANCHOR92
-	.word	.LANCHOR14
+	.word	.LANCHOR19
 	.word	.LC57
-	.word	.LANCHOR70
+	.word	.LANCHOR69
+	.word	.LANCHOR91
 	.word	.LANCHOR93
+	.word	.LANCHOR92
+	.word	.LANCHOR11
 	.word	.LANCHOR94
-	.word	.LANCHOR9
-	.word	.LANCHOR95
-	.word	.LANCHOR86
-	.word	.LANCHOR80
+	.word	.LANCHOR85
+	.word	.LANCHOR79
 	.word	.LC58
-.L844:
-	ldr	r1, .L953
+	.word	.LANCHOR95
+.L840:
+	ldr	r1, .L949
 	cmp	r6, #1
-	ldr	r4, .L953+4
+	ldr	r4, .L949+4
 	ldrb	r1, [r1]	@ zero_extendqisi2
 	ldrh	r4, [r4]
 	smulbb	r1, r1, r4
 	uxth	r1, r1
-	str	r1, [sp, #12]
-	bne	.L866
-	cbz	r2, .L866
+	str	r1, [sp, #16]
+	bne	.L862
+	cbz	r2, .L862
 	ldrh	r0, [r0, #80]
 	movw	r1, #65535
 	cmp	r0, r1
-	beq	.L899
-	ldr	r0, [sp, #12]
+	beq	.L895
+	ldr	r0, [sp, #16]
 	ldrh	r1, [r3, #2102]
 	subs	r1, r0, r1
 	uxth	r1, r1
-	str	r1, [sp, #12]
-.L899:
+	str	r1, [sp, #16]
+.L895:
 	movs	r6, #8
-.L866:
+.L862:
 	movs	r5, #0
-	strh	r5, [r3, #2106]	@ movhi
-	ldr	r3, .L953+8
+	strh	r5, [r3, #2180]	@ movhi
+	ldr	r3, .L949+8
 	strh	r5, [r3]	@ movhi
 	ldr	r3, [sp, #20]
 	ands	r3, r3, #1
 	str	r3, [sp, #24]
-	beq	.L900
-	ldr	r3, .L953+12
-	ldr	r1, .L953+16
+	beq	.L896
+	ldr	r3, .L949+12
+	ldr	r1, .L949+16
 	ldrh	r3, [r3]
 	ldrh	r1, [r1]
 	cmp	r3, r1, lsr #2
-	bhi	.L868
-	ldr	r1, .L953+20
+	bhi	.L864
+	ldr	r1, .L949+20
 	ldrh	r1, [r1]
 	cmp	r1, r3
-	bcs	.L901
-.L868:
+	bcs	.L897
+.L864:
 	cmp	r2, #1
-	bls	.L870
-.L872:
+	bls	.L866
+.L868:
 	movs	r4, #0
-.L871:
-	ldr	r8, .L953+52
+.L867:
+	ldr	r10, .L949+64
 	movs	r5, #0
-	ldr	r10, .L953+48
-	movs	r7, #64
-.L875:
-	ldrh	r3, [r8]
-	mov	r0, r3
+	mov	r8, #64
+.L871:
+	ldrh	r3, [r10]
+	ldr	r0, .L949+24
+	mov	r1, r3
 	str	r3, [sp, #28]
-	bl	zftl_get_gc_node.part.9
+	bl	_list_get_gc_head_node
 	movw	r2, #65535
 	mov	fp, r0
 	cmp	r0, r2
-	beq	.L873
+	beq	.L869
 	ldr	r3, [sp, #28]
+	ldr	r2, [sp, #12]
+	adds	r1, r3, #1
+	strh	r1, [r10]	@ movhi
 	movs	r1, #0
-	ldr	r2, [sp, #8]
-	adds	r3, r3, #1
-	strh	r3, [r8]	@ movhi
 	bl	gc_add_sblk
 	cmp	r0, #0
-	beq	.L874
-	ldr	r3, [r10]
+	beq	.L870
+	ldr	r3, .L949+28
 	adds	r4, r4, #1
 	uxth	r4, r4
-	ldrh	r3, [r3, fp, lsl #1]
+	ldr	r3, [r3]
 	cmp	r4, r6
+	ldrh	r3, [r3, fp, lsl #1]
 	add	r5, r5, r3
 	uxth	r5, r5
-	bcs	.L869
-	ldr	r3, [sp, #12]
+	bcs	.L865
+	ldr	r3, [sp, #16]
 	cmp	r3, r5
-	bcc	.L869
-	ldr	r3, .L953+20
-	ldr	r2, .L953+12
+	bcc	.L865
+	ldr	r3, .L949+20
+	ldr	r2, .L949+12
 	ldrh	r3, [r3]
 	ldrh	r2, [r2]
 	cmp	r3, r2, lsl #1
-	ble	.L874
-.L869:
-	ldr	r3, .L953+20
+	ble	.L870
+.L865:
+	ldr	r3, .L949+20
 	ldrh	r2, [r3]
-	ldr	r3, .L953+16
+	ldr	r3, .L949+16
 	ldrh	r3, [r3]
 	cmp	r2, r3, lsr #2
-	bhi	.L897
-	ldr	r3, .L953+12
+	bhi	.L893
+	ldr	r3, .L949+12
 	ldrh	r3, [r3]
 	adds	r3, r3, #8
 	cmp	r2, r3
-	ble	.L867
-.L897:
-	ldr	r3, [sp, #12]
+	ble	.L863
+.L893:
+	ldr	r3, [sp, #16]
 	cmp	r3, r5
-	bls	.L867
-	ldr	r8, .L953+40
-	movs	r7, #64
-	ldr	r10, .L953+48
-.L878:
-	ldrh	r3, [r8]
-	movs	r1, #3
-	mov	r0, r3
+	bls	.L863
+	ldr	r10, .L949+56
+	mov	r8, #64
+.L874:
+	ldrh	r3, [r10]
+	ldr	r0, .L949+32
+	mov	r1, r3
 	str	r3, [sp, #28]
-	bl	zftl_get_gc_node
+	bl	_list_get_gc_head_node
 	movw	r2, #65535
 	mov	fp, r0
 	cmp	r0, r2
 	ldr	r3, [sp, #28]
-	beq	.L876
+	beq	.L872
 	adds	r3, r3, #1
-	ldr	r2, [sp, #8]
+	ldr	r2, [sp, #12]
 	movs	r1, #0
-	strh	r3, [r8]	@ movhi
+	strh	r3, [r10]	@ movhi
 	bl	gc_add_sblk
 	cmp	r0, #0
-	beq	.L877
-	ldr	r3, [r10]
+	beq	.L873
+	ldr	r3, .L949+28
 	adds	r4, r4, #1
 	uxth	r4, r4
-	ldrh	r3, [r3, fp, lsl #1]
+	ldr	r3, [r3]
 	cmp	r4, r6
+	ldrh	r3, [r3, fp, lsl #1]
 	add	r5, r5, r3
 	uxth	r5, r5
-	bcs	.L867
-	ldr	r3, [sp, #12]
+	bcs	.L863
+	ldr	r3, [sp, #16]
 	cmp	r3, r5
-	bcs	.L877
-.L867:
+	bcs	.L873
+.L863:
 	ldr	r3, [sp, #20]
 	lsls	r2, r3, #30
-	bpl	.L879
-	ldr	r3, .L953+24
+	bpl	.L875
+	ldr	r3, .L949+36
 	ldrh	r3, [r3]
 	cmp	r3, #32
-	bls	.L879
-	ldr	r3, [sp, #12]
+	bls	.L875
+	ldr	r3, [sp, #16]
 	cmp	r5, r3
-	bcs	.L879
-	ldr	r8, .L953+56
-	mov	fp, #64
-.L885:
-	ldrh	r10, [r8]
-	movs	r1, #5
-	mov	r0, r10
-	bl	zftl_get_gc_node
-	movw	r3, #65535
-	mov	r7, r0
-	cmp	r0, r3
-	beq	.L880
+	bcs	.L875
+	ldr	r10, .L949+68
+	movs	r3, #64
+.L881:
+	ldrh	fp, [r10]
+	ldr	r0, .L949+40
+	str	r3, [sp, #28]
+	mov	r1, fp
+	bl	_list_get_gc_head_node
+	movw	r2, #65535
+	mov	r8, r0
+	cmp	r0, r2
+	beq	.L876
 	cmp	r6, #1
-	add	r0, r10, #1
-	strh	r0, [r8]	@ movhi
-	bne	.L881
-	ldr	r3, .L953
-	ldr	r2, .L953+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	ldrh	r2, [r2]
-	smulbb	r3, r3, r2
-	ldr	r2, .L953+28
+	add	r1, fp, #1
+	strh	r1, [r10]	@ movhi
+	ldr	r3, [sp, #28]
+	bne	.L877
+	ldr	r2, .L949
+	ldr	r1, .L949+4
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	ldrh	r1, [r1]
+	smulbb	r2, r2, r1
+	ldr	r1, .L949+44
+	ldrh	r1, [r1]
+	sub	r2, r2, r1, lsr #3
+	ldr	r1, .L949+48
+	strh	r2, [r1]	@ movhi
+.L877:
+	ldr	fp, .L949+28
+	str	r3, [sp, #28]
+	ldr	r2, [fp]
+	ldrh	r1, [r2, r8, lsl #1]
+	ldr	r2, .L949+48
 	ldrh	r2, [r2]
-	sub	r3, r3, r2, lsr #3
-	ldr	r2, .L953+32
-	strh	r3, [r2]	@ movhi
-.L881:
-	ldr	r10, .L953+48
-	ldr	r3, [r10]
-	ldrh	r2, [r3, r7, lsl #1]
-	ldr	r3, .L953+32
-	ldrh	r3, [r3]
-	cmp	r2, r3
-	bcs	.L882
-	ldr	r2, [sp, #8]
+	cmp	r1, r2
+	bcs	.L878
+	ldr	r2, [sp, #12]
 	movs	r1, #0
-	mov	r0, r7
+	mov	r0, r8
 	bl	gc_add_sblk
+	ldr	r3, [sp, #28]
 	cmp	r0, #0
-	beq	.L883
-	ldr	r0, [sp, #16]
+	beq	.L879
+	ldr	r2, [fp]
 	adds	r4, r4, #1
 	uxth	r4, r4
-	adds	r0, r0, #1
+	adds	r7, r7, #1
+	uxth	r7, r7
+	ldrh	r2, [r2, r8, lsl #1]
 	cmp	r4, r6
-	uxth	r3, r0
-	str	r3, [sp, #16]
-	ldr	r3, [r10]
-	ldrh	r3, [r3, r7, lsl #1]
-	add	r5, r5, r3
+	add	r5, r5, r2
 	uxth	r5, r5
-	bcs	.L884
-	ldr	r3, [sp, #12]
-	cmp	r3, r5
-	bcs	.L883
-.L884:
+	bcs	.L880
+	ldr	r2, [sp, #16]
+	cmp	r2, r5
+	bcs	.L879
+.L880:
 	cmp	r4, r6
-	ldr	r0, .L953+28
-	ldr	r2, .L953+32
-	bcc	.L886
-	ldr	r3, [sp, #16]
-	cmp	r3, #0
-	bne	.L887
-	ldr	r3, .L953+24
+	ldr	r0, .L949+44
+	ldr	r2, .L949+48
+	bcc	.L882
+	cmp	r7, #0
+	bne	.L883
+	ldr	r3, .L949+36
 	ldrh	r1, [r3]
-	ldr	r3, .L953+36
+	ldr	r3, .L949+52
 	ldrh	r3, [r3]
 	cmp	r1, r3
-	bls	.L887
-.L886:
+	bls	.L883
+.L882:
 	ldrh	r3, [r0]
 	ldrh	r1, [r2]
 	lsrs	r0, r3, #3
-	ldr	r3, .L953+4
+	ldr	r3, .L949+4
 	ldrh	r7, [r3]
-	ldr	r3, .L953
+	ldr	r3, .L949
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	muls	r3, r7, r3
 	subs	r3, r3, r0
 	cmp	r1, r3
-	bge	.L879
+	bge	.L875
 	adds	r3, r1, r0
 	strh	r3, [r2]	@ movhi
-.L879:
+.L875:
 	ldr	r3, [sp, #24]
 	cmp	r3, #0
-	beq	.L860
+	beq	.L856
 	uxth	fp, r6
 	cmp	r4, fp
-	bcs	.L860
-	ldr	r3, [sp, #12]
+	bcs	.L856
+	ldr	r3, [sp, #16]
 	cmp	r5, r3
-	bcs	.L860
-	ldr	r3, .L953+40
+	bcs	.L856
+	ldr	r3, .L949+56
 	mov	r8, #64
-	ldr	r7, .L953+44
-.L895:
+.L891:
 	ldrh	r2, [r3]
-	movs	r1, #3
-	str	r3, [sp, #24]
-	mov	r0, r2
-	str	r2, [sp, #16]
-	bl	zftl_get_gc_node
+	ldr	r0, .L949+32
+	str	r3, [sp, #28]
+	mov	r1, r2
+	str	r2, [sp, #24]
+	bl	_list_get_gc_head_node
 	movw	r1, #65535
 	mov	r10, r0
 	cmp	r0, r1
-	ldr	r2, [sp, #16]
-	ldr	r3, [sp, #24]
-	beq	.L889
+	ldr	r7, .L949+60
+	ldr	r2, [sp, #24]
+	ldr	r3, [sp, #28]
+	beq	.L885
 	adds	r2, r2, #1
 	strh	r2, [r3]	@ movhi
-	ldr	r2, .L953+48
+	ldr	r2, .L949+28
 	ldr	r2, [r2]
 	ldrh	r1, [r2, r0, lsl #1]
 	ldrh	r2, [r7]
 	cmp	r1, r2
-	bcs	.L890
-	ldr	r2, .L953+16
+	bcs	.L886
+	ldr	r2, .L949+16
 	ldrh	r1, [r2]
-	ldr	r2, .L953+20
+	ldr	r2, .L949+20
 	ldrh	r2, [r2]
 	cmp	r2, r1, lsr #1
-	bls	.L891
-.L890:
-	ldr	r2, [sp, #8]
+	bls	.L887
+.L886:
+	ldr	r2, [sp, #12]
 	movs	r1, #0
 	mov	r0, r10
-	str	r3, [sp, #16]
+	str	r3, [sp, #24]
 	bl	gc_add_sblk
-	ldr	r3, [sp, #16]
+	ldr	r3, [sp, #24]
 	cmp	r0, #0
-	beq	.L892
-	ldr	r2, .L953+48
+	beq	.L888
+	ldr	r2, .L949+28
 	adds	r4, r4, #1
 	uxth	r4, r4
 	ldr	r2, [r2]
@@ -5635,126 +5626,130 @@ gc_search_src_blk:
 	ldrh	r2, [r2, r10, lsl #1]
 	add	r5, r5, r2
 	uxth	r5, r5
-	bls	.L893
-	ldr	r2, [sp, #12]
+	bls	.L889
+	ldr	r2, [sp, #16]
 	cmp	r2, r5
-	bcs	.L892
-.L894:
-	ldr	r3, .L953+28
+	bcs	.L888
+.L890:
+	ldr	r3, .L949+44
 	ldrh	r2, [r3]
 	ldrh	r3, [r7]
 	cmp	r3, r2, lsr #1
-	bls	.L860
+	bls	.L856
 	sub	r3, r3, r2, lsr #3
 	strh	r3, [r7]	@ movhi
-	b	.L860
-.L954:
+	b	.L856
+.L950:
 	.align	2
-.L953:
-	.word	.LANCHOR80
-	.word	.LANCHOR86
+.L949:
+	.word	.LANCHOR79
+	.word	.LANCHOR85
 	.word	.LANCHOR96
 	.word	.LANCHOR97
 	.word	.LANCHOR98
 	.word	.LANCHOR99
-	.word	.LANCHOR93
 	.word	.LANCHOR95
+	.word	.LANCHOR11
+	.word	.LANCHOR90
+	.word	.LANCHOR91
+	.word	.LANCHOR92
+	.word	.LANCHOR94
 	.word	.LANCHOR100
 	.word	.LANCHOR101
-	.word	.LANCHOR91
+	.word	.LANCHOR88
 	.word	.LANCHOR102
-	.word	.LANCHOR9
-	.word	.LANCHOR90
-	.word	.LANCHOR92
-.L870:
-	ldr	r4, .L955
+	.word	.LANCHOR87
+	.word	.LANCHOR89
+.L866:
+	ldr	r4, .L951
 	lsrs	r3, r3, #2
-	movs	r0, #0
+	movs	r1, #0
+	ldr	r0, .L951+4
 	strh	r3, [r4]	@ movhi
-	bl	zftl_get_gc_node.part.9
+	bl	_list_get_gc_head_node
 	movw	r2, #65535
 	cmp	r0, r2
-	beq	.L872
-	ldr	r2, .L955+4
+	beq	.L868
+	ldr	r2, .L951+8
 	ldr	r1, [r2]
-	ldr	r2, .L955+8
+	ldr	r2, .L951+12
 	ldrh	r3, [r1, r0, lsl #1]
 	ldrh	r2, [r2]
 	cmp	r3, r2, lsr #2
-	bcs	.L872
+	bcs	.L868
 	movs	r3, #1
-	ldr	r2, [sp, #8]
+	ldr	r2, [sp, #12]
 	movs	r1, #0
 	strh	r3, [r4]	@ movhi
 	bl	gc_add_sblk
 	adds	r4, r0, #0
 	it	ne
 	movne	r4, #1
-	b	.L871
-.L873:
+	b	.L867
+.L869:
 	movs	r3, #0
-	strh	r3, [r8]	@ movhi
-	b	.L869
-.L874:
-	subs	r7, r7, #1
-	uxth	r7, r7
-	cmp	r7, #0
-	bne	.L875
-	b	.L869
-.L876:
+	strh	r3, [r10]	@ movhi
+	b	.L865
+.L870:
+	add	r8, r8, #-1
+	uxth	r8, r8
+	cmp	r8, #0
+	bne	.L871
+	b	.L865
+.L872:
 	cmp	r3, #64
-	bls	.L867
+	bls	.L863
 	movs	r3, #0
-	strh	r3, [r8]	@ movhi
-	b	.L867
-.L877:
-	subs	r7, r7, #1
-	uxth	r7, r7
-	cmp	r7, #0
-	bne	.L878
-	b	.L867
-.L900:
+	strh	r3, [r10]	@ movhi
+	b	.L863
+.L873:
+	add	r8, r8, #-1
+	uxth	r8, r8
+	cmp	r8, #0
+	bne	.L874
+	b	.L863
+.L896:
 	ldr	r5, [sp, #24]
 	mov	r4, r5
-	b	.L867
-.L882:
-	ldr	r3, .L955+12
+	b	.L863
+.L878:
+	ldr	r3, .L951+16
 	movs	r2, #0
 	strh	r2, [r3]	@ movhi
-	b	.L884
-.L880:
+	b	.L880
+.L876:
 	movs	r3, #0
-	strh	r3, [r8]	@ movhi
-	b	.L884
+	strh	r3, [r10]	@ movhi
+	b	.L880
+.L879:
+	subs	r3, r3, #1
+	uxth	r3, r3
+	cmp	r3, #0
+	bne	.L881
+	b	.L880
 .L883:
-	add	fp, fp, #-1
-	uxth	fp, fp
-	cmp	fp, #0
-	bne	.L885
-	b	.L884
-.L887:
-	ldr	r1, .L955+16
+	ldr	r1, .L951+20
 	ldrh	r0, [r0]
 	ldrh	r3, [r2]
 	ldrb	r1, [r1]	@ zero_extendqisi2
 	muls	r1, r0, r1
 	cmp	r3, r1
-	ble	.L860
+	ble	.L856
 	sub	r3, r3, r0, lsr #3
-	b	.L950
-.L889:
+	b	.L946
+.L885:
 	cmp	r2, #64
-	bls	.L891
+	bls	.L887
 	movs	r2, #0
 	strh	r2, [r3]	@ movhi
-.L891:
+.L887:
 	cmp	r4, fp
-	bcc	.L894
-.L893:
-	ldr	r3, .L955+8
+	bcc	.L890
+.L889:
+	ldr	r3, .L951+12
 	ldrh	r2, [r7]
 	ldrh	r1, [r3]
-	ldr	r3, .L955+16
+	ldr	r3, .L951+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	muls	r3, r1, r3
 	subs	r3, r3, #32
@@ -5762,60 +5757,93 @@ gc_search_src_blk:
 	itt	lt
 	addlt	r2, r2, r1, lsr #3
 	strhlt	r2, [r7]	@ movhi
-	b	.L860
-.L892:
+	b	.L856
+.L888:
 	add	r8, r8, #-1
 	uxth	r8, r8
 	cmp	r8, #0
-	bne	.L895
-	b	.L891
-.L901:
+	bne	.L891
+	b	.L887
+.L897:
 	mov	r4, r5
-	b	.L869
-.L956:
+	b	.L865
+.L952:
 	.align	2
-.L955:
-	.word	.LANCHOR90
-	.word	.LANCHOR9
+.L951:
+	.word	.LANCHOR87
 	.word	.LANCHOR95
-	.word	.LANCHOR92
-	.word	.LANCHOR80
+	.word	.LANCHOR11
+	.word	.LANCHOR94
+	.word	.LANCHOR89
+	.word	.LANCHOR79
 	.size	gc_search_src_blk, .-gc_search_src_blk
-	.section	.text.zftl_insert_free_list,"ax",%progbits
+	.section	.text.zftl_get_gc_node,"ax",%progbits
 	.align	1
-	.global	zftl_insert_free_list
+	.global	zftl_get_gc_node
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	zftl_insert_free_list, %function
-zftl_insert_free_list:
+	.type	zftl_get_gc_node, %function
+zftl_get_gc_node:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L961
+	cmp	r1, #5
+	bne	.L954
 	mov	r1, r0
-	ldr	r3, [r3]
-	add	r3, r3, r0, lsl #2
-	ldrb	r3, [r3, #2]	@ zero_extendqisi2
-	ands	r3, r3, #24
-	bne	.L958
-	ldr	r2, .L961+4
-	ldr	r0, .L961+8
-.L960:
-	b	_insert_free_list
-.L958:
-	cmp	r3, #16
-	ittee	eq
-	ldreq	r2, .L961+12
-	ldreq	r0, .L961+16
-	ldrne	r2, .L961+20
-	ldrne	r0, .L961+24
-	b	.L960
+	ldr	r0, .L957
+.L956:
+	b	_list_get_gc_head_node
+.L954:
+	cmp	r1, #2
+	mov	r1, r0
+	ite	eq
+	ldreq	r0, .L957+4
+	ldrne	r0, .L957+8
+	b	.L956
+.L958:
+	.align	2
+.L957:
+	.word	.LANCHOR92
+	.word	.LANCHOR95
+	.word	.LANCHOR90
+	.size	zftl_get_gc_node, .-zftl_get_gc_node
+	.section	.text.zftl_insert_free_list,"ax",%progbits
+	.align	1
+	.global	zftl_insert_free_list
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	zftl_insert_free_list, %function
+zftl_insert_free_list:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L963
+	mov	r1, r0
+	ldr	r3, [r3]
+	add	r3, r3, r0, lsl #2
+	ldrb	r3, [r3, #2]	@ zero_extendqisi2
+	ands	r3, r3, #24
+	bne	.L960
+	ldr	r2, .L963+4
+	ldr	r0, .L963+8
 .L962:
+	b	_insert_free_list
+.L960:
+	cmp	r3, #16
+	ittee	eq
+	ldreq	r2, .L963+12
+	ldreq	r0, .L963+16
+	ldrne	r2, .L963+20
+	ldrne	r0, .L963+24
+	b	.L962
+.L964:
 	.align	2
-.L961:
-	.word	.LANCHOR7
+.L963:
+	.word	.LANCHOR9
 	.word	.LANCHOR103
 	.word	.LANCHOR104
 	.word	.LANCHOR105
@@ -5835,42 +5863,42 @@ zftl_insert_data_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L968
+	ldr	r3, .L970
 	mov	r1, r0
 	ldr	r3, [r3]
 	add	r3, r3, r0, lsl #2
 	ldrb	r3, [r3, #2]	@ zero_extendqisi2
 	and	r3, r3, #224
 	cmp	r3, #64
-	bne	.L964
-	ldr	r2, .L968+4
-	ldr	r0, .L968+8
-.L967:
+	bne	.L966
+	ldr	r2, .L970+4
+	ldr	r0, .L970+8
+.L969:
 	b	_insert_data_list
-.L964:
+.L966:
 	cmp	r3, #96
+	bne	.L967
+	ldr	r2, .L970+12
+	ldr	r0, .L970+16
+	b	.L969
+.L967:
+	cmp	r3, #160
 	bne	.L965
-	ldr	r2, .L968+12
-	ldr	r0, .L968+16
-	b	.L967
+	ldr	r2, .L970+20
+	ldr	r0, .L970+24
+	b	.L969
 .L965:
-	cmp	r3, #160
-	bne	.L963
-	ldr	r2, .L968+20
-	ldr	r0, .L968+24
-	b	.L967
-.L963:
 	bx	lr
-.L969:
+.L971:
 	.align	2
-.L968:
-	.word	.LANCHOR7
+.L970:
+	.word	.LANCHOR9
 	.word	.LANCHOR97
-	.word	.LANCHOR12
+	.word	.LANCHOR95
 	.word	.LANCHOR99
-	.word	.LANCHOR89
-	.word	.LANCHOR93
-	.word	.LANCHOR88
+	.word	.LANCHOR90
+	.word	.LANCHOR91
+	.word	.LANCHOR92
 	.size	zftl_insert_data_list, .-zftl_insert_data_list
 	.section	.text.zftl_gc_get_free_sblk,"ax",%progbits
 	.align	1
@@ -5885,71 +5913,71 @@ zftl_gc_get_free_sblk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, lr}
 	movw	r5, #65535
-	ldr	r8, .L991+48
+	ldr	r8, .L993+48
 	mov	r4, r0
 	mov	r6, r1
 	ldr	r3, [r8]
 	ldrh	r7, [r3, #588]
 	cmp	r7, r5
-	beq	.L971
-	cbnz	r0, .L971
+	beq	.L973
+	cbnz	r0, .L973
 	mov	r1, r7
-	ldr	r0, .L991
+	ldr	r0, .L993
 	bl	printf
 	ldr	r3, [r8]
 	strh	r5, [r3, #588]	@ movhi
-.L972:
+.L974:
 	mov	r0, r7
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L971:
-	ldr	r3, .L991+4
-	ldr	r5, .L991+8
+.L973:
+	ldr	r3, .L993+4
+	ldr	r5, .L993+8
 	ldrh	r1, [r3]
 	ldrh	r3, [r5]
 	cmp	r1, r3
-	bcc	.L973
-	ldr	r2, .L991+12
+	bcc	.L975
+	ldr	r2, .L993+12
 	ldrh	r2, [r2]
 	cmp	r2, r1
-	bls	.L974
+	bls	.L976
 	cmp	r3, #0
-	beq	.L974
-.L973:
+	beq	.L976
+.L975:
 	cmp	r4, #0
-	bne	.L975
+	bne	.L977
 	lsrs	r1, r3, #2
-.L976:
-	ldr	r2, .L991+8
-	ldr	r0, .L991+16
-.L990:
+.L978:
+	ldr	r2, .L993+8
+	ldr	r0, .L993+16
+.L992:
 	bl	_list_pop_index_node
 	uxth	r7, r0
 	movw	r3, #65535
 	cmp	r7, r3
-	bne	.L979
+	bne	.L981
 	ldrh	r3, [r5]
 	mov	r2, r6
 	mov	r1, r7
-	ldr	r0, .L991+20
+	ldr	r0, .L993+20
 	str	r3, [sp, #4]
-	ldr	r3, .L991+12
+	ldr	r3, .L993+12
 	ldrh	r3, [r3]
 	str	r3, [sp]
-	ldr	r3, .L991+24
+	ldr	r3, .L993+24
 	ldr	r3, [r3]
 	bl	printf
-.L979:
+.L981:
 	cmp	r4, #0
-	beq	.L972
-	ldr	r3, .L991+28
+	beq	.L974
+	ldr	r3, .L993+28
 	ldr	r3, [r3]
 	lsls	r3, r3, #23
-	bpl	.L972
-	ldr	r3, .L991+32
-	ldr	r1, .L991+36
-	ldr	r0, .L991+40
+	bpl	.L974
+	ldr	r3, .L993+32
+	ldr	r1, .L993+36
+	ldr	r0, .L993+40
 	ldr	r3, [r3]
 	ldr	r1, [r1]
 	ldrh	r1, [r1, r7, lsl #1]
@@ -5966,24 +5994,24 @@ zftl_gc_get_free_sblk:
 	ubfx	r3, r2, #3, #2
 	lsrs	r2, r2, #5
 	bl	printf
-	b	.L972
-.L975:
+	b	.L974
+.L977:
 	rsb	r1, r1, r1, lsl #3
 	ubfx	r1, r1, #3, #16
-	b	.L976
-.L974:
-	cbz	r4, .L980
+	b	.L978
+.L976:
+	cbz	r4, .L982
 	lsrs	r1, r1, #3
-.L978:
-	ldr	r2, .L991+4
-	ldr	r0, .L991+44
-	b	.L990
 .L980:
+	ldr	r2, .L993+4
+	ldr	r0, .L993+44
+	b	.L992
+.L982:
 	mov	r1, r4
-	b	.L978
-.L992:
+	b	.L980
+.L994:
 	.align	2
-.L991:
+.L993:
 	.word	.LC59
 	.word	.LANCHOR105
 	.word	.LANCHOR107
@@ -5991,12 +6019,12 @@ zftl_gc_get_free_sblk:
 	.word	.LANCHOR108
 	.word	.LC60
 	.word	.LANCHOR104
-	.word	.LANCHOR14
-	.word	.LANCHOR7
+	.word	.LANCHOR19
 	.word	.LANCHOR9
+	.word	.LANCHOR11
 	.word	.LC61
 	.word	.LANCHOR106
-	.word	.LANCHOR10
+	.word	.LANCHOR12
 	.size	zftl_gc_get_free_sblk, .-zftl_gc_get_free_sblk
 	.section	.text.zftl_get_free_sblk,"ax",%progbits
 	.align	1
@@ -6010,98 +6038,105 @@ zftl_get_free_sblk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	cmp	r1, #5
-	push	{r0, r1, r2, r4, r5, r6, r7, lr}
-	mov	r5, r1
-	bne	.L994
-	ldr	r3, .L1015
-	ldr	r2, .L1015+4
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	mov	r5, r0
+	mov	r6, r1
+	bne	.L996
+	ldr	r3, .L1017
+	ldr	r2, .L1017+4
 	ldrh	r3, [r3]
 	ldrh	r1, [r2]
 	cmp	r3, r1
-	bcc	.L995
-	ldr	r2, .L1015+8
+	bcc	.L997
+	ldr	r2, .L1017+8
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bls	.L996
-	cbz	r1, .L996
-.L995:
-	ldr	r2, .L1015+4
+	bls	.L998
+	cbz	r1, .L998
+.L997:
+	ldr	r2, .L1017+4
 	lsrs	r1, r1, #1
-.L1014:
-	ldr	r0, .L1015+12
-	b	.L1013
-.L996:
-	ldr	r2, .L1015
+.L1016:
+	ldr	r0, .L1017+12
+	b	.L1015
+.L998:
+	ldr	r2, .L1017
 	movs	r1, #0
-	ldr	r0, .L1015+16
-.L1013:
+	ldr	r0, .L1017+16
+.L1015:
 	bl	_list_pop_index_node
 	uxth	r4, r0
 	movw	r3, #65535
 	cmp	r4, r3
-	bne	.L999
-	ldr	r3, .L1015+4
-	mov	r2, r5
+	bne	.L1001
+	ldr	r3, .L1017+4
+	mov	r2, r6
 	mov	r1, r4
-	ldr	r0, .L1015+20
+	ldr	r0, .L1017+20
 	ldrh	r3, [r3]
 	str	r3, [sp, #4]
-	ldr	r3, .L1015+8
+	ldr	r3, .L1017+8
 	ldrh	r3, [r3]
 	str	r3, [sp]
-	ldr	r3, .L1015+24
+	ldr	r3, .L1017+24
 	ldr	r3, [r3]
 	bl	printf
-	b	.L999
-.L994:
-	ldr	r7, .L1015+28
-	movw	r6, #65535
-	ldr	r3, [r7]
+	b	.L1001
+.L996:
+	ldr	r8, .L1017+32
+	movw	r7, #65535
+	ldr	r3, [r8]
 	ldrh	r4, [r3, #590]
-	cmp	r4, r6
-	beq	.L998
+	cmp	r4, r7
+	beq	.L1000
 	cmp	r1, #1
-	beq	.L998
+	beq	.L1000
 	mov	r1, r4
-	ldr	r0, .L1015+32
+	ldr	r0, .L1017+28
 	bl	printf
-	ldr	r3, [r7]
-	strh	r6, [r3, #590]	@ movhi
-.L999:
+	ldr	r3, [r8]
+	strh	r7, [r3, #590]	@ movhi
+.L1001:
 	mov	r0, r4
-	add	sp, sp, #12
+	add	sp, sp, #8
 	@ sp needed
-	pop	{r4, r5, r6, r7, pc}
-.L998:
-	ldr	r3, .L1015+8
-	ldr	r2, .L1015+4
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1000:
+	ldr	r3, .L1017+8
+	ldr	r7, .L1017+4
+	ldrh	r2, [r3]
+	ldrh	r1, [r7]
+	cmp	r2, r1
+	bcc	.L1002
+	ldr	r3, .L1017
 	ldrh	r3, [r3]
-	ldrh	r2, [r2]
 	cmp	r3, r2
-	bcc	.L1000
-	ldr	r1, .L1015
-	ldrh	r1, [r1]
-	cmp	r1, r3
-	bls	.L1001
-	cbz	r2, .L1001
-.L1000:
-	cmp	r5, #1
-	it	eq
-	lsreq	r0, r2, #1
-	ldr	r2, .L1015+4
-	mov	r1, r0
-	b	.L1014
-.L1001:
-	cmp	r5, #1
-	ldr	r2, .L1015+8
+	bls	.L1003
+	cbz	r1, .L1003
+.L1002:
+	bl	get_ink_scaned_blk
+	movw	r3, #65535
+	mov	r4, r0
+	cmp	r0, r3
+	bne	.L1001
+	cmp	r6, #1
+	ldr	r2, .L1017+4
+	itt	eq
+	ldrheq	r5, [r7]
+	lsreq	r5, r5, #1
+	mov	r1, r5
+	b	.L1016
+.L1003:
+	cmp	r6, #1
+	ldr	r0, .L1017+24
 	it	eq
-	lsreq	r0, r3, #1
-	mov	r1, r0
-	ldr	r0, .L1015+24
-	b	.L1013
-.L1016:
+	lsreq	r5, r2, #1
+	ldr	r2, .L1017+8
+	mov	r1, r5
+	b	.L1015
+.L1018:
 	.align	2
-.L1015:
+.L1017:
 	.word	.LANCHOR105
 	.word	.LANCHOR107
 	.word	.LANCHOR103
@@ -6109,8 +6144,8 @@ zftl_get_free_sblk:
 	.word	.LANCHOR106
 	.word	.LC60
 	.word	.LANCHOR104
-	.word	.LANCHOR10
 	.word	.LC62
+	.word	.LANCHOR12
 	.size	zftl_get_free_sblk, .-zftl_get_free_sblk
 	.section	.text.zftl_remove_data_node,"ax",%progbits
 	.align	1
@@ -6124,42 +6159,42 @@ zftl_remove_data_node:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L1022
+	ldr	r3, .L1024
 	mov	r1, r0
 	ldr	r3, [r3]
 	add	r3, r3, r0, lsl #2
 	ldrb	r3, [r3, #2]	@ zero_extendqisi2
 	and	r3, r3, #224
 	cmp	r3, #64
-	bne	.L1018
-	ldr	r2, .L1022+4
-	ldr	r0, .L1022+8
-.L1021:
+	bne	.L1020
+	ldr	r2, .L1024+4
+	ldr	r0, .L1024+8
+.L1023:
 	b	_list_remove_node
-.L1018:
+.L1020:
 	cmp	r3, #96
+	bne	.L1021
+	ldr	r2, .L1024+12
+	ldr	r0, .L1024+16
+	b	.L1023
+.L1021:
+	cmp	r3, #160
 	bne	.L1019
-	ldr	r2, .L1022+12
-	ldr	r0, .L1022+16
-	b	.L1021
+	ldr	r2, .L1024+20
+	ldr	r0, .L1024+24
+	b	.L1023
 .L1019:
-	cmp	r3, #160
-	bne	.L1017
-	ldr	r2, .L1022+20
-	ldr	r0, .L1022+24
-	b	.L1021
-.L1017:
 	bx	lr
-.L1023:
+.L1025:
 	.align	2
-.L1022:
-	.word	.LANCHOR7
+.L1024:
+	.word	.LANCHOR9
 	.word	.LANCHOR97
-	.word	.LANCHOR12
+	.word	.LANCHOR95
 	.word	.LANCHOR99
-	.word	.LANCHOR89
-	.word	.LANCHOR93
-	.word	.LANCHOR88
+	.word	.LANCHOR90
+	.word	.LANCHOR91
+	.word	.LANCHOR92
 	.size	zftl_remove_data_node, .-zftl_remove_data_node
 	.section	.text.zftl_remove_free_node,"ax",%progbits
 	.align	1
@@ -6173,29 +6208,29 @@ zftl_remove_free_node:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L1028
+	ldr	r3, .L1030
 	mov	r1, r0
 	ldr	r3, [r3]
 	add	r3, r3, r0, lsl #2
 	ldrb	r3, [r3, #2]	@ zero_extendqisi2
 	ands	r3, r3, #24
-	bne	.L1025
-	ldr	r2, .L1028+4
-	ldr	r0, .L1028+8
-.L1027:
+	bne	.L1027
+	ldr	r2, .L1030+4
+	ldr	r0, .L1030+8
+.L1029:
 	b	_list_remove_node
-.L1025:
+.L1027:
 	cmp	r3, #16
 	ittee	eq
-	ldreq	r2, .L1028+12
-	ldreq	r0, .L1028+16
-	ldrne	r2, .L1028+20
-	ldrne	r0, .L1028+24
-	b	.L1027
-.L1029:
+	ldreq	r2, .L1030+12
+	ldreq	r0, .L1030+16
+	ldrne	r2, .L1030+20
+	ldrne	r0, .L1030+24
+	b	.L1029
+.L1031:
 	.align	2
-.L1028:
-	.word	.LANCHOR7
+.L1030:
+	.word	.LANCHOR9
 	.word	.LANCHOR103
 	.word	.LANCHOR104
 	.word	.LANCHOR105
@@ -6215,42 +6250,42 @@ zftl_list_update_data_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L1035
+	ldr	r3, .L1037
 	mov	r1, r0
 	ldr	r3, [r3]
 	add	r3, r3, r0, lsl #2
 	ldrb	r3, [r3, #2]	@ zero_extendqisi2
 	and	r3, r3, #224
 	cmp	r3, #64
-	bne	.L1031
-	ldr	r2, .L1035+4
-	ldr	r0, .L1035+8
-.L1034:
+	bne	.L1033
+	ldr	r2, .L1037+4
+	ldr	r0, .L1037+8
+.L1036:
 	b	_list_update_data_list
-.L1031:
+.L1033:
 	cmp	r3, #96
+	bne	.L1034
+	ldr	r2, .L1037+12
+	ldr	r0, .L1037+16
+	b	.L1036
+.L1034:
+	cmp	r3, #160
 	bne	.L1032
-	ldr	r2, .L1035+12
-	ldr	r0, .L1035+16
-	b	.L1034
+	ldr	r2, .L1037+20
+	ldr	r0, .L1037+24
+	b	.L1036
 .L1032:
-	cmp	r3, #160
-	bne	.L1030
-	ldr	r2, .L1035+20
-	ldr	r0, .L1035+24
-	b	.L1034
-.L1030:
 	bx	lr
-.L1036:
+.L1038:
 	.align	2
-.L1035:
-	.word	.LANCHOR7
+.L1037:
+	.word	.LANCHOR9
 	.word	.LANCHOR97
-	.word	.LANCHOR12
+	.word	.LANCHOR95
 	.word	.LANCHOR99
-	.word	.LANCHOR89
-	.word	.LANCHOR93
-	.word	.LANCHOR88
+	.word	.LANCHOR90
+	.word	.LANCHOR91
+	.word	.LANCHOR92
 	.size	zftl_list_update_data_list, .-zftl_list_update_data_list
 	.section	.text.print_list_info,"ax",%progbits
 	.align	1
@@ -6268,18 +6303,18 @@ print_list_info:
 	ldrh	r2, [r1]
 	sub	sp, sp, #36
 	ldr	r1, [r0]
-	ldr	r0, .L1041
+	ldr	r0, .L1043
 	bl	printf
 	ldr	r4, [r4]
 	cmp	r4, #0
-	beq	.L1037
-	ldr	r6, .L1041+4
+	beq	.L1039
+	ldr	r6, .L1043+4
 	movs	r5, #0
-	ldr	r7, .L1041+8
-.L1040:
+	ldr	r7, .L1043+8
+.L1042:
 	ldr	r2, [r6]
-	ldr	r0, .L1041+12
-	ldr	r3, .L1041+16
+	ldr	r0, .L1043+12
+	ldr	r3, .L1043+16
 	subs	r2, r4, r2
 	asrs	r2, r2, #1
 	ldr	r0, [r0]
@@ -6294,7 +6329,7 @@ print_list_info:
 	ubfx	r0, r0, #0, #11
 	str	r0, [sp, #20]
 	ldr	r1, [r1, r2, lsl #2]
-	ldr	r0, .L1041+20
+	ldr	r0, .L1043+20
 	ubfx	r1, r1, #11, #8
 	str	r1, [sp, #16]
 	ldrb	r1, [ip, #2]	@ zero_extendqisi2
@@ -6312,28 +6347,28 @@ print_list_info:
 	ldrh	r4, [r4]
 	movw	r3, #65535
 	cmp	r4, r3
-	beq	.L1037
+	beq	.L1039
 	ldr	r3, [r6]
 	movs	r2, #6
 	adds	r5, r5, #1
 	uxth	r5, r5
 	mla	r4, r2, r4, r3
-	ldr	r3, .L1041+24
+	ldr	r3, .L1043+24
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	bcs	.L1040
-.L1037:
+	bcs	.L1042
+.L1039:
 	add	sp, sp, #36
 	@ sp needed
 	pop	{r4, r5, r6, r7, pc}
-.L1042:
+.L1044:
 	.align	2
-.L1041:
+.L1043:
 	.word	.LC63
 	.word	.LANCHOR4
 	.word	-1431655765
+	.word	.LANCHOR11
 	.word	.LANCHOR9
-	.word	.LANCHOR7
 	.word	.LC64
 	.word	.LANCHOR109
 	.size	print_list_info, .-print_list_info
@@ -6349,28 +6384,28 @@ dump_all_list_info:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r1, .L1044
-	ldr	r0, .L1044+4
+	ldr	r1, .L1046
+	ldr	r0, .L1046+4
 	bl	print_list_info
-	ldr	r1, .L1044+8
-	ldr	r0, .L1044+12
+	ldr	r1, .L1046+8
+	ldr	r0, .L1046+12
 	bl	print_list_info
-	ldr	r1, .L1044+16
-	ldr	r0, .L1044+20
+	ldr	r1, .L1046+16
+	ldr	r0, .L1046+20
 	bl	print_list_info
-	ldr	r1, .L1044+24
-	ldr	r0, .L1044+28
+	ldr	r1, .L1046+24
+	ldr	r0, .L1046+28
 	bl	print_list_info
-	ldr	r1, .L1044+32
-	ldr	r0, .L1044+36
+	ldr	r1, .L1046+32
+	ldr	r0, .L1046+36
 	bl	print_list_info
-	ldr	r1, .L1044+40
-	ldr	r0, .L1044+44
+	ldr	r1, .L1046+40
+	ldr	r0, .L1046+44
 	pop	{r3, lr}
 	b	print_list_info
-.L1045:
+.L1047:
 	.align	2
-.L1044:
+.L1046:
 	.word	.LANCHOR103
 	.word	.LANCHOR104
 	.word	.LANCHOR105
@@ -6378,11 +6413,11 @@ dump_all_list_info:
 	.word	.LANCHOR107
 	.word	.LANCHOR108
 	.word	.LANCHOR97
-	.word	.LANCHOR12
+	.word	.LANCHOR95
 	.word	.LANCHOR99
-	.word	.LANCHOR89
-	.word	.LANCHOR93
-	.word	.LANCHOR88
+	.word	.LANCHOR90
+	.word	.LANCHOR91
+	.word	.LANCHOR92
 	.size	dump_all_list_info, .-dump_all_list_info
 	.section	.text.ftl_tmp_into_update,"ax",%progbits
 	.align	1
@@ -6396,48 +6431,48 @@ ftl_tmp_into_update:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L1051
+	ldr	r3, .L1053
 	ldr	r3, [r3]
 	ldr	r2, [r3, #16]
 	cmp	r2, #2048
-	bls	.L1047
+	bls	.L1049
 	ldr	r1, [r3, #20]
 	add	r1, r1, r2, lsr #11
 	ubfx	r2, r2, #0, #11
 	str	r2, [r3, #16]
 	str	r1, [r3, #20]
-.L1047:
+.L1049:
 	ldr	r2, [r3, #24]
 	cmp	r2, #2048
-	bls	.L1048
+	bls	.L1050
 	ldr	r1, [r3, #28]
 	add	r1, r1, r2, lsr #11
 	ubfx	r2, r2, #0, #11
 	str	r2, [r3, #24]
 	str	r1, [r3, #28]
-.L1048:
+.L1050:
 	ldr	r2, [r3, #32]
 	cmp	r2, #1024
-	bls	.L1049
+	bls	.L1051
 	ldr	r1, [r3, #36]
 	add	r1, r1, r2, lsr #10
 	ubfx	r2, r2, #0, #10
 	str	r2, [r3, #32]
 	str	r1, [r3, #36]
-.L1049:
+.L1051:
 	ldr	r2, [r3, #40]
 	cmp	r2, #1024
-	bls	.L1046
+	bls	.L1048
 	ldr	r1, [r3, #44]
 	add	r1, r1, r2, lsr #10
 	ubfx	r2, r2, #0, #10
 	str	r2, [r3, #40]
 	str	r1, [r3, #44]
-.L1046:
+.L1048:
 	bx	lr
-.L1052:
+.L1054:
 	.align	2
-.L1051:
+.L1053:
 	.word	.LANCHOR110
 	.size	ftl_tmp_into_update, .-ftl_tmp_into_update
 	.global	__aeabi_idiv
@@ -6454,43 +6489,43 @@ ftl_get_blk_list_in_sblk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r3, .L1062
+	ldr	r3, .L1064
 	mov	r8, r1
 	mov	r5, r4
-	ldr	r2, .L1062+4
+	ldr	r2, .L1064+4
 	ldr	r3, [r3]
 	ldrb	r10, [r2]	@ zero_extendqisi2
-	ldr	r2, .L1062+8
+	ldr	r2, .L1064+8
 	add	r3, r3, r0, lsl #2
 	ldrb	r3, [r3, #3]	@ zero_extendqisi2
 	uxth	r7, r10
 	ldrb	fp, [r2]	@ zero_extendqisi2
 	smulbb	r0, r0, r7
-	ldr	r2, .L1062+12
+	ldr	r2, .L1064+12
 	str	r3, [sp, #4]
 	subs	r7, r7, #1
-	ldr	r3, .L1062+16
+	ldr	r3, .L1064+16
 	sxth	r7, r7
 	uxth	r6, r0
 	rsb	fp, fp, #24
 	ldrb	r3, [r3]	@ zero_extendqisi2
-.L1054:
+.L1056:
 	cmp	r5, r3
-	blt	.L1058
+	blt	.L1060
 	mov	r2, r4
 	movw	r1, #65535
-.L1059:
+.L1061:
 	cmp	r2, r3
-	blt	.L1060
+	blt	.L1062
 	mov	r0, r4
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1058:
+.L1060:
 	ldr	r1, [sp, #4]
 	asrs	r1, r1, r5
 	lsls	r1, r1, #31
-	bmi	.L1055
+	bmi	.L1057
 	mov	r1, r10
 	mov	r0, r5
 	str	r2, [sp, #12]
@@ -6510,21 +6545,21 @@ ftl_get_blk_list_in_sblk:
 	addhi	r0, r0, r1
 	strh	r0, [r8, r4, lsl #1]	@ movhi
 	adds	r4, r4, #1
-.L1055:
+.L1057:
 	adds	r5, r5, #1
-	b	.L1054
-.L1060:
+	b	.L1056
+.L1062:
 	strh	r1, [r8, r2, lsl #1]	@ movhi
 	adds	r2, r2, #1
-	b	.L1059
-.L1063:
+	b	.L1061
+.L1065:
 	.align	2
-.L1062:
-	.word	.LANCHOR7
-	.word	.LANCHOR76
-	.word	.LANCHOR32
+.L1064:
+	.word	.LANCHOR9
 	.word	.LANCHOR75
-	.word	.LANCHOR80
+	.word	.LANCHOR31
+	.word	.LANCHOR74
+	.word	.LANCHOR79
 	.size	ftl_get_blk_list_in_sblk, .-ftl_get_blk_list_in_sblk
 	.section	.text.ftl_erase_phy_blk,"ax",%progbits
 	.align	1
@@ -6539,47 +6574,47 @@ ftl_erase_phy_blk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r5, r1
-	ldr	r3, .L1069
-	ldr	r7, .L1069+4
+	ldr	r3, .L1071
+	ldr	r7, .L1071+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	rsb	r4, r3, #24
-	ldr	r3, .L1069+8
+	ldr	r3, .L1071+8
 	ldrh	r3, [r3]
 	subs	r3, r4, r3
 	movs	r4, #1
 	asr	r6, r0, r3
 	lsls	r4, r4, r3
-	ldr	r3, .L1069+12
+	ldr	r3, .L1071+12
 	subs	r4, r4, #1
 	uxtb	r6, r6
 	ands	r4, r4, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	sxth	r4, r4
-	cbz	r3, .L1065
-	ldr	r3, .L1069+16
+	cbz	r3, .L1067
+	ldr	r3, .L1071+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L1065
+	cbnz	r3, .L1067
 	ldrh	r2, [r7]
 	clz	r1, r1
 	lsrs	r1, r1, #5
 	mov	r0, r6
 	muls	r2, r4, r2
 	bl	flash_erase_block_en
-.L1065:
+.L1067:
 	ldrh	r2, [r7]
 	uxtb	r1, r5
 	mov	r0, r6
 	muls	r2, r4, r2
 	pop	{r3, r4, r5, r6, r7, lr}
 	b	flash_erase_block_en
-.L1070:
+.L1072:
 	.align	2
-.L1069:
-	.word	.LANCHOR32
+.L1071:
+	.word	.LANCHOR31
 	.word	.LANCHOR111
-	.word	.LANCHOR75
+	.word	.LANCHOR74
+	.word	.LANCHOR80
 	.word	.LANCHOR81
-	.word	.LANCHOR82
 	.size	ftl_erase_phy_blk, .-ftl_erase_phy_blk
 	.section	.text.ftl_erase_sblk,"ax",%progbits
 	.align	1
@@ -6592,7 +6627,7 @@ ftl_erase_phy_blk:
 ftl_erase_sblk:
 	@ args = 0, pretend = 0, frame = 72
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L1095
+	ldr	r2, .L1097
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r6, r0
 	mov	r7, r1
@@ -6603,27 +6638,27 @@ ftl_erase_sblk:
 	add	r3, r3, r0, lsl #2
 	ldrb	r3, [r3, #3]	@ zero_extendqisi2
 	str	r3, [sp, #4]
-.L1072:
-	ldr	r3, .L1095+4
+.L1074:
+	ldr	r3, .L1097+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r5, r3
-	bge	.L1083
-	ldr	r3, .L1095+8
+	bge	.L1085
+	ldr	r3, .L1097+8
 	movs	r4, #0
 	ldrb	r2, [r3]	@ zero_extendqisi2
-	ldr	r3, .L1095+12
+	ldr	r3, .L1097+12
 	add	ip, r2, #-1
 	ldrh	r0, [r3]
 	mul	r10, r2, r5
 	mov	r3, r4
 	mul	lr, r2, r6
-	b	.L1084
-.L1074:
+	b	.L1086
+.L1076:
 	ldr	r1, [sp, #4]
 	add	fp, r3, r10
 	asr	r1, r1, fp
 	lsls	r1, r1, #31
-	bmi	.L1073
+	bmi	.L1075
 	add	r1, sp, #72
 	add	fp, r1, r4, lsl #2
 	and	r1, r3, ip
@@ -6631,77 +6666,77 @@ ftl_erase_sblk:
 	muls	r1, r0, r1
 	adds	r4, r4, #1
 	str	r1, [fp, #-64]
-.L1073:
+.L1075:
 	adds	r3, r3, #1
-.L1084:
+.L1086:
 	cmp	r3, r2
-	blt	.L1074
+	blt	.L1076
 	cmp	r2, #4
-	bne	.L1075
+	bne	.L1077
 	uxtb	fp, r7
 	mov	r10, #0
-.L1076:
-	cmp	r10, r4
-	bne	.L1077
 .L1078:
+	cmp	r10, r4
+	bne	.L1079
+.L1080:
 	adds	r5, r5, #1
-	b	.L1072
-.L1077:
+	b	.L1074
+.L1079:
 	add	r3, sp, #8
 	mov	r1, fp
 	ldr	r2, [r3, r10, lsl #2]
 	uxtb	r0, r5
 	add	r10, r10, #1
 	bl	flash_erase_block_en
-	b	.L1076
-.L1075:
+	b	.L1078
+.L1077:
 	cmp	r4, #2
-	bne	.L1079
-	ldr	r3, .L1095+16
+	bne	.L1081
+	ldr	r3, .L1097+16
 	uxtb	r4, r5
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1080
-	ldr	r3, .L1095+20
+	cbz	r3, .L1082
+	ldr	r3, .L1097+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L1080
+	cbnz	r3, .L1082
 	clz	r1, r7
 	ldr	r3, [sp, #12]
 	ldr	r2, [sp, #8]
 	lsrs	r1, r1, #5
 	mov	r0, r4
 	bl	flash_erase_duplane_block
-.L1080:
+.L1082:
 	ldr	r3, [sp, #12]
 	uxtb	r1, r7
 	ldr	r2, [sp, #8]
 	mov	r0, r4
 	bl	flash_erase_duplane_block
-	b	.L1078
-.L1079:
+	b	.L1080
+.L1081:
 	cmp	r4, #1
-	bne	.L1078
-	ldr	r3, .L1095+16
+	bne	.L1080
+	ldr	r3, .L1097+16
 	uxtb	r4, r5
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1082
-	ldr	r3, .L1095+20
+	cbz	r3, .L1084
+	ldr	r3, .L1097+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L1082
+	cbnz	r3, .L1084
 	clz	r1, r7
 	ldr	r2, [sp, #8]
 	lsrs	r1, r1, #5
 	mov	r0, r4
 	bl	flash_erase_block_en
-.L1082:
+.L1084:
 	ldr	r2, [sp, #8]
 	uxtb	r1, r7
 	mov	r0, r4
 	bl	flash_erase_block_en
-	b	.L1078
-.L1083:
-	ldr	r1, .L1095+24
+	b	.L1080
+.L1085:
+	ldr	r1, .L1097+24
 	ldr	r0, [r8]
-	cbnz	r7, .L1085
+	cbnz	r7, .L1087
 	ldrh	r2, [r0, r6, lsl #2]
 	adds	r3, r2, #1
 	ubfx	r3, r3, #0, #11
@@ -6713,14 +6748,14 @@ ftl_erase_sblk:
 	str	r1, [r2, #84]
 	ldrh	r1, [r2, #96]
 	cmp	r1, r3
-	bge	.L1087
+	bge	.L1089
 	strh	r3, [r2, #96]	@ movhi
-.L1087:
+.L1089:
 	movs	r0, #0
 	add	sp, sp, #72
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1085:
+.L1087:
 	ldr	r2, [r0, r6, lsl #2]
 	ubfx	r3, r2, #11, #8
 	adds	r3, r3, #1
@@ -6736,16 +6771,16 @@ ftl_erase_sblk:
 	cmp	r1, r3
 	it	cc
 	strhcc	r3, [r2, #98]	@ movhi
-	b	.L1087
-.L1096:
+	b	.L1089
+.L1098:
 	.align	2
-.L1095:
-	.word	.LANCHOR7
+.L1097:
+	.word	.LANCHOR9
 	.word	.LANCHOR112
-	.word	.LANCHOR76
+	.word	.LANCHOR75
 	.word	.LANCHOR111
+	.word	.LANCHOR80
 	.word	.LANCHOR81
-	.word	.LANCHOR82
 	.word	.LANCHOR110
 	.size	ftl_erase_sblk, .-ftl_erase_sblk
 	.section	.text.ftl_alloc_sys_blk,"ax",%progbits
@@ -6760,7 +6795,7 @@ ftl_alloc_sys_blk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
-	ldr	r4, .L1106
+	ldr	r4, .L1108
 	ldr	r2, [r4]
 	ldrh	r1, [r2, #136]
 	cmp	r1, #63
@@ -6768,32 +6803,32 @@ ftl_alloc_sys_blk:
 	movhi	r3, #0
 	strhhi	r3, [r2, #136]	@ movhi
 	ldrh	r3, [r2, #112]
-	cbnz	r3, .L1099
-	movw	r2, #1283
-	ldr	r1, .L1106+4
-	ldr	r0, .L1106+8
+	cbnz	r3, .L1101
+	movw	r2, #1359
+	ldr	r1, .L1108+4
+	ldr	r0, .L1108+8
 	bl	printf
-.L1099:
+.L1101:
 	ldr	r3, [r4]
 	movw	r4, #65535
 	mov	r6, r4
 	movs	r5, #0
-.L1103:
+.L1105:
 	ldrh	r2, [r3, #136]
 	add	r1, r3, r2, lsl #1
 	adds	r1, r1, #158
-.L1100:
+.L1102:
 	cmp	r2, #63
-	ble	.L1102
+	ble	.L1104
 	strh	r5, [r3, #136]	@ movhi
-	b	.L1103
-.L1102:
+	b	.L1105
+.L1104:
 	ldrh	r0, [r1, #2]!
 	cmp	r0, r4
-	bne	.L1105
+	bne	.L1107
 	adds	r2, r2, #1
-	b	.L1100
-.L1105:
+	b	.L1102
+.L1107:
 	add	r1, r2, #80
 	strh	r6, [r3, r1, lsl #1]	@ movhi
 	strh	r2, [r3, #136]	@ movhi
@@ -6801,9 +6836,9 @@ ftl_alloc_sys_blk:
 	subs	r2, r2, #1
 	strh	r2, [r3, #112]	@ movhi
 	pop	{r4, r5, r6, pc}
-.L1107:
+.L1109:
 	.align	2
-.L1106:
+.L1108:
 	.word	.LANCHOR110
 	.word	.LANCHOR113
 	.word	.LC0
@@ -6821,7 +6856,7 @@ ftl_free_sys_blk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
 	mov	r5, r0
-	ldr	r4, .L1116
+	ldr	r4, .L1118
 	ldr	r2, [r4]
 	ldrh	r1, [r2, #138]
 	cmp	r1, #63
@@ -6830,28 +6865,28 @@ ftl_free_sys_blk:
 	strhhi	r3, [r2, #138]	@ movhi
 	ldrh	r3, [r2, #112]
 	cmp	r3, #63
-	bls	.L1110
-	movw	r2, #1310
-	ldr	r1, .L1116+4
-	ldr	r0, .L1116+8
+	bls	.L1112
+	movw	r2, #1386
+	ldr	r1, .L1118+4
+	ldr	r0, .L1118+8
 	bl	printf
-.L1110:
+.L1112:
 	ldr	r3, [r4]
 	movs	r0, #0
 	movw	r4, #65535
-.L1114:
+.L1116:
 	ldrh	r2, [r3, #138]
 	add	r1, r3, r2, lsl #1
 	adds	r1, r1, #158
-.L1111:
+.L1113:
 	cmp	r2, #63
-	ble	.L1113
+	ble	.L1115
 	strh	r0, [r3, #138]	@ movhi
-	b	.L1114
-.L1113:
+	b	.L1116
+.L1115:
 	ldrh	r6, [r1, #2]!
 	cmp	r6, r4
-	bne	.L1112
+	bne	.L1114
 	add	r1, r2, #80
 	strh	r5, [r3, r1, lsl #1]	@ movhi
 	strh	r2, [r3, #138]	@ movhi
@@ -6859,12 +6894,12 @@ ftl_free_sys_blk:
 	adds	r2, r2, #1
 	strh	r2, [r3, #112]	@ movhi
 	pop	{r4, r5, r6, pc}
-.L1112:
+.L1114:
 	adds	r2, r2, #1
-	b	.L1111
-.L1117:
+	b	.L1113
+.L1119:
 	.align	2
-.L1116:
+.L1118:
 	.word	.LANCHOR110
 	.word	.LANCHOR114
 	.word	.LC0
@@ -6884,30 +6919,30 @@ ftl_info_data_recovery:
 	movw	r3, #65535
 	ldrh	r4, [r0]
 	cmp	r4, r3
-	beq	.L1118
-	ldr	r3, .L1127
+	beq	.L1120
+	ldr	r3, .L1129
 	ldr	r5, [r3]
 	add	r6, r5, r4, lsl #2
 	ldrb	r3, [r6, #2]	@ zero_extendqisi2
 	tst	r3, #224
-	bne	.L1118
+	bne	.L1120
 	ldrb	r2, [r0, #4]	@ zero_extendqisi2
 	mov	r0, r4
 	bfi	r3, r2, #5, #3
 	strb	r3, [r6, #2]
 	bl	zftl_remove_free_node
 	ldrb	r3, [r6, #2]	@ zero_extendqisi2
-	ldr	r2, .L1127+4
+	ldr	r2, .L1129+4
 	tst	r3, #8
 	ldr	r0, [r2]
-	beq	.L1122
+	beq	.L1124
 	ldrh	r1, [r0, #116]
 	subs	r1, r1, #1
 	strh	r1, [r0, #116]	@ movhi
-.L1123:
+.L1125:
 	and	r3, r3, #224
 	cmp	r3, #160
-	bne	.L1125
+	bne	.L1127
 	ldr	r3, [r5, r4, lsl #2]
 	ldr	r2, [r2]
 	ubfx	r1, r3, #11, #8
@@ -6918,7 +6953,7 @@ ftl_info_data_recovery:
 	subs	r3, r3, #1
 	strh	r3, [r2, #120]	@ movhi
 	pop	{r4, r5, r6, pc}
-.L1122:
+.L1124:
 	tst	r3, #24
 	itete	eq
 	ldrheq	r1, [r0, #114]
@@ -6928,32 +6963,32 @@ ftl_info_data_recovery:
 	ite	eq
 	strheq	r1, [r0, #114]	@ movhi
 	strhne	r1, [r0, #118]	@ movhi
-	b	.L1123
-.L1125:
+	b	.L1125
+.L1127:
 	ldrh	r1, [r5, r4, lsl #2]
 	cmp	r3, #64
 	add	r0, r1, #1
 	bfi	r1, r0, #0, #11
 	strh	r1, [r5, r4, lsl #2]	@ movhi
-	bne	.L1126
+	bne	.L1128
 	ldr	r2, [r2]
 	ldrh	r3, [r2, #122]
 	subs	r3, r3, #1
 	strh	r3, [r2, #122]	@ movhi
 	pop	{r4, r5, r6, pc}
-.L1126:
+.L1128:
 	cmp	r3, #96
 	itttt	eq
 	ldreq	r2, [r2]
 	ldrheq	r3, [r2, #124]
 	addeq	r3, r3, #-1
 	strheq	r3, [r2, #124]	@ movhi
-.L1118:
+.L1120:
 	pop	{r4, r5, r6, pc}
-.L1128:
+.L1130:
 	.align	2
-.L1127:
-	.word	.LANCHOR7
+.L1129:
+	.word	.LANCHOR9
 	.word	.LANCHOR110
 	.size	ftl_info_data_recovery, .-ftl_info_data_recovery
 	.section	.text.ftl_get_ppa_from_index,"ax",%progbits
@@ -6969,11 +7004,11 @@ ftl_get_ppa_from_index:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r4, r0
-	ldr	r3, .L1133
+	ldr	r3, .L1135
 	ldr	r5, [r3]
-	ldr	r3, .L1133+4
+	ldr	r3, .L1135+4
 	ldrh	r2, [r3]
-	ldr	r3, .L1133+8
+	ldr	r3, .L1135+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	mul	r1, r3, r2
 	cmp	r0, r1
@@ -6996,22 +7031,22 @@ ftl_get_ppa_from_index:
 	adds	r4, r4, #8
 	ldrh	r4, [r5, r4, lsl #1]
 	cmp	r4, r3
-	bne	.L1132
-	movw	r2, #1937
-	ldr	r1, .L1133+12
-	ldr	r0, .L1133+16
+	bne	.L1134
+	movw	r2, #1945
+	ldr	r1, .L1135+12
+	ldr	r0, .L1135+16
 	bl	printf
-.L1132:
-	ldr	r3, .L1133+20
+.L1134:
+	ldr	r3, .L1135+20
 	ldrh	r0, [r3]
 	mla	r0, r4, r0, r7
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1134:
+.L1136:
 	.align	2
-.L1133:
-	.word	.LANCHOR10
-	.word	.LANCHOR95
-	.word	.LANCHOR80
+.L1135:
+	.word	.LANCHOR12
+	.word	.LANCHOR94
+	.word	.LANCHOR79
 	.word	.LANCHOR115
 	.word	.LC0
 	.word	.LANCHOR111
@@ -7028,34 +7063,34 @@ lpa_hash_get_ppa:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L1139
+	ldr	r3, .L1141
 	uxtb	r2, r0
 	push	{r4, r5}
 	ldrh	r3, [r3, r2, lsl #1]
-	ldr	r2, .L1139+4
+	ldr	r2, .L1141+4
 	ldr	r1, [r2]
-	ldr	r2, .L1139+8
+	ldr	r2, .L1141+8
 	ldr	r4, [r2]
 	movw	r2, #65535
-.L1136:
+.L1138:
 	cmp	r3, r2
-	bne	.L1138
+	bne	.L1140
 	mov	r0, #-1
 	pop	{r4, r5}
 	bx	lr
-.L1138:
+.L1140:
 	ldr	r5, [r1, r3, lsl #2]
 	cmp	r0, r5
-	bne	.L1137
+	bne	.L1139
 	mov	r0, r3
 	pop	{r4, r5}
 	b	ftl_get_ppa_from_index
-.L1137:
+.L1139:
 	ldrh	r3, [r4, r3, lsl #1]
-	b	.L1136
-.L1140:
+	b	.L1138
+.L1142:
 	.align	2
-.L1139:
+.L1141:
 	.word	.LANCHOR116
 	.word	.LANCHOR117
 	.word	.LANCHOR118
@@ -7076,41 +7111,41 @@ ftl_get_new_free_page:
 	movw	r3, #65535
 	mov	r4, r0
 	cmp	r2, r3
-	bne	.L1142
-	mov	r2, #2080
-	ldr	r1, .L1149
-	ldr	r0, .L1149+4
+	bne	.L1144
+	movw	r2, #2088
+	ldr	r1, .L1151
+	ldr	r0, .L1151+4
 	bl	printf
-.L1142:
-	ldr	r3, .L1149+8
+.L1144:
+	ldr	r3, .L1151+8
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1143
-	movw	r2, #2081
-	ldr	r1, .L1149
-	ldr	r0, .L1149+4
+	bne	.L1145
+	movw	r2, #2089
+	ldr	r1, .L1151
+	ldr	r0, .L1151+4
 	bl	printf
-.L1143:
+.L1145:
 	ldrh	r3, [r4, #6]
-	cbnz	r3, .L1144
-	movw	r2, #2082
-	ldr	r1, .L1149
-	ldr	r0, .L1149+4
+	cbnz	r3, .L1146
+	movw	r2, #2090
+	ldr	r1, .L1151
+	ldr	r0, .L1151+4
 	bl	printf
-.L1144:
+.L1146:
 	ldrb	r3, [r4, #5]	@ zero_extendqisi2
 	movw	r2, #65535
 	movs	r1, #0
 	adds	r3, r3, #8
 	ldrh	r0, [r4, r3, lsl #1]
-	ldr	r3, .L1149+12
+	ldr	r3, .L1151+12
 	ldrb	r5, [r3]	@ zero_extendqisi2
-.L1145:
+.L1147:
 	cmp	r0, r2
 	ldrb	r3, [r4, #5]	@ zero_extendqisi2
-	beq	.L1147
-	ldr	r1, .L1149+16
+	beq	.L1149
+	ldr	r1, .L1151+16
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	ldrh	r2, [r4, #2]
@@ -7131,7 +7166,7 @@ ftl_get_new_free_page:
 	adds	r1, r1, #1
 	strh	r1, [r4, #10]	@ movhi
 	pop	{r3, r4, r5, pc}
-.L1147:
+.L1149:
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, r5
@@ -7144,14 +7179,14 @@ ftl_get_new_free_page:
 	ldrb	r3, [r4, #5]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r0, [r4, r3, lsl #1]
-	b	.L1145
-.L1150:
+	b	.L1147
+.L1152:
 	.align	2
-.L1149:
+.L1151:
 	.word	.LANCHOR119
 	.word	.LC0
-	.word	.LANCHOR95
-	.word	.LANCHOR80
+	.word	.LANCHOR94
+	.word	.LANCHOR79
 	.word	.LANCHOR111
 	.size	ftl_get_new_free_page, .-ftl_get_new_free_page
 	.section	.text.ftl_ext_alloc_new_blk,"ax",%progbits
@@ -7172,13 +7207,13 @@ ftl_ext_alloc_new_blk:
 	uxth	r3, r3
 	mov	r4, r0
 	cmp	r3, r2
-	bls	.L1152
-	movw	r2, #2117
-	ldr	r1, .L1153
-	ldr	r0, .L1153+4
+	bls	.L1154
+	movw	r2, #2125
+	ldr	r1, .L1155
+	ldr	r0, .L1155+4
 	bl	printf
-.L1152:
-	ldr	r5, .L1153+8
+.L1154:
+	ldr	r5, .L1155+8
 	movs	r1, #0
 	mov	r0, r4
 	bl	ftl_erase_phy_blk
@@ -7190,9 +7225,9 @@ ftl_ext_alloc_new_blk:
 	strh	r4, [r3, #130]	@ movhi
 	strh	r0, [r3, #140]	@ movhi
 	pop	{r3, r4, r5, pc}
-.L1154:
+.L1156:
 	.align	2
-.L1153:
+.L1155:
 	.word	.LANCHOR120
 	.word	.LC0
 	.word	.LANCHOR110
@@ -7208,48 +7243,48 @@ ftl_ext_alloc_new_blk:
 ftl_total_vpn_update:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L1166
+	ldr	r2, .L1168
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r1, r2
 	ldrh	r3, [r2]
 	cmp	r3, #4
-	bhi	.L1156
-	cbnz	r0, .L1156
+	bhi	.L1158
+	cbnz	r0, .L1158
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1156:
-	ldr	r2, .L1166+4
+.L1158:
+	ldr	r2, .L1168+4
 	movs	r3, #0
 	mov	r0, r3
 	movw	ip, #65535
 	strh	r3, [r1]	@ movhi
 	ldrh	r5, [r2]
-	ldr	r2, .L1166+8
+	ldr	r2, .L1168+8
 	ldr	r6, [r2]
-	ldr	r2, .L1166+12
+	ldr	r2, .L1168+12
 	ldr	r7, [r2]
 	mov	r2, r3
-.L1158:
+.L1160:
 	uxth	r1, r3
 	cmp	r5, r1
-	bhi	.L1161
-	ldr	r3, .L1166+16
+	bhi	.L1163
+	ldr	r3, .L1168+16
 	ldr	r4, [r3]
-	ldr	r3, .L1166+20
+	ldr	r3, .L1168+20
 	str	r2, [r4, #524]
 	ldr	r3, [r3]
 	str	r0, [r4, #528]
 	ldrh	r1, [r3, #120]
-	cbz	r1, .L1155
+	cbz	r1, .L1157
 	bl	__aeabi_uidiv
 	str	r0, [r4, #532]
-.L1155:
+.L1157:
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1161:
+.L1163:
 	ldrh	r1, [r6, r3, lsl #1]
 	cmp	r1, ip
-	beq	.L1159
+	beq	.L1161
 	add	r4, r7, r3, lsl #2
 	ldrb	r4, [r4, #2]	@ zero_extendqisi2
 	and	r4, r4, #224
@@ -7257,17 +7292,17 @@ ftl_total_vpn_update:
 	ite	eq
 	addeq	r0, r0, r1
 	addne	r2, r2, r1
-.L1159:
+.L1161:
 	adds	r3, r3, #1
-	b	.L1158
-.L1167:
+	b	.L1160
+.L1169:
 	.align	2
-.L1166:
+.L1168:
 	.word	.LANCHOR121
-	.word	.LANCHOR6
+	.word	.LANCHOR8
+	.word	.LANCHOR11
 	.word	.LANCHOR9
-	.word	.LANCHOR7
-	.word	.LANCHOR10
+	.word	.LANCHOR12
 	.word	.LANCHOR110
 	.size	ftl_total_vpn_update, .-ftl_total_vpn_update
 	.section	.text.ftl_vpn_update,"ax",%progbits
@@ -7284,21 +7319,21 @@ ftl_vpn_update:
 	push	{r4, lr}
 	mov	r4, r0
 	bl	zftl_list_update_data_list
-	ldr	r3, .L1171
+	ldr	r3, .L1173
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
-	cbnz	r3, .L1170
-	ldr	r3, .L1171+4
+	cbnz	r3, .L1172
+	ldr	r3, .L1173+4
 	movs	r0, #1
 	str	r0, [r3]
 	pop	{r4, pc}
-.L1170:
+.L1172:
 	movs	r0, #0
 	pop	{r4, pc}
-.L1172:
+.L1174:
 	.align	2
-.L1171:
-	.word	.LANCHOR9
+.L1173:
+	.word	.LANCHOR11
 	.word	.LANCHOR122
 	.size	ftl_vpn_update, .-ftl_vpn_update
 	.section	.text.ftl_vpn_decrement,"ax",%progbits
@@ -7316,40 +7351,40 @@ ftl_vpn_decrement:
 	movw	r3, #65535
 	cmp	r0, r3
 	mov	r5, r0
-	beq	.L1174
-	ldr	r3, .L1182
+	beq	.L1176
+	ldr	r3, .L1184
 	ldr	r3, [r3]
 	ldrh	r4, [r3, r0, lsl #1]
-	cbnz	r4, .L1175
-	ldr	r3, .L1182+4
+	cbnz	r4, .L1177
+	ldr	r3, .L1184+4
 	mov	r1, r0
 	mov	r2, r4
 	ldr	r3, [r3]
 	add	r3, r3, r0, lsl #2
-	ldr	r0, .L1182+8
+	ldr	r0, .L1184+8
 	ldrb	r3, [r3, #2]	@ zero_extendqisi2
 	lsrs	r3, r3, #5
 	bl	printf
-.L1180:
+.L1182:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L1175:
+.L1177:
 	subs	r4, r4, #1
 	strh	r4, [r3, r0, lsl #1]	@ movhi
-.L1174:
-	ldr	r3, .L1182+12
+.L1176:
+	ldr	r3, .L1184+12
 	ldrh	r0, [r3]
 	mov	r4, r3
 	cmp	r5, r0
-	beq	.L1180
+	beq	.L1182
 	movw	r2, #65535
 	cmp	r0, r2
-	bne	.L1177
+	bne	.L1179
 	strh	r5, [r3]	@ movhi
-	b	.L1180
-.L1177:
+	b	.L1182
+.L1179:
 	bl	ftl_vpn_update
-	ldr	r3, .L1182+16
+	ldr	r3, .L1184+16
 	adds	r0, r0, #0
 	it	ne
 	movne	r0, #1
@@ -7363,18 +7398,18 @@ ftl_vpn_decrement:
 	movhi	r2, #0
 	strh	r2, [r3]	@ movhi
 	ldrh	r2, [r3]
-	ldr	r3, .L1182+20
+	ldr	r3, .L1184+20
 	strh	r1, [r3, r2, lsl #1]	@ movhi
 	pop	{r3, r4, r5, pc}
-.L1183:
+.L1185:
 	.align	2
-.L1182:
+.L1184:
+	.word	.LANCHOR11
 	.word	.LANCHOR9
-	.word	.LANCHOR7
 	.word	.LC65
-	.word	.LANCHOR73
+	.word	.LANCHOR72
 	.word	.LANCHOR123
-	.word	.LANCHOR74
+	.word	.LANCHOR73
 	.size	ftl_vpn_decrement, .-ftl_vpn_decrement
 	.section	.text.lpa_hash_update_ppa,"ax",%progbits
 	.align	1
@@ -7389,21 +7424,21 @@ lpa_hash_update_ppa:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	uxtb	ip, r0
-	ldr	r4, .L1195
+	ldr	r4, .L1197
 	movw	r6, #65535
 	mov	fp, r6
-	ldr	r5, .L1195+4
+	ldr	r5, .L1197+4
 	ldr	lr, [r4]
-	ldr	r4, .L1195+8
+	ldr	r4, .L1197+8
 	ldrh	r3, [r5, ip, lsl #1]
 	ldr	r4, [r4]
-.L1185:
+.L1187:
 	cmp	r3, fp
-	beq	.L1189
+	beq	.L1191
 	ldr	r7, [lr, r3, lsl #2]
 	add	r8, lr, r3, lsl #2
 	cmp	r0, r7
-	bne	.L1186
+	bne	.L1188
 	cmp	r6, fp
 	mov	r10, #-1
 	ite	eq
@@ -7415,45 +7450,45 @@ lpa_hash_update_ppa:
 	strhne	r7, [r4, r6, lsl #1]	@ movhi
 	movw	r6, #65535
 	strh	r6, [r4, r3, lsl #1]	@ movhi
-.L1189:
+.L1191:
 	ldrh	r3, [r5, ip, lsl #1]
 	str	r0, [lr, r2, lsl #2]
 	strh	r2, [r5, ip, lsl #1]	@ movhi
 	strh	r3, [r4, r2, lsl #1]	@ movhi
 	adds	r3, r1, #1
-	beq	.L1191
-	ldr	r3, .L1195+12
+	beq	.L1193
+	ldr	r3, .L1197+12
 	ldrh	r2, [r3]
-	ldr	r3, .L1195+16
+	ldr	r3, .L1197+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	rsb	r3, r3, #24
 	subs	r0, r3, r2
 	movs	r3, #1
 	lsls	r3, r3, r0
 	lsr	r0, r1, r2
-	ldr	r2, .L1195+20
+	ldr	r2, .L1197+20
 	subs	r3, r3, #1
 	ands	r0, r0, r3
 	ldrb	r1, [r2]	@ zero_extendqisi2
 	bl	__aeabi_uidiv
 	uxth	r0, r0
 	bl	ftl_vpn_decrement
-.L1191:
+.L1193:
 	mov	r0, #-1
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1186:
+.L1188:
 	mov	r6, r3
 	ldrh	r3, [r4, r3, lsl #1]
-	b	.L1185
-.L1196:
+	b	.L1187
+.L1198:
 	.align	2
-.L1195:
+.L1197:
 	.word	.LANCHOR117
 	.word	.LANCHOR116
 	.word	.LANCHOR118
+	.word	.LANCHOR74
+	.word	.LANCHOR31
 	.word	.LANCHOR75
-	.word	.LANCHOR32
-	.word	.LANCHOR76
 	.size	lpa_hash_update_ppa, .-lpa_hash_update_ppa
 	.section	.text.ftl_mask_bad_block,"ax",%progbits
 	.align	1
@@ -7466,7 +7501,7 @@ lpa_hash_update_ppa:
 ftl_mask_bad_block:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1204
+	ldr	r3, .L1206
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
 	ldrb	r4, [r3]	@ zero_extendqisi2
 	movs	r3, #1
@@ -7475,12 +7510,12 @@ ftl_mask_bad_block:
 	lsr	r2, r0, r1
 	subs	r4, r4, #1
 	ands	r4, r4, r2
-	ldr	r2, .L1204+4
+	ldr	r2, .L1206+4
 	uxtb	r4, r4
 	ldrb	r5, [r2]	@ zero_extendqisi2
 	smulbb	r2, r4, r5
 	uxtb	r8, r2
-	ldr	r2, .L1204+8
+	ldr	r2, .L1206+8
 	ldrh	r6, [r2]
 	lsr	r2, r0, r6
 	subs	r0, r1, r6
@@ -7490,7 +7525,7 @@ ftl_mask_bad_block:
 	ands	r0, r0, r2
 	uxth	r10, r0
 	bl	__aeabi_uidiv
-	ldr	r3, .L1204+12
+	ldr	r3, .L1206+12
 	cmp	r5, #1
 	it	hi
 	addhi	r2, r5, #-1
@@ -7503,19 +7538,19 @@ ftl_mask_bad_block:
 	addhi	r2, r2, r8
 	uxtbhi	r8, r2
 	lsls	r3, r3, #17
-	bpl	.L1199
+	bpl	.L1201
 	uxth	r3, r0
 	str	r10, [sp]
 	mov	r2, r8
-	ldr	r0, .L1204+16
+	ldr	r0, .L1206+16
 	mov	r1, r4
 	bl	printf
-.L1199:
-	ldr	r3, .L1204+20
+.L1201:
+	ldr	r3, .L1206+20
 	ldrh	r3, [r3]
 	cmp	r3, r7
-	bls	.L1197
-	ldr	r3, .L1204+24
+	bls	.L1199
+	ldr	r3, .L1206+24
 	uxth	r6, r6
 	movs	r2, #1
 	lsl	r8, r2, r8
@@ -7524,20 +7559,20 @@ ftl_mask_bad_block:
 	ldrb	r2, [r6, #3]	@ zero_extendqisi2
 	orr	r2, r2, r8
 	strb	r2, [r6, #3]
-.L1197:
+.L1199:
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L1205:
+.L1207:
 	.align	2
-.L1204:
-	.word	.LANCHOR32
-	.word	.LANCHOR76
+.L1206:
+	.word	.LANCHOR31
 	.word	.LANCHOR75
-	.word	.LANCHOR14
+	.word	.LANCHOR74
+	.word	.LANCHOR19
 	.word	.LC66
-	.word	.LANCHOR6
-	.word	.LANCHOR7
+	.word	.LANCHOR8
+	.word	.LANCHOR9
 	.size	ftl_mask_bad_block, .-ftl_mask_bad_block
 	.section	.text.gc_free_bad_sblk,"ax",%progbits
 	.align	1
@@ -7552,31 +7587,31 @@ gc_free_bad_sblk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r8, r0
-	ldr	r4, .L1226
-	ldr	r3, [r4, #2116]
-	cbz	r3, .L1223
+	ldr	r4, .L1228
+	ldr	r3, [r4, #2188]
+	cbz	r3, .L1225
 	mov	fp, #0
-.L1208:
-	ldr	r3, .L1226+4
+.L1210:
+	ldr	r3, .L1228+4
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	uxth	r3, fp
 	cmp	r2, r3
-	bhi	.L1218
-.L1223:
+	bhi	.L1220
+.L1225:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1218:
-	ldr	r3, .L1226+8
+.L1220:
+	ldr	r3, .L1228+8
 	uxth	r0, fp
 	mov	r10, #0
 	ldrb	r7, [r3]	@ zero_extendqisi2
 	mov	r1, r7
 	bl	__aeabi_idiv
-	ldr	r3, .L1226+12
+	ldr	r3, .L1228+12
 	uxth	r6, r7
 	cmp	r7, #1
 	ldrb	r5, [r3]	@ zero_extendqisi2
-	ldr	r3, .L1226+16
+	ldr	r3, .L1228+16
 	rsb	r5, r5, #24
 	ldrh	r2, [r3]
 	mov	r7, r3
@@ -7591,68 +7626,68 @@ gc_free_bad_sblk:
 	itt	hi
 	addhi	r5, r5, r6
 	uxthhi	r5, r5
-.L1210:
-	ldr	r0, [r4, #2116]
+.L1212:
+	ldr	r0, [r4, #2188]
 	uxth	r6, r10
 	mov	r1, r6
 	cmp	r0, r6
-	bhi	.L1217
+	bhi	.L1219
 	add	fp, fp, #1
-	b	.L1208
-.L1217:
-	addw	r1, r1, #1060
+	b	.L1210
+.L1219:
+	add	r1, r1, #1096
 	ldrh	r1, [r4, r1, lsl #1]
 	cmp	r1, r5
-	bne	.L1211
+	bne	.L1213
 	mov	r1, r5
-	ldr	r0, .L1226+20
+	ldr	r0, .L1228+20
 	bl	printf
-	ldr	r1, .L1226+24
+	ldr	r1, .L1228+24
 	ldrb	r1, [r1]	@ zero_extendqisi2
-	cbnz	r1, .L1212
-	ldr	r1, .L1226+28
+	cbnz	r1, .L1214
+	ldr	r1, .L1228+28
 	ldrb	r1, [r1]	@ zero_extendqisi2
-	cbz	r1, .L1213
-.L1212:
-	ldr	r1, .L1226+32
-	ldr	r3, .L1226+36
+	cbz	r1, .L1215
+.L1214:
+	ldr	r1, .L1228+32
+	ldr	r3, .L1228+36
 	ldr	r1, [r1]
 	ldr	r1, [r1, #156]
 	cmp	r1, r3
-	beq	.L1214
-.L1213:
+	beq	.L1216
+.L1215:
 	ldrh	r0, [r7]
 	lsl	r0, r5, r0
 	bl	ftl_mask_bad_block
-.L1214:
-	ldr	r1, [r4, #2116]
-.L1215:
+.L1216:
+	ldr	r1, [r4, #2188]
+.L1217:
 	cmp	r6, r1
-	bcc	.L1216
+	bcc	.L1218
 	subs	r1, r1, #1
-	str	r1, [r4, #2116]
-.L1211:
+	str	r1, [r4, #2188]
+.L1213:
 	add	r10, r10, #1
-	b	.L1210
-.L1216:
-	addw	r0, r6, #1061
+	b	.L1212
+.L1218:
+	addw	r0, r6, #1097
 	adds	r3, r6, #1
 	ldrh	ip, [r4, r0, lsl #1]
-	addw	r0, r6, #1060
+	add	r0, r6, #1096
 	uxth	r6, r3
 	strh	ip, [r4, r0, lsl #1]	@ movhi
-	b	.L1215
-.L1227:
+	b	.L1217
+.L1229:
 	.align	2
-.L1226:
-	.word	.LANCHOR71
-	.word	.LANCHOR80
-	.word	.LANCHOR76
-	.word	.LANCHOR32
+.L1228:
+	.word	.LANCHOR70
+	.word	.LANCHOR79
 	.word	.LANCHOR75
+	.word	.LANCHOR31
+	.word	.LANCHOR74
 	.word	.LC67
 	.word	.LANCHOR124
-	.word	.LANCHOR81
+	.word	.LANCHOR80
 	.word	.LANCHOR110
 	.word	1145785929
 	.size	gc_free_bad_sblk, .-gc_free_bad_sblk
@@ -7669,7 +7704,7 @@ ftl_free_sblk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r5, r0
-	ldr	r3, .L1249
+	ldr	r3, .L1251
 	ldr	r6, [r3]
 	lsls	r3, r0, #2
 	adds	r7, r6, r3
@@ -7677,10 +7712,10 @@ ftl_free_sblk:
 	lsls	r2, r4, #28
 	lsr	r3, r4, #5
 	str	r3, [sp, #4]
-	bpl	.L1229
-	ldr	r3, .L1249+4
+	bpl	.L1231
+	ldr	r3, .L1251+4
 	ldrh	fp, [r6, r0, lsl #2]
-	ldr	r1, .L1249+8
+	ldr	r1, .L1251+8
 	ldr	r3, [r3]
 	ldr	r0, [r6, r0, lsl #2]
 	ubfx	fp, fp, #0, #11
@@ -7698,48 +7733,48 @@ ftl_free_sblk:
 	str	r3, [sp, #12]
 	bl	__aeabi_uidiv
 	ldr	r3, [sp, #12]
-	ldr	r1, .L1249+12
+	ldr	r1, .L1251+12
 	ldr	r2, [sp, #8]
 	ldrh	r1, [r1]
 	uxtah	r0, r3, r0
 	cmp	r0, r1
-	ble	.L1230
-	ldr	r3, .L1249+16
-	ldr	r1, .L1249+20
+	ble	.L1232
+	ldr	r3, .L1251+16
+	ldr	r1, .L1251+20
 	ldrh	r2, [r3]
-	ldr	r3, .L1249+24
+	ldr	r3, .L1251+24
 	ldrh	r1, [r1]
 	adds	r2, r2, #7
 	ldrh	r3, [r3]
 	add	r3, r3, r1
 	cmp	r2, r3
-	blt	.L1231
-.L1236:
+	blt	.L1233
+.L1238:
 	movs	r3, #2
 	bfi	r4, r3, #3, #2
-	b	.L1246
-.L1231:
-	ldr	r3, .L1249+28
-	ldr	r1, .L1249+32
+	b	.L1248
+.L1233:
+	ldr	r3, .L1251+28
+	ldr	r1, .L1251+32
 	ldrh	r2, [r3]
-	ldr	r3, .L1249+36
+	ldr	r3, .L1251+36
 	ldrh	r1, [r1]
 	adds	r2, r2, #7
 	ldrh	r3, [r3]
 	add	r3, r3, r1
-	ldr	r1, .L1249+40
+	ldr	r1, .L1251+40
 	ldrh	r1, [r1]
 	add	r3, r3, r1
 	cmp	r2, r3
-	blt	.L1236
-.L1248:
+	blt	.L1238
+.L1250:
 	bfc	r4, #3, #2
-.L1246:
+.L1248:
 	strb	r4, [r7, #2]
-.L1232:
+.L1234:
 	ldrb	r3, [r7, #2]	@ zero_extendqisi2
 	ands	r3, r3, #24
-	bne	.L1237
+	bne	.L1239
 	mul	r8, r8, r10
 	ldrh	r3, [r6, r5, lsl #2]
 	lsr	r10, r10, #3
@@ -7750,10 +7785,10 @@ ftl_free_sblk:
 	ldr	r3, [r6, r5, lsl #2]
 	bfi	r3, r10, #11, #8
 	str	r3, [r6, r5, lsl #2]
-.L1238:
+.L1240:
 	mov	r0, r5
 	bl	zftl_remove_data_node
-	ldr	r3, .L1249
+	ldr	r3, .L1251
 	lsls	r2, r5, #2
 	ldr	r3, [r3]
 	add	r3, r3, r2
@@ -7761,73 +7796,73 @@ ftl_free_sblk:
 	bfc	r2, #5, #3
 	strb	r2, [r3, #2]
 	movs	r2, #0
-	ldr	r3, .L1249+44
+	ldr	r3, .L1251+44
 	ldr	r3, [r3]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #6
 	and	r3, r3, #7
 	cmp	r3, #4
-	bhi	.L1241
+	bhi	.L1243
 	mov	r0, r5
 	bl	gc_free_bad_sblk
-.L1241:
+.L1243:
 	ldrb	r3, [r7, #2]	@ zero_extendqisi2
 	lsls	r3, r3, #28
-	bpl	.L1242
-	ldr	r3, .L1249+48
+	bpl	.L1244
+	ldr	r3, .L1251+48
 	ldr	r3, [r3]
 	ldrh	r2, [r3, #586]
 	cmp	r2, r5
-	bne	.L1242
+	bne	.L1244
 	ldrh	r1, [r3, #590]
 	movw	r2, #65535
 	strh	r2, [r3, #586]	@ movhi
 	cmp	r1, r2
-	bne	.L1242
+	bne	.L1244
 	strh	r5, [r3, #590]	@ movhi
 	mov	r1, r5
-	ldr	r0, .L1249+52
+	ldr	r0, .L1251+52
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
 	b	printf
-.L1230:
+.L1232:
 	mla	r3, r3, r8, r2
-	ldr	r2, .L1249+56
+	ldr	r2, .L1251+56
 	ldrh	r2, [r2]
 	cmp	r3, r2
-	ble	.L1232
-	ldr	r3, .L1249+28
-	ldr	r1, .L1249+32
+	ble	.L1234
+	ldr	r3, .L1251+28
+	ldr	r1, .L1251+32
 	ldrh	r2, [r3]
-	ldr	r3, .L1249+36
+	ldr	r3, .L1251+36
 	ldrh	r1, [r1]
 	ldrh	r3, [r3]
 	add	r3, r3, r1
-	ldr	r1, .L1249+40
+	ldr	r1, .L1251+40
 	ldrh	r1, [r1]
 	add	r3, r3, r1
 	adds	r1, r2, #7
 	cmp	r1, r3
-	bge	.L1248
-	ldr	r1, .L1249+16
-	ldr	ip, .L1249+20
+	bge	.L1250
+	ldr	r1, .L1251+16
+	ldr	ip, .L1251+20
 	ldrh	r0, [r1]
-	ldr	r1, .L1249+24
+	ldr	r1, .L1251+24
 	ldrh	ip, [ip]
 	adds	r0, r0, #7
 	ldrh	r1, [r1]
 	add	r1, r1, ip
 	cmp	r0, r1
-	bge	.L1236
+	bge	.L1238
 	adds	r2, r2, #23
 	cmp	r3, r2
-	bgt	.L1236
-	b	.L1248
-.L1237:
+	bgt	.L1238
+	b	.L1250
+.L1239:
 	cmp	r3, #16
-	bne	.L1238
+	bne	.L1240
 	mov	r0, fp
 	mov	r1, r8
 	bl	__aeabi_idiv
@@ -7838,44 +7873,44 @@ ftl_free_sblk:
 	bfi	r3, r10, #11, #8
 	str	r3, [r6, r5, lsl #2]
 	bfi	r3, fp, #0, #11
-.L1247:
+.L1249:
 	strh	r3, [r6, r5, lsl #2]	@ movhi
-	b	.L1238
-.L1229:
+	b	.L1240
+.L1231:
 	tst	r4, #24
-	bne	.L1238
-	ldr	r3, .L1249+60
+	bne	.L1240
+	ldr	r3, .L1251+60
 	ldrh	r3, [r3]
 	cmp	r3, #0
-	bne	.L1238
-	ldr	r3, .L1249+20
+	bne	.L1240
+	ldr	r3, .L1251+20
 	ldrh	r1, [r3]
 	cmp	r1, #15
-	bhi	.L1238
-	ldr	r3, .L1249+36
-	ldr	r2, .L1249+32
+	bhi	.L1240
+	ldr	r3, .L1251+36
+	ldr	r2, .L1251+32
 	ldrh	r3, [r3]
 	ldrh	r2, [r2]
 	add	r3, r3, r2
-	ldr	r2, .L1249+40
+	ldr	r2, .L1251+40
 	ldrh	r2, [r2]
 	add	r3, r3, r2
-	ldr	r2, .L1249+28
+	ldr	r2, .L1251+28
 	ldrh	r2, [r2]
 	adds	r2, r2, #16
 	cmp	r3, r2
-	ble	.L1238
-	ldr	r3, .L1249+16
+	ble	.L1240
+	ldr	r3, .L1251+16
 	ldrh	r2, [r3]
-	ldr	r3, .L1249+24
+	ldr	r3, .L1251+24
 	adds	r2, r2, #7
 	ldrh	r3, [r3]
 	add	r3, r3, r1
 	cmp	r2, r3
-	blt	.L1238
+	blt	.L1240
 	movs	r3, #2
 	bfi	r4, r3, #3, #2
-	ldr	r3, .L1249+8
+	ldr	r3, .L1251+8
 	strb	r4, [r7, #2]
 	ldrh	r4, [r6, r0, lsl #2]
 	ldrh	r1, [r3]
@@ -7890,29 +7925,29 @@ ftl_free_sblk:
 	bfi	r3, r0, #11, #8
 	str	r3, [r6, r5, lsl #2]
 	bfi	r3, r4, #0, #11
-	b	.L1247
-.L1242:
+	b	.L1249
+.L1244:
 	mov	r0, r5
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
 	b	zftl_insert_free_list
-.L1250:
+.L1252:
 	.align	2
-.L1249:
-	.word	.LANCHOR7
+.L1251:
+	.word	.LANCHOR9
 	.word	.LANCHOR110
-	.word	.LANCHOR8
+	.word	.LANCHOR10
 	.word	.LANCHOR125
 	.word	.LANCHOR101
 	.word	.LANCHOR105
-	.word	.LANCHOR93
+	.word	.LANCHOR91
 	.word	.LANCHOR98
 	.word	.LANCHOR103
 	.word	.LANCHOR97
 	.word	.LANCHOR99
-	.word	.LANCHOR9
-	.word	.LANCHOR10
+	.word	.LANCHOR11
+	.word	.LANCHOR12
 	.word	.LC68
 	.word	.LANCHOR126
 	.word	.LANCHOR107
@@ -7930,130 +7965,130 @@ gc_free_src_blk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r5, #0
-	ldr	r6, .L1288
-.L1252:
+	ldr	r6, .L1290
+.L1254:
 	uxth	r2, r5
-	ldr	r3, .L1288+4
+	ldr	r3, .L1290+4
 	ldrh	r1, [r3, #52]
 	cmp	r1, r2
-	bhi	.L1266
+	bhi	.L1268
 	movs	r2, #0
 	strh	r2, [r3, #52]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1266:
+.L1268:
 	uxth	r2, r5
 	add	r3, r3, r2, lsl #1
 	ldrh	r4, [r3, #54]
 	ldr	r3, [r6]
 	ldrh	r2, [r3, r4, lsl #1]
-	cbz	r2, .L1253
+	cbz	r2, .L1255
 	mov	r1, r4
-	ldr	r0, .L1288+8
+	ldr	r0, .L1290+8
 	bl	printf
-.L1253:
+.L1255:
 	ldr	r3, [r6]
 	movs	r2, #0
 	strh	r2, [r3, r4, lsl #1]	@ movhi
-	ldr	r3, .L1288+12
+	ldr	r3, .L1290+12
 	ldr	r7, [r3]
-	ldr	r3, .L1288+16
+	ldr	r3, .L1290+16
 	ldr	r3, [r3]
 	add	r7, r7, r4, lsl #2
 	lsls	r3, r3, #23
-	bpl	.L1254
+	bpl	.L1256
 	ldrb	r2, [r7, #2]	@ zero_extendqisi2
 	mov	r1, r4
-	ldr	r0, .L1288+20
+	ldr	r0, .L1290+20
 	lsrs	r2, r2, #5
 	bl	printf
-.L1254:
+.L1256:
 	ldrb	r3, [r7, #2]	@ zero_extendqisi2
 	and	r2, r3, #224
 	cmp	r2, #224
-	beq	.L1255
+	beq	.L1257
 	tst	r3, #192
-	bne	.L1256
-.L1255:
-	movw	r2, #1362
-	ldr	r1, .L1288+24
-	ldr	r0, .L1288+28
+	bne	.L1258
+.L1257:
+	movw	r2, #1363
+	ldr	r1, .L1290+24
+	ldr	r0, .L1290+28
 	bl	printf
-.L1256:
+.L1258:
 	mov	r0, r4
 	bl	ftl_free_sblk
-	ldr	r3, .L1288+32
+	ldr	r3, .L1290+32
 	ldr	r3, [r3]
 	ldrh	r1, [r3, #124]
-	cbz	r1, .L1257
+	cbz	r1, .L1259
 	add	r0, r3, #392
 	movs	r2, #0
-.L1259:
+.L1261:
 	ldrh	r7, [r0], #2
 	cmp	r4, r7
-	bne	.L1258
+	bne	.L1260
 	adds	r2, r2, #196
 	movw	r0, #65535
 	subs	r1, r1, #1
 	strh	r0, [r3, r2, lsl #1]	@ movhi
 	strh	r1, [r3, #124]	@ movhi
-.L1257:
+.L1259:
 	ldrh	r1, [r3, #120]
-	cbz	r1, .L1260
+	cbz	r1, .L1262
 	add	r0, r3, #136
 	movs	r2, #0
-.L1262:
+.L1264:
 	ldrh	r7, [r0], #2
 	cmp	r4, r7
-	bne	.L1261
+	bne	.L1263
 	adds	r2, r2, #68
 	movw	r0, #65535
 	subs	r1, r1, #1
 	strh	r0, [r3, r2, lsl #1]	@ movhi
 	strh	r1, [r3, #120]	@ movhi
-.L1260:
+.L1262:
 	ldrh	r1, [r3, #122]
-	cbz	r1, .L1263
+	cbz	r1, .L1265
 	add	r0, r3, #264
 	movs	r2, #0
-.L1265:
+.L1267:
 	ldrh	r7, [r0], #2
 	cmp	r4, r7
-	bne	.L1264
+	bne	.L1266
 	adds	r2, r2, #132
 	movw	r0, #65535
 	subs	r1, r1, #1
 	strh	r0, [r3, r2, lsl #1]	@ movhi
 	strh	r1, [r3, #122]	@ movhi
-.L1263:
+.L1265:
 	adds	r5, r5, #1
-	b	.L1252
-.L1258:
+	b	.L1254
+.L1260:
 	adds	r2, r2, #1
 	cmp	r2, #64
-	bne	.L1259
-	b	.L1257
-.L1261:
+	bne	.L1261
+	b	.L1259
+.L1263:
 	adds	r2, r2, #1
 	cmp	r2, #64
-	bne	.L1262
-	b	.L1260
-.L1264:
+	bne	.L1264
+	b	.L1262
+.L1266:
 	adds	r2, r2, #1
 	cmp	r2, #64
-	bne	.L1265
-	b	.L1263
-.L1289:
+	bne	.L1267
+	b	.L1265
+.L1291:
 	.align	2
-.L1288:
-	.word	.LANCHOR9
-	.word	.LANCHOR71
+.L1290:
+	.word	.LANCHOR11
+	.word	.LANCHOR70
 	.word	.LC69
-	.word	.LANCHOR7
-	.word	.LANCHOR14
+	.word	.LANCHOR9
+	.word	.LANCHOR19
 	.word	.LC70
 	.word	.LANCHOR127
 	.word	.LC0
-	.word	.LANCHOR10
+	.word	.LANCHOR12
 	.size	gc_free_src_blk, .-gc_free_src_blk
 	.section	.text.print_ftl_debug_info,"ax",%progbits
 	.align	1
@@ -8068,13 +8103,13 @@ print_ftl_debug_info:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
 	sub	sp, sp, #32
-	ldr	r4, .L1291
-	ldr	r5, .L1291+4
-	ldr	r6, .L1291+8
+	ldr	r4, .L1293
+	ldr	r5, .L1293+4
+	ldr	r6, .L1293+8
 	ldr	r1, [r4]
 	ldr	r0, [r5]
 	ldr	r6, [r6]
-	ldr	r3, .L1291+12
+	ldr	r3, .L1293+12
 	ldrh	r2, [r1, #146]
 	ldrh	r1, [r1, #148]
 	ldrh	r3, [r3]
@@ -8083,26 +8118,26 @@ print_ftl_debug_info:
 	str	r6, [sp, #24]
 	ldr	r0, [r0, #524]
 	str	r0, [sp, #20]
-	ldr	r0, .L1291+16
+	ldr	r0, .L1293+16
 	ldrh	r0, [r0]
 	str	r0, [sp, #16]
-	ldr	r0, .L1291+20
+	ldr	r0, .L1293+20
 	ldrh	r0, [r0]
 	str	r0, [sp, #12]
-	ldr	r0, .L1291+24
+	ldr	r0, .L1293+24
 	ldrh	r0, [r0]
 	str	r0, [sp, #8]
-	ldr	r0, .L1291+28
+	ldr	r0, .L1293+28
 	ldrh	r0, [r0]
 	str	r0, [sp, #4]
-	ldr	r0, .L1291+32
+	ldr	r0, .L1293+32
 	ldrh	r0, [r0]
 	str	r0, [sp]
-	ldr	r0, .L1291+36
+	ldr	r0, .L1293+36
 	bl	printf
 	ldr	r1, [r4]
-	ldr	r3, .L1291+40
-	ldr	r0, .L1291+44
+	ldr	r3, .L1293+40
+	ldr	r0, .L1293+44
 	ldr	r2, [r1, #64]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r2, [sp, #4]
@@ -8112,7 +8147,7 @@ print_ftl_debug_info:
 	ldr	r1, [r1, #20]
 	bl	printf
 	ldr	r1, [r4]
-	ldr	r0, .L1291+48
+	ldr	r0, .L1293+48
 	ldr	r3, [r1, #16]
 	ldr	r2, [r1, #60]
 	ldr	r1, [r1, #52]
@@ -8135,22 +8170,22 @@ print_ftl_debug_info:
 	str	r0, [sp, #4]
 	ldrh	r0, [r2, #92]
 	str	r0, [sp]
-	ldr	r0, .L1291+52
+	ldr	r0, .L1293+52
 	ldr	r2, [r2, #84]
 	bl	printf
-	ldr	r0, .L1291+56
-	ldr	r3, .L1291+60
-	ldr	r2, .L1291+64
+	ldr	r0, .L1293+56
+	ldr	r3, .L1293+60
+	ldr	r2, .L1293+64
 	ldrh	r0, [r0]
-	ldr	r1, .L1291+68
+	ldr	r1, .L1293+68
 	ldrh	r3, [r3]
 	ldrh	r2, [r2]
 	ldrh	r1, [r1]
 	str	r0, [sp, #4]
-	ldr	r0, .L1291+72
+	ldr	r0, .L1293+72
 	ldrh	r0, [r0]
 	str	r0, [sp]
-	ldr	r0, .L1291+76
+	ldr	r0, .L1293+76
 	bl	printf
 	ldr	r4, [r4]
 	ldr	r0, [r5]
@@ -8163,19 +8198,19 @@ print_ftl_debug_info:
 	str	r4, [sp, #4]
 	ldrh	r0, [r0, #590]
 	str	r0, [sp]
-	ldr	r0, .L1291+80
+	ldr	r0, .L1293+80
 	bl	printf
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, pc}
-.L1292:
+.L1294:
 	.align	2
-.L1291:
+.L1293:
 	.word	.LANCHOR110
-	.word	.LANCHOR10
+	.word	.LANCHOR12
 	.word	.LANCHOR128
 	.word	.LANCHOR103
-	.word	.LANCHOR93
+	.word	.LANCHOR91
 	.word	.LANCHOR99
 	.word	.LANCHOR97
 	.word	.LANCHOR107
@@ -8185,11 +8220,11 @@ print_ftl_debug_info:
 	.word	.LC72
 	.word	.LC73
 	.word	.LC74
-	.word	.LANCHOR87
-	.word	.LANCHOR70
+	.word	.LANCHOR86
+	.word	.LANCHOR69
 	.word	.LANCHOR102
 	.word	.LANCHOR100
-	.word	.LANCHOR94
+	.word	.LANCHOR93
 	.word	.LC75
 	.word	.LC76
 	.size	print_ftl_debug_info, .-print_ftl_debug_info
@@ -8206,19 +8241,19 @@ ftl_write_buf:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
 	mov	r4, r0
-	cbnz	r0, .L1294
-	movw	r2, #803
-	ldr	r1, .L1303
-	ldr	r0, .L1303+4
+	cbnz	r0, .L1296
+	mov	r2, #808
+	ldr	r1, .L1305
+	ldr	r0, .L1305+4
 	bl	printf
 	bl	print_ftl_debug_info
 	mov	r0, #-1
 	pop	{r4, r5, r6, pc}
-.L1297:
+.L1299:
 	mov	r1, r4
-	ldr	r0, .L1303+8
+	ldr	r0, .L1305+8
 	bl	buf_add_tail
-	ldr	r3, .L1303+12
+	ldr	r3, .L1305+12
 	ldrb	r1, [r4, #40]	@ zero_extendqisi2
 	ldrb	r0, [r6]	@ zero_extendqisi2
 	ldr	r3, [r3]
@@ -8232,37 +8267,37 @@ ftl_write_buf:
 	adds	r2, r2, #1
 	str	r2, [r3, #32]
 	pop	{r4, r5, r6, pc}
-.L1294:
-	ldr	r5, .L1303+16
+.L1296:
+	ldr	r5, .L1305+16
 	ldrb	r1, [r0, #40]	@ zero_extendqisi2
 	ldrb	r2, [r5]	@ zero_extendqisi2
 	cmp	r1, r2
-	bls	.L1299
-	movw	r2, #810
-	ldr	r1, .L1303
-	ldr	r0, .L1303+4
+	bls	.L1301
+	movw	r2, #815
+	ldr	r1, .L1305
+	ldr	r0, .L1305+4
 	bl	printf
-.L1299:
+.L1301:
 	ldrb	r3, [r4, #40]	@ zero_extendqisi2
-	ldr	r6, .L1303+20
-	cbz	r3, .L1296
+	ldr	r6, .L1305+20
+	cbz	r3, .L1298
 	ldrb	r2, [r5]	@ zero_extendqisi2
 	cmp	r2, r3
-	bcs	.L1297
-.L1296:
+	bcs	.L1299
+.L1298:
 	mov	r0, r4
 	bl	zbuf_free
 	ldrb	r0, [r6]	@ zero_extendqisi2
 	pop	{r4, r5, r6, pc}
-.L1304:
+.L1306:
 	.align	2
-.L1303:
+.L1305:
 	.word	.LANCHOR130
 	.word	.LC0
-	.word	.LANCHOR66
+	.word	.LANCHOR65
 	.word	.LANCHOR110
 	.word	.LANCHOR131
-	.word	.LANCHOR67
+	.word	.LANCHOR66
 	.size	ftl_write_buf, .-ftl_write_buf
 	.section	.text.ftl_write_completed,"ax",%progbits
 	.align	1
@@ -8277,18 +8312,18 @@ ftl_write_completed:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	fp, #0
-	ldr	r8, .L1321+36
-	ldr	r10, .L1321+40
-.L1306:
+	ldr	r8, .L1323+36
+	ldr	r10, .L1323+40
+.L1308:
 	ldrb	r6, [r8]	@ zero_extendqisi2
 	cmp	r6, #255
-	bne	.L1317
+	bne	.L1319
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1317:
+.L1319:
 	movs	r3, #48
-	ldr	r5, .L1321
+	ldr	r5, .L1323
 	muls	r3, r6, r3
 	add	r7, r6, r6, lsl #1
 	add	r7, r5, r7, lsl #4
@@ -8297,26 +8332,26 @@ ftl_write_completed:
 	strb	r3, [r8]
 	ldr	r3, [r4, #36]
 	adds	r3, r3, #1
-	bne	.L1307
-	ldr	r3, .L1321+4
+	bne	.L1309
+	ldr	r3, .L1323+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L1308
-	ldr	r3, .L1321+8
+	cbnz	r3, .L1310
+	ldr	r3, .L1323+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1309
-.L1308:
-	ldr	r3, .L1321+12
+	cbz	r3, .L1311
+.L1310:
+	ldr	r3, .L1323+12
 	ldr	r3, [r3]
 	ldr	r3, [r3, #156]
 	cmp	r3, r10
-	beq	.L1310
-.L1309:
-	ldr	r2, .L1321+16
+	beq	.L1312
+.L1311:
+	ldr	r2, .L1323+16
 	movs	r3, #48
 	mla	r3, r3, r6, r5
-	ldr	fp, .L1321+44
+	ldr	fp, .L1323+44
 	ldrh	r1, [r2]
-	ldr	r2, .L1321+20
+	ldr	r2, .L1323+20
 	ldr	r3, [r3, #24]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	str	r3, [sp, #4]
@@ -8325,7 +8360,7 @@ ftl_write_completed:
 	movs	r2, #1
 	lsls	r2, r2, r0
 	lsr	r0, r3, r1
-	ldr	r1, .L1321+24
+	ldr	r1, .L1323+24
 	subs	r2, r2, #1
 	ands	r0, r0, r2
 	ldrb	r1, [r1]	@ zero_extendqisi2
@@ -8333,7 +8368,7 @@ ftl_write_completed:
 	ldr	r2, [fp]
 	movw	r1, #65535
 	uxth	r4, r0
-	ldr	r0, .L1321+28
+	ldr	r0, .L1323+28
 	ldr	r3, [r2, #560]
 	cmp	r3, r1
 	ldr	r3, [sp, #4]
@@ -8352,61 +8387,61 @@ ftl_write_completed:
 	str	r2, [r3, #556]
 	ldrh	r2, [r3, #16]
 	cmp	r2, r4
-	bne	.L1312
+	bne	.L1314
 	movs	r2, #0
 	strh	r2, [r3, #22]	@ movhi
-.L1310:
+.L1312:
 	mov	r0, r7
 	mov	fp, #1
 	bl	ftl_write_buf
-	b	.L1306
-.L1312:
+	b	.L1308
+.L1314:
 	ldrh	r2, [r3, #48]
 	cmp	r2, r4
 	itt	eq
 	moveq	r2, #0
 	strheq	r2, [r3, #54]	@ movhi
-	b	.L1310
-.L1307:
+	b	.L1312
+.L1309:
 	cmp	fp, #0
-	beq	.L1315
+	beq	.L1317
 	ldr	r2, [r4, #24]
 	ldr	r1, [r4, #20]
-	ldr	r0, .L1321+32
+	ldr	r0, .L1323+32
 	bl	printf
 	mov	r0, r7
 	bl	ftl_write_buf
-	b	.L1306
-.L1315:
+	b	.L1308
+.L1317:
 	ldrh	r2, [r4, #32]
 	ldr	r1, [r4, #28]
 	ldr	r0, [r4, #20]
 	bl	lpa_hash_update_ppa
 	ldrb	r3, [r4, #2]	@ zero_extendqisi2
 	lsls	r2, r3, #29
-	bpl	.L1316
+	bpl	.L1318
 	bic	r3, r3, #2
 	strb	r3, [r4, #2]
-	b	.L1306
-.L1316:
+	b	.L1308
+.L1318:
 	mov	r0, r7
 	bl	zbuf_free
-	b	.L1306
-.L1322:
+	b	.L1308
+.L1324:
 	.align	2
-.L1321:
-	.word	.LANCHOR56
+.L1323:
+	.word	.LANCHOR55
 	.word	.LANCHOR124
-	.word	.LANCHOR81
+	.word	.LANCHOR80
 	.word	.LANCHOR110
+	.word	.LANCHOR74
+	.word	.LANCHOR31
 	.word	.LANCHOR75
-	.word	.LANCHOR32
-	.word	.LANCHOR76
 	.word	.LC77
 	.word	.LC78
-	.word	.LANCHOR65
+	.word	.LANCHOR64
 	.word	1145785929
-	.word	.LANCHOR10
+	.word	.LANCHOR12
 	.size	ftl_write_completed, .-ftl_write_completed
 	.section	.text.zftl_add_read_buf,"ax",%progbits
 	.align	1
@@ -8421,123 +8456,41 @@ zftl_add_read_buf:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
 	mov	r4, r0
-	cbnz	r0, .L1324
-	movw	r2, #1143
-	ldr	r1, .L1328
-	ldr	r0, .L1328+4
+	cbnz	r0, .L1326
+	movw	r2, #1148
+	ldr	r1, .L1330
+	ldr	r0, .L1330+4
 	bl	printf
 	pop	{r4, lr}
 	b	print_ftl_debug_info
-.L1324:
-	ldr	r3, .L1328+8
+.L1326:
+	ldr	r3, .L1330+8
 	ldrb	r2, [r0, #40]	@ zero_extendqisi2
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r2, r3
-	bls	.L1326
-	movw	r2, #1150
-	ldr	r1, .L1328
-	ldr	r0, .L1328+4
+	bls	.L1328
+	movw	r2, #1155
+	ldr	r1, .L1330
+	ldr	r0, .L1330+4
 	bl	printf
-.L1326:
+.L1328:
 	mov	r1, r4
-	ldr	r0, .L1328+12
+	ldr	r0, .L1330+12
 	bl	buf_add_tail
-	ldr	r2, .L1328+16
+	ldr	r2, .L1330+16
 	ldrb	r3, [r2]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	strb	r3, [r2]
 	pop	{r4, pc}
-.L1329:
+.L1331:
 	.align	2
-.L1328:
+.L1330:
 	.word	.LANCHOR132
 	.word	.LC0
 	.word	.LANCHOR131
 	.word	.LANCHOR133
 	.word	.LANCHOR134
 	.size	zftl_add_read_buf, .-zftl_add_read_buf
-	.section	.text.ftl_alloc_sblk,"ax",%progbits
-	.align	1
-	.global	ftl_alloc_sblk
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_alloc_sblk, %function
-ftl_alloc_sblk:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	uxth	r5, r0
-	cmp	r0, #5
-	mov	r7, r0
-	mov	r1, r5
-	mov	r0, #0
-	ite	ne
-	movne	r6, #0
-	moveq	r6, #2
-	bl	zftl_get_free_sblk
-	movw	r3, #65535
-	mov	r4, r0
-	cmp	r0, r3
-	beq	.L1332
-	ldr	r3, .L1339
-	ldr	r5, [r3]
-	add	r5, r5, r0, lsl #2
-	ldrb	r3, [r5, #2]	@ zero_extendqisi2
-	tst	r3, #224
-	beq	.L1333
-	movw	r2, #939
-	ldr	r1, .L1339+4
-	ldr	r0, .L1339+8
-	bl	printf
-.L1333:
-	ldrb	r3, [r5, #2]	@ zero_extendqisi2
-	bfi	r3, r7, #5, #3
-	uxtb	r3, r3
-	ubfx	r2, r3, #3, #2
-	orrs	r2, r2, r6
-	bfi	r3, r2, #3, #2
-	strb	r3, [r5, #2]
-	uxtb	r3, r3
-	and	r2, r3, #24
-	cmp	r2, #24
-	bne	.L1334
-	cbnz	r6, .L1334
-	movs	r2, #1
-	bfi	r3, r2, #3, #2
-	strb	r3, [r5, #2]
-.L1334:
-	mov	r0, r4
-	pop	{r3, r4, r5, r6, r7, pc}
-.L1332:
-	bl	print_ftl_debug_info
-	mov	r2, r7
-	mov	r1, r4
-	ldr	r0, .L1339+12
-	bl	printf
-	mov	r1, r5
-	movs	r0, #0
-	bl	zftl_get_free_sblk
-	mov	r2, r7
-	mov	r1, r0
-	mov	r4, r0
-	ldr	r0, .L1339+12
-	bl	printf
-	bl	dump_all_list_info
-	movw	r2, #955
-	ldr	r1, .L1339+4
-	ldr	r0, .L1339+8
-	bl	printf
-	b	.L1334
-.L1340:
-	.align	2
-.L1339:
-	.word	.LANCHOR7
-	.word	.LANCHOR135
-	.word	.LC0
-	.word	.LC79
-	.size	ftl_alloc_sblk, .-ftl_alloc_sblk
 	.section	.text.sblk_init,"ax",%progbits
 	.align	1
 	.global	sblk_init
@@ -8550,24 +8503,24 @@ sblk_init:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L1342
+	ldr	r2, .L1333
 	movs	r3, #255
 	movs	r0, #0
 	strb	r3, [r2]
-	ldr	r2, .L1342+4
+	ldr	r2, .L1333+4
 	strb	r3, [r2]
-	ldr	r2, .L1342+8
+	ldr	r2, .L1333+8
 	strb	r3, [r2]
-	ldr	r2, .L1342+12
+	ldr	r2, .L1333+12
 	strb	r3, [r2]
 	bx	lr
-.L1343:
+.L1334:
 	.align	2
-.L1342:
-	.word	.LANCHOR60
-	.word	.LANCHOR65
-	.word	.LANCHOR63
+.L1333:
+	.word	.LANCHOR59
 	.word	.LANCHOR64
+	.word	.LANCHOR62
+	.word	.LANCHOR63
 	.size	sblk_init, .-sblk_init
 	.section	.text.dump_sblk_queue,"ax",%progbits
 	.align	1
@@ -8581,18 +8534,18 @@ dump_sblk_queue:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
-	ldr	r4, .L1353
-	ldr	r0, .L1353+4
+	ldr	r4, .L1344
+	ldr	r0, .L1344+4
 	ldrb	r1, [r4]	@ zero_extendqisi2
 	bl	printf
 	ldrb	r4, [r4]	@ zero_extendqisi2
 	cmp	r4, #255
-	beq	.L1344
-	ldr	r5, .L1353+8
+	beq	.L1335
+	ldr	r5, .L1344+8
 	add	r4, r4, r4, lsl #1
-	ldr	r6, .L1353+12
+	ldr	r6, .L1344+12
 	add	r4, r5, r4, lsl #4
-.L1346:
+.L1337:
 	ldr	r3, [r4, #24]
 	mov	r0, r6
 	ldrb	r2, [r4, #42]	@ zero_extendqisi2
@@ -8600,19 +8553,19 @@ dump_sblk_queue:
 	bl	printf
 	ldrb	r4, [r4]	@ zero_extendqisi2
 	cmp	r4, #255
-	beq	.L1344
+	beq	.L1335
 	add	r4, r4, r4, lsl #1
 	add	r4, r5, r4, lsl #4
-	b	.L1346
-.L1344:
+	b	.L1337
+.L1335:
 	pop	{r4, r5, r6, pc}
-.L1354:
+.L1345:
 	.align	2
-.L1353:
-	.word	.LANCHOR60
+.L1344:
+	.word	.LANCHOR59
+	.word	.LC79
+	.word	.LANCHOR55
 	.word	.LC80
-	.word	.LANCHOR56
-	.word	.LC81
 	.size	dump_sblk_queue, .-dump_sblk_queue
 	.section	.text.queue_lun_state,"ax",%progbits
 	.align	1
@@ -8625,14 +8578,14 @@ dump_sblk_queue:
 queue_lun_state:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1374
+	ldr	r3, .L1365
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	ldrb	r6, [r3]	@ zero_extendqisi2
 	cmp	r6, #255
-	beq	.L1363
-	ldr	r3, .L1374+4
+	beq	.L1354
+	ldr	r3, .L1365+4
 	movs	r2, #1
-	ldr	r10, .L1374+16
+	ldr	r10, .L1365+16
 	mov	r8, #48
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	rsb	ip, r3, #24
@@ -8642,11 +8595,11 @@ queue_lun_state:
 	uxth	r3, r3
 	ands	r4, r4, r3
 	str	r4, [sp]
-	ldr	r4, .L1374+8
+	ldr	r4, .L1365+8
 	ldrh	lr, [r4]
 	sub	r4, ip, lr
 	lsls	r2, r2, r4
-	ldr	r4, .L1374+12
+	ldr	r4, .L1365+12
 	subs	r2, r2, #1
 	ldrb	r7, [r4]	@ zero_extendqisi2
 	asr	r4, r0, lr
@@ -8656,7 +8609,7 @@ queue_lun_state:
 	ands	r4, r4, r7
 	and	r0, r4, r2
 	str	r0, [sp, #4]
-.L1362:
+.L1353:
 	mla	fp, r8, r6, r10
 	ldr	r5, [fp, #24]
 	lsr	r0, r5, ip
@@ -8664,57 +8617,57 @@ queue_lun_state:
 	mov	r4, r0
 	ldr	r0, [sp]
 	cmp	r0, r4
-	bne	.L1357
+	bne	.L1348
 	lsr	r5, r5, lr
 	ldr	r4, [sp, #4]
 	ldrb	r0, [fp, #42]	@ zero_extendqisi2
 	ands	r5, r5, r7
 	ands	r5, r5, r2
 	cmp	r4, r5
-	bne	.L1358
+	bne	.L1349
 	cmp	r1, #1
-	bne	.L1355
-.L1360:
+	bne	.L1346
+.L1351:
 	cmp	r0, #7
-	beq	.L1357
+	beq	.L1348
 	cmp	r0, #9
-.L1371:
-	bne	.L1355
-.L1357:
+.L1362:
+	bne	.L1346
+.L1348:
 	mul	r6, r8, r6
-	ldr	r0, .L1374+16
+	ldr	r0, .L1365+16
 	ldrb	r6, [r0, r6]	@ zero_extendqisi2
 	cmp	r6, #255
-	bne	.L1362
-.L1363:
+	bne	.L1353
+.L1354:
 	movs	r0, #0
-.L1355:
+.L1346:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1358:
+.L1349:
 	cmp	r1, #3
-	bhi	.L1357
-	adr	r5, .L1359
+	bhi	.L1348
+	adr	r5, .L1350
 	ldr	pc, [r5, r1, lsl #2]
 	.p2align 2
-.L1359:
-	.word	.L1355+1
-	.word	.L1360+1
-	.word	.L1361+1
-	.word	.L1355+1
+.L1350:
+	.word	.L1346+1
+	.word	.L1351+1
+	.word	.L1352+1
+	.word	.L1346+1
 	.p2align 1
-.L1361:
+.L1352:
 	cmp	r0, #11
-	b	.L1371
-.L1375:
+	b	.L1362
+.L1366:
 	.align	2
-.L1374:
-	.word	.LANCHOR60
-	.word	.LANCHOR32
+.L1365:
+	.word	.LANCHOR59
+	.word	.LANCHOR31
+	.word	.LANCHOR74
 	.word	.LANCHOR75
-	.word	.LANCHOR76
-	.word	.LANCHOR56
+	.word	.LANCHOR55
 	.size	queue_lun_state, .-queue_lun_state
 	.section	.text.queue_remove_completed_req,"ax",%progbits
 	.align	1
@@ -8729,238 +8682,94 @@ queue_remove_completed_req:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	ip, #0
-	ldr	r5, .L1401
+	ldr	r5, .L1392
 	movs	r4, #48
 	mov	fp, #255
-	ldr	r6, .L1401+4
+	ldr	r6, .L1392+4
 	ldrb	r3, [r5]	@ zero_extendqisi2
-	ldr	r1, .L1401+8
-	ldr	r7, .L1401+12
+	ldr	r1, .L1392+8
+	ldr	r7, .L1392+12
 	str	r3, [sp, #4]
 	ldrb	r3, [r6]	@ zero_extendqisi2
 	ldrb	r2, [r1]	@ zero_extendqisi2
 	ldrb	r10, [r7]	@ zero_extendqisi2
 	str	r3, [sp]
-	ldr	r3, .L1401+16
-.L1377:
+	ldr	r3, .L1392+16
+.L1368:
 	cmp	r2, #255
-	beq	.L1378
+	beq	.L1369
 	mul	r8, r4, r2
 	mov	r0, r2
 	add	lr, r3, r8
 	ldrb	lr, [lr, #42]	@ zero_extendqisi2
 	sub	lr, lr, #12
 	cmp	lr, #1
-	bls	.L1379
-.L1378:
+	bls	.L1370
+.L1369:
 	cmp	ip, #0
-	beq	.L1376
+	beq	.L1367
 	strb	r2, [r1]
-	b	.L1376
-.L1379:
+	b	.L1367
+.L1370:
 	mul	lr, r4, r0
 	ldrb	r2, [r3, r8]	@ zero_extendqisi2
 	add	ip, r3, lr
 	strb	fp, [r3, lr]
 	ldrb	lr, [ip, #43]	@ zero_extendqisi2
 	cmp	lr, #1
-	bne	.L1382
+	bne	.L1373
 	ldrh	ip, [ip, #34]
 	cmp	ip, #0
-	bne	.L1390
+	bne	.L1381
 	mov	ip, r10
 	mov	lr, r7
-.L1383:
+.L1374:
 	cmp	ip, #255
-	bne	.L1388
+	bne	.L1379
 	strb	r2, [r1]
 	movs	r2, #48
 	mla	r3, r2, r0, r3
 	ldrb	r3, [r3, #1]	@ zero_extendqisi2
 	strb	r3, [lr]
-.L1376:
+.L1367:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1382:
+.L1373:
 	cmp	lr, #0
-	bne	.L1384
+	bne	.L1375
 	ldr	ip, [ip, #20]
 	cmp	ip, #-1
-	beq	.L1384
+	beq	.L1375
 	ldr	ip, [sp, #4]
 	mov	lr, r5
-	b	.L1383
-.L1390:
+	b	.L1374
+.L1381:
 	ldr	ip, [sp]
 	mov	lr, r6
-	b	.L1383
-.L1388:
+	b	.L1374
+.L1379:
 	mov	lr, ip
 	mul	ip, r4, ip
 	ldrb	ip, [r3, ip]	@ zero_extendqisi2
 	cmp	ip, #255
-	bne	.L1388
+	bne	.L1379
 	mla	r0, r4, r0, r3
 	mul	lr, r4, lr
 	ldrb	r0, [r0, #1]	@ zero_extendqisi2
 	strb	r0, [r3, lr]
-.L1384:
+.L1375:
 	mov	ip, #1
-	b	.L1377
-.L1402:
+	b	.L1368
+.L1393:
 	.align	2
-.L1401:
+.L1392:
+	.word	.LANCHOR62
 	.word	.LANCHOR63
+	.word	.LANCHOR59
 	.word	.LANCHOR64
-	.word	.LANCHOR60
-	.word	.LANCHOR65
-	.word	.LANCHOR56
+	.word	.LANCHOR55
 	.size	queue_remove_completed_req, .-queue_remove_completed_req
-	.section	.text.pm_alloc_new_blk,"ax",%progbits
-	.align	1
-	.global	pm_alloc_new_blk
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	pm_alloc_new_blk, %function
-pm_alloc_new_blk:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	ldr	r5, .L1421
-	ldr	r1, .L1421+4
-	ldr	r2, [r5]
-	ldrb	r1, [r1]	@ zero_extendqisi2
-	ldrh	r3, [r2, #690]
-	adds	r3, r3, #1
-	uxth	r3, r3
-	cmp	r1, r3
-	strh	r3, [r2, #690]	@ movhi
-	bls	.L1404
-	add	r3, r3, #336
-	ldrh	r2, [r2, r3, lsl #1]
-	movw	r3, #65535
-	cmp	r2, r3
-	bne	.L1405
-.L1404:
-	ldr	r7, .L1421+8
-	ldr	r4, .L1421+12
-.L1419:
-	movw	r8, #65535
-.L1406:
-	movs	r0, #1
-	bl	ftl_alloc_sblk
-	cmp	r0, r8
-	mov	r6, r0
-	beq	.L1406
-	movs	r1, #0
-	bl	ftl_erase_sblk
-	ldr	r1, [r5]
-	mov	r0, r6
-	add	r1, r1, #672
-	bl	ftl_get_blk_list_in_sblk
-	uxth	r0, r0
-	cbnz	r0, .L1407
-	mov	r1, r6
-	mov	r0, r7
-	bl	printf
-	ldr	r3, [r4]
-	add	r6, r3, r6, lsl #2
-	ldrb	r3, [r6, #2]	@ zero_extendqisi2
-	orr	r3, r3, #224
-	strb	r3, [r6, #2]
-	b	.L1419
-.L1407:
-	ldr	r3, [r5]
-	movs	r1, #1
-	ldr	r2, .L1421+16
-	movs	r4, #0
-	strh	r4, [r3, #690]	@ movhi
-	add	r3, r3, #416
-	str	r1, [r2]
-	movw	r1, #65535
-.L1409:
-	ldrh	r0, [r3], #2
-	uxth	r2, r4
-	cmp	r0, r1
-	beq	.L1408
-	adds	r4, r4, #1
-	cmp	r4, #128
-	bne	.L1409
-	mov	r2, #264
-	ldr	r1, .L1421+20
-	ldr	r0, .L1421+24
-	bl	printf
-	mov	r2, r4
-.L1408:
-	ldr	r3, [r5]
-	adds	r2, r2, #208
-	strh	r6, [r3, r2, lsl #1]	@ movhi
-	ldrh	r2, [r3, #688]
-	adds	r2, r2, #1
-	strh	r2, [r3, #688]	@ movhi
-.L1405:
-	ldr	r2, [r5]
-	ldrh	r3, [r2, #690]
-	add	r3, r3, #336
-	ldrh	r4, [r2, r3, lsl #1]
-	movw	r2, #65533
-	subs	r3, r4, #1
-	uxth	r3, r3
-	cmp	r3, r2
-	bls	.L1411
-	mov	r2, #270
-	ldr	r1, .L1421+20
-	ldr	r0, .L1421+24
-	bl	printf
-.L1411:
-	ldr	r1, [r5]
-	movs	r3, #0
-	strh	r3, [r1, #696]	@ movhi
-	ldr	r3, .L1421+28
-	strh	r4, [r1, #692]	@ movhi
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	ldr	r3, .L1421+32
-	rsb	r2, r2, #24
-	ldrh	r3, [r3]
-	subs	r2, r2, r3
-	asr	r3, r4, r2
-	strh	r3, [r1, #694]	@ movhi
-	ldr	r1, .L1421+36
-	ldr	r1, [r1]
-	lsls	r1, r1, #19
-	bpl	.L1415
-	movs	r1, #1
-	uxth	r3, r3
-	lsl	r2, r1, r2
-	ldr	r0, .L1421+40
-	str	r3, [sp]
-	mov	r1, r4
-	mov	r3, r4
-	subs	r2, r2, #1
-	bl	printf
-.L1415:
-	movs	r0, #0
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, pc}
-.L1422:
-	.align	2
-.L1421:
-	.word	.LANCHOR110
-	.word	.LANCHOR80
-	.word	.LC82
-	.word	.LANCHOR7
-	.word	.LANCHOR136
-	.word	.LANCHOR137
-	.word	.LC0
-	.word	.LANCHOR32
-	.word	.LANCHOR75
-	.word	.LANCHOR14
-	.word	.LC83
-	.size	pm_alloc_new_blk, .-pm_alloc_new_blk
 	.section	.text.pm_select_ram_region,"ax",%progbits
 	.align	1
 	.global	pm_select_ram_region
@@ -8972,72 +8781,72 @@ pm_alloc_new_blk:
 pm_select_ram_region:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L1433
+	ldr	r2, .L1404
 	movw	r0, #65535
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r3, #0
 	mov	r1, r2
-.L1425:
+.L1396:
 	ldrh	r5, [r2, r3, lsl #3]
 	uxth	r4, r3
 	cmp	r5, r0
-	beq	.L1424
+	beq	.L1395
 	adds	r3, r3, #1
 	cmp	r3, #32
-	bne	.L1425
+	bne	.L1396
 	movs	r2, #0
 	mov	r4, r3
 	mov	r0, #32768
-.L1427:
+.L1398:
 	add	r3, r1, r2, lsl #3
 	uxth	r5, r2
 	ldrh	r3, [r3, #2]
 	lsls	r6, r3, #16
-	bmi	.L1426
+	bmi	.L1397
 	cmp	r3, r0
 	itt	cc
 	movcc	r0, r3
 	movcc	r4, r5
-.L1426:
+.L1397:
 	adds	r2, r2, #1
 	cmp	r2, #32
-	bne	.L1427
+	bne	.L1398
 	cmp	r4, #32
-	bne	.L1424
-	ldr	r3, .L1433+4
+	bne	.L1395
+	ldr	r3, .L1404+4
 	mov	r2, #-1
 	ldrb	r5, [r3]	@ zero_extendqisi2
 	movs	r3, #0
-.L1429:
+.L1400:
 	add	r0, r1, r3, lsl #3
 	uxth	r6, r3
 	ldrh	r0, [r0, #2]
 	cmp	r0, r2
-	bcs	.L1428
+	bcs	.L1399
 	ldrh	r7, [r1, r3, lsl #3]
 	cmp	r7, r5
 	itt	ne
 	movne	r2, r0
 	movne	r4, r6
-.L1428:
+.L1399:
 	adds	r3, r3, #1
 	cmp	r3, #32
-	bne	.L1429
+	bne	.L1400
 	cmp	r4, #32
-	bne	.L1424
+	bne	.L1395
 	movw	r2, #377
-	ldr	r1, .L1433+8
-	ldr	r0, .L1433+12
+	ldr	r1, .L1404+8
+	ldr	r0, .L1404+12
 	bl	printf
-.L1424:
+.L1395:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1434:
+.L1405:
 	.align	2
-.L1433:
-	.word	.LANCHOR138
-	.word	.LANCHOR139
-	.word	.LANCHOR140
+.L1404:
+	.word	.LANCHOR135
+	.word	.LANCHOR136
+	.word	.LANCHOR137
 	.word	.LC0
 	.size	pm_select_ram_region, .-pm_select_ram_region
 	.section	.text.idb_init,"ax",%progbits
@@ -9052,23 +8861,23 @@ idb_init:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L1436
+	ldr	r3, .L1407
 	movs	r0, #0
 	str	r0, [r3]
-	ldr	r3, .L1436+4
+	ldr	r3, .L1407+4
 	str	r0, [r3]
-	ldr	r3, .L1436+8
+	ldr	r3, .L1407+8
 	strb	r0, [r3]
-	ldr	r3, .L1436+12
+	ldr	r3, .L1407+12
 	str	r0, [r3]
 	bx	lr
-.L1437:
+.L1408:
 	.align	2
-.L1436:
+.L1407:
+	.word	.LANCHOR138
+	.word	.LANCHOR139
+	.word	.LANCHOR140
 	.word	.LANCHOR141
-	.word	.LANCHOR142
-	.word	.LANCHOR143
-	.word	.LANCHOR144
 	.size	idb_init, .-idb_init
 	.section	.text.ftl_memset,"ax",%progbits
 	.align	1
@@ -9097,62 +8906,62 @@ flash_lsb_page_tbl_build:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	mov	r5, r0
-	ldr	r3, .L1492
+	ldr	r3, .L1463
 	mov	r0, #1024
 	ldr	r3, [r3]
 	ldrb	r1, [r3, #12]	@ zero_extendqisi2
 	bl	__aeabi_idiv
 	uxth	r4, r0
-	cbnz	r5, .L1440
-	ldr	r3, .L1492+4
-.L1441:
+	cbnz	r5, .L1411
+	ldr	r3, .L1463+4
+.L1412:
 	strh	r5, [r3, r5, lsl #1]	@ movhi
 	adds	r5, r5, #1
 	cmp	r5, #512
-	bne	.L1441
-.L1447:
+	bne	.L1412
+.L1418:
 	movs	r1, #255
 	mov	r2, #2048
-	ldr	r0, .L1492+8
+	ldr	r0, .L1463+8
 	bl	ftl_memset
-	ldr	r0, .L1492+4
+	ldr	r0, .L1463+4
 	movs	r3, #0
-	ldr	r1, .L1492+8
-.L1442:
+	ldr	r1, .L1463+8
+.L1413:
 	ldrh	r2, [r0, r3, lsl #1]
 	adds	r3, r3, #1
 	strh	r2, [r1, r2, lsl #1]	@ movhi
 	uxth	r2, r3
 	cmp	r2, r4
-	bcc	.L1442
+	bcc	.L1413
 	pop	{r3, r4, r5, pc}
-.L1440:
+.L1411:
 	cmp	r5, #1
-	bne	.L1443
-	ldr	r1, .L1492+4
+	bne	.L1414
+	ldr	r1, .L1463+4
 	movs	r3, #0
-.L1446:
+.L1417:
 	cmp	r3, #3
 	uxth	r2, r3
-	bls	.L1444
+	bls	.L1415
 	tst	r2, #1
 	ite	ne
 	movne	r0, #3
 	moveq	r0, #2
 	rsb	r2, r0, r2, lsl #1
 	uxth	r2, r2
-.L1444:
+.L1415:
 	strh	r2, [r1, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	cmp	r3, #512
-	bne	.L1446
-	b	.L1447
-.L1443:
+	bne	.L1417
+	b	.L1418
+.L1414:
 	cmp	r5, #2
-	bne	.L1448
-	ldr	r1, .L1492+4
+	bne	.L1419
+	ldr	r1, .L1463+4
 	movs	r2, #0
-.L1450:
+.L1421:
 	uxth	r3, r2
 	cmp	r2, #1
 	ittt	hi
@@ -9162,34 +8971,34 @@ flash_lsb_page_tbl_build:
 	strh	r3, [r1, r2, lsl #1]	@ movhi
 	adds	r2, r2, #1
 	cmp	r2, #512
-	bne	.L1450
-	b	.L1447
-.L1448:
+	bne	.L1421
+	b	.L1418
+.L1419:
 	cmp	r5, #3
-	bne	.L1451
-	ldr	r1, .L1492+4
+	bne	.L1422
+	ldr	r1, .L1463+4
 	movs	r3, #0
-.L1454:
+.L1425:
 	cmp	r3, #5
 	uxth	r2, r3
-	bls	.L1452
+	bls	.L1423
 	tst	r2, #1
 	ite	ne
 	movne	r0, #5
 	moveq	r0, #4
 	rsb	r2, r0, r2, lsl #1
 	uxth	r2, r2
-.L1452:
+.L1423:
 	strh	r2, [r1, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	cmp	r3, #512
-	bne	.L1454
-	b	.L1447
-.L1451:
+	bne	.L1425
+	b	.L1418
+.L1422:
 	cmp	r5, #4
 	mov	r3, #0
-	bne	.L1455
-	ldr	r2, .L1492+4
+	bne	.L1426
+	ldr	r2, .L1463+4
 	strh	r3, [r2]	@ movhi
 	movs	r3, #1
 	strh	r3, [r2, #2]	@ movhi
@@ -9204,7 +9013,7 @@ flash_lsb_page_tbl_build:
 	movs	r3, #8
 	strh	r5, [r2, #8]	@ movhi
 	strh	r3, [r2, #14]!	@ movhi
-.L1457:
+.L1428:
 	tst	r3, #1
 	ite	ne
 	movne	r1, #7
@@ -9214,39 +9023,39 @@ flash_lsb_page_tbl_build:
 	uxth	r3, r3
 	strh	r1, [r2, #2]!	@ movhi
 	cmp	r3, #512
-	bne	.L1457
-	b	.L1447
-.L1455:
+	bne	.L1428
+	b	.L1418
+.L1426:
 	cmp	r5, #5
-	bne	.L1458
-	ldr	r2, .L1492+4
-.L1459:
+	bne	.L1429
+	ldr	r2, .L1463+4
+.L1430:
 	strh	r3, [r2, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	cmp	r3, #16
-	bne	.L1459
-	ldr	r2, .L1492+12
-.L1460:
+	bne	.L1430
+	ldr	r2, .L1463+12
+.L1431:
 	strh	r3, [r2, #2]!	@ movhi
 	adds	r3, r3, #2
 	uxth	r3, r3
 	cmp	r3, #1008
-	bne	.L1460
-	b	.L1447
-.L1458:
+	bne	.L1431
+	b	.L1418
+.L1429:
 	cmp	r5, #8
-	bne	.L1461
-	ldr	r2, .L1492+4
-.L1462:
+	bne	.L1432
+	ldr	r2, .L1463+4
+.L1433:
 	strh	r3, [r3, r2]	@ movhi
 	adds	r3, r3, #2
 	cmp	r3, #1024
-	bne	.L1462
-	b	.L1447
-.L1461:
+	bne	.L1433
+	b	.L1418
+.L1432:
 	cmp	r5, #9
-	bne	.L1463
-	ldr	r2, .L1492+4
+	bne	.L1434
+	ldr	r2, .L1463+4
 	movw	r1, #1021
 	strh	r3, [r2]	@ movhi
 	movs	r3, #1
@@ -9255,43 +9064,43 @@ flash_lsb_page_tbl_build:
 	movs	r2, #2
 	strh	r2, [r3, #4]!	@ movhi
 	movs	r2, #3
-.L1464:
+.L1435:
 	strh	r2, [r3, #2]!	@ movhi
 	adds	r2, r2, #2
 	uxth	r2, r2
 	cmp	r2, r1
-	bne	.L1464
-	b	.L1447
-.L1463:
+	bne	.L1435
+	b	.L1418
+.L1434:
 	cmp	r5, #10
-	bne	.L1465
-	ldr	r2, .L1492+4
-.L1466:
+	bne	.L1436
+	ldr	r2, .L1463+4
+.L1437:
 	strh	r3, [r2, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	cmp	r3, #63
-	bne	.L1466
-	ldr	r2, .L1492+16
+	bne	.L1437
+	ldr	r2, .L1463+16
 	movw	r1, #961
-.L1467:
+.L1438:
 	strh	r3, [r2, #2]!	@ movhi
 	adds	r3, r3, #2
 	uxth	r3, r3
 	cmp	r3, r1
-	bne	.L1467
-	b	.L1447
-.L1465:
+	bne	.L1438
+	b	.L1418
+.L1436:
 	cmp	r5, #11
-	bne	.L1468
-	ldr	r2, .L1492+4
+	bne	.L1439
+	ldr	r2, .L1463+4
 	movs	r3, #0
-.L1469:
+.L1440:
 	strh	r3, [r2, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	cmp	r3, #8
-	bne	.L1469
-	ldr	r1, .L1492+20
-.L1471:
+	bne	.L1440
+	ldr	r1, .L1463+20
+.L1442:
 	tst	r3, #1
 	ite	ne
 	movne	r2, #7
@@ -9301,26 +9110,26 @@ flash_lsb_page_tbl_build:
 	uxth	r3, r3
 	strh	r2, [r1, #2]!	@ movhi
 	cmp	r3, #512
-	bne	.L1471
-	b	.L1447
-.L1468:
+	bne	.L1442
+	b	.L1418
+.L1439:
 	cmp	r5, #13
-	bne	.L1447
-	ldr	r2, .L1492+24
+	bne	.L1418
+	ldr	r2, .L1463+24
 	movs	r3, #0
-.L1472:
+.L1443:
 	strh	r3, [r2, #2]!	@ movhi
 	adds	r3, r3, #3
 	uxth	r3, r3
 	cmp	r3, #1536
-	bne	.L1472
-	b	.L1447
-.L1493:
+	bne	.L1443
+	b	.L1418
+.L1464:
 	.align	2
-.L1492:
-	.word	.LANCHOR16
+.L1463:
+	.word	.LANCHOR21
 	.word	.LANCHOR3
-	.word	.LANCHOR145
+	.word	.LANCHOR142
 	.word	.LANCHOR3+30
 	.word	.LANCHOR3+124
 	.word	.LANCHOR3+14
@@ -9337,74 +9146,74 @@ flash_lsb_page_tbl_build:
 flash_die_info_init:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1511
+	ldr	r3, .L1482
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	ldr	r3, [r3]
 	lsls	r3, r3, #19
-	bpl	.L1495
-	ldr	r1, .L1511+4
-	ldr	r0, .L1511+8
+	bpl	.L1466
+	ldr	r1, .L1482+4
+	ldr	r0, .L1482+8
 	bl	printf
-.L1495:
-	ldr	r4, .L1511+12
+.L1466:
+	ldr	r4, .L1482+12
 	movs	r6, #0
-	ldr	r5, .L1511+16
-	ldr	r7, .L1511+20
+	ldr	r5, .L1482+16
+	ldr	r7, .L1482+20
 	ldrh	r3, [r4, #26]
 	ldrb	r1, [r4, #12]	@ zero_extendqisi2
 	ldrh	r0, [r4, #10]
 	strh	r3, [r7]	@ movhi
 	strb	r6, [r5]
 	bl	__aeabi_idiv
-	ldr	r10, .L1511+48
+	ldr	r10, .L1482+48
 	movs	r2, #8
-	ldr	r3, .L1511+24
+	ldr	r3, .L1482+24
 	mov	r1, r6
 	mov	r8, r10
 	strh	r0, [r3]	@ movhi
-	ldr	r0, .L1511+28
+	ldr	r0, .L1482+28
 	bl	ftl_memset
 	movs	r2, #32
 	mov	r1, r6
-	ldr	r0, .L1511+32
+	ldr	r0, .L1482+32
 	bl	ftl_memset
-.L1497:
-	ldr	r3, .L1511+36
+.L1468:
+	ldr	r3, .L1482+36
 	movs	r2, #2
 	add	r1, r10, r6, lsl #3
-	ldr	r0, .L1511+40
+	ldr	r0, .L1482+40
 	strb	r2, [r6, r3]
 	ldrb	r2, [r4]	@ zero_extendqisi2
 	bl	flash_mem_cmp8
-	cbnz	r0, .L1496
+	cbnz	r0, .L1467
 	ldrb	r3, [r5]	@ zero_extendqisi2
-	ldr	r2, .L1511+32
+	ldr	r2, .L1482+32
 	str	r0, [r2, r3, lsl #2]
 	adds	r2, r3, #1
 	strb	r2, [r5]
 	uxtb	r0, r6
-	ldr	r2, .L1511+28
+	ldr	r2, .L1482+28
 	strb	r0, [r2, r3]
 	bl	zftl_flash_enter_slc_mode
-.L1496:
+.L1467:
 	adds	r6, r6, #1
 	cmp	r6, #4
-	bne	.L1497
+	bne	.L1468
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #2
-	beq	.L1498
-.L1502:
+	beq	.L1469
+.L1473:
 	ldrb	r2, [r4, #13]	@ zero_extendqisi2
 	ldrb	r3, [r5]	@ zero_extendqisi2
 	smulbb	r3, r3, r2
 	ldrh	r2, [r4, #14]
 	smulbb	r3, r3, r2
-	ldr	r2, .L1511+44
+	ldr	r2, .L1482+44
 	strh	r3, [r2]	@ movhi
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1498:
+.L1469:
 	ldrh	r6, [r7]
 	movs	r7, #0
 	ldrb	r3, [r4, #13]	@ zero_extendqisi2
@@ -9416,18 +9225,18 @@ flash_die_info_init:
 	muls	r6, r3, r6
 	lsls	r3, r6, #1
 	str	r3, [sp]
-	ldr	r3, .L1511+28
-.L1501:
+	ldr	r3, .L1482+28
+.L1472:
 	mov	r2, r10
 	add	r1, r8, r7, lsl #3
-	ldr	r0, .L1511+40
+	ldr	r0, .L1482+40
 	str	r3, [sp, #4]
 	bl	flash_mem_cmp8
 	ldr	r3, [sp, #4]
-	cbnz	r0, .L1499
+	cbnz	r0, .L1470
 	ldr	r1, [sp]
 	ldrb	r2, [r5]	@ zero_extendqisi2
-	ldr	r0, .L1511+32
+	ldr	r0, .L1482+32
 	cmp	fp, #0
 	it	eq
 	moveq	r1, r6
@@ -9435,27 +9244,27 @@ flash_die_info_init:
 	str	r1, [r0, r2, lsl #2]
 	adds	r1, r2, #1
 	strb	r1, [r5]
-.L1499:
+.L1470:
 	adds	r7, r7, #1
 	cmp	r7, #4
-	bne	.L1501
-	b	.L1502
-.L1512:
+	bne	.L1472
+	b	.L1473
+.L1483:
 	.align	2
-.L1511:
-	.word	.LANCHOR14
-	.word	.LANCHOR146
+.L1482:
+	.word	.LANCHOR19
+	.word	.LANCHOR143
 	.word	.LC1
-	.word	.LANCHOR33
-	.word	.LANCHOR18
+	.word	.LANCHOR32
+	.word	.LANCHOR23
 	.word	.LANCHOR2
-	.word	.LANCHOR147
-	.word	.LANCHOR30
-	.word	.LANCHOR148
-	.word	.LANCHOR34
-	.word	.LANCHOR33+1
-	.word	.LANCHOR149
-	.word	.LANCHOR48
+	.word	.LANCHOR144
+	.word	.LANCHOR29
+	.word	.LANCHOR145
+	.word	.LANCHOR33
+	.word	.LANCHOR32+1
+	.word	.LANCHOR146
+	.word	.LANCHOR47
 	.size	flash_die_info_init, .-flash_die_info_init
 	.section	.text.lpa_hash_init,"ax",%progbits
 	.align	1
@@ -9471,25 +9280,25 @@ lpa_hash_init:
 	push	{r3, lr}
 	mov	r2, #512
 	movs	r1, #255
-	ldr	r0, .L1514
+	ldr	r0, .L1485
 	bl	ftl_memset
-	ldr	r3, .L1514+4
+	ldr	r3, .L1485+4
 	movs	r1, #255
-	ldr	r2, .L1514+8
+	ldr	r2, .L1485+8
 	ldrh	r3, [r3]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	muls	r2, r3, r2
-	ldr	r3, .L1514+12
+	ldr	r3, .L1485+12
 	ldr	r0, [r3]
 	lsls	r2, r2, #2
 	pop	{r3, lr}
 	b	ftl_memset
-.L1515:
+.L1486:
 	.align	2
-.L1514:
+.L1485:
 	.word	.LANCHOR116
-	.word	.LANCHOR95
-	.word	.LANCHOR80
+	.word	.LANCHOR94
+	.word	.LANCHOR79
 	.word	.LANCHOR118
 	.size	lpa_hash_init, .-lpa_hash_init
 	.section	.text.lpa_rebuild_hash,"ax",%progbits
@@ -9504,45 +9313,45 @@ lpa_rebuild_hash:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
-	ldr	r3, .L1527
+	ldr	r3, .L1498
 	ldr	r3, [r3]
 	lsls	r3, r3, #19
-	bpl	.L1517
+	bpl	.L1488
 	movs	r3, #0
 	movs	r2, #239
-	ldr	r1, .L1527+4
-	ldr	r0, .L1527+8
+	ldr	r1, .L1498+4
+	ldr	r0, .L1498+8
 	bl	printf
-.L1517:
-	ldr	r6, .L1527+12
+.L1488:
+	ldr	r6, .L1498+12
 	mov	r2, #512
-	ldr	r4, .L1527+16
+	ldr	r4, .L1498+16
 	movs	r1, #255
-	ldr	r0, .L1527+20
+	ldr	r0, .L1498+20
 	bl	ftl_memset
 	ldrh	r3, [r4]
 	movs	r1, #255
 	ldrb	r2, [r6]	@ zero_extendqisi2
-	ldr	r5, .L1527+24
+	ldr	r5, .L1498+24
 	muls	r2, r3, r2
 	ldr	r0, [r5]
 	lsls	r2, r2, #2
 	bl	ftl_memset
-	ldr	r3, .L1527+28
+	ldr	r3, .L1498+28
 	movs	r2, #0
 	ldrb	r6, [r6]	@ zero_extendqisi2
 	ldr	ip, [r5]
 	ldr	r7, [r3]
-	ldr	r0, .L1527+20
-.L1518:
+	ldr	r0, .L1498+20
+.L1489:
 	ldrh	r3, [r4]
 	uxth	r5, r2
 	mov	r1, r5
 	muls	r3, r6, r3
 	cmp	r5, r3, lsl #1
-	blt	.L1520
+	blt	.L1491
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1520:
+.L1491:
 	ldr	r3, [r7, r1, lsl #2]
 	adds	r2, r2, #1
 	cmp	r3, #-1
@@ -9551,15 +9360,15 @@ lpa_rebuild_hash:
 	ldrhne	lr, [r0, r3, lsl #1]
 	strhne	r5, [r0, r3, lsl #1]	@ movhi
 	strhne	lr, [ip, r1, lsl #1]	@ movhi
-	b	.L1518
-.L1528:
+	b	.L1489
+.L1499:
 	.align	2
-.L1527:
-	.word	.LANCHOR14
-	.word	.LANCHOR150
-	.word	.LC84
-	.word	.LANCHOR80
-	.word	.LANCHOR95
+.L1498:
+	.word	.LANCHOR19
+	.word	.LANCHOR147
+	.word	.LC81
+	.word	.LANCHOR79
+	.word	.LANCHOR94
 	.word	.LANCHOR116
 	.word	.LANCHOR118
 	.word	.LANCHOR117
@@ -9580,9 +9389,9 @@ zftl_read_flash_info:
 	movs	r1, #0
 	mov	r4, r0
 	bl	ftl_memset
-	ldr	r1, .L1532
+	ldr	r1, .L1503
 	movs	r2, #0
-	ldr	r3, .L1532+4
+	ldr	r3, .L1503+4
 	strb	r2, [r4, #10]
 	ldrb	r0, [r1, #9]	@ zero_extendqisi2
 	ldrh	r3, [r3]
@@ -9591,10 +9400,10 @@ zftl_read_flash_info:
 	strb	r3, [r4, #4]
 	lsrs	r3, r3, #8
 	strb	r3, [r4, #5]
-	ldr	r3, .L1532+8
+	ldr	r3, .L1503+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	strb	r3, [r4, #7]
-	ldr	r3, .L1532+12
+	ldr	r3, .L1503+12
 	ldrb	r5, [r3]	@ zero_extendqisi2
 	strb	r5, [r4]
 	ldrb	r5, [r3, #1]	@ zero_extendqisi2
@@ -9608,33 +9417,33 @@ zftl_read_flash_info:
 	movs	r3, #32
 	strb	r3, [r4, #8]
 	ldrb	r3, [r1, #7]	@ zero_extendqisi2
-	ldr	r0, .L1532+16
+	ldr	r0, .L1503+16
 	strb	r3, [r4, #9]
-	ldr	r3, .L1532+20
+	ldr	r3, .L1503+20
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	mov	r3, r2
-.L1530:
+.L1501:
 	uxtb	r2, r3
 	cmp	r1, r2
-	bhi	.L1531
+	bhi	.L1502
 	pop	{r4, r5, r6, pc}
-.L1531:
+.L1502:
 	ldrb	r2, [r3, r0]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	ldrb	r6, [r4, #10]	@ zero_extendqisi2
 	lsl	r2, r5, r2
 	orrs	r2, r2, r6
 	strb	r2, [r4, #10]
-	b	.L1530
-.L1533:
+	b	.L1501
+.L1504:
 	.align	2
-.L1532:
-	.word	.LANCHOR33
+.L1503:
+	.word	.LANCHOR32
 	.word	.LANCHOR2
-	.word	.LANCHOR50
-	.word	.LANCHOR68
-	.word	.LANCHOR30
-	.word	.LANCHOR18
+	.word	.LANCHOR49
+	.word	.LANCHOR67
+	.word	.LANCHOR29
+	.word	.LANCHOR23
 	.size	zftl_read_flash_info, .-zftl_read_flash_info
 	.section	.text.gc_static_wearleveling,"ax",%progbits
 	.align	1
@@ -9647,44 +9456,44 @@ zftl_read_flash_info:
 gc_static_wearleveling:
 	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r0, .L1653
+	ldr	r0, .L1624
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #48
 	ldr	r3, [r0]
 	ldr	r3, [r3, #32]
 	cmp	r3, #10240
-	bls	.L1535
+	bls	.L1506
 	bl	ftl_tmp_into_update
-.L1535:
-	ldr	r3, .L1653+4
+.L1506:
+	ldr	r3, .L1624+4
 	ldr	r3, [r3]
 	ldr	r2, [r3, #568]
 	ldr	r1, [r3, #12]
 	add	r4, r2, #35840
 	adds	r4, r4, #160
 	cmp	r1, r4
-	bcs	.L1536
+	bcs	.L1507
 	ldr	r5, [r0]
 	ldr	r4, [r3, #572]
 	ldr	r5, [r5, #36]
 	add	r4, r4, #256
 	cmp	r5, r4
-	bcc	.L1590
-.L1536:
+	bcc	.L1561
+.L1507:
 	add	r2, r2, #860160
 	add	r2, r2, #3840
 	cmp	r1, r2
-	bhi	.L1538
+	bhi	.L1509
 	ldr	r4, [r0]
 	ldr	r2, [r3, #572]
 	ldr	r4, [r4, #36]
 	adds	r2, r2, #32
 	cmp	r4, r2
-	bls	.L1591
-.L1538:
+	bls	.L1562
+.L1509:
 	ldr	r2, [r0]
 	movw	r4, #65535
-	ldr	r10, .L1653+12
+	ldr	r10, .L1624+12
 	mov	fp, r4
 	movs	r5, #0
 	ldrh	r7, [r2, #134]
@@ -9698,12 +9507,12 @@ gc_static_wearleveling:
 	str	r5, [sp, #32]
 	str	r5, [sp, #20]
 	str	r5, [sp, #28]
-.L1540:
-	ldr	r3, .L1653+8
+.L1511:
+	ldr	r3, .L1624+8
 	ldrh	r3, [r3]
 	cmp	r3, r7
-	bhi	.L1551
-	ldr	r7, .L1653+4
+	bhi	.L1522
+	ldr	r7, .L1624+4
 	movs	r3, #0
 	movs	r1, #255
 	movs	r2, #128
@@ -9713,19 +9522,19 @@ gc_static_wearleveling:
 	bl	ftl_memset
 	ldr	r3, [r7]
 	ldrh	r7, [r3, #586]
-	ldr	r3, .L1653+12
+	ldr	r3, .L1624+12
 	ldr	r8, [r3]
-	ldr	r3, .L1653+16
+	ldr	r3, .L1624+16
 	ldr	r3, [r3]
 	add	r10, r8, r7, lsl #2
 	lsls	r1, r3, #21
-	bpl	.L1552
-	ldr	r1, .L1653+20
+	bpl	.L1523
+	ldr	r1, .L1624+20
 	ldr	r3, [r8, r7, lsl #2]
 	ldrh	r2, [r8, r7, lsl #2]
 	ldr	r1, [r1]
 	ubfx	r3, r3, #11, #8
-	ldr	r0, .L1653+24
+	ldr	r0, .L1624+24
 	ubfx	r2, r2, #0, #11
 	ldrh	r1, [r1, r7, lsl #1]
 	str	r1, [sp, #12]
@@ -9739,61 +9548,61 @@ gc_static_wearleveling:
 	str	r1, [sp]
 	mov	r1, r7
 	bl	printf
-.L1552:
+.L1523:
 	ldrb	r3, [r10, #2]	@ zero_extendqisi2
 	and	r1, r3, #224
 	cmp	r1, #32
-	bne	.L1553
-	ldr	r2, .L1653
+	bne	.L1524
+	ldr	r2, .L1624
 	ldr	r2, [r2]
 	ldrh	r2, [r2, #688]
 	cmp	r2, #2
 	ittt	hi
-	ldrhi	r2, .L1653+28
+	ldrhi	r2, .L1624+28
 	movhi	r0, #1
 	strhi	r0, [r2]
-.L1553:
+.L1524:
 	lsls	r2, r3, #28
-	bpl	.L1554
-	ldr	r2, .L1653
+	bpl	.L1525
+	ldr	r2, .L1624
 	ldr	r2, [r2]
 	ldrh	r0, [r2, #96]
-	ldr	r2, .L1653+32
+	ldr	r2, .L1624+32
 	ldrh	ip, [r2]
 	ldrh	r2, [r8, r7, lsl #2]
 	ubfx	r2, r2, #0, #11
 	add	r2, r2, ip, lsr #2
 	cmp	r0, r2
-	ble	.L1554
+	ble	.L1525
 	and	r3, r3, #192
-	ldr	r7, .L1653+4
+	ldr	r7, .L1624+4
 	cmp	r3, #64
-	bne	.L1555
+	bne	.L1526
 	ldr	r3, [r7]
 	movs	r2, #1
 	movs	r1, #0
 	ldrh	r0, [r3, #586]
 	bl	gc_add_sblk
-	ldr	r3, .L1653+36
+	ldr	r3, .L1624+36
 	movs	r2, #1
-	strh	r2, [r3, #2106]	@ movhi
-.L1554:
-	ldr	r3, .L1653+4
+	strh	r2, [r3, #2180]	@ movhi
+.L1525:
+	ldr	r3, .L1624+4
 	ldr	r3, [r3]
 	ldrh	r7, [r3, #584]
-	ldr	r3, .L1653+12
+	ldr	r3, .L1624+12
 	ldr	r8, [r3]
-	ldr	r3, .L1653+16
+	ldr	r3, .L1624+16
 	ldr	r3, [r3]
 	add	r10, r8, r7, lsl #2
 	lsls	r6, r3, #21
-	bpl	.L1556
-	ldr	r1, .L1653+20
+	bpl	.L1527
+	ldr	r1, .L1624+20
 	ldr	r3, [r8, r7, lsl #2]
 	ldrh	r2, [r8, r7, lsl #2]
 	ldr	r1, [r1]
 	ubfx	r3, r3, #11, #8
-	ldr	r0, .L1653+40
+	ldr	r0, .L1624+40
 	ubfx	r2, r2, #0, #11
 	ldrh	r1, [r1, r7, lsl #1]
 	str	r1, [sp, #12]
@@ -9807,39 +9616,39 @@ gc_static_wearleveling:
 	str	r1, [sp]
 	mov	r1, r7
 	bl	printf
-.L1556:
+.L1527:
 	ldrb	r3, [r10, #2]	@ zero_extendqisi2
 	lsls	r0, r3, #28
-	bpl	.L1557
-	ldr	r2, .L1653
+	bpl	.L1528
+	ldr	r2, .L1624
 	ldr	r2, [r2]
 	ldrh	r1, [r2, #98]
-	ldr	r2, .L1653+44
+	ldr	r2, .L1624+44
 	ldrh	r0, [r2]
 	ldr	r2, [r8, r7, lsl #2]
 	ubfx	r2, r2, #11, #8
 	add	r2, r2, r0, lsr #2
 	cmp	r1, r2
-	ble	.L1557
+	ble	.L1528
 	and	r2, r3, #192
 	cmp	r2, #64
-	bne	.L1558
-	ldr	r3, .L1653+4
+	bne	.L1529
+	ldr	r3, .L1624+4
 	movs	r2, #1
 	movs	r1, #0
 	ldr	r3, [r3]
 	ldrh	r0, [r3, #584]
 	bl	gc_add_sblk
-	ldr	r3, .L1653+36
+	ldr	r3, .L1624+36
 	movs	r2, #1
-	strh	r2, [r3, #2106]	@ movhi
-.L1557:
-	ldr	r3, .L1653+16
+	strh	r2, [r3, #2180]	@ movhi
+.L1528:
+	ldr	r3, .L1624+16
 	ldr	r3, [r3]
 	lsls	r1, r3, #21
-	bpl	.L1559
-	ldr	r3, .L1653+12
-	ldr	r1, .L1653+20
+	bpl	.L1530
+	ldr	r3, .L1624+12
+	ldr	r1, .L1624+20
 	ldr	r2, [r3]
 	ldr	r1, [r1]
 	ldr	r3, [r2, r5, lsl #2]
@@ -9855,17 +9664,17 @@ gc_static_wearleveling:
 	lsrs	r1, r1, #5
 	str	r1, [sp, #4]
 	ldrb	r1, [r0, #2]	@ zero_extendqisi2
-	ldr	r0, .L1653+48
+	ldr	r0, .L1624+48
 	ubfx	r1, r1, #3, #2
 	str	r1, [sp]
 	mov	r1, r5
 	bl	printf
-.L1559:
-	ldr	r3, .L1653+16
+.L1530:
+	ldr	r3, .L1624+16
 	ldr	r3, [r3]
 	lsls	r2, r3, #21
-	bpl	.L1560
-	ldr	r3, .L1653+12
+	bpl	.L1531
+	ldr	r3, .L1624+12
 	ldr	r1, [sp, #24]
 	ldr	r5, [sp, #24]
 	ldr	r2, [r3]
@@ -9873,7 +9682,7 @@ gc_static_wearleveling:
 	add	r0, r2, r3, lsl #2
 	ldr	r3, [r2, r3, lsl #2]
 	ldrh	r2, [r2, r1, lsl #2]
-	ldr	r1, .L1653+20
+	ldr	r1, .L1624+20
 	ubfx	r3, r3, #11, #8
 	ubfx	r2, r2, #0, #11
 	ldr	r1, [r1]
@@ -9885,13 +9694,13 @@ gc_static_wearleveling:
 	lsrs	r1, r1, #5
 	str	r1, [sp, #4]
 	ldrb	r1, [r0, #2]	@ zero_extendqisi2
-	ldr	r0, .L1653+52
+	ldr	r0, .L1624+52
 	ubfx	r1, r1, #3, #2
 	str	r1, [sp]
 	mov	r1, r5
 	bl	printf
-.L1560:
-	ldr	r6, .L1653
+.L1531:
+	ldr	r6, .L1624
 	ldrh	r3, [sp, #20]
 	ldr	r1, [sp, #32]
 	ldr	r5, [r6]
@@ -9908,100 +9717,100 @@ gc_static_wearleveling:
 	ldr	r0, [sp, #44]
 	bl	__aeabi_uidiv
 	strh	r0, [r5, #90]	@ movhi
-	ldr	r5, .L1653+16
+	ldr	r5, .L1624+16
 	ldr	r3, [r5]
 	lsls	r3, r3, #21
-	bpl	.L1561
+	bpl	.L1532
 	uxth	r0, r0
 	uxth	r3, r7
 	ldr	r2, [sp, #36]
 	str	r0, [sp]
 	ldr	r1, [sp, #32]
-	ldr	r0, .L1653+56
+	ldr	r0, .L1624+56
 	bl	printf
-.L1561:
+.L1532:
 	ldr	r3, [r5]
-	ldr	r5, .L1653+44
+	ldr	r5, .L1624+44
 	tst	r3, #1024
-	beq	.L1562
+	beq	.L1533
 	ldrh	r3, [r5]
 	mov	r2, fp
 	mov	r1, r4
-	ldr	r0, .L1653+60
+	ldr	r0, .L1624+60
 	str	r3, [sp, #8]
-	b	.L1654
-.L1655:
+	b	.L1625
+.L1626:
 	.align	2
-.L1653:
+.L1624:
 	.word	.LANCHOR110
-	.word	.LANCHOR10
-	.word	.LANCHOR6
-	.word	.LANCHOR7
-	.word	.LANCHOR14
+	.word	.LANCHOR12
+	.word	.LANCHOR8
 	.word	.LANCHOR9
+	.word	.LANCHOR19
+	.word	.LANCHOR11
+	.word	.LC83
+	.word	.LANCHOR148
+	.word	.LANCHOR149
+	.word	.LANCHOR70
+	.word	.LC84
+	.word	.LANCHOR150
+	.word	.LC85
 	.word	.LC86
-	.word	.LANCHOR151
-	.word	.LANCHOR152
-	.word	.LANCHOR71
 	.word	.LC87
-	.word	.LANCHOR153
 	.word	.LC88
-	.word	.LC89
-	.word	.LC90
-	.word	.LC91
-.L1654:
-	ldr	r3, .L1656
+.L1625:
+	ldr	r3, .L1627
 	ldrh	r3, [r3]
 	str	r3, [sp, #4]
 	ldr	r3, [sp, #28]
 	str	r3, [sp]
 	ldr	r3, [sp, #20]
 	bl	printf
-.L1562:
+.L1533:
 	ldr	r3, [sp, #28]
 	sub	r3, r3, fp
 	str	r3, [sp, #24]
 	ldr	r2, [sp, #24]
 	ldrh	r3, [r5]
 	cmp	r2, r3
-	bgt	.L1563
-	ldr	r2, .L1656
+	bgt	.L1534
+	ldr	r2, .L1627
 	ldr	r3, [sp, #20]
 	ldrh	r2, [r2]
 	subs	r3, r3, r4
 	cmp	r3, r2
-	ble	.L1592
-.L1563:
-	ldr	r3, .L1656+4
+	ble	.L1563
+.L1534:
+	ldr	r3, .L1627+4
 	mov	r8, #0
 	ldr	r3, [r3]
 	ldrh	r5, [r3, #580]
 	ldr	r3, [r6]
 	mov	r6, r8
 	ldrh	r10, [r3, #134]
-.L1565:
-	ldr	r3, .L1656+8
+.L1536:
+	ldr	r3, .L1627+8
 	ldrh	r3, [r3]
 	cmp	r10, r3
-	bcc	.L1575
-.L1574:
-	ldr	r3, .L1656+4
+	bcc	.L1546
+.L1545:
+	ldr	r3, .L1627+4
 	ldr	r3, [r3]
 	str	r5, [r3, #580]
-.L1564:
+.L1535:
 	cmp	fp, #0
-	beq	.L1577
-	ldr	r3, .L1656+12
+	beq	.L1548
+	ldr	r3, .L1627+12
 	ldr	r1, [r3]
-	ldr	r3, .L1656+8
+	ldr	r3, .L1627+8
 	ldrh	r2, [r1, #134]
 	ldrh	r7, [r3]
-	ldr	r3, .L1656+16
+	ldr	r3, .L1627+16
 	ldr	r3, [r3]
 	add	r3, r3, r2, lsl #2
-.L1578:
+.L1549:
 	cmp	r2, r7
-	bcc	.L1580
+	bcc	.L1551
 	ldrh	r3, [r1, #72]
 	add	r3, r3, fp
 	strh	r3, [r1, #72]	@ movhi
@@ -10010,19 +9819,19 @@ gc_static_wearleveling:
 	itt	cc
 	subcc	r3, r3, fp
 	strhcc	r3, [r1, #98]	@ movhi
-.L1577:
-	cbz	r4, .L1583
-	ldr	r3, .L1656+12
+.L1548:
+	cbz	r4, .L1554
+	ldr	r3, .L1627+12
 	ldr	r1, [r3]
-	ldr	r3, .L1656+8
+	ldr	r3, .L1627+8
 	ldrh	r2, [r1, #134]
 	ldrh	ip, [r3]
-	ldr	r3, .L1656+16
+	ldr	r3, .L1627+16
 	ldr	r3, [r3]
 	add	r3, r3, r2, lsl #2
-.L1584:
+.L1555:
 	cmp	r2, ip
-	bcc	.L1586
+	bcc	.L1557
 	ldrh	r3, [r1, #74]
 	add	r3, r3, r4
 	strh	r3, [r1, #74]	@ movhi
@@ -10031,46 +9840,46 @@ gc_static_wearleveling:
 	itt	cc
 	subcc	r4, r3, r4
 	strhcc	r4, [r1, #96]	@ movhi
-.L1583:
-	movs	r1, #5
-	movs	r0, #0
-	bl	zftl_get_gc_node
+.L1554:
+	movs	r1, #0
+	ldr	r0, .L1627+20
+	bl	_list_get_gc_head_node
 	movw	r2, #65535
 	cmp	r0, r2
-	beq	.L1539
-	ldr	r2, .L1656+20
+	beq	.L1510
+	ldr	r2, .L1627+24
 	ldr	r1, [r2]
-	ldr	r2, .L1656+24
+	ldr	r2, .L1627+28
 	ldrh	r3, [r1, r0, lsl #1]
 	ldrh	r2, [r2]
 	cmp	r3, r2, lsr #1
-	bhi	.L1539
+	bhi	.L1510
 	adds	r6, r6, #1
 	movs	r2, #1
 	movs	r1, #0
 	bl	gc_add_sblk
-.L1539:
+.L1510:
 	add	r0, r6, r8
-.L1534:
+.L1505:
 	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1551:
+.L1522:
 	ldr	r0, [r10]
 	lsls	r1, r7, #2
 	add	ip, r0, r1
 	ldrb	r3, [ip, #2]	@ zero_extendqisi2
 	and	r2, r3, #224
 	cmp	r2, #224
-	beq	.L1541
+	beq	.L1512
 	ubfx	lr, r3, #3, #2
 	tst	lr, #1
-	beq	.L1542
+	beq	.L1513
 	ldrh	r3, [r0, r1]
 	ldr	r2, [r0, r1]
 	ubfx	r3, r3, #0, #11
 	ubfx	r2, r2, #11, #8
-.L1543:
+.L1514:
 	ldr	r6, [sp, #32]
 	cmp	r4, r3
 	add	r8, r6, #1
@@ -10079,12 +9888,12 @@ gc_static_wearleveling:
 	ldr	r6, [sp, #40]
 	add	r6, r6, r3
 	str	r6, [sp, #40]
-	bls	.L1589
-	ldr	r4, .L1656+4
+	bls	.L1560
+	ldr	r4, .L1627+4
 	ldr	r4, [r4]
 	strh	r7, [r4, #586]	@ movhi
 	mov	r4, r3
-.L1589:
+.L1560:
 	ldr	r6, [sp, #20]
 	movw	r8, #65535
 	cmp	r6, r3
@@ -10092,26 +9901,26 @@ gc_static_wearleveling:
 	movcc	r5, r7
 	strcc	r3, [sp, #20]
 	cmp	r2, r8
-	bne	.L1545
-.L1547:
+	bne	.L1516
+.L1518:
 	cmp	r3, #9
-	bls	.L1550
-.L1541:
+	bls	.L1521
+.L1512:
 	adds	r7, r7, #1
 	uxth	r7, r7
-	b	.L1540
-.L1542:
+	b	.L1511
+.L1513:
 	tst	r3, #24
-	bne	.L1544
+	bne	.L1515
 	ldrh	r3, [r0, r1]
 	movw	r2, #65535
 	ubfx	r3, r3, #0, #11
-	b	.L1543
-.L1544:
+	b	.L1514
+.L1515:
 	ldr	r3, [r0, r1]
 	ubfx	r2, r3, #11, #8
 	movw	r3, #65535
-.L1545:
+.L1516:
 	ldr	r6, [sp, #36]
 	cmp	fp, r2
 	it	hi
@@ -10119,7 +9928,7 @@ gc_static_wearleveling:
 	add	r8, r6, #1
 	uxth	r6, r8
 	it	hi
-	ldrhi	r8, .L1656+4
+	ldrhi	r8, .L1627+4
 	str	r6, [sp, #36]
 	ldr	r6, [sp, #44]
 	it	hi
@@ -10134,17 +9943,17 @@ gc_static_wearleveling:
 	strcc	r7, [sp, #24]
 	strcc	r2, [sp, #28]
 	cmp	r2, #9
-	bhi	.L1547
-.L1550:
-	ldr	r3, .L1656+28
+	bhi	.L1518
+.L1521:
+	ldr	r3, .L1627+32
 	ldr	r3, [r3]
 	lsls	r6, r3, #23
-	bpl	.L1541
+	bpl	.L1512
 	ldr	r3, [r0, r1]
 	ldrh	r2, [r0, r1]
-	ldr	r1, .L1656+20
+	ldr	r1, .L1627+24
 	ubfx	r3, r3, #11, #8
-	ldr	r0, .L1656+32
+	ldr	r0, .L1627+36
 	ubfx	r2, r2, #0, #11
 	ldr	r1, [r1]
 	ldrh	r1, [r1, r7, lsl #1]
@@ -10157,114 +9966,115 @@ gc_static_wearleveling:
 	str	r1, [sp, #4]
 	mov	r1, r7
 	bl	printf
-	b	.L1541
-.L1555:
+	b	.L1512
+.L1526:
 	cmp	r1, #0
-	bne	.L1554
+	bne	.L1525
 	ldr	r3, [r7]
 	movw	r2, #65535
 	ldrh	r8, [r3, #590]
 	cmp	r8, r2
-	bne	.L1554
+	bne	.L1525
 	ldrh	r0, [r3, #586]
 	ldrh	r3, [r3, #588]
 	cmp	r3, r0
-	beq	.L1554
+	beq	.L1525
 	bl	zftl_remove_free_node
 	ldr	r3, [r7]
 	ldrh	r2, [r3, #586]
 	strh	r8, [r3, #586]	@ movhi
 	strh	r2, [r3, #590]	@ movhi
-	b	.L1554
-.L1558:
+	b	.L1525
+.L1529:
 	and	r3, r3, #248
 	cmp	r3, #16
-	bne	.L1557
-	ldr	r8, .L1656+4
+	bne	.L1528
+	ldr	r8, .L1627+4
 	movw	r2, #65535
 	ldr	r3, [r8]
 	ldrh	r7, [r3, #588]
 	cmp	r7, r2
-	bne	.L1557
+	bne	.L1528
 	ldrh	r0, [r3, #584]
 	ldrh	r3, [r3, #590]
 	cmp	r3, r0
-	beq	.L1557
+	beq	.L1528
 	bl	zftl_remove_free_node
 	ldr	r3, [r8]
 	ldrh	r2, [r3, #584]
 	strh	r7, [r3, #584]	@ movhi
 	strh	r2, [r3, #588]	@ movhi
-	b	.L1557
-.L1657:
+	b	.L1528
+.L1628:
 	.align	2
-.L1656:
-	.word	.LANCHOR152
-	.word	.LANCHOR10
-	.word	.LANCHOR6
+.L1627:
+	.word	.LANCHOR149
+	.word	.LANCHOR12
+	.word	.LANCHOR8
 	.word	.LANCHOR110
-	.word	.LANCHOR7
 	.word	.LANCHOR9
-	.word	.LANCHOR95
-	.word	.LANCHOR14
-	.word	.LC85
-.L1575:
+	.word	.LANCHOR92
+	.word	.LANCHOR11
+	.word	.LANCHOR94
+	.word	.LANCHOR19
+	.word	.LC82
+.L1546:
 	adds	r5, r5, #1
 	uxth	r5, r5
 	cmp	r3, r5
 	it	ls
 	movls	r5, #0
-	ldr	r3, .L1658
+	ldr	r3, .L1629
 	lsls	r7, r5, #2
 	ldr	r3, [r3]
 	adds	r2, r3, r7
 	ldrb	r2, [r2, #2]	@ zero_extendqisi2
 	tst	r2, #192
-	beq	.L1567
+	beq	.L1538
 	and	r0, r2, #224
 	cmp	r0, #224
-	beq	.L1567
+	beq	.L1538
 	ubfx	r2, r2, #3, #2
 	ands	r1, r2, #1
-	beq	.L1568
+	beq	.L1539
 	cmp	r0, #160
-.L1651:
-	bne	.L1570
-	ldr	r2, .L1658+4
+.L1622:
+	bne	.L1541
+	ldr	r2, .L1629+4
 	ldr	r0, [sp, #24]
 	ldrh	r2, [r2]
 	cmp	r0, r2
-	ble	.L1571
+	ble	.L1542
 	ldr	r2, [r3, r7]
 	ubfx	r2, r2, #11, #8
 	cmp	r2, fp
-	bls	.L1572
-	cbz	r1, .L1571
+	bls	.L1543
+	cbz	r1, .L1542
 	ldrh	r2, [r3, r7]
 	ubfx	r2, r2, #0, #11
 	cmp	r2, r4
-	bgt	.L1571
-.L1572:
+	bgt	.L1542
+.L1543:
 	movs	r2, #1
 	movs	r1, #0
 	mov	r0, r5
 	str	r3, [sp, #28]
 	bl	gc_add_sblk
-	ldr	r0, .L1658+8
+	ldr	r0, .L1629+8
 	movs	r2, #1
 	add	r6, r6, r2
 	ldr	r3, [sp, #28]
-	strh	r2, [r0, #2106]	@ movhi
-	ldr	r2, .L1658+12
+	strh	r2, [r0, #2180]	@ movhi
+	ldr	r2, .L1629+12
 	ldr	r2, [r2]
 	tst	r2, #1024
-	beq	.L1571
-	ldr	r2, .L1658+16
+	beq	.L1542
+	ldr	r2, .L1629+16
 	ldr	r1, [r3, r7]
 	ldr	r2, [r2]
 	ubfx	r1, r1, #11, #8
 	ldrh	ip, [r2, r5, lsl #1]
-	ldr	r2, .L1658
+	ldr	r2, .L1629
 	ldr	r2, [r2]
 	add	r2, r2, r7
 	ldrb	r2, [r2, #2]	@ zero_extendqisi2
@@ -10275,63 +10085,63 @@ gc_static_wearleveling:
 	str	r1, [sp, #4]
 	mov	r1, r5
 	ldrh	r3, [r0, #52]
-	ldr	r0, .L1658+20
+	ldr	r0, .L1629+20
 	str	r3, [sp]
 	mov	r3, ip
-.L1652:
+.L1623:
 	bl	printf
-.L1571:
+.L1542:
 	cmp	r6, #4
-	bhi	.L1574
+	bhi	.L1545
 	cmp	r8, #4
-	bhi	.L1574
-.L1567:
+	bhi	.L1545
+.L1538:
 	add	r10, r10, #1
 	uxth	r10, r10
-	b	.L1565
-.L1568:
+	b	.L1536
+.L1539:
 	cmp	r2, #2
-	b	.L1651
-.L1570:
-	ldr	r0, .L1658+24
+	b	.L1622
+.L1541:
+	ldr	r0, .L1629+24
 	ldr	r2, [sp, #20]
 	ldrh	r0, [r0]
 	subs	r2, r2, r4
 	cmp	r2, r0
-	ble	.L1571
+	ble	.L1542
 	ldrh	r2, [r3, r7]
 	add	r0, r4, #8
 	ubfx	r2, r2, #0, #11
 	cmp	r2, r0
-	ble	.L1573
+	ble	.L1544
 	cmp	r1, #0
-	beq	.L1571
+	beq	.L1542
 	ldr	r2, [r3, r7]
 	add	r1, fp, #4
 	ubfx	r2, r2, #11, #8
 	cmp	r2, r1
-	bgt	.L1571
-.L1573:
+	bgt	.L1542
+.L1544:
 	movs	r2, #1
 	movs	r1, #0
 	mov	r0, r5
 	str	r3, [sp, #28]
 	bl	gc_add_sblk
-	ldr	r0, .L1658+8
+	ldr	r0, .L1629+8
 	movs	r2, #1
 	add	r8, r8, r2
 	ldr	r3, [sp, #28]
-	strh	r2, [r0, #2106]	@ movhi
-	ldr	r2, .L1658+12
+	strh	r2, [r0, #2180]	@ movhi
+	ldr	r2, .L1629+12
 	ldr	r2, [r2]
 	tst	r2, #1024
-	beq	.L1571
-	ldr	r2, .L1658+16
+	beq	.L1542
+	ldr	r2, .L1629+16
 	ldr	r1, [r3, r7]
 	ldr	r2, [r2]
 	ubfx	r1, r1, #11, #8
 	ldrh	ip, [r2, r5, lsl #1]
-	ldr	r2, .L1658
+	ldr	r2, .L1629
 	ldr	r2, [r2]
 	add	r2, r2, r7
 	ldrb	r2, [r2, #2]	@ zero_extendqisi2
@@ -10342,35 +10152,35 @@ gc_static_wearleveling:
 	str	r1, [sp, #4]
 	mov	r1, r5
 	ldrh	r3, [r0, #52]
-	ldr	r0, .L1658+28
+	ldr	r0, .L1629+28
 	str	r3, [sp]
 	mov	r3, ip
-	b	.L1652
-.L1592:
+	b	.L1623
+.L1563:
 	mov	r8, #0
 	mov	r6, r8
-	b	.L1564
-.L1580:
+	b	.L1535
+.L1551:
 	ldr	r0, [r3]
 	ubfx	r5, r0, #11, #8
 	cmp	fp, r5
-	bhi	.L1579
+	bhi	.L1550
 	ldrb	ip, [r3, #2]	@ zero_extendqisi2
 	tst	ip, #24
 	ittt	ne
 	subne	r5, r5, fp
 	bfine	r0, r5, #11, #8
 	strne	r0, [r3]
-.L1579:
+.L1550:
 	adds	r2, r2, #1
 	adds	r3, r3, #4
 	uxth	r2, r2
-	b	.L1578
-.L1586:
+	b	.L1549
+.L1557:
 	ldrh	r0, [r3]
 	ubfx	r5, r0, #0, #11
 	cmp	r5, r4
-	blt	.L1585
+	blt	.L1556
 	ldrb	r7, [r3, #2]	@ zero_extendqisi2
 	and	r7, r7, #24
 	cmp	r7, #16
@@ -10378,29 +10188,29 @@ gc_static_wearleveling:
 	subne	r5, r5, r4
 	bfine	r0, r5, #0, #11
 	strhne	r0, [r3]	@ movhi
-.L1585:
+.L1556:
 	adds	r2, r2, #1
 	adds	r3, r3, #4
 	uxth	r2, r2
-	b	.L1584
-.L1591:
+	b	.L1555
+.L1562:
 	mov	r8, #0
 	mov	r6, r8
-	b	.L1539
-.L1590:
+	b	.L1510
+.L1561:
 	movs	r0, #0
-	b	.L1534
-.L1659:
+	b	.L1505
+.L1630:
 	.align	2
-.L1658:
-	.word	.LANCHOR7
-	.word	.LANCHOR153
-	.word	.LANCHOR71
-	.word	.LANCHOR14
+.L1629:
 	.word	.LANCHOR9
-	.word	.LC92
-	.word	.LANCHOR152
-	.word	.LC93
+	.word	.LANCHOR150
+	.word	.LANCHOR70
+	.word	.LANCHOR19
+	.word	.LANCHOR11
+	.word	.LC89
+	.word	.LANCHOR149
+	.word	.LC90
 	.size	gc_static_wearleveling, .-gc_static_wearleveling
 	.section	.text.zftl_sblk_list_init,"ax",%progbits
 	.align	1
@@ -10415,69 +10225,69 @@ zftl_sblk_list_init:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r2, #6
-	ldr	r8, .L1692+84
+	ldr	r8, .L1663+84
 	sub	sp, sp, #24
 	movs	r1, #0
 	movs	r4, #0
-	ldr	fp, .L1692+88
+	ldr	fp, .L1663+88
 	ldrh	r3, [r8]
-	ldr	r6, .L1692
+	ldr	r6, .L1663
 	ldr	r0, [fp]
-	ldr	r10, .L1692+80
+	ldr	r10, .L1663+80
 	muls	r2, r3, r2
-	ldr	r7, .L1692+4
+	ldr	r7, .L1663+4
 	bl	ftl_memset
-	ldr	r3, .L1692+8
+	ldr	r3, .L1663+8
 	movs	r2, #32
-	ldr	r1, .L1692+12
+	ldr	r1, .L1663+12
 	mov	r0, #32768
 	strh	r4, [r10]	@ movhi
 	str	r4, [r3]
-	ldr	r3, .L1692+16
+	ldr	r3, .L1663+16
 	ldrh	r1, [r1]
 	strh	r4, [r7]	@ movhi
 	str	r4, [r3]
-	ldr	r3, .L1692+20
+	ldr	r3, .L1663+20
 	str	r4, [r3]
-	ldr	r3, .L1692+24
+	ldr	r3, .L1663+24
 	str	r4, [r3]
-	ldr	r3, .L1692+28
+	ldr	r3, .L1663+28
 	str	r4, [r3]
-	ldr	r3, .L1692+32
+	ldr	r3, .L1663+32
 	str	r4, [r3]
-	ldr	r3, .L1692+36
+	ldr	r3, .L1663+36
 	strh	r2, [r3]	@ movhi
-	ldr	r2, .L1692+40
-	ldr	r3, .L1692+44
+	ldr	r2, .L1663+40
+	ldr	r3, .L1663+44
 	strh	r4, [r2]	@ movhi
-	ldr	r2, .L1692+48
+	ldr	r2, .L1663+48
 	strh	r4, [r3]	@ movhi
 	str	r3, [sp, #4]
 	strh	r4, [r2]	@ movhi
-	ldr	r2, .L1692+52
+	ldr	r2, .L1663+52
 	strh	r4, [r2]	@ movhi
 	ldrb	r2, [r6]	@ zero_extendqisi2
 	muls	r1, r2, r1
 	bl	__aeabi_idiv
-	ldr	r2, .L1692+56
+	ldr	r2, .L1663+56
 	sxth	r3, r0
 	str	fp, [sp, #12]
 	mov	fp, r10
 	str	r3, [sp]
 	ldr	r1, [r2]
 	ldr	r3, [sp, #4]
-	ldr	r10, .L1692+92
+	ldr	r10, .L1663+92
 	ldrsh	r5, [r1, #134]
 	str	r8, [sp, #8]
 	mov	r8, r3
 	strh	r4, [r1, #146]	@ movhi
 	str	r2, [sp, #16]
 	str	r6, [sp, #20]
-.L1661:
+.L1632:
 	ldr	r3, [sp, #8]
 	ldrh	r3, [r3]
 	cmp	r5, r3
-	blt	.L1678
+	blt	.L1649
 	ldr	r3, [sp, #16]
 	ldrh	r2, [r8]
 	ldr	r3, [r3]
@@ -10486,43 +10296,43 @@ zftl_sblk_list_init:
 	strh	r2, [r3, #118]	@ movhi
 	ldrh	r2, [fp]
 	strh	r2, [r3, #116]	@ movhi
-	ldr	r2, .L1692+40
+	ldr	r2, .L1663+40
 	ldrh	r2, [r2]
 	strh	r2, [r3, #122]	@ movhi
-	ldr	r2, .L1692+48
+	ldr	r2, .L1663+48
 	ldrh	r2, [r2]
 	strh	r2, [r3, #120]	@ movhi
-	ldr	r2, .L1692+52
+	ldr	r2, .L1663+52
 	ldrh	r2, [r2]
 	strh	r2, [r3, #124]	@ movhi
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1678:
+.L1649:
 	ldr	r6, [r10]
 	add	r6, r6, r5, lsl #2
 	ldrb	r0, [r6, #3]	@ zero_extendqisi2
 	cmp	r0, #0
-	beq	.L1679
+	beq	.L1650
 	ldr	r3, [sp, #20]
 	ldrb	lr, [r3]	@ zero_extendqisi2
-	ldr	r3, .L1692+56
+	ldr	r3, .L1663+56
 	ldr	ip, [r3]
-	ldr	r3, .L1692+12
+	ldr	r3, .L1663+12
 	ldrh	r3, [r3]
 	str	r3, [sp, #4]
 	movs	r3, #0
 	mov	r1, r3
-.L1663:
+.L1634:
 	cmp	r3, lr
-	blt	.L1666
+	blt	.L1637
 	cmp	r1, #0
-	beq	.L1667
+	beq	.L1638
 	mov	r0, #32768
 	bl	__aeabi_idiv
 	adds	r1, r0, #1
 	sxth	r1, r1
-.L1662:
+.L1633:
 	ldr	r3, [sp, #12]
 	lsls	r0, r5, #1
 	adds	r2, r0, r5
@@ -10535,32 +10345,32 @@ zftl_sblk_list_init:
 	ldrb	r3, [r6, #2]	@ zero_extendqisi2
 	and	r3, r3, #224
 	cmp	r3, #32
-	beq	.L1668
+	beq	.L1639
 	cmp	r3, #224
-	beq	.L1668
-	ldr	r2, .L1692+60
+	beq	.L1639
+	ldr	r2, .L1663+60
 	ldr	r2, [r2]
 	ldrh	r1, [r2, #16]
 	cmp	r5, r1
-	beq	.L1668
+	beq	.L1639
 	ldrh	r1, [r2, #48]
 	cmp	r5, r1
-	beq	.L1668
+	beq	.L1639
 	ldrh	r2, [r2, #80]
 	cmp	r5, r2
-	beq	.L1668
+	beq	.L1639
 	cmp	r3, #64
-	bne	.L1669
-	ldr	r2, .L1692+40
+	bne	.L1640
+	ldr	r2, .L1663+40
 	uxth	r1, r5
-	ldr	r0, .L1692+28
-.L1690:
+	ldr	r0, .L1663+28
+.L1661:
 	bl	_insert_data_list
-.L1668:
+.L1639:
 	adds	r5, r5, #1
 	sxth	r5, r5
-	b	.L1661
-.L1666:
+	b	.L1632
+.L1637:
 	asr	r2, r0, r3
 	adds	r3, r3, #1
 	lsls	r2, r2, #31
@@ -10572,44 +10382,44 @@ zftl_sblk_list_init:
 	ite	mi
 	strhmi	r2, [ip, #146]	@ movhi
 	sxthpl	r1, r1
-	b	.L1663
-.L1667:
+	b	.L1634
+.L1638:
 	ldrb	r3, [r6, #2]	@ zero_extendqisi2
 	movw	r2, #65535
 	orr	r3, r3, #224
 	strb	r3, [r6, #2]
-	ldr	r3, .L1692+64
+	ldr	r3, .L1663+64
 	ldr	r3, [r3]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
-	b	.L1662
-.L1679:
+	b	.L1633
+.L1650:
 	ldr	r1, [sp]
-	b	.L1662
-.L1669:
+	b	.L1633
+.L1640:
 	cmp	r3, #96
-	bne	.L1670
-	ldr	r2, .L1692+52
+	bne	.L1641
+	ldr	r2, .L1663+52
 	uxth	r1, r5
-	ldr	r0, .L1692+24
-	b	.L1690
-.L1670:
+	ldr	r0, .L1663+24
+	b	.L1661
+.L1641:
 	cmp	r3, #160
-	bne	.L1671
-	ldr	r2, .L1692+48
+	bne	.L1642
+	ldr	r2, .L1663+48
 	uxth	r1, r5
-	ldr	r0, .L1692+32
-	b	.L1690
-.L1671:
+	ldr	r0, .L1663+32
+	b	.L1661
+.L1642:
 	cmp	r3, #0
-	bne	.L1668
-	ldr	r3, .L1692+64
+	bne	.L1639
+	ldr	r3, .L1663+64
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r0]
-	cbz	r2, .L1672
+	cbz	r2, .L1643
 	cmp	r4, #2
-	bgt	.L1673
+	bgt	.L1644
 	mov	r1, r5
-	ldr	r0, .L1692+68
+	ldr	r0, .L1663+68
 	bl	printf
 	ldrb	r3, [r6, #2]	@ zero_extendqisi2
 	adds	r4, r4, #1
@@ -10624,141 +10434,58 @@ zftl_sblk_list_init:
 	movs	r2, #0
 	strb	r3, [r6, #2]
 	bl	gc_add_sblk
-	b	.L1668
-.L1673:
-	movw	r2, #651
-	ldr	r1, .L1692+72
-	ldr	r0, .L1692+76
+	b	.L1639
+.L1644:
+	mov	r2, #656
+	ldr	r1, .L1663+72
+	ldr	r0, .L1663+76
 	bl	printf
-.L1672:
+.L1643:
 	ldrb	r3, [r6, #2]	@ zero_extendqisi2
 	uxth	r1, r5
 	ands	r3, r3, #24
-	bne	.L1676
-	ldr	r2, .L1692+44
-	ldr	r0, .L1692+8
-.L1691:
+	bne	.L1647
+	ldr	r2, .L1663+44
+	ldr	r0, .L1663+8
+.L1662:
 	bl	_insert_free_list
-	b	.L1668
-.L1676:
+	b	.L1639
+.L1647:
 	cmp	r3, #16
 	ittee	eq
-	ldreq	r2, .L1692+4
-	ldreq	r0, .L1692+16
-	ldrne	r2, .L1692+80
-	ldrne	r0, .L1692+20
-	b	.L1691
-.L1693:
-	.align	2
-.L1692:
-	.word	.LANCHOR80
+	ldreq	r2, .L1663+4
+	ldreq	r0, .L1663+16
+	ldrne	r2, .L1663+80
+	ldrne	r0, .L1663+20
+	b	.L1662
+.L1664:
+	.align	2
+.L1663:
+	.word	.LANCHOR79
 	.word	.LANCHOR105
 	.word	.LANCHOR104
-	.word	.LANCHOR86
+	.word	.LANCHOR85
 	.word	.LANCHOR106
 	.word	.LANCHOR108
-	.word	.LANCHOR89
-	.word	.LANCHOR12
-	.word	.LANCHOR88
+	.word	.LANCHOR90
+	.word	.LANCHOR95
+	.word	.LANCHOR92
 	.word	.LANCHOR109
 	.word	.LANCHOR97
 	.word	.LANCHOR103
-	.word	.LANCHOR93
+	.word	.LANCHOR91
 	.word	.LANCHOR99
 	.word	.LANCHOR110
-	.word	.LANCHOR10
-	.word	.LANCHOR9
-	.word	.LC94
-	.word	.LANCHOR154
+	.word	.LANCHOR12
+	.word	.LANCHOR11
+	.word	.LC91
+	.word	.LANCHOR151
 	.word	.LC0
 	.word	.LANCHOR107
-	.word	.LANCHOR6
+	.word	.LANCHOR8
 	.word	.LANCHOR4
-	.word	.LANCHOR7
-	.size	zftl_sblk_list_init, .-zftl_sblk_list_init
-	.section	.text.ftl_open_sblk_init,"ax",%progbits
-	.align	1
-	.global	ftl_open_sblk_init
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_open_sblk_init, %function
-ftl_open_sblk_init:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	mov	r4, r0
-	ldr	r8, .L1701+12
-	mov	r6, r1
-	movs	r7, #0
-.L1695:
-	movw	r10, #65535
-.L1696:
-	mov	r0, r6
-	bl	ftl_alloc_sblk
-	cmp	r0, r10
-	mov	r5, r0
-	beq	.L1696
-	movs	r1, #0
-	ldr	r10, .L1701+16
-	bl	ftl_erase_sblk
-	add	r1, r4, #16
-	mov	r0, r5
-	bl	ftl_get_blk_list_in_sblk
-	ldr	r1, .L1701
-	cmp	r6, #2
-	ldrh	r2, [r8]
-	uxtb	r0, r0
-	strh	r5, [r4]	@ movhi
-	ite	eq
-	moveq	r3, #0
-	ldrbne	r3, [r1]	@ zero_extendqisi2
-	ldrb	r1, [r1]	@ zero_extendqisi2
-	strb	r0, [r4, #9]
-	smulbb	r0, r0, r2
-	strh	r7, [r4, #2]	@ movhi
-	it	ne
-	smulbbne	r3, r3, r2
-	strb	r7, [r4, #5]
-	mul	r2, r2, r1
-	ldr	r1, .L1701+4
-	strh	r0, [r4, #6]	@ movhi
-	it	ne
-	uxthne	r3, r3
-	strh	r7, [r4, #10]	@ movhi
-	ldr	r0, [r1]
-	movs	r1, #255
-	strh	r3, [r4, #12]	@ movhi
-	lsls	r2, r2, #2
-	strb	r6, [r4, #4]
-	add	r0, r0, r3, lsl #2
-	bl	ftl_memset
-	ldr	r3, [r10]
-	ldrh	r2, [r4, #6]
-	strh	r2, [r3, r5, lsl #1]	@ movhi
-	ldrb	r3, [r4, #9]	@ zero_extendqisi2
-	cbnz	r3, .L1694
-	mov	r1, r5
-	ldr	r0, .L1701+8
-	bl	printf
-	ldr	r3, [r10]
-	movw	r2, #65535
-	strh	r2, [r3, r5, lsl #1]	@ movhi
-	movs	r3, #7
-	strb	r3, [r4, #4]
-	b	.L1695
-.L1694:
-	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L1702:
-	.align	2
-.L1701:
-	.word	.LANCHOR80
-	.word	.LANCHOR117
-	.word	.LC82
-	.word	.LANCHOR95
 	.word	.LANCHOR9
-	.size	ftl_open_sblk_init, .-ftl_open_sblk_init
+	.size	zftl_sblk_list_init, .-zftl_sblk_list_init
 	.section	.text.pm_free_sblk,"ax",%progbits
 	.align	1
 	.global	pm_free_sblk
@@ -10772,16 +10499,16 @@ pm_free_sblk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #280
-	ldr	r5, .L1728
+	ldr	r5, .L1690
 	ldrh	r2, [r5]
 	cmp	r2, #128
-	bls	.L1704
+	bls	.L1666
 	movs	r2, #94
-	ldr	r1, .L1728+4
-	ldr	r0, .L1728+8
+	ldr	r1, .L1690+4
+	ldr	r0, .L1690+8
 	bl	printf
-.L1704:
-	ldr	r4, .L1728+12
+.L1666:
+	ldr	r4, .L1690+12
 	movs	r2, #0
 	ldrh	r5, [r5]
 	mov	r3, r2
@@ -10789,21 +10516,21 @@ pm_free_sblk:
 	ldr	r1, [r4]
 	ldrh	r0, [r1, #688]
 	add	r1, r1, #416
-.L1707:
+.L1669:
 	ldrh	r7, [r1], #2
 	cmp	r7, r6
 	itt	ne
 	addne	r2, r2, #1
 	uxthne	r2, r2
 	cmp	r2, r0
-	bcs	.L1706
+	bcs	.L1668
 	cmp	r2, r5
-	bcs	.L1706
+	bcs	.L1668
 	adds	r3, r3, #1
 	uxth	r3, r3
 	cmp	r3, #128
-	bne	.L1707
-.L1706:
+	bne	.L1669
+.L1668:
 	adds	r3, r3, #1
 	mov	r2, #256
 	uxth	r3, r3
@@ -10817,26 +10544,26 @@ pm_free_sblk:
 	str	r3, [sp, #8]
 	add	fp, sp, #24
 	bl	ftl_memset
-	ldr	r2, .L1728+16
+	ldr	r2, .L1690+16
 	ldr	r7, [r4]
 	ldrh	r8, [r2]
-	ldr	r2, .L1728+20
+	ldr	r2, .L1690+20
 	add	r10, r7, #704
 	ldrh	r3, [r7, #698]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	rsb	r2, r2, #24
 	sub	r2, r2, r8
 	lsls	r5, r5, r2
-	ldr	r2, .L1728+24
+	ldr	r2, .L1690+24
 	subs	r5, r5, #1
 	ldrb	r2, [r2]	@ zero_extendqisi2
-.L1709:
+.L1671:
 	uxth	r1, r6
 	cmp	r3, r1
-	bhi	.L1712
-	ldr	r3, .L1728+28
+	bhi	.L1674
+	ldr	r3, .L1690+28
 	movs	r5, #0
-	ldr	r2, .L1728+32
+	ldr	r2, .L1690+32
 	movw	r10, #65535
 	mov	r8, r5
 	ldrb	r6, [r3]	@ zero_extendqisi2
@@ -10844,7 +10571,7 @@ pm_free_sblk:
 	str	r3, [sp, #12]
 	smulbb	r6, r6, r2
 	uxth	r6, r6
-.L1718:
+.L1680:
 	ldr	r2, [r4]
 	add	r7, r5, #208
 	uxth	fp, r5
@@ -10852,69 +10579,69 @@ pm_free_sblk:
 	ldrh	r0, [r2, #692]
 	str	r2, [sp, #16]
 	str	r3, [sp, #20]
-	ldr	r3, .L1728+24
+	ldr	r3, .L1690+24
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	bl	__aeabi_idiv
 	ldr	r3, [sp, #20]
 	ldr	r2, [sp, #16]
 	cmp	r0, r3
-	bne	.L1713
+	bne	.L1675
 	ldr	r1, [sp, #12]
-	ldr	r0, .L1728+32
+	ldr	r0, .L1690+32
 	ldrb	r1, [r1]	@ zero_extendqisi2
 	ldrh	r0, [r0]
 	smulbb	r1, r1, r0
 	add	r0, sp, #24
 	strh	r1, [r0, r5, lsl #1]	@ movhi
-.L1713:
+.L1675:
 	add	r1, sp, #24
 	ldrh	r1, [r1, r5, lsl #1]
 	cmp	r1, r6
-	bcs	.L1714
+	bcs	.L1676
 	cmp	r1, #0
 	itt	ne
 	movne	r8, fp
 	movne	r6, r1
-.L1714:
+.L1676:
 	ldrh	r0, [r2, #74]
 	cmp	r0, #2
-	bls	.L1715
+	bls	.L1677
 	movw	r0, #65535
 	cmp	r3, r0
-	beq	.L1715
-	ldr	r0, .L1728+36
+	beq	.L1677
+	ldr	r0, .L1690+36
 	ldrh	r2, [r2, #92]
 	ldr	r0, [r0]
 	adds	r2, r2, #4
 	ldrh	r0, [r0, r3, lsl #2]
 	ubfx	r0, r0, #0, #11
 	cmp	r0, r2
-	bgt	.L1715
+	bgt	.L1677
 	mov	r10, fp
 	str	r0, [sp]
 	mov	r2, r1
-	ldr	r0, .L1728+40
+	ldr	r0, .L1690+40
 	mov	r1, r5
 	bl	printf
-.L1715:
+.L1677:
 	add	r3, sp, #24
 	ldrh	r2, [r3, r5, lsl #1]
-	cbnz	r2, .L1716
+	cbnz	r2, .L1678
 	ldr	r1, [r4]
 	movw	r0, #65535
 	ldrh	r3, [r1, r7, lsl #1]
 	cmp	r3, r0
-	beq	.L1716
-	ldr	r0, .L1728+44
+	beq	.L1678
+	ldr	r0, .L1690+44
 	ldr	r0, [r0]
 	lsls	r0, r0, #19
-	bpl	.L1717
+	bpl	.L1679
 	ldrh	r1, [r1, #688]
-	ldr	r0, .L1728+48
+	ldr	r0, .L1690+48
 	str	r1, [sp]
 	mov	r1, r5
 	bl	printf
-.L1717:
+.L1679:
 	ldr	r3, [r4]
 	ldrh	r0, [r3, r7, lsl #1]
 	bl	ftl_free_sblk
@@ -10924,12 +10651,12 @@ pm_free_sblk:
 	ldrh	r2, [r3, #688]
 	subs	r2, r2, #1
 	strh	r2, [r3, #688]	@ movhi
-.L1716:
+.L1678:
 	adds	r5, r5, #1
 	ldr	r2, [sp, #8]
 	uxth	r3, r5
 	cmp	r3, r2
-	bcc	.L1718
+	bcc	.L1680
 	movw	r0, #65535
 	cmp	r10, r0
 	ite	ne
@@ -10938,7 +10665,7 @@ pm_free_sblk:
 	add	sp, sp, #280
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1712:
+.L1674:
 	ldr	r0, [r10], #4
 	mov	r1, r2
 	str	r3, [sp, #20]
@@ -10952,7 +10679,7 @@ pm_free_sblk:
 	str	r3, [sp, #12]
 	movs	r1, #0
 	ldr	r3, [sp, #20]
-.L1711:
+.L1673:
 	ldrh	ip, [lr], #2
 	ldr	r0, [sp, #12]
 	cmp	r0, ip
@@ -10964,25 +10691,25 @@ pm_free_sblk:
 	adds	r1, r1, #1
 	uxth	ip, r1
 	cmp	r0, ip
-	bhi	.L1711
+	bhi	.L1673
 	adds	r6, r6, #1
-	b	.L1709
-.L1729:
+	b	.L1671
+.L1691:
 	.align	2
-.L1728:
-	.word	.LANCHOR155
-	.word	.LANCHOR156
+.L1690:
+	.word	.LANCHOR152
+	.word	.LANCHOR153
 	.word	.LC0
 	.word	.LANCHOR110
+	.word	.LANCHOR74
+	.word	.LANCHOR31
 	.word	.LANCHOR75
-	.word	.LANCHOR32
-	.word	.LANCHOR76
-	.word	.LANCHOR80
-	.word	.LANCHOR95
-	.word	.LANCHOR7
-	.word	.LC95
-	.word	.LANCHOR14
-	.word	.LC96
+	.word	.LANCHOR79
+	.word	.LANCHOR94
+	.word	.LANCHOR9
+	.word	.LC92
+	.word	.LANCHOR19
+	.word	.LC93
 	.size	pm_free_sblk, .-pm_free_sblk
 	.section	.text.ftl_memcpy,"ax",%progbits
 	.align	1
@@ -11009,25 +10736,25 @@ ftl_memcpy:
 flash_info_data_init:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1736
+	ldr	r3, .L1698
 	push	{r4, lr}
 	ldr	r3, [r3]
 	lsls	r3, r3, #19
-	bpl	.L1732
-	ldr	r2, .L1736+4
-	movs	r1, #119
-	ldr	r0, .L1736+8
+	bpl	.L1694
+	ldr	r2, .L1698+4
+	movs	r1, #120
+	ldr	r0, .L1698+8
 	bl	printf
-.L1732:
-	ldr	r4, .L1736+12
+.L1694:
+	ldr	r4, .L1698+12
 	mov	r2, #2048
 	movs	r1, #0
 	ldr	r0, [r4]
 	bl	ftl_memset
 	ldr	r0, [r4]
 	movs	r2, #32
-	ldr	r3, .L1736+16
-	ldr	r1, .L1736+20
+	ldr	r3, .L1698+16
+	ldr	r1, .L1698+20
 	adds	r0, r0, #80
 	str	r3, [r0, #-80]
 	mov	r3, #2032
@@ -11037,20 +10764,20 @@ flash_info_data_init:
 	bl	ftl_memcpy
 	ldr	r0, [r4]
 	movs	r2, #32
-	ldr	r1, .L1736+24
+	ldr	r1, .L1698+24
 	pop	{r4, lr}
 	adds	r0, r0, #48
 	b	ftl_memcpy
-.L1737:
+.L1699:
 	.align	2
-.L1736:
-	.word	.LANCHOR14
-	.word	.LANCHOR157
-	.word	.LC97
-	.word	.LANCHOR27
+.L1698:
+	.word	.LANCHOR19
+	.word	.LANCHOR154
+	.word	.LC94
+	.word	.LANCHOR6
 	.word	1398362953
-	.word	.LANCHOR20
-	.word	.LANCHOR33
+	.word	.LANCHOR25
+	.word	.LANCHOR32
 	.size	flash_info_data_init, .-flash_info_data_init
 	.section	.text.ftl_memcpy32,"ax",%progbits
 	.align	1
@@ -11065,15 +10792,15 @@ ftl_memcpy32:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	movs	r3, #0
 	push	{r4, lr}
-.L1739:
+.L1701:
 	cmp	r3, r2
-	bne	.L1740
+	bne	.L1702
 	pop	{r4, pc}
-.L1740:
+.L1702:
 	ldr	r4, [r1, r3, lsl #2]
 	str	r4, [r0, r3, lsl #2]
 	adds	r3, r3, #1
-	b	.L1739
+	b	.L1701
 	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.ftl_memcmp,"ax",%progbits
 	.align	1
@@ -11101,11 +10828,11 @@ rknand_get_clk_rate:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r0, .L1743
+	ldr	r0, .L1705
 	bx	lr
-.L1744:
+.L1706:
 	.align	2
-.L1743:
+.L1705:
 	.word	148000000
 	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
 	.section	.text.ftl_malloc,"ax",%progbits
@@ -11136,40 +10863,40 @@ nandc_init:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, lr}
 	movs	r3, #0
-	ldr	r6, .L1765
+	ldr	r6, .L1727
 	sub	sp, sp, #20
 	mov	r4, r0
 	str	r3, [sp, #12]
 	ldr	r3, [r6]
 	lsls	r0, r3, #19
-	bpl	.L1747
+	bpl	.L1709
 	mov	r2, r4
-	ldr	r1, .L1765+4
-	ldr	r0, .L1765+8
+	ldr	r1, .L1727+4
+	ldr	r0, .L1727+8
 	bl	printf
-.L1747:
+.L1709:
 	ldr	r1, [r4, #352]
 	movs	r3, #6
-	ldr	r2, .L1765+12
-	ldr	r5, .L1765+16
-	ldr	r7, .L1765+20
+	ldr	r2, .L1727+12
+	ldr	r5, .L1727+16
+	ldr	r7, .L1727+20
 	cmp	r1, r2
 	ldr	r2, [r4, #128]
 	strb	r3, [r5]
 	itt	eq
 	moveq	r3, #8
 	strbeq	r3, [r5]
-	ldr	r3, .L1765+24
+	ldr	r3, .L1727+24
 	str	r4, [r7]
 	cmp	r2, r3
-	ldr	r2, .L1765+28
+	ldr	r2, .L1727+28
 	itt	eq
 	moveq	r3, #9
 	strbeq	r3, [r5]
 	ldrb	r3, [r5]	@ zero_extendqisi2
 	cmp	r3, #9
-	ldr	r3, .L1765+32
-	bne	.L1750
+	ldr	r3, .L1727+32
+	bne	.L1712
 	movs	r1, #1
 	strb	r1, [r3]
 	movs	r1, #2
@@ -11194,36 +10921,36 @@ nandc_init:
 	str	r3, [r4, #84]
 	ldr	r3, [r6]
 	lsls	r1, r3, #19
-	bpl	.L1752
+	bpl	.L1714
 	ldr	r1, [r4]
 	ldr	r2, [r4, #8]
 	ldr	r3, [r4, #80]
 	ldr	r0, [r4, #84]
 	ldr	r4, [r4, #88]
 	stm	sp, {r0, r4}
-.L1764:
-	ldr	r0, .L1765+36
+.L1726:
+	ldr	r0, .L1727+36
 	bl	printf
-.L1752:
-	ldr	r3, .L1765+40
+.L1714:
+	ldr	r3, .L1727+40
 	movs	r2, #1
 	strb	r2, [r3]
 	movs	r3, #0
-	ldr	r2, .L1765+44
+	ldr	r2, .L1727+44
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L1765+48
+	ldr	r2, .L1727+48
 	strb	r3, [r2]
 	ldr	r3, [r6]
 	lsls	r3, r3, #19
-	bpl	.L1746
+	bpl	.L1708
 	ldrb	r1, [r5]	@ zero_extendqisi2
-	ldr	r0, .L1765+52
+	ldr	r0, .L1727+52
 	bl	printf
-.L1746:
+.L1708:
 	add	sp, sp, #20
 	@ sp needed
 	pop	{r4, r5, r6, r7, pc}
-.L1750:
+.L1712:
 	movs	r1, #0
 	movs	r0, #1
 	strb	r1, [r3]
@@ -11247,11 +10974,11 @@ nandc_init:
 	movs	r3, #39
 	str	r3, [r4, #308]
 	bl	ftl_malloc
-	ldr	r3, .L1765+56
+	ldr	r3, .L1727+56
 	str	r0, [r3]
 	ldr	r3, [r6]
 	lsls	r2, r3, #19
-	bpl	.L1752
+	bpl	.L1714
 	ldr	r0, [r7]
 	ldr	r1, [r0]
 	ldr	r2, [r0, #344]
@@ -11260,25 +10987,25 @@ nandc_init:
 	ldr	r0, [r0, #312]
 	str	r4, [sp]
 	str	r0, [sp, #4]
-	b	.L1764
-.L1766:
+	b	.L1726
+.L1728:
 	.align	2
-.L1765:
-	.word	.LANCHOR14
-	.word	.LANCHOR158
-	.word	.LC98
+.L1727:
+	.word	.LANCHOR19
+	.word	.LANCHOR155
+	.word	.LC95
 	.word	1446522928
-	.word	.LANCHOR28
-	.word	.LANCHOR13
+	.word	.LANCHOR27
+	.word	.LANCHOR7
 	.word	1446588464
 	.word	1052675
-	.word	.LANCHOR51
-	.word	.LC99
-	.word	.LANCHOR52
-	.word	.LANCHOR54
 	.word	.LANCHOR50
-	.word	.LC100
+	.word	.LC96
+	.word	.LANCHOR51
 	.word	.LANCHOR53
+	.word	.LANCHOR49
+	.word	.LC97
+	.word	.LANCHOR52
 	.size	nandc_init, .-nandc_init
 	.section	.text.zbuf_init,"ax",%progbits
 	.align	1
@@ -11293,11 +11020,11 @@ zbuf_init:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r5, #0
-	ldr	r4, .L1770
+	ldr	r4, .L1732
 	mov	r6, r5
-	ldr	r8, .L1770+12
+	ldr	r8, .L1732+12
 	mov	r7, r4
-.L1768:
+.L1730:
 	ldrb	r0, [r8]	@ zero_extendqisi2
 	uxtb	r3, r5
 	strb	r6, [r4, #2]
@@ -11314,20 +11041,20 @@ zbuf_init:
 	bl	ftl_malloc
 	cmp	r5, #32
 	str	r0, [r4, #-36]
-	bne	.L1768
+	bne	.L1730
 	movs	r3, #255
 	strb	r3, [r7, #1488]
-	ldr	r3, .L1770+4
+	ldr	r3, .L1732+4
 	strb	r6, [r3]
-	ldr	r3, .L1770+8
+	ldr	r3, .L1732+8
 	strb	r5, [r3]
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1771:
+.L1733:
 	.align	2
-.L1770:
+.L1732:
+	.word	.LANCHOR55
 	.word	.LANCHOR56
 	.word	.LANCHOR57
-	.word	.LANCHOR58
 	.word	.LANCHOR131
 	.size	zbuf_init, .-zbuf_init
 	.section	.text.gc_init,"ax",%progbits
@@ -11341,117 +11068,117 @@ zbuf_init:
 gc_init:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1773
-	movw	r2, #2132
+	ldr	r3, .L1735
+	movw	r2, #2204
 	push	{r4, r5, r6, lr}
 	movs	r4, #0
-	ldr	r5, .L1773+4
+	ldr	r5, .L1735+4
 	mov	r1, r4
 	strb	r4, [r3]
-	ldr	r3, .L1773+8
+	ldr	r3, .L1735+8
 	mov	r0, r5
 	strb	r4, [r3]
-	ldr	r3, .L1773+12
+	ldr	r3, .L1735+12
 	str	r4, [r3]
-	ldr	r3, .L1773+16
+	ldr	r3, .L1735+16
 	strh	r4, [r3]	@ movhi
 	bl	ftl_memset
 	movw	r3, #65535
 	str	r4, [r5, #8]
 	strh	r3, [r5]	@ movhi
-	ldr	r3, .L1773+20
+	ldr	r3, .L1735+20
 	ldrh	r3, [r3]
 	lsrs	r2, r3, #1
 	lsrs	r1, r3, #2
 	strh	r2, [r5, #34]	@ movhi
-	ldr	r2, .L1773+24
+	ldr	r2, .L1735+24
 	strh	r1, [r5, #32]	@ movhi
-	ldr	r5, .L1773+28
+	ldr	r5, .L1735+28
 	strh	r4, [r2]	@ movhi
-	ldr	r2, .L1773+32
+	ldr	r2, .L1735+32
 	strh	r4, [r2]	@ movhi
-	ldr	r2, .L1773+36
+	ldr	r2, .L1735+36
 	strh	r4, [r2]	@ movhi
-	ldr	r4, .L1773+40
+	ldr	r4, .L1735+40
 	ldrb	r0, [r4]	@ zero_extendqisi2
 	smulbb	r2, r0, r3
 	uxth	r2, r2
 	sub	r6, r2, #32
 	strh	r6, [r5]	@ movhi
-	ldr	r5, .L1773+44
+	ldr	r5, .L1735+44
 	strh	r2, [r5]	@ movhi
-	ldr	r2, .L1773+48
-	ldr	r5, .L1773+52
+	ldr	r2, .L1735+48
+	ldr	r5, .L1735+52
 	strh	r3, [r2]	@ movhi
 	movs	r2, #4
-	ldr	r3, .L1773+56
+	ldr	r3, .L1735+56
 	strh	r2, [r3]	@ movhi
-	ldr	r3, .L1773+60
+	ldr	r3, .L1735+60
 	strh	r1, [r3]	@ movhi
 	ldrh	r3, [r5]
 	muls	r0, r3, r0
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L1773+64
+	ldr	r3, .L1735+64
 	str	r0, [r3]
 	ldrh	r3, [r5]
 	ldrb	r0, [r4]	@ zero_extendqisi2
 	muls	r0, r3, r0
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L1773+68
+	ldr	r3, .L1735+68
 	str	r0, [r3]
 	ldrh	r3, [r5]
 	ldrb	r0, [r4]	@ zero_extendqisi2
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L1773+72
+	ldr	r3, .L1735+72
 	str	r0, [r3]
 	ldrh	r3, [r5]
 	ldrb	r0, [r4]	@ zero_extendqisi2
 	muls	r0, r3, r0
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L1773+76
+	ldr	r3, .L1735+76
 	str	r0, [r3]
 	ldrh	r3, [r5]
 	ldrb	r0, [r4]	@ zero_extendqisi2
 	muls	r0, r3, r0
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L1773+80
-	ldr	r2, .L1773+84
+	ldr	r3, .L1735+80
+	ldr	r2, .L1735+84
 	str	r0, [r3]
-	ldr	r3, .L1773+88
+	ldr	r3, .L1735+88
 	ldrh	r3, [r3]
 	lsrs	r3, r3, #2
 	strh	r3, [r2]	@ movhi
 	pop	{r4, r5, r6, pc}
-.L1774:
+.L1736:
 	.align	2
-.L1773:
-	.word	.LANCHOR85
-	.word	.LANCHOR71
-	.word	.LANCHOR159
-	.word	.LANCHOR160
+.L1735:
+	.word	.LANCHOR84
+	.word	.LANCHOR70
+	.word	.LANCHOR156
+	.word	.LANCHOR157
 	.word	.LANCHOR96
-	.word	.LANCHOR95
-	.word	.LANCHOR90
+	.word	.LANCHOR94
+	.word	.LANCHOR87
 	.word	.LANCHOR102
-	.word	.LANCHOR91
-	.word	.LANCHOR92
-	.word	.LANCHOR80
+	.word	.LANCHOR88
+	.word	.LANCHOR89
+	.word	.LANCHOR79
 	.word	.LANCHOR100
-	.word	.LANCHOR94
-	.word	.LANCHOR86
+	.word	.LANCHOR93
+	.word	.LANCHOR85
+	.word	.LANCHOR158
+	.word	.LANCHOR69
+	.word	.LANCHOR159
+	.word	.LANCHOR160
+	.word	.LANCHOR82
+	.word	.LANCHOR76
 	.word	.LANCHOR161
-	.word	.LANCHOR70
-	.word	.LANCHOR162
-	.word	.LANCHOR163
-	.word	.LANCHOR83
-	.word	.LANCHOR77
-	.word	.LANCHOR164
-	.word	.LANCHOR87
+	.word	.LANCHOR86
 	.word	.LANCHOR98
 	.size	gc_init, .-gc_init
 	.section	.text.ftl_free,"ax",%progbits
@@ -11479,24 +11206,24 @@ ftl_free:
 js_hash:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1779
+	ldr	r3, .L1741
 	add	r1, r1, r0
 	push	{r4, lr}
-.L1777:
+.L1739:
 	cmp	r0, r1
-	bne	.L1778
+	bne	.L1740
 	mov	r0, r3
 	pop	{r4, pc}
-.L1778:
+.L1740:
 	lsrs	r2, r3, #2
 	ldrb	r4, [r0], #1	@ zero_extendqisi2
 	add	r2, r2, r3, lsl #5
 	add	r2, r2, r4
 	eors	r3, r3, r2
-	b	.L1777
-.L1780:
+	b	.L1739
+.L1742:
 	.align	2
-.L1779:
+.L1741:
 	.word	1204201446
 	.size	js_hash, .-js_hash
 	.section	.text.ftl_debug_info_fill,"ax",%progbits
@@ -11510,32 +11237,32 @@ js_hash:
 ftl_debug_info_fill:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1787
+	ldr	r3, .L1749
 	push	{r4, lr}
 	mov	r4, r1
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #8
-	bls	.L1782
+	bls	.L1744
 	cmp	r0, #2
-	bne	.L1783
-	cbz	r2, .L1783
-	ldr	r3, .L1787+4
+	bne	.L1745
+	cbz	r2, .L1745
+	ldr	r3, .L1749+4
 	mov	r0, r2
 	str	r3, [r1]
 	mov	r1, #1024
 	bl	js_hash
 	str	r0, [r4, #4]
-.L1782:
+.L1744:
 	movs	r0, #0
 	pop	{r4, pc}
-.L1783:
+.L1745:
 	movs	r3, #0
 	str	r3, [r4]
 	str	r3, [r4, #4]
-	b	.L1782
-.L1788:
+	b	.L1744
+.L1750:
 	.align	2
-.L1787:
+.L1749:
 	.word	.LANCHOR131
 	.word	1212240712
 	.size	ftl_debug_info_fill, .-ftl_debug_info_fill
@@ -11608,13 +11335,13 @@ ftl_get_capacity:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L1794
+	ldr	r3, .L1756
 	ldr	r0, [r3]
 	bx	lr
-.L1795:
+.L1757:
 	.align	2
-.L1794:
-	.word	.LANCHOR68
+.L1756:
+	.word	.LANCHOR67
 	.size	ftl_get_capacity, .-ftl_get_capacity
 	.section	.text.rknand_print_hex,"ax",%progbits
 	.align	1
@@ -11629,60 +11356,60 @@ rknand_print_hex:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r6, #0
-	ldr	r10, .L1805+12
+	ldr	r10, .L1767+12
 	mov	r7, r1
 	mov	r8, r2
 	mov	fp, r3
 	mov	r5, r6
 	mov	r4, r6
 	str	r0, [sp, #4]
-.L1797:
+.L1759:
 	cmp	r4, fp
-	bne	.L1803
-	ldr	r1, .L1805
-	ldr	r0, .L1805+4
+	bne	.L1765
+	ldr	r1, .L1767
+	ldr	r0, .L1767+4
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
 	b	printf
-.L1803:
-	cbnz	r5, .L1798
+.L1765:
+	cbnz	r5, .L1760
 	mov	r3, r6
 	mov	r2, r7
 	ldr	r1, [sp, #4]
-	ldr	r0, .L1805+8
+	ldr	r0, .L1767+8
 	bl	printf
-.L1798:
+.L1760:
 	cmp	r8, #4
-	bne	.L1799
+	bne	.L1761
 	ldr	r1, [r7, r4, lsl #2]
-.L1804:
+.L1766:
 	mov	r0, r10
 	adds	r5, r5, #1
 	bl	printf
 	cmp	r5, #15
-	bls	.L1802
+	bls	.L1764
 	movs	r5, #0
-	ldr	r1, .L1805
-	ldr	r0, .L1805+4
+	ldr	r1, .L1767
+	ldr	r0, .L1767+4
 	bl	printf
-.L1802:
+.L1764:
 	adds	r4, r4, #1
 	add	r6, r6, r8
-	b	.L1797
-.L1799:
+	b	.L1759
+.L1761:
 	cmp	r8, #2
 	ite	eq
 	ldrsheq	r1, [r7, r4, lsl #1]
 	ldrbne	r1, [r7, r4]	@ zero_extendqisi2
-	b	.L1804
-.L1806:
+	b	.L1766
+.L1768:
 	.align	2
-.L1805:
-	.word	.LC103
-	.word	.LC104
+.L1767:
+	.word	.LC100
 	.word	.LC101
-	.word	.LC102
+	.word	.LC98
+	.word	.LC99
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.hynix_get_read_retry_default,"ax",%progbits
 	.align	1
@@ -11695,7 +11422,7 @@ rknand_print_hex:
 hynix_get_read_retry_default:
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1918
+	ldr	r3, .L1880
 	cmp	r0, #2
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #56
@@ -11712,50 +11439,50 @@ hynix_get_read_retry_default:
 	strb	r1, [fp, #129]
 	strb	r2, [fp, #130]
 	strb	r3, [fp, #131]
-	bne	.L1808
+	bne	.L1770
 	movs	r3, #167
 	mov	r8, #7
 	strb	r3, [fp, #128]
 	movs	r2, #247
-	ldr	r3, .L1918+4
+	ldr	r3, .L1880+4
 	strb	r2, [r3, #17]
-.L1912:
+.L1874:
 	mov	r10, #4
-	b	.L1809
-.L1808:
+	b	.L1771
+.L1770:
 	cmp	r0, #3
-	bne	.L1810
+	bne	.L1772
 	add	r2, fp, #127
 	movs	r3, #176
-.L1811:
+.L1773:
 	strb	r3, [r2, #1]!
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, #184
-	bne	.L1811
-.L1913:
+	bne	.L1773
+.L1875:
 	mov	r8, #8
 	mov	r10, r8
-.L1809:
+.L1771:
 	subs	r3, r4, #1
 	cmp	r3, #1
-	bhi	.L1817
-	movs	r5, #0
-.L1818:
-	ldr	r3, .L1918+8
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	uxtb	r3, r5
-	cmp	r2, r3
-	bhi	.L1823
-.L1824:
+	bhi	.L1779
+	movs	r6, #0
+.L1780:
+	ldr	r3, .L1880+8
+	uxtb	r2, r6
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	cmp	r1, r2
+	bhi	.L1785
+.L1786:
 	strb	r10, [fp, #113]
 	strb	r8, [fp, #114]
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1810:
+.L1772:
 	cmp	r0, #4
-	bne	.L1812
+	bne	.L1774
 	movs	r0, #204
 	strb	r1, [fp, #133]
 	strb	r0, [fp, #128]
@@ -11769,10 +11496,10 @@ hynix_get_read_retry_default:
 	strb	r0, [fp, #132]
 	strb	r2, [fp, #134]
 	strb	r3, [fp, #135]
-	b	.L1913
-.L1812:
+	b	.L1875
+.L1774:
 	cmp	r0, #5
-	bne	.L1813
+	bne	.L1775
 	movs	r3, #56
 	mov	r8, #8
 	strb	r3, [fp, #128]
@@ -11782,10 +11509,10 @@ hynix_get_read_retry_default:
 	strb	r3, [fp, #130]
 	movs	r3, #59
 	strb	r3, [fp, #131]
-	b	.L1912
-.L1813:
+	b	.L1874
+.L1775:
 	cmp	r0, #6
-	bne	.L1814
+	bne	.L1776
 	movs	r3, #14
 	mov	r8, #12
 	strb	r3, [fp, #128]
@@ -11795,29 +11522,29 @@ hynix_get_read_retry_default:
 	strb	r3, [fp, #130]
 	movs	r3, #17
 	strb	r3, [fp, #131]
-	b	.L1912
-.L1814:
+	b	.L1874
+.L1776:
 	cmp	r0, #7
-	bne	.L1815
+	bne	.L1777
 	add	r2, fp, #127
 	movs	r3, #176
-.L1816:
+.L1778:
 	strb	r3, [r2, #1]!
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, #184
-	bne	.L1816
+	bne	.L1778
 	movs	r3, #212
 	mov	r8, #12
 	strb	r3, [fp, #136]
 	movs	r3, #213
 	strb	r3, [fp, #137]
 	mov	r10, #10
-	b	.L1809
-.L1815:
+	b	.L1771
+.L1777:
 	cmp	r0, #8
 	mov	r3, #7
-	bne	.L1871
+	bne	.L1833
 	strb	r3, [fp, #129]
 	movs	r3, #9
 	movs	r2, #6
@@ -11828,72 +11555,76 @@ hynix_get_read_retry_default:
 	mov	r8, #50
 	strb	r3, [fp, #132]
 	mov	r10, #5
-	b	.L1809
-.L1871:
+	b	.L1771
+.L1833:
 	mov	r8, r3
-	b	.L1912
-.L1823:
-	ldr	r2, .L1918+12
-	movs	r1, #160
+	b	.L1874
+.L1785:
+	ldr	r3, .L1880+12
+	movs	r4, #160
+	ldr	r1, .L1880+16
+	add	r7, fp, #127
 	ldr	r0, [sp]
-	add	r7, r10, #-1
-	add	r6, fp, #127
-	ldrb	r3, [r2, r3]	@ zero_extendqisi2
-	ldr	r2, .L1918+16
-	uxtab	r7, r0, r7
-	ldr	r4, [r2]
-	mla	r1, r1, r3, fp
-	add	r4, r4, r3, lsl #8
-	adds	r1, r1, #144
-	subs	r2, r1, #1
-	addw	r3, r4, #2056
-.L1819:
+	ldrb	r2, [r3, r2]	@ zero_extendqisi2
+	ldr	r5, [r1]
+	add	r1, r10, #-1
+	uxtab	r1, r0, r1
+	mla	r4, r4, r2, fp
+	str	r1, [sp, #4]
+	add	r5, r5, r2, lsl #8
+	movs	r1, #55
+	adds	r4, r4, #144
+	addw	r2, r5, #2056
+	subs	r3, r4, #1
+.L1781:
+	str	r1, [r2]
+	ldrb	r0, [r7, #1]!	@ zero_extendqisi2
+	str	r3, [sp, #16]
+	str	r1, [sp, #12]
+	str	r0, [r5, #2052]
+	movs	r0, #1
 	str	r2, [sp, #8]
-	movs	r2, #55
-	str	r2, [r3]
-	ldrb	r0, [r6, #1]!	@ zero_extendqisi2
-	str	r3, [sp, #4]
-	str	r0, [r4, #2052]
-	movs	r0, #80
-	bl	timer_delay_ns
-	ldr	r0, [r4, #2048]
-	cmp	r7, r6
+	bl	udelay
+	ldr	r2, [sp, #4]
+	ldr	r0, [r5, #2048]
+	ldr	r3, [sp, #16]
+	cmp	r2, r7
+	ldr	r1, [sp, #12]
 	ldr	r2, [sp, #8]
-	ldr	r3, [sp, #4]
-	strb	r0, [r2, #1]!
-	bne	.L1819
-	ldr	r7, .L1918+4
-	mov	r0, r1
-	movs	r2, #0
-.L1820:
-	movs	r3, #1
-	adds	r6, r7, r2
-.L1821:
-	ldrb	r4, [r6, r3, lsl #2]	@ zero_extendqisi2
-	ldrb	ip, [r0]	@ zero_extendqisi2
-	add	r4, r4, ip
-	strb	r4, [r0, r3, lsl #3]
-	adds	r3, r3, #1
-	cmp	r3, #7
-	bne	.L1821
+	strb	r0, [r3, #1]!
+	bne	.L1781
+	ldr	r3, .L1880+4
+	mov	r0, r4
+	movs	r1, #0
+.L1782:
+	movs	r2, #1
+	adds	r7, r3, r1
+.L1783:
+	ldrb	r5, [r7, r2, lsl #2]	@ zero_extendqisi2
+	ldrb	lr, [r0]	@ zero_extendqisi2
+	add	r5, r5, lr
+	strb	r5, [r0, r2, lsl #3]
 	adds	r2, r2, #1
+	cmp	r2, #7
+	bne	.L1783
+	adds	r1, r1, #1
 	adds	r0, r0, #1
-	cmp	r2, #4
-	bne	.L1820
-	movs	r3, #0
-	adds	r5, r5, #1
-	strb	r3, [r1, #16]
-	strb	r3, [r1, #24]
-	strb	r3, [r1, #32]
-	strb	r3, [r1, #40]
-	strb	r3, [r1, #48]
-	strb	r3, [r1, #41]
-	strb	r3, [r1, #49]
-	b	.L1818
-.L1817:
+	cmp	r1, #4
+	bne	.L1782
+	movs	r2, #0
+	adds	r6, r6, #1
+	strb	r2, [r4, #16]
+	strb	r2, [r4, #24]
+	strb	r2, [r4, #32]
+	strb	r2, [r4, #40]
+	strb	r2, [r4, #48]
+	strb	r2, [r4, #41]
+	strb	r2, [r4, #49]
+	b	.L1780
+.L1779:
 	subs	r3, r4, #3
 	cmp	r3, #5
-	bhi	.L1824
+	bhi	.L1786
 	smulbb	r3, r8, r10
 	asrs	r2, r3, #1
 	lsls	r3, r3, #4
@@ -11904,14 +11635,14 @@ hynix_get_read_retry_default:
 	lsls	r3, r2, #1
 	str	r3, [sp, #24]
 	movs	r3, #0
-.L1917:
+.L1879:
 	str	r3, [sp, #20]
-	ldr	r3, .L1918+8
+	ldr	r3, .L1880+8
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	ldrb	r3, [sp, #20]	@ zero_extendqisi2
 	cmp	r2, r3
-	bls	.L1824
-	ldr	r2, .L1918+12
+	bls	.L1786
+	ldr	r2, .L1880+12
 	movs	r6, #255
 	ldrb	r3, [r2, r3]	@ zero_extendqisi2
 	mov	r0, r3
@@ -11923,14 +11654,14 @@ hynix_get_read_retry_default:
 	mla	r1, r1, r3, fp
 	add	r3, r1, #144
 	str	r3, [sp, #40]
-	ldr	r3, .L1918+16
+	ldr	r3, .L1880+16
 	ldr	r3, [r3]
 	str	r3, [sp, #4]
 	add	r5, r3, r2, lsl #8
 	str	r6, [r5, #2056]
 	bl	nandc_wait_flash_ready
 	cmp	r4, #8
-	bne	.L1826
+	bne	.L1788
 	add	r3, fp, #144
 	movs	r2, #23
 	str	r3, [sp, #40]
@@ -11954,7 +11685,7 @@ hynix_get_read_retry_default:
 	str	r1, [r5, #2052]
 	str	r2, [r5, #2052]
 	str	r3, [r5, #2052]
-.L1827:
+.L1789:
 	ldm	sp, {r2, r3}
 	add	r3, r3, r2, lsl #8
 	movs	r2, #48
@@ -11963,15 +11694,15 @@ hynix_get_read_retry_default:
 	subs	r3, r4, #5
 	cmp	r3, #1
 	str	r3, [sp, #28]
-	bls	.L1873
+	bls	.L1835
 	cmp	r4, #8
-	beq	.L1873
+	beq	.L1835
 	cmp	r4, #7
 	ite	ne
 	movne	r2, #2
 	moveq	r2, #32
-.L1833:
-	ldr	r3, .L1918+20
+.L1795:
+	ldr	r3, .L1880+20
 	subs	r2, r2, #1
 	ldr	r5, [sp, #4]
 	ldr	r6, [sp]
@@ -11980,65 +11711,65 @@ hynix_get_read_retry_default:
 	subs	r1, r3, #1
 	uxtab	r2, r3, r2
 	mov	r0, r1
-.L1834:
+.L1796:
 	ldr	r5, [r7, #2048]
 	strb	r5, [r0, #1]!
 	cmp	r2, r0
-	bne	.L1834
+	bne	.L1796
 	cmp	r4, #8
-	bne	.L1835
+	bne	.L1797
 	movs	r2, #0
-.L1837:
+.L1799:
 	ldrb	r0, [r3, r2, lsl #2]	@ zero_extendqisi2
 	uxtb	r1, r2
 	cmp	r0, #50
-	beq	.L1836
+	beq	.L1798
 	add	r0, r3, r2, lsl #2
 	ldrb	r0, [r0, #1]	@ zero_extendqisi2
 	cmp	r0, #5
-	beq	.L1836
+	beq	.L1798
 	adds	r2, r2, #1
 	cmp	r2, #8
-	bne	.L1837
-.L1838:
+	bne	.L1799
+.L1800:
 	movs	r1, #0
-	ldr	r0, .L1918+24
+	ldr	r0, .L1880+24
 	bl	printf
-.L1840:
-	b	.L1840
-.L1826:
+.L1802:
+	b	.L1802
+.L1788:
 	cmp	r4, #4
 	mov	r3, #54
 	str	r3, [r5, #2056]
-	bne	.L1828
+	bne	.L1790
 	movs	r3, #64
 	str	r6, [r5, #2052]
 	str	r3, [r5, #2048]
 	movs	r3, #204
-.L1914:
+.L1876:
 	str	r3, [r5, #2052]
 	movs	r3, #77
-	b	.L1915
-.L1919:
+	b	.L1877
+.L1881:
 	.align	2
-.L1918:
-	.word	.LANCHOR27
-	.word	.LANCHOR165
-	.word	.LANCHOR18
-	.word	.LANCHOR30
-	.word	.LANCHOR13
-	.word	.LANCHOR166
-	.word	.LC105
-.L1828:
+.L1880:
+	.word	.LANCHOR6
+	.word	.LANCHOR162
+	.word	.LANCHOR23
+	.word	.LANCHOR29
+	.word	.LANCHOR7
+	.word	.LANCHOR163
+	.word	.LC102
+.L1790:
 	subs	r3, r4, #5
 	cmp	r3, #1
-	bhi	.L1830
+	bhi	.L1792
 	ldrb	r3, [fp, #128]	@ zero_extendqisi2
 	str	r3, [r5, #2052]
 	movs	r3, #82
-.L1915:
+.L1877:
 	str	r3, [r5, #2048]
-.L1829:
+.L1791:
 	ldm	sp, {r2, r3}
 	cmp	r4, #6
 	add	r3, r3, r2, lsl #8
@@ -12061,57 +11792,57 @@ hynix_get_read_retry_default:
 	str	r2, [r3, #2052]
 	movs	r2, #0
 	str	r2, [r3, #2052]
-	b	.L1827
-.L1830:
+	b	.L1789
+.L1792:
 	cmp	r4, #7
-	bne	.L1829
+	bne	.L1791
 	movs	r3, #174
 	str	r3, [r5, #2052]
 	movs	r3, #0
 	str	r3, [r5, #2048]
 	movs	r3, #176
-	b	.L1914
-.L1873:
+	b	.L1876
+.L1835:
 	movs	r2, #16
-	b	.L1833
-.L1836:
+	b	.L1795
+.L1798:
 	cmp	r1, #6
-	bhi	.L1838
-.L1839:
-	ldr	r3, .L1920
+	bhi	.L1800
+.L1801:
+	ldr	r3, .L1882
 	ldr	ip, [r3]
 	mov	r3, ip
-.L1849:
+.L1811:
 	ldr	r1, [sp, #48]
 	sub	r2, r3, ip
 	cmp	r1, r2
-	bgt	.L1850
-	ldr	r3, .L1920
+	bgt	.L1812
+	ldr	r3, .L1882
 	ldr	r1, [r3]
 	ldr	r3, [sp, #24]
 	adds	r2, r1, r3
 	movs	r3, #8
-.L1852:
+.L1814:
 	mov	r5, r2
 	movs	r0, #0
-.L1851:
+.L1813:
 	ldrh	r6, [r5]
 	adds	r0, r0, #1
 	mvns	r6, r6
 	strh	r6, [r5], #2	@ movhi
 	ldr	r6, [sp, #8]
 	cmp	r6, r0
-	bgt	.L1851
+	bgt	.L1813
 	ldr	r0, [sp, #44]
 	subs	r3, r3, #1
 	add	r2, r2, r0
-	bne	.L1852
+	bne	.L1814
 	mov	r6, r1
 	str	r3, [sp, #16]
-.L1853:
+.L1815:
 	movs	r0, #0
 	mov	r2, r0
-.L1857:
+.L1819:
 	movs	r3, #1
 	mov	lr, r6
 	lsl	r5, r3, r2
@@ -12120,7 +11851,7 @@ hynix_get_read_retry_default:
 	str	r5, [sp, #32]
 	movs	r5, #16
 	str	r5, [sp, #36]
-.L1855:
+.L1817:
 	ldrh	r3, [lr]
 	str	r3, [sp, #52]
 	ldr	r3, [sp, #32]
@@ -12136,7 +11867,7 @@ hynix_get_read_retry_default:
 	ldr	r3, [sp, #36]
 	subs	r3, r3, #1
 	str	r3, [sp, #36]
-	bne	.L1855
+	bne	.L1817
 	ldr	r3, [sp, #12]
 	adds	r2, r2, #1
 	cmp	r3, #8
@@ -12145,7 +11876,7 @@ hynix_get_read_retry_default:
 	orrhi	r0, r0, r3
 	uxthhi	r0, r0
 	cmp	r2, #16
-	bne	.L1857
+	bne	.L1819
 	ldr	r3, [sp, #16]
 	strh	r0, [r6], #2	@ movhi
 	adds	r3, r3, #1
@@ -12153,106 +11884,106 @@ hynix_get_read_retry_default:
 	ldr	r2, [sp, #16]
 	ldr	r3, [sp, #8]
 	cmp	r3, r2
-	bgt	.L1853
+	bgt	.L1815
 	subs	r2, r1, #4
 	add	r0, r1, #28
 	movs	r3, #0
-.L1860:
+.L1822:
 	ldr	r5, [r2, #4]!
-	cbnz	r5, .L1859
+	cbnz	r5, .L1821
 	adds	r3, r3, #1
-.L1859:
+.L1821:
 	cmp	r0, r2
-	bne	.L1860
+	bne	.L1822
 	cmp	r3, #7
-	ble	.L1861
-	ldr	r0, .L1920+4
+	ble	.L1823
+	ldr	r0, .L1882+4
 	mov	r3, #1024
 	movs	r2, #1
 	bl	rknand_print_hex
 	movs	r1, #0
-	ldr	r0, .L1920+8
+	ldr	r0, .L1882+8
 	bl	printf
-.L1862:
-	b	.L1862
-.L1835:
+.L1824:
+	b	.L1824
+.L1797:
 	cmp	r4, #7
-	bne	.L1841
+	bne	.L1803
 	movs	r2, #0
-.L1843:
+.L1805:
 	ldrb	r0, [r3, r2, lsl #2]	@ zero_extendqisi2
 	uxtb	r1, r2
 	cmp	r0, #12
-	beq	.L1842
+	beq	.L1804
 	add	r0, r3, r2, lsl #2
 	ldrb	r0, [r0, #1]	@ zero_extendqisi2
 	cmp	r0, #10
-	beq	.L1842
+	beq	.L1804
 	adds	r2, r2, #1
 	cmp	r2, #8
-	bne	.L1843
-.L1844:
+	bne	.L1805
+.L1806:
 	movs	r1, #0
-	ldr	r0, .L1920+8
+	ldr	r0, .L1882+8
 	bl	printf
-.L1845:
-	b	.L1845
-.L1842:
+.L1807:
+	b	.L1807
+.L1804:
 	cmp	r1, #6
-	bls	.L1839
-	b	.L1844
-.L1841:
+	bls	.L1801
+	b	.L1806
+.L1803:
 	cmp	r4, #6
-	bne	.L1839
+	bne	.L1801
 	adds	r3, r3, #7
-.L1846:
+.L1808:
 	ldrb	r2, [r1, #1]!	@ zero_extendqisi2
 	cmp	r2, #12
-	beq	.L1839
+	beq	.L1801
 	ldrb	r2, [r1, #8]	@ zero_extendqisi2
 	cmp	r2, #4
-	beq	.L1839
+	beq	.L1801
 	cmp	r3, r1
-	bne	.L1846
+	bne	.L1808
 	movs	r1, #0
-	ldr	r0, .L1920+8
+	ldr	r0, .L1882+8
 	bl	printf
-.L1848:
-	b	.L1848
-.L1850:
+.L1810:
+	b	.L1810
+.L1812:
 	ldr	r2, [r7, #2048]
 	strb	r2, [r3], #1
-	b	.L1849
-.L1861:
+	b	.L1811
+.L1823:
 	cmp	r4, #6
-	beq	.L1875
+	beq	.L1837
 	cmp	r4, #7
-	beq	.L1876
+	beq	.L1838
 	cmp	r4, #8
 	ite	ne
 	movne	r0, #8
 	moveq	r0, #5
-.L1863:
+.L1825:
 	add	r3, r10, #-1
 	ldr	r1, [sp, #40]
 	uxtb	r3, r3
 	movs	r5, #0
 	adds	r3, r3, #1
-.L1864:
+.L1826:
 	mov	lr, r1
 	mov	r2, ip
-.L1865:
+.L1827:
 	ldrb	r6, [r2], #1	@ zero_extendqisi2
 	strb	r6, [lr], #1
 	sub	r6, r2, ip
 	uxtb	r6, r6
 	cmp	r10, r6
-	bhi	.L1865
+	bhi	.L1827
 	adds	r5, r5, #1
 	add	ip, ip, r3
 	cmp	r8, r5
 	add	r1, r1, r0
-	bgt	.L1864
+	bgt	.L1826
 	ldm	sp, {r2, r3}
 	movs	r6, #255
 	add	r5, r3, r2, lsl #8
@@ -12260,7 +11991,7 @@ hynix_get_read_retry_default:
 	bl	nandc_wait_flash_ready
 	ldr	r3, [sp, #28]
 	cmp	r3, #1
-	bhi	.L1867
+	bhi	.L1829
 	movs	r3, #54
 	movs	r2, #22
 	str	r3, [r5, #2056]
@@ -12276,30 +12007,30 @@ hynix_get_read_retry_default:
 	str	r6, [r7, #2052]
 	str	r6, [r7, #2052]
 	str	r6, [r7, #2052]
-.L1916:
+.L1878:
 	str	r3, [r5, #2056]
 	bl	nandc_wait_flash_ready
 	ldr	r3, [sp, #20]
 	adds	r3, r3, #1
-	b	.L1917
-.L1875:
+	b	.L1879
+.L1837:
 	movs	r0, #4
-	b	.L1863
-.L1876:
+	b	.L1825
+.L1838:
 	movs	r0, #10
-	b	.L1863
-.L1867:
+	b	.L1825
+.L1829:
 	cmp	r4, #8
 	ite	eq
 	moveq	r3, #190
 	movne	r3, #56
-	b	.L1916
-.L1921:
+	b	.L1878
+.L1883:
 	.align	2
-.L1920:
-	.word	.LANCHOR166
-	.word	.LC106
-	.word	.LC105
+.L1882:
+	.word	.LANCHOR163
+	.word	.LC103
+	.word	.LC102
 	.size	hynix_get_read_retry_default, .-hynix_get_read_retry_default
 	.section	.text.flash_get_read_retry_tbl,"ax",%progbits
 	.align	1
@@ -12313,18 +12044,18 @@ flash_get_read_retry_tbl:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L1924
+	ldr	r3, .L1886
 	ldrb	r0, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r0, #1
 	cmp	r3, #7
-	bhi	.L1922
+	bhi	.L1884
 	b	hynix_get_read_retry_default
-.L1922:
+.L1884:
 	bx	lr
-.L1925:
+.L1887:
 	.align	2
-.L1924:
-	.word	.LANCHOR33
+.L1886:
+	.word	.LANCHOR32
 	.size	flash_get_read_retry_tbl, .-flash_get_read_retry_tbl
 	.section	.text.nandc_xfer_done,"ax",%progbits
 	.align	1
@@ -12337,35 +12068,35 @@ flash_get_read_retry_tbl:
 nandc_xfer_done:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1961
+	ldr	r3, .L1923
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	movs	r1, #0
-	ldr	r4, .L1961+4
+	ldr	r4, .L1923+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	ldr	r5, .L1961+8
+	ldr	r5, .L1923+8
 	strb	r1, [r4]
 	cmp	r3, #9
 	ldr	r6, [r5]
-	bne	.L1927
+	bne	.L1889
 	ldr	r3, [r6, #16]
 	str	r3, [sp]
 	ldr	r3, [r6, #48]
 	ubfx	r3, r3, #1, #1
 	cmp	r3, #0
-	bne	.L1932
-	ldr	r7, .L1961+12
+	bne	.L1894
+	ldr	r7, .L1923+12
 	mov	r4, r3
-	ldr	r8, .L1961+32
-.L1929:
+	ldr	r8, .L1923+32
+.L1891:
 	ldr	r3, [sp]
 	lsls	r0, r3, #11
-	bmi	.L1931
+	bmi	.L1893
 	ldr	r3, [r5]
 	adds	r4, r4, #1
 	ldr	r3, [r3, #16]
 	str	r3, [sp]
 	bics	r3, r4, #-16777216
-	bne	.L1929
+	bne	.L1891
 	ldr	r2, [sp]
 	mov	r1, r4
 	ldr	r3, [r6, #64]
@@ -12377,68 +12108,68 @@ nandc_xfer_done:
 	ldr	r1, [r5]
 	mov	r0, r8
 	bl	rknand_print_hex
-	b	.L1929
-.L1930:
+	b	.L1891
+.L1892:
 	ldr	r3, [sp]
 	adds	r1, r1, #1
 	ubfx	r3, r3, #22, #6
 	cmp	r1, r3, lsl #12
-	bne	.L1932
+	bne	.L1894
 	ldr	r2, [r6, #64]
 	ldr	r3, [sp]
-	ldr	r0, .L1961+16
+	ldr	r0, .L1923+16
 	ubfx	r2, r2, #16, #5
 	ubfx	r3, r3, #22, #6
 	bl	printf
 	ldr	r3, [sp, #4]
 	movs	r3, #1
 	strb	r3, [r4]
-.L1931:
-	ldr	r3, .L1961+20
+.L1893:
+	ldr	r3, .L1923+20
 	movs	r2, #0
 	str	r2, [r3, #20]
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1932:
+.L1894:
 	ldr	r2, [r6, #64]
 	ldr	r3, [sp]
 	ubfx	r2, r2, #16, #6
 	ubfx	r3, r3, #22, #6
 	cmp	r2, r3
-	bge	.L1931
+	bge	.L1893
 	ldr	r3, [r6]
 	str	r3, [sp, #4]
 	ldr	r3, [sp, #4]
 	lsls	r7, r3, #18
-	bpl	.L1930
+	bpl	.L1892
 	ldr	r3, [sp, #4]
 	lsls	r5, r3, #14
-	bpl	.L1930
+	bpl	.L1892
 	ldr	r1, [sp, #4]
-	ldr	r0, .L1961+24
+	ldr	r0, .L1923+24
 	ubfx	r1, r1, #17, #1
-.L1960:
+.L1922:
 	bl	printf
-	b	.L1931
-.L1927:
+	b	.L1893
+.L1889:
 	ldr	r3, [r6, #8]
 	str	r3, [sp]
 	ldr	r4, [r6, #16]
 	ubfx	r4, r4, #1, #1
-	cbnz	r4, .L1937
-	ldr	r7, .L1961+12
-	ldr	r8, .L1961+32
-.L1938:
+	cbnz	r4, .L1899
+	ldr	r7, .L1923+12
+	ldr	r8, .L1923+32
+.L1900:
 	ldr	r3, [sp]
 	lsls	r3, r3, #11
-	bmi	.L1931
+	bmi	.L1893
 	ldr	r3, [r5]
 	adds	r4, r4, #1
 	ldr	r3, [r3, #8]
 	str	r3, [sp]
 	bics	r3, r4, #-16777216
-	bne	.L1938
+	bne	.L1900
 	ldr	r2, [sp]
 	mov	r1, r4
 	ldr	r3, [r6, #28]
@@ -12450,34 +12181,34 @@ nandc_xfer_done:
 	ldr	r1, [r5]
 	mov	r0, r8
 	bl	rknand_print_hex
-	b	.L1938
-.L1937:
-	ldr	r7, .L1961+16
+	b	.L1900
+.L1899:
+	ldr	r7, .L1923+16
 	mov	r4, r1
-	ldr	r8, .L1961+32
-.L1939:
+	ldr	r8, .L1923+32
+.L1901:
 	ldr	r2, [r6, #28]
 	ldr	r3, [sp]
 	ubfx	r2, r2, #16, #5
 	ubfx	r3, r3, #22, #6
 	cmp	r2, r3
-	bge	.L1931
+	bge	.L1893
 	ldr	r3, [r5]
 	ldr	r3, [r3]
 	str	r3, [sp, #4]
 	ldr	r3, [sp, #4]
 	lsls	r1, r3, #18
-	bpl	.L1940
+	bpl	.L1902
 	ldr	r3, [sp, #4]
 	lsls	r2, r3, #14
-	bpl	.L1940
+	bpl	.L1902
 	ldr	r1, [sp, #4]
-	ldr	r0, .L1961+28
-	b	.L1960
-.L1940:
+	ldr	r0, .L1923+28
+	b	.L1922
+.L1902:
 	adds	r4, r4, #1
 	bics	r3, r4, #-16777216
-	bne	.L1939
+	bne	.L1901
 	ldr	r2, [r6, #28]
 	mov	r1, r4
 	ldr	r3, [sp]
@@ -12490,19 +12221,19 @@ nandc_xfer_done:
 	ldr	r1, [r5]
 	mov	r0, r8
 	bl	rknand_print_hex
-	b	.L1939
-.L1962:
+	b	.L1901
+.L1924:
 	.align	2
-.L1961:
-	.word	.LANCHOR28
-	.word	.LANCHOR167
-	.word	.LANCHOR13
-	.word	.LC109
+.L1923:
+	.word	.LANCHOR27
+	.word	.LANCHOR164
+	.word	.LANCHOR7
+	.word	.LC106
+	.word	.LC105
+	.word	.LANCHOR52
+	.word	.LC104
 	.word	.LC108
-	.word	.LANCHOR53
 	.word	.LC107
-	.word	.LC111
-	.word	.LC110
 	.size	nandc_xfer_done, .-nandc_xfer_done
 	.section	.text.nandc_xfer,"ax",%progbits
 	.align	1
@@ -12528,54 +12259,54 @@ nandc_xfer:
 	mov	r0, r4
 	bl	nandc_xfer_done
 	cmp	r4, #0
-	bne	.L1982
-	ldr	r3, .L2001
+	bne	.L1944
+	ldr	r3, .L1963
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #9
-	bne	.L1965
-	ldr	r3, .L2001+4
+	bne	.L1927
+	ldr	r3, .L1963+4
 	lsrs	r7, r7, #2
 	movs	r2, #1
 	mov	r0, r4
 	ldr	r1, [r3]
 	mov	r8, r3
-.L1966:
+.L1928:
 	cmp	r4, r7
-	bcc	.L1970
+	bcc	.L1932
 	ldr	r4, [r1]
 	cmp	r2, #0
 	it	ne
 	movne	r0, #512
 	and	r3, r4, #139264
 	cmp	r3, #139264
-	bne	.L1972
+	bne	.L1934
 	mov	r1, r4
-	ldr	r0, .L2001+8
+	ldr	r0, .L1963+8
 	bl	printf
 	ldr	r3, [r8]
 	mov	r0, #-1
 	orr	r4, r4, #131072
 	str	r4, [r3]
-.L1972:
+.L1934:
 	lsls	r2, r4, #18
-	bpl	.L1973
-	ldr	r3, .L2001+12
+	bpl	.L1935
+	ldr	r3, .L1963+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1973
+	beq	.L1935
 	mov	r1, r4
-	ldr	r0, .L2001+16
+	ldr	r0, .L1963+16
 	bl	printf
 	ldr	r3, [r8]
 	movs	r2, #1
 	str	r2, [r3, #16]
-.L2000:
+.L1962:
 	mov	r0, #-1
-.L1964:
+.L1926:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1970:
+.L1932:
 	add	r3, r4, #84
 	ldr	r3, [r1, r3, lsl #2]
 	str	r3, [sp, #4]
@@ -12586,10 +12317,10 @@ nandc_xfer:
 	ands	r2, r2, r3
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #29
-	bmi	.L1984
+	bmi	.L1946
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #13
-	bmi	.L1984
+	bmi	.L1946
 	ldr	r3, [sp, #4]
 	ubfx	ip, r3, #3, #7
 	ldr	r3, [sp, #4]
@@ -12602,16 +12333,16 @@ nandc_xfer:
 	cmp	r0, r3
 	it	cc
 	movcc	r0, r3
-.L1967:
+.L1929:
 	adds	r4, r4, #1
-	b	.L1966
-.L1984:
+	b	.L1928
+.L1946:
 	mov	r0, #-1
-	b	.L1967
-.L1965:
-	ldr	r3, .L2001+20
+	b	.L1929
+.L1927:
+	ldr	r3, .L1963+20
 	lsrs	r0, r7, #1
-	ldr	r8, .L2001+28
+	ldr	r8, .L1963+28
 	mov	r1, r4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #25
@@ -12619,33 +12350,33 @@ nandc_xfer:
 	ite	cc
 	movcc	lr, #64
 	movcs	lr, #128
-.L1975:
+.L1937:
 	cmp	r1, r0
 	add	ip, lr, r4
 	add	r3, r3, #4
-	bcc	.L1976
+	bcc	.L1938
 	lsrs	r4, r7, #2
-	ldr	r7, .L2001+4
+	ldr	r7, .L1963+4
 	movs	r2, #0
 	mov	r0, r2
 	ldr	r1, [r7]
-.L1977:
+.L1939:
 	cmp	r2, r4
-	bcc	.L1981
+	bcc	.L1943
 	movs	r3, #0
 	str	r3, [r1, #16]
 	ldr	r4, [r1]
 	and	r3, r4, #139264
 	cmp	r3, #139264
-	bne	.L1973
+	bne	.L1935
 	mov	r1, r4
-	ldr	r0, .L2001+24
+	ldr	r0, .L1963+24
 	bl	printf
 	ldr	r3, [r7]
 	orr	r4, r4, #131072
 	str	r4, [r3]
-	b	.L2000
-.L1976:
+	b	.L1962
+.L1938:
 	ldr	r2, [r8]
 	bic	r4, r4, #3
 	adds	r1, r1, #1
@@ -12658,17 +12389,17 @@ nandc_xfer:
 	strb	r4, [r3, #-2]
 	mov	r4, ip
 	strb	r2, [r3, #-1]
-	b	.L1975
-.L1981:
+	b	.L1937
+.L1943:
 	add	r3, r2, #8
 	ldr	r3, [r1, r3, lsl #2]
 	str	r3, [sp, #4]
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #29
-	bmi	.L1987
+	bmi	.L1949
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #16
-	bmi	.L1987
+	bmi	.L1949
 	ldr	r3, [sp, #4]
 	ubfx	ip, r3, #3, #5
 	ldr	r3, [sp, #4]
@@ -12693,40 +12424,40 @@ nandc_xfer:
 	cmp	r0, r3
 	it	cc
 	movcc	r0, r3
-.L1978:
+.L1940:
 	adds	r2, r2, #1
-	b	.L1977
-.L1987:
+	b	.L1939
+.L1949:
 	mov	r0, #-1
-	b	.L1978
-.L1973:
+	b	.L1940
+.L1935:
 	adds	r3, r0, #1
-	beq	.L1964
+	beq	.L1926
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	bne	.L1964
+	bne	.L1926
 	ldr	r3, [r5, #4]
 	adds	r3, r3, #1
-	bne	.L1964
+	bne	.L1926
 	ldr	r3, [r6]
 	adds	r3, r3, #1
 	it	eq
 	moveq	r0, #512
-	b	.L1964
-.L1982:
+	b	.L1926
+.L1944:
 	movs	r0, #0
-	b	.L1964
-.L2002:
+	b	.L1926
+.L1964:
 	.align	2
-.L2001:
-	.word	.LANCHOR28
-	.word	.LANCHOR13
-	.word	.LC112
-	.word	.LANCHOR167
-	.word	.LC113
-	.word	.LANCHOR50
-	.word	.LC114
-	.word	.LANCHOR53
+.L1963:
+	.word	.LANCHOR27
+	.word	.LANCHOR7
+	.word	.LC109
+	.word	.LANCHOR164
+	.word	.LC110
+	.word	.LANCHOR49
+	.word	.LC111
+	.word	.LANCHOR52
 	.size	nandc_xfer, .-nandc_xfer
 	.section	.text.flash_read_page,"ax",%progbits
 	.align	1
@@ -12741,14 +12472,14 @@ flash_read_page:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r7, r3
-	ldr	r3, .L2018
+	ldr	r3, .L1980
 	mov	r5, r0
 	ubfx	r10, r1, #24, #2
 	lsl	fp, r5, #8
 	str	r2, [sp, #12]
 	ldr	r8, [r3]
-	ldr	r3, .L2018+4
-	ldr	r6, .L2018+8
+	ldr	r3, .L1980+4
+	ldr	r6, .L1980+8
 	ldrb	r4, [r3]	@ zero_extendqisi2
 	rsb	r3, r4, #24
 	movs	r4, #1
@@ -12759,21 +12490,21 @@ flash_read_page:
 	mov	r0, r5
 	bl	nandc_cs
 	cmp	r10, #0
-	bne	.L2004
+	bne	.L1966
 	mov	r0, r5
 	bl	zftl_flash_enter_slc_mode
-.L2005:
+.L1967:
 	ldr	r3, [r6]
 	ldrb	r2, [r3, #7]	@ zero_extendqisi2
 	cmp	r2, #1
-	bne	.L2007
+	bne	.L1969
 	ldrb	r2, [r3, #12]	@ zero_extendqisi2
 	cmp	r2, #2
 	ittt	eq
 	addeq	r2, r8, fp
 	moveq	r1, #38
 	streq	r1, [r2, #2056]
-.L2007:
+.L1969:
 	add	r6, r8, fp
 	movs	r1, #0
 	str	r1, [r6, #2056]
@@ -12785,31 +12516,31 @@ flash_read_page:
 	str	r1, [r6, #2052]
 	lsrs	r1, r4, #16
 	str	r1, [r6, #2052]
-	ldr	r1, .L2018+12
+	ldr	r1, .L1980+12
 	ldrb	r1, [r1]	@ zero_extendqisi2
-	cbz	r1, .L2008
+	cbz	r1, .L1970
 	lsrs	r1, r4, #24
 	str	r1, [r6, #2052]
-.L2008:
+.L1970:
 	add	r1, r8, fp
 	movs	r0, #48
 	str	r0, [r1, #2056]
 	ldrb	r3, [r3, #12]	@ zero_extendqisi2
 	cmp	r3, #3
-	bne	.L2009
+	bne	.L1971
 	cmp	r10, #0
-	beq	.L2009
-	ldr	r3, .L2018+16
+	beq	.L1971
+	ldr	r3, .L1980+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L2009
-	ldr	r3, .L2018+20
+	bne	.L1971
+	ldr	r3, .L1980+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L2009
+	cbnz	r3, .L1971
 	add	r4, r4, r4, lsl #1
 	subs	r0, r4, #1
 	add	r0, r0, r10
-.L2017:
+.L1979:
 	bl	nandc_set_seed
 	bl	nandc_wait_flash_ready
 	add	r3, r8, fp
@@ -12825,40 +12556,40 @@ flash_read_page:
 	ldrb	r2, [sp, #48]	@ zero_extendqisi2
 	str	r7, [sp]
 	bl	nandc_xfer
-	bl	nandc_de_cs.constprop.33
+	bl	nandc_de_cs.constprop.32
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2004:
+.L1966:
 	ldr	r2, [r6]
 	ldrb	r2, [r2, #12]	@ zero_extendqisi2
 	cmp	r2, #3
-	bne	.L2006
-	ldr	r2, .L2018+16
+	bne	.L1968
+	ldr	r2, .L1980+16
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbnz	r2, .L2006
-	ldr	r2, .L2018+20
+	cbnz	r2, .L1968
+	ldr	r2, .L1980+20
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbnz	r2, .L2006
+	cbnz	r2, .L1968
 	add	r2, r8, fp
 	str	r10, [r2, #2056]
-	b	.L2005
-.L2006:
+	b	.L1967
+.L1968:
 	mov	r0, r5
 	bl	zftl_flash_exit_slc_mode
-	b	.L2005
-.L2009:
+	b	.L1967
+.L1971:
 	mov	r0, r4
-	b	.L2017
-.L2019:
+	b	.L1979
+.L1981:
 	.align	2
-.L2018:
-	.word	.LANCHOR13
-	.word	.LANCHOR32
-	.word	.LANCHOR16
+.L1980:
+	.word	.LANCHOR7
 	.word	.LANCHOR31
+	.word	.LANCHOR21
+	.word	.LANCHOR30
+	.word	.LANCHOR35
 	.word	.LANCHOR36
-	.word	.LANCHOR37
 	.size	flash_read_page, .-flash_read_page
 	.section	.text.micron_read_retrial,"ax",%progbits
 	.align	1
@@ -12877,68 +12608,68 @@ micron_read_retrial:
 	mov	r6, r0
 	mov	fp, r1
 	mov	r10, #0
-	ldr	r3, .L2044
+	ldr	r3, .L2006
 	str	r2, [sp, #16]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	str	r3, [sp, #8]
 	bl	nandc_wait_flash_ready
-	mov	r0, r6
-	bl	zftl_flash_enter_slc_mode
-	mov	r0, r6
-	bl	zftl_flash_exit_slc_mode
-	ldr	r3, .L2044+4
+	ldr	r3, .L2006+4
 	ldr	r5, [r3]
 	add	r5, r5, r6, lsl #8
-.L2021:
+.L1983:
+	mov	r0, r6
 	mov	r8, #0
 	mov	r4, #-1
-.L2022:
-	ldr	r3, .L2044+8
+	bl	zftl_flash_enter_slc_mode
+	mov	r0, r6
+	bl	zftl_flash_exit_slc_mode
+.L1984:
+	ldr	r3, .L2006+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r8, r3
-	bcc	.L2027
-.L2026:
+	bcc	.L1989
+.L1988:
 	movs	r3, #239
-	movs	r0, #200
+	movs	r0, #1
 	str	r3, [r5, #2056]
 	movs	r3, #137
 	str	r3, [r5, #2052]
 	movs	r7, #0
-	bl	timer_delay_ns
+	bl	udelay
 	ldr	r3, [sp, #8]
 	str	r7, [r5, #2048]
 	str	r7, [r5, #2048]
 	cmp	r4, r3
 	str	r7, [r5, #2048]
 	str	r7, [r5, #2048]
-	bcc	.L2028
+	bcc	.L1990
 	adds	r1, r4, #1
 	mov	r3, r8
 	it	ne
 	movne	r4, #256
 	mov	r2, fp
 	str	r4, [sp]
-	mov	r1, r8
-	ldr	r0, .L2044+12
+	mov	r1, r6
+	ldr	r0, .L2006+12
 	bl	printf
 	cmp	r10, #0
-	bne	.L2030
+	bne	.L1992
 	adds	r2, r4, #1
-	bne	.L2031
+	bne	.L1993
 	movs	r1, #3
 	mov	r0, r6
 	bl	mt_auto_read_calibration_config
 	mov	r10, #1
-	b	.L2021
-.L2027:
+	b	.L1983
+.L1989:
 	movs	r3, #239
-	movs	r0, #200
+	movs	r0, #1
 	str	r3, [r5, #2056]
 	movs	r3, #137
 	str	r3, [r5, #2052]
-	bl	timer_delay_ns
+	bl	udelay
 	add	r3, r8, #1
 	ldr	r2, [sp, #16]
 	str	r3, [r5, #2048]
@@ -12953,70 +12684,70 @@ micron_read_retrial:
 	str	r3, [sp]
 	ldr	r3, [sp, #20]
 	bl	flash_read_page
-	ldr	r3, .L2044+16
+	ldr	r3, .L2006+16
 	mov	r7, r0
 	ldr	r3, [r3]
 	lsls	r3, r3, #19
-	bpl	.L2023
+	bpl	.L1985
 	str	r0, [sp]
 	mov	r3, r4
 	mov	r2, fp
 	mov	r1, r8
-	ldr	r0, .L2044+20
+	ldr	r0, .L2006+20
 	bl	printf
-.L2023:
+.L1985:
 	adds	r0, r7, #1
-	beq	.L2024
-	ldr	r3, .L2044+24
+	beq	.L1986
+	ldr	r3, .L2006+24
 	cmp	r4, #-1
 	it	eq
 	moveq	r4, r7
 	ldr	r3, [r3]
 	str	r3, [sp, #16]
-	ldr	r3, .L2044+28
+	ldr	r3, .L2006+28
 	ldr	r3, [r3]
 	str	r3, [sp, #20]
 	ldr	r3, [sp, #8]
 	cmp	r7, r3
-	bcc	.L2033
-.L2024:
+	bcc	.L1995
+.L1986:
 	ldr	r8, [sp, #12]
-	b	.L2022
-.L2033:
+	b	.L1984
+.L1995:
 	mov	r4, r7
-	b	.L2026
-.L2030:
+	b	.L1988
+.L1992:
 	mov	r1, r7
 	mov	r0, r6
 	bl	mt_auto_read_calibration_config
 	adds	r3, r4, #1
 	it	ne
 	movne	r4, #256
-.L2031:
+.L1993:
 	bl	nandc_wait_flash_ready
 	mov	r0, r4
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2028:
+.L1990:
 	cmp	r10, #0
-	beq	.L2031
+	beq	.L1993
 	mov	r1, r7
 	mov	r0, r6
 	bl	mt_auto_read_calibration_config
 	mov	r4, #256
-	b	.L2031
-.L2045:
+	b	.L1993
+.L2007:
 	.align	2
-.L2044:
-	.word	.LANCHOR50
-	.word	.LANCHOR13
-	.word	.LANCHOR169
-	.word	.LC116
-	.word	.LANCHOR14
-	.word	.LC115
+.L2006:
+	.word	.LANCHOR49
+	.word	.LANCHOR7
 	.word	.LANCHOR166
-	.word	.LANCHOR168
+	.word	.LC113
+	.word	.LANCHOR19
+	.word	.LC112
+	.word	.LANCHOR163
+	.word	.LANCHOR165
 	.size	micron_read_retrial, .-micron_read_retrial
 	.section	.text.toshiba_3d_read_retrial,"ax",%progbits
 	.align	1
@@ -13038,9 +12769,9 @@ toshiba_3d_read_retrial:
 	str	r3, [sp, #12]
 	add	r6, r7, #8
 	bl	nandc_wait_flash_ready
-	ldr	r3, .L2089
+	ldr	r3, .L2051
 	ldr	fp, [r3]
-	ldr	r3, .L2089+4
+	ldr	r3, .L2051+4
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	add	r6, fp, r6, lsl #8
 	cmp	r2, #36
@@ -13053,15 +12784,15 @@ toshiba_3d_read_retrial:
 	moveq	r2, #26
 	str	r2, [sp, #16]
 	cmp	r4, #0
-	bne	.L2048
+	bne	.L2010
 	mov	r4, #-1
 	movs	r5, #1
 	str	r3, [sp, #20]
-.L2055:
+.L2017:
 	ldr	r3, [sp, #20]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #36
-	bne	.L2049
+	bne	.L2011
 	movs	r2, #0
 	mov	r1, r5
 	mov	r0, r6
@@ -13069,7 +12800,7 @@ toshiba_3d_read_retrial:
 	add	r3, fp, r7, lsl #8
 	movs	r2, #93
 	str	r2, [r3, #2056]
-.L2050:
+.L2012:
 	ldr	r3, [sp, #56]
 	mov	r1, r8
 	ldr	r2, [sp, #8]
@@ -13077,111 +12808,111 @@ toshiba_3d_read_retrial:
 	str	r3, [sp]
 	ldr	r3, [sp, #12]
 	bl	flash_read_page
-	ldr	r3, .L2089+8
+	ldr	r3, .L2051+8
 	mov	r10, r0
 	ldr	r3, [r3]
 	lsls	r1, r3, #27
-	bpl	.L2051
+	bpl	.L2013
 	mov	r3, r0
 	mov	r2, r8
 	mov	r1, r5
-	ldr	r0, .L2089+12
+	ldr	r0, .L2051+12
 	bl	printf
-.L2051:
+.L2013:
 	cmp	r10, #-1
-	beq	.L2052
-	ldr	r3, .L2089+16
+	beq	.L2014
+	ldr	r3, .L2051+16
 	cmp	r4, #-1
 	it	eq
 	moveq	r4, r10
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
-	ldr	r3, .L2089+20
+	ldr	r3, .L2051+20
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L2089+24
+	ldr	r3, .L2051+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r10, r3, asr #2
-	bcc	.L2070
-.L2052:
+	bcc	.L2032
+.L2014:
 	ldr	r3, [sp, #16]
 	adds	r5, r5, #1
 	cmp	r3, r5
-	bne	.L2055
-.L2054:
-	ldr	r3, .L2089+4
+	bne	.L2017
+.L2016:
+	ldr	r3, .L2051+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #36
-	bne	.L2056
+	bne	.L2018
 	movs	r2, #0
-.L2088:
+.L2050:
 	movs	r1, #0
 	mov	r0, r6
 	bl	toshiba_tlc_set_rr_para
-	b	.L2057
-.L2049:
+	b	.L2019
+.L2011:
 	uxtb	r1, r5
 	mov	r0, r6
 	bl	toshiba_3d_set_slc_rr_para
-	b	.L2050
-.L2070:
+	b	.L2012
+.L2032:
 	mov	r4, r10
-	b	.L2054
-.L2056:
+	b	.L2016
+.L2018:
 	movs	r1, #0
 	mov	r0, r6
 	bl	toshiba_3d_set_slc_rr_para
-.L2057:
-	ldr	r3, .L2089+4
+.L2019:
+	ldr	r3, .L2051+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #36
-	bne	.L2066
-	add	r7, fp, r7, lsl #8
-	movs	r3, #85
-	str	r3, [r7, #2056]
-	movs	r3, #0
-	str	r3, [r7, #2052]
-	str	r3, [r7, #2048]
-	movs	r3, #255
-	str	r3, [r7, #2056]
-.L2066:
-	ldr	r3, .L2089+24
+	bne	.L2028
+	add	r3, fp, r7, lsl #8
+	movs	r2, #85
+	str	r2, [r3, #2056]
+	movs	r2, #0
+	str	r2, [r3, #2052]
+	str	r2, [r3, #2048]
+	movs	r2, #255
+	str	r2, [r3, #2056]
+.L2028:
+	ldr	r3, .L2051+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, asr #2
-	bcc	.L2067
+	bcc	.L2029
 	adds	r3, r4, #1
 	mov	r2, r8
 	it	ne
 	movne	r4, #256
 	mov	r3, r5
 	str	r4, [sp]
-	mov	r1, r5
-	ldr	r0, .L2089+28
+	mov	r1, r7
+	ldr	r0, .L2051+28
 	bl	printf
-.L2067:
+.L2029:
 	bl	nandc_wait_flash_ready
 	mov	r0, r4
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2048:
+.L2010:
 	mov	r4, #-1
 	movs	r5, #1
 	str	r3, [sp, #16]
-.L2064:
+.L2026:
 	ldr	r3, [sp, #16]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #36
-	bne	.L2058
+	bne	.L2020
 	movs	r2, #1
 	mov	r1, r5
 	mov	r0, r6
 	bl	toshiba_tlc_set_rr_para
 	add	r3, fp, r7, lsl #8
 	movs	r2, #93
-.L2087:
+.L2049:
 	str	r2, [r3, #2056]
 	mov	r1, r8
 	ldr	r3, [sp, #56]
@@ -13190,72 +12921,72 @@ toshiba_3d_read_retrial:
 	str	r3, [sp]
 	ldr	r3, [sp, #12]
 	bl	flash_read_page
-	ldr	r3, .L2089+8
+	ldr	r3, .L2051+8
 	mov	r10, r0
 	ldr	r3, [r3]
 	lsls	r2, r3, #27
-	bpl	.L2060
+	bpl	.L2022
 	mov	r3, r0
 	mov	r2, r8
 	mov	r1, r5
-	ldr	r0, .L2089+32
+	ldr	r0, .L2051+32
 	bl	printf
-.L2060:
+.L2022:
 	cmp	r10, #-1
-	beq	.L2061
-	ldr	r3, .L2089+16
+	beq	.L2023
+	ldr	r3, .L2051+16
 	cmp	r4, #-1
 	it	eq
 	moveq	r4, r10
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
-	ldr	r3, .L2089+20
+	ldr	r3, .L2051+20
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L2089+24
+	ldr	r3, .L2051+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r10, r3, asr #2
-	bcc	.L2071
-.L2061:
+	bcc	.L2033
+.L2023:
 	ldr	r3, [sp, #20]
 	adds	r5, r5, #1
 	cmp	r3, r5
-	bne	.L2064
-.L2063:
-	ldr	r3, .L2089+4
+	bne	.L2026
+.L2025:
+	ldr	r3, .L2051+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #36
-	bne	.L2065
+	bne	.L2027
 	movs	r2, #1
-	b	.L2088
-.L2058:
+	b	.L2050
+.L2020:
 	uxtb	r1, r5
 	mov	r0, r6
 	bl	toshiba_3d_set_tlc_rr_para
 	add	r3, fp, r7, lsl #8
 	movs	r2, #38
-	b	.L2087
-.L2071:
+	b	.L2049
+.L2033:
 	mov	r4, r10
-	b	.L2063
-.L2065:
+	b	.L2025
+.L2027:
 	movs	r1, #0
 	mov	r0, r6
 	bl	toshiba_3d_set_tlc_rr_para
-	b	.L2057
-.L2090:
+	b	.L2019
+.L2052:
 	.align	2
-.L2089:
-	.word	.LANCHOR13
-	.word	.LANCHOR23
-	.word	.LANCHOR14
-	.word	.LC117
-	.word	.LANCHOR166
-	.word	.LANCHOR168
-	.word	.LANCHOR50
-	.word	.LC119
-	.word	.LC118
+.L2051:
+	.word	.LANCHOR7
+	.word	.LANCHOR15
+	.word	.LANCHOR19
+	.word	.LC114
+	.word	.LANCHOR163
+	.word	.LANCHOR165
+	.word	.LANCHOR49
+	.word	.LC116
+	.word	.LC115
 	.size	toshiba_3d_read_retrial, .-toshiba_3d_read_retrial
 	.section	.text.toshiba_read_retrial,"ax",%progbits
 	.align	1
@@ -13280,55 +13011,55 @@ toshiba_read_retrial:
 	bl	zftl_flash_enter_slc_mode
 	mov	r0, r5
 	bl	zftl_flash_exit_slc_mode
-	ldr	r3, .L2118
-	ldr	r2, .L2118+4
+	ldr	r3, .L2080
+	ldr	r2, .L2080+4
 	ldr	r7, [r3]
 	ldrb	r3, [r2]	@ zero_extendqisi2
 	str	r2, [sp, #20]
 	subs	r3, r3, #67
 	add	r10, r7, r10, lsl #8
 	cmp	r3, #1
-	bls	.L2109
-	ldr	r3, .L2118+8
+	bls	.L2071
+	ldr	r3, .L2080+8
 	ldrb	r6, [r3]	@ zero_extendqisi2
-	cbz	r6, .L2093
+	cbz	r6, .L2055
 	movs	r6, #1
 	movs	r0, #1
 	bl	nandc_set_if_mode
-.L2093:
+.L2055:
 	add	r3, r7, r5, lsl #8
 	movs	r2, #92
 	str	r2, [r3, #2056]
 	movs	r2, #197
 	str	r2, [r3, #2056]
-.L2092:
+.L2054:
 	mov	r8, #1
 	mov	fp, #-1
-.L2094:
-	ldr	r3, .L2118+12
+.L2056:
+	ldr	r3, .L2080+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	cmp	r8, r3
-	bcc	.L2103
+	bcc	.L2065
 	mov	r4, fp
-.L2102:
-	ldr	r3, .L2118+4
+.L2064:
+	ldr	r3, .L2080+4
 	movs	r1, #0
 	mov	r0, r10
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	subs	r3, r3, #67
 	cmp	r3, #1
-	bhi	.L2104
+	bhi	.L2066
 	bl	sandisk_set_rr_para
-.L2105:
+.L2067:
 	add	r5, r7, r5, lsl #8
 	movs	r3, #255
 	str	r3, [r5, #2056]
-	ldr	r3, .L2118+16
+	ldr	r3, .L2080+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, asr #2
-	bcc	.L2106
+	bcc	.L2068
 	adds	r3, r4, #1
 	ldr	r2, [sp, #8]
 	it	ne
@@ -13336,36 +13067,36 @@ toshiba_read_retrial:
 	mov	r3, r8
 	str	r4, [sp]
 	mov	r1, r8
-	ldr	r0, .L2118+20
+	ldr	r0, .L2080+20
 	bl	printf
-.L2106:
+.L2068:
 	bl	nandc_wait_flash_ready
-	cbz	r6, .L2091
+	cbz	r6, .L2053
 	movs	r0, #4
 	bl	nandc_set_if_mode
-.L2091:
+.L2053:
 	mov	r0, r4
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2109:
+.L2071:
 	movs	r6, #0
-	b	.L2092
-.L2103:
+	b	.L2054
+.L2065:
 	ldr	r3, [sp, #20]
 	mov	r0, r10
 	uxtb	r1, r8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	subs	r3, r3, #67
 	cmp	r3, #1
-	bhi	.L2095
+	bhi	.L2057
 	bl	sandisk_set_rr_para
-.L2096:
-	ldr	r3, .L2118+4
+.L2058:
+	ldr	r3, .L2080+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #34
-	bne	.L2097
-	ldr	r3, .L2118+12
+	bne	.L2059
+	ldr	r3, .L2080+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	subs	r3, r3, #3
 	cmp	r8, r3
@@ -13373,7 +13104,7 @@ toshiba_read_retrial:
 	addeq	r3, r7, r5, lsl #8
 	moveq	r2, #179
 	streq	r2, [r3, #2056]
-.L2097:
+.L2059:
 	add	r3, r7, r5, lsl #8
 	movs	r2, #38
 	add	r1, sp, #8
@@ -13387,41 +13118,41 @@ toshiba_read_retrial:
 	bl	flash_read_page
 	adds	r2, r0, #1
 	mov	r4, r0
-	beq	.L2100
-	ldr	r3, .L2118+24
+	beq	.L2062
+	ldr	r3, .L2080+24
 	cmp	fp, #-1
 	it	eq
 	moveq	fp, r0
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L2118+28
+	ldr	r3, .L2080+28
 	ldr	r3, [r3]
 	str	r3, [sp, #16]
-	ldr	r3, .L2118+16
+	ldr	r3, .L2080+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r0, r3, asr #2
-	bcc	.L2102
-.L2100:
+	bcc	.L2064
+.L2062:
 	add	r8, r8, #1
-	b	.L2094
-.L2095:
+	b	.L2056
+.L2057:
 	bl	toshiba_set_rr_para
-	b	.L2096
-.L2104:
+	b	.L2058
+.L2066:
 	bl	toshiba_set_rr_para
-	b	.L2105
-.L2119:
+	b	.L2067
+.L2081:
 	.align	2
-.L2118:
-	.word	.LANCHOR13
-	.word	.LANCHOR23
-	.word	.LANCHOR21
-	.word	.LANCHOR169
-	.word	.LANCHOR50
-	.word	.LC119
+.L2080:
+	.word	.LANCHOR7
+	.word	.LANCHOR15
+	.word	.LANCHOR26
 	.word	.LANCHOR166
-	.word	.LANCHOR168
+	.word	.LANCHOR49
+	.word	.LC116
+	.word	.LANCHOR163
+	.word	.LANCHOR165
 	.size	toshiba_read_retrial, .-toshiba_read_retrial
 	.section	.text.ymtc_3d_read_retrial,"ax",%progbits
 	.align	1
@@ -13446,13 +13177,13 @@ ymtc_3d_read_retrial:
 	bl	zftl_flash_enter_slc_mode
 	mov	r0, r7
 	bl	zftl_flash_exit_slc_mode
-	ldr	r2, .L2144
+	ldr	r2, .L2106
 	tst	r8, #50331648
 	add	r3, r7, #8
 	ldr	r6, [r2]
 	add	r6, r6, r3, lsl #8
-	bne	.L2130
-.L2125:
+	bne	.L2092
+.L2087:
 	uxtb	r1, r5
 	mov	r0, r6
 	bl	ymtc_3d_set_slc_rr_para
@@ -13464,33 +13195,33 @@ ymtc_3d_read_retrial:
 	mov	r3, fp
 	bl	flash_read_page
 	adds	r1, r0, #1
-	beq	.L2122
-	ldr	r3, .L2144+4
+	beq	.L2084
+	ldr	r3, .L2106+4
 	cmp	r4, #-1
 	it	eq
 	moveq	r4, r0
 	ldr	r10, [r3]
-	ldr	r3, .L2144+8
+	ldr	r3, .L2106+8
 	ldr	fp, [r3]
-	ldr	r3, .L2144+12
+	ldr	r3, .L2106+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r0, r3, asr #2
-	bcc	.L2133
-.L2122:
+	bcc	.L2095
+.L2084:
 	adds	r5, r5, #1
 	cmp	r5, #10
-	bne	.L2125
-.L2124:
+	bne	.L2087
+.L2086:
 	movs	r1, #0
 	mov	r0, r6
 	bl	ymtc_3d_set_slc_rr_para
-.L2126:
-	ldr	r3, .L2144+12
+.L2088:
+	ldr	r3, .L2106+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, asr #2
-	bcc	.L2131
+	bcc	.L2093
 	adds	r3, r4, #1
 	mov	r2, r8
 	it	ne
@@ -13498,18 +13229,18 @@ ymtc_3d_read_retrial:
 	mov	r3, r5
 	str	r4, [sp]
 	mov	r1, r5
-	ldr	r0, .L2144+16
+	ldr	r0, .L2106+16
 	bl	printf
-.L2131:
+.L2093:
 	bl	nandc_wait_flash_ready
 	mov	r0, r4
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2133:
+.L2095:
 	mov	r4, r0
-	b	.L2124
-.L2130:
+	b	.L2086
+.L2092:
 	uxtb	r1, r5
 	mov	r0, r6
 	bl	ymtc_3d_set_tlc_rr_para
@@ -13521,39 +13252,39 @@ ymtc_3d_read_retrial:
 	mov	r3, fp
 	bl	flash_read_page
 	adds	r2, r0, #1
-	beq	.L2127
-	ldr	r3, .L2144+4
+	beq	.L2089
+	ldr	r3, .L2106+4
 	cmp	r4, #-1
 	it	eq
 	moveq	r4, r0
 	ldr	r10, [r3]
-	ldr	r3, .L2144+8
+	ldr	r3, .L2106+8
 	ldr	fp, [r3]
-	ldr	r3, .L2144+12
+	ldr	r3, .L2106+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r0, r3, asr #2
-	bcc	.L2134
-.L2127:
+	bcc	.L2096
+.L2089:
 	adds	r5, r5, #1
 	cmp	r5, #51
-	bne	.L2130
-.L2129:
+	bne	.L2092
+.L2091:
 	movs	r1, #0
 	mov	r0, r6
 	bl	ymtc_3d_set_tlc_rr_para
-	b	.L2126
-.L2134:
+	b	.L2088
+.L2096:
 	mov	r4, r0
-	b	.L2129
-.L2145:
+	b	.L2091
+.L2107:
 	.align	2
-.L2144:
-	.word	.LANCHOR13
-	.word	.LANCHOR166
-	.word	.LANCHOR168
-	.word	.LANCHOR50
-	.word	.LC120
+.L2106:
+	.word	.LANCHOR7
+	.word	.LANCHOR163
+	.word	.LANCHOR165
+	.word	.LANCHOR49
+	.word	.LC117
 	.size	ymtc_3d_read_retrial, .-ymtc_3d_read_retrial
 	.section	.text.samsung_read_retrial,"ax",%progbits
 	.align	1
@@ -13577,21 +13308,21 @@ samsung_read_retrial:
 	bl	zftl_flash_enter_slc_mode
 	mov	r0, r7
 	bl	zftl_flash_exit_slc_mode
-	ldr	r3, .L2179
+	ldr	r3, .L2141
 	tst	r8, #50331648
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
-	bne	.L2147
+	bne	.L2109
 	lsl	fp, r7, #8
 	mov	r4, #-1
 	movs	r5, #1
 	add	r6, r3, fp
-.L2152:
+.L2114:
 	movs	r3, #239
 	str	r3, [r6, #2056]
 	movs	r3, #141
 	str	r3, [r6, #2052]
-	ldr	r3, .L2179+4
+	ldr	r3, .L2141+4
 	ldrsb	r3, [r5, r3]
 	str	r3, [r6, #2048]
 	movs	r3, #0
@@ -13606,45 +13337,45 @@ samsung_read_retrial:
 	str	r3, [sp]
 	ldr	r3, [sp, #16]
 	bl	flash_read_page
-	ldr	r3, .L2179+8
+	ldr	r3, .L2141+8
 	mov	r10, r0
 	ldr	r3, [r3]
 	lsls	r1, r3, #27
-	bpl	.L2148
+	bpl	.L2110
 	mov	r3, r0
 	mov	r2, r8
 	mov	r1, r5
-	ldr	r0, .L2179+12
+	ldr	r0, .L2141+12
 	bl	printf
-.L2148:
+.L2110:
 	cmp	r10, #-1
-	beq	.L2149
-	ldr	r3, .L2179+16
+	beq	.L2111
+	ldr	r3, .L2141+16
 	cmp	r4, #-1
 	it	eq
 	moveq	r4, r10
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L2179+20
+	ldr	r3, .L2141+20
 	ldr	r3, [r3]
 	str	r3, [sp, #16]
-	ldr	r3, .L2179+24
+	ldr	r3, .L2141+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r10, r3, asr #2
-	bcc	.L2161
-.L2149:
+	bcc	.L2123
+.L2111:
 	adds	r5, r5, #1
 	cmp	r5, #26
-	bne	.L2152
-.L2151:
+	bne	.L2114
+.L2113:
 	ldr	r3, [sp, #8]
 	add	r3, r3, fp
 	mov	fp, r3
 	movs	r3, #239
 	str	r3, [fp, #2056]
 	movs	r3, #141
-.L2178:
+.L2140:
 	str	r3, [r6, #2052]
 	movs	r3, #0
 	str	r3, [r6, #2048]
@@ -13652,11 +13383,11 @@ samsung_read_retrial:
 	str	r3, [r6, #2048]
 	str	r3, [r6, #2048]
 	bl	nandc_wait_flash_ready
-	ldr	r3, .L2179+24
+	ldr	r3, .L2141+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, asr #2
-	bcc	.L2159
+	bcc	.L2121
 	adds	r3, r4, #1
 	mov	r2, r8
 	it	ne
@@ -13664,26 +13395,26 @@ samsung_read_retrial:
 	mov	r3, r5
 	str	r4, [sp]
 	mov	r1, r5
-	ldr	r0, .L2179+28
+	ldr	r0, .L2141+28
 	bl	printf
-.L2159:
+.L2121:
 	bl	nandc_wait_flash_ready
 	mov	r0, r4
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2161:
+.L2123:
 	mov	r4, r10
-	b	.L2151
-.L2147:
+	b	.L2113
+.L2109:
 	ldr	r3, [sp, #8]
 	mov	r4, #-1
-	ldr	r10, .L2179+36
+	ldr	r10, .L2141+36
 	movs	r5, #1
 	add	r6, r3, r7, lsl #8
 	addw	r3, r6, #2056
 	str	r3, [sp, #20]
-.L2158:
+.L2120:
 	ldr	r3, [sp, #20]
 	mov	r2, r3
 	movs	r3, #239
@@ -13706,61 +13437,61 @@ samsung_read_retrial:
 	str	r3, [sp]
 	ldr	r3, [sp, #16]
 	bl	flash_read_page
-	ldr	r3, .L2179+8
+	ldr	r3, .L2141+8
 	mov	fp, r0
 	ldr	r3, [r3]
 	lsls	r2, r3, #27
-	bpl	.L2154
+	bpl	.L2116
 	mov	r3, r0
 	mov	r2, r8
 	mov	r1, r5
-	ldr	r0, .L2179+32
+	ldr	r0, .L2141+32
 	bl	printf
-.L2154:
+.L2116:
 	cmp	fp, #-1
-	beq	.L2155
-	ldr	r3, .L2179+16
+	beq	.L2117
+	ldr	r3, .L2141+16
 	cmp	r4, #-1
 	it	eq
 	moveq	r4, fp
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L2179+20
+	ldr	r3, .L2141+20
 	ldr	r3, [r3]
 	str	r3, [sp, #16]
-	ldr	r3, .L2179+24
+	ldr	r3, .L2141+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	fp, r3, asr #2
-	bcc	.L2162
-.L2155:
+	bcc	.L2124
+.L2117:
 	adds	r5, r5, #1
 	add	r10, r10, #4
 	cmp	r5, #26
-	bne	.L2158
-.L2157:
+	bne	.L2120
+.L2119:
 	ldr	r3, [sp, #8]
 	add	r7, r3, r7, lsl #8
 	movs	r3, #239
 	str	r3, [r7, #2056]
 	movs	r3, #137
-	b	.L2178
-.L2162:
+	b	.L2140
+.L2124:
 	mov	r4, fp
-	b	.L2157
-.L2180:
+	b	.L2119
+.L2142:
 	.align	2
-.L2179:
-	.word	.LANCHOR13
-	.word	.LANCHOR170
-	.word	.LANCHOR14
-	.word	.LC121
-	.word	.LANCHOR166
+.L2141:
+	.word	.LANCHOR7
+	.word	.LANCHOR167
+	.word	.LANCHOR19
+	.word	.LC118
+	.word	.LANCHOR163
+	.word	.LANCHOR165
+	.word	.LANCHOR49
+	.word	.LC120
+	.word	.LC119
 	.word	.LANCHOR168
-	.word	.LANCHOR50
-	.word	.LC123
-	.word	.LC122
-	.word	.LANCHOR171
 	.size	samsung_read_retrial, .-samsung_read_retrial
 	.section	.text.hynix_read_retrial,"ax",%progbits
 	.align	1
@@ -13779,7 +13510,7 @@ hynix_read_retrial:
 	mov	r8, r1
 	movs	r7, #0
 	mov	r4, #-1
-	ldr	r3, .L2195
+	ldr	r3, .L2157
 	str	r2, [sp, #8]
 	ldr	r3, [r3]
 	add	r10, r3, r0
@@ -13790,16 +13521,16 @@ hynix_read_retrial:
 	bl	zftl_flash_enter_slc_mode
 	mov	r0, r6
 	bl	zftl_flash_exit_slc_mode
-.L2182:
+.L2144:
 	cmp	r7, fp
-	bcc	.L2187
-.L2186:
-	ldr	r3, .L2195+4
+	bcc	.L2149
+.L2148:
+	ldr	r3, .L2157+4
 	strb	r5, [r10, #120]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, asr #2
-	bcc	.L2188
+	bcc	.L2150
 	adds	r3, r4, #1
 	mov	r2, r8
 	it	ne
@@ -13807,15 +13538,15 @@ hynix_read_retrial:
 	mov	r3, r7
 	str	r4, [sp]
 	mov	r1, r7
-	ldr	r0, .L2195+8
+	ldr	r0, .L2157+8
 	bl	printf
-.L2188:
+.L2150:
 	bl	nandc_wait_flash_ready
 	mov	r0, r4
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2187:
+.L2149:
 	adds	r5, r5, #1
 	mov	r0, r6
 	uxtb	r5, r5
@@ -13832,35 +13563,35 @@ hynix_read_retrial:
 	ldr	r3, [sp, #12]
 	bl	flash_read_page
 	adds	r2, r0, #1
-	beq	.L2184
-	ldr	r3, .L2195+12
+	beq	.L2146
+	ldr	r3, .L2157+12
 	cmp	r4, #-1
 	it	eq
 	moveq	r4, r0
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
-	ldr	r3, .L2195+16
+	ldr	r3, .L2157+16
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L2195+4
+	ldr	r3, .L2157+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r0, r3, asr #2
-	bcc	.L2190
-.L2184:
+	bcc	.L2152
+.L2146:
 	adds	r7, r7, #1
-	b	.L2182
-.L2190:
+	b	.L2144
+.L2152:
 	mov	r4, r0
-	b	.L2186
-.L2196:
+	b	.L2148
+.L2158:
 	.align	2
-.L2195:
-	.word	.LANCHOR27
-	.word	.LANCHOR50
-	.word	.LC124
-	.word	.LANCHOR166
-	.word	.LANCHOR168
+.L2157:
+	.word	.LANCHOR6
+	.word	.LANCHOR49
+	.word	.LC121
+	.word	.LANCHOR163
+	.word	.LANCHOR165
 	.size	hynix_read_retrial, .-hynix_read_retrial
 	.section	.text.flash_ddr_tuning_read,"ax",%progbits
 	.align	1
@@ -13889,7 +13620,7 @@ flash_ddr_tuning_read:
 	str	r4, [sp, #24]
 	str	r4, [sp, #12]
 	str	r3, [sp, #8]
-.L2203:
+.L2165:
 	uxtb	r0, r7
 	bl	nandc_set_ddr_para
 	ldr	r3, [sp, #64]
@@ -13899,69 +13630,69 @@ flash_ddr_tuning_read:
 	str	r3, [sp]
 	ldr	r3, [sp, #20]
 	bl	flash_read_page
-	ldr	r3, .L2223
+	ldr	r3, .L2185
 	mov	r10, r0
 	ldr	r3, [r3]
 	lsls	r2, r3, #27
-	bpl	.L2198
+	bpl	.L2160
 	mov	r3, r0
 	mov	r2, fp
 	mov	r1, r7
-	ldr	r0, .L2223+4
+	ldr	r0, .L2185+4
 	bl	printf
-.L2198:
+.L2160:
 	adds	r3, r6, #1
 	cmp	r10, r3
-	bhi	.L2199
-	ldr	r3, .L2223+8
+	bhi	.L2161
+	ldr	r3, .L2185+8
 	ldr	r3, [r3]
 	str	r3, [sp, #16]
-	ldr	r3, .L2223+12
+	ldr	r3, .L2185+12
 	ldr	r3, [r3]
 	str	r3, [sp, #20]
-	ldr	r3, .L2223+16
+	ldr	r3, .L2185+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r10, r3, lsr #2
-	bcs	.L2209
+	bcs	.L2171
 	adds	r5, r5, #1
 	cmp	r5, #7
-	bls	.L2209
+	bls	.L2171
 	subs	r4, r7, r5
 	mov	r6, r10
 	movs	r3, #0
 	str	r3, [sp, #8]
-.L2201:
+.L2163:
 	ldr	r3, [sp, #24]
 	ldr	r2, [sp, #12]
 	cmp	r5, r2
 	it	cc
 	movcc	r4, r3
-.L2202:
+.L2164:
 	cmp	r4, #0
-	beq	.L2204
-	ldr	r3, .L2223+16
+	beq	.L2166
+	ldr	r3, .L2185+16
 	ldrb	r2, [r3]	@ zero_extendqisi2
-	ldr	r3, .L2223+20
+	ldr	r3, .L2185+20
 	umull	r2, r3, r2, r3
 	ubfx	r3, r3, #1, #8
 	cmp	r3, r6
-	bls	.L2204
+	bls	.L2166
 	mov	r1, r4
-	ldr	r0, .L2223+24
+	ldr	r0, .L2185+24
 	bl	printf
 	uxtb	r0, r4
-.L2222:
+.L2184:
 	bl	nandc_set_ddr_para
 	ldr	r3, [sp, #8]
 	cmp	r3, #0
-	beq	.L2197
-	ldr	r4, .L2223+28
+	beq	.L2159
+	ldr	r4, .L2185+28
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	lsls	r3, r3, #31
-	bpl	.L2197
+	bpl	.L2159
 	mov	r1, r8
 	mov	r2, fp
-	ldr	r0, .L2223+32
+	ldr	r0, .L2185+32
 	bl	printf
 	mov	r0, r8
 	bl	flash_reset
@@ -13969,7 +13700,7 @@ flash_ddr_tuning_read:
 	bl	flash_set_interface_mode
 	movs	r0, #1
 	bl	nandc_set_if_mode
-	ldr	r3, .L2223+36
+	ldr	r3, .L2185+36
 	movs	r2, #2
 	mov	r0, r8
 	strb	r2, [r3, r8]
@@ -13985,75 +13716,75 @@ flash_ddr_tuning_read:
 	mov	r3, r0
 	mov	r6, r0
 	mov	r1, r8
-	ldr	r0, .L2223+40
+	ldr	r0, .L2185+40
 	bl	printf
-	ldr	r3, .L2223+16
+	ldr	r3, .L2185+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r6, r3
-	bhi	.L2211
-	ldr	r2, .L2223+44
+	bhi	.L2173
+	ldr	r2, .L2185+44
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	cmp	r3, #100
 	str	r3, [r2]
-	bls	.L2207
-	ldr	r3, .L2223+48
+	bls	.L2169
+	ldr	r3, .L2185+48
 	movs	r2, #0
 	strb	r2, [r3]
-.L2197:
+.L2159:
 	mov	r0, r6
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2199:
+.L2161:
 	ldr	r3, [sp, #12]
 	cmp	r5, r3
-	bls	.L2210
+	bls	.L2172
 	cmp	r5, #7
 	sub	r3, r4, r5
 	str	r3, [sp, #24]
-	bhi	.L2202
+	bhi	.L2164
 	str	r5, [sp, #12]
-.L2210:
+.L2172:
 	movs	r5, #0
-	b	.L2200
-.L2209:
+	b	.L2162
+.L2171:
 	mov	r4, r7
 	mov	r6, r10
 	movs	r3, #0
 	str	r3, [sp, #8]
-.L2200:
+.L2162:
 	adds	r7, r7, #2
 	cmp	r7, #50
-	bne	.L2203
-	b	.L2201
-.L2204:
+	bne	.L2165
+	b	.L2163
+.L2166:
 	ldrb	r0, [sp, #28]	@ zero_extendqisi2
-	b	.L2222
-.L2211:
+	b	.L2184
+.L2173:
 	ldr	r6, [sp, #8]
-.L2207:
+.L2169:
 	ldrb	r0, [r4]	@ zero_extendqisi2
 	bl	flash_set_interface_mode
 	ldrb	r0, [r4]	@ zero_extendqisi2
 	bl	nandc_set_if_mode
-	b	.L2197
-.L2224:
+	b	.L2159
+.L2186:
 	.align	2
-.L2223:
-	.word	.LANCHOR14
-	.word	.LC125
-	.word	.LANCHOR166
-	.word	.LANCHOR168
-	.word	.LANCHOR50
-	.word	-1431655765
-	.word	.LC126
+.L2185:
+	.word	.LANCHOR19
+	.word	.LC122
+	.word	.LANCHOR163
+	.word	.LANCHOR165
 	.word	.LANCHOR49
-	.word	.LC127
-	.word	.LANCHOR34
-	.word	.LC128
-	.word	.LANCHOR172
-	.word	.LANCHOR21
+	.word	-1431655765
+	.word	.LC123
+	.word	.LANCHOR48
+	.word	.LC124
+	.word	.LANCHOR33
+	.word	.LC125
+	.word	.LANCHOR169
+	.word	.LANCHOR26
 	.size	flash_ddr_tuning_read, .-flash_ddr_tuning_read
 	.section	.text.flash_read_page_en,"ax",%progbits
 	.align	1
@@ -14068,7 +13799,7 @@ flash_read_page_en:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r8, r3
-	ldr	r3, .L2252
+	ldr	r3, .L2214
 	mov	r7, r2
 	mov	r5, r0
 	mov	r4, r1
@@ -14076,46 +13807,46 @@ flash_read_page_en:
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	mov	fp, r3
 	cmp	r2, r0
-	bhi	.L2226
-	mov	r2, #428
-	ldr	r1, .L2252+4
-	ldr	r0, .L2252+8
+	bhi	.L2188
+	movw	r2, #431
+	ldr	r1, .L2214+4
+	ldr	r0, .L2214+8
 	bl	printf
-.L2226:
-	ldr	r3, .L2252+12
+.L2188:
+	ldr	r3, .L2214+12
 	ldrb	r6, [r3, r5]	@ zero_extendqisi2
 	ldrb	r3, [fp]	@ zero_extendqisi2
 	cmp	r5, r3
-	bcc	.L2227
-	ldr	r2, .L2252+16
+	bcc	.L2189
+	ldr	r2, .L2214+16
 	ldr	r2, [r2]
 	lsls	r0, r2, #25
-	bmi	.L2228
-.L2251:
+	bmi	.L2190
+.L2213:
 	mov	r0, #-1
-.L2225:
+.L2187:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2228:
+.L2190:
 	str	r3, [sp]
 	mov	r2, r5
 	mov	r3, r4
 	mov	r1, r6
-	ldr	r0, .L2252+20
+	ldr	r0, .L2214+20
 	bl	printf
-	b	.L2251
-.L2227:
+	b	.L2213
+.L2189:
 	tst	r4, #50331648
-	bne	.L2230
-	ldr	r3, .L2252+24
+	bne	.L2192
+	ldr	r3, .L2214+24
 	ldrb	r2, [r3]	@ zero_extendqisi2
-	ldr	r3, .L2252+28
-	cbz	r2, .L2231
+	ldr	r3, .L2214+28
+	cbz	r2, .L2193
 	ldrb	r2, [r3]	@ zero_extendqisi2
-	cbz	r2, .L2230
-.L2231:
-	ldr	r2, .L2252+32
+	cbz	r2, .L2192
+.L2193:
+	ldr	r2, .L2214+32
 	mov	r0, r4
 	str	r3, [sp, #12]
 	ldrh	r5, [r2]
@@ -14127,9 +13858,9 @@ flash_read_page_en:
 	bl	__aeabi_uidivmod
 	ldr	r3, [sp, #12]
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2232
+	cbz	r3, .L2194
 	add	r4, fp, r1, lsl #1
-.L2230:
+.L2192:
 	mov	r1, r4
 	str	r10, [sp]
 	mov	r3, r8
@@ -14137,28 +13868,28 @@ flash_read_page_en:
 	mov	r0, r6
 	bl	flash_read_page
 	adds	r1, r0, #1
-	bne	.L2225
-	ldr	r5, .L2252+36
+	bne	.L2187
+	ldr	r5, .L2214+36
 	ldrb	fp, [r5]	@ zero_extendqisi2
 	cmp	fp, #0
-	bne	.L2233
-.L2236:
-	ldr	r3, .L2252+40
+	bne	.L2195
+.L2198:
+	ldr	r3, .L2214+40
 	ldr	fp, [r3]
 	cmp	fp, #0
-	bne	.L2234
-.L2235:
+	bne	.L2196
+.L2197:
 	ldrb	r3, [r5]	@ zero_extendqisi2
 	mov	r2, r4
 	movs	r1, #0
-	ldr	r0, .L2252+44
+	ldr	r0, .L2214+44
 	str	r3, [sp]
 	mov	r3, #-1
 	bl	printf
-	ldr	r3, .L2252+48
+	ldr	r3, .L2214+48
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L2251
+	beq	.L2213
 	str	r10, [sp, #48]
 	mov	r3, r8
 	mov	r2, r7
@@ -14168,12 +13899,12 @@ flash_read_page_en:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
 	b	flash_ddr_tuning_read
-.L2232:
-	ldr	r3, .L2252+52
+.L2194:
+	ldr	r3, .L2214+52
 	ldrh	r4, [r3, r1, lsl #1]
 	add	r4, r4, fp
-	b	.L2230
-.L2233:
+	b	.L2192
+.L2195:
 	movs	r3, #0
 	mov	r2, r7
 	strb	r3, [r5]
@@ -14184,9 +13915,9 @@ flash_read_page_en:
 	bl	flash_read_page
 	adds	r2, r0, #1
 	strb	fp, [r5]
-	beq	.L2236
-	b	.L2225
-.L2234:
+	beq	.L2198
+	b	.L2187
+.L2196:
 	mov	r3, r8
 	str	r10, [sp]
 	mov	r2, r7
@@ -14194,24 +13925,24 @@ flash_read_page_en:
 	mov	r0, r6
 	blx	fp
 	adds	r3, r0, #1
-	beq	.L2235
-	b	.L2225
-.L2253:
+	beq	.L2197
+	b	.L2187
+.L2215:
 	.align	2
-.L2252:
-	.word	.LANCHOR18
-	.word	.LANCHOR173
+.L2214:
+	.word	.LANCHOR23
+	.word	.LANCHOR170
 	.word	.LC0
-	.word	.LANCHOR30
-	.word	.LANCHOR14
-	.word	.LC129
-	.word	.LANCHOR0
+	.word	.LANCHOR29
+	.word	.LANCHOR19
+	.word	.LC126
+	.word	.LANCHOR0
 	.word	.LANCHOR1
 	.word	.LANCHOR2
-	.word	.LANCHOR52
-	.word	.LANCHOR174
-	.word	.LC130
-	.word	.LANCHOR21
+	.word	.LANCHOR51
+	.word	.LANCHOR171
+	.word	.LC127
+	.word	.LANCHOR26
 	.word	.LANCHOR3
 	.size	flash_read_page_en, .-flash_read_page_en
 	.section	.text.flash_get_last_written_page,"ax",%progbits
@@ -14227,12 +13958,12 @@ flash_get_last_written_page:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r8, r1
-	ldr	r1, .L2264
+	ldr	r1, .L2226
 	mov	fp, r2
 	mov	r10, r3
 	str	r0, [sp, #12]
 	ldrh	r4, [r1]
-	ldr	r1, .L2264+4
+	ldr	r1, .L2226+4
 	subs	r4, r4, #1
 	ldrh	r6, [r1, #26]
 	sxth	r4, r4
@@ -14242,27 +13973,27 @@ flash_get_last_written_page:
 	adds	r1, r4, r6
 	bl	flash_read_page_en
 	cmp	r0, #512
-	bne	.L2255
+	bne	.L2217
 	movs	r7, #0
-.L2256:
+.L2218:
 	cmp	r7, r4
-	ble	.L2259
-.L2255:
-	ldr	r3, .L2264+8
+	ble	.L2221
+.L2217:
+	ldr	r3, .L2226+8
 	ldr	r3, [r3]
 	lsls	r3, r3, #19
-	bpl	.L2260
+	bpl	.L2222
 	ldr	r3, [r10]
 	mov	r2, r4
 	mov	r1, r8
-	ldr	r0, .L2264+12
+	ldr	r0, .L2226+12
 	bl	printf
-.L2260:
+.L2222:
 	mov	r0, r4
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2259:
+.L2221:
 	adds	r5, r7, r4
 	ldr	r3, [sp, #48]
 	add	r5, r5, r5, lsr #31
@@ -14279,14 +14010,14 @@ flash_get_last_written_page:
 	addne	r5, r5, #1
 	sxtheq	r4, r4
 	sxthne	r7, r5
-	b	.L2256
-.L2265:
+	b	.L2218
+.L2227:
 	.align	2
-.L2264:
-	.word	.LANCHOR147
-	.word	.LANCHOR33
-	.word	.LANCHOR14
-	.word	.LC131
+.L2226:
+	.word	.LANCHOR144
+	.word	.LANCHOR32
+	.word	.LANCHOR19
+	.word	.LC128
 	.size	flash_get_last_written_page, .-flash_get_last_written_page
 	.section	.text.flash_get_last_written_page_ext,"ax",%progbits
 	.align	1
@@ -14300,8 +14031,8 @@ flash_get_last_written_page_ext:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r4, r5, lr}
-	ldr	r4, .L2267
-	ldr	r5, .L2267+4
+	ldr	r4, .L2229
+	ldr	r5, .L2229+4
 	ldrb	r4, [r4]	@ zero_extendqisi2
 	ldrh	r5, [r5]
 	rsb	r4, r4, #24
@@ -14319,11 +14050,11 @@ flash_get_last_written_page_ext:
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, pc}
-.L2268:
+.L2230:
 	.align	2
-.L2267:
-	.word	.LANCHOR32
-	.word	.LANCHOR75
+.L2229:
+	.word	.LANCHOR31
+	.word	.LANCHOR74
 	.size	flash_get_last_written_page_ext, .-flash_get_last_written_page_ext
 	.section	.text.flash_ddr_para_scan,"ax",%progbits
 	.align	1
@@ -14338,12 +14069,12 @@ flash_ddr_para_scan:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r7, r0
-	ldr	r6, .L2275
+	ldr	r6, .L2237
 	movs	r5, #1
 	mov	r8, r1
-	ldr	r4, .L2275+4
-	ldr	fp, .L2275+8
-	ldr	r10, .L2275+12
+	ldr	r4, .L2237+4
+	ldr	fp, .L2237+8
+	ldr	r10, .L2237+12
 	ldrb	r0, [r6]	@ zero_extendqisi2
 	strb	r5, [r4]
 	bl	flash_set_interface_mode
@@ -14365,32 +14096,32 @@ flash_ddr_para_scan:
 	bl	flash_read_page
 	adds	r0, r0, #1
 	mov	r3, r4
-	bne	.L2270
+	bne	.L2232
 	ldrb	r2, [r6]	@ zero_extendqisi2
 	lsls	r2, r2, #31
-	bpl	.L2270
+	bpl	.L2232
 	mov	r0, r5
 	bl	flash_set_interface_mode
 	mov	r0, r5
 	bl	nandc_set_if_mode
 	movs	r3, #0
 	strb	r3, [r4]
-.L2271:
+.L2233:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2270:
+.L2232:
 	movs	r2, #1
 	strb	r2, [r3]
-	b	.L2271
-.L2276:
+	b	.L2233
+.L2238:
 	.align	2
-.L2275:
-	.word	.LANCHOR49
-	.word	.LANCHOR21
-	.word	.LANCHOR175
-	.word	.LANCHOR176
+.L2237:
+	.word	.LANCHOR48
+	.word	.LANCHOR26
+	.word	.LANCHOR172
+	.word	.LANCHOR173
 	.size	flash_ddr_para_scan, .-flash_ddr_para_scan
 	.section	.text.flash_prog_page,"ax",%progbits
 	.align	1
@@ -14404,101 +14135,89 @@ flash_prog_page:
 	@ args = 4, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r5, r0
-	str	r3, [sp, #12]
-	mov	r7, r1
 	mov	r10, r2
-	ubfx	r8, r1, #24, #2
-	ldr	r3, .L2292
-	ldr	r6, [r3]
-	add	r3, r0, #8
-	add	fp, r6, r3, lsl #8
-	ldr	r3, .L2292+4
-	ldrb	r4, [r3]	@ zero_extendqisi2
-	rsb	r3, r4, #24
-	movs	r4, #1
-	lsls	r4, r4, r3
-	ldr	r3, .L2292+8
-	subs	r4, r4, #1
-	ldr	r3, [r3]
-	ands	r4, r4, r1
-	lsls	r3, r3, #27
-	bpl	.L2278
-	ldr	r3, [sp, #48]
-	mov	r2, r8
-	ldr	r0, .L2292+12
-	bl	printf
-.L2278:
+	str	r3, [sp, #12]
+	mov	r4, r0
+	mov	r6, r1
+	add	r7, r0, #8
+	ldr	r3, .L2250
+	ldr	r5, [r3]
+	ldr	r3, .L2250+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r7, r5, r7, lsl #8
+	rsb	r2, r3, #24
+	movs	r3, #1
+	lsls	r3, r3, r2
+	subs	r3, r3, #1
+	and	fp, r3, r1
 	bl	nandc_wait_flash_ready
-	mov	r0, r5
+	mov	r0, r4
 	bl	hynix_reconfig_rr_para
-	mov	r0, r5
+	mov	r0, r4
 	bl	nandc_cs
-	mov	r0, r5
-	cmp	r8, #0
-	bne	.L2279
-	bl	zftl_flash_enter_slc_mode
-.L2280:
-	lsl	r8, r5, #8
-	movs	r2, #128
-	add	r3, r6, r8
-	str	r2, [r3, #2056]
-	movs	r2, #0
-	str	r2, [r3, #2052]
-	str	r2, [r3, #2052]
-	uxtb	r2, r4
-	str	r2, [r3, #2052]
-	lsrs	r2, r4, #8
-	str	r2, [r3, #2052]
-	lsrs	r2, r4, #16
-	str	r2, [r3, #2052]
-	ldr	r2, .L2292+16
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbz	r2, .L2281
-	lsrs	r2, r4, #24
-	str	r2, [r3, #2052]
-.L2281:
+	tst	r6, #50331648
 	mov	r0, r4
-	add	r6, r6, r8
+	bne	.L2240
+	bl	zftl_flash_enter_slc_mode
+.L2241:
+	lsl	r8, r4, #8
+	movs	r1, #128
+	add	r2, r5, r8
+	str	r1, [r2, #2056]
+	movs	r1, #0
+	str	r1, [r2, #2052]
+	str	r1, [r2, #2052]
+	uxtb	r1, fp
+	str	r1, [r2, #2052]
+	lsr	r1, fp, #8
+	str	r1, [r2, #2052]
+	lsr	r1, fp, #16
+	str	r1, [r2, #2052]
+	ldr	r1, .L2250+8
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	cbz	r1, .L2242
+	lsr	r1, fp, #24
+	str	r1, [r2, #2052]
+.L2242:
+	mov	r0, fp
+	add	r5, r5, r8
 	bl	nandc_set_seed
-	ldr	r3, .L2292+20
+	ldr	r3, .L2250+12
 	movs	r1, #1
-	mov	r0, r5
+	mov	r0, r4
 	ldrb	r2, [r3, #9]	@ zero_extendqisi2
 	ldr	r3, [sp, #12]
 	str	r3, [sp]
 	mov	r3, r10
 	bl	nandc_xfer
 	movs	r3, #16
-	str	r3, [r6, #2056]
+	str	r3, [r5, #2056]
 	bl	nandc_wait_flash_ready
-	mov	r0, fp
+	mov	r0, r7
 	bl	flash_read_status
-	bl	nandc_de_cs.constprop.33
+	bl	nandc_de_cs.constprop.32
 	ands	r0, r0, #4
-	beq	.L2277
+	beq	.L2239
 	mov	r2, r0
-	mov	r1, r7
-	ldr	r0, .L2292+24
+	mov	r1, r6
+	ldr	r0, .L2250+16
 	bl	printf
 	mov	r0, #-1
-.L2277:
+.L2239:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2279:
+.L2240:
 	bl	zftl_flash_exit_slc_mode
-	b	.L2280
-.L2293:
+	b	.L2241
+.L2251:
 	.align	2
-.L2292:
-	.word	.LANCHOR13
-	.word	.LANCHOR32
-	.word	.LANCHOR14
-	.word	.LC132
+.L2250:
+	.word	.LANCHOR7
 	.word	.LANCHOR31
-	.word	.LANCHOR33
-	.word	.LC133
+	.word	.LANCHOR30
+	.word	.LANCHOR32
+	.word	.LC129
 	.size	flash_prog_page, .-flash_prog_page
 	.section	.text.flash_test_blk,"ax",%progbits
 	.align	1
@@ -14513,28 +14232,28 @@ flash_test_blk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	movs	r2, #32
-	ldr	r7, .L2304
+	ldr	r7, .L2262
 	mov	r6, r0
 	mov	r4, r1
 	movs	r1, #165
-	ldr	r5, .L2304+4
+	ldr	r5, .L2262+4
 	ldr	r0, [r7]
 	bl	ftl_memset
 	movs	r2, #8
 	movs	r1, #90
 	ldr	r0, [r5]
 	bl	ftl_memset
-	ldr	r3, .L2304+8
+	ldr	r3, .L2262+8
 	mov	r0, r6
 	ldrh	r3, [r3]
 	muls	r4, r3, r4
 	mov	r1, r4
 	bl	flash_erase_block
 	adds	r0, r0, #1
-	bne	.L2295
-.L2297:
+	bne	.L2253
+.L2255:
 	mov	r5, #-1
-.L2296:
+.L2254:
 	mov	r1, r4
 	mov	r0, r6
 	bl	flash_erase_block
@@ -14542,8 +14261,8 @@ flash_test_blk:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L2295:
-	ldr	r8, .L2304+12
+.L2253:
+	ldr	r8, .L2262+12
 	mov	r1, r4
 	mov	r0, r6
 	ldrb	r3, [r8, #9]	@ zero_extendqisi2
@@ -14552,7 +14271,7 @@ flash_test_blk:
 	ldr	r3, [r5]
 	bl	flash_prog_page
 	adds	r0, r0, #1
-	beq	.L2297
+	beq	.L2255
 	ldrb	r3, [r8, #9]	@ zero_extendqisi2
 	mov	r1, r4
 	mov	r0, r6
@@ -14561,24 +14280,24 @@ flash_test_blk:
 	ldr	r3, [r5]
 	bl	flash_read_page_en
 	adds	r0, r0, #1
-	beq	.L2297
+	beq	.L2255
 	ldr	r3, [r7]
 	ldr	r3, [r3]
 	cmp	r3, #-1515870811
-	bne	.L2297
+	bne	.L2255
 	ldr	r3, [r5]
 	ldr	r5, [r3]
 	subs	r5, r5, #1515870810
 	it	ne
 	movne	r5, #-1
-	b	.L2296
-.L2305:
+	b	.L2254
+.L2263:
 	.align	2
-.L2304:
-	.word	.LANCHOR166
-	.word	.LANCHOR168
+.L2262:
+	.word	.LANCHOR163
+	.word	.LANCHOR165
 	.word	.LANCHOR2
-	.word	.LANCHOR33
+	.word	.LANCHOR32
 	.size	flash_test_blk, .-flash_test_blk
 	.section	.text.id_block_prog_msb_ff_data,"ax",%progbits
 	.align	1
@@ -14591,32 +14310,32 @@ flash_test_blk:
 id_block_prog_msb_ff_data:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2313
+	ldr	r3, .L2271
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
 	mov	r6, r0
 	mov	r7, r1
 	mov	r4, r2
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L2306
-	ldr	r5, .L2313+4
+	cbnz	r3, .L2264
+	ldr	r5, .L2271+4
 	ldrb	r2, [r5, #19]	@ zero_extendqisi2
 	subs	r3, r2, #5
 	uxtb	r3, r3
 	cmp	r3, #30
-	bhi	.L2308
-	ldr	r2, .L2313+8
+	bhi	.L2266
+	ldr	r2, .L2271+8
 	lsr	r3, r2, r3
 	lsls	r3, r3, #31
-	bmi	.L2310
-.L2306:
+	bmi	.L2268
+.L2264:
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L2311:
+.L2269:
 	ldrh	r2, [r10, r4, lsl #1]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L2306
+	bne	.L2264
 	mov	r2, #16384
 	movs	r1, #255
 	ldr	r0, [r8]
@@ -14630,26 +14349,26 @@ id_block_prog_msb_ff_data:
 	ldr	r3, [r8]
 	mov	r2, r3
 	bl	flash_prog_page
-.L2312:
+.L2270:
 	ldrh	r3, [r5, #10]
 	cmp	r3, r4
-	bhi	.L2311
-	b	.L2306
-.L2308:
+	bhi	.L2269
+	b	.L2264
+.L2266:
 	cmp	r2, #68
-	bne	.L2306
-.L2310:
-	ldr	r10, .L2313+12
-	ldr	r8, .L2313+16
-	b	.L2312
-.L2314:
+	bne	.L2264
+.L2268:
+	ldr	r10, .L2271+12
+	ldr	r8, .L2271+16
+	b	.L2270
+.L2272:
 	.align	2
-.L2313:
-	.word	.LANCHOR19
-	.word	.LANCHOR33
+.L2271:
+	.word	.LANCHOR24
+	.word	.LANCHOR32
 	.word	1073758215
-	.word	.LANCHOR145
-	.word	.LANCHOR166
+	.word	.LANCHOR142
+	.word	.LANCHOR163
 	.size	id_block_prog_msb_ff_data, .-id_block_prog_msb_ff_data
 	.section	.text.flash_start_one_pass_page_prog,"ax",%progbits
 	.align	1
@@ -14664,7 +14383,7 @@ flash_start_one_pass_page_prog:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
 	mov	r7, r3
-	ldr	r3, .L2324
+	ldr	r3, .L2282
 	mov	r10, r0
 	mov	r0, r7
 	mov	r8, r2
@@ -14673,10 +14392,10 @@ flash_start_one_pass_page_prog:
 	ldr	r4, [r3]
 	bl	nandc_cs
 	cmp	r10, #0
-	beq	.L2316
+	beq	.L2274
 	adds	r3, r4, r6
 	str	r10, [r3, #2056]
-.L2316:
+.L2274:
 	adds	r3, r4, r6
 	movs	r2, #128
 	str	r2, [r3, #2056]
@@ -14689,16 +14408,16 @@ flash_start_one_pass_page_prog:
 	str	r2, [r3, #2052]
 	lsrs	r2, r5, #16
 	str	r2, [r3, #2052]
-	ldr	r2, .L2324+4
+	ldr	r2, .L2282+4
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbz	r2, .L2317
+	cbz	r2, .L2275
 	lsrs	r2, r5, #24
 	str	r2, [r3, #2052]
-.L2317:
+.L2275:
 	mov	r0, r5
 	add	r4, r4, r6
 	bl	nandc_set_seed
-	ldr	r3, .L2324+8
+	ldr	r3, .L2282+8
 	movs	r1, #1
 	mov	r0, r7
 	ldrb	r2, [r3, #9]	@ zero_extendqisi2
@@ -14710,12 +14429,12 @@ flash_start_one_pass_page_prog:
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L2325:
+.L2283:
 	.align	2
-.L2324:
-	.word	.LANCHOR13
-	.word	.LANCHOR31
-	.word	.LANCHOR33
+.L2282:
+	.word	.LANCHOR7
+	.word	.LANCHOR30
+	.word	.LANCHOR32
 	.size	flash_start_one_pass_page_prog, .-flash_start_one_pass_page_prog
 	.section	.text.flash_dual_page_prog,"ax",%progbits
 	.align	1
@@ -14734,36 +14453,36 @@ flash_dual_page_prog:
 	mov	fp, r3
 	add	r3, r0, #8
 	mov	r5, r0
-	ldr	r2, .L2338
+	ldr	r2, .L2296
 	mov	r6, r1
 	ubfx	r8, r1, #24, #2
 	ldr	r7, [r2]
 	add	r7, r7, r3, lsl #8
-	ldr	r3, .L2338+4
+	ldr	r3, .L2296+4
 	ldrb	r4, [r3]	@ zero_extendqisi2
 	rsb	r3, r4, #24
 	movs	r4, #1
 	lsls	r4, r4, r3
-	ldr	r3, .L2338+8
+	ldr	r3, .L2296+8
 	subs	r4, r4, #1
 	ldr	r2, [r3]
 	ands	r4, r4, r1
 	mov	r10, r3
 	tst	r2, #16
-	beq	.L2327
+	beq	.L2285
 	ldr	r3, [sp, #64]
 	mov	r2, r8
-	ldr	r0, .L2338+12
+	ldr	r0, .L2296+12
 	bl	printf
-.L2327:
+.L2285:
 	bl	nandc_wait_flash_ready
 	mov	r0, r5
 	bl	nandc_cs
 	mov	r0, r5
 	cmp	r8, #0
-	bne	.L2328
+	bne	.L2286
 	bl	zftl_flash_enter_slc_mode
-.L2329:
+.L2287:
 	ldr	r3, [sp, #20]
 	movs	r1, #0
 	movs	r2, #16
@@ -14788,33 +14507,33 @@ flash_dual_page_prog:
 	bl	nandc_wait_flash_ready
 	mov	r0, r7
 	bl	flash_read_status
-	bl	nandc_de_cs.constprop.33
+	bl	nandc_de_cs.constprop.32
 	ands	r0, r0, #4
-	beq	.L2326
+	beq	.L2284
 	ldr	r3, [r10]
 	lsls	r3, r3, #19
-	bpl	.L2331
+	bpl	.L2289
 	mov	r2, r0
 	mov	r1, r6
-	ldr	r0, .L2338+16
+	ldr	r0, .L2296+16
 	bl	printf
-.L2331:
+.L2289:
 	mov	r0, #-1
-.L2326:
+.L2284:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2328:
+.L2286:
 	bl	zftl_flash_exit_slc_mode
-	b	.L2329
-.L2339:
+	b	.L2287
+.L2297:
 	.align	2
-.L2338:
-	.word	.LANCHOR13
-	.word	.LANCHOR32
-	.word	.LANCHOR14
-	.word	.LC132
-	.word	.LC133
+.L2296:
+	.word	.LANCHOR7
+	.word	.LANCHOR31
+	.word	.LANCHOR19
+	.word	.LC130
+	.word	.LC129
 	.size	flash_dual_page_prog, .-flash_dual_page_prog
 	.section	.text.ymtc_flash_tlc_page_prog,"ax",%progbits
 	.align	1
@@ -14829,7 +14548,7 @@ ymtc_flash_tlc_page_prog:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, r2
-	ldr	r2, .L2346
+	ldr	r2, .L2304
 	mov	fp, r3
 	add	r3, r0, #8
 	movs	r6, #1
@@ -14837,7 +14556,7 @@ ymtc_flash_tlc_page_prog:
 	mov	r8, r1
 	ldr	r7, [r2]
 	add	r7, r7, r3, lsl #8
-	ldr	r3, .L2346+4
+	ldr	r3, .L2304+4
 	ldrb	r4, [r3]	@ zero_extendqisi2
 	rsb	r4, r4, #24
 	lsl	r4, r6, r4
@@ -14877,69 +14596,69 @@ ymtc_flash_tlc_page_prog:
 	bl	nandc_wait_flash_ready
 	mov	r0, r7
 	bl	flash_read_status
-	bl	nandc_de_cs.constprop.33
+	bl	nandc_de_cs.constprop.32
 	ands	r0, r0, #4
-	beq	.L2340
-	ldr	r3, .L2346+8
+	beq	.L2298
+	ldr	r3, .L2304+8
 	ldr	r3, [r3]
 	lsls	r3, r3, #19
-	bpl	.L2342
+	bpl	.L2300
 	mov	r2, r0
 	mov	r1, r8
-	ldr	r0, .L2346+12
+	ldr	r0, .L2304+12
 	bl	printf
-.L2342:
+.L2300:
 	mov	r0, #-1
-.L2340:
+.L2298:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2347:
+.L2305:
 	.align	2
-.L2346:
-	.word	.LANCHOR13
-	.word	.LANCHOR32
-	.word	.LANCHOR14
-	.word	.LC134
+.L2304:
+	.word	.LANCHOR7
+	.word	.LANCHOR31
+	.word	.LANCHOR19
+	.word	.LC131
 	.size	ymtc_flash_tlc_page_prog, .-ymtc_flash_tlc_page_prog
-	.section	.text.fw_flash_page_prog.constprop.30,"ax",%progbits
+	.section	.text.fw_flash_page_prog.constprop.29,"ax",%progbits
 	.align	1
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	fw_flash_page_prog.constprop.30, %function
-fw_flash_page_prog.constprop.30:
+	.type	fw_flash_page_prog.constprop.29, %function
+fw_flash_page_prog.constprop.29:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, lr}
 	mov	r5, r1
-	ldr	r8, .L2353+12
+	ldr	r8, .L2311+12
 	sub	sp, sp, #20
 	mov	r6, r2
 	ldrb	r1, [r8, #9]	@ zero_extendqisi2
 	bl	__aeabi_uidiv
-	ldr	r3, .L2353
+	ldr	r3, .L2311
 	mov	r4, r0
 	ldrb	r10, [r3]	@ zero_extendqisi2
-	ldr	r3, .L2353+4
+	ldr	r3, .L2311+4
 	ldrb	r0, [r3]	@ zero_extendqisi2
 	bl	nandc_bch_sel
 	ldrb	r3, [r8, #7]	@ zero_extendqisi2
 	cmp	r3, #9
-	bne	.L2349
-	ldr	r3, .L2353+8
+	bne	.L2307
+	ldr	r3, .L2311+8
 	ldrb	r7, [r3]	@ zero_extendqisi2
-	cbnz	r7, .L2349
+	cbnz	r7, .L2307
 	ldrb	r3, [r8, #12]	@ zero_extendqisi2
 	cmp	r3, #3
-	bne	.L2350
+	bne	.L2308
 	mov	r3, r6
 	mov	r2, r5
 	mov	r1, r4
 	mov	r0, r7
 	bl	ymtc_flash_tlc_page_prog
-.L2352:
+.L2310:
 	mov	r4, r0
 	mov	r0, r10
 	bl	nandc_bch_sel
@@ -14947,8 +14666,8 @@ fw_flash_page_prog.constprop.30:
 	add	sp, sp, #20
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L2350:
-	ldr	r8, .L2353+16
+.L2308:
+	ldr	r8, .L2311+16
 	mov	r2, #16384
 	movs	r1, #255
 	ldr	r0, [r8]
@@ -14963,8 +14682,8 @@ fw_flash_page_prog.constprop.30:
 	str	r3, [sp]
 	mov	r3, r6
 	bl	flash_dual_page_prog
-	b	.L2352
-.L2349:
+	b	.L2310
+.L2307:
 	movs	r3, #4
 	mov	r2, r5
 	str	r3, [sp]
@@ -14972,16 +14691,16 @@ fw_flash_page_prog.constprop.30:
 	mov	r3, r6
 	movs	r0, #0
 	bl	flash_prog_page
-	b	.L2352
-.L2354:
+	b	.L2310
+.L2312:
 	.align	2
-.L2353:
-	.word	.LANCHOR50
-	.word	.LANCHOR17
-	.word	.LANCHOR19
-	.word	.LANCHOR33
-	.word	.LANCHOR166
-	.size	fw_flash_page_prog.constprop.30, .-fw_flash_page_prog.constprop.30
+.L2311:
+	.word	.LANCHOR49
+	.word	.LANCHOR22
+	.word	.LANCHOR24
+	.word	.LANCHOR32
+	.word	.LANCHOR163
+	.size	fw_flash_page_prog.constprop.29, .-fw_flash_page_prog.constprop.29
 	.section	.text.idb_write_data,"ax",%progbits
 	.align	1
 	.global	idb_write_data
@@ -14999,79 +14718,79 @@ idb_write_data:
 	sub	sp, sp, #152
 	mov	r7, r2
 	mov	r5, r3
-	ldr	r6, .L2484
-	bne	.L2356
+	ldr	r6, .L2442
+	bne	.L2314
 	ldr	r3, [r2]
-	ldr	r2, .L2484+4
+	ldr	r2, .L2442+4
 	cmp	r3, r2
-	beq	.L2357
-	ldr	r2, .L2484+8
+	beq	.L2315
+	ldr	r2, .L2442+8
 	cmp	r3, r2
-	beq	.L2357
+	beq	.L2315
 	add	r2, r2, #327680
 	cmp	r3, r2
-	bne	.L2356
-.L2357:
-	ldr	r8, .L2484+16
+	bne	.L2314
+.L2315:
+	ldr	r8, .L2442+16
 	movs	r2, #1
 	strb	r2, [r6]
 	ldr	r3, [r8]
-	cbnz	r3, .L2358
+	cbnz	r3, .L2316
 	mov	r0, #262144
 	bl	ftl_malloc
 	str	r0, [r8]
-.L2358:
-	ldr	r3, .L2484+12
+.L2316:
+	ldr	r3, .L2442+12
 	movs	r2, #64
 	str	r2, [r3]
-.L2356:
+.L2314:
 	ldrb	r0, [r6]	@ zero_extendqisi2
 	cmp	r0, #0
-	beq	.L2355
-	ldr	r3, .L2484+16
+	beq	.L2313
+	ldr	r3, .L2442+16
 	ldr	r10, [r3]
 	mov	r8, r3
 	cmp	r10, #0
-	beq	.L2483
+	beq	.L2441
 	adds	r3, r4, r5
 	cmp	r3, #63
 	str	r3, [sp, #72]
-	bls	.L2360
+	bls	.L2318
 	cmp	r4, #576
-	bcs	.L2361
-	ldr	r10, .L2484+24
+	bcs	.L2319
+	ldr	r10, .L2442+24
 	ldr	r3, [r10]
-	cbz	r3, .L2362
-.L2365:
-	ldr	r3, .L2484+20
+	cbz	r3, .L2320
+.L2323:
+	ldr	r3, .L2442+20
 	cmp	r4, #64
 	mov	r2, #1
 	ldr	r0, [r8]
 	str	r2, [r3]
-	bhi	.L2478
+	bhi	.L2436
 	rsb	r1, r4, #64
 	subs	r2, r5, r1
 	add	r1, r7, r1, lsl #9
 	lsls	r2, r2, #9
-.L2482:
+.L2440:
 	bl	ftl_memcpy
-.L2366:
-	ldr	r3, .L2484+12
+.L2324:
+	ldr	r3, .L2442+12
 	ldr	r3, [r3]
 	cmp	r4, r3
 	itt	ne
 	movne	r3, #0
 	strbne	r3, [r6]
-	b	.L2423
-.L2362:
+	b	.L2381
+.L2320:
 	mov	r0, #262144
 	bl	ftl_malloc
 	str	r0, [r10]
 	cmp	r0, #0
-	bne	.L2365
+	bne	.L2323
 	mov	r0, #-1
-	b	.L2355
-.L2478:
+	b	.L2313
+.L2436:
 	rsb	r2, r4, #576
 	sub	r3, r4, #64
 	cmp	r2, r5
@@ -15080,52 +14799,52 @@ idb_write_data:
 	movcs	r2, r5
 	add	r0, r0, r3, lsl #9
 	lsls	r2, r2, #9
-	b	.L2482
-.L2485:
+	b	.L2440
+.L2443:
 	.align	2
-.L2484:
-	.word	.LANCHOR143
+.L2442:
+	.word	.LANCHOR140
 	.word	-52655045
 	.word	1397640018
-	.word	.LANCHOR177
+	.word	.LANCHOR174
+	.word	.LANCHOR138
+	.word	.LANCHOR139
 	.word	.LANCHOR141
-	.word	.LANCHOR142
-	.word	.LANCHOR144
-.L2360:
+.L2318:
 	cmp	r4, #576
-	bcc	.L2366
-.L2361:
-	ldr	r3, .L2486
+	bcc	.L2324
+.L2319:
+	ldr	r3, .L2444
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L2366
+	beq	.L2324
 	ldr	r3, [r10]
-	ldr	r2, .L2486+4
+	ldr	r2, .L2444+4
 	cmp	r3, r2
-	beq	.L2367
-	ldr	r2, .L2486+8
+	beq	.L2325
+	ldr	r2, .L2444+8
 	cmp	r3, r2
-	beq	.L2367
+	beq	.L2325
 	add	r2, r2, #327680
 	cmp	r3, r2
-	bne	.L2368
-.L2367:
-	ldr	r7, .L2486+12
+	bne	.L2326
+.L2325:
+	ldr	r7, .L2444+12
 	ldrb	r3, [r7]	@ zero_extendqisi2
 	str	r3, [sp, #24]
-	ldr	r3, .L2486+16
+	ldr	r3, .L2444+16
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	mov	r8, r3
 	ldr	r3, [sp, #24]
 	str	r2, [sp, #12]
 	cmp	r3, #0
-	beq	.L2369
+	beq	.L2327
 	clz	fp, r2
 	ldrh	r3, [sp, #24]
 	lsr	fp, fp, #5
 	str	r3, [sp, #36]
-.L2370:
-	ldr	r6, .L2486+20
+.L2328:
+	ldr	r6, .L2444+20
 	movs	r0, #0
 	ldrb	r5, [r6, #9]	@ zero_extendqisi2
 	ldrh	r4, [r6, #26]
@@ -15136,7 +14855,7 @@ idb_write_data:
 	movw	r6, #4098
 	strb	r3, [r7]
 	lsls	r0, r0, #2
-	ldr	r7, .L2486+24
+	ldr	r7, .L2444+24
 	bl	__aeabi_idiv
 	cmp	r0, #512
 	mov	r3, r0
@@ -15146,72 +14865,72 @@ idb_write_data:
 	str	r3, [sp, #32]
 	movw	r2, #65023
 	movs	r3, #0
-.L2376:
+.L2334:
 	ldr	r0, [r1, #-4]!
-	cbnz	r0, .L2372
+	cbnz	r0, .L2330
 	cmp	r3, #0
-	bne	.L2373
+	bne	.L2331
 	str	r7, [r1, #2048]
-.L2374:
+.L2332:
 	adds	r3, r3, #1
 	subs	r2, r2, #1
 	cmp	r3, r6
 	it	hi
 	movhi	r3, #0
 	cmp	r2, #4096
-	bne	.L2376
-.L2372:
+	bne	.L2334
+.L2330:
 	ldr	r3, [sp, #32]
 	ldr	r1, [r10, r2, lsl #2]
-	ldr	r0, .L2486+28
+	ldr	r0, .L2444+28
 	bl	printf
 	mul	r3, r5, r4
 	str	r3, [sp, #84]
 	movs	r3, #0
 	str	r3, [sp, #16]
 	str	r3, [sp, #28]
-.L2418:
-	ldr	r3, .L2486+32
+.L2376:
+	ldr	r3, .L2444+32
 	mov	r2, #512
 	movs	r1, #0
 	ldr	r0, [r3]
 	bl	ftl_memset
-	ldr	r3, .L2486+36
+	ldr	r3, .L2444+36
 	ldr	r2, [sp, #28]
 	ldr	r3, [r3]
 	add	r3, r3, r2
 	ldrb	r3, [r3, #32]	@ zero_extendqisi2
 	cmp	r3, #255
-	beq	.L2377
+	beq	.L2335
 	ldr	r2, [sp, #84]
 	muls	r3, r2, r3
 	str	r3, [sp, #8]
 	cmp	fp, #0
-	beq	.L2378
+	beq	.L2336
 	ldr	r3, [sp, #28]
-	ldr	r5, .L2486+12
-	ldr	r4, .L2486+16
+	ldr	r5, .L2444+12
+	ldr	r4, .L2444+16
 	bic	r3, r3, #2
 	cmp	r3, #1
-	beq	.L2379
+	beq	.L2337
 	cmp	fp, #3
-	bne	.L2380
-.L2379:
+	bne	.L2338
+.L2337:
 	ldrb	r3, [sp, #36]	@ zero_extendqisi2
-.L2480:
+.L2438:
 	strb	r3, [r5]
 	strb	r3, [r4]
-.L2378:
-	ldr	r7, .L2486+20
+.L2336:
+	ldr	r7, .L2444+20
 	movs	r5, #0
-	ldr	r3, .L2486+40
+	ldr	r3, .L2444+40
 	ldr	r0, [sp, #8]
 	ldrb	r6, [r7, #9]	@ zero_extendqisi2
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	ldrh	r4, [r7, #26]
 	mov	r1, r6
 	str	r3, [sp, #76]
-	ldr	r3, .L2486+40
+	ldr	r3, .L2444+40
 	muls	r4, r6, r4
 	strb	r5, [r3]
 	bl	__aeabi_uidiv
@@ -15233,31 +14952,31 @@ idb_write_data:
 	ldr	r2, [sp, #40]
 	str	r0, [sp, #48]
 	cmp	r3, r2
-	bne	.L2433
-	ldr	r3, .L2486+44
+	bne	.L2391
+	ldr	r3, .L2444+44
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #9
-	bne	.L2433
-	ldr	r3, .L2486+32
+	bne	.L2391
+	ldr	r3, .L2444+32
 	mov	r2, #1024
 	mov	r1, r5
 	ldr	r4, [r3]
 	mov	r0, r4
 	bl	ftl_memset
-	ldr	r2, .L2486+48
+	ldr	r2, .L2444+48
 	movs	r3, #12
 	str	r5, [r4, #12]
 	strb	r5, [r4, #16]
 	stm	r4, {r2, r3}
-	ldr	r3, .L2486+16
+	ldr	r3, .L2444+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2382
+	cbz	r3, .L2340
 	ldrb	r3, [r7, #29]	@ zero_extendqisi2
 	strb	r3, [r4, #16]
-.L2382:
+.L2340:
 	movs	r3, #4
 	strb	r3, [r4, #17]
-	ldr	r3, .L2486+20
+	ldr	r3, .L2444+20
 	ldrb	r1, [r3, #12]	@ zero_extendqisi2
 	ldrh	r0, [r3, #10]
 	bl	__aeabi_idiv
@@ -15277,22 +14996,22 @@ idb_write_data:
 	str	r0, [r4, #8]
 	subs	r3, r3, #4
 	str	r3, [sp, #20]
-.L2381:
+.L2339:
 	mov	r8, r10
 	movs	r7, #0
-.L2384:
+.L2342:
 	ldr	r3, [sp, #48]
 	cmp	r3, r7
-	bhi	.L2395
-	ldr	r3, .L2486+32
+	bhi	.L2353
+	ldr	r3, .L2444+32
 	movs	r4, #0
 	ldr	r0, [sp, #8]
 	movs	r6, #4
 	ldr	r5, [r3]
-	ldr	r3, .L2486+20
+	ldr	r3, .L2444+20
 	ldrb	r2, [r3, #9]	@ zero_extendqisi2
 	ldrh	r1, [r3, #26]
-	ldr	r3, .L2486+40
+	ldr	r3, .L2444+40
 	str	r2, [sp, #64]
 	strb	r4, [r3]
 	muls	r1, r2, r1
@@ -15306,101 +15025,101 @@ idb_write_data:
 	str	r3, [sp, #48]
 	ldr	r3, [sp, #20]
 	str	r3, [sp, #60]
-.L2396:
+.L2354:
 	ldr	r3, [sp, #60]
 	cmp	r4, r3
-	bcc	.L2412
-	ldr	r3, .L2486+40
+	bcc	.L2370
+	ldr	r3, .L2444+40
 	ldrb	r2, [sp, #76]	@ zero_extendqisi2
 	strb	r2, [r3]
 	cmp	fp, #0
-	beq	.L2413
+	beq	.L2371
 	movs	r0, #0
 	bl	zftl_flash_exit_slc_mode
-	ldr	r2, .L2486+12
+	ldr	r2, .L2444+12
 	movs	r3, #0
 	strb	r3, [r2]
-	ldr	r2, .L2486+16
+	ldr	r2, .L2444+16
 	strb	r3, [r2]
-.L2413:
+.L2371:
 	ldr	r3, [sp, #20]
 	movs	r4, #0
 	lsls	r1, r3, #7
-	ldr	r3, .L2486+32
+	ldr	r3, .L2444+32
 	ldr	r0, [r3]
-.L2414:
+.L2372:
 	cmp	r4, r1
-	bne	.L2416
+	bne	.L2374
 	ldr	r3, [sp, #16]
 	adds	r3, r3, #1
 	cmp	r3, #5
 	str	r3, [sp, #16]
-	bls	.L2377
-	b	.L2425
-.L2369:
+	bls	.L2335
+	b	.L2383
+.L2327:
 	ldr	r3, [sp, #12]
 	cmp	r3, #3
-	beq	.L2429
+	beq	.L2387
 	cmp	r3, #2
-	bne	.L2430
+	bne	.L2388
 	str	r3, [sp, #36]
 	mov	fp, #3
-	b	.L2370
-.L2429:
+	b	.L2328
+.L2387:
 	ldr	r3, [sp, #12]
 	mov	fp, #2
 	str	r3, [sp, #36]
-	b	.L2370
-.L2430:
+	b	.L2328
+.L2388:
 	ldr	r3, [sp, #24]
 	str	r3, [sp, #36]
 	mov	fp, r3
-	b	.L2370
-.L2373:
+	b	.L2328
+.L2331:
 	ldr	r0, [r10, r3, lsl #2]
 	str	r0, [r1, #2048]
-	b	.L2374
-.L2380:
+	b	.L2332
+.L2338:
 	movs	r0, #0
 	bl	zftl_flash_exit_slc_mode
 	movs	r3, #0
-	b	.L2480
-.L2433:
+	b	.L2438
+.L2391:
 	ldr	r3, [sp, #32]
 	mov	r4, r5
 	str	r3, [sp, #20]
-	b	.L2381
-.L2487:
+	b	.L2339
+.L2445:
 	.align	2
-.L2486:
-	.word	.LANCHOR142
+.L2444:
+	.word	.LANCHOR139
 	.word	-52655045
 	.word	1397640018
 	.word	.LANCHOR0
-	.word	.LANCHOR19
-	.word	.LANCHOR33
+	.word	.LANCHOR24
+	.word	.LANCHOR32
 	.word	1330594389
-	.word	.LC135
-	.word	.LANCHOR144
+	.word	.LC132
+	.word	.LANCHOR141
+	.word	.LANCHOR6
+	.word	.LANCHOR51
 	.word	.LANCHOR27
-	.word	.LANCHOR52
-	.word	.LANCHOR28
 	.word	1179535694
-.L2395:
+.L2353:
 	ldr	r3, [sp, #44]
 	adds	r5, r3, r7
-	ldr	r3, .L2488
+	ldr	r3, .L2446
 	ubfx	r5, r5, #2, #16
 	adds	r2, r5, #1
 	ldrh	r0, [r3, r2, lsl #1]
-	ldr	r3, .L2488+4
+	ldr	r3, .L2446+4
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	cmp	r1, #0
-	bne	.L2385
+	bne	.L2343
 	mov	r2, r0
-.L2386:
-	ldr	r0, .L2488+8
-	ldr	r3, .L2488
+.L2344:
+	ldr	r0, .L2446+8
+	ldr	r3, .L2446
 	ldrb	r0, [r0]	@ zero_extendqisi2
 	cmp	r0, #9
 	itt	ne
@@ -15410,19 +15129,19 @@ idb_write_data:
 	movw	r2, #61424
 	str	r2, [sp, #92]
 	ldrh	r2, [r3, r5, lsl #1]
-	cbnz	r1, .L2390
+	cbnz	r1, .L2348
 	mov	r5, r2
-.L2391:
+.L2349:
 	mul	r0, r5, r6
 	add	r2, sp, #88
-	cbnz	r4, .L2392
+	cbnz	r4, .L2350
 	ldr	r3, [sp, #40]
 	mov	r1, r8
 	add	r0, r0, r3
-	bl	fw_flash_page_prog.constprop.30
-	ldr	r3, .L2488+4
+	bl	fw_flash_page_prog.constprop.29
+	ldr	r3, .L2446+4
 	ldrb	r2, [r3]	@ zero_extendqisi2
-	cbnz	r2, .L2393
+	cbnz	r2, .L2351
 	adds	r5, r5, #1
 	mov	r1, r6
 	uxth	r5, r5
@@ -15432,42 +15151,42 @@ idb_write_data:
 	mov	r1, r0
 	mov	r0, r4
 	bl	id_block_prog_msb_ff_data
-.L2393:
+.L2351:
 	ldr	r3, [sp, #20]
 	add	r8, r8, #2048
 	add	r2, r3, #16
 	cmp	r7, r2
-	bcc	.L2394
+	bcc	.L2352
 	add	r2, r3, #20
 	cmp	r7, r2
-	bcs	.L2394
+	bcs	.L2352
 	add	r8, r10, #2048
-.L2394:
+.L2352:
 	adds	r3, r7, #4
 	movs	r4, #0
 	uxth	r7, r3
-	b	.L2384
-.L2385:
-	ldr	r0, .L2488+12
+	b	.L2342
+.L2343:
+	ldr	r0, .L2446+12
 	ldrb	r0, [r0]	@ zero_extendqisi2
 	cmp	r0, #0
-	beq	.L2386
+	beq	.L2344
 	lsls	r2, r2, #1
-	b	.L2386
-.L2390:
-	ldr	r2, .L2488+12
+	b	.L2344
+.L2348:
+	ldr	r2, .L2446+12
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, #0
-	beq	.L2391
+	beq	.L2349
 	lsls	r5, r5, #1
-	b	.L2391
-.L2392:
+	b	.L2349
+.L2350:
 	ldr	r3, [sp, #40]
 	mov	r1, r4
 	add	r0, r0, r3
-	bl	fw_flash_page_prog.constprop.30
-	b	.L2394
-.L2412:
+	bl	fw_flash_page_prog.constprop.29
+	b	.L2352
+.L2370:
 	ldr	r3, [sp, #48]
 	mov	r1, r6
 	subs	r3, r6, r3
@@ -15476,32 +15195,32 @@ idb_write_data:
 	ldr	r3, [sp, #44]
 	adds	r0, r3, r4
 	bl	__aeabi_uidiv
-	ldr	r2, .L2488+4
+	ldr	r2, .L2446+4
 	uxth	r0, r0
-	ldr	r3, .L2488
+	ldr	r3, .L2446
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r2, #0
-	bne	.L2397
+	bne	.L2355
 	mov	r0, r3
-.L2398:
-	ldr	r3, .L2488+16
+.L2356:
+	ldr	r3, .L2446+16
 	ldr	r2, [sp, #68]
 	ldrb	r8, [r3]	@ zero_extendqisi2
 	ldr	r3, [sp, #48]
 	add	r3, r3, r2
-	ldr	r2, .L2488+20
+	ldr	r2, .L2446+20
 	ldrb	r1, [r2, #9]	@ zero_extendqisi2
 	ldr	r2, [sp, #64]
 	mla	r0, r0, r2, r3
 	bl	__aeabi_uidiv
-	ldr	r3, .L2488+24
+	ldr	r3, .L2446+24
 	str	r0, [sp, #40]
 	mov	r0, r8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r3, [sp, #80]
 	bl	nandc_bch_sel
-.L2399:
+.L2357:
 	str	r6, [sp]
 	add	r3, sp, #88
 	mov	r2, r5
@@ -15509,22 +15228,22 @@ idb_write_data:
 	movs	r0, #0
 	bl	flash_read_page
 	adds	r0, r0, #1
-	bne	.L2400
-	ldr	r3, .L2488+28
+	bne	.L2358
+	ldr	r3, .L2446+28
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	mov	r7, r3
 	cmp	r3, #0
-	bne	.L2401
-.L2404:
-	ldr	r3, .L2488+32
+	bne	.L2359
+.L2362:
+	ldr	r3, .L2446+32
 	ldr	r3, [r3]
 	mov	r7, r3
 	cmp	r3, #0
-	bne	.L2402
-.L2403:
-	ldr	r3, .L2488+36
+	bne	.L2360
+.L2361:
+	ldr	r3, .L2446+36
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2406
+	cbz	r3, .L2364
 	str	r6, [sp]
 	add	r3, sp, #88
 	mov	r2, r5
@@ -15532,12 +15251,12 @@ idb_write_data:
 	movs	r0, #0
 	bl	flash_ddr_tuning_read
 	adds	r0, r0, #1
-	bne	.L2400
-.L2406:
+	bne	.L2358
+.L2364:
 	cmp	r8, #16
-	bne	.L2407
+	bne	.L2365
 	mov	r7, #-1
-.L2408:
+.L2366:
 	ldr	r0, [sp, #80]
 	bl	nandc_bch_sel
 	ldr	r3, [sp, #56]
@@ -15548,35 +15267,35 @@ idb_write_data:
 	str	r3, [sp, #56]
 	ldr	r3, [sp, #8]
 	cmp	r3, r2
-	bne	.L2410
+	bne	.L2368
 	cmp	r4, #0
-	bne	.L2410
+	bne	.L2368
 	ldr	r3, [sp, #56]
 	cmp	r3, #0
-	bne	.L2410
+	bne	.L2368
 	ldr	r2, [r5]
-	ldr	r3, .L2488+40
+	ldr	r3, .L2446+40
 	cmp	r2, r3
-	bne	.L2410
+	bne	.L2368
 	ldr	r3, [sp, #60]
 	ldr	r2, [sp, #52]
 	ldrb	r6, [r5, #17]	@ zero_extendqisi2
 	add	r3, r3, r2
 	str	r3, [sp, #60]
-.L2411:
+.L2369:
 	ldr	r3, [sp, #52]
 	add	r3, r3, r4
 	uxth	r4, r3
-	b	.L2396
-.L2397:
-	ldr	r3, .L2488+12
+	b	.L2354
+.L2355:
+	ldr	r3, .L2446+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L2398
+	beq	.L2356
 	lsls	r0, r0, #1
-	b	.L2398
-.L2401:
-	ldr	r3, .L2488+28
+	b	.L2356
+.L2359:
+	ldr	r3, .L2446+28
 	movs	r0, #0
 	mov	r2, r5
 	ldr	r1, [sp, #40]
@@ -15584,14 +15303,14 @@ idb_write_data:
 	add	r3, sp, #88
 	str	r6, [sp]
 	bl	flash_read_page
-	ldr	r3, .L2488+28
+	ldr	r3, .L2446+28
 	adds	r0, r0, #1
 	strb	r7, [r3]
-	beq	.L2404
-.L2400:
+	beq	.L2362
+.L2358:
 	movs	r7, #0
-	b	.L2408
-.L2402:
+	b	.L2366
+.L2360:
 	str	r6, [sp]
 	add	r3, sp, #88
 	mov	r2, r5
@@ -15599,115 +15318,115 @@ idb_write_data:
 	movs	r0, #0
 	blx	r7
 	adds	r0, r0, #1
-	beq	.L2403
-	b	.L2400
-.L2407:
+	beq	.L2361
+	b	.L2358
+.L2365:
 	movs	r0, #16
 	mov	r8, #16
 	bl	nandc_bch_sel
-	b	.L2399
-.L2410:
+	b	.L2357
+.L2368:
 	ldr	r3, [sp, #52]
 	add	r5, r5, r3, lsl #9
 	movs	r3, #0
 	str	r3, [sp, #48]
-	b	.L2411
-.L2416:
+	b	.L2369
+.L2374:
 	ldr	r2, [r0, r4, lsl #2]
 	ldr	r3, [r10, r4, lsl #2]
 	cmp	r2, r3
-	beq	.L2415
+	beq	.L2373
 	mov	r2, #512
 	movs	r1, #0
 	bl	ftl_memset
 	mov	r1, r4
-	ldr	r0, .L2488+44
+	ldr	r0, .L2446+44
 	bl	printf
 	ldr	r1, [sp, #8]
 	movs	r0, #0
 	bl	flash_erase_block
-.L2377:
+.L2335:
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
 	cmp	r3, #4
 	str	r3, [sp, #28]
-	bne	.L2418
-.L2425:
+	bne	.L2376
+.L2383:
 	movs	r0, #0
 	bl	zftl_flash_exit_slc_mode
-	ldr	r3, .L2488+48
+	ldr	r3, .L2446+48
 	ldrb	r2, [sp, #24]	@ zero_extendqisi2
 	strb	r2, [r3]
 	cmp	fp, #0
-	beq	.L2419
-	ldr	r3, .L2488+4
+	beq	.L2377
+	ldr	r3, .L2446+4
 	ldrb	r2, [sp, #12]	@ zero_extendqisi2
 	strb	r2, [r3]
-.L2419:
-	ldr	r3, .L2488+52
+.L2377:
+	ldr	r3, .L2446+52
 	movs	r2, #2
 	movs	r0, #0
 	strb	r2, [r3]
 	bl	zftl_flash_enter_slc_mode
 	ldr	r3, [sp, #16]
-	cbnz	r3, .L2368
+	cbnz	r3, .L2326
 	mov	r1, r3
-	ldr	r0, .L2488+56
+	ldr	r0, .L2446+56
 	bl	printf
-.L2368:
-	ldr	r5, .L2488+60
+.L2326:
+	ldr	r5, .L2446+60
 	movs	r4, #0
-	ldr	r3, .L2488+64
+	ldr	r3, .L2446+64
 	ldr	r0, [r5]
 	str	r4, [r3]
-	ldr	r3, .L2488+68
+	ldr	r3, .L2446+68
 	strb	r4, [r3]
-	cbz	r0, .L2421
+	cbz	r0, .L2379
 	bl	free
 	str	r4, [r5]
-.L2421:
-	ldr	r4, .L2488+72
+.L2379:
+	ldr	r4, .L2446+72
 	ldr	r0, [r4]
-	cbz	r0, .L2423
+	cbz	r0, .L2381
 	bl	free
 	movs	r3, #0
 	str	r3, [r4]
-.L2423:
-	ldr	r3, .L2488+76
+.L2381:
+	ldr	r3, .L2446+76
 	ldr	r2, [sp, #72]
 	str	r2, [r3]
-.L2483:
+.L2441:
 	movs	r0, #0
-.L2355:
+.L2313:
 	add	sp, sp, #152
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2415:
+.L2373:
 	adds	r4, r4, #1
-	b	.L2414
-.L2489:
+	b	.L2372
+.L2447:
 	.align	2
-.L2488:
+.L2446:
 	.word	.LANCHOR3
-	.word	.LANCHOR19
-	.word	.LANCHOR28
+	.word	.LANCHOR24
+	.word	.LANCHOR27
 	.word	.LANCHOR1
-	.word	.LANCHOR17
-	.word	.LANCHOR33
-	.word	.LANCHOR50
-	.word	.LANCHOR52
-	.word	.LANCHOR174
-	.word	.LANCHOR21
+	.word	.LANCHOR22
+	.word	.LANCHOR32
+	.word	.LANCHOR49
+	.word	.LANCHOR51
+	.word	.LANCHOR171
+	.word	.LANCHOR26
 	.word	1179535694
-	.word	.LC136
+	.word	.LC133
 	.word	.LANCHOR0
-	.word	.LANCHOR34
-	.word	.LC137
+	.word	.LANCHOR33
+	.word	.LC134
+	.word	.LANCHOR138
+	.word	.LANCHOR139
+	.word	.LANCHOR140
 	.word	.LANCHOR141
-	.word	.LANCHOR142
-	.word	.LANCHOR143
-	.word	.LANCHOR144
-	.word	.LANCHOR177
+	.word	.LANCHOR174
 	.size	idb_write_data, .-idb_write_data
 	.section	.text.flash_start_tlc_page_prog,"ax",%progbits
 	.align	1
@@ -15726,33 +15445,33 @@ flash_start_tlc_page_prog:
 	ldr	r3, [sp, #56]
 	mov	r4, r0
 	mov	r7, r1
-	ldr	r2, .L2497
+	ldr	r2, .L2455
 	str	r3, [sp, #12]
 	ldr	r5, [sp, #48]
 	ldrb	r3, [r2]	@ zero_extendqisi2
 	mov	fp, r2
 	ldr	r10, [sp, #52]
 	cmp	r3, r6
-	bhi	.L2491
-	movw	r2, #859
-	ldr	r1, .L2497+4
-	ldr	r0, .L2497+8
+	bhi	.L2449
+	mov	r2, #868
+	ldr	r1, .L2455+4
+	ldr	r0, .L2455+8
 	bl	printf
-.L2491:
+.L2449:
 	ldrb	r3, [fp]	@ zero_extendqisi2
 	cmp	r3, r6
-	bls	.L2490
-	ldr	r3, .L2497+12
+	bls	.L2448
+	ldr	r3, .L2455+12
 	ldrb	r6, [r3, r6]	@ zero_extendqisi2
-	ldr	r3, .L2497+16
+	ldr	r3, .L2455+16
 	mov	r0, r6
 	ldr	fp, [r3]
 	bl	nandc_cs
 	lsls	r3, r6, #8
-	cbz	r4, .L2493
+	cbz	r4, .L2451
 	add	r1, fp, r3
 	str	r4, [r1, #2056]
-.L2493:
+.L2451:
 	add	r4, fp, r3
 	movs	r3, #128
 	str	r7, [r4, #2056]
@@ -15770,7 +15489,7 @@ flash_start_tlc_page_prog:
 	subs	r0, r5, #1
 	add	r0, r0, r7
 	bl	nandc_set_seed
-	ldr	r3, .L2497+20
+	ldr	r3, .L2455+20
 	movs	r1, #1
 	mov	r0, r6
 	ldrb	r2, [r3, #9]	@ zero_extendqisi2
@@ -15782,20 +15501,20 @@ flash_start_tlc_page_prog:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
-	b	nandc_de_cs.constprop.33
-.L2490:
+	b	nandc_de_cs.constprop.32
+.L2448:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2498:
+.L2456:
 	.align	2
-.L2497:
-	.word	.LANCHOR18
-	.word	.LANCHOR178
+.L2455:
+	.word	.LANCHOR23
+	.word	.LANCHOR175
 	.word	.LC0
-	.word	.LANCHOR30
-	.word	.LANCHOR13
-	.word	.LANCHOR33
+	.word	.LANCHOR29
+	.word	.LANCHOR7
+	.word	.LANCHOR32
 	.size	flash_start_tlc_page_prog, .-flash_start_tlc_page_prog
 	.section	.text.queue_tlc_prog_cmd,"ax",%progbits
 	.align	1
@@ -15809,7 +15528,7 @@ queue_tlc_prog_cmd:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, lr}
 	movs	r7, #1
-	ldr	r3, .L2503
+	ldr	r3, .L2461
 	mov	r6, r0
 	mov	r8, r1
 	ldr	r2, [r0]
@@ -15817,7 +15536,7 @@ queue_tlc_prog_cmd:
 	ldr	r1, [r2, #24]
 	rsb	r0, r3, #24
 	lsl	r4, r7, r3
-	ldr	r3, .L2503+4
+	ldr	r3, .L2461+4
 	lsl	r5, r7, r0
 	subs	r4, r4, #1
 	subs	r5, r5, #1
@@ -15827,7 +15546,7 @@ queue_tlc_prog_cmd:
 	ands	r4, r4, r1
 	uxtb	r4, r4
 	cmp	r3, #0
-	beq	.L2500
+	beq	.L2458
 	mov	r0, r4
 	bl	zftl_flash_exit_slc_mode
 	ldr	r3, [r6]
@@ -15867,12 +15586,12 @@ queue_tlc_prog_cmd:
 	str	r3, [sp, #4]
 	mov	r3, r4
 	bl	flash_start_one_pass_page_prog
-.L2501:
+.L2459:
 	cmp	r8, #0
-	beq	.L2499
+	beq	.L2457
 	ldr	r1, [r6]
 	movs	r3, #4
-	ldr	r0, .L2503+8
+	ldr	r0, .L2461+8
 	strb	r3, [r1, #42]
 	movs	r3, #1
 	strb	r3, [r1, #43]
@@ -15882,7 +15601,7 @@ queue_tlc_prog_cmd:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, lr}
 	b	buf_add_tail
-.L2500:
+.L2458:
 	ldr	r3, [r2, #12]
 	mov	r1, r7
 	ldrb	r0, [r2, #44]	@ zero_extendqisi2
@@ -15918,17 +15637,17 @@ queue_tlc_prog_cmd:
 	str	r3, [sp, #4]
 	mov	r3, r4
 	bl	flash_start_tlc_page_prog
-	b	.L2501
-.L2499:
+	b	.L2459
+.L2457:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L2504:
+.L2462:
 	.align	2
-.L2503:
-	.word	.LANCHOR32
-	.word	.LANCHOR37
-	.word	.LANCHOR60
+.L2461:
+	.word	.LANCHOR31
+	.word	.LANCHOR36
+	.word	.LANCHOR59
 	.size	queue_tlc_prog_cmd, .-queue_tlc_prog_cmd
 	.section	.text.sblk_3d_tlc_dump_prog,"ax",%progbits
 	.align	1
@@ -15943,14 +15662,14 @@ sblk_3d_tlc_dump_prog:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, lr}
 	movs	r7, #1
-	ldr	r3, .L2508
+	ldr	r3, .L2466
 	mov	r5, r0
 	ldr	r2, [r0, #24]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	rsb	r1, r3, #24
 	lsl	r4, r7, r3
 	lsl	r6, r7, r1
-	ldr	r3, .L2508+4
+	ldr	r3, .L2466+4
 	subs	r6, r6, #1
 	subs	r4, r4, #1
 	ands	r6, r6, r2
@@ -15959,7 +15678,7 @@ sblk_3d_tlc_dump_prog:
 	ands	r4, r4, r2
 	uxtb	r4, r4
 	cmp	r8, #0
-	beq	.L2506
+	beq	.L2464
 	mov	r0, r4
 	bl	zftl_flash_exit_slc_mode
 	ldr	r3, [r5, #12]
@@ -15996,7 +15715,7 @@ sblk_3d_tlc_dump_prog:
 	str	r3, [sp, #4]
 	mov	r3, r4
 	bl	flash_start_one_pass_page_prog
-.L2507:
+.L2465:
 	bl	nandc_wait_flash_ready
 	movs	r1, #64
 	ldr	r0, [r5, #24]
@@ -16004,7 +15723,7 @@ sblk_3d_tlc_dump_prog:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, lr}
 	b	flash_wait_device_ready
-.L2506:
+.L2464:
 	ldr	r3, [r0, #12]
 	mov	r1, r7
 	movs	r2, #26
@@ -16037,12 +15756,12 @@ sblk_3d_tlc_dump_prog:
 	str	r3, [sp, #4]
 	mov	r3, r4
 	bl	flash_start_tlc_page_prog
-	b	.L2507
-.L2509:
+	b	.L2465
+.L2467:
 	.align	2
-.L2508:
-	.word	.LANCHOR32
-	.word	.LANCHOR37
+.L2466:
+	.word	.LANCHOR31
+	.word	.LANCHOR36
 	.size	sblk_3d_tlc_dump_prog, .-sblk_3d_tlc_dump_prog
 	.section	.text.flash_start_3d_mlc_page_prog,"ax",%progbits
 	.align	1
@@ -16057,24 +15776,24 @@ flash_start_3d_mlc_page_prog:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r5, r2
-	ldr	r4, .L2513
+	ldr	r4, .L2471
 	mov	r7, r0
 	mov	r6, r1
 	mov	r8, r3
 	ldrb	r2, [r4]	@ zero_extendqisi2
 	cmp	r2, r1
-	bhi	.L2511
-	mov	r2, #892
-	ldr	r1, .L2513+4
-	ldr	r0, .L2513+8
+	bhi	.L2469
+	movw	r2, #903
+	ldr	r1, .L2471+4
+	ldr	r0, .L2471+8
 	bl	printf
-.L2511:
+.L2469:
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	cmp	r3, r6
-	bls	.L2510
-	ldr	r3, .L2513+12
+	bls	.L2468
+	ldr	r3, .L2471+12
 	ldrb	r6, [r3, r6]	@ zero_extendqisi2
-	ldr	r3, .L2513+16
+	ldr	r3, .L2471+16
 	mov	r0, r6
 	ldr	r4, [r3]
 	bl	nandc_cs
@@ -16092,7 +15811,7 @@ flash_start_3d_mlc_page_prog:
 	lsrs	r3, r5, #16
 	str	r3, [r4, #2052]
 	bl	nandc_set_seed
-	ldr	r3, .L2513+20
+	ldr	r3, .L2471+20
 	movs	r1, #1
 	mov	r0, r6
 	ldrb	r2, [r3, #9]	@ zero_extendqisi2
@@ -16101,19 +15820,19 @@ flash_start_3d_mlc_page_prog:
 	mov	r3, r8
 	bl	nandc_xfer
 	str	r7, [r4, #2056]
-.L2510:
+.L2468:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L2514:
+.L2472:
 	.align	2
-.L2513:
-	.word	.LANCHOR18
-	.word	.LANCHOR179
+.L2471:
+	.word	.LANCHOR23
+	.word	.LANCHOR176
 	.word	.LC0
-	.word	.LANCHOR30
-	.word	.LANCHOR13
-	.word	.LANCHOR33
+	.word	.LANCHOR29
+	.word	.LANCHOR7
+	.word	.LANCHOR32
 	.size	flash_start_3d_mlc_page_prog, .-flash_start_3d_mlc_page_prog
 	.section	.text.sblk_mlc_dump_prog,"ax",%progbits
 	.align	1
@@ -16126,7 +15845,7 @@ flash_start_3d_mlc_page_prog:
 sblk_mlc_dump_prog:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2520
+	ldr	r3, .L2478
 	push	{r0, r1, r4, r5, r6, lr}
 	mov	r5, r0
 	ldr	r2, [r0, #24]
@@ -16143,16 +15862,16 @@ sblk_mlc_dump_prog:
 	uxtb	r4, r4
 	mov	r0, r4
 	bl	zftl_flash_exit_slc_mode
-	ldr	r3, .L2520+4
+	ldr	r3, .L2478+4
 	ldr	r3, [r3]
 	lsls	r3, r3, #19
-	bpl	.L2516
+	bpl	.L2474
 	ldr	r2, [r5, #24]
 	mov	r1, r6
-	ldr	r0, .L2520+8
+	ldr	r0, .L2478+8
 	adds	r3, r2, #1
 	bl	printf
-.L2516:
+.L2474:
 	ldr	r3, [r5, #12]
 	mov	r2, r6
 	mov	r1, r4
@@ -16172,16 +15891,16 @@ sblk_mlc_dump_prog:
 	movs	r1, #64
 	ldr	r0, [r5, #24]
 	bl	flash_wait_device_ready
-	bl	nandc_de_cs.constprop.33
+	bl	nandc_de_cs.constprop.32
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, pc}
-.L2521:
+.L2479:
 	.align	2
-.L2520:
-	.word	.LANCHOR32
-	.word	.LANCHOR14
-	.word	.LC138
+.L2478:
+	.word	.LANCHOR31
+	.word	.LANCHOR19
+	.word	.LC135
 	.size	sblk_mlc_dump_prog, .-sblk_mlc_dump_prog
 	.section	.text.flash_start_page_prog,"ax",%progbits
 	.align	1
@@ -16198,8 +15917,8 @@ flash_start_page_prog:
 	mov	fp, r2
 	str	r3, [sp, #12]
 	mov	r8, r1
-	ldr	r3, .L2536
-	ldr	r6, .L2536+4
+	ldr	r3, .L2494
+	ldr	r6, .L2494+4
 	str	r0, [sp, #8]
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	movs	r3, #1
@@ -16211,45 +15930,45 @@ flash_start_page_prog:
 	ldrb	r2, [r6]	@ zero_extendqisi2
 	uxtb	r10, r3
 	cmp	r2, r10
-	bhi	.L2523
-	movw	r2, #945
-	ldr	r1, .L2536+8
-	ldr	r0, .L2536+12
+	bhi	.L2481
+	mov	r2, #956
+	ldr	r1, .L2494+8
+	ldr	r0, .L2494+12
 	bl	printf
-.L2523:
+.L2481:
 	ldrb	r2, [r6]	@ zero_extendqisi2
 	cmp	r2, r10
-	bls	.L2522
+	bls	.L2480
 	movs	r2, #1
 	lsl	r4, r2, r4
-	ldr	r2, .L2536+16
+	ldr	r2, .L2494+16
 	subs	r4, r4, #1
 	ldrb	r5, [r2, r10]	@ zero_extendqisi2
 	and	r4, r4, r8
-	ldr	r2, .L2536+20
+	ldr	r2, .L2494+20
 	ldr	r7, [r2]
 	bl	nandc_rdy_status
-	cbnz	r0, .L2525
+	cbnz	r0, .L2483
 	ldrb	r2, [r6]	@ zero_extendqisi2
 	cmp	r2, #1
-	bne	.L2526
+	bne	.L2484
 	bl	nandc_wait_flash_ready
-.L2525:
+.L2483:
 	mov	r0, r5
 	bl	hynix_reconfig_rr_para
 	mov	r0, r5
 	bl	nandc_cs
 	tst	r8, #50331648
-	bne	.L2527
+	bne	.L2485
 	mov	r0, r4
 	bl	slc_phy_page_address_calc
-	ldr	r3, .L2536+24
+	ldr	r3, .L2494+24
 	mov	r4, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2528
+	cbz	r3, .L2486
 	mov	r0, r5
 	bl	zftl_flash_enter_slc_mode
-.L2528:
+.L2486:
 	lsls	r6, r5, #8
 	movs	r2, #128
 	adds	r3, r7, r6
@@ -16263,16 +15982,16 @@ flash_start_page_prog:
 	str	r2, [r3, #2052]
 	lsrs	r2, r4, #16
 	str	r2, [r3, #2052]
-	ldr	r2, .L2536+28
+	ldr	r2, .L2494+28
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbz	r2, .L2529
+	cbz	r2, .L2487
 	lsrs	r2, r4, #24
 	str	r2, [r3, #2052]
-.L2529:
+.L2487:
 	mov	r0, r4
 	add	r7, r7, r6
 	bl	nandc_set_seed
-	ldr	r3, .L2536+32
+	ldr	r3, .L2494+32
 	movs	r1, #1
 	mov	r0, r5
 	ldrb	r2, [r3, #9]	@ zero_extendqisi2
@@ -16285,33 +16004,33 @@ flash_start_page_prog:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
-	b	nandc_de_cs.constprop.33
-.L2526:
+	b	nandc_de_cs.constprop.32
+.L2484:
 	movs	r2, #64
 	mov	r1, r4
 	mov	r0, r10
 	bl	flash_wait_device_ready_raw
-	b	.L2525
-.L2527:
+	b	.L2483
+.L2485:
 	mov	r0, r5
 	bl	zftl_flash_exit_slc_mode
-	b	.L2528
-.L2522:
+	b	.L2486
+.L2480:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2537:
+.L2495:
 	.align	2
-.L2536:
-	.word	.LANCHOR32
-	.word	.LANCHOR18
-	.word	.LANCHOR180
+.L2494:
+	.word	.LANCHOR31
+	.word	.LANCHOR23
+	.word	.LANCHOR177
 	.word	.LC0
-	.word	.LANCHOR30
-	.word	.LANCHOR13
+	.word	.LANCHOR29
+	.word	.LANCHOR7
 	.word	.LANCHOR0
-	.word	.LANCHOR31
-	.word	.LANCHOR33
+	.word	.LANCHOR30
+	.word	.LANCHOR32
 	.size	flash_start_page_prog, .-flash_start_page_prog
 	.section	.text.queue_prog_cmd,"ax",%progbits
 	.align	1
@@ -16330,14 +16049,14 @@ queue_prog_cmd:
 	ldr	r1, [r0, #24]
 	movs	r0, #16
 	bl	flash_start_page_prog
-	ldr	r3, .L2546
+	ldr	r3, .L2504
 	ldr	r2, [r4, #24]
 	ldrb	r0, [r3]	@ zero_extendqisi2
 	cmp	r0, #255
-	beq	.L2539
-	ldr	r3, .L2546+4
+	beq	.L2497
+	ldr	r3, .L2504+4
 	movs	r7, #48
-	ldr	ip, .L2546+8
+	ldr	ip, .L2504+8
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	movs	r3, #1
 	mov	lr, ip
@@ -16347,20 +16066,20 @@ queue_prog_cmd:
 	subs	r3, r3, #1
 	uxth	r3, r3
 	ands	r2, r2, r3
-.L2541:
+.L2499:
 	mla	r5, r7, r0, ip
 	ldr	r1, [r5, #24]
 	lsrs	r1, r1, r6
 	ands	r1, r1, r3
 	cmp	r2, r1
-	bne	.L2540
+	bne	.L2498
 	add	r1, r5, #42
 	ldrb	r5, [r5, #42]	@ zero_extendqisi2
 	cmp	r5, #7
-	bne	.L2540
+	bne	.L2498
 	movs	r3, #3
 	strb	r3, [r1]
-.L2539:
+.L2497:
 	movs	r3, #3
 	mov	r1, r4
 	strb	r3, [r4, #42]
@@ -16368,21 +16087,21 @@ queue_prog_cmd:
 	strb	r3, [r4, #43]
 	movs	r3, #255
 	strb	r3, [r4]
-	ldr	r0, .L2546
+	ldr	r0, .L2504
 	pop	{r3, r4, r5, r6, r7, lr}
 	b	buf_add_tail
-.L2540:
+.L2498:
 	muls	r0, r7, r0
 	ldrb	r0, [lr, r0]	@ zero_extendqisi2
 	cmp	r0, #255
-	bne	.L2541
-	b	.L2539
-.L2547:
+	bne	.L2499
+	b	.L2497
+.L2505:
 	.align	2
-.L2546:
-	.word	.LANCHOR60
-	.word	.LANCHOR32
-	.word	.LANCHOR56
+.L2504:
+	.word	.LANCHOR59
+	.word	.LANCHOR31
+	.word	.LANCHOR55
 	.size	queue_prog_cmd, .-queue_prog_cmd
 	.section	.text.flash_complete_plane_page_read,"ax",%progbits
 	.align	1
@@ -16395,7 +16114,7 @@ queue_prog_cmd:
 flash_complete_plane_page_read:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2578
+	ldr	r3, .L2536
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
 	movs	r5, #1
 	mov	r8, r2
@@ -16407,47 +16126,47 @@ flash_complete_plane_page_read:
 	lsr	r3, r0, r4
 	subs	r5, r5, #1
 	ands	r5, r5, r3
-	ldr	r3, .L2578+4
+	ldr	r3, .L2536+4
 	uxtb	r5, r5
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	mov	r10, r3
 	cmp	r2, r5
-	bhi	.L2549
-	movw	r2, #1055
-	ldr	r1, .L2578+8
-	ldr	r0, .L2578+12
+	bhi	.L2507
+	movw	r2, #1070
+	ldr	r1, .L2536+8
+	ldr	r0, .L2536+12
 	bl	printf
-.L2549:
+.L2507:
 	ldrb	r3, [r10]	@ zero_extendqisi2
 	cmp	r3, r5
-	bls	.L2560
-	ldr	r3, .L2578+16
+	bls	.L2518
+	ldr	r3, .L2536+16
 	movs	r0, #1
 	lsl	r4, r0, r4
 	ldrb	r10, [r3, r5]	@ zero_extendqisi2
 	subs	r4, r4, #1
-	ldr	r3, .L2578+20
+	ldr	r3, .L2536+20
 	ands	r4, r4, r6
 	ubfx	r6, r6, #24, #2
 	mov	r0, r10
 	ldr	r5, [r3]
 	bl	nandc_cs
-	cbnz	r6, .L2551
+	cbnz	r6, .L2509
 	mov	r0, r4
 	bl	slc_phy_page_address_calc
 	mov	r4, r0
-.L2551:
-	ldr	r3, .L2578+24
+.L2509:
+	ldr	r3, .L2536+24
 	uxtb	ip, r4
 	lsrs	r0, r4, #8
 	lsrs	r1, r4, #16
 	ldrb	r3, [r3, #16]	@ zero_extendqisi2
 	cmp	r3, #1
 	lsl	r3, r10, #8
-	bne	.L2552
+	bne	.L2510
 	adds	r2, r5, r3
 	mov	lr, #6
-.L2577:
+.L2535:
 	str	lr, [r2, #2056]
 	mov	lr, #0
 	str	lr, [r2, #2052]
@@ -16455,58 +16174,58 @@ flash_complete_plane_page_read:
 	str	ip, [r2, #2052]
 	str	r0, [r2, #2052]
 	str	r1, [r2, #2052]
-	ldr	r1, .L2578+28
+	ldr	r1, .L2536+28
 	ldrb	r1, [r1]	@ zero_extendqisi2
-	cbz	r1, .L2556
+	cbz	r1, .L2514
 	lsrs	r1, r4, #24
 	str	r1, [r2, #2052]
-.L2556:
+.L2514:
 	add	r3, r3, r5
-.L2573:
+.L2531:
 	movs	r2, #224
 	str	r2, [r3, #2056]
-	ldr	r3, .L2578+32
+	ldr	r3, .L2536+32
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #12]	@ zero_extendqisi2
 	cmp	r3, #3
-	bne	.L2558
+	bne	.L2516
 	cmp	r6, #0
-	beq	.L2558
-	ldr	r3, .L2578+36
+	beq	.L2516
+	ldr	r3, .L2536+36
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L2558
-	ldr	r3, .L2578+40
+	bne	.L2516
+	ldr	r3, .L2536+40
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L2558
+	bne	.L2516
 	add	r4, r4, r4, lsl #1
 	subs	r6, r6, #1
 	adds	r0, r4, r6
-.L2574:
+.L2532:
 	bl	nandc_set_seed
-	ldr	r3, .L2578+44
+	ldr	r3, .L2536+44
 	movs	r1, #0
 	mov	r0, r10
 	ldrb	r2, [r3, #9]	@ zero_extendqisi2
 	mov	r3, r7
 	str	r8, [sp]
 	bl	nandc_xfer
-	bl	nandc_de_cs.constprop.33
-.L2548:
+	bl	nandc_de_cs.constprop.32
+.L2506:
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L2552:
-	ldr	r2, .L2578+32
+.L2510:
+	ldr	r2, .L2536+32
 	ldr	r2, [r2]
 	ldrb	r2, [r2, #12]	@ zero_extendqisi2
 	cmp	r2, #3
 	add	r2, r5, r3
-	bne	.L2555
+	bne	.L2513
 	mov	lr, #5
-	b	.L2577
-.L2555:
+	b	.L2535
+.L2513:
 	mov	lr, #0
 	str	lr, [r2, #2056]
 	str	lr, [r2, #2052]
@@ -16514,40 +16233,40 @@ flash_complete_plane_page_read:
 	str	ip, [r2, #2052]
 	str	r0, [r2, #2052]
 	str	r1, [r2, #2052]
-	ldr	r1, .L2578+28
+	ldr	r1, .L2536+28
 	ldrb	r1, [r1]	@ zero_extendqisi2
-	cbz	r1, .L2557
+	cbz	r1, .L2515
 	lsrs	r1, r4, #24
 	str	r1, [r2, #2052]
-.L2557:
+.L2515:
 	movs	r1, #5
 	add	r3, r3, r5
 	str	r1, [r3, #2056]
 	movs	r1, #0
 	str	r1, [r2, #2052]
 	str	r1, [r2, #2052]
-	b	.L2573
-.L2558:
+	b	.L2531
+.L2516:
 	mov	r0, r4
-	b	.L2574
-.L2560:
+	b	.L2532
+.L2518:
 	mov	r0, #-1
-	b	.L2548
-.L2579:
+	b	.L2506
+.L2537:
 	.align	2
-.L2578:
-	.word	.LANCHOR32
-	.word	.LANCHOR18
-	.word	.LANCHOR181
+.L2536:
+	.word	.LANCHOR31
+	.word	.LANCHOR23
+	.word	.LANCHOR178
 	.word	.LC0
+	.word	.LANCHOR29
+	.word	.LANCHOR7
+	.word	.LANCHOR25
 	.word	.LANCHOR30
-	.word	.LANCHOR13
-	.word	.LANCHOR20
-	.word	.LANCHOR31
-	.word	.LANCHOR16
+	.word	.LANCHOR21
+	.word	.LANCHOR35
 	.word	.LANCHOR36
-	.word	.LANCHOR37
-	.word	.LANCHOR33
+	.word	.LANCHOR32
 	.size	flash_complete_plane_page_read, .-flash_complete_plane_page_read
 	.section	.text.flash_complete_page_read,"ax",%progbits
 	.align	1
@@ -16561,9 +16280,9 @@ flash_complete_page_read:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r10, r0
-	ldr	r3, .L2611
-	mov	r8, r1
+	mov	fp, r0
+	ldr	r3, .L2569
+	mov	r10, r1
 	ubfx	r5, r0, #24, #2
 	str	r2, [sp, #8]
 	ldrb	r6, [r3]	@ zero_extendqisi2
@@ -16571,7 +16290,7 @@ flash_complete_page_read:
 	rsb	r2, r6, #24
 	lsl	r4, r3, r2
 	lsl	r6, r3, r6
-	ldr	r3, .L2611+4
+	ldr	r3, .L2569+4
 	lsr	r2, r0, r2
 	subs	r6, r6, #1
 	ands	r6, r6, r2
@@ -16580,180 +16299,177 @@ flash_complete_page_read:
 	uxtb	r6, r6
 	ands	r4, r4, r0
 	cmp	r3, r6
-	bhi	.L2581
-	movw	r2, #1212
-	ldr	r1, .L2611+8
-	ldr	r0, .L2611+12
+	bhi	.L2539
+	mov	r2, #1232
+	ldr	r1, .L2569+8
+	ldr	r0, .L2569+12
 	bl	printf
-.L2581:
-	ldr	r3, .L2611+16
-	ldrb	r7, [r3, r6]	@ zero_extendqisi2
-	ldr	r3, .L2611+20
-	mov	r0, r7
-	ldr	fp, [r3]
+.L2539:
+	ldr	r3, .L2569+16
+	ldrb	r8, [r3, r6]	@ zero_extendqisi2
+	ldr	r3, .L2569+20
+	mov	r0, r8
+	ldr	r6, [r3]
 	bl	nandc_cs
-	cbnz	r5, .L2582
+	cbnz	r5, .L2540
 	mov	r0, r4
 	bl	slc_phy_page_address_calc
 	mov	r4, r0
-.L2582:
-	lsls	r2, r7, #8
-	ldr	r6, .L2611+24
-	movs	r1, #5
-	add	r3, fp, r2
-	str	r1, [r3, #2056]
-	movs	r1, #0
-	str	r1, [r3, #2052]
-	str	r1, [r3, #2052]
-	ldrb	r1, [r6, #12]	@ zero_extendqisi2
-	cmp	r1, #3
-	bne	.L2583
-	uxtb	r1, r4
-	str	r1, [r3, #2052]
-	lsrs	r1, r4, #8
-	str	r1, [r3, #2052]
-	lsrs	r1, r4, #16
-	str	r1, [r3, #2052]
-.L2583:
-	movs	r3, #224
-	add	fp, fp, r2
-	str	r3, [fp, #2056]
-	ldr	r3, .L2611+28
+.L2540:
+	ldr	r7, .L2569+24
+	ldrb	r3, [r7, #12]	@ zero_extendqisi2
+	cmp	r3, #3
+	bne	.L2541
+	add	r6, r6, r8, lsl #8
+	movs	r3, #5
+	str	r3, [r6, #2056]
+	movs	r3, #0
+	str	r3, [r6, #2052]
+	str	r3, [r6, #2052]
+	uxtb	r3, r4
+	str	r3, [r6, #2052]
+	lsrs	r3, r4, #8
+	str	r3, [r6, #2052]
+	lsrs	r3, r4, #16
+	str	r3, [r6, #2052]
+	movs	r3, #224
+	str	r3, [r6, #2056]
+.L2541:
+	ldr	r3, .L2569+28
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #12]	@ zero_extendqisi2
 	cmp	r3, #3
-	bne	.L2584
+	bne	.L2542
 	cmp	r5, #0
-	beq	.L2584
-	ldr	r3, .L2611+32
+	beq	.L2542
+	ldr	r3, .L2569+32
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L2584
-	ldr	r3, .L2611+36
+	bne	.L2542
+	ldr	r3, .L2569+36
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L2584
+	bne	.L2542
 	add	r3, r4, r4, lsl #1
 	subs	r0, r5, #1
 	add	r0, r0, r3
-.L2610:
+.L2568:
 	bl	nandc_set_seed
 	ldr	r3, [sp, #8]
 	movs	r1, #0
-	ldrb	r2, [r6, #9]	@ zero_extendqisi2
-	mov	r0, r7
+	ldrb	r2, [r7, #9]	@ zero_extendqisi2
+	mov	r0, r8
 	str	r3, [sp]
-	mov	r3, r8
+	mov	r3, r10
 	bl	nandc_xfer
 	adds	r1, r0, #1
-	bne	.L2586
-	ldr	fp, .L2611+52
-	ldrb	r3, [fp]	@ zero_extendqisi2
+	bne	.L2544
+	ldr	r6, .L2569+40
+	ldrb	r3, [r6]	@ zero_extendqisi2
 	str	r3, [sp, #12]
 	cmp	r3, #0
-	beq	.L2587
+	beq	.L2545
 	movs	r3, #0
-	mov	r2, r8
-	strb	r3, [fp]
+	mov	r2, r10
+	strb	r3, [r6]
 	orr	r1, r4, r5, lsl #24
-	ldrb	r3, [r6, #9]	@ zero_extendqisi2
-	mov	r0, r7
+	ldrb	r3, [r7, #9]	@ zero_extendqisi2
+	mov	r0, r8
 	str	r3, [sp]
 	ldr	r3, [sp, #8]
 	bl	flash_read_page
 	ldrb	r3, [sp, #12]	@ zero_extendqisi2
-	strb	r3, [fp]
-	cbnz	r5, .L2588
-.L2593:
-	ldr	r3, .L2611+40
+	strb	r3, [r6]
+	cbnz	r5, .L2546
+.L2551:
+	ldr	r3, .L2569+44
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2588
-	ldr	r3, .L2611+44
+	cbz	r3, .L2546
+	ldr	r3, .L2569+48
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r0, r3, asr #2
-	blt	.L2588
-	ldrb	r3, [r6, #19]	@ zero_extendqisi2
+	blt	.L2546
+	ldrb	r3, [r7, #19]	@ zero_extendqisi2
 	subs	r3, r3, #4
 	cmp	r3, #4
 	it	ls
 	movls	r0, #256
-.L2580:
+.L2538:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2584:
+.L2542:
 	mov	r0, r4
-	b	.L2610
-.L2588:
+	b	.L2568
+.L2546:
 	adds	r2, r0, #1
-	bne	.L2580
-.L2594:
-	ldr	r3, .L2611+48
-	ldr	fp, [r3]
-	cmp	fp, #0
-	bne	.L2590
-.L2592:
-	ldr	r3, .L2611+52
-	mov	r2, r10
+	bne	.L2538
+.L2552:
+	ldr	r3, .L2569+52
+	ldr	r6, [r3]
+	cbnz	r6, .L2548
+.L2550:
+	ldr	r3, .L2569+40
+	mov	r2, fp
 	movs	r1, #0
-	ldr	r0, .L2611+56
+	ldr	r0, .L2569+56
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r3, [sp]
 	mov	r3, #-1
 	bl	printf
-	ldr	r3, .L2611+60
+	ldr	r3, .L2569+60
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L2591
+	cbnz	r3, .L2549
 	mov	r0, #-1
-	b	.L2580
-.L2590:
-	ldrb	r3, [r6, #9]	@ zero_extendqisi2
-	mov	r2, r8
+	b	.L2538
+.L2548:
+	ldrb	r3, [r7, #9]	@ zero_extendqisi2
+	mov	r2, r10
 	orr	r1, r4, r5, lsl #24
-	mov	r0, r7
+	mov	r0, r8
 	str	r3, [sp]
 	ldr	r3, [sp, #8]
-	blx	fp
+	blx	r6
 	adds	r3, r0, #1
-	beq	.L2592
-	b	.L2580
-.L2591:
-	ldrb	r3, [r6, #9]	@ zero_extendqisi2
-	mov	r2, r8
+	beq	.L2550
+	b	.L2538
+.L2549:
+	ldrb	r3, [r7, #9]	@ zero_extendqisi2
+	mov	r2, r10
 	orr	r1, r4, r5, lsl #24
-	mov	r0, r7
+	mov	r0, r8
 	str	r3, [sp]
 	ldr	r3, [sp, #8]
 	bl	flash_ddr_tuning_read
-	b	.L2580
-.L2587:
+	b	.L2538
+.L2545:
 	cmp	r5, #0
-	beq	.L2593
-	b	.L2594
-.L2586:
+	beq	.L2551
+	b	.L2552
+.L2544:
 	cmp	r5, #0
-	bne	.L2580
-	b	.L2593
-.L2612:
+	bne	.L2538
+	b	.L2551
+.L2570:
 	.align	2
-.L2611:
-	.word	.LANCHOR32
-	.word	.LANCHOR18
-	.word	.LANCHOR182
+.L2569:
+	.word	.LANCHOR31
+	.word	.LANCHOR23
+	.word	.LANCHOR179
 	.word	.LC0
-	.word	.LANCHOR30
-	.word	.LANCHOR13
-	.word	.LANCHOR33
-	.word	.LANCHOR16
+	.word	.LANCHOR29
+	.word	.LANCHOR7
+	.word	.LANCHOR32
+	.word	.LANCHOR21
+	.word	.LANCHOR35
 	.word	.LANCHOR36
-	.word	.LANCHOR37
+	.word	.LANCHOR51
 	.word	.LANCHOR0
-	.word	.LANCHOR50
-	.word	.LANCHOR174
-	.word	.LANCHOR52
-	.word	.LC139
-	.word	.LANCHOR21
+	.word	.LANCHOR49
+	.word	.LANCHOR171
+	.word	.LC136
+	.word	.LANCHOR26
 	.size	flash_complete_page_read, .-flash_complete_page_read
 	.section	.text.queue_wait_first_req_completed,"ax",%progbits
 	.align	1
@@ -16766,100 +16482,90 @@ queue_wait_first_req_completed:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L2712
+	ldr	r3, .L2664
 	ldrb	r5, [r3]	@ zero_extendqisi2
 	cmp	r5, #255
-	bne	.L2614
-.L2647:
+	bne	.L2572
+.L2605:
 	movs	r6, #0
-	b	.L2613
-.L2614:
-	ldr	r4, .L2712+4
-	movs	r3, #48
-	mla	r3, r3, r5, r4
-	ldrb	r2, [r3, #42]	@ zero_extendqisi2
-	ldr	r6, [r3, #24]
-	subs	r3, r2, #1
-	cmp	r3, #10
-	bhi	.L2647
-	tbh	[pc, r3, lsl #1]
-.L2617:
-	.2byte	(.L2616-.L2617)/2
-	.2byte	(.L2618-.L2617)/2
-	.2byte	(.L2619-.L2617)/2
-	.2byte	(.L2619-.L2617)/2
-	.2byte	(.L2619-.L2617)/2
-	.2byte	(.L2619-.L2617)/2
-	.2byte	(.L2620-.L2617)/2
-	.2byte	(.L2621-.L2617)/2
-	.2byte	(.L2622-.L2617)/2
-	.2byte	(.L2619-.L2617)/2
-	.2byte	(.L2622-.L2617)/2
+	b	.L2571
+.L2572:
+	ldr	r4, .L2664+4
+	movs	r7, #48
+	mla	r2, r7, r5, r4
+	ldrb	r3, [r2, #42]	@ zero_extendqisi2
+	ldr	r6, [r2, #24]
+	subs	r2, r3, #1
+	cmp	r2, #10
+	bhi	.L2605
+	tbh	[pc, r2, lsl #1]
+.L2575:
+	.2byte	(.L2574-.L2575)/2
+	.2byte	(.L2576-.L2575)/2
+	.2byte	(.L2577-.L2575)/2
+	.2byte	(.L2577-.L2575)/2
+	.2byte	(.L2577-.L2575)/2
+	.2byte	(.L2577-.L2575)/2
+	.2byte	(.L2578-.L2575)/2
+	.2byte	(.L2579-.L2575)/2
+	.2byte	(.L2580-.L2575)/2
+	.2byte	(.L2577-.L2575)/2
+	.2byte	(.L2580-.L2575)/2
 	.p2align 1
-.L2616:
-	movs	r1, #64
-	mov	r0, r6
-	bl	flash_wait_device_ready
-	lsls	r0, r0, #25
-	bpl	.L2647
-	movs	r3, #48
-	mla	r3, r3, r5, r4
-	ldr	r2, [r3, #8]
-	ldr	r1, [r3, #4]
-	cbz	r2, .L2624
-	ldrb	r0, [r3, #40]	@ zero_extendqisi2
-	ldr	r3, .L2712+8
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r0, r3
+.L2574:
+	mla	r7, r7, r5, r4
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r7, #8]
+	ldr	r1, [r7, #4]
+	cbz	r3, .L2581
+	ldr	r2, .L2664+8
+	ldrb	r0, [r7, #40]	@ zero_extendqisi2
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r0, r2
 	it	eq
-	moveq	r1, r2
-.L2624:
+	moveq	r1, r3
+.L2581:
 	movs	r3, #48
 	mov	r0, r6
 	mla	r4, r3, r5, r4
 	ldr	r2, [r4, #12]
 	bl	flash_complete_page_read
 	str	r0, [r4, #36]
-.L2711:
+.L2663:
 	movs	r3, #13
 	strb	r3, [r4, #42]
 	ldrb	r3, [r4, #2]	@ zero_extendqisi2
 	orr	r3, r3, #8
 	strb	r3, [r4, #2]
-	b	.L2647
-.L2618:
-	movs	r1, #64
-	mov	r0, r6
-	bl	flash_wait_device_ready
-	lsls	r1, r0, #25
-	bpl	.L2647
-	movs	r3, #48
-	mul	r1, r3, r5
-	ldrb	r6, [r4, r1]	@ zero_extendqisi2
-	adds	r2, r4, r1
-	ldr	fp, [r2, #4]
-	mla	r3, r3, r6, r4
-	ldr	r10, [r3, #4]
-	ldr	r3, [r2, #8]
-	cbz	r3, .L2625
-	ldrb	r1, [r2, #40]	@ zero_extendqisi2
-	ldr	r2, .L2712+8
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cmp	r1, r2
+	b	.L2605
+.L2576:
+	bl	nandc_wait_flash_ready
+	mul	r2, r7, r5
+	ldrb	r6, [r4, r2]	@ zero_extendqisi2
+	adds	r3, r4, r2
+	ldr	r2, [r3, #8]
+	ldr	fp, [r3, #4]
+	mla	r7, r7, r6, r4
+	ldr	r10, [r7, #4]
+	cbz	r2, .L2582
+	ldrb	r1, [r3, #40]	@ zero_extendqisi2
+	ldr	r3, .L2664+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r1, r3
 	it	eq
-	moveq	fp, r3
-.L2625:
+	moveq	fp, r2
+.L2582:
 	movs	r3, #48
 	mla	r3, r3, r6, r4
 	ldr	r2, [r3, #8]
-	cbz	r2, .L2626
+	cbz	r2, .L2583
 	ldrb	r1, [r3, #40]	@ zero_extendqisi2
-	ldr	r3, .L2712+8
+	ldr	r3, .L2664+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r1, r3
 	it	eq
 	moveq	r10, r2
-.L2626:
+.L2583:
 	movs	r3, #48
 	mov	r1, fp
 	mla	r7, r3, r5, r4
@@ -16876,17 +16582,17 @@ queue_wait_first_req_completed:
 	bl	flash_complete_plane_page_read
 	cmp	r8, #-1
 	str	r0, [sp, #12]
-	beq	.L2627
+	beq	.L2584
 	ldr	r3, [r7, #20]
 	adds	r2, r3, #1
-	beq	.L2628
+	beq	.L2585
 	ldr	r2, [r7, #12]
 	ldr	r2, [r2, #4]
 	cmp	r3, r2
-	beq	.L2628
-.L2627:
+	beq	.L2585
+.L2584:
 	movs	r7, #48
-	ldr	r3, .L2712+12
+	ldr	r3, .L2664+12
 	mla	r7, r7, r5, r4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	movs	r0, #1
@@ -16898,7 +16604,7 @@ queue_wait_first_req_completed:
 	lsl	ip, r3, r2
 	mov	r2, fp
 	ands	r0, r0, r3
-	ldr	r3, .L2712+8
+	ldr	r3, .L2664+8
 	bic	r1, r1, ip
 	uxtb	r0, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
@@ -16908,35 +16614,35 @@ queue_wait_first_req_completed:
 	ldr	r2, [r7, #20]
 	mov	r8, r0
 	adds	r3, r2, #1
-	beq	.L2629
+	beq	.L2586
 	ldr	r3, [r7, #12]
 	ldr	r1, [r3, #4]
 	cmp	r2, r1
-	beq	.L2629
-	ldr	r0, .L2712+16
+	beq	.L2586
+	ldr	r0, .L2664+16
 	ldr	r0, [r0]
 	lsls	r0, r0, #25
-	bpl	.L2629
+	bpl	.L2586
 	str	r1, [sp]
 	ldr	r1, [r7, #24]
 	ldr	r3, [r3]
-	ldr	r0, .L2712+20
+	ldr	r0, .L2664+20
 	bl	printf
-.L2629:
+.L2586:
 	movs	r3, #48
 	mla	r3, r3, r5, r4
 	ldr	r2, [r3, #20]
 	adds	r0, r2, #1
-	beq	.L2628
+	beq	.L2585
 	ldr	r3, [r3, #12]
 	ldr	r3, [r3, #4]
 	cmp	r2, r3
-	beq	.L2628
-	mov	r2, #430
-	ldr	r1, .L2712+24
-	ldr	r0, .L2712+28
+	beq	.L2585
+	movw	r2, #431
+	ldr	r1, .L2664+24
+	ldr	r0, .L2664+28
 	bl	printf
-.L2628:
+.L2585:
 	movs	r3, #48
 	movs	r2, #13
 	mla	r5, r3, r5, r4
@@ -16947,17 +16653,17 @@ queue_wait_first_req_completed:
 	strb	r2, [r5, #2]
 	ldr	r2, [sp, #12]
 	adds	r2, r2, #1
-	beq	.L2630
+	beq	.L2587
 	mla	r3, r3, r6, r4
 	ldr	r2, [r3, #20]
 	adds	r1, r2, #1
-	beq	.L2632
+	beq	.L2589
 	ldr	r3, [r3, #12]
 	ldr	r3, [r3, #4]
 	cmp	r2, r3
-	beq	.L2632
-.L2630:
-	ldr	r3, .L2712+12
+	beq	.L2589
+.L2587:
+	ldr	r3, .L2664+12
 	movs	r5, #48
 	mla	r5, r5, r6, r4
 	ldrb	r2, [r3]	@ zero_extendqisi2
@@ -16970,7 +16676,7 @@ queue_wait_first_req_completed:
 	lsl	r7, r0, r3
 	lsr	r3, r1, r3
 	ands	r0, r0, r3
-	ldr	r3, .L2712+8
+	ldr	r3, .L2664+8
 	bic	r1, r1, r7
 	uxtb	r0, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
@@ -16979,101 +16685,101 @@ queue_wait_first_req_completed:
 	bl	flash_read_page_en
 	ldr	r2, [r5, #20]
 	adds	r3, r2, #1
-	beq	.L2634
+	beq	.L2591
 	ldr	r3, [r5, #12]
 	ldr	r1, [r3, #4]
 	cmp	r2, r1
-	beq	.L2634
-	ldr	r0, .L2712+16
+	beq	.L2591
+	ldr	r0, .L2664+16
 	ldr	r0, [r0]
 	lsls	r7, r0, #25
-	bpl	.L2634
+	bpl	.L2591
 	str	r1, [sp]
-	ldr	r0, .L2712+20
+	ldr	r0, .L2664+20
 	ldr	r3, [r3]
 	ldr	r1, [r5, #24]
 	bl	printf
-.L2634:
+.L2591:
 	movs	r3, #48
 	mla	r3, r3, r6, r4
 	ldr	r2, [r3, #20]
 	adds	r0, r2, #1
-	beq	.L2632
+	beq	.L2589
 	ldr	r3, [r3, #12]
 	ldr	r3, [r3, #4]
 	cmp	r2, r3
-	beq	.L2632
-	movw	r2, #449
-	ldr	r1, .L2712+24
-	ldr	r0, .L2712+28
+	beq	.L2589
+	mov	r2, #450
+	ldr	r1, .L2664+24
+	ldr	r0, .L2664+28
 	bl	printf
-.L2632:
+.L2589:
 	movs	r3, #48
 	mla	r4, r3, r6, r4
 	str	r8, [r4, #36]
-	b	.L2711
-.L2619:
+	b	.L2663
+.L2577:
 	movs	r1, #64
 	mov	r0, r6
 	bl	flash_wait_device_ready
 	lsls	r1, r0, #25
 	mov	r6, r0
-	bpl	.L2647
+	bpl	.L2605
 	ands	r2, r0, #5
 	mov	r3, #48
-	beq	.L2635
+	beq	.L2593
 	mla	r4, r3, r5, r4
 	movs	r3, #12
 	mov	r2, r0
-	ldr	r0, .L2712+32
+	ldr	r0, .L2664+32
 	strb	r3, [r4, #42]
 	ldrb	r1, [r4, #1]	@ zero_extendqisi2
 	str	r3, [sp]
 	ldr	r3, [r4, #24]
 	bl	printf
-.L2710:
+.L2662:
 	mov	r3, #-1
 	str	r3, [r4, #36]
-	b	.L2613
-.L2713:
+	b	.L2571
+.L2665:
 	.align	2
-.L2712:
-	.word	.LANCHOR60
-	.word	.LANCHOR56
+.L2664:
+	.word	.LANCHOR59
+	.word	.LANCHOR55
 	.word	.LANCHOR131
-	.word	.LANCHOR32
-	.word	.LANCHOR14
-	.word	.LC140
-	.word	.LANCHOR183
+	.word	.LANCHOR31
+	.word	.LANCHOR19
+	.word	.LC137
+	.word	.LANCHOR180
 	.word	.LC0
-	.word	.LC141
-.L2635:
+	.word	.LC138
+.L2593:
 	mla	r6, r3, r5, r4
 	movs	r3, #13
 	strb	r3, [r6, #42]
-	ldr	r3, .L2714
+	ldr	r3, .L2666
 	str	r2, [r6, #36]
 	ldr	r3, [r3]
 	ldr	r2, [r3, #156]
-	ldr	r3, .L2714+4
+	ldr	r3, .L2666+4
 	cmp	r2, r3
-	bne	.L2647
+	bne	.L2605
 	ldrh	r3, [r6, #34]
 	cmp	r3, #0
-	bne	.L2647
-	ldr	r3, .L2714+8
+	bne	.L2605
+	ldr	r3, .L2666+8
 	movs	r0, #1
 	ldr	r1, [r6, #24]
-	ldr	r7, .L2714+12
+	ldr	r7, .L2666+12
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	rsb	r3, r2, #24
 	lsls	r0, r0, r2
-	ldr	r2, .L2714+16
+	ldr	r2, .L2666+16
 	subs	r0, r0, #1
 	lsl	ip, r0, r3
 	lsr	r3, r1, r3
 	ands	r0, r0, r3
-	ldr	r3, .L2714+20
+	ldr	r3, .L2666+20
 	bic	r1, r1, ip
 	uxtb	r0, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
@@ -17083,18 +16789,18 @@ queue_wait_first_req_completed:
 	bl	flash_read_page_en
 	adds	r2, r0, #1
 	mov	r3, r0
-	beq	.L2636
+	beq	.L2594
 	ldr	r1, [r6, #12]
 	ldr	r2, [r7]
 	ldr	r1, [r1]
 	ldr	r2, [r2]
 	cmp	r1, r2
-	beq	.L2647
-.L2636:
+	beq	.L2605
+.L2594:
 	movs	r2, #48
-	ldr	r0, .L2714+24
+	ldr	r0, .L2666+24
 	mla	r4, r2, r5, r4
-	ldr	r2, .L2714+28
+	ldr	r2, .L2666+28
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	ldrb	r1, [r4, #1]	@ zero_extendqisi2
 	str	r2, [sp]
@@ -17102,11 +16808,11 @@ queue_wait_first_req_completed:
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4, #36]
-	b	.L2647
-.L2622:
-	ldr	r7, .L2714+8
-	movs	r3, #1
-	cmp	r2, #11
+	b	.L2605
+.L2580:
+	ldr	r7, .L2666+8
+	cmp	r3, #11
+	mov	r3, #1
 	add	r2, r5, r5, lsl #1
 	it	eq
 	moveq	r0, #10
@@ -17122,49 +16828,49 @@ queue_wait_first_req_completed:
 	subs	r3, r3, #1
 	and	ip, ip, r3
 	uxth	ip, ip
-.L2638:
+.L2596:
 	ldrb	r8, [r2]	@ zero_extendqisi2
 	cmp	r8, #255
-	bne	.L2645
+	bne	.L2603
 	mov	r6, #-1
-	b	.L2613
-.L2645:
+	b	.L2571
+.L2603:
 	mla	lr, r7, r8, r4
 	add	r2, r8, r8, lsl #1
 	ldrb	fp, [lr, #42]	@ zero_extendqisi2
 	add	r2, r4, r2, lsl #4
 	cmp	fp, r0
-	bne	.L2638
+	bne	.L2596
 	ldr	lr, [lr, #24]
 	lsr	lr, lr, r1
 	and	lr, lr, r3
 	cmp	ip, lr
-	bne	.L2638
+	bne	.L2596
 	mov	r0, r6
 	movs	r1, #64
 	bl	flash_wait_device_ready
 	mov	r6, r0
 	lsls	r0, r6, #25
-	bmi	.L2640
-.L2709:
+	bmi	.L2598
+.L2661:
 	movs	r6, #0
-	b	.L2641
-.L2640:
+	b	.L2599
+.L2598:
 	ands	r3, r6, #15
 	mul	r7, r7, r5
-	beq	.L2642
+	beq	.L2600
 	add	r7, r7, r4
 	mov	r10, #12
 	ldrb	r1, [r7, #1]	@ zero_extendqisi2
 	mov	r2, r6
 	str	r10, [sp]
 	ldr	r3, [r7, #24]
-	ldr	r0, .L2714+32
+	ldr	r0, .L2666+32
 	bl	printf
 	mov	r3, #-1
 	strb	r10, [r7, #42]
 	str	r3, [r7, #36]
-.L2641:
+.L2599:
 	movs	r3, #48
 	mla	r5, r3, r5, r4
 	mla	r8, r3, r8, r4
@@ -17172,37 +16878,37 @@ queue_wait_first_req_completed:
 	ldr	r3, [r5, #36]
 	strb	r2, [r8, #42]
 	str	r3, [r8, #36]
-.L2613:
+.L2571:
 	mov	r0, r6
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2642:
+.L2600:
 	adds	r6, r4, r7
 	movs	r2, #13
 	str	r3, [r6, #36]
-	ldr	r3, .L2714
+	ldr	r3, .L2666
 	strb	r2, [r6, #42]
 	ldr	r3, [r3]
 	ldr	r2, [r3, #156]
-	ldr	r3, .L2714+4
+	ldr	r3, .L2666+4
 	cmp	r2, r3
-	bne	.L2709
+	bne	.L2661
 	ldrh	r3, [r6, #34]
 	cmp	r3, #0
-	bne	.L2709
+	bne	.L2661
 	ldrb	r2, [r10]	@ zero_extendqisi2
 	movs	r0, #1
 	ldr	r1, [r6, #24]
-	ldr	r7, .L2714+12
+	ldr	r7, .L2666+12
 	rsb	r3, r2, #24
 	lsls	r0, r0, r2
-	ldr	r2, .L2714+16
+	ldr	r2, .L2666+16
 	subs	r0, r0, #1
 	lsl	ip, r0, r3
 	lsr	r3, r1, r3
 	ands	r0, r0, r3
-	ldr	r3, .L2714+20
+	ldr	r3, .L2666+20
 	bic	r1, r1, ip
 	uxtb	r0, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
@@ -17212,18 +16918,18 @@ queue_wait_first_req_completed:
 	bl	flash_read_page_en
 	adds	r1, r0, #1
 	mov	r3, r0
-	beq	.L2644
+	beq	.L2602
 	ldr	r1, [r6, #12]
 	ldr	r2, [r7]
 	ldr	r1, [r1]
 	ldr	r2, [r2]
 	cmp	r1, r2
-	beq	.L2709
-.L2644:
-	ldr	r2, .L2714+28
+	beq	.L2661
+.L2602:
+	ldr	r2, .L2666+28
 	movs	r6, #48
 	mla	r6, r6, r5, r4
-	ldr	r0, .L2714+36
+	ldr	r0, .L2666+36
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	ldrb	r1, [r6, #1]	@ zero_extendqisi2
 	str	r2, [sp]
@@ -17231,51 +16937,51 @@ queue_wait_first_req_completed:
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r6, #36]
-	b	.L2709
-.L2620:
+	b	.L2661
+.L2578:
 	mov	r0, r6
 	movs	r1, #32
 	bl	flash_wait_device_ready
 	lsls	r2, r0, #26
 	mov	r6, r0
-	bpl	.L2647
+	bpl	.L2605
 	ands	r2, r0, #15
 	mov	r3, #48
 	mla	r4, r3, r5, r4
-	beq	.L2646
+	beq	.L2604
 	movs	r3, #12
 	strb	r3, [r4, #42]
-	b	.L2710
-.L2646:
+	b	.L2662
+.L2604:
 	movs	r3, #13
 	str	r2, [r4, #36]
 	strb	r3, [r4, #42]
-	b	.L2647
-.L2621:
+	b	.L2605
+.L2579:
 	movs	r1, #64
 	mov	r0, r6
 	bl	flash_wait_device_ready
 	lsls	r3, r0, #25
-	bpl	.L2647
+	bpl	.L2605
 	movs	r3, #48
 	mla	r4, r3, r5, r4
 	movs	r3, #7
 	str	r0, [r4, #36]
 	strb	r3, [r4, #42]
-	b	.L2647
-.L2715:
+	b	.L2605
+.L2667:
 	.align	2
-.L2714:
+.L2666:
 	.word	.LANCHOR110
 	.word	1145785929
-	.word	.LANCHOR32
-	.word	.LANCHOR175
-	.word	.LANCHOR176
+	.word	.LANCHOR31
+	.word	.LANCHOR172
+	.word	.LANCHOR173
 	.word	.LANCHOR131
-	.word	.LC142
-	.word	.LANCHOR52
-	.word	.LC143
-	.word	.LC144
+	.word	.LC139
+	.word	.LANCHOR51
+	.word	.LC140
+	.word	.LC141
 	.size	queue_wait_first_req_completed, .-queue_wait_first_req_completed
 	.section	.text.sblk_prog_page,"ax",%progbits
 	.align	1
@@ -17292,56 +16998,56 @@ sblk_prog_page:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	mov	r5, r1
-	cbz	r3, .L2717
-	ldr	r3, .L2746
+	cbz	r3, .L2669
+	ldr	r3, .L2698
 	ldr	r3, [r3]
 	lsls	r3, r3, #23
-	bpl	.L2717
+	bpl	.L2669
 	mov	r2, r1
 	ldr	r1, [r0, #24]
-	ldr	r0, .L2746+4
+	ldr	r0, .L2698+4
 	bl	printf
-.L2717:
-	ldr	fp, .L2746+40
+.L2669:
+	ldr	fp, .L2698+40
 	movs	r7, #0
-.L2718:
-	cbnz	r5, .L2729
-.L2745:
+.L2670:
+	cbnz	r5, .L2681
+.L2697:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2729:
+.L2681:
 	ldrb	r8, [r4]	@ zero_extendqisi2
 	ldr	r6, [r4, #24]
-.L2719:
+.L2671:
 	movs	r1, #1
 	mov	r0, r6
 	bl	queue_lun_state
-	cbnz	r0, .L2720
+	cbnz	r0, .L2672
 	cmp	r5, #1
-	beq	.L2721
-	ldr	r3, .L2746+8
+	beq	.L2673
+	ldr	r3, .L2698+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2721
-	ldr	r3, .L2746+12
+	cbz	r3, .L2673
+	ldr	r3, .L2698+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2722
-.L2721:
+	cbz	r3, .L2674
+.L2673:
 	mov	r0, r4
 	bl	queue_prog_cmd
-.L2723:
+.L2675:
 	subs	r5, r5, #1
-	beq	.L2745
-	ldr	r4, .L2746+16
+	beq	.L2697
+	ldr	r4, .L2698+16
 	add	r8, r8, r8, lsl #1
 	add	r4, r4, r8, lsl #4
-	b	.L2718
-.L2720:
+	b	.L2670
+.L2672:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2719
-.L2722:
+	b	.L2671
+.L2674:
 	ldrb	r1, [fp]	@ zero_extendqisi2
 	movs	r2, #1
 	rsb	r3, r1, #24
@@ -17353,13 +17059,13 @@ sblk_prog_page:
 	str	r3, [sp, #4]
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	cmp	r3, #255
-	bne	.L2724
-	mov	r2, #696
-	ldr	r1, .L2746+20
-	ldr	r0, .L2746+24
+	bne	.L2676
+	movw	r2, #697
+	ldr	r1, .L2698+20
+	ldr	r0, .L2698+24
 	bl	printf
-.L2724:
-	ldr	r2, .L2746+16
+.L2676:
+	ldr	r2, .L2698+16
 	movs	r1, #48
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	mov	r10, #1
@@ -17374,10 +17080,10 @@ sblk_prog_page:
 	ldr	r0, [sp, #4]
 	uxth	r3, r3
 	cmp	r0, r3
-	bne	.L2725
-	ldr	r3, .L2746+28
+	bne	.L2677
+	ldr	r3, .L2698+28
 	ldrh	r0, [r3]
-	ldr	r3, .L2746+32
+	ldr	r3, .L2698+32
 	ldrb	ip, [r3]	@ zero_extendqisi2
 	subs	r3, r2, r0
 	lsl	r2, r10, r0
@@ -17395,11 +17101,11 @@ sblk_prog_page:
 	ands	r6, r6, r3
 	ands	r1, r1, r3
 	cmp	r6, r1
-	beq	.L2725
+	beq	.L2677
 	cmp	lr, r2
-	bne	.L2725
+	bne	.L2677
 	cmp	r7, ip
-	beq	.L2725
+	beq	.L2677
 	ldr	r3, [r4, #12]
 	movs	r0, #17
 	ldr	r2, [r4, #4]
@@ -17412,28 +17118,28 @@ sblk_prog_page:
 	movs	r3, #255
 	strb	r3, [r4]
 	mov	r1, r4
-	ldr	r0, .L2746+36
+	ldr	r0, .L2698+36
 	bl	buf_add_tail
-	b	.L2723
-.L2725:
+	b	.L2675
+.L2677:
 	mov	r0, r4
 	movs	r7, #0
 	bl	queue_prog_cmd
-	b	.L2723
-.L2747:
+	b	.L2675
+.L2699:
 	.align	2
-.L2746:
-	.word	.LANCHOR14
-	.word	.LC145
-	.word	.LANCHOR45
-	.word	.LANCHOR37
-	.word	.LANCHOR56
-	.word	.LANCHOR184
+.L2698:
+	.word	.LANCHOR19
+	.word	.LC142
+	.word	.LANCHOR44
+	.word	.LANCHOR36
+	.word	.LANCHOR55
+	.word	.LANCHOR181
 	.word	.LC0
+	.word	.LANCHOR74
 	.word	.LANCHOR75
-	.word	.LANCHOR76
-	.word	.LANCHOR60
-	.word	.LANCHOR32
+	.word	.LANCHOR59
+	.word	.LANCHOR31
 	.size	sblk_prog_page, .-sblk_prog_page
 	.section	.text.sblk_wait_write_queue_completed,"ax",%progbits
 	.align	1
@@ -17447,20 +17153,20 @@ sblk_wait_write_queue_completed:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
-	ldr	r4, .L2751
-.L2749:
+	ldr	r4, .L2703
+.L2701:
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	cmp	r3, #255
-	bne	.L2750
+	bne	.L2702
 	pop	{r4, pc}
-.L2750:
+.L2702:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2749
-.L2752:
+	b	.L2701
+.L2704:
 	.align	2
-.L2751:
-	.word	.LANCHOR60
+.L2703:
+	.word	.LANCHOR59
 	.size	sblk_wait_write_queue_completed, .-sblk_wait_write_queue_completed
 	.section	.text.ftl_flush,"ax",%progbits
 	.align	1
@@ -17474,16 +17180,16 @@ ftl_flush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	ldr	r4, .L2758
-	ldr	r5, .L2758+4
+	ldr	r4, .L2710
+	ldr	r5, .L2710+4
 	ldrb	r1, [r4]	@ zero_extendqisi2
-	cbz	r1, .L2754
+	cbz	r1, .L2706
 	ldrb	r0, [r5]	@ zero_extendqisi2
-	ldr	r3, .L2758+8
+	ldr	r3, .L2710+8
 	add	r0, r0, r0, lsl #1
 	add	r0, r3, r0, lsl #4
 	bl	sblk_prog_page
-.L2754:
+.L2706:
 	movs	r3, #255
 	strb	r3, [r5]
 	movs	r3, #0
@@ -17493,12 +17199,12 @@ ftl_flush:
 	movw	r0, #65535
 	pop	{r3, r4, r5, lr}
 	b	ftl_vpn_decrement
-.L2759:
+.L2711:
 	.align	2
-.L2758:
+.L2710:
 	.word	.LANCHOR129
-	.word	.LANCHOR185
-	.word	.LANCHOR56
+	.word	.LANCHOR182
+	.word	.LANCHOR55
 	.size	ftl_flush, .-ftl_flush
 	.section	.text.ftl_read_page,"ax",%progbits
 	.align	1
@@ -17539,7 +17245,7 @@ ftl_read_ppa_page:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
 	mov	r10, r3
-	ldr	r3, .L2762
+	ldr	r3, .L2714
 	mov	r6, r0
 	movs	r5, #1
 	mov	r7, r1
@@ -17561,10 +17267,10 @@ ftl_read_ppa_page:
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L2763:
+.L2715:
 	.align	2
-.L2762:
-	.word	.LANCHOR32
+.L2714:
+	.word	.LANCHOR31
 	.size	ftl_read_ppa_page, .-ftl_read_ppa_page
 	.section	.text.sblk_read_page,"ax",%progbits
 	.align	1
@@ -17583,41 +17289,41 @@ sblk_read_page:
 	mov	r6, r1
 	mov	r4, r0
 	mov	r5, r1
-.L2765:
-	cbnz	r5, .L2775
-.L2788:
-	ldr	r4, .L2789
-.L2776:
+.L2717:
+	cbnz	r5, .L2727
+.L2740:
+	ldr	r4, .L2741
+.L2728:
 	cmp	r6, #0
-	bne	.L2778
+	bne	.L2730
 	mov	r0, r6
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2775:
+.L2727:
 	ldr	fp, [r4, #24]
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	str	r3, [sp, #8]
-.L2766:
+.L2718:
 	movs	r1, #0
 	mov	r0, fp
 	bl	queue_lun_state
-	cbnz	r0, .L2767
+	cbnz	r0, .L2719
 	cmp	r5, #1
-	beq	.L2772
-	ldr	r3, .L2789+4
+	beq	.L2724
+	ldr	r3, .L2741+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L2769
-.L2772:
+	cbnz	r3, .L2721
+.L2724:
 	mov	r0, r4
 	bl	queue_read_cmd
-	b	.L2770
-.L2767:
+	b	.L2722
+.L2719:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2766
-.L2769:
-	ldr	r3, .L2789+8
+	b	.L2718
+.L2721:
+	ldr	r3, .L2741+8
 	movs	r2, #1
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	rsb	r3, r1, #24
@@ -17628,24 +17334,24 @@ sblk_read_page:
 	ldrb	r2, [r4]	@ zero_extendqisi2
 	uxth	r3, r3
 	cmp	r2, #255
-	bne	.L2771
-	movw	r2, #781
-	ldr	r1, .L2789+12
-	ldr	r0, .L2789+16
+	bne	.L2723
+	movw	r2, #782
+	ldr	r1, .L2741+12
+	ldr	r0, .L2741+16
 	str	r3, [sp, #4]
 	bl	printf
 	ldr	r3, [sp, #4]
-.L2771:
+.L2723:
 	ldrb	r2, [r4]	@ zero_extendqisi2
 	movs	r0, #1
-	ldr	r8, .L2789
+	ldr	r8, .L2741
 	str	r2, [sp, #12]
 	movs	r2, #48
 	ldr	r1, [sp, #12]
 	muls	r2, r1, r2
 	add	r10, r8, r2
 	str	r2, [sp, #4]
-	ldr	r2, .L2789+8
+	ldr	r2, .L2741+8
 	ldr	r1, [r10, #24]
 	ldrb	ip, [r2]	@ zero_extendqisi2
 	rsb	r2, ip, #24
@@ -17655,12 +17361,12 @@ sblk_read_page:
 	ands	r2, r2, r0
 	uxth	r2, r2
 	cmp	r3, r2
-	bne	.L2772
-	ldr	r3, .L2789+20
+	bne	.L2724
+	ldr	r3, .L2741+20
 	ldrh	r3, [r3]
 	add	fp, fp, r3
 	cmp	r1, fp
-	bne	.L2772
+	bne	.L2724
 	ldr	r3, [sp, #4]
 	mov	fp, #255
 	ldr	r0, [r4, #24]
@@ -17673,14 +17379,14 @@ sblk_read_page:
 	strb	r2, [r4, #42]
 	mov	r1, r4
 	strb	r3, [r4, #43]
-	ldr	r0, .L2789+24
+	ldr	r0, .L2741+24
 	strb	fp, [r4]
 	str	r2, [sp, #20]
 	str	r3, [sp, #16]
 	bl	buf_add_tail
 	ldr	r3, [sp, #16]
 	ldr	r2, [sp, #20]
-	ldr	r0, .L2789+24
+	ldr	r0, .L2741+24
 	strb	r3, [r10, #43]
 	ldr	r3, [sp, #4]
 	strb	r2, [r10, #42]
@@ -17689,38 +17395,38 @@ sblk_read_page:
 	add	r1, r3, r3, lsl #1
 	add	r1, r8, r1, lsl #4
 	bl	buf_add_tail
-.L2770:
+.L2722:
 	subs	r5, r5, #1
-	beq	.L2788
+	beq	.L2740
 	ldr	r3, [sp, #8]
 	add	r4, r3, r3, lsl #1
-	ldr	r3, .L2789
+	ldr	r3, .L2741
 	add	r4, r3, r4, lsl #4
-	b	.L2765
-.L2778:
+	b	.L2717
+.L2730:
 	ldrb	r3, [r7, #42]	@ zero_extendqisi2
 	cmp	r3, #13
-	bne	.L2777
+	bne	.L2729
 	ldrb	r3, [r7]	@ zero_extendqisi2
 	subs	r6, r6, #1
 	cmp	r3, #255
 	itt	ne
 	addne	r3, r3, r3, lsl #1
 	addne	r7, r4, r3, lsl #4
-.L2777:
+.L2729:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2776
-.L2790:
+	b	.L2728
+.L2742:
 	.align	2
-.L2789:
-	.word	.LANCHOR56
-	.word	.LANCHOR186
-	.word	.LANCHOR32
-	.word	.LANCHOR187
+.L2741:
+	.word	.LANCHOR55
+	.word	.LANCHOR183
+	.word	.LANCHOR31
+	.word	.LANCHOR184
 	.word	.LC0
 	.word	.LANCHOR111
-	.word	.LANCHOR60
+	.word	.LANCHOR59
 	.size	sblk_read_page, .-sblk_read_page
 	.section	.text.gc_check_data_one_wl,"ax",%progbits
 	.align	1
@@ -17735,83 +17441,83 @@ gc_check_data_one_wl:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #24
-	ldr	r4, .L2824
-	ldr	r3, .L2824+4
+	ldr	r4, .L2776
+	ldr	r3, .L2776+4
 	ldr	r2, [r4, #8]
 	ldr	r8, [r3]
 	mov	fp, r3
-	cbnz	r2, .L2792
+	cbnz	r2, .L2744
 	movs	r0, #1
 	bl	buf_alloc
 	str	r0, [r4, #8]
-.L2792:
+.L2744:
 	ldr	r5, [r4, #8]
-	cbnz	r5, .L2793
+	cbnz	r5, .L2745
 	movw	r2, #729
-	ldr	r1, .L2824+8
-	ldr	r0, .L2824+12
+	ldr	r1, .L2776+8
+	ldr	r0, .L2776+12
 	bl	printf
-.L2793:
+.L2745:
 	add	r10, r8, #96
 	movs	r7, #0
-.L2794:
+.L2746:
 	ldrb	r3, [r8, #89]	@ zero_extendqisi2
 	cmp	r7, r3
-	bge	.L2805
+	bge	.L2757
 	movs	r6, #1
-	b	.L2806
-.L2804:
-	ldr	r2, .L2824+16
+	b	.L2758
+.L2756:
+	ldr	r2, .L2776+16
 	ldrh	r3, [r10]
 	ldrh	r2, [r2]
 	muls	r2, r3, r2
-	ldr	r3, .L2824+20
+	ldr	r3, .L2776+20
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	cmp	r1, #2
-	beq	.L2795
-	ldr	r3, .L2824+24
+	beq	.L2747
+	ldr	r3, .L2776+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L2796
-.L2795:
+	beq	.L2748
+.L2747:
 	ldrh	r3, [r4, #12]
 	subs	r3, r3, #1
 	add	r3, r3, r2
 	add	r3, r3, r6
 	orr	r3, r3, r1, lsl #24
-.L2823:
+.L2775:
 	movs	r1, #1
 	str	r3, [r5, #24]
 	mov	r0, r5
 	bl	sblk_read_page
 	ldr	r2, [r5, #36]
-	ldr	r1, .L2824+28
+	ldr	r1, .L2776+28
 	adds	r0, r2, #1
-	beq	.L2800
+	beq	.L2752
 	ldr	r3, [r1]
 	ldrh	ip, [r4, #18]
 	ldr	r0, [r5, #12]
 	ldr	lr, [r3, ip, lsl #2]
 	ldr	r3, [r0, #4]
 	cmp	lr, r3
-	bne	.L2800
-	ldr	r3, .L2824+32
+	bne	.L2752
+	ldr	r3, .L2776+32
 	ldr	r0, [r0, #8]
 	ldr	r3, [r3]
 	ldr	r3, [r3, ip, lsl #2]
 	cmp	r3, r0
-	beq	.L2801
-.L2800:
+	beq	.L2753
+.L2752:
 	ldrh	r3, [r4, #18]
 	ldr	r1, [r1]
 	lsls	r0, r3, #2
 	ldr	r3, [r1, r3, lsl #2]
 	adds	r1, r3, #1
-	beq	.L2801
-	ldr	r1, .L2824+36
+	beq	.L2753
+	ldr	r1, .L2776+36
 	ldr	r1, [r1]
 	lsls	r1, r1, #21
-	bpl	.L2802
+	bpl	.L2754
 	ldr	r1, [r5, #12]
 	ldr	r4, [r1, #12]
 	str	r4, [sp, #16]
@@ -17821,107 +17527,107 @@ gc_check_data_one_wl:
 	str	r4, [sp, #8]
 	ldr	r1, [r1]
 	str	r1, [sp, #4]
-	ldr	r1, .L2824+32
+	ldr	r1, .L2776+32
 	ldr	r1, [r1]
 	ldr	r1, [r1, r0]
-	ldr	r0, .L2824+40
+	ldr	r0, .L2776+40
 	str	r1, [sp]
 	ldr	r1, [r5, #24]
 	bl	printf
-.L2802:
-	ldr	r3, .L2824+44
+.L2754:
+	ldr	r3, .L2776+44
 	movs	r0, #0
 	ldrh	r2, [r8, #80]
 	ldrb	r1, [r3]	@ zero_extendqisi2
-	ldr	r3, .L2824+48
+	ldr	r3, .L2776+48
 	ldr	r3, [r3]
 	strh	r0, [r3, r2, lsl #1]	@ movhi
 	ldr	r2, [fp]
 	ldr	r3, [r2, #556]
 	adds	r3, r3, #1
 	str	r3, [r2, #556]
-	ldr	r3, .L2824+52
+	ldr	r3, .L2776+52
 	ldr	r3, [r3]
 	ldr	r2, [r3, #156]
-	ldr	r3, .L2824+56
+	ldr	r3, .L2776+56
 	cmp	r2, r3
-	bne	.L2809
-	cbnz	r1, .L2809
-	ldr	r3, .L2824+60
+	bne	.L2761
+	cbnz	r1, .L2761
+	ldr	r3, .L2776+60
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L2809
+	cbnz	r3, .L2761
 	ldr	r0, [r5, #24]
 	bl	ftl_mask_bad_block
-.L2809:
+.L2761:
 	mov	r0, #-1
-	b	.L2791
-.L2796:
+	b	.L2743
+.L2748:
 	cmp	r1, #3
 	ldrh	r3, [r4, #12]
-	bne	.L2798
-	ldr	r1, .L2824+64
+	bne	.L2750
+	ldr	r1, .L2776+64
 	ldrb	r1, [r1]	@ zero_extendqisi2
-	cbz	r1, .L2799
+	cbz	r1, .L2751
 	add	r3, r3, r3, lsl #1
 	subs	r3, r3, #1
 	add	r3, r3, r2
 	add	r3, r3, r6
 	orr	r3, r3, #50331648
-	b	.L2823
-.L2799:
+	b	.L2775
+.L2751:
 	add	r3, r3, r2
 	orr	r3, r3, r6, lsl #24
-	b	.L2823
-.L2798:
+	b	.L2775
+.L2750:
 	add	r3, r3, r2
-	b	.L2823
-.L2801:
+	b	.L2775
+.L2753:
 	ldrh	r3, [r4, #18]
 	adds	r6, r6, #1
 	adds	r3, r3, #1
 	strh	r3, [r4, #18]	@ movhi
-.L2806:
+.L2758:
 	ldrh	r3, [r4, #16]
 	cmp	r6, r3
-	ble	.L2804
+	ble	.L2756
 	adds	r7, r7, #1
 	add	r10, r10, #2
-	b	.L2794
-.L2805:
+	b	.L2746
+.L2757:
 	ldrh	r3, [r4, #12]
 	adds	r2, r3, #1
 	strh	r2, [r4, #12]	@ movhi
-	ldr	r2, .L2824+60
+	ldr	r2, .L2776+60
 	ldrb	r0, [r2]	@ zero_extendqisi2
-	cbz	r0, .L2791
+	cbz	r0, .L2743
 	movs	r0, #0
 	adds	r3, r3, #2
 	strh	r3, [r4, #12]	@ movhi
-.L2803:
-.L2791:
+.L2755:
+.L2743:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2825:
+.L2777:
 	.align	2
-.L2824:
-	.word	.LANCHOR71
-	.word	.LANCHOR10
-	.word	.LANCHOR188
+.L2776:
+	.word	.LANCHOR70
+	.word	.LANCHOR12
+	.word	.LANCHOR185
 	.word	.LC0
 	.word	.LANCHOR111
-	.word	.LANCHOR79
-	.word	.LANCHOR36
-	.word	.LANCHOR162
-	.word	.LANCHOR163
-	.word	.LANCHOR14
-	.word	.LC146
+	.word	.LANCHOR78
+	.word	.LANCHOR35
+	.word	.LANCHOR159
+	.word	.LANCHOR160
+	.word	.LANCHOR19
+	.word	.LC143
 	.word	.LANCHOR124
-	.word	.LANCHOR9
+	.word	.LANCHOR11
 	.word	.LANCHOR110
 	.word	1145785929
-	.word	.LANCHOR81
-	.word	.LANCHOR37
+	.word	.LANCHOR80
+	.word	.LANCHOR36
 	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
 	.section	.text.sblk_tlc_prog_one_page,"ax",%progbits
 	.align	1
@@ -17938,21 +17644,21 @@ sblk_tlc_prog_one_page:
 	push	{r4, r5, r6, lr}
 	mov	r5, r0
 	ldr	r6, [r3, #24]
-.L2827:
+.L2779:
 	movs	r1, #1
 	mov	r0, r6
 	bl	queue_lun_state
 	mov	r4, r0
-	cbnz	r0, .L2828
+	cbnz	r0, .L2780
 	mov	r0, r5
 	movs	r1, #1
 	bl	queue_tlc_prog_cmd
 	mov	r0, r4
 	pop	{r4, r5, r6, pc}
-.L2828:
+.L2780:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2827
+	b	.L2779
 	.size	sblk_tlc_prog_one_page, .-sblk_tlc_prog_one_page
 	.section	.text.sblk_xlc_prog_pages,"ax",%progbits
 	.align	1
@@ -17972,22 +17678,22 @@ sblk_xlc_prog_pages:
 	sub	sp, sp, #24
 	ldr	r4, [r3, #24]
 	str	r2, [sp, #20]
-.L2830:
+.L2782:
 	movs	r1, #1
 	mov	r0, r4
 	bl	queue_lun_state
 	mov	r8, r0
 	cmp	r0, #0
-	bne	.L2831
+	bne	.L2783
 	ldr	r3, [sp, #20]
 	cmp	r3, #2
-	bne	.L2832
-	ldr	r3, .L2841
+	bne	.L2784
+	ldr	r3, .L2793
 	ldr	ip, [r6]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L2833
-	ldr	r3, .L2841+4
+	beq	.L2785
+	ldr	r3, .L2793+4
 	mov	r10, #1
 	ldr	r2, [r5]
 	ldr	fp, [ip, #24]
@@ -17999,14 +17705,14 @@ sblk_xlc_prog_pages:
 	and	r7, r1, r4
 	and	fp, r4, fp
 	lsl	r4, r10, r3
-	ldr	r3, .L2841+8
+	ldr	r3, .L2793+8
 	lsrs	r1, r1, r0
 	subs	r4, r4, #1
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	ands	r4, r4, r1
 	uxtb	r4, r4
 	cmp	r3, #0
-	beq	.L2834
+	beq	.L2786
 	mov	r0, r4
 	bl	zftl_flash_exit_slc_mode
 	ldr	r3, [r5]
@@ -18084,26 +17790,26 @@ sblk_xlc_prog_pages:
 	str	r3, [sp]
 	mov	r3, r4
 	bl	flash_start_one_pass_page_prog
-.L2835:
+.L2787:
 	ldr	r1, [r5]
 	movs	r3, #5
-	ldr	r0, .L2841+12
+	ldr	r0, .L2793+12
 	strb	r3, [r1, #42]
 	movs	r3, #1
 	strb	r3, [r1, #43]
 	movs	r3, #255
 	strb	r3, [r1]
 	bl	buf_add_tail
-.L2836:
+.L2788:
 	movs	r0, #0
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2831:
+.L2783:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2830
-.L2834:
+	b	.L2782
+.L2786:
 	ldr	r3, [r2, #12]
 	mov	r1, r10
 	ldrb	r0, [r2, #44]	@ zero_extendqisi2
@@ -18178,46 +17884,46 @@ sblk_xlc_prog_pages:
 	str	r3, [sp, #4]
 	mov	r3, r4
 	bl	flash_start_tlc_page_prog
-	b	.L2835
-.L2833:
+	b	.L2787
+.L2785:
 	ldr	r4, [ip, #24]
-.L2837:
+.L2789:
 	movs	r1, #1
 	mov	r0, r4
 	bl	queue_lun_state
 	mov	r7, r0
-	cbnz	r0, .L2838
+	cbnz	r0, .L2790
 	movs	r1, #1
 	mov	r0, r5
 	bl	queue_tlc_prog_cmd
 	mov	r1, r7
 	mov	r0, r6
 	bl	queue_tlc_prog_cmd
-.L2839:
+.L2791:
 	movs	r1, #1
 	mov	r0, r4
 	bl	queue_lun_state
 	cmp	r0, #0
-	beq	.L2836
+	beq	.L2788
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2839
-.L2838:
+	b	.L2791
+.L2790:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2837
-.L2832:
+	b	.L2789
+.L2784:
 	movs	r1, #1
 	mov	r0, r5
 	bl	queue_tlc_prog_cmd
-	b	.L2836
-.L2842:
+	b	.L2788
+.L2794:
 	.align	2
-.L2841:
-	.word	.LANCHOR45
-	.word	.LANCHOR32
-	.word	.LANCHOR37
-	.word	.LANCHOR60
+.L2793:
+	.word	.LANCHOR44
+	.word	.LANCHOR31
+	.word	.LANCHOR36
+	.word	.LANCHOR59
 	.size	sblk_xlc_prog_pages, .-sblk_xlc_prog_pages
 	.section	.text.sblk_3d_mlc_prog_pages,"ax",%progbits
 	.align	1
@@ -18232,24 +17938,24 @@ sblk_3d_mlc_prog_pages:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r7, r1
-	ldr	r10, .L2848
+	ldr	r10, .L2800
 	add	r5, r0, #8
-	ldr	fp, .L2848+4
-.L2844:
-	cbnz	r7, .L2847
+	ldr	fp, .L2800+4
+.L2796:
+	cbnz	r7, .L2799
 	mov	r0, r7
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2847:
+.L2799:
 	ldr	r3, [r5, #-8]
 	ldr	r4, [r3, #24]
-.L2845:
+.L2797:
 	movs	r1, #1
 	mov	r0, r4
 	bl	queue_lun_state
 	cmp	r0, #0
-	bne	.L2846
+	bne	.L2798
 	ldr	r3, [r5, #-8]
 	mov	r8, #1
 	subs	r7, r7, #1
@@ -18284,7 +17990,7 @@ sblk_3d_mlc_prog_pages:
 	add	r2, r6, r8
 	ldr	r3, [r3, #4]
 	bl	flash_start_3d_mlc_page_prog
-	bl	nandc_de_cs.constprop.33
+	bl	nandc_de_cs.constprop.32
 	ldr	r1, [r5, #-16]
 	movs	r3, #4
 	mov	r0, fp
@@ -18293,16 +17999,16 @@ sblk_3d_mlc_prog_pages:
 	strb	r8, [r1, #43]
 	strb	r3, [r1]
 	bl	buf_add_tail
-	b	.L2844
-.L2846:
+	b	.L2796
+.L2798:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2845
-.L2849:
+	b	.L2797
+.L2801:
 	.align	2
-.L2848:
-	.word	.LANCHOR32
-	.word	.LANCHOR60
+.L2800:
+	.word	.LANCHOR31
+	.word	.LANCHOR59
 	.size	sblk_3d_mlc_prog_pages, .-sblk_3d_mlc_prog_pages
 	.section	.text.flash_prog_page_en,"ax",%progbits
 	.align	1
@@ -18317,7 +18023,7 @@ flash_prog_page_en:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r8, r2
-	ldr	r7, .L2885
+	ldr	r7, .L2837
 	sub	sp, sp, #24
 	mov	fp, r3
 	mov	r6, r0
@@ -18327,29 +18033,29 @@ flash_prog_page_en:
 	ubfx	r5, r1, #24, #2
 	str	r3, [sp, #20]
 	cmp	r2, r0
-	bhi	.L2851
-	movw	r2, #635
-	ldr	r1, .L2885+4
-	ldr	r0, .L2885+8
+	bhi	.L2803
+	movw	r2, #642
+	ldr	r1, .L2837+4
+	ldr	r0, .L2837+8
 	bl	printf
-.L2851:
+.L2803:
 	ldrb	r3, [r7]	@ zero_extendqisi2
 	cmp	r3, r6
-	bls	.L2862
-	ldr	r3, .L2885+12
+	bls	.L2814
+	ldr	r3, .L2837+12
 	ldrb	r3, [r3, r6]	@ zero_extendqisi2
 	str	r3, [sp, #12]
 	cmp	r5, #0
-	bne	.L2864
-	ldr	r3, .L2885+16
-	ldr	r10, .L2885+64
+	bne	.L2816
+	ldr	r3, .L2837+16
+	ldr	r10, .L2837+64
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2854
+	cbz	r3, .L2806
 	ldrb	r3, [r10]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L2864
-.L2854:
-	ldr	r3, .L2885+20
+	beq	.L2816
+.L2806:
+	ldr	r3, .L2837+20
 	mov	r0, r4
 	ldrh	r7, [r3]
 	mov	r1, r7
@@ -18360,19 +18066,19 @@ flash_prog_page_en:
 	bl	__aeabi_uidivmod
 	ldrb	r3, [r10]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L2855
+	beq	.L2807
 	add	r5, r5, r1, lsl #1
-.L2859:
-	ldr	r3, .L2885+24
+.L2811:
+	ldr	r3, .L2837+24
 	ldr	r3, [r3]
 	lsls	r1, r3, #27
-	bpl	.L2856
+	bpl	.L2808
 	mov	r3, r5
 	mov	r2, r4
 	ldr	r1, [sp, #12]
-	ldr	r0, .L2885+28
+	ldr	r0, .L2837+28
 	bl	printf
-.L2856:
+.L2808:
 	ldr	r3, [sp, #56]
 	mov	r2, r8
 	mov	r1, r5
@@ -18383,103 +18089,103 @@ flash_prog_page_en:
 	ldr	r3, [sp, #20]
 	str	r0, [sp, #16]
 	cmp	r3, #0
-	beq	.L2857
+	beq	.L2809
 	ldr	r3, [sp, #56]
 	mov	r1, r4
-	ldr	r10, .L2885+44
+	ldr	r10, .L2837+44
 	mov	r0, r6
-	ldr	r2, .L2885+32
+	ldr	r2, .L2837+32
 	str	r3, [sp]
 	ldr	r3, [r10]
 	ldr	r2, [r2]
 	bl	flash_read_page_en
 	adds	r2, r0, #1
 	mov	r7, r0
-	beq	.L2858
+	beq	.L2810
 	cmp	r0, #512
-	beq	.L2858
-	ldr	r3, .L2885+32
+	beq	.L2810
+	ldr	r3, .L2837+32
 	ldr	r2, [r8]
 	ldr	r3, [r3]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bne	.L2858
+	bne	.L2810
 	ldr	r3, [r10]
 	ldr	r2, [fp]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L2857
-.L2858:
+	beq	.L2809
+.L2810:
 	movs	r3, #4
 	mov	r1, r8
 	mov	r2, r3
-	ldr	r0, .L2885+36
+	ldr	r0, .L2837+36
 	bl	rknand_print_hex
 	movs	r3, #4
 	mov	r1, fp
 	mov	r2, r3
-	ldr	r0, .L2885+40
+	ldr	r0, .L2837+40
 	bl	rknand_print_hex
-	ldr	r1, .L2885+44
+	ldr	r1, .L2837+44
 	movs	r3, #4
 	mov	r2, r3
-	ldr	r0, .L2885+48
+	ldr	r0, .L2837+48
 	ldr	r1, [r1]
 	bl	rknand_print_hex
-	ldr	r1, .L2885+32
+	ldr	r1, .L2837+32
 	movs	r3, #4
 	mov	r2, r3
-	ldr	r0, .L2885+52
+	ldr	r0, .L2837+52
 	ldr	r1, [r1]
 	bl	rknand_print_hex
 	cmp	r7, #512
-	beq	.L2859
-.L2861:
+	beq	.L2811
+.L2813:
 	mov	r1, r4
-	ldr	r0, .L2885+56
+	ldr	r0, .L2837+56
 	bl	printf
-	movw	r2, #678
-	ldr	r1, .L2885+4
-	ldr	r0, .L2885+8
+	movw	r2, #685
+	ldr	r1, .L2837+4
+	ldr	r0, .L2837+8
 	bl	printf
-.L2862:
+.L2814:
 	mov	r0, #-1
-	b	.L2850
-.L2855:
-	ldr	r3, .L2885+60
+	b	.L2802
+.L2807:
+	ldr	r3, .L2837+60
 	ldrh	r1, [r3, r1, lsl #1]
 	add	r5, r5, r1
-	b	.L2859
-.L2864:
-.L2853:
+	b	.L2811
+.L2816:
+.L2805:
 	mov	r5, r4
-	b	.L2859
-.L2857:
+	b	.L2811
+.L2809:
 	ldr	r0, [sp, #16]
 	adds	r3, r0, #1
-	beq	.L2861
-.L2850:
+	beq	.L2813
+.L2802:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2886:
+.L2838:
 	.align	2
-.L2885:
-	.word	.LANCHOR18
-	.word	.LANCHOR189
+.L2837:
+	.word	.LANCHOR23
+	.word	.LANCHOR186
 	.word	.LC0
-	.word	.LANCHOR30
+	.word	.LANCHOR29
 	.word	.LANCHOR0
 	.word	.LANCHOR2
-	.word	.LANCHOR14
+	.word	.LANCHOR19
+	.word	.LC144
+	.word	.LANCHOR173
+	.word	.LC145
+	.word	.LC146
+	.word	.LANCHOR172
 	.word	.LC147
-	.word	.LANCHOR176
 	.word	.LC148
 	.word	.LC149
-	.word	.LANCHOR175
-	.word	.LC150
-	.word	.LC151
-	.word	.LC152
 	.word	.LANCHOR3
 	.word	.LANCHOR1
 	.size	flash_prog_page_en, .-flash_prog_page_en
@@ -18496,137 +18202,137 @@ ftl_test_block:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r5, #0
-	ldr	r3, .L2914
+	ldr	r3, .L2866
 	mov	r10, r0
 	mov	r8, r5
 	ldr	r2, [r3]
 	str	r3, [sp, #12]
 	str	r5, [r2]
-	ldr	r2, .L2914+4
+	ldr	r2, .L2866+4
 	str	r5, [r2]
-.L2888:
+.L2840:
 	uxth	r3, r5
 	str	r3, [sp, #8]
-	ldr	r3, .L2914+8
+	ldr	r3, .L2866+8
 	ldr	r2, [sp, #8]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r2
-	bls	.L2898
+	bls	.L2850
 	mov	fp, #0
-	b	.L2899
-.L2897:
-	ldr	r3, .L2914+12
+	b	.L2851
+.L2849:
+	ldr	r3, .L2866+12
 	ldr	r3, [r3]
 	lsls	r3, r3, #19
-	bpl	.L2889
+	bpl	.L2841
 	mov	r1, r10
-	ldr	r0, .L2914+16
+	ldr	r0, .L2866+16
 	bl	printf
-.L2889:
-	ldr	r3, .L2914+20
+.L2841:
+	ldr	r3, .L2866+20
 	ldrb	r4, [r3]	@ zero_extendqisi2
 	ldr	r3, [sp, #8]
 	smulbb	r4, r4, r10
 	add	r4, r4, r6
 	uxth	r4, r4
-	cbnz	r3, .L2890
-	ldr	r3, .L2914+24
+	cbnz	r3, .L2842
+	ldr	r3, .L2866+24
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #47]	@ zero_extendqisi2
 	cmp	r3, r4
-	bcs	.L2891
-.L2890:
+	bcs	.L2843
+.L2842:
 	uxtb	r6, r5
 	mov	r1, r4
 	mov	r0, r6
 	bl	flash_check_bad_block
-	cbnz	r0, .L2891
-	ldr	r3, .L2914+28
+	cbnz	r0, .L2843
+	ldr	r3, .L2866+28
 	mov	r1, r8
 	mov	r0, r6
 	ldrh	r7, [r3]
 	muls	r7, r4, r7
 	mov	r2, r7
 	bl	flash_erase_block_en
-	cbz	r0, .L2892
-	ldr	r3, .L2914+32
+	cbz	r0, .L2844
+	ldr	r3, .L2866+32
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #2
-	bne	.L2913
-	ldr	r3, .L2914+36
+	bne	.L2865
+	ldr	r3, .L2866+36
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2913
+	cbz	r3, .L2865
 	mov	r2, r7
 	movs	r1, #1
 	mov	r0, r6
 	bl	flash_erase_block_en
-	cbnz	r0, .L2913
-.L2896:
-	ldr	r3, .L2914+32
+	cbnz	r0, .L2865
+.L2848:
+	ldr	r3, .L2866+32
 	mov	r8, #1
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r7, r7, r3, lsl #24
-.L2895:
+.L2847:
 	movs	r3, #1
 	ldr	r2, [sp, #12]
 	str	r3, [sp, #4]
 	mov	r1, r7
-	ldr	r3, .L2914+40
+	ldr	r3, .L2866+40
 	mov	r0, r6
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r3, [sp]
-	ldr	r3, .L2914+4
+	ldr	r3, .L2866+4
 	ldr	r2, [r2]
 	bl	flash_prog_page_en
-	cbz	r0, .L2891
-.L2913:
+	cbz	r0, .L2843
+.L2865:
 	mov	r1, r4
 	mov	r0, r6
 	bl	flash_mask_bad_block
-.L2891:
+.L2843:
 	add	fp, fp, #1
-.L2899:
-	ldr	r3, .L2914+20
+.L2851:
+	ldr	r3, .L2866+20
 	uxth	r6, fp
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r6
-	bhi	.L2897
+	bhi	.L2849
 	adds	r5, r5, #1
-	b	.L2888
-.L2892:
+	b	.L2840
+.L2844:
 	cmp	r8, #0
-	beq	.L2895
-	b	.L2896
-.L2898:
+	beq	.L2847
+	b	.L2848
+.L2850:
 	cmp	r8, #0
-	beq	.L2900
-	ldr	r3, .L2914+44
+	beq	.L2852
+	ldr	r3, .L2866+44
 	movs	r2, #2
 	ldr	r3, [r3]
 	add	r10, r3, r10, lsl #2
 	ldrb	r3, [r10, #2]	@ zero_extendqisi2
 	bfi	r3, r2, #3, #2
 	strb	r3, [r10, #2]
-.L2900:
+.L2852:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2915:
+.L2867:
 	.align	2
-.L2914:
-	.word	.LANCHOR190
-	.word	.LANCHOR191
+.L2866:
+	.word	.LANCHOR187
+	.word	.LANCHOR188
 	.word	.LANCHOR112
-	.word	.LANCHOR14
-	.word	.LC153
-	.word	.LANCHOR76
-	.word	.LANCHOR27
+	.word	.LANCHOR19
+	.word	.LC150
+	.word	.LANCHOR75
+	.word	.LANCHOR6
 	.word	.LANCHOR111
-	.word	.LANCHOR79
+	.word	.LANCHOR78
 	.word	.LANCHOR0
 	.word	.LANCHOR131
-	.word	.LANCHOR7
+	.word	.LANCHOR9
 	.size	ftl_test_block, .-ftl_test_block
 	.section	.text.ftl_prog_page,"ax",%progbits
 	.align	1
@@ -18656,25 +18362,25 @@ ftl_prog_page:
 	bl	flash_prog_page_en
 	adds	r3, r0, #1
 	mov	r4, r0
-	bne	.L2916
-	ldr	r1, .L2918
-	movw	r2, #2670
-	ldr	r0, .L2918+4
+	bne	.L2868
+	ldr	r1, .L2870
+	movw	r2, #2678
+	ldr	r0, .L2870+4
 	bl	printf
 	mov	r1, r5
-	ldr	r0, .L2918+8
+	ldr	r0, .L2870+8
 	bl	printf
-.L2916:
+.L2868:
 	mov	r0, r4
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, pc}
-.L2919:
+.L2871:
 	.align	2
-.L2918:
-	.word	.LANCHOR192
+.L2870:
+	.word	.LANCHOR189
 	.word	.LC0
-	.word	.LC152
+	.word	.LC149
 	.size	ftl_prog_page, .-ftl_prog_page
 	.section	.text.ftl_info_flush,"ax",%progbits
 	.align	1
@@ -18689,32 +18395,32 @@ ftl_info_flush:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #32
-	ldr	r5, .L2957
+	ldr	r5, .L2906
 	movs	r1, #0
+	mov	r8, #0
 	str	r0, [sp, #16]
 	ldrb	r2, [r5]	@ zero_extendqisi2
-	ldr	r0, .L2957+4
+	ldr	r0, .L2906+4
+	ldr	r4, .L2906+8
 	lsls	r2, r2, #1
 	bl	ftl_memset
-	ldr	r2, .L2957+8
+	ldr	r2, .L2906+12
 	ldr	r3, [r2]
 	str	r2, [sp, #20]
 	ldrh	r1, [r3, #74]
-	cbz	r1, .L2921
-	movs	r2, #0
-	strh	r2, [r3, #150]	@ movhi
-.L2921:
-	ldr	r4, .L2957+12
-	mov	r8, #0
-.L2931:
-	ldr	r3, .L2957+12
-	ldr	r6, .L2957+16
+	cmp	r1, #1
+	itt	hi
+	movhi	r2, #0
+	strhhi	r2, [r3, #150]	@ movhi
+.L2883:
+	ldr	r3, .L2906+8
+	ldr	r6, .L2906+16
 	ldr	r1, [sp, #16]
 	ldrb	fp, [r3]	@ zero_extendqisi2
 	ldrh	r3, [r6]
-	ldr	r7, .L2957+20
+	ldr	r7, .L2906+20
 	str	r3, [sp, #12]
-	ldr	r3, .L2957+12
+	ldr	r3, .L2906+8
 	ldr	r0, [r7]
 	ldrh	r10, [r3, #2]
 	ldr	r3, [sp, #20]
@@ -18722,7 +18428,7 @@ ftl_info_flush:
 	ldr	r3, [r2, #4]
 	adds	r3, r3, #1
 	str	r3, [r2, #4]
-	ldr	r2, .L2957+4
+	ldr	r2, .L2906+4
 	str	r3, [sp, #28]
 	stm	r2, {r1, r3}
 	ldrb	r1, [r5]	@ zero_extendqisi2
@@ -18732,54 +18438,54 @@ ftl_info_flush:
 	ldr	r2, [sp, #24]
 	ldr	r3, [sp, #28]
 	str	r0, [r2, #8]
-	ldr	r2, .L2957+24
+	ldr	r2, .L2906+24
 	ldr	r2, [r2]
 	tst	r2, #4096
-	beq	.L2922
+	beq	.L2874
 	mov	r2, r10
 	mov	r1, fp
-	ldr	r0, .L2957+28
+	ldr	r0, .L2906+28
 	bl	printf
-.L2922:
-	ldr	r3, .L2957+32
+.L2874:
+	ldr	r3, .L2906+32
 	ldrh	r0, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bhi	.L2923
-	ldr	r10, .L2957+48
-	ldr	fp, .L2957+44
-.L2927:
+	bhi	.L2875
+	ldr	r10, .L2906+48
+	ldr	fp, .L2906+44
+.L2879:
 	ldrb	r3, [r4, #1]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, #7
 	strb	r3, [r4, #1]
-	bls	.L2924
+	bls	.L2876
 	ldr	r2, [r10]
 	movs	r3, #0
 	adds	r2, r2, #40
-.L2940:
+.L2892:
 	ldrb	r1, [r2], #1	@ zero_extendqisi2
 	uxth	r8, r3
 	cmp	r1, #128
-	bls	.L2925
+	bls	.L2877
 	cmp	r1, #255
-	beq	.L2926
-	movw	r2, #841
+	beq	.L2878
+	movw	r2, #846
 	mov	r1, fp
-	ldr	r0, .L2957+36
+	ldr	r0, .L2906+36
 	bl	printf
-.L2925:
+.L2877:
 	strb	r8, [r4, #1]
 	mov	r8, #1
-.L2924:
+.L2876:
 	ldr	r3, [r10]
 	ldrb	r2, [r4, #1]	@ zero_extendqisi2
 	add	r3, r3, r2
 	ldrb	r3, [r3, #40]	@ zero_extendqisi2
 	cmp	r3, #255
 	strb	r3, [r4]
-	beq	.L2927
+	beq	.L2879
 	ldrh	r10, [r6]
 	movs	r0, #0
 	mul	r10, r3, r10
@@ -18790,107 +18496,107 @@ ftl_info_flush:
 	movs	r0, #0
 	str	r3, [sp]
 	ldr	r2, [r7]
-	ldr	r3, .L2957+4
+	ldr	r3, .L2906+4
 	bl	ftl_prog_page
 	movs	r3, #1
 	add	r10, r10, r3
 	strh	r3, [r4, #2]	@ movhi
-.L2928:
+.L2880:
 	ldrb	r3, [r5]	@ zero_extendqisi2
 	mov	r1, r10
 	movs	r0, #0
 	str	r3, [sp]
 	ldr	r2, [r7]
-	ldr	r3, .L2957+4
+	ldr	r3, .L2906+4
 	bl	ftl_prog_page
 	ldrh	r3, [r4, #2]
 	adds	r0, r0, #1
 	add	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
-	ldr	r3, .L2957+40
-	beq	.L2929
+	ldr	r3, .L2906+40
+	beq	.L2881
 	ldrb	r2, [r3]	@ zero_extendqisi2
-	cbz	r2, .L2930
-.L2929:
+	cbz	r2, .L2882
+.L2881:
 	movs	r2, #0
 	strb	r2, [r3]
-	b	.L2931
-.L2923:
+	b	.L2883
+.L2875:
 	ldr	r3, [sp, #12]
 	mla	r10, fp, r3, r10
 	cmp	r0, #0
-	bne	.L2928
+	bne	.L2880
 	mov	r1, r10
 	bl	flash_erase_block
-	b	.L2928
-.L2930:
+	b	.L2880
+.L2882:
 	cmp	r8, #0
-	bne	.L2932
-.L2939:
+	bne	.L2884
+.L2891:
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	cmp	r3, #255
-	bne	.L2956
-	movw	r2, #885
-	ldr	r1, .L2957+44
-	ldr	r0, .L2957+36
+	bne	.L2905
+	movw	r2, #890
+	ldr	r1, .L2906+44
+	ldr	r0, .L2906+36
 	bl	printf
-.L2956:
+.L2905:
 	movs	r0, #0
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2932:
+.L2884:
 	ldrb	r5, [r4, #1]	@ zero_extendqisi2
-	ldr	r6, .L2957+48
-	ldr	r7, .L2957+44
+	ldr	r6, .L2906+48
+	ldr	r7, .L2906+44
 	adds	r5, r5, #1
-.L2935:
+.L2887:
 	cmp	r5, #7
-	bhi	.L2939
+	bhi	.L2891
 	ldr	r3, [r6]
 	add	r3, r3, r5
 	ldrb	r8, [r3, #40]	@ zero_extendqisi2
 	uxth	r3, r8
 	cmp	r3, #128
-	bls	.L2936
+	bls	.L2888
 	cmp	r3, #255
-	beq	.L2937
-	mov	r2, #876
+	beq	.L2889
+	movw	r2, #881
 	mov	r1, r7
-	ldr	r0, .L2957+36
+	ldr	r0, .L2906+36
 	bl	printf
-.L2936:
-	ldr	r3, .L2957+16
+.L2888:
+	ldr	r3, .L2906+16
 	movs	r0, #0
 	ldrh	r1, [r3]
 	mul	r1, r8, r1
 	bl	flash_erase_block
-.L2937:
+.L2889:
 	adds	r5, r5, #1
 	uxth	r5, r5
-	b	.L2935
-.L2926:
+	b	.L2887
+.L2878:
 	adds	r3, r3, #1
 	cmp	r3, #8
-	bne	.L2940
+	bne	.L2892
 	mov	r8, r3
-	b	.L2925
-.L2958:
+	b	.L2877
+.L2907:
 	.align	2
-.L2957:
+.L2906:
 	.word	.LANCHOR131
-	.word	.LANCHOR193
+	.word	.LANCHOR190
+	.word	.LANCHOR191
 	.word	.LANCHOR110
-	.word	.LANCHOR194
 	.word	.LANCHOR111
-	.word	.LANCHOR195
-	.word	.LANCHOR14
-	.word	.LC154
-	.word	.LANCHOR95
+	.word	.LANCHOR192
+	.word	.LANCHOR19
+	.word	.LC151
+	.word	.LANCHOR94
 	.word	.LC0
-	.word	.LANCHOR197
-	.word	.LANCHOR196
-	.word	.LANCHOR27
+	.word	.LANCHOR194
+	.word	.LANCHOR193
+	.word	.LANCHOR6
 	.size	ftl_info_flush, .-ftl_info_flush
 	.section	.text.ftl_info_blk_init,"ax",%progbits
 	.align	1
@@ -18903,8 +18609,8 @@ ftl_info_flush:
 ftl_info_blk_init:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2988
-	ldr	r2, .L2988+4
+	ldr	r3, .L2937
+	ldr	r2, .L2937+4
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
 	strb	r4, [r3]
@@ -18912,121 +18618,121 @@ ftl_info_blk_init:
 	sub	sp, sp, #24
 	mov	r1, r4
 	strb	r3, [r2]
-	ldr	r7, .L2988+8
-	ldr	r2, .L2988+12
-	ldr	r5, .L2988+16
+	ldr	r7, .L2937+8
+	ldr	r2, .L2937+12
+	ldr	r5, .L2937+16
 	ldr	r0, [r7]
 	mov	fp, r7
 	strb	r3, [r2]
 	mov	r2, #16384
-	ldr	r3, .L2988+20
-	ldr	r6, .L2988+24
+	ldr	r3, .L2937+20
+	ldr	r6, .L2937+24
 	str	r0, [r3]
-	ldr	r3, .L2988+28
+	ldr	r3, .L2937+28
 	ldrh	r3, [r3]
 	add	r3, r0, r3, lsl #2
 	str	r3, [r5]
 	bl	ftl_memset
-	ldr	r3, .L2988+32
+	ldr	r3, .L2937+32
 	mov	r2, #16384
 	mov	r1, r4
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldr	r2, [r6]
-	ldr	r3, .L2988+36
+	ldr	r3, .L2937+36
 	ldrb	r2, [r2, #40]	@ zero_extendqisi2
 	strb	r4, [r3, #1]
 	strh	r4, [r3, #2]	@ movhi
 	movs	r4, #7
 	strb	r2, [r3]
 	str	r3, [sp, #12]
-.L2961:
+.L2910:
 	ldr	r3, [r6]
 	sxth	r8, r4
 	add	r3, r3, r4
 	ldrb	r7, [r3, #40]	@ zero_extendqisi2
 	cmp	r7, #255
-	bne	.L2960
-.L2965:
+	bne	.L2909
+.L2914:
 	adds	r4, r4, #-1
-	bcs	.L2961
+	bcs	.L2910
 	mov	r8, #0
-.L2962:
-	ldr	r3, .L2988+40
+.L2911:
+	ldr	r3, .L2937+40
 	ldr	r3, [r3]
 	lsls	r1, r3, #19
-	bpl	.L2966
+	bpl	.L2915
 	ldr	r3, [r5]
 	mov	r2, #4800
 	mov	r1, r4
-	ldr	r0, .L2988+44
+	ldr	r0, .L2937+44
 	ldr	r3, [r3]
 	bl	printf
-.L2966:
+.L2915:
 	adds	r2, r4, #1
-	bne	.L2967
+	bne	.L2916
 	mov	r2, #16384
 	movs	r1, #0
 	ldr	r0, [fp]
 	bl	ftl_memset
 	ldr	r3, [r5]
-	ldr	r2, .L2988+48
+	ldr	r2, .L2937+48
 	str	r2, [r3]
-	ldr	r2, .L2988+52
+	ldr	r2, .L2937+52
 	str	r2, [r3, #12]
-.L2959:
+.L2908:
 	mov	r0, r4
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2960:
-	ldr	r3, .L2988+56
+.L2909:
+	ldr	r3, .L2937+56
 	movs	r0, #0
 	ldrh	r3, [r3]
 	muls	r7, r3, r7
-	ldr	r3, .L2988+60
+	ldr	r3, .L2937+60
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	mov	r1, r7
 	str	r3, [sp]
-	ldr	r3, .L2988+64
+	ldr	r3, .L2937+64
 	ldr	r2, [fp]
 	bl	ftl_read_page
 	cmp	r0, #-1
 	mov	r10, r0
-	bne	.L2963
-	ldr	r3, .L2988+60
+	bne	.L2912
+	ldr	r3, .L2937+60
 	adds	r1, r7, #1
 	movs	r0, #0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r3, [sp]
-	ldr	r3, .L2988+64
+	ldr	r3, .L2937+64
 	ldr	r2, [fp]
 	bl	ftl_read_page
 	mov	r10, r0
-.L2963:
-	ldr	r3, .L2988+40
+.L2912:
+	ldr	r3, .L2937+40
 	ldr	r3, [r3]
 	lsls	r0, r3, #19
-	bpl	.L2964
+	bpl	.L2913
 	ldr	r3, [r5]
 	mov	r2, r10
 	mov	r1, r4
-	ldr	r0, .L2988+68
+	ldr	r0, .L2937+68
 	ldr	r3, [r3]
 	str	r3, [sp]
-	mov	r3, #744
+	movw	r3, #749
 	bl	printf
-.L2964:
+.L2913:
 	cmp	r10, #-1
-	beq	.L2965
+	beq	.L2914
 	ldr	r3, [r5]
-	ldr	r2, .L2988+48
+	ldr	r2, .L2937+48
 	ldr	r3, [r3]
 	cmp	r3, r2
-	bne	.L2965
+	bne	.L2914
 	mov	r4, r8
-	b	.L2962
-.L2967:
+	b	.L2911
+.L2916:
 	ldr	r3, [r6]
 	movs	r0, #0
 	movs	r4, #0
@@ -19037,11 +18743,11 @@ ftl_info_blk_init:
 	strb	r8, [r3, #1]
 	movs	r3, #4
 	str	r3, [sp]
-	ldr	r3, .L2988+64
+	ldr	r3, .L2937+64
 	ldr	r2, [fp]
 	bl	flash_get_last_written_page
 	uxth	r6, r0
-	ldr	r2, .L2988+56
+	ldr	r2, .L2937+56
 	mov	r7, r0
 	adds	r3, r6, #1
 	uxth	r10, r3
@@ -19050,32 +18756,32 @@ ftl_info_blk_init:
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	muls	r3, r2, r3
 	str	r3, [sp, #16]
-.L2969:
+.L2918:
 	subs	r3, r6, r4
 	lsls	r3, r3, #16
-	bmi	.L2973
+	bmi	.L2922
 	ldr	r3, [sp, #16]
 	movs	r0, #0
-	ldr	r8, .L2988+60
+	ldr	r8, .L2937+60
 	adds	r1, r7, r3
 	ldrb	r3, [r8]	@ zero_extendqisi2
 	subs	r1, r1, r4
 	str	r3, [sp]
-	ldr	r3, .L2988+64
+	ldr	r3, .L2937+64
 	ldr	r2, [fp]
 	bl	ftl_read_page
 	adds	r0, r0, #1
-	beq	.L2970
-	ldr	r3, .L2988+16
-	ldr	r2, .L2988+48
+	beq	.L2919
+	ldr	r3, .L2937+16
+	ldr	r2, .L2937+48
 	ldr	r3, [r3]
 	ldr	r3, [r3]
 	cmp	r3, r2
-	bne	.L2970
-	ldr	r3, .L2988+64
+	bne	.L2919
+	ldr	r3, .L2937+64
 	ldr	r3, [r3, #8]
-	cbnz	r3, .L2971
-.L2973:
+	cbnz	r3, .L2920
+.L2922:
 	ldr	r3, [sp, #12]
 	strh	r10, [r3, #2]	@ movhi
 	bl	ftl_tmp_into_update
@@ -19087,17 +18793,17 @@ ftl_info_blk_init:
 	bl	ftl_info_flush
 	movs	r0, #0
 	bl	ftl_info_flush
-	ldr	r3, .L2988+40
+	ldr	r3, .L2937+40
 	ldr	r4, [r3]
 	ands	r4, r4, #16384
-	beq	.L2959
+	beq	.L2908
 	ldr	r3, [r5]
 	movs	r4, #0
-	ldr	r0, .L2988+72
+	ldr	r0, .L2937+72
 	ldr	r1, [r3, #156]
 	bl	printf
-	b	.L2959
-.L2971:
+	b	.L2908
+.L2920:
 	ldrb	r1, [r8]	@ zero_extendqisi2
 	ldr	r0, [fp]
 	str	r3, [sp, #20]
@@ -19105,36 +18811,36 @@ ftl_info_blk_init:
 	bl	js_hash
 	ldr	r3, [sp, #20]
 	cmp	r3, r0
-	beq	.L2973
+	beq	.L2922
 	mov	r1, r3
-	ldr	r0, .L2988+76
+	ldr	r0, .L2937+76
 	bl	printf
-.L2970:
+.L2919:
 	adds	r4, r4, #1
-	b	.L2969
-.L2989:
+	b	.L2918
+.L2938:
 	.align	2
-.L2988:
-	.word	.LANCHOR198
-	.word	.LANCHOR197
+.L2937:
 	.word	.LANCHOR195
-	.word	.LANCHOR199
+	.word	.LANCHOR194
+	.word	.LANCHOR192
+	.word	.LANCHOR196
 	.word	.LANCHOR110
-	.word	.LANCHOR7
-	.word	.LANCHOR27
+	.word	.LANCHOR9
 	.word	.LANCHOR6
-	.word	.LANCHOR200
-	.word	.LANCHOR194
-	.word	.LANCHOR14
-	.word	.LC156
+	.word	.LANCHOR8
+	.word	.LANCHOR197
+	.word	.LANCHOR191
+	.word	.LANCHOR19
+	.word	.LC153
 	.word	1229739078
-	.word	393251
+	.word	393252
 	.word	.LANCHOR111
 	.word	.LANCHOR131
-	.word	.LANCHOR193
+	.word	.LANCHOR190
+	.word	.LC152
 	.word	.LC155
-	.word	.LC158
-	.word	.LC157
+	.word	.LC154
 	.size	ftl_info_blk_init, .-ftl_info_blk_init
 	.section	.text.ftl_ext_info_flush,"ax",%progbits
 	.align	1
@@ -19147,55 +18853,55 @@ ftl_info_blk_init:
 ftl_ext_info_flush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L3006
+	ldr	r3, .L2955
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	ldr	r3, [r3]
 	ldr	r2, [r3, #520]
-	cbz	r2, .L2991
+	cbz	r2, .L2940
 	movs	r2, #0
 	str	r2, [r3, #520]
-.L2991:
-	ldr	r6, .L3006+4
+.L2940:
+	ldr	r6, .L2955+4
 	movs	r0, #0
 	bl	ftl_total_vpn_update
 	mov	r5, r6
-.L2995:
+.L2944:
 	ldr	r3, [r6]
 	ldr	r2, [r3, #56]
 	adds	r2, r2, #1
 	str	r2, [r3, #56]
 	ldrh	r2, [r3, #140]
-	ldr	r3, .L3006+8
+	ldr	r3, .L2955+8
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L2993
+	bcc	.L2942
 	bl	ftl_ext_alloc_new_blk
-.L2993:
+.L2942:
 	ldr	r3, [r5]
 	ldrh	r2, [r3, #130]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L2994
-	movw	r2, #2203
-	ldr	r1, .L3006+12
-	ldr	r0, .L3006+16
+	bne	.L2943
+	movw	r2, #2211
+	ldr	r1, .L2955+12
+	ldr	r0, .L2955+16
 	bl	printf
-.L2994:
-	ldr	r3, .L3006+20
+.L2943:
+	ldr	r3, .L2955+20
 	ldr	r2, [r5]
-	ldr	fp, .L3006+40
+	ldr	fp, .L2955+40
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	ldrh	r1, [r2, #130]
-	ldr	r8, .L3006+44
+	ldr	r8, .L2955+44
 	rsb	r4, r3, #24
-	ldr	r3, .L3006+24
+	ldr	r3, .L2955+24
 	mov	r0, r8
 	ldrh	r3, [r3]
 	subs	r3, r4, r3
 	movs	r4, #1
 	asr	r7, r1, r3
 	lsls	r4, r4, r3
-	ldr	r3, .L3006+28
+	ldr	r3, .L2955+28
 	subs	r4, r4, #1
 	ands	r4, r4, r1
 	ldrh	r1, [r3]
@@ -19213,7 +18919,7 @@ ftl_ext_info_flush:
 	lsl	r1, fp, #9
 	ldr	r3, [r3, #56]
 	str	r3, [r8, #4]
-	ldr	r3, .L3006+32
+	ldr	r3, .L2955+32
 	ldr	r10, [r3]
 	mov	r0, r10
 	bl	js_hash
@@ -19230,36 +18936,36 @@ ftl_ext_info_flush:
 	uxth	r3, r3
 	cmp	r3, #1
 	strh	r3, [r2, #140]	@ movhi
-	beq	.L2995
+	beq	.L2944
 	adds	r0, r0, #1
-	ldr	r3, .L3006+36
-	beq	.L2996
+	ldr	r3, .L2955+36
+	beq	.L2945
 	ldrb	r0, [r3]	@ zero_extendqisi2
-	cbz	r0, .L2997
-.L2996:
-.L2992:
+	cbz	r0, .L2946
+.L2945:
+.L2941:
 	movs	r2, #0
 	strb	r2, [r3]
-	b	.L2995
-.L2997:
+	b	.L2944
+.L2946:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3007:
+.L2956:
 	.align	2
-.L3006:
-	.word	.LANCHOR10
+.L2955:
+	.word	.LANCHOR12
 	.word	.LANCHOR110
-	.word	.LANCHOR95
-	.word	.LANCHOR201
+	.word	.LANCHOR94
+	.word	.LANCHOR198
 	.word	.LC0
-	.word	.LANCHOR32
-	.word	.LANCHOR75
+	.word	.LANCHOR31
+	.word	.LANCHOR74
 	.word	.LANCHOR111
-	.word	.LANCHOR200
-	.word	.LANCHOR199
+	.word	.LANCHOR197
+	.word	.LANCHOR196
 	.word	.LANCHOR131
-	.word	.LANCHOR193
+	.word	.LANCHOR190
 	.size	ftl_ext_info_flush, .-ftl_ext_info_flush
 	.section	.text.ftl_ext_info_init,"ax",%progbits
 	.align	1
@@ -19274,14 +18980,14 @@ ftl_ext_info_init:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r2, #0
-	ldr	r3, .L3030
-	ldr	r5, .L3030+4
+	ldr	r3, .L2979
+	ldr	r5, .L2979+4
 	strh	r2, [r3]	@ movhi
-	ldr	r1, .L3030+8
+	ldr	r1, .L2979+8
 	ldr	r3, [r5]
 	ldrh	r4, [r1]
 	ldrh	r2, [r3, #130]
-	ldr	r3, .L3030+12
+	ldr	r3, .L2979+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	rsb	r3, r3, #24
 	subs	r3, r3, r4
@@ -19291,73 +18997,73 @@ ftl_ext_info_init:
 	subs	r4, r4, #1
 	uxtb	r8, r7
 	ands	r4, r4, r2
-	ldr	r2, .L3030+16
+	ldr	r2, .L2979+16
 	movs	r3, #4
 	mov	r1, r4
 	str	r3, [sp]
 	mov	r0, r8
-	ldr	r3, .L3030+20
+	ldr	r3, .L2979+20
 	ldr	r2, [r2]
 	bl	flash_get_last_written_page
-	ldr	r3, .L3030+24
+	ldr	r3, .L2979+24
 	mov	r6, r0
 	ldr	r3, [r3]
 	lsls	r2, r3, #19
-	bpl	.L3009
+	bpl	.L2958
 	ldr	r3, [r5]
 	uxth	r7, r7
-	movw	r2, #2248
-	ldr	r1, .L3030+28
+	mov	r2, #2256
+	ldr	r1, .L2979+28
 	ldrh	r3, [r3, #130]
 	str	r7, [sp]
 	str	r3, [sp, #4]
 	mov	r3, r0
-	ldr	r0, .L3030+32
+	ldr	r0, .L2979+32
 	bl	printf
-.L3009:
+.L2958:
 	movs	r7, #0
-.L3010:
+.L2959:
 	uxth	r10, r6
 	sub	r3, r10, r7
 	lsls	r0, r3, #16
-	bmi	.L3015
-	ldr	r3, .L3030+36
+	bmi	.L2964
+	ldr	r3, .L2979+36
 	subs	r1, r6, r7
-	ldr	fp, .L3030+60
-	ldr	r2, .L3030+16
+	ldr	fp, .L2979+60
+	ldr	r2, .L2979+16
 	ldrh	r0, [r3]
 	ldrb	r3, [fp]	@ zero_extendqisi2
 	mla	r1, r4, r0, r1
 	str	r3, [sp]
-	ldr	r3, .L3030+20
+	ldr	r3, .L2979+20
 	ldr	r2, [r2]
 	mov	r0, r8
 	bl	flash_read_page_en
 	adds	r3, r0, #1
-	beq	.L3011
+	beq	.L2960
 	cmp	r0, #512
-	beq	.L3011
-	ldr	r3, .L3030+40
-	ldr	r2, .L3030+44
+	beq	.L2960
+	ldr	r3, .L2979+40
+	ldr	r2, .L2979+44
 	ldr	r3, [r3]
 	ldr	r3, [r3]
 	cmp	r3, r2
-	bne	.L3011
-	ldr	r3, .L3030+20
+	bne	.L2960
+	ldr	r3, .L2979+20
 	ldr	r3, [r3, #8]
 	cmp	r3, #0
-	bne	.L3012
-.L3015:
+	bne	.L2961
+.L2964:
 	bl	zftl_sblk_list_init
 	ldr	r2, [r5]
 	ldrh	r3, [r2, #140]
 	cmp	r3, r6
-	bgt	.L3014
+	bgt	.L2963
 	add	r3, r10, #1
 	strh	r3, [r2, #140]	@ movhi
 	bl	ftl_ext_info_flush
-.L3014:
-	ldr	r3, .L3030+40
+.L2963:
+	ldr	r3, .L2979+40
 	movw	r1, #65535
 	movs	r2, #0
 	ldr	r3, [r3]
@@ -19368,277 +19074,1304 @@ ftl_ext_info_init:
 	str	r1, [r3, #560]
 	mov	r1, #-1
 	str	r1, [r3, #564]
-	ldr	r1, .L3030+24
+	ldr	r1, .L2979+24
 	str	r2, [r3, #520]
 	str	r2, [r3, #604]
 	ldr	r1, [r1]
 	str	r2, [r3, #608]
 	lsls	r1, r1, #19
-	bpl	.L3017
+	bpl	.L2966
 	str	r2, [sp]
-	ldr	r1, .L3030+28
+	ldr	r1, .L2979+28
 	ldr	r3, [r3, #12]
-	ldr	r0, .L3030+48
+	ldr	r0, .L2979+48
 	bl	printf
-.L3017:
-	ldr	r3, .L3030+52
+.L2966:
+	ldr	r3, .L2979+52
 	movw	r2, #65535
 	movs	r0, #0
 	strh	r2, [r3]	@ movhi
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3012:
+.L2961:
 	ldrb	r1, [fp]	@ zero_extendqisi2
 	str	r3, [sp, #12]
-	ldr	r3, .L3030+16
+	ldr	r3, .L2979+16
 	lsls	r1, r1, #9
 	ldr	r0, [r3]
 	bl	js_hash
 	ldr	r3, [sp, #12]
 	cmp	r3, r0
-	beq	.L3015
+	beq	.L2964
 	mov	r1, r3
-	ldr	r0, .L3030+56
+	ldr	r0, .L2979+56
 	bl	printf
-.L3011:
+.L2960:
 	adds	r7, r7, #1
-	b	.L3010
-.L3031:
+	b	.L2959
+.L2980:
 	.align	2
-.L3030:
+.L2979:
 	.word	.LANCHOR121
 	.word	.LANCHOR110
-	.word	.LANCHOR75
-	.word	.LANCHOR32
-	.word	.LANCHOR200
-	.word	.LANCHOR193
-	.word	.LANCHOR14
-	.word	.LANCHOR202
-	.word	.LC159
+	.word	.LANCHOR74
+	.word	.LANCHOR31
+	.word	.LANCHOR197
+	.word	.LANCHOR190
+	.word	.LANCHOR19
+	.word	.LANCHOR199
+	.word	.LC156
 	.word	.LANCHOR111
-	.word	.LANCHOR10
+	.word	.LANCHOR12
 	.word	1162432070
-	.word	.LC161
-	.word	.LANCHOR73
-	.word	.LC160
+	.word	.LC158
+	.word	.LANCHOR72
+	.word	.LC157
 	.word	.LANCHOR131
 	.size	ftl_ext_info_init, .-ftl_ext_info_init
-	.section	.text.ftl_low_format_data_init,"ax",%progbits
+	.section	.text.ftl_prog_ppa_page,"ax",%progbits
 	.align	1
-	.global	ftl_low_format_data_init
+	.global	ftl_prog_ppa_page
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_low_format_data_init, %function
-ftl_low_format_data_init:
+	.type	ftl_prog_ppa_page, %function
+ftl_prog_ppa_page:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r4, r5, r6, r7, lr}
+	ldr	r4, .L2982
+	ldrb	r7, [r4]	@ zero_extendqisi2
+	movs	r4, #1
+	str	r3, [sp]
+	mov	r3, r2
+	mov	r2, r1
+	rsb	r5, r7, #24
+	lsl	r6, r4, r5
+	lsls	r4, r4, r7
+	lsr	r5, r0, r5
+	subs	r4, r4, #1
+	subs	r6, r6, #1
+	ands	r4, r4, r5
+	and	r1, r6, r0
+	uxtb	r0, r4
+	bl	ftl_prog_page
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, r6, r7, pc}
+.L2983:
+	.align	2
+.L2982:
+	.word	.LANCHOR31
+	.size	ftl_prog_ppa_page, .-ftl_prog_ppa_page
+	.section	.text.ftl_write_last_log_page,"ax",%progbits
+	.align	1
+	.global	ftl_write_last_log_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_write_last_log_page, %function
+ftl_write_last_log_page:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
-	mov	r2, #16384
-	ldr	r3, .L3034
-	movs	r1, #0
-	ldr	r5, .L3034+4
-	ldr	r0, [r3]
-	bl	ftl_memset
-	bl	zftl_sblk_list_init
-	movs	r0, #1
-	bl	ftl_alloc_sblk
-	movs	r1, #0
+	mov	r4, r0
+	ldrh	r3, [r0, #6]
+	cmp	r3, #1
+	bne	.L2987
+	ldr	r3, .L2989
+	ldrh	r7, [r0, #12]
+	ldr	r5, [r3]
+	bl	ftl_get_new_free_page
+	adds	r3, r0, #1
 	mov	r6, r0
-	bl	ftl_erase_sblk
-	ldr	r1, [r5]
-	mov	r0, r6
-	add	r1, r1, #672
-	bl	ftl_get_blk_list_in_sblk
-	ldr	r3, [r5]
+	beq	.L2988
+	ldrh	r0, [r4]
+	add	r5, r5, r7, lsl #2
+	ldr	r4, .L2989+4
+	bl	ftl_vpn_decrement
+	ldr	r3, .L2989+8
+	mov	r0, r5
+	ldr	r2, .L2989+12
+	str	r3, [r4]
+	ldr	r3, .L2989+16
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	muls	r1, r3, r1
+	lsls	r1, r1, #2
+	bl	js_hash
+	ldr	r3, .L2989+20
 	movs	r2, #0
-	ldrh	r7, [r3, #672]
-	strh	r2, [r3, #690]	@ movhi
-	movw	r2, #65533
-	subs	r3, r7, #1
-	uxth	r3, r3
-	cmp	r3, r2
-	bls	.L3033
-	movw	r2, #2476
-	ldr	r1, .L3034+8
-	ldr	r0, .L3034+12
-	bl	printf
-.L3033:
-	ldr	r0, [r5]
-	movs	r4, #0
-	mov	r2, #256
-	movs	r1, #255
-	strh	r4, [r0, #696]	@ movhi
-	add	r0, r0, #416
-	bl	ftl_memset
-	ldr	r0, [r5]
-	mov	r1, r4
-	mov	r2, #4096
-	add	r0, r0, #704
-	bl	ftl_memset
-	ldr	r3, .L3034+16
-	ldr	r1, .L3034+20
-	ldr	r2, [r5]
+	str	r0, [r4, #4]
+	mov	r1, r5
+	str	r2, [r4, #8]
+	mov	r0, r6
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	ldrh	r1, [r1]
-	strh	r7, [r2, #692]	@ movhi
-	rsb	r3, r3, #24
-	strh	r6, [r2, #416]	@ movhi
-	subs	r3, r3, r1
-	asr	r3, r7, r3
-	ldr	r7, .L3034+24
-	strh	r3, [r2, #694]	@ movhi
-	movs	r3, #1
-	strh	r3, [r2, #688]	@ movhi
-	ldr	r3, .L3034+28
-	ldrh	r3, [r3]
-	strh	r3, [r2, #698]	@ movhi
-	ldr	r2, .L3034+32
-	ldr	r3, [r7]
-	str	r2, [r3]
-	bl	ftl_alloc_sys_blk
-	mov	r1, r4
-	mov	r6, r0
-	bl	ftl_erase_phy_blk
-	ldr	r3, [r5]
-	movs	r1, #2
-	ldr	r0, [r7]
-	strh	r6, [r3, #130]	@ movhi
-	movw	r6, #65535
-	strh	r4, [r3, #140]	@ movhi
-	adds	r0, r0, #16
-	strh	r6, [r0, #568]	@ movhi
-	strh	r6, [r0, #570]	@ movhi
-	strh	r6, [r0, #572]	@ movhi
-	strh	r6, [r0, #574]	@ movhi
-	bl	ftl_open_sblk_init
-	ldr	r0, [r7]
-	movs	r1, #3
-	adds	r0, r0, #48
-	bl	ftl_open_sblk_init
-	ldr	r3, [r5]
-	movs	r1, #255
-	ldr	r0, [r7]
-	ldrh	r2, [r3, #134]
-	adds	r0, r0, #136
-	strh	r4, [r0, #-12]	@ movhi
-	strh	r4, [r0, #-16]	@ movhi
-	strh	r2, [r0, #-10]	@ movhi
-	mov	r2, #-1
-	strh	r4, [r0, #-14]	@ movhi
-	strh	r6, [r0, #-56]	@ movhi
-	strh	r6, [r0, #-6]	@ movhi
-	str	r2, [r0, #408]
-	strh	r2, [r3, #126]	@ movhi
-	mov	r2, #256
-	str	r4, [r0, #384]
-	str	r4, [r0, #388]
-	str	r4, [r0, #392]
-	bl	ftl_memset
-	ldr	r0, [r7]
-	movs	r2, #128
-	movs	r1, #255
-	add	r0, r0, #392
-	bl	ftl_memset
-	bl	ftl_ext_info_flush
-	mov	r0, r4
-	bl	ftl_info_flush
-	bl	ftl_info_blk_init
-	mov	r0, r4
+	str	r2, [r4, #12]
+	str	r2, [r4, #16]
+	cmp	r3, #8
+	it	hi
+	strhi	r2, [r4, #20]
+	ldr	r2, .L2989+4
+	bl	ftl_prog_ppa_page
+.L2988:
+	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L3035:
+.L2987:
+	mov	r0, #-1
+	pop	{r3, r4, r5, r6, r7, pc}
+.L2990:
 	.align	2
-.L3034:
-	.word	.LANCHOR200
-	.word	.LANCHOR110
-	.word	.LANCHOR203
-	.word	.LC0
-	.word	.LANCHOR32
-	.word	.LANCHOR75
-	.word	.LANCHOR10
-	.word	.LANCHOR204
-	.word	1162432070
-	.size	ftl_low_format_data_init, .-ftl_low_format_data_init
-	.section	.text.ftl_low_format,"ax",%progbits
+.L2989:
+	.word	.LANCHOR117
+	.word	.LANCHOR188
+	.word	-178307901
+	.word	.LANCHOR79
+	.word	.LANCHOR94
+	.word	.LANCHOR131
+	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
+	.section	.text.ftl_dump_write_open_sblk,"ax",%progbits
 	.align	1
-	.global	ftl_low_format
+	.global	ftl_dump_write_open_sblk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_low_format, %function
-ftl_low_format:
-	@ args = 0, pretend = 0, frame = 32
+	.type	ftl_dump_write_open_sblk, %function
+ftl_dump_write_open_sblk:
+	@ args = 0, pretend = 0, frame = 64
 	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L3030
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r4, #8
-	ldr	r6, .L3073
-	sub	sp, sp, #40
-	movs	r1, #0
-	ldr	r0, .L3073+4
-	bl	printf
-.L3039:
-	ldr	r3, [r6]
-	add	r3, r3, r4
-	ldrb	r5, [r3, #32]	@ zero_extendqisi2
-	cmp	r5, #128
-	ble	.L3037
-	cmp	r5, #255
-	beq	.L3038
-	movw	r2, #2531
-	ldr	r1, .L3073+8
-	ldr	r0, .L3073+12
-	bl	printf
-.L3037:
-	ldr	r3, .L3073+16
-	movs	r0, #0
+	mov	r5, r0
+	sub	sp, sp, #104
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bls	.L2991
+	ldr	r3, .L3030+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L2993
+	ldr	r3, .L3030+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L2991
+.L2993:
+	ldr	r3, .L3030+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L2991
+	ldr	r7, .L3030+16
+	lsls	r4, r5, #2
+	add	r1, sp, #88
+	strh	r5, [sp, #72]	@ movhi
+	mov	r0, r5
+	movs	r6, #0
+	ldr	r3, [r7]
+	add	r3, r3, r4
+	ldrb	r3, [r3, #2]	@ zero_extendqisi2
+	and	r3, r3, #224
+	cmp	r3, #160
+	itet	eq
+	ldreq	r3, .L3030+20
+	movne	fp, #1
+	ldrbeq	fp, [r3]	@ zero_extendqisi2
+	bl	ftl_get_blk_list_in_sblk
+	ldr	r3, .L3030+24
+	uxtb	r0, r0
+	strb	r6, [sp, #77]
+	strb	r0, [sp, #81]
+	ldrh	r3, [r3]
+	strh	r6, [sp, #74]	@ movhi
+	strh	r6, [sp, #82]	@ movhi
+	smulbb	r0, r3, r0
+	ldr	r3, [r7]
+	mov	r7, r6
+	ldr	r1, [r3, r5, lsl #2]
+	add	r4, r4, r3
+	ldrb	r2, [r4, #2]	@ zero_extendqisi2
+	strh	r0, [sp, #78]	@ movhi
+	ubfx	r1, r1, #11, #8
+	ldr	r0, .L3030+28
+	str	r1, [sp, #4]
+	mov	r1, r5
+	ldrh	r3, [r3, r5, lsl #2]
+	ubfx	r3, r3, #0, #11
+	str	r3, [sp]
+	ubfx	r3, r2, #3, #2
+	lsrs	r2, r2, #5
+	bl	printf
+	movs	r0, #1
+	bl	buf_alloc
+	mov	r4, r0
+	str	r6, [sp, #44]
+.L2995:
+	ldr	r3, .L3030+24
+	uxth	r10, r6
+	ldrh	r3, [r3]
+	cmp	r3, r10
+	bls	.L3004
+	mov	r3, r10
+	str	r10, [sp, #52]
+	lsls	r3, r3, #1
+	mov	r8, #0
+	subs	r2, r3, #1
+	add	r3, r3, r10
+	subs	r3, r3, #1
+	str	r2, [sp, #56]
+	str	r3, [sp, #60]
+	b	.L3007
+.L3005:
+	ldr	r3, [sp, #64]
+	add	r2, sp, #104
+	add	r3, r2, r3, lsl #1
+	ldrh	r3, [r3, #-32]
+	str	r3, [sp, #48]
+	movw	r3, #65535
+	ldr	r2, [sp, #48]
+	cmp	r2, r3
+	bne	.L2996
+.L3003:
+	adds	r7, r7, #1
+	uxth	r7, r7
+.L2997:
+	cmp	fp, r7
+	bcs	.L3005
+	add	r8, r8, #1
+.L3007:
+	uxth	r3, r8
+	str	r3, [sp, #44]
+	ldr	r2, [sp, #44]
+	ldrb	r3, [sp, #81]	@ zero_extendqisi2
+	cmp	r3, r2
+	bls	.L3006
+	mov	r3, r2
+	movs	r7, #1
+	adds	r3, r3, #8
+	str	r3, [sp, #64]
+	b	.L2997
+.L2996:
+	ldr	r3, .L3030+32
+	cmp	fp, #3
+	ldr	r2, [sp, #48]
+	ldrh	r3, [r3]
+	mul	r3, r2, r3
+	bne	.L2998
+	ldr	r2, .L3030+36
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbz	r2, .L2999
+	ldr	r2, [sp, #60]
+.L3029:
+	add	r3, r3, r2
+	ldr	r2, .L3030+20
+	add	r3, r3, r7
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	orr	r3, r3, r2, lsl #24
+	b	.L3000
+.L2999:
+	uxtah	r3, r3, r6
+	orr	r3, r3, r7, lsl #24
+.L3000:
+	str	r3, [r4, #24]
+	movs	r1, #1
+	mov	r0, r4
+	str	r3, [sp, #68]
+	bl	sblk_read_page
+	ldr	r3, [r4, #36]
+	cmp	r3, #512
+	str	r3, [sp, #40]
+	ldr	r3, [sp, #68]
+	beq	.L3002
+	ldr	r2, [sp, #40]
+	adds	r2, r2, #1
+	bne	.L3003
+.L3002:
+	ldr	r1, [r4, #12]
+	ldr	r2, [r4, #4]
+	ldr	r0, [r1, #12]
+	str	r0, [sp, #32]
+	ldr	r0, [r1, #8]
+	str	r0, [sp, #28]
+	ldr	r0, [r1, #4]
+	str	r0, [sp, #24]
+	ldr	r1, [r1]
+	ldr	r0, .L3030+40
+	str	r1, [sp, #20]
+	ldr	r1, [r2, #12]
+	str	r1, [sp, #16]
+	ldr	r1, [r2, #8]
+	str	r1, [sp, #12]
+	ldr	r1, [r2, #4]
+	str	r1, [sp, #8]
+	ldr	r2, [r2]
+	ldr	r1, [sp, #48]
+	str	r2, [sp, #4]
+	ldr	r2, [sp, #40]
+	str	r2, [sp]
+	ldr	r2, [sp, #52]
+	bl	printf
+	ldr	r3, [sp, #40]
+	cmp	r3, #512
+	bne	.L3003
+.L3004:
+	uxth	r2, r6
+	ldr	r6, .L3030+44
+	ldr	r3, [sp, #44]
+	mov	r1, r5
+	str	r7, [sp]
+	ldr	r0, .L3030+48
+	bl	printf
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	movs	r1, #0
+	ldr	r0, [r4, #4]
+	ldr	fp, .L3030+64
+	lsls	r2, r2, #9
+	bl	ftl_memset
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	movs	r1, #0
+	ldr	r0, [r4, #12]
+	lsls	r2, r2, #1
+	bl	ftl_memset
+.L3008:
+	ldr	r3, .L3030+24
+	ldrh	r3, [r3]
+	cmp	r3, r10
+	bls	.L3014
+	lsl	r3, r10, #1
+	movs	r7, #0
+	str	r3, [sp, #40]
+	b	.L3015
+.L2998:
+	cmp	fp, #2
+	bne	.L3001
+	ldr	r2, [sp, #56]
+	b	.L3029
+.L3001:
+	uxtah	r3, r3, r6
+	b	.L3000
+.L3006:
+	adds	r6, r6, #1
+	b	.L2995
+.L3013:
+	ldr	r3, [fp]
+	uxth	r8, r7
+	tst	r3, #4096
+	beq	.L3009
+	mov	r2, r8
+	mov	r1, r10
+	ldr	r0, .L3030+52
+	bl	printf
+.L3009:
+	ldr	r2, .L3030+4
+	ldr	r0, .L3030+32
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbz	r2, .L3010
+	add	r3, sp, #104
+	add	r3, r3, r8, lsl #1
+	ldrh	r2, [r3, #-16]
+	ldrh	r3, [r0]
+	mov	r0, r4
+	muls	r3, r2, r3
+	orr	r3, r3, r10
+	str	r3, [r4, #24]
+	bl	sblk_3d_tlc_dump_prog
+.L3011:
+	adds	r7, r7, #1
+.L3015:
+	ldrb	r2, [sp, #81]	@ zero_extendqisi2
+	uxth	r3, r7
+	cmp	r2, r3
+	bhi	.L3013
+	add	r3, r10, #1
+	uxth	r10, r3
+	b	.L3008
+.L3010:
+	ldr	r1, .L3030+20
+	add	r3, sp, #104
+	add	r3, r3, r8, lsl #1
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	cmp	r1, #2
+	bne	.L3012
+	ldrh	r2, [r3, #-16]
+	ldrh	r3, [r0]
+	mov	r0, r4
+	muls	r3, r2, r3
+	ldr	r2, [sp, #40]
+	orrs	r3, r3, r2
+	orr	r3, r3, #33554432
+	str	r3, [r4, #24]
+	bl	sblk_mlc_dump_prog
+	b	.L3011
+.L3012:
+	ldrh	r3, [r3, #-16]
+	ldrh	r1, [r0]
+	movs	r0, #1
+	muls	r1, r3, r1
+	ldr	r3, .L3030+56
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	orr	r1, r1, r10
+	str	r1, [r4, #24]
+	rsb	lr, r3, #24
+	str	r2, [sp, #4]
+	lsls	r0, r0, r3
+	subs	r3, r0, #1
+	lsr	r0, r1, lr
+	lsl	ip, r3, lr
+	ands	r0, r0, r3
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	bic	r1, r1, ip
+	uxtb	r0, r0
+	str	r3, [sp]
+	ldr	r3, [r4, #12]
+	ldr	r2, [r4, #4]
+	bl	flash_prog_page_en
+	b	.L3011
+.L3014:
+	mov	r0, r4
+	bl	zbuf_free
+	mov	r1, r5
+	ldr	r0, .L3030+60
+	bl	printf
+.L2991:
+	add	sp, sp, #104
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3031:
+	.align	2
+.L3030:
+	.word	.LANCHOR8
+	.word	.LANCHOR83
+	.word	.LANCHOR80
+	.word	.LANCHOR35
+	.word	.LANCHOR9
+	.word	.LANCHOR78
+	.word	.LANCHOR94
+	.word	.LC159
+	.word	.LANCHOR111
+	.word	.LANCHOR36
+	.word	.LC160
+	.word	.LANCHOR131
+	.word	.LC161
+	.word	.LC162
+	.word	.LANCHOR31
+	.word	.LC163
+	.word	.LANCHOR19
+	.size	ftl_dump_write_open_sblk, .-ftl_dump_write_open_sblk
+	.section	.text.gc_ink_check_sblk,"ax",%progbits
+	.align	1
+	.global	gc_ink_check_sblk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_ink_check_sblk, %function
+gc_ink_check_sblk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r4, .L3059
+	ldrh	r3, [r4, #2106]
+	ldr	r6, [r4, #2176]
+	cmp	r3, #3
+	bhi	.L3033
+	tbb	[pc, r3]
+.L3035:
+	.byte	(.L3034-.L3035)/2
+	.byte	(.L3036-.L3035)/2
+	.byte	(.L3037-.L3035)/2
+	.byte	(.L3038-.L3035)/2
+	.p2align 1
+.L3034:
+	ldr	r5, .L3059+4
+	ldrh	r3, [r5]
+	cmp	r3, #7
+	bls	.L3032
+	ldr	r3, .L3059+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #2
+	bls	.L3032
+	movs	r1, #0
+	ldr	r0, .L3059+12
+	movw	r8, #65535
+	bl	_list_get_gc_head_node
+	cmp	r0, r8
+	beq	.L3032
+	ldr	r7, .L3059+16
+	ldr	r3, [r7]
+	ldrh	r3, [r3, r0, lsl #2]
+	ubfx	r3, r3, #0, #11
+	cmp	r3, #2
+	bgt	.L3032
+	movs	r0, #1
+	bl	buf_alloc
+	str	r0, [r4, #2176]
+	cbz	r0, .L3032
+	mov	r2, r5
+	movs	r1, #0
+	ldr	r0, .L3059+12
+	bl	_list_pop_index_node
+	uxth	r6, r0
+	mov	r5, r0
+	cmp	r6, r8
+	bne	.L3042
+	ldr	r0, [r4, #2176]
+	bl	zbuf_free
+	movs	r3, #0
+	str	r3, [r4, #2176]
+.L3032:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3042:
+	ldr	r1, .L3059+20
+	mov	r0, r6
+	bl	ftl_get_blk_list_in_sblk
+	movs	r3, #0
+	uxth	r5, r5
+	strh	r3, [r4, #2144]	@ movhi
+	movs	r3, #1
+	strh	r3, [r4, #2106]	@ movhi
+	ldr	r3, [r7]
+	strb	r0, [r4, #2151]
+	strh	r6, [r4, #2142]	@ movhi
+	ldrh	r3, [r3, r5, lsl #2]
+	tst	r3, #1
+	ldr	r3, .L3059+24
+	ite	ne
+	movne	r1, #85
+	moveq	r1, #170
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	ldr	r3, [r4, #2176]
+	lsls	r2, r2, #9
+	ldr	r0, [r3, #4]
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	ftl_memset
+.L3036:
+	movs	r1, #0
+	ldrh	r0, [r4, #2142]
+	bl	ftl_erase_sblk
+	movs	r3, #2
+.L3057:
+	strh	r3, [r4, #2106]	@ movhi
+	b	.L3032
+.L3037:
+	ldr	r8, .L3059+40
+	movs	r7, #0
+	ldr	r10, .L3059+44
+	bl	sblk_wait_write_queue_completed
+.L3044:
+	ldrb	r2, [r4, #2151]	@ zero_extendqisi2
+	uxth	r3, r7
+	cmp	r2, r3
+	bhi	.L3046
+	ldrh	r3, [r4, #2144]
+	ldr	r2, .L3059+28
+	adds	r3, r3, #1
+	ldrh	r2, [r2]
+	uxth	r3, r3
+	strh	r3, [r4, #2144]	@ movhi
+	cmp	r2, r3
+	bhi	.L3032
+	movs	r3, #0
+	strh	r3, [r4, #2144]	@ movhi
+	movs	r3, #3
+	b	.L3057
+.L3046:
+	uxth	r3, r7
+	movw	r2, #65535
+	add	r3, r4, r3, lsl #1
+	ldrh	r3, [r3, #2158]
+	cmp	r3, r2
+	beq	.L3045
+	ldrh	r2, [r8]
+	mov	lr, #0
+	ldrh	r1, [r4, #2144]
+	ldr	r0, .L3059+32
+	mla	r1, r3, r2, r1
+	ldr	r2, [r6, #4]
+	ldr	r3, [r6, #12]
+	stm	r2, {r1, r10}
+	str	lr, [r3]
+	ldrb	r5, [r0]	@ zero_extendqisi2
+	movs	r0, #1
+	str	lr, [sp, #4]
+	rsb	fp, r5, #24
+	lsls	r0, r0, r5
+	subs	r5, r0, #1
+	lsr	r0, r1, fp
+	lsl	ip, r5, fp
+	ands	r0, r0, r5
+	ldr	r5, .L3059+24
+	bic	r1, r1, ip
+	uxtb	r0, r0
+	ldrb	r5, [r5]	@ zero_extendqisi2
+	str	r5, [sp]
+	bl	flash_prog_page_en
+.L3045:
+	adds	r7, r7, #1
+	b	.L3044
+.L3038:
+	ldr	r10, .L3059+40
+	mov	fp, #0
+	movw	r8, #65535
+	bl	sblk_wait_write_queue_completed
+.L3047:
+	ldrb	r2, [r4, #2151]	@ zero_extendqisi2
+	uxth	r3, fp
+	cmp	r2, r3
+	bhi	.L3051
+	ldrh	r3, [r4, #2144]
+	ldr	r2, .L3059+28
+	adds	r3, r3, #1
+	ldrh	r2, [r2]
+	uxth	r3, r3
+	strh	r3, [r4, #2144]	@ movhi
+	cmp	r2, r3
+	bhi	.L3032
+	movs	r5, #0
+	ldr	r0, [r4, #2176]
+	strh	r5, [r4, #2106]	@ movhi
+	bl	zbuf_free
+	ldrh	r3, [r4, #2108]
+	str	r5, [r4, #2176]
+	cmp	r3, #15
+	bhi	.L3052
+	adds	r2, r3, #1
+	add	r3, r4, r3, lsl #1
+	strh	r2, [r4, #2108]	@ movhi
+	ldrh	r2, [r4, #2142]
+	strh	r2, [r3, #2110]	@ movhi
+.L3053:
+	ldrh	r2, [r4, #2108]
+	ldrh	r1, [r4, #2142]
+	ldr	r0, .L3059+36
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	printf
+.L3051:
+	uxth	r5, fp
+	adds	r5, r5, #8
+	add	r5, r4, r5, lsl #1
+	ldrh	r3, [r5, #2142]
+	cmp	r3, r8
+	beq	.L3049
+	ldrh	r2, [r4, #2144]
+	movs	r1, #1
+	ldrh	r7, [r10]
+	mov	r0, r6
+	mla	r7, r3, r7, r2
+	str	r7, [r6, #24]
+	bl	sblk_read_page
+	ldr	r3, [r6, #4]
+	ldr	r3, [r3]
+	cmp	r7, r3
+	beq	.L3049
+	mov	r0, r7
+	bl	ftl_mask_bad_block
+	strh	r8, [r5, #2142]	@ movhi
+.L3049:
+	add	fp, fp, #1
+	b	.L3047
+.L3052:
+	ldrh	r0, [r4, #2142]
+	bl	zftl_insert_free_list
+	b	.L3053
+.L3033:
+	movs	r3, #0
+	b	.L3057
+.L3060:
+	.align	2
+.L3059:
+	.word	.LANCHOR70
+	.word	.LANCHOR107
+	.word	.LANCHOR57
+	.word	.LANCHOR108
+	.word	.LANCHOR9
+	.word	.LANCHOR70+2158
+	.word	.LANCHOR131
+	.word	.LANCHOR94
+	.word	.LANCHOR31
+	.word	.LC164
+	.word	.LANCHOR111
+	.word	1437269760
+	.size	gc_ink_check_sblk, .-gc_ink_check_sblk
+	.section	.text.ftl_ink_check_sblk,"ax",%progbits
+	.align	1
+	.global	ftl_ink_check_sblk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_ink_check_sblk, %function
+ftl_ink_check_sblk:
+	@ args = 0, pretend = 0, frame = 40
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r1, r0
+	ldr	r5, .L3079
+	sub	sp, sp, #48
+	mov	r4, r0
+	ldr	r2, [r5]
+	ldr	r3, [r2, r0, lsl #2]
+	ldrh	r2, [r2, r0, lsl #2]
+	ldr	r0, .L3079+4
+	ubfx	r3, r3, #11, #8
+	ubfx	r2, r2, #0, #11
+	bl	printf
+	movw	r3, #65535
+	str	r5, [sp, #8]
+	cmp	r4, r3
+	beq	.L3061
+	ldr	r3, .L3079+8
+	ldrh	r3, [r3]
+	cmp	r3, r4
+	bls	.L3061
+	movs	r1, #0
+	mov	r0, r4
+	bl	ftl_erase_sblk
+	add	r1, sp, #32
+	mov	r0, r4
+	strh	r4, [sp, #16]	@ movhi
+	movs	r6, #0
+	bl	ftl_get_blk_list_in_sblk
+	strb	r0, [sp, #25]
+	movs	r0, #1
+	bl	buf_alloc
+	ldr	r3, [sp, #8]
+	mov	r5, r0
+	ldr	r7, .L3079+12
+	ldr	r0, [r0, #4]
+	ldr	r3, [r3]
+	ldrb	r2, [r7]	@ zero_extendqisi2
+	ldrh	r3, [r3, r4, lsl #2]
+	lsls	r2, r2, #9
+	ubfx	r3, r3, #0, #11
+	cmp	r3, #1
+	ite	le
+	movle	r1, #85
+	movgt	r1, #170
+	bl	ftl_memset
+	bl	sblk_wait_write_queue_completed
+.L3065:
+	ldr	r3, .L3079+16
+	uxth	r2, r6
+	mov	r8, #0
+	ldrh	r1, [r3]
+	str	r3, [sp, #12]
+	cmp	r1, r2
+	bhi	.L3069
+.L3070:
+	ldr	r3, [sp, #12]
+	ldrh	r1, [r3]
+	uxth	r3, r8
+	cmp	r1, r3
+	bls	.L3075
+	mov	fp, #0
+	movw	r10, #65535
+	b	.L3076
+.L3067:
+	uxth	r3, r8
+	add	r2, sp, #48
+	add	r3, r2, r3, lsl #1
+	movw	r2, #65535
+	ldrh	r3, [r3, #-16]
+	cmp	r3, r2
+	beq	.L3066
+	ldr	r2, .L3079+20
+	uxth	r1, r6
+	ldr	r0, .L3079+24
+	mov	r10, #0
+	ldrh	r2, [r2]
+	mla	r1, r3, r2, r1
+	ldr	r2, [r5, #4]
+	ldr	r3, .L3079+28
+	str	r3, [r2, #4]
+	ldr	r3, [r5, #12]
+	str	r1, [r2]
+	str	r10, [r3]
+	ldrb	ip, [r0]	@ zero_extendqisi2
+	movs	r0, #1
+	str	r10, [sp, #4]
+	rsb	fp, ip, #24
+	lsl	r0, r0, ip
+	add	ip, r0, #-1
+	lsr	r0, r1, fp
+	lsl	lr, ip, fp
+	and	r0, r0, ip
+	ldrb	ip, [r7]	@ zero_extendqisi2
+	bic	r1, r1, lr
+	uxtb	r0, r0
+	str	ip, [sp]
+	bl	flash_prog_page_en
+.L3066:
+	add	r8, r8, #1
+.L3069:
+	ldrb	r2, [sp, #25]	@ zero_extendqisi2
+	uxth	r3, r8
+	cmp	r2, r3
+	bhi	.L3067
+	adds	r6, r6, #1
+	b	.L3065
+.L3074:
+	uxth	r6, fp
+	add	r3, sp, #48
+	adds	r6, r6, #8
+	add	r6, r3, r6, lsl #1
+	ldrh	r1, [r6, #-32]
+	cmp	r1, r10
+	beq	.L3072
+	ldr	r3, .L3079+20
+	uxth	r0, r8
+	ldrh	r7, [r3]
+	mla	r7, r1, r7, r0
+	movs	r1, #1
+	mov	r0, r5
+	str	r7, [r5, #24]
+	bl	sblk_read_page
+	ldr	r1, [r5, #4]
+	ldr	r1, [r1]
+	cmp	r7, r1
+	beq	.L3072
+	mov	r0, r7
+	bl	ftl_mask_bad_block
+	strh	r10, [r6, #-32]	@ movhi
+.L3072:
+	add	fp, fp, #1
+.L3076:
+	ldrb	r0, [sp, #25]	@ zero_extendqisi2
+	uxth	r1, fp
+	cmp	r0, r1
+	bhi	.L3074
+	add	r8, r8, #1
+	b	.L3070
+.L3075:
+	mov	r0, r5
+	bl	zbuf_free
+	ldr	r3, [sp, #8]
+	mov	r1, r4
+	ldr	r0, .L3079+32
+	ldr	r2, [r3]
+	ldr	r3, [r2, r4, lsl #2]
+	ldrh	r2, [r2, r4, lsl #2]
+	ubfx	r3, r3, #11, #8
+	ubfx	r2, r2, #0, #11
+	bl	printf
+.L3061:
+	add	sp, sp, #48
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3080:
+	.align	2
+.L3079:
+	.word	.LANCHOR9
+	.word	.LC165
+	.word	.LANCHOR8
+	.word	.LANCHOR131
+	.word	.LANCHOR94
+	.word	.LANCHOR111
+	.word	.LANCHOR31
+	.word	1437269760
+	.word	.LC166
+	.size	ftl_ink_check_sblk, .-ftl_ink_check_sblk
+	.section	.text.ftl_alloc_sblk,"ax",%progbits
+	.align	1
+	.global	ftl_alloc_sblk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_alloc_sblk, %function
+ftl_alloc_sblk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	uxth	r5, r0
+	cmp	r0, #5
+	mov	r10, r0
+	mov	r1, r5
+	mov	r0, #0
+	ite	ne
+	movne	r7, #0
+	moveq	r7, #2
+	bl	zftl_get_free_sblk
+	movw	r3, #65535
+	mov	r4, r0
+	cmp	r0, r3
+	beq	.L3083
+	ldr	r6, .L3094
+	lsl	r8, r0, #2
+	ldr	r5, [r6]
+	add	r5, r5, r8
+	ldrb	r3, [r5, #2]	@ zero_extendqisi2
+	tst	r3, #224
+	beq	.L3084
+	mov	r2, #1012
+	ldr	r1, .L3094+4
+	ldr	r0, .L3094+8
+	bl	printf
+.L3084:
+	ldrb	r3, [r5, #2]	@ zero_extendqisi2
+	bfi	r3, r10, #5, #3
+	uxtb	r3, r3
+	ubfx	r2, r3, #3, #2
+	orrs	r2, r2, r7
+	bfi	r3, r2, #3, #2
+	strb	r3, [r5, #2]
+	uxtb	r3, r3
+	and	r2, r3, #24
+	cmp	r2, #24
+	bne	.L3085
+	cbnz	r7, .L3085
+	movs	r2, #1
+	bfi	r3, r2, #3, #2
+	strb	r3, [r5, #2]
+.L3085:
+	ldr	r3, .L3094+12
+	ldr	r3, [r3]
+	ldrh	r3, [r3, #150]
+	cbz	r3, .L3086
+	ldr	r3, [r6]
+	ldrh	r3, [r3, r8]
+	ubfx	r3, r3, #0, #11
+	cbnz	r3, .L3086
+	cbnz	r7, .L3086
+	mov	r0, r4
+	bl	ftl_ink_check_sblk
+.L3086:
+	mov	r0, r4
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L3083:
+	bl	print_ftl_debug_info
+	mov	r2, r10
+	mov	r1, r4
+	ldr	r0, .L3094+16
+	bl	printf
+	mov	r1, r5
+	movs	r0, #0
+	bl	zftl_get_free_sblk
+	mov	r2, r10
+	mov	r1, r0
+	mov	r4, r0
+	ldr	r0, .L3094+16
+	bl	printf
+	bl	dump_all_list_info
+	movw	r2, #1031
+	ldr	r1, .L3094+4
+	ldr	r0, .L3094+8
+	bl	printf
+	b	.L3086
+.L3095:
+	.align	2
+.L3094:
+	.word	.LANCHOR9
+	.word	.LANCHOR200
+	.word	.LC0
+	.word	.LANCHOR110
+	.word	.LC167
+	.size	ftl_alloc_sblk, .-ftl_alloc_sblk
+	.section	.text.ftl_open_sblk_init,"ax",%progbits
+	.align	1
+	.global	ftl_open_sblk_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_open_sblk_init, %function
+ftl_open_sblk_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	mov	r4, r0
+	ldr	r8, .L3103+12
+	mov	r6, r1
+	movs	r7, #0
+.L3097:
+	movw	r10, #65535
+.L3098:
+	mov	r0, r6
+	bl	ftl_alloc_sblk
+	cmp	r0, r10
+	mov	r5, r0
+	beq	.L3098
+	movs	r1, #0
+	ldr	r10, .L3103+16
+	bl	ftl_erase_sblk
+	add	r1, r4, #16
+	mov	r0, r5
+	bl	ftl_get_blk_list_in_sblk
+	ldr	r1, .L3103
+	cmp	r6, #2
+	ldrh	r2, [r8]
+	uxtb	r0, r0
+	strh	r5, [r4]	@ movhi
+	ite	eq
+	moveq	r3, #0
+	ldrbne	r3, [r1]	@ zero_extendqisi2
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	strb	r0, [r4, #9]
+	smulbb	r0, r0, r2
+	strh	r7, [r4, #2]	@ movhi
+	it	ne
+	smulbbne	r3, r3, r2
+	strb	r7, [r4, #5]
+	mul	r2, r2, r1
+	ldr	r1, .L3103+4
+	strh	r0, [r4, #6]	@ movhi
+	it	ne
+	uxthne	r3, r3
+	strh	r7, [r4, #10]	@ movhi
+	ldr	r0, [r1]
+	movs	r1, #255
+	strh	r3, [r4, #12]	@ movhi
+	lsls	r2, r2, #2
+	strb	r6, [r4, #4]
+	add	r0, r0, r3, lsl #2
+	bl	ftl_memset
+	ldr	r3, [r10]
+	ldrh	r2, [r4, #6]
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	cbnz	r3, .L3096
+	mov	r1, r5
+	ldr	r0, .L3103+8
+	bl	printf
+	ldr	r3, [r10]
+	movw	r2, #65535
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	movs	r3, #7
+	strb	r3, [r4, #4]
+	b	.L3097
+.L3096:
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L3104:
+	.align	2
+.L3103:
+	.word	.LANCHOR79
+	.word	.LANCHOR117
+	.word	.LC168
+	.word	.LANCHOR94
+	.word	.LANCHOR11
+	.size	ftl_open_sblk_init, .-ftl_open_sblk_init
+	.section	.text.ftl_low_format_data_init,"ax",%progbits
+	.align	1
+	.global	ftl_low_format_data_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_low_format_data_init, %function
+ftl_low_format_data_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r2, #16384
+	ldr	r3, .L3107
+	movs	r1, #0
+	ldr	r5, .L3107+4
+	ldr	r0, [r3]
+	bl	ftl_memset
+	bl	zftl_sblk_list_init
+	movs	r0, #1
+	bl	ftl_alloc_sblk
+	movs	r1, #0
+	mov	r6, r0
+	bl	ftl_erase_sblk
+	ldr	r1, [r5]
+	mov	r0, r6
+	add	r1, r1, #672
+	bl	ftl_get_blk_list_in_sblk
+	ldr	r3, [r5]
+	movs	r2, #0
+	ldrh	r7, [r3, #672]
+	strh	r2, [r3, #690]	@ movhi
+	movw	r2, #65533
+	subs	r3, r7, #1
+	uxth	r3, r3
+	cmp	r3, r2
+	bls	.L3106
+	movw	r2, #2484
+	ldr	r1, .L3107+8
+	ldr	r0, .L3107+12
+	bl	printf
+.L3106:
+	ldr	r0, [r5]
+	movs	r4, #0
+	mov	r2, #256
+	movs	r1, #255
+	strh	r4, [r0, #696]	@ movhi
+	add	r0, r0, #416
+	bl	ftl_memset
+	ldr	r0, [r5]
+	mov	r1, r4
+	mov	r2, #4096
+	add	r0, r0, #704
+	bl	ftl_memset
+	ldr	r3, .L3107+16
+	ldr	r1, .L3107+20
+	ldr	r2, [r5]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	ldrh	r1, [r1]
+	strh	r7, [r2, #692]	@ movhi
+	rsb	r3, r3, #24
+	strh	r6, [r2, #416]	@ movhi
+	subs	r3, r3, r1
+	asr	r3, r7, r3
+	ldr	r7, .L3107+24
+	strh	r3, [r2, #694]	@ movhi
+	movs	r3, #1
+	strh	r3, [r2, #688]	@ movhi
+	ldr	r3, .L3107+28
+	ldrh	r3, [r3]
+	strh	r3, [r2, #698]	@ movhi
+	ldr	r2, .L3107+32
+	ldr	r3, [r7]
+	str	r2, [r3]
+	bl	ftl_alloc_sys_blk
+	mov	r1, r4
+	mov	r6, r0
+	bl	ftl_erase_phy_blk
+	ldr	r3, [r5]
+	movs	r1, #2
+	ldr	r0, [r7]
+	strh	r6, [r3, #130]	@ movhi
+	movw	r6, #65535
+	strh	r4, [r3, #140]	@ movhi
+	adds	r0, r0, #16
+	strh	r6, [r0, #568]	@ movhi
+	strh	r6, [r0, #570]	@ movhi
+	strh	r6, [r0, #572]	@ movhi
+	strh	r6, [r0, #574]	@ movhi
+	bl	ftl_open_sblk_init
+	ldr	r0, [r7]
+	movs	r1, #3
+	adds	r0, r0, #48
+	bl	ftl_open_sblk_init
+	ldr	r3, [r5]
+	movs	r1, #255
+	ldr	r0, [r7]
+	ldrh	r2, [r3, #134]
+	adds	r0, r0, #136
+	strh	r4, [r0, #-12]	@ movhi
+	strh	r4, [r0, #-16]	@ movhi
+	strh	r2, [r0, #-10]	@ movhi
+	mov	r2, #-1
+	strh	r4, [r0, #-14]	@ movhi
+	strh	r6, [r0, #-56]	@ movhi
+	strh	r6, [r0, #-6]	@ movhi
+	str	r2, [r0, #408]
+	strh	r2, [r3, #126]	@ movhi
+	mov	r2, #256
+	str	r4, [r0, #384]
+	str	r4, [r0, #388]
+	str	r4, [r0, #392]
+	bl	ftl_memset
+	ldr	r0, [r7]
+	movs	r2, #128
+	movs	r1, #255
+	add	r0, r0, #392
+	bl	ftl_memset
+	bl	ftl_ext_info_flush
+	mov	r0, r4
+	bl	ftl_info_flush
+	bl	ftl_info_blk_init
+	mov	r0, r4
+	pop	{r3, r4, r5, r6, r7, pc}
+.L3108:
+	.align	2
+.L3107:
+	.word	.LANCHOR197
+	.word	.LANCHOR110
+	.word	.LANCHOR201
+	.word	.LC0
+	.word	.LANCHOR31
+	.word	.LANCHOR74
+	.word	.LANCHOR12
+	.word	.LANCHOR202
+	.word	1162432070
+	.size	ftl_low_format_data_init, .-ftl_low_format_data_init
+	.section	.text.ftl_low_format,"ax",%progbits
+	.align	1
+	.global	ftl_low_format
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_low_format, %function
+ftl_low_format:
+	@ args = 0, pretend = 0, frame = 32
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #8
+	ldr	r6, .L3146
+	sub	sp, sp, #40
+	movs	r1, #0
+	ldr	r0, .L3146+4
+	bl	printf
+.L3112:
+	ldr	r3, [r6]
+	add	r3, r3, r4
+	ldrb	r5, [r3, #32]	@ zero_extendqisi2
+	cmp	r5, #128
+	ble	.L3110
+	cmp	r5, #255
+	beq	.L3111
+	movw	r2, #2539
+	ldr	r1, .L3146+8
+	ldr	r0, .L3146+12
+	bl	printf
+.L3110:
+	ldr	r3, .L3146+16
+	movs	r0, #0
 	ldrh	r1, [r3]
 	muls	r1, r5, r1
 	bl	flash_erase_block
-.L3038:
+.L3111:
 	adds	r4, r4, #1
 	cmp	r4, #16
-	bne	.L3039
+	bne	.L3112
 	bl	sblk_init
 	bl	ftl_info_blk_init
-	ldr	r3, .L3073+20
+	ldr	r3, .L3146+20
 	mov	r2, #16384
 	movs	r1, #0
 	ldr	r0, [r3]
 	bl	ftl_memset
-	ldr	r2, .L3073+24
+	ldr	r2, .L3146+24
 	movs	r0, #1
-	ldr	r1, .L3073+28
+	ldr	r1, .L3146+28
 	ldr	r3, [r2]
 	ldrh	r1, [r1]
 	str	r2, [sp, #24]
 	add	r1, r3, r1, lsl #2
-.L3040:
+.L3113:
 	cmp	r3, r1
-	bne	.L3041
-	ldr	r7, .L3073+32
+	bne	.L3114
+	ldr	r7, .L3146+32
 	movs	r4, #0
-	ldr	r2, .L3073+36
+	ldr	r2, .L3146+36
 	ldr	r3, [r7]
 	str	r2, [r3]
 	strh	r4, [r3, #148]	@ movhi
-.L3042:
-	ldr	r3, .L3073+28
+.L3115:
+	ldr	r3, .L3146+28
 	uxth	r0, r4
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bhi	.L3050
-	ldr	r3, .L3073+40
+	bhi	.L3123
+	ldr	r3, .L3146+40
 	mov	fp, #15
 	ldrb	r5, [r3]	@ zero_extendqisi2
-	ldr	r3, .L3073
+	ldr	r3, .L3146
 	mov	r1, r5
 	ldr	r3, [r3]
 	ldrb	r0, [r3, #47]	@ zero_extendqisi2
 	bl	__aeabi_uidiv
-	ldr	r3, .L3073+24
+	ldr	r3, .L3146+24
 	uxtb	r0, r0
 	cmp	r5, #1
 	uxth	lr, r5
@@ -19646,13 +20379,13 @@ ftl_low_format:
 	ldr	r10, [r3]
 	it	eq
 	moveq	r8, #1
-	ldr	r3, .L3073+32
+	ldr	r3, .L3146+32
 	it	ne
 	movne	r8, #3
 	movs	r2, #0
 	ldr	r6, [r3]
 	ldrh	r3, [r6, #148]
-.L3053:
+.L3126:
 	add	r1, r10, r2, lsl #2
 	cmp	r5, #4
 	add	r2, r2, #1
@@ -19664,7 +20397,7 @@ ftl_low_format:
 	strb	ip, [r1, #2]
 	uxth	r1, r2
 	cmp	r4, r1
-	bhi	.L3053
+	bhi	.L3126
 	smulbb	r0, r0, lr
 	add	r3, r3, lr
 	mov	r1, r5
@@ -19672,20 +20405,20 @@ ftl_low_format:
 	strh	r0, [r6, #148]	@ movhi
 	movs	r0, #16
 	bl	__aeabi_idiv
-	ldr	r3, .L3073+44
+	ldr	r3, .L3146+44
 	add	r0, r0, r4
 	uxth	r0, r0
 	ldr	r3, [r3]
 	strh	r0, [r6, #134]	@ movhi
 	lsls	r3, r3, #19
-	bpl	.L3054
+	bpl	.L3127
 	str	r0, [sp]
 	mov	r3, r4
 	movs	r2, #128
-	movw	r1, #2590
-	ldr	r0, .L3073+48
+	movw	r1, #2598
+	ldr	r0, .L3146+48
 	bl	printf
-.L3054:
+.L3127:
 	ldr	r0, [r7]
 	movs	r2, #128
 	movs	r1, #255
@@ -19693,19 +20426,19 @@ ftl_low_format:
 	adds	r0, r0, #160
 	bl	ftl_memset
 	ldr	r3, [sp, #24]
-	ldr	r0, .L3073+52
+	ldr	r0, .L3146+52
 	ldr	r1, [r7]
 	ldr	r3, [r3]
 	ldrh	r0, [r0]
 	ldrh	fp, [r1, #134]
 	str	r3, [sp, #24]
-	ldr	r3, .L3073+56
+	ldr	r3, .L3146+56
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r3, [sp, #28]
-	ldr	r3, .L3073+40
+	ldr	r3, .L3146+40
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r3, [sp, #12]
-	ldr	r3, .L3073+60
+	ldr	r3, .L3146+60
 	ldrh	r7, [sp, #12]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	smulbb	r2, r4, r7
@@ -19716,10 +20449,10 @@ ftl_low_format:
 	uxth	r2, r2
 	uxth	r3, r3
 	str	r3, [sp, #20]
-.L3055:
+.L3128:
 	cmp	r4, fp
-	bcc	.L3061
-	ldr	r3, .L3073+28
+	bcc	.L3134
+	ldr	r3, .L3146+28
 	movs	r4, #0
 	strh	r5, [r1, #112]	@ movhi
 	strh	r4, [r1, #114]	@ movhi
@@ -19733,53 +20466,53 @@ ftl_low_format:
 	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3041:
+.L3114:
 	ldrb	r2, [r3, #2]	@ zero_extendqisi2
 	adds	r3, r3, #4
 	and	r2, r2, #31
 	bfi	r2, r0, #3, #2
 	strb	r2, [r3, #-2]
-	b	.L3040
-.L3050:
-	ldr	r3, .L3073+64
+	b	.L3113
+.L3123:
+	ldr	r3, .L3146+64
 	strh	r0, [r3]	@ movhi
-	ldr	r3, .L3073+68
+	ldr	r3, .L3146+68
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L3043
+	cbnz	r3, .L3116
 	bl	ftl_test_block
-.L3043:
-	ldr	r3, .L3073+56
+.L3116:
+	ldr	r3, .L3146+56
 	uxth	r1, r4
-	ldr	r0, .L3073+24
+	ldr	r0, .L3146+24
 	movs	r6, #0
 	mov	fp, r6
 	mov	r8, r6
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	ldr	r5, [r0]
 	str	r3, [sp, #16]
-	ldr	r3, .L3073+40
+	ldr	r3, .L3146+40
 	add	r5, r5, r1, lsl #2
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	uxth	r2, r3
 	str	r2, [sp, #20]
 	mul	r2, r3, r1
-	ldr	r1, .L3073+32
+	ldr	r1, .L3146+32
 	ldr	r1, [r1]
 	str	r1, [sp, #12]
-.L3044:
+.L3117:
 	ldr	r0, [sp, #16]
 	uxth	r1, fp
 	cmp	r0, r1
-	bhi	.L3062
+	bhi	.L3135
 	cmp	r8, #0
-	bne	.L3049
+	bne	.L3122
 	ldrb	r3, [r5, #2]	@ zero_extendqisi2
 	orr	r3, r3, #224
 	strb	r3, [r5, #2]
-.L3049:
+.L3122:
 	adds	r4, r4, #1
-	b	.L3042
-.L3047:
+	b	.L3115
+.L3120:
 	add	r1, r10, r2
 	ldr	r0, [sp, #28]
 	str	r3, [sp, #36]
@@ -19787,7 +20520,7 @@ ftl_low_format:
 	bl	flash_check_bad_block
 	ldr	r2, [sp, #32]
 	ldr	r3, [sp, #36]
-	cbz	r0, .L3045
+	cbz	r0, .L3118
 	ldrb	r0, [r5, #3]	@ zero_extendqisi2
 	movs	r1, #1
 	lsl	r1, r1, r10
@@ -19798,28 +20531,28 @@ ftl_low_format:
 	ldrh	r1, [r1, #148]
 	adds	r1, r1, #1
 	strh	r1, [r0, #148]	@ movhi
-.L3046:
+.L3119:
 	add	r10, r10, #1
-.L3048:
+.L3121:
 	sub	r1, r10, r6
 	ldr	r0, [sp, #20]
 	uxth	r1, r1
 	cmp	r0, r1
-	bhi	.L3047
+	bhi	.L3120
 	add	fp, fp, #1
 	add	r6, r6, r3
 	subs	r2, r2, r3
-	b	.L3044
-.L3045:
+	b	.L3117
+.L3118:
 	add	r8, r8, #1
 	uxth	r8, r8
-	b	.L3046
-.L3062:
+	b	.L3119
+.L3135:
 	uxtb	r1, fp
 	mov	r10, r6
 	str	r1, [sp, #28]
-	b	.L3048
-.L3061:
+	b	.L3121
+.L3134:
 	ldr	r3, [sp, #24]
 	movs	r0, #0
 	mov	lr, r0
@@ -19828,22 +20561,22 @@ ftl_low_format:
 	ldrb	r3, [r8, #2]	@ zero_extendqisi2
 	orr	r3, r3, #224
 	strb	r3, [r8, #2]
-.L3056:
+.L3129:
 	ldr	r6, [sp, #28]
 	uxth	r3, ip
 	cmp	r3, r6
-	bcc	.L3064
+	bcc	.L3137
 	adds	r4, r4, #1
 	add	r2, r2, r7
 	uxth	r4, r4
 	uxth	r2, r2
-	b	.L3055
-.L3059:
+	b	.L3128
+.L3132:
 	ldrb	r10, [r8, #3]	@ zero_extendqisi2
 	add	r3, lr, r6
 	asr	r10, r10, r3
 	tst	r10, #1
-	bne	.L3057
+	bne	.L3130
 	ldr	r3, [sp, #12]
 	add	r10, r5, #80
 	adds	r5, r5, #1
@@ -19858,44 +20591,44 @@ ftl_low_format:
 	uxthhi	r3, r3
 	add	r3, r3, r0
 	strh	r3, [r1, r10, lsl #1]	@ movhi
-.L3057:
+.L3130:
 	adds	r6, r6, #1
-.L3060:
+.L3133:
 	uxth	r3, r6
 	cmp	r3, r7
 	str	r3, [sp, #16]
-	bcc	.L3059
+	bcc	.L3132
 	ldr	r3, [sp, #12]
 	add	ip, ip, #1
 	add	lr, lr, r3
 	ldr	r3, [sp, #20]
 	add	r0, r0, r3
 	uxth	r0, r0
-	b	.L3056
-.L3064:
+	b	.L3129
+.L3137:
 	movs	r6, #0
-	b	.L3060
-.L3074:
+	b	.L3133
+.L3147:
 	.align	2
-.L3073:
-	.word	.LANCHOR27
-	.word	.LC162
-	.word	.LANCHOR205
+.L3146:
+	.word	.LANCHOR6
+	.word	.LC169
+	.word	.LANCHOR203
 	.word	.LC0
 	.word	.LANCHOR111
-	.word	.LANCHOR195
-	.word	.LANCHOR7
-	.word	.LANCHOR6
+	.word	.LANCHOR192
+	.word	.LANCHOR9
+	.word	.LANCHOR8
 	.word	.LANCHOR110
 	.word	1229739078
-	.word	.LANCHOR76
-	.word	.LANCHOR14
-	.word	.LC163
 	.word	.LANCHOR75
+	.word	.LANCHOR19
+	.word	.LC170
+	.word	.LANCHOR74
 	.word	.LANCHOR112
-	.word	.LANCHOR32
-	.word	.LANCHOR69
-	.word	.LANCHOR82
+	.word	.LANCHOR31
+	.word	.LANCHOR68
+	.word	.LANCHOR81
 	.size	ftl_low_format, .-ftl_low_format
 	.section	.text.ftl_re_low_format,"ax",%progbits
 	.align	1
@@ -19910,25 +20643,25 @@ ftl_re_low_format:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r1, #1
-	ldr	r0, .L3081
+	ldr	r0, .L3154
 	bl	printf
 	bl	sblk_init
 	bl	ftl_info_blk_init
 	bl	ftl_ext_info_init
-	ldr	r2, .L3081+4
-	ldr	r3, .L3081+8
+	ldr	r2, .L3154+4
+	ldr	r3, .L3154+8
 	ldrh	r7, [r2]
 	ldr	r3, [r3]
-	ldr	r2, .L3081+12
+	ldr	r2, .L3154+12
 	ldrh	r1, [r3, #134]
 	ldr	r0, [r2]
 	movs	r2, #0
 	mov	r5, r2
 	mov	r6, r2
 	add	r0, r0, r1, lsl #2
-.L3076:
+.L3149:
 	cmp	r1, r7
-	bcc	.L3080
+	bcc	.L3153
 	movs	r4, #0
 	strh	r6, [r3, #114]	@ movhi
 	strh	r5, [r3, #118]	@ movhi
@@ -19939,583 +20672,298 @@ ftl_re_low_format:
 	bl	ftl_low_format_data_init
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, pc}
-.L3080:
+.L3153:
 	ldrb	r4, [r0, #2]	@ zero_extendqisi2
 	bfc	r4, #5, #3
 	strb	r4, [r0, #2]
 	ands	r4, r4, #24
-	bne	.L3077
+	bne	.L3150
 	adds	r6, r6, #1
 	uxth	r6, r6
-.L3078:
+.L3151:
 	adds	r1, r1, #1
 	uxth	r1, r1
 	adds	r0, r0, #4
-	b	.L3076
-.L3077:
+	b	.L3149
+.L3150:
 	cmp	r4, #16
 	itete	eq
 	addeq	r5, r5, #1
 	addne	r2, r2, #1
 	uxtheq	r5, r5
 	uxthne	r2, r2
-	b	.L3078
-.L3082:
-	.align	2
-.L3081:
-	.word	.LC164
-	.word	.LANCHOR6
-	.word	.LANCHOR110
-	.word	.LANCHOR7
-	.size	ftl_re_low_format, .-ftl_re_low_format
-	.section	.text.ftl_prog_ppa_page,"ax",%progbits
-	.align	1
-	.global	ftl_prog_ppa_page
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_prog_ppa_page, %function
-ftl_prog_ppa_page:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r4, r5, r6, r7, lr}
-	ldr	r4, .L3084
-	ldrb	r7, [r4]	@ zero_extendqisi2
-	movs	r4, #1
-	str	r3, [sp]
-	mov	r3, r2
-	mov	r2, r1
-	rsb	r5, r7, #24
-	lsl	r6, r4, r5
-	lsls	r4, r4, r7
-	lsr	r5, r0, r5
-	subs	r4, r4, #1
-	subs	r6, r6, #1
-	ands	r4, r4, r5
-	and	r1, r6, r0
-	uxtb	r0, r4
-	bl	ftl_prog_page
-	add	sp, sp, #12
-	@ sp needed
-	pop	{r4, r5, r6, r7, pc}
-.L3085:
-	.align	2
-.L3084:
-	.word	.LANCHOR32
-	.size	ftl_prog_ppa_page, .-ftl_prog_ppa_page
-	.section	.text.ftl_write_last_log_page,"ax",%progbits
-	.align	1
-	.global	ftl_write_last_log_page
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_write_last_log_page, %function
-ftl_write_last_log_page:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	mov	r4, r0
-	ldrh	r3, [r0, #6]
-	cmp	r3, #1
-	bne	.L3089
-	ldr	r3, .L3091
-	ldrh	r7, [r0, #12]
-	ldr	r5, [r3]
-	bl	ftl_get_new_free_page
-	adds	r3, r0, #1
-	mov	r6, r0
-	beq	.L3090
-	ldrh	r0, [r4]
-	add	r5, r5, r7, lsl #2
-	ldr	r4, .L3091+4
-	bl	ftl_vpn_decrement
-	ldr	r3, .L3091+8
-	mov	r0, r5
-	ldr	r2, .L3091+12
-	str	r3, [r4]
-	ldr	r3, .L3091+16
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	ldrh	r3, [r3]
-	muls	r1, r3, r1
-	lsls	r1, r1, #2
-	bl	js_hash
-	ldr	r3, .L3091+20
-	movs	r2, #0
-	str	r0, [r4, #4]
-	mov	r1, r5
-	str	r2, [r4, #8]
-	mov	r0, r6
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	str	r2, [r4, #12]
-	str	r2, [r4, #16]
-	cmp	r3, #8
-	it	hi
-	strhi	r2, [r4, #20]
-	ldr	r2, .L3091+4
-	bl	ftl_prog_ppa_page
-.L3090:
-	movs	r0, #0
-	pop	{r3, r4, r5, r6, r7, pc}
-.L3089:
-	mov	r0, #-1
-	pop	{r3, r4, r5, r6, r7, pc}
-.L3092:
-	.align	2
-.L3091:
-	.word	.LANCHOR117
-	.word	.LANCHOR191
-	.word	-178307901
-	.word	.LANCHOR80
-	.word	.LANCHOR95
-	.word	.LANCHOR131
-	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
-	.section	.text.pm_write_page,"ax",%progbits
-	.align	1
-	.global	pm_write_page
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	pm_write_page, %function
-pm_write_page:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r4, r0
-	ldr	r8, .L3106+28
-	mov	r7, r1
-	mov	r6, r8
-.L3094:
-	ldr	r3, [r8]
-	ldr	r2, [r3, #48]
-	ldrh	r1, [r3, #696]
-	adds	r2, r2, #1
-	str	r2, [r3, #48]
-	ldr	r2, .L3106
-	ldrh	r2, [r2]
-	cmp	r1, r2
-	bcs	.L3095
-	ldrh	r2, [r3, #692]
-	movw	r3, #65535
-	cmp	r2, r3
-	bne	.L3096
-.L3095:
-	bl	pm_alloc_new_blk
-	movs	r0, #0
-	bl	ftl_info_flush
-.L3096:
-	ldr	r3, [r6]
-	ldrh	r2, [r3, #692]
-	movw	r3, #65535
-	cmp	r2, r3
-	bne	.L3097
-	movw	r2, #303
-	ldr	r1, .L3106+4
-	ldr	r0, .L3106+8
-	bl	printf
-.L3097:
-	ldr	r3, [r6]
-	movs	r1, #0
-	ldr	r2, .L3106+12
-	ldr	r10, .L3106+32
-	ldrh	r5, [r3, #692]
-	ldrh	r2, [r2]
-	ldrh	r3, [r3, #696]
-	ldr	r0, [r10]
-	mla	r5, r2, r5, r3
-	movs	r2, #64
-	bl	ftl_memset
-	ldr	r10, [r10]
-	mov	r0, r7
-	ldr	r3, [r6]
-	str	r4, [r10]
-	ldr	r2, [r3, #48]
-	str	r3, [sp, #12]
-	str	r2, [r10, #4]
-	ldr	r2, .L3106+16
-	ldrb	fp, [r2]	@ zero_extendqisi2
-	lsl	r1, fp, #9
-	bl	js_hash
-	ldr	r3, [sp, #12]
-	mov	r2, r7
-	str	r0, [r10, #8]
-	mov	r1, r5
-	ldrb	r0, [r3, #694]	@ zero_extendqisi2
-	mov	r3, r10
-	str	fp, [sp]
-	bl	ftl_prog_page
-	ldr	r2, [r6]
-	ldrh	r3, [r2, #696]
-	adds	r3, r3, #1
-	uxth	r3, r3
-	cmp	r3, #1
-	strh	r3, [r2, #696]	@ movhi
-	ldr	r3, .L3106+20
-	beq	.L3098
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	cbz	r1, .L3099
-.L3098:
-	movs	r2, #0
-	strb	r2, [r3]
-	b	.L3094
-.L3099:
-	adds	r0, r0, #1
-	bne	.L3101
-	mov	r1, r5
-	ldr	r0, .L3106+24
-	bl	printf
-	b	.L3094
-.L3101:
-	ldrh	r3, [r2, #698]
-	movs	r0, #0
-	cmp	r4, r3
-	itt	cc
-	addcc	r4, r4, #176
-	strcc	r5, [r2, r4, lsl #2]
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3107:
+	b	.L3151
+.L3155:
 	.align	2
-.L3106:
-	.word	.LANCHOR95
-	.word	.LANCHOR206
-	.word	.LC0
-	.word	.LANCHOR111
-	.word	.LANCHOR131
-	.word	.LANCHOR208
-	.word	.LC165
-	.word	.LANCHOR110
-	.word	.LANCHOR207
-	.size	pm_write_page, .-pm_write_page
-	.section	.text.ftl_dump_write_open_sblk,"ax",%progbits
+.L3154:
+	.word	.LC171
+	.word	.LANCHOR8
+	.word	.LANCHOR110
+	.word	.LANCHOR9
+	.size	ftl_re_low_format, .-ftl_re_low_format
+	.section	.text.pm_alloc_new_blk,"ax",%progbits
 	.align	1
-	.global	ftl_dump_write_open_sblk
+	.global	pm_alloc_new_blk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_dump_write_open_sblk, %function
-ftl_dump_write_open_sblk:
-	@ args = 0, pretend = 0, frame = 64
+	.type	pm_alloc_new_blk, %function
+pm_alloc_new_blk:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L3147
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r5, r0
-	sub	sp, sp, #104
-	ldrh	r3, [r3]
-	cmp	r3, r0
-	bls	.L3108
-	ldr	r3, .L3147+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L3110
-	ldr	r3, .L3147+8
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #0
-	beq	.L3108
-.L3110:
-	ldr	r3, .L3147+12
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #0
-	bne	.L3108
-	ldr	r7, .L3147+16
-	lsls	r4, r5, #2
-	add	r1, sp, #88
-	strh	r5, [sp, #72]	@ movhi
-	mov	r0, r5
-	movs	r6, #0
-	ldr	r3, [r7]
-	add	r3, r3, r4
-	ldrb	r3, [r3, #2]	@ zero_extendqisi2
-	and	r3, r3, #224
-	cmp	r3, #160
-	itet	eq
-	ldreq	r3, .L3147+20
-	movne	fp, #1
-	ldrbeq	fp, [r3]	@ zero_extendqisi2
-	bl	ftl_get_blk_list_in_sblk
-	ldr	r3, .L3147+24
-	uxtb	r0, r0
-	strb	r6, [sp, #77]
-	strb	r0, [sp, #81]
-	ldrh	r3, [r3]
-	strh	r6, [sp, #74]	@ movhi
-	strh	r6, [sp, #82]	@ movhi
-	smulbb	r0, r3, r0
-	ldr	r3, [r7]
-	mov	r7, r6
-	ldr	r1, [r3, r5, lsl #2]
-	add	r4, r4, r3
-	ldrb	r2, [r4, #2]	@ zero_extendqisi2
-	strh	r0, [sp, #78]	@ movhi
-	ubfx	r1, r1, #11, #8
-	ldr	r0, .L3147+28
-	str	r1, [sp, #4]
-	mov	r1, r5
-	ldrh	r3, [r3, r5, lsl #2]
-	ubfx	r3, r3, #0, #11
-	str	r3, [sp]
-	ubfx	r3, r2, #3, #2
-	lsrs	r2, r2, #5
-	bl	printf
-	movs	r0, #1
-	bl	buf_alloc
-	mov	r4, r0
-	str	r6, [sp, #44]
-.L3112:
-	ldr	r3, .L3147+24
-	uxth	r10, r6
-	ldrh	r3, [r3]
-	cmp	r3, r10
-	bls	.L3121
-	mov	r3, r10
-	str	r10, [sp, #52]
-	lsls	r3, r3, #1
-	mov	r8, #0
-	subs	r2, r3, #1
-	add	r3, r3, r10
-	subs	r3, r3, #1
-	str	r2, [sp, #56]
-	str	r3, [sp, #60]
-	b	.L3124
-.L3122:
-	ldr	r3, [sp, #64]
-	add	r2, sp, #104
-	add	r3, r2, r3, lsl #1
-	ldrh	r3, [r3, #-32]
-	str	r3, [sp, #48]
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	ldr	r5, .L3174
+	ldr	r1, .L3174+4
+	ldr	r2, [r5]
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	ldrh	r3, [r2, #690]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	cmp	r1, r3
+	strh	r3, [r2, #690]	@ movhi
+	bls	.L3157
+	add	r3, r3, #336
+	ldrh	r2, [r2, r3, lsl #1]
 	movw	r3, #65535
-	ldr	r2, [sp, #48]
 	cmp	r2, r3
-	bne	.L3113
-.L3120:
-	adds	r7, r7, #1
-	uxth	r7, r7
-.L3114:
-	cmp	fp, r7
-	bcs	.L3122
-	add	r8, r8, #1
-.L3124:
-	uxth	r3, r8
-	str	r3, [sp, #44]
-	ldr	r2, [sp, #44]
-	ldrb	r3, [sp, #81]	@ zero_extendqisi2
-	cmp	r3, r2
-	bls	.L3123
-	mov	r3, r2
-	movs	r7, #1
-	adds	r3, r3, #8
-	str	r3, [sp, #64]
-	b	.L3114
-.L3113:
-	ldr	r3, .L3147+32
-	cmp	fp, #3
-	ldr	r2, [sp, #48]
-	ldrh	r3, [r3]
-	mul	r3, r2, r3
-	bne	.L3115
-	ldr	r2, .L3147+36
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbz	r2, .L3116
-	ldr	r2, [sp, #60]
-.L3146:
-	add	r3, r3, r2
-	ldr	r2, .L3147+20
-	add	r3, r3, r7
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	orr	r3, r3, r2, lsl #24
-	b	.L3117
-.L3116:
-	uxtah	r3, r3, r6
-	orr	r3, r3, r7, lsl #24
-.L3117:
-	str	r3, [r4, #24]
+	bne	.L3158
+.L3157:
+	ldr	r7, .L3174+8
+	ldr	r4, .L3174+12
+.L3172:
+	movw	r8, #65535
+.L3159:
+	movs	r0, #1
+	bl	ftl_alloc_sblk
+	cmp	r0, r8
+	mov	r6, r0
+	beq	.L3159
+	movs	r1, #0
+	bl	ftl_erase_sblk
+	ldr	r1, [r5]
+	mov	r0, r6
+	add	r1, r1, #672
+	bl	ftl_get_blk_list_in_sblk
+	uxth	r0, r0
+	cbnz	r0, .L3160
+	mov	r1, r6
+	mov	r0, r7
+	bl	printf
+	ldr	r3, [r4]
+	add	r6, r3, r6, lsl #2
+	ldrb	r3, [r6, #2]	@ zero_extendqisi2
+	orr	r3, r3, #224
+	strb	r3, [r6, #2]
+	b	.L3172
+.L3160:
+	ldr	r3, [r5]
 	movs	r1, #1
-	mov	r0, r4
-	str	r3, [sp, #68]
-	bl	sblk_read_page
-	ldr	r3, [r4, #36]
-	cmp	r3, #512
-	str	r3, [sp, #40]
-	ldr	r3, [sp, #68]
-	beq	.L3119
-	ldr	r2, [sp, #40]
+	ldr	r2, .L3174+16
+	movs	r4, #0
+	strh	r4, [r3, #690]	@ movhi
+	add	r3, r3, #416
+	str	r1, [r2]
+	movw	r1, #65535
+.L3162:
+	ldrh	r0, [r3], #2
+	uxth	r2, r4
+	cmp	r0, r1
+	beq	.L3161
+	adds	r4, r4, #1
+	cmp	r4, #128
+	bne	.L3162
+	mov	r2, #264
+	ldr	r1, .L3174+20
+	ldr	r0, .L3174+24
+	bl	printf
+	mov	r2, r4
+.L3161:
+	ldr	r3, [r5]
+	adds	r2, r2, #208
+	strh	r6, [r3, r2, lsl #1]	@ movhi
+	ldrh	r2, [r3, #688]
 	adds	r2, r2, #1
-	bne	.L3120
-.L3119:
-	ldr	r1, [r4, #12]
-	ldr	r2, [r4, #4]
-	ldr	r0, [r1, #12]
-	str	r0, [sp, #32]
-	ldr	r0, [r1, #8]
-	str	r0, [sp, #28]
-	ldr	r0, [r1, #4]
-	str	r0, [sp, #24]
+	strh	r2, [r3, #688]	@ movhi
+.L3158:
+	ldr	r2, [r5]
+	ldrh	r3, [r2, #690]
+	add	r3, r3, #336
+	ldrh	r4, [r2, r3, lsl #1]
+	movw	r2, #65533
+	subs	r3, r4, #1
+	uxth	r3, r3
+	cmp	r3, r2
+	bls	.L3164
+	mov	r2, #270
+	ldr	r1, .L3174+20
+	ldr	r0, .L3174+24
+	bl	printf
+.L3164:
+	ldr	r1, [r5]
+	movs	r3, #0
+	strh	r3, [r1, #696]	@ movhi
+	ldr	r3, .L3174+28
+	strh	r4, [r1, #692]	@ movhi
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	ldr	r3, .L3174+32
+	rsb	r2, r2, #24
+	ldrh	r3, [r3]
+	subs	r2, r2, r3
+	asr	r3, r4, r2
+	strh	r3, [r1, #694]	@ movhi
+	ldr	r1, .L3174+36
 	ldr	r1, [r1]
-	ldr	r0, .L3147+40
-	str	r1, [sp, #20]
-	ldr	r1, [r2, #12]
-	str	r1, [sp, #16]
-	ldr	r1, [r2, #8]
-	str	r1, [sp, #12]
-	ldr	r1, [r2, #4]
-	str	r1, [sp, #8]
-	ldr	r2, [r2]
-	ldr	r1, [sp, #48]
-	str	r2, [sp, #4]
-	ldr	r2, [sp, #40]
-	str	r2, [sp]
-	ldr	r2, [sp, #52]
+	lsls	r1, r1, #19
+	bpl	.L3168
+	movs	r1, #1
+	uxth	r3, r3
+	lsl	r2, r1, r2
+	ldr	r0, .L3174+40
+	str	r3, [sp]
+	mov	r1, r4
+	mov	r3, r4
+	subs	r2, r2, #1
 	bl	printf
-	ldr	r3, [sp, #40]
-	cmp	r3, #512
-	bne	.L3120
-.L3121:
-	uxth	r2, r6
-	ldr	r6, .L3147+44
-	ldr	r3, [sp, #44]
-	mov	r1, r5
-	str	r7, [sp]
-	ldr	r0, .L3147+48
+.L3168:
+	movs	r0, #0
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L3175:
+	.align	2
+.L3174:
+	.word	.LANCHOR110
+	.word	.LANCHOR79
+	.word	.LC168
+	.word	.LANCHOR9
+	.word	.LANCHOR204
+	.word	.LANCHOR205
+	.word	.LC0
+	.word	.LANCHOR31
+	.word	.LANCHOR74
+	.word	.LANCHOR19
+	.word	.LC172
+	.size	pm_alloc_new_blk, .-pm_alloc_new_blk
+	.section	.text.pm_write_page,"ax",%progbits
+	.align	1
+	.global	pm_write_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	pm_write_page, %function
+pm_write_page:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r0
+	ldr	r8, .L3189+28
+	mov	r7, r1
+	mov	r6, r8
+.L3177:
+	ldr	r3, [r8]
+	ldr	r2, [r3, #48]
+	ldrh	r1, [r3, #696]
+	adds	r2, r2, #1
+	str	r2, [r3, #48]
+	ldr	r2, .L3189
+	ldrh	r2, [r2]
+	cmp	r1, r2
+	bcs	.L3178
+	ldrh	r2, [r3, #692]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L3179
+.L3178:
+	bl	pm_alloc_new_blk
+	movs	r0, #0
+	bl	ftl_info_flush
+.L3179:
+	ldr	r3, [r6]
+	ldrh	r2, [r3, #692]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L3180
+	movw	r2, #303
+	ldr	r1, .L3189+4
+	ldr	r0, .L3189+8
 	bl	printf
-	ldrb	r2, [r6]	@ zero_extendqisi2
-	movs	r1, #0
-	ldr	r0, [r4, #4]
-	ldr	fp, .L3147+64
-	lsls	r2, r2, #9
-	bl	ftl_memset
-	ldrb	r2, [r6]	@ zero_extendqisi2
+.L3180:
+	ldr	r3, [r6]
 	movs	r1, #0
-	ldr	r0, [r4, #12]
-	lsls	r2, r2, #1
+	ldr	r2, .L3189+12
+	ldr	r10, .L3189+32
+	ldrh	r5, [r3, #692]
+	ldrh	r2, [r2]
+	ldrh	r3, [r3, #696]
+	ldr	r0, [r10]
+	mla	r5, r2, r5, r3
+	movs	r2, #64
 	bl	ftl_memset
-.L3125:
-	ldr	r3, .L3147+24
-	ldrh	r3, [r3]
-	cmp	r3, r10
-	bls	.L3131
-	lsl	r3, r10, #1
-	movs	r7, #0
-	str	r3, [sp, #40]
-	b	.L3132
-.L3115:
-	cmp	fp, #2
-	bne	.L3118
-	ldr	r2, [sp, #56]
-	b	.L3146
-.L3118:
-	uxtah	r3, r3, r6
-	b	.L3117
-.L3123:
-	adds	r6, r6, #1
-	b	.L3112
-.L3130:
-	ldr	r3, [fp]
-	uxth	r8, r7
-	tst	r3, #4096
-	beq	.L3126
-	mov	r2, r8
-	mov	r1, r10
-	ldr	r0, .L3147+52
-	bl	printf
-.L3126:
-	ldr	r2, .L3147+4
-	ldr	r0, .L3147+32
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbz	r2, .L3127
-	add	r3, sp, #104
-	add	r3, r3, r8, lsl #1
-	ldrh	r2, [r3, #-16]
-	ldrh	r3, [r0]
-	mov	r0, r4
-	muls	r3, r2, r3
-	orr	r3, r3, r10
-	str	r3, [r4, #24]
-	bl	sblk_3d_tlc_dump_prog
-.L3128:
-	adds	r7, r7, #1
-.L3132:
-	ldrb	r2, [sp, #81]	@ zero_extendqisi2
-	uxth	r3, r7
-	cmp	r2, r3
-	bhi	.L3130
-	add	r3, r10, #1
-	uxth	r10, r3
-	b	.L3125
-.L3127:
-	ldr	r1, .L3147+20
-	add	r3, sp, #104
-	add	r3, r3, r8, lsl #1
-	ldrb	r1, [r1]	@ zero_extendqisi2
-	cmp	r1, #2
-	bne	.L3129
-	ldrh	r2, [r3, #-16]
-	ldrh	r3, [r0]
-	mov	r0, r4
-	muls	r3, r2, r3
-	ldr	r2, [sp, #40]
-	orrs	r3, r3, r2
-	orr	r3, r3, #33554432
-	str	r3, [r4, #24]
-	bl	sblk_mlc_dump_prog
-	b	.L3128
-.L3129:
-	ldrh	r3, [r3, #-16]
-	ldrh	r1, [r0]
-	movs	r0, #1
-	muls	r1, r3, r1
-	ldr	r3, .L3147+56
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	orr	r1, r1, r10
-	str	r1, [r4, #24]
-	rsb	lr, r3, #24
-	str	r2, [sp, #4]
-	lsls	r0, r0, r3
-	subs	r3, r0, #1
-	lsr	r0, r1, lr
-	lsl	ip, r3, lr
-	ands	r0, r0, r3
-	ldrb	r3, [r6]	@ zero_extendqisi2
-	bic	r1, r1, ip
-	uxtb	r0, r0
-	str	r3, [sp]
-	ldr	r3, [r4, #12]
-	ldr	r2, [r4, #4]
-	bl	flash_prog_page_en
-	b	.L3128
-.L3131:
-	mov	r0, r4
-	bl	zbuf_free
+	ldr	r10, [r10]
+	mov	r0, r7
+	ldr	r3, [r6]
+	str	r4, [r10]
+	ldr	r2, [r3, #48]
+	str	r3, [sp, #12]
+	str	r2, [r10, #4]
+	ldr	r2, .L3189+16
+	ldrb	fp, [r2]	@ zero_extendqisi2
+	lsl	r1, fp, #9
+	bl	js_hash
+	ldr	r3, [sp, #12]
+	mov	r2, r7
+	str	r0, [r10, #8]
+	mov	r1, r5
+	ldrb	r0, [r3, #694]	@ zero_extendqisi2
+	mov	r3, r10
+	str	fp, [sp]
+	bl	ftl_prog_page
+	ldr	r2, [r6]
+	ldrh	r3, [r2, #696]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	cmp	r3, #1
+	strh	r3, [r2, #696]	@ movhi
+	ldr	r3, .L3189+20
+	beq	.L3181
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	cbz	r1, .L3182
+.L3181:
+	movs	r2, #0
+	strb	r2, [r3]
+	b	.L3177
+.L3182:
+	adds	r0, r0, #1
+	bne	.L3184
 	mov	r1, r5
-	ldr	r0, .L3147+60
+	ldr	r0, .L3189+24
 	bl	printf
-.L3108:
-	add	sp, sp, #104
+	b	.L3177
+.L3184:
+	ldrh	r3, [r2, #698]
+	movs	r0, #0
+	cmp	r4, r3
+	itt	cc
+	addcc	r4, r4, #176
+	strcc	r5, [r2, r4, lsl #2]
+	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3148:
+.L3190:
 	.align	2
-.L3147:
-	.word	.LANCHOR6
-	.word	.LANCHOR84
-	.word	.LANCHOR81
-	.word	.LANCHOR36
-	.word	.LANCHOR7
-	.word	.LANCHOR79
-	.word	.LANCHOR95
-	.word	.LC166
+.L3189:
+	.word	.LANCHOR94
+	.word	.LANCHOR206
+	.word	.LC0
 	.word	.LANCHOR111
-	.word	.LANCHOR37
-	.word	.LC167
 	.word	.LANCHOR131
-	.word	.LC168
-	.word	.LC169
-	.word	.LANCHOR32
-	.word	.LC170
-	.word	.LANCHOR14
-	.size	ftl_dump_write_open_sblk, .-ftl_dump_write_open_sblk
+	.word	.LANCHOR208
+	.word	.LC173
+	.word	.LANCHOR110
+	.word	.LANCHOR207
+	.size	pm_write_page, .-pm_write_page
 	.section	.text.flash_info_flush,"ax",%progbits
 	.align	1
 	.global	flash_info_flush
@@ -20528,18 +20976,18 @@ flash_info_flush:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L3161
+	ldr	r3, .L3203
 	ldr	r3, [r3]
 	lsls	r3, r3, #19
-	bpl	.L3150
-	ldr	r2, .L3161+4
-	mov	r1, #364
-	ldr	r0, .L3161+8
+	bpl	.L3192
+	ldr	r2, .L3203+4
+	movw	r1, #365
+	ldr	r0, .L3203+8
 	bl	printf
-.L3150:
-	ldr	r5, .L3161+12
+.L3192:
+	ldr	r5, .L3203+12
 	movs	r2, #64
-	ldr	r6, .L3161+16
+	ldr	r6, .L3203+16
 	movs	r1, #0
 	movs	r7, #0
 	ldr	r0, [r5]
@@ -20547,33 +20995,33 @@ flash_info_flush:
 	movs	r3, #16
 	movs	r2, #4
 	ldr	r1, [r6]
-	ldr	r0, .L3161+20
+	ldr	r0, .L3203+20
 	bl	rknand_print_hex
 	ldr	r4, [r6]
 	ldr	r1, [r4, #8]
 	add	r0, r4, #16
 	bl	js_hash
 	str	r5, [sp, #8]
-	ldr	r5, .L3161+24
+	ldr	r5, .L3203+24
 	str	r0, [r4, #12]
 	mov	r8, r5
-.L3151:
-	ldr	fp, .L3161+44
+.L3193:
+	ldr	fp, .L3203+44
 	ldrb	r10, [r5]	@ zero_extendqisi2
 	ldrh	r4, [r5, #2]
 	ldrh	r3, [fp]
 	mov	r1, r10
-	ldr	r0, .L3161+28
+	ldr	r0, .L3203+28
 	mov	r2, r4
 	str	r3, [sp, #12]
 	bl	printf
-	ldr	r2, .L3161+32
+	ldr	r2, .L3203+32
 	ldrh	r0, [r5, #2]
 	ldr	r3, [sp, #12]
 	ldrh	r2, [r2]
 	subs	r2, r2, #1
 	cmp	r0, r2
-	blt	.L3152
+	blt	.L3194
 	ldr	r4, [r6]
 	mov	r10, #0
 	ldrb	r2, [r5]	@ zero_extendqisi2
@@ -20597,9 +21045,9 @@ flash_info_flush:
 	ldrh	r4, [fp]
 	muls	r4, r3, r4
 	mov	r1, r4
-.L3160:
+.L3202:
 	bl	flash_erase_block
-.L3153:
+.L3195:
 	ldr	r2, [r6]
 	mov	r10, #1
 	ldr	r3, [sp, #8]
@@ -20607,7 +21055,7 @@ flash_info_flush:
 	ldr	r1, [r2, #4]
 	ldr	r3, [r3]
 	str	r1, [r3]
-	ldr	r1, .L3161+36
+	ldr	r1, .L3203+36
 	str	r1, [r3, #4]
 	movs	r1, #4
 	stm	sp, {r1, r10}
@@ -20617,41 +21065,41 @@ flash_info_flush:
 	adds	r0, r0, #1
 	add	r3, r3, r10
 	strh	r3, [r8, #2]	@ movhi
-	bne	.L3154
+	bne	.L3196
 	mov	r1, r4
-	ldr	r0, .L3161+40
+	ldr	r0, .L3203+40
 	bl	printf
-	b	.L3151
-.L3156:
+	b	.L3193
+.L3198:
 	mov	r7, r10
-	b	.L3151
-.L3152:
+	b	.L3193
+.L3194:
 	mla	r4, r10, r3, r4
 	cmp	r0, #0
-	bne	.L3153
+	bne	.L3195
 	mov	r1, r4
-	b	.L3160
-.L3154:
+	b	.L3202
+.L3196:
 	cmp	r7, #0
-	beq	.L3156
+	beq	.L3198
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3162:
+.L3204:
 	.align	2
-.L3161:
-	.word	.LANCHOR14
+.L3203:
+	.word	.LANCHOR19
 	.word	.LANCHOR209
-	.word	.LC97
+	.word	.LC94
 	.word	.LANCHOR210
-	.word	.LANCHOR27
-	.word	.LC171
+	.word	.LANCHOR6
+	.word	.LC174
 	.word	.LANCHOR211
-	.word	.LC172
-	.word	.LANCHOR147
+	.word	.LC175
+	.word	.LANCHOR144
 	.word	1398362953
-	.word	.LC173
+	.word	.LC176
 	.word	.LANCHOR2
 	.size	flash_info_flush, .-flash_info_flush
 	.section	.text.flash_info_blk_init,"ax",%progbits
@@ -20666,27 +21114,27 @@ flash_info_blk_init:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L3194
-	ldr	r4, .L3194+4
+	ldr	r3, .L3236
+	ldr	r4, .L3236+4
 	ldr	r3, [r3]
 	tst	r3, #4096
-	beq	.L3164
+	beq	.L3206
 	ldr	r3, [r4]
-	movs	r1, #49
-	ldr	r2, .L3194+8
-	ldr	r0, .L3194+12
+	movs	r1, #50
+	ldr	r2, .L3236+8
+	ldr	r0, .L3236+12
 	str	r3, [sp]
 	mov	r3, #2048
 	bl	printf
-.L3164:
-	ldr	r7, .L3194+16
+.L3206:
+	ldr	r7, .L3236+16
 	mov	r8, #4
-.L3168:
+.L3210:
 	movs	r6, #0
-.L3167:
-	ldr	r10, .L3194+32
+.L3209:
+	ldr	r10, .L3236+32
 	mov	fp, #4
-	ldr	r5, .L3194+20
+	ldr	r5, .L3236+20
 	movs	r0, #0
 	ldr	r2, [r4]
 	ldrh	r1, [r10]
@@ -20695,31 +21143,31 @@ flash_info_blk_init:
 	mla	r1, r8, r1, r6
 	bl	flash_read_page_en
 	adds	r0, r0, #1
-	beq	.L3165
+	beq	.L3207
 	ldr	r2, [r4]
 	ldr	r3, [r2]
 	cmp	r3, r7
-	beq	.L3166
-.L3165:
+	beq	.L3208
+.L3207:
 	adds	r6, r6, #1
 	cmp	r6, #4
-	bne	.L3167
+	bne	.L3209
 	add	r8, r8, #1
 	cmp	r8, #16
-	bne	.L3168
-.L3193:
+	bne	.L3210
+.L3235:
 	mov	r0, #-1
-.L3163:
+.L3205:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3176:
+.L3218:
 	ldr	r3, [r4]
 	ldr	r2, [r3]
 	cmp	r2, r7
-	bne	.L3177
+	bne	.L3219
 	ldr	r8, [r3, #4]
-.L3170:
+.L3212:
 	ldrh	r0, [r10]
 	movs	r3, #4
 	ldrb	r1, [r6, #1]	@ zero_extendqisi2
@@ -20730,11 +21178,11 @@ flash_info_blk_init:
 	movs	r0, #0
 	bl	flash_read_page_en
 	adds	r0, r0, #1
-	beq	.L3171
+	beq	.L3213
 	ldr	r3, [r4]
 	ldr	r2, [r3]
 	cmp	r2, r7
-	bne	.L3171
+	bne	.L3213
 	ldr	r2, [r3, #4]
 	cmp	r8, r2
 	itttt	cc
@@ -20742,7 +21190,7 @@ flash_info_blk_init:
 	ldrbcc	r3, [r3, #36]	@ zero_extendqisi2
 	strbcc	r2, [r6]
 	strbcc	r3, [r6, #1]
-.L3171:
+.L3213:
 	mov	r8, #4
 	ldrb	r1, [r6]	@ zero_extendqisi2
 	ldr	r3, [r5]
@@ -20757,20 +21205,20 @@ flash_info_blk_init:
 	ldrb	r3, [r6]	@ zero_extendqisi2
 	movs	r6, #0
 	mla	r10, r10, r3, r0
-.L3172:
+.L3214:
 	sub	r0, fp, r6
 	sxth	r3, r0
 	cmp	r3, #0
-	bge	.L3175
+	bge	.L3217
 	adds	r2, r3, #1
-	bne	.L3174
+	bne	.L3216
 	ldr	r2, [r4]
-	ldr	r0, .L3194+24
+	ldr	r0, .L3236+24
 	str	r3, [sp, #12]
 	ldr	r1, [r2]
 	bl	printf
-	b	.L3193
-.L3175:
+	b	.L3235
+.L3217:
 	str	r8, [sp]
 	sub	r1, r10, r6
 	ldr	r3, [r5]
@@ -20778,26 +21226,26 @@ flash_info_blk_init:
 	ldr	r2, [r4]
 	bl	flash_read_page_en
 	adds	r0, r0, #1
-	beq	.L3173
+	beq	.L3215
 	ldr	r3, [r4]
 	ldr	r3, [r3]
 	cmp	r3, r7
-	beq	.L3174
-.L3173:
+	beq	.L3216
+.L3215:
 	adds	r6, r6, #1
-	b	.L3172
-.L3174:
+	b	.L3214
+.L3216:
 	cmp	r6, #1
-	bls	.L3178
+	bls	.L3220
 	bl	flash_info_flush
-.L3178:
+.L3220:
 	movs	r0, #0
-	b	.L3163
-.L3166:
+	b	.L3205
+.L3208:
 	ldrb	r1, [r2, #36]	@ zero_extendqisi2
 	ldrh	r0, [r10]
 	ldrb	r3, [r2, #37]	@ zero_extendqisi2
-	ldr	r6, .L3194+28
+	ldr	r6, .L3236+28
 	strb	r1, [r6]
 	muls	r1, r0, r1
 	strb	r3, [r6, #1]
@@ -20806,20 +21254,20 @@ flash_info_blk_init:
 	ldr	r3, [r5]
 	bl	flash_read_page_en
 	adds	r0, r0, #1
-	bne	.L3176
-.L3177:
-	mov	r8, #0
-	b	.L3170
-.L3195:
-	.align	2
-.L3194:
-	.word	.LANCHOR14
-	.word	.LANCHOR27
+	bne	.L3218
+.L3219:
+	mov	r8, #0
+	b	.L3212
+.L3237:
+	.align	2
+.L3236:
+	.word	.LANCHOR19
+	.word	.LANCHOR6
 	.word	.LANCHOR212
-	.word	.LC174
+	.word	.LC177
 	.word	1398362953
 	.word	.LANCHOR210
-	.word	.LC175
+	.word	.LC178
 	.word	.LANCHOR211
 	.word	.LANCHOR2
 	.size	flash_info_blk_init, .-flash_info_blk_init
@@ -20834,30 +21282,30 @@ flash_info_blk_init:
 nand_flash_init:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L3289
+	ldr	r3, .L3331
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	mov	r8, r3
 	ldr	r2, [r3]
 	tst	r2, #4096
-	beq	.L3197
-	ldr	r2, .L3289+4
-	movw	r1, #3429
-	ldr	r0, .L3289+8
+	beq	.L3239
+	ldr	r2, .L3331+4
+	movw	r1, #3451
+	ldr	r0, .L3331+8
 	bl	printf
-.L3197:
-	ldr	r3, .L3289+12
+.L3239:
+	ldr	r3, .L3331+12
 	movs	r6, #0
 	mov	r0, r4
-	ldr	r7, .L3289+16
-	ldr	r5, .L3289+20
+	ldr	r7, .L3331+16
+	ldr	r5, .L3331+20
 	str	r6, [r3]
 	bl	nandc_init
-	ldr	r3, .L3289+24
+	ldr	r3, .L3331+24
 	movs	r2, #1
-	ldr	r4, .L3289+28
+	ldr	r4, .L3331+28
 	mov	r1, r6
-	ldr	r0, .L3289+32
+	ldr	r0, .L3331+32
 	strb	r2, [r3]
 	movs	r3, #3
 	movs	r2, #8
@@ -20866,34 +21314,34 @@ nand_flash_init:
 	bl	ftl_memset
 	movs	r2, #32
 	mov	r1, r6
-	ldr	r0, .L3289+36
+	ldr	r0, .L3331+36
 	bl	ftl_memset
 	str	r7, [sp]
-	ldr	r7, .L3289+40
+	ldr	r7, .L3331+40
 	mov	fp, r7
-.L3203:
+.L3245:
 	lsl	r10, r6, #3
 	uxtb	r0, r6
 	add	r1, r7, r10
 	bl	flash_read_id
-	cbnz	r6, .L3198
+	cbnz	r6, .L3240
 	ldrb	r3, [r7]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, #253
-	bls	.L3199
-.L3201:
+	bls	.L3241
+.L3243:
 	mvn	fp, #1
-.L3196:
+.L3238:
 	mov	r0, fp
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3199:
+.L3241:
 	ldrb	r3, [r7, #1]	@ zero_extendqisi2
 	cmp	r3, #255
-	beq	.L3201
-.L3198:
+	beq	.L3243
+.L3240:
 	ldrb	r3, [fp, r10]	@ zero_extendqisi2
 	adds	r6, r6, #1
 	cmp	r3, #181
@@ -20901,11 +21349,11 @@ nand_flash_init:
 	moveq	r3, #44
 	strbeq	r3, [fp, r10]
 	cmp	r6, #4
-	bne	.L3203
-	ldr	r7, .L3289+44
+	bne	.L3245
+	ldr	r7, .L3331+44
 	movs	r6, #0
-	ldr	r3, .L3289+40
-.L3206:
+	ldr	r3, .L3331+40
+.L3248:
 	mov	r1, r3
 	ldrb	r2, [r7, #-1]	@ zero_extendqisi2
 	mov	r0, r7
@@ -20914,50 +21362,50 @@ nand_flash_init:
 	bl	flash_mem_cmp8
 	ldr	r3, [sp, #4]
 	cmp	r0, #0
-	bne	.L3204
-	ldr	r6, .L3289+48
-	ldr	r3, .L3289+52
+	bne	.L3246
+	ldr	r6, .L3331+48
+	ldr	r3, .L3331+52
 	add	r6, r6, r10
 	ldrb	r2, [r6, #22]	@ zero_extendqisi2
 	mov	r1, r3
-.L3205:
+.L3247:
 	lsls	r7, r0, #5
 	ldrb	r7, [r7, r3]	@ zero_extendqisi2
 	cmp	r7, r2
-	beq	.L3207
+	beq	.L3249
 	adds	r0, r0, #1
 	cmp	r0, #4
-	bne	.L3205
-.L3207:
-	ldr	r7, .L3289+56
+	bne	.L3247
+.L3249:
+	ldr	r7, .L3331+56
 	add	r1, r1, r0, lsl #5
 	movs	r2, #32
-	ldr	r0, .L3289+60
+	ldr	r0, .L3331+60
 	bl	ftl_memcpy
 	movs	r2, #32
 	mov	r1, r6
-	ldr	r0, .L3289+28
+	ldr	r0, .L3331+28
 	bl	ftl_memcpy
 	ldrb	r3, [r7]	@ zero_extendqisi2
 	cmp	r3, #8
-	bhi	.L3208
+	bhi	.L3250
 	ldrb	r3, [r4, #20]	@ zero_extendqisi2
 	cmp	r3, #60
-	bls	.L3208
+	bls	.L3250
 	movs	r3, #60
 	strb	r3, [r4, #20]
-.L3208:
+.L3250:
 	ldr	r3, [r8]
 	lsls	r3, r3, #19
-	bpl	.L3242
-	ldr	r2, .L3289+4
-	mov	r1, #3456
-	ldr	r0, .L3289+8
+	bpl	.L3284
+	ldr	r2, .L3331+4
+	movw	r1, #3478
+	ldr	r0, .L3331+8
 	bl	printf
-.L3242:
+.L3284:
 	ldr	r3, [r5]
 	mov	r0, #16384
-	ldr	r6, .L3289+64
+	ldr	r6, .L3331+64
 	mov	r10, #0
 	ldrh	r3, [r3, #10]
 	cmp	r3, #1024
@@ -20966,28 +21414,28 @@ nand_flash_init:
 	movcs	r3, #2
 	strbcs	r3, [r2]
 	bl	ftl_malloc
-	ldr	r3, .L3289+68
+	ldr	r3, .L3331+68
 	str	r0, [r3]
 	mov	r0, #16384
 	bl	ftl_malloc
-	ldr	r3, .L3289+72
+	ldr	r3, .L3331+72
 	str	r0, [r3]
 	mov	r0, #2048
 	bl	ftl_malloc
 	str	r0, [r6]
 	movs	r0, #64
 	bl	ftl_malloc
-	ldr	r3, .L3289+76
+	ldr	r3, .L3331+76
 	str	r0, [r3]
 	movs	r0, #64
 	bl	ftl_malloc
-	ldr	r3, .L3289+80
+	ldr	r3, .L3331+80
 	str	r0, [r3]
 	movs	r0, #64
 	bl	ftl_malloc
-	ldr	r3, .L3289+84
+	ldr	r3, .L3331+84
 	str	r0, [r3]
-	ldr	r3, .L3289+88
+	ldr	r3, .L3331+88
 	strb	r10, [r3]
 	bl	flash_die_info_init
 	ldrb	r0, [r4, #18]	@ zero_extendqisi2
@@ -20995,55 +21443,55 @@ nand_flash_init:
 	ldrb	r0, [r4, #20]	@ zero_extendqisi2
 	bl	nandc_bch_sel
 	ldr	r1, [r5]
-	ldr	r0, .L3289+92
+	ldr	r0, .L3331+92
 	ldrh	r3, [r1, #16]
 	ubfx	r2, r3, #8, #3
 	ubfx	r5, r3, #3, #1
 	strb	r2, [r0]
-	ldr	r2, .L3289+96
+	ldr	r2, .L3331+96
 	strb	r5, [r2]
 	ubfx	r5, r3, #4, #1
-	ldr	r2, .L3289+100
+	ldr	r2, .L3331+100
 	strb	r5, [r2]
 	ubfx	r5, r3, #12, #1
-	ldr	r2, .L3289+104
+	ldr	r2, .L3331+104
 	strb	r5, [r2]
 	ubfx	r5, r3, #13, #1
-	ldr	r2, .L3289+108
+	ldr	r2, .L3331+108
 	strb	r5, [r2]
 	ubfx	r5, r3, #11, #1
-	ldr	r2, .L3289+112
+	ldr	r2, .L3331+112
 	strb	r5, [r2]
 	ldrb	r2, [r1, #31]	@ zero_extendqisi2
-	ldr	r5, .L3289+116
+	ldr	r5, .L3331+116
 	ubfx	ip, r2, #1, #1
 	strb	ip, [r5]
 	ubfx	ip, r2, #2, #1
-	ldr	r5, .L3289+120
+	ldr	r5, .L3331+120
 	strb	ip, [r5]
 	ubfx	ip, r3, #14, #1
-	ldr	r5, .L3289+124
+	ldr	r5, .L3331+124
 	lsrs	r3, r3, #15
 	strb	ip, [r5]
-	ldr	r5, .L3289+128
+	ldr	r5, .L3331+128
 	strb	r3, [r5]
 	ubfx	r5, r2, #3, #1
 	ldrb	r3, [r1, #28]	@ zero_extendqisi2
 	ubfx	r2, r2, #4, #1
-	ldr	r1, .L3289+132
+	ldr	r1, .L3331+132
 	strb	r3, [r1]
-	ldr	r1, .L3289+136
+	ldr	r1, .L3331+136
 	strb	r5, [r1]
-	ldr	r1, .L3289+140
-	ldr	r5, .L3289+144
+	ldr	r1, .L3331+140
+	ldr	r5, .L3331+144
 	strb	r2, [r1]
 	movs	r2, #60
-	ldr	r1, .L3289+148
+	ldr	r1, .L3331+148
 	str	r10, [r5]
 	mov	r10, r0
 	strb	r2, [r1]
 	ldrb	r2, [r7]	@ zero_extendqisi2
-	ldr	r7, .L3289+152
+	ldr	r7, .L3331+152
 	cmp	r2, #9
 	strb	r3, [r7]
 	it	eq
@@ -21052,286 +21500,286 @@ nand_flash_init:
 	it	eq
 	strbeq	r0, [r1]
 	lsls	r3, r3, #31
-	bpl	.L3211
+	bpl	.L3253
 	ldrb	r3, [r4, #29]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L3212
+	beq	.L3254
 	movs	r3, #2
-.L3282:
+.L3324:
 	strb	r3, [r7]
-.L3211:
+.L3253:
 	cmp	r2, #8
-	bne	.L3213
+	bne	.L3255
 	ldrb	r3, [fp]	@ zero_extendqisi2
 	cmp	r3, #44
-	beq	.L3214
+	beq	.L3256
 	cmp	r3, #137
-	bne	.L3213
-.L3214:
+	bne	.L3255
+.L3256:
 	ldrb	r3, [r4, #28]	@ zero_extendqisi2
 	cmp	r3, #3
 	itt	eq
 	moveq	r3, #0
 	strbeq	r3, [r7]
-.L3213:
+.L3255:
 	ldrh	r1, [r4, #16]
-	ldr	r2, .L3289+156
+	ldr	r2, .L3331+156
 	ldrb	r3, [r4, #19]	@ zero_extendqisi2
 	tst	r1, #64
 	str	r2, [sp]
 	strb	r3, [r2]
-	beq	.L3216
+	beq	.L3258
 	sub	r2, r3, #17
 	cmp	r2, #2
-	bls	.L3217
+	bls	.L3259
 	cmp	r3, #21
-	bne	.L3218
-.L3217:
-	ldr	r2, .L3289+160
+	bne	.L3260
+.L3259:
+	ldr	r2, .L3331+160
 	cmp	r3, #21
-	ldr	r3, .L3289+164
+	ldr	r3, .L3331+164
 	str	r2, [r5]
-	beq	.L3286
+	beq	.L3328
 	movs	r2, #15
-.L3284:
+.L3326:
 	strb	r2, [r3]
-.L3216:
+.L3258:
 	ldr	r3, [r8]
 	lsls	r0, r3, #19
-	bpl	.L3230
-	ldr	r2, .L3289+4
-	movw	r1, #3549
-	ldr	r0, .L3289+8
+	bpl	.L3272
+	ldr	r2, .L3331+4
+	movw	r1, #3571
+	ldr	r0, .L3331+8
 	bl	printf
-.L3230:
-	ldr	r3, .L3289+168
+.L3272:
+	ldr	r3, .L3331+168
 	movs	r2, #0
 	strb	r2, [r3]
 	ldrb	r2, [r10]	@ zero_extendqisi2
 	str	r3, [sp, #4]
 	tst	r2, #1
-	beq	.L3231
+	beq	.L3273
 	ldrb	r3, [fp]	@ zero_extendqisi2
 	cmp	r3, #155
-	beq	.L3232
+	beq	.L3274
 	movs	r0, #4
 	bl	flash_set_interface_mode
 	movs	r0, #4
 	bl	nandc_set_if_mode
-.L3232:
+.L3274:
 	movs	r0, #1
 	bl	flash_set_interface_mode
 	movs	r0, #1
-.L3285:
+.L3327:
 	bl	nandc_set_if_mode
 	bl	flash_info_blk_init
 	cmp	r0, #-1
 	mov	fp, r0
-	bne	.L3234
+	bne	.L3276
 	ldr	r3, [r6]
 	movs	r2, #17
 	movs	r0, #0
 	strb	r2, [r3, #32]
-	ldr	r3, .L3289+172
+	ldr	r3, .L3331+172
 	strb	r0, [r3]
 	bl	zftl_flash_exit_slc_mode
-	b	.L3196
-.L3204:
+	b	.L3238
+.L3246:
 	adds	r6, r6, #1
 	adds	r7, r7, #32
 	cmp	r6, #49
-	bne	.L3206
-	b	.L3201
-.L3212:
+	bne	.L3248
+	b	.L3243
+.L3254:
 	movs	r3, #3
-	b	.L3282
-.L3290:
+	b	.L3324
+.L3332:
 	.align	2
-.L3289:
-	.word	.LANCHOR14
+.L3331:
+	.word	.LANCHOR19
 	.word	.LANCHOR213
-	.word	.LC97
-	.word	.LANCHOR172
+	.word	.LC94
+	.word	.LANCHOR169
+	.word	.LANCHOR31
+	.word	.LANCHOR21
+	.word	.LANCHOR23
 	.word	.LANCHOR32
-	.word	.LANCHOR16
-	.word	.LANCHOR18
-	.word	.LANCHOR33
-	.word	.LANCHOR30
-	.word	.LANCHOR148
-	.word	.LANCHOR48
+	.word	.LANCHOR29
+	.word	.LANCHOR145
+	.word	.LANCHOR47
 	.word	.LANCHOR214+1
 	.word	.LANCHOR214
 	.word	.LANCHOR215
-	.word	.LANCHOR28
-	.word	.LANCHOR20
 	.word	.LANCHOR27
-	.word	.LANCHOR176
-	.word	.LANCHOR166
-	.word	.LANCHOR175
-	.word	.LANCHOR168
+	.word	.LANCHOR25
+	.word	.LANCHOR6
+	.word	.LANCHOR173
+	.word	.LANCHOR163
+	.word	.LANCHOR172
+	.word	.LANCHOR165
 	.word	.LANCHOR210
 	.word	.LANCHOR216
-	.word	.LANCHOR49
-	.word	.LANCHOR186
-	.word	.LANCHOR45
-	.word	.LANCHOR84
-	.word	.LANCHOR81
-	.word	.LANCHOR36
+	.word	.LANCHOR48
+	.word	.LANCHOR183
+	.word	.LANCHOR44
+	.word	.LANCHOR83
+	.word	.LANCHOR80
+	.word	.LANCHOR35
 	.word	.LANCHOR124
 	.word	.LANCHOR217
 	.word	.LANCHOR1
-	.word	.LANCHOR82
+	.word	.LANCHOR81
 	.word	.LANCHOR0
-	.word	.LANCHOR31
-	.word	.LANCHOR37
-	.word	.LANCHOR174
-	.word	.LANCHOR17
-	.word	.LANCHOR19
-	.word	.LANCHOR23
+	.word	.LANCHOR30
+	.word	.LANCHOR36
+	.word	.LANCHOR171
+	.word	.LANCHOR22
+	.word	.LANCHOR24
+	.word	.LANCHOR15
 	.word	micron_read_retrial
-	.word	.LANCHOR169
-	.word	.LANCHOR21
-	.word	.LANCHOR34
-.L3218:
+	.word	.LANCHOR166
+	.word	.LANCHOR26
+	.word	.LANCHOR33
+.L3260:
 	cmp	r3, #33
-	beq	.L3221
+	beq	.L3263
 	sub	r2, r3, #65
 	cmp	r2, #1
-	bhi	.L3222
-.L3221:
-	ldr	r3, .L3291
+	bhi	.L3264
+.L3263:
+	ldr	r3, .L3333
 	movs	r2, #4
 	str	r3, [r5]
-	ldr	r3, .L3291+4
+	ldr	r3, .L3333+4
 	strb	r2, [r3]
-.L3288:
+.L3330:
 	movs	r2, #7
-.L3287:
-	ldr	r3, .L3291+8
-	b	.L3284
-.L3222:
+.L3329:
+	ldr	r3, .L3333+8
+	b	.L3326
+.L3264:
 	sub	r2, r3, #67
 	uxtb	r2, r2
 	cmp	r2, #1
-	bls	.L3223
+	bls	.L3265
 	sub	r1, r3, #34
 	cmp	r1, #1
-	bhi	.L3224
-.L3223:
-	ldr	r1, .L3291
+	bhi	.L3266
+.L3265:
+	ldr	r1, .L3333
 	cmp	r3, #35
 	str	r1, [r5]
-	ldr	r1, .L3291+8
-	beq	.L3225
+	ldr	r1, .L3333+8
+	beq	.L3267
 	cmp	r3, #68
-	beq	.L3225
+	beq	.L3267
 	movs	r3, #7
-.L3283:
+.L3325:
 	cmp	r2, #1
 	strb	r3, [r1]
-	ldr	r3, .L3291+4
-	bhi	.L3227
-.L3286:
+	ldr	r3, .L3333+4
+	bhi	.L3269
+.L3328:
 	movs	r2, #4
-	b	.L3284
-.L3225:
+	b	.L3326
+.L3267:
 	movs	r3, #17
-	b	.L3283
-.L3227:
+	b	.L3325
+.L3269:
 	movs	r2, #5
-	b	.L3284
-.L3224:
+	b	.L3326
+.L3266:
 	sub	r2, r3, #36
 	cmp	r2, #1
-	bhi	.L3228
-	ldr	r3, .L3291+12
+	bhi	.L3270
+	ldr	r3, .L3333+12
 	str	r3, [r5]
-	b	.L3288
-.L3228:
+	b	.L3330
+.L3270:
 	cmp	r3, #50
-	bne	.L3229
-	ldr	r3, .L3291+16
+	bne	.L3271
+	ldr	r3, .L3333+16
 	movs	r2, #25
 	str	r3, [r5]
-	b	.L3287
-.L3229:
+	b	.L3329
+.L3271:
 	cmp	r3, #81
-	bne	.L3216
-	ldr	r3, .L3291+20
+	bne	.L3258
+	ldr	r3, .L3333+20
 	movs	r2, #7
 	str	r3, [r5]
-	ldr	r3, .L3291+8
+	ldr	r3, .L3333+8
 	strb	r2, [r3]
 	movs	r2, #0
-	ldr	r3, .L3291+24
-	b	.L3284
-.L3231:
+	ldr	r3, .L3333+24
+	b	.L3326
+.L3273:
 	movs	r0, #4
-	b	.L3285
-.L3234:
+	b	.L3327
+.L3276:
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	cmp	r3, #9
-	bne	.L3235
+	bne	.L3277
 	ldr	r3, [r6]
 	ldrb	r3, [r3, #20]	@ zero_extendqisi2
 	cmp	r3, #1
 	itt	ne
 	movne	r3, #0
 	strbne	r3, [r7]
-.L3235:
+.L3277:
 	ldr	r3, [sp]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	cmp	r3, #7
 	itt	ls
-	ldrls	r3, .L3291+28
+	ldrls	r3, .L3333+28
 	strls	r3, [r5]
 	ldrb	r3, [r10]	@ zero_extendqisi2
 	lsls	r1, r3, #29
-	bpl	.L3238
+	bpl	.L3280
 	ldr	r3, [r6]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
-	cbz	r3, .L3238
-	ldr	r2, .L3291+32
+	cbz	r3, .L3280
+	ldr	r2, .L3333+32
 	movs	r0, #0
-	ldr	r3, .L3291+36
+	ldr	r3, .L3333+36
 	ldrh	r1, [r2]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	muls	r1, r3, r1
 	bl	flash_ddr_para_scan
 	ldr	r3, [sp, #4]
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L3238
+	cbnz	r3, .L3280
 	ldr	r2, [r6]
 	strb	r3, [r2, #19]
 	bl	flash_info_flush
-.L3238:
+.L3280:
 	ldr	r3, [r8]
 	lsls	r2, r3, #19
-	bpl	.L3240
-	ldr	r2, .L3291+40
-	movw	r1, #3647
-	ldr	r0, .L3291+44
+	bpl	.L3282
+	ldr	r2, .L3333+40
+	movw	r1, #3674
+	ldr	r0, .L3333+44
 	bl	printf
-.L3240:
+.L3282:
 	bl	nand_flash_print_info
 	mov	fp, #0
-	b	.L3196
-.L3292:
+	b	.L3238
+.L3334:
 	.align	2
-.L3291:
+.L3333:
 	.word	toshiba_read_retrial
-	.word	.LANCHOR26
-	.word	.LANCHOR169
+	.word	.LANCHOR18
+	.word	.LANCHOR166
 	.word	toshiba_3d_read_retrial
 	.word	samsung_read_retrial
 	.word	ymtc_3d_read_retrial
-	.word	.LANCHOR51
+	.word	.LANCHOR50
 	.word	hynix_read_retrial
 	.word	.LANCHOR2
 	.word	.LANCHOR211
 	.word	.LANCHOR213
-	.word	.LC97
+	.word	.LC94
 	.size	nand_flash_init, .-nand_flash_init
 	.section	.text.ftl_sysblk_dump,"ax",%progbits
 	.align	1
@@ -21354,37 +21802,37 @@ ftl_sysblk_dump:
 	mov	r4, r0
 	mov	r5, r6
 	str	r3, [sp, #44]
-.L3294:
-	ldr	r3, .L3303
+.L3336:
+	ldr	r3, .L3345
 	ldrh	r2, [r3]
 	uxth	r3, r6
 	cmp	r2, r3
-	bhi	.L3296
+	bhi	.L3338
 	ldr	r1, [sp, #44]
 	movs	r3, #32
-	ldr	r0, .L3303+4
+	ldr	r0, .L3345+4
 	movs	r2, #4
 	add	r1, r1, #704
 	bl	rknand_print_hex
 	mov	r0, r4
 	bl	zbuf_free
-	cbz	r5, .L3297
-	movw	r2, #1611
-	ldr	r1, .L3303+8
-	ldr	r0, .L3303+12
+	cbz	r5, .L3339
+	movw	r2, #1619
+	ldr	r1, .L3345+8
+	ldr	r0, .L3345+12
 	bl	printf
-.L3297:
+.L3339:
 	mov	r0, r5
 	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3296:
-	ldr	r3, .L3303+16
+.L3338:
+	ldr	r3, .L3345+16
 	uxth	r7, r6
 	ldr	r2, [r4, #12]
 	ldr	r1, [r4, #4]
 	ldrh	r8, [r3]
-	ldr	r3, .L3303+20
+	ldr	r3, .L3345+20
 	mla	r8, fp, r8, r7
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	mov	r0, r8
@@ -21410,31 +21858,31 @@ ftl_sysblk_dump:
 	mov	r2, r7
 	ldr	r3, [r3]
 	str	r0, [sp]
-	ldr	r0, .L3303+24
+	ldr	r0, .L3345+24
 	str	r3, [sp, #4]
 	mov	r3, r8
 	bl	printf
 	cmp	r10, #-1
-	beq	.L3298
+	beq	.L3340
 	cmp	r10, #512
 	it	eq
 	moveq	r5, #1
-.L3295:
+.L3337:
 	adds	r6, r6, #1
-	b	.L3294
-.L3298:
+	b	.L3336
+.L3340:
 	movs	r5, #1
-	b	.L3295
-.L3304:
+	b	.L3337
+.L3346:
 	.align	2
-.L3303:
-	.word	.LANCHOR95
-	.word	.LC176
+.L3345:
+	.word	.LANCHOR94
+	.word	.LC179
 	.word	.LANCHOR218
 	.word	.LC0
 	.word	.LANCHOR111
 	.word	.LANCHOR131
-	.word	.LC167
+	.word	.LC160
 	.size	ftl_sysblk_dump, .-ftl_sysblk_dump
 	.section	.text.ftl_open_sblk_recovery,"ax",%progbits
 	.align	1
@@ -21449,55 +21897,55 @@ ftl_open_sblk_recovery:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-	ldr	r5, .L3442
+	ldr	r5, .L3484
 	sub	sp, sp, #224
 	str	r1, [sp, #28]
 	ldr	r3, [r5]
 	lsls	r0, r3, #19
-	bpl	.L3306
+	bpl	.L3348
 	ldrh	r1, [r4, #2]
-	ldr	r0, .L3442+4
+	ldr	r0, .L3484+4
 	bl	printf
-.L3306:
+.L3348:
 	ldr	r3, [r5]
 	lsls	r1, r3, #19
-	bpl	.L3307
+	bpl	.L3349
 	ldrb	r1, [r4, #5]	@ zero_extendqisi2
-	ldr	r0, .L3442+8
+	ldr	r0, .L3484+8
 	bl	printf
-.L3307:
+.L3349:
 	ldr	r3, [r5]
 	lsls	r2, r3, #19
-	bpl	.L3308
+	bpl	.L3350
 	ldrh	r1, [r4]
-	ldr	r0, .L3442+12
+	ldr	r0, .L3484+12
 	bl	printf
-.L3308:
+.L3350:
 	ldr	r3, [r5]
 	lsls	r3, r3, #19
-	bpl	.L3309
+	bpl	.L3351
 	ldrh	r2, [r4, #18]
 	ldrh	r1, [r4, #16]
-	ldr	r0, .L3442+16
+	ldr	r0, .L3484+16
 	bl	printf
-.L3309:
+.L3351:
 	ldr	r3, [r5]
 	lsls	r7, r3, #19
-	bpl	.L3310
+	bpl	.L3352
 	ldrb	r1, [r4, #9]	@ zero_extendqisi2
-	ldr	r0, .L3442+20
+	ldr	r0, .L3484+20
 	bl	printf
-.L3310:
+.L3352:
 	ldrh	r3, [r4, #10]
 	ldrh	r2, [r4]
 	strh	r3, [r4, #14]	@ movhi
-	ldr	r3, .L3442+24
+	ldr	r3, .L3484+24
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcs	.L3305
+	bcs	.L3347
 	movs	r0, #1
 	bl	buf_alloc
-	ldr	r3, .L3442+28
+	ldr	r3, .L3484+28
 	movs	r1, #255
 	ldr	r2, [r0, #4]
 	mov	r5, r0
@@ -21523,15 +21971,15 @@ ftl_open_sblk_recovery:
 	str	r3, [sp, #12]
 	movs	r3, #0
 	str	r3, [sp, #20]
-.L3312:
-	ldr	r3, .L3442+32
+.L3354:
+	ldr	r3, .L3484+32
 	ldr	r2, [sp, #8]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bhi	.L3327
-.L3315:
+	bhi	.L3369
+.L3357:
 	ldrh	r3, [sp, #8]
-	ldr	r1, .L3442+32
+	ldr	r1, .L3484+32
 	ldrh	r2, [r4, #6]
 	strh	r3, [r4, #2]	@ movhi
 	ldrh	r3, [r4, #10]
@@ -21542,77 +21990,77 @@ ftl_open_sblk_recovery:
 	str	r1, [sp, #8]
 	muls	r3, r0, r3
 	cmp	r2, r3
-	beq	.L3328
-	movw	r2, #1794
-	ldr	r1, .L3442+36
-	ldr	r0, .L3442+40
+	beq	.L3370
+	movw	r2, #1802
+	ldr	r1, .L3484+36
+	ldr	r0, .L3484+40
 	bl	printf
-.L3328:
-	ldr	r3, .L3442+44
+.L3370:
+	ldr	r3, .L3484+44
 	movs	r6, #0
 	ldrh	r0, [r4, #10]
 	mov	r2, r6
 	ldr	r7, [r3]
 	str	r3, [sp, #16]
-.L3329:
+.L3371:
 	cmp	r2, r0
-	bcc	.L3331
+	bcc	.L3373
 	ldr	r2, [sp, #8]
 	ldrb	r3, [r4, #9]	@ zero_extendqisi2
-	ldr	r7, .L3442
+	ldr	r7, .L3484
 	ldrh	r2, [r2]
-	ldr	r8, .L3442+60
+	ldr	r8, .L3484+60
 	smulbb	r3, r3, r2
 	subs	r3, r3, r0
 	add	r6, r6, r3
 	ldr	r3, [r7]
 	uxth	r6, r6
 	tst	r3, #4096
-	beq	.L3332
+	beq	.L3374
 	ldrh	r1, [r4]
 	mov	r2, r6
 	ldr	r3, [r8]
-	ldr	r0, .L3442+48
+	ldr	r0, .L3484+48
 	ldrh	r3, [r3, r1, lsl #1]
 	bl	printf
-.L3332:
+.L3374:
 	ldr	r3, [r8]
 	ldrh	r2, [r4]
 	strh	r6, [r3, r2, lsl #1]	@ movhi
 	ldr	r3, [r7]
 	lsls	r7, r3, #17
-	bpl	.L3333
+	bpl	.L3375
 	ldr	r3, [sp, #44]
 	add	r1, sp, #32
-	ldr	r0, .L3442+52
+	ldr	r0, .L3484+52
 	str	r3, [sp]
 	ldm	r1, {r1, r2, r3}
 	bl	printf
-.L3333:
-	ldr	r6, .L3442+28
+.L3375:
+	ldr	r6, .L3484+28
 	movs	r7, #0
-	ldr	r8, .L3442+56
+	ldr	r8, .L3484+56
 	movs	r1, #0
 	ldr	r0, [r5, #4]
 	ldrb	r2, [r6]	@ zero_extendqisi2
 	lsls	r2, r2, #9
 	bl	ftl_memset
 	str	r6, [sp, #24]
-.L3334:
+.L3376:
 	ldrb	r3, [r8]	@ zero_extendqisi2
 	ldr	r2, [sp, #12]
 	muls	r3, r2, r3
 	cmp	r7, r3
-	bcc	.L3348
-	ldr	r7, .L3442+28
+	bcc	.L3390
+	ldr	r7, .L3484+28
 	movs	r6, #0
-.L3349:
-	ldr	r3, .L3442+56
+.L3391:
+	ldr	r3, .L3484+56
 	ldr	r2, [sp, #12]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	muls	r3, r2, r3
 	cmp	r6, r3
-	bcc	.L3356
+	bcc	.L3398
 	mov	r0, r5
 	bl	zbuf_free
 	ldr	r3, [sp, #8]
@@ -21626,62 +22074,62 @@ ftl_open_sblk_recovery:
 	subs	r3, r3, #1
 	ldr	r3, [r2, r3, lsl #2]
 	adds	r3, r3, #1
-	beq	.L3357
-	movw	r2, #1909
-	ldr	r1, .L3442+36
-	ldr	r0, .L3442+40
+	beq	.L3399
+	movw	r2, #1917
+	ldr	r1, .L3484+36
+	ldr	r0, .L3484+40
 	bl	printf
-.L3357:
+.L3399:
 	ldrh	r3, [r4, #6]
 	cmp	r3, #1
-	bne	.L3305
+	bne	.L3347
 	mov	r0, r4
 	bl	ftl_write_last_log_page
-.L3305:
+.L3347:
 	add	sp, sp, #224
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3327:
+.L3369:
 	ldrb	fp, [r4, #5]	@ zero_extendqisi2
-.L3313:
+.L3355:
 	ldrb	r3, [r4, #9]	@ zero_extendqisi2
 	cmp	r3, fp
-	bhi	.L3326
+	bhi	.L3368
 	movs	r3, #0
 	strb	r3, [r4, #5]
 	ldr	r3, [sp, #8]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	str	r3, [sp, #8]
-	b	.L3312
-.L3443:
+	b	.L3354
+.L3485:
 	.align	2
-.L3442:
-	.word	.LANCHOR14
-	.word	.LC177
-	.word	.LC178
-	.word	.LC179
+.L3484:
+	.word	.LANCHOR19
 	.word	.LC180
 	.word	.LC181
-	.word	.LANCHOR6
+	.word	.LC182
+	.word	.LC183
+	.word	.LC184
+	.word	.LANCHOR8
 	.word	.LANCHOR131
-	.word	.LANCHOR95
+	.word	.LANCHOR94
 	.word	.LANCHOR219
 	.word	.LC0
 	.word	.LANCHOR117
-	.word	.LC184
-	.word	.LC185
-	.word	.LANCHOR80
-	.word	.LANCHOR9
-.L3326:
+	.word	.LC187
+	.word	.LC188
+	.word	.LANCHOR79
+	.word	.LANCHOR11
+.L3368:
 	add	r3, fp, #8
 	ldrh	r7, [r4, r3, lsl #1]
 	movw	r3, #65535
 	cmp	r7, r3
-	beq	.L3314
-	ldr	r3, .L3444
+	beq	.L3356
+	ldr	r3, .L3486
 	ldr	r2, [sp, #8]
-	ldr	r6, .L3444+4
+	ldr	r6, .L3486+4
 	ldrh	r3, [r3]
 	ldr	r1, [r5, #4]
 	mla	r3, r7, r3, r2
@@ -21692,22 +22140,22 @@ ftl_open_sblk_recovery:
 	bl	ftl_read_ppa_page
 	cmp	r0, #512
 	mov	r8, r0
-	beq	.L3315
+	beq	.L3357
 	cmp	r0, #-1
-	beq	.L3316
+	beq	.L3358
 	ldr	r3, [r5, #12]
 	ldr	r2, [r3]
 	adds	r2, r2, #1
-	bne	.L3316
+	bne	.L3358
 	ldr	r3, [r3, #4]
 	adds	r3, r3, #1
-	bne	.L3316
+	bne	.L3358
 	ldr	r3, [r5, #4]
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L3315
-.L3316:
-	ldr	r3, .L3444+8
+	beq	.L3357
+.L3358:
+	ldr	r3, .L3486+8
 	movs	r2, #1
 	ldr	r1, [sp, #8]
 	strb	r2, [r3]
@@ -21715,70 +22163,70 @@ ftl_open_sblk_recovery:
 	ldrh	r2, [r4, #10]
 	mla	r3, r1, r3, fp
 	cmp	r2, r3
-	beq	.L3317
-	movw	r2, #1686
-	ldr	r1, .L3444+12
-	ldr	r0, .L3444+16
+	beq	.L3359
+	movw	r2, #1694
+	ldr	r1, .L3486+12
+	ldr	r0, .L3486+16
 	bl	printf
-.L3317:
+.L3359:
 	ldrh	r3, [r4, #10]
 	ldrh	r2, [r4, #6]
 	add	r2, r2, r3
-	ldr	r3, .L3444+20
+	ldr	r3, .L3486+20
 	ldrh	r1, [r3]
 	ldrb	r3, [r4, #9]	@ zero_extendqisi2
 	muls	r3, r1, r3
 	cmp	r2, r3
-	beq	.L3318
-	movw	r2, #1687
-	ldr	r1, .L3444+12
-	ldr	r0, .L3444+16
+	beq	.L3360
+	movw	r2, #1695
+	ldr	r1, .L3486+12
+	ldr	r0, .L3486+16
 	bl	printf
-.L3318:
+.L3360:
 	ldrb	r3, [r6]	@ zero_extendqisi2
 	cmp	r3, #8
-	bls	.L3319
+	bls	.L3361
 	ldr	r10, [r5, #12]
-	ldr	r2, .L3444+24
+	ldr	r2, .L3486+24
 	ldr	r3, [r10]
 	cmp	r3, r2
-	beq	.L3319
+	beq	.L3361
 	cmp	r8, #-1
-	beq	.L3321
+	beq	.L3363
 	ldr	r3, [r10, #4]
 	adds	r3, r3, #1
-	beq	.L3322
+	beq	.L3364
 	ldr	r3, [r10, #16]
 	add	r2, r2, #1392508928
 	sub	r2, r2, #1957888
 	subw	r2, r2, #2427
 	cmp	r3, r2
-	bne	.L3322
+	bne	.L3364
 	mov	r1, #1024
 	ldr	r0, [sp, #24]
 	bl	js_hash
 	ldr	r3, [r10, #20]
 	cmp	r3, r0
-	beq	.L3322
+	beq	.L3364
 	str	r0, [sp, #4]
 	mov	r1, r7
 	ldr	r3, [sp, #16]
 	ldr	r2, [sp, #8]
 	str	r8, [sp]
-	ldr	r0, .L3444+28
+	ldr	r0, .L3486+28
 	bl	printf
 	movs	r3, #16
 	movs	r2, #4
 	ldr	r1, [sp, #24]
-	ldr	r0, .L3444+32
+	ldr	r0, .L3486+32
 	bl	rknand_print_hex
 	ldrb	r3, [r6]	@ zero_extendqisi2
 	movs	r2, #4
 	ldr	r1, [r5, #12]
-	ldr	r0, .L3444+36
+	ldr	r0, .L3486+36
 	lsrs	r3, r3, #1
 	bl	rknand_print_hex
-.L3321:
+.L3363:
 	ldrh	r3, [r4, #6]
 	subs	r3, r3, #1
 	strh	r3, [r4, #6]	@ movhi
@@ -21789,38 +22237,38 @@ ftl_open_sblk_recovery:
 	str	r3, [sp, #12]
 	movs	r3, #1
 	str	r3, [sp, #20]
-.L3314:
+.L3356:
 	add	r3, fp, #1
 	uxth	fp, r3
-	b	.L3313
-.L3319:
+	b	.L3355
+.L3361:
 	cmp	r8, #-1
-	beq	.L3321
-.L3322:
+	beq	.L3363
+.L3364:
 	ldr	r3, [r5, #12]
 	ldr	r0, [r3, #4]
 	adds	r6, r0, #1
-	beq	.L3321
+	beq	.L3363
 	ldr	r3, [r3]
-	ldr	r2, .L3444+24
+	ldr	r2, .L3486+24
 	cmp	r3, r2
-	beq	.L3321
+	beq	.L3363
 	bl	lpa_hash_get_ppa
 	ldr	r3, [sp, #28]
 	mov	r7, r0
 	cmp	r3, #0
-	beq	.L3324
+	beq	.L3366
 	ldr	r10, [r5, #12]
 	ldr	r3, [r10, #8]
 	cmp	r0, r3
-	beq	.L3324
+	beq	.L3366
 	adds	r1, r0, #1
-	beq	.L3324
-	ldr	r3, .L3444+40
+	beq	.L3366
+	ldr	r3, .L3486+40
 	movs	r6, #1
-	ldr	r8, .L3444+60
+	ldr	r8, .L3486+60
 	ldrh	r0, [r3]
-	ldr	r3, .L3444+44
+	ldr	r3, .L3486+44
 	ldrb	r1, [r8]	@ zero_extendqisi2
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	rsb	r3, r3, #24
@@ -21834,26 +22282,26 @@ ftl_open_sblk_recovery:
 	uxth	r0, r0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L3324
+	bne	.L3366
 	ldr	r3, [r10]
 	mov	r0, r7
-	ldr	r10, .L3444+64
+	ldr	r10, .L3486+64
 	ldr	r1, [r5, #4]
 	str	r3, [sp, #12]
-	ldr	r3, .L3444+4
+	ldr	r3, .L3486+4
 	mov	r2, r10
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	bl	ftl_read_ppa_page
 	ldr	r3, [r10]
 	ldr	r2, [sp, #12]
 	cmp	r2, r3
-	bhi	.L3324
+	bhi	.L3366
 	ldr	r3, [r5, #12]
 	ldr	r3, [r3, #8]
 	adds	r2, r3, #1
-	beq	.L3321
-	ldr	r1, .L3444+44
-	ldr	r2, .L3444+40
+	beq	.L3363
+	ldr	r1, .L3486+44
+	ldr	r2, .L3486+40
 	ldrb	r0, [r1]	@ zero_extendqisi2
 	ldrh	r2, [r2]
 	ldrb	r1, [r8]	@ zero_extendqisi2
@@ -21866,8 +22314,8 @@ ftl_open_sblk_recovery:
 	bl	__aeabi_uidiv
 	uxth	r0, r0
 	bl	ftl_vpn_decrement
-	b	.L3321
-.L3331:
+	b	.L3363
+.L3373:
 	ldrh	r1, [r4, #12]
 	add	r1, r1, r2
 	adds	r2, r2, #1
@@ -21876,14 +22324,14 @@ ftl_open_sblk_recovery:
 	itt	ne
 	addne	r6, r6, #1
 	uxthne	r6, r6
-	b	.L3329
-.L3348:
+	b	.L3371
+.L3390:
 	add	fp, sp, #32
 	ldr	r0, [fp, r7, lsl #2]
 	adds	r6, r0, #1
-	bne	.L3335
-.L3341:
-	ldr	r2, .L3444+48
+	bne	.L3377
+.L3383:
+	ldr	r2, .L3486+48
 	mov	r6, #-1
 	ldr	r3, [r5, #12]
 	ldr	r1, [r5, #4]
@@ -21896,35 +22344,35 @@ ftl_open_sblk_recovery:
 	str	r2, [r3, #12]
 	str	r2, [r3, #16]
 	str	r2, [r1]
-	ldr	r1, .L3444+4
+	ldr	r1, .L3486+4
 	ldrb	r1, [r1]	@ zero_extendqisi2
 	cmp	r1, #8
-	bhi	.L3336
-.L3337:
+	bhi	.L3378
+.L3379:
 	ldr	r3, [sp, #20]
 	cmp	r3, #0
-	beq	.L3343
+	beq	.L3385
 	ldrh	r3, [r4, #6]
 	cmp	r3, #1
-	bls	.L3343
-	ldr	fp, .L3444+56
-.L3413:
+	bls	.L3385
+	ldr	fp, .L3486+56
+.L3455:
 	mov	r0, r4
 	bl	ftl_get_new_free_page
 	ldr	r3, [fp]
 	mov	r10, r0
 	lsls	r3, r3, #17
-	bpl	.L3345
+	bpl	.L3387
 	ldrh	r2, [r4, #12]
 	mov	r1, r0
 	ldrh	r3, [r4, #10]
-	ldr	r0, .L3444+52
+	ldr	r0, .L3486+52
 	add	r3, r3, r2
 	ldr	r2, [r5, #12]
 	subs	r3, r3, #1
 	ldr	r2, [r2, #4]
 	bl	printf
-.L3345:
+.L3387:
 	ldrb	r3, [r8]	@ zero_extendqisi2
 	ldr	r1, [sp, #12]
 	ldrh	r2, [r4, #6]
@@ -21932,8 +22380,8 @@ ftl_open_sblk_recovery:
 	adds	r3, r3, #1
 	subs	r3, r3, r7
 	cmp	r2, r3
-	bls	.L3343
-	ldr	r3, .L3444+4
+	bls	.L3385
+	ldr	r3, .L3486+4
 	mov	r0, r10
 	ldr	r2, [r5, #12]
 	ldr	r1, [r5, #4]
@@ -21943,10 +22391,10 @@ ftl_open_sblk_recovery:
 	ldrh	r0, [r4]
 	bl	ftl_vpn_decrement
 	adds	r0, r6, #1
-	beq	.L3346
+	beq	.L3388
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
-	beq	.L3346
+	beq	.L3388
 	add	r3, sp, #96
 	ldrh	r2, [r4, #12]
 	str	r10, [r3, r7, lsl #2]
@@ -21955,30 +22403,30 @@ ftl_open_sblk_recovery:
 	add	r2, sp, #160
 	subs	r3, r3, #1
 	str	r3, [r2, r7, lsl #2]
-.L3343:
+.L3385:
 	adds	r7, r7, #1
-	b	.L3334
-.L3445:
+	b	.L3376
+.L3487:
 	.align	2
-.L3444:
+.L3486:
 	.word	.LANCHOR111
 	.word	.LANCHOR131
-	.word	.LANCHOR198
+	.word	.LANCHOR195
 	.word	.LANCHOR219
 	.word	.LC0
-	.word	.LANCHOR95
+	.word	.LANCHOR94
 	.word	-178307901
-	.word	.LC182
-	.word	.LC183
-	.word	.LC150
-	.word	.LANCHOR75
-	.word	.LANCHOR32
+	.word	.LC185
+	.word	.LC186
+	.word	.LC147
+	.word	.LANCHOR74
+	.word	.LANCHOR31
 	.word	.LANCHOR110
-	.word	.LC187
-	.word	.LANCHOR14
-	.word	.LANCHOR76
-	.word	.LANCHOR193
-.L3335:
+	.word	.LC190
+	.word	.LANCHOR19
+	.word	.LANCHOR75
+	.word	.LANCHOR190
+.L3377:
 	ldr	r3, [sp, #24]
 	ldr	r1, [r5, #4]
 	ldr	r2, [r5, #12]
@@ -21988,20 +22436,20 @@ ftl_open_sblk_recovery:
 	mov	r6, r0
 	ldr	r0, [r3, #4]
 	bl	lpa_hash_get_ppa
-	ldr	r3, .L3446
+	ldr	r3, .L3488
 	mov	r10, r0
 	ldr	r3, [r3]
 	lsls	r1, r3, #17
-	bpl	.L3338
+	bpl	.L3380
 	ldr	r3, [r5, #12]
 	mov	r1, r0
 	ldr	r2, [fp, r7, lsl #2]
-	ldr	r0, .L3446+4
+	ldr	r0, .L3488+4
 	ldr	r3, [r3, #4]
 	bl	printf
-.L3338:
+.L3380:
 	add	r3, sp, #32
-	ldr	r1, .L3446+8
+	ldr	r1, .L3488+8
 	ldr	r3, [r3, r7, lsl #2]
 	movs	r2, #1
 	ldrb	r1, [r1]	@ zero_extendqisi2
@@ -22017,24 +22465,24 @@ ftl_open_sblk_recovery:
 	strhi	r2, [r3, #20]
 	adds	r2, r6, #1
 	str	r10, [r3, #8]
-	bne	.L3337
-	b	.L3341
-.L3336:
+	bne	.L3379
+	b	.L3383
+.L3378:
 	str	r2, [r3, #16]
 	str	r2, [r3, #20]
-	b	.L3337
-.L3346:
+	b	.L3379
+.L3388:
 	ldrh	r3, [r4, #6]
 	cmp	r3, #1
-	bls	.L3343
+	bls	.L3385
 	adds	r1, r6, #1
-	bne	.L3413
-	b	.L3343
-.L3356:
+	bne	.L3455
+	b	.L3385
+.L3398:
 	add	r8, sp, #96
 	ldr	r3, [r8, r6, lsl #2]
 	adds	r3, r3, #1
-	beq	.L3351
+	beq	.L3393
 	add	r0, sp, #32
 	ldr	r2, [r5, #12]
 	ldrb	r3, [r7]	@ zero_extendqisi2
@@ -22042,12 +22490,12 @@ ftl_open_sblk_recovery:
 	ldr	r0, [r0, r6, lsl #2]
 	bl	ftl_read_ppa_page
 	adds	r2, r0, #1
-	beq	.L3352
+	beq	.L3394
 	cmp	r0, #256
-	bne	.L3351
-.L3352:
+	bne	.L3393
+.L3394:
 	ldr	r0, [r8, r6, lsl #2]
-	ldr	r8, .L3446
+	ldr	r8, .L3488
 	ldrb	r3, [r7]	@ zero_extendqisi2
 	ldr	r2, [r5, #12]
 	ldr	r1, [r5, #4]
@@ -22055,56 +22503,56 @@ ftl_open_sblk_recovery:
 	ldr	r3, [r8]
 	mov	r10, r0
 	lsls	r3, r3, #17
-	bpl	.L3354
+	bpl	.L3396
 	ldr	r2, [r5, #12]
 	add	r3, sp, #32
 	mov	r1, r0
 	ldr	r3, [r3, r6, lsl #2]
-	ldr	r0, .L3446+12
+	ldr	r0, .L3488+12
 	ldr	r2, [r2, #8]
 	bl	printf
-.L3354:
+.L3396:
 	cmp	r10, #-1
-	beq	.L3351
+	beq	.L3393
 	ldr	r1, [r5, #12]
 	add	r3, sp, #32
 	ldr	r2, [r3, r6, lsl #2]
 	ldr	r3, [r1, #8]
 	cmp	r2, r3
-	bne	.L3351
+	bne	.L3393
 	ldr	r3, [r8]
 	add	r8, sp, #160
 	tst	r3, #16384
-	beq	.L3355
+	beq	.L3397
 	ldr	r3, [r8, r6, lsl #2]
 	ldr	r1, [r1, #4]
-	ldr	r0, .L3446+16
+	ldr	r0, .L3488+16
 	bl	printf
-.L3355:
+.L3397:
 	ldr	r3, [r5, #12]
 	ldrh	r2, [r8, r6, lsl #2]
 	ldr	r1, [r3, #8]
 	ldr	r0, [r3, #4]
 	bl	lpa_hash_update_ppa
-.L3351:
+.L3393:
 	adds	r6, r6, #1
-	b	.L3349
-.L3324:
+	b	.L3391
+.L3366:
 	ldr	r0, [r5, #12]
-	ldr	r3, .L3446+20
+	ldr	r3, .L3488+20
 	ldr	r2, [r0, #4]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bcs	.L3321
-	ldr	r3, .L3446+24
+	bcs	.L3363
+	ldr	r3, .L3488+24
 	ldrb	r1, [r4, #9]	@ zero_extendqisi2
 	ldrh	r2, [r4, #10]
 	ldrh	r3, [r3]
 	muls	r3, r1, r3
 	subs	r3, r3, #1
 	cmp	r2, r3
-	bge	.L3321
-	ldr	r3, .L3446+28
+	bge	.L3363
+	ldr	r3, .L3488+28
 	ldr	r6, [r0]
 	ldr	r3, [r3]
 	ldr	r1, [r3, #8]
@@ -22125,17 +22573,17 @@ ftl_open_sblk_recovery:
 	str	r3, [sp, #40]
 	ldr	r3, [sp, #16]
 	str	r3, [sp, #44]
-	b	.L3321
-.L3447:
+	b	.L3363
+.L3489:
 	.align	2
-.L3446:
-	.word	.LANCHOR14
-	.word	.LC186
+.L3488:
+	.word	.LANCHOR19
+	.word	.LC189
 	.word	.LANCHOR131
-	.word	.LC187
-	.word	.LC188
+	.word	.LC190
+	.word	.LC191
 	.word	.LANCHOR128
-	.word	.LANCHOR95
+	.word	.LANCHOR94
 	.word	.LANCHOR110
 	.size	ftl_open_sblk_recovery, .-ftl_open_sblk_recovery
 	.section	.text.dump_ftl_info,"ax",%progbits
@@ -22149,26 +22597,26 @@ ftl_open_sblk_recovery:
 dump_ftl_info:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L3449
+	ldr	r3, .L3491
 	push	{r0, r1, r2, r4, r5, r6, r7, lr}
-	ldr	r0, .L3449+4
+	ldr	r0, .L3491+4
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	bl	printf
-	ldr	r1, .L3449+8
-	ldr	r5, .L3449+12
-	ldr	r0, .L3449+16
+	ldr	r1, .L3491+8
+	ldr	r5, .L3491+12
+	ldr	r0, .L3491+16
 	ldrh	r3, [r1, #2]
 	ldrb	r2, [r1, #1]	@ zero_extendqisi2
 	ldrb	r1, [r1]	@ zero_extendqisi2
 	bl	printf
 	ldr	r3, [r5]
-	ldr	r4, .L3449+20
-	ldr	r0, .L3449+24
+	ldr	r4, .L3491+20
+	ldr	r0, .L3491+24
 	ldrh	r2, [r3, #140]
 	ldrh	r1, [r3, #130]
 	bl	printf
 	ldr	r0, [r4]
-	ldr	r7, .L3449+28
+	ldr	r7, .L3491+28
 	ldrh	r6, [r0, #26]
 	ldrb	r3, [r0, #21]	@ zero_extendqisi2
 	ldrh	r2, [r0, #18]
@@ -22176,7 +22624,7 @@ dump_ftl_info:
 	str	r6, [sp, #4]
 	ldrh	r0, [r0, #22]
 	str	r0, [sp]
-	ldr	r0, .L3449+32
+	ldr	r0, .L3491+32
 	bl	printf
 	ldr	r0, [r4]
 	ldrh	r6, [r0, #58]
@@ -22185,9 +22633,9 @@ dump_ftl_info:
 	ldrh	r1, [r0, #48]
 	str	r6, [sp, #4]
 	ldrh	r0, [r0, #54]
-	ldr	r6, .L3449+36
+	ldr	r6, .L3491+36
 	str	r0, [sp]
-	ldr	r0, .L3449+40
+	ldr	r0, .L3491+40
 	bl	printf
 	ldr	r0, [r4]
 	ldrh	r4, [r0, #90]
@@ -22196,46 +22644,46 @@ dump_ftl_info:
 	ldrh	r1, [r0, #80]
 	str	r4, [sp, #4]
 	ldrh	r0, [r0, #86]
-	ldr	r4, .L3449+44
+	ldr	r4, .L3491+44
 	str	r0, [sp]
-	ldr	r0, .L3449+48
+	ldr	r0, .L3491+48
 	bl	printf
 	ldrh	r2, [r6]
 	ldrb	r3, [r4]	@ zero_extendqisi2
-	ldr	r1, .L3449+52
-	ldr	r0, .L3449+56
+	ldr	r1, .L3491+52
+	ldr	r0, .L3491+56
 	muls	r3, r2, r3
 	ldr	r1, [r1]
 	movs	r2, #4
 	lsls	r3, r3, #1
 	bl	rknand_print_hex
-	ldr	r1, .L3449+60
+	ldr	r1, .L3491+60
 	movs	r2, #2
 	ldrh	r3, [r7]
-	ldr	r0, .L3449+64
+	ldr	r0, .L3491+64
 	ldr	r1, [r1]
 	bl	rknand_print_hex
 	ldr	r1, [r5]
 	movs	r2, #4
-	ldr	r0, .L3449+68
+	ldr	r0, .L3491+68
 	ldrh	r3, [r1, #698]
 	add	r1, r1, #704
 	bl	rknand_print_hex
-	ldr	r1, .L3449+72
+	ldr	r1, .L3491+72
 	movs	r2, #4
 	ldrh	r3, [r7]
-	ldr	r0, .L3449+76
+	ldr	r0, .L3491+76
 	ldr	r1, [r1]
 	bl	rknand_print_hex
 	mov	r3, #256
 	movs	r2, #2
-	ldr	r1, .L3449+80
-	ldr	r0, .L3449+84
+	ldr	r1, .L3491+80
+	ldr	r0, .L3491+84
 	bl	rknand_print_hex
 	ldrh	r2, [r6]
 	ldrb	r3, [r4]	@ zero_extendqisi2
-	ldr	r1, .L3449+88
-	ldr	r0, .L3449+92
+	ldr	r1, .L3491+88
+	ldr	r0, .L3491+92
 	muls	r3, r2, r3
 	ldr	r1, [r1]
 	movs	r2, #2
@@ -22244,33 +22692,33 @@ dump_ftl_info:
 	@ sp needed
 	pop	{r4, r5, r6, r7, lr}
 	b	rknand_print_hex
-.L3450:
+.L3492:
 	.align	2
-.L3449:
-	.word	.LANCHOR58
-	.word	.LC189
-	.word	.LANCHOR194
-	.word	.LANCHOR110
-	.word	.LC190
-	.word	.LANCHOR10
-	.word	.LC191
-	.word	.LANCHOR6
+.L3491:
+	.word	.LANCHOR57
 	.word	.LC192
-	.word	.LANCHOR95
+	.word	.LANCHOR191
+	.word	.LANCHOR110
 	.word	.LC193
-	.word	.LANCHOR80
+	.word	.LANCHOR12
 	.word	.LC194
-	.word	.LANCHOR117
+	.word	.LANCHOR8
 	.word	.LC195
-	.word	.LANCHOR9
+	.word	.LANCHOR94
 	.word	.LC196
-	.word	.LC176
-	.word	.LANCHOR7
+	.word	.LANCHOR79
 	.word	.LC197
+	.word	.LANCHOR117
+	.word	.LC198
+	.word	.LANCHOR11
+	.word	.LC199
+	.word	.LC179
+	.word	.LANCHOR9
+	.word	.LC200
 	.word	.LANCHOR116
-	.word	.LC198
+	.word	.LC201
 	.word	.LANCHOR118
-	.word	.LC199
+	.word	.LC202
 	.size	dump_ftl_info, .-dump_ftl_info
 	.section	.text.pm_ppa_update_check,"ax",%progbits
 	.align	1
@@ -22285,10 +22733,10 @@ pm_ppa_update_check:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r7, r2
-	ldr	r2, .L3458
+	ldr	r2, .L3500
 	mov	r5, r0
 	mov	r6, r1
-	ldr	r3, .L3458+4
+	ldr	r3, .L3500+4
 	ldrb	r4, [r2]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	rsb	r4, r4, #24
@@ -22296,41 +22744,41 @@ pm_ppa_update_check:
 	movs	r4, #1
 	lsls	r4, r4, r0
 	lsr	r0, r7, r3
-	ldr	r3, .L3458+8
+	ldr	r3, .L3500+8
 	subs	r4, r4, #1
 	ands	r0, r0, r4
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	bl	__aeabi_uidiv
-	ldr	r3, .L3458+12
+	ldr	r3, .L3500+12
 	uxth	r0, r0
 	ldr	r3, [r3]
 	add	r0, r3, r0, lsl #2
 	ldrb	r3, [r0, #2]	@ zero_extendqisi2
 	lsrs	r3, r3, #5
 	cmp	r3, #1
-	beq	.L3452
+	beq	.L3494
 	cmp	r3, #7
-	bne	.L3454
-.L3452:
+	bne	.L3496
+.L3494:
 	mov	r3, r7
 	mov	r2, r6
 	mov	r1, r5
-	ldr	r0, .L3458+16
+	ldr	r0, .L3500+16
 	bl	printf
 	bl	dump_ftl_info
 	mov	r0, #-1
 	pop	{r3, r4, r5, r6, r7, pc}
-.L3454:
+.L3496:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L3459:
+.L3501:
 	.align	2
-.L3458:
-	.word	.LANCHOR32
+.L3500:
+	.word	.LANCHOR31
+	.word	.LANCHOR74
 	.word	.LANCHOR75
-	.word	.LANCHOR76
-	.word	.LANCHOR7
-	.word	.LC200
+	.word	.LANCHOR9
+	.word	.LC203
 	.size	pm_ppa_update_check, .-pm_ppa_update_check
 	.section	.text.load_l2p_region,"ax",%progbits
 	.align	1
@@ -22346,22 +22794,22 @@ load_l2p_region:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r5, r0
 	mov	r7, r1
-	bls	.L3461
+	bls	.L3503
 	movs	r2, #32
-	ldr	r1, .L3484
-	ldr	r0, .L3484+4
+	ldr	r1, .L3526
+	ldr	r0, .L3526+4
 	bl	printf
-.L3461:
-	ldr	r6, .L3484+8
+.L3503:
+	ldr	r6, .L3526+8
 	ldr	r3, [r6]
 	mov	r10, r6
 	ldrh	r2, [r3, #698]
 	cmp	r2, r5
-	bcs	.L3462
+	bcs	.L3504
 	mov	r1, r5
-	ldr	r0, .L3484+12
+	ldr	r0, .L3526+12
 	bl	printf
-	ldr	r3, .L3484+16
+	ldr	r3, .L3526+16
 	movs	r4, #0
 	movs	r1, #255
 	ldr	r0, [r4, #4]
@@ -22370,22 +22818,22 @@ load_l2p_region:
 	ldr	r3, [r6]
 	ldrh	r3, [r3, #698]
 	cmp	r3, r5
-	bcc	.L3463
-.L3482:
+	bcc	.L3505
+.L3524:
 	movs	r0, #0
-.L3460:
+.L3502:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3463:
+.L3505:
 	movs	r2, #37
-.L3483:
-	ldr	r1, .L3484
-	ldr	r0, .L3484+4
+.L3525:
+	ldr	r1, .L3526
+	ldr	r0, .L3526+4
 	bl	printf
-	b	.L3482
-.L3462:
-	ldr	r6, .L3484+20
+	b	.L3524
+.L3504:
+	ldr	r6, .L3526+20
 	add	r2, r5, #176
 	ldr	r4, [r3, r2, lsl #2]
 	movs	r3, #0
@@ -22393,21 +22841,21 @@ load_l2p_region:
 	lsls	r7, r7, #3
 	add	fp, r6, r7
 	strh	r3, [fp, #2]	@ movhi
-	cbnz	r4, .L3465
+	cbnz	r4, .L3507
 	mov	r2, r4
 	mov	r1, r5
-	ldr	r0, .L3484+24
+	ldr	r0, .L3526+24
 	bl	printf
-	ldr	r3, .L3484+16
+	ldr	r3, .L3526+16
 	movs	r1, #255
 	ldr	r0, [fp, #4]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-	b	.L3482
-.L3465:
-	ldr	r8, .L3484+32
+	b	.L3524
+.L3507:
+	ldr	r8, .L3526+32
 	mov	r0, r4
-	ldr	r3, .L3484+28
+	ldr	r3, .L3526+28
 	ldr	r1, [fp, #4]
 	ldr	r2, [r8]
 	ldrb	r3, [r3]	@ zero_extendqisi2
@@ -22416,43 +22864,43 @@ load_l2p_region:
 	mov	r3, r0
 	ldr	r2, [r2]
 	cmp	r2, r5
-	bne	.L3466
+	bne	.L3508
 	adds	r1, r0, #1
-	beq	.L3466
+	beq	.L3508
 	cmp	r0, #512
-	beq	.L3466
-.L3471:
-	ldr	r3, .L3484+32
+	beq	.L3508
+.L3513:
+	ldr	r3, .L3526+32
 	ldr	r3, [r3]
 	ldr	r3, [r3]
 	cmp	r5, r3
-	beq	.L3482
+	beq	.L3524
 	movs	r2, #73
-	b	.L3483
-.L3466:
+	b	.L3525
+.L3508:
 	mov	r1, r5
 	str	r4, [sp]
-	ldr	r0, .L3484+36
+	ldr	r0, .L3526+36
 	add	r8, r6, r7
 	bl	printf
 	ldr	r1, [r10]
 	movs	r2, #4
-	ldr	r10, .L3484+28
-	ldr	r0, .L3484+40
+	ldr	r10, .L3526+28
+	ldr	r0, .L3526+40
 	ldrh	r3, [r1, #698]
 	add	r1, r1, #704
 	bl	rknand_print_hex
 	ldrb	r3, [r10]	@ zero_extendqisi2
 	movs	r2, #4
-	ldr	fp, .L3484+32
+	ldr	fp, .L3526+32
 	ldr	r1, [r8, #4]
-	ldr	r0, .L3484+44
+	ldr	r0, .L3526+44
 	lsls	r3, r3, #7
 	bl	rknand_print_hex
 	movs	r3, #16
 	movs	r2, #4
 	ldr	r1, [fp]
-	ldr	r0, .L3484+48
+	ldr	r0, .L3526+48
 	bl	rknand_print_hex
 	ldrb	r3, [r10]	@ zero_extendqisi2
 	mov	r0, r4
@@ -22460,41 +22908,41 @@ load_l2p_region:
 	ldr	r1, [r8, #4]
 	bl	ftl_read_ppa_page
 	adds	r3, r0, #1
-	beq	.L3469
+	beq	.L3511
 	cmp	r0, #512
-	bne	.L3470
-.L3469:
-	ldr	r3, .L3484+16
+	bne	.L3512
+.L3511:
+	ldr	r3, .L3526+16
 	add	r6, r6, r7
 	movs	r1, #255
 	ldr	r0, [r6, #4]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-.L3472:
+.L3514:
 	mov	r0, #-1
-	b	.L3460
-.L3470:
+	b	.L3502
+.L3512:
 	ldr	r3, [fp]
 	ldr	r3, [r3]
 	cmp	r5, r3
-	beq	.L3471
-	b	.L3472
-.L3485:
+	beq	.L3513
+	b	.L3514
+.L3527:
 	.align	2
-.L3484:
+.L3526:
 	.word	.LANCHOR220
 	.word	.LC0
 	.word	.LANCHOR110
-	.word	.LC201
+	.word	.LC204
 	.word	.LANCHOR221
-	.word	.LANCHOR138
-	.word	.LC202
+	.word	.LANCHOR135
+	.word	.LC205
 	.word	.LANCHOR131
 	.word	.LANCHOR207
-	.word	.LC203
-	.word	.LC204
-	.word	.LC183
-	.word	.LC205
+	.word	.LC206
+	.word	.LC207
+	.word	.LC186
+	.word	.LC208
 	.size	load_l2p_region, .-load_l2p_region
 	.section	.text.pm_gc,"ax",%progbits
 	.align	1
@@ -22508,30 +22956,30 @@ pm_gc:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r4, .L3503
-	ldr	r5, .L3503+4
+	ldr	r4, .L3545
+	ldr	r5, .L3545+4
 	ldr	r3, [r4]
-	ldr	r6, .L3503+8
+	ldr	r6, .L3545+8
 	ldrh	r2, [r5]
 	ldrh	r1, [r3, #688]
 	subs	r2, r2, #1
 	cmp	r1, r2
-	bge	.L3487
+	bge	.L3529
 	ldr	r3, [r6]
 	cmp	r3, #0
-	beq	.L3488
-.L3487:
+	beq	.L3530
+.L3529:
 	bl	pm_free_sblk
 	ldr	r2, [r4]
 	ldrh	r3, [r5]
 	ldrh	r1, [r2, #688]
 	subs	r3, r3, #1
 	cmp	r1, r3
-	bge	.L3489
+	bge	.L3531
 	ldr	r3, [r6]
 	cmp	r3, #0
-	beq	.L3488
-.L3489:
+	beq	.L3530
+.L3531:
 	uxth	r0, r0
 	movw	r5, #65535
 	movs	r3, #0
@@ -22539,10 +22987,10 @@ pm_gc:
 	str	r3, [r6]
 	ldrh	r8, [r2, r0, lsl #1]
 	cmp	r8, r5
-	bne	.L3491
+	bne	.L3533
 	movs	r2, #182
-	ldr	r1, .L3503+12
-	ldr	r0, .L3503+16
+	ldr	r1, .L3545+12
+	ldr	r0, .L3545+16
 	bl	printf
 	bl	pm_free_sblk
 	ldr	r3, [r4]
@@ -22550,43 +22998,43 @@ pm_gc:
 	adds	r0, r0, #208
 	ldrh	r8, [r3, r0, lsl #1]
 	cmp	r8, r5
-	beq	.L3488
-.L3491:
-	ldr	r5, .L3503+20
+	beq	.L3530
+.L3533:
+	ldr	r5, .L3545+20
 	bl	pm_select_ram_region
 	mov	r6, r0
 	movw	r3, #65535
 	ldrh	r0, [r5, r0, lsl #3]
 	cmp	r0, r3
-	beq	.L3492
+	beq	.L3534
 	add	r7, r5, r6, lsl #3
 	ldr	r1, [r7, #4]
-	cbz	r1, .L3492
+	cbz	r1, .L3534
 	ldrsh	r3, [r7, #2]
 	cmp	r3, #0
-	bge	.L3492
+	bge	.L3534
 	bl	pm_write_page
 	ldrh	r3, [r7, #2]
 	ubfx	r3, r3, #0, #15
 	strh	r3, [r7, #2]	@ movhi
-.L3492:
+.L3534:
 	movs	r7, #0
-.L3493:
+.L3535:
 	ldr	r1, [r4]
 	uxth	fp, r7
 	ldrh	r3, [r1, #698]
 	cmp	r3, fp
-	bhi	.L3496
+	bhi	.L3538
 	bl	pm_free_sblk
-.L3488:
+.L3530:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3496:
-	ldr	r3, .L3503+24
+.L3538:
+	ldr	r3, .L3545+24
 	uxth	r10, r7
 	mov	ip, #1
 	ldrh	r0, [r3]
-	ldr	r3, .L3503+28
+	ldr	r3, .L3545+28
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	rsb	r3, r3, #24
 	subs	r3, r3, r0
@@ -22595,39 +23043,39 @@ pm_gc:
 	ldr	r1, [r1, ip, lsl #2]
 	subs	r3, r3, #1
 	lsr	r0, r1, r0
-	ldr	r1, .L3503+32
+	ldr	r1, .L3545+32
 	ands	r0, r0, r3
 	ldrb	r1, [r1]	@ zero_extendqisi2
 	bl	__aeabi_uidiv
 	uxth	r0, r0
 	cmp	r8, r0
-	bne	.L3494
+	bne	.L3536
 	mov	r1, r6
 	mov	r0, fp
 	bl	load_l2p_region
-	cbnz	r0, .L3495
+	cbnz	r0, .L3537
 	add	r3, r5, r6, lsl #3
 	mov	r0, r10
 	ldr	r1, [r3, #4]
 	bl	pm_write_page
-.L3495:
+.L3537:
 	movw	r3, #65535
 	strh	r3, [r5, r6, lsl #3]	@ movhi
-.L3494:
+.L3536:
 	adds	r7, r7, #1
-	b	.L3493
-.L3504:
+	b	.L3535
+.L3546:
 	.align	2
-.L3503:
+.L3545:
 	.word	.LANCHOR110
-	.word	.LANCHOR155
-	.word	.LANCHOR151
+	.word	.LANCHOR152
+	.word	.LANCHOR148
 	.word	.LANCHOR222
 	.word	.LC0
-	.word	.LANCHOR138
+	.word	.LANCHOR135
+	.word	.LANCHOR74
+	.word	.LANCHOR31
 	.word	.LANCHOR75
-	.word	.LANCHOR32
-	.word	.LANCHOR76
 	.size	pm_gc, .-pm_gc
 	.section	.text.pm_flush_id,"ax",%progbits
 	.align	1
@@ -22640,7 +23088,7 @@ pm_gc:
 pm_flush_id:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L3510
+	ldr	r3, .L3552
 	push	{r4, lr}
 	add	r4, r3, r0, lsl #3
 	ldrh	r0, [r3, r0, lsl #3]
@@ -22649,20 +23097,20 @@ pm_flush_id:
 	ldrh	r3, [r4, #2]
 	ubfx	r3, r3, #0, #15
 	strh	r3, [r4, #2]	@ movhi
-	ldr	r4, .L3510+4
+	ldr	r4, .L3552+4
 	ldr	r3, [r4]
-	cbz	r3, .L3506
+	cbz	r3, .L3548
 	bl	pm_gc
 	movs	r3, #0
 	str	r3, [r4]
-.L3506:
+.L3548:
 	movs	r0, #0
 	pop	{r4, pc}
-.L3511:
+.L3553:
 	.align	2
-.L3510:
-	.word	.LANCHOR138
-	.word	.LANCHOR136
+.L3552:
+	.word	.LANCHOR135
+	.word	.LANCHOR204
 	.size	pm_flush_id, .-pm_flush_id
 	.section	.text.pm_flush,"ax",%progbits
 	.align	1
@@ -22677,24 +23125,24 @@ pm_flush:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #0
-	ldr	r5, .L3516
-.L3514:
+	ldr	r5, .L3558
+.L3556:
 	add	r3, r5, r4, lsl #3
 	uxth	r0, r4
 	ldrsh	r3, [r3, #2]
 	cmp	r3, #0
-	bge	.L3513
+	bge	.L3555
 	bl	pm_flush_id
-.L3513:
+.L3555:
 	adds	r4, r4, #1
 	cmp	r4, #32
-	bne	.L3514
+	bne	.L3556
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L3517:
+.L3559:
 	.align	2
-.L3516:
-	.word	.LANCHOR138
+.L3558:
+	.word	.LANCHOR135
 	.size	pm_flush, .-pm_flush
 	.section	.text.flt_sys_flush,"ax",%progbits
 	.align	1
@@ -22757,7 +23205,7 @@ zftl_deinit:
 pm_init:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L3546
+	ldr	r3, .L3588
 	movs	r2, #1
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
@@ -22765,34 +23213,34 @@ pm_init:
 	mov	r8, r0
 	movs	r0, #64
 	str	r4, [r3]
-	ldr	r3, .L3546+4
-	ldr	r6, .L3546+8
+	ldr	r3, .L3588+4
+	ldr	r6, .L3588+8
 	str	r4, [r3]
-	ldr	r3, .L3546+12
+	ldr	r3, .L3588+12
 	mov	r5, r6
 	strb	r2, [r3]
 	bl	ftl_malloc
-	ldr	r3, .L3546+16
+	ldr	r3, .L3588+16
 	mov	r10, r3
 	str	r0, [r3]
-.L3523:
+.L3565:
 	movw	r3, #65535
 	adds	r7, r6, r4
 	strh	r3, [r4, r6]	@ movhi
 	movs	r3, #0
 	strh	r3, [r7, #2]	@ movhi
 	cmp	r8, #0
-	beq	.L3522
-	ldr	r3, .L3546+20
+	beq	.L3564
+	ldr	r3, .L3588+20
 	ldrb	r0, [r3]	@ zero_extendqisi2
 	lsls	r0, r0, #9
 	bl	ftl_malloc
 	str	r0, [r7, #4]
-.L3522:
+.L3564:
 	adds	r4, r4, #8
 	cmp	r4, #256
-	bne	.L3523
-	ldr	r4, .L3546+24
+	bne	.L3565
+	ldr	r4, .L3588+24
 	ldr	fp, [r5, #4]
 	ldr	r8, [r10]
 	ldr	r3, [r4]
@@ -22807,25 +23255,25 @@ pm_init:
 	mov	r6, r0
 	ldrh	r2, [r1, #696]
 	cmp	r2, r0
-	bgt	.L3524
+	bgt	.L3566
 	mov	r3, r0
 	ldrh	r1, [r1, #692]
-	ldr	r0, .L3546+28
+	ldr	r0, .L3588+28
 	bl	printf
 	ldr	r3, [r4]
 	ldrsh	r7, [r3, #696]
-.L3525:
+.L3567:
 	cmp	r7, r6
-	ble	.L3528
-	ldr	r3, .L3546+32
+	ble	.L3570
+	ldr	r3, .L3588+32
 	movs	r2, #1
 	add	r6, r6, r2
 	strb	r2, [r3]
 	ldr	r3, [r4]
 	strh	r6, [r3, #696]	@ movhi
 	bl	pm_free_sblk
-.L3524:
-	ldr	r3, .L3546+36
+.L3566:
+	ldr	r3, .L3588+36
 	movs	r1, #255
 	ldr	r0, [r5, #4]
 	ldrh	r2, [r3]
@@ -22833,9 +23281,9 @@ pm_init:
 	ldr	r1, [r5, #4]
 	mov	r0, #-1
 	bl	pm_write_page
-	ldr	r3, .L3546+32
+	ldr	r3, .L3588+32
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L3529
+	cbz	r3, .L3571
 	ldr	r1, [r5, #4]
 	mov	r0, #-1
 	bl	pm_write_page
@@ -22845,20 +23293,20 @@ pm_init:
 	ldr	r1, [r5, #4]
 	mov	r0, #-1
 	bl	pm_write_page
-.L3529:
+.L3571:
 	bl	pm_free_sblk
 	bl	pm_gc
 	movs	r0, #0
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3528:
+.L3570:
 	ldr	r3, [r4]
-	ldr	r1, .L3546+40
+	ldr	r1, .L3588+40
 	ldrh	r2, [r3, #692]
 	ldrh	r1, [r1]
 	ldrb	r0, [r3, #694]	@ zero_extendqisi2
-	ldr	r3, .L3546+20
+	ldr	r3, .L3588+20
 	mla	r2, r1, r2, r7
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r2, [sp, #12]
@@ -22869,7 +23317,7 @@ pm_init:
 	bl	flash_read_page_en
 	ldr	r3, [r4]
 	mov	r10, r0
-	ldr	r0, .L3546+44
+	ldr	r0, .L3588+44
 	ldr	r2, [r3, #48]
 	adds	r2, r2, #1
 	str	r2, [r3, #48]
@@ -22878,18 +23326,18 @@ pm_init:
 	ldr	r1, [r8]
 	bl	printf
 	cmp	r10, #-1
-	beq	.L3526
+	beq	.L3568
 	cmp	r10, #512
-	beq	.L3526
+	beq	.L3568
 	ldr	r2, [r4]
 	ldr	r10, [r8]
 	ldrh	r3, [r2, #698]
 	cmp	r10, r3
-	bcs	.L3526
+	bcs	.L3568
 	ldr	r3, [r8, #8]
 	str	r3, [sp, #20]
-	cbz	r3, .L3527
-	ldr	r3, .L3546+20
+	cbz	r3, .L3569
+	ldr	r3, .L3588+20
 	mov	r0, fp
 	str	r2, [sp, #16]
 	ldrb	r1, [r3]	@ zero_extendqisi2
@@ -22898,35 +23346,35 @@ pm_init:
 	ldr	r3, [sp, #20]
 	ldr	r2, [sp, #16]
 	cmp	r3, r0
-	beq	.L3527
+	beq	.L3569
 	mov	r1, r3
-	ldr	r0, .L3546+48
+	ldr	r0, .L3588+48
 	bl	printf
-.L3526:
+.L3568:
 	adds	r7, r7, #1
 	sxth	r7, r7
-	b	.L3525
-.L3527:
+	b	.L3567
+.L3569:
 	ldr	r3, [sp, #12]
 	add	r10, r10, #176
 	str	r3, [r2, r10, lsl #2]
-	b	.L3526
-.L3547:
+	b	.L3568
+.L3589:
 	.align	2
-.L3546:
-	.word	.LANCHOR151
-	.word	.LANCHOR136
-	.word	.LANCHOR138
+.L3588:
+	.word	.LANCHOR148
+	.word	.LANCHOR204
+	.word	.LANCHOR135
 	.word	.LANCHOR208
 	.word	.LANCHOR207
 	.word	.LANCHOR131
 	.word	.LANCHOR110
-	.word	.LC206
-	.word	.LANCHOR198
+	.word	.LC209
+	.word	.LANCHOR195
 	.word	.LANCHOR221
 	.word	.LANCHOR111
-	.word	.LC207
-	.word	.LC208
+	.word	.LC210
+	.word	.LC211
 	.size	pm_init, .-pm_init
 	.section	.text.pm_log2phys,"ax",%progbits
 	.align	1
@@ -22939,54 +23387,54 @@ pm_init:
 pm_log2phys:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L3563
+	ldr	r3, .L3605
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	fp, r0
 	str	r2, [sp, #4]
 	mov	r6, r1
 	ldr	r2, [r3]
 	cmp	r0, r2
-	bcc	.L3549
+	bcc	.L3591
 	mov	r1, r0
-	ldr	r0, .L3563+4
+	ldr	r0, .L3605+4
 	bl	printf
 	ldr	r3, [sp, #4]
 	mov	r0, #-1
-	cbnz	r3, .L3548
+	cbnz	r3, .L3590
 	str	r0, [r6]
-.L3548:
+.L3590:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3549:
-	ldr	r3, .L3563+8
+.L3591:
+	ldr	r3, .L3605+8
 	ldrb	r5, [r3]	@ zero_extendqisi2
 	lsls	r1, r5, #7
 	bl	__aeabi_uidiv
-	ldr	r1, .L3563+12
+	ldr	r1, .L3605+12
 	uxth	r7, r0
 	mov	r10, r0
 	movs	r2, #0
 	mov	r8, r1
-.L3555:
+.L3597:
 	add	r0, r1, r2, lsl #3
 	uxth	r4, r2
 	ldr	r0, [r0, #4]
 	cmp	r0, #0
-	beq	.L3551
+	beq	.L3593
 	ldrh	r0, [r1, r2, lsl #3]
 	cmp	r0, r7
-	bne	.L3551
-.L3552:
+	bne	.L3593
+.L3594:
 	lsls	r5, r5, #7
 	ldr	r3, [sp, #4]
 	lsls	r4, r4, #3
 	smulbb	r5, r5, r7
 	sub	r5, fp, r5
 	uxth	r5, r5
-	cbnz	r3, .L3553
+	cbnz	r3, .L3595
 	add	r2, r8, r4
-	ldr	r1, .L3563+16
+	ldr	r1, .L3605+16
 	ldr	r2, [r2, #4]
 	ldr	r2, [r2, r5, lsl #2]
 	str	r2, [r6]
@@ -22997,25 +23445,25 @@ pm_log2phys:
 	lsls	r1, r1, r0
 	subs	r1, r1, #1
 	ands	r2, r2, r1
-	ldr	r1, .L3563+20
+	ldr	r1, .L3605+20
 	ldrb	r1, [r1]	@ zero_extendqisi2
 	cmp	r2, r1
-	bcc	.L3554
+	bcc	.L3596
 	mov	r2, #-1
 	str	r2, [r6]
-.L3554:
+.L3596:
 	add	r4, r4, r8
 	movw	r2, #32767
 	ldrh	r3, [r4, #2]
 	ubfx	r1, r3, #0, #15
 	cmp	r1, r2
-	beq	.L3558
+	beq	.L3600
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
-.L3558:
+.L3600:
 	movs	r0, #0
-	b	.L3548
-.L3553:
+	b	.L3590
+.L3595:
 	add	r1, r8, r4
 	ldr	r0, [r6]
 	ldr	r2, [r1, #4]
@@ -23024,41 +23472,41 @@ pm_log2phys:
 	mvn	r2, r2, lsl #17
 	mvn	r2, r2, lsr #17
 	strh	r2, [r1, #2]	@ movhi
-	ldr	r2, .L3563+24
+	ldr	r2, .L3605+24
 	strb	r10, [r2]
-	b	.L3554
-.L3551:
+	b	.L3596
+.L3593:
 	adds	r2, r2, #1
 	cmp	r2, #32
-	bne	.L3555
+	bne	.L3597
 	bl	pm_select_ram_region
 	ldrh	r1, [r8, r0, lsl #3]
 	movw	r2, #65535
 	mov	r4, r0
 	cmp	r1, r2
-	beq	.L3556
+	beq	.L3598
 	add	r2, r8, r0, lsl #3
 	ldrsh	r2, [r2, #2]
 	cmp	r2, #0
-	bge	.L3556
+	bge	.L3598
 	bl	pm_flush_id
-.L3556:
-	ldr	r2, .L3563+28
+.L3598:
+	ldr	r2, .L3605+28
 	mov	r1, r4
 	mov	r0, r7
 	strb	r4, [r2]
 	bl	load_l2p_region
-	b	.L3552
-.L3564:
+	b	.L3594
+.L3606:
 	.align	2
-.L3563:
+.L3605:
 	.word	.LANCHOR128
-	.word	.LC209
+	.word	.LC212
 	.word	.LANCHOR131
-	.word	.LANCHOR138
-	.word	.LANCHOR32
+	.word	.LANCHOR135
+	.word	.LANCHOR31
 	.word	.LANCHOR112
-	.word	.LANCHOR139
+	.word	.LANCHOR136
 	.word	.LANCHOR223
 	.size	pm_log2phys, .-pm_log2phys
 	.section	.text.gc_recovery,"ax",%progbits
@@ -23074,24 +23522,24 @@ gc_recovery:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r5, #0
-	ldr	r4, .L3675
+	ldr	r4, .L3717
 	sub	sp, sp, #72
-	ldr	r3, .L3675+4
+	ldr	r3, .L3717+4
 	ldr	fp, [r4]
 	strb	r5, [r3]
-	ldr	r3, .L3675+8
+	ldr	r3, .L3717+8
 	ldrh	r6, [fp, #80]
 	strb	r5, [r3]
 	movw	r3, #65535
 	cmp	r6, r3
-	beq	.L3566
+	beq	.L3608
 	strh	r3, [fp, #130]	@ movhi
 	movs	r0, #1
 	bl	buf_alloc
 	ldrb	r3, [fp, #89]	@ zero_extendqisi2
 	mov	r7, r0
-	ldr	r2, .L3675+12
-	ldr	r5, .L3675+16
+	ldr	r2, .L3717+12
+	ldr	r5, .L3717+16
 	add	r3, fp, r3, lsl #1
 	ldrh	r2, [r2]
 	ldrb	r1, [r5]	@ zero_extendqisi2
@@ -23100,43 +23548,43 @@ gc_recovery:
 	cmp	r1, #2
 	mul	r2, r2, r3
 	str	r2, [sp, #64]
-	beq	.L3567
-	ldr	r3, .L3675+20
+	beq	.L3609
+	ldr	r3, .L3717+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L3567
-	ldr	r3, .L3675+24
+	cbnz	r3, .L3609
+	ldr	r3, .L3717+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L3568
-.L3567:
-	ldr	r3, .L3675+28
+	beq	.L3610
+.L3609:
+	ldr	r3, .L3717+28
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	add	r3, r3, r2
 	orr	r3, r3, r1, lsl #24
-.L3667:
+.L3709:
 	str	r3, [r7, #24]
-.L3569:
+.L3611:
 	movs	r1, #1
 	mov	r0, r7
 	bl	sblk_read_page
 	ldr	r3, [r7, #36]
 	adds	r2, r3, #1
-	beq	.L3570
+	beq	.L3612
 	cmp	r3, #512
-	beq	.L3570
+	beq	.L3612
 	ldr	r2, [r7, #12]
-	ldr	r3, .L3675+32
+	ldr	r3, .L3717+32
 	ldr	r2, [r2]
 	str	r3, [sp, #40]
 	cmp	r2, r3
-	beq	.L3571
-.L3570:
+	beq	.L3613
+.L3612:
 	mov	r0, r7
 	bl	zbuf_free
 	ldr	r2, [r7, #12]
 	ldr	r3, [r7, #4]
-	ldr	r0, .L3675+36
+	ldr	r0, .L3717+36
 	ldr	r1, [r2, #12]
 	str	r1, [sp, #24]
 	ldr	r1, [r2, #8]
@@ -23155,8 +23603,8 @@ gc_recovery:
 	ldr	r3, [r3]
 	ldr	r1, [r7, #24]
 	bl	printf
-.L3674:
-	ldr	r3, .L3675+40
+.L3716:
+	ldr	r3, .L3717+40
 	ldrh	r1, [fp, #80]
 	ldr	r2, [r3]
 	movs	r3, #0
@@ -23165,19 +23613,19 @@ gc_recovery:
 	mov	r4, r3
 	ldrh	r1, [fp, #80]
 	strh	r1, [r2, #130]	@ movhi
-.L3572:
-	ldr	r3, .L3675+40
+.L3614:
+	ldr	r3, .L3717+40
 	ldrh	r0, [fp, #80]
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
-	cbnz	r3, .L3616
+	cbnz	r3, .L3658
 	bl	ftl_dump_write_open_sblk
-.L3616:
+.L3658:
 	mov	r2, r4
 	ldrh	r1, [fp, #80]
 	movw	r5, #65535
-	ldr	r0, .L3675+44
-	ldr	r4, .L3675
+	ldr	r0, .L3717+44
+	ldr	r4, .L3717
 	bl	printf
 	strh	r5, [fp, #80]	@ movhi
 	bl	pm_flush
@@ -23185,21 +23633,21 @@ gc_recovery:
 	ldr	r3, [r4]
 	ldrh	r3, [r3, #130]
 	cmp	r3, r5
-	beq	.L3617
-	ldr	r2, .L3675+48
+	beq	.L3659
+	ldr	r2, .L3717+48
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bhi	.L3618
+	bhi	.L3660
 	movw	r2, #517
-	ldr	r1, .L3675+52
-	ldr	r0, .L3675+56
+	ldr	r1, .L3717+52
+	ldr	r0, .L3717+56
 	bl	printf
-.L3618:
+.L3660:
 	ldr	r3, [r4]
 	ldrh	r0, [r3, #130]
 	bl	ftl_free_sblk
-.L3617:
-	ldr	r3, .L3675+60
+.L3659:
+	ldr	r3, .L3717+60
 	movs	r0, #0
 	ldr	r2, [r3]
 	movw	r3, #65535
@@ -23207,34 +23655,34 @@ gc_recovery:
 	ldr	r2, [r4]
 	strh	r3, [r2, #130]	@ movhi
 	bl	ftl_info_flush
-.L3565:
+.L3607:
 	add	sp, sp, #72
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3568:
+.L3610:
 	cmp	r1, #3
-	bne	.L3569
-	ldr	r3, .L3675+64
+	bne	.L3611
+	ldr	r3, .L3717+64
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	add	r3, r3, r2
 	orr	r3, r3, #50331648
-	b	.L3667
-.L3571:
-	ldr	r3, .L3675+68
-	ldr	r5, .L3675+28
-	ldr	r6, .L3675+72
+	b	.L3709
+.L3613:
+	ldr	r3, .L3717+68
+	ldr	r5, .L3717+28
+	ldr	r6, .L3717+72
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	str	r3, [sp, #44]
-	ldr	r8, .L3675+88
+	ldr	r8, .L3717+88
 	cmp	r2, #2
-	bne	.L3573
+	bne	.L3615
 	ldr	r3, [sp, #36]
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	cmp	r2, #3
-	bne	.L3573
+	bne	.L3615
 	ldrh	r2, [r5]
-	ldr	r10, .L3675+80
+	ldr	r10, .L3717+80
 	ldr	r0, [r8]
 	lsls	r1, r2, #2
 	ldrb	r2, [r6]	@ zero_extendqisi2
@@ -23246,67 +23694,67 @@ gc_recovery:
 	uxth	r2, r2
 	add	r0, r0, ip, lsl #2
 	bl	ftl_memcpy
-	ldr	r2, .L3675+20
+	ldr	r2, .L3717+20
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbnz	r2, .L3574
-	ldr	r2, .L3675+24
+	cbnz	r2, .L3616
+	ldr	r2, .L3717+24
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbz	r2, .L3575
-.L3574:
+	cbz	r2, .L3617
+.L3616:
 	ldr	r2, [r7, #24]
 	subs	r2, r2, #1
-.L3668:
+.L3710:
 	str	r2, [r7, #24]
 	movs	r1, #1
 	mov	r0, r7
 	bl	sblk_read_page
 	ldr	r2, [r7, #36]
 	adds	r3, r2, #1
-	beq	.L3577
+	beq	.L3619
 	cmp	r2, #512
-	beq	.L3577
+	beq	.L3619
 	ldr	r2, [r7, #12]
 	ldr	r3, [sp, #40]
 	ldr	r2, [r2]
 	cmp	r2, r3
-	beq	.L3578
-.L3577:
+	beq	.L3620
+.L3619:
 	mov	r0, r7
 	bl	zbuf_free
-	b	.L3674
-.L3575:
-	ldr	r1, .L3675+64
+	b	.L3716
+.L3617:
+	ldr	r1, .L3717+64
 	ldr	r2, [sp, #64]
 	ldrh	r1, [r1]
 	subs	r2, r2, #1
 	add	r2, r2, r1
 	orr	r2, r2, #33554432
-	b	.L3668
-.L3578:
+	b	.L3710
+.L3620:
 	ldrh	r2, [r10]
-.L3669:
+.L3711:
 	ldr	r1, [r7, #4]
 	ldr	r0, [r8]
 	bl	ftl_memcpy
 	ldrh	r3, [r5]
 	ldrb	r2, [r6]	@ zero_extendqisi2
-	ldr	r10, .L3675+92
+	ldr	r10, .L3717+92
 	muls	r2, r3, r2
-	ldr	r3, .L3675+76
+	ldr	r3, .L3717+76
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r2, asr #6
 	lsl	r2, r2, #2
-	bge	.L3580
+	bge	.L3622
 	movs	r1, #0
 	ldr	r0, [r10]
 	bl	ftl_memset
 	ldr	r3, [sp, #44]
 	ldrb	r8, [r3]	@ zero_extendqisi2
 	cmp	r8, #1
-	bne	.L3621
+	bne	.L3663
 	ldrh	r1, [r5]
 	ldrb	r3, [r6]	@ zero_extendqisi2
-	ldr	r2, .L3675+80
+	ldr	r2, .L3717+80
 	ldr	r0, [r10]
 	muls	r3, r1, r3
 	ldrh	r4, [r2]
@@ -23317,222 +23765,222 @@ gc_recovery:
 	mov	r2, r4
 	bl	ftl_memcpy
 	str	r8, [sp, #44]
-.L3581:
-	ldr	r3, .L3675+64
+.L3623:
+	ldr	r3, .L3717+64
 	ldrh	r3, [r3]
 	str	r3, [sp, #40]
 	ldr	r3, [sp, #36]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #2
 	str	r3, [sp, #36]
-	bne	.L3582
-	ldr	r3, .L3675+84
+	bne	.L3624
+	ldr	r3, .L3717+84
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L3583
-.L3582:
-	ldr	r3, .L3675+20
+	cbz	r3, .L3625
+.L3624:
+	ldr	r3, .L3717+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L3584
-.L3583:
+	cbz	r3, .L3626
+.L3625:
 	ldr	r3, [sp, #36]
 	ldr	r2, [sp, #40]
 	muls	r3, r2, r3
 	str	r3, [sp, #40]
 	movs	r3, #1
 	str	r3, [sp, #36]
-.L3584:
+.L3626:
 	movs	r5, #0
 	str	r5, [sp, #48]
-.L3585:
+.L3627:
 	ldr	r3, [sp, #40]
 	cmp	r3, r5
-	bls	.L3598
+	bls	.L3640
 	add	r3, r5, r5, lsl #1
 	mov	r10, #0
 	subs	r3, r3, #1
 	str	r3, [sp, #52]
-	b	.L3599
-.L3573:
+	b	.L3641
+.L3615:
 	ldrh	r1, [r5]
 	ldrb	r2, [r6]	@ zero_extendqisi2
 	muls	r2, r1, r2
 	lsls	r2, r2, #2
-	b	.L3669
-.L3580:
+	b	.L3711
+.L3622:
 	ldr	r1, [r7, #4]
 	ldr	r0, [r10]
 	add	r1, r1, r2
 	bl	ftl_memcpy
 	movs	r3, #0
-.L3670:
+.L3712:
 	str	r3, [sp, #44]
 	movs	r4, #0
-	b	.L3581
-.L3621:
+	b	.L3623
+.L3663:
 	movs	r3, #1
-	b	.L3670
-.L3676:
+	b	.L3712
+.L3718:
 	.align	2
-.L3675:
-	.word	.LANCHOR10
-	.word	.LANCHOR85
-	.word	.LANCHOR159
+.L3717:
+	.word	.LANCHOR12
+	.word	.LANCHOR84
+	.word	.LANCHOR156
 	.word	.LANCHOR111
-	.word	.LANCHOR79
+	.word	.LANCHOR78
+	.word	.LANCHOR35
 	.word	.LANCHOR36
-	.word	.LANCHOR37
-	.word	.LANCHOR86
+	.word	.LANCHOR85
 	.word	-178307901
-	.word	.LC210
-	.word	.LANCHOR9
-	.word	.LC212
-	.word	.LANCHOR6
+	.word	.LC213
+	.word	.LANCHOR11
+	.word	.LC215
+	.word	.LANCHOR8
 	.word	.LANCHOR225
 	.word	.LC0
 	.word	.LANCHOR110
-	.word	.LANCHOR95
+	.word	.LANCHOR94
 	.word	.LANCHOR224
-	.word	.LANCHOR80
+	.word	.LANCHOR79
 	.word	.LANCHOR131
 	.word	.LANCHOR221
-	.word	.LANCHOR81
-	.word	.LANCHOR162
-	.word	.LANCHOR163
-.L3594:
+	.word	.LANCHOR80
+	.word	.LANCHOR159
+	.word	.LANCHOR160
+.L3636:
 	ldr	r3, [sp, #56]
-	ldr	r2, .L3677
+	ldr	r2, .L3719
 	ldrh	r3, [r3, #96]
 	ldrh	r2, [r2]
 	muls	r3, r2, r3
-	ldr	r2, .L3677+4
+	ldr	r2, .L3719+4
 	ldrb	r1, [r2]	@ zero_extendqisi2
 	str	r3, [sp, #64]
 	cmp	r1, #2
-	beq	.L3586
-	ldr	r2, .L3677+8
+	beq	.L3628
+	ldr	r2, .L3719+8
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, #0
-	beq	.L3587
-.L3586:
+	beq	.L3629
+.L3628:
 	subs	r2, r5, #1
 	add	r3, r3, r2
 	add	r3, r3, r8
 	orr	r3, r3, r1, lsl #24
-.L3671:
+.L3713:
 	str	r3, [r7, #24]
 	movs	r1, #1
 	mov	r0, r7
 	bl	sblk_read_page
 	ldr	r3, [sp, #44]
-	cbz	r3, .L3591
-	ldr	r3, .L3677+12
+	cbz	r3, .L3633
+	ldr	r3, .L3719+12
 	ldr	r3, [r3]
 	ldr	r2, [r3, r6]
-	cbnz	r2, .L3591
+	cbnz	r2, .L3633
 	ldr	r2, [r7, #12]
 	ldr	r2, [r2, #8]
 	str	r2, [r3, r6]
-.L3591:
-	ldr	r3, .L3677+16
+.L3633:
+	ldr	r3, .L3719+16
 	ldr	r2, [r7, #12]
 	ldr	r3, [r3]
 	ldr	r1, [r2, #4]
 	ldr	r3, [r3, r6]
 	cmp	r3, r1
-	bne	.L3592
-	ldr	r0, .L3677+12
+	bne	.L3634
+	ldr	r0, .L3719+12
 	ldr	r0, [r0]
 	ldr	ip, [r0, r6]
 	ldr	r0, [r2, #8]
 	cmp	ip, r0
-	beq	.L3593
-.L3592:
+	beq	.L3635
+.L3634:
 	ldr	r0, [r2, #12]
 	str	r0, [sp, #16]
 	ldr	r0, [r2, #8]
 	str	r1, [sp, #8]
 	str	r0, [sp, #12]
 	ldr	r2, [r2]
-	ldr	r0, .L3677+20
+	ldr	r0, .L3719+20
 	str	r2, [sp, #4]
-	ldr	r2, .L3677+12
+	ldr	r2, .L3719+12
 	ldr	r2, [r2]
 	ldr	r2, [r2, r6]
 	str	r2, [sp]
 	ldr	r2, [r7, #36]
 	ldr	r1, [r7, #24]
 	bl	printf
-	ldr	r3, .L3677+16
+	ldr	r3, .L3719+16
 	ldr	r3, [r3]
 	ldr	r3, [r3, r6]
 	adds	r3, r3, #1
-	beq	.L3593
+	beq	.L3635
 	mov	r0, r7
 	bl	zbuf_free
-	ldr	r3, .L3677+24
+	ldr	r3, .L3719+24
 	movs	r1, #0
 	ldrh	r2, [fp, #80]
 	ldr	r3, [r3]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L3677+28
+	ldr	r3, .L3719+28
 	ldrh	r2, [fp, #80]
 	ldr	r3, [r3]
 	strh	r2, [r3, #130]	@ movhi
-	b	.L3572
-.L3587:
+	b	.L3614
+.L3629:
 	cmp	r1, #3
-	bne	.L3589
-	ldr	r2, .L3677+32
+	bne	.L3631
+	ldr	r2, .L3719+32
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbz	r2, .L3590
+	cbz	r2, .L3632
 	ldr	r2, [sp, #52]
 	add	r3, r3, r2
 	add	r3, r3, r8
 	orr	r3, r3, #50331648
-	b	.L3671
-.L3590:
+	b	.L3713
+.L3632:
 	add	r3, r3, r5
 	orr	r3, r3, r8, lsl #24
-	b	.L3671
-.L3589:
+	b	.L3713
+.L3631:
 	add	r3, r3, r5
-	b	.L3671
-.L3593:
+	b	.L3713
+.L3635:
 	ldr	r3, [sp, #48]
 	add	r8, r8, #1
 	adds	r6, r6, #4
 	adds	r3, r3, #1
 	str	r3, [sp, #48]
-.L3596:
+.L3638:
 	ldr	r3, [sp, #36]
 	cmp	r3, r8
-	bcs	.L3594
+	bcs	.L3636
 	add	r10, r10, #1
-.L3599:
+.L3641:
 	ldrb	r3, [fp, #89]	@ zero_extendqisi2
 	cmp	r10, r3
-	bge	.L3595
+	bge	.L3637
 	ldr	r3, [sp, #48]
 	mov	r8, #1
 	lsls	r6, r3, #2
 	add	r3, fp, r10, lsl #1
 	str	r3, [sp, #56]
-	b	.L3596
-.L3595:
-	ldr	r3, .L3677+36
+	b	.L3638
+.L3637:
+	ldr	r3, .L3719+36
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L3597
+	cbz	r3, .L3639
 	adds	r5, r5, #1
-.L3597:
+.L3639:
 	adds	r5, r5, #1
-	b	.L3585
-.L3598:
+	b	.L3627
+.L3640:
 	mov	r0, r7
 	movs	r4, #0
 	bl	zbuf_free
-	ldr	r3, .L3677+24
+	ldr	r3, .L3719+24
 	mov	r10, r4
-	ldr	r0, .L3677+40
+	ldr	r0, .L3719+40
 	mov	r8, r4
 	ldrh	r1, [fp, #80]
 	ldr	r2, [r3]
@@ -23540,23 +23988,23 @@ gc_recovery:
 	ldrb	r3, [fp, #89]	@ zero_extendqisi2
 	smulbb	r3, r3, r0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
-.L3600:
+.L3642:
 	ldr	r3, [sp, #40]
 	cmp	r3, r10
-	bls	.L3614
+	bls	.L3656
 	add	r2, r10, r10, lsl #1
 	movs	r7, #0
 	subs	r3, r2, #1
 	str	r3, [sp, #52]
-	b	.L3615
-.L3610:
-	ldr	r3, .L3677+16
+	b	.L3657
+.L3652:
+	ldr	r3, .L3719+16
 	ldr	r2, [r3]
 	ldr	r3, [r2, r8, lsl #2]
 	str	r3, [sp, #44]
 	adds	r3, r3, #1
-	beq	.L3601
-	ldr	r3, .L3677+12
+	beq	.L3643
+	ldr	r3, .L3719+12
 	ldr	r0, [sp, #44]
 	ldr	r2, [r3]
 	ldr	r3, [r2, r8, lsl #2]
@@ -23564,44 +24012,44 @@ gc_recovery:
 	bl	lpa_hash_get_ppa
 	str	r0, [sp, #68]
 	adds	r0, r0, #1
-	bne	.L3602
+	bne	.L3644
 	movs	r2, #0
 	add	r1, sp, #68
 	ldr	r0, [sp, #44]
 	bl	pm_log2phys
-.L3602:
+.L3644:
 	ldr	r3, [sp, #56]
-	ldr	r1, .L3677
+	ldr	r1, .L3719
 	ldrh	r2, [r3, #96]
 	ldrh	r1, [r1]
 	muls	r1, r2, r1
-	ldr	r2, .L3677+4
+	ldr	r2, .L3719+4
 	ldrb	r0, [r2]	@ zero_extendqisi2
 	cmp	r0, #2
-	beq	.L3603
-	ldr	r2, .L3677+8
+	beq	.L3645
+	ldr	r2, .L3719+8
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, #0
-	beq	.L3604
-.L3603:
+	beq	.L3646
+.L3645:
 	add	r2, r10, #-1
 	add	r2, r2, r1
 	add	r2, r2, r5
 	orr	r2, r2, r0, lsl #24
-.L3673:
+.L3715:
 	str	r2, [sp, #64]
-.L3605:
-	ldr	r2, .L3677+44
+.L3647:
+	ldr	r2, .L3719+44
 	ldr	r3, [sp, #48]
 	ldrh	r1, [r2]
-	ldr	r2, .L3677+48
+	ldr	r2, .L3719+48
 	ldrb	r0, [r2]	@ zero_extendqisi2
 	movs	r2, #1
 	lsr	r6, r3, r1
 	str	r2, [sp, #60]
 	rsb	r0, r0, #24
 	subs	r0, r0, r1
-	ldr	r1, .L3677+52
+	ldr	r1, .L3719+52
 	lsl	r0, r2, r0
 	subs	r0, r0, #1
 	ldrb	r1, [r1]	@ zero_extendqisi2
@@ -23612,111 +24060,111 @@ gc_recovery:
 	ldr	r3, [sp, #48]
 	ldr	r2, [sp, #60]
 	cmp	r3, r1
-	bne	.L3608
+	bne	.L3650
 	add	r1, sp, #64
 	ldr	r0, [sp, #44]
 	bl	pm_log2phys
 	uxth	r0, r6
 	adds	r4, r4, #1
 	bl	ftl_vpn_decrement
-.L3609:
-	ldr	r2, .L3677+56
+.L3651:
+	ldr	r2, .L3719+56
 	uxth	r6, r6
 	add	r8, r8, #1
 	ldr	r2, [r2]
 	add	r2, r2, r6, lsl #2
 	ldrb	r2, [r2, #2]	@ zero_extendqisi2
 	ands	r2, r2, #224
-	bne	.L3601
-	ldr	r1, .L3677+24
+	bne	.L3643
+	ldr	r1, .L3719+24
 	ldr	r1, [r1]
 	ldrh	r0, [r1, r6, lsl #1]
-	cbz	r0, .L3601
+	cbz	r0, .L3643
 	strh	r2, [r1, r6, lsl #1]	@ movhi
-.L3601:
+.L3643:
 	adds	r5, r5, #1
-.L3612:
+.L3654:
 	ldr	r3, [sp, #36]
 	cmp	r3, r5
-	bcs	.L3610
+	bcs	.L3652
 	adds	r7, r7, #1
-.L3615:
+.L3657:
 	ldrb	r2, [fp, #89]	@ zero_extendqisi2
 	cmp	r7, r2
-	bge	.L3611
+	bge	.L3653
 	add	r3, fp, r7, lsl #1
 	movs	r5, #1
 	str	r3, [sp, #56]
-	b	.L3612
-.L3604:
+	b	.L3654
+.L3646:
 	cmp	r0, #3
-	bne	.L3606
-	ldr	r2, .L3677+32
+	bne	.L3648
+	ldr	r2, .L3719+32
 	lsls	r0, r5, #24
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbz	r2, .L3607
+	cbz	r2, .L3649
 	ldr	r3, [sp, #52]
 	adds	r2, r1, r3
 	add	r2, r2, r5
-.L3672:
+.L3714:
 	orrs	r2, r2, r0
-	b	.L3673
-.L3607:
+	b	.L3715
+.L3649:
 	add	r2, r10, r1
-	b	.L3672
-.L3606:
+	b	.L3714
+.L3648:
 	add	r1, r1, r10
 	str	r1, [sp, #64]
-	b	.L3605
-.L3608:
+	b	.L3647
+.L3650:
 	ldr	r2, [sp, #64]
 	cmp	r1, r2
 	it	eq
 	addeq	r4, r4, #1
-	b	.L3609
-.L3611:
-	ldr	r2, .L3677+36
+	b	.L3651
+.L3653:
+	ldr	r2, .L3719+36
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbz	r2, .L3613
+	cbz	r2, .L3655
 	add	r10, r10, #1
-.L3613:
+.L3655:
 	add	r10, r10, #1
-	b	.L3600
-.L3614:
-	ldr	r3, .L3677+24
+	b	.L3642
+.L3656:
+	ldr	r3, .L3719+24
 	ldrh	r2, [fp, #80]
 	ldr	r3, [r3]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
 	ldrh	r0, [fp, #80]
 	bl	zftl_insert_data_list
-	b	.L3572
-.L3678:
+	b	.L3614
+.L3720:
 	.align	2
-.L3677:
+.L3719:
 	.word	.LANCHOR111
-	.word	.LANCHOR79
+	.word	.LANCHOR78
+	.word	.LANCHOR35
+	.word	.LANCHOR160
+	.word	.LANCHOR159
+	.word	.LC214
+	.word	.LANCHOR11
+	.word	.LANCHOR12
 	.word	.LANCHOR36
-	.word	.LANCHOR163
-	.word	.LANCHOR162
-	.word	.LC211
-	.word	.LANCHOR9
-	.word	.LANCHOR10
-	.word	.LANCHOR37
-	.word	.LANCHOR81
-	.word	.LANCHOR86
+	.word	.LANCHOR80
+	.word	.LANCHOR85
+	.word	.LANCHOR74
+	.word	.LANCHOR31
 	.word	.LANCHOR75
-	.word	.LANCHOR32
-	.word	.LANCHOR76
-	.word	.LANCHOR7
-.L3566:
+	.word	.LANCHOR9
+.L3608:
 	ldrh	r3, [fp, #130]
 	cmp	r3, r6
-	beq	.L3565
-	ldr	r7, .L3679
+	beq	.L3607
+	ldr	r7, .L3721
 	ldr	r2, [r7]
 	ldrh	r2, [r2, #126]
 	cmp	r2, r3
-	bne	.L3620
+	bne	.L3662
 	bl	pm_flush
 	ldr	r3, [r4]
 	ldrh	r0, [r3, #130]
@@ -23725,14 +24173,14 @@ gc_recovery:
 	mov	r0, r5
 	strh	r6, [r3, #126]	@ movhi
 	bl	ftl_info_flush
-.L3620:
+.L3662:
 	ldr	r3, [r4]
 	movw	r2, #65535
 	strh	r2, [r3, #130]	@ movhi
-	b	.L3565
-.L3680:
+	b	.L3607
+.L3722:
 	.align	2
-.L3679:
+.L3721:
 	.word	.LANCHOR110
 	.size	gc_recovery, .-gc_recovery
 	.section	.text.gc_update_l2p_map_new,"ax",%progbits
@@ -23746,42 +24194,42 @@ gc_recovery:
 gc_update_l2p_map_new:
 	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L3715
+	ldr	r3, .L3757
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #32
-	ldr	r2, .L3715+4
+	ldr	r2, .L3757+4
 	ldr	r4, [r3]
 	ldrh	r2, [r2]
-	ldr	r7, .L3715+8
+	ldr	r7, .L3757+8
 	ldrb	r1, [r4, #89]	@ zero_extendqisi2
 	str	r3, [sp, #20]
 	muls	r2, r1, r2
 	str	r2, [sp, #4]
 	ldr	r2, [r7]
 	tst	r2, #256
-	beq	.L3682
+	beq	.L3724
 	ldrh	r1, [r4, #80]
-	ldr	r0, .L3715+12
+	ldr	r0, .L3757+12
 	bl	printf
-.L3682:
-	ldr	r3, .L3715+16
+.L3724:
+	ldr	r3, .L3757+16
 	movs	r6, #0
 	ldr	r0, [sp, #4]
 	mov	r5, r6
 	ldrh	r1, [r4, #80]
 	ldr	r2, [r3]
-	ldr	r3, .L3715+20
+	ldr	r3, .L3757+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	subs	r3, r0, r3
 	strh	r3, [r2, r1, lsl #1]	@ movhi
-.L3683:
+.L3725:
 	ldr	r3, [sp, #4]
 	cmp	r5, r3
-	bne	.L3692
+	bne	.L3734
 	ldr	r3, [r7]
-	ldr	r5, .L3715+16
+	ldr	r5, .L3757+16
 	tst	r3, #256
-	beq	.L3693
+	beq	.L3735
 	ldr	r3, [sp, #20]
 	ldrh	r0, [r4, #80]
 	ldr	r2, [r5]
@@ -23789,19 +24237,19 @@ gc_update_l2p_map_new:
 	mov	r3, r6
 	ldrh	r2, [r2, r0, lsl #1]
 	ldrh	r1, [r1, #80]
-	ldr	r0, .L3715+24
+	ldr	r0, .L3757+24
 	bl	printf
-.L3693:
+.L3735:
 	ldrh	r2, [r4, #80]
 	ldr	r3, [r5]
 	ldrh	r3, [r3, r2, lsl #1]
 	cmp	r6, r3
-	beq	.L3694
+	beq	.L3736
 	movw	r2, #898
-	ldr	r1, .L3715+28
-	ldr	r0, .L3715+32
+	ldr	r1, .L3757+28
+	ldr	r0, .L3757+32
 	bl	printf
-.L3694:
+.L3736:
 	ldrh	r2, [r4, #80]
 	ldr	r3, [r5]
 	strh	r6, [r3, r2, lsl #1]	@ movhi
@@ -23810,14 +24258,14 @@ gc_update_l2p_map_new:
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3692:
-	ldr	r3, .L3715+36
+.L3734:
+	ldr	r3, .L3757+36
 	lsl	r8, r5, #2
 	ldr	r3, [r3]
 	ldr	r10, [r3, r5, lsl #2]
 	cmp	r10, #-1
-	beq	.L3684
-	ldr	r3, .L3715+40
+	beq	.L3726
+	ldr	r3, .L3757+40
 	mov	r0, r10
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	lsls	r1, r1, #7
@@ -23826,21 +24274,21 @@ gc_update_l2p_map_new:
 	str	r3, [sp, #16]
 	ldr	r3, [r7]
 	lsls	r1, r3, #23
-	bpl	.L3685
+	bpl	.L3727
 	mov	r3, r5
 	mov	r2, r10
 	ldr	r1, [sp, #16]
-	ldr	r0, .L3715+44
+	ldr	r0, .L3757+44
 	bl	printf
-.L3685:
-	ldr	fp, .L3715+36
+.L3727:
+	ldr	fp, .L3757+36
 	str	r5, [sp, #12]
-.L3691:
+.L3733:
 	ldr	r3, [fp]
 	ldr	r10, [r3, r8]
 	cmp	r10, #-1
-	beq	.L3686
-	ldr	r3, .L3715+40
+	beq	.L3728
+	ldr	r3, .L3757+40
 	mov	r0, r10
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	lsls	r1, r1, #7
@@ -23848,8 +24296,8 @@ gc_update_l2p_map_new:
 	ldr	r3, [sp, #16]
 	uxth	r0, r0
 	cmp	r3, r0
-	bne	.L3686
-	ldr	r3, .L3715+48
+	bne	.L3728
+	ldr	r3, .L3757+48
 	mov	r0, r10
 	ldr	r3, [r3]
 	ldr	r3, [r3, r8]
@@ -23857,17 +24305,17 @@ gc_update_l2p_map_new:
 	bl	lpa_hash_get_ppa
 	str	r0, [sp, #28]
 	adds	r0, r0, #1
-	bne	.L3687
+	bne	.L3729
 	movs	r2, #0
 	add	r1, sp, #28
 	mov	r0, r10
 	bl	pm_log2phys
-.L3687:
+.L3729:
 	ldr	r3, [sp, #28]
 	ldr	r2, [sp, #8]
 	cmp	r2, r3
-	bne	.L3688
-	ldr	r3, .L3715+52
+	bne	.L3730
+	ldr	r3, .L3757+52
 	add	r1, sp, #32
 	movs	r2, #1
 	mov	r0, r10
@@ -23876,9 +24324,9 @@ gc_update_l2p_map_new:
 	ldr	r3, [r3, r8]
 	str	r3, [r1, #-8]!
 	bl	pm_log2phys
-	ldr	r3, .L3715+56
+	ldr	r3, .L3757+56
 	ldrh	r2, [r3]
-	ldr	r3, .L3715+60
+	ldr	r3, .L3757+60
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	rsb	r3, r3, #24
 	subs	r0, r3, r2
@@ -23887,17 +24335,17 @@ gc_update_l2p_map_new:
 	ldr	r0, [sp, #8]
 	subs	r3, r3, #1
 	lsrs	r0, r0, r2
-	ldr	r2, .L3715+64
+	ldr	r2, .L3757+64
 	ands	r0, r0, r3
 	ldrb	r1, [r2]	@ zero_extendqisi2
 	bl	__aeabi_uidiv
 	uxth	r0, r0
-.L3714:
+.L3756:
 	bl	ftl_vpn_decrement
 	ldr	r3, [fp]
 	mov	r2, #-1
 	str	r2, [r3, r8]
-.L3686:
+.L3728:
 	ldr	r3, [sp, #12]
 	add	r8, r8, #4
 	adds	r3, r3, #1
@@ -23905,42 +24353,42 @@ gc_update_l2p_map_new:
 	ldr	r2, [sp, #12]
 	ldr	r3, [sp, #4]
 	cmp	r3, r2
-	bne	.L3691
-.L3684:
+	bne	.L3733
+.L3726:
 	adds	r5, r5, #1
-	b	.L3683
-.L3688:
+	b	.L3725
+.L3730:
 	ldr	r2, [r7]
 	lsls	r2, r2, #23
-	bpl	.L3690
+	bpl	.L3732
 	ldr	r2, [sp, #8]
 	mov	r1, r10
-	ldr	r0, .L3715+68
+	ldr	r0, .L3757+68
 	bl	printf
-.L3690:
+.L3732:
 	ldrh	r0, [r4, #80]
-	b	.L3714
-.L3716:
+	b	.L3756
+.L3758:
 	.align	2
-.L3715:
-	.word	.LANCHOR10
-	.word	.LANCHOR86
-	.word	.LANCHOR14
-	.word	.LC213
-	.word	.LANCHOR9
-	.word	.LANCHOR224
+.L3757:
+	.word	.LANCHOR12
+	.word	.LANCHOR85
+	.word	.LANCHOR19
 	.word	.LC216
+	.word	.LANCHOR11
+	.word	.LANCHOR224
+	.word	.LC219
 	.word	.LANCHOR226
 	.word	.LC0
-	.word	.LANCHOR162
+	.word	.LANCHOR159
 	.word	.LANCHOR131
-	.word	.LC214
-	.word	.LANCHOR163
-	.word	.LANCHOR164
+	.word	.LC217
+	.word	.LANCHOR160
+	.word	.LANCHOR161
+	.word	.LANCHOR74
+	.word	.LANCHOR31
 	.word	.LANCHOR75
-	.word	.LANCHOR32
-	.word	.LANCHOR76
-	.word	.LC215
+	.word	.LC218
 	.size	gc_update_l2p_map_new, .-gc_update_l2p_map_new
 	.section	.text.gc_scan_src_blk_one_page,"ax",%progbits
 	.align	1
@@ -23955,34 +24403,34 @@ gc_scan_src_blk_one_page:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r1, #0
-	ldr	r4, .L3746
+	ldr	r4, .L3788
 	mov	r0, r1
 	movw	r5, #65535
-	ldr	r6, .L3746+4
+	ldr	r6, .L3788+4
 	ldrb	r3, [r4, #4]	@ zero_extendqisi2
 	ldrb	ip, [r6]	@ zero_extendqisi2
 	add	r2, r4, r3, lsl #1
 	ldrh	r7, [r2, #36]
 	ldrh	r2, [r4, #2]
-.L3718:
+.L3760:
 	cmp	r7, r5
-	beq	.L3720
-	cbz	r0, .L3721
+	beq	.L3762
+	cbz	r0, .L3763
 	strh	r2, [r4, #2]	@ movhi
-.L3721:
-	cbz	r1, .L3722
+.L3763:
+	cbz	r1, .L3764
 	strb	r3, [r4, #4]
-.L3722:
-	ldr	r8, .L3746+24
+.L3764:
+	ldr	r8, .L3788+24
 	movs	r0, #1
-	ldr	r10, .L3746+28
+	ldr	r10, .L3788+28
 	mov	fp, #1
 	bl	buf_alloc
 	mov	r5, r0
-.L3723:
+.L3765:
 	ldrb	r1, [r4, #6]	@ zero_extendqisi2
 	cmp	fp, r1
-	ble	.L3733
+	ble	.L3775
 	mov	r0, r5
 	bl	zbuf_free
 	ldrb	r3, [r4, #4]	@ zero_extendqisi2
@@ -23991,17 +24439,17 @@ gc_scan_src_blk_one_page:
 	uxtb	r3, r3
 	cmp	r2, r3
 	strb	r3, [r4, #4]
-	bne	.L3717
+	bne	.L3759
 	ldrh	r3, [r4, #2]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [r4, #4]
-.L3717:
+.L3759:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3720:
+.L3762:
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, ip
@@ -24015,30 +24463,30 @@ gc_scan_src_blk_one_page:
 	it	eq
 	moveq	r0, #1
 	movs	r1, #1
-	b	.L3718
-.L3733:
+	b	.L3760
+.L3775:
 	ldrh	r3, [r8]
 	cmp	r1, #2
 	mul	r2, r7, r3
-	bne	.L3724
+	bne	.L3766
 	ldrh	r3, [r4, #2]
 	add	r3, r2, r3, lsl #1
 	subs	r3, r3, #1
-.L3745:
-	ldr	r2, .L3746+8
+.L3787:
+	ldr	r2, .L3788+8
 	add	r3, r3, fp
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	orr	r3, r3, r2, lsl #24
-.L3744:
+.L3786:
 	str	r3, [r5, #24]
 	movs	r1, #1
 	mov	r0, r5
 	bl	sblk_read_page
 	ldr	r3, [r5, #36]
 	adds	r2, r3, #1
-	beq	.L3730
+	beq	.L3772
 	cmp	r3, #512
-	beq	.L3730
+	beq	.L3772
 	ldr	r3, [r5, #12]
 	ldr	r3, [r3, #4]
 	mov	r0, r3
@@ -24047,66 +24495,66 @@ gc_scan_src_blk_one_page:
 	str	r0, [sp, #12]
 	adds	r0, r0, #1
 	ldr	r3, [sp, #4]
-	bne	.L3732
-	ldr	r2, .L3746+12
+	bne	.L3774
+	ldr	r2, .L3788+12
 	ldr	r2, [r2]
 	cmp	r3, r2
-	bcs	.L3732
+	bcs	.L3774
 	movs	r2, #0
 	add	r1, sp, #12
 	mov	r0, r3
 	bl	pm_log2phys
-.L3732:
+.L3774:
 	ldr	r2, [r5, #24]
 	ldr	r3, [sp, #12]
 	cmp	r2, r3
-	bne	.L3730
-	ldr	r1, .L3746+16
+	bne	.L3772
+	ldr	r1, .L3788+16
 	ldrh	r3, [r4, #20]
 	ldr	r1, [r1]
 	str	r2, [r1, r3, lsl #2]
 	adds	r3, r3, #1
 	strh	r3, [r4, #20]	@ movhi
-.L3730:
+.L3772:
 	ldrh	r3, [r4, #22]
 	add	fp, fp, #1
 	adds	r3, r3, #1
 	strh	r3, [r4, #22]	@ movhi
-	b	.L3723
-.L3724:
+	b	.L3765
+.L3766:
 	cmp	r1, #3
-	bne	.L3726
+	bne	.L3768
 	ldrb	r3, [r10]	@ zero_extendqisi2
-	cbnz	r3, .L3727
-	ldr	r3, .L3746+20
+	cbnz	r3, .L3769
+	ldr	r3, .L3788+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L3728
-.L3727:
+	cbz	r3, .L3770
+.L3769:
 	ldrh	r3, [r4, #2]
 	add	r3, r3, r3, lsl #1
 	subs	r3, r3, #1
 	add	r3, r3, r2
-	b	.L3745
-.L3728:
+	b	.L3787
+.L3770:
 	ldrh	r3, [r4, #2]
 	add	r3, r3, r2
 	orr	r3, r3, fp, lsl #24
-	b	.L3744
-.L3726:
+	b	.L3786
+.L3768:
 	ldrh	r3, [r4, #2]
 	add	r3, r3, r2
-	b	.L3744
-.L3747:
+	b	.L3786
+.L3789:
 	.align	2
-.L3746:
-	.word	.LANCHOR71
-	.word	.LANCHOR80
+.L3788:
+	.word	.LANCHOR70
 	.word	.LANCHOR79
+	.word	.LANCHOR78
 	.word	.LANCHOR128
-	.word	.LANCHOR77
-	.word	.LANCHOR37
-	.word	.LANCHOR111
+	.word	.LANCHOR76
 	.word	.LANCHOR36
+	.word	.LANCHOR111
+	.word	.LANCHOR35
 	.size	gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page
 	.section	.text.gc_scan_src_blk,"ax",%progbits
 	.align	1
@@ -24121,101 +24569,101 @@ gc_scan_src_blk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movw	r3, #65535
-	ldr	r4, .L3813
+	ldr	r4, .L3855
 	sub	sp, sp, #32
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	bne	.L3749
-	mov	r2, #1504
-	ldr	r1, .L3813+4
-	ldr	r0, .L3813+8
+	bne	.L3791
+	movw	r2, #1505
+	ldr	r1, .L3855+4
+	ldr	r0, .L3855+8
 	bl	printf
-.L3749:
+.L3791:
 	ldrh	r1, [r4]
 	movw	r3, #65535
 	cmp	r1, r3
-	beq	.L3781
-	ldr	r3, .L3813+12
+	beq	.L3823
+	ldr	r3, .L3855+12
 	ldr	r3, [r3]
 	lsls	r0, r3, #23
-	bpl	.L3751
-	ldr	r3, .L3813+16
-	ldr	r0, .L3813+20
+	bpl	.L3793
+	ldr	r3, .L3855+16
+	ldr	r0, .L3855+20
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r1, lsl #1]
 	bl	printf
-.L3751:
-	ldr	r1, .L3813+24
+.L3793:
+	ldr	r1, .L3855+24
 	ldrh	r0, [r4]
 	bl	ftl_get_blk_list_in_sblk
 	uxtb	r0, r0
 	strb	r0, [r4, #5]
-	cbnz	r0, .L3752
+	cbnz	r0, .L3794
 	movw	r3, #65535
 	strh	r3, [r4]	@ movhi
-.L3748:
+.L3790:
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3752:
-	ldr	r5, .L3813+28
+.L3794:
+	ldr	r5, .L3855+28
 	ldrh	r3, [r4]
 	ldr	r2, [r5]
 	add	r2, r2, r3, lsl #2
 	ldrb	r2, [r2, #2]	@ zero_extendqisi2
 	and	r2, r2, #224
 	cmp	r2, #32
-	beq	.L3753
+	beq	.L3795
 	cmp	r2, #224
-	beq	.L3753
-	cbz	r2, .L3754
-	ldr	r2, .L3813+32
+	beq	.L3795
+	cbz	r2, .L3796
+	ldr	r2, .L3855+32
 	ldr	r2, [r2]
 	ldrh	r1, [r2, #16]
 	cmp	r1, r3
-	beq	.L3753
+	beq	.L3795
 	ldrh	r1, [r2, #48]
 	cmp	r1, r3
-	beq	.L3753
+	beq	.L3795
 	ldrh	r2, [r2, #80]
 	cmp	r2, r3
-	bne	.L3807
-.L3753:
+	bne	.L3849
+.L3795:
 	movw	r3, #65535
 	movs	r0, #0
 	strh	r3, [r4]	@ movhi
 	strh	r0, [r4, #20]	@ movhi
-	b	.L3748
-.L3754:
-	ldr	r5, .L3813+16
+	b	.L3790
+.L3796:
+	ldr	r5, .L3855+16
 	ldr	r1, [r5]
 	ldrh	r3, [r1, r3, lsl #1]
-	cbz	r3, .L3756
-	movw	r2, #1529
-	ldr	r1, .L3813+4
-	ldr	r0, .L3813+8
+	cbz	r3, .L3798
+	movw	r2, #1530
+	ldr	r1, .L3855+4
+	ldr	r0, .L3855+8
 	bl	printf
-.L3756:
+.L3798:
 	ldrh	r2, [r4]
 	movs	r1, #0
 	ldr	r3, [r5]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	b	.L3753
-.L3807:
+	b	.L3795
+.L3849:
 	add	r0, r4, r0, lsl #1
 	movw	r3, #65535
 	ldrh	r7, [r0, #34]
 	cmp	r7, r3
-	bne	.L3757
-	movw	r2, #1539
-	ldr	r1, .L3813+4
-	ldr	r0, .L3813+8
+	bne	.L3799
+	movw	r2, #1540
+	ldr	r1, .L3855+4
+	ldr	r0, .L3855+8
 	bl	printf
-.L3757:
+.L3799:
 	ldrh	ip, [r4]
 	ldr	r1, [r5]
-	ldr	r6, .L3813+36
-	ldr	r0, .L3813+40
+	ldr	r6, .L3855+36
+	ldr	r0, .L3855+40
 	add	r1, r1, ip, lsl #2
 	ldrh	r3, [r6]
 	ldrh	r2, [r0]
@@ -24227,31 +24675,31 @@ gc_scan_src_blk:
 	and	r1, r1, #224
 	muls	r2, r7, r2
 	cmp	r1, #160
-	bne	.L3782
-	ldr	r1, .L3813+44
+	bne	.L3824
+	ldr	r1, .L3855+44
 	ldrb	r1, [r1]	@ zero_extendqisi2
 	cmp	r1, #2
 	it	eq
-	ldreq	r3, .L3813+48
+	ldreq	r3, .L3855+48
 	uxth	r10, r1
 	orr	r2, r2, r1, lsl #24
-	ldr	r1, .L3813+52
+	ldr	r1, .L3855+52
 	it	eq
 	ldrheq	r3, [r3]
 	ldrb	r1, [r1]	@ zero_extendqisi2
 	itt	eq
 	addeq	r3, r3, #-1
 	uxtheq	r3, r3
-	cbnz	r1, .L3760
-	ldr	r1, .L3813+56
+	cbnz	r1, .L3802
+	ldr	r1, .L3855+56
 	ldrb	r1, [r1]	@ zero_extendqisi2
-	cbz	r1, .L3758
-.L3760:
-	ldr	r3, .L3813+48
+	cbz	r1, .L3800
+.L3802:
+	ldr	r3, .L3855+48
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	uxth	r3, r3
-.L3758:
+.L3800:
 	movs	r6, #0
 	strb	r10, [r4, #6]
 	orrs	r3, r3, r2
@@ -24270,48 +24718,48 @@ gc_scan_src_blk:
 	ldr	r3, [r5, #36]
 	strh	r6, [r4, #20]	@ movhi
 	adds	r1, r3, #1
-	beq	.L3811
+	beq	.L3853
 	cmp	r3, #512
-	bne	.L3762
-.L3811:
+	bne	.L3804
+.L3853:
 	mov	r0, r5
 	bl	zbuf_free
-.L3809:
+.L3851:
 	mov	r0, #-1
-	b	.L3748
-.L3782:
+	b	.L3790
+.L3824:
 	mov	r10, #1
-	b	.L3758
-.L3762:
+	b	.L3800
+.L3804:
 	ldr	r6, [r5, #12]
-	ldr	r3, .L3813+60
+	ldr	r3, .L3855+60
 	ldr	r2, [r6]
 	str	r3, [sp, #16]
 	cmp	r2, r3
-	beq	.L3763
-	movw	r2, #1577
-.L3812:
-	ldr	r1, .L3813+4
-	ldr	r0, .L3813+8
+	beq	.L3805
+	movw	r2, #1578
+.L3854:
+	ldr	r1, .L3855+4
+	ldr	r0, .L3855+8
 	bl	printf
-	b	.L3811
-.L3763:
-	ldr	r3, .L3813+64
+	b	.L3853
+.L3805:
+	ldr	r3, .L3855+64
 	ldrh	r2, [r8]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	smulbb	r2, r2, r3
 	smulbb	r2, r2, r10
 	uxth	r2, r2
 	str	r2, [sp, #8]
-	ldr	r2, .L3813+68
+	ldr	r2, .L3855+68
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, #2
-	bne	.L3764
+	bne	.L3806
 	cmp	r10, #3
-	bne	.L3764
-	ldr	r2, .L3813+48
-	ldr	fp, .L3813+84
-	ldr	r10, .L3813+76
+	bne	.L3806
+	ldr	r2, .L3855+48
+	ldr	fp, .L3855+84
+	ldr	r10, .L3855+76
 	ldrh	r6, [r2]
 	ldrh	r0, [fp]
 	ldr	r1, [r5, #4]
@@ -24327,51 +24775,51 @@ gc_scan_src_blk:
 	ldr	r3, [r5, #12]
 	ldr	r3, [r3, #4]
 	str	r3, [sp, #20]
-	cbz	r3, .L3765
+	cbz	r3, .L3807
 	mov	r1, r6
 	ldr	r0, [r5, #4]
 	bl	js_hash
 	ldr	r3, [sp, #20]
 	cmp	r3, r0
-	beq	.L3765
+	beq	.L3807
 	mov	r0, r5
 	bl	zbuf_free
 	ldr	r1, [r5, #12]
 	mov	r3, r6
-.L3810:
+.L3852:
 	ldr	r2, [r5, #24]
 	ldr	r1, [r1, #4]
-	ldr	r0, .L3813+72
+	ldr	r0, .L3855+72
 	bl	printf
-	b	.L3809
-.L3765:
-	ldr	r3, .L3813+52
+	b	.L3851
+.L3807:
+	ldr	r3, .L3855+52
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L3766
-	ldr	r3, .L3813+56
+	cbnz	r3, .L3808
+	ldr	r3, .L3855+56
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L3767
-.L3766:
+	cbz	r3, .L3809
+.L3808:
 	ldr	r3, [sp, #4]
 	subs	r3, r3, #1
 	str	r3, [r5, #24]
-.L3768:
+.L3810:
 	movs	r1, #1
 	mov	r0, r5
 	bl	sblk_read_page
 	ldr	r3, [r5, #36]
 	adds	r2, r3, #1
-	beq	.L3811
+	beq	.L3853
 	cmp	r3, #512
-	beq	.L3811
+	beq	.L3853
 	ldr	r3, [r5, #12]
 	ldr	r2, [sp, #16]
 	ldr	r3, [r3]
 	cmp	r3, r2
-	beq	.L3771
-	movw	r2, #1618
-	b	.L3812
-.L3767:
+	beq	.L3813
+	movw	r2, #1619
+	b	.L3854
+.L3809:
 	ldr	r2, [sp, #12]
 	ldrh	r3, [r8]
 	ldrh	r2, [r2]
@@ -24381,35 +24829,35 @@ gc_scan_src_blk:
 	orr	r3, r3, #33554432
 	orrs	r7, r7, r3
 	str	r7, [r5, #24]
-	b	.L3768
-.L3771:
+	b	.L3810
+.L3813:
 	ldrh	r2, [fp]
 	ldr	r1, [r5, #4]
 	ldr	r0, [r10]
-.L3808:
-	ldr	r7, .L3813+76
+.L3850:
+	ldr	r7, .L3855+76
 	mov	r8, #0
 	bl	ftl_memcpy
-	ldr	r10, .L3813+88
+	ldr	r10, .L3855+88
 	ldr	r6, [r7]
-	ldr	fp, .L3813+92
+	ldr	fp, .L3855+92
 	subs	r6, r6, #4
-.L3774:
+.L3816:
 	ldr	r3, [sp, #8]
 	cmp	r8, r3
-	blt	.L3779
+	blt	.L3821
 	mov	r0, r5
-	ldr	r5, .L3813+16
+	ldr	r5, .L3855+16
 	bl	zbuf_free
 	ldrh	r1, [r4]
 	ldr	r3, [r5]
 	ldrh	r2, [r3, r1, lsl #1]
 	ldrh	r3, [r4, #20]
 	cmp	r2, r3
-	beq	.L3780
-	ldr	r0, .L3813+80
+	beq	.L3822
+	ldr	r0, .L3855+80
 	bl	printf
-.L3780:
+.L3822:
 	ldr	r3, [r5]
 	ldrh	r1, [r4, #20]
 	ldrh	r2, [r4]
@@ -24417,35 +24865,35 @@ gc_scan_src_blk:
 	movs	r3, #0
 	strh	r3, [r4, #24]	@ movhi
 	ldrh	r0, [r4, #20]
-	b	.L3748
-.L3814:
+	b	.L3790
+.L3856:
 	.align	2
-.L3813:
-	.word	.LANCHOR71
+.L3855:
+	.word	.LANCHOR70
 	.word	.LANCHOR227
 	.word	.LC0
-	.word	.LANCHOR14
+	.word	.LANCHOR19
+	.word	.LANCHOR11
+	.word	.LC220
+	.word	.LANCHOR70+36
 	.word	.LANCHOR9
-	.word	.LC217
-	.word	.LANCHOR71+36
-	.word	.LANCHOR7
-	.word	.LANCHOR10
-	.word	.LANCHOR95
+	.word	.LANCHOR12
+	.word	.LANCHOR94
 	.word	.LANCHOR111
-	.word	.LANCHOR79
-	.word	.LANCHOR86
+	.word	.LANCHOR78
+	.word	.LANCHOR85
+	.word	.LANCHOR35
 	.word	.LANCHOR36
-	.word	.LANCHOR37
 	.word	-178307901
-	.word	.LANCHOR80
+	.word	.LANCHOR79
 	.word	.LANCHOR224
-	.word	.LC218
-	.word	.LANCHOR77
-	.word	.LC219
+	.word	.LC221
+	.word	.LANCHOR76
+	.word	.LC222
 	.word	.LANCHOR221
-	.word	.LANCHOR75
-	.word	.LANCHOR32
-.L3764:
+	.word	.LANCHOR74
+	.word	.LANCHOR31
+.L3806:
 	ldr	r3, [sp, #8]
 	ldr	r8, [r5, #4]
 	lsls	r7, r3, #2
@@ -24454,31 +24902,31 @@ gc_scan_src_blk:
 	bl	js_hash
 	ldr	r3, [r6, #4]
 	cmp	r3, r0
-	beq	.L3773
+	beq	.L3815
 	mov	r0, r5
 	bl	zbuf_free
 	ldr	r1, [r5, #12]
 	mov	r3, r7
-	b	.L3810
-.L3773:
-	ldr	r3, .L3815
+	b	.L3852
+.L3815:
+	ldr	r3, .L3857
 	mov	r2, r7
 	mov	r1, r8
 	ldr	r0, [r3]
-	b	.L3808
-.L3779:
+	b	.L3850
+.L3821:
 	ldr	r0, [r6, #4]!
 	adds	r3, r0, #1
-	beq	.L3776
+	beq	.L3818
 	bl	lpa_hash_get_ppa
 	str	r0, [sp, #28]
 	adds	r0, r0, #1
-	bne	.L3777
+	bne	.L3819
 	movs	r2, #0
 	add	r1, sp, #28
 	ldr	r0, [r6]
 	bl	pm_log2phys
-.L3777:
+.L3819:
 	ldrb	r3, [fp]	@ zero_extendqisi2
 	ldr	r2, [sp, #28]
 	ldrh	r1, [r10]
@@ -24488,7 +24936,7 @@ gc_scan_src_blk:
 	movs	r3, #1
 	lsls	r3, r3, r0
 	lsr	r0, r2, r1
-	ldr	r1, .L3815+4
+	ldr	r1, .L3857+4
 	subs	r3, r3, #1
 	ands	r0, r0, r3
 	ldrb	r1, [r1]	@ zero_extendqisi2
@@ -24496,23 +24944,23 @@ gc_scan_src_blk:
 	ldrh	r3, [r4]
 	ldr	r2, [sp, #4]
 	cmp	r0, r3
-	bne	.L3776
+	bne	.L3818
 	ldrh	r3, [r4, #20]
 	ldr	r1, [r7]
 	str	r2, [r1, r3, lsl #2]
 	adds	r3, r3, #1
 	strh	r3, [r4, #20]	@ movhi
-.L3776:
+.L3818:
 	add	r8, r8, #1
-	b	.L3774
-.L3781:
+	b	.L3816
+.L3823:
 	movs	r0, #0
-	b	.L3748
-.L3816:
+	b	.L3790
+.L3858:
 	.align	2
-.L3815:
-	.word	.LANCHOR77
+.L3857:
 	.word	.LANCHOR76
+	.word	.LANCHOR75
 	.size	gc_scan_src_blk, .-gc_scan_src_blk
 	.section	.text.gc_scan_static_data,"ax",%progbits
 	.align	1
@@ -24526,15 +24974,15 @@ gc_scan_static_data:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r4, .L3833
+	ldr	r4, .L3875
 	ldr	r3, [r4]
 	ldr	r2, [r3, #544]
 	adds	r2, r2, #1
-	beq	.L3818
-	ldr	r8, .L3833+28
+	beq	.L3860
+	ldr	r8, .L3875+28
 	movs	r6, #0
-	ldr	r10, .L3833+32
-.L3826:
+	ldr	r10, .L3875+32
+.L3868:
 	ldr	r3, [r4]
 	movs	r2, #0
 	add	r1, sp, #4
@@ -24543,7 +24991,7 @@ gc_scan_static_data:
 	bl	pm_log2phys
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
-	beq	.L3819
+	beq	.L3861
 	movs	r0, #1
 	bl	buf_alloc
 	ldr	r3, [sp, #4]
@@ -24553,18 +25001,18 @@ gc_scan_static_data:
 	bl	sblk_read_page
 	ldr	r3, [r5, #36]
 	cmp	r3, #256
-	bne	.L3820
-	ldr	r3, .L3833+4
+	bne	.L3862
+	ldr	r3, .L3875+4
 	mov	fp, #1
 	ldr	r2, [sp, #4]
 	ldrh	r0, [r3]
-	ldr	r3, .L3833+8
+	ldr	r3, .L3875+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	rsb	r3, r3, #24
 	subs	r3, r3, r0
 	lsr	r0, r2, r0
 	lsl	r3, fp, r3
-	ldr	r2, .L3833+12
+	ldr	r2, .L3875+12
 	subs	r3, r3, #1
 	ldrb	r1, [r2]	@ zero_extendqisi2
 	ands	r0, r0, r3
@@ -24573,29 +25021,29 @@ gc_scan_static_data:
 	mov	r1, fp
 	uxth	r0, r0
 	bl	gc_add_sblk
-.L3820:
+.L3862:
 	ldr	r2, [r5, #12]
 	ldr	r3, [r4]
 	ldr	r2, [r2, #4]
 	ldr	r3, [r3, #544]
 	cmp	r2, r3
-	beq	.L3821
-	movw	r2, #2162
+	beq	.L3863
+	movw	r2, #2163
 	mov	r1, r8
 	mov	r0, r10
 	bl	printf
-.L3821:
+.L3863:
 	mov	r0, r5
 	bl	zbuf_free
-.L3819:
+.L3861:
 	ldr	r3, [r4]
-	ldr	r1, .L3833+16
+	ldr	r1, .L3875+16
 	ldr	r2, [r3, #544]
 	ldr	r1, [r1]
 	adds	r2, r2, #1
 	cmp	r2, r1
 	str	r2, [r3, #544]
-	bcc	.L3822
+	bcc	.L3864
 	mov	r2, #-1
 	str	r2, [r3, #544]
 	ldr	r2, [r3, #548]
@@ -24606,50 +25054,50 @@ gc_scan_static_data:
 	bl	ftl_ext_info_flush
 	movs	r0, #0
 	bl	ftl_info_flush
-.L3817:
+.L3859:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3822:
+.L3864:
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
-	bne	.L3817
-	ldr	r3, .L3833+20
+	bne	.L3859
+	ldr	r3, .L3875+20
 	adds	r6, r6, #1
 	ldrh	r3, [r3]
 	cmp	r7, r3, lsr #2
-	bcc	.L3826
-	b	.L3817
-.L3818:
+	bcc	.L3868
+	b	.L3859
+.L3860:
 	ldr	r2, [r3, #536]
 	ldr	r1, [r3, #12]
-	ldr	r0, .L3833+24
+	ldr	r0, .L3875+24
 	add	r2, r2, #12910592
 	add	r2, r2, #49408
 	cmp	r1, r2
-	bhi	.L3828
+	bhi	.L3870
 	ldr	r4, [r0]
 	ldr	r2, [r3, #540]
 	ldr	r4, [r4, #44]
 	add	r2, r2, #4992
 	adds	r2, r2, #8
 	cmp	r4, r2
-	bls	.L3817
-.L3828:
+	bls	.L3859
+.L3870:
 	ldr	r2, [r0]
 	ldr	r2, [r2, #44]
 	str	r1, [r3, #536]
 	str	r2, [r3, #540]
 	movs	r2, #0
 	str	r2, [r3, #544]
-	b	.L3817
-.L3834:
+	b	.L3859
+.L3876:
 	.align	2
-.L3833:
-	.word	.LANCHOR10
+.L3875:
+	.word	.LANCHOR12
+	.word	.LANCHOR74
+	.word	.LANCHOR31
 	.word	.LANCHOR75
-	.word	.LANCHOR32
-	.word	.LANCHOR76
 	.word	.LANCHOR128
 	.word	.LANCHOR221
 	.word	.LANCHOR110
@@ -24669,7 +25117,7 @@ ftl_sblk_dump:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	lsls	r3, r0, #2
-	ldr	r4, .L3878
+	ldr	r4, .L3920
 	sub	sp, sp, #128
 	lsls	r2, r0, #2
 	mov	r6, r0
@@ -24683,7 +25131,7 @@ ftl_sblk_dump:
 	str	r1, [sp, #4]
 	mov	r1, r0
 	ldrh	r3, [r3, r0, lsl #2]
-	ldr	r0, .L3878+4
+	ldr	r0, .L3920+4
 	ubfx	r3, r3, #0, #11
 	str	r3, [sp]
 	ubfx	r3, r2, #3, #2
@@ -24691,11 +25139,11 @@ ftl_sblk_dump:
 	bl	printf
 	movw	r3, #65535
 	cmp	r6, r3
-	beq	.L3858
-	ldr	r3, .L3878+8
+	beq	.L3900
+	ldr	r3, .L3920+8
 	ldrh	r3, [r3]
 	cmp	r3, r6
-	bls	.L3858
+	bls	.L3900
 	ldr	r3, [r4]
 	lsls	r2, r6, #2
 	add	r1, sp, #112
@@ -24708,11 +25156,11 @@ ftl_sblk_dump:
 	and	r3, r3, #224
 	cmp	r3, #160
 	itet	eq
-	ldreq	r3, .L3878+12
+	ldreq	r3, .L3920+12
 	movne	fp, #1
 	ldrbeq	fp, [r3]	@ zero_extendqisi2
 	bl	ftl_get_blk_list_in_sblk
-	ldr	r3, .L3878+16
+	ldr	r3, .L3920+16
 	uxtb	r0, r0
 	lsls	r2, r6, #2
 	strb	r5, [sp, #101]
@@ -24728,7 +25176,7 @@ ftl_sblk_dump:
 	ldrb	r2, [r3, #2]	@ zero_extendqisi2
 	mov	r3, fp
 	str	r0, [sp]
-	ldr	r0, .L3878+20
+	ldr	r0, .L3920+20
 	lsrs	r2, r2, #5
 	bl	printf
 	movs	r0, #1
@@ -24736,12 +25184,12 @@ ftl_sblk_dump:
 	mov	r7, r0
 	str	r5, [sp, #48]
 	str	r5, [sp, #44]
-.L3838:
-	ldr	r3, .L3878+16
+.L3880:
+	ldr	r3, .L3920+16
 	ldrh	r2, [r3]
 	uxth	r3, r5
 	cmp	r2, r3
-	bls	.L3855
+	bls	.L3897
 	str	r3, [sp, #60]
 	lsls	r3, r3, #1
 	subs	r2, r3, #1
@@ -24751,8 +25199,8 @@ ftl_sblk_dump:
 	subs	r3, r3, #1
 	str	r3, [sp, #72]
 	movs	r3, #0
-	b	.L3877
-.L3852:
+	b	.L3919
+.L3894:
 	ldr	r3, [sp, #84]
 	add	r2, sp, #128
 	add	r3, r2, r3, lsl #1
@@ -24761,43 +25209,43 @@ ftl_sblk_dump:
 	movw	r3, #65535
 	ldr	r2, [sp, #56]
 	cmp	r2, r3
-	beq	.L3839
-	ldr	r3, .L3878+24
+	beq	.L3881
+	ldr	r3, .L3920+24
 	cmp	fp, #3
 	ldrh	r4, [r3]
 	mov	r3, r2
 	mul	r3, r3, r4
-	bne	.L3840
-	ldr	r2, .L3878+28
+	bne	.L3882
+	ldr	r2, .L3920+28
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbz	r2, .L3841
+	cbz	r2, .L3883
 	ldr	r2, [sp, #72]
-.L3874:
+.L3916:
 	adds	r4, r3, r2
-	ldr	r2, .L3878+12
+	ldr	r2, .L3920+12
 	add	r3, r4, r8
 	ldrb	r4, [r2]	@ zero_extendqisi2
 	orr	r4, r3, r4, lsl #24
-	b	.L3842
-.L3841:
-	ldr	r2, .L3878+32
+	b	.L3884
+.L3883:
+	ldr	r2, .L3920+32
 	lsl	r4, r8, #24
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, #0
-	beq	.L3843
+	beq	.L3885
 	ldr	r2, [sp, #72]
 	add	r3, r3, r2
 	add	r3, r3, r8
-.L3875:
+.L3917:
 	orrs	r4, r4, r3
-.L3842:
+.L3884:
 	movs	r1, #1
 	str	r4, [r7, #24]
 	mov	r0, r7
 	bl	sblk_read_page
 	ldr	r2, [r7, #12]
 	ldr	r3, [r7, #36]
-	ldr	r0, .L3878+36
+	ldr	r0, .L3920+36
 	ldr	r1, [r2, #12]
 	str	r3, [sp, #64]
 	ldr	r3, [r7, #4]
@@ -24824,150 +25272,150 @@ ftl_sblk_dump:
 	bl	printf
 	ldr	r3, [sp, #64]
 	adds	r2, r3, #1
-	beq	.L3860
+	beq	.L3902
 	cmp	r3, #512
 	ldr	r3, [sp, #44]
 	it	eq
 	moveq	r3, #1
-.L3876:
+.L3918:
 	str	r3, [sp, #44]
-	ldr	r3, .L3878
+	ldr	r3, .L3920
 	ldr	r2, [sp, #76]
 	ldr	r3, [r3]
 	add	r3, r3, r2
 	ldrb	r3, [r3, #2]	@ zero_extendqisi2
 	and	r3, r3, #224
 	cmp	r3, #224
-	beq	.L3839
+	beq	.L3881
 	cmp	r3, #32
-	beq	.L3839
+	beq	.L3881
 	ldr	r3, [r7, #12]
 	ldr	r0, [r3, #4]
 	bl	lpa_hash_get_ppa
 	str	r0, [sp, #92]
 	adds	r0, r0, #1
-	bne	.L3846
+	bne	.L3888
 	ldr	r3, [r7, #12]
 	movs	r2, #0
 	add	r1, sp, #92
 	ldr	r0, [r3, #4]
 	bl	pm_log2phys
-.L3846:
+.L3888:
 	ldr	r3, [sp, #92]
 	cmp	r4, r3
-	bne	.L3847
+	bne	.L3889
 	ldr	r3, [sp, #48]
 	mov	r1, r4
 	ldr	r2, [r7, #12]
-	ldr	r0, .L3878+40
+	ldr	r0, .L3920+40
 	adds	r3, r3, #1
 	ldr	r2, [r2, #4]
 	str	r3, [sp, #48]
 	bl	printf
-.L3847:
+.L3889:
 	ldr	r3, [sp, #68]
-	cbz	r3, .L3849
+	cbz	r3, .L3891
 	ldr	r2, [r3, r10, lsl #2]
 	lsl	r4, r10, #2
 	ldr	r3, [r7, #12]
 	ldr	r3, [r3, #4]
 	cmp	r3, r2
-	beq	.L3850
-	ldr	r3, .L3878+44
+	beq	.L3892
+	ldr	r3, .L3920+44
 	ldr	r3, [r3]
 	lsls	r3, r3, #19
-	bpl	.L3850
+	bpl	.L3892
 	mov	r1, r10
-	ldr	r0, .L3878+48
+	ldr	r0, .L3920+48
 	bl	printf
-.L3850:
+.L3892:
 	ldr	r3, [sp, #68]
 	ldr	r2, [r7, #12]
 	ldr	r3, [r3, r4]
 	ldr	r2, [r2, #4]
 	cmp	r2, r3
-	beq	.L3849
+	beq	.L3891
 	adds	r3, r3, #1
-	beq	.L3849
-	movw	r2, #1567
-	ldr	r1, .L3878+52
-	ldr	r0, .L3878+56
+	beq	.L3891
+	movw	r2, #1575
+	ldr	r1, .L3920+52
+	ldr	r0, .L3920+56
 	bl	printf
-.L3849:
+.L3891:
 	add	r10, r10, #1
-.L3839:
+.L3881:
 	add	r8, r8, #1
 	uxth	r8, r8
-.L3854:
+.L3896:
 	cmp	fp, r8
-	bcs	.L3852
+	bcs	.L3894
 	ldr	r3, [sp, #52]
 	adds	r3, r3, #1
-.L3877:
+.L3919:
 	str	r3, [sp, #52]
 	ldrb	r2, [sp, #105]	@ zero_extendqisi2
 	ldrh	r3, [sp, #52]
 	cmp	r2, r3
-	bls	.L3853
+	bls	.L3895
 	adds	r3, r3, #8
 	mov	r8, #1
 	str	r3, [sp, #84]
-	b	.L3854
-.L3843:
+	b	.L3896
+.L3885:
 	uxtah	r3, r3, r5
-	b	.L3875
-.L3840:
+	b	.L3917
+.L3882:
 	cmp	fp, #2
-	bne	.L3844
+	bne	.L3886
 	ldr	r2, [sp, #80]
-	b	.L3874
-.L3844:
+	b	.L3916
+.L3886:
 	uxtah	r4, r3, r5
-	b	.L3842
-.L3860:
+	b	.L3884
+.L3902:
 	movs	r3, #1
-	b	.L3876
-.L3853:
+	b	.L3918
+.L3895:
 	adds	r5, r5, #1
-	b	.L3838
-.L3855:
+	b	.L3880
+.L3897:
 	mov	r0, r7
 	bl	zbuf_free
-	ldr	r3, .L3878+60
+	ldr	r3, .L3920+60
 	mov	r1, r6
-	ldr	r0, .L3878+64
+	ldr	r0, .L3920+64
 	ldr	r2, [r3]
 	ldr	r3, [sp, #48]
 	ldrh	r2, [r2, r6, lsl #1]
 	bl	printf
 	ldr	r0, [sp, #44]
-.L3835:
+.L3877:
 	add	sp, sp, #128
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3858:
+.L3900:
 	movs	r0, #0
-	b	.L3835
-.L3879:
+	b	.L3877
+.L3921:
 	.align	2
-.L3878:
-	.word	.LANCHOR7
-	.word	.LC220
-	.word	.LANCHOR6
-	.word	.LANCHOR79
-	.word	.LANCHOR95
-	.word	.LC221
+.L3920:
+	.word	.LANCHOR9
+	.word	.LC223
+	.word	.LANCHOR8
+	.word	.LANCHOR78
+	.word	.LANCHOR94
+	.word	.LC224
 	.word	.LANCHOR111
+	.word	.LANCHOR35
 	.word	.LANCHOR36
-	.word	.LANCHOR37
-	.word	.LC167
-	.word	.LC222
-	.word	.LANCHOR14
-	.word	.LC223
+	.word	.LC160
+	.word	.LC225
+	.word	.LANCHOR19
+	.word	.LC226
 	.word	.LANCHOR229
 	.word	.LC0
-	.word	.LANCHOR9
-	.word	.LC224
+	.word	.LANCHOR11
+	.word	.LC227
 	.size	ftl_sblk_dump, .-ftl_sblk_dump
 	.section	.text.zftl_read,"ax",%progbits
 	.align	1
@@ -24981,265 +25429,308 @@ zftl_read:
 	@ args = 0, pretend = 0, frame = 48
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r5, r3
-	ldr	r3, .L3929
+	mov	r6, r3
+	ldr	r3, .L3974
 	mov	r4, r0
 	sub	sp, sp, #72
-	mov	r6, r1
-	mov	fp, r2
+	mov	r5, r1
+	str	r2, [sp, #24]
 	ldr	r3, [r3]
 	lsls	r0, r3, #19
-	bpl	.L3881
+	bpl	.L3923
 	mov	r3, r2
-	ldr	r0, .L3929+4
+	ldr	r0, .L3974+4
 	mov	r2, r1
 	mov	r1, r4
 	bl	printf
-.L3881:
+.L3923:
 	cmp	r4, #0
-	bne	.L3882
-	ldr	r3, .L3929+8
+	bne	.L3924
+	ldr	r3, .L3974+8
 	mov	r4, #24576
 	ldr	r3, [r3]
-.L3883:
-	cmp	r3, r6
-	bls	.L3914
-	cmp	r3, fp
-	bcc	.L3914
-	add	r2, r6, fp
+.L3925:
+	cmp	r3, r5
+	bls	.L3959
+	ldr	r2, [sp, #24]
 	cmp	r3, r2
-	bcc	.L3914
-	adds	r3, r4, r6
-	ldr	r6, .L3929+12
+	bcc	.L3959
+	adds	r2, r5, r2
+	cmp	r3, r2
+	bcc	.L3959
+	adds	r3, r4, r5
+	ldr	r1, [sp, #24]
 	str	r3, [sp, #28]
-	ldr	r3, .L3929+16
+	ldr	r3, .L3974+12
 	ldr	r0, [sp, #28]
 	ldr	r2, [r3]
 	ldr	r3, [r2, #24]
-	add	r3, r3, fp
+	add	r3, r3, r1
 	str	r3, [r2, #24]
-	ldr	r3, .L3929+20
+	ldr	r3, .L3974+16
 	ldrb	r4, [r3]	@ zero_extendqisi2
 	mov	r1, r4
 	bl	__aeabi_uidiv
-	ldr	r3, [sp, #28]
+	ldr	r2, [sp, #28]
 	mov	r1, r4
+	ldr	r3, [sp, #24]
 	str	r0, [sp, #36]
-	add	r3, fp, r3
+	ldr	r4, .L3974+20
+	add	r3, r3, r2
 	subs	r0, r3, #1
 	str	r3, [sp, #44]
 	bl	__aeabi_uidiv
 	ldr	r3, [sp, #36]
-	ldr	r4, [sp, #36]
+	ldr	r5, [sp, #36]
 	str	r0, [sp, #48]
 	rsb	r3, r3, #1
 	add	r3, r3, r0
 	str	r3, [sp, #32]
 	movs	r3, #0
 	str	r3, [sp, #40]
-.L3885:
+.L3927:
 	ldr	r3, [sp, #32]
-	cbnz	r3, .L3910
+	cbnz	r3, .L3955
 	ldr	r0, [sp, #40]
-.L3880:
+.L3922:
 	add	sp, sp, #72
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3882:
+.L3924:
 	cmp	r4, #3
-	bhi	.L3914
+	bhi	.L3959
 	lsls	r4, r4, #13
 	mov	r3, #8192
-	b	.L3883
-.L3910:
-	ldr	r3, .L3929+20
+	b	.L3925
+.L3955:
+	ldr	r3, .L3974+16
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	ldr	r3, [sp, #36]
-	cmp	r4, r3
+	cmp	r5, r3
 	uxth	r7, r1
-	bne	.L3886
+	bne	.L3928
 	ldr	r0, [sp, #28]
 	bl	__aeabi_uidivmod
 	uxth	r8, r1
+	ldr	r3, [sp, #24]
 	sub	r7, r7, r8
 	uxth	r7, r7
-	cmp	fp, r7
-	bcs	.L3887
-	uxth	r7, fp
-.L3887:
-	ldr	r2, .L3929+12
+	cmp	r3, r7
+	bcs	.L3929
+	ldrh	r7, [sp, #24]
+.L3929:
+	ldr	r2, .L3974+20
 	movs	r3, #0
-.L3890:
+.L3932:
 	ldr	r1, [r2, #20]
-	cmp	r4, r1
-	bne	.L3888
+	cmp	r5, r1
+	bne	.L3930
 	ldrb	r1, [r2, #2]	@ zero_extendqisi2
 	lsls	r1, r1, #28
-	bpl	.L3888
+	bpl	.L3930
 	movs	r2, #48
 	lsls	r7, r7, #9
-	mov	r0, r5
-	mla	r3, r2, r3, r6
-	add	r5, r5, r7
+	mov	r0, r6
+	mla	r3, r2, r3, r4
+	add	r6, r6, r7
 	mov	r2, r7
 	ldr	r1, [r3, #4]
 	add	r1, r1, r8, lsl #9
 	bl	ftl_memcpy
-.L3889:
+.L3931:
 	ldr	r3, [sp, #32]
-	adds	r4, r4, #1
+	adds	r5, r5, #1
 	subs	r3, r3, #1
 	str	r3, [sp, #32]
-.L3896:
-	ldr	r3, .L3929+24
+.L3938:
+	ldr	r3, .L3974+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #2
-	bls	.L3897
+	bls	.L3939
 	ldr	r3, [sp, #32]
 	cmp	r3, #0
-	bne	.L3885
-.L3897:
-	ldr	r3, .L3929+28
+	bne	.L3927
+.L3939:
+	ldr	r3, .L3974+28
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	cmp	r1, #0
-	beq	.L3885
-	ldr	r3, .L3929+32
+	beq	.L3927
+	ldr	r3, .L3974+32
 	ldrb	r0, [r3]	@ zero_extendqisi2
 	add	r0, r0, r0, lsl #1
-	add	r0, r6, r0, lsl #4
+	add	r0, r4, r0, lsl #4
 	bl	sblk_read_page
-.L3899:
-	ldr	r3, .L3929+28
-	ldr	r8, .L3929+32
+.L3941:
+	ldr	r3, .L3974+28
+	ldr	r8, .L3974+32
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	cmp	r2, #0
-	bne	.L3909
+	bne	.L3954
 	movs	r1, #255
 	strb	r2, [r3]
 	strb	r1, [r8]
-	b	.L3885
-.L3886:
+	b	.L3927
+.L3928:
 	ldr	r3, [sp, #48]
+	cmp	r5, r3
+	bne	.L3960
+	ldr	r3, [sp, #28]
+	ldr	r2, [sp, #24]
+	adds	r7, r3, r2
+	mls	r1, r5, r1, r7
+	uxtb	r7, r1
+.L3960:
 	mov	r8, #0
-	cmp	r4, r3
-	itttt	eq
-	ldreq	r3, [sp, #28]
-	addeq	r7, r3, fp
-	mlseq	r1, r4, r1, r7
-	uxtbeq	r7, r1
-	b	.L3887
-.L3888:
+	b	.L3929
+.L3930:
 	adds	r3, r3, #1
 	adds	r2, r2, #48
 	cmp	r3, #32
-	bne	.L3890
-	mov	r0, r4
+	bne	.L3932
+	mov	r0, r5
 	bl	lpa_hash_get_ppa
 	str	r0, [sp, #68]
 	adds	r0, r0, #1
-	bne	.L3891
+	bne	.L3933
 	movs	r2, #0
 	add	r1, sp, #68
-	mov	r0, r4
+	mov	r0, r5
 	bl	pm_log2phys
-.L3891:
+.L3933:
 	ldr	r3, [sp, #68]
 	adds	r3, r3, #1
-	bne	.L3892
-	ldr	r8, .L3929+20
+	bne	.L3934
+	ldr	r8, .L3974+16
 	movs	r7, #0
-.L3893:
+.L3935:
 	ldrb	r3, [r8]	@ zero_extendqisi2
 	cmp	r7, r3
-	bcs	.L3889
-	mla	r3, r3, r4, r7
+	bcs	.L3931
+	mla	r3, r3, r5, r7
 	ldr	r2, [sp, #28]
 	cmp	r2, r3
-	bhi	.L3894
+	bhi	.L3936
 	ldr	r2, [sp, #44]
 	cmp	r2, r3
-	bls	.L3894
-	mov	r0, r5
-	add	r5, r5, #512
+	bls	.L3936
+	mov	r0, r6
+	add	r6, r6, #512
 	mov	r2, #512
 	movs	r1, #0
 	bl	ftl_memset
-.L3894:
+.L3936:
 	adds	r7, r7, #1
-	b	.L3893
-.L3892:
+	b	.L3935
+.L3934:
 	movs	r0, #0
 	bl	buf_alloc
 	cmp	r0, #0
-	beq	.L3896
-	ldr	r2, .L3929+16
+	beq	.L3938
+	ldr	r2, .L3974+12
 	ldr	r1, [r2]
 	ldr	r2, [r1, #40]
 	adds	r2, r2, #1
 	str	r2, [r1, #40]
 	ldr	r2, [sp, #68]
-	str	r5, [r0, #8]
-	add	r5, r5, r7, lsl #9
-	str	r4, [r0, #20]
+	str	r6, [r0, #8]
+	add	r6, r6, r7, lsl #9
+	str	r5, [r0, #20]
 	str	r2, [r0, #24]
 	str	r2, [r0, #28]
 	strb	r7, [r0, #40]
 	strb	r8, [r0, #41]
 	bl	zftl_add_read_buf
-	b	.L3889
-.L3930:
+	b	.L3931
+.L3975:
 	.align	2
-.L3929:
-	.word	.LANCHOR14
-	.word	.LC225
-	.word	.LANCHOR68
-	.word	.LANCHOR56
+.L3974:
+	.word	.LANCHOR19
+	.word	.LC228
+	.word	.LANCHOR67
 	.word	.LANCHOR110
 	.word	.LANCHOR131
-	.word	.LANCHOR58
+	.word	.LANCHOR55
+	.word	.LANCHOR57
 	.word	.LANCHOR134
 	.word	.LANCHOR133
-.L3909:
+.L3954:
 	ldrb	r3, [r8]	@ zero_extendqisi2
 	cmp	r3, #255
-	bne	.L3900
-	movw	r2, #1276
-	ldr	r1, .L3931
-	ldr	r0, .L3931+4
+	bne	.L3942
+	movw	r2, #1281
+	ldr	r1, .L3976
+	ldr	r0, .L3976+4
 	bl	printf
-.L3900:
+.L3942:
 	ldrb	r7, [r8]	@ zero_extendqisi2
 	add	r3, r7, r7, lsl #1
-	add	r3, r6, r3, lsl #4
+	add	r3, r4, r3, lsl #4
 	str	r3, [sp, #52]
 	movs	r3, #48
 	muls	r3, r7, r3
-	adds	r2, r6, r3
-	ldrb	r3, [r6, r3]	@ zero_extendqisi2
+	adds	r2, r4, r3
+	ldrb	r3, [r4, r3]	@ zero_extendqisi2
 	strb	r3, [r8]
 	ldr	r8, [r2, #36]
 	cmp	r8, #-1
-	bne	.L3901
-	ldr	r3, .L3931+8
+	bne	.L3943
+	ldr	r3, .L3976+8
 	str	r8, [sp, #40]
 	ldr	r2, [r3]
 	ldr	r3, [r2, #552]
 	adds	r3, r3, #1
 	str	r3, [r2, #552]
-.L3902:
+.L3944:
+	movs	r2, #48
+	mla	r2, r2, r7, r4
+	ldr	r3, [r2, #12]
+	ldr	r2, [r2, #20]
+	ldr	r1, [r3, #4]
+	cmp	r1, r2
+	bne	.L3945
+	cmp	r8, #-1
+	bne	.L3946
+.L3945:
+	ldr	r0, .L3976+12
+	movs	r1, #48
+	mla	r1, r1, r7, r4
+	ldr	r2, .L3976+16
+	ldrb	ip, [r0]	@ zero_extendqisi2
+	mov	fp, #1
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	ldr	r8, [r1, #8]
+	ldr	lr, [r1, #4]
+	rsb	r0, ip, #24
+	ldrb	r10, [r1, #40]	@ zero_extendqisi2
+	lsl	fp, fp, ip
+	ldr	r1, [r1, #24]
+	add	fp, fp, #-1
+	str	r2, [sp]
+	lsl	ip, fp, r0
+	cmp	r10, r2
+	ite	cs
+	movcs	r2, r8
+	movcc	r2, lr
+	lsr	r0, r1, r0
+	bic	r1, r1, ip
+	and	r0, r0, fp
+	uxtb	r0, r0
+	bl	flash_read_page_en
+	mov	r8, r0
+.L3946:
 	movs	r3, #48
-	mla	r3, r3, r7, r6
+	mla	r3, r3, r7, r4
 	ldr	r2, [r3, #12]
 	ldr	r3, [r3, #20]
 	ldr	r1, [r2, #4]
 	cmp	r1, r3
-	bne	.L3903
+	bne	.L3948
 	cmp	r8, #-1
-	bne	.L3904
-.L3903:
-	ldr	r1, .L3931+8
+	bne	.L3949
+.L3948:
+	ldr	r1, .L3976+8
 	mov	r10, #48
-	mla	r10, r10, r7, r6
+	mla	r10, r10, r7, r4
 	ldr	r0, [r1]
 	ldr	r1, [r0, #552]
 	adds	r1, r1, #1
@@ -25252,15 +25743,15 @@ zftl_read:
 	ldr	r0, [r2, #4]
 	str	r0, [sp, #8]
 	ldr	r2, [r2]
-	ldr	r0, .L3931+12
+	ldr	r0, .L3976+20
 	str	r2, [sp, #4]
 	ldr	r2, [r10, #24]
 	str	r2, [sp]
 	mov	r2, r8
 	bl	printf
-	ldr	r3, .L3931+16
+	ldr	r3, .L3976+24
 	ldrh	r2, [r3]
-	ldr	r3, .L3931+20
+	ldr	r3, .L3976+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	rsb	r3, r3, #24
 	subs	r0, r3, r2
@@ -25269,69 +25760,69 @@ zftl_read:
 	ldr	r0, [r10, #24]
 	subs	r3, r3, #1
 	lsrs	r0, r0, r2
-	ldr	r2, .L3931+24
+	ldr	r2, .L3976+28
 	ands	r0, r0, r3
 	ldrb	r1, [r2]	@ zero_extendqisi2
 	bl	__aeabi_uidiv
 	movs	r1, #0
 	uxth	r0, r0
 	bl	ftl_sblk_dump
-.L3904:
+.L3949:
 	movs	r3, #48
-	mla	r3, r3, r7, r6
+	mla	r3, r3, r7, r4
 	ldr	r2, [r3, #12]
 	ldr	r3, [r3, #20]
 	ldr	r2, [r2, #4]
 	cmp	r2, r3
-	bne	.L3905
+	bne	.L3950
 	cmp	r8, #-1
-	bne	.L3906
-.L3905:
-	movw	r2, #1301
-	ldr	r1, .L3931
-	ldr	r0, .L3931+4
+	bne	.L3951
+.L3950:
+	movw	r2, #1317
+	ldr	r1, .L3976
+	ldr	r0, .L3976+4
 	bl	printf
-.L3906:
+.L3951:
 	movs	r3, #48
-	mla	r7, r3, r7, r6
-	ldr	r3, .L3931+28
+	mla	r7, r3, r7, r4
+	ldr	r3, .L3976+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	ldrb	r2, [r7, #40]	@ zero_extendqisi2
 	cmp	r3, r2
-	bls	.L3907
+	bls	.L3952
 	ldrb	r1, [r7, #41]	@ zero_extendqisi2
 	lsls	r2, r2, #9
 	ldr	r3, [r7, #4]
 	ldr	r0, [r7, #8]
 	add	r1, r3, r1, lsl #9
 	bl	ftl_memcpy
-.L3908:
+.L3953:
 	ldr	r1, [sp, #52]
-	ldr	r0, .L3931+32
+	ldr	r0, .L3976+32
 	bl	buf_remove_buf
 	ldr	r0, [sp, #52]
 	bl	zbuf_free
-	ldr	r2, .L3931+36
+	ldr	r2, .L3976+36
 	ldrb	r3, [r2]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	strb	r3, [r2]
-	b	.L3899
-.L3901:
+	b	.L3941
+.L3943:
 	cmp	r8, #256
-	bne	.L3902
-	ldr	r1, .L3931+16
+	bne	.L3944
+	ldr	r1, .L3976+24
+	mov	fp, #1
 	ldr	r3, [r2, #24]
 	str	r2, [sp, #60]
-	movs	r2, #1
 	ldrh	r0, [r1]
-	ldr	r1, .L3931+20
+	ldr	r1, .L3976+12
 	str	r3, [sp, #56]
 	ldrb	ip, [r1]	@ zero_extendqisi2
-	ldr	r1, .L3931+24
+	ldr	r1, .L3976+28
 	rsb	ip, ip, #24
 	sub	ip, ip, r0
 	lsr	r0, r3, r0
-	lsl	ip, r2, ip
+	lsl	ip, fp, ip
 	ldrb	r1, [r1]	@ zero_extendqisi2
 	add	ip, ip, #-1
 	and	r0, ip, r0
@@ -25340,36 +25831,36 @@ zftl_read:
 	mov	r10, r0
 	uxth	r1, r0
 	ldr	r3, [sp, #56]
-	ldr	r0, .L3931+40
+	ldr	r0, .L3976+40
 	ldr	r2, [r2, #20]
 	bl	printf
 	movs	r2, #0
-	movs	r1, #1
+	mov	r1, fp
 	uxth	r0, r10
 	bl	gc_add_sblk
-	b	.L3902
-.L3907:
+	b	.L3944
+.L3952:
 	ldrb	r3, [r7, #2]	@ zero_extendqisi2
 	bic	r3, r3, #8
 	strb	r3, [r7, #2]
-	b	.L3908
-.L3914:
+	b	.L3953
+.L3959:
 	mov	r0, #-1
-	b	.L3880
-.L3932:
+	b	.L3922
+.L3977:
 	.align	2
-.L3931:
+.L3976:
 	.word	.LANCHOR230
 	.word	.LC0
-	.word	.LANCHOR10
-	.word	.LC227
-	.word	.LANCHOR75
-	.word	.LANCHOR32
-	.word	.LANCHOR76
+	.word	.LANCHOR12
+	.word	.LANCHOR31
 	.word	.LANCHOR131
-	.word	.LANCHOR63
+	.word	.LC230
+	.word	.LANCHOR74
+	.word	.LANCHOR75
+	.word	.LANCHOR62
 	.word	.LANCHOR134
-	.word	.LC226
+	.word	.LC229
 	.size	zftl_read, .-zftl_read
 	.section	.text.zftl_sys_read,"ax",%progbits
 	.align	1
@@ -25490,13 +25981,13 @@ zftl_vendor_read:
 ftl_update_l2p_map:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L3968
+	ldr	r3, .L4013
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #24
 	ldrb	r7, [r0, #9]	@ zero_extendqisi2
 	mov	r6, r0
 	ldrh	r3, [r3]
-	ldr	r2, .L3968+4
+	ldr	r2, .L4013+4
 	muls	r7, r3, r7
 	ldr	r4, [r2]
 	ldrh	r3, [r0, #12]
@@ -25506,77 +25997,77 @@ ftl_update_l2p_map:
 	subs	r3, r3, #1
 	ldr	r3, [r4, r3, lsl #2]
 	adds	r3, r3, #1
-	beq	.L3940
-	movw	r2, #1990
-	ldr	r1, .L3968+8
-	ldr	r0, .L3968+12
+	beq	.L3985
+	movw	r2, #1998
+	ldr	r1, .L4013+8
+	ldr	r0, .L4013+12
 	bl	printf
-.L3940:
+.L3985:
 	movs	r5, #0
 	subs	r4, r4, #4
 	mov	r10, r5
-.L3941:
+.L3986:
 	cmp	r10, r7
-	bne	.L3947
-	ldr	r3, .L3968+16
-	ldr	r4, .L3968+20
+	bne	.L3992
+	ldr	r3, .L4013+16
+	ldr	r4, .L4013+20
 	ldr	r3, [r3]
 	tst	r3, #4096
-	beq	.L3948
+	beq	.L3993
 	ldrh	r1, [r6]
 	mov	r2, r5
 	ldr	r3, [r4]
-	ldr	r0, .L3968+24
+	ldr	r0, .L4013+24
 	ldrh	r3, [r3, r1, lsl #1]
 	bl	printf
-.L3948:
+.L3993:
 	ldrh	r2, [r6]
 	ldr	r3, [r4]
 	strh	r5, [r3, r2, lsl #1]	@ movhi
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3947:
+.L3992:
 	ldr	r8, [r4, #4]!
 	cmp	r8, #-1
-	beq	.L3942
-	ldr	r3, .L3968+28
+	beq	.L3987
+	ldr	r3, .L4013+28
 	mov	r0, r8
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	lsls	r1, r1, #7
 	bl	__aeabi_uidiv
 	uxth	r3, r0
 	str	r3, [sp]
-	ldr	r3, .L3968+16
+	ldr	r3, .L4013+16
 	ldr	r3, [r3]
 	lsls	r2, r3, #19
-	bpl	.L3943
+	bpl	.L3988
 	mov	r3, r10
 	mov	r2, r8
 	ldr	r1, [sp]
-	ldr	r0, .L3968+32
+	ldr	r0, .L4013+32
 	bl	printf
-.L3943:
+.L3988:
 	mov	r8, r4
 	mov	fp, r10
-.L3946:
+.L3991:
 	ldr	r0, [r8]
 	adds	r3, r0, #1
-	beq	.L3944
-	ldr	r3, .L3968+28
+	beq	.L3989
+	ldr	r3, .L4013+28
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	lsls	r1, r1, #7
 	bl	__aeabi_uidiv
 	ldr	r3, [sp]
 	uxth	r0, r0
 	cmp	r3, r0
-	bne	.L3944
+	bne	.L3989
 	ldrb	r3, [r6, #9]	@ zero_extendqisi2
 	mov	r0, fp
 	mov	r1, r3
 	str	r3, [sp, #12]
 	bl	__aeabi_idivmod
-	ldr	r3, .L3968+36
+	ldr	r3, .L4013+36
 	adds	r1, r1, #8
 	ldrh	r0, [r6, r1, lsl #1]
 	ldrh	r2, [r3]
@@ -25588,18 +26079,18 @@ ftl_update_l2p_map:
 	bl	__aeabi_idiv
 	ldr	r2, [sp, #8]
 	add	r2, r2, r0
-	ldr	r0, .L3968+40
+	ldr	r0, .L4013+40
 	str	r2, [sp, #20]
 	ldr	r1, [r8]
 	bl	pm_ppa_update_check
-	cbz	r0, .L3945
+	cbz	r0, .L3990
 	ldr	r1, [sp, #4]
 	mov	r3, r7
 	movs	r2, #4
-	ldr	r0, .L3968+44
+	ldr	r0, .L4013+44
 	ldr	r1, [r1]
 	bl	rknand_print_hex
-.L3945:
+.L3990:
 	adds	r5, r5, #1
 	movs	r2, #1
 	uxth	r5, r5
@@ -25608,29 +26099,29 @@ ftl_update_l2p_map:
 	bl	pm_log2phys
 	mov	r3, #-1
 	str	r3, [r8]
-.L3944:
+.L3989:
 	add	fp, fp, #1
 	add	r8, r8, #4
 	cmp	r7, fp
-	bne	.L3946
-.L3942:
+	bne	.L3991
+.L3987:
 	add	r10, r10, #1
-	b	.L3941
-.L3969:
+	b	.L3986
+.L4014:
 	.align	2
-.L3968:
-	.word	.LANCHOR95
+.L4013:
+	.word	.LANCHOR94
 	.word	.LANCHOR117
 	.word	.LANCHOR231
 	.word	.LC0
-	.word	.LANCHOR14
-	.word	.LANCHOR9
-	.word	.LC231
+	.word	.LANCHOR19
+	.word	.LANCHOR11
+	.word	.LC234
 	.word	.LANCHOR131
-	.word	.LC228
+	.word	.LC231
 	.word	.LANCHOR111
-	.word	.LC229
-	.word	.LC230
+	.word	.LC232
+	.word	.LC233
 	.size	ftl_update_l2p_map, .-ftl_update_l2p_map
 	.section	.text.ftl_alloc_new_data_sblk,"ax",%progbits
 	.align	1
@@ -25651,10 +26142,10 @@ ftl_alloc_new_data_sblk:
 	ldrh	r0, [r5]
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L3971
+	beq	.L4016
 	bl	zftl_insert_data_list
-.L3971:
-	ldr	r4, .L3975
+.L4016:
+	ldr	r4, .L4020
 	mov	r0, r5
 	ldr	r1, [r4]
 	adds	r1, r1, #16
@@ -25666,12 +26157,12 @@ ftl_alloc_new_data_sblk:
 	ldr	r3, [r4]
 	ldr	r3, [r3, #560]
 	cmp	r3, r6
-	bne	.L3973
+	bne	.L4018
 	movw	r5, #65535
 	cmp	r6, r5
-	beq	.L3973
+	beq	.L4018
 	mov	r1, r6
-	ldr	r0, .L3975+4
+	ldr	r0, .L4020+4
 	bl	printf
 	ldr	r3, [r4]
 	ldr	r0, [r3, #564]
@@ -25680,18 +26171,18 @@ ftl_alloc_new_data_sblk:
 	mov	r2, #-1
 	str	r5, [r3, #560]
 	str	r2, [r3, #564]
-.L3973:
+.L4018:
 	bl	ftl_ext_info_flush
 	movs	r0, #0
 	bl	ftl_info_flush
 	bl	lpa_rebuild_hash
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L3976:
+.L4021:
 	.align	2
-.L3975:
-	.word	.LANCHOR10
-	.word	.LC232
+.L4020:
+	.word	.LANCHOR12
+	.word	.LC235
 	.size	ftl_alloc_new_data_sblk, .-ftl_alloc_new_data_sblk
 	.section	.text.ftl_write_commit,"ax",%progbits
 	.align	1
@@ -25706,13 +26197,13 @@ ftl_write_commit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #32
-	ldr	r8, .L4040+32
-.L3978:
-	ldr	r1, .L4040
+	ldr	r8, .L4087+32
+.L4023:
+	ldr	r1, .L4087
 	ldrb	r3, [r1]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L3980
-	ldr	r0, .L4040+4
+	beq	.L4025
+	ldr	r0, .L4087+4
 	subs	r3, r3, #1
 	strb	r3, [r1]
 	ldrb	r2, [r0]	@ zero_extendqisi2
@@ -25723,65 +26214,65 @@ ftl_write_commit:
 	str	r2, [sp, #20]
 	movs	r2, #48
 	muls	r2, r4, r2
-	ldr	r4, .L4040+8
+	ldr	r4, .L4087+8
 	ldr	r3, [r4]
 	add	r5, r8, r2
 	ldrb	r2, [r8, r2]	@ zero_extendqisi2
 	strb	r2, [r0]
 	ldr	r2, [r5, #20]
 	cmp	r2, r3
-	bcc	.L3982
+	bcc	.L4027
 	mov	r2, #604
-	ldr	r1, .L4040+12
-	ldr	r0, .L4040+16
+	ldr	r1, .L4087+12
+	ldr	r0, .L4087+16
 	bl	printf
-.L3982:
+.L4027:
 	ldr	r2, [sp, #12]
 	movs	r3, #48
 	mla	r3, r3, r2, r8
 	ldr	r2, [r4]
 	ldr	r7, [r3, #20]
 	cmp	r7, r2
-	bcc	.L3983
+	bcc	.L4028
 	ldr	r0, [sp, #20]
 	bl	zbuf_free
 	mov	r0, #-1
-.L3977:
+.L4022:
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3983:
+.L4028:
 	ldr	r2, [r3, #12]
 	ldr	fp, [r3, #4]
-	ldrb	r4, [r3, #41]	@ zero_extendqisi2
+	ldrb	r5, [r3, #41]	@ zero_extendqisi2
 	ldrb	r3, [r3, #40]	@ zero_extendqisi2
 	str	r2, [sp, #8]
 	str	r3, [sp, #16]
-	ldr	r3, .L4040+20
+	ldr	r3, .L4087+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L3985
-	ldr	r3, .L4040+24
-	ldrb	r5, [r3]	@ zero_extendqisi2
-	add	r5, r5, r5, lsl #1
-	add	r5, r8, r5, lsl #4
-.L3986:
-	ldrb	r3, [r5]	@ zero_extendqisi2
+	cbz	r3, .L4030
+	ldr	r3, .L4087+24
+	ldrb	r4, [r3]	@ zero_extendqisi2
+	add	r4, r4, r4, lsl #1
+	add	r4, r8, r4, lsl #4
+.L4031:
+	ldrb	r3, [r4]	@ zero_extendqisi2
 	cmp	r3, #255
-	bne	.L3987
-	ldr	r3, [r5, #20]
+	bne	.L4032
+	ldr	r3, [r4, #20]
 	cmp	r7, r3
-	bne	.L3985
+	bne	.L4030
 	ldr	r2, [sp, #16]
-	lsls	r0, r4, #9
-	ldr	r3, [r5, #4]
+	lsls	r0, r5, #9
+	ldr	r3, [r4, #4]
 	add	r1, fp, r0
 	lsls	r2, r2, #9
 	add	r0, r0, r3
 	bl	ftl_memcpy
-	ldr	r3, .L4040+28
+	ldr	r3, .L4087+28
 	movs	r0, #2
-	ldr	r2, [r5, #4]
-	ldr	r1, [r5, #12]
+	ldr	r2, [r4, #4]
+	ldr	r1, [r4, #12]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	adds	r1, r1, #16
 	subs	r3, r3, #2
@@ -25789,189 +26280,215 @@ ftl_write_commit:
 	bl	ftl_debug_info_fill
 	ldr	r0, [sp, #20]
 	bl	zbuf_free
-	b	.L3978
-.L3987:
+	b	.L4023
+.L4032:
 	add	r3, r3, r3, lsl #1
-	add	r5, r8, r3, lsl #4
-	b	.L3986
-.L3985:
+	add	r4, r8, r3, lsl #4
+	b	.L4031
+.L4030:
 	mov	r0, r7
 	bl	lpa_hash_get_ppa
 	str	r0, [sp, #28]
 	adds	r0, r0, #1
-	bne	.L3989
+	bne	.L4034
 	movs	r2, #0
 	add	r1, sp, #28
 	mov	r0, r7
 	bl	pm_log2phys
-.L3989:
-	ldr	r10, .L4040+36
+.L4034:
+	ldr	r10, .L4087+36
 	movs	r2, #0
-	ldr	r3, .L4040+32
-	mov	r5, r2
+	ldr	r3, .L4087+32
+	mov	r4, r2
 	ldr	r0, [sp, #28]
 	ldr	r6, [r10]
 	add	ip, r3, #1536
 	adds	r6, r6, #16
-.L3991:
+.L4036:
 	ldr	r1, [r3, #20]
 	cmp	r7, r1
-	bne	.L3990
+	bne	.L4035
 	ldrb	r1, [r3, #2]	@ zero_extendqisi2
 	tst	r1, #8
-	beq	.L3990
-	ldr	r5, [r3, #4]
+	beq	.L4035
+	ldr	r4, [r3, #4]
 	movs	r2, #1
 	ldr	r0, [r3, #24]
 	bic	r1, r1, #8
 	strb	r1, [r3, #2]
-.L3990:
+.L4035:
 	adds	r3, r3, #48
 	cmp	r3, ip
-	bne	.L3991
-	cbz	r2, .L3992
+	bne	.L4036
+	cbz	r2, .L4037
 	str	r0, [sp, #28]
-.L3992:
-	ldr	r3, .L4040+28
+.L4037:
+	ldr	r3, .L4087+28
 	ldr	r2, [sp, #16]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r2, r3
-	bcs	.L4016
-	cbz	r5, .L3994
-	cbz	r4, .L3995
-	lsls	r2, r4, #9
-	mov	r1, r5
+	bcs	.L4063
+	cbz	r4, .L4039
+	cbz	r5, .L4040
+	lsls	r2, r5, #9
+	mov	r1, r4
 	mov	r0, fp
 	bl	ftl_memcpy
-	ldr	r3, .L4040+36
-	ldr	r6, [r3]
+	ldr	r6, [r10]
 	adds	r6, r6, #48
-.L3995:
+.L4040:
 	ldr	r3, [sp, #16]
-	add	r4, r4, r3
-	ldr	r3, .L4040+28
+	add	r5, r5, r3
+	ldr	r3, .L4087+28
 	ldrb	r2, [r3]	@ zero_extendqisi2
-	cmp	r4, r2
-	bcc	.L3996
+	cmp	r5, r2
+	bcc	.L4041
 	ldr	r6, [r10]
 	adds	r6, r6, #16
-.L4016:
+.L4063:
 	mov	r10, #0
-	b	.L3993
-.L3996:
-	lsls	r0, r4, #9
-	subs	r2, r2, r4
+	b	.L4038
+.L4041:
+	lsls	r0, r5, #9
+	subs	r2, r2, r5
 	lsls	r2, r2, #9
-	adds	r1, r5, r0
+	adds	r1, r4, r0
 	add	r0, r0, fp
 	bl	ftl_memcpy
-	b	.L4016
-.L4041:
+	b	.L4063
+.L4088:
 	.align	2
-.L4040:
-	.word	.LANCHOR67
+.L4087:
 	.word	.LANCHOR66
+	.word	.LANCHOR65
 	.word	.LANCHOR128
 	.word	.LANCHOR232
 	.word	.LC0
 	.word	.LANCHOR129
-	.word	.LANCHOR185
+	.word	.LANCHOR182
 	.word	.LANCHOR131
-	.word	.LANCHOR56
-	.word	.LANCHOR10
-.L3994:
+	.word	.LANCHOR55
+	.word	.LANCHOR12
+.L4039:
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
-	beq	.L3997
+	beq	.L4042
 	movs	r0, #1
 	bl	buf_alloc
 	ldr	r3, [sp, #28]
-	mov	r5, r0
+	mov	r4, r0
 	str	r7, [r0, #20]
 	movs	r1, #1
 	str	r3, [r0, #24]
 	bl	sblk_read_page
-	ldr	r3, [r5, #12]
+	ldr	r3, [r4, #12]
 	ldr	r2, [r3, #12]
-	ldr	r3, [r3, #4]
 	add	r10, r2, #1
+	ldr	r2, [r3, #4]
+	cmp	r7, r2
+	bne	.L4043
+	ldr	r2, [r4, #36]
+	adds	r2, r2, #1
+	bne	.L4044
+.L4043:
+	ldr	r2, .L4089
+	movs	r0, #1
+	ldr	r1, [r4, #24]
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	rsb	lr, r2, #24
+	lsls	r0, r0, r2
+	subs	r2, r0, #1
+	lsr	r0, r1, lr
+	lsl	ip, r2, lr
+	ands	r0, r0, r2
+	ldr	r2, .L4089+4
+	bic	r1, r1, ip
+	uxtb	r0, r0
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	str	r2, [sp]
+	ldr	r2, [r4, #4]
+	bl	flash_read_page_en
+	str	r0, [r4, #36]
+.L4044:
+	ldr	r3, [r4, #12]
+	ldr	r3, [r3, #4]
 	cmp	r7, r3
-	bne	.L3998
-	ldr	r3, [r5, #36]
+	bne	.L4045
+	ldr	r3, [r4, #36]
 	adds	r3, r3, #1
-	bne	.L3999
-.L3998:
-	ldr	r3, .L4042
-	ldr	r0, .L4042+4
+	bne	.L4046
+.L4045:
+	ldr	r3, .L4089+8
+	ldr	r0, .L4089+12
 	ldr	r2, [r3]
 	ldr	r3, [r2, #552]
 	adds	r3, r3, #1
 	str	r3, [r2, #552]
-	ldr	r3, [r5, #36]
-	ldrb	r1, [r5, #1]	@ zero_extendqisi2
+	ldr	r3, [r4, #36]
+	ldrb	r1, [r4, #1]	@ zero_extendqisi2
 	ldr	r2, [sp, #28]
 	str	r3, [sp]
 	mov	r3, r7
 	bl	printf
 	movs	r3, #4
-	ldr	r1, [r5, #12]
+	ldr	r1, [r4, #12]
 	mov	r2, r3
-	ldr	r0, .L4042+8
+	ldr	r0, .L4089+16
 	bl	rknand_print_hex
-.L3999:
-	ldr	r3, [r5, #12]
+.L4046:
+	ldr	r3, [r4, #12]
 	ldr	r3, [r3, #4]
 	cmp	r7, r3
-	bne	.L4000
-	ldr	r3, [r5, #36]
+	bne	.L4047
+	ldr	r3, [r4, #36]
 	adds	r3, r3, #1
-	bne	.L4001
-.L4000:
-	movw	r2, #691
-	ldr	r1, .L4042+12
-	ldr	r0, .L4042+16
-	bl	printf
-.L4001:
-	cbz	r4, .L4002
+	bne	.L4048
+.L4047:
+	mov	r2, #696
+	ldr	r1, .L4089+20
+	ldr	r0, .L4089+24
+	bl	printf
+.L4048:
+	cbz	r5, .L4049
 	ldr	r3, [sp, #28]
-	lsls	r2, r4, #9
+	lsls	r2, r5, #9
 	adds	r3, r3, #1
-	beq	.L4003
-	ldr	r1, [r5, #4]
+	beq	.L4050
+	ldr	r1, [r4, #4]
 	mov	r0, fp
 	bl	ftl_memcpy
-.L4004:
-	ldr	r3, .L4042
+.L4051:
+	ldr	r3, .L4089+8
 	ldr	r6, [r3]
 	adds	r6, r6, #48
-.L4002:
+.L4049:
 	ldr	r3, [sp, #16]
-	add	r4, r4, r3
-	ldr	r3, .L4042+20
+	add	r5, r5, r3
+	ldr	r3, .L4089+4
 	ldrb	r2, [r3]	@ zero_extendqisi2
-	cmp	r4, r2
-	bcc	.L4005
-	bls	.L4006
-	ldr	r3, .L4042
+	cmp	r5, r2
+	bcc	.L4052
+	bls	.L4053
+	ldr	r3, .L4089+8
 	ldr	r6, [r3]
 	adds	r6, r6, #16
-.L4006:
-	cbz	r5, .L3993
-	ldrb	r3, [r5, #2]	@ zero_extendqisi2
-	mov	r1, r5
-	ldr	r0, .L4042+24
+.L4053:
+	cbz	r4, .L4038
+	ldrb	r3, [r4, #2]	@ zero_extendqisi2
+	mov	r1, r4
+	ldr	r0, .L4089+28
 	bic	r3, r3, #8
-	strb	r3, [r5, #2]
+	strb	r3, [r4, #2]
 	bl	buf_remove_buf
-	mov	r0, r5
+	mov	r0, r4
 	bl	zbuf_free
-.L3993:
+.L4038:
 	ldrh	r3, [r6, #6]
-	cbnz	r3, .L4008
+	cbnz	r3, .L4055
 	bl	ftl_flush
 	mov	r0, r6
 	bl	ftl_alloc_new_data_sblk
-.L4008:
+.L4055:
 	mov	r0, r6
 	movs	r5, #48
 	bl	ftl_get_new_free_page
@@ -25988,7 +26505,7 @@ ftl_write_commit:
 	movs	r7, #0
 	ldr	r2, [sp, #28]
 	str	r2, [r3, #8]
-	ldr	r3, .L4042+20
+	ldr	r3, .L4089+4
 	str	r7, [r1, #16]!
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	subs	r2, r2, #2
@@ -25999,11 +26516,12 @@ ftl_write_commit:
 	ldr	r1, [sp, #20]
 	str	r3, [r4, #24]
 	ldr	r3, [sp, #28]
-	ldr	r0, .L4042+28
+	ldr	r0, .L4089+32
 	str	r3, [r4, #28]
 	movs	r3, #255
 	strb	r3, [r8, r5]
 	ldrb	r3, [r4, #2]	@ zero_extendqisi2
+	ldr	r5, .L4089+36
 	orr	r3, r3, #10
 	strb	r3, [r4, #2]
 	ldrh	r3, [r6, #10]
@@ -26011,23 +26529,22 @@ ftl_write_commit:
 	subs	r3, r3, #1
 	strh	r3, [r4, #32]	@ movhi
 	bl	buf_add_tail
-	ldr	r2, .L4042+32
-	ldrb	r3, [r2]	@ zero_extendqisi2
+	ldrb	r3, [r5]	@ zero_extendqisi2
+	ldr	r2, .L4089+40
 	adds	r3, r3, #1
 	uxtb	r3, r3
-	strb	r3, [r2]
-	cmp	r3, #2
-	ldr	r2, .L4042+36
 	str	r7, [r2]
 	ldrh	r2, [r6, #6]
-	bhi	.L4009
+	cmp	r3, #2
+	strb	r3, [r5]
+	bhi	.L4056
 	cmp	r2, #1
-	bne	.L3981
-.L4009:
-	ldr	r5, .L4042+28
-	movs	r7, #48
+	bne	.L4026
+.L4056:
+	ldr	r7, .L4089+32
+	mov	ip, #48
 	ldrb	r1, [r6, #5]	@ zero_extendqisi2
-	ldrb	r0, [r5]	@ zero_extendqisi2
+	ldrb	r0, [r7]	@ zero_extendqisi2
 	cmp	r1, #0
 	mov	r1, #0
 	ite	ne
@@ -26037,85 +26554,85 @@ ftl_write_commit:
 	it	eq
 	moveq	r4, r3
 	mov	r2, r0
-.L4013:
+.L4060:
 	cmp	r1, r4
-	bne	.L4014
-	strb	r2, [r5]
+	bne	.L4061
 	uxtb	r1, r1
-	ldr	r2, .L4042+32
 	add	r0, r0, r0, lsl #1
+	strb	r2, [r7]
 	subs	r3, r3, r1
 	add	r0, r8, r0, lsl #4
-	strb	r3, [r2]
+	strb	r3, [r5]
 	bl	sblk_prog_page
 	ldrh	r3, [r6, #6]
 	cmp	r3, #1
-	bne	.L3981
+	bne	.L4026
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	mov	r0, r6
 	bl	ftl_write_last_log_page
 	mov	r0, r6
 	bl	ftl_alloc_new_data_sblk
-.L3981:
-	ldr	r3, .L4042+40
+.L4026:
+	ldr	r3, .L4089+44
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L3978
-.L3980:
+	bne	.L4023
+.L4025:
 	bl	ftl_write_completed
 	movs	r0, #0
-	b	.L3977
-.L4005:
+	b	.L4022
+.L4052:
 	ldr	r3, [sp, #28]
-	subs	r2, r2, r4
+	subs	r2, r2, r5
 	lsls	r2, r2, #9
-	lsls	r0, r4, #9
+	lsls	r0, r5, #9
 	adds	r3, r3, #1
-	beq	.L4007
-	ldr	r1, [r5, #4]
+	beq	.L4054
+	ldr	r1, [r4, #4]
 	add	r1, r1, r0
 	add	r0, r0, fp
 	bl	ftl_memcpy
-	b	.L4006
-.L4007:
+	b	.L4053
+.L4054:
 	movs	r1, #0
 	add	r0, r0, fp
 	bl	ftl_memset
-	b	.L4006
-.L4014:
-	muls	r2, r7, r2
+	b	.L4053
+.L4061:
+	mul	r2, ip, r2
 	adds	r1, r1, #1
 	ldrb	r2, [r8, r2]	@ zero_extendqisi2
-	b	.L4013
-.L4015:
-	lsls	r2, r4, #9
-	mov	r10, r5
-.L4003:
+	b	.L4060
+.L4062:
+	lsls	r2, r5, #9
+	mov	r10, r4
+.L4050:
 	movs	r1, #0
 	mov	r0, fp
 	bl	ftl_memset
-	b	.L4004
-.L3997:
-	cmp	r4, #0
-	bne	.L4015
-	mov	r10, r4
-	mov	r5, r4
-	b	.L4002
-.L4043:
-	.align	2
+	b	.L4051
 .L4042:
-	.word	.LANCHOR10
-	.word	.LC233
-	.word	.LC205
+	cmp	r5, #0
+	bne	.L4062
+	mov	r10, r5
+	mov	r4, r5
+	b	.L4049
+.L4090:
+	.align	2
+.L4089:
+	.word	.LANCHOR31
+	.word	.LANCHOR131
+	.word	.LANCHOR12
+	.word	.LC236
+	.word	.LC208
 	.word	.LANCHOR232
 	.word	.LC0
-	.word	.LANCHOR131
-	.word	.LANCHOR63
-	.word	.LANCHOR185
+	.word	.LANCHOR62
+	.word	.LANCHOR182
 	.word	.LANCHOR129
 	.word	.LANCHOR233
-	.word	.LANCHOR67
+	.word	.LANCHOR66
 	.size	ftl_write_commit, .-ftl_write_commit
 	.section	.text.gc_do_copy_back,"ax",%progbits
 	.align	1
@@ -26128,17 +26645,17 @@ ftl_write_commit:
 gc_do_copy_back:
 	@ args = 0, pretend = 0, frame = 72
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L4187
+	ldr	r3, .L4234
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #80
 	ldrb	r0, [r3]	@ zero_extendqisi2
 	cmp	r0, #0
-	bne	.L4045
+	bne	.L4092
 	bl	buf_alloc
 	mov	r4, r0
 	cmp	r0, #0
-	beq	.L4044
-	ldr	r5, .L4187+4
+	beq	.L4091
+	ldr	r5, .L4234+4
 	ldrh	r2, [r5, #22]
 	mov	r0, r2
 	bl	gc_get_src_ppa_from_index
@@ -26151,60 +26668,60 @@ gc_do_copy_back:
 	bl	sblk_read_page
 	ldr	r3, [r4, #36]
 	adds	r0, r3, #1
-	beq	.L4047
+	beq	.L4094
 	cmp	r3, #512
-	bne	.L4048
-.L4047:
+	bne	.L4095
+.L4094:
 	mov	r2, #1032
-	ldr	r1, .L4187+8
-	ldr	r0, .L4187+12
+	ldr	r1, .L4234+8
+	ldr	r0, .L4234+12
 	bl	printf
-.L4048:
+.L4095:
 	ldr	r3, [r4, #12]
 	ldr	r8, [r3, #4]
 	mov	r0, r8
 	bl	lpa_hash_get_ppa
 	str	r0, [sp, #56]
 	adds	r0, r0, #1
-	bne	.L4049
+	bne	.L4096
 	movs	r2, #0
 	add	r1, sp, #56
 	mov	r0, r8
 	bl	pm_log2phys
-.L4049:
+.L4096:
 	ldr	r7, [sp, #56]
 	cmp	r6, r7
-	bne	.L4050
-	ldr	r0, .L4187+16
+	bne	.L4097
+	ldr	r0, .L4234+16
 	movs	r3, #0
-.L4053:
+.L4100:
 	adds	r2, r0, r3
 	ldr	r1, [r2, #20]
 	cmp	r8, r1
-	bne	.L4051
+	bne	.L4098
 	ldrb	r2, [r2, #2]	@ zero_extendqisi2
 	lsls	r1, r2, #30
-	bpl	.L4051
+	bpl	.L4098
 	mov	r0, r4
 	bl	zbuf_free
-	ldr	r3, .L4187+20
+	ldr	r3, .L4234+20
 	ldr	r3, [r3]
 	lsls	r2, r3, #23
-	bpl	.L4044
+	bpl	.L4091
 	ldrh	r3, [r5, #22]
 	mov	r2, r6
 	mov	r1, r8
-	ldr	r0, .L4187+24
+	ldr	r0, .L4234+24
 	bl	printf
-.L4044:
+.L4091:
 	add	sp, sp, #80
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L4051:
+.L4098:
 	adds	r3, r3, #48
 	cmp	r3, #1536
-	bne	.L4053
-	ldr	r3, .L4187+28
+	bne	.L4100
+	ldr	r3, .L4234+28
 	movs	r2, #0
 	str	r8, [r4, #20]
 	strb	r2, [r4, #41]
@@ -26214,10 +26731,10 @@ gc_do_copy_back:
 	ldr	r1, [r3]
 	str	r1, [r4, #16]
 	str	r2, [r3, #16]
-	ldr	r3, .L4187+20
+	ldr	r3, .L4234+20
 	ldr	r3, [r3]
 	lsls	r3, r3, #23
-	bpl	.L4054
+	bpl	.L4101
 	mov	r0, r8
 	bl	lpa_hash_get_ppa
 	ldrh	r3, [r5, #22]
@@ -26226,13 +26743,13 @@ gc_do_copy_back:
 	mov	r1, r8
 	str	r3, [sp, #4]
 	mov	r3, r0
-	ldr	r0, .L4187+32
+	ldr	r0, .L4234+32
 	bl	printf
-.L4054:
+.L4101:
 	mov	r0, r4
 	bl	ftl_gc_write_buf
 	bl	ftl_write_commit
-	ldr	r3, .L4187+36
+	ldr	r3, .L4234+36
 	ldr	r2, [r3]
 	ldr	r3, [r2, #60]
 	adds	r3, r3, #1
@@ -26240,12 +26757,12 @@ gc_do_copy_back:
 	ldrh	r3, [r5, #24]
 	adds	r3, r3, #1
 	strh	r3, [r5, #24]	@ movhi
-	b	.L4044
-.L4050:
-	ldr	r3, .L4187+20
+	b	.L4091
+.L4097:
+	ldr	r3, .L4234+20
 	ldr	r3, [r3]
 	lsls	r0, r3, #23
-	bpl	.L4055
+	bpl	.L4102
 	mov	r0, r8
 	bl	lpa_hash_get_ppa
 	ldrh	r3, [r5, #22]
@@ -26254,107 +26771,107 @@ gc_do_copy_back:
 	mov	r1, r8
 	str	r3, [sp, #4]
 	mov	r3, r0
-	ldr	r0, .L4187+32
+	ldr	r0, .L4234+32
 	bl	printf
-.L4055:
+.L4102:
 	mov	r0, r4
 	bl	zbuf_free
-	b	.L4044
-.L4045:
-	ldr	r3, .L4187+40
+	b	.L4091
+.L4092:
+	ldr	r3, .L4234+40
 	ldr	r3, [r3]
 	ldrb	r6, [r3, #89]	@ zero_extendqisi2
 	str	r3, [sp, #28]
-	ldr	r3, .L4187+44
+	ldr	r3, .L4234+44
 	uxth	r7, r6
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r7
-	bhi	.L4113
+	bhi	.L4160
 	cmp	r7, #2
 	mov	fp, r7
 	it	cs
 	movcs	fp, #2
-.L4056:
-	ldr	r3, .L4187+48
-	ldr	r5, .L4187+4
+.L4103:
+	ldr	r3, .L4234+48
+	ldr	r5, .L4234+4
 	ldrb	r8, [r3]	@ zero_extendqisi2
 	cmp	r8, #3
-	bne	.L4057
-	ldr	r3, .L4187+52
+	bne	.L4104
+	ldr	r3, .L4234+52
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L4058
+	beq	.L4105
 	ldrh	r3, [r5, #2102]
 	mov	r1, r6
 	mov	r0, r3
 	str	r3, [sp, #12]
 	bl	__aeabi_idiv
-	ldr	r3, .L4187+56
+	ldr	r3, .L4234+56
 	uxth	r4, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L4059
-	ldr	r3, .L4187+60
+	beq	.L4106
+	ldr	r3, .L4234+60
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
 	ite	eq
 	moveq	r3, #1
 	movne	r3, #2
-.L4179:
+.L4226:
 	str	r3, [sp, #16]
 	smulbb	r7, r7, r4
 	ldr	r3, [sp, #12]
 	subs	r7, r3, r7
 	uxth	r3, r7
 	str	r3, [sp, #20]
-.L4061:
+.L4108:
 	ldr	r3, [sp, #16]
-	ldr	r10, .L4187+60
+	ldr	r10, .L4234+60
 	mul	r3, fp, r3
 	str	r3, [sp, #24]
-	ldr	r3, .L4187+64
+	ldr	r3, .L4234+64
 	ldrh	r1, [r3]
-	ldr	r3, .L4187+68
+	ldr	r3, .L4234+68
 	muls	r1, r6, r1
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	movs	r6, #0
 	subs	r1, r1, r3
-	ldr	r3, .L4187+56
+	ldr	r3, .L4234+56
 	ldrb	r8, [r3]	@ zero_extendqisi2
-	ldr	r3, .L4187+72
+	ldr	r3, .L4234+72
 	ldr	r7, [r3]
 	ldrh	r3, [r5, #20]
 	str	r3, [sp, #32]
-	ldr	r3, .L4187+4
-.L4065:
+	ldr	r3, .L4234+4
+.L4112:
 	ldr	r0, [sp, #24]
 	uxth	ip, r6
 	mov	r2, ip
 	cmp	ip, r0
-	bge	.L4121
+	bge	.L4168
 	ldr	r0, [sp, #12]
 	add	r2, r2, r0
 	cmp	r2, r1
-	blt	.L4066
+	blt	.L4113
 	cmp	r8, #0
-	beq	.L4121
+	beq	.L4168
 	ldrh	r0, [r10, r4, lsl #1]
 	cmp	r0, r4
-	bcc	.L4067
-.L4121:
+	bcc	.L4114
+.L4168:
 	movs	r3, #1
 	str	r3, [sp, #24]
-	b	.L4063
-.L4113:
+	b	.L4110
+.L4160:
 	mov	fp, #1
-	b	.L4056
-.L4059:
-	ldr	r3, .L4187+76
+	b	.L4103
+.L4106:
+	ldr	r3, .L4234+76
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L4115
+	cbz	r3, .L4162
 	sub	r3, r4, #62
 	cmp	r3, #2160
-	bcs	.L4116
+	bcs	.L4163
 	mov	r1, r8
 	mov	r0, r4
 	bl	__aeabi_uidivmod
@@ -26363,18 +26880,18 @@ gc_do_copy_back:
 	ite	ne
 	movne	r3, #1
 	moveq	r3, #2
-	b	.L4179
-.L4115:
+	b	.L4226
+.L4162:
 	movs	r3, #1
-	b	.L4179
-.L4116:
+	b	.L4226
+.L4163:
 	movs	r3, #2
-	b	.L4179
-.L4058:
-	ldr	r3, .L4187+80
+	b	.L4226
+.L4105:
+	ldr	r3, .L4234+80
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L4062
+	beq	.L4109
 	ldrh	r3, [r5, #2102]
 	add	r1, r6, r6, lsl #1
 	mov	r0, r3
@@ -26383,53 +26900,53 @@ gc_do_copy_back:
 	uxth	r4, r0
 	muls	r0, r6, r0
 	ldr	r3, [sp, #12]
-	ldr	r2, .L4187+84
+	ldr	r2, .L4234+84
 	sub	r0, r0, r0, lsl #2
 	add	r0, r0, r3
 	smull	r2, r3, r0, r2
 	sub	r0, r3, r0, asr #31
 	uxth	r3, r0
 	str	r3, [sp, #20]
-	ldr	r3, .L4187+88
+	ldr	r3, .L4234+88
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L4118
+	cbz	r3, .L4165
 	add	r4, r4, r4, lsl #1
 	uxth	r4, r4
-.L4118:
+.L4165:
 	str	r8, [sp, #16]
-	b	.L4061
-.L4188:
+	b	.L4108
+.L4235:
 	.align	2
-.L4187:
-	.word	.LANCHOR85
-	.word	.LANCHOR71
+.L4234:
+	.word	.LANCHOR84
+	.word	.LANCHOR70
 	.word	.LANCHOR234
 	.word	.LC0
-	.word	.LANCHOR56
-	.word	.LANCHOR14
-	.word	.LC234
+	.word	.LANCHOR55
+	.word	.LANCHOR19
+	.word	.LC237
 	.word	.LANCHOR131
-	.word	.LC235
+	.word	.LC238
 	.word	.LANCHOR110
-	.word	.LANCHOR10
-	.word	.LANCHOR80
+	.word	.LANCHOR12
 	.word	.LANCHOR79
-	.word	.LANCHOR36
+	.word	.LANCHOR78
+	.word	.LANCHOR35
 	.word	.LANCHOR124
 	.word	.LANCHOR235
-	.word	.LANCHOR86
+	.word	.LANCHOR85
 	.word	.LANCHOR224
-	.word	.LANCHOR163
+	.word	.LANCHOR160
 	.word	.LANCHOR217
-	.word	.LANCHOR84
+	.word	.LANCHOR83
 	.word	1431655766
-	.word	.LANCHOR37
-.L4062:
+	.word	.LANCHOR36
+.L4109:
 	ldrh	r10, [r5, #2102]
 	mov	r1, r6
 	mov	r0, r10
 	bl	__aeabi_idiv
-	ldr	r3, .L4189
+	ldr	r3, .L4236
 	smulbb	r7, r0, r7
 	str	r8, [sp, #16]
 	ldrh	r3, [r3, r0, lsl #1]
@@ -26445,8 +26962,8 @@ gc_do_copy_back:
 	str	r3, [sp, #12]
 	ldr	r3, [sp, #24]
 	cmp	r3, #1
-	beq	.L4061
-.L4063:
+	beq	.L4108
+.L4110:
 	ldr	r3, [sp, #16]
 	ldrh	r2, [sp, #16]
 	mul	r3, fp, r3
@@ -26461,32 +26978,32 @@ gc_do_copy_back:
 	uxth	r3, r3
 	str	r3, [sp, #48]
 	movs	r3, #0
-.L4183:
+.L4230:
 	str	r3, [sp, #36]
 	ldr	r2, [sp, #40]
 	ldrh	r6, [sp, #36]
 	cmp	r6, r2
 	str	r6, [sp, #32]
-	blt	.L4095
-	ldr	r3, .L4189+4
+	blt	.L4142
+	ldr	r3, .L4236+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #3
-	bne	.L4096
-	ldr	r3, .L4189+8
+	bne	.L4143
+	ldr	r3, .L4236+8
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	cmp	r1, #0
-	beq	.L4097
+	beq	.L4144
 	movs	r1, #0
 	subs	r2, r2, #1
-.L4098:
+.L4145:
 	uxth	r3, r1
 	adds	r1, r1, #1
 	cmp	r3, r2
-	blt	.L4099
+	blt	.L4146
 	add	r3, sp, #80
 	add	r2, r3, r2, lsl #2
 	ldr	r3, [r2, #-24]
-.L4184:
+.L4231:
 	movs	r2, #255
 	strb	r2, [r3]
 	ldrh	r3, [sp, #16]
@@ -26494,11 +27011,11 @@ gc_do_copy_back:
 	smulbb	r1, fp, r3
 	uxtb	r1, r1
 	bl	sblk_prog_page
-	b	.L4100
-.L4057:
-	ldr	r3, .L4189+12
+	b	.L4147
+.L4104:
+	ldr	r3, .L4236+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L4064
+	cbnz	r3, .L4111
 	ldrh	r3, [r5, #2102]
 	mov	r1, r6
 	mov	r0, r3
@@ -26511,10 +27028,10 @@ gc_do_copy_back:
 	uxth	r3, r7
 	str	r3, [sp, #20]
 	movs	r3, #1
-.L4180:
+.L4227:
 	str	r3, [sp, #16]
-	b	.L4061
-.L4064:
+	b	.L4108
+.L4111:
 	ldrh	r3, [r5, #2102]
 	mov	r1, r6
 	mov	r0, r3
@@ -26527,52 +27044,52 @@ gc_do_copy_back:
 	uxth	r3, r7
 	str	r3, [sp, #20]
 	movs	r3, #2
-	b	.L4180
-.L4067:
+	b	.L4227
+.L4114:
 	tst	ip, #1
-	beq	.L4121
-.L4066:
+	beq	.L4168
+.L4113:
 	ldr	r0, [r7, r2, lsl #2]
 	adds	r0, r0, #1
-	bne	.L4069
+	bne	.L4116
 	ldrh	r5, [r3, #22]
 	ldr	r0, [sp, #32]
 	cmp	r5, r0
-	bcs	.L4044
+	bcs	.L4091
 	cmp	r8, #0
-	beq	.L4070
+	beq	.L4117
 	ldrh	r0, [r10, r4, lsl #1]
 	cmp	r0, r4
-	bcs	.L4070
+	bcs	.L4117
 	tst	ip, #1
-	beq	.L4070
+	beq	.L4117
 	ldr	r0, [r7, r0, lsl #2]
-.L4181:
+.L4228:
 	str	r0, [r7, r2, lsl #2]
-.L4069:
+.L4116:
 	adds	r6, r6, #1
-	b	.L4065
-.L4070:
+	b	.L4112
+.L4117:
 	mov	r0, r5
 	str	r3, [sp, #36]
 	bl	gc_get_src_ppa_from_index
 	ldr	r3, [sp, #36]
 	adds	r5, r5, #1
 	strh	r5, [r3, #22]	@ movhi
-	b	.L4181
-.L4095:
+	b	.L4228
+.L4142:
 	ldr	r3, [sp, #12]
 	ldr	r2, [sp, #32]
 	adds	r7, r3, r2
-	ldr	r3, .L4189+16
+	ldr	r3, .L4236+16
 	ldr	r3, [r3]
 	ldrb	r3, [r3, r7]	@ zero_extendqisi2
 	cmp	r3, #255
-	bne	.L4072
+	bne	.L4119
 	movs	r0, #0
 	bl	buf_alloc
 	mov	r5, r0
-	cbnz	r0, .L4073
+	cbnz	r0, .L4120
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	bl	gc_write_completed
@@ -26581,13 +27098,13 @@ gc_do_copy_back:
 	bl	buf_alloc
 	mov	r5, r0
 	cmp	r0, #0
-	beq	.L4044
-.L4073:
-	ldr	r3, .L4189+16
+	beq	.L4091
+.L4120:
+	ldr	r3, .L4236+16
 	ldrb	r2, [r5, #1]	@ zero_extendqisi2
 	ldr	r3, [r3]
 	strb	r2, [r3, r7]
-	ldr	r2, .L4189+20
+	ldr	r2, .L4236+20
 	ldrb	r3, [r2, #7]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	strb	r3, [r2, #7]
@@ -26596,70 +27113,70 @@ gc_do_copy_back:
 	strh	r3, [r5, #32]	@ movhi
 	ldrb	r3, [sp, #24]	@ zero_extendqisi2
 	strb	r3, [r5, #45]
-	ldr	r3, .L4189+24
+	ldr	r3, .L4236+24
 	ldrh	r2, [r3]
-	ldr	r3, .L4189+28
+	ldr	r3, .L4236+28
 	ldrb	r0, [r3]	@ zero_extendqisi2
 	ldr	r3, [sp, #28]
 	ldrb	r3, [r3, #89]	@ zero_extendqisi2
 	muls	r3, r2, r3
 	subs	r3, r3, r0
 	cmp	r7, r3
-	blt	.L4074
-	ldr	r1, .L4189+32
+	blt	.L4121
+	ldr	r1, .L4236+32
 	ldrb	r1, [r1]	@ zero_extendqisi2
-	cbz	r1, .L4075
-	ldr	r1, .L4189+36
+	cbz	r1, .L4122
+	ldr	r1, .L4236+36
 	ldrh	r1, [r1, r4, lsl #1]
 	cmp	r1, r4
-	bcs	.L4075
+	bcs	.L4122
 	lsls	r1, r6, #31
-	bmi	.L4074
-.L4075:
-	ldr	r1, .L4189+40
+	bmi	.L4121
+.L4122:
+	ldr	r1, .L4236+40
 	cmp	r0, #2
 	mov	ip, #-1
 	ldr	r1, [r1]
 	str	ip, [r1, r7, lsl #2]
-	bne	.L4076
+	bne	.L4123
 	cmp	r7, r3
-	ldr	r10, .L4189+68
-	bne	.L4077
+	ldr	r10, .L4236+68
+	bne	.L4124
 	ldrh	r2, [r10]
 	ldr	r0, [r5, #4]
 	bl	ftl_memcpy
-	ldr	r3, .L4189+44
+	ldr	r3, .L4236+44
 	movs	r1, #0
 	ldr	r0, [r5, #12]
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	lsls	r2, r2, #1
 	bl	ftl_memset
 	ldr	r8, [r5, #12]
-	ldr	r3, .L4189+48
+	ldr	r3, .L4236+48
 	ldr	r0, [r5, #4]
 	ldrh	r1, [r10]
 	str	r3, [r8]
 	bl	js_hash
-	ldr	r3, .L4189+52
+	ldr	r3, .L4236+52
 	str	r0, [r8, #4]
 	ldr	r3, [r3]
 	ldr	r3, [r3, #132]
 	str	r3, [r8, #8]
 	movs	r3, #0
 	str	r3, [r8, #12]
-.L4078:
+.L4125:
 	ldr	r3, [r5, #12]
 	movs	r2, #0
 	str	r2, [r3, #16]
-.L4072:
-	ldr	r3, .L4189+16
+.L4119:
+	ldr	r3, .L4236+16
 	add	r2, sp, #80
 	ldr	r3, [r3]
 	ldrb	r5, [r3, r7]	@ zero_extendqisi2
 	str	r3, [sp, #52]
 	ldr	r3, [sp, #32]
 	add	r1, r2, r3, lsl #2
-	ldr	r2, .L4189+56
+	ldr	r2, .L4236+56
 	add	r3, r5, r5, lsl #1
 	add	r3, r2, r3, lsl #4
 	str	r3, [r1, #-24]
@@ -26669,35 +27186,35 @@ gc_do_copy_back:
 	strb	r3, [r1, #45]
 	movs	r3, #2
 	strh	r3, [r1, #34]	@ movhi
-	ldr	r3, .L4189+4
+	ldr	r3, .L4236+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #3
-	bne	.L4086
-	ldr	r3, .L4189+8
+	bne	.L4133
+	ldr	r3, .L4236+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L4087
-	ldr	r3, .L4189+32
+	beq	.L4134
+	ldr	r3, .L4236+32
 	and	r2, r6, #1
 	add	r10, r2, r4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L4088
-	ldr	r3, .L4189+36
+	cbz	r3, .L4135
+	ldr	r3, .L4236+36
 	ldrh	r3, [r3, r4, lsl #1]
 	cmp	r3, r4
-	bcs	.L4088
+	bcs	.L4135
 	cmp	r2, #0
 	it	ne
 	movne	r10, r3
-.L4088:
-	ldr	r3, .L4189+56
+.L4135:
+	ldr	r3, .L4236+56
 	mov	r8, #48
 	ldr	r1, [sp, #16]
 	mov	r0, r6
 	mla	r8, r8, r5, r3
 	bl	__aeabi_uidiv
 	ldr	r3, [sp, #20]
-	ldr	r2, .L4189+60
+	ldr	r2, .L4236+60
 	uxtah	r0, r3, r0
 	ldr	r3, [sp, #28]
 	ldrh	r2, [r2]
@@ -26706,39 +27223,39 @@ gc_do_copy_back:
 	mla	r10, r2, r3, r10
 	orr	r3, r10, #50331648
 	str	r3, [r8, #24]
-.L4093:
-	ldr	r2, .L4189+56
+.L4140:
+	ldr	r2, .L4236+56
 	movs	r3, #48
 	mla	r5, r3, r5, r2
-	ldr	r3, .L4189+64
+	ldr	r3, .L4236+64
 	ldr	r3, [r3]
 	ldr	r1, [r5, #24]
 	ldrh	r2, [r5, #32]
 	str	r1, [r3, r2, lsl #2]
-	b	.L4112
-.L4190:
+	b	.L4159
+.L4237:
 	.align	2
-.L4189:
+.L4236:
 	.word	.LANCHOR236
-	.word	.LANCHOR79
-	.word	.LANCHOR36
-	.word	.LANCHOR81
-	.word	.LANCHOR83
-	.word	.LANCHOR71
-	.word	.LANCHOR86
+	.word	.LANCHOR78
+	.word	.LANCHOR35
+	.word	.LANCHOR80
+	.word	.LANCHOR82
+	.word	.LANCHOR70
+	.word	.LANCHOR85
 	.word	.LANCHOR224
 	.word	.LANCHOR124
 	.word	.LANCHOR235
-	.word	.LANCHOR162
+	.word	.LANCHOR159
 	.word	.LANCHOR131
 	.word	-178307901
-	.word	.LANCHOR10
-	.word	.LANCHOR56
+	.word	.LANCHOR12
+	.word	.LANCHOR55
 	.word	.LANCHOR111
-	.word	.LANCHOR164
+	.word	.LANCHOR161
 	.word	.LANCHOR221
-.L4077:
-	ldr	r0, .L4191
+.L4124:
+	ldr	r0, .L4238
 	ldrh	r3, [r10]
 	ldrb	r8, [r0]	@ zero_extendqisi2
 	ldr	r0, [r5, #4]
@@ -26748,7 +27265,7 @@ gc_do_copy_back:
 	mov	r2, r8
 	add	r1, r1, r3, lsl #2
 	bl	ftl_memcpy
-	ldr	r3, .L4191+4
+	ldr	r3, .L4238+4
 	movs	r1, #0
 	ldr	r0, [r5, #12]
 	ldrb	r2, [r3]	@ zero_extendqisi2
@@ -26756,36 +27273,36 @@ gc_do_copy_back:
 	bl	ftl_memset
 	ldr	r10, [r5, #12]
 	mov	r1, r8
-	ldr	r3, .L4191+8
+	ldr	r3, .L4238+8
 	ldr	r0, [r5, #4]
 	str	r3, [r10]
 	bl	js_hash
-	ldr	r3, .L4191+12
+	ldr	r3, .L4238+12
 	str	r0, [r10, #4]
 	ldr	r3, [r3]
 	ldr	r3, [r3, #132]
 	str	r3, [r10, #8]
 	movs	r3, #1
 	str	r3, [r10, #12]
-	b	.L4078
-.L4076:
-	ldr	r10, .L4191
+	b	.L4125
+.L4123:
+	ldr	r10, .L4238
 	ldr	r0, [r5, #4]
 	ldrb	r8, [r10]	@ zero_extendqisi2
 	mul	r2, r2, r8
 	lsls	r2, r2, #2
 	bl	ftl_memcpy
-	ldr	r3, .L4191+16
-	ldr	r1, .L4191+4
+	ldr	r3, .L4238+16
+	ldr	r1, .L4238+4
 	ldrh	r2, [r3]
 	ldrb	r3, [r10]	@ zero_extendqisi2
 	ldrb	r1, [r1]	@ zero_extendqisi2
 	muls	r3, r2, r3
 	cmp	r1, r3, asr #6
 	lsl	r2, r3, #2
-	ldr	r1, .L4191+20
+	ldr	r1, .L4238+20
 	it	lt
-	ldrlt	r3, .L4191+24
+	ldrlt	r3, .L4238+24
 	mov	r0, r2
 	ldr	r1, [r1]
 	itt	lt
@@ -26794,31 +27311,31 @@ gc_do_copy_back:
 	ldr	r3, [r5, #4]
 	add	r0, r0, r3
 	bl	ftl_memcpy
-	ldr	r3, .L4191+4
+	ldr	r3, .L4238+4
 	movs	r1, #0
 	ldr	r0, [r5, #12]
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	lsls	r2, r2, #1
 	bl	ftl_memset
 	ldr	r8, [r5, #12]
-	ldr	r3, .L4191+8
-	ldr	r2, .L4191
+	ldr	r3, .L4238+8
+	ldr	r2, .L4238
 	ldr	r0, [r5, #4]
 	str	r3, [r8]
-	ldr	r3, .L4191+16
+	ldr	r3, .L4238+16
 	ldrb	r1, [r2]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	muls	r1, r3, r1
 	lsls	r1, r1, #2
 	bl	js_hash
-	ldr	r3, .L4191+12
+	ldr	r3, .L4238+12
 	str	r0, [r8, #4]
 	ldr	r3, [r3]
 	ldr	r3, [r3, #132]
 	str	r3, [r8, #8]
-	b	.L4078
-.L4074:
-	ldr	r3, .L4191+20
+	b	.L4125
+.L4121:
+	ldr	r3, .L4238+20
 	movs	r1, #1
 	mov	r0, r5
 	ldr	r3, [r3]
@@ -26827,20 +27344,20 @@ gc_do_copy_back:
 	bl	sblk_read_page
 	ldr	r3, [r5, #36]
 	adds	r1, r3, #1
-	beq	.L4080
+	beq	.L4127
 	cmp	r3, #512
-	bne	.L4084
-.L4080:
-	ldr	r3, .L4191+28
+	bne	.L4131
+.L4127:
+	ldr	r3, .L4238+28
 	movs	r0, #1
 	ldr	r2, [r5, #24]
 	ldrh	r1, [r3]
-	ldr	r3, .L4191+32
+	ldr	r3, .L4238+32
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	lsrs	r2, r2, r1
 	rsb	r3, r3, #24
 	subs	r3, r3, r1
-	ldr	r1, .L4191+36
+	ldr	r1, .L4238+36
 	lsl	r3, r0, r3
 	subs	r3, r3, #1
 	ldrb	r1, [r1]	@ zero_extendqisi2
@@ -26851,45 +27368,45 @@ gc_do_copy_back:
 	bl	ftl_sblk_dump
 	ldr	r3, [r5, #36]
 	adds	r2, r3, #1
-	beq	.L4082
+	beq	.L4129
 	cmp	r3, #512
-	bne	.L4084
-.L4082:
+	bne	.L4131
+.L4129:
 	ldr	r3, [r5, #12]
 	mov	r2, #-1
 	str	r2, [r3, #4]
 	ldr	r3, [r5, #36]
 	cmp	r3, r2
-	beq	.L4083
+	beq	.L4130
 	cmp	r3, #512
-	bne	.L4084
-.L4083:
+	bne	.L4131
+.L4130:
 	movw	r2, #1223
-	ldr	r1, .L4191+40
-	ldr	r0, .L4191+44
+	ldr	r1, .L4238+40
+	ldr	r0, .L4238+44
 	bl	printf
-.L4084:
+.L4131:
 	ldr	r3, [r5, #12]
-	ldr	r2, .L4191+48
+	ldr	r2, .L4238+48
 	ldr	r1, [r3, #4]
 	ldr	r2, [r2]
 	cmp	r1, r2
 	itt	cs
 	movcs	r2, #-1
 	strcs	r2, [r3, #4]
-	ldr	r2, .L4191+52
+	ldr	r2, .L4238+52
 	ldr	r1, [r3, #4]
 	ldr	r2, [r2]
 	str	r1, [r2, r7, lsl #2]
 	ldr	r2, [r5, #24]
 	str	r2, [r3, #8]
-	b	.L4078
-.L4087:
-	ldr	r3, .L4191+56
-	ldr	r2, .L4191+60
+	b	.L4125
+.L4134:
+	ldr	r3, .L4238+56
+	ldr	r2, .L4238+60
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L4090
+	beq	.L4137
 	umull	r2, r3, r6, r2
 	ldr	r2, [sp, #20]
 	ldr	r0, [sp, #28]
@@ -26897,19 +27414,19 @@ gc_do_copy_back:
 	uxtah	r2, r2, r3
 	add	r3, r3, r3, lsl #1
 	add	r2, r0, r2, lsl #1
-	ldr	r0, .L4191+64
+	ldr	r0, .L4238+64
 	subs	r3, r6, r3
 	ldrh	r2, [r2, #96]
 	ldrh	r0, [r0]
 	mla	r2, r0, r2, r4
 	uxtah	r3, r2, r3
-.L4186:
+.L4233:
 	str	r3, [r1, #24]
 	movs	r2, #48
-	ldr	r3, .L4191+68
+	ldr	r3, .L4238+68
 	mla	r5, r2, r5, r3
-	ldr	r2, .L4191+60
-	ldr	r3, .L4191+72
+	ldr	r2, .L4238+60
+	ldr	r3, .L4238+72
 	ldr	r1, [r3]
 	umull	r2, r3, r6, r2
 	ldr	r2, [r5, #24]
@@ -26921,16 +27438,16 @@ gc_do_copy_back:
 	add	r3, r3, #16777216
 	orrs	r3, r3, r2
 	str	r3, [r1, r0, lsl #2]
-.L4112:
-	ldr	r3, .L4191+76
+.L4159:
+	ldr	r3, .L4238+76
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L4094
-	ldr	r3, .L4191+80
+	cbz	r3, .L4141
+	ldr	r3, .L4238+80
 	ldrh	r3, [r3, r4, lsl #1]
 	cmp	r3, r4
-	bcs	.L4094
+	bcs	.L4141
 	lsls	r3, r6, #31
-	bpl	.L4094
+	bpl	.L4141
 	ldr	r2, [sp, #52]
 	movs	r3, #255
 	ldr	r1, [sp, #48]
@@ -26942,61 +27459,61 @@ gc_do_copy_back:
 	ldr	r3, [r3, #-24]
 	strh	r2, [r3, #32]	@ movhi
 	ldrb	r2, [r3, #1]	@ zero_extendqisi2
-	ldr	r3, .L4191+84
+	ldr	r3, .L4238+84
 	ldr	r3, [r3]
 	strb	r2, [r3, r1]
 	mov	r2, #-1
-	ldr	r3, .L4191+20
+	ldr	r3, .L4238+20
 	ldr	r3, [r3]
 	str	r2, [r3, r7, lsl #2]
-.L4094:
+.L4141:
 	ldr	r3, [sp, #36]
 	adds	r3, r3, #1
-	b	.L4183
-.L4090:
+	b	.L4230
+.L4137:
 	umull	r2, r3, r6, r2
 	ldr	r2, [sp, #20]
 	ubfx	r3, r3, #1, #16
 	add	r3, r3, r2
 	ldr	r2, [sp, #28]
 	add	r3, r2, r3, lsl #1
-	ldr	r2, .L4191+64
+	ldr	r2, .L4238+64
 	ldrh	r3, [r3, #96]
 	ldrh	r2, [r2]
 	mla	r3, r2, r3, r4
-	b	.L4186
-.L4086:
+	b	.L4233
+.L4133:
 	cmp	r3, #2
-	bne	.L4093
-	ldr	r3, .L4191+88
+	bne	.L4140
+	ldr	r3, .L4238+88
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L4092
+	cbnz	r3, .L4139
 	ldr	r2, [sp, #20]
 	ldr	r3, [sp, #32]
 	add	r3, r3, r2
 	ldr	r2, [sp, #28]
 	add	r3, r2, r3, lsl #1
-	ldr	r2, .L4191+64
+	ldr	r2, .L4238+64
 	ldrh	r3, [r3, #96]
 	ldrh	r2, [r2]
 	mla	r3, r2, r3, r4
-.L4182:
+.L4229:
 	orr	r3, r3, #33554432
 	str	r3, [r1, #24]
-	b	.L4093
-.L4092:
+	b	.L4140
+.L4139:
 	ldr	r3, [sp, #20]
 	ldr	r2, [sp, #28]
 	add	r3, r3, r6, lsr #1
 	add	r3, r2, r3, lsl #1
-	ldr	r2, .L4191+64
+	ldr	r2, .L4238+64
 	ldrh	r3, [r3, #96]
 	ldrh	r2, [r2]
 	mla	r3, r2, r3, r4
 	and	r2, r6, #1
 	add	r3, r3, r2
-	b	.L4182
-.L4099:
+	b	.L4229
+.L4146:
 	add	r0, sp, #80
 	add	r5, sp, #80
 	add	r0, r0, r3, lsl #2
@@ -27005,115 +27522,115 @@ gc_do_copy_back:
 	ldr	r0, [r0, #-24]
 	ldrb	r3, [r3, #1]	@ zero_extendqisi2
 	strb	r3, [r0]
-	b	.L4098
-.L4192:
+	b	.L4145
+.L4239:
 	.align	2
-.L4191:
-	.word	.LANCHOR80
+.L4238:
+	.word	.LANCHOR79
 	.word	.LANCHOR131
 	.word	-178307901
-	.word	.LANCHOR10
-	.word	.LANCHOR86
-	.word	.LANCHOR163
+	.word	.LANCHOR12
+	.word	.LANCHOR85
+	.word	.LANCHOR160
 	.word	.LANCHOR221
+	.word	.LANCHOR74
+	.word	.LANCHOR31
 	.word	.LANCHOR75
-	.word	.LANCHOR32
-	.word	.LANCHOR76
 	.word	.LANCHOR234
 	.word	.LC0
 	.word	.LANCHOR128
-	.word	.LANCHOR162
-	.word	.LANCHOR37
+	.word	.LANCHOR159
+	.word	.LANCHOR36
 	.word	-1431655765
 	.word	.LANCHOR111
-	.word	.LANCHOR56
-	.word	.LANCHOR164
+	.word	.LANCHOR55
+	.word	.LANCHOR161
 	.word	.LANCHOR124
 	.word	.LANCHOR235
-	.word	.LANCHOR83
-	.word	.LANCHOR81
-.L4097:
-	ldr	r3, .L4193
+	.word	.LANCHOR82
+	.word	.LANCHOR80
+.L4144:
+	ldr	r3, .L4240
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	ldr	r3, [sp, #56]
 	cmp	r2, #0
-	beq	.L4101
+	beq	.L4148
 	strb	r1, [r3, #44]
-.L4185:
+.L4232:
 	mov	r2, fp
 	add	r1, sp, #68
 	add	r0, sp, #56
 	bl	sblk_xlc_prog_pages
-.L4100:
-	ldr	r3, .L4193
+.L4147:
+	ldr	r3, .L4240
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L4109
+	beq	.L4156
 	add	r3, fp, fp, lsl #1
 	uxth	fp, r3
-.L4110:
-	ldr	r3, .L4193+4
+.L4157:
+	ldr	r3, .L4240+4
 	ldr	r2, [r3]
 	ldr	r3, [r2, #52]
 	add	r3, r3, fp
 	str	r3, [r2, #52]
-	ldr	r2, .L4193+8
+	ldr	r2, .L4240+8
 	ldrh	r3, [r2, #2102]
 	add	r3, r3, fp
 	uxth	r3, r3
 	strh	r3, [r2, #2102]	@ movhi
-	ldr	r2, .L4193+12
+	ldr	r2, .L4240+12
 	ldrh	r1, [r2]
 	ldr	r2, [sp, #28]
 	ldrb	r2, [r2, #89]	@ zero_extendqisi2
 	muls	r2, r1, r2
 	cmp	r3, r2
 	itttt	ge
-	ldrge	r3, .L4193+16
+	ldrge	r3, .L4240+16
 	movge	r2, #0
 	ldrge	r3, [r3]
 	strhge	r2, [r3, #86]	@ movhi
 	bl	gc_write_completed
-	b	.L4044
-.L4101:
+	b	.L4091
+.L4148:
 	ldr	r1, [sp, #24]
 	cmp	r1, #1
-	bne	.L4102
+	bne	.L4149
 	movs	r2, #9
-.L4104:
+.L4151:
 	strb	r2, [r3, #44]
-	b	.L4185
-.L4102:
+	b	.L4232
+.L4149:
 	ldr	r1, [sp, #24]
 	cmp	r1, #2
 	it	eq
 	moveq	r2, #13
-	b	.L4104
-.L4096:
-	ldr	r3, .L4193+20
+	b	.L4151
+.L4143:
+	ldr	r3, .L4240+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L4105
-	ldr	r3, .L4193+24
+	cbz	r3, .L4152
+	ldr	r3, .L4240+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L4106
-.L4105:
+	cbnz	r3, .L4153
+.L4152:
 	ldr	r2, [sp, #40]
 	subs	r1, r2, #1
-.L4107:
+.L4154:
 	uxth	r2, r3
 	adds	r3, r3, #1
 	cmp	r2, r1
-	blt	.L4108
+	blt	.L4155
 	add	r3, sp, #80
 	add	r1, r3, r1, lsl #2
 	ldr	r3, [r1, #-24]
-	b	.L4184
-.L4106:
+	b	.L4231
+.L4153:
 	mov	r1, fp
 	add	r0, sp, #56
 	bl	sblk_3d_mlc_prog_pages
-	b	.L4100
-.L4108:
+	b	.L4147
+.L4155:
 	add	r0, sp, #80
 	add	r5, sp, #80
 	add	r0, r0, r2, lsl #2
@@ -27122,44 +27639,44 @@ gc_do_copy_back:
 	ldr	r0, [r0, #-24]
 	ldrb	r2, [r2, #1]	@ zero_extendqisi2
 	strb	r2, [r0]
-	b	.L4107
-.L4109:
-	ldr	r3, .L4193+20
+	b	.L4154
+.L4156:
+	ldr	r3, .L4240+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L4123
-	ldr	r3, .L4193+28
+	cbnz	r3, .L4170
+	ldr	r3, .L4240+28
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L4110
+	beq	.L4157
 	ldrh	r3, [sp, #16]
-	ldr	r2, .L4193+32
+	ldr	r2, .L4240+32
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	smulbb	r3, fp, r3
 	uxth	r3, r3
-	cbz	r2, .L4124
-	ldr	r2, .L4193+36
+	cbz	r2, .L4171
+	ldr	r2, .L4240+36
 	ldrh	r2, [r2, r4, lsl #1]
 	cmp	r2, r4
 	it	cs
 	movcs	fp, r3
-	b	.L4110
-.L4123:
+	b	.L4157
+.L4170:
 	ldr	fp, [sp, #44]
-	b	.L4110
-.L4124:
+	b	.L4157
+.L4171:
 	mov	fp, r3
-	b	.L4110
-.L4194:
+	b	.L4157
+.L4241:
 	.align	2
-.L4193:
-	.word	.LANCHOR84
+.L4240:
+	.word	.LANCHOR83
 	.word	.LANCHOR110
-	.word	.LANCHOR71
-	.word	.LANCHOR86
-	.word	.LANCHOR10
+	.word	.LANCHOR70
+	.word	.LANCHOR85
+	.word	.LANCHOR12
+	.word	.LANCHOR80
 	.word	.LANCHOR81
-	.word	.LANCHOR82
-	.word	.LANCHOR36
+	.word	.LANCHOR35
 	.word	.LANCHOR124
 	.word	.LANCHOR235
 	.size	gc_do_copy_back, .-gc_do_copy_back
@@ -27174,100 +27691,99 @@ gc_do_copy_back:
 zftl_do_gc:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L4392
-	ldr	r2, .L4392+4
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #48
-	ldr	r4, .L4392+8
-	mov	r10, r2
-	ldrh	r7, [r3]
-	ldrh	r6, [r2]
-	ldr	r1, .L4392+12
-	ldrb	r3, [r4]	@ zero_extendqisi2
-	add	r6, r6, r7
+	ldr	r3, .L4447
+	ldr	r7, .L4447+4
+	ldr	r5, .L4447+8
+	ldrh	r3, [r3]
+	ldrh	r6, [r7]
+	ldr	r1, .L4447+12
+	ldrb	r2, [r5]	@ zero_extendqisi2
+	add	r6, r6, r3
 	str	r0, [sp, #32]
-	ldr	r5, [r1]
+	ldr	r4, [r1]
 	uxth	r6, r6
 	mov	r8, r1
-	cmp	r3, #6
-	bhi	.L4310
-	tbh	[pc, r3, lsl #1]
-.L4198:
-	.2byte	(.L4197-.L4198)/2
-	.2byte	(.L4199-.L4198)/2
-	.2byte	(.L4200-.L4198)/2
-	.2byte	(.L4201-.L4198)/2
-	.2byte	(.L4202-.L4198)/2
-	.2byte	(.L4203-.L4198)/2
-	.2byte	(.L4204-.L4198)/2
+	cmp	r2, #6
+	bhi	.L4359
+	tbh	[pc, r2, lsl #1]
+.L4245:
+	.2byte	(.L4244-.L4245)/2
+	.2byte	(.L4246-.L4245)/2
+	.2byte	(.L4247-.L4245)/2
+	.2byte	(.L4248-.L4245)/2
+	.2byte	(.L4249-.L4245)/2
+	.2byte	(.L4250-.L4245)/2
+	.2byte	(.L4251-.L4245)/2
 	.p2align 1
-.L4203:
-	ldr	r5, .L4392+16
+.L4250:
+	ldr	r4, .L4447+16
 	movs	r7, #0
-.L4205:
+.L4252:
 	bl	gc_check_data_one_wl
 	mov	r10, r0
 	cmp	r0, #0
-	beq	.L4306
+	beq	.L4355
 	ldr	r3, [r8]
 	movs	r6, #0
-	strh	r6, [r5, #52]	@ movhi
+	strh	r6, [r4, #52]	@ movhi
 	ldrh	r0, [r3, #80]
 	bl	ftl_free_sblk
-	ldr	r1, .L4392+20
+	ldr	r1, .L4447+20
 	movw	r3, #65535
 	ldr	r2, [r8]
-	ldr	r0, [r5, #8]
+	ldr	r0, [r4, #8]
 	ldr	r1, [r1]
 	strh	r3, [r2, #80]	@ movhi
 	strh	r3, [r1, #126]	@ movhi
 	strh	r3, [r2, #130]	@ movhi
 	bl	zbuf_free
-	str	r6, [r5, #8]
-	strb	r6, [r4]
-	b	.L4389
-.L4197:
-	ldr	r3, .L4392+24
-	ldr	r2, .L4392+28
-	ldr	r1, .L4392+32
-	ldrh	r3, [r3]
-	str	r2, [sp, #36]
-	ldrh	r1, [r1]
+	str	r6, [r4, #8]
+	strb	r6, [r5]
+	b	.L4444
+.L4244:
+	ldr	r2, .L4447+24
+	ldr	r1, .L4447+28
+	ldr	r0, .L4447+32
+	ldrh	r7, [r2]
+	ldrh	r2, [r1]
+	ldrh	r0, [r0]
 	add	r7, r7, r3
-	ldrh	r3, [r2]
+	str	r1, [sp, #36]
 	uxth	r7, r7
-	add	r3, r3, r1
-	ldrh	r1, [r5, #80]
-	uxth	r3, r3
-	str	r3, [sp, #28]
-	movw	r3, #65535
-	cmp	r1, r3
+	add	r2, r2, r0
+	ldrh	r0, [r4, #80]
+	uxth	r2, r2
+	str	r2, [sp, #28]
+	movw	r2, #65535
+	cmp	r0, r2
+	beq	.L4253
 	ldr	r3, [sp, #32]
-	beq	.L4206
-	cbnz	r3, .L4207
-	ldr	r3, .L4392+36
+	cbnz	r3, .L4254
+	ldr	r3, .L4447+36
 	ldrh	r3, [r3]
 	cmp	r6, r3, lsl #1
-	blt	.L4207
-.L4310:
-	movs	r5, #16
-	b	.L4195
-.L4207:
-	ldr	r10, .L4392+80
-	movs	r1, #5
-	ldr	fp, .L4392+76
-	ldrh	r0, [r10]
-	adds	r0, r0, #1
-	uxth	r0, r0
-	strh	r0, [r10]	@ movhi
-	bl	zftl_get_gc_node
+	blt	.L4254
+.L4359:
+	movs	r4, #16
+	b	.L4242
+.L4254:
+	ldr	r10, .L4447+80
+	ldr	r0, .L4447+40
+	ldr	fp, .L4447+84
+	ldrh	r1, [r10]
+	adds	r1, r1, #1
+	uxth	r1, r1
+	strh	r1, [r10]	@ movhi
+	bl	_list_get_gc_head_node
 	movw	r3, #65535
 	mov	ip, r10
 	cmp	r0, r3
-	beq	.L4208
-	ldr	r1, .L4392+40
-	ldr	lr, .L4392+72
-	ldr	r2, .L4392+44
+	beq	.L4255
+	ldr	r1, .L4447+44
+	ldr	lr, .L4447+76
+	ldr	r2, .L4447+48
 	ldr	r1, [r1]
 	ldrh	lr, [lr]
 	ldr	r3, [r2]
@@ -27276,205 +27792,217 @@ zftl_do_gc:
 	adds	r3, r3, #1
 	cmp	lr, r1
 	str	r3, [r2]
-	bcs	.L4209
-	ldr	r2, .L4392+48
+	bcs	.L4256
+	ldr	r2, .L4447+52
 	ldrh	r2, [r2]
 	cmp	r3, r2, lsr #4
-	bls	.L4208
-	ldr	r3, .L4392+52
+	bls	.L4255
+	ldr	r3, .L4447+56
 	ldrh	r3, [r3]
 	cmp	r3, r1
-	bls	.L4208
-.L4209:
+	bls	.L4255
+.L4256:
 	ldrb	r2, [fp]	@ zero_extendqisi2
 	movs	r1, #0
 	bl	gc_add_sblk
-	cbz	r0, .L4210
+	cbz	r0, .L4257
 	movs	r3, #1
-	strb	r3, [r4]
+	strb	r3, [r5]
 	movs	r3, #0
 	str	r3, [r10]
-	b	.L4310
-.L4208:
+	b	.L4359
+.L4255:
 	movs	r3, #0
 	strh	r3, [ip]	@ movhi
-.L4210:
+.L4257:
 	cmp	r7, #15
-	bls	.L4312
-	ldr	r3, .L4392+56
+	bls	.L4361
+	ldr	r3, .L4447+60
 	ldrh	r2, [r3]
-	ldr	r3, .L4392+60
+	ldr	r3, .L4447+64
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L4312
+	bhi	.L4361
 	ldr	r3, [sp, #28]
 	cmp	r3, #0
 	ite	eq
 	moveq	r10, #2
 	movne	r10, #1
-.L4211:
-	ldr	r3, .L4392+64
+.L4258:
+	ldr	r3, .L4447+68
 	ldr	r3, [r3]
 	lsls	r3, r3, #23
-	bpl	.L4212
+	bpl	.L4259
 	ldr	r3, [r8]
-	ldrh	r1, [r5, #80]
+	ldrh	r1, [r4, #80]
 	ldrb	r2, [fp]	@ zero_extendqisi2
-	ldr	r0, .L4392+68
+	ldr	r0, .L4447+72
 	str	r1, [sp, #16]
 	ldrh	r1, [r3, #122]
 	str	r1, [sp, #12]
 	ldrh	r1, [r3, #120]
 	str	r1, [sp, #8]
-	movw	r1, #2662
+	movw	r1, #2807
 	ldrh	r3, [r3, #124]
 	str	r7, [sp]
 	str	r3, [sp, #4]
 	mov	r3, r6
 	bl	printf
-.L4212:
+.L4259:
 	movs	r2, #1
 	mov	r1, r10
 	ldrb	r0, [fp]	@ zero_extendqisi2
 	bl	gc_search_src_blk
 	cmp	r0, #0
-	ble	.L4213
-.L4214:
+	ble	.L4260
+.L4261:
 	movs	r3, #1
-.L4390:
-	strb	r3, [r4]
-	b	.L4310
-.L4312:
+.L4445:
+	strb	r3, [r5]
+	b	.L4359
+.L4361:
 	mov	r10, #2
-	b	.L4211
-.L4213:
+	b	.L4258
+.L4260:
 	movs	r2, #1
 	movs	r1, #3
 	ldrb	r0, [fp]	@ zero_extendqisi2
 	bl	gc_search_src_blk
 	cmp	r0, #0
-	bgt	.L4214
-	b	.L4310
-.L4206:
-	cmp	r3, #1
-	bne	.L4216
+	bgt	.L4261
+	b	.L4359
+.L4253:
+	ldr	r2, [sp, #32]
+	cmp	r2, #1
+	bne	.L4263
+	ldr	r2, .L4447+20
+	ldr	r2, [r2]
+	ldrh	r2, [r2, #150]
+	cbz	r2, .L4264
+	cmp	r3, #8
+	bls	.L4264
+	bl	gc_ink_check_sblk
+.L4264:
 	bl	gc_scan_static_data
 	ldr	r3, [r8]
-	ldr	fp, .L4392+76
+	ldr	fp, .L4447+84
 	ldrh	r3, [r3, #122]
-	cbz	r3, .L4217
-.L4218:
+	cbz	r3, .L4265
+.L4266:
 	movs	r3, #1
 	strb	r3, [fp]
-	b	.L4390
-.L4393:
+	b	.L4445
+.L4448:
 	.align	2
-.L4392:
+.L4447:
 	.word	.LANCHOR107
 	.word	.LANCHOR103
-	.word	.LANCHOR159
-	.word	.LANCHOR10
-	.word	.LANCHOR71
+	.word	.LANCHOR156
+	.word	.LANCHOR12
+	.word	.LANCHOR70
 	.word	.LANCHOR110
 	.word	.LANCHOR105
 	.word	.LANCHOR97
 	.word	.LANCHOR99
-	.word	.LANCHOR87
-	.word	.LANCHOR9
-	.word	.LANCHOR160
-	.word	.LANCHOR6
+	.word	.LANCHOR86
+	.word	.LANCHOR92
+	.word	.LANCHOR11
+	.word	.LANCHOR157
+	.word	.LANCHOR8
 	.word	.LANCHOR100
-	.word	.LANCHOR93
+	.word	.LANCHOR91
 	.word	.LANCHOR101
-	.word	.LANCHOR14
-	.word	.LC236
-	.word	.LANCHOR95
-	.word	.LANCHOR85
+	.word	.LANCHOR19
+	.word	.LC239
+	.word	.LANCHOR94
 	.word	.LANCHOR96
-.L4217:
+	.word	.LANCHOR84
+.L4265:
 	bl	gc_static_wearleveling
-	mov	r5, r0
+	mov	r4, r0
 	cmp	r0, #0
-	bne	.L4218
-	ldr	r10, .L4394+16
+	bne	.L4266
+	ldr	r10, .L4449+20
 	cmp	r7, #0
-	beq	.L4219
+	beq	.L4267
 	ldr	r3, [sp, #28]
-	ldr	r2, .L4394
+	ldr	r2, .L4449
 	cmp	r6, r3
-	bcs	.L4220
+	bcs	.L4268
 	ldrh	r3, [r2]
 	cmp	r3, r6
-	bhi	.L4221
-.L4220:
+	bhi	.L4269
+.L4268:
 	ldr	r3, [sp, #28]
 	ldrh	r2, [r2]
 	adds	r3, r6, r3
 	cmp	r3, r2
-	blt	.L4221
-	ldr	r3, .L4394+4
+	blt	.L4269
+	ldr	r3, .L4449+4
 	ldrh	r2, [r3]
-	ldr	r3, .L4394+8
-	ldrh	r3, [r3]
-	cmp	r2, r3
-	bcc	.L4219
-.L4221:
-	movs	r1, #1
-	movs	r0, #16
-	strb	r1, [fp]
-	str	r1, [sp, #40]
-	bl	zftl_get_gc_node.part.9
-	movw	r2, #65535
-	cmp	r0, r2
-	beq	.L4222
-	ldr	r2, .L4394+12
-	ldr	r3, .L4394+16
-	ldr	r2, [r2]
+	ldr	r3, .L4449+8
 	ldrh	r3, [r3]
-	ldrh	r2, [r2, r0, lsl #1]
 	cmp	r2, r3
-	bcs	.L4222
+	bcc	.L4267
+.L4269:
+	movs	r3, #1
+	movs	r1, #16
+	ldr	r0, .L4449+12
+	strb	r3, [fp]
+	str	r3, [sp, #40]
+	bl	_list_get_gc_head_node
+	movw	r1, #65535
+	cmp	r0, r1
+	beq	.L4270
+	ldr	r1, .L4449+16
+	ldr	r2, .L4449+20
+	ldr	r1, [r1]
+	ldrh	r2, [r2]
+	ldrh	r1, [r1, r0, lsl #1]
+	cmp	r1, r2
+	bcs	.L4270
 	cmp	r6, #2
-	ldr	r1, [sp, #40]
-	bls	.L4222
-	ldr	r3, .L4394+20
+	ldr	r3, [sp, #40]
+	bls	.L4270
+	ldr	r1, .L4449+24
 	movs	r2, #0
 	strb	r2, [fp]
-	str	r2, [r3]
+	str	r2, [r1]
+	mov	r1, r3
 	bl	gc_add_sblk
 	cmp	r0, #0
-	bne	.L4214
-.L4222:
-	movs	r1, #3
-	movs	r0, #0
-	bl	zftl_get_gc_node
+	bne	.L4261
+.L4270:
+	movs	r1, #0
+	ldr	r0, .L4449+28
+	bl	_list_get_gc_head_node
 	movw	r2, #65535
 	cmp	r0, r2
-	beq	.L4223
-	ldr	r2, .L4394+12
-	ldr	r3, .L4394+16
+	beq	.L4271
+	ldr	r2, .L4449+16
+	ldr	r3, .L4449+20
 	ldr	r2, [r2]
 	ldrh	r3, [r3]
 	ldrh	r2, [r2, r0, lsl #1]
 	cmp	r2, r3
-	bcs	.L4223
+	bcs	.L4271
 	cmp	r6, #2
-	bls	.L4223
-	ldr	r3, .L4394+20
+	bls	.L4271
+	ldr	r3, .L4449+24
 	movs	r2, #0
 	movs	r1, #1
 	strb	r2, [fp]
 	str	r2, [r3]
 	bl	gc_add_sblk
 	cmp	r0, #0
-	bne	.L4214
-.L4223:
-	ldr	r2, .L4394+24
+	bne	.L4261
+.L4271:
+	ldr	r2, .L4449+32
 	ldrh	r3, [r10]
-	ldr	r1, .L4394+28
+	ldr	r1, .L4449+36
 	ldrh	fp, [r2]
 	adds	r3, r3, #1
-	ldr	r2, .L4394+20
+	ldr	r2, .L4449+24
 	uxth	r3, r3
 	cmp	r3, fp, lsr #5
 	strh	r3, [r10]	@ movhi
@@ -27484,146 +28012,151 @@ zftl_do_gc:
 	strhhi	r3, [r10]	@ movhi
 	mov	r10, #0
 	strh	r10, [r1]	@ movhi
-	ldr	r1, .L4394+32
+	ldr	r1, .L4449+40
 	ldr	r3, [r2]
 	strh	r10, [r1]	@ movhi
-	ldr	r1, .L4394+36
+	ldr	r1, .L4449+44
 	adds	r3, r3, #1
 	str	r3, [r2]
 	strh	r10, [r1]	@ movhi
-	ldr	r1, .L4394+40
+	ldr	r1, .L4449+48
 	ldrh	r1, [r1]
 	cmp	r3, r1, lsr #5
-	ldr	r3, .L4394+44
-	ldr	r1, .L4394+4
-	bls	.L4225
+	ldr	r3, .L4449+52
+	ldr	r1, .L4449+4
+	bls	.L4273
 	ldrh	r0, [r1]
 	cmp	r0, r7
-	bls	.L4225
-	movs	r1, #5
-	mov	r0, r10
+	bls	.L4273
+	mov	r1, r10
+	ldr	r0, .L4449+56
 	str	r3, [sp, #40]
-	bl	zftl_get_gc_node
+	bl	_list_get_gc_head_node
 	movw	r1, #65535
 	ldr	r3, [sp, #40]
 	cmp	r0, r1
 	ldr	r2, [sp, #44]
-	bne	.L4226
-.L4379:
-	movs	r5, #16
-.L4227:
-	ldr	r3, [r8]
-	movs	r1, #1
-	ldr	fp, .L4394+44
-	ldrh	r3, [r3, #124]
-	strb	r1, [fp]
-	mov	r8, fp
-	cmp	r3, #0
-	beq	.L4232
-	movs	r3, #0
-	strb	r1, [r4]
-	strb	r3, [fp]
-.L4195:
-	mov	r0, r5
-	add	sp, sp, #48
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L4226:
-	ldr	r1, .L4394+12
+	bne	.L4274
+.L4434:
+	movs	r4, #16
+	b	.L4275
+.L4274:
+	ldr	r1, .L4449+16
 	ldr	r1, [r1]
 	ldrh	r1, [r1, r0, lsl #1]
-	ldr	r0, .L4394+48
+	ldr	r0, .L4449+60
 	ldrb	r0, [r0]	@ zero_extendqisi2
 	mul	fp, fp, r0
 	cmp	r1, fp
-	bgt	.L4379
+	bgt	.L4434
 	str	r10, [r2]
 	movs	r2, #4
-.L4386:
+.L4441:
 	movs	r1, #2
-.L4378:
+.L4433:
 	ldrb	r0, [r3]	@ zero_extendqisi2
 	bl	gc_search_src_blk
 	uxth	r0, r0
 	cmp	r0, #0
-	beq	.L4379
-	b	.L4214
-.L4225:
-	ldr	r2, .L4394+8
+	beq	.L4434
+	b	.L4261
+.L4273:
+	ldr	r2, .L4449+8
 	ldrh	r1, [r1]
 	ldrh	r2, [r2]
 	cmp	r1, r2
-	bcc	.L4230
+	bcc	.L4278
 	movs	r2, #1
-	b	.L4386
-.L4230:
+	b	.L4441
+.L4278:
 	ldr	r2, [sp, #36]
 	ldrh	r2, [r2]
-	cbnz	r2, .L4231
-	ldr	r2, .L4394+52
+	cbnz	r2, .L4279
+	ldr	r2, .L4449+64
 	ldrh	r2, [r2]
 	cmp	r2, #8
-	bls	.L4227
-.L4231:
+	bls	.L4280
+.L4279:
 	movs	r2, #4
 	movs	r1, #1
-	b	.L4378
-.L4219:
-	ldr	r3, .L4394+24
+	b	.L4433
+.L4280:
+	ldr	r3, .L4449+68
+	ldrh	r3, [r3, #2106]
+	cmp	r3, #0
+	bne	.L4434
+.L4275:
+	ldr	r3, [r8]
+	movs	r1, #1
+	ldr	fp, .L4449+52
+	ldrh	r3, [r3, #124]
+	strb	r1, [fp]
+	mov	r8, fp
+	cbz	r3, .L4281
+	movs	r3, #0
+	strb	r1, [r5]
+	strb	r3, [fp]
+.L4242:
+	mov	r0, r4
+	add	sp, sp, #48
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L4267:
+	ldr	r3, .L4449+32
 	ldrh	r2, [r3]
 	ldrh	r3, [r10]
 	cmp	r3, r2, lsr #5
 	itt	cs
 	movcs	r3, #4
 	strhcs	r3, [r10]	@ movhi
-	b	.L4379
-.L4216:
-	ldr	r3, .L4394+56
+	b	.L4434
+.L4263:
+	ldr	r3, .L4449+72
 	ldrh	r3, [r3]
 	cmp	r3, r6
-	bcs	.L4379
-	ldrh	r3, [r5, #124]
+	bcs	.L4434
+	ldrh	r3, [r4, #124]
 	cmp	r3, #0
-	beq	.L4310
-	b	.L4379
-.L4232:
-	ldr	r2, .L4394+56
+	beq	.L4359
+	b	.L4434
+.L4281:
+	ldr	r2, .L4449+72
 	ldrh	r0, [r2]
 	mov	r10, r2
 	cmp	r6, r0
-	bcs	.L4233
+	bcs	.L4282
 	cmp	r7, #0
-	beq	.L4234
+	beq	.L4283
 	cmp	r7, #16
-	bls	.L4235
-	ldr	r2, .L4394+4
+	bls	.L4284
+	ldr	r2, .L4449+4
 	ldrh	r0, [r2]
-	ldr	r2, .L4394+8
+	ldr	r2, .L4449+8
 	ldrh	r2, [r2]
 	cmp	r0, r2
-	bhi	.L4235
+	bhi	.L4284
 	movs	r2, #4
 	mov	r0, r1
 	str	r3, [sp, #28]
 	bl	gc_search_src_blk
 	uxth	r0, r0
 	ldr	r3, [sp, #28]
-	cbnz	r0, .L4236
-.L4382:
+	cbnz	r0, .L4285
+.L4439:
 	movs	r2, #4
 	movs	r1, #3
 	ldrb	r0, [fp]	@ zero_extendqisi2
-	b	.L4381
-.L4236:
-	mov	r0, r3
-	movs	r1, #5
-	bl	zftl_get_gc_node
+	b	.L4436
+.L4285:
+	mov	r1, r3
+	ldr	r0, .L4449+56
+	bl	_list_get_gc_head_node
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L4239
-	ldr	r1, .L4394+12
-	ldr	r6, .L4394+24
-	ldr	r2, .L4394+20
+	beq	.L4288
+	ldr	r1, .L4449+16
+	ldr	r6, .L4449+32
+	ldr	r2, .L4449+24
 	ldr	r1, [r1]
 	ldrh	r6, [r6]
 	ldr	r3, [r2]
@@ -27632,776 +28165,788 @@ zftl_do_gc:
 	cmp	r6, r1
 	str	r3, [r2]
 	mov	r6, r2
-	bcs	.L4240
-	ldr	r2, .L4394+40
+	bcs	.L4289
+	ldr	r2, .L4449+48
 	ldrh	r2, [r2]
 	cmp	r3, r2, lsr #4
-	bls	.L4239
-	ldr	r3, .L4394+60
+	bls	.L4288
+	ldr	r3, .L4449+76
 	ldrh	r3, [r3]
 	cmp	r3, r1
-	bls	.L4239
-.L4240:
+	bls	.L4288
+.L4289:
 	ldrb	r2, [r8]	@ zero_extendqisi2
 	movs	r1, #0
 	bl	gc_add_sblk
-	ldr	r3, .L4394+64
+	ldr	r3, .L4449+80
 	movs	r2, #1
 	str	r2, [r3]
 	movs	r3, #0
 	str	r3, [r6]
-.L4239:
+.L4288:
 	movs	r3, #1
-	b	.L4385
-.L4235:
+	b	.L4440
+.L4284:
 	movs	r2, #1
 	movs	r1, #2
 	mov	r0, r2
 	bl	gc_search_src_blk
 	uxth	r0, r0
 	cmp	r0, #0
-	bne	.L4239
+	bne	.L4288
 	ldrb	r0, [r8]	@ zero_extendqisi2
 	movs	r2, #4
 	movs	r1, #3
-.L4381:
+.L4436:
 	bl	gc_search_src_blk
 	uxth	r0, r0
-.L4237:
+.L4286:
 	cmp	r0, #0
-	bne	.L4239
-	b	.L4195
-.L4234:
+	bne	.L4288
+	b	.L4242
+.L4283:
 	cmp	r6, #16
 	strb	r7, [fp]
-	bls	.L4242
+	bls	.L4291
 	movs	r2, #4
 	movs	r1, #3
 	mov	r0, r7
-	b	.L4381
-.L4242:
+	b	.L4436
+.L4291:
 	mov	r2, r1
 	mov	r0, r7
 	bl	gc_search_src_blk
 	uxth	r0, r0
 	cmp	r0, #0
-	bne	.L4239
-	b	.L4382
-.L4233:
-	ldr	r1, [sp, #32]
-	cmp	r1, #1
-	bne	.L4195
+	bne	.L4288
+	b	.L4439
+.L4282:
+	ldr	r3, [sp, #32]
+	cmp	r3, #1
+	bne	.L4242
 	cmp	r6, r0, lsl #1
-	bge	.L4243
+	bge	.L4292
 	ldr	r3, [sp, #28]
 	cmp	r3, r7, lsr #1
-	bcs	.L4244
-	ldr	r3, .L4394+4
+	bcs	.L4293
+	ldr	r3, .L4449+4
 	ldrh	r1, [r3]
-	ldr	r3, .L4394+8
+	ldr	r3, .L4449+8
 	ldrh	r3, [r3]
 	cmp	r1, r3
-	bcs	.L4244
-	ldr	r3, .L4394
+	bcs	.L4293
+	ldr	r3, .L4449
 	ldrh	r3, [r3]
 	lsrs	r3, r3, #2
 	strh	r3, [r2]	@ movhi
-	b	.L4195
-.L4395:
+	b	.L4242
+.L4450:
 	.align	2
-.L4394:
+.L4449:
 	.word	.LANCHOR98
-	.word	.LANCHOR93
+	.word	.LANCHOR91
 	.word	.LANCHOR101
-	.word	.LANCHOR9
-	.word	.LANCHOR161
-	.word	.LANCHOR160
 	.word	.LANCHOR95
+	.word	.LANCHOR11
+	.word	.LANCHOR158
+	.word	.LANCHOR157
 	.word	.LANCHOR90
-	.word	.LANCHOR91
+	.word	.LANCHOR94
+	.word	.LANCHOR87
+	.word	.LANCHOR88
+	.word	.LANCHOR89
+	.word	.LANCHOR8
+	.word	.LANCHOR84
 	.word	.LANCHOR92
-	.word	.LANCHOR6
-	.word	.LANCHOR85
-	.word	.LANCHOR80
+	.word	.LANCHOR79
 	.word	.LANCHOR99
-	.word	.LANCHOR87
+	.word	.LANCHOR70
+	.word	.LANCHOR86
 	.word	.LANCHOR100
 	.word	.LANCHOR122
-.L4244:
-	movs	r0, #8
-	bl	zftl_get_gc_node.part.9
+.L4293:
+	movs	r1, #8
+	ldr	r0, .L4451
+	bl	_list_get_gc_head_node
 	movw	r2, #65535
 	cmp	r0, r2
-	beq	.L4245
-	ldr	r2, .L4396
+	beq	.L4294
+	ldr	r2, .L4451+4
 	ldr	r2, [r2]
 	ldrh	r3, [r2, r0, lsl #1]
 	cmp	r3, #3
-	bhi	.L4245
-	cbz	r6, .L4245
+	bhi	.L4294
+	cbz	r6, .L4294
 	movs	r2, #0
 	movs	r1, #1
 	strb	r2, [r8]
 	bl	gc_add_sblk
 	cmp	r0, #0
-	bne	.L4239
-.L4245:
-	movs	r1, #5
-	movs	r0, #0
-	bl	zftl_get_gc_node
+	bne	.L4288
+.L4294:
+	movs	r1, #0
+	ldr	r0, .L4451+8
+	bl	_list_get_gc_head_node
 	movw	r3, #65535
 	mov	fp, r0
 	cmp	r0, r3
-	bne	.L4246
-.L4251:
+	bne	.L4295
+.L4300:
 	cmp	r7, #1
-	bhi	.L4247
-.L4248:
+	bhi	.L4296
+.L4297:
 	ldr	r3, [sp, #28]
 	cmp	r6, r3
-	ldr	r6, .L4396+4
-	bcs	.L4255
+	ldr	r6, .L4451+12
+	bcs	.L4304
 	movs	r7, #0
-	movs	r0, #4
+	movs	r1, #4
+	ldr	r0, .L4451
 	strb	r7, [r8]
-	bl	zftl_get_gc_node.part.9
+	bl	_list_get_gc_head_node
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L4255
-	ldr	r3, .L4396
+	beq	.L4304
+	ldr	r3, .L4451+4
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r0, lsl #1]
-	ldr	r3, .L4396+8
+	ldr	r3, .L4451+16
 	ldrh	r1, [r3]
-	ldr	r3, .L4396+12
+	ldr	r3, .L4451+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	muls	r3, r1, r3
 	cmp	r2, r3, asr #1
-	ble	.L4257
-.L4255:
+	ble	.L4306
+.L4304:
 	ldrh	r3, [r6]
 	lsrs	r3, r3, #2
 	strh	r3, [r10]	@ movhi
-	b	.L4195
-.L4246:
-	ldr	r2, .L4396+16
-	ldr	r1, .L4396+20
+	b	.L4242
+.L4295:
+	ldr	r2, .L4451+24
+	ldr	r1, .L4451+28
 	ldr	r3, [r2]
 	ldrh	r1, [r1]
 	adds	r3, r3, #1
 	str	r3, [r2]
 	cmp	r3, r1, lsr #4
-	bls	.L4249
-	ldr	r3, .L4396
+	bls	.L4298
+	ldr	r3, .L4451+4
 	movs	r1, #0
 	str	r1, [r2]
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r0, lsl #1]
-	ldr	r3, .L4396+24
+	ldr	r3, .L4451+32
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcs	.L4249
+	bcs	.L4298
 	movs	r3, #1
 	mov	r2, r3
 	strb	r3, [r8]
 	str	r3, [sp, #32]
 	bl	gc_add_sblk
 	ldr	r3, [sp, #32]
-	cbz	r0, .L4249
-.L4385:
-	strb	r3, [r4]
-	b	.L4195
-.L4249:
-	ldr	r3, .L4396
+	cbz	r0, .L4298
+.L4440:
+	strb	r3, [r5]
+	b	.L4242
+.L4298:
+	ldr	r3, .L4451+4
 	ldr	r3, [r3]
 	ldrh	r2, [r3, fp, lsl #1]
-	ldr	r3, .L4396+8
+	ldr	r3, .L4451+16
 	ldrh	r3, [r3]
 	cmp	r2, r3, lsr #1
-	bhi	.L4250
+	bhi	.L4299
 	movs	r2, #0
 	movs	r1, #1
 	mov	r0, fp
 	bl	gc_add_sblk
-	b	.L4239
-.L4250:
+	b	.L4288
+.L4299:
 	ldr	r3, [sp, #36]
-	ldr	r1, .L4396+28
+	ldr	r1, .L4451+36
 	ldrh	r3, [r3]
 	ldrh	r1, [r1]
 	add	r3, r3, r1
-	ldr	r1, .L4396+4
+	ldr	r1, .L4451+12
 	ldrh	r1, [r1]
 	cmp	r3, r1, lsl #1
-	ble	.L4251
-	ldr	r3, .L4396+24
+	ble	.L4300
+	ldr	r3, .L4451+32
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bcc	.L4248
-	b	.L4251
-.L4247:
+	bcc	.L4297
+	b	.L4300
+.L4296:
 	cmp	r7, #16
 	mov	r1, #1
 	strb	r1, [r8]
-	bls	.L4252
-	ldr	r3, .L4396+32
+	bls	.L4301
+	ldr	r3, .L4451+40
 	ldrh	r2, [r3]
-	ldr	r3, .L4396+36
+	ldr	r3, .L4451+44
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L4252
+	bhi	.L4301
 	movs	r2, #4
 	mov	r0, r1
-.L4388:
+.L4443:
 	bl	gc_search_src_blk
 	uxth	r0, r0
-	cbnz	r0, .L4253
+	cbnz	r0, .L4302
 	movs	r2, #4
 	movs	r1, #3
 	ldrb	r0, [r8]	@ zero_extendqisi2
 	bl	gc_search_src_blk
 	uxth	r0, r0
-.L4253:
+.L4302:
 	ldr	r3, [sp, #28]
 	cmp	r6, r3, lsr #1
-	ldr	r3, .L4396+4
+	ldr	r3, .L4451+12
 	ldrh	r3, [r3]
-	bls	.L4383
+	bls	.L4437
 	lsrs	r3, r3, #2
-.L4384:
+.L4438:
 	strh	r3, [r10]	@ movhi
-	b	.L4237
-.L4252:
+	b	.L4286
+.L4301:
 	movs	r2, #1
 	movs	r1, #2
 	mov	r0, r2
-	b	.L4388
-.L4257:
+	b	.L4443
+.L4306:
 	movs	r2, #4
 	movs	r1, #3
 	mov	r0, r7
 	bl	gc_search_src_blk
 	ldrh	r3, [r6]
 	uxth	r0, r0
-.L4383:
+.L4437:
 	lsrs	r3, r3, #1
-	b	.L4384
-.L4243:
-	ldr	r1, .L4396+4
-	mov	r5, r3
-	ldrh	r1, [r1]
-	lsrs	r1, r1, #2
-	strh	r1, [r2]	@ movhi
-	b	.L4195
-.L4199:
-	ldr	r5, .L4396+40
+	b	.L4438
+.L4292:
+	ldr	r3, .L4451+12
+	ldrh	r3, [r3]
+	lsrs	r3, r3, #2
+	strh	r3, [r2]	@ movhi
+	ldr	r3, .L4451+48
+	ldrh	r3, [r3, #2106]
+	cmp	r3, #0
+	it	eq
+	moveq	r4, #0
+	b	.L4242
+.L4246:
+	ldr	r4, .L4451+48
 	movw	r3, #65535
-	ldrh	r2, [r5]
+	ldrh	r2, [r4]
 	cmp	r2, r3
-	bne	.L4258
+	bne	.L4307
 	bl	gc_get_src_blk
-	strh	r0, [r5]	@ movhi
-.L4258:
-	ldrh	r2, [r5]
+	strh	r0, [r4]	@ movhi
+.L4307:
+	ldrh	r2, [r4]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L4259
-	ldr	r1, .L4396+20
+	beq	.L4308
+	ldr	r1, .L4451+28
 	ldrh	r1, [r1]
 	cmp	r1, r2
 	it	ls
-	strhls	r3, [r5]	@ movhi
-.L4259:
-	ldrh	r6, [r5]
+	strhls	r3, [r4]	@ movhi
+.L4308:
+	ldrh	r6, [r4]
 	movw	r3, #65535
 	cmp	r6, r3
-	beq	.L4391
-	ldr	r3, .L4396+44
-	ldrh	r1, [r5, #52]
+	beq	.L4446
+	ldr	r3, .L4451+52
+	ldrh	r1, [r4, #52]
 	ldr	r3, [r3]
 	add	r3, r3, r6, lsl #2
-	cbz	r1, .L4261
-	ldr	r0, .L4396+48
+	cbz	r1, .L4310
+	ldr	r0, .L4451+56
 	movs	r2, #0
-.L4262:
-	uxth	r5, r2
-	cmp	r1, r5
-	bhi	.L4263
-.L4261:
+.L4311:
+	uxth	r4, r2
+	cmp	r1, r4
+	bhi	.L4312
+.L4310:
 	ldrb	r3, [r3, #2]	@ zero_extendqisi2
 	and	r2, r3, #224
 	cmp	r2, #224
-	beq	.L4264
+	beq	.L4313
 	tst	r3, #192
-	bne	.L4265
-.L4264:
-	ldr	r3, .L4396
+	bne	.L4314
+.L4313:
+	ldr	r3, .L4451+4
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r6, lsl #1]
-	cbz	r3, .L4267
-	movw	r2, #3153
-	ldr	r1, .L4396+52
-	ldr	r0, .L4396+56
+	cbz	r3, .L4316
+	movw	r2, #3306
+	ldr	r1, .L4451+60
+	ldr	r0, .L4451+64
 	bl	printf
-	b	.L4267
-.L4263:
-	ldrh	r5, [r0, #2]!
+	b	.L4316
+.L4312:
+	ldrh	r4, [r0, #2]!
 	adds	r2, r2, #1
-	cmp	r5, r6
-	bne	.L4262
-.L4267:
-	ldr	r3, .L4396+40
+	cmp	r4, r6
+	bne	.L4311
+.L4316:
+	ldr	r3, .L4451+48
 	movw	r2, #65535
 	strh	r2, [r3]	@ movhi
-	b	.L4310
-.L4265:
+	b	.L4359
+.L4314:
 	movs	r3, #2
-	b	.L4390
-.L4200:
+	b	.L4445
+.L4247:
 	bl	gc_scan_src_blk
 	adds	r0, r0, #1
-	bne	.L4268
+	bne	.L4317
 	movs	r3, #3
-	b	.L4390
-.L4268:
-	ldr	r3, .L4396+40
+	b	.L4445
+.L4317:
+	ldr	r3, .L4451+48
 	movw	r1, #65535
 	ldrh	r2, [r3]
-	mov	r5, r3
+	mov	r4, r3
 	cmp	r2, r1
-	beq	.L4214
+	beq	.L4261
 	ldrh	r1, [r3, #20]
-	cbz	r1, .L4269
+	cbz	r1, .L4318
 	movs	r2, #4
-	strb	r2, [r4]
+	strb	r2, [r5]
 	movs	r2, #0
 	strh	r2, [r3, #22]	@ movhi
-	b	.L4310
-.L4269:
-	movs	r3, #1
-	strb	r3, [r4]
-	ldr	r4, .L4396
-	ldr	r1, [r4]
+	b	.L4359
+.L4318:
+	movs	r3, #1
+	strb	r3, [r5]
+	ldr	r5, .L4451+4
+	ldr	r1, [r5]
 	ldrh	r2, [r1, r2, lsl #1]
-	cbz	r2, .L4270
-	movw	r2, #3183
-	ldr	r1, .L4396+52
-	ldr	r0, .L4396+56
+	cbz	r2, .L4319
+	movw	r2, #3336
+	ldr	r1, .L4451+60
+	ldr	r0, .L4451+64
 	bl	printf
-.L4270:
-	ldrh	r0, [r5]
+.L4319:
+	ldrh	r0, [r4]
 	bl	ftl_free_sblk
-	ldr	r3, [r4]
-	movs	r4, #0
-	ldrh	r2, [r5]
-	strh	r4, [r3, r2, lsl #1]	@ movhi
-	ldrh	r3, [r5, #26]
+	ldr	r3, [r5]
+	movs	r5, #0
+	ldrh	r2, [r4]
+	strh	r5, [r3, r2, lsl #1]	@ movhi
+	ldrh	r3, [r4, #26]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	cmp	r3, #8
-	bhi	.L4271
-	strh	r3, [r5, #26]	@ movhi
-	b	.L4267
-.L4271:
-	strh	r4, [r5, #26]	@ movhi
+	bhi	.L4320
+	strh	r3, [r4, #26]	@ movhi
+	b	.L4316
+.L4320:
+	strh	r5, [r4, #26]	@ movhi
 	bl	ftl_flush
 	bl	pm_flush
 	bl	ftl_ext_info_flush
-	mov	r0, r4
+	mov	r0, r5
 	bl	ftl_info_flush
-	b	.L4267
-.L4201:
-	ldr	r7, .L4396+40
-	mov	r5, r7
-.L4355:
+	b	.L4316
+.L4248:
+	ldr	r7, .L4451+48
+	mov	r4, r7
+.L4408:
 	bl	gc_scan_src_blk_one_page
-	ldr	r3, .L4396+8
+	ldr	r3, .L4451+16
 	ldrh	r2, [r7, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcs	.L4273
+	bcs	.L4322
 	cmp	r6, #7
-	bls	.L4355
-	b	.L4310
-.L4397:
+	bls	.L4408
+	b	.L4359
+.L4452:
 	.align	2
-.L4396:
-	.word	.LANCHOR9
-	.word	.LANCHOR98
+.L4451:
 	.word	.LANCHOR95
-	.word	.LANCHOR80
-	.word	.LANCHOR160
-	.word	.LANCHOR6
+	.word	.LANCHOR11
+	.word	.LANCHOR92
+	.word	.LANCHOR98
+	.word	.LANCHOR94
+	.word	.LANCHOR79
+	.word	.LANCHOR157
+	.word	.LANCHOR8
 	.word	.LANCHOR100
 	.word	.LANCHOR99
-	.word	.LANCHOR93
+	.word	.LANCHOR91
 	.word	.LANCHOR101
-	.word	.LANCHOR71
-	.word	.LANCHOR7
-	.word	.LANCHOR71+52
+	.word	.LANCHOR70
+	.word	.LANCHOR9
+	.word	.LANCHOR70+52
 	.word	.LANCHOR237
 	.word	.LC0
-.L4273:
+.L4322:
 	ldrh	r3, [r7, #20]
 	ldrh	r1, [r7]
-	cbz	r3, .L4274
+	cbz	r3, .L4323
 	movs	r2, #4
-	strb	r2, [r4]
+	strb	r2, [r5]
 	movs	r2, #0
-	ldr	r4, .L4398
+	ldr	r5, .L4453
 	strh	r2, [r7, #22]	@ movhi
-	ldr	r2, [r4]
+	ldr	r2, [r5]
 	ldrh	r2, [r2, r1, lsl #1]
 	cmp	r3, r2
-	beq	.L4275
-	ldr	r0, .L4398+4
+	beq	.L4324
+	ldr	r0, .L4453+4
 	ldr	r0, [r0]
-	lsls	r0, r0, #21
-	bpl	.L4275
-	ldr	r0, .L4398+8
+	lsls	r6, r0, #21
+	bpl	.L4324
+	ldr	r0, .L4453+8
 	bl	printf
-.L4275:
-	ldr	r3, [r4]
-	ldrh	r2, [r5]
+.L4324:
+	ldr	r3, [r5]
+	ldrh	r2, [r4]
 	ldrh	r2, [r3, r2, lsl #1]
-	ldrh	r3, [r5, #20]
+	ldrh	r3, [r4, #20]
 	cmp	r2, r3
-	beq	.L4276
-	movw	r2, #3226
-	ldr	r1, .L4398+12
-	ldr	r0, .L4398+16
+	beq	.L4325
+	movw	r2, #3379
+	ldr	r1, .L4453+12
+	ldr	r0, .L4453+16
 	bl	printf
-.L4276:
-	ldrh	r1, [r5, #20]
-	ldrh	r2, [r5]
-	ldr	r3, [r4]
+.L4325:
+	ldrh	r1, [r4, #20]
+	ldrh	r2, [r4]
+	ldr	r3, [r5]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	b	.L4310
-.L4274:
-	ldr	r3, .L4398+20
+	b	.L4359
+.L4323:
+	ldr	r3, .L4453+20
 	ldr	r6, [r3]
 	movs	r3, #1
-	strb	r3, [r4]
-	ldr	r3, .L4398+4
+	strb	r3, [r5]
+	ldr	r3, .L4453+4
 	add	r6, r6, r1, lsl #2
 	ldr	r3, [r3]
-	lsls	r7, r3, #23
-	bpl	.L4277
+	lsls	r5, r3, #23
+	bpl	.L4326
 	ldrb	r2, [r6, #2]	@ zero_extendqisi2
-	ldr	r0, .L4398+24
+	ldr	r0, .L4453+24
 	lsrs	r2, r2, #5
 	bl	printf
-.L4277:
+.L4326:
 	ldrb	r3, [r6, #2]	@ zero_extendqisi2
 	and	r2, r3, #224
 	cmp	r2, #224
-	beq	.L4278
+	beq	.L4327
 	tst	r3, #192
-	bne	.L4279
-.L4278:
-	movw	r2, #3236
-	ldr	r1, .L4398+12
-	ldr	r0, .L4398+16
+	bne	.L4328
+.L4327:
+	movw	r2, #3389
+	ldr	r1, .L4453+12
+	ldr	r0, .L4453+16
 	bl	printf
-.L4279:
-	ldrh	r0, [r5]
+.L4328:
+	ldrh	r0, [r4]
 	bl	ftl_free_sblk
 	movw	r3, #65535
-	strh	r3, [r5]	@ movhi
-	ldrh	r3, [r5, #26]
+	strh	r3, [r4]	@ movhi
+	ldrh	r3, [r4, #26]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	cmp	r3, #8
-	bhi	.L4280
-	strh	r3, [r5, #26]	@ movhi
-	b	.L4310
-.L4280:
+	bhi	.L4329
+	strh	r3, [r4, #26]	@ movhi
+	b	.L4359
+.L4329:
 	movs	r3, #0
-	strh	r3, [r5, #26]	@ movhi
-.L4389:
+	strh	r3, [r4, #26]	@ movhi
+.L4444:
 	bl	flt_sys_flush
-	b	.L4310
-.L4202:
-	ldrh	r2, [r5, #80]
+	b	.L4359
+.L4249:
+	ldrh	r2, [r4, #80]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L4281
-	ldr	r3, .L4398+28
-	ldrb	r7, [r3]	@ zero_extendqisi2
-	cmp	r7, #1
-	bne	.L4281
-	ldr	r6, .L4398+32
+	bne	.L4330
+	ldr	r3, .L4453+28
+	ldrb	r10, [r3]	@ zero_extendqisi2
+	cmp	r10, #1
+	bne	.L4330
+	ldr	r6, .L4453+32
 	bl	ftl_flush
 	movs	r1, #5
-	ldrh	r0, [r6, #2106]
-	cbz	r0, .L4282
-	mov	r0, r7
-.L4282:
+	ldrh	r0, [r6, #2180]
+	cbz	r0, .L4331
+	mov	r0, r10
+.L4331:
 	bl	zftl_gc_get_free_sblk
 	movw	r3, #65535
-	mov	r4, r0
+	mov	r5, r0
 	cmp	r0, r3
-	beq	.L4284
-	ldr	r3, .L4398+20
+	beq	.L4333
+	ldr	r3, .L4453+20
 	ldr	r7, [r3]
 	add	r7, r7, r0, lsl #2
 	ldrb	r3, [r7, #2]	@ zero_extendqisi2
 	tst	r3, #224
-	beq	.L4285
-	movw	r2, #3270
-	ldr	r1, .L4398+12
-	ldr	r0, .L4398+16
+	beq	.L4334
+	movw	r2, #3423
+	ldr	r1, .L4453+12
+	ldr	r0, .L4453+16
 	bl	printf
-.L4285:
+.L4334:
 	ldrb	r3, [r7, #2]	@ zero_extendqisi2
 	and	r3, r3, #15
 	orr	r3, r3, #176
 	strb	r3, [r7, #2]
-.L4309:
+.L4358:
 	movs	r1, #1
-	mov	r0, r4
+	mov	r0, r5
 	bl	ftl_erase_sblk
 	movs	r3, #5
-	add	r1, r5, #96
-	strb	r3, [r5, #84]
-	mov	r0, r4
+	add	r1, r4, #96
+	strb	r3, [r4, #84]
+	mov	r0, r5
 	bl	ftl_get_blk_list_in_sblk
-	ldr	r3, .L4398+36
+	ldr	r3, .L4453+36
 	uxtb	r0, r0
 	movs	r7, #0
-	ldr	r10, .L4398+64
-	strb	r0, [r5, #89]
+	ldr	r10, .L4453+64
+	strb	r0, [r4, #89]
 	movs	r1, #255
 	ldrh	r3, [r3]
-	strh	r4, [r5, #80]	@ movhi
-	strh	r7, [r5, #82]	@ movhi
-	strb	r7, [r5, #85]
+	strh	r5, [r4, #80]	@ movhi
+	strh	r7, [r4, #82]	@ movhi
+	strb	r7, [r4, #85]
 	smulbb	r0, r3, r0
-	strh	r7, [r5, #90]	@ movhi
+	strh	r7, [r4, #90]	@ movhi
 	ldrh	r3, [r10]
-	strh	r0, [r5, #86]	@ movhi
-	ldr	r5, .L4398+40
-	ldrb	r2, [r5]	@ zero_extendqisi2
+	strh	r0, [r4, #86]	@ movhi
+	ldr	r4, .L4453+40
+	ldrb	r2, [r4]	@ zero_extendqisi2
 	muls	r2, r3, r2
-	ldr	r3, .L4398+44
+	ldr	r3, .L4453+44
 	ldr	r0, [r3]
 	lsls	r2, r2, #2
 	bl	ftl_memset
 	ldrh	r3, [r10]
 	movs	r1, #255
-	ldrb	r2, [r5]	@ zero_extendqisi2
+	ldrb	r2, [r4]	@ zero_extendqisi2
 	muls	r2, r3, r2
-	ldr	r3, .L4398+48
+	ldr	r3, .L4453+48
 	ldr	r0, [r3]
 	lsls	r2, r2, #2
 	bl	ftl_memset
 	ldrh	r3, [r10]
 	movs	r1, #255
-	ldrb	r2, [r5]	@ zero_extendqisi2
+	ldrb	r2, [r4]	@ zero_extendqisi2
 	muls	r2, r3, r2
-	ldr	r3, .L4398+52
+	ldr	r3, .L4453+52
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldr	r3, [r8]
 	movw	r2, #65535
 	strh	r2, [r3, #128]	@ movhi
 	strh	r2, [r3, #130]	@ movhi
-	str	r4, [r3, #132]
+	str	r5, [r3, #132]
 	bl	pm_flush
 	bl	ftl_ext_info_flush
-	ldr	r3, .L4398+56
+	ldr	r3, .L4453+56
 	mov	r0, r7
 	strh	r7, [r6, #52]	@ movhi
 	ldr	r3, [r3]
-	strh	r4, [r3, #126]	@ movhi
+	strh	r5, [r3, #126]	@ movhi
 	mov	r3, #-1
 	strh	r7, [r6, #2102]	@ movhi
 	strh	r7, [r6, #2104]	@ movhi
-	strh	r7, [r6, #2108]	@ movhi
-	str	r3, [r6, #2112]
+	strh	r7, [r6, #2182]	@ movhi
+	str	r3, [r6, #2184]
 	bl	ftl_info_flush
-	b	.L4310
-.L4281:
+	b	.L4359
+.L4330:
 	ldr	r3, [sp, #32]
-	ldr	r7, .L4398+28
+	ldr	r10, .L4453+28
 	cmp	r3, #1
 	ite	ne
 	movne	fp, #1
 	moveq	fp, #4
 	cmp	r6, #15
-	ldr	r6, .L4398+32
+	ldr	r6, .L4453+32
 	it	ls
 	addls	fp, fp, #4
-.L4288:
+.L4337:
 	add	fp, fp, #-1
 	uxtb	fp, fp
 	cmp	fp, #255
-	beq	.L4310
+	beq	.L4359
 	bl	gc_do_copy_back
-	ldrb	r3, [r7]	@ zero_extendqisi2
+	ldrb	r3, [r10]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L4289
-	ldr	r3, .L4398+60
+	bne	.L4338
+	ldr	r3, .L4453+60
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #3
-	bhi	.L4290
+	bhi	.L4339
 	bl	ftl_write_commit
-.L4290:
+.L4339:
 	ldrh	r2, [r6, #22]
 	ldrh	r3, [r6, #20]
 	cmp	r2, r3
-	bcc	.L4288
+	bcc	.L4337
+	ldr	r4, .L4453
 	movs	r3, #1
-	strb	r3, [r4]
-	ldr	r4, .L4398
+	strb	r3, [r5]
 	bl	ftl_write_commit
 	bl	ftl_flush
 	ldrh	r1, [r6]
 	ldr	r2, [r4]
 	ldrh	r2, [r2, r1, lsl #1]
-	cbz	r2, .L4292
-	movw	r2, #3354
-	ldr	r1, .L4398+12
-	ldr	r0, .L4398+16
+	cbz	r2, .L4341
+	movw	r2, #3507
+	ldr	r1, .L4453+12
+	ldr	r0, .L4453+16
 	bl	printf
-.L4292:
+.L4341:
 	ldrh	r0, [r6]
 	ldr	r3, [r4]
 	ldrh	r3, [r3, r0, lsl #1]
-	cbnz	r3, .L4293
+	cbnz	r3, .L4342
 	bl	ftl_free_sblk
-	b	.L4267
-.L4293:
+	b	.L4316
+.L4342:
 	movs	r2, #1
 	movs	r1, #0
 	bl	gc_add_sblk
-	b	.L4267
-.L4399:
+	b	.L4316
+.L4454:
 	.align	2
-.L4398:
-	.word	.LANCHOR9
-	.word	.LANCHOR14
-	.word	.LC237
+.L4453:
+	.word	.LANCHOR11
+	.word	.LANCHOR19
+	.word	.LC240
 	.word	.LANCHOR237
 	.word	.LC0
-	.word	.LANCHOR7
-	.word	.LC238
-	.word	.LANCHOR85
-	.word	.LANCHOR71
-	.word	.LANCHOR95
-	.word	.LANCHOR80
-	.word	.LANCHOR162
-	.word	.LANCHOR163
-	.word	.LANCHOR83
+	.word	.LANCHOR9
+	.word	.LC241
+	.word	.LANCHOR84
+	.word	.LANCHOR70
+	.word	.LANCHOR94
+	.word	.LANCHOR79
+	.word	.LANCHOR159
+	.word	.LANCHOR160
+	.word	.LANCHOR82
 	.word	.LANCHOR110
-	.word	.LANCHOR58
-	.word	.LANCHOR86
-.L4289:
-	ldrh	r3, [r6, #2108]
+	.word	.LANCHOR57
+	.word	.LANCHOR85
+.L4338:
+	ldrh	r3, [r6, #2182]
 	cmp	r3, #0
-	beq	.L4294
+	beq	.L4343
 	movs	r3, #0
-	ldr	r7, .L4400
-	strh	r3, [r6, #2108]	@ movhi
+	ldr	r10, .L4455+60
+	strh	r3, [r6, #2182]	@ movhi
 	bl	sblk_wait_write_queue_completed
 	bl	gc_write_completed
-	ldr	r0, [r6, #2112]
-	adds	r5, r0, #1
-	beq	.L4295
-	ldr	r3, .L4400+4
+	ldr	r0, [r6, #2184]
+	adds	r4, r0, #1
+	beq	.L4344
+	ldr	r3, .L4455
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L4296
-	ldr	r3, .L4400+8
+	cbnz	r3, .L4345
+	ldr	r3, .L4455+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L4297
-.L4296:
-	ldr	r3, [r7]
+	beq	.L4346
+.L4345:
+	ldr	r3, [r10]
 	ldr	r2, [r3, #156]
-	ldr	r3, .L4400+12
+	ldr	r3, .L4455+8
 	cmp	r2, r3
-	bne	.L4297
-	ldr	r3, .L4400+16
+	bne	.L4346
+	ldr	r3, .L4455+12
 	ldrh	r1, [r3]
-	ldr	r3, .L4400+20
+	ldr	r3, .L4455+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	lsrs	r0, r0, r1
 	rsb	r3, r3, #24
 	subs	r2, r3, r1
 	movs	r3, #1
 	lsls	r3, r3, r2
-	ldr	r2, .L4400+24
+	ldr	r2, .L4455+20
 	subs	r3, r3, #1
 	ldrb	r1, [r2]	@ zero_extendqisi2
 	ands	r0, r0, r3
 	bl	__aeabi_uidiv
-	ldr	r3, .L4400+28
+	ldr	r3, .L4455+24
 	ldr	r3, [r3]
-	add	r5, r3, r0, lsl #2
-	ldrb	r2, [r5, #2]	@ zero_extendqisi2
+	add	r4, r3, r0, lsl #2
+	ldrb	r2, [r4, #2]	@ zero_extendqisi2
 	lsls	r1, r2, #28
-	bpl	.L4295
-	ldr	ip, .L4400+60
-	ldrh	r1, [r10]
-	ldrh	ip, [ip]
+	bpl	.L4344
+	ldrh	r1, [r7]
+	ldr	r7, .L4455+28
 	adds	r1, r1, #8
-	cmp	r1, ip
-	bge	.L4295
-	ldr	r1, .L4400+32
+	ldrh	r7, [r7]
+	cmp	r1, r7
+	bge	.L4344
+	ldr	r1, .L4455+32
 	bfc	r2, #3, #2
-	strb	r2, [r5, #2]
+	strb	r2, [r4, #2]
 	ldr	r2, [r3, r0, lsl #2]
 	ldrh	r1, [r1]
-	ldrh	r5, [r3, r0, lsl #2]
+	ldrh	r4, [r3, r0, lsl #2]
 	ubfx	r2, r2, #11, #8
 	muls	r1, r2, r1
-	ubfx	ip, r5, #0, #11
+	ubfx	r7, r4, #0, #11
 	lsrs	r2, r2, #3
 	add	r1, r1, r1, lsl #1
-	add	r1, ip, r1, asr #2
-	bfi	r5, r1, #0, #11
-	strh	r5, [r3, r0, lsl #2]	@ movhi
+	add	r1, r7, r1, asr #2
+	bfi	r4, r1, #0, #11
+	strh	r4, [r3, r0, lsl #2]	@ movhi
 	ldr	r1, [r3, r0, lsl #2]
 	bfi	r1, r2, #11, #8
 	str	r1, [r3, r0, lsl #2]
-.L4295:
+.L4344:
 	ldr	r3, [r8]
-	movs	r5, #0
-	str	r5, [r6, #2112]
-	strh	r5, [r6, #52]	@ movhi
+	movs	r4, #0
+	str	r4, [r6, #2184]
+	strh	r4, [r6, #52]	@ movhi
 	ldrh	r0, [r3, #80]
 	bl	ftl_free_sblk
 	ldr	r0, [r6, #8]
 	movw	r3, #65535
 	ldr	r2, [r8]
-	ldr	r1, [r7]
+	ldr	r1, [r10]
 	strh	r3, [r2, #80]	@ movhi
 	strh	r3, [r1, #126]	@ movhi
 	strh	r3, [r2, #130]	@ movhi
-	cbz	r0, .L4298
+	cbz	r0, .L4347
 	bl	zbuf_free
-.L4298:
-	str	r5, [r6, #8]
+.L4347:
+	str	r4, [r6, #8]
 	bl	flt_sys_flush
-	movw	r2, #3413
-	ldr	r1, .L4400+36
-	ldr	r0, .L4400+40
-	strb	r5, [r4]
+	movw	r2, #3567
+	ldr	r1, .L4455+36
+	ldr	r0, .L4455+40
+	strb	r4, [r5]
 	bl	printf
-	b	.L4310
-.L4297:
+	b	.L4359
+.L4346:
 	bl	ftl_mask_bad_block
-	b	.L4295
-.L4294:
-	ldrh	r3, [r5, #86]
+	b	.L4344
+.L4343:
+	ldrh	r3, [r4, #86]
 	ldrh	r2, [r6, #22]
 	cmp	r3, #1
 	ldrh	r3, [r6, #20]
-	bls	.L4299
+	bls	.L4348
 	cmp	r2, r3
-	bcc	.L4288
+	bcc	.L4337
 	movs	r3, #1
-	strb	r3, [r4]
+	strb	r3, [r5]
 	ldrh	r3, [r6, #52]
 	adds	r2, r3, #1
 	strh	r2, [r6, #52]	@ movhi
@@ -28410,12 +28955,12 @@ zftl_do_gc:
 	strh	r2, [r3, #54]	@ movhi
 	movw	r3, #65535
 	strh	r3, [r6]	@ movhi
-	b	.L4310
-.L4299:
+	b	.L4359
+.L4348:
 	cmp	r2, r3
 	mov	r1, #5
-	strb	r1, [r4]
-	bcc	.L4300
+	strb	r1, [r5]
+	bcc	.L4349
 	ldrh	r3, [r6, #52]
 	adds	r2, r3, #1
 	strh	r2, [r6, #52]	@ movhi
@@ -28424,109 +28969,109 @@ zftl_do_gc:
 	strh	r2, [r3, #54]	@ movhi
 	movw	r3, #65535
 	strh	r3, [r6]	@ movhi
-.L4300:
+.L4349:
 	bl	ftl_flush
 	bl	sblk_wait_write_queue_completed
 	bl	gc_write_completed
 	ldr	r3, [r8]
-	ldrh	r2, [r5, #80]
+	ldrh	r2, [r4, #80]
 	strh	r2, [r3, #128]	@ movhi
 	bl	pm_flush
 	bl	ftl_ext_info_flush
 	movs	r3, #0
-	ldr	r2, .L4400+44
+	ldr	r2, .L4455+44
 	strh	r3, [r6, #12]	@ movhi
-	ldr	r3, .L4400+48
+	ldr	r3, .L4455+48
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	strh	r3, [r6, #14]	@ movhi
-	ldr	r3, .L4400+52
+	ldr	r3, .L4455+52
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	strh	r3, [r6, #16]	@ movhi
-	cbz	r2, .L4301
-	ldr	r2, .L4400+56
+	cbz	r2, .L4350
+	ldr	r2, .L4455+56
 	ldrh	r2, [r2]
 	strh	r2, [r6, #14]	@ movhi
 	movs	r2, #1
 	strh	r2, [r6, #16]	@ movhi
-.L4301:
+.L4350:
 	cmp	r3, #2
-	bne	.L4303
+	bne	.L4352
 	ldrh	r3, [r6, #14]
 	lsls	r3, r3, #1
 	strh	r3, [r6, #14]	@ movhi
-	ldr	r3, .L4400+8
+	ldr	r3, .L4455+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L4303
+	cbnz	r3, .L4352
 	movs	r3, #1
 	strh	r3, [r6, #16]	@ movhi
-.L4303:
+.L4352:
 	movs	r3, #0
 	strh	r3, [r6, #18]	@ movhi
-	b	.L4310
-.L4306:
-	ldrh	r2, [r5, #12]
-	ldrh	r3, [r5, #14]
+	b	.L4359
+.L4355:
+	ldrh	r2, [r4, #12]
+	ldrh	r3, [r4, #14]
 	cmp	r2, r3
-	bcc	.L4307
+	bcc	.L4356
 	movs	r3, #6
-	ldr	r0, [r5, #8]
-	strb	r3, [r4]
+	ldr	r0, [r4, #8]
+	strb	r3, [r5]
 	bl	zbuf_free
-	str	r10, [r5, #8]
-	b	.L4310
-.L4307:
+	str	r10, [r4, #8]
+	b	.L4359
+.L4356:
 	cmp	r6, #15
-	bls	.L4205
+	bls	.L4252
 	ldr	r3, [sp, #32]
 	cmp	r3, #1
-	bne	.L4310
+	bne	.L4359
 	adds	r7, r7, #1
 	uxtb	r7, r7
 	cmp	r7, #4
-	bls	.L4205
-	b	.L4310
-.L4204:
+	bls	.L4252
+	b	.L4359
+.L4251:
 	bl	gc_update_l2p_map_new
 	bl	gc_free_src_blk
 	bl	ftl_flush
 	movw	r6, #65535
 	bl	pm_flush
-	strh	r6, [r5, #80]	@ movhi
+	strh	r6, [r4, #80]	@ movhi
 	bl	ftl_ext_info_flush
-	ldr	r3, .L4400
+	ldr	r3, .L4455+60
 	movs	r0, #0
 	ldr	r3, [r3]
 	strh	r6, [r3, #126]	@ movhi
 	bl	ftl_info_flush
-.L4391:
+.L4446:
 	movs	r3, #0
-	b	.L4390
-.L4284:
-	movw	r2, #3277
-	ldr	r1, .L4400+36
-	ldr	r0, .L4400+40
+	b	.L4445
+.L4333:
+	movw	r2, #3430
+	ldr	r1, .L4455+36
+	ldr	r0, .L4455+40
 	bl	printf
-	b	.L4309
-.L4401:
+	b	.L4358
+.L4456:
 	.align	2
-.L4400:
-	.word	.LANCHOR110
+.L4455:
 	.word	.LANCHOR124
-	.word	.LANCHOR81
+	.word	.LANCHOR80
 	.word	1145785929
+	.word	.LANCHOR74
+	.word	.LANCHOR31
 	.word	.LANCHOR75
-	.word	.LANCHOR32
-	.word	.LANCHOR76
-	.word	.LANCHOR7
-	.word	.LANCHOR8
+	.word	.LANCHOR9
+	.word	.LANCHOR98
+	.word	.LANCHOR10
 	.word	.LANCHOR237
 	.word	.LC0
-	.word	.LANCHOR36
-	.word	.LANCHOR95
-	.word	.LANCHOR79
-	.word	.LANCHOR86
-	.word	.LANCHOR98
+	.word	.LANCHOR35
+	.word	.LANCHOR94
+	.word	.LANCHOR78
+	.word	.LANCHOR85
+	.word	.LANCHOR110
 	.size	zftl_do_gc, .-zftl_do_gc
 	.section	.text.zftl_init,"ax",%progbits
 	.align	1
@@ -28539,79 +29084,79 @@ zftl_do_gc:
 zftl_init:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L4481
+	ldr	r2, .L4536
 	movs	r3, #255
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r5, #0
-	ldr	r7, .L4481+4
+	ldr	r7, .L4536+4
 	sub	sp, sp, #24
 	strb	r3, [r2]
-	ldr	r2, .L4481+8
-	ldr	r1, .L4481+12
-	ldr	r0, .L4481+16
+	ldr	r2, .L4536+8
+	ldr	r1, .L4536+12
+	ldr	r0, .L4536+16
 	strb	r5, [r2]
-	ldr	r2, .L4481+20
-	ldr	r6, .L4481+24
+	ldr	r2, .L4536+20
+	ldr	r6, .L4536+24
 	strb	r3, [r2]
-	ldr	r2, .L4481+28
+	ldr	r2, .L4536+28
 	strb	r5, [r2]
-	ldr	r2, .L4481+32
+	ldr	r2, .L4536+32
 	strb	r3, [r2]
 	mov	r2, #-1
-	ldr	r3, .L4481+36
+	ldr	r3, .L4536+36
 	strb	r5, [r3]
-	ldr	r3, .L4481+40
+	ldr	r3, .L4536+40
 	str	r2, [r3]
 	bl	printf
 	ldrb	r8, [r7, #12]	@ zero_extendqisi2
-	ldr	r3, .L4481+44
+	ldr	r3, .L4536+44
 	ldrb	fp, [r7, #9]	@ zero_extendqisi2
 	mov	r1, r8
 	strb	r8, [r3]
-	ldr	r3, .L4481+48
+	ldr	r3, .L4536+48
 	strb	fp, [r3]
 	ldrh	r3, [r7, #10]
 	str	r3, [sp]
-	ldr	r3, .L4481+52
+	ldr	r3, .L4536+52
 	ldrh	r2, [sp]
 	ldr	r0, [sp]
 	strh	r2, [r3]	@ movhi
 	bl	__aeabi_idiv
-	ldr	r2, .L4481+56
+	ldr	r2, .L4536+56
 	mov	r3, r0
-	ldr	r1, .L4481+60
+	ldr	r1, .L4536+60
 	ldrh	r10, [r7, #14]
 	ldrb	r4, [r2]	@ zero_extendqisi2
-	ldr	r2, .L4481+64
+	ldr	r2, .L4536+64
 	strh	r0, [r6]	@ movhi
-	ldr	r0, .L4481+68
+	ldr	r0, .L4536+68
 	strb	r4, [r2]
 	ldrb	r2, [r7, #13]	@ zero_extendqisi2
 	str	r6, [sp, #8]
 	str	r0, [sp, #12]
 	strb	r2, [r1]
 	smulbb	r4, r4, r2
-	ldr	r2, .L4481+72
+	ldr	r2, .L4536+72
 	strh	r10, [r2]	@ movhi
 	lsl	r2, fp, #9
 	uxtb	r4, r4
 	uxth	r2, r2
 	strb	r4, [r0]
 	str	r2, [sp, #4]
-	ldr	r2, .L4481+76
+	ldr	r2, .L4536+76
 	ldrh	r1, [sp, #4]
 	strh	r1, [r2]	@ movhi
-	ldr	r2, .L4481+80
+	ldr	r2, .L4536+80
 	ldrh	r1, [r2]
-	ldr	r2, .L4481+84
+	ldr	r2, .L4536+84
 	strh	r1, [r2]	@ movhi
 	movs	r2, #1
-.L4403:
+.L4458:
 	cmp	r1, r2
 	uxth	r0, r5
 	add	r5, r5, #1
-	bcs	.L4404
-	ldr	r1, .L4481+88
+	bcs	.L4459
+	ldr	r1, .L4536+88
 	subs	r2, r0, #1
 	movs	r6, #0
 	movs	r5, #1
@@ -28620,33 +29165,33 @@ zftl_init:
 	mul	r2, r2, fp
 	mul	r0, r2, r10
 	lsrs	r7, r0, #21
-.L4405:
+.L4460:
 	cmp	r7, r5
 	uxth	r1, r6
 	add	r6, r6, #1
-	bcs	.L4406
+	bcs	.L4461
 	mov	r5, #1892352
 	subs	r1, r1, #1
 	mul	r6, r5, r4
 	uxth	r1, r1
-	ldr	r7, .L4481+92
+	ldr	r7, .L4536+92
 	lsr	r10, r10, #4
 	muls	r0, r4, r0
 	str	r2, [sp, #20]
 	str	r3, [sp, #16]
 	lsl	r5, r6, r1
-	ldr	r1, .L4481+96
+	ldr	r1, .L4536+96
 	add	r6, r5, #24576
 	str	r0, [r7]
 	str	r5, [r1]
 	mov	r0, r6
-	ldr	r1, .L4481+100
+	ldr	r1, .L4536+100
 	str	r6, [r1]
 	mov	r1, fp
 	bl	__aeabi_uidiv
 	ldr	r3, [sp, #4]
-	ldr	r1, .L4481+104
-	ldr	fp, .L4481+172
+	ldr	r1, .L4536+104
+	ldr	fp, .L4536+172
 	add	ip, r3, #-1
 	str	r0, [r1]
 	add	r0, ip, r0, lsl #2
@@ -28659,24 +29204,24 @@ zftl_init:
 	mul	r1, r4, r3
 	bl	__aeabi_idiv
 	ldr	r2, [sp, #20]
-	ldr	r3, .L4481+108
+	ldr	r3, .L4536+108
 	mul	r1, r4, r2
 	strh	r0, [r3]	@ movhi
 	mov	r0, r6
 	mov	r6, fp
 	subs	r1, r1, #1
 	bl	__aeabi_uidiv
-	ldr	r3, .L4481+112
+	ldr	r3, .L4536+112
 	adds	r0, r0, #8
 	cmp	r10, #79
-	ldr	ip, .L4481+212
+	ldr	ip, .L4536+212
 	it	ls
 	movls	r2, #80
-	ldr	lr, .L4481+132
+	ldr	lr, .L4536+132
 	strh	r0, [r3]	@ movhi
 	mov	r1, #48
-	ldr	r3, .L4481+116
-	ldr	r0, .L4481+120
+	ldr	r3, .L4536+116
+	ldr	r0, .L4536+120
 	strh	r10, [r3]	@ movhi
 	it	ls
 	strhls	r2, [r3]	@ movhi
@@ -28685,211 +29230,211 @@ zftl_init:
 	movs	r3, #50
 	strh	r3, [r0]	@ movhi
 	mov	r2, #256
-	ldr	r3, .L4481+124
+	ldr	r3, .L4536+124
 	cmp	r8, #2
 	mov	r8, r0
 	strh	r2, [r3]	@ movhi
-	ldr	r2, .L4481+128
+	ldr	r2, .L4536+128
 	strh	r1, [r2]	@ movhi
 	mov	r1, #32
 	strh	r1, [lr]	@ movhi
 	mov	r10, r2
 	mov	lr, ip
-	beq	.L4408
-	ldr	fp, .L4481+216
+	beq	.L4463
+	ldr	fp, .L4536+216
 	ldrb	fp, [fp]	@ zero_extendqisi2
 	cmp	fp, #0
-	beq	.L4409
-.L4408:
+	beq	.L4464
+.L4463:
 	movs	r2, #150
 	movs	r1, #12
 	strh	r2, [r8]	@ movhi
 	movs	r2, #64
 	strh	r2, [r10]	@ movhi
-	ldr	r2, .L4481+132
+	ldr	r2, .L4536+132
 	strh	r1, [r2]	@ movhi
-	ldr	r1, .L4481+136
+	ldr	r1, .L4536+136
 	ldrb	r1, [r1]	@ zero_extendqisi2
-	cbnz	r1, .L4410
+	cbnz	r1, .L4465
 	movs	r1, #4
 	strh	r1, [r2]	@ movhi
 	mov	r2, #600
 	strh	r2, [lr]	@ movhi
 	movs	r2, #128
 	strh	r2, [r3]	@ movhi
-.L4410:
-	ldr	r3, .L4481+140
+.L4465:
+	ldr	r3, .L4536+140
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L4412
+	cbz	r3, .L4467
 	movs	r3, #200
 	strh	r3, [r8]	@ movhi
 	mov	r3, #2000
 	strh	r3, [lr]	@ movhi
-.L4412:
-	ldr	r3, .L4481+144
+.L4467:
+	ldr	r3, .L4536+144
 	movs	r2, #0
 	str	r2, [r3]
 	movs	r2, #1
-	ldr	r3, .L4481+148
+	ldr	r3, .L4536+148
 	strb	r2, [r3]
 	ldr	r2, [sp]
 	muls	r4, r2, r4
 	ldr	r2, [sp, #4]
 	cmp	r2, r4, lsl #2
-	ldr	r4, .L4481+152
+	ldr	r4, .L4536+152
 	itt	lt
 	movlt	r2, #2
 	strblt	r2, [r3]
 	ldr	r3, [r4]
 	lsls	r3, r3, #19
-	bpl	.L4415
+	bpl	.L4470
 	mov	r1, r5
-	ldr	r0, .L4481+156
+	ldr	r0, .L4536+156
 	bl	printf
-.L4415:
+.L4470:
 	ldr	r3, [r4]
 	lsls	r5, r3, #19
-	bpl	.L4416
+	bpl	.L4471
 	ldr	r1, [r7]
-	ldr	r0, .L4481+160
+	ldr	r0, .L4536+160
 	bl	printf
-.L4416:
+.L4471:
 	ldr	r3, [r4]
 	lsls	r0, r3, #19
-	bpl	.L4417
-	ldr	r3, .L4481+104
-	ldr	r0, .L4481+164
+	bpl	.L4472
+	ldr	r3, .L4536+104
+	ldr	r0, .L4536+164
 	ldr	r1, [r3]
 	bl	printf
-.L4417:
+.L4472:
 	ldr	r3, [r4]
 	lsls	r1, r3, #19
-	bpl	.L4418
-	ldr	r3, .L4481+100
-	ldr	r0, .L4481+168
+	bpl	.L4473
+	ldr	r3, .L4536+100
+	ldr	r0, .L4536+168
 	ldr	r1, [r3]
 	bl	printf
-.L4418:
+.L4473:
 	ldr	r3, [r4]
 	lsls	r2, r3, #19
-	bpl	.L4419
-	ldr	r3, .L4481+172
-	ldr	r0, .L4481+176
+	bpl	.L4474
+	ldr	r3, .L4536+172
+	ldr	r0, .L4536+176
 	ldrh	r1, [r3]
 	bl	printf
-.L4419:
+.L4474:
 	ldr	r3, [r4]
-	ldr	r8, .L4481+76
+	ldr	r8, .L4536+76
 	tst	r3, #4096
-	beq	.L4420
+	beq	.L4475
 	ldrh	r1, [r8]
-	ldr	r0, .L4481+180
+	ldr	r0, .L4536+180
 	bl	printf
-.L4420:
+.L4475:
 	ldr	r3, [r4]
 	lsls	r3, r3, #19
-	bpl	.L4421
-	ldr	r3, .L4481+108
-	ldr	r0, .L4481+184
+	bpl	.L4476
+	ldr	r3, .L4536+108
+	ldr	r0, .L4536+184
 	ldrh	r1, [r3]
 	bl	printf
-.L4421:
+.L4476:
 	ldr	r3, [r4]
 	lsls	r7, r3, #19
-	bpl	.L4422
-	ldr	r3, .L4481+116
-	ldr	r0, .L4481+188
+	bpl	.L4477
+	ldr	r3, .L4536+116
+	ldr	r0, .L4536+188
 	ldrh	r1, [r3]
 	bl	printf
-.L4422:
+.L4477:
 	ldr	r3, [r4]
 	lsls	r5, r3, #19
-	bpl	.L4423
-	ldr	r3, .L4481+112
-	ldr	r0, .L4481+192
+	bpl	.L4478
+	ldr	r3, .L4536+112
+	ldr	r0, .L4536+192
 	ldrh	r1, [r3]
 	bl	printf
-.L4423:
+.L4478:
 	bl	zbuf_init
 	mov	r0, #16384
-	ldr	r5, .L4481+196
+	ldr	r5, .L4536+196
 	bl	ftl_malloc
-	ldr	r3, .L4481+200
-	ldr	r7, .L4481+72
+	ldr	r3, .L4536+200
+	ldr	r7, .L4536+72
 	str	r0, [r3]
 	mov	r0, #16384
 	bl	ftl_malloc
 	str	r0, [r5]
 	mov	r0, #16384
 	bl	ftl_malloc
-	ldr	r3, .L4481+204
+	ldr	r3, .L4536+204
 	str	r0, [r3]
 	movs	r0, #6
 	ldrh	r3, [r7]
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L4481+208
+	ldr	r3, .L4536+208
 	ldr	r2, [sp, #12]
-	b	.L4482
-.L4483:
+	b	.L4537
+.L4538:
 	.align	2
-.L4481:
+.L4536:
+	.word	.LANCHOR65
+	.word	.LANCHOR32
 	.word	.LANCHOR66
-	.word	.LANCHOR33
-	.word	.LANCHOR67
-	.word	.LC239
-	.word	.LC104
+	.word	.LC242
+	.word	.LC101
 	.word	.LANCHOR133
-	.word	.LANCHOR95
+	.word	.LANCHOR94
 	.word	.LANCHOR134
-	.word	.LANCHOR185
+	.word	.LANCHOR182
 	.word	.LANCHOR129
 	.word	.LANCHOR238
-	.word	.LANCHOR79
+	.word	.LANCHOR78
 	.word	.LANCHOR131
-	.word	.LANCHOR86
-	.word	.LANCHOR18
-	.word	.LANCHOR76
+	.word	.LANCHOR85
+	.word	.LANCHOR23
+	.word	.LANCHOR75
 	.word	.LANCHOR112
-	.word	.LANCHOR80
-	.word	.LANCHOR6
+	.word	.LANCHOR79
+	.word	.LANCHOR8
 	.word	.LANCHOR221
 	.word	.LANCHOR2
 	.word	.LANCHOR111
-	.word	.LANCHOR75
+	.word	.LANCHOR74
 	.word	.LANCHOR239
-	.word	.LANCHOR68
+	.word	.LANCHOR67
 	.word	.LANCHOR240
 	.word	.LANCHOR128
-	.word	.LANCHOR155
+	.word	.LANCHOR152
 	.word	.LANCHOR101
 	.word	.LANCHOR98
 	.word	.LANCHOR125
-	.word	.LANCHOR152
-	.word	.LANCHOR153
-	.word	.LANCHOR8
+	.word	.LANCHOR149
+	.word	.LANCHOR150
+	.word	.LANCHOR10
 	.word	.LANCHOR0
-	.word	.LANCHOR37
+	.word	.LANCHOR36
 	.word	.LANCHOR122
 	.word	.LANCHOR224
-	.word	.LANCHOR14
-	.word	.LC240
-	.word	.LC241
-	.word	.LC242
+	.word	.LANCHOR19
 	.word	.LC243
-	.word	.LANCHOR204
 	.word	.LC244
 	.word	.LC245
 	.word	.LC246
+	.word	.LANCHOR202
 	.word	.LC247
 	.word	.LC248
-	.word	.LANCHOR200
-	.word	.LANCHOR195
-	.word	.LANCHOR190
+	.word	.LC249
+	.word	.LC250
+	.word	.LC251
+	.word	.LANCHOR197
+	.word	.LANCHOR192
+	.word	.LANCHOR187
 	.word	.LANCHOR4
 	.word	.LANCHOR126
-	.word	.LANCHOR84
-.L4482:
+	.word	.LANCHOR83
+.L4537:
 	str	r0, [r3]
 	ldr	r3, [sp, #8]
 	ldrb	r0, [r2]	@ zero_extendqisi2
@@ -28897,31 +29442,31 @@ zftl_init:
 	muls	r0, r3, r0
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L4484
+	ldr	r3, .L4539
 	ldr	r2, [r5]
 	ldrh	r5, [r7]
 	str	r0, [r3]
-	ldr	r3, .L4484+4
+	ldr	r3, .L4539+4
 	str	r2, [r3]
 	ldr	r3, [sp, #8]
 	ldrh	r1, [r3]
 	ldr	r3, [sp, #12]
 	ldrb	r0, [r3]	@ zero_extendqisi2
 	muls	r0, r1, r0
-	ldr	r1, .L4484+8
+	ldr	r1, .L4539+8
 	add	r3, r2, r0, lsl #3
 	str	r3, [r1]
 	lsls	r1, r0, #1
 	ldr	r0, [r4]
 	add	r1, r1, r5, lsr #1
-	ldr	r5, .L4484+12
+	ldr	r5, .L4539+12
 	add	r1, r2, r1, lsl #2
 	lsls	r0, r0, #19
 	str	r1, [r5]
-	bpl	.L4424
-	ldr	r0, .L4484+16
+	bpl	.L4479
+	ldr	r0, .L4539+16
 	bl	printf
-.L4424:
+.L4479:
 	ldr	r2, [sp, #8]
 	ldr	r1, [sp, #12]
 	ldrh	r3, [r7]
@@ -28937,46 +29482,46 @@ zftl_init:
 	lsls	r2, r3, #19
 	add	r7, r7, #632
 	add	r6, r6, #704
-	bpl	.L4425
+	bpl	.L4480
 	ldrh	r3, [r8]
 	mov	r2, r6
 	mov	r1, r7
-	ldr	r0, .L4484+20
+	ldr	r0, .L4539+20
 	bl	printf
-.L4425:
+.L4480:
 	ldrh	r3, [r8]
 	cmp	r7, r3
-	bhi	.L4426
+	bhi	.L4481
 	cmp	r6, r3
-	bls	.L4427
-.L4426:
-.L4480:
-	b	.L4480
-.L4404:
+	bls	.L4482
+.L4481:
+.L4535:
+	b	.L4535
+.L4459:
 	lsls	r2, r2, #1
-	b	.L4403
-.L4406:
+	b	.L4458
+.L4461:
 	lsls	r5, r5, #1
-	b	.L4405
-.L4409:
-	ldr	r3, .L4484+24
+	b	.L4460
+.L4464:
+	ldr	r3, .L4539+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L4412
+	beq	.L4467
 	mov	r3, #1200
 	strh	r1, [r0]	@ movhi
 	strh	r3, [ip]	@ movhi
 	strh	r1, [r2]	@ movhi
-	b	.L4412
-.L4427:
+	b	.L4467
+.L4482:
 	bl	sblk_init
 	bl	ftl_info_blk_init
 	adds	r3, r0, #1
-	beq	.L4402
+	beq	.L4457
 	bl	ftl_ext_info_init
 	bl	gc_init
 	movs	r0, #1
-	ldr	r4, .L4484+28
+	ldr	r4, .L4539+28
 	bl	pm_init
 	bl	lpa_rebuild_hash
 	ldr	r0, [r5]
@@ -29004,38 +29549,38 @@ zftl_init:
 	bl	pm_flush
 	movs	r0, #1
 	bl	ftl_total_vpn_update
-	ldr	r3, .L4484+32
+	ldr	r3, .L4539+32
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L4429
+	cbz	r3, .L4484
 	ldr	r2, [r4]
 	ldr	r3, [r2, #68]
 	adds	r3, r3, #1
 	str	r3, [r2, #68]
-.L4429:
+.L4484:
 	bl	ftl_ext_info_flush
 	movs	r0, #0
 	bl	ftl_info_flush
 	bl	print_ftl_debug_info
 	ldr	r3, [r5]
 	ldrh	r3, [r3, #124]
-	cbnz	r3, .L4436
-	ldr	r3, .L4484+36
-	ldr	r2, .L4484+40
+	cbnz	r3, .L4491
+	ldr	r3, .L4539+36
+	ldr	r2, .L4539+40
 	ldrh	r3, [r3]
 	ldrh	r2, [r2]
 	add	r3, r3, r2
 	cmp	r3, #7
-	ble	.L4436
-.L4432:
+	ble	.L4491
+.L4487:
 	movs	r0, #0
-.L4402:
+.L4457:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L4436:
-	ldr	r6, .L4484+36
+.L4491:
+	ldr	r6, .L4539+36
 	mov	r4, #16384
-.L4433:
+.L4488:
 	movs	r1, #1
 	movs	r0, #0
 	bl	zftl_do_gc
@@ -29044,33 +29589,33 @@ zftl_init:
 	bl	zftl_do_gc
 	ldr	r3, [r5]
 	ldrh	r2, [r3, #124]
-	cbnz	r2, .L4431
+	cbnz	r2, .L4486
 	ldrh	r2, [r3, #80]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L4431
-	ldr	r2, .L4484+40
+	bne	.L4486
+	ldr	r2, .L4539+40
 	ldrh	r3, [r6]
 	ldrh	r2, [r2]
 	add	r3, r3, r2
 	cmp	r3, #7
-	bgt	.L4432
-.L4431:
+	bgt	.L4487
+.L4486:
 	subs	r4, r4, #1
-	bne	.L4433
-	b	.L4432
-.L4485:
+	bne	.L4488
+	b	.L4487
+.L4540:
 	.align	2
-.L4484:
+.L4539:
 	.word	.LANCHOR118
 	.word	.LANCHOR117
-	.word	.LANCHOR9
-	.word	.LANCHOR10
-	.word	.LC249
-	.word	.LC250
-	.word	.LANCHOR36
+	.word	.LANCHOR11
+	.word	.LANCHOR12
+	.word	.LC252
+	.word	.LC253
+	.word	.LANCHOR35
 	.word	.LANCHOR110
-	.word	.LANCHOR198
+	.word	.LANCHOR195
 	.word	.LANCHOR103
 	.word	.LANCHOR107
 	.size	zftl_init, .-zftl_init
@@ -29088,20 +29633,20 @@ rk_ftl_init:
 	push	{r4, lr}
 	bl	nand_flash_init
 	mov	r4, r0
-	cbnz	r0, .L4487
+	cbnz	r0, .L4542
 	bl	zftl_init
 	mov	r4, r0
-.L4487:
+.L4542:
 	bl	idb_init
 	mov	r1, r4
-	ldr	r0, .L4488
+	ldr	r0, .L4543
 	bl	printf
 	mov	r0, r4
 	pop	{r4, pc}
-.L4489:
+.L4544:
 	.align	2
-.L4488:
-	.word	.LC251
+.L4543:
+	.word	.LC254
 	.size	rk_ftl_init, .-rk_ftl_init
 	.section	.text.zftl_write,"ax",%progbits
 	.align	1
@@ -29116,36 +29661,36 @@ zftl_write:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r8, r3
-	ldr	r3, .L4519
+	ldr	r3, .L4574
 	sub	sp, sp, #24
 	mov	r4, r0
 	mov	r6, r1
 	mov	r5, r2
 	ldr	r3, [r3]
 	lsls	r3, r3, #19
-	bpl	.L4491
+	bpl	.L4546
 	ldr	r3, [r8]
 	str	r3, [sp]
 	mov	r3, r2
 	mov	r2, r1
 	mov	r1, r0
-	ldr	r0, .L4519+4
+	ldr	r0, .L4574+4
 	bl	printf
-.L4491:
+.L4546:
 	cmp	r4, #0
-	bne	.L4492
-	ldr	r3, .L4519+8
+	bne	.L4547
+	ldr	r3, .L4574+8
 	mov	r4, #24576
 	ldr	r3, [r3]
-.L4493:
+.L4548:
 	cmp	r3, r6
-	bls	.L4511
+	bls	.L4566
 	cmp	r3, r5
-	bcc	.L4511
+	bcc	.L4566
 	adds	r2, r6, r5
 	cmp	r3, r2
-	bcc	.L4511
-	ldr	fp, .L4519+36
+	bcc	.L4566
+	ldr	fp, .L4574+36
 	add	r4, r4, r6
 	mov	r0, r4
 	ldrb	r6, [fp]	@ zero_extendqisi2
@@ -29161,70 +29706,70 @@ zftl_write:
 	adds	r6, r6, #1
 	str	r0, [sp, #12]
 	str	fp, [sp, #16]
-.L4495:
-	cbnz	r6, .L4503
+.L4550:
+	cbnz	r6, .L4558
 	bl	ftl_write_commit
 	bl	ftl_flush
 	movs	r1, #1
 	mov	r0, r6
 	bl	zftl_do_gc
-	ldr	r3, .L4519+12
-	ldr	r5, .L4519+16
-	ldr	r4, .L4519+20
+	ldr	r3, .L4574+12
+	ldr	r5, .L4574+16
+	ldr	r4, .L4574+20
 	ldr	r3, [r3]
 	ldrh	r3, [r3, #124]
-	cbnz	r3, .L4504
+	cbnz	r3, .L4559
 	ldrh	r3, [r5]
 	ldrh	r2, [r4]
 	add	r3, r3, r2
 	cmp	r3, #11
-	bgt	.L4506
-.L4504:
+	bgt	.L4561
+.L4559:
 	movs	r1, #1
 	movs	r0, #0
-.L4518:
+.L4573:
 	bl	zftl_do_gc
-.L4506:
+.L4561:
 	ldrh	r3, [r5]
 	ldrh	r2, [r4]
 	add	r3, r3, r2
 	cmp	r3, #7
-	ble	.L4507
+	ble	.L4562
 	movs	r0, #0
-.L4490:
+.L4545:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L4492:
+.L4547:
 	cmp	r4, #3
-	bhi	.L4511
+	bhi	.L4566
 	lsls	r4, r4, #13
 	mov	r3, #8192
-	b	.L4493
-.L4503:
-	ldr	r3, .L4519+24
+	b	.L4548
+.L4558:
+	ldr	r3, .L4574+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L4496
-	ldr	r3, .L4519+28
+	cbz	r3, .L4551
+	ldr	r3, .L4574+28
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #2
-	bhi	.L4496
+	bhi	.L4551
 	bl	ftl_write_commit
-.L4496:
+.L4551:
 	movs	r0, #0
 	bl	buf_alloc
 	mov	fp, r0
-	cbnz	r0, .L4497
+	cbnz	r0, .L4552
 	bl	ftl_write_commit
-	b	.L4495
-.L4497:
+	b	.L4550
+.L4552:
 	ldr	r3, [sp, #16]
 	movs	r2, #0
 	strb	r2, [r0, #41]
 	cmp	r7, r10
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	strb	r2, [r0, #40]
-	bne	.L4499
+	bne	.L4554
 	mov	r1, r2
 	mov	r0, r4
 	str	r2, [sp, #20]
@@ -29238,7 +29783,7 @@ zftl_write:
 	ite	cs
 	strbcs	r1, [fp, #40]
 	strbcc	r5, [fp, #40]
-.L4501:
+.L4556:
 	ldrb	ip, [fp, #41]	@ zero_extendqisi2
 	mov	r1, r8
 	ldrb	r2, [fp, #40]	@ zero_extendqisi2
@@ -29247,7 +29792,7 @@ zftl_write:
 	lsls	r2, r2, #9
 	add	r0, r0, ip, lsl #9
 	bl	ftl_memcpy
-	ldr	r2, .L4519+32
+	ldr	r2, .L4574+32
 	str	r7, [fp, #20]
 	adds	r7, r7, #1
 	ldr	r1, [r2]
@@ -29259,8 +29804,8 @@ zftl_write:
 	bl	ftl_write_buf
 	ldrb	r3, [fp, #40]	@ zero_extendqisi2
 	add	r8, r8, r3, lsl #9
-	b	.L4495
-.L4499:
+	b	.L4550
+.L4554:
 	ldr	r3, [sp, #12]
 	cmp	r7, r3
 	itttt	eq
@@ -29268,28 +29813,28 @@ zftl_write:
 	addeq	r1, r4, r5
 	subeq	r2, r1, r2
 	strbeq	r2, [r0, #40]
-	b	.L4501
-.L4507:
+	b	.L4556
+.L4562:
 	movs	r1, #1
 	movs	r0, #0
 	bl	zftl_do_gc
 	movs	r1, #1
 	mov	r0, r1
-	b	.L4518
-.L4511:
+	b	.L4573
+.L4566:
 	mov	r0, #-1
-	b	.L4490
-.L4520:
+	b	.L4545
+.L4575:
 	.align	2
-.L4519:
-	.word	.LANCHOR14
-	.word	.LC252
-	.word	.LANCHOR68
-	.word	.LANCHOR10
+.L4574:
+	.word	.LANCHOR19
+	.word	.LC255
+	.word	.LANCHOR67
+	.word	.LANCHOR12
 	.word	.LANCHOR103
 	.word	.LANCHOR107
-	.word	.LANCHOR67
-	.word	.LANCHOR58
+	.word	.LANCHOR66
+	.word	.LANCHOR57
 	.word	.LANCHOR110
 	.word	.LANCHOR131
 	.size	zftl_write, .-zftl_write
@@ -29363,11 +29908,11 @@ ftl_write:
 	mov	r4, r2
 	mov	r5, r3
 	mov	r6, r0
-	cbnz	r0, .L4525
+	cbnz	r0, .L4580
 	mov	r3, r2
 	mov	r2, r5
 	bl	idb_write_data
-.L4525:
+.L4580:
 	mov	r3, r5
 	mov	r2, r4
 	mov	r1, r7
@@ -29418,21 +29963,21 @@ zftl_vendor_write:
 zftl_discard:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L4578
+	ldr	r3, .L4633
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r1
 	sub	sp, sp, #32
 	ldr	r3, [r3]
 	cmp	r0, r3
-	bcs	.L4551
+	bcs	.L4606
 	cmp	r1, r3
-	bhi	.L4551
+	bhi	.L4606
 	adds	r2, r0, r1
 	cmp	r3, r2
-	bcc	.L4551
-	ldr	r2, .L4578+4
+	bcc	.L4606
+	ldr	r2, .L4633+4
 	add	r7, r0, #24576
-	ldr	r3, .L4578+8
+	ldr	r3, .L4633+8
 	ldr	r0, [r2]
 	ldr	r1, [r3]
 	str	r3, [sp, #12]
@@ -29440,16 +29985,16 @@ zftl_discard:
 	str	r2, [sp, #16]
 	add	r1, r1, r4
 	str	r1, [r3]
-	beq	.L4530
+	beq	.L4585
 	movs	r3, #0
 	mov	r2, r7
 	str	r3, [sp]
 	mov	r3, r4
-	ldr	r0, .L4578+12
+	ldr	r0, .L4633+12
 	bl	printf
-.L4530:
-	ldr	r8, .L4578+36
-	ldr	r10, .L4578+40
+.L4585:
+	ldr	r8, .L4633+36
+	ldr	r10, .L4633+40
 	ldr	r3, [r8]
 	ldr	r2, [r3, #8]
 	str	r2, [sp, #8]
@@ -29467,7 +30012,7 @@ zftl_discard:
 	bl	__aeabi_uidivmod
 	mov	fp, r1
 	cmp	r1, #0
-	beq	.L4531
+	beq	.L4586
 	subs	r6, r6, r1
 	mov	r0, r5
 	cmp	r6, r4
@@ -29476,19 +30021,19 @@ zftl_discard:
 	bl	lpa_hash_get_ppa
 	str	r0, [sp, #24]
 	adds	r0, r0, #1
-	bne	.L4532
+	bne	.L4587
 	movs	r2, #0
 	add	r1, sp, #24
 	mov	r0, r5
 	bl	pm_log2phys
-.L4532:
+.L4587:
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	beq	.L4534
+	beq	.L4589
 	movs	r0, #0
 	bl	buf_alloc
 	mov	r3, r0
-	cbz	r0, .L4534
+	cbz	r0, .L4589
 	ldr	r2, [sp, #8]
 	movs	r1, #0
 	str	r5, [r0, #20]
@@ -29509,41 +30054,41 @@ zftl_discard:
 	ldr	r3, [r2, #76]
 	adds	r3, r3, #1
 	str	r3, [r2, #76]
-.L4534:
+.L4589:
 	uxth	r6, r6
 	adds	r5, r5, #1
 	subs	r4, r4, r6
-.L4531:
-	cbz	r4, .L4536
+.L4586:
+	cbz	r4, .L4591
 	bl	ftl_flush
-.L4536:
-	ldr	fp, .L4578+44
+.L4591:
+	ldr	fp, .L4633+44
 	mov	r3, #-1
-	ldr	r6, .L4578+16
+	ldr	r6, .L4633+16
 	str	r3, [sp, #28]
-.L4537:
+.L4592:
 	ldrb	r3, [r10]	@ zero_extendqisi2
 	cmp	r4, r3
-	bcs	.L4542
+	bcs	.L4597
 	cmp	r4, #0
-	beq	.L4544
+	beq	.L4599
 	mov	r0, r5
 	bl	lpa_hash_get_ppa
 	str	r0, [sp, #24]
 	adds	r0, r0, #1
-	bne	.L4545
+	bne	.L4600
 	movs	r2, #0
 	add	r1, sp, #24
 	mov	r0, r5
 	bl	pm_log2phys
-.L4545:
+.L4600:
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	beq	.L4544
+	beq	.L4599
 	movs	r0, #0
 	bl	buf_alloc
 	mov	r6, r0
-	cbz	r0, .L4544
+	cbz	r0, .L4599
 	movs	r3, #0
 	str	r5, [r0, #20]
 	strb	r3, [r0, #41]
@@ -29552,12 +30097,12 @@ zftl_discard:
 	str	r3, [r0, #16]
 	ldrb	r3, [r10]	@ zero_extendqisi2
 	cmp	r4, r3
-	bcc	.L4547
-	movw	r2, #1477
-	ldr	r1, .L4578+20
-	ldr	r0, .L4578+24
+	bcc	.L4602
+	movw	r2, #1493
+	ldr	r1, .L4633+20
+	ldr	r0, .L4633+24
 	bl	printf
-.L4547:
+.L4602:
 	lsls	r2, r4, #9
 	movs	r1, #0
 	ldr	r0, [r6, #4]
@@ -29569,42 +30114,42 @@ zftl_discard:
 	ldr	r3, [r2, #76]
 	adds	r3, r3, #1
 	str	r3, [r2, #76]
-.L4544:
+.L4599:
 	ldr	r3, [sp, #12]
 	ldr	r1, [r3]
 	cmp	r1, #8192
-	bls	.L4552
+	bls	.L4607
 	ldr	r3, [sp, #16]
 	ldr	r3, [r3]
 	lsls	r3, r3, #19
-	bpl	.L4548
+	bpl	.L4603
 	movs	r3, #0
 	mov	r2, r7
 	str	r3, [sp]
 	mov	r3, r4
-	ldr	r0, .L4578+12
+	ldr	r0, .L4633+12
 	bl	printf
-.L4548:
+.L4603:
 	ldr	r3, [sp, #12]
 	movs	r4, #0
 	str	r4, [r3]
 	bl	flt_sys_flush
-	ldr	r3, .L4578+28
+	ldr	r3, .L4633+28
 	movs	r2, #1
 	str	r2, [r3]
-.L4552:
+.L4607:
 	movs	r0, #0
-	b	.L4528
-.L4542:
+	b	.L4583
+.L4597:
 	mov	r0, r5
 	bl	lpa_hash_get_ppa
 	str	r0, [sp, #24]
 	adds	r0, r0, #1
-	beq	.L4538
+	beq	.L4593
 	movs	r0, #0
 	bl	buf_alloc
 	mov	r3, r0
-	cbz	r0, .L4540
+	cbz	r0, .L4595
 	ldrb	r2, [r10]	@ zero_extendqisi2
 	movs	r1, #0
 	strb	r1, [r0, #41]
@@ -29620,24 +30165,24 @@ zftl_discard:
 	mov	r0, r3
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-.L4577:
+.L4632:
 	ldr	r2, [r8]
 	ldr	r3, [r2, #76]
 	adds	r3, r3, #1
 	str	r3, [r2, #76]
-.L4540:
+.L4595:
 	ldrb	r3, [r10]	@ zero_extendqisi2
 	adds	r5, r5, #1
 	subs	r4, r4, r3
-	b	.L4537
-.L4538:
+	b	.L4592
+.L4593:
 	movs	r2, #0
 	add	r1, sp, #24
 	mov	r0, r5
 	bl	pm_log2phys
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	beq	.L4540
+	beq	.L4595
 	add	r1, sp, #28
 	movs	r2, #1
 	mov	r0, r5
@@ -29651,34 +30196,34 @@ zftl_discard:
 	ldr	r0, [sp, #24]
 	subs	r3, r3, #1
 	lsrs	r0, r0, r2
-	ldr	r2, .L4578+32
+	ldr	r2, .L4633+32
 	ands	r0, r0, r3
 	ldrb	r1, [r2]	@ zero_extendqisi2
 	bl	__aeabi_uidiv
 	uxth	r0, r0
 	bl	ftl_vpn_decrement
-	b	.L4577
-.L4551:
+	b	.L4632
+.L4606:
 	mov	r0, #-1
-.L4528:
+.L4583:
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L4579:
+.L4634:
 	.align	2
-.L4578:
-	.word	.LANCHOR68
-	.word	.LANCHOR14
+.L4633:
+	.word	.LANCHOR67
+	.word	.LANCHOR19
 	.word	.LANCHOR241
-	.word	.LC253
-	.word	.LANCHOR32
+	.word	.LC256
+	.word	.LANCHOR31
 	.word	.LANCHOR242
 	.word	.LC0
 	.word	.LANCHOR122
-	.word	.LANCHOR76
+	.word	.LANCHOR75
 	.word	.LANCHOR110
 	.word	.LANCHOR131
-	.word	.LANCHOR75
+	.word	.LANCHOR74
 	.size	zftl_discard, .-zftl_discard
 	.section	.text.ftl_discard,"ax",%progbits
 	.align	1
@@ -29709,46 +30254,46 @@ dump_pm_blk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r2, #4
-	ldr	r4, .L4585
+	ldr	r4, .L4640
 	movs	r5, #0
 	movw	r7, #65535
-	ldr	r0, .L4585+4
+	ldr	r0, .L4640+4
 	ldr	r1, [r4]
-	ldr	r6, .L4585+8
+	ldr	r6, .L4640+8
 	ldrh	r3, [r1, #698]
 	add	r1, r1, #704
 	bl	rknand_print_hex
 	ldr	r1, [r4]
 	movs	r2, #2
 	ldrh	r3, [r6]
-	ldr	r0, .L4585+12
+	ldr	r0, .L4640+12
 	add	r1, r1, #416
 	bl	rknand_print_hex
-.L4582:
+.L4637:
 	ldrh	r2, [r6]
 	uxth	r3, r5
 	cmp	r2, r3
-	bhi	.L4584
+	bhi	.L4639
 	pop	{r3, r4, r5, r6, r7, pc}
-.L4584:
+.L4639:
 	ldr	r2, [r4]
 	uxth	r3, r5
 	adds	r3, r3, #208
 	ldrh	r0, [r2, r3, lsl #1]
 	cmp	r0, r7
-	beq	.L4583
+	beq	.L4638
 	movs	r1, #0
 	bl	ftl_sblk_dump
-.L4583:
+.L4638:
 	adds	r5, r5, #1
-	b	.L4582
-.L4586:
+	b	.L4637
+.L4641:
 	.align	2
-.L4585:
+.L4640:
 	.word	.LANCHOR110
-	.word	.LC254
-	.word	.LANCHOR155
-	.word	.LC255
+	.word	.LC257
+	.word	.LANCHOR152
+	.word	.LC258
 	.size	dump_pm_blk, .-dump_pm_blk
 	.global	g_pm_spare
 	.global	pm_first_write
@@ -29916,21 +30461,21 @@ dump_pm_blk:
 	.global	g_flash_page_buffer
 	.section	.bss.IDByte,"aw",%nobits
 	.align	2
-	.set	.LANCHOR48,. + 0
+	.set	.LANCHOR47,. + 0
 	.type	IDByte, %object
 	.size	IDByte, 32
 IDByte:
 	.space	32
 	.section	.bss._c_ftl_blk_pre_plane,"aw",%nobits
 	.align	1
-	.set	.LANCHOR6,. + 0
+	.set	.LANCHOR8,. + 0
 	.type	_c_ftl_blk_pre_plane, %object
 	.size	_c_ftl_blk_pre_plane, 2
 _c_ftl_blk_pre_plane:
 	.space	2
 	.section	.bss._c_ftl_block_addr_log2,"aw",%nobits
 	.align	1
-	.set	.LANCHOR75,. + 0
+	.set	.LANCHOR74,. + 0
 	.type	_c_ftl_block_addr_log2, %object
 	.size	_c_ftl_block_addr_log2, 2
 _c_ftl_block_addr_log2:
@@ -29950,7 +30495,7 @@ _c_ftl_block_align_addr:
 _c_ftl_byte_pre_page:
 	.space	2
 	.section	.bss._c_ftl_cs_bits,"aw",%nobits
-	.set	.LANCHOR32,. + 0
+	.set	.LANCHOR31,. + 0
 	.type	_c_ftl_cs_bits, %object
 	.size	_c_ftl_cs_bits, 1
 _c_ftl_cs_bits:
@@ -29968,40 +30513,40 @@ _c_ftl_nand_blks_per_die:
 _c_ftl_nand_die_num:
 	.space	1
 	.section	.bss._c_ftl_nand_planes_num,"aw",%nobits
-	.set	.LANCHOR80,. + 0
+	.set	.LANCHOR79,. + 0
 	.type	_c_ftl_nand_planes_num, %object
 	.size	_c_ftl_nand_planes_num, 1
 _c_ftl_nand_planes_num:
 	.space	1
 	.section	.bss._c_ftl_nand_type,"aw",%nobits
-	.set	.LANCHOR79,. + 0
+	.set	.LANCHOR78,. + 0
 	.type	_c_ftl_nand_type, %object
 	.size	_c_ftl_nand_type, 1
 _c_ftl_nand_type:
 	.space	1
 	.section	.bss._c_ftl_page_pre_blk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR86,. + 0
+	.set	.LANCHOR85,. + 0
 	.type	_c_ftl_page_pre_blk, %object
 	.size	_c_ftl_page_pre_blk, 2
 _c_ftl_page_pre_blk:
 	.space	2
 	.section	.bss._c_ftl_page_pre_slc_blk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR95,. + 0
+	.set	.LANCHOR94,. + 0
 	.type	_c_ftl_page_pre_slc_blk, %object
 	.size	_c_ftl_page_pre_slc_blk, 2
 _c_ftl_page_pre_slc_blk:
 	.space	2
 	.section	.bss._c_ftl_planes_per_die,"aw",%nobits
-	.set	.LANCHOR76,. + 0
+	.set	.LANCHOR75,. + 0
 	.type	_c_ftl_planes_per_die, %object
 	.size	_c_ftl_planes_per_die, 1
 _c_ftl_planes_per_die:
 	.space	1
 	.section	.bss._c_ftl_pm_page_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR204,. + 0
+	.set	.LANCHOR202,. + 0
 	.type	_c_ftl_pm_page_num, %object
 	.size	_c_ftl_pm_page_num, 2
 _c_ftl_pm_page_num:
@@ -30014,7 +30559,7 @@ _c_ftl_sec_per_page:
 	.space	1
 	.section	.bss._c_max_pm_sblk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR155,. + 0
+	.set	.LANCHOR152,. + 0
 	.type	_c_max_pm_sblk, %object
 	.size	_c_max_pm_sblk, 2
 _c_max_pm_sblk:
@@ -30035,21 +30580,21 @@ _c_mix_max_xlc_ec_count:
 	.space	2
 	.section	.bss._c_slc_to_xlc_ec_ratio,"aw",%nobits
 	.align	1
-	.set	.LANCHOR8,. + 0
+	.set	.LANCHOR10,. + 0
 	.type	_c_slc_to_xlc_ec_ratio, %object
 	.size	_c_slc_to_xlc_ec_ratio, 2
 _c_slc_to_xlc_ec_ratio:
 	.space	2
 	.section	.bss._c_swl_slc_gc_th,"aw",%nobits
 	.align	1
-	.set	.LANCHOR152,. + 0
+	.set	.LANCHOR149,. + 0
 	.type	_c_swl_slc_gc_th, %object
 	.size	_c_swl_slc_gc_th, 2
 _c_swl_slc_gc_th:
 	.space	2
 	.section	.bss._c_swl_xlc_gc_th,"aw",%nobits
 	.align	1
-	.set	.LANCHOR153,. + 0
+	.set	.LANCHOR150,. + 0
 	.type	_c_swl_xlc_gc_th, %object
 	.size	_c_swl_xlc_gc_th, 2
 _c_swl_xlc_gc_th:
@@ -30077,7 +30622,7 @@ _c_totle_phy_density:
 	.space	4
 	.section	.bss._c_user_data_density,"aw",%nobits
 	.align	2
-	.set	.LANCHOR68,. + 0
+	.set	.LANCHOR67,. + 0
 	.type	_c_user_data_density, %object
 	.size	_c_user_data_density, 4
 _c_user_data_density:
@@ -30130,27 +30675,27 @@ discard_sector_count:
 	.space	4
 	.section	.bss.fill_spare_size,"aw",%nobits
 	.align	1
-	.set	.LANCHOR54,. + 0
+	.set	.LANCHOR53,. + 0
 	.type	fill_spare_size, %object
 	.size	fill_spare_size, 2
 fill_spare_size:
 	.space	2
 	.section	.bss.flash_ddr_tuning_sdr_read_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR172,. + 0
+	.set	.LANCHOR169,. + 0
 	.type	flash_ddr_tuning_sdr_read_count, %object
 	.size	flash_ddr_tuning_sdr_read_count, 4
 flash_ddr_tuning_sdr_read_count:
 	.space	4
 	.section	.bss.flash_read_retry,"aw",%nobits
 	.align	2
-	.set	.LANCHOR174,. + 0
+	.set	.LANCHOR171,. + 0
 	.type	flash_read_retry, %object
 	.size	flash_read_retry, 4
 flash_read_retry:
 	.space	4
 	.section	.bss.free_buf_count,"aw",%nobits
-	.set	.LANCHOR58,. + 0
+	.set	.LANCHOR57,. + 0
 	.type	free_buf_count, %object
 	.size	free_buf_count, 1
 free_buf_count:
@@ -30178,13 +30723,13 @@ free_xlc_sblk:
 	.space	2
 	.section	.bss.ftl_ext_info_data_buffer,"aw",%nobits
 	.align	2
-	.set	.LANCHOR200,. + 0
+	.set	.LANCHOR197,. + 0
 	.type	ftl_ext_info_data_buffer, %object
 	.size	ftl_ext_info_data_buffer, 4
 ftl_ext_info_data_buffer:
 	.space	4
 	.section	.bss.ftl_ext_info_first_write,"aw",%nobits
-	.set	.LANCHOR199,. + 0
+	.set	.LANCHOR196,. + 0
 	.type	ftl_ext_info_first_write, %object
 	.size	ftl_ext_info_first_write, 1
 ftl_ext_info_first_write:
@@ -30198,27 +30743,27 @@ ftl_flush_jiffies:
 	.space	4
 	.section	.bss.ftl_info_data_buffer,"aw",%nobits
 	.align	2
-	.set	.LANCHOR195,. + 0
+	.set	.LANCHOR192,. + 0
 	.type	ftl_info_data_buffer, %object
 	.size	ftl_info_data_buffer, 4
 ftl_info_data_buffer:
 	.space	4
 	.section	.bss.ftl_info_spare,"aw",%nobits
 	.align	6
-	.set	.LANCHOR193,. + 0
+	.set	.LANCHOR190,. + 0
 	.type	ftl_info_spare, %object
 	.size	ftl_info_spare, 256
 ftl_info_spare:
 	.space	256
 	.section	.bss.ftl_low_format_cur_blk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR69,. + 0
+	.set	.LANCHOR68,. + 0
 	.type	ftl_low_format_cur_blk, %object
 	.size	ftl_low_format_cur_blk, 2
 ftl_low_format_cur_blk:
 	.space	2
 	.section	.bss.ftl_power_lost_flag,"aw",%nobits
-	.set	.LANCHOR198,. + 0
+	.set	.LANCHOR195,. + 0
 	.type	ftl_power_lost_flag, %object
 	.size	ftl_power_lost_flag, 1
 ftl_power_lost_flag:
@@ -30232,7 +30777,7 @@ ftl_sblk_lpa_tbl:
 	.space	4
 	.section	.bss.ftl_sblk_update_list,"aw",%nobits
 	.align	1
-	.set	.LANCHOR74,. + 0
+	.set	.LANCHOR73,. + 0
 	.type	ftl_sblk_update_list, %object
 	.size	ftl_sblk_update_list, 16
 ftl_sblk_update_list:
@@ -30246,34 +30791,34 @@ ftl_sblk_update_list_offset:
 	.space	2
 	.section	.bss.ftl_sblk_vpn,"aw",%nobits
 	.align	2
-	.set	.LANCHOR9,. + 0
+	.set	.LANCHOR11,. + 0
 	.type	ftl_sblk_vpn, %object
 	.size	ftl_sblk_vpn, 4
 ftl_sblk_vpn:
 	.space	4
 	.section	.bss.ftl_sblk_vpn_update_id,"aw",%nobits
 	.align	1
-	.set	.LANCHOR73,. + 0
+	.set	.LANCHOR72,. + 0
 	.type	ftl_sblk_vpn_update_id, %object
 	.size	ftl_sblk_vpn_update_id, 2
 ftl_sblk_vpn_update_id:
 	.space	2
 	.section	.bss.ftl_sys_info_first_write,"aw",%nobits
-	.set	.LANCHOR197,. + 0
+	.set	.LANCHOR194,. + 0
 	.type	ftl_sys_info_first_write, %object
 	.size	ftl_sys_info_first_write, 1
 ftl_sys_info_first_write:
 	.space	1
 	.section	.bss.ftl_tmp_buffer,"aw",%nobits
 	.align	2
-	.set	.LANCHOR190,. + 0
+	.set	.LANCHOR187,. + 0
 	.type	ftl_tmp_buffer, %object
 	.size	ftl_tmp_buffer, 4
 ftl_tmp_buffer:
 	.space	4
 	.section	.bss.ftl_tmp_spare,"aw",%nobits
 	.align	6
-	.set	.LANCHOR191,. + 0
+	.set	.LANCHOR188,. + 0
 	.type	ftl_tmp_spare, %object
 	.size	ftl_tmp_spare, 256
 ftl_tmp_spare:
@@ -30294,33 +30839,33 @@ g_block_align_addr:
 	.space	2
 	.section	.bss.g_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR56,. + 0
+	.set	.LANCHOR55,. + 0
 	.type	g_buf, %object
 	.size	g_buf, 1536
 g_buf:
 	.space	1536
 	.section	.bss.g_die_addr,"aw",%nobits
 	.align	2
-	.set	.LANCHOR148,. + 0
+	.set	.LANCHOR145,. + 0
 	.type	g_die_addr, %object
 	.size	g_die_addr, 32
 g_die_addr:
 	.space	32
 	.section	.bss.g_die_cs_idx,"aw",%nobits
 	.align	2
-	.set	.LANCHOR30,. + 0
+	.set	.LANCHOR29,. + 0
 	.type	g_die_cs_idx, %object
 	.size	g_die_cs_idx, 8
 g_die_cs_idx:
 	.space	8
 	.section	.bss.g_flash_3d_mlc_flag,"aw",%nobits
-	.set	.LANCHOR81,. + 0
+	.set	.LANCHOR80,. + 0
 	.type	g_flash_3d_mlc_flag, %object
 	.size	g_flash_3d_mlc_flag, 1
 g_flash_3d_mlc_flag:
 	.space	1
 	.section	.bss.g_flash_3d_tlc_flag,"aw",%nobits
-	.set	.LANCHOR84,. + 0
+	.set	.LANCHOR83,. + 0
 	.type	g_flash_3d_tlc_flag, %object
 	.size	g_flash_3d_tlc_flag, 1
 g_flash_3d_tlc_flag:
@@ -30333,13 +30878,13 @@ g_flash_3d_tlc_flag:
 g_flash_blk_info:
 	.space	4
 	.section	.bss.g_flash_cur_mode,"aw",%nobits
-	.set	.LANCHOR34,. + 0
+	.set	.LANCHOR33,. + 0
 	.type	g_flash_cur_mode, %object
 	.size	g_flash_cur_mode, 4
 g_flash_cur_mode:
 	.space	4
 	.section	.bss.g_flash_interface_mode,"aw",%nobits
-	.set	.LANCHOR49,. + 0
+	.set	.LANCHOR48,. + 0
 	.type	g_flash_interface_mode, %object
 	.size	g_flash_interface_mode, 1
 g_flash_interface_mode:
@@ -30357,26 +30902,26 @@ g_flash_micron_3d_tlc_b05a:
 g_flash_micron_3d_tlc_b16a:
 	.space	1
 	.section	.bss.g_flash_micron_3d_tlc_flag,"aw",%nobits
-	.set	.LANCHOR36,. + 0
+	.set	.LANCHOR35,. + 0
 	.type	g_flash_micron_3d_tlc_flag, %object
 	.size	g_flash_micron_3d_tlc_flag, 1
 g_flash_micron_3d_tlc_flag:
 	.space	1
 	.section	.bss.g_flash_multi_page_prog_en,"aw",%nobits
-	.set	.LANCHOR45,. + 0
+	.set	.LANCHOR44,. + 0
 	.type	g_flash_multi_page_prog_en, %object
 	.size	g_flash_multi_page_prog_en, 1
 g_flash_multi_page_prog_en:
 	.space	1
 	.section	.bss.g_flash_multi_page_read_en,"aw",%nobits
-	.set	.LANCHOR186,. + 0
+	.set	.LANCHOR183,. + 0
 	.type	g_flash_multi_page_read_en, %object
 	.size	g_flash_multi_page_read_en, 1
 g_flash_multi_page_read_en:
 	.space	1
 	.section	.bss.g_flash_page_buffer,"aw",%nobits
 	.align	2
-	.set	.LANCHOR176,. + 0
+	.set	.LANCHOR173,. + 0
 	.type	g_flash_page_buffer, %object
 	.size	g_flash_page_buffer, 4
 g_flash_page_buffer:
@@ -30388,7 +30933,7 @@ g_flash_page_buffer:
 g_flash_reversd_blks:
 	.space	1
 	.section	.bss.g_flash_six_addr,"aw",%nobits
-	.set	.LANCHOR31,. + 0
+	.set	.LANCHOR30,. + 0
 	.type	g_flash_six_addr, %object
 	.size	g_flash_six_addr, 1
 g_flash_six_addr:
@@ -30401,7 +30946,7 @@ g_flash_slc_mode:
 	.space	1
 	.section	.bss.g_flash_spare_buffer,"aw",%nobits
 	.align	2
-	.set	.LANCHOR175,. + 0
+	.set	.LANCHOR172,. + 0
 	.type	g_flash_spare_buffer, %object
 	.size	g_flash_spare_buffer, 4
 g_flash_spare_buffer:
@@ -30415,52 +30960,52 @@ g_flash_sys_spare_buffer:
 	.space	4
 	.section	.bss.g_flash_tmp_page_buffer,"aw",%nobits
 	.align	2
-	.set	.LANCHOR166,. + 0
+	.set	.LANCHOR163,. + 0
 	.type	g_flash_tmp_page_buffer, %object
 	.size	g_flash_tmp_page_buffer, 4
 g_flash_tmp_page_buffer:
 	.space	4
 	.section	.bss.g_flash_tmp_spare_buffer,"aw",%nobits
 	.align	2
-	.set	.LANCHOR168,. + 0
+	.set	.LANCHOR165,. + 0
 	.type	g_flash_tmp_spare_buffer, %object
 	.size	g_flash_tmp_spare_buffer, 4
 g_flash_tmp_spare_buffer:
 	.space	4
 	.section	.bss.g_flash_toggle_mode_en,"aw",%nobits
-	.set	.LANCHOR21,. + 0
+	.set	.LANCHOR26,. + 0
 	.type	g_flash_toggle_mode_en, %object
 	.size	g_flash_toggle_mode_en, 1
 g_flash_toggle_mode_en:
 	.space	1
 	.section	.bss.g_flash_ymtc_3d_tlc_flag,"aw",%nobits
-	.set	.LANCHOR37,. + 0
+	.set	.LANCHOR36,. + 0
 	.type	g_flash_ymtc_3d_tlc_flag, %object
 	.size	g_flash_ymtc_3d_tlc_flag, 1
 g_flash_ymtc_3d_tlc_flag:
 	.space	1
 	.section	.bss.g_ftl_info_blk,"aw",%nobits
 	.align	6
-	.set	.LANCHOR194,. + 0
+	.set	.LANCHOR191,. + 0
 	.type	g_ftl_info_blk, %object
 	.size	g_ftl_info_blk, 4
 g_ftl_info_blk:
 	.space	4
 	.section	.bss.g_gc_info,"aw",%nobits
 	.align	2
-	.set	.LANCHOR71,. + 0
+	.set	.LANCHOR70,. + 0
 	.type	g_gc_info, %object
-	.size	g_gc_info, 2132
+	.size	g_gc_info, 2204
 g_gc_info:
-	.space	2132
+	.space	2204
 	.section	.bss.g_idb_ecc_bits,"aw",%nobits
-	.set	.LANCHOR17,. + 0
+	.set	.LANCHOR22,. + 0
 	.type	g_idb_ecc_bits, %object
 	.size	g_idb_ecc_bits, 1
 g_idb_ecc_bits:
 	.space	1
 	.section	.bss.g_idb_slc_mode_enable,"aw",%nobits
-	.set	.LANCHOR19,. + 0
+	.set	.LANCHOR24,. + 0
 	.type	g_idb_slc_mode_enable, %object
 	.size	g_idb_slc_mode_enable, 1
 g_idb_slc_mode_enable:
@@ -30473,63 +31018,63 @@ g_idb_slc_mode_enable:
 g_lsb_page_tbl:
 	.space	1024
 	.section	.bss.g_maxRegNum,"aw",%nobits
-	.set	.LANCHOR26,. + 0
+	.set	.LANCHOR18,. + 0
 	.type	g_maxRegNum, %object
 	.size	g_maxRegNum, 1
 g_maxRegNum:
 	.space	1
 	.section	.bss.g_maxRetryCount,"aw",%nobits
-	.set	.LANCHOR169,. + 0
+	.set	.LANCHOR166,. + 0
 	.type	g_maxRetryCount, %object
 	.size	g_maxRetryCount, 1
 g_maxRetryCount:
 	.space	1
 	.section	.bss.g_msb_page_tbl,"aw",%nobits
 	.align	2
-	.set	.LANCHOR145,. + 0
+	.set	.LANCHOR142,. + 0
 	.type	g_msb_page_tbl, %object
 	.size	g_msb_page_tbl, 2048
 g_msb_page_tbl:
 	.space	2048
 	.section	.bss.g_nand_max_die,"aw",%nobits
-	.set	.LANCHOR18,. + 0
+	.set	.LANCHOR23,. + 0
 	.type	g_nand_max_die, %object
 	.size	g_nand_max_die, 1
 g_nand_max_die:
 	.space	1
 	.section	.bss.g_nand_opt_para,"aw",%nobits
-	.set	.LANCHOR20,. + 0
+	.set	.LANCHOR25,. + 0
 	.type	g_nand_opt_para, %object
 	.size	g_nand_opt_para, 32
 g_nand_opt_para:
 	.space	32
 	.section	.bss.g_nandc_ecc_bits,"aw",%nobits
-	.set	.LANCHOR50,. + 0
+	.set	.LANCHOR49,. + 0
 	.type	g_nandc_ecc_bits, %object
 	.size	g_nandc_ecc_bits, 1
 g_nandc_ecc_bits:
 	.space	1
 	.section	.bss.g_nandc_tran_timeout,"aw",%nobits
-	.set	.LANCHOR167,. + 0
+	.set	.LANCHOR164,. + 0
 	.type	g_nandc_tran_timeout, %object
 	.size	g_nandc_tran_timeout, 1
 g_nandc_tran_timeout:
 	.space	1
 	.section	.bss.g_nandc_v6_master_info,"aw",%nobits
 	.align	2
-	.set	.LANCHOR53,. + 0
+	.set	.LANCHOR52,. + 0
 	.type	g_nandc_v6_master_info, %object
 	.size	g_nandc_v6_master_info, 28
 g_nandc_v6_master_info:
 	.space	28
 	.section	.bss.g_nandc_ver,"aw",%nobits
-	.set	.LANCHOR28,. + 0
+	.set	.LANCHOR27,. + 0
 	.type	g_nandc_ver, %object
 	.size	g_nandc_ver, 1
 g_nandc_ver:
 	.space	1
 	.section	.bss.g_one_pass_program,"aw",%nobits
-	.set	.LANCHOR82,. + 0
+	.set	.LANCHOR81,. + 0
 	.type	g_one_pass_program, %object
 	.size	g_one_pass_program, 1
 g_one_pass_program:
@@ -30542,7 +31087,7 @@ g_one_pass_program:
 g_pm_spare:
 	.space	4
 	.section	.bss.g_retryMode,"aw",%nobits
-	.set	.LANCHOR23,. + 0
+	.set	.LANCHOR15,. + 0
 	.type	g_retryMode, %object
 	.size	g_retryMode, 1
 g_retryMode:
@@ -30560,103 +31105,103 @@ g_slc_mode_enable:
 	.space	1
 	.section	.bss.g_slc_page_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR147,. + 0
+	.set	.LANCHOR144,. + 0
 	.type	g_slc_page_num, %object
 	.size	g_slc_page_num, 2
 g_slc_page_num:
 	.space	2
 	.section	.bss.g_totle_phy_block,"aw",%nobits
 	.align	1
-	.set	.LANCHOR149,. + 0
+	.set	.LANCHOR146,. + 0
 	.type	g_totle_phy_block, %object
 	.size	g_totle_phy_block, 2
 g_totle_phy_block:
 	.space	2
 	.section	.bss.gc_des_ppa_tbl,"aw",%nobits
 	.align	2
-	.set	.LANCHOR164,. + 0
+	.set	.LANCHOR161,. + 0
 	.type	gc_des_ppa_tbl, %object
 	.size	gc_des_ppa_tbl, 4
 gc_des_ppa_tbl:
 	.space	4
 	.section	.bss.gc_free_slc_sblk_th,"aw",%nobits
 	.align	1
-	.set	.LANCHOR87,. + 0
+	.set	.LANCHOR86,. + 0
 	.type	gc_free_slc_sblk_th, %object
 	.size	gc_free_slc_sblk_th, 2
 gc_free_slc_sblk_th:
 	.space	2
 	.section	.bss.gc_lpa_tbl,"aw",%nobits
 	.align	2
-	.set	.LANCHOR162,. + 0
+	.set	.LANCHOR159,. + 0
 	.type	gc_lpa_tbl, %object
 	.size	gc_lpa_tbl, 4
 gc_lpa_tbl:
 	.space	4
 	.section	.bss.gc_mode,"aw",%nobits
-	.set	.LANCHOR85,. + 0
+	.set	.LANCHOR84,. + 0
 	.type	gc_mode, %object
 	.size	gc_mode, 1
 gc_mode:
 	.space	1
 	.section	.bss.gc_page_buf_id,"aw",%nobits
 	.align	2
-	.set	.LANCHOR83,. + 0
+	.set	.LANCHOR82,. + 0
 	.type	gc_page_buf_id, %object
 	.size	gc_page_buf_id, 4
 gc_page_buf_id:
 	.space	4
 	.section	.bss.gc_pre_ppa_tbl,"aw",%nobits
 	.align	2
-	.set	.LANCHOR163,. + 0
+	.set	.LANCHOR160,. + 0
 	.type	gc_pre_ppa_tbl, %object
 	.size	gc_pre_ppa_tbl, 4
 gc_pre_ppa_tbl:
 	.space	4
 	.section	.bss.gc_search_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR160,. + 0
+	.set	.LANCHOR157,. + 0
 	.type	gc_search_count, %object
 	.size	gc_search_count, 4
 gc_search_count:
 	.space	4
 	.section	.bss.gc_slc_cache_index,"aw",%nobits
 	.align	1
-	.set	.LANCHOR91,. + 0
+	.set	.LANCHOR88,. + 0
 	.type	gc_slc_cache_index, %object
 	.size	gc_slc_cache_index, 2
 gc_slc_cache_index:
 	.space	2
 	.section	.bss.gc_slc_data_index,"aw",%nobits
 	.align	1
-	.set	.LANCHOR90,. + 0
+	.set	.LANCHOR87,. + 0
 	.type	gc_slc_data_index, %object
 	.size	gc_slc_data_index, 2
 gc_slc_data_index:
 	.space	2
 	.section	.bss.gc_slc_mode_slc_vpn_th,"aw",%nobits
 	.align	1
-	.set	.LANCHOR161,. + 0
+	.set	.LANCHOR158,. + 0
 	.type	gc_slc_mode_slc_vpn_th, %object
 	.size	gc_slc_mode_slc_vpn_th, 2
 gc_slc_mode_slc_vpn_th:
 	.space	2
 	.section	.bss.gc_slc_mode_tlc_vpn_th,"aw",%nobits
 	.align	1
-	.set	.LANCHOR94,. + 0
+	.set	.LANCHOR93,. + 0
 	.type	gc_slc_mode_tlc_vpn_th, %object
 	.size	gc_slc_mode_tlc_vpn_th, 2
 gc_slc_mode_tlc_vpn_th:
 	.space	2
 	.section	.bss.gc_slc_mode_vpn_th,"aw",%nobits
 	.align	1
-	.set	.LANCHOR70,. + 0
+	.set	.LANCHOR69,. + 0
 	.type	gc_slc_mode_vpn_th, %object
 	.size	gc_slc_mode_vpn_th, 2
 gc_slc_mode_vpn_th:
 	.space	2
 	.section	.bss.gc_state,"aw",%nobits
-	.set	.LANCHOR159,. + 0
+	.set	.LANCHOR156,. + 0
 	.type	gc_state, %object
 	.size	gc_state, 1
 gc_state:
@@ -30677,14 +31222,14 @@ gc_tlc_mode_tlc_vpn_th:
 	.space	2
 	.section	.bss.gc_valid_page_ppa,"aw",%nobits
 	.align	2
-	.set	.LANCHOR77,. + 0
+	.set	.LANCHOR76,. + 0
 	.type	gc_valid_page_ppa, %object
 	.size	gc_valid_page_ppa, 4
 gc_valid_page_ppa:
 	.space	4
 	.section	.bss.gc_xlc_data_index,"aw",%nobits
 	.align	1
-	.set	.LANCHOR92,. + 0
+	.set	.LANCHOR89,. + 0
 	.type	gc_xlc_data_index, %object
 	.size	gc_xlc_data_index, 2
 gc_xlc_data_index:
@@ -30698,42 +31243,42 @@ gc_xlc_search_index:
 	.space	2
 	.section	.bss.gp_blk_info,"aw",%nobits
 	.align	2
-	.set	.LANCHOR7,. + 0
+	.set	.LANCHOR9,. + 0
 	.type	gp_blk_info, %object
 	.size	gp_blk_info, 4
 gp_blk_info:
 	.space	4
 	.section	.bss.gp_data_slc_cache_head,"aw",%nobits
 	.align	2
-	.set	.LANCHOR89,. + 0
+	.set	.LANCHOR90,. + 0
 	.type	gp_data_slc_cache_head, %object
 	.size	gp_data_slc_cache_head, 4
 gp_data_slc_cache_head:
 	.space	4
 	.section	.bss.gp_data_slc_data_head,"aw",%nobits
 	.align	2
-	.set	.LANCHOR12,. + 0
+	.set	.LANCHOR95,. + 0
 	.type	gp_data_slc_data_head, %object
 	.size	gp_data_slc_data_head, 4
 gp_data_slc_data_head:
 	.space	4
 	.section	.bss.gp_data_xlc_data_head,"aw",%nobits
 	.align	2
-	.set	.LANCHOR88,. + 0
+	.set	.LANCHOR92,. + 0
 	.type	gp_data_xlc_data_head, %object
 	.size	gp_data_xlc_data_head, 4
 gp_data_xlc_data_head:
 	.space	4
 	.section	.bss.gp_flash_check_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR144,. + 0
+	.set	.LANCHOR141,. + 0
 	.type	gp_flash_check_buf, %object
 	.size	gp_flash_check_buf, 4
 gp_flash_check_buf:
 	.space	4
 	.section	.bss.gp_flash_info,"aw",%nobits
 	.align	2
-	.set	.LANCHOR27,. + 0
+	.set	.LANCHOR6,. + 0
 	.type	gp_flash_info, %object
 	.size	gp_flash_info, 4
 gp_flash_info:
@@ -30761,7 +31306,7 @@ gp_free_xlc_head:
 	.space	4
 	.section	.bss.gp_ftl_ext_info,"aw",%nobits
 	.align	2
-	.set	.LANCHOR10,. + 0
+	.set	.LANCHOR12,. + 0
 	.type	gp_ftl_ext_info, %object
 	.size	gp_ftl_ext_info, 4
 gp_ftl_ext_info:
@@ -30775,14 +31320,14 @@ gp_ftl_info:
 	.space	4
 	.section	.bss.gp_nand_para_info,"aw",%nobits
 	.align	2
-	.set	.LANCHOR16,. + 0
+	.set	.LANCHOR21,. + 0
 	.type	gp_nand_para_info, %object
 	.size	gp_nand_para_info, 4
 gp_nand_para_info:
 	.space	4
 	.section	.bss.gp_nandc,"aw",%nobits
 	.align	2
-	.set	.LANCHOR13,. + 0
+	.set	.LANCHOR7,. + 0
 	.type	gp_nandc, %object
 	.size	gp_nandc, 4
 gp_nandc:
@@ -30796,27 +31341,27 @@ gp_sblk_list_tbl:
 	.space	4
 	.section	.bss.idb_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR141,. + 0
+	.set	.LANCHOR138,. + 0
 	.type	idb_buf, %object
 	.size	idb_buf, 4
 idb_buf:
 	.space	4
 	.section	.bss.idb_last_lba,"aw",%nobits
 	.align	2
-	.set	.LANCHOR177,. + 0
+	.set	.LANCHOR174,. + 0
 	.type	idb_last_lba, %object
 	.size	idb_last_lba, 4
 idb_last_lba:
 	.space	4
 	.section	.bss.idb_need_write_back,"aw",%nobits
 	.align	2
-	.set	.LANCHOR142,. + 0
+	.set	.LANCHOR139,. + 0
 	.type	idb_need_write_back, %object
 	.size	idb_need_write_back, 4
 idb_need_write_back:
 	.space	4
 	.section	.bss.idb_write_enable,"aw",%nobits
-	.set	.LANCHOR143,. + 0
+	.set	.LANCHOR140,. + 0
 	.type	idb_write_enable, %object
 	.size	idb_write_enable, 1
 idb_write_enable:
@@ -30841,19 +31386,19 @@ lpa_hash_index:
 nandc_ecc_sts:
 	.space	16
 	.section	.bss.nandc_hw_seed,"aw",%nobits
-	.set	.LANCHOR51,. + 0
+	.set	.LANCHOR50,. + 0
 	.type	nandc_hw_seed, %object
 	.size	nandc_hw_seed, 1
 nandc_hw_seed:
 	.space	1
 	.section	.bss.nandc_randomizer_en,"aw",%nobits
-	.set	.LANCHOR52,. + 0
+	.set	.LANCHOR51,. + 0
 	.type	nandc_randomizer_en, %object
 	.size	nandc_randomizer_en, 1
 nandc_randomizer_en:
 	.space	1
 	.section	.bss.p_free_buf_head,"aw",%nobits
-	.set	.LANCHOR57,. + 0
+	.set	.LANCHOR56,. + 0
 	.type	p_free_buf_head, %object
 	.size	p_free_buf_head, 1
 p_free_buf_head:
@@ -30872,14 +31417,14 @@ pm_first_write:
 	.space	1
 	.section	.bss.pm_force_gc,"aw",%nobits
 	.align	2
-	.set	.LANCHOR151,. + 0
+	.set	.LANCHOR148,. + 0
 	.type	pm_force_gc, %object
 	.size	pm_force_gc, 4
 pm_force_gc:
 	.space	4
 	.section	.bss.pm_gc_enable,"aw",%nobits
 	.align	2
-	.set	.LANCHOR136,. + 0
+	.set	.LANCHOR204,. + 0
 	.type	pm_gc_enable, %object
 	.size	pm_gc_enable, 4
 pm_gc_enable:
@@ -30891,14 +31436,14 @@ pm_gc_enable:
 pm_last_load_ram_id:
 	.space	1
 	.section	.bss.pm_last_update_ram_id,"aw",%nobits
-	.set	.LANCHOR139,. + 0
+	.set	.LANCHOR136,. + 0
 	.type	pm_last_update_ram_id, %object
 	.size	pm_last_update_ram_id, 1
 pm_last_update_ram_id:
 	.space	1
 	.section	.bss.pm_ram_info,"aw",%nobits
 	.align	2
-	.set	.LANCHOR138,. + 0
+	.set	.LANCHOR135,. + 0
 	.type	pm_ram_info, %object
 	.size	pm_ram_info, 256
 pm_ram_info:
@@ -30923,25 +31468,25 @@ read_buf_count:
 read_buf_head:
 	.space	1
 	.section	.bss.sblk_gc_write_completed_queue_head,"aw",%nobits
-	.set	.LANCHOR64,. + 0
+	.set	.LANCHOR63,. + 0
 	.type	sblk_gc_write_completed_queue_head, %object
 	.size	sblk_gc_write_completed_queue_head, 1
 sblk_gc_write_completed_queue_head:
 	.space	1
 	.section	.bss.sblk_queue_head,"aw",%nobits
-	.set	.LANCHOR60,. + 0
+	.set	.LANCHOR59,. + 0
 	.type	sblk_queue_head, %object
 	.size	sblk_queue_head, 1
 sblk_queue_head:
 	.space	1
 	.section	.bss.sblk_read_completed_queue_head,"aw",%nobits
-	.set	.LANCHOR63,. + 0
+	.set	.LANCHOR62,. + 0
 	.type	sblk_read_completed_queue_head, %object
 	.size	sblk_read_completed_queue_head, 1
 sblk_read_completed_queue_head:
 	.space	1
 	.section	.bss.sblk_write_completed_queue_head,"aw",%nobits
-	.set	.LANCHOR65,. + 0
+	.set	.LANCHOR64,. + 0
 	.type	sblk_write_completed_queue_head, %object
 	.size	sblk_write_completed_queue_head, 1
 sblk_write_completed_queue_head:
@@ -30961,13 +31506,13 @@ slc_cache_sblk:
 slc_data_sblk:
 	.space	2
 	.section	.bss.write_buf_count,"aw",%nobits
-	.set	.LANCHOR67,. + 0
+	.set	.LANCHOR66,. + 0
 	.type	write_buf_count, %object
 	.size	write_buf_count, 1
 write_buf_count:
 	.space	1
 	.section	.bss.write_buf_head,"aw",%nobits
-	.set	.LANCHOR66,. + 0
+	.set	.LANCHOR65,. + 0
 	.type	write_buf_head, %object
 	.size	write_buf_head, 1
 write_buf_head:
@@ -30979,14 +31524,14 @@ write_buf_head:
 write_commit_count:
 	.space	1
 	.section	.bss.write_commit_head,"aw",%nobits
-	.set	.LANCHOR185,. + 0
+	.set	.LANCHOR182,. + 0
 	.type	write_commit_head, %object
 	.size	write_commit_head, 1
 write_commit_head:
 	.space	1
 	.section	.bss.xlc_data_sblk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR93,. + 0
+	.set	.LANCHOR91,. + 0
 	.type	xlc_data_sblk, %object
 	.size	xlc_data_sblk, 2
 xlc_data_sblk:
@@ -31000,7 +31545,7 @@ zftl_print_list_count:
 	.space	2
 	.section	.data.g_nand_para_info,"aw",%progbits
 	.align	1
-	.set	.LANCHOR33,. + 0
+	.set	.LANCHOR32,. + 0
 	.type	g_nand_para_info, %object
 	.size	g_nand_para_info, 32
 g_nand_para_info:
@@ -31033,7 +31578,7 @@ g_nand_para_info:
 	.byte	0
 	.byte	0
 	.section	.data.hy_f26_ref_value,"aw",%progbits
-	.set	.LANCHOR165,. + 0
+	.set	.LANCHOR162,. + 0
 	.type	hy_f26_ref_value, %object
 	.size	hy_f26_ref_value, 28
 hy_f26_ref_value:
@@ -31147,7 +31692,7 @@ nand_opt_para:
 	.byte	0
 	.space	14
 	.section	.data.sd15_slc_rr,"aw",%progbits
-	.set	.LANCHOR41,. + 0
+	.set	.LANCHOR40,. + 0
 	.type	sd15_slc_rr, %object
 	.size	sd15_slc_rr, 25
 sd15_slc_rr:
@@ -31177,7 +31722,7 @@ sd15_slc_rr:
 	.byte	104
 	.byte	112
 	.section	.data.sd15_tlc_rr,"aw",%progbits
-	.set	.LANCHOR40,. + 0
+	.set	.LANCHOR39,. + 0
 	.type	sd15_tlc_rr, %object
 	.size	sd15_tlc_rr, 329
 sd15_tlc_rr:
@@ -32676,7 +33221,7 @@ tlc_prog_order:
 	.short	1019
 	.section	.data.zftl_debug,"aw",%progbits
 	.align	2
-	.set	.LANCHOR14,. + 0
+	.set	.LANCHOR19,. + 0
 	.type	zftl_debug, %object
 	.size	zftl_debug, 4
 zftl_debug:
@@ -34059,402 +34604,402 @@ zftl_nand_flash_para_tbl:
 	.byte	-38
 	.byte	-33
 	.byte	0
-	.section	.rodata.__func__.10010,"a",%progbits
-	.set	.LANCHOR47,. + 0
-	.type	__func__.10010, %object
-	.size	__func__.10010, 23
-__func__.10010:
+	.section	.rodata.__func__.10003,"a",%progbits
+	.set	.LANCHOR34,. + 0
+	.type	__func__.10003, %object
+	.size	__func__.10003, 22
+__func__.10003:
+	.ascii	"flash_start_page_read\000"
+	.section	.rodata.__func__.10016,"a",%progbits
+	.set	.LANCHOR178,. + 0
+	.type	__func__.10016, %object
+	.size	__func__.10016, 31
+__func__.10016:
+	.ascii	"flash_complete_plane_page_read\000"
+	.section	.rodata.__func__.10028,"a",%progbits
+	.set	.LANCHOR46,. + 0
+	.type	__func__.10028, %object
+	.size	__func__.10028, 23
+__func__.10028:
 	.ascii	"flash_start_plane_read\000"
-	.section	.rodata.__func__.10023,"a",%progbits
-	.set	.LANCHOR182,. + 0
-	.type	__func__.10023, %object
-	.size	__func__.10023, 25
-__func__.10023:
+	.section	.rodata.__func__.10041,"a",%progbits
+	.set	.LANCHOR179,. + 0
+	.type	__func__.10041, %object
+	.size	__func__.10041, 25
+__func__.10041:
 	.ascii	"flash_complete_page_read\000"
-	.section	.rodata.__func__.10438,"a",%progbits
-	.set	.LANCHOR146,. + 0
-	.type	__func__.10438, %object
-	.size	__func__.10438, 20
-__func__.10438:
+	.section	.rodata.__func__.10456,"a",%progbits
+	.set	.LANCHOR143,. + 0
+	.type	__func__.10456, %object
+	.size	__func__.10456, 20
+__func__.10456:
 	.ascii	"flash_die_info_init\000"
-	.section	.rodata.__func__.10448,"a",%progbits
-	.set	.LANCHOR15,. + 0
-	.type	__func__.10448, %object
-	.size	__func__.10448, 22
-__func__.10448:
+	.section	.rodata.__func__.10466,"a",%progbits
+	.set	.LANCHOR20,. + 0
+	.type	__func__.10466, %object
+	.size	__func__.10466, 22
+__func__.10466:
 	.ascii	"nand_flash_print_info\000"
-	.section	.rodata.__func__.10493,"a",%progbits
+	.section	.rodata.__func__.10511,"a",%progbits
 	.set	.LANCHOR213,. + 0
-	.type	__func__.10493, %object
-	.size	__func__.10493, 16
-__func__.10493:
+	.type	__func__.10511, %object
+	.size	__func__.10511, 16
+__func__.10511:
 	.ascii	"nand_flash_init\000"
-	.section	.rodata.__func__.10516,"a",%progbits
-	.set	.LANCHOR158,. + 0
-	.type	__func__.10516, %object
-	.size	__func__.10516, 11
-__func__.10516:
+	.section	.rodata.__func__.10534,"a",%progbits
+	.set	.LANCHOR155,. + 0
+	.type	__func__.10534, %object
+	.size	__func__.10534, 11
+__func__.10534:
 	.ascii	"nandc_init\000"
-	.section	.rodata.__func__.10685,"a",%progbits
-	.set	.LANCHOR59,. + 0
-	.type	__func__.10685, %object
-	.size	__func__.10685, 13
-__func__.10685:
+	.section	.rodata.__func__.10699,"a",%progbits
+	.set	.LANCHOR58,. + 0
+	.type	__func__.10699, %object
+	.size	__func__.10699, 13
+__func__.10699:
 	.ascii	"buf_add_tail\000"
-	.section	.rodata.__func__.10698,"a",%progbits
-	.set	.LANCHOR61,. + 0
-	.type	__func__.10698, %object
-	.size	__func__.10698, 10
-__func__.10698:
-	.ascii	"buf_alloc\000"
 	.section	.rodata.__func__.10712,"a",%progbits
-	.set	.LANCHOR62,. + 0
+	.set	.LANCHOR60,. + 0
 	.type	__func__.10712, %object
-	.size	__func__.10712, 16
+	.size	__func__.10712, 10
 __func__.10712:
+	.ascii	"buf_alloc\000"
+	.section	.rodata.__func__.10726,"a",%progbits
+	.set	.LANCHOR61,. + 0
+	.type	__func__.10726, %object
+	.size	__func__.10726, 16
+__func__.10726:
 	.ascii	"buf_remove_free\000"
-	.section	.rodata.__func__.10733,"a",%progbits
+	.section	.rodata.__func__.10747,"a",%progbits
 	.set	.LANCHOR212,. + 0
-	.type	__func__.10733, %object
-	.size	__func__.10733, 20
-__func__.10733:
+	.type	__func__.10747, %object
+	.size	__func__.10747, 20
+__func__.10747:
 	.ascii	"flash_info_blk_init\000"
-	.section	.rodata.__func__.10748,"a",%progbits
-	.set	.LANCHOR157,. + 0
-	.type	__func__.10748, %object
-	.size	__func__.10748, 21
-__func__.10748:
+	.section	.rodata.__func__.10762,"a",%progbits
+	.set	.LANCHOR154,. + 0
+	.type	__func__.10762, %object
+	.size	__func__.10762, 21
+__func__.10762:
 	.ascii	"flash_info_data_init\000"
-	.section	.rodata.__func__.10770,"a",%progbits
+	.section	.rodata.__func__.10784,"a",%progbits
 	.set	.LANCHOR209,. + 0
-	.type	__func__.10770, %object
-	.size	__func__.10770, 17
-__func__.10770:
+	.type	__func__.10784, %object
+	.size	__func__.10784, 17
+__func__.10784:
 	.ascii	"flash_info_flush\000"
-	.section	.rodata.__func__.10846,"a",%progbits
-	.set	.LANCHOR150,. + 0
-	.type	__func__.10846, %object
-	.size	__func__.10846, 17
-__func__.10846:
+	.section	.rodata.__func__.10860,"a",%progbits
+	.set	.LANCHOR147,. + 0
+	.type	__func__.10860, %object
+	.size	__func__.10860, 17
+__func__.10860:
 	.ascii	"lpa_rebuild_hash\000"
-	.section	.rodata.__func__.10896,"a",%progbits
+	.section	.rodata.__func__.10910,"a",%progbits
 	.set	.LANCHOR232,. + 0
-	.type	__func__.10896, %object
-	.size	__func__.10896, 17
-__func__.10896:
+	.type	__func__.10910, %object
+	.size	__func__.10910, 17
+__func__.10910:
 	.ascii	"ftl_write_commit\000"
-	.section	.rodata.__func__.10914,"a",%progbits
+	.section	.rodata.__func__.10928,"a",%progbits
 	.set	.LANCHOR130,. + 0
-	.type	__func__.10914, %object
-	.size	__func__.10914, 14
-__func__.10914:
+	.type	__func__.10928, %object
+	.size	__func__.10928, 14
+__func__.10928:
 	.ascii	"ftl_write_buf\000"
-	.section	.rodata.__func__.10959,"a",%progbits
+	.section	.rodata.__func__.10973,"a",%progbits
 	.set	.LANCHOR132,. + 0
-	.type	__func__.10959, %object
-	.size	__func__.10959, 18
-__func__.10959:
+	.type	__func__.10973, %object
+	.size	__func__.10973, 18
+__func__.10973:
 	.ascii	"zftl_add_read_buf\000"
-	.section	.rodata.__func__.10992,"a",%progbits
+	.section	.rodata.__func__.11006,"a",%progbits
 	.set	.LANCHOR230,. + 0
-	.type	__func__.10992, %object
-	.size	__func__.10992, 10
-__func__.10992:
+	.type	__func__.11006, %object
+	.size	__func__.11006, 10
+__func__.11006:
 	.ascii	"zftl_read\000"
-	.section	.rodata.__func__.11023,"a",%progbits
+	.section	.rodata.__func__.11038,"a",%progbits
 	.set	.LANCHOR242,. + 0
-	.type	__func__.11023, %object
-	.size	__func__.11023, 13
-__func__.11023:
+	.type	__func__.11038, %object
+	.size	__func__.11038, 13
+__func__.11038:
 	.ascii	"_ftl_discard\000"
-	.section	.rodata.__func__.11169,"a",%progbits
+	.section	.rodata.__func__.11184,"a",%progbits
 	.set	.LANCHOR225,. + 0
-	.type	__func__.11169, %object
-	.size	__func__.11169, 12
-__func__.11169:
+	.type	__func__.11184, %object
+	.size	__func__.11184, 12
+__func__.11184:
 	.ascii	"gc_recovery\000"
-	.section	.rodata.__func__.11179,"a",%progbits
-	.set	.LANCHOR72,. + 0
-	.type	__func__.11179, %object
-	.size	__func__.11179, 12
-__func__.11179:
+	.section	.rodata.__func__.11194,"a",%progbits
+	.set	.LANCHOR71,. + 0
+	.type	__func__.11194, %object
+	.size	__func__.11194, 12
+__func__.11194:
 	.ascii	"gc_add_sblk\000"
-	.section	.rodata.__func__.11226,"a",%progbits
-	.set	.LANCHOR188,. + 0
-	.type	__func__.11226, %object
-	.size	__func__.11226, 21
-__func__.11226:
+	.section	.rodata.__func__.11241,"a",%progbits
+	.set	.LANCHOR185,. + 0
+	.type	__func__.11241, %object
+	.size	__func__.11241, 21
+__func__.11241:
 	.ascii	"gc_check_data_one_wl\000"
-	.section	.rodata.__func__.11258,"a",%progbits
+	.section	.rodata.__func__.11273,"a",%progbits
 	.set	.LANCHOR226,. + 0
-	.type	__func__.11258, %object
-	.size	__func__.11258, 22
-__func__.11258:
+	.type	__func__.11273, %object
+	.size	__func__.11273, 22
+__func__.11273:
 	.ascii	"gc_update_l2p_map_new\000"
-	.section	.rodata.__func__.11271,"a",%progbits
-	.set	.LANCHOR78,. + 0
-	.type	__func__.11271, %object
-	.size	__func__.11271, 19
-__func__.11271:
+	.section	.rodata.__func__.11286,"a",%progbits
+	.set	.LANCHOR77,. + 0
+	.type	__func__.11286, %object
+	.size	__func__.11286, 19
+__func__.11286:
 	.ascii	"gc_write_completed\000"
-	.section	.rodata.__func__.11301,"a",%progbits
+	.section	.rodata.__func__.11316,"a",%progbits
 	.set	.LANCHOR234,. + 0
-	.type	__func__.11301, %object
-	.size	__func__.11301, 16
-__func__.11301:
+	.type	__func__.11316, %object
+	.size	__func__.11316, 16
+__func__.11316:
 	.ascii	"gc_do_copy_back\000"
-	.section	.rodata.__func__.11328,"a",%progbits
+	.section	.rodata.__func__.11343,"a",%progbits
 	.set	.LANCHOR127,. + 0
-	.type	__func__.11328, %object
-	.size	__func__.11328, 16
-__func__.11328:
+	.type	__func__.11343, %object
+	.size	__func__.11343, 16
+__func__.11343:
 	.ascii	"gc_free_src_blk\000"
-	.section	.rodata.__func__.11372,"a",%progbits
+	.section	.rodata.__func__.11387,"a",%progbits
 	.set	.LANCHOR227,. + 0
-	.type	__func__.11372, %object
-	.size	__func__.11372, 16
-__func__.11372:
+	.type	__func__.11387, %object
+	.size	__func__.11387, 16
+__func__.11387:
 	.ascii	"gc_scan_src_blk\000"
-	.section	.rodata.__func__.11433,"a",%progbits
+	.section	.rodata.__func__.11448,"a",%progbits
 	.set	.LANCHOR228,. + 0
-	.type	__func__.11433, %object
-	.size	__func__.11433, 20
-__func__.11433:
+	.type	__func__.11448, %object
+	.size	__func__.11448, 20
+__func__.11448:
 	.ascii	"gc_scan_static_data\000"
-	.section	.rodata.__func__.11500,"a",%progbits
+	.section	.rodata.__func__.11542,"a",%progbits
 	.set	.LANCHOR237,. + 0
-	.type	__func__.11500, %object
-	.size	__func__.11500, 11
-__func__.11500:
+	.type	__func__.11542, %object
+	.size	__func__.11542, 11
+__func__.11542:
 	.ascii	"zftl_do_gc\000"
-	.section	.rodata.__func__.11595,"a",%progbits
+	.section	.rodata.__func__.11637,"a",%progbits
 	.set	.LANCHOR5,. + 0
-	.type	__func__.11595, %object
-	.size	__func__.11595, 18
-__func__.11595:
+	.type	__func__.11637, %object
+	.size	__func__.11637, 18
+__func__.11637:
 	.ascii	"_list_remove_node\000"
-	.section	.rodata.__func__.11620,"a",%progbits
-	.set	.LANCHOR11,. + 0
-	.type	__func__.11620, %object
-	.size	__func__.11620, 23
-__func__.11620:
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+	.set	.LANCHOR13,. + 0
+	.type	__func__.11662, %object
+	.size	__func__.11662, 23
+__func__.11662:
 	.ascii	"_list_update_data_list\000"
-	.section	.rodata.__func__.11695,"a",%progbits
-	.set	.LANCHOR154,. + 0
-	.type	__func__.11695, %object
-	.size	__func__.11695, 20
-__func__.11695:
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+	.set	.LANCHOR151,. + 0
+	.type	__func__.11737, %object
+	.size	__func__.11737, 20
+__func__.11737:
 	.ascii	"zftl_sblk_list_init\000"
-	.section	.rodata.__func__.11729,"a",%progbits
-	.set	.LANCHOR196,. + 0
-	.type	__func__.11729, %object
-	.size	__func__.11729, 15
-__func__.11729:
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+	.set	.LANCHOR193,. + 0
+	.type	__func__.11771, %object
+	.size	__func__.11771, 15
+__func__.11771:
 	.ascii	"ftl_info_flush\000"
-	.section	.rodata.__func__.11761,"a",%progbits
-	.set	.LANCHOR135,. + 0
-	.type	__func__.11761, %object
-	.size	__func__.11761, 15
-__func__.11761:
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+	.set	.LANCHOR200,. + 0
+	.type	__func__.11826, %object
+	.size	__func__.11826, 15
+__func__.11826:
 	.ascii	"ftl_alloc_sblk\000"
-	.section	.rodata.__func__.11803,"a",%progbits
+	.section	.rodata.__func__.11868,"a",%progbits
 	.set	.LANCHOR113,. + 0
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-__func__.11803:
+	.type	__func__.11868, %object
+	.size	__func__.11868, 18
+__func__.11868:
 	.ascii	"ftl_alloc_sys_blk\000"
-	.section	.rodata.__func__.11813,"a",%progbits
+	.section	.rodata.__func__.11878,"a",%progbits
 	.set	.LANCHOR114,. + 0
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-__func__.11813:
+	.type	__func__.11878, %object
+	.size	__func__.11878, 17
+__func__.11878:
 	.ascii	"ftl_free_sys_blk\000"
-	.section	.rodata.__func__.11848,"a",%progbits
+	.section	.rodata.__func__.11913,"a",%progbits
 	.set	.LANCHOR229,. + 0
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-__func__.11848:
+	.type	__func__.11913, %object
+	.size	__func__.11913, 14
+__func__.11913:
 	.ascii	"ftl_sblk_dump\000"
-	.section	.rodata.__func__.11872,"a",%progbits
+	.section	.rodata.__func__.11937,"a",%progbits
 	.set	.LANCHOR218,. + 0
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-	.size	__func__.11872, 16
-__func__.11872:
+	.type	__func__.11937, %object
+	.size	__func__.11937, 16
+__func__.11937:
 	.ascii	"ftl_sysblk_dump\000"
-	.section	.rodata.__func__.11897,"a",%progbits
+	.section	.rodata.__func__.11962,"a",%progbits
 	.set	.LANCHOR219,. + 0
-	.type	__func__.11897, %object
-	.size	__func__.11897, 23
-__func__.11897:
+	.type	__func__.11962, %object
+	.size	__func__.11962, 23
+__func__.11962:
 	.ascii	"ftl_open_sblk_recovery\000"
-	.section	.rodata.__func__.11930,"a",%progbits
+	.section	.rodata.__func__.11995,"a",%progbits
 	.set	.LANCHOR115,. + 0
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-	.size	__func__.11930, 23
-__func__.11930:
+	.type	__func__.11995, %object
+	.size	__func__.11995, 23
+__func__.11995:
 	.ascii	"ftl_get_ppa_from_index\000"
-	.section	.rodata.__func__.11951,"a",%progbits
+	.section	.rodata.__func__.12016,"a",%progbits
 	.set	.LANCHOR231,. + 0
-	.type	__func__.11951, %object
-	.size	__func__.11951, 19
-__func__.11951:
+	.type	__func__.12016, %object
+	.size	__func__.12016, 19
+__func__.12016:
 	.ascii	"ftl_update_l2p_map\000"
-	.section	.rodata.__func__.11970,"a",%progbits
+	.section	.rodata.__func__.12035,"a",%progbits
 	.set	.LANCHOR119,. + 0
-	.type	__func__.11970, %object
-	.size	__func__.11970, 22
-__func__.11970:
+	.type	__func__.12035, %object
+	.size	__func__.12035, 22
+__func__.12035:
 	.ascii	"ftl_get_new_free_page\000"
-	.section	.rodata.__func__.11981,"a",%progbits
+	.section	.rodata.__func__.12046,"a",%progbits
 	.set	.LANCHOR120,. + 0
-	.type	__func__.11981, %object
-	.size	__func__.11981, 22
-__func__.11981:
+	.type	__func__.12046, %object
+	.size	__func__.12046, 22
+__func__.12046:
 	.ascii	"ftl_ext_alloc_new_blk\000"
-	.section	.rodata.__func__.12007,"a",%progbits
-	.set	.LANCHOR201,. + 0
-	.type	__func__.12007, %object
-	.size	__func__.12007, 19
-__func__.12007:
+	.section	.rodata.__func__.12072,"a",%progbits
+	.set	.LANCHOR198,. + 0
+	.type	__func__.12072, %object
+	.size	__func__.12072, 19
+__func__.12072:
 	.ascii	"ftl_ext_info_flush\000"
-	.section	.rodata.__func__.12019,"a",%progbits
-	.set	.LANCHOR202,. + 0
-	.type	__func__.12019, %object
-	.size	__func__.12019, 18
-__func__.12019:
+	.section	.rodata.__func__.12084,"a",%progbits
+	.set	.LANCHOR199,. + 0
+	.type	__func__.12084, %object
+	.size	__func__.12084, 18
+__func__.12084:
 	.ascii	"ftl_ext_info_init\000"
-	.section	.rodata.__func__.12058,"a",%progbits
-	.set	.LANCHOR203,. + 0
-	.type	__func__.12058, %object
-	.size	__func__.12058, 25
-__func__.12058:
+	.section	.rodata.__func__.12123,"a",%progbits
+	.set	.LANCHOR201,. + 0
+	.type	__func__.12123, %object
+	.size	__func__.12123, 25
+__func__.12123:
 	.ascii	"ftl_low_format_data_init\000"
-	.section	.rodata.__func__.12073,"a",%progbits
-	.set	.LANCHOR205,. + 0
-	.type	__func__.12073, %object
-	.size	__func__.12073, 15
-__func__.12073:
+	.section	.rodata.__func__.12138,"a",%progbits
+	.set	.LANCHOR203,. + 0
+	.type	__func__.12138, %object
+	.size	__func__.12138, 15
+__func__.12138:
 	.ascii	"ftl_low_format\000"
-	.section	.rodata.__func__.12121,"a",%progbits
-	.set	.LANCHOR192,. + 0
-	.type	__func__.12121, %object
-	.size	__func__.12121, 14
-__func__.12121:
+	.section	.rodata.__func__.12186,"a",%progbits
+	.set	.LANCHOR189,. + 0
+	.type	__func__.12186, %object
+	.size	__func__.12186, 14
+__func__.12186:
 	.ascii	"ftl_prog_page\000"
-	.section	.rodata.__func__.12244,"a",%progbits
-	.set	.LANCHOR183,. + 0
-	.type	__func__.12244, %object
-	.size	__func__.12244, 31
-__func__.12244:
+	.section	.rodata.__func__.12309,"a",%progbits
+	.set	.LANCHOR180,. + 0
+	.type	__func__.12309, %object
+	.size	__func__.12309, 31
+__func__.12309:
 	.ascii	"queue_wait_first_req_completed\000"
-	.section	.rodata.__func__.12298,"a",%progbits
-	.set	.LANCHOR184,. + 0
-	.type	__func__.12298, %object
-	.size	__func__.12298, 15
-__func__.12298:
+	.section	.rodata.__func__.12363,"a",%progbits
+	.set	.LANCHOR181,. + 0
+	.type	__func__.12363, %object
+	.size	__func__.12363, 15
+__func__.12363:
 	.ascii	"sblk_prog_page\000"
-	.section	.rodata.__func__.12325,"a",%progbits
-	.set	.LANCHOR187,. + 0
-	.type	__func__.12325, %object
-	.size	__func__.12325, 15
-__func__.12325:
+	.section	.rodata.__func__.12390,"a",%progbits
+	.set	.LANCHOR184,. + 0
+	.type	__func__.12390, %object
+	.size	__func__.12390, 15
+__func__.12390:
 	.ascii	"sblk_read_page\000"
-	.section	.rodata.__func__.12395,"a",%progbits
+	.section	.rodata.__func__.12460,"a",%progbits
 	.set	.LANCHOR220,. + 0
-	.type	__func__.12395, %object
-	.size	__func__.12395, 16
-__func__.12395:
+	.type	__func__.12460, %object
+	.size	__func__.12460, 16
+__func__.12460:
 	.ascii	"load_l2p_region\000"
-	.section	.rodata.__func__.12411,"a",%progbits
-	.set	.LANCHOR156,. + 0
-	.type	__func__.12411, %object
-	.size	__func__.12411, 13
-__func__.12411:
+	.section	.rodata.__func__.12476,"a",%progbits
+	.set	.LANCHOR153,. + 0
+	.type	__func__.12476, %object
+	.size	__func__.12476, 13
+__func__.12476:
 	.ascii	"pm_free_sblk\000"
-	.section	.rodata.__func__.12435,"a",%progbits
+	.section	.rodata.__func__.12500,"a",%progbits
 	.set	.LANCHOR222,. + 0
-	.type	__func__.12435, %object
-	.size	__func__.12435, 6
-__func__.12435:
+	.type	__func__.12500, %object
+	.size	__func__.12500, 6
+__func__.12500:
 	.ascii	"pm_gc\000"
-	.section	.rodata.__func__.12451,"a",%progbits
-	.set	.LANCHOR137,. + 0
-	.type	__func__.12451, %object
-	.size	__func__.12451, 17
-__func__.12451:
+	.section	.rodata.__func__.12516,"a",%progbits
+	.set	.LANCHOR205,. + 0
+	.type	__func__.12516, %object
+	.size	__func__.12516, 17
+__func__.12516:
 	.ascii	"pm_alloc_new_blk\000"
-	.section	.rodata.__func__.12461,"a",%progbits
+	.section	.rodata.__func__.12526,"a",%progbits
 	.set	.LANCHOR206,. + 0
-	.type	__func__.12461, %object
-	.size	__func__.12461, 14
-__func__.12461:
+	.type	__func__.12526, %object
+	.size	__func__.12526, 14
+__func__.12526:
 	.ascii	"pm_write_page\000"
-	.section	.rodata.__func__.12479,"a",%progbits
-	.set	.LANCHOR140,. + 0
-	.type	__func__.12479, %object
-	.size	__func__.12479, 21
-__func__.12479:
+	.section	.rodata.__func__.12544,"a",%progbits
+	.set	.LANCHOR137,. + 0
+	.type	__func__.12544, %object
+	.size	__func__.12544, 21
+__func__.12544:
 	.ascii	"pm_select_ram_region\000"
-	.section	.rodata.__func__.9819,"a",%progbits
-	.set	.LANCHOR173,. + 0
-	.type	__func__.9819, %object
-	.size	__func__.9819, 19
-__func__.9819:
+	.section	.rodata.__func__.9837,"a",%progbits
+	.set	.LANCHOR170,. + 0
+	.type	__func__.9837, %object
+	.size	__func__.9837, 19
+__func__.9837:
 	.ascii	"flash_read_page_en\000"
-	.section	.rodata.__func__.9880,"a",%progbits
-	.set	.LANCHOR189,. + 0
-	.type	__func__.9880, %object
-	.size	__func__.9880, 19
-__func__.9880:
+	.section	.rodata.__func__.9898,"a",%progbits
+	.set	.LANCHOR186,. + 0
+	.type	__func__.9898, %object
+	.size	__func__.9898, 19
+__func__.9898:
 	.ascii	"flash_prog_page_en\000"
-	.section	.rodata.__func__.9896,"a",%progbits
-	.set	.LANCHOR44,. + 0
-	.type	__func__.9896, %object
-	.size	__func__.9896, 26
-__func__.9896:
+	.section	.rodata.__func__.9914,"a",%progbits
+	.set	.LANCHOR43,. + 0
+	.type	__func__.9914, %object
+	.size	__func__.9914, 26
+__func__.9914:
 	.ascii	"flash_erase_duplane_block\000"
-	.section	.rodata.__func__.9907,"a",%progbits
-	.set	.LANCHOR46,. + 0
-	.type	__func__.9907, %object
-	.size	__func__.9907, 21
-__func__.9907:
+	.section	.rodata.__func__.9925,"a",%progbits
+	.set	.LANCHOR45,. + 0
+	.type	__func__.9925, %object
+	.size	__func__.9925, 21
+__func__.9925:
 	.ascii	"flash_erase_block_en\000"
-	.section	.rodata.__func__.9921,"a",%progbits
-	.set	.LANCHOR29,. + 0
-	.type	__func__.9921, %object
-	.size	__func__.9921, 28
-__func__.9921:
+	.section	.rodata.__func__.9939,"a",%progbits
+	.set	.LANCHOR28,. + 0
+	.type	__func__.9939, %object
+	.size	__func__.9939, 28
+__func__.9939:
 	.ascii	"flash_wait_device_ready_raw\000"
-	.section	.rodata.__func__.9945,"a",%progbits
-	.set	.LANCHOR178,. + 0
-	.type	__func__.9945, %object
-	.size	__func__.9945, 26
-__func__.9945:
+	.section	.rodata.__func__.9963,"a",%progbits
+	.set	.LANCHOR175,. + 0
+	.type	__func__.9963, %object
+	.size	__func__.9963, 26
+__func__.9963:
 	.ascii	"flash_start_tlc_page_prog\000"
-	.section	.rodata.__func__.9956,"a",%progbits
-	.set	.LANCHOR179,. + 0
-	.type	__func__.9956, %object
-	.size	__func__.9956, 29
-__func__.9956:
-	.ascii	"flash_start_3d_mlc_page_prog\000"
 	.section	.rodata.__func__.9974,"a",%progbits
-	.set	.LANCHOR180,. + 0
+	.set	.LANCHOR176,. + 0
 	.type	__func__.9974, %object
-	.size	__func__.9974, 22
+	.size	__func__.9974, 29
 __func__.9974:
+	.ascii	"flash_start_3d_mlc_page_prog\000"
+	.section	.rodata.__func__.9992,"a",%progbits
+	.set	.LANCHOR177,. + 0
+	.type	__func__.9992, %object
+	.size	__func__.9992, 22
+__func__.9992:
 	.ascii	"flash_start_page_prog\000"
-	.section	.rodata.__func__.9985,"a",%progbits
-	.set	.LANCHOR35,. + 0
-	.type	__func__.9985, %object
-	.size	__func__.9985, 22
-__func__.9985:
-	.ascii	"flash_start_page_read\000"
-	.section	.rodata.__func__.9998,"a",%progbits
-	.set	.LANCHOR181,. + 0
-	.type	__func__.9998, %object
-	.size	__func__.9998, 31
-__func__.9998:
-	.ascii	"flash_complete_plane_page_read\000"
 	.section	.rodata._list_remove_node.str1.1,"aMS",%progbits,1
 .LC0:
 	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
@@ -34475,53 +35020,56 @@ __func__.9998:
 	.ascii	"buf = %d, next=%d, flag=%d gc_write_flag=%d, lun_st"
 	.ascii	"ate=%d, op_status = %d lpa=%x, ppa=%x\012\000"
 	.section	.rodata.dump_ftl_info.str1.1,"aMS",%progbits,1
-.LC189:
+.LC192:
 	.ascii	"free_buf_count: %d\012\000"
-.LC190:
+.LC193:
 	.ascii	"g_ftl_info_blk blk:0x%x, index:0x%x, page:0x%x\012\000"
-.LC191:
+.LC194:
 	.ascii	"ftl_ext_info_blk blk:0x%x, page:0x%x\012\000"
-.LC192:
+.LC195:
 	.ascii	"ac_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page"
 	.ascii	"_index:0x%x\012\000"
-.LC193:
+.LC196:
 	.ascii	"tmp_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, pag"
 	.ascii	"e_index:0x%x\012\000"
-.LC194:
+.LC197:
 	.ascii	"gc_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page"
 	.ascii	"_index:0x%x\012\000"
-.LC195:
+.LC198:
 	.ascii	"lpa:\000"
-.LC196:
+.LC199:
 	.ascii	"vpn:\000"
-.LC197:
+.LC200:
 	.ascii	"sblk:\000"
-.LC198:
+.LC201:
 	.ascii	"lpa_hash:\000"
-.LC199:
+.LC202:
 	.ascii	"lpa_hash_index:\000"
 	.section	.rodata.dump_pm_blk.str1.1,"aMS",%progbits,1
-.LC254:
+.LC257:
 	.ascii	"pm l2p:\000"
-.LC255:
+.LC258:
 	.ascii	"pm blk:\000"
 	.section	.rodata.dump_sblk_queue.str1.1,"aMS",%progbits,1
-.LC80:
+.LC79:
 	.ascii	"dump_sblk_queue: %d\012\000"
-.LC81:
+.LC80:
 	.ascii	"buf id= %d state = %d ppa = %x\012\000"
 	.section	.rodata.flash_complete_page_read.str1.1,"aMS",%progbits,1
-.LC139:
+.LC136:
 	.ascii	"flash_complete_page_read %x %x error_ecc %d %d\012\000"
 	.section	.rodata.flash_ddr_tuning_read.str1.1,"aMS",%progbits,1
-.LC125:
+.LC122:
 	.ascii	"%d flash_ddr_tuning_read %x ecc=%d\012\000"
-.LC126:
+.LC123:
 	.ascii	"sync para %d\012\000"
-.LC127:
+.LC124:
 	.ascii	"DDR mode Read error %x %x\012\000"
-.LC128:
+.LC125:
 	.ascii	"SDR mode Read %x %x ecc:%x\012\000"
+	.section	.rodata.flash_dual_page_prog.str1.1,"aMS",%progbits,1
+.LC130:
+	.ascii	"flash_prog_page %x %x %x\012\000"
 	.section	.rodata.flash_erase_all.str1.1,"aMS",%progbits,1
 .LC35:
 	.ascii	"erase done: %x\012\000"
@@ -34537,43 +35085,41 @@ __func__.9998:
 	.ascii	"flash_erase_duplane_block pageadd = %x status = %x\012"
 	.ascii	"\000"
 	.section	.rodata.flash_get_last_written_page.str1.1,"aMS",%progbits,1
-.LC131:
+.LC128:
 	.ascii	"flash_get_last_written_page: %x %x %x\012\000"
 	.section	.rodata.flash_info_blk_init.str1.1,"aMS",%progbits,1
-.LC174:
+.LC177:
 	.ascii	"...%d @ %s %d %p\012\000"
-.LC175:
+.LC178:
 	.ascii	"no sys info %x\012\000"
 	.section	.rodata.flash_info_data_init.str1.1,"aMS",%progbits,1
-.LC97:
+.LC94:
 	.ascii	"...%d @ %s\012\000"
 	.section	.rodata.flash_info_flush.str1.1,"aMS",%progbits,1
-.LC171:
+.LC174:
 	.ascii	"finfo:\000"
-.LC172:
+.LC175:
 	.ascii	"flash_info_flush id = %x, page = %x\012\000"
-.LC173:
+.LC176:
 	.ascii	"sys_info_flush error:%x\012\000"
 	.section	.rodata.flash_mask_bad_block.str1.1,"aMS",%progbits,1
 .LC48:
 	.ascii	"flash_mask_bad_block %d %d\012\000"
 	.section	.rodata.flash_prog_page.str1.1,"aMS",%progbits,1
-.LC132:
-	.ascii	"flash_prog_page %x %x %x\012\000"
-.LC133:
+.LC129:
 	.ascii	"flash_prog_page page_addr = %x status = %x\012\000"
 	.section	.rodata.flash_prog_page_en.str1.1,"aMS",%progbits,1
-.LC147:
+.LC144:
 	.ascii	"flash_prog_page_en:%x %x %x\012\000"
-.LC148:
+.LC145:
 	.ascii	"w d:\000"
-.LC149:
+.LC146:
 	.ascii	"w s:\000"
-.LC150:
+.LC147:
 	.ascii	"spare\000"
-.LC151:
+.LC148:
 	.ascii	"data\000"
-.LC152:
+.LC149:
 	.ascii	"write error: %x\012\000"
 	.section	.rodata.flash_read_id.str1.1,"aMS",%progbits,1
 .LC38:
@@ -34582,9 +35128,9 @@ __func__.9998:
 .LC39:
 	.ascii	"otp:%x %x %x %x\012\000"
 	.section	.rodata.flash_read_page_en.str1.1,"aMS",%progbits,1
-.LC129:
+.LC126:
 	.ascii	"flash_read_page_en %x %x %x %x\012\000"
-.LC130:
+.LC127:
 	.ascii	"flash_read_page_en %x %x error_ecc %d %d\012\000"
 	.section	.rodata.flash_set_interface_mode.str1.1,"aMS",%progbits,1
 .LC36:
@@ -34592,115 +35138,123 @@ __func__.9998:
 .LC37:
 	.ascii	"nand ddr mode %x\012\000"
 	.section	.rodata.ftl_alloc_new_data_sblk.str1.1,"aMS",%progbits,1
-.LC232:
+.LC235:
 	.ascii	"error gc_add_sblk: %x\012\000"
 	.section	.rodata.ftl_alloc_sblk.str1.1,"aMS",%progbits,1
-.LC79:
+.LC167:
 	.ascii	"alloc sblk %x %d\012\000"
 	.section	.rodata.ftl_dump_write_open_sblk.str1.1,"aMS",%progbits,1
-.LC166:
+.LC159:
 	.ascii	"ftl_sblk_dump_write = %x %d %d %d %d\012\000"
-.LC167:
+.LC160:
 	.ascii	"blk= %x, page=%x, ppa = %x, status = %x, data:%x %x"
 	.ascii	" %x %x, spare: %x %x %x %x\012\000"
-.LC168:
+.LC161:
 	.ascii	"ftl_sblk_dump_write2 = %x %d %d %d\012\000"
-.LC169:
+.LC162:
 	.ascii	"ftl_sblk_dump_write = %x %x\012\000"
-.LC170:
+.LC163:
 	.ascii	"ftl_sblk_dump_write done = %x\012\000"
 	.section	.rodata.ftl_ext_info_init.str1.1,"aMS",%progbits,1
-.LC159:
+.LC156:
 	.ascii	"%s %d %d %x %x\012\000"
-.LC160:
+.LC157:
 	.ascii	"ext info hash %x error\012\000"
-.LC161:
+.LC158:
 	.ascii	"%s %x %x %x\012\000"
 	.section	.rodata.ftl_free_sblk.str1.1,"aMS",%progbits,1
 .LC68:
 	.ascii	"swl_slc_free_mini_ec_blk sblk %x\012\000"
 	.section	.rodata.ftl_info_blk_init.str1.1,"aMS",%progbits,1
-.LC155:
+.LC152:
 	.ascii	"%d %x @%d %x\012\000"
-.LC156:
+.LC153:
 	.ascii	"ftl_info_blk_init %d %d %x\012\000"
-.LC157:
+.LC154:
 	.ascii	"ftl info hash %x error\012\000"
-.LC158:
+.LC155:
 	.ascii	"ink flag: %x\012\000"
 	.section	.rodata.ftl_info_flush.str1.1,"aMS",%progbits,1
-.LC154:
+.LC151:
 	.ascii	"g_ftl_info_blk blk = %x, page = %x version = %d\012"
 	.ascii	"\000"
+	.section	.rodata.ftl_ink_check_sblk.str1.1,"aMS",%progbits,1
+.LC165:
+	.ascii	"ftl_ink_check_sblk = %x %d %d\012\000"
+.LC166:
+	.ascii	"ftl_ink_check_sblk = %x %d %d end\012\000"
 	.section	.rodata.ftl_low_format.str1.1,"aMS",%progbits,1
-.LC162:
+.LC169:
 	.ascii	"ftl_low_format %d\012\000"
-.LC163:
+.LC170:
 	.ascii	"low format %d %d %d %d\012\000"
 	.section	.rodata.ftl_mask_bad_block.str1.1,"aMS",%progbits,1
 .LC66:
 	.ascii	"mask bad block:cs %x %x block: %x %x\012\000"
+	.section	.rodata.ftl_open_sblk_init.str1.1,"aMS",%progbits,1
+.LC168:
+	.ascii	"blk %x is bad block\012\000"
 	.section	.rodata.ftl_open_sblk_recovery.str1.1,"aMS",%progbits,1
-.LC177:
+.LC180:
 	.ascii	"saved_active_page  = %x\012\000"
-.LC178:
+.LC181:
 	.ascii	"saved_active_plane = %x\012\000"
-.LC179:
+.LC182:
 	.ascii	"sblk = %x\012\000"
-.LC180:
+.LC183:
 	.ascii	"phy_blk = %x %x\012\000"
-.LC181:
+.LC184:
 	.ascii	"num_planes = %x\012\000"
-.LC182:
+.LC185:
 	.ascii	"recovery blk=%x, page=%x, ppa = %x, status = %x, ha"
 	.ascii	"sh:%x\012\000"
-.LC183:
+.LC186:
 	.ascii	"data:\000"
-.LC184:
+.LC187:
 	.ascii	"sblk = %x, vpn0 = %d, vpn1 = %d\012\000"
-.LC185:
+.LC188:
 	.ascii	"dump_write_lpa = %x %x %x %x\012\000"
-.LC186:
+.LC189:
 	.ascii	"dump write new ppa = %x, last ppa = %x lpa = %x\012"
 	.ascii	"\000"
-.LC187:
+.LC190:
 	.ascii	"dump write = %x %x %x\012\000"
-.LC188:
+.LC191:
 	.ascii	"dump write hash update = %x %x %x\012\000"
 	.section	.rodata.ftl_re_low_format.str1.1,"aMS",%progbits,1
-.LC164:
+.LC171:
 	.ascii	"re low format %d\012\000"
 	.section	.rodata.ftl_sblk_dump.str1.1,"aMS",%progbits,1
-.LC220:
+.LC223:
 	.ascii	"ftl_sblk_dump = %x %d %d %d %d\012\000"
-.LC221:
+.LC224:
 	.ascii	"ftl_sblk_dump = %x %x %x %x\012\000"
-.LC222:
+.LC225:
 	.ascii	"page_addr = %x, lpa=%x vpn = %d\012\000"
-.LC223:
+.LC226:
 	.ascii	"index= %x, lpa=%x\012\000"
-.LC224:
+.LC227:
 	.ascii	"block = %x, vpn=%x check vpn = %x\012\000"
 	.section	.rodata.ftl_sysblk_dump.str1.1,"aMS",%progbits,1
-.LC176:
+.LC179:
 	.ascii	"l2p:\000"
 	.section	.rodata.ftl_test_block.str1.1,"aMS",%progbits,1
-.LC153:
+.LC150:
 	.ascii	"low format %d\012\000"
 	.section	.rodata.ftl_update_l2p_map.str1.1,"aMS",%progbits,1
-.LC228:
+.LC231:
 	.ascii	"ftl_update_l2p_map: %x %x %x\012\000"
-.LC229:
+.LC232:
 	.ascii	"ftl_update_l2p_map\000"
-.LC230:
+.LC233:
 	.ascii	"lpa_tbl:\000"
-.LC231:
+.LC234:
 	.ascii	"sblk %x vpn: %d %d\012\000"
 	.section	.rodata.ftl_vpn_decrement.str1.1,"aMS",%progbits,1
 .LC65:
 	.ascii	"ftl_vpn_decrement %x = %d, %d\012\000"
 	.section	.rodata.ftl_write_commit.str1.1,"aMS",%progbits,1
-.LC233:
+.LC236:
 	.ascii	"%d read error: ppa:%x, lpa:%x, status:%x\012\000"
 	.section	.rodata.ftl_write_completed.str1.1,"aMS",%progbits,1
 .LC77:
@@ -34717,13 +35271,13 @@ __func__.9998:
 .LC52:
 	.ascii	"gc_add_sblk = %d, %d, %d, %d, %d, %d\012\000"
 	.section	.rodata.gc_check_data_one_wl.str1.1,"aMS",%progbits,1
-.LC146:
+.LC143:
 	.ascii	"err: ppa = %x, status = %x, %x %x spare: %x %x %x %"
 	.ascii	"x\012\000"
 	.section	.rodata.gc_do_copy_back.str1.1,"aMS",%progbits,1
-.LC234:
+.LC237:
 	.ascii	"gc page in buf: lpa %x ppa = %x pageindex= %x\012\000"
-.LC235:
+.LC238:
 	.ascii	"gc_do_copy_back: lpa %x des_ppa = %x %x gc_ppa= %x "
 	.ascii	"page_index= %d\012\000"
 	.section	.rodata.gc_free_bad_sblk.str1.1,"aMS",%progbits,1
@@ -34737,24 +35291,27 @@ __func__.9998:
 	.section	.rodata.gc_free_temp_buf.str1.1,"aMS",%progbits,1
 .LC55:
 	.ascii	"%d gc_free_temp_buf buf id= %x\012\000"
+	.section	.rodata.gc_ink_check_sblk.str1.1,"aMS",%progbits,1
+.LC164:
+	.ascii	"%x: ink_scaned_blk_num %x\012\000"
 	.section	.rodata.gc_mark_bad_ppa.str1.1,"aMS",%progbits,1
 .LC53:
 	.ascii	"gc_mark_bad_ppa %d %x %x\012\000"
 	.section	.rodata.gc_recovery.str1.1,"aMS",%progbits,1
-.LC210:
+.LC213:
 	.ascii	"ppa = %x, status = %x, data:%x %x %x %x, spare: %x "
 	.ascii	"%x %x %x\012\000"
-.LC211:
+.LC214:
 	.ascii	"ppa = %x, status = %x, %x %x spare: %x %x %x %x\012"
 	.ascii	"\000"
-.LC212:
+.LC215:
 	.ascii	"gc_recovery: %x vpn = %x\012\000"
 	.section	.rodata.gc_scan_src_blk.str1.1,"aMS",%progbits,1
-.LC217:
+.LC220:
 	.ascii	"gc_scan_src_blk = %x, vpn = %d\012\000"
-.LC218:
+.LC221:
 	.ascii	"js hash error:%x %x %x\012\000"
-.LC219:
+.LC222:
 	.ascii	"gc_scan_src_blk = %x, s vpn0 = %d, c vpn1 = %d\012\000"
 	.section	.rodata.gc_search_src_blk.str1.1,"aMS",%progbits,1
 .LC57:
@@ -34764,78 +35321,78 @@ __func__.9998:
 	.ascii	"gc_search_src_blk mode = %x, src mode = %x, count= "
 	.ascii	"%d %d\012\000"
 	.section	.rodata.gc_static_wearleveling.str1.1,"aMS",%progbits,1
-.LC85:
+.LC82:
 	.ascii	"gc_static_wearleveling: min blk: %x,sec=%d,xec = %d"
 	.ascii	" ,mode=%d, func=%x, bbt=%x vpn = %d\012\000"
-.LC86:
+.LC83:
 	.ascii	"gc_static_wearleveling: min slc blk: %x,sec=%d,xec "
 	.ascii	"= %d ,mode=%d, func=%x, bbt=%x vpn = %d\012\000"
-.LC87:
+.LC84:
 	.ascii	"gc_static_wearleveling: min tlc blk: %x,sec=%d,xec "
 	.ascii	"= %d ,mode=%d, func=%x, bbt=%x vpn = %d\012\000"
-.LC88:
+.LC85:
 	.ascii	"gc_static_wearleveling: max slc blk: %x,sec=%d,xec "
 	.ascii	"= %d ,mode=%d, func=%x, bbt=%x vpn = %d\012\000"
-.LC89:
+.LC86:
 	.ascii	"gc_static_wearleveling: max xlc blk: %x,sec=%d,xec "
 	.ascii	"= %d ,mode=%d, func=%x, bbt=%x vpn = %d\012\000"
-.LC90:
+.LC87:
 	.ascii	"gc_static_wearleveling: slc blk: %x, tlc blk: %d av"
 	.ascii	"g slc ec: %d, avg tlc ec: %d \012\000"
-.LC91:
+.LC88:
 	.ascii	"gc_static_wearleveling: min slc ec: %x, min tlc ec:"
 	.ascii	" %d max slc ec: %d, max tlc ec: %d; %d %d\012\000"
-.LC92:
+.LC89:
 	.ascii	"swl add tlc gc = %x, %d, %d, %d, %d, %d\012\000"
-.LC93:
+.LC90:
 	.ascii	"swl add slc gc  = %x, %d, %d, %d, %d, %d\012\000"
 	.section	.rodata.gc_update_l2p_map_new.str1.1,"aMS",%progbits,1
-.LC213:
+.LC216:
 	.ascii	"gc_update_l2p_map_new sblk %x\012\000"
-.LC214:
+.LC217:
 	.ascii	"gc_update_l2p_map_new: %x %x %x\012\000"
-.LC215:
+.LC218:
 	.ascii	"lpa: %x %x %x\012\000"
-.LC216:
+.LC219:
 	.ascii	"gc_update_l2p_map_new: %x vpn = %x vpn1 = %x done\012"
 	.ascii	"\000"
 	.section	.rodata.gc_write_completed.str1.1,"aMS",%progbits,1
 .LC54:
 	.ascii	"status: %x, ppa: %x\012\000"
 	.section	.rodata.hynix_get_read_retry_default.str1.1,"aMS",%progbits,1
-.LC105:
+.LC102:
 	.ascii	"otp error! %d\000"
-.LC106:
+.LC103:
 	.ascii	"rr\000"
 	.section	.rodata.hynix_read_retrial.str1.1,"aMS",%progbits,1
-.LC124:
+.LC121:
 	.ascii	"hynix RR %d row=%x, count %d, status=%d\012\000"
 	.section	.rodata.idb_write_data.str1.1,"aMS",%progbits,1
-.LC135:
+.LC132:
 	.ascii	"1 write_idblock fix data %x %x %x\012\000"
-.LC136:
+.LC133:
 	.ascii	"write_idblock check fail! %x\012\000"
-.LC137:
+.LC134:
 	.ascii	"write_idblock fail! %x\012\000"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",%progbits,1
-.LC201:
+.LC204:
 	.ascii	"region_id = %d, pm_max_region = %d\012\000"
-.LC202:
+.LC205:
 	.ascii	"load_l2p_region no ppa = %x , %x, all setting 0xff."
 	.ascii	"...\012\000"
-.LC203:
+.LC206:
 	.ascii	"load_l2p_region = %x,%x,%x, %x\012\000"
-.LC204:
+.LC207:
 	.ascii	"pm_ppa:\000"
-.LC205:
+.LC208:
 	.ascii	"spare:\000"
 	.section	.rodata.lpa_rebuild_hash.str1.1,"aMS",%progbits,1
-.LC84:
+.LC81:
 	.ascii	"%s %d %d\012\000"
 	.section	.rodata.micron_read_retrial.str1.1,"aMS",%progbits,1
-.LC115:
+.LC112:
 	.ascii	"MT %d row=%x,last status %d,status = %d\012\000"
-.LC116:
+.LC113:
 	.ascii	"MT RR %d row=%x,count %d,status=%d\012\000"
 	.section	.rodata.nand_flash_print_info.str1.1,"aMS",%progbits,1
 .LC1:
@@ -34899,55 +35456,53 @@ __func__.9998:
 .LC30:
 	.ascii	"g_flash_toggle_mode_en: %x\012\000"
 	.section	.rodata.nandc_init.str1.1,"aMS",%progbits,1
-.LC98:
+.LC95:
 	.ascii	"...%s enter... %p\012\000"
-.LC99:
+.LC96:
 	.ascii	"0:%x %x %x %x %x\012\000"
-.LC100:
+.LC97:
 	.ascii	"g_nandc_ver...%d\012\000"
 	.section	.rodata.nandc_xfer.str1.1,"aMS",%progbits,1
-.LC112:
+.LC109:
 	.ascii	"dqs data abort %x\012\000"
-.LC113:
+.LC110:
 	.ascii	"dqs data timeout %x\012\000"
-.LC114:
+.LC111:
 	.ascii	"xfer error %x\012\000"
 	.section	.rodata.nandc_xfer_done.str1.1,"aMS",%progbits,1
-.LC107:
+.LC104:
 	.ascii	"flash_abort_clear = %d\012\000"
-.LC108:
+.LC105:
 	.ascii	"%d mtrans_cnt = %d page_num = %d\012\000"
-.LC109:
+.LC106:
 	.ascii	"%d flReg.d32=%x %x\012\000"
-.LC110:
+.LC107:
 	.ascii	"nandc:\000"
-.LC111:
+.LC108:
 	.ascii	"nandc_xfer_done read error %x\012\000"
 	.section	.rodata.pm_alloc_new_blk.str1.1,"aMS",%progbits,1
-.LC82:
-	.ascii	"blk %x is bad block\012\000"
-.LC83:
+.LC172:
 	.ascii	"pm_alloc_new_blk: %x %x %x %x\012\000"
 	.section	.rodata.pm_free_sblk.str1.1,"aMS",%progbits,1
-.LC95:
+.LC92:
 	.ascii	"GC PM block %x %x %x %d\012\000"
-.LC96:
+.LC93:
 	.ascii	"ftl_free_no_use_map_blk %x %x %x %d\012\000"
 	.section	.rodata.pm_init.str1.1,"aMS",%progbits,1
-.LC206:
+.LC209:
 	.ascii	"pm_init posr %x %x %x\012\000"
-.LC207:
+.LC210:
 	.ascii	"pm_init recovery %x %x %x\012\000"
-.LC208:
+.LC211:
 	.ascii	"pm_init hash %x error\012\000"
 	.section	.rodata.pm_log2phys.str1.1,"aMS",%progbits,1
-.LC209:
+.LC212:
 	.ascii	"pm_log2phys  lpn = %d, max lpn = %d\012\000"
 	.section	.rodata.pm_ppa_update_check.str1.1,"aMS",%progbits,1
-.LC200:
+.LC203:
 	.ascii	"%s w error lpn = %x, max ppa = %d\012\000"
 	.section	.rodata.pm_write_page.str1.1,"aMS",%progbits,1
-.LC165:
+.LC173:
 	.ascii	"pm_write_page write error: %x\012\000"
 	.section	.rodata.print_ftl_debug_info.str1.1,"aMS",%progbits,1
 .LC71:
@@ -34974,21 +35529,21 @@ __func__.9998:
 .LC64:
 	.ascii	"%d: node:%x %x %x %x, %d %d %d %d %d\012\000"
 	.section	.rodata.queue_wait_first_req_completed.str1.1,"aMS",%progbits,1
-.LC140:
+.LC137:
 	.ascii	"read: %x %x %x %x\012\000"
-.LC141:
+.LC138:
 	.ascii	"0set buf %d,status = %x, ppa = %x lun state = %d\012"
 	.ascii	"\000"
-.LC142:
+.LC139:
 	.ascii	"prog end %x %x error_ecc %d %d\012\000"
-.LC143:
+.LC140:
 	.ascii	"1set buf %d,status = %x, ppa = %x lun state = %d\012"
 	.ascii	"\000"
-.LC144:
+.LC141:
 	.ascii	"dp prog end %x %x error_ecc %d %d\012\000"
 	.section	.rodata.random_seed,"a",%progbits
 	.align	1
-	.set	.LANCHOR55,. + 0
+	.set	.LANCHOR54,. + 0
 	.type	random_seed, %object
 	.size	random_seed, 256
 random_seed:
@@ -35121,19 +35676,19 @@ random_seed:
 	.short	17598
 	.short	28087
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",%progbits,1
-.LC251:
+.LC254:
 	.ascii	"zftl_init %x\012\000"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",%progbits,1
-.LC101:
+.LC98:
 	.ascii	"%s %p + 0x%x:\000"
-.LC102:
+.LC99:
 	.ascii	"%x \000"
-.LC103:
+.LC100:
 	.ascii	"\000"
-.LC104:
+.LC101:
 	.ascii	"%s\012\000"
 	.section	.rodata.samsung_14nm_mlc_rr,"a",%progbits
-	.set	.LANCHOR171,. + 0
+	.set	.LANCHOR168,. + 0
 	.type	samsung_14nm_mlc_rr, %object
 	.size	samsung_14nm_mlc_rr, 104
 samsung_14nm_mlc_rr:
@@ -35242,7 +35797,7 @@ samsung_14nm_mlc_rr:
 	.byte	9
 	.byte	8
 	.section	.rodata.samsung_14nm_slc_rr,"a",%progbits
-	.set	.LANCHOR170,. + 0
+	.set	.LANCHOR167,. + 0
 	.type	samsung_14nm_slc_rr, %object
 	.size	samsung_14nm_slc_rr, 26
 samsung_14nm_slc_rr:
@@ -35273,24 +35828,24 @@ samsung_14nm_slc_rr:
 	.byte	-115
 	.byte	100
 	.section	.rodata.samsung_read_retrial.str1.1,"aMS",%progbits,1
-.LC121:
+.LC118:
 	.ascii	"samsung SRR %d row=%x, status=%d\012\000"
-.LC122:
+.LC119:
 	.ascii	"samsung TRR %d row=%x, status=%d\012\000"
-.LC123:
+.LC120:
 	.ascii	"samsung RR %d row=%x,count %d,status=%d\012\000"
 	.section	.rodata.sandisk_prog_test_bad_block.str1.1,"aMS",%progbits,1
 .LC40:
 	.ascii	"bad block test:%x %x\012\000"
 	.section	.rodata.sblk_mlc_dump_prog.str1.1,"aMS",%progbits,1
-.LC138:
+.LC135:
 	.ascii	"sblk_mlc_dump_prog wl_addr= %x ppa = %x ppa = %x\012"
 	.ascii	"\000"
 	.section	.rodata.sblk_prog_page.str1.1,"aMS",%progbits,1
-.LC145:
+.LC142:
 	.ascii	"sblk_prog_page ppa = %x, count = %d\012\000"
 	.section	.rodata.toshiba_15ref_value,"a",%progbits
-	.set	.LANCHOR24,. + 0
+	.set	.LANCHOR16,. + 0
 	.type	toshiba_15ref_value, %object
 	.size	toshiba_15ref_value, 95
 toshiba_15ref_value:
@@ -35390,7 +35945,7 @@ toshiba_15ref_value:
 	.byte	114
 	.byte	0
 	.section	.rodata.toshiba_3D_slc_value,"a",%progbits
-	.set	.LANCHOR39,. + 0
+	.set	.LANCHOR38,. + 0
 	.type	toshiba_3D_slc_value, %object
 	.size	toshiba_3D_slc_value, 11
 toshiba_3D_slc_value:
@@ -35406,7 +35961,7 @@ toshiba_3D_slc_value:
 	.byte	-56
 	.byte	56
 	.section	.rodata.toshiba_3D_tlc_value,"a",%progbits
-	.set	.LANCHOR38,. + 0
+	.set	.LANCHOR37,. + 0
 	.type	toshiba_3D_tlc_value, %object
 	.size	toshiba_3D_tlc_value, 399
 toshiba_3D_tlc_value:
@@ -35810,14 +36365,14 @@ toshiba_3D_tlc_value:
 	.byte	12
 	.byte	14
 	.section	.rodata.toshiba_3d_read_retrial.str1.1,"aMS",%progbits,1
-.LC117:
+.LC114:
 	.ascii	"toshiba SRR %d row=%x, status=%d\012\000"
-.LC118:
+.LC115:
 	.ascii	"toshiba TRR %d row=%x, status=%d\012\000"
-.LC119:
+.LC116:
 	.ascii	"toshiba RR %d row=%x,count %d,status=%d\012\000"
 	.section	.rodata.toshiba_A19ref_value,"a",%progbits
-	.set	.LANCHOR22,. + 0
+	.set	.LANCHOR14,. + 0
 	.type	toshiba_A19ref_value, %object
 	.size	toshiba_A19ref_value, 45
 toshiba_A19ref_value:
@@ -35867,7 +36422,7 @@ toshiba_A19ref_value:
 	.byte	124
 	.byte	0
 	.section	.rodata.toshiba_ref_value,"a",%progbits
-	.set	.LANCHOR25,. + 0
+	.set	.LANCHOR17,. + 0
 	.type	toshiba_ref_value, %object
 	.size	toshiba_ref_value, 8
 toshiba_ref_value:
@@ -35880,7 +36435,7 @@ toshiba_ref_value:
 	.byte	12
 	.byte	112
 	.section	.rodata.ymtc_3D_slc_value,"a",%progbits
-	.set	.LANCHOR43,. + 0
+	.set	.LANCHOR42,. + 0
 	.type	ymtc_3D_slc_value, %object
 	.size	ymtc_3D_slc_value, 10
 ymtc_3D_slc_value:
@@ -35895,7 +36450,7 @@ ymtc_3D_slc_value:
 	.byte	-12
 	.byte	56
 	.section	.rodata.ymtc_3D_tlc_value,"a",%progbits
-	.set	.LANCHOR42,. + 0
+	.set	.LANCHOR41,. + 0
 	.type	ymtc_3D_tlc_value, %object
 	.size	ymtc_3D_tlc_value, 357
 ymtc_3D_tlc_value:
@@ -36257,22 +36812,22 @@ ymtc_3D_tlc_value:
 	.byte	12
 	.byte	14
 	.section	.rodata.ymtc_3d_read_retrial.str1.1,"aMS",%progbits,1
-.LC120:
+.LC117:
 	.ascii	"YMTC RR %d row=%x,count %d,status=%d\012\000"
 	.section	.rodata.ymtc_flash_tlc_page_prog.str1.1,"aMS",%progbits,1
-.LC134:
+.LC131:
 	.ascii	"ymtc_flash_tlc_page_prog page_addr = %x status = %x"
 	.ascii	"\012\000"
 	.section	.rodata.zftl_discard.str1.1,"aMS",%progbits,1
-.LC253:
+.LC256:
 	.ascii	"ftl_discard:(%x, %x, %x, %x)\012\000"
 	.section	.rodata.zftl_do_gc.str1.1,"aMS",%progbits,1
-.LC236:
+.LC239:
 	.ascii	"gc %d: %d %d %d %d %d %d %d\012\000"
-.LC237:
+.LC240:
 	.ascii	"GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\012"
 	.ascii	"\000"
-.LC238:
+.LC241:
 	.ascii	"gc free %x, %d\012\000"
 	.section	.rodata.zftl_gc_get_free_sblk.str1.1,"aMS",%progbits,1
 .LC59:
@@ -36285,42 +36840,42 @@ ymtc_3D_tlc_value:
 .LC62:
 	.ascii	"swl_slc_free_mini_ec_blk alloc sblk %x\012\000"
 	.section	.rodata.zftl_init.str1.1,"aMS",%progbits,1
-.LC239:
-	.ascii	"FTL version: 6.0.23 20201130\000"
-.LC240:
+.LC242:
+	.ascii	"FTL version: 6.0.24 20210107\000"
+.LC243:
 	.ascii	"_c_user_data_density := %d\012\000"
-.LC241:
+.LC244:
 	.ascii	"_c_totle_phy_density := %d\012\000"
-.LC242:
+.LC245:
 	.ascii	"_c_totle_log_page := %d\012\000"
-.LC243:
+.LC246:
 	.ascii	"_c_totle_data_density := %d\012\000"
-.LC244:
+.LC247:
 	.ascii	"_c_ftl_pm_page_num := %d\012\000"
-.LC245:
+.LC248:
 	.ascii	"_c_ftl_byte_pre_page := %d\012\000"
-.LC246:
+.LC249:
 	.ascii	"_c_max_pm_sblk := %d\012\000"
-.LC247:
+.LC250:
 	.ascii	"_min_slc_super_block := %d\012\000"
-.LC248:
+.LC251:
 	.ascii	"_max_xlc_super_block := %d\012\000"
-.LC249:
+.LC252:
 	.ascii	"gp_ftl_ext_info %p %p %p\012\000"
-.LC250:
+.LC253:
 	.ascii	"flash info size: %d %d %d\012\000"
 	.section	.rodata.zftl_read.str1.1,"aMS",%progbits,1
-.LC225:
+.LC228:
 	.ascii	"ftl_read %x %x %x\012\000"
-.LC226:
+.LC229:
 	.ascii	"ftl_read refresh =%x, lpa = %x, ppa= %x\012\000"
-.LC227:
+.LC230:
 	.ascii	"id=%d, status = %x, lpa = %x, ppa = %x spare = %x %"
 	.ascii	"x %x %x\012\000"
 	.section	.rodata.zftl_sblk_list_init.str1.1,"aMS",%progbits,1
-.LC94:
+.LC91:
 	.ascii	"free blk vpn error: %x %x\012\000"
 	.section	.rodata.zftl_write.str1.1,"aMS",%progbits,1
-.LC252:
+.LC255:
 	.ascii	"ftlwrite %x %x %x %x\012\000"
 	.hidden	free
diff --git a/drivers/rknand/rk_zftl_arm_v8.S b/drivers/rknand/rk_zftl_arm_v8.S
index 4c57f76e80..93dedc9906 100644
--- a/drivers/rknand/rk_zftl_arm_v8.S
+++ b/drivers/rknand/rk_zftl_arm_v8.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2020-11-30
+ * date: 2021-01-07
  */
 	.arch armv8-a
 	.file	"rk_zftl_arm_v8.S"
@@ -149,60 +149,67 @@ _list_remove_node:
 	strh	w3, [x1, x0]
 	b	.L22
 	.size	_list_remove_node, .-_list_remove_node
-	.section	.text._list_pop_index_node,"ax",@progbits
+	.section	.text.hynix_set_rr_para,"ax",@progbits
 	.align	2
-	.type	_list_pop_index_node, %function
-_list_pop_index_node:
-	stp	x29, x30, [sp, -32]!
+	.type	hynix_set_rr_para, %function
+hynix_set_rr_para:
+	stp	x29, x30, [sp, -64]!
+	adrp	x2, .LANCHOR6
+	and	w1, w1, 255
+	adrp	x3, .LANCHOR7
 	add	x29, sp, 0
+	ldr	x2, [x2, #:lo12:.LANCHOR6]
+	and	w0, w0, 255
 	stp	x19, x20, [sp, 16]
-	ldr	x20, [x0]
-	cbz	x20, .L31
-	adrp	x3, .LANCHOR4
-	and	w1, w1, 65535
-	mov	w4, 65535
-	mov	w5, 6
-	ldr	x19, [x3, #:lo12:.LANCHOR4]
-.L27:
-	cbnz	w1, .L28
-.L30:
-	sub	x19, x20, x19
-	mov	x1, -6148914691236517206
-	asr	x19, x19, 1
-	movk	x1, 0xaaab, lsl 0
-	mul	x19, x19, x1
-	and	w19, w19, 65535
-	mov	w1, w19
-	bl	_list_remove_node
-	mov	w0, -1
-	strh	w0, [x20]
-	strh	w0, [x20, 2]
-	mov	w0, w19
-.L25:
+	stp	x21, x22, [sp, 32]
+	add	x21, x2, 112
+	str	x23, [sp, 48]
+	add	x23, x2, 128
+	ldr	x19, [x3, #:lo12:.LANCHOR7]
+	ldrb	w22, [x2, 113]
+	ldrb	w2, [x2, 112]
+	cmp	w2, 8
+	mov	x2, 32
+	umaddl	x1, w1, w22, x2
+	beq	.L26
+	mov	w2, 160
+	umaddl	x1, w2, w0, x1
+.L26:
+	ubfiz	x0, x0, 8, 8
+	add	x21, x21, x1
+	add	x19, x19, x0
+	mov	x20, 0
+	mov	w0, 54
+	str	w0, [x19, 2056]
+.L28:
+	cmp	w22, w20, uxtb
+	bhi	.L29
+	ldp	x21, x22, [sp, 32]
+	mov	w0, 22
+	ldr	x23, [sp, 48]
+	str	w0, [x19, 2056]
 	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 32
+	ldp	x29, x30, [sp], 64
 	ret
-.L28:
-	ldrh	w3, [x20]
-	cmp	w3, w4
-	beq	.L30
-	sub	w1, w1, #1
-	umaddl	x20, w3, w5, x19
-	and	w1, w1, 65535
-	b	.L27
-.L31:
-	mov	w0, 65535
-	b	.L25
-	.size	_list_pop_index_node, .-_list_pop_index_node
+.L29:
+	ldrb	w0, [x23, x20]
+	str	w0, [x19, 2052]
+	mov	x0, 1
+	bl	udelay
+	ldrsb	w0, [x21, x20]
+	add	x20, x20, 1
+	str	w0, [x19, 2048]
+	b	.L28
+	.size	hynix_set_rr_para, .-hynix_set_rr_para
 	.section	.text._insert_free_list,"ax",@progbits
 	.align	2
 	.type	_insert_free_list, %function
 _insert_free_list:
-	adrp	x3, .LANCHOR6
+	adrp	x3, .LANCHOR8
 	and	w1, w1, 65535
-	ldrh	w3, [x3, #:lo12:.LANCHOR6]
+	ldrh	w3, [x3, #:lo12:.LANCHOR8]
 	cmp	w3, w1
-	bls	.L33
+	bls	.L31
 	ldrh	w3, [x2]
 	mov	w8, 6
 	ldr	x7, [x0]
@@ -215,18 +222,18 @@ _insert_free_list:
 	add	x6, x5, x12
 	strh	w2, [x6, 2]
 	strh	w2, [x5, x12]
-	cbnz	x7, .L35
-.L40:
+	cbnz	x7, .L33
+.L38:
 	str	x6, [x0]
 	ret
-.L35:
-	adrp	x2, .LANCHOR7
-	adrp	x3, .LANCHOR8
+.L33:
+	adrp	x2, .LANCHOR9
+	adrp	x3, .LANCHOR10
 	mov	w10, w8
 	mov	w15, 65535
-	ldr	x11, [x2, #:lo12:.LANCHOR7]
+	ldr	x11, [x2, #:lo12:.LANCHOR9]
 	ubfiz	x2, x1, 2, 16
-	ldrh	w14, [x3, #:lo12:.LANCHOR8]
+	ldrh	w14, [x3, #:lo12:.LANCHOR10]
 	mov	x3, -6148914691236517206
 	movk	x3, 0xaaab, lsl 0
 	ldr	w4, [x11, x2]
@@ -240,7 +247,7 @@ _insert_free_list:
 	mul	x2, x2, x3
 	mov	x3, x7
 	and	w2, w2, 65535
-.L38:
+.L36:
 	ubfiz	x13, x2, 2, 16
 	ldr	w8, [x11, x13]
 	ldrh	w13, [x11, x13]
@@ -248,43 +255,43 @@ _insert_free_list:
 	and	w13, w13, 2047
 	madd	w8, w14, w8, w13
 	cmp	w4, w8, uxth
-	bls	.L36
+	bls	.L34
 	ldrh	w8, [x3]
 	cmp	w8, w15
-	bne	.L37
+	bne	.L35
 	strh	w2, [x6, 2]
 	strh	w1, [x3]
 	ret
-.L37:
+.L35:
 	umaddl	x3, w8, w10, x5
 	mov	w2, w8
-	b	.L38
-.L36:
+	b	.L36
+.L34:
 	ldrh	w4, [x3, 2]
 	cmp	x7, x3
 	strh	w4, [x6, 2]
 	strh	w2, [x5, x12]
-	bne	.L39
+	bne	.L37
 	strh	w1, [x7, 2]
-	b	.L40
-.L39:
+	b	.L38
+.L37:
 	ldrh	w0, [x3, 2]
 	mov	w2, 6
 	umull	x0, w0, w2
 	strh	w1, [x5, x0]
 	strh	w1, [x3, 2]
-.L33:
+.L31:
 	ret
 	.size	_insert_free_list, .-_insert_free_list
 	.section	.text._insert_data_list,"ax",@progbits
 	.align	2
 	.type	_insert_data_list, %function
 _insert_data_list:
-	adrp	x3, .LANCHOR6
+	adrp	x3, .LANCHOR8
 	and	w1, w1, 65535
-	ldrh	w4, [x3, #:lo12:.LANCHOR6]
+	ldrh	w4, [x3, #:lo12:.LANCHOR8]
 	cmp	w4, w1
-	bls	.L63
+	bls	.L61
 	mov	x5, x3
 	ldrh	w3, [x2]
 	mov	w13, 6
@@ -298,38 +305,38 @@ _insert_data_list:
 	add	x11, x10, x13
 	strh	w2, [x11, 2]
 	strh	w2, [x10, x13]
-	cbnz	x12, .L44
+	cbnz	x12, .L42
 	str	x11, [x0]
 	ret
-.L44:
+.L42:
 	stp	x29, x30, [sp, -32]!
-	adrp	x2, .LANCHOR9
+	adrp	x2, .LANCHOR11
 	uxtw	x3, w1
-	adrp	x6, .LANCHOR8
+	adrp	x6, .LANCHOR10
 	add	x29, sp, 0
-	ldr	x15, [x2, #:lo12:.LANCHOR9]
-	adrp	x2, .LANCHOR7
+	ldr	x15, [x2, #:lo12:.LANCHOR11]
+	adrp	x2, .LANCHOR9
 	ldrh	w4, [x11, 4]
-	ldr	x14, [x2, #:lo12:.LANCHOR7]
+	ldr	x14, [x2, #:lo12:.LANCHOR9]
 	stp	x19, x20, [sp, 16]
 	ldrh	w8, [x15, x3, lsl 1]
 	lsl	x3, x3, 2
-	ldrh	w16, [x6, #:lo12:.LANCHOR8]
+	ldrh	w16, [x6, #:lo12:.LANCHOR10]
 	ldr	w2, [x14, x3]
 	mul	w8, w8, w4
 	ldrh	w3, [x14, x3]
 	ubfx	x2, x2, 11, 8
 	and	w3, w3, 2047
-	cbz	w8, .L45
+	cbz	w8, .L43
 	madd	w2, w16, w2, w3
 	add	w8, w8, w2, uxth
-.L45:
+.L43:
 	sub	x2, x12, x10
 	mov	x3, -6148914691236517206
 	asr	x2, x2, 1
 	movk	x3, 0xaaab, lsl 0
 	cmp	w4, 0
-	ldrh	w19, [x5, #:lo12:.LANCHOR6]
+	ldrh	w19, [x5, #:lo12:.LANCHOR8]
 	csinv	w8, w8, wzr, ne
 	mov	x7, x12
 	mul	x2, x2, x3
@@ -337,13 +344,13 @@ _insert_data_list:
 	mov	w20, 65535
 	mov	w30, 6
 	and	w2, w2, 65535
-.L51:
+.L49:
 	add	w4, w4, 1
 	and	w4, w4, 65535
 	cmp	w4, w19
-	bhi	.L41
+	bhi	.L39
 	cmp	w1, w2
-	beq	.L41
+	beq	.L39
 	uxtw	x6, w2
 	ldrh	w17, [x7, 4]
 	ldrh	w3, [x15, x6, lsl 1]
@@ -353,78 +360,45 @@ _insert_data_list:
 	ldrh	w6, [x14, x6]
 	ubfx	x5, x5, 11, 8
 	and	w6, w6, 2047
-	cbz	w3, .L48
+	cbz	w3, .L46
 	madd	w5, w16, w5, w6
 	add	w3, w3, w5, uxth
-.L48:
-	cbz	w17, .L49
+.L46:
+	cbz	w17, .L47
 	cmp	w8, w3
-	bls	.L49
+	bls	.L47
 	ldrh	w3, [x7]
 	cmp	w3, w20
-	bne	.L50
+	bne	.L48
 	strh	w2, [x11, 2]
 	strh	w1, [x7]
-.L41:
+.L39:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L50:
+.L48:
 	umaddl	x7, w3, w30, x10
 	mov	w2, w3
-	b	.L51
-.L49:
+	b	.L49
+.L47:
 	ldrh	w3, [x7, 2]
 	cmp	x12, x7
 	strh	w3, [x11, 2]
 	strh	w2, [x10, x13]
-	bne	.L52
+	bne	.L50
 	strh	w1, [x12, 2]
 	str	x11, [x0]
-	b	.L41
-.L52:
+	b	.L39
+.L50:
 	ldrh	w0, [x7, 2]
 	mov	w2, 6
 	umull	x0, w0, w2
 	strh	w1, [x10, x0]
 	strh	w1, [x7, 2]
-	b	.L41
-.L63:
+	b	.L39
+.L61:
 	ret
 	.size	_insert_data_list, .-_insert_data_list
-	.section	.text._list_get_gc_head_node.isra.2,"ax",@progbits
-	.align	2
-	.type	_list_get_gc_head_node.isra.2, %function
-_list_get_gc_head_node.isra.2:
-	and	w1, w1, 65535
-	cbz	x0, .L70
-	adrp	x2, .LANCHOR4
-	mov	w3, 65535
-	mov	w4, 6
-	ldr	x2, [x2, #:lo12:.LANCHOR4]
-.L67:
-	cbz	w1, .L68
-	ldrh	w0, [x0]
-	cmp	w0, w3
-	bne	.L69
-	ret
-.L69:
-	sub	w1, w1, #1
-	umaddl	x0, w0, w4, x2
-	and	w1, w1, 65535
-	b	.L67
-.L70:
-	mov	w0, 65535
-	ret
-.L68:
-	sub	x0, x0, x2
-	mov	x1, -6148914691236517206
-	asr	x0, x0, 1
-	movk	x1, 0xaaab, lsl 0
-	mul	x0, x0, x1
-	and	w0, w0, 65535
-	ret
-	.size	_list_get_gc_head_node.isra.2, .-_list_get_gc_head_node.isra.2
 	.section	.text._list_update_data_list,"ax",@progbits
 	.align	2
 	.type	_list_update_data_list, %function
@@ -433,20 +407,20 @@ _list_update_data_list:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w19, w1, 65535
-	adrp	x1, .LANCHOR10
+	adrp	x1, .LANCHOR12
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	ldr	x1, [x1, #:lo12:.LANCHOR10]
+	ldr	x1, [x1, #:lo12:.LANCHOR12]
 	ldrh	w3, [x1, 16]
 	str	x25, [sp, 64]
 	cmp	w3, w19
-	beq	.L72
+	beq	.L63
 	ldrh	w3, [x1, 48]
 	cmp	w3, w19
-	beq	.L72
+	beq	.L63
 	ldrh	w1, [x1, 80]
 	cmp	w1, w19
-	beq	.L72
+	beq	.L63
 	adrp	x1, .LANCHOR4
 	mov	w22, 6
 	ldr	x3, [x0]
@@ -455,36 +429,36 @@ _list_update_data_list:
 	ldr	x24, [x1, #:lo12:.LANCHOR4]
 	add	x23, x24, x22
 	cmp	x23, x3
-	beq	.L72
+	beq	.L63
 	mov	x20, x0
 	ldrh	w0, [x23, 2]
 	mov	w1, 65535
 	mov	x21, x2
 	cmp	w0, w1
-	bne	.L76
+	bne	.L67
 	ldrh	w1, [x24, x22]
 	cmp	w1, w0
-	bne	.L76
-	adrp	x1, .LANCHOR11
+	bne	.L67
+	adrp	x1, .LANCHOR13
 	adrp	x0, .LC0
 	mov	w2, 273
-	add	x1, x1, :lo12:.LANCHOR11
+	add	x1, x1, :lo12:.LANCHOR13
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L76:
+.L67:
 	ldrh	w1, [x23, 2]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L77
+	bne	.L68
 	ldrh	w0, [x24, x22]
 	cmp	w0, w1
-	beq	.L72
-.L77:
-	adrp	x0, .LANCHOR9
+	beq	.L63
+.L68:
+	adrp	x0, .LANCHOR11
 	ubfiz	x2, x19, 1, 16
 	mov	x5, -6148914691236517206
 	mov	w4, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	movk	x5, 0xaaab, lsl 0
 	ldrh	w3, [x0, x2]
 	ldrh	w2, [x23, 4]
@@ -503,7 +477,7 @@ _list_update_data_list:
 	mul	w0, w0, w1
 	csel	w0, w0, w4, ne
 	cmp	w3, w0
-	bcs	.L72
+	bcs	.L63
 	mov	x2, x21
 	mov	w1, w19
 	mov	x0, x20
@@ -517,7 +491,7 @@ _list_update_data_list:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	b	_insert_data_list
-.L72:
+.L63:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -525,27 +499,137 @@ _list_update_data_list:
 	ldp	x29, x30, [sp], 80
 	ret
 	.size	_list_update_data_list, .-_list_update_data_list
-	.section	.text.zftl_get_gc_node.part.9,"ax",@progbits
+	.section	.text.nandc_de_cs.constprop.32,"ax",@progbits
 	.align	2
-	.type	zftl_get_gc_node.part.9, %function
-zftl_get_gc_node.part.9:
-	mov	w1, w0
-	adrp	x0, .LANCHOR12
-	ldr	x0, [x0, #:lo12:.LANCHOR12]
-	b	_list_get_gc_head_node.isra.2
-	.size	zftl_get_gc_node.part.9, .-zftl_get_gc_node.part.9
-	.section	.text.nandc_de_cs.constprop.33,"ax",@progbits
-	.align	2
-	.type	nandc_de_cs.constprop.33, %function
-nandc_de_cs.constprop.33:
-	adrp	x0, .LANCHOR13
-	ldr	x1, [x0, #:lo12:.LANCHOR13]
+	.type	nandc_de_cs.constprop.32, %function
+nandc_de_cs.constprop.32:
+	adrp	x0, .LANCHOR7
+	ldr	x1, [x0, #:lo12:.LANCHOR7]
 	ldr	w0, [x1]
 	and	w0, w0, -256
 	and	w0, w0, -131073
 	str	w0, [x1]
 	ret
-	.size	nandc_de_cs.constprop.33, .-nandc_de_cs.constprop.33
+	.size	nandc_de_cs.constprop.32, .-nandc_de_cs.constprop.32
+	.section	.text.flash_read_status,"ax",@progbits
+	.align	2
+	.global	flash_read_status
+	.type	flash_read_status, %function
+flash_read_status:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	mov	x19, x0
+	mov	w0, 112
+	str	w0, [x19, 8]
+	mov	x0, 1
+	bl	udelay
+	ldr	w0, [x19]
+	ldr	x19, [sp, 16]
+	and	w0, w0, 255
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	flash_read_status, .-flash_read_status
+	.section	.text.toshiba_set_rr_para,"ax",@progbits
+	.align	2
+	.global	toshiba_set_rr_para
+	.type	toshiba_set_rr_para, %function
+toshiba_set_rr_para:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	str	x27, [sp, 80]
+	and	w27, w1, 255
+	add	w2, w27, 1
+	stp	x21, x22, [sp, 32]
+	mov	x21, x0
+	mov	w0, 5
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR14
+	umull	x2, w2, w0
+	stp	x23, x24, [sp, 48]
+	adrp	x0, .LANCHOR15
+	add	x20, x20, :lo12:.LANCHOR14
+	add	x24, x0, :lo12:.LANCHOR15
+	stp	x25, x26, [sp, 64]
+	adrp	x23, .LANCHOR18
+	adrp	x25, .LANCHOR16
+	adrp	x26, .LANCHOR17
+	add	x23, x23, :lo12:.LANCHOR18
+	add	x25, x25, :lo12:.LANCHOR16
+	add	x26, x26, :lo12:.LANCHOR17
+	add	x20, x20, x2
+	add	x24, x24, x2
+	mov	x22, x0
+	mov	x19, 0
+.L78:
+	ldrb	w0, [x23]
+	cmp	w0, w19
+	bhi	.L82
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	ret
+.L82:
+	mov	w0, 85
+	str	w0, [x21, 8]
+	add	x0, x22, :lo12:.LANCHOR15
+	ldrsb	w0, [x19, x0]
+	str	w0, [x21, 4]
+	mov	x0, 1
+	bl	udelay
+	ldrb	w0, [x25]
+	cmp	w0, 34
+	bne	.L79
+	ldrsb	w0, [x24, x19]
+.L84:
+	add	x19, x19, 1
+	str	w0, [x21]
+	b	.L78
+.L79:
+	cmp	w0, 35
+	bne	.L81
+	ldrsb	w0, [x20, x19]
+	b	.L84
+.L81:
+	ldrsb	w0, [x26, w27, sxtw]
+	b	.L84
+	.size	toshiba_set_rr_para, .-toshiba_set_rr_para
+	.section	.text.hynix_reconfig_rr_para,"ax",@progbits
+	.align	2
+	.global	hynix_reconfig_rr_para
+	.type	hynix_reconfig_rr_para, %function
+hynix_reconfig_rr_para:
+	adrp	x1, .LANCHOR16
+	ldrb	w1, [x1, #:lo12:.LANCHOR16]
+	sub	w1, w1, #1
+	and	w1, w1, 255
+	cmp	w1, 7
+	bhi	.L91
+	stp	x29, x30, [sp, -32]!
+	and	w0, w0, 255
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR6
+	sxtw	x19, w0
+	ldr	x1, [x20, #:lo12:.LANCHOR6]
+	add	x1, x1, x19
+	ldrb	w1, [x1, 120]
+	cbz	w1, .L85
+	mov	w1, 0
+	bl	hynix_set_rr_para
+	ldr	x0, [x20, #:lo12:.LANCHOR6]
+	add	x0, x0, x19
+	strb	wzr, [x0, 120]
+.L85:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L91:
+	ret
+	.size	hynix_reconfig_rr_para, .-hynix_reconfig_rr_para
 	.section	.text.nand_flash_print_info,"ax",@progbits
 	.align	2
 	.global	nand_flash_print_info
@@ -554,19 +638,19 @@ nand_flash_print_info:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR14
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L86
-	adrp	x1, .LANCHOR15
+	adrp	x19, .LANCHOR19
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L95
+	adrp	x1, .LANCHOR20
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR15
+	add	x1, x1, :lo12:.LANCHOR20
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L86:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L87
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L95:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L96
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrb	w6, [x0, 6]
 	ldrb	w5, [x0, 5]
 	ldrb	w4, [x0, 4]
@@ -576,272 +660,272 @@ nand_flash_print_info:
 	adrp	x0, .LC2
 	add	x0, x0, :lo12:.LC2
 	bl	printf
-.L87:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L88
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L96:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L97
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrb	w1, [x0, 8]
 	adrp	x0, .LC3
 	add	x0, x0, :lo12:.LC3
 	bl	printf
-.L88:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L89
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L97:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L98
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrb	w1, [x0, 9]
 	adrp	x0, .LC4
 	add	x0, x0, :lo12:.LC4
 	bl	printf
-.L89:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L90
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L98:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L99
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrh	w1, [x0, 10]
 	adrp	x0, .LC5
 	add	x0, x0, :lo12:.LC5
 	bl	printf
-.L90:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L91
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L99:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L100
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrb	w1, [x0, 12]
 	adrp	x0, .LC6
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L91:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L92
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L100:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L101
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrb	w1, [x0, 13]
 	adrp	x0, .LC7
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L92:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L93
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L101:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L102
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrh	w1, [x0, 14]
 	adrp	x0, .LC8
 	add	x0, x0, :lo12:.LC8
 	bl	printf
-.L93:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L94
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L102:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L103
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrb	w1, [x0, 23]
 	adrp	x0, .LC9
 	add	x0, x0, :lo12:.LC9
 	bl	printf
-.L94:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L95
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L103:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L104
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrb	w1, [x0, 18]
 	adrp	x0, .LC10
 	add	x0, x0, :lo12:.LC10
 	bl	printf
-.L95:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L96
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L104:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L105
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrb	w1, [x0, 19]
 	adrp	x0, .LC11
 	add	x0, x0, :lo12:.LC11
 	bl	printf
-.L96:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L97
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
-	ldrb	w1, [x0, 20]
+.L105:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L106
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
+	ldrb	w1, [x0, 20]
 	adrp	x0, .LC12
 	add	x0, x0, :lo12:.LC12
 	bl	printf
-.L97:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L98
-	adrp	x0, .LANCHOR17
-	ldrb	w1, [x0, #:lo12:.LANCHOR17]
+.L106:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L107
+	adrp	x0, .LANCHOR22
+	ldrb	w1, [x0, #:lo12:.LANCHOR22]
 	adrp	x0, .LC13
 	add	x0, x0, :lo12:.LC13
 	bl	printf
-.L98:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L99
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L107:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L108
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrb	w1, [x0, 22]
 	adrp	x0, .LC14
 	add	x0, x0, :lo12:.LC14
 	bl	printf
-.L99:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L100
-	adrp	x0, .LANCHOR18
-	ldrb	w1, [x0, #:lo12:.LANCHOR18]
+.L108:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L109
+	adrp	x0, .LANCHOR23
+	ldrb	w1, [x0, #:lo12:.LANCHOR23]
 	adrp	x0, .LC15
 	add	x0, x0, :lo12:.LC15
 	bl	printf
-.L100:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L101
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L109:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L110
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrb	w1, [x0, 16]
 	adrp	x0, .LC16
 	add	x0, x0, :lo12:.LC16
 	and	w1, w1, 1
 	bl	printf
-.L101:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L102
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L110:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L111
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC17
 	add	x0, x0, :lo12:.LC17
 	ubfx	x1, x1, 1, 1
 	bl	printf
-.L102:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L103
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L111:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L112
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC18
 	add	x0, x0, :lo12:.LC18
 	ubfx	x1, x1, 2, 1
 	bl	printf
-.L103:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L104
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L112:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L113
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC19
 	add	x0, x0, :lo12:.LC19
 	ubfx	x1, x1, 3, 1
 	bl	printf
-.L104:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L105
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L113:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L114
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC20
 	add	x0, x0, :lo12:.LC20
 	ubfx	x1, x1, 4, 1
 	bl	printf
-.L105:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L106
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L114:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L115
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC21
 	add	x0, x0, :lo12:.LC21
 	ubfx	x1, x1, 5, 1
 	bl	printf
-.L106:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L107
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L115:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L116
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC22
 	add	x0, x0, :lo12:.LC22
 	ubfx	x1, x1, 6, 1
 	bl	printf
-.L107:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L108
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L116:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L117
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC23
 	add	x0, x0, :lo12:.LC23
 	ubfx	x1, x1, 7, 1
 	bl	printf
-.L108:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L109
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L117:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L118
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrb	w1, [x0, 17]
 	adrp	x0, .LC24
 	add	x0, x0, :lo12:.LC24
 	and	w1, w1, 1
 	bl	printf
-.L109:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L110
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L118:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L119
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC25
 	add	x0, x0, :lo12:.LC25
 	ubfx	x1, x1, 9, 1
 	bl	printf
-.L110:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L111
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L119:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L120
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC26
 	add	x0, x0, :lo12:.LC26
 	ubfx	x1, x1, 10, 1
 	bl	printf
-.L111:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L112
-	adrp	x0, .LANCHOR19
-	ldrb	w2, [x0, #:lo12:.LANCHOR19]
+.L120:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L121
+	adrp	x0, .LANCHOR24
+	ldrb	w2, [x0, #:lo12:.LANCHOR24]
 	adrp	x0, .LANCHOR0
 	ldrb	w1, [x0, #:lo12:.LANCHOR0]
 	adrp	x0, .LC27
 	add	x0, x0, :lo12:.LC27
 	bl	printf
-.L112:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L113
-	adrp	x0, .LANCHOR20
-	add	x0, x0, :lo12:.LANCHOR20
+.L121:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L122
+	adrp	x0, .LANCHOR25
+	add	x0, x0, :lo12:.LANCHOR25
 	ldrb	w2, [x0, 11]
 	ldrb	w1, [x0, 10]
 	adrp	x0, .LC28
 	add	x0, x0, :lo12:.LC28
 	bl	printf
-.L113:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L114
-	adrp	x0, .LANCHOR20
-	add	x0, x0, :lo12:.LANCHOR20
+.L122:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L123
+	adrp	x0, .LANCHOR25
+	add	x0, x0, :lo12:.LANCHOR25
 	ldrb	w2, [x0, 9]
 	ldrb	w1, [x0, 8]
 	adrp	x0, .LC29
 	add	x0, x0, :lo12:.LC29
 	bl	printf
-.L114:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L85
-	adrp	x0, .LANCHOR21
+.L123:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L94
+	adrp	x0, .LANCHOR26
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	ldrb	w1, [x0, #:lo12:.LANCHOR21]
+	ldrb	w1, [x0, #:lo12:.LANCHOR26]
 	adrp	x0, .LC30
 	add	x0, x0, :lo12:.LC30
 	b	printf
-.L85:
+.L94:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -851,193 +935,31 @@ nand_flash_print_info:
 	.global	timer_delay_ns
 	.type	timer_delay_ns, %function
 timer_delay_ns:
-	sub	sp, sp, #16
-	lsr	w0, w0, 4
-	str	w0, [sp, 12]
-.L205:
-	ldr	w0, [sp, 12]
-	sub	w1, w0, #1
-	str	w1, [sp, 12]
-	cbnz	w0, .L205
-	add	sp, sp, 16
-	ret
+	uxtw	x0, w0
+	mov	x1, 1000
+	add	x0, x0, 999
+	udiv	x0, x0, x1
+	b	udelay
 	.size	timer_delay_ns, .-timer_delay_ns
-	.section	.text.flash_read_status,"ax",@progbits
-	.align	2
-	.global	flash_read_status
-	.type	flash_read_status, %function
-flash_read_status:
-	stp	x29, x30, [sp, -16]!
-	mov	x2, x0
-	mov	w0, 112
-	add	x29, sp, 0
-	str	w0, [x2, 8]
-	mov	w0, 120
-	bl	timer_delay_ns
-	ldr	w0, [x2]
-	ldp	x29, x30, [sp], 16
-	and	w0, w0, 255
-	ret
-	.size	flash_read_status, .-flash_read_status
-	.section	.text.toshiba_set_rr_para,"ax",@progbits
-	.align	2
-	.global	toshiba_set_rr_para
-	.type	toshiba_set_rr_para, %function
-toshiba_set_rr_para:
-	and	w11, w1, 255
-	mov	x4, x0
-	add	w2, w11, 1
-	mov	w0, 5
-	adrp	x6, .LANCHOR26
-	add	x6, x6, :lo12:.LANCHOR26
-	adrp	x3, .LANCHOR22
-	add	x3, x3, :lo12:.LANCHOR22
-	umull	x2, w2, w0
-	adrp	x0, .LANCHOR23
-	add	x7, x0, :lo12:.LANCHOR23
-	mov	x5, x0
-	ldrb	w0, [x6]
-	add	x3, x3, x2
-	add	x7, x7, x2
-	adrp	x8, .LANCHOR24
-	mov	x2, 0
-	adrp	x10, .LANCHOR25
-	add	x8, x8, :lo12:.LANCHOR24
-	add	x10, x10, :lo12:.LANCHOR25
-	cmp	w0, w2
-	bhi	.L218
-	ret
-.L212:
-	cmp	w0, 35
-	bne	.L214
-	ldrsb	w0, [x3, x2]
-	b	.L219
-.L214:
-	ldrsb	w0, [x10, w11, sxtw]
-	b	.L219
-.L218:
-	stp	x29, x30, [sp, -16]!
-	add	x29, sp, 0
-.L215:
-	mov	w0, 85
-	str	w0, [x4, 8]
-	add	x0, x5, :lo12:.LANCHOR23
-	ldrsb	w0, [x2, x0]
-	str	w0, [x4, 4]
-	mov	w0, 200
-	bl	timer_delay_ns
-	ldrb	w0, [x8]
-	cmp	w0, 34
-	bne	.L212
-	ldrsb	w0, [x7, x2]
-.L219:
-	str	w0, [x4]
-	add	x2, x2, 1
-	ldrb	w0, [x6]
-	cmp	w0, w2
-	bhi	.L215
-	ldp	x29, x30, [sp], 16
-	ret
-	.size	toshiba_set_rr_para, .-toshiba_set_rr_para
-	.section	.text.hynix_set_rr_para,"ax",@progbits
-	.align	2
-	.type	hynix_set_rr_para, %function
-hynix_set_rr_para:
-	adrp	x2, .LANCHOR27
-	and	w1, w1, 255
-	and	w0, w0, 255
-	ldr	x3, [x2, #:lo12:.LANCHOR27]
-	adrp	x2, .LANCHOR13
-	add	x6, x3, 128
-	add	x4, x3, 112
-	ldr	x2, [x2, #:lo12:.LANCHOR13]
-	ldrb	w5, [x3, 113]
-	ldrb	w3, [x3, 112]
-	cmp	w3, 8
-	mov	x3, 32
-	umaddl	x1, w1, w5, x3
-	beq	.L221
-	mov	w3, 160
-	umaddl	x1, w3, w0, x1
-.L221:
-	ubfiz	x0, x0, 8, 8
-	mov	x3, 0
-	add	x2, x2, x0
-	mov	w0, 54
-	add	x4, x4, x1
-	cmp	w5, w3, uxtb
-	str	w0, [x2, 2056]
-	bhi	.L228
-	mov	w0, 22
-	str	w0, [x2, 2056]
-	ret
-.L228:
-	stp	x29, x30, [sp, -16]!
-	add	x29, sp, 0
-.L224:
-	ldrb	w0, [x6, x3]
-	str	w0, [x2, 2052]
-	mov	w0, 120
-	bl	timer_delay_ns
-	ldrsb	w0, [x4, x3]
-	str	w0, [x2, 2048]
-	add	x3, x3, 1
-	cmp	w5, w3, uxtb
-	bhi	.L224
-	mov	w0, 22
-	str	w0, [x2, 2056]
-	ldp	x29, x30, [sp], 16
-	ret
-	.size	hynix_set_rr_para, .-hynix_set_rr_para
-	.section	.text.hynix_reconfig_rr_para,"ax",@progbits
-	.align	2
-	.global	hynix_reconfig_rr_para
-	.type	hynix_reconfig_rr_para, %function
-hynix_reconfig_rr_para:
-	adrp	x1, .LANCHOR24
-	ldrb	w1, [x1, #:lo12:.LANCHOR24]
-	sub	w1, w1, #1
-	and	w1, w1, 255
-	cmp	w1, 7
-	bhi	.L235
-	adrp	x8, .LANCHOR27
-	and	w0, w0, 255
-	sxtw	x7, w0
-	ldr	x1, [x8, #:lo12:.LANCHOR27]
-	add	x1, x1, x7
-	ldrb	w1, [x1, 120]
-	cbz	w1, .L235
-	stp	x29, x30, [sp, -16]!
-	mov	w1, 0
-	add	x29, sp, 0
-	bl	hynix_set_rr_para
-	ldr	x0, [x8, #:lo12:.LANCHOR27]
-	add	x0, x0, x7
-	strb	wzr, [x0, 120]
-	ldp	x29, x30, [sp], 16
-	ret
-.L235:
-	ret
-	.size	hynix_reconfig_rr_para, .-hynix_reconfig_rr_para
 	.section	.text.nandc_set_ddr_para,"ax",@progbits
 	.align	2
 	.global	nandc_set_ddr_para
 	.type	nandc_set_ddr_para, %function
 nandc_set_ddr_para:
-	adrp	x1, .LANCHOR28
+	adrp	x1, .LANCHOR27
 	and	w0, w0, 255
-	adrp	x2, .LANCHOR13
-	ldrb	w1, [x1, #:lo12:.LANCHOR28]
-	ldr	x2, [x2, #:lo12:.LANCHOR13]
+	adrp	x2, .LANCHOR7
+	ldrb	w1, [x1, #:lo12:.LANCHOR27]
+	ldr	x2, [x2, #:lo12:.LANCHOR7]
 	cmp	w1, 9
 	lsl	w1, w0, 16
 	lsl	w0, w0, 8
 	orr	w1, w1, w0
 	orr	w1, w1, 3
-	bne	.L239
+	bne	.L215
 	str	w1, [x2, 80]
 	ret
-.L239:
+.L215:
 	str	w1, [x2, 304]
 	ret
 	.size	nandc_set_ddr_para, .-nandc_set_ddr_para
@@ -1046,43 +968,43 @@ nandc_set_ddr_para:
 	.global	nandc_get_ddr_para
 	.type	nandc_get_ddr_para, %function
 nandc_get_ddr_para:
-	adrp	x0, .LANCHOR28
-	ldrb	w0, [x0, #:lo12:.LANCHOR28]
+	adrp	x0, .LANCHOR27
+	ldrb	w0, [x0, #:lo12:.LANCHOR27]
 	cmp	w0, 9
-	adrp	x0, .LANCHOR13
-	ldr	x0, [x0, #:lo12:.LANCHOR13]
-	bne	.L242
+	adrp	x0, .LANCHOR7
+	ldr	x0, [x0, #:lo12:.LANCHOR7]
+	bne	.L218
 	ldr	w0, [x0, 80]
-.L244:
+.L220:
 	ubfx	x0, x0, 8, 8
 	ret
-.L242:
+.L218:
 	ldr	w0, [x0, 304]
-	b	.L244
+	b	.L220
 	.size	nandc_get_ddr_para, .-nandc_get_ddr_para
 	.section	.text.nandc_set_if_mode,"ax",@progbits
 	.align	2
 	.global	nandc_set_if_mode
 	.type	nandc_set_if_mode, %function
 nandc_set_if_mode:
-	adrp	x1, .LANCHOR13
+	adrp	x1, .LANCHOR7
 	and	w0, w0, 255
 	tst	w0, 6
-	ldr	x2, [x1, #:lo12:.LANCHOR13]
+	ldr	x2, [x1, #:lo12:.LANCHOR7]
 	ldr	w1, [x2]
-	beq	.L246
+	beq	.L222
 	tst	x0, 4
 	orr	w1, w1, 24576
-	adrp	x0, .LANCHOR28
+	adrp	x0, .LANCHOR27
 	and	w1, w1, -32769
 	orr	w1, w1, 196608
-	ldrb	w0, [x0, #:lo12:.LANCHOR28]
+	ldrb	w0, [x0, #:lo12:.LANCHOR27]
 	orr	w3, w1, 32768
 	csel	w1, w3, w1, ne
 	cmp	w0, 9
 	mov	w0, 4099
 	movk	w0, 0x10, lsl 16
-	bne	.L248
+	bne	.L224
 	mov	w3, 8321
 	str	w3, [x2, 8]
 	str	w0, [x2, 80]
@@ -1090,10 +1012,10 @@ nandc_set_if_mode:
 	str	w0, [x2, 84]
 	mov	w0, 39
 	str	w0, [x2, 84]
-.L249:
+.L225:
 	str	w1, [x2]
 	ret
-.L248:
+.L224:
 	mov	w3, 8322
 	str	w3, [x2, 344]
 	str	w0, [x2, 304]
@@ -1101,20 +1023,20 @@ nandc_set_if_mode:
 	str	w0, [x2, 308]
 	mov	w0, 39
 	str	w0, [x2, 308]
-	b	.L249
-.L246:
+	b	.L225
+.L222:
 	and	w1, w1, -8193
-	b	.L249
+	b	.L225
 	.size	nandc_set_if_mode, .-nandc_set_if_mode
 	.section	.text.nandc_cs,"ax",@progbits
 	.align	2
 	.global	nandc_cs
 	.type	nandc_cs, %function
 nandc_cs:
-	adrp	x1, .LANCHOR13
+	adrp	x1, .LANCHOR7
 	mov	w2, 1
 	lsl	w0, w2, w0
-	ldr	x3, [x1, #:lo12:.LANCHOR13]
+	ldr	x3, [x1, #:lo12:.LANCHOR7]
 	ldr	w1, [x3]
 	bfi	w1, w0, 0, 8
 	str	w1, [x3]
@@ -1125,62 +1047,68 @@ nandc_cs:
 	.global	flash_wait_device_ready_raw
 	.type	flash_wait_device_ready_raw, %function
 flash_wait_device_ready_raw:
-	stp	x29, x30, [sp, -48]!
+	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
-	str	x21, [sp, 32]
-	and	w21, w0, 255
-	adrp	x0, .LANCHOR18
 	stp	x19, x20, [sp, 16]
-	mov	w19, w1
-	mov	w20, w2
-	ldrb	w0, [x0, #:lo12:.LANCHOR18]
-	cmp	w0, w21
-	bhi	.L254
-	adrp	x1, .LANCHOR29
+	and	w19, w0, 255
+	adrp	x0, .LANCHOR23
+	stp	x25, x26, [sp, 64]
+	stp	x21, x22, [sp, 32]
+	mov	w20, w1
+	ldrb	w0, [x0, #:lo12:.LANCHOR23]
+	mov	w26, w2
+	stp	x23, x24, [sp, 48]
+	str	x27, [sp, 80]
+	cmp	w0, w19
+	bhi	.L230
+	adrp	x1, .LANCHOR28
 	adrp	x0, .LC0
-	mov	w2, 805
-	add	x1, x1, :lo12:.LANCHOR29
+	mov	w2, 812
+	add	x1, x1, :lo12:.LANCHOR28
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L254:
-	adrp	x0, .LANCHOR30
-	add	x0, x0, :lo12:.LANCHOR30
-	lsr	w7, w19, 8
-	lsr	w8, w19, 16
-	lsr	w10, w19, 24
-	adrp	x5, .LANCHOR31
-	ldrb	w6, [x0, w21, sxtw]
-	adrp	x0, .LANCHOR13
-	and	w19, w19, 255
-	add	x5, x5, :lo12:.LANCHOR31
-	ldr	x4, [x0, #:lo12:.LANCHOR13]
-	mov	w11, 120
-	ubfiz	x0, x6, 8, 8
-	add	x4, x4, x0
-.L260:
-	mov	w0, w6
+.L230:
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
+	lsr	w23, w20, 8
+	lsr	w24, w20, 16
+	lsr	w25, w20, 24
+	adrp	x21, .LANCHOR30
+	ldrb	w22, [x0, w19, sxtw]
+	adrp	x0, .LANCHOR7
+	and	w20, w20, 255
+	add	x21, x21, :lo12:.LANCHOR30
+	ldr	x19, [x0, #:lo12:.LANCHOR7]
+	mov	w27, 120
+	ubfiz	x0, x22, 8, 8
+	add	x19, x19, x0
+.L236:
+	mov	w0, w22
 	bl	nandc_cs
-	str	w11, [x4, 2056]
-	str	w19, [x4, 2052]
-	ldrb	w0, [x5]
-	str	w7, [x4, 2052]
-	str	w8, [x4, 2052]
-	cbz	w0, .L255
-	str	w10, [x4, 2052]
-.L255:
-	mov	w0, 120
-	bl	timer_delay_ns
-	ldr	w2, [x4, 2048]
+	str	w27, [x19, 2056]
+	str	w20, [x19, 2052]
+	ldrb	w0, [x21]
+	str	w23, [x19, 2052]
+	str	w24, [x19, 2052]
+	cbz	w0, .L231
+	str	w25, [x19, 2052]
+.L231:
+	mov	x0, 1
+	bl	udelay
+	ldr	w2, [x19, 2048]
 	and	w2, w2, 255
-	bl	nandc_de_cs.constprop.33
-	bics	wzr, w20, w2
-	bne	.L260
+	bl	nandc_de_cs.constprop.32
+	bics	wzr, w26, w2
+	bne	.L236
 	cmp	w2, 255
-	beq	.L260
+	beq	.L236
 	mov	w0, w2
-	ldr	x21, [sp, 32]
+	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
 	ret
 	.size	flash_wait_device_ready_raw, .-flash_wait_device_ready_raw
 	.section	.text.flash_wait_device_ready,"ax",@progbits
@@ -1189,10 +1117,10 @@ flash_wait_device_ready_raw:
 	.type	flash_wait_device_ready, %function
 flash_wait_device_ready:
 	mov	w2, w1
-	adrp	x1, .LANCHOR32
+	adrp	x1, .LANCHOR31
 	mov	w5, 24
 	mov	w4, 1
-	ldrb	w6, [x1, #:lo12:.LANCHOR32]
+	ldrb	w6, [x1, #:lo12:.LANCHOR31]
 	tst	x0, 50331648
 	sub	w5, w5, w6
 	lsl	w3, w4, w5
@@ -1203,39 +1131,39 @@ flash_wait_device_ready:
 	and	w4, w4, w5
 	and	w1, w3, w0
 	and	w4, w4, 255
-	bne	.L265
+	bne	.L241
 	adrp	x0, .LANCHOR0
 	adrp	x5, .LANCHOR1
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L266
+	cbz	w0, .L242
 	ldrb	w0, [x5, #:lo12:.LANCHOR1]
-	cbz	w0, .L265
-.L266:
+	cbz	w0, .L241
+.L242:
 	adrp	x0, .LANCHOR2
 	ldrh	w3, [x0, #:lo12:.LANCHOR2]
 	udiv	w0, w1, w3
 	mul	w0, w0, w3
 	sub	w3, w1, w0
 	ldrb	w1, [x5, #:lo12:.LANCHOR1]
-	cbz	w1, .L267
+	cbz	w1, .L243
 	add	w1, w0, w3, lsl 1
-.L265:
+.L241:
 	mov	w0, w4
 	b	flash_wait_device_ready_raw
-.L267:
+.L243:
 	adrp	x5, .LANCHOR3
 	add	x5, x5, :lo12:.LANCHOR3
 	ldrh	w3, [x5, w3, uxtw 1]
 	add	w1, w3, w0
-	b	.L265
+	b	.L241
 	.size	flash_wait_device_ready, .-flash_wait_device_ready
 	.section	.text.nandc_de_cs,"ax",@progbits
 	.align	2
 	.global	nandc_de_cs
 	.type	nandc_de_cs, %function
 nandc_de_cs:
-	adrp	x0, .LANCHOR13
-	ldr	x1, [x0, #:lo12:.LANCHOR13]
+	adrp	x0, .LANCHOR7
+	ldr	x1, [x0, #:lo12:.LANCHOR7]
 	ldr	w0, [x1]
 	and	w0, w0, -256
 	and	w0, w0, -131073
@@ -1247,194 +1175,207 @@ nandc_de_cs:
 	.global	nandc_wait_flash_ready_no_delay
 	.type	nandc_wait_flash_ready_no_delay, %function
 nandc_wait_flash_ready_no_delay:
-	mov	w2, 34464
-	stp	x29, x30, [sp, -32]!
-	movk	w2, 0x1, lsl 16
-	adrp	x3, .LANCHOR13
+	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
-.L277:
-	ldr	x0, [x3, #:lo12:.LANCHOR13]
+	stp	x19, x20, [sp, 16]
+	mov	w19, 34464
+	movk	w19, 0x1, lsl 16
+	adrp	x20, .LANCHOR7
+.L253:
+	ldr	x0, [x20, #:lo12:.LANCHOR7]
 	ldr	w0, [x0]
-	str	w0, [x29, 24]
-	ldr	w0, [x29, 24]
-	tbnz	x0, 9, .L278
-	mov	w0, 10
-	bl	timer_delay_ns
-	subs	w2, w2, #1
-	bne	.L277
+	str	w0, [x29, 40]
+	ldr	w0, [x29, 40]
+	tbnz	x0, 9, .L254
+	mov	x0, 1
+	bl	udelay
+	subs	w19, w19, #1
+	bne	.L253
 	mov	w0, -1
-.L275:
-	ldp	x29, x30, [sp], 32
+.L251:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
 	ret
-.L278:
+.L254:
 	mov	w0, 0
-	b	.L275
+	b	.L251
 	.size	nandc_wait_flash_ready_no_delay, .-nandc_wait_flash_ready_no_delay
 	.section	.text.zftl_flash_enter_slc_mode,"ax",@progbits
 	.align	2
 	.global	zftl_flash_enter_slc_mode
 	.type	zftl_flash_enter_slc_mode, %function
 zftl_flash_enter_slc_mode:
-	and	x4, x0, 255
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	x19, x0, 255
 	adrp	x0, .LANCHOR0
+	stp	x21, x22, [sp, 32]
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L300
-	adrp	x1, .LANCHOR13
+	cbz	w0, .L257
+	adrp	x1, .LANCHOR7
 	cmp	w0, 1
-	ldr	x5, [x1, #:lo12:.LANCHOR13]
-	bne	.L284
-	adrp	x0, .LANCHOR33+29
-	ldrb	w0, [x0, #:lo12:.LANCHOR33+29]
-	cbz	w0, .L300
-	add	x4, x4, 8
-	add	x4, x5, x4, lsl 8
-	str	w0, [x4, 8]
-	ret
-.L284:
-	stp	x29, x30, [sp, -16]!
+	ldr	x20, [x1, #:lo12:.LANCHOR7]
+	bne	.L260
+	adrp	x0, .LANCHOR32+29
+	ldrb	w0, [x0, #:lo12:.LANCHOR32+29]
+	cbz	w0, .L257
+.L276:
+	add	x19, x19, 8
+	add	x19, x20, x19, lsl 8
+	str	w0, [x19, 8]
+.L257:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
+.L260:
 	cmp	w0, 2
-	add	x29, sp, 0
-	bne	.L286
-	adrp	x0, .LANCHOR34
-	add	x0, x0, :lo12:.LANCHOR34
-	ldrb	w1, [x0, x4]
-	cbz	w1, .L281
-	adrp	x6, .LANCHOR33
-	add	x6, x6, :lo12:.LANCHOR33
-	strb	wzr, [x0, x4]
-	ldrb	w0, [x6, 29]
-	cbz	w0, .L281
+	bne	.L262
+	adrp	x0, .LANCHOR33
+	add	x0, x0, :lo12:.LANCHOR33
+	ldrb	w1, [x0, x19]
+	cbz	w1, .L257
+	adrp	x21, .LANCHOR32
+	add	x21, x21, :lo12:.LANCHOR32
+	strb	wzr, [x0, x19]
+	ldrb	w0, [x21, 29]
+	cbz	w0, .L257
 	bl	nandc_wait_flash_ready_no_delay
-	add	x4, x4, 8
-	add	x4, x5, x4, lsl 8
-	ldrb	w0, [x6, 29]
-	str	w0, [x4, 8]
-.L281:
-	ldp	x29, x30, [sp], 16
-	ret
-.L286:
+	ldrb	w0, [x21, 29]
+	b	.L276
+.L262:
 	cmp	w0, 3
-	bne	.L281
-	adrp	x6, .LANCHOR34
-	sxtw	x7, w4
-	add	x6, x6, :lo12:.LANCHOR34
-	ldrb	w0, [x6, x7]
-	cbz	w0, .L281
+	bne	.L257
+	adrp	x21, .LANCHOR33
+	sxtw	x22, w19
+	add	x21, x21, :lo12:.LANCHOR33
+	ldrb	w0, [x21, x22]
+	cbz	w0, .L257
+	ubfiz	x19, x19, 8, 8
 	bl	nandc_wait_flash_ready_no_delay
-	ubfiz	x4, x4, 8, 8
-	add	x4, x5, x4
+	add	x19, x20, x19
 	mov	w0, 239
-	strb	wzr, [x6, x7]
-	str	w0, [x4, 2056]
+	strb	wzr, [x21, x22]
+	str	w0, [x19, 2056]
 	mov	w0, 145
-	str	w0, [x4, 2052]
-	mov	w0, 100
-	bl	timer_delay_ns
-	str	wzr, [x4, 2048]
+	str	w0, [x19, 2052]
+	mov	x0, 1
+	bl	udelay
+	str	wzr, [x19, 2048]
 	mov	w0, 1
-	str	w0, [x4, 2048]
-	str	wzr, [x4, 2048]
-	mov	w0, 150
-	str	wzr, [x4, 2048]
-	bl	timer_delay_ns
+	str	w0, [x19, 2048]
+	str	wzr, [x19, 2048]
+	mov	x0, 1
+	str	wzr, [x19, 2048]
+	bl	udelay
 	bl	nandc_wait_flash_ready_no_delay
 	mov	w0, 218
-	str	w0, [x4, 2056]
-	b	.L281
-.L300:
-	ret
+	ldp	x21, x22, [sp, 32]
+	str	w0, [x19, 2056]
+	ldp	x19, x20, [sp, 16]
+	mov	x0, 1
+	ldp	x29, x30, [sp], 48
+	b	udelay
 	.size	zftl_flash_enter_slc_mode, .-zftl_flash_enter_slc_mode
 	.section	.text.zftl_flash_exit_slc_mode,"ax",@progbits
 	.align	2
 	.global	zftl_flash_exit_slc_mode
 	.type	zftl_flash_exit_slc_mode, %function
 zftl_flash_exit_slc_mode:
-	and	x4, x0, 255
+	stp	x29, x30, [sp, -64]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	x19, x0, 255
 	adrp	x0, .LANCHOR0
+	stp	x21, x22, [sp, 32]
+	str	x23, [sp, 48]
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L323
-	adrp	x1, .LANCHOR13
+	cbz	w0, .L277
+	adrp	x1, .LANCHOR7
 	cmp	w0, 1
-	ldr	x5, [x1, #:lo12:.LANCHOR13]
-	bne	.L305
-	adrp	x0, .LANCHOR33+30
-	ldrb	w0, [x0, #:lo12:.LANCHOR33+30]
-	cbz	w0, .L323
-	add	x4, x4, 8
-	add	x4, x5, x4, lsl 8
-	str	w0, [x4, 8]
+	ldr	x20, [x1, #:lo12:.LANCHOR7]
+	bne	.L280
+	adrp	x0, .LANCHOR32+30
+	ldrb	w0, [x0, #:lo12:.LANCHOR32+30]
+	cbz	w0, .L277
+.L298:
+	add	x19, x19, 8
+	add	x19, x20, x19, lsl 8
+	str	w0, [x19, 8]
+.L277:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 64
 	ret
-.L305:
-	stp	x29, x30, [sp, -16]!
+.L280:
 	cmp	w0, 2
-	add	x29, sp, 0
-	bne	.L307
-	adrp	x0, .LANCHOR34
-	add	x0, x0, :lo12:.LANCHOR34
-	ldrb	w1, [x0, x4]
-	cbnz	w1, .L302
-	adrp	x6, .LANCHOR33
-	add	x6, x6, :lo12:.LANCHOR33
+	bne	.L282
+	adrp	x0, .LANCHOR33
+	add	x0, x0, :lo12:.LANCHOR33
+	ldrb	w1, [x0, x19]
+	cbnz	w1, .L277
+	adrp	x21, .LANCHOR32
+	add	x21, x21, :lo12:.LANCHOR32
 	mov	w2, 4
-	ldrb	w1, [x6, 12]
+	ldrb	w1, [x21, 12]
 	cmp	w1, 2
 	csel	w1, w1, w2, eq
-	strb	w1, [x0, x4]
-	ldrb	w0, [x6, 30]
-	cbz	w0, .L302
+	strb	w1, [x0, x19]
+	ldrb	w0, [x21, 30]
+	cbz	w0, .L277
 	bl	nandc_wait_flash_ready_no_delay
-	add	x4, x4, 8
-	add	x4, x5, x4, lsl 8
-	ldrb	w0, [x6, 30]
-	str	w0, [x4, 8]
-.L302:
-	ldp	x29, x30, [sp], 16
-	ret
-.L307:
+	ldrb	w0, [x21, 30]
+	b	.L298
+.L282:
 	cmp	w0, 3
-	bne	.L302
-	adrp	x6, .LANCHOR34
-	sxtw	x7, w4
-	add	x6, x6, :lo12:.LANCHOR34
-	ldrb	w0, [x6, x7]
-	cbnz	w0, .L302
+	bne	.L277
+	adrp	x21, .LANCHOR33
+	sxtw	x23, w19
+	add	x21, x21, :lo12:.LANCHOR33
+	ldrb	w0, [x21, x23]
+	cbnz	w0, .L277
+	adrp	x22, .LANCHOR32
+	add	x22, x22, :lo12:.LANCHOR32
 	bl	nandc_wait_flash_ready_no_delay
-	ubfiz	x4, x4, 8, 8
-	adrp	x2, .LANCHOR33
-	add	x2, x2, :lo12:.LANCHOR33
-	add	x4, x5, x4
+	ubfiz	x19, x19, 8, 8
+	add	x19, x20, x19
 	mov	w1, 4
-	ldrb	w0, [x2, 12]
+	ldrb	w0, [x22, 12]
 	cmp	w0, 2
 	csel	w0, w0, w1, eq
-	strb	w0, [x6, x7]
+	strb	w0, [x21, x23]
 	mov	w0, 239
-	str	w0, [x4, 2056]
+	str	w0, [x19, 2056]
 	mov	w0, 145
-	str	w0, [x4, 2052]
-	mov	w0, 100
-	bl	timer_delay_ns
-	ldrb	w0, [x2, 7]
+	str	w0, [x19, 2052]
+	mov	x0, 1
+	bl	udelay
+	ldrb	w0, [x22, 7]
 	cmp	w0, 9
 	mov	w0, 1
-	bne	.L310
-	str	w0, [x4, 2048]
-.L311:
-	str	w0, [x4, 2048]
-	mov	w0, 150
-	str	wzr, [x4, 2048]
-	str	wzr, [x4, 2048]
-	bl	timer_delay_ns
+	bne	.L285
+	str	w0, [x19, 2048]
+.L286:
+	str	w0, [x19, 2048]
+	mov	x0, 1
+	str	wzr, [x19, 2048]
+	str	wzr, [x19, 2048]
+	bl	udelay
 	bl	nandc_wait_flash_ready_no_delay
+	ldr	x23, [sp, 48]
+	ldp	x21, x22, [sp, 32]
 	mov	w0, 223
-	str	w0, [x4, 2056]
-	b	.L302
-.L310:
-	ldrb	w1, [x6, x7]
-	str	w1, [x4, 2048]
-	b	.L311
-.L323:
-	ret
+	str	w0, [x19, 2056]
+	mov	x0, 1
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 64
+	b	udelay
+.L285:
+	ldrb	w1, [x21, x23]
+	str	w1, [x19, 2048]
+	b	.L286
 	.size	zftl_flash_exit_slc_mode, .-zftl_flash_exit_slc_mode
 	.section	.text.flash_start_page_read,"ax",@progbits
 	.align	2
@@ -1442,235 +1383,242 @@ zftl_flash_exit_slc_mode:
 	.type	flash_start_page_read, %function
 flash_start_page_read:
 	stp	x29, x30, [sp, -64]!
-	mov	w8, 24
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	and	w20, w0, 255
-	adrp	x0, .LANCHOR32
 	stp	x21, x22, [sp, 32]
-	mov	w19, 1
-	mov	w21, w1
-	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	and	w21, w0, 255
+	adrp	x0, .LANCHOR31
+	stp	x19, x20, [sp, 16]
 	str	x23, [sp, 48]
-	sub	w22, w8, w0
-	lsl	w19, w19, w0
-	sub	w19, w19, #1
-	lsr	w0, w1, w22
-	and	w19, w19, w0
-	adrp	x0, .LANCHOR18
-	and	w19, w19, 255
-	mov	x23, x0
-	ldrb	w1, [x0, #:lo12:.LANCHOR18]
-	cmp	w1, w19
-	bhi	.L326
-	adrp	x1, .LANCHOR35
+	mov	w19, 24
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	mov	w20, 1
+	mov	w22, w1
+	sub	w23, w19, w0
+	lsl	w20, w20, w0
+	sub	w20, w20, #1
+	lsr	w0, w1, w23
+	and	w20, w20, w0
+	adrp	x0, .LANCHOR23
+	and	w20, w20, 255
+	mov	x19, x0
+	ldrb	w1, [x0, #:lo12:.LANCHOR23]
+	cmp	w1, w20
+	bhi	.L300
+	adrp	x1, .LANCHOR34
 	adrp	x0, .LC0
-	mov	w2, 1001
-	add	x1, x1, :lo12:.LANCHOR35
+	mov	w2, 1013
+	add	x1, x1, :lo12:.LANCHOR34
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L326:
-	ldrb	w0, [x23, #:lo12:.LANCHOR18]
-	cmp	w0, w19
-	bls	.L325
-	adrp	x0, .LANCHOR30
-	add	x0, x0, :lo12:.LANCHOR30
-	mov	w8, 1
-	lsl	w8, w8, w22
-	sub	w8, w8, #1
-	ldrb	w11, [x0, w19, sxtw]
-	adrp	x0, .LANCHOR13
-	and	w8, w8, w21
-	ubfx	x21, x21, 24, 2
-	ldr	x10, [x0, #:lo12:.LANCHOR13]
-	mov	w0, w11
+.L300:
+	ldrb	w0, [x19, #:lo12:.LANCHOR23]
+	cmp	w0, w20
+	bls	.L299
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
+	mov	w19, 1
+	ubfx	x4, x22, 24, 2
+	lsl	w19, w19, w23
+	sub	w19, w19, #1
+	and	w19, w19, w22
+	ldrb	w22, [x0, w20, sxtw]
+	adrp	x0, .LANCHOR7
+	adrp	x23, .LANCHOR21
+	ldr	x20, [x0, #:lo12:.LANCHOR7]
+	mov	w0, w22
 	bl	nandc_cs
-	adrp	x12, .LANCHOR16
-	cbnz	w21, .L328
-	mov	w0, w8
+	cbnz	w4, .L302
+	mov	w0, w19
 	bl	slc_phy_page_address_calc
-	mov	w8, w0
+	mov	w19, w0
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L329
-	mov	w0, w11
+	cbz	w0, .L303
+	mov	w0, w22
 	bl	zftl_flash_enter_slc_mode
-.L329:
-	ldr	x0, [x12, #:lo12:.LANCHOR16]
+.L303:
+	ldr	x0, [x23, #:lo12:.LANCHOR21]
 	ldrb	w1, [x0, 7]
 	cmp	w1, 1
-	bne	.L331
+	bne	.L305
 	ldrb	w0, [x0, 12]
 	cmp	w0, 2
-	bne	.L331
-	sxtw	x0, w11
+	bne	.L305
+	sxtw	x0, w22
 	mov	w1, 38
 	add	x0, x0, 8
-	add	x0, x10, x0, lsl 8
+	add	x0, x20, x0, lsl 8
 	str	w1, [x0, 8]
-.L331:
-	ubfiz	x0, x11, 8, 8
-	and	w1, w8, 255
-	add	x0, x10, x0
+.L305:
+	ubfiz	x0, x22, 8, 8
+	and	w1, w19, 255
+	add	x0, x20, x0
 	str	wzr, [x0, 2056]
 	str	wzr, [x0, 2052]
 	str	wzr, [x0, 2052]
 	str	w1, [x0, 2052]
-	lsr	w1, w8, 8
+	lsr	w1, w19, 8
 	str	w1, [x0, 2052]
-	lsr	w1, w8, 16
+	lsr	w1, w19, 16
 	str	w1, [x0, 2052]
-	adrp	x1, .LANCHOR31
-	ldrb	w1, [x1, #:lo12:.LANCHOR31]
-	cbz	w1, .L332
-	lsr	w8, w8, 24
-	str	w8, [x0, 2052]
-.L332:
-	str	w20, [x0, 2056]
-.L325:
+	adrp	x1, .LANCHOR30
+	ldrb	w1, [x1, #:lo12:.LANCHOR30]
+	cbz	w1, .L306
+	lsr	w19, w19, 24
+	str	w19, [x0, 2052]
+.L306:
+	str	w21, [x0, 2056]
+.L299:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L328:
-	ldr	x0, [x12, #:lo12:.LANCHOR16]
+.L302:
+	ldr	x0, [x23, #:lo12:.LANCHOR21]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L330
+	bne	.L304
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbnz	w0, .L304
 	adrp	x0, .LANCHOR36
 	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbnz	w0, .L330
-	adrp	x0, .LANCHOR37
-	ldrb	w0, [x0, #:lo12:.LANCHOR37]
-	cbnz	w0, .L330
-	sxtw	x0, w11
+	cbnz	w0, .L304
+	sxtw	x0, w22
 	add	x0, x0, 8
-	add	x0, x10, x0, lsl 8
-	str	w21, [x0, 8]
-	b	.L329
-.L330:
-	mov	w0, w11
+	add	x0, x20, x0, lsl 8
+	str	w4, [x0, 8]
+	b	.L303
+.L304:
+	mov	w0, w22
 	bl	zftl_flash_exit_slc_mode
-	b	.L329
+	b	.L303
 	.size	flash_start_page_read, .-flash_start_page_read
 	.section	.text.nandc_wait_flash_ready,"ax",@progbits
 	.align	2
 	.global	nandc_wait_flash_ready
 	.type	nandc_wait_flash_ready, %function
 nandc_wait_flash_ready:
-	stp	x29, x30, [sp, -32]!
-	mov	w0, 150
+	stp	x29, x30, [sp, -48]!
+	mov	x0, 1
 	add	x29, sp, 0
-	bl	timer_delay_ns
-	mov	w2, 34464
-	adrp	x3, .LANCHOR13
-	movk	w2, 0x1, lsl 16
-.L342:
-	ldr	x0, [x3, #:lo12:.LANCHOR13]
+	stp	x19, x20, [sp, 16]
+	mov	w19, 34464
+	movk	w19, 0x1, lsl 16
+	adrp	x20, .LANCHOR7
+	bl	udelay
+.L316:
+	ldr	x0, [x20, #:lo12:.LANCHOR7]
 	ldr	w0, [x0]
-	str	w0, [x29, 24]
-	ldr	w0, [x29, 24]
-	tbnz	x0, 9, .L343
-	mov	w0, 10
-	bl	timer_delay_ns
-	subs	w2, w2, #1
-	bne	.L342
+	str	w0, [x29, 40]
+	ldr	w0, [x29, 40]
+	tbnz	x0, 9, .L317
+	mov	x0, 1
+	bl	udelay
+	subs	w19, w19, #1
+	bne	.L316
 	mov	w0, -1
-.L340:
-	ldp	x29, x30, [sp], 32
+.L314:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
 	ret
-.L343:
+.L317:
 	mov	w0, 0
-	b	.L340
+	b	.L314
 	.size	nandc_wait_flash_ready, .-nandc_wait_flash_ready
 	.section	.text.sandisk_set_rr_para,"ax",@progbits
 	.align	2
 	.global	sandisk_set_rr_para
 	.type	sandisk_set_rr_para, %function
 sandisk_set_rr_para:
-	stp	x29, x30, [sp, -16]!
-	mov	x3, x0
-	and	w2, w1, 255
-	mov	w0, 239
+	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
-	str	w0, [x3, 8]
+	stp	x19, x20, [sp, 16]
+	mov	x20, x0
+	mov	w0, 239
+	and	w19, w1, 255
+	str	w0, [x20, 8]
 	mov	w0, 17
-	str	w0, [x3, 4]
-	mov	w0, 200
-	bl	timer_delay_ns
-	add	w1, w2, 1
-	adrp	x0, .LANCHOR26
-	adrp	x2, .LANCHOR22
-	add	x2, x2, :lo12:.LANCHOR22
-	ldrb	w4, [x0, #:lo12:.LANCHOR26]
-	adrp	x0, .LANCHOR24
-	ldrb	w5, [x0, #:lo12:.LANCHOR24]
+	str	w0, [x20, 4]
+	mov	x0, 1
+	bl	udelay
+	adrp	x0, .LANCHOR18
+	add	w1, w19, 1
+	adrp	x2, .LANCHOR14
+	add	x2, x2, :lo12:.LANCHOR14
+	ldrb	w3, [x0, #:lo12:.LANCHOR18]
+	adrp	x0, .LANCHOR16
+	ldrb	w4, [x0, #:lo12:.LANCHOR16]
 	mov	w0, 5
 	umull	x1, w1, w0
-	adrp	x0, .LANCHOR23
-	add	x0, x0, :lo12:.LANCHOR23
+	adrp	x0, .LANCHOR15
+	add	x0, x0, :lo12:.LANCHOR15
 	add	x2, x2, x1
 	add	x1, x0, x1
 	mov	x0, 0
-.L347:
-	cmp	w4, w0
-	bhi	.L350
-	ldp	x29, x30, [sp], 16
+.L321:
+	cmp	w3, w0
+	bhi	.L324
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
 	b	nandc_wait_flash_ready
-.L350:
-	cmp	w5, 67
-	bne	.L348
-	ldrsb	w6, [x1, x0]
-.L352:
+.L324:
+	cmp	w4, 67
+	bne	.L322
+	ldrsb	w5, [x1, x0]
+.L326:
 	add	x0, x0, 1
-	str	w6, [x3]
-	b	.L347
-.L348:
-	ldrsb	w6, [x2, x0]
-	b	.L352
+	str	w5, [x20]
+	b	.L321
+.L322:
+	ldrsb	w5, [x2, x0]
+	b	.L326
 	.size	sandisk_set_rr_para, .-sandisk_set_rr_para
 	.section	.text.toshiba_3d_set_tlc_rr_para,"ax",@progbits
 	.align	2
 	.global	toshiba_3d_set_tlc_rr_para
 	.type	toshiba_3d_set_tlc_rr_para, %function
 toshiba_3d_set_tlc_rr_para:
-	mov	x4, x0
-	stp	x29, x30, [sp, -16]!
+	stp	x29, x30, [sp, -48]!
 	and	x2, x1, 255
 	mov	x1, 7
 	add	x29, sp, 0
-	mov	w6, 213
-	str	w6, [x4, 8]
-	str	wzr, [x4, 4]
-	nop // between mem op and mult-accumulate
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	str	x21, [sp, 32]
+	mov	w21, 213
 	madd	x1, x2, x1, x1
 	mov	w0, -119
-	str	w0, [x4, 4]
-	adrp	x0, .LANCHOR38
-	add	x0, x0, :lo12:.LANCHOR38
-	add	x5, x0, x1
+	str	w21, [x19, 8]
+	str	wzr, [x19, 4]
+	str	w0, [x19, 4]
+	adrp	x0, .LANCHOR37
+	add	x0, x0, :lo12:.LANCHOR37
+	add	x20, x0, x1
 	ldrsb	w0, [x0, x1]
-	str	w0, [x4]
-	ldrsb	w0, [x5, 1]
-	str	w0, [x4]
-	ldrsb	w0, [x5, 2]
-	str	w0, [x4]
-	ldrsb	w0, [x5, 3]
-	str	w0, [x4]
+	str	w0, [x19]
+	ldrsb	w0, [x20, 1]
+	str	w0, [x19]
+	ldrsb	w0, [x20, 2]
+	str	w0, [x19]
+	ldrsb	w0, [x20, 3]
+	str	w0, [x19]
 	bl	nandc_wait_flash_ready
-	ldp	x29, x30, [sp], 16
-	str	w6, [x4, 8]
-	str	wzr, [x4, 4]
+	str	w21, [x19, 8]
+	str	wzr, [x19, 4]
 	mov	w0, -118
-	str	w0, [x4, 4]
-	ldrsb	w0, [x5, 4]
-	str	w0, [x4]
-	ldrsb	w0, [x5, 5]
-	str	w0, [x4]
-	ldrsb	w0, [x5, 6]
-	str	w0, [x4]
-	str	wzr, [x4]
+	str	w0, [x19, 4]
+	ldrsb	w0, [x20, 4]
+	ldr	x21, [sp, 32]
+	str	w0, [x19]
+	ldrsb	w0, [x20, 5]
+	str	w0, [x19]
+	ldrsb	w0, [x20, 6]
+	str	w0, [x19]
+	str	wzr, [x19]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
 	b	nandc_wait_flash_ready
 	.size	toshiba_3d_set_tlc_rr_para, .-toshiba_3d_set_tlc_rr_para
 	.section	.text.toshiba_3d_set_slc_rr_para,"ax",@progbits
@@ -1683,8 +1631,8 @@ toshiba_3d_set_slc_rr_para:
 	str	wzr, [x0, 4]
 	mov	w2, -117
 	str	w2, [x0, 4]
-	adrp	x2, .LANCHOR39
-	add	x2, x2, :lo12:.LANCHOR39
+	adrp	x2, .LANCHOR38
+	add	x2, x2, :lo12:.LANCHOR38
 	add	x1, x2, x1, uxtb
 	ldrsb	w1, [x1, 1]
 	str	w1, [x0]
@@ -1698,101 +1646,109 @@ toshiba_3d_set_slc_rr_para:
 	.global	toshiba_tlc_set_rr_para
 	.type	toshiba_tlc_set_rr_para, %function
 toshiba_tlc_set_rr_para:
-	mov	w6, 239
+	stp	x29, x30, [sp, -48]!
 	uxtw	x1, w1
-	cbz	w2, .L357
-	stp	x29, x30, [sp, -16]!
-	mov	x4, x0
+	add	x29, sp, 0
+	str	x21, [sp, 32]
+	mov	w21, 239
+	stp	x19, x20, [sp, 16]
+	cbz	w2, .L331
+	mov	x19, x0
 	mov	x2, 7
 	mov	w0, 18
-	add	x29, sp, 0
-	str	w6, [x4, 8]
 	mul	x1, x1, x2
-	str	w0, [x4, 4]
-	adrp	x0, .LANCHOR40
-	add	x0, x0, :lo12:.LANCHOR40
-	add	x5, x0, x1
+	str	w21, [x19, 8]
+	str	w0, [x19, 4]
+	adrp	x0, .LANCHOR39
+	add	x0, x0, :lo12:.LANCHOR39
+	add	x20, x0, x1
 	ldrb	w0, [x0, x1]
-	str	w0, [x4]
-	ldrb	w0, [x5, 1]
-	str	w0, [x4]
-	ldrb	w0, [x5, 2]
-	str	w0, [x4]
-	ldrb	w0, [x5, 3]
-	str	w0, [x4]
+	str	w0, [x19]
+	ldrb	w0, [x20, 1]
+	str	w0, [x19]
+	ldrb	w0, [x20, 2]
+	str	w0, [x19]
+	ldrb	w0, [x20, 3]
+	str	w0, [x19]
 	bl	nandc_wait_flash_ready
-	str	w6, [x4, 8]
+	str	w21, [x19, 8]
 	mov	w0, 19
-	str	w0, [x4, 4]
-	ldrb	w0, [x5, 4]
-	str	w0, [x4]
-	ldrb	w0, [x5, 5]
-	str	w0, [x4]
-	ldrb	w0, [x5, 6]
-	str	w0, [x4]
-	str	wzr, [x4]
-	ldp	x29, x30, [sp], 16
-.L360:
+	str	w0, [x19, 4]
+	ldrb	w0, [x20, 4]
+	str	w0, [x19]
+	ldrb	w0, [x20, 5]
+	str	w0, [x19]
+	ldrb	w0, [x20, 6]
+	str	w0, [x19]
+	str	wzr, [x19]
+.L332:
+	ldp	x19, x20, [sp, 16]
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 48
 	b	nandc_wait_flash_ready
-.L357:
-	str	w6, [x0, 8]
+.L331:
+	str	w21, [x0, 8]
 	mov	w2, 20
 	str	w2, [x0, 4]
-	adrp	x2, .LANCHOR41
-	add	x2, x2, :lo12:.LANCHOR41
+	adrp	x2, .LANCHOR40
+	add	x2, x2, :lo12:.LANCHOR40
 	ldrb	w1, [x2, x1]
 	str	w1, [x0]
 	str	wzr, [x0]
 	str	wzr, [x0]
 	str	wzr, [x0]
-	b	.L360
+	b	.L332
 	.size	toshiba_tlc_set_rr_para, .-toshiba_tlc_set_rr_para
 	.section	.text.ymtc_3d_set_tlc_rr_para,"ax",@progbits
 	.align	2
 	.global	ymtc_3d_set_tlc_rr_para
 	.type	ymtc_3d_set_tlc_rr_para, %function
 ymtc_3d_set_tlc_rr_para:
-	mov	x4, x0
-	stp	x29, x30, [sp, -16]!
+	stp	x29, x30, [sp, -48]!
 	and	x1, x1, 255
 	mov	x2, 7
 	add	x29, sp, 0
-	mov	w6, 239
-	mov	w0, 160
-	str	w6, [x4, 8]
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	str	x21, [sp, 32]
 	mul	x1, x1, x2
-	str	w0, [x4, 4]
-	adrp	x0, .LANCHOR42
-	add	x0, x0, :lo12:.LANCHOR42
-	add	x5, x0, x1
+	mov	w21, 239
+	mov	w0, 160
+	str	w21, [x19, 8]
+	str	w0, [x19, 4]
+	adrp	x0, .LANCHOR41
+	add	x0, x0, :lo12:.LANCHOR41
+	add	x20, x0, x1
 	ldrsb	w0, [x0, x1]
-	str	w0, [x4]
-	ldrsb	w0, [x5, 4]
-	str	w0, [x4]
-	str	wzr, [x4]
-	str	wzr, [x4]
+	str	w0, [x19]
+	ldrsb	w0, [x20, 4]
+	str	w0, [x19]
+	str	wzr, [x19]
+	str	wzr, [x19]
 	bl	nandc_wait_flash_ready
-	str	w6, [x4, 8]
+	str	w21, [x19, 8]
 	mov	w0, 161
-	str	w0, [x4, 4]
-	ldrsb	w0, [x5, 1]
-	str	w0, [x4]
-	ldrsb	w0, [x5, 3]
-	str	w0, [x4]
-	ldrsb	w0, [x5, 5]
-	str	w0, [x4]
-	str	wzr, [x4]
+	str	w0, [x19, 4]
+	ldrsb	w0, [x20, 1]
+	str	w0, [x19]
+	ldrsb	w0, [x20, 3]
+	str	w0, [x19]
+	ldrsb	w0, [x20, 5]
+	str	w0, [x19]
+	str	wzr, [x19]
 	bl	nandc_wait_flash_ready
-	ldp	x29, x30, [sp], 16
+	str	w21, [x19, 8]
 	mov	w0, 162
-	str	w6, [x4, 8]
-	str	w0, [x4, 4]
-	ldrsb	w0, [x5, 2]
-	str	w0, [x4]
-	ldrsb	w0, [x5, 6]
-	str	w0, [x4]
-	str	wzr, [x4]
-	str	wzr, [x4]
+	str	w0, [x19, 4]
+	ldrsb	w0, [x20, 2]
+	ldr	x21, [sp, 32]
+	str	w0, [x19]
+	ldrsb	w0, [x20, 6]
+	str	w0, [x19]
+	str	wzr, [x19]
+	str	wzr, [x19]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
 	b	nandc_wait_flash_ready
 	.size	ymtc_3d_set_tlc_rr_para, .-ymtc_3d_set_tlc_rr_para
 	.section	.text.ymtc_3d_set_slc_rr_para,"ax",@progbits
@@ -1805,8 +1761,8 @@ ymtc_3d_set_slc_rr_para:
 	mov	w2, 163
 	and	x1, x1, 255
 	str	w2, [x0, 4]
-	adrp	x2, .LANCHOR43
-	add	x2, x2, :lo12:.LANCHOR43
+	adrp	x2, .LANCHOR42
+	add	x2, x2, :lo12:.LANCHOR42
 	ldrsb	w1, [x2, x1]
 	str	w1, [x0]
 	str	wzr, [x0]
@@ -1823,125 +1779,125 @@ flash_erase_duplane_block:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	and	w22, w0, 255
-	adrp	x0, .LANCHOR18
+	adrp	x0, .LANCHOR23
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	and	w24, w1, 255
 	str	x25, [sp, 64]
 	mov	w21, w2
-	ldrb	w1, [x0, #:lo12:.LANCHOR18]
+	ldrb	w1, [x0, #:lo12:.LANCHOR23]
 	mov	w20, w3
 	mov	x19, x0
 	cmp	w1, w22
-	bhi	.L367
-	adrp	x1, .LANCHOR44
+	bhi	.L338
+	adrp	x1, .LANCHOR43
 	adrp	x0, .LC0
-	mov	w2, 688
-	add	x1, x1, :lo12:.LANCHOR44
+	mov	w2, 695
+	add	x1, x1, :lo12:.LANCHOR43
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L367:
-	ldrb	w0, [x19, #:lo12:.LANCHOR18]
+.L338:
+	ldrb	w0, [x19, #:lo12:.LANCHOR23]
 	cmp	w0, w22
-	bls	.L376
-	adrp	x0, .LANCHOR30
-	add	x0, x0, :lo12:.LANCHOR30
+	bls	.L347
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w22, [x0, w22, sxtw]
-	adrp	x0, .LANCHOR13
-	ldr	x25, [x0, #:lo12:.LANCHOR13]
-	adrp	x0, .LANCHOR14
+	adrp	x0, .LANCHOR7
+	ldr	x25, [x0, #:lo12:.LANCHOR7]
+	adrp	x0, .LANCHOR19
 	and	x19, x22, 255
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
 	add	x23, x19, 8
 	add	x23, x25, x23, lsl 8
-	tbz	x0, 4, .L369
+	tbz	x0, 4, .L340
 	adrp	x0, .LC31
 	mov	w3, w20
 	mov	w2, w21
 	mov	w1, w22
 	add	x0, x0, :lo12:.LC31
 	bl	printf
-.L369:
+.L340:
 	bl	nandc_wait_flash_ready
 	mov	w0, w22
 	bl	nandc_cs
 	mov	w0, w22
-	cbnz	w24, .L370
+	cbnz	w24, .L341
 	bl	zftl_flash_enter_slc_mode
-.L371:
-	add	x25, x25, x19, lsl 8
+.L342:
+	add	x19, x25, x19, lsl 8
 	mov	w0, 96
-	str	w0, [x25, 2056]
+	str	w0, [x19, 2056]
 	and	w0, w21, 255
-	str	w0, [x25, 2052]
+	str	w0, [x19, 2052]
 	lsr	w0, w21, 8
-	str	w0, [x25, 2052]
+	str	w0, [x19, 2052]
 	lsr	w0, w21, 16
-	str	w0, [x25, 2052]
-	adrp	x0, .LANCHOR31
-	mov	x6, x0
-	ldrb	w1, [x0, #:lo12:.LANCHOR31]
-	cbz	w1, .L372
+	str	w0, [x19, 2052]
+	adrp	x0, .LANCHOR30
+	mov	x24, x0
+	ldrb	w1, [x0, #:lo12:.LANCHOR30]
+	cbz	w1, .L343
 	lsr	w0, w21, 24
-	str	w0, [x25, 2052]
-.L372:
-	adrp	x0, .LANCHOR45
-	ldrb	w0, [x0, #:lo12:.LANCHOR45]
-	cbnz	w0, .L377
+	str	w0, [x19, 2052]
+.L343:
+	adrp	x0, .LANCHOR44
+	ldrb	w0, [x0, #:lo12:.LANCHOR44]
+	cbnz	w0, .L348
 	mov	w0, 208
-	str	w0, [x25, 2056]
-	mov	w19, 5
+	str	w0, [x19, 2056]
+	mov	w22, 5
 	bl	nandc_wait_flash_ready
 	mov	x0, x23
 	bl	flash_read_status
-	and	w5, w0, w19
-.L373:
+	and	w22, w0, w22
+.L344:
 	mov	w0, 96
-	str	w0, [x25, 2056]
+	str	w0, [x19, 2056]
 	and	w0, w20, 255
-	str	w0, [x25, 2052]
+	str	w0, [x19, 2052]
 	lsr	w0, w20, 8
-	str	w0, [x25, 2052]
+	str	w0, [x19, 2052]
 	lsr	w0, w20, 16
-	str	w0, [x25, 2052]
-	ldrb	w0, [x6, #:lo12:.LANCHOR31]
-	cbz	w0, .L374
+	str	w0, [x19, 2052]
+	ldrb	w0, [x24, #:lo12:.LANCHOR30]
+	cbz	w0, .L345
 	lsr	w20, w20, 24
-	str	w20, [x25, 2052]
-.L374:
+	str	w20, [x19, 2052]
+.L345:
 	mov	w0, 208
-	str	w0, [x25, 2056]
+	str	w0, [x19, 2056]
 	mov	w19, 5
 	bl	nandc_wait_flash_ready
 	mov	x0, x23
 	bl	flash_read_status
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.33
+	bl	nandc_de_cs.constprop.32
 	and	w19, w2, w19
-	orr	w19, w19, w5
-	cbz	w19, .L375
+	orr	w19, w19, w22
+	cbz	w19, .L346
 	adrp	x0, .LC32
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC32
 	bl	printf
-.L375:
+.L346:
 	mov	w0, w19
-.L366:
+.L337:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L370:
+.L341:
 	bl	zftl_flash_exit_slc_mode
-	b	.L371
-.L377:
-	mov	w5, 0
-	b	.L373
-.L376:
+	b	.L342
+.L348:
+	mov	w22, 0
+	b	.L344
+.L347:
 	mov	w0, -1
-	b	.L366
+	b	.L337
 	.size	flash_erase_duplane_block, .-flash_erase_duplane_block
 	.section	.text.flash_erase_block_en,"ax",@progbits
 	.align	2
@@ -1952,59 +1908,59 @@ flash_erase_block_en:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	and	w22, w0, 255
-	adrp	x0, .LANCHOR32
+	adrp	x0, .LANCHOR31
 	stp	x19, x20, [sp, 16]
 	mov	w19, 24
 	stp	x23, x24, [sp, 48]
-	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
 	and	w24, w1, 255
 	stp	x25, x26, [sp, 64]
 	mov	w23, w2
 	sub	w0, w19, w0
 	mov	w19, 1
 	lsl	w19, w19, w0
-	adrp	x0, .LANCHOR18
+	adrp	x0, .LANCHOR23
 	sub	w19, w19, #1
 	mov	x20, x0
-	ldrb	w1, [x0, #:lo12:.LANCHOR18]
+	ldrb	w1, [x0, #:lo12:.LANCHOR23]
 	and	w19, w19, w2
 	cmp	w1, w22
-	bhi	.L392
-	adrp	x1, .LANCHOR46
+	bhi	.L363
+	adrp	x1, .LANCHOR45
 	adrp	x0, .LC0
-	mov	w2, 750
-	add	x1, x1, :lo12:.LANCHOR46
+	mov	w2, 757
+	add	x1, x1, :lo12:.LANCHOR45
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L392:
-	ldrb	w0, [x20, #:lo12:.LANCHOR18]
+.L363:
+	ldrb	w0, [x20, #:lo12:.LANCHOR23]
 	cmp	w0, w22
-	bls	.L399
-	adrp	x0, .LANCHOR30
-	add	x0, x0, :lo12:.LANCHOR30
+	bls	.L370
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w21, [x0, w22, sxtw]
-	adrp	x0, .LANCHOR13
-	ldr	x26, [x0, #:lo12:.LANCHOR13]
-	adrp	x0, .LANCHOR14
+	adrp	x0, .LANCHOR7
+	ldr	x26, [x0, #:lo12:.LANCHOR7]
+	adrp	x0, .LANCHOR19
 	and	x20, x21, 255
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
 	add	x25, x20, 8
 	add	x25, x26, x25, lsl 8
-	tbz	x0, 4, .L394
+	tbz	x0, 4, .L365
 	adrp	x0, .LC33
 	mov	w3, w24
 	mov	w2, w23
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC33
 	bl	printf
-.L394:
+.L365:
 	bl	nandc_wait_flash_ready
 	mov	w0, w21
 	bl	nandc_cs
 	mov	w0, w21
-	cbnz	w24, .L395
+	cbnz	w24, .L366
 	bl	zftl_flash_enter_slc_mode
-.L396:
+.L367:
 	add	x0, x26, x20, lsl 8
 	mov	w1, 96
 	str	w1, [x0, 2056]
@@ -2014,22 +1970,22 @@ flash_erase_block_en:
 	str	w1, [x0, 2052]
 	lsr	w1, w19, 16
 	str	w1, [x0, 2052]
-	adrp	x1, .LANCHOR31
-	ldrb	w1, [x1, #:lo12:.LANCHOR31]
-	cbz	w1, .L397
+	adrp	x1, .LANCHOR30
+	ldrb	w1, [x1, #:lo12:.LANCHOR30]
+	cbz	w1, .L368
 	lsr	w19, w19, 24
 	str	w19, [x0, 2052]
-.L397:
+.L368:
 	mov	w1, 208
 	str	w1, [x0, 2056]
 	bl	nandc_wait_flash_ready
 	mov	x0, x25
 	bl	flash_read_status
 	mov	w3, w0
-	bl	nandc_de_cs.constprop.33
+	bl	nandc_de_cs.constprop.32
 	mov	w0, 5
 	ands	w3, w3, w0
-	beq	.L398
+	beq	.L369
 	adrp	x0, .LANCHOR2
 	mov	w1, w22
 	ldrh	w2, [x0, #:lo12:.LANCHOR2]
@@ -2038,21 +1994,21 @@ flash_erase_block_en:
 	udiv	w2, w23, w2
 	bl	printf
 	mov	w3, -1
-.L398:
+.L369:
 	mov	w0, w3
-.L391:
+.L362:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L395:
+.L366:
 	bl	zftl_flash_exit_slc_mode
-	b	.L396
-.L399:
+	b	.L367
+.L370:
 	mov	w0, -1
-	b	.L391
+	b	.L362
 	.size	flash_erase_block_en, .-flash_erase_block_en
 	.section	.text.flash_erase_block,"ax",@progbits
 	.align	2
@@ -2069,8 +2025,8 @@ flash_erase_block:
 	.type	flash_erase_all, %function
 flash_erase_all:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR33
-	add	x0, x0, :lo12:.LANCHOR33
+	adrp	x0, .LANCHOR32
+	add	x0, x0, :lo12:.LANCHOR32
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w19, 0
@@ -2079,17 +2035,17 @@ flash_erase_all:
 	stp	x21, x22, [sp, 32]
 	add	x23, x23, :lo12:.LANCHOR2
 	ldrh	w20, [x0, 14]
-	adrp	x22, .LANCHOR18
+	adrp	x22, .LANCHOR23
 	str	x25, [sp, 64]
-	add	x22, x22, :lo12:.LANCHOR18
-	adrp	x24, .LANCHOR30
+	add	x22, x22, :lo12:.LANCHOR23
+	adrp	x24, .LANCHOR29
 	ldrb	w1, [x0, 13]
 	mul	w20, w20, w1
 	and	w20, w20, 65535
-.L412:
+.L383:
 	ldrb	w0, [x22]
 	cmp	w0, w19
-	bhi	.L415
+	bhi	.L386
 	ldp	x19, x20, [sp, 16]
 	mov	w1, 0
 	ldp	x21, x22, [sp, 32]
@@ -2099,188 +2055,194 @@ flash_erase_all:
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	b	printf
-.L415:
-	add	x0, x24, :lo12:.LANCHOR30
+.L386:
+	add	x0, x24, :lo12:.LANCHOR29
 	mov	w21, 0
 	ldrb	w25, [x0, w19, sxtw]
-.L413:
+.L384:
 	cmp	w20, w21, uxth
-	bhi	.L414
+	bhi	.L385
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L412
-.L414:
+	b	.L383
+.L385:
 	ldrh	w1, [x23]
 	mov	w0, w25
 	mul	w1, w1, w21
 	add	w21, w21, 1
 	bl	flash_erase_block
-	b	.L413
+	b	.L384
 	.size	flash_erase_all, .-flash_erase_all
 	.section	.text.flash_start_plane_read,"ax",@progbits
 	.align	2
 	.global	flash_start_plane_read
 	.type	flash_start_plane_read, %function
 flash_start_plane_read:
-	stp	x29, x30, [sp, -48]!
-	adrp	x2, .LANCHOR32
+	stp	x29, x30, [sp, -96]!
+	adrp	x2, .LANCHOR31
 	mov	w3, 24
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	ldrb	w20, [x2, #:lo12:.LANCHOR32]
+	ldrb	w19, [x2, #:lo12:.LANCHOR31]
 	mov	w2, 1
 	stp	x21, x22, [sp, 32]
-	ubfx	x21, x0, 24, 2
-	sub	w3, w3, w20
-	lsl	w20, w2, w20
-	sub	w20, w20, #1
-	lsl	w19, w2, w3
+	ubfx	x22, x0, 24, 2
+	sub	w3, w3, w19
+	stp	x23, x24, [sp, 48]
+	lsl	w19, w2, w19
 	sub	w19, w19, #1
-	and	w22, w19, w0
+	lsl	w20, w2, w3
+	sub	w20, w20, #1
+	and	w23, w20, w0
 	lsr	w3, w0, w3
-	adrp	x0, .LANCHOR18
-	and	w20, w20, w3
-	and	w20, w20, 255
-	and	w19, w19, w1
-	ldrb	w0, [x0, #:lo12:.LANCHOR18]
-	cmp	w0, w20
-	bhi	.L418
-	adrp	x1, .LANCHOR47
+	adrp	x0, .LANCHOR23
+	and	w19, w19, w3
+	stp	x25, x26, [sp, 64]
+	and	w19, w19, 255
+	ldrb	w0, [x0, #:lo12:.LANCHOR23]
+	and	w20, w20, w1
+	stp	x27, x28, [sp, 80]
+	cmp	w0, w19
+	bhi	.L389
+	adrp	x1, .LANCHOR46
 	adrp	x0, .LC0
-	mov	w2, 1128
-	add	x1, x1, :lo12:.LANCHOR47
+	mov	w2, 1148
+	add	x1, x1, :lo12:.LANCHOR46
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L418:
-	adrp	x0, .LANCHOR30
-	add	x0, x0, :lo12:.LANCHOR30
-	ldrb	w8, [x0, w20, sxtw]
-	adrp	x0, .LANCHOR13
-	ldr	x10, [x0, #:lo12:.LANCHOR13]
-	mov	w0, w8
+.L389:
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
+	adrp	x25, .LANCHOR21
+	ldrb	w21, [x0, w19, sxtw]
+	adrp	x0, .LANCHOR7
+	ldr	x24, [x0, #:lo12:.LANCHOR7]
+	mov	w0, w21
 	bl	nandc_cs
-	adrp	x11, .LANCHOR16
-	cbnz	w21, .L419
-	mov	w0, w22
+	cbnz	w22, .L390
+	mov	w0, w23
 	bl	slc_phy_page_address_calc
-	mov	w22, w0
-	mov	w0, w19
+	mov	w23, w0
+	mov	w0, w20
 	bl	slc_phy_page_address_calc
-	mov	w19, w0
+	mov	w20, w0
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L420
-	mov	w0, w8
+	cbz	w0, .L391
+	mov	w0, w21
 	bl	zftl_flash_enter_slc_mode
-.L420:
-	adrp	x0, .LANCHOR20
-	add	x1, x0, :lo12:.LANCHOR20
-	and	x4, x8, 255
-	and	w5, w22, 255
-	lsr	w3, w22, 8
-	and	w12, w19, 255
+.L391:
+	adrp	x0, .LANCHOR25
+	add	x1, x0, :lo12:.LANCHOR25
+	and	x19, x21, 255
+	and	w4, w23, 255
+	lsr	w3, w23, 8
+	and	w28, w20, 255
 	ldrb	w2, [x1, 16]
-	lsr	w7, w19, 8
-	lsr	w6, w19, 16
+	lsr	w27, w20, 8
+	lsr	w26, w20, 16
 	cmp	w2, 1
-	lsr	w2, w22, 16
-	bne	.L422
-	add	x4, x10, x4, lsl 8
+	lsr	w2, w23, 16
+	bne	.L393
+	add	x19, x24, x19, lsl 8
 	ldrb	w1, [x1, 8]
-	str	w1, [x4, 2056]
-	adrp	x1, .LANCHOR31
-	str	wzr, [x4, 2052]
-	str	wzr, [x4, 2052]
-	str	w5, [x4, 2052]
-	mov	x5, x1
-	str	w3, [x4, 2052]
-	str	w2, [x4, 2052]
-	ldrb	w2, [x1, #:lo12:.LANCHOR31]
-	cbz	w2, .L423
-	lsr	w22, w22, 24
-	str	w22, [x4, 2052]
-.L423:
-	add	x0, x0, :lo12:.LANCHOR20
+	str	w1, [x19, 2056]
+	adrp	x1, .LANCHOR30
+	str	wzr, [x19, 2052]
+	mov	x21, x1
+	str	wzr, [x19, 2052]
+	str	w4, [x19, 2052]
+	str	w3, [x19, 2052]
+	str	w2, [x19, 2052]
+	ldrb	w2, [x1, #:lo12:.LANCHOR30]
+	cbz	w2, .L394
+	lsr	w23, w23, 24
+	str	w23, [x19, 2052]
+.L394:
+	add	x0, x0, :lo12:.LANCHOR25
 	ldrb	w0, [x0, 9]
-	str	w0, [x4, 2056]
+	str	w0, [x19, 2056]
 	bl	nandc_wait_flash_ready
-	ldr	x0, [x11, #:lo12:.LANCHOR16]
+	ldr	x0, [x25, #:lo12:.LANCHOR21]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L424
-	cbz	w21, .L424
-	str	w21, [x4, 2056]
-.L424:
-	str	wzr, [x4, 2056]
-	str	wzr, [x4, 2052]
-	str	wzr, [x4, 2052]
-	str	w12, [x4, 2052]
-	ldrb	w0, [x5, #:lo12:.LANCHOR31]
-	str	w7, [x4, 2052]
-	str	w6, [x4, 2052]
-	cbz	w0, .L445
-	lsr	w19, w19, 24
-	str	w19, [x4, 2052]
-.L445:
-	ldp	x19, x20, [sp, 16]
-	mov	w0, 48
+	bne	.L395
+	cbz	w22, .L395
+	str	w22, [x19, 2056]
+.L395:
+	str	wzr, [x19, 2056]
+	str	wzr, [x19, 2052]
+	str	wzr, [x19, 2052]
+	str	w28, [x19, 2052]
+	ldrb	w0, [x21, #:lo12:.LANCHOR30]
+	str	w27, [x19, 2052]
+	str	w26, [x19, 2052]
+	cbz	w0, .L416
+	lsr	w20, w20, 24
+	str	w20, [x19, 2052]
+.L416:
 	ldp	x21, x22, [sp, 32]
-	str	w0, [x4, 2056]
-	ldp	x29, x30, [sp], 48
-	b	nandc_de_cs.constprop.33
-.L419:
-	ldr	x0, [x11, #:lo12:.LANCHOR16]
+	mov	w0, 48
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	str	w0, [x19, 2056]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 96
+	ret
+.L390:
+	ldr	x0, [x25, #:lo12:.LANCHOR21]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L421
+	bne	.L392
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbnz	w0, .L392
 	adrp	x0, .LANCHOR36
 	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbnz	w0, .L421
-	adrp	x0, .LANCHOR37
-	ldrb	w0, [x0, #:lo12:.LANCHOR37]
-	cbnz	w0, .L421
-	sxtw	x0, w8
+	cbnz	w0, .L392
+	sxtw	x0, w21
 	add	x0, x0, 8
-	add	x0, x10, x0, lsl 8
-	str	w21, [x0, 8]
-	b	.L420
-.L421:
-	mov	w0, w8
+	add	x0, x24, x0, lsl 8
+	str	w22, [x0, 8]
+	b	.L391
+.L392:
+	mov	w0, w21
 	bl	zftl_flash_exit_slc_mode
-	b	.L420
-.L422:
-	ldr	x1, [x11, #:lo12:.LANCHOR16]
-	ldrb	w11, [x1, 7]
-	cmp	w11, 1
-	bne	.L427
-	ldrb	w11, [x1, 12]
-	cmp	w11, 2
-	bne	.L427
-	add	x8, x8, 8
-	mov	w11, 38
-	add	x8, x10, x8, lsl 8
-	str	w11, [x8, 8]
-.L427:
-	add	x8, x0, :lo12:.LANCHOR20
-	add	x4, x10, x4, lsl 8
-	ldrb	w8, [x8, 8]
-	str	w8, [x4, 2056]
-	str	w5, [x4, 2052]
-	str	w3, [x4, 2052]
-	str	w2, [x4, 2052]
+	b	.L391
+.L393:
+	ldr	x1, [x25, #:lo12:.LANCHOR21]
+	ldrb	w5, [x1, 7]
+	cmp	w5, 1
+	bne	.L398
+	ldrb	w5, [x1, 12]
+	cmp	w5, 2
+	bne	.L398
+	add	x21, x21, 8
+	mov	w5, 38
+	add	x21, x24, x21, lsl 8
+	str	w5, [x21, 8]
+.L398:
+	add	x5, x0, :lo12:.LANCHOR25
+	add	x19, x24, x19, lsl 8
+	ldrb	w5, [x5, 8]
+	str	w5, [x19, 2056]
+	str	w4, [x19, 2052]
+	str	w3, [x19, 2052]
+	str	w2, [x19, 2052]
 	ldrb	w1, [x1, 12]
 	cmp	w1, 3
-	bne	.L428
-	cbz	w21, .L428
-	str	w21, [x4, 2056]
-.L428:
-	add	x0, x0, :lo12:.LANCHOR20
+	bne	.L399
+	cbz	w22, .L399
+	str	w22, [x19, 2056]
+.L399:
+	add	x0, x0, :lo12:.LANCHOR25
 	ldrb	w0, [x0, 9]
-	str	w0, [x4, 2056]
-	str	w12, [x4, 2052]
-	str	w7, [x4, 2052]
-	str	w6, [x4, 2052]
-	b	.L445
+	str	w0, [x19, 2056]
+	str	w28, [x19, 2052]
+	str	w27, [x19, 2052]
+	str	w26, [x19, 2052]
+	b	.L416
 	.size	flash_start_plane_read, .-flash_start_plane_read
 	.section	.text.flash_set_interface_mode,"ax",@progbits
 	.align	2
@@ -2290,50 +2252,50 @@ flash_set_interface_mode:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR48
+	adrp	x22, .LANCHOR47
 	stp	x19, x20, [sp, 16]
-	adrp	x21, .LANCHOR14
+	adrp	x21, .LANCHOR19
 	stp	x23, x24, [sp, 48]
-	adrp	x20, .LANCHOR49
+	adrp	x20, .LANCHOR48
 	mov	w23, w0
-	add	x22, x22, :lo12:.LANCHOR48
-	add	x20, x20, :lo12:.LANCHOR49
-	add	x21, x21, :lo12:.LANCHOR14
+	add	x22, x22, :lo12:.LANCHOR47
+	add	x20, x20, :lo12:.LANCHOR48
+	add	x21, x21, :lo12:.LANCHOR19
 	str	x25, [sp, 64]
 	mov	x25, 0
-.L459:
-	adrp	x0, .LANCHOR13
-	ldr	x19, [x0, #:lo12:.LANCHOR13]
+.L430:
+	adrp	x0, .LANCHOR7
+	ldr	x19, [x0, #:lo12:.LANCHOR7]
 	lsl	x0, x25, 3
 	ldrb	w24, [x0, x22]
 	cmp	w24, 69
-	beq	.L447
+	beq	.L418
 	add	w0, w24, 119
 	cmp	w24, 44
 	and	w1, w0, 255
 	cset	w2, eq
 	cmp	w1, 18
-	bhi	.L460
+	bhi	.L431
 	mov	x0, 32769
 	movk	x0, 0x4, lsl 16
 	lsr	x0, x0, x1
 	mvn	x0, x0
-.L448:
+.L419:
 	and	w0, w0, 1
 	eor	w0, w0, 1
 	orr	w0, w2, w0
-	cbz	w0, .L449
-.L447:
+	cbz	w0, .L420
+.L418:
 	ldrb	w1, [x20]
 	cmp	w23, 1
-	bne	.L450
-	tbz	x1, 0, .L449
+	bne	.L421
+	tbz	x1, 0, .L420
 	ldr	w0, [x21]
-	tbz	x0, 12, .L451
+	tbz	x0, 12, .L422
 	adrp	x0, .LC36
 	add	x0, x0, :lo12:.LC36
 	bl	printf
-.L451:
+.L422:
 	add	x0, x19, x25, lsl 8
 	mov	w1, 239
 	cmp	w24, 44
@@ -2341,20 +2303,20 @@ flash_set_interface_mode:
 	mov	w1, 137
 	ccmp	w24, w1, 4, ne
 	mov	w1, 1
-	bne	.L452
-.L483:
+	bne	.L423
+.L454:
 	str	w1, [x0, 2052]
 	mov	w1, 5
-.L482:
+.L453:
 	str	w1, [x0, 2048]
-.L457:
+.L428:
 	str	wzr, [x0, 2048]
 	str	wzr, [x0, 2048]
 	str	wzr, [x0, 2048]
-.L449:
+.L420:
 	add	x25, x25, 1
 	cmp	x25, 4
-	bne	.L459
+	bne	.L430
 	bl	nandc_wait_flash_ready
 	ldr	x25, [sp, 64]
 	mov	w0, 0
@@ -2363,71 +2325,73 @@ flash_set_interface_mode:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L460:
+.L431:
 	mov	x0, 1
-	b	.L448
-.L452:
+	b	.L419
+.L423:
 	cmp	w24, 155
-	beq	.L483
+	beq	.L454
 	mov	w2, 128
 	str	w2, [x0, 2052]
-	b	.L482
-.L450:
-	tbz	x1, 2, .L449
+	b	.L453
+.L421:
+	tbz	x1, 2, .L420
 	ldr	w0, [x21]
-	tbz	x0, 12, .L455
+	tbz	x0, 12, .L426
 	adrp	x0, .LC37
 	add	x0, x0, :lo12:.LC37
 	bl	printf
-.L455:
+.L426:
 	add	x0, x19, x25, lsl 8
 	mov	w1, 239
 	cmp	w24, 44
 	str	w1, [x0, 2056]
 	mov	w1, 137
 	ccmp	w24, w1, 4, ne
-	bne	.L456
+	bne	.L427
 	mov	w1, 1
 	str	w1, [x0, 2052]
 	mov	w1, 35
-	b	.L482
-.L456:
+	b	.L453
+.L427:
 	cmp	w24, 155
-	bne	.L458
+	bne	.L429
 	mov	w1, 1
 	str	w1, [x0, 2052]
 	mov	w1, 37
-	b	.L482
-.L458:
+	b	.L453
+.L429:
 	mov	w1, 128
 	str	w1, [x0, 2052]
 	str	wzr, [x0, 2048]
-	b	.L457
+	b	.L428
 	.size	flash_set_interface_mode, .-flash_set_interface_mode
 	.section	.text.mt_auto_read_calibration_config,"ax",@progbits
 	.align	2
 	.type	mt_auto_read_calibration_config, %function
 mt_auto_read_calibration_config:
-	mov	w5, w1
-	and	w4, w0, 255
-	stp	x29, x30, [sp, -16]!
+	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w20, w1
+	and	w19, w0, 255
 	bl	nandc_wait_flash_ready
-	ubfiz	x4, x4, 8, 8
-	adrp	x0, .LANCHOR13
-	ldr	x2, [x0, #:lo12:.LANCHOR13]
+	adrp	x1, .LANCHOR7
+	ubfiz	x0, x19, 8, 8
+	ldr	x19, [x1, #:lo12:.LANCHOR7]
+	add	x19, x19, x0
 	mov	w0, 239
-	add	x2, x2, x4
-	str	w0, [x2, 2056]
+	str	w0, [x19, 2056]
 	mov	w0, 150
-	str	w0, [x2, 2052]
-	mov	w0, 200
-	bl	timer_delay_ns
-	str	w5, [x2, 2048]
-	str	wzr, [x2, 2048]
-	str	wzr, [x2, 2048]
-	str	wzr, [x2, 2048]
-	ldp	x29, x30, [sp], 16
+	str	w0, [x19, 2052]
+	mov	x0, 1
+	bl	udelay
+	str	w20, [x19, 2048]
+	str	wzr, [x19, 2048]
+	str	wzr, [x19, 2048]
+	str	wzr, [x19, 2048]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
 	ret
 	.size	mt_auto_read_calibration_config, .-mt_auto_read_calibration_config
 	.section	.text.flash_reset,"ax",@progbits
@@ -2435,10 +2399,10 @@ mt_auto_read_calibration_config:
 	.global	flash_reset
 	.type	flash_reset, %function
 flash_reset:
-	adrp	x1, .LANCHOR13
+	adrp	x1, .LANCHOR7
 	ubfiz	x0, x0, 8, 8
 	add	x0, x0, 2048
-	ldr	x1, [x1, #:lo12:.LANCHOR13]
+	ldr	x1, [x1, #:lo12:.LANCHOR7]
 	add	x1, x1, x0
 	mov	w0, 255
 	str	w0, [x1, 8]
@@ -2449,57 +2413,63 @@ flash_reset:
 	.global	flash_read_id
 	.type	flash_read_id, %function
 flash_read_id:
-	and	w10, w0, 255
-	stp	x29, x30, [sp, -16]!
-	adrp	x0, .LANCHOR13
-	mov	x8, x1
+	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
-	ldr	x4, [x0, #:lo12:.LANCHOR13]
-	mov	w0, w10
+	str	x21, [sp, 32]
+	and	w21, w0, 255
+	adrp	x0, .LANCHOR7
+	stp	x19, x20, [sp, 16]
+	mov	x19, x1
+	ldr	x20, [x0, #:lo12:.LANCHOR7]
+	mov	w0, w21
 	bl	flash_reset
-	mov	w0, w10
+	mov	w0, w21
 	bl	nandc_cs
-	ubfiz	x2, x10, 8, 8
-	add	x2, x4, x2
+	ubfiz	x0, x21, 8, 8
+	add	x20, x20, x0
 	mov	w0, 144
-	str	w0, [x2, 2056]
-	mov	w0, 200
-	str	wzr, [x2, 2052]
-	bl	timer_delay_ns
-	ldr	w0, [x2, 2048]
-	strb	w0, [x8]
-	ldr	w0, [x2, 2048]
-	strb	w0, [x8, 1]
-	ldr	w0, [x2, 2048]
-	strb	w0, [x8, 2]
-	ldr	w0, [x2, 2048]
-	strb	w0, [x8, 3]
-	ldr	w0, [x2, 2048]
-	strb	w0, [x8, 4]
-	ldr	w0, [x2, 2048]
-	strb	w0, [x8, 5]
-	ldr	w0, [x2, 2048]
-	strb	w0, [x8, 6]
-	ldr	w0, [x2, 2048]
-	strb	w0, [x8, 7]
-	bl	nandc_de_cs.constprop.33
-	ldrb	w2, [x8]
+	str	w0, [x20, 2056]
+	mov	x0, 1
+	str	wzr, [x20, 2052]
+	bl	udelay
+	ldr	w0, [x20, 2048]
+	strb	w0, [x19]
+	ldr	w0, [x20, 2048]
+	strb	w0, [x19, 1]
+	ldr	w0, [x20, 2048]
+	strb	w0, [x19, 2]
+	ldr	w0, [x20, 2048]
+	strb	w0, [x19, 3]
+	ldr	w0, [x20, 2048]
+	strb	w0, [x19, 4]
+	ldr	w0, [x20, 2048]
+	strb	w0, [x19, 5]
+	ldr	w0, [x20, 2048]
+	strb	w0, [x19, 6]
+	ldr	w0, [x20, 2048]
+	strb	w0, [x19, 7]
+	bl	nandc_de_cs.constprop.32
+	ldrb	w2, [x19]
 	sub	w0, w2, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bhi	.L487
-	ldrb	w7, [x8, 5]
-	add	w1, w10, 1
-	ldrb	w6, [x8, 4]
+	bhi	.L458
+	ldrb	w7, [x19, 5]
+	add	w1, w21, 1
+	ldrb	w6, [x19, 4]
 	adrp	x0, .LC38
-	ldrb	w5, [x8, 3]
+	ldrb	w5, [x19, 3]
 	add	x0, x0, :lo12:.LC38
-	ldrb	w4, [x8, 2]
-	ldrb	w3, [x8, 1]
-	ldp	x29, x30, [sp], 16
+	ldrb	w4, [x19, 2]
+	ldrb	w3, [x19, 1]
+	ldr	x21, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
 	b	printf
-.L487:
-	ldp	x29, x30, [sp], 16
+.L458:
+	ldp	x19, x20, [sp, 16]
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 48
 	ret
 	.size	flash_read_id, .-flash_read_id
 	.section	.text.flash_read_spare,"ax",@progbits
@@ -2507,32 +2477,34 @@ flash_read_id:
 	.global	flash_read_spare
 	.type	flash_read_spare, %function
 flash_read_spare:
-	stp	x29, x30, [sp, -16]!
-	mov	x5, x2
-	adrp	x2, .LANCHOR33+9
+	stp	x29, x30, [sp, -32]!
 	ubfiz	x0, x0, 8, 8
 	add	x29, sp, 0
-	ldrb	w3, [x2, #:lo12:.LANCHOR33+9]
-	adrp	x2, .LANCHOR13
-	ldr	x4, [x2, #:lo12:.LANCHOR13]
+	stp	x19, x20, [sp, 16]
+	mov	x20, x2
+	adrp	x2, .LANCHOR32+9
+	ldrb	w3, [x2, #:lo12:.LANCHOR32+9]
+	adrp	x2, .LANCHOR7
+	ldr	x19, [x2, #:lo12:.LANCHOR7]
 	lsl	w3, w3, 9
-	add	x4, x4, x0
+	add	x19, x19, x0
 	and	w0, w1, 255
-	str	wzr, [x4, 2056]
-	str	w3, [x4, 2052]
+	str	wzr, [x19, 2056]
+	str	w3, [x19, 2052]
 	lsr	w3, w3, 8
-	str	w3, [x4, 2052]
-	str	w0, [x4, 2052]
+	str	w3, [x19, 2052]
+	str	w0, [x19, 2052]
 	lsr	w0, w1, 8
-	str	w0, [x4, 2052]
+	str	w0, [x19, 2052]
 	lsr	w1, w1, 16
-	str	w1, [x4, 2052]
+	str	w1, [x19, 2052]
 	mov	w0, 48
-	str	w0, [x4, 2056]
+	str	w0, [x19, 2056]
 	bl	nandc_wait_flash_ready
-	ldr	w0, [x4, 2048]
-	ldp	x29, x30, [sp], 16
-	strb	w0, [x5]
+	ldr	w0, [x19, 2048]
+	strb	w0, [x20]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
 	ret
 	.size	flash_read_spare, .-flash_read_spare
 	.section	.text.flash_read_otp_data,"ax",@progbits
@@ -2542,23 +2514,23 @@ flash_read_spare:
 flash_read_otp_data:
 	stp	x29, x30, [sp, -48]!
 	and	w4, w0, 255
-	adrp	x0, .LANCHOR13
+	adrp	x0, .LANCHOR7
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w20, w1
-	ldr	x19, [x0, #:lo12:.LANCHOR13]
+	ldr	x19, [x0, #:lo12:.LANCHOR7]
 	mov	w0, w4
-	str	x21, [sp, 32]
-	mov	x21, x2
+	stp	x21, x22, [sp, 32]
+	mov	x22, x2
 	bl	nandc_cs
 	ubfiz	x4, x4, 8, 8
 	add	x19, x19, x4
 	mov	w0, 239
-	mov	w4, 144
+	mov	w21, 144
 	str	w0, [x19, 2056]
-	mov	w0, 50
-	str	w4, [x19, 2052]
-	bl	timer_delay_ns
+	mov	x0, 1
+	str	w21, [x19, 2052]
+	bl	udelay
 	mov	w0, 1
 	str	w0, [x19, 2048]
 	str	wzr, [x19, 2048]
@@ -2567,7 +2539,7 @@ flash_read_otp_data:
 	bl	nandc_wait_flash_ready
 	mov	w0, 238
 	str	w0, [x19, 2056]
-	str	w4, [x19, 2052]
+	str	w21, [x19, 2052]
 	mov	w1, w20
 	adrp	x0, .LC39
 	add	x0, x0, :lo12:.LC39
@@ -2589,26 +2561,26 @@ flash_read_otp_data:
 	str	w0, [x19, 2056]
 	bl	nandc_wait_flash_ready
 	mov	x0, 0
-.L493:
+.L464:
 	ldr	w1, [x19, 2048]
-	strb	w1, [x21, x0]
+	strb	w1, [x22, x0]
 	add	x0, x0, 1
 	cmp	x0, 16384
-	bne	.L493
+	bne	.L464
 	mov	w0, 239
 	str	w0, [x19, 2056]
 	mov	w0, 144
 	str	w0, [x19, 2052]
-	mov	w0, 50
-	bl	timer_delay_ns
-	ldr	x21, [sp, 32]
+	mov	x0, 1
+	bl	udelay
+	ldp	x21, x22, [sp, 32]
 	str	wzr, [x19, 2048]
 	str	wzr, [x19, 2048]
 	str	wzr, [x19, 2048]
 	str	wzr, [x19, 2048]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
-	b	nandc_de_cs.constprop.33
+	b	nandc_de_cs.constprop.32
 	.size	flash_read_otp_data, .-flash_read_otp_data
 	.section	.text.sandisk_prog_test_bad_block,"ax",@progbits
 	.align	2
@@ -2616,75 +2588,79 @@ flash_read_otp_data:
 	.type	sandisk_prog_test_bad_block, %function
 sandisk_prog_test_bad_block:
 	stp	x29, x30, [sp, -48]!
-	mov	w4, w1
-	adrp	x1, .LANCHOR13
 	and	x2, x0, 255
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR33
-	ldr	x19, [x1, #:lo12:.LANCHOR13]
-	add	x1, x20, :lo12:.LANCHOR33
-	str	x21, [sp, 32]
 	mov	x0, x2
 	add	x2, x2, 8
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	mov	w22, w1
+	adrp	x1, .LANCHOR7
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR32
+	ldr	x19, [x1, #:lo12:.LANCHOR7]
+	add	x1, x20, :lo12:.LANCHOR32
 	ldrb	w1, [x1, 29]
 	add	x2, x19, x2, lsl 8
-	cbz	w1, .L497
-.L511:
+	cbz	w1, .L468
+.L483:
 	ubfiz	x0, x0, 8, 8
 	str	w1, [x2, 8]
 	add	x19, x19, x0
 	mov	w0, 128
 	str	w0, [x19, 2056]
-	and	w0, w4, 255
+	and	w0, w22, 255
 	str	wzr, [x19, 2052]
 	str	wzr, [x19, 2052]
 	str	w0, [x19, 2052]
-	lsr	w0, w4, 8
+	lsr	w0, w22, 8
 	str	w0, [x19, 2052]
-	lsr	w0, w4, 16
+	lsr	w0, w22, 16
 	str	w0, [x19, 2052]
 	mov	w0, 16
 	str	w0, [x19, 2056]
 	bl	nandc_wait_flash_ready
 	mov	w0, 112
 	str	w0, [x19, 2056]
-	mov	w0, 80
-	bl	timer_delay_ns
+	mov	x0, 1
+	bl	udelay
+	ldr	w2, [x19, 2048]
+	cmp	w2, 255
+	bne	.L470
 	ldr	w2, [x19, 2048]
+.L470:
 	mov	w0, 5
 	ands	w21, w2, w0
-	beq	.L499
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L499
+	beq	.L471
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L471
 	adrp	x0, .LC40
-	mov	w1, w4
+	mov	w1, w22
 	add	x0, x0, :lo12:.LC40
 	bl	printf
-.L499:
-	add	x20, x20, :lo12:.LANCHOR33
+.L471:
+	add	x20, x20, :lo12:.LANCHOR32
 	ldrb	w0, [x20, 30]
-	cbz	w0, .L496
+	cbz	w0, .L467
 	str	w0, [x19, 2056]
-.L496:
+.L467:
 	mov	w0, w21
-	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L497:
+.L468:
 	mov	w1, 162
-	b	.L511
+	b	.L483
 	.size	sandisk_prog_test_bad_block, .-sandisk_prog_test_bad_block
 	.section	.text.nandc_rdy_status,"ax",@progbits
 	.align	2
 	.global	nandc_rdy_status
 	.type	nandc_rdy_status, %function
 nandc_rdy_status:
-	adrp	x0, .LANCHOR13
+	adrp	x0, .LANCHOR7
 	sub	sp, sp, #16
-	ldr	x0, [x0, #:lo12:.LANCHOR13]
+	ldr	x0, [x0, #:lo12:.LANCHOR7]
 	ldr	w0, [x0]
 	str	w0, [sp, 8]
 	ldr	w0, [sp, 8]
@@ -2702,24 +2678,24 @@ nandc_bch_sel:
 	ldr	w1, [sp, 8]
 	orr	w1, w1, 1
 	str	w1, [sp, 8]
-	adrp	x1, .LANCHOR50
-	strb	w0, [x1, #:lo12:.LANCHOR50]
-	adrp	x1, .LANCHOR28
-	ldrb	w1, [x1, #:lo12:.LANCHOR28]
+	adrp	x1, .LANCHOR49
+	strb	w0, [x1, #:lo12:.LANCHOR49]
+	adrp	x1, .LANCHOR27
+	ldrb	w1, [x1, #:lo12:.LANCHOR27]
 	cmp	w1, 9
-	adrp	x1, .LANCHOR13
-	bne	.L515
-	ldr	x1, [x1, #:lo12:.LANCHOR13]
+	adrp	x1, .LANCHOR7
+	bne	.L487
+	ldr	x1, [x1, #:lo12:.LANCHOR7]
 	cmp	w0, 70
 	ldr	w2, [sp, 8]
 	str	w2, [x1, 16]
-	beq	.L521
+	beq	.L493
 	cmp	w0, 60
-	beq	.L522
+	beq	.L494
 	cmp	w0, 40
 	cset	w0, eq
 	add	w0, w0, 1
-.L516:
+.L488:
 	str	wzr, [sp]
 	ldr	w2, [sp]
 	bfi	w2, w0, 25, 3
@@ -2729,17 +2705,17 @@ nandc_bch_sel:
 	str	w0, [sp]
 	ldr	w0, [sp]
 	str	w0, [x1, 32]
-.L514:
+.L486:
 	add	sp, sp, 16
 	ret
-.L521:
+.L493:
 	mov	w0, 0
-	b	.L516
-.L522:
+	b	.L488
+.L494:
 	mov	w0, 3
-	b	.L516
-.L515:
-	ldr	x2, [x1, #:lo12:.LANCHOR13]
+	b	.L488
+.L487:
+	ldr	x2, [x1, #:lo12:.LANCHOR7]
 	mov	w3, 16
 	ldr	w1, [sp, 8]
 	cmp	w0, w3
@@ -2751,20 +2727,20 @@ nandc_bch_sel:
 	ldr	w1, [sp]
 	and	w1, w1, -262145
 	str	w1, [sp]
-	bne	.L518
-.L525:
+	bne	.L490
+.L497:
 	ldr	w0, [sp]
 	and	w0, w0, -17
-	b	.L526
-.L518:
+	b	.L498
+.L490:
 	cmp	w0, 24
-	bne	.L520
+	bne	.L492
 	ldr	w0, [sp]
 	orr	w0, w0, 16
-.L526:
+.L498:
 	str	w0, [sp]
-	b	.L519
-.L520:
+	b	.L491
+.L492:
 	ldr	w1, [sp]
 	cmp	w0, 40
 	orr	w1, w1, 262144
@@ -2772,27 +2748,27 @@ nandc_bch_sel:
 	ldr	w1, [sp]
 	orr	w1, w1, 16
 	str	w1, [sp]
-	beq	.L525
-.L519:
+	beq	.L497
+.L491:
 	ldr	w0, [sp]
 	orr	w0, w0, 1
 	str	w0, [sp]
 	ldr	w0, [sp]
 	str	w0, [x2, 12]
-	b	.L514
+	b	.L486
 	.size	nandc_bch_sel, .-nandc_bch_sel
 	.section	.text.zftl_nandc_get_irq_status,"ax",@progbits
 	.align	2
 	.global	zftl_nandc_get_irq_status
 	.type	zftl_nandc_get_irq_status, %function
 zftl_nandc_get_irq_status:
-	adrp	x1, .LANCHOR28
-	ldrb	w1, [x1, #:lo12:.LANCHOR28]
+	adrp	x1, .LANCHOR27
+	ldrb	w1, [x1, #:lo12:.LANCHOR27]
 	cmp	w1, 9
-	bne	.L528
+	bne	.L500
 	ldr	w0, [x0, 296]
 	ret
-.L528:
+.L500:
 	ldr	w0, [x0, 372]
 	ret
 	.size	zftl_nandc_get_irq_status, .-zftl_nandc_get_irq_status
@@ -2824,18 +2800,18 @@ rk_nandc_flash_xfer_completed:
 nandc_xfer_start:
 	stp	x29, x30, [sp, -80]!
 	and	w1, w1, 255
-	adrp	x4, .LANCHOR53
+	adrp	x4, .LANCHOR52
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 255
-	adrp	x0, .LANCHOR28
+	adrp	x0, .LANCHOR27
 	str	x21, [sp, 32]
 	and	w6, w20, 1
-	adrp	x21, .LANCHOR13
-	ldrb	w0, [x0, #:lo12:.LANCHOR28]
+	adrp	x21, .LANCHOR7
+	ldrb	w0, [x0, #:lo12:.LANCHOR27]
 	cmp	w0, 9
 	add	w0, w1, 1
-	bne	.L534
+	bne	.L506
 	str	wzr, [x29, 56]
 	mov	w5, 1
 	ubfx	x0, x0, 1, 6
@@ -2863,18 +2839,18 @@ nandc_xfer_start:
 	ldr	w0, [x29, 56]
 	orr	w0, w0, 128
 	str	w0, [x29, 56]
+	adrp	x0, .LANCHOR50
+	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	cbz	w0, .L507
 	adrp	x0, .LANCHOR51
 	ldrb	w0, [x0, #:lo12:.LANCHOR51]
-	cbz	w0, .L535
-	adrp	x0, .LANCHOR52
-	ldrb	w0, [x0, #:lo12:.LANCHOR52]
-	cbz	w0, .L535
+	cbz	w0, .L507
 	ldr	w0, [x29, 56]
 	orr	w0, w0, 512
 	str	w0, [x29, 56]
-.L535:
+.L507:
 	ldr	w0, [x29, 56]
-	add	x19, x4, :lo12:.LANCHOR53
+	add	x19, x4, :lo12:.LANCHOR52
 	add	x1, x2, 63
 	and	x1, x1, -64
 	ubfx	x0, x0, 22, 6
@@ -2892,7 +2868,7 @@ nandc_xfer_start:
 	bl	flush_dcache_range
 	mov	w0, 1
 	str	w0, [x19, 32]
-	ldr	x0, [x21, #:lo12:.LANCHOR13]
+	ldr	x0, [x21, #:lo12:.LANCHOR7]
 	mov	w2, 16
 	ldr	w1, [x19, 24]
 	cmp	w20, 0
@@ -2921,8 +2897,8 @@ nandc_xfer_start:
 	ldr	w1, [x29, 64]
 	orr	w1, w1, 1
 	str	w1, [x29, 64]
-	adrp	x1, .LANCHOR54
-	ldrh	w2, [x1, #:lo12:.LANCHOR54]
+	adrp	x1, .LANCHOR53
+	ldrh	w2, [x1, #:lo12:.LANCHOR53]
 	ldr	w1, [x29, 64]
 	bfi	w1, w2, 16, 11
 	str	w1, [x29, 64]
@@ -2935,13 +2911,13 @@ nandc_xfer_start:
 	str	w1, [x29, 56]
 	ldr	w1, [x29, 56]
 	str	w1, [x0, 16]
-.L533:
+.L505:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 80
 	ret
-.L534:
-	ldr	x5, [x21, #:lo12:.LANCHOR13]
+.L506:
+	ldr	x5, [x21, #:lo12:.LANCHOR7]
 	mov	w7, 16
 	ubfx	x0, x0, 1, 6
 	ldr	w5, [x5, 12]
@@ -2978,24 +2954,24 @@ nandc_xfer_start:
 	ldr	w5, [x29, 56]
 	bfi	w5, w0, 22, 6
 	str	w5, [x29, 56]
-	cbz	w20, .L537
-	adrp	x0, .LANCHOR50
+	cbz	w20, .L509
+	adrp	x0, .LANCHOR49
 	ubfx	x1, x1, 1, 7
-	ldr	x8, [x4, #:lo12:.LANCHOR53]
+	ldr	x8, [x4, #:lo12:.LANCHOR52]
 	add	x1, x3, x1, lsl 2
-	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	mov	w5, 64
 	cmp	w0, 25
 	mov	w0, 128
 	csel	w5, w5, w0, cc
 	mov	w0, 0
-.L539:
+.L511:
 	add	w7, w5, w0
 	cmp	x3, x1
-	bne	.L540
-.L541:
-	add	x19, x4, :lo12:.LANCHOR53
-	ldr	x0, [x4, #:lo12:.LANCHOR53]
+	bne	.L512
+.L513:
+	add	x19, x4, :lo12:.LANCHOR52
+	ldr	x0, [x4, #:lo12:.LANCHOR52]
 	add	x1, x2, 63
 	and	x1, x1, -64
 	stp	x2, x0, [x19, 8]
@@ -3017,7 +2993,7 @@ nandc_xfer_start:
 	bl	flush_dcache_range
 	mov	w0, 1
 	str	w0, [x19, 32]
-	ldr	x0, [x21, #:lo12:.LANCHOR13]
+	ldr	x0, [x21, #:lo12:.LANCHOR7]
 	mov	w2, 16
 	ldr	w1, [x19, 24]
 	cmp	w20, 0
@@ -3056,8 +3032,8 @@ nandc_xfer_start:
 	str	w1, [x29, 56]
 	ldr	w1, [x29, 56]
 	str	w1, [x0, 8]
-	b	.L533
-.L540:
+	b	.L505
+.L512:
 	ldrh	w10, [x3]
 	and	x0, x0, 4294967292
 	ldrh	w6, [x3, 2]
@@ -3065,11 +3041,11 @@ nandc_xfer_start:
 	orr	x6, x10, x6, lsl 16
 	str	w6, [x8, x0]
 	mov	w0, w7
-	b	.L539
-.L537:
-	ldr	x0, [x4, #:lo12:.LANCHOR53]
+	b	.L511
+.L509:
+	ldr	x0, [x4, #:lo12:.LANCHOR52]
 	str	w6, [x0]
-	b	.L541
+	b	.L513
 	.size	nandc_xfer_start, .-nandc_xfer_start
 	.section	.text.nandc_set_seed,"ax",@progbits
 	.align	2
@@ -3077,23 +3053,23 @@ nandc_xfer_start:
 	.type	nandc_set_seed, %function
 nandc_set_seed:
 	and	x0, x0, 127
-	adrp	x1, .LANCHOR55
-	add	x1, x1, :lo12:.LANCHOR55
+	adrp	x1, .LANCHOR54
+	add	x1, x1, :lo12:.LANCHOR54
 	ldrh	w0, [x1, x0, lsl 1]
-	adrp	x1, .LANCHOR52
-	ldrb	w2, [x1, #:lo12:.LANCHOR52]
+	adrp	x1, .LANCHOR51
+	ldrb	w2, [x1, #:lo12:.LANCHOR51]
 	orr	w1, w0, -1073741824
 	cmp	w2, 0
 	csel	w0, w1, w0, ne
-	adrp	x1, .LANCHOR28
-	ldrb	w1, [x1, #:lo12:.LANCHOR28]
+	adrp	x1, .LANCHOR27
+	ldrb	w1, [x1, #:lo12:.LANCHOR27]
 	cmp	w1, 9
-	adrp	x1, .LANCHOR13
-	ldr	x1, [x1, #:lo12:.LANCHOR13]
-	bne	.L552
+	adrp	x1, .LANCHOR7
+	ldr	x1, [x1, #:lo12:.LANCHOR7]
+	bne	.L524
 	str	w0, [x1, 520]
 	ret
-.L552:
+.L524:
 	str	w0, [x1, 336]
 	ret
 	.size	nandc_set_seed, .-nandc_set_seed
@@ -3108,40 +3084,40 @@ zftl_flash_de_init:
 	bl	nandc_wait_flash_ready
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L557
-	adrp	x0, .LANCHOR19
-	ldrb	w0, [x0, #:lo12:.LANCHOR19]
-	cbnz	w0, .L557
-	adrp	x0, .LANCHOR28
-	ldrb	w0, [x0, #:lo12:.LANCHOR28]
+	cbz	w0, .L529
+	adrp	x0, .LANCHOR24
+	ldrb	w0, [x0, #:lo12:.LANCHOR24]
+	cbnz	w0, .L529
+	adrp	x0, .LANCHOR27
+	ldrb	w0, [x0, #:lo12:.LANCHOR27]
 	cmp	w0, 9
-	beq	.L557
+	beq	.L529
 	mov	w0, 0
 	bl	zftl_flash_exit_slc_mode
-.L557:
-	adrp	x19, .LANCHOR21
+.L529:
+	adrp	x19, .LANCHOR26
 	mov	w0, 0
 	bl	hynix_reconfig_rr_para
-	ldrb	w0, [x19, #:lo12:.LANCHOR21]
-	cbz	w0, .L558
-	adrp	x0, .LANCHOR49
-	ldrb	w0, [x0, #:lo12:.LANCHOR49]
-	tbz	x0, 0, .L558
+	ldrb	w0, [x19, #:lo12:.LANCHOR26]
+	cbz	w0, .L530
+	adrp	x0, .LANCHOR48
+	ldrb	w0, [x0, #:lo12:.LANCHOR48]
+	tbz	x0, 0, .L530
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
 	bl	nandc_set_if_mode
-	strb	wzr, [x19, #:lo12:.LANCHOR21]
-.L558:
-	adrp	x3, .LANCHOR52
-	ldrb	w0, [x3, #:lo12:.LANCHOR52]
-	cbz	w0, .L559
+	strb	wzr, [x19, #:lo12:.LANCHOR26]
+.L530:
+	adrp	x3, .LANCHOR51
+	ldrb	w0, [x3, #:lo12:.LANCHOR51]
+	cbz	w0, .L531
 	mov	w0, 0
-	strb	wzr, [x3, #:lo12:.LANCHOR52]
+	strb	wzr, [x3, #:lo12:.LANCHOR51]
 	bl	nandc_set_seed
 	mov	w0, 1
-	strb	w0, [x3, #:lo12:.LANCHOR52]
-.L559:
+	strb	w0, [x3, #:lo12:.LANCHOR51]
+.L531:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -3152,8 +3128,8 @@ zftl_flash_de_init:
 	.global	nandc_randomizer_enable
 	.type	nandc_randomizer_enable, %function
 nandc_randomizer_enable:
-	adrp	x1, .LANCHOR52
-	strb	w0, [x1, #:lo12:.LANCHOR52]
+	adrp	x1, .LANCHOR51
+	strb	w0, [x1, #:lo12:.LANCHOR51]
 	ret
 	.size	nandc_randomizer_enable, .-nandc_randomizer_enable
 	.section	.text.nandc_get_chip_if,"ax",@progbits
@@ -3161,10 +3137,10 @@ nandc_randomizer_enable:
 	.global	nandc_get_chip_if
 	.type	nandc_get_chip_if, %function
 nandc_get_chip_if:
-	adrp	x1, .LANCHOR13
+	adrp	x1, .LANCHOR7
 	ubfiz	x0, x0, 8, 8
 	add	x0, x0, 2048
-	ldr	x1, [x1, #:lo12:.LANCHOR13]
+	ldr	x1, [x1, #:lo12:.LANCHOR7]
 	add	x0, x1, x0
 	ret
 	.size	nandc_get_chip_if, .-nandc_get_chip_if
@@ -3173,10 +3149,10 @@ nandc_get_chip_if:
 	.global	buf_reinit
 	.type	buf_reinit, %function
 buf_reinit:
-	adrp	x0, .LANCHOR56
-	add	x1, x0, :lo12:.LANCHOR56
+	adrp	x0, .LANCHOR55
+	add	x1, x0, :lo12:.LANCHOR55
 	mov	w2, 0
-.L579:
+.L551:
 	and	w3, w2, 255
 	strb	wzr, [x1, 2]
 	add	w4, w3, 1
@@ -3186,14 +3162,14 @@ buf_reinit:
 	str	xzr, [x1, 16]
 	cmp	w2, 32
 	add	x1, x1, 64
-	bne	.L579
-	add	x0, x0, :lo12:.LANCHOR56
+	bne	.L551
+	add	x0, x0, :lo12:.LANCHOR55
 	mov	w1, -1
 	strb	w1, [x0, 1984]
+	adrp	x0, .LANCHOR56
+	strb	wzr, [x0, #:lo12:.LANCHOR56]
 	adrp	x0, .LANCHOR57
-	strb	wzr, [x0, #:lo12:.LANCHOR57]
-	adrp	x0, .LANCHOR58
-	strb	w2, [x0, #:lo12:.LANCHOR58]
+	strb	w2, [x0, #:lo12:.LANCHOR57]
 	ret
 	.size	buf_reinit, .-buf_reinit
 	.section	.text.buf_add_tail,"ax",@progbits
@@ -3211,49 +3187,49 @@ buf_add_tail:
 	mov	x20, x1
 	ldrb	w1, [x19]
 	cmp	w1, 255
-	bne	.L587
+	bne	.L559
 	ldrb	w0, [x20, 1]
 	cmp	w0, 255
-	bne	.L583
-	adrp	x1, .LANCHOR59
+	bne	.L555
+	adrp	x1, .LANCHOR58
 	adrp	x0, .LC0
 	mov	w2, 74
-	add	x1, x1, :lo12:.LANCHOR59
+	add	x1, x1, :lo12:.LANCHOR58
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L583:
+.L555:
 	ldrb	w0, [x20, 1]
 	strb	w0, [x19]
-.L581:
+.L553:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L587:
-	adrp	x0, .LANCHOR56
-	add	x2, x0, :lo12:.LANCHOR56
+.L559:
+	adrp	x0, .LANCHOR55
+	add	x2, x0, :lo12:.LANCHOR55
 	mov	x19, x0
-.L588:
+.L560:
 	sbfiz	x0, x1, 6, 32
 	mov	w21, w1
 	ldrb	w1, [x2, x0]
 	cmp	w1, 255
-	bne	.L588
+	bne	.L560
 	ldrb	w0, [x20, 1]
 	cmp	w0, 255
-	bne	.L585
-	adrp	x1, .LANCHOR59
+	bne	.L557
+	adrp	x1, .LANCHOR58
 	adrp	x0, .LC0
 	mov	w2, 81
-	add	x1, x1, :lo12:.LANCHOR59
+	add	x1, x1, :lo12:.LANCHOR58
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L585:
-	add	x0, x19, :lo12:.LANCHOR56
+.L557:
+	add	x0, x19, :lo12:.LANCHOR55
 	sbfiz	x21, x21, 6, 32
 	ldrb	w1, [x20, 1]
 	strb	w1, [x0, x21]
-	b	.L581
+	b	.L553
 	.size	buf_add_tail, .-buf_add_tail
 	.section	.text.queue_read_cmd,"ax",@progbits
 	.align	2
@@ -3272,9 +3248,9 @@ queue_read_cmd:
 	mov	w0, -1
 	strb	w0, [x19]
 	mov	x1, x19
-	adrp	x0, .LANCHOR60
+	adrp	x0, .LANCHOR59
 	ldr	x19, [sp, 16]
-	add	x0, x0, :lo12:.LANCHOR60
+	add	x0, x0, :lo12:.LANCHOR59
 	ldp	x29, x30, [sp], 32
 	b	buf_add_tail
 	.size	queue_read_cmd, .-queue_read_cmd
@@ -3284,33 +3260,33 @@ queue_read_cmd:
 	.type	zbuf_free, %function
 zbuf_free:
 	ldrb	w1, [x0, 2]
-	adrp	x2, .LANCHOR57
+	adrp	x2, .LANCHOR56
 	and	w1, w1, 8
 	strb	w1, [x0, 2]
-	cbz	w1, .L593
+	cbz	w1, .L565
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L593
+	beq	.L565
 	stp	x29, x30, [sp, -16]!
 	mov	x1, x0
-	add	x0, x2, :lo12:.LANCHOR57
+	add	x0, x2, :lo12:.LANCHOR56
 	add	x29, sp, 0
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR58
+	adrp	x1, .LANCHOR57
 	ldp	x29, x30, [sp], 16
-	ldrb	w0, [x1, #:lo12:.LANCHOR58]
+	ldrb	w0, [x1, #:lo12:.LANCHOR57]
 	add	w0, w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR58]
+	strb	w0, [x1, #:lo12:.LANCHOR57]
 	ret
-.L593:
-	ldrb	w1, [x2, #:lo12:.LANCHOR57]
+.L565:
+	ldrb	w1, [x2, #:lo12:.LANCHOR56]
 	strb	w1, [x0]
-	adrp	x1, .LANCHOR58
+	adrp	x1, .LANCHOR57
 	ldrb	w0, [x0, 1]
-	strb	w0, [x2, #:lo12:.LANCHOR57]
-	ldrb	w0, [x1, #:lo12:.LANCHOR58]
+	strb	w0, [x2, #:lo12:.LANCHOR56]
+	ldrb	w0, [x1, #:lo12:.LANCHOR57]
 	add	w0, w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR58]
+	strb	w0, [x1, #:lo12:.LANCHOR57]
 	ret
 	.size	zbuf_free, .-zbuf_free
 	.section	.text.buf_alloc,"ax",@progbits
@@ -3321,29 +3297,29 @@ buf_alloc:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR58
+	adrp	x19, .LANCHOR57
 	and	w20, w0, 255
-	ldrb	w0, [x19, #:lo12:.LANCHOR58]
-	cbz	w0, .L606
-.L609:
-	adrp	x2, .LANCHOR57
-	adrp	x1, .LANCHOR56
-	add	x0, x1, :lo12:.LANCHOR56
-	ldrb	w3, [x2, #:lo12:.LANCHOR57]
+	ldrb	w0, [x19, #:lo12:.LANCHOR57]
+	cbz	w0, .L578
+.L581:
+	adrp	x2, .LANCHOR56
+	adrp	x1, .LANCHOR55
+	add	x0, x1, :lo12:.LANCHOR55
+	ldrb	w3, [x2, #:lo12:.LANCHOR56]
 	ubfiz	x4, x3, 6, 8
 	add	x0, x0, x4
 	mov	x4, x2
-	cbz	w20, .L607
-.L608:
-	add	x1, x1, :lo12:.LANCHOR56
+	cbz	w20, .L579
+.L580:
+	add	x1, x1, :lo12:.LANCHOR55
 	sbfiz	x3, x3, 6, 32
 	add	x2, x1, x3
 	ldrb	w5, [x1, x3]
-	strb	w5, [x4, #:lo12:.LANCHOR57]
-	ldrb	w4, [x19, #:lo12:.LANCHOR58]
+	strb	w5, [x4, #:lo12:.LANCHOR56]
+	ldrb	w4, [x19, #:lo12:.LANCHOR57]
 	strh	wzr, [x2, 50]
 	sub	w4, w4, #1
-	strb	w4, [x19, #:lo12:.LANCHOR58]
+	strb	w4, [x19, #:lo12:.LANCHOR57]
 	mov	w4, 1
 	strb	wzr, [x2, 56]
 	strb	w4, [x2, 2]
@@ -3353,27 +3329,27 @@ buf_alloc:
 	mov	w1, -1
 	str	xzr, [x2, 16]
 	str	w1, [x2, 36]
-	b	.L605
-.L606:
+	b	.L577
+.L578:
 	mov	w2, 121
-	adrp	x1, .LANCHOR61
+	adrp	x1, .LANCHOR60
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR61
+	add	x1, x1, :lo12:.LANCHOR60
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	ldrb	w0, [x19, #:lo12:.LANCHOR58]
-	cbnz	w0, .L609
-.L611:
+	ldrb	w0, [x19, #:lo12:.LANCHOR57]
+	cbnz	w0, .L581
+.L583:
 	mov	x0, 0
-.L605:
+.L577:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L607:
-	ldrb	w2, [x19, #:lo12:.LANCHOR58]
+.L579:
+	ldrb	w2, [x19, #:lo12:.LANCHOR57]
 	cmp	w2, 1
-	bne	.L608
-	b	.L611
+	bne	.L580
+	b	.L583
 	.size	buf_alloc, .-buf_alloc
 	.section	.text.buf_remove_buf,"ax",@progbits
 	.align	2
@@ -3383,30 +3359,30 @@ buf_remove_buf:
 	ldrb	w4, [x1, 1]
 	ldrb	w2, [x0]
 	cmp	w4, w2
-	bne	.L619
+	bne	.L591
 	ldrb	w1, [x1]
 	strb	w1, [x0]
-.L623:
+.L595:
 	mov	w0, 1
 	ret
-.L620:
+.L592:
 	mov	w3, w2
 	sbfiz	x2, x2, 6, 32
 	ldrb	w2, [x0, x2]
 	cmp	w4, w2
-	bne	.L621
+	bne	.L593
 	sbfiz	x3, x3, 6, 32
 	ldrb	w2, [x1]
 	strb	w2, [x0, x3]
 	mov	w0, -1
 	strb	w0, [x1]
-	b	.L623
-.L619:
-	adrp	x0, .LANCHOR56
-	add	x0, x0, :lo12:.LANCHOR56
-.L621:
+	b	.L595
+.L591:
+	adrp	x0, .LANCHOR55
+	add	x0, x0, :lo12:.LANCHOR55
+.L593:
 	cmp	w2, 255
-	bne	.L620
+	bne	.L592
 	mov	w0, 0
 	ret
 	.size	buf_remove_buf, .-buf_remove_buf
@@ -3418,32 +3394,32 @@ buf_remove_free:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR58
+	adrp	x19, .LANCHOR57
 	mov	x20, x0
-	ldrb	w0, [x19, #:lo12:.LANCHOR58]
-	cbnz	w0, .L625
-	adrp	x1, .LANCHOR62
+	ldrb	w0, [x19, #:lo12:.LANCHOR57]
+	cbnz	w0, .L597
+	adrp	x1, .LANCHOR61
 	adrp	x0, .LC0
 	mov	w2, 172
-	add	x1, x1, :lo12:.LANCHOR62
+	add	x1, x1, :lo12:.LANCHOR61
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L625:
-	ldrb	w0, [x19, #:lo12:.LANCHOR58]
-	cbz	w0, .L624
+.L597:
+	ldrb	w0, [x19, #:lo12:.LANCHOR57]
+	cbz	w0, .L596
 	mov	x1, x20
-	adrp	x0, .LANCHOR57
-	add	x0, x0, :lo12:.LANCHOR57
+	adrp	x0, .LANCHOR56
+	add	x0, x0, :lo12:.LANCHOR56
 	bl	buf_remove_buf
 	cmp	w0, 1
-	bne	.L624
-	ldrb	w0, [x19, #:lo12:.LANCHOR58]
+	bne	.L596
+	ldrb	w0, [x19, #:lo12:.LANCHOR57]
 	sub	w0, w0, #1
-	strb	w0, [x19, #:lo12:.LANCHOR58]
+	strb	w0, [x19, #:lo12:.LANCHOR57]
 	ldrb	w0, [x20, 2]
 	orr	w0, w0, 1
 	strb	w0, [x20, 2]
-.L624:
+.L596:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -3454,46 +3430,46 @@ buf_remove_free:
 	.type	dump_buf_info, %function
 dump_buf_info:
 	sub	sp, sp, #64
-	adrp	x0, .LANCHOR60
+	adrp	x0, .LANCHOR59
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
-	ldrb	w1, [x0, #:lo12:.LANCHOR60]
+	ldrb	w1, [x0, #:lo12:.LANCHOR59]
 	stp	x19, x20, [sp, 32]
 	adrp	x0, .LC41
 	str	x21, [sp, 48]
 	add	x0, x0, :lo12:.LC41
-	adrp	x19, .LANCHOR56
-	add	x19, x19, :lo12:.LANCHOR56
+	adrp	x19, .LANCHOR55
+	add	x19, x19, :lo12:.LANCHOR55
 	bl	printf
 	adrp	x20, .LC47
-	adrp	x0, .LANCHOR63
+	adrp	x0, .LANCHOR62
 	add	x20, x20, :lo12:.LC47
 	add	x21, x19, 2048
-	ldrb	w1, [x0, #:lo12:.LANCHOR63]
+	ldrb	w1, [x0, #:lo12:.LANCHOR62]
 	adrp	x0, .LC42
 	add	x0, x0, :lo12:.LC42
 	bl	printf
-	adrp	x0, .LANCHOR64
-	ldrb	w1, [x0, #:lo12:.LANCHOR64]
+	adrp	x0, .LANCHOR63
+	ldrb	w1, [x0, #:lo12:.LANCHOR63]
 	adrp	x0, .LC43
 	add	x0, x0, :lo12:.LC43
 	bl	printf
-	adrp	x0, .LANCHOR65
-	ldrb	w1, [x0, #:lo12:.LANCHOR65]
+	adrp	x0, .LANCHOR64
+	ldrb	w1, [x0, #:lo12:.LANCHOR64]
 	adrp	x0, .LC44
 	add	x0, x0, :lo12:.LC44
 	bl	printf
-	adrp	x0, .LANCHOR57
-	ldrb	w1, [x0, #:lo12:.LANCHOR57]
+	adrp	x0, .LANCHOR56
+	ldrb	w1, [x0, #:lo12:.LANCHOR56]
 	adrp	x0, .LC45
 	add	x0, x0, :lo12:.LC45
 	bl	printf
-	adrp	x0, .LANCHOR58
-	ldrb	w1, [x0, #:lo12:.LANCHOR58]
+	adrp	x0, .LANCHOR57
+	ldrb	w1, [x0, #:lo12:.LANCHOR57]
 	adrp	x0, .LC46
 	add	x0, x0, :lo12:.LC46
 	bl	printf
-.L631:
+.L603:
 	ldp	w7, w0, [x19, 36]
 	str	w0, [sp]
 	ldrb	w5, [x19, 58]
@@ -3506,7 +3482,7 @@ dump_buf_info:
 	ldr	w6, [x19, -12]
 	bl	printf
 	cmp	x19, x21
-	bne	.L631
+	bne	.L603
 	ldp	x19, x20, [sp, 32]
 	ldp	x29, x30, [sp, 16]
 	ldr	x21, [sp, 48]
@@ -3518,8 +3494,8 @@ dump_buf_info:
 	.global	flash_check_bad_block
 	.type	flash_check_bad_block, %function
 flash_check_bad_block:
-	adrp	x3, .LANCHOR33
-	add	x3, x3, :lo12:.LANCHOR33
+	adrp	x3, .LANCHOR32
+	add	x3, x3, :lo12:.LANCHOR32
 	and	w5, w0, 255
 	lsr	w4, w1, 5
 	and	w1, w1, 31
@@ -3532,8 +3508,8 @@ flash_check_bad_block:
 	asr	w2, w2, 5
 	lsl	w2, w2, 2
 	umaddl	x0, w2, w5, x0
-	adrp	x2, .LANCHOR27
-	ldr	x2, [x2, #:lo12:.LANCHOR27]
+	adrp	x2, .LANCHOR6
+	ldr	x2, [x2, #:lo12:.LANCHOR6]
 	add	x0, x0, x4, uxtw 2
 	ldr	w0, [x2, x0]
 	lsr	w0, w0, w1
@@ -3550,8 +3526,8 @@ flash_mask_bad_block:
 	add	x29, sp, 0
 	str	x21, [sp, 32]
 	and	w21, w0, 255
-	adrp	x0, .LANCHOR33
-	add	x0, x0, :lo12:.LANCHOR33
+	adrp	x0, .LANCHOR32
+	add	x0, x0, :lo12:.LANCHOR32
 	stp	x19, x20, [sp, 16]
 	mov	w20, w1
 	ldrh	w19, [x0, 14]
@@ -3571,8 +3547,8 @@ flash_mask_bad_block:
 	umaddl	x1, w1, w21, x19
 	ldr	x21, [sp, 32]
 	add	x1, x1, x0, uxtw 2
-	adrp	x0, .LANCHOR27
-	ldr	x2, [x0, #:lo12:.LANCHOR27]
+	adrp	x0, .LANCHOR6
+	ldr	x2, [x0, #:lo12:.LANCHOR6]
 	mov	w0, 1
 	lsl	w0, w0, w20
 	ldr	w20, [x2, x1]
@@ -3593,15 +3569,15 @@ ftl_gc_write_buf:
 	orr	w1, w1, 2
 	strb	w1, [x0, 2]
 	mov	x1, x0
-	adrp	x0, .LANCHOR66
-	add	x0, x0, :lo12:.LANCHOR66
+	adrp	x0, .LANCHOR65
+	add	x0, x0, :lo12:.LANCHOR65
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR67
+	adrp	x1, .LANCHOR66
 	ldp	x29, x30, [sp], 16
-	ldrb	w0, [x1, #:lo12:.LANCHOR67]
+	ldrb	w0, [x1, #:lo12:.LANCHOR66]
 	add	w0, w0, 1
 	and	w0, w0, 255
-	strb	w0, [x1, #:lo12:.LANCHOR67]
+	strb	w0, [x1, #:lo12:.LANCHOR66]
 	ret
 	.size	ftl_gc_write_buf, .-ftl_gc_write_buf
 	.section	.text.zftl_cache_flush,"ax",@progbits
@@ -3616,11 +3592,11 @@ zftl_cache_flush:
 	.global	zftl_get_density
 	.type	zftl_get_density, %function
 zftl_get_density:
-	cbnz	w0, .L641
-	adrp	x0, .LANCHOR68
-	ldr	w0, [x0, #:lo12:.LANCHOR68]
+	cbnz	w0, .L613
+	adrp	x0, .LANCHOR67
+	ldr	w0, [x0, #:lo12:.LANCHOR67]
 	ret
-.L641:
+.L613:
 	cmp	w0, 4
 	cset	w0, cc
 	lsl	w0, w0, 13
@@ -3652,8 +3628,8 @@ ftl_scan_all_data:
 	.global	FtlGetCurEraseBlock
 	.type	FtlGetCurEraseBlock, %function
 FtlGetCurEraseBlock:
-	adrp	x0, .LANCHOR69
-	ldrh	w0, [x0, #:lo12:.LANCHOR69]
+	adrp	x0, .LANCHOR68
+	ldrh	w0, [x0, #:lo12:.LANCHOR68]
 	ret
 	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
 	.section	.text.FtlGetAllBlockNum,"ax",@progbits
@@ -3661,8 +3637,8 @@ FtlGetCurEraseBlock:
 	.global	FtlGetAllBlockNum
 	.type	FtlGetAllBlockNum, %function
 FtlGetAllBlockNum:
-	adrp	x0, .LANCHOR6
-	ldrh	w0, [x0, #:lo12:.LANCHOR6]
+	adrp	x0, .LANCHOR8
+	ldrh	w0, [x0, #:lo12:.LANCHOR8]
 	ret
 	.size	FtlGetAllBlockNum, .-FtlGetAllBlockNum
 	.section	.text.FtlLowFormat,"ax",@progbits
@@ -3681,116 +3657,116 @@ gc_add_sblk:
 	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR14
+	adrp	x21, .LANCHOR19
 	stp	x19, x20, [sp, 16]
 	and	w19, w0, 65535
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	ldr	w0, [x21, #:lo12:.LANCHOR19]
 	and	w22, w1, 65535
 	stp	x23, x24, [sp, 48]
 	and	w23, w2, 65535
-	tbz	x0, 8, .L651
-	adrp	x1, .LANCHOR9
+	tbz	x0, 8, .L623
+	adrp	x1, .LANCHOR11
 	uxtw	x0, w19
 	mov	w3, w23
-	ldr	x2, [x1, #:lo12:.LANCHOR9]
-	adrp	x1, .LANCHOR7
-	ldr	x1, [x1, #:lo12:.LANCHOR7]
+	ldr	x2, [x1, #:lo12:.LANCHOR11]
+	adrp	x1, .LANCHOR9
+	ldr	x1, [x1, #:lo12:.LANCHOR9]
 	ldrh	w5, [x2, x0, lsl 1]
 	mov	w2, w22
 	add	x1, x1, x0, lsl 2
 	adrp	x0, .LC49
 	add	x0, x0, :lo12:.LC49
 	ldrb	w4, [x1, 2]
-	adrp	x1, .LANCHOR70
-	ldrh	w7, [x1, #:lo12:.LANCHOR70]
-	adrp	x1, .LANCHOR71+56
+	adrp	x1, .LANCHOR69
+	ldrh	w7, [x1, #:lo12:.LANCHOR69]
+	adrp	x1, .LANCHOR70+56
 	ubfx	x4, x4, 5, 3
-	ldrh	w6, [x1, #:lo12:.LANCHOR71+56]
+	ldrh	w6, [x1, #:lo12:.LANCHOR70+56]
 	mov	w1, w19
 	bl	printf
-.L651:
-	adrp	x0, .LANCHOR6
+.L623:
+	adrp	x0, .LANCHOR8
 	mov	x20, x0
-	ldrh	w1, [x0, #:lo12:.LANCHOR6]
+	ldrh	w1, [x0, #:lo12:.LANCHOR8]
 	cmp	w1, w19
-	bhi	.L652
-	adrp	x1, .LANCHOR72
+	bhi	.L624
+	adrp	x1, .LANCHOR71
 	adrp	x0, .LC0
 	mov	w2, 543
-	add	x1, x1, :lo12:.LANCHOR72
+	add	x1, x1, :lo12:.LANCHOR71
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L652:
-	ldrh	w0, [x20, #:lo12:.LANCHOR6]
+.L624:
+	ldrh	w0, [x20, #:lo12:.LANCHOR8]
 	cmp	w0, w19
-	bhi	.L653
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L675
+	bhi	.L625
+	ldr	w0, [x21, #:lo12:.LANCHOR19]
+	tbz	x0, 10, .L647
 	adrp	x0, .LC50
 	mov	w3, w23
 	mov	w2, w22
 	mov	w1, w19
 	add	x0, x0, :lo12:.LC50
 	bl	printf
-.L675:
+.L647:
 	mov	w0, 0
-	b	.L650
-.L653:
-	adrp	x1, .LANCHOR9
+	b	.L622
+.L625:
+	adrp	x1, .LANCHOR11
 	uxtw	x0, w19
-	ldr	x1, [x1, #:lo12:.LANCHOR9]
+	ldr	x1, [x1, #:lo12:.LANCHOR11]
 	ldrh	w3, [x1, x0, lsl 1]
-	adrp	x1, .LANCHOR7
-	ldr	x1, [x1, #:lo12:.LANCHOR7]
+	adrp	x1, .LANCHOR9
+	ldr	x1, [x1, #:lo12:.LANCHOR9]
 	add	x0, x1, x0, lsl 2
 	ldrb	w2, [x0, 2]
 	tst	w2, 224
-	bne	.L655
-	cbz	w3, .L675
+	bne	.L627
+	cbz	w3, .L647
 	mov	w2, 553
-	adrp	x1, .LANCHOR72
+	adrp	x1, .LANCHOR71
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR72
+	add	x1, x1, :lo12:.LANCHOR71
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L675
-.L655:
-	adrp	x0, .LANCHOR71
-	add	x1, x0, :lo12:.LANCHOR71
-	ldrh	w0, [x0, #:lo12:.LANCHOR71]
+	b	.L647
+.L627:
+	adrp	x0, .LANCHOR70
+	add	x1, x0, :lo12:.LANCHOR70
+	ldrh	w0, [x0, #:lo12:.LANCHOR70]
 	cmp	w0, w19
-	beq	.L675
-	adrp	x24, .LANCHOR10
-	ldr	x0, [x24, #:lo12:.LANCHOR10]
+	beq	.L647
+	adrp	x24, .LANCHOR12
+	ldr	x0, [x24, #:lo12:.LANCHOR12]
 	ldrh	w4, [x0, 48]
 	cmp	w4, w19
-	beq	.L675
+	beq	.L647
 	ldrh	w4, [x0, 16]
 	cmp	w4, w19
-	beq	.L675
+	beq	.L647
 	ldrh	w4, [x0, 80]
 	cmp	w4, w19
-	beq	.L675
+	beq	.L647
 	ldrh	w5, [x1, 56]
 	add	x1, x1, 58
 	mov	w4, 0
-.L656:
+.L628:
 	cmp	w4, w5
-	bcc	.L657
-	cbnz	w22, .L661
-	adrp	x1, .LANCHOR73
-	ldrh	w6, [x1, #:lo12:.LANCHOR73]
+	bcc	.L629
+	cbnz	w22, .L633
+	adrp	x1, .LANCHOR72
+	ldrh	w6, [x1, #:lo12:.LANCHOR72]
 	cmp	w19, w6
-	beq	.L675
-	adrp	x4, .LANCHOR74
-	add	x4, x4, :lo12:.LANCHOR74
+	beq	.L647
+	adrp	x4, .LANCHOR73
+	add	x4, x4, :lo12:.LANCHOR73
 	mov	x1, 0
-.L660:
+.L632:
 	ldrh	w7, [x1, x4]
 	cmp	w19, w7
-	bne	.L659
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L675
+	bne	.L631
+	ldr	w0, [x21, #:lo12:.LANCHOR19]
+	tbz	x0, 8, .L647
 	mov	w5, w6
 	mov	w4, w19
 	ubfx	x2, x2, 5, 3
@@ -3798,69 +3774,69 @@ gc_add_sblk:
 	adrp	x0, .LC51
 	add	x0, x0, :lo12:.LC51
 	bl	printf
-	b	.L675
-.L657:
+	b	.L647
+.L629:
 	ldrh	w6, [x1], 2
 	cmp	w6, w19
-	beq	.L675
+	beq	.L647
 	add	w4, w4, 1
-	b	.L656
-.L659:
+	b	.L628
+.L631:
 	add	x1, x1, 2
 	cmp	x1, 16
-	bne	.L660
+	bne	.L632
 	ubfiz	x20, x23, 7, 16
 	add	x20, x20, 136
 	add	x20, x0, x20
-.L662:
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L663
-	adrp	x0, .LANCHOR70
+.L634:
+	ldr	w0, [x21, #:lo12:.LANCHOR19]
+	tbz	x0, 8, .L635
+	adrp	x0, .LANCHOR69
 	mov	w4, w3
 	mov	w1, w19
 	ubfx	x3, x2, 5, 3
-	ldrh	w6, [x0, #:lo12:.LANCHOR70]
+	ldrh	w6, [x0, #:lo12:.LANCHOR69]
 	mov	w2, w22
 	adrp	x0, .LC52
 	add	x0, x0, :lo12:.LC52
 	bl	printf
-.L663:
+.L635:
 	mov	x0, x20
 	add	x1, x20, 128
 	mov	w2, 65535
-.L666:
+.L638:
 	ldrh	w3, [x0]
 	cmp	w3, w2
-	bne	.L664
+	bne	.L636
 	strh	w19, [x0]
-	cbz	w22, .L665
-	ldr	x1, [x24, #:lo12:.LANCHOR10]
+	cbz	w22, .L637
+	ldr	x1, [x24, #:lo12:.LANCHOR12]
 	ldrh	w0, [x1, 124]
 	add	w0, w0, 1
 	strh	w0, [x1, 124]
-.L685:
+.L657:
 	mov	w0, 1
-.L650:
+.L622:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L661:
+.L633:
 	add	x20, x0, 392
-	b	.L662
-.L665:
-	ldr	x0, [x24, #:lo12:.LANCHOR10]
+	b	.L634
+.L637:
+	ldr	x0, [x24, #:lo12:.LANCHOR12]
 	add	x23, x0, x23, uxth 1
 	ldrh	w0, [x23, 120]
 	add	w0, w0, 1
 	strh	w0, [x23, 120]
-	b	.L685
-.L664:
+	b	.L657
+.L636:
 	add	x0, x0, 2
 	cmp	x1, x0
-	bne	.L666
-	b	.L685
+	bne	.L638
+	b	.L657
 	.size	gc_add_sblk, .-gc_add_sblk
 	.section	.text.gc_mark_bad_ppa,"ax",@progbits
 	.align	2
@@ -3868,32 +3844,32 @@ gc_add_sblk:
 	.type	gc_mark_bad_ppa, %function
 gc_mark_bad_ppa:
 	stp	x29, x30, [sp, -64]!
-	adrp	x1, .LANCHOR75
-	adrp	x3, .LANCHOR32
+	adrp	x1, .LANCHOR74
+	adrp	x3, .LANCHOR31
 	add	x29, sp, 0
-	ldrh	w1, [x1, #:lo12:.LANCHOR75]
-	ldrb	w3, [x3, #:lo12:.LANCHOR32]
+	ldrh	w1, [x1, #:lo12:.LANCHOR74]
+	ldrb	w3, [x3, #:lo12:.LANCHOR31]
 	stp	x19, x20, [sp, 16]
 	mov	w19, 24
 	sub	w19, w19, w3
 	lsr	w2, w0, w1
 	sub	w19, w19, w1
-	adrp	x1, .LANCHOR76
+	adrp	x1, .LANCHOR75
 	str	x23, [sp, 48]
 	mov	w23, 1
-	ldrb	w1, [x1, #:lo12:.LANCHOR76]
+	ldrb	w1, [x1, #:lo12:.LANCHOR75]
 	lsl	w19, w23, w19
 	sub	w19, w19, #1
 	stp	x21, x22, [sp, 32]
 	and	w19, w19, w2
-	adrp	x20, .LANCHOR71
-	add	x21, x20, :lo12:.LANCHOR71
+	adrp	x20, .LANCHOR70
+	add	x21, x20, :lo12:.LANCHOR70
 	mov	w3, w0
 	and	w22, w2, 65535
 	adrp	x0, .LC53
 	udiv	w19, w19, w1
 	mov	w2, w22
-	ldr	w1, [x21, 2120]
+	ldr	w1, [x21, 2200]
 	add	x0, x0, :lo12:.LC53
 	and	w19, w19, 65535
 	bl	printf
@@ -3901,42 +3877,42 @@ gc_mark_bad_ppa:
 	mov	w2, 0
 	mov	w0, w19
 	bl	gc_add_sblk
-	ldr	w0, [x21, 2120]
+	ldr	w0, [x21, 2200]
 	mov	w1, 0
-.L687:
+.L659:
 	cmp	w1, w0
-	bcc	.L689
+	bcc	.L661
 	cmp	w0, 5
-	bhi	.L688
-	add	x20, x20, :lo12:.LANCHOR71
+	bhi	.L660
+	add	x20, x20, :lo12:.LANCHOR70
 	add	w1, w0, 1
-	str	w1, [x20, 2120]
+	str	w1, [x20, 2200]
 	add	x20, x20, x0, uxtw 1
-	strh	w22, [x20, 2124]
-.L688:
+	strh	w22, [x20, 2204]
+.L660:
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L689:
+.L661:
 	add	x2, x21, x1, sxtw 1
-	ldrh	w2, [x2, 2124]
+	ldrh	w2, [x2, 2204]
 	cmp	w2, w22
-	beq	.L688
+	beq	.L660
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L687
+	b	.L659
 	.size	gc_mark_bad_ppa, .-gc_mark_bad_ppa
 	.section	.text.gc_get_src_ppa_from_index,"ax",@progbits
 	.align	2
 	.global	gc_get_src_ppa_from_index
 	.type	gc_get_src_ppa_from_index, %function
 gc_get_src_ppa_from_index:
-	adrp	x1, .LANCHOR77
+	adrp	x1, .LANCHOR76
 	ubfiz	x0, x0, 2, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR77]
+	ldr	x1, [x1, #:lo12:.LANCHOR76]
 	ldr	w0, [x1, x0]
 	ret
 	.size	gc_get_src_ppa_from_index, .-gc_get_src_ppa_from_index
@@ -3948,18 +3924,18 @@ gc_write_completed:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR64
+	adrp	x22, .LANCHOR63
 	stp	x23, x24, [sp, 48]
-	add	x22, x22, :lo12:.LANCHOR64
+	add	x22, x22, :lo12:.LANCHOR63
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LANCHOR56
-	add	x25, x23, :lo12:.LANCHOR56
+	adrp	x23, .LANCHOR55
+	add	x25, x23, :lo12:.LANCHOR55
 	stp	x19, x20, [sp, 16]
 	str	x27, [sp, 80]
-.L693:
+.L665:
 	ldrb	w0, [x22]
 	cmp	w0, 255
-	bne	.L706
+	bne	.L678
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -3967,130 +3943,130 @@ gc_write_completed:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L706:
+.L678:
 	sxtw	x20, w0
-	add	x1, x23, :lo12:.LANCHOR56
+	add	x1, x23, :lo12:.LANCHOR55
 	lsl	x3, x20, 6
 	add	x2, x1, x3
 	ldrb	w0, [x1, x3]
 	ldr	w1, [x2, 52]
 	strb	w0, [x22]
 	ldrh	w24, [x2, 48]
-	cbz	w1, .L694
+	cbz	w1, .L666
 	ldr	w2, [x2, 40]
-	adrp	x0, .LANCHOR71
-	add	x0, x0, :lo12:.LANCHOR71
+	adrp	x0, .LANCHOR70
+	add	x0, x0, :lo12:.LANCHOR70
 	mov	w3, 1
-	str	w2, [x0, 2116]
-	strh	w3, [x0, 2112]
+	str	w2, [x0, 2196]
+	strh	w3, [x0, 2194]
 	adrp	x0, .LC54
 	add	x0, x0, :lo12:.LC54
 	bl	printf
-	adrp	x1, .LANCHOR78
+	adrp	x1, .LANCHOR77
 	adrp	x0, .LC0
 	mov	w2, 956
-	add	x1, x1, :lo12:.LANCHOR78
+	add	x1, x1, :lo12:.LANCHOR77
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L694:
-	adrp	x0, .LANCHOR79
+.L666:
+	adrp	x0, .LANCHOR78
 	mov	x26, x0
-	ldrb	w1, [x0, #:lo12:.LANCHOR79]
+	ldrb	w1, [x0, #:lo12:.LANCHOR78]
 	cmp	w1, 3
-	bne	.L695
-	adrp	x0, .LANCHOR36
-	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbnz	w0, .L695
-	adrp	x0, .LANCHOR10
-	adrp	x1, .LANCHOR80
-	ldr	x0, [x0, #:lo12:.LANCHOR10]
-	ldrb	w1, [x1, #:lo12:.LANCHOR80]
+	bne	.L667
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbnz	w0, .L667
+	adrp	x0, .LANCHOR12
+	adrp	x1, .LANCHOR79
+	ldr	x0, [x0, #:lo12:.LANCHOR12]
+	ldrb	w1, [x1, #:lo12:.LANCHOR79]
 	ldrb	w0, [x0, 89]
 	mov	w19, w0
 	cmp	w1, w0
-	bhi	.L707
+	bhi	.L679
 	cmp	w0, 2
 	mov	w0, 2
 	csel	w19, w19, w0, ls
-.L696:
+.L668:
 	add	w19, w19, w19, lsl 1
-.L697:
-	adrp	x1, .LANCHOR83
+.L669:
+	adrp	x1, .LANCHOR82
 	and	x21, x24, 65535
 	add	x0, x25, x20, lsl 6
 	mov	x27, x1
-	ldr	x2, [x1, #:lo12:.LANCHOR83]
+	ldr	x2, [x1, #:lo12:.LANCHOR82]
 	ldrb	w0, [x0, 1]
 	ldrb	w2, [x2, x21]
 	cmp	w2, w0
-	beq	.L698
-	adrp	x1, .LANCHOR78
+	beq	.L670
+	adrp	x1, .LANCHOR77
 	adrp	x0, .LC0
 	mov	w2, 976
-	add	x1, x1, :lo12:.LANCHOR78
+	add	x1, x1, :lo12:.LANCHOR77
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L698:
+.L670:
 	add	x0, x25, x20, lsl 6
 	ldrb	w0, [x0, 61]
 	cmp	w0, 3
-	beq	.L699
-	ldrb	w0, [x26, #:lo12:.LANCHOR79]
+	beq	.L671
+	ldrb	w0, [x26, #:lo12:.LANCHOR78]
 	cmp	w0, 3
-	bne	.L699
-	adrp	x0, .LANCHOR84
-	ldrb	w0, [x0, #:lo12:.LANCHOR84]
-	cbnz	w0, .L699
+	bne	.L671
+	adrp	x0, .LANCHOR83
+	ldrb	w0, [x0, #:lo12:.LANCHOR83]
+	cbnz	w0, .L671
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbnz	w0, .L671
 	adrp	x0, .LANCHOR36
 	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbnz	w0, .L699
-	adrp	x0, .LANCHOR37
-	ldrb	w0, [x0, #:lo12:.LANCHOR37]
-	cbnz	w0, .L699
+	cbnz	w0, .L671
+	adrp	x0, .LANCHOR80
+	ldrb	w0, [x0, #:lo12:.LANCHOR80]
+	cbz	w0, .L672
 	adrp	x0, .LANCHOR81
 	ldrb	w0, [x0, #:lo12:.LANCHOR81]
-	cbz	w0, .L700
-	adrp	x0, .LANCHOR82
-	ldrb	w0, [x0, #:lo12:.LANCHOR82]
-	cbnz	w0, .L699
-.L700:
-	ldr	x1, [x27, #:lo12:.LANCHOR83]
+	cbnz	w0, .L671
+.L672:
+	ldr	x1, [x27, #:lo12:.LANCHOR82]
 	mov	x0, 0
 	add	x21, x1, x21
-.L701:
+.L673:
 	cmp	w19, w0, uxth
-	bls	.L693
+	bls	.L665
 	ldrb	w1, [x21, x0]
 	add	x0, x0, 1
 	add	x1, x25, x1, lsl 6
 	strb	wzr, [x1, 61]
-	b	.L701
-.L707:
+	b	.L673
+.L679:
 	mov	w19, 1
-	b	.L696
-.L695:
+	b	.L668
+.L667:
+	adrp	x0, .LANCHOR80
+	ldrb	w0, [x0, #:lo12:.LANCHOR80]
+	cbz	w0, .L680
 	adrp	x0, .LANCHOR81
 	ldrb	w0, [x0, #:lo12:.LANCHOR81]
-	cbz	w0, .L708
-	adrp	x0, .LANCHOR82
-	ldrb	w0, [x0, #:lo12:.LANCHOR82]
 	cmp	w0, 0
 	cset	w19, ne
 	add	w19, w19, 1
-	b	.L697
-.L708:
+	b	.L669
+.L680:
 	mov	w19, 1
-	b	.L697
-.L699:
-	adrp	x20, .LANCHOR71
-	add	x20, x20, :lo12:.LANCHOR71
+	b	.L669
+.L671:
+	adrp	x20, .LANCHOR70
+	add	x20, x20, :lo12:.LANCHOR70
 	add	x19, x21, x19, uxth
 	strh	w24, [x20, 2108]
 	mov	w24, -1
-.L702:
+.L674:
 	cmp	x21, x19
-	beq	.L693
-	ldr	x1, [x27, #:lo12:.LANCHOR83]
+	beq	.L665
+	ldr	x1, [x27, #:lo12:.LANCHOR82]
 	ldrb	w0, [x1, x21]
 	strb	w24, [x1, x21]
 	add	x21, x21, 1
@@ -4103,56 +4079,56 @@ gc_write_completed:
 	ldrb	w0, [x20, 7]
 	sub	w0, w0, #1
 	strb	w0, [x20, 7]
-	b	.L702
+	b	.L674
 	.size	gc_write_completed, .-gc_write_completed
 	.section	.text.gc_get_src_blk,"ax",@progbits
 	.align	2
 	.global	gc_get_src_blk
 	.type	gc_get_src_blk, %function
 gc_get_src_blk:
-	adrp	x0, .LANCHOR10
-	ldr	x2, [x0, #:lo12:.LANCHOR10]
-	adrp	x0, .LANCHOR85
-	ldrb	w3, [x0, #:lo12:.LANCHOR85]
+	adrp	x0, .LANCHOR12
+	ldr	x2, [x0, #:lo12:.LANCHOR12]
+	adrp	x0, .LANCHOR84
+	ldrb	w3, [x0, #:lo12:.LANCHOR84]
 	ldrh	w0, [x2, 124]
-	cbz	w0, .L721
+	cbz	w0, .L693
 	add	x1, x2, 392
 	mov	w4, 1
-.L722:
+.L694:
 	add	x5, x1, 128
 	mov	w6, 65535
-.L726:
+.L698:
 	ldrh	w0, [x1]
 	cmp	w0, w6
-	beq	.L724
+	beq	.L696
 	mov	w5, -1
 	strh	w5, [x1]
-	cbz	w4, .L725
+	cbz	w4, .L697
 	ldrh	w1, [x2, 124]
 	sub	w1, w1, #1
 	strh	w1, [x2, 124]
 	ret
-.L721:
+.L693:
 	add	x0, x2, x3, sxtw 1
 	ldrh	w0, [x0, 120]
-	cbz	w0, .L727
+	cbz	w0, .L699
 	ubfiz	x1, x3, 7, 8
 	mov	w4, 0
 	add	x1, x1, 136
 	add	x1, x2, x1
-	b	.L722
-.L725:
+	b	.L694
+.L697:
 	add	x2, x2, x3, uxtb 1
 	ldrh	w1, [x2, 120]
 	sub	w1, w1, #1
 	strh	w1, [x2, 120]
 	ret
-.L724:
+.L696:
 	add	x1, x1, 2
 	cmp	x1, x5
-	bne	.L726
+	bne	.L698
 	ret
-.L727:
+.L699:
 	mov	w0, 65535
 	ret
 	.size	gc_get_src_blk, .-gc_get_src_blk
@@ -4164,781 +4140,897 @@ gc_free_temp_buf:
 	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR71
-	add	x0, x20, :lo12:.LANCHOR71
+	adrp	x20, .LANCHOR70
+	add	x0, x20, :lo12:.LANCHOR70
 	stp	x21, x22, [sp, 32]
 	ldrb	w1, [x0, 7]
-	cbz	w1, .L736
-	adrp	x1, .LANCHOR58
-	ldrb	w1, [x1, #:lo12:.LANCHOR58]
+	cbz	w1, .L708
+	adrp	x1, .LANCHOR57
+	ldrb	w1, [x1, #:lo12:.LANCHOR57]
 	cmp	w1, 1
-	bhi	.L736
+	bhi	.L708
 	ldrh	w19, [x0, 2108]
-	adrp	x2, .LANCHOR80
-	adrp	x0, .LANCHOR86
-	adrp	x21, .LANCHOR83
-	ldrb	w2, [x2, #:lo12:.LANCHOR80]
+	adrp	x2, .LANCHOR79
+	adrp	x0, .LANCHOR85
+	adrp	x21, .LANCHOR82
+	ldrb	w2, [x2, #:lo12:.LANCHOR79]
 	add	w1, w19, 24
-	ldrh	w0, [x0, #:lo12:.LANCHOR86]
-	ldr	x4, [x21, #:lo12:.LANCHOR83]
+	ldrh	w0, [x0, #:lo12:.LANCHOR85]
+	ldr	x4, [x21, #:lo12:.LANCHOR82]
 	mul	w0, w0, w2
 	cmp	w0, w1
 	csel	w1, w0, w1, ls
-	adrp	x0, .LANCHOR56
-	add	x0, x0, :lo12:.LANCHOR56
-.L731:
+	adrp	x0, .LANCHOR55
+	add	x0, x0, :lo12:.LANCHOR55
+.L703:
 	cmp	w19, w1
-	bcc	.L734
-.L736:
+	bcc	.L706
+.L708:
 	mov	w0, 0
-	b	.L729
-.L734:
+	b	.L701
+.L706:
 	uxtw	x22, w19
 	ldrb	w2, [x4, x22]
 	cmp	w2, 255
-	beq	.L732
+	beq	.L704
 	sbfiz	x3, x2, 6, 32
 	add	x3, x0, x3
 	ldrb	w3, [x3, 61]
-	cbnz	w3, .L732
+	cbnz	w3, .L704
 	ubfiz	x2, x2, 6, 8
 	add	x0, x0, x2
 	bl	zbuf_free
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L733
-	ldr	x0, [x21, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 8, .L705
+	ldr	x0, [x21, #:lo12:.LANCHOR82]
 	mov	w1, w19
 	ldrb	w2, [x0, x22]
 	adrp	x0, .LC55
 	add	x0, x0, :lo12:.LC55
 	bl	printf
-.L733:
-	ldr	x0, [x21, #:lo12:.LANCHOR83]
-	add	x20, x20, :lo12:.LANCHOR71
+.L705:
+	ldr	x0, [x21, #:lo12:.LANCHOR82]
+	add	x20, x20, :lo12:.LANCHOR70
 	mov	w1, -1
 	strb	w1, [x0, x22]
 	ldrb	w0, [x20, 7]
 	sub	w0, w0, #1
 	strb	w0, [x20, 7]
 	mov	w0, 1
-.L729:
+.L701:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L732:
+.L704:
 	add	w19, w19, 1
-	b	.L731
+	b	.L703
 	.size	gc_free_temp_buf, .-gc_free_temp_buf
-	.section	.text.print_gc_debug_info,"ax",@progbits
+	.section	.text.get_ink_scaned_blk,"ax",@progbits
+	.align	2
+	.global	get_ink_scaned_blk
+	.type	get_ink_scaned_blk, %function
+get_ink_scaned_blk:
+	adrp	x1, .LANCHOR70
+	add	x1, x1, :lo12:.LANCHOR70
+	ldrh	w2, [x1, 2112]
+	cbz	w2, .L718
+	sub	w2, w2, #1
+	strh	w2, [x1, 2112]
+	add	x0, x1, x2, sxtw 1
+	ldrh	w0, [x0, 2114]
+	ret
+.L718:
+	mov	w0, 65535
+	ret
+	.size	get_ink_scaned_blk, .-get_ink_scaned_blk
+	.section	.text.print_gc_debug_info,"ax",@progbits
 	.align	2
 	.global	print_gc_debug_info
 	.type	print_gc_debug_info, %function
 print_gc_debug_info:
-	adrp	x2, .LANCHOR87
-	adrp	x1, .LANCHOR71
-	add	x0, x1, :lo12:.LANCHOR71
-	ldrh	w6, [x2, #:lo12:.LANCHOR87]
-	adrp	x2, .LANCHOR58
-	ldrh	w1, [x1, #:lo12:.LANCHOR71]
+	adrp	x2, .LANCHOR86
+	adrp	x1, .LANCHOR70
+	add	x0, x1, :lo12:.LANCHOR70
+	ldrh	w6, [x2, #:lo12:.LANCHOR86]
+	adrp	x2, .LANCHOR57
+	ldrh	w1, [x1, #:lo12:.LANCHOR70]
 	ldrb	w5, [x0, 7]
-	ldrb	w4, [x2, #:lo12:.LANCHOR58]
+	ldrb	w4, [x2, #:lo12:.LANCHOR57]
 	ldrh	w3, [x0, 2106]
 	ldrh	w2, [x0, 2]
 	adrp	x0, .LC56
 	add	x0, x0, :lo12:.LC56
 	b	printf
 	.size	print_gc_debug_info, .-print_gc_debug_info
-	.section	.text.zftl_get_gc_node,"ax",@progbits
+	.section	.text._list_pop_index_node,"ax",@progbits
 	.align	2
-	.global	zftl_get_gc_node
-	.type	zftl_get_gc_node, %function
-zftl_get_gc_node:
+	.global	_list_pop_index_node
+	.type	_list_pop_index_node, %function
+_list_pop_index_node:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	ldr	x20, [x0]
+	cbz	x20, .L726
+	adrp	x3, .LANCHOR4
+	and	w1, w1, 65535
+	mov	w4, 65535
+	mov	w5, 6
+	ldr	x19, [x3, #:lo12:.LANCHOR4]
+.L722:
+	cbnz	w1, .L723
+.L725:
+	sub	x19, x20, x19
+	mov	x1, -6148914691236517206
+	asr	x19, x19, 1
+	movk	x1, 0xaaab, lsl 0
+	mul	x19, x19, x1
+	and	w19, w19, 65535
+	mov	w1, w19
+	bl	_list_remove_node
+	mov	w0, -1
+	strh	w0, [x20]
+	strh	w0, [x20, 2]
+	mov	w0, w19
+.L720:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L723:
+	ldrh	w3, [x20]
+	cmp	w3, w4
+	beq	.L725
+	sub	w1, w1, #1
+	umaddl	x20, w3, w5, x19
+	and	w1, w1, 65535
+	b	.L722
+.L726:
+	mov	w0, 65535
+	b	.L720
+	.size	_list_pop_index_node, .-_list_pop_index_node
+	.section	.text._list_get_gc_head_node,"ax",@progbits
+	.align	2
+	.global	_list_get_gc_head_node
+	.type	_list_get_gc_head_node, %function
+_list_get_gc_head_node:
+	ldr	x0, [x0]
+	and	w1, w1, 65535
+	cbz	x0, .L733
+	adrp	x2, .LANCHOR4
+	mov	w3, 65535
+	mov	w4, 6
+	ldr	x2, [x2, #:lo12:.LANCHOR4]
+.L730:
+	cbz	w1, .L731
+	ldrh	w0, [x0]
+	cmp	w0, w3
+	bne	.L732
+	ret
+.L732:
+	sub	w1, w1, #1
+	umaddl	x0, w0, w4, x2
 	and	w1, w1, 65535
+	b	.L730
+.L733:
+	mov	w0, 65535
+	ret
+.L731:
+	sub	x0, x0, x2
+	mov	x1, -6148914691236517206
+	asr	x0, x0, 1
+	movk	x1, 0xaaab, lsl 0
+	mul	x0, x0, x1
 	and	w0, w0, 65535
-	cmp	w1, 5
-	bne	.L746
-	mov	w1, w0
-	adrp	x0, .LANCHOR88
-	ldr	x0, [x0, #:lo12:.LANCHOR88]
-.L748:
-	b	_list_get_gc_head_node.isra.2
-.L746:
-	cmp	w1, 2
-	bne	.L747
-	b	zftl_get_gc_node.part.9
-.L747:
-	mov	w1, w0
-	adrp	x0, .LANCHOR89
-	ldr	x0, [x0, #:lo12:.LANCHOR89]
-	b	.L748
-	.size	zftl_get_gc_node, .-zftl_get_gc_node
+	ret
+	.size	_list_get_gc_head_node, .-_list_get_gc_head_node
 	.section	.text.gc_search_src_blk,"ax",@progbits
 	.align	2
 	.global	gc_search_src_blk
 	.type	gc_search_src_blk, %function
 gc_search_src_blk:
-	stp	x29, x30, [sp, -160]!
+	stp	x29, x30, [sp, -176]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	and	w22, w0, 255
 	and	w0, w1, 255
 	stp	x19, x20, [sp, 16]
-	str	w0, [x29, 144]
-	adrp	x0, .LANCHOR10
+	str	w0, [x29, 160]
+	adrp	x0, .LANCHOR12
 	and	w19, w2, 255
 	stp	x23, x24, [sp, 48]
-	ldr	x2, [x0, #:lo12:.LANCHOR10]
+	ldr	x2, [x0, #:lo12:.LANCHOR12]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	add	x0, x2, x22, sxtw 1
 	ldrh	w21, [x0, 120]
-	cbz	w21, .L750
+	cbz	w21, .L736
 	mov	w0, w21
-.L749:
+.L735:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 160
+	ldp	x29, x30, [sp], 176
 	ret
-.L750:
-	adrp	x0, .LANCHOR71
-	add	x1, x0, :lo12:.LANCHOR71
+.L736:
+	adrp	x0, .LANCHOR70
+	add	x1, x0, :lo12:.LANCHOR70
 	ldrh	w1, [x1, 56]
 	cmp	w1, 1
-	bhi	.L752
-	adrp	x3, .LANCHOR90
-	strh	wzr, [x3, #:lo12:.LANCHOR90]
-	adrp	x3, .LANCHOR91
-	strh	wzr, [x3, #:lo12:.LANCHOR91]
-	adrp	x3, .LANCHOR92
-	strh	wzr, [x3, #:lo12:.LANCHOR92]
-.L752:
-	cbnz	w22, .L753
-	adrp	x26, .LANCHOR91
-	adrp	x25, .LANCHOR14
-	add	x23, x26, :lo12:.LANCHOR91
-	add	x25, x25, :lo12:.LANCHOR14
+	bhi	.L738
+	adrp	x3, .LANCHOR87
+	strh	wzr, [x3, #:lo12:.LANCHOR87]
+	adrp	x3, .LANCHOR88
+	strh	wzr, [x3, #:lo12:.LANCHOR88]
+	adrp	x3, .LANCHOR89
+	strh	wzr, [x3, #:lo12:.LANCHOR89]
+.L738:
+	cbnz	w22, .L739
+	adrp	x26, .LANCHOR88
+	adrp	x25, .LANCHOR90
+	add	x23, x26, :lo12:.LANCHOR88
+	add	x25, x25, :lo12:.LANCHOR90
 	mov	w24, 0
 	mov	w20, 0
-.L754:
+	mov	w27, 65535
+.L740:
 	cmp	w19, w20
-	blt	.L759
+	blt	.L745
 	ldrh	w6, [x23]
-	mov	w1, 3
-	mov	w0, w6
-	bl	zftl_get_gc_node
+	mov	x0, x25
+	mov	w1, w6
+	bl	_list_get_gc_head_node
 	add	w2, w6, 1
 	and	w2, w2, 65535
 	strh	w2, [x23]
 	and	w1, w0, 65535
-	mov	w0, 65535
-	mov	w27, w1
-	cmp	w1, w0
-	beq	.L755
-	ldr	w0, [x25]
-	adrp	x4, .LANCHOR9
-	uxtw	x28, w1
-	tbz	x0, 8, .L756
-	ldr	x0, [x4, #:lo12:.LANCHOR9]
-	str	x4, [x29, 136]
-	ldrh	w3, [x0, x28, lsl 1]
+	mov	w28, w1
+	cmp	w1, w27
+	beq	.L741
+	adrp	x0, .LANCHOR19
+	adrp	x6, .LANCHOR11
+	uxtw	x4, w1
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 8, .L742
+	ldr	x0, [x6, #:lo12:.LANCHOR11]
+	stp	x6, x4, [x29, 144]
+	ldrh	w3, [x0, x4, lsl 1]
 	adrp	x0, .LC57
 	add	x0, x0, :lo12:.LC57
 	bl	printf
-	ldr	x4, [x29, 136]
-.L756:
-	ldr	x0, [x4, #:lo12:.LANCHOR9]
-	ldrh	w1, [x0, x28, lsl 1]
-	adrp	x0, .LANCHOR70
-	ldrh	w0, [x0, #:lo12:.LANCHOR70]
+	ldp	x6, x4, [x29, 144]
+.L742:
+	ldr	x0, [x6, #:lo12:.LANCHOR11]
+	ldrh	w1, [x0, x4, lsl 1]
+	adrp	x0, .LANCHOR69
+	ldrh	w0, [x0, #:lo12:.LANCHOR69]
 	cmp	w1, w0
-	bcs	.L757
+	bcs	.L743
 	mov	w2, 0
 	mov	w1, 0
-	mov	w0, w27
+	mov	w0, w28
 	bl	gc_add_sblk
-	cbz	w0, .L758
+	cbz	w0, .L744
 	add	w5, w24, 1
 	and	w24, w5, 65535
 	cmp	w24, w19
-	bcc	.L758
-.L759:
-	ldr	x0, [x29, 144]
-	tbz	x0, 1, .L761
-	adrp	x0, .LANCHOR93
-	ldrh	w0, [x0, #:lo12:.LANCHOR93]
+	bcc	.L744
+.L745:
+	ldr	x0, [x29, 160]
+	tbz	x0, 1, .L747
+	adrp	x0, .LANCHOR91
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	cmp	w0, 32
-	bls	.L761
-	adrp	x23, .LANCHOR94
-	adrp	x20, .LANCHOR92
-	add	x27, x23, :lo12:.LANCHOR94
-	add	x20, x20, :lo12:.LANCHOR92
+	bls	.L747
+	adrp	x23, .LANCHOR93
+	adrp	x20, .LANCHOR89
+	adrp	x26, .LANCHOR92
+	add	x20, x20, :lo12:.LANCHOR89
+	add	x26, x26, :lo12:.LANCHOR92
+	add	x27, x23, :lo12:.LANCHOR93
 	mov	w25, 0
-	mov	w26, 65535
-.L762:
+.L748:
 	cmp	w19, w25
-	blt	.L766
+	blt	.L752
 	ldrh	w6, [x20]
-	mov	w1, 5
-	mov	w0, w6
-	bl	zftl_get_gc_node
+	mov	x0, x26
+	mov	w1, w6
+	bl	_list_get_gc_head_node
 	add	w6, w6, 1
 	strh	w6, [x20]
 	and	w1, w0, 65535
-	cmp	w1, w26
-	beq	.L763
-	adrp	x2, .LANCHOR9
+	mov	w2, 65535
+	cmp	w1, w2
+	beq	.L749
+	adrp	x2, .LANCHOR11
 	ubfiz	x1, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR9]
+	ldr	x2, [x2, #:lo12:.LANCHOR11]
 	ldrh	w2, [x2, x1]
 	ldrh	w1, [x27]
 	cmp	w2, w1
-	bcs	.L763
+	bcs	.L749
 	mov	w2, 0
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L765
+	cbz	w0, .L751
 	add	w5, w24, 1
 	and	w24, w5, 65535
 	cmp	w24, w19
-	bcc	.L765
-.L766:
+	bcc	.L751
+.L752:
 	cmp	w24, w19
-	adrp	x0, .LANCHOR95
-	bcs	.L768
-	ldrh	w1, [x0, #:lo12:.LANCHOR95]
-	adrp	x3, .LANCHOR80
-	adrp	x0, .LANCHOR86
-	ldrh	w2, [x23, #:lo12:.LANCHOR94]
-	ldrb	w3, [x3, #:lo12:.LANCHOR80]
-	ldrh	w0, [x0, #:lo12:.LANCHOR86]
+	adrp	x0, .LANCHOR94
+	bcs	.L754
+	ldrh	w1, [x0, #:lo12:.LANCHOR94]
+	adrp	x3, .LANCHOR79
+	adrp	x0, .LANCHOR85
+	ldrh	w2, [x23, #:lo12:.LANCHOR93]
+	ldrb	w3, [x3, #:lo12:.LANCHOR79]
+	ldrh	w0, [x0, #:lo12:.LANCHOR85]
 	mul	w0, w0, w3
 	sub	w0, w0, w1, lsr 2
 	cmp	w2, w0
-	bge	.L761
+	bge	.L747
 	add	w1, w2, w1, lsr 3
-	strh	w1, [x23, #:lo12:.LANCHOR94]
-.L761:
-	ldr	x0, [x29, 144]
-	tbz	x0, 0, .L769
+	strh	w1, [x23, #:lo12:.LANCHOR93]
+.L747:
+	ldr	x0, [x29, 160]
+	tbz	x0, 0, .L755
 	and	w23, w19, 65535
 	cmp	w24, w23
-	bcs	.L769
-	adrp	x20, .LANCHOR90
-	add	x20, x20, :lo12:.LANCHOR90
-	mov	w25, 65535
-.L774:
+	bcs	.L755
+	adrp	x20, .LANCHOR87
+	adrp	x25, .LANCHOR95
+	add	x20, x20, :lo12:.LANCHOR87
+	add	x25, x25, :lo12:.LANCHOR95
+	mov	w26, 65535
+.L760:
 	ldrh	w6, [x20]
-	mov	w0, w6
-	bl	zftl_get_gc_node.part.9
+	mov	x0, x25
+	mov	w1, w6
+	bl	_list_get_gc_head_node
 	add	w6, w6, 1
 	strh	w6, [x20]
-	cmp	w25, w0, uxth
-	beq	.L770
+	cmp	w26, w0, uxth
+	beq	.L756
 	mov	w2, 0
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L771
+	cbz	w0, .L757
 	add	w5, w24, 1
 	and	w24, w5, 65535
 	cmp	w23, w24
-	bhi	.L771
-.L772:
-	adrp	x0, .LANCHOR95
-	adrp	x1, .LANCHOR70
-	ldrh	w0, [x0, #:lo12:.LANCHOR95]
-	ldrh	w2, [x1, #:lo12:.LANCHOR70]
+	bhi	.L757
+.L758:
+	adrp	x0, .LANCHOR94
+	adrp	x1, .LANCHOR69
+	ldrh	w0, [x0, #:lo12:.LANCHOR94]
+	ldrh	w2, [x1, #:lo12:.LANCHOR69]
 	cmp	w2, w0, lsr 1
-	bls	.L769
+	bls	.L755
 	sub	w0, w2, w0, lsr 3
-	b	.L860
-.L757:
-	strh	wzr, [x26, #:lo12:.LANCHOR91]
-	b	.L759
-.L755:
+	b	.L846
+.L743:
+	strh	wzr, [x26, #:lo12:.LANCHOR88]
+	b	.L745
+.L741:
 	strh	wzr, [x23]
-	b	.L759
-.L758:
+	b	.L745
+.L744:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L754
-.L763:
+	b	.L740
+.L749:
 	strh	wzr, [x20]
-	b	.L766
-.L765:
+	b	.L752
+.L751:
 	add	w25, w25, 1
 	and	w25, w25, 65535
-	b	.L762
-.L768:
-	ldrh	w1, [x23, #:lo12:.LANCHOR94]
-	ldrh	w0, [x0, #:lo12:.LANCHOR95]
+	b	.L748
+.L754:
+	ldrh	w1, [x23, #:lo12:.LANCHOR93]
+	ldrh	w0, [x0, #:lo12:.LANCHOR94]
 	cmp	w1, w0
-	bls	.L761
+	bls	.L747
 	sub	w0, w1, w0, lsr 3
-	strh	w0, [x23, #:lo12:.LANCHOR94]
-	b	.L761
-.L770:
+	strh	w0, [x23, #:lo12:.LANCHOR93]
+	b	.L747
+.L756:
 	strh	wzr, [x20]
-.L773:
+.L759:
 	cmp	w24, w23
-	bcs	.L772
-	adrp	x1, .LANCHOR70
-	adrp	x0, .LANCHOR95
-	ldrh	w2, [x1, #:lo12:.LANCHOR70]
-	ldrh	w0, [x0, #:lo12:.LANCHOR95]
+	bcs	.L758
+	adrp	x1, .LANCHOR69
+	adrp	x0, .LANCHOR94
+	ldrh	w2, [x1, #:lo12:.LANCHOR69]
+	ldrh	w0, [x0, #:lo12:.LANCHOR94]
 	cmp	w2, w0
-	bcs	.L769
+	bcs	.L755
 	add	w0, w2, w0, lsr 3
-.L860:
-	strh	w0, [x1, #:lo12:.LANCHOR70]
-.L769:
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L805
-	ldr	w2, [x29, 144]
+.L846:
+	strh	w0, [x1, #:lo12:.LANCHOR69]
+.L755:
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 8, .L791
+	ldr	w2, [x29, 160]
 	adrp	x0, .LC58
 	mov	w4, w19
 	mov	w3, w24
 	mov	w1, w22
 	add	x0, x0, :lo12:.LC58
 	bl	printf
-.L805:
+.L791:
 	mov	w0, w24
-	b	.L749
-.L771:
+	b	.L735
+.L757:
 	add	w21, w21, 1
 	and	w21, w21, 65535
 	cmp	w23, w21
-	bhi	.L774
-	b	.L773
-.L753:
-	adrp	x23, .LANCHOR80
-	adrp	x25, .LANCHOR86
-	str	x23, [x29, 136]
+	bhi	.L760
+	b	.L759
+.L739:
+	adrp	x23, .LANCHOR79
+	adrp	x25, .LANCHOR85
+	stp	x25, x23, [x29, 144]
 	cmp	w19, 1
-	ldrb	w20, [x23, #:lo12:.LANCHOR80]
-	ldrh	w3, [x25, #:lo12:.LANCHOR86]
+	ldrb	w20, [x23, #:lo12:.LANCHOR79]
+	ldrh	w3, [x25, #:lo12:.LANCHOR85]
 	mul	w20, w20, w3
 	and	w20, w20, 65535
-	bne	.L775
-	cbz	w1, .L775
+	bne	.L761
+	cbz	w1, .L761
 	ldrh	w3, [x2, 80]
 	mov	w2, 65535
 	cmp	w3, w2
-	beq	.L808
-	add	x2, x0, :lo12:.LANCHOR71
+	beq	.L794
+	add	x2, x0, :lo12:.LANCHOR70
 	ldrh	w2, [x2, 2106]
 	sub	w20, w20, w2
 	and	w20, w20, 65535
-.L808:
+.L794:
 	mov	w19, 8
-.L775:
-	add	x0, x0, :lo12:.LANCHOR71
-	strh	wzr, [x0, 2110]
+.L761:
+	add	x0, x0, :lo12:.LANCHOR70
+	strh	wzr, [x0, 2192]
 	adrp	x0, .LANCHOR96
 	strh	wzr, [x0, #:lo12:.LANCHOR96]
-	ldr	w0, [x29, 144]
+	ldr	w0, [x29, 160]
 	and	w0, w0, 1
-	str	w0, [x29, 120]
-	ldr	x0, [x29, 144]
-	tbz	x0, 0, .L809
+	str	w0, [x29, 128]
+	ldr	x0, [x29, 160]
+	tbz	x0, 0, .L795
 	adrp	x2, .LANCHOR98
 	adrp	x26, .LANCHOR97
-	str	x2, [x29, 128]
+	str	x2, [x29, 120]
 	ldrh	w0, [x26, #:lo12:.LANCHOR97]
 	ldrh	w3, [x2, #:lo12:.LANCHOR98]
 	cmp	w0, w3, lsr 2
-	bhi	.L777
+	bhi	.L763
 	adrp	x2, .LANCHOR99
 	ldrh	w2, [x2, #:lo12:.LANCHOR99]
 	cmp	w2, w0
-	bcs	.L810
-.L777:
+	bcs	.L796
+.L763:
 	cmp	w1, 1
-	adrp	x28, .LANCHOR90
-	bls	.L779
-.L781:
+	adrp	x25, .LANCHOR87
+	adrp	x28, .LANCHOR95
+	bls	.L765
+.L767:
 	mov	w24, 0
-.L780:
-	add	x28, x28, :lo12:.LANCHOR90
-	adrp	x0, .LANCHOR99
+.L766:
+	add	x0, x28, :lo12:.LANCHOR95
+	add	x25, x25, :lo12:.LANCHOR87
+	adrp	x28, .LANCHOR99
+	add	x28, x28, :lo12:.LANCHOR99
 	mov	w23, 0
-	add	x0, x0, :lo12:.LANCHOR99
 	mov	w27, 64
-	str	x0, [x29, 112]
-.L784:
-	ldrh	w7, [x28]
-	mov	w0, w7
-	bl	zftl_get_gc_node.part.9
+	str	x0, [x29, 136]
+.L770:
+	ldrh	w7, [x25]
+	ldr	x0, [x29, 136]
+	mov	w1, w7
+	bl	_list_get_gc_head_node
 	and	w6, w0, 65535
-	str	w6, [x29, 104]
+	str	w6, [x29, 112]
 	mov	w1, 65535
 	cmp	w6, w1
-	beq	.L782
+	beq	.L768
 	add	w7, w7, 1
 	mov	w2, w22
-	strh	w7, [x28]
+	strh	w7, [x25]
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L783
-	adrp	x0, .LANCHOR9
-	ldr	w6, [x29, 104]
+	cbz	w0, .L769
+	adrp	x0, .LANCHOR11
+	ldr	w6, [x29, 112]
 	add	w5, w24, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	and	w24, w5, 65535
 	ubfiz	x6, x6, 1, 16
 	cmp	w24, w19
 	ldrh	w0, [x0, x6]
 	add	w3, w23, w0
 	and	w23, w3, 65535
-	bcs	.L778
+	bcs	.L764
 	cmp	w20, w23
-	bcc	.L778
-	ldr	x0, [x29, 112]
+	bcc	.L764
+	ldrh	w0, [x28]
 	ldrh	w1, [x26, #:lo12:.LANCHOR97]
-	ldrh	w0, [x0]
 	cmp	w0, w1, lsl 1
-	ble	.L783
-.L778:
+	ble	.L769
+.L764:
 	adrp	x0, .LANCHOR99
 	ldrh	w1, [x0, #:lo12:.LANCHOR99]
-	ldr	x0, [x29, 128]
+	ldr	x0, [x29, 120]
 	ldrh	w0, [x0, #:lo12:.LANCHOR98]
 	cmp	w1, w0, lsr 2
-	bhi	.L806
+	bhi	.L792
 	ldrh	w0, [x26, #:lo12:.LANCHOR97]
 	add	w0, w0, 8
 	cmp	w1, w0
-	ble	.L776
-.L806:
+	ble	.L762
+.L792:
 	cmp	w20, w23
-	bls	.L776
-	adrp	x4, .LANCHOR91
-	add	x28, x4, :lo12:.LANCHOR91
-	and	w0, w19, 65535
+	bls	.L762
+	adrp	x7, .LANCHOR88
+	and	w25, w19, 65535
+	add	x28, x7, :lo12:.LANCHOR88
+	adrp	x0, .LANCHOR90
 	mov	w26, 64
-	adrp	x27, .LANCHOR9
-	str	w0, [x29, 128]
-.L787:
+	add	x0, x0, :lo12:.LANCHOR90
+	adrp	x27, .LANCHOR11
+	str	x0, [x29, 136]
+.L773:
 	ldrh	w6, [x28]
-	mov	w1, 3
-	mov	w0, w6
-	bl	zftl_get_gc_node
-	and	w7, w0, 65535
-	str	w7, [x29, 112]
+	ldr	x0, [x29, 136]
+	mov	w1, w6
+	bl	_list_get_gc_head_node
+	and	w4, w0, 65535
+	str	w4, [x29, 120]
 	mov	w1, 65535
-	cmp	w7, w1
-	beq	.L785
+	cmp	w4, w1
+	beq	.L771
 	add	w6, w6, 1
 	mov	w2, w22
 	strh	w6, [x28]
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L786
-	ldr	w7, [x29, 112]
+	cbz	w0, .L772
+	ldr	w4, [x29, 120]
 	add	w5, w24, 1
-	ldr	x0, [x27, #:lo12:.LANCHOR9]
+	ldr	x0, [x27, #:lo12:.LANCHOR11]
 	and	w24, w5, 65535
-	ubfiz	x7, x7, 1, 16
-	ldrh	w0, [x0, x7]
+	cmp	w24, w25
+	ubfiz	x4, x4, 1, 16
+	ldrh	w0, [x0, x4]
 	add	w3, w23, w0
-	ldr	w0, [x29, 128]
 	and	w23, w3, 65535
-	cmp	w24, w0
-	bcs	.L776
+	bcs	.L762
 	cmp	w20, w23
-	bcs	.L786
-.L776:
-	ldr	x0, [x29, 144]
-	tbz	x0, 1, .L788
-	adrp	x0, .LANCHOR93
+	bcs	.L772
+.L762:
+	ldr	x0, [x29, 160]
+	tbz	x0, 1, .L774
+	adrp	x0, .LANCHOR91
 	str	x0, [x29, 112]
-	ldrh	w1, [x0, #:lo12:.LANCHOR93]
+	ldrh	w1, [x0, #:lo12:.LANCHOR91]
 	cmp	w1, 32
-	bls	.L788
+	bls	.L774
 	cmp	w23, w20
-	bcs	.L788
+	bcs	.L774
+	adrp	x25, .LANCHOR89
 	adrp	x0, .LANCHOR92
+	add	x28, x25, :lo12:.LANCHOR89
+	add	x0, x0, :lo12:.LANCHOR92
 	adrp	x27, .LANCHOR100
-	add	x28, x0, :lo12:.LANCHOR92
+	str	x0, [x29, 120]
 	mov	w26, 64
 	add	x0, x27, :lo12:.LANCHOR100
-	str	x0, [x29, 128]
-.L794:
+	str	x0, [x29, 136]
+.L780:
 	ldrh	w6, [x28]
-	mov	w1, 5
-	mov	w0, w6
-	bl	zftl_get_gc_node
+	ldr	x0, [x29, 120]
+	mov	w1, w6
+	bl	_list_get_gc_head_node
 	and	w8, w0, 65535
 	mov	w1, 65535
 	cmp	w8, w1
-	beq	.L789
+	beq	.L775
 	add	w6, w6, 1
 	strh	w6, [x28]
 	cmp	w19, 1
-	bne	.L790
-	ldr	x1, [x29, 136]
-	ldrh	w2, [x25, #:lo12:.LANCHOR86]
-	ldrb	w1, [x1, #:lo12:.LANCHOR80]
+	bne	.L776
+	ldp	x2, x1, [x29, 144]
+	ldrb	w1, [x1, #:lo12:.LANCHOR79]
+	ldrh	w2, [x2, #:lo12:.LANCHOR85]
 	mul	w2, w1, w2
-	adrp	x1, .LANCHOR95
-	ldrh	w1, [x1, #:lo12:.LANCHOR95]
+	adrp	x1, .LANCHOR94
+	ldrh	w1, [x1, #:lo12:.LANCHOR94]
 	sub	w1, w2, w1, lsr 3
-	ldr	x2, [x29, 128]
+	ldr	x2, [x29, 136]
 	strh	w1, [x2]
-.L790:
+.L776:
 	ubfiz	x6, x8, 1, 16
-	adrp	x8, .LANCHOR9
+	adrp	x8, .LANCHOR11
 	stp	x8, x6, [x29, 96]
-	ldr	x1, [x8, #:lo12:.LANCHOR9]
+	ldr	x1, [x8, #:lo12:.LANCHOR11]
 	ldrh	w2, [x1, x6]
-	ldr	x1, [x29, 128]
+	ldr	x1, [x29, 136]
 	ldrh	w1, [x1]
 	cmp	w2, w1
-	bcs	.L791
+	bcs	.L777
 	mov	w2, w22
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L792
+	cbz	w0, .L778
 	ldp	x8, x6, [x29, 96]
 	add	w5, w24, 1
 	add	w21, w21, 1
 	and	w24, w5, 65535
 	and	w21, w21, 65535
 	cmp	w24, w19
-	ldr	x0, [x8, #:lo12:.LANCHOR9]
+	ldr	x0, [x8, #:lo12:.LANCHOR11]
 	ldrh	w0, [x0, x6]
 	add	w3, w23, w0
 	and	w23, w3, 65535
-	bcs	.L793
+	bcs	.L779
 	cmp	w20, w23
-	bcs	.L792
-.L793:
+	bcs	.L778
+.L779:
 	cmp	w24, w19
-	adrp	x0, .LANCHOR95
-	bcc	.L795
-	cbnz	w21, .L796
+	adrp	x0, .LANCHOR94
+	bcc	.L781
+	cbnz	w21, .L782
 	ldr	x1, [x29, 112]
-	ldrh	w2, [x1, #:lo12:.LANCHOR93]
+	ldrh	w2, [x1, #:lo12:.LANCHOR91]
 	adrp	x1, .LANCHOR101
 	ldrh	w1, [x1, #:lo12:.LANCHOR101]
 	cmp	w2, w1
-	bls	.L796
-.L795:
-	ldr	x3, [x29, 136]
-	ldrh	w2, [x0, #:lo12:.LANCHOR95]
-	ldrh	w0, [x25, #:lo12:.LANCHOR86]
+	bls	.L782
+.L781:
+	ldrh	w2, [x0, #:lo12:.LANCHOR94]
+	ldp	x0, x3, [x29, 144]
 	ldrh	w1, [x27, #:lo12:.LANCHOR100]
-	ldrb	w6, [x3, #:lo12:.LANCHOR80]
 	lsr	w2, w2, 3
+	ldrh	w0, [x0, #:lo12:.LANCHOR85]
+	ldrb	w6, [x3, #:lo12:.LANCHOR79]
 	mul	w0, w0, w6
 	sub	w0, w0, w2
 	cmp	w1, w0
-	bge	.L788
+	bge	.L774
 	add	w1, w1, w2
 	strh	w1, [x27, #:lo12:.LANCHOR100]
-.L788:
-	ldr	w0, [x29, 120]
-	cbz	w0, .L769
-	and	w26, w19, 65535
-	cmp	w24, w26
-	bcs	.L769
+.L774:
+	ldr	w0, [x29, 128]
+	cbz	w0, .L755
+	and	w27, w19, 65535
+	cmp	w24, w27
+	bcs	.L755
 	cmp	w23, w20
-	bcs	.L769
-	adrp	x21, .LANCHOR91
-	add	x21, x21, :lo12:.LANCHOR91
-	adrp	x28, .LANCHOR102
+	bcs	.L755
+	adrp	x26, .LANCHOR90
+	adrp	x4, .LANCHOR88
+	add	x0, x26, :lo12:.LANCHOR90
+	add	x28, x4, :lo12:.LANCHOR88
+	adrp	x21, .LANCHOR102
+	str	x0, [x29, 144]
 	mov	w25, 64
-	add	x0, x28, :lo12:.LANCHOR102
-	adrp	x27, .LANCHOR9
-	str	x0, [x29, 128]
-.L804:
-	ldrh	w6, [x21]
-	mov	w1, 3
-	mov	w0, w6
-	bl	zftl_get_gc_node
-	and	w4, w0, 65535
-	mov	w1, 65535
-	cmp	w4, w1
-	beq	.L798
-	ldr	x1, [x27, #:lo12:.LANCHOR9]
-	ubfiz	x4, x4, 1, 16
+	add	x0, x21, :lo12:.LANCHOR102
+	adrp	x26, .LANCHOR11
+	str	x0, [x29, 136]
+.L790:
+	ldrh	w6, [x28]
+	ldr	x0, [x29, 144]
+	mov	w1, w6
+	bl	_list_get_gc_head_node
+	and	w1, w0, 65535
+	mov	w2, 65535
+	cmp	w1, w2
+	beq	.L784
 	add	w6, w6, 1
-	strh	w6, [x21]
-	ldrh	w2, [x1, x4]
-	ldr	x1, [x29, 128]
+	strh	w6, [x28]
+	ubfiz	x6, x1, 1, 16
+	ldr	x1, [x26, #:lo12:.LANCHOR11]
+	ldrh	w2, [x1, x6]
+	ldr	x1, [x29, 136]
 	ldrh	w1, [x1]
 	cmp	w2, w1
-	bcs	.L799
+	bcs	.L785
 	adrp	x1, .LANCHOR98
 	ldrh	w2, [x1, #:lo12:.LANCHOR98]
 	adrp	x1, .LANCHOR99
 	ldrh	w1, [x1, #:lo12:.LANCHOR99]
 	cmp	w1, w2, lsr 1
-	bls	.L800
-.L799:
+	bls	.L786
+.L785:
 	mov	w2, w22
 	mov	w1, 0
-	str	x4, [x29, 120]
+	str	x6, [x29, 128]
 	bl	gc_add_sblk
-	cbz	w0, .L801
-	adrp	x0, .LANCHOR9
-	ldr	x4, [x29, 120]
+	cbz	w0, .L787
+	adrp	x0, .LANCHOR11
+	ldr	x6, [x29, 128]
 	add	w5, w24, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	and	w24, w5, 65535
-	cmp	w26, w24
-	ldrh	w0, [x0, x4]
+	cmp	w27, w24
+	ldrh	w0, [x0, x6]
 	add	w3, w23, w0
 	and	w23, w3, 65535
-	bls	.L802
+	bls	.L788
 	cmp	w20, w23
-	bcs	.L801
-.L803:
-	adrp	x0, .LANCHOR95
-	ldrh	w1, [x28, #:lo12:.LANCHOR102]
-	ldrh	w0, [x0, #:lo12:.LANCHOR95]
+	bcs	.L787
+.L789:
+	adrp	x0, .LANCHOR94
+	ldrh	w1, [x21, #:lo12:.LANCHOR102]
+	ldrh	w0, [x0, #:lo12:.LANCHOR94]
 	cmp	w1, w0, lsr 1
-	bls	.L769
+	bls	.L755
 	sub	w0, w1, w0, lsr 3
-	strh	w0, [x28, #:lo12:.LANCHOR102]
-	b	.L769
-.L779:
+	strh	w0, [x21, #:lo12:.LANCHOR102]
+	b	.L755
+.L765:
 	lsr	w0, w0, 2
-	strh	w0, [x28, #:lo12:.LANCHOR90]
-	mov	w0, 0
-	bl	zftl_get_gc_node.part.9
+	mov	w1, 0
+	strh	w0, [x25, #:lo12:.LANCHOR87]
+	add	x0, x28, :lo12:.LANCHOR95
+	bl	_list_get_gc_head_node
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L781
-	adrp	x2, .LANCHOR9
+	beq	.L767
+	adrp	x2, .LANCHOR11
 	ubfiz	x1, x1, 1, 16
-	ldr	x3, [x2, #:lo12:.LANCHOR9]
-	adrp	x2, .LANCHOR95
-	ldrh	w2, [x2, #:lo12:.LANCHOR95]
+	ldr	x3, [x2, #:lo12:.LANCHOR11]
+	adrp	x2, .LANCHOR94
+	ldrh	w2, [x2, #:lo12:.LANCHOR94]
 	ldrh	w1, [x3, x1]
 	cmp	w1, w2, lsr 2
-	bcs	.L781
+	bcs	.L767
 	mov	w1, 1
 	mov	w2, w22
-	strh	w1, [x28, #:lo12:.LANCHOR90]
+	strh	w1, [x25, #:lo12:.LANCHOR87]
 	mov	w1, 0
 	bl	gc_add_sblk
 	cmp	w0, 0
 	cset	w24, ne
-	b	.L780
-.L782:
-	strh	wzr, [x28]
-	b	.L778
-.L783:
+	b	.L766
+.L768:
+	strh	wzr, [x25]
+	b	.L764
+.L769:
 	sub	w27, w27, #1
 	ands	w27, w27, 65535
-	bne	.L784
-	b	.L778
-.L785:
+	bne	.L770
+	b	.L764
+.L771:
 	cmp	w6, 64
-	bls	.L776
+	bls	.L762
 	strh	wzr, [x28]
-	b	.L776
-.L786:
+	b	.L762
+.L772:
 	sub	w26, w26, #1
 	ands	w26, w26, 65535
-	bne	.L787
-	b	.L776
-.L809:
+	bne	.L773
+	b	.L762
+.L795:
 	mov	w23, 0
 	mov	w24, 0
-	b	.L776
-.L791:
-	adrp	x0, .LANCHOR92
-	strh	wzr, [x0, #:lo12:.LANCHOR92]
-	b	.L793
-.L789:
+	b	.L762
+.L777:
+	strh	wzr, [x25, #:lo12:.LANCHOR89]
+	b	.L779
+.L775:
 	strh	wzr, [x28]
-	b	.L793
-.L792:
+	b	.L779
+.L778:
 	sub	w26, w26, #1
 	ands	w26, w26, 65535
-	bne	.L794
-	b	.L793
-.L796:
-	ldr	x1, [x29, 136]
-	ldrh	w0, [x0, #:lo12:.LANCHOR95]
+	bne	.L780
+	b	.L779
+.L782:
+	ldr	x1, [x29, 152]
+	ldrh	w0, [x0, #:lo12:.LANCHOR94]
 	ldrh	w2, [x27, #:lo12:.LANCHOR100]
-	ldrb	w1, [x1, #:lo12:.LANCHOR80]
+	ldrb	w1, [x1, #:lo12:.LANCHOR79]
 	mul	w1, w1, w0
 	cmp	w2, w1
-	ble	.L769
+	ble	.L755
 	sub	w0, w2, w0, lsr 3
 	strh	w0, [x27, #:lo12:.LANCHOR100]
-	b	.L769
-.L798:
+	b	.L755
+.L784:
 	cmp	w6, 64
-	bls	.L800
-	strh	wzr, [x21]
-.L800:
-	cmp	w24, w26
-	bcc	.L803
-.L802:
-	adrp	x0, .LANCHOR95
-	ldrh	w2, [x28, #:lo12:.LANCHOR102]
-	ldrh	w1, [x0, #:lo12:.LANCHOR95]
-	ldr	x0, [x29, 136]
-	ldrb	w0, [x0, #:lo12:.LANCHOR80]
+	bls	.L786
+	strh	wzr, [x28]
+.L786:
+	cmp	w24, w27
+	bcc	.L789
+.L788:
+	adrp	x0, .LANCHOR94
+	ldrh	w2, [x21, #:lo12:.LANCHOR102]
+	ldrh	w1, [x0, #:lo12:.LANCHOR94]
+	ldr	x0, [x29, 152]
+	ldrb	w0, [x0, #:lo12:.LANCHOR79]
 	mul	w0, w0, w1
 	sub	w0, w0, #32
 	cmp	w2, w0
-	bge	.L769
+	bge	.L755
 	add	w1, w2, w1, lsr 3
-	strh	w1, [x28, #:lo12:.LANCHOR102]
-	b	.L769
-.L801:
+	strh	w1, [x21, #:lo12:.LANCHOR102]
+	b	.L755
+.L787:
 	sub	w25, w25, #1
 	ands	w25, w25, 65535
-	bne	.L804
-	b	.L800
-.L810:
+	bne	.L790
+	b	.L786
+.L796:
 	mov	w23, 0
 	mov	w24, 0
-	b	.L778
+	b	.L764
 	.size	gc_search_src_blk, .-gc_search_src_blk
+	.section	.text.zftl_get_gc_node,"ax",@progbits
+	.align	2
+	.global	zftl_get_gc_node
+	.type	zftl_get_gc_node, %function
+zftl_get_gc_node:
+	and	w1, w1, 65535
+	and	w0, w0, 65535
+	cmp	w1, 5
+	bne	.L848
+	mov	w1, w0
+	adrp	x0, .LANCHOR92
+	add	x0, x0, :lo12:.LANCHOR92
+.L850:
+	b	_list_get_gc_head_node
+.L848:
+	cmp	w1, 2
+	mov	w1, w0
+	bne	.L849
+	adrp	x0, .LANCHOR95
+	add	x0, x0, :lo12:.LANCHOR95
+	b	.L850
+.L849:
+	adrp	x0, .LANCHOR90
+	add	x0, x0, :lo12:.LANCHOR90
+	b	.L850
+	.size	zftl_get_gc_node, .-zftl_get_gc_node
 	.section	.text.zftl_insert_free_list,"ax",@progbits
 	.align	2
 	.global	zftl_insert_free_list
 	.type	zftl_insert_free_list, %function
 zftl_insert_free_list:
 	and	w1, w0, 65535
-	adrp	x0, .LANCHOR7
-	ldr	x0, [x0, #:lo12:.LANCHOR7]
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	add	x0, x0, x1, uxth 2
 	ldrb	w0, [x0, 2]
 	ands	w0, w0, 24
-	bne	.L862
+	bne	.L852
 	adrp	x2, .LANCHOR103
 	adrp	x0, .LANCHOR104
 	add	x2, x2, :lo12:.LANCHOR103
 	add	x0, x0, :lo12:.LANCHOR104
-.L864:
+.L854:
 	b	_insert_free_list
-.L862:
+.L852:
 	cmp	w0, 16
-	bne	.L863
+	bne	.L853
 	adrp	x2, .LANCHOR105
 	adrp	x0, .LANCHOR106
 	add	x2, x2, :lo12:.LANCHOR105
 	add	x0, x0, :lo12:.LANCHOR106
-	b	.L864
-.L863:
+	b	.L854
+.L853:
 	adrp	x2, .LANCHOR107
 	adrp	x0, .LANCHOR108
 	add	x2, x2, :lo12:.LANCHOR107
 	add	x0, x0, :lo12:.LANCHOR108
-	b	.L864
+	b	.L854
 	.size	zftl_insert_free_list, .-zftl_insert_free_list
 	.section	.text.zftl_insert_data_list,"ax",@progbits
 	.align	2
@@ -4946,36 +5038,36 @@ zftl_insert_free_list:
 	.type	zftl_insert_data_list, %function
 zftl_insert_data_list:
 	and	w1, w0, 65535
-	adrp	x0, .LANCHOR7
-	ldr	x0, [x0, #:lo12:.LANCHOR7]
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	add	x0, x0, x1, uxth 2
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L866
+	bne	.L856
 	adrp	x2, .LANCHOR97
-	adrp	x0, .LANCHOR12
+	adrp	x0, .LANCHOR95
 	add	x2, x2, :lo12:.LANCHOR97
-	add	x0, x0, :lo12:.LANCHOR12
-.L869:
+	add	x0, x0, :lo12:.LANCHOR95
+.L859:
 	b	_insert_data_list
-.L866:
+.L856:
 	cmp	w2, 96
-	bne	.L867
+	bne	.L857
 	adrp	x2, .LANCHOR99
-	adrp	x0, .LANCHOR89
+	adrp	x0, .LANCHOR90
 	add	x2, x2, :lo12:.LANCHOR99
-	add	x0, x0, :lo12:.LANCHOR89
-	b	.L869
-.L867:
+	add	x0, x0, :lo12:.LANCHOR90
+	b	.L859
+.L857:
 	cmp	w2, 160
-	bne	.L865
-	adrp	x2, .LANCHOR93
-	adrp	x0, .LANCHOR88
-	add	x2, x2, :lo12:.LANCHOR93
-	add	x0, x0, :lo12:.LANCHOR88
-	b	.L869
-.L865:
+	bne	.L855
+	adrp	x2, .LANCHOR91
+	adrp	x0, .LANCHOR92
+	add	x2, x2, :lo12:.LANCHOR91
+	add	x0, x0, :lo12:.LANCHOR92
+	b	.L859
+.L855:
 	ret
 	.size	zftl_insert_data_list, .-zftl_insert_data_list
 	.section	.text.zftl_gc_get_free_sblk,"ax",@progbits
@@ -4986,54 +5078,54 @@ zftl_gc_get_free_sblk:
 	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR10
+	adrp	x20, .LANCHOR12
 	stp	x21, x22, [sp, 32]
 	and	w21, w0, 65535
-	ldr	x0, [x20, #:lo12:.LANCHOR10]
+	ldr	x0, [x20, #:lo12:.LANCHOR12]
 	and	w22, w1, 65535
 	ldrh	w19, [x0, 588]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L871
-	cbnz	w21, .L871
+	beq	.L861
+	cbnz	w21, .L861
 	mov	w1, w19
 	adrp	x0, .LC59
 	add	x0, x0, :lo12:.LC59
 	bl	printf
-	ldr	x0, [x20, #:lo12:.LANCHOR10]
+	ldr	x0, [x20, #:lo12:.LANCHOR12]
 	mov	w1, -1
 	strh	w1, [x0, 588]
-.L872:
+.L862:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L871:
+.L861:
 	adrp	x2, .LANCHOR105
 	adrp	x20, .LANCHOR107
 	ldrh	w0, [x2, #:lo12:.LANCHOR105]
 	ldrh	w1, [x20, #:lo12:.LANCHOR107]
 	cmp	w0, w1
-	bcc	.L873
+	bcc	.L863
 	adrp	x3, .LANCHOR103
 	ldrh	w3, [x3, #:lo12:.LANCHOR103]
 	cmp	w3, w0
-	bls	.L874
-	cbz	w1, .L874
-.L873:
-	cbnz	w21, .L875
+	bls	.L864
+	cbz	w1, .L864
+.L863:
+	cbnz	w21, .L865
 	lsr	w1, w1, 2
-.L876:
+.L866:
 	adrp	x0, .LANCHOR108
 	add	x2, x20, :lo12:.LANCHOR107
 	add	x0, x0, :lo12:.LANCHOR108
-.L891:
+.L881:
 	bl	_list_pop_index_node
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	bne	.L879
+	bne	.L869
 	adrp	x0, .LANCHOR103
 	ldrh	w5, [x20, #:lo12:.LANCHOR107]
 	mov	w2, w22
@@ -5044,17 +5136,17 @@ zftl_gc_get_free_sblk:
 	adrp	x0, .LC60
 	add	x0, x0, :lo12:.LC60
 	bl	printf
-.L879:
-	cbz	w21, .L872
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L872
-	adrp	x4, .LANCHOR9
-	adrp	x1, .LANCHOR7
+.L869:
+	cbz	w21, .L862
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 8, .L862
+	adrp	x4, .LANCHOR11
+	adrp	x1, .LANCHOR9
 	uxtw	x3, w19
-	ldr	x1, [x1, #:lo12:.LANCHOR7]
+	ldr	x1, [x1, #:lo12:.LANCHOR9]
 	lsl	x0, x3, 2
-	ldr	x6, [x4, #:lo12:.LANCHOR9]
+	ldr	x6, [x4, #:lo12:.LANCHOR11]
 	add	x2, x1, x0
 	ldr	w4, [x1, x0]
 	ldrh	w6, [x6, x3, lsl 1]
@@ -5068,20 +5160,20 @@ zftl_gc_get_free_sblk:
 	ubfx	x2, x2, 5, 3
 	add	x0, x0, :lo12:.LC61
 	bl	printf
-	b	.L872
-.L875:
+	b	.L862
+.L865:
 	mov	w1, 7
 	mul	w1, w0, w1
 	lsr	w1, w1, 3
-	b	.L876
-.L874:
+	b	.L866
+.L864:
 	lsr	w1, w0, 3
 	cmp	w21, 0
 	adrp	x0, .LANCHOR106
 	csel	w1, w1, wzr, ne
 	add	x2, x2, :lo12:.LANCHOR105
 	add	x0, x0, :lo12:.LANCHOR106
-	b	.L891
+	b	.L881
 	.size	zftl_gc_get_free_sblk, .-zftl_gc_get_free_sblk
 	.section	.text.zftl_get_free_sblk,"ax",@progbits
 	.align	2
@@ -5094,36 +5186,36 @@ zftl_get_free_sblk:
 	and	w20, w1, 65535
 	str	x21, [sp, 32]
 	cmp	w20, 5
-	bne	.L893
+	bne	.L883
 	adrp	x2, .LANCHOR105
 	adrp	x0, .LANCHOR107
 	ldrh	w3, [x2, #:lo12:.LANCHOR105]
 	ldrh	w1, [x0, #:lo12:.LANCHOR107]
 	cmp	w3, w1
-	bcc	.L894
+	bcc	.L884
 	adrp	x4, .LANCHOR103
 	ldrh	w4, [x4, #:lo12:.LANCHOR103]
 	cmp	w4, w3
-	bls	.L895
-	cbz	w1, .L895
-.L894:
+	bls	.L885
+	cbz	w1, .L885
+.L884:
 	add	x2, x0, :lo12:.LANCHOR107
 	lsr	w1, w1, 1
-.L914:
+.L904:
 	adrp	x0, .LANCHOR108
 	add	x0, x0, :lo12:.LANCHOR108
-	b	.L913
-.L895:
+	b	.L903
+.L885:
 	adrp	x0, .LANCHOR106
 	add	x2, x2, :lo12:.LANCHOR105
 	add	x0, x0, :lo12:.LANCHOR106
 	mov	w1, 0
-.L913:
+.L903:
 	bl	_list_pop_index_node
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	bne	.L898
+	bne	.L888
 	adrp	x0, .LANCHOR107
 	mov	w2, w20
 	mov	w1, w19
@@ -5135,58 +5227,65 @@ zftl_get_free_sblk:
 	adrp	x0, .LC60
 	add	x0, x0, :lo12:.LC60
 	bl	printf
-	b	.L898
-.L893:
-	adrp	x21, .LANCHOR10
-	and	w0, w0, 65535
-	ldr	x1, [x21, #:lo12:.LANCHOR10]
-	ldrh	w19, [x1, 590]
-	mov	w1, 65535
-	cmp	w19, w1
-	beq	.L897
+	b	.L888
+.L883:
+	adrp	x21, .LANCHOR12
+	and	w3, w0, 65535
+	ldr	x0, [x21, #:lo12:.LANCHOR12]
+	ldrh	w19, [x0, 590]
+	mov	w0, 65535
+	cmp	w19, w0
+	beq	.L887
 	cmp	w20, 1
-	beq	.L897
+	beq	.L887
 	mov	w1, w19
 	adrp	x0, .LC62
 	add	x0, x0, :lo12:.LC62
 	bl	printf
-	ldr	x0, [x21, #:lo12:.LANCHOR10]
+	ldr	x0, [x21, #:lo12:.LANCHOR12]
 	mov	w1, -1
 	strh	w1, [x0, 590]
-.L898:
+.L888:
 	mov	w0, w19
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L897:
+.L887:
 	adrp	x2, .LANCHOR103
 	adrp	x4, .LANCHOR107
-	ldrh	w1, [x2, #:lo12:.LANCHOR103]
-	ldrh	w3, [x4, #:lo12:.LANCHOR107]
-	cmp	w1, w3
-	bcc	.L899
+	ldrh	w0, [x2, #:lo12:.LANCHOR103]
+	ldrh	w1, [x4, #:lo12:.LANCHOR107]
+	cmp	w0, w1
+	bcc	.L889
 	adrp	x5, .LANCHOR105
 	ldrh	w5, [x5, #:lo12:.LANCHOR105]
-	cmp	w5, w1
-	bls	.L900
-	cbz	w3, .L900
-.L899:
+	cmp	w5, w0
+	bls	.L890
+	cbz	w1, .L890
+.L889:
+	bl	get_ink_scaned_blk
+	and	w19, w0, 65535
+	mov	w0, 65535
+	cmp	w19, w0
+	bne	.L888
 	cmp	w20, 1
+	bne	.L891
+	ldrh	w3, [x4, #:lo12:.LANCHOR107]
 	lsr	w3, w3, 1
-	csel	w0, w3, w0, eq
+.L891:
 	add	x2, x4, :lo12:.LANCHOR107
-	mov	w1, w0
-	b	.L914
-.L900:
-	lsr	w1, w1, 1
+	mov	w1, w3
+	b	.L904
+.L890:
+	lsr	w0, w0, 1
 	cmp	w20, 1
-	csel	w0, w1, w0, eq
+	csel	w3, w0, w3, eq
 	add	x2, x2, :lo12:.LANCHOR103
-	mov	w1, w0
 	adrp	x0, .LANCHOR104
+	mov	w1, w3
 	add	x0, x0, :lo12:.LANCHOR104
-	b	.L913
+	b	.L903
 	.size	zftl_get_free_sblk, .-zftl_get_free_sblk
 	.section	.text.zftl_remove_data_node,"ax",@progbits
 	.align	2
@@ -5194,36 +5293,36 @@ zftl_get_free_sblk:
 	.type	zftl_remove_data_node, %function
 zftl_remove_data_node:
 	and	w1, w0, 65535
-	adrp	x0, .LANCHOR7
-	ldr	x0, [x0, #:lo12:.LANCHOR7]
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	add	x0, x0, x1, uxth 2
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L916
+	bne	.L906
 	adrp	x2, .LANCHOR97
-	adrp	x0, .LANCHOR12
+	adrp	x0, .LANCHOR95
 	add	x2, x2, :lo12:.LANCHOR97
-	add	x0, x0, :lo12:.LANCHOR12
-.L919:
+	add	x0, x0, :lo12:.LANCHOR95
+.L909:
 	b	_list_remove_node
-.L916:
+.L906:
 	cmp	w2, 96
-	bne	.L917
+	bne	.L907
 	adrp	x2, .LANCHOR99
-	adrp	x0, .LANCHOR89
+	adrp	x0, .LANCHOR90
 	add	x2, x2, :lo12:.LANCHOR99
-	add	x0, x0, :lo12:.LANCHOR89
-	b	.L919
-.L917:
+	add	x0, x0, :lo12:.LANCHOR90
+	b	.L909
+.L907:
 	cmp	w2, 160
-	bne	.L915
-	adrp	x2, .LANCHOR93
-	adrp	x0, .LANCHOR88
-	add	x2, x2, :lo12:.LANCHOR93
-	add	x0, x0, :lo12:.LANCHOR88
-	b	.L919
-.L915:
+	bne	.L905
+	adrp	x2, .LANCHOR91
+	adrp	x0, .LANCHOR92
+	add	x2, x2, :lo12:.LANCHOR91
+	add	x0, x0, :lo12:.LANCHOR92
+	b	.L909
+.L905:
 	ret
 	.size	zftl_remove_data_node, .-zftl_remove_data_node
 	.section	.text.zftl_remove_free_node,"ax",@progbits
@@ -5232,32 +5331,32 @@ zftl_remove_data_node:
 	.type	zftl_remove_free_node, %function
 zftl_remove_free_node:
 	and	w1, w0, 65535
-	adrp	x0, .LANCHOR7
-	ldr	x0, [x0, #:lo12:.LANCHOR7]
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	add	x0, x0, x1, uxth 2
 	ldrb	w0, [x0, 2]
 	ands	w0, w0, 24
-	bne	.L921
+	bne	.L911
 	adrp	x2, .LANCHOR103
 	adrp	x0, .LANCHOR104
 	add	x2, x2, :lo12:.LANCHOR103
 	add	x0, x0, :lo12:.LANCHOR104
-.L923:
+.L913:
 	b	_list_remove_node
-.L921:
+.L911:
 	cmp	w0, 16
-	bne	.L922
+	bne	.L912
 	adrp	x2, .LANCHOR105
 	adrp	x0, .LANCHOR106
 	add	x2, x2, :lo12:.LANCHOR105
 	add	x0, x0, :lo12:.LANCHOR106
-	b	.L923
-.L922:
+	b	.L913
+.L912:
 	adrp	x2, .LANCHOR107
 	adrp	x0, .LANCHOR108
 	add	x2, x2, :lo12:.LANCHOR107
 	add	x0, x0, :lo12:.LANCHOR108
-	b	.L923
+	b	.L913
 	.size	zftl_remove_free_node, .-zftl_remove_free_node
 	.section	.text.zftl_list_update_data_list,"ax",@progbits
 	.align	2
@@ -5265,36 +5364,36 @@ zftl_remove_free_node:
 	.type	zftl_list_update_data_list, %function
 zftl_list_update_data_list:
 	and	w1, w0, 65535
-	adrp	x0, .LANCHOR7
-	ldr	x0, [x0, #:lo12:.LANCHOR7]
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	add	x0, x0, x1, uxth 2
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L925
+	bne	.L915
 	adrp	x2, .LANCHOR97
-	adrp	x0, .LANCHOR12
+	adrp	x0, .LANCHOR95
 	add	x2, x2, :lo12:.LANCHOR97
-	add	x0, x0, :lo12:.LANCHOR12
-.L928:
+	add	x0, x0, :lo12:.LANCHOR95
+.L918:
 	b	_list_update_data_list
-.L925:
+.L915:
 	cmp	w2, 96
-	bne	.L926
+	bne	.L916
 	adrp	x2, .LANCHOR99
-	adrp	x0, .LANCHOR89
+	adrp	x0, .LANCHOR90
 	add	x2, x2, :lo12:.LANCHOR99
-	add	x0, x0, :lo12:.LANCHOR89
-	b	.L928
-.L926:
+	add	x0, x0, :lo12:.LANCHOR90
+	b	.L918
+.L916:
 	cmp	w2, 160
-	bne	.L924
-	adrp	x2, .LANCHOR93
-	adrp	x0, .LANCHOR88
-	add	x2, x2, :lo12:.LANCHOR93
-	add	x0, x0, :lo12:.LANCHOR88
-	b	.L928
-.L924:
+	bne	.L914
+	adrp	x2, .LANCHOR91
+	adrp	x0, .LANCHOR92
+	add	x2, x2, :lo12:.LANCHOR91
+	add	x0, x0, :lo12:.LANCHOR92
+	b	.L918
+.L914:
 	ret
 	.size	zftl_list_update_data_list, .-zftl_list_update_data_list
 	.section	.text.print_list_info,"ax",@progbits
@@ -5315,7 +5414,7 @@ print_list_info:
 	add	x0, x0, :lo12:.LC63
 	bl	printf
 	ldr	x19, [x19]
-	cbz	x19, .L929
+	cbz	x19, .L919
 	mov	x24, -6148914691236517206
 	adrp	x22, .LC64
 	adrp	x21, .LANCHOR109
@@ -5324,15 +5423,15 @@ print_list_info:
 	mov	w20, 0
 	adrp	x23, .LANCHOR4
 	movk	x24, 0xaaab, lsl 0
-.L933:
+.L923:
 	ldr	x2, [x23, #:lo12:.LANCHOR4]
-	adrp	x1, .LANCHOR7
-	adrp	x8, .LANCHOR9
+	adrp	x1, .LANCHOR9
+	adrp	x8, .LANCHOR11
 	ldrh	w5, [x19, 4]
 	sub	x2, x19, x2
-	ldr	x1, [x1, #:lo12:.LANCHOR7]
+	ldr	x1, [x1, #:lo12:.LANCHOR9]
 	asr	x2, x2, 1
-	ldr	x8, [x8, #:lo12:.LANCHOR9]
+	ldr	x8, [x8, #:lo12:.LANCHOR11]
 	ldrh	w4, [x19, 2]
 	mul	x2, x2, x24
 	and	x7, x2, 65535
@@ -5357,7 +5456,7 @@ print_list_info:
 	ldrh	w19, [x19]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L929
+	beq	.L919
 	ldr	x0, [x23, #:lo12:.LANCHOR4]
 	mov	w1, 6
 	add	w20, w20, 1
@@ -5365,8 +5464,8 @@ print_list_info:
 	umaddl	x19, w19, w1, x0
 	ldrh	w0, [x21]
 	cmp	w0, w20
-	bcs	.L933
-.L929:
+	bcs	.L923
+.L919:
 	ldp	x19, x20, [sp, 48]
 	ldp	x21, x22, [sp, 64]
 	ldp	x23, x24, [sp, 80]
@@ -5397,20 +5496,20 @@ dump_all_list_info:
 	add	x0, x0, :lo12:.LANCHOR108
 	bl	print_list_info
 	adrp	x1, .LANCHOR97
-	adrp	x0, .LANCHOR12
+	adrp	x0, .LANCHOR95
 	add	x1, x1, :lo12:.LANCHOR97
-	add	x0, x0, :lo12:.LANCHOR12
+	add	x0, x0, :lo12:.LANCHOR95
 	bl	print_list_info
 	adrp	x1, .LANCHOR99
-	adrp	x0, .LANCHOR89
+	adrp	x0, .LANCHOR90
 	add	x1, x1, :lo12:.LANCHOR99
-	add	x0, x0, :lo12:.LANCHOR89
+	add	x0, x0, :lo12:.LANCHOR90
 	bl	print_list_info
 	ldp	x29, x30, [sp], 16
-	adrp	x1, .LANCHOR93
-	adrp	x0, .LANCHOR88
-	add	x1, x1, :lo12:.LANCHOR93
-	add	x0, x0, :lo12:.LANCHOR88
+	adrp	x1, .LANCHOR91
+	adrp	x0, .LANCHOR92
+	add	x1, x1, :lo12:.LANCHOR91
+	add	x0, x0, :lo12:.LANCHOR92
 	b	print_list_info
 	.size	dump_all_list_info, .-dump_all_list_info
 	.section	.text.ftl_tmp_into_update,"ax",@progbits
@@ -5422,36 +5521,36 @@ ftl_tmp_into_update:
 	ldr	x0, [x0, #:lo12:.LANCHOR110]
 	ldr	w1, [x0, 16]
 	cmp	w1, 2048
-	bls	.L938
+	bls	.L928
 	ldr	w2, [x0, 20]
 	add	w2, w2, w1, lsr 11
 	and	w1, w1, 2047
 	stp	w1, w2, [x0, 16]
-.L938:
+.L928:
 	ldr	w1, [x0, 24]
 	cmp	w1, 2048
-	bls	.L939
+	bls	.L929
 	ldr	w2, [x0, 28]
 	add	w2, w2, w1, lsr 11
 	and	w1, w1, 2047
 	stp	w1, w2, [x0, 24]
-.L939:
+.L929:
 	ldr	w1, [x0, 32]
 	cmp	w1, 1024
-	bls	.L940
+	bls	.L930
 	ldr	w2, [x0, 36]
 	add	w2, w2, w1, lsr 10
 	and	w1, w1, 1023
 	stp	w1, w2, [x0, 32]
-.L940:
+.L930:
 	ldr	w1, [x0, 40]
 	cmp	w1, 1024
-	bls	.L937
+	bls	.L927
 	ldr	w2, [x0, 44]
 	add	w2, w2, w1, lsr 10
 	and	w1, w1, 1023
 	stp	w1, w2, [x0, 40]
-.L937:
+.L927:
 	ret
 	.size	ftl_tmp_into_update, .-ftl_tmp_into_update
 	.section	.text.ftl_get_blk_list_in_sblk,"ax",@progbits
@@ -5459,21 +5558,21 @@ ftl_tmp_into_update:
 	.global	ftl_get_blk_list_in_sblk
 	.type	ftl_get_blk_list_in_sblk, %function
 ftl_get_blk_list_in_sblk:
-	adrp	x2, .LANCHOR7
+	adrp	x2, .LANCHOR9
 	and	w0, w0, 65535
 	mov	w7, 24
-	adrp	x8, .LANCHOR75
-	ldr	x2, [x2, #:lo12:.LANCHOR7]
-	add	x8, x8, :lo12:.LANCHOR75
+	adrp	x8, .LANCHOR74
+	ldr	x2, [x2, #:lo12:.LANCHOR9]
+	add	x8, x8, :lo12:.LANCHOR74
 	mov	w3, 0
 	add	x2, x2, x0, uxth 2
 	ldrb	w13, [x2, 3]
-	adrp	x2, .LANCHOR80
-	ldrb	w11, [x2, #:lo12:.LANCHOR80]
-	adrp	x2, .LANCHOR76
-	ldrb	w6, [x2, #:lo12:.LANCHOR76]
-	adrp	x2, .LANCHOR32
-	ldrb	w2, [x2, #:lo12:.LANCHOR32]
+	adrp	x2, .LANCHOR79
+	ldrb	w11, [x2, #:lo12:.LANCHOR79]
+	adrp	x2, .LANCHOR75
+	ldrb	w6, [x2, #:lo12:.LANCHOR75]
+	adrp	x2, .LANCHOR31
+	ldrb	w2, [x2, #:lo12:.LANCHOR31]
 	sub	w7, w7, w2
 	and	w2, w6, 65535
 	mul	w0, w0, w2
@@ -5481,18 +5580,18 @@ ftl_get_blk_list_in_sblk:
 	sxth	w5, w2
 	and	w4, w0, 65535
 	mov	w0, 0
-.L943:
+.L933:
 	cmp	w3, w11
-	blt	.L947
+	blt	.L937
 	sxtw	x2, w0
 	mov	w3, -1
-.L948:
+.L938:
 	cmp	w11, w2
-	bgt	.L949
+	bgt	.L939
 	ret
-.L947:
+.L937:
 	asr	w2, w13, w3
-	tbnz	x2, 0, .L944
+	tbnz	x2, 0, .L934
 	sdiv	w2, w3, w6
 	ldrh	w10, [x8]
 	sbfiz	x12, x0, 1, 32
@@ -5501,21 +5600,21 @@ ftl_get_blk_list_in_sblk:
 	lsl	w2, w2, w10
 	add	w2, w4, w2
 	and	w2, w2, 65535
-	bhi	.L945
-.L950:
+	bhi	.L935
+.L940:
 	add	w0, w0, 1
 	strh	w2, [x1, x12]
-.L944:
+.L934:
 	add	w3, w3, 1
-	b	.L943
-.L945:
+	b	.L933
+.L935:
 	and	w10, w5, w3
 	add	w2, w2, w10
-	b	.L950
-.L949:
+	b	.L940
+.L939:
 	strh	w3, [x1, x2, lsl 1]
 	add	x2, x2, 1
-	b	.L948
+	b	.L938
 	.size	ftl_get_blk_list_in_sblk, .-ftl_get_blk_list_in_sblk
 	.section	.text.ftl_erase_phy_blk,"ax",@progbits
 	.align	2
@@ -5527,34 +5626,34 @@ ftl_erase_phy_blk:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	mov	w21, w1
-	adrp	x1, .LANCHOR32
+	adrp	x1, .LANCHOR31
 	stp	x19, x20, [sp, 16]
 	adrp	x22, .LANCHOR111
-	ldrb	w19, [x1, #:lo12:.LANCHOR32]
+	ldrb	w19, [x1, #:lo12:.LANCHOR31]
 	mov	w1, 24
 	sub	w19, w1, w19
-	adrp	x1, .LANCHOR75
-	ldrh	w1, [x1, #:lo12:.LANCHOR75]
+	adrp	x1, .LANCHOR74
+	ldrh	w1, [x1, #:lo12:.LANCHOR74]
 	sub	w1, w19, w1
 	mov	w19, 1
 	lsl	w19, w19, w1
 	sub	w19, w19, #1
 	and	w19, w19, w0
 	asr	w20, w0, w1
-	adrp	x0, .LANCHOR81
+	adrp	x0, .LANCHOR80
 	sxth	w19, w19
+	ldrb	w0, [x0, #:lo12:.LANCHOR80]
+	cbz	w0, .L942
+	adrp	x0, .LANCHOR81
 	ldrb	w0, [x0, #:lo12:.LANCHOR81]
-	cbz	w0, .L952
-	adrp	x0, .LANCHOR82
-	ldrb	w0, [x0, #:lo12:.LANCHOR82]
-	cbnz	w0, .L952
+	cbnz	w0, .L942
 	ldrh	w2, [x22, #:lo12:.LANCHOR111]
 	cmp	w21, 0
 	cset	w1, eq
 	mov	w0, w20
 	mul	w2, w2, w19
 	bl	flash_erase_block_en
-.L952:
+.L942:
 	ldrh	w2, [x22, #:lo12:.LANCHOR111]
 	mov	w1, w21
 	mov	w0, w20
@@ -5572,27 +5671,27 @@ ftl_erase_sblk:
 	stp	x29, x30, [sp, -176]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR7
+	adrp	x23, .LANCHOR9
 	stp	x25, x26, [sp, 64]
 	and	w26, w0, 65535
-	ldr	x0, [x23, #:lo12:.LANCHOR7]
+	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	adrp	x25, .LANCHOR112
 	stp	x21, x22, [sp, 32]
 	ubfiz	x22, x26, 2, 16
 	add	x0, x0, x22
 	stp	x27, x28, [sp, 80]
 	stp	x19, x20, [sp, 16]
-	adrp	x24, .LANCHOR76
+	adrp	x24, .LANCHOR75
 	mov	w20, w1
 	add	x25, x25, :lo12:.LANCHOR112
 	ldrb	w28, [x0, 3]
-	add	x24, x24, :lo12:.LANCHOR76
+	add	x24, x24, :lo12:.LANCHOR75
 	add	x27, x29, 112
 	mov	w19, 0
-.L958:
+.L948:
 	ldrb	w0, [x25]
 	cmp	w19, w0
-	bge	.L969
+	bge	.L959
 	ldrb	w1, [x24]
 	adrp	x0, .LANCHOR111
 	mov	w21, 0
@@ -5601,31 +5700,31 @@ ftl_erase_sblk:
 	mov	w0, 0
 	mul	w6, w19, w1
 	mul	w5, w26, w1
-	b	.L970
-.L960:
+	b	.L960
+.L950:
 	add	w2, w0, w6
 	asr	w2, w28, w2
-	tbnz	x2, 0, .L959
+	tbnz	x2, 0, .L949
 	and	w2, w0, w4
 	add	w2, w2, w5
 	mul	w2, w2, w3
 	str	w2, [x27, w21, sxtw 2]
 	add	w21, w21, 1
-.L959:
+.L949:
 	add	w0, w0, 1
-.L970:
+.L960:
 	cmp	w0, w1
-	blt	.L960
+	blt	.L950
 	cmp	w1, 4
-	bne	.L961
+	bne	.L951
 	mov	x3, 0
-.L962:
+.L952:
 	cmp	w21, w3
-	bgt	.L963
-.L964:
+	bgt	.L953
+.L954:
 	add	w19, w19, 1
-	b	.L958
-.L963:
+	b	.L948
+.L953:
 	ldr	w2, [x27, x3, lsl 2]
 	mov	w1, w20
 	str	x3, [x29, 104]
@@ -5633,51 +5732,51 @@ ftl_erase_sblk:
 	bl	flash_erase_block_en
 	ldr	x3, [x29, 104]
 	add	x3, x3, 1
-	b	.L962
-.L961:
+	b	.L952
+.L951:
 	cmp	w21, 2
-	bne	.L965
+	bne	.L955
+	adrp	x0, .LANCHOR80
+	ldrb	w0, [x0, #:lo12:.LANCHOR80]
+	cbz	w0, .L956
 	adrp	x0, .LANCHOR81
 	ldrb	w0, [x0, #:lo12:.LANCHOR81]
-	cbz	w0, .L966
-	adrp	x0, .LANCHOR82
-	ldrb	w0, [x0, #:lo12:.LANCHOR82]
-	cbnz	w0, .L966
+	cbnz	w0, .L956
 	ldp	w2, w3, [x29, 112]
 	cmp	w20, 0
 	cset	w1, eq
 	mov	w0, w19
 	bl	flash_erase_duplane_block
-.L966:
+.L956:
 	ldp	w2, w3, [x29, 112]
 	mov	w1, w20
 	mov	w0, w19
 	bl	flash_erase_duplane_block
-	b	.L964
-.L965:
+	b	.L954
+.L955:
 	cmp	w21, 1
-	bne	.L964
+	bne	.L954
+	adrp	x0, .LANCHOR80
+	ldrb	w0, [x0, #:lo12:.LANCHOR80]
+	cbz	w0, .L958
 	adrp	x0, .LANCHOR81
 	ldrb	w0, [x0, #:lo12:.LANCHOR81]
-	cbz	w0, .L968
-	adrp	x0, .LANCHOR82
-	ldrb	w0, [x0, #:lo12:.LANCHOR82]
-	cbnz	w0, .L968
+	cbnz	w0, .L958
 	ldr	w2, [x29, 112]
 	cmp	w20, 0
 	cset	w1, eq
 	mov	w0, w19
 	bl	flash_erase_block_en
-.L968:
+.L958:
 	ldr	w2, [x29, 112]
 	mov	w1, w20
 	mov	w0, w19
 	bl	flash_erase_block_en
-	b	.L964
-.L969:
+	b	.L954
+.L959:
 	adrp	x2, .LANCHOR110
-	ldr	x3, [x23, #:lo12:.LANCHOR7]
-	cbnz	w20, .L971
+	ldr	x3, [x23, #:lo12:.LANCHOR9]
+	cbnz	w20, .L961
 	ldrh	w1, [x3, x22]
 	add	w0, w1, 1
 	and	w0, w0, 2047
@@ -5689,9 +5788,9 @@ ftl_erase_sblk:
 	str	w2, [x1, 84]
 	ldrh	w2, [x1, 96]
 	cmp	w2, w0
-	bge	.L973
+	bge	.L963
 	strh	w0, [x1, 96]
-.L973:
+.L963:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -5700,7 +5799,7 @@ ftl_erase_sblk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L971:
+.L961:
 	ldr	w1, [x3, x22]
 	ubfx	x0, x1, 11, 8
 	add	w0, w0, 1
@@ -5714,9 +5813,9 @@ ftl_erase_sblk:
 	str	w2, [x1, 80]
 	ldrh	w2, [x1, 98]
 	cmp	w2, w0
-	bcs	.L973
+	bcs	.L963
 	strh	w0, [x1, 98]
-	b	.L973
+	b	.L963
 	.size	ftl_erase_sblk, .-ftl_erase_sblk
 	.section	.text.ftl_alloc_sys_blk,"ax",@progbits
 	.align	2
@@ -5731,37 +5830,37 @@ ftl_alloc_sys_blk:
 	str	x19, [sp, 16]
 	mov	x19, x0
 	cmp	w2, 63
-	bls	.L983
+	bls	.L973
 	strh	wzr, [x1, 136]
-.L983:
+.L973:
 	ldrh	w0, [x1, 112]
-	cbnz	w0, .L984
+	cbnz	w0, .L974
 	adrp	x1, .LANCHOR113
 	adrp	x0, .LC0
-	mov	w2, 1283
+	mov	w2, 1359
 	add	x1, x1, :lo12:.LANCHOR113
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L984:
+.L974:
 	ldr	x1, [x19, #:lo12:.LANCHOR110]
 	mov	w5, 65535
-.L987:
+.L977:
 	ldrh	w2, [x1, 136]
-.L985:
+.L975:
 	mov	w3, w2
 	cmp	w2, 63
-	ble	.L986
+	ble	.L976
 	strh	wzr, [x1, 136]
-	b	.L987
-.L986:
+	b	.L977
+.L976:
 	add	x4, x2, 1
 	add	x0, x1, x4, lsl 1
 	ldrh	w0, [x0, 158]
 	cmp	w0, w5
-	bne	.L990
+	bne	.L980
 	mov	x2, x4
-	b	.L985
-.L990:
+	b	.L975
+.L980:
 	add	x3, x1, x3, sxtw 1
 	mov	w4, -1
 	ldr	x19, [sp, 16]
@@ -5787,35 +5886,35 @@ ftl_free_sys_blk:
 	ldr	x1, [x0, #:lo12:.LANCHOR110]
 	ldrh	w2, [x1, 138]
 	cmp	w2, 63
-	bls	.L993
+	bls	.L983
 	strh	wzr, [x1, 138]
-.L993:
+.L983:
 	ldrh	w0, [x1, 112]
 	cmp	w0, 63
-	bls	.L994
+	bls	.L984
 	adrp	x1, .LANCHOR114
 	adrp	x0, .LC0
-	mov	w2, 1310
+	mov	w2, 1386
 	add	x1, x1, :lo12:.LANCHOR114
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L994:
+.L984:
 	ldr	x0, [x19, #:lo12:.LANCHOR110]
 	mov	w4, 65535
-.L997:
+.L987:
 	ldrh	w1, [x0, 138]
-.L995:
+.L985:
 	mov	w2, w1
 	cmp	w1, 63
-	ble	.L996
+	ble	.L986
 	strh	wzr, [x0, 138]
-	b	.L997
-.L996:
+	b	.L987
+.L986:
 	add	x3, x1, 1
 	add	x5, x0, x3, lsl 1
 	ldrh	w5, [x5, 158]
 	cmp	w5, w4
-	bne	.L998
+	bne	.L988
 	add	x2, x0, x2, sxtw 1
 	strh	w20, [x2, 160]
 	strh	w1, [x0, 138]
@@ -5825,9 +5924,9 @@ ftl_free_sys_blk:
 	strh	w1, [x0, 112]
 	ldp	x29, x30, [sp], 32
 	ret
-.L998:
+.L988:
 	mov	x1, x3
-	b	.L995
+	b	.L985
 	.size	ftl_free_sys_blk, .-ftl_free_sys_blk
 	.section	.text.ftl_info_data_recovery,"ax",@progbits
 	.align	2
@@ -5837,18 +5936,18 @@ ftl_info_data_recovery:
 	ldrh	w2, [x0]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L1011
+	beq	.L1001
 	stp	x29, x30, [sp, -48]!
-	adrp	x1, .LANCHOR7
+	adrp	x1, .LANCHOR9
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	ubfiz	x19, x2, 2, 16
-	ldr	x20, [x1, #:lo12:.LANCHOR7]
+	ldr	x20, [x1, #:lo12:.LANCHOR9]
 	str	x21, [sp, 32]
 	add	x21, x20, x19
 	ldrb	w1, [x21, 2]
 	tst	w1, 224
-	bne	.L1001
+	bne	.L991
 	ldrb	w0, [x0, 4]
 	bfi	w1, w0, 5, 3
 	strb	w1, [x21, 2]
@@ -5857,14 +5956,14 @@ ftl_info_data_recovery:
 	ldrb	w0, [x21, 2]
 	adrp	x1, .LANCHOR110
 	ldr	x3, [x1, #:lo12:.LANCHOR110]
-	tbz	x0, 3, .L1005
+	tbz	x0, 3, .L995
 	ldrh	w2, [x3, 116]
 	sub	w2, w2, #1
 	strh	w2, [x3, 116]
-.L1006:
+.L996:
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L1008
+	bne	.L998
 	ldr	w0, [x20, x19]
 	ldr	x1, [x1, #:lo12:.LANCHOR110]
 	ubfx	x2, x0, 11, 8
@@ -5874,44 +5973,44 @@ ftl_info_data_recovery:
 	ldrh	w0, [x1, 120]
 	sub	w0, w0, #1
 	strh	w0, [x1, 120]
-.L1001:
+.L991:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1005:
+.L995:
 	tst	w0, 24
-	bne	.L1007
+	bne	.L997
 	ldrh	w2, [x3, 114]
 	sub	w2, w2, #1
 	strh	w2, [x3, 114]
-	b	.L1006
-.L1007:
+	b	.L996
+.L997:
 	ldrh	w2, [x3, 118]
 	sub	w2, w2, #1
 	strh	w2, [x3, 118]
-	b	.L1006
-.L1008:
+	b	.L996
+.L998:
 	ldrh	w2, [x20, x19]
 	cmp	w0, 64
 	add	w3, w2, 1
 	bfi	w2, w3, 0, 11
 	strh	w2, [x20, x19]
-	bne	.L1009
+	bne	.L999
 	ldr	x1, [x1, #:lo12:.LANCHOR110]
 	ldrh	w0, [x1, 122]
 	sub	w0, w0, #1
 	strh	w0, [x1, 122]
-	b	.L1001
-.L1009:
+	b	.L991
+.L999:
 	cmp	w0, 96
-	bne	.L1001
+	bne	.L991
 	ldr	x1, [x1, #:lo12:.LANCHOR110]
 	ldrh	w0, [x1, 124]
 	sub	w0, w0, #1
 	strh	w0, [x1, 124]
-	b	.L1001
-.L1011:
+	b	.L991
+.L1001:
 	ret
 	.size	ftl_info_data_recovery, .-ftl_info_data_recovery
 	.section	.text.ftl_get_ppa_from_index,"ax",@progbits
@@ -5920,20 +6019,20 @@ ftl_info_data_recovery:
 	.type	ftl_get_ppa_from_index, %function
 ftl_get_ppa_from_index:
 	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LANCHOR10
-	adrp	x3, .LANCHOR80
+	adrp	x1, .LANCHOR12
+	adrp	x3, .LANCHOR79
 	and	w0, w0, 65535
 	add	x29, sp, 0
-	ldr	x2, [x1, #:lo12:.LANCHOR10]
-	adrp	x1, .LANCHOR95
-	ldrb	w3, [x3, #:lo12:.LANCHOR80]
-	ldrh	w1, [x1, #:lo12:.LANCHOR95]
+	ldr	x2, [x1, #:lo12:.LANCHOR12]
+	adrp	x1, .LANCHOR94
+	ldrb	w3, [x3, #:lo12:.LANCHOR79]
+	ldrh	w1, [x1, #:lo12:.LANCHOR94]
 	stp	x19, x20, [sp, 16]
 	mul	w1, w1, w3
 	cmp	w0, w1
-	bge	.L1015
+	bge	.L1005
 	add	x2, x2, 16
-.L1016:
+.L1006:
 	ldrb	w1, [x2, 9]
 	sdiv	w19, w0, w1
 	msub	w0, w19, w1, w0
@@ -5941,25 +6040,25 @@ ftl_get_ppa_from_index:
 	ldrh	w20, [x0, 16]
 	mov	w0, 65535
 	cmp	w20, w0
-	bne	.L1017
+	bne	.L1007
 	adrp	x1, .LANCHOR115
 	adrp	x0, .LC0
-	mov	w2, 1937
+	mov	w2, 1945
 	add	x1, x1, :lo12:.LANCHOR115
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1017:
+.L1007:
 	adrp	x0, .LANCHOR111
 	ldrh	w0, [x0, #:lo12:.LANCHOR111]
 	madd	w0, w0, w20, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1015:
+.L1005:
 	sub	w0, w0, w1
 	add	x2, x2, 48
 	and	w0, w0, 65535
-	b	.L1016
+	b	.L1006
 	.size	ftl_get_ppa_from_index, .-ftl_get_ppa_from_index
 	.section	.text.lpa_hash_get_ppa,"ax",@progbits
 	.align	2
@@ -5975,21 +6074,21 @@ lpa_hash_get_ppa:
 	ldr	x4, [x2, #:lo12:.LANCHOR117]
 	adrp	x2, .LANCHOR118
 	ldr	x5, [x2, #:lo12:.LANCHOR118]
-.L1020:
+.L1010:
 	cmp	w1, w3
-	bne	.L1022
+	bne	.L1012
 	mov	w0, -1
 	ret
-.L1022:
+.L1012:
 	uxtw	x2, w1
 	ldr	w6, [x4, x2, lsl 2]
 	cmp	w0, w6
-	bne	.L1021
+	bne	.L1011
 	mov	w0, w1
 	b	ftl_get_ppa_from_index
-.L1021:
+.L1011:
 	ldrh	w1, [x5, x2, lsl 1]
-	b	.L1020
+	b	.L1010
 	.size	lpa_hash_get_ppa, .-lpa_hash_get_ppa
 	.section	.text.ftl_get_new_free_page,"ax",@progbits
 	.align	2
@@ -6003,45 +6102,45 @@ ftl_get_new_free_page:
 	mov	x19, x0
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1024
+	bne	.L1014
 	adrp	x1, .LANCHOR119
 	adrp	x0, .LC0
-	mov	w2, 2080
+	mov	w2, 2088
 	add	x1, x1, :lo12:.LANCHOR119
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1024:
-	adrp	x0, .LANCHOR95
+.L1014:
+	adrp	x0, .LANCHOR94
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x0, #:lo12:.LANCHOR95]
+	ldrh	w0, [x0, #:lo12:.LANCHOR94]
 	cmp	w1, w0
-	bne	.L1025
+	bne	.L1015
 	adrp	x1, .LANCHOR119
 	adrp	x0, .LC0
-	mov	w2, 2081
+	mov	w2, 2089
 	add	x1, x1, :lo12:.LANCHOR119
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1025:
+.L1015:
 	ldrh	w0, [x19, 6]
-	cbnz	w0, .L1026
+	cbnz	w0, .L1016
 	adrp	x1, .LANCHOR119
 	adrp	x0, .LC0
-	mov	w2, 2082
+	mov	w2, 2090
 	add	x1, x1, :lo12:.LANCHOR119
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1026:
+.L1016:
 	ldrb	w0, [x19, 5]
 	mov	w2, 65535
 	add	x0, x0, 8
 	ldrh	w3, [x19, x0, lsl 1]
-	adrp	x0, .LANCHOR80
-	ldrb	w4, [x0, #:lo12:.LANCHOR80]
-.L1027:
+	adrp	x0, .LANCHOR79
+	ldrb	w4, [x0, #:lo12:.LANCHOR79]
+.L1017:
 	cmp	w3, w2
 	ldrb	w1, [x19, 5]
-	beq	.L1029
+	beq	.L1019
 	adrp	x0, .LANCHOR111
 	add	w1, w1, 1
 	and	w1, w1, 255
@@ -6057,29 +6156,29 @@ ftl_get_new_free_page:
 	orr	w0, w0, w2
 	add	w3, w3, 1
 	strh	w3, [x19, 10]
-	bne	.L1023
+	bne	.L1013
 	add	w2, w2, 1
 	strb	wzr, [x19, 5]
 	strh	w2, [x19, 2]
-.L1023:
+.L1013:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1029:
+.L1019:
 	add	w1, w1, 1
 	and	w1, w1, 255
 	strb	w1, [x19, 5]
 	cmp	w1, w4
-	bne	.L1028
+	bne	.L1018
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 5]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L1028:
+.L1018:
 	ldrb	w0, [x19, 5]
 	add	x0, x0, 8
 	ldrh	w3, [x19, x0, lsl 1]
-	b	.L1027
+	b	.L1017
 	.size	ftl_get_new_free_page, .-ftl_get_new_free_page
 	.section	.text.ftl_ext_alloc_new_blk,"ax",@progbits
 	.align	2
@@ -6095,14 +6194,14 @@ ftl_ext_alloc_new_blk:
 	mov	w19, w0
 	sub	w0, w0, #1
 	cmp	w1, w0, uxth
-	bcs	.L1033
+	bcs	.L1023
 	adrp	x1, .LANCHOR120
 	adrp	x0, .LC0
-	mov	w2, 2117
+	mov	w2, 2125
 	add	x1, x1, :lo12:.LANCHOR120
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1033:
+.L1023:
 	adrp	x20, .LANCHOR110
 	mov	w1, 0
 	mov	w0, w19
@@ -6127,54 +6226,54 @@ ftl_total_vpn_update:
 	mov	x3, x2
 	ldrh	w1, [x2, #:lo12:.LANCHOR121]
 	cmp	w1, 4
-	bhi	.L1036
-	cbnz	w0, .L1036
+	bhi	.L1026
+	cbnz	w0, .L1026
 	add	w1, w1, 1
 	strh	w1, [x2, #:lo12:.LANCHOR121]
 	ret
-.L1036:
-	adrp	x0, .LANCHOR6
+.L1026:
+	adrp	x0, .LANCHOR8
 	strh	wzr, [x3, #:lo12:.LANCHOR121]
 	mov	x1, 0
 	mov	w2, 0
-	ldrh	w5, [x0, #:lo12:.LANCHOR6]
-	adrp	x0, .LANCHOR9
+	ldrh	w5, [x0, #:lo12:.LANCHOR8]
+	adrp	x0, .LANCHOR11
 	mov	w8, 65535
-	ldr	x6, [x0, #:lo12:.LANCHOR9]
-	adrp	x0, .LANCHOR7
-	ldr	x7, [x0, #:lo12:.LANCHOR7]
+	ldr	x6, [x0, #:lo12:.LANCHOR11]
+	adrp	x0, .LANCHOR9
+	ldr	x7, [x0, #:lo12:.LANCHOR9]
 	mov	w0, 0
-.L1038:
+.L1028:
 	cmp	w5, w1, uxth
-	bhi	.L1041
-	adrp	x1, .LANCHOR10
-	ldr	x1, [x1, #:lo12:.LANCHOR10]
+	bhi	.L1031
+	adrp	x1, .LANCHOR12
+	ldr	x1, [x1, #:lo12:.LANCHOR12]
 	str	w2, [x1, 524]
 	adrp	x2, .LANCHOR110
 	str	w0, [x1, 528]
 	ldr	x2, [x2, #:lo12:.LANCHOR110]
 	ldrh	w2, [x2, 120]
-	cbz	w2, .L1035
+	cbz	w2, .L1025
 	udiv	w0, w0, w2
 	str	w0, [x1, 532]
-.L1035:
+.L1025:
 	ret
-.L1041:
+.L1031:
 	ldrh	w3, [x6, x1, lsl 1]
 	cmp	w3, w8
-	beq	.L1039
+	beq	.L1029
 	add	x4, x7, x1, lsl 2
 	ldrb	w4, [x4, 2]
 	and	w4, w4, 224
 	cmp	w4, 160
-	bne	.L1040
+	bne	.L1030
 	add	w0, w0, w3
-.L1039:
+.L1029:
 	add	x1, x1, 1
-	b	.L1038
-.L1040:
+	b	.L1028
+.L1030:
 	add	w2, w2, w3
-	b	.L1039
+	b	.L1029
 	.size	ftl_total_vpn_update, .-ftl_total_vpn_update
 	.section	.text.ftl_vpn_update,"ax",@progbits
 	.align	2
@@ -6187,21 +6286,21 @@ ftl_vpn_update:
 	and	w19, w0, 65535
 	mov	w0, w19
 	bl	zftl_list_update_data_list
-	adrp	x0, .LANCHOR9
+	adrp	x0, .LANCHOR11
 	ubfiz	x19, x19, 1, 16
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrh	w0, [x0, x19]
-	cbnz	w0, .L1048
+	cbnz	w0, .L1038
 	adrp	x1, .LANCHOR122
 	mov	w0, 1
 	str	w0, [x1, #:lo12:.LANCHOR122]
-.L1046:
+.L1036:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1048:
+.L1038:
 	mov	w0, 0
-	b	.L1046
+	b	.L1036
 	.size	ftl_vpn_update, .-ftl_vpn_update
 	.section	.text.ftl_vpn_decrement,"ax",@progbits
 	.align	2
@@ -6214,16 +6313,16 @@ ftl_vpn_decrement:
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1051
-	adrp	x0, .LANCHOR9
+	beq	.L1041
+	adrp	x0, .LANCHOR11
 	uxtw	x1, w19
 	lsl	x2, x1, 1
-	ldr	x3, [x0, #:lo12:.LANCHOR9]
+	ldr	x3, [x0, #:lo12:.LANCHOR11]
 	ldrh	w0, [x3, x2]
-	cbnz	w0, .L1052
-	adrp	x0, .LANCHOR7
+	cbnz	w0, .L1042
+	adrp	x0, .LANCHOR9
 	mov	w2, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR7]
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	add	x1, x0, x1, lsl 2
 	adrp	x0, .LC65
 	add	x0, x0, :lo12:.LC65
@@ -6231,40 +6330,40 @@ ftl_vpn_decrement:
 	mov	w1, w19
 	ubfx	x3, x3, 5, 3
 	bl	printf
-.L1057:
+.L1047:
 	mov	w0, 0
-	b	.L1050
-.L1052:
+	b	.L1040
+.L1042:
 	sub	w0, w0, #1
 	strh	w0, [x3, x2]
-.L1051:
-	adrp	x20, .LANCHOR73
-	ldrh	w0, [x20, #:lo12:.LANCHOR73]
+.L1041:
+	adrp	x20, .LANCHOR72
+	ldrh	w0, [x20, #:lo12:.LANCHOR72]
 	cmp	w19, w0
-	beq	.L1057
+	beq	.L1047
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L1054
-	strh	w19, [x20, #:lo12:.LANCHOR73]
-	b	.L1057
-.L1054:
+	bne	.L1044
+	strh	w19, [x20, #:lo12:.LANCHOR72]
+	b	.L1047
+.L1044:
 	bl	ftl_vpn_update
 	cmp	w0, 0
 	adrp	x1, .LANCHOR123
 	cset	w0, ne
-	ldrh	w3, [x20, #:lo12:.LANCHOR73]
+	ldrh	w3, [x20, #:lo12:.LANCHOR72]
 	ldrh	w2, [x1, #:lo12:.LANCHOR123]
-	strh	w19, [x20, #:lo12:.LANCHOR73]
+	strh	w19, [x20, #:lo12:.LANCHOR72]
 	add	w2, w2, 1
 	and	w2, w2, 65535
 	cmp	w2, 7
 	csel	w2, w2, wzr, ls
 	strh	w2, [x1, #:lo12:.LANCHOR123]
 	and	x2, x2, 65535
-	adrp	x1, .LANCHOR74
-	add	x1, x1, :lo12:.LANCHOR74
+	adrp	x1, .LANCHOR73
+	add	x1, x1, :lo12:.LANCHOR73
 	strh	w3, [x1, x2, lsl 1]
-.L1050:
+.L1040:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -6285,27 +6384,27 @@ lpa_hash_update_ppa:
 	ldr	x8, [x4, #:lo12:.LANCHOR117]
 	adrp	x4, .LANCHOR118
 	ldr	x4, [x4, #:lo12:.LANCHOR118]
-.L1060:
+.L1050:
 	cmp	w6, w12
-	beq	.L1064
+	beq	.L1054
 	uxtw	x11, w6
 	lsl	x10, x11, 2
 	add	x13, x8, x10
 	ldr	w10, [x8, x10]
 	cmp	w0, w10
 	lsl	x10, x11, 1
-	bne	.L1061
+	bne	.L1051
 	mov	w6, -1
 	str	w6, [x13]
 	cmp	w7, w12
-	bne	.L1062
+	bne	.L1052
 	add	x6, x3, :lo12:.LANCHOR116
 	ldrh	w7, [x4, x10]
 	strh	w7, [x6, x5, lsl 1]
-.L1063:
+.L1053:
 	mov	w6, -1
 	strh	w6, [x4, x11, lsl 1]
-.L1064:
+.L1054:
 	uxtw	x6, w2
 	add	x3, x3, :lo12:.LANCHOR116
 	cmn	w1, #1
@@ -6313,13 +6412,13 @@ lpa_hash_update_ppa:
 	ldrh	w0, [x3, x5, lsl 1]
 	strh	w2, [x3, x5, lsl 1]
 	strh	w0, [x4, x6, lsl 1]
-	beq	.L1071
+	beq	.L1061
 	stp	x29, x30, [sp, -16]!
-	adrp	x0, .LANCHOR75
+	adrp	x0, .LANCHOR74
 	add	x29, sp, 0
-	ldrh	w3, [x0, #:lo12:.LANCHOR75]
-	adrp	x0, .LANCHOR32
-	ldrb	w2, [x0, #:lo12:.LANCHOR32]
+	ldrh	w3, [x0, #:lo12:.LANCHOR74]
+	adrp	x0, .LANCHOR31
+	ldrb	w2, [x0, #:lo12:.LANCHOR31]
 	mov	w0, 24
 	lsr	w1, w1, w3
 	sub	w0, w0, w2
@@ -6328,22 +6427,22 @@ lpa_hash_update_ppa:
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
 	and	w1, w0, w1
-	adrp	x0, .LANCHOR76
-	ldrb	w0, [x0, #:lo12:.LANCHOR76]
+	adrp	x0, .LANCHOR75
+	ldrb	w0, [x0, #:lo12:.LANCHOR75]
 	udiv	w0, w1, w0
 	bl	ftl_vpn_decrement
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
-.L1062:
+.L1052:
 	ldrh	w6, [x4, x10]
 	strh	w6, [x4, w7, uxtw 1]
-	b	.L1063
-.L1061:
+	b	.L1053
+.L1051:
 	mov	w7, w6
 	ldrh	w6, [x4, x10]
-	b	.L1060
-.L1071:
+	b	.L1050
+.L1061:
 	mov	w0, -1
 	ret
 	.size	lpa_hash_update_ppa, .-lpa_hash_update_ppa
@@ -6353,25 +6452,25 @@ lpa_hash_update_ppa:
 	.type	ftl_mask_bad_block, %function
 ftl_mask_bad_block:
 	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LANCHOR32
+	adrp	x1, .LANCHOR31
 	mov	w6, 24
 	mov	w4, 1
 	add	x29, sp, 0
-	ldrb	w1, [x1, #:lo12:.LANCHOR32]
+	ldrb	w1, [x1, #:lo12:.LANCHOR31]
 	stp	x19, x20, [sp, 16]
 	sub	w6, w6, w1
 	lsl	w1, w4, w1
 	sub	w1, w1, #1
 	lsr	w2, w0, w6
 	and	w1, w1, w2
-	adrp	x2, .LANCHOR76
+	adrp	x2, .LANCHOR75
 	and	w1, w1, 255
-	ldrb	w5, [x2, #:lo12:.LANCHOR76]
+	ldrb	w5, [x2, #:lo12:.LANCHOR75]
 	cmp	w5, 1
 	mul	w2, w1, w5
 	and	w19, w2, 255
-	adrp	x2, .LANCHOR75
-	ldrh	w3, [x2, #:lo12:.LANCHOR75]
+	adrp	x2, .LANCHOR74
+	ldrh	w3, [x2, #:lo12:.LANCHOR74]
 	lsr	w0, w0, w3
 	sub	w3, w6, w3
 	lsl	w3, w4, w3
@@ -6380,34 +6479,34 @@ ftl_mask_bad_block:
 	and	w4, w3, 65535
 	udiv	w3, w3, w5
 	and	w20, w3, 65535
-	bls	.L1075
+	bls	.L1065
 	sub	w2, w5, #1
 	and	w2, w2, w4
 	add	w2, w19, w2
 	and	w19, w2, 255
-.L1075:
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 14, .L1076
+.L1065:
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 14, .L1066
 	adrp	x0, .LC66
 	and	w3, w3, 65535
 	mov	w2, w19
 	add	x0, x0, :lo12:.LC66
 	bl	printf
-.L1076:
-	adrp	x0, .LANCHOR6
-	ldrh	w0, [x0, #:lo12:.LANCHOR6]
+.L1066:
+	adrp	x0, .LANCHOR8
+	ldrh	w0, [x0, #:lo12:.LANCHOR8]
 	cmp	w0, w20
-	bls	.L1074
-	adrp	x0, .LANCHOR7
+	bls	.L1064
+	adrp	x0, .LANCHOR9
 	mov	w2, 1
 	lsl	w2, w2, w19
-	ldr	x0, [x0, #:lo12:.LANCHOR7]
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	add	x20, x0, x20, uxth 2
 	ldrb	w19, [x20, 3]
 	orr	w2, w2, w19
 	strb	w2, [x20, 3]
-.L1074:
+.L1064:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -6422,24 +6521,24 @@ gc_free_bad_sblk:
 	stp	x23, x24, [sp, 48]
 	and	w23, w0, 65535
 	str	x27, [sp, 80]
-	adrp	x27, .LANCHOR71
-	add	x0, x27, :lo12:.LANCHOR71
+	adrp	x27, .LANCHOR70
+	add	x0, x27, :lo12:.LANCHOR70
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
-	ldr	w0, [x0, 2120]
-	cbz	w0, .L1097
+	ldr	w0, [x0, 2200]
+	cbz	w0, .L1087
 	adrp	x22, .LC67
 	mov	w24, 20041
 	add	x22, x22, :lo12:.LC67
 	mov	w26, 0
 	movk	w24, 0x444b, lsl 16
-.L1084:
-	adrp	x0, .LANCHOR80
-	ldrb	w0, [x0, #:lo12:.LANCHOR80]
+.L1074:
+	adrp	x0, .LANCHOR79
+	ldrb	w0, [x0, #:lo12:.LANCHOR79]
 	cmp	w0, w26
-	bhi	.L1094
-.L1097:
+	bhi	.L1084
+.L1087:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -6448,84 +6547,84 @@ gc_free_bad_sblk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1094:
-	adrp	x0, .LANCHOR76
-	adrp	x1, .LANCHOR32
-	adrp	x21, .LANCHOR75
-	ldrb	w2, [x0, #:lo12:.LANCHOR76]
-	ldrb	w3, [x1, #:lo12:.LANCHOR32]
+.L1084:
+	adrp	x0, .LANCHOR75
+	adrp	x1, .LANCHOR31
+	adrp	x21, .LANCHOR74
+	ldrb	w2, [x0, #:lo12:.LANCHOR75]
+	ldrb	w3, [x1, #:lo12:.LANCHOR31]
 	mov	w1, 24
 	and	w0, w2, 65535
 	cmp	w2, 1
 	sub	w1, w1, w3
-	ldrh	w3, [x21, #:lo12:.LANCHOR75]
+	ldrh	w3, [x21, #:lo12:.LANCHOR74]
 	sdiv	w19, w26, w2
 	sub	w1, w1, w3
 	lsl	w19, w19, w1
 	madd	w19, w23, w0, w19
 	and	w19, w19, 65535
-	bls	.L1085
+	bls	.L1075
 	sub	w0, w0, #1
 	and	w0, w0, w26
 	add	w19, w19, w0
 	and	w19, w19, 65535
-.L1085:
+.L1075:
 	adrp	x25, .LANCHOR124
 	add	x25, x25, :lo12:.LANCHOR124
 	mov	w20, 0
-.L1086:
-	add	x0, x27, :lo12:.LANCHOR71
-	ldr	w1, [x0, 2120]
+.L1076:
+	add	x0, x27, :lo12:.LANCHOR70
+	ldr	w1, [x0, 2200]
 	cmp	w20, w1
-	bcc	.L1093
+	bcc	.L1083
 	add	w26, w26, 1
 	and	w26, w26, 65535
-	b	.L1084
-.L1093:
+	b	.L1074
+.L1083:
 	add	x0, x0, x20, sxtw 1
-	ldrh	w0, [x0, 2124]
+	ldrh	w0, [x0, 2204]
 	cmp	w0, w19
-	bne	.L1087
+	bne	.L1077
 	mov	w1, w19
 	mov	x0, x22
 	bl	printf
 	ldrb	w0, [x25]
-	cbnz	w0, .L1088
-	adrp	x0, .LANCHOR81
-	ldrb	w0, [x0, #:lo12:.LANCHOR81]
-	cbz	w0, .L1089
-.L1088:
+	cbnz	w0, .L1078
+	adrp	x0, .LANCHOR80
+	ldrb	w0, [x0, #:lo12:.LANCHOR80]
+	cbz	w0, .L1079
+.L1078:
 	adrp	x0, .LANCHOR110
 	ldr	x0, [x0, #:lo12:.LANCHOR110]
 	ldr	w0, [x0, 156]
 	cmp	w0, w24
-	beq	.L1090
-.L1089:
-	ldrh	w0, [x21, #:lo12:.LANCHOR75]
+	beq	.L1080
+.L1079:
+	ldrh	w0, [x21, #:lo12:.LANCHOR74]
 	lsl	w0, w19, w0
 	bl	ftl_mask_bad_block
-.L1090:
-	add	x1, x27, :lo12:.LANCHOR71
+.L1080:
+	add	x1, x27, :lo12:.LANCHOR70
 	mov	w0, w20
-	ldr	w2, [x1, 2120]
-.L1091:
+	ldr	w2, [x1, 2200]
+.L1081:
 	cmp	w0, w2
-	bcc	.L1092
-	add	x0, x27, :lo12:.LANCHOR71
+	bcc	.L1082
+	add	x0, x27, :lo12:.LANCHOR70
 	sub	w2, w2, #1
-	str	w2, [x0, 2120]
-.L1087:
+	str	w2, [x0, 2200]
+.L1077:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L1086
-.L1092:
+	b	.L1076
+.L1082:
 	add	w3, w0, 1
 	add	x0, x1, x0, sxtw 1
 	add	x4, x1, x3, sxtw 1
-	ldrh	w4, [x4, 2124]
-	strh	w4, [x0, 2124]
+	ldrh	w4, [x4, 2204]
+	strh	w4, [x0, 2204]
 	and	w0, w3, 65535
-	b	.L1091
+	b	.L1081
 	.size	gc_free_bad_sblk, .-gc_free_bad_sblk
 	.section	.text.ftl_free_sblk,"ax",@progbits
 	.align	2
@@ -6535,17 +6634,17 @@ ftl_free_sblk:
 	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR7
+	adrp	x23, .LANCHOR9
 	and	x24, x0, 65535
 	stp	x19, x20, [sp, 16]
-	ldr	x3, [x23, #:lo12:.LANCHOR7]
+	ldr	x3, [x23, #:lo12:.LANCHOR9]
 	lsl	x19, x24, 2
 	stp	x21, x22, [sp, 32]
 	mov	x21, x24
 	add	x20, x3, x19
 	ldrb	w0, [x20, 2]
 	ubfx	x22, x0, 5, 3
-	tbz	x0, 3, .L1104
+	tbz	x0, 3, .L1094
 	adrp	x2, .LANCHOR110
 	ldrh	w1, [x3, x19]
 	adrp	x8, .LANCHOR125
@@ -6555,9 +6654,9 @@ ftl_free_sblk:
 	ldrh	w8, [x8, #:lo12:.LANCHOR125]
 	ldrh	w4, [x7, 74]
 	ubfx	x5, x2, 11, 8
-	adrp	x2, .LANCHOR8
+	adrp	x2, .LANCHOR10
 	add	w4, w1, w4
-	ldrh	w2, [x2, #:lo12:.LANCHOR8]
+	ldrh	w2, [x2, #:lo12:.LANCHOR10]
 	and	w6, w4, 65535
 	ldrh	w4, [x7, 72]
 	add	w4, w5, w4
@@ -6565,22 +6664,22 @@ ftl_free_sblk:
 	and	w4, w4, 65535
 	add	w7, w7, w4
 	cmp	w7, w8
-	ble	.L1105
+	ble	.L1095
 	adrp	x4, .LANCHOR101
 	adrp	x7, .LANCHOR105
 	ldrh	w6, [x4, #:lo12:.LANCHOR101]
-	adrp	x4, .LANCHOR93
+	adrp	x4, .LANCHOR91
 	ldrh	w7, [x7, #:lo12:.LANCHOR105]
-	ldrh	w4, [x4, #:lo12:.LANCHOR93]
+	ldrh	w4, [x4, #:lo12:.LANCHOR91]
 	add	w6, w6, 7
 	add	w4, w4, w7
 	cmp	w6, w4
-	blt	.L1106
-.L1111:
+	blt	.L1096
+.L1101:
 	mov	w4, 2
 	bfi	w0, w4, 3, 2
-	b	.L1122
-.L1106:
+	b	.L1112
+.L1096:
 	adrp	x4, .LANCHOR98
 	adrp	x7, .LANCHOR103
 	ldrh	w6, [x4, #:lo12:.LANCHOR98]
@@ -6593,15 +6692,15 @@ ftl_free_sblk:
 	ldrh	w7, [x7, #:lo12:.LANCHOR99]
 	add	w4, w4, w7
 	cmp	w6, w4
-	blt	.L1111
-.L1124:
+	blt	.L1101
+.L1114:
 	and	w0, w0, -25
-.L1122:
+.L1112:
 	strb	w0, [x20, 2]
-.L1107:
+.L1097:
 	ldrb	w0, [x20, 2]
 	ands	w0, w0, 24
-	bne	.L1112
+	bne	.L1102
 	mul	w2, w5, w2
 	ldrh	w0, [x3, x19]
 	add	w2, w2, w2, lsl 1
@@ -6612,10 +6711,10 @@ ftl_free_sblk:
 	ldr	w0, [x3, x19]
 	bfi	w0, w2, 11, 8
 	str	w0, [x3, x19]
-.L1113:
+.L1103:
 	mov	w0, w21
 	bl	zftl_remove_data_node
-	ldr	x0, [x23, #:lo12:.LANCHOR7]
+	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	add	w22, w22, 6
 	and	w22, w22, 7
 	add	x19, x0, x19
@@ -6623,26 +6722,26 @@ ftl_free_sblk:
 	ldrb	w0, [x19, 2]
 	and	w0, w0, 31
 	strb	w0, [x19, 2]
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	strh	wzr, [x0, x24, lsl 1]
-	bhi	.L1116
+	bhi	.L1106
 	mov	w0, w21
 	bl	gc_free_bad_sblk
-.L1116:
+.L1106:
 	ldrb	w0, [x20, 2]
-	tbz	x0, 3, .L1117
-	adrp	x0, .LANCHOR10
-	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	tbz	x0, 3, .L1107
+	adrp	x0, .LANCHOR12
+	ldr	x0, [x0, #:lo12:.LANCHOR12]
 	ldrh	w1, [x0, 586]
 	cmp	w1, w21
-	bne	.L1117
+	bne	.L1107
 	mov	w1, -1
 	ldrh	w2, [x0, 590]
 	strh	w1, [x0, 586]
 	mov	w1, 65535
 	cmp	w2, w1
-	bne	.L1117
+	bne	.L1107
 	strh	w21, [x0, 590]
 	mov	w1, w21
 	ldp	x19, x20, [sp, 16]
@@ -6652,12 +6751,12 @@ ftl_free_sblk:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	b	printf
-.L1105:
+.L1095:
 	madd	w4, w2, w4, w6
 	adrp	x6, .LANCHOR126
 	ldrh	w6, [x6, #:lo12:.LANCHOR126]
 	cmp	w4, w6
-	ble	.L1107
+	ble	.L1097
 	adrp	x4, .LANCHOR98
 	adrp	x7, .LANCHOR103
 	ldrh	w6, [x4, #:lo12:.LANCHOR98]
@@ -6670,45 +6769,45 @@ ftl_free_sblk:
 	add	w4, w4, w7
 	add	w7, w6, 7
 	cmp	w7, w4
-	bge	.L1124
+	bge	.L1114
 	adrp	x7, .LANCHOR101
 	adrp	x10, .LANCHOR105
 	ldrh	w8, [x7, #:lo12:.LANCHOR101]
-	adrp	x7, .LANCHOR93
+	adrp	x7, .LANCHOR91
 	ldrh	w10, [x10, #:lo12:.LANCHOR105]
-	ldrh	w7, [x7, #:lo12:.LANCHOR93]
+	ldrh	w7, [x7, #:lo12:.LANCHOR91]
 	add	w8, w8, 7
 	add	w7, w7, w10
 	cmp	w8, w7
-	bge	.L1111
+	bge	.L1101
 	add	w6, w6, 23
 	cmp	w4, w6
-	bgt	.L1111
-	b	.L1124
-.L1112:
+	bgt	.L1101
+	b	.L1114
+.L1102:
 	cmp	w0, 16
-	bne	.L1113
+	bne	.L1103
 	sdiv	w2, w1, w2
 	ldr	w0, [x3, x19]
 	add	w2, w2, w2, lsl 1
 	add	w2, w5, w2, lsr 2
-.L1123:
+.L1113:
 	bfi	w0, w2, 11, 8
 	asr	w1, w1, 5
 	str	w0, [x3, x19]
 	bfi	w0, w1, 0, 11
 	strh	w0, [x3, x19]
-	b	.L1113
-.L1104:
+	b	.L1103
+.L1094:
 	tst	w0, 24
-	bne	.L1113
+	bne	.L1103
 	adrp	x1, .LANCHOR107
 	ldrh	w1, [x1, #:lo12:.LANCHOR107]
-	cbnz	w1, .L1113
+	cbnz	w1, .L1103
 	adrp	x1, .LANCHOR105
 	ldrh	w4, [x1, #:lo12:.LANCHOR105]
 	cmp	w4, 15
-	bhi	.L1113
+	bhi	.L1103
 	adrp	x1, .LANCHOR97
 	adrp	x2, .LANCHOR103
 	ldrh	w1, [x1, #:lo12:.LANCHOR97]
@@ -6721,29 +6820,29 @@ ftl_free_sblk:
 	ldrh	w2, [x2, #:lo12:.LANCHOR98]
 	add	w2, w2, 16
 	cmp	w1, w2
-	ble	.L1113
+	ble	.L1103
 	adrp	x1, .LANCHOR101
 	ldrh	w2, [x1, #:lo12:.LANCHOR101]
-	adrp	x1, .LANCHOR93
-	ldrh	w1, [x1, #:lo12:.LANCHOR93]
+	adrp	x1, .LANCHOR91
+	ldrh	w1, [x1, #:lo12:.LANCHOR91]
 	add	w2, w2, 7
 	add	w1, w1, w4
 	cmp	w2, w1
-	blt	.L1113
+	blt	.L1103
 	mov	w1, 2
 	bfi	w0, w1, 3, 2
 	strb	w0, [x20, 2]
-	adrp	x0, .LANCHOR8
+	adrp	x0, .LANCHOR10
 	ldrh	w1, [x3, x19]
-	ldrh	w0, [x0, #:lo12:.LANCHOR8]
+	ldrh	w0, [x0, #:lo12:.LANCHOR10]
 	and	w1, w1, 2047
 	sdiv	w0, w1, w0
 	add	w2, w0, w0, lsl 1
 	ldr	w0, [x3, x19]
 	ubfx	x4, x0, 11, 8
 	add	w2, w4, w2, lsr 2
-	b	.L1123
-.L1117:
+	b	.L1113
+.L1107:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6759,20 +6858,20 @@ gc_free_src_blk:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR71
+	adrp	x21, .LANCHOR70
 	stp	x23, x24, [sp, 48]
 	adrp	x22, .LC69
-	adrp	x23, .LANCHOR9
-	add	x21, x21, :lo12:.LANCHOR71
+	adrp	x23, .LANCHOR11
+	add	x21, x21, :lo12:.LANCHOR70
 	mov	x24, x23
 	add	x22, x22, :lo12:.LC69
 	stp	x19, x20, [sp, 16]
 	mov	w20, 0
 	stp	x25, x26, [sp, 64]
-.L1126:
+.L1116:
 	ldrh	w0, [x21, 56]
 	cmp	w0, w20
-	bhi	.L1140
+	bhi	.L1130
 	strh	wzr, [x21, 56]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6780,114 +6879,114 @@ gc_free_src_blk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1140:
+.L1130:
 	add	x0, x21, x20, sxtw 1
 	ldrh	w25, [x0, 58]
-	ldr	x0, [x23, #:lo12:.LANCHOR9]
+	ldr	x0, [x23, #:lo12:.LANCHOR11]
 	mov	x19, x25
 	lsl	x26, x25, 1
 	ldrh	w2, [x0, x26]
-	cbz	w2, .L1127
+	cbz	w2, .L1117
 	mov	w1, w25
 	mov	x0, x22
 	bl	printf
-.L1127:
-	ldr	x0, [x24, #:lo12:.LANCHOR9]
+.L1117:
+	ldr	x0, [x24, #:lo12:.LANCHOR11]
 	strh	wzr, [x0, x26]
-	adrp	x0, .LANCHOR7
-	ldr	x0, [x0, #:lo12:.LANCHOR7]
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	add	x25, x0, x25, lsl 2
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L1128
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 8, .L1118
 	ldrb	w2, [x25, 2]
 	adrp	x0, .LC70
 	mov	w1, w19
 	add	x0, x0, :lo12:.LC70
 	ubfx	x2, x2, 5, 3
 	bl	printf
-.L1128:
+.L1118:
 	ldrb	w0, [x25, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L1129
+	beq	.L1119
 	tst	w0, 192
-	bne	.L1130
-.L1129:
+	bne	.L1120
+.L1119:
 	adrp	x1, .LANCHOR127
 	adrp	x0, .LC0
-	mov	w2, 1362
+	mov	w2, 1363
 	add	x1, x1, :lo12:.LANCHOR127
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1130:
+.L1120:
 	mov	w0, w19
 	bl	ftl_free_sblk
-	adrp	x0, .LANCHOR10
-	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	adrp	x0, .LANCHOR12
+	ldr	x0, [x0, #:lo12:.LANCHOR12]
 	ldrh	w2, [x0, 124]
-	cbz	w2, .L1131
+	cbz	w2, .L1121
 	add	x3, x0, 392
 	mov	w1, 0
-.L1133:
+.L1123:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L1132
+	bne	.L1122
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 392]
 	strh	w2, [x0, 124]
-.L1131:
+.L1121:
 	ldrh	w2, [x0, 120]
-	cbz	w2, .L1134
+	cbz	w2, .L1124
 	add	x3, x0, 136
 	mov	w1, 0
-.L1136:
+.L1126:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L1135
+	bne	.L1125
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 136]
 	strh	w2, [x0, 120]
-.L1134:
+.L1124:
 	ldrh	w2, [x0, 122]
-	cbz	w2, .L1137
+	cbz	w2, .L1127
 	add	x3, x0, 264
 	mov	w1, 0
-.L1139:
+.L1129:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L1138
+	bne	.L1128
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 264]
 	strh	w2, [x0, 122]
-.L1137:
+.L1127:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L1126
-.L1132:
+	b	.L1116
+.L1122:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L1133
-	b	.L1131
-.L1135:
+	bne	.L1123
+	b	.L1121
+.L1125:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L1136
-	b	.L1134
-.L1138:
+	bne	.L1126
+	b	.L1124
+.L1128:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L1139
-	b	.L1137
+	bne	.L1129
+	b	.L1127
 	.size	gc_free_src_blk, .-gc_free_src_blk
 	.section	.text.print_ftl_debug_info,"ax",@progbits
 	.align	2
@@ -6903,13 +7002,13 @@ print_ftl_debug_info:
 	adrp	x2, .LANCHOR97
 	stp	x19, x20, [sp, 48]
 	adrp	x19, .LANCHOR110
-	adrp	x20, .LANCHOR10
+	adrp	x20, .LANCHOR12
 	ldrh	w6, [x2, #:lo12:.LANCHOR97]
 	adrp	x2, .LANCHOR107
 	ldr	x1, [x19, #:lo12:.LANCHOR110]
 	ldrh	w5, [x2, #:lo12:.LANCHOR107]
 	adrp	x2, .LANCHOR105
-	ldr	x0, [x20, #:lo12:.LANCHOR10]
+	ldr	x0, [x20, #:lo12:.LANCHOR12]
 	ldrh	w4, [x2, #:lo12:.LANCHOR105]
 	adrp	x2, .LANCHOR103
 	ldr	w8, [x8, #:lo12:.LANCHOR128]
@@ -6921,8 +7020,8 @@ print_ftl_debug_info:
 	str	w8, [sp, 16]
 	ldr	w0, [x0, 524]
 	str	w0, [sp, 8]
-	adrp	x0, .LANCHOR93
-	ldrh	w0, [x0, #:lo12:.LANCHOR93]
+	adrp	x0, .LANCHOR91
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	str	w0, [sp]
 	adrp	x0, .LC71
 	add	x0, x0, :lo12:.LC71
@@ -6961,12 +7060,12 @@ print_ftl_debug_info:
 	adrp	x0, .LC74
 	add	x0, x0, :lo12:.LC74
 	bl	printf
-	adrp	x0, .LANCHOR87
-	ldrh	w5, [x0, #:lo12:.LANCHOR87]
-	adrp	x0, .LANCHOR94
-	ldrh	w4, [x0, #:lo12:.LANCHOR94]
-	adrp	x0, .LANCHOR70
-	ldrh	w3, [x0, #:lo12:.LANCHOR70]
+	adrp	x0, .LANCHOR86
+	ldrh	w5, [x0, #:lo12:.LANCHOR86]
+	adrp	x0, .LANCHOR93
+	ldrh	w4, [x0, #:lo12:.LANCHOR93]
+	adrp	x0, .LANCHOR69
+	ldrh	w3, [x0, #:lo12:.LANCHOR69]
 	adrp	x0, .LANCHOR102
 	ldrh	w2, [x0, #:lo12:.LANCHOR102]
 	adrp	x0, .LANCHOR100
@@ -6974,7 +7073,7 @@ print_ftl_debug_info:
 	adrp	x0, .LC75
 	add	x0, x0, :lo12:.LC75
 	bl	printf
-	ldr	x0, [x20, #:lo12:.LANCHOR10]
+	ldr	x0, [x20, #:lo12:.LANCHOR12]
 	ldr	x1, [x19, #:lo12:.LANCHOR110]
 	ldp	x29, x30, [sp, 32]
 	ldrh	w4, [x0, 590]
@@ -6998,65 +7097,65 @@ ftl_write_buf:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	str	x21, [sp, 32]
-	cbnz	x0, .L1166
+	cbnz	x0, .L1156
 	adrp	x1, .LANCHOR130
 	add	x1, x1, :lo12:.LANCHOR130
-	mov	w2, 803
+	mov	w2, 808
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	bl	print_ftl_debug_info
 	mov	w0, -1
-.L1165:
+.L1155:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1169:
+.L1159:
 	mov	x1, x19
-	adrp	x0, .LANCHOR66
-	add	x0, x0, :lo12:.LANCHOR66
+	adrp	x0, .LANCHOR65
+	add	x0, x0, :lo12:.LANCHOR65
 	bl	buf_add_tail
 	adrp	x1, .LANCHOR110
 	ldrb	w3, [x19, 56]
-	ldrb	w0, [x21, #:lo12:.LANCHOR67]
+	ldrb	w0, [x21, #:lo12:.LANCHOR66]
 	ldr	x1, [x1, #:lo12:.LANCHOR110]
 	add	w0, w0, 1
 	and	w0, w0, 255
-	strb	w0, [x21, #:lo12:.LANCHOR67]
+	strb	w0, [x21, #:lo12:.LANCHOR66]
 	ldr	w2, [x1, 16]
 	add	w2, w2, w3
 	str	w2, [x1, 16]
 	ldr	w2, [x1, 32]
 	add	w2, w2, 1
 	str	w2, [x1, 32]
-	b	.L1165
-.L1166:
+	b	.L1155
+.L1156:
 	mov	x19, x0
 	adrp	x0, .LANCHOR131
 	mov	x20, x0
 	ldrb	w1, [x0, #:lo12:.LANCHOR131]
 	ldrb	w2, [x19, 56]
 	cmp	w2, w1
-	bls	.L1171
+	bls	.L1161
 	adrp	x1, .LANCHOR130
 	adrp	x0, .LC0
-	mov	w2, 810
+	mov	w2, 815
 	add	x1, x1, :lo12:.LANCHOR130
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1171:
+.L1161:
 	ldrb	w0, [x19, 56]
-	adrp	x21, .LANCHOR67
-	cbz	w0, .L1168
+	adrp	x21, .LANCHOR66
+	cbz	w0, .L1158
 	ldrb	w1, [x20, #:lo12:.LANCHOR131]
 	cmp	w1, w0
-	bcs	.L1169
-.L1168:
+	bcs	.L1159
+.L1158:
 	mov	x0, x19
 	bl	zbuf_free
-	ldrb	w0, [x21, #:lo12:.LANCHOR67]
-	b	.L1165
+	ldrb	w0, [x21, #:lo12:.LANCHOR66]
+	b	.L1155
 	.size	ftl_write_buf, .-ftl_write_buf
 	.section	.text.ftl_write_completed,"ax",@progbits
 	.align	2
@@ -7066,28 +7165,28 @@ ftl_write_completed:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR56
+	adrp	x21, .LANCHOR55
 	stp	x19, x20, [sp, 16]
-	add	x22, x21, :lo12:.LANCHOR56
+	add	x22, x21, :lo12:.LANCHOR55
 	stp	x23, x24, [sp, 48]
-	adrp	x20, .LANCHOR65
+	adrp	x20, .LANCHOR64
 	mov	w23, 20041
-	add	x20, x20, :lo12:.LANCHOR65
+	add	x20, x20, :lo12:.LANCHOR64
 	str	x25, [sp, 64]
 	movk	w23, 0x444b, lsl 16
 	mov	w25, 0
-.L1177:
+.L1167:
 	ldrb	w0, [x20]
 	cmp	w0, 255
-	bne	.L1188
+	bne	.L1178
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1188:
-	add	x1, x21, :lo12:.LANCHOR56
+.L1178:
+	add	x1, x21, :lo12:.LANCHOR55
 	lsl	x2, x0, 6
 	add	x24, x1, x2
 	ubfiz	x19, x0, 6, 8
@@ -7096,96 +7195,96 @@ ftl_write_completed:
 	strb	w1, [x20]
 	ldr	w1, [x24, 52]
 	cmn	w1, #1
-	bne	.L1178
+	bne	.L1168
 	adrp	x1, .LANCHOR124
 	ldrb	w1, [x1, #:lo12:.LANCHOR124]
-	cbnz	w1, .L1179
-	adrp	x1, .LANCHOR81
-	ldrb	w1, [x1, #:lo12:.LANCHOR81]
-	cbz	w1, .L1180
-.L1179:
+	cbnz	w1, .L1169
+	adrp	x1, .LANCHOR80
+	ldrb	w1, [x1, #:lo12:.LANCHOR80]
+	cbz	w1, .L1170
+.L1169:
 	adrp	x1, .LANCHOR110
 	ldr	x1, [x1, #:lo12:.LANCHOR110]
 	ldr	w1, [x1, 156]
 	cmp	w1, w23
-	beq	.L1181
-.L1180:
+	beq	.L1171
+.L1170:
 	add	x1, x22, x0, lsl 6
 	mov	w2, 24
 	mov	w5, 65535
 	ldr	w3, [x1, 40]
-	adrp	x1, .LANCHOR75
-	ldrh	w4, [x1, #:lo12:.LANCHOR75]
-	adrp	x1, .LANCHOR32
-	ldrb	w1, [x1, #:lo12:.LANCHOR32]
+	adrp	x1, .LANCHOR74
+	ldrh	w4, [x1, #:lo12:.LANCHOR74]
+	adrp	x1, .LANCHOR31
+	ldrb	w1, [x1, #:lo12:.LANCHOR31]
 	sub	w1, w2, w1
 	sub	w2, w1, w4
 	mov	w1, 1
 	lsr	w4, w3, w4
 	lsl	w1, w1, w2
-	adrp	x2, .LANCHOR76
+	adrp	x2, .LANCHOR75
 	sub	w1, w1, #1
-	ldrb	w2, [x2, #:lo12:.LANCHOR76]
+	ldrb	w2, [x2, #:lo12:.LANCHOR75]
 	and	w1, w1, w4
 	udiv	w1, w1, w2
-	adrp	x2, .LANCHOR10
+	adrp	x2, .LANCHOR12
 	mov	x24, x2
-	ldr	x4, [x2, #:lo12:.LANCHOR10]
+	ldr	x4, [x2, #:lo12:.LANCHOR12]
 	and	w25, w1, 65535
 	and	w1, w1, w5
 	ldr	w6, [x4, 560]
 	cmp	w6, w5
-	bne	.L1182
+	bne	.L1172
 	str	w1, [x4, 560]
 	str	w3, [x4, 564]
-.L1182:
+.L1172:
 	add	x0, x22, x0, lsl 6
 	ldr	w2, [x0, 36]
 	adrp	x0, .LC77
 	add	x0, x0, :lo12:.LC77
 	bl	printf
-	ldr	x0, [x24, #:lo12:.LANCHOR10]
+	ldr	x0, [x24, #:lo12:.LANCHOR12]
 	ldr	w1, [x0, 556]
 	add	w1, w1, 1
 	str	w1, [x0, 556]
 	ldrh	w1, [x0, 16]
 	cmp	w1, w25
-	bne	.L1183
+	bne	.L1173
 	strh	wzr, [x0, 22]
-.L1181:
+.L1171:
 	mov	x0, x19
 	mov	w25, 1
 	bl	ftl_write_buf
-	b	.L1177
-.L1183:
+	b	.L1167
+.L1173:
 	ldrh	w1, [x0, 48]
 	cmp	w1, w25
-	bne	.L1181
+	bne	.L1171
 	strh	wzr, [x0, 54]
-	b	.L1181
-.L1178:
-	cbz	w25, .L1186
+	b	.L1171
+.L1168:
+	cbz	w25, .L1176
 	ldp	w1, w2, [x24, 36]
 	adrp	x0, .LC78
 	add	x0, x0, :lo12:.LC78
 	bl	printf
 	mov	x0, x19
 	bl	ftl_write_buf
-	b	.L1177
-.L1186:
+	b	.L1167
+.L1176:
 	ldrh	w2, [x24, 48]
 	ldr	w0, [x24, 36]
 	ldr	w1, [x24, 44]
 	bl	lpa_hash_update_ppa
 	ldrb	w0, [x24, 2]
-	tbz	x0, 2, .L1187
+	tbz	x0, 2, .L1177
 	and	w0, w0, -3
 	strb	w0, [x24, 2]
-	b	.L1177
-.L1187:
+	b	.L1167
+.L1177:
 	mov	x0, x19
 	bl	zbuf_free
-	b	.L1177
+	b	.L1167
 	.size	ftl_write_completed, .-ftl_write_completed
 	.section	.text.zftl_add_read_buf,"ax",@progbits
 	.align	2
@@ -7195,8 +7294,8 @@ zftl_add_read_buf:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	str	x19, [sp, 16]
-	cbnz	x0, .L1194
-	mov	w2, 1143
+	cbnz	x0, .L1184
+	mov	w2, 1148
 	adrp	x1, .LANCHOR132
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR132
@@ -7205,20 +7304,20 @@ zftl_add_read_buf:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	print_ftl_debug_info
-.L1194:
+.L1184:
 	ldrb	w1, [x0, 56]
 	mov	x19, x0
 	adrp	x0, .LANCHOR131
 	ldrb	w0, [x0, #:lo12:.LANCHOR131]
 	cmp	w1, w0
-	bls	.L1196
+	bls	.L1186
 	adrp	x1, .LANCHOR132
 	adrp	x0, .LC0
-	mov	w2, 1150
+	mov	w2, 1155
 	add	x1, x1, :lo12:.LANCHOR132
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1196:
+.L1186:
 	mov	x1, x19
 	adrp	x0, .LANCHOR133
 	add	x0, x0, :lo12:.LANCHOR133
@@ -7231,100 +7330,20 @@ zftl_add_read_buf:
 	strb	w0, [x1, #:lo12:.LANCHOR134]
 	ret
 	.size	zftl_add_read_buf, .-zftl_add_read_buf
-	.section	.text.ftl_alloc_sblk,"ax",@progbits
-	.align	2
-	.global	ftl_alloc_sblk
-	.type	ftl_alloc_sblk, %function
-ftl_alloc_sblk:
-	stp	x29, x30, [sp, -64]!
-	cmp	w0, 5
-	add	x29, sp, 0
-	str	x23, [sp, 48]
-	and	w23, w0, 65535
-	stp	x21, x22, [sp, 32]
-	mov	w1, w23
-	stp	x19, x20, [sp, 16]
-	cset	w22, eq
-	mov	w21, w0
-	mov	w0, 0
-	bl	zftl_get_free_sblk
-	and	w19, w0, 65535
-	mov	w0, 65535
-	cmp	w19, w0
-	beq	.L1201
-	adrp	x0, .LANCHOR7
-	lsl	w22, w22, 1
-	ldr	x20, [x0, #:lo12:.LANCHOR7]
-	add	x20, x20, x19, uxth 2
-	ldrb	w0, [x20, 2]
-	tst	w0, 224
-	beq	.L1202
-	adrp	x1, .LANCHOR135
-	adrp	x0, .LC0
-	mov	w2, 939
-	add	x1, x1, :lo12:.LANCHOR135
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1202:
-	ldrb	w0, [x20, 2]
-	bfi	w0, w21, 5, 3
-	ubfx	x1, x0, 3, 2
-	orr	w1, w22, w1
-	bfi	w0, w1, 3, 2
-	strb	w0, [x20, 2]
-	and	w1, w0, 24
-	cmp	w1, 24
-	bne	.L1203
-	cbnz	w22, .L1203
-	mov	w1, 1
-	bfi	w0, w1, 3, 2
-	strb	w0, [x20, 2]
-.L1203:
-	mov	w0, w19
-	ldr	x23, [sp, 48]
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 64
-	ret
-.L1201:
-	bl	print_ftl_debug_info
-	adrp	x20, .LC79
-	mov	w2, w21
-	add	x20, x20, :lo12:.LC79
-	mov	w1, w19
-	mov	x0, x20
-	bl	printf
-	mov	w1, w23
-	mov	w0, 0
-	bl	zftl_get_free_sblk
-	and	w19, w0, 65535
-	mov	w2, w21
-	mov	w1, w19
-	mov	x0, x20
-	bl	printf
-	bl	dump_all_list_info
-	mov	w2, 955
-	adrp	x1, .LANCHOR135
-	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR135
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-	b	.L1203
-	.size	ftl_alloc_sblk, .-ftl_alloc_sblk
 	.section	.text.sblk_init,"ax",@progbits
 	.align	2
 	.global	sblk_init
 	.type	sblk_init, %function
 sblk_init:
-	adrp	x1, .LANCHOR60
+	adrp	x1, .LANCHOR59
 	mov	w0, -1
-	strb	w0, [x1, #:lo12:.LANCHOR60]
-	adrp	x1, .LANCHOR65
-	strb	w0, [x1, #:lo12:.LANCHOR65]
-	adrp	x1, .LANCHOR63
-	strb	w0, [x1, #:lo12:.LANCHOR63]
+	strb	w0, [x1, #:lo12:.LANCHOR59]
 	adrp	x1, .LANCHOR64
 	strb	w0, [x1, #:lo12:.LANCHOR64]
+	adrp	x1, .LANCHOR62
+	strb	w0, [x1, #:lo12:.LANCHOR62]
+	adrp	x1, .LANCHOR63
+	strb	w0, [x1, #:lo12:.LANCHOR63]
 	mov	w0, 0
 	ret
 	.size	sblk_init, .-sblk_init
@@ -7334,25 +7353,25 @@ sblk_init:
 	.type	dump_sblk_queue, %function
 dump_sblk_queue:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LC80
-	add	x0, x0, :lo12:.LC80
+	adrp	x0, .LC79
+	add	x0, x0, :lo12:.LC79
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR60
+	adrp	x19, .LANCHOR59
 	str	x21, [sp, 32]
-	ldrb	w1, [x19, #:lo12:.LANCHOR60]
+	ldrb	w1, [x19, #:lo12:.LANCHOR59]
 	bl	printf
-	ldrb	w19, [x19, #:lo12:.LANCHOR60]
+	ldrb	w19, [x19, #:lo12:.LANCHOR59]
 	cmp	w19, 255
-	beq	.L1210
-	adrp	x1, .LANCHOR56
+	beq	.L1190
+	adrp	x1, .LANCHOR55
 	ubfiz	x19, x19, 6, 8
-	add	x1, x1, :lo12:.LANCHOR56
-	adrp	x21, .LC81
+	add	x1, x1, :lo12:.LANCHOR55
+	adrp	x21, .LC80
 	add	x19, x1, x19
-	add	x21, x21, :lo12:.LC81
+	add	x21, x21, :lo12:.LC80
 	mov	x20, x1
-.L1212:
+.L1192:
 	ldrb	w2, [x19, 58]
 	mov	x0, x21
 	ldrb	w1, [x19, 1]
@@ -7360,11 +7379,11 @@ dump_sblk_queue:
 	bl	printf
 	ldrb	w19, [x19]
 	cmp	w19, 255
-	beq	.L1210
+	beq	.L1190
 	ubfiz	x19, x19, 6, 8
 	add	x19, x20, x19
-	b	.L1212
-.L1210:
+	b	.L1192
+.L1190:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -7375,90 +7394,90 @@ dump_sblk_queue:
 	.global	queue_lun_state
 	.type	queue_lun_state, %function
 queue_lun_state:
-	adrp	x2, .LANCHOR60
-	ldrb	w2, [x2, #:lo12:.LANCHOR60]
+	adrp	x2, .LANCHOR59
+	ldrb	w2, [x2, #:lo12:.LANCHOR59]
 	cmp	w2, 255
-	beq	.L1228
-	adrp	x3, .LANCHOR32
+	beq	.L1208
+	adrp	x3, .LANCHOR31
 	mov	w8, 24
-	adrp	x10, .LANCHOR56
-	add	x10, x10, :lo12:.LANCHOR56
-	ldrb	w4, [x3, #:lo12:.LANCHOR32]
+	adrp	x10, .LANCHOR55
+	add	x10, x10, :lo12:.LANCHOR55
+	ldrb	w4, [x3, #:lo12:.LANCHOR31]
 	mov	w3, 1
-	adrp	x13, .L1224
+	adrp	x13, .L1204
 	mov	x15, x10
 	sub	w8, w8, w4
-	add	x13, x13, :lo12:.L1224
+	add	x13, x13, :lo12:.L1204
 	lsl	w4, w3, w4
 	sub	w4, w4, #1
 	and	w6, w4, 65535
-	adrp	x4, .LANCHOR75
+	adrp	x4, .LANCHOR74
 	asr	w11, w0, w8
 	and	w11, w11, w6
-	ldrh	w12, [x4, #:lo12:.LANCHOR75]
+	ldrh	w12, [x4, #:lo12:.LANCHOR74]
 	sub	w4, w8, w12
 	lsl	w3, w3, w4
 	sub	w3, w3, #1
 	and	w7, w3, 65535
-	adrp	x3, .LANCHOR76
-	ldrb	w5, [x3, #:lo12:.LANCHOR76]
+	adrp	x3, .LANCHOR75
+	ldrb	w5, [x3, #:lo12:.LANCHOR75]
 	asr	w3, w0, w12
 	sub	w5, w5, #1
 	and	w5, w5, 65535
 	and	w3, w3, w5
 	and	w3, w3, w7
-.L1227:
+.L1207:
 	add	x14, x10, x2, lsl 6
 	ldr	w4, [x14, 40]
 	lsr	w0, w4, w8
 	and	w0, w6, w0
 	cmp	w11, w0
-	bne	.L1222
+	bne	.L1202
 	lsr	w4, w4, w12
 	and	w4, w5, w4
 	and	w4, w7, w4
 	ldrb	w0, [x14, 58]
 	cmp	w3, w4
-	bne	.L1223
+	bne	.L1203
 	cmp	w1, 1
-	bne	.L1220
+	bne	.L1200
 	cmp	w0, 7
 	ccmp	w0, 9, 4, ne
-	beq	.L1222
+	beq	.L1202
 	ret
-.L1223:
+.L1203:
 	cmp	w1, 3
-	bhi	.L1222
+	bhi	.L1202
 	ldrb	w4, [x13,w1,uxtw]
-	adr	x14, .Lrtx1224
+	adr	x14, .Lrtx1204
 	add	x4, x14, w4, sxtb #2
 	br	x4
-.Lrtx1224:
+.Lrtx1204:
 	.section	.rodata.queue_lun_state,"a",@progbits
 	.align	0
 	.align	2
-.L1224:
-	.byte	(.L1220 - .Lrtx1224) / 4
-	.byte	(.L1225 - .Lrtx1224) / 4
-	.byte	(.L1226 - .Lrtx1224) / 4
-	.byte	(.L1220 - .Lrtx1224) / 4
+.L1204:
+	.byte	(.L1200 - .Lrtx1204) / 4
+	.byte	(.L1205 - .Lrtx1204) / 4
+	.byte	(.L1206 - .Lrtx1204) / 4
+	.byte	(.L1200 - .Lrtx1204) / 4
 	.section	.text.queue_lun_state
-.L1225:
+.L1205:
 	cmp	w0, 7
 	ccmp	w0, 9, 4, ne
-	beq	.L1222
+	beq	.L1202
 	ret
-.L1226:
+.L1206:
 	cmp	w0, 11
-	bne	.L1220
-.L1222:
+	bne	.L1200
+.L1202:
 	lsl	x2, x2, 6
 	ldrb	w2, [x15, x2]
 	cmp	w2, 255
-	bne	.L1227
-.L1228:
+	bne	.L1207
+.L1208:
 	mov	w0, 0
-.L1220:
+.L1200:
 	ret
 	.size	queue_lun_state, .-queue_lun_state
 	.section	.text.queue_remove_completed_req,"ax",@progbits
@@ -7466,25 +7485,25 @@ queue_lun_state:
 	.global	queue_remove_completed_req
 	.type	queue_remove_completed_req, %function
 queue_remove_completed_req:
-	adrp	x4, .LANCHOR65
-	adrp	x8, .LANCHOR64
-	adrp	x1, .LANCHOR60
-	adrp	x7, .LANCHOR63
-	adrp	x3, .LANCHOR56
-	ldrb	w14, [x4, #:lo12:.LANCHOR65]
-	add	x5, x3, :lo12:.LANCHOR56
-	ldrb	w2, [x1, #:lo12:.LANCHOR60]
-	ldrb	w12, [x8, #:lo12:.LANCHOR64]
+	adrp	x4, .LANCHOR64
+	adrp	x8, .LANCHOR63
+	adrp	x1, .LANCHOR59
+	adrp	x7, .LANCHOR62
+	adrp	x3, .LANCHOR55
+	ldrb	w14, [x4, #:lo12:.LANCHOR64]
+	add	x5, x3, :lo12:.LANCHOR55
+	ldrb	w2, [x1, #:lo12:.LANCHOR59]
+	ldrb	w12, [x8, #:lo12:.LANCHOR63]
 	mov	x11, x5
-	ldrb	w13, [x7, #:lo12:.LANCHOR63]
-	add	x16, x8, :lo12:.LANCHOR64
-	add	x7, x7, :lo12:.LANCHOR63
-	add	x10, x4, :lo12:.LANCHOR65
+	ldrb	w13, [x7, #:lo12:.LANCHOR62]
+	add	x16, x8, :lo12:.LANCHOR63
+	add	x7, x7, :lo12:.LANCHOR62
+	add	x10, x4, :lo12:.LANCHOR64
 	mov	w6, 0
 	mov	w15, -1
-.L1231:
+.L1211:
 	cmp	w2, 255
-	beq	.L1232
+	beq	.L1212
 	sbfiz	x8, x2, 6, 32
 	sxtw	x0, w2
 	add	x4, x5, x8
@@ -7492,265 +7511,131 @@ queue_remove_completed_req:
 	sub	w4, w4, #12
 	and	w4, w4, 255
 	cmp	w4, 1
-	bls	.L1233
-	cbz	w6, .L1230
-	strb	w2, [x1, #:lo12:.LANCHOR60]
+	bls	.L1213
+	cbz	w6, .L1210
+	strb	w2, [x1, #:lo12:.LANCHOR59]
 	ret
-.L1233:
+.L1213:
 	lsl	x6, x0, 6
 	ldrb	w2, [x5, x8]
 	add	x4, x5, x6
 	strb	w15, [x5, x6]
 	ldrb	w6, [x4, 59]
 	cmp	w6, 1
-	bne	.L1236
+	bne	.L1216
 	ldrh	w4, [x4, 50]
-	cbnz	w4, .L1244
+	cbnz	w4, .L1224
 	mov	w4, w14
 	mov	x6, x10
-.L1237:
+.L1217:
 	cmp	w4, 255
-	bne	.L1242
-	add	x3, x3, :lo12:.LANCHOR56
-	strb	w2, [x1, #:lo12:.LANCHOR60]
+	bne	.L1222
+	add	x3, x3, :lo12:.LANCHOR55
+	strb	w2, [x1, #:lo12:.LANCHOR59]
 	add	x0, x3, x0, lsl 6
 	ldrb	w0, [x0, 1]
 	strb	w0, [x6]
 	ret
-.L1236:
-	cbnz	w6, .L1238
+.L1216:
+	cbnz	w6, .L1218
 	ldr	w4, [x4, 36]
 	cmn	w4, #1
-	beq	.L1238
+	beq	.L1218
 	mov	w4, w13
 	mov	x6, x7
-	b	.L1237
-.L1244:
+	b	.L1217
+.L1224:
 	mov	w4, w12
 	mov	x6, x16
-	b	.L1237
-.L1242:
+	b	.L1217
+.L1222:
 	mov	w6, w4
 	sbfiz	x4, x4, 6, 32
 	ldrb	w4, [x11, x4]
 	cmp	w4, 255
-	bne	.L1242
+	bne	.L1222
 	add	x0, x11, x0, lsl 6
 	sbfiz	x6, x6, 6, 32
 	ldrb	w0, [x0, 1]
 	strb	w0, [x11, x6]
-.L1238:
+.L1218:
 	mov	w6, 1
-	b	.L1231
-.L1232:
-	cbz	w6, .L1230
+	b	.L1211
+.L1212:
+	cbz	w6, .L1210
 	mov	w0, -1
-	strb	w0, [x1, #:lo12:.LANCHOR60]
-.L1230:
+	strb	w0, [x1, #:lo12:.LANCHOR59]
+.L1210:
 	ret
 	.size	queue_remove_completed_req, .-queue_remove_completed_req
-	.section	.text.pm_alloc_new_blk,"ax",@progbits
-	.align	2
-	.global	pm_alloc_new_blk
-	.type	pm_alloc_new_blk, %function
-pm_alloc_new_blk:
-	stp	x29, x30, [sp, -64]!
-	adrp	x2, .LANCHOR80
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR110
-	stp	x21, x22, [sp, 32]
-	ldr	x1, [x20, #:lo12:.LANCHOR110]
-	ldrb	w2, [x2, #:lo12:.LANCHOR80]
-	ldrh	w0, [x1, 690]
-	str	x23, [sp, 48]
-	add	w0, w0, 1
-	and	w0, w0, 65535
-	strh	w0, [x1, 690]
-	cmp	w2, w0
-	bls	.L1255
-	add	x0, x1, x0, sxtw 1
-	ldrh	w1, [x0, 672]
-	mov	w0, 65535
-	cmp	w1, w0
-	bne	.L1256
-.L1255:
-	adrp	x19, .LC82
-	add	x19, x19, :lo12:.LC82
-	mov	w23, 65535
-	adrp	x22, .LANCHOR7
-.L1257:
-	mov	w0, 1
-	bl	ftl_alloc_sblk
-	and	w21, w0, 65535
-	cmp	w21, w23
-	beq	.L1257
-	mov	w1, 0
-	mov	w0, w21
-	bl	ftl_erase_sblk
-	add	x14, x20, :lo12:.LANCHOR110
-	ldr	x1, [x20, #:lo12:.LANCHOR110]
-	mov	w0, w21
-	add	x1, x1, 672
-	bl	ftl_get_blk_list_in_sblk
-	tst	w0, 65535
-	bne	.L1258
-	mov	w1, w21
-	mov	x0, x19
-	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR7]
-	add	x21, x0, x21, uxth 2
-	ldrb	w0, [x21, 2]
-	orr	w0, w0, -32
-	strb	w0, [x21, 2]
-	b	.L1257
-.L1258:
-	ldr	x0, [x14]
-	adrp	x1, .LANCHOR136
-	mov	w2, 1
-	mov	w19, 0
-	add	x0, x0, 416
-	str	w2, [x1, #:lo12:.LANCHOR136]
-	mov	w1, 65535
-	strh	wzr, [x0, 274]
-.L1260:
-	ldrh	w2, [x0]
-	cmp	w2, w1
-	beq	.L1259
-	add	w19, w19, 1
-	add	x0, x0, 2
-	and	w19, w19, 65535
-	cmp	w19, 128
-	bne	.L1260
-	adrp	x1, .LANCHOR137
-	adrp	x0, .LC0
-	mov	w2, 264
-	add	x1, x1, :lo12:.LANCHOR137
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1259:
-	ldr	x0, [x20, #:lo12:.LANCHOR110]
-	add	x19, x0, x19, sxtw 1
-	ldrh	w1, [x0, 688]
-	strh	w21, [x19, 416]
-	add	w1, w1, 1
-	strh	w1, [x0, 688]
-.L1256:
-	ldr	x1, [x20, #:lo12:.LANCHOR110]
-	ldrh	w0, [x1, 690]
-	add	x0, x0, 336
-	ldrh	w19, [x1, x0, lsl 1]
-	mov	w0, 65533
-	sub	w1, w19, #1
-	cmp	w0, w1, uxth
-	bcs	.L1262
-	adrp	x1, .LANCHOR137
-	adrp	x0, .LC0
-	mov	w2, 270
-	add	x1, x1, :lo12:.LANCHOR137
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1262:
-	adrp	x1, .LANCHOR32
-	mov	w2, 24
-	ldr	x0, [x20, #:lo12:.LANCHOR110]
-	ldrb	w1, [x1, #:lo12:.LANCHOR32]
-	sub	w2, w2, w1
-	adrp	x1, .LANCHOR75
-	strh	wzr, [x0, 696]
-	ldrh	w1, [x1, #:lo12:.LANCHOR75]
-	strh	w19, [x0, 692]
-	sub	w2, w2, w1
-	asr	w4, w19, w2
-	strh	w4, [x0, 694]
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1265
-	mov	w0, 1
-	and	w4, w4, 65535
-	lsl	w2, w0, w2
-	mov	w3, w19
-	adrp	x0, .LC83
-	sub	w2, w2, #1
-	mov	w1, w19
-	add	x0, x0, :lo12:.LC83
-	bl	printf
-.L1265:
-	mov	w0, 0
-	ldr	x23, [sp, 48]
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 64
-	ret
-	.size	pm_alloc_new_blk, .-pm_alloc_new_blk
 	.section	.text.pm_select_ram_region,"ax",@progbits
 	.align	2
 	.global	pm_select_ram_region
 	.type	pm_select_ram_region, %function
 pm_select_ram_region:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR138
-	add	x0, x0, :lo12:.LANCHOR138
+	adrp	x0, .LANCHOR135
+	add	x0, x0, :lo12:.LANCHOR135
 	mov	x1, 0
 	add	x29, sp, 0
 	mov	w2, 65535
 	str	x19, [sp, 16]
-.L1274:
+.L1236:
 	lsl	x3, x1, 4
 	and	w19, w1, 65535
 	ldrh	w3, [x3, x0]
 	cmp	w3, w2
-	beq	.L1273
+	beq	.L1235
 	add	x1, x1, 1
 	cmp	x1, 32
-	bne	.L1274
+	bne	.L1236
 	add	x0, x0, 2
 	mov	w19, w1
 	mov	x2, x0
 	mov	w4, 32768
 	mov	w1, 0
-.L1276:
+.L1238:
 	ldrh	w3, [x2]
-	tbnz	x3, 15, .L1275
+	tbnz	x3, 15, .L1237
 	cmp	w3, w4
-	bcs	.L1275
+	bcs	.L1237
 	mov	w4, w3
 	mov	w19, w1
-.L1275:
+.L1237:
 	add	w1, w1, 1
 	add	x2, x2, 16
 	and	w1, w1, 65535
 	cmp	w1, 32
-	bne	.L1276
+	bne	.L1238
 	cmp	w19, 32
-	bne	.L1273
-	adrp	x1, .LANCHOR139
+	bne	.L1235
+	adrp	x1, .LANCHOR136
 	mov	w2, -1
-	ldrb	w3, [x1, #:lo12:.LANCHOR139]
+	ldrb	w3, [x1, #:lo12:.LANCHOR136]
 	mov	w1, 0
-.L1278:
+.L1240:
 	ldrh	w5, [x0]
 	cmp	w5, w2
-	bcs	.L1277
+	bcs	.L1239
 	ldrh	w4, [x0, -2]
 	cmp	w4, w3
 	csel	w2, w2, w5, eq
 	csel	w19, w19, w1, eq
-.L1277:
+.L1239:
 	add	w1, w1, 1
 	add	x0, x0, 16
 	and	w1, w1, 65535
 	cmp	w1, 32
-	bne	.L1278
+	bne	.L1240
 	cmp	w19, 32
-	bne	.L1273
-	adrp	x1, .LANCHOR140
+	bne	.L1235
+	adrp	x1, .LANCHOR137
 	adrp	x0, .LC0
 	mov	w2, 377
-	add	x1, x1, :lo12:.LANCHOR140
+	add	x1, x1, :lo12:.LANCHOR137
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1273:
+.L1235:
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -7761,14 +7646,14 @@ pm_select_ram_region:
 	.global	idb_init
 	.type	idb_init, %function
 idb_init:
+	adrp	x0, .LANCHOR138
+	str	xzr, [x0, #:lo12:.LANCHOR138]
+	adrp	x0, .LANCHOR139
+	str	wzr, [x0, #:lo12:.LANCHOR139]
+	adrp	x0, .LANCHOR140
+	strb	wzr, [x0, #:lo12:.LANCHOR140]
 	adrp	x0, .LANCHOR141
 	str	xzr, [x0, #:lo12:.LANCHOR141]
-	adrp	x0, .LANCHOR142
-	str	wzr, [x0, #:lo12:.LANCHOR142]
-	adrp	x0, .LANCHOR143
-	strb	wzr, [x0, #:lo12:.LANCHOR143]
-	adrp	x0, .LANCHOR144
-	str	xzr, [x0, #:lo12:.LANCHOR144]
 	mov	w0, 0
 	ret
 	.size	idb_init, .-idb_init
@@ -7786,69 +7671,69 @@ ftl_memset:
 	.type	flash_lsb_page_tbl_build, %function
 flash_lsb_page_tbl_build:
 	stp	x29, x30, [sp, -48]!
-	adrp	x1, .LANCHOR16
+	adrp	x1, .LANCHOR21
 	add	x29, sp, 0
-	ldr	x1, [x1, #:lo12:.LANCHOR16]
+	ldr	x1, [x1, #:lo12:.LANCHOR21]
 	stp	x19, x20, [sp, 16]
 	mov	w20, 1024
 	str	x21, [sp, 32]
 	adrp	x19, .LANCHOR3
 	ldrb	w1, [x1, 12]
 	sdiv	w20, w20, w1
-	cbnz	w0, .L1286
+	cbnz	w0, .L1248
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1287:
+.L1249:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 512
-	bne	.L1287
-.L1293:
-	adrp	x21, .LANCHOR145
-	add	x21, x21, :lo12:.LANCHOR145
+	bne	.L1249
+.L1255:
+	adrp	x21, .LANCHOR142
+	add	x21, x21, :lo12:.LANCHOR142
 	mov	w2, 2048
 	mov	w1, 255
 	mov	x0, x21
 	add	x19, x19, :lo12:.LANCHOR3
 	bl	ftl_memset
 	mov	x0, 0
-.L1288:
+.L1250:
 	ldrh	w1, [x19, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	w20, w0, uxth
 	strh	w1, [x21, w1, sxtw 1]
-	bhi	.L1288
+	bhi	.L1250
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1286:
+.L1248:
 	cmp	w0, 1
-	bne	.L1289
+	bne	.L1251
 	add	x3, x19, :lo12:.LANCHOR3
 	mov	x1, 0
-.L1292:
+.L1254:
 	and	w0, w1, 65535
 	cmp	x1, 3
-	bls	.L1290
+	bls	.L1252
 	ubfiz	w2, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 2
 	sub	w0, w2, w0
 	and	w0, w0, 65535
-.L1290:
+.L1252:
 	strh	w0, [x3, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 512
-	bne	.L1292
-	b	.L1293
-.L1289:
+	bne	.L1254
+	b	.L1255
+.L1251:
 	cmp	w0, 2
-	bne	.L1294
+	bne	.L1256
 	add	x3, x19, :lo12:.LANCHOR3
 	mov	w1, 65535
 	mov	x0, 0
-.L1296:
+.L1258:
 	cmp	x0, 2
 	and	w2, w0, 65535
 	csel	w2, w2, w1, cc
@@ -7857,31 +7742,31 @@ flash_lsb_page_tbl_build:
 	add	x0, x0, 1
 	and	w1, w1, 65535
 	cmp	x0, 512
-	bne	.L1296
-	b	.L1293
-.L1294:
+	bne	.L1258
+	b	.L1255
+.L1256:
 	cmp	w0, 3
-	bne	.L1297
+	bne	.L1259
 	add	x3, x19, :lo12:.LANCHOR3
 	mov	x1, 0
-.L1300:
+.L1262:
 	and	w0, w1, 65535
 	cmp	x1, 5
-	bls	.L1298
+	bls	.L1260
 	ubfiz	w2, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 4
 	sub	w0, w2, w0
 	and	w0, w0, 65535
-.L1298:
+.L1260:
 	strh	w0, [x3, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 512
-	bne	.L1300
-	b	.L1293
-.L1297:
+	bne	.L1262
+	b	.L1255
+.L1259:
 	cmp	w0, 4
-	bne	.L1301
+	bne	.L1263
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	w2, 1
 	add	x1, x1, 16
@@ -7899,7 +7784,7 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1, -10]
 	strh	w0, [x1, -2]
 	mov	w0, 8
-.L1303:
+.L1265:
 	and	w3, w0, 1
 	ubfiz	w2, w0, 1, 15
 	add	w3, w3, 6
@@ -7908,40 +7793,40 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1], 2
 	and	w0, w0, 65535
 	cmp	w0, 512
-	bne	.L1303
-	b	.L1293
-.L1301:
+	bne	.L1265
+	b	.L1255
+.L1263:
 	cmp	w0, 5
-	bne	.L1304
+	bne	.L1266
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1305:
+.L1267:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 16
-	bne	.L1305
+	bne	.L1267
 	add	x1, x1, 32
-.L1306:
+.L1268:
 	strh	w0, [x1], 2
 	add	w0, w0, 2
 	and	w0, w0, 65535
 	cmp	w0, 1008
-	bne	.L1306
-	b	.L1293
-.L1304:
+	bne	.L1268
+	b	.L1255
+.L1266:
 	cmp	w0, 8
-	bne	.L1307
+	bne	.L1269
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1308:
+.L1270:
 	strh	w0, [x0, x1]
 	add	x0, x0, 2
 	cmp	x0, 1024
-	bne	.L1308
-	b	.L1293
-.L1307:
+	bne	.L1270
+	b	.L1255
+.L1269:
 	cmp	w0, 9
-	bne	.L1309
+	bne	.L1271
 	add	x0, x19, :lo12:.LANCHOR3
 	mov	w1, 1
 	add	x0, x0, 6
@@ -7950,43 +7835,43 @@ flash_lsb_page_tbl_build:
 	mov	w1, 2
 	strh	w1, [x0, -2]
 	mov	w1, 3
-.L1310:
+.L1272:
 	strh	w1, [x0], 2
 	add	w1, w1, 2
 	and	w1, w1, 65535
 	cmp	w1, 1021
-	bne	.L1310
-	b	.L1293
-.L1309:
+	bne	.L1272
+	b	.L1255
+.L1271:
 	cmp	w0, 10
-	bne	.L1311
+	bne	.L1273
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1312:
+.L1274:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 63
-	bne	.L1312
+	bne	.L1274
 	add	x1, x1, 126
-.L1313:
+.L1275:
 	strh	w0, [x1], 2
 	add	w0, w0, 2
 	and	w0, w0, 65535
 	cmp	w0, 961
-	bne	.L1313
-	b	.L1293
-.L1311:
+	bne	.L1275
+	b	.L1255
+.L1273:
 	cmp	w0, 11
-	bne	.L1314
+	bne	.L1276
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1315:
+.L1277:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L1315
+	bne	.L1277
 	add	x1, x1, 16
-.L1317:
+.L1279:
 	and	w3, w0, 1
 	ubfiz	w2, w0, 1, 15
 	add	w3, w3, 6
@@ -7995,146 +7880,149 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1], 2
 	and	w0, w0, 65535
 	cmp	w0, 512
-	bne	.L1317
-	b	.L1293
-.L1314:
+	bne	.L1279
+	b	.L1255
+.L1276:
 	cmp	w0, 13
-	bne	.L1293
+	bne	.L1255
 	add	x2, x19, :lo12:.LANCHOR3
 	mov	x1, 0
 	mov	w0, 0
-.L1318:
+.L1280:
 	strh	w0, [x1, x2]
 	add	w0, w0, 3
 	and	w0, w0, 65535
 	add	x1, x1, 2
 	cmp	w0, 1536
-	bne	.L1318
-	b	.L1293
+	bne	.L1280
+	b	.L1255
 	.size	flash_lsb_page_tbl_build, .-flash_lsb_page_tbl_build
 	.section	.text.flash_die_info_init,"ax",@progbits
 	.align	2
 	.global	flash_die_info_init
 	.type	flash_die_info_init, %function
 flash_die_info_init:
-	stp	x29, x30, [sp, -64]!
-	adrp	x0, .LANCHOR14
+	stp	x29, x30, [sp, -112]!
+	adrp	x0, .LANCHOR19
 	add	x29, sp, 0
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	tbz	x0, 12, .L1341
-	adrp	x1, .LANCHOR146
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	tbz	x0, 12, .L1303
+	adrp	x1, .LANCHOR143
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR146
+	add	x1, x1, :lo12:.LANCHOR143
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1341:
-	adrp	x22, .LANCHOR33
-	add	x19, x22, :lo12:.LANCHOR33
-	adrp	x23, .LANCHOR2
-	adrp	x24, .LANCHOR18
-	adrp	x21, .LANCHOR30
+.L1303:
+	adrp	x19, .LANCHOR32
+	add	x23, x19, :lo12:.LANCHOR32
+	adrp	x25, .LANCHOR2
+	adrp	x20, .LANCHOR23
 	mov	w2, 8
-	ldrh	w0, [x19, 26]
-	adrp	x20, .LANCHOR148
-	ldrb	w1, [x19, 12]
-	strh	w0, [x23, #:lo12:.LANCHOR2]
-	ldrh	w0, [x19, 10]
-	strb	wzr, [x24, #:lo12:.LANCHOR18]
+	adrp	x22, .LANCHOR29
+	ldrh	w0, [x23, 26]
+	adrp	x21, .LANCHOR145
+	ldrb	w1, [x23, 12]
+	adrp	x26, .LANCHOR33
+	strh	w0, [x25, #:lo12:.LANCHOR2]
+	add	x26, x26, :lo12:.LANCHOR33
+	ldrh	w0, [x23, 10]
+	add	x28, x23, 1
+	strb	wzr, [x20, #:lo12:.LANCHOR23]
+	adrp	x24, .LANCHOR47
+	mov	x27, 0
 	sdiv	w0, w0, w1
-	adrp	x1, .LANCHOR147
-	strh	w0, [x1, #:lo12:.LANCHOR147]
+	adrp	x1, .LANCHOR144
+	strh	w0, [x1, #:lo12:.LANCHOR144]
 	mov	w1, 0
-	add	x0, x21, :lo12:.LANCHOR30
+	add	x0, x22, :lo12:.LANCHOR29
 	bl	ftl_memset
-	add	x0, x20, :lo12:.LANCHOR148
 	mov	w2, 32
 	mov	w1, 0
+	add	x0, x21, :lo12:.LANCHOR145
 	bl	ftl_memset
-	mov	x8, x22
-	mov	x15, x21
-	mov	x11, x20
-	adrp	x14, .LANCHOR48
-	adrp	x20, .LANCHOR34
-	add	x21, x14, :lo12:.LANCHOR48
-	add	x20, x20, :lo12:.LANCHOR34
-	add	x22, x19, 1
-	mov	x12, 0
-.L1343:
-	ldrb	w2, [x19]
+	add	x0, x24, :lo12:.LANCHOR47
+	str	x0, [x29, 104]
+.L1305:
 	mov	w0, 2
-	strb	w0, [x12, x20]
-	add	x1, x21, x12, lsl 3
-	mov	x0, x22
+	ldrb	w2, [x23]
+	strb	w0, [x27, x26]
+	ldr	x0, [x29, 104]
+	add	x1, x0, x27, lsl 3
+	mov	x0, x28
 	bl	flash_mem_cmp8
-	cbnz	w0, .L1342
-	ldrb	w2, [x24, #:lo12:.LANCHOR18]
-	add	x1, x11, :lo12:.LANCHOR148
+	cbnz	w0, .L1304
+	ldrb	w2, [x20, #:lo12:.LANCHOR23]
+	add	x1, x21, :lo12:.LANCHOR145
 	add	w0, w2, 1
-	strb	w0, [x24, #:lo12:.LANCHOR18]
-	and	w0, w12, 255
+	strb	w0, [x20, #:lo12:.LANCHOR23]
+	and	w0, w27, 255
 	str	wzr, [x1, x2, lsl 2]
-	add	x1, x15, :lo12:.LANCHOR30
+	add	x1, x22, :lo12:.LANCHOR29
 	strb	w0, [x1, x2]
 	bl	zftl_flash_enter_slc_mode
-.L1342:
-	add	x12, x12, 1
-	cmp	x12, 4
-	bne	.L1343
-	add	x0, x8, :lo12:.LANCHOR33
+.L1304:
+	add	x27, x27, 1
+	cmp	x27, 4
+	bne	.L1305
+	add	x0, x19, :lo12:.LANCHOR32
 	ldrb	w1, [x0, 8]
 	cmp	w1, 2
-	beq	.L1344
-.L1348:
-	add	x8, x8, :lo12:.LANCHOR33
-	ldrb	w0, [x24, #:lo12:.LANCHOR18]
-	ldp	x19, x20, [sp, 16]
-	ldrb	w1, [x8, 13]
+	beq	.L1306
+.L1310:
+	add	x19, x19, :lo12:.LANCHOR32
+	ldrb	w0, [x20, #:lo12:.LANCHOR23]
 	ldp	x21, x22, [sp, 32]
+	ldrb	w1, [x19, 13]
 	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
 	mul	w0, w0, w1
-	ldrh	w1, [x8, 14]
-	ldp	x29, x30, [sp], 64
+	ldrh	w1, [x19, 14]
+	ldp	x27, x28, [sp, 80]
+	ldp	x19, x20, [sp, 16]
 	mul	w0, w0, w1
-	adrp	x1, .LANCHOR149
-	strh	w0, [x1, #:lo12:.LANCHOR149]
+	adrp	x1, .LANCHOR146
+	strh	w0, [x1, #:lo12:.LANCHOR146]
+	ldp	x29, x30, [sp], 112
 	ret
-.L1344:
-	ldrh	w1, [x23, #:lo12:.LANCHOR2]
-	add	x14, x14, :lo12:.LANCHOR48
-	ldrb	w12, [x0, 13]
+.L1306:
+	ldrh	w1, [x25, #:lo12:.LANCHOR2]
+	add	x24, x24, :lo12:.LANCHOR47
+	ldrb	w8, [x0, 13]
 	add	x7, x0, 1
-	ldrb	w20, [x8, #:lo12:.LANCHOR33]
-	add	x19, x24, :lo12:.LANCHOR18
-	ldrb	w21, [x0, 23]
-	add	x11, x11, :lo12:.LANCHOR148
-	add	x15, x15, :lo12:.LANCHOR30
-	mov	x13, 0
-	mul	w12, w12, w1
+	ldrb	w12, [x19, #:lo12:.LANCHOR32]
+	add	x11, x20, :lo12:.LANCHOR23
+	ldrb	w13, [x0, 23]
+	add	x21, x21, :lo12:.LANCHOR145
+	add	x22, x22, :lo12:.LANCHOR29
+	mov	x10, 0
+	mul	w8, w8, w1
 	ldrh	w1, [x0, 14]
 	and	w1, w1, 65280
-	mul	w12, w12, w1
-	lsl	w22, w12, 1
-.L1347:
-	mov	w2, w20
-	add	x1, x14, x13, lsl 3
+	mul	w8, w8, w1
+	lsl	w14, w8, 1
+.L1309:
+	mov	w2, w12
+	add	x1, x24, x10, lsl 3
 	mov	x0, x7
 	bl	flash_mem_cmp8
-	cbnz	w0, .L1345
-	ldrb	w1, [x19]
-	cmp	w21, 0
-	csel	w2, w12, w22, eq
+	cbnz	w0, .L1307
+	ldrb	w1, [x11]
+	cmp	w13, 0
+	csel	w2, w8, w14, eq
 	add	w0, w1, 1
-	strb	w0, [x19]
-	str	w2, [x11, x1, lsl 2]
-	strb	w13, [x15, x1]
-.L1345:
-	add	x13, x13, 1
-	cmp	x13, 4
-	bne	.L1347
-	b	.L1348
+	strb	w0, [x11]
+	str	w2, [x21, x1, lsl 2]
+	strb	w10, [x22, x1]
+.L1307:
+	add	x10, x10, 1
+	cmp	x10, 4
+	bne	.L1309
+	b	.L1310
 	.size	flash_die_info_init, .-flash_die_info_init
 	.section	.text.lpa_hash_init,"ax",@progbits
 	.align	2
@@ -8148,12 +8036,12 @@ lpa_hash_init:
 	add	x29, sp, 0
 	add	x0, x0, :lo12:.LANCHOR116
 	bl	ftl_memset
-	adrp	x0, .LANCHOR95
+	adrp	x0, .LANCHOR94
 	mov	w1, 255
 	ldp	x29, x30, [sp], 16
-	ldrh	w2, [x0, #:lo12:.LANCHOR95]
-	adrp	x0, .LANCHOR80
-	ldrb	w0, [x0, #:lo12:.LANCHOR80]
+	ldrh	w2, [x0, #:lo12:.LANCHOR94]
+	adrp	x0, .LANCHOR79
+	ldrb	w0, [x0, #:lo12:.LANCHOR79]
 	mul	w2, w2, w0
 	adrp	x0, .LANCHOR118
 	ldr	x0, [x0, #:lo12:.LANCHOR118]
@@ -8166,64 +8054,64 @@ lpa_hash_init:
 	.type	lpa_rebuild_hash, %function
 lpa_rebuild_hash:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LANCHOR14
+	adrp	x0, .LANCHOR19
 	add	x29, sp, 0
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	tbz	x0, 12, .L1361
-	adrp	x1, .LANCHOR150
-	adrp	x0, .LC84
+	tbz	x0, 12, .L1323
+	adrp	x1, .LANCHOR147
+	adrp	x0, .LC81
 	mov	w3, 0
 	mov	w2, 239
-	add	x1, x1, :lo12:.LANCHOR150
-	add	x0, x0, :lo12:.LC84
+	add	x1, x1, :lo12:.LANCHOR147
+	add	x0, x0, :lo12:.LC81
 	bl	printf
-.L1361:
-	adrp	x20, .LANCHOR95
-	adrp	x22, .LANCHOR80
+.L1323:
+	adrp	x20, .LANCHOR94
+	adrp	x22, .LANCHOR79
 	adrp	x19, .LANCHOR116
 	add	x19, x19, :lo12:.LANCHOR116
 	mov	w2, 512
 	mov	w1, 255
 	mov	x0, x19
 	bl	ftl_memset
-	ldrh	w2, [x20, #:lo12:.LANCHOR95]
+	ldrh	w2, [x20, #:lo12:.LANCHOR94]
 	adrp	x21, .LANCHOR118
-	ldrb	w0, [x22, #:lo12:.LANCHOR80]
+	ldrb	w0, [x22, #:lo12:.LANCHOR79]
 	mov	w1, 255
-	add	x20, x20, :lo12:.LANCHOR95
+	add	x20, x20, :lo12:.LANCHOR94
 	mul	w2, w2, w0
 	ldr	x0, [x21, #:lo12:.LANCHOR118]
 	lsl	w2, w2, 2
 	bl	ftl_memset
 	adrp	x0, .LANCHOR117
-	ldrb	w3, [x22, #:lo12:.LANCHOR80]
+	ldrb	w3, [x22, #:lo12:.LANCHOR79]
 	ldr	x5, [x21, #:lo12:.LANCHOR118]
 	mov	w1, 0
 	ldr	x4, [x0, #:lo12:.LANCHOR117]
-.L1362:
+.L1324:
 	ldrh	w0, [x20]
 	mul	w0, w0, w3
 	cmp	w1, w0, lsl 1
-	blt	.L1364
+	blt	.L1326
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1364:
+.L1326:
 	uxtw	x2, w1
 	ldr	w0, [x4, x2, lsl 2]
 	cmn	w0, #1
-	beq	.L1363
+	beq	.L1325
 	and	x0, x0, 255
 	ldrh	w6, [x19, x0, lsl 1]
 	strh	w1, [x19, x0, lsl 1]
 	strh	w6, [x5, x2, lsl 1]
-.L1363:
+.L1325:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L1362
+	b	.L1324
 	.size	lpa_rebuild_hash, .-lpa_rebuild_hash
 	.section	.text.zftl_read_flash_info,"ax",@progbits
 	.align	2
@@ -8237,10 +8125,10 @@ zftl_read_flash_info:
 	str	x19, [sp, 16]
 	mov	x19, x0
 	bl	ftl_memset
-	adrp	x1, .LANCHOR33
-	add	x1, x1, :lo12:.LANCHOR33
+	adrp	x1, .LANCHOR32
+	add	x1, x1, :lo12:.LANCHOR32
 	adrp	x0, .LANCHOR2
-	adrp	x3, .LANCHOR68
+	adrp	x3, .LANCHOR67
 	strb	wzr, [x19, 10]
 	mov	w4, 1
 	ldrb	w2, [x1, 9]
@@ -8249,11 +8137,11 @@ zftl_read_flash_info:
 	strb	w0, [x19, 4]
 	ubfx	x0, x0, 8, 8
 	strb	w0, [x19, 5]
-	adrp	x0, .LANCHOR50
-	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	adrp	x0, .LANCHOR49
+	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	strb	w0, [x19, 7]
-	add	x0, x3, :lo12:.LANCHOR68
-	ldrb	w3, [x3, #:lo12:.LANCHOR68]
+	add	x0, x3, :lo12:.LANCHOR67
+	ldrb	w3, [x3, #:lo12:.LANCHOR67]
 	strb	w3, [x19]
 	ldrb	w3, [x0, 1]
 	strb	w3, [x19, 1]
@@ -8263,28 +8151,28 @@ zftl_read_flash_info:
 	strb	w0, [x19, 3]
 	mov	w0, 32
 	strb	w2, [x19, 6]
-	adrp	x2, .LANCHOR30
+	adrp	x2, .LANCHOR29
 	strb	w0, [x19, 8]
-	add	x2, x2, :lo12:.LANCHOR30
+	add	x2, x2, :lo12:.LANCHOR29
 	ldrb	w0, [x1, 7]
 	mov	x1, 0
 	strb	w0, [x19, 9]
-	adrp	x0, .LANCHOR18
-	ldrb	w3, [x0, #:lo12:.LANCHOR18]
-.L1373:
+	adrp	x0, .LANCHOR23
+	ldrb	w3, [x0, #:lo12:.LANCHOR23]
+.L1335:
 	cmp	w3, w1, uxtb
-	bhi	.L1374
+	bhi	.L1336
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1374:
+.L1336:
 	ldrb	w0, [x1, x2]
 	add	x1, x1, 1
 	ldrb	w5, [x19, 10]
 	lsl	w0, w4, w0
 	orr	w0, w0, w5
 	strb	w0, [x19, 10]
-	b	.L1373
+	b	.L1335
 	.size	zftl_read_flash_info, .-zftl_read_flash_info
 	.section	.text.gc_static_wearleveling,"ax",@progbits
 	.align	2
@@ -8303,78 +8191,78 @@ gc_static_wearleveling:
 	ldr	w1, [x0, 32]
 	mov	w0, 10240
 	cmp	w1, w0
-	bls	.L1377
+	bls	.L1339
 	bl	ftl_tmp_into_update
-.L1377:
-	adrp	x19, .LANCHOR10
+.L1339:
+	adrp	x19, .LANCHOR12
 	mov	w3, 36000
-	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	ldr	x0, [x19, #:lo12:.LANCHOR12]
 	ldr	w1, [x0, 568]
 	ldr	w2, [x0, 12]
 	add	w3, w1, w3
 	cmp	w2, w3
-	bcs	.L1378
+	bcs	.L1340
 	ldr	x4, [x22, #:lo12:.LANCHOR110]
 	ldr	w3, [x0, 572]
 	add	w3, w3, 256
 	ldr	w4, [x4, 36]
 	cmp	w4, w3
-	bcc	.L1430
-.L1378:
+	bcc	.L1392
+.L1340:
 	add	w1, w1, 860160
 	add	w1, w1, 3840
 	cmp	w2, w1
-	bhi	.L1380
+	bhi	.L1342
 	ldr	x3, [x22, #:lo12:.LANCHOR110]
 	ldr	w1, [x0, 572]
 	add	w1, w1, 32
 	ldr	w3, [x3, 36]
 	cmp	w3, w1
-	bls	.L1431
-.L1380:
+	bls	.L1393
+.L1342:
 	ldr	x1, [x22, #:lo12:.LANCHOR110]
 	mov	w20, 65535
-	adrp	x8, .LANCHOR14
+	adrp	x8, .LANCHOR19
 	mov	w21, w20
-	add	x8, x8, :lo12:.LANCHOR14
+	add	x8, x8, :lo12:.LANCHOR19
 	mov	w27, 0
 	mov	w25, 0
 	mov	w26, 0
 	ldr	w3, [x1, 36]
 	mov	w23, 0
 	ldrh	w28, [x1, 134]
-	adrp	x24, .LANCHOR7
+	adrp	x24, .LANCHOR9
 	str	w2, [x0, 568]
 	str	w3, [x0, 572]
-	adrp	x0, .LANCHOR6
-	add	x10, x0, :lo12:.LANCHOR6
+	adrp	x0, .LANCHOR8
+	add	x10, x0, :lo12:.LANCHOR8
 	str	wzr, [x29, 128]
 	str	wzr, [x29, 136]
 	stp	wzr, wzr, [x29, 144]
-.L1382:
+.L1344:
 	ldrh	w0, [x10]
 	cmp	w0, w28
-	bhi	.L1391
-	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	bhi	.L1353
+	ldr	x0, [x19, #:lo12:.LANCHOR12]
 	mov	w2, 128
 	mov	w1, 255
 	add	x0, x0, 264
 	strh	wzr, [x0, -142]
 	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR10]
-	adrp	x2, .LANCHOR14
-	ldr	x8, [x24, #:lo12:.LANCHOR7]
-	ldr	w3, [x2, #:lo12:.LANCHOR14]
+	ldr	x0, [x19, #:lo12:.LANCHOR12]
+	adrp	x2, .LANCHOR19
+	ldr	x8, [x24, #:lo12:.LANCHOR9]
+	ldr	w3, [x2, #:lo12:.LANCHOR19]
 	str	x2, [x29, 152]
 	ldrh	w0, [x0, 586]
 	mov	x1, x0
 	lsl	x28, x0, 2
 	add	x10, x8, x28
-	tbz	x3, 10, .L1392
-	adrp	x2, .LANCHOR9
+	tbz	x3, 10, .L1354
+	adrp	x2, .LANCHOR11
 	ldrb	w6, [x10, 3]
 	ldrb	w4, [x10, 2]
-	ldr	x5, [x2, #:lo12:.LANCHOR9]
+	ldr	x5, [x2, #:lo12:.LANCHOR11]
 	ldr	w3, [x8, x28]
 	ldrh	w2, [x8, x28]
 	stp	x8, x10, [x29, 112]
@@ -8383,59 +8271,59 @@ gc_static_wearleveling:
 	ubfx	x5, x4, 5, 3
 	and	w2, w2, 2047
 	ubfx	x4, x4, 3, 2
-	adrp	x0, .LC86
-	add	x0, x0, :lo12:.LC86
+	adrp	x0, .LC83
+	add	x0, x0, :lo12:.LC83
 	bl	printf
 	ldp	x8, x10, [x29, 112]
-.L1392:
+.L1354:
 	ldrb	w0, [x10, 2]
 	and	w3, w0, 224
 	cmp	w3, 32
-	bne	.L1393
+	bne	.L1355
 	ldr	x1, [x22, #:lo12:.LANCHOR110]
 	ldrh	w1, [x1, 688]
 	cmp	w1, 2
-	bls	.L1393
-	adrp	x1, .LANCHOR151
+	bls	.L1355
+	adrp	x1, .LANCHOR148
 	mov	w2, 1
-	str	w2, [x1, #:lo12:.LANCHOR151]
-.L1393:
+	str	w2, [x1, #:lo12:.LANCHOR148]
+.L1355:
 	ldrb	w1, [x10, 2]
-	tbz	x1, 3, .L1394
+	tbz	x1, 3, .L1356
 	ldr	x1, [x22, #:lo12:.LANCHOR110]
 	ldrh	w2, [x8, x28]
 	and	w2, w2, 2047
 	ldrh	w4, [x1, 96]
-	adrp	x1, .LANCHOR152
-	ldrh	w1, [x1, #:lo12:.LANCHOR152]
+	adrp	x1, .LANCHOR149
+	ldrh	w1, [x1, #:lo12:.LANCHOR149]
 	add	w1, w2, w1, lsr 2
 	cmp	w4, w1
-	ble	.L1394
+	ble	.L1356
 	and	w0, w0, 192
 	cmp	w0, 64
-	bne	.L1395
-	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	bne	.L1357
+	ldr	x0, [x19, #:lo12:.LANCHOR12]
 	mov	w1, 0
 	mov	w2, 1
 	ldrh	w0, [x0, 586]
 	bl	gc_add_sblk
-	adrp	x0, .LANCHOR71+2110
+	adrp	x0, .LANCHOR70+2192
 	mov	w1, 1
-	strh	w1, [x0, #:lo12:.LANCHOR71+2110]
-.L1394:
-	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	strh	w1, [x0, #:lo12:.LANCHOR70+2192]
+.L1356:
+	ldr	x0, [x19, #:lo12:.LANCHOR12]
 	ldr	x2, [x29, 152]
-	ldr	x11, [x24, #:lo12:.LANCHOR7]
+	ldr	x11, [x24, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, 584]
-	ldr	w2, [x2, #:lo12:.LANCHOR14]
+	ldr	w2, [x2, #:lo12:.LANCHOR19]
 	mov	x1, x0
 	lsl	x10, x0, 2
 	add	x28, x11, x10
-	tbz	x2, 10, .L1396
-	adrp	x2, .LANCHOR9
+	tbz	x2, 10, .L1358
+	adrp	x2, .LANCHOR11
 	ldrb	w6, [x28, 3]
 	ldrb	w4, [x28, 2]
-	ldr	x5, [x2, #:lo12:.LANCHOR9]
+	ldr	x5, [x2, #:lo12:.LANCHOR11]
 	ldr	w3, [x11, x10]
 	ldrh	w2, [x11, x10]
 	stp	x10, x11, [x29, 112]
@@ -8444,43 +8332,43 @@ gc_static_wearleveling:
 	ubfx	x5, x4, 5, 3
 	and	w2, w2, 2047
 	ubfx	x4, x4, 3, 2
-	adrp	x0, .LC87
-	add	x0, x0, :lo12:.LC87
+	adrp	x0, .LC84
+	add	x0, x0, :lo12:.LC84
 	bl	printf
 	ldp	x10, x11, [x29, 112]
-.L1396:
+.L1358:
 	ldrb	w0, [x28, 2]
-	tbz	x0, 3, .L1397
+	tbz	x0, 3, .L1359
 	ldr	x0, [x22, #:lo12:.LANCHOR110]
 	ldr	w1, [x11, x10]
 	ldrh	w2, [x0, 98]
-	adrp	x0, .LANCHOR153
+	adrp	x0, .LANCHOR150
 	ubfx	x1, x1, 11, 8
-	ldrh	w0, [x0, #:lo12:.LANCHOR153]
+	ldrh	w0, [x0, #:lo12:.LANCHOR150]
 	add	w0, w1, w0, lsr 2
 	cmp	w2, w0
-	ble	.L1397
+	ble	.L1359
 	ldrb	w0, [x28, 2]
 	and	w1, w0, 192
 	cmp	w1, 64
-	bne	.L1398
-	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	bne	.L1360
+	ldr	x0, [x19, #:lo12:.LANCHOR12]
 	mov	w1, 0
 	mov	w2, 1
 	ldrh	w0, [x0, 584]
 	bl	gc_add_sblk
-	adrp	x0, .LANCHOR71+2110
+	adrp	x0, .LANCHOR70+2192
 	mov	w1, 1
-	strh	w1, [x0, #:lo12:.LANCHOR71+2110]
-.L1397:
+	strh	w1, [x0, #:lo12:.LANCHOR70+2192]
+.L1359:
 	ldr	x0, [x29, 152]
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1399
-	adrp	x2, .LANCHOR9
-	ldr	x1, [x24, #:lo12:.LANCHOR7]
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 10, .L1361
+	adrp	x2, .LANCHOR11
+	ldr	x1, [x24, #:lo12:.LANCHOR9]
 	uxtw	x6, w27
 	lsl	x0, x6, 2
-	ldr	x7, [x2, #:lo12:.LANCHOR9]
+	ldr	x7, [x2, #:lo12:.LANCHOR11]
 	add	x5, x1, x0
 	ldr	w3, [x1, x0]
 	ldrh	w7, [x7, x6, lsl 1]
@@ -8488,28 +8376,28 @@ gc_static_wearleveling:
 	ldrb	w4, [x5, 2]
 	ubfx	x3, x3, 11, 8
 	ldrh	w2, [x1, x0]
-	adrp	x0, .LC88
+	adrp	x0, .LC85
 	mov	w1, w27
-	add	x0, x0, :lo12:.LC88
+	add	x0, x0, :lo12:.LC85
 	ubfx	x5, x4, 5, 3
 	and	w2, w2, 2047
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1399:
+.L1361:
 	ldr	x0, [x29, 152]
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1400
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 10, .L1362
 	ldr	w6, [x29, 128]
-	adrp	x2, .LANCHOR9
-	ldr	x1, [x24, #:lo12:.LANCHOR7]
-	ldr	x7, [x2, #:lo12:.LANCHOR9]
+	adrp	x2, .LANCHOR11
+	ldr	x1, [x24, #:lo12:.LANCHOR9]
+	ldr	x7, [x2, #:lo12:.LANCHOR11]
 	lsl	x0, x6, 2
 	add	x5, x1, x0
 	ldr	w3, [x1, x0]
 	ldrh	w2, [x1, x0]
-	adrp	x0, .LC89
+	adrp	x0, .LC86
 	ldrh	w7, [x7, x6, lsl 1]
-	add	x0, x0, :lo12:.LC89
+	add	x0, x0, :lo12:.LC86
 	ldrb	w6, [x5, 3]
 	ubfx	x3, x3, 11, 8
 	ldr	w1, [x29, 128]
@@ -8518,7 +8406,7 @@ gc_static_wearleveling:
 	ubfx	x5, x4, 5, 3
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1400:
+.L1362:
 	ldr	x0, [x22, #:lo12:.LANCHOR110]
 	ldrh	w1, [x29, 148]
 	strh	w1, [x0, 96]
@@ -8532,128 +8420,129 @@ gc_static_wearleveling:
 	strh	w3, [x0, 88]
 	strh	w4, [x0, 90]
 	ldr	x0, [x29, 152]
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1401
-	adrp	x0, .LC90
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 10, .L1363
+	adrp	x0, .LC87
 	and	w4, w4, 65535
 	and	w3, w3, 65535
 	mov	w2, w25
 	mov	w1, w26
-	add	x0, x0, :lo12:.LC90
+	add	x0, x0, :lo12:.LC87
 	bl	printf
-.L1401:
+.L1363:
 	ldr	x0, [x29, 152]
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1402
-	adrp	x0, .LANCHOR153
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 10, .L1364
+	adrp	x0, .LANCHOR150
 	ldr	w3, [x29, 148]
 	mov	w4, w23
 	mov	w2, w21
-	ldrh	w6, [x0, #:lo12:.LANCHOR153]
-	adrp	x0, .LANCHOR152
+	ldrh	w6, [x0, #:lo12:.LANCHOR150]
+	adrp	x0, .LANCHOR149
 	mov	w1, w20
-	ldrh	w5, [x0, #:lo12:.LANCHOR152]
-	adrp	x0, .LC91
-	add	x0, x0, :lo12:.LC91
+	ldrh	w5, [x0, #:lo12:.LANCHOR149]
+	adrp	x0, .LC88
+	add	x0, x0, :lo12:.LC88
 	bl	printf
-.L1402:
+.L1364:
 	sub	w0, w23, w21
 	str	w0, [x29, 144]
-	adrp	x0, .LANCHOR153
+	adrp	x0, .LANCHOR150
 	ldr	w1, [x29, 144]
-	ldrh	w0, [x0, #:lo12:.LANCHOR153]
+	ldrh	w0, [x0, #:lo12:.LANCHOR150]
 	cmp	w1, w0
-	bgt	.L1403
-	adrp	x1, .LANCHOR152
+	bgt	.L1365
+	adrp	x1, .LANCHOR149
 	ldr	w0, [x29, 148]
-	ldrh	w1, [x1, #:lo12:.LANCHOR152]
+	ldrh	w1, [x1, #:lo12:.LANCHOR149]
 	sub	w0, w0, w20
 	cmp	w0, w1
-	ble	.L1432
-.L1403:
-	ldr	x0, [x19, #:lo12:.LANCHOR10]
-	adrp	x26, .LANCHOR71
-	add	x26, x26, :lo12:.LANCHOR71
+	ble	.L1394
+.L1365:
+	ldr	x0, [x19, #:lo12:.LANCHOR12]
+	adrp	x26, .LANCHOR70
+	add	x26, x26, :lo12:.LANCHOR70
 	mov	w25, 0
 	mov	w23, 0
 	ldrh	w28, [x0, 580]
 	ldr	x0, [x22, #:lo12:.LANCHOR110]
 	ldrh	w27, [x0, 134]
-	adrp	x0, .LANCHOR6
-	add	x0, x0, :lo12:.LANCHOR6
+	adrp	x0, .LANCHOR8
+	add	x0, x0, :lo12:.LANCHOR8
 	str	x0, [x29, 136]
-	adrp	x0, .LANCHOR152
-	add	x0, x0, :lo12:.LANCHOR152
+	adrp	x0, .LANCHOR149
+	add	x0, x0, :lo12:.LANCHOR149
 	str	x0, [x29, 128]
-.L1405:
+.L1367:
 	ldr	x0, [x29, 136]
 	ldrh	w0, [x0]
 	cmp	w27, w0
-	bcc	.L1415
-.L1414:
-	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	bcc	.L1377
+.L1376:
+	ldr	x0, [x19, #:lo12:.LANCHOR12]
 	str	w28, [x0, 580]
-.L1404:
-	cbz	w21, .L1417
+.L1366:
+	cbz	w21, .L1379
 	ldr	x2, [x22, #:lo12:.LANCHOR110]
-	adrp	x0, .LANCHOR6
-	ldrh	w5, [x0, #:lo12:.LANCHOR6]
-	ldr	x0, [x24, #:lo12:.LANCHOR7]
+	adrp	x0, .LANCHOR8
+	ldrh	w5, [x0, #:lo12:.LANCHOR8]
+	ldr	x0, [x24, #:lo12:.LANCHOR9]
 	ldrh	w1, [x2, 134]
 	add	x0, x0, x1, uxth 2
-.L1418:
+.L1380:
 	cmp	w1, w5
-	bcc	.L1420
+	bcc	.L1382
 	ldrh	w0, [x2, 72]
 	add	w0, w21, w0
 	strh	w0, [x2, 72]
 	ldrh	w0, [x2, 98]
 	cmp	w21, w0
-	bcs	.L1417
+	bcs	.L1379
 	sub	w21, w0, w21
 	strh	w21, [x2, 98]
-.L1417:
-	cbz	w20, .L1423
+.L1379:
+	cbz	w20, .L1385
 	ldr	x2, [x22, #:lo12:.LANCHOR110]
-	adrp	x0, .LANCHOR6
-	ldrh	w6, [x0, #:lo12:.LANCHOR6]
-	ldr	x0, [x24, #:lo12:.LANCHOR7]
+	adrp	x0, .LANCHOR8
+	ldrh	w6, [x0, #:lo12:.LANCHOR8]
+	ldr	x0, [x24, #:lo12:.LANCHOR9]
 	ldrh	w1, [x2, 134]
 	add	x0, x0, x1, uxth 2
-.L1424:
+.L1386:
 	cmp	w1, w6
-	bcc	.L1426
+	bcc	.L1388
 	ldrh	w0, [x2, 74]
 	add	w0, w20, w0
 	strh	w0, [x2, 74]
 	ldrh	w0, [x2, 96]
 	cmp	w20, w0
-	bcs	.L1423
+	bcs	.L1385
 	sub	w20, w0, w20
 	strh	w20, [x2, 96]
-.L1423:
-	mov	w1, 5
-	mov	w0, 0
-	bl	zftl_get_gc_node
+.L1385:
+	mov	w1, 0
+	adrp	x0, .LANCHOR92
+	add	x0, x0, :lo12:.LANCHOR92
+	bl	_list_get_gc_head_node
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L1381
-	adrp	x2, .LANCHOR9
+	beq	.L1343
+	adrp	x2, .LANCHOR11
 	ubfiz	x1, x1, 1, 16
-	ldr	x3, [x2, #:lo12:.LANCHOR9]
-	adrp	x2, .LANCHOR95
-	ldrh	w2, [x2, #:lo12:.LANCHOR95]
+	ldr	x3, [x2, #:lo12:.LANCHOR11]
+	adrp	x2, .LANCHOR94
+	ldrh	w2, [x2, #:lo12:.LANCHOR94]
 	ldrh	w1, [x3, x1]
 	cmp	w1, w2, lsr 1
-	bhi	.L1381
+	bhi	.L1343
 	add	w23, w23, 1
 	mov	w2, 1
 	mov	w1, 0
 	bl	gc_add_sblk
-.L1381:
+.L1343:
 	add	w0, w23, w25
-.L1376:
+.L1338:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -8661,139 +8550,139 @@ gc_static_wearleveling:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L1391:
+.L1353:
 	uxtw	x7, w28
-	ldr	x6, [x24, #:lo12:.LANCHOR7]
+	ldr	x6, [x24, #:lo12:.LANCHOR9]
 	lsl	x2, x7, 2
 	add	x11, x6, x2
 	ldrb	w0, [x11, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L1383
+	beq	.L1345
 	ubfx	x4, x0, 3, 2
-	tbz	x4, 0, .L1384
+	tbz	x4, 0, .L1346
 	ldr	w0, [x6, x2]
 	ldrh	w1, [x6, x2]
 	ubfx	x0, x0, 11, 8
 	and	w1, w1, 2047
-.L1385:
+.L1347:
 	ldr	w3, [x29, 136]
 	add	w26, w26, 1
 	and	w26, w26, 65535
 	cmp	w20, w1
 	add	w3, w3, w1
 	str	w3, [x29, 136]
-	bls	.L1429
-	ldr	x3, [x19, #:lo12:.LANCHOR10]
+	bls	.L1391
+	ldr	x3, [x19, #:lo12:.LANCHOR12]
 	mov	w20, w1
 	strh	w28, [x3, 586]
-.L1429:
+.L1391:
 	ldr	w3, [x29, 148]
 	cmp	w3, w1
-	bcs	.L1388
+	bcs	.L1350
 	mov	w27, w28
 	str	w1, [x29, 148]
-.L1388:
+.L1350:
 	mov	w3, 65535
 	cmp	w0, w3
-	bne	.L1387
-.L1389:
+	bne	.L1349
+.L1351:
 	cmp	w0, 9
 	ccmp	w1, 9, 0, hi
-	bhi	.L1383
+	bhi	.L1345
 	ldr	w0, [x8]
-	tbz	x0, 8, .L1383
-	adrp	x0, .LANCHOR9
+	tbz	x0, 8, .L1345
+	adrp	x0, .LANCHOR11
 	ldr	w3, [x6, x2]
 	ldrh	w2, [x6, x2]
 	mov	w1, w28
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrb	w6, [x11, 3]
 	ubfx	x3, x3, 11, 8
 	ldrb	w5, [x11, 2]
 	and	w2, w2, 2047
 	str	x8, [x29, 120]
 	ldrh	w7, [x0, x7, lsl 1]
-	adrp	x0, .LC85
+	adrp	x0, .LC82
 	str	x10, [x29, 152]
 	ubfx	x5, x5, 5, 3
-	add	x0, x0, :lo12:.LC85
+	add	x0, x0, :lo12:.LC82
 	bl	printf
 	ldr	x8, [x29, 120]
 	ldr	x10, [x29, 152]
-.L1383:
+.L1345:
 	add	w28, w28, 1
 	and	w28, w28, 65535
-	b	.L1382
-.L1384:
+	b	.L1344
+.L1346:
 	tst	w0, 24
-	bne	.L1386
+	bne	.L1348
 	ldrh	w1, [x6, x2]
 	mov	w0, 65535
 	and	w1, w1, 2047
-	b	.L1385
-.L1386:
+	b	.L1347
+.L1348:
 	ldr	w0, [x6, x2]
 	mov	w1, 65535
 	ubfx	x0, x0, 11, 8
-.L1387:
+.L1349:
 	ldr	w3, [x29, 144]
 	add	w25, w25, 1
 	and	w25, w25, 65535
 	cmp	w21, w0
 	add	w3, w3, w0
 	str	w3, [x29, 144]
-	bls	.L1390
-	ldr	x3, [x19, #:lo12:.LANCHOR10]
+	bls	.L1352
+	ldr	x3, [x19, #:lo12:.LANCHOR12]
 	mov	w21, w0
 	strh	w28, [x3, 584]
-.L1390:
+.L1352:
 	cmp	w23, w0
-	bcs	.L1389
+	bcs	.L1351
 	mov	w23, w0
 	str	w28, [x29, 128]
-	b	.L1389
-.L1395:
-	cbnz	w3, .L1394
-	ldr	x1, [x19, #:lo12:.LANCHOR10]
+	b	.L1351
+.L1357:
+	cbnz	w3, .L1356
+	ldr	x1, [x19, #:lo12:.LANCHOR12]
 	mov	w0, 65535
 	ldrh	w2, [x1, 590]
 	cmp	w2, w0
-	bne	.L1394
+	bne	.L1356
 	ldrh	w0, [x1, 586]
 	ldrh	w1, [x1, 588]
 	cmp	w1, w0
-	beq	.L1394
+	beq	.L1356
 	bl	zftl_remove_free_node
-	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	ldr	x0, [x19, #:lo12:.LANCHOR12]
 	ldrh	w1, [x0, 586]
 	strh	w1, [x0, 590]
 	mov	w1, -1
 	strh	w1, [x0, 586]
-	b	.L1394
-.L1398:
+	b	.L1356
+.L1360:
 	and	w0, w0, 248
 	cmp	w0, 16
-	bne	.L1397
-	ldr	x1, [x19, #:lo12:.LANCHOR10]
+	bne	.L1359
+	ldr	x1, [x19, #:lo12:.LANCHOR12]
 	mov	w0, 65535
 	ldrh	w2, [x1, 588]
 	cmp	w2, w0
-	bne	.L1397
+	bne	.L1359
 	ldrh	w0, [x1, 584]
 	ldrh	w1, [x1, 590]
 	cmp	w1, w0
-	beq	.L1397
+	beq	.L1359
 	bl	zftl_remove_free_node
-	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	ldr	x0, [x19, #:lo12:.LANCHOR12]
 	ldrh	w1, [x0, 584]
 	strh	w1, [x0, 588]
 	mov	w1, -1
 	strh	w1, [x0, 584]
-	b	.L1397
-.L1415:
+	b	.L1359
+.L1377:
 	add	w7, w28, 1
-	ldr	x4, [x24, #:lo12:.LANCHOR7]
+	ldr	x4, [x24, #:lo12:.LANCHOR9]
 	and	w28, w7, 65535
 	cmp	w0, w28
 	csel	w28, w28, wzr, hi
@@ -8802,31 +8691,31 @@ gc_static_wearleveling:
 	add	x0, x4, x3
 	ldrb	w0, [x0, 2]
 	tst	w0, 192
-	beq	.L1407
+	beq	.L1369
 	and	w2, w0, 224
 	cmp	w2, 224
-	beq	.L1407
+	beq	.L1369
 	ubfx	x0, x0, 3, 2
 	and	w1, w0, 1
-	tbz	x0, 0, .L1408
+	tbz	x0, 0, .L1370
 	cmp	w2, 160
-.L1495:
-	bne	.L1410
-	adrp	x0, .LANCHOR153
+.L1457:
+	bne	.L1372
+	adrp	x0, .LANCHOR150
 	ldr	w2, [x29, 144]
-	ldrh	w0, [x0, #:lo12:.LANCHOR153]
+	ldrh	w0, [x0, #:lo12:.LANCHOR150]
 	cmp	w2, w0
-	ble	.L1411
+	ble	.L1373
 	ldr	w0, [x4, x3]
 	ubfx	x0, x0, 11, 8
 	cmp	w0, w21
-	bls	.L1412
-	cbz	w1, .L1411
+	bls	.L1374
+	cbz	w1, .L1373
 	ldrh	w0, [x4, x3]
 	and	w0, w0, 2047
 	cmp	w0, w20
-	bgt	.L1411
-.L1412:
+	bgt	.L1373
+.L1374:
 	stp	x4, x8, [x29, 104]
 	mov	w2, 1
 	str	x3, [x29, 120]
@@ -8834,60 +8723,60 @@ gc_static_wearleveling:
 	mov	w0, w28
 	bl	gc_add_sblk
 	mov	w0, 1
-	strh	w0, [x26, 2110]
+	strh	w0, [x26, 2192]
 	ldr	x0, [x29, 152]
 	add	w23, w23, 1
 	ldp	x4, x8, [x29, 104]
 	ldr	x3, [x29, 120]
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1411
-	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 10, .L1373
+	adrp	x0, .LANCHOR11
 	ldr	w6, [x4, x3]
 	ldrh	w5, [x4, x3]
-	ldr	x1, [x0, #:lo12:.LANCHOR9]
-	ldr	x0, [x24, #:lo12:.LANCHOR7]
+	ldr	x1, [x0, #:lo12:.LANCHOR11]
+	ldr	x0, [x24, #:lo12:.LANCHOR9]
 	ubfx	x6, x6, 11, 8
 	ldrh	w4, [x26, 56]
 	and	w5, w5, 2047
 	add	x3, x0, x3
-	adrp	x0, .LC92
-	add	x0, x0, :lo12:.LC92
+	adrp	x0, .LC89
+	add	x0, x0, :lo12:.LC89
 	ldrb	w2, [x3, 2]
 	ldrh	w3, [x1, x8, lsl 1]
 	mov	w1, w28
 	ubfx	x2, x2, 5, 3
-.L1496:
+.L1458:
 	bl	printf
-.L1411:
+.L1373:
 	cmp	w23, 4
 	ccmp	w25, 4, 2, ls
-	bhi	.L1414
-.L1407:
+	bhi	.L1376
+.L1369:
 	add	w27, w27, 1
 	and	w27, w27, 65535
-	b	.L1405
-.L1408:
+	b	.L1367
+.L1370:
 	cmp	w0, 2
-	b	.L1495
-.L1410:
+	b	.L1457
+.L1372:
 	ldr	x2, [x29, 128]
 	ldr	w0, [x29, 148]
 	sub	w0, w0, w20
 	ldrh	w2, [x2]
 	cmp	w0, w2
-	ble	.L1411
+	ble	.L1373
 	ldrh	w0, [x4, x3]
 	add	w2, w20, 8
 	and	w0, w0, 2047
 	cmp	w0, w2
-	ble	.L1413
-	cbz	w1, .L1411
+	ble	.L1375
+	cbz	w1, .L1373
 	ldr	w0, [x4, x3]
 	add	w1, w21, 4
 	ubfx	x0, x0, 11, 8
 	cmp	w0, w1
-	bgt	.L1411
-.L1413:
+	bgt	.L1373
+.L1375:
 	stp	x4, x8, [x29, 104]
 	mov	w2, 1
 	str	x3, [x29, 120]
@@ -8895,73 +8784,73 @@ gc_static_wearleveling:
 	mov	w0, w28
 	bl	gc_add_sblk
 	mov	w0, 1
-	strh	w0, [x26, 2110]
+	strh	w0, [x26, 2192]
 	ldr	x0, [x29, 152]
 	add	w25, w25, 1
 	ldp	x4, x8, [x29, 104]
 	ldr	x3, [x29, 120]
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1411
-	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 10, .L1373
+	adrp	x0, .LANCHOR11
 	ldr	w6, [x4, x3]
 	ldrh	w5, [x4, x3]
-	ldr	x1, [x0, #:lo12:.LANCHOR9]
-	ldr	x0, [x24, #:lo12:.LANCHOR7]
+	ldr	x1, [x0, #:lo12:.LANCHOR11]
+	ldr	x0, [x24, #:lo12:.LANCHOR9]
 	ubfx	x6, x6, 11, 8
 	and	w5, w5, 2047
 	ldrh	w4, [x26, 56]
 	add	x3, x0, x3
-	adrp	x0, .LC93
-	add	x0, x0, :lo12:.LC93
+	adrp	x0, .LC90
+	add	x0, x0, :lo12:.LC90
 	ldrb	w2, [x3, 2]
 	ldrh	w3, [x1, x8, lsl 1]
 	mov	w1, w28
 	ubfx	x2, x2, 5, 3
-	b	.L1496
-.L1432:
+	b	.L1458
+.L1394:
 	mov	w25, 0
 	mov	w23, 0
-	b	.L1404
-.L1420:
+	b	.L1366
+.L1382:
 	ldr	w3, [x0]
 	ubfx	x4, x3, 11, 8
 	cmp	w21, w4
-	bhi	.L1419
+	bhi	.L1381
 	ldrb	w6, [x0, 2]
 	tst	w6, 24
-	beq	.L1419
+	beq	.L1381
 	sub	w4, w4, w21
 	bfi	w3, w4, 11, 8
 	str	w3, [x0]
-.L1419:
+.L1381:
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 65535
-	b	.L1418
-.L1426:
+	b	.L1380
+.L1388:
 	ldrh	w3, [x0]
 	and	w4, w3, 2047
 	cmp	w4, w20
-	blt	.L1425
+	blt	.L1387
 	ldrb	w5, [x0, 2]
 	and	w5, w5, 24
 	cmp	w5, 16
-	beq	.L1425
+	beq	.L1387
 	sub	w4, w4, w20
 	bfi	w3, w4, 0, 11
 	strh	w3, [x0]
-.L1425:
+.L1387:
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 65535
-	b	.L1424
-.L1431:
+	b	.L1386
+.L1393:
 	mov	w25, 0
 	mov	w23, 0
-	b	.L1381
-.L1430:
+	b	.L1343
+.L1392:
 	mov	w0, 0
-	b	.L1376
+	b	.L1338
 	.size	gc_static_wearleveling, .-gc_static_wearleveling
 	.section	.text.zftl_sblk_list_init,"ax",@progbits
 	.align	2
@@ -8974,15 +8863,15 @@ zftl_sblk_list_init:
 	mov	w1, 0
 	add	x29, sp, 0
 	stp	x27, x28, [sp, 80]
-	adrp	x28, .LANCHOR6
+	adrp	x28, .LANCHOR8
 	stp	x19, x20, [sp, 16]
 	adrp	x20, .LANCHOR99
-	ldrh	w2, [x28, #:lo12:.LANCHOR6]
+	ldrh	w2, [x28, #:lo12:.LANCHOR8]
 	mov	w27, 0
 	stp	x21, x22, [sp, 32]
 	adrp	x22, .LANCHOR97
 	stp	x23, x24, [sp, 48]
-	adrp	x21, .LANCHOR93
+	adrp	x21, .LANCHOR91
 	stp	x25, x26, [sp, 64]
 	adrp	x26, .LANCHOR110
 	mul	w2, w2, w0
@@ -8994,42 +8883,42 @@ zftl_sblk_list_init:
 	bl	ftl_memset
 	strh	wzr, [x25, #:lo12:.LANCHOR103]
 	adrp	x0, .LANCHOR109
-	adrp	x3, .LANCHOR80
-	adrp	x2, .LANCHOR86
+	adrp	x3, .LANCHOR79
+	adrp	x2, .LANCHOR85
 	mov	w1, 32
 	strh	w1, [x0, #:lo12:.LANCHOR109]
 	adrp	x11, .LANCHOR104
-	ldrb	w0, [x3, #:lo12:.LANCHOR80]
+	ldrb	w0, [x3, #:lo12:.LANCHOR79]
 	adrp	x10, .LANCHOR106
-	ldrh	w1, [x2, #:lo12:.LANCHOR86]
+	ldrh	w1, [x2, #:lo12:.LANCHOR85]
 	adrp	x7, .LANCHOR108
-	adrp	x6, .LANCHOR89
-	adrp	x5, .LANCHOR12
-	adrp	x4, .LANCHOR88
+	adrp	x6, .LANCHOR90
+	adrp	x5, .LANCHOR95
+	adrp	x4, .LANCHOR92
 	ldr	x8, [x29, 192]
 	str	xzr, [x11, #:lo12:.LANCHOR104]
 	mul	w1, w0, w1
 	mov	w0, 32768
 	str	xzr, [x10, #:lo12:.LANCHOR106]
 	str	xzr, [x7, #:lo12:.LANCHOR108]
-	str	xzr, [x6, #:lo12:.LANCHOR89]
+	str	xzr, [x6, #:lo12:.LANCHOR90]
 	sdiv	w0, w0, w1
-	str	xzr, [x5, #:lo12:.LANCHOR12]
-	str	xzr, [x4, #:lo12:.LANCHOR88]
+	str	xzr, [x5, #:lo12:.LANCHOR95]
+	str	xzr, [x4, #:lo12:.LANCHOR92]
 	strh	wzr, [x24, #:lo12:.LANCHOR105]
 	strh	wzr, [x23, #:lo12:.LANCHOR107]
 	sxth	w0, w0
 	str	w0, [x29, 204]
 	ldr	x0, [x26, #:lo12:.LANCHOR110]
 	strh	wzr, [x22, #:lo12:.LANCHOR97]
-	strh	wzr, [x21, #:lo12:.LANCHOR93]
+	strh	wzr, [x21, #:lo12:.LANCHOR91]
 	strh	wzr, [x20, #:lo12:.LANCHOR99]
 	strh	wzr, [x0, 146]
 	ldrsh	w19, [x0, 134]
-	add	x0, x28, :lo12:.LANCHOR6
+	add	x0, x28, :lo12:.LANCHOR8
 	str	x0, [x29, 192]
-	adrp	x0, .LANCHOR154
-	add	x0, x0, :lo12:.LANCHOR154
+	adrp	x0, .LANCHOR151
+	add	x0, x0, :lo12:.LANCHOR151
 	adrp	x28, .LC0
 	str	x0, [x29, 112]
 	add	x0, x28, :lo12:.LC0
@@ -9039,11 +8928,11 @@ zftl_sblk_list_init:
 	stp	x10, x11, [x29, 168]
 	str	x8, [x29, 184]
 	str	x0, [x29, 104]
-.L1498:
+.L1460:
 	ldr	x0, [x29, 192]
 	ldrh	w0, [x0]
 	cmp	w19, w0
-	blt	.L1515
+	blt	.L1477
 	ldr	x0, [x26, #:lo12:.LANCHOR110]
 	ldrh	w1, [x25, #:lo12:.LANCHOR103]
 	ldp	x27, x28, [sp, 80]
@@ -9054,7 +8943,7 @@ zftl_sblk_list_init:
 	strh	w1, [x0, 116]
 	ldrh	w1, [x22, #:lo12:.LANCHOR97]
 	strh	w1, [x0, 122]
-	ldrh	w1, [x21, #:lo12:.LANCHOR93]
+	ldrh	w1, [x21, #:lo12:.LANCHOR91]
 	strh	w1, [x0, 120]
 	ldrh	w1, [x20, #:lo12:.LANCHOR99]
 	strh	w1, [x0, 124]
@@ -9064,29 +8953,29 @@ zftl_sblk_list_init:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 208
 	ret
-.L1515:
-	adrp	x0, .LANCHOR7
+.L1477:
+	adrp	x0, .LANCHOR9
 	sxtw	x2, w19
-	ldr	x3, [x0, #:lo12:.LANCHOR7]
+	ldr	x3, [x0, #:lo12:.LANCHOR9]
 	add	x28, x3, x2, lsl 2
 	ldrb	w5, [x28, 3]
-	cbz	w5, .L1516
+	cbz	w5, .L1478
 	ldr	x0, [x29, 128]
 	mov	w1, 0
 	ldr	x6, [x26, #:lo12:.LANCHOR110]
-	ldrb	w7, [x0, #:lo12:.LANCHOR80]
+	ldrb	w7, [x0, #:lo12:.LANCHOR79]
 	ldr	x0, [x29, 120]
-	ldrh	w8, [x0, #:lo12:.LANCHOR86]
+	ldrh	w8, [x0, #:lo12:.LANCHOR85]
 	mov	w0, 0
-.L1500:
+.L1462:
 	cmp	w1, w7
-	blt	.L1503
-	cbz	w0, .L1504
+	blt	.L1465
+	cbz	w0, .L1466
 	mov	w1, 32768
 	sdiv	w0, w1, w0
 	add	w0, w0, 1
 	sxth	w0, w0
-.L1499:
+.L1461:
 	ldr	x3, [x29, 184]
 	mov	w1, 6
 	smull	x1, w19, w1
@@ -9101,264 +8990,179 @@ zftl_sblk_list_init:
 	and	w0, w0, 224
 	cmp	w0, 32
 	ccmp	w0, w1, 4, ne
-	beq	.L1505
-	adrp	x1, .LANCHOR10
-	ldr	x1, [x1, #:lo12:.LANCHOR10]
+	beq	.L1467
+	adrp	x1, .LANCHOR12
+	ldr	x1, [x1, #:lo12:.LANCHOR12]
 	ldrh	w4, [x1, 16]
 	cmp	w19, w4
-	beq	.L1505
+	beq	.L1467
 	ldrh	w4, [x1, 48]
 	cmp	w19, w4
-	beq	.L1505
+	beq	.L1467
 	ldrh	w1, [x1, 80]
 	cmp	w19, w1
-	beq	.L1505
+	beq	.L1467
 	cmp	w0, 64
-	bne	.L1506
+	bne	.L1468
 	ldr	x0, [x29, 144]
 	add	x2, x22, :lo12:.LANCHOR97
 	mov	w1, w19
-	add	x0, x0, :lo12:.LANCHOR12
-.L1522:
+	add	x0, x0, :lo12:.LANCHOR95
+.L1484:
 	bl	_insert_data_list
-.L1505:
+.L1467:
 	add	w19, w19, 1
 	sxth	w19, w19
-	b	.L1498
-.L1503:
+	b	.L1460
+.L1465:
 	asr	w4, w5, w1
-	tbnz	x4, 0, .L1501
+	tbnz	x4, 0, .L1463
 	add	w0, w8, w0
 	sxth	w0, w0
-.L1502:
+.L1464:
 	add	w1, w1, 1
-	b	.L1500
-.L1501:
+	b	.L1462
+.L1463:
 	ldrh	w4, [x6, 146]
 	add	w4, w4, 1
 	strh	w4, [x6, 146]
-	b	.L1502
-.L1504:
+	b	.L1464
+.L1466:
 	ldrb	w1, [x28, 2]
 	mov	w4, -1
 	orr	w1, w1, -32
 	strb	w1, [x28, 2]
-	adrp	x1, .LANCHOR9
-	ldr	x1, [x1, #:lo12:.LANCHOR9]
+	adrp	x1, .LANCHOR11
+	ldr	x1, [x1, #:lo12:.LANCHOR11]
 	strh	w4, [x1, x2, lsl 1]
-	b	.L1499
-.L1516:
+	b	.L1461
+.L1478:
 	ldr	w0, [x29, 204]
-	b	.L1499
-.L1506:
+	b	.L1461
+.L1468:
 	cmp	w0, 96
-	bne	.L1507
+	bne	.L1469
 	ldr	x0, [x29, 152]
 	add	x2, x20, :lo12:.LANCHOR99
 	mov	w1, w19
-	add	x0, x0, :lo12:.LANCHOR89
-	b	.L1522
-.L1507:
+	add	x0, x0, :lo12:.LANCHOR90
+	b	.L1484
+.L1469:
 	cmp	w0, 160
-	bne	.L1508
+	bne	.L1470
 	ldr	x0, [x29, 136]
-	add	x2, x21, :lo12:.LANCHOR93
+	add	x2, x21, :lo12:.LANCHOR91
 	mov	w1, w19
-	add	x0, x0, :lo12:.LANCHOR88
-	b	.L1522
-.L1508:
-	cbnz	w0, .L1505
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	add	x0, x0, :lo12:.LANCHOR92
+	b	.L1484
+.L1470:
+	cbnz	w0, .L1467
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrh	w2, [x0, x2, lsl 1]
-	cbz	w2, .L1509
+	cbz	w2, .L1471
 	cmp	w27, 2
-	bgt	.L1510
+	bgt	.L1472
 	mov	w1, w19
-	adrp	x0, .LC94
-	add	x0, x0, :lo12:.LC94
+	adrp	x0, .LC91
+	add	x0, x0, :lo12:.LC91
 	bl	printf
 	ldrb	w0, [x28, 2]
 	add	w27, w27, 1
 	sxth	w27, w27
-	tbz	x0, 4, .L1511
+	tbz	x0, 4, .L1473
 	mov	w1, 5
-.L1521:
+.L1483:
 	bfi	w0, w1, 5, 3
 	strb	w0, [x28, 2]
 	mov	w2, 0
 	mov	w1, 1
 	mov	w0, w19
 	bl	gc_add_sblk
-	b	.L1505
-.L1511:
+	b	.L1467
+.L1473:
 	mov	w1, 2
-	b	.L1521
-.L1510:
+	b	.L1483
+.L1472:
 	ldp	x0, x1, [x29, 104]
-	mov	w2, 651
+	mov	w2, 656
 	bl	printf
-.L1509:
+.L1471:
 	ldrb	w0, [x28, 2]
 	ands	w0, w0, 24
-	bne	.L1513
+	bne	.L1475
 	ldr	x0, [x29, 176]
 	add	x2, x25, :lo12:.LANCHOR103
 	mov	w1, w19
 	add	x0, x0, :lo12:.LANCHOR104
-.L1523:
+.L1485:
 	bl	_insert_free_list
-	b	.L1505
-.L1513:
+	b	.L1467
+.L1475:
 	cmp	w0, 16
-	bne	.L1514
+	bne	.L1476
 	ldr	x0, [x29, 168]
 	add	x2, x24, :lo12:.LANCHOR105
 	mov	w1, w19
 	add	x0, x0, :lo12:.LANCHOR106
-	b	.L1523
-.L1514:
+	b	.L1485
+.L1476:
 	ldr	x0, [x29, 160]
 	add	x2, x23, :lo12:.LANCHOR107
 	mov	w1, w19
 	add	x0, x0, :lo12:.LANCHOR108
-	b	.L1523
+	b	.L1485
 	.size	zftl_sblk_list_init, .-zftl_sblk_list_init
-	.section	.text.ftl_open_sblk_init,"ax",@progbits
+	.section	.text.pm_free_sblk,"ax",@progbits
 	.align	2
-	.global	ftl_open_sblk_init
-	.type	ftl_open_sblk_init, %function
-ftl_open_sblk_init:
-	stp	x29, x30, [sp, -80]!
+	.global	pm_free_sblk
+	.type	pm_free_sblk, %function
+pm_free_sblk:
+	stp	x29, x30, [sp, -384]!
+	adrp	x0, .LANCHOR152
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR80
-	stp	x23, x24, [sp, 48]
-	adrp	x22, .LC82
 	stp	x19, x20, [sp, 16]
-	adrp	x24, .LANCHOR95
 	mov	x19, x0
-	mov	w23, w1
-	add	x24, x24, :lo12:.LANCHOR95
-	add	x21, x21, :lo12:.LANCHOR80
-	add	x22, x22, :lo12:.LC82
-	stp	x25, x26, [sp, 64]
-.L1525:
-	mov	w25, 65535
-.L1526:
-	mov	w0, w23
-	bl	ftl_alloc_sblk
-	and	w20, w0, 65535
-	cmp	w20, w25
-	beq	.L1526
-	mov	w1, 0
-	mov	w0, w20
-	bl	ftl_erase_sblk
-	add	x1, x19, 16
-	mov	w0, w20
-	bl	ftl_get_blk_list_in_sblk
-	and	w0, w0, 255
-	ldrh	w1, [x24]
-	cmp	w23, 2
-	strb	w0, [x19, 9]
-	strh	w20, [x19]
-	strh	wzr, [x19, 2]
-	mul	w0, w1, w0
-	strb	wzr, [x19, 5]
-	strh	w0, [x19, 6]
-	strh	wzr, [x19, 10]
-	strb	w23, [x19, 4]
-	beq	.L1529
-	ldrb	w0, [x21]
-	mul	w0, w1, w0
-	and	w0, w0, 65535
-.L1527:
-	ldrb	w2, [x21]
-	adrp	x26, .LANCHOR9
-	strh	w0, [x19, 12]
-	ubfiz	x25, x20, 1, 16
-	mul	w2, w2, w1
-	adrp	x1, .LANCHOR117
-	ldr	x3, [x1, #:lo12:.LANCHOR117]
-	mov	w1, 255
-	lsl	w2, w2, 2
-	add	x0, x3, x0, uxth 2
-	bl	ftl_memset
-	ldr	x0, [x26, #:lo12:.LANCHOR9]
-	ldrh	w1, [x19, 6]
-	strh	w1, [x0, x25]
-	ldrb	w0, [x19, 9]
-	cbnz	w0, .L1524
-	mov	w1, w20
-	mov	x0, x22
-	bl	printf
-	ldr	x0, [x26, #:lo12:.LANCHOR9]
-	mov	w1, -1
-	strh	w1, [x0, x25]
-	mov	w0, 7
-	strb	w0, [x19, 4]
-	b	.L1525
-.L1529:
-	mov	w0, 0
-	b	.L1527
-.L1524:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
-	ret
-	.size	ftl_open_sblk_init, .-ftl_open_sblk_init
-	.section	.text.pm_free_sblk,"ax",@progbits
-	.align	2
-	.global	pm_free_sblk
-	.type	pm_free_sblk, %function
-pm_free_sblk:
-	stp	x29, x30, [sp, -384]!
-	adrp	x0, .LANCHOR155
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	x19, x0
-	ldrh	w1, [x0, #:lo12:.LANCHOR155]
-	stp	x21, x22, [sp, 32]
-	stp	x23, x24, [sp, 48]
-	cmp	w1, 128
+	ldrh	w1, [x0, #:lo12:.LANCHOR152]
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	cmp	w1, 128
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	bls	.L1533
-	adrp	x1, .LANCHOR156
+	bls	.L1487
+	adrp	x1, .LANCHOR153
 	adrp	x0, .LC0
 	mov	w2, 94
-	add	x1, x1, :lo12:.LANCHOR156
+	add	x1, x1, :lo12:.LANCHOR153
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1533:
+.L1487:
 	adrp	x5, .LANCHOR110
 	mov	x26, x5
-	ldrh	w3, [x19, #:lo12:.LANCHOR155]
+	ldrh	w3, [x19, #:lo12:.LANCHOR152]
 	mov	w1, 0
 	ldr	x0, [x5, #:lo12:.LANCHOR110]
 	mov	w19, 0
 	mov	w4, 65535
 	add	x0, x0, 416
 	ldrh	w2, [x0, 272]
-.L1536:
+.L1490:
 	ldrh	w6, [x0]
 	cmp	w6, w4
-	beq	.L1534
+	beq	.L1488
 	add	w1, w1, 1
 	and	w1, w1, 65535
-.L1534:
+.L1488:
 	cmp	w1, w2
-	bcs	.L1535
+	bcs	.L1489
 	cmp	w1, w3
-	bcs	.L1535
+	bcs	.L1489
 	add	w19, w19, 1
 	add	x0, x0, 2
 	and	w19, w19, 65535
 	cmp	w19, 128
-	bne	.L1536
-.L1535:
+	bne	.L1490
+.L1489:
 	add	w19, w19, 1
 	mov	w0, 128
 	and	w19, w19, 65535
@@ -9368,16 +9172,16 @@ pm_free_sblk:
 	csel	w19, w19, w0, ne
 	mov	w1, 0
 	mov	x0, x22
-	adrp	x23, .LANCHOR76
+	adrp	x23, .LANCHOR75
 	bl	ftl_memset
-	adrp	x0, .LANCHOR75
+	adrp	x0, .LANCHOR74
 	ldr	x6, [x26, #:lo12:.LANCHOR110]
 	mov	w2, 24
-	ldrb	w11, [x23, #:lo12:.LANCHOR76]
-	ldrh	w10, [x0, #:lo12:.LANCHOR75]
-	adrp	x0, .LANCHOR32
+	ldrb	w11, [x23, #:lo12:.LANCHOR75]
+	ldrh	w10, [x0, #:lo12:.LANCHOR74]
+	adrp	x0, .LANCHOR31
 	add	x4, x6, 704
-	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
 	ldrh	w1, [x6, 698]
 	sub	w2, w2, w0
 	sub	w0, w2, w10
@@ -9386,24 +9190,24 @@ pm_free_sblk:
 	add	x1, x6, x1, lsl 2
 	lsl	w2, w2, w0
 	sub	w2, w2, #1
-.L1538:
+.L1492:
 	cmp	x1, x4
-	bne	.L1541
-	adrp	x24, .LANCHOR80
-	adrp	x25, .LANCHOR95
-	adrp	x27, .LC95
-	adrp	x28, .LANCHOR14
-	ldrb	w21, [x24, #:lo12:.LANCHOR80]
-	add	x23, x23, :lo12:.LANCHOR76
-	ldrh	w0, [x25, #:lo12:.LANCHOR95]
-	add	x27, x27, :lo12:.LC95
-	add	x28, x28, :lo12:.LANCHOR14
+	bne	.L1495
+	adrp	x24, .LANCHOR79
+	adrp	x25, .LANCHOR94
+	adrp	x27, .LC92
+	adrp	x28, .LANCHOR19
+	ldrb	w21, [x24, #:lo12:.LANCHOR79]
+	add	x23, x23, :lo12:.LANCHOR75
+	ldrh	w0, [x25, #:lo12:.LANCHOR94]
+	add	x27, x27, :lo12:.LC92
+	add	x28, x28, :lo12:.LANCHOR19
 	mov	x20, 0
 	mov	w7, 65535
 	str	wzr, [x29, 124]
 	mul	w21, w21, w0
 	and	w21, w21, 65535
-.L1547:
+.L1501:
 	ldr	x0, [x26, #:lo12:.LANCHOR110]
 	and	w6, w20, 65535
 	ldrb	w2, [x23]
@@ -9413,36 +9217,36 @@ pm_free_sblk:
 	ldrh	w1, [x0, 692]
 	sdiv	w1, w1, w2
 	cmp	w1, w3
-	bne	.L1542
-	ldrb	w1, [x24, #:lo12:.LANCHOR80]
-	ldrh	w2, [x25, #:lo12:.LANCHOR95]
+	bne	.L1496
+	ldrb	w1, [x24, #:lo12:.LANCHOR79]
+	ldrh	w2, [x25, #:lo12:.LANCHOR94]
 	mul	w1, w1, w2
 	strh	w1, [x22, x20, lsl 1]
-.L1542:
+.L1496:
 	ldrh	w2, [x22, x20, lsl 1]
 	cmp	w2, w21
-	bcs	.L1543
+	bcs	.L1497
 	cmp	w2, 0
 	ldr	w1, [x29, 124]
 	csel	w21, w21, w2, eq
 	csel	w1, w1, w6, eq
 	str	w1, [x29, 124]
-.L1543:
+.L1497:
 	ldrh	w1, [x0, 74]
 	cmp	w1, 2
-	bls	.L1544
+	bls	.L1498
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L1544
-	adrp	x4, .LANCHOR7
+	beq	.L1498
+	adrp	x4, .LANCHOR9
 	ubfiz	x1, x3, 2, 16
 	ldrh	w0, [x0, 92]
-	ldr	x4, [x4, #:lo12:.LANCHOR7]
+	ldr	x4, [x4, #:lo12:.LANCHOR9]
 	add	w0, w0, 4
 	ldrh	w4, [x4, x1]
 	and	w4, w4, 2047
 	cmp	w4, w0
-	bgt	.L1544
+	bgt	.L1498
 	mov	w1, w8
 	str	w6, [x29, 104]
 	str	w8, [x29, 112]
@@ -9451,29 +9255,29 @@ pm_free_sblk:
 	ldr	w6, [x29, 104]
 	ldr	w8, [x29, 112]
 	mov	w7, w6
-.L1544:
+.L1498:
 	ldrh	w0, [x22, x20, lsl 1]
-	cbnz	w0, .L1545
+	cbnz	w0, .L1499
 	ldr	x0, [x26, #:lo12:.LANCHOR110]
 	sxtw	x6, w8
 	add	x1, x6, 208
 	ldrh	w3, [x0, x1, lsl 1]
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L1545
+	beq	.L1499
 	ldr	w1, [x28]
-	tbz	x1, 12, .L1546
+	tbz	x1, 12, .L1500
 	ldrh	w4, [x0, 688]
 	mov	w2, 0
 	str	x6, [x29, 104]
 	mov	w1, w8
 	str	w7, [x29, 112]
-	adrp	x0, .LC96
-	add	x0, x0, :lo12:.LC96
+	adrp	x0, .LC93
+	add	x0, x0, :lo12:.LC93
 	bl	printf
 	ldr	w7, [x29, 112]
 	ldr	x6, [x29, 104]
-.L1546:
+.L1500:
 	ldr	x0, [x26, #:lo12:.LANCHOR110]
 	add	x6, x6, 208
 	str	w7, [x29, 104]
@@ -9488,10 +9292,10 @@ pm_free_sblk:
 	ldrh	w1, [x0, 688]
 	sub	w1, w1, #1
 	strh	w1, [x0, 688]
-.L1545:
+.L1499:
 	add	x20, x20, 1
 	cmp	w19, w20, uxth
-	bhi	.L1547
+	bhi	.L1501
 	mov	w0, 65535
 	cmp	w7, w0
 	ldr	w0, [x29, 124]
@@ -9503,7 +9307,7 @@ pm_free_sblk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 384
 	ret
-.L1541:
+.L1495:
 	ldr	w0, [x4]
 	add	x7, x6, 416
 	mov	x3, 0
@@ -9511,20 +9315,20 @@ pm_free_sblk:
 	and	w0, w0, w2
 	udiv	w0, w0, w11
 	and	w0, w0, 65535
-.L1540:
+.L1494:
 	ldrh	w8, [x7]
 	cmp	w8, w0
-	bne	.L1539
+	bne	.L1493
 	ldrh	w8, [x22, x3, lsl 1]
 	add	w8, w8, 1
 	strh	w8, [x22, x3, lsl 1]
-.L1539:
+.L1493:
 	add	x3, x3, 1
 	add	x7, x7, 2
 	cmp	w19, w3, uxth
-	bhi	.L1540
+	bhi	.L1494
 	add	x4, x4, 4
-	b	.L1538
+	b	.L1492
 	.size	pm_free_sblk, .-pm_free_sblk
 	.section	.text.ftl_memcpy,"ax",@progbits
 	.align	2
@@ -9540,24 +9344,24 @@ ftl_memcpy:
 	.type	flash_info_data_init, %function
 flash_info_data_init:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR14
+	adrp	x0, .LANCHOR19
 	add	x29, sp, 0
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
 	str	x19, [sp, 16]
-	tbz	x0, 12, .L1560
-	adrp	x2, .LANCHOR157
-	adrp	x0, .LC97
-	add	x2, x2, :lo12:.LANCHOR157
-	mov	w1, 119
-	add	x0, x0, :lo12:.LC97
+	tbz	x0, 12, .L1514
+	adrp	x2, .LANCHOR154
+	adrp	x0, .LC94
+	add	x2, x2, :lo12:.LANCHOR154
+	mov	w1, 120
+	add	x0, x0, :lo12:.LC94
 	bl	printf
-.L1560:
-	adrp	x19, .LANCHOR27
+.L1514:
+	adrp	x19, .LANCHOR6
 	mov	w2, 2048
 	mov	w1, 0
-	ldr	x0, [x19, #:lo12:.LANCHOR27]
+	ldr	x0, [x19, #:lo12:.LANCHOR6]
 	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR27]
+	ldr	x0, [x19, #:lo12:.LANCHOR6]
 	mov	w1, 21321
 	movk	w1, 0x5359, lsl 16
 	mov	w2, 32
@@ -9567,15 +9371,15 @@ flash_info_data_init:
 	str	w1, [x0, -72]
 	mov	w1, 1
 	strh	w1, [x0, -64]
-	adrp	x1, .LANCHOR20
-	add	x1, x1, :lo12:.LANCHOR20
+	adrp	x1, .LANCHOR25
+	add	x1, x1, :lo12:.LANCHOR25
 	bl	ftl_memcpy
-	ldr	x0, [x19, #:lo12:.LANCHOR27]
+	ldr	x0, [x19, #:lo12:.LANCHOR6]
 	mov	w2, 32
 	ldr	x19, [sp, 16]
-	adrp	x1, .LANCHOR33
+	adrp	x1, .LANCHOR32
 	ldp	x29, x30, [sp], 32
-	add	x1, x1, :lo12:.LANCHOR33
+	add	x1, x1, :lo12:.LANCHOR32
 	add	x0, x0, 48
 	b	ftl_memcpy
 	.size	flash_info_data_init, .-flash_info_data_init
@@ -9585,15 +9389,15 @@ flash_info_data_init:
 	.type	ftl_memcpy32, %function
 ftl_memcpy32:
 	mov	x3, 0
-.L1566:
+.L1520:
 	cmp	w2, w3
-	bhi	.L1567
+	bhi	.L1521
 	ret
-.L1567:
+.L1521:
 	ldr	w4, [x1, x3, lsl 2]
 	str	w4, [x0, x3, lsl 2]
 	add	x3, x3, 1
-	b	.L1566
+	b	.L1520
 	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.ftl_memcmp,"ax",@progbits
 	.align	2
@@ -9629,47 +9433,47 @@ nandc_init:
 	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR14
+	adrp	x21, .LANCHOR19
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	ldr	w0, [x21, #:lo12:.LANCHOR19]
 	str	wzr, [x29, 56]
-	tbz	x0, 12, .L1572
-	adrp	x1, .LANCHOR158
-	adrp	x0, .LC98
+	tbz	x0, 12, .L1526
+	adrp	x1, .LANCHOR155
+	adrp	x0, .LC95
 	mov	x2, x19
-	add	x1, x1, :lo12:.LANCHOR158
-	add	x0, x0, :lo12:.LC98
+	add	x1, x1, :lo12:.LANCHOR155
+	add	x0, x0, :lo12:.LC95
 	bl	printf
-.L1572:
-	adrp	x20, .LANCHOR28
+.L1526:
+	adrp	x20, .LANCHOR27
 	mov	w0, 6
 	ldr	w2, [x19, 352]
 	mov	w1, 12336
-	strb	w0, [x20, #:lo12:.LANCHOR28]
-	adrp	x0, .LANCHOR13
+	strb	w0, [x20, #:lo12:.LANCHOR27]
+	adrp	x0, .LANCHOR7
 	movk	w1, 0x5638, lsl 16
 	mov	x22, x0
-	str	x19, [x0, #:lo12:.LANCHOR13]
+	str	x19, [x0, #:lo12:.LANCHOR7]
 	cmp	w2, w1
-	bne	.L1573
+	bne	.L1527
 	mov	w0, 8
-	strb	w0, [x20, #:lo12:.LANCHOR28]
-.L1573:
+	strb	w0, [x20, #:lo12:.LANCHOR27]
+.L1527:
 	ldr	w1, [x19, 128]
 	mov	w0, 12336
 	movk	w0, 0x5639, lsl 16
 	cmp	w1, w0
-	bne	.L1574
+	bne	.L1528
 	mov	w0, 9
-	strb	w0, [x20, #:lo12:.LANCHOR28]
-.L1574:
-	ldrb	w0, [x20, #:lo12:.LANCHOR28]
+	strb	w0, [x20, #:lo12:.LANCHOR27]
+.L1528:
+	ldrb	w0, [x20, #:lo12:.LANCHOR27]
 	cmp	w0, 9
-	adrp	x0, .LANCHOR51
-	bne	.L1575
+	adrp	x0, .LANCHOR50
+	bne	.L1529
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR51]
+	strb	w1, [x0, #:lo12:.LANCHOR50]
 	ldr	w0, [x29, 56]
 	mov	w1, 2
 	orr	w0, w0, 256
@@ -9691,38 +9495,38 @@ nandc_init:
 	str	w0, [x19, 84]
 	mov	w0, 39
 	str	w0, [x19, 84]
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1577
+	ldr	w0, [x21, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L1531
 	ldr	w1, [x19]
 	ldr	w2, [x19, 8]
 	ldr	w3, [x19, 80]
 	ldr	w4, [x19, 84]
 	ldr	w5, [x19, 88]
-.L1590:
-	adrp	x0, .LC99
-	add	x0, x0, :lo12:.LC99
+.L1544:
+	adrp	x0, .LC96
+	add	x0, x0, :lo12:.LC96
 	bl	printf
-.L1577:
-	adrp	x0, .LANCHOR52
+.L1531:
+	adrp	x0, .LANCHOR51
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR52]
-	adrp	x0, .LANCHOR54
-	strh	wzr, [x0, #:lo12:.LANCHOR54]
-	adrp	x0, .LANCHOR50
-	strb	wzr, [x0, #:lo12:.LANCHOR50]
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1571
-	ldrb	w1, [x20, #:lo12:.LANCHOR28]
-	adrp	x0, .LC100
-	add	x0, x0, :lo12:.LC100
+	strb	w1, [x0, #:lo12:.LANCHOR51]
+	adrp	x0, .LANCHOR53
+	strh	wzr, [x0, #:lo12:.LANCHOR53]
+	adrp	x0, .LANCHOR49
+	strb	wzr, [x0, #:lo12:.LANCHOR49]
+	ldr	w0, [x21, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L1525
+	ldrb	w1, [x20, #:lo12:.LANCHOR27]
+	adrp	x0, .LC97
+	add	x0, x0, :lo12:.LC97
 	bl	printf
-.L1571:
+.L1525:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1575:
-	strb	wzr, [x0, #:lo12:.LANCHOR51]
+.L1529:
+	strb	wzr, [x0, #:lo12:.LANCHOR50]
 	mov	w1, 1
 	ldr	w0, [x29, 56]
 	orr	w0, w0, 256
@@ -9746,17 +9550,17 @@ nandc_init:
 	str	w0, [x19, 308]
 	mov	w0, 2048
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR53
-	str	x0, [x1, #:lo12:.LANCHOR53]
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1577
-	ldr	x0, [x22, #:lo12:.LANCHOR13]
+	adrp	x1, .LANCHOR52
+	str	x0, [x1, #:lo12:.LANCHOR52]
+	ldr	w0, [x21, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L1531
+	ldr	x0, [x22, #:lo12:.LANCHOR7]
 	ldr	w1, [x0]
 	ldr	w2, [x0, 344]
 	ldr	w3, [x0, 304]
 	ldr	w4, [x0, 308]
 	ldr	w5, [x0, 312]
-	b	.L1590
+	b	.L1544
 	.size	nandc_init, .-nandc_init
 	.section	.text.zbuf_init,"ax",@progbits
 	.align	2
@@ -9764,16 +9568,16 @@ nandc_init:
 	.type	zbuf_init, %function
 zbuf_init:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LANCHOR56
+	adrp	x0, .LANCHOR55
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	add	x19, x0, :lo12:.LANCHOR56
+	add	x19, x0, :lo12:.LANCHOR55
 	stp	x21, x22, [sp, 32]
 	mov	x20, x0
 	adrp	x22, .LANCHOR131
 	add	x22, x22, :lo12:.LANCHOR131
 	mov	w21, 0
-.L1592:
+.L1546:
 	and	w0, w21, 255
 	strb	w0, [x19, 1]
 	add	w1, w0, 1
@@ -9790,15 +9594,15 @@ zbuf_init:
 	bl	ftl_malloc
 	str	x0, [x19, -40]
 	cmp	w21, 32
-	bne	.L1592
-	add	x0, x20, :lo12:.LANCHOR56
+	bne	.L1546
+	add	x0, x20, :lo12:.LANCHOR55
 	mov	w1, -1
 	strb	w1, [x0, 1984]
+	adrp	x0, .LANCHOR56
+	strb	wzr, [x0, #:lo12:.LANCHOR56]
 	adrp	x0, .LANCHOR57
-	strb	wzr, [x0, #:lo12:.LANCHOR57]
-	adrp	x0, .LANCHOR58
 	ldp	x19, x20, [sp, 16]
-	strb	w21, [x0, #:lo12:.LANCHOR58]
+	strb	w21, [x0, #:lo12:.LANCHOR57]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
@@ -9809,94 +9613,94 @@ zbuf_init:
 	.type	gc_init, %function
 gc_init:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR85
-	mov	w2, 2136
+	adrp	x0, .LANCHOR84
+	mov	w2, 2216
 	mov	w1, 0
 	add	x29, sp, 0
-	strb	wzr, [x0, #:lo12:.LANCHOR85]
-	adrp	x0, .LANCHOR159
+	strb	wzr, [x0, #:lo12:.LANCHOR84]
+	adrp	x0, .LANCHOR156
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR71
-	strb	wzr, [x0, #:lo12:.LANCHOR159]
-	adrp	x0, .LANCHOR160
-	add	x19, x20, :lo12:.LANCHOR71
-	str	wzr, [x0, #:lo12:.LANCHOR160]
+	adrp	x20, .LANCHOR70
+	strb	wzr, [x0, #:lo12:.LANCHOR156]
+	adrp	x0, .LANCHOR157
+	add	x19, x20, :lo12:.LANCHOR70
+	str	wzr, [x0, #:lo12:.LANCHOR157]
 	adrp	x0, .LANCHOR96
 	strh	wzr, [x0, #:lo12:.LANCHOR96]
 	mov	x0, x19
 	bl	ftl_memset
 	str	xzr, [x19, 8]
 	mov	w0, -1
-	strh	w0, [x20, #:lo12:.LANCHOR71]
-	adrp	x0, .LANCHOR95
+	strh	w0, [x20, #:lo12:.LANCHOR70]
+	adrp	x0, .LANCHOR94
 	adrp	x4, .LANCHOR102
-	adrp	x20, .LANCHOR86
-	ldrh	w1, [x0, #:lo12:.LANCHOR95]
+	adrp	x20, .LANCHOR85
+	ldrh	w1, [x0, #:lo12:.LANCHOR94]
 	lsr	w2, w1, 1
 	lsr	w0, w1, 2
 	strh	w2, [x19, 38]
-	adrp	x2, .LANCHOR90
+	adrp	x2, .LANCHOR87
 	strh	w0, [x19, 36]
-	adrp	x19, .LANCHOR80
-	strh	wzr, [x2, #:lo12:.LANCHOR90]
-	adrp	x2, .LANCHOR91
-	ldrb	w3, [x19, #:lo12:.LANCHOR80]
-	strh	wzr, [x2, #:lo12:.LANCHOR91]
-	adrp	x2, .LANCHOR92
-	strh	wzr, [x2, #:lo12:.LANCHOR92]
+	adrp	x19, .LANCHOR79
+	strh	wzr, [x2, #:lo12:.LANCHOR87]
+	adrp	x2, .LANCHOR88
+	ldrb	w3, [x19, #:lo12:.LANCHOR79]
+	strh	wzr, [x2, #:lo12:.LANCHOR88]
+	adrp	x2, .LANCHOR89
+	strh	wzr, [x2, #:lo12:.LANCHOR89]
 	mul	w2, w1, w3
 	and	w2, w2, 65535
 	sub	w5, w2, #32
 	strh	w5, [x4, #:lo12:.LANCHOR102]
 	adrp	x4, .LANCHOR100
 	strh	w2, [x4, #:lo12:.LANCHOR100]
-	adrp	x2, .LANCHOR94
-	strh	w1, [x2, #:lo12:.LANCHOR94]
-	adrp	x1, .LANCHOR161
+	adrp	x2, .LANCHOR93
+	strh	w1, [x2, #:lo12:.LANCHOR93]
+	adrp	x1, .LANCHOR158
 	mov	w2, 4
-	strh	w2, [x1, #:lo12:.LANCHOR161]
-	adrp	x1, .LANCHOR70
-	strh	w0, [x1, #:lo12:.LANCHOR70]
-	ldrh	w0, [x20, #:lo12:.LANCHOR86]
+	strh	w2, [x1, #:lo12:.LANCHOR158]
+	adrp	x1, .LANCHOR69
+	strh	w0, [x1, #:lo12:.LANCHOR69]
+	ldrh	w0, [x20, #:lo12:.LANCHOR85]
 	mul	w0, w0, w3
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR162
-	str	x0, [x1, #:lo12:.LANCHOR162]
-	ldrb	w1, [x19, #:lo12:.LANCHOR80]
-	ldrh	w0, [x20, #:lo12:.LANCHOR86]
+	adrp	x1, .LANCHOR159
+	str	x0, [x1, #:lo12:.LANCHOR159]
+	ldrb	w1, [x19, #:lo12:.LANCHOR79]
+	ldrh	w0, [x20, #:lo12:.LANCHOR85]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR163
-	str	x0, [x1, #:lo12:.LANCHOR163]
-	ldrh	w1, [x20, #:lo12:.LANCHOR86]
-	ldrb	w0, [x19, #:lo12:.LANCHOR80]
+	adrp	x1, .LANCHOR160
+	str	x0, [x1, #:lo12:.LANCHOR160]
+	ldrh	w1, [x20, #:lo12:.LANCHOR85]
+	ldrb	w0, [x19, #:lo12:.LANCHOR79]
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR83
-	str	x0, [x1, #:lo12:.LANCHOR83]
-	ldrb	w1, [x19, #:lo12:.LANCHOR80]
-	ldrh	w0, [x20, #:lo12:.LANCHOR86]
+	adrp	x1, .LANCHOR82
+	str	x0, [x1, #:lo12:.LANCHOR82]
+	ldrb	w1, [x19, #:lo12:.LANCHOR79]
+	ldrh	w0, [x20, #:lo12:.LANCHOR85]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR77
-	str	x0, [x1, #:lo12:.LANCHOR77]
-	ldrb	w1, [x19, #:lo12:.LANCHOR80]
-	ldrh	w0, [x20, #:lo12:.LANCHOR86]
+	adrp	x1, .LANCHOR76
+	str	x0, [x1, #:lo12:.LANCHOR76]
+	ldrb	w1, [x19, #:lo12:.LANCHOR79]
+	ldrh	w0, [x20, #:lo12:.LANCHOR85]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR164
+	adrp	x1, .LANCHOR161
 	ldp	x19, x20, [sp, 16]
-	str	x0, [x1, #:lo12:.LANCHOR164]
+	str	x0, [x1, #:lo12:.LANCHOR161]
 	adrp	x0, .LANCHOR98
-	adrp	x1, .LANCHOR87
+	adrp	x1, .LANCHOR86
 	ldp	x29, x30, [sp], 32
 	ldrh	w0, [x0, #:lo12:.LANCHOR98]
 	lsr	w0, w0, 2
-	strh	w0, [x1, #:lo12:.LANCHOR87]
+	strh	w0, [x1, #:lo12:.LANCHOR86]
 	ret
 	.size	gc_init, .-gc_init
 	.section	.text.ftl_free,"ax",@progbits
@@ -9915,18 +9719,18 @@ js_hash:
 	mov	w0, 42982
 	mov	x3, 0
 	movk	w0, 0x47c6, lsl 16
-.L1599:
+.L1553:
 	cmp	w1, w3
-	bhi	.L1600
+	bhi	.L1554
 	ret
-.L1600:
+.L1554:
 	lsr	w2, w0, 2
 	ldrb	w5, [x4, x3]
 	add	w2, w2, w0, lsl 5
 	add	x3, x3, 1
 	add	w2, w2, w5
 	eor	w0, w0, w2
-	b	.L1599
+	b	.L1553
 	.size	js_hash, .-js_hash
 	.section	.text.ftl_debug_info_fill,"ax",@progbits
 	.align	2
@@ -9936,11 +9740,11 @@ ftl_debug_info_fill:
 	adrp	x3, .LANCHOR131
 	ldrb	w3, [x3, #:lo12:.LANCHOR131]
 	cmp	w3, 8
-	bls	.L1605
+	bls	.L1559
 	and	w0, w0, 255
 	cmp	x2, 0
 	ccmp	w0, 2, 0, ne
-	bne	.L1603
+	bne	.L1557
 	stp	x29, x30, [sp, -16]!
 	mov	x6, x1
 	mov	w1, 21320
@@ -9954,9 +9758,9 @@ ftl_debug_info_fill:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1603:
+.L1557:
 	stp	wzr, wzr, [x1]
-.L1605:
+.L1559:
 	mov	w0, 0
 	ret
 	.size	ftl_debug_info_fill, .-ftl_debug_info_fill
@@ -9995,8 +9799,8 @@ ftl_get_density:
 	.global	ftl_get_capacity
 	.type	ftl_get_capacity, %function
 ftl_get_capacity:
-	adrp	x0, .LANCHOR68
-	ldr	w0, [x0, #:lo12:.LANCHOR68]
+	adrp	x0, .LANCHOR67
+	ldr	w0, [x0, #:lo12:.LANCHOR67]
 	ret
 	.size	ftl_get_capacity, .-ftl_get_capacity
 	.section	.text.rknand_print_hex,"ax",@progbits
@@ -10007,637 +9811,652 @@ rknand_print_hex:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LC102
+	adrp	x21, .LC99
 	stp	x23, x24, [sp, 48]
 	mov	x22, x1
 	stp	x25, x26, [sp, 64]
 	mov	w24, w2
 	stp	x27, x28, [sp, 80]
-	adrp	x25, .LC101
+	adrp	x25, .LC98
 	mov	x27, x0
 	uxtw	x26, w3
-	add	x25, x25, :lo12:.LC101
-	add	x21, x21, :lo12:.LC102
+	add	x25, x25, :lo12:.LC98
+	add	x21, x21, :lo12:.LC99
 	stp	x19, x20, [sp, 16]
 	mov	w23, 0
 	mov	x19, 0
 	mov	w20, 0
-	adrp	x28, .LC103
-.L1614:
+	adrp	x28, .LC100
+.L1568:
 	cmp	x26, x19
-	bne	.L1620
+	bne	.L1574
 	ldp	x19, x20, [sp, 16]
-	adrp	x1, .LC103
+	adrp	x1, .LC100
 	ldp	x21, x22, [sp, 32]
-	add	x1, x1, :lo12:.LC103
+	add	x1, x1, :lo12:.LC100
 	ldp	x23, x24, [sp, 48]
-	adrp	x0, .LC104
+	adrp	x0, .LC101
 	ldp	x25, x26, [sp, 64]
-	add	x0, x0, :lo12:.LC104
+	add	x0, x0, :lo12:.LC101
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	printf
-.L1620:
-	cbnz	w20, .L1615
+.L1574:
+	cbnz	w20, .L1569
 	mov	w3, w23
 	mov	x2, x22
 	mov	x1, x27
 	mov	x0, x25
 	bl	printf
-.L1615:
+.L1569:
 	cmp	w24, 4
-	bne	.L1616
+	bne	.L1570
 	ldr	w1, [x22, x19, lsl 2]
-.L1622:
+.L1576:
 	mov	x0, x21
 	add	w20, w20, 1
 	bl	printf
 	cmp	w20, 15
-	bls	.L1619
+	bls	.L1573
 	mov	w20, 0
-	add	x1, x28, :lo12:.LC103
-	adrp	x0, .LC104
-	add	x0, x0, :lo12:.LC104
+	add	x1, x28, :lo12:.LC100
+	adrp	x0, .LC101
+	add	x0, x0, :lo12:.LC101
 	bl	printf
-.L1619:
+.L1573:
 	add	x19, x19, 1
 	add	w23, w23, w24
-	b	.L1614
-.L1616:
+	b	.L1568
+.L1570:
 	cmp	w24, 2
-	bne	.L1618
+	bne	.L1572
 	ldrsh	w1, [x22, x19, lsl 1]
-	b	.L1622
-.L1618:
+	b	.L1576
+.L1572:
 	ldrb	w1, [x22, x19]
-	b	.L1622
+	b	.L1576
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.hynix_get_read_retry_default,"ax",@progbits
 	.align	2
 	.global	hynix_get_read_retry_default
 	.type	hynix_get_read_retry_default, %function
 hynix_get_read_retry_default:
-	stp	x29, x30, [sp, -96]!
-	mov	w10, w0
-	adrp	x0, .LANCHOR27
+	stp	x29, x30, [sp, -144]!
 	mov	w2, -83
-	add	x29, sp, 0
-	ldr	x8, [x0, #:lo12:.LANCHOR27]
-	mov	w0, -84
-	stp	x19, x20, [sp, 16]
 	mov	w1, -82
+	add	x29, sp, 0
+	stp	x25, x26, [sp, 64]
+	mov	w25, w0
+	adrp	x0, .LANCHOR6
 	stp	x21, x22, [sp, 32]
-	add	x6, x8, 128
 	stp	x23, x24, [sp, 48]
-	add	x13, x8, 112
-	stp	x25, x26, [sp, 64]
-	cmp	w10, 2
-	str	x27, [sp, 80]
-	strb	w0, [x8, 128]
+	cmp	w25, 2
+	ldr	x26, [x0, #:lo12:.LANCHOR6]
+	mov	w0, -84
+	stp	x19, x20, [sp, 16]
+	stp	x27, x28, [sp, 80]
+	add	x24, x26, 128
+	add	x21, x26, 112
+	strb	w0, [x26, 128]
 	mov	w0, -81
-	strb	w10, [x8, 112]
-	strb	w2, [x8, 129]
-	strb	w1, [x8, 130]
-	strb	w0, [x8, 131]
-	bne	.L1624
+	strb	w25, [x26, 112]
+	strb	w2, [x26, 129]
+	strb	w1, [x26, 130]
+	strb	w0, [x26, 131]
+	bne	.L1578
 	mov	w0, -89
-	strb	w0, [x13, 16]
-	adrp	x0, .LANCHOR165+17
+	strb	w0, [x21, 16]
+	adrp	x0, .LANCHOR162+17
 	mov	w1, -9
-	strb	w1, [x0, #:lo12:.LANCHOR165+17]
-.L1688:
-	mov	w24, 7
-	b	.L1731
-.L1624:
-	cmp	w10, 3
-	bne	.L1626
-	mov	x11, 0
-.L1627:
-	sub	w0, w11, #80
-	strb	w0, [x6, x11]
-	add	x11, x11, 1
-	cmp	x11, 8
-	bne	.L1627
-	mov	w24, w11
-.L1625:
-	sub	w0, w10, #1
+	strb	w1, [x0, #:lo12:.LANCHOR162+17]
+.L1642:
+	mov	w27, 7
+	b	.L1685
+.L1578:
+	cmp	w25, 3
+	bne	.L1580
+	mov	x5, 0
+.L1581:
+	sub	w0, w5, #80
+	strb	w0, [x24, x5]
+	add	x5, x5, 1
+	cmp	x5, 8
+	bne	.L1581
+	mov	w27, w5
+	mov	w28, w5
+.L1579:
+	sub	w0, w25, #1
 	cmp	w0, 1
-	bhi	.L1633
-	adrp	x7, .LANCHOR18
-	adrp	x8, .LANCHOR30
-	add	x7, x7, :lo12:.LANCHOR18
-	add	x8, x8, :lo12:.LANCHOR30
-	mov	w5, 0
-	mov	w10, 55
-.L1634:
-	ldrb	w0, [x7]
-	cmp	w0, w5
-	bhi	.L1640
-.L1641:
-	strb	w11, [x13, 1]
-	strb	w24, [x13, 2]
+	bhi	.L1587
+	adrp	x25, .LANCHOR23
+	adrp	x26, .LANCHOR29
+	add	x25, x25, :lo12:.LANCHOR23
+	add	x26, x26, :lo12:.LANCHOR29
+	mov	w23, 0
+	mov	w5, 55
+.L1588:
+	ldrb	w0, [x25]
+	cmp	w0, w23
+	bhi	.L1594
+.L1595:
+	strb	w28, [x21, 1]
+	strb	w27, [x21, 2]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldr	x27, [sp, 80]
-	ldp	x29, x30, [sp], 96
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 144
 	ret
-.L1626:
-	cmp	w10, 4
-	bne	.L1628
-	mov	w3, -52
-	strb	w3, [x8, 128]
-	mov	w3, -65
-	strb	w3, [x8, 129]
-	mov	w3, -86
-	strb	w3, [x8, 130]
-	mov	w3, -85
-	mov	w24, 8
-	strb	w3, [x8, 131]
-	mov	w11, w24
-	mov	w3, -51
-	strb	w2, [x8, 133]
-	strb	w3, [x8, 132]
-	strb	w1, [x8, 134]
-	strb	w0, [x8, 135]
-	b	.L1625
-.L1628:
-	cmp	w10, 5
-	bne	.L1629
+.L1580:
+	cmp	w25, 4
+	bne	.L1582
+	mov	w5, -52
+	strb	w5, [x26, 128]
+	mov	w5, -65
+	strb	w5, [x26, 129]
+	mov	w5, -86
+	strb	w5, [x26, 130]
+	mov	w5, -85
+	mov	w27, 8
+	strb	w5, [x26, 131]
+	mov	w28, w27
+	mov	w5, -51
+	strb	w2, [x26, 133]
+	strb	w5, [x26, 132]
+	strb	w1, [x26, 134]
+	strb	w0, [x26, 135]
+	b	.L1579
+.L1582:
+	cmp	w25, 5
+	bne	.L1583
 	mov	w0, 56
-	strb	w0, [x8, 128]
+	strb	w0, [x26, 128]
 	mov	w0, 57
-	strb	w0, [x8, 129]
+	strb	w0, [x26, 129]
 	mov	w0, 58
-	mov	w24, 8
-	strb	w0, [x8, 130]
+	mov	w27, 8
+	strb	w0, [x26, 130]
 	mov	w0, 59
-	strb	w0, [x8, 131]
-.L1731:
-	mov	w11, 4
-	b	.L1625
-.L1629:
-	cmp	w10, 6
-	bne	.L1630
+	strb	w0, [x26, 131]
+.L1685:
+	mov	w28, 4
+	b	.L1579
+.L1583:
+	cmp	w25, 6
+	bne	.L1584
 	mov	w0, 14
-	strb	w0, [x8, 128]
+	strb	w0, [x26, 128]
 	mov	w0, 15
-	strb	w0, [x8, 129]
+	strb	w0, [x26, 129]
 	mov	w0, 16
-	mov	w24, 12
-	strb	w0, [x8, 130]
+	mov	w27, 12
+	strb	w0, [x26, 130]
 	mov	w0, 17
-	strb	w0, [x8, 131]
-	b	.L1731
-.L1630:
-	cmp	w10, 7
-	bne	.L1631
+	strb	w0, [x26, 131]
+	b	.L1685
+.L1584:
+	cmp	w25, 7
+	bne	.L1585
 	mov	x0, 0
-.L1632:
+.L1586:
 	sub	w1, w0, #80
-	strb	w1, [x6, x0]
+	strb	w1, [x24, x0]
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L1632
+	bne	.L1586
 	mov	w0, -44
-	mov	w24, 12
-	strb	w0, [x8, 136]
-	mov	w11, 10
+	mov	w27, 12
+	strb	w0, [x26, 136]
+	mov	w28, 10
 	mov	w0, -43
-	strb	w0, [x8, 137]
-	b	.L1625
-.L1631:
-	cmp	w10, 8
-	bne	.L1688
+	strb	w0, [x26, 137]
+	b	.L1579
+.L1585:
+	cmp	w25, 8
+	bne	.L1642
 	mov	w0, 6
-	strb	w0, [x8, 128]
+	strb	w0, [x26, 128]
 	mov	w0, 7
-	strb	w0, [x8, 129]
+	strb	w0, [x26, 129]
 	mov	w0, 9
-	strb	w10, [x8, 130]
-	strb	w0, [x8, 131]
-	mov	w24, 50
+	strb	w25, [x26, 130]
+	strb	w0, [x26, 131]
+	mov	w27, 50
 	mov	w0, 10
-	mov	w11, 5
-	strb	w0, [x8, 132]
-	b	.L1625
-.L1640:
-	ldrb	w0, [x8, w5, sxtw]
+	mov	w28, 5
+	strb	w0, [x26, 132]
+	b	.L1579
+.L1594:
+	ldrb	w0, [x26, w23, sxtw]
 	mov	x1, 32
-	mov	w2, 160
-	mov	x3, 0
-	umaddl	x2, w2, w0, x1
-	adrp	x1, .LANCHOR13
+	mov	w19, 160
+	mov	x20, 0
+	umaddl	x19, w19, w0, x1
+	adrp	x1, .LANCHOR7
 	ubfiz	x0, x0, 8, 8
-	ldr	x4, [x1, #:lo12:.LANCHOR13]
-	add	x2, x13, x2
-	add	x4, x4, x0
-.L1635:
-	str	w10, [x4, 2056]
-	ldrb	w0, [x6, x3]
-	str	w0, [x4, 2052]
-	mov	w0, 80
-	bl	timer_delay_ns
-	ldr	w0, [x4, 2048]
-	strb	w0, [x2, x3]
-	add	x3, x3, 1
-	cmp	w11, w3, uxtb
-	bhi	.L1635
-	adrp	x3, .LANCHOR165
-	add	x3, x3, :lo12:.LANCHOR165
+	ldr	x22, [x1, #:lo12:.LANCHOR7]
+	add	x19, x21, x19
+	add	x22, x22, x0
+.L1589:
+	str	w5, [x22, 2056]
+	str	w5, [x29, 136]
+	ldrb	w0, [x24, x20]
+	str	w0, [x22, 2052]
+	mov	x0, 1
+	bl	udelay
+	ldr	w0, [x22, 2048]
+	strb	w0, [x19, x20]
+	add	x20, x20, 1
+	cmp	w28, w20, uxtb
+	ldr	w5, [x29, 136]
+	bhi	.L1589
+	adrp	x2, .LANCHOR162
+	add	x2, x2, :lo12:.LANCHOR162
 	mov	x0, 0
-.L1638:
-	add	x14, x2, x0
-	add	x12, x3, x0
+.L1592:
+	add	x7, x19, x0
+	add	x4, x2, x0
 	mov	x1, 1
-.L1637:
-	lsl	x4, x1, 2
-	lsl	x15, x1, 3
-	ldrb	w16, [x2, x0]
+.L1591:
+	lsl	x3, x1, 2
+	lsl	x8, x1, 3
+	ldrb	w10, [x19, x0]
 	add	x1, x1, 1
 	cmp	x1, 7
-	ldrb	w4, [x12, x4]
-	add	w4, w4, w16
-	strb	w4, [x14, x15]
-	bne	.L1637
+	ldrb	w3, [x4, x3]
+	add	w3, w3, w10
+	strb	w3, [x7, x8]
+	bne	.L1591
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L1638
-	add	w5, w5, 1
-	strb	wzr, [x2, 16]
-	strb	wzr, [x2, 24]
-	and	w5, w5, 255
-	strb	wzr, [x2, 32]
-	strb	wzr, [x2, 40]
-	strb	wzr, [x2, 48]
-	strb	wzr, [x2, 41]
-	strb	wzr, [x2, 49]
-	b	.L1634
-.L1633:
-	sub	w0, w10, #3
+	bne	.L1592
+	add	w23, w23, 1
+	strb	wzr, [x19, 16]
+	strb	wzr, [x19, 24]
+	and	w23, w23, 255
+	strb	wzr, [x19, 32]
+	strb	wzr, [x19, 40]
+	strb	wzr, [x19, 48]
+	strb	wzr, [x19, 41]
+	strb	wzr, [x19, 49]
+	b	.L1588
+.L1587:
+	sub	w0, w25, #3
 	cmp	w0, 5
-	bhi	.L1641
-	mul	w19, w24, w11
-	sub	w14, w11, #1
-	and	x14, x14, 255
-	adrp	x20, .LANCHOR18
-	sub	w21, w10, #5
-	add	x20, x20, :lo12:.LANCHOR18
-	asr	w15, w19, 1
-	add	x14, x14, 1
-	lsl	w19, w19, 4
-	lsl	w23, w15, 1
-	sbfiz	x22, x15, 1, 32
-	mov	w12, 0
-.L1642:
-	ldrb	w0, [x20]
-	cmp	w0, w12
-	bls	.L1641
-	adrp	x0, .LANCHOR30
-	add	x0, x0, :lo12:.LANCHOR30
-	ldrb	w25, [x0, w12, sxtw]
-	mov	w0, w25
+	bhi	.L1595
+	mul	w24, w27, w28
+	sub	w22, w28, #1
+	and	x22, x22, 255
+	mov	w20, 0
+	asr	w23, w24, 1
+	lsl	w0, w24, 4
+	str	w0, [x29, 128]
+	lsl	w0, w23, 1
+	str	w0, [x29, 132]
+	sbfiz	x0, x23, 1, 32
+	sub	w24, w25, #5
+	str	x0, [x29, 136]
+	adrp	x0, .LANCHOR23
+	add	x0, x0, :lo12:.LANCHOR23
+	str	x0, [x29, 120]
+	add	x0, x22, 1
+	str	x0, [x29, 112]
+.L1596:
+	ldr	x0, [x29, 120]
+	ldrb	w0, [x0]
+	cmp	w0, w20
+	bls	.L1595
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
+	mov	w19, 160
+	ldrb	w22, [x0, w20, sxtw]
+	mov	w0, w22
 	bl	zftl_flash_exit_slc_mode
-	adrp	x0, .LANCHOR13
-	mov	x5, 32
-	mov	w1, 160
-	mov	w6, 255
-	ldr	x4, [x0, #:lo12:.LANCHOR13]
+	mov	x0, 32
+	ubfiz	x2, x22, 8, 8
+	mov	w1, 255
+	str	w1, [x29, 108]
 	nop // between mem op and mult-accumulate
-	umaddl	x1, w1, w25, x5
-	ubfiz	x25, x25, 8, 8
-	add	x4, x4, x25
-	add	x5, x13, x1
-	str	w6, [x4, 2056]
-	bl	nandc_wait_flash_ready
-	cmp	w10, 8
-	bne	.L1643
+	umaddl	x19, w19, w22, x0
+	adrp	x0, .LANCHOR7
+	ldr	x0, [x0, #:lo12:.LANCHOR7]
+	add	x19, x21, x19
+	add	x22, x0, x2
+	str	w1, [x22, 2056]
+	bl	nandc_wait_flash_ready
+	cmp	w25, 8
+	ldr	w1, [x29, 108]
+	bne	.L1597
 	mov	w0, 120
-	str	w0, [x4, 2056]
-	str	wzr, [x4, 2052]
+	str	w0, [x22, 2056]
+	str	wzr, [x22, 2052]
 	mov	w0, 23
-	str	wzr, [x4, 2052]
+	str	wzr, [x22, 2052]
 	mov	w1, 25
-	str	wzr, [x4, 2052]
-	add	x5, x8, 144
-	str	w0, [x4, 2056]
+	str	wzr, [x22, 2052]
+	add	x19, x26, 144
+	str	w0, [x22, 2056]
 	mov	w0, 4
-	str	w0, [x4, 2056]
-	str	w1, [x4, 2056]
+	str	w0, [x22, 2056]
+	str	w1, [x22, 2056]
 	mov	w1, 218
-	str	w1, [x4, 2056]
+	str	w1, [x22, 2056]
 	mov	w1, 21
-	str	wzr, [x4, 2056]
-	str	wzr, [x4, 2052]
-	str	wzr, [x4, 2052]
-	str	w1, [x4, 2052]
-.L1734:
-	str	w0, [x4, 2052]
+	str	wzr, [x22, 2056]
+	str	wzr, [x22, 2052]
+	str	wzr, [x22, 2052]
+	str	w1, [x22, 2052]
+.L1688:
+	str	w0, [x22, 2052]
 	mov	w0, 48
-	str	wzr, [x4, 2052]
-	str	w0, [x4, 2056]
+	str	wzr, [x22, 2052]
+	str	w0, [x22, 2056]
 	bl	nandc_wait_flash_ready
-	cmp	w21, 1
-	ccmp	w10, 8, 4, hi
-	beq	.L1689
-	cmp	w10, 7
+	cmp	w24, 1
+	ccmp	w25, 8, 4, hi
+	beq	.L1643
+	cmp	w25, 7
 	mov	w0, 32
 	mov	w1, 2
 	csel	w1, w1, w0, ne
-.L1650:
-	adrp	x6, .LANCHOR166
-	mov	x2, 0
-	ldr	x0, [x6, #:lo12:.LANCHOR166]
-.L1651:
-	ldr	w3, [x4, 2048]
-	strb	w3, [x0, x2]
-	add	x2, x2, 1
-	cmp	w1, w2, uxtb
-	bhi	.L1651
-	cmp	w10, 8
-	bne	.L1652
+.L1604:
+	adrp	x8, .LANCHOR163
+	mov	x7, 0
+	ldr	x0, [x8, #:lo12:.LANCHOR163]
+.L1605:
+	ldr	w10, [x22, 2048]
+	strb	w10, [x0, x7]
+	add	x7, x7, 1
+	cmp	w1, w7, uxtb
+	bhi	.L1605
+	cmp	w25, 8
+	bne	.L1606
 	mov	w1, 0
-.L1654:
-	ldrb	w2, [x0]
-	cmp	w2, 50
-	beq	.L1653
-	ldrb	w2, [x0, 1]
-	cmp	w2, 5
-	beq	.L1653
+.L1608:
+	ldrb	w7, [x0]
+	cmp	w7, 50
+	beq	.L1607
+	ldrb	w7, [x0, 1]
+	cmp	w7, 5
+	beq	.L1607
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 255
 	cmp	w1, 8
-	bne	.L1654
-.L1655:
-	adrp	x0, .LC105
+	bne	.L1608
+.L1609:
+	adrp	x0, .LC102
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC105
+	add	x0, x0, :lo12:.LC102
 	bl	printf
-.L1657:
-	b	.L1657
-.L1643:
+.L1611:
+	b	.L1611
+.L1597:
 	mov	w0, 54
-	str	w0, [x4, 2056]
-	cmp	w10, 4
-	bne	.L1645
+	str	w0, [x22, 2056]
+	cmp	w25, 4
+	bne	.L1599
 	mov	w0, 64
-	str	w6, [x4, 2052]
-	str	w0, [x4, 2048]
+	str	w1, [x22, 2052]
+	str	w0, [x22, 2048]
 	mov	w0, 204
-.L1732:
-	str	w0, [x4, 2052]
+.L1686:
+	str	w0, [x22, 2052]
 	mov	w0, 77
-	b	.L1733
-.L1645:
-	cmp	w21, 1
-	bhi	.L1647
-	ldrb	w0, [x8, 128]
-	str	w0, [x4, 2052]
+	b	.L1687
+.L1599:
+	cmp	w24, 1
+	bhi	.L1601
+	ldrb	w0, [x26, 128]
+	str	w0, [x22, 2052]
 	mov	w0, 82
-.L1733:
-	str	w0, [x4, 2048]
-.L1646:
+.L1687:
+	str	w0, [x22, 2048]
+.L1600:
 	mov	w0, 22
-	str	w0, [x4, 2056]
+	str	w0, [x22, 2056]
 	mov	w0, 23
-	str	w0, [x4, 2056]
+	str	w0, [x22, 2056]
 	mov	w0, 4
-	str	w0, [x4, 2056]
+	str	w0, [x22, 2056]
 	mov	w0, 25
-	str	w0, [x4, 2056]
-	str	wzr, [x4, 2056]
-	cmp	w10, 6
-	str	wzr, [x4, 2052]
-	str	wzr, [x4, 2052]
-	bne	.L1648
+	str	w0, [x22, 2056]
+	str	wzr, [x22, 2056]
+	cmp	w25, 6
+	str	wzr, [x22, 2052]
+	str	wzr, [x22, 2052]
+	bne	.L1602
 	mov	w0, 31
-	str	w0, [x4, 2052]
-.L1649:
+	str	w0, [x22, 2052]
+.L1603:
 	mov	w0, 2
-	b	.L1734
-.L1647:
-	cmp	w10, 7
-	bne	.L1646
+	b	.L1688
+.L1601:
+	cmp	w25, 7
+	bne	.L1600
 	mov	w0, 174
-	str	w0, [x4, 2052]
-	str	wzr, [x4, 2048]
+	str	w0, [x22, 2052]
+	str	wzr, [x22, 2048]
 	mov	w0, 176
-	b	.L1732
-.L1648:
-	str	wzr, [x4, 2052]
-	b	.L1649
-.L1689:
+	b	.L1686
+.L1602:
+	str	wzr, [x22, 2052]
+	b	.L1603
+.L1643:
 	mov	w1, 16
-	b	.L1650
-.L1653:
+	b	.L1604
+.L1607:
 	cmp	w1, 6
-	bhi	.L1655
-.L1656:
-	ldr	x3, [x6, #:lo12:.LANCHOR166]
+	bhi	.L1609
+.L1610:
+	ldr	x7, [x8, #:lo12:.LANCHOR163]
 	mov	x0, 0
-.L1666:
-	cmp	w19, w0
-	bgt	.L1667
-	ldr	x1, [x6, #:lo12:.LANCHOR166]
-	mov	w6, 8
-	add	x2, x1, x22
-.L1669:
+.L1620:
+	ldr	w1, [x29, 128]
+	cmp	w1, w0
+	bgt	.L1621
+	ldr	x1, [x8, #:lo12:.LANCHOR163]
+	mov	w10, 8
+	ldr	x0, [x29, 136]
+	add	x8, x1, x0
+.L1623:
 	mov	x0, 0
-.L1668:
-	ldrh	w7, [x2, x0, lsl 1]
-	mvn	w7, w7
-	strh	w7, [x2, x0, lsl 1]
+.L1622:
+	ldrh	w11, [x8, x0, lsl 1]
+	mvn	w11, w11
+	strh	w11, [x8, x0, lsl 1]
 	add	x0, x0, 1
-	cmp	w15, w0
-	bgt	.L1668
-	add	x2, x2, x23, uxtw 1
-	subs	w6, w6, #1
-	bne	.L1669
-	mov	x6, x1
-	mov	w7, 0
-	mov	w26, 1
-.L1670:
+	cmp	w23, w0
+	bgt	.L1622
+	ldr	w0, [x29, 132]
+	subs	w10, w10, #1
+	add	x8, x8, x0, uxtw 1
+	bne	.L1623
+	mov	x10, x1
+	mov	w11, 0
+	mov	w16, 1
+.L1624:
 	mov	w0, 0
-	mov	w2, 0
-.L1674:
-	mov	x25, x6
-	lsl	w30, w26, w2
-	mov	w17, 16
-	mov	w16, 0
-.L1672:
-	ldrh	w27, [x25]
-	add	x25, x25, x22
-	bics	wzr, w30, w27
-	cinc	w16, w16, eq
-	subs	w17, w17, #1
-	bne	.L1672
-	cmp	w16, 8
-	bls	.L1673
-	orr	w0, w0, w30
+	mov	w8, 0
+.L1628:
+	mov	x14, x10
+	lsl	w15, w16, w8
+	mov	w13, 16
+	mov	w12, 0
+.L1626:
+	ldrh	w17, [x14]
+	ldr	x2, [x29, 136]
+	bics	wzr, w15, w17
+	cinc	w12, w12, eq
+	add	x14, x14, x2
+	subs	w13, w13, #1
+	bne	.L1626
+	cmp	w12, 8
+	bls	.L1627
+	orr	w0, w0, w15
 	and	w0, w0, 65535
-.L1673:
-	add	w2, w2, 1
-	cmp	w2, 16
-	bne	.L1674
-	strh	w0, [x6], 2
-	add	w7, w7, 1
-	cmp	w15, w7
-	bgt	.L1670
+.L1627:
+	add	w8, w8, 1
+	cmp	w8, 16
+	bne	.L1628
+	strh	w0, [x10], 2
+	add	w11, w11, 1
+	cmp	w23, w11
+	bgt	.L1624
 	mov	x0, 0
-	mov	w2, 0
-.L1677:
-	ldr	w6, [x1, x0]
+	mov	w8, 0
+.L1631:
+	ldr	w10, [x1, x0]
 	add	x0, x0, 4
-	cmp	w6, 0
-	cinc	w2, w2, eq
+	cmp	w10, 0
+	cinc	w8, w8, eq
 	cmp	x0, 32
-	bne	.L1677
-	cmp	w2, 7
-	ble	.L1678
+	bne	.L1631
+	cmp	w8, 7
+	ble	.L1632
 	mov	w3, 1024
 	mov	w2, 1
-	adrp	x0, .LC106
-	add	x0, x0, :lo12:.LC106
+	adrp	x0, .LC103
+	add	x0, x0, :lo12:.LC103
 	bl	rknand_print_hex
-	adrp	x0, .LC105
+	adrp	x0, .LC102
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC105
+	add	x0, x0, :lo12:.LC102
 	bl	printf
-.L1679:
-	b	.L1679
-.L1652:
-	cmp	w10, 7
-	bne	.L1658
+.L1633:
+	b	.L1633
+.L1606:
+	cmp	w25, 7
+	bne	.L1612
 	mov	w1, 0
-.L1660:
-	ldrb	w2, [x0]
-	cmp	w2, 12
-	beq	.L1659
-	ldrb	w2, [x0, 1]
-	cmp	w2, 10
-	beq	.L1659
+.L1614:
+	ldrb	w7, [x0]
+	cmp	w7, 12
+	beq	.L1613
+	ldrb	w7, [x0, 1]
+	cmp	w7, 10
+	beq	.L1613
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 255
 	cmp	w1, 8
-	bne	.L1660
-.L1661:
-	adrp	x0, .LC105
+	bne	.L1614
+.L1615:
+	adrp	x0, .LC102
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC105
+	add	x0, x0, :lo12:.LC102
 	bl	printf
-.L1662:
-	b	.L1662
-.L1659:
+.L1616:
+	b	.L1616
+.L1613:
 	cmp	w1, 6
-	bls	.L1656
-	b	.L1661
-.L1658:
-	cmp	w10, 6
-	bne	.L1656
+	bls	.L1610
+	b	.L1615
+.L1612:
+	cmp	w25, 6
+	bne	.L1610
 	mov	x1, 0
-.L1663:
-	ldrb	w2, [x0, x1]
-	cmp	w2, 12
-	beq	.L1656
-	add	x2, x0, x1
-	ldrb	w2, [x2, 8]
-	cmp	w2, 4
-	beq	.L1656
+.L1617:
+	ldrb	w7, [x0, x1]
+	cmp	w7, 12
+	beq	.L1610
+	add	x7, x0, x1
+	ldrb	w7, [x7, 8]
+	cmp	w7, 4
+	beq	.L1610
 	add	x1, x1, 1
 	cmp	x1, 8
-	bne	.L1663
-	adrp	x0, .LC105
+	bne	.L1617
+	adrp	x0, .LC102
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC105
+	add	x0, x0, :lo12:.LC102
 	bl	printf
-.L1665:
-	b	.L1665
-.L1667:
-	ldr	w1, [x4, 2048]
-	strb	w1, [x3, x0]
+.L1619:
+	b	.L1619
+.L1621:
+	ldr	w1, [x22, 2048]
+	strb	w1, [x7, x0]
 	add	x0, x0, 1
-	b	.L1666
-.L1678:
-	cmp	w10, 6
-	beq	.L1691
-	cmp	w10, 7
-	beq	.L1692
-	cmp	w10, 8
+	b	.L1620
+.L1632:
+	cmp	w25, 6
+	beq	.L1645
+	cmp	w25, 7
+	beq	.L1646
+	cmp	w25, 8
 	mov	x1, 5
 	mov	x0, 8
 	csel	x0, x0, x1, ne
-.L1680:
-	mov	x1, x5
-	mov	w5, 0
-.L1681:
-	mov	x2, 0
-.L1682:
-	ldrb	w6, [x3, x2]
-	strb	w6, [x1, x2]
-	add	x2, x2, 1
-	cmp	w11, w2, uxtb
-	bhi	.L1682
-	add	w5, w5, 1
-	add	x3, x3, x14
-	add	x1, x1, x0
-	cmp	w24, w5
-	bgt	.L1681
-	mov	w5, 255
-	str	w5, [x4, 2056]
+.L1634:
+	mov	w8, 0
+.L1635:
+	mov	x1, 0
+.L1636:
+	ldrb	w10, [x7, x1]
+	strb	w10, [x19, x1]
+	add	x1, x1, 1
+	cmp	w28, w1, uxtb
+	bhi	.L1636
+	ldr	x1, [x29, 112]
+	add	w8, w8, 1
+	add	x19, x19, x0
+	cmp	w27, w8
+	add	x7, x7, x1
+	bgt	.L1635
+	mov	w19, 255
+	str	w19, [x22, 2056]
 	bl	nandc_wait_flash_ready
-	cmp	w21, 1
-	bhi	.L1684
+	cmp	w24, 1
+	bhi	.L1638
 	mov	w0, 54
-	str	w0, [x4, 2056]
-	ldrb	w0, [x8, 128]
-	str	w0, [x4, 2052]
-	str	wzr, [x4, 2048]
+	str	w0, [x22, 2056]
+	ldrb	w0, [x26, 128]
+	str	w0, [x22, 2052]
+	str	wzr, [x22, 2048]
 	mov	w0, 22
-	str	w0, [x4, 2056]
+	str	w0, [x22, 2056]
 	mov	w0, 48
-	str	wzr, [x4, 2056]
-	str	wzr, [x4, 2052]
-	str	wzr, [x4, 2052]
-	str	w5, [x4, 2052]
-	str	w5, [x4, 2052]
-	str	w5, [x4, 2052]
-.L1735:
-	str	w0, [x4, 2056]
+	str	wzr, [x22, 2056]
+	str	wzr, [x22, 2052]
+	str	wzr, [x22, 2052]
+	str	w19, [x22, 2052]
+	str	w19, [x22, 2052]
+	str	w19, [x22, 2052]
+.L1689:
+	str	w0, [x22, 2056]
+	add	w20, w20, 1
+	and	w20, w20, 255
 	bl	nandc_wait_flash_ready
-	add	w12, w12, 1
-	and	w12, w12, 255
-	b	.L1642
-.L1691:
+	b	.L1596
+.L1645:
 	mov	x0, 4
-	b	.L1680
-.L1692:
+	b	.L1634
+.L1646:
 	mov	x0, 10
-	b	.L1680
-.L1684:
-	cmp	w10, 8
-	bne	.L1686
+	b	.L1634
+.L1638:
+	cmp	w25, 8
+	bne	.L1640
 	mov	w0, 190
-	b	.L1735
-.L1686:
+	b	.L1689
+.L1640:
 	mov	w0, 56
-	b	.L1735
+	b	.L1689
 	.size	hynix_get_read_retry_default, .-hynix_get_read_retry_default
 	.section	.text.flash_get_read_retry_tbl,"ax",@progbits
 	.align	2
 	.global	flash_get_read_retry_tbl
 	.type	flash_get_read_retry_tbl, %function
 flash_get_read_retry_tbl:
-	adrp	x0, .LANCHOR33+19
-	ldrb	w0, [x0, #:lo12:.LANCHOR33+19]
+	adrp	x0, .LANCHOR32+19
+	ldrb	w0, [x0, #:lo12:.LANCHOR32+19]
 	sub	w1, w0, #1
 	and	w1, w1, 255
 	cmp	w1, 7
-	bhi	.L1736
+	bhi	.L1690
 	b	hynix_get_read_retry_default
-.L1736:
+.L1690:
 	ret
 	.size	flash_get_read_retry_tbl, .-flash_get_read_retry_tbl
 	.section	.text.nandc_xfer_done,"ax",@progbits
@@ -10646,154 +10465,154 @@ flash_get_read_retry_tbl:
 	.type	nandc_xfer_done, %function
 nandc_xfer_done:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR167
-	adrp	x1, .LANCHOR28
+	adrp	x0, .LANCHOR164
+	adrp	x1, .LANCHOR27
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR13
-	ldrb	w1, [x1, #:lo12:.LANCHOR28]
+	adrp	x19, .LANCHOR7
+	ldrb	w1, [x1, #:lo12:.LANCHOR27]
 	stp	x21, x22, [sp, 32]
-	strb	wzr, [x0, #:lo12:.LANCHOR167]
+	strb	wzr, [x0, #:lo12:.LANCHOR164]
 	cmp	w1, 9
 	str	x23, [sp, 48]
-	bne	.L1739
-	ldr	x20, [x19, #:lo12:.LANCHOR13]
+	bne	.L1693
+	ldr	x20, [x19, #:lo12:.LANCHOR7]
 	mov	x21, x0
 	ldr	w0, [x20, 16]
 	str	w0, [x29, 64]
 	ldr	w0, [x20, 48]
-	tbnz	x0, 1, .L1740
-	adrp	x22, .LC109
-	adrp	x23, .LC110
-	add	x22, x22, :lo12:.LC109
-	add	x23, x23, :lo12:.LC110
+	tbnz	x0, 1, .L1694
+	adrp	x22, .LC106
+	adrp	x23, .LC107
+	add	x22, x22, :lo12:.LC106
+	add	x23, x23, :lo12:.LC107
 	mov	w21, 0
-.L1741:
+.L1695:
 	ldr	w0, [x29, 64]
-	tbnz	x0, 20, .L1743
-	ldr	x0, [x19, #:lo12:.LANCHOR13]
+	tbnz	x0, 20, .L1697
+	ldr	x0, [x19, #:lo12:.LANCHOR7]
 	add	w21, w21, 1
 	tst	x21, 16777215
 	ldr	w0, [x0, 16]
 	str	w0, [x29, 64]
-	bne	.L1741
+	bne	.L1695
 	ldr	w2, [x29, 64]
 	mov	w1, w21
 	ldr	w3, [x20, 64]
 	mov	x0, x22
 	ubfx	x3, x3, 16, 6
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR13]
+	ldr	x1, [x19, #:lo12:.LANCHOR7]
 	mov	w3, 64
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1741
-.L1742:
+	b	.L1695
+.L1696:
 	ldr	w0, [x29, 64]
 	add	w1, w1, 1
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0, lsl 12
-	bne	.L1744
+	bne	.L1698
 	ldr	w2, [x20, 64]
-	adrp	x0, .LC108
+	adrp	x0, .LC105
 	ldr	w3, [x29, 64]
-	add	x0, x0, :lo12:.LC108
+	add	x0, x0, :lo12:.LC105
 	ubfx	x2, x2, 16, 5
 	ubfx	x3, x3, 22, 6
 	bl	printf
 	ldr	w0, [x29, 72]
 	mov	w0, 1
-	strb	w0, [x21, #:lo12:.LANCHOR167]
-.L1743:
-	adrp	x0, .LANCHOR53+32
+	strb	w0, [x21, #:lo12:.LANCHOR164]
+.L1697:
+	adrp	x0, .LANCHOR52+32
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
-	str	wzr, [x0, #:lo12:.LANCHOR53+32]
+	str	wzr, [x0, #:lo12:.LANCHOR52+32]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1740:
+.L1694:
 	mov	w1, 0
-.L1744:
+.L1698:
 	ldr	w2, [x20, 64]
 	ldr	w0, [x29, 64]
 	ubfx	x2, x2, 16, 6
 	ubfx	x0, x0, 22, 6
 	cmp	w2, w0
-	bge	.L1743
+	bge	.L1697
 	ldr	w0, [x20]
 	str	w0, [x29, 72]
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1742
+	tbz	x0, 13, .L1696
 	ldr	w0, [x29, 72]
-	tbz	x0, 17, .L1742
+	tbz	x0, 17, .L1696
 	ldr	w1, [x29, 72]
-	adrp	x0, .LC107
-	add	x0, x0, :lo12:.LC107
+	adrp	x0, .LC104
+	add	x0, x0, :lo12:.LC104
 	ubfx	x1, x1, 17, 1
-.L1773:
+.L1727:
 	bl	printf
-	b	.L1743
-.L1739:
-	ldr	x20, [x19, #:lo12:.LANCHOR13]
+	b	.L1697
+.L1693:
+	ldr	x20, [x19, #:lo12:.LANCHOR7]
 	mov	w21, 0
 	ldr	w0, [x20, 8]
 	str	w0, [x29, 64]
 	ldr	w0, [x20, 16]
-	tbnz	x0, 1, .L1749
-	adrp	x22, .LC109
-	adrp	x23, .LC110
-	add	x22, x22, :lo12:.LC109
-	add	x23, x23, :lo12:.LC110
-.L1750:
+	tbnz	x0, 1, .L1703
+	adrp	x22, .LC106
+	adrp	x23, .LC107
+	add	x22, x22, :lo12:.LC106
+	add	x23, x23, :lo12:.LC107
+.L1704:
 	ldr	w0, [x29, 64]
-	tbnz	x0, 20, .L1743
-	ldr	x0, [x19, #:lo12:.LANCHOR13]
+	tbnz	x0, 20, .L1697
+	ldr	x0, [x19, #:lo12:.LANCHOR7]
 	add	w21, w21, 1
 	tst	x21, 16777215
 	ldr	w0, [x0, 8]
 	str	w0, [x29, 64]
-	bne	.L1750
+	bne	.L1704
 	ldr	w2, [x29, 64]
 	mov	w1, w21
 	ldr	w3, [x20, 28]
 	mov	x0, x22
 	ubfx	x3, x3, 16, 5
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR13]
+	ldr	x1, [x19, #:lo12:.LANCHOR7]
 	mov	w3, 64
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1750
-.L1749:
-	adrp	x22, .LC108
-	adrp	x23, .LC110
-	add	x22, x22, :lo12:.LC108
-	add	x23, x23, :lo12:.LC110
-.L1751:
+	b	.L1704
+.L1703:
+	adrp	x22, .LC105
+	adrp	x23, .LC107
+	add	x22, x22, :lo12:.LC105
+	add	x23, x23, :lo12:.LC107
+.L1705:
 	ldr	w1, [x20, 28]
 	ldr	w0, [x29, 64]
 	ubfx	x1, x1, 16, 5
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0
-	bge	.L1743
-	ldr	x0, [x19, #:lo12:.LANCHOR13]
+	bge	.L1697
+	ldr	x0, [x19, #:lo12:.LANCHOR7]
 	ldr	w0, [x0]
 	str	w0, [x29, 72]
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1752
+	tbz	x0, 13, .L1706
 	ldr	w0, [x29, 72]
-	tbz	x0, 17, .L1752
-	adrp	x0, .LC111
+	tbz	x0, 17, .L1706
+	adrp	x0, .LC108
 	ldr	w1, [x29, 72]
-	add	x0, x0, :lo12:.LC111
-	b	.L1773
-.L1752:
+	add	x0, x0, :lo12:.LC108
+	b	.L1727
+.L1706:
 	add	w21, w21, 1
 	tst	x21, 16777215
-	bne	.L1751
+	bne	.L1705
 	ldr	w2, [x20, 28]
 	mov	w1, w21
 	ldr	w3, [x29, 64]
@@ -10801,12 +10620,12 @@ nandc_xfer_done:
 	ubfx	x2, x2, 16, 5
 	ubfx	x3, x3, 22, 6
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR13]
+	ldr	x1, [x19, #:lo12:.LANCHOR7]
 	mov	w3, 64
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1751
+	b	.L1705
 	.size	nandc_xfer_done, .-nandc_xfer_done
 	.section	.text.nandc_xfer,"ax",@progbits
 	.align	2
@@ -10828,20 +10647,20 @@ nandc_xfer:
 	bl	nandc_xfer_start
 	mov	w0, w22
 	bl	nandc_xfer_done
-	cbnz	w22, .L1793
-	adrp	x0, .LANCHOR28
-	ldrb	w0, [x0, #:lo12:.LANCHOR28]
+	cbnz	w22, .L1747
+	adrp	x0, .LANCHOR27
+	ldrb	w0, [x0, #:lo12:.LANCHOR27]
 	cmp	w0, 9
-	bne	.L1776
-	adrp	x22, .LANCHOR13
+	bne	.L1730
+	adrp	x22, .LANCHOR7
 	lsr	w19, w19, 2
 	mov	w3, 1
 	mov	w2, 0
-	ldr	x5, [x22, #:lo12:.LANCHOR13]
+	ldr	x5, [x22, #:lo12:.LANCHOR7]
 	mov	w0, 0
-.L1777:
+.L1731:
 	cmp	w2, w19
-	bcc	.L1781
+	bcc	.L1735
 	ldr	w19, [x5]
 	cmp	w3, 0
 	mov	w1, 512
@@ -10850,35 +10669,35 @@ nandc_xfer:
 	movk	w1, 0x2, lsl 16
 	and	w1, w19, w1
 	cmp	w1, 139264
-	bne	.L1783
+	bne	.L1737
 	mov	w1, w19
-	adrp	x0, .LC112
-	add	x0, x0, :lo12:.LC112
+	adrp	x0, .LC109
+	add	x0, x0, :lo12:.LC109
 	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR13]
+	ldr	x0, [x22, #:lo12:.LANCHOR7]
 	orr	w19, w19, 131072
 	str	w19, [x0]
 	mov	w0, -1
-.L1783:
-	tbz	x19, 13, .L1784
-	adrp	x1, .LANCHOR167
-	ldrb	w1, [x1, #:lo12:.LANCHOR167]
-	cbz	w1, .L1784
+.L1737:
+	tbz	x19, 13, .L1738
+	adrp	x1, .LANCHOR164
+	ldrb	w1, [x1, #:lo12:.LANCHOR164]
+	cbz	w1, .L1738
 	mov	w1, w19
-	adrp	x0, .LC113
-	add	x0, x0, :lo12:.LC113
+	adrp	x0, .LC110
+	add	x0, x0, :lo12:.LC110
 	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR13]
+	ldr	x0, [x22, #:lo12:.LANCHOR7]
 	mov	w1, 1
 	str	w1, [x0, 16]
-.L1812:
+.L1766:
 	mov	w0, -1
-.L1775:
+.L1729:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1781:
+.L1735:
 	uxtw	x1, w2
 	add	x1, x1, 84
 	ldr	w1, [x5, x1, lsl 2]
@@ -10889,70 +10708,70 @@ nandc_xfer:
 	and	w1, w4, w1, lsr 10
 	and	w3, w3, w1
 	ldr	w1, [x29, 56]
-	tbnz	x1, 2, .L1795
+	tbnz	x1, 2, .L1749
 	ldr	w1, [x29, 56]
-	tbnz	x1, 18, .L1795
+	tbnz	x1, 18, .L1749
 	ldr	w4, [x29, 56]
 	ldr	w1, [x29, 56]
 	ubfx	x4, x4, 3, 7
 	ubfx	x1, x1, 19, 7
 	cmp	w4, w1
 	ldr	w1, [x29, 56]
-	ble	.L1779
+	ble	.L1733
 	ubfx	x1, x1, 3, 7
-.L1780:
+.L1734:
 	cmp	w0, w1
 	csel	w0, w0, w1, cs
-.L1778:
+.L1732:
 	add	w2, w2, 1
-	b	.L1777
-.L1779:
+	b	.L1731
+.L1733:
 	ubfx	x1, x1, 19, 7
-	b	.L1780
-.L1795:
+	b	.L1734
+.L1749:
 	mov	w0, -1
-	b	.L1778
-.L1776:
-	adrp	x0, .LANCHOR50
+	b	.L1732
+.L1730:
+	adrp	x0, .LANCHOR49
 	lsr	w4, w19, 1
 	mov	w3, 64
 	mov	w1, 1
-	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	mov	w2, 0
-	adrp	x6, .LANCHOR53
+	adrp	x6, .LANCHOR52
 	cmp	w0, 25
 	mov	w0, 128
 	csel	w3, w3, w0, cc
 	mov	w0, 0
-.L1786:
+.L1740:
 	add	w5, w3, w0
 	cmp	w2, w4
-	bcc	.L1787
-	adrp	x22, .LANCHOR13
+	bcc	.L1741
+	adrp	x22, .LANCHOR7
 	lsr	w19, w19, 2
 	mov	w3, 0
 	mov	w0, 0
-	ldr	x4, [x22, #:lo12:.LANCHOR13]
-.L1788:
+	ldr	x4, [x22, #:lo12:.LANCHOR7]
+.L1742:
 	cmp	w3, w19
-	bcc	.L1792
+	bcc	.L1746
 	str	wzr, [x4, 16]
 	mov	w1, 8192
 	movk	w1, 0x2, lsl 16
 	ldr	w19, [x4]
 	and	w1, w19, w1
 	cmp	w1, 139264
-	bne	.L1784
+	bne	.L1738
 	mov	w1, w19
-	adrp	x0, .LC114
-	add	x0, x0, :lo12:.LC114
+	adrp	x0, .LC111
+	add	x0, x0, :lo12:.LC111
 	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR13]
+	ldr	x0, [x22, #:lo12:.LANCHOR7]
 	orr	w19, w19, 131072
 	str	w19, [x0]
-	b	.L1812
-.L1787:
-	ldr	x7, [x6, #:lo12:.LANCHOR53]
+	b	.L1766
+.L1741:
+	ldr	x7, [x6, #:lo12:.LANCHOR52]
 	and	x0, x0, 4294967292
 	ldr	w0, [x7, x0]
 	lsl	w7, w2, 2
@@ -10968,16 +10787,16 @@ nandc_xfer:
 	add	w1, w1, 4
 	strb	w0, [x21, x7]
 	mov	w0, w5
-	b	.L1786
-.L1792:
+	b	.L1740
+.L1746:
 	uxtw	x1, w3
 	add	x1, x1, 8
 	ldr	w1, [x4, x1, lsl 2]
 	str	w1, [x29, 56]
 	ldr	w1, [x29, 56]
-	tbnz	x1, 2, .L1798
+	tbnz	x1, 2, .L1752
 	ldr	w1, [x29, 56]
-	tbnz	x1, 15, .L1798
+	tbnz	x1, 15, .L1752
 	ldr	w2, [x29, 56]
 	ubfx	x6, x2, 3, 5
 	ldr	w2, [x29, 56]
@@ -10990,163 +10809,169 @@ nandc_xfer:
 	orr	w1, w5, w1, lsl 5
 	cmp	w2, w1
 	ldr	w1, [x29, 56]
-	bls	.L1790
+	bls	.L1744
 	ubfx	x2, x1, 3, 5
 	ldr	w1, [x29, 56]
 	ubfx	x1, x1, 27, 1
-.L1811:
+.L1765:
 	orr	w1, w2, w1, lsl 5
 	cmp	w0, w1
 	csel	w0, w0, w1, cs
-.L1789:
+.L1743:
 	add	w3, w3, 1
-	b	.L1788
-.L1790:
+	b	.L1742
+.L1744:
 	ubfx	x2, x1, 16, 5
 	ldr	w1, [x29, 56]
 	ubfx	x1, x1, 29, 1
-	b	.L1811
-.L1798:
+	b	.L1765
+.L1752:
 	mov	w0, -1
-	b	.L1789
-.L1784:
+	b	.L1743
+.L1738:
 	cmn	w0, #1
-	beq	.L1775
+	beq	.L1729
 	ldr	w1, [x21]
 	cmn	w1, #1
-	bne	.L1775
+	bne	.L1729
 	ldr	w1, [x21, 4]
 	cmn	w1, #1
-	bne	.L1775
+	bne	.L1729
 	ldr	w1, [x20]
 	cmn	w1, #1
 	mov	w1, 512
 	csel	w0, w0, w1, ne
-	b	.L1775
-.L1793:
+	b	.L1729
+.L1747:
 	mov	w0, 0
-	b	.L1775
+	b	.L1729
 	.size	nandc_xfer, .-nandc_xfer
 	.section	.text.flash_read_page,"ax",@progbits
 	.align	2
 	.global	flash_read_page
 	.type	flash_read_page, %function
 flash_read_page:
-	stp	x29, x30, [sp, -32]!
-	and	w10, w0, 255
-	adrp	x0, .LANCHOR13
-	mov	w8, 24
+	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
-	ldr	x14, [x0, #:lo12:.LANCHOR13]
-	adrp	x0, .LANCHOR32
-	mov	x12, x2
-	mov	x13, x3
-	ldrb	w0, [x0, #:lo12:.LANCHOR32]
-	mov	w11, w4
-	ubfx	x15, x1, 24, 2
-	str	x19, [sp, 16]
-	sub	w0, w8, w0
-	mov	w8, 1
-	adrp	x19, .LANCHOR16
-	lsl	w8, w8, w0
-	sub	w8, w8, #1
-	and	w8, w8, w1
+	stp	x21, x22, [sp, 32]
+	and	w21, w0, 255
+	adrp	x0, .LANCHOR7
+	stp	x19, x20, [sp, 16]
+	mov	w19, 24
+	stp	x23, x24, [sp, 48]
+	ldr	x20, [x0, #:lo12:.LANCHOR7]
+	adrp	x0, .LANCHOR31
+	stp	x25, x26, [sp, 64]
+	mov	x24, x2
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	mov	x25, x3
+	mov	w23, w4
+	ubfx	x22, x1, 24, 2
+	sub	w0, w19, w0
+	mov	w19, 1
+	adrp	x26, .LANCHOR21
+	lsl	w19, w19, w0
+	sub	w19, w19, #1
+	and	w19, w19, w1
 	bl	nandc_wait_flash_ready
-	mov	w0, w10
+	mov	w0, w21
 	bl	nandc_cs
-	cbnz	w15, .L1814
-	mov	w0, w10
+	cbnz	w22, .L1768
+	mov	w0, w21
 	bl	zftl_flash_enter_slc_mode
-.L1815:
-	ldr	x1, [x19, #:lo12:.LANCHOR16]
+.L1769:
+	ldr	x1, [x26, #:lo12:.LANCHOR21]
 	ldrb	w0, [x1, 7]
 	cmp	w0, 1
-	bne	.L1817
+	bne	.L1771
 	ldrb	w0, [x1, 12]
 	cmp	w0, 2
-	bne	.L1817
-	sxtw	x0, w10
+	bne	.L1771
+	sxtw	x0, w21
 	mov	w2, 38
 	add	x0, x0, 8
-	add	x0, x14, x0, lsl 8
+	add	x0, x20, x0, lsl 8
 	str	w2, [x0, 8]
-.L1817:
-	ubfiz	x4, x10, 8, 8
-	and	w0, w8, 255
-	add	x4, x14, x4
-	str	wzr, [x4, 2056]
-	str	wzr, [x4, 2052]
-	str	wzr, [x4, 2052]
-	str	w0, [x4, 2052]
-	lsr	w0, w8, 8
-	str	w0, [x4, 2052]
-	lsr	w0, w8, 16
-	str	w0, [x4, 2052]
-	adrp	x0, .LANCHOR31
-	ldrb	w0, [x0, #:lo12:.LANCHOR31]
-	cbz	w0, .L1818
-	lsr	w0, w8, 24
-	str	w0, [x4, 2052]
-.L1818:
+.L1771:
+	ubfiz	x0, x21, 8, 8
+	add	x20, x20, x0
+	and	w0, w19, 255
+	str	wzr, [x20, 2056]
+	str	wzr, [x20, 2052]
+	str	wzr, [x20, 2052]
+	str	w0, [x20, 2052]
+	lsr	w0, w19, 8
+	str	w0, [x20, 2052]
+	lsr	w0, w19, 16
+	str	w0, [x20, 2052]
+	adrp	x0, .LANCHOR30
+	ldrb	w0, [x0, #:lo12:.LANCHOR30]
+	cbz	w0, .L1772
+	lsr	w0, w19, 24
+	str	w0, [x20, 2052]
+.L1772:
 	mov	w0, 48
-	str	w0, [x4, 2056]
+	str	w0, [x20, 2056]
 	ldrb	w0, [x1, 12]
 	cmp	w0, 3
-	bne	.L1819
-	cbz	w15, .L1819
+	bne	.L1773
+	cbz	w22, .L1773
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbnz	w0, .L1773
 	adrp	x0, .LANCHOR36
 	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbnz	w0, .L1819
-	adrp	x0, .LANCHOR37
-	ldrb	w0, [x0, #:lo12:.LANCHOR37]
-	cbnz	w0, .L1819
-	add	w8, w8, w8, lsl 1
-	sub	w0, w8, #1
-	add	w0, w0, w15
-.L1828:
+	cbnz	w0, .L1773
+	add	w19, w19, w19, lsl 1
+	sub	w0, w19, #1
+	add	w0, w0, w22
+.L1782:
 	bl	nandc_set_seed
 	bl	nandc_wait_flash_ready
-	mov	w2, w11
 	mov	w0, 5
-	str	w0, [x4, 2056]
-	str	wzr, [x4, 2052]
+	str	w0, [x20, 2056]
+	str	wzr, [x20, 2052]
 	mov	w0, 224
-	str	wzr, [x4, 2052]
-	mov	x3, x12
-	str	w0, [x4, 2056]
+	str	wzr, [x20, 2052]
+	mov	w2, w23
+	str	w0, [x20, 2056]
+	mov	x4, x25
+	mov	x3, x24
 	mov	w1, 0
-	mov	x4, x13
-	mov	w0, w10
+	mov	w0, w21
 	bl	nandc_xfer
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.33
-	ldr	x19, [sp, 16]
+	bl	nandc_de_cs.constprop.32
 	mov	w0, w2
-	ldp	x29, x30, [sp], 32
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
 	ret
-.L1814:
-	ldr	x0, [x19, #:lo12:.LANCHOR16]
+.L1768:
+	ldr	x0, [x26, #:lo12:.LANCHOR21]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1816
+	bne	.L1770
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbnz	w0, .L1770
 	adrp	x0, .LANCHOR36
 	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbnz	w0, .L1816
-	adrp	x0, .LANCHOR37
-	ldrb	w0, [x0, #:lo12:.LANCHOR37]
-	cbnz	w0, .L1816
-	sxtw	x0, w10
+	cbnz	w0, .L1770
+	sxtw	x0, w21
 	add	x0, x0, 8
-	add	x0, x14, x0, lsl 8
-	str	w15, [x0, 8]
-	b	.L1815
-.L1816:
-	mov	w0, w10
+	add	x0, x20, x0, lsl 8
+	str	w22, [x0, 8]
+	b	.L1769
+.L1770:
+	mov	w0, w21
 	bl	zftl_flash_exit_slc_mode
-	b	.L1815
-.L1819:
-	mov	w0, w8
-	b	.L1828
+	b	.L1769
+.L1773:
+	mov	w0, w19
+	b	.L1782
 	.size	flash_read_page, .-flash_read_page
 	.section	.text.micron_read_retrial,"ax",@progbits
 	.align	2
@@ -11156,137 +10981,138 @@ micron_read_retrial:
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	and	w19, w0, 255
-	adrp	x0, .LANCHOR50
+	and	w20, w0, 255
+	adrp	x0, .LANCHOR49
+	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	str	w4, [x29, 116]
-	mov	x26, x3
-	str	x2, [x29, 120]
+	mov	w24, w1
 	stp	x21, x22, [sp, 32]
-	mov	w22, 0
-	stp	x23, x24, [sp, 48]
-	mov	w23, w1
-	ldrb	w20, [x0, #:lo12:.LANCHOR50]
+	mov	x25, x2
+	ldrb	w21, [x0, #:lo12:.LANCHOR49]
+	mov	x26, x3
 	stp	x27, x28, [sp, 80]
+	mov	w23, 0
+	str	w4, [x29, 124]
 	bl	nandc_wait_flash_ready
-	mov	w0, w19
+	adrp	x0, .LANCHOR7
+	add	w21, w21, w21, lsl 1
+	asr	w21, w21, 2
+	ldr	x19, [x0, #:lo12:.LANCHOR7]
+	adrp	x0, .LANCHOR166
+	add	x0, x0, :lo12:.LANCHOR166
+	str	x0, [x29, 112]
+	ubfiz	x0, x20, 8, 8
+	add	x19, x19, x0
+.L1784:
+	mov	w0, w20
 	bl	zftl_flash_enter_slc_mode
-	mov	w0, w19
+	mov	w0, w20
 	bl	zftl_flash_exit_slc_mode
-	adrp	x0, .LANCHOR13
-	add	w20, w20, w20, lsl 1
-	asr	w20, w20, 2
-	ldr	x6, [x0, #:lo12:.LANCHOR13]
-	adrp	x0, .LANCHOR169
-	add	x0, x0, :lo12:.LANCHOR169
-	str	x0, [x29, 104]
-	ubfiz	x0, x19, 8, 8
-	add	x25, x6, x0
-.L1830:
-	adrp	x24, .LANCHOR14
-	add	x24, x24, :lo12:.LANCHOR14
-	mov	w21, 0
+	adrp	x0, .LANCHOR19
+	mov	w22, 0
+	add	x0, x0, :lo12:.LANCHOR19
 	mov	w28, -1
-.L1831:
-	ldr	x0, [x29, 104]
+	str	x0, [x29, 104]
+.L1785:
+	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
-	cmp	w21, w0
-	bcc	.L1836
-.L1835:
+	cmp	w22, w0
+	bcc	.L1790
+.L1789:
 	mov	w0, 239
-	str	w0, [x25, 2056]
+	str	w0, [x19, 2056]
 	mov	w0, 137
-	str	w0, [x25, 2052]
-	mov	w0, 200
-	bl	timer_delay_ns
-	str	wzr, [x25, 2048]
-	str	wzr, [x25, 2048]
-	cmp	w28, w20
-	str	wzr, [x25, 2048]
-	str	wzr, [x25, 2048]
-	bcc	.L1837
+	str	w0, [x19, 2052]
+	mov	x0, 1
+	bl	udelay
+	str	wzr, [x19, 2048]
+	str	wzr, [x19, 2048]
+	cmp	w28, w21
+	str	wzr, [x19, 2048]
+	str	wzr, [x19, 2048]
+	bcc	.L1791
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L1837:
+.L1791:
 	cmn	w28, #1
-	cset	w24, eq
+	cset	w27, eq
 	cmp	w28, 256
 	cset	w0, eq
-	orr	w0, w24, w0
-	cbz	w0, .L1838
+	orr	w0, w27, w0
+	cbz	w0, .L1792
 	mov	w4, w28
-	mov	w3, w21
-	mov	w2, w23
-	mov	w1, w21
-	adrp	x0, .LC116
-	add	x0, x0, :lo12:.LC116
+	mov	w3, w22
+	mov	w2, w24
+	mov	w1, w20
+	adrp	x0, .LC113
+	add	x0, x0, :lo12:.LC113
 	bl	printf
-	eor	w0, w22, 1
-	tst	w24, w0
-	beq	.L1839
+	eor	w0, w23, 1
+	tst	w27, w0
+	beq	.L1793
 	mov	w1, 3
-	mov	w0, w19
-	mov	w22, 1
+	mov	w0, w20
+	mov	w23, 1
 	bl	mt_auto_read_calibration_config
-	b	.L1830
-.L1836:
+	b	.L1784
+.L1790:
 	mov	w0, 239
-	str	w0, [x25, 2056]
+	str	w0, [x19, 2056]
 	mov	w0, 137
-	str	w0, [x25, 2052]
-	add	w27, w21, 1
-	mov	w0, 200
-	bl	timer_delay_ns
-	str	w27, [x25, 2048]
-	str	wzr, [x25, 2048]
+	str	w0, [x19, 2052]
+	add	w27, w22, 1
+	mov	x0, 1
+	bl	udelay
+	str	w27, [x19, 2048]
+	str	wzr, [x19, 2048]
 	mov	x3, x26
-	ldr	w4, [x29, 116]
-	mov	w1, w23
-	ldr	x2, [x29, 120]
-	mov	w0, w19
-	str	wzr, [x25, 2048]
-	str	wzr, [x25, 2048]
+	ldr	w4, [x29, 124]
+	mov	x2, x25
+	str	wzr, [x19, 2048]
+	mov	w1, w24
+	str	wzr, [x19, 2048]
+	mov	w0, w20
 	bl	flash_read_page
-	mov	w7, w0
-	ldr	w0, [x24]
-	tbz	x0, 12, .L1832
-	mov	w4, w7
-	str	w7, [x29, 112]
+	mov	w6, w0
+	ldr	x0, [x29, 104]
+	ldr	w0, [x0]
+	tbz	x0, 12, .L1786
+	mov	w4, w6
+	str	w6, [x29, 120]
 	mov	w3, w28
-	mov	w2, w23
-	mov	w1, w21
-	adrp	x0, .LC115
-	add	x0, x0, :lo12:.LC115
+	mov	w2, w24
+	mov	w1, w22
+	adrp	x0, .LC112
+	add	x0, x0, :lo12:.LC112
 	bl	printf
-	ldr	w7, [x29, 112]
-.L1832:
-	cmn	w7, #1
-	beq	.L1833
-	adrp	x0, .LANCHOR166
+	ldr	w6, [x29, 120]
+.L1786:
+	cmn	w6, #1
+	beq	.L1787
+	adrp	x0, .LANCHOR163
 	cmn	w28, #1
-	csel	w28, w28, w7, ne
-	cmp	w7, w20
-	ldr	x0, [x0, #:lo12:.LANCHOR166]
-	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR168
-	ldr	x26, [x0, #:lo12:.LANCHOR168]
-	bcc	.L1842
-.L1833:
-	mov	w21, w27
-	b	.L1831
-.L1842:
-	mov	w28, w7
-	b	.L1835
-.L1839:
-	cbz	w22, .L1840
-	mov	w0, w19
+	csel	w28, w28, w6, ne
+	cmp	w6, w21
+	ldr	x25, [x0, #:lo12:.LANCHOR163]
+	adrp	x0, .LANCHOR165
+	ldr	x26, [x0, #:lo12:.LANCHOR165]
+	bcc	.L1796
+.L1787:
+	mov	w22, w27
+	b	.L1785
+.L1796:
+	mov	w28, w6
+	b	.L1789
+.L1793:
+	cbz	w23, .L1794
+	mov	w0, w20
 	mov	w1, 0
 	bl	mt_auto_read_calibration_config
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L1840:
+.L1794:
 	bl	nandc_wait_flash_ready
 	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
@@ -11296,13 +11122,13 @@ micron_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1838:
-	cbz	w22, .L1840
+.L1792:
+	cbz	w23, .L1794
 	mov	w1, 0
-	mov	w0, w19
+	mov	w0, w20
 	mov	w28, 256
 	bl	mt_auto_read_calibration_config
-	b	.L1840
+	b	.L1794
 	.size	micron_read_retrial, .-micron_read_retrial
 	.section	.text.toshiba_3d_read_retrial,"ax",@progbits
 	.align	2
@@ -11311,30 +11137,28 @@ micron_read_retrial:
 toshiba_3d_read_retrial:
 	stp	x29, x30, [sp, -144]!
 	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR16
 	stp	x23, x24, [sp, 48]
-	mov	w23, w1
+	mov	w24, w1
+	stp	x25, x26, [sp, 64]
+	and	w23, w0, 255
 	stp	x27, x28, [sp, 80]
-	mov	w28, w4
-	ubfx	x4, x23, 24, 2
+	mov	x26, x2
 	stp	x19, x20, [sp, 16]
-	stp	x21, x22, [sp, 32]
-	and	w24, w0, 255
-	stp	x25, x26, [sp, 64]
 	mov	x27, x3
-	mov	x26, x2
+	mov	w28, w4
 	bl	nandc_wait_flash_ready
-	adrp	x0, .LANCHOR13
-	adrp	x22, .LANCHOR24
+	adrp	x0, .LANCHOR7
 	mov	w1, 46
 	mov	w2, 56
-	ldr	x25, [x0, #:lo12:.LANCHOR13]
-	and	x0, x24, 255
+	ubfx	x19, x24, 24, 2
+	ldr	x25, [x0, #:lo12:.LANCHOR7]
+	and	x0, x23, 255
 	add	x21, x0, 8
 	str	x0, [x29, 128]
-	ldrb	w0, [x22, #:lo12:.LANCHOR24]
-	mov	w19, -1
+	ldrb	w0, [x22, #:lo12:.LANCHOR16]
 	add	x21, x25, x21, lsl 8
-	mov	w20, 1
 	cmp	w0, 36
 	mov	w0, 26
 	csel	w1, w2, w1, ne
@@ -11342,18 +11166,20 @@ toshiba_3d_read_retrial:
 	mov	w1, 10
 	csel	w0, w1, w0, ne
 	str	w0, [x29, 136]
-	add	x0, x22, :lo12:.LANCHOR24
-	cbnz	w4, .L1860
+	cbnz	w19, .L1814
+	add	x0, x22, :lo12:.LANCHOR16
 	str	x0, [x29, 120]
-	sxtw	x0, w24
+	sxtw	x0, w23
+	mov	w19, -1
 	add	x0, x0, 8
+	mov	w20, 1
 	add	x0, x25, x0, lsl 8
 	str	x0, [x29, 112]
-.L1867:
+.L1821:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, 36
-	bne	.L1861
+	bne	.L1815
 	mov	w1, w20
 	mov	x0, x21
 	mov	w2, 0
@@ -11361,70 +11187,70 @@ toshiba_3d_read_retrial:
 	ldr	x1, [x29, 112]
 	mov	w0, 93
 	str	w0, [x1, 8]
-.L1862:
+.L1816:
 	mov	w4, w28
 	mov	x3, x27
 	mov	x2, x26
-	mov	w1, w23
-	mov	w0, w24
+	mov	w1, w24
+	mov	w0, w23
 	bl	flash_read_page
 	mov	w4, w0
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 4, .L1863
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 4, .L1817
 	mov	w3, w4
 	str	w4, [x29, 108]
-	mov	w2, w23
+	mov	w2, w24
 	mov	w1, w20
-	adrp	x0, .LC117
-	add	x0, x0, :lo12:.LC117
+	adrp	x0, .LC114
+	add	x0, x0, :lo12:.LC114
 	bl	printf
 	ldr	w4, [x29, 108]
-.L1863:
+.L1817:
 	cmn	w4, #1
-	beq	.L1864
-	adrp	x0, .LANCHOR166
+	beq	.L1818
+	adrp	x0, .LANCHOR163
 	cmn	w19, #1
 	csel	w19, w19, w4, ne
-	ldr	x26, [x0, #:lo12:.LANCHOR166]
-	adrp	x0, .LANCHOR168
-	ldr	x27, [x0, #:lo12:.LANCHOR168]
-	adrp	x0, .LANCHOR50
-	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	ldr	x26, [x0, #:lo12:.LANCHOR163]
+	adrp	x0, .LANCHOR165
+	ldr	x27, [x0, #:lo12:.LANCHOR165]
+	adrp	x0, .LANCHOR49
+	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1882
-.L1864:
+	bcc	.L1836
+.L1818:
 	ldr	w0, [x29, 136]
 	add	w20, w20, 1
 	cmp	w0, w20
-	bne	.L1867
-.L1866:
-	ldrb	w0, [x22, #:lo12:.LANCHOR24]
+	bne	.L1821
+.L1820:
+	ldrb	w0, [x22, #:lo12:.LANCHOR16]
 	cmp	w0, 36
-	bne	.L1868
+	bne	.L1822
 	mov	w2, 0
-.L1905:
+.L1859:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_tlc_set_rr_para
-	b	.L1869
-.L1861:
+	b	.L1823
+.L1815:
 	mov	w1, w20
 	mov	x0, x21
 	bl	toshiba_3d_set_slc_rr_para
-	b	.L1862
-.L1882:
+	b	.L1816
+.L1836:
 	mov	w19, w4
-	b	.L1866
-.L1868:
+	b	.L1820
+.L1822:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_3d_set_slc_rr_para
-.L1869:
-	ldrb	w0, [x22, #:lo12:.LANCHOR24]
+.L1823:
+	ldrb	w0, [x22, #:lo12:.LANCHOR16]
 	cmp	w0, 36
-	bne	.L1878
+	bne	.L1832
 	ldr	x0, [x29, 128]
 	add	x25, x25, x0, lsl 8
 	mov	w0, 85
@@ -11433,27 +11259,27 @@ toshiba_3d_read_retrial:
 	str	wzr, [x25, 2052]
 	str	wzr, [x25, 2048]
 	str	w0, [x25, 2056]
-.L1878:
-	adrp	x0, .LANCHOR50
-	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+.L1832:
+	adrp	x0, .LANCHOR49
+	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L1879
+	bcc	.L1833
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L1879:
+.L1833:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L1880
-	adrp	x0, .LC119
+	bne	.L1834
+	adrp	x0, .LC116
 	mov	w4, w19
 	mov	w3, w20
-	mov	w2, w23
-	mov	w1, w20
-	add	x0, x0, :lo12:.LC119
+	mov	w2, w24
+	mov	w1, w23
+	add	x0, x0, :lo12:.LC116
 	bl	printf
-.L1880:
+.L1834:
 	bl	nandc_wait_flash_ready
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
@@ -11463,82 +11289,85 @@ toshiba_3d_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1860:
+.L1814:
+	add	x0, x22, :lo12:.LANCHOR16
 	str	x0, [x29, 112]
-	sxtw	x0, w24
+	sxtw	x0, w23
+	mov	w19, -1
 	add	x0, x0, 8
+	mov	w20, 1
 	add	x0, x25, x0, lsl 8
 	str	x0, [x29, 136]
-.L1876:
+.L1830:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
 	cmp	w0, 36
-	bne	.L1870
+	bne	.L1824
 	mov	x0, x21
 	mov	w2, 1
 	mov	w1, w20
 	bl	toshiba_tlc_set_rr_para
 	mov	w0, 93
-.L1904:
+.L1858:
 	ldr	x1, [x29, 136]
 	mov	w4, w28
 	mov	x3, x27
 	mov	x2, x26
 	str	w0, [x1, 8]
-	mov	w1, w23
-	mov	w0, w24
+	mov	w1, w24
+	mov	w0, w23
 	bl	flash_read_page
 	mov	w4, w0
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 4, .L1872
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 4, .L1826
 	mov	w3, w4
 	str	w4, [x29, 108]
-	mov	w2, w23
+	mov	w2, w24
 	mov	w1, w20
-	adrp	x0, .LC118
-	add	x0, x0, :lo12:.LC118
+	adrp	x0, .LC115
+	add	x0, x0, :lo12:.LC115
 	bl	printf
 	ldr	w4, [x29, 108]
-.L1872:
+.L1826:
 	cmn	w4, #1
-	beq	.L1873
-	adrp	x0, .LANCHOR166
+	beq	.L1827
+	adrp	x0, .LANCHOR163
 	cmn	w19, #1
 	csel	w19, w19, w4, ne
-	ldr	x26, [x0, #:lo12:.LANCHOR166]
-	adrp	x0, .LANCHOR168
-	ldr	x27, [x0, #:lo12:.LANCHOR168]
-	adrp	x0, .LANCHOR50
-	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	ldr	x26, [x0, #:lo12:.LANCHOR163]
+	adrp	x0, .LANCHOR165
+	ldr	x27, [x0, #:lo12:.LANCHOR165]
+	adrp	x0, .LANCHOR49
+	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1883
-.L1873:
+	bcc	.L1837
+.L1827:
 	ldr	w0, [x29, 120]
 	add	w20, w20, 1
 	cmp	w0, w20
-	bne	.L1876
-.L1875:
-	ldrb	w0, [x22, #:lo12:.LANCHOR24]
+	bne	.L1830
+.L1829:
+	ldrb	w0, [x22, #:lo12:.LANCHOR16]
 	cmp	w0, 36
-	bne	.L1877
+	bne	.L1831
 	mov	w2, 1
-	b	.L1905
-.L1870:
+	b	.L1859
+.L1824:
 	mov	x0, x21
 	mov	w1, w20
 	bl	toshiba_3d_set_tlc_rr_para
 	mov	w0, 38
-	b	.L1904
-.L1883:
+	b	.L1858
+.L1837:
 	mov	w19, w4
-	b	.L1875
-.L1877:
+	b	.L1829
+.L1831:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_3d_set_tlc_rr_para
-	b	.L1869
+	b	.L1823
 	.size	toshiba_3d_read_retrial, .-toshiba_3d_read_retrial
 	.section	.text.toshiba_read_retrial,"ax",@progbits
 	.align	2
@@ -11562,87 +11391,87 @@ toshiba_read_retrial:
 	bl	zftl_flash_enter_slc_mode
 	mov	w0, w19
 	bl	zftl_flash_exit_slc_mode
-	adrp	x0, .LANCHOR13
-	adrp	x1, .LANCHOR24
+	adrp	x0, .LANCHOR7
+	adrp	x1, .LANCHOR16
 	str	x1, [x29, 120]
-	ldr	x22, [x0, #:lo12:.LANCHOR13]
+	ldr	x22, [x0, #:lo12:.LANCHOR7]
 	and	x0, x19, 255
 	add	x21, x0, 8
 	str	x0, [x29, 104]
-	ldrb	w0, [x1, #:lo12:.LANCHOR24]
+	ldrb	w0, [x1, #:lo12:.LANCHOR16]
 	add	x21, x22, x21, lsl 8
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
-	bls	.L1924
-	adrp	x0, .LANCHOR21
-	ldrb	w0, [x0, #:lo12:.LANCHOR21]
-	cbz	w0, .L1925
+	bls	.L1878
+	adrp	x0, .LANCHOR26
+	ldrb	w0, [x0, #:lo12:.LANCHOR26]
+	cbz	w0, .L1879
 	mov	w23, 1
 	mov	w0, 1
 	bl	nandc_set_if_mode
-.L1908:
+.L1862:
 	and	x0, x19, 255
 	mov	w1, 92
 	add	x0, x22, x0, lsl 8
 	str	w1, [x0, 2056]
 	mov	w1, 197
 	str	w1, [x0, 2056]
-.L1907:
+.L1861:
 	sxtw	x0, w19
 	mov	w20, 1
 	add	x0, x0, 8
 	mov	w24, -1
 	add	x0, x22, x0, lsl 8
 	str	x0, [x29, 96]
-.L1909:
-	adrp	x0, .LANCHOR169
-	ldrb	w0, [x0, #:lo12:.LANCHOR169]
+.L1863:
+	adrp	x0, .LANCHOR166
+	ldrb	w0, [x0, #:lo12:.LANCHOR166]
 	add	w0, w0, 1
 	cmp	w20, w0
-	bcc	.L1918
+	bcc	.L1872
 	mov	w28, w24
-.L1917:
+.L1871:
 	ldr	x0, [x29, 120]
 	mov	w1, 0
-	ldrb	w0, [x0, #:lo12:.LANCHOR24]
+	ldrb	w0, [x0, #:lo12:.LANCHOR16]
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x21
-	bhi	.L1919
+	bhi	.L1873
 	bl	sandisk_set_rr_para
-.L1920:
+.L1874:
 	sxtw	x19, w19
 	mov	w0, 255
 	add	x19, x19, 8
 	add	x22, x22, x19, lsl 8
 	str	w0, [x22, 8]
-	adrp	x0, .LANCHOR50
-	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	adrp	x0, .LANCHOR49
+	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L1921
+	bcc	.L1875
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L1921:
+.L1875:
 	cmp	w28, 256
 	ccmn	w28, #1, 4, ne
-	bne	.L1922
-	adrp	x0, .LC119
+	bne	.L1876
+	adrp	x0, .LC116
 	mov	w4, w28
 	mov	w3, w20
 	mov	w2, w25
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC119
+	add	x0, x0, :lo12:.LC116
 	bl	printf
-.L1922:
+.L1876:
 	bl	nandc_wait_flash_ready
-	cbz	w23, .L1906
+	cbz	w23, .L1860
 	mov	w0, 4
 	bl	nandc_set_if_mode
-.L1906:
+.L1860:
 	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11651,36 +11480,36 @@ toshiba_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1925:
+.L1879:
 	mov	w23, 0
-	b	.L1908
-.L1924:
+	b	.L1862
+.L1878:
 	mov	w23, 0
-	b	.L1907
-.L1918:
+	b	.L1861
+.L1872:
 	ldr	x0, [x29, 120]
 	mov	w1, w20
-	ldrb	w0, [x0, #:lo12:.LANCHOR24]
+	ldrb	w0, [x0, #:lo12:.LANCHOR16]
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x21
-	bhi	.L1910
+	bhi	.L1864
 	bl	sandisk_set_rr_para
-.L1911:
+.L1865:
 	ldr	x0, [x29, 120]
-	ldrb	w0, [x0, #:lo12:.LANCHOR24]
+	ldrb	w0, [x0, #:lo12:.LANCHOR16]
 	cmp	w0, 34
-	bne	.L1912
-	adrp	x0, .LANCHOR169
-	ldrb	w0, [x0, #:lo12:.LANCHOR169]
+	bne	.L1866
+	adrp	x0, .LANCHOR166
+	ldrb	w0, [x0, #:lo12:.LANCHOR166]
 	sub	w0, w0, #3
 	cmp	w20, w0
-	bne	.L1912
+	bne	.L1866
 	ldr	x1, [x29, 96]
 	mov	w0, 179
 	str	w0, [x1, 8]
-.L1912:
+.L1866:
 	ldr	x0, [x29, 104]
 	mov	w1, 38
 	ldr	w4, [x29, 116]
@@ -11695,27 +11524,27 @@ toshiba_read_retrial:
 	bl	flash_read_page
 	mov	w28, w0
 	cmn	w0, #1
-	beq	.L1915
+	beq	.L1869
 	cmn	w24, #1
 	csel	w24, w24, w0, ne
-	adrp	x0, .LANCHOR166
-	ldr	x26, [x0, #:lo12:.LANCHOR166]
-	adrp	x0, .LANCHOR168
-	ldr	x27, [x0, #:lo12:.LANCHOR168]
-	adrp	x0, .LANCHOR50
-	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	adrp	x0, .LANCHOR163
+	ldr	x26, [x0, #:lo12:.LANCHOR163]
+	adrp	x0, .LANCHOR165
+	ldr	x27, [x0, #:lo12:.LANCHOR165]
+	adrp	x0, .LANCHOR49
+	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L1917
-.L1915:
+	bcc	.L1871
+.L1869:
 	add	w20, w20, 1
-	b	.L1909
-.L1910:
+	b	.L1863
+.L1864:
 	bl	toshiba_set_rr_para
-	b	.L1911
-.L1919:
+	b	.L1865
+.L1873:
 	bl	toshiba_set_rr_para
-	b	.L1920
+	b	.L1874
 	.size	toshiba_read_retrial, .-toshiba_read_retrial
 	.section	.text.ymtc_3d_read_retrial,"ax",@progbits
 	.align	2
@@ -11740,19 +11569,19 @@ ymtc_3d_read_retrial:
 	bl	zftl_flash_enter_slc_mode
 	mov	w0, w22
 	bl	zftl_flash_exit_slc_mode
-	adrp	x1, .LANCHOR13
+	adrp	x1, .LANCHOR7
 	ubfiz	x21, x22, 8, 8
 	add	x0, x21, 2048
-	adrp	x27, .LANCHOR50
-	ldr	x21, [x1, #:lo12:.LANCHOR13]
+	adrp	x27, .LANCHOR49
+	ldr	x21, [x1, #:lo12:.LANCHOR7]
 	mov	w20, 1
-	adrp	x28, .LANCHOR166
-	adrp	x5, .LANCHOR168
+	adrp	x28, .LANCHOR163
+	adrp	x5, .LANCHOR165
 	add	x21, x21, x0
-	add	x27, x27, :lo12:.LANCHOR50
+	add	x27, x27, :lo12:.LANCHOR49
 	tst	x23, 50331648
-	bne	.L1948
-.L1943:
+	bne	.L1902
+.L1897:
 	str	x5, [x29, 104]
 	mov	w1, w20
 	mov	x0, x21
@@ -11765,44 +11594,44 @@ ymtc_3d_read_retrial:
 	bl	flash_read_page
 	ldr	x5, [x29, 104]
 	cmn	w0, #1
-	beq	.L1940
+	beq	.L1894
 	ldrb	w1, [x27]
 	cmn	w19, #1
 	csel	w19, w19, w0, ne
-	ldr	x24, [x28, #:lo12:.LANCHOR166]
-	ldr	x25, [x5, #:lo12:.LANCHOR168]
+	ldr	x24, [x28, #:lo12:.LANCHOR163]
+	ldr	x25, [x5, #:lo12:.LANCHOR165]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L1951
-.L1940:
+	bcc	.L1905
+.L1894:
 	add	w20, w20, 1
 	cmp	w20, 10
-	bne	.L1943
-.L1942:
+	bne	.L1897
+.L1896:
 	mov	w1, 0
 	mov	x0, x21
 	bl	ymtc_3d_set_slc_rr_para
-.L1944:
-	adrp	x0, .LANCHOR50
-	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+.L1898:
+	adrp	x0, .LANCHOR49
+	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L1949
+	bcc	.L1903
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L1949:
+.L1903:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L1950
-	adrp	x0, .LC120
+	bne	.L1904
+	adrp	x0, .LC117
 	mov	w4, w19
 	mov	w3, w20
 	mov	w2, w23
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC120
+	add	x0, x0, :lo12:.LC117
 	bl	printf
-.L1950:
+.L1904:
 	bl	nandc_wait_flash_ready
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
@@ -11812,10 +11641,10 @@ ymtc_3d_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1951:
+.L1905:
 	mov	w19, w0
-	b	.L1942
-.L1948:
+	b	.L1896
+.L1902:
 	str	x5, [x29, 104]
 	mov	w1, w20
 	mov	x0, x21
@@ -11828,27 +11657,27 @@ ymtc_3d_read_retrial:
 	bl	flash_read_page
 	ldr	x5, [x29, 104]
 	cmn	w0, #1
-	beq	.L1945
+	beq	.L1899
 	ldrb	w1, [x27]
 	cmn	w19, #1
 	csel	w19, w19, w0, ne
-	ldr	x24, [x28, #:lo12:.LANCHOR166]
-	ldr	x25, [x5, #:lo12:.LANCHOR168]
+	ldr	x24, [x28, #:lo12:.LANCHOR163]
+	ldr	x25, [x5, #:lo12:.LANCHOR165]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L1952
-.L1945:
+	bcc	.L1906
+.L1899:
 	add	w20, w20, 1
 	cmp	w20, 51
-	bne	.L1948
-.L1947:
+	bne	.L1902
+.L1901:
 	mov	w1, 0
 	mov	x0, x21
 	bl	ymtc_3d_set_tlc_rr_para
-	b	.L1944
-.L1952:
+	b	.L1898
+.L1906:
 	mov	w19, w0
-	b	.L1947
+	b	.L1901
 	.size	ymtc_3d_read_retrial, .-ymtc_3d_read_retrial
 	.section	.text.samsung_read_retrial,"ax",@progbits
 	.align	2
@@ -11872,19 +11701,19 @@ samsung_read_retrial:
 	bl	zftl_flash_enter_slc_mode
 	mov	w0, w21
 	bl	zftl_flash_exit_slc_mode
-	adrp	x0, .LANCHOR13
+	adrp	x0, .LANCHOR7
 	tst	x20, 50331648
 	and	x5, x21, 255
-	ldr	x0, [x0, #:lo12:.LANCHOR13]
-	bne	.L1968
-	adrp	x24, .LANCHOR170
-	adrp	x27, .LC121
+	ldr	x0, [x0, #:lo12:.LANCHOR7]
+	bne	.L1922
+	adrp	x24, .LANCHOR167
+	adrp	x27, .LC118
 	add	x28, x0, x5, lsl 8
-	add	x24, x24, :lo12:.LANCHOR170
-	add	x27, x27, :lo12:.LC121
+	add	x24, x24, :lo12:.LANCHOR167
+	add	x27, x27, :lo12:.LC118
 	mov	x26, 0
 	mov	w25, -1
-.L1973:
+.L1927:
 	mov	w0, 239
 	str	w0, [x28, 2056]
 	mov	w0, 141
@@ -11904,9 +11733,9 @@ samsung_read_retrial:
 	mov	w0, w21
 	bl	flash_read_page
 	mov	w4, w0
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 4, .L1969
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 4, .L1923
 	mov	w3, w4
 	str	w4, [x29, 104]
 	mov	w2, w20
@@ -11914,26 +11743,26 @@ samsung_read_retrial:
 	mov	x0, x27
 	bl	printf
 	ldr	w4, [x29, 104]
-.L1969:
+.L1923:
 	cmn	w4, #1
-	beq	.L1970
-	adrp	x0, .LANCHOR166
+	beq	.L1924
+	adrp	x0, .LANCHOR163
 	cmn	w25, #1
 	csel	w25, w25, w4, ne
-	ldr	x22, [x0, #:lo12:.LANCHOR166]
-	adrp	x0, .LANCHOR168
-	ldr	x23, [x0, #:lo12:.LANCHOR168]
-	adrp	x0, .LANCHOR50
-	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	ldr	x22, [x0, #:lo12:.LANCHOR163]
+	adrp	x0, .LANCHOR165
+	ldr	x23, [x0, #:lo12:.LANCHOR165]
+	adrp	x0, .LANCHOR49
+	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1982
-.L1970:
+	bcc	.L1936
+.L1924:
 	add	x26, x26, 1
 	cmp	x26, 25
-	bne	.L1973
+	bne	.L1927
 	mov	w19, 26
-.L1972:
+.L1926:
 	mov	w0, 239
 	str	w0, [x28, 2056]
 	mov	w0, 141
@@ -11942,28 +11771,28 @@ samsung_read_retrial:
 	str	wzr, [x28, 2048]
 	str	wzr, [x28, 2048]
 	str	wzr, [x28, 2048]
-.L2004:
+.L1958:
 	bl	nandc_wait_flash_ready
-	adrp	x0, .LANCHOR50
-	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	adrp	x0, .LANCHOR49
+	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	add	w0, w0, w0, lsl 1
 	cmp	w25, w0, lsr 2
-	bcc	.L1980
+	bcc	.L1934
 	cmn	w25, #1
 	mov	w0, 256
 	csel	w25, w25, w0, eq
-.L1980:
+.L1934:
 	cmp	w25, 256
 	ccmn	w25, #1, 4, ne
-	bne	.L1981
-	adrp	x0, .LC123
+	bne	.L1935
+	adrp	x0, .LC120
 	mov	w4, w25
 	mov	w3, w19
 	mov	w2, w20
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC123
+	add	x0, x0, :lo12:.LC120
 	bl	printf
-.L1981:
+.L1935:
 	bl	nandc_wait_flash_ready
 	mov	w0, w25
 	ldp	x19, x20, [sp, 16]
@@ -11973,20 +11802,20 @@ samsung_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1982:
+.L1936:
 	mov	w25, w4
-	b	.L1972
-.L1968:
-	adrp	x7, .LANCHOR171
-	add	x7, x7, :lo12:.LANCHOR171
-	adrp	x24, .LC122
+	b	.L1926
+.L1922:
+	adrp	x7, .LANCHOR168
+	add	x7, x7, :lo12:.LANCHOR168
+	adrp	x24, .LC119
 	add	x28, x7, 4
 	add	x27, x0, x5, lsl 8
-	add	x24, x24, :lo12:.LC122
+	add	x24, x24, :lo12:.LC119
 	mov	w25, -1
 	mov	w19, 1
 	mov	w26, 137
-.L1979:
+.L1933:
 	mov	w0, 239
 	str	w0, [x27, 2056]
 	str	w26, [x27, 2052]
@@ -12006,9 +11835,9 @@ samsung_read_retrial:
 	mov	w0, w21
 	bl	flash_read_page
 	mov	w4, w0
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 4, .L1975
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 4, .L1929
 	mov	w3, w4
 	str	w4, [x29, 104]
 	mov	w2, w20
@@ -12016,26 +11845,26 @@ samsung_read_retrial:
 	mov	x0, x24
 	bl	printf
 	ldr	w4, [x29, 104]
-.L1975:
+.L1929:
 	cmn	w4, #1
-	beq	.L1976
-	adrp	x0, .LANCHOR166
+	beq	.L1930
+	adrp	x0, .LANCHOR163
 	cmn	w25, #1
 	csel	w25, w25, w4, ne
-	ldr	x22, [x0, #:lo12:.LANCHOR166]
-	adrp	x0, .LANCHOR168
-	ldr	x23, [x0, #:lo12:.LANCHOR168]
-	adrp	x0, .LANCHOR50
-	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	ldr	x22, [x0, #:lo12:.LANCHOR163]
+	adrp	x0, .LANCHOR165
+	ldr	x23, [x0, #:lo12:.LANCHOR165]
+	adrp	x0, .LANCHOR49
+	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1983
-.L1976:
+	bcc	.L1937
+.L1930:
 	add	w19, w19, 1
 	add	x28, x28, 4
 	cmp	w19, 26
-	bne	.L1979
-.L1978:
+	bne	.L1933
+.L1932:
 	mov	w0, 239
 	str	w0, [x27, 2056]
 	mov	w0, 137
@@ -12044,10 +11873,10 @@ samsung_read_retrial:
 	str	wzr, [x27, 2048]
 	str	wzr, [x27, 2048]
 	str	wzr, [x27, 2048]
-	b	.L2004
-.L1983:
+	b	.L1958
+.L1937:
 	mov	w25, w4
-	b	.L1978
+	b	.L1932
 	.size	samsung_read_retrial, .-samsung_read_retrial
 	.section	.text.hynix_read_retrial,"ax",@progbits
 	.align	2
@@ -12058,11 +11887,11 @@ hynix_read_retrial:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	x23, x0, 255
-	adrp	x0, .LANCHOR27
+	adrp	x0, .LANCHOR6
 	stp	x27, x28, [sp, 80]
 	stp	x21, x22, [sp, 32]
 	mov	w27, w4
-	ldr	x28, [x0, #:lo12:.LANCHOR27]
+	ldr	x28, [x0, #:lo12:.LANCHOR6]
 	mov	w22, w1
 	stp	x25, x26, [sp, 64]
 	mov	x25, x2
@@ -12079,37 +11908,37 @@ hynix_read_retrial:
 	bl	zftl_flash_enter_slc_mode
 	mov	w0, w23
 	bl	zftl_flash_exit_slc_mode
-	adrp	x6, .LANCHOR50
-	add	x6, x6, :lo12:.LANCHOR50
+	adrp	x6, .LANCHOR49
+	add	x6, x6, :lo12:.LANCHOR49
 	mov	w5, 0
-	adrp	x7, .LANCHOR166
-	adrp	x8, .LANCHOR168
-.L2006:
+	adrp	x7, .LANCHOR163
+	adrp	x8, .LANCHOR165
+.L1960:
 	cmp	w5, w24
-	bcc	.L2011
-.L2010:
-	adrp	x0, .LANCHOR50
+	bcc	.L1965
+.L1964:
+	adrp	x0, .LANCHOR49
 	add	x23, x28, x23
-	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	strb	w20, [x23, 8]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L2012
+	bcc	.L1966
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L2012:
+.L1966:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L2013
-	adrp	x0, .LC124
+	bne	.L1967
+	adrp	x0, .LC121
 	mov	w4, w19
 	mov	w3, w5
 	mov	w2, w22
 	mov	w1, w5
-	add	x0, x0, :lo12:.LC124
+	add	x0, x0, :lo12:.LC121
 	bl	printf
-.L2013:
+.L1967:
 	bl	nandc_wait_flash_ready
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
@@ -12119,7 +11948,7 @@ hynix_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2011:
+.L1965:
 	add	w20, w20, 1
 	stp	x6, x8, [x29, 96]
 	and	w20, w20, 255
@@ -12140,21 +11969,21 @@ hynix_read_retrial:
 	cmn	w0, #1
 	ldp	x6, x8, [x29, 96]
 	ldr	x7, [x29, 112]
-	beq	.L2008
+	beq	.L1962
 	ldrb	w1, [x6]
 	cmn	w19, #1
 	csel	w19, w19, w0, ne
-	ldr	x25, [x7, #:lo12:.LANCHOR166]
-	ldr	x26, [x8, #:lo12:.LANCHOR168]
+	ldr	x25, [x7, #:lo12:.LANCHOR163]
+	ldr	x26, [x8, #:lo12:.LANCHOR165]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L2014
-.L2008:
+	bcc	.L1968
+.L1962:
 	add	w5, w5, 1
-	b	.L2006
-.L2014:
+	b	.L1960
+.L1968:
 	mov	w19, w0
-	b	.L2010
+	b	.L1964
 	.size	hynix_read_retrial, .-hynix_read_retrial
 	.section	.text.flash_ddr_tuning_read,"ax",@progbits
 	.align	2
@@ -12172,25 +12001,25 @@ flash_ddr_tuning_read:
 	stp	x25, x26, [sp, 64]
 	mov	x24, x3
 	stp	x27, x28, [sp, 80]
-	adrp	x25, .LANCHOR50
+	adrp	x25, .LANCHOR49
 	str	w4, [x29, 136]
 	bl	nandc_get_ddr_para
-	add	x25, x25, :lo12:.LANCHOR50
+	add	x25, x25, :lo12:.LANCHOR49
 	str	w0, [x29, 132]
-	adrp	x0, .LANCHOR14
-	add	x0, x0, :lo12:.LANCHOR14
+	adrp	x0, .LANCHOR19
+	add	x0, x0, :lo12:.LANCHOR19
 	mov	w28, 0
 	str	x0, [x29, 120]
 	mov	w26, 0
-	adrp	x0, .LC125
+	adrp	x0, .LC122
 	mov	w27, 0
-	add	x0, x0, :lo12:.LC125
+	add	x0, x0, :lo12:.LC122
 	mov	w19, 1024
 	mov	w21, -1
 	mov	w7, 6
 	str	wzr, [x29, 140]
 	str	x0, [x29, 112]
-.L2030:
+.L1984:
 	mov	w0, w7
 	str	w7, [x29, 128]
 	bl	nandc_set_ddr_para
@@ -12204,7 +12033,7 @@ flash_ddr_tuning_read:
 	ldr	x0, [x29, 120]
 	ldr	w7, [x29, 128]
 	ldr	w0, [x0]
-	tbz	x0, 4, .L2025
+	tbz	x0, 4, .L1979
 	ldr	x0, [x29, 112]
 	mov	w3, w4
 	mov	w1, w7
@@ -12214,50 +12043,50 @@ flash_ddr_tuning_read:
 	bl	printf
 	ldr	w4, [x29, 108]
 	ldr	w7, [x29, 128]
-.L2025:
+.L1979:
 	add	w0, w19, 1
 	cmp	w4, w0
-	bhi	.L2026
-	adrp	x0, .LANCHOR166
-	ldr	x23, [x0, #:lo12:.LANCHOR166]
-	adrp	x0, .LANCHOR168
-	ldr	x24, [x0, #:lo12:.LANCHOR168]
+	bhi	.L1980
+	adrp	x0, .LANCHOR163
+	ldr	x23, [x0, #:lo12:.LANCHOR163]
+	adrp	x0, .LANCHOR165
+	ldr	x24, [x0, #:lo12:.LANCHOR165]
 	ldrb	w0, [x25]
 	cmp	w4, w0, lsr 2
-	bcs	.L2036
+	bcs	.L1990
 	add	w27, w27, 1
 	cmp	w27, 7
-	bls	.L2036
+	bls	.L1990
 	sub	w28, w7, w27
 	mov	w19, w4
 	mov	w21, 0
-.L2028:
+.L1982:
 	ldr	w0, [x29, 140]
 	cmp	w27, w26
 	csel	w28, w28, w0, cs
-.L2029:
-	cbz	w28, .L2031
-	adrp	x0, .LANCHOR50
+.L1983:
+	cbz	w28, .L1985
+	adrp	x0, .LANCHOR49
 	mov	w1, 3
-	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	udiv	w0, w0, w1
 	cmp	w0, w19
-	bls	.L2031
+	bls	.L1985
 	mov	w1, w28
-	adrp	x0, .LC126
-	add	x0, x0, :lo12:.LC126
+	adrp	x0, .LC123
+	add	x0, x0, :lo12:.LC123
 	bl	printf
 	mov	w0, w28
-.L2050:
+.L2004:
 	bl	nandc_set_ddr_para
-	cbz	w21, .L2024
-	adrp	x25, .LANCHOR49
-	ldrb	w0, [x25, #:lo12:.LANCHOR49]
-	tbz	x0, 0, .L2024
+	cbz	w21, .L1978
+	adrp	x25, .LANCHOR48
+	ldrb	w0, [x25, #:lo12:.LANCHOR48]
+	tbz	x0, 0, .L1978
 	mov	w2, w22
 	mov	w1, w20
-	adrp	x0, .LC127
-	add	x0, x0, :lo12:.LC127
+	adrp	x0, .LC124
+	add	x0, x0, :lo12:.LC124
 	bl	printf
 	mov	w0, w20
 	bl	flash_reset
@@ -12265,8 +12094,8 @@ flash_ddr_tuning_read:
 	bl	flash_set_interface_mode
 	mov	w0, 1
 	bl	nandc_set_if_mode
-	adrp	x0, .LANCHOR34
-	add	x0, x0, :lo12:.LANCHOR34
+	adrp	x0, .LANCHOR33
+	add	x0, x0, :lo12:.LANCHOR33
 	mov	w1, 2
 	strb	w1, [x0, w20, sxtw]
 	mov	w0, w20
@@ -12281,22 +12110,22 @@ flash_ddr_tuning_read:
 	mov	w3, w0
 	mov	w2, w22
 	mov	w1, w20
-	adrp	x0, .LC128
-	add	x0, x0, :lo12:.LC128
+	adrp	x0, .LC125
+	add	x0, x0, :lo12:.LC125
 	bl	printf
-	adrp	x0, .LANCHOR50
-	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	adrp	x0, .LANCHOR49
+	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	cmp	w19, w0
-	bhi	.L2038
-	adrp	x1, .LANCHOR172
-	ldr	w0, [x1, #:lo12:.LANCHOR172]
+	bhi	.L1992
+	adrp	x1, .LANCHOR169
+	ldr	w0, [x1, #:lo12:.LANCHOR169]
 	add	w0, w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR172]
+	str	w0, [x1, #:lo12:.LANCHOR169]
 	cmp	w0, 100
-	bls	.L2034
-	adrp	x0, .LANCHOR21
-	strb	wzr, [x0, #:lo12:.LANCHOR21]
-.L2024:
+	bls	.L1988
+	adrp	x0, .LANCHOR26
+	strb	wzr, [x0, #:lo12:.LANCHOR26]
+.L1978:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -12305,37 +12134,37 @@ flash_ddr_tuning_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L2026:
+.L1980:
 	cmp	w27, w26
-	bls	.L2037
+	bls	.L1991
 	sub	w0, w28, w27
 	str	w0, [x29, 140]
 	cmp	w27, 7
-	bhi	.L2029
+	bhi	.L1983
 	mov	w26, w27
-.L2037:
+.L1991:
 	mov	w27, 0
-	b	.L2027
-.L2036:
+	b	.L1981
+.L1990:
 	mov	w28, w7
 	mov	w19, w4
 	mov	w21, 0
-.L2027:
+.L1981:
 	add	w7, w7, 2
 	cmp	w7, 50
-	bne	.L2030
-	b	.L2028
-.L2031:
+	bne	.L1984
+	b	.L1982
+.L1985:
 	ldrb	w0, [x29, 132]
-	b	.L2050
-.L2038:
+	b	.L2004
+.L1992:
 	mov	w19, w21
-.L2034:
-	ldrb	w0, [x25, #:lo12:.LANCHOR49]
+.L1988:
+	ldrb	w0, [x25, #:lo12:.LANCHOR48]
 	bl	flash_set_interface_mode
-	ldrb	w0, [x25, #:lo12:.LANCHOR49]
+	ldrb	w0, [x25, #:lo12:.LANCHOR48]
 	bl	nandc_set_if_mode
-	b	.L2024
+	b	.L1978
 	.size	flash_ddr_tuning_read, .-flash_ddr_tuning_read
 	.section	.text.flash_read_page_en,"ax",@progbits
 	.align	2
@@ -12346,70 +12175,70 @@ flash_read_page_en:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 255
-	adrp	x0, .LANCHOR18
+	adrp	x0, .LANCHOR23
 	stp	x23, x24, [sp, 48]
 	stp	x21, x22, [sp, 32]
 	mov	w19, w1
 	str	x25, [sp, 64]
 	mov	x22, x2
-	ldrb	w1, [x0, #:lo12:.LANCHOR18]
+	ldrb	w1, [x0, #:lo12:.LANCHOR23]
 	mov	x23, x3
 	mov	w24, w4
 	mov	x25, x0
 	cmp	w1, w20
-	bhi	.L2052
-	adrp	x1, .LANCHOR173
+	bhi	.L2006
+	adrp	x1, .LANCHOR170
 	adrp	x0, .LC0
-	mov	w2, 428
-	add	x1, x1, :lo12:.LANCHOR173
+	mov	w2, 431
+	add	x1, x1, :lo12:.LANCHOR170
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2052:
-	adrp	x0, .LANCHOR30
-	add	x0, x0, :lo12:.LANCHOR30
-	ldrb	w4, [x25, #:lo12:.LANCHOR18]
+.L2006:
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
+	ldrb	w4, [x25, #:lo12:.LANCHOR23]
 	ldrb	w21, [x0, w20, sxtw]
 	cmp	w20, w4
-	bcc	.L2053
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbnz	x0, 6, .L2054
-.L2078:
+	bcc	.L2007
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbnz	x0, 6, .L2008
+.L2032:
 	mov	w0, -1
-.L2051:
+.L2005:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2054:
+.L2008:
 	mov	w3, w19
 	mov	w2, w20
 	mov	w1, w21
-	adrp	x0, .LC129
-	add	x0, x0, :lo12:.LC129
+	adrp	x0, .LC126
+	add	x0, x0, :lo12:.LC126
 	bl	printf
-	b	.L2078
-.L2053:
+	b	.L2032
+.L2007:
 	tst	x19, 50331648
-	bne	.L2056
+	bne	.L2010
 	adrp	x0, .LANCHOR0
 	adrp	x1, .LANCHOR1
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L2057
+	cbz	w0, .L2011
 	ldrb	w0, [x1, #:lo12:.LANCHOR1]
-	cbz	w0, .L2056
-.L2057:
+	cbz	w0, .L2010
+.L2011:
 	adrp	x0, .LANCHOR2
 	ldrb	w1, [x1, #:lo12:.LANCHOR1]
 	ldrh	w2, [x0, #:lo12:.LANCHOR2]
 	udiv	w0, w19, w2
 	mul	w0, w0, w2
 	sub	w19, w19, w0
-	cbz	w1, .L2058
+	cbz	w1, .L2012
 	add	w19, w0, w19, lsl 1
-.L2056:
+.L2010:
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -12417,25 +12246,25 @@ flash_read_page_en:
 	mov	w0, w21
 	bl	flash_read_page
 	cmn	w0, #1
-	bne	.L2051
-	adrp	x20, .LANCHOR52
-	ldrb	w25, [x20, #:lo12:.LANCHOR52]
-	cbnz	w25, .L2059
-.L2062:
-	adrp	x0, .LANCHOR174
-	ldr	x5, [x0, #:lo12:.LANCHOR174]
-	cbnz	x5, .L2060
-.L2061:
-	ldrb	w4, [x20, #:lo12:.LANCHOR52]
+	bne	.L2005
+	adrp	x20, .LANCHOR51
+	ldrb	w25, [x20, #:lo12:.LANCHOR51]
+	cbnz	w25, .L2013
+.L2016:
+	adrp	x0, .LANCHOR171
+	ldr	x5, [x0, #:lo12:.LANCHOR171]
+	cbnz	x5, .L2014
+.L2015:
+	ldrb	w4, [x20, #:lo12:.LANCHOR51]
 	mov	w3, -1
 	mov	w2, w19
 	mov	w1, 0
-	adrp	x0, .LC130
-	add	x0, x0, :lo12:.LC130
+	adrp	x0, .LC127
+	add	x0, x0, :lo12:.LC127
 	bl	printf
-	adrp	x0, .LANCHOR21
-	ldrb	w0, [x0, #:lo12:.LANCHOR21]
-	cbz	w0, .L2078
+	adrp	x0, .LANCHOR26
+	ldrb	w0, [x0, #:lo12:.LANCHOR26]
+	cbz	w0, .L2032
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -12447,25 +12276,25 @@ flash_read_page_en:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	b	flash_ddr_tuning_read
-.L2058:
+.L2012:
 	adrp	x1, .LANCHOR3
 	add	x1, x1, :lo12:.LANCHOR3
 	ldrh	w19, [x1, w19, uxtw 1]
 	add	w19, w19, w0
-	b	.L2056
-.L2059:
-	strb	wzr, [x20, #:lo12:.LANCHOR52]
+	b	.L2010
+.L2013:
+	strb	wzr, [x20, #:lo12:.LANCHOR51]
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
 	mov	w1, w19
 	mov	w0, w21
 	bl	flash_read_page
-	strb	w25, [x20, #:lo12:.LANCHOR52]
+	strb	w25, [x20, #:lo12:.LANCHOR51]
 	cmn	w0, #1
-	beq	.L2062
-	b	.L2051
-.L2060:
+	beq	.L2016
+	b	.L2005
+.L2014:
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -12473,8 +12302,8 @@ flash_read_page_en:
 	mov	w0, w21
 	blr	x5
 	cmn	w0, #1
-	beq	.L2061
-	b	.L2051
+	beq	.L2015
+	b	.L2005
 	.size	flash_read_page_en, .-flash_read_page_en
 	.section	.text.flash_get_last_written_page,"ax",@progbits
 	.align	2
@@ -12485,15 +12314,15 @@ flash_get_last_written_page:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	w23, w0, 255
-	adrp	x0, .LANCHOR147
+	adrp	x0, .LANCHOR144
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
 	mov	x24, x2
-	ldrh	w19, [x0, #:lo12:.LANCHOR147]
-	adrp	x0, .LANCHOR33+26
+	ldrh	w19, [x0, #:lo12:.LANCHOR144]
+	adrp	x0, .LANCHOR32+26
 	stp	x21, x22, [sp, 32]
 	and	w21, w1, 65535
-	ldrh	w26, [x0, #:lo12:.LANCHOR33+26]
+	ldrh	w26, [x0, #:lo12:.LANCHOR32+26]
 	sub	w19, w19, #1
 	sxth	w19, w19
 	stp	x27, x28, [sp, 80]
@@ -12504,23 +12333,23 @@ flash_get_last_written_page:
 	add	w1, w19, w26
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L2080
+	bne	.L2034
 	mov	w27, 0
 	mov	w28, 2
-.L2081:
+.L2035:
 	cmp	w27, w19
-	ble	.L2084
-.L2080:
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2085
+	ble	.L2038
+.L2034:
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L2039
 	ldr	w3, [x22]
-	adrp	x0, .LC131
+	adrp	x0, .LC128
 	mov	w2, w19
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC131
+	add	x0, x0, :lo12:.LC128
 	bl	printf
-.L2085:
+.L2039:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -12529,7 +12358,7 @@ flash_get_last_written_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2084:
+.L2038:
 	add	w20, w27, w19
 	mov	w4, w25
 	mov	x3, x22
@@ -12539,28 +12368,28 @@ flash_get_last_written_page:
 	add	w1, w26, w20, sxth
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L2082
+	bne	.L2036
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L2081
-.L2082:
+	b	.L2035
+.L2036:
 	add	w20, w20, 1
 	sxth	w27, w20
-	b	.L2081
+	b	.L2035
 	.size	flash_get_last_written_page, .-flash_get_last_written_page
 	.section	.text.flash_get_last_written_page_ext,"ax",@progbits
 	.align	2
 	.global	flash_get_last_written_page_ext
 	.type	flash_get_last_written_page_ext, %function
 flash_get_last_written_page_ext:
-	adrp	x4, .LANCHOR32
+	adrp	x4, .LANCHOR31
 	mov	w5, 24
 	and	w0, w0, 65535
 	mov	w6, 1
-	ldrb	w4, [x4, #:lo12:.LANCHOR32]
+	ldrb	w4, [x4, #:lo12:.LANCHOR31]
 	sub	w5, w5, w4
-	adrp	x4, .LANCHOR75
-	ldrh	w4, [x4, #:lo12:.LANCHOR75]
+	adrp	x4, .LANCHOR74
+	ldrh	w4, [x4, #:lo12:.LANCHOR74]
 	sub	w5, w5, w4
 	mov	w4, w3
 	mov	x3, x2
@@ -12579,44 +12408,44 @@ flash_ddr_para_scan:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR49
+	adrp	x20, .LANCHOR48
 	stp	x21, x22, [sp, 32]
 	and	w22, w0, 255
-	ldrb	w0, [x20, #:lo12:.LANCHOR49]
-	adrp	x19, .LANCHOR21
+	ldrb	w0, [x20, #:lo12:.LANCHOR48]
+	adrp	x19, .LANCHOR26
 	stp	x23, x24, [sp, 48]
 	mov	w21, 1
 	mov	w23, w1
 	str	x25, [sp, 64]
-	strb	w21, [x19, #:lo12:.LANCHOR21]
-	adrp	x24, .LANCHOR176
+	strb	w21, [x19, #:lo12:.LANCHOR26]
+	adrp	x24, .LANCHOR173
 	bl	flash_set_interface_mode
-	adrp	x25, .LANCHOR175
-	ldrb	w0, [x20, #:lo12:.LANCHOR49]
+	adrp	x25, .LANCHOR172
+	ldrb	w0, [x20, #:lo12:.LANCHOR48]
 	bl	nandc_set_if_mode
-	ldr	x3, [x25, #:lo12:.LANCHOR175]
+	ldr	x3, [x25, #:lo12:.LANCHOR172]
 	mov	w4, 4
-	ldr	x2, [x24, #:lo12:.LANCHOR176]
+	ldr	x2, [x24, #:lo12:.LANCHOR173]
 	mov	w1, w23
 	mov	w0, w22
 	bl	flash_ddr_tuning_read
-	ldr	x3, [x25, #:lo12:.LANCHOR175]
+	ldr	x3, [x25, #:lo12:.LANCHOR172]
 	mov	w4, 4
-	ldr	x2, [x24, #:lo12:.LANCHOR176]
+	ldr	x2, [x24, #:lo12:.LANCHOR173]
 	mov	w1, w23
 	mov	w0, w22
 	bl	flash_read_page
 	cmn	w0, #1
 	mov	x0, x19
-	bne	.L2092
-	ldrb	w1, [x20, #:lo12:.LANCHOR49]
-	tbz	x1, 0, .L2092
+	bne	.L2046
+	ldrb	w1, [x20, #:lo12:.LANCHOR48]
+	tbz	x1, 0, .L2046
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, w21
 	bl	nandc_set_if_mode
-	strb	wzr, [x19, #:lo12:.LANCHOR21]
-.L2093:
+	strb	wzr, [x19, #:lo12:.LANCHOR26]
+.L2047:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -12624,59 +12453,49 @@ flash_ddr_para_scan:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2092:
+.L2046:
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR21]
-	b	.L2093
+	strb	w1, [x0, #:lo12:.LANCHOR26]
+	b	.L2047
 	.size	flash_ddr_para_scan, .-flash_ddr_para_scan
 	.section	.text.flash_prog_page,"ax",@progbits
 	.align	2
 	.global	flash_prog_page
 	.type	flash_prog_page, %function
 flash_prog_page:
-	stp	x29, x30, [sp, -96]!
+	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	and	w21, w0, 255
-	adrp	x0, .LANCHOR13
+	adrp	x0, .LANCHOR7
 	stp	x25, x26, [sp, 64]
 	stp	x19, x20, [sp, 16]
 	mov	w20, 24
-	ldr	x26, [x0, #:lo12:.LANCHOR13]
-	adrp	x0, .LANCHOR32
-	stp	x23, x24, [sp, 48]
+	ldr	x26, [x0, #:lo12:.LANCHOR7]
+	adrp	x0, .LANCHOR31
 	mov	w22, w1
-	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	stp	x23, x24, [sp, 48]
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	mov	x24, x2
+	mov	x25, x3
 	and	x19, x21, 255
-	str	x27, [sp, 80]
-	add	x23, x19, 8
 	sub	w0, w20, w0
 	mov	w20, 1
-	mov	x24, x2
-	mov	x25, x3
+	add	x23, x19, 8
 	lsl	w20, w20, w0
-	adrp	x0, .LANCHOR14
 	sub	w20, w20, #1
-	add	x23, x26, x23, lsl 8
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	and	w20, w20, w1
-	ubfx	x27, x22, 24, 2
-	tbz	x0, 4, .L2099
-	adrp	x0, .LC132
-	mov	w3, w4
-	mov	w2, w27
-	add	x0, x0, :lo12:.LC132
-	bl	printf
-.L2099:
 	bl	nandc_wait_flash_ready
 	mov	w0, w21
 	bl	hynix_reconfig_rr_para
 	mov	w0, w21
 	bl	nandc_cs
+	add	x23, x26, x23, lsl 8
 	mov	w0, w21
-	cbnz	w27, .L2100
+	tst	x22, 50331648
+	bne	.L2053
 	bl	zftl_flash_enter_slc_mode
-.L2101:
+.L2054:
 	add	x19, x26, x19, lsl 8
 	mov	w0, 128
 	str	w0, [x19, 2056]
@@ -12688,19 +12507,19 @@ flash_prog_page:
 	str	w0, [x19, 2052]
 	lsr	w0, w20, 16
 	str	w0, [x19, 2052]
-	adrp	x0, .LANCHOR31
-	ldrb	w0, [x0, #:lo12:.LANCHOR31]
-	cbz	w0, .L2102
+	adrp	x0, .LANCHOR30
+	ldrb	w0, [x0, #:lo12:.LANCHOR30]
+	cbz	w0, .L2055
 	lsr	w0, w20, 24
 	str	w0, [x19, 2052]
-.L2102:
+.L2055:
 	mov	w0, w20
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR33+9
+	adrp	x0, .LANCHOR32+9
 	mov	x4, x25
 	mov	x3, x24
 	mov	w1, 1
-	ldrb	w2, [x0, #:lo12:.LANCHOR33+9]
+	ldrb	w2, [x0, #:lo12:.LANCHOR32+9]
 	mov	w0, w21
 	bl	nandc_xfer
 	mov	w0, 16
@@ -12709,26 +12528,25 @@ flash_prog_page:
 	mov	x0, x23
 	bl	flash_read_status
 	mov	w3, w0
-	bl	nandc_de_cs.constprop.33
+	bl	nandc_de_cs.constprop.32
 	and	w2, w3, 4
-	tbz	x3, 2, .L2098
+	tbz	x3, 2, .L2052
 	mov	w1, w22
-	adrp	x0, .LC133
-	add	x0, x0, :lo12:.LC133
+	adrp	x0, .LC129
+	add	x0, x0, :lo12:.LC129
 	bl	printf
 	mov	w2, -1
-.L2098:
+.L2052:
 	mov	w0, w2
-	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 96
+	ldp	x29, x30, [sp], 80
 	ret
-.L2100:
+.L2053:
 	bl	zftl_flash_exit_slc_mode
-	b	.L2101
+	b	.L2054
 	.size	flash_prog_page, .-flash_prog_page
 	.section	.text.flash_test_blk,"ax",@progbits
 	.align	2
@@ -12739,16 +12557,16 @@ flash_test_blk:
 	mov	w2, 32
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR166
+	adrp	x22, .LANCHOR163
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 255
-	ldr	x0, [x22, #:lo12:.LANCHOR166]
-	adrp	x21, .LANCHOR168
+	ldr	x0, [x22, #:lo12:.LANCHOR163]
+	adrp	x21, .LANCHOR165
 	and	w19, w1, 65535
 	str	x23, [sp, 48]
 	mov	w1, 165
 	bl	ftl_memset
-	ldr	x0, [x21, #:lo12:.LANCHOR168]
+	ldr	x0, [x21, #:lo12:.LANCHOR165]
 	mov	w2, 8
 	mov	w1, 90
 	bl	ftl_memset
@@ -12759,10 +12577,10 @@ flash_test_blk:
 	mov	w1, w19
 	bl	flash_erase_block
 	cmn	w0, #1
-	bne	.L2115
-.L2117:
+	bne	.L2065
+.L2067:
 	mov	w21, -1
-.L2116:
+.L2066:
 	mov	w1, w19
 	mov	w0, w20
 	bl	flash_erase_block
@@ -12772,38 +12590,38 @@ flash_test_blk:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2115:
-	adrp	x23, .LANCHOR33
-	add	x23, x23, :lo12:.LANCHOR33
-	ldr	x3, [x21, #:lo12:.LANCHOR168]
+.L2065:
+	adrp	x23, .LANCHOR32
+	add	x23, x23, :lo12:.LANCHOR32
+	ldr	x3, [x21, #:lo12:.LANCHOR165]
 	mov	w1, w19
-	ldr	x2, [x22, #:lo12:.LANCHOR166]
+	ldr	x2, [x22, #:lo12:.LANCHOR163]
 	mov	w0, w20
 	ldrb	w4, [x23, 9]
 	bl	flash_prog_page
 	cmn	w0, #1
-	beq	.L2117
+	beq	.L2067
 	ldrb	w4, [x23, 9]
 	mov	w1, w19
-	ldr	x3, [x21, #:lo12:.LANCHOR168]
+	ldr	x3, [x21, #:lo12:.LANCHOR165]
 	mov	w0, w20
-	ldr	x2, [x22, #:lo12:.LANCHOR166]
+	ldr	x2, [x22, #:lo12:.LANCHOR163]
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L2117
-	ldr	x0, [x22, #:lo12:.LANCHOR166]
+	beq	.L2067
+	ldr	x0, [x22, #:lo12:.LANCHOR163]
 	ldr	w1, [x0]
 	mov	w0, 42405
 	movk	w0, 0xa5a5, lsl 16
 	cmp	w1, w0
-	bne	.L2117
-	ldr	x0, [x21, #:lo12:.LANCHOR168]
+	bne	.L2067
+	ldr	x0, [x21, #:lo12:.LANCHOR165]
 	ldr	w1, [x0]
 	mov	w0, 23130
 	movk	w0, 0x5a5a, lsl 16
 	cmp	w1, w0
 	csetm	w21, ne
-	b	.L2116
+	b	.L2066
 	.size	flash_test_blk, .-flash_test_blk
 	.section	.text.id_block_prog_msb_ff_data,"ax",@progbits
 	.align	2
@@ -12814,50 +12632,50 @@ id_block_prog_msb_ff_data:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	and	w22, w0, 255
-	adrp	x0, .LANCHOR19
+	adrp	x0, .LANCHOR24
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
-	ldrb	w0, [x0, #:lo12:.LANCHOR19]
+	ldrb	w0, [x0, #:lo12:.LANCHOR24]
 	str	x25, [sp, 64]
-	cbnz	w0, .L2125
-	adrp	x20, .LANCHOR33
-	add	x20, x20, :lo12:.LANCHOR33
+	cbnz	w0, .L2075
+	adrp	x20, .LANCHOR32
+	add	x20, x20, :lo12:.LANCHOR32
 	ldrb	w0, [x20, 19]
 	sub	w0, w0, #5
 	and	w3, w0, 255
 	cmp	w3, 63
-	bhi	.L2125
+	bhi	.L2075
 	and	w19, w2, 65535
 	mov	x2, 16391
 	movk	x2, 0x4000, lsl 16
 	movk	x2, 0x8000, lsl 48
 	lsr	x0, x2, x3
-	tbz	x0, 0, .L2125
-	adrp	x21, .LANCHOR145
+	tbz	x0, 0, .L2075
+	adrp	x21, .LANCHOR142
 	mov	w23, w1
-	add	x21, x21, :lo12:.LANCHOR145
+	add	x21, x21, :lo12:.LANCHOR142
 	mov	w25, 65535
-	adrp	x24, .LANCHOR166
-.L2127:
+	adrp	x24, .LANCHOR163
+.L2077:
 	ldrh	w0, [x20, 10]
 	cmp	w0, w19
-	bhi	.L2128
-.L2125:
+	bhi	.L2078
+.L2075:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2128:
+.L2078:
 	ldrh	w0, [x21, w19, sxtw 1]
 	cmp	w0, w25
-	bne	.L2125
-	ldr	x0, [x24, #:lo12:.LANCHOR166]
+	bne	.L2075
+	ldr	x0, [x24, #:lo12:.LANCHOR163]
 	mov	w2, 16384
 	mov	w1, 255
 	bl	ftl_memset
-	ldr	x3, [x24, #:lo12:.LANCHOR166]
+	ldr	x3, [x24, #:lo12:.LANCHOR163]
 	add	w1, w19, w23
 	ldrb	w4, [x20, 9]
 	add	w19, w19, 1
@@ -12865,7 +12683,7 @@ id_block_prog_msb_ff_data:
 	mov	w0, w22
 	and	w19, w19, 65535
 	bl	flash_prog_page
-	b	.L2127
+	b	.L2077
 	.size	id_block_prog_msb_ff_data, .-id_block_prog_msb_ff_data
 	.section	.text.flash_start_one_pass_page_prog,"ax",@progbits
 	.align	2
@@ -12875,19 +12693,19 @@ flash_start_one_pass_page_prog:
 	stp	x29, x30, [sp, -32]!
 	and	w8, w0, 255
 	and	w7, w3, 255
-	adrp	x0, .LANCHOR13
+	adrp	x0, .LANCHOR7
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w20, w2, 255
-	ldr	x19, [x0, #:lo12:.LANCHOR13]
+	ldr	x19, [x0, #:lo12:.LANCHOR7]
 	mov	w0, w7
 	bl	nandc_cs
-	cbz	w8, .L2131
+	cbz	w8, .L2081
 	sxtw	x0, w7
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 8
 	str	w8, [x0, 8]
-.L2131:
+.L2081:
 	ubfiz	x0, x7, 8, 8
 	add	x19, x19, x0
 	mov	w0, 128
@@ -12900,19 +12718,19 @@ flash_start_one_pass_page_prog:
 	str	w0, [x19, 2052]
 	lsr	w0, w4, 16
 	str	w0, [x19, 2052]
-	adrp	x0, .LANCHOR31
-	ldrb	w0, [x0, #:lo12:.LANCHOR31]
-	cbz	w0, .L2132
+	adrp	x0, .LANCHOR30
+	ldrb	w0, [x0, #:lo12:.LANCHOR30]
+	cbz	w0, .L2082
 	lsr	w0, w4, 24
 	str	w0, [x19, 2052]
-.L2132:
+.L2082:
 	mov	w0, w4
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR33+9
+	adrp	x0, .LANCHOR32+9
 	mov	x4, x6
 	mov	x3, x5
 	mov	w1, 1
-	ldrb	w2, [x0, #:lo12:.LANCHOR33+9]
+	ldrb	w2, [x0, #:lo12:.LANCHOR32+9]
 	mov	w0, w7
 	bl	nandc_xfer
 	str	w20, [x19, 2056]
@@ -12931,19 +12749,19 @@ flash_dual_page_prog:
 	and	w20, w0, 255
 	stp	x25, x26, [sp, 64]
 	mov	x25, x2
-	adrp	x2, .LANCHOR13
+	adrp	x2, .LANCHOR7
 	stp	x21, x22, [sp, 32]
 	ubfiz	x22, x20, 8, 8
 	stp	x27, x28, [sp, 80]
 	add	x0, x22, 2048
-	ldr	x22, [x2, #:lo12:.LANCHOR13]
+	ldr	x22, [x2, #:lo12:.LANCHOR7]
 	mov	w19, 24
-	adrp	x27, .LANCHOR14
+	adrp	x27, .LANCHOR19
 	add	x22, x22, x0
-	adrp	x0, .LANCHOR32
+	adrp	x0, .LANCHOR31
 	stp	x23, x24, [sp, 48]
 	mov	w21, w1
-	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
 	mov	x26, x3
 	mov	x23, x4
 	mov	x24, x5
@@ -12951,23 +12769,23 @@ flash_dual_page_prog:
 	mov	w19, 1
 	ubfx	x28, x21, 24, 2
 	lsl	w19, w19, w0
-	ldr	w0, [x27, #:lo12:.LANCHOR14]
+	ldr	w0, [x27, #:lo12:.LANCHOR19]
 	sub	w19, w19, #1
 	and	w19, w19, w1
-	tbz	x0, 4, .L2141
-	adrp	x0, .LC132
+	tbz	x0, 4, .L2091
+	adrp	x0, .LC130
 	mov	w3, w6
 	mov	w2, w28
-	add	x0, x0, :lo12:.LC132
+	add	x0, x0, :lo12:.LC130
 	bl	printf
-.L2141:
+.L2091:
 	bl	nandc_wait_flash_ready
 	mov	w0, w20
 	bl	nandc_cs
 	mov	w0, w20
-	cbnz	w28, .L2142
+	cbnz	w28, .L2092
 	bl	zftl_flash_enter_slc_mode
-.L2143:
+.L2093:
 	mov	x6, x26
 	mov	x5, x25
 	mov	w4, w19
@@ -12989,18 +12807,18 @@ flash_dual_page_prog:
 	mov	x0, x22
 	bl	flash_read_status
 	mov	w3, w0
-	bl	nandc_de_cs.constprop.33
+	bl	nandc_de_cs.constprop.32
 	and	w2, w3, 4
-	tbz	x3, 2, .L2140
-	ldr	w0, [x27, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2145
-	adrp	x0, .LC133
+	tbz	x3, 2, .L2090
+	ldr	w0, [x27, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L2095
+	adrp	x0, .LC129
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC133
+	add	x0, x0, :lo12:.LC129
 	bl	printf
-.L2145:
+.L2095:
 	mov	w2, -1
-.L2140:
+.L2090:
 	mov	w0, w2
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -13009,9 +12827,9 @@ flash_dual_page_prog:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2142:
+.L2092:
 	bl	zftl_flash_exit_slc_mode
-	b	.L2143
+	b	.L2093
 	.size	flash_dual_page_prog, .-flash_dual_page_prog
 	.section	.text.ymtc_flash_tlc_page_prog,"ax",@progbits
 	.align	2
@@ -13024,19 +12842,19 @@ ymtc_flash_tlc_page_prog:
 	and	w20, w0, 255
 	str	x25, [sp, 64]
 	mov	w25, w1
-	adrp	x1, .LANCHOR13
+	adrp	x1, .LANCHOR7
 	stp	x21, x22, [sp, 32]
 	ubfiz	x22, x20, 8, 8
 	mov	w19, 24
 	add	x0, x22, 2048
-	ldr	x22, [x1, #:lo12:.LANCHOR13]
+	ldr	x22, [x1, #:lo12:.LANCHOR7]
 	mov	w21, 1
 	stp	x23, x24, [sp, 48]
 	add	x22, x22, x0
-	adrp	x0, .LANCHOR32
+	adrp	x0, .LANCHOR31
 	mov	x23, x2
 	mov	x24, x3
-	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
 	sub	w19, w19, w0
 	bl	nandc_wait_flash_ready
 	lsl	w19, w21, w19
@@ -13076,19 +12894,19 @@ ymtc_flash_tlc_page_prog:
 	mov	x0, x22
 	bl	flash_read_status
 	mov	w3, w0
-	bl	nandc_de_cs.constprop.33
+	bl	nandc_de_cs.constprop.32
 	and	w2, w3, 4
-	tbz	x3, 2, .L2153
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2155
-	adrp	x0, .LC134
+	tbz	x3, 2, .L2103
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L2105
+	adrp	x0, .LC131
 	mov	w1, w25
-	add	x0, x0, :lo12:.LC134
+	add	x0, x0, :lo12:.LC131
 	bl	printf
-.L2155:
+.L2105:
 	mov	w2, -1
-.L2153:
+.L2103:
 	mov	w0, w2
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -13097,13 +12915,13 @@ ymtc_flash_tlc_page_prog:
 	ldp	x29, x30, [sp], 80
 	ret
 	.size	ymtc_flash_tlc_page_prog, .-ymtc_flash_tlc_page_prog
-	.section	.text.fw_flash_page_prog.constprop.30,"ax",@progbits
+	.section	.text.fw_flash_page_prog.constprop.29,"ax",@progbits
 	.align	2
-	.type	fw_flash_page_prog.constprop.30, %function
-fw_flash_page_prog.constprop.30:
+	.type	fw_flash_page_prog.constprop.29, %function
+fw_flash_page_prog.constprop.29:
 	stp	x29, x30, [sp, -64]!
-	adrp	x4, .LANCHOR33
-	add	x4, x4, :lo12:.LANCHOR33
+	adrp	x4, .LANCHOR32
+	add	x4, x4, :lo12:.LANCHOR32
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x20, x1
@@ -13112,26 +12930,26 @@ fw_flash_page_prog.constprop.30:
 	str	x23, [sp, 48]
 	ldrb	w19, [x4, 9]
 	udiv	w19, w0, w19
-	adrp	x0, .LANCHOR50
-	ldrb	w23, [x0, #:lo12:.LANCHOR50]
-	adrp	x0, .LANCHOR17
-	ldrb	w0, [x0, #:lo12:.LANCHOR17]
+	adrp	x0, .LANCHOR49
+	ldrb	w23, [x0, #:lo12:.LANCHOR49]
+	adrp	x0, .LANCHOR22
+	ldrb	w0, [x0, #:lo12:.LANCHOR22]
 	bl	nandc_bch_sel
 	ldrb	w0, [x4, 7]
 	cmp	w0, 9
-	bne	.L2161
-	adrp	x0, .LANCHOR19
-	ldrb	w0, [x0, #:lo12:.LANCHOR19]
-	cbnz	w0, .L2161
+	bne	.L2111
+	adrp	x0, .LANCHOR24
+	ldrb	w0, [x0, #:lo12:.LANCHOR24]
+	cbnz	w0, .L2111
 	ldrb	w0, [x4, 12]
 	cmp	w0, 3
-	bne	.L2162
+	bne	.L2112
 	mov	x3, x21
 	mov	x2, x20
 	mov	w1, w19
 	mov	w0, 0
 	bl	ymtc_flash_tlc_page_prog
-.L2165:
+.L2115:
 	mov	w4, w0
 	mov	w0, w23
 	bl	nandc_bch_sel
@@ -13141,13 +12959,13 @@ fw_flash_page_prog.constprop.30:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2162:
-	adrp	x22, .LANCHOR166
+.L2112:
+	adrp	x22, .LANCHOR163
 	mov	w2, 16384
 	mov	w1, 255
-	ldr	x0, [x22, #:lo12:.LANCHOR166]
+	ldr	x0, [x22, #:lo12:.LANCHOR163]
 	bl	ftl_memset
-	ldr	x5, [x22, #:lo12:.LANCHOR166]
+	ldr	x5, [x22, #:lo12:.LANCHOR163]
 	mov	w6, 4
 	mov	x3, x21
 	mov	x2, x20
@@ -13155,16 +12973,16 @@ fw_flash_page_prog.constprop.30:
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_dual_page_prog
-	b	.L2165
-.L2161:
+	b	.L2115
+.L2111:
 	mov	w4, 4
 	mov	x3, x21
 	mov	x2, x20
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_prog_page
-	b	.L2165
-	.size	fw_flash_page_prog.constprop.30, .-fw_flash_page_prog.constprop.30
+	b	.L2115
+	.size	fw_flash_page_prog.constprop.29, .-fw_flash_page_prog.constprop.29
 	.section	.text.idb_write_data,"ax",@progbits
 	.align	2
 	.global	idb_write_data
@@ -13178,11 +12996,11 @@ idb_write_data:
 	stp	x21, x22, [sp, 32]
 	mov	w20, w3
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR143
+	adrp	x22, .LANCHOR140
 	stp	x25, x26, [sp, 64]
 	mov	x24, x2
 	stp	x27, x28, [sp, 80]
-	bne	.L2167
+	bne	.L2117
 	ldr	w0, [x2]
 	mov	w1, 35899
 	movk	w1, 0xfcdc, lsl 16
@@ -13190,69 +13008,69 @@ idb_write_data:
 	mov	w1, 19282
 	movk	w1, 0x534e, lsl 16
 	ccmp	w0, w1, 4, ne
-	beq	.L2168
+	beq	.L2118
 	add	w1, w1, 327680
 	cmp	w0, w1
-	bne	.L2167
-.L2168:
-	adrp	x21, .LANCHOR141
+	bne	.L2117
+.L2118:
+	adrp	x21, .LANCHOR138
 	mov	w1, 1
-	strb	w1, [x22, #:lo12:.LANCHOR143]
-	ldr	x0, [x21, #:lo12:.LANCHOR141]
-	cbnz	x0, .L2169
+	strb	w1, [x22, #:lo12:.LANCHOR140]
+	ldr	x0, [x21, #:lo12:.LANCHOR138]
+	cbnz	x0, .L2119
 	mov	w0, 262144
 	bl	ftl_malloc
-	str	x0, [x21, #:lo12:.LANCHOR141]
-.L2169:
-	adrp	x0, .LANCHOR177
+	str	x0, [x21, #:lo12:.LANCHOR138]
+.L2119:
+	adrp	x0, .LANCHOR174
 	mov	w1, 64
-	str	w1, [x0, #:lo12:.LANCHOR177]
-.L2167:
-	ldrb	w0, [x22, #:lo12:.LANCHOR143]
-	cbz	w0, .L2235
-	adrp	x0, .LANCHOR141
+	str	w1, [x0, #:lo12:.LANCHOR174]
+.L2117:
+	ldrb	w0, [x22, #:lo12:.LANCHOR140]
+	cbz	w0, .L2185
+	adrp	x0, .LANCHOR138
 	mov	x23, x0
-	ldr	x21, [x0, #:lo12:.LANCHOR141]
-	cbz	x21, .L2235
+	ldr	x21, [x0, #:lo12:.LANCHOR138]
+	cbz	x21, .L2185
 	add	w0, w19, w20
 	str	w0, [x29, 140]
 	cmp	w0, 63
-	bls	.L2171
+	bls	.L2121
 	cmp	w19, 575
-	bhi	.L2172
-	adrp	x21, .LANCHOR144
-	ldr	x0, [x21, #:lo12:.LANCHOR144]
-	cbz	x0, .L2173
-.L2176:
-	adrp	x1, .LANCHOR142
+	bhi	.L2122
+	adrp	x21, .LANCHOR141
+	ldr	x0, [x21, #:lo12:.LANCHOR141]
+	cbz	x0, .L2123
+.L2126:
+	adrp	x1, .LANCHOR139
 	mov	w2, 1
-	ldr	x0, [x23, #:lo12:.LANCHOR141]
+	ldr	x0, [x23, #:lo12:.LANCHOR138]
 	cmp	w19, 64
-	str	w2, [x1, #:lo12:.LANCHOR142]
-	bhi	.L2288
+	str	w2, [x1, #:lo12:.LANCHOR139]
+	bhi	.L2238
 	mov	w4, 64
 	sub	w4, w4, w19
 	sub	w2, w20, w4
 	ubfiz	x4, x4, 9, 25
 	lsl	w2, w2, 9
 	add	x1, x24, x4
-.L2294:
+.L2244:
 	bl	ftl_memcpy
-.L2177:
-	adrp	x0, .LANCHOR177
-	ldr	w0, [x0, #:lo12:.LANCHOR177]
+.L2127:
+	adrp	x0, .LANCHOR174
+	ldr	w0, [x0, #:lo12:.LANCHOR174]
 	cmp	w19, w0
-	beq	.L2231
-	strb	wzr, [x22, #:lo12:.LANCHOR143]
-	b	.L2231
-.L2173:
+	beq	.L2181
+	strb	wzr, [x22, #:lo12:.LANCHOR140]
+	b	.L2181
+.L2123:
 	mov	w0, 262144
 	bl	ftl_malloc
-	str	x0, [x21, #:lo12:.LANCHOR144]
-	cbnz	x0, .L2176
+	str	x0, [x21, #:lo12:.LANCHOR141]
+	cbnz	x0, .L2126
 	mov	w0, -1
-	b	.L2166
-.L2288:
+	b	.L2116
+.L2238:
 	mov	w2, 576
 	sub	w2, w2, w19
 	cmp	w20, w2
@@ -13262,14 +13080,14 @@ idb_write_data:
 	lsl	w2, w2, 9
 	mov	x1, x24
 	add	x0, x0, x3
-	b	.L2294
-.L2171:
+	b	.L2244
+.L2121:
 	cmp	w19, 575
-	bls	.L2177
-.L2172:
-	adrp	x0, .LANCHOR142
-	ldr	w0, [x0, #:lo12:.LANCHOR142]
-	cbz	w0, .L2177
+	bls	.L2127
+.L2122:
+	adrp	x0, .LANCHOR139
+	ldr	w0, [x0, #:lo12:.LANCHOR139]
+	cbz	w0, .L2127
 	ldr	w0, [x21]
 	mov	w1, 35899
 	movk	w1, 0xfcdc, lsl 16
@@ -13277,109 +13095,109 @@ idb_write_data:
 	mov	w1, 19282
 	movk	w1, 0x534e, lsl 16
 	ccmp	w0, w1, 4, ne
-	beq	.L2178
+	beq	.L2128
 	add	w1, w1, 327680
 	cmp	w0, w1
-	bne	.L2179
-.L2178:
+	bne	.L2129
+.L2128:
 	adrp	x0, .LANCHOR0
-	mov	x10, x0
+	mov	x20, x0
 	ldrb	w1, [x0, #:lo12:.LANCHOR0]
 	str	w1, [x29, 176]
-	adrp	x1, .LANCHOR19
-	mov	x11, x1
+	adrp	x1, .LANCHOR24
+	mov	x24, x1
 	ldr	w0, [x29, 176]
-	ldrb	w2, [x1, #:lo12:.LANCHOR19]
+	ldrb	w2, [x1, #:lo12:.LANCHOR24]
 	str	w2, [x29, 204]
-	cbz	w0, .L2180
+	cbz	w0, .L2130
 	ldrh	w0, [x29, 176]
 	str	w0, [x29, 172]
 	uxtw	x0, w2
 	cmp	w0, 0
 	cset	w0, eq
-.L2291:
-	adrp	x8, .LANCHOR33
-	add	x8, x8, :lo12:.LANCHOR33
+.L2241:
+	adrp	x23, .LANCHOR32
+	add	x23, x23, :lo12:.LANCHOR32
 	str	w0, [x29, 200]
 	mov	w0, 0
-	ldrb	w19, [x8, 9]
-	ldrh	w22, [x8, 26]
+	ldrb	w19, [x23, 9]
+	ldrh	w22, [x23, 26]
 	bl	zftl_flash_exit_slc_mode
-	ldrh	w20, [x8, 10]
+	ldrb	w0, [x24, #:lo12:.LANCHOR24]
 	add	x1, x21, 258048
-	ldrb	w0, [x11, #:lo12:.LANCHOR19]
+	strb	w0, [x20, #:lo12:.LANCHOR0]
 	mov	w4, 16981
-	strb	w0, [x10, #:lo12:.LANCHOR0]
+	ldrh	w20, [x23, 10]
 	add	x1, x1, 2044
-	ldrb	w0, [x8, 12]
-	lsl	w20, w20, 2
+	ldrb	w0, [x23, 12]
 	mov	w2, 65023
 	movk	w4, 0x4f4f, lsl 16
 	mov	w3, 4098
+	lsl	w20, w20, 2
 	sdiv	w20, w20, w0
 	mov	w0, 512
 	cmp	w20, 512
 	csel	w20, w20, w0, lt
 	mov	w0, 0
-.L2187:
+.L2137:
 	ldr	w5, [x1]
-	cbnz	w5, .L2183
-	cbnz	w0, .L2184
+	cbnz	w5, .L2133
+	cbnz	w0, .L2134
 	str	w4, [x1, 2048]
-.L2185:
+.L2135:
 	add	w0, w0, 1
 	sub	w2, w2, #1
 	cmp	w0, w3
 	sub	x1, x1, #4
 	csel	w0, w0, wzr, ls
 	cmp	w2, 4096
-	bne	.L2187
-.L2183:
+	bne	.L2137
+.L2133:
 	ldr	w1, [x21, w2, uxtw 2]
 	mov	w3, w20
-	adrp	x0, .LC135
-	add	x0, x0, :lo12:.LC135
+	adrp	x0, .LC132
+	add	x0, x0, :lo12:.LC132
 	bl	printf
 	str	wzr, [x29, 180]
 	mul	w0, w22, w19
 	str	wzr, [x29, 192]
 	str	w0, [x29, 128]
-	adrp	x0, .LANCHOR52
-	add	x0, x0, :lo12:.LANCHOR52
+	adrp	x0, .LANCHOR51
+	add	x0, x0, :lo12:.LANCHOR51
 	str	x0, [x29, 184]
-.L2226:
-	adrp	x23, .LANCHOR144
+.L2176:
+	adrp	x23, .LANCHOR141
 	mov	w1, 0
 	mov	w2, 512
-	ldr	x0, [x23, #:lo12:.LANCHOR144]
+	ldr	x0, [x23, #:lo12:.LANCHOR141]
 	bl	ftl_memset
 	str	x23, [x29, 160]
-	adrp	x0, .LANCHOR27
+	adrp	x0, .LANCHOR6
 	ldr	w1, [x29, 192]
-	ldr	x0, [x0, #:lo12:.LANCHOR27]
+	ldr	x0, [x0, #:lo12:.LANCHOR6]
 	add	x0, x0, x1, uxtw
 	ldrb	w19, [x0, 32]
 	cmp	w19, 255
-	beq	.L2188
+	beq	.L2138
 	ldr	w0, [x29, 128]
 	mul	w19, w19, w0
 	ldr	w0, [x29, 200]
-	cbz	w0, .L2189
+	cbz	w0, .L2139
 	and	w0, w1, -3
-	adrp	x10, .LANCHOR0
+	adrp	x24, .LANCHOR0
 	cmp	w0, 1
-	adrp	x8, .LANCHOR19
-	beq	.L2190
+	adrp	x22, .LANCHOR24
+	beq	.L2140
 	ldr	w0, [x29, 200]
 	cmp	w0, 3
-	bne	.L2191
-.L2190:
+	bne	.L2141
+.L2140:
 	ldrb	w0, [x29, 172]
-	strb	w0, [x10, #:lo12:.LANCHOR0]
-	strb	w0, [x8, #:lo12:.LANCHOR19]
-.L2189:
-	adrp	x22, .LANCHOR33
-	add	x27, x22, :lo12:.LANCHOR33
+	strb	w0, [x24, #:lo12:.LANCHOR0]
+	strb	w0, [x22, #:lo12:.LANCHOR24]
+.L2139:
+	adrp	x22, .LANCHOR32
+	add	x27, x22, :lo12:.LANCHOR32
 	ldr	x0, [x29, 184]
 	ldrb	w24, [x27, 9]
 	ldrh	w25, [x27, 26]
@@ -13401,15 +13219,15 @@ idb_write_data:
 	lsl	w0, w0, 2
 	sdiv	w0, w0, w1
 	str	w0, [x29, 156]
-	bne	.L2241
-	adrp	x0, .LANCHOR28
-	ldrb	w0, [x0, #:lo12:.LANCHOR28]
+	bne	.L2191
+	adrp	x0, .LANCHOR27
+	ldrb	w0, [x0, #:lo12:.LANCHOR27]
 	cmp	w0, 9
-	bne	.L2241
+	bne	.L2191
 	ldr	x0, [x29, 160]
 	mov	w2, 1024
 	mov	w1, 0
-	ldr	x25, [x0, #:lo12:.LANCHOR144]
+	ldr	x25, [x0, #:lo12:.LANCHOR141]
 	mov	x0, x25
 	bl	ftl_memset
 	mov	w0, 18766
@@ -13417,15 +13235,15 @@ idb_write_data:
 	str	w0, [x25]
 	mov	w0, 12
 	str	w0, [x25, 4]
-	adrp	x0, .LANCHOR19
+	adrp	x0, .LANCHOR24
 	strb	wzr, [x25, 16]
 	str	wzr, [x25, 12]
-	ldrb	w0, [x0, #:lo12:.LANCHOR19]
-	cbz	w0, .L2193
+	ldrb	w0, [x0, #:lo12:.LANCHOR24]
+	cbz	w0, .L2143
 	ldrb	w0, [x27, 29]
 	strb	w0, [x25, 16]
-.L2193:
-	add	x1, x22, :lo12:.LANCHOR33
+.L2143:
+	add	x1, x22, :lo12:.LANCHOR32
 	mov	w0, 4
 	strb	w0, [x25, 17]
 	cmp	w24, 8
@@ -13445,31 +13263,31 @@ idb_write_data:
 	str	w0, [x25, 8]
 	sub	w0, w20, #4
 	str	w0, [x29, 196]
-.L2192:
+.L2142:
 	adrp	x27, .LANCHOR3
 	mov	x23, x21
 	add	x27, x27, :lo12:.LANCHOR3
-	adrp	x0, .LANCHOR19
+	adrp	x0, .LANCHOR24
 	mov	w28, 0
-	add	x0, x0, :lo12:.LANCHOR19
+	add	x0, x0, :lo12:.LANCHOR24
 	str	x0, [x29, 144]
-.L2195:
+.L2145:
 	ldr	w0, [x29, 156]
 	cmp	w0, w28
-	bhi	.L2206
+	bhi	.L2156
 	ldr	x0, [x29, 160]
-	add	x22, x22, :lo12:.LANCHOR33
+	add	x22, x22, :lo12:.LANCHOR32
 	mov	w24, 4
 	mov	w25, 0
 	mov	w28, 0
-	ldr	x23, [x0, #:lo12:.LANCHOR144]
+	ldr	x23, [x0, #:lo12:.LANCHOR141]
 	ldrb	w0, [x22, 9]
 	str	w0, [x29, 144]
 	ldrh	w0, [x22, 26]
 	ldr	w1, [x29, 144]
 	mul	w0, w0, w1
-	adrp	x1, .LANCHOR52
-	strb	wzr, [x1, #:lo12:.LANCHOR52]
+	adrp	x1, .LANCHOR51
+	strb	wzr, [x1, #:lo12:.LANCHOR51]
 	udiv	w1, w19, w0
 	msub	w0, w1, w0, w19
 	str	w0, [x29, 168]
@@ -13483,41 +13301,41 @@ idb_write_data:
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
 	str	x0, [x29, 112]
-.L2207:
+.L2157:
 	ldr	w0, [x29, 156]
 	cmp	w25, w0
-	bcc	.L2221
+	bcc	.L2171
 	ldr	x0, [x29, 184]
 	ldrb	w1, [x29, 136]
 	strb	w1, [x0]
 	ldr	w0, [x29, 200]
-	cbz	w0, .L2222
+	cbz	w0, .L2172
 	mov	w0, 0
 	bl	zftl_flash_exit_slc_mode
 	adrp	x0, .LANCHOR0
 	strb	wzr, [x0, #:lo12:.LANCHOR0]
-	adrp	x0, .LANCHOR19
-	strb	wzr, [x0, #:lo12:.LANCHOR19]
-.L2222:
+	adrp	x0, .LANCHOR24
+	strb	wzr, [x0, #:lo12:.LANCHOR24]
+.L2172:
 	ldr	w0, [x29, 196]
 	mov	x2, 0
 	lsl	w1, w0, 7
-	adrp	x0, .LANCHOR144
-	ldr	x0, [x0, #:lo12:.LANCHOR144]
-.L2223:
+	adrp	x0, .LANCHOR141
+	ldr	x0, [x0, #:lo12:.LANCHOR141]
+.L2173:
 	mov	w22, w2
 	cmp	w2, w1
-	bcc	.L2224
+	bcc	.L2174
 	ldr	w0, [x29, 180]
 	add	w0, w0, 1
 	str	w0, [x29, 180]
 	cmp	w0, 5
-	bls	.L2188
-	b	.L2233
-.L2180:
+	bls	.L2138
+	b	.L2183
+.L2130:
 	ldr	w0, [x29, 204]
 	cmp	w0, 3
-	beq	.L2237
+	beq	.L2187
 	cmp	w0, 2
 	mov	w0, 2
 	csel	w0, wzr, w0, ne
@@ -13526,134 +13344,134 @@ idb_write_data:
 	cmp	w0, 2
 	mov	w0, 3
 	csel	w0, wzr, w0, ne
-	b	.L2291
-.L2237:
+	b	.L2241
+.L2187:
 	ldr	w0, [x29, 204]
 	str	w0, [x29, 172]
 	mov	w0, 2
-	b	.L2291
-.L2184:
+	b	.L2241
+.L2134:
 	ldr	w5, [x21, w0, uxtw 2]
 	str	w5, [x1, 2048]
-	b	.L2185
-.L2191:
+	b	.L2135
+.L2141:
 	mov	w0, 0
 	bl	zftl_flash_exit_slc_mode
-	strb	wzr, [x10, #:lo12:.LANCHOR0]
-	strb	wzr, [x8, #:lo12:.LANCHOR19]
-	b	.L2189
-.L2241:
+	strb	wzr, [x24, #:lo12:.LANCHOR0]
+	strb	wzr, [x22, #:lo12:.LANCHOR24]
+	b	.L2139
+.L2191:
 	mov	x25, 0
 	str	w20, [x29, 196]
-	b	.L2192
-.L2206:
+	b	.L2142
+.L2156:
 	ldr	w0, [x29, 168]
-	adrp	x2, .LANCHOR19
+	adrp	x2, .LANCHOR24
 	add	w4, w0, w28
-	ldrb	w2, [x2, #:lo12:.LANCHOR19]
+	ldrb	w2, [x2, #:lo12:.LANCHOR24]
 	ubfx	x4, x4, 2, 16
 	add	w1, w4, 1
 	ldrh	w0, [x27, w1, sxtw 1]
-	cbz	w2, .L2197
+	cbz	w2, .L2147
 	adrp	x0, .LANCHOR1
 	ldrb	w7, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w1, 1
 	cmp	w7, 0
 	csel	w0, w0, w1, ne
-.L2197:
-	adrp	x1, .LANCHOR28
-	ldrb	w1, [x1, #:lo12:.LANCHOR28]
+.L2147:
+	adrp	x1, .LANCHOR27
+	ldrb	w1, [x1, #:lo12:.LANCHOR27]
 	cmp	w1, 9
-	bne	.L2199
-.L2292:
+	bne	.L2149
+.L2242:
 	str	w0, [x29, 208]
 	mov	w0, 61424
 	str	w0, [x29, 212]
 	ldrh	w0, [x27, w4, sxtw 1]
-	cbnz	w2, .L2201
+	cbnz	w2, .L2151
 	mov	w4, w0
-.L2202:
+.L2152:
 	mul	w0, w24, w4
-	cbnz	x25, .L2203
+	cbnz	x25, .L2153
 	str	w4, [x29, 152]
 	add	x2, x29, 208
 	mov	x1, x23
 	add	w0, w0, w26
-	bl	fw_flash_page_prog.constprop.30
+	bl	fw_flash_page_prog.constprop.29
 	ldr	x0, [x29, 144]
 	ldr	w4, [x29, 152]
 	ldrb	w0, [x0]
-	cbnz	w0, .L2204
+	cbnz	w0, .L2154
 	udiv	w1, w26, w24
 	add	w2, w4, 1
 	bl	id_block_prog_msb_ff_data
-.L2204:
+.L2154:
 	ldr	w0, [x29, 196]
 	add	x23, x23, 2048
 	add	w0, w0, 16
 	cmp	w28, w0
-	bcc	.L2205
+	bcc	.L2155
 	ldr	w0, [x29, 196]
 	add	w1, w0, 20
 	add	x0, x21, 2048
 	cmp	w28, w1
 	csel	x23, x0, x23, cc
-.L2205:
+.L2155:
 	add	w5, w28, 4
 	mov	x25, 0
 	and	w28, w5, 65535
-	b	.L2195
-.L2199:
+	b	.L2145
+.L2149:
 	sub	w0, w0, #1
 	lsl	w0, w0, 2
-	b	.L2292
-.L2201:
+	b	.L2242
+.L2151:
 	adrp	x0, .LANCHOR1
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w4, 1
 	cmp	w1, 0
 	csel	w4, w0, w4, ne
-	b	.L2202
-.L2203:
+	b	.L2152
+.L2153:
 	add	x2, x29, 208
 	mov	x1, x25
 	add	w0, w0, w26
-	bl	fw_flash_page_prog.constprop.30
-	b	.L2205
-.L2221:
+	bl	fw_flash_page_prog.constprop.29
+	b	.L2155
+.L2171:
 	ldr	w0, [x29, 160]
-	adrp	x1, .LANCHOR19
+	adrp	x1, .LANCHOR24
 	sub	w27, w24, w0
 	ldr	w0, [x29, 168]
-	ldrb	w1, [x1, #:lo12:.LANCHOR19]
+	ldrb	w1, [x1, #:lo12:.LANCHOR24]
 	and	w27, w27, 65535
 	add	w22, w0, w25
 	ldr	x0, [x29, 112]
 	udiv	w22, w22, w24
 	and	w22, w22, 65535
 	ldrh	w0, [x0, w22, sxtw 1]
-	cbnz	w1, .L2208
+	cbnz	w1, .L2158
 	mov	w22, w0
-.L2209:
-	adrp	x0, .LANCHOR17
+.L2159:
+	adrp	x0, .LANCHOR22
 	ldr	w1, [x29, 152]
-	ldrb	w26, [x0, #:lo12:.LANCHOR17]
+	ldrb	w26, [x0, #:lo12:.LANCHOR22]
 	ldr	w0, [x29, 160]
 	add	w0, w0, w1
 	ldr	w1, [x29, 144]
 	madd	w22, w1, w22, w0
-	adrp	x0, .LANCHOR33+9
-	ldrb	w0, [x0, #:lo12:.LANCHOR33+9]
+	adrp	x0, .LANCHOR32+9
+	ldrb	w0, [x0, #:lo12:.LANCHOR32+9]
 	udiv	w22, w22, w0
-	adrp	x0, .LANCHOR50
-	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	adrp	x0, .LANCHOR49
+	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	str	w0, [x29, 132]
 	mov	w0, w26
 	bl	nandc_bch_sel
-	adrp	x0, .LANCHOR21
-	add	x0, x0, :lo12:.LANCHOR21
+	adrp	x0, .LANCHOR26
+	add	x0, x0, :lo12:.LANCHOR26
 	str	x0, [x29, 120]
-.L2210:
+.L2160:
 	mov	w4, w24
 	add	x3, x29, 208
 	mov	x2, x23
@@ -13662,33 +13480,33 @@ idb_write_data:
 	bl	flash_read_page
 	mov	w5, w0
 	cmn	w0, #1
-	bne	.L2211
+	bne	.L2161
 	ldr	x0, [x29, 184]
 	ldrb	w6, [x0]
-	cbnz	w6, .L2212
-.L2215:
-	adrp	x0, .LANCHOR174
-	ldr	x6, [x0, #:lo12:.LANCHOR174]
-	cbnz	x6, .L2213
-.L2214:
+	cbnz	w6, .L2162
+.L2165:
+	adrp	x0, .LANCHOR171
+	ldr	x6, [x0, #:lo12:.LANCHOR171]
+	cbnz	x6, .L2163
+.L2164:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
-	cbz	w0, .L2211
+	cbz	w0, .L2161
 	mov	w4, w24
 	add	x3, x29, 208
 	mov	x2, x23
 	mov	w1, w22
 	mov	w0, 0
 	bl	flash_ddr_tuning_read
-	b	.L2293
-.L2208:
+	b	.L2243
+.L2158:
 	adrp	x0, .LANCHOR1
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w22, 1
 	cmp	w1, 0
 	csel	w22, w0, w22, ne
-	b	.L2209
-.L2212:
+	b	.L2159
+.L2162:
 	ldr	x0, [x29, 184]
 	mov	w1, w22
 	stp	w6, w5, [x29, 104]
@@ -13702,21 +13520,21 @@ idb_write_data:
 	ldr	x1, [x29, 184]
 	ldp	w6, w5, [x29, 104]
 	strb	w6, [x1]
-	beq	.L2215
-.L2293:
+	beq	.L2165
+.L2243:
 	mov	w5, w0
-.L2211:
+.L2161:
 	cmn	w5, #1
 	cset	w4, eq
 	cmp	w26, 16
 	cset	w0, ne
 	tst	w4, w0
-	beq	.L2217
+	beq	.L2167
 	mov	w0, 16
 	mov	w26, 16
 	bl	nandc_bch_sel
-	b	.L2210
-.L2213:
+	b	.L2160
+.L2163:
 	str	w5, [x29, 108]
 	mov	w4, w24
 	add	x3, x29, 208
@@ -13726,9 +13544,9 @@ idb_write_data:
 	blr	x6
 	cmn	w0, #1
 	ldr	w5, [x29, 108]
-	beq	.L2214
-	b	.L2293
-.L2217:
+	beq	.L2164
+	b	.L2243
+.L2167:
 	ldr	w0, [x29, 132]
 	bl	nandc_bch_sel
 	cmp	w4, 0
@@ -13736,95 +13554,95 @@ idb_write_data:
 	csinv	w28, w28, wzr, eq
 	cmp	w25, 0
 	ccmp	w19, w0, 0, eq
-	bne	.L2219
-	cbnz	w28, .L2219
+	bne	.L2169
+	cbnz	w28, .L2169
 	ldr	w1, [x23]
 	mov	w0, 18766
 	movk	w0, 0x464e, lsl 16
 	cmp	w1, w0
-	bne	.L2219
+	bne	.L2169
 	ldr	w0, [x29, 156]
 	ldrb	w24, [x23, 17]
 	add	w0, w0, w27
 	str	w0, [x29, 156]
-.L2220:
+.L2170:
 	add	w25, w27, w25
 	and	w25, w25, 65535
-	b	.L2207
-.L2219:
+	b	.L2157
+.L2169:
 	ubfiz	x0, x27, 9, 16
 	str	wzr, [x29, 160]
 	add	x23, x23, x0
-	b	.L2220
-.L2224:
+	b	.L2170
+.L2174:
 	ldr	w4, [x0, x2, lsl 2]
 	add	x2, x2, 1
 	add	x3, x21, x2, lsl 2
 	ldr	w3, [x3, -4]
 	cmp	w4, w3
-	beq	.L2223
+	beq	.L2173
 	mov	w2, 512
 	mov	w1, 0
 	bl	ftl_memset
 	mov	w1, w22
-	adrp	x0, .LC136
-	add	x0, x0, :lo12:.LC136
+	adrp	x0, .LC133
+	add	x0, x0, :lo12:.LC133
 	bl	printf
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_erase_block
-.L2188:
+.L2138:
 	ldr	w0, [x29, 192]
 	add	w0, w0, 1
 	str	w0, [x29, 192]
 	cmp	w0, 4
-	bne	.L2226
-.L2233:
+	bne	.L2176
+.L2183:
 	mov	w0, 0
 	bl	zftl_flash_exit_slc_mode
 	adrp	x0, .LANCHOR0
 	ldrb	w1, [x29, 176]
 	strb	w1, [x0, #:lo12:.LANCHOR0]
 	ldr	w0, [x29, 200]
-	cbz	w0, .L2227
-	adrp	x0, .LANCHOR19
+	cbz	w0, .L2177
+	adrp	x0, .LANCHOR24
 	ldrb	w1, [x29, 204]
-	strb	w1, [x0, #:lo12:.LANCHOR19]
-.L2227:
+	strb	w1, [x0, #:lo12:.LANCHOR24]
+.L2177:
 	mov	w1, 2
-	adrp	x0, .LANCHOR34
-	strb	w1, [x0, #:lo12:.LANCHOR34]
+	adrp	x0, .LANCHOR33
+	strb	w1, [x0, #:lo12:.LANCHOR33]
 	mov	w0, 0
 	bl	zftl_flash_enter_slc_mode
 	ldr	w0, [x29, 180]
-	cbnz	w0, .L2179
-	adrp	x0, .LC137
+	cbnz	w0, .L2129
+	adrp	x0, .LC134
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC137
+	add	x0, x0, :lo12:.LC134
 	bl	printf
+.L2129:
+	adrp	x0, .LANCHOR139
+	adrp	x19, .LANCHOR138
+	str	wzr, [x0, #:lo12:.LANCHOR139]
+	adrp	x0, .LANCHOR140
+	strb	wzr, [x0, #:lo12:.LANCHOR140]
+	ldr	x0, [x19, #:lo12:.LANCHOR138]
+	cbz	x0, .L2179
+	bl	free
+	str	xzr, [x19, #:lo12:.LANCHOR138]
 .L2179:
-	adrp	x0, .LANCHOR142
 	adrp	x19, .LANCHOR141
-	str	wzr, [x0, #:lo12:.LANCHOR142]
-	adrp	x0, .LANCHOR143
-	strb	wzr, [x0, #:lo12:.LANCHOR143]
 	ldr	x0, [x19, #:lo12:.LANCHOR141]
-	cbz	x0, .L2229
+	cbz	x0, .L2181
 	bl	free
 	str	xzr, [x19, #:lo12:.LANCHOR141]
-.L2229:
-	adrp	x19, .LANCHOR144
-	ldr	x0, [x19, #:lo12:.LANCHOR144]
-	cbz	x0, .L2231
-	bl	free
-	str	xzr, [x19, #:lo12:.LANCHOR144]
-.L2231:
-	adrp	x0, .LANCHOR177
+.L2181:
+	adrp	x0, .LANCHOR174
 	ldr	w1, [x29, 140]
-	str	w1, [x0, #:lo12:.LANCHOR177]
-.L2235:
+	str	w1, [x0, #:lo12:.LANCHOR174]
+.L2185:
 	mov	w0, 0
-.L2166:
+.L2116:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -13842,43 +13660,43 @@ flash_start_tlc_page_prog:
 	add	x29, sp, 0
 	stp	x25, x26, [sp, 64]
 	and	w25, w0, 255
-	adrp	x0, .LANCHOR18
+	adrp	x0, .LANCHOR23
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	and	w21, w1, 255
 	stp	x23, x24, [sp, 48]
 	and	w26, w3, 255
-	ldrb	w1, [x0, #:lo12:.LANCHOR18]
+	ldrb	w1, [x0, #:lo12:.LANCHOR23]
 	and	w22, w2, 255
 	mov	w20, w4
 	mov	x23, x5
 	mov	x24, x6
 	cmp	w1, w26
 	mov	x19, x0
-	bhi	.L2296
-	adrp	x1, .LANCHOR178
+	bhi	.L2246
+	adrp	x1, .LANCHOR175
 	adrp	x0, .LC0
-	mov	w2, 859
-	add	x1, x1, :lo12:.LANCHOR178
+	mov	w2, 868
+	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2296:
-	ldrb	w0, [x19, #:lo12:.LANCHOR18]
+.L2246:
+	ldrb	w0, [x19, #:lo12:.LANCHOR23]
 	cmp	w0, w26
-	bls	.L2295
-	adrp	x0, .LANCHOR30
-	add	x0, x0, :lo12:.LANCHOR30
+	bls	.L2245
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w5, [x0, w26, sxtw]
-	adrp	x0, .LANCHOR13
-	ldr	x19, [x0, #:lo12:.LANCHOR13]
+	adrp	x0, .LANCHOR7
+	ldr	x19, [x0, #:lo12:.LANCHOR7]
 	mov	w0, w5
 	bl	nandc_cs
-	cbz	w25, .L2298
+	cbz	w25, .L2248
 	sxtw	x0, w5
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 8
 	str	w25, [x0, 8]
-.L2298:
+.L2248:
 	ubfiz	x0, x5, 8, 8
 	add	x19, x19, x0
 	mov	w0, 128
@@ -13896,11 +13714,11 @@ flash_start_tlc_page_prog:
 	sub	w0, w20, #1
 	add	w0, w0, w21
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR33+9
+	adrp	x0, .LANCHOR32+9
 	mov	x4, x24
 	mov	x3, x23
 	mov	w1, 1
-	ldrb	w2, [x0, #:lo12:.LANCHOR33+9]
+	ldrb	w2, [x0, #:lo12:.LANCHOR32+9]
 	mov	w0, w5
 	bl	nandc_xfer
 	ldp	x23, x24, [sp, 48]
@@ -13909,8 +13727,8 @@ flash_start_tlc_page_prog:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 80
-	b	nandc_de_cs.constprop.33
-.L2295:
+	b	nandc_de_cs.constprop.32
+.L2245:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -13928,25 +13746,25 @@ queue_tlc_prog_cmd:
 	stp	x21, x22, [sp, 32]
 	mov	x21, x0
 	ldr	x7, [x0]
-	adrp	x0, .LANCHOR32
+	adrp	x0, .LANCHOR31
 	mov	w22, 1
 	stp	x19, x20, [sp, 16]
-	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
 	str	x23, [sp, 48]
 	mov	w23, w1
 	sub	w2, w2, w0
 	ldr	w1, [x7, 40]
 	lsl	w19, w22, w0
-	adrp	x0, .LANCHOR37
+	adrp	x0, .LANCHOR36
 	lsl	w20, w22, w2
 	sub	w19, w19, #1
-	ldrb	w0, [x0, #:lo12:.LANCHOR37]
+	ldrb	w0, [x0, #:lo12:.LANCHOR36]
 	sub	w20, w20, #1
 	and	w20, w20, w1
 	lsr	w1, w1, w2
 	and	w19, w19, w1
 	and	w19, w19, 255
-	cbz	w0, .L2304
+	cbz	w0, .L2254
 	mov	w0, w19
 	bl	zftl_flash_exit_slc_mode
 	ldr	x0, [x21]
@@ -13978,8 +13796,8 @@ queue_tlc_prog_cmd:
 	ldr	x6, [x0, 24]
 	mov	w0, 0
 	bl	flash_start_one_pass_page_prog
-.L2305:
-	cbz	w23, .L2303
+.L2255:
+	cbz	w23, .L2253
 	ldr	x1, [x21]
 	mov	w0, 4
 	strb	w0, [x1, 58]
@@ -13987,14 +13805,14 @@ queue_tlc_prog_cmd:
 	strb	w0, [x1, 59]
 	mov	w0, -1
 	strb	w0, [x1]
-	adrp	x0, .LANCHOR60
-	add	x0, x0, :lo12:.LANCHOR60
+	adrp	x0, .LANCHOR59
+	add	x0, x0, :lo12:.LANCHOR59
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	b	buf_add_tail
-.L2304:
+.L2254:
 	ldr	x5, [x7, 8]
 	mov	w4, w20
 	ldr	x6, [x7, 24]
@@ -14024,8 +13842,8 @@ queue_tlc_prog_cmd:
 	ldr	x6, [x0, 24]
 	ldrb	w0, [x7, 60]
 	bl	flash_start_tlc_page_prog
-	b	.L2305
-.L2303:
+	b	.L2255
+.L2253:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
@@ -14043,22 +13861,22 @@ sblk_3d_tlc_dump_prog:
 	stp	x19, x20, [sp, 16]
 	mov	x20, x0
 	ldr	w1, [x0, 40]
-	adrp	x0, .LANCHOR32
+	adrp	x0, .LANCHOR31
 	stp	x21, x22, [sp, 32]
 	mov	w22, 1
-	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
 	sub	w2, w2, w0
 	lsl	w19, w22, w0
-	adrp	x0, .LANCHOR37
+	adrp	x0, .LANCHOR36
 	lsl	w21, w22, w2
 	sub	w19, w19, #1
-	ldrb	w0, [x0, #:lo12:.LANCHOR37]
+	ldrb	w0, [x0, #:lo12:.LANCHOR36]
 	sub	w21, w21, #1
 	and	w21, w21, w1
 	lsr	w1, w1, w2
 	and	w19, w19, w1
 	and	w19, w19, 255
-	cbz	w0, .L2309
+	cbz	w0, .L2259
 	mov	w0, w19
 	bl	zftl_flash_exit_slc_mode
 	ldr	x5, [x20, 8]
@@ -14087,7 +13905,7 @@ sblk_3d_tlc_dump_prog:
 	mov	w1, w22
 	mov	w0, 0
 	bl	flash_start_one_pass_page_prog
-.L2310:
+.L2260:
 	bl	nandc_wait_flash_ready
 	ldr	w0, [x20, 40]
 	mov	w1, 64
@@ -14095,7 +13913,7 @@ sblk_3d_tlc_dump_prog:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	b	flash_wait_device_ready
-.L2309:
+.L2259:
 	ldr	x5, [x20, 8]
 	mov	w4, w21
 	ldr	x6, [x20, 24]
@@ -14122,7 +13940,7 @@ sblk_3d_tlc_dump_prog:
 	mov	w1, 3
 	mov	w0, 0
 	bl	flash_start_tlc_page_prog
-	b	.L2310
+	b	.L2260
 	.size	sblk_3d_tlc_dump_prog, .-sblk_3d_tlc_dump_prog
 	.section	.text.flash_start_3d_mlc_page_prog,"ax",@progbits
 	.align	2
@@ -14133,32 +13951,32 @@ flash_start_3d_mlc_page_prog:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	and	w21, w0, 255
-	adrp	x0, .LANCHOR18
+	adrp	x0, .LANCHOR23
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	and	w24, w1, 255
-	ldrb	w1, [x0, #:lo12:.LANCHOR18]
+	ldrb	w1, [x0, #:lo12:.LANCHOR23]
 	mov	w20, w2
 	mov	x22, x3
 	mov	x23, x4
 	cmp	w1, w24
 	mov	x19, x0
-	bhi	.L2313
-	adrp	x1, .LANCHOR179
+	bhi	.L2263
+	adrp	x1, .LANCHOR176
 	adrp	x0, .LC0
-	mov	w2, 892
-	add	x1, x1, :lo12:.LANCHOR179
+	mov	w2, 903
+	add	x1, x1, :lo12:.LANCHOR176
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2313:
-	ldrb	w0, [x19, #:lo12:.LANCHOR18]
+.L2263:
+	ldrb	w0, [x19, #:lo12:.LANCHOR23]
 	cmp	w0, w24
-	bls	.L2312
-	adrp	x0, .LANCHOR30
-	add	x0, x0, :lo12:.LANCHOR30
+	bls	.L2262
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w5, [x0, w24, sxtw]
-	adrp	x0, .LANCHOR13
-	ldr	x19, [x0, #:lo12:.LANCHOR13]
+	adrp	x0, .LANCHOR7
+	ldr	x19, [x0, #:lo12:.LANCHOR7]
 	mov	w0, w5
 	bl	nandc_cs
 	ubfiz	x0, x5, 8, 8
@@ -14175,15 +13993,15 @@ flash_start_3d_mlc_page_prog:
 	str	w0, [x19, 2052]
 	mov	w0, w20
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR33+9
+	adrp	x0, .LANCHOR32+9
 	mov	x4, x23
 	mov	x3, x22
 	mov	w1, 1
-	ldrb	w2, [x0, #:lo12:.LANCHOR33+9]
+	ldrb	w2, [x0, #:lo12:.LANCHOR32+9]
 	mov	w0, w5
 	bl	nandc_xfer
 	str	w21, [x19, 2056]
-.L2312:
+.L2262:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -14201,9 +14019,9 @@ sblk_mlc_dump_prog:
 	stp	x19, x20, [sp, 16]
 	mov	x20, x0
 	ldr	w1, [x0, 40]
-	adrp	x0, .LANCHOR32
+	adrp	x0, .LANCHOR31
 	str	x21, [sp, 32]
-	ldrb	w19, [x0, #:lo12:.LANCHOR32]
+	ldrb	w19, [x0, #:lo12:.LANCHOR31]
 	mov	w0, 1
 	sub	w2, w2, w19
 	lsl	w19, w0, w19
@@ -14216,16 +14034,16 @@ sblk_mlc_dump_prog:
 	and	w19, w19, 255
 	mov	w0, w19
 	bl	zftl_flash_exit_slc_mode
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2317
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L2267
 	ldr	w2, [x20, 40]
-	adrp	x0, .LC138
+	adrp	x0, .LC135
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC138
+	add	x0, x0, :lo12:.LC135
 	add	w3, w2, 1
 	bl	printf
-.L2317:
+.L2267:
 	ldr	x3, [x20, 8]
 	mov	w2, w21
 	ldr	x4, [x20, 24]
@@ -14244,7 +14062,7 @@ sblk_mlc_dump_prog:
 	mov	w1, 64
 	bl	flash_wait_device_ready
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.33
+	bl	nandc_de_cs.constprop.32
 	ldr	x21, [sp, 32]
 	mov	w0, w2
 	ldp	x19, x20, [sp, 16]
@@ -14260,68 +14078,68 @@ flash_start_page_prog:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	and	w21, w0, 255
-	adrp	x0, .LANCHOR32
+	adrp	x0, .LANCHOR31
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
 	mov	w19, 24
-	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
 	mov	w20, 1
 	str	x27, [sp, 80]
-	adrp	x27, .LANCHOR18
+	adrp	x27, .LANCHOR23
 	sub	w25, w19, w0
 	stp	x23, x24, [sp, 48]
 	lsl	w20, w20, w0
 	sub	w20, w20, #1
 	lsr	w0, w1, w25
 	and	w20, w20, w0
-	ldrb	w0, [x27, #:lo12:.LANCHOR18]
+	ldrb	w0, [x27, #:lo12:.LANCHOR23]
 	and	w20, w20, 255
 	mov	w24, w1
 	mov	x22, x2
 	mov	x23, x3
 	cmp	w0, w20
-	bhi	.L2323
-	adrp	x1, .LANCHOR180
+	bhi	.L2273
+	adrp	x1, .LANCHOR177
 	adrp	x0, .LC0
-	mov	w2, 945
-	add	x1, x1, :lo12:.LANCHOR180
+	mov	w2, 956
+	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2323:
-	ldrb	w0, [x27, #:lo12:.LANCHOR18]
+.L2273:
+	ldrb	w0, [x27, #:lo12:.LANCHOR23]
 	cmp	w0, w20
-	bls	.L2322
-	adrp	x0, .LANCHOR30
-	add	x0, x0, :lo12:.LANCHOR30
+	bls	.L2272
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
 	mov	w19, 1
 	lsl	w19, w19, w25
 	sub	w19, w19, #1
 	ldrb	w26, [x0, w20, sxtw]
-	adrp	x0, .LANCHOR13
+	adrp	x0, .LANCHOR7
 	and	w19, w19, w24
-	ldr	x25, [x0, #:lo12:.LANCHOR13]
+	ldr	x25, [x0, #:lo12:.LANCHOR7]
 	bl	nandc_rdy_status
-	cbnz	w0, .L2325
-	ldrb	w0, [x27, #:lo12:.LANCHOR18]
+	cbnz	w0, .L2275
+	ldrb	w0, [x27, #:lo12:.LANCHOR23]
 	cmp	w0, 1
-	bne	.L2326
+	bne	.L2276
 	bl	nandc_wait_flash_ready
-.L2325:
+.L2275:
 	mov	w0, w26
 	bl	hynix_reconfig_rr_para
 	mov	w0, w26
 	bl	nandc_cs
 	tst	x24, 50331648
-	bne	.L2327
+	bne	.L2277
 	mov	w0, w19
 	bl	slc_phy_page_address_calc
 	mov	w19, w0
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L2328
+	cbz	w0, .L2278
 	mov	w0, w26
 	bl	zftl_flash_enter_slc_mode
-.L2328:
+.L2278:
 	ubfiz	x20, x26, 8, 8
 	mov	w0, 128
 	add	x20, x25, x20
@@ -14334,19 +14152,19 @@ flash_start_page_prog:
 	str	w0, [x20, 2052]
 	lsr	w0, w19, 16
 	str	w0, [x20, 2052]
-	adrp	x0, .LANCHOR31
-	ldrb	w0, [x0, #:lo12:.LANCHOR31]
-	cbz	w0, .L2329
+	adrp	x0, .LANCHOR30
+	ldrb	w0, [x0, #:lo12:.LANCHOR30]
+	cbz	w0, .L2279
 	lsr	w0, w19, 24
 	str	w0, [x20, 2052]
-.L2329:
+.L2279:
 	mov	w0, w19
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR33+9
+	adrp	x0, .LANCHOR32+9
 	mov	x4, x23
 	mov	x3, x22
 	mov	w1, 1
-	ldrb	w2, [x0, #:lo12:.LANCHOR33+9]
+	ldrb	w2, [x0, #:lo12:.LANCHOR32+9]
 	mov	w0, w26
 	bl	nandc_xfer
 	ldr	x27, [sp, 80]
@@ -14356,18 +14174,18 @@ flash_start_page_prog:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 96
-	b	nandc_de_cs.constprop.33
-.L2326:
+	b	nandc_de_cs.constprop.32
+.L2276:
 	mov	w2, 64
 	mov	w1, w19
 	mov	w0, w20
 	bl	flash_wait_device_ready_raw
-	b	.L2325
-.L2327:
+	b	.L2275
+.L2277:
 	mov	w0, w26
 	bl	zftl_flash_exit_slc_mode
-	b	.L2328
-.L2322:
+	b	.L2278
+.L2272:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -14389,16 +14207,16 @@ queue_prog_cmd:
 	mov	x19, x0
 	mov	w0, 16
 	bl	flash_start_page_prog
-	adrp	x0, .LANCHOR60
+	adrp	x0, .LANCHOR59
 	ldr	w3, [x19, 40]
-	ldrb	w1, [x0, #:lo12:.LANCHOR60]
+	ldrb	w1, [x0, #:lo12:.LANCHOR59]
 	cmp	w1, 255
-	beq	.L2338
-	adrp	x2, .LANCHOR32
+	beq	.L2288
+	adrp	x2, .LANCHOR31
 	mov	w5, 24
-	adrp	x6, .LANCHOR56
-	add	x6, x6, :lo12:.LANCHOR56
-	ldrb	w4, [x2, #:lo12:.LANCHOR32]
+	adrp	x6, .LANCHOR55
+	add	x6, x6, :lo12:.LANCHOR55
+	ldrb	w4, [x2, #:lo12:.LANCHOR31]
 	mov	w2, 1
 	mov	x8, x6
 	sub	w5, w5, w4
@@ -14407,19 +14225,19 @@ queue_prog_cmd:
 	and	w2, w2, 65535
 	asr	w3, w3, w5
 	and	w3, w3, w2
-.L2340:
+.L2290:
 	add	x7, x6, x1, lsl 6
 	ldr	w4, [x7, 40]
 	lsr	w4, w4, w5
 	and	w4, w2, w4
 	cmp	w3, w4
-	bne	.L2339
+	bne	.L2289
 	ldrb	w4, [x7, 58]
 	cmp	w4, 7
-	bne	.L2339
+	bne	.L2289
 	mov	w1, 3
 	strb	w1, [x7, 58]
-.L2338:
+.L2288:
 	mov	w1, 3
 	strb	w1, [x19, 58]
 	mov	w1, 1
@@ -14427,16 +14245,16 @@ queue_prog_cmd:
 	mov	w1, -1
 	strb	w1, [x19]
 	mov	x1, x19
-	add	x0, x0, :lo12:.LANCHOR60
+	add	x0, x0, :lo12:.LANCHOR59
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	buf_add_tail
-.L2339:
+.L2289:
 	lsl	x1, x1, 6
 	ldrb	w1, [x8, x1]
 	cmp	w1, 255
-	bne	.L2340
-	b	.L2338
+	bne	.L2290
+	b	.L2288
 	.size	queue_prog_cmd, .-queue_prog_cmd
 	.section	.text.flash_complete_plane_page_read,"ax",@progbits
 	.align	2
@@ -14448,11 +14266,11 @@ flash_complete_plane_page_read:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	mov	w24, w0
-	adrp	x0, .LANCHOR32
+	adrp	x0, .LANCHOR31
 	stp	x21, x22, [sp, 32]
 	stp	x19, x20, [sp, 16]
 	mov	w19, 1
-	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
 	mov	x20, x1
 	mov	x21, x2
 	sub	w22, w4, w0
@@ -14460,128 +14278,128 @@ flash_complete_plane_page_read:
 	sub	w19, w19, #1
 	lsr	w0, w24, w22
 	and	w19, w19, w0
-	adrp	x0, .LANCHOR18
+	adrp	x0, .LANCHOR23
 	and	w19, w19, 255
 	mov	x23, x0
-	ldrb	w1, [x0, #:lo12:.LANCHOR18]
+	ldrb	w1, [x0, #:lo12:.LANCHOR23]
 	cmp	w1, w19
-	bhi	.L2347
-	adrp	x1, .LANCHOR181
+	bhi	.L2297
+	adrp	x1, .LANCHOR178
 	adrp	x0, .LC0
-	mov	w2, 1055
-	add	x1, x1, :lo12:.LANCHOR181
+	mov	w2, 1070
+	add	x1, x1, :lo12:.LANCHOR178
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2347:
-	ldrb	w0, [x23, #:lo12:.LANCHOR18]
+.L2297:
+	ldrb	w0, [x23, #:lo12:.LANCHOR23]
 	cmp	w0, w19
-	bls	.L2358
-	adrp	x2, .LANCHOR30
-	add	x2, x2, :lo12:.LANCHOR30
-	adrp	x0, .LANCHOR13
+	bls	.L2308
+	adrp	x2, .LANCHOR29
+	add	x2, x2, :lo12:.LANCHOR29
+	adrp	x0, .LANCHOR7
 	mov	w4, 1
 	lsl	w4, w4, w22
 	sub	w4, w4, #1
 	ldrb	w8, [x2, w19, sxtw]
 	and	w4, w4, w24
-	ldr	x7, [x0, #:lo12:.LANCHOR13]
+	ldr	x7, [x0, #:lo12:.LANCHOR7]
 	ubfx	x24, x24, 24, 2
 	mov	w0, w8
 	bl	nandc_cs
-	cbnz	w24, .L2349
+	cbnz	w24, .L2299
 	mov	w0, w4
 	bl	slc_phy_page_address_calc
 	mov	w4, w0
-.L2349:
-	adrp	x0, .LANCHOR20+16
+.L2299:
+	adrp	x0, .LANCHOR25+16
 	and	x1, x8, 255
 	and	w6, w4, 255
 	lsr	w5, w4, 8
-	ldrb	w0, [x0, #:lo12:.LANCHOR20+16]
+	ldrb	w0, [x0, #:lo12:.LANCHOR25+16]
 	lsr	w3, w4, 16
-	adrp	x2, .LANCHOR31
+	adrp	x2, .LANCHOR30
 	cmp	w0, 1
-	adrp	x0, .LANCHOR16
-	bne	.L2350
+	adrp	x0, .LANCHOR21
+	bne	.L2300
 	add	x1, x7, x1, lsl 8
 	mov	w7, 6
-.L2376:
+.L2326:
 	str	w7, [x1, 2056]
 	str	wzr, [x1, 2052]
 	str	wzr, [x1, 2052]
 	str	w6, [x1, 2052]
 	str	w5, [x1, 2052]
 	str	w3, [x1, 2052]
-	ldrb	w2, [x2, #:lo12:.LANCHOR31]
-	cbz	w2, .L2372
+	ldrb	w2, [x2, #:lo12:.LANCHOR30]
+	cbz	w2, .L2322
 	lsr	w2, w4, 24
 	str	w2, [x1, 2052]
-.L2372:
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L2322:
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	mov	w2, 224
 	str	w2, [x1, 2056]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L2356
-	cbz	w24, .L2356
+	bne	.L2306
+	cbz	w24, .L2306
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbnz	w0, .L2306
 	adrp	x0, .LANCHOR36
 	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbnz	w0, .L2356
-	adrp	x0, .LANCHOR37
-	ldrb	w0, [x0, #:lo12:.LANCHOR37]
-	cbnz	w0, .L2356
+	cbnz	w0, .L2306
 	add	w4, w4, w4, lsl 1
 	sub	w0, w24, #1
 	add	w0, w4, w0
-.L2373:
+.L2323:
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR33+9
+	adrp	x0, .LANCHOR32+9
 	mov	x4, x21
 	mov	x3, x20
 	mov	w1, 0
-	ldrb	w2, [x0, #:lo12:.LANCHOR33+9]
+	ldrb	w2, [x0, #:lo12:.LANCHOR32+9]
 	mov	w0, w8
 	bl	nandc_xfer
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.33
+	bl	nandc_de_cs.constprop.32
 	mov	w0, w2
-.L2346:
+.L2296:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2350:
-	ldr	x10, [x0, #:lo12:.LANCHOR16]
+.L2300:
+	ldr	x10, [x0, #:lo12:.LANCHOR21]
 	add	x1, x7, x1, lsl 8
 	ldrb	w10, [x10, 12]
 	cmp	w10, 3
-	bne	.L2353
+	bne	.L2303
 	mov	w7, 5
-	b	.L2376
-.L2353:
+	b	.L2326
+.L2303:
 	str	wzr, [x1, 2056]
 	str	wzr, [x1, 2052]
 	str	wzr, [x1, 2052]
 	str	w6, [x1, 2052]
-	ldrb	w2, [x2, #:lo12:.LANCHOR31]
+	ldrb	w2, [x2, #:lo12:.LANCHOR30]
 	str	w5, [x1, 2052]
 	str	w3, [x1, 2052]
-	cbz	w2, .L2355
+	cbz	w2, .L2305
 	lsr	w2, w4, 24
 	str	w2, [x1, 2052]
-.L2355:
+.L2305:
 	mov	w2, 5
 	str	w2, [x1, 2056]
 	str	wzr, [x1, 2052]
 	str	wzr, [x1, 2052]
-	b	.L2372
-.L2356:
+	b	.L2322
+.L2306:
 	mov	w0, w4
-	b	.L2373
-.L2358:
+	b	.L2323
+.L2308:
 	mov	w0, -1
-	b	.L2346
+	b	.L2296
 	.size	flash_complete_plane_page_read, .-flash_complete_plane_page_read
 	.section	.text.flash_complete_page_read,"ax",@progbits
 	.align	2
@@ -14592,11 +14410,11 @@ flash_complete_page_read:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	mov	w21, w0
-	adrp	x0, .LANCHOR32
+	adrp	x0, .LANCHOR31
 	stp	x19, x20, [sp, 16]
 	mov	x22, x1
 	mov	w1, 24
-	ldrb	w20, [x0, #:lo12:.LANCHOR32]
+	ldrb	w20, [x0, #:lo12:.LANCHOR31]
 	mov	w0, 1
 	stp	x23, x24, [sp, 48]
 	mov	x23, x2
@@ -14605,73 +14423,73 @@ flash_complete_page_read:
 	lsl	w20, w0, w20
 	sub	w20, w20, #1
 	lsl	w19, w0, w1
-	adrp	x0, .LANCHOR18
+	adrp	x0, .LANCHOR23
 	lsr	w1, w21, w1
 	stp	x27, x28, [sp, 80]
 	and	w20, w20, w1
-	ldrb	w0, [x0, #:lo12:.LANCHOR18]
+	ldrb	w0, [x0, #:lo12:.LANCHOR23]
 	sub	w19, w19, #1
 	and	w20, w20, 255
 	and	w19, w19, w21
 	ubfx	x24, x21, 24, 2
 	cmp	w0, w20
-	bhi	.L2378
-	adrp	x1, .LANCHOR182
+	bhi	.L2328
+	adrp	x1, .LANCHOR179
 	adrp	x0, .LC0
-	mov	w2, 1212
-	add	x1, x1, :lo12:.LANCHOR182
+	mov	w2, 1232
+	add	x1, x1, :lo12:.LANCHOR179
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2378:
-	adrp	x0, .LANCHOR30
-	add	x0, x0, :lo12:.LANCHOR30
+.L2328:
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w25, [x0, w20, sxtw]
-	adrp	x0, .LANCHOR13
-	ldr	x4, [x0, #:lo12:.LANCHOR13]
+	adrp	x0, .LANCHOR7
+	ldr	x4, [x0, #:lo12:.LANCHOR7]
 	mov	w0, w25
 	bl	nandc_cs
-	cbnz	w24, .L2379
+	cbnz	w24, .L2329
 	mov	w0, w19
 	bl	slc_phy_page_address_calc
 	mov	w19, w0
-.L2379:
+.L2329:
+	adrp	x20, .LANCHOR32
+	add	x0, x20, :lo12:.LANCHOR32
+	ldrb	w0, [x0, 12]
+	cmp	w0, 3
+	bne	.L2330
 	ubfiz	x0, x25, 8, 8
 	mov	w1, 5
 	add	x0, x4, x0
-	adrp	x20, .LANCHOR33
 	str	w1, [x0, 2056]
-	add	x1, x20, :lo12:.LANCHOR33
+	and	w1, w19, 255
 	str	wzr, [x0, 2052]
 	str	wzr, [x0, 2052]
-	ldrb	w1, [x1, 12]
-	cmp	w1, 3
-	bne	.L2380
-	and	w1, w19, 255
 	str	w1, [x0, 2052]
 	lsr	w1, w19, 8
 	str	w1, [x0, 2052]
 	lsr	w1, w19, 16
 	str	w1, [x0, 2052]
-.L2380:
 	mov	w1, 224
 	str	w1, [x0, 2056]
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L2330:
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L2381
-	cbz	w24, .L2381
+	bne	.L2331
+	cbz	w24, .L2331
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbnz	w0, .L2331
 	adrp	x0, .LANCHOR36
 	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbnz	w0, .L2381
-	adrp	x0, .LANCHOR37
-	ldrb	w0, [x0, #:lo12:.LANCHOR37]
-	cbnz	w0, .L2381
+	cbnz	w0, .L2331
 	sub	w0, w24, #1
 	add	w1, w19, w19, lsl 1
 	add	w0, w0, w1
-.L2408:
-	add	x28, x20, :lo12:.LANCHOR33
+.L2358:
+	add	x28, x20, :lo12:.LANCHOR32
 	bl	nandc_set_seed
 	mov	x4, x23
 	mov	x3, x22
@@ -14680,36 +14498,36 @@ flash_complete_page_read:
 	ldrb	w2, [x28, 9]
 	bl	nandc_xfer
 	cmn	w0, #1
-	bne	.L2383
-	adrp	x26, .LANCHOR52
-	ldrb	w27, [x26, #:lo12:.LANCHOR52]
-	cbz	w27, .L2384
+	bne	.L2333
+	adrp	x26, .LANCHOR51
+	ldrb	w27, [x26, #:lo12:.LANCHOR51]
+	cbz	w27, .L2334
 	ldrb	w4, [x28, 9]
 	mov	x3, x23
-	strb	wzr, [x26, #:lo12:.LANCHOR52]
+	strb	wzr, [x26, #:lo12:.LANCHOR51]
 	mov	x2, x22
 	orr	w1, w19, w24, lsl 24
 	mov	w0, w25
 	bl	flash_read_page
-	strb	w27, [x26, #:lo12:.LANCHOR52]
-	cbnz	w24, .L2385
-.L2390:
+	strb	w27, [x26, #:lo12:.LANCHOR51]
+	cbnz	w24, .L2335
+.L2340:
 	adrp	x1, .LANCHOR0
 	ldrb	w1, [x1, #:lo12:.LANCHOR0]
-	cbz	w1, .L2385
-	adrp	x1, .LANCHOR50
-	ldrb	w1, [x1, #:lo12:.LANCHOR50]
+	cbz	w1, .L2335
+	adrp	x1, .LANCHOR49
+	ldrb	w1, [x1, #:lo12:.LANCHOR49]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	blt	.L2385
-	add	x20, x20, :lo12:.LANCHOR33
+	blt	.L2335
+	add	x20, x20, :lo12:.LANCHOR32
 	ldrb	w1, [x20, 19]
 	sub	w1, w1, #4
 	and	w1, w1, 255
 	cmp	w1, 4
 	mov	w1, 256
 	csel	w0, w0, w1, hi
-.L2377:
+.L2327:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -14717,32 +14535,32 @@ flash_complete_page_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2381:
+.L2331:
 	mov	w0, w19
-	b	.L2408
-.L2385:
+	b	.L2358
+.L2335:
 	cmn	w0, #1
-	bne	.L2377
-.L2391:
-	adrp	x0, .LANCHOR174
-	ldr	x5, [x0, #:lo12:.LANCHOR174]
-	cbnz	x5, .L2387
-.L2389:
-	adrp	x0, .LANCHOR52
+	bne	.L2327
+.L2341:
+	adrp	x0, .LANCHOR171
+	ldr	x5, [x0, #:lo12:.LANCHOR171]
+	cbnz	x5, .L2337
+.L2339:
+	adrp	x0, .LANCHOR51
 	mov	w3, -1
 	mov	w2, w21
 	mov	w1, 0
-	ldrb	w4, [x0, #:lo12:.LANCHOR52]
-	adrp	x0, .LC139
-	add	x0, x0, :lo12:.LC139
+	ldrb	w4, [x0, #:lo12:.LANCHOR51]
+	adrp	x0, .LC136
+	add	x0, x0, :lo12:.LC136
 	bl	printf
-	adrp	x0, .LANCHOR21
-	ldrb	w0, [x0, #:lo12:.LANCHOR21]
-	cbnz	w0, .L2388
+	adrp	x0, .LANCHOR26
+	ldrb	w0, [x0, #:lo12:.LANCHOR26]
+	cbnz	w0, .L2338
 	mov	w0, -1
-	b	.L2377
-.L2387:
-	add	x0, x20, :lo12:.LANCHOR33
+	b	.L2327
+.L2337:
+	add	x0, x20, :lo12:.LANCHOR32
 	mov	x3, x23
 	mov	x2, x22
 	orr	w1, w19, w24, lsl 24
@@ -14750,10 +14568,10 @@ flash_complete_page_read:
 	mov	w0, w25
 	blr	x5
 	cmn	w0, #1
-	beq	.L2389
-	b	.L2377
-.L2388:
-	add	x20, x20, :lo12:.LANCHOR33
+	beq	.L2339
+	b	.L2327
+.L2338:
+	add	x20, x20, :lo12:.LANCHOR32
 	orr	w1, w19, w24, lsl 24
 	mov	x3, x23
 	mov	x2, x22
@@ -14766,80 +14584,77 @@ flash_complete_page_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	flash_ddr_tuning_read
-.L2384:
-	cbz	w24, .L2390
-	b	.L2391
-.L2383:
-	cbnz	w24, .L2377
-	b	.L2390
+.L2334:
+	cbz	w24, .L2340
+	b	.L2341
+.L2333:
+	cbnz	w24, .L2327
+	b	.L2340
 	.size	flash_complete_page_read, .-flash_complete_page_read
 	.section	.text.queue_wait_first_req_completed,"ax",@progbits
 	.align	2
 	.type	queue_wait_first_req_completed, %function
 queue_wait_first_req_completed:
 	stp	x29, x30, [sp, -96]!
-	adrp	x0, .LANCHOR60
+	adrp	x0, .LANCHOR59
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	ldrb	w0, [x0, #:lo12:.LANCHOR60]
+	ldrb	w0, [x0, #:lo12:.LANCHOR59]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	cmp	w0, 255
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	bne	.L2410
-.L2443:
+	bne	.L2360
+.L2393:
 	mov	w21, 0
-	b	.L2409
-.L2410:
-	adrp	x19, .LANCHOR56
+	b	.L2359
+.L2360:
+	adrp	x19, .LANCHOR55
 	sxtw	x20, w0
-	add	x1, x19, :lo12:.LANCHOR56
+	add	x1, x19, :lo12:.LANCHOR55
 	add	x1, x1, x20, lsl 6
 	ldrb	w2, [x1, 58]
 	ldr	w21, [x1, 40]
 	sub	w3, w2, #1
 	cmp	w3, 10
-	bhi	.L2443
-	adrp	x1, .L2413
-	add	x1, x1, :lo12:.L2413
+	bhi	.L2393
+	adrp	x1, .L2363
+	add	x1, x1, :lo12:.L2363
 	ldrh	w1, [x1,w3,uxtw #1]
-	adr	x3, .Lrtx2413
+	adr	x3, .Lrtx2363
 	add	x1, x3, w1, sxth #2
 	br	x1
-.Lrtx2413:
+.Lrtx2363:
 	.section	.rodata.queue_wait_first_req_completed,"a",@progbits
 	.align	0
 	.align	2
-.L2413:
-	.2byte	(.L2412 - .Lrtx2413) / 4
-	.2byte	(.L2414 - .Lrtx2413) / 4
-	.2byte	(.L2415 - .Lrtx2413) / 4
-	.2byte	(.L2415 - .Lrtx2413) / 4
-	.2byte	(.L2415 - .Lrtx2413) / 4
-	.2byte	(.L2415 - .Lrtx2413) / 4
-	.2byte	(.L2416 - .Lrtx2413) / 4
-	.2byte	(.L2417 - .Lrtx2413) / 4
-	.2byte	(.L2418 - .Lrtx2413) / 4
-	.2byte	(.L2415 - .Lrtx2413) / 4
-	.2byte	(.L2418 - .Lrtx2413) / 4
+.L2363:
+	.2byte	(.L2362 - .Lrtx2363) / 4
+	.2byte	(.L2364 - .Lrtx2363) / 4
+	.2byte	(.L2365 - .Lrtx2363) / 4
+	.2byte	(.L2365 - .Lrtx2363) / 4
+	.2byte	(.L2365 - .Lrtx2363) / 4
+	.2byte	(.L2365 - .Lrtx2363) / 4
+	.2byte	(.L2366 - .Lrtx2363) / 4
+	.2byte	(.L2367 - .Lrtx2363) / 4
+	.2byte	(.L2368 - .Lrtx2363) / 4
+	.2byte	(.L2365 - .Lrtx2363) / 4
+	.2byte	(.L2368 - .Lrtx2363) / 4
 	.section	.text.queue_wait_first_req_completed
-.L2412:
-	mov	w1, 64
-	mov	w0, w21
-	bl	flash_wait_device_ready
-	tbz	x0, 6, .L2443
-	add	x0, x19, :lo12:.LANCHOR56
+.L2362:
+	bl	nandc_wait_flash_ready
+	add	x0, x19, :lo12:.LANCHOR55
 	add	x0, x0, x20, lsl 6
 	ldp	x1, x2, [x0, 8]
-	cbz	x2, .L2420
+	cbz	x2, .L2369
 	ldrb	w3, [x0, 56]
 	adrp	x0, .LANCHOR131
 	ldrb	w0, [x0, #:lo12:.LANCHOR131]
 	cmp	w3, w0
 	csel	x1, x1, x2, ne
-.L2420:
-	add	x19, x19, :lo12:.LANCHOR56
+.L2369:
+	add	x19, x19, :lo12:.LANCHOR55
 	mov	w0, w21
 	add	x20, x19, x20, lsl 6
 	ldr	x2, [x20, 24]
@@ -14850,37 +14665,34 @@ queue_wait_first_req_completed:
 	ldrb	w0, [x20, 2]
 	orr	w0, w0, 8
 	strb	w0, [x20, 2]
-	b	.L2443
-.L2414:
-	mov	w1, 64
-	mov	w0, w21
-	bl	flash_wait_device_ready
-	tbz	x0, 6, .L2443
-	add	x0, x19, :lo12:.LANCHOR56
+	b	.L2393
+.L2364:
+	bl	nandc_wait_flash_ready
+	add	x0, x19, :lo12:.LANCHOR55
 	lsl	x2, x20, 6
 	add	x1, x0, x2
 	ldrb	w21, [x0, x2]
 	add	x0, x0, x21, lsl 6
 	ldr	x24, [x0, 8]
 	ldp	x26, x0, [x1, 8]
-	cbz	x0, .L2421
+	cbz	x0, .L2370
 	ldrb	w2, [x1, 56]
 	adrp	x1, .LANCHOR131
 	ldrb	w1, [x1, #:lo12:.LANCHOR131]
 	cmp	w2, w1
 	csel	x26, x26, x0, ne
-.L2421:
-	add	x0, x19, :lo12:.LANCHOR56
+.L2370:
+	add	x0, x19, :lo12:.LANCHOR55
 	add	x0, x0, x21, lsl 6
 	ldr	x1, [x0, 16]
-	cbz	x1, .L2422
+	cbz	x1, .L2371
 	ldrb	w2, [x0, 56]
 	adrp	x0, .LANCHOR131
 	ldrb	w0, [x0, #:lo12:.LANCHOR131]
 	cmp	w2, w0
 	csel	x24, x24, x1, ne
-.L2422:
-	add	x22, x19, :lo12:.LANCHOR56
+.L2371:
+	add	x22, x19, :lo12:.LANCHOR55
 	mov	x1, x26
 	add	x27, x22, x20, lsl 6
 	add	x22, x22, x21, lsl 6
@@ -14894,20 +14706,20 @@ queue_wait_first_req_completed:
 	bl	flash_complete_plane_page_read
 	mov	w25, w0
 	cmn	w23, #1
-	beq	.L2423
+	beq	.L2372
 	ldr	w0, [x27, 36]
 	cmn	w0, #1
-	beq	.L2424
+	beq	.L2373
 	ldr	x1, [x27, 24]
 	ldr	w1, [x1, 4]
 	cmp	w0, w1
-	beq	.L2424
-.L2423:
-	adrp	x0, .LANCHOR32
-	add	x22, x19, :lo12:.LANCHOR56
+	beq	.L2373
+.L2372:
+	adrp	x0, .LANCHOR31
+	add	x22, x19, :lo12:.LANCHOR55
 	add	x22, x22, x20, lsl 6
 	mov	w5, 1
-	ldrb	w2, [x0, #:lo12:.LANCHOR32]
+	ldrb	w2, [x0, #:lo12:.LANCHOR31]
 	mov	w0, 24
 	sub	w0, w0, w2
 	ldr	x3, [x22, 24]
@@ -14925,37 +14737,37 @@ queue_wait_first_req_completed:
 	mov	w23, w0
 	ldr	w2, [x22, 36]
 	cmn	w2, #1
-	beq	.L2425
+	beq	.L2374
 	ldr	x0, [x22, 24]
 	ldr	w4, [x0, 4]
 	cmp	w2, w4
-	beq	.L2425
-	adrp	x1, .LANCHOR14
-	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 6, .L2425
+	beq	.L2374
+	adrp	x1, .LANCHOR19
+	ldr	w1, [x1, #:lo12:.LANCHOR19]
+	tbz	x1, 6, .L2374
 	ldr	w3, [x0]
-	adrp	x0, .LC140
+	adrp	x0, .LC137
 	ldr	w1, [x22, 40]
-	add	x0, x0, :lo12:.LC140
+	add	x0, x0, :lo12:.LC137
 	bl	printf
-.L2425:
-	add	x0, x19, :lo12:.LANCHOR56
+.L2374:
+	add	x0, x19, :lo12:.LANCHOR55
 	add	x0, x0, x20, lsl 6
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L2424
+	beq	.L2373
 	ldr	x0, [x0, 24]
 	ldr	w0, [x0, 4]
 	cmp	w1, w0
-	beq	.L2424
-	adrp	x1, .LANCHOR183
+	beq	.L2373
+	adrp	x1, .LANCHOR180
 	adrp	x0, .LC0
-	mov	w2, 430
-	add	x1, x1, :lo12:.LANCHOR183
+	mov	w2, 431
+	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2424:
-	add	x0, x19, :lo12:.LANCHOR56
+.L2373:
+	add	x0, x19, :lo12:.LANCHOR55
 	mov	w1, 13
 	add	x20, x0, x20, lsl 6
 	cmn	w25, #1
@@ -14964,21 +14776,21 @@ queue_wait_first_req_completed:
 	str	w23, [x20, 52]
 	orr	w1, w1, 8
 	strb	w1, [x20, 2]
-	beq	.L2426
+	beq	.L2375
 	add	x0, x0, x21, lsl 6
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L2428
+	beq	.L2377
 	ldr	x0, [x0, 24]
 	ldr	w0, [x0, 4]
 	cmp	w1, w0
-	beq	.L2428
-.L2426:
-	adrp	x0, .LANCHOR32
-	add	x20, x19, :lo12:.LANCHOR56
+	beq	.L2377
+.L2375:
+	adrp	x0, .LANCHOR31
+	add	x20, x19, :lo12:.LANCHOR55
 	add	x20, x20, x21, lsl 6
 	mov	w5, 1
-	ldrb	w2, [x0, #:lo12:.LANCHOR32]
+	ldrb	w2, [x0, #:lo12:.LANCHOR31]
 	mov	w0, 24
 	sub	w0, w0, w2
 	ldr	x3, [x20, 24]
@@ -14995,37 +14807,37 @@ queue_wait_first_req_completed:
 	bl	flash_read_page_en
 	ldr	w2, [x20, 36]
 	cmn	w2, #1
-	beq	.L2430
+	beq	.L2379
 	ldr	x0, [x20, 24]
 	ldr	w4, [x0, 4]
 	cmp	w2, w4
-	beq	.L2430
-	adrp	x1, .LANCHOR14
-	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 6, .L2430
+	beq	.L2379
+	adrp	x1, .LANCHOR19
+	ldr	w1, [x1, #:lo12:.LANCHOR19]
+	tbz	x1, 6, .L2379
 	ldr	w3, [x0]
-	adrp	x0, .LC140
+	adrp	x0, .LC137
 	ldr	w1, [x20, 40]
-	add	x0, x0, :lo12:.LC140
+	add	x0, x0, :lo12:.LC137
 	bl	printf
-.L2430:
-	add	x0, x19, :lo12:.LANCHOR56
+.L2379:
+	add	x0, x19, :lo12:.LANCHOR55
 	add	x0, x0, x21, lsl 6
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L2428
+	beq	.L2377
 	ldr	x0, [x0, 24]
 	ldr	w0, [x0, 4]
 	cmp	w1, w0
-	beq	.L2428
-	adrp	x1, .LANCHOR183
+	beq	.L2377
+	adrp	x1, .LANCHOR180
 	adrp	x0, .LC0
-	mov	w2, 449
-	add	x1, x1, :lo12:.LANCHOR183
+	mov	w2, 450
+	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2428:
-	add	x19, x19, :lo12:.LANCHOR56
+.L2377:
+	add	x19, x19, :lo12:.LANCHOR55
 	mov	w0, 13
 	add	x21, x19, x21, lsl 6
 	strb	w0, [x21, 58]
@@ -15033,17 +14845,17 @@ queue_wait_first_req_completed:
 	str	w23, [x21, 52]
 	orr	w0, w0, 8
 	strb	w0, [x21, 2]
-	b	.L2443
-.L2415:
+	b	.L2393
+.L2365:
 	mov	w0, w21
 	mov	w1, 64
 	bl	flash_wait_device_ready
 	mov	w21, w0
-	tbz	x21, 6, .L2443
+	tbz	x21, 6, .L2393
 	mov	w0, 5
 	tst	w21, w0
-	beq	.L2431
-	add	x19, x19, :lo12:.LANCHOR56
+	beq	.L2381
+	add	x19, x19, :lo12:.LANCHOR55
 	mov	w0, 12
 	add	x20, x19, x20, lsl 6
 	mov	w4, 12
@@ -15051,15 +14863,15 @@ queue_wait_first_req_completed:
 	ldrb	w1, [x20, 1]
 	ldr	w3, [x20, 40]
 	strb	w0, [x20, 58]
-	adrp	x0, .LC141
-	add	x0, x0, :lo12:.LC141
+	adrp	x0, .LC138
+	add	x0, x0, :lo12:.LC138
 	bl	printf
-.L2507:
+.L2451:
 	mov	w0, -1
 	str	w0, [x20, 52]
-	b	.L2409
-.L2431:
-	add	x21, x19, :lo12:.LANCHOR56
+	b	.L2359
+.L2381:
+	add	x21, x19, :lo12:.LANCHOR55
 	mov	w0, 13
 	add	x21, x21, x20, lsl 6
 	strb	w0, [x21, 58]
@@ -15070,60 +14882,60 @@ queue_wait_first_req_completed:
 	str	wzr, [x21, 52]
 	movk	w0, 0x444b, lsl 16
 	cmp	w1, w0
-	bne	.L2443
+	bne	.L2393
 	ldrh	w0, [x21, 50]
-	cbnz	w0, .L2443
-	adrp	x0, .LANCHOR32
+	cbnz	w0, .L2393
+	adrp	x0, .LANCHOR31
 	mov	w5, 1
-	adrp	x22, .LANCHOR175
+	adrp	x22, .LANCHOR172
 	ldr	w1, [x21, 40]
-	ldrb	w2, [x0, #:lo12:.LANCHOR32]
+	ldrb	w2, [x0, #:lo12:.LANCHOR31]
 	mov	w0, 24
-	ldr	x3, [x22, #:lo12:.LANCHOR175]
+	ldr	x3, [x22, #:lo12:.LANCHOR172]
 	sub	w0, w0, w2
 	lsl	w5, w5, w2
 	adrp	x2, .LANCHOR131
 	sub	w5, w5, #1
 	ldrb	w4, [x2, #:lo12:.LANCHOR131]
-	adrp	x2, .LANCHOR176
+	adrp	x2, .LANCHOR173
 	lsl	w6, w5, w0
-	ldr	x2, [x2, #:lo12:.LANCHOR176]
+	ldr	x2, [x2, #:lo12:.LANCHOR173]
 	lsr	w0, w1, w0
 	bic	w1, w1, w6
 	and	w0, w0, w5
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L2432
-	ldr	x1, [x22, #:lo12:.LANCHOR175]
+	beq	.L2382
+	ldr	x1, [x22, #:lo12:.LANCHOR172]
 	ldr	x2, [x21, 24]
 	ldr	w1, [x1]
 	ldr	w2, [x2]
 	cmp	w2, w1
-	beq	.L2443
-.L2432:
-	add	x19, x19, :lo12:.LANCHOR56
-	adrp	x1, .LANCHOR52
+	beq	.L2393
+.L2382:
+	add	x19, x19, :lo12:.LANCHOR55
+	adrp	x1, .LANCHOR51
 	add	x20, x19, x20, lsl 6
 	mov	w3, w0
-	ldrb	w4, [x1, #:lo12:.LANCHOR52]
-	adrp	x0, .LC142
-	add	x0, x0, :lo12:.LC142
+	ldrb	w4, [x1, #:lo12:.LANCHOR51]
+	adrp	x0, .LC139
+	add	x0, x0, :lo12:.LC139
 	ldrb	w1, [x20, 1]
 	ldr	w2, [x20, 40]
 	bl	printf
 	mov	w0, -1
 	str	w0, [x20, 52]
-	b	.L2443
-.L2418:
+	b	.L2393
+.L2368:
 	cmp	w2, 11
 	mov	w1, 3
 	mov	w5, 10
 	csel	w5, w5, w1, eq
-	adrp	x1, .LANCHOR32
+	adrp	x1, .LANCHOR31
 	mov	w4, 24
 	mov	w2, 1
-	add	x22, x19, :lo12:.LANCHOR56
-	ldrb	w3, [x1, #:lo12:.LANCHOR32]
+	add	x22, x19, :lo12:.LANCHOR55
+	ldrb	w3, [x1, #:lo12:.LANCHOR31]
 	ubfiz	x0, x0, 6, 8
 	add	x0, x22, x0
 	mov	x24, x1
@@ -15133,41 +14945,41 @@ queue_wait_first_req_completed:
 	lsr	w3, w21, w4
 	and	w3, w3, w2
 	and	w3, w3, 65535
-.L2434:
+.L2384:
 	ldrb	w1, [x0]
 	cmp	w1, 255
-	bne	.L2441
+	bne	.L2391
 	mov	w21, -1
-	b	.L2409
-.L2441:
+	b	.L2359
+.L2391:
 	sxtw	x23, w1
 	ubfiz	x0, x1, 6, 8
 	add	x1, x22, x23, lsl 6
 	add	x0, x22, x0
 	ldrb	w6, [x1, 58]
 	cmp	w6, w5
-	bne	.L2434
+	bne	.L2384
 	ldr	w1, [x1, 40]
 	lsr	w1, w1, w4
 	and	w1, w1, w2
 	cmp	w3, w1
-	bne	.L2434
+	bne	.L2384
 	mov	w0, w21
 	mov	w1, 64
 	bl	flash_wait_device_ready
 	mov	w21, w0
-	tbnz	x21, 6, .L2436
-.L2506:
+	tbnz	x21, 6, .L2386
+.L2450:
 	mov	w21, 0
-	b	.L2437
-.L2436:
+	b	.L2387
+.L2386:
 	tst	x21, 15
-	beq	.L2438
+	beq	.L2388
 	add	x22, x22, x20, lsl 6
 	mov	w2, w0
 	mov	w4, 12
-	adrp	x0, .LC143
-	add	x0, x0, :lo12:.LC143
+	adrp	x0, .LC140
+	add	x0, x0, :lo12:.LC140
 	ldrb	w1, [x22, 1]
 	ldr	w3, [x22, 40]
 	bl	printf
@@ -15175,15 +14987,15 @@ queue_wait_first_req_completed:
 	strb	w0, [x22, 58]
 	mov	w0, -1
 	str	w0, [x22, 52]
-.L2437:
-	add	x1, x19, :lo12:.LANCHOR56
+.L2387:
+	add	x1, x19, :lo12:.LANCHOR55
 	add	x20, x1, x20, lsl 6
 	add	x1, x1, x23, lsl 6
 	ldrb	w0, [x20, 58]
 	strb	w0, [x1, 58]
 	ldr	w0, [x20, 52]
 	str	w0, [x1, 52]
-.L2409:
+.L2359:
 	mov	w0, w21
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -15192,7 +15004,7 @@ queue_wait_first_req_completed:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2438:
+.L2388:
 	add	x21, x22, x20, lsl 6
 	mov	w0, 13
 	strb	w0, [x21, 58]
@@ -15203,78 +15015,78 @@ queue_wait_first_req_completed:
 	str	wzr, [x21, 52]
 	movk	w0, 0x444b, lsl 16
 	cmp	w1, w0
-	bne	.L2506
+	bne	.L2450
 	ldrh	w0, [x21, 50]
-	cbnz	w0, .L2506
-	ldrb	w2, [x24, #:lo12:.LANCHOR32]
+	cbnz	w0, .L2450
+	ldrb	w2, [x24, #:lo12:.LANCHOR31]
 	mov	w5, 1
 	mov	w0, 24
-	adrp	x22, .LANCHOR175
+	adrp	x22, .LANCHOR172
 	sub	w0, w0, w2
 	ldr	w1, [x21, 40]
 	lsl	w5, w5, w2
 	adrp	x2, .LANCHOR131
 	sub	w5, w5, #1
-	ldr	x3, [x22, #:lo12:.LANCHOR175]
+	ldr	x3, [x22, #:lo12:.LANCHOR172]
 	ldrb	w4, [x2, #:lo12:.LANCHOR131]
-	adrp	x2, .LANCHOR176
+	adrp	x2, .LANCHOR173
 	lsl	w6, w5, w0
-	ldr	x2, [x2, #:lo12:.LANCHOR176]
+	ldr	x2, [x2, #:lo12:.LANCHOR173]
 	lsr	w0, w1, w0
 	bic	w1, w1, w6
 	and	w0, w0, w5
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L2440
-	ldr	x1, [x22, #:lo12:.LANCHOR175]
+	beq	.L2390
+	ldr	x1, [x22, #:lo12:.LANCHOR172]
 	ldr	x2, [x21, 24]
 	ldr	w1, [x1]
 	ldr	w2, [x2]
 	cmp	w2, w1
-	beq	.L2506
-.L2440:
-	add	x21, x19, :lo12:.LANCHOR56
-	adrp	x1, .LANCHOR52
+	beq	.L2450
+.L2390:
+	add	x21, x19, :lo12:.LANCHOR55
+	adrp	x1, .LANCHOR51
 	add	x21, x21, x20, lsl 6
 	mov	w3, w0
-	ldrb	w4, [x1, #:lo12:.LANCHOR52]
-	adrp	x0, .LC144
-	add	x0, x0, :lo12:.LC144
+	ldrb	w4, [x1, #:lo12:.LANCHOR51]
+	adrp	x0, .LC141
+	add	x0, x0, :lo12:.LC141
 	ldrb	w1, [x21, 1]
 	ldr	w2, [x21, 40]
 	bl	printf
 	mov	w0, -1
 	str	w0, [x21, 52]
-	b	.L2506
-.L2416:
+	b	.L2450
+.L2366:
 	mov	w0, w21
 	mov	w1, 32
 	bl	flash_wait_device_ready
 	mov	w21, w0
-	tbz	x21, 5, .L2443
-	add	x19, x19, :lo12:.LANCHOR56
+	tbz	x21, 5, .L2393
+	add	x19, x19, :lo12:.LANCHOR55
 	tst	x21, 15
 	add	x20, x19, x20, lsl 6
-	beq	.L2442
+	beq	.L2392
 	mov	w0, 12
 	strb	w0, [x20, 58]
-	b	.L2507
-.L2442:
+	b	.L2451
+.L2392:
 	mov	w0, 13
 	str	wzr, [x20, 52]
 	strb	w0, [x20, 58]
-	b	.L2443
-.L2417:
+	b	.L2393
+.L2367:
 	mov	w1, 64
 	mov	w0, w21
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L2443
-	add	x19, x19, :lo12:.LANCHOR56
+	tbz	x0, 6, .L2393
+	add	x19, x19, :lo12:.LANCHOR55
 	add	x19, x19, x20, lsl 6
 	str	w0, [x19, 52]
 	mov	w0, 7
 	strb	w0, [x19, 58]
-	b	.L2443
+	b	.L2393
 	.size	queue_wait_first_req_completed, .-queue_wait_first_req_completed
 	.section	.text.sblk_prog_page,"ax",@progbits
 	.align	2
@@ -15291,24 +15103,24 @@ sblk_prog_page:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbz	w0, .L2509
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2509
+	cbz	w0, .L2453
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 8, .L2453
 	ldr	w1, [x19, 40]
-	adrp	x0, .LC145
+	adrp	x0, .LC142
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC145
+	add	x0, x0, :lo12:.LC142
 	bl	printf
-.L2509:
-	adrp	x23, .LANCHOR45
-	adrp	x25, .LANCHOR32
-	add	x23, x23, :lo12:.LANCHOR45
-	add	x26, x25, :lo12:.LANCHOR32
+.L2453:
+	adrp	x23, .LANCHOR44
+	adrp	x25, .LANCHOR31
+	add	x23, x23, :lo12:.LANCHOR44
+	add	x26, x25, :lo12:.LANCHOR31
 	mov	w21, 0
-.L2510:
-	cbnz	w20, .L2521
-.L2537:
+.L2454:
+	cbnz	w20, .L2465
+.L2481:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -15317,38 +15129,38 @@ sblk_prog_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2521:
+.L2465:
 	ldrb	w24, [x19]
 	ldr	w22, [x19, 40]
-.L2511:
+.L2455:
 	mov	w1, 1
 	mov	w0, w22
 	bl	queue_lun_state
-	cbnz	w0, .L2512
+	cbnz	w0, .L2456
 	cmp	w20, 1
-	beq	.L2513
+	beq	.L2457
 	ldrb	w0, [x23]
-	cbz	w0, .L2513
-	adrp	x0, .LANCHOR37
-	ldrb	w0, [x0, #:lo12:.LANCHOR37]
-	cbz	w0, .L2514
-.L2513:
+	cbz	w0, .L2457
+	adrp	x0, .LANCHOR36
+	ldrb	w0, [x0, #:lo12:.LANCHOR36]
+	cbz	w0, .L2458
+.L2457:
 	mov	x0, x19
 	bl	queue_prog_cmd
-.L2515:
+.L2459:
 	subs	w20, w20, #1
-	beq	.L2537
+	beq	.L2481
 	ubfiz	x24, x24, 6, 8
-	adrp	x19, .LANCHOR56
-	add	x19, x19, :lo12:.LANCHOR56
+	adrp	x19, .LANCHOR55
+	add	x19, x19, :lo12:.LANCHOR55
 	add	x19, x19, x24
-	b	.L2510
-.L2512:
+	b	.L2454
+.L2456:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2511
-.L2514:
-	ldrb	w1, [x25, #:lo12:.LANCHOR32]
+	b	.L2455
+.L2458:
+	ldrb	w1, [x25, #:lo12:.LANCHOR31]
 	mov	w27, 24
 	mov	w0, 1
 	sub	w27, w27, w1
@@ -15359,17 +15171,17 @@ sblk_prog_page:
 	ldrb	w0, [x19]
 	and	w27, w27, 65535
 	cmp	w0, 255
-	bne	.L2516
-	adrp	x1, .LANCHOR184
+	bne	.L2460
+	adrp	x1, .LANCHOR181
 	adrp	x0, .LC0
-	mov	w2, 696
-	add	x1, x1, :lo12:.LANCHOR184
+	mov	w2, 697
+	add	x1, x1, :lo12:.LANCHOR181
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2516:
+.L2460:
 	ldrb	w0, [x19]
-	adrp	x1, .LANCHOR56
-	add	x1, x1, :lo12:.LANCHOR56
+	adrp	x1, .LANCHOR55
+	add	x1, x1, :lo12:.LANCHOR55
 	mov	w3, 24
 	mov	w28, 1
 	add	x0, x1, x0, lsl 6
@@ -15381,11 +15193,11 @@ sblk_prog_page:
 	lsr	w1, w4, w3
 	and	w0, w0, w1
 	cmp	w27, w0, uxth
-	bne	.L2517
+	bne	.L2461
+	adrp	x0, .LANCHOR74
+	ldrh	w2, [x0, #:lo12:.LANCHOR74]
 	adrp	x0, .LANCHOR75
-	ldrh	w2, [x0, #:lo12:.LANCHOR75]
-	adrp	x0, .LANCHOR76
-	ldrb	w1, [x0, #:lo12:.LANCHOR76]
+	ldrb	w1, [x0, #:lo12:.LANCHOR75]
 	sub	w0, w3, w2
 	lsr	w5, w22, w2
 	sub	w3, w1, #1
@@ -15403,9 +15215,9 @@ sblk_prog_page:
 	cmp	w5, w0
 	and	w1, w1, w4
 	ccmp	w22, w1, 0, ne
-	bne	.L2517
+	bne	.L2461
 	cmp	w21, w3
-	beq	.L2517
+	beq	.L2461
 	ldr	w1, [x19, 40]
 	mov	w0, 17
 	ldr	x2, [x19, 8]
@@ -15418,15 +15230,15 @@ sblk_prog_page:
 	mov	w0, -1
 	strb	w0, [x19]
 	mov	x1, x19
-	adrp	x0, .LANCHOR60
-	add	x0, x0, :lo12:.LANCHOR60
+	adrp	x0, .LANCHOR59
+	add	x0, x0, :lo12:.LANCHOR59
 	bl	buf_add_tail
-	b	.L2515
-.L2517:
+	b	.L2459
+.L2461:
 	mov	x0, x19
 	mov	w21, 0
 	bl	queue_prog_cmd
-	b	.L2515
+	b	.L2459
 	.size	sblk_prog_page, .-sblk_prog_page
 	.section	.text.sblk_wait_write_queue_completed,"ax",@progbits
 	.align	2
@@ -15436,19 +15248,19 @@ sblk_wait_write_queue_completed:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR60
-	add	x19, x19, :lo12:.LANCHOR60
-.L2540:
+	adrp	x19, .LANCHOR59
+	add	x19, x19, :lo12:.LANCHOR59
+.L2484:
 	ldrb	w0, [x19]
 	cmp	w0, 255
-	bne	.L2541
+	bne	.L2485
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2541:
+.L2485:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2540
+	b	.L2484
 	.size	sblk_wait_write_queue_completed, .-sblk_wait_write_queue_completed
 	.section	.text.ftl_flush,"ax",@progbits
 	.align	2
@@ -15461,17 +15273,17 @@ ftl_flush:
 	ldrb	w1, [x0, #:lo12:.LANCHOR129]
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	adrp	x20, .LANCHOR185
-	cbz	w1, .L2544
-	ldrb	w2, [x20, #:lo12:.LANCHOR185]
-	adrp	x0, .LANCHOR56
-	add	x0, x0, :lo12:.LANCHOR56
+	adrp	x20, .LANCHOR182
+	cbz	w1, .L2488
+	ldrb	w2, [x20, #:lo12:.LANCHOR182]
+	adrp	x0, .LANCHOR55
+	add	x0, x0, :lo12:.LANCHOR55
 	add	x0, x0, x2, lsl 6
 	bl	sblk_prog_page
-.L2544:
+.L2488:
 	mov	w0, -1
 	strb	wzr, [x19, #:lo12:.LANCHOR129]
-	strb	w0, [x20, #:lo12:.LANCHOR185]
+	strb	w0, [x20, #:lo12:.LANCHOR182]
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	ldp	x19, x20, [sp, 16]
@@ -15516,11 +15328,11 @@ ftl_read_ppa_page:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w20, w0
-	adrp	x0, .LANCHOR32
+	adrp	x0, .LANCHOR31
 	mov	w19, 24
 	stp	x21, x22, [sp, 32]
 	mov	x21, x1
-	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
 	mov	x22, x2
 	str	x23, [sp, 48]
 	mov	w23, w3
@@ -15554,21 +15366,21 @@ sblk_read_page:
 	stp	x27, x28, [sp, 80]
 	mov	w21, w22
 	stp	x19, x20, [sp, 16]
-	adrp	x27, .LANCHOR32
+	adrp	x27, .LANCHOR31
 	stp	x23, x24, [sp, 48]
 	mov	x19, x0
 	stp	x25, x26, [sp, 64]
 	mov	x23, x0
-	adrp	x25, .LANCHOR186
-	add	x28, x27, :lo12:.LANCHOR32
-	add	x25, x25, :lo12:.LANCHOR186
-.L2554:
-	cbnz	w21, .L2564
-.L2577:
-	adrp	x19, .LANCHOR56
-	add	x19, x19, :lo12:.LANCHOR56
-.L2565:
-	cbnz	w22, .L2567
+	adrp	x25, .LANCHOR183
+	add	x28, x27, :lo12:.LANCHOR31
+	add	x25, x25, :lo12:.LANCHOR183
+.L2498:
+	cbnz	w21, .L2508
+.L2521:
+	adrp	x19, .LANCHOR55
+	add	x19, x19, :lo12:.LANCHOR55
+.L2509:
+	cbnz	w22, .L2511
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -15577,28 +15389,28 @@ sblk_read_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2564:
+.L2508:
 	ldrb	w24, [x19]
 	ldr	w26, [x19, 40]
-.L2555:
+.L2499:
 	mov	w1, 0
 	mov	w0, w26
 	bl	queue_lun_state
-	cbnz	w0, .L2556
+	cbnz	w0, .L2500
 	cmp	w21, 1
-	beq	.L2561
+	beq	.L2505
 	ldrb	w0, [x25]
-	cbnz	w0, .L2558
-.L2561:
+	cbnz	w0, .L2502
+.L2505:
 	mov	x0, x19
 	bl	queue_read_cmd
-	b	.L2559
-.L2556:
+	b	.L2503
+.L2500:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2555
-.L2558:
-	ldrb	w1, [x27, #:lo12:.LANCHOR32]
+	b	.L2499
+.L2502:
+	ldrb	w1, [x27, #:lo12:.LANCHOR31]
 	mov	w20, 24
 	mov	w0, 1
 	sub	w20, w20, w1
@@ -15609,17 +15421,17 @@ sblk_read_page:
 	ldrb	w0, [x19]
 	and	w20, w20, 65535
 	cmp	w0, 255
-	bne	.L2560
-	adrp	x1, .LANCHOR187
+	bne	.L2504
+	adrp	x1, .LANCHOR184
 	adrp	x0, .LC0
-	mov	w2, 781
-	add	x1, x1, :lo12:.LANCHOR187
+	mov	w2, 782
+	add	x1, x1, :lo12:.LANCHOR184
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2560:
+.L2504:
 	ldrb	w4, [x19]
-	adrp	x2, .LANCHOR56
-	add	x2, x2, :lo12:.LANCHOR56
+	adrp	x2, .LANCHOR55
+	add	x2, x2, :lo12:.LANCHOR55
 	ldrb	w7, [x28]
 	mov	w0, 24
 	mov	w3, 1
@@ -15632,18 +15444,18 @@ sblk_read_page:
 	lsr	w0, w1, w0
 	and	w0, w0, w3
 	cmp	w20, w0, uxth
-	bne	.L2561
+	bne	.L2505
 	adrp	x0, .LANCHOR111
 	ldrh	w0, [x0, #:lo12:.LANCHOR111]
 	add	w26, w0, w26
 	cmp	w1, w26
-	bne	.L2561
+	bne	.L2505
 	ldr	w0, [x19, 40]
 	mov	w26, -1
 	ldrb	w24, [x2, x5]
-	adrp	x20, .LANCHOR60
+	adrp	x20, .LANCHOR59
 	stp	x6, x5, [x29, 96]
-	add	x20, x20, :lo12:.LANCHOR60
+	add	x20, x20, :lo12:.LANCHOR59
 	str	x2, [x29, 112]
 	sub	w21, w21, #1
 	str	w4, [x29, 120]
@@ -15666,28 +15478,28 @@ sblk_read_page:
 	ubfiz	x1, x4, 6, 8
 	add	x1, x2, x1
 	bl	buf_add_tail
-.L2559:
+.L2503:
 	subs	w21, w21, #1
-	beq	.L2577
+	beq	.L2521
 	ubfiz	x24, x24, 6, 8
-	adrp	x19, .LANCHOR56
-	add	x19, x19, :lo12:.LANCHOR56
+	adrp	x19, .LANCHOR55
+	add	x19, x19, :lo12:.LANCHOR55
 	add	x19, x19, x24
-	b	.L2554
-.L2567:
+	b	.L2498
+.L2511:
 	ldrb	w0, [x23, 58]
 	cmp	w0, 13
-	bne	.L2566
+	bne	.L2510
 	ldrb	w0, [x23]
 	sub	w22, w22, #1
 	cmp	w0, 255
-	beq	.L2566
+	beq	.L2510
 	ubfiz	x23, x0, 6, 8
 	add	x23, x19, x23
-.L2566:
+.L2510:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2565
+	b	.L2509
 	.size	sblk_read_page, .-sblk_read_page
 	.section	.text.gc_check_data_one_wl,"ax",@progbits
 	.align	2
@@ -15698,112 +15510,112 @@ gc_check_data_one_wl:
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x19, x20, [sp, 32]
-	adrp	x19, .LANCHOR71
+	adrp	x19, .LANCHOR70
 	stp	x21, x22, [sp, 48]
-	add	x22, x19, :lo12:.LANCHOR71
-	adrp	x20, .LANCHOR10
+	add	x22, x19, :lo12:.LANCHOR70
+	adrp	x20, .LANCHOR12
 	stp	x23, x24, [sp, 64]
 	stp	x25, x26, [sp, 80]
 	ldr	x0, [x22, 8]
 	stp	x27, x28, [sp, 96]
-	ldr	x21, [x20, #:lo12:.LANCHOR10]
-	cbnz	x0, .L2580
+	ldr	x21, [x20, #:lo12:.LANCHOR12]
+	cbnz	x0, .L2524
 	mov	w0, 1
 	bl	buf_alloc
 	str	x0, [x22, 8]
-.L2580:
-	add	x0, x19, :lo12:.LANCHOR71
+.L2524:
+	add	x0, x19, :lo12:.LANCHOR70
 	ldr	x22, [x0, 8]
-	cbnz	x22, .L2581
-	adrp	x1, .LANCHOR188
+	cbnz	x22, .L2525
+	adrp	x1, .LANCHOR185
 	adrp	x0, .LC0
 	mov	w2, 729
-	add	x1, x1, :lo12:.LANCHOR188
+	add	x1, x1, :lo12:.LANCHOR185
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2581:
+.L2525:
 	adrp	x27, .LANCHOR111
-	adrp	x28, .LANCHOR79
+	adrp	x28, .LANCHOR78
 	add	x26, x21, 96
 	add	x27, x27, :lo12:.LANCHOR111
-	add	x28, x28, :lo12:.LANCHOR79
+	add	x28, x28, :lo12:.LANCHOR78
 	mov	w25, 0
-.L2582:
+.L2526:
 	ldrb	w0, [x21, 89]
 	cmp	w25, w0
-	bge	.L2593
+	bge	.L2537
 	mov	w24, 1
-	add	x23, x19, :lo12:.LANCHOR71
-	b	.L2594
-.L2592:
+	add	x23, x19, :lo12:.LANCHOR70
+	b	.L2538
+.L2536:
 	ldrh	w0, [x26]
 	ldrh	w2, [x27]
 	ldrb	w1, [x28]
 	cmp	w1, 2
 	mul	w2, w0, w2
-	beq	.L2583
-	adrp	x0, .LANCHOR36
-	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbz	w0, .L2584
-.L2583:
+	beq	.L2527
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbz	w0, .L2528
+.L2527:
 	ldrh	w0, [x23, 16]
 	sub	w3, w0, #1
 	add	w0, w24, w2
 	add	w0, w3, w0
 	orr	w1, w0, w1, lsl 24
 	str	w1, [x22, 40]
-.L2585:
+.L2529:
 	mov	w1, 1
 	mov	x0, x22
 	bl	sblk_read_page
 	ldr	w2, [x22, 52]
-	adrp	x1, .LANCHOR162
+	adrp	x1, .LANCHOR159
 	cmn	w2, #1
-	beq	.L2588
+	beq	.L2532
 	ldrh	w0, [x23, 22]
-	ldr	x4, [x1, #:lo12:.LANCHOR162]
+	ldr	x4, [x1, #:lo12:.LANCHOR159]
 	ldr	x3, [x22, 24]
 	lsl	x0, x0, 2
 	ldr	w5, [x4, x0]
 	ldr	w4, [x3, 4]
 	cmp	w5, w4
-	bne	.L2588
-	adrp	x4, .LANCHOR163
-	ldr	x4, [x4, #:lo12:.LANCHOR163]
+	bne	.L2532
+	adrp	x4, .LANCHOR160
+	ldr	x4, [x4, #:lo12:.LANCHOR160]
 	ldr	w4, [x4, x0]
 	ldr	w0, [x3, 8]
 	cmp	w4, w0
-	beq	.L2589
-.L2588:
+	beq	.L2533
+.L2532:
 	ldrh	w0, [x23, 22]
-	ldr	x1, [x1, #:lo12:.LANCHOR162]
+	ldr	x1, [x1, #:lo12:.LANCHOR159]
 	lsl	x0, x0, 2
 	ldr	w3, [x1, x0]
 	cmn	w3, #1
-	beq	.L2589
-	adrp	x1, .LANCHOR14
-	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 10, .L2590
+	beq	.L2533
+	adrp	x1, .LANCHOR19
+	ldr	w1, [x1, #:lo12:.LANCHOR19]
+	tbz	x1, 10, .L2534
 	ldr	x1, [x22, 24]
-	adrp	x4, .LANCHOR163
-	ldr	x4, [x4, #:lo12:.LANCHOR163]
+	adrp	x4, .LANCHOR160
+	ldr	x4, [x4, #:lo12:.LANCHOR160]
 	ldr	w5, [x1, 12]
 	str	w5, [sp]
 	ldr	w4, [x4, x0]
-	adrp	x0, .LC146
+	adrp	x0, .LC143
 	ldp	w5, w6, [x1]
-	add	x0, x0, :lo12:.LC146
+	add	x0, x0, :lo12:.LC143
 	ldr	w7, [x1, 8]
 	ldr	w1, [x22, 40]
 	bl	printf
-.L2590:
+.L2534:
 	adrp	x0, .LANCHOR124
 	ldrh	w1, [x21, 80]
 	ldrb	w2, [x0, #:lo12:.LANCHOR124]
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	strh	wzr, [x0, x1, lsl 1]
-	ldr	x1, [x20, #:lo12:.LANCHOR10]
+	ldr	x1, [x20, #:lo12:.LANCHOR12]
 	ldr	w0, [x1, 556]
 	add	w0, w0, 1
 	str	w0, [x1, 556]
@@ -15813,16 +15625,16 @@ gc_check_data_one_wl:
 	mov	w0, 20041
 	movk	w0, 0x444b, lsl 16
 	cmp	w1, w0
-	bne	.L2597
-	cbnz	w2, .L2597
-	adrp	x0, .LANCHOR81
-	ldrb	w0, [x0, #:lo12:.LANCHOR81]
-	cbnz	w0, .L2597
+	bne	.L2541
+	cbnz	w2, .L2541
+	adrp	x0, .LANCHOR80
+	ldrb	w0, [x0, #:lo12:.LANCHOR80]
+	cbnz	w0, .L2541
 	ldr	w0, [x22, 40]
 	bl	ftl_mask_bad_block
-.L2597:
+.L2541:
 	mov	w0, -1
-.L2579:
+.L2523:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -15831,54 +15643,54 @@ gc_check_data_one_wl:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 112
 	ret
-.L2584:
+.L2528:
 	cmp	w1, 3
 	ldrh	w0, [x23, 16]
-	bne	.L2586
-	adrp	x1, .LANCHOR37
-	ldrb	w1, [x1, #:lo12:.LANCHOR37]
-	cbz	w1, .L2587
+	bne	.L2530
+	adrp	x1, .LANCHOR36
+	ldrb	w1, [x1, #:lo12:.LANCHOR36]
+	cbz	w1, .L2531
 	add	w0, w0, w0, lsl 1
 	sub	w1, w0, #1
 	add	w0, w24, w2
 	add	w0, w1, w0
 	orr	w0, w0, 50331648
-.L2612:
+.L2556:
 	str	w0, [x22, 40]
-	b	.L2585
-.L2587:
+	b	.L2529
+.L2531:
 	add	w0, w0, w2
 	orr	w0, w0, w24, lsl 24
-	b	.L2612
-.L2586:
+	b	.L2556
+.L2530:
 	add	w0, w0, w2
-	b	.L2612
-.L2589:
+	b	.L2556
+.L2533:
 	ldrh	w0, [x23, 22]
 	add	w24, w24, 1
 	add	w0, w0, 1
 	strh	w0, [x23, 22]
-.L2594:
+.L2538:
 	ldrh	w0, [x23, 20]
 	cmp	w24, w0
-	ble	.L2592
+	ble	.L2536
 	add	w25, w25, 1
 	add	x26, x26, 2
-	b	.L2582
-.L2593:
-	add	x19, x19, :lo12:.LANCHOR71
+	b	.L2526
+.L2537:
+	add	x19, x19, :lo12:.LANCHOR70
 	ldrh	w0, [x19, 16]
 	add	w1, w0, 1
 	strh	w1, [x19, 16]
-	adrp	x1, .LANCHOR81
-	ldrb	w1, [x1, #:lo12:.LANCHOR81]
-	cbz	w1, .L2598
+	adrp	x1, .LANCHOR80
+	ldrb	w1, [x1, #:lo12:.LANCHOR80]
+	cbz	w1, .L2542
 	add	w0, w0, 2
 	strh	w0, [x19, 16]
-.L2598:
-.L2591:
+.L2542:
+.L2535:
 	mov	w0, 0
-	b	.L2579
+	b	.L2523
 	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
 	.section	.text.sblk_tlc_prog_one_page,"ax",@progbits
 	.align	2
@@ -15891,11 +15703,11 @@ sblk_tlc_prog_one_page:
 	mov	x19, x0
 	ldr	x0, [x0]
 	ldr	w20, [x0, 40]
-.L2614:
+.L2558:
 	mov	w1, 1
 	mov	w0, w20
 	bl	queue_lun_state
-	cbnz	w0, .L2615
+	cbnz	w0, .L2559
 	mov	x0, x19
 	mov	w1, 1
 	bl	queue_tlc_prog_cmd
@@ -15903,10 +15715,10 @@ sblk_tlc_prog_one_page:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2615:
+.L2559:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2614
+	b	.L2558
 	.size	sblk_tlc_prog_one_page, .-sblk_tlc_prog_one_page
 	.section	.text.sblk_xlc_prog_pages,"ax",@progbits
 	.align	2
@@ -15924,37 +15736,37 @@ sblk_xlc_prog_pages:
 	mov	w24, w2
 	ldr	w19, [x0, 40]
 	str	x25, [sp, 64]
-.L2618:
+.L2562:
 	mov	w1, 1
 	mov	w0, w19
 	bl	queue_lun_state
-	cbnz	w0, .L2619
+	cbnz	w0, .L2563
 	cmp	w24, 2
-	bne	.L2620
-	adrp	x0, .LANCHOR45
+	bne	.L2564
+	adrp	x0, .LANCHOR44
 	ldr	x3, [x22]
-	ldrb	w0, [x0, #:lo12:.LANCHOR45]
-	cbz	w0, .L2621
-	adrp	x0, .LANCHOR32
+	ldrb	w0, [x0, #:lo12:.LANCHOR44]
+	cbz	w0, .L2565
+	adrp	x0, .LANCHOR31
 	ldr	x7, [x20]
 	mov	w25, 1
 	mov	w2, 24
-	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
 	ldr	w3, [x3, 40]
 	sub	w2, w2, w0
 	ldr	w1, [x7, 40]
 	lsl	w19, w25, w0
-	adrp	x0, .LANCHOR37
+	adrp	x0, .LANCHOR36
 	lsl	w21, w25, w2
 	sub	w19, w19, #1
-	ldrb	w0, [x0, #:lo12:.LANCHOR37]
+	ldrb	w0, [x0, #:lo12:.LANCHOR36]
 	sub	w21, w21, #1
 	and	w23, w1, w21
 	lsr	w1, w1, w2
 	and	w19, w19, w1
 	and	w21, w21, w3
 	and	w19, w19, 255
-	cbz	w0, .L2622
+	cbz	w0, .L2566
 	mov	w0, w19
 	bl	zftl_flash_exit_slc_mode
 	ldr	x0, [x20]
@@ -16016,7 +15828,7 @@ sblk_xlc_prog_pages:
 	ldr	x6, [x0, 24]
 	mov	w0, 0
 	bl	flash_start_one_pass_page_prog
-.L2623:
+.L2567:
 	ldr	x1, [x20]
 	mov	w0, 5
 	strb	w0, [x1, 58]
@@ -16024,10 +15836,10 @@ sblk_xlc_prog_pages:
 	strb	w0, [x1, 59]
 	mov	w0, -1
 	strb	w0, [x1]
-	adrp	x0, .LANCHOR60
-	add	x0, x0, :lo12:.LANCHOR60
+	adrp	x0, .LANCHOR59
+	add	x0, x0, :lo12:.LANCHOR59
 	bl	buf_add_tail
-.L2624:
+.L2568:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -16035,11 +15847,11 @@ sblk_xlc_prog_pages:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2619:
+.L2563:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2618
-.L2622:
+	b	.L2562
+.L2566:
 	ldr	x5, [x7, 8]
 	mov	w4, w23
 	ldr	x6, [x7, 24]
@@ -16102,37 +15914,37 @@ sblk_xlc_prog_pages:
 	ldr	x6, [x0, 24]
 	ldrb	w0, [x7, 60]
 	bl	flash_start_tlc_page_prog
-	b	.L2623
-.L2621:
+	b	.L2567
+.L2565:
 	ldr	w19, [x3, 40]
-.L2625:
+.L2569:
 	mov	w1, 1
 	mov	w0, w19
 	bl	queue_lun_state
-	cbnz	w0, .L2626
+	cbnz	w0, .L2570
 	mov	w1, 1
 	mov	x0, x20
 	bl	queue_tlc_prog_cmd
 	mov	w1, 0
 	mov	x0, x22
 	bl	queue_tlc_prog_cmd
-.L2627:
+.L2571:
 	mov	w1, 1
 	mov	w0, w19
 	bl	queue_lun_state
-	cbz	w0, .L2624
+	cbz	w0, .L2568
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2627
-.L2626:
+	b	.L2571
+.L2570:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2625
-.L2620:
+	b	.L2569
+.L2564:
 	mov	w1, 1
 	mov	x0, x20
 	bl	queue_tlc_prog_cmd
-	b	.L2624
+	b	.L2568
 	.size	sblk_xlc_prog_pages, .-sblk_xlc_prog_pages
 	.section	.text.sblk_3d_mlc_prog_pages,"ax",@progbits
 	.align	2
@@ -16146,17 +15958,17 @@ sblk_3d_mlc_prog_pages:
 	stp	x21, x22, [sp, 32]
 	add	x21, x0, x1
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR32
-	adrp	x24, .LANCHOR60
+	adrp	x23, .LANCHOR31
+	adrp	x24, .LANCHOR59
 	str	x25, [sp, 64]
-	add	x23, x23, :lo12:.LANCHOR32
-	add	x24, x24, :lo12:.LANCHOR60
+	add	x23, x23, :lo12:.LANCHOR31
+	add	x24, x24, :lo12:.LANCHOR59
 	add	x25, x0, 8
 	stp	x19, x20, [sp, 16]
 	mov	w22, 1
-.L2631:
+.L2575:
 	cmp	x21, x25
-	bne	.L2634
+	bne	.L2578
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -16164,14 +15976,14 @@ sblk_3d_mlc_prog_pages:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2634:
+.L2578:
 	ldr	x0, [x25, -8]
 	ldr	w19, [x0, 40]
-.L2632:
+.L2576:
 	mov	w1, 1
 	mov	w0, w19
 	bl	queue_lun_state
-	cbnz	w0, .L2633
+	cbnz	w0, .L2577
 	ldr	x0, [x25, -8]
 	mov	w2, 24
 	ldrb	w1, [x23]
@@ -16203,7 +16015,7 @@ sblk_3d_mlc_prog_pages:
 	ldr	x4, [x0, 24]
 	mov	w0, 16
 	bl	flash_start_3d_mlc_page_prog
-	bl	nandc_de_cs.constprop.33
+	bl	nandc_de_cs.constprop.32
 	ldr	x1, [x25, -24]
 	mov	w0, 4
 	strb	w22, [x1, 59]
@@ -16212,11 +16024,11 @@ sblk_3d_mlc_prog_pages:
 	strb	w0, [x1]
 	mov	x0, x24
 	bl	buf_add_tail
-	b	.L2631
-.L2633:
+	b	.L2575
+.L2577:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2632
+	b	.L2576
 	.size	sblk_3d_mlc_prog_pages, .-sblk_3d_mlc_prog_pages
 	.section	.text.flash_prog_page_en,"ax",@progbits
 	.align	2
@@ -16230,63 +16042,63 @@ flash_prog_page_en:
 	and	w0, w5, 255
 	stp	x19, x20, [sp, 16]
 	str	w0, [x29, 124]
-	adrp	x0, .LANCHOR18
+	adrp	x0, .LANCHOR23
 	stp	x23, x24, [sp, 48]
 	mov	w20, w1
 	stp	x27, x28, [sp, 80]
 	mov	x23, x2
-	ldrb	w1, [x0, #:lo12:.LANCHOR18]
+	ldrb	w1, [x0, #:lo12:.LANCHOR23]
 	mov	x22, x3
 	stp	x25, x26, [sp, 64]
 	mov	w28, w4
 	ubfx	x24, x20, 24, 2
 	cmp	w1, w21
 	mov	x19, x0
-	bhi	.L2637
-	adrp	x1, .LANCHOR189
+	bhi	.L2581
+	adrp	x1, .LANCHOR186
 	adrp	x0, .LC0
-	mov	w2, 635
-	add	x1, x1, :lo12:.LANCHOR189
+	mov	w2, 642
+	add	x1, x1, :lo12:.LANCHOR186
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2637:
-	ldrb	w0, [x19, #:lo12:.LANCHOR18]
+.L2581:
+	ldrb	w0, [x19, #:lo12:.LANCHOR23]
 	cmp	w0, w21
-	bls	.L2648
-	adrp	x0, .LANCHOR30
-	add	x0, x0, :lo12:.LANCHOR30
+	bls	.L2592
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w27, [x0, w21, sxtw]
-	cbnz	w24, .L2650
+	cbnz	w24, .L2594
 	adrp	x0, .LANCHOR0
 	ldrb	w1, [x0, #:lo12:.LANCHOR0]
 	adrp	x0, .LANCHOR1
-	cbz	w1, .L2640
+	cbz	w1, .L2584
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
-	cbz	w1, .L2650
-.L2640:
+	cbz	w1, .L2594
+.L2584:
 	adrp	x1, .LANCHOR2
 	ldrb	w0, [x0, #:lo12:.LANCHOR1]
 	ldrh	w1, [x1, #:lo12:.LANCHOR2]
 	udiv	w19, w20, w1
 	mul	w19, w19, w1
 	sub	w1, w20, w19
-	cbz	w0, .L2641
+	cbz	w0, .L2585
 	add	w19, w19, w1, lsl 1
-.L2639:
-	adrp	x24, .LANCHOR14
-	adrp	x25, .LC147
-	add	x24, x24, :lo12:.LANCHOR14
-	add	x25, x25, :lo12:.LC147
-	adrp	x26, .LANCHOR175
-.L2645:
+.L2583:
+	adrp	x24, .LANCHOR19
+	adrp	x25, .LC144
+	add	x24, x24, :lo12:.LANCHOR19
+	add	x25, x25, :lo12:.LC144
+	adrp	x26, .LANCHOR172
+.L2589:
 	ldr	w0, [x24]
-	tbz	x0, 4, .L2642
+	tbz	x0, 4, .L2586
 	mov	w3, w19
 	mov	w2, w20
 	mov	w1, w27
 	mov	x0, x25
 	bl	printf
-.L2642:
+.L2586:
 	mov	w4, w28
 	mov	x3, x22
 	mov	x2, x23
@@ -16295,12 +16107,12 @@ flash_prog_page_en:
 	bl	flash_prog_page
 	mov	w5, w0
 	ldr	w0, [x29, 124]
-	cbz	w0, .L2643
-	adrp	x6, .LANCHOR176
-	ldr	x3, [x26, #:lo12:.LANCHOR175]
+	cbz	w0, .L2587
+	adrp	x6, .LANCHOR173
+	ldr	x3, [x26, #:lo12:.LANCHOR172]
 	mov	w4, w28
 	str	x6, [x29, 112]
-	ldr	x2, [x6, #:lo12:.LANCHOR176]
+	ldr	x2, [x6, #:lo12:.LANCHOR173]
 	mov	w1, w20
 	mov	w0, w21
 	str	w5, [x29, 104]
@@ -16310,78 +16122,78 @@ flash_prog_page_en:
 	mov	w4, w0
 	ccmn	w0, #1, 4, ne
 	mov	x7, x6
-	beq	.L2644
-	ldr	x0, [x6, #:lo12:.LANCHOR176]
+	beq	.L2588
+	ldr	x0, [x6, #:lo12:.LANCHOR173]
 	ldr	w1, [x23]
 	ldr	w5, [x29, 104]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	bne	.L2644
-	ldr	x0, [x26, #:lo12:.LANCHOR175]
+	bne	.L2588
+	ldr	x0, [x26, #:lo12:.LANCHOR172]
 	ldr	w1, [x22]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	beq	.L2643
-.L2644:
+	beq	.L2587
+.L2588:
 	str	w4, [x29, 112]
 	mov	w3, 4
 	str	x7, [x29, 104]
 	mov	w2, w3
 	mov	x1, x23
-	adrp	x0, .LC148
-	add	x0, x0, :lo12:.LC148
+	adrp	x0, .LC145
+	add	x0, x0, :lo12:.LC145
 	bl	rknand_print_hex
 	mov	w3, 4
 	mov	x1, x22
 	mov	w2, w3
-	adrp	x0, .LC149
-	add	x0, x0, :lo12:.LC149
+	adrp	x0, .LC146
+	add	x0, x0, :lo12:.LC146
 	bl	rknand_print_hex
-	adrp	x0, .LANCHOR175
+	adrp	x0, .LANCHOR172
 	mov	w3, 4
 	mov	w2, w3
-	ldr	x1, [x0, #:lo12:.LANCHOR175]
-	adrp	x0, .LC150
-	add	x0, x0, :lo12:.LC150
+	ldr	x1, [x0, #:lo12:.LANCHOR172]
+	adrp	x0, .LC147
+	add	x0, x0, :lo12:.LC147
 	bl	rknand_print_hex
 	ldr	x7, [x29, 104]
 	mov	w3, 4
-	adrp	x0, .LC151
+	adrp	x0, .LC148
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC151
-	ldr	x1, [x7, #:lo12:.LANCHOR176]
+	add	x0, x0, :lo12:.LC148
+	ldr	x1, [x7, #:lo12:.LANCHOR173]
 	bl	rknand_print_hex
 	ldr	w4, [x29, 112]
 	cmp	w4, 512
-	beq	.L2645
-.L2647:
+	beq	.L2589
+.L2591:
 	mov	w1, w20
-	adrp	x0, .LC152
-	add	x0, x0, :lo12:.LC152
+	adrp	x0, .LC149
+	add	x0, x0, :lo12:.LC149
 	bl	printf
-	adrp	x1, .LANCHOR189
+	adrp	x1, .LANCHOR186
 	adrp	x0, .LC0
-	mov	w2, 678
-	add	x1, x1, :lo12:.LANCHOR189
+	mov	w2, 685
+	add	x1, x1, :lo12:.LANCHOR186
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2648:
+.L2592:
 	mov	w0, -1
-	b	.L2636
-.L2641:
+	b	.L2580
+.L2585:
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
 	ldrh	w0, [x0, w1, uxtw 1]
 	add	w19, w0, w19
-	b	.L2639
-.L2650:
+	b	.L2583
+.L2594:
 	mov	w19, w20
-	b	.L2639
-.L2643:
+	b	.L2583
+.L2587:
 	mov	w0, w5
 	cmn	w5, #1
-	beq	.L2647
-.L2636:
+	beq	.L2591
+.L2580:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -16398,61 +16210,61 @@ ftl_test_block:
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR190
+	adrp	x24, .LANCHOR187
 	stp	x21, x22, [sp, 32]
 	and	w21, w0, 65535
-	ldr	x0, [x24, #:lo12:.LANCHOR190]
+	ldr	x0, [x24, #:lo12:.LANCHOR187]
 	mov	w23, 0
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR191
+	adrp	x25, .LANCHOR188
 	stp	x19, x20, [sp, 16]
 	adrp	x26, .LANCHOR112
 	stp	x27, x28, [sp, 80]
 	mov	w20, 0
 	str	wzr, [x0]
 	add	x0, x26, :lo12:.LANCHOR112
-	adrp	x27, .LANCHOR76
+	adrp	x27, .LANCHOR75
 	str	x0, [x29, 112]
-	str	wzr, [x25, #:lo12:.LANCHOR191]
-	add	x0, x27, :lo12:.LANCHOR76
+	str	wzr, [x25, #:lo12:.LANCHOR188]
+	add	x0, x27, :lo12:.LANCHOR75
 	str	x0, [x29, 96]
-.L2667:
+.L2611:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
 	cmp	w0, w20
-	bls	.L2677
-	add	x0, x27, :lo12:.LANCHOR76
+	bls	.L2621
+	add	x0, x27, :lo12:.LANCHOR75
 	mov	w22, 0
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR14
-	add	x0, x0, :lo12:.LANCHOR14
+	adrp	x0, .LANCHOR19
+	add	x0, x0, :lo12:.LANCHOR19
 	str	x0, [x29, 104]
-	b	.L2678
-.L2676:
+	b	.L2622
+.L2620:
 	ldr	x0, [x29, 104]
 	ldr	w0, [x0]
-	tbz	x0, 12, .L2668
-	adrp	x0, .LC153
+	tbz	x0, 12, .L2612
+	adrp	x0, .LC150
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC153
+	add	x0, x0, :lo12:.LC150
 	bl	printf
-.L2668:
+.L2612:
 	ldr	x0, [x29, 96]
 	ldrb	w19, [x0]
 	madd	w19, w21, w19, w22
 	and	w19, w19, 65535
-	cbnz	w20, .L2669
-	adrp	x0, .LANCHOR27
-	ldr	x0, [x0, #:lo12:.LANCHOR27]
+	cbnz	w20, .L2613
+	adrp	x0, .LANCHOR6
+	ldr	x0, [x0, #:lo12:.LANCHOR6]
 	ldrb	w0, [x0, 47]
 	cmp	w0, w19
-	bcs	.L2670
-.L2669:
+	bcs	.L2614
+.L2613:
 	and	w28, w20, 255
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_check_bad_block
-	cbnz	w0, .L2670
+	cbnz	w0, .L2614
 	adrp	x0, .LANCHOR111
 	mov	w1, w23
 	ldrh	w7, [x0, #:lo12:.LANCHOR111]
@@ -16460,62 +16272,62 @@ ftl_test_block:
 	mul	w26, w7, w19
 	mov	w2, w26
 	bl	flash_erase_block_en
-	cbz	w0, .L2671
-	adrp	x0, .LANCHOR79
-	ldrb	w0, [x0, #:lo12:.LANCHOR79]
+	cbz	w0, .L2615
+	adrp	x0, .LANCHOR78
+	ldrb	w0, [x0, #:lo12:.LANCHOR78]
 	cmp	w0, 2
-	bne	.L2693
+	bne	.L2637
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L2693
+	cbz	w0, .L2637
 	mov	w2, w26
 	mov	w1, 1
 	mov	w0, w28
 	bl	flash_erase_block_en
-	cbnz	w0, .L2693
-.L2675:
-	adrp	x0, .LANCHOR79
+	cbnz	w0, .L2637
+.L2619:
+	adrp	x0, .LANCHOR78
 	mov	w23, 1
-	ldrb	w0, [x0, #:lo12:.LANCHOR79]
+	ldrb	w0, [x0, #:lo12:.LANCHOR78]
 	add	w26, w26, w0, lsl 24
-.L2674:
+.L2618:
 	adrp	x0, .LANCHOR131
-	ldr	x2, [x24, #:lo12:.LANCHOR190]
+	ldr	x2, [x24, #:lo12:.LANCHOR187]
 	mov	w5, 1
-	add	x3, x25, :lo12:.LANCHOR191
+	add	x3, x25, :lo12:.LANCHOR188
 	ldrb	w4, [x0, #:lo12:.LANCHOR131]
 	mov	w1, w26
 	mov	w0, w28
 	bl	flash_prog_page_en
-	cbz	w0, .L2670
-.L2693:
+	cbz	w0, .L2614
+.L2637:
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_mask_bad_block
-.L2670:
+.L2614:
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L2678:
+.L2622:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, w22
-	bhi	.L2676
+	bhi	.L2620
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2667
-.L2671:
-	cbz	w23, .L2674
-	b	.L2675
-.L2677:
-	cbz	w23, .L2679
-	adrp	x0, .LANCHOR7
+	b	.L2611
+.L2615:
+	cbz	w23, .L2618
+	b	.L2619
+.L2621:
+	cbz	w23, .L2623
+	adrp	x0, .LANCHOR9
 	mov	w1, 2
-	ldr	x0, [x0, #:lo12:.LANCHOR7]
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	add	x21, x0, x21, uxth 2
 	ldrb	w0, [x21, 2]
 	bfi	w0, w1, 3, 2
 	strb	w0, [x21, 2]
-.L2679:
+.L2623:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -16550,18 +16362,18 @@ ftl_prog_page:
 	bl	flash_prog_page_en
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L2694
-	mov	w2, 2670
-	adrp	x1, .LANCHOR192
+	bne	.L2638
+	mov	w2, 2678
+	adrp	x1, .LANCHOR189
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR192
+	add	x1, x1, :lo12:.LANCHOR189
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	adrp	x0, .LC152
+	adrp	x0, .LC149
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC152
+	add	x0, x0, :lo12:.LC149
 	bl	printf
-.L2694:
+.L2638:
 	mov	w0, w19
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -16583,74 +16395,75 @@ ftl_info_flush:
 	adrp	x24, .LANCHOR110
 	ldrb	w2, [x21, #:lo12:.LANCHOR131]
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR193
+	adrp	x20, .LANCHOR190
 	str	w0, [x29, 116]
-	add	x0, x20, :lo12:.LANCHOR193
+	add	x0, x20, :lo12:.LANCHOR190
 	stp	x25, x26, [sp, 64]
 	lsl	w2, w2, 1
 	stp	x27, x28, [sp, 80]
 	bl	ftl_memset
 	ldr	x0, [x24, #:lo12:.LANCHOR110]
 	ldrh	w1, [x0, 74]
-	cbz	w1, .L2698
+	cmp	w1, 1
+	bls	.L2642
 	strh	wzr, [x0, 150]
-.L2698:
-	adrp	x23, .LANCHOR194
-	add	x19, x23, :lo12:.LANCHOR194
+.L2642:
+	adrp	x23, .LANCHOR191
+	add	x19, x23, :lo12:.LANCHOR191
 	adrp	x25, .LANCHOR111
 	mov	w26, 0
 	add	x0, x25, :lo12:.LANCHOR111
 	str	x0, [x29, 104]
-.L2711:
-	add	x0, x23, :lo12:.LANCHOR194
-	adrp	x22, .LANCHOR195
+.L2655:
+	add	x0, x23, :lo12:.LANCHOR191
+	adrp	x22, .LANCHOR192
 	ldrh	w1, [x25, #:lo12:.LANCHOR111]
-	add	x7, x20, :lo12:.LANCHOR193
+	add	x7, x20, :lo12:.LANCHOR190
 	str	w1, [x29, 120]
 	ldrh	w27, [x0, 2]
 	ldr	x0, [x24, #:lo12:.LANCHOR110]
 	ldrb	w1, [x21, #:lo12:.LANCHOR131]
-	ldrb	w28, [x23, #:lo12:.LANCHOR194]
+	ldrb	w28, [x23, #:lo12:.LANCHOR191]
 	ldr	w6, [x0, 4]
 	lsl	w1, w1, 9
 	add	w6, w6, 1
 	str	w6, [x0, 4]
 	ldr	w0, [x29, 116]
-	str	w0, [x20, #:lo12:.LANCHOR193]
-	ldr	x0, [x22, #:lo12:.LANCHOR195]
+	str	w0, [x20, #:lo12:.LANCHOR190]
+	ldr	x0, [x22, #:lo12:.LANCHOR192]
 	str	w6, [x7, 4]
 	bl	js_hash
 	str	w0, [x7, 8]
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2699
-	adrp	x0, .LC154
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L2643
+	adrp	x0, .LC151
 	mov	w3, w6
 	mov	w2, w27
 	mov	w1, w28
-	add	x0, x0, :lo12:.LC154
+	add	x0, x0, :lo12:.LC151
 	bl	printf
-.L2699:
-	adrp	x1, .LANCHOR95
+.L2643:
+	adrp	x1, .LANCHOR94
 	ldrh	w0, [x19, 2]
-	ldrh	w1, [x1, #:lo12:.LANCHOR95]
+	ldrh	w1, [x1, #:lo12:.LANCHOR94]
 	cmp	w1, w0
-	bhi	.L2700
-	adrp	x27, .LANCHOR196
+	bhi	.L2644
+	adrp	x27, .LANCHOR193
 	adrp	x3, .LC0
-	add	x27, x27, :lo12:.LANCHOR196
+	add	x27, x27, :lo12:.LANCHOR193
 	add	x3, x3, :lo12:.LC0
-.L2707:
+.L2651:
 	ldrb	w0, [x19, 1]
-	adrp	x28, .LANCHOR27
+	adrp	x28, .LANCHOR6
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x19, 1]
 	cmp	w0, 7
-	bls	.L2701
+	bls	.L2645
 	mov	x0, 0
-.L2706:
-	ldr	x2, [x28, #:lo12:.LANCHOR27]
+.L2650:
+	ldr	x2, [x28, #:lo12:.LANCHOR6]
 	add	w1, w0, 8
 	and	w26, w0, 65535
 	add	x1, x2, x1, sxtw
@@ -16658,24 +16471,24 @@ ftl_info_flush:
 	add	w1, w2, 127
 	and	w1, w1, 255
 	cmp	w1, 125
-	bhi	.L2702
+	bhi	.L2646
 	mov	x0, x3
 	str	x3, [x29, 120]
-	mov	w2, 841
+	mov	w2, 846
 	mov	x1, x27
 	bl	printf
 	ldr	x3, [x29, 120]
-.L2705:
+.L2649:
 	strb	w26, [x19, 1]
 	mov	w26, 1
-.L2701:
-	ldr	x0, [x28, #:lo12:.LANCHOR27]
+.L2645:
+	ldr	x0, [x28, #:lo12:.LANCHOR6]
 	ldrb	w1, [x19, 1]
 	add	x0, x0, x1
 	ldrb	w28, [x0, 40]
 	strb	w28, [x19]
 	cmp	w28, 255
-	beq	.L2707
+	beq	.L2651
 	ldr	x0, [x29, 104]
 	ldrh	w27, [x0]
 	mov	w0, 0
@@ -16684,60 +16497,60 @@ ftl_info_flush:
 	bl	flash_erase_block
 	ldrb	w4, [x21, #:lo12:.LANCHOR131]
 	mov	w1, w27
-	ldr	x2, [x22, #:lo12:.LANCHOR195]
-	add	x3, x20, :lo12:.LANCHOR193
+	ldr	x2, [x22, #:lo12:.LANCHOR192]
+	add	x3, x20, :lo12:.LANCHOR190
 	mov	w0, 0
 	add	w27, w27, 1
 	bl	ftl_prog_page
 	mov	w0, 1
 	strh	w0, [x19, 2]
-.L2708:
+.L2652:
 	ldrb	w4, [x21, #:lo12:.LANCHOR131]
 	mov	w1, w27
-	ldr	x2, [x22, #:lo12:.LANCHOR195]
-	add	x3, x20, :lo12:.LANCHOR193
+	ldr	x2, [x22, #:lo12:.LANCHOR192]
+	add	x3, x20, :lo12:.LANCHOR190
 	mov	w0, 0
 	bl	ftl_prog_page
 	cmn	w0, #1
 	ldrh	w1, [x19, 2]
-	adrp	x0, .LANCHOR197
+	adrp	x0, .LANCHOR194
 	add	w1, w1, 1
 	strh	w1, [x19, 2]
-	beq	.L2709
-	ldrb	w1, [x0, #:lo12:.LANCHOR197]
-	cbz	w1, .L2710
-.L2709:
-	strb	wzr, [x0, #:lo12:.LANCHOR197]
-	b	.L2711
-.L2702:
+	beq	.L2653
+	ldrb	w1, [x0, #:lo12:.LANCHOR194]
+	cbz	w1, .L2654
+.L2653:
+	strb	wzr, [x0, #:lo12:.LANCHOR194]
+	b	.L2655
+.L2646:
 	cmp	w2, 255
-	bne	.L2705
+	bne	.L2649
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L2706
+	bne	.L2650
 	mov	w26, w0
-	b	.L2705
-.L2700:
+	b	.L2649
+.L2644:
 	ldr	w1, [x29, 120]
 	madd	w27, w1, w28, w27
-	cbnz	w0, .L2708
+	cbnz	w0, .L2652
 	mov	w1, w27
 	bl	flash_erase_block
-	b	.L2708
-.L2710:
-	cbnz	w26, .L2712
-.L2720:
-	adrp	x0, .LANCHOR194
-	ldrb	w0, [x0, #:lo12:.LANCHOR194]
+	b	.L2652
+.L2654:
+	cbnz	w26, .L2656
+.L2664:
+	adrp	x0, .LANCHOR191
+	ldrb	w0, [x0, #:lo12:.LANCHOR191]
 	cmp	w0, 255
-	bne	.L2714
-	adrp	x1, .LANCHOR196
+	bne	.L2658
+	adrp	x1, .LANCHOR193
 	adrp	x0, .LC0
-	mov	w2, 885
-	add	x1, x1, :lo12:.LANCHOR196
+	mov	w2, 890
+	add	x1, x1, :lo12:.LANCHOR193
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2714:
+.L2658:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -16746,43 +16559,43 @@ ftl_info_flush:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2712:
+.L2656:
 	ldrb	w19, [x19, 1]
-	adrp	x20, .LANCHOR196
+	adrp	x20, .LANCHOR193
 	adrp	x21, .LC0
-	add	x20, x20, :lo12:.LANCHOR196
+	add	x20, x20, :lo12:.LANCHOR193
 	add	w19, w19, 1
 	add	x21, x21, :lo12:.LC0
-	adrp	x22, .LANCHOR27
-.L2715:
+	adrp	x22, .LANCHOR6
+.L2659:
 	cmp	w19, 7
-	bhi	.L2720
-	ldr	x1, [x22, #:lo12:.LANCHOR27]
+	bhi	.L2664
+	ldr	x1, [x22, #:lo12:.LANCHOR6]
 	add	w0, w19, 8
 	add	x0, x1, x0, sxtw
 	ldrb	w23, [x0, 32]
 	add	w0, w23, 127
 	and	w0, w0, 255
 	cmp	w0, 125
-	bhi	.L2716
-	mov	w2, 876
+	bhi	.L2660
+	mov	w2, 881
 	mov	x1, x20
 	mov	x0, x21
 	bl	printf
-.L2717:
+.L2661:
 	adrp	x0, .LANCHOR111
 	ldrh	w1, [x0, #:lo12:.LANCHOR111]
 	mov	w0, 0
 	mul	w1, w1, w23
 	bl	flash_erase_block
-	b	.L2718
-.L2716:
+	b	.L2662
+.L2660:
 	cmp	w23, 255
-	bne	.L2717
-.L2718:
+	bne	.L2661
+.L2662:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L2715
+	b	.L2659
 	.size	ftl_info_flush, .-ftl_info_flush
 	.section	.text.ftl_info_blk_init,"ax",@progbits
 	.align	2
@@ -16790,28 +16603,28 @@ ftl_info_flush:
 	.type	ftl_info_blk_init, %function
 ftl_info_blk_init:
 	stp	x29, x30, [sp, -112]!
-	adrp	x0, .LANCHOR198
-	adrp	x1, .LANCHOR197
+	adrp	x0, .LANCHOR195
+	adrp	x1, .LANCHOR194
 	mov	w2, 16384
 	add	x29, sp, 0
-	strb	wzr, [x0, #:lo12:.LANCHOR198]
+	strb	wzr, [x0, #:lo12:.LANCHOR195]
 	mov	w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR197]
-	adrp	x1, .LANCHOR199
+	strb	w0, [x1, #:lo12:.LANCHOR194]
+	adrp	x1, .LANCHOR196
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR195
-	strb	w0, [x1, #:lo12:.LANCHOR199]
-	adrp	x1, .LANCHOR7
-	ldr	x0, [x21, #:lo12:.LANCHOR195]
+	adrp	x21, .LANCHOR192
+	strb	w0, [x1, #:lo12:.LANCHOR196]
+	adrp	x1, .LANCHOR9
+	ldr	x0, [x21, #:lo12:.LANCHOR192]
 	mov	x22, 7
-	str	x0, [x1, #:lo12:.LANCHOR7]
-	adrp	x1, .LANCHOR6
+	str	x0, [x1, #:lo12:.LANCHOR9]
+	adrp	x1, .LANCHOR8
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR110
-	ldrh	w1, [x1, #:lo12:.LANCHOR6]
-	adrp	x20, .LANCHOR194
+	ldrh	w1, [x1, #:lo12:.LANCHOR8]
+	adrp	x20, .LANCHOR191
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR27
+	adrp	x23, .LANCHOR6
 	stp	x25, x26, [sp, 64]
 	adrp	x24, .LANCHOR131
 	add	x1, x0, x1, lsl 2
@@ -16820,50 +16633,50 @@ ftl_info_blk_init:
 	mov	w1, 0
 	bl	ftl_memset
 	adrp	x26, .LANCHOR111
-	adrp	x0, .LANCHOR200
+	adrp	x0, .LANCHOR197
 	mov	w1, 0
 	mov	w2, 16384
 	mov	w27, 21574
-	ldr	x0, [x0, #:lo12:.LANCHOR200]
+	ldr	x0, [x0, #:lo12:.LANCHOR197]
 	add	x26, x26, :lo12:.LANCHOR111
 	add	x24, x24, :lo12:.LANCHOR131
 	movk	w27, 0x494c, lsl 16
 	bl	ftl_memset
-	ldr	x1, [x23, #:lo12:.LANCHOR27]
-	add	x0, x20, :lo12:.LANCHOR194
+	ldr	x1, [x23, #:lo12:.LANCHOR6]
+	add	x0, x20, :lo12:.LANCHOR191
 	strb	wzr, [x0, 1]
 	ldrb	w1, [x1, 40]
-	strb	w1, [x20, #:lo12:.LANCHOR194]
+	strb	w1, [x20, #:lo12:.LANCHOR191]
 	strh	wzr, [x0, 2]
-.L2739:
-	ldr	x1, [x23, #:lo12:.LANCHOR27]
+.L2680:
+	ldr	x1, [x23, #:lo12:.LANCHOR6]
 	add	w0, w22, 8
 	sxth	w25, w22
 	mov	w28, w22
 	add	x0, x1, x0, sxtw
 	ldrb	w0, [x0, 32]
 	cmp	w0, 255
-	bne	.L2738
-.L2743:
+	bne	.L2679
+.L2684:
 	sub	x22, x22, #1
 	cmn	x22, #1
-	bne	.L2739
+	bne	.L2680
 	mov	w25, 0
-.L2740:
-	adrp	x24, .LANCHOR14
-	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2744
+.L2681:
+	adrp	x24, .LANCHOR19
+	ldr	w0, [x24, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L2685
 	ldr	x0, [x19, #:lo12:.LANCHOR110]
 	mov	w2, 4800
 	mov	w1, w22
 	ldr	w3, [x0]
-	adrp	x0, .LC156
-	add	x0, x0, :lo12:.LC156
+	adrp	x0, .LC153
+	add	x0, x0, :lo12:.LC153
 	bl	printf
-.L2744:
+.L2685:
 	cmn	w22, #1
-	bne	.L2745
-	ldr	x0, [x21, #:lo12:.LANCHOR195]
+	bne	.L2686
+	ldr	x0, [x21, #:lo12:.LANCHOR192]
 	mov	w1, 0
 	mov	w2, 16384
 	bl	ftl_memset
@@ -16871,11 +16684,11 @@ ftl_info_blk_init:
 	mov	w1, 21574
 	movk	w1, 0x494c, lsl 16
 	str	w1, [x0]
-	mov	w1, 35
+	mov	w1, 36
 	movk	w1, 0x6, lsl 16
 	str	w1, [x0, 12]
 	mov	w0, w22
-.L2737:
+.L2678:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -16883,12 +16696,12 @@ ftl_info_blk_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2738:
+.L2679:
 	ldrh	w6, [x26]
-	adrp	x7, .LANCHOR193
+	adrp	x7, .LANCHOR190
 	ldrb	w4, [x24]
-	add	x7, x7, :lo12:.LANCHOR193
-	ldr	x2, [x21, #:lo12:.LANCHOR195]
+	add	x7, x7, :lo12:.LANCHOR190
+	ldr	x2, [x21, #:lo12:.LANCHOR192]
 	mov	x3, x7
 	str	x7, [x29, 96]
 	mul	w6, w6, w0
@@ -16900,87 +16713,87 @@ ftl_info_blk_init:
 	cmn	w0, #1
 	ldr	w6, [x29, 108]
 	ldr	x7, [x29, 96]
-	bne	.L2741
+	bne	.L2682
 	ldrb	w4, [x24]
 	mov	x3, x7
-	ldr	x2, [x21, #:lo12:.LANCHOR195]
+	ldr	x2, [x21, #:lo12:.LANCHOR192]
 	add	w1, w6, 1
 	mov	w0, 0
 	bl	ftl_read_page
 	mov	w5, w0
-.L2741:
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2742
+.L2682:
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L2683
 	ldr	x0, [x19, #:lo12:.LANCHOR110]
 	mov	w2, w5
 	str	w5, [x29, 108]
-	mov	w3, 744
+	mov	w3, 749
 	mov	w1, w28
 	ldr	w4, [x0]
-	adrp	x0, .LC155
-	add	x0, x0, :lo12:.LC155
+	adrp	x0, .LC152
+	add	x0, x0, :lo12:.LC152
 	bl	printf
 	ldr	w5, [x29, 108]
-.L2742:
+.L2683:
 	cmn	w5, #1
-	beq	.L2743
+	beq	.L2684
 	ldr	x0, [x19, #:lo12:.LANCHOR110]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L2743
+	bne	.L2684
 	mov	w22, w25
-	b	.L2740
-.L2745:
-	ldr	x1, [x23, #:lo12:.LANCHOR27]
+	b	.L2681
+.L2686:
+	ldr	x1, [x23, #:lo12:.LANCHOR6]
 	add	w0, w25, 8
-	ldr	x2, [x21, #:lo12:.LANCHOR195]
+	ldr	x2, [x21, #:lo12:.LANCHOR192]
 	mov	w4, 4
 	adrp	x26, .LANCHOR131
 	mov	w28, 21574
 	add	x0, x1, x0, sxtw
-	adrp	x27, .LC157
+	adrp	x27, .LC154
 	add	x26, x26, :lo12:.LANCHOR131
-	add	x27, x27, :lo12:.LC157
+	add	x27, x27, :lo12:.LC154
 	movk	w28, 0x494c, lsl 16
 	ldrb	w1, [x0, 32]
-	add	x0, x20, :lo12:.LANCHOR194
-	strb	w1, [x20, #:lo12:.LANCHOR194]
+	add	x0, x20, :lo12:.LANCHOR191
+	strb	w1, [x20, #:lo12:.LANCHOR191]
 	strb	w25, [x0, 1]
-	adrp	x25, .LANCHOR193
+	adrp	x25, .LANCHOR190
 	mov	w0, 0
-	add	x3, x25, :lo12:.LANCHOR193
+	add	x3, x25, :lo12:.LANCHOR190
 	bl	flash_get_last_written_page
 	sxth	w22, w0
 	add	w0, w0, 1
-	ldrb	w23, [x20, #:lo12:.LANCHOR194]
+	ldrb	w23, [x20, #:lo12:.LANCHOR191]
 	and	w0, w0, 65535
 	str	w0, [x29, 108]
 	adrp	x0, .LANCHOR111
 	ldrh	w0, [x0, #:lo12:.LANCHOR111]
 	madd	w23, w23, w0, w22
-.L2747:
-	tbnz	w22, #31, .L2751
+.L2688:
+	tbnz	w22, #31, .L2692
 	ldrb	w4, [x26]
-	add	x5, x25, :lo12:.LANCHOR193
-	ldr	x2, [x21, #:lo12:.LANCHOR195]
+	add	x5, x25, :lo12:.LANCHOR190
+	ldr	x2, [x21, #:lo12:.LANCHOR192]
 	mov	x3, x5
 	mov	w1, w23
 	mov	w0, 0
 	str	x5, [x29, 96]
 	bl	ftl_read_page
 	cmn	w0, #1
-	beq	.L2748
+	beq	.L2689
 	ldr	x0, [x19, #:lo12:.LANCHOR110]
 	ldr	x5, [x29, 96]
 	ldr	w0, [x0]
 	cmp	w0, w28
-	bne	.L2748
+	bne	.L2689
 	ldr	w6, [x5, 8]
-	cbnz	w6, .L2749
-.L2751:
+	cbnz	w6, .L2690
+.L2692:
 	ldrh	w0, [x29, 108]
-	add	x20, x20, :lo12:.LANCHOR194
+	add	x20, x20, :lo12:.LANCHOR191
 	strh	w0, [x20, 2]
 	bl	ftl_tmp_into_update
 	ldr	x1, [x19, #:lo12:.LANCHOR110]
@@ -16991,33 +16804,33 @@ ftl_info_blk_init:
 	bl	ftl_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbnz	x0, 14, .L2750
-.L2767:
+	ldr	w0, [x24, #:lo12:.LANCHOR19]
+	tbnz	x0, 14, .L2691
+.L2708:
 	mov	w0, 0
-	b	.L2737
-.L2749:
-	ldr	x0, [x21, #:lo12:.LANCHOR195]
+	b	.L2678
+.L2690:
+	ldr	x0, [x21, #:lo12:.LANCHOR192]
 	ldrb	w1, [x26]
 	lsl	w1, w1, 9
 	bl	js_hash
 	cmp	w6, w0
-	beq	.L2751
+	beq	.L2692
 	mov	w1, w6
 	mov	x0, x27
 	bl	printf
-.L2748:
+.L2689:
 	sub	w22, w22, #1
 	sub	w23, w23, #1
 	sxth	w22, w22
-	b	.L2747
-.L2750:
+	b	.L2688
+.L2691:
 	ldr	x0, [x19, #:lo12:.LANCHOR110]
 	ldr	w1, [x0, 156]
-	adrp	x0, .LC158
-	add	x0, x0, :lo12:.LC158
+	adrp	x0, .LC155
+	add	x0, x0, :lo12:.LC155
 	bl	printf
-	b	.L2767
+	b	.L2708
 	.size	ftl_info_blk_init, .-ftl_info_blk_init
 	.section	.text.ftl_ext_info_flush,"ax",@progbits
 	.align	2
@@ -17025,30 +16838,30 @@ ftl_info_blk_init:
 	.type	ftl_ext_info_flush, %function
 ftl_ext_info_flush:
 	stp	x29, x30, [sp, -96]!
-	adrp	x0, .LANCHOR10
+	adrp	x0, .LANCHOR12
 	add	x29, sp, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	ldr	x0, [x0, #:lo12:.LANCHOR12]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	ldr	w1, [x0, 520]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbz	w1, .L2769
+	cbz	w1, .L2710
 	str	wzr, [x0, 520]
-.L2769:
-	adrp	x20, .LANCHOR95
-	adrp	x22, .LANCHOR201
-	adrp	x21, .LANCHOR32
-	add	x20, x20, :lo12:.LANCHOR95
-	add	x22, x22, :lo12:.LANCHOR201
-	add	x21, x21, :lo12:.LANCHOR32
+.L2710:
+	adrp	x20, .LANCHOR94
+	adrp	x22, .LANCHOR198
+	adrp	x21, .LANCHOR31
+	add	x20, x20, :lo12:.LANCHOR94
+	add	x22, x22, :lo12:.LANCHOR198
+	add	x21, x21, :lo12:.LANCHOR31
 	mov	w0, 0
 	bl	ftl_total_vpn_update
-.L2770:
+.L2711:
 	adrp	x23, .LANCHOR110
 	mov	x24, x23
-.L2773:
+.L2714:
 	ldr	x0, [x23, #:lo12:.LANCHOR110]
 	ldr	w1, [x0, 56]
 	add	w1, w1, 1
@@ -17056,29 +16869,29 @@ ftl_ext_info_flush:
 	ldrh	w1, [x0, 140]
 	ldrh	w0, [x20]
 	cmp	w1, w0
-	bcc	.L2771
+	bcc	.L2712
 	bl	ftl_ext_alloc_new_blk
-.L2771:
+.L2712:
 	ldr	x0, [x24, #:lo12:.LANCHOR110]
 	ldrh	w1, [x0, 130]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2772
+	bne	.L2713
 	adrp	x0, .LC0
-	mov	w2, 2203
+	mov	w2, 2211
 	mov	x1, x22
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2772:
+.L2713:
 	ldrb	w19, [x21]
 	mov	w0, 24
 	ldr	x1, [x24, #:lo12:.LANCHOR110]
 	adrp	x26, .LANCHOR131
 	sub	w19, w0, w19
-	adrp	x0, .LANCHOR75
-	adrp	x27, .LANCHOR193
-	add	x25, x27, :lo12:.LANCHOR193
-	ldrh	w0, [x0, #:lo12:.LANCHOR75]
+	adrp	x0, .LANCHOR74
+	adrp	x27, .LANCHOR190
+	add	x25, x27, :lo12:.LANCHOR190
+	ldrh	w0, [x0, #:lo12:.LANCHOR74]
 	ldrh	w2, [x1, 130]
 	sub	w0, w19, w0
 	mov	w19, 1
@@ -17098,12 +16911,12 @@ ftl_ext_info_flush:
 	bl	ftl_memset
 	ldr	x0, [x24, #:lo12:.LANCHOR110]
 	ldrb	w7, [x26, #:lo12:.LANCHOR131]
-	str	wzr, [x27, #:lo12:.LANCHOR193]
+	str	wzr, [x27, #:lo12:.LANCHOR190]
 	ldr	w0, [x0, 56]
 	lsl	w1, w7, 9
 	str	w0, [x25, 4]
-	adrp	x0, .LANCHOR200
-	ldr	x6, [x0, #:lo12:.LANCHOR200]
+	adrp	x0, .LANCHOR197
+	ldr	x6, [x0, #:lo12:.LANCHOR197]
 	mov	x0, x6
 	bl	js_hash
 	mov	x2, x6
@@ -17119,16 +16932,16 @@ ftl_ext_info_flush:
 	and	w1, w1, 65535
 	strh	w1, [x2, 140]
 	cmp	w1, 1
-	beq	.L2773
+	beq	.L2714
 	cmn	w0, #1
-	adrp	x0, .LANCHOR199
-	beq	.L2774
-	ldrb	w1, [x0, #:lo12:.LANCHOR199]
-	cbz	w1, .L2775
-.L2774:
-	strb	wzr, [x0, #:lo12:.LANCHOR199]
-	b	.L2770
-.L2775:
+	adrp	x0, .LANCHOR196
+	beq	.L2715
+	ldrb	w1, [x0, #:lo12:.LANCHOR196]
+	cbz	w1, .L2716
+.L2715:
+	strb	wzr, [x0, #:lo12:.LANCHOR196]
+	b	.L2711
+.L2716:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -17145,7 +16958,7 @@ ftl_ext_info_flush:
 ftl_ext_info_init:
 	stp	x29, x30, [sp, -128]!
 	adrp	x0, .LANCHOR121
-	adrp	x2, .LANCHOR75
+	adrp	x2, .LANCHOR74
 	mov	w4, 4
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
@@ -17153,19 +16966,19 @@ ftl_ext_info_init:
 	strh	wzr, [x0, #:lo12:.LANCHOR121]
 	ldr	x0, [x20, #:lo12:.LANCHOR110]
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR200
+	adrp	x21, .LANCHOR197
 	stp	x27, x28, [sp, 80]
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR193
+	adrp	x24, .LANCHOR190
 	ldrh	w1, [x0, 130]
-	adrp	x0, .LANCHOR32
+	adrp	x0, .LANCHOR31
 	stp	x25, x26, [sp, 64]
-	add	x3, x24, :lo12:.LANCHOR193
-	ldrb	w19, [x0, #:lo12:.LANCHOR32]
+	add	x3, x24, :lo12:.LANCHOR190
+	ldrb	w19, [x0, #:lo12:.LANCHOR31]
 	mov	w0, 24
 	sub	w0, w0, w19
-	ldrh	w19, [x2, #:lo12:.LANCHOR75]
-	ldr	x2, [x21, #:lo12:.LANCHOR200]
+	ldrh	w19, [x2, #:lo12:.LANCHOR74]
+	ldr	x2, [x21, #:lo12:.LANCHOR197]
 	sub	w0, w0, w19
 	mov	w19, 1
 	lsl	w19, w19, w0
@@ -17177,21 +16990,21 @@ ftl_ext_info_init:
 	mov	w0, w27
 	bl	flash_get_last_written_page
 	sxth	w23, w0
-	adrp	x0, .LANCHOR14
+	adrp	x0, .LANCHOR19
 	stp	x0, x24, [x29, 112]
-	ldr	w1, [x0, #:lo12:.LANCHOR14]
-	tbz	x1, 12, .L2786
+	ldr	w1, [x0, #:lo12:.LANCHOR19]
+	tbz	x1, 12, .L2727
 	ldr	x0, [x20, #:lo12:.LANCHOR110]
-	adrp	x1, .LANCHOR202
+	adrp	x1, .LANCHOR199
 	and	w4, w22, 65535
 	mov	w3, w23
-	mov	w2, 2248
-	add	x1, x1, :lo12:.LANCHOR202
+	mov	w2, 2256
+	add	x1, x1, :lo12:.LANCHOR199
 	ldrh	w5, [x0, 130]
-	adrp	x0, .LC159
-	add	x0, x0, :lo12:.LC159
+	adrp	x0, .LC156
+	add	x0, x0, :lo12:.LC156
 	bl	printf
-.L2786:
+.L2727:
 	adrp	x25, .LANCHOR131
 	adrp	x26, .LANCHOR111
 	mov	w28, 20038
@@ -17199,16 +17012,16 @@ ftl_ext_info_init:
 	add	x26, x26, :lo12:.LANCHOR111
 	mov	w24, 0
 	movk	w28, 0x4549, lsl 16
-.L2787:
+.L2728:
 	and	w22, w23, 65535
 	sub	w0, w22, w24
-	tbnz	x0, 15, .L2792
+	tbnz	x0, 15, .L2733
 	ldr	x0, [x29, 120]
 	sub	w1, w23, w24
 	ldrb	w4, [x25]
-	add	x5, x0, :lo12:.LANCHOR193
+	add	x5, x0, :lo12:.LANCHOR190
 	ldrh	w0, [x26]
-	ldr	x2, [x21, #:lo12:.LANCHOR200]
+	ldr	x2, [x21, #:lo12:.LANCHOR197]
 	mov	x3, x5
 	str	x5, [x29, 104]
 	madd	w1, w0, w19, w1
@@ -17216,28 +17029,28 @@ ftl_ext_info_init:
 	bl	flash_read_page_en
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2788
-	adrp	x0, .LANCHOR10
+	beq	.L2729
+	adrp	x0, .LANCHOR12
 	ldr	x5, [x29, 104]
-	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	ldr	x0, [x0, #:lo12:.LANCHOR12]
 	ldr	w0, [x0]
 	cmp	w0, w28
-	bne	.L2788
+	bne	.L2729
 	ldr	w6, [x5, 8]
-	cbnz	w6, .L2789
-.L2792:
+	cbnz	w6, .L2730
+.L2733:
 	bl	zftl_sblk_list_init
 	ldr	x0, [x20, #:lo12:.LANCHOR110]
 	ldrh	w1, [x0, 140]
 	cmp	w1, w23
-	bgt	.L2791
+	bgt	.L2732
 	add	w22, w22, 1
 	strh	w22, [x0, 140]
 	bl	ftl_ext_info_flush
-.L2791:
-	adrp	x0, .LANCHOR10
+.L2732:
+	adrp	x0, .LANCHOR12
 	mov	w1, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	ldr	x0, [x0, #:lo12:.LANCHOR12]
 	strh	w1, [x0, 584]
 	strh	w1, [x0, 586]
 	strh	w1, [x0, 588]
@@ -17250,21 +17063,21 @@ ftl_ext_info_init:
 	str	wzr, [x0, 520]
 	str	wzr, [x0, 604]
 	str	wzr, [x0, 608]
-	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 12, .L2794
+	ldr	w1, [x1, #:lo12:.LANCHOR19]
+	tbz	x1, 12, .L2735
 	ldr	w3, [x0, 12]
-	adrp	x1, .LANCHOR202
-	adrp	x0, .LC161
+	adrp	x1, .LANCHOR199
+	adrp	x0, .LC158
 	mov	w4, 0
 	mov	w2, 0
-	add	x1, x1, :lo12:.LANCHOR202
-	add	x0, x0, :lo12:.LC161
+	add	x1, x1, :lo12:.LANCHOR199
+	add	x0, x0, :lo12:.LC158
 	bl	printf
-.L2794:
-	adrp	x0, .LANCHOR73
+.L2735:
+	adrp	x0, .LANCHOR72
 	mov	w1, -1
 	ldp	x19, x20, [sp, 16]
-	strh	w1, [x0, #:lo12:.LANCHOR73]
+	strh	w1, [x0, #:lo12:.LANCHOR72]
 	ldp	x21, x22, [sp, 32]
 	mov	w0, 0
 	ldp	x23, x24, [sp, 48]
@@ -17272,1041 +17085,1784 @@ ftl_ext_info_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2789:
-	ldr	x0, [x21, #:lo12:.LANCHOR200]
+.L2730:
+	ldr	x0, [x21, #:lo12:.LANCHOR197]
 	ldrb	w1, [x25]
 	lsl	w1, w1, 9
 	bl	js_hash
 	cmp	w6, w0
-	beq	.L2792
-	adrp	x0, .LC160
+	beq	.L2733
+	adrp	x0, .LC157
 	mov	w1, w6
-	add	x0, x0, :lo12:.LC160
+	add	x0, x0, :lo12:.LC157
 	bl	printf
-.L2788:
+.L2729:
 	add	w24, w24, 1
-	b	.L2787
+	b	.L2728
 	.size	ftl_ext_info_init, .-ftl_ext_info_init
-	.section	.text.ftl_low_format_data_init,"ax",@progbits
+	.section	.text.ftl_prog_ppa_page,"ax",@progbits
 	.align	2
-	.global	ftl_low_format_data_init
-	.type	ftl_low_format_data_init, %function
-ftl_low_format_data_init:
+	.global	ftl_prog_ppa_page
+	.type	ftl_prog_ppa_page, %function
+ftl_prog_ppa_page:
+	adrp	x4, .LANCHOR31
+	mov	w5, 1
+	ldrb	w6, [x4, #:lo12:.LANCHOR31]
+	mov	w4, 24
+	sub	w4, w4, w6
+	lsl	w7, w5, w4
+	sub	w7, w7, #1
+	lsl	w5, w5, w6
+	sub	w6, w5, #1
+	lsr	w5, w0, w4
+	mov	w4, w3
+	mov	x3, x2
+	mov	x2, x1
+	and	w1, w7, w0
+	and	w0, w6, w5
+	b	ftl_prog_page
+	.size	ftl_prog_ppa_page, .-ftl_prog_ppa_page
+	.section	.text.ftl_write_last_log_page,"ax",@progbits
+	.align	2
+	.global	ftl_write_last_log_page
+	.type	ftl_write_last_log_page, %function
+ftl_write_last_log_page:
+	ldrh	w1, [x0, 6]
+	cmp	w1, 1
+	bne	.L2749
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LANCHOR200
-	mov	w2, 16384
-	mov	w1, 0
+	adrp	x1, .LANCHOR117
 	add	x29, sp, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR200]
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR110
-	str	x21, [sp, 32]
-	bl	ftl_memset
-	bl	zftl_sblk_list_init
-	mov	w0, 1
-	bl	ftl_alloc_sblk
-	mov	w1, 0
+	mov	x19, x0
+	stp	x21, x22, [sp, 32]
+	ldr	x20, [x1, #:lo12:.LANCHOR117]
+	ldrh	w22, [x0, 12]
+	bl	ftl_get_new_free_page
 	mov	w21, w0
-	bl	ftl_erase_sblk
-	ldr	x1, [x19, #:lo12:.LANCHOR110]
+	cmn	w0, #1
+	beq	.L2750
+	ldrh	w0, [x19]
+	add	x20, x20, x22, uxth 2
+	bl	ftl_vpn_decrement
+	adrp	x0, .LANCHOR188
+	mov	w1, 15555
+	add	x7, x0, :lo12:.LANCHOR188
+	movk	w1, 0xf55f, lsl 16
+	str	w1, [x0, #:lo12:.LANCHOR188]
+	adrp	x0, .LANCHOR94
+	ldrh	w1, [x0, #:lo12:.LANCHOR94]
+	adrp	x0, .LANCHOR79
+	ldrb	w0, [x0, #:lo12:.LANCHOR79]
+	mul	w1, w1, w0
+	mov	x0, x20
+	lsl	w1, w1, 2
+	bl	js_hash
+	mov	x1, x7
+	mov	x2, 0
+	stp	w0, wzr, [x7, 4]
+	mov	w0, 2
+	str	wzr, [x7, 12]
+	str	wzr, [x1, 16]!
+	bl	ftl_debug_info_fill
+	mov	x2, x7
+	adrp	x0, .LANCHOR131
+	mov	x1, x20
+	ldrb	w3, [x0, #:lo12:.LANCHOR131]
 	mov	w0, w21
-	add	x1, x1, 672
-	bl	ftl_get_blk_list_in_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR110]
-	ldrh	w20, [x0, 672]
-	strh	wzr, [x0, 690]
-	mov	w0, 65533
-	sub	w1, w20, #1
-	cmp	w0, w1, uxth
-	bcs	.L2806
-	adrp	x1, .LANCHOR203
-	adrp	x0, .LC0
-	mov	w2, 2476
-	add	x1, x1, :lo12:.LANCHOR203
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2806:
-	ldr	x0, [x19, #:lo12:.LANCHOR110]
-	mov	w2, 256
-	mov	w1, 255
-	add	x0, x0, 416
-	strh	wzr, [x0, 280]
-	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR110]
-	mov	w2, 4096
-	mov	w1, 0
-	add	x0, x0, 704
-	bl	ftl_memset
-	adrp	x0, .LANCHOR32
-	ldr	x1, [x19, #:lo12:.LANCHOR110]
-	ldrb	w2, [x0, #:lo12:.LANCHOR32]
-	mov	w0, 24
-	sub	w0, w0, w2
-	adrp	x2, .LANCHOR75
-	strh	w21, [x1, 416]
-	adrp	x21, .LANCHOR10
-	ldrh	w2, [x2, #:lo12:.LANCHOR75]
-	strh	w20, [x1, 692]
-	sub	w0, w0, w2
-	asr	w0, w20, w0
-	strh	w0, [x1, 694]
-	mov	w0, 1
-	strh	w0, [x1, 688]
-	adrp	x0, .LANCHOR204
-	ldrh	w0, [x0, #:lo12:.LANCHOR204]
-	strh	w0, [x1, 698]
-	mov	w1, 20038
-	ldr	x0, [x21, #:lo12:.LANCHOR10]
-	movk	w1, 0x4549, lsl 16
-	str	w1, [x0]
-	bl	ftl_alloc_sys_blk
-	mov	w20, w0
-	mov	w1, 0
-	bl	ftl_erase_phy_blk
-	ldr	x0, [x19, #:lo12:.LANCHOR110]
-	mov	w1, 2
-	strh	w20, [x0, 130]
-	mov	w20, -1
-	strh	wzr, [x0, 140]
-	ldr	x0, [x21, #:lo12:.LANCHOR10]
-	add	x0, x0, 16
-	strh	w20, [x0, 568]
-	strh	w20, [x0, 570]
-	strh	w20, [x0, 572]
-	strh	w20, [x0, 574]
-	bl	ftl_open_sblk_init
-	ldr	x0, [x21, #:lo12:.LANCHOR10]
-	mov	w1, 3
-	add	x0, x0, 48
-	bl	ftl_open_sblk_init
-	ldr	x1, [x19, #:lo12:.LANCHOR110]
-	ldr	x0, [x21, #:lo12:.LANCHOR10]
-	add	x0, x0, 136
-	ldrh	w2, [x1, 134]
-	strh	w2, [x0, -10]
-	strh	w20, [x0, -56]
-	mov	w2, -1
-	strh	w20, [x0, -6]
-	str	w2, [x0, 408]
-	strh	wzr, [x0, -12]
-	strh	wzr, [x0, -16]
-	strh	wzr, [x0, -14]
-	strh	w2, [x1, 126]
-	mov	w2, 256
-	str	wzr, [x0, 384]
-	mov	w1, 255
-	str	wzr, [x0, 388]
-	str	wzr, [x0, 392]
-	bl	ftl_memset
-	mov	w2, 128
-	mov	w1, 255
-	ldr	x0, [x21, #:lo12:.LANCHOR10]
-	add	x0, x0, 392
-	bl	ftl_memset
-	bl	ftl_ext_info_flush
-	mov	w0, 0
-	bl	ftl_info_flush
-	bl	ftl_info_blk_init
-	ldr	x21, [sp, 32]
+	bl	ftl_prog_ppa_page
+.L2750:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-	.size	ftl_low_format_data_init, .-ftl_low_format_data_init
-	.section	.text.ftl_low_format,"ax",@progbits
+.L2749:
+	mov	w0, -1
+	ret
+	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
+	.section	.text.ftl_dump_write_open_sblk,"ax",@progbits
 	.align	2
-	.global	ftl_low_format
-	.type	ftl_low_format, %function
-ftl_low_format:
-	stp	x29, x30, [sp, -80]!
-	mov	w1, 0
-	adrp	x0, .LC162
-	add	x0, x0, :lo12:.LC162
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR205
-	stp	x21, x22, [sp, 32]
-	add	x20, x20, :lo12:.LANCHOR205
-	stp	x25, x26, [sp, 64]
-	adrp	x22, .LANCHOR27
-	mov	x25, x22
-	stp	x23, x24, [sp, 48]
-	mov	w19, 8
-	adrp	x23, .LC0
-	bl	printf
-.L2811:
-	ldr	x0, [x22, #:lo12:.LANCHOR27]
-	add	x0, x0, x19, sxtw
-	ldrb	w21, [x0, 32]
-	add	w0, w21, 127
+	.global	ftl_dump_write_open_sblk
+	.type	ftl_dump_write_open_sblk, %function
+ftl_dump_write_open_sblk:
+	sub	sp, sp, #224
+	stp	x29, x30, [sp, 48]
+	add	x29, sp, 48
+	stp	x19, x20, [sp, 64]
+	and	w20, w0, 65535
+	adrp	x0, .LANCHOR8
+	stp	x21, x22, [sp, 80]
+	stp	x23, x24, [sp, 96]
+	ldrh	w0, [x0, #:lo12:.LANCHOR8]
+	stp	x25, x26, [sp, 112]
+	stp	x27, x28, [sp, 128]
+	cmp	w0, w20
+	bls	.L2755
+	adrp	x0, .LANCHOR83
+	str	x0, [x29, 120]
+	ldrb	w1, [x0, #:lo12:.LANCHOR83]
+	cbnz	w1, .L2757
+	adrp	x0, .LANCHOR80
+	ldrb	w0, [x0, #:lo12:.LANCHOR80]
+	cbz	w0, .L2755
+.L2757:
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbnz	w0, .L2755
+	adrp	x0, .LANCHOR9
+	ubfiz	x14, x20, 2, 16
+	mov	x15, x0
+	ldr	x1, [x0, #:lo12:.LANCHOR9]
+	add	x1, x1, x14
+	ldrb	w1, [x1, 2]
+	and	w1, w1, 224
+	cmp	w1, 160
+	bne	.L2779
+	adrp	x0, .LANCHOR78
+	ldrb	w25, [x0, #:lo12:.LANCHOR78]
+.L2758:
+	add	x21, x29, 176
+	adrp	x23, .LANCHOR94
+	mov	w0, w20
+	adrp	x26, .LANCHOR111
+	add	x26, x26, :lo12:.LANCHOR111
+	mov	w27, 0
+	strh	w20, [x21, -32]!
+	mov	w28, 0
+	add	x1, x21, 16
+	bl	ftl_get_blk_list_in_sblk
+	ldrh	w1, [x23, #:lo12:.LANCHOR94]
 	and	w0, w0, 255
-	cmp	w0, 125
-	bhi	.L2809
-	mov	w2, 2531
-	mov	x1, x20
-	add	x0, x23, :lo12:.LC0
+	strb	w0, [x29, 153]
+	strb	wzr, [x29, 149]
+	strh	wzr, [x29, 146]
+	mul	w0, w0, w1
+	strh	wzr, [x29, 154]
+	strh	w0, [x29, 150]
+	ldr	x0, [x15, #:lo12:.LANCHOR9]
+	add	x1, x0, x14
+	ldr	w5, [x0, x14]
+	ldrb	w2, [x1, 2]
+	mov	w1, w20
+	ldrh	w4, [x0, x14]
+	adrp	x0, .LC159
+	ubfx	x5, x5, 11, 8
+	add	x0, x0, :lo12:.LC159
+	ubfx	x3, x2, 3, 2
+	and	w4, w4, 2047
+	ubfx	x2, x2, 5, 3
 	bl	printf
-.L2809:
-	cmp	w21, 255
-	beq	.L2810
-	adrp	x0, .LANCHOR111
-	ldrh	w1, [x0, #:lo12:.LANCHOR111]
-	mov	w0, 0
-	mul	w1, w1, w21
-	bl	flash_erase_block
-.L2810:
-	add	w19, w19, 1
-	cmp	w19, 16
-	bne	.L2811
-	bl	sblk_init
-	adrp	x22, .LANCHOR7
-	bl	ftl_info_blk_init
-	adrp	x19, .LANCHOR6
-	adrp	x0, .LANCHOR195
-	mov	w2, 16384
+	mov	w0, 1
+	bl	buf_alloc
+	mov	x19, x0
+	mov	w10, 0
+	add	x0, x23, :lo12:.LANCHOR94
+	str	x0, [x29, 128]
+.L2759:
+	ldr	x0, [x29, 128]
+	ldrh	w0, [x0]
+	cmp	w0, w27
+	bls	.L2767
+	lsl	w22, w27, 1
+	mov	w28, 0
+	sub	w0, w22, #1
+	add	w22, w22, w27
+	str	w0, [x29, 140]
+	sub	w22, w22, #1
+	adrp	x0, .LC160
+	add	x0, x0, :lo12:.LC160
+	str	x0, [x29, 112]
+	b	.L2770
+.L2779:
+	mov	w25, 1
+	b	.L2758
+.L2768:
+	ldrh	w12, [x21, x24]
+	mov	w0, 65535
+	cmp	w12, w0
+	bne	.L2760
+.L2766:
+	add	w10, w10, 1
+	and	w10, w10, 65535
+.L2761:
+	cmp	w25, w10
+	bcs	.L2768
+	add	w11, w28, 1
+	and	w28, w11, 65535
+.L2770:
+	ldrb	w0, [x29, 153]
+	cmp	w0, w28
+	bls	.L2769
+	sxtw	x24, w28
+	mov	w10, 1
+	add	x24, x24, 8
+	lsl	x24, x24, 1
+	b	.L2761
+.L2760:
+	ldrh	w3, [x26]
+	cmp	w25, 3
+	mul	w3, w3, w12
+	add	w0, w3, w10
+	bne	.L2762
+	adrp	x1, .LANCHOR36
+	ldrb	w1, [x1, #:lo12:.LANCHOR36]
+	cbz	w1, .L2763
+	adrp	x1, .LANCHOR78
+	add	w0, w0, w22
+	ldrb	w3, [x1, #:lo12:.LANCHOR78]
+.L2793:
+	orr	w3, w0, w3, lsl 24
+	b	.L2764
+.L2763:
+	add	w3, w27, w3
+	orr	w3, w3, w10, lsl 24
+.L2764:
+	str	w3, [x19, 40]
+	mov	w1, 1
+	stp	w10, w12, [x29, 104]
+	mov	x0, x19
+	str	w3, [x29, 136]
+	bl	sblk_read_page
+	ldr	w13, [x19, 52]
+	ldp	w10, w12, [x29, 104]
+	cmp	w13, 512
+	ccmn	w13, #1, 4, ne
+	ldr	w3, [x29, 136]
+	bne	.L2766
+	ldr	x1, [x19, 24]
+	mov	w4, w13
+	ldr	x0, [x19, 8]
+	str	w10, [x29, 108]
+	str	w13, [x29, 136]
+	ldr	w2, [x1, 12]
+	str	w2, [sp, 32]
+	ldr	w2, [x1, 8]
+	str	w2, [sp, 24]
+	ldr	w2, [x1, 4]
+	str	w2, [sp, 16]
+	mov	w2, w27
+	ldr	w1, [x1]
+	str	w1, [sp, 8]
+	ldr	w1, [x0, 12]
+	str	w1, [sp]
+	mov	w1, w12
+	ldp	w5, w6, [x0]
+	ldr	w7, [x0, 8]
+	ldr	x0, [x29, 112]
+	bl	printf
+	ldr	w13, [x29, 136]
+	ldr	w10, [x29, 108]
+	cmp	w13, 512
+	bne	.L2766
+.L2767:
+	mov	w4, w10
+	mov	w3, w28
+	mov	w2, w27
+	mov	w1, w20
+	adrp	x24, .LANCHOR131
+	adrp	x0, .LC161
+	add	x0, x0, :lo12:.LC161
+	bl	printf
+	ldr	x0, [x19, 8]
 	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR195]
+	ldrb	w2, [x24, #:lo12:.LANCHOR131]
+	adrp	x25, .LANCHOR19
+	adrp	x26, .LC162
+	add	x25, x25, :lo12:.LANCHOR19
+	add	x26, x26, :lo12:.LC162
+	lsl	w2, w2, 9
 	bl	ftl_memset
-	ldr	x0, [x22, #:lo12:.LANCHOR7]
-	mov	w3, 1
-	ldrh	w2, [x19, #:lo12:.LANCHOR6]
-	add	x2, x0, x2, lsl 2
-.L2812:
-	cmp	x0, x2
-	bne	.L2813
-	adrp	x21, .LANCHOR110
-	mov	w1, 21574
-	adrp	x24, .LANCHOR69
-	add	x24, x24, :lo12:.LANCHOR69
-	ldr	x0, [x21, #:lo12:.LANCHOR110]
-	movk	w1, 0x494c, lsl 16
-	mov	w20, 0
-	mov	w26, 1
-	strh	wzr, [x0, 148]
-	str	w1, [x0]
-.L2814:
-	ldrh	w0, [x19, #:lo12:.LANCHOR6]
-	adrp	x23, .LANCHOR76
-	cmp	w0, w20
-	bhi	.L2823
-	ldr	x0, [x25, #:lo12:.LANCHOR27]
-	mov	w4, 3
-	ldrb	w2, [x23, #:lo12:.LANCHOR76]
-	mov	w10, 15
-	ldr	x6, [x21, #:lo12:.LANCHOR110]
-	cmp	w2, 1
-	ldr	x1, [x22, #:lo12:.LANCHOR7]
-	ldrb	w0, [x0, 47]
-	csinc	w4, w4, wzr, ne
-	and	w4, w4, 255
-	and	w8, w2, 65535
-	ldrh	w3, [x6, 148]
-	udiv	w0, w0, w2
-	and	w5, w0, 65535
-	ubfiz	x0, x0, 2, 8
-	add	x0, x0, 4
-	add	w20, w5, 1
-	add	x0, x1, x0
-.L2826:
-	cmp	w2, 4
-	add	x1, x1, 4
-	csel	w7, w10, w4, eq
-	strb	w7, [x1, -1]
-	ldrb	w7, [x1, -2]
-	orr	w7, w7, -32
-	strb	w7, [x1, -2]
-	cmp	x1, x0
-	bne	.L2826
-	mul	w5, w5, w8
-	mov	w4, 16
-	add	w0, w8, w3
-	sdiv	w4, w4, w2
-	add	w0, w5, w0, uxth
-	strh	w0, [x6, 148]
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	add	w4, w20, w4
-	and	w4, w4, 65535
-	strh	w4, [x6, 134]
-	tbz	x0, 12, .L2827
+	ldr	x0, [x19, 24]
+	mov	w1, 0
+	ldrb	w2, [x24, #:lo12:.LANCHOR131]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+.L2771:
+	ldrh	w0, [x23, #:lo12:.LANCHOR94]
+	cmp	w0, w27
+	bls	.L2777
+	lsl	w0, w27, 1
+	str	w0, [x29, 140]
+	ldr	x0, [x29, 120]
+	mov	w22, 0
+	add	x28, x0, :lo12:.LANCHOR83
+	b	.L2778
+.L2762:
+	cmp	w25, 2
+	bne	.L2765
+	adrp	x1, .LANCHOR78
+	ldrb	w3, [x1, #:lo12:.LANCHOR78]
+	ldr	w1, [x29, 140]
+	add	w0, w1, w0
+	b	.L2793
+.L2765:
+	add	w3, w27, w3
+	b	.L2764
+.L2769:
+	add	w8, w27, 1
+	and	w27, w8, 65535
+	b	.L2759
+.L2776:
+	ldr	w0, [x25]
+	tbz	x0, 12, .L2772
+	mov	w2, w22
+	mov	w1, w27
+	mov	x0, x26
+	bl	printf
+.L2772:
+	ldrb	w1, [x28]
+	adrp	x2, .LANCHOR111
+	sxtw	x0, w22
+	cbz	w1, .L2773
+	add	x0, x0, 8
+	ldrh	w1, [x2, #:lo12:.LANCHOR111]
+	ldrh	w0, [x21, x0, lsl 1]
+	mul	w0, w0, w1
+	orr	w0, w0, w27
+	str	w0, [x19, 40]
+	mov	x0, x19
+	bl	sblk_3d_tlc_dump_prog
+.L2774:
+	add	w22, w22, 1
+	and	w22, w22, 65535
+.L2778:
+	ldrb	w0, [x29, 153]
+	cmp	w0, w22
+	bhi	.L2776
+	add	w8, w27, 1
+	and	w27, w8, 65535
+	b	.L2771
+.L2773:
+	adrp	x1, .LANCHOR78
+	add	x0, x0, 8
+	ldrb	w1, [x1, #:lo12:.LANCHOR78]
+	cmp	w1, 2
+	bne	.L2775
+	ldrh	w1, [x2, #:lo12:.LANCHOR111]
+	ldrh	w0, [x21, x0, lsl 1]
+	mul	w0, w0, w1
+	ldr	w1, [x29, 140]
+	orr	w0, w0, w1
+	orr	w0, w0, 33554432
+	str	w0, [x19, 40]
+	mov	x0, x19
+	bl	sblk_mlc_dump_prog
+	b	.L2774
+.L2775:
+	ldrh	w1, [x21, x0, lsl 1]
+	mov	w6, 1
+	ldrh	w0, [x2, #:lo12:.LANCHOR111]
+	mov	w5, 0
+	ldrb	w4, [x24, #:lo12:.LANCHOR131]
+	ldr	x3, [x19, 24]
+	mul	w1, w1, w0
+	adrp	x0, .LANCHOR31
+	ldrb	w2, [x0, #:lo12:.LANCHOR31]
+	mov	w0, 24
+	orr	w1, w1, w27
+	str	w1, [x19, 40]
+	sub	w0, w0, w2
+	lsl	w6, w6, w2
+	ldr	x2, [x19, 8]
+	sub	w6, w6, #1
+	lsl	w7, w6, w0
+	lsr	w0, w1, w0
+	bic	w1, w1, w7
+	and	w0, w0, w6
+	bl	flash_prog_page_en
+	b	.L2774
+.L2777:
+	mov	x0, x19
+	bl	zbuf_free
 	adrp	x0, .LC163
-	mov	w3, w20
-	mov	w2, 128
-	mov	w1, 2590
+	mov	w1, w20
 	add	x0, x0, :lo12:.LC163
 	bl	printf
-.L2827:
-	ldr	x0, [x21, #:lo12:.LANCHOR110]
-	mov	w2, 128
-	mov	w1, 255
-	add	x0, x0, 160
-	bl	ftl_memset
-	adrp	x0, .LANCHOR112
-	ldrb	w10, [x23, #:lo12:.LANCHOR76]
-	adrp	x3, .LANCHOR75
-	ldr	x2, [x21, #:lo12:.LANCHOR110]
-	ldrb	w16, [x0, #:lo12:.LANCHOR112]
-	adrp	x0, .LANCHOR32
-	and	w11, w10, 65535
-	ldr	x15, [x22, #:lo12:.LANCHOR7]
-	ldrb	w4, [x0, #:lo12:.LANCHOR32]
+.L2755:
+	ldp	x19, x20, [sp, 64]
+	ldp	x21, x22, [sp, 80]
+	ldp	x23, x24, [sp, 96]
+	ldp	x25, x26, [sp, 112]
+	ldp	x27, x28, [sp, 128]
+	ldp	x29, x30, [sp, 48]
+	add	sp, sp, 224
+	ret
+	.size	ftl_dump_write_open_sblk, .-ftl_dump_write_open_sblk
+	.section	.text.gc_ink_check_sblk,"ax",@progbits
+	.align	2
+	.global	gc_ink_check_sblk
+	.type	gc_ink_check_sblk, %function
+gc_ink_check_sblk:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR70
+	add	x0, x19, :lo12:.LANCHOR70
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	ldrh	w1, [x0, 2110]
+	ldr	x22, [x0, 2184]
+	cmp	w1, 3
+	bhi	.L2795
+	adrp	x0, .L2797
+	mov	x20, x19
+	add	x0, x0, :lo12:.L2797
+	ldrh	w0, [x0,w1,uxtw #1]
+	adr	x1, .Lrtx2797
+	add	x0, x1, w0, sxth #2
+	br	x0
+.Lrtx2797:
+	.section	.rodata.gc_ink_check_sblk,"a",@progbits
+	.align	0
+	.align	2
+.L2797:
+	.2byte	(.L2796 - .Lrtx2797) / 4
+	.2byte	(.L2798 - .Lrtx2797) / 4
+	.2byte	(.L2799 - .Lrtx2797) / 4
+	.2byte	(.L2800 - .Lrtx2797) / 4
+	.section	.text.gc_ink_check_sblk
+.L2796:
+	adrp	x0, .LANCHOR107
+	add	x24, x0, :lo12:.LANCHOR107
+	ldrh	w0, [x0, #:lo12:.LANCHOR107]
+	cmp	w0, 7
+	bls	.L2794
+	adrp	x0, .LANCHOR57
+	ldrb	w0, [x0, #:lo12:.LANCHOR57]
+	cmp	w0, 2
+	bls	.L2794
+	adrp	x21, .LANCHOR108
+	add	x21, x21, :lo12:.LANCHOR108
+	mov	w1, 0
+	mov	x0, x21
+	bl	_list_get_gc_head_node
+	and	w0, w0, 65535
+	mov	w23, 65535
+	cmp	w0, w23
+	beq	.L2794
+	adrp	x22, .LANCHOR9
+	ubfiz	x0, x0, 2, 16
+	ldr	x1, [x22, #:lo12:.LANCHOR9]
+	ldrh	w0, [x1, x0]
+	and	w0, w0, 2047
+	cmp	w0, 2
+	bgt	.L2794
+	add	x20, x19, :lo12:.LANCHOR70
+	mov	w0, 1
+	bl	buf_alloc
+	str	x0, [x20, 2184]
+	cbz	x0, .L2794
+	mov	x2, x24
+	mov	w1, 0
+	mov	x0, x21
+	bl	_list_pop_index_node
+	and	w14, w0, 65535
+	cmp	w14, w23
+	bne	.L2804
+	ldr	x0, [x20, 2184]
+	bl	zbuf_free
+	str	xzr, [x20, 2184]
+.L2794:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L2804:
+	add	x1, x20, 2162
+	mov	w0, w14
+	bl	ftl_get_blk_list_in_sblk
+	strb	w0, [x20, 2155]
+	mov	w0, 1
+	strh	w0, [x20, 2110]
+	ldr	x0, [x22, #:lo12:.LANCHOR9]
+	strh	w14, [x20, 2146]
+	ubfiz	x14, x14, 2, 16
+	strh	wzr, [x20, 2148]
+	ldrh	w1, [x0, x14]
+	adrp	x0, .LANCHOR131
+	ldrb	w2, [x0, #:lo12:.LANCHOR131]
+	ldr	x0, [x20, 2184]
+	lsl	w2, w2, 9
+	tbz	x1, 0, .L2805
+	mov	w1, 85
+.L2820:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldr	x0, [x0, 8]
+	ldp	x29, x30, [sp], 80
+	b	ftl_memset
+.L2805:
+	mov	w1, 170
+	b	.L2820
+.L2798:
+	add	x20, x19, :lo12:.LANCHOR70
+	mov	w1, 0
+	ldrh	w0, [x20, 2146]
+	bl	ftl_erase_sblk
+	mov	w0, 2
+	strh	w0, [x20, 2110]
+	b	.L2794
+.L2799:
+	adrp	x21, .LANCHOR111
+	mov	w24, 65280
+	adrp	x23, .LANCHOR31
+	add	x21, x21, :lo12:.LANCHOR111
+	add	x23, x23, :lo12:.LANCHOR31
+	mov	w19, 0
+	movk	w24, 0x55aa, lsl 16
+	bl	sblk_wait_write_queue_completed
+.L2806:
+	add	x0, x20, :lo12:.LANCHOR70
+	ldrb	w1, [x0, 2155]
+	cmp	w1, w19
+	bhi	.L2808
+	ldrh	w1, [x0, 2148]
+	adrp	x2, .LANCHOR94
+	add	w1, w1, 1
+	ldrh	w2, [x2, #:lo12:.LANCHOR94]
+	and	w1, w1, 65535
+	strh	w1, [x0, 2148]
+	cmp	w2, w1
+	bhi	.L2794
+	mov	w1, 3
+	strh	wzr, [x0, 2148]
+	strh	w1, [x0, 2110]
+	b	.L2794
+.L2808:
+	add	x1, x0, x19, sxtw 1
+	ldrh	w2, [x1, 2162]
+	mov	w1, 65535
+	cmp	w2, w1
+	beq	.L2807
+	ldrh	w0, [x0, 2148]
+	mov	w6, 1
+	ldrh	w1, [x21]
+	mov	w5, 0
+	ldr	x3, [x22, 24]
+	madd	w1, w1, w2, w0
+	ldr	x2, [x22, 8]
 	mov	w0, 24
-	ldrh	w8, [x2, 134]
+	stp	w1, w24, [x2]
+	str	wzr, [x3]
+	ldrb	w4, [x23]
 	sub	w0, w0, w4
-	ldrh	w4, [x3, #:lo12:.LANCHOR75]
-	mul	w1, w20, w11
-	mov	w3, 0
+	lsl	w6, w6, w4
+	adrp	x4, .LANCHOR131
+	sub	w6, w6, #1
+	ldrb	w4, [x4, #:lo12:.LANCHOR131]
+	lsl	w7, w6, w0
+	lsr	w0, w1, w0
+	bic	w1, w1, w7
+	and	w0, w0, w6
+	bl	flash_prog_page_en
+.L2807:
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L2806
+.L2800:
+	adrp	x25, .LANCHOR111
+	add	x19, x19, :lo12:.LANCHOR70
+	add	x25, x25, :lo12:.LANCHOR111
+	mov	w21, 0
+	mov	w26, 65535
+	bl	sblk_wait_write_queue_completed
+.L2809:
+	ldrb	w0, [x19, 2155]
+	cmp	w0, w21
+	bhi	.L2813
+	ldrh	w0, [x19, 2148]
+	adrp	x1, .LANCHOR94
+	add	w0, w0, 1
+	ldrh	w1, [x1, #:lo12:.LANCHOR94]
+	and	w0, w0, 65535
+	strh	w0, [x19, 2148]
+	cmp	w1, w0
+	bhi	.L2794
+	ldr	x0, [x19, 2184]
+	strh	wzr, [x19, 2110]
+	bl	zbuf_free
+	str	xzr, [x19, 2184]
+	ldrh	w0, [x19, 2112]
+	cmp	w0, 15
+	bhi	.L2814
+	add	w1, w0, 1
+	add	x0, x19, x0, sxtw 1
+	strh	w1, [x19, 2112]
+	ldrh	w1, [x19, 2146]
+	strh	w1, [x0, 2114]
+.L2815:
+	add	x19, x20, :lo12:.LANCHOR70
+	adrp	x0, .LC164
+	ldp	x21, x22, [sp, 32]
+	add	x0, x0, :lo12:.LC164
+	ldrh	w2, [x19, 2112]
+	ldrh	w1, [x19, 2146]
+	ldp	x23, x24, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	b	printf
+.L2813:
+	add	x24, x19, x21, sxtw 1
+	add	x24, x24, 16
+	ldrh	w0, [x24, 2146]
+	cmp	w0, w26
+	beq	.L2811
+	ldrh	w1, [x19, 2148]
+	ldrh	w23, [x25]
+	madd	w23, w23, w0, w1
+	mov	w1, 1
+	str	w23, [x22, 40]
+	mov	x0, x22
+	bl	sblk_read_page
+	ldr	x0, [x22, 8]
+	ldr	w0, [x0]
+	cmp	w23, w0
+	beq	.L2811
+	mov	w0, w23
+	bl	ftl_mask_bad_block
+	mov	w0, -1
+	strh	w0, [x24, 2146]
+.L2811:
+	add	w21, w21, 1
+	and	w21, w21, 65535
+	b	.L2809
+.L2814:
+	ldrh	w0, [x19, 2146]
+	bl	zftl_insert_free_list
+	b	.L2815
+.L2795:
+	strh	wzr, [x0, 2110]
+	b	.L2794
+	.size	gc_ink_check_sblk, .-gc_ink_check_sblk
+	.section	.text.ftl_ink_check_sblk,"ax",@progbits
+	.align	2
+	.global	ftl_ink_check_sblk
+	.type	ftl_ink_check_sblk, %function
+ftl_ink_check_sblk:
+	stp	x29, x30, [sp, -144]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x24, .LANCHOR9
+	stp	x19, x20, [sp, 16]
+	and	w19, w0, 65535
+	ldr	x0, [x24, #:lo12:.LANCHOR9]
+	ubfiz	x23, x19, 2, 16
+	stp	x21, x22, [sp, 32]
+	mov	w1, w19
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	ldr	w3, [x0, x23]
+	ldrh	w2, [x0, x23]
+	adrp	x0, .LC165
+	add	x0, x0, :lo12:.LC165
+	ubfx	x3, x3, 11, 8
+	and	w2, w2, 2047
+	bl	printf
+	mov	w0, 65535
+	cmp	w19, w0
+	beq	.L2821
+	adrp	x0, .LANCHOR8
+	ldrh	w0, [x0, #:lo12:.LANCHOR8]
+	cmp	w0, w19
+	bls	.L2821
+	add	x21, x29, 144
+	mov	w1, 0
+	mov	w0, w19
+	bl	ftl_erase_sblk
+	mov	w0, w19
+	adrp	x27, .LANCHOR131
+	strh	w19, [x21, -32]!
+	add	x1, x21, 16
+	bl	ftl_get_blk_list_in_sblk
+	strb	w0, [x29, 121]
+	mov	w0, 1
+	bl	buf_alloc
+	mov	x20, x0
+	ldr	x0, [x24, #:lo12:.LANCHOR9]
+	ldrb	w2, [x27, #:lo12:.LANCHOR131]
+	ldrh	w0, [x0, x23]
+	lsl	w2, w2, 9
+	and	w0, w0, 2047
+	cmp	w0, 1
+	bgt	.L2823
+	mov	w1, 85
+.L2839:
+	ldr	x0, [x20, 8]
+	adrp	x28, .LANCHOR111
+	add	x28, x28, :lo12:.LANCHOR111
+	mov	w26, 0
+	bl	ftl_memset
+	bl	sblk_wait_write_queue_completed
+	mov	w7, 65280
+	movk	w7, 0x55aa, lsl 16
+.L2825:
+	adrp	x25, .LANCHOR94
+	ldrh	w0, [x25, #:lo12:.LANCHOR94]
+	cmp	w0, w26
+	bls	.L2828
+	adrp	x25, .LANCHOR31
+	mov	w22, 0
+	add	x25, x25, :lo12:.LANCHOR31
+	b	.L2829
+.L2823:
+	mov	w1, 170
+	b	.L2839
+.L2827:
+	add	x0, x21, x22, sxtw 1
+	mov	w1, 65535
+	ldrh	w0, [x0, 16]
+	cmp	w0, w1
+	beq	.L2826
+	ldrh	w1, [x28]
+	mov	w6, 1
+	ldr	x2, [x20, 8]
+	mov	w5, 0
+	ldr	x3, [x20, 24]
+	str	w7, [x29, 108]
+	madd	w1, w1, w0, w26
+	mov	w0, 24
+	stp	w1, w7, [x2]
+	str	wzr, [x3]
+	ldrb	w4, [x25]
 	sub	w0, w0, w4
-	mov	w4, 1
-	and	w1, w1, 65535
-	lsl	w4, w4, w0
-	and	w4, w4, 65535
+	lsl	w6, w6, w4
+	ldrb	w4, [x27, #:lo12:.LANCHOR131]
+	sub	w6, w6, #1
+	lsl	w8, w6, w0
+	lsr	w0, w1, w0
+	bic	w1, w1, w8
+	and	w0, w0, w6
+	bl	flash_prog_page_en
+	ldr	w7, [x29, 108]
+.L2826:
+	add	w22, w22, 1
+	and	w22, w22, 65535
+.L2829:
+	ldrb	w0, [x29, 121]
+	cmp	w0, w22
+	bhi	.L2827
+	add	w26, w26, 1
+	and	w26, w26, 65535
+	b	.L2825
 .L2828:
-	cmp	w20, w8
-	bcc	.L2834
-	ldrh	w0, [x19, #:lo12:.LANCHOR6]
-	strh	w3, [x2, 112]
-	sub	w0, w0, w8
-	strh	wzr, [x2, 114]
-	strh	w0, [x2, 116]
-	strh	wzr, [x2, 118]
-	strh	w8, [x2, 132]
-	bl	ftl_low_format_data_init
-	mov	w0, 0
+	adrp	x26, .LANCHOR111
+	add	x26, x26, :lo12:.LANCHOR111
+	mov	w28, 0
+.L2830:
+	ldrh	w0, [x25, #:lo12:.LANCHOR94]
+	cmp	w0, w28
+	bls	.L2835
+	mov	w27, 0
+	b	.L2836
+.L2834:
+	sxtw	x22, w27
+	mov	w1, 65535
+	add	x22, x22, 8
+	lsl	x22, x22, 1
+	ldrh	w0, [x21, x22]
+	cmp	w0, w1
+	beq	.L2832
+	ldrh	w4, [x26]
+	mov	w1, 1
+	madd	w4, w4, w0, w28
+	mov	x0, x20
+	str	w4, [x20, 40]
+	str	w4, [x29, 108]
+	bl	sblk_read_page
+	ldr	x0, [x20, 8]
+	ldr	w4, [x29, 108]
+	ldr	w0, [x0]
+	cmp	w4, w0
+	beq	.L2832
+	mov	w0, w4
+	bl	ftl_mask_bad_block
+	mov	w0, -1
+	strh	w0, [x21, x22]
+.L2832:
+	add	w2, w27, 1
+	and	w27, w2, 65535
+.L2836:
+	ldrb	w0, [x29, 121]
+	cmp	w0, w27
+	bhi	.L2834
+	add	w3, w28, 1
+	and	w28, w3, 65535
+	b	.L2830
+.L2835:
+	mov	x0, x20
+	bl	zbuf_free
+	ldr	x0, [x24, #:lo12:.LANCHOR9]
+	mov	w1, w19
+	ldr	w3, [x0, x23]
+	ldrh	w2, [x0, x23]
+	adrp	x0, .LC166
+	add	x0, x0, :lo12:.LC166
+	ubfx	x3, x3, 11, 8
+	and	w2, w2, 2047
+	bl	printf
+.L2821:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 144
 	ret
-.L2813:
-	ldrb	w1, [x0, 2]
-	add	x0, x0, 4
-	and	w1, w1, 31
-	bfi	w1, w3, 3, 2
-	strb	w1, [x0, -2]
-	b	.L2812
-.L2823:
-	adrp	x0, .LANCHOR82
-	strh	w20, [x24]
-	ldrb	w0, [x0, #:lo12:.LANCHOR82]
-	cbnz	w0, .L2815
-	mov	w0, w20
-	bl	ftl_test_block
-.L2815:
-	ldrb	w11, [x23, #:lo12:.LANCHOR76]
-	adrp	x0, .LANCHOR112
-	ldr	x6, [x22, #:lo12:.LANCHOR7]
-	mov	w7, 0
-	ldrb	w14, [x0, #:lo12:.LANCHOR112]
-	mov	w10, 0
-	ldr	x13, [x21, #:lo12:.LANCHOR110]
-	mov	w8, 0
-	mul	w12, w20, w11
-	add	x6, x6, x20, uxth 2
-.L2816:
-	cmp	w8, w14
-	bcs	.L2820
-	add	w15, w11, w7
-	b	.L2821
-.L2819:
-	add	w1, w7, w12
-	mov	w0, w8
-	bl	flash_check_bad_block
-	cbz	w0, .L2817
-	ldrb	w1, [x6, 3]
-	lsl	w0, w26, w7
-	orr	w0, w0, w1
-	strb	w0, [x6, 3]
-	ldrh	w0, [x13, 148]
-	add	w0, w0, 1
-	strh	w0, [x13, 148]
-.L2818:
-	add	w7, w7, 1
-.L2821:
-	cmp	w7, w15
-	bne	.L2819
-	add	w8, w8, 1
-	sub	w12, w12, w11
-	and	w8, w8, 65535
-	b	.L2816
-.L2817:
-	add	w10, w10, 1
-	and	w10, w10, 65535
-	b	.L2818
-.L2820:
-	cbnz	w10, .L2822
-	ldrb	w0, [x6, 2]
-	orr	w0, w0, -32
-	strb	w0, [x6, 2]
-.L2822:
-	add	w20, w20, 1
-	and	w20, w20, 65535
-	b	.L2814
-.L2834:
-	add	x13, x15, x20, uxth 2
-	mov	w6, 0
-	mov	w12, 0
-	mov	w5, 0
-	ldrb	w0, [x13, 2]
-	orr	w0, w0, -32
-	strb	w0, [x13, 2]
-.L2829:
-	cmp	w5, w16
-	bcc	.L2836
-	add	w20, w20, 1
-	add	w1, w1, w11
-	and	w20, w20, 65535
-	and	w1, w1, 65535
-	b	.L2828
-.L2832:
-	ldrb	w14, [x13, 3]
-	add	w17, w12, w7
-	asr	w14, w14, w17
-	tbnz	x14, 0, .L2830
-	cmp	w10, 1
-	bls	.L2835
-	and	w0, w0, 1
-	add	w0, w1, w0
-	and	w0, w0, 65535
-.L2831:
-	add	x14, x2, x3, sxtw 1
-	add	w3, w3, 1
-	and	w3, w3, 65535
-	add	w0, w0, w6
-	strh	w0, [x14, 160]
-.L2830:
-	add	x7, x7, 1
-.L2833:
-	and	w0, w7, 65535
-	cmp	w0, w11
-	bcc	.L2832
-	add	w5, w5, 1
-	add	w6, w4, w6
-	and	w5, w5, 65535
-	add	w12, w12, w10
-	and	w6, w6, 65535
-	b	.L2829
-.L2835:
-	mov	w0, w1
-	b	.L2831
-.L2836:
-	mov	x7, 0
-	b	.L2833
-	.size	ftl_low_format, .-ftl_low_format
-	.section	.text.ftl_re_low_format,"ax",@progbits
+	.size	ftl_ink_check_sblk, .-ftl_ink_check_sblk
+	.section	.text.ftl_alloc_sblk,"ax",@progbits
 	.align	2
-	.global	ftl_re_low_format
-	.type	ftl_re_low_format, %function
-ftl_re_low_format:
-	stp	x29, x30, [sp, -16]!
-	mov	w1, 1
-	adrp	x0, .LC164
-	add	x0, x0, :lo12:.LC164
+	.global	ftl_alloc_sblk
+	.type	ftl_alloc_sblk, %function
+ftl_alloc_sblk:
+	stp	x29, x30, [sp, -80]!
+	cmp	w0, 5
 	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	and	w23, w0, 65535
+	stp	x21, x22, [sp, 32]
+	mov	w1, w23
+	stp	x19, x20, [sp, 16]
+	cset	w22, eq
+	mov	w21, w0
+	str	x25, [sp, 64]
+	mov	w0, 0
+	bl	zftl_get_free_sblk
+	and	w19, w0, 65535
+	mov	w0, 65535
+	cmp	w19, w0
+	beq	.L2842
+	adrp	x0, .LANCHOR9
+	ubfiz	x25, x19, 2, 16
+	lsl	w22, w22, 1
+	mov	w24, w19
+	ldr	x20, [x0, #:lo12:.LANCHOR9]
+	mov	x23, x0
+	add	x20, x20, x25
+	ldrb	w1, [x20, 2]
+	tst	w1, 224
+	beq	.L2843
+	adrp	x1, .LANCHOR200
+	adrp	x0, .LC0
+	mov	w2, 1012
+	add	x1, x1, :lo12:.LANCHOR200
+	add	x0, x0, :lo12:.LC0
 	bl	printf
-	bl	sblk_init
-	bl	ftl_info_blk_init
-	bl	ftl_ext_info_init
+.L2843:
+	ldrb	w0, [x20, 2]
+	bfi	w0, w21, 5, 3
+	ubfx	x1, x0, 3, 2
+	orr	w1, w22, w1
+	bfi	w0, w1, 3, 2
+	strb	w0, [x20, 2]
+	and	w1, w0, 24
+	cmp	w1, 24
+	bne	.L2844
+	cbnz	w22, .L2844
+	mov	w1, 1
+	bfi	w0, w1, 3, 2
+	strb	w0, [x20, 2]
+.L2844:
 	adrp	x0, .LANCHOR110
-	adrp	x2, .LANCHOR6
-	mov	w3, 0
-	mov	w4, 0
 	ldr	x0, [x0, #:lo12:.LANCHOR110]
-	mov	w5, 0
-	ldrh	w7, [x2, #:lo12:.LANCHOR6]
-	adrp	x2, .LANCHOR7
-	ldr	x2, [x2, #:lo12:.LANCHOR7]
-	ldrh	w1, [x0, 134]
-	add	x2, x2, x1, uxth 2
-.L2847:
-	cmp	w1, w7
-	bcc	.L2851
-	strh	w5, [x0, 114]
-	strh	w4, [x0, 118]
-	strh	w3, [x0, 116]
-	strh	wzr, [x0, 122]
-	strh	wzr, [x0, 120]
-	strh	wzr, [x0, 124]
-	bl	ftl_low_format_data_init
-	mov	w0, 0
-	ldp	x29, x30, [sp], 16
-	ret
-.L2851:
-	ldrb	w6, [x2, 2]
-	and	w8, w6, 31
-	strb	w8, [x2, 2]
-	ands	w6, w6, 24
-	bne	.L2848
-	add	w5, w5, 1
-	and	w5, w5, 65535
-.L2849:
-	add	w1, w1, 1
-	add	x2, x2, 4
-	and	w1, w1, 65535
-	b	.L2847
-.L2848:
-	cmp	w6, 16
-	bne	.L2850
-	add	w4, w4, 1
-	and	w4, w4, 65535
-	b	.L2849
-.L2850:
-	add	w3, w3, 1
-	and	w3, w3, 65535
-	b	.L2849
-	.size	ftl_re_low_format, .-ftl_re_low_format
-	.section	.text.ftl_prog_ppa_page,"ax",@progbits
-	.align	2
-	.global	ftl_prog_ppa_page
-	.type	ftl_prog_ppa_page, %function
-ftl_prog_ppa_page:
-	adrp	x4, .LANCHOR32
-	mov	w5, 1
-	ldrb	w6, [x4, #:lo12:.LANCHOR32]
-	mov	w4, 24
-	sub	w4, w4, w6
-	lsl	w7, w5, w4
-	sub	w7, w7, #1
-	lsl	w5, w5, w6
-	sub	w6, w5, #1
-	lsr	w5, w0, w4
-	mov	w4, w3
-	mov	x3, x2
-	mov	x2, x1
-	and	w1, w7, w0
-	and	w0, w6, w5
-	b	ftl_prog_page
-	.size	ftl_prog_ppa_page, .-ftl_prog_ppa_page
-	.section	.text.ftl_write_last_log_page,"ax",@progbits
+	ldrh	w0, [x0, 150]
+	cbz	w0, .L2845
+	ldr	x0, [x23, #:lo12:.LANCHOR9]
+	ldrh	w0, [x0, x25]
+	tst	x0, 2047
+	bne	.L2845
+	cbnz	w22, .L2845
+	mov	w0, w24
+	bl	ftl_ink_check_sblk
+.L2845:
+	mov	w0, w19
+	ldr	x25, [sp, 64]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	ret
+.L2842:
+	bl	print_ftl_debug_info
+	adrp	x20, .LC167
+	mov	w2, w21
+	add	x20, x20, :lo12:.LC167
+	mov	w1, w19
+	mov	x0, x20
+	bl	printf
+	mov	w1, w23
+	mov	w0, 0
+	bl	zftl_get_free_sblk
+	and	w19, w0, 65535
+	mov	w2, w21
+	mov	w1, w19
+	mov	x0, x20
+	bl	printf
+	bl	dump_all_list_info
+	mov	w2, 1031
+	adrp	x1, .LANCHOR200
+	adrp	x0, .LC0
+	add	x1, x1, :lo12:.LANCHOR200
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+	b	.L2845
+	.size	ftl_alloc_sblk, .-ftl_alloc_sblk
+	.section	.text.ftl_open_sblk_init,"ax",@progbits
 	.align	2
-	.global	ftl_write_last_log_page
-	.type	ftl_write_last_log_page, %function
-ftl_write_last_log_page:
-	ldrh	w1, [x0, 6]
-	cmp	w1, 1
-	bne	.L2856
-	stp	x29, x30, [sp, -48]!
-	adrp	x1, .LANCHOR117
+	.global	ftl_open_sblk_init
+	.type	ftl_open_sblk_init, %function
+ftl_open_sblk_init:
+	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR79
+	stp	x23, x24, [sp, 48]
+	adrp	x22, .LC168
 	stp	x19, x20, [sp, 16]
+	adrp	x24, .LANCHOR94
 	mov	x19, x0
-	stp	x21, x22, [sp, 32]
-	ldr	x20, [x1, #:lo12:.LANCHOR117]
-	ldrh	w22, [x0, 12]
-	bl	ftl_get_new_free_page
-	mov	w21, w0
-	cmn	w0, #1
-	beq	.L2857
-	ldrh	w0, [x19]
-	add	x20, x20, x22, uxth 2
-	bl	ftl_vpn_decrement
-	adrp	x0, .LANCHOR191
-	mov	w1, 15555
-	add	x7, x0, :lo12:.LANCHOR191
-	movk	w1, 0xf55f, lsl 16
-	str	w1, [x0, #:lo12:.LANCHOR191]
-	adrp	x0, .LANCHOR95
-	ldrh	w1, [x0, #:lo12:.LANCHOR95]
-	adrp	x0, .LANCHOR80
-	ldrb	w0, [x0, #:lo12:.LANCHOR80]
-	mul	w1, w1, w0
-	mov	x0, x20
-	lsl	w1, w1, 2
-	bl	js_hash
-	mov	x1, x7
-	mov	x2, 0
-	stp	w0, wzr, [x7, 4]
-	mov	w0, 2
-	str	wzr, [x7, 12]
-	str	wzr, [x1, 16]!
-	bl	ftl_debug_info_fill
-	mov	x2, x7
-	adrp	x0, .LANCHOR131
-	mov	x1, x20
-	ldrb	w3, [x0, #:lo12:.LANCHOR131]
-	mov	w0, w21
-	bl	ftl_prog_ppa_page
+	mov	w23, w1
+	add	x24, x24, :lo12:.LANCHOR94
+	add	x21, x21, :lo12:.LANCHOR79
+	add	x22, x22, :lo12:.LC168
+	stp	x25, x26, [sp, 64]
+.L2855:
+	mov	w25, 65535
+.L2856:
+	mov	w0, w23
+	bl	ftl_alloc_sblk
+	and	w20, w0, 65535
+	cmp	w20, w25
+	beq	.L2856
+	mov	w1, 0
+	mov	w0, w20
+	bl	ftl_erase_sblk
+	add	x1, x19, 16
+	mov	w0, w20
+	bl	ftl_get_blk_list_in_sblk
+	and	w0, w0, 255
+	ldrh	w1, [x24]
+	cmp	w23, 2
+	strb	w0, [x19, 9]
+	strh	w20, [x19]
+	strh	wzr, [x19, 2]
+	mul	w0, w1, w0
+	strb	wzr, [x19, 5]
+	strh	w0, [x19, 6]
+	strh	wzr, [x19, 10]
+	strb	w23, [x19, 4]
+	beq	.L2859
+	ldrb	w0, [x21]
+	mul	w0, w1, w0
+	and	w0, w0, 65535
 .L2857:
+	ldrb	w2, [x21]
+	adrp	x26, .LANCHOR11
+	strh	w0, [x19, 12]
+	ubfiz	x25, x20, 1, 16
+	mul	w2, w2, w1
+	adrp	x1, .LANCHOR117
+	ldr	x3, [x1, #:lo12:.LANCHOR117]
+	mov	w1, 255
+	lsl	w2, w2, 2
+	add	x0, x3, x0, uxth 2
+	bl	ftl_memset
+	ldr	x0, [x26, #:lo12:.LANCHOR11]
+	ldrh	w1, [x19, 6]
+	strh	w1, [x0, x25]
+	ldrb	w0, [x19, 9]
+	cbnz	w0, .L2854
+	mov	w1, w20
+	mov	x0, x22
+	bl	printf
+	ldr	x0, [x26, #:lo12:.LANCHOR11]
+	mov	w1, -1
+	strh	w1, [x0, x25]
+	mov	w0, 7
+	strb	w0, [x19, 4]
+	b	.L2855
+.L2859:
 	mov	w0, 0
+	b	.L2857
+.L2854:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 48
-	ret
-.L2856:
-	mov	w0, -1
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
 	ret
-	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
-	.section	.text.pm_write_page,"ax",@progbits
+	.size	ftl_open_sblk_init, .-ftl_open_sblk_init
+	.section	.text.ftl_low_format_data_init,"ax",@progbits
 	.align	2
-	.global	pm_write_page
-	.type	pm_write_page, %function
-pm_write_page:
-	stp	x29, x30, [sp, -96]!
+	.global	ftl_low_format_data_init
+	.type	ftl_low_format_data_init, %function
+ftl_low_format_data_init:
+	stp	x29, x30, [sp, -48]!
+	adrp	x0, .LANCHOR197
+	mov	w2, 16384
+	mov	w1, 0
 	add	x29, sp, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR197]
 	stp	x19, x20, [sp, 16]
-	mov	w19, w0
-	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR95
-	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR111
-	adrp	x24, .LANCHOR110
-	mov	x23, x1
-	add	x21, x21, :lo12:.LANCHOR95
-	mov	x20, x24
-	add	x22, x22, :lo12:.LANCHOR111
-	stp	x25, x26, [sp, 64]
-	str	x27, [sp, 80]
-	mov	w25, 65535
+	adrp	x19, .LANCHOR110
+	str	x21, [sp, 32]
+	bl	ftl_memset
+	bl	zftl_sblk_list_init
+	mov	w0, 1
+	bl	ftl_alloc_sblk
+	mov	w1, 0
+	mov	w21, w0
+	bl	ftl_erase_sblk
+	ldr	x1, [x19, #:lo12:.LANCHOR110]
+	mov	w0, w21
+	add	x1, x1, 672
+	bl	ftl_get_blk_list_in_sblk
+	ldr	x0, [x19, #:lo12:.LANCHOR110]
+	ldrh	w20, [x0, 672]
+	strh	wzr, [x0, 690]
+	mov	w0, 65533
+	sub	w1, w20, #1
+	cmp	w0, w1, uxth
+	bcs	.L2863
+	adrp	x1, .LANCHOR201
+	adrp	x0, .LC0
+	mov	w2, 2484
+	add	x1, x1, :lo12:.LANCHOR201
+	add	x0, x0, :lo12:.LC0
+	bl	printf
 .L2863:
-	ldr	x0, [x24, #:lo12:.LANCHOR110]
-	ldr	w1, [x0, 48]
-	ldrh	w2, [x0, 696]
-	add	w1, w1, 1
-	str	w1, [x0, 48]
-	ldrh	w1, [x21]
-	cmp	w2, w1
-	bcs	.L2864
-	ldrh	w0, [x0, 692]
-	cmp	w0, w25
-	bne	.L2865
-.L2864:
-	bl	pm_alloc_new_blk
+	ldr	x0, [x19, #:lo12:.LANCHOR110]
+	mov	w2, 256
+	mov	w1, 255
+	add	x0, x0, 416
+	strh	wzr, [x0, 280]
+	bl	ftl_memset
+	ldr	x0, [x19, #:lo12:.LANCHOR110]
+	mov	w2, 4096
+	mov	w1, 0
+	add	x0, x0, 704
+	bl	ftl_memset
+	adrp	x0, .LANCHOR31
+	ldr	x1, [x19, #:lo12:.LANCHOR110]
+	ldrb	w2, [x0, #:lo12:.LANCHOR31]
+	mov	w0, 24
+	sub	w0, w0, w2
+	adrp	x2, .LANCHOR74
+	strh	w21, [x1, 416]
+	adrp	x21, .LANCHOR12
+	ldrh	w2, [x2, #:lo12:.LANCHOR74]
+	strh	w20, [x1, 692]
+	sub	w0, w0, w2
+	asr	w0, w20, w0
+	strh	w0, [x1, 694]
+	mov	w0, 1
+	strh	w0, [x1, 688]
+	adrp	x0, .LANCHOR202
+	ldrh	w0, [x0, #:lo12:.LANCHOR202]
+	strh	w0, [x1, 698]
+	mov	w1, 20038
+	ldr	x0, [x21, #:lo12:.LANCHOR12]
+	movk	w1, 0x4549, lsl 16
+	str	w1, [x0]
+	bl	ftl_alloc_sys_blk
+	mov	w20, w0
+	mov	w1, 0
+	bl	ftl_erase_phy_blk
+	ldr	x0, [x19, #:lo12:.LANCHOR110]
+	mov	w1, 2
+	strh	w20, [x0, 130]
+	mov	w20, -1
+	strh	wzr, [x0, 140]
+	ldr	x0, [x21, #:lo12:.LANCHOR12]
+	add	x0, x0, 16
+	strh	w20, [x0, 568]
+	strh	w20, [x0, 570]
+	strh	w20, [x0, 572]
+	strh	w20, [x0, 574]
+	bl	ftl_open_sblk_init
+	ldr	x0, [x21, #:lo12:.LANCHOR12]
+	mov	w1, 3
+	add	x0, x0, 48
+	bl	ftl_open_sblk_init
+	ldr	x1, [x19, #:lo12:.LANCHOR110]
+	ldr	x0, [x21, #:lo12:.LANCHOR12]
+	add	x0, x0, 136
+	ldrh	w2, [x1, 134]
+	strh	w2, [x0, -10]
+	strh	w20, [x0, -56]
+	mov	w2, -1
+	strh	w20, [x0, -6]
+	str	w2, [x0, 408]
+	strh	wzr, [x0, -12]
+	strh	wzr, [x0, -16]
+	strh	wzr, [x0, -14]
+	strh	w2, [x1, 126]
+	mov	w2, 256
+	str	wzr, [x0, 384]
+	mov	w1, 255
+	str	wzr, [x0, 388]
+	str	wzr, [x0, 392]
+	bl	ftl_memset
+	mov	w2, 128
+	mov	w1, 255
+	ldr	x0, [x21, #:lo12:.LANCHOR12]
+	add	x0, x0, 392
+	bl	ftl_memset
+	bl	ftl_ext_info_flush
+	mov	w0, 0
+	bl	ftl_info_flush
+	bl	ftl_info_blk_init
+	ldr	x21, [sp, 32]
 	mov	w0, 0
-	bl	ftl_info_flush
-.L2865:
-	ldr	x0, [x20, #:lo12:.LANCHOR110]
-	ldrh	w0, [x0, 692]
-	cmp	w0, w25
-	bne	.L2866
-	adrp	x1, .LANCHOR206
-	adrp	x0, .LC0
-	mov	w2, 303
-	add	x1, x1, :lo12:.LANCHOR206
-	add	x0, x0, :lo12:.LC0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+	.size	ftl_low_format_data_init, .-ftl_low_format_data_init
+	.section	.text.ftl_low_format,"ax",@progbits
+	.align	2
+	.global	ftl_low_format
+	.type	ftl_low_format, %function
+ftl_low_format:
+	stp	x29, x30, [sp, -80]!
+	mov	w1, 0
+	adrp	x0, .LC169
+	add	x0, x0, :lo12:.LC169
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR203
+	stp	x21, x22, [sp, 32]
+	add	x20, x20, :lo12:.LANCHOR203
+	stp	x25, x26, [sp, 64]
+	adrp	x22, .LANCHOR6
+	mov	x25, x22
+	stp	x23, x24, [sp, 48]
+	mov	w19, 8
+	adrp	x23, .LC0
+	bl	printf
+.L2868:
+	ldr	x0, [x22, #:lo12:.LANCHOR6]
+	add	x0, x0, x19, sxtw
+	ldrb	w21, [x0, 32]
+	add	w0, w21, 127
+	and	w0, w0, 255
+	cmp	w0, 125
+	bhi	.L2866
+	mov	w2, 2539
+	mov	x1, x20
+	add	x0, x23, :lo12:.LC0
 	bl	printf
 .L2866:
-	ldr	x0, [x20, #:lo12:.LANCHOR110]
-	adrp	x27, .LANCHOR207
-	ldrh	w1, [x22]
-	mov	w2, 64
-	ldrh	w26, [x0, 692]
-	ldrh	w0, [x0, 696]
-	madd	w26, w26, w1, w0
-	ldr	x0, [x27, #:lo12:.LANCHOR207]
-	mov	w1, 0
-	bl	ftl_memset
-	ldr	x6, [x27, #:lo12:.LANCHOR207]
-	ldr	x7, [x20, #:lo12:.LANCHOR110]
-	str	w19, [x6]
-	ldr	w0, [x7, 48]
-	str	w0, [x6, 4]
-	adrp	x0, .LANCHOR131
-	ldrb	w8, [x0, #:lo12:.LANCHOR131]
-	mov	x0, x23
-	lsl	w1, w8, 9
-	bl	js_hash
-	str	w0, [x6, 8]
-	ldrb	w0, [x7, 694]
-	mov	x2, x23
-	mov	w1, w26
-	mov	w4, w8
-	mov	x3, x6
-	bl	ftl_prog_page
-	ldr	x2, [x20, #:lo12:.LANCHOR110]
-	ldrh	w1, [x2, 696]
-	add	w1, w1, 1
-	and	w1, w1, 65535
-	strh	w1, [x2, 696]
-	cmp	w1, 1
-	adrp	x1, .LANCHOR208
+	cmp	w21, 255
 	beq	.L2867
-	ldrb	w3, [x1, #:lo12:.LANCHOR208]
-	cbz	w3, .L2868
+	adrp	x0, .LANCHOR111
+	ldrh	w1, [x0, #:lo12:.LANCHOR111]
+	mov	w0, 0
+	mul	w1, w1, w21
+	bl	flash_erase_block
 .L2867:
-	strb	wzr, [x1, #:lo12:.LANCHOR208]
-	b	.L2863
-.L2868:
-	cmn	w0, #1
+	add	w19, w19, 1
+	cmp	w19, 16
+	bne	.L2868
+	bl	sblk_init
+	adrp	x22, .LANCHOR9
+	bl	ftl_info_blk_init
+	adrp	x19, .LANCHOR8
+	adrp	x0, .LANCHOR192
+	mov	w2, 16384
+	mov	w1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR192]
+	bl	ftl_memset
+	ldr	x0, [x22, #:lo12:.LANCHOR9]
+	mov	w3, 1
+	ldrh	w2, [x19, #:lo12:.LANCHOR8]
+	add	x2, x0, x2, lsl 2
+.L2869:
+	cmp	x0, x2
 	bne	.L2870
-	mov	w1, w26
-	adrp	x0, .LC165
-	add	x0, x0, :lo12:.LC165
-	bl	printf
-	b	.L2863
-.L2870:
-	ldrh	w0, [x2, 698]
-	cmp	w19, w0
-	bcs	.L2871
-	add	x19, x2, x19, uxtw 2
-	str	w26, [x19, 704]
+	adrp	x21, .LANCHOR110
+	mov	w1, 21574
+	adrp	x24, .LANCHOR68
+	add	x24, x24, :lo12:.LANCHOR68
+	ldr	x0, [x21, #:lo12:.LANCHOR110]
+	movk	w1, 0x494c, lsl 16
+	mov	w20, 0
+	mov	w26, 1
+	strh	wzr, [x0, 148]
+	str	w1, [x0]
 .L2871:
+	ldrh	w0, [x19, #:lo12:.LANCHOR8]
+	adrp	x23, .LANCHOR75
+	cmp	w0, w20
+	bhi	.L2880
+	ldr	x0, [x25, #:lo12:.LANCHOR6]
+	mov	w4, 3
+	ldrb	w2, [x23, #:lo12:.LANCHOR75]
+	mov	w10, 15
+	ldr	x6, [x21, #:lo12:.LANCHOR110]
+	cmp	w2, 1
+	ldr	x1, [x22, #:lo12:.LANCHOR9]
+	ldrb	w0, [x0, 47]
+	csinc	w4, w4, wzr, ne
+	and	w4, w4, 255
+	and	w8, w2, 65535
+	ldrh	w3, [x6, 148]
+	udiv	w0, w0, w2
+	and	w5, w0, 65535
+	ubfiz	x0, x0, 2, 8
+	add	x0, x0, 4
+	add	w20, w5, 1
+	add	x0, x1, x0
+.L2883:
+	cmp	w2, 4
+	add	x1, x1, 4
+	csel	w7, w10, w4, eq
+	strb	w7, [x1, -1]
+	ldrb	w7, [x1, -2]
+	orr	w7, w7, -32
+	strb	w7, [x1, -2]
+	cmp	x1, x0
+	bne	.L2883
+	mul	w5, w5, w8
+	mov	w4, 16
+	add	w0, w8, w3
+	sdiv	w4, w4, w2
+	add	w0, w5, w0, uxth
+	strh	w0, [x6, 148]
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	add	w4, w20, w4
+	and	w4, w4, 65535
+	strh	w4, [x6, 134]
+	tbz	x0, 12, .L2884
+	adrp	x0, .LC170
+	mov	w3, w20
+	mov	w2, 128
+	mov	w1, 2598
+	add	x0, x0, :lo12:.LC170
+	bl	printf
+.L2884:
+	ldr	x0, [x21, #:lo12:.LANCHOR110]
+	mov	w2, 128
+	mov	w1, 255
+	add	x0, x0, 160
+	bl	ftl_memset
+	adrp	x0, .LANCHOR112
+	ldrb	w10, [x23, #:lo12:.LANCHOR75]
+	adrp	x3, .LANCHOR74
+	ldr	x2, [x21, #:lo12:.LANCHOR110]
+	ldrb	w16, [x0, #:lo12:.LANCHOR112]
+	adrp	x0, .LANCHOR31
+	and	w11, w10, 65535
+	ldr	x15, [x22, #:lo12:.LANCHOR9]
+	ldrb	w4, [x0, #:lo12:.LANCHOR31]
+	mov	w0, 24
+	ldrh	w8, [x2, 134]
+	sub	w0, w0, w4
+	ldrh	w4, [x3, #:lo12:.LANCHOR74]
+	mul	w1, w20, w11
+	mov	w3, 0
+	sub	w0, w0, w4
+	mov	w4, 1
+	and	w1, w1, 65535
+	lsl	w4, w4, w0
+	and	w4, w4, 65535
+.L2885:
+	cmp	w20, w8
+	bcc	.L2891
+	ldrh	w0, [x19, #:lo12:.LANCHOR8]
+	strh	w3, [x2, 112]
+	sub	w0, w0, w8
+	strh	wzr, [x2, 114]
+	strh	w0, [x2, 116]
+	strh	wzr, [x2, 118]
+	strh	w8, [x2, 132]
+	bl	ftl_low_format_data_init
 	mov	w0, 0
-	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 96
+	ldp	x29, x30, [sp], 80
 	ret
-	.size	pm_write_page, .-pm_write_page
-	.section	.text.ftl_dump_write_open_sblk,"ax",@progbits
-	.align	2
-	.global	ftl_dump_write_open_sblk
-	.type	ftl_dump_write_open_sblk, %function
-ftl_dump_write_open_sblk:
-	sub	sp, sp, #224
-	stp	x29, x30, [sp, 48]
-	add	x29, sp, 48
-	stp	x19, x20, [sp, 64]
-	and	w20, w0, 65535
-	adrp	x0, .LANCHOR6
-	stp	x21, x22, [sp, 80]
-	stp	x23, x24, [sp, 96]
-	ldrh	w0, [x0, #:lo12:.LANCHOR6]
-	stp	x25, x26, [sp, 112]
-	stp	x27, x28, [sp, 128]
-	cmp	w0, w20
-	bls	.L2876
-	adrp	x0, .LANCHOR84
-	str	x0, [x29, 120]
-	ldrb	w1, [x0, #:lo12:.LANCHOR84]
-	cbnz	w1, .L2878
+.L2870:
+	ldrb	w1, [x0, 2]
+	add	x0, x0, 4
+	and	w1, w1, 31
+	bfi	w1, w3, 3, 2
+	strb	w1, [x0, -2]
+	b	.L2869
+.L2880:
 	adrp	x0, .LANCHOR81
+	strh	w20, [x24]
 	ldrb	w0, [x0, #:lo12:.LANCHOR81]
-	cbz	w0, .L2876
-.L2878:
-	adrp	x0, .LANCHOR36
-	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbnz	w0, .L2876
-	adrp	x0, .LANCHOR7
-	ubfiz	x14, x20, 2, 16
-	mov	x15, x0
-	ldr	x1, [x0, #:lo12:.LANCHOR7]
-	add	x1, x1, x14
-	ldrb	w1, [x1, 2]
-	and	w1, w1, 224
-	cmp	w1, 160
-	bne	.L2900
-	adrp	x0, .LANCHOR79
-	ldrb	w25, [x0, #:lo12:.LANCHOR79]
-.L2879:
-	add	x21, x29, 176
-	adrp	x23, .LANCHOR95
-	mov	w0, w20
-	adrp	x26, .LANCHOR111
-	add	x26, x26, :lo12:.LANCHOR111
-	mov	w27, 0
-	strh	w20, [x21, -32]!
-	mov	w28, 0
-	add	x1, x21, 16
-	bl	ftl_get_blk_list_in_sblk
-	ldrh	w1, [x23, #:lo12:.LANCHOR95]
-	and	w0, w0, 255
-	strb	w0, [x29, 153]
-	strb	wzr, [x29, 149]
-	strh	wzr, [x29, 146]
-	mul	w0, w0, w1
-	strh	wzr, [x29, 154]
-	strh	w0, [x29, 150]
-	ldr	x0, [x15, #:lo12:.LANCHOR7]
-	add	x1, x0, x14
-	ldr	w5, [x0, x14]
-	ldrb	w2, [x1, 2]
-	mov	w1, w20
-	ldrh	w4, [x0, x14]
-	adrp	x0, .LC166
-	ubfx	x5, x5, 11, 8
-	add	x0, x0, :lo12:.LC166
-	ubfx	x3, x2, 3, 2
-	and	w4, w4, 2047
-	ubfx	x2, x2, 5, 3
-	bl	printf
-	mov	w0, 1
-	bl	buf_alloc
-	mov	x19, x0
+	cbnz	w0, .L2872
+	mov	w0, w20
+	bl	ftl_test_block
+.L2872:
+	ldrb	w11, [x23, #:lo12:.LANCHOR75]
+	adrp	x0, .LANCHOR112
+	ldr	x6, [x22, #:lo12:.LANCHOR9]
+	mov	w7, 0
+	ldrb	w14, [x0, #:lo12:.LANCHOR112]
 	mov	w10, 0
-	add	x0, x23, :lo12:.LANCHOR95
-	str	x0, [x29, 128]
-.L2880:
-	ldr	x0, [x29, 128]
-	ldrh	w0, [x0]
-	cmp	w0, w27
-	bls	.L2888
-	lsl	w22, w27, 1
-	mov	w28, 0
-	sub	w0, w22, #1
-	add	w22, w22, w27
-	str	w0, [x29, 140]
-	sub	w22, w22, #1
-	adrp	x0, .LC167
-	add	x0, x0, :lo12:.LC167
-	str	x0, [x29, 112]
-	b	.L2891
-.L2900:
-	mov	w25, 1
-	b	.L2879
-.L2889:
-	ldrh	w12, [x21, x24]
-	mov	w0, 65535
-	cmp	w12, w0
-	bne	.L2881
-.L2887:
+	ldr	x13, [x21, #:lo12:.LANCHOR110]
+	mov	w8, 0
+	mul	w12, w20, w11
+	add	x6, x6, x20, uxth 2
+.L2873:
+	cmp	w8, w14
+	bcs	.L2877
+	add	w15, w11, w7
+	b	.L2878
+.L2876:
+	add	w1, w7, w12
+	mov	w0, w8
+	bl	flash_check_bad_block
+	cbz	w0, .L2874
+	ldrb	w1, [x6, 3]
+	lsl	w0, w26, w7
+	orr	w0, w0, w1
+	strb	w0, [x6, 3]
+	ldrh	w0, [x13, 148]
+	add	w0, w0, 1
+	strh	w0, [x13, 148]
+.L2875:
+	add	w7, w7, 1
+.L2878:
+	cmp	w7, w15
+	bne	.L2876
+	add	w8, w8, 1
+	sub	w12, w12, w11
+	and	w8, w8, 65535
+	b	.L2873
+.L2874:
 	add	w10, w10, 1
 	and	w10, w10, 65535
-.L2882:
-	cmp	w25, w10
-	bcs	.L2889
-	add	w11, w28, 1
-	and	w28, w11, 65535
+	b	.L2875
+.L2877:
+	cbnz	w10, .L2879
+	ldrb	w0, [x6, 2]
+	orr	w0, w0, -32
+	strb	w0, [x6, 2]
+.L2879:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L2871
 .L2891:
-	ldrb	w0, [x29, 153]
-	cmp	w0, w28
-	bls	.L2890
-	sxtw	x24, w28
-	mov	w10, 1
-	add	x24, x24, 8
-	lsl	x24, x24, 1
-	b	.L2882
-.L2881:
-	ldrh	w3, [x26]
-	cmp	w25, 3
-	mul	w3, w3, w12
-	add	w0, w3, w10
-	bne	.L2883
-	adrp	x1, .LANCHOR37
-	ldrb	w1, [x1, #:lo12:.LANCHOR37]
-	cbz	w1, .L2884
-	adrp	x1, .LANCHOR79
-	add	w0, w0, w22
-	ldrb	w3, [x1, #:lo12:.LANCHOR79]
-.L2914:
-	orr	w3, w0, w3, lsl 24
+	add	x13, x15, x20, uxth 2
+	mov	w6, 0
+	mov	w12, 0
+	mov	w5, 0
+	ldrb	w0, [x13, 2]
+	orr	w0, w0, -32
+	strb	w0, [x13, 2]
+.L2886:
+	cmp	w5, w16
+	bcc	.L2893
+	add	w20, w20, 1
+	add	w1, w1, w11
+	and	w20, w20, 65535
+	and	w1, w1, 65535
 	b	.L2885
-.L2884:
-	add	w3, w27, w3
-	orr	w3, w3, w10, lsl 24
-.L2885:
-	str	w3, [x19, 40]
+.L2889:
+	ldrb	w14, [x13, 3]
+	add	w17, w12, w7
+	asr	w14, w14, w17
+	tbnz	x14, 0, .L2887
+	cmp	w10, 1
+	bls	.L2892
+	and	w0, w0, 1
+	add	w0, w1, w0
+	and	w0, w0, 65535
+.L2888:
+	add	x14, x2, x3, sxtw 1
+	add	w3, w3, 1
+	and	w3, w3, 65535
+	add	w0, w0, w6
+	strh	w0, [x14, 160]
+.L2887:
+	add	x7, x7, 1
+.L2890:
+	and	w0, w7, 65535
+	cmp	w0, w11
+	bcc	.L2889
+	add	w5, w5, 1
+	add	w6, w4, w6
+	and	w5, w5, 65535
+	add	w12, w12, w10
+	and	w6, w6, 65535
+	b	.L2886
+.L2892:
+	mov	w0, w1
+	b	.L2888
+.L2893:
+	mov	x7, 0
+	b	.L2890
+	.size	ftl_low_format, .-ftl_low_format
+	.section	.text.ftl_re_low_format,"ax",@progbits
+	.align	2
+	.global	ftl_re_low_format
+	.type	ftl_re_low_format, %function
+ftl_re_low_format:
+	stp	x29, x30, [sp, -16]!
 	mov	w1, 1
-	stp	w10, w12, [x29, 104]
+	adrp	x0, .LC171
+	add	x0, x0, :lo12:.LC171
+	add	x29, sp, 0
+	bl	printf
+	bl	sblk_init
+	bl	ftl_info_blk_init
+	bl	ftl_ext_info_init
+	adrp	x0, .LANCHOR110
+	adrp	x2, .LANCHOR8
+	mov	w3, 0
+	mov	w4, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR110]
+	mov	w5, 0
+	ldrh	w7, [x2, #:lo12:.LANCHOR8]
+	adrp	x2, .LANCHOR9
+	ldr	x2, [x2, #:lo12:.LANCHOR9]
+	ldrh	w1, [x0, 134]
+	add	x2, x2, x1, uxth 2
+.L2904:
+	cmp	w1, w7
+	bcc	.L2908
+	strh	w5, [x0, 114]
+	strh	w4, [x0, 118]
+	strh	w3, [x0, 116]
+	strh	wzr, [x0, 122]
+	strh	wzr, [x0, 120]
+	strh	wzr, [x0, 124]
+	bl	ftl_low_format_data_init
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+.L2908:
+	ldrb	w6, [x2, 2]
+	and	w8, w6, 31
+	strb	w8, [x2, 2]
+	ands	w6, w6, 24
+	bne	.L2905
+	add	w5, w5, 1
+	and	w5, w5, 65535
+.L2906:
+	add	w1, w1, 1
+	add	x2, x2, 4
+	and	w1, w1, 65535
+	b	.L2904
+.L2905:
+	cmp	w6, 16
+	bne	.L2907
+	add	w4, w4, 1
+	and	w4, w4, 65535
+	b	.L2906
+.L2907:
+	add	w3, w3, 1
+	and	w3, w3, 65535
+	b	.L2906
+	.size	ftl_re_low_format, .-ftl_re_low_format
+	.section	.text.pm_alloc_new_blk,"ax",@progbits
+	.align	2
+	.global	pm_alloc_new_blk
+	.type	pm_alloc_new_blk, %function
+pm_alloc_new_blk:
+	stp	x29, x30, [sp, -64]!
+	adrp	x2, .LANCHOR79
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR110
+	stp	x21, x22, [sp, 32]
+	ldr	x1, [x20, #:lo12:.LANCHOR110]
+	ldrb	w2, [x2, #:lo12:.LANCHOR79]
+	ldrh	w0, [x1, 690]
+	str	x23, [sp, 48]
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	strh	w0, [x1, 690]
+	cmp	w2, w0
+	bls	.L2911
+	add	x0, x1, x0, sxtw 1
+	ldrh	w1, [x0, 672]
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L2912
+.L2911:
+	adrp	x19, .LC168
+	add	x19, x19, :lo12:.LC168
+	mov	w23, 65535
+	adrp	x22, .LANCHOR9
+.L2913:
+	mov	w0, 1
+	bl	ftl_alloc_sblk
+	and	w21, w0, 65535
+	cmp	w21, w23
+	beq	.L2913
+	mov	w1, 0
+	mov	w0, w21
+	bl	ftl_erase_sblk
+	add	x14, x20, :lo12:.LANCHOR110
+	ldr	x1, [x20, #:lo12:.LANCHOR110]
+	mov	w0, w21
+	add	x1, x1, 672
+	bl	ftl_get_blk_list_in_sblk
+	tst	w0, 65535
+	bne	.L2914
+	mov	w1, w21
 	mov	x0, x19
-	str	w3, [x29, 136]
-	bl	sblk_read_page
-	ldr	w13, [x19, 52]
-	ldp	w10, w12, [x29, 104]
-	cmp	w13, 512
-	ccmn	w13, #1, 4, ne
-	ldr	w3, [x29, 136]
-	bne	.L2887
-	ldr	x1, [x19, 24]
-	mov	w4, w13
-	ldr	x0, [x19, 8]
-	str	w10, [x29, 108]
-	str	w13, [x29, 136]
-	ldr	w2, [x1, 12]
-	str	w2, [sp, 32]
-	ldr	w2, [x1, 8]
-	str	w2, [sp, 24]
-	ldr	w2, [x1, 4]
-	str	w2, [sp, 16]
-	mov	w2, w27
-	ldr	w1, [x1]
-	str	w1, [sp, 8]
-	ldr	w1, [x0, 12]
-	str	w1, [sp]
-	mov	w1, w12
-	ldp	w5, w6, [x0]
-	ldr	w7, [x0, 8]
-	ldr	x0, [x29, 112]
 	bl	printf
-	ldr	w13, [x29, 136]
-	ldr	w10, [x29, 108]
-	cmp	w13, 512
-	bne	.L2887
-.L2888:
-	mov	w4, w10
-	mov	w3, w28
-	mov	w2, w27
-	mov	w1, w20
-	adrp	x24, .LANCHOR131
-	adrp	x0, .LC168
-	add	x0, x0, :lo12:.LC168
+	ldr	x0, [x22, #:lo12:.LANCHOR9]
+	add	x21, x0, x21, uxth 2
+	ldrb	w0, [x21, 2]
+	orr	w0, w0, -32
+	strb	w0, [x21, 2]
+	b	.L2913
+.L2914:
+	ldr	x0, [x14]
+	adrp	x1, .LANCHOR204
+	mov	w2, 1
+	mov	w19, 0
+	add	x0, x0, 416
+	str	w2, [x1, #:lo12:.LANCHOR204]
+	mov	w1, 65535
+	strh	wzr, [x0, 274]
+.L2916:
+	ldrh	w2, [x0]
+	cmp	w2, w1
+	beq	.L2915
+	add	w19, w19, 1
+	add	x0, x0, 2
+	and	w19, w19, 65535
+	cmp	w19, 128
+	bne	.L2916
+	adrp	x1, .LANCHOR205
+	adrp	x0, .LC0
+	mov	w2, 264
+	add	x1, x1, :lo12:.LANCHOR205
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2915:
+	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	add	x19, x0, x19, sxtw 1
+	ldrh	w1, [x0, 688]
+	strh	w21, [x19, 416]
+	add	w1, w1, 1
+	strh	w1, [x0, 688]
+.L2912:
+	ldr	x1, [x20, #:lo12:.LANCHOR110]
+	ldrh	w0, [x1, 690]
+	add	x0, x0, 336
+	ldrh	w19, [x1, x0, lsl 1]
+	mov	w0, 65533
+	sub	w1, w19, #1
+	cmp	w0, w1, uxth
+	bcs	.L2918
+	adrp	x1, .LANCHOR205
+	adrp	x0, .LC0
+	mov	w2, 270
+	add	x1, x1, :lo12:.LANCHOR205
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2918:
+	adrp	x1, .LANCHOR31
+	mov	w2, 24
+	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	ldrb	w1, [x1, #:lo12:.LANCHOR31]
+	sub	w2, w2, w1
+	adrp	x1, .LANCHOR74
+	strh	wzr, [x0, 696]
+	ldrh	w1, [x1, #:lo12:.LANCHOR74]
+	strh	w19, [x0, 692]
+	sub	w2, w2, w1
+	asr	w4, w19, w2
+	strh	w4, [x0, 694]
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L2921
+	mov	w0, 1
+	and	w4, w4, 65535
+	lsl	w2, w0, w2
+	mov	w3, w19
+	adrp	x0, .LC172
+	sub	w2, w2, #1
+	mov	w1, w19
+	add	x0, x0, :lo12:.LC172
 	bl	printf
-	ldr	x0, [x19, 8]
-	mov	w1, 0
-	ldrb	w2, [x24, #:lo12:.LANCHOR131]
-	adrp	x25, .LANCHOR14
-	adrp	x26, .LC169
-	add	x25, x25, :lo12:.LANCHOR14
-	add	x26, x26, :lo12:.LC169
-	lsl	w2, w2, 9
-	bl	ftl_memset
-	ldr	x0, [x19, 24]
+.L2921:
+	mov	w0, 0
+	ldr	x23, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+	.size	pm_alloc_new_blk, .-pm_alloc_new_blk
+	.section	.text.pm_write_page,"ax",@progbits
+	.align	2
+	.global	pm_write_page
+	.type	pm_write_page, %function
+pm_write_page:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w19, w0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR94
+	stp	x23, x24, [sp, 48]
+	adrp	x22, .LANCHOR111
+	adrp	x24, .LANCHOR110
+	mov	x23, x1
+	add	x21, x21, :lo12:.LANCHOR94
+	mov	x20, x24
+	add	x22, x22, :lo12:.LANCHOR111
+	stp	x25, x26, [sp, 64]
+	str	x27, [sp, 80]
+	mov	w25, 65535
+.L2929:
+	ldr	x0, [x24, #:lo12:.LANCHOR110]
+	ldr	w1, [x0, 48]
+	ldrh	w2, [x0, 696]
+	add	w1, w1, 1
+	str	w1, [x0, 48]
+	ldrh	w1, [x21]
+	cmp	w2, w1
+	bcs	.L2930
+	ldrh	w0, [x0, 692]
+	cmp	w0, w25
+	bne	.L2931
+.L2930:
+	bl	pm_alloc_new_blk
+	mov	w0, 0
+	bl	ftl_info_flush
+.L2931:
+	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	ldrh	w0, [x0, 692]
+	cmp	w0, w25
+	bne	.L2932
+	adrp	x1, .LANCHOR206
+	adrp	x0, .LC0
+	mov	w2, 303
+	add	x1, x1, :lo12:.LANCHOR206
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2932:
+	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	adrp	x27, .LANCHOR207
+	ldrh	w1, [x22]
+	mov	w2, 64
+	ldrh	w26, [x0, 692]
+	ldrh	w0, [x0, 696]
+	madd	w26, w26, w1, w0
+	ldr	x0, [x27, #:lo12:.LANCHOR207]
 	mov	w1, 0
-	ldrb	w2, [x24, #:lo12:.LANCHOR131]
-	lsl	w2, w2, 1
 	bl	ftl_memset
-.L2892:
-	ldrh	w0, [x23, #:lo12:.LANCHOR95]
-	cmp	w0, w27
-	bls	.L2898
-	lsl	w0, w27, 1
-	str	w0, [x29, 140]
-	ldr	x0, [x29, 120]
-	mov	w22, 0
-	add	x28, x0, :lo12:.LANCHOR84
-	b	.L2899
-.L2883:
-	cmp	w25, 2
-	bne	.L2886
-	adrp	x1, .LANCHOR79
-	ldrb	w3, [x1, #:lo12:.LANCHOR79]
-	ldr	w1, [x29, 140]
-	add	w0, w1, w0
-	b	.L2914
-.L2886:
-	add	w3, w27, w3
-	b	.L2885
-.L2890:
-	add	w8, w27, 1
-	and	w27, w8, 65535
-	b	.L2880
-.L2897:
-	ldr	w0, [x25]
-	tbz	x0, 12, .L2893
-	mov	w2, w22
-	mov	w1, w27
-	mov	x0, x26
-	bl	printf
-.L2893:
-	ldrb	w1, [x28]
-	adrp	x2, .LANCHOR111
-	sxtw	x0, w22
-	cbz	w1, .L2894
-	add	x0, x0, 8
-	ldrh	w1, [x2, #:lo12:.LANCHOR111]
-	ldrh	w0, [x21, x0, lsl 1]
-	mul	w0, w0, w1
-	orr	w0, w0, w27
-	str	w0, [x19, 40]
-	mov	x0, x19
-	bl	sblk_3d_tlc_dump_prog
-.L2895:
-	add	w22, w22, 1
-	and	w22, w22, 65535
-.L2899:
-	ldrb	w0, [x29, 153]
-	cmp	w0, w22
-	bhi	.L2897
-	add	w8, w27, 1
-	and	w27, w8, 65535
-	b	.L2892
-.L2894:
-	adrp	x1, .LANCHOR79
-	add	x0, x0, 8
-	ldrb	w1, [x1, #:lo12:.LANCHOR79]
-	cmp	w1, 2
-	bne	.L2896
-	ldrh	w1, [x2, #:lo12:.LANCHOR111]
-	ldrh	w0, [x21, x0, lsl 1]
-	mul	w0, w0, w1
-	ldr	w1, [x29, 140]
-	orr	w0, w0, w1
-	orr	w0, w0, 33554432
-	str	w0, [x19, 40]
-	mov	x0, x19
-	bl	sblk_mlc_dump_prog
-	b	.L2895
-.L2896:
-	ldrh	w1, [x21, x0, lsl 1]
-	mov	w6, 1
-	ldrh	w0, [x2, #:lo12:.LANCHOR111]
-	mov	w5, 0
-	ldrb	w4, [x24, #:lo12:.LANCHOR131]
-	ldr	x3, [x19, 24]
-	mul	w1, w1, w0
-	adrp	x0, .LANCHOR32
-	ldrb	w2, [x0, #:lo12:.LANCHOR32]
-	mov	w0, 24
-	orr	w1, w1, w27
-	str	w1, [x19, 40]
-	sub	w0, w0, w2
-	lsl	w6, w6, w2
-	ldr	x2, [x19, 8]
-	sub	w6, w6, #1
-	lsl	w7, w6, w0
-	lsr	w0, w1, w0
-	bic	w1, w1, w7
-	and	w0, w0, w6
-	bl	flash_prog_page_en
-	b	.L2895
-.L2898:
-	mov	x0, x19
-	bl	zbuf_free
-	adrp	x0, .LC170
-	mov	w1, w20
-	add	x0, x0, :lo12:.LC170
+	ldr	x6, [x27, #:lo12:.LANCHOR207]
+	ldr	x7, [x20, #:lo12:.LANCHOR110]
+	str	w19, [x6]
+	ldr	w0, [x7, 48]
+	str	w0, [x6, 4]
+	adrp	x0, .LANCHOR131
+	ldrb	w8, [x0, #:lo12:.LANCHOR131]
+	mov	x0, x23
+	lsl	w1, w8, 9
+	bl	js_hash
+	str	w0, [x6, 8]
+	ldrb	w0, [x7, 694]
+	mov	x2, x23
+	mov	w1, w26
+	mov	w4, w8
+	mov	x3, x6
+	bl	ftl_prog_page
+	ldr	x2, [x20, #:lo12:.LANCHOR110]
+	ldrh	w1, [x2, 696]
+	add	w1, w1, 1
+	and	w1, w1, 65535
+	strh	w1, [x2, 696]
+	cmp	w1, 1
+	adrp	x1, .LANCHOR208
+	beq	.L2933
+	ldrb	w3, [x1, #:lo12:.LANCHOR208]
+	cbz	w3, .L2934
+.L2933:
+	strb	wzr, [x1, #:lo12:.LANCHOR208]
+	b	.L2929
+.L2934:
+	cmn	w0, #1
+	bne	.L2936
+	mov	w1, w26
+	adrp	x0, .LC173
+	add	x0, x0, :lo12:.LC173
 	bl	printf
-.L2876:
-	ldp	x19, x20, [sp, 64]
-	ldp	x21, x22, [sp, 80]
-	ldp	x23, x24, [sp, 96]
-	ldp	x25, x26, [sp, 112]
-	ldp	x27, x28, [sp, 128]
-	ldp	x29, x30, [sp, 48]
-	add	sp, sp, 224
+	b	.L2929
+.L2936:
+	ldrh	w0, [x2, 698]
+	cmp	w19, w0
+	bcs	.L2937
+	add	x19, x2, x19, uxtw 2
+	str	w26, [x19, 704]
+.L2937:
+	mov	w0, 0
+	ldr	x27, [sp, 80]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
 	ret
-	.size	ftl_dump_write_open_sblk, .-ftl_dump_write_open_sblk
+	.size	pm_write_page, .-pm_write_page
 	.section	.text.flash_info_flush,"ax",@progbits
 	.align	2
 	.global	flash_info_flush
 	.type	flash_info_flush, %function
 flash_info_flush:
 	stp	x29, x30, [sp, -112]!
-	adrp	x0, .LANCHOR14
+	adrp	x0, .LANCHOR19
 	add	x29, sp, 0
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2916
+	tbz	x0, 12, .L2943
 	adrp	x2, .LANCHOR209
-	adrp	x0, .LC97
+	adrp	x0, .LC94
 	add	x2, x2, :lo12:.LANCHOR209
-	mov	w1, 364
-	add	x0, x0, :lo12:.LC97
+	mov	w1, 365
+	add	x0, x0, :lo12:.LC94
 	bl	printf
-.L2916:
+.L2943:
 	adrp	x23, .LANCHOR210
-	adrp	x20, .LANCHOR27
+	adrp	x20, .LANCHOR6
 	mov	w2, 64
 	mov	w1, 0
 	ldr	x0, [x23, #:lo12:.LANCHOR210]
 	adrp	x21, .LANCHOR211
 	adrp	x22, .LANCHOR2
-	adrp	x24, .LC172
-	adrp	x25, .LANCHOR147
+	adrp	x24, .LC175
+	adrp	x25, .LANCHOR144
 	add	x22, x22, :lo12:.LANCHOR2
-	add	x24, x24, :lo12:.LC172
-	add	x25, x25, :lo12:.LANCHOR147
+	add	x24, x24, :lo12:.LC175
+	add	x25, x25, :lo12:.LANCHOR144
 	bl	ftl_memset
 	add	x27, x21, :lo12:.LANCHOR211
-	ldr	x1, [x20, #:lo12:.LANCHOR27]
+	ldr	x1, [x20, #:lo12:.LANCHOR6]
 	mov	w3, 16
-	mov	w2, 4
-	adrp	x0, .LC171
-	add	x0, x0, :lo12:.LC171
+	mov	w2, 4
+	adrp	x0, .LC174
+	add	x0, x0, :lo12:.LC174
 	mov	w26, 0
 	bl	rknand_print_hex
-	ldr	x6, [x20, #:lo12:.LANCHOR27]
+	ldr	x6, [x20, #:lo12:.LANCHOR6]
 	add	x0, x6, 16
 	ldr	w1, [x6, 8]
 	bl	js_hash
 	str	w0, [x6, 12]
-.L2917:
+.L2944:
 	add	x28, x21, :lo12:.LANCHOR211
 	ldrb	w4, [x21, #:lo12:.LANCHOR211]
 	ldrh	w19, [x22]
@@ -18321,8 +18877,8 @@ flash_info_flush:
 	sub	w0, w0, #1
 	cmp	w1, w0
 	ldp	w3, w4, [x29, 104]
-	blt	.L2918
-	ldr	x6, [x20, #:lo12:.LANCHOR27]
+	blt	.L2945
+	ldr	x6, [x20, #:lo12:.LANCHOR6]
 	ldrb	w7, [x28, 1]
 	strh	wzr, [x28, 2]
 	ldr	w0, [x6, 4]
@@ -18340,19 +18896,19 @@ flash_info_flush:
 	ldrh	w19, [x22]
 	str	w0, [x6, 12]
 	mul	w19, w19, w7
-.L2927:
+.L2954:
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_erase_block
-	b	.L2919
-.L2922:
+	b	.L2946
+.L2949:
 	mov	w26, 1
-	b	.L2917
-.L2918:
+	b	.L2944
+.L2945:
 	madd	w19, w19, w4, w3
-	cbz	w1, .L2927
-.L2919:
-	ldr	x2, [x20, #:lo12:.LANCHOR27]
+	cbz	w1, .L2954
+.L2946:
+	ldr	x2, [x20, #:lo12:.LANCHOR6]
 	mov	w1, w19
 	ldr	x3, [x23, #:lo12:.LANCHOR210]
 	mov	w5, 1
@@ -18368,14 +18924,14 @@ flash_info_flush:
 	ldrh	w1, [x27, 2]
 	add	w1, w1, 1
 	strh	w1, [x27, 2]
-	bne	.L2920
+	bne	.L2947
 	mov	w1, w19
-	adrp	x0, .LC173
-	add	x0, x0, :lo12:.LC173
+	adrp	x0, .LC176
+	add	x0, x0, :lo12:.LC176
 	bl	printf
-	b	.L2917
-.L2920:
-	cbz	w26, .L2922
+	b	.L2944
+.L2947:
+	cbz	w26, .L2949
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -18391,59 +18947,59 @@ flash_info_flush:
 	.type	flash_info_blk_init, %function
 flash_info_blk_init:
 	stp	x29, x30, [sp, -96]!
-	adrp	x0, .LANCHOR14
+	adrp	x0, .LANCHOR19
 	add	x29, sp, 0
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR27
+	adrp	x20, .LANCHOR6
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	tbz	x0, 12, .L2929
-	ldr	x4, [x20, #:lo12:.LANCHOR27]
+	tbz	x0, 12, .L2956
+	ldr	x4, [x20, #:lo12:.LANCHOR6]
 	adrp	x2, .LANCHOR212
-	adrp	x0, .LC174
+	adrp	x0, .LC177
 	mov	w3, 2048
 	add	x2, x2, :lo12:.LANCHOR212
-	mov	w1, 49
-	add	x0, x0, :lo12:.LC174
+	mov	w1, 50
+	add	x0, x0, :lo12:.LC177
 	bl	printf
-.L2929:
+.L2956:
 	adrp	x24, .LANCHOR2
 	mov	w23, 21321
 	add	x26, x24, :lo12:.LANCHOR2
 	mov	w22, 4
 	adrp	x21, .LANCHOR210
 	movk	w23, 0x5359, lsl 16
-.L2933:
+.L2960:
 	mov	w19, 0
-.L2932:
+.L2959:
 	ldrh	w1, [x26]
 	mov	w4, 4
 	ldr	x3, [x21, #:lo12:.LANCHOR210]
 	mov	w0, 0
-	ldr	x2, [x20, #:lo12:.LANCHOR27]
+	ldr	x2, [x20, #:lo12:.LANCHOR6]
 	add	x27, x21, :lo12:.LANCHOR210
-	add	x25, x20, :lo12:.LANCHOR27
+	add	x25, x20, :lo12:.LANCHOR6
 	madd	w1, w1, w22, w19
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L2930
-	ldr	x2, [x20, #:lo12:.LANCHOR27]
+	beq	.L2957
+	ldr	x2, [x20, #:lo12:.LANCHOR6]
 	ldr	w0, [x2]
 	cmp	w0, w23
-	beq	.L2931
-.L2930:
+	beq	.L2958
+.L2957:
 	add	w19, w19, 1
 	cmp	w19, 4
-	bne	.L2932
+	bne	.L2959
 	add	w22, w22, 1
 	cmp	w22, 16
-	bne	.L2933
-.L2959:
+	bne	.L2960
+.L2986:
 	mov	w0, -1
-.L2928:
+.L2955:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -18451,43 +19007,43 @@ flash_info_blk_init:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2941:
+.L2968:
 	ldr	x0, [x25]
 	ldr	w1, [x0]
 	cmp	w1, w23
-	bne	.L2942
+	bne	.L2969
 	ldr	w22, [x0, 4]
-.L2935:
+.L2962:
 	add	x23, x19, :lo12:.LANCHOR211
 	ldrh	w0, [x24, #:lo12:.LANCHOR2]
 	ldr	x3, [x21, #:lo12:.LANCHOR210]
 	mov	w4, 4
-	ldr	x2, [x20, #:lo12:.LANCHOR27]
+	ldr	x2, [x20, #:lo12:.LANCHOR6]
 	ldrb	w1, [x23, 1]
 	mul	w1, w1, w0
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L2936
-	ldr	x0, [x20, #:lo12:.LANCHOR27]
+	beq	.L2963
+	ldr	x0, [x20, #:lo12:.LANCHOR6]
 	mov	w1, 21321
 	movk	w1, 0x5359, lsl 16
 	ldr	w2, [x0]
 	cmp	w2, w1
-	bne	.L2936
+	bne	.L2963
 	ldr	w1, [x0, 4]
 	cmp	w22, w1
-	bcs	.L2936
+	bcs	.L2963
 	ldrb	w1, [x0, 37]
 	ldrb	w0, [x0, 36]
 	strb	w1, [x19, #:lo12:.LANCHOR211]
 	strb	w0, [x23, 1]
-.L2936:
+.L2963:
 	ldrb	w1, [x19, #:lo12:.LANCHOR211]
 	add	x22, x19, :lo12:.LANCHOR211
 	ldr	x3, [x21, #:lo12:.LANCHOR210]
 	mov	w4, 4
-	ldr	x2, [x20, #:lo12:.LANCHOR27]
+	ldr	x2, [x20, #:lo12:.LANCHOR6]
 	mov	w0, 0
 	bl	flash_get_last_written_page
 	and	w25, w0, 65535
@@ -18500,42 +19056,42 @@ flash_info_blk_init:
 	movk	w24, 0x5359, lsl 16
 	mul	w23, w23, w1
 	add	w23, w23, w0, sxth
-.L2937:
+.L2964:
 	sub	w0, w25, w22
 	sxth	w19, w0
-	tbz	w19, #31, .L2940
+	tbz	w19, #31, .L2967
 	cmn	w19, #1
-	bne	.L2939
-	ldr	x0, [x20, #:lo12:.LANCHOR27]
+	bne	.L2966
+	ldr	x0, [x20, #:lo12:.LANCHOR6]
 	ldr	w1, [x0]
-	adrp	x0, .LC175
-	add	x0, x0, :lo12:.LC175
+	adrp	x0, .LC178
+	add	x0, x0, :lo12:.LC178
 	bl	printf
-	b	.L2959
-.L2940:
+	b	.L2986
+.L2967:
 	ldr	x3, [x21, #:lo12:.LANCHOR210]
 	mov	w4, 4
-	ldr	x2, [x20, #:lo12:.LANCHOR27]
+	ldr	x2, [x20, #:lo12:.LANCHOR6]
 	sub	w1, w23, w22
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L2938
-	ldr	x0, [x20, #:lo12:.LANCHOR27]
+	beq	.L2965
+	ldr	x0, [x20, #:lo12:.LANCHOR6]
 	ldr	w0, [x0]
 	cmp	w0, w24
-	beq	.L2939
-.L2938:
+	beq	.L2966
+.L2965:
 	add	w22, w22, 1
-	b	.L2937
-.L2939:
+	b	.L2964
+.L2966:
 	cmp	w22, 1
-	bls	.L2943
+	bls	.L2970
 	bl	flash_info_flush
-.L2943:
+.L2970:
 	mov	w0, 0
-	b	.L2928
-.L2931:
+	b	.L2955
+.L2958:
 	adrp	x19, .LANCHOR211
 	add	x1, x19, :lo12:.LANCHOR211
 	ldrb	w3, [x2, 37]
@@ -18549,10 +19105,10 @@ flash_info_blk_init:
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	bne	.L2941
-.L2942:
+	bne	.L2968
+.L2969:
 	mov	w22, 0
-	b	.L2935
+	b	.L2962
 	.size	flash_info_blk_init, .-flash_info_blk_init
 	.section	.text.nand_flash_init,"ax",@progbits
 	.align	2
@@ -18562,64 +19118,64 @@ nand_flash_init:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR14
+	adrp	x21, .LANCHOR19
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	ldr	w0, [x21, #:lo12:.LANCHOR19]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	tbz	x0, 12, .L2961
+	tbz	x0, 12, .L2988
 	adrp	x2, .LANCHOR213
-	adrp	x0, .LC97
+	adrp	x0, .LC94
 	add	x2, x2, :lo12:.LANCHOR213
-	mov	w1, 3429
-	add	x0, x0, :lo12:.LC97
+	mov	w1, 3451
+	add	x0, x0, :lo12:.LC94
 	bl	printf
-.L2961:
-	adrp	x0, .LANCHOR172
-	adrp	x24, .LANCHOR16
-	adrp	x22, .LANCHOR48
-	add	x25, x22, :lo12:.LANCHOR48
-	str	wzr, [x0, #:lo12:.LANCHOR172]
+.L2988:
+	adrp	x0, .LANCHOR169
+	adrp	x24, .LANCHOR21
+	adrp	x22, .LANCHOR47
+	add	x25, x22, :lo12:.LANCHOR47
+	str	wzr, [x0, #:lo12:.LANCHOR169]
 	mov	x0, x19
 	bl	nandc_init
-	adrp	x19, .LANCHOR33
-	add	x0, x19, :lo12:.LANCHOR33
-	str	x0, [x24, #:lo12:.LANCHOR16]
-	adrp	x0, .LANCHOR18
-	adrp	x23, .LANCHOR32
+	adrp	x19, .LANCHOR32
+	add	x0, x19, :lo12:.LANCHOR32
+	str	x0, [x24, #:lo12:.LANCHOR21]
+	adrp	x0, .LANCHOR23
+	adrp	x23, .LANCHOR31
 	mov	x26, x25
 	mov	w1, 1
 	mov	w20, 0
-	strb	w1, [x0, #:lo12:.LANCHOR18]
+	strb	w1, [x0, #:lo12:.LANCHOR23]
 	mov	w27, 44
 	mov	w0, 3
 	mov	w2, 8
-	strb	w0, [x23, #:lo12:.LANCHOR32]
+	strb	w0, [x23, #:lo12:.LANCHOR31]
 	mov	w1, 0
-	adrp	x0, .LANCHOR30
-	add	x0, x0, :lo12:.LANCHOR30
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
 	bl	ftl_memset
 	mov	w2, 32
 	mov	w1, 0
-	adrp	x0, .LANCHOR148
-	add	x0, x0, :lo12:.LANCHOR148
+	adrp	x0, .LANCHOR145
+	add	x0, x0, :lo12:.LANCHOR145
 	bl	ftl_memset
-.L2967:
+.L2994:
 	mov	x1, x25
 	mov	w0, w20
 	bl	flash_read_id
-	cbnz	w20, .L2962
+	cbnz	w20, .L2989
 	ldrb	w0, [x26]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bls	.L2963
-.L2965:
-	mov	w8, -2
-.L2960:
-	mov	w0, w8
+	bls	.L2990
+.L2992:
+	mov	w22, -2
+.L2987:
+	mov	w0, w22
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -18627,35 +19183,35 @@ nand_flash_init:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2963:
+.L2990:
 	ldrb	w0, [x26, 1]
 	cmp	w0, 255
-	beq	.L2965
-.L2962:
+	beq	.L2992
+.L2989:
 	ldrb	w0, [x25]
 	cmp	w0, 181
-	bne	.L2966
+	bne	.L2993
 	strb	w27, [x25]
-.L2966:
+.L2993:
 	add	w20, w20, 1
 	add	x25, x25, 8
 	and	w20, w20, 255
 	cmp	w20, 4
-	bne	.L2967
+	bne	.L2994
 	adrp	x0, .LANCHOR214
 	add	x8, x0, :lo12:.LANCHOR214
 	add	x8, x8, 1
 	mov	x7, x0
-	add	x12, x22, :lo12:.LANCHOR48
+	add	x12, x22, :lo12:.LANCHOR47
 	mov	x10, 0
-.L2970:
+.L2997:
 	ldrb	w2, [x8, -1]
 	mov	w11, w10
 	lsl	x25, x10, 5
 	mov	x1, x12
 	mov	x0, x8
 	bl	flash_mem_cmp8
-	cbnz	w0, .L2968
+	cbnz	w0, .L2995
 	add	x0, x7, :lo12:.LANCHOR214
 	ubfiz	x11, x11, 5, 32
 	add	x25, x0, x25
@@ -18664,77 +19220,77 @@ nand_flash_init:
 	add	x4, x1, :lo12:.LANCHOR215
 	ldrb	w3, [x0, 22]
 	mov	x0, 0
-.L2969:
+.L2996:
 	lsl	x5, x0, 5
 	mov	w2, w0
 	ldrb	w5, [x5, x4]
 	cmp	w5, w3
-	beq	.L2971
+	beq	.L2998
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L2969
+	bne	.L2996
 	mov	w2, w0
-.L2971:
+.L2998:
 	ubfiz	x0, x2, 5, 32
 	add	x1, x1, :lo12:.LANCHOR215
 	add	x1, x1, x0
 	mov	w2, 32
-	adrp	x0, .LANCHOR20
-	add	x20, x19, :lo12:.LANCHOR33
-	add	x0, x0, :lo12:.LANCHOR20
-	adrp	x26, .LANCHOR28
+	adrp	x0, .LANCHOR25
+	add	x20, x19, :lo12:.LANCHOR32
+	add	x0, x0, :lo12:.LANCHOR25
+	adrp	x26, .LANCHOR27
 	bl	ftl_memcpy
 	mov	w2, 32
 	mov	x1, x25
 	mov	x0, x20
 	bl	ftl_memcpy
-	ldrb	w0, [x26, #:lo12:.LANCHOR28]
+	ldrb	w0, [x26, #:lo12:.LANCHOR27]
 	cmp	w0, 8
-	bhi	.L2972
+	bhi	.L2999
 	ldrb	w0, [x20, 20]
 	cmp	w0, 60
-	bls	.L2972
+	bls	.L2999
 	mov	w0, 60
 	strb	w0, [x20, 20]
-.L2972:
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3002
+.L2999:
+	ldr	w0, [x21, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L3029
 	adrp	x2, .LANCHOR213
-	adrp	x0, .LC97
+	adrp	x0, .LC94
 	add	x2, x2, :lo12:.LANCHOR213
-	mov	w1, 3456
-	add	x0, x0, :lo12:.LC97
+	mov	w1, 3478
+	add	x0, x0, :lo12:.LC94
 	bl	printf
-.L3002:
-	ldr	x0, [x24, #:lo12:.LANCHOR16]
+.L3029:
+	ldr	x0, [x24, #:lo12:.LANCHOR21]
 	ldrh	w0, [x0, 10]
 	cmp	w0, 1023
-	bls	.L2973
+	bls	.L3000
 	mov	w0, 2
-	strb	w0, [x23, #:lo12:.LANCHOR32]
-.L2973:
+	strb	w0, [x23, #:lo12:.LANCHOR31]
+.L3000:
 	mov	w0, 16384
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR176
-	adrp	x23, .LANCHOR27
-	add	x20, x19, :lo12:.LANCHOR33
-	adrp	x25, .LANCHOR49
-	str	x0, [x1, #:lo12:.LANCHOR176]
+	adrp	x1, .LANCHOR173
+	adrp	x23, .LANCHOR6
+	add	x20, x19, :lo12:.LANCHOR32
+	adrp	x25, .LANCHOR48
+	str	x0, [x1, #:lo12:.LANCHOR173]
 	mov	w0, 16384
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR166
-	str	x0, [x1, #:lo12:.LANCHOR166]
+	adrp	x1, .LANCHOR163
+	str	x0, [x1, #:lo12:.LANCHOR163]
 	mov	w0, 2048
 	bl	ftl_malloc
-	str	x0, [x23, #:lo12:.LANCHOR27]
+	str	x0, [x23, #:lo12:.LANCHOR6]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR175
-	str	x0, [x1, #:lo12:.LANCHOR175]
+	adrp	x1, .LANCHOR172
+	str	x0, [x1, #:lo12:.LANCHOR172]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR168
-	str	x0, [x1, #:lo12:.LANCHOR168]
+	adrp	x1, .LANCHOR165
+	str	x0, [x1, #:lo12:.LANCHOR165]
 	mov	w0, 64
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR210
@@ -18745,28 +19301,28 @@ nand_flash_init:
 	ldrb	w0, [x20, 18]
 	bl	flash_lsb_page_tbl_build
 	ldrb	w0, [x20, 20]
-	adrp	x20, .LANCHOR174
+	adrp	x20, .LANCHOR171
 	bl	nandc_bch_sel
-	str	xzr, [x20, #:lo12:.LANCHOR174]
-	ldr	x2, [x24, #:lo12:.LANCHOR16]
+	str	xzr, [x20, #:lo12:.LANCHOR171]
+	ldr	x2, [x24, #:lo12:.LANCHOR21]
 	ldrh	w0, [x2, 16]
 	ubfx	x1, x0, 8, 3
-	strb	w1, [x25, #:lo12:.LANCHOR49]
-	adrp	x1, .LANCHOR186
+	strb	w1, [x25, #:lo12:.LANCHOR48]
+	adrp	x1, .LANCHOR183
 	ubfx	x3, x0, 3, 1
-	strb	w3, [x1, #:lo12:.LANCHOR186]
-	adrp	x1, .LANCHOR45
+	strb	w3, [x1, #:lo12:.LANCHOR183]
+	adrp	x1, .LANCHOR44
 	ubfx	x3, x0, 4, 1
-	strb	w3, [x1, #:lo12:.LANCHOR45]
-	adrp	x1, .LANCHOR84
+	strb	w3, [x1, #:lo12:.LANCHOR44]
+	adrp	x1, .LANCHOR83
 	ubfx	x3, x0, 12, 1
-	strb	w3, [x1, #:lo12:.LANCHOR84]
-	adrp	x1, .LANCHOR81
+	strb	w3, [x1, #:lo12:.LANCHOR83]
+	adrp	x1, .LANCHOR80
 	ubfx	x3, x0, 13, 1
-	strb	w3, [x1, #:lo12:.LANCHOR81]
-	adrp	x1, .LANCHOR36
+	strb	w3, [x1, #:lo12:.LANCHOR80]
+	adrp	x1, .LANCHOR35
 	ubfx	x3, x0, 11, 1
-	strb	w3, [x1, #:lo12:.LANCHOR36]
+	strb	w3, [x1, #:lo12:.LANCHOR35]
 	adrp	x3, .LANCHOR124
 	ldrb	w1, [x2, 31]
 	ldrb	w2, [x2, 28]
@@ -18779,226 +19335,226 @@ nand_flash_init:
 	ubfx	x4, x0, 14, 1
 	lsr	w0, w0, 15
 	strb	w4, [x3, #:lo12:.LANCHOR1]
-	adrp	x3, .LANCHOR82
-	strb	w0, [x3, #:lo12:.LANCHOR82]
+	adrp	x3, .LANCHOR81
+	strb	w0, [x3, #:lo12:.LANCHOR81]
 	adrp	x0, .LANCHOR0
 	ubfx	x3, x1, 3, 1
 	ubfx	x1, x1, 4, 1
 	strb	w2, [x0, #:lo12:.LANCHOR0]
-	adrp	x0, .LANCHOR31
-	strb	w3, [x0, #:lo12:.LANCHOR31]
-	adrp	x0, .LANCHOR37
-	strb	w1, [x0, #:lo12:.LANCHOR37]
-	adrp	x1, .LANCHOR17
+	adrp	x0, .LANCHOR30
+	strb	w3, [x0, #:lo12:.LANCHOR30]
+	adrp	x0, .LANCHOR36
+	strb	w1, [x0, #:lo12:.LANCHOR36]
+	adrp	x1, .LANCHOR22
 	mov	w0, 60
-	strb	w0, [x1, #:lo12:.LANCHOR17]
-	ldrb	w0, [x26, #:lo12:.LANCHOR28]
+	strb	w0, [x1, #:lo12:.LANCHOR22]
+	ldrb	w0, [x26, #:lo12:.LANCHOR27]
 	cmp	w0, 9
-	bne	.L2974
+	bne	.L3001
 	mov	w3, 70
-	strb	w3, [x1, #:lo12:.LANCHOR17]
-.L2974:
-	add	x1, x19, :lo12:.LANCHOR33
-	adrp	x24, .LANCHOR19
-	strb	w2, [x24, #:lo12:.LANCHOR19]
+	strb	w3, [x1, #:lo12:.LANCHOR22]
+.L3001:
+	add	x1, x19, :lo12:.LANCHOR32
+	adrp	x24, .LANCHOR24
+	strb	w2, [x24, #:lo12:.LANCHOR24]
 	ldrb	w2, [x1, 31]
-	tbz	x2, 0, .L2975
+	tbz	x2, 0, .L3002
 	ldrb	w1, [x1, 29]
-	cbz	w1, .L2976
+	cbz	w1, .L3003
 	mov	w1, 2
-.L3034:
-	strb	w1, [x24, #:lo12:.LANCHOR19]
-.L2975:
+.L3061:
+	strb	w1, [x24, #:lo12:.LANCHOR24]
+.L3002:
 	cmp	w0, 8
-	bne	.L2977
-	ldrb	w0, [x22, #:lo12:.LANCHOR48]
+	bne	.L3004
+	ldrb	w0, [x22, #:lo12:.LANCHOR47]
 	mov	w1, 137
 	cmp	w0, 44
 	ccmp	w0, w1, 4, ne
-	bne	.L2977
-	add	x0, x19, :lo12:.LANCHOR33
+	bne	.L3004
+	add	x0, x19, :lo12:.LANCHOR32
 	ldrb	w0, [x0, 28]
 	cmp	w0, 3
-	bne	.L2977
-	strb	wzr, [x24, #:lo12:.LANCHOR19]
-.L2977:
-	add	x1, x19, :lo12:.LANCHOR33
-	adrp	x27, .LANCHOR24
+	bne	.L3004
+	strb	wzr, [x24, #:lo12:.LANCHOR24]
+.L3004:
+	add	x1, x19, :lo12:.LANCHOR32
+	adrp	x27, .LANCHOR16
 	ldrb	w0, [x1, 19]
 	ldrh	w1, [x1, 16]
-	strb	w0, [x27, #:lo12:.LANCHOR24]
-	tbz	x1, 6, .L2979
+	strb	w0, [x27, #:lo12:.LANCHOR16]
+	tbz	x1, 6, .L3006
 	sub	w1, w0, #17
 	and	w1, w1, 255
 	cmp	w1, 2
 	ccmp	w0, 21, 4, hi
-	bne	.L2980
+	bne	.L3007
 	adrp	x1, micron_read_retrial
 	add	x1, x1, :lo12:micron_read_retrial
-	str	x1, [x20, #:lo12:.LANCHOR174]
+	str	x1, [x20, #:lo12:.LANCHOR171]
 	cmp	w0, 21
-	adrp	x0, .LANCHOR169
-	beq	.L2981
+	adrp	x0, .LANCHOR166
+	beq	.L3008
 	mov	w1, 15
-.L3036:
-	strb	w1, [x0, #:lo12:.LANCHOR169]
-.L2979:
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2990
+.L3063:
+	strb	w1, [x0, #:lo12:.LANCHOR166]
+.L3006:
+	ldr	w0, [x21, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L3017
 	adrp	x2, .LANCHOR213
-	adrp	x0, .LC97
+	adrp	x0, .LC94
 	add	x2, x2, :lo12:.LANCHOR213
-	mov	w1, 3549
-	add	x0, x0, :lo12:.LC97
+	mov	w1, 3571
+	add	x0, x0, :lo12:.LC94
 	bl	printf
-.L2990:
-	adrp	x26, .LANCHOR21
-	ldrb	w0, [x25, #:lo12:.LANCHOR49]
-	strb	wzr, [x26, #:lo12:.LANCHOR21]
-	tbz	x0, 0, .L2991
-	ldrb	w0, [x22, #:lo12:.LANCHOR48]
+.L3017:
+	adrp	x26, .LANCHOR26
+	ldrb	w0, [x25, #:lo12:.LANCHOR48]
+	strb	wzr, [x26, #:lo12:.LANCHOR26]
+	tbz	x0, 0, .L3018
+	ldrb	w0, [x22, #:lo12:.LANCHOR47]
 	cmp	w0, 155
-	beq	.L2992
+	beq	.L3019
 	mov	w0, 4
 	bl	flash_set_interface_mode
 	mov	w0, 4
 	bl	nandc_set_if_mode
-.L2992:
+.L3019:
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
-.L3038:
+.L3065:
 	bl	nandc_set_if_mode
 	bl	flash_info_blk_init
-	mov	w8, w0
+	mov	w22, w0
 	cmn	w0, #1
-	bne	.L2994
-	ldr	x0, [x23, #:lo12:.LANCHOR27]
+	bne	.L3021
+	ldr	x0, [x23, #:lo12:.LANCHOR6]
 	mov	w1, 17
 	strb	w1, [x0, 32]
-	adrp	x0, .LANCHOR34
-	strb	wzr, [x0, #:lo12:.LANCHOR34]
+	adrp	x0, .LANCHOR33
+	strb	wzr, [x0, #:lo12:.LANCHOR33]
 	mov	w0, 0
 	bl	zftl_flash_exit_slc_mode
-	b	.L2960
-.L2968:
+	b	.L2987
+.L2995:
 	add	x10, x10, 1
 	add	x8, x8, 32
 	cmp	x10, 49
-	bne	.L2970
-	b	.L2965
-.L2976:
+	bne	.L2997
+	b	.L2992
+.L3003:
 	mov	w1, 3
-	b	.L3034
-.L2981:
+	b	.L3061
+.L3008:
 	mov	w1, 4
-	b	.L3036
-.L2980:
+	b	.L3063
+.L3007:
 	sub	w1, w0, #65
 	cmp	w0, 33
 	and	w1, w1, 255
 	ccmp	w1, 1, 0, ne
-	bhi	.L2983
+	bhi	.L3010
 	adrp	x0, toshiba_read_retrial
 	add	x0, x0, :lo12:toshiba_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR174]
-	adrp	x0, .LANCHOR26
+	str	x0, [x20, #:lo12:.LANCHOR171]
+	adrp	x0, .LANCHOR18
 	mov	w1, 4
-	strb	w1, [x0, #:lo12:.LANCHOR26]
-.L3040:
+	strb	w1, [x0, #:lo12:.LANCHOR18]
+.L3067:
 	mov	w1, 7
-.L3039:
-	adrp	x0, .LANCHOR169
-	b	.L3036
-.L2983:
+.L3066:
+	adrp	x0, .LANCHOR166
+	b	.L3063
+.L3010:
 	sub	w2, w0, #34
 	sub	w1, w0, #67
 	and	w2, w2, 255
 	and	w1, w1, 255
 	cmp	w2, 1
 	ccmp	w1, 1, 0, hi
-	bhi	.L2984
+	bhi	.L3011
 	adrp	x2, toshiba_read_retrial
 	add	x2, x2, :lo12:toshiba_read_retrial
-	str	x2, [x20, #:lo12:.LANCHOR174]
+	str	x2, [x20, #:lo12:.LANCHOR171]
 	cmp	w0, 35
 	mov	w2, 68
 	ccmp	w0, w2, 4, ne
-	adrp	x0, .LANCHOR169
-	beq	.L2985
+	adrp	x0, .LANCHOR166
+	beq	.L3012
 	mov	w2, 7
-.L3035:
-	strb	w2, [x0, #:lo12:.LANCHOR169]
+.L3062:
+	strb	w2, [x0, #:lo12:.LANCHOR166]
 	cmp	w1, 1
-	adrp	x0, .LANCHOR26
-	bhi	.L2987
+	adrp	x0, .LANCHOR18
+	bhi	.L3014
 	mov	w1, 4
-.L3037:
-	strb	w1, [x0, #:lo12:.LANCHOR26]
-	b	.L2979
-.L2985:
+.L3064:
+	strb	w1, [x0, #:lo12:.LANCHOR18]
+	b	.L3006
+.L3012:
 	mov	w2, 17
-	b	.L3035
-.L2987:
+	b	.L3062
+.L3014:
 	mov	w1, 5
-	b	.L3037
-.L2984:
+	b	.L3064
+.L3011:
 	sub	w1, w0, #36
 	and	w1, w1, 255
 	cmp	w1, 1
-	bhi	.L2988
+	bhi	.L3015
 	adrp	x0, toshiba_3d_read_retrial
 	add	x0, x0, :lo12:toshiba_3d_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR174]
-	b	.L3040
-.L2988:
+	str	x0, [x20, #:lo12:.LANCHOR171]
+	b	.L3067
+.L3015:
 	cmp	w0, 50
-	bne	.L2989
+	bne	.L3016
 	adrp	x0, samsung_read_retrial
 	mov	w1, 25
 	add	x0, x0, :lo12:samsung_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR174]
-	b	.L3039
-.L2989:
+	str	x0, [x20, #:lo12:.LANCHOR171]
+	b	.L3066
+.L3016:
 	cmp	w0, 81
-	bne	.L2979
+	bne	.L3006
 	adrp	x0, ymtc_3d_read_retrial
 	add	x0, x0, :lo12:ymtc_3d_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR174]
-	adrp	x0, .LANCHOR169
+	str	x0, [x20, #:lo12:.LANCHOR171]
+	adrp	x0, .LANCHOR166
 	mov	w1, 7
-	strb	w1, [x0, #:lo12:.LANCHOR169]
-	adrp	x0, .LANCHOR51
-	strb	wzr, [x0, #:lo12:.LANCHOR51]
-	b	.L2979
-.L2991:
+	strb	w1, [x0, #:lo12:.LANCHOR166]
+	adrp	x0, .LANCHOR50
+	strb	wzr, [x0, #:lo12:.LANCHOR50]
+	b	.L3006
+.L3018:
 	mov	w0, 4
-	b	.L3038
-.L2994:
-	add	x19, x19, :lo12:.LANCHOR33
+	b	.L3065
+.L3021:
+	add	x19, x19, :lo12:.LANCHOR32
 	ldrb	w0, [x19, 7]
 	cmp	w0, 9
-	bne	.L2995
-	ldr	x0, [x23, #:lo12:.LANCHOR27]
+	bne	.L3022
+	ldr	x0, [x23, #:lo12:.LANCHOR6]
 	ldrb	w0, [x0, 20]
 	cmp	w0, 1
-	beq	.L2995
-	strb	wzr, [x24, #:lo12:.LANCHOR19]
-.L2995:
-	ldrb	w0, [x27, #:lo12:.LANCHOR24]
+	beq	.L3022
+	strb	wzr, [x24, #:lo12:.LANCHOR24]
+.L3022:
+	ldrb	w0, [x27, #:lo12:.LANCHOR16]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 7
-	bhi	.L2996
+	bhi	.L3023
 	adrp	x0, hynix_read_retrial
 	add	x0, x0, :lo12:hynix_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR174]
-.L2996:
-	ldrb	w0, [x25, #:lo12:.LANCHOR49]
-	tbz	x0, 2, .L2998
-	ldr	x0, [x23, #:lo12:.LANCHOR27]
+	str	x0, [x20, #:lo12:.LANCHOR171]
+.L3023:
+	ldrb	w0, [x25, #:lo12:.LANCHOR48]
+	tbz	x0, 2, .L3025
+	ldr	x0, [x23, #:lo12:.LANCHOR6]
 	ldrb	w0, [x0, 19]
-	cbz	w0, .L2998
+	cbz	w0, .L3025
 	adrp	x0, .LANCHOR211
 	ldrb	w1, [x0, #:lo12:.LANCHOR211]
 	adrp	x0, .LANCHOR2
@@ -19006,24 +19562,24 @@ nand_flash_init:
 	mul	w1, w1, w0
 	mov	w0, 0
 	bl	flash_ddr_para_scan
-	ldrb	w0, [x26, #:lo12:.LANCHOR21]
-	cbnz	w0, .L2998
-	ldr	x0, [x23, #:lo12:.LANCHOR27]
+	ldrb	w0, [x26, #:lo12:.LANCHOR26]
+	cbnz	w0, .L3025
+	ldr	x0, [x23, #:lo12:.LANCHOR6]
 	strb	wzr, [x0, 19]
 	bl	flash_info_flush
-.L2998:
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3000
+.L3025:
+	ldr	w0, [x21, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L3027
 	adrp	x2, .LANCHOR213
-	adrp	x0, .LC97
+	adrp	x0, .LC94
 	add	x2, x2, :lo12:.LANCHOR213
-	mov	w1, 3647
-	add	x0, x0, :lo12:.LC97
+	mov	w1, 3674
+	add	x0, x0, :lo12:.LC94
 	bl	printf
-.L3000:
+.L3027:
 	bl	nand_flash_print_info
-	mov	w8, 0
-	b	.L2960
+	mov	w22, 0
+	b	.L2987
 	.size	nand_flash_init, .-nand_flash_init
 	.section	.text.ftl_sysblk_dump,"ax",@progbits
 	.align	2
@@ -19040,37 +19596,37 @@ ftl_sysblk_dump:
 	stp	x25, x26, [sp, 112]
 	mov	w0, 1
 	stp	x27, x28, [sp, 128]
-	adrp	x25, .LANCHOR95
+	adrp	x25, .LANCHOR94
 	stp	x21, x22, [sp, 80]
 	bl	buf_alloc
 	ldr	x28, [x0, 8]
 	adrp	x26, .LANCHOR111
 	adrp	x27, .LANCHOR131
 	mov	x24, x0
-	add	x25, x25, :lo12:.LANCHOR95
+	add	x25, x25, :lo12:.LANCHOR94
 	add	x26, x26, :lo12:.LANCHOR111
 	add	x27, x27, :lo12:.LANCHOR131
 	mov	w19, 0
-.L3042:
+.L3069:
 	ldrh	w0, [x25]
 	cmp	w0, w19
-	bhi	.L3044
+	bhi	.L3071
 	add	x1, x28, 704
 	mov	w3, 32
 	mov	w2, 4
-	adrp	x0, .LC176
-	add	x0, x0, :lo12:.LC176
+	adrp	x0, .LC179
+	add	x0, x0, :lo12:.LC179
 	bl	rknand_print_hex
 	mov	x0, x24
 	bl	zbuf_free
-	cbz	w20, .L3045
+	cbz	w20, .L3072
 	adrp	x1, .LANCHOR218
 	adrp	x0, .LC0
-	mov	w2, 1611
+	mov	w2, 1619
 	add	x1, x1, :lo12:.LANCHOR218
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3045:
+.L3072:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
@@ -19080,7 +19636,7 @@ ftl_sysblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 144
 	ret
-.L3044:
+.L3071:
 	ldrh	w21, [x26]
 	ldrb	w3, [x27]
 	ldr	x1, [x24, 8]
@@ -19109,13 +19665,13 @@ ftl_sysblk_dump:
 	mov	w1, w23
 	ldp	w5, w6, [x0]
 	ldr	w7, [x0, 8]
-	adrp	x0, .LC167
-	add	x0, x0, :lo12:.LC167
+	adrp	x0, .LC160
+	add	x0, x0, :lo12:.LC160
 	bl	printf
 	cmp	w22, 512
 	ccmn	w22, #1, 4, ne
 	csinc	w20, w20, wzr, ne
-	b	.L3042
+	b	.L3069
 	.size	ftl_sysblk_dump, .-ftl_sysblk_dump
 	.section	.text.ftl_open_sblk_recovery,"ax",@progbits
 	.align	2
@@ -19125,56 +19681,56 @@ ftl_open_sblk_recovery:
 	stp	x29, x30, [sp, -368]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR14
+	adrp	x21, .LANCHOR19
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	ldr	w0, [x21, #:lo12:.LANCHOR19]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	str	x1, [x29, 136]
-	tbz	x0, 12, .L3053
+	tbz	x0, 12, .L3080
 	ldrh	w1, [x19, 2]
-	adrp	x0, .LC177
-	add	x0, x0, :lo12:.LC177
+	adrp	x0, .LC180
+	add	x0, x0, :lo12:.LC180
 	bl	printf
-.L3053:
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3054
+.L3080:
+	ldr	w0, [x21, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L3081
 	ldrb	w1, [x19, 5]
-	adrp	x0, .LC178
-	add	x0, x0, :lo12:.LC178
+	adrp	x0, .LC181
+	add	x0, x0, :lo12:.LC181
 	bl	printf
-.L3054:
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3055
+.L3081:
+	ldr	w0, [x21, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L3082
 	ldrh	w1, [x19]
-	adrp	x0, .LC179
-	add	x0, x0, :lo12:.LC179
+	adrp	x0, .LC182
+	add	x0, x0, :lo12:.LC182
 	bl	printf
-.L3055:
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3056
+.L3082:
+	ldr	w0, [x21, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L3083
 	ldrh	w2, [x19, 18]
-	adrp	x0, .LC180
+	adrp	x0, .LC183
 	ldrh	w1, [x19, 16]
-	add	x0, x0, :lo12:.LC180
+	add	x0, x0, :lo12:.LC183
 	bl	printf
-.L3056:
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3057
+.L3083:
+	ldr	w0, [x21, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L3084
 	ldrb	w1, [x19, 9]
-	adrp	x0, .LC181
-	add	x0, x0, :lo12:.LC181
+	adrp	x0, .LC184
+	add	x0, x0, :lo12:.LC184
 	bl	printf
-.L3057:
+.L3084:
 	ldrh	w0, [x19, 10]
 	strh	w0, [x19, 14]
-	adrp	x0, .LANCHOR6
+	adrp	x0, .LANCHOR8
 	ldrh	w1, [x19]
-	ldrh	w0, [x0, #:lo12:.LANCHOR6]
+	ldrh	w0, [x0, #:lo12:.LANCHOR8]
 	cmp	w1, w0
-	bcs	.L3052
+	bcs	.L3079
 	mov	w0, 1
 	adrp	x22, .LANCHOR131
 	bl	buf_alloc
@@ -19205,101 +19761,101 @@ ftl_open_sblk_recovery:
 	add	x0, x0, :lo12:.LANCHOR111
 	str	wzr, [x29, 156]
 	str	x0, [x29, 120]
-.L3059:
-	adrp	x25, .LANCHOR95
-	ldrh	w0, [x25, #:lo12:.LANCHOR95]
+.L3086:
+	adrp	x25, .LANCHOR94
+	ldrh	w0, [x25, #:lo12:.LANCHOR94]
 	cmp	w0, w24
-	bhi	.L3074
-.L3062:
+	bhi	.L3101
+.L3089:
 	ldrh	w0, [x19, 10]
 	ldrh	w1, [x19, 6]
-	ldrh	w2, [x25, #:lo12:.LANCHOR95]
+	ldrh	w2, [x25, #:lo12:.LANCHOR94]
 	add	w1, w1, w0
 	ldrb	w0, [x19, 9]
 	strh	w24, [x19, 2]
 	strb	w23, [x19, 5]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L3075
+	beq	.L3102
 	adrp	x1, .LANCHOR219
 	adrp	x0, .LC0
-	mov	w2, 1794
+	mov	w2, 1802
 	add	x1, x1, :lo12:.LANCHOR219
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3075:
+.L3102:
 	adrp	x2, .LANCHOR117
 	ldrh	w3, [x19, 10]
 	mov	w0, 0
 	mov	w1, 0
 	ldr	x4, [x2, #:lo12:.LANCHOR117]
 	str	x2, [x29, 144]
-.L3076:
+.L3103:
 	cmp	w1, w3
-	bcc	.L3078
+	bcc	.L3105
 	ldrb	w23, [x19, 9]
-	adrp	x24, .LANCHOR9
-	ldrh	w1, [x25, #:lo12:.LANCHOR95]
+	adrp	x24, .LANCHOR11
+	ldrh	w1, [x25, #:lo12:.LANCHOR94]
 	madd	w23, w23, w1, w0
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	ldr	w0, [x21, #:lo12:.LANCHOR19]
 	sub	w23, w23, w3
 	and	w23, w23, 65535
-	tbz	x0, 12, .L3079
+	tbz	x0, 12, .L3106
 	ldrh	w1, [x19]
-	ldr	x2, [x24, #:lo12:.LANCHOR9]
+	ldr	x2, [x24, #:lo12:.LANCHOR11]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w3, [x2, x0]
-	adrp	x0, .LC184
+	adrp	x0, .LC187
 	mov	w2, w23
-	add	x0, x0, :lo12:.LC184
+	add	x0, x0, :lo12:.LC187
 	bl	printf
-.L3079:
-	ldr	x0, [x24, #:lo12:.LANCHOR9]
+.L3106:
+	ldr	x0, [x24, #:lo12:.LANCHOR11]
 	ldrh	w1, [x19]
 	strh	w23, [x0, x1, lsl 1]
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 14, .L3080
+	ldr	w0, [x21, #:lo12:.LANCHOR19]
+	tbz	x0, 14, .L3107
 	ldp	w1, w2, [x29, 176]
-	adrp	x0, .LC185
+	adrp	x0, .LC188
 	ldp	w3, w4, [x29, 184]
-	add	x0, x0, :lo12:.LC185
+	add	x0, x0, :lo12:.LC188
 	bl	printf
-.L3080:
+.L3107:
 	ldr	x0, [x20, 8]
 	mov	w1, 0
 	ldrb	w2, [x22, #:lo12:.LANCHOR131]
-	adrp	x28, .LANCHOR80
+	adrp	x28, .LANCHOR79
 	mov	x24, 0
 	lsl	w2, w2, 9
 	bl	ftl_memset
-	adrp	x0, .LC187
-	add	x0, x0, :lo12:.LC187
+	adrp	x0, .LC190
+	add	x0, x0, :lo12:.LC190
 	str	x0, [x29, 128]
-	add	x0, x28, :lo12:.LANCHOR80
+	add	x0, x28, :lo12:.LANCHOR79
 	str	x0, [x29, 120]
-.L3081:
-	ldrb	w0, [x28, #:lo12:.LANCHOR80]
-	add	x1, x28, :lo12:.LANCHOR80
+.L3108:
+	ldrb	w0, [x28, #:lo12:.LANCHOR79]
+	add	x1, x28, :lo12:.LANCHOR79
 	str	w24, [x29, 168]
 	mul	w0, w0, w27
 	cmp	w24, w0
-	bcc	.L3093
-	adrp	x24, .LC188
-	adrp	x23, .LC187
-	add	x24, x24, :lo12:.LC188
-	add	x23, x23, :lo12:.LC187
+	bcc	.L3120
+	adrp	x24, .LC191
+	adrp	x23, .LC190
+	add	x24, x24, :lo12:.LC191
+	add	x23, x23, :lo12:.LC190
 	mov	x28, 0
 	str	x1, [x29, 160]
-.L3094:
+.L3121:
 	ldr	x0, [x29, 160]
 	ldrb	w0, [x0]
 	mul	w0, w0, w27
 	cmp	w0, w28
-	bhi	.L3100
+	bhi	.L3127
 	mov	x0, x20
 	bl	zbuf_free
 	ldrh	w1, [x19, 12]
-	ldrh	w0, [x25, #:lo12:.LANCHOR95]
+	ldrh	w0, [x25, #:lo12:.LANCHOR94]
 	ldrb	w2, [x19, 9]
 	madd	w0, w0, w2, w1
 	mov	x1, -4
@@ -19308,20 +19864,20 @@ ftl_open_sblk_recovery:
 	ldr	x1, [x1, #:lo12:.LANCHOR117]
 	ldr	w0, [x1, x0]
 	cmn	w0, #1
-	beq	.L3101
+	beq	.L3128
 	adrp	x1, .LANCHOR219
 	adrp	x0, .LC0
-	mov	w2, 1909
+	mov	w2, 1917
 	add	x1, x1, :lo12:.LANCHOR219
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3101:
+.L3128:
 	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bne	.L3052
+	bne	.L3079
 	mov	x0, x19
 	bl	ftl_write_last_log_page
-.L3052:
+.L3079:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -19329,27 +19885,27 @@ ftl_open_sblk_recovery:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 368
 	ret
-.L3074:
+.L3101:
 	ldrb	w23, [x19, 5]
-	adrp	x0, .LANCHOR198
-	add	x0, x0, :lo12:.LANCHOR198
+	adrp	x0, .LANCHOR195
+	add	x0, x0, :lo12:.LANCHOR195
 	str	x0, [x29, 128]
-.L3060:
+.L3087:
 	ldrb	w0, [x19, 9]
 	cmp	w0, w23
-	bhi	.L3073
+	bhi	.L3100
 	add	w24, w24, 1
 	strb	wzr, [x19, 5]
 	and	w24, w24, 65535
-	b	.L3059
-.L3073:
+	b	.L3086
+.L3100:
 	add	x0, x19, x23, sxtw 1
 	ldrh	w0, [x0, 16]
 	str	w0, [x29, 168]
 	mov	w0, 65535
 	ldr	w1, [x29, 168]
 	cmp	w1, w0
-	beq	.L3061
+	beq	.L3088
 	ldr	x0, [x29, 120]
 	ldrb	w3, [x22, #:lo12:.LANCHOR131]
 	ldr	x2, [x20, 24]
@@ -19360,21 +19916,21 @@ ftl_open_sblk_recovery:
 	bl	ftl_read_ppa_page
 	mov	w28, w0
 	cmp	w0, 512
-	beq	.L3062
+	beq	.L3089
 	cmn	w0, #1
-	beq	.L3063
+	beq	.L3090
 	ldr	x0, [x20, 24]
 	ldr	w1, [x0]
 	cmn	w1, #1
-	bne	.L3063
+	bne	.L3090
 	ldr	w0, [x0, 4]
 	cmn	w0, #1
-	bne	.L3063
+	bne	.L3090
 	ldr	x0, [x20, 8]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L3062
-.L3063:
+	beq	.L3089
+.L3090:
 	ldr	x1, [x29, 128]
 	mov	w0, 1
 	strb	w0, [x1]
@@ -19382,76 +19938,76 @@ ftl_open_sblk_recovery:
 	ldrh	w1, [x19, 10]
 	madd	w0, w0, w24, w23
 	cmp	w1, w0
-	beq	.L3064
+	beq	.L3091
 	adrp	x1, .LANCHOR219
 	adrp	x0, .LC0
-	mov	w2, 1686
+	mov	w2, 1694
 	add	x1, x1, :lo12:.LANCHOR219
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3064:
+.L3091:
 	ldrh	w0, [x19, 10]
 	ldrh	w1, [x19, 6]
 	ldrb	w2, [x19, 9]
 	add	w1, w1, w0
-	ldrh	w0, [x25, #:lo12:.LANCHOR95]
+	ldrh	w0, [x25, #:lo12:.LANCHOR94]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L3065
+	beq	.L3092
 	adrp	x1, .LANCHOR219
 	adrp	x0, .LC0
-	mov	w2, 1687
+	mov	w2, 1695
 	add	x1, x1, :lo12:.LANCHOR219
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3065:
+.L3092:
 	ldrb	w0, [x22, #:lo12:.LANCHOR131]
 	cmp	w0, 8
-	bls	.L3066
+	bls	.L3093
 	ldr	x6, [x20, 24]
 	mov	w1, 15555
 	movk	w1, 0xf55f, lsl 16
 	ldr	w0, [x6]
 	cmp	w0, w1
-	beq	.L3066
+	beq	.L3093
 	cmn	w28, #1
-	beq	.L3068
+	beq	.L3095
 	ldr	w0, [x6, 4]
 	cmn	w0, #1
-	beq	.L3069
+	beq	.L3096
 	ldr	w1, [x6, 16]
 	mov	w0, 21320
 	movk	w0, 0x4841, lsl 16
 	cmp	w1, w0
-	bne	.L3069
+	bne	.L3096
 	ldr	x0, [x29, 144]
 	mov	w1, 1024
 	bl	js_hash
 	ldr	w1, [x6, 20]
 	cmp	w1, w0
-	beq	.L3069
+	beq	.L3096
 	ldr	w3, [x29, 160]
 	mov	w5, w0
 	ldr	w1, [x29, 168]
 	mov	w4, w28
 	mov	w2, w24
-	adrp	x0, .LC182
-	add	x0, x0, :lo12:.LC182
+	adrp	x0, .LC185
+	add	x0, x0, :lo12:.LC185
 	bl	printf
 	ldr	x1, [x29, 144]
 	mov	w3, 16
 	mov	w2, 4
-	adrp	x0, .LC183
-	add	x0, x0, :lo12:.LC183
+	adrp	x0, .LC186
+	add	x0, x0, :lo12:.LC186
 	bl	rknand_print_hex
 	ldr	x1, [x20, 24]
-	adrp	x0, .LC150
+	adrp	x0, .LC147
 	ldrb	w3, [x22, #:lo12:.LANCHOR131]
 	mov	w2, 4
-	add	x0, x0, :lo12:.LC150
+	add	x0, x0, :lo12:.LC147
 	lsr	w3, w3, 1
 	bl	rknand_print_hex
-.L3068:
+.L3095:
 	ldrh	w0, [x19, 6]
 	mov	w27, 4
 	sub	w0, w0, #1
@@ -19461,55 +20017,55 @@ ftl_open_sblk_recovery:
 	strh	w0, [x19, 10]
 	mov	w0, 1
 	str	w0, [x29, 156]
-.L3061:
+.L3088:
 	add	w23, w23, 1
 	and	w23, w23, 65535
-	b	.L3060
-.L3066:
+	b	.L3087
+.L3093:
 	cmn	w28, #1
-	beq	.L3068
-.L3069:
+	beq	.L3095
+.L3096:
 	ldr	x1, [x20, 24]
 	ldr	w0, [x1, 4]
 	cmn	w0, #1
-	beq	.L3068
+	beq	.L3095
 	ldr	w1, [x1]
 	mov	w2, 15555
 	movk	w2, 0xf55f, lsl 16
 	cmp	w1, w2
-	beq	.L3068
+	beq	.L3095
 	bl	lpa_hash_get_ppa
 	ldr	x1, [x29, 136]
-	cbz	x1, .L3071
+	cbz	x1, .L3098
 	ldr	x3, [x20, 24]
 	ldr	w1, [x3, 8]
 	cmp	w0, w1
-	beq	.L3071
+	beq	.L3098
 	cmn	w0, #1
-	beq	.L3071
-	adrp	x4, .LANCHOR32
-	adrp	x5, .LANCHOR75
+	beq	.L3098
+	adrp	x4, .LANCHOR31
+	adrp	x5, .LANCHOR74
 	mov	w28, 24
 	mov	w27, 1
-	ldrb	w1, [x4, #:lo12:.LANCHOR32]
-	ldrh	w6, [x5, #:lo12:.LANCHOR75]
+	ldrb	w1, [x4, #:lo12:.LANCHOR31]
+	ldrh	w6, [x5, #:lo12:.LANCHOR74]
 	sub	w1, w28, w1
 	sub	w1, w1, w6
 	lsr	w2, w0, w6
-	adrp	x6, .LANCHOR76
+	adrp	x6, .LANCHOR75
 	lsl	w1, w27, w1
 	sub	w1, w1, #1
 	and	w1, w1, w2
-	ldrb	w2, [x6, #:lo12:.LANCHOR76]
+	ldrb	w2, [x6, #:lo12:.LANCHOR75]
 	udiv	w1, w1, w2
 	ldr	x2, [x29, 136]
 	ldrh	w2, [x2]
 	cmp	w2, w1, uxth
-	bne	.L3071
+	bne	.L3098
 	ldr	w8, [x3]
-	adrp	x7, .LANCHOR193
+	adrp	x7, .LANCHOR190
 	ldrb	w3, [x22, #:lo12:.LANCHOR131]
-	add	x2, x7, :lo12:.LANCHOR193
+	add	x2, x7, :lo12:.LANCHOR190
 	ldr	x1, [x20, 8]
 	str	w8, [x29, 156]
 	str	x7, [x29, 168]
@@ -19518,43 +20074,43 @@ ftl_open_sblk_recovery:
 	bl	ftl_read_ppa_page
 	ldr	x7, [x29, 168]
 	ldr	w8, [x29, 156]
-	ldr	w0, [x7, #:lo12:.LANCHOR193]
+	ldr	w0, [x7, #:lo12:.LANCHOR190]
 	cmp	w8, w0
-	bhi	.L3071
+	bhi	.L3098
 	ldr	x0, [x20, 24]
 	ldr	w0, [x0, 8]
 	cmn	w0, #1
-	beq	.L3068
+	beq	.L3095
 	ldp	x6, x4, [x29, 96]
 	ldr	x5, [x29, 112]
-	ldrb	w2, [x4, #:lo12:.LANCHOR32]
-	ldrh	w1, [x5, #:lo12:.LANCHOR75]
+	ldrb	w2, [x4, #:lo12:.LANCHOR31]
+	ldrh	w1, [x5, #:lo12:.LANCHOR74]
 	sub	w28, w28, w2
 	sub	w28, w28, w1
 	lsr	w0, w0, w1
 	lsl	w27, w27, w28
 	sub	w27, w27, #1
 	and	w27, w27, w0
-	ldrb	w0, [x6, #:lo12:.LANCHOR76]
+	ldrb	w0, [x6, #:lo12:.LANCHOR75]
 	udiv	w0, w27, w0
 	bl	ftl_vpn_decrement
-	b	.L3068
-.L3078:
+	b	.L3095
+.L3105:
 	ldrh	w2, [x19, 12]
 	add	w2, w2, w1
 	ldr	w2, [x4, x2, lsl 2]
 	cmn	w2, #1
-	beq	.L3077
+	beq	.L3104
 	add	w23, w0, 1
 	and	w0, w23, 65535
-.L3077:
+.L3104:
 	add	w1, w1, 1
-	b	.L3076
-.L3093:
+	b	.L3103
+.L3120:
 	ldr	w0, [x26, x24, lsl 2]
 	cmn	w0, #1
-	bne	.L3082
-.L3086:
+	bne	.L3109
+.L3113:
 	adrp	x0, .LANCHOR110
 	ldr	x1, [x20, 24]
 	mov	w23, -1
@@ -19568,23 +20124,23 @@ ftl_open_sblk_recovery:
 	str	wzr, [x0]
 	mov	w0, 2
 	bl	ftl_debug_info_fill
-.L3083:
+.L3110:
 	ldr	w0, [x29, 156]
-	cbz	w0, .L3088
+	cbz	w0, .L3115
 	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bls	.L3088
-	add	x0, x21, :lo12:.LANCHOR14
+	bls	.L3115
+	add	x0, x21, :lo12:.LANCHOR19
 	str	x0, [x29, 160]
 	add	x0, x22, :lo12:.LANCHOR131
 	str	x0, [x29, 136]
-.L3153:
+.L3180:
 	mov	x0, x19
 	bl	ftl_get_new_free_page
 	mov	w4, w0
 	ldr	x0, [x29, 160]
 	ldr	w0, [x0]
-	tbz	x0, 14, .L3090
+	tbz	x0, 14, .L3117
 	ldrh	w0, [x19, 12]
 	mov	w1, w4
 	ldrh	w3, [x19, 10]
@@ -19596,7 +20152,7 @@ ftl_open_sblk_recovery:
 	ldr	x0, [x29, 128]
 	bl	printf
 	ldr	w4, [x29, 112]
-.L3090:
+.L3117:
 	ldr	x0, [x29, 120]
 	ldr	w2, [x29, 168]
 	ldrh	w1, [x19, 6]
@@ -19605,7 +20161,7 @@ ftl_open_sblk_recovery:
 	add	w0, w0, 1
 	sub	w0, w0, w2
 	cmp	w1, w0
-	bls	.L3088
+	bls	.L3115
 	ldr	x0, [x29, 136]
 	ldr	x1, [x20, 8]
 	ldr	x2, [x20, 24]
@@ -19621,7 +20177,7 @@ ftl_open_sblk_recovery:
 	cmn	w23, #1
 	ldr	w4, [x29, 104]
 	ccmn	w1, #1, 4, ne
-	beq	.L3091
+	beq	.L3118
 	add	x0, x29, 240
 	ldrh	w1, [x19, 12]
 	str	w4, [x0, x24, lsl 2]
@@ -19630,10 +20186,10 @@ ftl_open_sblk_recovery:
 	add	x1, x29, 304
 	sub	w0, w0, #1
 	str	w0, [x1, x24, lsl 2]
-.L3088:
+.L3115:
 	add	x24, x24, 1
-	b	.L3081
-.L3082:
+	b	.L3108
+.L3109:
 	ldrb	w3, [x22, #:lo12:.LANCHOR131]
 	ldr	x1, [x20, 8]
 	ldr	x2, [x20, 24]
@@ -19643,18 +20199,18 @@ ftl_open_sblk_recovery:
 	ldr	w0, [x0, 4]
 	bl	lpa_hash_get_ppa
 	mov	w4, w0
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 14, .L3084
+	ldr	w0, [x21, #:lo12:.LANCHOR19]
+	tbz	x0, 14, .L3111
 	ldr	x0, [x20, 24]
 	mov	w1, w4
 	ldr	w2, [x26, x24, lsl 2]
 	str	w4, [x29, 160]
 	ldr	w3, [x0, 4]
-	adrp	x0, .LC186
-	add	x0, x0, :lo12:.LC186
+	adrp	x0, .LC189
+	add	x0, x0, :lo12:.LC189
 	bl	printf
 	ldr	w4, [x29, 160]
-.L3084:
+.L3111:
 	ldr	x1, [x20, 24]
 	mov	x2, 0
 	ldr	w0, [x26, x24, lsl 2]
@@ -19666,20 +20222,20 @@ ftl_open_sblk_recovery:
 	mov	w0, 2
 	bl	ftl_debug_info_fill
 	cmn	w23, #1
-	bne	.L3083
-	b	.L3086
-.L3091:
+	bne	.L3110
+	b	.L3113
+.L3118:
 	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bls	.L3088
+	bls	.L3115
 	cmn	w23, #1
-	bne	.L3153
-	b	.L3088
-.L3100:
+	bne	.L3180
+	b	.L3115
+.L3127:
 	add	x0, x29, 240
 	ldr	w0, [x0, x28, lsl 2]
 	cmn	w0, #1
-	beq	.L3096
+	beq	.L3123
 	ldrb	w3, [x22, #:lo12:.LANCHOR131]
 	ldr	w0, [x26, x28, lsl 2]
 	ldr	x1, [x20, 8]
@@ -19687,7 +20243,7 @@ ftl_open_sblk_recovery:
 	bl	ftl_read_ppa_page
 	cmp	w0, 256
 	ccmn	w0, #1, 4, ne
-	bne	.L3096
+	bne	.L3123
 	add	x0, x29, 240
 	ldrb	w3, [x22, #:lo12:.LANCHOR131]
 	ldr	x1, [x20, 8]
@@ -19695,8 +20251,8 @@ ftl_open_sblk_recovery:
 	ldr	w0, [x0, x28, lsl 2]
 	bl	ftl_read_ppa_page
 	mov	w5, w0
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 14, .L3098
+	ldr	w0, [x21, #:lo12:.LANCHOR19]
+	tbz	x0, 14, .L3125
 	ldr	x0, [x20, 24]
 	mov	w1, w5
 	ldr	w3, [x26, x28, lsl 2]
@@ -19705,22 +20261,22 @@ ftl_open_sblk_recovery:
 	mov	x0, x23
 	bl	printf
 	ldr	w5, [x29, 168]
-.L3098:
+.L3125:
 	cmn	w5, #1
-	beq	.L3096
+	beq	.L3123
 	ldr	x0, [x20, 24]
 	ldr	w2, [x26, x28, lsl 2]
 	ldr	w1, [x0, 8]
 	cmp	w2, w1
-	bne	.L3096
-	ldr	w1, [x21, #:lo12:.LANCHOR14]
-	tbz	x1, 14, .L3099
+	bne	.L3123
+	ldr	w1, [x21, #:lo12:.LANCHOR19]
+	tbz	x1, 14, .L3126
 	add	x1, x29, 304
 	ldr	w3, [x1, x28, lsl 2]
 	ldr	w1, [x0, 4]
 	mov	x0, x24
 	bl	printf
-.L3099:
+.L3126:
 	add	x1, x29, 304
 	ldr	x0, [x20, 24]
 	ldr	w1, [x1, x28, lsl 2]
@@ -19729,31 +20285,31 @@ ftl_open_sblk_recovery:
 	ldrh	w2, [x29, 168]
 	ldr	w0, [x0, 4]
 	bl	lpa_hash_update_ppa
-.L3096:
+.L3123:
 	add	x28, x28, 1
-	b	.L3094
-.L3071:
+	b	.L3121
+.L3098:
 	ldr	x3, [x20, 24]
 	adrp	x0, .LANCHOR128
 	ldr	w0, [x0, #:lo12:.LANCHOR128]
 	ldr	w1, [x3, 4]
 	cmp	w1, w0
-	bcs	.L3068
+	bcs	.L3095
 	ldrb	w0, [x19, 9]
-	ldrh	w1, [x25, #:lo12:.LANCHOR95]
+	ldrh	w1, [x25, #:lo12:.LANCHOR94]
 	ldrh	w2, [x19, 10]
 	mul	w0, w0, w1
 	sub	w0, w0, #1
 	cmp	w2, w0
-	bge	.L3068
+	bge	.L3095
 	adrp	x0, .LANCHOR110
 	ldr	w1, [x3]
 	ldr	x0, [x0, #:lo12:.LANCHOR110]
 	ldr	w4, [x0, 8]
 	cmp	w1, w4
-	bls	.L3072
+	bls	.L3099
 	str	w1, [x0, 8]
-.L3072:
+.L3099:
 	ldrh	w0, [x19, 12]
 	add	w2, w2, w0
 	ldp	w0, w1, [x3, 4]
@@ -19766,7 +20322,7 @@ ftl_open_sblk_recovery:
 	str	w0, [x29, 184]
 	ldr	w0, [x29, 160]
 	str	w0, [x29, 188]
-	b	.L3068
+	b	.L3095
 	.size	ftl_open_sblk_recovery, .-ftl_open_sblk_recovery
 	.section	.text.dump_ftl_info,"ax",@progbits
 	.align	2
@@ -19774,101 +20330,101 @@ ftl_open_sblk_recovery:
 	.type	dump_ftl_info, %function
 dump_ftl_info:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LANCHOR58
+	adrp	x0, .LANCHOR57
 	add	x29, sp, 0
-	ldrb	w1, [x0, #:lo12:.LANCHOR58]
-	adrp	x0, .LC189
+	ldrb	w1, [x0, #:lo12:.LANCHOR57]
+	adrp	x0, .LC192
 	stp	x19, x20, [sp, 16]
-	add	x0, x0, :lo12:.LC189
+	add	x0, x0, :lo12:.LC192
 	stp	x21, x22, [sp, 32]
 	adrp	x22, .LANCHOR110
-	adrp	x19, .LANCHOR10
-	adrp	x20, .LANCHOR95
+	adrp	x19, .LANCHOR12
+	adrp	x20, .LANCHOR94
 	bl	printf
-	adrp	x21, .LANCHOR6
-	adrp	x0, .LANCHOR194
-	add	x1, x0, :lo12:.LANCHOR194
+	adrp	x21, .LANCHOR8
+	adrp	x0, .LANCHOR191
+	add	x1, x0, :lo12:.LANCHOR191
 	ldrh	w3, [x1, 2]
 	ldrb	w2, [x1, 1]
-	ldrb	w1, [x0, #:lo12:.LANCHOR194]
-	adrp	x0, .LC190
-	add	x0, x0, :lo12:.LC190
+	ldrb	w1, [x0, #:lo12:.LANCHOR191]
+	adrp	x0, .LC193
+	add	x0, x0, :lo12:.LC193
 	bl	printf
 	ldr	x0, [x22, #:lo12:.LANCHOR110]
 	ldrh	w2, [x0, 140]
 	ldrh	w1, [x0, 130]
-	adrp	x0, .LC191
-	add	x0, x0, :lo12:.LC191
+	adrp	x0, .LC194
+	add	x0, x0, :lo12:.LC194
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR10]
-	adrp	x0, .LC192
-	add	x0, x0, :lo12:.LC192
+	ldr	x1, [x19, #:lo12:.LANCHOR12]
+	adrp	x0, .LC195
+	add	x0, x0, :lo12:.LC195
 	ldrh	w5, [x1, 26]
 	ldrh	w4, [x1, 22]
 	ldrb	w3, [x1, 21]
 	ldrh	w2, [x1, 18]
 	ldrh	w1, [x1, 16]
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR10]
-	adrp	x0, .LC193
-	add	x0, x0, :lo12:.LC193
+	ldr	x1, [x19, #:lo12:.LANCHOR12]
+	adrp	x0, .LC196
+	add	x0, x0, :lo12:.LC196
 	ldrh	w5, [x1, 58]
 	ldrh	w4, [x1, 54]
 	ldrb	w3, [x1, 53]
 	ldrh	w2, [x1, 50]
 	ldrh	w1, [x1, 48]
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR10]
-	adrp	x19, .LANCHOR80
-	adrp	x0, .LC194
-	add	x0, x0, :lo12:.LC194
+	ldr	x1, [x19, #:lo12:.LANCHOR12]
+	adrp	x19, .LANCHOR79
+	adrp	x0, .LC197
+	add	x0, x0, :lo12:.LC197
 	ldrh	w5, [x1, 90]
 	ldrh	w4, [x1, 86]
 	ldrb	w3, [x1, 85]
 	ldrh	w2, [x1, 82]
 	ldrh	w1, [x1, 80]
 	bl	printf
-	ldrb	w0, [x19, #:lo12:.LANCHOR80]
+	ldrb	w0, [x19, #:lo12:.LANCHOR79]
 	mov	w2, 4
-	ldrh	w3, [x20, #:lo12:.LANCHOR95]
+	ldrh	w3, [x20, #:lo12:.LANCHOR94]
 	mul	w3, w3, w0
 	adrp	x0, .LANCHOR117
 	ldr	x1, [x0, #:lo12:.LANCHOR117]
-	adrp	x0, .LC195
+	adrp	x0, .LC198
 	lsl	w3, w3, 1
-	add	x0, x0, :lo12:.LC195
+	add	x0, x0, :lo12:.LC198
 	bl	rknand_print_hex
-	adrp	x0, .LANCHOR9
-	ldrh	w3, [x21, #:lo12:.LANCHOR6]
+	adrp	x0, .LANCHOR11
+	ldrh	w3, [x21, #:lo12:.LANCHOR8]
 	mov	w2, 2
-	ldr	x1, [x0, #:lo12:.LANCHOR9]
-	adrp	x0, .LC196
-	add	x0, x0, :lo12:.LC196
+	ldr	x1, [x0, #:lo12:.LANCHOR11]
+	adrp	x0, .LC199
+	add	x0, x0, :lo12:.LC199
 	bl	rknand_print_hex
 	ldr	x1, [x22, #:lo12:.LANCHOR110]
 	mov	w2, 4
-	adrp	x0, .LC176
-	add	x0, x0, :lo12:.LC176
+	adrp	x0, .LC179
+	add	x0, x0, :lo12:.LC179
 	add	x1, x1, 704
 	ldrh	w3, [x1, -6]
 	bl	rknand_print_hex
-	adrp	x0, .LANCHOR7
-	ldrh	w3, [x21, #:lo12:.LANCHOR6]
+	adrp	x0, .LANCHOR9
+	ldrh	w3, [x21, #:lo12:.LANCHOR8]
 	mov	w2, 4
-	ldr	x1, [x0, #:lo12:.LANCHOR7]
-	adrp	x0, .LC197
-	add	x0, x0, :lo12:.LC197
+	ldr	x1, [x0, #:lo12:.LANCHOR9]
+	adrp	x0, .LC200
+	add	x0, x0, :lo12:.LC200
 	bl	rknand_print_hex
 	mov	w3, 256
 	mov	w2, 2
 	adrp	x1, .LANCHOR116
-	adrp	x0, .LC198
+	adrp	x0, .LC201
 	add	x1, x1, :lo12:.LANCHOR116
-	add	x0, x0, :lo12:.LC198
+	add	x0, x0, :lo12:.LC201
 	bl	rknand_print_hex
-	ldrb	w0, [x19, #:lo12:.LANCHOR80]
+	ldrb	w0, [x19, #:lo12:.LANCHOR79]
 	mov	w2, 2
-	ldrh	w3, [x20, #:lo12:.LANCHOR95]
+	ldrh	w3, [x20, #:lo12:.LANCHOR94]
 	ldp	x21, x22, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	mul	w3, w3, w0
@@ -19876,8 +20432,8 @@ dump_ftl_info:
 	ldp	x29, x30, [sp], 48
 	lsl	w3, w3, 1
 	ldr	x1, [x0, #:lo12:.LANCHOR118]
-	adrp	x0, .LC199
-	add	x0, x0, :lo12:.LC199
+	adrp	x0, .LC202
+	add	x0, x0, :lo12:.LC202
 	b	rknand_print_hex
 	.size	dump_ftl_info, .-dump_ftl_info
 	.section	.text.pm_ppa_update_check,"ax",@progbits
@@ -19885,11 +20441,11 @@ dump_ftl_info:
 	.global	pm_ppa_update_check
 	.type	pm_ppa_update_check, %function
 pm_ppa_update_check:
-	adrp	x4, .LANCHOR32
-	adrp	x3, .LANCHOR75
+	adrp	x4, .LANCHOR31
+	adrp	x3, .LANCHOR74
 	mov	w5, 24
-	ldrb	w4, [x4, #:lo12:.LANCHOR32]
-	ldrh	w3, [x3, #:lo12:.LANCHOR75]
+	ldrb	w4, [x4, #:lo12:.LANCHOR31]
+	ldrh	w3, [x3, #:lo12:.LANCHOR74]
 	sub	w4, w5, w4
 	sub	w5, w4, w3
 	mov	w4, 1
@@ -19897,30 +20453,30 @@ pm_ppa_update_check:
 	lsl	w4, w4, w5
 	sub	w4, w4, #1
 	and	w4, w4, w3
-	adrp	x3, .LANCHOR76
-	ldrb	w3, [x3, #:lo12:.LANCHOR76]
+	adrp	x3, .LANCHOR75
+	ldrb	w3, [x3, #:lo12:.LANCHOR75]
 	udiv	w4, w4, w3
-	adrp	x3, .LANCHOR7
-	ldr	x3, [x3, #:lo12:.LANCHOR7]
+	adrp	x3, .LANCHOR9
+	ldr	x3, [x3, #:lo12:.LANCHOR9]
 	add	x4, x3, x4, uxth 2
 	ldrb	w3, [x4, 2]
 	ubfx	x3, x3, 5, 3
 	cmp	w3, 1
 	ccmp	w3, 7, 4, ne
-	bne	.L3185
+	bne	.L3212
 	mov	w3, w2
 	mov	w2, w1
 	mov	x1, x0
 	stp	x29, x30, [sp, -16]!
-	adrp	x0, .LC200
-	add	x0, x0, :lo12:.LC200
+	adrp	x0, .LC203
+	add	x0, x0, :lo12:.LC203
 	add	x29, sp, 0
 	bl	printf
 	bl	dump_ftl_info
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
-.L3185:
+.L3212:
 	mov	w0, 0
 	ret
 	.size	pm_ppa_update_check, .-pm_ppa_update_check
@@ -19937,23 +20493,23 @@ load_l2p_region:
 	stp	x23, x24, [sp, 48]
 	cmp	w21, 31
 	stp	x25, x26, [sp, 64]
-	bls	.L3191
+	bls	.L3218
 	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
 	mov	w2, 32
 	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3191:
+.L3218:
 	adrp	x20, .LANCHOR110
 	mov	x25, x20
 	ldr	x0, [x20, #:lo12:.LANCHOR110]
 	ldrh	w2, [x0, 698]
 	cmp	w2, w19
-	bcs	.L3192
+	bcs	.L3219
 	mov	w1, w19
-	adrp	x0, .LC201
-	add	x0, x0, :lo12:.LC201
+	adrp	x0, .LC204
+	add	x0, x0, :lo12:.LC204
 	bl	printf
 	adrp	x0, .LANCHOR221
 	mov	w1, 255
@@ -19964,47 +20520,47 @@ load_l2p_region:
 	ldr	x0, [x20, #:lo12:.LANCHOR110]
 	ldrh	w0, [x0, 698]
 	cmp	w0, w19
-	bcc	.L3193
-.L3203:
+	bcc	.L3220
+.L3230:
 	mov	w0, 0
-.L3190:
+.L3217:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L3193:
+.L3220:
 	mov	w2, 37
-.L3204:
+.L3231:
 	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3203
-.L3192:
+	b	.L3230
+.L3219:
 	add	x0, x0, x19, sxtw 2
-	adrp	x22, .LANCHOR138
-	add	x1, x22, :lo12:.LANCHOR138
+	adrp	x22, .LANCHOR135
+	add	x1, x22, :lo12:.LANCHOR135
 	ldr	w23, [x0, 704]
 	lsl	x0, x21, 4
 	add	x26, x1, x0
 	strh	w19, [x1, x0]
 	strh	wzr, [x26, 2]
-	cbnz	w23, .L3195
+	cbnz	w23, .L3222
 	mov	w1, w19
 	mov	w2, 0
-	adrp	x0, .LC202
-	add	x0, x0, :lo12:.LC202
+	adrp	x0, .LC205
+	add	x0, x0, :lo12:.LC205
 	bl	printf
 	adrp	x0, .LANCHOR221
 	mov	w1, 255
 	ldrh	w2, [x0, #:lo12:.LANCHOR221]
 	ldr	x0, [x26, 8]
 	bl	ftl_memset
-	b	.L3203
-.L3195:
+	b	.L3230
+.L3222:
 	adrp	x20, .LANCHOR207
 	adrp	x24, .LANCHOR131
 	ldr	x1, [x26, 8]
@@ -20015,45 +20571,45 @@ load_l2p_region:
 	ldr	x1, [x20, #:lo12:.LANCHOR207]
 	ldr	w2, [x1]
 	cmp	w2, w19
-	bne	.L3196
+	bne	.L3223
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L3196
-.L3200:
+	beq	.L3223
+.L3227:
 	ldr	x0, [x20, #:lo12:.LANCHOR207]
 	ldr	w0, [x0]
 	cmp	w19, w0
-	beq	.L3203
+	beq	.L3230
 	mov	w2, 73
-	b	.L3204
-.L3196:
+	b	.L3231
+.L3223:
 	mov	w4, w23
 	mov	w3, w0
 	mov	w1, w19
-	adrp	x0, .LC203
-	add	x0, x0, :lo12:.LC203
+	adrp	x0, .LC206
+	add	x0, x0, :lo12:.LC206
 	bl	printf
 	ldr	x1, [x25, #:lo12:.LANCHOR110]
-	add	x22, x22, :lo12:.LANCHOR138
+	add	x22, x22, :lo12:.LANCHOR135
 	add	x21, x22, x21, lsl 4
 	mov	w2, 4
 	add	x1, x1, 704
-	adrp	x0, .LC204
-	add	x0, x0, :lo12:.LC204
+	adrp	x0, .LC207
+	add	x0, x0, :lo12:.LC207
 	ldrh	w3, [x1, -6]
 	bl	rknand_print_hex
 	ldr	x1, [x21, 8]
 	mov	w2, 4
 	ldrb	w3, [x24, #:lo12:.LANCHOR131]
-	adrp	x0, .LC183
-	add	x0, x0, :lo12:.LC183
+	adrp	x0, .LC186
+	add	x0, x0, :lo12:.LC186
 	lsl	w3, w3, 7
 	bl	rknand_print_hex
 	ldr	x1, [x20, #:lo12:.LANCHOR207]
 	mov	w3, 16
 	mov	w2, 4
-	adrp	x0, .LC205
-	add	x0, x0, :lo12:.LC205
+	adrp	x0, .LC208
+	add	x0, x0, :lo12:.LC208
 	bl	rknand_print_hex
 	ldrb	w3, [x24, #:lo12:.LANCHOR131]
 	mov	w0, w23
@@ -20062,21 +20618,21 @@ load_l2p_region:
 	bl	ftl_read_ppa_page
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3199
+	bne	.L3226
 	adrp	x0, .LANCHOR221
 	mov	w1, 255
 	ldrh	w2, [x0, #:lo12:.LANCHOR221]
 	ldr	x0, [x21, 8]
 	bl	ftl_memset
-.L3201:
+.L3228:
 	mov	w0, -1
-	b	.L3190
-.L3199:
+	b	.L3217
+.L3226:
 	ldr	x0, [x20, #:lo12:.LANCHOR207]
 	ldr	w0, [x0]
 	cmp	w19, w0
-	beq	.L3200
-	b	.L3201
+	beq	.L3227
+	b	.L3228
 	.size	load_l2p_region, .-load_l2p_region
 	.section	.text.pm_gc,"ax",@progbits
 	.align	2
@@ -20088,37 +20644,37 @@ pm_gc:
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR110
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR151
+	adrp	x21, .LANCHOR148
 	ldr	x0, [x19, #:lo12:.LANCHOR110]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	ldrh	w2, [x0, 688]
-	adrp	x0, .LANCHOR155
+	adrp	x0, .LANCHOR152
 	str	x27, [sp, 80]
 	mov	x20, x0
-	ldrh	w1, [x0, #:lo12:.LANCHOR155]
+	ldrh	w1, [x0, #:lo12:.LANCHOR152]
 	sub	w1, w1, #1
 	cmp	w2, w1
-	bge	.L3206
-	ldr	w0, [x21, #:lo12:.LANCHOR151]
-	cbz	w0, .L3207
-.L3206:
+	bge	.L3233
+	ldr	w0, [x21, #:lo12:.LANCHOR148]
+	cbz	w0, .L3234
+.L3233:
 	bl	pm_free_sblk
 	ldr	x2, [x19, #:lo12:.LANCHOR110]
-	ldrh	w1, [x20, #:lo12:.LANCHOR155]
+	ldrh	w1, [x20, #:lo12:.LANCHOR152]
 	sub	w1, w1, #1
 	ldrh	w3, [x2, 688]
 	cmp	w3, w1
-	bge	.L3208
-	ldr	w1, [x21, #:lo12:.LANCHOR151]
-	cbz	w1, .L3207
-.L3208:
+	bge	.L3235
+	ldr	w1, [x21, #:lo12:.LANCHOR148]
+	cbz	w1, .L3234
+.L3235:
 	add	x0, x2, x0, uxth 1
-	str	wzr, [x21, #:lo12:.LANCHOR151]
+	str	wzr, [x21, #:lo12:.LANCHOR148]
 	mov	w20, 65535
 	ldrh	w21, [x0, 416]
 	cmp	w21, w20
-	bne	.L3210
+	bne	.L3237
 	adrp	x1, .LANCHOR222
 	add	x1, x1, :lo12:.LANCHOR222
 	mov	w2, 182
@@ -20130,41 +20686,41 @@ pm_gc:
 	add	x0, x1, x0, uxth 1
 	ldrh	w21, [x0, 416]
 	cmp	w21, w20
-	beq	.L3207
-.L3210:
+	beq	.L3234
+.L3237:
 	bl	pm_select_ram_region
 	and	x22, x0, 65535
 	lsl	x0, x22, 4
-	adrp	x20, .LANCHOR138
-	add	x1, x20, :lo12:.LANCHOR138
+	adrp	x20, .LANCHOR135
+	add	x1, x20, :lo12:.LANCHOR135
 	mov	x25, x22
 	add	x23, x1, x0
 	ldrh	w0, [x1, x0]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3211
+	beq	.L3238
 	ldr	x1, [x23, 8]
-	cbz	x1, .L3211
+	cbz	x1, .L3238
 	ldrsh	w2, [x23, 2]
-	tbz	w2, #31, .L3211
+	tbz	w2, #31, .L3238
 	bl	pm_write_page
 	ldrh	w0, [x23, 2]
 	and	w0, w0, 32767
 	strh	w0, [x23, 2]
-.L3211:
-	adrp	x23, .LANCHOR75
-	adrp	x24, .LANCHOR32
-	add	x23, x23, :lo12:.LANCHOR75
-	add	x24, x24, :lo12:.LANCHOR32
+.L3238:
+	adrp	x23, .LANCHOR74
+	adrp	x24, .LANCHOR31
+	add	x23, x23, :lo12:.LANCHOR74
+	add	x24, x24, :lo12:.LANCHOR31
 	mov	w27, 0
 	mov	w26, 24
-.L3212:
+.L3239:
 	ldr	x2, [x19, #:lo12:.LANCHOR110]
 	ldrh	w0, [x2, 698]
 	cmp	w0, w27
-	bhi	.L3215
+	bhi	.L3242
 	bl	pm_free_sblk
-.L3207:
+.L3234:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -20173,7 +20729,7 @@ pm_gc:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L3215:
+.L3242:
 	ldrb	w0, [x24]
 	add	x2, x2, x27, sxtw 2
 	ldrh	w3, [x23]
@@ -20185,29 +20741,29 @@ pm_gc:
 	sub	w0, w0, #1
 	lsr	w1, w1, w3
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR76
-	ldrb	w1, [x1, #:lo12:.LANCHOR76]
+	adrp	x1, .LANCHOR75
+	ldrb	w1, [x1, #:lo12:.LANCHOR75]
 	udiv	w0, w0, w1
 	cmp	w21, w0, uxth
-	bne	.L3213
+	bne	.L3240
 	mov	w1, w25
 	mov	w0, w27
 	bl	load_l2p_region
-	cbnz	w0, .L3214
-	add	x0, x20, :lo12:.LANCHOR138
+	cbnz	w0, .L3241
+	add	x0, x20, :lo12:.LANCHOR135
 	add	x0, x0, x22, lsl 4
 	ldr	x1, [x0, 8]
 	mov	w0, w27
 	bl	pm_write_page
-.L3214:
-	add	x1, x20, :lo12:.LANCHOR138
+.L3241:
+	add	x1, x20, :lo12:.LANCHOR135
 	lsl	x0, x22, 4
 	mov	w2, -1
 	strh	w2, [x1, x0]
-.L3213:
+.L3240:
 	add	w27, w27, 1
 	and	w27, w27, 65535
-	b	.L3212
+	b	.L3239
 	.size	pm_gc, .-pm_gc
 	.section	.text.pm_flush_id,"ax",@progbits
 	.align	2
@@ -20216,8 +20772,8 @@ pm_gc:
 pm_flush_id:
 	stp	x29, x30, [sp, -32]!
 	ubfiz	x0, x0, 4, 16
-	adrp	x2, .LANCHOR138
-	add	x2, x2, :lo12:.LANCHOR138
+	adrp	x2, .LANCHOR135
+	add	x2, x2, :lo12:.LANCHOR135
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	add	x19, x2, x0
@@ -20227,12 +20783,12 @@ pm_flush_id:
 	ldrh	w0, [x19, 2]
 	and	w0, w0, 32767
 	strh	w0, [x19, 2]
-	adrp	x19, .LANCHOR136
-	ldr	w0, [x19, #:lo12:.LANCHOR136]
-	cbz	w0, .L3224
+	adrp	x19, .LANCHOR204
+	ldr	w0, [x19, #:lo12:.LANCHOR204]
+	cbz	w0, .L3251
 	bl	pm_gc
-	str	wzr, [x19, #:lo12:.LANCHOR136]
-.L3224:
+	str	wzr, [x19, #:lo12:.LANCHOR204]
+.L3251:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -20246,21 +20802,21 @@ pm_flush:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR138
-	add	x19, x19, :lo12:.LANCHOR138
+	adrp	x19, .LANCHOR135
+	add	x19, x19, :lo12:.LANCHOR135
 	mov	w20, 0
 	add	x19, x19, 2
-.L3231:
+.L3258:
 	ldrsh	w0, [x19]
-	tbz	w0, #31, .L3230
+	tbz	w0, #31, .L3257
 	mov	w0, w20
 	bl	pm_flush_id
-.L3230:
+.L3257:
 	add	w20, w20, 1
 	add	x19, x19, 16
 	and	w20, w20, 65535
 	cmp	w20, 32
-	bne	.L3231
+	bne	.L3258
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -20309,15 +20865,15 @@ pm_init:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	mov	w24, w0
-	adrp	x0, .LANCHOR151
+	adrp	x0, .LANCHOR148
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	adrp	x19, .LANCHOR138
-	str	wzr, [x0, #:lo12:.LANCHOR151]
-	adrp	x0, .LANCHOR136
+	adrp	x19, .LANCHOR135
+	str	wzr, [x0, #:lo12:.LANCHOR148]
+	adrp	x0, .LANCHOR204
 	stp	x25, x26, [sp, 64]
-	add	x20, x19, :lo12:.LANCHOR138
-	str	wzr, [x0, #:lo12:.LANCHOR136]
+	add	x20, x19, :lo12:.LANCHOR135
+	str	wzr, [x0, #:lo12:.LANCHOR204]
 	adrp	x0, .LANCHOR208
 	stp	x27, x28, [sp, 80]
 	adrp	x22, .LANCHOR131
@@ -20330,19 +20886,19 @@ pm_init:
 	mov	x21, x1
 	mov	w25, -1
 	str	x0, [x1, #:lo12:.LANCHOR207]
-.L3241:
+.L3268:
 	strh	w25, [x20]
 	strh	wzr, [x20, 2]
-	cbz	w24, .L3240
+	cbz	w24, .L3267
 	ldrb	w0, [x22]
 	lsl	w0, w0, 9
 	bl	ftl_malloc
 	str	x0, [x20, 8]
-.L3240:
+.L3267:
 	add	x20, x20, 16
 	cmp	x20, x23
-	bne	.L3241
-	add	x0, x19, :lo12:.LANCHOR138
+	bne	.L3268
+	add	x0, x19, :lo12:.LANCHOR135
 	adrp	x20, .LANCHOR110
 	ldr	x22, [x21, #:lo12:.LANCHOR207]
 	mov	w4, 4
@@ -20358,32 +20914,32 @@ pm_init:
 	mov	w24, w26
 	ldrh	w2, [x0, 696]
 	cmp	w2, w26
-	bgt	.L3242
+	bgt	.L3269
 	ldrh	w1, [x0, 692]
 	mov	w3, w26
-	adrp	x0, .LC206
-	add	x0, x0, :lo12:.LC206
+	adrp	x0, .LC209
+	add	x0, x0, :lo12:.LC209
 	adrp	x25, .LANCHOR131
 	add	x25, x25, :lo12:.LANCHOR131
-	adrp	x28, .LC207
+	adrp	x28, .LC210
 	bl	printf
 	ldr	x0, [x20, #:lo12:.LANCHOR110]
 	ldrsh	w21, [x0, 696]
 	adrp	x0, .LANCHOR111
 	add	x0, x0, :lo12:.LANCHOR111
 	str	x0, [x29, 104]
-.L3243:
+.L3270:
 	cmp	w21, w26
-	ble	.L3246
-	adrp	x0, .LANCHOR198
+	ble	.L3273
+	adrp	x0, .LANCHOR195
 	mov	w1, 1
 	add	w24, w24, 1
-	strb	w1, [x0, #:lo12:.LANCHOR198]
+	strb	w1, [x0, #:lo12:.LANCHOR195]
 	ldr	x0, [x20, #:lo12:.LANCHOR110]
 	strh	w24, [x0, 696]
 	bl	pm_free_sblk
-.L3242:
-	add	x19, x19, :lo12:.LANCHOR138
+.L3269:
+	add	x19, x19, :lo12:.LANCHOR135
 	adrp	x0, .LANCHOR221
 	mov	w1, 255
 	ldrh	w2, [x0, #:lo12:.LANCHOR221]
@@ -20392,9 +20948,9 @@ pm_init:
 	ldr	x1, [x19, 8]
 	mov	w0, -1
 	bl	pm_write_page
-	adrp	x0, .LANCHOR198
-	ldrb	w0, [x0, #:lo12:.LANCHOR198]
-	cbz	w0, .L3247
+	adrp	x0, .LANCHOR195
+	ldrb	w0, [x0, #:lo12:.LANCHOR195]
+	cbz	w0, .L3274
 	ldr	x1, [x19, 8]
 	mov	w0, -1
 	bl	pm_write_page
@@ -20404,7 +20960,7 @@ pm_init:
 	ldr	x1, [x19, 8]
 	mov	w0, -1
 	bl	pm_write_page
-.L3247:
+.L3274:
 	bl	pm_free_sblk
 	bl	pm_gc
 	mov	w0, 0
@@ -20415,7 +20971,7 @@ pm_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L3246:
+.L3273:
 	ldr	x0, [x20, #:lo12:.LANCHOR110]
 	mov	x3, x22
 	ldr	x1, [x29, 104]
@@ -20435,38 +20991,38 @@ pm_init:
 	ldrh	w3, [x0, 694]
 	add	w1, w1, 1
 	str	w1, [x0, 48]
-	add	x0, x28, :lo12:.LC207
+	add	x0, x28, :lo12:.LC210
 	ldr	w1, [x22]
 	bl	printf
 	ldr	w4, [x29, 100]
 	cmp	w4, 512
 	ccmn	w4, #1, 4, ne
-	beq	.L3244
+	beq	.L3271
 	ldr	x8, [x20, #:lo12:.LANCHOR110]
 	ldr	w6, [x22]
 	ldrh	w0, [x8, 698]
 	cmp	w6, w0
-	bcs	.L3244
+	bcs	.L3271
 	ldr	w7, [x22, 8]
-	cbz	w7, .L3245
+	cbz	w7, .L3272
 	ldrb	w1, [x25]
 	mov	x0, x27
 	lsl	w1, w1, 9
 	bl	js_hash
 	cmp	w7, w0
-	beq	.L3245
-	adrp	x0, .LC208
+	beq	.L3272
+	adrp	x0, .LC211
 	mov	w1, w7
-	add	x0, x0, :lo12:.LC208
+	add	x0, x0, :lo12:.LC211
 	bl	printf
-.L3244:
+.L3271:
 	add	w21, w21, 1
 	sxth	w21, w21
-	b	.L3243
-.L3245:
+	b	.L3270
+.L3272:
 	add	x6, x8, x6, uxtw 2
 	str	w23, [x6, 704]
-	b	.L3244
+	b	.L3271
 	.size	pm_init, .-pm_init
 	.section	.text.pm_log2phys,"ax",@progbits
 	.align	2
@@ -20486,15 +21042,15 @@ pm_log2phys:
 	ldr	w2, [x0, #:lo12:.LANCHOR128]
 	str	x27, [sp, 80]
 	cmp	w25, w2
-	bcc	.L3263
+	bcc	.L3290
 	mov	w1, w25
-	adrp	x0, .LC209
-	add	x0, x0, :lo12:.LC209
+	adrp	x0, .LC212
+	add	x0, x0, :lo12:.LC212
 	bl	printf
 	mov	w0, -1
-	cbnz	w24, .L3262
+	cbnz	w24, .L3289
 	str	w0, [x23]
-.L3262:
+.L3289:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -20502,35 +21058,35 @@ pm_log2phys:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L3263:
+.L3290:
 	adrp	x0, .LANCHOR131
-	adrp	x21, .LANCHOR138
+	adrp	x21, .LANCHOR135
 	mov	x19, 0
 	ldrb	w20, [x0, #:lo12:.LANCHOR131]
-	add	x0, x21, :lo12:.LANCHOR138
+	add	x0, x21, :lo12:.LANCHOR135
 	add	x0, x0, 8
 	lsl	w22, w20, 7
 	udiv	w22, w25, w22
 	and	w26, w22, 65535
-.L3269:
+.L3296:
 	ldr	x1, [x0]
-	cbz	x1, .L3265
+	cbz	x1, .L3292
 	ldrh	w1, [x0, -8]
 	cmp	w1, w26
-	bne	.L3265
-.L3266:
+	bne	.L3292
+.L3293:
 	ubfiz	w20, w20, 7, 9
 	msub	w25, w26, w20, w25
 	and	x25, x25, 65535
-	cbnz	w24, .L3267
-	add	x0, x21, :lo12:.LANCHOR138
-	adrp	x1, .LANCHOR32
+	cbnz	w24, .L3294
+	add	x0, x21, :lo12:.LANCHOR135
+	adrp	x1, .LANCHOR31
 	add	x0, x0, x19, lsl 4
 	mov	w2, 24
 	ldr	x0, [x0, 8]
 	ldr	w0, [x0, x25, lsl 2]
 	str	w0, [x23]
-	ldrb	w3, [x1, #:lo12:.LANCHOR32]
+	ldrb	w3, [x1, #:lo12:.LANCHOR31]
 	mov	w1, 1
 	sub	w2, w2, w3
 	lsl	w1, w1, w3
@@ -20540,23 +21096,23 @@ pm_log2phys:
 	adrp	x1, .LANCHOR112
 	ldrb	w1, [x1, #:lo12:.LANCHOR112]
 	cmp	w0, w1
-	bcc	.L3268
+	bcc	.L3295
 	mov	w0, -1
 	str	w0, [x23]
-.L3268:
-	add	x21, x21, :lo12:.LANCHOR138
+.L3295:
+	add	x21, x21, :lo12:.LANCHOR135
 	add	x19, x21, x19, lsl 4
 	ldrh	w0, [x19, 2]
 	mvn	x1, x0
 	tst	x1, 32767
-	beq	.L3272
+	beq	.L3299
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L3272:
+.L3299:
 	mov	w0, 0
-	b	.L3262
-.L3267:
-	add	x0, x21, :lo12:.LANCHOR138
+	b	.L3289
+.L3294:
+	add	x0, x21, :lo12:.LANCHOR135
 	ldr	w2, [x23]
 	add	x0, x0, x19, lsl 4
 	ldr	x1, [x0, 8]
@@ -20564,35 +21120,35 @@ pm_log2phys:
 	ldrh	w1, [x0, 2]
 	orr	w1, w1, -32768
 	strh	w1, [x0, 2]
-	adrp	x0, .LANCHOR139
-	strb	w22, [x0, #:lo12:.LANCHOR139]
-	b	.L3268
-.L3265:
+	adrp	x0, .LANCHOR136
+	strb	w22, [x0, #:lo12:.LANCHOR136]
+	b	.L3295
+.L3292:
 	add	w19, w19, 1
 	add	x0, x0, 16
 	and	x19, x19, 65535
 	cmp	w19, 32
-	bne	.L3269
+	bne	.L3296
 	bl	pm_select_ram_region
 	and	x19, x0, 65535
 	sbfiz	x1, x19, 4, 32
-	add	x2, x21, :lo12:.LANCHOR138
+	add	x2, x21, :lo12:.LANCHOR135
 	add	x3, x2, x1
 	mov	w27, w0
 	ldrh	w2, [x2, x1]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L3270
+	beq	.L3297
 	ldrsh	w1, [x3, 2]
-	tbz	w1, #31, .L3270
+	tbz	w1, #31, .L3297
 	bl	pm_flush_id
-.L3270:
+.L3297:
 	adrp	x0, .LANCHOR223
 	mov	w1, w27
 	strb	w19, [x0, #:lo12:.LANCHOR223]
 	mov	w0, w26
 	bl	load_l2p_region
-	b	.L3266
+	b	.L3293
 	.size	pm_log2phys, .-pm_log2phys
 	.section	.text.gc_recovery,"ax",@progbits
 	.align	2
@@ -20600,18 +21156,18 @@ pm_log2phys:
 	.type	gc_recovery, %function
 gc_recovery:
 	sub	sp, sp, #240
-	adrp	x0, .LANCHOR10
-	adrp	x1, .LANCHOR85
+	adrp	x0, .LANCHOR12
+	adrp	x1, .LANCHOR84
 	mov	w2, 65535
 	stp	x29, x30, [sp, 32]
 	add	x29, sp, 32
 	stp	x23, x24, [sp, 80]
-	ldr	x23, [x0, #:lo12:.LANCHOR10]
-	strb	wzr, [x1, #:lo12:.LANCHOR85]
-	adrp	x1, .LANCHOR159
+	ldr	x23, [x0, #:lo12:.LANCHOR12]
+	strb	wzr, [x1, #:lo12:.LANCHOR84]
+	adrp	x1, .LANCHOR156
 	stp	x25, x26, [sp, 96]
 	mov	x26, x0
-	strb	wzr, [x1, #:lo12:.LANCHOR159]
+	strb	wzr, [x1, #:lo12:.LANCHOR156]
 	add	x1, x23, 80
 	stp	x19, x20, [sp, 48]
 	str	x1, [x29, 168]
@@ -20619,7 +21175,7 @@ gc_recovery:
 	ldrh	w1, [x23, 80]
 	stp	x27, x28, [sp, 112]
 	cmp	w1, w2
-	beq	.L3279
+	beq	.L3306
 	mov	w0, -1
 	strh	w0, [x23, 130]
 	mov	w0, 1
@@ -20634,40 +21190,40 @@ gc_recovery:
 	ldrh	w1, [x3, #:lo12:.LANCHOR111]
 	ldrh	w0, [x0, 16]
 	mul	w1, w0, w1
-	adrp	x0, .LANCHOR79
+	adrp	x0, .LANCHOR78
 	str	w1, [x29, 200]
-	ldrb	w2, [x0, #:lo12:.LANCHOR79]
+	ldrb	w2, [x0, #:lo12:.LANCHOR78]
 	str	x0, [x29, 176]
 	cmp	w2, 2
-	beq	.L3280
+	beq	.L3307
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbnz	w0, .L3307
 	adrp	x0, .LANCHOR36
 	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbnz	w0, .L3280
-	adrp	x0, .LANCHOR37
-	ldrb	w0, [x0, #:lo12:.LANCHOR37]
-	cbz	w0, .L3281
-.L3280:
-	adrp	x0, .LANCHOR86
-	ldrh	w0, [x0, #:lo12:.LANCHOR86]
+	cbz	w0, .L3308
+.L3307:
+	adrp	x0, .LANCHOR85
+	ldrh	w0, [x0, #:lo12:.LANCHOR85]
 	sub	w0, w0, #1
 	add	w0, w0, w1
 	orr	w2, w0, w2, lsl 24
 	str	w2, [x27, 40]
-.L3282:
+.L3309:
 	mov	w1, 1
 	mov	x0, x27
 	bl	sblk_read_page
 	ldr	w0, [x27, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L3283
+	beq	.L3310
 	ldr	x0, [x27, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L3284
-.L3283:
+	beq	.L3311
+.L3310:
 	mov	x0, x27
 	bl	zbuf_free
 	ldr	x1, [x27, 24]
@@ -20680,68 +21236,68 @@ gc_recovery:
 	str	w2, [sp]
 	ldp	w3, w4, [x0]
 	ldp	w5, w6, [x0, 8]
-	adrp	x0, .LC210
+	adrp	x0, .LC213
 	ldr	w7, [x1]
-	add	x0, x0, :lo12:.LC210
+	add	x0, x0, :lo12:.LC213
 	ldr	w1, [x27, 40]
 	ldr	w2, [x27, 52]
 	bl	printf
-.L3373:
-	adrp	x0, .LANCHOR9
+.L3400:
+	adrp	x0, .LANCHOR11
 	ldrh	w1, [x23, 80]
 	mov	w25, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	strh	wzr, [x0, x1, lsl 1]
-	ldr	x0, [x26, #:lo12:.LANCHOR10]
+	ldr	x0, [x26, #:lo12:.LANCHOR12]
 	ldrh	w1, [x23, 80]
 	strh	w1, [x0, 130]
-.L3285:
+.L3312:
 	ldrh	w0, [x23, 80]
-	adrp	x2, .LANCHOR9
-	ldr	x2, [x2, #:lo12:.LANCHOR9]
+	adrp	x2, .LANCHOR11
+	ldr	x2, [x2, #:lo12:.LANCHOR11]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L3329
+	cbnz	w1, .L3356
 	bl	ftl_dump_write_open_sblk
-.L3329:
+.L3356:
 	ldrh	w1, [x23, 80]
 	mov	w2, w25
-	adrp	x0, .LC212
-	add	x0, x0, :lo12:.LC212
+	adrp	x0, .LC215
+	add	x0, x0, :lo12:.LC215
 	bl	printf
 	mov	w0, -1
 	strh	w0, [x23, 80]
 	bl	pm_flush
 	bl	ftl_ext_info_flush
-	ldr	x0, [x26, #:lo12:.LANCHOR10]
+	ldr	x0, [x26, #:lo12:.LANCHOR12]
 	mov	w1, 65535
 	ldrh	w0, [x0, 130]
 	cmp	w0, w1
-	beq	.L3330
-	adrp	x1, .LANCHOR6
-	ldrh	w1, [x1, #:lo12:.LANCHOR6]
+	beq	.L3357
+	adrp	x1, .LANCHOR8
+	ldrh	w1, [x1, #:lo12:.LANCHOR8]
 	cmp	w1, w0
-	bhi	.L3331
+	bhi	.L3358
 	adrp	x1, .LANCHOR225
 	adrp	x0, .LC0
 	mov	w2, 517
 	add	x1, x1, :lo12:.LANCHOR225
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3331:
-	ldr	x0, [x26, #:lo12:.LANCHOR10]
+.L3358:
+	ldr	x0, [x26, #:lo12:.LANCHOR12]
 	ldrh	w0, [x0, 130]
 	bl	ftl_free_sblk
-.L3330:
+.L3357:
 	adrp	x0, .LANCHOR110
 	ldr	x1, [x0, #:lo12:.LANCHOR110]
 	mov	w0, -1
 	strh	w0, [x1, 126]
-	ldr	x1, [x26, #:lo12:.LANCHOR10]
+	ldr	x1, [x26, #:lo12:.LANCHOR12]
 	strh	w0, [x1, 130]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L3278:
+.L3305:
 	ldp	x19, x20, [sp, 48]
 	ldp	x21, x22, [sp, 64]
 	ldp	x23, x24, [sp, 80]
@@ -20750,32 +21306,32 @@ gc_recovery:
 	ldp	x29, x30, [sp, 32]
 	add	sp, sp, 240
 	ret
-.L3281:
+.L3308:
 	cmp	w2, 3
-	bne	.L3282
-	adrp	x0, .LANCHOR95
-	ldrh	w0, [x0, #:lo12:.LANCHOR95]
+	bne	.L3309
+	adrp	x0, .LANCHOR94
+	ldrh	w0, [x0, #:lo12:.LANCHOR94]
 	sub	w0, w0, #1
 	add	w0, w0, w1
 	orr	w0, w0, 50331648
 	str	w0, [x27, 40]
-	b	.L3282
-.L3284:
+	b	.L3309
+.L3311:
 	adrp	x21, .LANCHOR224
-	adrp	x19, .LANCHOR86
-	adrp	x20, .LANCHOR80
-	adrp	x24, .LANCHOR162
+	adrp	x19, .LANCHOR85
+	adrp	x20, .LANCHOR79
+	adrp	x24, .LANCHOR159
 	ldrb	w0, [x21, #:lo12:.LANCHOR224]
 	cmp	w0, 2
-	bne	.L3286
+	bne	.L3313
 	ldr	x0, [x29, 176]
-	ldrb	w0, [x0, #:lo12:.LANCHOR79]
+	ldrb	w0, [x0, #:lo12:.LANCHOR78]
 	cmp	w0, 3
-	bne	.L3286
-	ldrh	w2, [x19, #:lo12:.LANCHOR86]
+	bne	.L3313
+	ldrh	w2, [x19, #:lo12:.LANCHOR85]
 	adrp	x22, .LANCHOR221
-	ldrb	w1, [x20, #:lo12:.LANCHOR80]
-	ldr	x3, [x24, #:lo12:.LANCHOR162]
+	ldrb	w1, [x20, #:lo12:.LANCHOR79]
+	ldr	x3, [x24, #:lo12:.LANCHOR159]
 	ubfiz	w2, w2, 2, 14
 	ldrh	w0, [x22, #:lo12:.LANCHOR221]
 	mul	w2, w2, w1
@@ -20785,16 +21341,16 @@ gc_recovery:
 	and	w2, w2, 65535
 	add	x0, x3, x0
 	bl	ftl_memcpy
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbnz	w0, .L3314
 	adrp	x0, .LANCHOR36
 	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbnz	w0, .L3287
-	adrp	x0, .LANCHOR37
-	ldrb	w0, [x0, #:lo12:.LANCHOR37]
-	cbz	w0, .L3288
-.L3287:
+	cbz	w0, .L3315
+.L3314:
 	ldr	w0, [x27, 40]
 	sub	w0, w0, #1
-.L3367:
+.L3394:
 	str	w0, [x27, 40]
 	mov	w1, 1
 	mov	x0, x27
@@ -20802,48 +21358,48 @@ gc_recovery:
 	ldr	w0, [x27, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L3290
+	beq	.L3317
 	ldr	x0, [x27, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L3291
-.L3290:
+	beq	.L3318
+.L3317:
 	mov	x0, x27
 	bl	zbuf_free
-	b	.L3373
-.L3288:
-	adrp	x1, .LANCHOR95
+	b	.L3400
+.L3315:
+	adrp	x1, .LANCHOR94
 	ldr	w0, [x29, 200]
-	ldrh	w1, [x1, #:lo12:.LANCHOR95]
+	ldrh	w1, [x1, #:lo12:.LANCHOR94]
 	sub	w0, w0, #1
 	add	w0, w0, w1
 	orr	w0, w0, 33554432
-	b	.L3367
-.L3291:
+	b	.L3394
+.L3318:
 	ldrh	w2, [x22, #:lo12:.LANCHOR221]
-.L3368:
+.L3395:
 	ldr	x1, [x27, 8]
-	adrp	x22, .LANCHOR163
-	ldr	x0, [x24, #:lo12:.LANCHOR162]
+	adrp	x22, .LANCHOR160
+	ldr	x0, [x24, #:lo12:.LANCHOR159]
 	bl	ftl_memcpy
-	ldrb	w1, [x20, #:lo12:.LANCHOR80]
-	ldrh	w0, [x19, #:lo12:.LANCHOR86]
+	ldrb	w1, [x20, #:lo12:.LANCHOR79]
+	ldrh	w0, [x19, #:lo12:.LANCHOR85]
 	mul	w0, w0, w1
 	adrp	x1, .LANCHOR131
 	ldrb	w1, [x1, #:lo12:.LANCHOR131]
 	lsl	w2, w0, 2
 	cmp	w1, w0, lsr 6
-	bge	.L3293
-	ldr	x0, [x22, #:lo12:.LANCHOR163]
+	bge	.L3320
+	ldr	x0, [x22, #:lo12:.LANCHOR160]
 	mov	w1, 0
 	bl	ftl_memset
 	ldrb	w21, [x21, #:lo12:.LANCHOR224]
 	cmp	w21, 1
-	bne	.L3334
-	ldrb	w1, [x20, #:lo12:.LANCHOR80]
-	ldrh	w0, [x19, #:lo12:.LANCHOR86]
+	bne	.L3361
+	ldrb	w1, [x20, #:lo12:.LANCHOR79]
+	ldrh	w0, [x19, #:lo12:.LANCHOR85]
 	mul	w0, w0, w1
 	adrp	x1, .LANCHOR221
 	ldrh	w1, [x1, #:lo12:.LANCHOR221]
@@ -20851,178 +21407,178 @@ gc_recovery:
 	ldr	x1, [x27, 8]
 	mov	w2, w25
 	add	x1, x1, x0, sxtw 2
-	ldr	x0, [x22, #:lo12:.LANCHOR163]
+	ldr	x0, [x22, #:lo12:.LANCHOR160]
 	bl	ftl_memcpy
-.L3294:
-	adrp	x0, .LANCHOR95
-	ldrh	w0, [x0, #:lo12:.LANCHOR95]
+.L3321:
+	adrp	x0, .LANCHOR94
+	ldrh	w0, [x0, #:lo12:.LANCHOR94]
 	str	w0, [x29, 184]
 	ldr	x0, [x29, 176]
-	ldrb	w0, [x0, #:lo12:.LANCHOR79]
+	ldrb	w0, [x0, #:lo12:.LANCHOR78]
 	str	w0, [x29, 188]
 	cmp	w0, 2
-	bne	.L3295
-	adrp	x0, .LANCHOR81
-	ldrb	w0, [x0, #:lo12:.LANCHOR81]
-	cbz	w0, .L3296
-.L3295:
-	adrp	x0, .LANCHOR36
-	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbz	w0, .L3297
-.L3296:
+	bne	.L3322
+	adrp	x0, .LANCHOR80
+	ldrb	w0, [x0, #:lo12:.LANCHOR80]
+	cbz	w0, .L3323
+.L3322:
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbz	w0, .L3324
+.L3323:
 	ldp	w0, w1, [x29, 184]
 	mul	w0, w0, w1
 	str	w0, [x29, 184]
 	mov	w0, 1
 	str	w0, [x29, 188]
-.L3297:
-	adrp	x22, .LANCHOR36
+.L3324:
+	adrp	x22, .LANCHOR35
 	mov	w28, 0
-	add	x0, x22, :lo12:.LANCHOR36
+	add	x0, x22, :lo12:.LANCHOR35
 	mov	w10, 0
 	str	x0, [x29, 112]
-.L3298:
+.L3325:
 	sub	w0, w28, #1
 	str	w0, [x29, 144]
 	ldr	w0, [x29, 184]
 	cmp	w0, w28
-	bls	.L3311
+	bls	.L3338
 	add	w0, w28, w28, lsl 1
 	mov	x20, 0
 	sub	w0, w0, #1
 	str	w0, [x29, 164]
-	adrp	x0, .LANCHOR37
-	add	x0, x0, :lo12:.LANCHOR37
+	adrp	x0, .LANCHOR36
+	add	x0, x0, :lo12:.LANCHOR36
 	str	x0, [x29, 120]
-	b	.L3312
-.L3286:
-	ldrh	w2, [x19, #:lo12:.LANCHOR86]
-	ldrb	w0, [x20, #:lo12:.LANCHOR80]
+	b	.L3339
+.L3313:
+	ldrh	w2, [x19, #:lo12:.LANCHOR85]
+	ldrb	w0, [x20, #:lo12:.LANCHOR79]
 	mul	w2, w2, w0
 	lsl	w2, w2, 2
-	b	.L3368
-.L3293:
+	b	.L3395
+.L3320:
 	ldr	x1, [x27, 8]
 	mov	w21, 0
 	add	x1, x1, x0, sxtw 2
-	ldr	x0, [x22, #:lo12:.LANCHOR163]
+	ldr	x0, [x22, #:lo12:.LANCHOR160]
 	bl	ftl_memcpy
-.L3369:
+.L3396:
 	mov	w25, 0
-	b	.L3294
-.L3334:
+	b	.L3321
+.L3361:
 	mov	w21, 1
-	b	.L3369
-.L3307:
+	b	.L3396
+.L3334:
 	ldp	x1, x0, [x29, 128]
 	ldr	x2, [x29, 176]
 	ldrh	w0, [x0, 96]
 	ldrh	w1, [x1]
-	ldrb	w2, [x2, #:lo12:.LANCHOR79]
+	ldrb	w2, [x2, #:lo12:.LANCHOR78]
 	cmp	w2, 2
 	mul	w0, w0, w1
 	str	w0, [x29, 200]
 	add	w1, w22, w0
-	beq	.L3299
+	beq	.L3326
 	ldr	x3, [x29, 112]
 	ldrb	w3, [x3]
-	cbz	w3, .L3300
-.L3299:
+	cbz	w3, .L3327
+.L3326:
 	ldr	w0, [x29, 144]
 	add	w1, w1, w0
 	orr	w1, w1, w2, lsl 24
-.L3370:
+.L3397:
 	str	w1, [x27, 40]
-.L3301:
+.L3328:
 	mov	w1, 1
 	str	x8, [x29, 96]
 	str	w10, [x29, 104]
 	mov	x0, x27
 	bl	sblk_read_page
-	adrp	x1, .LANCHOR163
+	adrp	x1, .LANCHOR160
 	ldr	w10, [x29, 104]
 	ldr	x0, [x27, 24]
 	ldr	x8, [x29, 96]
-	cbz	w21, .L3304
-	ldr	x2, [x1, #:lo12:.LANCHOR163]
+	cbz	w21, .L3331
+	ldr	x2, [x1, #:lo12:.LANCHOR160]
 	ldr	w3, [x2, x8]
-	cbnz	w3, .L3304
+	cbnz	w3, .L3331
 	ldr	w3, [x0, 8]
 	str	w3, [x2, x8]
-.L3304:
-	ldr	x2, [x24, #:lo12:.LANCHOR162]
+.L3331:
+	ldr	x2, [x24, #:lo12:.LANCHOR159]
 	ldr	w6, [x0, 4]
 	ldr	w3, [x2, x8]
 	cmp	w3, w6
-	bne	.L3305
-	ldr	x2, [x1, #:lo12:.LANCHOR163]
+	bne	.L3332
+	ldr	x2, [x1, #:lo12:.LANCHOR160]
 	ldr	w4, [x2, x8]
 	ldr	w2, [x0, 8]
 	cmp	w4, w2
-	beq	.L3306
-.L3305:
-	ldr	x1, [x1, #:lo12:.LANCHOR163]
+	beq	.L3333
+.L3332:
+	ldr	x1, [x1, #:lo12:.LANCHOR160]
 	ldr	w2, [x0, 12]
 	str	w2, [sp]
 	str	w10, [x29, 96]
 	ldr	w4, [x1, x8]
 	ldr	w5, [x0]
 	ldr	w7, [x0, 8]
-	adrp	x0, .LC211
+	adrp	x0, .LC214
 	ldr	w1, [x27, 40]
-	add	x0, x0, :lo12:.LC211
+	add	x0, x0, :lo12:.LC214
 	ldr	w2, [x27, 52]
 	str	x8, [x29, 104]
 	bl	printf
-	ldr	x0, [x24, #:lo12:.LANCHOR162]
+	ldr	x0, [x24, #:lo12:.LANCHOR159]
 	ldr	x8, [x29, 104]
 	ldr	w10, [x29, 96]
 	ldr	w0, [x0, x8]
 	cmn	w0, #1
-	beq	.L3306
+	beq	.L3333
 	mov	x0, x27
 	bl	zbuf_free
-	adrp	x0, .LANCHOR9
+	adrp	x0, .LANCHOR11
 	ldrh	w1, [x23, 80]
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	strh	wzr, [x0, x1, lsl 1]
-	ldr	x0, [x26, #:lo12:.LANCHOR10]
+	ldr	x0, [x26, #:lo12:.LANCHOR12]
 	ldrh	w1, [x23, 80]
 	strh	w1, [x0, 130]
-	b	.L3285
-.L3300:
+	b	.L3312
+.L3327:
 	cmp	w2, 3
-	bne	.L3302
+	bne	.L3329
 	ldr	x2, [x29, 120]
 	ldrb	w2, [x2]
-	cbz	w2, .L3303
+	cbz	w2, .L3330
 	ldr	w0, [x29, 164]
 	add	w1, w1, w0
 	orr	w1, w1, 50331648
-	b	.L3370
-.L3303:
+	b	.L3397
+.L3330:
 	add	w0, w28, w0
 	orr	w0, w0, w22, lsl 24
-.L3371:
+.L3398:
 	str	w0, [x27, 40]
-	b	.L3301
-.L3302:
+	b	.L3328
+.L3329:
 	add	w0, w28, w0
-	b	.L3371
-.L3306:
+	b	.L3398
+.L3333:
 	add	w10, w10, 1
 	add	w22, w22, 1
 	add	x8, x8, 4
-.L3309:
+.L3336:
 	ldr	w0, [x29, 188]
 	cmp	w0, w22
-	bcs	.L3307
+	bcs	.L3334
 	add	x20, x20, 1
-.L3312:
+.L3339:
 	ldr	x0, [x29, 168]
 	ldrb	w0, [x0, 9]
 	cmp	w0, w20
-	ble	.L3308
+	ble	.L3335
 	add	x0, x23, x20, lsl 1
 	str	x0, [x29, 136]
 	ldr	x0, [x29, 152]
@@ -21030,82 +21586,82 @@ gc_recovery:
 	mov	w22, 1
 	add	x0, x0, :lo12:.LANCHOR111
 	str	x0, [x29, 128]
-	b	.L3309
-.L3308:
-	adrp	x0, .LANCHOR81
-	ldrb	w0, [x0, #:lo12:.LANCHOR81]
+	b	.L3336
+.L3335:
+	adrp	x0, .LANCHOR80
+	ldrb	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w0, 0
 	cinc	w28, w28, ne
 	add	w28, w28, 1
-	b	.L3298
-.L3311:
+	b	.L3325
+.L3338:
 	mov	x0, x27
 	bl	zbuf_free
 	ldr	x0, [x29, 168]
-	adrp	x20, .LANCHOR9
-	ldrh	w3, [x19, #:lo12:.LANCHOR86]
+	adrp	x20, .LANCHOR11
+	ldrh	w3, [x19, #:lo12:.LANCHOR85]
 	mov	w25, 0
 	ldrh	w2, [x23, 80]
 	mov	w27, 0
-	ldr	x1, [x20, #:lo12:.LANCHOR9]
+	ldr	x1, [x20, #:lo12:.LANCHOR11]
 	mov	w28, 0
 	ldrb	w0, [x0, 9]
 	str	x20, [x29, 144]
 	mul	w0, w0, w3
 	strh	w0, [x1, x2, lsl 1]
-	adrp	x0, .LANCHOR75
-	add	x0, x0, :lo12:.LANCHOR75
+	adrp	x0, .LANCHOR74
+	add	x0, x0, :lo12:.LANCHOR74
 	str	x0, [x29, 104]
-.L3313:
+.L3340:
 	sub	w0, w27, #1
 	str	w0, [x29, 128]
 	ldr	w0, [x29, 184]
 	cmp	w0, w27
-	bls	.L3327
+	bls	.L3354
 	add	w22, w27, w27, lsl 1
 	mov	x21, 0
 	sub	w0, w22, #1
 	str	w0, [x29, 120]
-	b	.L3328
-.L3323:
-	ldr	x1, [x24, #:lo12:.LANCHOR162]
+	b	.L3355
+.L3350:
+	ldr	x1, [x24, #:lo12:.LANCHOR159]
 	sbfiz	x0, x28, 2, 32
 	ldr	w20, [x1, x0]
 	cmn	w20, #1
-	beq	.L3314
-	adrp	x1, .LANCHOR163
-	ldr	x1, [x1, #:lo12:.LANCHOR163]
+	beq	.L3341
+	adrp	x1, .LANCHOR160
+	ldr	x1, [x1, #:lo12:.LANCHOR160]
 	ldr	w0, [x1, x0]
 	str	w0, [x29, 164]
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 204]
 	cmn	w0, #1
-	bne	.L3315
+	bne	.L3342
 	mov	w2, 0
 	add	x1, x29, 204
 	mov	w0, w20
 	bl	pm_log2phys
-.L3315:
+.L3342:
 	ldr	x0, [x29, 136]
 	ldr	x1, [x29, 152]
 	ldr	x2, [x29, 176]
 	ldrh	w0, [x0, 96]
 	ldrh	w1, [x1, #:lo12:.LANCHOR111]
-	ldrb	w2, [x2, #:lo12:.LANCHOR79]
+	ldrb	w2, [x2, #:lo12:.LANCHOR78]
 	cmp	w2, 2
 	mul	w0, w0, w1
 	add	w1, w22, w0
-	beq	.L3316
-	adrp	x6, .LANCHOR36
-	ldrb	w6, [x6, #:lo12:.LANCHOR36]
-	cbz	w6, .L3317
-.L3316:
+	beq	.L3343
+	adrp	x6, .LANCHOR35
+	ldrb	w6, [x6, #:lo12:.LANCHOR35]
+	cbz	w6, .L3344
+.L3343:
 	ldr	w0, [x29, 128]
 	add	w1, w0, w1
 	orr	w1, w1, w2, lsl 24
 	str	w1, [x29, 200]
-.L3318:
+.L3345:
 	ldp	x0, x1, [x29, 104]
 	mov	w19, 24
 	mov	w2, 1
@@ -21118,103 +21674,103 @@ gc_recovery:
 	lsl	w19, w2, w19
 	sub	w19, w19, #1
 	and	w19, w19, w0
-	adrp	x0, .LANCHOR76
-	ldrb	w0, [x0, #:lo12:.LANCHOR76]
+	adrp	x0, .LANCHOR75
+	ldrb	w0, [x0, #:lo12:.LANCHOR75]
 	udiv	w19, w19, w0
 	ldr	w0, [x29, 204]
 	cmp	w1, w0
 	and	x19, x19, 65535
-	bne	.L3321
+	bne	.L3348
 	add	x1, x29, 200
 	mov	w0, w20
 	bl	pm_log2phys
 	add	w25, w25, 1
 	mov	w0, w19
 	bl	ftl_vpn_decrement
-.L3322:
-	adrp	x0, .LANCHOR7
+.L3349:
+	adrp	x0, .LANCHOR9
 	add	w28, w28, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR7]
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	add	x0, x0, x19, lsl 2
 	ldrb	w0, [x0, 2]
 	tst	w0, 224
-	bne	.L3314
+	bne	.L3341
 	ldr	x0, [x29, 144]
 	lsl	x19, x19, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrh	w1, [x0, x19]
-	cbz	w1, .L3314
+	cbz	w1, .L3341
 	strh	wzr, [x0, x19]
-.L3314:
+.L3341:
 	add	w22, w22, 1
-.L3325:
+.L3352:
 	ldr	w0, [x29, 188]
 	cmp	w0, w22
-	bcs	.L3323
+	bcs	.L3350
 	add	x21, x21, 1
-.L3328:
+.L3355:
 	ldr	x0, [x29, 168]
 	ldrb	w0, [x0, 9]
 	cmp	w0, w21
-	ble	.L3324
+	ble	.L3351
 	add	x0, x23, x21, lsl 1
 	mov	w22, 1
 	str	x0, [x29, 136]
-	adrp	x0, .LANCHOR32
-	add	x0, x0, :lo12:.LANCHOR32
+	adrp	x0, .LANCHOR31
+	add	x0, x0, :lo12:.LANCHOR31
 	str	x0, [x29, 112]
-	b	.L3325
-.L3317:
+	b	.L3352
+.L3344:
 	cmp	w2, 3
-	bne	.L3319
-	adrp	x2, .LANCHOR37
-	ldrb	w6, [x2, #:lo12:.LANCHOR37]
+	bne	.L3346
+	adrp	x2, .LANCHOR36
+	ldrb	w6, [x2, #:lo12:.LANCHOR36]
 	lsl	w2, w22, 24
-	cbz	w6, .L3320
+	cbz	w6, .L3347
 	ldr	w0, [x29, 120]
 	add	w1, w0, w1
 	orr	w0, w1, w2
-.L3372:
+.L3399:
 	str	w0, [x29, 200]
-	b	.L3318
-.L3320:
+	b	.L3345
+.L3347:
 	add	w0, w27, w0
 	orr	w0, w0, w2
-	b	.L3372
-.L3319:
+	b	.L3399
+.L3346:
 	add	w0, w27, w0
-	b	.L3372
-.L3321:
+	b	.L3399
+.L3348:
 	ldr	w1, [x29, 200]
 	cmp	w0, w1
 	cinc	w25, w25, eq
-	b	.L3322
-.L3324:
-	adrp	x0, .LANCHOR81
-	ldrb	w0, [x0, #:lo12:.LANCHOR81]
+	b	.L3349
+.L3351:
+	adrp	x0, .LANCHOR80
+	ldrb	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w0, 0
 	cinc	w27, w27, ne
 	add	w27, w27, 1
-	b	.L3313
-.L3327:
+	b	.L3340
+.L3354:
 	ldr	x0, [x29, 144]
 	ldrh	w1, [x23, 80]
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	strh	w25, [x0, x1, lsl 1]
 	ldrh	w0, [x23, 80]
 	bl	zftl_insert_data_list
-	b	.L3285
-.L3279:
+	b	.L3312
+.L3306:
 	ldrh	w0, [x23, 130]
 	cmp	w0, w1
-	beq	.L3278
+	beq	.L3305
 	adrp	x19, .LANCHOR110
 	ldr	x1, [x19, #:lo12:.LANCHOR110]
 	ldrh	w1, [x1, 126]
 	cmp	w1, w0
-	bne	.L3333
+	bne	.L3360
 	bl	pm_flush
-	ldr	x0, [x26, #:lo12:.LANCHOR10]
+	ldr	x0, [x26, #:lo12:.LANCHOR12]
 	ldrh	w0, [x0, 130]
 	bl	ftl_free_sblk
 	ldr	x0, [x19, #:lo12:.LANCHOR110]
@@ -21222,11 +21778,11 @@ gc_recovery:
 	strh	w1, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L3333:
-	ldr	x0, [x26, #:lo12:.LANCHOR10]
+.L3360:
+	ldr	x0, [x26, #:lo12:.LANCHOR12]
 	mov	w1, -1
 	strh	w1, [x0, 130]
-	b	.L3278
+	b	.L3305
 	.size	gc_recovery, .-gc_recovery
 	.section	.text.gc_update_l2p_map_new,"ax",@progbits
 	.align	2
@@ -21234,33 +21790,33 @@ gc_recovery:
 	.type	gc_update_l2p_map_new, %function
 gc_update_l2p_map_new:
 	stp	x29, x30, [sp, -176]!
-	adrp	x0, .LANCHOR10
-	adrp	x1, .LANCHOR86
+	adrp	x0, .LANCHOR12
+	adrp	x1, .LANCHOR85
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	ldr	x21, [x0, #:lo12:.LANCHOR10]
+	ldr	x21, [x0, #:lo12:.LANCHOR12]
 	stp	x25, x26, [sp, 64]
-	ldrh	w26, [x1, #:lo12:.LANCHOR86]
+	ldrh	w26, [x1, #:lo12:.LANCHOR85]
 	add	x1, x21, 80
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR14
+	adrp	x24, .LANCHOR19
 	stp	x19, x20, [sp, 16]
 	stp	x27, x28, [sp, 80]
 	stp	x0, x1, [x29, 128]
 	ldrb	w1, [x1, 9]
 	mul	w26, w26, w1
-	ldr	w1, [x24, #:lo12:.LANCHOR14]
-	tbz	x1, 8, .L3375
+	ldr	w1, [x24, #:lo12:.LANCHOR19]
+	tbz	x1, 8, .L3402
 	ldrh	w1, [x21, 80]
-	adrp	x0, .LC213
-	add	x0, x0, :lo12:.LC213
+	adrp	x0, .LC216
+	add	x0, x0, :lo12:.LC216
 	bl	printf
-.L3375:
-	adrp	x23, .LANCHOR9
+.L3402:
+	adrp	x23, .LANCHOR11
 	adrp	x0, .LANCHOR224
 	ldrh	w2, [x21, 80]
 	mov	x22, 0
-	ldr	x1, [x23, #:lo12:.LANCHOR9]
+	ldr	x1, [x23, #:lo12:.LANCHOR11]
 	mov	w25, 0
 	ldrb	w0, [x0, #:lo12:.LANCHOR224]
 	sub	w0, w26, w0
@@ -21268,37 +21824,37 @@ gc_update_l2p_map_new:
 	adrp	x0, .LANCHOR131
 	add	x0, x0, :lo12:.LANCHOR131
 	str	x0, [x29, 104]
-.L3376:
+.L3403:
 	mov	w28, w22
 	cmp	w26, w22
-	bhi	.L3386
-	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3387
+	bhi	.L3413
+	ldr	w0, [x24, #:lo12:.LANCHOR19]
+	tbz	x0, 8, .L3414
 	ldr	x0, [x29, 128]
 	mov	w3, w25
-	ldr	x1, [x23, #:lo12:.LANCHOR9]
+	ldr	x1, [x23, #:lo12:.LANCHOR11]
 	ldrh	w2, [x21, 80]
-	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	ldr	x0, [x0, #:lo12:.LANCHOR12]
 	ldrh	w2, [x1, x2, lsl 1]
 	ldrh	w1, [x0, 80]
-	adrp	x0, .LC216
-	add	x0, x0, :lo12:.LC216
+	adrp	x0, .LC219
+	add	x0, x0, :lo12:.LC219
 	bl	printf
-.L3387:
+.L3414:
 	ldrh	w1, [x21, 80]
-	ldr	x0, [x23, #:lo12:.LANCHOR9]
+	ldr	x0, [x23, #:lo12:.LANCHOR11]
 	ldrh	w0, [x0, x1, lsl 1]
 	cmp	w25, w0
-	beq	.L3388
+	beq	.L3415
 	adrp	x1, .LANCHOR226
 	adrp	x0, .LC0
 	mov	w2, 898
 	add	x1, x1, :lo12:.LANCHOR226
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3388:
+.L3415:
 	ldrh	w1, [x21, 80]
-	ldr	x0, [x23, #:lo12:.LANCHOR9]
+	ldr	x0, [x23, #:lo12:.LANCHOR11]
 	strh	w25, [x0, x1, lsl 1]
 	ldrh	w0, [x21, 80]
 	bl	zftl_insert_data_list
@@ -21309,85 +21865,85 @@ gc_update_l2p_map_new:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L3386:
-	adrp	x27, .LANCHOR162
+.L3413:
+	adrp	x27, .LANCHOR159
 	lsl	x19, x22, 2
-	ldr	x0, [x27, #:lo12:.LANCHOR162]
+	ldr	x0, [x27, #:lo12:.LANCHOR159]
 	ldr	w2, [x0, x19]
 	cmn	w2, #1
-	beq	.L3377
+	beq	.L3404
 	adrp	x0, .LANCHOR131
 	ldrb	w20, [x0, #:lo12:.LANCHOR131]
 	lsl	w20, w20, 7
 	udiv	w20, w2, w20
 	and	w0, w20, 65535
 	str	w0, [x29, 156]
-	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3378
+	ldr	w0, [x24, #:lo12:.LANCHOR19]
+	tbz	x0, 8, .L3405
 	ldr	w1, [x29, 156]
-	adrp	x0, .LC214
+	adrp	x0, .LC217
 	mov	w3, w22
-	add	x0, x0, :lo12:.LC214
+	add	x0, x0, :lo12:.LC217
 	bl	printf
-.L3378:
+.L3405:
 	sub	w28, w26, w28
 	add	x28, x28, x22
 	lsl	x0, x28, 2
 	str	x0, [x29, 144]
-	adrp	x0, .LC215
-	add	x0, x0, :lo12:.LC215
+	adrp	x0, .LC218
+	add	x0, x0, :lo12:.LC218
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR75
-	add	x0, x0, :lo12:.LANCHOR75
+	adrp	x0, .LANCHOR74
+	add	x0, x0, :lo12:.LANCHOR74
 	str	x0, [x29, 112]
-.L3379:
+.L3406:
 	ldr	x0, [x29, 144]
 	cmp	x0, x19
-	bne	.L3385
-.L3377:
+	bne	.L3412
+.L3404:
 	add	x22, x22, 1
-	b	.L3376
-.L3385:
-	ldr	x0, [x27, #:lo12:.LANCHOR162]
+	b	.L3403
+.L3412:
+	ldr	x0, [x27, #:lo12:.LANCHOR159]
 	ldr	w20, [x0, x19]
 	cmn	w20, #1
-	beq	.L3380
+	beq	.L3407
 	ldr	x0, [x29, 104]
 	ldr	w1, [x29, 156]
 	ldrb	w0, [x0]
 	lsl	w0, w0, 7
 	udiv	w0, w20, w0
 	cmp	w1, w0, uxth
-	bne	.L3380
-	adrp	x0, .LANCHOR163
-	ldr	x0, [x0, #:lo12:.LANCHOR163]
+	bne	.L3407
+	adrp	x0, .LANCHOR160
+	ldr	x0, [x0, #:lo12:.LANCHOR160]
 	ldr	w28, [x0, x19]
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 172]
 	cmn	w0, #1
-	bne	.L3381
+	bne	.L3408
 	mov	w2, 0
 	add	x1, x29, 172
 	mov	w0, w20
 	bl	pm_log2phys
-.L3381:
+.L3408:
 	ldr	w3, [x29, 172]
 	cmp	w28, w3
-	bne	.L3382
-	adrp	x0, .LANCHOR164
+	bne	.L3409
+	adrp	x0, .LANCHOR161
 	mov	w2, 1
 	add	x1, x29, 168
 	add	w25, w25, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR164]
+	ldr	x0, [x0, #:lo12:.LANCHOR161]
 	ldr	w0, [x0, x19]
 	str	w0, [x29, 168]
 	mov	w0, w20
 	bl	pm_log2phys
 	ldr	x0, [x29, 112]
 	ldrh	w2, [x0]
-	adrp	x0, .LANCHOR32
-	ldrb	w1, [x0, #:lo12:.LANCHOR32]
+	adrp	x0, .LANCHOR31
+	ldrb	w1, [x0, #:lo12:.LANCHOR31]
 	mov	w0, 24
 	lsr	w28, w28, w2
 	sub	w0, w0, w1
@@ -21396,28 +21952,28 @@ gc_update_l2p_map_new:
 	lsl	w0, w0, w1
 	sub	w0, w0, #1
 	and	w28, w0, w28
-	adrp	x0, .LANCHOR76
-	ldrb	w0, [x0, #:lo12:.LANCHOR76]
+	adrp	x0, .LANCHOR75
+	ldrb	w0, [x0, #:lo12:.LANCHOR75]
 	udiv	w0, w28, w0
-.L3408:
+.L3435:
 	bl	ftl_vpn_decrement
-	ldr	x0, [x27, #:lo12:.LANCHOR162]
+	ldr	x0, [x27, #:lo12:.LANCHOR159]
 	mov	w1, -1
 	str	w1, [x0, x19]
-.L3380:
+.L3407:
 	add	x19, x19, 4
-	b	.L3379
-.L3382:
-	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3384
+	b	.L3406
+.L3409:
+	ldr	w0, [x24, #:lo12:.LANCHOR19]
+	tbz	x0, 8, .L3411
 	ldr	x0, [x29, 120]
 	mov	w2, w28
 	mov	w1, w20
 	bl	printf
-.L3384:
+.L3411:
 	ldr	x0, [x29, 136]
 	ldrh	w0, [x0]
-	b	.L3408
+	b	.L3435
 	.size	gc_update_l2p_map_new, .-gc_update_l2p_map_new
 	.section	.text.gc_scan_src_blk_one_page,"ax",@progbits
 	.align	2
@@ -21430,90 +21986,90 @@ gc_scan_src_blk_one_page:
 	mov	w5, 65535
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR71
-	add	x1, x20, :lo12:.LANCHOR71
+	adrp	x20, .LANCHOR70
+	add	x1, x20, :lo12:.LANCHOR70
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	adrp	x21, .LANCHOR80
+	adrp	x21, .LANCHOR79
 	stp	x25, x26, [sp, 64]
-	ldrb	w6, [x21, #:lo12:.LANCHOR80]
+	ldrb	w6, [x21, #:lo12:.LANCHOR79]
 	ldrb	w0, [x1, 4]
 	add	x2, x1, x0, sxtw 1
 	ldrh	w22, [x2, 40]
 	ldrh	w2, [x1, 2]
-.L3410:
+.L3437:
 	cmp	w22, w5
-	beq	.L3412
-	cbz	w4, .L3413
-	add	x1, x20, :lo12:.LANCHOR71
+	beq	.L3439
+	cbz	w4, .L3440
+	add	x1, x20, :lo12:.LANCHOR70
 	strh	w2, [x1, 2]
-.L3413:
-	cbz	w3, .L3414
-	add	x1, x20, :lo12:.LANCHOR71
+.L3440:
+	cbz	w3, .L3441
+	add	x1, x20, :lo12:.LANCHOR70
 	strb	w0, [x1, 4]
-.L3414:
+.L3441:
 	mov	w0, 1
 	adrp	x23, .LANCHOR111
 	bl	buf_alloc
-	adrp	x24, .LANCHOR36
+	adrp	x24, .LANCHOR35
 	mov	x25, x0
 	add	x23, x23, :lo12:.LANCHOR111
-	add	x24, x24, :lo12:.LANCHOR36
+	add	x24, x24, :lo12:.LANCHOR35
 	mov	w26, 1
-.L3415:
-	add	x19, x20, :lo12:.LANCHOR71
+.L3442:
+	add	x19, x20, :lo12:.LANCHOR70
 	ldrb	w1, [x19, 6]
 	cmp	w26, w1
-	ble	.L3425
+	ble	.L3452
 	mov	x0, x25
 	bl	zbuf_free
 	ldrb	w0, [x19, 4]
-	ldrb	w1, [x21, #:lo12:.LANCHOR80]
+	ldrb	w1, [x21, #:lo12:.LANCHOR79]
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x19, 4]
 	cmp	w1, w0
-	bne	.L3409
+	bne	.L3436
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 4]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L3409:
+.L3436:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L3412:
+.L3439:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	cmp	w0, w6
-	bne	.L3411
+	bne	.L3438
 	add	w2, w2, 1
 	mov	w0, 0
 	and	w2, w2, 65535
 	mov	w4, 1
-.L3411:
+.L3438:
 	add	x3, x1, x0, sxtw 1
 	ldrh	w22, [x3, 40]
 	mov	w3, 1
-	b	.L3410
-.L3425:
+	b	.L3437
+.L3452:
 	ldrh	w0, [x23]
 	cmp	w1, 2
 	mul	w0, w0, w22
-	bne	.L3416
+	bne	.L3443
 	ldrh	w1, [x19, 2]
 	lsl	w1, w1, 1
-.L3435:
+.L3462:
 	sub	w1, w1, #1
 	add	w0, w26, w0
 	add	w0, w1, w0
-	adrp	x1, .LANCHOR79
-	ldrb	w1, [x1, #:lo12:.LANCHOR79]
+	adrp	x1, .LANCHOR78
+	ldrb	w1, [x1, #:lo12:.LANCHOR78]
 	orr	w0, w0, w1, lsl 24
-.L3434:
+.L3461:
 	str	w0, [x25, 40]
 	mov	w1, 1
 	mov	x0, x25
@@ -21521,64 +22077,64 @@ gc_scan_src_blk_one_page:
 	ldr	w0, [x25, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L3422
+	beq	.L3449
 	ldr	x0, [x25, 24]
 	ldr	w19, [x0, 4]
 	mov	w0, w19
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 92]
 	cmn	w0, #1
-	bne	.L3423
+	bne	.L3450
 	adrp	x0, .LANCHOR128
 	ldr	w0, [x0, #:lo12:.LANCHOR128]
 	cmp	w19, w0
-	bcs	.L3423
+	bcs	.L3450
 	mov	w2, 0
 	add	x1, x29, 92
 	mov	w0, w19
 	bl	pm_log2phys
-.L3423:
+.L3450:
 	ldr	w2, [x25, 40]
 	ldr	w0, [x29, 92]
 	cmp	w2, w0
-	bne	.L3422
-	add	x1, x20, :lo12:.LANCHOR71
-	adrp	x4, .LANCHOR77
-	ldr	x4, [x4, #:lo12:.LANCHOR77]
+	bne	.L3449
+	add	x1, x20, :lo12:.LANCHOR70
+	adrp	x4, .LANCHOR76
+	ldr	x4, [x4, #:lo12:.LANCHOR76]
 	ldrh	w0, [x1, 24]
 	ubfiz	x3, x0, 2, 16
 	add	w0, w0, 1
 	str	w2, [x4, x3]
 	strh	w0, [x1, 24]
-.L3422:
-	add	x1, x20, :lo12:.LANCHOR71
+.L3449:
+	add	x1, x20, :lo12:.LANCHOR70
 	add	w26, w26, 1
 	ldrh	w0, [x1, 26]
 	add	w0, w0, 1
 	strh	w0, [x1, 26]
-	b	.L3415
-.L3416:
+	b	.L3442
+.L3443:
 	cmp	w1, 3
-	bne	.L3418
+	bne	.L3445
 	ldrb	w1, [x24]
-	cbnz	w1, .L3419
-	adrp	x1, .LANCHOR37
-	ldrb	w1, [x1, #:lo12:.LANCHOR37]
-	cbz	w1, .L3420
-.L3419:
-	add	x1, x20, :lo12:.LANCHOR71
+	cbnz	w1, .L3446
+	adrp	x1, .LANCHOR36
+	ldrb	w1, [x1, #:lo12:.LANCHOR36]
+	cbz	w1, .L3447
+.L3446:
+	add	x1, x20, :lo12:.LANCHOR70
 	ldrh	w1, [x1, 2]
 	add	w1, w1, w1, lsl 1
-	b	.L3435
-.L3420:
+	b	.L3462
+.L3447:
 	ldrh	w1, [x19, 2]
 	add	w0, w1, w0
 	orr	w0, w0, w26, lsl 24
-	b	.L3434
-.L3418:
+	b	.L3461
+.L3445:
 	ldrh	w1, [x19, 2]
 	add	w0, w1, w0
-	b	.L3434
+	b	.L3461
 	.size	gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page
 	.section	.text.gc_scan_src_blk,"ax",@progbits
 	.align	2
@@ -21589,117 +22145,117 @@ gc_scan_src_blk:
 	mov	w0, 65535
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR71
+	adrp	x21, .LANCHOR70
 	stp	x19, x20, [sp, 16]
-	ldrh	w1, [x21, #:lo12:.LANCHOR71]
+	ldrh	w1, [x21, #:lo12:.LANCHOR70]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w1, w0
 	stp	x27, x28, [sp, 80]
-	bne	.L3437
+	bne	.L3464
 	adrp	x1, .LANCHOR227
 	adrp	x0, .LC0
-	mov	w2, 1504
+	mov	w2, 1505
 	add	x1, x1, :lo12:.LANCHOR227
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3437:
-	ldrh	w1, [x21, #:lo12:.LANCHOR71]
+.L3464:
+	ldrh	w1, [x21, #:lo12:.LANCHOR70]
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L3467
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3439
-	adrp	x2, .LANCHOR9
+	beq	.L3494
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 8, .L3466
+	adrp	x2, .LANCHOR11
 	ubfiz	x0, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR9]
+	ldr	x2, [x2, #:lo12:.LANCHOR11]
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC217
-	add	x0, x0, :lo12:.LC217
+	adrp	x0, .LC220
+	add	x0, x0, :lo12:.LC220
 	bl	printf
-.L3439:
-	ldrh	w0, [x21, #:lo12:.LANCHOR71]
-	add	x14, x21, :lo12:.LANCHOR71
+.L3466:
+	ldrh	w0, [x21, #:lo12:.LANCHOR70]
+	add	x14, x21, :lo12:.LANCHOR70
 	add	x1, x14, 40
 	bl	ftl_get_blk_list_in_sblk
 	and	w1, w0, 255
 	strb	w1, [x14, 5]
-	cbnz	w1, .L3440
+	cbnz	w1, .L3467
 	mov	w0, -1
-	strh	w0, [x21, #:lo12:.LANCHOR71]
-.L3467:
+	strh	w0, [x21, #:lo12:.LANCHOR70]
+.L3494:
 	mov	w0, 0
-	b	.L3436
-.L3440:
-	adrp	x4, .LANCHOR7
-	ldrh	w3, [x21, #:lo12:.LANCHOR71]
+	b	.L3463
+.L3467:
+	adrp	x4, .LANCHOR9
+	ldrh	w3, [x21, #:lo12:.LANCHOR70]
 	mov	x19, x4
-	ldr	x1, [x4, #:lo12:.LANCHOR7]
+	ldr	x1, [x4, #:lo12:.LANCHOR9]
 	mov	x2, x3
 	add	x1, x1, x3, lsl 2
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 32
-	beq	.L3441
+	beq	.L3468
 	cmp	w1, 224
-	beq	.L3441
-	cbz	w1, .L3442
-	adrp	x1, .LANCHOR10
-	ldr	x1, [x1, #:lo12:.LANCHOR10]
+	beq	.L3468
+	cbz	w1, .L3469
+	adrp	x1, .LANCHOR12
+	ldr	x1, [x1, #:lo12:.LANCHOR12]
 	ldrh	w3, [x1, 16]
 	cmp	w3, w2
-	beq	.L3441
+	beq	.L3468
 	ldrh	w3, [x1, 48]
 	cmp	w3, w2
-	beq	.L3441
+	beq	.L3468
 	ldrh	w1, [x1, 80]
 	cmp	w1, w2
-	bne	.L3487
-.L3441:
-	add	x0, x21, :lo12:.LANCHOR71
+	bne	.L3514
+.L3468:
+	add	x0, x21, :lo12:.LANCHOR70
 	mov	w1, -1
-	strh	w1, [x21, #:lo12:.LANCHOR71]
+	strh	w1, [x21, #:lo12:.LANCHOR70]
 	strh	wzr, [x0, 24]
-	b	.L3467
-.L3442:
-	adrp	x0, .LANCHOR9
+	b	.L3494
+.L3469:
+	adrp	x0, .LANCHOR11
 	mov	x19, x0
-	ldr	x1, [x0, #:lo12:.LANCHOR9]
+	ldr	x1, [x0, #:lo12:.LANCHOR11]
 	ldrh	w1, [x1, x3, lsl 1]
-	cbz	w1, .L3444
+	cbz	w1, .L3471
 	adrp	x1, .LANCHOR227
 	adrp	x0, .LC0
-	mov	w2, 1529
+	mov	w2, 1530
 	add	x1, x1, :lo12:.LANCHOR227
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3444:
-	ldrh	w1, [x21, #:lo12:.LANCHOR71]
-	ldr	x0, [x19, #:lo12:.LANCHOR9]
+.L3471:
+	ldrh	w1, [x21, #:lo12:.LANCHOR70]
+	ldr	x0, [x19, #:lo12:.LANCHOR11]
 	strh	wzr, [x0, x1, lsl 1]
-	b	.L3441
-.L3487:
+	b	.L3468
+.L3514:
 	and	w0, w0, 255
 	sub	w0, w0, #1
 	add	x0, x14, x0, sxtw 1
 	ldrh	w24, [x0, 40]
 	mov	w0, 65535
 	cmp	w24, w0
-	bne	.L3445
+	bne	.L3472
 	adrp	x1, .LANCHOR227
 	adrp	x0, .LC0
-	mov	w2, 1539
+	mov	w2, 1540
 	add	x1, x1, :lo12:.LANCHOR227
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3445:
-	ldrh	w1, [x21, #:lo12:.LANCHOR71]
+.L3472:
+	ldrh	w1, [x21, #:lo12:.LANCHOR70]
 	adrp	x23, .LANCHOR111
-	ldr	x2, [x19, #:lo12:.LANCHOR7]
-	adrp	x22, .LANCHOR95
+	ldr	x2, [x19, #:lo12:.LANCHOR9]
+	adrp	x22, .LANCHOR94
 	ldrh	w20, [x23, #:lo12:.LANCHOR111]
-	ldrh	w0, [x22, #:lo12:.LANCHOR95]
+	ldrh	w0, [x22, #:lo12:.LANCHOR94]
 	add	x1, x2, x1, lsl 2
 	sub	w0, w0, #1
 	and	w0, w0, 65535
@@ -21707,31 +22263,31 @@ gc_scan_src_blk:
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 160
-	bne	.L3468
-	adrp	x1, .LANCHOR79
-	ldrb	w1, [x1, #:lo12:.LANCHOR79]
+	bne	.L3495
+	adrp	x1, .LANCHOR78
+	ldrb	w1, [x1, #:lo12:.LANCHOR78]
 	and	w27, w1, 65535
 	cmp	w1, 2
 	orr	w20, w20, w1, lsl 24
-	bne	.L3447
-	adrp	x0, .LANCHOR86
-	ldrh	w0, [x0, #:lo12:.LANCHOR86]
+	bne	.L3474
+	adrp	x0, .LANCHOR85
+	ldrh	w0, [x0, #:lo12:.LANCHOR85]
 	sub	w0, w0, #1
 	and	w0, w0, 65535
-.L3447:
+.L3474:
+	adrp	x1, .LANCHOR35
+	ldrb	w1, [x1, #:lo12:.LANCHOR35]
+	cbnz	w1, .L3475
 	adrp	x1, .LANCHOR36
 	ldrb	w1, [x1, #:lo12:.LANCHOR36]
-	cbnz	w1, .L3448
-	adrp	x1, .LANCHOR37
-	ldrb	w1, [x1, #:lo12:.LANCHOR37]
-	cbz	w1, .L3446
-.L3448:
-	adrp	x0, .LANCHOR86
-	ldrh	w0, [x0, #:lo12:.LANCHOR86]
+	cbz	w1, .L3473
+.L3475:
+	adrp	x0, .LANCHOR85
+	ldrh	w0, [x0, #:lo12:.LANCHOR85]
 	sub	w0, w0, #1
 	and	w0, w0, 65535
-.L3446:
-	add	x25, x21, :lo12:.LANCHOR71
+.L3473:
+	add	x25, x21, :lo12:.LANCHOR70
 	orr	w20, w0, w20
 	mov	w0, 1
 	strb	w27, [x25, 6]
@@ -21748,13 +22304,13 @@ gc_scan_src_blk:
 	ldr	w0, [x19, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3449
-.L3492:
+	bne	.L3476
+.L3519:
 	mov	x0, x19
 	bl	zbuf_free
-.L3490:
+.L3517:
 	mov	w0, -1
-.L3436:
+.L3463:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -21762,43 +22318,43 @@ gc_scan_src_blk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L3468:
+.L3495:
 	mov	w27, 1
-	b	.L3446
-.L3449:
+	b	.L3473
+.L3476:
 	ldr	x7, [x19, 24]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	ldr	w1, [x7]
 	cmp	w1, w0
-	beq	.L3450
-	mov	w2, 1577
-.L3493:
+	beq	.L3477
+	mov	w2, 1578
+.L3520:
 	adrp	x1, .LANCHOR227
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR227
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3492
-.L3450:
-	adrp	x0, .LANCHOR80
-	ldrh	w26, [x22, #:lo12:.LANCHOR95]
-	ldrb	w25, [x0, #:lo12:.LANCHOR80]
+	b	.L3519
+.L3477:
+	adrp	x0, .LANCHOR79
+	ldrh	w26, [x22, #:lo12:.LANCHOR94]
+	ldrb	w25, [x0, #:lo12:.LANCHOR79]
 	adrp	x0, .LANCHOR224
 	ldrb	w0, [x0, #:lo12:.LANCHOR224]
 	mul	w26, w25, w26
 	cmp	w0, 2
 	mul	w26, w27, w26
 	and	w26, w26, 65535
-	bne	.L3451
+	bne	.L3478
 	cmp	w27, 3
-	bne	.L3451
-	adrp	x1, .LANCHOR86
+	bne	.L3478
+	adrp	x1, .LANCHOR85
 	adrp	x28, .LANCHOR221
-	adrp	x27, .LANCHOR77
-	ldrh	w1, [x1, #:lo12:.LANCHOR86]
+	adrp	x27, .LANCHOR76
+	ldrh	w1, [x1, #:lo12:.LANCHOR85]
 	ldrh	w0, [x28, #:lo12:.LANCHOR221]
-	ldr	x3, [x27, #:lo12:.LANCHOR77]
+	ldr	x3, [x27, #:lo12:.LANCHOR76]
 	ubfiz	w1, w1, 2, 14
 	mul	w25, w25, w1
 	ldr	x1, [x19, 8]
@@ -21810,100 +22366,100 @@ gc_scan_src_blk:
 	bl	ftl_memcpy
 	ldr	x0, [x19, 24]
 	ldr	w6, [x0, 4]
-	cbz	w6, .L3452
+	cbz	w6, .L3479
 	ldr	x0, [x19, 8]
 	mov	w1, w25
 	bl	js_hash
 	cmp	w6, w0
-	beq	.L3452
+	beq	.L3479
 	mov	x0, x19
 	bl	zbuf_free
 	ldr	x0, [x19, 24]
 	mov	w3, w25
-.L3491:
+.L3518:
 	ldr	w1, [x0, 4]
-	adrp	x0, .LC218
+	adrp	x0, .LC221
 	ldr	w2, [x19, 40]
-	add	x0, x0, :lo12:.LC218
+	add	x0, x0, :lo12:.LC221
 	bl	printf
-	b	.L3490
-.L3452:
+	b	.L3517
+.L3479:
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbnz	w0, .L3480
 	adrp	x0, .LANCHOR36
 	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbnz	w0, .L3453
-	adrp	x0, .LANCHOR37
-	ldrb	w0, [x0, #:lo12:.LANCHOR37]
-	cbz	w0, .L3454
-.L3453:
+	cbz	w0, .L3481
+.L3480:
 	sub	w0, w20, #1
 	str	w0, [x19, 40]
-.L3455:
+.L3482:
 	mov	w1, 1
 	mov	x0, x19
 	bl	sblk_read_page
 	ldr	w0, [x19, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L3492
+	beq	.L3519
 	ldr	x0, [x19, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L3457
-	mov	w2, 1618
-	b	.L3493
-.L3454:
+	beq	.L3484
+	mov	w2, 1619
+	b	.L3520
+.L3481:
 	ldrh	w1, [x23, #:lo12:.LANCHOR111]
-	ldrh	w0, [x22, #:lo12:.LANCHOR95]
+	ldrh	w0, [x22, #:lo12:.LANCHOR94]
 	sub	w0, w0, #1
 	and	w0, w0, 65535
 	mul	w24, w1, w24
 	orr	w0, w0, 33554432
 	orr	w24, w0, w24
 	str	w24, [x19, 40]
-	b	.L3455
-.L3457:
+	b	.L3482
+.L3484:
 	ldrh	w2, [x28, #:lo12:.LANCHOR221]
-	ldr	x0, [x27, #:lo12:.LANCHOR77]
+	ldr	x0, [x27, #:lo12:.LANCHOR76]
 	ldr	x1, [x19, 8]
-.L3489:
-	adrp	x20, .LANCHOR77
+.L3516:
+	adrp	x20, .LANCHOR76
 	bl	ftl_memcpy
-	adrp	x22, .LANCHOR75
-	adrp	x23, .LANCHOR32
-	ldr	x24, [x20, #:lo12:.LANCHOR77]
-	add	x22, x22, :lo12:.LANCHOR75
-	add	x23, x23, :lo12:.LANCHOR32
+	adrp	x22, .LANCHOR74
+	adrp	x23, .LANCHOR31
+	ldr	x24, [x20, #:lo12:.LANCHOR76]
+	add	x22, x22, :lo12:.LANCHOR74
+	add	x23, x23, :lo12:.LANCHOR31
 	mov	x25, 0
-.L3460:
+.L3487:
 	cmp	w26, w25
-	bgt	.L3465
+	bgt	.L3492
 	mov	x0, x19
 	bl	zbuf_free
-	adrp	x0, .LANCHOR9
-	ldrh	w1, [x21, #:lo12:.LANCHOR71]
-	add	x3, x21, :lo12:.LANCHOR71
+	adrp	x0, .LANCHOR11
+	ldrh	w1, [x21, #:lo12:.LANCHOR70]
+	add	x3, x21, :lo12:.LANCHOR70
 	mov	x19, x0
-	ldr	x4, [x0, #:lo12:.LANCHOR9]
+	ldr	x4, [x0, #:lo12:.LANCHOR11]
 	ubfiz	x2, x1, 1, 16
 	ldrh	w3, [x3, 24]
 	ldrh	w2, [x4, x2]
 	cmp	w2, w3
-	beq	.L3466
-	adrp	x0, .LC219
-	add	x0, x0, :lo12:.LC219
+	beq	.L3493
+	adrp	x0, .LC222
+	add	x0, x0, :lo12:.LC222
 	bl	printf
-.L3466:
-	add	x0, x21, :lo12:.LANCHOR71
-	ldrh	w2, [x21, #:lo12:.LANCHOR71]
-	ldr	x1, [x19, #:lo12:.LANCHOR9]
+.L3493:
+	add	x0, x21, :lo12:.LANCHOR70
+	ldrh	w2, [x21, #:lo12:.LANCHOR70]
+	ldr	x1, [x19, #:lo12:.LANCHOR11]
 	ldrh	w3, [x0, 24]
 	strh	w3, [x1, x2, lsl 1]
 	strh	wzr, [x0, 28]
 	ldrh	w0, [x0, 24]
-	b	.L3436
-.L3451:
+	b	.L3463
+.L3478:
 	ldr	x6, [x19, 8]
 	lsl	w20, w26, 2
 	mov	w1, w20
@@ -21911,31 +22467,31 @@ gc_scan_src_blk:
 	bl	js_hash
 	ldr	w1, [x7, 4]
 	cmp	w1, w0
-	beq	.L3459
+	beq	.L3486
 	mov	x0, x19
 	bl	zbuf_free
 	mov	w3, w20
 	ldr	x0, [x19, 24]
-	b	.L3491
-.L3459:
-	adrp	x0, .LANCHOR77
+	b	.L3518
+.L3486:
+	adrp	x0, .LANCHOR76
 	mov	w2, w20
 	mov	x1, x6
-	ldr	x0, [x0, #:lo12:.LANCHOR77]
-	b	.L3489
-.L3465:
+	ldr	x0, [x0, #:lo12:.LANCHOR76]
+	b	.L3516
+.L3492:
 	ldr	w0, [x24, x25, lsl 2]
 	cmn	w0, #1
-	beq	.L3462
+	beq	.L3489
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 108]
 	cmn	w0, #1
-	bne	.L3463
+	bne	.L3490
 	ldr	w0, [x24, x25, lsl 2]
 	mov	w2, 0
 	add	x1, x29, 108
 	bl	pm_log2phys
-.L3463:
+.L3490:
 	ldrb	w0, [x23]
 	mov	w1, 24
 	ldrh	w2, [x22]
@@ -21944,25 +22500,25 @@ gc_scan_src_blk:
 	sub	w1, w0, w2
 	mov	w0, 1
 	lsl	w0, w0, w1
-	adrp	x1, .LANCHOR76
+	adrp	x1, .LANCHOR75
 	sub	w0, w0, #1
 	lsr	w2, w3, w2
-	ldrb	w1, [x1, #:lo12:.LANCHOR76]
+	ldrb	w1, [x1, #:lo12:.LANCHOR75]
 	and	w0, w0, w2
-	ldrh	w2, [x21, #:lo12:.LANCHOR71]
+	ldrh	w2, [x21, #:lo12:.LANCHOR70]
 	udiv	w0, w0, w1
-	add	x1, x21, :lo12:.LANCHOR71
+	add	x1, x21, :lo12:.LANCHOR70
 	cmp	w0, w2
-	bne	.L3462
+	bne	.L3489
 	ldrh	w0, [x1, 24]
-	ldr	x4, [x20, #:lo12:.LANCHOR77]
+	ldr	x4, [x20, #:lo12:.LANCHOR76]
 	ubfiz	x2, x0, 2, 16
 	add	w0, w0, 1
 	str	w3, [x4, x2]
 	strh	w0, [x1, 24]
-.L3462:
+.L3489:
 	add	x25, x25, 1
-	b	.L3460
+	b	.L3487
 	.size	gc_scan_src_blk, .-gc_scan_src_blk
 	.section	.text.gc_scan_static_data,"ax",@progbits
 	.align	2
@@ -21972,27 +22528,27 @@ gc_scan_static_data:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR10
+	adrp	x19, .LANCHOR12
 	stp	x21, x22, [sp, 32]
-	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	ldr	x0, [x19, #:lo12:.LANCHOR12]
 	ldr	w1, [x0, 544]
 	str	x23, [sp, 48]
 	cmn	w1, #1
-	beq	.L3495
+	beq	.L3522
 	adrp	x21, .LANCHOR228
 	adrp	x22, .LC0
 	add	x21, x21, :lo12:.LANCHOR228
 	add	x22, x22, :lo12:.LC0
 	mov	w20, 0
-.L3503:
-	ldr	x0, [x19, #:lo12:.LANCHOR10]
+.L3530:
+	ldr	x0, [x19, #:lo12:.LANCHOR12]
 	mov	w2, 0
 	add	x1, x29, 76
 	ldr	w0, [x0, 544]
 	bl	pm_log2phys
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L3496
+	beq	.L3523
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 76]
@@ -22002,12 +22558,12 @@ gc_scan_static_data:
 	bl	sblk_read_page
 	ldr	w0, [x23, 52]
 	cmp	w0, 256
-	bne	.L3497
-	adrp	x0, .LANCHOR75
+	bne	.L3524
+	adrp	x0, .LANCHOR74
 	ldr	w2, [x29, 76]
-	ldrh	w3, [x0, #:lo12:.LANCHOR75]
-	adrp	x0, .LANCHOR32
-	ldrb	w1, [x0, #:lo12:.LANCHOR32]
+	ldrh	w3, [x0, #:lo12:.LANCHOR74]
+	adrp	x0, .LANCHOR31
+	ldrb	w1, [x0, #:lo12:.LANCHOR31]
 	mov	w0, 24
 	lsr	w2, w2, w3
 	sub	w0, w0, w1
@@ -22016,34 +22572,34 @@ gc_scan_static_data:
 	lsl	w0, w1, w0
 	sub	w0, w0, #1
 	and	w0, w0, w2
-	adrp	x2, .LANCHOR76
-	ldrb	w3, [x2, #:lo12:.LANCHOR76]
+	adrp	x2, .LANCHOR75
+	ldrb	w3, [x2, #:lo12:.LANCHOR75]
 	mov	w2, 0
 	udiv	w0, w0, w3
 	bl	gc_add_sblk
-.L3497:
-	ldr	x0, [x19, #:lo12:.LANCHOR10]
+.L3524:
+	ldr	x0, [x19, #:lo12:.LANCHOR12]
 	ldr	x1, [x23, 24]
 	ldr	w0, [x0, 544]
 	ldr	w1, [x1, 4]
 	cmp	w1, w0
-	beq	.L3498
-	mov	w2, 2162
+	beq	.L3525
+	mov	w2, 2163
 	mov	x1, x21
 	mov	x0, x22
 	bl	printf
-.L3498:
+.L3525:
 	mov	x0, x23
 	bl	zbuf_free
-.L3496:
-	ldr	x0, [x19, #:lo12:.LANCHOR10]
+.L3523:
+	ldr	x0, [x19, #:lo12:.LANCHOR12]
 	adrp	x2, .LANCHOR128
 	ldr	w2, [x2, #:lo12:.LANCHOR128]
 	ldr	w1, [x0, 544]
 	add	w1, w1, 1
 	str	w1, [x0, 544]
 	cmp	w1, w2
-	bcc	.L3499
+	bcc	.L3526
 	mov	w1, -1
 	str	w1, [x0, 544]
 	ldr	w1, [x0, 548]
@@ -22054,46 +22610,46 @@ gc_scan_static_data:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-.L3494:
+.L3521:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L3499:
+.L3526:
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	bne	.L3494
+	bne	.L3521
 	adrp	x1, .LANCHOR221
 	add	w0, w20, 1
 	and	w0, w0, 65535
 	ldrh	w1, [x1, #:lo12:.LANCHOR221]
 	cmp	w20, w1, lsr 2
-	bcs	.L3494
+	bcs	.L3521
 	mov	w20, w0
-	b	.L3503
-.L3495:
+	b	.L3530
+.L3522:
 	ldr	w1, [x0, 536]
 	adrp	x3, .LANCHOR110
 	ldr	w2, [x0, 12]
 	add	w1, w1, 12959744
 	add	w1, w1, 256
 	cmp	w2, w1
-	bhi	.L3505
+	bhi	.L3532
 	ldr	x4, [x3, #:lo12:.LANCHOR110]
 	mov	w5, 5000
 	ldr	w1, [x0, 540]
 	add	w1, w1, w5
 	ldr	w4, [x4, 44]
 	cmp	w4, w1
-	bls	.L3494
-.L3505:
+	bls	.L3521
+.L3532:
 	ldr	x1, [x3, #:lo12:.LANCHOR110]
 	ldr	w1, [x1, 44]
 	str	w1, [x0, 540]
 	str	w2, [x0, 536]
 	str	wzr, [x0, 544]
-	b	.L3494
+	b	.L3521
 	.size	gc_scan_static_data, .-gc_scan_static_data
 	.section	.text.ftl_sblk_dump,"ax",@progbits
 	.align	2
@@ -22105,12 +22661,12 @@ ftl_sblk_dump:
 	stp	x29, x30, [sp, 48]
 	add	x29, sp, 48
 	stp	x23, x24, [sp, 96]
-	adrp	x24, .LANCHOR7
+	adrp	x24, .LANCHOR9
 	lsl	x23, x0, 2
 	stp	x19, x20, [sp, 64]
 	str	x0, [x29, 144]
 	mov	x20, x0
-	ldr	x0, [x24, #:lo12:.LANCHOR7]
+	ldr	x0, [x24, #:lo12:.LANCHOR9]
 	str	x1, [x29, 160]
 	add	x1, x0, x23
 	stp	x21, x22, [sp, 80]
@@ -22119,50 +22675,50 @@ ftl_sblk_dump:
 	ldrb	w2, [x1, 2]
 	mov	w1, w20
 	ldrh	w4, [x0, x23]
-	adrp	x0, .LC220
+	adrp	x0, .LC223
 	stp	x27, x28, [sp, 128]
 	ubfx	x5, x5, 11, 8
 	ubfx	x3, x2, 3, 2
 	and	w4, w4, 2047
 	ubfx	x2, x2, 5, 3
-	add	x0, x0, :lo12:.LC220
+	add	x0, x0, :lo12:.LC223
 	bl	printf
 	mov	w0, 65535
 	cmp	w20, w0
-	beq	.L3534
-	adrp	x0, .LANCHOR6
-	ldrh	w0, [x0, #:lo12:.LANCHOR6]
+	beq	.L3561
+	adrp	x0, .LANCHOR8
+	ldrh	w0, [x0, #:lo12:.LANCHOR8]
 	cmp	w0, w20
-	bls	.L3534
-	ldr	x0, [x24, #:lo12:.LANCHOR7]
+	bls	.L3561
+	ldr	x0, [x24, #:lo12:.LANCHOR9]
 	add	x0, x0, x23
 	ldrb	w0, [x0, 2]
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L3535
-	adrp	x0, .LANCHOR79
-	ldrb	w25, [x0, #:lo12:.LANCHOR79]
-.L3513:
+	bne	.L3562
+	adrp	x0, .LANCHOR78
+	ldrb	w25, [x0, #:lo12:.LANCHOR78]
+.L3540:
 	add	x28, x29, 240
-	adrp	x21, .LANCHOR95
+	adrp	x21, .LANCHOR94
 	mov	w0, w20
 	mov	w19, 0
 	strh	w20, [x28, -32]!
 	add	x1, x28, 16
 	bl	ftl_get_blk_list_in_sblk
-	ldrh	w2, [x21, #:lo12:.LANCHOR95]
+	ldrh	w2, [x21, #:lo12:.LANCHOR94]
 	and	w1, w0, 255
 	strb	w1, [x29, 217]
 	and	w4, w0, 255
 	strb	wzr, [x29, 213]
 	mov	w3, w25
 	strh	wzr, [x29, 210]
-	adrp	x0, .LC221
+	adrp	x0, .LC224
 	mul	w1, w1, w2
 	strh	wzr, [x29, 218]
 	strh	w1, [x29, 214]
-	add	x0, x0, :lo12:.LC221
-	ldr	x1, [x24, #:lo12:.LANCHOR7]
+	add	x0, x0, :lo12:.LC224
+	ldr	x1, [x24, #:lo12:.LANCHOR9]
 	add	x1, x1, x23
 	ldrb	w2, [x1, 2]
 	mov	w1, w20
@@ -22177,55 +22733,55 @@ ftl_sblk_dump:
 	str	wzr, [x29, 176]
 	add	x0, x0, :lo12:.LANCHOR111
 	str	x0, [x29, 112]
-.L3514:
+.L3541:
 	ldr	x0, [x29, 136]
-	ldrh	w0, [x0, #:lo12:.LANCHOR95]
+	ldrh	w0, [x0, #:lo12:.LANCHOR94]
 	cmp	w0, w19
-	bls	.L3531
+	bls	.L3558
 	lsl	w0, w19, 1
 	mov	w22, 0
 	sub	w1, w0, #1
 	add	w0, w0, w19
 	sub	w0, w0, #1
 	stp	w1, w0, [x29, 152]
-	adrp	x0, .LC167
-	add	x0, x0, :lo12:.LC167
+	adrp	x0, .LC160
+	add	x0, x0, :lo12:.LC160
 	str	x0, [x29, 120]
-	b	.L3532
-.L3535:
+	b	.L3559
+.L3562:
 	mov	w25, 1
-	b	.L3513
-.L3528:
+	b	.L3540
+.L3555:
 	ldr	x0, [x29, 128]
 	ldrh	w11, [x28, x0]
 	mov	w0, 65535
 	cmp	w11, w0
-	beq	.L3515
+	beq	.L3542
 	ldr	x0, [x29, 112]
 	cmp	w25, 3
 	ldrh	w8, [x0]
 	mul	w1, w8, w11
 	add	w0, w21, w1
-	bne	.L3516
-	adrp	x2, .LANCHOR36
-	ldrb	w2, [x2, #:lo12:.LANCHOR36]
-	cbz	w2, .L3517
-	adrp	x1, .LANCHOR79
-	ldrb	w8, [x1, #:lo12:.LANCHOR79]
+	bne	.L3543
+	adrp	x2, .LANCHOR35
+	ldrb	w2, [x2, #:lo12:.LANCHOR35]
+	cbz	w2, .L3544
+	adrp	x1, .LANCHOR78
+	ldrb	w8, [x1, #:lo12:.LANCHOR78]
 	ldr	w1, [x29, 156]
-.L3544:
+.L3571:
 	add	w0, w0, w1
 	orr	w27, w0, w8, lsl 24
-	b	.L3518
-.L3517:
-	adrp	x2, .LANCHOR37
+	b	.L3545
+.L3544:
+	adrp	x2, .LANCHOR36
 	lsl	w8, w21, 24
-	ldrb	w2, [x2, #:lo12:.LANCHOR37]
-	cbz	w2, .L3519
+	ldrb	w2, [x2, #:lo12:.LANCHOR36]
+	cbz	w2, .L3546
 	ldr	w1, [x29, 156]
 	add	w0, w0, w1
 	orr	w27, w0, w8
-.L3518:
+.L3545:
 	str	w27, [x26, 40]
 	mov	w1, 1
 	str	w11, [x29, 100]
@@ -22261,28 +22817,28 @@ ftl_sblk_dump:
 	ccmn	w12, #1, 4, ne
 	csinc	w0, w0, wzr, ne
 	str	w0, [x29, 168]
-	ldr	x0, [x24, #:lo12:.LANCHOR7]
+	ldr	x0, [x24, #:lo12:.LANCHOR9]
 	add	x0, x0, x23
 	ldrb	w0, [x0, 2]
 	and	w0, w0, 224
 	cmp	w0, 224
 	ccmp	w0, w1, 4, ne
-	beq	.L3515
+	beq	.L3542
 	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 204]
 	cmn	w0, #1
-	bne	.L3522
+	bne	.L3549
 	ldr	x0, [x26, 24]
 	mov	w2, 0
 	add	x1, x29, 204
 	ldr	w0, [x0, 4]
 	bl	pm_log2phys
-.L3522:
+.L3549:
 	ldr	w0, [x29, 204]
 	cmp	w27, w0
-	bne	.L3523
+	bne	.L3550
 	ldr	w0, [x29, 172]
 	mov	w1, w27
 	add	w0, w0, 1
@@ -22290,12 +22846,12 @@ ftl_sblk_dump:
 	ldr	x0, [x26, 24]
 	ldr	w3, [x29, 172]
 	ldr	w2, [x0, 4]
-	adrp	x0, .LC222
-	add	x0, x0, :lo12:.LC222
+	adrp	x0, .LC225
+	add	x0, x0, :lo12:.LC225
 	bl	printf
-.L3523:
+.L3550:
 	ldr	x0, [x29, 160]
-	cbz	x0, .L3525
+	cbz	x0, .L3552
 	ldr	x0, [x29, 176]
 	ubfiz	x3, x0, 2, 32
 	ldr	x0, [x29, 160]
@@ -22303,85 +22859,85 @@ ftl_sblk_dump:
 	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	cmp	w0, w2
-	beq	.L3526
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3526
+	beq	.L3553
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L3553
 	ldr	w1, [x29, 176]
-	adrp	x0, .LC223
+	adrp	x0, .LC226
 	str	x3, [x29, 104]
-	add	x0, x0, :lo12:.LC223
+	add	x0, x0, :lo12:.LC226
 	bl	printf
 	ldr	x3, [x29, 104]
-.L3526:
+.L3553:
 	ldr	x1, [x26, 24]
 	ldr	x0, [x29, 160]
 	ldr	w1, [x1, 4]
 	ldr	w0, [x0, x3]
 	cmp	w1, w0
-	beq	.L3525
+	beq	.L3552
 	cmn	w0, #1
-	beq	.L3525
+	beq	.L3552
 	adrp	x1, .LANCHOR229
 	adrp	x0, .LC0
-	mov	w2, 1567
+	mov	w2, 1575
 	add	x1, x1, :lo12:.LANCHOR229
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3525:
+.L3552:
 	ldr	w0, [x29, 176]
 	add	w0, w0, 1
 	str	w0, [x29, 176]
-.L3515:
+.L3542:
 	add	w21, w21, 1
 	and	w21, w21, 65535
-.L3530:
+.L3557:
 	cmp	w25, w21
-	bcs	.L3528
+	bcs	.L3555
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L3532:
+.L3559:
 	ldrb	w0, [x29, 217]
 	cmp	w0, w22
-	bls	.L3529
+	bls	.L3556
 	sxtw	x0, w22
 	mov	w21, 1
 	add	x0, x0, 8
 	lsl	x0, x0, 1
 	str	x0, [x29, 128]
-	b	.L3530
-.L3519:
+	b	.L3557
+.L3546:
 	add	w1, w19, w1
 	orr	w27, w8, w1
-	b	.L3518
-.L3516:
+	b	.L3545
+.L3543:
 	cmp	w25, 2
-	bne	.L3520
-	adrp	x1, .LANCHOR79
-	ldrb	w8, [x1, #:lo12:.LANCHOR79]
+	bne	.L3547
+	adrp	x1, .LANCHOR78
+	ldrb	w8, [x1, #:lo12:.LANCHOR78]
 	ldr	w1, [x29, 152]
-	b	.L3544
-.L3520:
+	b	.L3571
+.L3547:
 	add	w27, w19, w1
-	b	.L3518
-.L3529:
+	b	.L3545
+.L3556:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L3514
-.L3531:
+	b	.L3541
+.L3558:
 	mov	x0, x26
 	bl	zbuf_free
-	adrp	x0, .LANCHOR9
+	adrp	x0, .LANCHOR11
 	ldr	x1, [x29, 144]
 	ldr	w3, [x29, 172]
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrh	w2, [x0, x1, lsl 1]
 	mov	w1, w20
-	adrp	x0, .LC224
-	add	x0, x0, :lo12:.LC224
+	adrp	x0, .LC227
+	add	x0, x0, :lo12:.LC227
 	bl	printf
 	ldr	w0, [x29, 168]
-.L3511:
+.L3538:
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
 	ldp	x23, x24, [sp, 96]
@@ -22390,266 +22946,299 @@ ftl_sblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 288
 	ret
-.L3534:
+.L3561:
 	mov	w0, 0
-	b	.L3511
+	b	.L3538
 	.size	ftl_sblk_dump, .-ftl_sblk_dump
 	.section	.text.zftl_read,"ax",@progbits
 	.align	2
 	.global	zftl_read
 	.type	zftl_read, %function
 zftl_read:
-	sub	sp, sp, #208
+	sub	sp, sp, #192
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x19, x20, [sp, 32]
 	mov	w19, w0
-	adrp	x0, .LANCHOR14
+	adrp	x0, .LANCHOR19
 	stp	x21, x22, [sp, 48]
 	stp	x23, x24, [sp, 64]
 	mov	w20, w1
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
 	mov	w23, w2
 	stp	x25, x26, [sp, 80]
 	mov	x22, x3
 	stp	x27, x28, [sp, 96]
-	tbz	x0, 12, .L3546
+	tbz	x0, 12, .L3573
 	mov	w3, w2
-	adrp	x0, .LC225
+	adrp	x0, .LC228
 	mov	w2, w1
-	add	x0, x0, :lo12:.LC225
+	add	x0, x0, :lo12:.LC228
 	mov	w1, w19
 	bl	printf
-.L3546:
-	cbnz	w19, .L3547
-	adrp	x0, .LANCHOR68
+.L3573:
+	cbnz	w19, .L3574
+	adrp	x0, .LANCHOR67
 	mov	w19, 24576
-	ldr	w0, [x0, #:lo12:.LANCHOR68]
-.L3548:
+	ldr	w0, [x0, #:lo12:.LANCHOR67]
+.L3575:
 	cmp	w0, w20
 	ccmp	w0, w23, 0, hi
-	bcc	.L3578
+	bcc	.L3608
 	add	w1, w20, w23
 	cmp	w0, w1
-	bcc	.L3578
+	bcc	.L3608
 	adrp	x1, .LANCHOR110
-	adrp	x26, .LANCHOR131
+	adrp	x24, .LANCHOR131
 	add	w19, w19, w20
-	str	x1, [x29, 120]
+	str	x1, [x29, 112]
 	ldr	x2, [x1, #:lo12:.LANCHOR110]
-	str	x26, [x29, 168]
 	ldr	w0, [x2, 24]
 	add	w0, w0, w23
 	str	w0, [x2, 24]
-	ldrb	w0, [x26, #:lo12:.LANCHOR131]
+	ldrb	w0, [x24, #:lo12:.LANCHOR131]
+	udiv	w2, w19, w0
+	stp	wzr, w2, [x29, 152]
 	add	w2, w23, w19
-	stp	w2, wzr, [x29, 160]
+	str	w2, [x29, 148]
 	sub	w2, w2, #1
-	udiv	w27, w19, w0
 	udiv	w0, w2, w0
-	mov	w20, w27
-	sub	w25, w0, w27
-	str	w0, [x29, 156]
-	add	w25, w25, 1
+	ldr	w2, [x29, 156]
+	mov	x21, x2
+	sub	w26, w0, w2
+	str	w0, [x29, 144]
+	add	w26, w26, 1
 	adrp	x0, .LANCHOR134
 	add	x28, x0, :lo12:.LANCHOR134
-.L3550:
-	cbnz	w25, .L3575
-	ldr	w0, [x29, 164]
-.L3545:
+.L3577:
+	cbnz	w26, .L3605
+	ldr	w0, [x29, 152]
+.L3572:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
 	ldp	x25, x26, [sp, 80]
 	ldp	x27, x28, [sp, 96]
 	ldp	x29, x30, [sp, 16]
-	add	sp, sp, 208
+	add	sp, sp, 192
 	ret
-.L3547:
+.L3574:
 	cmp	w19, 3
-	bhi	.L3578
+	bhi	.L3608
 	lsl	w19, w19, 13
 	mov	w0, 8192
-	b	.L3548
-.L3575:
-	ldr	x0, [x29, 168]
-	cmp	w20, w27
-	ldrb	w1, [x0, #:lo12:.LANCHOR131]
+	b	.L3575
+.L3605:
+	ldr	w0, [x29, 156]
+	ldrb	w1, [x24, #:lo12:.LANCHOR131]
+	cmp	w21, w0
+	ldr	w0, [x29, 144]
+	and	w25, w1, 65535
+	ccmp	w21, w0, 4, ne
+	bne	.L3609
 	ldr	w0, [x29, 156]
-	and	w24, w1, 65535
-	ccmp	w20, w0, 4, ne
+	cmp	w21, w0
 	bne	.L3579
-	cmp	w20, w27
-	bne	.L3552
 	udiv	w3, w19, w1
 	and	w0, w23, 65535
 	msub	w1, w3, w1, w19
-	and	w26, w1, 65535
-	sub	w24, w24, w26
-	and	w24, w24, 65535
-	cmp	w23, w24
-	csel	w24, w0, w24, cc
-.L3551:
-	adrp	x21, .LANCHOR56
-	add	x1, x21, :lo12:.LANCHOR56
+	and	w27, w1, 65535
+	sub	w25, w25, w27
+	and	w25, w25, 65535
+	cmp	w23, w25
+	csel	w25, w0, w25, cc
+.L3578:
+	adrp	x20, .LANCHOR55
+	add	x1, x20, :lo12:.LANCHOR55
 	add	x1, x1, 2
 	mov	w0, 0
-.L3555:
+.L3582:
 	ldr	w2, [x1, 34]
-	cmp	w20, w2
-	bne	.L3553
+	cmp	w21, w2
+	bne	.L3580
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L3553
-	add	x1, x21, :lo12:.LANCHOR56
+	tbz	x2, 3, .L3580
+	add	x1, x20, :lo12:.LANCHOR55
 	ubfiz	x0, x0, 6, 32
 	add	x0, x1, x0
-	lsl	w2, w24, 9
-	ubfiz	x24, x24, 9, 16
-	ubfiz	x26, x26, 9, 16
+	lsl	w2, w25, 9
+	ubfiz	x25, x25, 9, 16
+	ubfiz	x27, x27, 9, 16
 	ldr	x1, [x0, 8]
 	mov	x0, x22
-	add	x22, x22, x24
-	add	x1, x1, x26
+	add	x22, x22, x25
+	add	x1, x1, x27
 	bl	ftl_memcpy
-.L3554:
-	add	w20, w20, 1
-	sub	w25, w25, #1
-.L3561:
-	adrp	x0, .LANCHOR58
-	ldrb	w0, [x0, #:lo12:.LANCHOR58]
+.L3581:
+	add	w21, w21, 1
+	sub	w26, w26, #1
+.L3588:
+	adrp	x0, .LANCHOR57
+	ldrb	w0, [x0, #:lo12:.LANCHOR57]
 	cmp	w0, 2
-	bls	.L3562
-	cbnz	w25, .L3550
-.L3562:
+	bls	.L3589
+	cbnz	w26, .L3577
+.L3589:
 	adrp	x0, .LANCHOR134
 	ldrb	w1, [x0, #:lo12:.LANCHOR134]
-	cbz	w1, .L3550
-	adrp	x24, .LANCHOR133
-	add	x0, x21, :lo12:.LANCHOR56
-	ldrb	w2, [x24, #:lo12:.LANCHOR133]
+	cbz	w1, .L3577
+	adrp	x25, .LANCHOR133
+	add	x0, x20, :lo12:.LANCHOR55
+	ldrb	w2, [x25, #:lo12:.LANCHOR133]
 	add	x0, x0, x2, lsl 6
 	bl	sblk_read_page
 	adrp	x0, .LANCHOR230
 	add	x0, x0, :lo12:.LANCHOR230
-	str	x0, [x29, 136]
+	str	x0, [x29, 128]
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
-	str	x0, [x29, 128]
-.L3564:
+	str	x0, [x29, 120]
+.L3591:
 	ldrb	w0, [x28]
-	cbnz	w0, .L3574
+	cbnz	w0, .L3604
 	mov	w0, -1
 	strb	wzr, [x28]
-	strb	w0, [x24, #:lo12:.LANCHOR133]
-	b	.L3550
-.L3552:
-	ldr	w0, [x29, 160]
-	msub	w24, w1, w20, w0
-	and	w24, w24, 255
+	strb	w0, [x25, #:lo12:.LANCHOR133]
+	b	.L3577
 .L3579:
-	mov	w26, 0
-	b	.L3551
-.L3553:
+	ldr	w0, [x29, 148]
+	msub	w25, w1, w21, w0
+	and	w25, w25, 255
+.L3609:
+	mov	w27, 0
+	b	.L3578
+.L3580:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 32
-	bne	.L3555
-	mov	w0, w20
+	bne	.L3582
+	mov	w0, w21
 	bl	lpa_hash_get_ppa
-	str	w0, [x29, 188]
+	str	w0, [x29, 172]
 	cmn	w0, #1
-	bne	.L3556
+	bne	.L3583
 	mov	w2, 0
-	add	x1, x29, 188
-	mov	w0, w20
+	add	x1, x29, 172
+	mov	w0, w21
 	bl	pm_log2phys
-.L3556:
-	ldr	w0, [x29, 188]
+.L3583:
+	ldr	w0, [x29, 172]
 	cmn	w0, #1
-	bne	.L3557
-	ldr	x0, [x29, 168]
-	mov	w24, 0
-	add	x26, x0, :lo12:.LANCHOR131
-.L3558:
-	ldrb	w0, [x26]
-	cmp	w24, w0
-	bcs	.L3554
-	madd	w0, w20, w0, w24
+	bne	.L3584
+	add	x27, x24, :lo12:.LANCHOR131
+	mov	w25, 0
+.L3585:
+	ldrb	w0, [x27]
+	cmp	w25, w0
+	bcs	.L3581
+	madd	w0, w21, w0, w25
 	cmp	w19, w0
-	bhi	.L3559
-	ldr	w1, [x29, 160]
+	bhi	.L3586
+	ldr	w1, [x29, 148]
 	cmp	w1, w0
-	bls	.L3559
+	bls	.L3586
 	mov	x0, x22
 	add	x22, x22, 512
 	mov	w2, 512
 	mov	w1, 0
 	bl	ftl_memset
-.L3559:
-	add	w24, w24, 1
-	b	.L3558
-.L3557:
+.L3586:
+	add	w25, w25, 1
+	b	.L3585
+.L3584:
 	mov	w0, 0
 	bl	buf_alloc
-	cbz	x0, .L3561
-	ldr	x2, [x29, 120]
+	cbz	x0, .L3588
+	ldr	x2, [x29, 112]
 	ldr	x4, [x2, #:lo12:.LANCHOR110]
 	ldr	w2, [x4, 40]
 	add	w2, w2, 1
 	str	w2, [x4, 40]
-	ldr	w2, [x29, 188]
-	strb	w24, [x0, 56]
-	ubfiz	x24, x24, 9, 16
+	ldr	w2, [x29, 172]
+	strb	w25, [x0, 56]
+	ubfiz	x25, x25, 9, 16
 	str	x22, [x0, 16]
-	add	x22, x22, x24
-	strb	w26, [x0, 57]
-	stp	w20, w2, [x0, 36]
+	add	x22, x22, x25
+	strb	w27, [x0, 57]
+	stp	w21, w2, [x0, 36]
 	str	w2, [x0, 44]
 	bl	zftl_add_read_buf
-	b	.L3554
-.L3574:
-	ldrb	w0, [x24, #:lo12:.LANCHOR133]
+	b	.L3581
+.L3604:
+	ldrb	w0, [x25, #:lo12:.LANCHOR133]
 	cmp	w0, 255
-	bne	.L3565
-	ldp	x0, x1, [x29, 128]
-	mov	w2, 1276
-	bl	printf
-.L3565:
-	ldrb	w26, [x24, #:lo12:.LANCHOR133]
-	add	x0, x21, :lo12:.LANCHOR56
-	ubfiz	x1, x26, 6, 8
-	lsl	x2, x26, 6
+	bne	.L3592
+	ldp	x0, x1, [x29, 120]
+	mov	w2, 1281
+	bl	printf
+.L3592:
+	ldrb	w27, [x25, #:lo12:.LANCHOR133]
+	add	x0, x20, :lo12:.LANCHOR55
+	ubfiz	x1, x27, 6, 8
+	lsl	x2, x27, 6
 	add	x1, x0, x1
-	str	x1, [x29, 144]
+	str	x1, [x29, 136]
 	add	x1, x0, x2
 	ldrb	w0, [x0, x2]
-	strb	w0, [x24, #:lo12:.LANCHOR133]
+	strb	w0, [x25, #:lo12:.LANCHOR133]
 	ldr	w10, [x1, 52]
 	cmn	w10, #1
-	bne	.L3566
-	adrp	x0, .LANCHOR10
-	str	w10, [x29, 164]
-	ldr	x1, [x0, #:lo12:.LANCHOR10]
+	bne	.L3593
+	adrp	x0, .LANCHOR12
+	str	w10, [x29, 152]
+	ldr	x1, [x0, #:lo12:.LANCHOR12]
 	ldr	w0, [x1, 552]
 	add	w0, w0, 1
 	str	w0, [x1, 552]
-.L3567:
-	add	x1, x21, :lo12:.LANCHOR56
-	add	x1, x1, x26, lsl 6
+.L3594:
+	add	x0, x20, :lo12:.LANCHOR55
+	add	x0, x0, x27, lsl 6
+	ldr	x3, [x0, 24]
+	ldr	w0, [x0, 36]
+	ldr	w1, [x3, 4]
+	cmp	w1, w0
+	bne	.L3595
+	cmn	w10, #1
+	bne	.L3596
+.L3595:
+	add	x0, x20, :lo12:.LANCHOR55
+	ldrb	w4, [x24, #:lo12:.LANCHOR131]
+	add	x0, x0, x27, lsl 6
+	mov	w5, 1
+	ldrb	w1, [x0, 56]
+	ldp	x2, x7, [x0, 8]
+	cmp	w1, w4
+	ldr	w1, [x0, 40]
+	adrp	x0, .LANCHOR31
+	csel	x2, x7, x2, cs
+	ldrb	w6, [x0, #:lo12:.LANCHOR31]
+	mov	w0, 24
+	sub	w0, w0, w6
+	lsl	w5, w5, w6
+	sub	w5, w5, #1
+	lsl	w6, w5, w0
+	lsr	w0, w1, w0
+	bic	w1, w1, w6
+	and	w0, w0, w5
+	bl	flash_read_page_en
+	mov	w10, w0
+.L3596:
+	add	x1, x20, :lo12:.LANCHOR55
+	add	x1, x1, x27, lsl 6
 	ldr	x0, [x1, 24]
 	ldr	w3, [x1, 36]
 	ldr	w1, [x0, 4]
 	cmp	w1, w3
-	bne	.L3568
+	bne	.L3598
 	cmn	w10, #1
-	bne	.L3569
-.L3568:
-	adrp	x1, .LANCHOR10
-	add	x11, x21, :lo12:.LANCHOR56
-	add	x11, x11, x26, lsl 6
-	str	w10, [x29, 152]
-	ldr	x2, [x1, #:lo12:.LANCHOR10]
-	str	x11, [x29, 112]
+	bne	.L3599
+.L3598:
+	adrp	x1, .LANCHOR12
+	add	x11, x20, :lo12:.LANCHOR55
+	add	x11, x11, x27, lsl 6
+	str	w10, [x29, 108]
+	ldr	x2, [x1, #:lo12:.LANCHOR12]
+	str	x11, [x29, 96]
 	ldr	w1, [x2, 552]
 	add	w1, w1, 1
 	str	w1, [x2, 552]
@@ -22659,15 +23248,15 @@ zftl_read:
 	mov	w2, w10
 	ldp	w5, w6, [x0]
 	ldr	w7, [x0, 8]
-	adrp	x0, .LC227
+	adrp	x0, .LC230
 	ldr	w4, [x11, 40]
-	add	x0, x0, :lo12:.LC227
+	add	x0, x0, :lo12:.LC230
 	bl	printf
-	adrp	x0, .LANCHOR75
-	ldr	x11, [x29, 112]
-	ldrh	w2, [x0, #:lo12:.LANCHOR75]
-	adrp	x0, .LANCHOR32
-	ldrb	w1, [x0, #:lo12:.LANCHOR32]
+	adrp	x0, .LANCHOR74
+	ldr	x11, [x29, 96]
+	ldrh	w2, [x0, #:lo12:.LANCHOR74]
+	adrp	x0, .LANCHOR31
+	ldrb	w1, [x0, #:lo12:.LANCHOR31]
 	mov	w0, 24
 	sub	w0, w0, w1
 	sub	w1, w0, w2
@@ -22677,34 +23266,33 @@ zftl_read:
 	sub	w0, w0, #1
 	lsr	w1, w1, w2
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR76
-	ldrb	w2, [x1, #:lo12:.LANCHOR76]
+	adrp	x1, .LANCHOR75
+	ldrb	w2, [x1, #:lo12:.LANCHOR75]
 	mov	x1, 0
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
-	ldr	w10, [x29, 152]
-.L3569:
-	add	x0, x21, :lo12:.LANCHOR56
-	add	x0, x0, x26, lsl 6
+	ldr	w10, [x29, 108]
+.L3599:
+	add	x0, x20, :lo12:.LANCHOR55
+	add	x0, x0, x27, lsl 6
 	ldr	x1, [x0, 24]
 	ldr	w0, [x0, 36]
 	ldr	w1, [x1, 4]
 	cmp	w1, w0
-	bne	.L3570
+	bne	.L3600
 	cmn	w10, #1
-	bne	.L3571
-.L3570:
-	ldp	x0, x1, [x29, 128]
-	mov	w2, 1301
-	bl	printf
-.L3571:
-	add	x0, x21, :lo12:.LANCHOR56
-	add	x8, x0, x26, lsl 6
-	ldr	x0, [x29, 168]
+	bne	.L3601
+.L3600:
+	ldp	x0, x1, [x29, 120]
+	mov	w2, 1317
+	bl	printf
+.L3601:
+	add	x0, x20, :lo12:.LANCHOR55
+	add	x8, x0, x27, lsl 6
+	ldrb	w0, [x24, #:lo12:.LANCHOR131]
 	ldrb	w2, [x8, 56]
-	ldrb	w0, [x0, #:lo12:.LANCHOR131]
 	cmp	w0, w2
-	bls	.L3572
+	bls	.L3602
 	ldrb	w0, [x8, 57]
 	lsl	w2, w2, 9
 	ldr	x1, [x8, 8]
@@ -22712,58 +23300,58 @@ zftl_read:
 	add	x1, x1, x0
 	ldr	x0, [x8, 16]
 	bl	ftl_memcpy
-.L3573:
-	ldr	x1, [x29, 144]
-	adrp	x0, .LANCHOR63
-	add	x0, x0, :lo12:.LANCHOR63
+.L3603:
+	ldr	x1, [x29, 136]
+	adrp	x0, .LANCHOR62
+	add	x0, x0, :lo12:.LANCHOR62
 	bl	buf_remove_buf
-	ldr	x0, [x29, 144]
+	ldr	x0, [x29, 136]
 	bl	zbuf_free
 	ldrb	w0, [x28]
 	sub	w0, w0, #1
 	strb	w0, [x28]
-	b	.L3564
-.L3566:
+	b	.L3591
+.L3593:
 	cmp	w10, 256
-	bne	.L3567
-	adrp	x2, .LANCHOR32
-	adrp	x0, .LANCHOR75
+	bne	.L3594
+	adrp	x2, .LANCHOR31
+	adrp	x0, .LANCHOR74
 	mov	w4, 24
 	mov	w5, 1
-	ldrb	w2, [x2, #:lo12:.LANCHOR32]
-	ldrh	w0, [x0, #:lo12:.LANCHOR75]
+	ldrb	w2, [x2, #:lo12:.LANCHOR31]
+	ldrh	w0, [x0, #:lo12:.LANCHOR74]
 	sub	w4, w4, w2
-	stp	w10, w5, [x29, 108]
+	str	w5, [x29, 96]
 	ldp	w2, w3, [x1, 36]
 	sub	w4, w4, w0
 	lsl	w4, w5, w4
 	sub	w4, w4, #1
 	lsr	w0, w3, w0
 	and	w4, w4, w0
-	adrp	x0, .LANCHOR76
-	ldrb	w0, [x0, #:lo12:.LANCHOR76]
+	adrp	x0, .LANCHOR75
+	ldrb	w0, [x0, #:lo12:.LANCHOR75]
 	udiv	w4, w4, w0
-	adrp	x0, .LC226
-	add	x0, x0, :lo12:.LC226
+	adrp	x0, .LC229
+	add	x0, x0, :lo12:.LC229
+	stp	w10, w4, [x29, 104]
 	and	w1, w4, 65535
-	str	w4, [x29, 152]
 	bl	printf
-	ldr	w5, [x29, 112]
+	ldr	w5, [x29, 96]
 	mov	w2, 0
-	ldr	w4, [x29, 152]
+	ldr	w4, [x29, 108]
 	mov	w1, w5
 	mov	w0, w4
 	bl	gc_add_sblk
-	ldr	w10, [x29, 108]
-	b	.L3567
-.L3572:
+	ldr	w10, [x29, 104]
+	b	.L3594
+.L3602:
 	ldrb	w0, [x8, 2]
 	and	w0, w0, -9
 	strb	w0, [x8, 2]
-	b	.L3573
-.L3578:
+	b	.L3603
+.L3608:
 	mov	w0, -1
-	b	.L3545
+	b	.L3572
 	.size	zftl_read, .-zftl_read
 	.section	.text.zftl_sys_read,"ax",@progbits
 	.align	2
@@ -22845,11 +23433,11 @@ ftl_update_l2p_map:
 	stp	x21, x22, [sp, 32]
 	mov	x22, x0
 	stp	x19, x20, [sp, 16]
-	adrp	x0, .LANCHOR95
+	adrp	x0, .LANCHOR94
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	ldrh	w23, [x0, #:lo12:.LANCHOR95]
+	ldrh	w23, [x0, #:lo12:.LANCHOR94]
 	ldrb	w0, [x22, 9]
 	ldrh	w19, [x22, 12]
 	mul	w23, w23, w0
@@ -22860,37 +23448,37 @@ ftl_update_l2p_map:
 	add	x1, x19, x23, sxtw 2
 	ldr	w1, [x1, -4]
 	cmn	w1, #1
-	beq	.L3602
+	beq	.L3632
 	adrp	x1, .LANCHOR231
 	adrp	x0, .LC0
-	mov	w2, 1990
+	mov	w2, 1998
 	add	x1, x1, :lo12:.LANCHOR231
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3602:
+.L3632:
 	adrp	x27, .LANCHOR131
 	mov	x24, 0
 	add	x0, x27, :lo12:.LANCHOR131
 	mov	w21, 0
 	str	x0, [x29, 96]
-.L3603:
+.L3633:
 	cmp	w24, w23
-	blt	.L3609
-	adrp	x0, .LANCHOR14
-	adrp	x19, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3610
+	blt	.L3639
+	adrp	x0, .LANCHOR19
+	adrp	x19, .LANCHOR11
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L3640
 	ldrh	w1, [x22]
-	ldr	x2, [x19, #:lo12:.LANCHOR9]
+	ldr	x2, [x19, #:lo12:.LANCHOR11]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w3, [x2, x0]
-	adrp	x0, .LC231
+	adrp	x0, .LC234
 	mov	w2, w21
-	add	x0, x0, :lo12:.LC231
+	add	x0, x0, :lo12:.LC234
 	bl	printf
-.L3610:
+.L3640:
 	ldrh	w1, [x22]
-	ldr	x0, [x19, #:lo12:.LANCHOR9]
+	ldr	x0, [x19, #:lo12:.LANCHOR11]
 	ldp	x23, x24, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	strh	w21, [x0, x1, lsl 1]
@@ -22899,38 +23487,38 @@ ftl_update_l2p_map:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L3609:
+.L3639:
 	ldr	w2, [x19, x24, lsl 2]
 	cmn	w2, #1
-	beq	.L3604
+	beq	.L3634
 	ldrb	w20, [x27, #:lo12:.LANCHOR131]
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
 	lsl	w20, w20, 7
 	udiv	w20, w2, w20
 	and	w20, w20, 65535
-	tbz	x0, 12, .L3605
-	adrp	x0, .LC228
+	tbz	x0, 12, .L3635
+	adrp	x0, .LC231
 	mov	w3, w24
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC228
+	add	x0, x0, :lo12:.LC231
 	bl	printf
-.L3605:
+.L3635:
 	adrp	x25, .LANCHOR111
-	adrp	x26, .LC229
+	adrp	x26, .LC232
 	mov	x28, x24
 	add	x25, x25, :lo12:.LANCHOR111
-	add	x26, x26, :lo12:.LC229
-.L3608:
+	add	x26, x26, :lo12:.LC232
+.L3638:
 	ldr	w1, [x19, x28, lsl 2]
 	cmn	w1, #1
-	beq	.L3606
+	beq	.L3636
 	ldr	x0, [x29, 96]
 	ldrb	w2, [x0]
 	lsl	w2, w2, 7
 	udiv	w1, w1, w2
 	cmp	w20, w1, uxth
-	bne	.L3606
+	bne	.L3636
 	ldrb	w0, [x22, 9]
 	sdiv	w1, w28, w0
 	msub	w0, w1, w0, w28
@@ -22942,15 +23530,15 @@ ftl_update_l2p_map:
 	str	w2, [x29, 124]
 	ldr	w1, [x19, x28, lsl 2]
 	bl	pm_ppa_update_check
-	cbz	w0, .L3607
+	cbz	w0, .L3637
 	ldr	x0, [x29, 104]
 	mov	w3, w23
 	mov	w2, 4
 	ldr	x1, [x0, #:lo12:.LANCHOR117]
-	adrp	x0, .LC230
-	add	x0, x0, :lo12:.LC230
+	adrp	x0, .LC233
+	add	x0, x0, :lo12:.LC233
 	bl	rknand_print_hex
-.L3607:
+.L3637:
 	ldr	w0, [x19, x28, lsl 2]
 	add	w21, w21, 1
 	mov	w2, 1
@@ -22959,13 +23547,13 @@ ftl_update_l2p_map:
 	bl	pm_log2phys
 	mov	w0, -1
 	str	w0, [x19, x28, lsl 2]
-.L3606:
+.L3636:
 	add	x28, x28, 1
 	cmp	w23, w28
-	bgt	.L3608
-.L3604:
+	bgt	.L3638
+.L3634:
 	add	x24, x24, 1
-	b	.L3603
+	b	.L3633
 	.size	ftl_update_l2p_map, .-ftl_update_l2p_map
 	.section	.text.ftl_alloc_new_data_sblk,"ax",@progbits
 	.align	2
@@ -22983,36 +23571,36 @@ ftl_alloc_new_data_sblk:
 	ldrh	w0, [x20]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3632
+	beq	.L3662
 	bl	zftl_insert_data_list
-.L3632:
-	adrp	x19, .LANCHOR10
-	ldr	x0, [x19, #:lo12:.LANCHOR10]
+.L3662:
+	adrp	x19, .LANCHOR12
+	ldr	x0, [x19, #:lo12:.LANCHOR12]
 	add	x0, x0, 16
 	cmp	x20, x0
 	mov	x0, x20
 	cset	w1, ne
 	add	w1, w1, 2
 	bl	ftl_open_sblk_init
-	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	ldr	x0, [x19, #:lo12:.LANCHOR12]
 	ldr	w0, [x0, 560]
 	cmp	w0, w21
-	bne	.L3634
+	bne	.L3664
 	mov	w20, 65535
 	cmp	w21, w20
-	beq	.L3634
+	beq	.L3664
 	mov	w1, w21
-	adrp	x0, .LC232
-	add	x0, x0, :lo12:.LC232
+	adrp	x0, .LC235
+	add	x0, x0, :lo12:.LC235
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	ldr	x0, [x19, #:lo12:.LANCHOR12]
 	ldr	w0, [x0, 564]
 	bl	gc_mark_bad_ppa
-	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	ldr	x0, [x19, #:lo12:.LANCHOR12]
 	mov	w1, -1
 	str	w20, [x0, 560]
 	str	w1, [x0, 564]
-.L3634:
+.L3664:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
@@ -23029,56 +23617,56 @@ ftl_alloc_new_data_sblk:
 	.type	ftl_write_commit, %function
 ftl_write_commit:
 	stp	x29, x30, [sp, -160]!
-	adrp	x0, .LANCHOR56
+	adrp	x0, .LANCHOR55
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	add	x24, x0, :lo12:.LANCHOR56
+	add	x24, x0, :lo12:.LANCHOR55
 	add	x0, x24, 2050
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	str	x0, [x29, 104]
-.L3638:
-	adrp	x2, .LANCHOR67
-	ldrb	w1, [x2, #:lo12:.LANCHOR67]
-	cbz	w1, .L3640
-	adrp	x3, .LANCHOR66
-	adrp	x0, .LANCHOR56
-	add	x0, x0, :lo12:.LANCHOR56
+.L3668:
+	adrp	x2, .LANCHOR66
+	ldrb	w1, [x2, #:lo12:.LANCHOR66]
+	cbz	w1, .L3670
+	adrp	x3, .LANCHOR65
+	adrp	x0, .LANCHOR55
+	add	x0, x0, :lo12:.LANCHOR55
 	sub	w1, w1, #1
-	ldrb	w4, [x3, #:lo12:.LANCHOR66]
-	strb	w1, [x2, #:lo12:.LANCHOR67]
-	ubfiz	x28, x4, 6, 8
-	add	x5, x0, x28
-	stp	x4, x5, [x29, 128]
+	ldrb	w4, [x3, #:lo12:.LANCHOR65]
+	strb	w1, [x2, #:lo12:.LANCHOR66]
+	ubfiz	x5, x4, 6, 8
+	add	x5, x0, x5
+	stp	x4, x5, [x29, 120]
 	lsl	x4, x4, 6
 	add	x5, x0, x4
 	ldrb	w0, [x0, x4]
-	strb	w0, [x3, #:lo12:.LANCHOR66]
+	strb	w0, [x3, #:lo12:.LANCHOR65]
 	adrp	x0, .LANCHOR128
 	ldr	w2, [x5, 36]
 	mov	x19, x0
 	ldr	w1, [x0, #:lo12:.LANCHOR128]
 	cmp	w2, w1
-	bcc	.L3642
+	bcc	.L3672
 	adrp	x1, .LANCHOR232
 	adrp	x0, .LC0
 	mov	w2, 604
 	add	x1, x1, :lo12:.LANCHOR232
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3642:
-	ldr	x0, [x29, 128]
+.L3672:
+	ldr	x0, [x29, 120]
 	ldr	w1, [x19, #:lo12:.LANCHOR128]
 	add	x0, x24, x0, lsl 6
 	ldr	w22, [x0, 36]
 	cmp	w22, w1
-	bcc	.L3643
-	ldr	x0, [x29, 136]
+	bcc	.L3673
+	ldr	x0, [x29, 128]
 	bl	zbuf_free
 	mov	w0, -1
-.L3637:
+.L3667:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -23086,25 +23674,25 @@ ftl_write_commit:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L3643:
+.L3673:
 	ldrb	w21, [x0, 57]
 	ldrb	w20, [x0, 56]
 	ldr	x26, [x0, 8]
 	ldr	x23, [x0, 24]
 	adrp	x0, .LANCHOR129
-	str	x0, [x29, 120]
+	str	x0, [x29, 112]
 	ldrb	w1, [x0, #:lo12:.LANCHOR129]
-	cbz	w1, .L3645
-	adrp	x0, .LANCHOR185
-	ldrb	w19, [x0, #:lo12:.LANCHOR185]
+	cbz	w1, .L3675
+	adrp	x0, .LANCHOR182
+	ldrb	w19, [x0, #:lo12:.LANCHOR182]
 	add	x19, x24, x19, lsl 6
-.L3646:
+.L3676:
 	ldrb	w0, [x19]
 	cmp	w0, 255
-	bne	.L3647
+	bne	.L3677
 	ldr	w0, [x19, 36]
 	cmp	w22, w0
-	bne	.L3645
+	bne	.L3675
 	ldr	x0, [x19, 8]
 	ubfiz	x21, x21, 9, 8
 	lsl	w2, w20, 9
@@ -23121,86 +23709,86 @@ ftl_write_commit:
 	add	x2, x2, x0, sxtw 2
 	mov	w0, 2
 	bl	ftl_debug_info_fill
-	ldr	x0, [x29, 136]
+	ldr	x0, [x29, 128]
 	bl	zbuf_free
-	b	.L3638
-.L3647:
+	b	.L3668
+.L3677:
 	ubfiz	x19, x0, 6, 8
 	add	x19, x24, x19
-	b	.L3646
-.L3645:
+	b	.L3676
+.L3675:
 	mov	w0, w22
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 156]
 	cmn	w0, #1
-	bne	.L3649
+	bne	.L3679
 	mov	w2, 0
 	add	x1, x29, 156
 	mov	w0, w22
 	bl	pm_log2phys
-.L3649:
-	adrp	x27, .LANCHOR10
+.L3679:
+	adrp	x27, .LANCHOR12
 	ldr	w2, [x29, 156]
 	add	x0, x24, 2
 	mov	w3, 0
-	ldr	x19, [x27, #:lo12:.LANCHOR10]
+	ldr	x19, [x27, #:lo12:.LANCHOR12]
 	mov	x25, 0
 	add	x19, x19, 16
-.L3651:
+.L3681:
 	ldr	w1, [x0, 34]
 	cmp	w22, w1
-	bne	.L3650
+	bne	.L3680
 	ldrb	w1, [x0]
-	tbz	x1, 3, .L3650
+	tbz	x1, 3, .L3680
 	ldr	w2, [x0, 38]
 	and	w1, w1, -9
 	ldr	x25, [x0, 6]
 	mov	w3, 1
 	strb	w1, [x0]
-.L3650:
+.L3680:
 	ldr	x1, [x29, 104]
 	add	x0, x0, 64
 	cmp	x0, x1
-	bne	.L3651
-	cbz	w3, .L3652
+	bne	.L3681
+	cbz	w3, .L3682
 	str	w2, [x29, 156]
-.L3652:
-	adrp	x0, .LANCHOR131
-	str	x0, [x29, 112]
-	ldrb	w1, [x0, #:lo12:.LANCHOR131]
-	cmp	w20, w1
-	bcs	.L3676
+.L3682:
+	adrp	x28, .LANCHOR131
+	str	x28, [x29, 136]
+	ldrb	w0, [x28, #:lo12:.LANCHOR131]
+	cmp	w20, w0
+	bcs	.L3708
 	add	w20, w21, w20
-	cbz	x25, .L3654
-	cbz	w21, .L3655
+	cbz	x25, .L3684
+	cbz	w21, .L3685
 	lsl	w2, w21, 9
 	mov	x1, x25
 	mov	x0, x26
 	bl	ftl_memcpy
-	ldr	x19, [x27, #:lo12:.LANCHOR10]
+	ldr	x19, [x27, #:lo12:.LANCHOR12]
 	add	x19, x19, 48
-.L3655:
-	ldr	x0, [x29, 112]
+.L3685:
+	ldr	x0, [x29, 136]
 	ldrb	w2, [x0, #:lo12:.LANCHOR131]
 	cmp	w20, w2
-	bcc	.L3656
-	ldr	x19, [x27, #:lo12:.LANCHOR10]
+	bcc	.L3686
+	ldr	x19, [x27, #:lo12:.LANCHOR12]
 	add	x19, x19, 16
-.L3676:
+.L3708:
 	mov	w25, 0
-	b	.L3653
-.L3656:
+	b	.L3683
+.L3686:
 	ubfiz	x0, x20, 9, 9
 	sub	w2, w2, w20
 	add	x1, x25, x0
 	lsl	w2, w2, 9
 	add	x0, x26, x0
 	bl	ftl_memcpy
-	b	.L3676
-.L3654:
+	b	.L3708
+.L3684:
 	ldr	w0, [x29, 156]
 	cmn	w0, #1
-	beq	.L3657
+	beq	.L3687
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 156]
@@ -23208,92 +23796,118 @@ ftl_write_commit:
 	stp	w22, w1, [x0, 36]
 	mov	w1, 1
 	bl	sblk_read_page
+	ldr	x3, [x28, 24]
+	ldr	w0, [x3, 4]
+	ldr	w25, [x3, 12]
+	cmp	w22, w0
+	add	w25, w25, 1
+	bne	.L3688
+	ldr	w0, [x28, 52]
+	cmn	w0, #1
+	bne	.L3689
+.L3688:
+	adrp	x0, .LANCHOR31
+	mov	w6, 1
+	ldr	w1, [x28, 40]
+	ldrb	w2, [x0, #:lo12:.LANCHOR31]
+	mov	w0, 24
+	sub	w0, w0, w2
+	lsl	w6, w6, w2
+	ldr	x2, [x29, 136]
+	sub	w6, w6, #1
+	lsl	w7, w6, w0
+	ldrb	w4, [x2, #:lo12:.LANCHOR131]
+	lsr	w0, w1, w0
+	ldr	x2, [x28, 8]
+	bic	w1, w1, w7
+	and	w0, w0, w6
+	bl	flash_read_page_en
+	str	w0, [x28, 52]
+.L3689:
 	ldr	x0, [x28, 24]
-	ldr	w25, [x0, 12]
 	ldr	w0, [x0, 4]
-	add	w25, w25, 1
 	cmp	w22, w0
-	bne	.L3658
+	bne	.L3690
 	ldr	w0, [x28, 52]
 	cmn	w0, #1
-	bne	.L3659
-.L3658:
-	ldr	x1, [x27, #:lo12:.LANCHOR10]
+	bne	.L3691
+.L3690:
+	ldr	x1, [x27, #:lo12:.LANCHOR12]
 	mov	w3, w22
 	ldr	w4, [x28, 52]
 	ldr	w2, [x29, 156]
 	ldr	w0, [x1, 552]
 	add	w0, w0, 1
 	str	w0, [x1, 552]
-	adrp	x0, .LC233
-	add	x0, x0, :lo12:.LC233
+	adrp	x0, .LC236
+	add	x0, x0, :lo12:.LC236
 	ldrb	w1, [x28, 1]
 	bl	printf
 	ldr	x1, [x28, 24]
 	mov	w3, 4
-	adrp	x0, .LC205
+	adrp	x0, .LC208
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC205
+	add	x0, x0, :lo12:.LC208
 	bl	rknand_print_hex
-.L3659:
+.L3691:
 	ldr	x0, [x28, 24]
 	ldr	w0, [x0, 4]
 	cmp	w22, w0
-	bne	.L3660
+	bne	.L3692
 	ldr	w0, [x28, 52]
 	cmn	w0, #1
-	bne	.L3661
-.L3660:
+	bne	.L3693
+.L3692:
 	adrp	x1, .LANCHOR232
 	adrp	x0, .LC0
-	mov	w2, 691
+	mov	w2, 696
 	add	x1, x1, :lo12:.LANCHOR232
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3661:
-	cbz	w21, .L3662
+.L3693:
+	cbz	w21, .L3694
 	ldr	w0, [x29, 156]
 	lsl	w2, w21, 9
 	cmn	w0, #1
-	beq	.L3663
+	beq	.L3695
 	ldr	x1, [x28, 8]
 	mov	x0, x26
 	bl	ftl_memcpy
-.L3664:
-	ldr	x19, [x27, #:lo12:.LANCHOR10]
+.L3696:
+	ldr	x19, [x27, #:lo12:.LANCHOR12]
 	add	x19, x19, 48
-.L3662:
-	ldr	x0, [x29, 112]
+.L3694:
+	ldr	x0, [x29, 136]
 	ldrb	w2, [x0, #:lo12:.LANCHOR131]
 	cmp	w20, w2
-	bcc	.L3665
-	bls	.L3666
-	ldr	x19, [x27, #:lo12:.LANCHOR10]
+	bcc	.L3697
+	bls	.L3698
+	ldr	x19, [x27, #:lo12:.LANCHOR12]
 	add	x19, x19, 16
-.L3666:
-	cbz	x28, .L3653
+.L3698:
+	cbz	x28, .L3683
 	ldrb	w0, [x28, 2]
 	mov	x1, x28
 	and	w0, w0, -9
 	strb	w0, [x28, 2]
-	adrp	x0, .LANCHOR63
-	add	x0, x0, :lo12:.LANCHOR63
+	adrp	x0, .LANCHOR62
+	add	x0, x0, :lo12:.LANCHOR62
 	bl	buf_remove_buf
 	mov	x0, x28
 	bl	zbuf_free
-.L3653:
+.L3683:
 	ldrh	w0, [x19, 6]
-	cbnz	w0, .L3668
+	cbnz	w0, .L3700
 	bl	ftl_flush
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L3668:
+.L3700:
 	mov	x0, x19
 	bl	ftl_get_new_free_page
 	mov	w10, w0
-	ldr	x0, [x29, 128]
+	ldr	x0, [x29, 120]
 	mov	x1, x23
-	adrp	x20, .LANCHOR185
+	adrp	x20, .LANCHOR182
 	lsl	x8, x0, 6
 	add	x7, x24, x8
 	ldr	w0, [x7, 32]
@@ -23301,7 +23915,7 @@ ftl_write_commit:
 	str	w25, [x23, 12]
 	ldr	w0, [x29, 156]
 	str	w0, [x23, 8]
-	ldr	x0, [x29, 112]
+	ldr	x0, [x29, 136]
 	str	wzr, [x1, 16]!
 	ldrb	w2, [x0, #:lo12:.LANCHOR131]
 	mov	w0, 2
@@ -23320,12 +23934,12 @@ ftl_write_commit:
 	strb	w0, [x7, 2]
 	ldrh	w0, [x19, 10]
 	add	w0, w0, w1
-	ldr	x1, [x29, 136]
+	ldr	x1, [x29, 128]
 	sub	w0, w0, #1
 	strh	w0, [x7, 48]
-	add	x0, x20, :lo12:.LANCHOR185
+	add	x0, x20, :lo12:.LANCHOR182
 	bl	buf_add_tail
-	ldr	x0, [x29, 120]
+	ldr	x0, [x29, 112]
 	ldrb	w2, [x0, #:lo12:.LANCHOR129]
 	add	w2, w2, 1
 	and	w2, w2, 255
@@ -23334,24 +23948,24 @@ ftl_write_commit:
 	cmp	w2, 2
 	str	wzr, [x0, #:lo12:.LANCHOR233]
 	ldrh	w0, [x19, 6]
-	bhi	.L3669
+	bhi	.L3701
 	cmp	w0, 1
-	bne	.L3641
-.L3669:
+	bne	.L3671
+.L3701:
 	ldrb	w1, [x19, 5]
 	cmp	w1, 0
 	mov	w1, 0
 	cset	w4, ne
 	cmp	w0, 1
-	ldrb	w0, [x20, #:lo12:.LANCHOR185]
+	ldrb	w0, [x20, #:lo12:.LANCHOR182]
 	csinc	w4, w2, w4, eq
 	mov	w3, w0
-.L3673:
+.L3705:
 	cmp	w1, w4
-	bne	.L3674
-	strb	w3, [x20, #:lo12:.LANCHOR185]
+	bne	.L3706
+	strb	w3, [x20, #:lo12:.LANCHOR182]
 	and	w1, w1, 255
-	ldr	x3, [x29, 120]
+	ldr	x3, [x29, 112]
 	sub	w2, w2, w1
 	ubfiz	x0, x0, 6, 8
 	add	x0, x24, x0
@@ -23359,58 +23973,58 @@ ftl_write_commit:
 	bl	sblk_prog_page
 	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bne	.L3641
+	bne	.L3671
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	mov	x0, x19
 	bl	ftl_write_last_log_page
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L3641:
-	adrp	x0, .LANCHOR67
-	ldrb	w0, [x0, #:lo12:.LANCHOR67]
-	cbnz	w0, .L3638
-.L3640:
+.L3671:
+	adrp	x0, .LANCHOR66
+	ldrb	w0, [x0, #:lo12:.LANCHOR66]
+	cbnz	w0, .L3668
+.L3670:
 	bl	ftl_write_completed
 	mov	w0, 0
-	b	.L3637
-.L3665:
+	b	.L3667
+.L3697:
 	ldr	w0, [x29, 156]
 	sub	w2, w2, w20
 	lsl	w2, w2, 9
 	cmn	w0, #1
 	ubfiz	x0, x20, 7, 9
-	beq	.L3667
+	beq	.L3699
 	ldr	x1, [x28, 8]
 	lsl	x0, x0, 2
 	add	x1, x1, x0
 	add	x0, x26, x0
 	bl	ftl_memcpy
-	b	.L3666
-.L3667:
+	b	.L3698
+.L3699:
 	mov	w1, 0
 	add	x0, x26, x0, lsl 2
 	bl	ftl_memset
-	b	.L3666
-.L3674:
+	b	.L3698
+.L3706:
 	ubfiz	x3, x3, 6, 8
 	add	w1, w1, 1
 	ldrb	w3, [x24, x3]
-	b	.L3673
-.L3675:
+	b	.L3705
+.L3707:
 	lsl	w2, w21, 9
 	mov	x28, 0
 	mov	w25, 0
-.L3663:
+.L3695:
 	mov	w1, 0
 	mov	x0, x26
 	bl	ftl_memset
-	b	.L3664
-.L3657:
-	cbnz	w21, .L3675
+	b	.L3696
+.L3687:
+	cbnz	w21, .L3707
 	mov	w25, 0
 	mov	x28, 0
-	b	.L3662
+	b	.L3694
 	.size	ftl_write_commit, .-ftl_write_commit
 	.section	.text.gc_do_copy_back,"ax",@progbits
 	.align	2
@@ -23418,20 +24032,20 @@ ftl_write_commit:
 	.type	gc_do_copy_back, %function
 gc_do_copy_back:
 	stp	x29, x30, [sp, -224]!
-	adrp	x0, .LANCHOR85
+	adrp	x0, .LANCHOR84
 	add	x29, sp, 0
-	ldrb	w0, [x0, #:lo12:.LANCHOR85]
+	ldrb	w0, [x0, #:lo12:.LANCHOR84]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w0, .L3702
+	cbnz	w0, .L3734
 	bl	buf_alloc
 	mov	x19, x0
-	cbz	x0, .L3701
-	adrp	x21, .LANCHOR71
-	add	x3, x21, :lo12:.LANCHOR71
+	cbz	x0, .L3733
+	adrp	x21, .LANCHOR70
+	add	x3, x21, :lo12:.LANCHOR70
 	ldrh	w2, [x3, 26]
 	mov	w0, w2
 	bl	gc_get_src_ppa_from_index
@@ -23445,52 +24059,52 @@ gc_do_copy_back:
 	ldr	w0, [x19, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3704
+	bne	.L3736
 	adrp	x1, .LANCHOR234
 	adrp	x0, .LC0
 	mov	w2, 1032
 	add	x1, x1, :lo12:.LANCHOR234
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3704:
+.L3736:
 	ldr	x0, [x19, 24]
 	ldr	w20, [x0, 4]
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 176]
 	cmn	w0, #1
-	bne	.L3705
+	bne	.L3737
 	mov	w2, 0
 	add	x1, x29, 176
 	mov	w0, w20
 	bl	pm_log2phys
-.L3705:
+.L3737:
 	ldr	w23, [x29, 176]
 	cmp	w22, w23
-	bne	.L3706
-	adrp	x0, .LANCHOR56
-	add	x0, x0, :lo12:.LANCHOR56
+	bne	.L3738
+	adrp	x0, .LANCHOR55
+	add	x0, x0, :lo12:.LANCHOR55
 	add	x1, x0, 2
 	add	x0, x0, 2050
-.L3709:
+.L3741:
 	ldr	w2, [x1, 34]
 	cmp	w20, w2
-	bne	.L3707
+	bne	.L3739
 	ldrb	w2, [x1]
-	tbz	x2, 1, .L3707
+	tbz	x2, 1, .L3739
 	mov	x0, x19
 	bl	zbuf_free
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3701
-	add	x21, x21, :lo12:.LANCHOR71
-	adrp	x0, .LC234
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 8, .L3733
+	add	x21, x21, :lo12:.LANCHOR70
+	adrp	x0, .LC237
 	mov	w2, w22
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC234
+	add	x0, x0, :lo12:.LC237
 	ldrh	w3, [x21, 26]
 	bl	printf
-.L3701:
+.L3733:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -23498,10 +24112,10 @@ gc_do_copy_back:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 224
 	ret
-.L3707:
+.L3739:
 	add	x1, x1, 64
 	cmp	x1, x0
-	bne	.L3709
+	bne	.L3741
 	adrp	x0, .LANCHOR131
 	strb	wzr, [x19, 57]
 	str	w20, [x19, 36]
@@ -23511,25 +24125,25 @@ gc_do_copy_back:
 	ldr	w1, [x0]
 	str	w1, [x19, 32]
 	str	wzr, [x0, 16]
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3710
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 8, .L3742
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
-	add	x1, x21, :lo12:.LANCHOR71
+	add	x1, x21, :lo12:.LANCHOR70
 	mov	w3, w0
 	mov	w4, w22
-	adrp	x0, .LC235
+	adrp	x0, .LC238
 	mov	w2, w23
-	add	x0, x0, :lo12:.LC235
+	add	x0, x0, :lo12:.LC238
 	ldrh	w5, [x1, 26]
 	mov	w1, w20
 	bl	printf
-.L3710:
+.L3742:
 	mov	x0, x19
 	bl	ftl_gc_write_buf
 	bl	ftl_write_commit
-	add	x21, x21, :lo12:.LANCHOR71
+	add	x21, x21, :lo12:.LANCHOR70
 	adrp	x0, .LANCHOR110
 	ldr	x1, [x0, #:lo12:.LANCHOR110]
 	ldr	w0, [x1, 60]
@@ -23538,74 +24152,74 @@ gc_do_copy_back:
 	ldrh	w0, [x21, 28]
 	add	w0, w0, 1
 	strh	w0, [x21, 28]
-	b	.L3701
-.L3706:
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3711
-	add	x21, x21, :lo12:.LANCHOR71
+	b	.L3733
+.L3738:
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 8, .L3743
+	add	x21, x21, :lo12:.LANCHOR70
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	mov	w3, w0
 	mov	w4, w22
-	adrp	x0, .LC235
+	adrp	x0, .LC238
 	ldrh	w5, [x21, 26]
 	mov	w2, w23
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC235
+	add	x0, x0, :lo12:.LC238
 	bl	printf
-.L3711:
+.L3743:
 	mov	x0, x19
 	bl	zbuf_free
-	b	.L3701
-.L3702:
-	adrp	x2, .LANCHOR10
-	adrp	x1, .LANCHOR80
+	b	.L3733
+.L3734:
+	adrp	x2, .LANCHOR12
+	adrp	x1, .LANCHOR79
 	stp	x1, x2, [x29, 136]
-	ldr	x26, [x2, #:lo12:.LANCHOR10]
-	ldrb	w3, [x1, #:lo12:.LANCHOR80]
+	ldr	x26, [x2, #:lo12:.LANCHOR12]
+	ldrb	w3, [x1, #:lo12:.LANCHOR79]
 	add	x26, x26, 80
 	ldrb	w0, [x26, 9]
 	and	w20, w0, 65535
 	cmp	w3, w20
-	bhi	.L3766
+	bhi	.L3798
 	cmp	w20, 2
 	mov	w21, 2
 	csel	w21, w20, w21, ls
 	and	w21, w21, 65535
-.L3712:
-	adrp	x1, .LANCHOR79
+.L3744:
+	adrp	x1, .LANCHOR78
 	str	x1, [x29, 120]
-	ldrb	w19, [x1, #:lo12:.LANCHOR79]
+	ldrb	w19, [x1, #:lo12:.LANCHOR78]
 	cmp	w19, 3
-	bne	.L3713
-	adrp	x1, .LANCHOR36
-	ldrb	w1, [x1, #:lo12:.LANCHOR36]
-	cbz	w1, .L3714
-	adrp	x1, .LANCHOR71
-	add	x1, x1, :lo12:.LANCHOR71
+	bne	.L3745
+	adrp	x1, .LANCHOR35
+	ldrb	w1, [x1, #:lo12:.LANCHOR35]
+	cbz	w1, .L3746
+	adrp	x1, .LANCHOR70
+	add	x1, x1, :lo12:.LANCHOR70
 	ldrh	w22, [x1, 2106]
 	adrp	x1, .LANCHOR124
 	ldrb	w1, [x1, #:lo12:.LANCHOR124]
 	sdiv	w2, w22, w0
 	and	w25, w2, 65535
-	cbz	w1, .L3715
+	cbz	w1, .L3747
 	adrp	x1, .LANCHOR235
 	add	x1, x1, :lo12:.LANCHOR235
 	ldrh	w1, [x1, w2, sxtw 1]
 	cmp	w1, 0
 	cset	w19, ne
-.L3833:
+.L3865:
 	add	w19, w19, 1
-.L3716:
+.L3748:
 	msub	w20, w20, w25, w22
 	and	w20, w20, 65535
-.L3717:
-	adrp	x1, .LANCHOR86
+.L3749:
+	adrp	x1, .LANCHOR85
 	mul	w11, w19, w21
 	adrp	x10, .LANCHOR235
 	sxtw	x13, w25
-	ldrh	w5, [x1, #:lo12:.LANCHOR86]
+	ldrh	w5, [x1, #:lo12:.LANCHOR85]
 	adrp	x1, .LANCHOR224
 	add	x10, x10, :lo12:.LANCHOR235
 	mov	w2, 0
@@ -23614,58 +24228,58 @@ gc_do_copy_back:
 	sub	w5, w0, w5
 	adrp	x0, .LANCHOR124
 	ldrb	w12, [x0, #:lo12:.LANCHOR124]
-	adrp	x0, .LANCHOR163
-	ldr	x8, [x0, #:lo12:.LANCHOR163]
-	adrp	x0, .LANCHOR71
-	add	x6, x0, :lo12:.LANCHOR71
+	adrp	x0, .LANCHOR160
+	ldr	x8, [x0, #:lo12:.LANCHOR160]
+	adrp	x0, .LANCHOR70
+	add	x6, x0, :lo12:.LANCHOR70
 	ldrh	w14, [x6, 24]
-.L3721:
+.L3753:
 	cmp	w2, w11
-	bge	.L3774
+	bge	.L3806
 	add	w4, w22, w2
 	cmp	w4, w5
-	blt	.L3722
-	cbz	w12, .L3774
+	blt	.L3754
+	cbz	w12, .L3806
 	ldrh	w0, [x10, x13, lsl 1]
 	cmp	w0, w25
-	bcc	.L3723
-.L3774:
+	bcc	.L3755
+.L3806:
 	mov	w23, 1
-	b	.L3719
-.L3766:
+	b	.L3751
+.L3798:
 	mov	w21, 1
-	b	.L3712
-.L3715:
+	b	.L3744
+.L3747:
 	adrp	x1, .LANCHOR217
 	ldrb	w1, [x1, #:lo12:.LANCHOR217]
-	cbz	w1, .L3768
+	cbz	w1, .L3800
 	sub	w1, w25, #62
 	and	w1, w1, 65535
 	cmp	w1, 2159
-	bhi	.L3769
+	bhi	.L3801
 	udiv	w19, w25, w19
 	add	w19, w19, w19, lsl 1
 	sub	w19, w25, w19
 	and	w19, w19, 65535
 	cmp	w19, 0
 	cset	w19, eq
-	b	.L3833
-.L3768:
+	b	.L3865
+.L3800:
 	mov	w19, 1
-	b	.L3716
-.L3769:
+	b	.L3748
+.L3801:
 	mov	w19, 2
-	b	.L3716
-.L3714:
-	adrp	x1, .LANCHOR84
-	ldrb	w1, [x1, #:lo12:.LANCHOR84]
-	cbz	w1, .L3718
-	adrp	x1, .LANCHOR71
-	add	x1, x1, :lo12:.LANCHOR71
+	b	.L3748
+.L3746:
+	adrp	x1, .LANCHOR83
+	ldrb	w1, [x1, #:lo12:.LANCHOR83]
+	cbz	w1, .L3750
+	adrp	x1, .LANCHOR70
+	add	x1, x1, :lo12:.LANCHOR70
 	add	w20, w0, w0, lsl 1
 	ldrh	w22, [x1, 2106]
-	adrp	x1, .LANCHOR37
-	ldrb	w1, [x1, #:lo12:.LANCHOR37]
+	adrp	x1, .LANCHOR36
+	ldrb	w1, [x1, #:lo12:.LANCHOR36]
 	sdiv	w20, w22, w20
 	and	w25, w20, 65535
 	mul	w20, w0, w20
@@ -23673,13 +24287,13 @@ gc_do_copy_back:
 	add	w20, w20, w22
 	sdiv	w20, w20, w19
 	and	w20, w20, 65535
-	cbz	w1, .L3717
+	cbz	w1, .L3749
 	add	w3, w25, w25, lsl 1
 	and	w25, w3, 65535
-	b	.L3717
-.L3718:
-	adrp	x1, .LANCHOR71
-	add	x1, x1, :lo12:.LANCHOR71
+	b	.L3749
+.L3750:
+	adrp	x1, .LANCHOR70
+	add	x1, x1, :lo12:.LANCHOR70
 	adrp	x2, .LANCHOR236
 	add	x2, x2, :lo12:.LANCHOR236
 	ldrh	w4, [x1, 2106]
@@ -23693,8 +24307,8 @@ gc_do_copy_back:
 	madd	w22, w25, w0, w20
 	add	w22, w22, w22, lsl 1
 	and	w22, w22, 65535
-	beq	.L3717
-.L3719:
+	beq	.L3749
+.L3751:
 	mul	w0, w19, w21
 	stp	wzr, w0, [x29, 152]
 	ubfiz	w0, w21, 1, 15
@@ -23704,104 +24318,104 @@ gc_do_copy_back:
 	str	w0, [x29, 128]
 	ldrh	w0, [x29, 128]
 	str	x0, [x29, 112]
-	adrp	x0, .LANCHOR56
-	add	x0, x0, :lo12:.LANCHOR56
+	adrp	x0, .LANCHOR55
+	add	x0, x0, :lo12:.LANCHOR55
 	str	x0, [x29, 104]
-.L3724:
+.L3756:
 	ldp	w0, w1, [x29, 152]
 	ldrh	w24, [x29, 152]
 	and	w0, w0, 65535
 	str	w0, [x29, 168]
 	cmp	w0, w1
-	blt	.L3748
+	blt	.L3780
 	ldr	x0, [x29, 120]
-	ldrb	w0, [x0, #:lo12:.LANCHOR79]
+	ldrb	w0, [x0, #:lo12:.LANCHOR78]
 	cmp	w0, 3
 	add	x0, x29, 176
-	bne	.L3749
-	adrp	x1, .LANCHOR36
-	ldrb	w1, [x1, #:lo12:.LANCHOR36]
-	cbz	w1, .L3750
+	bne	.L3781
+	adrp	x1, .LANCHOR35
+	ldrb	w1, [x1, #:lo12:.LANCHOR35]
+	cbz	w1, .L3782
 	ldr	w2, [x29, 156]
 	mov	w1, 0
 	sub	w2, w2, #1
-.L3751:
+.L3783:
 	cmp	w1, w2
-	blt	.L3752
-.L3837:
+	blt	.L3784
+.L3869:
 	ldr	x0, [x0, w2, sxtw 3]
 	mov	w1, -1
 	strb	w1, [x0]
 	mul	w1, w21, w19
 	ldr	x0, [x29, 176]
 	bl	sblk_prog_page
-	b	.L3753
-.L3713:
-	adrp	x1, .LANCHOR81
-	ldrb	w1, [x1, #:lo12:.LANCHOR81]
-	cbnz	w1, .L3720
-	adrp	x1, .LANCHOR71
-	add	x1, x1, :lo12:.LANCHOR71
+	b	.L3785
+.L3745:
+	adrp	x1, .LANCHOR80
+	ldrb	w1, [x1, #:lo12:.LANCHOR80]
+	cbnz	w1, .L3752
+	adrp	x1, .LANCHOR70
+	add	x1, x1, :lo12:.LANCHOR70
 	mov	w19, 1
 	ldrh	w22, [x1, 2106]
 	sdiv	w25, w22, w0
 	msub	w20, w20, w25, w22
 	and	w20, w20, 65535
-	b	.L3717
-.L3720:
-	adrp	x1, .LANCHOR71
-	add	x1, x1, :lo12:.LANCHOR71
+	b	.L3749
+.L3752:
+	adrp	x1, .LANCHOR70
+	add	x1, x1, :lo12:.LANCHOR70
 	mov	w19, 2
 	ldrh	w22, [x1, 2106]
 	sdiv	w25, w22, w0
 	msub	w20, w20, w25, w22
 	and	w20, w20, 65535
-	b	.L3717
-.L3723:
-	tbz	x2, 0, .L3774
-.L3722:
+	b	.L3749
+.L3755:
+	tbz	x2, 0, .L3806
+.L3754:
 	sbfiz	x4, x4, 2, 32
 	ldr	w0, [x8, x4]
 	cmn	w0, #1
-	bne	.L3725
+	bne	.L3757
 	ldrh	w7, [x6, 26]
 	cmp	w7, w14
-	bcs	.L3701
-	cbz	w12, .L3726
+	bcs	.L3733
+	cbz	w12, .L3758
 	ldrh	w0, [x10, x13, lsl 1]
 	cmp	w0, w25
-	bcs	.L3726
-	tbz	x2, 0, .L3726
+	bcs	.L3758
+	tbz	x2, 0, .L3758
 	ubfiz	x0, x0, 2, 16
 	ldr	w0, [x8, x0]
-.L3834:
+.L3866:
 	str	w0, [x8, x4]
-.L3725:
+.L3757:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-	b	.L3721
-.L3726:
+	b	.L3753
+.L3758:
 	mov	w0, w7
 	bl	gc_get_src_ppa_from_index
 	add	w7, w7, 1
 	strh	w7, [x6, 26]
-	b	.L3834
-.L3748:
+	b	.L3866
+.L3780:
 	ldr	w0, [x29, 168]
 	add	w0, w22, w0
 	str	w0, [x29, 172]
 	sxtw	x0, w0
 	str	x0, [x29, 160]
-	adrp	x0, .LANCHOR83
+	adrp	x0, .LANCHOR82
 	ldr	x1, [x29, 160]
-	ldr	x0, [x0, #:lo12:.LANCHOR83]
+	ldr	x0, [x0, #:lo12:.LANCHOR82]
 	ldrb	w0, [x0, x1]
 	cmp	w0, 255
-	bne	.L3728
+	bne	.L3760
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x27, x0
-	cbnz	x0, .L3729
+	cbnz	x0, .L3761
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	bl	gc_write_completed
@@ -23809,51 +24423,51 @@ gc_do_copy_back:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x27, x0
-	cbz	x0, .L3701
-.L3729:
-	adrp	x0, .LANCHOR83
+	cbz	x0, .L3733
+.L3761:
+	adrp	x0, .LANCHOR82
 	ldr	x2, [x29, 160]
 	ldrb	w1, [x27, 1]
-	ldr	x0, [x0, #:lo12:.LANCHOR83]
+	ldr	x0, [x0, #:lo12:.LANCHOR82]
 	strb	w1, [x0, x2]
-	adrp	x0, .LANCHOR71
-	add	x1, x0, :lo12:.LANCHOR71
+	adrp	x0, .LANCHOR70
+	add	x1, x0, :lo12:.LANCHOR70
 	strb	w23, [x27, 61]
 	ldrb	w0, [x1, 7]
 	add	w0, w0, 1
 	strb	w0, [x1, 7]
 	add	w0, w24, w22
 	strh	w0, [x27, 48]
-	adrp	x0, .LANCHOR86
+	adrp	x0, .LANCHOR85
 	ldr	w1, [x29, 172]
-	ldrh	w6, [x0, #:lo12:.LANCHOR86]
+	ldrh	w6, [x0, #:lo12:.LANCHOR85]
 	adrp	x0, .LANCHOR224
 	ldrb	w5, [x0, #:lo12:.LANCHOR224]
 	ldrb	w0, [x26, 9]
 	mul	w0, w0, w6
 	sub	w0, w0, w5
 	cmp	w1, w0
-	blt	.L3730
+	blt	.L3762
 	adrp	x1, .LANCHOR124
 	ldrb	w1, [x1, #:lo12:.LANCHOR124]
-	cbz	w1, .L3731
+	cbz	w1, .L3763
 	adrp	x1, .LANCHOR235
 	add	x1, x1, :lo12:.LANCHOR235
 	ldrh	w1, [x1, w25, sxtw 1]
 	cmp	w1, w25
-	bcs	.L3731
-	tbnz	x24, 0, .L3730
-.L3731:
-	adrp	x1, .LANCHOR162
+	bcs	.L3763
+	tbnz	x24, 0, .L3762
+.L3763:
+	adrp	x1, .LANCHOR159
 	ldr	w3, [x29, 172]
 	mov	w2, -1
 	cmp	w5, 2
-	ldr	x1, [x1, #:lo12:.LANCHOR162]
+	ldr	x1, [x1, #:lo12:.LANCHOR159]
 	str	w2, [x1, w3, sxtw 2]
-	bne	.L3732
+	bne	.L3764
 	cmp	w3, w0
 	adrp	x28, .LANCHOR221
-	bne	.L3733
+	bne	.L3765
 	ldrh	w2, [x28, #:lo12:.LANCHOR221]
 	ldr	x0, [x27, 8]
 	bl	ftl_memcpy
@@ -23872,21 +24486,21 @@ gc_do_copy_back:
 	bl	js_hash
 	str	w0, [x6, 4]
 	ldr	x0, [x29, 144]
-	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	ldr	x0, [x0, #:lo12:.LANCHOR12]
 	ldr	w0, [x0, 132]
 	stp	w0, wzr, [x6, 8]
-.L3734:
+.L3766:
 	ldr	x0, [x27, 24]
 	str	wzr, [x0, 16]
-.L3728:
-	adrp	x0, .LANCHOR83
+.L3760:
+	adrp	x0, .LANCHOR82
 	ldrsw	x2, [x29, 168]
 	add	x4, x29, 176
-	ldr	x1, [x0, #:lo12:.LANCHOR83]
+	ldr	x1, [x0, #:lo12:.LANCHOR82]
 	ldr	x0, [x29, 160]
 	ldrb	w5, [x1, x0]
-	adrp	x0, .LANCHOR56
-	add	x6, x0, :lo12:.LANCHOR56
+	adrp	x0, .LANCHOR55
+	add	x6, x0, :lo12:.LANCHOR55
 	mov	x7, x5
 	ubfiz	x0, x5, 6, 8
 	add	x0, x6, x0
@@ -23896,27 +24510,27 @@ gc_do_copy_back:
 	strh	w0, [x6, 50]
 	ldr	x0, [x29, 120]
 	strb	w23, [x6, 61]
-	ldrb	w0, [x0, #:lo12:.LANCHOR79]
+	ldrb	w0, [x0, #:lo12:.LANCHOR78]
 	cmp	w0, 3
-	bne	.L3739
-	adrp	x8, .LANCHOR36
-	ldrb	w8, [x8, #:lo12:.LANCHOR36]
-	cbz	w8, .L3740
+	bne	.L3771
+	adrp	x8, .LANCHOR35
+	ldrb	w8, [x8, #:lo12:.LANCHOR35]
+	cbz	w8, .L3772
 	adrp	x0, .LANCHOR124
 	and	w8, w24, 1
 	add	w10, w8, w25
 	ldrb	w0, [x0, #:lo12:.LANCHOR124]
-	cbz	w0, .L3741
+	cbz	w0, .L3773
 	adrp	x6, .LANCHOR235
 	add	x6, x6, :lo12:.LANCHOR235
 	ldrh	w6, [x6, w25, sxtw 1]
 	cmp	w6, w25
-	bcs	.L3741
+	bcs	.L3773
 	cmp	w8, 0
 	csel	w10, w10, w6, eq
-.L3741:
-	adrp	x0, .LANCHOR56
-	add	x6, x0, :lo12:.LANCHOR56
+.L3773:
+	adrp	x0, .LANCHOR55
+	add	x6, x0, :lo12:.LANCHOR55
 	add	x5, x6, x5, lsl 6
 	udiv	w6, w24, w19
 	add	w6, w6, w20
@@ -23927,21 +24541,21 @@ gc_do_copy_back:
 	madd	w0, w0, w6, w10
 	orr	w0, w0, 50331648
 	str	w0, [x5, 40]
-.L3746:
-	adrp	x0, .LANCHOR56
+.L3778:
+	adrp	x0, .LANCHOR55
 	sbfiz	x7, x7, 6, 32
-	add	x0, x0, :lo12:.LANCHOR56
+	add	x0, x0, :lo12:.LANCHOR55
 	add	x0, x0, x7
 	ldrh	w5, [x0, 48]
 	ldr	w6, [x0, 40]
-	adrp	x0, .LANCHOR164
-	ldr	x0, [x0, #:lo12:.LANCHOR164]
+	adrp	x0, .LANCHOR161
+	ldr	x0, [x0, #:lo12:.LANCHOR161]
 	str	w6, [x0, x5, lsl 2]
-	b	.L3765
-.L3733:
+	b	.L3797
+.L3765:
 	ldr	x2, [x29, 136]
 	ldrh	w0, [x28, #:lo12:.LANCHOR221]
-	ldrb	w28, [x2, #:lo12:.LANCHOR80]
+	ldrb	w28, [x2, #:lo12:.LANCHOR79]
 	mul	w28, w28, w6
 	lsl	w28, w28, 2
 	sub	w28, w28, w0
@@ -23965,36 +24579,36 @@ gc_do_copy_back:
 	bl	js_hash
 	str	w0, [x6, 4]
 	ldr	x0, [x29, 144]
-	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	ldr	x0, [x0, #:lo12:.LANCHOR12]
 	ldr	w0, [x0, 132]
 	str	w0, [x6, 8]
 	mov	w0, 1
 	str	w0, [x6, 12]
-	b	.L3734
-.L3732:
+	b	.L3766
+.L3764:
 	ldr	x0, [x29, 136]
-	ldrb	w2, [x0, #:lo12:.LANCHOR80]
+	ldrb	w2, [x0, #:lo12:.LANCHOR79]
 	ldr	x0, [x27, 8]
 	mul	w2, w2, w6
 	lsl	w2, w2, 2
 	bl	ftl_memcpy
 	ldr	x1, [x29, 136]
-	adrp	x0, .LANCHOR86
-	ldrh	w0, [x0, #:lo12:.LANCHOR86]
-	ldrb	w1, [x1, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR85
+	ldrh	w0, [x0, #:lo12:.LANCHOR85]
+	ldrb	w1, [x1, #:lo12:.LANCHOR79]
 	mul	w0, w0, w1
 	adrp	x1, .LANCHOR131
 	ldrb	w1, [x1, #:lo12:.LANCHOR131]
 	lsl	w2, w0, 2
 	cmp	w1, w0, lsr 6
-	bge	.L3735
+	bge	.L3767
 	adrp	x1, .LANCHOR221
 	ldrh	w1, [x1, #:lo12:.LANCHOR221]
 	sub	w2, w1, w2
-.L3735:
-	adrp	x1, .LANCHOR163
+.L3767:
+	adrp	x1, .LANCHOR160
 	ldr	x5, [x27, 8]
-	ldr	x1, [x1, #:lo12:.LANCHOR163]
+	ldr	x1, [x1, #:lo12:.LANCHOR160]
 	add	x0, x5, x0, sxtw 2
 	bl	ftl_memcpy
 	adrp	x0, .LANCHOR131
@@ -24007,26 +24621,26 @@ gc_do_copy_back:
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	str	w0, [x6]
-	adrp	x0, .LANCHOR86
-	ldrh	w1, [x0, #:lo12:.LANCHOR86]
+	adrp	x0, .LANCHOR85
+	ldrh	w1, [x0, #:lo12:.LANCHOR85]
 	ldr	x0, [x29, 136]
-	ldrb	w0, [x0, #:lo12:.LANCHOR80]
+	ldrb	w0, [x0, #:lo12:.LANCHOR79]
 	mul	w1, w1, w0
 	ldr	x0, [x27, 8]
 	lsl	w1, w1, 2
 	bl	js_hash
 	str	w0, [x6, 4]
 	ldr	x0, [x29, 144]
-	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	ldr	x0, [x0, #:lo12:.LANCHOR12]
 	ldr	w0, [x0, 132]
 	str	w0, [x6, 8]
-	b	.L3734
-.L3730:
+	b	.L3766
+.L3762:
 	ldr	x0, [x29, 160]
 	mov	w1, 1
 	lsl	x28, x0, 2
-	adrp	x0, .LANCHOR163
-	ldr	x0, [x0, #:lo12:.LANCHOR163]
+	adrp	x0, .LANCHOR160
+	ldr	x0, [x0, #:lo12:.LANCHOR160]
 	ldr	w0, [x0, x28]
 	str	w0, [x27, 40]
 	mov	x0, x27
@@ -24034,11 +24648,11 @@ gc_do_copy_back:
 	ldr	w0, [x27, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3737
-	adrp	x0, .LANCHOR75
-	ldrh	w2, [x0, #:lo12:.LANCHOR75]
-	adrp	x0, .LANCHOR32
-	ldrb	w1, [x0, #:lo12:.LANCHOR32]
+	bne	.L3769
+	adrp	x0, .LANCHOR74
+	ldrh	w2, [x0, #:lo12:.LANCHOR74]
+	adrp	x0, .LANCHOR31
+	ldrb	w1, [x0, #:lo12:.LANCHOR31]
 	mov	w0, 24
 	sub	w0, w0, w1
 	sub	w1, w0, w2
@@ -24048,50 +24662,50 @@ gc_do_copy_back:
 	sub	w0, w0, #1
 	lsr	w1, w1, w2
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR76
-	ldrb	w2, [x1, #:lo12:.LANCHOR76]
+	adrp	x1, .LANCHOR75
+	ldrb	w2, [x1, #:lo12:.LANCHOR75]
 	mov	x1, 0
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
 	ldr	w0, [x27, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3737
+	bne	.L3769
 	ldr	x0, [x27, 24]
 	mov	w1, -1
 	str	w1, [x0, 4]
 	ldr	w0, [x27, 52]
 	cmp	w0, 512
 	ccmp	w0, w1, 4, ne
-	bne	.L3737
+	bne	.L3769
 	adrp	x1, .LANCHOR234
 	adrp	x0, .LC0
 	mov	w2, 1223
 	add	x1, x1, :lo12:.LANCHOR234
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3737:
+.L3769:
 	ldr	x0, [x27, 24]
 	adrp	x1, .LANCHOR128
 	ldr	w1, [x1, #:lo12:.LANCHOR128]
 	ldr	w2, [x0, 4]
 	cmp	w2, w1
-	bcc	.L3738
+	bcc	.L3770
 	mov	w1, -1
 	str	w1, [x0, 4]
-.L3738:
-	adrp	x1, .LANCHOR162
+.L3770:
+	adrp	x1, .LANCHOR159
 	ldr	w2, [x0, 4]
-	ldr	x1, [x1, #:lo12:.LANCHOR162]
+	ldr	x1, [x1, #:lo12:.LANCHOR159]
 	str	w2, [x1, x28]
 	ldr	w1, [x27, 40]
 	str	w1, [x0, 8]
-	b	.L3734
-.L3740:
+	b	.L3766
+.L3772:
 	udiv	w0, w24, w0
-	adrp	x7, .LANCHOR37
-	ldrb	w7, [x7, #:lo12:.LANCHOR37]
-	cbz	w7, .L3743
+	adrp	x7, .LANCHOR36
+	ldrb	w7, [x7, #:lo12:.LANCHOR36]
+	cbz	w7, .L3775
 	add	w7, w0, w20
 	adrp	x8, .LANCHOR111
 	add	x7, x26, x7, sxtw 1
@@ -24101,12 +24715,12 @@ gc_do_copy_back:
 	ldrh	w7, [x7, 16]
 	madd	w7, w7, w8, w25
 	add	w0, w7, w0, uxth
-.L3838:
+.L3870:
 	str	w0, [x6, 40]
 	ldr	x0, [x29, 104]
 	add	x5, x0, x5, lsl 6
-	adrp	x0, .LANCHOR164
-	ldr	x6, [x0, #:lo12:.LANCHOR164]
+	adrp	x0, .LANCHOR161
+	ldr	x6, [x0, #:lo12:.LANCHOR161]
 	mov	w0, 3
 	ldrh	w7, [x5, 48]
 	udiv	w0, w24, w0
@@ -24117,16 +24731,16 @@ gc_do_copy_back:
 	add	w0, w0, 1
 	orr	w0, w5, w0, lsl 24
 	str	w0, [x6, x7, lsl 2]
-.L3765:
+.L3797:
 	adrp	x0, .LANCHOR124
 	ldrb	w0, [x0, #:lo12:.LANCHOR124]
-	cbz	w0, .L3747
+	cbz	w0, .L3779
 	adrp	x0, .LANCHOR235
 	add	x0, x0, :lo12:.LANCHOR235
 	ldrh	w0, [x0, w25, sxtw 1]
 	cmp	w0, w25
-	bcs	.L3747
-	tbz	x24, 0, .L3747
+	bcs	.L3779
+	tbz	x24, 0, .L3779
 	ldr	x3, [x29, 160]
 	mov	w0, -1
 	strb	w0, [x1, x3]
@@ -24135,45 +24749,45 @@ gc_do_copy_back:
 	ldr	x2, [x29, 112]
 	strh	w1, [x0, 48]
 	ldrb	w1, [x0, 1]
-	adrp	x0, .LANCHOR83
-	ldr	x0, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR82
+	ldr	x0, [x0, #:lo12:.LANCHOR82]
 	strb	w1, [x0, x2]
-	adrp	x0, .LANCHOR163
+	adrp	x0, .LANCHOR160
 	ldr	w2, [x29, 172]
 	mov	w1, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR163]
+	ldr	x0, [x0, #:lo12:.LANCHOR160]
 	str	w1, [x0, w2, sxtw 2]
-.L3747:
+.L3779:
 	ldr	w0, [x29, 152]
 	add	w0, w0, 1
 	str	w0, [x29, 152]
-	b	.L3724
-.L3743:
+	b	.L3756
+.L3775:
 	add	w0, w0, w20
 	adrp	x7, .LANCHOR111
 	add	x0, x26, x0, sxtw 1
 	ldrh	w7, [x7, #:lo12:.LANCHOR111]
 	ldrh	w0, [x0, 16]
 	madd	w0, w0, w7, w25
-	b	.L3838
-.L3739:
+	b	.L3870
+.L3771:
 	cmp	w0, 2
-	bne	.L3746
-	adrp	x0, .LANCHOR81
+	bne	.L3778
+	adrp	x0, .LANCHOR80
 	adrp	x5, .LANCHOR111
-	ldrb	w0, [x0, #:lo12:.LANCHOR81]
-	cbnz	w0, .L3745
+	ldrb	w0, [x0, #:lo12:.LANCHOR80]
+	cbnz	w0, .L3777
 	ldr	w0, [x29, 168]
 	ldrh	w5, [x5, #:lo12:.LANCHOR111]
 	add	w27, w20, w0
 	add	x27, x26, x27, sxtw 1
 	ldrh	w0, [x27, 16]
 	madd	w0, w0, w5, w25
-.L3835:
+.L3867:
 	orr	w0, w0, 33554432
 	str	w0, [x6, 40]
-	b	.L3746
-.L3745:
+	b	.L3778
+.L3777:
 	add	w0, w20, w24, lsr 1
 	ldrh	w5, [x5, #:lo12:.LANCHOR111]
 	add	x0, x26, x0, sxtw 1
@@ -24181,118 +24795,118 @@ gc_do_copy_back:
 	madd	w0, w0, w5, w25
 	and	w5, w24, 1
 	add	w0, w0, w5
-	b	.L3835
-.L3752:
+	b	.L3867
+.L3784:
 	ldr	x4, [x0, w1, sxtw 3]
 	add	w1, w1, 1
 	ldr	x5, [x0, w1, sxtw 3]
 	and	w1, w1, 65535
 	ldrb	w5, [x5, 1]
 	strb	w5, [x4]
-	b	.L3751
-.L3750:
-	adrp	x1, .LANCHOR84
-	ldrb	w2, [x1, #:lo12:.LANCHOR84]
+	b	.L3783
+.L3782:
+	adrp	x1, .LANCHOR83
+	ldrb	w2, [x1, #:lo12:.LANCHOR83]
 	ldr	x1, [x29, 176]
-	cbz	w2, .L3754
-.L3757:
+	cbz	w2, .L3786
+.L3789:
 	strb	wzr, [x1, 60]
-	b	.L3756
-.L3754:
+	b	.L3788
+.L3786:
 	cmp	w23, 1
-	bne	.L3755
+	bne	.L3787
 	mov	w2, 9
-.L3836:
+.L3868:
 	strb	w2, [x1, 60]
-.L3756:
+.L3788:
 	mov	w2, w21
 	add	x1, x0, 24
 	bl	sblk_xlc_prog_pages
-.L3753:
-	adrp	x0, .LANCHOR84
-	ldrb	w0, [x0, #:lo12:.LANCHOR84]
-	cbz	w0, .L3762
+.L3785:
+	adrp	x0, .LANCHOR83
+	ldrb	w0, [x0, #:lo12:.LANCHOR83]
+	cbz	w0, .L3794
 	add	w21, w21, w21, lsl 1
 	and	w21, w21, 65535
-.L3763:
+.L3795:
 	adrp	x0, .LANCHOR110
 	ldr	x1, [x0, #:lo12:.LANCHOR110]
 	ldr	w0, [x1, 52]
 	add	w0, w0, w21
 	str	w0, [x1, 52]
-	adrp	x0, .LANCHOR71
-	add	x25, x0, :lo12:.LANCHOR71
+	adrp	x0, .LANCHOR70
+	add	x25, x0, :lo12:.LANCHOR70
 	ldrh	w0, [x25, 2106]
 	add	w21, w21, w0
-	adrp	x0, .LANCHOR86
+	adrp	x0, .LANCHOR85
 	and	w21, w21, 65535
 	strh	w21, [x25, 2106]
-	ldrh	w0, [x0, #:lo12:.LANCHOR86]
+	ldrh	w0, [x0, #:lo12:.LANCHOR85]
 	ldrb	w1, [x26, 9]
 	mul	w0, w0, w1
 	cmp	w21, w0
-	blt	.L3764
+	blt	.L3796
 	ldr	x0, [x29, 144]
-	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	ldr	x0, [x0, #:lo12:.LANCHOR12]
 	strh	wzr, [x0, 86]
-.L3764:
+.L3796:
 	bl	gc_write_completed
-	b	.L3701
-.L3755:
+	b	.L3733
+.L3787:
 	cmp	w23, 2
-	bne	.L3757
+	bne	.L3789
 	mov	w2, 13
-	b	.L3836
-.L3749:
+	b	.L3868
+.L3781:
+	adrp	x1, .LANCHOR80
+	ldrb	w1, [x1, #:lo12:.LANCHOR80]
+	cbz	w1, .L3807
 	adrp	x1, .LANCHOR81
 	ldrb	w1, [x1, #:lo12:.LANCHOR81]
-	cbz	w1, .L3775
-	adrp	x1, .LANCHOR82
-	ldrb	w1, [x1, #:lo12:.LANCHOR82]
-	cbnz	w1, .L3759
-.L3758:
+	cbnz	w1, .L3791
+.L3790:
 	ldr	w2, [x29, 156]
 	sub	w2, w2, #1
-.L3760:
+.L3792:
 	cmp	w1, w2
-	bge	.L3837
+	bge	.L3869
 	ldr	x4, [x0, w1, sxtw 3]
 	add	w1, w1, 1
 	ldr	x5, [x0, w1, sxtw 3]
 	and	w1, w1, 65535
 	ldrb	w5, [x5, 1]
 	strb	w5, [x4]
-	b	.L3760
-.L3775:
+	b	.L3792
+.L3807:
 	mov	w1, 0
-	b	.L3758
-.L3759:
+	b	.L3790
+.L3791:
 	mov	w1, w21
 	bl	sblk_3d_mlc_prog_pages
-	b	.L3753
-.L3762:
-	adrp	x0, .LANCHOR81
-	ldrb	w0, [x0, #:lo12:.LANCHOR81]
-	cbnz	w0, .L3776
-	adrp	x0, .LANCHOR36
-	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbz	w0, .L3763
+	b	.L3785
+.L3794:
+	adrp	x0, .LANCHOR80
+	ldrb	w0, [x0, #:lo12:.LANCHOR80]
+	cbnz	w0, .L3808
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbz	w0, .L3795
 	adrp	x0, .LANCHOR124
 	ldrh	w1, [x29, 156]
 	ldrb	w0, [x0, #:lo12:.LANCHOR124]
-	cbz	w0, .L3777
+	cbz	w0, .L3809
 	adrp	x0, .LANCHOR235
 	add	x0, x0, :lo12:.LANCHOR235
 	ldrh	w0, [x0, w25, sxtw 1]
 	cmp	w0, w25
 	csel	w21, w21, w1, cc
-	b	.L3763
-.L3776:
+	b	.L3795
+.L3808:
 	ldr	w21, [x29, 132]
-	b	.L3763
-.L3777:
+	b	.L3795
+.L3809:
 	mov	w21, w1
-	b	.L3763
+	b	.L3795
 	.size	gc_do_copy_back, .-gc_do_copy_back
 	.section	.text.zftl_do_gc,"ax",@progbits
 	.align	2
@@ -24303,601 +24917,624 @@ zftl_do_gc:
 	adrp	x1, .LANCHOR107
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
-	stp	x23, x24, [sp, 64]
-	adrp	x24, .LANCHOR103
-	stp	x19, x20, [sp, 32]
-	adrp	x19, .LANCHOR159
+	ldrh	w1, [x1, #:lo12:.LANCHOR107]
 	stp	x21, x22, [sp, 48]
-	adrp	x23, .LANCHOR10
-	ldrh	w22, [x1, #:lo12:.LANCHOR107]
+	adrp	x22, .LANCHOR103
+	stp	x19, x20, [sp, 32]
+	adrp	x20, .LANCHOR156
+	stp	x23, x24, [sp, 64]
+	adrp	x23, .LANCHOR12
 	stp	x25, x26, [sp, 80]
-	ldrh	w21, [x24, #:lo12:.LANCHOR103]
-	ldrb	w1, [x19, #:lo12:.LANCHOR159]
+	ldrh	w21, [x22, #:lo12:.LANCHOR103]
+	ldrb	w2, [x20, #:lo12:.LANCHOR156]
 	stp	x27, x28, [sp, 96]
-	add	w21, w22, w21
-	ldr	x26, [x23, #:lo12:.LANCHOR10]
-	cmp	w1, 6
-	bhi	.L3954
+	add	w21, w1, w21
+	ldr	x26, [x23, #:lo12:.LANCHOR12]
+	cmp	w2, 6
+	bhi	.L3988
 	mov	w25, w0
 	and	w21, w21, 65535
-	adrp	x0, .L3842
-	add	x0, x0, :lo12:.L3842
-	ldrh	w0, [x0,w1,uxtw #1]
-	adr	x1, .Lrtx3842
-	add	x0, x1, w0, sxth #2
+	adrp	x0, .L3874
+	add	x0, x0, :lo12:.L3874
+	ldrh	w0, [x0,w2,uxtw #1]
+	adr	x2, .Lrtx3874
+	add	x0, x2, w0, sxth #2
 	br	x0
-.Lrtx3842:
+.Lrtx3874:
 	.section	.rodata.zftl_do_gc,"a",@progbits
 	.align	0
 	.align	2
-.L3842:
-	.2byte	(.L3841 - .Lrtx3842) / 4
-	.2byte	(.L3843 - .Lrtx3842) / 4
-	.2byte	(.L3844 - .Lrtx3842) / 4
-	.2byte	(.L3845 - .Lrtx3842) / 4
-	.2byte	(.L3846 - .Lrtx3842) / 4
-	.2byte	(.L3847 - .Lrtx3842) / 4
-	.2byte	(.L3848 - .Lrtx3842) / 4
+.L3874:
+	.2byte	(.L3873 - .Lrtx3874) / 4
+	.2byte	(.L3875 - .Lrtx3874) / 4
+	.2byte	(.L3876 - .Lrtx3874) / 4
+	.2byte	(.L3877 - .Lrtx3874) / 4
+	.2byte	(.L3878 - .Lrtx3874) / 4
+	.2byte	(.L3879 - .Lrtx3874) / 4
+	.2byte	(.L3880 - .Lrtx3874) / 4
 	.section	.text.zftl_do_gc
-.L3847:
-	adrp	x20, .LANCHOR71
-	add	x24, x20, :lo12:.LANCHOR71
+.L3879:
+	adrp	x19, .LANCHOR70
+	add	x24, x19, :lo12:.LANCHOR70
 	mov	w22, 0
-.L3849:
+.L3881:
 	bl	gc_check_data_one_wl
-	cbz	w0, .L3950
-	ldr	x0, [x23, #:lo12:.LANCHOR10]
-	add	x20, x20, :lo12:.LANCHOR71
-	strh	wzr, [x20, 56]
+	cbz	w0, .L3984
+	ldr	x0, [x23, #:lo12:.LANCHOR12]
+	add	x19, x19, :lo12:.LANCHOR70
+	strh	wzr, [x19, 56]
 	ldrh	w0, [x0, 80]
 	bl	ftl_free_sblk
 	adrp	x2, .LANCHOR110
-	ldr	x1, [x23, #:lo12:.LANCHOR10]
+	ldr	x1, [x23, #:lo12:.LANCHOR12]
 	mov	w0, -1
 	ldr	x2, [x2, #:lo12:.LANCHOR110]
 	strh	w0, [x1, 80]
 	strh	w0, [x2, 126]
 	strh	w0, [x1, 130]
-	ldr	x0, [x20, 8]
+	ldr	x0, [x19, 8]
 	bl	zbuf_free
-	strb	wzr, [x19, #:lo12:.LANCHOR159]
-	str	xzr, [x20, 8]
-	b	.L4034
-.L3841:
+	strb	wzr, [x20, #:lo12:.LANCHOR156]
+	str	xzr, [x19, 8]
+	b	.L4074
+.L3873:
 	adrp	x0, .LANCHOR105
 	adrp	x27, .LANCHOR97
-	ldrh	w2, [x26, 80]
-	ldrh	w0, [x0, #:lo12:.LANCHOR105]
-	ldrh	w24, [x27, #:lo12:.LANCHOR97]
-	add	w22, w22, w0
+	ldrh	w3, [x26, 80]
+	ldrh	w22, [x0, #:lo12:.LANCHOR105]
 	adrp	x0, .LANCHOR99
+	ldrh	w24, [x27, #:lo12:.LANCHOR97]
+	ldrh	w2, [x0, #:lo12:.LANCHOR99]
+	add	w22, w1, w22
 	stp	x0, x27, [x29, 112]
 	and	w22, w22, 65535
-	ldrh	w1, [x0, #:lo12:.LANCHOR99]
-	add	w24, w24, w1
-	mov	w1, 65535
+	add	w24, w24, w2
+	mov	w2, 65535
 	and	w24, w24, 65535
-	cmp	w2, w1
-	beq	.L3850
-	cbnz	w25, .L3851
-	adrp	x0, .LANCHOR87
-	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	cmp	w3, w2
+	beq	.L3882
+	cbnz	w25, .L3883
+	adrp	x0, .LANCHOR86
+	ldrh	w0, [x0, #:lo12:.LANCHOR86]
 	cmp	w21, w0, lsl 1
-	blt	.L3851
-.L3954:
-	mov	w20, 16
-	b	.L3839
-.L3851:
+	blt	.L3883
+.L3988:
+	mov	w19, 16
+	b	.L3871
+.L3883:
 	adrp	x5, .LANCHOR96
-	mov	w1, 5
-	adrp	x25, .LANCHOR85
-	ldrh	w0, [x5, #:lo12:.LANCHOR96]
-	add	w0, w0, 1
-	and	w0, w0, 65535
-	strh	w0, [x5, #:lo12:.LANCHOR96]
-	bl	zftl_get_gc_node
+	adrp	x0, .LANCHOR92
+	add	x0, x0, :lo12:.LANCHOR92
+	adrp	x25, .LANCHOR84
+	ldrh	w1, [x5, #:lo12:.LANCHOR96]
+	add	w1, w1, 1
+	and	w1, w1, 65535
+	strh	w1, [x5, #:lo12:.LANCHOR96]
+	bl	_list_get_gc_head_node
 	and	w3, w0, 65535
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L3852
-	adrp	x4, .LANCHOR9
+	beq	.L3884
+	adrp	x4, .LANCHOR11
 	ubfiz	x3, x3, 1, 16
-	adrp	x1, .LANCHOR160
-	mov	x20, x1
-	ldr	x4, [x4, #:lo12:.LANCHOR9]
-	ldr	w2, [x1, #:lo12:.LANCHOR160]
+	adrp	x1, .LANCHOR157
+	mov	x19, x1
+	ldr	x4, [x4, #:lo12:.LANCHOR11]
+	ldr	w2, [x1, #:lo12:.LANCHOR157]
 	add	w2, w2, 1
-	str	w2, [x1, #:lo12:.LANCHOR160]
+	str	w2, [x1, #:lo12:.LANCHOR157]
 	ldrh	w3, [x4, x3]
-	adrp	x4, .LANCHOR95
-	ldrh	w4, [x4, #:lo12:.LANCHOR95]
+	adrp	x4, .LANCHOR94
+	ldrh	w4, [x4, #:lo12:.LANCHOR94]
 	cmp	w4, w3
-	bcs	.L3853
-	adrp	x1, .LANCHOR6
-	ldrh	w1, [x1, #:lo12:.LANCHOR6]
+	bcs	.L3885
+	adrp	x1, .LANCHOR8
+	ldrh	w1, [x1, #:lo12:.LANCHOR8]
 	cmp	w2, w1, lsr 4
-	bls	.L3852
+	bls	.L3884
 	adrp	x1, .LANCHOR100
 	ldrh	w1, [x1, #:lo12:.LANCHOR100]
 	cmp	w1, w3
-	bls	.L3852
-.L3853:
-	ldrb	w2, [x25, #:lo12:.LANCHOR85]
+	bls	.L3884
+.L3885:
+	ldrb	w2, [x25, #:lo12:.LANCHOR84]
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L3854
+	cbz	w0, .L3886
 	mov	w0, 1
-	str	wzr, [x20, #:lo12:.LANCHOR160]
-	strb	w0, [x19, #:lo12:.LANCHOR159]
-	b	.L3954
-.L3852:
+	str	wzr, [x19, #:lo12:.LANCHOR157]
+	strb	w0, [x20, #:lo12:.LANCHOR156]
+	b	.L3988
+.L3884:
 	strh	wzr, [x5, #:lo12:.LANCHOR96]
-.L3854:
+.L3886:
 	cmp	w22, 15
-	bls	.L3956
-	adrp	x0, .LANCHOR93
-	ldrh	w1, [x0, #:lo12:.LANCHOR93]
+	bls	.L3990
+	adrp	x0, .LANCHOR91
+	ldrh	w1, [x0, #:lo12:.LANCHOR91]
 	adrp	x0, .LANCHOR101
 	ldrh	w0, [x0, #:lo12:.LANCHOR101]
 	cmp	w1, w0
-	bhi	.L3956
+	bhi	.L3990
 	cmp	w24, 0
-	cset	w20, eq
-	add	w20, w20, 1
-.L3855:
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3856
-	ldr	x0, [x23, #:lo12:.LANCHOR10]
+	cset	w19, eq
+	add	w19, w19, 1
+.L3887:
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 8, .L3888
+	ldr	x0, [x23, #:lo12:.LANCHOR12]
 	mov	w4, w22
-	ldrb	w2, [x25, #:lo12:.LANCHOR85]
+	ldrb	w2, [x25, #:lo12:.LANCHOR84]
 	mov	w3, w21
-	mov	w1, 2662
+	mov	w1, 2807
 	ldrh	w7, [x0, 122]
 	ldrh	w6, [x0, 120]
 	ldrh	w5, [x0, 124]
 	ldrh	w0, [x26, 80]
 	str	w0, [sp]
-	adrp	x0, .LC236
-	add	x0, x0, :lo12:.LC236
+	adrp	x0, .LC239
+	add	x0, x0, :lo12:.LC239
 	bl	printf
-.L3856:
-	ldrb	w0, [x25, #:lo12:.LANCHOR85]
+.L3888:
+	ldrb	w0, [x25, #:lo12:.LANCHOR84]
 	mov	w2, 1
-	mov	w1, w20
+	mov	w1, w19
 	bl	gc_search_src_blk
 	cmp	w0, 0
-	ble	.L3857
-.L3858:
+	ble	.L3889
+.L3890:
 	mov	w0, 1
-.L4036:
-	strb	w0, [x19, #:lo12:.LANCHOR159]
-	b	.L3954
-.L3956:
-	mov	w20, 2
-	b	.L3855
-.L3857:
-	ldrb	w0, [x25, #:lo12:.LANCHOR85]
+.L4076:
+	strb	w0, [x20, #:lo12:.LANCHOR156]
+	b	.L3988
+.L3990:
+	mov	w19, 2
+	b	.L3887
+.L3889:
+	ldrb	w0, [x25, #:lo12:.LANCHOR84]
 	mov	w2, 1
 	mov	w1, 3
 	bl	gc_search_src_blk
 	cmp	w0, 0
-	bgt	.L3858
-	b	.L3954
-.L3850:
+	bgt	.L3890
+	b	.L3988
+.L3882:
 	cmp	w25, 1
-	bne	.L3860
+	bne	.L3892
+	adrp	x0, .LANCHOR110
+	ldr	x0, [x0, #:lo12:.LANCHOR110]
+	ldrh	w0, [x0, 150]
+	cbz	w0, .L3893
+	cmp	w1, 8
+	bls	.L3893
+	bl	gc_ink_check_sblk
+.L3893:
 	bl	gc_scan_static_data
-	adrp	x26, .LANCHOR85
-	ldr	x0, [x23, #:lo12:.LANCHOR10]
+	adrp	x26, .LANCHOR84
+	ldr	x0, [x23, #:lo12:.LANCHOR12]
 	ldrh	w0, [x0, 122]
-	cbz	w0, .L3861
-.L3862:
+	cbz	w0, .L3894
+.L3895:
 	mov	w0, 1
-	strb	w0, [x26, #:lo12:.LANCHOR85]
-	b	.L4036
-.L3861:
+	strb	w0, [x26, #:lo12:.LANCHOR84]
+	b	.L4076
+.L3894:
 	bl	gc_static_wearleveling
-	mov	w20, w0
-	cbnz	w0, .L3862
-	adrp	x27, .LANCHOR161
-	cbz	w22, .L3863
+	mov	w19, w0
+	cbnz	w0, .L3895
+	adrp	x27, .LANCHOR158
+	cbz	w22, .L3896
 	cmp	w21, w24
 	adrp	x1, .LANCHOR98
-	bcs	.L3864
+	bcs	.L3897
 	ldrh	w0, [x1, #:lo12:.LANCHOR98]
 	cmp	w0, w21
-	bhi	.L3865
-.L3864:
+	bhi	.L3898
+.L3897:
 	ldrh	w1, [x1, #:lo12:.LANCHOR98]
 	add	w0, w21, w24
 	cmp	w0, w1
-	blt	.L3865
-	adrp	x0, .LANCHOR93
-	ldrh	w1, [x0, #:lo12:.LANCHOR93]
+	blt	.L3898
+	adrp	x0, .LANCHOR91
+	ldrh	w1, [x0, #:lo12:.LANCHOR91]
 	adrp	x0, .LANCHOR101
 	ldrh	w0, [x0, #:lo12:.LANCHOR101]
 	cmp	w1, w0
-	bcc	.L3863
-.L3865:
+	bcc	.L3896
+.L3898:
 	mov	w0, 1
-	strb	w0, [x26, #:lo12:.LANCHOR85]
-	mov	w0, 16
-	bl	zftl_get_gc_node.part.9
+	mov	w1, 16
+	strb	w0, [x26, #:lo12:.LANCHOR84]
+	adrp	x0, .LANCHOR95
+	add	x0, x0, :lo12:.LANCHOR95
+	bl	_list_get_gc_head_node
 	and	w1, w0, 65535
 	mov	w2, 65535
-	adrp	x28, .LANCHOR160
+	adrp	x28, .LANCHOR157
 	cmp	w1, w2
-	beq	.L3866
-	adrp	x2, .LANCHOR9
+	beq	.L3899
+	adrp	x2, .LANCHOR11
 	ubfiz	x1, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR9]
+	ldr	x2, [x2, #:lo12:.LANCHOR11]
 	ldrh	w2, [x2, x1]
-	ldrh	w1, [x27, #:lo12:.LANCHOR161]
+	ldrh	w1, [x27, #:lo12:.LANCHOR158]
 	cmp	w2, w1
-	bcs	.L3866
+	bcs	.L3899
 	cmp	w21, 2
-	bls	.L3866
-	strb	wzr, [x26, #:lo12:.LANCHOR85]
+	bls	.L3899
+	strb	wzr, [x26, #:lo12:.LANCHOR84]
 	mov	w2, 0
-	str	wzr, [x28, #:lo12:.LANCHOR160]
+	str	wzr, [x28, #:lo12:.LANCHOR157]
 	mov	w1, 1
 	bl	gc_add_sblk
-	cbnz	w0, .L3858
-.L3866:
-	mov	w1, 3
-	mov	w0, 0
-	bl	zftl_get_gc_node
+	cbnz	w0, .L3890
+.L3899:
+	mov	w1, 0
+	adrp	x0, .LANCHOR90
+	add	x0, x0, :lo12:.LANCHOR90
+	bl	_list_get_gc_head_node
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L3867
-	adrp	x2, .LANCHOR9
+	beq	.L3900
+	adrp	x2, .LANCHOR11
 	ubfiz	x1, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR9]
+	ldr	x2, [x2, #:lo12:.LANCHOR11]
 	ldrh	w2, [x2, x1]
-	ldrh	w1, [x27, #:lo12:.LANCHOR161]
+	ldrh	w1, [x27, #:lo12:.LANCHOR158]
 	cmp	w2, w1
-	bcs	.L3867
+	bcs	.L3900
 	cmp	w21, 2
-	bls	.L3867
-	strb	wzr, [x26, #:lo12:.LANCHOR85]
+	bls	.L3900
+	strb	wzr, [x26, #:lo12:.LANCHOR84]
 	mov	w2, 0
-	str	wzr, [x28, #:lo12:.LANCHOR160]
+	str	wzr, [x28, #:lo12:.LANCHOR157]
 	mov	w1, 1
 	bl	gc_add_sblk
-	cbnz	w0, .L3858
-.L3867:
-	ldrh	w0, [x27, #:lo12:.LANCHOR161]
-	adrp	x1, .LANCHOR95
+	cbnz	w0, .L3890
+.L3900:
+	ldrh	w0, [x27, #:lo12:.LANCHOR158]
+	adrp	x1, .LANCHOR94
 	add	w0, w0, 1
-	ldrh	w5, [x1, #:lo12:.LANCHOR95]
+	ldrh	w5, [x1, #:lo12:.LANCHOR94]
 	and	w0, w0, 65535
-	strh	w0, [x27, #:lo12:.LANCHOR161]
+	strh	w0, [x27, #:lo12:.LANCHOR158]
 	cmp	w0, w5, lsr 5
-	bls	.L3868
+	bls	.L3901
 	mov	w0, 4
-	strh	w0, [x27, #:lo12:.LANCHOR161]
-.L3868:
-	adrp	x1, .LANCHOR90
-	ldr	w0, [x28, #:lo12:.LANCHOR160]
-	strh	wzr, [x1, #:lo12:.LANCHOR90]
-	adrp	x1, .LANCHOR91
+	strh	w0, [x27, #:lo12:.LANCHOR158]
+.L3901:
+	adrp	x1, .LANCHOR87
+	ldr	w0, [x28, #:lo12:.LANCHOR157]
+	strh	wzr, [x1, #:lo12:.LANCHOR87]
+	adrp	x1, .LANCHOR88
 	add	w0, w0, 1
-	str	w0, [x28, #:lo12:.LANCHOR160]
-	strh	wzr, [x1, #:lo12:.LANCHOR91]
-	adrp	x1, .LANCHOR92
-	strh	wzr, [x1, #:lo12:.LANCHOR92]
-	adrp	x1, .LANCHOR6
-	ldrh	w1, [x1, #:lo12:.LANCHOR6]
+	str	w0, [x28, #:lo12:.LANCHOR157]
+	strh	wzr, [x1, #:lo12:.LANCHOR88]
+	adrp	x1, .LANCHOR89
+	strh	wzr, [x1, #:lo12:.LANCHOR89]
+	adrp	x1, .LANCHOR8
+	ldrh	w1, [x1, #:lo12:.LANCHOR8]
 	cmp	w0, w1, lsr 5
-	adrp	x0, .LANCHOR93
-	bls	.L3869
-	ldrh	w1, [x0, #:lo12:.LANCHOR93]
+	adrp	x0, .LANCHOR91
+	bls	.L3902
+	ldrh	w1, [x0, #:lo12:.LANCHOR91]
 	cmp	w1, w22
-	bls	.L3869
-	mov	w1, 5
-	mov	w0, 0
-	bl	zftl_get_gc_node
+	bls	.L3902
+	mov	w1, 0
+	adrp	x0, .LANCHOR92
+	add	x0, x0, :lo12:.LANCHOR92
+	bl	_list_get_gc_head_node
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L3870
-.L4024:
-	mov	w20, 16
-.L3871:
-	ldr	x0, [x23, #:lo12:.LANCHOR10]
-	adrp	x28, .LANCHOR85
-	mov	w1, 1
-	mov	x23, x28
-	strb	w1, [x28, #:lo12:.LANCHOR85]
-	ldrh	w0, [x0, 124]
-	cbz	w0, .L3876
-	strb	wzr, [x28, #:lo12:.LANCHOR85]
-	strb	w1, [x19, #:lo12:.LANCHOR159]
-.L3839:
-	mov	w0, w20
-	ldp	x19, x20, [sp, 32]
-	ldp	x21, x22, [sp, 48]
-	ldp	x23, x24, [sp, 64]
-	ldp	x25, x26, [sp, 80]
-	ldp	x27, x28, [sp, 96]
-	ldp	x29, x30, [sp, 16]
-	add	sp, sp, 144
-	ret
-.L3870:
-	adrp	x1, .LANCHOR9
+	bne	.L3903
+.L4064:
+	mov	w19, 16
+	b	.L3904
+.L3903:
+	adrp	x1, .LANCHOR11
 	ubfiz	x0, x0, 1, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR9]
+	ldr	x1, [x1, #:lo12:.LANCHOR11]
 	ldrh	w1, [x1, x0]
-	adrp	x0, .LANCHOR80
-	ldrb	w0, [x0, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR79
+	ldrb	w0, [x0, #:lo12:.LANCHOR79]
 	mul	w0, w0, w5
 	cmp	w1, w0
-	bgt	.L4024
-	str	wzr, [x28, #:lo12:.LANCHOR160]
+	bgt	.L4064
+	str	wzr, [x28, #:lo12:.LANCHOR157]
 	mov	w2, 4
-.L4031:
+.L4070:
 	mov	w1, 2
-.L4023:
-	ldrb	w0, [x26, #:lo12:.LANCHOR85]
+.L4063:
+	ldrb	w0, [x26, #:lo12:.LANCHOR84]
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-	cbz	w0, .L4024
-	b	.L3858
-.L3869:
-	ldrh	w1, [x0, #:lo12:.LANCHOR93]
+	cbz	w0, .L4064
+	b	.L3890
+.L3902:
+	ldrh	w1, [x0, #:lo12:.LANCHOR91]
 	adrp	x0, .LANCHOR101
 	ldrh	w0, [x0, #:lo12:.LANCHOR101]
 	cmp	w1, w0
-	bcc	.L3874
+	bcc	.L3907
 	mov	w2, 1
-	b	.L4031
-.L3874:
+	b	.L4070
+.L3907:
 	ldr	x0, [x29, 120]
 	ldrh	w0, [x0, #:lo12:.LANCHOR97]
-	cbnz	w0, .L3875
+	cbnz	w0, .L3908
 	ldr	x0, [x29, 112]
 	ldrh	w0, [x0, #:lo12:.LANCHOR99]
 	cmp	w0, 8
-	bls	.L3871
-.L3875:
+	bls	.L3909
+.L3908:
 	mov	w2, 4
 	mov	w1, 1
-	b	.L4023
-.L3863:
-	adrp	x0, .LANCHOR95
-	ldrh	w1, [x0, #:lo12:.LANCHOR95]
-	ldrh	w0, [x27, #:lo12:.LANCHOR161]
+	b	.L4063
+.L3909:
+	adrp	x0, .LANCHOR70+2110
+	ldrh	w0, [x0, #:lo12:.LANCHOR70+2110]
+	cbnz	w0, .L4064
+.L3904:
+	ldr	x0, [x23, #:lo12:.LANCHOR12]
+	adrp	x28, .LANCHOR84
+	mov	w1, 1
+	mov	x23, x28
+	strb	w1, [x28, #:lo12:.LANCHOR84]
+	ldrh	w0, [x0, 124]
+	cbz	w0, .L3910
+	strb	wzr, [x28, #:lo12:.LANCHOR84]
+	strb	w1, [x20, #:lo12:.LANCHOR156]
+.L3871:
+	mov	w0, w19
+	ldp	x19, x20, [sp, 32]
+	ldp	x21, x22, [sp, 48]
+	ldp	x23, x24, [sp, 64]
+	ldp	x25, x26, [sp, 80]
+	ldp	x27, x28, [sp, 96]
+	ldp	x29, x30, [sp, 16]
+	add	sp, sp, 144
+	ret
+.L3896:
+	adrp	x0, .LANCHOR94
+	ldrh	w1, [x0, #:lo12:.LANCHOR94]
+	ldrh	w0, [x27, #:lo12:.LANCHOR158]
 	cmp	w0, w1, lsr 5
-	bcc	.L4024
+	bcc	.L4064
 	mov	w0, 4
-	strh	w0, [x27, #:lo12:.LANCHOR161]
-	b	.L4024
-.L3860:
-	adrp	x0, .LANCHOR87
-	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	strh	w0, [x27, #:lo12:.LANCHOR158]
+	b	.L4064
+.L3892:
+	adrp	x0, .LANCHOR86
+	ldrh	w0, [x0, #:lo12:.LANCHOR86]
 	cmp	w0, w21
-	bcs	.L4024
+	bcs	.L4064
 	ldrh	w0, [x26, 124]
-	cbz	w0, .L3954
-	b	.L4024
-.L3876:
-	adrp	x0, .LANCHOR87
+	cbz	w0, .L3988
+	b	.L4064
+.L3910:
+	adrp	x0, .LANCHOR86
 	mov	x26, x0
-	ldrh	w2, [x0, #:lo12:.LANCHOR87]
+	ldrh	w2, [x0, #:lo12:.LANCHOR86]
 	cmp	w21, w2
-	bcs	.L3877
-	cbz	w22, .L3878
+	bcs	.L3911
+	cbz	w22, .L3912
 	cmp	w22, 16
-	bls	.L3879
-	adrp	x0, .LANCHOR93
-	ldrh	w2, [x0, #:lo12:.LANCHOR93]
+	bls	.L3913
+	adrp	x0, .LANCHOR91
+	ldrh	w2, [x0, #:lo12:.LANCHOR91]
 	adrp	x0, .LANCHOR101
 	ldrh	w0, [x0, #:lo12:.LANCHOR101]
 	cmp	w2, w0
-	bhi	.L3879
+	bhi	.L3913
 	mov	w2, 4
 	mov	w0, w1
 	bl	gc_search_src_blk
 	tst	w0, 65535
-	bne	.L3880
-.L4027:
+	bne	.L3914
+.L4071:
 	mov	w2, 4
 	mov	w1, 3
-	ldrb	w0, [x28, #:lo12:.LANCHOR85]
-	b	.L4026
-.L3880:
-	mov	w1, 5
-	mov	w0, 0
-	bl	zftl_get_gc_node
+	ldrb	w0, [x28, #:lo12:.LANCHOR84]
+	b	.L4066
+.L3914:
+	mov	w1, 0
+	adrp	x0, .LANCHOR92
+	add	x0, x0, :lo12:.LANCHOR92
+	bl	_list_get_gc_head_node
 	and	w3, w0, 65535
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L3883
-	adrp	x4, .LANCHOR9
+	beq	.L3917
+	adrp	x4, .LANCHOR11
 	ubfiz	x3, x3, 1, 16
-	adrp	x1, .LANCHOR160
+	adrp	x1, .LANCHOR157
 	mov	x21, x1
-	ldr	x4, [x4, #:lo12:.LANCHOR9]
-	ldr	w2, [x1, #:lo12:.LANCHOR160]
+	ldr	x4, [x4, #:lo12:.LANCHOR11]
+	ldr	w2, [x1, #:lo12:.LANCHOR157]
 	add	w2, w2, 1
-	str	w2, [x1, #:lo12:.LANCHOR160]
+	str	w2, [x1, #:lo12:.LANCHOR157]
 	ldrh	w3, [x4, x3]
-	adrp	x4, .LANCHOR95
-	ldrh	w4, [x4, #:lo12:.LANCHOR95]
+	adrp	x4, .LANCHOR94
+	ldrh	w4, [x4, #:lo12:.LANCHOR94]
 	cmp	w4, w3
-	bcs	.L3884
-	adrp	x1, .LANCHOR6
-	ldrh	w1, [x1, #:lo12:.LANCHOR6]
+	bcs	.L3918
+	adrp	x1, .LANCHOR8
+	ldrh	w1, [x1, #:lo12:.LANCHOR8]
 	cmp	w2, w1, lsr 4
-	bls	.L3883
+	bls	.L3917
 	adrp	x1, .LANCHOR100
 	ldrh	w1, [x1, #:lo12:.LANCHOR100]
 	cmp	w1, w3
-	bls	.L3883
-.L3884:
-	ldrb	w2, [x23, #:lo12:.LANCHOR85]
+	bls	.L3917
+.L3918:
+	ldrb	w2, [x23, #:lo12:.LANCHOR84]
 	mov	w1, 0
 	bl	gc_add_sblk
-	str	wzr, [x21, #:lo12:.LANCHOR160]
+	str	wzr, [x21, #:lo12:.LANCHOR157]
 	adrp	x0, .LANCHOR122
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR122]
-.L3883:
+.L3917:
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR159]
-	b	.L3839
-.L3879:
+	strb	w0, [x20, #:lo12:.LANCHOR156]
+	b	.L3871
+.L3913:
 	mov	w2, 1
 	mov	w1, 2
 	mov	w0, w2
 	bl	gc_search_src_blk
 	tst	w0, 65535
-	bne	.L3883
-	ldrb	w0, [x23, #:lo12:.LANCHOR85]
+	bne	.L3917
+	ldrb	w0, [x23, #:lo12:.LANCHOR84]
 	mov	w2, 4
 	mov	w1, 3
-.L4026:
+.L4066:
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-.L3881:
-	cbnz	w0, .L3883
-	b	.L3839
-.L3878:
-	strb	wzr, [x28, #:lo12:.LANCHOR85]
+.L3915:
+	cbnz	w0, .L3917
+	b	.L3871
+.L3912:
+	strb	wzr, [x28, #:lo12:.LANCHOR84]
 	cmp	w21, 16
-	bls	.L3886
+	bls	.L3920
 	mov	w2, 4
 	mov	w1, 3
 	mov	w0, 0
-	b	.L4026
-.L3886:
+	b	.L4066
+.L3920:
 	mov	w2, w1
 	mov	w0, 0
 	bl	gc_search_src_blk
 	tst	w0, 65535
-	bne	.L3883
-	b	.L4027
-.L3877:
+	bne	.L3917
+	b	.L4071
+.L3911:
 	cmp	w25, 1
-	bne	.L3839
+	bne	.L3871
 	cmp	w21, w2, lsl 1
-	bge	.L3887
+	bge	.L3921
 	cmp	w24, w22, lsr 1
-	bcs	.L3888
-	adrp	x1, .LANCHOR93
-	ldrh	w2, [x1, #:lo12:.LANCHOR93]
+	bcs	.L3922
+	adrp	x1, .LANCHOR91
+	ldrh	w2, [x1, #:lo12:.LANCHOR91]
 	adrp	x1, .LANCHOR101
 	ldrh	w1, [x1, #:lo12:.LANCHOR101]
 	cmp	w2, w1
-	bcs	.L3888
+	bcs	.L3922
 	adrp	x1, .LANCHOR98
 	ldrh	w1, [x1, #:lo12:.LANCHOR98]
 	lsr	w1, w1, 2
-	strh	w1, [x0, #:lo12:.LANCHOR87]
-	b	.L3839
-.L3888:
-	mov	w0, 8
-	bl	zftl_get_gc_node.part.9
+	strh	w1, [x0, #:lo12:.LANCHOR86]
+	b	.L3871
+.L3922:
+	mov	w1, 8
+	adrp	x25, .LANCHOR95
+	add	x0, x25, :lo12:.LANCHOR95
+	bl	_list_get_gc_head_node
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L3889
-	adrp	x2, .LANCHOR9
+	beq	.L3923
+	adrp	x2, .LANCHOR11
 	ubfiz	x1, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR9]
+	ldr	x2, [x2, #:lo12:.LANCHOR11]
 	ldrh	w1, [x2, x1]
 	cmp	w1, 3
-	bhi	.L3889
-	cbz	w21, .L3889
-	strb	wzr, [x23, #:lo12:.LANCHOR85]
+	bhi	.L3923
+	cbz	w21, .L3923
+	strb	wzr, [x23, #:lo12:.LANCHOR84]
 	mov	w2, 0
 	mov	w1, 1
 	bl	gc_add_sblk
-	cbnz	w0, .L3883
-.L3889:
-	mov	w1, 5
-	mov	w0, 0
-	bl	zftl_get_gc_node
-	and	w25, w0, 65535
+	cbnz	w0, .L3917
+.L3923:
+	mov	w1, 0
+	adrp	x0, .LANCHOR92
+	add	x0, x0, :lo12:.LANCHOR92
+	bl	_list_get_gc_head_node
+	and	w28, w0, 65535
 	mov	w1, 65535
-	mov	w28, w25
-	cmp	w25, w1
-	bne	.L3890
-.L3895:
+	mov	w3, w28
+	cmp	w28, w1
+	bne	.L3924
+.L3929:
 	cmp	w22, 1
-	bhi	.L3891
-.L3892:
+	bhi	.L3925
+.L3926:
 	cmp	w21, w24
 	adrp	x21, .LANCHOR98
-	bcs	.L3899
-	strb	wzr, [x23, #:lo12:.LANCHOR85]
-	mov	w0, 4
-	bl	zftl_get_gc_node.part.9
+	bcs	.L3933
+	mov	w1, 4
+	strb	wzr, [x23, #:lo12:.LANCHOR84]
+	add	x0, x25, :lo12:.LANCHOR95
+	bl	_list_get_gc_head_node
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3899
-	adrp	x1, .LANCHOR9
+	beq	.L3933
+	adrp	x1, .LANCHOR11
 	ubfiz	x0, x0, 1, 16
-	adrp	x2, .LANCHOR80
-	ldr	x1, [x1, #:lo12:.LANCHOR9]
-	ldrb	w2, [x2, #:lo12:.LANCHOR80]
+	adrp	x2, .LANCHOR79
+	ldr	x1, [x1, #:lo12:.LANCHOR11]
+	ldrb	w2, [x2, #:lo12:.LANCHOR79]
 	ldrh	w1, [x1, x0]
-	adrp	x0, .LANCHOR95
-	ldrh	w0, [x0, #:lo12:.LANCHOR95]
+	adrp	x0, .LANCHOR94
+	ldrh	w0, [x0, #:lo12:.LANCHOR94]
 	mul	w0, w0, w2
 	cmp	w1, w0, lsr 1
-	ble	.L3901
-.L3899:
+	ble	.L3935
+.L3933:
 	ldrh	w0, [x21, #:lo12:.LANCHOR98]
 	lsr	w0, w0, 2
-	strh	w0, [x26, #:lo12:.LANCHOR87]
-	b	.L3839
-.L3890:
-	adrp	x2, .LANCHOR160
-	adrp	x3, .LANCHOR6
-	uxtw	x25, w25
-	ldr	w1, [x2, #:lo12:.LANCHOR160]
-	ldrh	w3, [x3, #:lo12:.LANCHOR6]
+	strh	w0, [x26, #:lo12:.LANCHOR86]
+	b	.L3871
+.L3924:
+	adrp	x2, .LANCHOR157
+	adrp	x4, .LANCHOR8
+	uxtw	x28, w28
+	ldr	w1, [x2, #:lo12:.LANCHOR157]
+	ldrh	w4, [x4, #:lo12:.LANCHOR8]
 	add	w1, w1, 1
-	str	w1, [x2, #:lo12:.LANCHOR160]
-	cmp	w1, w3, lsr 4
-	adrp	x3, .LANCHOR9
-	bls	.L3893
-	ldr	x1, [x3, #:lo12:.LANCHOR9]
-	str	wzr, [x2, #:lo12:.LANCHOR160]
-	ldrh	w2, [x1, x25, lsl 1]
+	str	w1, [x2, #:lo12:.LANCHOR157]
+	cmp	w1, w4, lsr 4
+	adrp	x4, .LANCHOR11
+	bls	.L3927
+	ldr	x1, [x4, #:lo12:.LANCHOR11]
+	str	wzr, [x2, #:lo12:.LANCHOR157]
+	ldrh	w2, [x1, x28, lsl 1]
 	adrp	x1, .LANCHOR100
 	ldrh	w1, [x1, #:lo12:.LANCHOR100]
 	cmp	w2, w1
-	bcs	.L3893
-	mov	w4, 1
-	str	x3, [x29, 96]
-	strb	w4, [x23, #:lo12:.LANCHOR85]
+	bcs	.L3927
+	mov	w5, 1
+	str	x4, [x29, 96]
+	strb	w5, [x23, #:lo12:.LANCHOR84]
 	mov	w2, 1
-	str	w4, [x29, 108]
+	stp	w3, w5, [x29, 104]
 	mov	w1, 0
 	bl	gc_add_sblk
-	ldr	w4, [x29, 108]
-	ldr	x3, [x29, 96]
-	cbz	w0, .L3893
-	strb	w4, [x19, #:lo12:.LANCHOR159]
-	b	.L3839
-.L3893:
-	ldr	x0, [x3, #:lo12:.LANCHOR9]
-	ldrh	w1, [x0, x25, lsl 1]
-	adrp	x0, .LANCHOR95
-	ldrh	w0, [x0, #:lo12:.LANCHOR95]
+	ldp	w3, w5, [x29, 104]
+	ldr	x4, [x29, 96]
+	cbz	w0, .L3927
+	strb	w5, [x20, #:lo12:.LANCHOR156]
+	b	.L3871
+.L3927:
+	ldr	x0, [x4, #:lo12:.LANCHOR11]
+	ldrh	w1, [x0, x28, lsl 1]
+	adrp	x0, .LANCHOR94
+	ldrh	w0, [x0, #:lo12:.LANCHOR94]
 	cmp	w1, w0, lsr 1
-	bhi	.L3894
+	bhi	.L3928
 	mov	w2, 0
 	mov	w1, 1
-	mov	w0, w28
+	mov	w0, w3
 	bl	gc_add_sblk
-	b	.L3883
-.L3894:
+	b	.L3917
+.L3928:
 	ldp	x2, x0, [x29, 112]
 	ldrh	w2, [x2, #:lo12:.LANCHOR99]
 	ldrh	w0, [x0, #:lo12:.LANCHOR97]
@@ -24905,376 +25542,379 @@ zftl_do_gc:
 	adrp	x2, .LANCHOR98
 	ldrh	w2, [x2, #:lo12:.LANCHOR98]
 	cmp	w0, w2, lsl 1
-	ble	.L3895
+	ble	.L3929
 	adrp	x0, .LANCHOR100
 	ldrh	w0, [x0, #:lo12:.LANCHOR100]
 	cmp	w0, w1
-	bcc	.L3892
-	b	.L3895
-.L3891:
+	bcc	.L3926
+	b	.L3929
+.L3925:
 	mov	w1, 1
-	strb	w1, [x23, #:lo12:.LANCHOR85]
+	strb	w1, [x23, #:lo12:.LANCHOR84]
 	cmp	w22, 16
-	bls	.L3896
-	adrp	x0, .LANCHOR93
-	ldrh	w2, [x0, #:lo12:.LANCHOR93]
+	bls	.L3930
+	adrp	x0, .LANCHOR91
+	ldrh	w2, [x0, #:lo12:.LANCHOR91]
 	adrp	x0, .LANCHOR101
 	ldrh	w0, [x0, #:lo12:.LANCHOR101]
 	cmp	w2, w0
-	bhi	.L3896
+	bhi	.L3930
 	mov	w0, w1
 	mov	w2, 4
-.L4033:
+.L4073:
 	bl	gc_search_src_blk
 	ands	w0, w0, 65535
-	bne	.L3897
-	ldrb	w0, [x23, #:lo12:.LANCHOR85]
+	bne	.L3931
+	ldrb	w0, [x23, #:lo12:.LANCHOR84]
 	mov	w2, 4
 	mov	w1, 3
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-.L3897:
+.L3931:
 	adrp	x1, .LANCHOR98
 	cmp	w21, w24, lsr 1
 	ldrh	w1, [x1, #:lo12:.LANCHOR98]
-	bls	.L4028
+	bls	.L4067
 	lsr	w1, w1, 2
-.L4029:
-	strh	w1, [x26, #:lo12:.LANCHOR87]
-	b	.L3881
-.L3896:
+.L4068:
+	strh	w1, [x26, #:lo12:.LANCHOR86]
+	b	.L3915
+.L3930:
 	mov	w2, 1
 	mov	w1, 2
 	mov	w0, w2
-	b	.L4033
-.L3901:
+	b	.L4073
+.L3935:
 	mov	w1, 3
 	mov	w2, 4
 	mov	w0, 0
 	bl	gc_search_src_blk
 	ldrh	w1, [x21, #:lo12:.LANCHOR98]
 	and	w0, w0, 65535
-.L4028:
+.L4067:
 	lsr	w1, w1, 1
-	b	.L4029
-.L3887:
+	b	.L4068
+.L3921:
 	adrp	x1, .LANCHOR98
-	mov	w20, 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR98]
 	lsr	w1, w1, 2
-	strh	w1, [x0, #:lo12:.LANCHOR87]
-	b	.L3839
-.L3843:
-	adrp	x7, .LANCHOR71
+	strh	w1, [x0, #:lo12:.LANCHOR86]
+	adrp	x0, .LANCHOR70+2110
+	ldrh	w0, [x0, #:lo12:.LANCHOR70+2110]
+	cmp	w0, 0
+	csel	w19, w19, wzr, ne
+	b	.L3871
+.L3875:
+	adrp	x7, .LANCHOR70
 	mov	w0, 65535
-	ldrh	w1, [x7, #:lo12:.LANCHOR71]
+	ldrh	w1, [x7, #:lo12:.LANCHOR70]
 	cmp	w1, w0
-	bne	.L3902
+	bne	.L3936
 	bl	gc_get_src_blk
-	strh	w0, [x7, #:lo12:.LANCHOR71]
-.L3902:
-	ldrh	w0, [x7, #:lo12:.LANCHOR71]
+	strh	w0, [x7, #:lo12:.LANCHOR70]
+.L3936:
+	ldrh	w0, [x7, #:lo12:.LANCHOR70]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3903
-	adrp	x1, .LANCHOR6
-	ldrh	w1, [x1, #:lo12:.LANCHOR6]
+	beq	.L3937
+	adrp	x1, .LANCHOR8
+	ldrh	w1, [x1, #:lo12:.LANCHOR8]
 	cmp	w1, w0
-	bhi	.L3903
+	bhi	.L3937
 	mov	w0, -1
-	strh	w0, [x7, #:lo12:.LANCHOR71]
-.L3903:
-	ldrh	w3, [x7, #:lo12:.LANCHOR71]
+	strh	w0, [x7, #:lo12:.LANCHOR70]
+.L3937:
+	ldrh	w3, [x7, #:lo12:.LANCHOR70]
 	mov	w0, 65535
-	add	x1, x7, :lo12:.LANCHOR71
+	add	x1, x7, :lo12:.LANCHOR70
 	cmp	w3, w0
-	beq	.L4035
-	adrp	x0, .LANCHOR7
+	beq	.L4075
+	adrp	x0, .LANCHOR9
 	ldrh	w5, [x1, 56]
 	uxtw	x4, w3
-	ldr	x2, [x0, #:lo12:.LANCHOR7]
+	ldr	x2, [x0, #:lo12:.LANCHOR9]
 	add	x2, x2, x4, lsl 2
-	cbz	w5, .L3905
+	cbz	w5, .L3939
 	add	x1, x1, 58
 	mov	w0, 0
-.L3907:
+.L3941:
 	ldrh	w6, [x1], 2
 	cmp	w6, w3
-	bne	.L3906
-.L3911:
-	adrp	x0, .LANCHOR71
+	bne	.L3940
+.L3945:
+	adrp	x0, .LANCHOR70
 	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR71]
-	b	.L3954
-.L3906:
+	strh	w1, [x0, #:lo12:.LANCHOR70]
+	b	.L3988
+.L3940:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w5, w0
-	bne	.L3907
-.L3905:
+	bne	.L3941
+.L3939:
 	ldrb	w0, [x2, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L3908
+	beq	.L3942
 	tst	w0, 192
-	bne	.L3909
-.L3908:
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	bne	.L3943
+.L3942:
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrh	w0, [x0, x4, lsl 1]
-	cbz	w0, .L3911
-	mov	w2, 3153
+	cbz	w0, .L3945
+	mov	w2, 3306
 	adrp	x1, .LANCHOR237
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR237
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3911
-.L3909:
+	b	.L3945
+.L3943:
 	mov	w0, 2
-	b	.L4036
-.L3844:
+	b	.L4076
+.L3876:
 	bl	gc_scan_src_blk
 	cmn	w0, #1
-	bne	.L3912
+	bne	.L3946
 	mov	w0, 3
-	b	.L4036
-.L3912:
-	adrp	x20, .LANCHOR71
+	b	.L4076
+.L3946:
+	adrp	x19, .LANCHOR70
 	mov	w2, 65535
-	add	x0, x20, :lo12:.LANCHOR71
-	ldrh	w1, [x20, #:lo12:.LANCHOR71]
+	add	x0, x19, :lo12:.LANCHOR70
+	ldrh	w1, [x19, #:lo12:.LANCHOR70]
 	cmp	w1, w2
-	beq	.L3858
+	beq	.L3890
 	ldrh	w2, [x0, 24]
-	cbz	w2, .L3913
+	cbz	w2, .L3947
 	mov	w1, 4
 	strh	wzr, [x0, 26]
-	strb	w1, [x19, #:lo12:.LANCHOR159]
-	b	.L3954
-.L3913:
+	strb	w1, [x20, #:lo12:.LANCHOR156]
+	b	.L3988
+.L3947:
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR159]
-	adrp	x0, .LANCHOR9
+	strb	w0, [x20, #:lo12:.LANCHOR156]
+	adrp	x0, .LANCHOR11
 	ubfiz	x1, x1, 1, 16
-	mov	x19, x0
-	ldr	x2, [x0, #:lo12:.LANCHOR9]
+	mov	x20, x0
+	ldr	x2, [x0, #:lo12:.LANCHOR11]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L3914
+	cbz	w1, .L3948
 	adrp	x1, .LANCHOR237
 	adrp	x0, .LC0
-	mov	w2, 3183
+	mov	w2, 3336
 	add	x1, x1, :lo12:.LANCHOR237
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3914:
-	ldrh	w0, [x20, #:lo12:.LANCHOR71]
-	add	x21, x20, :lo12:.LANCHOR71
+.L3948:
+	ldrh	w0, [x19, #:lo12:.LANCHOR70]
+	add	x21, x19, :lo12:.LANCHOR70
 	bl	ftl_free_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR9]
-	ldrh	w1, [x20, #:lo12:.LANCHOR71]
+	ldr	x0, [x20, #:lo12:.LANCHOR11]
+	ldrh	w1, [x19, #:lo12:.LANCHOR70]
 	strh	wzr, [x0, x1, lsl 1]
 	ldrh	w0, [x21, 30]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w0, 8
-	bhi	.L3915
+	bhi	.L3949
 	strh	w0, [x21, 30]
-	b	.L3911
-.L3915:
+	b	.L3945
+.L3949:
 	strh	wzr, [x21, 30]
 	bl	ftl_flush
 	bl	pm_flush
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L3911
-.L3845:
-	adrp	x20, .LANCHOR71
-	adrp	x23, .LANCHOR95
-	add	x22, x20, :lo12:.LANCHOR71
-	add	x23, x23, :lo12:.LANCHOR95
-.L3999:
+	b	.L3945
+.L3877:
+	adrp	x19, .LANCHOR70
+	adrp	x23, .LANCHOR94
+	add	x22, x19, :lo12:.LANCHOR70
+	add	x23, x23, :lo12:.LANCHOR94
+.L4037:
 	bl	gc_scan_src_blk_one_page
 	ldrh	w1, [x22, 2]
 	ldrh	w0, [x23]
 	cmp	w1, w0
-	bcs	.L3917
+	bcs	.L3951
 	cmp	w21, 7
-	bls	.L3999
-	b	.L3954
-.L3917:
+	bls	.L4037
+	b	.L3988
+.L3951:
 	ldrh	w3, [x22, 24]
 	ldrh	w1, [x22]
-	cbz	w3, .L3918
+	cbz	w3, .L3952
 	mov	w0, 4
-	strb	w0, [x19, #:lo12:.LANCHOR159]
-	adrp	x19, .LANCHOR9
+	strb	w0, [x20, #:lo12:.LANCHOR156]
+	adrp	x20, .LANCHOR11
 	ubfiz	x0, x1, 1, 16
 	strh	wzr, [x22, 26]
-	ldr	x2, [x19, #:lo12:.LANCHOR9]
+	ldr	x2, [x20, #:lo12:.LANCHOR11]
 	ldrh	w2, [x2, x0]
 	cmp	w3, w2
-	beq	.L3919
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L3919
-	adrp	x0, .LC237
-	add	x0, x0, :lo12:.LC237
+	beq	.L3953
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 10, .L3953
+	adrp	x0, .LC240
+	add	x0, x0, :lo12:.LC240
 	bl	printf
-.L3919:
-	ldrh	w2, [x20, #:lo12:.LANCHOR71]
-	add	x0, x20, :lo12:.LANCHOR71
-	ldr	x1, [x19, #:lo12:.LANCHOR9]
+.L3953:
+	ldrh	w2, [x19, #:lo12:.LANCHOR70]
+	add	x0, x19, :lo12:.LANCHOR70
+	ldr	x1, [x20, #:lo12:.LANCHOR11]
 	ldrh	w0, [x0, 24]
 	ldrh	w1, [x1, x2, lsl 1]
 	cmp	w1, w0
-	beq	.L3920
+	beq	.L3954
 	adrp	x1, .LANCHOR237
 	adrp	x0, .LC0
-	mov	w2, 3226
+	mov	w2, 3379
 	add	x1, x1, :lo12:.LANCHOR237
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3920:
-	add	x0, x20, :lo12:.LANCHOR71
-	ldrh	w1, [x20, #:lo12:.LANCHOR71]
+.L3954:
+	add	x0, x19, :lo12:.LANCHOR70
+	ldrh	w1, [x19, #:lo12:.LANCHOR70]
 	ldrh	w2, [x0, 24]
-	ldr	x0, [x19, #:lo12:.LANCHOR9]
+	ldr	x0, [x20, #:lo12:.LANCHOR11]
 	strh	w2, [x0, x1, lsl 1]
-	b	.L3954
-.L3918:
-	adrp	x0, .LANCHOR7
-	ldr	x21, [x0, #:lo12:.LANCHOR7]
+	b	.L3988
+.L3952:
+	adrp	x0, .LANCHOR9
+	ldr	x21, [x0, #:lo12:.LANCHOR9]
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR159]
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	strb	w0, [x20, #:lo12:.LANCHOR156]
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
 	add	x21, x21, x1, uxth 2
-	tbz	x0, 8, .L3921
+	tbz	x0, 8, .L3955
 	ldrb	w2, [x21, 2]
-	adrp	x0, .LC238
-	add	x0, x0, :lo12:.LC238
+	adrp	x0, .LC241
+	add	x0, x0, :lo12:.LC241
 	ubfx	x2, x2, 5, 3
 	bl	printf
-.L3921:
+.L3955:
 	ldrb	w0, [x21, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L3922
+	beq	.L3956
 	tst	w0, 192
-	bne	.L3923
-.L3922:
+	bne	.L3957
+.L3956:
 	adrp	x1, .LANCHOR237
 	adrp	x0, .LC0
-	mov	w2, 3236
+	mov	w2, 3389
 	add	x1, x1, :lo12:.LANCHOR237
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3923:
-	ldrh	w0, [x20, #:lo12:.LANCHOR71]
-	add	x19, x20, :lo12:.LANCHOR71
+.L3957:
+	ldrh	w0, [x19, #:lo12:.LANCHOR70]
+	add	x20, x19, :lo12:.LANCHOR70
 	bl	ftl_free_sblk
 	mov	w0, -1
-	strh	w0, [x20, #:lo12:.LANCHOR71]
-	ldrh	w0, [x19, 30]
+	strh	w0, [x19, #:lo12:.LANCHOR70]
+	ldrh	w0, [x20, 30]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w0, 8
-	bhi	.L3924
-	strh	w0, [x19, 30]
-	b	.L3954
-.L3924:
-	strh	wzr, [x19, 30]
-.L4034:
+	bhi	.L3958
+	strh	w0, [x20, 30]
+	b	.L3988
+.L3958:
+	strh	wzr, [x20, 30]
+.L4074:
 	bl	flt_sys_flush
-	b	.L3954
-.L3846:
+	b	.L3988
+.L3878:
 	ldrh	w1, [x26, 80]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L3925
-	adrp	x0, .LANCHOR85
-	ldrb	w22, [x0, #:lo12:.LANCHOR85]
-	cmp	w22, 1
-	bne	.L3925
+	bne	.L3959
+	adrp	x0, .LANCHOR84
+	ldrb	w19, [x0, #:lo12:.LANCHOR84]
+	cmp	w19, 1
+	bne	.L3959
 	bl	ftl_flush
-	adrp	x0, .LANCHOR71
-	add	x1, x0, :lo12:.LANCHOR71
+	adrp	x0, .LANCHOR70
+	add	x1, x0, :lo12:.LANCHOR70
 	mov	x20, x0
-	ldrh	w1, [x1, 2110]
-	cbz	w1, .L3926
-	mov	w0, w22
+	ldrh	w1, [x1, 2192]
+	cbz	w1, .L3960
+	mov	w0, w19
 	mov	w1, 5
-.L4030:
+.L4069:
 	bl	zftl_gc_get_free_sblk
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L3928
-	adrp	x0, .LANCHOR7
-	ldr	x21, [x0, #:lo12:.LANCHOR7]
+	beq	.L3962
+	adrp	x0, .LANCHOR9
+	ldr	x21, [x0, #:lo12:.LANCHOR9]
 	add	x21, x21, x19, uxth 2
 	ldrb	w0, [x21, 2]
 	tst	w0, 224
-	beq	.L3929
+	beq	.L3963
 	adrp	x1, .LANCHOR237
 	adrp	x0, .LC0
-	mov	w2, 3270
+	mov	w2, 3423
 	add	x1, x1, :lo12:.LANCHOR237
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3929:
+.L3963:
 	ldrb	w0, [x21, 2]
 	mov	w1, 5
 	bfi	w0, w1, 5, 3
 	orr	w0, w0, 16
 	strb	w0, [x21, 2]
-.L3953:
+.L3987:
 	mov	w1, 1
 	mov	w0, w19
 	bl	ftl_erase_sblk
-	adrp	x22, .LANCHOR86
+	adrp	x22, .LANCHOR85
 	mov	w0, 5
 	strb	w0, [x26, 84]
 	add	x1, x26, 96
 	mov	w0, w19
 	bl	ftl_get_blk_list_in_sblk
 	and	w0, w0, 255
-	adrp	x1, .LANCHOR95
-	adrp	x21, .LANCHOR80
+	adrp	x1, .LANCHOR94
+	adrp	x21, .LANCHOR79
 	strb	w0, [x26, 89]
-	ldrh	w1, [x1, #:lo12:.LANCHOR95]
-	ldrh	w2, [x22, #:lo12:.LANCHOR86]
+	ldrh	w1, [x1, #:lo12:.LANCHOR94]
+	ldrh	w2, [x22, #:lo12:.LANCHOR85]
 	strh	w19, [x26, 80]
 	strh	wzr, [x26, 82]
 	mul	w0, w0, w1
 	strb	wzr, [x26, 85]
 	strh	w0, [x26, 86]
 	mov	w1, 255
-	ldrb	w0, [x21, #:lo12:.LANCHOR80]
+	ldrb	w0, [x21, #:lo12:.LANCHOR79]
 	strh	wzr, [x26, 90]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR162
-	ldr	x0, [x0, #:lo12:.LANCHOR162]
+	adrp	x0, .LANCHOR159
+	ldr	x0, [x0, #:lo12:.LANCHOR159]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	ldrb	w0, [x21, #:lo12:.LANCHOR80]
+	ldrb	w0, [x21, #:lo12:.LANCHOR79]
 	mov	w1, 255
-	ldrh	w2, [x22, #:lo12:.LANCHOR86]
+	ldrh	w2, [x22, #:lo12:.LANCHOR85]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR163
-	ldr	x0, [x0, #:lo12:.LANCHOR163]
+	adrp	x0, .LANCHOR160
+	ldr	x0, [x0, #:lo12:.LANCHOR160]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	ldrb	w0, [x21, #:lo12:.LANCHOR80]
+	ldrb	w0, [x21, #:lo12:.LANCHOR79]
 	mov	w1, 255
-	ldrh	w2, [x22, #:lo12:.LANCHOR86]
+	ldrh	w2, [x22, #:lo12:.LANCHOR85]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR83
-	ldr	x0, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR82
+	ldr	x0, [x0, #:lo12:.LANCHOR82]
 	bl	ftl_memset
-	ldr	x0, [x23, #:lo12:.LANCHOR10]
+	ldr	x0, [x23, #:lo12:.LANCHOR12]
 	mov	w1, -1
 	str	w19, [x0, 132]
 	strh	w1, [x0, 128]
@@ -25285,106 +25925,106 @@ zftl_do_gc:
 	mov	w1, -1
 	ldr	x0, [x0, #:lo12:.LANCHOR110]
 	strh	w19, [x0, 126]
-	add	x0, x20, :lo12:.LANCHOR71
-	str	w1, [x0, 2116]
+	add	x0, x20, :lo12:.LANCHOR70
+	str	w1, [x0, 2196]
 	strh	wzr, [x0, 2106]
 	strh	wzr, [x0, 56]
 	strh	wzr, [x0, 2108]
-	strh	wzr, [x0, 2112]
+	strh	wzr, [x0, 2194]
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L3954
-.L3926:
+	b	.L3988
+.L3960:
 	mov	w1, 5
 	mov	w0, 0
-	b	.L4030
-.L3925:
+	b	.L4069
+.L3959:
 	cmp	w25, 1
-	mov	w22, 4
-	csinc	w22, w22, wzr, eq
+	mov	w24, 4
+	csinc	w24, w24, wzr, eq
 	cmp	w21, 15
-	mov	w0, w22
-	add	w22, w22, 4
-	adrp	x25, .LANCHOR85
-	adrp	x21, .LANCHOR71
-	csel	w22, w22, w0, ls
-	add	x25, x25, :lo12:.LANCHOR85
-	add	x20, x21, :lo12:.LANCHOR71
+	mov	w0, w24
+	add	w24, w24, 4
+	adrp	x25, .LANCHOR84
+	adrp	x21, .LANCHOR70
+	csel	w24, w24, w0, ls
+	add	x25, x25, :lo12:.LANCHOR84
+	add	x19, x21, :lo12:.LANCHOR70
 	add	x27, x26, 80
-.L3932:
-	sub	w22, w22, #1
-	and	w22, w22, 255
-	cmp	w22, 255
-	beq	.L3954
+.L3966:
+	sub	w24, w24, #1
+	and	w24, w24, 255
+	cmp	w24, 255
+	beq	.L3988
 	bl	gc_do_copy_back
 	ldrb	w0, [x25]
-	cbnz	w0, .L3933
-	adrp	x0, .LANCHOR58
-	ldrb	w0, [x0, #:lo12:.LANCHOR58]
+	cbnz	w0, .L3967
+	adrp	x0, .LANCHOR57
+	ldrb	w0, [x0, #:lo12:.LANCHOR57]
 	cmp	w0, 3
-	bhi	.L3934
+	bhi	.L3968
 	bl	ftl_write_commit
-.L3934:
-	ldrh	w1, [x20, 26]
-	ldrh	w0, [x20, 24]
+.L3968:
+	ldrh	w1, [x19, 26]
+	ldrh	w0, [x19, 24]
 	cmp	w1, w0
-	bcc	.L3932
+	bcc	.L3966
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR159]
+	strb	w0, [x20, #:lo12:.LANCHOR156]
 	bl	ftl_write_commit
 	bl	ftl_flush
-	adrp	x0, .LANCHOR9
-	ldrh	w2, [x20]
+	adrp	x0, .LANCHOR11
+	ldrh	w2, [x19]
 	mov	x19, x0
-	ldr	x1, [x0, #:lo12:.LANCHOR9]
+	ldr	x1, [x0, #:lo12:.LANCHOR11]
 	ldrh	w1, [x1, x2, lsl 1]
-	cbz	w1, .L3936
+	cbz	w1, .L3970
 	adrp	x1, .LANCHOR237
 	adrp	x0, .LC0
-	mov	w2, 3354
+	mov	w2, 3507
 	add	x1, x1, :lo12:.LANCHOR237
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3936:
-	ldrh	w0, [x21, #:lo12:.LANCHOR71]
-	ldr	x2, [x19, #:lo12:.LANCHOR9]
+.L3970:
+	ldrh	w0, [x21, #:lo12:.LANCHOR70]
+	ldr	x2, [x19, #:lo12:.LANCHOR11]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L3937
+	cbnz	w1, .L3971
 	bl	ftl_free_sblk
-	b	.L3911
-.L3937:
+	b	.L3945
+.L3971:
 	mov	w2, 1
 	mov	w1, 0
 	bl	gc_add_sblk
-	b	.L3911
-.L3933:
-	ldrh	w0, [x20, 2112]
-	cbz	w0, .L3938
-	strh	wzr, [x20, 2112]
+	b	.L3945
+.L3967:
+	ldrh	w0, [x19, 2194]
+	cbz	w0, .L3972
+	strh	wzr, [x19, 2194]
 	bl	sblk_wait_write_queue_completed
 	bl	gc_write_completed
-	ldr	w0, [x20, 2116]
-	adrp	x20, .LANCHOR110
+	ldr	w0, [x19, 2196]
+	adrp	x19, .LANCHOR110
 	cmn	w0, #1
-	beq	.L3939
+	beq	.L3973
 	adrp	x1, .LANCHOR124
 	ldrb	w1, [x1, #:lo12:.LANCHOR124]
-	cbnz	w1, .L3940
-	adrp	x1, .LANCHOR81
-	ldrb	w1, [x1, #:lo12:.LANCHOR81]
-	cbz	w1, .L3941
-.L3940:
-	ldr	x1, [x20, #:lo12:.LANCHOR110]
+	cbnz	w1, .L3974
+	adrp	x1, .LANCHOR80
+	ldrb	w1, [x1, #:lo12:.LANCHOR80]
+	cbz	w1, .L3975
+.L3974:
+	ldr	x1, [x19, #:lo12:.LANCHOR110]
 	ldr	w2, [x1, 156]
 	mov	w1, 20041
 	movk	w1, 0x444b, lsl 16
 	cmp	w2, w1
-	bne	.L3941
-	adrp	x1, .LANCHOR75
-	ldrh	w3, [x1, #:lo12:.LANCHOR75]
-	adrp	x1, .LANCHOR32
-	ldrb	w2, [x1, #:lo12:.LANCHOR32]
+	bne	.L3975
+	adrp	x1, .LANCHOR74
+	ldrh	w3, [x1, #:lo12:.LANCHOR74]
+	adrp	x1, .LANCHOR31
+	ldrb	w2, [x1, #:lo12:.LANCHOR31]
 	mov	w1, 24
 	lsr	w0, w0, w3
 	sub	w1, w1, w2
@@ -25393,26 +26033,26 @@ zftl_do_gc:
 	lsl	w1, w1, w2
 	sub	w1, w1, #1
 	and	w0, w1, w0
-	adrp	x1, .LANCHOR76
-	ldrb	w1, [x1, #:lo12:.LANCHOR76]
+	adrp	x1, .LANCHOR75
+	ldrb	w1, [x1, #:lo12:.LANCHOR75]
 	udiv	w0, w0, w1
-	adrp	x1, .LANCHOR7
-	ldr	x2, [x1, #:lo12:.LANCHOR7]
+	adrp	x1, .LANCHOR9
+	ldr	x2, [x1, #:lo12:.LANCHOR9]
 	lsl	x0, x0, 2
 	add	x4, x2, x0
 	ldrb	w1, [x4, 2]
-	tbz	x1, 3, .L3939
+	tbz	x1, 3, .L3973
 	adrp	x5, .LANCHOR98
-	ldrh	w3, [x24, #:lo12:.LANCHOR103]
+	ldrh	w3, [x22, #:lo12:.LANCHOR103]
 	ldrh	w5, [x5, #:lo12:.LANCHOR98]
 	add	w3, w3, 8
 	cmp	w3, w5
-	bge	.L3939
+	bge	.L3973
 	and	w1, w1, -25
 	strb	w1, [x4, 2]
-	adrp	x1, .LANCHOR8
+	adrp	x1, .LANCHOR10
 	ldr	w3, [x2, x0]
-	ldrh	w1, [x1, #:lo12:.LANCHOR8]
+	ldrh	w1, [x1, #:lo12:.LANCHOR10]
 	ldrh	w4, [x2, x0]
 	ubfx	x3, x3, 11, 8
 	and	w5, w4, 2047
@@ -25425,155 +26065,155 @@ zftl_do_gc:
 	ldr	w1, [x2, x0]
 	bfi	w1, w3, 11, 8
 	str	w1, [x2, x0]
-.L3939:
-	ldr	x0, [x23, #:lo12:.LANCHOR10]
-	add	x22, x21, :lo12:.LANCHOR71
+.L3973:
+	ldr	x0, [x23, #:lo12:.LANCHOR12]
+	add	x22, x21, :lo12:.LANCHOR70
 	strh	wzr, [x22, 56]
 	ldrh	w0, [x0, 80]
-	str	wzr, [x22, 2116]
+	str	wzr, [x22, 2196]
 	bl	ftl_free_sblk
-	ldr	x1, [x23, #:lo12:.LANCHOR10]
+	ldr	x1, [x23, #:lo12:.LANCHOR12]
 	mov	w0, -1
-	ldr	x2, [x20, #:lo12:.LANCHOR110]
+	ldr	x2, [x19, #:lo12:.LANCHOR110]
 	strh	w0, [x1, 80]
 	strh	w0, [x2, 126]
 	strh	w0, [x1, 130]
 	ldr	x0, [x22, 8]
-	cbz	x0, .L3942
+	cbz	x0, .L3976
 	bl	zbuf_free
-.L3942:
-	add	x21, x21, :lo12:.LANCHOR71
+.L3976:
+	add	x21, x21, :lo12:.LANCHOR70
 	str	xzr, [x21, 8]
 	bl	flt_sys_flush
-	mov	w2, 3413
-	strb	wzr, [x19, #:lo12:.LANCHOR159]
+	mov	w2, 3567
+	strb	wzr, [x20, #:lo12:.LANCHOR156]
 	adrp	x1, .LANCHOR237
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR237
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3954
-.L3941:
+	b	.L3988
+.L3975:
 	bl	ftl_mask_bad_block
-	b	.L3939
-.L3938:
+	b	.L3973
+.L3972:
 	ldrh	w0, [x27, 6]
-	ldrh	w1, [x20, 26]
+	ldrh	w1, [x19, 26]
 	cmp	w0, 1
-	ldrh	w0, [x20, 24]
-	bls	.L3943
+	ldrh	w0, [x19, 24]
+	bls	.L3977
 	cmp	w1, w0
-	bcc	.L3932
+	bcc	.L3966
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR159]
-	ldrh	w0, [x20, 56]
+	strb	w0, [x20, #:lo12:.LANCHOR156]
+	ldrh	w0, [x19, 56]
 	add	w1, w0, 1
-	strh	w1, [x20, 56]
-	add	x0, x20, x0, sxtw 1
-	ldrh	w1, [x20]
+	strh	w1, [x19, 56]
+	add	x0, x19, x0, sxtw 1
+	ldrh	w1, [x19]
 	strh	w1, [x0, 58]
 	mov	w0, -1
-	strh	w0, [x20]
-	b	.L3954
-.L3943:
+	strh	w0, [x19]
+	b	.L3988
+.L3977:
 	mov	w2, 5
-	strb	w2, [x19, #:lo12:.LANCHOR159]
+	strb	w2, [x20, #:lo12:.LANCHOR156]
 	cmp	w1, w0
-	bcc	.L3944
-	ldrh	w0, [x20, 56]
+	bcc	.L3978
+	ldrh	w0, [x19, 56]
 	add	w1, w0, 1
-	strh	w1, [x20, 56]
-	add	x0, x20, x0, sxtw 1
-	ldrh	w1, [x20]
+	strh	w1, [x19, 56]
+	add	x0, x19, x0, sxtw 1
+	ldrh	w1, [x19]
 	strh	w1, [x0, 58]
 	mov	w0, -1
-	strh	w0, [x20]
-.L3944:
+	strh	w0, [x19]
+.L3978:
 	bl	ftl_flush
 	bl	sblk_wait_write_queue_completed
 	bl	gc_write_completed
-	ldr	x0, [x23, #:lo12:.LANCHOR10]
+	ldr	x0, [x23, #:lo12:.LANCHOR12]
 	ldrh	w1, [x26, 80]
 	strh	w1, [x0, 128]
 	bl	pm_flush
 	bl	ftl_ext_info_flush
-	adrp	x1, .LANCHOR95
-	add	x0, x21, :lo12:.LANCHOR71
-	adrp	x2, .LANCHOR36
-	ldrh	w1, [x1, #:lo12:.LANCHOR95]
+	adrp	x1, .LANCHOR94
+	add	x0, x21, :lo12:.LANCHOR70
+	adrp	x2, .LANCHOR35
+	ldrh	w1, [x1, #:lo12:.LANCHOR94]
 	strh	w1, [x0, 18]
-	adrp	x1, .LANCHOR79
-	ldrb	w2, [x2, #:lo12:.LANCHOR36]
+	adrp	x1, .LANCHOR78
+	ldrb	w2, [x2, #:lo12:.LANCHOR35]
 	strh	wzr, [x0, 16]
-	ldrb	w1, [x1, #:lo12:.LANCHOR79]
+	ldrb	w1, [x1, #:lo12:.LANCHOR78]
 	strh	w1, [x0, 20]
-	cbz	w2, .L3945
-	adrp	x2, .LANCHOR86
-	ldrh	w2, [x2, #:lo12:.LANCHOR86]
+	cbz	w2, .L3979
+	adrp	x2, .LANCHOR85
+	ldrh	w2, [x2, #:lo12:.LANCHOR85]
 	strh	w2, [x0, 18]
 	mov	w2, 1
 	strh	w2, [x0, 20]
-.L3945:
+.L3979:
 	cmp	w1, 2
-	bne	.L3947
-	add	x0, x21, :lo12:.LANCHOR71
+	bne	.L3981
+	add	x0, x21, :lo12:.LANCHOR70
 	ldrh	w1, [x0, 18]
 	ubfiz	w1, w1, 1, 15
 	strh	w1, [x0, 18]
-	adrp	x1, .LANCHOR81
-	ldrb	w1, [x1, #:lo12:.LANCHOR81]
-	cbnz	w1, .L3947
+	adrp	x1, .LANCHOR80
+	ldrb	w1, [x1, #:lo12:.LANCHOR80]
+	cbnz	w1, .L3981
 	mov	w1, 1
 	strh	w1, [x0, 20]
-.L3947:
-	add	x21, x21, :lo12:.LANCHOR71
+.L3981:
+	add	x21, x21, :lo12:.LANCHOR70
 	strh	wzr, [x21, 22]
-	b	.L3954
-.L3950:
+	b	.L3988
+.L3984:
 	ldrh	w1, [x24, 16]
 	ldrh	w0, [x24, 18]
 	cmp	w1, w0
-	bcc	.L3951
+	bcc	.L3985
 	mov	w0, 6
-	strb	w0, [x19, #:lo12:.LANCHOR159]
+	strb	w0, [x20, #:lo12:.LANCHOR156]
 	ldr	x0, [x24, 8]
 	bl	zbuf_free
 	str	xzr, [x24, 8]
-	b	.L3954
-.L3951:
+	b	.L3988
+.L3985:
 	cmp	w21, 15
-	bls	.L3849
+	bls	.L3881
 	cmp	w25, 1
-	bne	.L3954
+	bne	.L3988
 	add	w22, w22, 1
 	and	w22, w22, 255
 	cmp	w22, 4
-	bls	.L3849
-	b	.L3954
-.L3848:
+	bls	.L3881
+	b	.L3988
+.L3880:
 	bl	gc_update_l2p_map_new
-	mov	w20, -1
+	mov	w19, -1
 	bl	gc_free_src_blk
 	bl	ftl_flush
 	bl	pm_flush
-	strh	w20, [x26, 80]
+	strh	w19, [x26, 80]
 	bl	ftl_ext_info_flush
 	adrp	x0, .LANCHOR110
 	ldr	x0, [x0, #:lo12:.LANCHOR110]
-	strh	w20, [x0, 126]
+	strh	w19, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L4035:
-	strb	wzr, [x19, #:lo12:.LANCHOR159]
-	b	.L3954
-.L3928:
-	mov	w2, 3277
+.L4075:
+	strb	wzr, [x20, #:lo12:.LANCHOR156]
+	b	.L3988
+.L3962:
+	mov	w2, 3430
 	adrp	x1, .LANCHOR237
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR237
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3953
+	b	.L3987
 	.size	zftl_do_gc, .-zftl_do_gc
 	.section	.text.zftl_init,"ax",@progbits
 	.align	2
@@ -25581,84 +26221,84 @@ zftl_do_gc:
 	.type	zftl_init, %function
 zftl_init:
 	stp	x29, x30, [sp, -112]!
-	adrp	x1, .LANCHOR66
+	adrp	x1, .LANCHOR65
 	mov	w0, -1
 	add	x29, sp, 0
-	strb	w0, [x1, #:lo12:.LANCHOR66]
-	adrp	x1, .LANCHOR67
+	strb	w0, [x1, #:lo12:.LANCHOR65]
+	adrp	x1, .LANCHOR66
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR95
-	strb	wzr, [x1, #:lo12:.LANCHOR67]
+	adrp	x22, .LANCHOR94
+	strb	wzr, [x1, #:lo12:.LANCHOR66]
 	adrp	x1, .LANCHOR133
 	stp	x19, x20, [sp, 16]
-	adrp	x21, .LANCHOR80
+	adrp	x21, .LANCHOR79
 	strb	w0, [x1, #:lo12:.LANCHOR133]
 	adrp	x1, .LANCHOR134
 	stp	x23, x24, [sp, 48]
 	adrp	x20, .LANCHOR221
 	strb	wzr, [x1, #:lo12:.LANCHOR134]
-	adrp	x1, .LANCHOR185
+	adrp	x1, .LANCHOR182
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LANCHOR6
-	strb	w0, [x1, #:lo12:.LANCHOR185]
+	adrp	x23, .LANCHOR8
+	strb	w0, [x1, #:lo12:.LANCHOR182]
 	adrp	x0, .LANCHOR129
 	mov	w1, -1
 	stp	x27, x28, [sp, 80]
 	strb	wzr, [x0, #:lo12:.LANCHOR129]
 	adrp	x0, .LANCHOR238
 	str	w1, [x0, #:lo12:.LANCHOR238]
-	adrp	x1, .LC239
-	adrp	x0, .LC104
-	add	x1, x1, :lo12:.LC239
-	add	x0, x0, :lo12:.LC104
+	adrp	x1, .LC242
+	adrp	x0, .LC101
+	add	x1, x1, :lo12:.LC242
+	add	x0, x0, :lo12:.LC101
 	bl	printf
-	adrp	x1, .LANCHOR33
-	add	x1, x1, :lo12:.LANCHOR33
-	adrp	x0, .LANCHOR79
+	adrp	x1, .LANCHOR32
+	add	x1, x1, :lo12:.LANCHOR32
+	adrp	x0, .LANCHOR78
 	adrp	x2, .LANCHOR131
 	adrp	x3, .LANCHOR112
-	adrp	x4, .LANCHOR76
+	adrp	x4, .LANCHOR75
 	ldrb	w7, [x1, 12]
-	strb	w7, [x0, #:lo12:.LANCHOR79]
+	strb	w7, [x0, #:lo12:.LANCHOR78]
 	ldrb	w0, [x1, 9]
 	strb	w0, [x2, #:lo12:.LANCHOR131]
-	adrp	x2, .LANCHOR86
+	adrp	x2, .LANCHOR85
 	ldrh	w5, [x1, 10]
-	strh	w5, [x2, #:lo12:.LANCHOR86]
-	adrp	x2, .LANCHOR18
+	strh	w5, [x2, #:lo12:.LANCHOR85]
+	adrp	x2, .LANCHOR23
 	ldrh	w8, [x1, 14]
 	ubfiz	w6, w0, 9, 7
-	ldrb	w2, [x2, #:lo12:.LANCHOR18]
+	ldrb	w2, [x2, #:lo12:.LANCHOR23]
 	sdiv	w11, w5, w7
 	strb	w2, [x3, #:lo12:.LANCHOR112]
 	ldrb	w3, [x1, 13]
 	adrp	x1, .LANCHOR2
-	strb	w3, [x4, #:lo12:.LANCHOR76]
+	strb	w3, [x4, #:lo12:.LANCHOR75]
 	ldrh	w4, [x1, #:lo12:.LANCHOR2]
 	adrp	x1, .LANCHOR111
-	strh	w11, [x22, #:lo12:.LANCHOR95]
+	strh	w11, [x22, #:lo12:.LANCHOR94]
 	mul	w2, w2, w3
 	strh	w4, [x1, #:lo12:.LANCHOR111]
-	strh	w8, [x23, #:lo12:.LANCHOR6]
+	strh	w8, [x23, #:lo12:.LANCHOR8]
 	mov	w3, 1
 	and	w2, w2, 255
 	strh	w6, [x20, #:lo12:.LANCHOR221]
-	strb	w2, [x21, #:lo12:.LANCHOR80]
+	strb	w2, [x21, #:lo12:.LANCHOR79]
 	mov	w1, 0
-.L4038:
+.L4078:
 	cmp	w4, w3
-	bcs	.L4039
+	bcs	.L4079
 	mul	w10, w0, w5
-	adrp	x3, .LANCHOR75
+	adrp	x3, .LANCHOR74
 	sub	w1, w1, #1
 	mov	w4, 0
-	strh	w1, [x3, #:lo12:.LANCHOR75]
+	strh	w1, [x3, #:lo12:.LANCHOR74]
 	mov	w1, 1
 	mul	w3, w8, w10
 	lsr	w12, w3, 21
-.L4040:
+.L4080:
 	cmp	w12, w1
-	bcs	.L4041
+	bcs	.L4081
 	mov	w1, 57344
 	sub	w4, w4, #1
 	movk	w1, 0x1c, lsl 16
@@ -25666,16 +26306,16 @@ zftl_init:
 	adrp	x28, .LANCHOR128
 	sub	w12, w6, #1
 	mul	w1, w2, w1
-	adrp	x24, .LANCHOR204
+	adrp	x24, .LANCHOR202
 	mul	w11, w11, w2
 	adrp	x27, .LANCHOR240
 	mul	w10, w10, w2
-	adrp	x26, .LANCHOR155
+	adrp	x26, .LANCHOR152
 	lsl	w1, w1, w4
-	adrp	x4, .LANCHOR68
+	adrp	x4, .LANCHOR67
 	sub	w10, w10, #1
 	adrp	x25, .LANCHOR98
-	str	w1, [x4, #:lo12:.LANCHOR68]
+	str	w1, [x4, #:lo12:.LANCHOR67]
 	adrp	x4, .LANCHOR239
 	lsr	w8, w8, 4
 	strh	w8, [x25, #:lo12:.LANCHOR98]
@@ -25689,65 +26329,65 @@ zftl_init:
 	add	w0, w12, w0, lsl 2
 	add	w3, w3, 8
 	udiv	w0, w0, w6
-	strh	w0, [x24, #:lo12:.LANCHOR204]
+	strh	w0, [x24, #:lo12:.LANCHOR202]
 	ubfiz	w0, w0, 4, 16
 	sdiv	w0, w0, w11
-	strh	w0, [x26, #:lo12:.LANCHOR155]
+	strh	w0, [x26, #:lo12:.LANCHOR152]
 	adrp	x0, .LANCHOR101
 	str	x0, [x29, 104]
 	strh	w3, [x0, #:lo12:.LANCHOR101]
-	bhi	.L4042
+	bhi	.L4082
 	mov	w0, 80
 	strh	w0, [x25, #:lo12:.LANCHOR98]
-.L4042:
+.L4082:
 	adrp	x12, .LANCHOR126
 	mov	w0, 2000
 	adrp	x11, .LANCHOR125
-	adrp	x3, .LANCHOR152
+	adrp	x3, .LANCHOR149
 	strh	w0, [x12, #:lo12:.LANCHOR126]
 	mov	w0, 50
-	adrp	x8, .LANCHOR153
+	adrp	x8, .LANCHOR150
 	strh	w0, [x11, #:lo12:.LANCHOR125]
 	mov	w0, 256
-	strh	w0, [x3, #:lo12:.LANCHOR152]
+	strh	w0, [x3, #:lo12:.LANCHOR149]
 	mov	w0, 48
-	strh	w0, [x8, #:lo12:.LANCHOR153]
-	adrp	x0, .LANCHOR8
+	strh	w0, [x8, #:lo12:.LANCHOR150]
+	adrp	x0, .LANCHOR10
 	mov	w10, 32
 	cmp	w7, 2
 	mov	x13, x11
-	strh	w10, [x0, #:lo12:.LANCHOR8]
+	strh	w10, [x0, #:lo12:.LANCHOR10]
 	mov	x7, x12
 	mov	x14, x8
-	beq	.L4043
-	adrp	x15, .LANCHOR84
-	ldrb	w15, [x15, #:lo12:.LANCHOR84]
-	cbz	w15, .L4044
-.L4043:
+	beq	.L4083
+	adrp	x15, .LANCHOR83
+	ldrb	w15, [x15, #:lo12:.LANCHOR83]
+	cbz	w15, .L4084
+.L4083:
 	mov	w8, 150
 	strh	w8, [x13, #:lo12:.LANCHOR125]
 	mov	w8, 64
-	strh	w8, [x14, #:lo12:.LANCHOR153]
+	strh	w8, [x14, #:lo12:.LANCHOR150]
 	mov	w8, 12
-	strh	w8, [x0, #:lo12:.LANCHOR8]
+	strh	w8, [x0, #:lo12:.LANCHOR10]
 	adrp	x8, .LANCHOR0
 	ldrb	w8, [x8, #:lo12:.LANCHOR0]
-	cbnz	w8, .L4045
+	cbnz	w8, .L4085
 	mov	w8, 4
-	strh	w8, [x0, #:lo12:.LANCHOR8]
+	strh	w8, [x0, #:lo12:.LANCHOR10]
 	mov	w0, 600
 	strh	w0, [x7, #:lo12:.LANCHOR126]
 	mov	w0, 128
-	strh	w0, [x3, #:lo12:.LANCHOR152]
-.L4045:
-	adrp	x0, .LANCHOR37
-	ldrb	w0, [x0, #:lo12:.LANCHOR37]
-	cbz	w0, .L4047
+	strh	w0, [x3, #:lo12:.LANCHOR149]
+.L4085:
+	adrp	x0, .LANCHOR36
+	ldrb	w0, [x0, #:lo12:.LANCHOR36]
+	cbz	w0, .L4087
 	mov	w0, 200
 	strh	w0, [x13, #:lo12:.LANCHOR125]
 	mov	w0, 2000
 	strh	w0, [x7, #:lo12:.LANCHOR126]
-.L4047:
+.L4087:
 	adrp	x0, .LANCHOR122
 	mul	w2, w5, w2
 	mov	w3, 1
@@ -25755,186 +26395,186 @@ zftl_init:
 	adrp	x0, .LANCHOR224
 	cmp	w6, w2, lsl 2
 	strb	w3, [x0, #:lo12:.LANCHOR224]
-	bge	.L4049
+	bge	.L4089
 	mov	w2, 2
 	strb	w2, [x0, #:lo12:.LANCHOR224]
-.L4049:
-	adrp	x19, .LANCHOR14
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L4050
+.L4089:
+	adrp	x19, .LANCHOR19
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L4090
 	str	x4, [x29, 96]
-	adrp	x0, .LC240
-	add	x0, x0, :lo12:.LC240
-	bl	printf
-	ldr	x4, [x29, 96]
-.L4050:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L4051
-	ldr	w1, [x4, #:lo12:.LANCHOR239]
-	adrp	x0, .LC241
-	add	x0, x0, :lo12:.LC241
-	bl	printf
-.L4051:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L4052
-	ldr	w1, [x28, #:lo12:.LANCHOR128]
-	adrp	x0, .LC242
-	add	x0, x0, :lo12:.LC242
-	bl	printf
-.L4052:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L4053
-	ldr	w1, [x27, #:lo12:.LANCHOR240]
 	adrp	x0, .LC243
 	add	x0, x0, :lo12:.LC243
 	bl	printf
-.L4053:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L4054
-	ldrh	w1, [x24, #:lo12:.LANCHOR204]
+	ldr	x4, [x29, 96]
+.L4090:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L4091
+	ldr	w1, [x4, #:lo12:.LANCHOR239]
 	adrp	x0, .LC244
 	add	x0, x0, :lo12:.LC244
 	bl	printf
-.L4054:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L4055
-	ldrh	w1, [x20, #:lo12:.LANCHOR221]
+.L4091:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L4092
+	ldr	w1, [x28, #:lo12:.LANCHOR128]
 	adrp	x0, .LC245
 	add	x0, x0, :lo12:.LC245
 	bl	printf
-.L4055:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L4056
-	ldrh	w1, [x26, #:lo12:.LANCHOR155]
+.L4092:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L4093
+	ldr	w1, [x27, #:lo12:.LANCHOR240]
 	adrp	x0, .LC246
 	add	x0, x0, :lo12:.LC246
 	bl	printf
-.L4056:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L4057
-	ldrh	w1, [x25, #:lo12:.LANCHOR98]
+.L4093:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L4094
+	ldrh	w1, [x24, #:lo12:.LANCHOR202]
 	adrp	x0, .LC247
 	add	x0, x0, :lo12:.LC247
 	bl	printf
-.L4057:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L4058
-	ldr	x0, [x29, 104]
-	ldrh	w1, [x0, #:lo12:.LANCHOR101]
+.L4094:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L4095
+	ldrh	w1, [x20, #:lo12:.LANCHOR221]
 	adrp	x0, .LC248
 	add	x0, x0, :lo12:.LC248
 	bl	printf
-.L4058:
+.L4095:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L4096
+	ldrh	w1, [x26, #:lo12:.LANCHOR152]
+	adrp	x0, .LC249
+	add	x0, x0, :lo12:.LC249
+	bl	printf
+.L4096:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L4097
+	ldrh	w1, [x25, #:lo12:.LANCHOR98]
+	adrp	x0, .LC250
+	add	x0, x0, :lo12:.LC250
+	bl	printf
+.L4097:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L4098
+	ldr	x0, [x29, 104]
+	ldrh	w1, [x0, #:lo12:.LANCHOR101]
+	adrp	x0, .LC251
+	add	x0, x0, :lo12:.LC251
+	bl	printf
+.L4098:
 	bl	zbuf_init
-	adrp	x25, .LANCHOR200
+	adrp	x25, .LANCHOR197
 	mov	w0, 16384
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR195
-	str	x0, [x1, #:lo12:.LANCHOR195]
+	adrp	x1, .LANCHOR192
+	str	x0, [x1, #:lo12:.LANCHOR192]
 	mov	w0, 16384
 	bl	ftl_malloc
-	str	x0, [x25, #:lo12:.LANCHOR200]
+	str	x0, [x25, #:lo12:.LANCHOR197]
 	mov	w0, 16384
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR190
-	str	x0, [x1, #:lo12:.LANCHOR190]
+	adrp	x1, .LANCHOR187
+	str	x0, [x1, #:lo12:.LANCHOR187]
 	mov	w0, 6
-	ldrh	w1, [x23, #:lo12:.LANCHOR6]
+	ldrh	w1, [x23, #:lo12:.LANCHOR8]
 	mul	w0, w1, w0
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR4
 	str	x0, [x1, #:lo12:.LANCHOR4]
-	ldrb	w1, [x21, #:lo12:.LANCHOR80]
-	ldrh	w0, [x22, #:lo12:.LANCHOR95]
+	ldrb	w1, [x21, #:lo12:.LANCHOR79]
+	ldrh	w0, [x22, #:lo12:.LANCHOR94]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR118
-	ldr	x2, [x25, #:lo12:.LANCHOR200]
-	adrp	x25, .LANCHOR10
+	ldr	x2, [x25, #:lo12:.LANCHOR197]
+	adrp	x25, .LANCHOR12
 	str	x0, [x1, #:lo12:.LANCHOR118]
 	adrp	x0, .LANCHOR117
-	ldrh	w1, [x22, #:lo12:.LANCHOR95]
+	ldrh	w1, [x22, #:lo12:.LANCHOR94]
 	str	x2, [x0, #:lo12:.LANCHOR117]
-	ldrb	w0, [x21, #:lo12:.LANCHOR80]
+	ldrb	w0, [x21, #:lo12:.LANCHOR79]
 	mul	w1, w1, w0
 	lsl	w0, w1, 1
-	adrp	x1, .LANCHOR9
+	adrp	x1, .LANCHOR11
 	add	x3, x2, x0, sxtw 2
-	str	x3, [x1, #:lo12:.LANCHOR9]
-	ldrh	w1, [x23, #:lo12:.LANCHOR6]
+	str	x3, [x1, #:lo12:.LANCHOR11]
+	ldrh	w1, [x23, #:lo12:.LANCHOR8]
 	add	w1, w0, w1, lsr 1
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
 	add	x1, x2, x1, sxtw 2
-	str	x1, [x25, #:lo12:.LANCHOR10]
-	tbz	x0, 12, .L4059
-	adrp	x0, .LC249
-	add	x0, x0, :lo12:.LC249
+	str	x1, [x25, #:lo12:.LANCHOR12]
+	tbz	x0, 12, .L4099
+	adrp	x0, .LC252
+	add	x0, x0, :lo12:.LC252
 	bl	printf
-.L4059:
-	ldrh	w0, [x22, #:lo12:.LANCHOR95]
-	ldrb	w21, [x21, #:lo12:.LANCHOR80]
-	ldrh	w1, [x23, #:lo12:.LANCHOR6]
-	ldrh	w22, [x24, #:lo12:.LANCHOR204]
+.L4099:
+	ldrh	w0, [x22, #:lo12:.LANCHOR94]
+	ldrb	w21, [x21, #:lo12:.LANCHOR79]
+	ldrh	w1, [x23, #:lo12:.LANCHOR8]
+	ldrh	w22, [x24, #:lo12:.LANCHOR202]
 	mul	w21, w0, w21
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
 	add	w21, w1, w21, lsl 2
 	lsl	w1, w1, 2
 	lsl	w21, w21, 1
 	add	w22, w1, w22, lsl 2
 	add	w21, w21, 632
 	add	w22, w22, 704
-	tbz	x0, 12, .L4060
+	tbz	x0, 12, .L4100
 	ldrh	w3, [x20, #:lo12:.LANCHOR221]
-	adrp	x0, .LC250
+	adrp	x0, .LC253
 	mov	w2, w22
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC250
+	add	x0, x0, :lo12:.LC253
 	bl	printf
-.L4060:
+.L4100:
 	ldrh	w0, [x20, #:lo12:.LANCHOR221]
 	cmp	w21, w0
-	bhi	.L4061
+	bhi	.L4101
 	cmp	w22, w0
-	bls	.L4062
-.L4061:
-.L4115:
-	b	.L4115
-.L4039:
+	bls	.L4102
+.L4101:
+.L4155:
+	b	.L4155
+.L4079:
 	add	w1, w1, 1
 	lsl	w3, w3, 1
 	and	w1, w1, 65535
-	b	.L4038
-.L4041:
+	b	.L4078
+.L4081:
 	add	w4, w4, 1
 	lsl	w1, w1, 1
 	and	w4, w4, 65535
-	b	.L4040
-.L4044:
-	adrp	x0, .LANCHOR36
-	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbz	w0, .L4047
+	b	.L4080
+.L4084:
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbz	w0, .L4087
 	mov	w0, 1200
 	strh	w10, [x11, #:lo12:.LANCHOR125]
 	strh	w0, [x12, #:lo12:.LANCHOR126]
-	strh	w10, [x8, #:lo12:.LANCHOR153]
-	b	.L4047
-.L4062:
+	strh	w10, [x8, #:lo12:.LANCHOR150]
+	b	.L4087
+.L4102:
 	bl	sblk_init
 	bl	ftl_info_blk_init
 	cmn	w0, #1
-	beq	.L4037
+	beq	.L4077
 	bl	ftl_ext_info_init
 	adrp	x19, .LANCHOR110
 	bl	gc_init
 	mov	w0, 1
 	bl	pm_init
 	bl	lpa_rebuild_hash
-	ldr	x0, [x25, #:lo12:.LANCHOR10]
+	ldr	x0, [x25, #:lo12:.LANCHOR12]
 	mov	x1, 0
 	add	x0, x0, 16
 	bl	ftl_open_sblk_recovery
-	ldr	x0, [x25, #:lo12:.LANCHOR10]
+	ldr	x0, [x25, #:lo12:.LANCHOR12]
 	add	x1, x0, 16
 	add	x0, x0, 48
 	bl	ftl_open_sblk_recovery
@@ -25942,44 +26582,44 @@ zftl_init:
 	ldr	w0, [x1, 8]
 	add	w0, w0, 16
 	str	w0, [x1, 8]
-	ldr	x0, [x25, #:lo12:.LANCHOR10]
+	ldr	x0, [x25, #:lo12:.LANCHOR12]
 	add	x0, x0, 16
 	bl	ftl_info_data_recovery
-	ldr	x0, [x25, #:lo12:.LANCHOR10]
+	ldr	x0, [x25, #:lo12:.LANCHOR12]
 	add	x0, x0, 48
 	bl	ftl_info_data_recovery
-	ldr	x0, [x25, #:lo12:.LANCHOR10]
+	ldr	x0, [x25, #:lo12:.LANCHOR12]
 	add	x0, x0, 80
 	bl	ftl_info_data_recovery
 	bl	gc_recovery
 	bl	pm_flush
 	mov	w0, 1
 	bl	ftl_total_vpn_update
-	adrp	x0, .LANCHOR198
-	ldrb	w0, [x0, #:lo12:.LANCHOR198]
-	cbz	w0, .L4064
+	adrp	x0, .LANCHOR195
+	ldrb	w0, [x0, #:lo12:.LANCHOR195]
+	cbz	w0, .L4104
 	ldr	x1, [x19, #:lo12:.LANCHOR110]
 	ldr	w0, [x1, 68]
 	add	w0, w0, 1
 	str	w0, [x1, 68]
-.L4064:
+.L4104:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
 	bl	print_ftl_debug_info
-	ldr	x0, [x25, #:lo12:.LANCHOR10]
+	ldr	x0, [x25, #:lo12:.LANCHOR12]
 	ldrh	w0, [x0, 124]
-	cbnz	w0, .L4071
+	cbnz	w0, .L4111
 	adrp	x0, .LANCHOR103
 	adrp	x1, .LANCHOR107
 	ldrh	w0, [x0, #:lo12:.LANCHOR103]
 	ldrh	w1, [x1, #:lo12:.LANCHOR107]
 	add	w0, w0, w1
 	cmp	w0, 7
-	ble	.L4071
-.L4067:
+	ble	.L4111
+.L4107:
 	mov	w0, 0
-.L4037:
+.L4077:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -25987,35 +26627,35 @@ zftl_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L4071:
+.L4111:
 	adrp	x20, .LANCHOR103
 	adrp	x21, .LANCHOR107
 	add	x20, x20, :lo12:.LANCHOR103
 	add	x21, x21, :lo12:.LANCHOR107
 	mov	w19, 16384
-.L4068:
+.L4108:
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
 	mov	w1, 1
 	mov	w0, w1
 	bl	zftl_do_gc
-	ldr	x0, [x25, #:lo12:.LANCHOR10]
+	ldr	x0, [x25, #:lo12:.LANCHOR12]
 	ldrh	w1, [x0, 124]
-	cbnz	w1, .L4066
+	cbnz	w1, .L4106
 	ldrh	w1, [x0, 80]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L4066
+	bne	.L4106
 	ldrh	w0, [x20]
 	ldrh	w1, [x21]
 	add	w0, w0, w1
 	cmp	w0, 7
-	bgt	.L4067
-.L4066:
+	bgt	.L4107
+.L4106:
 	subs	w19, w19, #1
-	bne	.L4068
-	b	.L4067
+	bne	.L4108
+	b	.L4107
 	.size	zftl_init, .-zftl_init
 	.section	.text.rk_ftl_init,"ax",@progbits
 	.align	2
@@ -26026,14 +26666,14 @@ rk_ftl_init:
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	bl	nand_flash_init
-	cbnz	w0, .L4119
+	cbnz	w0, .L4159
 	bl	zftl_init
-.L4119:
+.L4159:
 	mov	w19, w0
 	bl	idb_init
 	mov	w1, w19
-	adrp	x0, .LC251
-	add	x0, x0, :lo12:.LC251
+	adrp	x0, .LC254
+	add	x0, x0, :lo12:.LC254
 	bl	printf
 	mov	w0, w19
 	ldr	x19, [sp, 16]
@@ -26049,44 +26689,44 @@ zftl_write:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w19, w0
-	adrp	x0, .LANCHOR14
+	adrp	x0, .LANCHOR19
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	mov	w20, w1
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
 	mov	w21, w2
 	stp	x23, x24, [sp, 48]
 	mov	x25, x3
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L4122
+	tbz	x0, 12, .L4162
 	ldr	w4, [x25]
 	mov	w3, w2
-	adrp	x0, .LC252
+	adrp	x0, .LC255
 	mov	w2, w1
-	add	x0, x0, :lo12:.LC252
+	add	x0, x0, :lo12:.LC255
 	mov	w1, w19
 	bl	printf
-.L4122:
-	cbnz	w19, .L4123
-	adrp	x0, .LANCHOR68
+.L4162:
+	cbnz	w19, .L4163
+	adrp	x0, .LANCHOR67
 	mov	w19, 24576
-	ldr	w0, [x0, #:lo12:.LANCHOR68]
-.L4124:
+	ldr	w0, [x0, #:lo12:.LANCHOR67]
+.L4164:
 	cmp	w0, w20
 	ccmp	w0, w21, 0, hi
-	bcc	.L4142
+	bcc	.L4182
 	add	w1, w20, w21
 	cmp	w0, w1
-	bcc	.L4142
+	bcc	.L4182
 	adrp	x26, .LANCHOR131
 	add	w19, w19, w20
 	sub	w22, w21, #1
-	adrp	x27, .LANCHOR67
+	adrp	x27, .LANCHOR66
 	ldrb	w0, [x26, #:lo12:.LANCHOR131]
 	add	w22, w22, w19
-	adrp	x28, .LANCHOR58
-	add	x27, x27, :lo12:.LANCHOR67
-	add	x28, x28, :lo12:.LANCHOR58
+	adrp	x28, .LANCHOR57
+	add	x27, x27, :lo12:.LANCHOR66
+	add	x28, x28, :lo12:.LANCHOR57
 	udiv	w24, w19, w0
 	udiv	w22, w22, w0
 	add	x0, x26, :lo12:.LANCHOR131
@@ -26094,8 +26734,8 @@ zftl_write:
 	mov	w20, w24
 	sub	w23, w22, w24
 	add	w23, w23, 1
-.L4126:
-	cbnz	w23, .L4135
+.L4166:
+	cbnz	w23, .L4175
 	bl	ftl_write_commit
 	adrp	x20, .LANCHOR103
 	bl	ftl_flush
@@ -26103,30 +26743,30 @@ zftl_write:
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
-	adrp	x0, .LANCHOR10
-	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	adrp	x0, .LANCHOR12
+	ldr	x0, [x0, #:lo12:.LANCHOR12]
 	ldrh	w0, [x0, 124]
-	cbnz	w0, .L4136
+	cbnz	w0, .L4176
 	ldrh	w0, [x20, #:lo12:.LANCHOR103]
 	ldrh	w1, [x19, #:lo12:.LANCHOR107]
 	add	w0, w0, w1
 	cmp	w0, 11
-	bgt	.L4137
-.L4136:
+	bgt	.L4177
+.L4176:
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
-.L4137:
+.L4177:
 	add	x20, x20, :lo12:.LANCHOR103
 	add	x19, x19, :lo12:.LANCHOR107
-.L4138:
+.L4178:
 	ldrh	w0, [x20]
 	ldrh	w1, [x19]
 	add	w0, w0, w1
 	cmp	w0, 7
-	ble	.L4139
+	ble	.L4179
 	mov	w0, 0
-.L4121:
+.L4161:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -26134,36 +26774,36 @@ zftl_write:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L4123:
+.L4163:
 	cmp	w19, 3
-	bhi	.L4142
+	bhi	.L4182
 	lsl	w19, w19, 13
 	mov	w0, 8192
-	b	.L4124
-.L4135:
+	b	.L4164
+.L4175:
 	ldrb	w0, [x27]
-	cbz	w0, .L4127
+	cbz	w0, .L4167
 	ldrb	w0, [x28]
 	cmp	w0, 2
-	bhi	.L4127
+	bhi	.L4167
 	bl	ftl_write_commit
-.L4127:
+.L4167:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x26, x0
-	cbnz	x0, .L4128
+	cbnz	x0, .L4168
 	bl	ftl_write_commit
-	b	.L4126
-.L4128:
+	b	.L4166
+.L4168:
 	strb	wzr, [x0, 57]
 	cmp	w20, w24
 	ldr	x0, [x29, 104]
 	ccmp	w20, w22, 4, ne
 	ldrb	w0, [x0]
 	strb	w0, [x26, 56]
-	bne	.L4131
+	bne	.L4171
 	cmp	w20, w24
-	bne	.L4132
+	bne	.L4172
 	udiv	w1, w19, w0
 	msub	w1, w1, w0, w19
 	and	w1, w1, 255
@@ -26172,9 +26812,9 @@ zftl_write:
 	and	w0, w0, 255
 	cmp	w21, w0
 	csel	w0, w21, w0, cc
-.L4150:
+.L4190:
 	strb	w0, [x26, 56]
-.L4131:
+.L4171:
 	ldr	x4, [x26, 8]
 	mov	x1, x25
 	ldrb	w0, [x26, 57]
@@ -26197,22 +26837,22 @@ zftl_write:
 	ldrb	w0, [x26, 56]
 	ubfiz	x0, x0, 9, 8
 	add	x25, x25, x0
-	b	.L4126
-.L4132:
+	b	.L4166
+.L4172:
 	add	w1, w19, w21
 	msub	w0, w0, w20, w1
-	b	.L4150
-.L4139:
+	b	.L4190
+.L4179:
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
 	mov	w1, 1
 	mov	w0, w1
 	bl	zftl_do_gc
-	b	.L4138
-.L4142:
+	b	.L4178
+.L4182:
 	mov	w0, -1
-	b	.L4121
+	b	.L4161
 	.size	zftl_write, .-zftl_write
 	.section	.text.zftl_sys_write,"ax",@progbits
 	.align	2
@@ -26260,12 +26900,12 @@ ftl_write:
 	mov	x20, x3
 	mov	w22, w1
 	ands	w21, w0, 255
-	bne	.L4155
+	bne	.L4195
 	mov	w3, w2
 	mov	w0, 0
 	mov	x2, x20
 	bl	idb_write_data
-.L4155:
+.L4195:
 	mov	x3, x20
 	mov	w2, w19
 	mov	w1, w22
@@ -26302,34 +26942,34 @@ zftl_discard:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w19, w1
-	adrp	x1, .LANCHOR68
+	adrp	x1, .LANCHOR67
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	ldr	w1, [x1, #:lo12:.LANCHOR68]
+	ldr	w1, [x1, #:lo12:.LANCHOR67]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	cmp	w0, w1
 	ccmp	w19, w1, 2, cc
-	bhi	.L4181
+	bhi	.L4221
 	add	w2, w0, w19
 	cmp	w1, w2
-	bcc	.L4181
+	bcc	.L4221
 	adrp	x24, .LANCHOR241
 	add	w22, w0, 24576
-	adrp	x0, .LANCHOR14
+	adrp	x0, .LANCHOR19
 	str	x0, [x29, 104]
 	ldr	w1, [x24, #:lo12:.LANCHOR241]
-	ldr	w2, [x0, #:lo12:.LANCHOR14]
+	ldr	w2, [x0, #:lo12:.LANCHOR19]
 	add	w1, w19, w1
 	str	w1, [x24, #:lo12:.LANCHOR241]
-	tbz	x2, 12, .L4161
-	adrp	x0, .LC253
+	tbz	x2, 12, .L4201
+	adrp	x0, .LC256
 	mov	w4, 0
 	mov	w3, w19
 	mov	w2, w22
-	add	x0, x0, :lo12:.LC253
+	add	x0, x0, :lo12:.LC256
 	bl	printf
-.L4161:
+.L4201:
 	adrp	x23, .LANCHOR110
 	adrp	x26, .LANCHOR131
 	ldr	x0, [x23, #:lo12:.LANCHOR110]
@@ -26341,7 +26981,7 @@ zftl_discard:
 	ldrb	w21, [x26, #:lo12:.LANCHOR131]
 	udiv	w20, w22, w21
 	msub	w25, w20, w21, w22
-	cbz	w25, .L4162
+	cbz	w25, .L4202
 	sub	w21, w21, w25
 	mov	w0, w20
 	cmp	w21, w19
@@ -26349,20 +26989,20 @@ zftl_discard:
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	bne	.L4163
+	bne	.L4203
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
-.L4163:
+.L4203:
 	ldr	w0, [x29, 120]
 	and	w28, w21, 65535
 	cmn	w0, #1
-	beq	.L4165
+	beq	.L4205
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x3, x0
-	cbz	x0, .L4165
+	cbz	x0, .L4205
 	strb	w25, [x0, 57]
 	ubfiz	x25, x25, 9, 25
 	strb	w21, [x0, 56]
@@ -26381,53 +27021,53 @@ zftl_discard:
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L4165:
+.L4205:
 	add	w20, w20, 1
 	sub	w19, w19, w28
-.L4162:
-	cbz	w19, .L4167
+.L4202:
+	cbz	w19, .L4207
 	bl	ftl_flush
-.L4167:
-	adrp	x25, .LANCHOR75
+.L4207:
+	adrp	x25, .LANCHOR74
 	add	x21, x26, :lo12:.LANCHOR131
-	add	x25, x25, :lo12:.LANCHOR75
+	add	x25, x25, :lo12:.LANCHOR74
 	mov	w0, -1
 	str	w0, [x29, 124]
-.L4168:
+.L4208:
 	ldrb	w0, [x21]
 	cmp	w19, w0
-	bcs	.L4173
-	cbz	w19, .L4175
+	bcs	.L4213
+	cbz	w19, .L4215
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	bne	.L4176
+	bne	.L4216
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
-.L4176:
+.L4216:
 	ldr	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L4175
+	beq	.L4215
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x21, x0
-	cbz	x0, .L4175
+	cbz	x0, .L4215
 	strb	wzr, [x0, 57]
 	strb	w19, [x0, 56]
 	stp	w27, w20, [x21, 32]
 	ldrb	w0, [x26, #:lo12:.LANCHOR131]
 	cmp	w19, w0
-	bcc	.L4178
+	bcc	.L4218
 	adrp	x1, .LANCHOR242
 	adrp	x0, .LC0
-	mov	w2, 1477
+	mov	w2, 1493
 	add	x1, x1, :lo12:.LANCHOR242
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L4178:
+.L4218:
 	ldr	x0, [x21, 8]
 	lsl	w2, w19, 9
 	mov	w1, 0
@@ -26439,38 +27079,38 @@ zftl_discard:
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L4175:
+.L4215:
 	ldr	w1, [x24, #:lo12:.LANCHOR241]
 	cmp	w1, 8192
-	bls	.L4182
+	bls	.L4222
 	ldr	x0, [x29, 104]
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L4179
-	adrp	x0, .LC253
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L4219
+	adrp	x0, .LC256
 	mov	w4, 0
 	mov	w3, w19
 	mov	w2, w22
-	add	x0, x0, :lo12:.LC253
+	add	x0, x0, :lo12:.LC256
 	bl	printf
-.L4179:
+.L4219:
 	str	wzr, [x24, #:lo12:.LANCHOR241]
 	bl	flt_sys_flush
 	adrp	x0, .LANCHOR122
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR122]
-.L4182:
+.L4222:
 	mov	w0, 0
-	b	.L4159
-.L4173:
+	b	.L4199
+.L4213:
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L4169
+	beq	.L4209
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbz	x0, .L4171
+	cbz	x0, .L4211
 	ldrb	w2, [x21]
 	mov	w1, 0
 	strb	w2, [x0, 56]
@@ -26482,31 +27122,31 @@ zftl_discard:
 	mov	x0, x28
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-.L4208:
+.L4248:
 	ldr	x1, [x23, #:lo12:.LANCHOR110]
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L4171:
+.L4211:
 	ldrb	w0, [x21]
 	add	w20, w20, 1
 	sub	w19, w19, w0
-	b	.L4168
-.L4169:
+	b	.L4208
+.L4209:
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
 	ldr	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L4171
+	beq	.L4211
 	add	x1, x29, 124
 	mov	w2, 1
 	mov	w0, w20
 	bl	pm_log2phys
-	adrp	x0, .LANCHOR32
+	adrp	x0, .LANCHOR31
 	ldrh	w2, [x25]
-	ldrb	w1, [x0, #:lo12:.LANCHOR32]
+	ldrb	w1, [x0, #:lo12:.LANCHOR31]
 	mov	w0, 24
 	sub	w0, w0, w1
 	sub	w1, w0, w2
@@ -26516,14 +27156,14 @@ zftl_discard:
 	sub	w0, w0, #1
 	lsr	w1, w1, w2
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR76
-	ldrb	w1, [x1, #:lo12:.LANCHOR76]
+	adrp	x1, .LANCHOR75
+	ldrb	w1, [x1, #:lo12:.LANCHOR75]
 	udiv	w0, w0, w1
 	bl	ftl_vpn_decrement
-	b	.L4208
-.L4181:
+	b	.L4248
+.L4221:
 	mov	w0, -1
-.L4159:
+.L4199:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -26548,47 +27188,47 @@ ftl_discard:
 dump_pm_blk:
 	stp	x29, x30, [sp, -48]!
 	mov	w2, 4
-	adrp	x0, .LC254
-	add	x0, x0, :lo12:.LC254
+	adrp	x0, .LC257
+	add	x0, x0, :lo12:.LC257
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x20, .LANCHOR110
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR155
+	adrp	x21, .LANCHOR152
 	ldr	x1, [x20, #:lo12:.LANCHOR110]
 	mov	w19, 0
 	mov	w22, 65535
 	add	x1, x1, 704
 	ldrh	w3, [x1, -6]
 	bl	rknand_print_hex
-	ldrh	w3, [x21, #:lo12:.LANCHOR155]
-	add	x21, x21, :lo12:.LANCHOR155
+	ldrh	w3, [x21, #:lo12:.LANCHOR152]
+	add	x21, x21, :lo12:.LANCHOR152
 	ldr	x1, [x20, #:lo12:.LANCHOR110]
 	mov	w2, 2
-	adrp	x0, .LC255
-	add	x0, x0, :lo12:.LC255
+	adrp	x0, .LC258
+	add	x0, x0, :lo12:.LC258
 	add	x1, x1, 416
 	bl	rknand_print_hex
-.L4211:
+.L4251:
 	ldrh	w0, [x21]
 	cmp	w0, w19
-	bhi	.L4213
+	bhi	.L4253
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L4213:
+.L4253:
 	ldr	x0, [x20, #:lo12:.LANCHOR110]
 	add	x0, x0, x19, sxtw 1
 	ldrh	w0, [x0, 416]
 	cmp	w0, w22
-	beq	.L4212
+	beq	.L4252
 	mov	x1, 0
 	bl	ftl_sblk_dump
-.L4212:
+.L4252:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L4211
+	b	.L4251
 	.size	dump_pm_blk, .-dump_pm_blk
 	.global	g_pm_spare
 	.global	pm_first_write
@@ -26756,21 +27396,21 @@ dump_pm_blk:
 	.global	g_flash_page_buffer
 	.section	.bss.IDByte,"aw",@nobits
 	.align	2
-	.set	.LANCHOR48,. + 0
+	.set	.LANCHOR47,. + 0
 	.type	IDByte, %object
 	.size	IDByte, 32
 IDByte:
 	.zero	32
 	.section	.bss._c_ftl_blk_pre_plane,"aw",@nobits
 	.align	1
-	.set	.LANCHOR6,. + 0
+	.set	.LANCHOR8,. + 0
 	.type	_c_ftl_blk_pre_plane, %object
 	.size	_c_ftl_blk_pre_plane, 2
 _c_ftl_blk_pre_plane:
 	.zero	2
 	.section	.bss._c_ftl_block_addr_log2,"aw",@nobits
 	.align	1
-	.set	.LANCHOR75,. + 0
+	.set	.LANCHOR74,. + 0
 	.type	_c_ftl_block_addr_log2, %object
 	.size	_c_ftl_block_addr_log2, 2
 _c_ftl_block_addr_log2:
@@ -26790,7 +27430,7 @@ _c_ftl_block_align_addr:
 _c_ftl_byte_pre_page:
 	.zero	2
 	.section	.bss._c_ftl_cs_bits,"aw",@nobits
-	.set	.LANCHOR32,. + 0
+	.set	.LANCHOR31,. + 0
 	.type	_c_ftl_cs_bits, %object
 	.size	_c_ftl_cs_bits, 1
 _c_ftl_cs_bits:
@@ -26808,40 +27448,40 @@ _c_ftl_nand_blks_per_die:
 _c_ftl_nand_die_num:
 	.zero	1
 	.section	.bss._c_ftl_nand_planes_num,"aw",@nobits
-	.set	.LANCHOR80,. + 0
+	.set	.LANCHOR79,. + 0
 	.type	_c_ftl_nand_planes_num, %object
 	.size	_c_ftl_nand_planes_num, 1
 _c_ftl_nand_planes_num:
 	.zero	1
 	.section	.bss._c_ftl_nand_type,"aw",@nobits
-	.set	.LANCHOR79,. + 0
+	.set	.LANCHOR78,. + 0
 	.type	_c_ftl_nand_type, %object
 	.size	_c_ftl_nand_type, 1
 _c_ftl_nand_type:
 	.zero	1
 	.section	.bss._c_ftl_page_pre_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR86,. + 0
+	.set	.LANCHOR85,. + 0
 	.type	_c_ftl_page_pre_blk, %object
 	.size	_c_ftl_page_pre_blk, 2
 _c_ftl_page_pre_blk:
 	.zero	2
 	.section	.bss._c_ftl_page_pre_slc_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR95,. + 0
+	.set	.LANCHOR94,. + 0
 	.type	_c_ftl_page_pre_slc_blk, %object
 	.size	_c_ftl_page_pre_slc_blk, 2
 _c_ftl_page_pre_slc_blk:
 	.zero	2
 	.section	.bss._c_ftl_planes_per_die,"aw",@nobits
-	.set	.LANCHOR76,. + 0
+	.set	.LANCHOR75,. + 0
 	.type	_c_ftl_planes_per_die, %object
 	.size	_c_ftl_planes_per_die, 1
 _c_ftl_planes_per_die:
 	.zero	1
 	.section	.bss._c_ftl_pm_page_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR204,. + 0
+	.set	.LANCHOR202,. + 0
 	.type	_c_ftl_pm_page_num, %object
 	.size	_c_ftl_pm_page_num, 2
 _c_ftl_pm_page_num:
@@ -26854,7 +27494,7 @@ _c_ftl_sec_per_page:
 	.zero	1
 	.section	.bss._c_max_pm_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR155,. + 0
+	.set	.LANCHOR152,. + 0
 	.type	_c_max_pm_sblk, %object
 	.size	_c_max_pm_sblk, 2
 _c_max_pm_sblk:
@@ -26875,21 +27515,21 @@ _c_mix_max_xlc_ec_count:
 	.zero	2
 	.section	.bss._c_slc_to_xlc_ec_ratio,"aw",@nobits
 	.align	1
-	.set	.LANCHOR8,. + 0
+	.set	.LANCHOR10,. + 0
 	.type	_c_slc_to_xlc_ec_ratio, %object
 	.size	_c_slc_to_xlc_ec_ratio, 2
 _c_slc_to_xlc_ec_ratio:
 	.zero	2
 	.section	.bss._c_swl_slc_gc_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR152,. + 0
+	.set	.LANCHOR149,. + 0
 	.type	_c_swl_slc_gc_th, %object
 	.size	_c_swl_slc_gc_th, 2
 _c_swl_slc_gc_th:
 	.zero	2
 	.section	.bss._c_swl_xlc_gc_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR153,. + 0
+	.set	.LANCHOR150,. + 0
 	.type	_c_swl_xlc_gc_th, %object
 	.size	_c_swl_xlc_gc_th, 2
 _c_swl_xlc_gc_th:
@@ -26917,7 +27557,7 @@ _c_totle_phy_density:
 	.zero	4
 	.section	.bss._c_user_data_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR68,. + 0
+	.set	.LANCHOR67,. + 0
 	.type	_c_user_data_density, %object
 	.size	_c_user_data_density, 4
 _c_user_data_density:
@@ -26970,27 +27610,27 @@ discard_sector_count:
 	.zero	4
 	.section	.bss.fill_spare_size,"aw",@nobits
 	.align	1
-	.set	.LANCHOR54,. + 0
+	.set	.LANCHOR53,. + 0
 	.type	fill_spare_size, %object
 	.size	fill_spare_size, 2
 fill_spare_size:
 	.zero	2
 	.section	.bss.flash_ddr_tuning_sdr_read_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR172,. + 0
+	.set	.LANCHOR169,. + 0
 	.type	flash_ddr_tuning_sdr_read_count, %object
 	.size	flash_ddr_tuning_sdr_read_count, 4
 flash_ddr_tuning_sdr_read_count:
 	.zero	4
 	.section	.bss.flash_read_retry,"aw",@nobits
 	.align	3
-	.set	.LANCHOR174,. + 0
+	.set	.LANCHOR171,. + 0
 	.type	flash_read_retry, %object
 	.size	flash_read_retry, 8
 flash_read_retry:
 	.zero	8
 	.section	.bss.free_buf_count,"aw",@nobits
-	.set	.LANCHOR58,. + 0
+	.set	.LANCHOR57,. + 0
 	.type	free_buf_count, %object
 	.size	free_buf_count, 1
 free_buf_count:
@@ -27018,13 +27658,13 @@ free_xlc_sblk:
 	.zero	2
 	.section	.bss.ftl_ext_info_data_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR200,. + 0
+	.set	.LANCHOR197,. + 0
 	.type	ftl_ext_info_data_buffer, %object
 	.size	ftl_ext_info_data_buffer, 8
 ftl_ext_info_data_buffer:
 	.zero	8
 	.section	.bss.ftl_ext_info_first_write,"aw",@nobits
-	.set	.LANCHOR199,. + 0
+	.set	.LANCHOR196,. + 0
 	.type	ftl_ext_info_first_write, %object
 	.size	ftl_ext_info_first_write, 1
 ftl_ext_info_first_write:
@@ -27038,27 +27678,27 @@ ftl_flush_jiffies:
 	.zero	4
 	.section	.bss.ftl_info_data_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR195,. + 0
+	.set	.LANCHOR192,. + 0
 	.type	ftl_info_data_buffer, %object
 	.size	ftl_info_data_buffer, 8
 ftl_info_data_buffer:
 	.zero	8
 	.section	.bss.ftl_info_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR193,. + 0
+	.set	.LANCHOR190,. + 0
 	.type	ftl_info_spare, %object
 	.size	ftl_info_spare, 256
 ftl_info_spare:
 	.zero	256
 	.section	.bss.ftl_low_format_cur_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR69,. + 0
+	.set	.LANCHOR68,. + 0
 	.type	ftl_low_format_cur_blk, %object
 	.size	ftl_low_format_cur_blk, 2
 ftl_low_format_cur_blk:
 	.zero	2
 	.section	.bss.ftl_power_lost_flag,"aw",@nobits
-	.set	.LANCHOR198,. + 0
+	.set	.LANCHOR195,. + 0
 	.type	ftl_power_lost_flag, %object
 	.size	ftl_power_lost_flag, 1
 ftl_power_lost_flag:
@@ -27072,7 +27712,7 @@ ftl_sblk_lpa_tbl:
 	.zero	8
 	.section	.bss.ftl_sblk_update_list,"aw",@nobits
 	.align	3
-	.set	.LANCHOR74,. + 0
+	.set	.LANCHOR73,. + 0
 	.type	ftl_sblk_update_list, %object
 	.size	ftl_sblk_update_list, 16
 ftl_sblk_update_list:
@@ -27086,34 +27726,34 @@ ftl_sblk_update_list_offset:
 	.zero	2
 	.section	.bss.ftl_sblk_vpn,"aw",@nobits
 	.align	3
-	.set	.LANCHOR9,. + 0
+	.set	.LANCHOR11,. + 0
 	.type	ftl_sblk_vpn, %object
 	.size	ftl_sblk_vpn, 8
 ftl_sblk_vpn:
 	.zero	8
 	.section	.bss.ftl_sblk_vpn_update_id,"aw",@nobits
 	.align	1
-	.set	.LANCHOR73,. + 0
+	.set	.LANCHOR72,. + 0
 	.type	ftl_sblk_vpn_update_id, %object
 	.size	ftl_sblk_vpn_update_id, 2
 ftl_sblk_vpn_update_id:
 	.zero	2
 	.section	.bss.ftl_sys_info_first_write,"aw",@nobits
-	.set	.LANCHOR197,. + 0
+	.set	.LANCHOR194,. + 0
 	.type	ftl_sys_info_first_write, %object
 	.size	ftl_sys_info_first_write, 1
 ftl_sys_info_first_write:
 	.zero	1
 	.section	.bss.ftl_tmp_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR190,. + 0
+	.set	.LANCHOR187,. + 0
 	.type	ftl_tmp_buffer, %object
 	.size	ftl_tmp_buffer, 8
 ftl_tmp_buffer:
 	.zero	8
 	.section	.bss.ftl_tmp_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR191,. + 0
+	.set	.LANCHOR188,. + 0
 	.type	ftl_tmp_spare, %object
 	.size	ftl_tmp_spare, 256
 ftl_tmp_spare:
@@ -27134,33 +27774,33 @@ g_block_align_addr:
 	.zero	2
 	.section	.bss.g_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR56,. + 0
+	.set	.LANCHOR55,. + 0
 	.type	g_buf, %object
 	.size	g_buf, 2048
 g_buf:
 	.zero	2048
 	.section	.bss.g_die_addr,"aw",@nobits
 	.align	2
-	.set	.LANCHOR148,. + 0
+	.set	.LANCHOR145,. + 0
 	.type	g_die_addr, %object
 	.size	g_die_addr, 32
 g_die_addr:
 	.zero	32
 	.section	.bss.g_die_cs_idx,"aw",@nobits
 	.align	2
-	.set	.LANCHOR30,. + 0
+	.set	.LANCHOR29,. + 0
 	.type	g_die_cs_idx, %object
 	.size	g_die_cs_idx, 8
 g_die_cs_idx:
 	.zero	8
 	.section	.bss.g_flash_3d_mlc_flag,"aw",@nobits
-	.set	.LANCHOR81,. + 0
+	.set	.LANCHOR80,. + 0
 	.type	g_flash_3d_mlc_flag, %object
 	.size	g_flash_3d_mlc_flag, 1
 g_flash_3d_mlc_flag:
 	.zero	1
 	.section	.bss.g_flash_3d_tlc_flag,"aw",@nobits
-	.set	.LANCHOR84,. + 0
+	.set	.LANCHOR83,. + 0
 	.type	g_flash_3d_tlc_flag, %object
 	.size	g_flash_3d_tlc_flag, 1
 g_flash_3d_tlc_flag:
@@ -27174,13 +27814,13 @@ g_flash_blk_info:
 	.zero	4
 	.section	.bss.g_flash_cur_mode,"aw",@nobits
 	.align	3
-	.set	.LANCHOR34,. + 0
+	.set	.LANCHOR33,. + 0
 	.type	g_flash_cur_mode, %object
 	.size	g_flash_cur_mode, 4
 g_flash_cur_mode:
 	.zero	4
 	.section	.bss.g_flash_interface_mode,"aw",@nobits
-	.set	.LANCHOR49,. + 0
+	.set	.LANCHOR48,. + 0
 	.type	g_flash_interface_mode, %object
 	.size	g_flash_interface_mode, 1
 g_flash_interface_mode:
@@ -27198,26 +27838,26 @@ g_flash_micron_3d_tlc_b05a:
 g_flash_micron_3d_tlc_b16a:
 	.zero	1
 	.section	.bss.g_flash_micron_3d_tlc_flag,"aw",@nobits
-	.set	.LANCHOR36,. + 0
+	.set	.LANCHOR35,. + 0
 	.type	g_flash_micron_3d_tlc_flag, %object
 	.size	g_flash_micron_3d_tlc_flag, 1
 g_flash_micron_3d_tlc_flag:
 	.zero	1
 	.section	.bss.g_flash_multi_page_prog_en,"aw",@nobits
-	.set	.LANCHOR45,. + 0
+	.set	.LANCHOR44,. + 0
 	.type	g_flash_multi_page_prog_en, %object
 	.size	g_flash_multi_page_prog_en, 1
 g_flash_multi_page_prog_en:
 	.zero	1
 	.section	.bss.g_flash_multi_page_read_en,"aw",@nobits
-	.set	.LANCHOR186,. + 0
+	.set	.LANCHOR183,. + 0
 	.type	g_flash_multi_page_read_en, %object
 	.size	g_flash_multi_page_read_en, 1
 g_flash_multi_page_read_en:
 	.zero	1
 	.section	.bss.g_flash_page_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR176,. + 0
+	.set	.LANCHOR173,. + 0
 	.type	g_flash_page_buffer, %object
 	.size	g_flash_page_buffer, 8
 g_flash_page_buffer:
@@ -27229,7 +27869,7 @@ g_flash_page_buffer:
 g_flash_reversd_blks:
 	.zero	1
 	.section	.bss.g_flash_six_addr,"aw",@nobits
-	.set	.LANCHOR31,. + 0
+	.set	.LANCHOR30,. + 0
 	.type	g_flash_six_addr, %object
 	.size	g_flash_six_addr, 1
 g_flash_six_addr:
@@ -27242,7 +27882,7 @@ g_flash_slc_mode:
 	.zero	1
 	.section	.bss.g_flash_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR175,. + 0
+	.set	.LANCHOR172,. + 0
 	.type	g_flash_spare_buffer, %object
 	.size	g_flash_spare_buffer, 8
 g_flash_spare_buffer:
@@ -27256,52 +27896,52 @@ g_flash_sys_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_tmp_page_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR166,. + 0
+	.set	.LANCHOR163,. + 0
 	.type	g_flash_tmp_page_buffer, %object
 	.size	g_flash_tmp_page_buffer, 8
 g_flash_tmp_page_buffer:
 	.zero	8
 	.section	.bss.g_flash_tmp_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR168,. + 0
+	.set	.LANCHOR165,. + 0
 	.type	g_flash_tmp_spare_buffer, %object
 	.size	g_flash_tmp_spare_buffer, 8
 g_flash_tmp_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_toggle_mode_en,"aw",@nobits
-	.set	.LANCHOR21,. + 0
+	.set	.LANCHOR26,. + 0
 	.type	g_flash_toggle_mode_en, %object
 	.size	g_flash_toggle_mode_en, 1
 g_flash_toggle_mode_en:
 	.zero	1
 	.section	.bss.g_flash_ymtc_3d_tlc_flag,"aw",@nobits
-	.set	.LANCHOR37,. + 0
+	.set	.LANCHOR36,. + 0
 	.type	g_flash_ymtc_3d_tlc_flag, %object
 	.size	g_flash_ymtc_3d_tlc_flag, 1
 g_flash_ymtc_3d_tlc_flag:
 	.zero	1
 	.section	.bss.g_ftl_info_blk,"aw",@nobits
 	.align	6
-	.set	.LANCHOR194,. + 0
+	.set	.LANCHOR191,. + 0
 	.type	g_ftl_info_blk, %object
 	.size	g_ftl_info_blk, 4
 g_ftl_info_blk:
 	.zero	4
 	.section	.bss.g_gc_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR71,. + 0
+	.set	.LANCHOR70,. + 0
 	.type	g_gc_info, %object
-	.size	g_gc_info, 2136
+	.size	g_gc_info, 2216
 g_gc_info:
-	.zero	2136
+	.zero	2216
 	.section	.bss.g_idb_ecc_bits,"aw",@nobits
-	.set	.LANCHOR17,. + 0
+	.set	.LANCHOR22,. + 0
 	.type	g_idb_ecc_bits, %object
 	.size	g_idb_ecc_bits, 1
 g_idb_ecc_bits:
 	.zero	1
 	.section	.bss.g_idb_slc_mode_enable,"aw",@nobits
-	.set	.LANCHOR19,. + 0
+	.set	.LANCHOR24,. + 0
 	.type	g_idb_slc_mode_enable, %object
 	.size	g_idb_slc_mode_enable, 1
 g_idb_slc_mode_enable:
@@ -27314,64 +27954,64 @@ g_idb_slc_mode_enable:
 g_lsb_page_tbl:
 	.zero	1024
 	.section	.bss.g_maxRegNum,"aw",@nobits
-	.set	.LANCHOR26,. + 0
+	.set	.LANCHOR18,. + 0
 	.type	g_maxRegNum, %object
 	.size	g_maxRegNum, 1
 g_maxRegNum:
 	.zero	1
 	.section	.bss.g_maxRetryCount,"aw",@nobits
-	.set	.LANCHOR169,. + 0
+	.set	.LANCHOR166,. + 0
 	.type	g_maxRetryCount, %object
 	.size	g_maxRetryCount, 1
 g_maxRetryCount:
 	.zero	1
 	.section	.bss.g_msb_page_tbl,"aw",@nobits
 	.align	2
-	.set	.LANCHOR145,. + 0
+	.set	.LANCHOR142,. + 0
 	.type	g_msb_page_tbl, %object
 	.size	g_msb_page_tbl, 2048
 g_msb_page_tbl:
 	.zero	2048
 	.section	.bss.g_nand_max_die,"aw",@nobits
-	.set	.LANCHOR18,. + 0
+	.set	.LANCHOR23,. + 0
 	.type	g_nand_max_die, %object
 	.size	g_nand_max_die, 1
 g_nand_max_die:
 	.zero	1
 	.section	.bss.g_nand_opt_para,"aw",@nobits
 	.align	3
-	.set	.LANCHOR20,. + 0
+	.set	.LANCHOR25,. + 0
 	.type	g_nand_opt_para, %object
 	.size	g_nand_opt_para, 32
 g_nand_opt_para:
 	.zero	32
 	.section	.bss.g_nandc_ecc_bits,"aw",@nobits
-	.set	.LANCHOR50,. + 0
+	.set	.LANCHOR49,. + 0
 	.type	g_nandc_ecc_bits, %object
 	.size	g_nandc_ecc_bits, 1
 g_nandc_ecc_bits:
 	.zero	1
 	.section	.bss.g_nandc_tran_timeout,"aw",@nobits
-	.set	.LANCHOR167,. + 0
+	.set	.LANCHOR164,. + 0
 	.type	g_nandc_tran_timeout, %object
 	.size	g_nandc_tran_timeout, 1
 g_nandc_tran_timeout:
 	.zero	1
 	.section	.bss.g_nandc_v6_master_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR53,. + 0
+	.set	.LANCHOR52,. + 0
 	.type	g_nandc_v6_master_info, %object
 	.size	g_nandc_v6_master_info, 40
 g_nandc_v6_master_info:
 	.zero	40
 	.section	.bss.g_nandc_ver,"aw",@nobits
-	.set	.LANCHOR28,. + 0
+	.set	.LANCHOR27,. + 0
 	.type	g_nandc_ver, %object
 	.size	g_nandc_ver, 1
 g_nandc_ver:
 	.zero	1
 	.section	.bss.g_one_pass_program,"aw",@nobits
-	.set	.LANCHOR82,. + 0
+	.set	.LANCHOR81,. + 0
 	.type	g_one_pass_program, %object
 	.size	g_one_pass_program, 1
 g_one_pass_program:
@@ -27384,7 +28024,7 @@ g_one_pass_program:
 g_pm_spare:
 	.zero	8
 	.section	.bss.g_retryMode,"aw",@nobits
-	.set	.LANCHOR24,. + 0
+	.set	.LANCHOR16,. + 0
 	.type	g_retryMode, %object
 	.size	g_retryMode, 1
 g_retryMode:
@@ -27402,103 +28042,103 @@ g_slc_mode_enable:
 	.zero	1
 	.section	.bss.g_slc_page_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR147,. + 0
+	.set	.LANCHOR144,. + 0
 	.type	g_slc_page_num, %object
 	.size	g_slc_page_num, 2
 g_slc_page_num:
 	.zero	2
 	.section	.bss.g_totle_phy_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR149,. + 0
+	.set	.LANCHOR146,. + 0
 	.type	g_totle_phy_block, %object
 	.size	g_totle_phy_block, 2
 g_totle_phy_block:
 	.zero	2
 	.section	.bss.gc_des_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR164,. + 0
+	.set	.LANCHOR161,. + 0
 	.type	gc_des_ppa_tbl, %object
 	.size	gc_des_ppa_tbl, 8
 gc_des_ppa_tbl:
 	.zero	8
 	.section	.bss.gc_free_slc_sblk_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR87,. + 0
+	.set	.LANCHOR86,. + 0
 	.type	gc_free_slc_sblk_th, %object
 	.size	gc_free_slc_sblk_th, 2
 gc_free_slc_sblk_th:
 	.zero	2
 	.section	.bss.gc_lpa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR162,. + 0
+	.set	.LANCHOR159,. + 0
 	.type	gc_lpa_tbl, %object
 	.size	gc_lpa_tbl, 8
 gc_lpa_tbl:
 	.zero	8
 	.section	.bss.gc_mode,"aw",@nobits
-	.set	.LANCHOR85,. + 0
+	.set	.LANCHOR84,. + 0
 	.type	gc_mode, %object
 	.size	gc_mode, 1
 gc_mode:
 	.zero	1
 	.section	.bss.gc_page_buf_id,"aw",@nobits
 	.align	3
-	.set	.LANCHOR83,. + 0
+	.set	.LANCHOR82,. + 0
 	.type	gc_page_buf_id, %object
 	.size	gc_page_buf_id, 8
 gc_page_buf_id:
 	.zero	8
 	.section	.bss.gc_pre_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR163,. + 0
+	.set	.LANCHOR160,. + 0
 	.type	gc_pre_ppa_tbl, %object
 	.size	gc_pre_ppa_tbl, 8
 gc_pre_ppa_tbl:
 	.zero	8
 	.section	.bss.gc_search_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR160,. + 0
+	.set	.LANCHOR157,. + 0
 	.type	gc_search_count, %object
 	.size	gc_search_count, 4
 gc_search_count:
 	.zero	4
 	.section	.bss.gc_slc_cache_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR91,. + 0
+	.set	.LANCHOR88,. + 0
 	.type	gc_slc_cache_index, %object
 	.size	gc_slc_cache_index, 2
 gc_slc_cache_index:
 	.zero	2
 	.section	.bss.gc_slc_data_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR90,. + 0
+	.set	.LANCHOR87,. + 0
 	.type	gc_slc_data_index, %object
 	.size	gc_slc_data_index, 2
 gc_slc_data_index:
 	.zero	2
 	.section	.bss.gc_slc_mode_slc_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR161,. + 0
+	.set	.LANCHOR158,. + 0
 	.type	gc_slc_mode_slc_vpn_th, %object
 	.size	gc_slc_mode_slc_vpn_th, 2
 gc_slc_mode_slc_vpn_th:
 	.zero	2
 	.section	.bss.gc_slc_mode_tlc_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR94,. + 0
+	.set	.LANCHOR93,. + 0
 	.type	gc_slc_mode_tlc_vpn_th, %object
 	.size	gc_slc_mode_tlc_vpn_th, 2
 gc_slc_mode_tlc_vpn_th:
 	.zero	2
 	.section	.bss.gc_slc_mode_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR70,. + 0
+	.set	.LANCHOR69,. + 0
 	.type	gc_slc_mode_vpn_th, %object
 	.size	gc_slc_mode_vpn_th, 2
 gc_slc_mode_vpn_th:
 	.zero	2
 	.section	.bss.gc_state,"aw",@nobits
-	.set	.LANCHOR159,. + 0
+	.set	.LANCHOR156,. + 0
 	.type	gc_state, %object
 	.size	gc_state, 1
 gc_state:
@@ -27519,14 +28159,14 @@ gc_tlc_mode_tlc_vpn_th:
 	.zero	2
 	.section	.bss.gc_valid_page_ppa,"aw",@nobits
 	.align	3
-	.set	.LANCHOR77,. + 0
+	.set	.LANCHOR76,. + 0
 	.type	gc_valid_page_ppa, %object
 	.size	gc_valid_page_ppa, 8
 gc_valid_page_ppa:
 	.zero	8
 	.section	.bss.gc_xlc_data_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR92,. + 0
+	.set	.LANCHOR89,. + 0
 	.type	gc_xlc_data_index, %object
 	.size	gc_xlc_data_index, 2
 gc_xlc_data_index:
@@ -27540,42 +28180,42 @@ gc_xlc_search_index:
 	.zero	2
 	.section	.bss.gp_blk_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR7,. + 0
+	.set	.LANCHOR9,. + 0
 	.type	gp_blk_info, %object
 	.size	gp_blk_info, 8
 gp_blk_info:
 	.zero	8
 	.section	.bss.gp_data_slc_cache_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR89,. + 0
+	.set	.LANCHOR90,. + 0
 	.type	gp_data_slc_cache_head, %object
 	.size	gp_data_slc_cache_head, 8
 gp_data_slc_cache_head:
 	.zero	8
 	.section	.bss.gp_data_slc_data_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR12,. + 0
+	.set	.LANCHOR95,. + 0
 	.type	gp_data_slc_data_head, %object
 	.size	gp_data_slc_data_head, 8
 gp_data_slc_data_head:
 	.zero	8
 	.section	.bss.gp_data_xlc_data_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR88,. + 0
+	.set	.LANCHOR92,. + 0
 	.type	gp_data_xlc_data_head, %object
 	.size	gp_data_xlc_data_head, 8
 gp_data_xlc_data_head:
 	.zero	8
 	.section	.bss.gp_flash_check_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR144,. + 0
+	.set	.LANCHOR141,. + 0
 	.type	gp_flash_check_buf, %object
 	.size	gp_flash_check_buf, 8
 gp_flash_check_buf:
 	.zero	8
 	.section	.bss.gp_flash_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR27,. + 0
+	.set	.LANCHOR6,. + 0
 	.type	gp_flash_info, %object
 	.size	gp_flash_info, 8
 gp_flash_info:
@@ -27603,7 +28243,7 @@ gp_free_xlc_head:
 	.zero	8
 	.section	.bss.gp_ftl_ext_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR10,. + 0
+	.set	.LANCHOR12,. + 0
 	.type	gp_ftl_ext_info, %object
 	.size	gp_ftl_ext_info, 8
 gp_ftl_ext_info:
@@ -27617,14 +28257,14 @@ gp_ftl_info:
 	.zero	8
 	.section	.bss.gp_nand_para_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR16,. + 0
+	.set	.LANCHOR21,. + 0
 	.type	gp_nand_para_info, %object
 	.size	gp_nand_para_info, 8
 gp_nand_para_info:
 	.zero	8
 	.section	.bss.gp_nandc,"aw",@nobits
 	.align	3
-	.set	.LANCHOR13,. + 0
+	.set	.LANCHOR7,. + 0
 	.type	gp_nandc, %object
 	.size	gp_nandc, 8
 gp_nandc:
@@ -27638,27 +28278,27 @@ gp_sblk_list_tbl:
 	.zero	8
 	.section	.bss.idb_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR141,. + 0
+	.set	.LANCHOR138,. + 0
 	.type	idb_buf, %object
 	.size	idb_buf, 8
 idb_buf:
 	.zero	8
 	.section	.bss.idb_last_lba,"aw",@nobits
 	.align	2
-	.set	.LANCHOR177,. + 0
+	.set	.LANCHOR174,. + 0
 	.type	idb_last_lba, %object
 	.size	idb_last_lba, 4
 idb_last_lba:
 	.zero	4
 	.section	.bss.idb_need_write_back,"aw",@nobits
 	.align	2
-	.set	.LANCHOR142,. + 0
+	.set	.LANCHOR139,. + 0
 	.type	idb_need_write_back, %object
 	.size	idb_need_write_back, 4
 idb_need_write_back:
 	.zero	4
 	.section	.bss.idb_write_enable,"aw",@nobits
-	.set	.LANCHOR143,. + 0
+	.set	.LANCHOR140,. + 0
 	.type	idb_write_enable, %object
 	.size	idb_write_enable, 1
 idb_write_enable:
@@ -27684,19 +28324,19 @@ lpa_hash_index:
 nandc_ecc_sts:
 	.zero	16
 	.section	.bss.nandc_hw_seed,"aw",@nobits
-	.set	.LANCHOR51,. + 0
+	.set	.LANCHOR50,. + 0
 	.type	nandc_hw_seed, %object
 	.size	nandc_hw_seed, 1
 nandc_hw_seed:
 	.zero	1
 	.section	.bss.nandc_randomizer_en,"aw",@nobits
-	.set	.LANCHOR52,. + 0
+	.set	.LANCHOR51,. + 0
 	.type	nandc_randomizer_en, %object
 	.size	nandc_randomizer_en, 1
 nandc_randomizer_en:
 	.zero	1
 	.section	.bss.p_free_buf_head,"aw",@nobits
-	.set	.LANCHOR57,. + 0
+	.set	.LANCHOR56,. + 0
 	.type	p_free_buf_head, %object
 	.size	p_free_buf_head, 1
 p_free_buf_head:
@@ -27715,14 +28355,14 @@ pm_first_write:
 	.zero	1
 	.section	.bss.pm_force_gc,"aw",@nobits
 	.align	2
-	.set	.LANCHOR151,. + 0
+	.set	.LANCHOR148,. + 0
 	.type	pm_force_gc, %object
 	.size	pm_force_gc, 4
 pm_force_gc:
 	.zero	4
 	.section	.bss.pm_gc_enable,"aw",@nobits
 	.align	2
-	.set	.LANCHOR136,. + 0
+	.set	.LANCHOR204,. + 0
 	.type	pm_gc_enable, %object
 	.size	pm_gc_enable, 4
 pm_gc_enable:
@@ -27734,14 +28374,14 @@ pm_gc_enable:
 pm_last_load_ram_id:
 	.zero	1
 	.section	.bss.pm_last_update_ram_id,"aw",@nobits
-	.set	.LANCHOR139,. + 0
+	.set	.LANCHOR136,. + 0
 	.type	pm_last_update_ram_id, %object
 	.size	pm_last_update_ram_id, 1
 pm_last_update_ram_id:
 	.zero	1
 	.section	.bss.pm_ram_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR138,. + 0
+	.set	.LANCHOR135,. + 0
 	.type	pm_ram_info, %object
 	.size	pm_ram_info, 512
 pm_ram_info:
@@ -27766,25 +28406,25 @@ read_buf_count:
 read_buf_head:
 	.zero	1
 	.section	.bss.sblk_gc_write_completed_queue_head,"aw",@nobits
-	.set	.LANCHOR64,. + 0
+	.set	.LANCHOR63,. + 0
 	.type	sblk_gc_write_completed_queue_head, %object
 	.size	sblk_gc_write_completed_queue_head, 1
 sblk_gc_write_completed_queue_head:
 	.zero	1
 	.section	.bss.sblk_queue_head,"aw",@nobits
-	.set	.LANCHOR60,. + 0
+	.set	.LANCHOR59,. + 0
 	.type	sblk_queue_head, %object
 	.size	sblk_queue_head, 1
 sblk_queue_head:
 	.zero	1
 	.section	.bss.sblk_read_completed_queue_head,"aw",@nobits
-	.set	.LANCHOR63,. + 0
+	.set	.LANCHOR62,. + 0
 	.type	sblk_read_completed_queue_head, %object
 	.size	sblk_read_completed_queue_head, 1
 sblk_read_completed_queue_head:
 	.zero	1
 	.section	.bss.sblk_write_completed_queue_head,"aw",@nobits
-	.set	.LANCHOR65,. + 0
+	.set	.LANCHOR64,. + 0
 	.type	sblk_write_completed_queue_head, %object
 	.size	sblk_write_completed_queue_head, 1
 sblk_write_completed_queue_head:
@@ -27804,13 +28444,13 @@ slc_cache_sblk:
 slc_data_sblk:
 	.zero	2
 	.section	.bss.write_buf_count,"aw",@nobits
-	.set	.LANCHOR67,. + 0
+	.set	.LANCHOR66,. + 0
 	.type	write_buf_count, %object
 	.size	write_buf_count, 1
 write_buf_count:
 	.zero	1
 	.section	.bss.write_buf_head,"aw",@nobits
-	.set	.LANCHOR66,. + 0
+	.set	.LANCHOR65,. + 0
 	.type	write_buf_head, %object
 	.size	write_buf_head, 1
 write_buf_head:
@@ -27822,14 +28462,14 @@ write_buf_head:
 write_commit_count:
 	.zero	1
 	.section	.bss.write_commit_head,"aw",@nobits
-	.set	.LANCHOR185,. + 0
+	.set	.LANCHOR182,. + 0
 	.type	write_commit_head, %object
 	.size	write_commit_head, 1
 write_commit_head:
 	.zero	1
 	.section	.bss.xlc_data_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR93,. + 0
+	.set	.LANCHOR91,. + 0
 	.type	xlc_data_sblk, %object
 	.size	xlc_data_sblk, 2
 xlc_data_sblk:
@@ -27843,7 +28483,7 @@ zftl_print_list_count:
 	.zero	2
 	.section	.data.g_nand_para_info,"aw",@progbits
 	.align	3
-	.set	.LANCHOR33,. + 0
+	.set	.LANCHOR32,. + 0
 	.type	g_nand_para_info, %object
 	.size	g_nand_para_info, 32
 g_nand_para_info:
@@ -27877,7 +28517,7 @@ g_nand_para_info:
 	.byte	0
 	.section	.data.hy_f26_ref_value,"aw",@progbits
 	.align	3
-	.set	.LANCHOR165,. + 0
+	.set	.LANCHOR162,. + 0
 	.type	hy_f26_ref_value, %object
 	.size	hy_f26_ref_value, 28
 hy_f26_ref_value:
@@ -27993,7 +28633,7 @@ nand_opt_para:
 	.zero	14
 	.section	.data.sd15_slc_rr,"aw",@progbits
 	.align	3
-	.set	.LANCHOR41,. + 0
+	.set	.LANCHOR40,. + 0
 	.type	sd15_slc_rr, %object
 	.size	sd15_slc_rr, 25
 sd15_slc_rr:
@@ -28024,7 +28664,7 @@ sd15_slc_rr:
 	.byte	112
 	.section	.data.sd15_tlc_rr,"aw",@progbits
 	.align	3
-	.set	.LANCHOR40,. + 0
+	.set	.LANCHOR39,. + 0
 	.type	sd15_tlc_rr, %object
 	.size	sd15_tlc_rr, 329
 sd15_tlc_rr:
@@ -29523,7 +30163,7 @@ tlc_prog_order:
 	.hword	1019
 	.section	.data.zftl_debug,"aw",@progbits
 	.align	2
-	.set	.LANCHOR14,. + 0
+	.set	.LANCHOR19,. + 0
 	.type	zftl_debug, %object
 	.size	zftl_debug, 4
 zftl_debug:
@@ -30906,468 +31546,468 @@ zftl_nand_flash_para_tbl:
 	.byte	-38
 	.byte	-33
 	.byte	0
-	.section	.rodata.__func__.10137,"a",@progbits
+	.section	.rodata.__func__.10004,"a",@progbits
+	.align	3
+	.set	.LANCHOR242,. + 0
+	.type	__func__.10004, %object
+	.size	__func__.10004, 13
+__func__.10004:
+	.string	"_ftl_discard"
+	.section	.rodata.__func__.10150,"a",@progbits
 	.align	3
 	.set	.LANCHOR225,. + 0
-	.type	__func__.10137, %object
-	.size	__func__.10137, 12
-__func__.10137:
+	.type	__func__.10150, %object
+	.size	__func__.10150, 12
+__func__.10150:
 	.string	"gc_recovery"
-	.section	.rodata.__func__.10147,"a",@progbits
+	.section	.rodata.__func__.10160,"a",@progbits
 	.align	3
-	.set	.LANCHOR72,. + 0
-	.type	__func__.10147, %object
-	.size	__func__.10147, 12
-__func__.10147:
+	.set	.LANCHOR71,. + 0
+	.type	__func__.10160, %object
+	.size	__func__.10160, 12
+__func__.10160:
 	.string	"gc_add_sblk"
-	.section	.rodata.__func__.10194,"a",@progbits
+	.section	.rodata.__func__.10207,"a",@progbits
 	.align	3
-	.set	.LANCHOR188,. + 0
-	.type	__func__.10194, %object
-	.size	__func__.10194, 21
-__func__.10194:
+	.set	.LANCHOR185,. + 0
+	.type	__func__.10207, %object
+	.size	__func__.10207, 21
+__func__.10207:
 	.string	"gc_check_data_one_wl"
-	.section	.rodata.__func__.10226,"a",@progbits
-	.align	3
-	.set	.LANCHOR226,. + 0
-	.type	__func__.10226, %object
-	.size	__func__.10226, 22
-__func__.10226:
-	.string	"gc_update_l2p_map_new"
 	.section	.rodata.__func__.10239,"a",@progbits
 	.align	3
-	.set	.LANCHOR78,. + 0
+	.set	.LANCHOR226,. + 0
 	.type	__func__.10239, %object
-	.size	__func__.10239, 19
+	.size	__func__.10239, 22
 __func__.10239:
+	.string	"gc_update_l2p_map_new"
+	.section	.rodata.__func__.10252,"a",@progbits
+	.align	3
+	.set	.LANCHOR77,. + 0
+	.type	__func__.10252, %object
+	.size	__func__.10252, 19
+__func__.10252:
 	.string	"gc_write_completed"
-	.section	.rodata.__func__.10269,"a",@progbits
+	.section	.rodata.__func__.10282,"a",@progbits
 	.align	3
 	.set	.LANCHOR234,. + 0
-	.type	__func__.10269, %object
-	.size	__func__.10269, 16
-__func__.10269:
+	.type	__func__.10282, %object
+	.size	__func__.10282, 16
+__func__.10282:
 	.string	"gc_do_copy_back"
-	.section	.rodata.__func__.10296,"a",@progbits
+	.section	.rodata.__func__.10309,"a",@progbits
 	.align	3
 	.set	.LANCHOR127,. + 0
-	.type	__func__.10296, %object
-	.size	__func__.10296, 16
-__func__.10296:
+	.type	__func__.10309, %object
+	.size	__func__.10309, 16
+__func__.10309:
 	.string	"gc_free_src_blk"
-	.section	.rodata.__func__.10340,"a",@progbits
+	.section	.rodata.__func__.10353,"a",@progbits
 	.align	3
 	.set	.LANCHOR227,. + 0
-	.type	__func__.10340, %object
-	.size	__func__.10340, 16
-__func__.10340:
+	.type	__func__.10353, %object
+	.size	__func__.10353, 16
+__func__.10353:
 	.string	"gc_scan_src_blk"
-	.section	.rodata.__func__.10401,"a",@progbits
+	.section	.rodata.__func__.10414,"a",@progbits
 	.align	3
 	.set	.LANCHOR228,. + 0
-	.type	__func__.10401, %object
-	.size	__func__.10401, 20
-__func__.10401:
+	.type	__func__.10414, %object
+	.size	__func__.10414, 20
+__func__.10414:
 	.string	"gc_scan_static_data"
-	.section	.rodata.__func__.10468,"a",@progbits
+	.section	.rodata.__func__.10508,"a",@progbits
 	.align	3
 	.set	.LANCHOR237,. + 0
-	.type	__func__.10468, %object
-	.size	__func__.10468, 11
-__func__.10468:
+	.type	__func__.10508, %object
+	.size	__func__.10508, 11
+__func__.10508:
 	.string	"zftl_do_gc"
-	.section	.rodata.__func__.10563,"a",@progbits
+	.section	.rodata.__func__.10603,"a",@progbits
 	.align	3
 	.set	.LANCHOR5,. + 0
-	.type	__func__.10563, %object
-	.size	__func__.10563, 18
-__func__.10563:
+	.type	__func__.10603, %object
+	.size	__func__.10603, 18
+__func__.10603:
 	.string	"_list_remove_node"
-	.section	.rodata.__func__.10588,"a",@progbits
+	.section	.rodata.__func__.10628,"a",@progbits
 	.align	3
-	.set	.LANCHOR11,. + 0
-	.type	__func__.10588, %object
-	.size	__func__.10588, 23
-__func__.10588:
+	.set	.LANCHOR13,. + 0
+	.type	__func__.10628, %object
+	.size	__func__.10628, 23
+__func__.10628:
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-	.section	.rodata.__func__.9814,"a",@progbits
+	.section	.rodata.__func__.9826,"a",@progbits
 	.align	3
-	.set	.LANCHOR150,. + 0
-	.type	__func__.9814, %object
-	.size	__func__.9814, 17
-__func__.9814:
+	.set	.LANCHOR147,. + 0
+	.type	__func__.9826, %object
+	.size	__func__.9826, 17
+__func__.9826:
 	.string	"lpa_rebuild_hash"
-	.section	.rodata.__func__.9864,"a",@progbits
+	.section	.rodata.__func__.9876,"a",@progbits
 	.align	3
 	.set	.LANCHOR232,. + 0
-	.type	__func__.9864, %object
-	.size	__func__.9864, 17
-__func__.9864:
+	.type	__func__.9876, %object
+	.size	__func__.9876, 17
+__func__.9876:
 	.string	"ftl_write_commit"
-	.section	.rodata.__func__.9882,"a",@progbits
+	.section	.rodata.__func__.9894,"a",@progbits
 	.align	3
 	.set	.LANCHOR130,. + 0
-	.type	__func__.9882, %object
-	.size	__func__.9882, 14
-__func__.9882:
+	.type	__func__.9894, %object
+	.size	__func__.9894, 14
+__func__.9894:
 	.string	"ftl_write_buf"
-	.section	.rodata.__func__.9927,"a",@progbits
+	.section	.rodata.__func__.9939,"a",@progbits
 	.align	3
 	.set	.LANCHOR132,. + 0
-	.type	__func__.9927, %object
-	.size	__func__.9927, 18
-__func__.9927:
+	.type	__func__.9939, %object
+	.size	__func__.9939, 18
+__func__.9939:
 	.string	"zftl_add_read_buf"
-	.section	.rodata.__func__.9960,"a",@progbits
+	.section	.rodata.__func__.9972,"a",@progbits
 	.align	3
 	.set	.LANCHOR230,. + 0
-	.type	__func__.9960, %object
-	.size	__func__.9960, 10
-__func__.9960:
+	.type	__func__.9972, %object
+	.size	__func__.9972, 10
+__func__.9972:
 	.string	"zftl_read"
-	.section	.rodata.__func__.9991,"a",@progbits
-	.align	3
-	.set	.LANCHOR242,. + 0
-	.type	__func__.9991, %object
-	.size	__func__.9991, 13
-__func__.9991:
-	.string	"_ftl_discard"
 	.section	.rodata._list_remove_node.str1.1,"aMS",@progbits,1
 .LC0:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
@@ -31387,50 +32027,53 @@ __func__.9991:
 .LC47:
 	.string	"buf = %d, next=%d, flag=%d gc_write_flag=%d, lun_state=%d, op_status = %d lpa=%x, ppa=%x\n"
 	.section	.rodata.dump_ftl_info.str1.1,"aMS",@progbits,1
-.LC189:
+.LC192:
 	.string	"free_buf_count: %d\n"
-.LC190:
+.LC193:
 	.string	"g_ftl_info_blk blk:0x%x, index:0x%x, page:0x%x\n"
-.LC191:
+.LC194:
 	.string	"ftl_ext_info_blk blk:0x%x, page:0x%x\n"
-.LC192:
+.LC195:
 	.string	"ac_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC193:
+.LC196:
 	.string	"tmp_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC194:
+.LC197:
 	.string	"gc_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC195:
+.LC198:
 	.string	"lpa:"
-.LC196:
+.LC199:
 	.string	"vpn:"
-.LC197:
+.LC200:
 	.string	"sblk:"
-.LC198:
+.LC201:
 	.string	"lpa_hash:"
-.LC199:
+.LC202:
 	.string	"lpa_hash_index:"
 	.section	.rodata.dump_pm_blk.str1.1,"aMS",@progbits,1
-.LC254:
+.LC257:
 	.string	"pm l2p:"
-.LC255:
+.LC258:
 	.string	"pm blk:"
 	.section	.rodata.dump_sblk_queue.str1.1,"aMS",@progbits,1
-.LC80:
+.LC79:
 	.string	"dump_sblk_queue: %d\n"
-.LC81:
+.LC80:
 	.string	"buf id= %d state = %d ppa = %x\n"
 	.section	.rodata.flash_complete_page_read.str1.1,"aMS",@progbits,1
-.LC139:
+.LC136:
 	.string	"flash_complete_page_read %x %x error_ecc %d %d\n"
 	.section	.rodata.flash_ddr_tuning_read.str1.1,"aMS",@progbits,1
-.LC125:
+.LC122:
 	.string	"%d flash_ddr_tuning_read %x ecc=%d\n"
-.LC126:
+.LC123:
 	.string	"sync para %d\n"
-.LC127:
+.LC124:
 	.string	"DDR mode Read error %x %x\n"
-.LC128:
+.LC125:
 	.string	"SDR mode Read %x %x ecc:%x\n"
+	.section	.rodata.flash_dual_page_prog.str1.1,"aMS",@progbits,1
+.LC130:
+	.string	"flash_prog_page %x %x %x\n"
 	.section	.rodata.flash_erase_all.str1.1,"aMS",@progbits,1
 .LC35:
 	.string	"erase done: %x\n"
@@ -31445,43 +32088,41 @@ __func__.9991:
 .LC32:
 	.string	"flash_erase_duplane_block pageadd = %x status = %x\n"
 	.section	.rodata.flash_get_last_written_page.str1.1,"aMS",@progbits,1
-.LC131:
+.LC128:
 	.string	"flash_get_last_written_page: %x %x %x\n"
 	.section	.rodata.flash_info_blk_init.str1.1,"aMS",@progbits,1
-.LC174:
+.LC177:
 	.string	"...%d @ %s %d %p\n"
-.LC175:
+.LC178:
 	.string	"no sys info %x\n"
 	.section	.rodata.flash_info_data_init.str1.1,"aMS",@progbits,1
-.LC97:
+.LC94:
 	.string	"...%d @ %s\n"
 	.section	.rodata.flash_info_flush.str1.1,"aMS",@progbits,1
-.LC171:
+.LC174:
 	.string	"finfo:"
-.LC172:
+.LC175:
 	.string	"flash_info_flush id = %x, page = %x\n"
-.LC173:
+.LC176:
 	.string	"sys_info_flush error:%x\n"
 	.section	.rodata.flash_mask_bad_block.str1.1,"aMS",@progbits,1
 .LC48:
 	.string	"flash_mask_bad_block %d %d\n"
 	.section	.rodata.flash_prog_page.str1.1,"aMS",@progbits,1
-.LC132:
-	.string	"flash_prog_page %x %x %x\n"
-.LC133:
+.LC129:
 	.string	"flash_prog_page page_addr = %x status = %x\n"
 	.section	.rodata.flash_prog_page_en.str1.1,"aMS",@progbits,1
-.LC147:
+.LC144:
 	.string	"flash_prog_page_en:%x %x %x\n"
-.LC148:
+.LC145:
 	.string	"w d:"
-.LC149:
+.LC146:
 	.string	"w s:"
-.LC150:
+.LC147:
 	.string	"spare"
-.LC151:
+.LC148:
 	.string	"data"
-.LC152:
+.LC149:
 	.string	"write error: %x\n"
 	.section	.rodata.flash_read_id.str1.1,"aMS",@progbits,1
 .LC38:
@@ -31490,9 +32131,9 @@ __func__.9991:
 .LC39:
 	.string	"otp:%x %x %x %x\n"
 	.section	.rodata.flash_read_page_en.str1.1,"aMS",@progbits,1
-.LC129:
+.LC126:
 	.string	"flash_read_page_en %x %x %x %x\n"
-.LC130:
+.LC127:
 	.string	"flash_read_page_en %x %x error_ecc %d %d\n"
 	.section	.rodata.flash_set_interface_mode.str1.1,"aMS",@progbits,1
 .LC36:
@@ -31500,111 +32141,119 @@ __func__.9991:
 .LC37:
 	.string	"nand ddr mode %x\n"
 	.section	.rodata.ftl_alloc_new_data_sblk.str1.1,"aMS",@progbits,1
-.LC232:
+.LC235:
 	.string	"error gc_add_sblk: %x\n"
 	.section	.rodata.ftl_alloc_sblk.str1.1,"aMS",@progbits,1
-.LC79:
+.LC167:
 	.string	"alloc sblk %x %d\n"
 	.section	.rodata.ftl_dump_write_open_sblk.str1.1,"aMS",@progbits,1
-.LC166:
+.LC159:
 	.string	"ftl_sblk_dump_write = %x %d %d %d %d\n"
-.LC167:
+.LC160:
 	.string	"blk= %x, page=%x, ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
-.LC168:
+.LC161:
 	.string	"ftl_sblk_dump_write2 = %x %d %d %d\n"
-.LC169:
+.LC162:
 	.string	"ftl_sblk_dump_write = %x %x\n"
-.LC170:
+.LC163:
 	.string	"ftl_sblk_dump_write done = %x\n"
 	.section	.rodata.ftl_ext_info_init.str1.1,"aMS",@progbits,1
-.LC159:
+.LC156:
 	.string	"%s %d %d %x %x\n"
-.LC160:
+.LC157:
 	.string	"ext info hash %x error\n"
-.LC161:
+.LC158:
 	.string	"%s %x %x %x\n"
 	.section	.rodata.ftl_free_sblk.str1.1,"aMS",@progbits,1
 .LC68:
 	.string	"swl_slc_free_mini_ec_blk sblk %x\n"
 	.section	.rodata.ftl_info_blk_init.str1.1,"aMS",@progbits,1
-.LC155:
+.LC152:
 	.string	"%d %x @%d %x\n"
-.LC156:
+.LC153:
 	.string	"ftl_info_blk_init %d %d %x\n"
-.LC157:
+.LC154:
 	.string	"ftl info hash %x error\n"
-.LC158:
+.LC155:
 	.string	"ink flag: %x\n"
 	.section	.rodata.ftl_info_flush.str1.1,"aMS",@progbits,1
-.LC154:
+.LC151:
 	.string	"g_ftl_info_blk blk = %x, page = %x version = %d\n"
+	.section	.rodata.ftl_ink_check_sblk.str1.1,"aMS",@progbits,1
+.LC165:
+	.string	"ftl_ink_check_sblk = %x %d %d\n"
+.LC166:
+	.string	"ftl_ink_check_sblk = %x %d %d end\n"
 	.section	.rodata.ftl_low_format.str1.1,"aMS",@progbits,1
-.LC162:
+.LC169:
 	.string	"ftl_low_format %d\n"
-.LC163:
+.LC170:
 	.string	"low format %d %d %d %d\n"
 	.section	.rodata.ftl_mask_bad_block.str1.1,"aMS",@progbits,1
 .LC66:
 	.string	"mask bad block:cs %x %x block: %x %x\n"
+	.section	.rodata.ftl_open_sblk_init.str1.1,"aMS",@progbits,1
+.LC168:
+	.string	"blk %x is bad block\n"
 	.section	.rodata.ftl_open_sblk_recovery.str1.1,"aMS",@progbits,1
-.LC177:
+.LC180:
 	.string	"saved_active_page  = %x\n"
-.LC178:
+.LC181:
 	.string	"saved_active_plane = %x\n"
-.LC179:
+.LC182:
 	.string	"sblk = %x\n"
-.LC180:
+.LC183:
 	.string	"phy_blk = %x %x\n"
-.LC181:
+.LC184:
 	.string	"num_planes = %x\n"
-.LC182:
+.LC185:
 	.string	"recovery blk=%x, page=%x, ppa = %x, status = %x, hash:%x\n"
-.LC183:
+.LC186:
 	.string	"data:"
-.LC184:
+.LC187:
 	.string	"sblk = %x, vpn0 = %d, vpn1 = %d\n"
-.LC185:
+.LC188:
 	.string	"dump_write_lpa = %x %x %x %x\n"
-.LC186:
+.LC189:
 	.string	"dump write new ppa = %x, last ppa = %x lpa = %x\n"
-.LC187:
+.LC190:
 	.string	"dump write = %x %x %x\n"
-.LC188:
+.LC191:
 	.string	"dump write hash update = %x %x %x\n"
 	.section	.rodata.ftl_re_low_format.str1.1,"aMS",@progbits,1
-.LC164:
+.LC171:
 	.string	"re low format %d\n"
 	.section	.rodata.ftl_sblk_dump.str1.1,"aMS",@progbits,1
-.LC220:
+.LC223:
 	.string	"ftl_sblk_dump = %x %d %d %d %d\n"
-.LC221:
+.LC224:
 	.string	"ftl_sblk_dump = %x %x %x %x\n"
-.LC222:
+.LC225:
 	.string	"page_addr = %x, lpa=%x vpn = %d\n"
-.LC223:
+.LC226:
 	.string	"index= %x, lpa=%x\n"
-.LC224:
+.LC227:
 	.string	"block = %x, vpn=%x check vpn = %x\n"
 	.section	.rodata.ftl_sysblk_dump.str1.1,"aMS",@progbits,1
-.LC176:
+.LC179:
 	.string	"l2p:"
 	.section	.rodata.ftl_test_block.str1.1,"aMS",@progbits,1
-.LC153:
+.LC150:
 	.string	"low format %d\n"
 	.section	.rodata.ftl_update_l2p_map.str1.1,"aMS",@progbits,1
-.LC228:
+.LC231:
 	.string	"ftl_update_l2p_map: %x %x %x\n"
-.LC229:
+.LC232:
 	.string	"ftl_update_l2p_map"
-.LC230:
+.LC233:
 	.string	"lpa_tbl:"
-.LC231:
+.LC234:
 	.string	"sblk %x vpn: %d %d\n"
 	.section	.rodata.ftl_vpn_decrement.str1.1,"aMS",@progbits,1
 .LC65:
 	.string	"ftl_vpn_decrement %x = %d, %d\n"
 	.section	.rodata.ftl_write_commit.str1.1,"aMS",@progbits,1
-.LC233:
+.LC236:
 	.string	"%d read error: ppa:%x, lpa:%x, status:%x\n"
 	.section	.rodata.ftl_write_completed.str1.1,"aMS",@progbits,1
 .LC77:
@@ -31621,12 +32270,12 @@ __func__.9991:
 .LC52:
 	.string	"gc_add_sblk = %d, %d, %d, %d, %d, %d\n"
 	.section	.rodata.gc_check_data_one_wl.str1.1,"aMS",@progbits,1
-.LC146:
+.LC143:
 	.string	"err: ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
 	.section	.rodata.gc_do_copy_back.str1.1,"aMS",@progbits,1
-.LC234:
+.LC237:
 	.string	"gc page in buf: lpa %x ppa = %x pageindex= %x\n"
-.LC235:
+.LC238:
 	.string	"gc_do_copy_back: lpa %x des_ppa = %x %x gc_ppa= %x page_index= %d\n"
 	.section	.rodata.gc_free_bad_sblk.str1.1,"aMS",@progbits,1
 .LC67:
@@ -31639,22 +32288,25 @@ __func__.9991:
 	.section	.rodata.gc_free_temp_buf.str1.1,"aMS",@progbits,1
 .LC55:
 	.string	"%d gc_free_temp_buf buf id= %x\n"
+	.section	.rodata.gc_ink_check_sblk.str1.1,"aMS",@progbits,1
+.LC164:
+	.string	"%x: ink_scaned_blk_num %x\n"
 	.section	.rodata.gc_mark_bad_ppa.str1.1,"aMS",@progbits,1
 .LC53:
 	.string	"gc_mark_bad_ppa %d %x %x\n"
 	.section	.rodata.gc_recovery.str1.1,"aMS",@progbits,1
-.LC210:
+.LC213:
 	.string	"ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
-.LC211:
+.LC214:
 	.string	"ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
-.LC212:
+.LC215:
 	.string	"gc_recovery: %x vpn = %x\n"
 	.section	.rodata.gc_scan_src_blk.str1.1,"aMS",@progbits,1
-.LC217:
+.LC220:
 	.string	"gc_scan_src_blk = %x, vpn = %d\n"
-.LC218:
+.LC221:
 	.string	"js hash error:%x %x %x\n"
-.LC219:
+.LC222:
 	.string	"gc_scan_src_blk = %x, s vpn0 = %d, c vpn1 = %d\n"
 	.section	.rodata.gc_search_src_blk.str1.1,"aMS",@progbits,1
 .LC57:
@@ -31662,69 +32314,69 @@ __func__.9991:
 .LC58:
 	.string	"gc_search_src_blk mode = %x, src mode = %x, count= %d %d\n"
 	.section	.rodata.gc_static_wearleveling.str1.1,"aMS",@progbits,1
-.LC85:
+.LC82:
 	.string	"gc_static_wearleveling: min blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
-.LC86:
+.LC83:
 	.string	"gc_static_wearleveling: min slc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
-.LC87:
+.LC84:
 	.string	"gc_static_wearleveling: min tlc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
-.LC88:
+.LC85:
 	.string	"gc_static_wearleveling: max slc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
-.LC89:
+.LC86:
 	.string	"gc_static_wearleveling: max xlc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
-.LC90:
+.LC87:
 	.string	"gc_static_wearleveling: slc blk: %x, tlc blk: %d avg slc ec: %d, avg tlc ec: %d \n"
-.LC91:
+.LC88:
 	.string	"gc_static_wearleveling: min slc ec: %x, min tlc ec: %d max slc ec: %d, max tlc ec: %d; %d %d\n"
-.LC92:
+.LC89:
 	.string	"swl add tlc gc = %x, %d, %d, %d, %d, %d\n"
-.LC93:
+.LC90:
 	.string	"swl add slc gc  = %x, %d, %d, %d, %d, %d\n"
 	.section	.rodata.gc_update_l2p_map_new.str1.1,"aMS",@progbits,1
-.LC213:
+.LC216:
 	.string	"gc_update_l2p_map_new sblk %x\n"
-.LC214:
+.LC217:
 	.string	"gc_update_l2p_map_new: %x %x %x\n"
-.LC215:
+.LC218:
 	.string	"lpa: %x %x %x\n"
-.LC216:
+.LC219:
 	.string	"gc_update_l2p_map_new: %x vpn = %x vpn1 = %x done\n"
 	.section	.rodata.gc_write_completed.str1.1,"aMS",@progbits,1
 .LC54:
 	.string	"status: %x, ppa: %x\n"
 	.section	.rodata.hynix_get_read_retry_default.str1.1,"aMS",@progbits,1
-.LC105:
+.LC102:
 	.string	"otp error! %d"
-.LC106:
+.LC103:
 	.string	"rr"
 	.section	.rodata.hynix_read_retrial.str1.1,"aMS",@progbits,1
-.LC124:
+.LC121:
 	.string	"hynix RR %d row=%x, count %d, status=%d\n"
 	.section	.rodata.idb_write_data.str1.1,"aMS",@progbits,1
-.LC135:
+.LC132:
 	.string	"1 write_idblock fix data %x %x %x\n"
-.LC136:
+.LC133:
 	.string	"write_idblock check fail! %x\n"
-.LC137:
+.LC134:
 	.string	"write_idblock fail! %x\n"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",@progbits,1
-.LC201:
+.LC204:
 	.string	"region_id = %d, pm_max_region = %d\n"
-.LC202:
+.LC205:
 	.string	"load_l2p_region no ppa = %x , %x, all setting 0xff....\n"
-.LC203:
+.LC206:
 	.string	"load_l2p_region = %x,%x,%x, %x\n"
-.LC204:
+.LC207:
 	.string	"pm_ppa:"
-.LC205:
+.LC208:
 	.string	"spare:"
 	.section	.rodata.lpa_rebuild_hash.str1.1,"aMS",@progbits,1
-.LC84:
+.LC81:
 	.string	"%s %d %d\n"
 	.section	.rodata.micron_read_retrial.str1.1,"aMS",@progbits,1
-.LC115:
+.LC112:
 	.string	"MT %d row=%x,last status %d,status = %d\n"
-.LC116:
+.LC113:
 	.string	"MT RR %d row=%x,count %d,status=%d\n"
 	.section	.rodata.nand_flash_print_info.str1.1,"aMS",@progbits,1
 .LC1:
@@ -31788,55 +32440,53 @@ __func__.9991:
 .LC30:
 	.string	"g_flash_toggle_mode_en: %x\n"
 	.section	.rodata.nandc_init.str1.1,"aMS",@progbits,1
-.LC98:
+.LC95:
 	.string	"...%s enter... %p\n"
-.LC99:
+.LC96:
 	.string	"0:%x %x %x %x %x\n"
-.LC100:
+.LC97:
 	.string	"g_nandc_ver...%d\n"
 	.section	.rodata.nandc_xfer.str1.1,"aMS",@progbits,1
-.LC112:
+.LC109:
 	.string	"dqs data abort %x\n"
-.LC113:
+.LC110:
 	.string	"dqs data timeout %x\n"
-.LC114:
+.LC111:
 	.string	"xfer error %x\n"
 	.section	.rodata.nandc_xfer_done.str1.1,"aMS",@progbits,1
-.LC107:
+.LC104:
 	.string	"flash_abort_clear = %d\n"
-.LC108:
+.LC105:
 	.string	"%d mtrans_cnt = %d page_num = %d\n"
-.LC109:
+.LC106:
 	.string	"%d flReg.d32=%x %x\n"
-.LC110:
+.LC107:
 	.string	"nandc:"
-.LC111:
+.LC108:
 	.string	"nandc_xfer_done read error %x\n"
 	.section	.rodata.pm_alloc_new_blk.str1.1,"aMS",@progbits,1
-.LC82:
-	.string	"blk %x is bad block\n"
-.LC83:
+.LC172:
 	.string	"pm_alloc_new_blk: %x %x %x %x\n"
 	.section	.rodata.pm_free_sblk.str1.1,"aMS",@progbits,1
-.LC95:
+.LC92:
 	.string	"GC PM block %x %x %x %d\n"
-.LC96:
+.LC93:
 	.string	"ftl_free_no_use_map_blk %x %x %x %d\n"
 	.section	.rodata.pm_init.str1.1,"aMS",@progbits,1
-.LC206:
+.LC209:
 	.string	"pm_init posr %x %x %x\n"
-.LC207:
+.LC210:
 	.string	"pm_init recovery %x %x %x\n"
-.LC208:
+.LC211:
 	.string	"pm_init hash %x error\n"
 	.section	.rodata.pm_log2phys.str1.1,"aMS",@progbits,1
-.LC209:
+.LC212:
 	.string	"pm_log2phys  lpn = %d, max lpn = %d\n"
 	.section	.rodata.pm_ppa_update_check.str1.1,"aMS",@progbits,1
-.LC200:
+.LC203:
 	.string	"%s w error lpn = %x, max ppa = %d\n"
 	.section	.rodata.pm_write_page.str1.1,"aMS",@progbits,1
-.LC165:
+.LC173:
 	.string	"pm_write_page write error: %x\n"
 	.section	.rodata.print_ftl_debug_info.str1.1,"aMS",@progbits,1
 .LC71:
@@ -31860,19 +32510,19 @@ __func__.9991:
 .LC64:
 	.string	"%d: node:%x %x %x %x, %d %d %d %d %d\n"
 	.section	.rodata.queue_wait_first_req_completed.str1.1,"aMS",@progbits,1
-.LC140:
+.LC137:
 	.string	"read: %x %x %x %x\n"
-.LC141:
+.LC138:
 	.string	"0set buf %d,status = %x, ppa = %x lun state = %d\n"
-.LC142:
+.LC139:
 	.string	"prog end %x %x error_ecc %d %d\n"
-.LC143:
+.LC140:
 	.string	"1set buf %d,status = %x, ppa = %x lun state = %d\n"
-.LC144:
+.LC141:
 	.string	"dp prog end %x %x error_ecc %d %d\n"
 	.section	.rodata.random_seed,"a",@progbits
 	.align	3
-	.set	.LANCHOR55,. + 0
+	.set	.LANCHOR54,. + 0
 	.type	random_seed, %object
 	.size	random_seed, 256
 random_seed:
@@ -32005,20 +32655,20 @@ random_seed:
 	.hword	17598
 	.hword	28087
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",@progbits,1
-.LC251:
+.LC254:
 	.string	"zftl_init %x\n"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
-.LC101:
+.LC98:
 	.string	"%s %p + 0x%x:"
-.LC102:
+.LC99:
 	.string	"%x "
-.LC103:
+.LC100:
 	.string	""
-.LC104:
+.LC101:
 	.string	"%s\n"
 	.section	.rodata.samsung_14nm_mlc_rr,"a",@progbits
 	.align	3
-	.set	.LANCHOR171,. + 0
+	.set	.LANCHOR168,. + 0
 	.type	samsung_14nm_mlc_rr, %object
 	.size	samsung_14nm_mlc_rr, 104
 samsung_14nm_mlc_rr:
@@ -32128,7 +32778,7 @@ samsung_14nm_mlc_rr:
 	.byte	8
 	.section	.rodata.samsung_14nm_slc_rr,"a",@progbits
 	.align	3
-	.set	.LANCHOR170,. + 0
+	.set	.LANCHOR167,. + 0
 	.type	samsung_14nm_slc_rr, %object
 	.size	samsung_14nm_slc_rr, 26
 samsung_14nm_slc_rr:
@@ -32159,24 +32809,24 @@ samsung_14nm_slc_rr:
 	.byte	-115
 	.byte	100
 	.section	.rodata.samsung_read_retrial.str1.1,"aMS",@progbits,1
-.LC121:
+.LC118:
 	.string	"samsung SRR %d row=%x, status=%d\n"
-.LC122:
+.LC119:
 	.string	"samsung TRR %d row=%x, status=%d\n"
-.LC123:
+.LC120:
 	.string	"samsung RR %d row=%x,count %d,status=%d\n"
 	.section	.rodata.sandisk_prog_test_bad_block.str1.1,"aMS",@progbits,1
 .LC40:
 	.string	"bad block test:%x %x\n"
 	.section	.rodata.sblk_mlc_dump_prog.str1.1,"aMS",@progbits,1
-.LC138:
+.LC135:
 	.string	"sblk_mlc_dump_prog wl_addr= %x ppa = %x ppa = %x\n"
 	.section	.rodata.sblk_prog_page.str1.1,"aMS",@progbits,1
-.LC145:
+.LC142:
 	.string	"sblk_prog_page ppa = %x, count = %d\n"
 	.section	.rodata.toshiba_15ref_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR22,. + 0
+	.set	.LANCHOR14,. + 0
 	.type	toshiba_15ref_value, %object
 	.size	toshiba_15ref_value, 95
 toshiba_15ref_value:
@@ -32277,7 +32927,7 @@ toshiba_15ref_value:
 	.byte	0
 	.section	.rodata.toshiba_3D_slc_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR39,. + 0
+	.set	.LANCHOR38,. + 0
 	.type	toshiba_3D_slc_value, %object
 	.size	toshiba_3D_slc_value, 11
 toshiba_3D_slc_value:
@@ -32294,7 +32944,7 @@ toshiba_3D_slc_value:
 	.byte	56
 	.section	.rodata.toshiba_3D_tlc_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR38,. + 0
+	.set	.LANCHOR37,. + 0
 	.type	toshiba_3D_tlc_value, %object
 	.size	toshiba_3D_tlc_value, 399
 toshiba_3D_tlc_value:
@@ -32698,15 +33348,15 @@ toshiba_3D_tlc_value:
 	.byte	12
 	.byte	14
 	.section	.rodata.toshiba_3d_read_retrial.str1.1,"aMS",@progbits,1
-.LC117:
+.LC114:
 	.string	"toshiba SRR %d row=%x, status=%d\n"
-.LC118:
+.LC115:
 	.string	"toshiba TRR %d row=%x, status=%d\n"
-.LC119:
+.LC116:
 	.string	"toshiba RR %d row=%x,count %d,status=%d\n"
 	.section	.rodata.toshiba_A19ref_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR23,. + 0
+	.set	.LANCHOR15,. + 0
 	.type	toshiba_A19ref_value, %object
 	.size	toshiba_A19ref_value, 45
 toshiba_A19ref_value:
@@ -32757,7 +33407,7 @@ toshiba_A19ref_value:
 	.byte	0
 	.section	.rodata.toshiba_ref_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR25,. + 0
+	.set	.LANCHOR17,. + 0
 	.type	toshiba_ref_value, %object
 	.size	toshiba_ref_value, 8
 toshiba_ref_value:
@@ -32771,7 +33421,7 @@ toshiba_ref_value:
 	.byte	112
 	.section	.rodata.ymtc_3D_slc_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR43,. + 0
+	.set	.LANCHOR42,. + 0
 	.type	ymtc_3D_slc_value, %object
 	.size	ymtc_3D_slc_value, 10
 ymtc_3D_slc_value:
@@ -32787,7 +33437,7 @@ ymtc_3D_slc_value:
 	.byte	56
 	.section	.rodata.ymtc_3D_tlc_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR42,. + 0
+	.set	.LANCHOR41,. + 0
 	.type	ymtc_3D_tlc_value, %object
 	.size	ymtc_3D_tlc_value, 357
 ymtc_3D_tlc_value:
@@ -33149,20 +33799,20 @@ ymtc_3D_tlc_value:
 	.byte	12
 	.byte	14
 	.section	.rodata.ymtc_3d_read_retrial.str1.1,"aMS",@progbits,1
-.LC120:
+.LC117:
 	.string	"YMTC RR %d row=%x,count %d,status=%d\n"
 	.section	.rodata.ymtc_flash_tlc_page_prog.str1.1,"aMS",@progbits,1
-.LC134:
+.LC131:
 	.string	"ymtc_flash_tlc_page_prog page_addr = %x status = %x\n"
 	.section	.rodata.zftl_discard.str1.1,"aMS",@progbits,1
-.LC253:
+.LC256:
 	.string	"ftl_discard:(%x, %x, %x, %x)\n"
 	.section	.rodata.zftl_do_gc.str1.1,"aMS",@progbits,1
-.LC236:
+.LC239:
 	.string	"gc %d: %d %d %d %d %d %d %d\n"
-.LC237:
+.LC240:
 	.string	"GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\n"
-.LC238:
+.LC241:
 	.string	"gc free %x, %d\n"
 	.section	.rodata.zftl_gc_get_free_sblk.str1.1,"aMS",@progbits,1
 .LC59:
@@ -33175,41 +33825,41 @@ ymtc_3D_tlc_value:
 .LC62:
 	.string	"swl_slc_free_mini_ec_blk alloc sblk %x\n"
 	.section	.rodata.zftl_init.str1.1,"aMS",@progbits,1
-.LC239:
-	.string	"FTL version: 6.0.23 20201130"
-.LC240:
+.LC242:
+	.string	"FTL version: 6.0.24 20210107"
+.LC243:
 	.string	"_c_user_data_density := %d\n"
-.LC241:
+.LC244:
 	.string	"_c_totle_phy_density := %d\n"
-.LC242:
+.LC245:
 	.string	"_c_totle_log_page := %d\n"
-.LC243:
+.LC246:
 	.string	"_c_totle_data_density := %d\n"
-.LC244:
+.LC247:
 	.string	"_c_ftl_pm_page_num := %d\n"
-.LC245:
+.LC248:
 	.string	"_c_ftl_byte_pre_page := %d\n"
-.LC246:
+.LC249:
 	.string	"_c_max_pm_sblk := %d\n"
-.LC247:
+.LC250:
 	.string	"_min_slc_super_block := %d\n"
-.LC248:
+.LC251:
 	.string	"_max_xlc_super_block := %d\n"
-.LC249:
+.LC252:
 	.string	"gp_ftl_ext_info %p %p %p\n"
-.LC250:
+.LC253:
 	.string	"flash info size: %d %d %d\n"
 	.section	.rodata.zftl_read.str1.1,"aMS",@progbits,1
-.LC225:
+.LC228:
 	.string	"ftl_read %x %x %x\n"
-.LC226:
+.LC229:
 	.string	"ftl_read refresh =%x, lpa = %x, ppa= %x\n"
-.LC227:
+.LC230:
 	.string	"id=%d, status = %x, lpa = %x, ppa = %x spare = %x %x %x %x\n"
 	.section	.rodata.zftl_sblk_list_init.str1.1,"aMS",@progbits,1
-.LC94:
+.LC91:
 	.string	"free blk vpn error: %x %x\n"
 	.section	.rodata.zftl_write.str1.1,"aMS",@progbits,1
-.LC252:
+.LC255:
 	.string	"ftlwrite %x %x %x %x\n"
 	.hidden	free
diff --git a/drivers/rknand/rk_zftl_spl_arm_v8.S b/drivers/rknand/rk_zftl_spl_arm_v8.S
index 01eb17e7cc..1667ce9692 100644
--- a/drivers/rknand/rk_zftl_spl_arm_v8.S
+++ b/drivers/rknand/rk_zftl_spl_arm_v8.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2020-11-30
+ * date: 2021-01-07
  */
 	.arch armv8-a+nosimd
 	.file	"rk_zftl_spl_arm_v8.S"
@@ -149,60 +149,67 @@ _list_remove_node:
 	strh	w3, [x1, x0]
 	b	.L22
 	.size	_list_remove_node, .-_list_remove_node
-	.section	.text._list_pop_index_node,"ax",@progbits
+	.section	.text.hynix_set_rr_para,"ax",@progbits
 	.align	2
-	.type	_list_pop_index_node, %function
-_list_pop_index_node:
-	stp	x29, x30, [sp, -32]!
+	.type	hynix_set_rr_para, %function
+hynix_set_rr_para:
+	stp	x29, x30, [sp, -64]!
+	adrp	x2, .LANCHOR6
+	and	w1, w1, 255
+	adrp	x3, .LANCHOR7
 	add	x29, sp, 0
+	ldr	x2, [x2, #:lo12:.LANCHOR6]
+	and	w0, w0, 255
 	stp	x19, x20, [sp, 16]
-	ldr	x20, [x0]
-	cbz	x20, .L31
-	adrp	x3, .LANCHOR4
-	and	w1, w1, 65535
-	mov	w4, 65535
-	mov	w5, 6
-	ldr	x19, [x3, #:lo12:.LANCHOR4]
-.L27:
-	cbnz	w1, .L28
-.L30:
-	sub	x19, x20, x19
-	mov	x1, -6148914691236517206
-	asr	x19, x19, 1
-	movk	x1, 0xaaab, lsl 0
-	mul	x19, x19, x1
-	and	w19, w19, 65535
-	mov	w1, w19
-	bl	_list_remove_node
-	mov	w0, -1
-	strh	w0, [x20]
-	strh	w0, [x20, 2]
-	mov	w0, w19
-.L25:
+	stp	x21, x22, [sp, 32]
+	add	x21, x2, 112
+	str	x23, [sp, 48]
+	add	x23, x2, 128
+	ldr	x19, [x3, #:lo12:.LANCHOR7]
+	ldrb	w22, [x2, 113]
+	ldrb	w2, [x2, 112]
+	cmp	w2, 8
+	mov	x2, 32
+	umaddl	x1, w1, w22, x2
+	beq	.L26
+	mov	w2, 160
+	umaddl	x1, w2, w0, x1
+.L26:
+	ubfiz	x0, x0, 8, 8
+	add	x21, x21, x1
+	add	x19, x19, x0
+	mov	x20, 0
+	mov	w0, 54
+	str	w0, [x19, 2056]
+.L28:
+	cmp	w22, w20, uxtb
+	bhi	.L29
+	ldp	x21, x22, [sp, 32]
+	mov	w0, 22
+	ldr	x23, [sp, 48]
+	str	w0, [x19, 2056]
 	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 32
+	ldp	x29, x30, [sp], 64
 	ret
-.L28:
-	ldrh	w3, [x20]
-	cmp	w3, w4
-	beq	.L30
-	sub	w1, w1, #1
-	umaddl	x20, w3, w5, x19
-	and	w1, w1, 65535
-	b	.L27
-.L31:
-	mov	w0, 65535
-	b	.L25
-	.size	_list_pop_index_node, .-_list_pop_index_node
+.L29:
+	ldrb	w0, [x23, x20]
+	str	w0, [x19, 2052]
+	mov	x0, 1
+	bl	udelay
+	ldrsb	w0, [x21, x20]
+	add	x20, x20, 1
+	str	w0, [x19, 2048]
+	b	.L28
+	.size	hynix_set_rr_para, .-hynix_set_rr_para
 	.section	.text._insert_free_list,"ax",@progbits
 	.align	2
 	.type	_insert_free_list, %function
 _insert_free_list:
-	adrp	x3, .LANCHOR6
+	adrp	x3, .LANCHOR8
 	and	w1, w1, 65535
-	ldrh	w3, [x3, #:lo12:.LANCHOR6]
+	ldrh	w3, [x3, #:lo12:.LANCHOR8]
 	cmp	w3, w1
-	bls	.L33
+	bls	.L31
 	ldrh	w3, [x2]
 	mov	w8, 6
 	ldr	x7, [x0]
@@ -215,18 +222,18 @@ _insert_free_list:
 	add	x6, x5, x12
 	strh	w2, [x6, 2]
 	strh	w2, [x5, x12]
-	cbnz	x7, .L35
-.L40:
+	cbnz	x7, .L33
+.L38:
 	str	x6, [x0]
 	ret
-.L35:
-	adrp	x2, .LANCHOR7
-	adrp	x3, .LANCHOR8
+.L33:
+	adrp	x2, .LANCHOR9
+	adrp	x3, .LANCHOR10
 	mov	w10, w8
 	mov	w15, 65535
-	ldr	x11, [x2, #:lo12:.LANCHOR7]
+	ldr	x11, [x2, #:lo12:.LANCHOR9]
 	ubfiz	x2, x1, 2, 16
-	ldrh	w14, [x3, #:lo12:.LANCHOR8]
+	ldrh	w14, [x3, #:lo12:.LANCHOR10]
 	mov	x3, -6148914691236517206
 	movk	x3, 0xaaab, lsl 0
 	ldr	w4, [x11, x2]
@@ -240,7 +247,7 @@ _insert_free_list:
 	mul	x2, x2, x3
 	mov	x3, x7
 	and	w2, w2, 65535
-.L38:
+.L36:
 	ubfiz	x13, x2, 2, 16
 	ldr	w8, [x11, x13]
 	ldrh	w13, [x11, x13]
@@ -248,43 +255,43 @@ _insert_free_list:
 	and	w13, w13, 2047
 	madd	w8, w14, w8, w13
 	cmp	w4, w8, uxth
-	bls	.L36
+	bls	.L34
 	ldrh	w8, [x3]
 	cmp	w8, w15
-	bne	.L37
+	bne	.L35
 	strh	w2, [x6, 2]
 	strh	w1, [x3]
 	ret
-.L37:
+.L35:
 	umaddl	x3, w8, w10, x5
 	mov	w2, w8
-	b	.L38
-.L36:
+	b	.L36
+.L34:
 	ldrh	w4, [x3, 2]
 	cmp	x7, x3
 	strh	w4, [x6, 2]
 	strh	w2, [x5, x12]
-	bne	.L39
+	bne	.L37
 	strh	w1, [x7, 2]
-	b	.L40
-.L39:
+	b	.L38
+.L37:
 	ldrh	w0, [x3, 2]
 	mov	w2, 6
 	umull	x0, w0, w2
 	strh	w1, [x5, x0]
 	strh	w1, [x3, 2]
-.L33:
+.L31:
 	ret
 	.size	_insert_free_list, .-_insert_free_list
 	.section	.text._insert_data_list,"ax",@progbits
 	.align	2
 	.type	_insert_data_list, %function
 _insert_data_list:
-	adrp	x3, .LANCHOR6
+	adrp	x3, .LANCHOR8
 	and	w1, w1, 65535
-	ldrh	w4, [x3, #:lo12:.LANCHOR6]
+	ldrh	w4, [x3, #:lo12:.LANCHOR8]
 	cmp	w4, w1
-	bls	.L63
+	bls	.L61
 	mov	x5, x3
 	ldrh	w3, [x2]
 	mov	w13, 6
@@ -298,38 +305,38 @@ _insert_data_list:
 	add	x11, x10, x13
 	strh	w2, [x11, 2]
 	strh	w2, [x10, x13]
-	cbnz	x12, .L44
+	cbnz	x12, .L42
 	str	x11, [x0]
 	ret
-.L44:
+.L42:
 	stp	x29, x30, [sp, -32]!
-	adrp	x2, .LANCHOR9
+	adrp	x2, .LANCHOR11
 	uxtw	x3, w1
-	adrp	x6, .LANCHOR8
+	adrp	x6, .LANCHOR10
 	add	x29, sp, 0
-	ldr	x15, [x2, #:lo12:.LANCHOR9]
-	adrp	x2, .LANCHOR7
+	ldr	x15, [x2, #:lo12:.LANCHOR11]
+	adrp	x2, .LANCHOR9
 	ldrh	w4, [x11, 4]
-	ldr	x14, [x2, #:lo12:.LANCHOR7]
+	ldr	x14, [x2, #:lo12:.LANCHOR9]
 	stp	x19, x20, [sp, 16]
 	ldrh	w8, [x15, x3, lsl 1]
 	lsl	x3, x3, 2
-	ldrh	w16, [x6, #:lo12:.LANCHOR8]
+	ldrh	w16, [x6, #:lo12:.LANCHOR10]
 	ldr	w2, [x14, x3]
 	mul	w8, w8, w4
 	ldrh	w3, [x14, x3]
 	ubfx	x2, x2, 11, 8
 	and	w3, w3, 2047
-	cbz	w8, .L45
+	cbz	w8, .L43
 	madd	w2, w16, w2, w3
 	add	w8, w8, w2, uxth
-.L45:
+.L43:
 	sub	x2, x12, x10
 	mov	x3, -6148914691236517206
 	asr	x2, x2, 1
 	movk	x3, 0xaaab, lsl 0
 	cmp	w4, 0
-	ldrh	w19, [x5, #:lo12:.LANCHOR6]
+	ldrh	w19, [x5, #:lo12:.LANCHOR8]
 	csinv	w8, w8, wzr, ne
 	mov	x7, x12
 	mul	x2, x2, x3
@@ -337,13 +344,13 @@ _insert_data_list:
 	mov	w20, 65535
 	mov	w30, 6
 	and	w2, w2, 65535
-.L51:
+.L49:
 	add	w4, w4, 1
 	and	w4, w4, 65535
 	cmp	w4, w19
-	bhi	.L41
+	bhi	.L39
 	cmp	w1, w2
-	beq	.L41
+	beq	.L39
 	uxtw	x6, w2
 	ldrh	w17, [x7, 4]
 	ldrh	w3, [x15, x6, lsl 1]
@@ -353,78 +360,45 @@ _insert_data_list:
 	ldrh	w6, [x14, x6]
 	ubfx	x5, x5, 11, 8
 	and	w6, w6, 2047
-	cbz	w3, .L48
+	cbz	w3, .L46
 	madd	w5, w16, w5, w6
 	add	w3, w3, w5, uxth
-.L48:
-	cbz	w17, .L49
+.L46:
+	cbz	w17, .L47
 	cmp	w8, w3
-	bls	.L49
+	bls	.L47
 	ldrh	w3, [x7]
 	cmp	w3, w20
-	bne	.L50
+	bne	.L48
 	strh	w2, [x11, 2]
 	strh	w1, [x7]
-.L41:
+.L39:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L50:
+.L48:
 	umaddl	x7, w3, w30, x10
 	mov	w2, w3
-	b	.L51
-.L49:
+	b	.L49
+.L47:
 	ldrh	w3, [x7, 2]
 	cmp	x12, x7
 	strh	w3, [x11, 2]
 	strh	w2, [x10, x13]
-	bne	.L52
+	bne	.L50
 	strh	w1, [x12, 2]
 	str	x11, [x0]
-	b	.L41
-.L52:
+	b	.L39
+.L50:
 	ldrh	w0, [x7, 2]
 	mov	w2, 6
 	umull	x0, w0, w2
 	strh	w1, [x10, x0]
 	strh	w1, [x7, 2]
-	b	.L41
-.L63:
+	b	.L39
+.L61:
 	ret
 	.size	_insert_data_list, .-_insert_data_list
-	.section	.text._list_get_gc_head_node.isra.2,"ax",@progbits
-	.align	2
-	.type	_list_get_gc_head_node.isra.2, %function
-_list_get_gc_head_node.isra.2:
-	and	w1, w1, 65535
-	cbz	x0, .L70
-	adrp	x2, .LANCHOR4
-	mov	w3, 65535
-	mov	w4, 6
-	ldr	x2, [x2, #:lo12:.LANCHOR4]
-.L67:
-	cbz	w1, .L68
-	ldrh	w0, [x0]
-	cmp	w0, w3
-	bne	.L69
-	ret
-.L69:
-	sub	w1, w1, #1
-	umaddl	x0, w0, w4, x2
-	and	w1, w1, 65535
-	b	.L67
-.L70:
-	mov	w0, 65535
-	ret
-.L68:
-	sub	x0, x0, x2
-	mov	x1, -6148914691236517206
-	asr	x0, x0, 1
-	movk	x1, 0xaaab, lsl 0
-	mul	x0, x0, x1
-	and	w0, w0, 65535
-	ret
-	.size	_list_get_gc_head_node.isra.2, .-_list_get_gc_head_node.isra.2
 	.section	.text._list_update_data_list,"ax",@progbits
 	.align	2
 	.type	_list_update_data_list, %function
@@ -433,20 +407,20 @@ _list_update_data_list:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w19, w1, 65535
-	adrp	x1, .LANCHOR10
+	adrp	x1, .LANCHOR12
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	ldr	x1, [x1, #:lo12:.LANCHOR10]
+	ldr	x1, [x1, #:lo12:.LANCHOR12]
 	ldrh	w3, [x1, 16]
 	str	x25, [sp, 64]
 	cmp	w3, w19
-	beq	.L72
+	beq	.L63
 	ldrh	w3, [x1, 48]
 	cmp	w3, w19
-	beq	.L72
+	beq	.L63
 	ldrh	w1, [x1, 80]
 	cmp	w1, w19
-	beq	.L72
+	beq	.L63
 	adrp	x1, .LANCHOR4
 	mov	w22, 6
 	ldr	x3, [x0]
@@ -455,36 +429,36 @@ _list_update_data_list:
 	ldr	x24, [x1, #:lo12:.LANCHOR4]
 	add	x23, x24, x22
 	cmp	x23, x3
-	beq	.L72
+	beq	.L63
 	mov	x20, x0
 	ldrh	w0, [x23, 2]
 	mov	w1, 65535
 	mov	x21, x2
 	cmp	w0, w1
-	bne	.L76
+	bne	.L67
 	ldrh	w1, [x24, x22]
 	cmp	w1, w0
-	bne	.L76
-	adrp	x1, .LANCHOR11
+	bne	.L67
+	adrp	x1, .LANCHOR13
 	adrp	x0, .LC0
 	mov	w2, 273
-	add	x1, x1, :lo12:.LANCHOR11
+	add	x1, x1, :lo12:.LANCHOR13
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L76:
+.L67:
 	ldrh	w1, [x23, 2]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L77
+	bne	.L68
 	ldrh	w0, [x24, x22]
 	cmp	w0, w1
-	beq	.L72
-.L77:
-	adrp	x0, .LANCHOR9
+	beq	.L63
+.L68:
+	adrp	x0, .LANCHOR11
 	ubfiz	x2, x19, 1, 16
 	mov	x5, -6148914691236517206
 	mov	w4, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	movk	x5, 0xaaab, lsl 0
 	ldrh	w3, [x0, x2]
 	ldrh	w2, [x23, 4]
@@ -503,7 +477,7 @@ _list_update_data_list:
 	mul	w0, w0, w1
 	csel	w0, w0, w4, ne
 	cmp	w3, w0
-	bcs	.L72
+	bcs	.L63
 	mov	x2, x21
 	mov	w1, w19
 	mov	x0, x20
@@ -517,7 +491,7 @@ _list_update_data_list:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	b	_insert_data_list
-.L72:
+.L63:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -525,27 +499,137 @@ _list_update_data_list:
 	ldp	x29, x30, [sp], 80
 	ret
 	.size	_list_update_data_list, .-_list_update_data_list
-	.section	.text.zftl_get_gc_node.part.10,"ax",@progbits
+	.section	.text.nandc_de_cs.constprop.32,"ax",@progbits
 	.align	2
-	.type	zftl_get_gc_node.part.10, %function
-zftl_get_gc_node.part.10:
-	mov	w1, w0
-	adrp	x0, .LANCHOR12
-	ldr	x0, [x0, #:lo12:.LANCHOR12]
-	b	_list_get_gc_head_node.isra.2
-	.size	zftl_get_gc_node.part.10, .-zftl_get_gc_node.part.10
-	.section	.text.nandc_de_cs.constprop.33,"ax",@progbits
-	.align	2
-	.type	nandc_de_cs.constprop.33, %function
-nandc_de_cs.constprop.33:
-	adrp	x0, .LANCHOR13
-	ldr	x1, [x0, #:lo12:.LANCHOR13]
+	.type	nandc_de_cs.constprop.32, %function
+nandc_de_cs.constprop.32:
+	adrp	x0, .LANCHOR7
+	ldr	x1, [x0, #:lo12:.LANCHOR7]
 	ldr	w0, [x1]
 	and	w0, w0, -256
 	and	w0, w0, -131073
 	str	w0, [x1]
 	ret
-	.size	nandc_de_cs.constprop.33, .-nandc_de_cs.constprop.33
+	.size	nandc_de_cs.constprop.32, .-nandc_de_cs.constprop.32
+	.section	.text.flash_read_status,"ax",@progbits
+	.align	2
+	.global	flash_read_status
+	.type	flash_read_status, %function
+flash_read_status:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	mov	x19, x0
+	mov	w0, 112
+	str	w0, [x19, 8]
+	mov	x0, 1
+	bl	udelay
+	ldr	w0, [x19]
+	ldr	x19, [sp, 16]
+	and	w0, w0, 255
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	flash_read_status, .-flash_read_status
+	.section	.text.toshiba_set_rr_para,"ax",@progbits
+	.align	2
+	.global	toshiba_set_rr_para
+	.type	toshiba_set_rr_para, %function
+toshiba_set_rr_para:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	str	x27, [sp, 80]
+	and	w27, w1, 255
+	add	w2, w27, 1
+	stp	x21, x22, [sp, 32]
+	mov	x21, x0
+	mov	w0, 5
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR14
+	umull	x2, w2, w0
+	stp	x23, x24, [sp, 48]
+	adrp	x0, .LANCHOR15
+	add	x20, x20, :lo12:.LANCHOR14
+	add	x24, x0, :lo12:.LANCHOR15
+	stp	x25, x26, [sp, 64]
+	adrp	x23, .LANCHOR18
+	adrp	x25, .LANCHOR16
+	adrp	x26, .LANCHOR17
+	add	x23, x23, :lo12:.LANCHOR18
+	add	x25, x25, :lo12:.LANCHOR16
+	add	x26, x26, :lo12:.LANCHOR17
+	add	x20, x20, x2
+	add	x24, x24, x2
+	mov	x22, x0
+	mov	x19, 0
+.L78:
+	ldrb	w0, [x23]
+	cmp	w0, w19
+	bhi	.L82
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	ret
+.L82:
+	mov	w0, 85
+	str	w0, [x21, 8]
+	add	x0, x22, :lo12:.LANCHOR15
+	ldrsb	w0, [x19, x0]
+	str	w0, [x21, 4]
+	mov	x0, 1
+	bl	udelay
+	ldrb	w0, [x25]
+	cmp	w0, 34
+	bne	.L79
+	ldrsb	w0, [x24, x19]
+.L84:
+	add	x19, x19, 1
+	str	w0, [x21]
+	b	.L78
+.L79:
+	cmp	w0, 35
+	bne	.L81
+	ldrsb	w0, [x20, x19]
+	b	.L84
+.L81:
+	ldrsb	w0, [x26, w27, sxtw]
+	b	.L84
+	.size	toshiba_set_rr_para, .-toshiba_set_rr_para
+	.section	.text.hynix_reconfig_rr_para,"ax",@progbits
+	.align	2
+	.global	hynix_reconfig_rr_para
+	.type	hynix_reconfig_rr_para, %function
+hynix_reconfig_rr_para:
+	adrp	x1, .LANCHOR16
+	ldrb	w1, [x1, #:lo12:.LANCHOR16]
+	sub	w1, w1, #1
+	and	w1, w1, 255
+	cmp	w1, 7
+	bhi	.L91
+	stp	x29, x30, [sp, -32]!
+	and	w0, w0, 255
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR6
+	sxtw	x19, w0
+	ldr	x1, [x20, #:lo12:.LANCHOR6]
+	add	x1, x1, x19
+	ldrb	w1, [x1, 120]
+	cbz	w1, .L85
+	mov	w1, 0
+	bl	hynix_set_rr_para
+	ldr	x0, [x20, #:lo12:.LANCHOR6]
+	add	x0, x0, x19
+	strb	wzr, [x0, 120]
+.L85:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L91:
+	ret
+	.size	hynix_reconfig_rr_para, .-hynix_reconfig_rr_para
 	.section	.text.nand_flash_print_info,"ax",@progbits
 	.align	2
 	.global	nand_flash_print_info
@@ -554,19 +638,19 @@ nand_flash_print_info:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR14
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L86
-	adrp	x1, .LANCHOR15
+	adrp	x19, .LANCHOR19
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L95
+	adrp	x1, .LANCHOR20
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR15
+	add	x1, x1, :lo12:.LANCHOR20
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L86:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L87
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L95:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L96
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrb	w6, [x0, 6]
 	ldrb	w5, [x0, 5]
 	ldrb	w4, [x0, 4]
@@ -576,272 +660,272 @@ nand_flash_print_info:
 	adrp	x0, .LC2
 	add	x0, x0, :lo12:.LC2
 	bl	printf
-.L87:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L88
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L96:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L97
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrb	w1, [x0, 8]
 	adrp	x0, .LC3
 	add	x0, x0, :lo12:.LC3
 	bl	printf
-.L88:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L89
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L97:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L98
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrb	w1, [x0, 9]
 	adrp	x0, .LC4
 	add	x0, x0, :lo12:.LC4
 	bl	printf
-.L89:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L90
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L98:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L99
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrh	w1, [x0, 10]
 	adrp	x0, .LC5
 	add	x0, x0, :lo12:.LC5
 	bl	printf
-.L90:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L91
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L99:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L100
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrb	w1, [x0, 12]
 	adrp	x0, .LC6
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L91:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L92
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L100:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L101
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrb	w1, [x0, 13]
 	adrp	x0, .LC7
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L92:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L93
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L101:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L102
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrh	w1, [x0, 14]
 	adrp	x0, .LC8
 	add	x0, x0, :lo12:.LC8
 	bl	printf
-.L93:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L94
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L102:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L103
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrb	w1, [x0, 23]
 	adrp	x0, .LC9
 	add	x0, x0, :lo12:.LC9
 	bl	printf
-.L94:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L95
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L103:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L104
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrb	w1, [x0, 18]
 	adrp	x0, .LC10
 	add	x0, x0, :lo12:.LC10
 	bl	printf
-.L95:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L96
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L104:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L105
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrb	w1, [x0, 19]
 	adrp	x0, .LC11
 	add	x0, x0, :lo12:.LC11
 	bl	printf
-.L96:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L97
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
-	ldrb	w1, [x0, 20]
+.L105:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L106
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
+	ldrb	w1, [x0, 20]
 	adrp	x0, .LC12
 	add	x0, x0, :lo12:.LC12
 	bl	printf
-.L97:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L98
-	adrp	x0, .LANCHOR17
-	ldrb	w1, [x0, #:lo12:.LANCHOR17]
+.L106:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L107
+	adrp	x0, .LANCHOR22
+	ldrb	w1, [x0, #:lo12:.LANCHOR22]
 	adrp	x0, .LC13
 	add	x0, x0, :lo12:.LC13
 	bl	printf
-.L98:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L99
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L107:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L108
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrb	w1, [x0, 22]
 	adrp	x0, .LC14
 	add	x0, x0, :lo12:.LC14
 	bl	printf
-.L99:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L100
-	adrp	x0, .LANCHOR18
-	ldrb	w1, [x0, #:lo12:.LANCHOR18]
+.L108:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L109
+	adrp	x0, .LANCHOR23
+	ldrb	w1, [x0, #:lo12:.LANCHOR23]
 	adrp	x0, .LC15
 	add	x0, x0, :lo12:.LC15
 	bl	printf
-.L100:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L101
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L109:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L110
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrb	w1, [x0, 16]
 	adrp	x0, .LC16
 	add	x0, x0, :lo12:.LC16
 	and	w1, w1, 1
 	bl	printf
-.L101:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L102
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L110:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L111
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC17
 	add	x0, x0, :lo12:.LC17
 	ubfx	x1, x1, 1, 1
 	bl	printf
-.L102:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L103
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L111:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L112
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC18
 	add	x0, x0, :lo12:.LC18
 	ubfx	x1, x1, 2, 1
 	bl	printf
-.L103:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L104
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L112:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L113
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC19
 	add	x0, x0, :lo12:.LC19
 	ubfx	x1, x1, 3, 1
 	bl	printf
-.L104:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L105
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L113:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L114
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC20
 	add	x0, x0, :lo12:.LC20
 	ubfx	x1, x1, 4, 1
 	bl	printf
-.L105:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L106
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L114:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L115
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC21
 	add	x0, x0, :lo12:.LC21
 	ubfx	x1, x1, 5, 1
 	bl	printf
-.L106:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L107
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L115:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L116
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC22
 	add	x0, x0, :lo12:.LC22
 	ubfx	x1, x1, 6, 1
 	bl	printf
-.L107:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L108
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L116:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L117
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC23
 	add	x0, x0, :lo12:.LC23
 	ubfx	x1, x1, 7, 1
 	bl	printf
-.L108:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L109
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L117:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L118
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrb	w1, [x0, 17]
 	adrp	x0, .LC24
 	add	x0, x0, :lo12:.LC24
 	and	w1, w1, 1
 	bl	printf
-.L109:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L110
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L118:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L119
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC25
 	add	x0, x0, :lo12:.LC25
 	ubfx	x1, x1, 9, 1
 	bl	printf
-.L110:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L111
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L119:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L120
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC26
 	add	x0, x0, :lo12:.LC26
 	ubfx	x1, x1, 10, 1
 	bl	printf
-.L111:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L112
-	adrp	x0, .LANCHOR19
-	ldrb	w2, [x0, #:lo12:.LANCHOR19]
+.L120:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L121
+	adrp	x0, .LANCHOR24
+	ldrb	w2, [x0, #:lo12:.LANCHOR24]
 	adrp	x0, .LANCHOR0
 	ldrb	w1, [x0, #:lo12:.LANCHOR0]
 	adrp	x0, .LC27
 	add	x0, x0, :lo12:.LC27
 	bl	printf
-.L112:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L113
-	adrp	x0, .LANCHOR20
-	add	x0, x0, :lo12:.LANCHOR20
+.L121:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L122
+	adrp	x0, .LANCHOR25
+	add	x0, x0, :lo12:.LANCHOR25
 	ldrb	w2, [x0, 11]
 	ldrb	w1, [x0, 10]
 	adrp	x0, .LC28
 	add	x0, x0, :lo12:.LC28
 	bl	printf
-.L113:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L114
-	adrp	x0, .LANCHOR20
-	add	x0, x0, :lo12:.LANCHOR20
+.L122:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L123
+	adrp	x0, .LANCHOR25
+	add	x0, x0, :lo12:.LANCHOR25
 	ldrb	w2, [x0, 9]
 	ldrb	w1, [x0, 8]
 	adrp	x0, .LC29
 	add	x0, x0, :lo12:.LC29
 	bl	printf
-.L114:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L85
-	adrp	x0, .LANCHOR21
+.L123:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L94
+	adrp	x0, .LANCHOR26
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	ldrb	w1, [x0, #:lo12:.LANCHOR21]
+	ldrb	w1, [x0, #:lo12:.LANCHOR26]
 	adrp	x0, .LC30
 	add	x0, x0, :lo12:.LC30
 	b	printf
-.L85:
+.L94:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -851,193 +935,31 @@ nand_flash_print_info:
 	.global	timer_delay_ns
 	.type	timer_delay_ns, %function
 timer_delay_ns:
-	sub	sp, sp, #16
-	lsr	w0, w0, 4
-	str	w0, [sp, 12]
-.L205:
-	ldr	w0, [sp, 12]
-	sub	w1, w0, #1
-	str	w1, [sp, 12]
-	cbnz	w0, .L205
-	add	sp, sp, 16
-	ret
+	uxtw	x0, w0
+	mov	x1, 1000
+	add	x0, x0, 999
+	udiv	x0, x0, x1
+	b	udelay
 	.size	timer_delay_ns, .-timer_delay_ns
-	.section	.text.flash_read_status,"ax",@progbits
-	.align	2
-	.global	flash_read_status
-	.type	flash_read_status, %function
-flash_read_status:
-	stp	x29, x30, [sp, -16]!
-	mov	x2, x0
-	mov	w0, 112
-	add	x29, sp, 0
-	str	w0, [x2, 8]
-	mov	w0, 120
-	bl	timer_delay_ns
-	ldr	w0, [x2]
-	ldp	x29, x30, [sp], 16
-	and	w0, w0, 255
-	ret
-	.size	flash_read_status, .-flash_read_status
-	.section	.text.toshiba_set_rr_para,"ax",@progbits
-	.align	2
-	.global	toshiba_set_rr_para
-	.type	toshiba_set_rr_para, %function
-toshiba_set_rr_para:
-	and	w11, w1, 255
-	mov	x4, x0
-	add	w2, w11, 1
-	mov	w0, 5
-	adrp	x6, .LANCHOR26
-	add	x6, x6, :lo12:.LANCHOR26
-	adrp	x3, .LANCHOR22
-	add	x3, x3, :lo12:.LANCHOR22
-	umull	x2, w2, w0
-	adrp	x0, .LANCHOR23
-	add	x7, x0, :lo12:.LANCHOR23
-	mov	x5, x0
-	ldrb	w0, [x6]
-	add	x3, x3, x2
-	add	x7, x7, x2
-	adrp	x8, .LANCHOR24
-	mov	x2, 0
-	adrp	x10, .LANCHOR25
-	add	x8, x8, :lo12:.LANCHOR24
-	add	x10, x10, :lo12:.LANCHOR25
-	cmp	w0, w2
-	bhi	.L218
-	ret
-.L212:
-	cmp	w0, 35
-	bne	.L214
-	ldrsb	w0, [x3, x2]
-	b	.L219
-.L214:
-	ldrsb	w0, [x10, w11, sxtw]
-	b	.L219
-.L218:
-	stp	x29, x30, [sp, -16]!
-	add	x29, sp, 0
-.L215:
-	mov	w0, 85
-	str	w0, [x4, 8]
-	add	x0, x5, :lo12:.LANCHOR23
-	ldrsb	w0, [x2, x0]
-	str	w0, [x4, 4]
-	mov	w0, 200
-	bl	timer_delay_ns
-	ldrb	w0, [x8]
-	cmp	w0, 34
-	bne	.L212
-	ldrsb	w0, [x7, x2]
-.L219:
-	str	w0, [x4]
-	add	x2, x2, 1
-	ldrb	w0, [x6]
-	cmp	w0, w2
-	bhi	.L215
-	ldp	x29, x30, [sp], 16
-	ret
-	.size	toshiba_set_rr_para, .-toshiba_set_rr_para
-	.section	.text.hynix_set_rr_para,"ax",@progbits
-	.align	2
-	.type	hynix_set_rr_para, %function
-hynix_set_rr_para:
-	adrp	x2, .LANCHOR27
-	and	w1, w1, 255
-	and	w0, w0, 255
-	ldr	x3, [x2, #:lo12:.LANCHOR27]
-	adrp	x2, .LANCHOR13
-	add	x6, x3, 128
-	add	x4, x3, 112
-	ldr	x2, [x2, #:lo12:.LANCHOR13]
-	ldrb	w5, [x3, 113]
-	ldrb	w3, [x3, 112]
-	cmp	w3, 8
-	mov	x3, 32
-	umaddl	x1, w1, w5, x3
-	beq	.L221
-	mov	w3, 160
-	umaddl	x1, w3, w0, x1
-.L221:
-	ubfiz	x0, x0, 8, 8
-	mov	x3, 0
-	add	x2, x2, x0
-	mov	w0, 54
-	add	x4, x4, x1
-	cmp	w5, w3, uxtb
-	str	w0, [x2, 2056]
-	bhi	.L228
-	mov	w0, 22
-	str	w0, [x2, 2056]
-	ret
-.L228:
-	stp	x29, x30, [sp, -16]!
-	add	x29, sp, 0
-.L224:
-	ldrb	w0, [x6, x3]
-	str	w0, [x2, 2052]
-	mov	w0, 120
-	bl	timer_delay_ns
-	ldrsb	w0, [x4, x3]
-	str	w0, [x2, 2048]
-	add	x3, x3, 1
-	cmp	w5, w3, uxtb
-	bhi	.L224
-	mov	w0, 22
-	str	w0, [x2, 2056]
-	ldp	x29, x30, [sp], 16
-	ret
-	.size	hynix_set_rr_para, .-hynix_set_rr_para
-	.section	.text.hynix_reconfig_rr_para,"ax",@progbits
-	.align	2
-	.global	hynix_reconfig_rr_para
-	.type	hynix_reconfig_rr_para, %function
-hynix_reconfig_rr_para:
-	adrp	x1, .LANCHOR24
-	ldrb	w1, [x1, #:lo12:.LANCHOR24]
-	sub	w1, w1, #1
-	and	w1, w1, 255
-	cmp	w1, 7
-	bhi	.L235
-	adrp	x8, .LANCHOR27
-	and	w0, w0, 255
-	sxtw	x7, w0
-	ldr	x1, [x8, #:lo12:.LANCHOR27]
-	add	x1, x1, x7
-	ldrb	w1, [x1, 120]
-	cbz	w1, .L235
-	stp	x29, x30, [sp, -16]!
-	mov	w1, 0
-	add	x29, sp, 0
-	bl	hynix_set_rr_para
-	ldr	x0, [x8, #:lo12:.LANCHOR27]
-	add	x0, x0, x7
-	strb	wzr, [x0, 120]
-	ldp	x29, x30, [sp], 16
-	ret
-.L235:
-	ret
-	.size	hynix_reconfig_rr_para, .-hynix_reconfig_rr_para
 	.section	.text.nandc_set_ddr_para,"ax",@progbits
 	.align	2
 	.global	nandc_set_ddr_para
 	.type	nandc_set_ddr_para, %function
 nandc_set_ddr_para:
-	adrp	x1, .LANCHOR28
+	adrp	x1, .LANCHOR27
 	and	w0, w0, 255
-	adrp	x2, .LANCHOR13
-	ldrb	w1, [x1, #:lo12:.LANCHOR28]
-	ldr	x2, [x2, #:lo12:.LANCHOR13]
+	adrp	x2, .LANCHOR7
+	ldrb	w1, [x1, #:lo12:.LANCHOR27]
+	ldr	x2, [x2, #:lo12:.LANCHOR7]
 	cmp	w1, 9
 	lsl	w1, w0, 16
 	lsl	w0, w0, 8
 	orr	w1, w1, w0
 	orr	w1, w1, 3
-	bne	.L239
+	bne	.L215
 	str	w1, [x2, 80]
 	ret
-.L239:
+.L215:
 	str	w1, [x2, 304]
 	ret
 	.size	nandc_set_ddr_para, .-nandc_set_ddr_para
@@ -1046,43 +968,43 @@ nandc_set_ddr_para:
 	.global	nandc_get_ddr_para
 	.type	nandc_get_ddr_para, %function
 nandc_get_ddr_para:
-	adrp	x0, .LANCHOR28
-	ldrb	w0, [x0, #:lo12:.LANCHOR28]
+	adrp	x0, .LANCHOR27
+	ldrb	w0, [x0, #:lo12:.LANCHOR27]
 	cmp	w0, 9
-	adrp	x0, .LANCHOR13
-	ldr	x0, [x0, #:lo12:.LANCHOR13]
-	bne	.L242
+	adrp	x0, .LANCHOR7
+	ldr	x0, [x0, #:lo12:.LANCHOR7]
+	bne	.L218
 	ldr	w0, [x0, 80]
-.L244:
+.L220:
 	ubfx	x0, x0, 8, 8
 	ret
-.L242:
+.L218:
 	ldr	w0, [x0, 304]
-	b	.L244
+	b	.L220
 	.size	nandc_get_ddr_para, .-nandc_get_ddr_para
 	.section	.text.nandc_set_if_mode,"ax",@progbits
 	.align	2
 	.global	nandc_set_if_mode
 	.type	nandc_set_if_mode, %function
 nandc_set_if_mode:
-	adrp	x1, .LANCHOR13
+	adrp	x1, .LANCHOR7
 	and	w0, w0, 255
 	tst	w0, 6
-	ldr	x2, [x1, #:lo12:.LANCHOR13]
+	ldr	x2, [x1, #:lo12:.LANCHOR7]
 	ldr	w1, [x2]
-	beq	.L246
+	beq	.L222
 	tst	x0, 4
 	orr	w1, w1, 24576
-	adrp	x0, .LANCHOR28
+	adrp	x0, .LANCHOR27
 	and	w1, w1, -32769
 	orr	w1, w1, 196608
-	ldrb	w0, [x0, #:lo12:.LANCHOR28]
+	ldrb	w0, [x0, #:lo12:.LANCHOR27]
 	orr	w3, w1, 32768
 	csel	w1, w3, w1, ne
 	cmp	w0, 9
 	mov	w0, 4099
 	movk	w0, 0x10, lsl 16
-	bne	.L248
+	bne	.L224
 	mov	w3, 8321
 	str	w3, [x2, 8]
 	str	w0, [x2, 80]
@@ -1090,10 +1012,10 @@ nandc_set_if_mode:
 	str	w0, [x2, 84]
 	mov	w0, 39
 	str	w0, [x2, 84]
-.L249:
+.L225:
 	str	w1, [x2]
 	ret
-.L248:
+.L224:
 	mov	w3, 8322
 	str	w3, [x2, 344]
 	str	w0, [x2, 304]
@@ -1101,20 +1023,20 @@ nandc_set_if_mode:
 	str	w0, [x2, 308]
 	mov	w0, 39
 	str	w0, [x2, 308]
-	b	.L249
-.L246:
+	b	.L225
+.L222:
 	and	w1, w1, -8193
-	b	.L249
+	b	.L225
 	.size	nandc_set_if_mode, .-nandc_set_if_mode
 	.section	.text.nandc_cs,"ax",@progbits
 	.align	2
 	.global	nandc_cs
 	.type	nandc_cs, %function
 nandc_cs:
-	adrp	x1, .LANCHOR13
+	adrp	x1, .LANCHOR7
 	mov	w2, 1
 	lsl	w0, w2, w0
-	ldr	x3, [x1, #:lo12:.LANCHOR13]
+	ldr	x3, [x1, #:lo12:.LANCHOR7]
 	ldr	w1, [x3]
 	bfi	w1, w0, 0, 8
 	str	w1, [x3]
@@ -1125,62 +1047,68 @@ nandc_cs:
 	.global	flash_wait_device_ready_raw
 	.type	flash_wait_device_ready_raw, %function
 flash_wait_device_ready_raw:
-	stp	x29, x30, [sp, -48]!
+	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
-	str	x21, [sp, 32]
-	and	w21, w0, 255
-	adrp	x0, .LANCHOR18
 	stp	x19, x20, [sp, 16]
-	mov	w19, w1
-	mov	w20, w2
-	ldrb	w0, [x0, #:lo12:.LANCHOR18]
-	cmp	w0, w21
-	bhi	.L254
-	adrp	x1, .LANCHOR29
+	and	w19, w0, 255
+	adrp	x0, .LANCHOR23
+	stp	x25, x26, [sp, 64]
+	stp	x21, x22, [sp, 32]
+	mov	w20, w1
+	ldrb	w0, [x0, #:lo12:.LANCHOR23]
+	mov	w26, w2
+	stp	x23, x24, [sp, 48]
+	str	x27, [sp, 80]
+	cmp	w0, w19
+	bhi	.L230
+	adrp	x1, .LANCHOR28
 	adrp	x0, .LC0
-	mov	w2, 805
-	add	x1, x1, :lo12:.LANCHOR29
+	mov	w2, 812
+	add	x1, x1, :lo12:.LANCHOR28
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L254:
-	adrp	x0, .LANCHOR30
-	add	x0, x0, :lo12:.LANCHOR30
-	lsr	w7, w19, 8
-	lsr	w8, w19, 16
-	lsr	w10, w19, 24
-	adrp	x5, .LANCHOR31
-	ldrb	w6, [x0, w21, sxtw]
-	adrp	x0, .LANCHOR13
-	and	w19, w19, 255
-	add	x5, x5, :lo12:.LANCHOR31
-	ldr	x4, [x0, #:lo12:.LANCHOR13]
-	mov	w11, 120
-	ubfiz	x0, x6, 8, 8
-	add	x4, x4, x0
-.L260:
-	mov	w0, w6
+.L230:
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
+	lsr	w23, w20, 8
+	lsr	w24, w20, 16
+	lsr	w25, w20, 24
+	adrp	x21, .LANCHOR30
+	ldrb	w22, [x0, w19, sxtw]
+	adrp	x0, .LANCHOR7
+	and	w20, w20, 255
+	add	x21, x21, :lo12:.LANCHOR30
+	ldr	x19, [x0, #:lo12:.LANCHOR7]
+	mov	w27, 120
+	ubfiz	x0, x22, 8, 8
+	add	x19, x19, x0
+.L236:
+	mov	w0, w22
 	bl	nandc_cs
-	str	w11, [x4, 2056]
-	str	w19, [x4, 2052]
-	ldrb	w0, [x5]
-	str	w7, [x4, 2052]
-	str	w8, [x4, 2052]
-	cbz	w0, .L255
-	str	w10, [x4, 2052]
-.L255:
-	mov	w0, 120
-	bl	timer_delay_ns
-	ldr	w2, [x4, 2048]
+	str	w27, [x19, 2056]
+	str	w20, [x19, 2052]
+	ldrb	w0, [x21]
+	str	w23, [x19, 2052]
+	str	w24, [x19, 2052]
+	cbz	w0, .L231
+	str	w25, [x19, 2052]
+.L231:
+	mov	x0, 1
+	bl	udelay
+	ldr	w2, [x19, 2048]
 	and	w2, w2, 255
-	bl	nandc_de_cs.constprop.33
-	bics	wzr, w20, w2
-	bne	.L260
+	bl	nandc_de_cs.constprop.32
+	bics	wzr, w26, w2
+	bne	.L236
 	cmp	w2, 255
-	beq	.L260
+	beq	.L236
 	mov	w0, w2
-	ldr	x21, [sp, 32]
+	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
 	ret
 	.size	flash_wait_device_ready_raw, .-flash_wait_device_ready_raw
 	.section	.text.flash_wait_device_ready,"ax",@progbits
@@ -1189,10 +1117,10 @@ flash_wait_device_ready_raw:
 	.type	flash_wait_device_ready, %function
 flash_wait_device_ready:
 	mov	w2, w1
-	adrp	x1, .LANCHOR32
+	adrp	x1, .LANCHOR31
 	mov	w5, 24
 	mov	w4, 1
-	ldrb	w6, [x1, #:lo12:.LANCHOR32]
+	ldrb	w6, [x1, #:lo12:.LANCHOR31]
 	tst	x0, 50331648
 	sub	w5, w5, w6
 	lsl	w3, w4, w5
@@ -1203,39 +1131,39 @@ flash_wait_device_ready:
 	and	w4, w4, w5
 	and	w1, w3, w0
 	and	w4, w4, 255
-	bne	.L265
+	bne	.L241
 	adrp	x0, .LANCHOR0
 	adrp	x5, .LANCHOR1
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L266
+	cbz	w0, .L242
 	ldrb	w0, [x5, #:lo12:.LANCHOR1]
-	cbz	w0, .L265
-.L266:
+	cbz	w0, .L241
+.L242:
 	adrp	x0, .LANCHOR2
 	ldrh	w3, [x0, #:lo12:.LANCHOR2]
 	udiv	w0, w1, w3
 	mul	w0, w0, w3
 	sub	w3, w1, w0
 	ldrb	w1, [x5, #:lo12:.LANCHOR1]
-	cbz	w1, .L267
+	cbz	w1, .L243
 	add	w1, w0, w3, lsl 1
-.L265:
+.L241:
 	mov	w0, w4
 	b	flash_wait_device_ready_raw
-.L267:
+.L243:
 	adrp	x5, .LANCHOR3
 	add	x5, x5, :lo12:.LANCHOR3
 	ldrh	w3, [x5, w3, uxtw 1]
 	add	w1, w3, w0
-	b	.L265
+	b	.L241
 	.size	flash_wait_device_ready, .-flash_wait_device_ready
 	.section	.text.nandc_de_cs,"ax",@progbits
 	.align	2
 	.global	nandc_de_cs
 	.type	nandc_de_cs, %function
 nandc_de_cs:
-	adrp	x0, .LANCHOR13
-	ldr	x1, [x0, #:lo12:.LANCHOR13]
+	adrp	x0, .LANCHOR7
+	ldr	x1, [x0, #:lo12:.LANCHOR7]
 	ldr	w0, [x1]
 	and	w0, w0, -256
 	and	w0, w0, -131073
@@ -1247,194 +1175,207 @@ nandc_de_cs:
 	.global	nandc_wait_flash_ready_no_delay
 	.type	nandc_wait_flash_ready_no_delay, %function
 nandc_wait_flash_ready_no_delay:
-	mov	w2, 34464
-	stp	x29, x30, [sp, -32]!
-	movk	w2, 0x1, lsl 16
-	adrp	x3, .LANCHOR13
+	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
-.L277:
-	ldr	x0, [x3, #:lo12:.LANCHOR13]
+	stp	x19, x20, [sp, 16]
+	mov	w19, 34464
+	movk	w19, 0x1, lsl 16
+	adrp	x20, .LANCHOR7
+.L253:
+	ldr	x0, [x20, #:lo12:.LANCHOR7]
 	ldr	w0, [x0]
-	str	w0, [x29, 24]
-	ldr	w0, [x29, 24]
-	tbnz	x0, 9, .L278
-	mov	w0, 10
-	bl	timer_delay_ns
-	subs	w2, w2, #1
-	bne	.L277
+	str	w0, [x29, 40]
+	ldr	w0, [x29, 40]
+	tbnz	x0, 9, .L254
+	mov	x0, 1
+	bl	udelay
+	subs	w19, w19, #1
+	bne	.L253
 	mov	w0, -1
-.L275:
-	ldp	x29, x30, [sp], 32
+.L251:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
 	ret
-.L278:
+.L254:
 	mov	w0, 0
-	b	.L275
+	b	.L251
 	.size	nandc_wait_flash_ready_no_delay, .-nandc_wait_flash_ready_no_delay
 	.section	.text.zftl_flash_enter_slc_mode,"ax",@progbits
 	.align	2
 	.global	zftl_flash_enter_slc_mode
 	.type	zftl_flash_enter_slc_mode, %function
 zftl_flash_enter_slc_mode:
-	and	x4, x0, 255
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	x19, x0, 255
 	adrp	x0, .LANCHOR0
+	stp	x21, x22, [sp, 32]
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L300
-	adrp	x1, .LANCHOR13
+	cbz	w0, .L257
+	adrp	x1, .LANCHOR7
 	cmp	w0, 1
-	ldr	x5, [x1, #:lo12:.LANCHOR13]
-	bne	.L284
-	adrp	x0, .LANCHOR33+29
-	ldrb	w0, [x0, #:lo12:.LANCHOR33+29]
-	cbz	w0, .L300
-	add	x4, x4, 8
-	add	x4, x5, x4, lsl 8
-	str	w0, [x4, 8]
-	ret
-.L284:
-	stp	x29, x30, [sp, -16]!
+	ldr	x20, [x1, #:lo12:.LANCHOR7]
+	bne	.L260
+	adrp	x0, .LANCHOR32+29
+	ldrb	w0, [x0, #:lo12:.LANCHOR32+29]
+	cbz	w0, .L257
+.L276:
+	add	x19, x19, 8
+	add	x19, x20, x19, lsl 8
+	str	w0, [x19, 8]
+.L257:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
+.L260:
 	cmp	w0, 2
-	add	x29, sp, 0
-	bne	.L286
-	adrp	x0, .LANCHOR34
-	add	x0, x0, :lo12:.LANCHOR34
-	ldrb	w1, [x0, x4]
-	cbz	w1, .L281
-	adrp	x6, .LANCHOR33
-	add	x6, x6, :lo12:.LANCHOR33
-	strb	wzr, [x0, x4]
-	ldrb	w0, [x6, 29]
-	cbz	w0, .L281
+	bne	.L262
+	adrp	x0, .LANCHOR33
+	add	x0, x0, :lo12:.LANCHOR33
+	ldrb	w1, [x0, x19]
+	cbz	w1, .L257
+	adrp	x21, .LANCHOR32
+	add	x21, x21, :lo12:.LANCHOR32
+	strb	wzr, [x0, x19]
+	ldrb	w0, [x21, 29]
+	cbz	w0, .L257
 	bl	nandc_wait_flash_ready_no_delay
-	add	x4, x4, 8
-	add	x4, x5, x4, lsl 8
-	ldrb	w0, [x6, 29]
-	str	w0, [x4, 8]
-.L281:
-	ldp	x29, x30, [sp], 16
-	ret
-.L286:
+	ldrb	w0, [x21, 29]
+	b	.L276
+.L262:
 	cmp	w0, 3
-	bne	.L281
-	adrp	x6, .LANCHOR34
-	sxtw	x7, w4
-	add	x6, x6, :lo12:.LANCHOR34
-	ldrb	w0, [x6, x7]
-	cbz	w0, .L281
+	bne	.L257
+	adrp	x21, .LANCHOR33
+	sxtw	x22, w19
+	add	x21, x21, :lo12:.LANCHOR33
+	ldrb	w0, [x21, x22]
+	cbz	w0, .L257
+	ubfiz	x19, x19, 8, 8
 	bl	nandc_wait_flash_ready_no_delay
-	ubfiz	x4, x4, 8, 8
-	add	x4, x5, x4
+	add	x19, x20, x19
 	mov	w0, 239
-	strb	wzr, [x6, x7]
-	str	w0, [x4, 2056]
+	strb	wzr, [x21, x22]
+	str	w0, [x19, 2056]
 	mov	w0, 145
-	str	w0, [x4, 2052]
-	mov	w0, 100
-	bl	timer_delay_ns
-	str	wzr, [x4, 2048]
+	str	w0, [x19, 2052]
+	mov	x0, 1
+	bl	udelay
+	str	wzr, [x19, 2048]
 	mov	w0, 1
-	str	w0, [x4, 2048]
-	str	wzr, [x4, 2048]
-	mov	w0, 150
-	str	wzr, [x4, 2048]
-	bl	timer_delay_ns
+	str	w0, [x19, 2048]
+	str	wzr, [x19, 2048]
+	mov	x0, 1
+	str	wzr, [x19, 2048]
+	bl	udelay
 	bl	nandc_wait_flash_ready_no_delay
 	mov	w0, 218
-	str	w0, [x4, 2056]
-	b	.L281
-.L300:
-	ret
+	ldp	x21, x22, [sp, 32]
+	str	w0, [x19, 2056]
+	ldp	x19, x20, [sp, 16]
+	mov	x0, 1
+	ldp	x29, x30, [sp], 48
+	b	udelay
 	.size	zftl_flash_enter_slc_mode, .-zftl_flash_enter_slc_mode
 	.section	.text.zftl_flash_exit_slc_mode,"ax",@progbits
 	.align	2
 	.global	zftl_flash_exit_slc_mode
 	.type	zftl_flash_exit_slc_mode, %function
 zftl_flash_exit_slc_mode:
-	and	x4, x0, 255
+	stp	x29, x30, [sp, -64]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	x19, x0, 255
 	adrp	x0, .LANCHOR0
+	stp	x21, x22, [sp, 32]
+	str	x23, [sp, 48]
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L323
-	adrp	x1, .LANCHOR13
+	cbz	w0, .L277
+	adrp	x1, .LANCHOR7
 	cmp	w0, 1
-	ldr	x5, [x1, #:lo12:.LANCHOR13]
-	bne	.L305
-	adrp	x0, .LANCHOR33+30
-	ldrb	w0, [x0, #:lo12:.LANCHOR33+30]
-	cbz	w0, .L323
-	add	x4, x4, 8
-	add	x4, x5, x4, lsl 8
-	str	w0, [x4, 8]
+	ldr	x20, [x1, #:lo12:.LANCHOR7]
+	bne	.L280
+	adrp	x0, .LANCHOR32+30
+	ldrb	w0, [x0, #:lo12:.LANCHOR32+30]
+	cbz	w0, .L277
+.L298:
+	add	x19, x19, 8
+	add	x19, x20, x19, lsl 8
+	str	w0, [x19, 8]
+.L277:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 64
 	ret
-.L305:
-	stp	x29, x30, [sp, -16]!
+.L280:
 	cmp	w0, 2
-	add	x29, sp, 0
-	bne	.L307
-	adrp	x0, .LANCHOR34
-	add	x0, x0, :lo12:.LANCHOR34
-	ldrb	w1, [x0, x4]
-	cbnz	w1, .L302
-	adrp	x6, .LANCHOR33
-	add	x6, x6, :lo12:.LANCHOR33
+	bne	.L282
+	adrp	x0, .LANCHOR33
+	add	x0, x0, :lo12:.LANCHOR33
+	ldrb	w1, [x0, x19]
+	cbnz	w1, .L277
+	adrp	x21, .LANCHOR32
+	add	x21, x21, :lo12:.LANCHOR32
 	mov	w2, 4
-	ldrb	w1, [x6, 12]
+	ldrb	w1, [x21, 12]
 	cmp	w1, 2
 	csel	w1, w1, w2, eq
-	strb	w1, [x0, x4]
-	ldrb	w0, [x6, 30]
-	cbz	w0, .L302
+	strb	w1, [x0, x19]
+	ldrb	w0, [x21, 30]
+	cbz	w0, .L277
 	bl	nandc_wait_flash_ready_no_delay
-	add	x4, x4, 8
-	add	x4, x5, x4, lsl 8
-	ldrb	w0, [x6, 30]
-	str	w0, [x4, 8]
-.L302:
-	ldp	x29, x30, [sp], 16
-	ret
-.L307:
+	ldrb	w0, [x21, 30]
+	b	.L298
+.L282:
 	cmp	w0, 3
-	bne	.L302
-	adrp	x6, .LANCHOR34
-	sxtw	x7, w4
-	add	x6, x6, :lo12:.LANCHOR34
-	ldrb	w0, [x6, x7]
-	cbnz	w0, .L302
+	bne	.L277
+	adrp	x21, .LANCHOR33
+	sxtw	x23, w19
+	add	x21, x21, :lo12:.LANCHOR33
+	ldrb	w0, [x21, x23]
+	cbnz	w0, .L277
+	adrp	x22, .LANCHOR32
+	add	x22, x22, :lo12:.LANCHOR32
 	bl	nandc_wait_flash_ready_no_delay
-	ubfiz	x4, x4, 8, 8
-	adrp	x2, .LANCHOR33
-	add	x2, x2, :lo12:.LANCHOR33
-	add	x4, x5, x4
+	ubfiz	x19, x19, 8, 8
+	add	x19, x20, x19
 	mov	w1, 4
-	ldrb	w0, [x2, 12]
+	ldrb	w0, [x22, 12]
 	cmp	w0, 2
 	csel	w0, w0, w1, eq
-	strb	w0, [x6, x7]
+	strb	w0, [x21, x23]
 	mov	w0, 239
-	str	w0, [x4, 2056]
+	str	w0, [x19, 2056]
 	mov	w0, 145
-	str	w0, [x4, 2052]
-	mov	w0, 100
-	bl	timer_delay_ns
-	ldrb	w0, [x2, 7]
+	str	w0, [x19, 2052]
+	mov	x0, 1
+	bl	udelay
+	ldrb	w0, [x22, 7]
 	cmp	w0, 9
 	mov	w0, 1
-	bne	.L310
-	str	w0, [x4, 2048]
-.L311:
-	str	w0, [x4, 2048]
-	mov	w0, 150
-	str	wzr, [x4, 2048]
-	str	wzr, [x4, 2048]
-	bl	timer_delay_ns
+	bne	.L285
+	str	w0, [x19, 2048]
+.L286:
+	str	w0, [x19, 2048]
+	mov	x0, 1
+	str	wzr, [x19, 2048]
+	str	wzr, [x19, 2048]
+	bl	udelay
 	bl	nandc_wait_flash_ready_no_delay
+	ldr	x23, [sp, 48]
+	ldp	x21, x22, [sp, 32]
 	mov	w0, 223
-	str	w0, [x4, 2056]
-	b	.L302
-.L310:
-	ldrb	w1, [x6, x7]
-	str	w1, [x4, 2048]
-	b	.L311
-.L323:
-	ret
+	str	w0, [x19, 2056]
+	mov	x0, 1
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 64
+	b	udelay
+.L285:
+	ldrb	w1, [x21, x23]
+	str	w1, [x19, 2048]
+	b	.L286
 	.size	zftl_flash_exit_slc_mode, .-zftl_flash_exit_slc_mode
 	.section	.text.flash_start_page_read,"ax",@progbits
 	.align	2
@@ -1442,235 +1383,242 @@ zftl_flash_exit_slc_mode:
 	.type	flash_start_page_read, %function
 flash_start_page_read:
 	stp	x29, x30, [sp, -64]!
-	mov	w8, 24
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	and	w20, w0, 255
-	adrp	x0, .LANCHOR32
 	stp	x21, x22, [sp, 32]
-	mov	w19, 1
-	mov	w21, w1
-	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	and	w21, w0, 255
+	adrp	x0, .LANCHOR31
+	stp	x19, x20, [sp, 16]
 	str	x23, [sp, 48]
-	sub	w22, w8, w0
-	lsl	w19, w19, w0
-	sub	w19, w19, #1
-	lsr	w0, w1, w22
-	and	w19, w19, w0
-	adrp	x0, .LANCHOR18
-	and	w19, w19, 255
-	mov	x23, x0
-	ldrb	w1, [x0, #:lo12:.LANCHOR18]
-	cmp	w1, w19
-	bhi	.L326
-	adrp	x1, .LANCHOR35
+	mov	w19, 24
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	mov	w20, 1
+	mov	w22, w1
+	sub	w23, w19, w0
+	lsl	w20, w20, w0
+	sub	w20, w20, #1
+	lsr	w0, w1, w23
+	and	w20, w20, w0
+	adrp	x0, .LANCHOR23
+	and	w20, w20, 255
+	mov	x19, x0
+	ldrb	w1, [x0, #:lo12:.LANCHOR23]
+	cmp	w1, w20
+	bhi	.L300
+	adrp	x1, .LANCHOR34
 	adrp	x0, .LC0
-	mov	w2, 1001
-	add	x1, x1, :lo12:.LANCHOR35
+	mov	w2, 1013
+	add	x1, x1, :lo12:.LANCHOR34
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L326:
-	ldrb	w0, [x23, #:lo12:.LANCHOR18]
-	cmp	w0, w19
-	bls	.L325
-	adrp	x0, .LANCHOR30
-	add	x0, x0, :lo12:.LANCHOR30
-	mov	w8, 1
-	lsl	w8, w8, w22
-	sub	w8, w8, #1
-	ldrb	w11, [x0, w19, sxtw]
-	adrp	x0, .LANCHOR13
-	and	w8, w8, w21
-	ubfx	x21, x21, 24, 2
-	ldr	x10, [x0, #:lo12:.LANCHOR13]
-	mov	w0, w11
+.L300:
+	ldrb	w0, [x19, #:lo12:.LANCHOR23]
+	cmp	w0, w20
+	bls	.L299
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
+	mov	w19, 1
+	ubfx	x4, x22, 24, 2
+	lsl	w19, w19, w23
+	sub	w19, w19, #1
+	and	w19, w19, w22
+	ldrb	w22, [x0, w20, sxtw]
+	adrp	x0, .LANCHOR7
+	adrp	x23, .LANCHOR21
+	ldr	x20, [x0, #:lo12:.LANCHOR7]
+	mov	w0, w22
 	bl	nandc_cs
-	adrp	x12, .LANCHOR16
-	cbnz	w21, .L328
-	mov	w0, w8
+	cbnz	w4, .L302
+	mov	w0, w19
 	bl	slc_phy_page_address_calc
-	mov	w8, w0
+	mov	w19, w0
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L329
-	mov	w0, w11
+	cbz	w0, .L303
+	mov	w0, w22
 	bl	zftl_flash_enter_slc_mode
-.L329:
-	ldr	x0, [x12, #:lo12:.LANCHOR16]
+.L303:
+	ldr	x0, [x23, #:lo12:.LANCHOR21]
 	ldrb	w1, [x0, 7]
 	cmp	w1, 1
-	bne	.L331
+	bne	.L305
 	ldrb	w0, [x0, 12]
 	cmp	w0, 2
-	bne	.L331
-	sxtw	x0, w11
+	bne	.L305
+	sxtw	x0, w22
 	mov	w1, 38
 	add	x0, x0, 8
-	add	x0, x10, x0, lsl 8
+	add	x0, x20, x0, lsl 8
 	str	w1, [x0, 8]
-.L331:
-	ubfiz	x0, x11, 8, 8
-	and	w1, w8, 255
-	add	x0, x10, x0
+.L305:
+	ubfiz	x0, x22, 8, 8
+	and	w1, w19, 255
+	add	x0, x20, x0
 	str	wzr, [x0, 2056]
 	str	wzr, [x0, 2052]
 	str	wzr, [x0, 2052]
 	str	w1, [x0, 2052]
-	lsr	w1, w8, 8
+	lsr	w1, w19, 8
 	str	w1, [x0, 2052]
-	lsr	w1, w8, 16
+	lsr	w1, w19, 16
 	str	w1, [x0, 2052]
-	adrp	x1, .LANCHOR31
-	ldrb	w1, [x1, #:lo12:.LANCHOR31]
-	cbz	w1, .L332
-	lsr	w8, w8, 24
-	str	w8, [x0, 2052]
-.L332:
-	str	w20, [x0, 2056]
-.L325:
+	adrp	x1, .LANCHOR30
+	ldrb	w1, [x1, #:lo12:.LANCHOR30]
+	cbz	w1, .L306
+	lsr	w19, w19, 24
+	str	w19, [x0, 2052]
+.L306:
+	str	w21, [x0, 2056]
+.L299:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L328:
-	ldr	x0, [x12, #:lo12:.LANCHOR16]
+.L302:
+	ldr	x0, [x23, #:lo12:.LANCHOR21]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L330
+	bne	.L304
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbnz	w0, .L304
 	adrp	x0, .LANCHOR36
 	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbnz	w0, .L330
-	adrp	x0, .LANCHOR37
-	ldrb	w0, [x0, #:lo12:.LANCHOR37]
-	cbnz	w0, .L330
-	sxtw	x0, w11
+	cbnz	w0, .L304
+	sxtw	x0, w22
 	add	x0, x0, 8
-	add	x0, x10, x0, lsl 8
-	str	w21, [x0, 8]
-	b	.L329
-.L330:
-	mov	w0, w11
+	add	x0, x20, x0, lsl 8
+	str	w4, [x0, 8]
+	b	.L303
+.L304:
+	mov	w0, w22
 	bl	zftl_flash_exit_slc_mode
-	b	.L329
+	b	.L303
 	.size	flash_start_page_read, .-flash_start_page_read
 	.section	.text.nandc_wait_flash_ready,"ax",@progbits
 	.align	2
 	.global	nandc_wait_flash_ready
 	.type	nandc_wait_flash_ready, %function
 nandc_wait_flash_ready:
-	stp	x29, x30, [sp, -32]!
-	mov	w0, 150
+	stp	x29, x30, [sp, -48]!
+	mov	x0, 1
 	add	x29, sp, 0
-	bl	timer_delay_ns
-	mov	w2, 34464
-	adrp	x3, .LANCHOR13
-	movk	w2, 0x1, lsl 16
-.L342:
-	ldr	x0, [x3, #:lo12:.LANCHOR13]
+	stp	x19, x20, [sp, 16]
+	mov	w19, 34464
+	movk	w19, 0x1, lsl 16
+	adrp	x20, .LANCHOR7
+	bl	udelay
+.L316:
+	ldr	x0, [x20, #:lo12:.LANCHOR7]
 	ldr	w0, [x0]
-	str	w0, [x29, 24]
-	ldr	w0, [x29, 24]
-	tbnz	x0, 9, .L343
-	mov	w0, 10
-	bl	timer_delay_ns
-	subs	w2, w2, #1
-	bne	.L342
+	str	w0, [x29, 40]
+	ldr	w0, [x29, 40]
+	tbnz	x0, 9, .L317
+	mov	x0, 1
+	bl	udelay
+	subs	w19, w19, #1
+	bne	.L316
 	mov	w0, -1
-.L340:
-	ldp	x29, x30, [sp], 32
+.L314:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
 	ret
-.L343:
+.L317:
 	mov	w0, 0
-	b	.L340
+	b	.L314
 	.size	nandc_wait_flash_ready, .-nandc_wait_flash_ready
 	.section	.text.sandisk_set_rr_para,"ax",@progbits
 	.align	2
 	.global	sandisk_set_rr_para
 	.type	sandisk_set_rr_para, %function
 sandisk_set_rr_para:
-	stp	x29, x30, [sp, -16]!
-	mov	x3, x0
-	and	w2, w1, 255
-	mov	w0, 239
+	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
-	str	w0, [x3, 8]
+	stp	x19, x20, [sp, 16]
+	mov	x20, x0
+	mov	w0, 239
+	and	w19, w1, 255
+	str	w0, [x20, 8]
 	mov	w0, 17
-	str	w0, [x3, 4]
-	mov	w0, 200
-	bl	timer_delay_ns
-	add	w1, w2, 1
-	adrp	x0, .LANCHOR26
-	adrp	x2, .LANCHOR22
-	add	x2, x2, :lo12:.LANCHOR22
-	ldrb	w4, [x0, #:lo12:.LANCHOR26]
-	adrp	x0, .LANCHOR24
-	ldrb	w5, [x0, #:lo12:.LANCHOR24]
+	str	w0, [x20, 4]
+	mov	x0, 1
+	bl	udelay
+	adrp	x0, .LANCHOR18
+	add	w1, w19, 1
+	adrp	x2, .LANCHOR14
+	add	x2, x2, :lo12:.LANCHOR14
+	ldrb	w3, [x0, #:lo12:.LANCHOR18]
+	adrp	x0, .LANCHOR16
+	ldrb	w4, [x0, #:lo12:.LANCHOR16]
 	mov	w0, 5
 	umull	x1, w1, w0
-	adrp	x0, .LANCHOR23
-	add	x0, x0, :lo12:.LANCHOR23
+	adrp	x0, .LANCHOR15
+	add	x0, x0, :lo12:.LANCHOR15
 	add	x2, x2, x1
 	add	x1, x0, x1
 	mov	x0, 0
-.L347:
-	cmp	w4, w0
-	bhi	.L350
-	ldp	x29, x30, [sp], 16
+.L321:
+	cmp	w3, w0
+	bhi	.L324
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
 	b	nandc_wait_flash_ready
-.L350:
-	cmp	w5, 67
-	bne	.L348
-	ldrsb	w6, [x1, x0]
-.L352:
+.L324:
+	cmp	w4, 67
+	bne	.L322
+	ldrsb	w5, [x1, x0]
+.L326:
 	add	x0, x0, 1
-	str	w6, [x3]
-	b	.L347
-.L348:
-	ldrsb	w6, [x2, x0]
-	b	.L352
+	str	w5, [x20]
+	b	.L321
+.L322:
+	ldrsb	w5, [x2, x0]
+	b	.L326
 	.size	sandisk_set_rr_para, .-sandisk_set_rr_para
 	.section	.text.toshiba_3d_set_tlc_rr_para,"ax",@progbits
 	.align	2
 	.global	toshiba_3d_set_tlc_rr_para
 	.type	toshiba_3d_set_tlc_rr_para, %function
 toshiba_3d_set_tlc_rr_para:
-	mov	x4, x0
-	stp	x29, x30, [sp, -16]!
+	stp	x29, x30, [sp, -48]!
 	and	x2, x1, 255
 	mov	x1, 7
 	add	x29, sp, 0
-	mov	w6, 213
-	str	w6, [x4, 8]
-	str	wzr, [x4, 4]
-	nop // between mem op and mult-accumulate
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	str	x21, [sp, 32]
+	mov	w21, 213
 	madd	x1, x2, x1, x1
 	mov	w0, -119
-	str	w0, [x4, 4]
-	adrp	x0, .LANCHOR38
-	add	x0, x0, :lo12:.LANCHOR38
-	add	x5, x0, x1
+	str	w21, [x19, 8]
+	str	wzr, [x19, 4]
+	str	w0, [x19, 4]
+	adrp	x0, .LANCHOR37
+	add	x0, x0, :lo12:.LANCHOR37
+	add	x20, x0, x1
 	ldrsb	w0, [x0, x1]
-	str	w0, [x4]
-	ldrsb	w0, [x5, 1]
-	str	w0, [x4]
-	ldrsb	w0, [x5, 2]
-	str	w0, [x4]
-	ldrsb	w0, [x5, 3]
-	str	w0, [x4]
+	str	w0, [x19]
+	ldrsb	w0, [x20, 1]
+	str	w0, [x19]
+	ldrsb	w0, [x20, 2]
+	str	w0, [x19]
+	ldrsb	w0, [x20, 3]
+	str	w0, [x19]
 	bl	nandc_wait_flash_ready
-	ldp	x29, x30, [sp], 16
-	str	w6, [x4, 8]
-	str	wzr, [x4, 4]
+	str	w21, [x19, 8]
+	str	wzr, [x19, 4]
 	mov	w0, -118
-	str	w0, [x4, 4]
-	ldrsb	w0, [x5, 4]
-	str	w0, [x4]
-	ldrsb	w0, [x5, 5]
-	str	w0, [x4]
-	ldrsb	w0, [x5, 6]
-	str	w0, [x4]
-	str	wzr, [x4]
+	str	w0, [x19, 4]
+	ldrsb	w0, [x20, 4]
+	ldr	x21, [sp, 32]
+	str	w0, [x19]
+	ldrsb	w0, [x20, 5]
+	str	w0, [x19]
+	ldrsb	w0, [x20, 6]
+	str	w0, [x19]
+	str	wzr, [x19]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
 	b	nandc_wait_flash_ready
 	.size	toshiba_3d_set_tlc_rr_para, .-toshiba_3d_set_tlc_rr_para
 	.section	.text.toshiba_3d_set_slc_rr_para,"ax",@progbits
@@ -1683,8 +1631,8 @@ toshiba_3d_set_slc_rr_para:
 	str	wzr, [x0, 4]
 	mov	w2, -117
 	str	w2, [x0, 4]
-	adrp	x2, .LANCHOR39
-	add	x2, x2, :lo12:.LANCHOR39
+	adrp	x2, .LANCHOR38
+	add	x2, x2, :lo12:.LANCHOR38
 	add	x1, x2, x1, uxtb
 	ldrsb	w1, [x1, 1]
 	str	w1, [x0]
@@ -1698,101 +1646,109 @@ toshiba_3d_set_slc_rr_para:
 	.global	toshiba_tlc_set_rr_para
 	.type	toshiba_tlc_set_rr_para, %function
 toshiba_tlc_set_rr_para:
-	mov	w6, 239
+	stp	x29, x30, [sp, -48]!
 	uxtw	x1, w1
-	cbz	w2, .L357
-	stp	x29, x30, [sp, -16]!
-	mov	x4, x0
+	add	x29, sp, 0
+	str	x21, [sp, 32]
+	mov	w21, 239
+	stp	x19, x20, [sp, 16]
+	cbz	w2, .L331
+	mov	x19, x0
 	mov	x2, 7
 	mov	w0, 18
-	add	x29, sp, 0
-	str	w6, [x4, 8]
 	mul	x1, x1, x2
-	str	w0, [x4, 4]
-	adrp	x0, .LANCHOR40
-	add	x0, x0, :lo12:.LANCHOR40
-	add	x5, x0, x1
+	str	w21, [x19, 8]
+	str	w0, [x19, 4]
+	adrp	x0, .LANCHOR39
+	add	x0, x0, :lo12:.LANCHOR39
+	add	x20, x0, x1
 	ldrb	w0, [x0, x1]
-	str	w0, [x4]
-	ldrb	w0, [x5, 1]
-	str	w0, [x4]
-	ldrb	w0, [x5, 2]
-	str	w0, [x4]
-	ldrb	w0, [x5, 3]
-	str	w0, [x4]
+	str	w0, [x19]
+	ldrb	w0, [x20, 1]
+	str	w0, [x19]
+	ldrb	w0, [x20, 2]
+	str	w0, [x19]
+	ldrb	w0, [x20, 3]
+	str	w0, [x19]
 	bl	nandc_wait_flash_ready
-	str	w6, [x4, 8]
+	str	w21, [x19, 8]
 	mov	w0, 19
-	str	w0, [x4, 4]
-	ldrb	w0, [x5, 4]
-	str	w0, [x4]
-	ldrb	w0, [x5, 5]
-	str	w0, [x4]
-	ldrb	w0, [x5, 6]
-	str	w0, [x4]
-	str	wzr, [x4]
-	ldp	x29, x30, [sp], 16
-.L360:
+	str	w0, [x19, 4]
+	ldrb	w0, [x20, 4]
+	str	w0, [x19]
+	ldrb	w0, [x20, 5]
+	str	w0, [x19]
+	ldrb	w0, [x20, 6]
+	str	w0, [x19]
+	str	wzr, [x19]
+.L332:
+	ldp	x19, x20, [sp, 16]
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 48
 	b	nandc_wait_flash_ready
-.L357:
-	str	w6, [x0, 8]
+.L331:
+	str	w21, [x0, 8]
 	mov	w2, 20
 	str	w2, [x0, 4]
-	adrp	x2, .LANCHOR41
-	add	x2, x2, :lo12:.LANCHOR41
+	adrp	x2, .LANCHOR40
+	add	x2, x2, :lo12:.LANCHOR40
 	ldrb	w1, [x2, x1]
 	str	w1, [x0]
 	str	wzr, [x0]
 	str	wzr, [x0]
 	str	wzr, [x0]
-	b	.L360
+	b	.L332
 	.size	toshiba_tlc_set_rr_para, .-toshiba_tlc_set_rr_para
 	.section	.text.ymtc_3d_set_tlc_rr_para,"ax",@progbits
 	.align	2
 	.global	ymtc_3d_set_tlc_rr_para
 	.type	ymtc_3d_set_tlc_rr_para, %function
 ymtc_3d_set_tlc_rr_para:
-	mov	x4, x0
-	stp	x29, x30, [sp, -16]!
+	stp	x29, x30, [sp, -48]!
 	and	x1, x1, 255
 	mov	x2, 7
 	add	x29, sp, 0
-	mov	w6, 239
-	mov	w0, 160
-	str	w6, [x4, 8]
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	str	x21, [sp, 32]
 	mul	x1, x1, x2
-	str	w0, [x4, 4]
-	adrp	x0, .LANCHOR42
-	add	x0, x0, :lo12:.LANCHOR42
-	add	x5, x0, x1
+	mov	w21, 239
+	mov	w0, 160
+	str	w21, [x19, 8]
+	str	w0, [x19, 4]
+	adrp	x0, .LANCHOR41
+	add	x0, x0, :lo12:.LANCHOR41
+	add	x20, x0, x1
 	ldrsb	w0, [x0, x1]
-	str	w0, [x4]
-	ldrsb	w0, [x5, 4]
-	str	w0, [x4]
-	str	wzr, [x4]
-	str	wzr, [x4]
+	str	w0, [x19]
+	ldrsb	w0, [x20, 4]
+	str	w0, [x19]
+	str	wzr, [x19]
+	str	wzr, [x19]
 	bl	nandc_wait_flash_ready
-	str	w6, [x4, 8]
+	str	w21, [x19, 8]
 	mov	w0, 161
-	str	w0, [x4, 4]
-	ldrsb	w0, [x5, 1]
-	str	w0, [x4]
-	ldrsb	w0, [x5, 3]
-	str	w0, [x4]
-	ldrsb	w0, [x5, 5]
-	str	w0, [x4]
-	str	wzr, [x4]
+	str	w0, [x19, 4]
+	ldrsb	w0, [x20, 1]
+	str	w0, [x19]
+	ldrsb	w0, [x20, 3]
+	str	w0, [x19]
+	ldrsb	w0, [x20, 5]
+	str	w0, [x19]
+	str	wzr, [x19]
 	bl	nandc_wait_flash_ready
-	ldp	x29, x30, [sp], 16
+	str	w21, [x19, 8]
 	mov	w0, 162
-	str	w6, [x4, 8]
-	str	w0, [x4, 4]
-	ldrsb	w0, [x5, 2]
-	str	w0, [x4]
-	ldrsb	w0, [x5, 6]
-	str	w0, [x4]
-	str	wzr, [x4]
-	str	wzr, [x4]
+	str	w0, [x19, 4]
+	ldrsb	w0, [x20, 2]
+	ldr	x21, [sp, 32]
+	str	w0, [x19]
+	ldrsb	w0, [x20, 6]
+	str	w0, [x19]
+	str	wzr, [x19]
+	str	wzr, [x19]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
 	b	nandc_wait_flash_ready
 	.size	ymtc_3d_set_tlc_rr_para, .-ymtc_3d_set_tlc_rr_para
 	.section	.text.ymtc_3d_set_slc_rr_para,"ax",@progbits
@@ -1805,8 +1761,8 @@ ymtc_3d_set_slc_rr_para:
 	mov	w2, 163
 	and	x1, x1, 255
 	str	w2, [x0, 4]
-	adrp	x2, .LANCHOR43
-	add	x2, x2, :lo12:.LANCHOR43
+	adrp	x2, .LANCHOR42
+	add	x2, x2, :lo12:.LANCHOR42
 	ldrsb	w1, [x2, x1]
 	str	w1, [x0]
 	str	wzr, [x0]
@@ -1823,125 +1779,125 @@ flash_erase_duplane_block:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	and	w22, w0, 255
-	adrp	x0, .LANCHOR18
+	adrp	x0, .LANCHOR23
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	and	w24, w1, 255
 	str	x25, [sp, 64]
 	mov	w21, w2
-	ldrb	w1, [x0, #:lo12:.LANCHOR18]
+	ldrb	w1, [x0, #:lo12:.LANCHOR23]
 	mov	w20, w3
 	mov	x19, x0
 	cmp	w1, w22
-	bhi	.L367
-	adrp	x1, .LANCHOR44
+	bhi	.L338
+	adrp	x1, .LANCHOR43
 	adrp	x0, .LC0
-	mov	w2, 688
-	add	x1, x1, :lo12:.LANCHOR44
+	mov	w2, 695
+	add	x1, x1, :lo12:.LANCHOR43
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L367:
-	ldrb	w0, [x19, #:lo12:.LANCHOR18]
+.L338:
+	ldrb	w0, [x19, #:lo12:.LANCHOR23]
 	cmp	w0, w22
-	bls	.L376
-	adrp	x0, .LANCHOR30
-	add	x0, x0, :lo12:.LANCHOR30
+	bls	.L347
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w22, [x0, w22, sxtw]
-	adrp	x0, .LANCHOR13
-	ldr	x25, [x0, #:lo12:.LANCHOR13]
-	adrp	x0, .LANCHOR14
+	adrp	x0, .LANCHOR7
+	ldr	x25, [x0, #:lo12:.LANCHOR7]
+	adrp	x0, .LANCHOR19
 	and	x19, x22, 255
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
 	add	x23, x19, 8
 	add	x23, x25, x23, lsl 8
-	tbz	x0, 4, .L369
+	tbz	x0, 4, .L340
 	adrp	x0, .LC31
 	mov	w3, w20
 	mov	w2, w21
 	mov	w1, w22
 	add	x0, x0, :lo12:.LC31
 	bl	printf
-.L369:
+.L340:
 	bl	nandc_wait_flash_ready
 	mov	w0, w22
 	bl	nandc_cs
 	mov	w0, w22
-	cbnz	w24, .L370
+	cbnz	w24, .L341
 	bl	zftl_flash_enter_slc_mode
-.L371:
-	add	x25, x25, x19, lsl 8
+.L342:
+	add	x19, x25, x19, lsl 8
 	mov	w0, 96
-	str	w0, [x25, 2056]
+	str	w0, [x19, 2056]
 	and	w0, w21, 255
-	str	w0, [x25, 2052]
+	str	w0, [x19, 2052]
 	lsr	w0, w21, 8
-	str	w0, [x25, 2052]
+	str	w0, [x19, 2052]
 	lsr	w0, w21, 16
-	str	w0, [x25, 2052]
-	adrp	x0, .LANCHOR31
-	mov	x6, x0
-	ldrb	w1, [x0, #:lo12:.LANCHOR31]
-	cbz	w1, .L372
+	str	w0, [x19, 2052]
+	adrp	x0, .LANCHOR30
+	mov	x24, x0
+	ldrb	w1, [x0, #:lo12:.LANCHOR30]
+	cbz	w1, .L343
 	lsr	w0, w21, 24
-	str	w0, [x25, 2052]
-.L372:
-	adrp	x0, .LANCHOR45
-	ldrb	w0, [x0, #:lo12:.LANCHOR45]
-	cbnz	w0, .L377
+	str	w0, [x19, 2052]
+.L343:
+	adrp	x0, .LANCHOR44
+	ldrb	w0, [x0, #:lo12:.LANCHOR44]
+	cbnz	w0, .L348
 	mov	w0, 208
-	str	w0, [x25, 2056]
-	mov	w19, 5
+	str	w0, [x19, 2056]
+	mov	w22, 5
 	bl	nandc_wait_flash_ready
 	mov	x0, x23
 	bl	flash_read_status
-	and	w5, w0, w19
-.L373:
+	and	w22, w0, w22
+.L344:
 	mov	w0, 96
-	str	w0, [x25, 2056]
+	str	w0, [x19, 2056]
 	and	w0, w20, 255
-	str	w0, [x25, 2052]
+	str	w0, [x19, 2052]
 	lsr	w0, w20, 8
-	str	w0, [x25, 2052]
+	str	w0, [x19, 2052]
 	lsr	w0, w20, 16
-	str	w0, [x25, 2052]
-	ldrb	w0, [x6, #:lo12:.LANCHOR31]
-	cbz	w0, .L374
+	str	w0, [x19, 2052]
+	ldrb	w0, [x24, #:lo12:.LANCHOR30]
+	cbz	w0, .L345
 	lsr	w20, w20, 24
-	str	w20, [x25, 2052]
-.L374:
+	str	w20, [x19, 2052]
+.L345:
 	mov	w0, 208
-	str	w0, [x25, 2056]
+	str	w0, [x19, 2056]
 	mov	w19, 5
 	bl	nandc_wait_flash_ready
 	mov	x0, x23
 	bl	flash_read_status
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.33
+	bl	nandc_de_cs.constprop.32
 	and	w19, w2, w19
-	orr	w19, w19, w5
-	cbz	w19, .L375
+	orr	w19, w19, w22
+	cbz	w19, .L346
 	adrp	x0, .LC32
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC32
 	bl	printf
-.L375:
+.L346:
 	mov	w0, w19
-.L366:
+.L337:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L370:
+.L341:
 	bl	zftl_flash_exit_slc_mode
-	b	.L371
-.L377:
-	mov	w5, 0
-	b	.L373
-.L376:
+	b	.L342
+.L348:
+	mov	w22, 0
+	b	.L344
+.L347:
 	mov	w0, -1
-	b	.L366
+	b	.L337
 	.size	flash_erase_duplane_block, .-flash_erase_duplane_block
 	.section	.text.flash_erase_block_en,"ax",@progbits
 	.align	2
@@ -1952,59 +1908,59 @@ flash_erase_block_en:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	and	w22, w0, 255
-	adrp	x0, .LANCHOR32
+	adrp	x0, .LANCHOR31
 	stp	x19, x20, [sp, 16]
 	mov	w19, 24
 	stp	x23, x24, [sp, 48]
-	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
 	and	w24, w1, 255
 	stp	x25, x26, [sp, 64]
 	mov	w23, w2
 	sub	w0, w19, w0
 	mov	w19, 1
 	lsl	w19, w19, w0
-	adrp	x0, .LANCHOR18
+	adrp	x0, .LANCHOR23
 	sub	w19, w19, #1
 	mov	x20, x0
-	ldrb	w1, [x0, #:lo12:.LANCHOR18]
+	ldrb	w1, [x0, #:lo12:.LANCHOR23]
 	and	w19, w19, w2
 	cmp	w1, w22
-	bhi	.L392
-	adrp	x1, .LANCHOR46
+	bhi	.L363
+	adrp	x1, .LANCHOR45
 	adrp	x0, .LC0
-	mov	w2, 750
-	add	x1, x1, :lo12:.LANCHOR46
+	mov	w2, 757
+	add	x1, x1, :lo12:.LANCHOR45
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L392:
-	ldrb	w0, [x20, #:lo12:.LANCHOR18]
+.L363:
+	ldrb	w0, [x20, #:lo12:.LANCHOR23]
 	cmp	w0, w22
-	bls	.L399
-	adrp	x0, .LANCHOR30
-	add	x0, x0, :lo12:.LANCHOR30
+	bls	.L370
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w21, [x0, w22, sxtw]
-	adrp	x0, .LANCHOR13
-	ldr	x26, [x0, #:lo12:.LANCHOR13]
-	adrp	x0, .LANCHOR14
+	adrp	x0, .LANCHOR7
+	ldr	x26, [x0, #:lo12:.LANCHOR7]
+	adrp	x0, .LANCHOR19
 	and	x20, x21, 255
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
 	add	x25, x20, 8
 	add	x25, x26, x25, lsl 8
-	tbz	x0, 4, .L394
+	tbz	x0, 4, .L365
 	adrp	x0, .LC33
 	mov	w3, w24
 	mov	w2, w23
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC33
 	bl	printf
-.L394:
+.L365:
 	bl	nandc_wait_flash_ready
 	mov	w0, w21
 	bl	nandc_cs
 	mov	w0, w21
-	cbnz	w24, .L395
+	cbnz	w24, .L366
 	bl	zftl_flash_enter_slc_mode
-.L396:
+.L367:
 	add	x0, x26, x20, lsl 8
 	mov	w1, 96
 	str	w1, [x0, 2056]
@@ -2014,22 +1970,22 @@ flash_erase_block_en:
 	str	w1, [x0, 2052]
 	lsr	w1, w19, 16
 	str	w1, [x0, 2052]
-	adrp	x1, .LANCHOR31
-	ldrb	w1, [x1, #:lo12:.LANCHOR31]
-	cbz	w1, .L397
+	adrp	x1, .LANCHOR30
+	ldrb	w1, [x1, #:lo12:.LANCHOR30]
+	cbz	w1, .L368
 	lsr	w19, w19, 24
 	str	w19, [x0, 2052]
-.L397:
+.L368:
 	mov	w1, 208
 	str	w1, [x0, 2056]
 	bl	nandc_wait_flash_ready
 	mov	x0, x25
 	bl	flash_read_status
 	mov	w3, w0
-	bl	nandc_de_cs.constprop.33
+	bl	nandc_de_cs.constprop.32
 	mov	w0, 5
 	ands	w3, w3, w0
-	beq	.L398
+	beq	.L369
 	adrp	x0, .LANCHOR2
 	mov	w1, w22
 	ldrh	w2, [x0, #:lo12:.LANCHOR2]
@@ -2038,21 +1994,21 @@ flash_erase_block_en:
 	udiv	w2, w23, w2
 	bl	printf
 	mov	w3, -1
-.L398:
+.L369:
 	mov	w0, w3
-.L391:
+.L362:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L395:
+.L366:
 	bl	zftl_flash_exit_slc_mode
-	b	.L396
-.L399:
+	b	.L367
+.L370:
 	mov	w0, -1
-	b	.L391
+	b	.L362
 	.size	flash_erase_block_en, .-flash_erase_block_en
 	.section	.text.flash_erase_block,"ax",@progbits
 	.align	2
@@ -2069,8 +2025,8 @@ flash_erase_block:
 	.type	flash_erase_all, %function
 flash_erase_all:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR33
-	add	x0, x0, :lo12:.LANCHOR33
+	adrp	x0, .LANCHOR32
+	add	x0, x0, :lo12:.LANCHOR32
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w19, 0
@@ -2079,17 +2035,17 @@ flash_erase_all:
 	stp	x21, x22, [sp, 32]
 	add	x23, x23, :lo12:.LANCHOR2
 	ldrh	w20, [x0, 14]
-	adrp	x22, .LANCHOR18
+	adrp	x22, .LANCHOR23
 	str	x25, [sp, 64]
-	add	x22, x22, :lo12:.LANCHOR18
-	adrp	x24, .LANCHOR30
+	add	x22, x22, :lo12:.LANCHOR23
+	adrp	x24, .LANCHOR29
 	ldrb	w1, [x0, 13]
 	mul	w20, w20, w1
 	and	w20, w20, 65535
-.L412:
+.L383:
 	ldrb	w0, [x22]
 	cmp	w0, w19
-	bhi	.L415
+	bhi	.L386
 	ldp	x19, x20, [sp, 16]
 	mov	w1, 0
 	ldp	x21, x22, [sp, 32]
@@ -2099,188 +2055,194 @@ flash_erase_all:
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	b	printf
-.L415:
-	add	x0, x24, :lo12:.LANCHOR30
+.L386:
+	add	x0, x24, :lo12:.LANCHOR29
 	mov	w21, 0
 	ldrb	w25, [x0, w19, sxtw]
-.L413:
+.L384:
 	cmp	w20, w21, uxth
-	bhi	.L414
+	bhi	.L385
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L412
-.L414:
+	b	.L383
+.L385:
 	ldrh	w1, [x23]
 	mov	w0, w25
 	mul	w1, w1, w21
 	add	w21, w21, 1
 	bl	flash_erase_block
-	b	.L413
+	b	.L384
 	.size	flash_erase_all, .-flash_erase_all
 	.section	.text.flash_start_plane_read,"ax",@progbits
 	.align	2
 	.global	flash_start_plane_read
 	.type	flash_start_plane_read, %function
 flash_start_plane_read:
-	stp	x29, x30, [sp, -48]!
-	adrp	x2, .LANCHOR32
+	stp	x29, x30, [sp, -96]!
+	adrp	x2, .LANCHOR31
 	mov	w3, 24
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	ldrb	w20, [x2, #:lo12:.LANCHOR32]
+	ldrb	w19, [x2, #:lo12:.LANCHOR31]
 	mov	w2, 1
 	stp	x21, x22, [sp, 32]
-	ubfx	x21, x0, 24, 2
-	sub	w3, w3, w20
-	lsl	w20, w2, w20
-	sub	w20, w20, #1
-	lsl	w19, w2, w3
+	ubfx	x22, x0, 24, 2
+	sub	w3, w3, w19
+	stp	x23, x24, [sp, 48]
+	lsl	w19, w2, w19
 	sub	w19, w19, #1
-	and	w22, w19, w0
+	lsl	w20, w2, w3
+	sub	w20, w20, #1
+	and	w23, w20, w0
 	lsr	w3, w0, w3
-	adrp	x0, .LANCHOR18
-	and	w20, w20, w3
-	and	w20, w20, 255
-	and	w19, w19, w1
-	ldrb	w0, [x0, #:lo12:.LANCHOR18]
-	cmp	w0, w20
-	bhi	.L418
-	adrp	x1, .LANCHOR47
+	adrp	x0, .LANCHOR23
+	and	w19, w19, w3
+	stp	x25, x26, [sp, 64]
+	and	w19, w19, 255
+	ldrb	w0, [x0, #:lo12:.LANCHOR23]
+	and	w20, w20, w1
+	stp	x27, x28, [sp, 80]
+	cmp	w0, w19
+	bhi	.L389
+	adrp	x1, .LANCHOR46
 	adrp	x0, .LC0
-	mov	w2, 1128
-	add	x1, x1, :lo12:.LANCHOR47
+	mov	w2, 1148
+	add	x1, x1, :lo12:.LANCHOR46
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L418:
-	adrp	x0, .LANCHOR30
-	add	x0, x0, :lo12:.LANCHOR30
-	ldrb	w8, [x0, w20, sxtw]
-	adrp	x0, .LANCHOR13
-	ldr	x10, [x0, #:lo12:.LANCHOR13]
-	mov	w0, w8
+.L389:
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
+	adrp	x25, .LANCHOR21
+	ldrb	w21, [x0, w19, sxtw]
+	adrp	x0, .LANCHOR7
+	ldr	x24, [x0, #:lo12:.LANCHOR7]
+	mov	w0, w21
 	bl	nandc_cs
-	adrp	x11, .LANCHOR16
-	cbnz	w21, .L419
-	mov	w0, w22
+	cbnz	w22, .L390
+	mov	w0, w23
 	bl	slc_phy_page_address_calc
-	mov	w22, w0
-	mov	w0, w19
+	mov	w23, w0
+	mov	w0, w20
 	bl	slc_phy_page_address_calc
-	mov	w19, w0
+	mov	w20, w0
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L420
-	mov	w0, w8
+	cbz	w0, .L391
+	mov	w0, w21
 	bl	zftl_flash_enter_slc_mode
-.L420:
-	adrp	x0, .LANCHOR20
-	add	x1, x0, :lo12:.LANCHOR20
-	and	x4, x8, 255
-	and	w5, w22, 255
-	lsr	w3, w22, 8
-	and	w12, w19, 255
+.L391:
+	adrp	x0, .LANCHOR25
+	add	x1, x0, :lo12:.LANCHOR25
+	and	x19, x21, 255
+	and	w4, w23, 255
+	lsr	w3, w23, 8
+	and	w28, w20, 255
 	ldrb	w2, [x1, 16]
-	lsr	w7, w19, 8
-	lsr	w6, w19, 16
+	lsr	w27, w20, 8
+	lsr	w26, w20, 16
 	cmp	w2, 1
-	lsr	w2, w22, 16
-	bne	.L422
-	add	x4, x10, x4, lsl 8
+	lsr	w2, w23, 16
+	bne	.L393
+	add	x19, x24, x19, lsl 8
 	ldrb	w1, [x1, 8]
-	str	w1, [x4, 2056]
-	adrp	x1, .LANCHOR31
-	str	wzr, [x4, 2052]
-	str	wzr, [x4, 2052]
-	str	w5, [x4, 2052]
-	mov	x5, x1
-	str	w3, [x4, 2052]
-	str	w2, [x4, 2052]
-	ldrb	w2, [x1, #:lo12:.LANCHOR31]
-	cbz	w2, .L423
-	lsr	w22, w22, 24
-	str	w22, [x4, 2052]
-.L423:
-	add	x0, x0, :lo12:.LANCHOR20
+	str	w1, [x19, 2056]
+	adrp	x1, .LANCHOR30
+	str	wzr, [x19, 2052]
+	mov	x21, x1
+	str	wzr, [x19, 2052]
+	str	w4, [x19, 2052]
+	str	w3, [x19, 2052]
+	str	w2, [x19, 2052]
+	ldrb	w2, [x1, #:lo12:.LANCHOR30]
+	cbz	w2, .L394
+	lsr	w23, w23, 24
+	str	w23, [x19, 2052]
+.L394:
+	add	x0, x0, :lo12:.LANCHOR25
 	ldrb	w0, [x0, 9]
-	str	w0, [x4, 2056]
+	str	w0, [x19, 2056]
 	bl	nandc_wait_flash_ready
-	ldr	x0, [x11, #:lo12:.LANCHOR16]
+	ldr	x0, [x25, #:lo12:.LANCHOR21]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L424
-	cbz	w21, .L424
-	str	w21, [x4, 2056]
-.L424:
-	str	wzr, [x4, 2056]
-	str	wzr, [x4, 2052]
-	str	wzr, [x4, 2052]
-	str	w12, [x4, 2052]
-	ldrb	w0, [x5, #:lo12:.LANCHOR31]
-	str	w7, [x4, 2052]
-	str	w6, [x4, 2052]
-	cbz	w0, .L445
-	lsr	w19, w19, 24
-	str	w19, [x4, 2052]
-.L445:
-	ldp	x19, x20, [sp, 16]
-	mov	w0, 48
+	bne	.L395
+	cbz	w22, .L395
+	str	w22, [x19, 2056]
+.L395:
+	str	wzr, [x19, 2056]
+	str	wzr, [x19, 2052]
+	str	wzr, [x19, 2052]
+	str	w28, [x19, 2052]
+	ldrb	w0, [x21, #:lo12:.LANCHOR30]
+	str	w27, [x19, 2052]
+	str	w26, [x19, 2052]
+	cbz	w0, .L416
+	lsr	w20, w20, 24
+	str	w20, [x19, 2052]
+.L416:
 	ldp	x21, x22, [sp, 32]
-	str	w0, [x4, 2056]
-	ldp	x29, x30, [sp], 48
-	b	nandc_de_cs.constprop.33
-.L419:
-	ldr	x0, [x11, #:lo12:.LANCHOR16]
+	mov	w0, 48
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	str	w0, [x19, 2056]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 96
+	ret
+.L390:
+	ldr	x0, [x25, #:lo12:.LANCHOR21]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L421
+	bne	.L392
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbnz	w0, .L392
 	adrp	x0, .LANCHOR36
 	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbnz	w0, .L421
-	adrp	x0, .LANCHOR37
-	ldrb	w0, [x0, #:lo12:.LANCHOR37]
-	cbnz	w0, .L421
-	sxtw	x0, w8
+	cbnz	w0, .L392
+	sxtw	x0, w21
 	add	x0, x0, 8
-	add	x0, x10, x0, lsl 8
-	str	w21, [x0, 8]
-	b	.L420
-.L421:
-	mov	w0, w8
+	add	x0, x24, x0, lsl 8
+	str	w22, [x0, 8]
+	b	.L391
+.L392:
+	mov	w0, w21
 	bl	zftl_flash_exit_slc_mode
-	b	.L420
-.L422:
-	ldr	x1, [x11, #:lo12:.LANCHOR16]
-	ldrb	w11, [x1, 7]
-	cmp	w11, 1
-	bne	.L427
-	ldrb	w11, [x1, 12]
-	cmp	w11, 2
-	bne	.L427
-	add	x8, x8, 8
-	mov	w11, 38
-	add	x8, x10, x8, lsl 8
-	str	w11, [x8, 8]
-.L427:
-	add	x8, x0, :lo12:.LANCHOR20
-	add	x4, x10, x4, lsl 8
-	ldrb	w8, [x8, 8]
-	str	w8, [x4, 2056]
-	str	w5, [x4, 2052]
-	str	w3, [x4, 2052]
-	str	w2, [x4, 2052]
+	b	.L391
+.L393:
+	ldr	x1, [x25, #:lo12:.LANCHOR21]
+	ldrb	w5, [x1, 7]
+	cmp	w5, 1
+	bne	.L398
+	ldrb	w5, [x1, 12]
+	cmp	w5, 2
+	bne	.L398
+	add	x21, x21, 8
+	mov	w5, 38
+	add	x21, x24, x21, lsl 8
+	str	w5, [x21, 8]
+.L398:
+	add	x5, x0, :lo12:.LANCHOR25
+	add	x19, x24, x19, lsl 8
+	ldrb	w5, [x5, 8]
+	str	w5, [x19, 2056]
+	str	w4, [x19, 2052]
+	str	w3, [x19, 2052]
+	str	w2, [x19, 2052]
 	ldrb	w1, [x1, 12]
 	cmp	w1, 3
-	bne	.L428
-	cbz	w21, .L428
-	str	w21, [x4, 2056]
-.L428:
-	add	x0, x0, :lo12:.LANCHOR20
+	bne	.L399
+	cbz	w22, .L399
+	str	w22, [x19, 2056]
+.L399:
+	add	x0, x0, :lo12:.LANCHOR25
 	ldrb	w0, [x0, 9]
-	str	w0, [x4, 2056]
-	str	w12, [x4, 2052]
-	str	w7, [x4, 2052]
-	str	w6, [x4, 2052]
-	b	.L445
+	str	w0, [x19, 2056]
+	str	w28, [x19, 2052]
+	str	w27, [x19, 2052]
+	str	w26, [x19, 2052]
+	b	.L416
 	.size	flash_start_plane_read, .-flash_start_plane_read
 	.section	.text.flash_set_interface_mode,"ax",@progbits
 	.align	2
@@ -2290,50 +2252,50 @@ flash_set_interface_mode:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR48
+	adrp	x22, .LANCHOR47
 	stp	x19, x20, [sp, 16]
-	adrp	x21, .LANCHOR14
+	adrp	x21, .LANCHOR19
 	stp	x23, x24, [sp, 48]
-	adrp	x20, .LANCHOR49
+	adrp	x20, .LANCHOR48
 	mov	w23, w0
-	add	x22, x22, :lo12:.LANCHOR48
-	add	x20, x20, :lo12:.LANCHOR49
-	add	x21, x21, :lo12:.LANCHOR14
+	add	x22, x22, :lo12:.LANCHOR47
+	add	x20, x20, :lo12:.LANCHOR48
+	add	x21, x21, :lo12:.LANCHOR19
 	str	x25, [sp, 64]
 	mov	x25, 0
-.L459:
-	adrp	x0, .LANCHOR13
-	ldr	x19, [x0, #:lo12:.LANCHOR13]
+.L430:
+	adrp	x0, .LANCHOR7
+	ldr	x19, [x0, #:lo12:.LANCHOR7]
 	lsl	x0, x25, 3
 	ldrb	w24, [x0, x22]
 	cmp	w24, 69
-	beq	.L447
+	beq	.L418
 	add	w0, w24, 119
 	cmp	w24, 44
 	and	w1, w0, 255
 	cset	w2, eq
 	cmp	w1, 18
-	bhi	.L460
+	bhi	.L431
 	mov	x0, 32769
 	movk	x0, 0x4, lsl 16
 	lsr	x0, x0, x1
 	mvn	x0, x0
-.L448:
+.L419:
 	and	w0, w0, 1
 	eor	w0, w0, 1
 	orr	w0, w2, w0
-	cbz	w0, .L449
-.L447:
+	cbz	w0, .L420
+.L418:
 	ldrb	w1, [x20]
 	cmp	w23, 1
-	bne	.L450
-	tbz	x1, 0, .L449
+	bne	.L421
+	tbz	x1, 0, .L420
 	ldr	w0, [x21]
-	tbz	x0, 12, .L451
+	tbz	x0, 12, .L422
 	adrp	x0, .LC36
 	add	x0, x0, :lo12:.LC36
 	bl	printf
-.L451:
+.L422:
 	add	x0, x19, x25, lsl 8
 	mov	w1, 239
 	cmp	w24, 44
@@ -2341,20 +2303,20 @@ flash_set_interface_mode:
 	mov	w1, 137
 	ccmp	w24, w1, 4, ne
 	mov	w1, 1
-	bne	.L452
-.L483:
+	bne	.L423
+.L454:
 	str	w1, [x0, 2052]
 	mov	w1, 5
-.L482:
+.L453:
 	str	w1, [x0, 2048]
-.L457:
+.L428:
 	str	wzr, [x0, 2048]
 	str	wzr, [x0, 2048]
 	str	wzr, [x0, 2048]
-.L449:
+.L420:
 	add	x25, x25, 1
 	cmp	x25, 4
-	bne	.L459
+	bne	.L430
 	bl	nandc_wait_flash_ready
 	ldr	x25, [sp, 64]
 	mov	w0, 0
@@ -2363,71 +2325,73 @@ flash_set_interface_mode:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L460:
+.L431:
 	mov	x0, 1
-	b	.L448
-.L452:
+	b	.L419
+.L423:
 	cmp	w24, 155
-	beq	.L483
+	beq	.L454
 	mov	w2, 128
 	str	w2, [x0, 2052]
-	b	.L482
-.L450:
-	tbz	x1, 2, .L449
+	b	.L453
+.L421:
+	tbz	x1, 2, .L420
 	ldr	w0, [x21]
-	tbz	x0, 12, .L455
+	tbz	x0, 12, .L426
 	adrp	x0, .LC37
 	add	x0, x0, :lo12:.LC37
 	bl	printf
-.L455:
+.L426:
 	add	x0, x19, x25, lsl 8
 	mov	w1, 239
 	cmp	w24, 44
 	str	w1, [x0, 2056]
 	mov	w1, 137
 	ccmp	w24, w1, 4, ne
-	bne	.L456
+	bne	.L427
 	mov	w1, 1
 	str	w1, [x0, 2052]
 	mov	w1, 35
-	b	.L482
-.L456:
+	b	.L453
+.L427:
 	cmp	w24, 155
-	bne	.L458
+	bne	.L429
 	mov	w1, 1
 	str	w1, [x0, 2052]
 	mov	w1, 37
-	b	.L482
-.L458:
+	b	.L453
+.L429:
 	mov	w1, 128
 	str	w1, [x0, 2052]
 	str	wzr, [x0, 2048]
-	b	.L457
+	b	.L428
 	.size	flash_set_interface_mode, .-flash_set_interface_mode
 	.section	.text.mt_auto_read_calibration_config,"ax",@progbits
 	.align	2
 	.type	mt_auto_read_calibration_config, %function
 mt_auto_read_calibration_config:
-	mov	w5, w1
-	and	w4, w0, 255
-	stp	x29, x30, [sp, -16]!
+	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w20, w1
+	and	w19, w0, 255
 	bl	nandc_wait_flash_ready
-	ubfiz	x4, x4, 8, 8
-	adrp	x0, .LANCHOR13
-	ldr	x2, [x0, #:lo12:.LANCHOR13]
+	adrp	x1, .LANCHOR7
+	ubfiz	x0, x19, 8, 8
+	ldr	x19, [x1, #:lo12:.LANCHOR7]
+	add	x19, x19, x0
 	mov	w0, 239
-	add	x2, x2, x4
-	str	w0, [x2, 2056]
+	str	w0, [x19, 2056]
 	mov	w0, 150
-	str	w0, [x2, 2052]
-	mov	w0, 200
-	bl	timer_delay_ns
-	str	w5, [x2, 2048]
-	str	wzr, [x2, 2048]
-	str	wzr, [x2, 2048]
-	str	wzr, [x2, 2048]
-	ldp	x29, x30, [sp], 16
+	str	w0, [x19, 2052]
+	mov	x0, 1
+	bl	udelay
+	str	w20, [x19, 2048]
+	str	wzr, [x19, 2048]
+	str	wzr, [x19, 2048]
+	str	wzr, [x19, 2048]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
 	ret
 	.size	mt_auto_read_calibration_config, .-mt_auto_read_calibration_config
 	.section	.text.flash_reset,"ax",@progbits
@@ -2435,10 +2399,10 @@ mt_auto_read_calibration_config:
 	.global	flash_reset
 	.type	flash_reset, %function
 flash_reset:
-	adrp	x1, .LANCHOR13
+	adrp	x1, .LANCHOR7
 	ubfiz	x0, x0, 8, 8
 	add	x0, x0, 2048
-	ldr	x1, [x1, #:lo12:.LANCHOR13]
+	ldr	x1, [x1, #:lo12:.LANCHOR7]
 	add	x1, x1, x0
 	mov	w0, 255
 	str	w0, [x1, 8]
@@ -2449,57 +2413,63 @@ flash_reset:
 	.global	flash_read_id
 	.type	flash_read_id, %function
 flash_read_id:
-	and	w10, w0, 255
-	stp	x29, x30, [sp, -16]!
-	adrp	x0, .LANCHOR13
-	mov	x8, x1
+	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
-	ldr	x4, [x0, #:lo12:.LANCHOR13]
-	mov	w0, w10
+	str	x21, [sp, 32]
+	and	w21, w0, 255
+	adrp	x0, .LANCHOR7
+	stp	x19, x20, [sp, 16]
+	mov	x19, x1
+	ldr	x20, [x0, #:lo12:.LANCHOR7]
+	mov	w0, w21
 	bl	flash_reset
-	mov	w0, w10
+	mov	w0, w21
 	bl	nandc_cs
-	ubfiz	x2, x10, 8, 8
-	add	x2, x4, x2
+	ubfiz	x0, x21, 8, 8
+	add	x20, x20, x0
 	mov	w0, 144
-	str	w0, [x2, 2056]
-	mov	w0, 200
-	str	wzr, [x2, 2052]
-	bl	timer_delay_ns
-	ldr	w0, [x2, 2048]
-	strb	w0, [x8]
-	ldr	w0, [x2, 2048]
-	strb	w0, [x8, 1]
-	ldr	w0, [x2, 2048]
-	strb	w0, [x8, 2]
-	ldr	w0, [x2, 2048]
-	strb	w0, [x8, 3]
-	ldr	w0, [x2, 2048]
-	strb	w0, [x8, 4]
-	ldr	w0, [x2, 2048]
-	strb	w0, [x8, 5]
-	ldr	w0, [x2, 2048]
-	strb	w0, [x8, 6]
-	ldr	w0, [x2, 2048]
-	strb	w0, [x8, 7]
-	bl	nandc_de_cs.constprop.33
-	ldrb	w2, [x8]
+	str	w0, [x20, 2056]
+	mov	x0, 1
+	str	wzr, [x20, 2052]
+	bl	udelay
+	ldr	w0, [x20, 2048]
+	strb	w0, [x19]
+	ldr	w0, [x20, 2048]
+	strb	w0, [x19, 1]
+	ldr	w0, [x20, 2048]
+	strb	w0, [x19, 2]
+	ldr	w0, [x20, 2048]
+	strb	w0, [x19, 3]
+	ldr	w0, [x20, 2048]
+	strb	w0, [x19, 4]
+	ldr	w0, [x20, 2048]
+	strb	w0, [x19, 5]
+	ldr	w0, [x20, 2048]
+	strb	w0, [x19, 6]
+	ldr	w0, [x20, 2048]
+	strb	w0, [x19, 7]
+	bl	nandc_de_cs.constprop.32
+	ldrb	w2, [x19]
 	sub	w0, w2, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bhi	.L487
-	ldrb	w7, [x8, 5]
-	add	w1, w10, 1
-	ldrb	w6, [x8, 4]
+	bhi	.L458
+	ldrb	w7, [x19, 5]
+	add	w1, w21, 1
+	ldrb	w6, [x19, 4]
 	adrp	x0, .LC38
-	ldrb	w5, [x8, 3]
+	ldrb	w5, [x19, 3]
 	add	x0, x0, :lo12:.LC38
-	ldrb	w4, [x8, 2]
-	ldrb	w3, [x8, 1]
-	ldp	x29, x30, [sp], 16
+	ldrb	w4, [x19, 2]
+	ldrb	w3, [x19, 1]
+	ldr	x21, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
 	b	printf
-.L487:
-	ldp	x29, x30, [sp], 16
+.L458:
+	ldp	x19, x20, [sp, 16]
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 48
 	ret
 	.size	flash_read_id, .-flash_read_id
 	.section	.text.flash_read_spare,"ax",@progbits
@@ -2507,32 +2477,34 @@ flash_read_id:
 	.global	flash_read_spare
 	.type	flash_read_spare, %function
 flash_read_spare:
-	stp	x29, x30, [sp, -16]!
-	mov	x5, x2
-	adrp	x2, .LANCHOR33+9
+	stp	x29, x30, [sp, -32]!
 	ubfiz	x0, x0, 8, 8
 	add	x29, sp, 0
-	ldrb	w3, [x2, #:lo12:.LANCHOR33+9]
-	adrp	x2, .LANCHOR13
-	ldr	x4, [x2, #:lo12:.LANCHOR13]
+	stp	x19, x20, [sp, 16]
+	mov	x20, x2
+	adrp	x2, .LANCHOR32+9
+	ldrb	w3, [x2, #:lo12:.LANCHOR32+9]
+	adrp	x2, .LANCHOR7
+	ldr	x19, [x2, #:lo12:.LANCHOR7]
 	lsl	w3, w3, 9
-	add	x4, x4, x0
+	add	x19, x19, x0
 	and	w0, w1, 255
-	str	wzr, [x4, 2056]
-	str	w3, [x4, 2052]
+	str	wzr, [x19, 2056]
+	str	w3, [x19, 2052]
 	lsr	w3, w3, 8
-	str	w3, [x4, 2052]
-	str	w0, [x4, 2052]
+	str	w3, [x19, 2052]
+	str	w0, [x19, 2052]
 	lsr	w0, w1, 8
-	str	w0, [x4, 2052]
+	str	w0, [x19, 2052]
 	lsr	w1, w1, 16
-	str	w1, [x4, 2052]
+	str	w1, [x19, 2052]
 	mov	w0, 48
-	str	w0, [x4, 2056]
+	str	w0, [x19, 2056]
 	bl	nandc_wait_flash_ready
-	ldr	w0, [x4, 2048]
-	ldp	x29, x30, [sp], 16
-	strb	w0, [x5]
+	ldr	w0, [x19, 2048]
+	strb	w0, [x20]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
 	ret
 	.size	flash_read_spare, .-flash_read_spare
 	.section	.text.flash_read_otp_data,"ax",@progbits
@@ -2542,23 +2514,23 @@ flash_read_spare:
 flash_read_otp_data:
 	stp	x29, x30, [sp, -48]!
 	and	w4, w0, 255
-	adrp	x0, .LANCHOR13
+	adrp	x0, .LANCHOR7
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w20, w1
-	ldr	x19, [x0, #:lo12:.LANCHOR13]
+	ldr	x19, [x0, #:lo12:.LANCHOR7]
 	mov	w0, w4
-	str	x21, [sp, 32]
-	mov	x21, x2
+	stp	x21, x22, [sp, 32]
+	mov	x22, x2
 	bl	nandc_cs
 	ubfiz	x4, x4, 8, 8
 	add	x19, x19, x4
 	mov	w0, 239
-	mov	w4, 144
+	mov	w21, 144
 	str	w0, [x19, 2056]
-	mov	w0, 50
-	str	w4, [x19, 2052]
-	bl	timer_delay_ns
+	mov	x0, 1
+	str	w21, [x19, 2052]
+	bl	udelay
 	mov	w0, 1
 	str	w0, [x19, 2048]
 	str	wzr, [x19, 2048]
@@ -2567,7 +2539,7 @@ flash_read_otp_data:
 	bl	nandc_wait_flash_ready
 	mov	w0, 238
 	str	w0, [x19, 2056]
-	str	w4, [x19, 2052]
+	str	w21, [x19, 2052]
 	mov	w1, w20
 	adrp	x0, .LC39
 	add	x0, x0, :lo12:.LC39
@@ -2589,26 +2561,26 @@ flash_read_otp_data:
 	str	w0, [x19, 2056]
 	bl	nandc_wait_flash_ready
 	mov	x0, 0
-.L493:
+.L464:
 	ldr	w1, [x19, 2048]
-	strb	w1, [x21, x0]
+	strb	w1, [x22, x0]
 	add	x0, x0, 1
 	cmp	x0, 16384
-	bne	.L493
+	bne	.L464
 	mov	w0, 239
 	str	w0, [x19, 2056]
 	mov	w0, 144
 	str	w0, [x19, 2052]
-	mov	w0, 50
-	bl	timer_delay_ns
-	ldr	x21, [sp, 32]
+	mov	x0, 1
+	bl	udelay
+	ldp	x21, x22, [sp, 32]
 	str	wzr, [x19, 2048]
 	str	wzr, [x19, 2048]
 	str	wzr, [x19, 2048]
 	str	wzr, [x19, 2048]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
-	b	nandc_de_cs.constprop.33
+	b	nandc_de_cs.constprop.32
 	.size	flash_read_otp_data, .-flash_read_otp_data
 	.section	.text.sandisk_prog_test_bad_block,"ax",@progbits
 	.align	2
@@ -2616,125 +2588,135 @@ flash_read_otp_data:
 	.type	sandisk_prog_test_bad_block, %function
 sandisk_prog_test_bad_block:
 	stp	x29, x30, [sp, -48]!
-	mov	w4, w1
-	adrp	x1, .LANCHOR13
 	and	x2, x0, 255
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR33
-	ldr	x19, [x1, #:lo12:.LANCHOR13]
-	add	x1, x20, :lo12:.LANCHOR33
-	str	x21, [sp, 32]
 	mov	x0, x2
 	add	x2, x2, 8
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	mov	w22, w1
+	adrp	x1, .LANCHOR7
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR32
+	ldr	x19, [x1, #:lo12:.LANCHOR7]
+	add	x1, x20, :lo12:.LANCHOR32
 	ldrb	w1, [x1, 29]
 	add	x2, x19, x2, lsl 8
-	cbz	w1, .L497
-.L511:
+	cbz	w1, .L468
+.L483:
 	ubfiz	x0, x0, 8, 8
 	str	w1, [x2, 8]
 	add	x19, x19, x0
 	mov	w0, 128
 	str	w0, [x19, 2056]
-	and	w0, w4, 255
+	and	w0, w22, 255
 	str	wzr, [x19, 2052]
 	str	wzr, [x19, 2052]
 	str	w0, [x19, 2052]
-	lsr	w0, w4, 8
+	lsr	w0, w22, 8
 	str	w0, [x19, 2052]
-	lsr	w0, w4, 16
+	lsr	w0, w22, 16
 	str	w0, [x19, 2052]
 	mov	w0, 16
 	str	w0, [x19, 2056]
 	bl	nandc_wait_flash_ready
 	mov	w0, 112
 	str	w0, [x19, 2056]
-	mov	w0, 80
-	bl	timer_delay_ns
+	mov	x0, 1
+	bl	udelay
+	ldr	w2, [x19, 2048]
+	cmp	w2, 255
+	bne	.L470
 	ldr	w2, [x19, 2048]
+.L470:
 	mov	w0, 5
 	ands	w21, w2, w0
-	beq	.L499
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L499
+	beq	.L471
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L471
 	adrp	x0, .LC40
-	mov	w1, w4
+	mov	w1, w22
 	add	x0, x0, :lo12:.LC40
 	bl	printf
-.L499:
-	add	x20, x20, :lo12:.LANCHOR33
+.L471:
+	add	x20, x20, :lo12:.LANCHOR32
 	ldrb	w0, [x20, 30]
-	cbz	w0, .L496
+	cbz	w0, .L467
 	str	w0, [x19, 2056]
-.L496:
+.L467:
 	mov	w0, w21
-	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L497:
+.L468:
 	mov	w1, 162
-	b	.L511
+	b	.L483
 	.size	sandisk_prog_test_bad_block, .-sandisk_prog_test_bad_block
 	.section	.text.nand_flash_exit_boot_rom_slc_mode,"ax",@progbits
 	.align	2
 	.type	nand_flash_exit_boot_rom_slc_mode, %function
 nand_flash_exit_boot_rom_slc_mode:
-	stp	x29, x30, [sp, -16]!
-	adrp	x0, .LANCHOR13
+	stp	x29, x30, [sp, -48]!
+	adrp	x0, .LANCHOR7
 	mov	w1, 137
-	adrp	x5, .LANCHOR34
 	add	x29, sp, 0
-	ldr	x4, [x0, #:lo12:.LANCHOR13]
-	adrp	x0, .LANCHOR48
-	ldrb	w0, [x0, #:lo12:.LANCHOR48]
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR33
+	ldr	x19, [x0, #:lo12:.LANCHOR7]
+	adrp	x0, .LANCHOR47
+	str	x21, [sp, 32]
+	ldrb	w0, [x0, #:lo12:.LANCHOR47]
 	cmp	w0, 44
 	ccmp	w0, w1, 4, ne
-	bne	.L513
+	bne	.L485
 	mov	w0, 223
-	str	w0, [x4, 2056]
-	adrp	x0, .LANCHOR33+12
+	str	w0, [x19, 2056]
+	adrp	x0, .LANCHOR32+12
 	mov	w1, 4
-	ldrb	w0, [x0, #:lo12:.LANCHOR33+12]
+	ldrb	w0, [x0, #:lo12:.LANCHOR32+12]
 	cmp	w0, 2
 	csel	w0, w0, w1, eq
-	strb	w0, [x5, #:lo12:.LANCHOR34]
+	strb	w0, [x20, #:lo12:.LANCHOR33]
 	bl	nandc_wait_flash_ready
 	mov	w0, 239
-	str	w0, [x4, 2056]
+	str	w0, [x19, 2056]
 	mov	w0, 145
-	str	w0, [x4, 2052]
-	mov	w0, 100
-	bl	timer_delay_ns
-	ldrb	w0, [x5, #:lo12:.LANCHOR34]
-	str	w0, [x4, 2048]
-	str	wzr, [x4, 2048]
-	str	wzr, [x4, 2048]
-	str	wzr, [x4, 2048]
-.L522:
-	ldp	x29, x30, [sp], 16
+	str	w0, [x19, 2052]
+	mov	x0, 1
+	bl	udelay
+	ldrb	w0, [x20, #:lo12:.LANCHOR33]
+	str	w0, [x19, 2048]
+	str	wzr, [x19, 2048]
+	str	wzr, [x19, 2048]
+	str	wzr, [x19, 2048]
+.L494:
+	ldp	x19, x20, [sp, 16]
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 48
 	b	nandc_wait_flash_ready
-.L513:
+.L485:
 	cmp	w0, 173
-	bne	.L515
-	add	x4, x4, 2048
+	bne	.L487
+	add	x19, x19, 2048
 	mov	w0, 190
-	str	w0, [x4, 8]
+	str	w0, [x19, 8]
 	bl	nandc_wait_flash_ready
 	mov	w0, 223
-	str	w0, [x4, 8]
-	adrp	x0, .LANCHOR33+12
+	str	w0, [x19, 8]
+	adrp	x0, .LANCHOR32+12
 	mov	w1, 4
-	ldrb	w0, [x0, #:lo12:.LANCHOR33+12]
+	ldrb	w0, [x0, #:lo12:.LANCHOR32+12]
 	cmp	w0, 2
 	csel	w0, w0, w1, eq
-	strb	w0, [x5, #:lo12:.LANCHOR34]
-	b	.L522
-.L515:
-	ldp	x29, x30, [sp], 16
-	strb	wzr, [x5, #:lo12:.LANCHOR34]
+	strb	w0, [x20, #:lo12:.LANCHOR33]
+	b	.L494
+.L487:
+	strb	wzr, [x20, #:lo12:.LANCHOR33]
 	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 48
 	b	zftl_flash_exit_slc_mode
 	.size	nand_flash_exit_boot_rom_slc_mode, .-nand_flash_exit_boot_rom_slc_mode
 	.section	.text.nandc_rdy_status,"ax",@progbits
@@ -2742,9 +2724,9 @@ nand_flash_exit_boot_rom_slc_mode:
 	.global	nandc_rdy_status
 	.type	nandc_rdy_status, %function
 nandc_rdy_status:
-	adrp	x0, .LANCHOR13
+	adrp	x0, .LANCHOR7
 	sub	sp, sp, #16
-	ldr	x0, [x0, #:lo12:.LANCHOR13]
+	ldr	x0, [x0, #:lo12:.LANCHOR7]
 	ldr	w0, [x0]
 	str	w0, [sp, 8]
 	ldr	w0, [sp, 8]
@@ -2762,24 +2744,24 @@ nandc_bch_sel:
 	ldr	w1, [sp, 8]
 	orr	w1, w1, 1
 	str	w1, [sp, 8]
-	adrp	x1, .LANCHOR50
-	strb	w0, [x1, #:lo12:.LANCHOR50]
-	adrp	x1, .LANCHOR28
-	ldrb	w1, [x1, #:lo12:.LANCHOR28]
+	adrp	x1, .LANCHOR49
+	strb	w0, [x1, #:lo12:.LANCHOR49]
+	adrp	x1, .LANCHOR27
+	ldrb	w1, [x1, #:lo12:.LANCHOR27]
 	cmp	w1, 9
-	adrp	x1, .LANCHOR13
-	bne	.L526
-	ldr	x1, [x1, #:lo12:.LANCHOR13]
+	adrp	x1, .LANCHOR7
+	bne	.L498
+	ldr	x1, [x1, #:lo12:.LANCHOR7]
 	cmp	w0, 70
 	ldr	w2, [sp, 8]
 	str	w2, [x1, 16]
-	beq	.L532
+	beq	.L504
 	cmp	w0, 60
-	beq	.L533
+	beq	.L505
 	cmp	w0, 40
 	cset	w0, eq
 	add	w0, w0, 1
-.L527:
+.L499:
 	str	wzr, [sp]
 	ldr	w2, [sp]
 	bfi	w2, w0, 25, 3
@@ -2789,17 +2771,17 @@ nandc_bch_sel:
 	str	w0, [sp]
 	ldr	w0, [sp]
 	str	w0, [x1, 32]
-.L525:
+.L497:
 	add	sp, sp, 16
 	ret
-.L532:
+.L504:
 	mov	w0, 0
-	b	.L527
-.L533:
+	b	.L499
+.L505:
 	mov	w0, 3
-	b	.L527
-.L526:
-	ldr	x2, [x1, #:lo12:.LANCHOR13]
+	b	.L499
+.L498:
+	ldr	x2, [x1, #:lo12:.LANCHOR7]
 	mov	w3, 16
 	ldr	w1, [sp, 8]
 	cmp	w0, w3
@@ -2811,20 +2793,20 @@ nandc_bch_sel:
 	ldr	w1, [sp]
 	and	w1, w1, -262145
 	str	w1, [sp]
-	bne	.L529
-.L536:
+	bne	.L501
+.L508:
 	ldr	w0, [sp]
 	and	w0, w0, -17
-	b	.L537
-.L529:
+	b	.L509
+.L501:
 	cmp	w0, 24
-	bne	.L531
+	bne	.L503
 	ldr	w0, [sp]
 	orr	w0, w0, 16
-.L537:
+.L509:
 	str	w0, [sp]
-	b	.L530
-.L531:
+	b	.L502
+.L503:
 	ldr	w1, [sp]
 	cmp	w0, 40
 	orr	w1, w1, 262144
@@ -2832,27 +2814,27 @@ nandc_bch_sel:
 	ldr	w1, [sp]
 	orr	w1, w1, 16
 	str	w1, [sp]
-	beq	.L536
-.L530:
+	beq	.L508
+.L502:
 	ldr	w0, [sp]
 	orr	w0, w0, 1
 	str	w0, [sp]
 	ldr	w0, [sp]
 	str	w0, [x2, 12]
-	b	.L525
+	b	.L497
 	.size	nandc_bch_sel, .-nandc_bch_sel
 	.section	.text.zftl_nandc_get_irq_status,"ax",@progbits
 	.align	2
 	.global	zftl_nandc_get_irq_status
 	.type	zftl_nandc_get_irq_status, %function
 zftl_nandc_get_irq_status:
-	adrp	x1, .LANCHOR28
-	ldrb	w1, [x1, #:lo12:.LANCHOR28]
+	adrp	x1, .LANCHOR27
+	ldrb	w1, [x1, #:lo12:.LANCHOR27]
 	cmp	w1, 9
-	bne	.L539
+	bne	.L511
 	ldr	w0, [x0, 296]
 	ret
-.L539:
+.L511:
 	ldr	w0, [x0, 372]
 	ret
 	.size	zftl_nandc_get_irq_status, .-zftl_nandc_get_irq_status
@@ -2884,18 +2866,18 @@ rk_nandc_flash_xfer_completed:
 nandc_xfer_start:
 	stp	x29, x30, [sp, -80]!
 	and	w1, w1, 255
-	adrp	x4, .LANCHOR53
+	adrp	x4, .LANCHOR52
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 255
-	adrp	x0, .LANCHOR28
+	adrp	x0, .LANCHOR27
 	str	x21, [sp, 32]
 	and	w6, w20, 1
-	adrp	x21, .LANCHOR13
-	ldrb	w0, [x0, #:lo12:.LANCHOR28]
+	adrp	x21, .LANCHOR7
+	ldrb	w0, [x0, #:lo12:.LANCHOR27]
 	cmp	w0, 9
 	add	w0, w1, 1
-	bne	.L545
+	bne	.L517
 	str	wzr, [x29, 56]
 	mov	w5, 1
 	ubfx	x0, x0, 1, 6
@@ -2923,18 +2905,18 @@ nandc_xfer_start:
 	ldr	w0, [x29, 56]
 	orr	w0, w0, 128
 	str	w0, [x29, 56]
+	adrp	x0, .LANCHOR50
+	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	cbz	w0, .L518
 	adrp	x0, .LANCHOR51
 	ldrb	w0, [x0, #:lo12:.LANCHOR51]
-	cbz	w0, .L546
-	adrp	x0, .LANCHOR52
-	ldrb	w0, [x0, #:lo12:.LANCHOR52]
-	cbz	w0, .L546
+	cbz	w0, .L518
 	ldr	w0, [x29, 56]
 	orr	w0, w0, 512
 	str	w0, [x29, 56]
-.L546:
+.L518:
 	ldr	w0, [x29, 56]
-	add	x19, x4, :lo12:.LANCHOR53
+	add	x19, x4, :lo12:.LANCHOR52
 	add	x1, x2, 63
 	and	x1, x1, -64
 	ubfx	x0, x0, 22, 6
@@ -2952,7 +2934,7 @@ nandc_xfer_start:
 	bl	flush_dcache_range
 	mov	w0, 1
 	str	w0, [x19, 32]
-	ldr	x0, [x21, #:lo12:.LANCHOR13]
+	ldr	x0, [x21, #:lo12:.LANCHOR7]
 	mov	w2, 16
 	ldr	w1, [x19, 24]
 	cmp	w20, 0
@@ -2981,8 +2963,8 @@ nandc_xfer_start:
 	ldr	w1, [x29, 64]
 	orr	w1, w1, 1
 	str	w1, [x29, 64]
-	adrp	x1, .LANCHOR54
-	ldrh	w2, [x1, #:lo12:.LANCHOR54]
+	adrp	x1, .LANCHOR53
+	ldrh	w2, [x1, #:lo12:.LANCHOR53]
 	ldr	w1, [x29, 64]
 	bfi	w1, w2, 16, 11
 	str	w1, [x29, 64]
@@ -2995,13 +2977,13 @@ nandc_xfer_start:
 	str	w1, [x29, 56]
 	ldr	w1, [x29, 56]
 	str	w1, [x0, 16]
-.L544:
+.L516:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 80
 	ret
-.L545:
-	ldr	x5, [x21, #:lo12:.LANCHOR13]
+.L517:
+	ldr	x5, [x21, #:lo12:.LANCHOR7]
 	mov	w7, 16
 	ubfx	x0, x0, 1, 6
 	ldr	w5, [x5, 12]
@@ -3038,24 +3020,24 @@ nandc_xfer_start:
 	ldr	w5, [x29, 56]
 	bfi	w5, w0, 22, 6
 	str	w5, [x29, 56]
-	cbz	w20, .L548
-	adrp	x0, .LANCHOR50
+	cbz	w20, .L520
+	adrp	x0, .LANCHOR49
 	ubfx	x1, x1, 1, 7
-	ldr	x8, [x4, #:lo12:.LANCHOR53]
+	ldr	x8, [x4, #:lo12:.LANCHOR52]
 	add	x1, x3, x1, lsl 2
-	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	mov	w5, 64
 	cmp	w0, 25
 	mov	w0, 128
 	csel	w5, w5, w0, cc
 	mov	w0, 0
-.L550:
+.L522:
 	add	w7, w5, w0
 	cmp	x3, x1
-	bne	.L551
-.L552:
-	add	x19, x4, :lo12:.LANCHOR53
-	ldr	x0, [x4, #:lo12:.LANCHOR53]
+	bne	.L523
+.L524:
+	add	x19, x4, :lo12:.LANCHOR52
+	ldr	x0, [x4, #:lo12:.LANCHOR52]
 	add	x1, x2, 63
 	and	x1, x1, -64
 	stp	x2, x0, [x19, 8]
@@ -3077,7 +3059,7 @@ nandc_xfer_start:
 	bl	flush_dcache_range
 	mov	w0, 1
 	str	w0, [x19, 32]
-	ldr	x0, [x21, #:lo12:.LANCHOR13]
+	ldr	x0, [x21, #:lo12:.LANCHOR7]
 	mov	w2, 16
 	ldr	w1, [x19, 24]
 	cmp	w20, 0
@@ -3116,8 +3098,8 @@ nandc_xfer_start:
 	str	w1, [x29, 56]
 	ldr	w1, [x29, 56]
 	str	w1, [x0, 8]
-	b	.L544
-.L551:
+	b	.L516
+.L523:
 	ldrh	w10, [x3]
 	and	x0, x0, 4294967292
 	ldrh	w6, [x3, 2]
@@ -3125,11 +3107,11 @@ nandc_xfer_start:
 	orr	x6, x10, x6, lsl 16
 	str	w6, [x8, x0]
 	mov	w0, w7
-	b	.L550
-.L548:
-	ldr	x0, [x4, #:lo12:.LANCHOR53]
+	b	.L522
+.L520:
+	ldr	x0, [x4, #:lo12:.LANCHOR52]
 	str	w6, [x0]
-	b	.L552
+	b	.L524
 	.size	nandc_xfer_start, .-nandc_xfer_start
 	.section	.text.nandc_set_seed,"ax",@progbits
 	.align	2
@@ -3137,23 +3119,23 @@ nandc_xfer_start:
 	.type	nandc_set_seed, %function
 nandc_set_seed:
 	and	x0, x0, 127
-	adrp	x1, .LANCHOR55
-	add	x1, x1, :lo12:.LANCHOR55
+	adrp	x1, .LANCHOR54
+	add	x1, x1, :lo12:.LANCHOR54
 	ldrh	w0, [x1, x0, lsl 1]
-	adrp	x1, .LANCHOR52
-	ldrb	w2, [x1, #:lo12:.LANCHOR52]
+	adrp	x1, .LANCHOR51
+	ldrb	w2, [x1, #:lo12:.LANCHOR51]
 	orr	w1, w0, -1073741824
 	cmp	w2, 0
 	csel	w0, w1, w0, ne
-	adrp	x1, .LANCHOR28
-	ldrb	w1, [x1, #:lo12:.LANCHOR28]
+	adrp	x1, .LANCHOR27
+	ldrb	w1, [x1, #:lo12:.LANCHOR27]
 	cmp	w1, 9
-	adrp	x1, .LANCHOR13
-	ldr	x1, [x1, #:lo12:.LANCHOR13]
-	bne	.L563
+	adrp	x1, .LANCHOR7
+	ldr	x1, [x1, #:lo12:.LANCHOR7]
+	bne	.L535
 	str	w0, [x1, 520]
 	ret
-.L563:
+.L535:
 	str	w0, [x1, 336]
 	ret
 	.size	nandc_set_seed, .-nandc_set_seed
@@ -3168,40 +3150,40 @@ zftl_flash_de_init:
 	bl	nandc_wait_flash_ready
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L568
-	adrp	x0, .LANCHOR19
-	ldrb	w0, [x0, #:lo12:.LANCHOR19]
-	cbnz	w0, .L568
-	adrp	x0, .LANCHOR28
-	ldrb	w0, [x0, #:lo12:.LANCHOR28]
+	cbz	w0, .L540
+	adrp	x0, .LANCHOR24
+	ldrb	w0, [x0, #:lo12:.LANCHOR24]
+	cbnz	w0, .L540
+	adrp	x0, .LANCHOR27
+	ldrb	w0, [x0, #:lo12:.LANCHOR27]
 	cmp	w0, 9
-	beq	.L568
+	beq	.L540
 	mov	w0, 0
 	bl	zftl_flash_exit_slc_mode
-.L568:
-	adrp	x19, .LANCHOR21
+.L540:
+	adrp	x19, .LANCHOR26
 	mov	w0, 0
 	bl	hynix_reconfig_rr_para
-	ldrb	w0, [x19, #:lo12:.LANCHOR21]
-	cbz	w0, .L569
-	adrp	x0, .LANCHOR49
-	ldrb	w0, [x0, #:lo12:.LANCHOR49]
-	tbz	x0, 0, .L569
+	ldrb	w0, [x19, #:lo12:.LANCHOR26]
+	cbz	w0, .L541
+	adrp	x0, .LANCHOR48
+	ldrb	w0, [x0, #:lo12:.LANCHOR48]
+	tbz	x0, 0, .L541
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
 	bl	nandc_set_if_mode
-	strb	wzr, [x19, #:lo12:.LANCHOR21]
-.L569:
-	adrp	x3, .LANCHOR52
-	ldrb	w0, [x3, #:lo12:.LANCHOR52]
-	cbz	w0, .L570
+	strb	wzr, [x19, #:lo12:.LANCHOR26]
+.L541:
+	adrp	x3, .LANCHOR51
+	ldrb	w0, [x3, #:lo12:.LANCHOR51]
+	cbz	w0, .L542
 	mov	w0, 0
-	strb	wzr, [x3, #:lo12:.LANCHOR52]
+	strb	wzr, [x3, #:lo12:.LANCHOR51]
 	bl	nandc_set_seed
 	mov	w0, 1
-	strb	w0, [x3, #:lo12:.LANCHOR52]
-.L570:
+	strb	w0, [x3, #:lo12:.LANCHOR51]
+.L542:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -3212,8 +3194,8 @@ zftl_flash_de_init:
 	.global	nandc_randomizer_enable
 	.type	nandc_randomizer_enable, %function
 nandc_randomizer_enable:
-	adrp	x1, .LANCHOR52
-	strb	w0, [x1, #:lo12:.LANCHOR52]
+	adrp	x1, .LANCHOR51
+	strb	w0, [x1, #:lo12:.LANCHOR51]
 	ret
 	.size	nandc_randomizer_enable, .-nandc_randomizer_enable
 	.section	.text.nandc_get_chip_if,"ax",@progbits
@@ -3221,10 +3203,10 @@ nandc_randomizer_enable:
 	.global	nandc_get_chip_if
 	.type	nandc_get_chip_if, %function
 nandc_get_chip_if:
-	adrp	x1, .LANCHOR13
+	adrp	x1, .LANCHOR7
 	ubfiz	x0, x0, 8, 8
 	add	x0, x0, 2048
-	ldr	x1, [x1, #:lo12:.LANCHOR13]
+	ldr	x1, [x1, #:lo12:.LANCHOR7]
 	add	x0, x1, x0
 	ret
 	.size	nandc_get_chip_if, .-nandc_get_chip_if
@@ -3233,10 +3215,10 @@ nandc_get_chip_if:
 	.global	buf_reinit
 	.type	buf_reinit, %function
 buf_reinit:
-	adrp	x0, .LANCHOR56
-	add	x1, x0, :lo12:.LANCHOR56
+	adrp	x0, .LANCHOR55
+	add	x1, x0, :lo12:.LANCHOR55
 	mov	w2, 0
-.L590:
+.L562:
 	and	w3, w2, 255
 	strb	wzr, [x1, 2]
 	add	w4, w3, 1
@@ -3246,14 +3228,14 @@ buf_reinit:
 	str	xzr, [x1, 16]
 	cmp	w2, 16
 	add	x1, x1, 64
-	bne	.L590
-	add	x0, x0, :lo12:.LANCHOR56
+	bne	.L562
+	add	x0, x0, :lo12:.LANCHOR55
 	mov	w1, -1
 	strb	w1, [x0, 960]
+	adrp	x0, .LANCHOR56
+	strb	wzr, [x0, #:lo12:.LANCHOR56]
 	adrp	x0, .LANCHOR57
-	strb	wzr, [x0, #:lo12:.LANCHOR57]
-	adrp	x0, .LANCHOR58
-	strb	w2, [x0, #:lo12:.LANCHOR58]
+	strb	w2, [x0, #:lo12:.LANCHOR57]
 	ret
 	.size	buf_reinit, .-buf_reinit
 	.section	.text.buf_add_tail,"ax",@progbits
@@ -3271,49 +3253,49 @@ buf_add_tail:
 	mov	x20, x1
 	ldrb	w1, [x19]
 	cmp	w1, 255
-	bne	.L598
+	bne	.L570
 	ldrb	w0, [x20, 1]
 	cmp	w0, 255
-	bne	.L594
-	adrp	x1, .LANCHOR59
+	bne	.L566
+	adrp	x1, .LANCHOR58
 	adrp	x0, .LC0
 	mov	w2, 74
-	add	x1, x1, :lo12:.LANCHOR59
+	add	x1, x1, :lo12:.LANCHOR58
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L594:
+.L566:
 	ldrb	w0, [x20, 1]
 	strb	w0, [x19]
-.L592:
+.L564:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L598:
-	adrp	x0, .LANCHOR56
-	add	x2, x0, :lo12:.LANCHOR56
+.L570:
+	adrp	x0, .LANCHOR55
+	add	x2, x0, :lo12:.LANCHOR55
 	mov	x19, x0
-.L599:
+.L571:
 	sbfiz	x0, x1, 6, 32
 	mov	w21, w1
 	ldrb	w1, [x2, x0]
 	cmp	w1, 255
-	bne	.L599
+	bne	.L571
 	ldrb	w0, [x20, 1]
 	cmp	w0, 255
-	bne	.L596
-	adrp	x1, .LANCHOR59
+	bne	.L568
+	adrp	x1, .LANCHOR58
 	adrp	x0, .LC0
 	mov	w2, 81
-	add	x1, x1, :lo12:.LANCHOR59
+	add	x1, x1, :lo12:.LANCHOR58
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L596:
-	add	x0, x19, :lo12:.LANCHOR56
+.L568:
+	add	x0, x19, :lo12:.LANCHOR55
 	sbfiz	x21, x21, 6, 32
 	ldrb	w1, [x20, 1]
 	strb	w1, [x0, x21]
-	b	.L592
+	b	.L564
 	.size	buf_add_tail, .-buf_add_tail
 	.section	.text.queue_read_cmd,"ax",@progbits
 	.align	2
@@ -3332,9 +3314,9 @@ queue_read_cmd:
 	mov	w0, -1
 	strb	w0, [x19]
 	mov	x1, x19
-	adrp	x0, .LANCHOR60
+	adrp	x0, .LANCHOR59
 	ldr	x19, [sp, 16]
-	add	x0, x0, :lo12:.LANCHOR60
+	add	x0, x0, :lo12:.LANCHOR59
 	ldp	x29, x30, [sp], 32
 	b	buf_add_tail
 	.size	queue_read_cmd, .-queue_read_cmd
@@ -3344,33 +3326,33 @@ queue_read_cmd:
 	.type	zbuf_free, %function
 zbuf_free:
 	ldrb	w1, [x0, 2]
-	adrp	x2, .LANCHOR57
+	adrp	x2, .LANCHOR56
 	and	w1, w1, 8
 	strb	w1, [x0, 2]
-	cbz	w1, .L604
+	cbz	w1, .L576
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L604
+	beq	.L576
 	stp	x29, x30, [sp, -16]!
 	mov	x1, x0
-	add	x0, x2, :lo12:.LANCHOR57
+	add	x0, x2, :lo12:.LANCHOR56
 	add	x29, sp, 0
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR58
+	adrp	x1, .LANCHOR57
 	ldp	x29, x30, [sp], 16
-	ldrb	w0, [x1, #:lo12:.LANCHOR58]
+	ldrb	w0, [x1, #:lo12:.LANCHOR57]
 	add	w0, w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR58]
+	strb	w0, [x1, #:lo12:.LANCHOR57]
 	ret
-.L604:
-	ldrb	w1, [x2, #:lo12:.LANCHOR57]
+.L576:
+	ldrb	w1, [x2, #:lo12:.LANCHOR56]
 	strb	w1, [x0]
-	adrp	x1, .LANCHOR58
+	adrp	x1, .LANCHOR57
 	ldrb	w0, [x0, 1]
-	strb	w0, [x2, #:lo12:.LANCHOR57]
-	ldrb	w0, [x1, #:lo12:.LANCHOR58]
+	strb	w0, [x2, #:lo12:.LANCHOR56]
+	ldrb	w0, [x1, #:lo12:.LANCHOR57]
 	add	w0, w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR58]
+	strb	w0, [x1, #:lo12:.LANCHOR57]
 	ret
 	.size	zbuf_free, .-zbuf_free
 	.section	.text.buf_alloc,"ax",@progbits
@@ -3381,29 +3363,29 @@ buf_alloc:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR58
+	adrp	x19, .LANCHOR57
 	and	w20, w0, 255
-	ldrb	w0, [x19, #:lo12:.LANCHOR58]
-	cbz	w0, .L617
-.L620:
-	adrp	x2, .LANCHOR57
-	adrp	x1, .LANCHOR56
-	add	x0, x1, :lo12:.LANCHOR56
-	ldrb	w3, [x2, #:lo12:.LANCHOR57]
+	ldrb	w0, [x19, #:lo12:.LANCHOR57]
+	cbz	w0, .L589
+.L592:
+	adrp	x2, .LANCHOR56
+	adrp	x1, .LANCHOR55
+	add	x0, x1, :lo12:.LANCHOR55
+	ldrb	w3, [x2, #:lo12:.LANCHOR56]
 	ubfiz	x4, x3, 6, 8
 	add	x0, x0, x4
 	mov	x4, x2
-	cbz	w20, .L618
-.L619:
-	add	x1, x1, :lo12:.LANCHOR56
+	cbz	w20, .L590
+.L591:
+	add	x1, x1, :lo12:.LANCHOR55
 	sbfiz	x3, x3, 6, 32
 	add	x2, x1, x3
 	ldrb	w5, [x1, x3]
-	strb	w5, [x4, #:lo12:.LANCHOR57]
-	ldrb	w4, [x19, #:lo12:.LANCHOR58]
+	strb	w5, [x4, #:lo12:.LANCHOR56]
+	ldrb	w4, [x19, #:lo12:.LANCHOR57]
 	strh	wzr, [x2, 50]
 	sub	w4, w4, #1
-	strb	w4, [x19, #:lo12:.LANCHOR58]
+	strb	w4, [x19, #:lo12:.LANCHOR57]
 	mov	w4, 1
 	strb	wzr, [x2, 56]
 	strb	w4, [x2, 2]
@@ -3413,27 +3395,27 @@ buf_alloc:
 	mov	w1, -1
 	str	xzr, [x2, 16]
 	str	w1, [x2, 36]
-	b	.L616
-.L617:
+	b	.L588
+.L589:
 	mov	w2, 121
-	adrp	x1, .LANCHOR61
+	adrp	x1, .LANCHOR60
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR61
+	add	x1, x1, :lo12:.LANCHOR60
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	ldrb	w0, [x19, #:lo12:.LANCHOR58]
-	cbnz	w0, .L620
-.L622:
+	ldrb	w0, [x19, #:lo12:.LANCHOR57]
+	cbnz	w0, .L592
+.L594:
 	mov	x0, 0
-.L616:
+.L588:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L618:
-	ldrb	w2, [x19, #:lo12:.LANCHOR58]
+.L590:
+	ldrb	w2, [x19, #:lo12:.LANCHOR57]
 	cmp	w2, 1
-	bne	.L619
-	b	.L622
+	bne	.L591
+	b	.L594
 	.size	buf_alloc, .-buf_alloc
 	.section	.text.buf_remove_buf,"ax",@progbits
 	.align	2
@@ -3443,30 +3425,30 @@ buf_remove_buf:
 	ldrb	w4, [x1, 1]
 	ldrb	w2, [x0]
 	cmp	w4, w2
-	bne	.L630
+	bne	.L602
 	ldrb	w1, [x1]
 	strb	w1, [x0]
-.L634:
+.L606:
 	mov	w0, 1
 	ret
-.L631:
+.L603:
 	mov	w3, w2
 	sbfiz	x2, x2, 6, 32
 	ldrb	w2, [x0, x2]
 	cmp	w4, w2
-	bne	.L632
+	bne	.L604
 	sbfiz	x3, x3, 6, 32
 	ldrb	w2, [x1]
 	strb	w2, [x0, x3]
 	mov	w0, -1
 	strb	w0, [x1]
-	b	.L634
-.L630:
-	adrp	x0, .LANCHOR56
-	add	x0, x0, :lo12:.LANCHOR56
-.L632:
+	b	.L606
+.L602:
+	adrp	x0, .LANCHOR55
+	add	x0, x0, :lo12:.LANCHOR55
+.L604:
 	cmp	w2, 255
-	bne	.L631
+	bne	.L603
 	mov	w0, 0
 	ret
 	.size	buf_remove_buf, .-buf_remove_buf
@@ -3478,32 +3460,32 @@ buf_remove_free:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR58
+	adrp	x19, .LANCHOR57
 	mov	x20, x0
-	ldrb	w0, [x19, #:lo12:.LANCHOR58]
-	cbnz	w0, .L636
-	adrp	x1, .LANCHOR62
+	ldrb	w0, [x19, #:lo12:.LANCHOR57]
+	cbnz	w0, .L608
+	adrp	x1, .LANCHOR61
 	adrp	x0, .LC0
 	mov	w2, 172
-	add	x1, x1, :lo12:.LANCHOR62
+	add	x1, x1, :lo12:.LANCHOR61
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L636:
-	ldrb	w0, [x19, #:lo12:.LANCHOR58]
-	cbz	w0, .L635
+.L608:
+	ldrb	w0, [x19, #:lo12:.LANCHOR57]
+	cbz	w0, .L607
 	mov	x1, x20
-	adrp	x0, .LANCHOR57
-	add	x0, x0, :lo12:.LANCHOR57
+	adrp	x0, .LANCHOR56
+	add	x0, x0, :lo12:.LANCHOR56
 	bl	buf_remove_buf
 	cmp	w0, 1
-	bne	.L635
-	ldrb	w0, [x19, #:lo12:.LANCHOR58]
+	bne	.L607
+	ldrb	w0, [x19, #:lo12:.LANCHOR57]
 	sub	w0, w0, #1
-	strb	w0, [x19, #:lo12:.LANCHOR58]
+	strb	w0, [x19, #:lo12:.LANCHOR57]
 	ldrb	w0, [x20, 2]
 	orr	w0, w0, 1
 	strb	w0, [x20, 2]
-.L635:
+.L607:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -3514,46 +3496,46 @@ buf_remove_free:
 	.type	dump_buf_info, %function
 dump_buf_info:
 	sub	sp, sp, #64
-	adrp	x0, .LANCHOR60
+	adrp	x0, .LANCHOR59
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
-	ldrb	w1, [x0, #:lo12:.LANCHOR60]
+	ldrb	w1, [x0, #:lo12:.LANCHOR59]
 	stp	x19, x20, [sp, 32]
 	adrp	x0, .LC41
 	str	x21, [sp, 48]
 	add	x0, x0, :lo12:.LC41
-	adrp	x19, .LANCHOR56
-	add	x19, x19, :lo12:.LANCHOR56
+	adrp	x19, .LANCHOR55
+	add	x19, x19, :lo12:.LANCHOR55
 	bl	printf
 	adrp	x20, .LC47
-	adrp	x0, .LANCHOR63
+	adrp	x0, .LANCHOR62
 	add	x20, x20, :lo12:.LC47
 	add	x21, x19, 1024
-	ldrb	w1, [x0, #:lo12:.LANCHOR63]
+	ldrb	w1, [x0, #:lo12:.LANCHOR62]
 	adrp	x0, .LC42
 	add	x0, x0, :lo12:.LC42
 	bl	printf
-	adrp	x0, .LANCHOR64
-	ldrb	w1, [x0, #:lo12:.LANCHOR64]
+	adrp	x0, .LANCHOR63
+	ldrb	w1, [x0, #:lo12:.LANCHOR63]
 	adrp	x0, .LC43
 	add	x0, x0, :lo12:.LC43
 	bl	printf
-	adrp	x0, .LANCHOR65
-	ldrb	w1, [x0, #:lo12:.LANCHOR65]
+	adrp	x0, .LANCHOR64
+	ldrb	w1, [x0, #:lo12:.LANCHOR64]
 	adrp	x0, .LC44
 	add	x0, x0, :lo12:.LC44
 	bl	printf
-	adrp	x0, .LANCHOR57
-	ldrb	w1, [x0, #:lo12:.LANCHOR57]
+	adrp	x0, .LANCHOR56
+	ldrb	w1, [x0, #:lo12:.LANCHOR56]
 	adrp	x0, .LC45
 	add	x0, x0, :lo12:.LC45
 	bl	printf
-	adrp	x0, .LANCHOR58
-	ldrb	w1, [x0, #:lo12:.LANCHOR58]
+	adrp	x0, .LANCHOR57
+	ldrb	w1, [x0, #:lo12:.LANCHOR57]
 	adrp	x0, .LC46
 	add	x0, x0, :lo12:.LC46
 	bl	printf
-.L642:
+.L614:
 	ldp	w7, w0, [x19, 36]
 	str	w0, [sp]
 	ldrb	w5, [x19, 58]
@@ -3566,7 +3548,7 @@ dump_buf_info:
 	ldr	w6, [x19, -12]
 	bl	printf
 	cmp	x19, x21
-	bne	.L642
+	bne	.L614
 	ldp	x19, x20, [sp, 32]
 	ldp	x29, x30, [sp, 16]
 	ldr	x21, [sp, 48]
@@ -3578,8 +3560,8 @@ dump_buf_info:
 	.global	flash_check_bad_block
 	.type	flash_check_bad_block, %function
 flash_check_bad_block:
-	adrp	x3, .LANCHOR33
-	add	x3, x3, :lo12:.LANCHOR33
+	adrp	x3, .LANCHOR32
+	add	x3, x3, :lo12:.LANCHOR32
 	and	w5, w0, 255
 	lsr	w4, w1, 5
 	ldrb	w0, [x3, 13]
@@ -3591,8 +3573,8 @@ flash_check_bad_block:
 	asr	w2, w2, 5
 	lsl	w2, w2, 2
 	umaddl	x0, w2, w5, x0
-	adrp	x2, .LANCHOR27
-	ldr	x2, [x2, #:lo12:.LANCHOR27]
+	adrp	x2, .LANCHOR6
+	ldr	x2, [x2, #:lo12:.LANCHOR6]
 	add	x0, x0, x4, uxtw 2
 	ldr	w0, [x2, x0]
 	lsr	w0, w0, w1
@@ -3609,8 +3591,8 @@ flash_mask_bad_block:
 	add	x29, sp, 0
 	str	x21, [sp, 32]
 	and	w21, w0, 255
-	adrp	x0, .LANCHOR33
-	add	x0, x0, :lo12:.LANCHOR33
+	adrp	x0, .LANCHOR32
+	add	x0, x0, :lo12:.LANCHOR32
 	stp	x19, x20, [sp, 16]
 	mov	w20, w1
 	ldrh	w19, [x0, 14]
@@ -3630,8 +3612,8 @@ flash_mask_bad_block:
 	umaddl	x1, w1, w21, x19
 	ldr	x21, [sp, 32]
 	add	x1, x1, x0, uxtw 2
-	adrp	x0, .LANCHOR27
-	ldr	x3, [x0, #:lo12:.LANCHOR27]
+	adrp	x0, .LANCHOR6
+	ldr	x3, [x0, #:lo12:.LANCHOR6]
 	lsl	w0, w2, w20
 	ldp	x19, x20, [sp, 16]
 	ldr	w2, [x3, x1]
@@ -3651,15 +3633,15 @@ ftl_gc_write_buf:
 	orr	w1, w1, 2
 	strb	w1, [x0, 2]
 	mov	x1, x0
-	adrp	x0, .LANCHOR66
-	add	x0, x0, :lo12:.LANCHOR66
+	adrp	x0, .LANCHOR65
+	add	x0, x0, :lo12:.LANCHOR65
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR67
+	adrp	x1, .LANCHOR66
 	ldp	x29, x30, [sp], 16
-	ldrb	w0, [x1, #:lo12:.LANCHOR67]
+	ldrb	w0, [x1, #:lo12:.LANCHOR66]
 	add	w0, w0, 1
 	and	w0, w0, 255
-	strb	w0, [x1, #:lo12:.LANCHOR67]
+	strb	w0, [x1, #:lo12:.LANCHOR66]
 	ret
 	.size	ftl_gc_write_buf, .-ftl_gc_write_buf
 	.section	.text.zftl_cache_flush,"ax",@progbits
@@ -3674,11 +3656,11 @@ zftl_cache_flush:
 	.global	zftl_get_density
 	.type	zftl_get_density, %function
 zftl_get_density:
-	cbnz	w0, .L652
-	adrp	x0, .LANCHOR68
-	ldr	w0, [x0, #:lo12:.LANCHOR68]
+	cbnz	w0, .L624
+	adrp	x0, .LANCHOR67
+	ldr	w0, [x0, #:lo12:.LANCHOR67]
 	ret
-.L652:
+.L624:
 	cmp	w0, 4
 	cset	w0, cc
 	lsl	w0, w0, 13
@@ -3710,8 +3692,8 @@ ftl_scan_all_data:
 	.global	FtlGetCurEraseBlock
 	.type	FtlGetCurEraseBlock, %function
 FtlGetCurEraseBlock:
-	adrp	x0, .LANCHOR69
-	ldrh	w0, [x0, #:lo12:.LANCHOR69]
+	adrp	x0, .LANCHOR68
+	ldrh	w0, [x0, #:lo12:.LANCHOR68]
 	ret
 	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
 	.section	.text.FtlGetAllBlockNum,"ax",@progbits
@@ -3719,8 +3701,8 @@ FtlGetCurEraseBlock:
 	.global	FtlGetAllBlockNum
 	.type	FtlGetAllBlockNum, %function
 FtlGetAllBlockNum:
-	adrp	x0, .LANCHOR6
-	ldrh	w0, [x0, #:lo12:.LANCHOR6]
+	adrp	x0, .LANCHOR8
+	ldrh	w0, [x0, #:lo12:.LANCHOR8]
 	ret
 	.size	FtlGetAllBlockNum, .-FtlGetAllBlockNum
 	.section	.text.FtlLowFormat,"ax",@progbits
@@ -3739,116 +3721,116 @@ gc_add_sblk:
 	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR14
+	adrp	x21, .LANCHOR19
 	stp	x19, x20, [sp, 16]
 	and	w19, w0, 65535
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	ldr	w0, [x21, #:lo12:.LANCHOR19]
 	and	w22, w1, 65535
 	stp	x23, x24, [sp, 48]
 	and	w23, w2, 65535
-	tbz	x0, 8, .L662
-	adrp	x1, .LANCHOR9
+	tbz	x0, 8, .L634
+	adrp	x1, .LANCHOR11
 	uxtw	x0, w19
 	mov	w3, w23
-	ldr	x2, [x1, #:lo12:.LANCHOR9]
-	adrp	x1, .LANCHOR7
-	ldr	x1, [x1, #:lo12:.LANCHOR7]
+	ldr	x2, [x1, #:lo12:.LANCHOR11]
+	adrp	x1, .LANCHOR9
+	ldr	x1, [x1, #:lo12:.LANCHOR9]
 	ldrh	w5, [x2, x0, lsl 1]
 	mov	w2, w22
 	add	x1, x1, x0, lsl 2
 	adrp	x0, .LC49
 	add	x0, x0, :lo12:.LC49
 	ldrb	w4, [x1, 2]
-	adrp	x1, .LANCHOR70
-	ldrh	w7, [x1, #:lo12:.LANCHOR70]
-	adrp	x1, .LANCHOR71+56
+	adrp	x1, .LANCHOR69
+	ldrh	w7, [x1, #:lo12:.LANCHOR69]
+	adrp	x1, .LANCHOR70+56
 	ubfx	x4, x4, 5, 3
-	ldrh	w6, [x1, #:lo12:.LANCHOR71+56]
+	ldrh	w6, [x1, #:lo12:.LANCHOR70+56]
 	mov	w1, w19
 	bl	printf
-.L662:
-	adrp	x0, .LANCHOR6
+.L634:
+	adrp	x0, .LANCHOR8
 	mov	x20, x0
-	ldrh	w1, [x0, #:lo12:.LANCHOR6]
+	ldrh	w1, [x0, #:lo12:.LANCHOR8]
 	cmp	w1, w19
-	bhi	.L663
-	adrp	x1, .LANCHOR72
+	bhi	.L635
+	adrp	x1, .LANCHOR71
 	adrp	x0, .LC0
 	mov	w2, 543
-	add	x1, x1, :lo12:.LANCHOR72
+	add	x1, x1, :lo12:.LANCHOR71
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L663:
-	ldrh	w0, [x20, #:lo12:.LANCHOR6]
+.L635:
+	ldrh	w0, [x20, #:lo12:.LANCHOR8]
 	cmp	w0, w19
-	bhi	.L664
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L686
+	bhi	.L636
+	ldr	w0, [x21, #:lo12:.LANCHOR19]
+	tbz	x0, 10, .L658
 	adrp	x0, .LC50
 	mov	w3, w23
 	mov	w2, w22
 	mov	w1, w19
 	add	x0, x0, :lo12:.LC50
 	bl	printf
-.L686:
+.L658:
 	mov	w0, 0
-	b	.L661
-.L664:
-	adrp	x1, .LANCHOR9
+	b	.L633
+.L636:
+	adrp	x1, .LANCHOR11
 	uxtw	x0, w19
-	ldr	x1, [x1, #:lo12:.LANCHOR9]
+	ldr	x1, [x1, #:lo12:.LANCHOR11]
 	ldrh	w3, [x1, x0, lsl 1]
-	adrp	x1, .LANCHOR7
-	ldr	x1, [x1, #:lo12:.LANCHOR7]
+	adrp	x1, .LANCHOR9
+	ldr	x1, [x1, #:lo12:.LANCHOR9]
 	add	x0, x1, x0, lsl 2
 	ldrb	w2, [x0, 2]
 	tst	w2, 224
-	bne	.L666
-	cbz	w3, .L686
+	bne	.L638
+	cbz	w3, .L658
 	mov	w2, 553
-	adrp	x1, .LANCHOR72
+	adrp	x1, .LANCHOR71
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR72
+	add	x1, x1, :lo12:.LANCHOR71
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L686
-.L666:
-	adrp	x0, .LANCHOR71
-	add	x1, x0, :lo12:.LANCHOR71
-	ldrh	w0, [x0, #:lo12:.LANCHOR71]
+	b	.L658
+.L638:
+	adrp	x0, .LANCHOR70
+	add	x1, x0, :lo12:.LANCHOR70
+	ldrh	w0, [x0, #:lo12:.LANCHOR70]
 	cmp	w0, w19
-	beq	.L686
-	adrp	x24, .LANCHOR10
-	ldr	x0, [x24, #:lo12:.LANCHOR10]
+	beq	.L658
+	adrp	x24, .LANCHOR12
+	ldr	x0, [x24, #:lo12:.LANCHOR12]
 	ldrh	w4, [x0, 48]
 	cmp	w4, w19
-	beq	.L686
+	beq	.L658
 	ldrh	w4, [x0, 16]
 	cmp	w4, w19
-	beq	.L686
+	beq	.L658
 	ldrh	w4, [x0, 80]
 	cmp	w4, w19
-	beq	.L686
+	beq	.L658
 	ldrh	w5, [x1, 56]
 	add	x1, x1, 58
 	mov	w4, 0
-.L667:
+.L639:
 	cmp	w4, w5
-	bcc	.L668
-	cbnz	w22, .L672
-	adrp	x1, .LANCHOR73
-	ldrh	w6, [x1, #:lo12:.LANCHOR73]
+	bcc	.L640
+	cbnz	w22, .L644
+	adrp	x1, .LANCHOR72
+	ldrh	w6, [x1, #:lo12:.LANCHOR72]
 	cmp	w19, w6
-	beq	.L686
-	adrp	x4, .LANCHOR74
-	add	x4, x4, :lo12:.LANCHOR74
+	beq	.L658
+	adrp	x4, .LANCHOR73
+	add	x4, x4, :lo12:.LANCHOR73
 	mov	x1, 0
-.L671:
+.L643:
 	ldrh	w7, [x1, x4]
 	cmp	w19, w7
-	bne	.L670
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L686
+	bne	.L642
+	ldr	w0, [x21, #:lo12:.LANCHOR19]
+	tbz	x0, 8, .L658
 	mov	w5, w6
 	mov	w4, w19
 	ubfx	x2, x2, 5, 3
@@ -3856,69 +3838,69 @@ gc_add_sblk:
 	adrp	x0, .LC51
 	add	x0, x0, :lo12:.LC51
 	bl	printf
-	b	.L686
-.L668:
+	b	.L658
+.L640:
 	ldrh	w6, [x1], 2
 	cmp	w6, w19
-	beq	.L686
+	beq	.L658
 	add	w4, w4, 1
-	b	.L667
-.L670:
+	b	.L639
+.L642:
 	add	x1, x1, 2
 	cmp	x1, 16
-	bne	.L671
+	bne	.L643
 	ubfiz	x20, x23, 7, 16
 	add	x20, x20, 136
 	add	x20, x0, x20
-.L673:
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L674
-	adrp	x0, .LANCHOR70
+.L645:
+	ldr	w0, [x21, #:lo12:.LANCHOR19]
+	tbz	x0, 8, .L646
+	adrp	x0, .LANCHOR69
 	mov	w4, w3
 	mov	w1, w19
 	ubfx	x3, x2, 5, 3
-	ldrh	w6, [x0, #:lo12:.LANCHOR70]
+	ldrh	w6, [x0, #:lo12:.LANCHOR69]
 	mov	w2, w22
 	adrp	x0, .LC52
 	add	x0, x0, :lo12:.LC52
 	bl	printf
-.L674:
+.L646:
 	mov	x0, x20
 	add	x1, x20, 128
 	mov	w2, 65535
-.L677:
+.L649:
 	ldrh	w3, [x0]
 	cmp	w3, w2
-	bne	.L675
+	bne	.L647
 	strh	w19, [x0]
-	cbz	w22, .L676
-	ldr	x1, [x24, #:lo12:.LANCHOR10]
+	cbz	w22, .L648
+	ldr	x1, [x24, #:lo12:.LANCHOR12]
 	ldrh	w0, [x1, 124]
 	add	w0, w0, 1
 	strh	w0, [x1, 124]
-.L696:
+.L668:
 	mov	w0, 1
-.L661:
+.L633:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L672:
+.L644:
 	add	x20, x0, 392
-	b	.L673
-.L676:
-	ldr	x0, [x24, #:lo12:.LANCHOR10]
+	b	.L645
+.L648:
+	ldr	x0, [x24, #:lo12:.LANCHOR12]
 	add	x23, x0, x23, uxth 1
 	ldrh	w0, [x23, 120]
 	add	w0, w0, 1
 	strh	w0, [x23, 120]
-	b	.L696
-.L675:
+	b	.L668
+.L647:
 	add	x0, x0, 2
 	cmp	x1, x0
-	bne	.L677
-	b	.L696
+	bne	.L649
+	b	.L668
 	.size	gc_add_sblk, .-gc_add_sblk
 	.section	.text.gc_mark_bad_ppa,"ax",@progbits
 	.align	2
@@ -3926,32 +3908,32 @@ gc_add_sblk:
 	.type	gc_mark_bad_ppa, %function
 gc_mark_bad_ppa:
 	stp	x29, x30, [sp, -64]!
-	adrp	x1, .LANCHOR75
-	adrp	x3, .LANCHOR32
+	adrp	x1, .LANCHOR74
+	adrp	x3, .LANCHOR31
 	add	x29, sp, 0
-	ldrh	w1, [x1, #:lo12:.LANCHOR75]
-	ldrb	w3, [x3, #:lo12:.LANCHOR32]
+	ldrh	w1, [x1, #:lo12:.LANCHOR74]
+	ldrb	w3, [x3, #:lo12:.LANCHOR31]
 	stp	x19, x20, [sp, 16]
 	mov	w19, 24
 	sub	w19, w19, w3
 	lsr	w2, w0, w1
 	sub	w19, w19, w1
-	adrp	x1, .LANCHOR76
+	adrp	x1, .LANCHOR75
 	str	x23, [sp, 48]
 	mov	w23, 1
-	ldrb	w1, [x1, #:lo12:.LANCHOR76]
+	ldrb	w1, [x1, #:lo12:.LANCHOR75]
 	lsl	w19, w23, w19
 	sub	w19, w19, #1
 	stp	x21, x22, [sp, 32]
 	and	w19, w19, w2
-	adrp	x20, .LANCHOR71
-	add	x21, x20, :lo12:.LANCHOR71
+	adrp	x20, .LANCHOR70
+	add	x21, x20, :lo12:.LANCHOR70
 	mov	w3, w0
 	and	w22, w2, 65535
 	adrp	x0, .LC53
 	udiv	w19, w19, w1
 	mov	w2, w22
-	ldr	w1, [x21, 2120]
+	ldr	w1, [x21, 2200]
 	add	x0, x0, :lo12:.LC53
 	and	w19, w19, 65535
 	bl	printf
@@ -3959,42 +3941,42 @@ gc_mark_bad_ppa:
 	mov	w2, 0
 	mov	w0, w19
 	bl	gc_add_sblk
-	ldr	w0, [x21, 2120]
+	ldr	w0, [x21, 2200]
 	mov	w1, 0
-.L698:
+.L670:
 	cmp	w1, w0
-	bcc	.L700
+	bcc	.L672
 	cmp	w0, 5
-	bhi	.L699
-	add	x20, x20, :lo12:.LANCHOR71
+	bhi	.L671
+	add	x20, x20, :lo12:.LANCHOR70
 	add	w1, w0, 1
-	str	w1, [x20, 2120]
+	str	w1, [x20, 2200]
 	add	x20, x20, x0, uxtw 1
-	strh	w22, [x20, 2124]
-.L699:
+	strh	w22, [x20, 2204]
+.L671:
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L700:
+.L672:
 	add	x2, x21, x1, sxtw 1
-	ldrh	w2, [x2, 2124]
+	ldrh	w2, [x2, 2204]
 	cmp	w2, w22
-	beq	.L699
+	beq	.L671
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L698
+	b	.L670
 	.size	gc_mark_bad_ppa, .-gc_mark_bad_ppa
 	.section	.text.gc_get_src_ppa_from_index,"ax",@progbits
 	.align	2
 	.global	gc_get_src_ppa_from_index
 	.type	gc_get_src_ppa_from_index, %function
 gc_get_src_ppa_from_index:
-	adrp	x1, .LANCHOR77
+	adrp	x1, .LANCHOR76
 	ubfiz	x0, x0, 2, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR77]
+	ldr	x1, [x1, #:lo12:.LANCHOR76]
 	ldr	w0, [x1, x0]
 	ret
 	.size	gc_get_src_ppa_from_index, .-gc_get_src_ppa_from_index
@@ -4006,18 +3988,18 @@ gc_write_completed:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR64
+	adrp	x22, .LANCHOR63
 	stp	x23, x24, [sp, 48]
-	add	x22, x22, :lo12:.LANCHOR64
+	add	x22, x22, :lo12:.LANCHOR63
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LANCHOR56
-	add	x25, x23, :lo12:.LANCHOR56
+	adrp	x23, .LANCHOR55
+	add	x25, x23, :lo12:.LANCHOR55
 	stp	x19, x20, [sp, 16]
 	str	x27, [sp, 80]
-.L704:
+.L676:
 	ldrb	w0, [x22]
 	cmp	w0, 255
-	bne	.L717
+	bne	.L689
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -4025,130 +4007,130 @@ gc_write_completed:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L717:
+.L689:
 	sxtw	x20, w0
-	add	x1, x23, :lo12:.LANCHOR56
+	add	x1, x23, :lo12:.LANCHOR55
 	lsl	x3, x20, 6
 	add	x2, x1, x3
 	ldrb	w0, [x1, x3]
 	ldr	w1, [x2, 52]
 	strb	w0, [x22]
 	ldrh	w24, [x2, 48]
-	cbz	w1, .L705
+	cbz	w1, .L677
 	ldr	w2, [x2, 40]
-	adrp	x0, .LANCHOR71
-	add	x0, x0, :lo12:.LANCHOR71
+	adrp	x0, .LANCHOR70
+	add	x0, x0, :lo12:.LANCHOR70
 	mov	w3, 1
-	str	w2, [x0, 2116]
-	strh	w3, [x0, 2112]
+	str	w2, [x0, 2196]
+	strh	w3, [x0, 2194]
 	adrp	x0, .LC54
 	add	x0, x0, :lo12:.LC54
 	bl	printf
-	adrp	x1, .LANCHOR78
+	adrp	x1, .LANCHOR77
 	adrp	x0, .LC0
 	mov	w2, 956
-	add	x1, x1, :lo12:.LANCHOR78
+	add	x1, x1, :lo12:.LANCHOR77
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L705:
-	adrp	x0, .LANCHOR79
+.L677:
+	adrp	x0, .LANCHOR78
 	mov	x26, x0
-	ldrb	w1, [x0, #:lo12:.LANCHOR79]
+	ldrb	w1, [x0, #:lo12:.LANCHOR78]
 	cmp	w1, 3
-	bne	.L706
-	adrp	x0, .LANCHOR36
-	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbnz	w0, .L706
-	adrp	x0, .LANCHOR10
-	adrp	x1, .LANCHOR80
-	ldr	x0, [x0, #:lo12:.LANCHOR10]
-	ldrb	w1, [x1, #:lo12:.LANCHOR80]
+	bne	.L678
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbnz	w0, .L678
+	adrp	x0, .LANCHOR12
+	adrp	x1, .LANCHOR79
+	ldr	x0, [x0, #:lo12:.LANCHOR12]
+	ldrb	w1, [x1, #:lo12:.LANCHOR79]
 	ldrb	w0, [x0, 89]
 	mov	w19, w0
 	cmp	w1, w0
-	bhi	.L718
+	bhi	.L690
 	cmp	w0, 2
 	mov	w0, 2
 	csel	w19, w19, w0, ls
-.L707:
+.L679:
 	add	w19, w19, w19, lsl 1
-.L708:
-	adrp	x1, .LANCHOR83
+.L680:
+	adrp	x1, .LANCHOR82
 	and	x21, x24, 65535
 	add	x0, x25, x20, lsl 6
 	mov	x27, x1
-	ldr	x2, [x1, #:lo12:.LANCHOR83]
+	ldr	x2, [x1, #:lo12:.LANCHOR82]
 	ldrb	w0, [x0, 1]
 	ldrb	w2, [x2, x21]
 	cmp	w2, w0
-	beq	.L709
-	adrp	x1, .LANCHOR78
+	beq	.L681
+	adrp	x1, .LANCHOR77
 	adrp	x0, .LC0
 	mov	w2, 976
-	add	x1, x1, :lo12:.LANCHOR78
+	add	x1, x1, :lo12:.LANCHOR77
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L709:
+.L681:
 	add	x0, x25, x20, lsl 6
 	ldrb	w0, [x0, 61]
 	cmp	w0, 3
-	beq	.L710
-	ldrb	w0, [x26, #:lo12:.LANCHOR79]
+	beq	.L682
+	ldrb	w0, [x26, #:lo12:.LANCHOR78]
 	cmp	w0, 3
-	bne	.L710
-	adrp	x0, .LANCHOR84
-	ldrb	w0, [x0, #:lo12:.LANCHOR84]
-	cbnz	w0, .L710
+	bne	.L682
+	adrp	x0, .LANCHOR83
+	ldrb	w0, [x0, #:lo12:.LANCHOR83]
+	cbnz	w0, .L682
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbnz	w0, .L682
 	adrp	x0, .LANCHOR36
 	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbnz	w0, .L710
-	adrp	x0, .LANCHOR37
-	ldrb	w0, [x0, #:lo12:.LANCHOR37]
-	cbnz	w0, .L710
+	cbnz	w0, .L682
+	adrp	x0, .LANCHOR80
+	ldrb	w0, [x0, #:lo12:.LANCHOR80]
+	cbz	w0, .L683
 	adrp	x0, .LANCHOR81
 	ldrb	w0, [x0, #:lo12:.LANCHOR81]
-	cbz	w0, .L711
-	adrp	x0, .LANCHOR82
-	ldrb	w0, [x0, #:lo12:.LANCHOR82]
-	cbnz	w0, .L710
-.L711:
-	ldr	x1, [x27, #:lo12:.LANCHOR83]
+	cbnz	w0, .L682
+.L683:
+	ldr	x1, [x27, #:lo12:.LANCHOR82]
 	mov	x0, 0
 	add	x21, x1, x21
-.L712:
+.L684:
 	cmp	w19, w0, uxth
-	bls	.L704
+	bls	.L676
 	ldrb	w1, [x21, x0]
 	add	x0, x0, 1
 	add	x1, x25, x1, lsl 6
 	strb	wzr, [x1, 61]
-	b	.L712
-.L718:
+	b	.L684
+.L690:
 	mov	w19, 1
-	b	.L707
-.L706:
+	b	.L679
+.L678:
+	adrp	x0, .LANCHOR80
+	ldrb	w0, [x0, #:lo12:.LANCHOR80]
+	cbz	w0, .L691
 	adrp	x0, .LANCHOR81
 	ldrb	w0, [x0, #:lo12:.LANCHOR81]
-	cbz	w0, .L719
-	adrp	x0, .LANCHOR82
-	ldrb	w0, [x0, #:lo12:.LANCHOR82]
 	cmp	w0, 0
 	cset	w19, ne
 	add	w19, w19, 1
-	b	.L708
-.L719:
+	b	.L680
+.L691:
 	mov	w19, 1
-	b	.L708
-.L710:
-	adrp	x20, .LANCHOR71
-	add	x20, x20, :lo12:.LANCHOR71
+	b	.L680
+.L682:
+	adrp	x20, .LANCHOR70
+	add	x20, x20, :lo12:.LANCHOR70
 	add	x19, x21, x19, uxth
 	strh	w24, [x20, 2108]
 	mov	w24, -1
-.L713:
+.L685:
 	cmp	x21, x19
-	beq	.L704
-	ldr	x1, [x27, #:lo12:.LANCHOR83]
+	beq	.L676
+	ldr	x1, [x27, #:lo12:.LANCHOR82]
 	ldrb	w0, [x1, x21]
 	strb	w24, [x1, x21]
 	add	x21, x21, 1
@@ -4161,56 +4143,56 @@ gc_write_completed:
 	ldrb	w0, [x20, 7]
 	sub	w0, w0, #1
 	strb	w0, [x20, 7]
-	b	.L713
+	b	.L685
 	.size	gc_write_completed, .-gc_write_completed
 	.section	.text.gc_get_src_blk,"ax",@progbits
 	.align	2
 	.global	gc_get_src_blk
 	.type	gc_get_src_blk, %function
 gc_get_src_blk:
-	adrp	x0, .LANCHOR10
-	ldr	x2, [x0, #:lo12:.LANCHOR10]
-	adrp	x0, .LANCHOR85
-	ldrb	w3, [x0, #:lo12:.LANCHOR85]
+	adrp	x0, .LANCHOR12
+	ldr	x2, [x0, #:lo12:.LANCHOR12]
+	adrp	x0, .LANCHOR84
+	ldrb	w3, [x0, #:lo12:.LANCHOR84]
 	ldrh	w0, [x2, 124]
-	cbz	w0, .L732
+	cbz	w0, .L704
 	add	x1, x2, 392
 	mov	w4, 1
-.L733:
+.L705:
 	add	x5, x1, 128
 	mov	w6, 65535
-.L737:
+.L709:
 	ldrh	w0, [x1]
 	cmp	w0, w6
-	beq	.L735
+	beq	.L707
 	mov	w5, -1
 	strh	w5, [x1]
-	cbz	w4, .L736
+	cbz	w4, .L708
 	ldrh	w1, [x2, 124]
 	sub	w1, w1, #1
 	strh	w1, [x2, 124]
 	ret
-.L732:
+.L704:
 	add	x0, x2, x3, sxtw 1
 	ldrh	w0, [x0, 120]
-	cbz	w0, .L738
+	cbz	w0, .L710
 	ubfiz	x1, x3, 7, 8
 	mov	w4, 0
 	add	x1, x1, 136
 	add	x1, x2, x1
-	b	.L733
-.L736:
+	b	.L705
+.L708:
 	add	x2, x2, x3, uxtb 1
 	ldrh	w1, [x2, 120]
 	sub	w1, w1, #1
 	strh	w1, [x2, 120]
 	ret
-.L735:
+.L707:
 	add	x1, x1, 2
 	cmp	x1, x5
-	bne	.L737
+	bne	.L709
 	ret
-.L738:
+.L710:
 	mov	w0, 65535
 	ret
 	.size	gc_get_src_blk, .-gc_get_src_blk
@@ -4222,781 +4204,897 @@ gc_free_temp_buf:
 	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR71
-	add	x0, x20, :lo12:.LANCHOR71
+	adrp	x20, .LANCHOR70
+	add	x0, x20, :lo12:.LANCHOR70
 	stp	x21, x22, [sp, 32]
 	ldrb	w1, [x0, 7]
-	cbz	w1, .L747
-	adrp	x1, .LANCHOR58
-	ldrb	w1, [x1, #:lo12:.LANCHOR58]
+	cbz	w1, .L719
+	adrp	x1, .LANCHOR57
+	ldrb	w1, [x1, #:lo12:.LANCHOR57]
 	cmp	w1, 1
-	bhi	.L747
+	bhi	.L719
 	ldrh	w19, [x0, 2108]
-	adrp	x2, .LANCHOR80
-	adrp	x0, .LANCHOR86
-	adrp	x21, .LANCHOR83
-	ldrb	w2, [x2, #:lo12:.LANCHOR80]
+	adrp	x2, .LANCHOR79
+	adrp	x0, .LANCHOR85
+	adrp	x21, .LANCHOR82
+	ldrb	w2, [x2, #:lo12:.LANCHOR79]
 	add	w1, w19, 24
-	ldrh	w0, [x0, #:lo12:.LANCHOR86]
-	ldr	x4, [x21, #:lo12:.LANCHOR83]
+	ldrh	w0, [x0, #:lo12:.LANCHOR85]
+	ldr	x4, [x21, #:lo12:.LANCHOR82]
 	mul	w0, w0, w2
 	cmp	w0, w1
 	csel	w1, w0, w1, ls
-	adrp	x0, .LANCHOR56
-	add	x0, x0, :lo12:.LANCHOR56
-.L742:
+	adrp	x0, .LANCHOR55
+	add	x0, x0, :lo12:.LANCHOR55
+.L714:
 	cmp	w19, w1
-	bcc	.L745
-.L747:
+	bcc	.L717
+.L719:
 	mov	w0, 0
-	b	.L740
-.L745:
+	b	.L712
+.L717:
 	uxtw	x22, w19
 	ldrb	w2, [x4, x22]
 	cmp	w2, 255
-	beq	.L743
+	beq	.L715
 	sbfiz	x3, x2, 6, 32
 	add	x3, x0, x3
 	ldrb	w3, [x3, 61]
-	cbnz	w3, .L743
+	cbnz	w3, .L715
 	ubfiz	x2, x2, 6, 8
 	add	x0, x0, x2
 	bl	zbuf_free
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L744
-	ldr	x0, [x21, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 8, .L716
+	ldr	x0, [x21, #:lo12:.LANCHOR82]
 	mov	w1, w19
 	ldrb	w2, [x0, x22]
 	adrp	x0, .LC55
 	add	x0, x0, :lo12:.LC55
 	bl	printf
-.L744:
-	ldr	x0, [x21, #:lo12:.LANCHOR83]
-	add	x20, x20, :lo12:.LANCHOR71
+.L716:
+	ldr	x0, [x21, #:lo12:.LANCHOR82]
+	add	x20, x20, :lo12:.LANCHOR70
 	mov	w1, -1
 	strb	w1, [x0, x22]
 	ldrb	w0, [x20, 7]
 	sub	w0, w0, #1
 	strb	w0, [x20, 7]
 	mov	w0, 1
-.L740:
+.L712:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L743:
+.L715:
 	add	w19, w19, 1
-	b	.L742
+	b	.L714
 	.size	gc_free_temp_buf, .-gc_free_temp_buf
+	.section	.text.get_ink_scaned_blk,"ax",@progbits
+	.align	2
+	.global	get_ink_scaned_blk
+	.type	get_ink_scaned_blk, %function
+get_ink_scaned_blk:
+	adrp	x1, .LANCHOR70
+	add	x1, x1, :lo12:.LANCHOR70
+	ldrh	w2, [x1, 2112]
+	cbz	w2, .L729
+	sub	w2, w2, #1
+	strh	w2, [x1, 2112]
+	add	x0, x1, x2, sxtw 1
+	ldrh	w0, [x0, 2114]
+	ret
+.L729:
+	mov	w0, 65535
+	ret
+	.size	get_ink_scaned_blk, .-get_ink_scaned_blk
 	.section	.text.print_gc_debug_info,"ax",@progbits
 	.align	2
 	.global	print_gc_debug_info
 	.type	print_gc_debug_info, %function
 print_gc_debug_info:
-	adrp	x2, .LANCHOR87
-	adrp	x1, .LANCHOR71
-	add	x0, x1, :lo12:.LANCHOR71
-	ldrh	w6, [x2, #:lo12:.LANCHOR87]
-	adrp	x2, .LANCHOR58
-	ldrh	w1, [x1, #:lo12:.LANCHOR71]
+	adrp	x2, .LANCHOR86
+	adrp	x1, .LANCHOR70
+	add	x0, x1, :lo12:.LANCHOR70
+	ldrh	w6, [x2, #:lo12:.LANCHOR86]
+	adrp	x2, .LANCHOR57
+	ldrh	w1, [x1, #:lo12:.LANCHOR70]
 	ldrb	w5, [x0, 7]
-	ldrb	w4, [x2, #:lo12:.LANCHOR58]
+	ldrb	w4, [x2, #:lo12:.LANCHOR57]
 	ldrh	w3, [x0, 2106]
 	ldrh	w2, [x0, 2]
 	adrp	x0, .LC56
 	add	x0, x0, :lo12:.LC56
 	b	printf
 	.size	print_gc_debug_info, .-print_gc_debug_info
-	.section	.text.zftl_get_gc_node,"ax",@progbits
+	.section	.text._list_pop_index_node,"ax",@progbits
 	.align	2
-	.global	zftl_get_gc_node
-	.type	zftl_get_gc_node, %function
-zftl_get_gc_node:
+	.global	_list_pop_index_node
+	.type	_list_pop_index_node, %function
+_list_pop_index_node:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	ldr	x20, [x0]
+	cbz	x20, .L737
+	adrp	x3, .LANCHOR4
+	and	w1, w1, 65535
+	mov	w4, 65535
+	mov	w5, 6
+	ldr	x19, [x3, #:lo12:.LANCHOR4]
+.L733:
+	cbnz	w1, .L734
+.L736:
+	sub	x19, x20, x19
+	mov	x1, -6148914691236517206
+	asr	x19, x19, 1
+	movk	x1, 0xaaab, lsl 0
+	mul	x19, x19, x1
+	and	w19, w19, 65535
+	mov	w1, w19
+	bl	_list_remove_node
+	mov	w0, -1
+	strh	w0, [x20]
+	strh	w0, [x20, 2]
+	mov	w0, w19
+.L731:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L734:
+	ldrh	w3, [x20]
+	cmp	w3, w4
+	beq	.L736
+	sub	w1, w1, #1
+	umaddl	x20, w3, w5, x19
+	and	w1, w1, 65535
+	b	.L733
+.L737:
+	mov	w0, 65535
+	b	.L731
+	.size	_list_pop_index_node, .-_list_pop_index_node
+	.section	.text._list_get_gc_head_node,"ax",@progbits
+	.align	2
+	.global	_list_get_gc_head_node
+	.type	_list_get_gc_head_node, %function
+_list_get_gc_head_node:
+	ldr	x0, [x0]
+	and	w1, w1, 65535
+	cbz	x0, .L744
+	adrp	x2, .LANCHOR4
+	mov	w3, 65535
+	mov	w4, 6
+	ldr	x2, [x2, #:lo12:.LANCHOR4]
+.L741:
+	cbz	w1, .L742
+	ldrh	w0, [x0]
+	cmp	w0, w3
+	bne	.L743
+	ret
+.L743:
+	sub	w1, w1, #1
+	umaddl	x0, w0, w4, x2
 	and	w1, w1, 65535
+	b	.L741
+.L744:
+	mov	w0, 65535
+	ret
+.L742:
+	sub	x0, x0, x2
+	mov	x1, -6148914691236517206
+	asr	x0, x0, 1
+	movk	x1, 0xaaab, lsl 0
+	mul	x0, x0, x1
 	and	w0, w0, 65535
-	cmp	w1, 5
-	bne	.L757
-	mov	w1, w0
-	adrp	x0, .LANCHOR88
-	ldr	x0, [x0, #:lo12:.LANCHOR88]
-.L759:
-	b	_list_get_gc_head_node.isra.2
-.L757:
-	cmp	w1, 2
-	bne	.L758
-	b	zftl_get_gc_node.part.10
-.L758:
-	mov	w1, w0
-	adrp	x0, .LANCHOR89
-	ldr	x0, [x0, #:lo12:.LANCHOR89]
-	b	.L759
-	.size	zftl_get_gc_node, .-zftl_get_gc_node
+	ret
+	.size	_list_get_gc_head_node, .-_list_get_gc_head_node
 	.section	.text.gc_search_src_blk,"ax",@progbits
 	.align	2
 	.global	gc_search_src_blk
 	.type	gc_search_src_blk, %function
 gc_search_src_blk:
-	stp	x29, x30, [sp, -160]!
+	stp	x29, x30, [sp, -176]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	and	w22, w0, 255
 	and	w0, w1, 255
 	stp	x19, x20, [sp, 16]
-	str	w0, [x29, 144]
-	adrp	x0, .LANCHOR10
+	str	w0, [x29, 160]
+	adrp	x0, .LANCHOR12
 	and	w19, w2, 255
 	stp	x23, x24, [sp, 48]
-	ldr	x2, [x0, #:lo12:.LANCHOR10]
+	ldr	x2, [x0, #:lo12:.LANCHOR12]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	add	x0, x2, x22, sxtw 1
 	ldrh	w21, [x0, 120]
-	cbz	w21, .L761
+	cbz	w21, .L747
 	mov	w0, w21
-.L760:
+.L746:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 160
+	ldp	x29, x30, [sp], 176
 	ret
-.L761:
-	adrp	x0, .LANCHOR71
-	add	x1, x0, :lo12:.LANCHOR71
+.L747:
+	adrp	x0, .LANCHOR70
+	add	x1, x0, :lo12:.LANCHOR70
 	ldrh	w1, [x1, 56]
 	cmp	w1, 1
-	bhi	.L763
-	adrp	x3, .LANCHOR90
-	strh	wzr, [x3, #:lo12:.LANCHOR90]
-	adrp	x3, .LANCHOR91
-	strh	wzr, [x3, #:lo12:.LANCHOR91]
-	adrp	x3, .LANCHOR92
-	strh	wzr, [x3, #:lo12:.LANCHOR92]
-.L763:
-	cbnz	w22, .L764
-	adrp	x26, .LANCHOR91
-	adrp	x25, .LANCHOR14
-	add	x23, x26, :lo12:.LANCHOR91
-	add	x25, x25, :lo12:.LANCHOR14
+	bhi	.L749
+	adrp	x3, .LANCHOR87
+	strh	wzr, [x3, #:lo12:.LANCHOR87]
+	adrp	x3, .LANCHOR88
+	strh	wzr, [x3, #:lo12:.LANCHOR88]
+	adrp	x3, .LANCHOR89
+	strh	wzr, [x3, #:lo12:.LANCHOR89]
+.L749:
+	cbnz	w22, .L750
+	adrp	x26, .LANCHOR88
+	adrp	x25, .LANCHOR90
+	add	x23, x26, :lo12:.LANCHOR88
+	add	x25, x25, :lo12:.LANCHOR90
 	mov	w24, 0
 	mov	w20, 0
-.L765:
+	mov	w27, 65535
+.L751:
 	cmp	w19, w20
-	blt	.L770
+	blt	.L756
 	ldrh	w6, [x23]
-	mov	w1, 3
-	mov	w0, w6
-	bl	zftl_get_gc_node
+	mov	x0, x25
+	mov	w1, w6
+	bl	_list_get_gc_head_node
 	add	w2, w6, 1
 	and	w2, w2, 65535
 	strh	w2, [x23]
 	and	w1, w0, 65535
-	mov	w0, 65535
-	mov	w27, w1
-	cmp	w1, w0
-	beq	.L766
-	ldr	w0, [x25]
-	adrp	x4, .LANCHOR9
-	uxtw	x28, w1
-	tbz	x0, 8, .L767
-	ldr	x0, [x4, #:lo12:.LANCHOR9]
-	str	x4, [x29, 136]
-	ldrh	w3, [x0, x28, lsl 1]
+	mov	w28, w1
+	cmp	w1, w27
+	beq	.L752
+	adrp	x0, .LANCHOR19
+	adrp	x6, .LANCHOR11
+	uxtw	x4, w1
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 8, .L753
+	ldr	x0, [x6, #:lo12:.LANCHOR11]
+	stp	x6, x4, [x29, 144]
+	ldrh	w3, [x0, x4, lsl 1]
 	adrp	x0, .LC57
 	add	x0, x0, :lo12:.LC57
 	bl	printf
-	ldr	x4, [x29, 136]
-.L767:
-	ldr	x0, [x4, #:lo12:.LANCHOR9]
-	ldrh	w1, [x0, x28, lsl 1]
-	adrp	x0, .LANCHOR70
-	ldrh	w0, [x0, #:lo12:.LANCHOR70]
+	ldp	x6, x4, [x29, 144]
+.L753:
+	ldr	x0, [x6, #:lo12:.LANCHOR11]
+	ldrh	w1, [x0, x4, lsl 1]
+	adrp	x0, .LANCHOR69
+	ldrh	w0, [x0, #:lo12:.LANCHOR69]
 	cmp	w1, w0
-	bcs	.L768
+	bcs	.L754
 	mov	w2, 0
 	mov	w1, 0
-	mov	w0, w27
+	mov	w0, w28
 	bl	gc_add_sblk
-	cbz	w0, .L769
+	cbz	w0, .L755
 	add	w5, w24, 1
 	and	w24, w5, 65535
 	cmp	w24, w19
-	bcc	.L769
-.L770:
-	ldr	x0, [x29, 144]
-	tbz	x0, 1, .L772
-	adrp	x0, .LANCHOR93
-	ldrh	w0, [x0, #:lo12:.LANCHOR93]
+	bcc	.L755
+.L756:
+	ldr	x0, [x29, 160]
+	tbz	x0, 1, .L758
+	adrp	x0, .LANCHOR91
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	cmp	w0, 32
-	bls	.L772
-	adrp	x23, .LANCHOR94
-	adrp	x20, .LANCHOR92
-	add	x27, x23, :lo12:.LANCHOR94
-	add	x20, x20, :lo12:.LANCHOR92
+	bls	.L758
+	adrp	x23, .LANCHOR93
+	adrp	x20, .LANCHOR89
+	adrp	x26, .LANCHOR92
+	add	x20, x20, :lo12:.LANCHOR89
+	add	x26, x26, :lo12:.LANCHOR92
+	add	x27, x23, :lo12:.LANCHOR93
 	mov	w25, 0
-	mov	w26, 65535
-.L773:
+.L759:
 	cmp	w19, w25
-	blt	.L777
+	blt	.L763
 	ldrh	w6, [x20]
-	mov	w1, 5
-	mov	w0, w6
-	bl	zftl_get_gc_node
+	mov	x0, x26
+	mov	w1, w6
+	bl	_list_get_gc_head_node
 	add	w6, w6, 1
 	strh	w6, [x20]
 	and	w1, w0, 65535
-	cmp	w1, w26
-	beq	.L774
-	adrp	x2, .LANCHOR9
+	mov	w2, 65535
+	cmp	w1, w2
+	beq	.L760
+	adrp	x2, .LANCHOR11
 	ubfiz	x1, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR9]
+	ldr	x2, [x2, #:lo12:.LANCHOR11]
 	ldrh	w2, [x2, x1]
 	ldrh	w1, [x27]
 	cmp	w2, w1
-	bcs	.L774
+	bcs	.L760
 	mov	w2, 0
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L776
+	cbz	w0, .L762
 	add	w5, w24, 1
 	and	w24, w5, 65535
 	cmp	w24, w19
-	bcc	.L776
-.L777:
+	bcc	.L762
+.L763:
 	cmp	w24, w19
-	adrp	x0, .LANCHOR95
-	bcs	.L779
-	ldrh	w1, [x0, #:lo12:.LANCHOR95]
-	adrp	x3, .LANCHOR80
-	adrp	x0, .LANCHOR86
-	ldrh	w2, [x23, #:lo12:.LANCHOR94]
-	ldrb	w3, [x3, #:lo12:.LANCHOR80]
-	ldrh	w0, [x0, #:lo12:.LANCHOR86]
+	adrp	x0, .LANCHOR94
+	bcs	.L765
+	ldrh	w1, [x0, #:lo12:.LANCHOR94]
+	adrp	x3, .LANCHOR79
+	adrp	x0, .LANCHOR85
+	ldrh	w2, [x23, #:lo12:.LANCHOR93]
+	ldrb	w3, [x3, #:lo12:.LANCHOR79]
+	ldrh	w0, [x0, #:lo12:.LANCHOR85]
 	mul	w0, w0, w3
 	sub	w0, w0, w1, lsr 2
 	cmp	w2, w0
-	bge	.L772
+	bge	.L758
 	add	w1, w2, w1, lsr 3
-	strh	w1, [x23, #:lo12:.LANCHOR94]
-.L772:
-	ldr	x0, [x29, 144]
-	tbz	x0, 0, .L780
+	strh	w1, [x23, #:lo12:.LANCHOR93]
+.L758:
+	ldr	x0, [x29, 160]
+	tbz	x0, 0, .L766
 	and	w23, w19, 65535
 	cmp	w24, w23
-	bcs	.L780
-	adrp	x20, .LANCHOR90
-	add	x20, x20, :lo12:.LANCHOR90
-	mov	w25, 65535
-.L785:
+	bcs	.L766
+	adrp	x20, .LANCHOR87
+	adrp	x25, .LANCHOR95
+	add	x20, x20, :lo12:.LANCHOR87
+	add	x25, x25, :lo12:.LANCHOR95
+	mov	w26, 65535
+.L771:
 	ldrh	w6, [x20]
-	mov	w0, w6
-	bl	zftl_get_gc_node.part.10
+	mov	x0, x25
+	mov	w1, w6
+	bl	_list_get_gc_head_node
 	add	w6, w6, 1
 	strh	w6, [x20]
-	cmp	w25, w0, uxth
-	beq	.L781
+	cmp	w26, w0, uxth
+	beq	.L767
 	mov	w2, 0
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L782
+	cbz	w0, .L768
 	add	w5, w24, 1
 	and	w24, w5, 65535
 	cmp	w23, w24
-	bhi	.L782
-.L783:
-	adrp	x0, .LANCHOR95
-	adrp	x1, .LANCHOR70
-	ldrh	w0, [x0, #:lo12:.LANCHOR95]
-	ldrh	w2, [x1, #:lo12:.LANCHOR70]
+	bhi	.L768
+.L769:
+	adrp	x0, .LANCHOR94
+	adrp	x1, .LANCHOR69
+	ldrh	w0, [x0, #:lo12:.LANCHOR94]
+	ldrh	w2, [x1, #:lo12:.LANCHOR69]
 	cmp	w2, w0, lsr 1
-	bls	.L780
+	bls	.L766
 	sub	w0, w2, w0, lsr 3
-	b	.L871
-.L768:
-	strh	wzr, [x26, #:lo12:.LANCHOR91]
-	b	.L770
-.L766:
+	b	.L857
+.L754:
+	strh	wzr, [x26, #:lo12:.LANCHOR88]
+	b	.L756
+.L752:
 	strh	wzr, [x23]
-	b	.L770
-.L769:
+	b	.L756
+.L755:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L765
-.L774:
+	b	.L751
+.L760:
 	strh	wzr, [x20]
-	b	.L777
-.L776:
+	b	.L763
+.L762:
 	add	w25, w25, 1
 	and	w25, w25, 65535
-	b	.L773
-.L779:
-	ldrh	w1, [x23, #:lo12:.LANCHOR94]
-	ldrh	w0, [x0, #:lo12:.LANCHOR95]
+	b	.L759
+.L765:
+	ldrh	w1, [x23, #:lo12:.LANCHOR93]
+	ldrh	w0, [x0, #:lo12:.LANCHOR94]
 	cmp	w1, w0
-	bls	.L772
+	bls	.L758
 	sub	w0, w1, w0, lsr 3
-	strh	w0, [x23, #:lo12:.LANCHOR94]
-	b	.L772
-.L781:
+	strh	w0, [x23, #:lo12:.LANCHOR93]
+	b	.L758
+.L767:
 	strh	wzr, [x20]
-.L784:
+.L770:
 	cmp	w24, w23
-	bcs	.L783
-	adrp	x1, .LANCHOR70
-	adrp	x0, .LANCHOR95
-	ldrh	w2, [x1, #:lo12:.LANCHOR70]
-	ldrh	w0, [x0, #:lo12:.LANCHOR95]
+	bcs	.L769
+	adrp	x1, .LANCHOR69
+	adrp	x0, .LANCHOR94
+	ldrh	w2, [x1, #:lo12:.LANCHOR69]
+	ldrh	w0, [x0, #:lo12:.LANCHOR94]
 	cmp	w2, w0
-	bcs	.L780
+	bcs	.L766
 	add	w0, w2, w0, lsr 3
-.L871:
-	strh	w0, [x1, #:lo12:.LANCHOR70]
-.L780:
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L816
-	ldr	w2, [x29, 144]
+.L857:
+	strh	w0, [x1, #:lo12:.LANCHOR69]
+.L766:
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 8, .L802
+	ldr	w2, [x29, 160]
 	adrp	x0, .LC58
 	mov	w4, w19
 	mov	w3, w24
 	mov	w1, w22
 	add	x0, x0, :lo12:.LC58
 	bl	printf
-.L816:
+.L802:
 	mov	w0, w24
-	b	.L760
-.L782:
+	b	.L746
+.L768:
 	add	w21, w21, 1
 	and	w21, w21, 65535
 	cmp	w23, w21
-	bhi	.L785
-	b	.L784
-.L764:
-	adrp	x23, .LANCHOR80
-	adrp	x25, .LANCHOR86
-	str	x23, [x29, 136]
+	bhi	.L771
+	b	.L770
+.L750:
+	adrp	x23, .LANCHOR79
+	adrp	x25, .LANCHOR85
+	stp	x25, x23, [x29, 144]
 	cmp	w19, 1
-	ldrb	w20, [x23, #:lo12:.LANCHOR80]
-	ldrh	w3, [x25, #:lo12:.LANCHOR86]
+	ldrb	w20, [x23, #:lo12:.LANCHOR79]
+	ldrh	w3, [x25, #:lo12:.LANCHOR85]
 	mul	w20, w20, w3
 	and	w20, w20, 65535
-	bne	.L786
-	cbz	w1, .L786
+	bne	.L772
+	cbz	w1, .L772
 	ldrh	w3, [x2, 80]
 	mov	w2, 65535
 	cmp	w3, w2
-	beq	.L819
-	add	x2, x0, :lo12:.LANCHOR71
+	beq	.L805
+	add	x2, x0, :lo12:.LANCHOR70
 	ldrh	w2, [x2, 2106]
 	sub	w20, w20, w2
 	and	w20, w20, 65535
-.L819:
+.L805:
 	mov	w19, 8
-.L786:
-	add	x0, x0, :lo12:.LANCHOR71
-	strh	wzr, [x0, 2110]
+.L772:
+	add	x0, x0, :lo12:.LANCHOR70
+	strh	wzr, [x0, 2192]
 	adrp	x0, .LANCHOR96
 	strh	wzr, [x0, #:lo12:.LANCHOR96]
-	ldr	w0, [x29, 144]
+	ldr	w0, [x29, 160]
 	and	w0, w0, 1
-	str	w0, [x29, 120]
-	ldr	x0, [x29, 144]
-	tbz	x0, 0, .L820
+	str	w0, [x29, 128]
+	ldr	x0, [x29, 160]
+	tbz	x0, 0, .L806
 	adrp	x2, .LANCHOR98
 	adrp	x26, .LANCHOR97
-	str	x2, [x29, 128]
+	str	x2, [x29, 120]
 	ldrh	w0, [x26, #:lo12:.LANCHOR97]
 	ldrh	w3, [x2, #:lo12:.LANCHOR98]
 	cmp	w0, w3, lsr 2
-	bhi	.L788
+	bhi	.L774
 	adrp	x2, .LANCHOR99
 	ldrh	w2, [x2, #:lo12:.LANCHOR99]
 	cmp	w2, w0
-	bcs	.L821
-.L788:
+	bcs	.L807
+.L774:
 	cmp	w1, 1
-	adrp	x28, .LANCHOR90
-	bls	.L790
-.L792:
+	adrp	x25, .LANCHOR87
+	adrp	x28, .LANCHOR95
+	bls	.L776
+.L778:
 	mov	w24, 0
-.L791:
-	add	x28, x28, :lo12:.LANCHOR90
-	adrp	x0, .LANCHOR99
+.L777:
+	add	x0, x28, :lo12:.LANCHOR95
+	add	x25, x25, :lo12:.LANCHOR87
+	adrp	x28, .LANCHOR99
+	add	x28, x28, :lo12:.LANCHOR99
 	mov	w23, 0
-	add	x0, x0, :lo12:.LANCHOR99
 	mov	w27, 64
-	str	x0, [x29, 112]
-.L795:
-	ldrh	w7, [x28]
-	mov	w0, w7
-	bl	zftl_get_gc_node.part.10
+	str	x0, [x29, 136]
+.L781:
+	ldrh	w7, [x25]
+	ldr	x0, [x29, 136]
+	mov	w1, w7
+	bl	_list_get_gc_head_node
 	and	w6, w0, 65535
-	str	w6, [x29, 104]
+	str	w6, [x29, 112]
 	mov	w1, 65535
 	cmp	w6, w1
-	beq	.L793
+	beq	.L779
 	add	w7, w7, 1
 	mov	w2, w22
-	strh	w7, [x28]
+	strh	w7, [x25]
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L794
-	adrp	x0, .LANCHOR9
-	ldr	w6, [x29, 104]
+	cbz	w0, .L780
+	adrp	x0, .LANCHOR11
+	ldr	w6, [x29, 112]
 	add	w5, w24, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	and	w24, w5, 65535
 	ubfiz	x6, x6, 1, 16
 	cmp	w24, w19
 	ldrh	w0, [x0, x6]
 	add	w3, w23, w0
 	and	w23, w3, 65535
-	bcs	.L789
+	bcs	.L775
 	cmp	w20, w23
-	bcc	.L789
-	ldr	x0, [x29, 112]
+	bcc	.L775
+	ldrh	w0, [x28]
 	ldrh	w1, [x26, #:lo12:.LANCHOR97]
-	ldrh	w0, [x0]
 	cmp	w0, w1, lsl 1
-	ble	.L794
-.L789:
+	ble	.L780
+.L775:
 	adrp	x0, .LANCHOR99
 	ldrh	w1, [x0, #:lo12:.LANCHOR99]
-	ldr	x0, [x29, 128]
+	ldr	x0, [x29, 120]
 	ldrh	w0, [x0, #:lo12:.LANCHOR98]
 	cmp	w1, w0, lsr 2
-	bhi	.L817
+	bhi	.L803
 	ldrh	w0, [x26, #:lo12:.LANCHOR97]
 	add	w0, w0, 8
 	cmp	w1, w0
-	ble	.L787
-.L817:
+	ble	.L773
+.L803:
 	cmp	w20, w23
-	bls	.L787
-	adrp	x4, .LANCHOR91
-	add	x28, x4, :lo12:.LANCHOR91
-	and	w0, w19, 65535
+	bls	.L773
+	adrp	x7, .LANCHOR88
+	and	w25, w19, 65535
+	add	x28, x7, :lo12:.LANCHOR88
+	adrp	x0, .LANCHOR90
 	mov	w26, 64
-	adrp	x27, .LANCHOR9
-	str	w0, [x29, 128]
-.L798:
+	add	x0, x0, :lo12:.LANCHOR90
+	adrp	x27, .LANCHOR11
+	str	x0, [x29, 136]
+.L784:
 	ldrh	w6, [x28]
-	mov	w1, 3
-	mov	w0, w6
-	bl	zftl_get_gc_node
-	and	w7, w0, 65535
-	str	w7, [x29, 112]
+	ldr	x0, [x29, 136]
+	mov	w1, w6
+	bl	_list_get_gc_head_node
+	and	w4, w0, 65535
+	str	w4, [x29, 120]
 	mov	w1, 65535
-	cmp	w7, w1
-	beq	.L796
+	cmp	w4, w1
+	beq	.L782
 	add	w6, w6, 1
 	mov	w2, w22
 	strh	w6, [x28]
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L797
-	ldr	w7, [x29, 112]
+	cbz	w0, .L783
+	ldr	w4, [x29, 120]
 	add	w5, w24, 1
-	ldr	x0, [x27, #:lo12:.LANCHOR9]
+	ldr	x0, [x27, #:lo12:.LANCHOR11]
 	and	w24, w5, 65535
-	ubfiz	x7, x7, 1, 16
-	ldrh	w0, [x0, x7]
+	cmp	w24, w25
+	ubfiz	x4, x4, 1, 16
+	ldrh	w0, [x0, x4]
 	add	w3, w23, w0
-	ldr	w0, [x29, 128]
 	and	w23, w3, 65535
-	cmp	w24, w0
-	bcs	.L787
+	bcs	.L773
 	cmp	w20, w23
-	bcs	.L797
-.L787:
-	ldr	x0, [x29, 144]
-	tbz	x0, 1, .L799
-	adrp	x0, .LANCHOR93
+	bcs	.L783
+.L773:
+	ldr	x0, [x29, 160]
+	tbz	x0, 1, .L785
+	adrp	x0, .LANCHOR91
 	str	x0, [x29, 112]
-	ldrh	w1, [x0, #:lo12:.LANCHOR93]
+	ldrh	w1, [x0, #:lo12:.LANCHOR91]
 	cmp	w1, 32
-	bls	.L799
+	bls	.L785
 	cmp	w23, w20
-	bcs	.L799
+	bcs	.L785
+	adrp	x25, .LANCHOR89
 	adrp	x0, .LANCHOR92
+	add	x28, x25, :lo12:.LANCHOR89
+	add	x0, x0, :lo12:.LANCHOR92
 	adrp	x27, .LANCHOR100
-	add	x28, x0, :lo12:.LANCHOR92
+	str	x0, [x29, 120]
 	mov	w26, 64
 	add	x0, x27, :lo12:.LANCHOR100
-	str	x0, [x29, 128]
-.L805:
+	str	x0, [x29, 136]
+.L791:
 	ldrh	w6, [x28]
-	mov	w1, 5
-	mov	w0, w6
-	bl	zftl_get_gc_node
+	ldr	x0, [x29, 120]
+	mov	w1, w6
+	bl	_list_get_gc_head_node
 	and	w8, w0, 65535
 	mov	w1, 65535
 	cmp	w8, w1
-	beq	.L800
+	beq	.L786
 	add	w6, w6, 1
 	strh	w6, [x28]
 	cmp	w19, 1
-	bne	.L801
-	ldr	x1, [x29, 136]
-	ldrh	w2, [x25, #:lo12:.LANCHOR86]
-	ldrb	w1, [x1, #:lo12:.LANCHOR80]
+	bne	.L787
+	ldp	x2, x1, [x29, 144]
+	ldrb	w1, [x1, #:lo12:.LANCHOR79]
+	ldrh	w2, [x2, #:lo12:.LANCHOR85]
 	mul	w2, w1, w2
-	adrp	x1, .LANCHOR95
-	ldrh	w1, [x1, #:lo12:.LANCHOR95]
+	adrp	x1, .LANCHOR94
+	ldrh	w1, [x1, #:lo12:.LANCHOR94]
 	sub	w1, w2, w1, lsr 3
-	ldr	x2, [x29, 128]
+	ldr	x2, [x29, 136]
 	strh	w1, [x2]
-.L801:
+.L787:
 	ubfiz	x6, x8, 1, 16
-	adrp	x8, .LANCHOR9
+	adrp	x8, .LANCHOR11
 	stp	x8, x6, [x29, 96]
-	ldr	x1, [x8, #:lo12:.LANCHOR9]
+	ldr	x1, [x8, #:lo12:.LANCHOR11]
 	ldrh	w2, [x1, x6]
-	ldr	x1, [x29, 128]
+	ldr	x1, [x29, 136]
 	ldrh	w1, [x1]
 	cmp	w2, w1
-	bcs	.L802
+	bcs	.L788
 	mov	w2, w22
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L803
+	cbz	w0, .L789
 	ldp	x8, x6, [x29, 96]
 	add	w5, w24, 1
 	add	w21, w21, 1
 	and	w24, w5, 65535
 	and	w21, w21, 65535
 	cmp	w24, w19
-	ldr	x0, [x8, #:lo12:.LANCHOR9]
+	ldr	x0, [x8, #:lo12:.LANCHOR11]
 	ldrh	w0, [x0, x6]
 	add	w3, w23, w0
 	and	w23, w3, 65535
-	bcs	.L804
+	bcs	.L790
 	cmp	w20, w23
-	bcs	.L803
-.L804:
+	bcs	.L789
+.L790:
 	cmp	w24, w19
-	adrp	x0, .LANCHOR95
-	bcc	.L806
-	cbnz	w21, .L807
+	adrp	x0, .LANCHOR94
+	bcc	.L792
+	cbnz	w21, .L793
 	ldr	x1, [x29, 112]
-	ldrh	w2, [x1, #:lo12:.LANCHOR93]
+	ldrh	w2, [x1, #:lo12:.LANCHOR91]
 	adrp	x1, .LANCHOR101
 	ldrh	w1, [x1, #:lo12:.LANCHOR101]
 	cmp	w2, w1
-	bls	.L807
-.L806:
-	ldr	x3, [x29, 136]
-	ldrh	w2, [x0, #:lo12:.LANCHOR95]
-	ldrh	w0, [x25, #:lo12:.LANCHOR86]
+	bls	.L793
+.L792:
+	ldrh	w2, [x0, #:lo12:.LANCHOR94]
+	ldp	x0, x3, [x29, 144]
 	ldrh	w1, [x27, #:lo12:.LANCHOR100]
-	ldrb	w6, [x3, #:lo12:.LANCHOR80]
 	lsr	w2, w2, 3
+	ldrh	w0, [x0, #:lo12:.LANCHOR85]
+	ldrb	w6, [x3, #:lo12:.LANCHOR79]
 	mul	w0, w0, w6
 	sub	w0, w0, w2
 	cmp	w1, w0
-	bge	.L799
+	bge	.L785
 	add	w1, w1, w2
 	strh	w1, [x27, #:lo12:.LANCHOR100]
-.L799:
-	ldr	w0, [x29, 120]
-	cbz	w0, .L780
-	and	w26, w19, 65535
-	cmp	w24, w26
-	bcs	.L780
+.L785:
+	ldr	w0, [x29, 128]
+	cbz	w0, .L766
+	and	w27, w19, 65535
+	cmp	w24, w27
+	bcs	.L766
 	cmp	w23, w20
-	bcs	.L780
-	adrp	x21, .LANCHOR91
-	add	x21, x21, :lo12:.LANCHOR91
-	adrp	x28, .LANCHOR102
+	bcs	.L766
+	adrp	x26, .LANCHOR90
+	adrp	x4, .LANCHOR88
+	add	x0, x26, :lo12:.LANCHOR90
+	add	x28, x4, :lo12:.LANCHOR88
+	adrp	x21, .LANCHOR102
+	str	x0, [x29, 144]
 	mov	w25, 64
-	add	x0, x28, :lo12:.LANCHOR102
-	adrp	x27, .LANCHOR9
-	str	x0, [x29, 128]
-.L815:
-	ldrh	w6, [x21]
-	mov	w1, 3
-	mov	w0, w6
-	bl	zftl_get_gc_node
-	and	w4, w0, 65535
-	mov	w1, 65535
-	cmp	w4, w1
-	beq	.L809
-	ldr	x1, [x27, #:lo12:.LANCHOR9]
-	ubfiz	x4, x4, 1, 16
+	add	x0, x21, :lo12:.LANCHOR102
+	adrp	x26, .LANCHOR11
+	str	x0, [x29, 136]
+.L801:
+	ldrh	w6, [x28]
+	ldr	x0, [x29, 144]
+	mov	w1, w6
+	bl	_list_get_gc_head_node
+	and	w1, w0, 65535
+	mov	w2, 65535
+	cmp	w1, w2
+	beq	.L795
 	add	w6, w6, 1
-	strh	w6, [x21]
-	ldrh	w2, [x1, x4]
-	ldr	x1, [x29, 128]
+	strh	w6, [x28]
+	ubfiz	x6, x1, 1, 16
+	ldr	x1, [x26, #:lo12:.LANCHOR11]
+	ldrh	w2, [x1, x6]
+	ldr	x1, [x29, 136]
 	ldrh	w1, [x1]
 	cmp	w2, w1
-	bcs	.L810
+	bcs	.L796
 	adrp	x1, .LANCHOR98
 	ldrh	w2, [x1, #:lo12:.LANCHOR98]
 	adrp	x1, .LANCHOR99
 	ldrh	w1, [x1, #:lo12:.LANCHOR99]
 	cmp	w1, w2, lsr 1
-	bls	.L811
-.L810:
+	bls	.L797
+.L796:
 	mov	w2, w22
 	mov	w1, 0
-	str	x4, [x29, 120]
+	str	x6, [x29, 128]
 	bl	gc_add_sblk
-	cbz	w0, .L812
-	adrp	x0, .LANCHOR9
-	ldr	x4, [x29, 120]
+	cbz	w0, .L798
+	adrp	x0, .LANCHOR11
+	ldr	x6, [x29, 128]
 	add	w5, w24, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	and	w24, w5, 65535
-	cmp	w26, w24
-	ldrh	w0, [x0, x4]
+	cmp	w27, w24
+	ldrh	w0, [x0, x6]
 	add	w3, w23, w0
 	and	w23, w3, 65535
-	bls	.L813
+	bls	.L799
 	cmp	w20, w23
-	bcs	.L812
-.L814:
-	adrp	x0, .LANCHOR95
-	ldrh	w1, [x28, #:lo12:.LANCHOR102]
-	ldrh	w0, [x0, #:lo12:.LANCHOR95]
+	bcs	.L798
+.L800:
+	adrp	x0, .LANCHOR94
+	ldrh	w1, [x21, #:lo12:.LANCHOR102]
+	ldrh	w0, [x0, #:lo12:.LANCHOR94]
 	cmp	w1, w0, lsr 1
-	bls	.L780
+	bls	.L766
 	sub	w0, w1, w0, lsr 3
-	strh	w0, [x28, #:lo12:.LANCHOR102]
-	b	.L780
-.L790:
+	strh	w0, [x21, #:lo12:.LANCHOR102]
+	b	.L766
+.L776:
 	lsr	w0, w0, 2
-	strh	w0, [x28, #:lo12:.LANCHOR90]
-	mov	w0, 0
-	bl	zftl_get_gc_node.part.10
+	mov	w1, 0
+	strh	w0, [x25, #:lo12:.LANCHOR87]
+	add	x0, x28, :lo12:.LANCHOR95
+	bl	_list_get_gc_head_node
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L792
-	adrp	x2, .LANCHOR9
+	beq	.L778
+	adrp	x2, .LANCHOR11
 	ubfiz	x1, x1, 1, 16
-	ldr	x3, [x2, #:lo12:.LANCHOR9]
-	adrp	x2, .LANCHOR95
-	ldrh	w2, [x2, #:lo12:.LANCHOR95]
+	ldr	x3, [x2, #:lo12:.LANCHOR11]
+	adrp	x2, .LANCHOR94
+	ldrh	w2, [x2, #:lo12:.LANCHOR94]
 	ldrh	w1, [x3, x1]
 	cmp	w1, w2, lsr 2
-	bcs	.L792
+	bcs	.L778
 	mov	w1, 1
 	mov	w2, w22
-	strh	w1, [x28, #:lo12:.LANCHOR90]
+	strh	w1, [x25, #:lo12:.LANCHOR87]
 	mov	w1, 0
 	bl	gc_add_sblk
 	cmp	w0, 0
 	cset	w24, ne
-	b	.L791
-.L793:
-	strh	wzr, [x28]
-	b	.L789
-.L794:
+	b	.L777
+.L779:
+	strh	wzr, [x25]
+	b	.L775
+.L780:
 	sub	w27, w27, #1
 	ands	w27, w27, 65535
-	bne	.L795
-	b	.L789
-.L796:
+	bne	.L781
+	b	.L775
+.L782:
 	cmp	w6, 64
-	bls	.L787
+	bls	.L773
 	strh	wzr, [x28]
-	b	.L787
-.L797:
+	b	.L773
+.L783:
 	sub	w26, w26, #1
 	ands	w26, w26, 65535
-	bne	.L798
-	b	.L787
-.L820:
+	bne	.L784
+	b	.L773
+.L806:
 	mov	w23, 0
 	mov	w24, 0
-	b	.L787
-.L802:
-	adrp	x0, .LANCHOR92
-	strh	wzr, [x0, #:lo12:.LANCHOR92]
-	b	.L804
-.L800:
+	b	.L773
+.L788:
+	strh	wzr, [x25, #:lo12:.LANCHOR89]
+	b	.L790
+.L786:
 	strh	wzr, [x28]
-	b	.L804
-.L803:
+	b	.L790
+.L789:
 	sub	w26, w26, #1
 	ands	w26, w26, 65535
-	bne	.L805
-	b	.L804
-.L807:
-	ldr	x1, [x29, 136]
-	ldrh	w0, [x0, #:lo12:.LANCHOR95]
+	bne	.L791
+	b	.L790
+.L793:
+	ldr	x1, [x29, 152]
+	ldrh	w0, [x0, #:lo12:.LANCHOR94]
 	ldrh	w2, [x27, #:lo12:.LANCHOR100]
-	ldrb	w1, [x1, #:lo12:.LANCHOR80]
+	ldrb	w1, [x1, #:lo12:.LANCHOR79]
 	mul	w1, w1, w0
 	cmp	w2, w1
-	ble	.L780
+	ble	.L766
 	sub	w0, w2, w0, lsr 3
 	strh	w0, [x27, #:lo12:.LANCHOR100]
-	b	.L780
-.L809:
+	b	.L766
+.L795:
 	cmp	w6, 64
-	bls	.L811
-	strh	wzr, [x21]
-.L811:
-	cmp	w24, w26
-	bcc	.L814
-.L813:
-	adrp	x0, .LANCHOR95
-	ldrh	w2, [x28, #:lo12:.LANCHOR102]
-	ldrh	w1, [x0, #:lo12:.LANCHOR95]
-	ldr	x0, [x29, 136]
-	ldrb	w0, [x0, #:lo12:.LANCHOR80]
+	bls	.L797
+	strh	wzr, [x28]
+.L797:
+	cmp	w24, w27
+	bcc	.L800
+.L799:
+	adrp	x0, .LANCHOR94
+	ldrh	w2, [x21, #:lo12:.LANCHOR102]
+	ldrh	w1, [x0, #:lo12:.LANCHOR94]
+	ldr	x0, [x29, 152]
+	ldrb	w0, [x0, #:lo12:.LANCHOR79]
 	mul	w0, w0, w1
 	sub	w0, w0, #32
 	cmp	w2, w0
-	bge	.L780
+	bge	.L766
 	add	w1, w2, w1, lsr 3
-	strh	w1, [x28, #:lo12:.LANCHOR102]
-	b	.L780
-.L812:
+	strh	w1, [x21, #:lo12:.LANCHOR102]
+	b	.L766
+.L798:
 	sub	w25, w25, #1
 	ands	w25, w25, 65535
-	bne	.L815
-	b	.L811
-.L821:
+	bne	.L801
+	b	.L797
+.L807:
 	mov	w23, 0
 	mov	w24, 0
-	b	.L789
+	b	.L775
 	.size	gc_search_src_blk, .-gc_search_src_blk
+	.section	.text.zftl_get_gc_node,"ax",@progbits
+	.align	2
+	.global	zftl_get_gc_node
+	.type	zftl_get_gc_node, %function
+zftl_get_gc_node:
+	and	w1, w1, 65535
+	and	w0, w0, 65535
+	cmp	w1, 5
+	bne	.L859
+	mov	w1, w0
+	adrp	x0, .LANCHOR92
+	add	x0, x0, :lo12:.LANCHOR92
+.L861:
+	b	_list_get_gc_head_node
+.L859:
+	cmp	w1, 2
+	mov	w1, w0
+	bne	.L860
+	adrp	x0, .LANCHOR95
+	add	x0, x0, :lo12:.LANCHOR95
+	b	.L861
+.L860:
+	adrp	x0, .LANCHOR90
+	add	x0, x0, :lo12:.LANCHOR90
+	b	.L861
+	.size	zftl_get_gc_node, .-zftl_get_gc_node
 	.section	.text.zftl_insert_free_list,"ax",@progbits
 	.align	2
 	.global	zftl_insert_free_list
 	.type	zftl_insert_free_list, %function
 zftl_insert_free_list:
 	and	w1, w0, 65535
-	adrp	x0, .LANCHOR7
-	ldr	x0, [x0, #:lo12:.LANCHOR7]
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	add	x0, x0, x1, uxth 2
 	ldrb	w0, [x0, 2]
 	ands	w0, w0, 24
-	bne	.L873
+	bne	.L863
 	adrp	x2, .LANCHOR103
 	adrp	x0, .LANCHOR104
 	add	x2, x2, :lo12:.LANCHOR103
 	add	x0, x0, :lo12:.LANCHOR104
-.L875:
+.L865:
 	b	_insert_free_list
-.L873:
+.L863:
 	cmp	w0, 16
-	bne	.L874
+	bne	.L864
 	adrp	x2, .LANCHOR105
 	adrp	x0, .LANCHOR106
 	add	x2, x2, :lo12:.LANCHOR105
 	add	x0, x0, :lo12:.LANCHOR106
-	b	.L875
-.L874:
+	b	.L865
+.L864:
 	adrp	x2, .LANCHOR107
 	adrp	x0, .LANCHOR108
 	add	x2, x2, :lo12:.LANCHOR107
 	add	x0, x0, :lo12:.LANCHOR108
-	b	.L875
+	b	.L865
 	.size	zftl_insert_free_list, .-zftl_insert_free_list
 	.section	.text.zftl_insert_data_list,"ax",@progbits
 	.align	2
@@ -5004,36 +5102,36 @@ zftl_insert_free_list:
 	.type	zftl_insert_data_list, %function
 zftl_insert_data_list:
 	and	w1, w0, 65535
-	adrp	x0, .LANCHOR7
-	ldr	x0, [x0, #:lo12:.LANCHOR7]
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	add	x0, x0, x1, uxth 2
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L877
+	bne	.L867
 	adrp	x2, .LANCHOR97
-	adrp	x0, .LANCHOR12
+	adrp	x0, .LANCHOR95
 	add	x2, x2, :lo12:.LANCHOR97
-	add	x0, x0, :lo12:.LANCHOR12
-.L880:
+	add	x0, x0, :lo12:.LANCHOR95
+.L870:
 	b	_insert_data_list
-.L877:
+.L867:
 	cmp	w2, 96
-	bne	.L878
+	bne	.L868
 	adrp	x2, .LANCHOR99
-	adrp	x0, .LANCHOR89
+	adrp	x0, .LANCHOR90
 	add	x2, x2, :lo12:.LANCHOR99
-	add	x0, x0, :lo12:.LANCHOR89
-	b	.L880
-.L878:
+	add	x0, x0, :lo12:.LANCHOR90
+	b	.L870
+.L868:
 	cmp	w2, 160
-	bne	.L876
-	adrp	x2, .LANCHOR93
-	adrp	x0, .LANCHOR88
-	add	x2, x2, :lo12:.LANCHOR93
-	add	x0, x0, :lo12:.LANCHOR88
-	b	.L880
-.L876:
+	bne	.L866
+	adrp	x2, .LANCHOR91
+	adrp	x0, .LANCHOR92
+	add	x2, x2, :lo12:.LANCHOR91
+	add	x0, x0, :lo12:.LANCHOR92
+	b	.L870
+.L866:
 	ret
 	.size	zftl_insert_data_list, .-zftl_insert_data_list
 	.section	.text.zftl_gc_get_free_sblk,"ax",@progbits
@@ -5044,54 +5142,54 @@ zftl_gc_get_free_sblk:
 	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR10
+	adrp	x20, .LANCHOR12
 	stp	x21, x22, [sp, 32]
 	and	w21, w0, 65535
-	ldr	x0, [x20, #:lo12:.LANCHOR10]
+	ldr	x0, [x20, #:lo12:.LANCHOR12]
 	and	w22, w1, 65535
 	ldrh	w19, [x0, 588]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L882
-	cbnz	w21, .L882
+	beq	.L872
+	cbnz	w21, .L872
 	mov	w1, w19
 	adrp	x0, .LC59
 	add	x0, x0, :lo12:.LC59
 	bl	printf
-	ldr	x0, [x20, #:lo12:.LANCHOR10]
+	ldr	x0, [x20, #:lo12:.LANCHOR12]
 	mov	w1, -1
 	strh	w1, [x0, 588]
-.L883:
+.L873:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L882:
+.L872:
 	adrp	x2, .LANCHOR105
 	adrp	x20, .LANCHOR107
 	ldrh	w0, [x2, #:lo12:.LANCHOR105]
 	ldrh	w1, [x20, #:lo12:.LANCHOR107]
 	cmp	w0, w1
-	bcc	.L884
+	bcc	.L874
 	adrp	x3, .LANCHOR103
 	ldrh	w3, [x3, #:lo12:.LANCHOR103]
 	cmp	w3, w0
-	bls	.L885
-	cbz	w1, .L885
-.L884:
-	cbnz	w21, .L886
+	bls	.L875
+	cbz	w1, .L875
+.L874:
+	cbnz	w21, .L876
 	lsr	w1, w1, 2
-.L887:
+.L877:
 	adrp	x0, .LANCHOR108
 	add	x2, x20, :lo12:.LANCHOR107
 	add	x0, x0, :lo12:.LANCHOR108
-.L902:
+.L892:
 	bl	_list_pop_index_node
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	bne	.L890
+	bne	.L880
 	adrp	x0, .LANCHOR103
 	ldrh	w5, [x20, #:lo12:.LANCHOR107]
 	mov	w2, w22
@@ -5102,17 +5200,17 @@ zftl_gc_get_free_sblk:
 	adrp	x0, .LC60
 	add	x0, x0, :lo12:.LC60
 	bl	printf
-.L890:
-	cbz	w21, .L883
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L883
-	adrp	x4, .LANCHOR9
-	adrp	x1, .LANCHOR7
+.L880:
+	cbz	w21, .L873
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 8, .L873
+	adrp	x4, .LANCHOR11
+	adrp	x1, .LANCHOR9
 	uxtw	x3, w19
-	ldr	x1, [x1, #:lo12:.LANCHOR7]
+	ldr	x1, [x1, #:lo12:.LANCHOR9]
 	lsl	x0, x3, 2
-	ldr	x6, [x4, #:lo12:.LANCHOR9]
+	ldr	x6, [x4, #:lo12:.LANCHOR11]
 	add	x2, x1, x0
 	ldr	w4, [x1, x0]
 	ldrh	w6, [x6, x3, lsl 1]
@@ -5126,20 +5224,20 @@ zftl_gc_get_free_sblk:
 	ubfx	x2, x2, 5, 3
 	add	x0, x0, :lo12:.LC61
 	bl	printf
-	b	.L883
-.L886:
+	b	.L873
+.L876:
 	mov	w1, 7
 	mul	w1, w0, w1
 	lsr	w1, w1, 3
-	b	.L887
-.L885:
+	b	.L877
+.L875:
 	lsr	w1, w0, 3
 	cmp	w21, 0
 	adrp	x0, .LANCHOR106
 	csel	w1, w1, wzr, ne
 	add	x2, x2, :lo12:.LANCHOR105
 	add	x0, x0, :lo12:.LANCHOR106
-	b	.L902
+	b	.L892
 	.size	zftl_gc_get_free_sblk, .-zftl_gc_get_free_sblk
 	.section	.text.zftl_get_free_sblk,"ax",@progbits
 	.align	2
@@ -5152,36 +5250,36 @@ zftl_get_free_sblk:
 	and	w20, w1, 65535
 	str	x21, [sp, 32]
 	cmp	w20, 5
-	bne	.L904
+	bne	.L894
 	adrp	x2, .LANCHOR105
 	adrp	x0, .LANCHOR107
 	ldrh	w3, [x2, #:lo12:.LANCHOR105]
 	ldrh	w1, [x0, #:lo12:.LANCHOR107]
 	cmp	w3, w1
-	bcc	.L905
+	bcc	.L895
 	adrp	x4, .LANCHOR103
 	ldrh	w4, [x4, #:lo12:.LANCHOR103]
 	cmp	w4, w3
-	bls	.L906
-	cbz	w1, .L906
-.L905:
+	bls	.L896
+	cbz	w1, .L896
+.L895:
 	add	x2, x0, :lo12:.LANCHOR107
 	lsr	w1, w1, 1
-.L925:
+.L915:
 	adrp	x0, .LANCHOR108
 	add	x0, x0, :lo12:.LANCHOR108
-	b	.L924
-.L906:
+	b	.L914
+.L896:
 	adrp	x0, .LANCHOR106
 	add	x2, x2, :lo12:.LANCHOR105
 	add	x0, x0, :lo12:.LANCHOR106
 	mov	w1, 0
-.L924:
+.L914:
 	bl	_list_pop_index_node
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	bne	.L909
+	bne	.L899
 	adrp	x0, .LANCHOR107
 	mov	w2, w20
 	mov	w1, w19
@@ -5193,58 +5291,65 @@ zftl_get_free_sblk:
 	adrp	x0, .LC60
 	add	x0, x0, :lo12:.LC60
 	bl	printf
-	b	.L909
-.L904:
-	adrp	x21, .LANCHOR10
-	and	w0, w0, 65535
-	ldr	x1, [x21, #:lo12:.LANCHOR10]
-	ldrh	w19, [x1, 590]
-	mov	w1, 65535
-	cmp	w19, w1
-	beq	.L908
+	b	.L899
+.L894:
+	adrp	x21, .LANCHOR12
+	and	w3, w0, 65535
+	ldr	x0, [x21, #:lo12:.LANCHOR12]
+	ldrh	w19, [x0, 590]
+	mov	w0, 65535
+	cmp	w19, w0
+	beq	.L898
 	cmp	w20, 1
-	beq	.L908
+	beq	.L898
 	mov	w1, w19
 	adrp	x0, .LC62
 	add	x0, x0, :lo12:.LC62
 	bl	printf
-	ldr	x0, [x21, #:lo12:.LANCHOR10]
+	ldr	x0, [x21, #:lo12:.LANCHOR12]
 	mov	w1, -1
 	strh	w1, [x0, 590]
-.L909:
+.L899:
 	mov	w0, w19
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L908:
+.L898:
 	adrp	x2, .LANCHOR103
 	adrp	x4, .LANCHOR107
-	ldrh	w1, [x2, #:lo12:.LANCHOR103]
-	ldrh	w3, [x4, #:lo12:.LANCHOR107]
-	cmp	w1, w3
-	bcc	.L910
+	ldrh	w0, [x2, #:lo12:.LANCHOR103]
+	ldrh	w1, [x4, #:lo12:.LANCHOR107]
+	cmp	w0, w1
+	bcc	.L900
 	adrp	x5, .LANCHOR105
 	ldrh	w5, [x5, #:lo12:.LANCHOR105]
-	cmp	w5, w1
-	bls	.L911
-	cbz	w3, .L911
-.L910:
+	cmp	w5, w0
+	bls	.L901
+	cbz	w1, .L901
+.L900:
+	bl	get_ink_scaned_blk
+	and	w19, w0, 65535
+	mov	w0, 65535
+	cmp	w19, w0
+	bne	.L899
 	cmp	w20, 1
+	bne	.L902
+	ldrh	w3, [x4, #:lo12:.LANCHOR107]
 	lsr	w3, w3, 1
-	csel	w0, w3, w0, eq
+.L902:
 	add	x2, x4, :lo12:.LANCHOR107
-	mov	w1, w0
-	b	.L925
-.L911:
-	lsr	w1, w1, 1
+	mov	w1, w3
+	b	.L915
+.L901:
+	lsr	w0, w0, 1
 	cmp	w20, 1
-	csel	w0, w1, w0, eq
+	csel	w3, w0, w3, eq
 	add	x2, x2, :lo12:.LANCHOR103
-	mov	w1, w0
 	adrp	x0, .LANCHOR104
+	mov	w1, w3
 	add	x0, x0, :lo12:.LANCHOR104
-	b	.L924
+	b	.L914
 	.size	zftl_get_free_sblk, .-zftl_get_free_sblk
 	.section	.text.zftl_remove_data_node,"ax",@progbits
 	.align	2
@@ -5252,36 +5357,36 @@ zftl_get_free_sblk:
 	.type	zftl_remove_data_node, %function
 zftl_remove_data_node:
 	and	w1, w0, 65535
-	adrp	x0, .LANCHOR7
-	ldr	x0, [x0, #:lo12:.LANCHOR7]
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	add	x0, x0, x1, uxth 2
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L927
+	bne	.L917
 	adrp	x2, .LANCHOR97
-	adrp	x0, .LANCHOR12
+	adrp	x0, .LANCHOR95
 	add	x2, x2, :lo12:.LANCHOR97
-	add	x0, x0, :lo12:.LANCHOR12
-.L930:
+	add	x0, x0, :lo12:.LANCHOR95
+.L920:
 	b	_list_remove_node
-.L927:
+.L917:
 	cmp	w2, 96
-	bne	.L928
+	bne	.L918
 	adrp	x2, .LANCHOR99
-	adrp	x0, .LANCHOR89
+	adrp	x0, .LANCHOR90
 	add	x2, x2, :lo12:.LANCHOR99
-	add	x0, x0, :lo12:.LANCHOR89
-	b	.L930
-.L928:
+	add	x0, x0, :lo12:.LANCHOR90
+	b	.L920
+.L918:
 	cmp	w2, 160
-	bne	.L926
-	adrp	x2, .LANCHOR93
-	adrp	x0, .LANCHOR88
-	add	x2, x2, :lo12:.LANCHOR93
-	add	x0, x0, :lo12:.LANCHOR88
-	b	.L930
-.L926:
+	bne	.L916
+	adrp	x2, .LANCHOR91
+	adrp	x0, .LANCHOR92
+	add	x2, x2, :lo12:.LANCHOR91
+	add	x0, x0, :lo12:.LANCHOR92
+	b	.L920
+.L916:
 	ret
 	.size	zftl_remove_data_node, .-zftl_remove_data_node
 	.section	.text.zftl_remove_free_node,"ax",@progbits
@@ -5290,32 +5395,32 @@ zftl_remove_data_node:
 	.type	zftl_remove_free_node, %function
 zftl_remove_free_node:
 	and	w1, w0, 65535
-	adrp	x0, .LANCHOR7
-	ldr	x0, [x0, #:lo12:.LANCHOR7]
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	add	x0, x0, x1, uxth 2
 	ldrb	w0, [x0, 2]
 	ands	w0, w0, 24
-	bne	.L932
+	bne	.L922
 	adrp	x2, .LANCHOR103
 	adrp	x0, .LANCHOR104
 	add	x2, x2, :lo12:.LANCHOR103
 	add	x0, x0, :lo12:.LANCHOR104
-.L934:
+.L924:
 	b	_list_remove_node
-.L932:
+.L922:
 	cmp	w0, 16
-	bne	.L933
+	bne	.L923
 	adrp	x2, .LANCHOR105
 	adrp	x0, .LANCHOR106
 	add	x2, x2, :lo12:.LANCHOR105
 	add	x0, x0, :lo12:.LANCHOR106
-	b	.L934
-.L933:
+	b	.L924
+.L923:
 	adrp	x2, .LANCHOR107
 	adrp	x0, .LANCHOR108
 	add	x2, x2, :lo12:.LANCHOR107
 	add	x0, x0, :lo12:.LANCHOR108
-	b	.L934
+	b	.L924
 	.size	zftl_remove_free_node, .-zftl_remove_free_node
 	.section	.text.zftl_list_update_data_list,"ax",@progbits
 	.align	2
@@ -5323,36 +5428,36 @@ zftl_remove_free_node:
 	.type	zftl_list_update_data_list, %function
 zftl_list_update_data_list:
 	and	w1, w0, 65535
-	adrp	x0, .LANCHOR7
-	ldr	x0, [x0, #:lo12:.LANCHOR7]
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	add	x0, x0, x1, uxth 2
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L936
+	bne	.L926
 	adrp	x2, .LANCHOR97
-	adrp	x0, .LANCHOR12
+	adrp	x0, .LANCHOR95
 	add	x2, x2, :lo12:.LANCHOR97
-	add	x0, x0, :lo12:.LANCHOR12
-.L939:
+	add	x0, x0, :lo12:.LANCHOR95
+.L929:
 	b	_list_update_data_list
-.L936:
+.L926:
 	cmp	w2, 96
-	bne	.L937
+	bne	.L927
 	adrp	x2, .LANCHOR99
-	adrp	x0, .LANCHOR89
+	adrp	x0, .LANCHOR90
 	add	x2, x2, :lo12:.LANCHOR99
-	add	x0, x0, :lo12:.LANCHOR89
-	b	.L939
-.L937:
+	add	x0, x0, :lo12:.LANCHOR90
+	b	.L929
+.L927:
 	cmp	w2, 160
-	bne	.L935
-	adrp	x2, .LANCHOR93
-	adrp	x0, .LANCHOR88
-	add	x2, x2, :lo12:.LANCHOR93
-	add	x0, x0, :lo12:.LANCHOR88
-	b	.L939
-.L935:
+	bne	.L925
+	adrp	x2, .LANCHOR91
+	adrp	x0, .LANCHOR92
+	add	x2, x2, :lo12:.LANCHOR91
+	add	x0, x0, :lo12:.LANCHOR92
+	b	.L929
+.L925:
 	ret
 	.size	zftl_list_update_data_list, .-zftl_list_update_data_list
 	.section	.text.print_list_info,"ax",@progbits
@@ -5373,7 +5478,7 @@ print_list_info:
 	add	x0, x0, :lo12:.LC63
 	bl	printf
 	ldr	x19, [x19]
-	cbz	x19, .L940
+	cbz	x19, .L930
 	mov	x24, -6148914691236517206
 	adrp	x22, .LC64
 	adrp	x21, .LANCHOR109
@@ -5382,15 +5487,15 @@ print_list_info:
 	mov	w20, 0
 	adrp	x23, .LANCHOR4
 	movk	x24, 0xaaab, lsl 0
-.L944:
+.L934:
 	ldr	x2, [x23, #:lo12:.LANCHOR4]
-	adrp	x1, .LANCHOR7
-	adrp	x8, .LANCHOR9
+	adrp	x1, .LANCHOR9
+	adrp	x8, .LANCHOR11
 	ldrh	w5, [x19, 4]
 	sub	x2, x19, x2
-	ldr	x1, [x1, #:lo12:.LANCHOR7]
+	ldr	x1, [x1, #:lo12:.LANCHOR9]
 	asr	x2, x2, 1
-	ldr	x8, [x8, #:lo12:.LANCHOR9]
+	ldr	x8, [x8, #:lo12:.LANCHOR11]
 	ldrh	w4, [x19, 2]
 	mul	x2, x2, x24
 	and	x7, x2, 65535
@@ -5415,7 +5520,7 @@ print_list_info:
 	ldrh	w19, [x19]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L940
+	beq	.L930
 	ldr	x0, [x23, #:lo12:.LANCHOR4]
 	mov	w1, 6
 	add	w20, w20, 1
@@ -5423,8 +5528,8 @@ print_list_info:
 	umaddl	x19, w19, w1, x0
 	ldrh	w0, [x21]
 	cmp	w0, w20
-	bcs	.L944
-.L940:
+	bcs	.L934
+.L930:
 	ldp	x19, x20, [sp, 48]
 	ldp	x21, x22, [sp, 64]
 	ldp	x23, x24, [sp, 80]
@@ -5455,20 +5560,20 @@ dump_all_list_info:
 	add	x0, x0, :lo12:.LANCHOR108
 	bl	print_list_info
 	adrp	x1, .LANCHOR97
-	adrp	x0, .LANCHOR12
+	adrp	x0, .LANCHOR95
 	add	x1, x1, :lo12:.LANCHOR97
-	add	x0, x0, :lo12:.LANCHOR12
+	add	x0, x0, :lo12:.LANCHOR95
 	bl	print_list_info
 	adrp	x1, .LANCHOR99
-	adrp	x0, .LANCHOR89
+	adrp	x0, .LANCHOR90
 	add	x1, x1, :lo12:.LANCHOR99
-	add	x0, x0, :lo12:.LANCHOR89
+	add	x0, x0, :lo12:.LANCHOR90
 	bl	print_list_info
 	ldp	x29, x30, [sp], 16
-	adrp	x1, .LANCHOR93
-	adrp	x0, .LANCHOR88
-	add	x1, x1, :lo12:.LANCHOR93
-	add	x0, x0, :lo12:.LANCHOR88
+	adrp	x1, .LANCHOR91
+	adrp	x0, .LANCHOR92
+	add	x1, x1, :lo12:.LANCHOR91
+	add	x0, x0, :lo12:.LANCHOR92
 	b	print_list_info
 	.size	dump_all_list_info, .-dump_all_list_info
 	.section	.text.ftl_tmp_into_update,"ax",@progbits
@@ -5480,36 +5585,36 @@ ftl_tmp_into_update:
 	ldr	x0, [x0, #:lo12:.LANCHOR110]
 	ldr	w1, [x0, 16]
 	cmp	w1, 2048
-	bls	.L949
+	bls	.L939
 	ldr	w2, [x0, 20]
 	add	w2, w2, w1, lsr 11
 	and	w1, w1, 2047
 	stp	w1, w2, [x0, 16]
-.L949:
+.L939:
 	ldr	w1, [x0, 24]
 	cmp	w1, 2048
-	bls	.L950
+	bls	.L940
 	ldr	w2, [x0, 28]
 	add	w2, w2, w1, lsr 11
 	and	w1, w1, 2047
 	stp	w1, w2, [x0, 24]
-.L950:
+.L940:
 	ldr	w1, [x0, 32]
 	cmp	w1, 1024
-	bls	.L951
+	bls	.L941
 	ldr	w2, [x0, 36]
 	add	w2, w2, w1, lsr 10
 	and	w1, w1, 1023
 	stp	w1, w2, [x0, 32]
-.L951:
+.L941:
 	ldr	w1, [x0, 40]
 	cmp	w1, 1024
-	bls	.L948
+	bls	.L938
 	ldr	w2, [x0, 44]
 	add	w2, w2, w1, lsr 10
 	and	w1, w1, 1023
 	stp	w1, w2, [x0, 40]
-.L948:
+.L938:
 	ret
 	.size	ftl_tmp_into_update, .-ftl_tmp_into_update
 	.section	.text.ftl_get_blk_list_in_sblk,"ax",@progbits
@@ -5517,21 +5622,21 @@ ftl_tmp_into_update:
 	.global	ftl_get_blk_list_in_sblk
 	.type	ftl_get_blk_list_in_sblk, %function
 ftl_get_blk_list_in_sblk:
-	adrp	x2, .LANCHOR7
+	adrp	x2, .LANCHOR9
 	and	w0, w0, 65535
 	mov	w7, 24
-	adrp	x8, .LANCHOR75
-	ldr	x2, [x2, #:lo12:.LANCHOR7]
-	add	x8, x8, :lo12:.LANCHOR75
+	adrp	x8, .LANCHOR74
+	ldr	x2, [x2, #:lo12:.LANCHOR9]
+	add	x8, x8, :lo12:.LANCHOR74
 	mov	w3, 0
 	add	x2, x2, x0, uxth 2
 	ldrb	w13, [x2, 3]
-	adrp	x2, .LANCHOR80
-	ldrb	w11, [x2, #:lo12:.LANCHOR80]
-	adrp	x2, .LANCHOR76
-	ldrb	w6, [x2, #:lo12:.LANCHOR76]
-	adrp	x2, .LANCHOR32
-	ldrb	w2, [x2, #:lo12:.LANCHOR32]
+	adrp	x2, .LANCHOR79
+	ldrb	w11, [x2, #:lo12:.LANCHOR79]
+	adrp	x2, .LANCHOR75
+	ldrb	w6, [x2, #:lo12:.LANCHOR75]
+	adrp	x2, .LANCHOR31
+	ldrb	w2, [x2, #:lo12:.LANCHOR31]
 	sub	w7, w7, w2
 	and	w2, w6, 65535
 	mul	w0, w0, w2
@@ -5539,18 +5644,18 @@ ftl_get_blk_list_in_sblk:
 	sxth	w5, w2
 	and	w4, w0, 65535
 	mov	w0, 0
-.L954:
+.L944:
 	cmp	w3, w11
-	blt	.L958
+	blt	.L948
 	sxtw	x2, w0
 	mov	w3, -1
-.L959:
+.L949:
 	cmp	w11, w2
-	bgt	.L960
+	bgt	.L950
 	ret
-.L958:
+.L948:
 	asr	w2, w13, w3
-	tbnz	x2, 0, .L955
+	tbnz	x2, 0, .L945
 	sdiv	w2, w3, w6
 	ldrh	w10, [x8]
 	sbfiz	x12, x0, 1, 32
@@ -5559,21 +5664,21 @@ ftl_get_blk_list_in_sblk:
 	lsl	w2, w2, w10
 	add	w2, w4, w2
 	and	w2, w2, 65535
-	bhi	.L956
-.L961:
+	bhi	.L946
+.L951:
 	add	w0, w0, 1
 	strh	w2, [x1, x12]
-.L955:
+.L945:
 	add	w3, w3, 1
-	b	.L954
-.L956:
+	b	.L944
+.L946:
 	and	w10, w5, w3
 	add	w2, w2, w10
-	b	.L961
-.L960:
+	b	.L951
+.L950:
 	strh	w3, [x1, x2, lsl 1]
 	add	x2, x2, 1
-	b	.L959
+	b	.L949
 	.size	ftl_get_blk_list_in_sblk, .-ftl_get_blk_list_in_sblk
 	.section	.text.ftl_erase_phy_blk,"ax",@progbits
 	.align	2
@@ -5585,34 +5690,34 @@ ftl_erase_phy_blk:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	mov	w21, w1
-	adrp	x1, .LANCHOR32
+	adrp	x1, .LANCHOR31
 	stp	x19, x20, [sp, 16]
 	adrp	x22, .LANCHOR111
-	ldrb	w19, [x1, #:lo12:.LANCHOR32]
+	ldrb	w19, [x1, #:lo12:.LANCHOR31]
 	mov	w1, 24
 	sub	w19, w1, w19
-	adrp	x1, .LANCHOR75
-	ldrh	w1, [x1, #:lo12:.LANCHOR75]
+	adrp	x1, .LANCHOR74
+	ldrh	w1, [x1, #:lo12:.LANCHOR74]
 	sub	w1, w19, w1
 	mov	w19, 1
 	lsl	w19, w19, w1
 	sub	w19, w19, #1
 	and	w19, w19, w0
 	asr	w20, w0, w1
-	adrp	x0, .LANCHOR81
+	adrp	x0, .LANCHOR80
 	sxth	w19, w19
+	ldrb	w0, [x0, #:lo12:.LANCHOR80]
+	cbz	w0, .L953
+	adrp	x0, .LANCHOR81
 	ldrb	w0, [x0, #:lo12:.LANCHOR81]
-	cbz	w0, .L963
-	adrp	x0, .LANCHOR82
-	ldrb	w0, [x0, #:lo12:.LANCHOR82]
-	cbnz	w0, .L963
+	cbnz	w0, .L953
 	ldrh	w2, [x22, #:lo12:.LANCHOR111]
 	cmp	w21, 0
 	cset	w1, eq
 	mov	w0, w20
 	mul	w2, w2, w19
 	bl	flash_erase_block_en
-.L963:
+.L953:
 	ldrh	w2, [x22, #:lo12:.LANCHOR111]
 	mov	w1, w21
 	mov	w0, w20
@@ -5630,27 +5735,27 @@ ftl_erase_sblk:
 	stp	x29, x30, [sp, -176]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR7
+	adrp	x23, .LANCHOR9
 	stp	x25, x26, [sp, 64]
 	and	w26, w0, 65535
-	ldr	x0, [x23, #:lo12:.LANCHOR7]
+	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	adrp	x25, .LANCHOR112
 	stp	x21, x22, [sp, 32]
 	ubfiz	x22, x26, 2, 16
 	add	x0, x0, x22
 	stp	x27, x28, [sp, 80]
 	stp	x19, x20, [sp, 16]
-	adrp	x24, .LANCHOR76
+	adrp	x24, .LANCHOR75
 	mov	w20, w1
 	add	x25, x25, :lo12:.LANCHOR112
 	ldrb	w28, [x0, 3]
-	add	x24, x24, :lo12:.LANCHOR76
+	add	x24, x24, :lo12:.LANCHOR75
 	add	x27, x29, 112
 	mov	w19, 0
-.L969:
+.L959:
 	ldrb	w0, [x25]
 	cmp	w19, w0
-	bge	.L980
+	bge	.L970
 	ldrb	w1, [x24]
 	adrp	x0, .LANCHOR111
 	mov	w21, 0
@@ -5659,31 +5764,31 @@ ftl_erase_sblk:
 	mov	w0, 0
 	mul	w6, w19, w1
 	mul	w5, w26, w1
-	b	.L981
-.L971:
+	b	.L971
+.L961:
 	add	w2, w0, w6
 	asr	w2, w28, w2
-	tbnz	x2, 0, .L970
+	tbnz	x2, 0, .L960
 	and	w2, w0, w4
 	add	w2, w2, w5
 	mul	w2, w2, w3
 	str	w2, [x27, w21, sxtw 2]
 	add	w21, w21, 1
-.L970:
+.L960:
 	add	w0, w0, 1
-.L981:
+.L971:
 	cmp	w0, w1
-	blt	.L971
+	blt	.L961
 	cmp	w1, 4
-	bne	.L972
+	bne	.L962
 	mov	x3, 0
-.L973:
+.L963:
 	cmp	w21, w3
-	bgt	.L974
-.L975:
+	bgt	.L964
+.L965:
 	add	w19, w19, 1
-	b	.L969
-.L974:
+	b	.L959
+.L964:
 	ldr	w2, [x27, x3, lsl 2]
 	mov	w1, w20
 	str	x3, [x29, 104]
@@ -5691,51 +5796,51 @@ ftl_erase_sblk:
 	bl	flash_erase_block_en
 	ldr	x3, [x29, 104]
 	add	x3, x3, 1
-	b	.L973
-.L972:
+	b	.L963
+.L962:
 	cmp	w21, 2
-	bne	.L976
+	bne	.L966
+	adrp	x0, .LANCHOR80
+	ldrb	w0, [x0, #:lo12:.LANCHOR80]
+	cbz	w0, .L967
 	adrp	x0, .LANCHOR81
 	ldrb	w0, [x0, #:lo12:.LANCHOR81]
-	cbz	w0, .L977
-	adrp	x0, .LANCHOR82
-	ldrb	w0, [x0, #:lo12:.LANCHOR82]
-	cbnz	w0, .L977
+	cbnz	w0, .L967
 	ldp	w2, w3, [x29, 112]
 	cmp	w20, 0
 	cset	w1, eq
 	mov	w0, w19
 	bl	flash_erase_duplane_block
-.L977:
+.L967:
 	ldp	w2, w3, [x29, 112]
 	mov	w1, w20
 	mov	w0, w19
 	bl	flash_erase_duplane_block
-	b	.L975
-.L976:
+	b	.L965
+.L966:
 	cmp	w21, 1
-	bne	.L975
+	bne	.L965
+	adrp	x0, .LANCHOR80
+	ldrb	w0, [x0, #:lo12:.LANCHOR80]
+	cbz	w0, .L969
 	adrp	x0, .LANCHOR81
 	ldrb	w0, [x0, #:lo12:.LANCHOR81]
-	cbz	w0, .L979
-	adrp	x0, .LANCHOR82
-	ldrb	w0, [x0, #:lo12:.LANCHOR82]
-	cbnz	w0, .L979
+	cbnz	w0, .L969
 	ldr	w2, [x29, 112]
 	cmp	w20, 0
 	cset	w1, eq
 	mov	w0, w19
 	bl	flash_erase_block_en
-.L979:
+.L969:
 	ldr	w2, [x29, 112]
 	mov	w1, w20
 	mov	w0, w19
 	bl	flash_erase_block_en
-	b	.L975
-.L980:
+	b	.L965
+.L970:
 	adrp	x2, .LANCHOR110
-	ldr	x3, [x23, #:lo12:.LANCHOR7]
-	cbnz	w20, .L982
+	ldr	x3, [x23, #:lo12:.LANCHOR9]
+	cbnz	w20, .L972
 	ldrh	w1, [x3, x22]
 	add	w0, w1, 1
 	and	w0, w0, 2047
@@ -5747,9 +5852,9 @@ ftl_erase_sblk:
 	str	w2, [x1, 84]
 	ldrh	w2, [x1, 96]
 	cmp	w2, w0
-	bge	.L984
+	bge	.L974
 	strh	w0, [x1, 96]
-.L984:
+.L974:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -5758,7 +5863,7 @@ ftl_erase_sblk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L982:
+.L972:
 	ldr	w1, [x3, x22]
 	ubfx	x0, x1, 11, 8
 	add	w0, w0, 1
@@ -5772,9 +5877,9 @@ ftl_erase_sblk:
 	str	w2, [x1, 80]
 	ldrh	w2, [x1, 98]
 	cmp	w2, w0
-	bcs	.L984
+	bcs	.L974
 	strh	w0, [x1, 98]
-	b	.L984
+	b	.L974
 	.size	ftl_erase_sblk, .-ftl_erase_sblk
 	.section	.text.ftl_alloc_sys_blk,"ax",@progbits
 	.align	2
@@ -5789,37 +5894,37 @@ ftl_alloc_sys_blk:
 	str	x19, [sp, 16]
 	mov	x19, x0
 	cmp	w2, 63
-	bls	.L994
+	bls	.L984
 	strh	wzr, [x1, 136]
-.L994:
+.L984:
 	ldrh	w0, [x1, 112]
-	cbnz	w0, .L995
+	cbnz	w0, .L985
 	adrp	x1, .LANCHOR113
 	adrp	x0, .LC0
-	mov	w2, 1283
+	mov	w2, 1359
 	add	x1, x1, :lo12:.LANCHOR113
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L995:
+.L985:
 	ldr	x1, [x19, #:lo12:.LANCHOR110]
 	mov	w5, 65535
-.L998:
+.L988:
 	ldrh	w2, [x1, 136]
-.L996:
+.L986:
 	mov	w3, w2
 	cmp	w2, 63
-	ble	.L997
+	ble	.L987
 	strh	wzr, [x1, 136]
-	b	.L998
-.L997:
+	b	.L988
+.L987:
 	add	x4, x2, 1
 	add	x0, x1, x4, lsl 1
 	ldrh	w0, [x0, 158]
 	cmp	w0, w5
-	bne	.L1001
+	bne	.L991
 	mov	x2, x4
-	b	.L996
-.L1001:
+	b	.L986
+.L991:
 	add	x3, x1, x3, sxtw 1
 	mov	w4, -1
 	ldr	x19, [sp, 16]
@@ -5845,35 +5950,35 @@ ftl_free_sys_blk:
 	ldr	x1, [x0, #:lo12:.LANCHOR110]
 	ldrh	w2, [x1, 138]
 	cmp	w2, 63
-	bls	.L1004
+	bls	.L994
 	strh	wzr, [x1, 138]
-.L1004:
+.L994:
 	ldrh	w0, [x1, 112]
 	cmp	w0, 63
-	bls	.L1005
+	bls	.L995
 	adrp	x1, .LANCHOR114
 	adrp	x0, .LC0
-	mov	w2, 1310
+	mov	w2, 1386
 	add	x1, x1, :lo12:.LANCHOR114
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1005:
+.L995:
 	ldr	x0, [x19, #:lo12:.LANCHOR110]
 	mov	w4, 65535
-.L1008:
+.L998:
 	ldrh	w1, [x0, 138]
-.L1006:
+.L996:
 	mov	w2, w1
 	cmp	w1, 63
-	ble	.L1007
+	ble	.L997
 	strh	wzr, [x0, 138]
-	b	.L1008
-.L1007:
+	b	.L998
+.L997:
 	add	x3, x1, 1
 	add	x5, x0, x3, lsl 1
 	ldrh	w5, [x5, 158]
 	cmp	w5, w4
-	bne	.L1009
+	bne	.L999
 	add	x2, x0, x2, sxtw 1
 	strh	w20, [x2, 160]
 	strh	w1, [x0, 138]
@@ -5883,9 +5988,9 @@ ftl_free_sys_blk:
 	strh	w1, [x0, 112]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1009:
+.L999:
 	mov	x1, x3
-	b	.L1006
+	b	.L996
 	.size	ftl_free_sys_blk, .-ftl_free_sys_blk
 	.section	.text.ftl_info_data_recovery,"ax",@progbits
 	.align	2
@@ -5895,18 +6000,18 @@ ftl_info_data_recovery:
 	ldrh	w2, [x0]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L1022
+	beq	.L1012
 	stp	x29, x30, [sp, -48]!
-	adrp	x1, .LANCHOR7
+	adrp	x1, .LANCHOR9
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	ubfiz	x19, x2, 2, 16
-	ldr	x20, [x1, #:lo12:.LANCHOR7]
+	ldr	x20, [x1, #:lo12:.LANCHOR9]
 	str	x21, [sp, 32]
 	add	x21, x20, x19
 	ldrb	w1, [x21, 2]
 	tst	w1, 224
-	bne	.L1012
+	bne	.L1002
 	ldrb	w0, [x0, 4]
 	bfi	w1, w0, 5, 3
 	strb	w1, [x21, 2]
@@ -5915,14 +6020,14 @@ ftl_info_data_recovery:
 	ldrb	w0, [x21, 2]
 	adrp	x1, .LANCHOR110
 	ldr	x3, [x1, #:lo12:.LANCHOR110]
-	tbz	x0, 3, .L1016
+	tbz	x0, 3, .L1006
 	ldrh	w2, [x3, 116]
 	sub	w2, w2, #1
 	strh	w2, [x3, 116]
-.L1017:
+.L1007:
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L1019
+	bne	.L1009
 	ldr	w0, [x20, x19]
 	ldr	x1, [x1, #:lo12:.LANCHOR110]
 	ubfx	x2, x0, 11, 8
@@ -5932,44 +6037,44 @@ ftl_info_data_recovery:
 	ldrh	w0, [x1, 120]
 	sub	w0, w0, #1
 	strh	w0, [x1, 120]
-.L1012:
+.L1002:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1016:
+.L1006:
 	tst	w0, 24
-	bne	.L1018
+	bne	.L1008
 	ldrh	w2, [x3, 114]
 	sub	w2, w2, #1
 	strh	w2, [x3, 114]
-	b	.L1017
-.L1018:
+	b	.L1007
+.L1008:
 	ldrh	w2, [x3, 118]
 	sub	w2, w2, #1
 	strh	w2, [x3, 118]
-	b	.L1017
-.L1019:
+	b	.L1007
+.L1009:
 	ldrh	w2, [x20, x19]
 	cmp	w0, 64
 	add	w3, w2, 1
 	bfi	w2, w3, 0, 11
 	strh	w2, [x20, x19]
-	bne	.L1020
+	bne	.L1010
 	ldr	x1, [x1, #:lo12:.LANCHOR110]
 	ldrh	w0, [x1, 122]
 	sub	w0, w0, #1
 	strh	w0, [x1, 122]
-	b	.L1012
-.L1020:
+	b	.L1002
+.L1010:
 	cmp	w0, 96
-	bne	.L1012
+	bne	.L1002
 	ldr	x1, [x1, #:lo12:.LANCHOR110]
 	ldrh	w0, [x1, 124]
 	sub	w0, w0, #1
 	strh	w0, [x1, 124]
-	b	.L1012
-.L1022:
+	b	.L1002
+.L1012:
 	ret
 	.size	ftl_info_data_recovery, .-ftl_info_data_recovery
 	.section	.text.ftl_get_ppa_from_index,"ax",@progbits
@@ -5978,20 +6083,20 @@ ftl_info_data_recovery:
 	.type	ftl_get_ppa_from_index, %function
 ftl_get_ppa_from_index:
 	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LANCHOR10
-	adrp	x3, .LANCHOR80
+	adrp	x1, .LANCHOR12
+	adrp	x3, .LANCHOR79
 	and	w0, w0, 65535
 	add	x29, sp, 0
-	ldr	x2, [x1, #:lo12:.LANCHOR10]
-	adrp	x1, .LANCHOR95
-	ldrb	w3, [x3, #:lo12:.LANCHOR80]
-	ldrh	w1, [x1, #:lo12:.LANCHOR95]
+	ldr	x2, [x1, #:lo12:.LANCHOR12]
+	adrp	x1, .LANCHOR94
+	ldrb	w3, [x3, #:lo12:.LANCHOR79]
+	ldrh	w1, [x1, #:lo12:.LANCHOR94]
 	stp	x19, x20, [sp, 16]
 	mul	w1, w1, w3
 	cmp	w0, w1
-	bge	.L1026
+	bge	.L1016
 	add	x2, x2, 16
-.L1027:
+.L1017:
 	ldrb	w1, [x2, 9]
 	sdiv	w19, w0, w1
 	msub	w0, w19, w1, w0
@@ -5999,25 +6104,25 @@ ftl_get_ppa_from_index:
 	ldrh	w20, [x0, 16]
 	mov	w0, 65535
 	cmp	w20, w0
-	bne	.L1028
+	bne	.L1018
 	adrp	x1, .LANCHOR115
 	adrp	x0, .LC0
-	mov	w2, 1937
+	mov	w2, 1945
 	add	x1, x1, :lo12:.LANCHOR115
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1028:
+.L1018:
 	adrp	x0, .LANCHOR111
 	ldrh	w0, [x0, #:lo12:.LANCHOR111]
 	madd	w0, w0, w20, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1026:
+.L1016:
 	sub	w0, w0, w1
 	add	x2, x2, 48
 	and	w0, w0, 65535
-	b	.L1027
+	b	.L1017
 	.size	ftl_get_ppa_from_index, .-ftl_get_ppa_from_index
 	.section	.text.lpa_hash_get_ppa,"ax",@progbits
 	.align	2
@@ -6033,21 +6138,21 @@ lpa_hash_get_ppa:
 	ldr	x4, [x2, #:lo12:.LANCHOR117]
 	adrp	x2, .LANCHOR118
 	ldr	x5, [x2, #:lo12:.LANCHOR118]
-.L1031:
+.L1021:
 	cmp	w1, w3
-	bne	.L1033
+	bne	.L1023
 	mov	w0, -1
 	ret
-.L1033:
+.L1023:
 	uxtw	x2, w1
 	ldr	w6, [x4, x2, lsl 2]
 	cmp	w0, w6
-	bne	.L1032
+	bne	.L1022
 	mov	w0, w1
 	b	ftl_get_ppa_from_index
-.L1032:
+.L1022:
 	ldrh	w1, [x5, x2, lsl 1]
-	b	.L1031
+	b	.L1021
 	.size	lpa_hash_get_ppa, .-lpa_hash_get_ppa
 	.section	.text.ftl_get_new_free_page,"ax",@progbits
 	.align	2
@@ -6061,45 +6166,45 @@ ftl_get_new_free_page:
 	mov	x19, x0
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1035
+	bne	.L1025
 	adrp	x1, .LANCHOR119
 	adrp	x0, .LC0
-	mov	w2, 2080
+	mov	w2, 2088
 	add	x1, x1, :lo12:.LANCHOR119
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1035:
-	adrp	x0, .LANCHOR95
+.L1025:
+	adrp	x0, .LANCHOR94
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x0, #:lo12:.LANCHOR95]
+	ldrh	w0, [x0, #:lo12:.LANCHOR94]
 	cmp	w1, w0
-	bne	.L1036
+	bne	.L1026
 	adrp	x1, .LANCHOR119
 	adrp	x0, .LC0
-	mov	w2, 2081
+	mov	w2, 2089
 	add	x1, x1, :lo12:.LANCHOR119
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1036:
+.L1026:
 	ldrh	w0, [x19, 6]
-	cbnz	w0, .L1037
+	cbnz	w0, .L1027
 	adrp	x1, .LANCHOR119
 	adrp	x0, .LC0
-	mov	w2, 2082
+	mov	w2, 2090
 	add	x1, x1, :lo12:.LANCHOR119
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1037:
+.L1027:
 	ldrb	w0, [x19, 5]
 	mov	w2, 65535
 	add	x0, x0, 8
 	ldrh	w3, [x19, x0, lsl 1]
-	adrp	x0, .LANCHOR80
-	ldrb	w4, [x0, #:lo12:.LANCHOR80]
-.L1038:
+	adrp	x0, .LANCHOR79
+	ldrb	w4, [x0, #:lo12:.LANCHOR79]
+.L1028:
 	cmp	w3, w2
 	ldrb	w1, [x19, 5]
-	beq	.L1040
+	beq	.L1030
 	adrp	x0, .LANCHOR111
 	add	w1, w1, 1
 	and	w1, w1, 255
@@ -6115,29 +6220,29 @@ ftl_get_new_free_page:
 	orr	w0, w0, w2
 	add	w3, w3, 1
 	strh	w3, [x19, 10]
-	bne	.L1034
+	bne	.L1024
 	add	w2, w2, 1
 	strb	wzr, [x19, 5]
 	strh	w2, [x19, 2]
-.L1034:
+.L1024:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1040:
+.L1030:
 	add	w1, w1, 1
 	and	w1, w1, 255
 	strb	w1, [x19, 5]
 	cmp	w1, w4
-	bne	.L1039
+	bne	.L1029
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 5]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L1039:
+.L1029:
 	ldrb	w0, [x19, 5]
 	add	x0, x0, 8
 	ldrh	w3, [x19, x0, lsl 1]
-	b	.L1038
+	b	.L1028
 	.size	ftl_get_new_free_page, .-ftl_get_new_free_page
 	.section	.text.ftl_ext_alloc_new_blk,"ax",@progbits
 	.align	2
@@ -6153,14 +6258,14 @@ ftl_ext_alloc_new_blk:
 	mov	w19, w0
 	sub	w0, w0, #1
 	cmp	w1, w0, uxth
-	bcs	.L1044
+	bcs	.L1034
 	adrp	x1, .LANCHOR120
 	adrp	x0, .LC0
-	mov	w2, 2117
+	mov	w2, 2125
 	add	x1, x1, :lo12:.LANCHOR120
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1044:
+.L1034:
 	adrp	x20, .LANCHOR110
 	mov	w1, 0
 	mov	w0, w19
@@ -6185,54 +6290,54 @@ ftl_total_vpn_update:
 	mov	x3, x2
 	ldrh	w1, [x2, #:lo12:.LANCHOR121]
 	cmp	w1, 4
-	bhi	.L1047
-	cbnz	w0, .L1047
+	bhi	.L1037
+	cbnz	w0, .L1037
 	add	w1, w1, 1
 	strh	w1, [x2, #:lo12:.LANCHOR121]
 	ret
-.L1047:
-	adrp	x0, .LANCHOR6
+.L1037:
+	adrp	x0, .LANCHOR8
 	strh	wzr, [x3, #:lo12:.LANCHOR121]
 	mov	x1, 0
 	mov	w2, 0
-	ldrh	w5, [x0, #:lo12:.LANCHOR6]
-	adrp	x0, .LANCHOR9
+	ldrh	w5, [x0, #:lo12:.LANCHOR8]
+	adrp	x0, .LANCHOR11
 	mov	w8, 65535
-	ldr	x6, [x0, #:lo12:.LANCHOR9]
-	adrp	x0, .LANCHOR7
-	ldr	x7, [x0, #:lo12:.LANCHOR7]
+	ldr	x6, [x0, #:lo12:.LANCHOR11]
+	adrp	x0, .LANCHOR9
+	ldr	x7, [x0, #:lo12:.LANCHOR9]
 	mov	w0, 0
-.L1049:
+.L1039:
 	cmp	w5, w1, uxth
-	bhi	.L1052
-	adrp	x1, .LANCHOR10
-	ldr	x1, [x1, #:lo12:.LANCHOR10]
+	bhi	.L1042
+	adrp	x1, .LANCHOR12
+	ldr	x1, [x1, #:lo12:.LANCHOR12]
 	str	w2, [x1, 524]
 	adrp	x2, .LANCHOR110
 	str	w0, [x1, 528]
 	ldr	x2, [x2, #:lo12:.LANCHOR110]
 	ldrh	w2, [x2, 120]
-	cbz	w2, .L1046
+	cbz	w2, .L1036
 	udiv	w0, w0, w2
 	str	w0, [x1, 532]
-.L1046:
+.L1036:
 	ret
-.L1052:
+.L1042:
 	ldrh	w3, [x6, x1, lsl 1]
 	cmp	w3, w8
-	beq	.L1050
+	beq	.L1040
 	add	x4, x7, x1, lsl 2
 	ldrb	w4, [x4, 2]
 	and	w4, w4, 224
 	cmp	w4, 160
-	bne	.L1051
+	bne	.L1041
 	add	w0, w0, w3
-.L1050:
+.L1040:
 	add	x1, x1, 1
-	b	.L1049
-.L1051:
+	b	.L1039
+.L1041:
 	add	w2, w2, w3
-	b	.L1050
+	b	.L1040
 	.size	ftl_total_vpn_update, .-ftl_total_vpn_update
 	.section	.text.ftl_vpn_update,"ax",@progbits
 	.align	2
@@ -6245,21 +6350,21 @@ ftl_vpn_update:
 	and	w19, w0, 65535
 	mov	w0, w19
 	bl	zftl_list_update_data_list
-	adrp	x0, .LANCHOR9
+	adrp	x0, .LANCHOR11
 	ubfiz	x19, x19, 1, 16
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrh	w0, [x0, x19]
-	cbnz	w0, .L1059
+	cbnz	w0, .L1049
 	adrp	x1, .LANCHOR122
 	mov	w0, 1
 	str	w0, [x1, #:lo12:.LANCHOR122]
-.L1057:
+.L1047:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1059:
+.L1049:
 	mov	w0, 0
-	b	.L1057
+	b	.L1047
 	.size	ftl_vpn_update, .-ftl_vpn_update
 	.section	.text.ftl_vpn_decrement,"ax",@progbits
 	.align	2
@@ -6272,16 +6377,16 @@ ftl_vpn_decrement:
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1062
-	adrp	x0, .LANCHOR9
+	beq	.L1052
+	adrp	x0, .LANCHOR11
 	uxtw	x1, w19
 	lsl	x2, x1, 1
-	ldr	x3, [x0, #:lo12:.LANCHOR9]
+	ldr	x3, [x0, #:lo12:.LANCHOR11]
 	ldrh	w0, [x3, x2]
-	cbnz	w0, .L1063
-	adrp	x0, .LANCHOR7
+	cbnz	w0, .L1053
+	adrp	x0, .LANCHOR9
 	mov	w2, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR7]
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	add	x1, x0, x1, lsl 2
 	adrp	x0, .LC65
 	add	x0, x0, :lo12:.LC65
@@ -6289,40 +6394,40 @@ ftl_vpn_decrement:
 	mov	w1, w19
 	ubfx	x3, x3, 5, 3
 	bl	printf
-.L1068:
+.L1058:
 	mov	w0, 0
-	b	.L1061
-.L1063:
+	b	.L1051
+.L1053:
 	sub	w0, w0, #1
 	strh	w0, [x3, x2]
-.L1062:
-	adrp	x20, .LANCHOR73
-	ldrh	w0, [x20, #:lo12:.LANCHOR73]
+.L1052:
+	adrp	x20, .LANCHOR72
+	ldrh	w0, [x20, #:lo12:.LANCHOR72]
 	cmp	w19, w0
-	beq	.L1068
+	beq	.L1058
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L1065
-	strh	w19, [x20, #:lo12:.LANCHOR73]
-	b	.L1068
-.L1065:
+	bne	.L1055
+	strh	w19, [x20, #:lo12:.LANCHOR72]
+	b	.L1058
+.L1055:
 	bl	ftl_vpn_update
 	cmp	w0, 0
 	adrp	x1, .LANCHOR123
 	cset	w0, ne
-	ldrh	w3, [x20, #:lo12:.LANCHOR73]
+	ldrh	w3, [x20, #:lo12:.LANCHOR72]
 	ldrh	w2, [x1, #:lo12:.LANCHOR123]
-	strh	w19, [x20, #:lo12:.LANCHOR73]
+	strh	w19, [x20, #:lo12:.LANCHOR72]
 	add	w2, w2, 1
 	and	w2, w2, 65535
 	cmp	w2, 7
 	csel	w2, w2, wzr, ls
 	strh	w2, [x1, #:lo12:.LANCHOR123]
 	and	x2, x2, 65535
-	adrp	x1, .LANCHOR74
-	add	x1, x1, :lo12:.LANCHOR74
+	adrp	x1, .LANCHOR73
+	add	x1, x1, :lo12:.LANCHOR73
 	strh	w3, [x1, x2, lsl 1]
-.L1061:
+.L1051:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -6343,27 +6448,27 @@ lpa_hash_update_ppa:
 	ldr	x8, [x4, #:lo12:.LANCHOR117]
 	adrp	x4, .LANCHOR118
 	ldr	x4, [x4, #:lo12:.LANCHOR118]
-.L1071:
+.L1061:
 	cmp	w6, w12
-	beq	.L1075
+	beq	.L1065
 	uxtw	x11, w6
 	lsl	x10, x11, 2
 	add	x13, x8, x10
 	ldr	w10, [x8, x10]
 	cmp	w0, w10
 	lsl	x10, x11, 1
-	bne	.L1072
+	bne	.L1062
 	mov	w6, -1
 	str	w6, [x13]
 	cmp	w7, w12
-	bne	.L1073
+	bne	.L1063
 	add	x6, x3, :lo12:.LANCHOR116
 	ldrh	w7, [x4, x10]
 	strh	w7, [x6, x5, lsl 1]
-.L1074:
+.L1064:
 	mov	w6, -1
 	strh	w6, [x4, x11, lsl 1]
-.L1075:
+.L1065:
 	uxtw	x6, w2
 	add	x3, x3, :lo12:.LANCHOR116
 	cmn	w1, #1
@@ -6371,13 +6476,13 @@ lpa_hash_update_ppa:
 	ldrh	w0, [x3, x5, lsl 1]
 	strh	w2, [x3, x5, lsl 1]
 	strh	w0, [x4, x6, lsl 1]
-	beq	.L1082
+	beq	.L1072
 	stp	x29, x30, [sp, -16]!
-	adrp	x0, .LANCHOR75
+	adrp	x0, .LANCHOR74
 	add	x29, sp, 0
-	ldrh	w3, [x0, #:lo12:.LANCHOR75]
-	adrp	x0, .LANCHOR32
-	ldrb	w2, [x0, #:lo12:.LANCHOR32]
+	ldrh	w3, [x0, #:lo12:.LANCHOR74]
+	adrp	x0, .LANCHOR31
+	ldrb	w2, [x0, #:lo12:.LANCHOR31]
 	mov	w0, 24
 	lsr	w1, w1, w3
 	sub	w0, w0, w2
@@ -6386,22 +6491,22 @@ lpa_hash_update_ppa:
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
 	and	w1, w0, w1
-	adrp	x0, .LANCHOR76
-	ldrb	w0, [x0, #:lo12:.LANCHOR76]
+	adrp	x0, .LANCHOR75
+	ldrb	w0, [x0, #:lo12:.LANCHOR75]
 	udiv	w0, w1, w0
 	bl	ftl_vpn_decrement
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
-.L1073:
+.L1063:
 	ldrh	w6, [x4, x10]
 	strh	w6, [x4, w7, uxtw 1]
-	b	.L1074
-.L1072:
+	b	.L1064
+.L1062:
 	mov	w7, w6
 	ldrh	w6, [x4, x10]
-	b	.L1071
-.L1082:
+	b	.L1061
+.L1072:
 	mov	w0, -1
 	ret
 	.size	lpa_hash_update_ppa, .-lpa_hash_update_ppa
@@ -6411,25 +6516,25 @@ lpa_hash_update_ppa:
 	.type	ftl_mask_bad_block, %function
 ftl_mask_bad_block:
 	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LANCHOR32
+	adrp	x1, .LANCHOR31
 	mov	w6, 24
 	mov	w4, 1
 	add	x29, sp, 0
-	ldrb	w1, [x1, #:lo12:.LANCHOR32]
+	ldrb	w1, [x1, #:lo12:.LANCHOR31]
 	stp	x19, x20, [sp, 16]
 	sub	w6, w6, w1
 	lsl	w1, w4, w1
 	sub	w1, w1, #1
 	lsr	w2, w0, w6
 	and	w1, w1, w2
-	adrp	x2, .LANCHOR76
+	adrp	x2, .LANCHOR75
 	and	w1, w1, 255
-	ldrb	w5, [x2, #:lo12:.LANCHOR76]
+	ldrb	w5, [x2, #:lo12:.LANCHOR75]
 	cmp	w5, 1
 	mul	w2, w1, w5
 	and	w19, w2, 255
-	adrp	x2, .LANCHOR75
-	ldrh	w3, [x2, #:lo12:.LANCHOR75]
+	adrp	x2, .LANCHOR74
+	ldrh	w3, [x2, #:lo12:.LANCHOR74]
 	lsr	w0, w0, w3
 	sub	w3, w6, w3
 	lsl	w3, w4, w3
@@ -6438,34 +6543,34 @@ ftl_mask_bad_block:
 	and	w4, w3, 65535
 	udiv	w3, w3, w5
 	and	w20, w3, 65535
-	bls	.L1086
+	bls	.L1076
 	sub	w2, w5, #1
 	and	w2, w2, w4
 	add	w2, w19, w2
 	and	w19, w2, 255
-.L1086:
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 14, .L1087
+.L1076:
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 14, .L1077
 	adrp	x0, .LC66
 	and	w3, w3, 65535
 	mov	w2, w19
 	add	x0, x0, :lo12:.LC66
 	bl	printf
-.L1087:
-	adrp	x0, .LANCHOR6
-	ldrh	w0, [x0, #:lo12:.LANCHOR6]
+.L1077:
+	adrp	x0, .LANCHOR8
+	ldrh	w0, [x0, #:lo12:.LANCHOR8]
 	cmp	w0, w20
-	bls	.L1085
-	adrp	x0, .LANCHOR7
+	bls	.L1075
+	adrp	x0, .LANCHOR9
 	mov	w2, 1
 	lsl	w2, w2, w19
-	ldr	x0, [x0, #:lo12:.LANCHOR7]
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	add	x20, x0, x20, uxth 2
 	ldrb	w19, [x20, 3]
 	orr	w2, w2, w19
 	strb	w2, [x20, 3]
-.L1085:
+.L1075:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -6480,24 +6585,24 @@ gc_free_bad_sblk:
 	stp	x23, x24, [sp, 48]
 	and	w23, w0, 65535
 	str	x27, [sp, 80]
-	adrp	x27, .LANCHOR71
-	add	x0, x27, :lo12:.LANCHOR71
+	adrp	x27, .LANCHOR70
+	add	x0, x27, :lo12:.LANCHOR70
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
-	ldr	w0, [x0, 2120]
-	cbz	w0, .L1108
+	ldr	w0, [x0, 2200]
+	cbz	w0, .L1098
 	adrp	x22, .LC67
 	mov	w24, 20041
 	add	x22, x22, :lo12:.LC67
 	mov	w26, 0
 	movk	w24, 0x444b, lsl 16
-.L1095:
-	adrp	x0, .LANCHOR80
-	ldrb	w0, [x0, #:lo12:.LANCHOR80]
+.L1085:
+	adrp	x0, .LANCHOR79
+	ldrb	w0, [x0, #:lo12:.LANCHOR79]
 	cmp	w0, w26
-	bhi	.L1105
-.L1108:
+	bhi	.L1095
+.L1098:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -6506,84 +6611,84 @@ gc_free_bad_sblk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1105:
-	adrp	x0, .LANCHOR76
-	adrp	x1, .LANCHOR32
-	adrp	x21, .LANCHOR75
-	ldrb	w2, [x0, #:lo12:.LANCHOR76]
-	ldrb	w3, [x1, #:lo12:.LANCHOR32]
+.L1095:
+	adrp	x0, .LANCHOR75
+	adrp	x1, .LANCHOR31
+	adrp	x21, .LANCHOR74
+	ldrb	w2, [x0, #:lo12:.LANCHOR75]
+	ldrb	w3, [x1, #:lo12:.LANCHOR31]
 	mov	w1, 24
 	and	w0, w2, 65535
 	cmp	w2, 1
 	sub	w1, w1, w3
-	ldrh	w3, [x21, #:lo12:.LANCHOR75]
+	ldrh	w3, [x21, #:lo12:.LANCHOR74]
 	sdiv	w19, w26, w2
 	sub	w1, w1, w3
 	lsl	w19, w19, w1
 	madd	w19, w23, w0, w19
 	and	w19, w19, 65535
-	bls	.L1096
+	bls	.L1086
 	sub	w0, w0, #1
 	and	w0, w0, w26
 	add	w19, w19, w0
 	and	w19, w19, 65535
-.L1096:
+.L1086:
 	adrp	x25, .LANCHOR124
 	add	x25, x25, :lo12:.LANCHOR124
 	mov	w20, 0
-.L1097:
-	add	x0, x27, :lo12:.LANCHOR71
-	ldr	w1, [x0, 2120]
+.L1087:
+	add	x0, x27, :lo12:.LANCHOR70
+	ldr	w1, [x0, 2200]
 	cmp	w20, w1
-	bcc	.L1104
+	bcc	.L1094
 	add	w26, w26, 1
 	and	w26, w26, 65535
-	b	.L1095
-.L1104:
+	b	.L1085
+.L1094:
 	add	x0, x0, x20, sxtw 1
-	ldrh	w0, [x0, 2124]
+	ldrh	w0, [x0, 2204]
 	cmp	w0, w19
-	bne	.L1098
+	bne	.L1088
 	mov	w1, w19
 	mov	x0, x22
 	bl	printf
 	ldrb	w0, [x25]
-	cbnz	w0, .L1099
-	adrp	x0, .LANCHOR81
-	ldrb	w0, [x0, #:lo12:.LANCHOR81]
-	cbz	w0, .L1100
-.L1099:
+	cbnz	w0, .L1089
+	adrp	x0, .LANCHOR80
+	ldrb	w0, [x0, #:lo12:.LANCHOR80]
+	cbz	w0, .L1090
+.L1089:
 	adrp	x0, .LANCHOR110
 	ldr	x0, [x0, #:lo12:.LANCHOR110]
 	ldr	w0, [x0, 156]
 	cmp	w0, w24
-	beq	.L1101
-.L1100:
-	ldrh	w0, [x21, #:lo12:.LANCHOR75]
+	beq	.L1091
+.L1090:
+	ldrh	w0, [x21, #:lo12:.LANCHOR74]
 	lsl	w0, w19, w0
 	bl	ftl_mask_bad_block
-.L1101:
-	add	x1, x27, :lo12:.LANCHOR71
+.L1091:
+	add	x1, x27, :lo12:.LANCHOR70
 	mov	w0, w20
-	ldr	w2, [x1, 2120]
-.L1102:
+	ldr	w2, [x1, 2200]
+.L1092:
 	cmp	w0, w2
-	bcc	.L1103
-	add	x0, x27, :lo12:.LANCHOR71
+	bcc	.L1093
+	add	x0, x27, :lo12:.LANCHOR70
 	sub	w2, w2, #1
-	str	w2, [x0, 2120]
-.L1098:
+	str	w2, [x0, 2200]
+.L1088:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L1097
-.L1103:
+	b	.L1087
+.L1093:
 	add	w3, w0, 1
 	add	x0, x1, x0, sxtw 1
 	add	x4, x1, x3, sxtw 1
-	ldrh	w4, [x4, 2124]
-	strh	w4, [x0, 2124]
+	ldrh	w4, [x4, 2204]
+	strh	w4, [x0, 2204]
 	and	w0, w3, 65535
-	b	.L1102
+	b	.L1092
 	.size	gc_free_bad_sblk, .-gc_free_bad_sblk
 	.section	.text.ftl_free_sblk,"ax",@progbits
 	.align	2
@@ -6593,17 +6698,17 @@ ftl_free_sblk:
 	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR7
+	adrp	x23, .LANCHOR9
 	and	x24, x0, 65535
 	stp	x19, x20, [sp, 16]
-	ldr	x3, [x23, #:lo12:.LANCHOR7]
+	ldr	x3, [x23, #:lo12:.LANCHOR9]
 	lsl	x19, x24, 2
 	stp	x21, x22, [sp, 32]
 	mov	x21, x24
 	add	x20, x3, x19
 	ldrb	w0, [x20, 2]
 	ubfx	x22, x0, 5, 3
-	tbz	x0, 3, .L1115
+	tbz	x0, 3, .L1105
 	adrp	x2, .LANCHOR110
 	ldrh	w1, [x3, x19]
 	adrp	x8, .LANCHOR125
@@ -6613,9 +6718,9 @@ ftl_free_sblk:
 	ldrh	w8, [x8, #:lo12:.LANCHOR125]
 	ldrh	w4, [x7, 74]
 	ubfx	x5, x2, 11, 8
-	adrp	x2, .LANCHOR8
+	adrp	x2, .LANCHOR10
 	add	w4, w1, w4
-	ldrh	w2, [x2, #:lo12:.LANCHOR8]
+	ldrh	w2, [x2, #:lo12:.LANCHOR10]
 	and	w6, w4, 65535
 	ldrh	w4, [x7, 72]
 	add	w4, w5, w4
@@ -6623,22 +6728,22 @@ ftl_free_sblk:
 	and	w4, w4, 65535
 	add	w7, w7, w4
 	cmp	w7, w8
-	ble	.L1116
+	ble	.L1106
 	adrp	x4, .LANCHOR101
 	adrp	x7, .LANCHOR105
 	ldrh	w6, [x4, #:lo12:.LANCHOR101]
-	adrp	x4, .LANCHOR93
+	adrp	x4, .LANCHOR91
 	ldrh	w7, [x7, #:lo12:.LANCHOR105]
-	ldrh	w4, [x4, #:lo12:.LANCHOR93]
+	ldrh	w4, [x4, #:lo12:.LANCHOR91]
 	add	w6, w6, 7
 	add	w4, w4, w7
 	cmp	w6, w4
-	blt	.L1117
-.L1122:
+	blt	.L1107
+.L1112:
 	mov	w4, 2
 	bfi	w0, w4, 3, 2
-	b	.L1133
-.L1117:
+	b	.L1123
+.L1107:
 	adrp	x4, .LANCHOR98
 	adrp	x7, .LANCHOR103
 	ldrh	w6, [x4, #:lo12:.LANCHOR98]
@@ -6651,15 +6756,15 @@ ftl_free_sblk:
 	ldrh	w7, [x7, #:lo12:.LANCHOR99]
 	add	w4, w4, w7
 	cmp	w6, w4
-	blt	.L1122
-.L1135:
+	blt	.L1112
+.L1125:
 	and	w0, w0, -25
-.L1133:
+.L1123:
 	strb	w0, [x20, 2]
-.L1118:
+.L1108:
 	ldrb	w0, [x20, 2]
 	ands	w0, w0, 24
-	bne	.L1123
+	bne	.L1113
 	mul	w2, w5, w2
 	ldrh	w0, [x3, x19]
 	add	w2, w2, w2, lsl 1
@@ -6670,10 +6775,10 @@ ftl_free_sblk:
 	ldr	w0, [x3, x19]
 	bfi	w0, w2, 11, 8
 	str	w0, [x3, x19]
-.L1124:
+.L1114:
 	mov	w0, w21
 	bl	zftl_remove_data_node
-	ldr	x0, [x23, #:lo12:.LANCHOR7]
+	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	add	w22, w22, 6
 	and	w22, w22, 7
 	add	x19, x0, x19
@@ -6681,26 +6786,26 @@ ftl_free_sblk:
 	ldrb	w0, [x19, 2]
 	and	w0, w0, 31
 	strb	w0, [x19, 2]
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	strh	wzr, [x0, x24, lsl 1]
-	bhi	.L1127
+	bhi	.L1117
 	mov	w0, w21
 	bl	gc_free_bad_sblk
-.L1127:
+.L1117:
 	ldrb	w0, [x20, 2]
-	tbz	x0, 3, .L1128
-	adrp	x0, .LANCHOR10
-	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	tbz	x0, 3, .L1118
+	adrp	x0, .LANCHOR12
+	ldr	x0, [x0, #:lo12:.LANCHOR12]
 	ldrh	w1, [x0, 586]
 	cmp	w1, w21
-	bne	.L1128
+	bne	.L1118
 	mov	w1, -1
 	ldrh	w2, [x0, 590]
 	strh	w1, [x0, 586]
 	mov	w1, 65535
 	cmp	w2, w1
-	bne	.L1128
+	bne	.L1118
 	strh	w21, [x0, 590]
 	mov	w1, w21
 	ldp	x19, x20, [sp, 16]
@@ -6710,12 +6815,12 @@ ftl_free_sblk:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	b	printf
-.L1116:
+.L1106:
 	madd	w4, w2, w4, w6
 	adrp	x6, .LANCHOR126
 	ldrh	w6, [x6, #:lo12:.LANCHOR126]
 	cmp	w4, w6
-	ble	.L1118
+	ble	.L1108
 	adrp	x4, .LANCHOR98
 	adrp	x7, .LANCHOR103
 	ldrh	w6, [x4, #:lo12:.LANCHOR98]
@@ -6728,45 +6833,45 @@ ftl_free_sblk:
 	add	w4, w4, w7
 	add	w7, w6, 7
 	cmp	w7, w4
-	bge	.L1135
+	bge	.L1125
 	adrp	x7, .LANCHOR101
 	adrp	x10, .LANCHOR105
 	ldrh	w8, [x7, #:lo12:.LANCHOR101]
-	adrp	x7, .LANCHOR93
+	adrp	x7, .LANCHOR91
 	ldrh	w10, [x10, #:lo12:.LANCHOR105]
-	ldrh	w7, [x7, #:lo12:.LANCHOR93]
+	ldrh	w7, [x7, #:lo12:.LANCHOR91]
 	add	w8, w8, 7
 	add	w7, w7, w10
 	cmp	w8, w7
-	bge	.L1122
+	bge	.L1112
 	add	w6, w6, 23
 	cmp	w4, w6
-	bgt	.L1122
-	b	.L1135
-.L1123:
+	bgt	.L1112
+	b	.L1125
+.L1113:
 	cmp	w0, 16
-	bne	.L1124
+	bne	.L1114
 	sdiv	w2, w1, w2
 	ldr	w0, [x3, x19]
 	add	w2, w2, w2, lsl 1
 	add	w2, w5, w2, lsr 2
-.L1134:
+.L1124:
 	bfi	w0, w2, 11, 8
 	asr	w1, w1, 5
 	str	w0, [x3, x19]
 	bfi	w0, w1, 0, 11
 	strh	w0, [x3, x19]
-	b	.L1124
-.L1115:
+	b	.L1114
+.L1105:
 	tst	w0, 24
-	bne	.L1124
+	bne	.L1114
 	adrp	x1, .LANCHOR107
 	ldrh	w1, [x1, #:lo12:.LANCHOR107]
-	cbnz	w1, .L1124
+	cbnz	w1, .L1114
 	adrp	x1, .LANCHOR105
 	ldrh	w4, [x1, #:lo12:.LANCHOR105]
 	cmp	w4, 15
-	bhi	.L1124
+	bhi	.L1114
 	adrp	x1, .LANCHOR97
 	adrp	x2, .LANCHOR103
 	ldrh	w1, [x1, #:lo12:.LANCHOR97]
@@ -6779,29 +6884,29 @@ ftl_free_sblk:
 	ldrh	w2, [x2, #:lo12:.LANCHOR98]
 	add	w2, w2, 16
 	cmp	w1, w2
-	ble	.L1124
+	ble	.L1114
 	adrp	x1, .LANCHOR101
 	ldrh	w2, [x1, #:lo12:.LANCHOR101]
-	adrp	x1, .LANCHOR93
-	ldrh	w1, [x1, #:lo12:.LANCHOR93]
+	adrp	x1, .LANCHOR91
+	ldrh	w1, [x1, #:lo12:.LANCHOR91]
 	add	w2, w2, 7
 	add	w1, w1, w4
 	cmp	w2, w1
-	blt	.L1124
+	blt	.L1114
 	mov	w1, 2
 	bfi	w0, w1, 3, 2
 	strb	w0, [x20, 2]
-	adrp	x0, .LANCHOR8
+	adrp	x0, .LANCHOR10
 	ldrh	w1, [x3, x19]
-	ldrh	w0, [x0, #:lo12:.LANCHOR8]
+	ldrh	w0, [x0, #:lo12:.LANCHOR10]
 	and	w1, w1, 2047
 	sdiv	w0, w1, w0
 	add	w2, w0, w0, lsl 1
 	ldr	w0, [x3, x19]
 	ubfx	x4, x0, 11, 8
 	add	w2, w4, w2, lsr 2
-	b	.L1134
-.L1128:
+	b	.L1124
+.L1118:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6817,20 +6922,20 @@ gc_free_src_blk:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR71
+	adrp	x21, .LANCHOR70
 	stp	x23, x24, [sp, 48]
 	adrp	x22, .LC69
-	adrp	x23, .LANCHOR9
-	add	x21, x21, :lo12:.LANCHOR71
+	adrp	x23, .LANCHOR11
+	add	x21, x21, :lo12:.LANCHOR70
 	mov	x24, x23
 	add	x22, x22, :lo12:.LC69
 	stp	x19, x20, [sp, 16]
 	mov	w20, 0
 	stp	x25, x26, [sp, 64]
-.L1137:
+.L1127:
 	ldrh	w0, [x21, 56]
 	cmp	w0, w20
-	bhi	.L1151
+	bhi	.L1141
 	strh	wzr, [x21, 56]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6838,114 +6943,114 @@ gc_free_src_blk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1151:
+.L1141:
 	add	x0, x21, x20, sxtw 1
 	ldrh	w25, [x0, 58]
-	ldr	x0, [x23, #:lo12:.LANCHOR9]
+	ldr	x0, [x23, #:lo12:.LANCHOR11]
 	mov	x19, x25
 	lsl	x26, x25, 1
 	ldrh	w2, [x0, x26]
-	cbz	w2, .L1138
+	cbz	w2, .L1128
 	mov	w1, w25
 	mov	x0, x22
 	bl	printf
-.L1138:
-	ldr	x0, [x24, #:lo12:.LANCHOR9]
+.L1128:
+	ldr	x0, [x24, #:lo12:.LANCHOR11]
 	strh	wzr, [x0, x26]
-	adrp	x0, .LANCHOR7
-	ldr	x0, [x0, #:lo12:.LANCHOR7]
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	add	x25, x0, x25, lsl 2
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L1139
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 8, .L1129
 	ldrb	w2, [x25, 2]
 	adrp	x0, .LC70
 	mov	w1, w19
 	add	x0, x0, :lo12:.LC70
 	ubfx	x2, x2, 5, 3
 	bl	printf
-.L1139:
+.L1129:
 	ldrb	w0, [x25, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L1140
+	beq	.L1130
 	tst	w0, 192
-	bne	.L1141
-.L1140:
+	bne	.L1131
+.L1130:
 	adrp	x1, .LANCHOR127
 	adrp	x0, .LC0
-	mov	w2, 1362
+	mov	w2, 1363
 	add	x1, x1, :lo12:.LANCHOR127
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1141:
+.L1131:
 	mov	w0, w19
 	bl	ftl_free_sblk
-	adrp	x0, .LANCHOR10
-	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	adrp	x0, .LANCHOR12
+	ldr	x0, [x0, #:lo12:.LANCHOR12]
 	ldrh	w2, [x0, 124]
-	cbz	w2, .L1142
+	cbz	w2, .L1132
 	add	x3, x0, 392
 	mov	w1, 0
-.L1144:
+.L1134:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L1143
+	bne	.L1133
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 392]
 	strh	w2, [x0, 124]
-.L1142:
+.L1132:
 	ldrh	w2, [x0, 120]
-	cbz	w2, .L1145
+	cbz	w2, .L1135
 	add	x3, x0, 136
 	mov	w1, 0
-.L1147:
+.L1137:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L1146
+	bne	.L1136
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 136]
 	strh	w2, [x0, 120]
-.L1145:
+.L1135:
 	ldrh	w2, [x0, 122]
-	cbz	w2, .L1148
+	cbz	w2, .L1138
 	add	x3, x0, 264
 	mov	w1, 0
-.L1150:
+.L1140:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L1149
+	bne	.L1139
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 264]
 	strh	w2, [x0, 122]
-.L1148:
+.L1138:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L1137
-.L1143:
+	b	.L1127
+.L1133:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L1144
-	b	.L1142
-.L1146:
+	bne	.L1134
+	b	.L1132
+.L1136:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L1147
-	b	.L1145
-.L1149:
+	bne	.L1137
+	b	.L1135
+.L1139:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L1150
-	b	.L1148
+	bne	.L1140
+	b	.L1138
 	.size	gc_free_src_blk, .-gc_free_src_blk
 	.section	.text.print_ftl_debug_info,"ax",@progbits
 	.align	2
@@ -6961,13 +7066,13 @@ print_ftl_debug_info:
 	adrp	x2, .LANCHOR97
 	stp	x19, x20, [sp, 48]
 	adrp	x19, .LANCHOR110
-	adrp	x20, .LANCHOR10
+	adrp	x20, .LANCHOR12
 	ldrh	w6, [x2, #:lo12:.LANCHOR97]
 	adrp	x2, .LANCHOR107
 	ldr	x1, [x19, #:lo12:.LANCHOR110]
 	ldrh	w5, [x2, #:lo12:.LANCHOR107]
 	adrp	x2, .LANCHOR105
-	ldr	x0, [x20, #:lo12:.LANCHOR10]
+	ldr	x0, [x20, #:lo12:.LANCHOR12]
 	ldrh	w4, [x2, #:lo12:.LANCHOR105]
 	adrp	x2, .LANCHOR103
 	ldr	w8, [x8, #:lo12:.LANCHOR128]
@@ -6979,8 +7084,8 @@ print_ftl_debug_info:
 	str	w8, [sp, 16]
 	ldr	w0, [x0, 524]
 	str	w0, [sp, 8]
-	adrp	x0, .LANCHOR93
-	ldrh	w0, [x0, #:lo12:.LANCHOR93]
+	adrp	x0, .LANCHOR91
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	str	w0, [sp]
 	adrp	x0, .LC71
 	add	x0, x0, :lo12:.LC71
@@ -7019,12 +7124,12 @@ print_ftl_debug_info:
 	adrp	x0, .LC74
 	add	x0, x0, :lo12:.LC74
 	bl	printf
-	adrp	x0, .LANCHOR87
-	ldrh	w5, [x0, #:lo12:.LANCHOR87]
-	adrp	x0, .LANCHOR94
-	ldrh	w4, [x0, #:lo12:.LANCHOR94]
-	adrp	x0, .LANCHOR70
-	ldrh	w3, [x0, #:lo12:.LANCHOR70]
+	adrp	x0, .LANCHOR86
+	ldrh	w5, [x0, #:lo12:.LANCHOR86]
+	adrp	x0, .LANCHOR93
+	ldrh	w4, [x0, #:lo12:.LANCHOR93]
+	adrp	x0, .LANCHOR69
+	ldrh	w3, [x0, #:lo12:.LANCHOR69]
 	adrp	x0, .LANCHOR102
 	ldrh	w2, [x0, #:lo12:.LANCHOR102]
 	adrp	x0, .LANCHOR100
@@ -7032,7 +7137,7 @@ print_ftl_debug_info:
 	adrp	x0, .LC75
 	add	x0, x0, :lo12:.LC75
 	bl	printf
-	ldr	x0, [x20, #:lo12:.LANCHOR10]
+	ldr	x0, [x20, #:lo12:.LANCHOR12]
 	ldr	x1, [x19, #:lo12:.LANCHOR110]
 	ldp	x29, x30, [sp, 32]
 	ldrh	w4, [x0, 590]
@@ -7056,65 +7161,65 @@ ftl_write_buf:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	str	x21, [sp, 32]
-	cbnz	x0, .L1177
+	cbnz	x0, .L1167
 	adrp	x1, .LANCHOR130
 	add	x1, x1, :lo12:.LANCHOR130
-	mov	w2, 803
+	mov	w2, 808
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	bl	print_ftl_debug_info
 	mov	w0, -1
-.L1176:
+.L1166:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1180:
+.L1170:
 	mov	x1, x19
-	adrp	x0, .LANCHOR66
-	add	x0, x0, :lo12:.LANCHOR66
+	adrp	x0, .LANCHOR65
+	add	x0, x0, :lo12:.LANCHOR65
 	bl	buf_add_tail
 	adrp	x1, .LANCHOR110
 	ldrb	w3, [x19, 56]
-	ldrb	w0, [x21, #:lo12:.LANCHOR67]
+	ldrb	w0, [x21, #:lo12:.LANCHOR66]
 	ldr	x1, [x1, #:lo12:.LANCHOR110]
 	add	w0, w0, 1
 	and	w0, w0, 255
-	strb	w0, [x21, #:lo12:.LANCHOR67]
+	strb	w0, [x21, #:lo12:.LANCHOR66]
 	ldr	w2, [x1, 16]
 	add	w2, w2, w3
 	str	w2, [x1, 16]
 	ldr	w2, [x1, 32]
 	add	w2, w2, 1
 	str	w2, [x1, 32]
-	b	.L1176
-.L1177:
+	b	.L1166
+.L1167:
 	mov	x19, x0
 	adrp	x0, .LANCHOR131
 	mov	x20, x0
 	ldrb	w1, [x0, #:lo12:.LANCHOR131]
 	ldrb	w2, [x19, 56]
 	cmp	w2, w1
-	bls	.L1182
+	bls	.L1172
 	adrp	x1, .LANCHOR130
 	adrp	x0, .LC0
-	mov	w2, 810
+	mov	w2, 815
 	add	x1, x1, :lo12:.LANCHOR130
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1182:
+.L1172:
 	ldrb	w0, [x19, 56]
-	adrp	x21, .LANCHOR67
-	cbz	w0, .L1179
+	adrp	x21, .LANCHOR66
+	cbz	w0, .L1169
 	ldrb	w1, [x20, #:lo12:.LANCHOR131]
 	cmp	w1, w0
-	bcs	.L1180
-.L1179:
+	bcs	.L1170
+.L1169:
 	mov	x0, x19
 	bl	zbuf_free
-	ldrb	w0, [x21, #:lo12:.LANCHOR67]
-	b	.L1176
+	ldrb	w0, [x21, #:lo12:.LANCHOR66]
+	b	.L1166
 	.size	ftl_write_buf, .-ftl_write_buf
 	.section	.text.ftl_write_completed,"ax",@progbits
 	.align	2
@@ -7124,28 +7229,28 @@ ftl_write_completed:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR56
+	adrp	x21, .LANCHOR55
 	stp	x19, x20, [sp, 16]
-	add	x22, x21, :lo12:.LANCHOR56
+	add	x22, x21, :lo12:.LANCHOR55
 	stp	x23, x24, [sp, 48]
-	adrp	x20, .LANCHOR65
+	adrp	x20, .LANCHOR64
 	mov	w23, 20041
-	add	x20, x20, :lo12:.LANCHOR65
+	add	x20, x20, :lo12:.LANCHOR64
 	str	x25, [sp, 64]
 	movk	w23, 0x444b, lsl 16
 	mov	w25, 0
-.L1188:
+.L1178:
 	ldrb	w0, [x20]
 	cmp	w0, 255
-	bne	.L1199
+	bne	.L1189
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1199:
-	add	x1, x21, :lo12:.LANCHOR56
+.L1189:
+	add	x1, x21, :lo12:.LANCHOR55
 	lsl	x2, x0, 6
 	add	x24, x1, x2
 	ubfiz	x19, x0, 6, 8
@@ -7154,96 +7259,96 @@ ftl_write_completed:
 	strb	w1, [x20]
 	ldr	w1, [x24, 52]
 	cmn	w1, #1
-	bne	.L1189
+	bne	.L1179
 	adrp	x1, .LANCHOR124
 	ldrb	w1, [x1, #:lo12:.LANCHOR124]
-	cbnz	w1, .L1190
-	adrp	x1, .LANCHOR81
-	ldrb	w1, [x1, #:lo12:.LANCHOR81]
-	cbz	w1, .L1191
-.L1190:
+	cbnz	w1, .L1180
+	adrp	x1, .LANCHOR80
+	ldrb	w1, [x1, #:lo12:.LANCHOR80]
+	cbz	w1, .L1181
+.L1180:
 	adrp	x1, .LANCHOR110
 	ldr	x1, [x1, #:lo12:.LANCHOR110]
 	ldr	w1, [x1, 156]
 	cmp	w1, w23
-	beq	.L1192
-.L1191:
+	beq	.L1182
+.L1181:
 	add	x1, x22, x0, lsl 6
 	mov	w2, 24
 	mov	w5, 65535
 	ldr	w3, [x1, 40]
-	adrp	x1, .LANCHOR75
-	ldrh	w4, [x1, #:lo12:.LANCHOR75]
-	adrp	x1, .LANCHOR32
-	ldrb	w1, [x1, #:lo12:.LANCHOR32]
+	adrp	x1, .LANCHOR74
+	ldrh	w4, [x1, #:lo12:.LANCHOR74]
+	adrp	x1, .LANCHOR31
+	ldrb	w1, [x1, #:lo12:.LANCHOR31]
 	sub	w1, w2, w1
 	sub	w2, w1, w4
 	mov	w1, 1
 	lsr	w4, w3, w4
 	lsl	w1, w1, w2
-	adrp	x2, .LANCHOR76
+	adrp	x2, .LANCHOR75
 	sub	w1, w1, #1
-	ldrb	w2, [x2, #:lo12:.LANCHOR76]
+	ldrb	w2, [x2, #:lo12:.LANCHOR75]
 	and	w1, w1, w4
 	udiv	w1, w1, w2
-	adrp	x2, .LANCHOR10
+	adrp	x2, .LANCHOR12
 	mov	x24, x2
-	ldr	x4, [x2, #:lo12:.LANCHOR10]
+	ldr	x4, [x2, #:lo12:.LANCHOR12]
 	and	w25, w1, 65535
 	and	w1, w1, w5
 	ldr	w6, [x4, 560]
 	cmp	w6, w5
-	bne	.L1193
+	bne	.L1183
 	str	w1, [x4, 560]
 	str	w3, [x4, 564]
-.L1193:
+.L1183:
 	add	x0, x22, x0, lsl 6
 	ldr	w2, [x0, 36]
 	adrp	x0, .LC77
 	add	x0, x0, :lo12:.LC77
 	bl	printf
-	ldr	x0, [x24, #:lo12:.LANCHOR10]
+	ldr	x0, [x24, #:lo12:.LANCHOR12]
 	ldr	w1, [x0, 556]
 	add	w1, w1, 1
 	str	w1, [x0, 556]
 	ldrh	w1, [x0, 16]
 	cmp	w1, w25
-	bne	.L1194
+	bne	.L1184
 	strh	wzr, [x0, 22]
-.L1192:
+.L1182:
 	mov	x0, x19
 	mov	w25, 1
 	bl	ftl_write_buf
-	b	.L1188
-.L1194:
+	b	.L1178
+.L1184:
 	ldrh	w1, [x0, 48]
 	cmp	w1, w25
-	bne	.L1192
+	bne	.L1182
 	strh	wzr, [x0, 54]
-	b	.L1192
-.L1189:
-	cbz	w25, .L1197
+	b	.L1182
+.L1179:
+	cbz	w25, .L1187
 	ldp	w1, w2, [x24, 36]
 	adrp	x0, .LC78
 	add	x0, x0, :lo12:.LC78
 	bl	printf
 	mov	x0, x19
 	bl	ftl_write_buf
-	b	.L1188
-.L1197:
+	b	.L1178
+.L1187:
 	ldrh	w2, [x24, 48]
 	ldr	w0, [x24, 36]
 	ldr	w1, [x24, 44]
 	bl	lpa_hash_update_ppa
 	ldrb	w0, [x24, 2]
-	tbz	x0, 2, .L1198
+	tbz	x0, 2, .L1188
 	and	w0, w0, -3
 	strb	w0, [x24, 2]
-	b	.L1188
-.L1198:
+	b	.L1178
+.L1188:
 	mov	x0, x19
 	bl	zbuf_free
-	b	.L1188
+	b	.L1178
 	.size	ftl_write_completed, .-ftl_write_completed
 	.section	.text.zftl_add_read_buf,"ax",@progbits
 	.align	2
@@ -7253,8 +7358,8 @@ zftl_add_read_buf:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	str	x19, [sp, 16]
-	cbnz	x0, .L1205
-	mov	w2, 1143
+	cbnz	x0, .L1195
+	mov	w2, 1148
 	adrp	x1, .LANCHOR132
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR132
@@ -7263,20 +7368,20 @@ zftl_add_read_buf:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	print_ftl_debug_info
-.L1205:
+.L1195:
 	ldrb	w1, [x0, 56]
 	mov	x19, x0
 	adrp	x0, .LANCHOR131
 	ldrb	w0, [x0, #:lo12:.LANCHOR131]
 	cmp	w1, w0
-	bls	.L1207
+	bls	.L1197
 	adrp	x1, .LANCHOR132
 	adrp	x0, .LC0
-	mov	w2, 1150
+	mov	w2, 1155
 	add	x1, x1, :lo12:.LANCHOR132
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1207:
+.L1197:
 	mov	x1, x19
 	adrp	x0, .LANCHOR133
 	add	x0, x0, :lo12:.LANCHOR133
@@ -7289,100 +7394,20 @@ zftl_add_read_buf:
 	strb	w0, [x1, #:lo12:.LANCHOR134]
 	ret
 	.size	zftl_add_read_buf, .-zftl_add_read_buf
-	.section	.text.ftl_alloc_sblk,"ax",@progbits
-	.align	2
-	.global	ftl_alloc_sblk
-	.type	ftl_alloc_sblk, %function
-ftl_alloc_sblk:
-	stp	x29, x30, [sp, -64]!
-	cmp	w0, 5
-	add	x29, sp, 0
-	str	x23, [sp, 48]
-	and	w23, w0, 65535
-	stp	x21, x22, [sp, 32]
-	mov	w1, w23
-	stp	x19, x20, [sp, 16]
-	cset	w22, eq
-	mov	w21, w0
-	mov	w0, 0
-	bl	zftl_get_free_sblk
-	and	w19, w0, 65535
-	mov	w0, 65535
-	cmp	w19, w0
-	beq	.L1212
-	adrp	x0, .LANCHOR7
-	lsl	w22, w22, 1
-	ldr	x20, [x0, #:lo12:.LANCHOR7]
-	add	x20, x20, x19, uxth 2
-	ldrb	w0, [x20, 2]
-	tst	w0, 224
-	beq	.L1213
-	adrp	x1, .LANCHOR135
-	adrp	x0, .LC0
-	mov	w2, 939
-	add	x1, x1, :lo12:.LANCHOR135
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1213:
-	ldrb	w0, [x20, 2]
-	bfi	w0, w21, 5, 3
-	ubfx	x1, x0, 3, 2
-	orr	w1, w22, w1
-	bfi	w0, w1, 3, 2
-	strb	w0, [x20, 2]
-	and	w1, w0, 24
-	cmp	w1, 24
-	bne	.L1214
-	cbnz	w22, .L1214
-	mov	w1, 1
-	bfi	w0, w1, 3, 2
-	strb	w0, [x20, 2]
-.L1214:
-	mov	w0, w19
-	ldr	x23, [sp, 48]
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 64
-	ret
-.L1212:
-	bl	print_ftl_debug_info
-	adrp	x20, .LC79
-	mov	w2, w21
-	add	x20, x20, :lo12:.LC79
-	mov	w1, w19
-	mov	x0, x20
-	bl	printf
-	mov	w1, w23
-	mov	w0, 0
-	bl	zftl_get_free_sblk
-	and	w19, w0, 65535
-	mov	w2, w21
-	mov	w1, w19
-	mov	x0, x20
-	bl	printf
-	bl	dump_all_list_info
-	mov	w2, 955
-	adrp	x1, .LANCHOR135
-	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR135
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-	b	.L1214
-	.size	ftl_alloc_sblk, .-ftl_alloc_sblk
 	.section	.text.sblk_init,"ax",@progbits
 	.align	2
 	.global	sblk_init
 	.type	sblk_init, %function
 sblk_init:
-	adrp	x1, .LANCHOR60
+	adrp	x1, .LANCHOR59
 	mov	w0, -1
-	strb	w0, [x1, #:lo12:.LANCHOR60]
-	adrp	x1, .LANCHOR65
-	strb	w0, [x1, #:lo12:.LANCHOR65]
-	adrp	x1, .LANCHOR63
-	strb	w0, [x1, #:lo12:.LANCHOR63]
+	strb	w0, [x1, #:lo12:.LANCHOR59]
 	adrp	x1, .LANCHOR64
 	strb	w0, [x1, #:lo12:.LANCHOR64]
+	adrp	x1, .LANCHOR62
+	strb	w0, [x1, #:lo12:.LANCHOR62]
+	adrp	x1, .LANCHOR63
+	strb	w0, [x1, #:lo12:.LANCHOR63]
 	mov	w0, 0
 	ret
 	.size	sblk_init, .-sblk_init
@@ -7392,25 +7417,25 @@ sblk_init:
 	.type	dump_sblk_queue, %function
 dump_sblk_queue:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LC80
-	add	x0, x0, :lo12:.LC80
+	adrp	x0, .LC79
+	add	x0, x0, :lo12:.LC79
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR60
+	adrp	x19, .LANCHOR59
 	str	x21, [sp, 32]
-	ldrb	w1, [x19, #:lo12:.LANCHOR60]
+	ldrb	w1, [x19, #:lo12:.LANCHOR59]
 	bl	printf
-	ldrb	w19, [x19, #:lo12:.LANCHOR60]
+	ldrb	w19, [x19, #:lo12:.LANCHOR59]
 	cmp	w19, 255
-	beq	.L1221
-	adrp	x1, .LANCHOR56
+	beq	.L1201
+	adrp	x1, .LANCHOR55
 	ubfiz	x19, x19, 6, 8
-	add	x1, x1, :lo12:.LANCHOR56
-	adrp	x21, .LC81
+	add	x1, x1, :lo12:.LANCHOR55
+	adrp	x21, .LC80
 	add	x19, x1, x19
-	add	x21, x21, :lo12:.LC81
+	add	x21, x21, :lo12:.LC80
 	mov	x20, x1
-.L1223:
+.L1203:
 	ldrb	w2, [x19, 58]
 	mov	x0, x21
 	ldrb	w1, [x19, 1]
@@ -7418,11 +7443,11 @@ dump_sblk_queue:
 	bl	printf
 	ldrb	w19, [x19]
 	cmp	w19, 255
-	beq	.L1221
+	beq	.L1201
 	ubfiz	x19, x19, 6, 8
 	add	x19, x20, x19
-	b	.L1223
-.L1221:
+	b	.L1203
+.L1201:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -7433,90 +7458,90 @@ dump_sblk_queue:
 	.global	queue_lun_state
 	.type	queue_lun_state, %function
 queue_lun_state:
-	adrp	x2, .LANCHOR60
-	ldrb	w2, [x2, #:lo12:.LANCHOR60]
+	adrp	x2, .LANCHOR59
+	ldrb	w2, [x2, #:lo12:.LANCHOR59]
 	cmp	w2, 255
-	beq	.L1239
-	adrp	x3, .LANCHOR32
+	beq	.L1219
+	adrp	x3, .LANCHOR31
 	mov	w8, 24
-	adrp	x10, .LANCHOR56
-	add	x10, x10, :lo12:.LANCHOR56
-	ldrb	w4, [x3, #:lo12:.LANCHOR32]
+	adrp	x10, .LANCHOR55
+	add	x10, x10, :lo12:.LANCHOR55
+	ldrb	w4, [x3, #:lo12:.LANCHOR31]
 	mov	w3, 1
-	adrp	x13, .L1235
+	adrp	x13, .L1215
 	mov	x15, x10
 	sub	w8, w8, w4
-	add	x13, x13, :lo12:.L1235
+	add	x13, x13, :lo12:.L1215
 	lsl	w4, w3, w4
 	sub	w4, w4, #1
 	and	w6, w4, 65535
-	adrp	x4, .LANCHOR75
+	adrp	x4, .LANCHOR74
 	asr	w11, w0, w8
 	and	w11, w11, w6
-	ldrh	w12, [x4, #:lo12:.LANCHOR75]
+	ldrh	w12, [x4, #:lo12:.LANCHOR74]
 	sub	w4, w8, w12
 	lsl	w3, w3, w4
 	sub	w3, w3, #1
 	and	w7, w3, 65535
-	adrp	x3, .LANCHOR76
-	ldrb	w5, [x3, #:lo12:.LANCHOR76]
+	adrp	x3, .LANCHOR75
+	ldrb	w5, [x3, #:lo12:.LANCHOR75]
 	asr	w3, w0, w12
 	sub	w5, w5, #1
 	and	w5, w5, 65535
 	and	w3, w3, w5
 	and	w3, w3, w7
-.L1238:
+.L1218:
 	add	x14, x10, x2, lsl 6
 	ldr	w4, [x14, 40]
 	lsr	w0, w4, w8
 	and	w0, w6, w0
 	cmp	w11, w0
-	bne	.L1233
+	bne	.L1213
 	lsr	w4, w4, w12
 	and	w4, w5, w4
 	and	w4, w7, w4
 	ldrb	w0, [x14, 58]
 	cmp	w3, w4
-	bne	.L1234
+	bne	.L1214
 	cmp	w1, 1
-	bne	.L1231
+	bne	.L1211
 	cmp	w0, 7
 	ccmp	w0, 9, 4, ne
-	beq	.L1233
+	beq	.L1213
 	ret
-.L1234:
+.L1214:
 	cmp	w1, 3
-	bhi	.L1233
+	bhi	.L1213
 	ldrb	w4, [x13,w1,uxtw]
-	adr	x14, .Lrtx1235
+	adr	x14, .Lrtx1215
 	add	x4, x14, w4, sxtb #2
 	br	x4
-.Lrtx1235:
+.Lrtx1215:
 	.section	.rodata.queue_lun_state,"a",@progbits
 	.align	0
 	.align	2
-.L1235:
-	.byte	(.L1231 - .Lrtx1235) / 4
-	.byte	(.L1236 - .Lrtx1235) / 4
-	.byte	(.L1237 - .Lrtx1235) / 4
-	.byte	(.L1231 - .Lrtx1235) / 4
+.L1215:
+	.byte	(.L1211 - .Lrtx1215) / 4
+	.byte	(.L1216 - .Lrtx1215) / 4
+	.byte	(.L1217 - .Lrtx1215) / 4
+	.byte	(.L1211 - .Lrtx1215) / 4
 	.section	.text.queue_lun_state
-.L1236:
+.L1216:
 	cmp	w0, 7
 	ccmp	w0, 9, 4, ne
-	beq	.L1233
+	beq	.L1213
 	ret
-.L1237:
+.L1217:
 	cmp	w0, 11
-	bne	.L1231
-.L1233:
+	bne	.L1211
+.L1213:
 	lsl	x2, x2, 6
 	ldrb	w2, [x15, x2]
 	cmp	w2, 255
-	bne	.L1238
-.L1239:
+	bne	.L1218
+.L1219:
 	mov	w0, 0
-.L1231:
+.L1211:
 	ret
 	.size	queue_lun_state, .-queue_lun_state
 	.section	.text.queue_remove_completed_req,"ax",@progbits
@@ -7524,25 +7549,25 @@ queue_lun_state:
 	.global	queue_remove_completed_req
 	.type	queue_remove_completed_req, %function
 queue_remove_completed_req:
-	adrp	x4, .LANCHOR65
-	adrp	x8, .LANCHOR64
-	adrp	x1, .LANCHOR60
-	adrp	x7, .LANCHOR63
-	adrp	x3, .LANCHOR56
-	ldrb	w14, [x4, #:lo12:.LANCHOR65]
-	add	x5, x3, :lo12:.LANCHOR56
-	ldrb	w2, [x1, #:lo12:.LANCHOR60]
-	ldrb	w12, [x8, #:lo12:.LANCHOR64]
+	adrp	x4, .LANCHOR64
+	adrp	x8, .LANCHOR63
+	adrp	x1, .LANCHOR59
+	adrp	x7, .LANCHOR62
+	adrp	x3, .LANCHOR55
+	ldrb	w14, [x4, #:lo12:.LANCHOR64]
+	add	x5, x3, :lo12:.LANCHOR55
+	ldrb	w2, [x1, #:lo12:.LANCHOR59]
+	ldrb	w12, [x8, #:lo12:.LANCHOR63]
 	mov	x11, x5
-	ldrb	w13, [x7, #:lo12:.LANCHOR63]
-	add	x16, x8, :lo12:.LANCHOR64
-	add	x7, x7, :lo12:.LANCHOR63
-	add	x10, x4, :lo12:.LANCHOR65
+	ldrb	w13, [x7, #:lo12:.LANCHOR62]
+	add	x16, x8, :lo12:.LANCHOR63
+	add	x7, x7, :lo12:.LANCHOR62
+	add	x10, x4, :lo12:.LANCHOR64
 	mov	w6, 0
 	mov	w15, -1
-.L1242:
+.L1222:
 	cmp	w2, 255
-	beq	.L1243
+	beq	.L1223
 	sbfiz	x8, x2, 6, 32
 	sxtw	x0, w2
 	add	x4, x5, x8
@@ -7550,265 +7575,131 @@ queue_remove_completed_req:
 	sub	w4, w4, #12
 	and	w4, w4, 255
 	cmp	w4, 1
-	bls	.L1244
-	cbz	w6, .L1241
-	strb	w2, [x1, #:lo12:.LANCHOR60]
+	bls	.L1224
+	cbz	w6, .L1221
+	strb	w2, [x1, #:lo12:.LANCHOR59]
 	ret
-.L1244:
+.L1224:
 	lsl	x6, x0, 6
 	ldrb	w2, [x5, x8]
 	add	x4, x5, x6
 	strb	w15, [x5, x6]
 	ldrb	w6, [x4, 59]
 	cmp	w6, 1
-	bne	.L1247
+	bne	.L1227
 	ldrh	w4, [x4, 50]
-	cbnz	w4, .L1255
+	cbnz	w4, .L1235
 	mov	w4, w14
 	mov	x6, x10
-.L1248:
+.L1228:
 	cmp	w4, 255
-	bne	.L1253
-	add	x3, x3, :lo12:.LANCHOR56
-	strb	w2, [x1, #:lo12:.LANCHOR60]
+	bne	.L1233
+	add	x3, x3, :lo12:.LANCHOR55
+	strb	w2, [x1, #:lo12:.LANCHOR59]
 	add	x0, x3, x0, lsl 6
 	ldrb	w0, [x0, 1]
 	strb	w0, [x6]
 	ret
-.L1247:
-	cbnz	w6, .L1249
+.L1227:
+	cbnz	w6, .L1229
 	ldr	w4, [x4, 36]
 	cmn	w4, #1
-	beq	.L1249
+	beq	.L1229
 	mov	w4, w13
 	mov	x6, x7
-	b	.L1248
-.L1255:
+	b	.L1228
+.L1235:
 	mov	w4, w12
 	mov	x6, x16
-	b	.L1248
-.L1253:
+	b	.L1228
+.L1233:
 	mov	w6, w4
 	sbfiz	x4, x4, 6, 32
 	ldrb	w4, [x11, x4]
 	cmp	w4, 255
-	bne	.L1253
+	bne	.L1233
 	add	x0, x11, x0, lsl 6
 	sbfiz	x6, x6, 6, 32
 	ldrb	w0, [x0, 1]
 	strb	w0, [x11, x6]
-.L1249:
+.L1229:
 	mov	w6, 1
-	b	.L1242
-.L1243:
-	cbz	w6, .L1241
+	b	.L1222
+.L1223:
+	cbz	w6, .L1221
 	mov	w0, -1
-	strb	w0, [x1, #:lo12:.LANCHOR60]
-.L1241:
+	strb	w0, [x1, #:lo12:.LANCHOR59]
+.L1221:
 	ret
 	.size	queue_remove_completed_req, .-queue_remove_completed_req
-	.section	.text.pm_alloc_new_blk,"ax",@progbits
-	.align	2
-	.global	pm_alloc_new_blk
-	.type	pm_alloc_new_blk, %function
-pm_alloc_new_blk:
-	stp	x29, x30, [sp, -64]!
-	adrp	x2, .LANCHOR80
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR110
-	stp	x21, x22, [sp, 32]
-	ldr	x1, [x20, #:lo12:.LANCHOR110]
-	ldrb	w2, [x2, #:lo12:.LANCHOR80]
-	ldrh	w0, [x1, 690]
-	str	x23, [sp, 48]
-	add	w0, w0, 1
-	and	w0, w0, 65535
-	strh	w0, [x1, 690]
-	cmp	w2, w0
-	bls	.L1266
-	add	x0, x1, x0, sxtw 1
-	ldrh	w1, [x0, 672]
-	mov	w0, 65535
-	cmp	w1, w0
-	bne	.L1267
-.L1266:
-	adrp	x19, .LC82
-	add	x19, x19, :lo12:.LC82
-	mov	w23, 65535
-	adrp	x22, .LANCHOR7
-.L1268:
-	mov	w0, 1
-	bl	ftl_alloc_sblk
-	and	w21, w0, 65535
-	cmp	w21, w23
-	beq	.L1268
-	mov	w1, 0
-	mov	w0, w21
-	bl	ftl_erase_sblk
-	add	x14, x20, :lo12:.LANCHOR110
-	ldr	x1, [x20, #:lo12:.LANCHOR110]
-	mov	w0, w21
-	add	x1, x1, 672
-	bl	ftl_get_blk_list_in_sblk
-	tst	w0, 65535
-	bne	.L1269
-	mov	w1, w21
-	mov	x0, x19
-	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR7]
-	add	x21, x0, x21, uxth 2
-	ldrb	w0, [x21, 2]
-	orr	w0, w0, -32
-	strb	w0, [x21, 2]
-	b	.L1268
-.L1269:
-	ldr	x0, [x14]
-	adrp	x1, .LANCHOR136
-	mov	w2, 1
-	mov	w19, 0
-	add	x0, x0, 416
-	str	w2, [x1, #:lo12:.LANCHOR136]
-	mov	w1, 65535
-	strh	wzr, [x0, 274]
-.L1271:
-	ldrh	w2, [x0]
-	cmp	w2, w1
-	beq	.L1270
-	add	w19, w19, 1
-	add	x0, x0, 2
-	and	w19, w19, 65535
-	cmp	w19, 128
-	bne	.L1271
-	adrp	x1, .LANCHOR137
-	adrp	x0, .LC0
-	mov	w2, 264
-	add	x1, x1, :lo12:.LANCHOR137
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1270:
-	ldr	x0, [x20, #:lo12:.LANCHOR110]
-	add	x19, x0, x19, sxtw 1
-	ldrh	w1, [x0, 688]
-	strh	w21, [x19, 416]
-	add	w1, w1, 1
-	strh	w1, [x0, 688]
-.L1267:
-	ldr	x1, [x20, #:lo12:.LANCHOR110]
-	ldrh	w0, [x1, 690]
-	add	x0, x0, 336
-	ldrh	w19, [x1, x0, lsl 1]
-	mov	w0, 65533
-	sub	w1, w19, #1
-	cmp	w0, w1, uxth
-	bcs	.L1273
-	adrp	x1, .LANCHOR137
-	adrp	x0, .LC0
-	mov	w2, 270
-	add	x1, x1, :lo12:.LANCHOR137
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1273:
-	adrp	x1, .LANCHOR32
-	mov	w2, 24
-	ldr	x0, [x20, #:lo12:.LANCHOR110]
-	ldrb	w1, [x1, #:lo12:.LANCHOR32]
-	sub	w2, w2, w1
-	adrp	x1, .LANCHOR75
-	strh	wzr, [x0, 696]
-	ldrh	w1, [x1, #:lo12:.LANCHOR75]
-	strh	w19, [x0, 692]
-	sub	w2, w2, w1
-	asr	w4, w19, w2
-	strh	w4, [x0, 694]
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1276
-	mov	w0, 1
-	and	w4, w4, 65535
-	lsl	w2, w0, w2
-	mov	w3, w19
-	adrp	x0, .LC83
-	sub	w2, w2, #1
-	mov	w1, w19
-	add	x0, x0, :lo12:.LC83
-	bl	printf
-.L1276:
-	mov	w0, 0
-	ldr	x23, [sp, 48]
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 64
-	ret
-	.size	pm_alloc_new_blk, .-pm_alloc_new_blk
 	.section	.text.pm_select_ram_region,"ax",@progbits
 	.align	2
 	.global	pm_select_ram_region
 	.type	pm_select_ram_region, %function
 pm_select_ram_region:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR138
-	add	x0, x0, :lo12:.LANCHOR138
+	adrp	x0, .LANCHOR135
+	add	x0, x0, :lo12:.LANCHOR135
 	mov	x1, 0
 	add	x29, sp, 0
 	mov	w2, 65535
 	str	x19, [sp, 16]
-.L1285:
+.L1247:
 	lsl	x3, x1, 4
 	and	w19, w1, 65535
 	ldrh	w3, [x3, x0]
 	cmp	w3, w2
-	beq	.L1284
+	beq	.L1246
 	add	x1, x1, 1
 	cmp	x1, 8
-	bne	.L1285
+	bne	.L1247
 	add	x0, x0, 2
 	mov	w19, w1
 	mov	x2, x0
 	mov	w4, 32768
 	mov	w1, 0
-.L1287:
+.L1249:
 	ldrh	w3, [x2]
-	tbnz	x3, 15, .L1286
+	tbnz	x3, 15, .L1248
 	cmp	w3, w4
-	bcs	.L1286
+	bcs	.L1248
 	mov	w4, w3
 	mov	w19, w1
-.L1286:
+.L1248:
 	add	w1, w1, 1
 	add	x2, x2, 16
 	and	w1, w1, 65535
 	cmp	w1, 8
-	bne	.L1287
+	bne	.L1249
 	cmp	w19, 8
-	bne	.L1284
-	adrp	x1, .LANCHOR139
+	bne	.L1246
+	adrp	x1, .LANCHOR136
 	mov	w2, -1
-	ldrb	w3, [x1, #:lo12:.LANCHOR139]
+	ldrb	w3, [x1, #:lo12:.LANCHOR136]
 	mov	w1, 0
-.L1289:
+.L1251:
 	ldrh	w5, [x0]
 	cmp	w5, w2
-	bcs	.L1288
+	bcs	.L1250
 	ldrh	w4, [x0, -2]
 	cmp	w4, w3
 	csel	w2, w2, w5, eq
 	csel	w19, w19, w1, eq
-.L1288:
+.L1250:
 	add	w1, w1, 1
 	add	x0, x0, 16
 	and	w1, w1, 65535
 	cmp	w1, 8
-	bne	.L1289
+	bne	.L1251
 	cmp	w19, 8
-	bne	.L1284
-	adrp	x1, .LANCHOR140
+	bne	.L1246
+	adrp	x1, .LANCHOR137
 	adrp	x0, .LC0
 	mov	w2, 377
-	add	x1, x1, :lo12:.LANCHOR140
+	add	x1, x1, :lo12:.LANCHOR137
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1284:
+.L1246:
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -7819,14 +7710,14 @@ pm_select_ram_region:
 	.global	idb_init
 	.type	idb_init, %function
 idb_init:
+	adrp	x0, .LANCHOR138
+	str	xzr, [x0, #:lo12:.LANCHOR138]
+	adrp	x0, .LANCHOR139
+	str	wzr, [x0, #:lo12:.LANCHOR139]
+	adrp	x0, .LANCHOR140
+	strb	wzr, [x0, #:lo12:.LANCHOR140]
 	adrp	x0, .LANCHOR141
 	str	xzr, [x0, #:lo12:.LANCHOR141]
-	adrp	x0, .LANCHOR142
-	str	wzr, [x0, #:lo12:.LANCHOR142]
-	adrp	x0, .LANCHOR143
-	strb	wzr, [x0, #:lo12:.LANCHOR143]
-	adrp	x0, .LANCHOR144
-	str	xzr, [x0, #:lo12:.LANCHOR144]
 	mov	w0, 0
 	ret
 	.size	idb_init, .-idb_init
@@ -7844,69 +7735,69 @@ ftl_memset:
 	.type	flash_lsb_page_tbl_build, %function
 flash_lsb_page_tbl_build:
 	stp	x29, x30, [sp, -48]!
-	adrp	x1, .LANCHOR16
+	adrp	x1, .LANCHOR21
 	add	x29, sp, 0
-	ldr	x1, [x1, #:lo12:.LANCHOR16]
+	ldr	x1, [x1, #:lo12:.LANCHOR21]
 	stp	x19, x20, [sp, 16]
 	mov	w20, 1024
 	str	x21, [sp, 32]
 	adrp	x19, .LANCHOR3
 	ldrb	w1, [x1, 12]
 	sdiv	w20, w20, w1
-	cbnz	w0, .L1297
+	cbnz	w0, .L1259
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1298:
+.L1260:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 512
-	bne	.L1298
-.L1304:
-	adrp	x21, .LANCHOR145
-	add	x21, x21, :lo12:.LANCHOR145
+	bne	.L1260
+.L1266:
+	adrp	x21, .LANCHOR142
+	add	x21, x21, :lo12:.LANCHOR142
 	mov	w2, 2048
 	mov	w1, 255
 	mov	x0, x21
 	add	x19, x19, :lo12:.LANCHOR3
 	bl	ftl_memset
 	mov	x0, 0
-.L1299:
+.L1261:
 	ldrh	w1, [x19, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	w20, w0, uxth
 	strh	w1, [x21, w1, sxtw 1]
-	bhi	.L1299
+	bhi	.L1261
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1297:
+.L1259:
 	cmp	w0, 1
-	bne	.L1300
+	bne	.L1262
 	add	x3, x19, :lo12:.LANCHOR3
 	mov	x1, 0
-.L1303:
+.L1265:
 	and	w0, w1, 65535
 	cmp	x1, 3
-	bls	.L1301
+	bls	.L1263
 	ubfiz	w2, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 2
 	sub	w0, w2, w0
 	and	w0, w0, 65535
-.L1301:
+.L1263:
 	strh	w0, [x3, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 512
-	bne	.L1303
-	b	.L1304
-.L1300:
+	bne	.L1265
+	b	.L1266
+.L1262:
 	cmp	w0, 2
-	bne	.L1305
+	bne	.L1267
 	add	x3, x19, :lo12:.LANCHOR3
 	mov	w1, 65535
 	mov	x0, 0
-.L1307:
+.L1269:
 	cmp	x0, 2
 	and	w2, w0, 65535
 	csel	w2, w2, w1, cc
@@ -7915,31 +7806,31 @@ flash_lsb_page_tbl_build:
 	add	x0, x0, 1
 	and	w1, w1, 65535
 	cmp	x0, 512
-	bne	.L1307
-	b	.L1304
-.L1305:
+	bne	.L1269
+	b	.L1266
+.L1267:
 	cmp	w0, 3
-	bne	.L1308
+	bne	.L1270
 	add	x3, x19, :lo12:.LANCHOR3
 	mov	x1, 0
-.L1311:
+.L1273:
 	and	w0, w1, 65535
 	cmp	x1, 5
-	bls	.L1309
+	bls	.L1271
 	ubfiz	w2, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 4
 	sub	w0, w2, w0
 	and	w0, w0, 65535
-.L1309:
+.L1271:
 	strh	w0, [x3, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 512
-	bne	.L1311
-	b	.L1304
-.L1308:
+	bne	.L1273
+	b	.L1266
+.L1270:
 	cmp	w0, 4
-	bne	.L1312
+	bne	.L1274
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	w2, 1
 	add	x1, x1, 16
@@ -7957,7 +7848,7 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1, -10]
 	strh	w0, [x1, -2]
 	mov	w0, 8
-.L1314:
+.L1276:
 	and	w3, w0, 1
 	ubfiz	w2, w0, 1, 15
 	add	w3, w3, 6
@@ -7966,40 +7857,40 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1], 2
 	and	w0, w0, 65535
 	cmp	w0, 512
-	bne	.L1314
-	b	.L1304
-.L1312:
+	bne	.L1276
+	b	.L1266
+.L1274:
 	cmp	w0, 5
-	bne	.L1315
+	bne	.L1277
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1316:
+.L1278:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 16
-	bne	.L1316
+	bne	.L1278
 	add	x1, x1, 32
-.L1317:
+.L1279:
 	strh	w0, [x1], 2
 	add	w0, w0, 2
 	and	w0, w0, 65535
 	cmp	w0, 1008
-	bne	.L1317
-	b	.L1304
-.L1315:
+	bne	.L1279
+	b	.L1266
+.L1277:
 	cmp	w0, 8
-	bne	.L1318
+	bne	.L1280
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1319:
+.L1281:
 	strh	w0, [x0, x1]
 	add	x0, x0, 2
 	cmp	x0, 1024
-	bne	.L1319
-	b	.L1304
-.L1318:
+	bne	.L1281
+	b	.L1266
+.L1280:
 	cmp	w0, 9
-	bne	.L1320
+	bne	.L1282
 	add	x0, x19, :lo12:.LANCHOR3
 	mov	w1, 1
 	add	x0, x0, 6
@@ -8008,43 +7899,43 @@ flash_lsb_page_tbl_build:
 	mov	w1, 2
 	strh	w1, [x0, -2]
 	mov	w1, 3
-.L1321:
+.L1283:
 	strh	w1, [x0], 2
 	add	w1, w1, 2
 	and	w1, w1, 65535
 	cmp	w1, 1021
-	bne	.L1321
-	b	.L1304
-.L1320:
+	bne	.L1283
+	b	.L1266
+.L1282:
 	cmp	w0, 10
-	bne	.L1322
+	bne	.L1284
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1323:
+.L1285:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 63
-	bne	.L1323
+	bne	.L1285
 	add	x1, x1, 126
-.L1324:
+.L1286:
 	strh	w0, [x1], 2
 	add	w0, w0, 2
 	and	w0, w0, 65535
 	cmp	w0, 961
-	bne	.L1324
-	b	.L1304
-.L1322:
+	bne	.L1286
+	b	.L1266
+.L1284:
 	cmp	w0, 11
-	bne	.L1325
+	bne	.L1287
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1326:
+.L1288:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L1326
+	bne	.L1288
 	add	x1, x1, 16
-.L1328:
+.L1290:
 	and	w3, w0, 1
 	ubfiz	w2, w0, 1, 15
 	add	w3, w3, 6
@@ -8053,161 +7944,167 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1], 2
 	and	w0, w0, 65535
 	cmp	w0, 512
-	bne	.L1328
-	b	.L1304
-.L1325:
+	bne	.L1290
+	b	.L1266
+.L1287:
 	cmp	w0, 13
-	bne	.L1304
+	bne	.L1266
 	add	x2, x19, :lo12:.LANCHOR3
 	mov	x1, 0
 	mov	w0, 0
-.L1329:
+.L1291:
 	strh	w0, [x1, x2]
 	add	w0, w0, 3
 	and	w0, w0, 65535
 	add	x1, x1, 2
 	cmp	w0, 1536
-	bne	.L1329
-	b	.L1304
+	bne	.L1291
+	b	.L1266
 	.size	flash_lsb_page_tbl_build, .-flash_lsb_page_tbl_build
 	.section	.text.flash_die_info_init,"ax",@progbits
 	.align	2
 	.global	flash_die_info_init
 	.type	flash_die_info_init, %function
 flash_die_info_init:
-	stp	x29, x30, [sp, -64]!
-	adrp	x0, .LANCHOR14
+	stp	x29, x30, [sp, -128]!
+	adrp	x0, .LANCHOR19
 	add	x29, sp, 0
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	tbz	x0, 12, .L1352
-	adrp	x1, .LANCHOR146
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	tbz	x0, 12, .L1314
+	adrp	x1, .LANCHOR143
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR146
+	add	x1, x1, :lo12:.LANCHOR143
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1352:
-	adrp	x22, .LANCHOR33
-	add	x19, x22, :lo12:.LANCHOR33
-	adrp	x23, .LANCHOR2
-	adrp	x24, .LANCHOR18
-	adrp	x21, .LANCHOR30
+.L1314:
+	adrp	x19, .LANCHOR32
+	add	x23, x19, :lo12:.LANCHOR32
+	adrp	x25, .LANCHOR2
+	adrp	x20, .LANCHOR23
 	mov	w2, 8
-	ldrh	w0, [x19, 26]
-	adrp	x20, .LANCHOR148
-	ldrb	w1, [x19, 12]
-	strh	w0, [x23, #:lo12:.LANCHOR2]
-	ldrh	w0, [x19, 10]
-	strb	wzr, [x24, #:lo12:.LANCHOR18]
+	adrp	x22, .LANCHOR29
+	ldrh	w0, [x23, 26]
+	adrp	x21, .LANCHOR145
+	ldrb	w1, [x23, 12]
+	adrp	x26, .LANCHOR33
+	strh	w0, [x25, #:lo12:.LANCHOR2]
+	adrp	x24, .LANCHOR47
+	ldrh	w0, [x23, 10]
+	add	x26, x26, :lo12:.LANCHOR33
+	strb	wzr, [x20, #:lo12:.LANCHOR23]
+	add	x27, x24, :lo12:.LANCHOR47
+	mov	x28, 0
 	sdiv	w0, w0, w1
-	adrp	x1, .LANCHOR147
-	strh	w0, [x1, #:lo12:.LANCHOR147]
+	adrp	x1, .LANCHOR144
+	strh	w0, [x1, #:lo12:.LANCHOR144]
 	mov	w1, 0
-	add	x0, x21, :lo12:.LANCHOR30
+	add	x0, x22, :lo12:.LANCHOR29
 	bl	ftl_memset
-	add	x0, x20, :lo12:.LANCHOR148
 	mov	w2, 32
 	mov	w1, 0
+	add	x0, x21, :lo12:.LANCHOR145
 	bl	ftl_memset
-	mov	x8, x22
-	mov	x15, x21
-	mov	x11, x20
-	adrp	x14, .LANCHOR48
-	adrp	x20, .LANCHOR34
-	add	x21, x14, :lo12:.LANCHOR48
-	add	x20, x20, :lo12:.LANCHOR34
-	add	x22, x19, 1
-	mov	x12, 0
-.L1355:
-	ldrb	w2, [x19]
-	lsl	x7, x12, 3
+	add	x0, x23, 1
+	str	x0, [x29, 120]
+.L1317:
 	mov	w0, 2
-	strb	w0, [x12, x20]
-	add	x1, x21, x7
-	mov	x0, x22
+	ldrb	w2, [x23]
+	strb	w0, [x28, x26]
+	lsl	x7, x28, 3
+	ldr	x0, [x29, 120]
+	add	x1, x27, x7
 	bl	flash_mem_cmp8
-	cbnz	w0, .L1353
-	ldrb	w2, [x24, #:lo12:.LANCHOR18]
-	add	x1, x11, :lo12:.LANCHOR148
-	and	w5, w12, 255
-	add	w0, w2, 1
-	strb	w0, [x24, #:lo12:.LANCHOR18]
-	add	x0, x15, :lo12:.LANCHOR30
-	str	wzr, [x1, x2, lsl 2]
-	strb	w5, [x0, x2]
-	ldrb	w0, [x7, x21]
+	cbnz	w0, .L1315
+	ldrb	w4, [x20, #:lo12:.LANCHOR23]
+	add	x1, x21, :lo12:.LANCHOR145
+	and	w2, w28, 255
+	add	w0, w4, 1
+	strb	w0, [x20, #:lo12:.LANCHOR23]
+	add	x0, x22, :lo12:.LANCHOR29
+	str	wzr, [x1, x4, lsl 2]
+	strb	w2, [x0, x4]
+	ldrb	w0, [x7, x27]
 	cmp	w0, 173
-	bne	.L1354
-	adrp	x0, .LANCHOR13
-	ldr	x4, [x0, #:lo12:.LANCHOR13]
+	bne	.L1316
+	adrp	x0, .LANCHOR7
+	str	w2, [x29, 108]
+	ldr	x1, [x0, #:lo12:.LANCHOR7]
 	mov	w0, 191
-	add	x4, x4, x12, lsl 8
-	str	w0, [x4, 2056]
+	add	x1, x1, x28, lsl 8
+	str	x1, [x29, 112]
+	str	w0, [x1, 2056]
 	bl	nandc_wait_flash_ready
+	ldr	x1, [x29, 112]
 	mov	w0, 223
-	str	w0, [x4, 2056]
+	str	w0, [x1, 2056]
 	bl	nandc_wait_flash_ready
-.L1354:
-	mov	w0, w5
+	ldr	w2, [x29, 108]
+.L1316:
+	mov	w0, w2
 	bl	zftl_flash_enter_slc_mode
-.L1353:
-	add	x12, x12, 1
-	cmp	x12, 4
-	bne	.L1355
-	add	x0, x8, :lo12:.LANCHOR33
+.L1315:
+	add	x28, x28, 1
+	cmp	x28, 4
+	bne	.L1317
+	add	x0, x19, :lo12:.LANCHOR32
 	ldrb	w1, [x0, 8]
 	cmp	w1, 2
-	beq	.L1356
-.L1360:
-	add	x8, x8, :lo12:.LANCHOR33
-	ldrb	w0, [x24, #:lo12:.LANCHOR18]
-	ldp	x19, x20, [sp, 16]
-	ldrb	w1, [x8, 13]
+	beq	.L1318
+.L1322:
+	add	x19, x19, :lo12:.LANCHOR32
+	ldrb	w0, [x20, #:lo12:.LANCHOR23]
 	ldp	x21, x22, [sp, 32]
+	ldrb	w1, [x19, 13]
 	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
 	mul	w0, w0, w1
-	ldrh	w1, [x8, 14]
-	ldp	x29, x30, [sp], 64
+	ldrh	w1, [x19, 14]
+	ldp	x27, x28, [sp, 80]
+	ldp	x19, x20, [sp, 16]
 	mul	w0, w0, w1
-	adrp	x1, .LANCHOR149
-	strh	w0, [x1, #:lo12:.LANCHOR149]
+	adrp	x1, .LANCHOR146
+	strh	w0, [x1, #:lo12:.LANCHOR146]
+	ldp	x29, x30, [sp], 128
 	ret
-.L1356:
-	ldrh	w1, [x23, #:lo12:.LANCHOR2]
-	add	x14, x14, :lo12:.LANCHOR48
-	ldrb	w12, [x0, 13]
+.L1318:
+	ldrh	w1, [x25, #:lo12:.LANCHOR2]
+	add	x24, x24, :lo12:.LANCHOR47
+	ldrb	w8, [x0, 13]
 	add	x7, x0, 1
-	ldrb	w20, [x8, #:lo12:.LANCHOR33]
-	add	x19, x24, :lo12:.LANCHOR18
-	ldrb	w21, [x0, 23]
-	add	x11, x11, :lo12:.LANCHOR148
-	add	x15, x15, :lo12:.LANCHOR30
-	mov	x13, 0
-	mul	w12, w12, w1
+	ldrb	w12, [x19, #:lo12:.LANCHOR32]
+	add	x11, x20, :lo12:.LANCHOR23
+	ldrb	w13, [x0, 23]
+	add	x21, x21, :lo12:.LANCHOR145
+	add	x22, x22, :lo12:.LANCHOR29
+	mov	x10, 0
+	mul	w8, w8, w1
 	ldrh	w1, [x0, 14]
 	and	w1, w1, 65280
-	mul	w12, w12, w1
-	lsl	w22, w12, 1
-.L1359:
-	mov	w2, w20
-	add	x1, x14, x13, lsl 3
+	mul	w8, w8, w1
+	lsl	w14, w8, 1
+.L1321:
+	mov	w2, w12
+	add	x1, x24, x10, lsl 3
 	mov	x0, x7
 	bl	flash_mem_cmp8
-	cbnz	w0, .L1357
-	ldrb	w1, [x19]
-	cmp	w21, 0
-	csel	w2, w12, w22, eq
+	cbnz	w0, .L1319
+	ldrb	w1, [x11]
+	cmp	w13, 0
+	csel	w2, w8, w14, eq
 	add	w0, w1, 1
-	strb	w0, [x19]
-	str	w2, [x11, x1, lsl 2]
-	strb	w13, [x15, x1]
-.L1357:
-	add	x13, x13, 1
-	cmp	x13, 4
-	bne	.L1359
-	b	.L1360
+	strb	w0, [x11]
+	str	w2, [x21, x1, lsl 2]
+	strb	w10, [x22, x1]
+.L1319:
+	add	x10, x10, 1
+	cmp	x10, 4
+	bne	.L1321
+	b	.L1322
 	.size	flash_die_info_init, .-flash_die_info_init
 	.section	.text.lpa_hash_init,"ax",@progbits
 	.align	2
@@ -8221,12 +8118,12 @@ lpa_hash_init:
 	add	x29, sp, 0
 	add	x0, x0, :lo12:.LANCHOR116
 	bl	ftl_memset
-	adrp	x0, .LANCHOR95
+	adrp	x0, .LANCHOR94
 	mov	w1, 255
 	ldp	x29, x30, [sp], 16
-	ldrh	w2, [x0, #:lo12:.LANCHOR95]
-	adrp	x0, .LANCHOR80
-	ldrb	w0, [x0, #:lo12:.LANCHOR80]
+	ldrh	w2, [x0, #:lo12:.LANCHOR94]
+	adrp	x0, .LANCHOR79
+	ldrb	w0, [x0, #:lo12:.LANCHOR79]
 	mul	w2, w2, w0
 	adrp	x0, .LANCHOR118
 	ldr	x0, [x0, #:lo12:.LANCHOR118]
@@ -8239,64 +8136,64 @@ lpa_hash_init:
 	.type	lpa_rebuild_hash, %function
 lpa_rebuild_hash:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LANCHOR14
+	adrp	x0, .LANCHOR19
 	add	x29, sp, 0
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	tbz	x0, 12, .L1373
-	adrp	x1, .LANCHOR150
-	adrp	x0, .LC84
+	tbz	x0, 12, .L1335
+	adrp	x1, .LANCHOR147
+	adrp	x0, .LC81
 	mov	w3, 0
 	mov	w2, 239
-	add	x1, x1, :lo12:.LANCHOR150
-	add	x0, x0, :lo12:.LC84
+	add	x1, x1, :lo12:.LANCHOR147
+	add	x0, x0, :lo12:.LC81
 	bl	printf
-.L1373:
-	adrp	x20, .LANCHOR95
-	adrp	x22, .LANCHOR80
+.L1335:
+	adrp	x20, .LANCHOR94
+	adrp	x22, .LANCHOR79
 	adrp	x19, .LANCHOR116
 	add	x19, x19, :lo12:.LANCHOR116
 	mov	w2, 512
 	mov	w1, 255
 	mov	x0, x19
 	bl	ftl_memset
-	ldrh	w2, [x20, #:lo12:.LANCHOR95]
+	ldrh	w2, [x20, #:lo12:.LANCHOR94]
 	adrp	x21, .LANCHOR118
-	ldrb	w0, [x22, #:lo12:.LANCHOR80]
+	ldrb	w0, [x22, #:lo12:.LANCHOR79]
 	mov	w1, 255
-	add	x20, x20, :lo12:.LANCHOR95
+	add	x20, x20, :lo12:.LANCHOR94
 	mul	w2, w2, w0
 	ldr	x0, [x21, #:lo12:.LANCHOR118]
 	lsl	w2, w2, 2
 	bl	ftl_memset
 	adrp	x0, .LANCHOR117
-	ldrb	w3, [x22, #:lo12:.LANCHOR80]
+	ldrb	w3, [x22, #:lo12:.LANCHOR79]
 	ldr	x5, [x21, #:lo12:.LANCHOR118]
 	mov	w1, 0
 	ldr	x4, [x0, #:lo12:.LANCHOR117]
-.L1374:
+.L1336:
 	ldrh	w0, [x20]
 	mul	w0, w0, w3
 	cmp	w1, w0, lsl 1
-	blt	.L1376
+	blt	.L1338
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1376:
+.L1338:
 	uxtw	x2, w1
 	ldr	w0, [x4, x2, lsl 2]
 	cmn	w0, #1
-	beq	.L1375
+	beq	.L1337
 	and	x0, x0, 255
 	ldrh	w6, [x19, x0, lsl 1]
 	strh	w1, [x19, x0, lsl 1]
 	strh	w6, [x5, x2, lsl 1]
-.L1375:
+.L1337:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L1374
+	b	.L1336
 	.size	lpa_rebuild_hash, .-lpa_rebuild_hash
 	.section	.text.zftl_read_flash_info,"ax",@progbits
 	.align	2
@@ -8310,10 +8207,10 @@ zftl_read_flash_info:
 	str	x19, [sp, 16]
 	mov	x19, x0
 	bl	ftl_memset
-	adrp	x1, .LANCHOR33
-	add	x1, x1, :lo12:.LANCHOR33
+	adrp	x1, .LANCHOR32
+	add	x1, x1, :lo12:.LANCHOR32
 	adrp	x0, .LANCHOR2
-	adrp	x3, .LANCHOR68
+	adrp	x3, .LANCHOR67
 	strb	wzr, [x19, 10]
 	mov	w4, 1
 	ldrb	w2, [x1, 9]
@@ -8322,11 +8219,11 @@ zftl_read_flash_info:
 	strb	w0, [x19, 4]
 	ubfx	x0, x0, 8, 8
 	strb	w0, [x19, 5]
-	adrp	x0, .LANCHOR50
-	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	adrp	x0, .LANCHOR49
+	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	strb	w0, [x19, 7]
-	add	x0, x3, :lo12:.LANCHOR68
-	ldrb	w3, [x3, #:lo12:.LANCHOR68]
+	add	x0, x3, :lo12:.LANCHOR67
+	ldrb	w3, [x3, #:lo12:.LANCHOR67]
 	strb	w3, [x19]
 	ldrb	w3, [x0, 1]
 	strb	w3, [x19, 1]
@@ -8336,28 +8233,28 @@ zftl_read_flash_info:
 	strb	w0, [x19, 3]
 	mov	w0, 32
 	strb	w2, [x19, 6]
-	adrp	x2, .LANCHOR30
+	adrp	x2, .LANCHOR29
 	strb	w0, [x19, 8]
-	add	x2, x2, :lo12:.LANCHOR30
+	add	x2, x2, :lo12:.LANCHOR29
 	ldrb	w0, [x1, 7]
 	mov	x1, 0
 	strb	w0, [x19, 9]
-	adrp	x0, .LANCHOR18
-	ldrb	w3, [x0, #:lo12:.LANCHOR18]
-.L1385:
+	adrp	x0, .LANCHOR23
+	ldrb	w3, [x0, #:lo12:.LANCHOR23]
+.L1347:
 	cmp	w3, w1, uxtb
-	bhi	.L1386
+	bhi	.L1348
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1386:
+.L1348:
 	ldrb	w0, [x1, x2]
 	add	x1, x1, 1
 	ldrb	w5, [x19, 10]
 	lsl	w0, w4, w0
 	orr	w0, w0, w5
 	strb	w0, [x19, 10]
-	b	.L1385
+	b	.L1347
 	.size	zftl_read_flash_info, .-zftl_read_flash_info
 	.section	.text.gc_static_wearleveling,"ax",@progbits
 	.align	2
@@ -8376,78 +8273,78 @@ gc_static_wearleveling:
 	ldr	w1, [x0, 32]
 	mov	w0, 10240
 	cmp	w1, w0
-	bls	.L1389
+	bls	.L1351
 	bl	ftl_tmp_into_update
-.L1389:
-	adrp	x19, .LANCHOR10
+.L1351:
+	adrp	x19, .LANCHOR12
 	mov	w3, 36000
-	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	ldr	x0, [x19, #:lo12:.LANCHOR12]
 	ldr	w1, [x0, 568]
 	ldr	w2, [x0, 12]
 	add	w3, w1, w3
 	cmp	w2, w3
-	bcs	.L1390
+	bcs	.L1352
 	ldr	x4, [x22, #:lo12:.LANCHOR110]
 	ldr	w3, [x0, 572]
 	add	w3, w3, 256
 	ldr	w4, [x4, 36]
 	cmp	w4, w3
-	bcc	.L1442
-.L1390:
+	bcc	.L1404
+.L1352:
 	add	w1, w1, 860160
 	add	w1, w1, 3840
 	cmp	w2, w1
-	bhi	.L1392
+	bhi	.L1354
 	ldr	x3, [x22, #:lo12:.LANCHOR110]
 	ldr	w1, [x0, 572]
 	add	w1, w1, 32
 	ldr	w3, [x3, 36]
 	cmp	w3, w1
-	bls	.L1443
-.L1392:
+	bls	.L1405
+.L1354:
 	ldr	x1, [x22, #:lo12:.LANCHOR110]
 	mov	w20, 65535
-	adrp	x8, .LANCHOR14
+	adrp	x8, .LANCHOR19
 	mov	w21, w20
-	add	x8, x8, :lo12:.LANCHOR14
+	add	x8, x8, :lo12:.LANCHOR19
 	mov	w27, 0
 	mov	w25, 0
 	mov	w26, 0
 	ldr	w3, [x1, 36]
 	mov	w23, 0
 	ldrh	w28, [x1, 134]
-	adrp	x24, .LANCHOR7
+	adrp	x24, .LANCHOR9
 	str	w2, [x0, 568]
 	str	w3, [x0, 572]
-	adrp	x0, .LANCHOR6
-	add	x10, x0, :lo12:.LANCHOR6
+	adrp	x0, .LANCHOR8
+	add	x10, x0, :lo12:.LANCHOR8
 	str	wzr, [x29, 128]
 	str	wzr, [x29, 136]
 	stp	wzr, wzr, [x29, 144]
-.L1394:
+.L1356:
 	ldrh	w0, [x10]
 	cmp	w0, w28
-	bhi	.L1403
-	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	bhi	.L1365
+	ldr	x0, [x19, #:lo12:.LANCHOR12]
 	mov	w2, 128
 	mov	w1, 255
 	add	x0, x0, 264
 	strh	wzr, [x0, -142]
 	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR10]
-	adrp	x2, .LANCHOR14
-	ldr	x8, [x24, #:lo12:.LANCHOR7]
-	ldr	w3, [x2, #:lo12:.LANCHOR14]
+	ldr	x0, [x19, #:lo12:.LANCHOR12]
+	adrp	x2, .LANCHOR19
+	ldr	x8, [x24, #:lo12:.LANCHOR9]
+	ldr	w3, [x2, #:lo12:.LANCHOR19]
 	str	x2, [x29, 152]
 	ldrh	w0, [x0, 586]
 	mov	x1, x0
 	lsl	x28, x0, 2
 	add	x10, x8, x28
-	tbz	x3, 10, .L1404
-	adrp	x2, .LANCHOR9
+	tbz	x3, 10, .L1366
+	adrp	x2, .LANCHOR11
 	ldrb	w6, [x10, 3]
 	ldrb	w4, [x10, 2]
-	ldr	x5, [x2, #:lo12:.LANCHOR9]
+	ldr	x5, [x2, #:lo12:.LANCHOR11]
 	ldr	w3, [x8, x28]
 	ldrh	w2, [x8, x28]
 	stp	x8, x10, [x29, 112]
@@ -8456,59 +8353,59 @@ gc_static_wearleveling:
 	ubfx	x5, x4, 5, 3
 	and	w2, w2, 2047
 	ubfx	x4, x4, 3, 2
-	adrp	x0, .LC86
-	add	x0, x0, :lo12:.LC86
+	adrp	x0, .LC83
+	add	x0, x0, :lo12:.LC83
 	bl	printf
 	ldp	x8, x10, [x29, 112]
-.L1404:
+.L1366:
 	ldrb	w0, [x10, 2]
 	and	w3, w0, 224
 	cmp	w3, 32
-	bne	.L1405
+	bne	.L1367
 	ldr	x1, [x22, #:lo12:.LANCHOR110]
 	ldrh	w1, [x1, 688]
 	cmp	w1, 2
-	bls	.L1405
-	adrp	x1, .LANCHOR151
+	bls	.L1367
+	adrp	x1, .LANCHOR148
 	mov	w2, 1
-	str	w2, [x1, #:lo12:.LANCHOR151]
-.L1405:
+	str	w2, [x1, #:lo12:.LANCHOR148]
+.L1367:
 	ldrb	w1, [x10, 2]
-	tbz	x1, 3, .L1406
+	tbz	x1, 3, .L1368
 	ldr	x1, [x22, #:lo12:.LANCHOR110]
 	ldrh	w2, [x8, x28]
 	and	w2, w2, 2047
 	ldrh	w4, [x1, 96]
-	adrp	x1, .LANCHOR152
-	ldrh	w1, [x1, #:lo12:.LANCHOR152]
+	adrp	x1, .LANCHOR149
+	ldrh	w1, [x1, #:lo12:.LANCHOR149]
 	add	w1, w2, w1, lsr 2
 	cmp	w4, w1
-	ble	.L1406
+	ble	.L1368
 	and	w0, w0, 192
 	cmp	w0, 64
-	bne	.L1407
-	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	bne	.L1369
+	ldr	x0, [x19, #:lo12:.LANCHOR12]
 	mov	w1, 0
 	mov	w2, 1
 	ldrh	w0, [x0, 586]
 	bl	gc_add_sblk
-	adrp	x0, .LANCHOR71+2110
+	adrp	x0, .LANCHOR70+2192
 	mov	w1, 1
-	strh	w1, [x0, #:lo12:.LANCHOR71+2110]
-.L1406:
-	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	strh	w1, [x0, #:lo12:.LANCHOR70+2192]
+.L1368:
+	ldr	x0, [x19, #:lo12:.LANCHOR12]
 	ldr	x2, [x29, 152]
-	ldr	x11, [x24, #:lo12:.LANCHOR7]
+	ldr	x11, [x24, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, 584]
-	ldr	w2, [x2, #:lo12:.LANCHOR14]
+	ldr	w2, [x2, #:lo12:.LANCHOR19]
 	mov	x1, x0
 	lsl	x10, x0, 2
 	add	x28, x11, x10
-	tbz	x2, 10, .L1408
-	adrp	x2, .LANCHOR9
+	tbz	x2, 10, .L1370
+	adrp	x2, .LANCHOR11
 	ldrb	w6, [x28, 3]
 	ldrb	w4, [x28, 2]
-	ldr	x5, [x2, #:lo12:.LANCHOR9]
+	ldr	x5, [x2, #:lo12:.LANCHOR11]
 	ldr	w3, [x11, x10]
 	ldrh	w2, [x11, x10]
 	stp	x10, x11, [x29, 112]
@@ -8517,43 +8414,43 @@ gc_static_wearleveling:
 	ubfx	x5, x4, 5, 3
 	and	w2, w2, 2047
 	ubfx	x4, x4, 3, 2
-	adrp	x0, .LC87
-	add	x0, x0, :lo12:.LC87
+	adrp	x0, .LC84
+	add	x0, x0, :lo12:.LC84
 	bl	printf
 	ldp	x10, x11, [x29, 112]
-.L1408:
+.L1370:
 	ldrb	w0, [x28, 2]
-	tbz	x0, 3, .L1409
+	tbz	x0, 3, .L1371
 	ldr	x0, [x22, #:lo12:.LANCHOR110]
 	ldr	w1, [x11, x10]
 	ldrh	w2, [x0, 98]
-	adrp	x0, .LANCHOR153
+	adrp	x0, .LANCHOR150
 	ubfx	x1, x1, 11, 8
-	ldrh	w0, [x0, #:lo12:.LANCHOR153]
+	ldrh	w0, [x0, #:lo12:.LANCHOR150]
 	add	w0, w1, w0, lsr 2
 	cmp	w2, w0
-	ble	.L1409
+	ble	.L1371
 	ldrb	w0, [x28, 2]
 	and	w1, w0, 192
 	cmp	w1, 64
-	bne	.L1410
-	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	bne	.L1372
+	ldr	x0, [x19, #:lo12:.LANCHOR12]
 	mov	w1, 0
 	mov	w2, 1
 	ldrh	w0, [x0, 584]
 	bl	gc_add_sblk
-	adrp	x0, .LANCHOR71+2110
+	adrp	x0, .LANCHOR70+2192
 	mov	w1, 1
-	strh	w1, [x0, #:lo12:.LANCHOR71+2110]
-.L1409:
+	strh	w1, [x0, #:lo12:.LANCHOR70+2192]
+.L1371:
 	ldr	x0, [x29, 152]
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1411
-	adrp	x2, .LANCHOR9
-	ldr	x1, [x24, #:lo12:.LANCHOR7]
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 10, .L1373
+	adrp	x2, .LANCHOR11
+	ldr	x1, [x24, #:lo12:.LANCHOR9]
 	uxtw	x6, w27
 	lsl	x0, x6, 2
-	ldr	x7, [x2, #:lo12:.LANCHOR9]
+	ldr	x7, [x2, #:lo12:.LANCHOR11]
 	add	x5, x1, x0
 	ldr	w3, [x1, x0]
 	ldrh	w7, [x7, x6, lsl 1]
@@ -8561,28 +8458,28 @@ gc_static_wearleveling:
 	ldrb	w4, [x5, 2]
 	ubfx	x3, x3, 11, 8
 	ldrh	w2, [x1, x0]
-	adrp	x0, .LC88
+	adrp	x0, .LC85
 	mov	w1, w27
-	add	x0, x0, :lo12:.LC88
+	add	x0, x0, :lo12:.LC85
 	ubfx	x5, x4, 5, 3
 	and	w2, w2, 2047
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1411:
+.L1373:
 	ldr	x0, [x29, 152]
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1412
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 10, .L1374
 	ldr	w6, [x29, 128]
-	adrp	x2, .LANCHOR9
-	ldr	x1, [x24, #:lo12:.LANCHOR7]
-	ldr	x7, [x2, #:lo12:.LANCHOR9]
+	adrp	x2, .LANCHOR11
+	ldr	x1, [x24, #:lo12:.LANCHOR9]
+	ldr	x7, [x2, #:lo12:.LANCHOR11]
 	lsl	x0, x6, 2
 	add	x5, x1, x0
 	ldr	w3, [x1, x0]
 	ldrh	w2, [x1, x0]
-	adrp	x0, .LC89
+	adrp	x0, .LC86
 	ldrh	w7, [x7, x6, lsl 1]
-	add	x0, x0, :lo12:.LC89
+	add	x0, x0, :lo12:.LC86
 	ldrb	w6, [x5, 3]
 	ubfx	x3, x3, 11, 8
 	ldr	w1, [x29, 128]
@@ -8591,7 +8488,7 @@ gc_static_wearleveling:
 	ubfx	x5, x4, 5, 3
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1412:
+.L1374:
 	ldr	x0, [x22, #:lo12:.LANCHOR110]
 	ldrh	w1, [x29, 148]
 	strh	w1, [x0, 96]
@@ -8605,128 +8502,129 @@ gc_static_wearleveling:
 	strh	w3, [x0, 88]
 	strh	w4, [x0, 90]
 	ldr	x0, [x29, 152]
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1413
-	adrp	x0, .LC90
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 10, .L1375
+	adrp	x0, .LC87
 	and	w4, w4, 65535
 	and	w3, w3, 65535
 	mov	w2, w25
 	mov	w1, w26
-	add	x0, x0, :lo12:.LC90
+	add	x0, x0, :lo12:.LC87
 	bl	printf
-.L1413:
+.L1375:
 	ldr	x0, [x29, 152]
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1414
-	adrp	x0, .LANCHOR153
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 10, .L1376
+	adrp	x0, .LANCHOR150
 	ldr	w3, [x29, 148]
 	mov	w4, w23
 	mov	w2, w21
-	ldrh	w6, [x0, #:lo12:.LANCHOR153]
-	adrp	x0, .LANCHOR152
+	ldrh	w6, [x0, #:lo12:.LANCHOR150]
+	adrp	x0, .LANCHOR149
 	mov	w1, w20
-	ldrh	w5, [x0, #:lo12:.LANCHOR152]
-	adrp	x0, .LC91
-	add	x0, x0, :lo12:.LC91
+	ldrh	w5, [x0, #:lo12:.LANCHOR149]
+	adrp	x0, .LC88
+	add	x0, x0, :lo12:.LC88
 	bl	printf
-.L1414:
+.L1376:
 	sub	w0, w23, w21
 	str	w0, [x29, 144]
-	adrp	x0, .LANCHOR153
+	adrp	x0, .LANCHOR150
 	ldr	w1, [x29, 144]
-	ldrh	w0, [x0, #:lo12:.LANCHOR153]
+	ldrh	w0, [x0, #:lo12:.LANCHOR150]
 	cmp	w1, w0
-	bgt	.L1415
-	adrp	x1, .LANCHOR152
+	bgt	.L1377
+	adrp	x1, .LANCHOR149
 	ldr	w0, [x29, 148]
-	ldrh	w1, [x1, #:lo12:.LANCHOR152]
+	ldrh	w1, [x1, #:lo12:.LANCHOR149]
 	sub	w0, w0, w20
 	cmp	w0, w1
-	ble	.L1444
-.L1415:
-	ldr	x0, [x19, #:lo12:.LANCHOR10]
-	adrp	x26, .LANCHOR71
-	add	x26, x26, :lo12:.LANCHOR71
+	ble	.L1406
+.L1377:
+	ldr	x0, [x19, #:lo12:.LANCHOR12]
+	adrp	x26, .LANCHOR70
+	add	x26, x26, :lo12:.LANCHOR70
 	mov	w25, 0
 	mov	w23, 0
 	ldrh	w28, [x0, 580]
 	ldr	x0, [x22, #:lo12:.LANCHOR110]
 	ldrh	w27, [x0, 134]
-	adrp	x0, .LANCHOR6
-	add	x0, x0, :lo12:.LANCHOR6
+	adrp	x0, .LANCHOR8
+	add	x0, x0, :lo12:.LANCHOR8
 	str	x0, [x29, 136]
-	adrp	x0, .LANCHOR152
-	add	x0, x0, :lo12:.LANCHOR152
+	adrp	x0, .LANCHOR149
+	add	x0, x0, :lo12:.LANCHOR149
 	str	x0, [x29, 128]
-.L1417:
+.L1379:
 	ldr	x0, [x29, 136]
 	ldrh	w0, [x0]
 	cmp	w27, w0
-	bcc	.L1427
-.L1426:
-	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	bcc	.L1389
+.L1388:
+	ldr	x0, [x19, #:lo12:.LANCHOR12]
 	str	w28, [x0, 580]
-.L1416:
-	cbz	w21, .L1429
+.L1378:
+	cbz	w21, .L1391
 	ldr	x2, [x22, #:lo12:.LANCHOR110]
-	adrp	x0, .LANCHOR6
-	ldrh	w5, [x0, #:lo12:.LANCHOR6]
-	ldr	x0, [x24, #:lo12:.LANCHOR7]
+	adrp	x0, .LANCHOR8
+	ldrh	w5, [x0, #:lo12:.LANCHOR8]
+	ldr	x0, [x24, #:lo12:.LANCHOR9]
 	ldrh	w1, [x2, 134]
 	add	x0, x0, x1, uxth 2
-.L1430:
+.L1392:
 	cmp	w1, w5
-	bcc	.L1432
+	bcc	.L1394
 	ldrh	w0, [x2, 72]
 	add	w0, w21, w0
 	strh	w0, [x2, 72]
 	ldrh	w0, [x2, 98]
 	cmp	w21, w0
-	bcs	.L1429
+	bcs	.L1391
 	sub	w21, w0, w21
 	strh	w21, [x2, 98]
-.L1429:
-	cbz	w20, .L1435
+.L1391:
+	cbz	w20, .L1397
 	ldr	x2, [x22, #:lo12:.LANCHOR110]
-	adrp	x0, .LANCHOR6
-	ldrh	w6, [x0, #:lo12:.LANCHOR6]
-	ldr	x0, [x24, #:lo12:.LANCHOR7]
+	adrp	x0, .LANCHOR8
+	ldrh	w6, [x0, #:lo12:.LANCHOR8]
+	ldr	x0, [x24, #:lo12:.LANCHOR9]
 	ldrh	w1, [x2, 134]
 	add	x0, x0, x1, uxth 2
-.L1436:
+.L1398:
 	cmp	w1, w6
-	bcc	.L1438
+	bcc	.L1400
 	ldrh	w0, [x2, 74]
 	add	w0, w20, w0
 	strh	w0, [x2, 74]
 	ldrh	w0, [x2, 96]
 	cmp	w20, w0
-	bcs	.L1435
+	bcs	.L1397
 	sub	w20, w0, w20
 	strh	w20, [x2, 96]
-.L1435:
-	mov	w1, 5
-	mov	w0, 0
-	bl	zftl_get_gc_node
+.L1397:
+	mov	w1, 0
+	adrp	x0, .LANCHOR92
+	add	x0, x0, :lo12:.LANCHOR92
+	bl	_list_get_gc_head_node
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L1393
-	adrp	x2, .LANCHOR9
+	beq	.L1355
+	adrp	x2, .LANCHOR11
 	ubfiz	x1, x1, 1, 16
-	ldr	x3, [x2, #:lo12:.LANCHOR9]
-	adrp	x2, .LANCHOR95
-	ldrh	w2, [x2, #:lo12:.LANCHOR95]
+	ldr	x3, [x2, #:lo12:.LANCHOR11]
+	adrp	x2, .LANCHOR94
+	ldrh	w2, [x2, #:lo12:.LANCHOR94]
 	ldrh	w1, [x3, x1]
 	cmp	w1, w2, lsr 1
-	bhi	.L1393
+	bhi	.L1355
 	add	w23, w23, 1
 	mov	w2, 1
 	mov	w1, 0
 	bl	gc_add_sblk
-.L1393:
+.L1355:
 	add	w0, w23, w25
-.L1388:
+.L1350:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -8734,139 +8632,139 @@ gc_static_wearleveling:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L1403:
+.L1365:
 	uxtw	x7, w28
-	ldr	x6, [x24, #:lo12:.LANCHOR7]
+	ldr	x6, [x24, #:lo12:.LANCHOR9]
 	lsl	x2, x7, 2
 	add	x11, x6, x2
 	ldrb	w0, [x11, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L1395
+	beq	.L1357
 	ubfx	x4, x0, 3, 2
-	tbz	x4, 0, .L1396
+	tbz	x4, 0, .L1358
 	ldr	w0, [x6, x2]
 	ldrh	w1, [x6, x2]
 	ubfx	x0, x0, 11, 8
 	and	w1, w1, 2047
-.L1397:
+.L1359:
 	ldr	w3, [x29, 136]
 	add	w26, w26, 1
 	and	w26, w26, 65535
 	cmp	w20, w1
 	add	w3, w3, w1
 	str	w3, [x29, 136]
-	bls	.L1441
-	ldr	x3, [x19, #:lo12:.LANCHOR10]
+	bls	.L1403
+	ldr	x3, [x19, #:lo12:.LANCHOR12]
 	mov	w20, w1
 	strh	w28, [x3, 586]
-.L1441:
+.L1403:
 	ldr	w3, [x29, 148]
 	cmp	w3, w1
-	bcs	.L1400
+	bcs	.L1362
 	mov	w27, w28
 	str	w1, [x29, 148]
-.L1400:
+.L1362:
 	mov	w3, 65535
 	cmp	w0, w3
-	bne	.L1399
-.L1401:
+	bne	.L1361
+.L1363:
 	cmp	w0, 9
 	ccmp	w1, 9, 0, hi
-	bhi	.L1395
+	bhi	.L1357
 	ldr	w0, [x8]
-	tbz	x0, 8, .L1395
-	adrp	x0, .LANCHOR9
+	tbz	x0, 8, .L1357
+	adrp	x0, .LANCHOR11
 	ldr	w3, [x6, x2]
 	ldrh	w2, [x6, x2]
 	mov	w1, w28
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrb	w6, [x11, 3]
 	ubfx	x3, x3, 11, 8
 	ldrb	w5, [x11, 2]
 	and	w2, w2, 2047
 	str	x8, [x29, 120]
 	ldrh	w7, [x0, x7, lsl 1]
-	adrp	x0, .LC85
+	adrp	x0, .LC82
 	str	x10, [x29, 152]
 	ubfx	x5, x5, 5, 3
-	add	x0, x0, :lo12:.LC85
+	add	x0, x0, :lo12:.LC82
 	bl	printf
 	ldr	x8, [x29, 120]
 	ldr	x10, [x29, 152]
-.L1395:
+.L1357:
 	add	w28, w28, 1
 	and	w28, w28, 65535
-	b	.L1394
-.L1396:
+	b	.L1356
+.L1358:
 	tst	w0, 24
-	bne	.L1398
+	bne	.L1360
 	ldrh	w1, [x6, x2]
 	mov	w0, 65535
 	and	w1, w1, 2047
-	b	.L1397
-.L1398:
+	b	.L1359
+.L1360:
 	ldr	w0, [x6, x2]
 	mov	w1, 65535
 	ubfx	x0, x0, 11, 8
-.L1399:
+.L1361:
 	ldr	w3, [x29, 144]
 	add	w25, w25, 1
 	and	w25, w25, 65535
 	cmp	w21, w0
 	add	w3, w3, w0
 	str	w3, [x29, 144]
-	bls	.L1402
-	ldr	x3, [x19, #:lo12:.LANCHOR10]
+	bls	.L1364
+	ldr	x3, [x19, #:lo12:.LANCHOR12]
 	mov	w21, w0
 	strh	w28, [x3, 584]
-.L1402:
+.L1364:
 	cmp	w23, w0
-	bcs	.L1401
+	bcs	.L1363
 	mov	w23, w0
 	str	w28, [x29, 128]
-	b	.L1401
-.L1407:
-	cbnz	w3, .L1406
-	ldr	x1, [x19, #:lo12:.LANCHOR10]
+	b	.L1363
+.L1369:
+	cbnz	w3, .L1368
+	ldr	x1, [x19, #:lo12:.LANCHOR12]
 	mov	w0, 65535
 	ldrh	w2, [x1, 590]
 	cmp	w2, w0
-	bne	.L1406
+	bne	.L1368
 	ldrh	w0, [x1, 586]
 	ldrh	w1, [x1, 588]
 	cmp	w1, w0
-	beq	.L1406
+	beq	.L1368
 	bl	zftl_remove_free_node
-	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	ldr	x0, [x19, #:lo12:.LANCHOR12]
 	ldrh	w1, [x0, 586]
 	strh	w1, [x0, 590]
 	mov	w1, -1
 	strh	w1, [x0, 586]
-	b	.L1406
-.L1410:
+	b	.L1368
+.L1372:
 	and	w0, w0, 248
 	cmp	w0, 16
-	bne	.L1409
-	ldr	x1, [x19, #:lo12:.LANCHOR10]
+	bne	.L1371
+	ldr	x1, [x19, #:lo12:.LANCHOR12]
 	mov	w0, 65535
 	ldrh	w2, [x1, 588]
 	cmp	w2, w0
-	bne	.L1409
+	bne	.L1371
 	ldrh	w0, [x1, 584]
 	ldrh	w1, [x1, 590]
 	cmp	w1, w0
-	beq	.L1409
+	beq	.L1371
 	bl	zftl_remove_free_node
-	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	ldr	x0, [x19, #:lo12:.LANCHOR12]
 	ldrh	w1, [x0, 584]
 	strh	w1, [x0, 588]
 	mov	w1, -1
 	strh	w1, [x0, 584]
-	b	.L1409
-.L1427:
+	b	.L1371
+.L1389:
 	add	w7, w28, 1
-	ldr	x4, [x24, #:lo12:.LANCHOR7]
+	ldr	x4, [x24, #:lo12:.LANCHOR9]
 	and	w28, w7, 65535
 	cmp	w0, w28
 	csel	w28, w28, wzr, hi
@@ -8875,31 +8773,31 @@ gc_static_wearleveling:
 	add	x0, x4, x3
 	ldrb	w0, [x0, 2]
 	tst	w0, 192
-	beq	.L1419
+	beq	.L1381
 	and	w2, w0, 224
 	cmp	w2, 224
-	beq	.L1419
+	beq	.L1381
 	ubfx	x0, x0, 3, 2
 	and	w1, w0, 1
-	tbz	x0, 0, .L1420
+	tbz	x0, 0, .L1382
 	cmp	w2, 160
-.L1507:
-	bne	.L1422
-	adrp	x0, .LANCHOR153
+.L1469:
+	bne	.L1384
+	adrp	x0, .LANCHOR150
 	ldr	w2, [x29, 144]
-	ldrh	w0, [x0, #:lo12:.LANCHOR153]
+	ldrh	w0, [x0, #:lo12:.LANCHOR150]
 	cmp	w2, w0
-	ble	.L1423
+	ble	.L1385
 	ldr	w0, [x4, x3]
 	ubfx	x0, x0, 11, 8
 	cmp	w0, w21
-	bls	.L1424
-	cbz	w1, .L1423
+	bls	.L1386
+	cbz	w1, .L1385
 	ldrh	w0, [x4, x3]
 	and	w0, w0, 2047
 	cmp	w0, w20
-	bgt	.L1423
-.L1424:
+	bgt	.L1385
+.L1386:
 	stp	x4, x8, [x29, 104]
 	mov	w2, 1
 	str	x3, [x29, 120]
@@ -8907,60 +8805,60 @@ gc_static_wearleveling:
 	mov	w0, w28
 	bl	gc_add_sblk
 	mov	w0, 1
-	strh	w0, [x26, 2110]
+	strh	w0, [x26, 2192]
 	ldr	x0, [x29, 152]
 	add	w23, w23, 1
 	ldp	x4, x8, [x29, 104]
 	ldr	x3, [x29, 120]
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1423
-	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 10, .L1385
+	adrp	x0, .LANCHOR11
 	ldr	w6, [x4, x3]
 	ldrh	w5, [x4, x3]
-	ldr	x1, [x0, #:lo12:.LANCHOR9]
-	ldr	x0, [x24, #:lo12:.LANCHOR7]
+	ldr	x1, [x0, #:lo12:.LANCHOR11]
+	ldr	x0, [x24, #:lo12:.LANCHOR9]
 	ubfx	x6, x6, 11, 8
 	ldrh	w4, [x26, 56]
 	and	w5, w5, 2047
 	add	x3, x0, x3
-	adrp	x0, .LC92
-	add	x0, x0, :lo12:.LC92
+	adrp	x0, .LC89
+	add	x0, x0, :lo12:.LC89
 	ldrb	w2, [x3, 2]
 	ldrh	w3, [x1, x8, lsl 1]
 	mov	w1, w28
 	ubfx	x2, x2, 5, 3
-.L1508:
+.L1470:
 	bl	printf
-.L1423:
+.L1385:
 	cmp	w23, 4
 	ccmp	w25, 4, 2, ls
-	bhi	.L1426
-.L1419:
+	bhi	.L1388
+.L1381:
 	add	w27, w27, 1
 	and	w27, w27, 65535
-	b	.L1417
-.L1420:
+	b	.L1379
+.L1382:
 	cmp	w0, 2
-	b	.L1507
-.L1422:
+	b	.L1469
+.L1384:
 	ldr	x2, [x29, 128]
 	ldr	w0, [x29, 148]
 	sub	w0, w0, w20
 	ldrh	w2, [x2]
 	cmp	w0, w2
-	ble	.L1423
+	ble	.L1385
 	ldrh	w0, [x4, x3]
 	add	w2, w20, 8
 	and	w0, w0, 2047
 	cmp	w0, w2
-	ble	.L1425
-	cbz	w1, .L1423
+	ble	.L1387
+	cbz	w1, .L1385
 	ldr	w0, [x4, x3]
 	add	w1, w21, 4
 	ubfx	x0, x0, 11, 8
 	cmp	w0, w1
-	bgt	.L1423
-.L1425:
+	bgt	.L1385
+.L1387:
 	stp	x4, x8, [x29, 104]
 	mov	w2, 1
 	str	x3, [x29, 120]
@@ -8968,73 +8866,73 @@ gc_static_wearleveling:
 	mov	w0, w28
 	bl	gc_add_sblk
 	mov	w0, 1
-	strh	w0, [x26, 2110]
+	strh	w0, [x26, 2192]
 	ldr	x0, [x29, 152]
 	add	w25, w25, 1
 	ldp	x4, x8, [x29, 104]
 	ldr	x3, [x29, 120]
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1423
-	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 10, .L1385
+	adrp	x0, .LANCHOR11
 	ldr	w6, [x4, x3]
 	ldrh	w5, [x4, x3]
-	ldr	x1, [x0, #:lo12:.LANCHOR9]
-	ldr	x0, [x24, #:lo12:.LANCHOR7]
+	ldr	x1, [x0, #:lo12:.LANCHOR11]
+	ldr	x0, [x24, #:lo12:.LANCHOR9]
 	ubfx	x6, x6, 11, 8
 	and	w5, w5, 2047
 	ldrh	w4, [x26, 56]
 	add	x3, x0, x3
-	adrp	x0, .LC93
-	add	x0, x0, :lo12:.LC93
+	adrp	x0, .LC90
+	add	x0, x0, :lo12:.LC90
 	ldrb	w2, [x3, 2]
 	ldrh	w3, [x1, x8, lsl 1]
 	mov	w1, w28
 	ubfx	x2, x2, 5, 3
-	b	.L1508
-.L1444:
+	b	.L1470
+.L1406:
 	mov	w25, 0
 	mov	w23, 0
-	b	.L1416
-.L1432:
+	b	.L1378
+.L1394:
 	ldr	w3, [x0]
 	ubfx	x4, x3, 11, 8
 	cmp	w21, w4
-	bhi	.L1431
+	bhi	.L1393
 	ldrb	w6, [x0, 2]
 	tst	w6, 24
-	beq	.L1431
+	beq	.L1393
 	sub	w4, w4, w21
 	bfi	w3, w4, 11, 8
 	str	w3, [x0]
-.L1431:
+.L1393:
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 65535
-	b	.L1430
-.L1438:
+	b	.L1392
+.L1400:
 	ldrh	w3, [x0]
 	and	w4, w3, 2047
 	cmp	w4, w20
-	blt	.L1437
+	blt	.L1399
 	ldrb	w5, [x0, 2]
 	and	w5, w5, 24
 	cmp	w5, 16
-	beq	.L1437
+	beq	.L1399
 	sub	w4, w4, w20
 	bfi	w3, w4, 0, 11
 	strh	w3, [x0]
-.L1437:
+.L1399:
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 65535
-	b	.L1436
-.L1443:
+	b	.L1398
+.L1405:
 	mov	w25, 0
 	mov	w23, 0
-	b	.L1393
-.L1442:
+	b	.L1355
+.L1404:
 	mov	w0, 0
-	b	.L1388
+	b	.L1350
 	.size	gc_static_wearleveling, .-gc_static_wearleveling
 	.section	.text.zftl_sblk_list_init,"ax",@progbits
 	.align	2
@@ -9047,15 +8945,15 @@ zftl_sblk_list_init:
 	mov	w1, 0
 	add	x29, sp, 0
 	stp	x27, x28, [sp, 80]
-	adrp	x28, .LANCHOR6
+	adrp	x28, .LANCHOR8
 	stp	x19, x20, [sp, 16]
 	adrp	x20, .LANCHOR99
-	ldrh	w2, [x28, #:lo12:.LANCHOR6]
+	ldrh	w2, [x28, #:lo12:.LANCHOR8]
 	mov	w27, 0
 	stp	x21, x22, [sp, 32]
 	adrp	x22, .LANCHOR97
 	stp	x23, x24, [sp, 48]
-	adrp	x21, .LANCHOR93
+	adrp	x21, .LANCHOR91
 	stp	x25, x26, [sp, 64]
 	adrp	x26, .LANCHOR110
 	mul	w2, w2, w0
@@ -9067,42 +8965,42 @@ zftl_sblk_list_init:
 	bl	ftl_memset
 	strh	wzr, [x25, #:lo12:.LANCHOR103]
 	adrp	x0, .LANCHOR109
-	adrp	x3, .LANCHOR80
-	adrp	x2, .LANCHOR86
+	adrp	x3, .LANCHOR79
+	adrp	x2, .LANCHOR85
 	mov	w1, 32
 	strh	w1, [x0, #:lo12:.LANCHOR109]
 	adrp	x11, .LANCHOR104
-	ldrb	w0, [x3, #:lo12:.LANCHOR80]
+	ldrb	w0, [x3, #:lo12:.LANCHOR79]
 	adrp	x10, .LANCHOR106
-	ldrh	w1, [x2, #:lo12:.LANCHOR86]
+	ldrh	w1, [x2, #:lo12:.LANCHOR85]
 	adrp	x7, .LANCHOR108
-	adrp	x6, .LANCHOR89
-	adrp	x5, .LANCHOR12
-	adrp	x4, .LANCHOR88
+	adrp	x6, .LANCHOR90
+	adrp	x5, .LANCHOR95
+	adrp	x4, .LANCHOR92
 	ldr	x8, [x29, 192]
 	str	xzr, [x11, #:lo12:.LANCHOR104]
 	mul	w1, w0, w1
 	mov	w0, 32768
 	str	xzr, [x10, #:lo12:.LANCHOR106]
 	str	xzr, [x7, #:lo12:.LANCHOR108]
-	str	xzr, [x6, #:lo12:.LANCHOR89]
+	str	xzr, [x6, #:lo12:.LANCHOR90]
 	sdiv	w0, w0, w1
-	str	xzr, [x5, #:lo12:.LANCHOR12]
-	str	xzr, [x4, #:lo12:.LANCHOR88]
+	str	xzr, [x5, #:lo12:.LANCHOR95]
+	str	xzr, [x4, #:lo12:.LANCHOR92]
 	strh	wzr, [x24, #:lo12:.LANCHOR105]
 	strh	wzr, [x23, #:lo12:.LANCHOR107]
 	sxth	w0, w0
 	str	w0, [x29, 204]
 	ldr	x0, [x26, #:lo12:.LANCHOR110]
 	strh	wzr, [x22, #:lo12:.LANCHOR97]
-	strh	wzr, [x21, #:lo12:.LANCHOR93]
+	strh	wzr, [x21, #:lo12:.LANCHOR91]
 	strh	wzr, [x20, #:lo12:.LANCHOR99]
 	strh	wzr, [x0, 146]
 	ldrsh	w19, [x0, 134]
-	add	x0, x28, :lo12:.LANCHOR6
+	add	x0, x28, :lo12:.LANCHOR8
 	str	x0, [x29, 192]
-	adrp	x0, .LANCHOR154
-	add	x0, x0, :lo12:.LANCHOR154
+	adrp	x0, .LANCHOR151
+	add	x0, x0, :lo12:.LANCHOR151
 	adrp	x28, .LC0
 	str	x0, [x29, 112]
 	add	x0, x28, :lo12:.LC0
@@ -9112,11 +9010,11 @@ zftl_sblk_list_init:
 	stp	x10, x11, [x29, 168]
 	str	x8, [x29, 184]
 	str	x0, [x29, 104]
-.L1510:
+.L1472:
 	ldr	x0, [x29, 192]
 	ldrh	w0, [x0]
 	cmp	w19, w0
-	blt	.L1527
+	blt	.L1489
 	ldr	x0, [x26, #:lo12:.LANCHOR110]
 	ldrh	w1, [x25, #:lo12:.LANCHOR103]
 	ldp	x27, x28, [sp, 80]
@@ -9127,7 +9025,7 @@ zftl_sblk_list_init:
 	strh	w1, [x0, 116]
 	ldrh	w1, [x22, #:lo12:.LANCHOR97]
 	strh	w1, [x0, 122]
-	ldrh	w1, [x21, #:lo12:.LANCHOR93]
+	ldrh	w1, [x21, #:lo12:.LANCHOR91]
 	strh	w1, [x0, 120]
 	ldrh	w1, [x20, #:lo12:.LANCHOR99]
 	strh	w1, [x0, 124]
@@ -9137,29 +9035,29 @@ zftl_sblk_list_init:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 208
 	ret
-.L1527:
-	adrp	x0, .LANCHOR7
+.L1489:
+	adrp	x0, .LANCHOR9
 	sxtw	x2, w19
-	ldr	x3, [x0, #:lo12:.LANCHOR7]
+	ldr	x3, [x0, #:lo12:.LANCHOR9]
 	add	x28, x3, x2, lsl 2
 	ldrb	w5, [x28, 3]
-	cbz	w5, .L1528
+	cbz	w5, .L1490
 	ldr	x0, [x29, 128]
 	mov	w1, 0
 	ldr	x6, [x26, #:lo12:.LANCHOR110]
-	ldrb	w7, [x0, #:lo12:.LANCHOR80]
+	ldrb	w7, [x0, #:lo12:.LANCHOR79]
 	ldr	x0, [x29, 120]
-	ldrh	w8, [x0, #:lo12:.LANCHOR86]
+	ldrh	w8, [x0, #:lo12:.LANCHOR85]
 	mov	w0, 0
-.L1512:
+.L1474:
 	cmp	w1, w7
-	blt	.L1515
-	cbz	w0, .L1516
+	blt	.L1477
+	cbz	w0, .L1478
 	mov	w1, 32768
 	sdiv	w0, w1, w0
 	add	w0, w0, 1
 	sxth	w0, w0
-.L1511:
+.L1473:
 	ldr	x3, [x29, 184]
 	mov	w1, 6
 	smull	x1, w19, w1
@@ -9174,264 +9072,179 @@ zftl_sblk_list_init:
 	and	w0, w0, 224
 	cmp	w0, 32
 	ccmp	w0, w1, 4, ne
-	beq	.L1517
-	adrp	x1, .LANCHOR10
-	ldr	x1, [x1, #:lo12:.LANCHOR10]
+	beq	.L1479
+	adrp	x1, .LANCHOR12
+	ldr	x1, [x1, #:lo12:.LANCHOR12]
 	ldrh	w4, [x1, 16]
 	cmp	w19, w4
-	beq	.L1517
+	beq	.L1479
 	ldrh	w4, [x1, 48]
 	cmp	w19, w4
-	beq	.L1517
+	beq	.L1479
 	ldrh	w1, [x1, 80]
 	cmp	w19, w1
-	beq	.L1517
+	beq	.L1479
 	cmp	w0, 64
-	bne	.L1518
+	bne	.L1480
 	ldr	x0, [x29, 144]
 	add	x2, x22, :lo12:.LANCHOR97
 	mov	w1, w19
-	add	x0, x0, :lo12:.LANCHOR12
-.L1534:
+	add	x0, x0, :lo12:.LANCHOR95
+.L1496:
 	bl	_insert_data_list
-.L1517:
+.L1479:
 	add	w19, w19, 1
 	sxth	w19, w19
-	b	.L1510
-.L1515:
+	b	.L1472
+.L1477:
 	asr	w4, w5, w1
-	tbnz	x4, 0, .L1513
+	tbnz	x4, 0, .L1475
 	add	w0, w8, w0
 	sxth	w0, w0
-.L1514:
+.L1476:
 	add	w1, w1, 1
-	b	.L1512
-.L1513:
+	b	.L1474
+.L1475:
 	ldrh	w4, [x6, 146]
 	add	w4, w4, 1
 	strh	w4, [x6, 146]
-	b	.L1514
-.L1516:
+	b	.L1476
+.L1478:
 	ldrb	w1, [x28, 2]
 	mov	w4, -1
 	orr	w1, w1, -32
 	strb	w1, [x28, 2]
-	adrp	x1, .LANCHOR9
-	ldr	x1, [x1, #:lo12:.LANCHOR9]
+	adrp	x1, .LANCHOR11
+	ldr	x1, [x1, #:lo12:.LANCHOR11]
 	strh	w4, [x1, x2, lsl 1]
-	b	.L1511
-.L1528:
+	b	.L1473
+.L1490:
 	ldr	w0, [x29, 204]
-	b	.L1511
-.L1518:
+	b	.L1473
+.L1480:
 	cmp	w0, 96
-	bne	.L1519
+	bne	.L1481
 	ldr	x0, [x29, 152]
 	add	x2, x20, :lo12:.LANCHOR99
 	mov	w1, w19
-	add	x0, x0, :lo12:.LANCHOR89
-	b	.L1534
-.L1519:
+	add	x0, x0, :lo12:.LANCHOR90
+	b	.L1496
+.L1481:
 	cmp	w0, 160
-	bne	.L1520
+	bne	.L1482
 	ldr	x0, [x29, 136]
-	add	x2, x21, :lo12:.LANCHOR93
+	add	x2, x21, :lo12:.LANCHOR91
 	mov	w1, w19
-	add	x0, x0, :lo12:.LANCHOR88
-	b	.L1534
-.L1520:
-	cbnz	w0, .L1517
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	add	x0, x0, :lo12:.LANCHOR92
+	b	.L1496
+.L1482:
+	cbnz	w0, .L1479
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrh	w2, [x0, x2, lsl 1]
-	cbz	w2, .L1521
+	cbz	w2, .L1483
 	cmp	w27, 2
-	bgt	.L1522
+	bgt	.L1484
 	mov	w1, w19
-	adrp	x0, .LC94
-	add	x0, x0, :lo12:.LC94
+	adrp	x0, .LC91
+	add	x0, x0, :lo12:.LC91
 	bl	printf
 	ldrb	w0, [x28, 2]
 	add	w27, w27, 1
 	sxth	w27, w27
-	tbz	x0, 4, .L1523
+	tbz	x0, 4, .L1485
 	mov	w1, 5
-.L1533:
+.L1495:
 	bfi	w0, w1, 5, 3
 	strb	w0, [x28, 2]
 	mov	w2, 0
 	mov	w1, 1
 	mov	w0, w19
 	bl	gc_add_sblk
-	b	.L1517
-.L1523:
+	b	.L1479
+.L1485:
 	mov	w1, 2
-	b	.L1533
-.L1522:
+	b	.L1495
+.L1484:
 	ldp	x0, x1, [x29, 104]
-	mov	w2, 651
+	mov	w2, 656
 	bl	printf
-.L1521:
+.L1483:
 	ldrb	w0, [x28, 2]
 	ands	w0, w0, 24
-	bne	.L1525
+	bne	.L1487
 	ldr	x0, [x29, 176]
 	add	x2, x25, :lo12:.LANCHOR103
 	mov	w1, w19
 	add	x0, x0, :lo12:.LANCHOR104
-.L1535:
+.L1497:
 	bl	_insert_free_list
-	b	.L1517
-.L1525:
+	b	.L1479
+.L1487:
 	cmp	w0, 16
-	bne	.L1526
+	bne	.L1488
 	ldr	x0, [x29, 168]
 	add	x2, x24, :lo12:.LANCHOR105
 	mov	w1, w19
 	add	x0, x0, :lo12:.LANCHOR106
-	b	.L1535
-.L1526:
+	b	.L1497
+.L1488:
 	ldr	x0, [x29, 160]
 	add	x2, x23, :lo12:.LANCHOR107
 	mov	w1, w19
 	add	x0, x0, :lo12:.LANCHOR108
-	b	.L1535
+	b	.L1497
 	.size	zftl_sblk_list_init, .-zftl_sblk_list_init
-	.section	.text.ftl_open_sblk_init,"ax",@progbits
-	.align	2
-	.global	ftl_open_sblk_init
-	.type	ftl_open_sblk_init, %function
-ftl_open_sblk_init:
-	stp	x29, x30, [sp, -80]!
-	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR80
-	stp	x23, x24, [sp, 48]
-	adrp	x22, .LC82
-	stp	x19, x20, [sp, 16]
-	adrp	x24, .LANCHOR95
-	mov	x19, x0
-	mov	w23, w1
-	add	x24, x24, :lo12:.LANCHOR95
-	add	x21, x21, :lo12:.LANCHOR80
-	add	x22, x22, :lo12:.LC82
-	stp	x25, x26, [sp, 64]
-.L1537:
-	mov	w25, 65535
-.L1538:
-	mov	w0, w23
-	bl	ftl_alloc_sblk
-	and	w20, w0, 65535
-	cmp	w20, w25
-	beq	.L1538
-	mov	w1, 0
-	mov	w0, w20
-	bl	ftl_erase_sblk
-	add	x1, x19, 16
-	mov	w0, w20
-	bl	ftl_get_blk_list_in_sblk
-	and	w0, w0, 255
-	ldrh	w1, [x24]
-	cmp	w23, 2
-	strb	w0, [x19, 9]
-	strh	w20, [x19]
-	strh	wzr, [x19, 2]
-	mul	w0, w1, w0
-	strb	wzr, [x19, 5]
-	strh	w0, [x19, 6]
-	strh	wzr, [x19, 10]
-	strb	w23, [x19, 4]
-	beq	.L1541
-	ldrb	w0, [x21]
-	mul	w0, w1, w0
-	and	w0, w0, 65535
-.L1539:
-	ldrb	w2, [x21]
-	adrp	x26, .LANCHOR9
-	strh	w0, [x19, 12]
-	ubfiz	x25, x20, 1, 16
-	mul	w2, w2, w1
-	adrp	x1, .LANCHOR117
-	ldr	x3, [x1, #:lo12:.LANCHOR117]
-	mov	w1, 255
-	lsl	w2, w2, 2
-	add	x0, x3, x0, uxth 2
-	bl	ftl_memset
-	ldr	x0, [x26, #:lo12:.LANCHOR9]
-	ldrh	w1, [x19, 6]
-	strh	w1, [x0, x25]
-	ldrb	w0, [x19, 9]
-	cbnz	w0, .L1536
-	mov	w1, w20
-	mov	x0, x22
-	bl	printf
-	ldr	x0, [x26, #:lo12:.LANCHOR9]
-	mov	w1, -1
-	strh	w1, [x0, x25]
-	mov	w0, 7
-	strb	w0, [x19, 4]
-	b	.L1537
-.L1541:
-	mov	w0, 0
-	b	.L1539
-.L1536:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
-	ret
-	.size	ftl_open_sblk_init, .-ftl_open_sblk_init
 	.section	.text.pm_free_sblk,"ax",@progbits
 	.align	2
 	.global	pm_free_sblk
 	.type	pm_free_sblk, %function
 pm_free_sblk:
 	stp	x29, x30, [sp, -384]!
-	adrp	x0, .LANCHOR155
+	adrp	x0, .LANCHOR152
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	ldrh	w1, [x0, #:lo12:.LANCHOR155]
+	ldrh	w1, [x0, #:lo12:.LANCHOR152]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	cmp	w1, 128
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	bls	.L1545
-	adrp	x1, .LANCHOR156
+	bls	.L1499
+	adrp	x1, .LANCHOR153
 	adrp	x0, .LC0
 	mov	w2, 94
-	add	x1, x1, :lo12:.LANCHOR156
+	add	x1, x1, :lo12:.LANCHOR153
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1545:
+.L1499:
 	adrp	x5, .LANCHOR110
 	mov	x26, x5
-	ldrh	w3, [x19, #:lo12:.LANCHOR155]
+	ldrh	w3, [x19, #:lo12:.LANCHOR152]
 	mov	w1, 0
 	ldr	x0, [x5, #:lo12:.LANCHOR110]
 	mov	w19, 0
 	mov	w4, 65535
 	add	x0, x0, 416
 	ldrh	w2, [x0, 272]
-.L1548:
+.L1502:
 	ldrh	w6, [x0]
 	cmp	w6, w4
-	beq	.L1546
+	beq	.L1500
 	add	w1, w1, 1
 	and	w1, w1, 65535
-.L1546:
+.L1500:
 	cmp	w1, w2
-	bcs	.L1547
+	bcs	.L1501
 	cmp	w1, w3
-	bcs	.L1547
+	bcs	.L1501
 	add	w19, w19, 1
 	add	x0, x0, 2
 	and	w19, w19, 65535
 	cmp	w19, 128
-	bne	.L1548
-.L1547:
+	bne	.L1502
+.L1501:
 	add	w19, w19, 1
 	mov	w0, 128
 	and	w19, w19, 65535
@@ -9441,16 +9254,16 @@ pm_free_sblk:
 	csel	w19, w19, w0, ne
 	mov	w1, 0
 	mov	x0, x22
-	adrp	x23, .LANCHOR76
+	adrp	x23, .LANCHOR75
 	bl	ftl_memset
-	adrp	x0, .LANCHOR75
+	adrp	x0, .LANCHOR74
 	ldr	x6, [x26, #:lo12:.LANCHOR110]
 	mov	w2, 24
-	ldrb	w11, [x23, #:lo12:.LANCHOR76]
-	ldrh	w10, [x0, #:lo12:.LANCHOR75]
-	adrp	x0, .LANCHOR32
+	ldrb	w11, [x23, #:lo12:.LANCHOR75]
+	ldrh	w10, [x0, #:lo12:.LANCHOR74]
+	adrp	x0, .LANCHOR31
 	add	x4, x6, 704
-	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
 	ldrh	w1, [x6, 698]
 	sub	w2, w2, w0
 	sub	w0, w2, w10
@@ -9459,24 +9272,24 @@ pm_free_sblk:
 	add	x1, x6, x1, lsl 2
 	lsl	w2, w2, w0
 	sub	w2, w2, #1
-.L1550:
+.L1504:
 	cmp	x1, x4
-	bne	.L1553
-	adrp	x24, .LANCHOR80
-	adrp	x25, .LANCHOR95
-	adrp	x27, .LC95
-	adrp	x28, .LANCHOR14
-	ldrb	w21, [x24, #:lo12:.LANCHOR80]
-	add	x23, x23, :lo12:.LANCHOR76
-	ldrh	w0, [x25, #:lo12:.LANCHOR95]
-	add	x27, x27, :lo12:.LC95
-	add	x28, x28, :lo12:.LANCHOR14
+	bne	.L1507
+	adrp	x24, .LANCHOR79
+	adrp	x25, .LANCHOR94
+	adrp	x27, .LC92
+	adrp	x28, .LANCHOR19
+	ldrb	w21, [x24, #:lo12:.LANCHOR79]
+	add	x23, x23, :lo12:.LANCHOR75
+	ldrh	w0, [x25, #:lo12:.LANCHOR94]
+	add	x27, x27, :lo12:.LC92
+	add	x28, x28, :lo12:.LANCHOR19
 	mov	x20, 0
 	mov	w7, 65535
 	str	wzr, [x29, 124]
 	mul	w21, w21, w0
 	and	w21, w21, 65535
-.L1559:
+.L1513:
 	ldr	x0, [x26, #:lo12:.LANCHOR110]
 	and	w6, w20, 65535
 	ldrb	w2, [x23]
@@ -9486,36 +9299,36 @@ pm_free_sblk:
 	ldrh	w1, [x0, 692]
 	sdiv	w1, w1, w2
 	cmp	w1, w3
-	bne	.L1554
-	ldrb	w1, [x24, #:lo12:.LANCHOR80]
-	ldrh	w2, [x25, #:lo12:.LANCHOR95]
+	bne	.L1508
+	ldrb	w1, [x24, #:lo12:.LANCHOR79]
+	ldrh	w2, [x25, #:lo12:.LANCHOR94]
 	mul	w1, w1, w2
 	strh	w1, [x22, x20, lsl 1]
-.L1554:
+.L1508:
 	ldrh	w2, [x22, x20, lsl 1]
 	cmp	w2, w21
-	bcs	.L1555
+	bcs	.L1509
 	cmp	w2, 0
 	ldr	w1, [x29, 124]
 	csel	w21, w21, w2, eq
 	csel	w1, w1, w6, eq
 	str	w1, [x29, 124]
-.L1555:
+.L1509:
 	ldrh	w1, [x0, 74]
 	cmp	w1, 2
-	bls	.L1556
+	bls	.L1510
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L1556
-	adrp	x4, .LANCHOR7
+	beq	.L1510
+	adrp	x4, .LANCHOR9
 	ubfiz	x1, x3, 2, 16
 	ldrh	w0, [x0, 92]
-	ldr	x4, [x4, #:lo12:.LANCHOR7]
+	ldr	x4, [x4, #:lo12:.LANCHOR9]
 	add	w0, w0, 4
 	ldrh	w4, [x4, x1]
 	and	w4, w4, 2047
 	cmp	w4, w0
-	bgt	.L1556
+	bgt	.L1510
 	mov	w1, w8
 	str	w6, [x29, 104]
 	str	w8, [x29, 112]
@@ -9524,29 +9337,29 @@ pm_free_sblk:
 	ldr	w6, [x29, 104]
 	ldr	w8, [x29, 112]
 	mov	w7, w6
-.L1556:
+.L1510:
 	ldrh	w0, [x22, x20, lsl 1]
-	cbnz	w0, .L1557
+	cbnz	w0, .L1511
 	ldr	x0, [x26, #:lo12:.LANCHOR110]
 	sxtw	x6, w8
 	add	x1, x6, 208
 	ldrh	w3, [x0, x1, lsl 1]
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L1557
+	beq	.L1511
 	ldr	w1, [x28]
-	tbz	x1, 12, .L1558
+	tbz	x1, 12, .L1512
 	ldrh	w4, [x0, 688]
 	mov	w2, 0
 	str	x6, [x29, 104]
 	mov	w1, w8
 	str	w7, [x29, 112]
-	adrp	x0, .LC96
-	add	x0, x0, :lo12:.LC96
+	adrp	x0, .LC93
+	add	x0, x0, :lo12:.LC93
 	bl	printf
 	ldr	w7, [x29, 112]
 	ldr	x6, [x29, 104]
-.L1558:
+.L1512:
 	ldr	x0, [x26, #:lo12:.LANCHOR110]
 	add	x6, x6, 208
 	str	w7, [x29, 104]
@@ -9561,10 +9374,10 @@ pm_free_sblk:
 	ldrh	w1, [x0, 688]
 	sub	w1, w1, #1
 	strh	w1, [x0, 688]
-.L1557:
+.L1511:
 	add	x20, x20, 1
 	cmp	w19, w20, uxth
-	bhi	.L1559
+	bhi	.L1513
 	mov	w0, 65535
 	cmp	w7, w0
 	ldr	w0, [x29, 124]
@@ -9576,7 +9389,7 @@ pm_free_sblk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 384
 	ret
-.L1553:
+.L1507:
 	ldr	w0, [x4]
 	add	x7, x6, 416
 	mov	x3, 0
@@ -9584,20 +9397,20 @@ pm_free_sblk:
 	and	w0, w0, w2
 	udiv	w0, w0, w11
 	and	w0, w0, 65535
-.L1552:
+.L1506:
 	ldrh	w8, [x7]
 	cmp	w8, w0
-	bne	.L1551
+	bne	.L1505
 	ldrh	w8, [x22, x3, lsl 1]
 	add	w8, w8, 1
 	strh	w8, [x22, x3, lsl 1]
-.L1551:
+.L1505:
 	add	x3, x3, 1
 	add	x7, x7, 2
 	cmp	w19, w3, uxth
-	bhi	.L1552
+	bhi	.L1506
 	add	x4, x4, 4
-	b	.L1550
+	b	.L1504
 	.size	pm_free_sblk, .-pm_free_sblk
 	.section	.text.ftl_memcpy,"ax",@progbits
 	.align	2
@@ -9613,24 +9426,24 @@ ftl_memcpy:
 	.type	flash_info_data_init, %function
 flash_info_data_init:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR14
+	adrp	x0, .LANCHOR19
 	add	x29, sp, 0
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
 	str	x19, [sp, 16]
-	tbz	x0, 12, .L1572
-	adrp	x2, .LANCHOR157
-	adrp	x0, .LC97
-	add	x2, x2, :lo12:.LANCHOR157
-	mov	w1, 119
-	add	x0, x0, :lo12:.LC97
+	tbz	x0, 12, .L1526
+	adrp	x2, .LANCHOR154
+	adrp	x0, .LC94
+	add	x2, x2, :lo12:.LANCHOR154
+	mov	w1, 120
+	add	x0, x0, :lo12:.LC94
 	bl	printf
-.L1572:
-	adrp	x19, .LANCHOR27
+.L1526:
+	adrp	x19, .LANCHOR6
 	mov	w2, 2048
 	mov	w1, 0
-	ldr	x0, [x19, #:lo12:.LANCHOR27]
+	ldr	x0, [x19, #:lo12:.LANCHOR6]
 	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR27]
+	ldr	x0, [x19, #:lo12:.LANCHOR6]
 	mov	w1, 21321
 	movk	w1, 0x5359, lsl 16
 	mov	w2, 32
@@ -9640,15 +9453,15 @@ flash_info_data_init:
 	str	w1, [x0, -72]
 	mov	w1, 1
 	strh	w1, [x0, -64]
-	adrp	x1, .LANCHOR20
-	add	x1, x1, :lo12:.LANCHOR20
+	adrp	x1, .LANCHOR25
+	add	x1, x1, :lo12:.LANCHOR25
 	bl	ftl_memcpy
-	ldr	x0, [x19, #:lo12:.LANCHOR27]
+	ldr	x0, [x19, #:lo12:.LANCHOR6]
 	mov	w2, 32
 	ldr	x19, [sp, 16]
-	adrp	x1, .LANCHOR33
+	adrp	x1, .LANCHOR32
 	ldp	x29, x30, [sp], 32
-	add	x1, x1, :lo12:.LANCHOR33
+	add	x1, x1, :lo12:.LANCHOR32
 	add	x0, x0, 48
 	b	ftl_memcpy
 	.size	flash_info_data_init, .-flash_info_data_init
@@ -9658,15 +9471,15 @@ flash_info_data_init:
 	.type	ftl_memcpy32, %function
 ftl_memcpy32:
 	mov	x3, 0
-.L1578:
+.L1532:
 	cmp	w2, w3
-	bhi	.L1579
+	bhi	.L1533
 	ret
-.L1579:
+.L1533:
 	ldr	w4, [x1, x3, lsl 2]
 	str	w4, [x0, x3, lsl 2]
 	add	x3, x3, 1
-	b	.L1578
+	b	.L1532
 	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.ftl_memcmp,"ax",@progbits
 	.align	2
@@ -9702,47 +9515,47 @@ nandc_init:
 	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR14
+	adrp	x21, .LANCHOR19
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	ldr	w0, [x21, #:lo12:.LANCHOR19]
 	str	wzr, [x29, 56]
-	tbz	x0, 12, .L1584
-	adrp	x1, .LANCHOR158
-	adrp	x0, .LC98
+	tbz	x0, 12, .L1538
+	adrp	x1, .LANCHOR155
+	adrp	x0, .LC95
 	mov	x2, x19
-	add	x1, x1, :lo12:.LANCHOR158
-	add	x0, x0, :lo12:.LC98
+	add	x1, x1, :lo12:.LANCHOR155
+	add	x0, x0, :lo12:.LC95
 	bl	printf
-.L1584:
-	adrp	x20, .LANCHOR28
+.L1538:
+	adrp	x20, .LANCHOR27
 	mov	w0, 6
 	ldr	w2, [x19, 352]
 	mov	w1, 12336
-	strb	w0, [x20, #:lo12:.LANCHOR28]
-	adrp	x0, .LANCHOR13
+	strb	w0, [x20, #:lo12:.LANCHOR27]
+	adrp	x0, .LANCHOR7
 	movk	w1, 0x5638, lsl 16
 	mov	x22, x0
-	str	x19, [x0, #:lo12:.LANCHOR13]
+	str	x19, [x0, #:lo12:.LANCHOR7]
 	cmp	w2, w1
-	bne	.L1585
+	bne	.L1539
 	mov	w0, 8
-	strb	w0, [x20, #:lo12:.LANCHOR28]
-.L1585:
+	strb	w0, [x20, #:lo12:.LANCHOR27]
+.L1539:
 	ldr	w1, [x19, 128]
 	mov	w0, 12336
 	movk	w0, 0x5639, lsl 16
 	cmp	w1, w0
-	bne	.L1586
+	bne	.L1540
 	mov	w0, 9
-	strb	w0, [x20, #:lo12:.LANCHOR28]
-.L1586:
-	ldrb	w0, [x20, #:lo12:.LANCHOR28]
+	strb	w0, [x20, #:lo12:.LANCHOR27]
+.L1540:
+	ldrb	w0, [x20, #:lo12:.LANCHOR27]
 	cmp	w0, 9
-	adrp	x0, .LANCHOR51
-	bne	.L1587
+	adrp	x0, .LANCHOR50
+	bne	.L1541
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR51]
+	strb	w1, [x0, #:lo12:.LANCHOR50]
 	ldr	w0, [x29, 56]
 	mov	w1, 2
 	orr	w0, w0, 256
@@ -9764,38 +9577,38 @@ nandc_init:
 	str	w0, [x19, 84]
 	mov	w0, 39
 	str	w0, [x19, 84]
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1589
+	ldr	w0, [x21, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L1543
 	ldr	w1, [x19]
 	ldr	w2, [x19, 8]
 	ldr	w3, [x19, 80]
 	ldr	w4, [x19, 84]
 	ldr	w5, [x19, 88]
-.L1602:
-	adrp	x0, .LC99
-	add	x0, x0, :lo12:.LC99
+.L1556:
+	adrp	x0, .LC96
+	add	x0, x0, :lo12:.LC96
 	bl	printf
-.L1589:
-	adrp	x0, .LANCHOR52
+.L1543:
+	adrp	x0, .LANCHOR51
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR52]
-	adrp	x0, .LANCHOR54
-	strh	wzr, [x0, #:lo12:.LANCHOR54]
-	adrp	x0, .LANCHOR50
-	strb	wzr, [x0, #:lo12:.LANCHOR50]
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1583
-	ldrb	w1, [x20, #:lo12:.LANCHOR28]
-	adrp	x0, .LC100
-	add	x0, x0, :lo12:.LC100
+	strb	w1, [x0, #:lo12:.LANCHOR51]
+	adrp	x0, .LANCHOR53
+	strh	wzr, [x0, #:lo12:.LANCHOR53]
+	adrp	x0, .LANCHOR49
+	strb	wzr, [x0, #:lo12:.LANCHOR49]
+	ldr	w0, [x21, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L1537
+	ldrb	w1, [x20, #:lo12:.LANCHOR27]
+	adrp	x0, .LC97
+	add	x0, x0, :lo12:.LC97
 	bl	printf
-.L1583:
+.L1537:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1587:
-	strb	wzr, [x0, #:lo12:.LANCHOR51]
+.L1541:
+	strb	wzr, [x0, #:lo12:.LANCHOR50]
 	mov	w1, 1
 	ldr	w0, [x29, 56]
 	orr	w0, w0, 256
@@ -9819,17 +9632,17 @@ nandc_init:
 	str	w0, [x19, 308]
 	mov	w0, 2048
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR53
-	str	x0, [x1, #:lo12:.LANCHOR53]
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1589
-	ldr	x0, [x22, #:lo12:.LANCHOR13]
+	adrp	x1, .LANCHOR52
+	str	x0, [x1, #:lo12:.LANCHOR52]
+	ldr	w0, [x21, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L1543
+	ldr	x0, [x22, #:lo12:.LANCHOR7]
 	ldr	w1, [x0]
 	ldr	w2, [x0, 344]
 	ldr	w3, [x0, 304]
 	ldr	w4, [x0, 308]
 	ldr	w5, [x0, 312]
-	b	.L1602
+	b	.L1556
 	.size	nandc_init, .-nandc_init
 	.section	.text.zbuf_init,"ax",@progbits
 	.align	2
@@ -9837,16 +9650,16 @@ nandc_init:
 	.type	zbuf_init, %function
 zbuf_init:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LANCHOR56
+	adrp	x0, .LANCHOR55
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	add	x19, x0, :lo12:.LANCHOR56
+	add	x19, x0, :lo12:.LANCHOR55
 	stp	x21, x22, [sp, 32]
 	mov	x20, x0
 	adrp	x22, .LANCHOR131
 	add	x22, x22, :lo12:.LANCHOR131
 	mov	w21, 0
-.L1604:
+.L1558:
 	and	w0, w21, 255
 	strb	w0, [x19, 1]
 	add	w1, w0, 1
@@ -9863,15 +9676,15 @@ zbuf_init:
 	bl	ftl_malloc
 	str	x0, [x19, -40]
 	cmp	w21, 16
-	bne	.L1604
-	add	x0, x20, :lo12:.LANCHOR56
+	bne	.L1558
+	add	x0, x20, :lo12:.LANCHOR55
 	mov	w1, -1
 	strb	w1, [x0, 960]
+	adrp	x0, .LANCHOR56
+	strb	wzr, [x0, #:lo12:.LANCHOR56]
 	adrp	x0, .LANCHOR57
-	strb	wzr, [x0, #:lo12:.LANCHOR57]
-	adrp	x0, .LANCHOR58
 	ldp	x19, x20, [sp, 16]
-	strb	w21, [x0, #:lo12:.LANCHOR58]
+	strb	w21, [x0, #:lo12:.LANCHOR57]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
@@ -9882,94 +9695,94 @@ zbuf_init:
 	.type	gc_init, %function
 gc_init:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR85
-	mov	w2, 2136
+	adrp	x0, .LANCHOR84
+	mov	w2, 2216
 	mov	w1, 0
 	add	x29, sp, 0
-	strb	wzr, [x0, #:lo12:.LANCHOR85]
-	adrp	x0, .LANCHOR159
+	strb	wzr, [x0, #:lo12:.LANCHOR84]
+	adrp	x0, .LANCHOR156
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR71
-	strb	wzr, [x0, #:lo12:.LANCHOR159]
-	adrp	x0, .LANCHOR160
-	add	x19, x20, :lo12:.LANCHOR71
-	str	wzr, [x0, #:lo12:.LANCHOR160]
+	adrp	x20, .LANCHOR70
+	strb	wzr, [x0, #:lo12:.LANCHOR156]
+	adrp	x0, .LANCHOR157
+	add	x19, x20, :lo12:.LANCHOR70
+	str	wzr, [x0, #:lo12:.LANCHOR157]
 	adrp	x0, .LANCHOR96
 	strh	wzr, [x0, #:lo12:.LANCHOR96]
 	mov	x0, x19
 	bl	ftl_memset
 	str	xzr, [x19, 8]
 	mov	w0, -1
-	strh	w0, [x20, #:lo12:.LANCHOR71]
-	adrp	x0, .LANCHOR95
+	strh	w0, [x20, #:lo12:.LANCHOR70]
+	adrp	x0, .LANCHOR94
 	adrp	x4, .LANCHOR102
-	adrp	x20, .LANCHOR86
-	ldrh	w1, [x0, #:lo12:.LANCHOR95]
+	adrp	x20, .LANCHOR85
+	ldrh	w1, [x0, #:lo12:.LANCHOR94]
 	lsr	w2, w1, 1
 	lsr	w0, w1, 2
 	strh	w2, [x19, 38]
-	adrp	x2, .LANCHOR90
+	adrp	x2, .LANCHOR87
 	strh	w0, [x19, 36]
-	adrp	x19, .LANCHOR80
-	strh	wzr, [x2, #:lo12:.LANCHOR90]
-	adrp	x2, .LANCHOR91
-	ldrb	w3, [x19, #:lo12:.LANCHOR80]
-	strh	wzr, [x2, #:lo12:.LANCHOR91]
-	adrp	x2, .LANCHOR92
-	strh	wzr, [x2, #:lo12:.LANCHOR92]
+	adrp	x19, .LANCHOR79
+	strh	wzr, [x2, #:lo12:.LANCHOR87]
+	adrp	x2, .LANCHOR88
+	ldrb	w3, [x19, #:lo12:.LANCHOR79]
+	strh	wzr, [x2, #:lo12:.LANCHOR88]
+	adrp	x2, .LANCHOR89
+	strh	wzr, [x2, #:lo12:.LANCHOR89]
 	mul	w2, w1, w3
 	and	w2, w2, 65535
 	sub	w5, w2, #32
 	strh	w5, [x4, #:lo12:.LANCHOR102]
 	adrp	x4, .LANCHOR100
 	strh	w2, [x4, #:lo12:.LANCHOR100]
-	adrp	x2, .LANCHOR94
-	strh	w1, [x2, #:lo12:.LANCHOR94]
-	adrp	x1, .LANCHOR161
+	adrp	x2, .LANCHOR93
+	strh	w1, [x2, #:lo12:.LANCHOR93]
+	adrp	x1, .LANCHOR158
 	mov	w2, 4
-	strh	w2, [x1, #:lo12:.LANCHOR161]
-	adrp	x1, .LANCHOR70
-	strh	w0, [x1, #:lo12:.LANCHOR70]
-	ldrh	w0, [x20, #:lo12:.LANCHOR86]
+	strh	w2, [x1, #:lo12:.LANCHOR158]
+	adrp	x1, .LANCHOR69
+	strh	w0, [x1, #:lo12:.LANCHOR69]
+	ldrh	w0, [x20, #:lo12:.LANCHOR85]
 	mul	w0, w0, w3
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR162
-	str	x0, [x1, #:lo12:.LANCHOR162]
-	ldrb	w1, [x19, #:lo12:.LANCHOR80]
-	ldrh	w0, [x20, #:lo12:.LANCHOR86]
+	adrp	x1, .LANCHOR159
+	str	x0, [x1, #:lo12:.LANCHOR159]
+	ldrb	w1, [x19, #:lo12:.LANCHOR79]
+	ldrh	w0, [x20, #:lo12:.LANCHOR85]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR163
-	str	x0, [x1, #:lo12:.LANCHOR163]
-	ldrh	w1, [x20, #:lo12:.LANCHOR86]
-	ldrb	w0, [x19, #:lo12:.LANCHOR80]
+	adrp	x1, .LANCHOR160
+	str	x0, [x1, #:lo12:.LANCHOR160]
+	ldrh	w1, [x20, #:lo12:.LANCHOR85]
+	ldrb	w0, [x19, #:lo12:.LANCHOR79]
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR83
-	str	x0, [x1, #:lo12:.LANCHOR83]
-	ldrb	w1, [x19, #:lo12:.LANCHOR80]
-	ldrh	w0, [x20, #:lo12:.LANCHOR86]
+	adrp	x1, .LANCHOR82
+	str	x0, [x1, #:lo12:.LANCHOR82]
+	ldrb	w1, [x19, #:lo12:.LANCHOR79]
+	ldrh	w0, [x20, #:lo12:.LANCHOR85]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR77
-	str	x0, [x1, #:lo12:.LANCHOR77]
-	ldrb	w1, [x19, #:lo12:.LANCHOR80]
-	ldrh	w0, [x20, #:lo12:.LANCHOR86]
+	adrp	x1, .LANCHOR76
+	str	x0, [x1, #:lo12:.LANCHOR76]
+	ldrb	w1, [x19, #:lo12:.LANCHOR79]
+	ldrh	w0, [x20, #:lo12:.LANCHOR85]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR164
+	adrp	x1, .LANCHOR161
 	ldp	x19, x20, [sp, 16]
-	str	x0, [x1, #:lo12:.LANCHOR164]
+	str	x0, [x1, #:lo12:.LANCHOR161]
 	adrp	x0, .LANCHOR98
-	adrp	x1, .LANCHOR87
+	adrp	x1, .LANCHOR86
 	ldp	x29, x30, [sp], 32
 	ldrh	w0, [x0, #:lo12:.LANCHOR98]
 	lsr	w0, w0, 2
-	strh	w0, [x1, #:lo12:.LANCHOR87]
+	strh	w0, [x1, #:lo12:.LANCHOR86]
 	ret
 	.size	gc_init, .-gc_init
 	.section	.text.ftl_free,"ax",@progbits
@@ -9988,18 +9801,18 @@ js_hash:
 	mov	w0, 42982
 	mov	x3, 0
 	movk	w0, 0x47c6, lsl 16
-.L1611:
+.L1565:
 	cmp	w1, w3
-	bhi	.L1612
+	bhi	.L1566
 	ret
-.L1612:
+.L1566:
 	lsr	w2, w0, 2
 	ldrb	w5, [x4, x3]
 	add	w2, w2, w0, lsl 5
 	add	x3, x3, 1
 	add	w2, w2, w5
 	eor	w0, w0, w2
-	b	.L1611
+	b	.L1565
 	.size	js_hash, .-js_hash
 	.section	.text.ftl_debug_info_fill,"ax",@progbits
 	.align	2
@@ -10009,11 +9822,11 @@ ftl_debug_info_fill:
 	adrp	x3, .LANCHOR131
 	ldrb	w3, [x3, #:lo12:.LANCHOR131]
 	cmp	w3, 8
-	bls	.L1617
+	bls	.L1571
 	and	w0, w0, 255
 	cmp	x2, 0
 	ccmp	w0, 2, 0, ne
-	bne	.L1615
+	bne	.L1569
 	stp	x29, x30, [sp, -16]!
 	mov	x6, x1
 	mov	w1, 21320
@@ -10027,9 +9840,9 @@ ftl_debug_info_fill:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1615:
+.L1569:
 	stp	wzr, wzr, [x1]
-.L1617:
+.L1571:
 	mov	w0, 0
 	ret
 	.size	ftl_debug_info_fill, .-ftl_debug_info_fill
@@ -10068,8 +9881,8 @@ ftl_get_density:
 	.global	ftl_get_capacity
 	.type	ftl_get_capacity, %function
 ftl_get_capacity:
-	adrp	x0, .LANCHOR68
-	ldr	w0, [x0, #:lo12:.LANCHOR68]
+	adrp	x0, .LANCHOR67
+	ldr	w0, [x0, #:lo12:.LANCHOR67]
 	ret
 	.size	ftl_get_capacity, .-ftl_get_capacity
 	.section	.text.rknand_print_hex,"ax",@progbits
@@ -10080,637 +9893,652 @@ rknand_print_hex:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LC102
+	adrp	x21, .LC99
 	stp	x23, x24, [sp, 48]
 	mov	x22, x1
 	stp	x25, x26, [sp, 64]
 	mov	w24, w2
 	stp	x27, x28, [sp, 80]
-	adrp	x25, .LC101
+	adrp	x25, .LC98
 	mov	x27, x0
 	uxtw	x26, w3
-	add	x25, x25, :lo12:.LC101
-	add	x21, x21, :lo12:.LC102
+	add	x25, x25, :lo12:.LC98
+	add	x21, x21, :lo12:.LC99
 	stp	x19, x20, [sp, 16]
 	mov	w23, 0
 	mov	x19, 0
 	mov	w20, 0
-	adrp	x28, .LC103
-.L1626:
+	adrp	x28, .LC100
+.L1580:
 	cmp	x26, x19
-	bne	.L1632
+	bne	.L1586
 	ldp	x19, x20, [sp, 16]
-	adrp	x1, .LC103
+	adrp	x1, .LC100
 	ldp	x21, x22, [sp, 32]
-	add	x1, x1, :lo12:.LC103
+	add	x1, x1, :lo12:.LC100
 	ldp	x23, x24, [sp, 48]
-	adrp	x0, .LC104
+	adrp	x0, .LC101
 	ldp	x25, x26, [sp, 64]
-	add	x0, x0, :lo12:.LC104
+	add	x0, x0, :lo12:.LC101
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	printf
-.L1632:
-	cbnz	w20, .L1627
+.L1586:
+	cbnz	w20, .L1581
 	mov	w3, w23
 	mov	x2, x22
 	mov	x1, x27
 	mov	x0, x25
 	bl	printf
-.L1627:
+.L1581:
 	cmp	w24, 4
-	bne	.L1628
+	bne	.L1582
 	ldr	w1, [x22, x19, lsl 2]
-.L1634:
+.L1588:
 	mov	x0, x21
 	add	w20, w20, 1
 	bl	printf
 	cmp	w20, 15
-	bls	.L1631
+	bls	.L1585
 	mov	w20, 0
-	add	x1, x28, :lo12:.LC103
-	adrp	x0, .LC104
-	add	x0, x0, :lo12:.LC104
+	add	x1, x28, :lo12:.LC100
+	adrp	x0, .LC101
+	add	x0, x0, :lo12:.LC101
 	bl	printf
-.L1631:
+.L1585:
 	add	x19, x19, 1
 	add	w23, w23, w24
-	b	.L1626
-.L1628:
+	b	.L1580
+.L1582:
 	cmp	w24, 2
-	bne	.L1630
+	bne	.L1584
 	ldrsh	w1, [x22, x19, lsl 1]
-	b	.L1634
-.L1630:
+	b	.L1588
+.L1584:
 	ldrb	w1, [x22, x19]
-	b	.L1634
+	b	.L1588
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.hynix_get_read_retry_default,"ax",@progbits
 	.align	2
 	.global	hynix_get_read_retry_default
 	.type	hynix_get_read_retry_default, %function
 hynix_get_read_retry_default:
-	stp	x29, x30, [sp, -96]!
-	mov	w10, w0
-	adrp	x0, .LANCHOR27
+	stp	x29, x30, [sp, -144]!
 	mov	w2, -83
-	add	x29, sp, 0
-	ldr	x8, [x0, #:lo12:.LANCHOR27]
-	mov	w0, -84
-	stp	x19, x20, [sp, 16]
 	mov	w1, -82
+	add	x29, sp, 0
+	stp	x25, x26, [sp, 64]
+	mov	w25, w0
+	adrp	x0, .LANCHOR6
 	stp	x21, x22, [sp, 32]
-	add	x6, x8, 128
 	stp	x23, x24, [sp, 48]
-	add	x13, x8, 112
-	stp	x25, x26, [sp, 64]
-	cmp	w10, 2
-	str	x27, [sp, 80]
-	strb	w0, [x8, 128]
+	cmp	w25, 2
+	ldr	x26, [x0, #:lo12:.LANCHOR6]
+	mov	w0, -84
+	stp	x19, x20, [sp, 16]
+	stp	x27, x28, [sp, 80]
+	add	x24, x26, 128
+	add	x21, x26, 112
+	strb	w0, [x26, 128]
 	mov	w0, -81
-	strb	w10, [x8, 112]
-	strb	w2, [x8, 129]
-	strb	w1, [x8, 130]
-	strb	w0, [x8, 131]
-	bne	.L1636
+	strb	w25, [x26, 112]
+	strb	w2, [x26, 129]
+	strb	w1, [x26, 130]
+	strb	w0, [x26, 131]
+	bne	.L1590
 	mov	w0, -89
-	strb	w0, [x13, 16]
-	adrp	x0, .LANCHOR165+17
+	strb	w0, [x21, 16]
+	adrp	x0, .LANCHOR162+17
 	mov	w1, -9
-	strb	w1, [x0, #:lo12:.LANCHOR165+17]
-.L1700:
-	mov	w24, 7
-	b	.L1743
-.L1636:
-	cmp	w10, 3
-	bne	.L1638
-	mov	x11, 0
-.L1639:
-	sub	w0, w11, #80
-	strb	w0, [x6, x11]
-	add	x11, x11, 1
-	cmp	x11, 8
-	bne	.L1639
-	mov	w24, w11
-.L1637:
-	sub	w0, w10, #1
+	strb	w1, [x0, #:lo12:.LANCHOR162+17]
+.L1654:
+	mov	w27, 7
+	b	.L1697
+.L1590:
+	cmp	w25, 3
+	bne	.L1592
+	mov	x5, 0
+.L1593:
+	sub	w0, w5, #80
+	strb	w0, [x24, x5]
+	add	x5, x5, 1
+	cmp	x5, 8
+	bne	.L1593
+	mov	w27, w5
+	mov	w28, w5
+.L1591:
+	sub	w0, w25, #1
 	cmp	w0, 1
-	bhi	.L1645
-	adrp	x7, .LANCHOR18
-	adrp	x8, .LANCHOR30
-	add	x7, x7, :lo12:.LANCHOR18
-	add	x8, x8, :lo12:.LANCHOR30
-	mov	w5, 0
-	mov	w10, 55
-.L1646:
-	ldrb	w0, [x7]
-	cmp	w0, w5
-	bhi	.L1652
-.L1653:
-	strb	w11, [x13, 1]
-	strb	w24, [x13, 2]
+	bhi	.L1599
+	adrp	x25, .LANCHOR23
+	adrp	x26, .LANCHOR29
+	add	x25, x25, :lo12:.LANCHOR23
+	add	x26, x26, :lo12:.LANCHOR29
+	mov	w23, 0
+	mov	w5, 55
+.L1600:
+	ldrb	w0, [x25]
+	cmp	w0, w23
+	bhi	.L1606
+.L1607:
+	strb	w28, [x21, 1]
+	strb	w27, [x21, 2]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldr	x27, [sp, 80]
-	ldp	x29, x30, [sp], 96
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 144
 	ret
-.L1638:
-	cmp	w10, 4
-	bne	.L1640
-	mov	w3, -52
-	strb	w3, [x8, 128]
-	mov	w3, -65
-	strb	w3, [x8, 129]
-	mov	w3, -86
-	strb	w3, [x8, 130]
-	mov	w3, -85
-	mov	w24, 8
-	strb	w3, [x8, 131]
-	mov	w11, w24
-	mov	w3, -51
-	strb	w2, [x8, 133]
-	strb	w3, [x8, 132]
-	strb	w1, [x8, 134]
-	strb	w0, [x8, 135]
-	b	.L1637
-.L1640:
-	cmp	w10, 5
-	bne	.L1641
+.L1592:
+	cmp	w25, 4
+	bne	.L1594
+	mov	w5, -52
+	strb	w5, [x26, 128]
+	mov	w5, -65
+	strb	w5, [x26, 129]
+	mov	w5, -86
+	strb	w5, [x26, 130]
+	mov	w5, -85
+	mov	w27, 8
+	strb	w5, [x26, 131]
+	mov	w28, w27
+	mov	w5, -51
+	strb	w2, [x26, 133]
+	strb	w5, [x26, 132]
+	strb	w1, [x26, 134]
+	strb	w0, [x26, 135]
+	b	.L1591
+.L1594:
+	cmp	w25, 5
+	bne	.L1595
 	mov	w0, 56
-	strb	w0, [x8, 128]
+	strb	w0, [x26, 128]
 	mov	w0, 57
-	strb	w0, [x8, 129]
+	strb	w0, [x26, 129]
 	mov	w0, 58
-	mov	w24, 8
-	strb	w0, [x8, 130]
+	mov	w27, 8
+	strb	w0, [x26, 130]
 	mov	w0, 59
-	strb	w0, [x8, 131]
-.L1743:
-	mov	w11, 4
-	b	.L1637
-.L1641:
-	cmp	w10, 6
-	bne	.L1642
+	strb	w0, [x26, 131]
+.L1697:
+	mov	w28, 4
+	b	.L1591
+.L1595:
+	cmp	w25, 6
+	bne	.L1596
 	mov	w0, 14
-	strb	w0, [x8, 128]
+	strb	w0, [x26, 128]
 	mov	w0, 15
-	strb	w0, [x8, 129]
+	strb	w0, [x26, 129]
 	mov	w0, 16
-	mov	w24, 12
-	strb	w0, [x8, 130]
+	mov	w27, 12
+	strb	w0, [x26, 130]
 	mov	w0, 17
-	strb	w0, [x8, 131]
-	b	.L1743
-.L1642:
-	cmp	w10, 7
-	bne	.L1643
+	strb	w0, [x26, 131]
+	b	.L1697
+.L1596:
+	cmp	w25, 7
+	bne	.L1597
 	mov	x0, 0
-.L1644:
+.L1598:
 	sub	w1, w0, #80
-	strb	w1, [x6, x0]
+	strb	w1, [x24, x0]
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L1644
+	bne	.L1598
 	mov	w0, -44
-	mov	w24, 12
-	strb	w0, [x8, 136]
-	mov	w11, 10
+	mov	w27, 12
+	strb	w0, [x26, 136]
+	mov	w28, 10
 	mov	w0, -43
-	strb	w0, [x8, 137]
-	b	.L1637
-.L1643:
-	cmp	w10, 8
-	bne	.L1700
+	strb	w0, [x26, 137]
+	b	.L1591
+.L1597:
+	cmp	w25, 8
+	bne	.L1654
 	mov	w0, 6
-	strb	w0, [x8, 128]
+	strb	w0, [x26, 128]
 	mov	w0, 7
-	strb	w0, [x8, 129]
+	strb	w0, [x26, 129]
 	mov	w0, 9
-	strb	w10, [x8, 130]
-	strb	w0, [x8, 131]
-	mov	w24, 50
+	strb	w25, [x26, 130]
+	strb	w0, [x26, 131]
+	mov	w27, 50
 	mov	w0, 10
-	mov	w11, 5
-	strb	w0, [x8, 132]
-	b	.L1637
-.L1652:
-	ldrb	w0, [x8, w5, sxtw]
+	mov	w28, 5
+	strb	w0, [x26, 132]
+	b	.L1591
+.L1606:
+	ldrb	w0, [x26, w23, sxtw]
 	mov	x1, 32
-	mov	w2, 160
-	mov	x3, 0
-	umaddl	x2, w2, w0, x1
-	adrp	x1, .LANCHOR13
+	mov	w19, 160
+	mov	x20, 0
+	umaddl	x19, w19, w0, x1
+	adrp	x1, .LANCHOR7
 	ubfiz	x0, x0, 8, 8
-	ldr	x4, [x1, #:lo12:.LANCHOR13]
-	add	x2, x13, x2
-	add	x4, x4, x0
-.L1647:
-	str	w10, [x4, 2056]
-	ldrb	w0, [x6, x3]
-	str	w0, [x4, 2052]
-	mov	w0, 80
-	bl	timer_delay_ns
-	ldr	w0, [x4, 2048]
-	strb	w0, [x2, x3]
-	add	x3, x3, 1
-	cmp	w11, w3, uxtb
-	bhi	.L1647
-	adrp	x3, .LANCHOR165
-	add	x3, x3, :lo12:.LANCHOR165
+	ldr	x22, [x1, #:lo12:.LANCHOR7]
+	add	x19, x21, x19
+	add	x22, x22, x0
+.L1601:
+	str	w5, [x22, 2056]
+	str	w5, [x29, 136]
+	ldrb	w0, [x24, x20]
+	str	w0, [x22, 2052]
+	mov	x0, 1
+	bl	udelay
+	ldr	w0, [x22, 2048]
+	strb	w0, [x19, x20]
+	add	x20, x20, 1
+	cmp	w28, w20, uxtb
+	ldr	w5, [x29, 136]
+	bhi	.L1601
+	adrp	x2, .LANCHOR162
+	add	x2, x2, :lo12:.LANCHOR162
 	mov	x0, 0
-.L1650:
-	add	x14, x2, x0
-	add	x12, x3, x0
+.L1604:
+	add	x7, x19, x0
+	add	x4, x2, x0
 	mov	x1, 1
-.L1649:
-	lsl	x4, x1, 2
-	lsl	x15, x1, 3
-	ldrb	w16, [x2, x0]
+.L1603:
+	lsl	x3, x1, 2
+	lsl	x8, x1, 3
+	ldrb	w10, [x19, x0]
 	add	x1, x1, 1
 	cmp	x1, 7
-	ldrb	w4, [x12, x4]
-	add	w4, w4, w16
-	strb	w4, [x14, x15]
-	bne	.L1649
+	ldrb	w3, [x4, x3]
+	add	w3, w3, w10
+	strb	w3, [x7, x8]
+	bne	.L1603
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L1650
-	add	w5, w5, 1
-	strb	wzr, [x2, 16]
-	strb	wzr, [x2, 24]
-	and	w5, w5, 255
-	strb	wzr, [x2, 32]
-	strb	wzr, [x2, 40]
-	strb	wzr, [x2, 48]
-	strb	wzr, [x2, 41]
-	strb	wzr, [x2, 49]
-	b	.L1646
-.L1645:
-	sub	w0, w10, #3
+	bne	.L1604
+	add	w23, w23, 1
+	strb	wzr, [x19, 16]
+	strb	wzr, [x19, 24]
+	and	w23, w23, 255
+	strb	wzr, [x19, 32]
+	strb	wzr, [x19, 40]
+	strb	wzr, [x19, 48]
+	strb	wzr, [x19, 41]
+	strb	wzr, [x19, 49]
+	b	.L1600
+.L1599:
+	sub	w0, w25, #3
 	cmp	w0, 5
-	bhi	.L1653
-	mul	w19, w24, w11
-	sub	w14, w11, #1
-	and	x14, x14, 255
-	adrp	x20, .LANCHOR18
-	sub	w21, w10, #5
-	add	x20, x20, :lo12:.LANCHOR18
-	asr	w15, w19, 1
-	add	x14, x14, 1
-	lsl	w19, w19, 4
-	lsl	w23, w15, 1
-	sbfiz	x22, x15, 1, 32
-	mov	w12, 0
-.L1654:
-	ldrb	w0, [x20]
-	cmp	w0, w12
-	bls	.L1653
-	adrp	x0, .LANCHOR30
-	add	x0, x0, :lo12:.LANCHOR30
-	ldrb	w25, [x0, w12, sxtw]
-	mov	w0, w25
+	bhi	.L1607
+	mul	w24, w27, w28
+	sub	w22, w28, #1
+	and	x22, x22, 255
+	mov	w20, 0
+	asr	w23, w24, 1
+	lsl	w0, w24, 4
+	str	w0, [x29, 128]
+	lsl	w0, w23, 1
+	str	w0, [x29, 132]
+	sbfiz	x0, x23, 1, 32
+	sub	w24, w25, #5
+	str	x0, [x29, 136]
+	adrp	x0, .LANCHOR23
+	add	x0, x0, :lo12:.LANCHOR23
+	str	x0, [x29, 120]
+	add	x0, x22, 1
+	str	x0, [x29, 112]
+.L1608:
+	ldr	x0, [x29, 120]
+	ldrb	w0, [x0]
+	cmp	w0, w20
+	bls	.L1607
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
+	mov	w19, 160
+	ldrb	w22, [x0, w20, sxtw]
+	mov	w0, w22
 	bl	zftl_flash_exit_slc_mode
-	adrp	x0, .LANCHOR13
-	mov	x5, 32
-	mov	w1, 160
-	mov	w6, 255
-	ldr	x4, [x0, #:lo12:.LANCHOR13]
+	mov	x0, 32
+	ubfiz	x2, x22, 8, 8
+	mov	w1, 255
+	str	w1, [x29, 108]
 	nop // between mem op and mult-accumulate
-	umaddl	x1, w1, w25, x5
-	ubfiz	x25, x25, 8, 8
-	add	x4, x4, x25
-	add	x5, x13, x1
-	str	w6, [x4, 2056]
+	umaddl	x19, w19, w22, x0
+	adrp	x0, .LANCHOR7
+	ldr	x0, [x0, #:lo12:.LANCHOR7]
+	add	x19, x21, x19
+	add	x22, x0, x2
+	str	w1, [x22, 2056]
 	bl	nandc_wait_flash_ready
-	cmp	w10, 8
-	bne	.L1655
+	cmp	w25, 8
+	ldr	w1, [x29, 108]
+	bne	.L1609
 	mov	w0, 120
-	str	w0, [x4, 2056]
-	str	wzr, [x4, 2052]
+	str	w0, [x22, 2056]
+	str	wzr, [x22, 2052]
 	mov	w0, 23
-	str	wzr, [x4, 2052]
+	str	wzr, [x22, 2052]
 	mov	w1, 25
-	str	wzr, [x4, 2052]
-	add	x5, x8, 144
-	str	w0, [x4, 2056]
+	str	wzr, [x22, 2052]
+	add	x19, x26, 144
+	str	w0, [x22, 2056]
 	mov	w0, 4
-	str	w0, [x4, 2056]
-	str	w1, [x4, 2056]
+	str	w0, [x22, 2056]
+	str	w1, [x22, 2056]
 	mov	w1, 218
-	str	w1, [x4, 2056]
+	str	w1, [x22, 2056]
 	mov	w1, 21
-	str	wzr, [x4, 2056]
-	str	wzr, [x4, 2052]
-	str	wzr, [x4, 2052]
-	str	w1, [x4, 2052]
-.L1746:
-	str	w0, [x4, 2052]
+	str	wzr, [x22, 2056]
+	str	wzr, [x22, 2052]
+	str	wzr, [x22, 2052]
+	str	w1, [x22, 2052]
+.L1700:
+	str	w0, [x22, 2052]
 	mov	w0, 48
-	str	wzr, [x4, 2052]
-	str	w0, [x4, 2056]
+	str	wzr, [x22, 2052]
+	str	w0, [x22, 2056]
 	bl	nandc_wait_flash_ready
-	cmp	w21, 1
-	ccmp	w10, 8, 4, hi
-	beq	.L1701
-	cmp	w10, 7
+	cmp	w24, 1
+	ccmp	w25, 8, 4, hi
+	beq	.L1655
+	cmp	w25, 7
 	mov	w0, 32
 	mov	w1, 2
 	csel	w1, w1, w0, ne
-.L1662:
-	adrp	x6, .LANCHOR166
-	mov	x2, 0
-	ldr	x0, [x6, #:lo12:.LANCHOR166]
-.L1663:
-	ldr	w3, [x4, 2048]
-	strb	w3, [x0, x2]
-	add	x2, x2, 1
-	cmp	w1, w2, uxtb
-	bhi	.L1663
-	cmp	w10, 8
-	bne	.L1664
+.L1616:
+	adrp	x8, .LANCHOR163
+	mov	x7, 0
+	ldr	x0, [x8, #:lo12:.LANCHOR163]
+.L1617:
+	ldr	w10, [x22, 2048]
+	strb	w10, [x0, x7]
+	add	x7, x7, 1
+	cmp	w1, w7, uxtb
+	bhi	.L1617
+	cmp	w25, 8
+	bne	.L1618
 	mov	w1, 0
-.L1666:
-	ldrb	w2, [x0]
-	cmp	w2, 50
-	beq	.L1665
-	ldrb	w2, [x0, 1]
-	cmp	w2, 5
-	beq	.L1665
+.L1620:
+	ldrb	w7, [x0]
+	cmp	w7, 50
+	beq	.L1619
+	ldrb	w7, [x0, 1]
+	cmp	w7, 5
+	beq	.L1619
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 255
 	cmp	w1, 8
-	bne	.L1666
-.L1667:
-	adrp	x0, .LC105
+	bne	.L1620
+.L1621:
+	adrp	x0, .LC102
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC105
+	add	x0, x0, :lo12:.LC102
 	bl	printf
-.L1669:
-	b	.L1669
-.L1655:
+.L1623:
+	b	.L1623
+.L1609:
 	mov	w0, 54
-	str	w0, [x4, 2056]
-	cmp	w10, 4
-	bne	.L1657
+	str	w0, [x22, 2056]
+	cmp	w25, 4
+	bne	.L1611
 	mov	w0, 64
-	str	w6, [x4, 2052]
-	str	w0, [x4, 2048]
+	str	w1, [x22, 2052]
+	str	w0, [x22, 2048]
 	mov	w0, 204
-.L1744:
-	str	w0, [x4, 2052]
+.L1698:
+	str	w0, [x22, 2052]
 	mov	w0, 77
-	b	.L1745
-.L1657:
-	cmp	w21, 1
-	bhi	.L1659
-	ldrb	w0, [x8, 128]
-	str	w0, [x4, 2052]
+	b	.L1699
+.L1611:
+	cmp	w24, 1
+	bhi	.L1613
+	ldrb	w0, [x26, 128]
+	str	w0, [x22, 2052]
 	mov	w0, 82
-.L1745:
-	str	w0, [x4, 2048]
-.L1658:
+.L1699:
+	str	w0, [x22, 2048]
+.L1612:
 	mov	w0, 22
-	str	w0, [x4, 2056]
+	str	w0, [x22, 2056]
 	mov	w0, 23
-	str	w0, [x4, 2056]
+	str	w0, [x22, 2056]
 	mov	w0, 4
-	str	w0, [x4, 2056]
+	str	w0, [x22, 2056]
 	mov	w0, 25
-	str	w0, [x4, 2056]
-	str	wzr, [x4, 2056]
-	cmp	w10, 6
-	str	wzr, [x4, 2052]
-	str	wzr, [x4, 2052]
-	bne	.L1660
+	str	w0, [x22, 2056]
+	str	wzr, [x22, 2056]
+	cmp	w25, 6
+	str	wzr, [x22, 2052]
+	str	wzr, [x22, 2052]
+	bne	.L1614
 	mov	w0, 31
-	str	w0, [x4, 2052]
-.L1661:
+	str	w0, [x22, 2052]
+.L1615:
 	mov	w0, 2
-	b	.L1746
-.L1659:
-	cmp	w10, 7
-	bne	.L1658
+	b	.L1700
+.L1613:
+	cmp	w25, 7
+	bne	.L1612
 	mov	w0, 174
-	str	w0, [x4, 2052]
-	str	wzr, [x4, 2048]
+	str	w0, [x22, 2052]
+	str	wzr, [x22, 2048]
 	mov	w0, 176
-	b	.L1744
-.L1660:
-	str	wzr, [x4, 2052]
-	b	.L1661
-.L1701:
+	b	.L1698
+.L1614:
+	str	wzr, [x22, 2052]
+	b	.L1615
+.L1655:
 	mov	w1, 16
-	b	.L1662
-.L1665:
+	b	.L1616
+.L1619:
 	cmp	w1, 6
-	bhi	.L1667
-.L1668:
-	ldr	x3, [x6, #:lo12:.LANCHOR166]
+	bhi	.L1621
+.L1622:
+	ldr	x7, [x8, #:lo12:.LANCHOR163]
 	mov	x0, 0
-.L1678:
-	cmp	w19, w0
-	bgt	.L1679
-	ldr	x1, [x6, #:lo12:.LANCHOR166]
-	mov	w6, 8
-	add	x2, x1, x22
-.L1681:
+.L1632:
+	ldr	w1, [x29, 128]
+	cmp	w1, w0
+	bgt	.L1633
+	ldr	x1, [x8, #:lo12:.LANCHOR163]
+	mov	w10, 8
+	ldr	x0, [x29, 136]
+	add	x8, x1, x0
+.L1635:
 	mov	x0, 0
-.L1680:
-	ldrh	w7, [x2, x0, lsl 1]
-	mvn	w7, w7
-	strh	w7, [x2, x0, lsl 1]
+.L1634:
+	ldrh	w11, [x8, x0, lsl 1]
+	mvn	w11, w11
+	strh	w11, [x8, x0, lsl 1]
 	add	x0, x0, 1
-	cmp	w15, w0
-	bgt	.L1680
-	add	x2, x2, x23, uxtw 1
-	subs	w6, w6, #1
-	bne	.L1681
-	mov	x6, x1
-	mov	w7, 0
-	mov	w26, 1
-.L1682:
+	cmp	w23, w0
+	bgt	.L1634
+	ldr	w0, [x29, 132]
+	subs	w10, w10, #1
+	add	x8, x8, x0, uxtw 1
+	bne	.L1635
+	mov	x10, x1
+	mov	w11, 0
+	mov	w16, 1
+.L1636:
 	mov	w0, 0
-	mov	w2, 0
-.L1686:
-	mov	x25, x6
-	lsl	w30, w26, w2
-	mov	w17, 16
-	mov	w16, 0
-.L1684:
-	ldrh	w27, [x25]
-	add	x25, x25, x22
-	bics	wzr, w30, w27
-	cinc	w16, w16, eq
-	subs	w17, w17, #1
-	bne	.L1684
-	cmp	w16, 8
-	bls	.L1685
-	orr	w0, w0, w30
+	mov	w8, 0
+.L1640:
+	mov	x14, x10
+	lsl	w15, w16, w8
+	mov	w13, 16
+	mov	w12, 0
+.L1638:
+	ldrh	w17, [x14]
+	ldr	x2, [x29, 136]
+	bics	wzr, w15, w17
+	cinc	w12, w12, eq
+	add	x14, x14, x2
+	subs	w13, w13, #1
+	bne	.L1638
+	cmp	w12, 8
+	bls	.L1639
+	orr	w0, w0, w15
 	and	w0, w0, 65535
-.L1685:
-	add	w2, w2, 1
-	cmp	w2, 16
-	bne	.L1686
-	strh	w0, [x6], 2
-	add	w7, w7, 1
-	cmp	w15, w7
-	bgt	.L1682
+.L1639:
+	add	w8, w8, 1
+	cmp	w8, 16
+	bne	.L1640
+	strh	w0, [x10], 2
+	add	w11, w11, 1
+	cmp	w23, w11
+	bgt	.L1636
 	mov	x0, 0
-	mov	w2, 0
-.L1689:
-	ldr	w6, [x1, x0]
+	mov	w8, 0
+.L1643:
+	ldr	w10, [x1, x0]
 	add	x0, x0, 4
-	cmp	w6, 0
-	cinc	w2, w2, eq
+	cmp	w10, 0
+	cinc	w8, w8, eq
 	cmp	x0, 32
-	bne	.L1689
-	cmp	w2, 7
-	ble	.L1690
+	bne	.L1643
+	cmp	w8, 7
+	ble	.L1644
 	mov	w3, 1024
 	mov	w2, 1
-	adrp	x0, .LC106
-	add	x0, x0, :lo12:.LC106
+	adrp	x0, .LC103
+	add	x0, x0, :lo12:.LC103
 	bl	rknand_print_hex
-	adrp	x0, .LC105
+	adrp	x0, .LC102
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC105
+	add	x0, x0, :lo12:.LC102
 	bl	printf
-.L1691:
-	b	.L1691
-.L1664:
-	cmp	w10, 7
-	bne	.L1670
+.L1645:
+	b	.L1645
+.L1618:
+	cmp	w25, 7
+	bne	.L1624
 	mov	w1, 0
-.L1672:
-	ldrb	w2, [x0]
-	cmp	w2, 12
-	beq	.L1671
-	ldrb	w2, [x0, 1]
-	cmp	w2, 10
-	beq	.L1671
+.L1626:
+	ldrb	w7, [x0]
+	cmp	w7, 12
+	beq	.L1625
+	ldrb	w7, [x0, 1]
+	cmp	w7, 10
+	beq	.L1625
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 255
 	cmp	w1, 8
-	bne	.L1672
-.L1673:
-	adrp	x0, .LC105
+	bne	.L1626
+.L1627:
+	adrp	x0, .LC102
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC105
+	add	x0, x0, :lo12:.LC102
 	bl	printf
-.L1674:
-	b	.L1674
-.L1671:
+.L1628:
+	b	.L1628
+.L1625:
 	cmp	w1, 6
-	bls	.L1668
-	b	.L1673
-.L1670:
-	cmp	w10, 6
-	bne	.L1668
+	bls	.L1622
+	b	.L1627
+.L1624:
+	cmp	w25, 6
+	bne	.L1622
 	mov	x1, 0
-.L1675:
-	ldrb	w2, [x0, x1]
-	cmp	w2, 12
-	beq	.L1668
-	add	x2, x0, x1
-	ldrb	w2, [x2, 8]
-	cmp	w2, 4
-	beq	.L1668
+.L1629:
+	ldrb	w7, [x0, x1]
+	cmp	w7, 12
+	beq	.L1622
+	add	x7, x0, x1
+	ldrb	w7, [x7, 8]
+	cmp	w7, 4
+	beq	.L1622
 	add	x1, x1, 1
 	cmp	x1, 8
-	bne	.L1675
-	adrp	x0, .LC105
+	bne	.L1629
+	adrp	x0, .LC102
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC105
+	add	x0, x0, :lo12:.LC102
 	bl	printf
-.L1677:
-	b	.L1677
-.L1679:
-	ldr	w1, [x4, 2048]
-	strb	w1, [x3, x0]
+.L1631:
+	b	.L1631
+.L1633:
+	ldr	w1, [x22, 2048]
+	strb	w1, [x7, x0]
 	add	x0, x0, 1
-	b	.L1678
-.L1690:
-	cmp	w10, 6
-	beq	.L1703
-	cmp	w10, 7
-	beq	.L1704
-	cmp	w10, 8
+	b	.L1632
+.L1644:
+	cmp	w25, 6
+	beq	.L1657
+	cmp	w25, 7
+	beq	.L1658
+	cmp	w25, 8
 	mov	x1, 5
 	mov	x0, 8
 	csel	x0, x0, x1, ne
-.L1692:
-	mov	x1, x5
-	mov	w5, 0
-.L1693:
-	mov	x2, 0
-.L1694:
-	ldrb	w6, [x3, x2]
-	strb	w6, [x1, x2]
-	add	x2, x2, 1
-	cmp	w11, w2, uxtb
-	bhi	.L1694
-	add	w5, w5, 1
-	add	x3, x3, x14
-	add	x1, x1, x0
-	cmp	w24, w5
-	bgt	.L1693
-	mov	w5, 255
-	str	w5, [x4, 2056]
+.L1646:
+	mov	w8, 0
+.L1647:
+	mov	x1, 0
+.L1648:
+	ldrb	w10, [x7, x1]
+	strb	w10, [x19, x1]
+	add	x1, x1, 1
+	cmp	w28, w1, uxtb
+	bhi	.L1648
+	ldr	x1, [x29, 112]
+	add	w8, w8, 1
+	add	x19, x19, x0
+	cmp	w27, w8
+	add	x7, x7, x1
+	bgt	.L1647
+	mov	w19, 255
+	str	w19, [x22, 2056]
 	bl	nandc_wait_flash_ready
-	cmp	w21, 1
-	bhi	.L1696
+	cmp	w24, 1
+	bhi	.L1650
 	mov	w0, 54
-	str	w0, [x4, 2056]
-	ldrb	w0, [x8, 128]
-	str	w0, [x4, 2052]
-	str	wzr, [x4, 2048]
+	str	w0, [x22, 2056]
+	ldrb	w0, [x26, 128]
+	str	w0, [x22, 2052]
+	str	wzr, [x22, 2048]
 	mov	w0, 22
-	str	w0, [x4, 2056]
+	str	w0, [x22, 2056]
 	mov	w0, 48
-	str	wzr, [x4, 2056]
-	str	wzr, [x4, 2052]
-	str	wzr, [x4, 2052]
-	str	w5, [x4, 2052]
-	str	w5, [x4, 2052]
-	str	w5, [x4, 2052]
-.L1747:
-	str	w0, [x4, 2056]
+	str	wzr, [x22, 2056]
+	str	wzr, [x22, 2052]
+	str	wzr, [x22, 2052]
+	str	w19, [x22, 2052]
+	str	w19, [x22, 2052]
+	str	w19, [x22, 2052]
+.L1701:
+	str	w0, [x22, 2056]
+	add	w20, w20, 1
+	and	w20, w20, 255
 	bl	nandc_wait_flash_ready
-	add	w12, w12, 1
-	and	w12, w12, 255
-	b	.L1654
-.L1703:
+	b	.L1608
+.L1657:
 	mov	x0, 4
-	b	.L1692
-.L1704:
+	b	.L1646
+.L1658:
 	mov	x0, 10
-	b	.L1692
-.L1696:
-	cmp	w10, 8
-	bne	.L1698
+	b	.L1646
+.L1650:
+	cmp	w25, 8
+	bne	.L1652
 	mov	w0, 190
-	b	.L1747
-.L1698:
+	b	.L1701
+.L1652:
 	mov	w0, 56
-	b	.L1747
+	b	.L1701
 	.size	hynix_get_read_retry_default, .-hynix_get_read_retry_default
 	.section	.text.flash_get_read_retry_tbl,"ax",@progbits
 	.align	2
 	.global	flash_get_read_retry_tbl
 	.type	flash_get_read_retry_tbl, %function
 flash_get_read_retry_tbl:
-	adrp	x0, .LANCHOR33+19
-	ldrb	w0, [x0, #:lo12:.LANCHOR33+19]
+	adrp	x0, .LANCHOR32+19
+	ldrb	w0, [x0, #:lo12:.LANCHOR32+19]
 	sub	w1, w0, #1
 	and	w1, w1, 255
 	cmp	w1, 7
-	bhi	.L1748
+	bhi	.L1702
 	b	hynix_get_read_retry_default
-.L1748:
+.L1702:
 	ret
 	.size	flash_get_read_retry_tbl, .-flash_get_read_retry_tbl
 	.section	.text.nandc_xfer_done,"ax",@progbits
@@ -10719,154 +10547,154 @@ flash_get_read_retry_tbl:
 	.type	nandc_xfer_done, %function
 nandc_xfer_done:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR167
-	adrp	x1, .LANCHOR28
+	adrp	x0, .LANCHOR164
+	adrp	x1, .LANCHOR27
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR13
-	ldrb	w1, [x1, #:lo12:.LANCHOR28]
+	adrp	x19, .LANCHOR7
+	ldrb	w1, [x1, #:lo12:.LANCHOR27]
 	stp	x21, x22, [sp, 32]
-	strb	wzr, [x0, #:lo12:.LANCHOR167]
+	strb	wzr, [x0, #:lo12:.LANCHOR164]
 	cmp	w1, 9
 	str	x23, [sp, 48]
-	bne	.L1751
-	ldr	x20, [x19, #:lo12:.LANCHOR13]
+	bne	.L1705
+	ldr	x20, [x19, #:lo12:.LANCHOR7]
 	mov	x21, x0
 	ldr	w0, [x20, 16]
 	str	w0, [x29, 64]
 	ldr	w0, [x20, 48]
-	tbnz	x0, 1, .L1752
-	adrp	x22, .LC109
-	adrp	x23, .LC110
-	add	x22, x22, :lo12:.LC109
-	add	x23, x23, :lo12:.LC110
+	tbnz	x0, 1, .L1706
+	adrp	x22, .LC106
+	adrp	x23, .LC107
+	add	x22, x22, :lo12:.LC106
+	add	x23, x23, :lo12:.LC107
 	mov	w21, 0
-.L1753:
+.L1707:
 	ldr	w0, [x29, 64]
-	tbnz	x0, 20, .L1755
-	ldr	x0, [x19, #:lo12:.LANCHOR13]
+	tbnz	x0, 20, .L1709
+	ldr	x0, [x19, #:lo12:.LANCHOR7]
 	add	w21, w21, 1
 	tst	x21, 16777215
 	ldr	w0, [x0, 16]
 	str	w0, [x29, 64]
-	bne	.L1753
+	bne	.L1707
 	ldr	w2, [x29, 64]
 	mov	w1, w21
 	ldr	w3, [x20, 64]
 	mov	x0, x22
 	ubfx	x3, x3, 16, 6
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR13]
+	ldr	x1, [x19, #:lo12:.LANCHOR7]
 	mov	w3, 64
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1753
-.L1754:
+	b	.L1707
+.L1708:
 	ldr	w0, [x29, 64]
 	add	w1, w1, 1
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0, lsl 12
-	bne	.L1756
+	bne	.L1710
 	ldr	w2, [x20, 64]
-	adrp	x0, .LC108
+	adrp	x0, .LC105
 	ldr	w3, [x29, 64]
-	add	x0, x0, :lo12:.LC108
+	add	x0, x0, :lo12:.LC105
 	ubfx	x2, x2, 16, 5
 	ubfx	x3, x3, 22, 6
 	bl	printf
 	ldr	w0, [x29, 72]
 	mov	w0, 1
-	strb	w0, [x21, #:lo12:.LANCHOR167]
-.L1755:
-	adrp	x0, .LANCHOR53+32
+	strb	w0, [x21, #:lo12:.LANCHOR164]
+.L1709:
+	adrp	x0, .LANCHOR52+32
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
-	str	wzr, [x0, #:lo12:.LANCHOR53+32]
+	str	wzr, [x0, #:lo12:.LANCHOR52+32]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1752:
+.L1706:
 	mov	w1, 0
-.L1756:
+.L1710:
 	ldr	w2, [x20, 64]
 	ldr	w0, [x29, 64]
 	ubfx	x2, x2, 16, 6
 	ubfx	x0, x0, 22, 6
 	cmp	w2, w0
-	bge	.L1755
+	bge	.L1709
 	ldr	w0, [x20]
 	str	w0, [x29, 72]
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1754
+	tbz	x0, 13, .L1708
 	ldr	w0, [x29, 72]
-	tbz	x0, 17, .L1754
+	tbz	x0, 17, .L1708
 	ldr	w1, [x29, 72]
-	adrp	x0, .LC107
-	add	x0, x0, :lo12:.LC107
+	adrp	x0, .LC104
+	add	x0, x0, :lo12:.LC104
 	ubfx	x1, x1, 17, 1
-.L1785:
+.L1739:
 	bl	printf
-	b	.L1755
-.L1751:
-	ldr	x20, [x19, #:lo12:.LANCHOR13]
+	b	.L1709
+.L1705:
+	ldr	x20, [x19, #:lo12:.LANCHOR7]
 	mov	w21, 0
 	ldr	w0, [x20, 8]
 	str	w0, [x29, 64]
 	ldr	w0, [x20, 16]
-	tbnz	x0, 1, .L1761
-	adrp	x22, .LC109
-	adrp	x23, .LC110
-	add	x22, x22, :lo12:.LC109
-	add	x23, x23, :lo12:.LC110
-.L1762:
+	tbnz	x0, 1, .L1715
+	adrp	x22, .LC106
+	adrp	x23, .LC107
+	add	x22, x22, :lo12:.LC106
+	add	x23, x23, :lo12:.LC107
+.L1716:
 	ldr	w0, [x29, 64]
-	tbnz	x0, 20, .L1755
-	ldr	x0, [x19, #:lo12:.LANCHOR13]
+	tbnz	x0, 20, .L1709
+	ldr	x0, [x19, #:lo12:.LANCHOR7]
 	add	w21, w21, 1
 	tst	x21, 16777215
 	ldr	w0, [x0, 8]
 	str	w0, [x29, 64]
-	bne	.L1762
+	bne	.L1716
 	ldr	w2, [x29, 64]
 	mov	w1, w21
 	ldr	w3, [x20, 28]
 	mov	x0, x22
 	ubfx	x3, x3, 16, 5
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR13]
+	ldr	x1, [x19, #:lo12:.LANCHOR7]
 	mov	w3, 64
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1762
-.L1761:
-	adrp	x22, .LC108
-	adrp	x23, .LC110
-	add	x22, x22, :lo12:.LC108
-	add	x23, x23, :lo12:.LC110
-.L1763:
+	b	.L1716
+.L1715:
+	adrp	x22, .LC105
+	adrp	x23, .LC107
+	add	x22, x22, :lo12:.LC105
+	add	x23, x23, :lo12:.LC107
+.L1717:
 	ldr	w1, [x20, 28]
 	ldr	w0, [x29, 64]
 	ubfx	x1, x1, 16, 5
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0
-	bge	.L1755
-	ldr	x0, [x19, #:lo12:.LANCHOR13]
+	bge	.L1709
+	ldr	x0, [x19, #:lo12:.LANCHOR7]
 	ldr	w0, [x0]
 	str	w0, [x29, 72]
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1764
+	tbz	x0, 13, .L1718
 	ldr	w0, [x29, 72]
-	tbz	x0, 17, .L1764
-	adrp	x0, .LC111
+	tbz	x0, 17, .L1718
+	adrp	x0, .LC108
 	ldr	w1, [x29, 72]
-	add	x0, x0, :lo12:.LC111
-	b	.L1785
-.L1764:
+	add	x0, x0, :lo12:.LC108
+	b	.L1739
+.L1718:
 	add	w21, w21, 1
 	tst	x21, 16777215
-	bne	.L1763
+	bne	.L1717
 	ldr	w2, [x20, 28]
 	mov	w1, w21
 	ldr	w3, [x29, 64]
@@ -10874,12 +10702,12 @@ nandc_xfer_done:
 	ubfx	x2, x2, 16, 5
 	ubfx	x3, x3, 22, 6
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR13]
+	ldr	x1, [x19, #:lo12:.LANCHOR7]
 	mov	w3, 64
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1763
+	b	.L1717
 	.size	nandc_xfer_done, .-nandc_xfer_done
 	.section	.text.nandc_xfer,"ax",@progbits
 	.align	2
@@ -10901,20 +10729,20 @@ nandc_xfer:
 	bl	nandc_xfer_start
 	mov	w0, w22
 	bl	nandc_xfer_done
-	cbnz	w22, .L1805
-	adrp	x0, .LANCHOR28
-	ldrb	w0, [x0, #:lo12:.LANCHOR28]
+	cbnz	w22, .L1759
+	adrp	x0, .LANCHOR27
+	ldrb	w0, [x0, #:lo12:.LANCHOR27]
 	cmp	w0, 9
-	bne	.L1788
-	adrp	x22, .LANCHOR13
+	bne	.L1742
+	adrp	x22, .LANCHOR7
 	lsr	w19, w19, 2
 	mov	w3, 1
 	mov	w2, 0
-	ldr	x5, [x22, #:lo12:.LANCHOR13]
+	ldr	x5, [x22, #:lo12:.LANCHOR7]
 	mov	w0, 0
-.L1789:
+.L1743:
 	cmp	w2, w19
-	bcc	.L1793
+	bcc	.L1747
 	ldr	w19, [x5]
 	cmp	w3, 0
 	mov	w1, 512
@@ -10923,35 +10751,35 @@ nandc_xfer:
 	movk	w1, 0x2, lsl 16
 	and	w1, w19, w1
 	cmp	w1, 139264
-	bne	.L1795
+	bne	.L1749
 	mov	w1, w19
-	adrp	x0, .LC112
-	add	x0, x0, :lo12:.LC112
+	adrp	x0, .LC109
+	add	x0, x0, :lo12:.LC109
 	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR13]
+	ldr	x0, [x22, #:lo12:.LANCHOR7]
 	orr	w19, w19, 131072
 	str	w19, [x0]
 	mov	w0, -1
-.L1795:
-	tbz	x19, 13, .L1796
-	adrp	x1, .LANCHOR167
-	ldrb	w1, [x1, #:lo12:.LANCHOR167]
-	cbz	w1, .L1796
+.L1749:
+	tbz	x19, 13, .L1750
+	adrp	x1, .LANCHOR164
+	ldrb	w1, [x1, #:lo12:.LANCHOR164]
+	cbz	w1, .L1750
 	mov	w1, w19
-	adrp	x0, .LC113
-	add	x0, x0, :lo12:.LC113
+	adrp	x0, .LC110
+	add	x0, x0, :lo12:.LC110
 	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR13]
+	ldr	x0, [x22, #:lo12:.LANCHOR7]
 	mov	w1, 1
 	str	w1, [x0, 16]
-.L1824:
+.L1778:
 	mov	w0, -1
-.L1787:
+.L1741:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1793:
+.L1747:
 	uxtw	x1, w2
 	add	x1, x1, 84
 	ldr	w1, [x5, x1, lsl 2]
@@ -10962,70 +10790,70 @@ nandc_xfer:
 	and	w1, w4, w1, lsr 10
 	and	w3, w3, w1
 	ldr	w1, [x29, 56]
-	tbnz	x1, 2, .L1807
+	tbnz	x1, 2, .L1761
 	ldr	w1, [x29, 56]
-	tbnz	x1, 18, .L1807
+	tbnz	x1, 18, .L1761
 	ldr	w4, [x29, 56]
 	ldr	w1, [x29, 56]
 	ubfx	x4, x4, 3, 7
 	ubfx	x1, x1, 19, 7
 	cmp	w4, w1
 	ldr	w1, [x29, 56]
-	ble	.L1791
+	ble	.L1745
 	ubfx	x1, x1, 3, 7
-.L1792:
+.L1746:
 	cmp	w0, w1
 	csel	w0, w0, w1, cs
-.L1790:
+.L1744:
 	add	w2, w2, 1
-	b	.L1789
-.L1791:
+	b	.L1743
+.L1745:
 	ubfx	x1, x1, 19, 7
-	b	.L1792
-.L1807:
+	b	.L1746
+.L1761:
 	mov	w0, -1
-	b	.L1790
-.L1788:
-	adrp	x0, .LANCHOR50
+	b	.L1744
+.L1742:
+	adrp	x0, .LANCHOR49
 	lsr	w4, w19, 1
 	mov	w3, 64
 	mov	w1, 1
-	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	mov	w2, 0
-	adrp	x6, .LANCHOR53
+	adrp	x6, .LANCHOR52
 	cmp	w0, 25
 	mov	w0, 128
 	csel	w3, w3, w0, cc
 	mov	w0, 0
-.L1798:
+.L1752:
 	add	w5, w3, w0
 	cmp	w2, w4
-	bcc	.L1799
-	adrp	x22, .LANCHOR13
+	bcc	.L1753
+	adrp	x22, .LANCHOR7
 	lsr	w19, w19, 2
 	mov	w3, 0
 	mov	w0, 0
-	ldr	x4, [x22, #:lo12:.LANCHOR13]
-.L1800:
+	ldr	x4, [x22, #:lo12:.LANCHOR7]
+.L1754:
 	cmp	w3, w19
-	bcc	.L1804
+	bcc	.L1758
 	str	wzr, [x4, 16]
 	mov	w1, 8192
 	movk	w1, 0x2, lsl 16
 	ldr	w19, [x4]
 	and	w1, w19, w1
 	cmp	w1, 139264
-	bne	.L1796
+	bne	.L1750
 	mov	w1, w19
-	adrp	x0, .LC114
-	add	x0, x0, :lo12:.LC114
+	adrp	x0, .LC111
+	add	x0, x0, :lo12:.LC111
 	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR13]
+	ldr	x0, [x22, #:lo12:.LANCHOR7]
 	orr	w19, w19, 131072
 	str	w19, [x0]
-	b	.L1824
-.L1799:
-	ldr	x7, [x6, #:lo12:.LANCHOR53]
+	b	.L1778
+.L1753:
+	ldr	x7, [x6, #:lo12:.LANCHOR52]
 	and	x0, x0, 4294967292
 	ldr	w0, [x7, x0]
 	lsl	w7, w2, 2
@@ -11041,16 +10869,16 @@ nandc_xfer:
 	add	w1, w1, 4
 	strb	w0, [x21, x7]
 	mov	w0, w5
-	b	.L1798
-.L1804:
+	b	.L1752
+.L1758:
 	uxtw	x1, w3
 	add	x1, x1, 8
 	ldr	w1, [x4, x1, lsl 2]
 	str	w1, [x29, 56]
 	ldr	w1, [x29, 56]
-	tbnz	x1, 2, .L1810
+	tbnz	x1, 2, .L1764
 	ldr	w1, [x29, 56]
-	tbnz	x1, 15, .L1810
+	tbnz	x1, 15, .L1764
 	ldr	w2, [x29, 56]
 	ubfx	x6, x2, 3, 5
 	ldr	w2, [x29, 56]
@@ -11063,163 +10891,169 @@ nandc_xfer:
 	orr	w1, w5, w1, lsl 5
 	cmp	w2, w1
 	ldr	w1, [x29, 56]
-	bls	.L1802
+	bls	.L1756
 	ubfx	x2, x1, 3, 5
 	ldr	w1, [x29, 56]
 	ubfx	x1, x1, 27, 1
-.L1823:
+.L1777:
 	orr	w1, w2, w1, lsl 5
 	cmp	w0, w1
 	csel	w0, w0, w1, cs
-.L1801:
+.L1755:
 	add	w3, w3, 1
-	b	.L1800
-.L1802:
+	b	.L1754
+.L1756:
 	ubfx	x2, x1, 16, 5
 	ldr	w1, [x29, 56]
 	ubfx	x1, x1, 29, 1
-	b	.L1823
-.L1810:
+	b	.L1777
+.L1764:
 	mov	w0, -1
-	b	.L1801
-.L1796:
+	b	.L1755
+.L1750:
 	cmn	w0, #1
-	beq	.L1787
+	beq	.L1741
 	ldr	w1, [x21]
 	cmn	w1, #1
-	bne	.L1787
+	bne	.L1741
 	ldr	w1, [x21, 4]
 	cmn	w1, #1
-	bne	.L1787
+	bne	.L1741
 	ldr	w1, [x20]
 	cmn	w1, #1
 	mov	w1, 512
 	csel	w0, w0, w1, ne
-	b	.L1787
-.L1805:
+	b	.L1741
+.L1759:
 	mov	w0, 0
-	b	.L1787
+	b	.L1741
 	.size	nandc_xfer, .-nandc_xfer
 	.section	.text.flash_read_page,"ax",@progbits
 	.align	2
 	.global	flash_read_page
 	.type	flash_read_page, %function
 flash_read_page:
-	stp	x29, x30, [sp, -32]!
-	and	w10, w0, 255
-	adrp	x0, .LANCHOR13
-	mov	w8, 24
+	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
-	ldr	x14, [x0, #:lo12:.LANCHOR13]
-	adrp	x0, .LANCHOR32
-	mov	x12, x2
-	mov	x13, x3
-	ldrb	w0, [x0, #:lo12:.LANCHOR32]
-	mov	w11, w4
-	ubfx	x15, x1, 24, 2
-	str	x19, [sp, 16]
-	sub	w0, w8, w0
-	mov	w8, 1
-	adrp	x19, .LANCHOR16
-	lsl	w8, w8, w0
-	sub	w8, w8, #1
-	and	w8, w8, w1
+	stp	x21, x22, [sp, 32]
+	and	w21, w0, 255
+	adrp	x0, .LANCHOR7
+	stp	x19, x20, [sp, 16]
+	mov	w19, 24
+	stp	x23, x24, [sp, 48]
+	ldr	x20, [x0, #:lo12:.LANCHOR7]
+	adrp	x0, .LANCHOR31
+	stp	x25, x26, [sp, 64]
+	mov	x24, x2
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	mov	x25, x3
+	mov	w23, w4
+	ubfx	x22, x1, 24, 2
+	sub	w0, w19, w0
+	mov	w19, 1
+	adrp	x26, .LANCHOR21
+	lsl	w19, w19, w0
+	sub	w19, w19, #1
+	and	w19, w19, w1
 	bl	nandc_wait_flash_ready
-	mov	w0, w10
+	mov	w0, w21
 	bl	nandc_cs
-	cbnz	w15, .L1826
-	mov	w0, w10
+	cbnz	w22, .L1780
+	mov	w0, w21
 	bl	zftl_flash_enter_slc_mode
-.L1827:
-	ldr	x1, [x19, #:lo12:.LANCHOR16]
+.L1781:
+	ldr	x1, [x26, #:lo12:.LANCHOR21]
 	ldrb	w0, [x1, 7]
 	cmp	w0, 1
-	bne	.L1829
+	bne	.L1783
 	ldrb	w0, [x1, 12]
 	cmp	w0, 2
-	bne	.L1829
-	sxtw	x0, w10
+	bne	.L1783
+	sxtw	x0, w21
 	mov	w2, 38
 	add	x0, x0, 8
-	add	x0, x14, x0, lsl 8
+	add	x0, x20, x0, lsl 8
 	str	w2, [x0, 8]
-.L1829:
-	ubfiz	x4, x10, 8, 8
-	and	w0, w8, 255
-	add	x4, x14, x4
-	str	wzr, [x4, 2056]
-	str	wzr, [x4, 2052]
-	str	wzr, [x4, 2052]
-	str	w0, [x4, 2052]
-	lsr	w0, w8, 8
-	str	w0, [x4, 2052]
-	lsr	w0, w8, 16
-	str	w0, [x4, 2052]
-	adrp	x0, .LANCHOR31
-	ldrb	w0, [x0, #:lo12:.LANCHOR31]
-	cbz	w0, .L1830
-	lsr	w0, w8, 24
-	str	w0, [x4, 2052]
-.L1830:
+.L1783:
+	ubfiz	x0, x21, 8, 8
+	add	x20, x20, x0
+	and	w0, w19, 255
+	str	wzr, [x20, 2056]
+	str	wzr, [x20, 2052]
+	str	wzr, [x20, 2052]
+	str	w0, [x20, 2052]
+	lsr	w0, w19, 8
+	str	w0, [x20, 2052]
+	lsr	w0, w19, 16
+	str	w0, [x20, 2052]
+	adrp	x0, .LANCHOR30
+	ldrb	w0, [x0, #:lo12:.LANCHOR30]
+	cbz	w0, .L1784
+	lsr	w0, w19, 24
+	str	w0, [x20, 2052]
+.L1784:
 	mov	w0, 48
-	str	w0, [x4, 2056]
+	str	w0, [x20, 2056]
 	ldrb	w0, [x1, 12]
 	cmp	w0, 3
-	bne	.L1831
-	cbz	w15, .L1831
+	bne	.L1785
+	cbz	w22, .L1785
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbnz	w0, .L1785
 	adrp	x0, .LANCHOR36
 	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbnz	w0, .L1831
-	adrp	x0, .LANCHOR37
-	ldrb	w0, [x0, #:lo12:.LANCHOR37]
-	cbnz	w0, .L1831
-	add	w8, w8, w8, lsl 1
-	sub	w0, w8, #1
-	add	w0, w0, w15
-.L1840:
+	cbnz	w0, .L1785
+	add	w19, w19, w19, lsl 1
+	sub	w0, w19, #1
+	add	w0, w0, w22
+.L1794:
 	bl	nandc_set_seed
 	bl	nandc_wait_flash_ready
-	mov	w2, w11
 	mov	w0, 5
-	str	w0, [x4, 2056]
-	str	wzr, [x4, 2052]
+	str	w0, [x20, 2056]
+	str	wzr, [x20, 2052]
 	mov	w0, 224
-	str	wzr, [x4, 2052]
-	mov	x3, x12
-	str	w0, [x4, 2056]
+	str	wzr, [x20, 2052]
+	mov	w2, w23
+	str	w0, [x20, 2056]
+	mov	x4, x25
+	mov	x3, x24
 	mov	w1, 0
-	mov	x4, x13
-	mov	w0, w10
+	mov	w0, w21
 	bl	nandc_xfer
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.33
-	ldr	x19, [sp, 16]
+	bl	nandc_de_cs.constprop.32
 	mov	w0, w2
-	ldp	x29, x30, [sp], 32
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
 	ret
-.L1826:
-	ldr	x0, [x19, #:lo12:.LANCHOR16]
+.L1780:
+	ldr	x0, [x26, #:lo12:.LANCHOR21]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1828
+	bne	.L1782
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbnz	w0, .L1782
 	adrp	x0, .LANCHOR36
 	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbnz	w0, .L1828
-	adrp	x0, .LANCHOR37
-	ldrb	w0, [x0, #:lo12:.LANCHOR37]
-	cbnz	w0, .L1828
-	sxtw	x0, w10
+	cbnz	w0, .L1782
+	sxtw	x0, w21
 	add	x0, x0, 8
-	add	x0, x14, x0, lsl 8
-	str	w15, [x0, 8]
-	b	.L1827
-.L1828:
-	mov	w0, w10
+	add	x0, x20, x0, lsl 8
+	str	w22, [x0, 8]
+	b	.L1781
+.L1782:
+	mov	w0, w21
 	bl	zftl_flash_exit_slc_mode
-	b	.L1827
-.L1831:
-	mov	w0, w8
-	b	.L1840
+	b	.L1781
+.L1785:
+	mov	w0, w19
+	b	.L1794
 	.size	flash_read_page, .-flash_read_page
 	.section	.text.micron_read_retrial,"ax",@progbits
 	.align	2
@@ -11229,137 +11063,138 @@ micron_read_retrial:
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	and	w19, w0, 255
-	adrp	x0, .LANCHOR50
+	and	w20, w0, 255
+	adrp	x0, .LANCHOR49
+	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	str	w4, [x29, 116]
-	mov	x26, x3
-	str	x2, [x29, 120]
+	mov	w24, w1
 	stp	x21, x22, [sp, 32]
-	mov	w22, 0
-	stp	x23, x24, [sp, 48]
-	mov	w23, w1
-	ldrb	w20, [x0, #:lo12:.LANCHOR50]
+	mov	x25, x2
+	ldrb	w21, [x0, #:lo12:.LANCHOR49]
+	mov	x26, x3
 	stp	x27, x28, [sp, 80]
+	mov	w23, 0
+	str	w4, [x29, 124]
 	bl	nandc_wait_flash_ready
-	mov	w0, w19
+	adrp	x0, .LANCHOR7
+	add	w21, w21, w21, lsl 1
+	asr	w21, w21, 2
+	ldr	x19, [x0, #:lo12:.LANCHOR7]
+	adrp	x0, .LANCHOR166
+	add	x0, x0, :lo12:.LANCHOR166
+	str	x0, [x29, 112]
+	ubfiz	x0, x20, 8, 8
+	add	x19, x19, x0
+.L1796:
+	mov	w0, w20
 	bl	zftl_flash_enter_slc_mode
-	mov	w0, w19
+	mov	w0, w20
 	bl	zftl_flash_exit_slc_mode
-	adrp	x0, .LANCHOR13
-	add	w20, w20, w20, lsl 1
-	asr	w20, w20, 2
-	ldr	x6, [x0, #:lo12:.LANCHOR13]
-	adrp	x0, .LANCHOR169
-	add	x0, x0, :lo12:.LANCHOR169
-	str	x0, [x29, 104]
-	ubfiz	x0, x19, 8, 8
-	add	x25, x6, x0
-.L1842:
-	adrp	x24, .LANCHOR14
-	add	x24, x24, :lo12:.LANCHOR14
-	mov	w21, 0
+	adrp	x0, .LANCHOR19
+	mov	w22, 0
+	add	x0, x0, :lo12:.LANCHOR19
 	mov	w28, -1
-.L1843:
-	ldr	x0, [x29, 104]
+	str	x0, [x29, 104]
+.L1797:
+	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
-	cmp	w21, w0
-	bcc	.L1848
-.L1847:
+	cmp	w22, w0
+	bcc	.L1802
+.L1801:
 	mov	w0, 239
-	str	w0, [x25, 2056]
+	str	w0, [x19, 2056]
 	mov	w0, 137
-	str	w0, [x25, 2052]
-	mov	w0, 200
-	bl	timer_delay_ns
-	str	wzr, [x25, 2048]
-	str	wzr, [x25, 2048]
-	cmp	w28, w20
-	str	wzr, [x25, 2048]
-	str	wzr, [x25, 2048]
-	bcc	.L1849
+	str	w0, [x19, 2052]
+	mov	x0, 1
+	bl	udelay
+	str	wzr, [x19, 2048]
+	str	wzr, [x19, 2048]
+	cmp	w28, w21
+	str	wzr, [x19, 2048]
+	str	wzr, [x19, 2048]
+	bcc	.L1803
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L1849:
+.L1803:
 	cmn	w28, #1
-	cset	w24, eq
+	cset	w27, eq
 	cmp	w28, 256
 	cset	w0, eq
-	orr	w0, w24, w0
-	cbz	w0, .L1850
+	orr	w0, w27, w0
+	cbz	w0, .L1804
 	mov	w4, w28
-	mov	w3, w21
-	mov	w2, w23
-	mov	w1, w21
-	adrp	x0, .LC116
-	add	x0, x0, :lo12:.LC116
+	mov	w3, w22
+	mov	w2, w24
+	mov	w1, w20
+	adrp	x0, .LC113
+	add	x0, x0, :lo12:.LC113
 	bl	printf
-	eor	w0, w22, 1
-	tst	w24, w0
-	beq	.L1851
+	eor	w0, w23, 1
+	tst	w27, w0
+	beq	.L1805
 	mov	w1, 3
-	mov	w0, w19
-	mov	w22, 1
+	mov	w0, w20
+	mov	w23, 1
 	bl	mt_auto_read_calibration_config
-	b	.L1842
-.L1848:
+	b	.L1796
+.L1802:
 	mov	w0, 239
-	str	w0, [x25, 2056]
+	str	w0, [x19, 2056]
 	mov	w0, 137
-	str	w0, [x25, 2052]
-	add	w27, w21, 1
-	mov	w0, 200
-	bl	timer_delay_ns
-	str	w27, [x25, 2048]
-	str	wzr, [x25, 2048]
+	str	w0, [x19, 2052]
+	add	w27, w22, 1
+	mov	x0, 1
+	bl	udelay
+	str	w27, [x19, 2048]
+	str	wzr, [x19, 2048]
 	mov	x3, x26
-	ldr	w4, [x29, 116]
-	mov	w1, w23
-	ldr	x2, [x29, 120]
-	mov	w0, w19
-	str	wzr, [x25, 2048]
-	str	wzr, [x25, 2048]
+	ldr	w4, [x29, 124]
+	mov	x2, x25
+	str	wzr, [x19, 2048]
+	mov	w1, w24
+	str	wzr, [x19, 2048]
+	mov	w0, w20
 	bl	flash_read_page
-	mov	w7, w0
-	ldr	w0, [x24]
-	tbz	x0, 12, .L1844
-	mov	w4, w7
-	str	w7, [x29, 112]
+	mov	w6, w0
+	ldr	x0, [x29, 104]
+	ldr	w0, [x0]
+	tbz	x0, 12, .L1798
+	mov	w4, w6
+	str	w6, [x29, 120]
 	mov	w3, w28
-	mov	w2, w23
-	mov	w1, w21
-	adrp	x0, .LC115
-	add	x0, x0, :lo12:.LC115
+	mov	w2, w24
+	mov	w1, w22
+	adrp	x0, .LC112
+	add	x0, x0, :lo12:.LC112
 	bl	printf
-	ldr	w7, [x29, 112]
-.L1844:
-	cmn	w7, #1
-	beq	.L1845
-	adrp	x0, .LANCHOR166
+	ldr	w6, [x29, 120]
+.L1798:
+	cmn	w6, #1
+	beq	.L1799
+	adrp	x0, .LANCHOR163
 	cmn	w28, #1
-	csel	w28, w28, w7, ne
-	cmp	w7, w20
-	ldr	x0, [x0, #:lo12:.LANCHOR166]
-	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR168
-	ldr	x26, [x0, #:lo12:.LANCHOR168]
-	bcc	.L1854
-.L1845:
-	mov	w21, w27
-	b	.L1843
-.L1854:
-	mov	w28, w7
-	b	.L1847
-.L1851:
-	cbz	w22, .L1852
-	mov	w0, w19
+	csel	w28, w28, w6, ne
+	cmp	w6, w21
+	ldr	x25, [x0, #:lo12:.LANCHOR163]
+	adrp	x0, .LANCHOR165
+	ldr	x26, [x0, #:lo12:.LANCHOR165]
+	bcc	.L1808
+.L1799:
+	mov	w22, w27
+	b	.L1797
+.L1808:
+	mov	w28, w6
+	b	.L1801
+.L1805:
+	cbz	w23, .L1806
+	mov	w0, w20
 	mov	w1, 0
 	bl	mt_auto_read_calibration_config
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L1852:
+.L1806:
 	bl	nandc_wait_flash_ready
 	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
@@ -11369,13 +11204,13 @@ micron_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1850:
-	cbz	w22, .L1852
+.L1804:
+	cbz	w23, .L1806
 	mov	w1, 0
-	mov	w0, w19
+	mov	w0, w20
 	mov	w28, 256
 	bl	mt_auto_read_calibration_config
-	b	.L1852
+	b	.L1806
 	.size	micron_read_retrial, .-micron_read_retrial
 	.section	.text.toshiba_3d_read_retrial,"ax",@progbits
 	.align	2
@@ -11384,30 +11219,28 @@ micron_read_retrial:
 toshiba_3d_read_retrial:
 	stp	x29, x30, [sp, -144]!
 	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR16
 	stp	x23, x24, [sp, 48]
-	mov	w23, w1
+	mov	w24, w1
+	stp	x25, x26, [sp, 64]
+	and	w23, w0, 255
 	stp	x27, x28, [sp, 80]
-	mov	w28, w4
-	ubfx	x4, x23, 24, 2
+	mov	x26, x2
 	stp	x19, x20, [sp, 16]
-	stp	x21, x22, [sp, 32]
-	and	w24, w0, 255
-	stp	x25, x26, [sp, 64]
 	mov	x27, x3
-	mov	x26, x2
+	mov	w28, w4
 	bl	nandc_wait_flash_ready
-	adrp	x0, .LANCHOR13
-	adrp	x22, .LANCHOR24
+	adrp	x0, .LANCHOR7
 	mov	w1, 46
 	mov	w2, 56
-	ldr	x25, [x0, #:lo12:.LANCHOR13]
-	and	x0, x24, 255
+	ubfx	x19, x24, 24, 2
+	ldr	x25, [x0, #:lo12:.LANCHOR7]
+	and	x0, x23, 255
 	add	x21, x0, 8
 	str	x0, [x29, 128]
-	ldrb	w0, [x22, #:lo12:.LANCHOR24]
-	mov	w19, -1
+	ldrb	w0, [x22, #:lo12:.LANCHOR16]
 	add	x21, x25, x21, lsl 8
-	mov	w20, 1
 	cmp	w0, 36
 	mov	w0, 26
 	csel	w1, w2, w1, ne
@@ -11415,18 +11248,20 @@ toshiba_3d_read_retrial:
 	mov	w1, 10
 	csel	w0, w1, w0, ne
 	str	w0, [x29, 136]
-	add	x0, x22, :lo12:.LANCHOR24
-	cbnz	w4, .L1872
+	cbnz	w19, .L1826
+	add	x0, x22, :lo12:.LANCHOR16
 	str	x0, [x29, 120]
-	sxtw	x0, w24
+	sxtw	x0, w23
+	mov	w19, -1
 	add	x0, x0, 8
+	mov	w20, 1
 	add	x0, x25, x0, lsl 8
 	str	x0, [x29, 112]
-.L1879:
+.L1833:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, 36
-	bne	.L1873
+	bne	.L1827
 	mov	w1, w20
 	mov	x0, x21
 	mov	w2, 0
@@ -11434,70 +11269,70 @@ toshiba_3d_read_retrial:
 	ldr	x1, [x29, 112]
 	mov	w0, 93
 	str	w0, [x1, 8]
-.L1874:
+.L1828:
 	mov	w4, w28
 	mov	x3, x27
 	mov	x2, x26
-	mov	w1, w23
-	mov	w0, w24
+	mov	w1, w24
+	mov	w0, w23
 	bl	flash_read_page
 	mov	w4, w0
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 4, .L1875
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 4, .L1829
 	mov	w3, w4
 	str	w4, [x29, 108]
-	mov	w2, w23
+	mov	w2, w24
 	mov	w1, w20
-	adrp	x0, .LC117
-	add	x0, x0, :lo12:.LC117
+	adrp	x0, .LC114
+	add	x0, x0, :lo12:.LC114
 	bl	printf
 	ldr	w4, [x29, 108]
-.L1875:
+.L1829:
 	cmn	w4, #1
-	beq	.L1876
-	adrp	x0, .LANCHOR166
+	beq	.L1830
+	adrp	x0, .LANCHOR163
 	cmn	w19, #1
 	csel	w19, w19, w4, ne
-	ldr	x26, [x0, #:lo12:.LANCHOR166]
-	adrp	x0, .LANCHOR168
-	ldr	x27, [x0, #:lo12:.LANCHOR168]
-	adrp	x0, .LANCHOR50
-	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	ldr	x26, [x0, #:lo12:.LANCHOR163]
+	adrp	x0, .LANCHOR165
+	ldr	x27, [x0, #:lo12:.LANCHOR165]
+	adrp	x0, .LANCHOR49
+	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1894
-.L1876:
+	bcc	.L1848
+.L1830:
 	ldr	w0, [x29, 136]
 	add	w20, w20, 1
 	cmp	w0, w20
-	bne	.L1879
-.L1878:
-	ldrb	w0, [x22, #:lo12:.LANCHOR24]
+	bne	.L1833
+.L1832:
+	ldrb	w0, [x22, #:lo12:.LANCHOR16]
 	cmp	w0, 36
-	bne	.L1880
+	bne	.L1834
 	mov	w2, 0
-.L1917:
+.L1871:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_tlc_set_rr_para
-	b	.L1881
-.L1873:
+	b	.L1835
+.L1827:
 	mov	w1, w20
 	mov	x0, x21
 	bl	toshiba_3d_set_slc_rr_para
-	b	.L1874
-.L1894:
+	b	.L1828
+.L1848:
 	mov	w19, w4
-	b	.L1878
-.L1880:
+	b	.L1832
+.L1834:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_3d_set_slc_rr_para
-.L1881:
-	ldrb	w0, [x22, #:lo12:.LANCHOR24]
+.L1835:
+	ldrb	w0, [x22, #:lo12:.LANCHOR16]
 	cmp	w0, 36
-	bne	.L1890
+	bne	.L1844
 	ldr	x0, [x29, 128]
 	add	x25, x25, x0, lsl 8
 	mov	w0, 85
@@ -11506,27 +11341,27 @@ toshiba_3d_read_retrial:
 	str	wzr, [x25, 2052]
 	str	wzr, [x25, 2048]
 	str	w0, [x25, 2056]
-.L1890:
-	adrp	x0, .LANCHOR50
-	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+.L1844:
+	adrp	x0, .LANCHOR49
+	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L1891
+	bcc	.L1845
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L1891:
+.L1845:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L1892
-	adrp	x0, .LC119
+	bne	.L1846
+	adrp	x0, .LC116
 	mov	w4, w19
 	mov	w3, w20
-	mov	w2, w23
-	mov	w1, w20
-	add	x0, x0, :lo12:.LC119
+	mov	w2, w24
+	mov	w1, w23
+	add	x0, x0, :lo12:.LC116
 	bl	printf
-.L1892:
+.L1846:
 	bl	nandc_wait_flash_ready
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
@@ -11536,82 +11371,85 @@ toshiba_3d_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1872:
+.L1826:
+	add	x0, x22, :lo12:.LANCHOR16
 	str	x0, [x29, 112]
-	sxtw	x0, w24
+	sxtw	x0, w23
+	mov	w19, -1
 	add	x0, x0, 8
+	mov	w20, 1
 	add	x0, x25, x0, lsl 8
 	str	x0, [x29, 136]
-.L1888:
+.L1842:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
 	cmp	w0, 36
-	bne	.L1882
+	bne	.L1836
 	mov	x0, x21
 	mov	w2, 1
 	mov	w1, w20
 	bl	toshiba_tlc_set_rr_para
 	mov	w0, 93
-.L1916:
+.L1870:
 	ldr	x1, [x29, 136]
 	mov	w4, w28
 	mov	x3, x27
 	mov	x2, x26
 	str	w0, [x1, 8]
-	mov	w1, w23
-	mov	w0, w24
+	mov	w1, w24
+	mov	w0, w23
 	bl	flash_read_page
 	mov	w4, w0
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 4, .L1884
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 4, .L1838
 	mov	w3, w4
 	str	w4, [x29, 108]
-	mov	w2, w23
+	mov	w2, w24
 	mov	w1, w20
-	adrp	x0, .LC118
-	add	x0, x0, :lo12:.LC118
+	adrp	x0, .LC115
+	add	x0, x0, :lo12:.LC115
 	bl	printf
 	ldr	w4, [x29, 108]
-.L1884:
+.L1838:
 	cmn	w4, #1
-	beq	.L1885
-	adrp	x0, .LANCHOR166
+	beq	.L1839
+	adrp	x0, .LANCHOR163
 	cmn	w19, #1
 	csel	w19, w19, w4, ne
-	ldr	x26, [x0, #:lo12:.LANCHOR166]
-	adrp	x0, .LANCHOR168
-	ldr	x27, [x0, #:lo12:.LANCHOR168]
-	adrp	x0, .LANCHOR50
-	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	ldr	x26, [x0, #:lo12:.LANCHOR163]
+	adrp	x0, .LANCHOR165
+	ldr	x27, [x0, #:lo12:.LANCHOR165]
+	adrp	x0, .LANCHOR49
+	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1895
-.L1885:
+	bcc	.L1849
+.L1839:
 	ldr	w0, [x29, 120]
 	add	w20, w20, 1
 	cmp	w0, w20
-	bne	.L1888
-.L1887:
-	ldrb	w0, [x22, #:lo12:.LANCHOR24]
+	bne	.L1842
+.L1841:
+	ldrb	w0, [x22, #:lo12:.LANCHOR16]
 	cmp	w0, 36
-	bne	.L1889
+	bne	.L1843
 	mov	w2, 1
-	b	.L1917
-.L1882:
+	b	.L1871
+.L1836:
 	mov	x0, x21
 	mov	w1, w20
 	bl	toshiba_3d_set_tlc_rr_para
 	mov	w0, 38
-	b	.L1916
-.L1895:
+	b	.L1870
+.L1849:
 	mov	w19, w4
-	b	.L1887
-.L1889:
+	b	.L1841
+.L1843:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_3d_set_tlc_rr_para
-	b	.L1881
+	b	.L1835
 	.size	toshiba_3d_read_retrial, .-toshiba_3d_read_retrial
 	.section	.text.toshiba_read_retrial,"ax",@progbits
 	.align	2
@@ -11635,87 +11473,87 @@ toshiba_read_retrial:
 	bl	zftl_flash_enter_slc_mode
 	mov	w0, w19
 	bl	zftl_flash_exit_slc_mode
-	adrp	x0, .LANCHOR13
-	adrp	x1, .LANCHOR24
+	adrp	x0, .LANCHOR7
+	adrp	x1, .LANCHOR16
 	str	x1, [x29, 120]
-	ldr	x22, [x0, #:lo12:.LANCHOR13]
+	ldr	x22, [x0, #:lo12:.LANCHOR7]
 	and	x0, x19, 255
 	add	x21, x0, 8
 	str	x0, [x29, 104]
-	ldrb	w0, [x1, #:lo12:.LANCHOR24]
+	ldrb	w0, [x1, #:lo12:.LANCHOR16]
 	add	x21, x22, x21, lsl 8
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
-	bls	.L1936
-	adrp	x0, .LANCHOR21
-	ldrb	w0, [x0, #:lo12:.LANCHOR21]
-	cbz	w0, .L1937
+	bls	.L1890
+	adrp	x0, .LANCHOR26
+	ldrb	w0, [x0, #:lo12:.LANCHOR26]
+	cbz	w0, .L1891
 	mov	w23, 1
 	mov	w0, 1
 	bl	nandc_set_if_mode
-.L1920:
+.L1874:
 	and	x0, x19, 255
 	mov	w1, 92
 	add	x0, x22, x0, lsl 8
 	str	w1, [x0, 2056]
 	mov	w1, 197
 	str	w1, [x0, 2056]
-.L1919:
+.L1873:
 	sxtw	x0, w19
 	mov	w20, 1
 	add	x0, x0, 8
 	mov	w24, -1
 	add	x0, x22, x0, lsl 8
 	str	x0, [x29, 96]
-.L1921:
-	adrp	x0, .LANCHOR169
-	ldrb	w0, [x0, #:lo12:.LANCHOR169]
+.L1875:
+	adrp	x0, .LANCHOR166
+	ldrb	w0, [x0, #:lo12:.LANCHOR166]
 	add	w0, w0, 1
 	cmp	w20, w0
-	bcc	.L1930
+	bcc	.L1884
 	mov	w28, w24
-.L1929:
+.L1883:
 	ldr	x0, [x29, 120]
 	mov	w1, 0
-	ldrb	w0, [x0, #:lo12:.LANCHOR24]
+	ldrb	w0, [x0, #:lo12:.LANCHOR16]
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x21
-	bhi	.L1931
+	bhi	.L1885
 	bl	sandisk_set_rr_para
-.L1932:
+.L1886:
 	sxtw	x19, w19
 	mov	w0, 255
 	add	x19, x19, 8
 	add	x22, x22, x19, lsl 8
 	str	w0, [x22, 8]
-	adrp	x0, .LANCHOR50
-	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	adrp	x0, .LANCHOR49
+	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L1933
+	bcc	.L1887
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L1933:
+.L1887:
 	cmp	w28, 256
 	ccmn	w28, #1, 4, ne
-	bne	.L1934
-	adrp	x0, .LC119
+	bne	.L1888
+	adrp	x0, .LC116
 	mov	w4, w28
 	mov	w3, w20
 	mov	w2, w25
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC119
+	add	x0, x0, :lo12:.LC116
 	bl	printf
-.L1934:
+.L1888:
 	bl	nandc_wait_flash_ready
-	cbz	w23, .L1918
+	cbz	w23, .L1872
 	mov	w0, 4
 	bl	nandc_set_if_mode
-.L1918:
+.L1872:
 	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11724,36 +11562,36 @@ toshiba_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1937:
+.L1891:
 	mov	w23, 0
-	b	.L1920
-.L1936:
+	b	.L1874
+.L1890:
 	mov	w23, 0
-	b	.L1919
-.L1930:
+	b	.L1873
+.L1884:
 	ldr	x0, [x29, 120]
 	mov	w1, w20
-	ldrb	w0, [x0, #:lo12:.LANCHOR24]
+	ldrb	w0, [x0, #:lo12:.LANCHOR16]
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x21
-	bhi	.L1922
+	bhi	.L1876
 	bl	sandisk_set_rr_para
-.L1923:
+.L1877:
 	ldr	x0, [x29, 120]
-	ldrb	w0, [x0, #:lo12:.LANCHOR24]
+	ldrb	w0, [x0, #:lo12:.LANCHOR16]
 	cmp	w0, 34
-	bne	.L1924
-	adrp	x0, .LANCHOR169
-	ldrb	w0, [x0, #:lo12:.LANCHOR169]
+	bne	.L1878
+	adrp	x0, .LANCHOR166
+	ldrb	w0, [x0, #:lo12:.LANCHOR166]
 	sub	w0, w0, #3
 	cmp	w20, w0
-	bne	.L1924
+	bne	.L1878
 	ldr	x1, [x29, 96]
 	mov	w0, 179
 	str	w0, [x1, 8]
-.L1924:
+.L1878:
 	ldr	x0, [x29, 104]
 	mov	w1, 38
 	ldr	w4, [x29, 116]
@@ -11768,27 +11606,27 @@ toshiba_read_retrial:
 	bl	flash_read_page
 	mov	w28, w0
 	cmn	w0, #1
-	beq	.L1927
+	beq	.L1881
 	cmn	w24, #1
 	csel	w24, w24, w0, ne
-	adrp	x0, .LANCHOR166
-	ldr	x26, [x0, #:lo12:.LANCHOR166]
-	adrp	x0, .LANCHOR168
-	ldr	x27, [x0, #:lo12:.LANCHOR168]
-	adrp	x0, .LANCHOR50
-	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	adrp	x0, .LANCHOR163
+	ldr	x26, [x0, #:lo12:.LANCHOR163]
+	adrp	x0, .LANCHOR165
+	ldr	x27, [x0, #:lo12:.LANCHOR165]
+	adrp	x0, .LANCHOR49
+	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L1929
-.L1927:
+	bcc	.L1883
+.L1881:
 	add	w20, w20, 1
-	b	.L1921
-.L1922:
+	b	.L1875
+.L1876:
 	bl	toshiba_set_rr_para
-	b	.L1923
-.L1931:
+	b	.L1877
+.L1885:
 	bl	toshiba_set_rr_para
-	b	.L1932
+	b	.L1886
 	.size	toshiba_read_retrial, .-toshiba_read_retrial
 	.section	.text.ymtc_3d_read_retrial,"ax",@progbits
 	.align	2
@@ -11813,19 +11651,19 @@ ymtc_3d_read_retrial:
 	bl	zftl_flash_enter_slc_mode
 	mov	w0, w22
 	bl	zftl_flash_exit_slc_mode
-	adrp	x1, .LANCHOR13
+	adrp	x1, .LANCHOR7
 	ubfiz	x21, x22, 8, 8
 	add	x0, x21, 2048
-	adrp	x27, .LANCHOR50
-	ldr	x21, [x1, #:lo12:.LANCHOR13]
+	adrp	x27, .LANCHOR49
+	ldr	x21, [x1, #:lo12:.LANCHOR7]
 	mov	w20, 1
-	adrp	x28, .LANCHOR166
-	adrp	x5, .LANCHOR168
+	adrp	x28, .LANCHOR163
+	adrp	x5, .LANCHOR165
 	add	x21, x21, x0
-	add	x27, x27, :lo12:.LANCHOR50
+	add	x27, x27, :lo12:.LANCHOR49
 	tst	x23, 50331648
-	bne	.L1960
-.L1955:
+	bne	.L1914
+.L1909:
 	str	x5, [x29, 104]
 	mov	w1, w20
 	mov	x0, x21
@@ -11838,44 +11676,44 @@ ymtc_3d_read_retrial:
 	bl	flash_read_page
 	ldr	x5, [x29, 104]
 	cmn	w0, #1
-	beq	.L1952
+	beq	.L1906
 	ldrb	w1, [x27]
 	cmn	w19, #1
 	csel	w19, w19, w0, ne
-	ldr	x24, [x28, #:lo12:.LANCHOR166]
-	ldr	x25, [x5, #:lo12:.LANCHOR168]
+	ldr	x24, [x28, #:lo12:.LANCHOR163]
+	ldr	x25, [x5, #:lo12:.LANCHOR165]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L1963
-.L1952:
+	bcc	.L1917
+.L1906:
 	add	w20, w20, 1
 	cmp	w20, 10
-	bne	.L1955
-.L1954:
+	bne	.L1909
+.L1908:
 	mov	w1, 0
 	mov	x0, x21
 	bl	ymtc_3d_set_slc_rr_para
-.L1956:
-	adrp	x0, .LANCHOR50
-	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+.L1910:
+	adrp	x0, .LANCHOR49
+	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L1961
+	bcc	.L1915
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L1961:
+.L1915:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L1962
-	adrp	x0, .LC120
+	bne	.L1916
+	adrp	x0, .LC117
 	mov	w4, w19
 	mov	w3, w20
 	mov	w2, w23
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC120
+	add	x0, x0, :lo12:.LC117
 	bl	printf
-.L1962:
+.L1916:
 	bl	nandc_wait_flash_ready
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
@@ -11885,10 +11723,10 @@ ymtc_3d_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1963:
+.L1917:
 	mov	w19, w0
-	b	.L1954
-.L1960:
+	b	.L1908
+.L1914:
 	str	x5, [x29, 104]
 	mov	w1, w20
 	mov	x0, x21
@@ -11901,27 +11739,27 @@ ymtc_3d_read_retrial:
 	bl	flash_read_page
 	ldr	x5, [x29, 104]
 	cmn	w0, #1
-	beq	.L1957
+	beq	.L1911
 	ldrb	w1, [x27]
 	cmn	w19, #1
 	csel	w19, w19, w0, ne
-	ldr	x24, [x28, #:lo12:.LANCHOR166]
-	ldr	x25, [x5, #:lo12:.LANCHOR168]
+	ldr	x24, [x28, #:lo12:.LANCHOR163]
+	ldr	x25, [x5, #:lo12:.LANCHOR165]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L1964
-.L1957:
+	bcc	.L1918
+.L1911:
 	add	w20, w20, 1
 	cmp	w20, 51
-	bne	.L1960
-.L1959:
+	bne	.L1914
+.L1913:
 	mov	w1, 0
 	mov	x0, x21
 	bl	ymtc_3d_set_tlc_rr_para
-	b	.L1956
-.L1964:
+	b	.L1910
+.L1918:
 	mov	w19, w0
-	b	.L1959
+	b	.L1913
 	.size	ymtc_3d_read_retrial, .-ymtc_3d_read_retrial
 	.section	.text.samsung_read_retrial,"ax",@progbits
 	.align	2
@@ -11945,19 +11783,19 @@ samsung_read_retrial:
 	bl	zftl_flash_enter_slc_mode
 	mov	w0, w21
 	bl	zftl_flash_exit_slc_mode
-	adrp	x0, .LANCHOR13
+	adrp	x0, .LANCHOR7
 	tst	x20, 50331648
 	and	x5, x21, 255
-	ldr	x0, [x0, #:lo12:.LANCHOR13]
-	bne	.L1980
-	adrp	x24, .LANCHOR170
-	adrp	x27, .LC121
+	ldr	x0, [x0, #:lo12:.LANCHOR7]
+	bne	.L1934
+	adrp	x24, .LANCHOR167
+	adrp	x27, .LC118
 	add	x28, x0, x5, lsl 8
-	add	x24, x24, :lo12:.LANCHOR170
-	add	x27, x27, :lo12:.LC121
+	add	x24, x24, :lo12:.LANCHOR167
+	add	x27, x27, :lo12:.LC118
 	mov	x26, 0
 	mov	w25, -1
-.L1985:
+.L1939:
 	mov	w0, 239
 	str	w0, [x28, 2056]
 	mov	w0, 141
@@ -11977,9 +11815,9 @@ samsung_read_retrial:
 	mov	w0, w21
 	bl	flash_read_page
 	mov	w4, w0
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 4, .L1981
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 4, .L1935
 	mov	w3, w4
 	str	w4, [x29, 104]
 	mov	w2, w20
@@ -11987,26 +11825,26 @@ samsung_read_retrial:
 	mov	x0, x27
 	bl	printf
 	ldr	w4, [x29, 104]
-.L1981:
+.L1935:
 	cmn	w4, #1
-	beq	.L1982
-	adrp	x0, .LANCHOR166
+	beq	.L1936
+	adrp	x0, .LANCHOR163
 	cmn	w25, #1
 	csel	w25, w25, w4, ne
-	ldr	x22, [x0, #:lo12:.LANCHOR166]
-	adrp	x0, .LANCHOR168
-	ldr	x23, [x0, #:lo12:.LANCHOR168]
-	adrp	x0, .LANCHOR50
-	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	ldr	x22, [x0, #:lo12:.LANCHOR163]
+	adrp	x0, .LANCHOR165
+	ldr	x23, [x0, #:lo12:.LANCHOR165]
+	adrp	x0, .LANCHOR49
+	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1994
-.L1982:
+	bcc	.L1948
+.L1936:
 	add	x26, x26, 1
 	cmp	x26, 25
-	bne	.L1985
+	bne	.L1939
 	mov	w19, 26
-.L1984:
+.L1938:
 	mov	w0, 239
 	str	w0, [x28, 2056]
 	mov	w0, 141
@@ -12015,28 +11853,28 @@ samsung_read_retrial:
 	str	wzr, [x28, 2048]
 	str	wzr, [x28, 2048]
 	str	wzr, [x28, 2048]
-.L2016:
+.L1970:
 	bl	nandc_wait_flash_ready
-	adrp	x0, .LANCHOR50
-	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	adrp	x0, .LANCHOR49
+	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	add	w0, w0, w0, lsl 1
 	cmp	w25, w0, lsr 2
-	bcc	.L1992
+	bcc	.L1946
 	cmn	w25, #1
 	mov	w0, 256
 	csel	w25, w25, w0, eq
-.L1992:
+.L1946:
 	cmp	w25, 256
 	ccmn	w25, #1, 4, ne
-	bne	.L1993
-	adrp	x0, .LC123
+	bne	.L1947
+	adrp	x0, .LC120
 	mov	w4, w25
 	mov	w3, w19
 	mov	w2, w20
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC123
+	add	x0, x0, :lo12:.LC120
 	bl	printf
-.L1993:
+.L1947:
 	bl	nandc_wait_flash_ready
 	mov	w0, w25
 	ldp	x19, x20, [sp, 16]
@@ -12046,20 +11884,20 @@ samsung_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1994:
+.L1948:
 	mov	w25, w4
-	b	.L1984
-.L1980:
-	adrp	x7, .LANCHOR171
-	add	x7, x7, :lo12:.LANCHOR171
-	adrp	x24, .LC122
+	b	.L1938
+.L1934:
+	adrp	x7, .LANCHOR168
+	add	x7, x7, :lo12:.LANCHOR168
+	adrp	x24, .LC119
 	add	x28, x7, 4
 	add	x27, x0, x5, lsl 8
-	add	x24, x24, :lo12:.LC122
+	add	x24, x24, :lo12:.LC119
 	mov	w25, -1
 	mov	w19, 1
 	mov	w26, 137
-.L1991:
+.L1945:
 	mov	w0, 239
 	str	w0, [x27, 2056]
 	str	w26, [x27, 2052]
@@ -12079,9 +11917,9 @@ samsung_read_retrial:
 	mov	w0, w21
 	bl	flash_read_page
 	mov	w4, w0
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 4, .L1987
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 4, .L1941
 	mov	w3, w4
 	str	w4, [x29, 104]
 	mov	w2, w20
@@ -12089,26 +11927,26 @@ samsung_read_retrial:
 	mov	x0, x24
 	bl	printf
 	ldr	w4, [x29, 104]
-.L1987:
+.L1941:
 	cmn	w4, #1
-	beq	.L1988
-	adrp	x0, .LANCHOR166
+	beq	.L1942
+	adrp	x0, .LANCHOR163
 	cmn	w25, #1
 	csel	w25, w25, w4, ne
-	ldr	x22, [x0, #:lo12:.LANCHOR166]
-	adrp	x0, .LANCHOR168
-	ldr	x23, [x0, #:lo12:.LANCHOR168]
-	adrp	x0, .LANCHOR50
-	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	ldr	x22, [x0, #:lo12:.LANCHOR163]
+	adrp	x0, .LANCHOR165
+	ldr	x23, [x0, #:lo12:.LANCHOR165]
+	adrp	x0, .LANCHOR49
+	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1995
-.L1988:
+	bcc	.L1949
+.L1942:
 	add	w19, w19, 1
 	add	x28, x28, 4
 	cmp	w19, 26
-	bne	.L1991
-.L1990:
+	bne	.L1945
+.L1944:
 	mov	w0, 239
 	str	w0, [x27, 2056]
 	mov	w0, 137
@@ -12117,10 +11955,10 @@ samsung_read_retrial:
 	str	wzr, [x27, 2048]
 	str	wzr, [x27, 2048]
 	str	wzr, [x27, 2048]
-	b	.L2016
-.L1995:
+	b	.L1970
+.L1949:
 	mov	w25, w4
-	b	.L1990
+	b	.L1944
 	.size	samsung_read_retrial, .-samsung_read_retrial
 	.section	.text.hynix_read_retrial,"ax",@progbits
 	.align	2
@@ -12131,11 +11969,11 @@ hynix_read_retrial:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	x23, x0, 255
-	adrp	x0, .LANCHOR27
+	adrp	x0, .LANCHOR6
 	stp	x27, x28, [sp, 80]
 	stp	x21, x22, [sp, 32]
 	mov	w27, w4
-	ldr	x28, [x0, #:lo12:.LANCHOR27]
+	ldr	x28, [x0, #:lo12:.LANCHOR6]
 	mov	w22, w1
 	stp	x25, x26, [sp, 64]
 	mov	x25, x2
@@ -12152,37 +11990,37 @@ hynix_read_retrial:
 	bl	zftl_flash_enter_slc_mode
 	mov	w0, w23
 	bl	zftl_flash_exit_slc_mode
-	adrp	x6, .LANCHOR50
-	add	x6, x6, :lo12:.LANCHOR50
+	adrp	x6, .LANCHOR49
+	add	x6, x6, :lo12:.LANCHOR49
 	mov	w5, 0
-	adrp	x7, .LANCHOR166
-	adrp	x8, .LANCHOR168
-.L2018:
+	adrp	x7, .LANCHOR163
+	adrp	x8, .LANCHOR165
+.L1972:
 	cmp	w5, w24
-	bcc	.L2023
-.L2022:
-	adrp	x0, .LANCHOR50
+	bcc	.L1977
+.L1976:
+	adrp	x0, .LANCHOR49
 	add	x23, x28, x23
-	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	strb	w20, [x23, 8]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L2024
+	bcc	.L1978
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L2024:
+.L1978:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L2025
-	adrp	x0, .LC124
+	bne	.L1979
+	adrp	x0, .LC121
 	mov	w4, w19
 	mov	w3, w5
 	mov	w2, w22
 	mov	w1, w5
-	add	x0, x0, :lo12:.LC124
+	add	x0, x0, :lo12:.LC121
 	bl	printf
-.L2025:
+.L1979:
 	bl	nandc_wait_flash_ready
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
@@ -12192,7 +12030,7 @@ hynix_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2023:
+.L1977:
 	add	w20, w20, 1
 	stp	x6, x8, [x29, 96]
 	and	w20, w20, 255
@@ -12213,21 +12051,21 @@ hynix_read_retrial:
 	cmn	w0, #1
 	ldp	x6, x8, [x29, 96]
 	ldr	x7, [x29, 112]
-	beq	.L2020
+	beq	.L1974
 	ldrb	w1, [x6]
 	cmn	w19, #1
 	csel	w19, w19, w0, ne
-	ldr	x25, [x7, #:lo12:.LANCHOR166]
-	ldr	x26, [x8, #:lo12:.LANCHOR168]
+	ldr	x25, [x7, #:lo12:.LANCHOR163]
+	ldr	x26, [x8, #:lo12:.LANCHOR165]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L2026
-.L2020:
+	bcc	.L1980
+.L1974:
 	add	w5, w5, 1
-	b	.L2018
-.L2026:
+	b	.L1972
+.L1980:
 	mov	w19, w0
-	b	.L2022
+	b	.L1976
 	.size	hynix_read_retrial, .-hynix_read_retrial
 	.section	.text.flash_ddr_tuning_read,"ax",@progbits
 	.align	2
@@ -12245,25 +12083,25 @@ flash_ddr_tuning_read:
 	stp	x25, x26, [sp, 64]
 	mov	x24, x3
 	stp	x27, x28, [sp, 80]
-	adrp	x25, .LANCHOR50
+	adrp	x25, .LANCHOR49
 	str	w4, [x29, 136]
 	bl	nandc_get_ddr_para
-	add	x25, x25, :lo12:.LANCHOR50
+	add	x25, x25, :lo12:.LANCHOR49
 	str	w0, [x29, 132]
-	adrp	x0, .LANCHOR14
-	add	x0, x0, :lo12:.LANCHOR14
+	adrp	x0, .LANCHOR19
+	add	x0, x0, :lo12:.LANCHOR19
 	mov	w28, 0
 	str	x0, [x29, 120]
 	mov	w26, 0
-	adrp	x0, .LC125
+	adrp	x0, .LC122
 	mov	w27, 0
-	add	x0, x0, :lo12:.LC125
+	add	x0, x0, :lo12:.LC122
 	mov	w19, 1024
 	mov	w21, -1
 	mov	w7, 6
 	str	wzr, [x29, 140]
 	str	x0, [x29, 112]
-.L2042:
+.L1996:
 	mov	w0, w7
 	str	w7, [x29, 128]
 	bl	nandc_set_ddr_para
@@ -12277,7 +12115,7 @@ flash_ddr_tuning_read:
 	ldr	x0, [x29, 120]
 	ldr	w7, [x29, 128]
 	ldr	w0, [x0]
-	tbz	x0, 4, .L2037
+	tbz	x0, 4, .L1991
 	ldr	x0, [x29, 112]
 	mov	w3, w4
 	mov	w1, w7
@@ -12287,50 +12125,50 @@ flash_ddr_tuning_read:
 	bl	printf
 	ldr	w4, [x29, 108]
 	ldr	w7, [x29, 128]
-.L2037:
+.L1991:
 	add	w0, w19, 1
 	cmp	w4, w0
-	bhi	.L2038
-	adrp	x0, .LANCHOR166
-	ldr	x23, [x0, #:lo12:.LANCHOR166]
-	adrp	x0, .LANCHOR168
-	ldr	x24, [x0, #:lo12:.LANCHOR168]
+	bhi	.L1992
+	adrp	x0, .LANCHOR163
+	ldr	x23, [x0, #:lo12:.LANCHOR163]
+	adrp	x0, .LANCHOR165
+	ldr	x24, [x0, #:lo12:.LANCHOR165]
 	ldrb	w0, [x25]
 	cmp	w4, w0, lsr 2
-	bcs	.L2048
+	bcs	.L2002
 	add	w27, w27, 1
 	cmp	w27, 7
-	bls	.L2048
+	bls	.L2002
 	sub	w28, w7, w27
 	mov	w19, w4
 	mov	w21, 0
-.L2040:
+.L1994:
 	ldr	w0, [x29, 140]
 	cmp	w27, w26
 	csel	w28, w28, w0, cs
-.L2041:
-	cbz	w28, .L2043
-	adrp	x0, .LANCHOR50
+.L1995:
+	cbz	w28, .L1997
+	adrp	x0, .LANCHOR49
 	mov	w1, 3
-	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	udiv	w0, w0, w1
 	cmp	w0, w19
-	bls	.L2043
+	bls	.L1997
 	mov	w1, w28
-	adrp	x0, .LC126
-	add	x0, x0, :lo12:.LC126
+	adrp	x0, .LC123
+	add	x0, x0, :lo12:.LC123
 	bl	printf
 	mov	w0, w28
-.L2062:
+.L2016:
 	bl	nandc_set_ddr_para
-	cbz	w21, .L2036
-	adrp	x25, .LANCHOR49
-	ldrb	w0, [x25, #:lo12:.LANCHOR49]
-	tbz	x0, 0, .L2036
+	cbz	w21, .L1990
+	adrp	x25, .LANCHOR48
+	ldrb	w0, [x25, #:lo12:.LANCHOR48]
+	tbz	x0, 0, .L1990
 	mov	w2, w22
 	mov	w1, w20
-	adrp	x0, .LC127
-	add	x0, x0, :lo12:.LC127
+	adrp	x0, .LC124
+	add	x0, x0, :lo12:.LC124
 	bl	printf
 	mov	w0, w20
 	bl	flash_reset
@@ -12338,8 +12176,8 @@ flash_ddr_tuning_read:
 	bl	flash_set_interface_mode
 	mov	w0, 1
 	bl	nandc_set_if_mode
-	adrp	x0, .LANCHOR34
-	add	x0, x0, :lo12:.LANCHOR34
+	adrp	x0, .LANCHOR33
+	add	x0, x0, :lo12:.LANCHOR33
 	mov	w1, 2
 	strb	w1, [x0, w20, sxtw]
 	mov	w0, w20
@@ -12354,22 +12192,22 @@ flash_ddr_tuning_read:
 	mov	w3, w0
 	mov	w2, w22
 	mov	w1, w20
-	adrp	x0, .LC128
-	add	x0, x0, :lo12:.LC128
+	adrp	x0, .LC125
+	add	x0, x0, :lo12:.LC125
 	bl	printf
-	adrp	x0, .LANCHOR50
-	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	adrp	x0, .LANCHOR49
+	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	cmp	w19, w0
-	bhi	.L2050
-	adrp	x1, .LANCHOR172
-	ldr	w0, [x1, #:lo12:.LANCHOR172]
+	bhi	.L2004
+	adrp	x1, .LANCHOR169
+	ldr	w0, [x1, #:lo12:.LANCHOR169]
 	add	w0, w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR172]
+	str	w0, [x1, #:lo12:.LANCHOR169]
 	cmp	w0, 100
-	bls	.L2046
-	adrp	x0, .LANCHOR21
-	strb	wzr, [x0, #:lo12:.LANCHOR21]
-.L2036:
+	bls	.L2000
+	adrp	x0, .LANCHOR26
+	strb	wzr, [x0, #:lo12:.LANCHOR26]
+.L1990:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -12378,37 +12216,37 @@ flash_ddr_tuning_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L2038:
+.L1992:
 	cmp	w27, w26
-	bls	.L2049
+	bls	.L2003
 	sub	w0, w28, w27
 	str	w0, [x29, 140]
 	cmp	w27, 7
-	bhi	.L2041
+	bhi	.L1995
 	mov	w26, w27
-.L2049:
+.L2003:
 	mov	w27, 0
-	b	.L2039
-.L2048:
+	b	.L1993
+.L2002:
 	mov	w28, w7
 	mov	w19, w4
 	mov	w21, 0
-.L2039:
+.L1993:
 	add	w7, w7, 2
 	cmp	w7, 50
-	bne	.L2042
-	b	.L2040
-.L2043:
+	bne	.L1996
+	b	.L1994
+.L1997:
 	ldrb	w0, [x29, 132]
-	b	.L2062
-.L2050:
+	b	.L2016
+.L2004:
 	mov	w19, w21
-.L2046:
-	ldrb	w0, [x25, #:lo12:.LANCHOR49]
+.L2000:
+	ldrb	w0, [x25, #:lo12:.LANCHOR48]
 	bl	flash_set_interface_mode
-	ldrb	w0, [x25, #:lo12:.LANCHOR49]
+	ldrb	w0, [x25, #:lo12:.LANCHOR48]
 	bl	nandc_set_if_mode
-	b	.L2036
+	b	.L1990
 	.size	flash_ddr_tuning_read, .-flash_ddr_tuning_read
 	.section	.text.flash_read_page_en,"ax",@progbits
 	.align	2
@@ -12419,70 +12257,70 @@ flash_read_page_en:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 255
-	adrp	x0, .LANCHOR18
+	adrp	x0, .LANCHOR23
 	stp	x23, x24, [sp, 48]
 	stp	x21, x22, [sp, 32]
 	mov	w19, w1
 	str	x25, [sp, 64]
 	mov	x22, x2
-	ldrb	w1, [x0, #:lo12:.LANCHOR18]
+	ldrb	w1, [x0, #:lo12:.LANCHOR23]
 	mov	x23, x3
 	mov	w24, w4
 	mov	x25, x0
 	cmp	w1, w20
-	bhi	.L2064
-	adrp	x1, .LANCHOR173
+	bhi	.L2018
+	adrp	x1, .LANCHOR170
 	adrp	x0, .LC0
-	mov	w2, 428
-	add	x1, x1, :lo12:.LANCHOR173
+	mov	w2, 431
+	add	x1, x1, :lo12:.LANCHOR170
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2064:
-	adrp	x0, .LANCHOR30
-	add	x0, x0, :lo12:.LANCHOR30
-	ldrb	w4, [x25, #:lo12:.LANCHOR18]
+.L2018:
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
+	ldrb	w4, [x25, #:lo12:.LANCHOR23]
 	ldrb	w21, [x0, w20, sxtw]
 	cmp	w20, w4
-	bcc	.L2065
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbnz	x0, 6, .L2066
-.L2090:
+	bcc	.L2019
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbnz	x0, 6, .L2020
+.L2044:
 	mov	w0, -1
-.L2063:
+.L2017:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2066:
+.L2020:
 	mov	w3, w19
 	mov	w2, w20
 	mov	w1, w21
-	adrp	x0, .LC129
-	add	x0, x0, :lo12:.LC129
+	adrp	x0, .LC126
+	add	x0, x0, :lo12:.LC126
 	bl	printf
-	b	.L2090
-.L2065:
+	b	.L2044
+.L2019:
 	tst	x19, 50331648
-	bne	.L2068
+	bne	.L2022
 	adrp	x0, .LANCHOR0
 	adrp	x1, .LANCHOR1
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L2069
+	cbz	w0, .L2023
 	ldrb	w0, [x1, #:lo12:.LANCHOR1]
-	cbz	w0, .L2068
-.L2069:
+	cbz	w0, .L2022
+.L2023:
 	adrp	x0, .LANCHOR2
 	ldrb	w1, [x1, #:lo12:.LANCHOR1]
 	ldrh	w2, [x0, #:lo12:.LANCHOR2]
 	udiv	w0, w19, w2
 	mul	w0, w0, w2
 	sub	w19, w19, w0
-	cbz	w1, .L2070
+	cbz	w1, .L2024
 	add	w19, w0, w19, lsl 1
-.L2068:
+.L2022:
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -12490,25 +12328,25 @@ flash_read_page_en:
 	mov	w0, w21
 	bl	flash_read_page
 	cmn	w0, #1
-	bne	.L2063
-	adrp	x20, .LANCHOR52
-	ldrb	w25, [x20, #:lo12:.LANCHOR52]
-	cbnz	w25, .L2071
-.L2074:
-	adrp	x0, .LANCHOR174
-	ldr	x5, [x0, #:lo12:.LANCHOR174]
-	cbnz	x5, .L2072
-.L2073:
-	ldrb	w4, [x20, #:lo12:.LANCHOR52]
+	bne	.L2017
+	adrp	x20, .LANCHOR51
+	ldrb	w25, [x20, #:lo12:.LANCHOR51]
+	cbnz	w25, .L2025
+.L2028:
+	adrp	x0, .LANCHOR171
+	ldr	x5, [x0, #:lo12:.LANCHOR171]
+	cbnz	x5, .L2026
+.L2027:
+	ldrb	w4, [x20, #:lo12:.LANCHOR51]
 	mov	w3, -1
 	mov	w2, w19
 	mov	w1, 0
-	adrp	x0, .LC130
-	add	x0, x0, :lo12:.LC130
+	adrp	x0, .LC127
+	add	x0, x0, :lo12:.LC127
 	bl	printf
-	adrp	x0, .LANCHOR21
-	ldrb	w0, [x0, #:lo12:.LANCHOR21]
-	cbz	w0, .L2090
+	adrp	x0, .LANCHOR26
+	ldrb	w0, [x0, #:lo12:.LANCHOR26]
+	cbz	w0, .L2044
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -12520,25 +12358,25 @@ flash_read_page_en:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	b	flash_ddr_tuning_read
-.L2070:
+.L2024:
 	adrp	x1, .LANCHOR3
 	add	x1, x1, :lo12:.LANCHOR3
 	ldrh	w19, [x1, w19, uxtw 1]
 	add	w19, w19, w0
-	b	.L2068
-.L2071:
-	strb	wzr, [x20, #:lo12:.LANCHOR52]
+	b	.L2022
+.L2025:
+	strb	wzr, [x20, #:lo12:.LANCHOR51]
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
 	mov	w1, w19
 	mov	w0, w21
 	bl	flash_read_page
-	strb	w25, [x20, #:lo12:.LANCHOR52]
+	strb	w25, [x20, #:lo12:.LANCHOR51]
 	cmn	w0, #1
-	beq	.L2074
-	b	.L2063
-.L2072:
+	beq	.L2028
+	b	.L2017
+.L2026:
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -12546,8 +12384,8 @@ flash_read_page_en:
 	mov	w0, w21
 	blr	x5
 	cmn	w0, #1
-	beq	.L2073
-	b	.L2063
+	beq	.L2027
+	b	.L2017
 	.size	flash_read_page_en, .-flash_read_page_en
 	.section	.text.flash_get_last_written_page,"ax",@progbits
 	.align	2
@@ -12558,15 +12396,15 @@ flash_get_last_written_page:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	w23, w0, 255
-	adrp	x0, .LANCHOR147
+	adrp	x0, .LANCHOR144
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
 	mov	x24, x2
-	ldrh	w19, [x0, #:lo12:.LANCHOR147]
-	adrp	x0, .LANCHOR33+26
+	ldrh	w19, [x0, #:lo12:.LANCHOR144]
+	adrp	x0, .LANCHOR32+26
 	stp	x21, x22, [sp, 32]
 	and	w21, w1, 65535
-	ldrh	w26, [x0, #:lo12:.LANCHOR33+26]
+	ldrh	w26, [x0, #:lo12:.LANCHOR32+26]
 	sub	w19, w19, #1
 	sxth	w19, w19
 	stp	x27, x28, [sp, 80]
@@ -12577,23 +12415,23 @@ flash_get_last_written_page:
 	add	w1, w19, w26
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L2092
+	bne	.L2046
 	mov	w27, 0
 	mov	w28, 2
-.L2093:
+.L2047:
 	cmp	w27, w19
-	ble	.L2096
-.L2092:
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2097
+	ble	.L2050
+.L2046:
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L2051
 	ldr	w3, [x22]
-	adrp	x0, .LC131
+	adrp	x0, .LC128
 	mov	w2, w19
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC131
+	add	x0, x0, :lo12:.LC128
 	bl	printf
-.L2097:
+.L2051:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -12602,7 +12440,7 @@ flash_get_last_written_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2096:
+.L2050:
 	add	w20, w27, w19
 	mov	w4, w25
 	mov	x3, x22
@@ -12612,28 +12450,28 @@ flash_get_last_written_page:
 	add	w1, w26, w20, sxth
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L2094
+	bne	.L2048
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L2093
-.L2094:
+	b	.L2047
+.L2048:
 	add	w20, w20, 1
 	sxth	w27, w20
-	b	.L2093
+	b	.L2047
 	.size	flash_get_last_written_page, .-flash_get_last_written_page
 	.section	.text.flash_get_last_written_page_ext,"ax",@progbits
 	.align	2
 	.global	flash_get_last_written_page_ext
 	.type	flash_get_last_written_page_ext, %function
 flash_get_last_written_page_ext:
-	adrp	x4, .LANCHOR32
+	adrp	x4, .LANCHOR31
 	mov	w5, 24
 	and	w0, w0, 65535
 	mov	w6, 1
-	ldrb	w4, [x4, #:lo12:.LANCHOR32]
+	ldrb	w4, [x4, #:lo12:.LANCHOR31]
 	sub	w5, w5, w4
-	adrp	x4, .LANCHOR75
-	ldrh	w4, [x4, #:lo12:.LANCHOR75]
+	adrp	x4, .LANCHOR74
+	ldrh	w4, [x4, #:lo12:.LANCHOR74]
 	sub	w5, w5, w4
 	mov	w4, w3
 	mov	x3, x2
@@ -12652,44 +12490,44 @@ flash_ddr_para_scan:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR49
+	adrp	x20, .LANCHOR48
 	stp	x21, x22, [sp, 32]
 	and	w22, w0, 255
-	ldrb	w0, [x20, #:lo12:.LANCHOR49]
-	adrp	x19, .LANCHOR21
+	ldrb	w0, [x20, #:lo12:.LANCHOR48]
+	adrp	x19, .LANCHOR26
 	stp	x23, x24, [sp, 48]
 	mov	w21, 1
 	mov	w23, w1
 	str	x25, [sp, 64]
-	strb	w21, [x19, #:lo12:.LANCHOR21]
-	adrp	x24, .LANCHOR176
+	strb	w21, [x19, #:lo12:.LANCHOR26]
+	adrp	x24, .LANCHOR173
 	bl	flash_set_interface_mode
-	adrp	x25, .LANCHOR175
-	ldrb	w0, [x20, #:lo12:.LANCHOR49]
+	adrp	x25, .LANCHOR172
+	ldrb	w0, [x20, #:lo12:.LANCHOR48]
 	bl	nandc_set_if_mode
-	ldr	x3, [x25, #:lo12:.LANCHOR175]
+	ldr	x3, [x25, #:lo12:.LANCHOR172]
 	mov	w4, 4
-	ldr	x2, [x24, #:lo12:.LANCHOR176]
+	ldr	x2, [x24, #:lo12:.LANCHOR173]
 	mov	w1, w23
 	mov	w0, w22
 	bl	flash_ddr_tuning_read
-	ldr	x3, [x25, #:lo12:.LANCHOR175]
+	ldr	x3, [x25, #:lo12:.LANCHOR172]
 	mov	w4, 4
-	ldr	x2, [x24, #:lo12:.LANCHOR176]
+	ldr	x2, [x24, #:lo12:.LANCHOR173]
 	mov	w1, w23
 	mov	w0, w22
 	bl	flash_read_page
 	cmn	w0, #1
 	mov	x0, x19
-	bne	.L2104
-	ldrb	w1, [x20, #:lo12:.LANCHOR49]
-	tbz	x1, 0, .L2104
+	bne	.L2058
+	ldrb	w1, [x20, #:lo12:.LANCHOR48]
+	tbz	x1, 0, .L2058
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, w21
 	bl	nandc_set_if_mode
-	strb	wzr, [x19, #:lo12:.LANCHOR21]
-.L2105:
+	strb	wzr, [x19, #:lo12:.LANCHOR26]
+.L2059:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -12697,59 +12535,49 @@ flash_ddr_para_scan:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2104:
+.L2058:
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR21]
-	b	.L2105
+	strb	w1, [x0, #:lo12:.LANCHOR26]
+	b	.L2059
 	.size	flash_ddr_para_scan, .-flash_ddr_para_scan
 	.section	.text.flash_prog_page,"ax",@progbits
 	.align	2
 	.global	flash_prog_page
 	.type	flash_prog_page, %function
 flash_prog_page:
-	stp	x29, x30, [sp, -96]!
+	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	and	w21, w0, 255
-	adrp	x0, .LANCHOR13
+	adrp	x0, .LANCHOR7
 	stp	x25, x26, [sp, 64]
 	stp	x19, x20, [sp, 16]
 	mov	w20, 24
-	ldr	x26, [x0, #:lo12:.LANCHOR13]
-	adrp	x0, .LANCHOR32
-	stp	x23, x24, [sp, 48]
+	ldr	x26, [x0, #:lo12:.LANCHOR7]
+	adrp	x0, .LANCHOR31
 	mov	w22, w1
-	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	stp	x23, x24, [sp, 48]
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	mov	x24, x2
+	mov	x25, x3
 	and	x19, x21, 255
-	str	x27, [sp, 80]
-	add	x23, x19, 8
 	sub	w0, w20, w0
 	mov	w20, 1
-	mov	x24, x2
-	mov	x25, x3
+	add	x23, x19, 8
 	lsl	w20, w20, w0
-	adrp	x0, .LANCHOR14
 	sub	w20, w20, #1
-	add	x23, x26, x23, lsl 8
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	and	w20, w20, w1
-	ubfx	x27, x22, 24, 2
-	tbz	x0, 4, .L2111
-	adrp	x0, .LC132
-	mov	w3, w4
-	mov	w2, w27
-	add	x0, x0, :lo12:.LC132
-	bl	printf
-.L2111:
 	bl	nandc_wait_flash_ready
 	mov	w0, w21
 	bl	hynix_reconfig_rr_para
 	mov	w0, w21
 	bl	nandc_cs
+	add	x23, x26, x23, lsl 8
 	mov	w0, w21
-	cbnz	w27, .L2112
+	tst	x22, 50331648
+	bne	.L2065
 	bl	zftl_flash_enter_slc_mode
-.L2113:
+.L2066:
 	add	x19, x26, x19, lsl 8
 	mov	w0, 128
 	str	w0, [x19, 2056]
@@ -12761,19 +12589,19 @@ flash_prog_page:
 	str	w0, [x19, 2052]
 	lsr	w0, w20, 16
 	str	w0, [x19, 2052]
-	adrp	x0, .LANCHOR31
-	ldrb	w0, [x0, #:lo12:.LANCHOR31]
-	cbz	w0, .L2114
+	adrp	x0, .LANCHOR30
+	ldrb	w0, [x0, #:lo12:.LANCHOR30]
+	cbz	w0, .L2067
 	lsr	w0, w20, 24
 	str	w0, [x19, 2052]
-.L2114:
+.L2067:
 	mov	w0, w20
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR33+9
+	adrp	x0, .LANCHOR32+9
 	mov	x4, x25
 	mov	x3, x24
 	mov	w1, 1
-	ldrb	w2, [x0, #:lo12:.LANCHOR33+9]
+	ldrb	w2, [x0, #:lo12:.LANCHOR32+9]
 	mov	w0, w21
 	bl	nandc_xfer
 	mov	w0, 16
@@ -12782,26 +12610,25 @@ flash_prog_page:
 	mov	x0, x23
 	bl	flash_read_status
 	mov	w3, w0
-	bl	nandc_de_cs.constprop.33
+	bl	nandc_de_cs.constprop.32
 	and	w2, w3, 4
-	tbz	x3, 2, .L2110
+	tbz	x3, 2, .L2064
 	mov	w1, w22
-	adrp	x0, .LC133
-	add	x0, x0, :lo12:.LC133
+	adrp	x0, .LC129
+	add	x0, x0, :lo12:.LC129
 	bl	printf
 	mov	w2, -1
-.L2110:
+.L2064:
 	mov	w0, w2
-	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 96
+	ldp	x29, x30, [sp], 80
 	ret
-.L2112:
+.L2065:
 	bl	zftl_flash_exit_slc_mode
-	b	.L2113
+	b	.L2066
 	.size	flash_prog_page, .-flash_prog_page
 	.section	.text.flash_test_blk,"ax",@progbits
 	.align	2
@@ -12812,16 +12639,16 @@ flash_test_blk:
 	mov	w2, 32
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR166
+	adrp	x22, .LANCHOR163
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 255
-	ldr	x0, [x22, #:lo12:.LANCHOR166]
-	adrp	x21, .LANCHOR168
+	ldr	x0, [x22, #:lo12:.LANCHOR163]
+	adrp	x21, .LANCHOR165
 	and	w19, w1, 65535
 	str	x23, [sp, 48]
 	mov	w1, 165
 	bl	ftl_memset
-	ldr	x0, [x21, #:lo12:.LANCHOR168]
+	ldr	x0, [x21, #:lo12:.LANCHOR165]
 	mov	w2, 8
 	mov	w1, 90
 	bl	ftl_memset
@@ -12832,10 +12659,10 @@ flash_test_blk:
 	mov	w1, w19
 	bl	flash_erase_block
 	cmn	w0, #1
-	bne	.L2127
-.L2129:
+	bne	.L2077
+.L2079:
 	mov	w21, -1
-.L2128:
+.L2078:
 	mov	w1, w19
 	mov	w0, w20
 	bl	flash_erase_block
@@ -12845,38 +12672,38 @@ flash_test_blk:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2127:
-	adrp	x23, .LANCHOR33
-	add	x23, x23, :lo12:.LANCHOR33
-	ldr	x3, [x21, #:lo12:.LANCHOR168]
+.L2077:
+	adrp	x23, .LANCHOR32
+	add	x23, x23, :lo12:.LANCHOR32
+	ldr	x3, [x21, #:lo12:.LANCHOR165]
 	mov	w1, w19
-	ldr	x2, [x22, #:lo12:.LANCHOR166]
+	ldr	x2, [x22, #:lo12:.LANCHOR163]
 	mov	w0, w20
 	ldrb	w4, [x23, 9]
 	bl	flash_prog_page
 	cmn	w0, #1
-	beq	.L2129
+	beq	.L2079
 	ldrb	w4, [x23, 9]
 	mov	w1, w19
-	ldr	x3, [x21, #:lo12:.LANCHOR168]
+	ldr	x3, [x21, #:lo12:.LANCHOR165]
 	mov	w0, w20
-	ldr	x2, [x22, #:lo12:.LANCHOR166]
+	ldr	x2, [x22, #:lo12:.LANCHOR163]
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L2129
-	ldr	x0, [x22, #:lo12:.LANCHOR166]
+	beq	.L2079
+	ldr	x0, [x22, #:lo12:.LANCHOR163]
 	ldr	w1, [x0]
 	mov	w0, 42405
 	movk	w0, 0xa5a5, lsl 16
 	cmp	w1, w0
-	bne	.L2129
-	ldr	x0, [x21, #:lo12:.LANCHOR168]
+	bne	.L2079
+	ldr	x0, [x21, #:lo12:.LANCHOR165]
 	ldr	w1, [x0]
 	mov	w0, 23130
 	movk	w0, 0x5a5a, lsl 16
 	cmp	w1, w0
 	csetm	w21, ne
-	b	.L2128
+	b	.L2078
 	.size	flash_test_blk, .-flash_test_blk
 	.section	.text.id_block_prog_msb_ff_data,"ax",@progbits
 	.align	2
@@ -12887,50 +12714,50 @@ id_block_prog_msb_ff_data:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	and	w22, w0, 255
-	adrp	x0, .LANCHOR19
+	adrp	x0, .LANCHOR24
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
-	ldrb	w0, [x0, #:lo12:.LANCHOR19]
+	ldrb	w0, [x0, #:lo12:.LANCHOR24]
 	str	x25, [sp, 64]
-	cbnz	w0, .L2137
-	adrp	x20, .LANCHOR33
-	add	x20, x20, :lo12:.LANCHOR33
+	cbnz	w0, .L2087
+	adrp	x20, .LANCHOR32
+	add	x20, x20, :lo12:.LANCHOR32
 	ldrb	w0, [x20, 19]
 	sub	w0, w0, #5
 	and	w3, w0, 255
 	cmp	w3, 63
-	bhi	.L2137
+	bhi	.L2087
 	and	w19, w2, 65535
 	mov	x2, 16391
 	movk	x2, 0x4000, lsl 16
 	movk	x2, 0x8000, lsl 48
 	lsr	x0, x2, x3
-	tbz	x0, 0, .L2137
-	adrp	x21, .LANCHOR145
+	tbz	x0, 0, .L2087
+	adrp	x21, .LANCHOR142
 	mov	w23, w1
-	add	x21, x21, :lo12:.LANCHOR145
+	add	x21, x21, :lo12:.LANCHOR142
 	mov	w25, 65535
-	adrp	x24, .LANCHOR166
-.L2139:
+	adrp	x24, .LANCHOR163
+.L2089:
 	ldrh	w0, [x20, 10]
 	cmp	w0, w19
-	bhi	.L2140
-.L2137:
+	bhi	.L2090
+.L2087:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2140:
+.L2090:
 	ldrh	w0, [x21, w19, sxtw 1]
 	cmp	w0, w25
-	bne	.L2137
-	ldr	x0, [x24, #:lo12:.LANCHOR166]
+	bne	.L2087
+	ldr	x0, [x24, #:lo12:.LANCHOR163]
 	mov	w2, 16384
 	mov	w1, 255
 	bl	ftl_memset
-	ldr	x3, [x24, #:lo12:.LANCHOR166]
+	ldr	x3, [x24, #:lo12:.LANCHOR163]
 	add	w1, w19, w23
 	ldrb	w4, [x20, 9]
 	add	w19, w19, 1
@@ -12938,7 +12765,7 @@ id_block_prog_msb_ff_data:
 	mov	w0, w22
 	and	w19, w19, 65535
 	bl	flash_prog_page
-	b	.L2139
+	b	.L2089
 	.size	id_block_prog_msb_ff_data, .-id_block_prog_msb_ff_data
 	.section	.text.flash_start_one_pass_page_prog,"ax",@progbits
 	.align	2
@@ -12948,19 +12775,19 @@ flash_start_one_pass_page_prog:
 	stp	x29, x30, [sp, -32]!
 	and	w8, w0, 255
 	and	w7, w3, 255
-	adrp	x0, .LANCHOR13
+	adrp	x0, .LANCHOR7
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w20, w2, 255
-	ldr	x19, [x0, #:lo12:.LANCHOR13]
+	ldr	x19, [x0, #:lo12:.LANCHOR7]
 	mov	w0, w7
 	bl	nandc_cs
-	cbz	w8, .L2143
+	cbz	w8, .L2093
 	sxtw	x0, w7
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 8
 	str	w8, [x0, 8]
-.L2143:
+.L2093:
 	ubfiz	x0, x7, 8, 8
 	add	x19, x19, x0
 	mov	w0, 128
@@ -12973,19 +12800,19 @@ flash_start_one_pass_page_prog:
 	str	w0, [x19, 2052]
 	lsr	w0, w4, 16
 	str	w0, [x19, 2052]
-	adrp	x0, .LANCHOR31
-	ldrb	w0, [x0, #:lo12:.LANCHOR31]
-	cbz	w0, .L2144
+	adrp	x0, .LANCHOR30
+	ldrb	w0, [x0, #:lo12:.LANCHOR30]
+	cbz	w0, .L2094
 	lsr	w0, w4, 24
 	str	w0, [x19, 2052]
-.L2144:
+.L2094:
 	mov	w0, w4
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR33+9
+	adrp	x0, .LANCHOR32+9
 	mov	x4, x6
 	mov	x3, x5
 	mov	w1, 1
-	ldrb	w2, [x0, #:lo12:.LANCHOR33+9]
+	ldrb	w2, [x0, #:lo12:.LANCHOR32+9]
 	mov	w0, w7
 	bl	nandc_xfer
 	str	w20, [x19, 2056]
@@ -13004,19 +12831,19 @@ flash_dual_page_prog:
 	and	w20, w0, 255
 	stp	x25, x26, [sp, 64]
 	mov	x25, x2
-	adrp	x2, .LANCHOR13
+	adrp	x2, .LANCHOR7
 	stp	x21, x22, [sp, 32]
 	ubfiz	x22, x20, 8, 8
 	stp	x27, x28, [sp, 80]
 	add	x0, x22, 2048
-	ldr	x22, [x2, #:lo12:.LANCHOR13]
+	ldr	x22, [x2, #:lo12:.LANCHOR7]
 	mov	w19, 24
-	adrp	x27, .LANCHOR14
+	adrp	x27, .LANCHOR19
 	add	x22, x22, x0
-	adrp	x0, .LANCHOR32
+	adrp	x0, .LANCHOR31
 	stp	x23, x24, [sp, 48]
 	mov	w21, w1
-	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
 	mov	x26, x3
 	mov	x23, x4
 	mov	x24, x5
@@ -13024,23 +12851,23 @@ flash_dual_page_prog:
 	mov	w19, 1
 	ubfx	x28, x21, 24, 2
 	lsl	w19, w19, w0
-	ldr	w0, [x27, #:lo12:.LANCHOR14]
+	ldr	w0, [x27, #:lo12:.LANCHOR19]
 	sub	w19, w19, #1
 	and	w19, w19, w1
-	tbz	x0, 4, .L2153
-	adrp	x0, .LC132
+	tbz	x0, 4, .L2103
+	adrp	x0, .LC130
 	mov	w3, w6
 	mov	w2, w28
-	add	x0, x0, :lo12:.LC132
+	add	x0, x0, :lo12:.LC130
 	bl	printf
-.L2153:
+.L2103:
 	bl	nandc_wait_flash_ready
 	mov	w0, w20
 	bl	nandc_cs
 	mov	w0, w20
-	cbnz	w28, .L2154
+	cbnz	w28, .L2104
 	bl	zftl_flash_enter_slc_mode
-.L2155:
+.L2105:
 	mov	x6, x26
 	mov	x5, x25
 	mov	w4, w19
@@ -13062,18 +12889,18 @@ flash_dual_page_prog:
 	mov	x0, x22
 	bl	flash_read_status
 	mov	w3, w0
-	bl	nandc_de_cs.constprop.33
+	bl	nandc_de_cs.constprop.32
 	and	w2, w3, 4
-	tbz	x3, 2, .L2152
-	ldr	w0, [x27, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2157
-	adrp	x0, .LC133
+	tbz	x3, 2, .L2102
+	ldr	w0, [x27, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L2107
+	adrp	x0, .LC129
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC133
+	add	x0, x0, :lo12:.LC129
 	bl	printf
-.L2157:
+.L2107:
 	mov	w2, -1
-.L2152:
+.L2102:
 	mov	w0, w2
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -13082,9 +12909,9 @@ flash_dual_page_prog:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2154:
+.L2104:
 	bl	zftl_flash_exit_slc_mode
-	b	.L2155
+	b	.L2105
 	.size	flash_dual_page_prog, .-flash_dual_page_prog
 	.section	.text.ymtc_flash_tlc_page_prog,"ax",@progbits
 	.align	2
@@ -13097,19 +12924,19 @@ ymtc_flash_tlc_page_prog:
 	and	w20, w0, 255
 	str	x25, [sp, 64]
 	mov	w25, w1
-	adrp	x1, .LANCHOR13
+	adrp	x1, .LANCHOR7
 	stp	x21, x22, [sp, 32]
 	ubfiz	x22, x20, 8, 8
 	mov	w19, 24
 	add	x0, x22, 2048
-	ldr	x22, [x1, #:lo12:.LANCHOR13]
+	ldr	x22, [x1, #:lo12:.LANCHOR7]
 	mov	w21, 1
 	stp	x23, x24, [sp, 48]
 	add	x22, x22, x0
-	adrp	x0, .LANCHOR32
+	adrp	x0, .LANCHOR31
 	mov	x23, x2
 	mov	x24, x3
-	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
 	sub	w19, w19, w0
 	bl	nandc_wait_flash_ready
 	lsl	w19, w21, w19
@@ -13149,19 +12976,19 @@ ymtc_flash_tlc_page_prog:
 	mov	x0, x22
 	bl	flash_read_status
 	mov	w3, w0
-	bl	nandc_de_cs.constprop.33
+	bl	nandc_de_cs.constprop.32
 	and	w2, w3, 4
-	tbz	x3, 2, .L2165
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2167
-	adrp	x0, .LC134
+	tbz	x3, 2, .L2115
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L2117
+	adrp	x0, .LC131
 	mov	w1, w25
-	add	x0, x0, :lo12:.LC134
+	add	x0, x0, :lo12:.LC131
 	bl	printf
-.L2167:
+.L2117:
 	mov	w2, -1
-.L2165:
+.L2115:
 	mov	w0, w2
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -13170,13 +12997,13 @@ ymtc_flash_tlc_page_prog:
 	ldp	x29, x30, [sp], 80
 	ret
 	.size	ymtc_flash_tlc_page_prog, .-ymtc_flash_tlc_page_prog
-	.section	.text.fw_flash_page_prog.constprop.30,"ax",@progbits
+	.section	.text.fw_flash_page_prog.constprop.29,"ax",@progbits
 	.align	2
-	.type	fw_flash_page_prog.constprop.30, %function
-fw_flash_page_prog.constprop.30:
+	.type	fw_flash_page_prog.constprop.29, %function
+fw_flash_page_prog.constprop.29:
 	stp	x29, x30, [sp, -64]!
-	adrp	x4, .LANCHOR33
-	add	x4, x4, :lo12:.LANCHOR33
+	adrp	x4, .LANCHOR32
+	add	x4, x4, :lo12:.LANCHOR32
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x20, x1
@@ -13185,26 +13012,26 @@ fw_flash_page_prog.constprop.30:
 	str	x23, [sp, 48]
 	ldrb	w19, [x4, 9]
 	udiv	w19, w0, w19
-	adrp	x0, .LANCHOR50
-	ldrb	w23, [x0, #:lo12:.LANCHOR50]
-	adrp	x0, .LANCHOR17
-	ldrb	w0, [x0, #:lo12:.LANCHOR17]
+	adrp	x0, .LANCHOR49
+	ldrb	w23, [x0, #:lo12:.LANCHOR49]
+	adrp	x0, .LANCHOR22
+	ldrb	w0, [x0, #:lo12:.LANCHOR22]
 	bl	nandc_bch_sel
 	ldrb	w0, [x4, 7]
 	cmp	w0, 9
-	bne	.L2173
-	adrp	x0, .LANCHOR19
-	ldrb	w0, [x0, #:lo12:.LANCHOR19]
-	cbnz	w0, .L2173
+	bne	.L2123
+	adrp	x0, .LANCHOR24
+	ldrb	w0, [x0, #:lo12:.LANCHOR24]
+	cbnz	w0, .L2123
 	ldrb	w0, [x4, 12]
 	cmp	w0, 3
-	bne	.L2174
+	bne	.L2124
 	mov	x3, x21
 	mov	x2, x20
 	mov	w1, w19
 	mov	w0, 0
 	bl	ymtc_flash_tlc_page_prog
-.L2177:
+.L2127:
 	mov	w4, w0
 	mov	w0, w23
 	bl	nandc_bch_sel
@@ -13214,13 +13041,13 @@ fw_flash_page_prog.constprop.30:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2174:
-	adrp	x22, .LANCHOR166
+.L2124:
+	adrp	x22, .LANCHOR163
 	mov	w2, 16384
 	mov	w1, 255
-	ldr	x0, [x22, #:lo12:.LANCHOR166]
+	ldr	x0, [x22, #:lo12:.LANCHOR163]
 	bl	ftl_memset
-	ldr	x5, [x22, #:lo12:.LANCHOR166]
+	ldr	x5, [x22, #:lo12:.LANCHOR163]
 	mov	w6, 4
 	mov	x3, x21
 	mov	x2, x20
@@ -13228,16 +13055,16 @@ fw_flash_page_prog.constprop.30:
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_dual_page_prog
-	b	.L2177
-.L2173:
+	b	.L2127
+.L2123:
 	mov	w4, 4
 	mov	x3, x21
 	mov	x2, x20
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_prog_page
-	b	.L2177
-	.size	fw_flash_page_prog.constprop.30, .-fw_flash_page_prog.constprop.30
+	b	.L2127
+	.size	fw_flash_page_prog.constprop.29, .-fw_flash_page_prog.constprop.29
 	.section	.text.idb_write_data,"ax",@progbits
 	.align	2
 	.global	idb_write_data
@@ -13251,11 +13078,11 @@ idb_write_data:
 	stp	x21, x22, [sp, 32]
 	mov	w20, w3
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR143
+	adrp	x22, .LANCHOR140
 	stp	x25, x26, [sp, 64]
 	mov	x24, x2
 	stp	x27, x28, [sp, 80]
-	bne	.L2179
+	bne	.L2129
 	ldr	w0, [x2]
 	mov	w1, 35899
 	movk	w1, 0xfcdc, lsl 16
@@ -13263,69 +13090,69 @@ idb_write_data:
 	mov	w1, 19282
 	movk	w1, 0x534e, lsl 16
 	ccmp	w0, w1, 4, ne
-	beq	.L2180
+	beq	.L2130
 	add	w1, w1, 327680
 	cmp	w0, w1
-	bne	.L2179
-.L2180:
-	adrp	x21, .LANCHOR141
+	bne	.L2129
+.L2130:
+	adrp	x21, .LANCHOR138
 	mov	w1, 1
-	strb	w1, [x22, #:lo12:.LANCHOR143]
-	ldr	x0, [x21, #:lo12:.LANCHOR141]
-	cbnz	x0, .L2181
+	strb	w1, [x22, #:lo12:.LANCHOR140]
+	ldr	x0, [x21, #:lo12:.LANCHOR138]
+	cbnz	x0, .L2131
 	mov	w0, 262144
 	bl	ftl_malloc
-	str	x0, [x21, #:lo12:.LANCHOR141]
-.L2181:
-	adrp	x0, .LANCHOR177
+	str	x0, [x21, #:lo12:.LANCHOR138]
+.L2131:
+	adrp	x0, .LANCHOR174
 	mov	w1, 64
-	str	w1, [x0, #:lo12:.LANCHOR177]
-.L2179:
-	ldrb	w0, [x22, #:lo12:.LANCHOR143]
-	cbz	w0, .L2247
-	adrp	x0, .LANCHOR141
+	str	w1, [x0, #:lo12:.LANCHOR174]
+.L2129:
+	ldrb	w0, [x22, #:lo12:.LANCHOR140]
+	cbz	w0, .L2197
+	adrp	x0, .LANCHOR138
 	mov	x23, x0
-	ldr	x21, [x0, #:lo12:.LANCHOR141]
-	cbz	x21, .L2247
+	ldr	x21, [x0, #:lo12:.LANCHOR138]
+	cbz	x21, .L2197
 	add	w0, w19, w20
 	str	w0, [x29, 140]
 	cmp	w0, 63
-	bls	.L2183
+	bls	.L2133
 	cmp	w19, 575
-	bhi	.L2184
-	adrp	x21, .LANCHOR144
-	ldr	x0, [x21, #:lo12:.LANCHOR144]
-	cbz	x0, .L2185
-.L2188:
-	adrp	x1, .LANCHOR142
+	bhi	.L2134
+	adrp	x21, .LANCHOR141
+	ldr	x0, [x21, #:lo12:.LANCHOR141]
+	cbz	x0, .L2135
+.L2138:
+	adrp	x1, .LANCHOR139
 	mov	w2, 1
-	ldr	x0, [x23, #:lo12:.LANCHOR141]
+	ldr	x0, [x23, #:lo12:.LANCHOR138]
 	cmp	w19, 64
-	str	w2, [x1, #:lo12:.LANCHOR142]
-	bhi	.L2300
+	str	w2, [x1, #:lo12:.LANCHOR139]
+	bhi	.L2250
 	mov	w4, 64
 	sub	w4, w4, w19
 	sub	w2, w20, w4
 	ubfiz	x4, x4, 9, 25
 	lsl	w2, w2, 9
 	add	x1, x24, x4
-.L2306:
+.L2256:
 	bl	ftl_memcpy
-.L2189:
-	adrp	x0, .LANCHOR177
-	ldr	w0, [x0, #:lo12:.LANCHOR177]
+.L2139:
+	adrp	x0, .LANCHOR174
+	ldr	w0, [x0, #:lo12:.LANCHOR174]
 	cmp	w19, w0
-	beq	.L2243
-	strb	wzr, [x22, #:lo12:.LANCHOR143]
-	b	.L2243
-.L2185:
+	beq	.L2193
+	strb	wzr, [x22, #:lo12:.LANCHOR140]
+	b	.L2193
+.L2135:
 	mov	w0, 262144
 	bl	ftl_malloc
-	str	x0, [x21, #:lo12:.LANCHOR144]
-	cbnz	x0, .L2188
+	str	x0, [x21, #:lo12:.LANCHOR141]
+	cbnz	x0, .L2138
 	mov	w0, -1
-	b	.L2178
-.L2300:
+	b	.L2128
+.L2250:
 	mov	w2, 576
 	sub	w2, w2, w19
 	cmp	w20, w2
@@ -13335,14 +13162,14 @@ idb_write_data:
 	lsl	w2, w2, 9
 	mov	x1, x24
 	add	x0, x0, x3
-	b	.L2306
-.L2183:
+	b	.L2256
+.L2133:
 	cmp	w19, 575
-	bls	.L2189
-.L2184:
-	adrp	x0, .LANCHOR142
-	ldr	w0, [x0, #:lo12:.LANCHOR142]
-	cbz	w0, .L2189
+	bls	.L2139
+.L2134:
+	adrp	x0, .LANCHOR139
+	ldr	w0, [x0, #:lo12:.LANCHOR139]
+	cbz	w0, .L2139
 	ldr	w0, [x21]
 	mov	w1, 35899
 	movk	w1, 0xfcdc, lsl 16
@@ -13350,109 +13177,109 @@ idb_write_data:
 	mov	w1, 19282
 	movk	w1, 0x534e, lsl 16
 	ccmp	w0, w1, 4, ne
-	beq	.L2190
+	beq	.L2140
 	add	w1, w1, 327680
 	cmp	w0, w1
-	bne	.L2191
-.L2190:
+	bne	.L2141
+.L2140:
 	adrp	x0, .LANCHOR0
-	mov	x10, x0
+	mov	x20, x0
 	ldrb	w1, [x0, #:lo12:.LANCHOR0]
 	str	w1, [x29, 176]
-	adrp	x1, .LANCHOR19
-	mov	x11, x1
+	adrp	x1, .LANCHOR24
+	mov	x24, x1
 	ldr	w0, [x29, 176]
-	ldrb	w2, [x1, #:lo12:.LANCHOR19]
+	ldrb	w2, [x1, #:lo12:.LANCHOR24]
 	str	w2, [x29, 204]
-	cbz	w0, .L2192
+	cbz	w0, .L2142
 	ldrh	w0, [x29, 176]
 	str	w0, [x29, 172]
 	uxtw	x0, w2
 	cmp	w0, 0
 	cset	w0, eq
-.L2303:
-	adrp	x8, .LANCHOR33
-	add	x8, x8, :lo12:.LANCHOR33
+.L2253:
+	adrp	x23, .LANCHOR32
+	add	x23, x23, :lo12:.LANCHOR32
 	str	w0, [x29, 200]
 	mov	w0, 0
-	ldrb	w19, [x8, 9]
-	ldrh	w22, [x8, 26]
+	ldrb	w19, [x23, 9]
+	ldrh	w22, [x23, 26]
 	bl	zftl_flash_exit_slc_mode
-	ldrh	w20, [x8, 10]
+	ldrb	w0, [x24, #:lo12:.LANCHOR24]
 	add	x1, x21, 258048
-	ldrb	w0, [x11, #:lo12:.LANCHOR19]
+	strb	w0, [x20, #:lo12:.LANCHOR0]
 	mov	w4, 16981
-	strb	w0, [x10, #:lo12:.LANCHOR0]
+	ldrh	w20, [x23, 10]
 	add	x1, x1, 2044
-	ldrb	w0, [x8, 12]
-	lsl	w20, w20, 2
+	ldrb	w0, [x23, 12]
 	mov	w2, 65023
 	movk	w4, 0x4f4f, lsl 16
 	mov	w3, 4098
+	lsl	w20, w20, 2
 	sdiv	w20, w20, w0
 	mov	w0, 512
 	cmp	w20, 512
 	csel	w20, w20, w0, lt
 	mov	w0, 0
-.L2199:
+.L2149:
 	ldr	w5, [x1]
-	cbnz	w5, .L2195
-	cbnz	w0, .L2196
+	cbnz	w5, .L2145
+	cbnz	w0, .L2146
 	str	w4, [x1, 2048]
-.L2197:
+.L2147:
 	add	w0, w0, 1
 	sub	w2, w2, #1
 	cmp	w0, w3
 	sub	x1, x1, #4
 	csel	w0, w0, wzr, ls
 	cmp	w2, 4096
-	bne	.L2199
-.L2195:
+	bne	.L2149
+.L2145:
 	ldr	w1, [x21, w2, uxtw 2]
 	mov	w3, w20
-	adrp	x0, .LC135
-	add	x0, x0, :lo12:.LC135
+	adrp	x0, .LC132
+	add	x0, x0, :lo12:.LC132
 	bl	printf
 	str	wzr, [x29, 180]
 	mul	w0, w22, w19
 	str	wzr, [x29, 192]
 	str	w0, [x29, 128]
-	adrp	x0, .LANCHOR52
-	add	x0, x0, :lo12:.LANCHOR52
+	adrp	x0, .LANCHOR51
+	add	x0, x0, :lo12:.LANCHOR51
 	str	x0, [x29, 184]
-.L2238:
-	adrp	x23, .LANCHOR144
+.L2188:
+	adrp	x23, .LANCHOR141
 	mov	w1, 0
 	mov	w2, 512
-	ldr	x0, [x23, #:lo12:.LANCHOR144]
+	ldr	x0, [x23, #:lo12:.LANCHOR141]
 	bl	ftl_memset
 	str	x23, [x29, 160]
-	adrp	x0, .LANCHOR27
+	adrp	x0, .LANCHOR6
 	ldr	w1, [x29, 192]
-	ldr	x0, [x0, #:lo12:.LANCHOR27]
+	ldr	x0, [x0, #:lo12:.LANCHOR6]
 	add	x0, x0, x1, uxtw
 	ldrb	w19, [x0, 32]
 	cmp	w19, 255
-	beq	.L2200
+	beq	.L2150
 	ldr	w0, [x29, 128]
 	mul	w19, w19, w0
 	ldr	w0, [x29, 200]
-	cbz	w0, .L2201
+	cbz	w0, .L2151
 	and	w0, w1, -3
-	adrp	x10, .LANCHOR0
+	adrp	x24, .LANCHOR0
 	cmp	w0, 1
-	adrp	x8, .LANCHOR19
-	beq	.L2202
+	adrp	x22, .LANCHOR24
+	beq	.L2152
 	ldr	w0, [x29, 200]
 	cmp	w0, 3
-	bne	.L2203
-.L2202:
+	bne	.L2153
+.L2152:
 	ldrb	w0, [x29, 172]
-	strb	w0, [x10, #:lo12:.LANCHOR0]
-	strb	w0, [x8, #:lo12:.LANCHOR19]
-.L2201:
-	adrp	x22, .LANCHOR33
-	add	x27, x22, :lo12:.LANCHOR33
+	strb	w0, [x24, #:lo12:.LANCHOR0]
+	strb	w0, [x22, #:lo12:.LANCHOR24]
+.L2151:
+	adrp	x22, .LANCHOR32
+	add	x27, x22, :lo12:.LANCHOR32
 	ldr	x0, [x29, 184]
 	ldrb	w24, [x27, 9]
 	ldrh	w25, [x27, 26]
@@ -13474,15 +13301,15 @@ idb_write_data:
 	lsl	w0, w0, 2
 	sdiv	w0, w0, w1
 	str	w0, [x29, 156]
-	bne	.L2253
-	adrp	x0, .LANCHOR28
-	ldrb	w0, [x0, #:lo12:.LANCHOR28]
+	bne	.L2203
+	adrp	x0, .LANCHOR27
+	ldrb	w0, [x0, #:lo12:.LANCHOR27]
 	cmp	w0, 9
-	bne	.L2253
+	bne	.L2203
 	ldr	x0, [x29, 160]
 	mov	w2, 1024
 	mov	w1, 0
-	ldr	x25, [x0, #:lo12:.LANCHOR144]
+	ldr	x25, [x0, #:lo12:.LANCHOR141]
 	mov	x0, x25
 	bl	ftl_memset
 	mov	w0, 18766
@@ -13490,15 +13317,15 @@ idb_write_data:
 	str	w0, [x25]
 	mov	w0, 12
 	str	w0, [x25, 4]
-	adrp	x0, .LANCHOR19
+	adrp	x0, .LANCHOR24
 	strb	wzr, [x25, 16]
 	str	wzr, [x25, 12]
-	ldrb	w0, [x0, #:lo12:.LANCHOR19]
-	cbz	w0, .L2205
+	ldrb	w0, [x0, #:lo12:.LANCHOR24]
+	cbz	w0, .L2155
 	ldrb	w0, [x27, 29]
 	strb	w0, [x25, 16]
-.L2205:
-	add	x1, x22, :lo12:.LANCHOR33
+.L2155:
+	add	x1, x22, :lo12:.LANCHOR32
 	mov	w0, 4
 	strb	w0, [x25, 17]
 	cmp	w24, 8
@@ -13518,31 +13345,31 @@ idb_write_data:
 	str	w0, [x25, 8]
 	sub	w0, w20, #4
 	str	w0, [x29, 196]
-.L2204:
+.L2154:
 	adrp	x27, .LANCHOR3
 	mov	x23, x21
 	add	x27, x27, :lo12:.LANCHOR3
-	adrp	x0, .LANCHOR19
+	adrp	x0, .LANCHOR24
 	mov	w28, 0
-	add	x0, x0, :lo12:.LANCHOR19
+	add	x0, x0, :lo12:.LANCHOR24
 	str	x0, [x29, 144]
-.L2207:
+.L2157:
 	ldr	w0, [x29, 156]
 	cmp	w0, w28
-	bhi	.L2218
+	bhi	.L2168
 	ldr	x0, [x29, 160]
-	add	x22, x22, :lo12:.LANCHOR33
+	add	x22, x22, :lo12:.LANCHOR32
 	mov	w24, 4
 	mov	w25, 0
 	mov	w28, 0
-	ldr	x23, [x0, #:lo12:.LANCHOR144]
+	ldr	x23, [x0, #:lo12:.LANCHOR141]
 	ldrb	w0, [x22, 9]
 	str	w0, [x29, 144]
 	ldrh	w0, [x22, 26]
 	ldr	w1, [x29, 144]
 	mul	w0, w0, w1
-	adrp	x1, .LANCHOR52
-	strb	wzr, [x1, #:lo12:.LANCHOR52]
+	adrp	x1, .LANCHOR51
+	strb	wzr, [x1, #:lo12:.LANCHOR51]
 	udiv	w1, w19, w0
 	msub	w0, w1, w0, w19
 	str	w0, [x29, 168]
@@ -13556,41 +13383,41 @@ idb_write_data:
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
 	str	x0, [x29, 112]
-.L2219:
+.L2169:
 	ldr	w0, [x29, 156]
 	cmp	w25, w0
-	bcc	.L2233
+	bcc	.L2183
 	ldr	x0, [x29, 184]
 	ldrb	w1, [x29, 136]
 	strb	w1, [x0]
 	ldr	w0, [x29, 200]
-	cbz	w0, .L2234
+	cbz	w0, .L2184
 	mov	w0, 0
 	bl	zftl_flash_exit_slc_mode
 	adrp	x0, .LANCHOR0
 	strb	wzr, [x0, #:lo12:.LANCHOR0]
-	adrp	x0, .LANCHOR19
-	strb	wzr, [x0, #:lo12:.LANCHOR19]
-.L2234:
+	adrp	x0, .LANCHOR24
+	strb	wzr, [x0, #:lo12:.LANCHOR24]
+.L2184:
 	ldr	w0, [x29, 196]
 	mov	x2, 0
 	lsl	w1, w0, 7
-	adrp	x0, .LANCHOR144
-	ldr	x0, [x0, #:lo12:.LANCHOR144]
-.L2235:
+	adrp	x0, .LANCHOR141
+	ldr	x0, [x0, #:lo12:.LANCHOR141]
+.L2185:
 	mov	w22, w2
 	cmp	w2, w1
-	bcc	.L2236
+	bcc	.L2186
 	ldr	w0, [x29, 180]
 	add	w0, w0, 1
 	str	w0, [x29, 180]
 	cmp	w0, 5
-	bls	.L2200
-	b	.L2245
-.L2192:
+	bls	.L2150
+	b	.L2195
+.L2142:
 	ldr	w0, [x29, 204]
 	cmp	w0, 3
-	beq	.L2249
+	beq	.L2199
 	cmp	w0, 2
 	mov	w0, 2
 	csel	w0, wzr, w0, ne
@@ -13599,134 +13426,134 @@ idb_write_data:
 	cmp	w0, 2
 	mov	w0, 3
 	csel	w0, wzr, w0, ne
-	b	.L2303
-.L2249:
+	b	.L2253
+.L2199:
 	ldr	w0, [x29, 204]
 	str	w0, [x29, 172]
 	mov	w0, 2
-	b	.L2303
-.L2196:
+	b	.L2253
+.L2146:
 	ldr	w5, [x21, w0, uxtw 2]
 	str	w5, [x1, 2048]
-	b	.L2197
-.L2203:
+	b	.L2147
+.L2153:
 	mov	w0, 0
 	bl	zftl_flash_exit_slc_mode
-	strb	wzr, [x10, #:lo12:.LANCHOR0]
-	strb	wzr, [x8, #:lo12:.LANCHOR19]
-	b	.L2201
-.L2253:
+	strb	wzr, [x24, #:lo12:.LANCHOR0]
+	strb	wzr, [x22, #:lo12:.LANCHOR24]
+	b	.L2151
+.L2203:
 	mov	x25, 0
 	str	w20, [x29, 196]
-	b	.L2204
-.L2218:
+	b	.L2154
+.L2168:
 	ldr	w0, [x29, 168]
-	adrp	x2, .LANCHOR19
+	adrp	x2, .LANCHOR24
 	add	w4, w0, w28
-	ldrb	w2, [x2, #:lo12:.LANCHOR19]
+	ldrb	w2, [x2, #:lo12:.LANCHOR24]
 	ubfx	x4, x4, 2, 16
 	add	w1, w4, 1
 	ldrh	w0, [x27, w1, sxtw 1]
-	cbz	w2, .L2209
+	cbz	w2, .L2159
 	adrp	x0, .LANCHOR1
 	ldrb	w7, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w1, 1
 	cmp	w7, 0
 	csel	w0, w0, w1, ne
-.L2209:
-	adrp	x1, .LANCHOR28
-	ldrb	w1, [x1, #:lo12:.LANCHOR28]
+.L2159:
+	adrp	x1, .LANCHOR27
+	ldrb	w1, [x1, #:lo12:.LANCHOR27]
 	cmp	w1, 9
-	bne	.L2211
-.L2304:
+	bne	.L2161
+.L2254:
 	str	w0, [x29, 208]
 	mov	w0, 61424
 	str	w0, [x29, 212]
 	ldrh	w0, [x27, w4, sxtw 1]
-	cbnz	w2, .L2213
+	cbnz	w2, .L2163
 	mov	w4, w0
-.L2214:
+.L2164:
 	mul	w0, w24, w4
-	cbnz	x25, .L2215
+	cbnz	x25, .L2165
 	str	w4, [x29, 152]
 	add	x2, x29, 208
 	mov	x1, x23
 	add	w0, w0, w26
-	bl	fw_flash_page_prog.constprop.30
+	bl	fw_flash_page_prog.constprop.29
 	ldr	x0, [x29, 144]
 	ldr	w4, [x29, 152]
 	ldrb	w0, [x0]
-	cbnz	w0, .L2216
+	cbnz	w0, .L2166
 	udiv	w1, w26, w24
 	add	w2, w4, 1
 	bl	id_block_prog_msb_ff_data
-.L2216:
+.L2166:
 	ldr	w0, [x29, 196]
 	add	x23, x23, 2048
 	add	w0, w0, 16
 	cmp	w28, w0
-	bcc	.L2217
+	bcc	.L2167
 	ldr	w0, [x29, 196]
 	add	w1, w0, 20
 	add	x0, x21, 2048
 	cmp	w28, w1
 	csel	x23, x0, x23, cc
-.L2217:
+.L2167:
 	add	w5, w28, 4
 	mov	x25, 0
 	and	w28, w5, 65535
-	b	.L2207
-.L2211:
+	b	.L2157
+.L2161:
 	sub	w0, w0, #1
 	lsl	w0, w0, 2
-	b	.L2304
-.L2213:
+	b	.L2254
+.L2163:
 	adrp	x0, .LANCHOR1
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w4, 1
 	cmp	w1, 0
 	csel	w4, w0, w4, ne
-	b	.L2214
-.L2215:
+	b	.L2164
+.L2165:
 	add	x2, x29, 208
 	mov	x1, x25
 	add	w0, w0, w26
-	bl	fw_flash_page_prog.constprop.30
-	b	.L2217
-.L2233:
+	bl	fw_flash_page_prog.constprop.29
+	b	.L2167
+.L2183:
 	ldr	w0, [x29, 160]
-	adrp	x1, .LANCHOR19
+	adrp	x1, .LANCHOR24
 	sub	w27, w24, w0
 	ldr	w0, [x29, 168]
-	ldrb	w1, [x1, #:lo12:.LANCHOR19]
+	ldrb	w1, [x1, #:lo12:.LANCHOR24]
 	and	w27, w27, 65535
 	add	w22, w0, w25
 	ldr	x0, [x29, 112]
 	udiv	w22, w22, w24
 	and	w22, w22, 65535
 	ldrh	w0, [x0, w22, sxtw 1]
-	cbnz	w1, .L2220
+	cbnz	w1, .L2170
 	mov	w22, w0
-.L2221:
-	adrp	x0, .LANCHOR17
+.L2171:
+	adrp	x0, .LANCHOR22
 	ldr	w1, [x29, 152]
-	ldrb	w26, [x0, #:lo12:.LANCHOR17]
+	ldrb	w26, [x0, #:lo12:.LANCHOR22]
 	ldr	w0, [x29, 160]
 	add	w0, w0, w1
 	ldr	w1, [x29, 144]
 	madd	w22, w1, w22, w0
-	adrp	x0, .LANCHOR33+9
-	ldrb	w0, [x0, #:lo12:.LANCHOR33+9]
+	adrp	x0, .LANCHOR32+9
+	ldrb	w0, [x0, #:lo12:.LANCHOR32+9]
 	udiv	w22, w22, w0
-	adrp	x0, .LANCHOR50
-	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	adrp	x0, .LANCHOR49
+	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	str	w0, [x29, 132]
 	mov	w0, w26
 	bl	nandc_bch_sel
-	adrp	x0, .LANCHOR21
-	add	x0, x0, :lo12:.LANCHOR21
+	adrp	x0, .LANCHOR26
+	add	x0, x0, :lo12:.LANCHOR26
 	str	x0, [x29, 120]
-.L2222:
+.L2172:
 	mov	w4, w24
 	add	x3, x29, 208
 	mov	x2, x23
@@ -13735,33 +13562,33 @@ idb_write_data:
 	bl	flash_read_page
 	mov	w5, w0
 	cmn	w0, #1
-	bne	.L2223
+	bne	.L2173
 	ldr	x0, [x29, 184]
 	ldrb	w6, [x0]
-	cbnz	w6, .L2224
-.L2227:
-	adrp	x0, .LANCHOR174
-	ldr	x6, [x0, #:lo12:.LANCHOR174]
-	cbnz	x6, .L2225
-.L2226:
+	cbnz	w6, .L2174
+.L2177:
+	adrp	x0, .LANCHOR171
+	ldr	x6, [x0, #:lo12:.LANCHOR171]
+	cbnz	x6, .L2175
+.L2176:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
-	cbz	w0, .L2223
+	cbz	w0, .L2173
 	mov	w4, w24
 	add	x3, x29, 208
 	mov	x2, x23
 	mov	w1, w22
 	mov	w0, 0
 	bl	flash_ddr_tuning_read
-	b	.L2305
-.L2220:
+	b	.L2255
+.L2170:
 	adrp	x0, .LANCHOR1
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w22, 1
 	cmp	w1, 0
 	csel	w22, w0, w22, ne
-	b	.L2221
-.L2224:
+	b	.L2171
+.L2174:
 	ldr	x0, [x29, 184]
 	mov	w1, w22
 	stp	w6, w5, [x29, 104]
@@ -13775,21 +13602,21 @@ idb_write_data:
 	ldr	x1, [x29, 184]
 	ldp	w6, w5, [x29, 104]
 	strb	w6, [x1]
-	beq	.L2227
-.L2305:
+	beq	.L2177
+.L2255:
 	mov	w5, w0
-.L2223:
+.L2173:
 	cmn	w5, #1
 	cset	w4, eq
 	cmp	w26, 16
 	cset	w0, ne
 	tst	w4, w0
-	beq	.L2229
+	beq	.L2179
 	mov	w0, 16
 	mov	w26, 16
 	bl	nandc_bch_sel
-	b	.L2222
-.L2225:
+	b	.L2172
+.L2175:
 	str	w5, [x29, 108]
 	mov	w4, w24
 	add	x3, x29, 208
@@ -13799,9 +13626,9 @@ idb_write_data:
 	blr	x6
 	cmn	w0, #1
 	ldr	w5, [x29, 108]
-	beq	.L2226
-	b	.L2305
-.L2229:
+	beq	.L2176
+	b	.L2255
+.L2179:
 	ldr	w0, [x29, 132]
 	bl	nandc_bch_sel
 	cmp	w4, 0
@@ -13809,93 +13636,93 @@ idb_write_data:
 	csinv	w28, w28, wzr, eq
 	cmp	w25, 0
 	ccmp	w19, w0, 0, eq
-	bne	.L2231
-	cbnz	w28, .L2231
+	bne	.L2181
+	cbnz	w28, .L2181
 	ldr	w1, [x23]
 	mov	w0, 18766
 	movk	w0, 0x464e, lsl 16
 	cmp	w1, w0
-	bne	.L2231
+	bne	.L2181
 	ldr	w0, [x29, 156]
 	ldrb	w24, [x23, 17]
 	add	w0, w0, w27
 	str	w0, [x29, 156]
-.L2232:
+.L2182:
 	add	w25, w27, w25
 	and	w25, w25, 65535
-	b	.L2219
-.L2231:
+	b	.L2169
+.L2181:
 	ubfiz	x0, x27, 9, 16
 	str	wzr, [x29, 160]
 	add	x23, x23, x0
-	b	.L2232
-.L2236:
+	b	.L2182
+.L2186:
 	ldr	w4, [x0, x2, lsl 2]
 	add	x2, x2, 1
 	add	x3, x21, x2, lsl 2
 	ldr	w3, [x3, -4]
 	cmp	w4, w3
-	beq	.L2235
+	beq	.L2185
 	mov	w2, 512
 	mov	w1, 0
 	bl	ftl_memset
 	mov	w1, w22
-	adrp	x0, .LC136
-	add	x0, x0, :lo12:.LC136
+	adrp	x0, .LC133
+	add	x0, x0, :lo12:.LC133
 	bl	printf
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_erase_block
-.L2200:
+.L2150:
 	ldr	w0, [x29, 192]
 	add	w0, w0, 1
 	str	w0, [x29, 192]
 	cmp	w0, 4
-	bne	.L2238
-.L2245:
+	bne	.L2188
+.L2195:
 	mov	w0, 0
 	bl	zftl_flash_exit_slc_mode
 	adrp	x0, .LANCHOR0
 	ldrb	w1, [x29, 176]
 	strb	w1, [x0, #:lo12:.LANCHOR0]
 	ldr	w0, [x29, 200]
-	cbz	w0, .L2239
-	adrp	x0, .LANCHOR19
+	cbz	w0, .L2189
+	adrp	x0, .LANCHOR24
 	ldrb	w1, [x29, 204]
-	strb	w1, [x0, #:lo12:.LANCHOR19]
-.L2239:
+	strb	w1, [x0, #:lo12:.LANCHOR24]
+.L2189:
 	mov	w1, 2
-	adrp	x0, .LANCHOR34
-	strb	w1, [x0, #:lo12:.LANCHOR34]
+	adrp	x0, .LANCHOR33
+	strb	w1, [x0, #:lo12:.LANCHOR33]
 	mov	w0, 0
 	bl	zftl_flash_enter_slc_mode
 	ldr	w0, [x29, 180]
-	cbnz	w0, .L2191
-	adrp	x0, .LC137
+	cbnz	w0, .L2141
+	adrp	x0, .LC134
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC137
+	add	x0, x0, :lo12:.LC134
 	bl	printf
+.L2141:
+	adrp	x0, .LANCHOR139
+	str	wzr, [x0, #:lo12:.LANCHOR139]
+	adrp	x0, .LANCHOR140
+	strb	wzr, [x0, #:lo12:.LANCHOR140]
+	adrp	x0, .LANCHOR138
+	ldr	x1, [x0, #:lo12:.LANCHOR138]
+	cbz	x1, .L2191
+	str	xzr, [x0, #:lo12:.LANCHOR138]
 .L2191:
-	adrp	x0, .LANCHOR142
-	str	wzr, [x0, #:lo12:.LANCHOR142]
-	adrp	x0, .LANCHOR143
-	strb	wzr, [x0, #:lo12:.LANCHOR143]
 	adrp	x0, .LANCHOR141
 	ldr	x1, [x0, #:lo12:.LANCHOR141]
-	cbz	x1, .L2241
+	cbz	x1, .L2193
 	str	xzr, [x0, #:lo12:.LANCHOR141]
-.L2241:
-	adrp	x0, .LANCHOR144
-	ldr	x1, [x0, #:lo12:.LANCHOR144]
-	cbz	x1, .L2243
-	str	xzr, [x0, #:lo12:.LANCHOR144]
-.L2243:
-	adrp	x0, .LANCHOR177
+.L2193:
+	adrp	x0, .LANCHOR174
 	ldr	w1, [x29, 140]
-	str	w1, [x0, #:lo12:.LANCHOR177]
-.L2247:
+	str	w1, [x0, #:lo12:.LANCHOR174]
+.L2197:
 	mov	w0, 0
-.L2178:
+.L2128:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -13913,43 +13740,43 @@ flash_start_tlc_page_prog:
 	add	x29, sp, 0
 	stp	x25, x26, [sp, 64]
 	and	w25, w0, 255
-	adrp	x0, .LANCHOR18
+	adrp	x0, .LANCHOR23
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	and	w21, w1, 255
 	stp	x23, x24, [sp, 48]
 	and	w26, w3, 255
-	ldrb	w1, [x0, #:lo12:.LANCHOR18]
+	ldrb	w1, [x0, #:lo12:.LANCHOR23]
 	and	w22, w2, 255
 	mov	w20, w4
 	mov	x23, x5
 	mov	x24, x6
 	cmp	w1, w26
 	mov	x19, x0
-	bhi	.L2308
-	adrp	x1, .LANCHOR178
+	bhi	.L2258
+	adrp	x1, .LANCHOR175
 	adrp	x0, .LC0
-	mov	w2, 859
-	add	x1, x1, :lo12:.LANCHOR178
+	mov	w2, 868
+	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2308:
-	ldrb	w0, [x19, #:lo12:.LANCHOR18]
+.L2258:
+	ldrb	w0, [x19, #:lo12:.LANCHOR23]
 	cmp	w0, w26
-	bls	.L2307
-	adrp	x0, .LANCHOR30
-	add	x0, x0, :lo12:.LANCHOR30
+	bls	.L2257
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w5, [x0, w26, sxtw]
-	adrp	x0, .LANCHOR13
-	ldr	x19, [x0, #:lo12:.LANCHOR13]
+	adrp	x0, .LANCHOR7
+	ldr	x19, [x0, #:lo12:.LANCHOR7]
 	mov	w0, w5
 	bl	nandc_cs
-	cbz	w25, .L2310
+	cbz	w25, .L2260
 	sxtw	x0, w5
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 8
 	str	w25, [x0, 8]
-.L2310:
+.L2260:
 	ubfiz	x0, x5, 8, 8
 	add	x19, x19, x0
 	mov	w0, 128
@@ -13967,11 +13794,11 @@ flash_start_tlc_page_prog:
 	sub	w0, w20, #1
 	add	w0, w0, w21
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR33+9
+	adrp	x0, .LANCHOR32+9
 	mov	x4, x24
 	mov	x3, x23
 	mov	w1, 1
-	ldrb	w2, [x0, #:lo12:.LANCHOR33+9]
+	ldrb	w2, [x0, #:lo12:.LANCHOR32+9]
 	mov	w0, w5
 	bl	nandc_xfer
 	ldp	x23, x24, [sp, 48]
@@ -13980,8 +13807,8 @@ flash_start_tlc_page_prog:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 80
-	b	nandc_de_cs.constprop.33
-.L2307:
+	b	nandc_de_cs.constprop.32
+.L2257:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -13999,25 +13826,25 @@ queue_tlc_prog_cmd:
 	stp	x21, x22, [sp, 32]
 	mov	x21, x0
 	ldr	x7, [x0]
-	adrp	x0, .LANCHOR32
+	adrp	x0, .LANCHOR31
 	mov	w22, 1
 	stp	x19, x20, [sp, 16]
-	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
 	str	x23, [sp, 48]
 	mov	w23, w1
 	sub	w2, w2, w0
 	ldr	w1, [x7, 40]
 	lsl	w19, w22, w0
-	adrp	x0, .LANCHOR37
+	adrp	x0, .LANCHOR36
 	lsl	w20, w22, w2
 	sub	w19, w19, #1
-	ldrb	w0, [x0, #:lo12:.LANCHOR37]
+	ldrb	w0, [x0, #:lo12:.LANCHOR36]
 	sub	w20, w20, #1
 	and	w20, w20, w1
 	lsr	w1, w1, w2
 	and	w19, w19, w1
 	and	w19, w19, 255
-	cbz	w0, .L2316
+	cbz	w0, .L2266
 	mov	w0, w19
 	bl	zftl_flash_exit_slc_mode
 	ldr	x0, [x21]
@@ -14049,8 +13876,8 @@ queue_tlc_prog_cmd:
 	ldr	x6, [x0, 24]
 	mov	w0, 0
 	bl	flash_start_one_pass_page_prog
-.L2317:
-	cbz	w23, .L2315
+.L2267:
+	cbz	w23, .L2265
 	ldr	x1, [x21]
 	mov	w0, 4
 	strb	w0, [x1, 58]
@@ -14058,14 +13885,14 @@ queue_tlc_prog_cmd:
 	strb	w0, [x1, 59]
 	mov	w0, -1
 	strb	w0, [x1]
-	adrp	x0, .LANCHOR60
-	add	x0, x0, :lo12:.LANCHOR60
+	adrp	x0, .LANCHOR59
+	add	x0, x0, :lo12:.LANCHOR59
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	b	buf_add_tail
-.L2316:
+.L2266:
 	ldr	x5, [x7, 8]
 	mov	w4, w20
 	ldr	x6, [x7, 24]
@@ -14095,8 +13922,8 @@ queue_tlc_prog_cmd:
 	ldr	x6, [x0, 24]
 	ldrb	w0, [x7, 60]
 	bl	flash_start_tlc_page_prog
-	b	.L2317
-.L2315:
+	b	.L2267
+.L2265:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
@@ -14114,22 +13941,22 @@ sblk_3d_tlc_dump_prog:
 	stp	x19, x20, [sp, 16]
 	mov	x20, x0
 	ldr	w1, [x0, 40]
-	adrp	x0, .LANCHOR32
+	adrp	x0, .LANCHOR31
 	stp	x21, x22, [sp, 32]
 	mov	w22, 1
-	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
 	sub	w2, w2, w0
 	lsl	w19, w22, w0
-	adrp	x0, .LANCHOR37
+	adrp	x0, .LANCHOR36
 	lsl	w21, w22, w2
 	sub	w19, w19, #1
-	ldrb	w0, [x0, #:lo12:.LANCHOR37]
+	ldrb	w0, [x0, #:lo12:.LANCHOR36]
 	sub	w21, w21, #1
 	and	w21, w21, w1
 	lsr	w1, w1, w2
 	and	w19, w19, w1
 	and	w19, w19, 255
-	cbz	w0, .L2321
+	cbz	w0, .L2271
 	mov	w0, w19
 	bl	zftl_flash_exit_slc_mode
 	ldr	x5, [x20, 8]
@@ -14158,7 +13985,7 @@ sblk_3d_tlc_dump_prog:
 	mov	w1, w22
 	mov	w0, 0
 	bl	flash_start_one_pass_page_prog
-.L2322:
+.L2272:
 	bl	nandc_wait_flash_ready
 	ldr	w0, [x20, 40]
 	mov	w1, 64
@@ -14166,7 +13993,7 @@ sblk_3d_tlc_dump_prog:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	b	flash_wait_device_ready
-.L2321:
+.L2271:
 	ldr	x5, [x20, 8]
 	mov	w4, w21
 	ldr	x6, [x20, 24]
@@ -14193,7 +14020,7 @@ sblk_3d_tlc_dump_prog:
 	mov	w1, 3
 	mov	w0, 0
 	bl	flash_start_tlc_page_prog
-	b	.L2322
+	b	.L2272
 	.size	sblk_3d_tlc_dump_prog, .-sblk_3d_tlc_dump_prog
 	.section	.text.flash_start_3d_mlc_page_prog,"ax",@progbits
 	.align	2
@@ -14204,32 +14031,32 @@ flash_start_3d_mlc_page_prog:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	and	w21, w0, 255
-	adrp	x0, .LANCHOR18
+	adrp	x0, .LANCHOR23
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	and	w24, w1, 255
-	ldrb	w1, [x0, #:lo12:.LANCHOR18]
+	ldrb	w1, [x0, #:lo12:.LANCHOR23]
 	mov	w20, w2
 	mov	x22, x3
 	mov	x23, x4
 	cmp	w1, w24
 	mov	x19, x0
-	bhi	.L2325
-	adrp	x1, .LANCHOR179
+	bhi	.L2275
+	adrp	x1, .LANCHOR176
 	adrp	x0, .LC0
-	mov	w2, 892
-	add	x1, x1, :lo12:.LANCHOR179
+	mov	w2, 903
+	add	x1, x1, :lo12:.LANCHOR176
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2325:
-	ldrb	w0, [x19, #:lo12:.LANCHOR18]
+.L2275:
+	ldrb	w0, [x19, #:lo12:.LANCHOR23]
 	cmp	w0, w24
-	bls	.L2324
-	adrp	x0, .LANCHOR30
-	add	x0, x0, :lo12:.LANCHOR30
+	bls	.L2274
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w5, [x0, w24, sxtw]
-	adrp	x0, .LANCHOR13
-	ldr	x19, [x0, #:lo12:.LANCHOR13]
+	adrp	x0, .LANCHOR7
+	ldr	x19, [x0, #:lo12:.LANCHOR7]
 	mov	w0, w5
 	bl	nandc_cs
 	ubfiz	x0, x5, 8, 8
@@ -14246,15 +14073,15 @@ flash_start_3d_mlc_page_prog:
 	str	w0, [x19, 2052]
 	mov	w0, w20
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR33+9
+	adrp	x0, .LANCHOR32+9
 	mov	x4, x23
 	mov	x3, x22
 	mov	w1, 1
-	ldrb	w2, [x0, #:lo12:.LANCHOR33+9]
+	ldrb	w2, [x0, #:lo12:.LANCHOR32+9]
 	mov	w0, w5
 	bl	nandc_xfer
 	str	w21, [x19, 2056]
-.L2324:
+.L2274:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -14272,9 +14099,9 @@ sblk_mlc_dump_prog:
 	stp	x19, x20, [sp, 16]
 	mov	x20, x0
 	ldr	w1, [x0, 40]
-	adrp	x0, .LANCHOR32
+	adrp	x0, .LANCHOR31
 	str	x21, [sp, 32]
-	ldrb	w19, [x0, #:lo12:.LANCHOR32]
+	ldrb	w19, [x0, #:lo12:.LANCHOR31]
 	mov	w0, 1
 	sub	w2, w2, w19
 	lsl	w19, w0, w19
@@ -14287,16 +14114,16 @@ sblk_mlc_dump_prog:
 	and	w19, w19, 255
 	mov	w0, w19
 	bl	zftl_flash_exit_slc_mode
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2329
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L2279
 	ldr	w2, [x20, 40]
-	adrp	x0, .LC138
+	adrp	x0, .LC135
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC138
+	add	x0, x0, :lo12:.LC135
 	add	w3, w2, 1
 	bl	printf
-.L2329:
+.L2279:
 	ldr	x3, [x20, 8]
 	mov	w2, w21
 	ldr	x4, [x20, 24]
@@ -14315,7 +14142,7 @@ sblk_mlc_dump_prog:
 	mov	w1, 64
 	bl	flash_wait_device_ready
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.33
+	bl	nandc_de_cs.constprop.32
 	ldr	x21, [sp, 32]
 	mov	w0, w2
 	ldp	x19, x20, [sp, 16]
@@ -14331,68 +14158,68 @@ flash_start_page_prog:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	and	w21, w0, 255
-	adrp	x0, .LANCHOR32
+	adrp	x0, .LANCHOR31
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
 	mov	w19, 24
-	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
 	mov	w20, 1
 	str	x27, [sp, 80]
-	adrp	x27, .LANCHOR18
+	adrp	x27, .LANCHOR23
 	sub	w25, w19, w0
 	stp	x23, x24, [sp, 48]
 	lsl	w20, w20, w0
 	sub	w20, w20, #1
 	lsr	w0, w1, w25
 	and	w20, w20, w0
-	ldrb	w0, [x27, #:lo12:.LANCHOR18]
+	ldrb	w0, [x27, #:lo12:.LANCHOR23]
 	and	w20, w20, 255
 	mov	w24, w1
 	mov	x22, x2
 	mov	x23, x3
 	cmp	w0, w20
-	bhi	.L2335
-	adrp	x1, .LANCHOR180
+	bhi	.L2285
+	adrp	x1, .LANCHOR177
 	adrp	x0, .LC0
-	mov	w2, 945
-	add	x1, x1, :lo12:.LANCHOR180
+	mov	w2, 956
+	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2335:
-	ldrb	w0, [x27, #:lo12:.LANCHOR18]
+.L2285:
+	ldrb	w0, [x27, #:lo12:.LANCHOR23]
 	cmp	w0, w20
-	bls	.L2334
-	adrp	x0, .LANCHOR30
-	add	x0, x0, :lo12:.LANCHOR30
+	bls	.L2284
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
 	mov	w19, 1
 	lsl	w19, w19, w25
 	sub	w19, w19, #1
 	ldrb	w26, [x0, w20, sxtw]
-	adrp	x0, .LANCHOR13
+	adrp	x0, .LANCHOR7
 	and	w19, w19, w24
-	ldr	x25, [x0, #:lo12:.LANCHOR13]
+	ldr	x25, [x0, #:lo12:.LANCHOR7]
 	bl	nandc_rdy_status
-	cbnz	w0, .L2337
-	ldrb	w0, [x27, #:lo12:.LANCHOR18]
+	cbnz	w0, .L2287
+	ldrb	w0, [x27, #:lo12:.LANCHOR23]
 	cmp	w0, 1
-	bne	.L2338
+	bne	.L2288
 	bl	nandc_wait_flash_ready
-.L2337:
+.L2287:
 	mov	w0, w26
 	bl	hynix_reconfig_rr_para
 	mov	w0, w26
 	bl	nandc_cs
 	tst	x24, 50331648
-	bne	.L2339
+	bne	.L2289
 	mov	w0, w19
 	bl	slc_phy_page_address_calc
 	mov	w19, w0
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L2340
+	cbz	w0, .L2290
 	mov	w0, w26
 	bl	zftl_flash_enter_slc_mode
-.L2340:
+.L2290:
 	ubfiz	x20, x26, 8, 8
 	mov	w0, 128
 	add	x20, x25, x20
@@ -14405,19 +14232,19 @@ flash_start_page_prog:
 	str	w0, [x20, 2052]
 	lsr	w0, w19, 16
 	str	w0, [x20, 2052]
-	adrp	x0, .LANCHOR31
-	ldrb	w0, [x0, #:lo12:.LANCHOR31]
-	cbz	w0, .L2341
+	adrp	x0, .LANCHOR30
+	ldrb	w0, [x0, #:lo12:.LANCHOR30]
+	cbz	w0, .L2291
 	lsr	w0, w19, 24
 	str	w0, [x20, 2052]
-.L2341:
+.L2291:
 	mov	w0, w19
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR33+9
+	adrp	x0, .LANCHOR32+9
 	mov	x4, x23
 	mov	x3, x22
 	mov	w1, 1
-	ldrb	w2, [x0, #:lo12:.LANCHOR33+9]
+	ldrb	w2, [x0, #:lo12:.LANCHOR32+9]
 	mov	w0, w26
 	bl	nandc_xfer
 	ldr	x27, [sp, 80]
@@ -14427,18 +14254,18 @@ flash_start_page_prog:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 96
-	b	nandc_de_cs.constprop.33
-.L2338:
+	b	nandc_de_cs.constprop.32
+.L2288:
 	mov	w2, 64
 	mov	w1, w19
 	mov	w0, w20
 	bl	flash_wait_device_ready_raw
-	b	.L2337
-.L2339:
+	b	.L2287
+.L2289:
 	mov	w0, w26
 	bl	zftl_flash_exit_slc_mode
-	b	.L2340
-.L2334:
+	b	.L2290
+.L2284:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -14460,16 +14287,16 @@ queue_prog_cmd:
 	mov	x19, x0
 	mov	w0, 16
 	bl	flash_start_page_prog
-	adrp	x0, .LANCHOR60
+	adrp	x0, .LANCHOR59
 	ldr	w3, [x19, 40]
-	ldrb	w1, [x0, #:lo12:.LANCHOR60]
+	ldrb	w1, [x0, #:lo12:.LANCHOR59]
 	cmp	w1, 255
-	beq	.L2350
-	adrp	x2, .LANCHOR32
+	beq	.L2300
+	adrp	x2, .LANCHOR31
 	mov	w5, 24
-	adrp	x6, .LANCHOR56
-	add	x6, x6, :lo12:.LANCHOR56
-	ldrb	w4, [x2, #:lo12:.LANCHOR32]
+	adrp	x6, .LANCHOR55
+	add	x6, x6, :lo12:.LANCHOR55
+	ldrb	w4, [x2, #:lo12:.LANCHOR31]
 	mov	w2, 1
 	mov	x8, x6
 	sub	w5, w5, w4
@@ -14478,19 +14305,19 @@ queue_prog_cmd:
 	and	w2, w2, 65535
 	asr	w3, w3, w5
 	and	w3, w3, w2
-.L2352:
+.L2302:
 	add	x7, x6, x1, lsl 6
 	ldr	w4, [x7, 40]
 	lsr	w4, w4, w5
 	and	w4, w2, w4
 	cmp	w3, w4
-	bne	.L2351
+	bne	.L2301
 	ldrb	w4, [x7, 58]
 	cmp	w4, 7
-	bne	.L2351
+	bne	.L2301
 	mov	w1, 3
 	strb	w1, [x7, 58]
-.L2350:
+.L2300:
 	mov	w1, 3
 	strb	w1, [x19, 58]
 	mov	w1, 1
@@ -14498,16 +14325,16 @@ queue_prog_cmd:
 	mov	w1, -1
 	strb	w1, [x19]
 	mov	x1, x19
-	add	x0, x0, :lo12:.LANCHOR60
+	add	x0, x0, :lo12:.LANCHOR59
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	buf_add_tail
-.L2351:
+.L2301:
 	lsl	x1, x1, 6
 	ldrb	w1, [x8, x1]
 	cmp	w1, 255
-	bne	.L2352
-	b	.L2350
+	bne	.L2302
+	b	.L2300
 	.size	queue_prog_cmd, .-queue_prog_cmd
 	.section	.text.flash_complete_plane_page_read,"ax",@progbits
 	.align	2
@@ -14519,11 +14346,11 @@ flash_complete_plane_page_read:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	mov	w24, w0
-	adrp	x0, .LANCHOR32
+	adrp	x0, .LANCHOR31
 	stp	x21, x22, [sp, 32]
 	stp	x19, x20, [sp, 16]
 	mov	w19, 1
-	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
 	mov	x20, x1
 	mov	x21, x2
 	sub	w22, w4, w0
@@ -14531,128 +14358,128 @@ flash_complete_plane_page_read:
 	sub	w19, w19, #1
 	lsr	w0, w24, w22
 	and	w19, w19, w0
-	adrp	x0, .LANCHOR18
+	adrp	x0, .LANCHOR23
 	and	w19, w19, 255
 	mov	x23, x0
-	ldrb	w1, [x0, #:lo12:.LANCHOR18]
+	ldrb	w1, [x0, #:lo12:.LANCHOR23]
 	cmp	w1, w19
-	bhi	.L2359
-	adrp	x1, .LANCHOR181
+	bhi	.L2309
+	adrp	x1, .LANCHOR178
 	adrp	x0, .LC0
-	mov	w2, 1055
-	add	x1, x1, :lo12:.LANCHOR181
+	mov	w2, 1070
+	add	x1, x1, :lo12:.LANCHOR178
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2359:
-	ldrb	w0, [x23, #:lo12:.LANCHOR18]
+.L2309:
+	ldrb	w0, [x23, #:lo12:.LANCHOR23]
 	cmp	w0, w19
-	bls	.L2370
-	adrp	x2, .LANCHOR30
-	add	x2, x2, :lo12:.LANCHOR30
-	adrp	x0, .LANCHOR13
+	bls	.L2320
+	adrp	x2, .LANCHOR29
+	add	x2, x2, :lo12:.LANCHOR29
+	adrp	x0, .LANCHOR7
 	mov	w4, 1
 	lsl	w4, w4, w22
 	sub	w4, w4, #1
 	ldrb	w8, [x2, w19, sxtw]
 	and	w4, w4, w24
-	ldr	x7, [x0, #:lo12:.LANCHOR13]
+	ldr	x7, [x0, #:lo12:.LANCHOR7]
 	ubfx	x24, x24, 24, 2
 	mov	w0, w8
 	bl	nandc_cs
-	cbnz	w24, .L2361
+	cbnz	w24, .L2311
 	mov	w0, w4
 	bl	slc_phy_page_address_calc
 	mov	w4, w0
-.L2361:
-	adrp	x0, .LANCHOR20+16
+.L2311:
+	adrp	x0, .LANCHOR25+16
 	and	x1, x8, 255
 	and	w6, w4, 255
 	lsr	w5, w4, 8
-	ldrb	w0, [x0, #:lo12:.LANCHOR20+16]
+	ldrb	w0, [x0, #:lo12:.LANCHOR25+16]
 	lsr	w3, w4, 16
-	adrp	x2, .LANCHOR31
+	adrp	x2, .LANCHOR30
 	cmp	w0, 1
-	adrp	x0, .LANCHOR16
-	bne	.L2362
+	adrp	x0, .LANCHOR21
+	bne	.L2312
 	add	x1, x7, x1, lsl 8
 	mov	w7, 6
-.L2388:
+.L2338:
 	str	w7, [x1, 2056]
 	str	wzr, [x1, 2052]
 	str	wzr, [x1, 2052]
 	str	w6, [x1, 2052]
 	str	w5, [x1, 2052]
 	str	w3, [x1, 2052]
-	ldrb	w2, [x2, #:lo12:.LANCHOR31]
-	cbz	w2, .L2384
+	ldrb	w2, [x2, #:lo12:.LANCHOR30]
+	cbz	w2, .L2334
 	lsr	w2, w4, 24
 	str	w2, [x1, 2052]
-.L2384:
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L2334:
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	mov	w2, 224
 	str	w2, [x1, 2056]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L2368
-	cbz	w24, .L2368
+	bne	.L2318
+	cbz	w24, .L2318
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbnz	w0, .L2318
 	adrp	x0, .LANCHOR36
 	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbnz	w0, .L2368
-	adrp	x0, .LANCHOR37
-	ldrb	w0, [x0, #:lo12:.LANCHOR37]
-	cbnz	w0, .L2368
+	cbnz	w0, .L2318
 	add	w4, w4, w4, lsl 1
 	sub	w0, w24, #1
 	add	w0, w4, w0
-.L2385:
+.L2335:
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR33+9
+	adrp	x0, .LANCHOR32+9
 	mov	x4, x21
 	mov	x3, x20
 	mov	w1, 0
-	ldrb	w2, [x0, #:lo12:.LANCHOR33+9]
+	ldrb	w2, [x0, #:lo12:.LANCHOR32+9]
 	mov	w0, w8
 	bl	nandc_xfer
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.33
+	bl	nandc_de_cs.constprop.32
 	mov	w0, w2
-.L2358:
+.L2308:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2362:
-	ldr	x10, [x0, #:lo12:.LANCHOR16]
+.L2312:
+	ldr	x10, [x0, #:lo12:.LANCHOR21]
 	add	x1, x7, x1, lsl 8
 	ldrb	w10, [x10, 12]
 	cmp	w10, 3
-	bne	.L2365
+	bne	.L2315
 	mov	w7, 5
-	b	.L2388
-.L2365:
+	b	.L2338
+.L2315:
 	str	wzr, [x1, 2056]
 	str	wzr, [x1, 2052]
 	str	wzr, [x1, 2052]
 	str	w6, [x1, 2052]
-	ldrb	w2, [x2, #:lo12:.LANCHOR31]
+	ldrb	w2, [x2, #:lo12:.LANCHOR30]
 	str	w5, [x1, 2052]
 	str	w3, [x1, 2052]
-	cbz	w2, .L2367
+	cbz	w2, .L2317
 	lsr	w2, w4, 24
 	str	w2, [x1, 2052]
-.L2367:
+.L2317:
 	mov	w2, 5
 	str	w2, [x1, 2056]
 	str	wzr, [x1, 2052]
 	str	wzr, [x1, 2052]
-	b	.L2384
-.L2368:
+	b	.L2334
+.L2318:
 	mov	w0, w4
-	b	.L2385
-.L2370:
+	b	.L2335
+.L2320:
 	mov	w0, -1
-	b	.L2358
+	b	.L2308
 	.size	flash_complete_plane_page_read, .-flash_complete_plane_page_read
 	.section	.text.flash_complete_page_read,"ax",@progbits
 	.align	2
@@ -14663,11 +14490,11 @@ flash_complete_page_read:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	mov	w21, w0
-	adrp	x0, .LANCHOR32
+	adrp	x0, .LANCHOR31
 	stp	x19, x20, [sp, 16]
 	mov	x22, x1
 	mov	w1, 24
-	ldrb	w20, [x0, #:lo12:.LANCHOR32]
+	ldrb	w20, [x0, #:lo12:.LANCHOR31]
 	mov	w0, 1
 	stp	x23, x24, [sp, 48]
 	mov	x23, x2
@@ -14676,73 +14503,73 @@ flash_complete_page_read:
 	lsl	w20, w0, w20
 	sub	w20, w20, #1
 	lsl	w19, w0, w1
-	adrp	x0, .LANCHOR18
+	adrp	x0, .LANCHOR23
 	lsr	w1, w21, w1
 	stp	x27, x28, [sp, 80]
 	and	w20, w20, w1
-	ldrb	w0, [x0, #:lo12:.LANCHOR18]
+	ldrb	w0, [x0, #:lo12:.LANCHOR23]
 	sub	w19, w19, #1
 	and	w20, w20, 255
 	and	w19, w19, w21
 	ubfx	x24, x21, 24, 2
 	cmp	w0, w20
-	bhi	.L2390
-	adrp	x1, .LANCHOR182
+	bhi	.L2340
+	adrp	x1, .LANCHOR179
 	adrp	x0, .LC0
-	mov	w2, 1212
-	add	x1, x1, :lo12:.LANCHOR182
+	mov	w2, 1232
+	add	x1, x1, :lo12:.LANCHOR179
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2390:
-	adrp	x0, .LANCHOR30
-	add	x0, x0, :lo12:.LANCHOR30
+.L2340:
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w25, [x0, w20, sxtw]
-	adrp	x0, .LANCHOR13
-	ldr	x4, [x0, #:lo12:.LANCHOR13]
+	adrp	x0, .LANCHOR7
+	ldr	x4, [x0, #:lo12:.LANCHOR7]
 	mov	w0, w25
 	bl	nandc_cs
-	cbnz	w24, .L2391
+	cbnz	w24, .L2341
 	mov	w0, w19
 	bl	slc_phy_page_address_calc
 	mov	w19, w0
-.L2391:
+.L2341:
+	adrp	x20, .LANCHOR32
+	add	x0, x20, :lo12:.LANCHOR32
+	ldrb	w0, [x0, 12]
+	cmp	w0, 3
+	bne	.L2342
 	ubfiz	x0, x25, 8, 8
 	mov	w1, 5
 	add	x0, x4, x0
-	adrp	x20, .LANCHOR33
 	str	w1, [x0, 2056]
-	add	x1, x20, :lo12:.LANCHOR33
+	and	w1, w19, 255
 	str	wzr, [x0, 2052]
 	str	wzr, [x0, 2052]
-	ldrb	w1, [x1, 12]
-	cmp	w1, 3
-	bne	.L2392
-	and	w1, w19, 255
 	str	w1, [x0, 2052]
 	lsr	w1, w19, 8
 	str	w1, [x0, 2052]
 	lsr	w1, w19, 16
 	str	w1, [x0, 2052]
-.L2392:
 	mov	w1, 224
 	str	w1, [x0, 2056]
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+.L2342:
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L2393
-	cbz	w24, .L2393
+	bne	.L2343
+	cbz	w24, .L2343
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbnz	w0, .L2343
 	adrp	x0, .LANCHOR36
 	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbnz	w0, .L2393
-	adrp	x0, .LANCHOR37
-	ldrb	w0, [x0, #:lo12:.LANCHOR37]
-	cbnz	w0, .L2393
+	cbnz	w0, .L2343
 	sub	w0, w24, #1
 	add	w1, w19, w19, lsl 1
 	add	w0, w0, w1
-.L2420:
-	add	x28, x20, :lo12:.LANCHOR33
+.L2370:
+	add	x28, x20, :lo12:.LANCHOR32
 	bl	nandc_set_seed
 	mov	x4, x23
 	mov	x3, x22
@@ -14751,36 +14578,36 @@ flash_complete_page_read:
 	ldrb	w2, [x28, 9]
 	bl	nandc_xfer
 	cmn	w0, #1
-	bne	.L2395
-	adrp	x26, .LANCHOR52
-	ldrb	w27, [x26, #:lo12:.LANCHOR52]
-	cbz	w27, .L2396
+	bne	.L2345
+	adrp	x26, .LANCHOR51
+	ldrb	w27, [x26, #:lo12:.LANCHOR51]
+	cbz	w27, .L2346
 	ldrb	w4, [x28, 9]
 	mov	x3, x23
-	strb	wzr, [x26, #:lo12:.LANCHOR52]
+	strb	wzr, [x26, #:lo12:.LANCHOR51]
 	mov	x2, x22
 	orr	w1, w19, w24, lsl 24
 	mov	w0, w25
 	bl	flash_read_page
-	strb	w27, [x26, #:lo12:.LANCHOR52]
-	cbnz	w24, .L2397
-.L2402:
+	strb	w27, [x26, #:lo12:.LANCHOR51]
+	cbnz	w24, .L2347
+.L2352:
 	adrp	x1, .LANCHOR0
 	ldrb	w1, [x1, #:lo12:.LANCHOR0]
-	cbz	w1, .L2397
-	adrp	x1, .LANCHOR50
-	ldrb	w1, [x1, #:lo12:.LANCHOR50]
+	cbz	w1, .L2347
+	adrp	x1, .LANCHOR49
+	ldrb	w1, [x1, #:lo12:.LANCHOR49]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	blt	.L2397
-	add	x20, x20, :lo12:.LANCHOR33
+	blt	.L2347
+	add	x20, x20, :lo12:.LANCHOR32
 	ldrb	w1, [x20, 19]
 	sub	w1, w1, #4
 	and	w1, w1, 255
 	cmp	w1, 4
 	mov	w1, 256
 	csel	w0, w0, w1, hi
-.L2389:
+.L2339:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -14788,32 +14615,32 @@ flash_complete_page_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2393:
+.L2343:
 	mov	w0, w19
-	b	.L2420
-.L2397:
+	b	.L2370
+.L2347:
 	cmn	w0, #1
-	bne	.L2389
-.L2403:
-	adrp	x0, .LANCHOR174
-	ldr	x5, [x0, #:lo12:.LANCHOR174]
-	cbnz	x5, .L2399
-.L2401:
-	adrp	x0, .LANCHOR52
+	bne	.L2339
+.L2353:
+	adrp	x0, .LANCHOR171
+	ldr	x5, [x0, #:lo12:.LANCHOR171]
+	cbnz	x5, .L2349
+.L2351:
+	adrp	x0, .LANCHOR51
 	mov	w3, -1
 	mov	w2, w21
 	mov	w1, 0
-	ldrb	w4, [x0, #:lo12:.LANCHOR52]
-	adrp	x0, .LC139
-	add	x0, x0, :lo12:.LC139
+	ldrb	w4, [x0, #:lo12:.LANCHOR51]
+	adrp	x0, .LC136
+	add	x0, x0, :lo12:.LC136
 	bl	printf
-	adrp	x0, .LANCHOR21
-	ldrb	w0, [x0, #:lo12:.LANCHOR21]
-	cbnz	w0, .L2400
+	adrp	x0, .LANCHOR26
+	ldrb	w0, [x0, #:lo12:.LANCHOR26]
+	cbnz	w0, .L2350
 	mov	w0, -1
-	b	.L2389
-.L2399:
-	add	x0, x20, :lo12:.LANCHOR33
+	b	.L2339
+.L2349:
+	add	x0, x20, :lo12:.LANCHOR32
 	mov	x3, x23
 	mov	x2, x22
 	orr	w1, w19, w24, lsl 24
@@ -14821,10 +14648,10 @@ flash_complete_page_read:
 	mov	w0, w25
 	blr	x5
 	cmn	w0, #1
-	beq	.L2401
-	b	.L2389
-.L2400:
-	add	x20, x20, :lo12:.LANCHOR33
+	beq	.L2351
+	b	.L2339
+.L2350:
+	add	x20, x20, :lo12:.LANCHOR32
 	orr	w1, w19, w24, lsl 24
 	mov	x3, x23
 	mov	x2, x22
@@ -14837,80 +14664,77 @@ flash_complete_page_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	flash_ddr_tuning_read
-.L2396:
-	cbz	w24, .L2402
-	b	.L2403
-.L2395:
-	cbnz	w24, .L2389
-	b	.L2402
+.L2346:
+	cbz	w24, .L2352
+	b	.L2353
+.L2345:
+	cbnz	w24, .L2339
+	b	.L2352
 	.size	flash_complete_page_read, .-flash_complete_page_read
 	.section	.text.queue_wait_first_req_completed,"ax",@progbits
 	.align	2
 	.type	queue_wait_first_req_completed, %function
 queue_wait_first_req_completed:
 	stp	x29, x30, [sp, -96]!
-	adrp	x0, .LANCHOR60
+	adrp	x0, .LANCHOR59
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	ldrb	w0, [x0, #:lo12:.LANCHOR60]
+	ldrb	w0, [x0, #:lo12:.LANCHOR59]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	cmp	w0, 255
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	bne	.L2422
-.L2455:
+	bne	.L2372
+.L2405:
 	mov	w21, 0
-	b	.L2421
-.L2422:
-	adrp	x19, .LANCHOR56
+	b	.L2371
+.L2372:
+	adrp	x19, .LANCHOR55
 	sxtw	x20, w0
-	add	x1, x19, :lo12:.LANCHOR56
+	add	x1, x19, :lo12:.LANCHOR55
 	add	x1, x1, x20, lsl 6
 	ldrb	w2, [x1, 58]
 	ldr	w21, [x1, 40]
 	sub	w3, w2, #1
 	cmp	w3, 10
-	bhi	.L2455
-	adrp	x1, .L2425
-	add	x1, x1, :lo12:.L2425
+	bhi	.L2405
+	adrp	x1, .L2375
+	add	x1, x1, :lo12:.L2375
 	ldrh	w1, [x1,w3,uxtw #1]
-	adr	x3, .Lrtx2425
+	adr	x3, .Lrtx2375
 	add	x1, x3, w1, sxth #2
 	br	x1
-.Lrtx2425:
+.Lrtx2375:
 	.section	.rodata.queue_wait_first_req_completed,"a",@progbits
 	.align	0
 	.align	2
-.L2425:
-	.2byte	(.L2424 - .Lrtx2425) / 4
-	.2byte	(.L2426 - .Lrtx2425) / 4
-	.2byte	(.L2427 - .Lrtx2425) / 4
-	.2byte	(.L2427 - .Lrtx2425) / 4
-	.2byte	(.L2427 - .Lrtx2425) / 4
-	.2byte	(.L2427 - .Lrtx2425) / 4
-	.2byte	(.L2428 - .Lrtx2425) / 4
-	.2byte	(.L2429 - .Lrtx2425) / 4
-	.2byte	(.L2430 - .Lrtx2425) / 4
-	.2byte	(.L2427 - .Lrtx2425) / 4
-	.2byte	(.L2430 - .Lrtx2425) / 4
+.L2375:
+	.2byte	(.L2374 - .Lrtx2375) / 4
+	.2byte	(.L2376 - .Lrtx2375) / 4
+	.2byte	(.L2377 - .Lrtx2375) / 4
+	.2byte	(.L2377 - .Lrtx2375) / 4
+	.2byte	(.L2377 - .Lrtx2375) / 4
+	.2byte	(.L2377 - .Lrtx2375) / 4
+	.2byte	(.L2378 - .Lrtx2375) / 4
+	.2byte	(.L2379 - .Lrtx2375) / 4
+	.2byte	(.L2380 - .Lrtx2375) / 4
+	.2byte	(.L2377 - .Lrtx2375) / 4
+	.2byte	(.L2380 - .Lrtx2375) / 4
 	.section	.text.queue_wait_first_req_completed
-.L2424:
-	mov	w1, 64
-	mov	w0, w21
-	bl	flash_wait_device_ready
-	tbz	x0, 6, .L2455
-	add	x0, x19, :lo12:.LANCHOR56
+.L2374:
+	bl	nandc_wait_flash_ready
+	add	x0, x19, :lo12:.LANCHOR55
 	add	x0, x0, x20, lsl 6
 	ldp	x1, x2, [x0, 8]
-	cbz	x2, .L2432
+	cbz	x2, .L2381
 	ldrb	w3, [x0, 56]
 	adrp	x0, .LANCHOR131
 	ldrb	w0, [x0, #:lo12:.LANCHOR131]
 	cmp	w3, w0
 	csel	x1, x1, x2, ne
-.L2432:
-	add	x19, x19, :lo12:.LANCHOR56
+.L2381:
+	add	x19, x19, :lo12:.LANCHOR55
 	mov	w0, w21
 	add	x20, x19, x20, lsl 6
 	ldr	x2, [x20, 24]
@@ -14921,37 +14745,34 @@ queue_wait_first_req_completed:
 	ldrb	w0, [x20, 2]
 	orr	w0, w0, 8
 	strb	w0, [x20, 2]
-	b	.L2455
-.L2426:
-	mov	w1, 64
-	mov	w0, w21
-	bl	flash_wait_device_ready
-	tbz	x0, 6, .L2455
-	add	x0, x19, :lo12:.LANCHOR56
+	b	.L2405
+.L2376:
+	bl	nandc_wait_flash_ready
+	add	x0, x19, :lo12:.LANCHOR55
 	lsl	x2, x20, 6
 	add	x1, x0, x2
 	ldrb	w21, [x0, x2]
 	add	x0, x0, x21, lsl 6
 	ldr	x24, [x0, 8]
 	ldp	x26, x0, [x1, 8]
-	cbz	x0, .L2433
+	cbz	x0, .L2382
 	ldrb	w2, [x1, 56]
 	adrp	x1, .LANCHOR131
 	ldrb	w1, [x1, #:lo12:.LANCHOR131]
 	cmp	w2, w1
 	csel	x26, x26, x0, ne
-.L2433:
-	add	x0, x19, :lo12:.LANCHOR56
+.L2382:
+	add	x0, x19, :lo12:.LANCHOR55
 	add	x0, x0, x21, lsl 6
 	ldr	x1, [x0, 16]
-	cbz	x1, .L2434
+	cbz	x1, .L2383
 	ldrb	w2, [x0, 56]
 	adrp	x0, .LANCHOR131
 	ldrb	w0, [x0, #:lo12:.LANCHOR131]
 	cmp	w2, w0
 	csel	x24, x24, x1, ne
-.L2434:
-	add	x22, x19, :lo12:.LANCHOR56
+.L2383:
+	add	x22, x19, :lo12:.LANCHOR55
 	mov	x1, x26
 	add	x27, x22, x20, lsl 6
 	add	x22, x22, x21, lsl 6
@@ -14965,20 +14786,20 @@ queue_wait_first_req_completed:
 	bl	flash_complete_plane_page_read
 	mov	w25, w0
 	cmn	w23, #1
-	beq	.L2435
+	beq	.L2384
 	ldr	w0, [x27, 36]
 	cmn	w0, #1
-	beq	.L2436
+	beq	.L2385
 	ldr	x1, [x27, 24]
 	ldr	w1, [x1, 4]
 	cmp	w0, w1
-	beq	.L2436
-.L2435:
-	adrp	x0, .LANCHOR32
-	add	x22, x19, :lo12:.LANCHOR56
+	beq	.L2385
+.L2384:
+	adrp	x0, .LANCHOR31
+	add	x22, x19, :lo12:.LANCHOR55
 	add	x22, x22, x20, lsl 6
 	mov	w5, 1
-	ldrb	w2, [x0, #:lo12:.LANCHOR32]
+	ldrb	w2, [x0, #:lo12:.LANCHOR31]
 	mov	w0, 24
 	sub	w0, w0, w2
 	ldr	x3, [x22, 24]
@@ -14996,37 +14817,37 @@ queue_wait_first_req_completed:
 	mov	w23, w0
 	ldr	w2, [x22, 36]
 	cmn	w2, #1
-	beq	.L2437
+	beq	.L2386
 	ldr	x0, [x22, 24]
 	ldr	w4, [x0, 4]
 	cmp	w2, w4
-	beq	.L2437
-	adrp	x1, .LANCHOR14
-	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 6, .L2437
+	beq	.L2386
+	adrp	x1, .LANCHOR19
+	ldr	w1, [x1, #:lo12:.LANCHOR19]
+	tbz	x1, 6, .L2386
 	ldr	w3, [x0]
-	adrp	x0, .LC140
+	adrp	x0, .LC137
 	ldr	w1, [x22, 40]
-	add	x0, x0, :lo12:.LC140
+	add	x0, x0, :lo12:.LC137
 	bl	printf
-.L2437:
-	add	x0, x19, :lo12:.LANCHOR56
+.L2386:
+	add	x0, x19, :lo12:.LANCHOR55
 	add	x0, x0, x20, lsl 6
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L2436
+	beq	.L2385
 	ldr	x0, [x0, 24]
 	ldr	w0, [x0, 4]
 	cmp	w1, w0
-	beq	.L2436
-	adrp	x1, .LANCHOR183
+	beq	.L2385
+	adrp	x1, .LANCHOR180
 	adrp	x0, .LC0
-	mov	w2, 430
-	add	x1, x1, :lo12:.LANCHOR183
+	mov	w2, 431
+	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2436:
-	add	x0, x19, :lo12:.LANCHOR56
+.L2385:
+	add	x0, x19, :lo12:.LANCHOR55
 	mov	w1, 13
 	add	x20, x0, x20, lsl 6
 	cmn	w25, #1
@@ -15035,21 +14856,21 @@ queue_wait_first_req_completed:
 	str	w23, [x20, 52]
 	orr	w1, w1, 8
 	strb	w1, [x20, 2]
-	beq	.L2438
+	beq	.L2387
 	add	x0, x0, x21, lsl 6
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L2440
+	beq	.L2389
 	ldr	x0, [x0, 24]
 	ldr	w0, [x0, 4]
 	cmp	w1, w0
-	beq	.L2440
-.L2438:
-	adrp	x0, .LANCHOR32
-	add	x20, x19, :lo12:.LANCHOR56
+	beq	.L2389
+.L2387:
+	adrp	x0, .LANCHOR31
+	add	x20, x19, :lo12:.LANCHOR55
 	add	x20, x20, x21, lsl 6
 	mov	w5, 1
-	ldrb	w2, [x0, #:lo12:.LANCHOR32]
+	ldrb	w2, [x0, #:lo12:.LANCHOR31]
 	mov	w0, 24
 	sub	w0, w0, w2
 	ldr	x3, [x20, 24]
@@ -15066,37 +14887,37 @@ queue_wait_first_req_completed:
 	bl	flash_read_page_en
 	ldr	w2, [x20, 36]
 	cmn	w2, #1
-	beq	.L2442
+	beq	.L2391
 	ldr	x0, [x20, 24]
 	ldr	w4, [x0, 4]
 	cmp	w2, w4
-	beq	.L2442
-	adrp	x1, .LANCHOR14
-	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 6, .L2442
+	beq	.L2391
+	adrp	x1, .LANCHOR19
+	ldr	w1, [x1, #:lo12:.LANCHOR19]
+	tbz	x1, 6, .L2391
 	ldr	w3, [x0]
-	adrp	x0, .LC140
+	adrp	x0, .LC137
 	ldr	w1, [x20, 40]
-	add	x0, x0, :lo12:.LC140
+	add	x0, x0, :lo12:.LC137
 	bl	printf
-.L2442:
-	add	x0, x19, :lo12:.LANCHOR56
+.L2391:
+	add	x0, x19, :lo12:.LANCHOR55
 	add	x0, x0, x21, lsl 6
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L2440
+	beq	.L2389
 	ldr	x0, [x0, 24]
 	ldr	w0, [x0, 4]
 	cmp	w1, w0
-	beq	.L2440
-	adrp	x1, .LANCHOR183
+	beq	.L2389
+	adrp	x1, .LANCHOR180
 	adrp	x0, .LC0
-	mov	w2, 449
-	add	x1, x1, :lo12:.LANCHOR183
+	mov	w2, 450
+	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2440:
-	add	x19, x19, :lo12:.LANCHOR56
+.L2389:
+	add	x19, x19, :lo12:.LANCHOR55
 	mov	w0, 13
 	add	x21, x19, x21, lsl 6
 	strb	w0, [x21, 58]
@@ -15104,17 +14925,17 @@ queue_wait_first_req_completed:
 	str	w23, [x21, 52]
 	orr	w0, w0, 8
 	strb	w0, [x21, 2]
-	b	.L2455
-.L2427:
+	b	.L2405
+.L2377:
 	mov	w0, w21
 	mov	w1, 64
 	bl	flash_wait_device_ready
 	mov	w21, w0
-	tbz	x21, 6, .L2455
+	tbz	x21, 6, .L2405
 	mov	w0, 5
 	tst	w21, w0
-	beq	.L2443
-	add	x19, x19, :lo12:.LANCHOR56
+	beq	.L2393
+	add	x19, x19, :lo12:.LANCHOR55
 	mov	w0, 12
 	add	x20, x19, x20, lsl 6
 	mov	w4, 12
@@ -15122,15 +14943,15 @@ queue_wait_first_req_completed:
 	ldrb	w1, [x20, 1]
 	ldr	w3, [x20, 40]
 	strb	w0, [x20, 58]
-	adrp	x0, .LC141
-	add	x0, x0, :lo12:.LC141
+	adrp	x0, .LC138
+	add	x0, x0, :lo12:.LC138
 	bl	printf
-.L2519:
+.L2463:
 	mov	w0, -1
 	str	w0, [x20, 52]
-	b	.L2421
-.L2443:
-	add	x21, x19, :lo12:.LANCHOR56
+	b	.L2371
+.L2393:
+	add	x21, x19, :lo12:.LANCHOR55
 	mov	w0, 13
 	add	x21, x21, x20, lsl 6
 	strb	w0, [x21, 58]
@@ -15141,60 +14962,60 @@ queue_wait_first_req_completed:
 	str	wzr, [x21, 52]
 	movk	w0, 0x444b, lsl 16
 	cmp	w1, w0
-	bne	.L2455
+	bne	.L2405
 	ldrh	w0, [x21, 50]
-	cbnz	w0, .L2455
-	adrp	x0, .LANCHOR32
+	cbnz	w0, .L2405
+	adrp	x0, .LANCHOR31
 	mov	w5, 1
-	adrp	x22, .LANCHOR175
+	adrp	x22, .LANCHOR172
 	ldr	w1, [x21, 40]
-	ldrb	w2, [x0, #:lo12:.LANCHOR32]
+	ldrb	w2, [x0, #:lo12:.LANCHOR31]
 	mov	w0, 24
-	ldr	x3, [x22, #:lo12:.LANCHOR175]
+	ldr	x3, [x22, #:lo12:.LANCHOR172]
 	sub	w0, w0, w2
 	lsl	w5, w5, w2
 	adrp	x2, .LANCHOR131
 	sub	w5, w5, #1
 	ldrb	w4, [x2, #:lo12:.LANCHOR131]
-	adrp	x2, .LANCHOR176
+	adrp	x2, .LANCHOR173
 	lsl	w6, w5, w0
-	ldr	x2, [x2, #:lo12:.LANCHOR176]
+	ldr	x2, [x2, #:lo12:.LANCHOR173]
 	lsr	w0, w1, w0
 	bic	w1, w1, w6
 	and	w0, w0, w5
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L2444
-	ldr	x1, [x22, #:lo12:.LANCHOR175]
+	beq	.L2394
+	ldr	x1, [x22, #:lo12:.LANCHOR172]
 	ldr	x2, [x21, 24]
 	ldr	w1, [x1]
 	ldr	w2, [x2]
 	cmp	w2, w1
-	beq	.L2455
-.L2444:
-	add	x19, x19, :lo12:.LANCHOR56
-	adrp	x1, .LANCHOR52
+	beq	.L2405
+.L2394:
+	add	x19, x19, :lo12:.LANCHOR55
+	adrp	x1, .LANCHOR51
 	add	x20, x19, x20, lsl 6
 	mov	w3, w0
-	ldrb	w4, [x1, #:lo12:.LANCHOR52]
-	adrp	x0, .LC142
-	add	x0, x0, :lo12:.LC142
+	ldrb	w4, [x1, #:lo12:.LANCHOR51]
+	adrp	x0, .LC139
+	add	x0, x0, :lo12:.LC139
 	ldrb	w1, [x20, 1]
 	ldr	w2, [x20, 40]
 	bl	printf
 	mov	w0, -1
 	str	w0, [x20, 52]
-	b	.L2455
-.L2430:
+	b	.L2405
+.L2380:
 	cmp	w2, 11
 	mov	w1, 3
 	mov	w5, 10
 	csel	w5, w5, w1, eq
-	adrp	x1, .LANCHOR32
+	adrp	x1, .LANCHOR31
 	mov	w4, 24
 	mov	w2, 1
-	add	x22, x19, :lo12:.LANCHOR56
-	ldrb	w3, [x1, #:lo12:.LANCHOR32]
+	add	x22, x19, :lo12:.LANCHOR55
+	ldrb	w3, [x1, #:lo12:.LANCHOR31]
 	ubfiz	x0, x0, 6, 8
 	add	x0, x22, x0
 	mov	x24, x1
@@ -15204,41 +15025,41 @@ queue_wait_first_req_completed:
 	lsr	w3, w21, w4
 	and	w3, w3, w2
 	and	w3, w3, 65535
-.L2446:
+.L2396:
 	ldrb	w1, [x0]
 	cmp	w1, 255
-	bne	.L2453
+	bne	.L2403
 	mov	w21, -1
-	b	.L2421
-.L2453:
+	b	.L2371
+.L2403:
 	sxtw	x23, w1
 	ubfiz	x0, x1, 6, 8
 	add	x1, x22, x23, lsl 6
 	add	x0, x22, x0
 	ldrb	w6, [x1, 58]
 	cmp	w6, w5
-	bne	.L2446
+	bne	.L2396
 	ldr	w1, [x1, 40]
 	lsr	w1, w1, w4
 	and	w1, w1, w2
 	cmp	w3, w1
-	bne	.L2446
+	bne	.L2396
 	mov	w0, w21
 	mov	w1, 64
 	bl	flash_wait_device_ready
 	mov	w21, w0
-	tbnz	x21, 6, .L2448
-.L2518:
+	tbnz	x21, 6, .L2398
+.L2462:
 	mov	w21, 0
-	b	.L2449
-.L2448:
+	b	.L2399
+.L2398:
 	tst	x21, 15
-	beq	.L2450
+	beq	.L2400
 	add	x22, x22, x20, lsl 6
 	mov	w2, w0
 	mov	w4, 12
-	adrp	x0, .LC143
-	add	x0, x0, :lo12:.LC143
+	adrp	x0, .LC140
+	add	x0, x0, :lo12:.LC140
 	ldrb	w1, [x22, 1]
 	ldr	w3, [x22, 40]
 	bl	printf
@@ -15246,15 +15067,15 @@ queue_wait_first_req_completed:
 	strb	w0, [x22, 58]
 	mov	w0, -1
 	str	w0, [x22, 52]
-.L2449:
-	add	x1, x19, :lo12:.LANCHOR56
+.L2399:
+	add	x1, x19, :lo12:.LANCHOR55
 	add	x20, x1, x20, lsl 6
 	add	x1, x1, x23, lsl 6
 	ldrb	w0, [x20, 58]
 	strb	w0, [x1, 58]
 	ldr	w0, [x20, 52]
 	str	w0, [x1, 52]
-.L2421:
+.L2371:
 	mov	w0, w21
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -15263,7 +15084,7 @@ queue_wait_first_req_completed:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2450:
+.L2400:
 	add	x21, x22, x20, lsl 6
 	mov	w0, 13
 	strb	w0, [x21, 58]
@@ -15274,78 +15095,78 @@ queue_wait_first_req_completed:
 	str	wzr, [x21, 52]
 	movk	w0, 0x444b, lsl 16
 	cmp	w1, w0
-	bne	.L2518
+	bne	.L2462
 	ldrh	w0, [x21, 50]
-	cbnz	w0, .L2518
-	ldrb	w2, [x24, #:lo12:.LANCHOR32]
+	cbnz	w0, .L2462
+	ldrb	w2, [x24, #:lo12:.LANCHOR31]
 	mov	w5, 1
 	mov	w0, 24
-	adrp	x22, .LANCHOR175
+	adrp	x22, .LANCHOR172
 	sub	w0, w0, w2
 	ldr	w1, [x21, 40]
 	lsl	w5, w5, w2
 	adrp	x2, .LANCHOR131
 	sub	w5, w5, #1
-	ldr	x3, [x22, #:lo12:.LANCHOR175]
+	ldr	x3, [x22, #:lo12:.LANCHOR172]
 	ldrb	w4, [x2, #:lo12:.LANCHOR131]
-	adrp	x2, .LANCHOR176
+	adrp	x2, .LANCHOR173
 	lsl	w6, w5, w0
-	ldr	x2, [x2, #:lo12:.LANCHOR176]
+	ldr	x2, [x2, #:lo12:.LANCHOR173]
 	lsr	w0, w1, w0
 	bic	w1, w1, w6
 	and	w0, w0, w5
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L2452
-	ldr	x1, [x22, #:lo12:.LANCHOR175]
+	beq	.L2402
+	ldr	x1, [x22, #:lo12:.LANCHOR172]
 	ldr	x2, [x21, 24]
 	ldr	w1, [x1]
 	ldr	w2, [x2]
 	cmp	w2, w1
-	beq	.L2518
-.L2452:
-	add	x21, x19, :lo12:.LANCHOR56
-	adrp	x1, .LANCHOR52
+	beq	.L2462
+.L2402:
+	add	x21, x19, :lo12:.LANCHOR55
+	adrp	x1, .LANCHOR51
 	add	x21, x21, x20, lsl 6
 	mov	w3, w0
-	ldrb	w4, [x1, #:lo12:.LANCHOR52]
-	adrp	x0, .LC144
-	add	x0, x0, :lo12:.LC144
+	ldrb	w4, [x1, #:lo12:.LANCHOR51]
+	adrp	x0, .LC141
+	add	x0, x0, :lo12:.LC141
 	ldrb	w1, [x21, 1]
 	ldr	w2, [x21, 40]
 	bl	printf
 	mov	w0, -1
 	str	w0, [x21, 52]
-	b	.L2518
-.L2428:
+	b	.L2462
+.L2378:
 	mov	w0, w21
 	mov	w1, 32
 	bl	flash_wait_device_ready
 	mov	w21, w0
-	tbz	x21, 5, .L2455
-	add	x19, x19, :lo12:.LANCHOR56
+	tbz	x21, 5, .L2405
+	add	x19, x19, :lo12:.LANCHOR55
 	tst	x21, 15
 	add	x20, x19, x20, lsl 6
-	beq	.L2454
+	beq	.L2404
 	mov	w0, 12
 	strb	w0, [x20, 58]
-	b	.L2519
-.L2454:
+	b	.L2463
+.L2404:
 	mov	w0, 13
 	str	wzr, [x20, 52]
 	strb	w0, [x20, 58]
-	b	.L2455
-.L2429:
+	b	.L2405
+.L2379:
 	mov	w1, 64
 	mov	w0, w21
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L2455
-	add	x19, x19, :lo12:.LANCHOR56
+	tbz	x0, 6, .L2405
+	add	x19, x19, :lo12:.LANCHOR55
 	add	x19, x19, x20, lsl 6
 	str	w0, [x19, 52]
 	mov	w0, 7
 	strb	w0, [x19, 58]
-	b	.L2455
+	b	.L2405
 	.size	queue_wait_first_req_completed, .-queue_wait_first_req_completed
 	.section	.text.sblk_prog_page,"ax",@progbits
 	.align	2
@@ -15362,24 +15183,24 @@ sblk_prog_page:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbz	w0, .L2521
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2521
+	cbz	w0, .L2465
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 8, .L2465
 	ldr	w1, [x19, 40]
-	adrp	x0, .LC145
+	adrp	x0, .LC142
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC145
+	add	x0, x0, :lo12:.LC142
 	bl	printf
-.L2521:
-	adrp	x23, .LANCHOR45
-	adrp	x25, .LANCHOR32
-	add	x23, x23, :lo12:.LANCHOR45
-	add	x26, x25, :lo12:.LANCHOR32
+.L2465:
+	adrp	x23, .LANCHOR44
+	adrp	x25, .LANCHOR31
+	add	x23, x23, :lo12:.LANCHOR44
+	add	x26, x25, :lo12:.LANCHOR31
 	mov	w21, 0
-.L2522:
-	cbnz	w20, .L2533
-.L2549:
+.L2466:
+	cbnz	w20, .L2477
+.L2493:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -15388,38 +15209,38 @@ sblk_prog_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2533:
+.L2477:
 	ldrb	w24, [x19]
 	ldr	w22, [x19, 40]
-.L2523:
+.L2467:
 	mov	w1, 1
 	mov	w0, w22
 	bl	queue_lun_state
-	cbnz	w0, .L2524
+	cbnz	w0, .L2468
 	cmp	w20, 1
-	beq	.L2525
+	beq	.L2469
 	ldrb	w0, [x23]
-	cbz	w0, .L2525
-	adrp	x0, .LANCHOR37
-	ldrb	w0, [x0, #:lo12:.LANCHOR37]
-	cbz	w0, .L2526
-.L2525:
+	cbz	w0, .L2469
+	adrp	x0, .LANCHOR36
+	ldrb	w0, [x0, #:lo12:.LANCHOR36]
+	cbz	w0, .L2470
+.L2469:
 	mov	x0, x19
 	bl	queue_prog_cmd
-.L2527:
+.L2471:
 	subs	w20, w20, #1
-	beq	.L2549
+	beq	.L2493
 	ubfiz	x24, x24, 6, 8
-	adrp	x19, .LANCHOR56
-	add	x19, x19, :lo12:.LANCHOR56
+	adrp	x19, .LANCHOR55
+	add	x19, x19, :lo12:.LANCHOR55
 	add	x19, x19, x24
-	b	.L2522
-.L2524:
+	b	.L2466
+.L2468:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2523
-.L2526:
-	ldrb	w1, [x25, #:lo12:.LANCHOR32]
+	b	.L2467
+.L2470:
+	ldrb	w1, [x25, #:lo12:.LANCHOR31]
 	mov	w27, 24
 	mov	w0, 1
 	sub	w27, w27, w1
@@ -15430,17 +15251,17 @@ sblk_prog_page:
 	ldrb	w0, [x19]
 	and	w27, w27, 65535
 	cmp	w0, 255
-	bne	.L2528
-	adrp	x1, .LANCHOR184
+	bne	.L2472
+	adrp	x1, .LANCHOR181
 	adrp	x0, .LC0
-	mov	w2, 696
-	add	x1, x1, :lo12:.LANCHOR184
+	mov	w2, 697
+	add	x1, x1, :lo12:.LANCHOR181
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2528:
+.L2472:
 	ldrb	w0, [x19]
-	adrp	x1, .LANCHOR56
-	add	x1, x1, :lo12:.LANCHOR56
+	adrp	x1, .LANCHOR55
+	add	x1, x1, :lo12:.LANCHOR55
 	mov	w3, 24
 	mov	w28, 1
 	add	x0, x1, x0, lsl 6
@@ -15452,11 +15273,11 @@ sblk_prog_page:
 	lsr	w1, w4, w3
 	and	w0, w0, w1
 	cmp	w27, w0, uxth
-	bne	.L2529
+	bne	.L2473
+	adrp	x0, .LANCHOR74
+	ldrh	w2, [x0, #:lo12:.LANCHOR74]
 	adrp	x0, .LANCHOR75
-	ldrh	w2, [x0, #:lo12:.LANCHOR75]
-	adrp	x0, .LANCHOR76
-	ldrb	w1, [x0, #:lo12:.LANCHOR76]
+	ldrb	w1, [x0, #:lo12:.LANCHOR75]
 	sub	w0, w3, w2
 	lsr	w5, w22, w2
 	sub	w3, w1, #1
@@ -15474,9 +15295,9 @@ sblk_prog_page:
 	cmp	w5, w0
 	and	w1, w1, w4
 	ccmp	w22, w1, 0, ne
-	bne	.L2529
+	bne	.L2473
 	cmp	w21, w3
-	beq	.L2529
+	beq	.L2473
 	ldr	w1, [x19, 40]
 	mov	w0, 17
 	ldr	x2, [x19, 8]
@@ -15489,15 +15310,15 @@ sblk_prog_page:
 	mov	w0, -1
 	strb	w0, [x19]
 	mov	x1, x19
-	adrp	x0, .LANCHOR60
-	add	x0, x0, :lo12:.LANCHOR60
+	adrp	x0, .LANCHOR59
+	add	x0, x0, :lo12:.LANCHOR59
 	bl	buf_add_tail
-	b	.L2527
-.L2529:
+	b	.L2471
+.L2473:
 	mov	x0, x19
 	mov	w21, 0
 	bl	queue_prog_cmd
-	b	.L2527
+	b	.L2471
 	.size	sblk_prog_page, .-sblk_prog_page
 	.section	.text.sblk_wait_write_queue_completed,"ax",@progbits
 	.align	2
@@ -15507,19 +15328,19 @@ sblk_wait_write_queue_completed:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR60
-	add	x19, x19, :lo12:.LANCHOR60
-.L2552:
+	adrp	x19, .LANCHOR59
+	add	x19, x19, :lo12:.LANCHOR59
+.L2496:
 	ldrb	w0, [x19]
 	cmp	w0, 255
-	bne	.L2553
+	bne	.L2497
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2553:
+.L2497:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2552
+	b	.L2496
 	.size	sblk_wait_write_queue_completed, .-sblk_wait_write_queue_completed
 	.section	.text.ftl_flush,"ax",@progbits
 	.align	2
@@ -15532,17 +15353,17 @@ ftl_flush:
 	ldrb	w1, [x0, #:lo12:.LANCHOR129]
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	adrp	x20, .LANCHOR185
-	cbz	w1, .L2556
-	ldrb	w2, [x20, #:lo12:.LANCHOR185]
-	adrp	x0, .LANCHOR56
-	add	x0, x0, :lo12:.LANCHOR56
+	adrp	x20, .LANCHOR182
+	cbz	w1, .L2500
+	ldrb	w2, [x20, #:lo12:.LANCHOR182]
+	adrp	x0, .LANCHOR55
+	add	x0, x0, :lo12:.LANCHOR55
 	add	x0, x0, x2, lsl 6
 	bl	sblk_prog_page
-.L2556:
+.L2500:
 	mov	w0, -1
 	strb	wzr, [x19, #:lo12:.LANCHOR129]
-	strb	w0, [x20, #:lo12:.LANCHOR185]
+	strb	w0, [x20, #:lo12:.LANCHOR182]
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	ldp	x19, x20, [sp, 16]
@@ -15587,11 +15408,11 @@ ftl_read_ppa_page:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w20, w0
-	adrp	x0, .LANCHOR32
+	adrp	x0, .LANCHOR31
 	mov	w19, 24
 	stp	x21, x22, [sp, 32]
 	mov	x21, x1
-	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
 	mov	x22, x2
 	str	x23, [sp, 48]
 	mov	w23, w3
@@ -15625,21 +15446,21 @@ sblk_read_page:
 	stp	x27, x28, [sp, 80]
 	mov	w21, w22
 	stp	x19, x20, [sp, 16]
-	adrp	x27, .LANCHOR32
+	adrp	x27, .LANCHOR31
 	stp	x23, x24, [sp, 48]
 	mov	x19, x0
 	stp	x25, x26, [sp, 64]
 	mov	x23, x0
-	adrp	x25, .LANCHOR186
-	add	x28, x27, :lo12:.LANCHOR32
-	add	x25, x25, :lo12:.LANCHOR186
-.L2566:
-	cbnz	w21, .L2576
-.L2589:
-	adrp	x19, .LANCHOR56
-	add	x19, x19, :lo12:.LANCHOR56
-.L2577:
-	cbnz	w22, .L2579
+	adrp	x25, .LANCHOR183
+	add	x28, x27, :lo12:.LANCHOR31
+	add	x25, x25, :lo12:.LANCHOR183
+.L2510:
+	cbnz	w21, .L2520
+.L2533:
+	adrp	x19, .LANCHOR55
+	add	x19, x19, :lo12:.LANCHOR55
+.L2521:
+	cbnz	w22, .L2523
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -15648,28 +15469,28 @@ sblk_read_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2576:
+.L2520:
 	ldrb	w24, [x19]
 	ldr	w26, [x19, 40]
-.L2567:
+.L2511:
 	mov	w1, 0
 	mov	w0, w26
 	bl	queue_lun_state
-	cbnz	w0, .L2568
+	cbnz	w0, .L2512
 	cmp	w21, 1
-	beq	.L2573
+	beq	.L2517
 	ldrb	w0, [x25]
-	cbnz	w0, .L2570
-.L2573:
+	cbnz	w0, .L2514
+.L2517:
 	mov	x0, x19
 	bl	queue_read_cmd
-	b	.L2571
-.L2568:
+	b	.L2515
+.L2512:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2567
-.L2570:
-	ldrb	w1, [x27, #:lo12:.LANCHOR32]
+	b	.L2511
+.L2514:
+	ldrb	w1, [x27, #:lo12:.LANCHOR31]
 	mov	w20, 24
 	mov	w0, 1
 	sub	w20, w20, w1
@@ -15680,17 +15501,17 @@ sblk_read_page:
 	ldrb	w0, [x19]
 	and	w20, w20, 65535
 	cmp	w0, 255
-	bne	.L2572
-	adrp	x1, .LANCHOR187
+	bne	.L2516
+	adrp	x1, .LANCHOR184
 	adrp	x0, .LC0
-	mov	w2, 781
-	add	x1, x1, :lo12:.LANCHOR187
+	mov	w2, 782
+	add	x1, x1, :lo12:.LANCHOR184
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2572:
+.L2516:
 	ldrb	w4, [x19]
-	adrp	x2, .LANCHOR56
-	add	x2, x2, :lo12:.LANCHOR56
+	adrp	x2, .LANCHOR55
+	add	x2, x2, :lo12:.LANCHOR55
 	ldrb	w7, [x28]
 	mov	w0, 24
 	mov	w3, 1
@@ -15703,18 +15524,18 @@ sblk_read_page:
 	lsr	w0, w1, w0
 	and	w0, w0, w3
 	cmp	w20, w0, uxth
-	bne	.L2573
+	bne	.L2517
 	adrp	x0, .LANCHOR111
 	ldrh	w0, [x0, #:lo12:.LANCHOR111]
 	add	w26, w0, w26
 	cmp	w1, w26
-	bne	.L2573
+	bne	.L2517
 	ldr	w0, [x19, 40]
 	mov	w26, -1
 	ldrb	w24, [x2, x5]
-	adrp	x20, .LANCHOR60
+	adrp	x20, .LANCHOR59
 	stp	x6, x5, [x29, 96]
-	add	x20, x20, :lo12:.LANCHOR60
+	add	x20, x20, :lo12:.LANCHOR59
 	str	x2, [x29, 112]
 	sub	w21, w21, #1
 	str	w4, [x29, 120]
@@ -15737,28 +15558,28 @@ sblk_read_page:
 	ubfiz	x1, x4, 6, 8
 	add	x1, x2, x1
 	bl	buf_add_tail
-.L2571:
+.L2515:
 	subs	w21, w21, #1
-	beq	.L2589
+	beq	.L2533
 	ubfiz	x24, x24, 6, 8
-	adrp	x19, .LANCHOR56
-	add	x19, x19, :lo12:.LANCHOR56
+	adrp	x19, .LANCHOR55
+	add	x19, x19, :lo12:.LANCHOR55
 	add	x19, x19, x24
-	b	.L2566
-.L2579:
+	b	.L2510
+.L2523:
 	ldrb	w0, [x23, 58]
 	cmp	w0, 13
-	bne	.L2578
+	bne	.L2522
 	ldrb	w0, [x23]
 	sub	w22, w22, #1
 	cmp	w0, 255
-	beq	.L2578
+	beq	.L2522
 	ubfiz	x23, x0, 6, 8
 	add	x23, x19, x23
-.L2578:
+.L2522:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2577
+	b	.L2521
 	.size	sblk_read_page, .-sblk_read_page
 	.section	.text.gc_check_data_one_wl,"ax",@progbits
 	.align	2
@@ -15769,112 +15590,112 @@ gc_check_data_one_wl:
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x19, x20, [sp, 32]
-	adrp	x19, .LANCHOR71
+	adrp	x19, .LANCHOR70
 	stp	x21, x22, [sp, 48]
-	add	x22, x19, :lo12:.LANCHOR71
-	adrp	x20, .LANCHOR10
+	add	x22, x19, :lo12:.LANCHOR70
+	adrp	x20, .LANCHOR12
 	stp	x23, x24, [sp, 64]
 	stp	x25, x26, [sp, 80]
 	ldr	x0, [x22, 8]
 	stp	x27, x28, [sp, 96]
-	ldr	x21, [x20, #:lo12:.LANCHOR10]
-	cbnz	x0, .L2592
+	ldr	x21, [x20, #:lo12:.LANCHOR12]
+	cbnz	x0, .L2536
 	mov	w0, 1
 	bl	buf_alloc
 	str	x0, [x22, 8]
-.L2592:
-	add	x0, x19, :lo12:.LANCHOR71
+.L2536:
+	add	x0, x19, :lo12:.LANCHOR70
 	ldr	x22, [x0, 8]
-	cbnz	x22, .L2593
-	adrp	x1, .LANCHOR188
+	cbnz	x22, .L2537
+	adrp	x1, .LANCHOR185
 	adrp	x0, .LC0
 	mov	w2, 729
-	add	x1, x1, :lo12:.LANCHOR188
+	add	x1, x1, :lo12:.LANCHOR185
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2593:
+.L2537:
 	adrp	x27, .LANCHOR111
-	adrp	x28, .LANCHOR79
+	adrp	x28, .LANCHOR78
 	add	x26, x21, 96
 	add	x27, x27, :lo12:.LANCHOR111
-	add	x28, x28, :lo12:.LANCHOR79
+	add	x28, x28, :lo12:.LANCHOR78
 	mov	w25, 0
-.L2594:
+.L2538:
 	ldrb	w0, [x21, 89]
 	cmp	w25, w0
-	bge	.L2605
+	bge	.L2549
 	mov	w24, 1
-	add	x23, x19, :lo12:.LANCHOR71
-	b	.L2606
-.L2604:
+	add	x23, x19, :lo12:.LANCHOR70
+	b	.L2550
+.L2548:
 	ldrh	w0, [x26]
 	ldrh	w2, [x27]
 	ldrb	w1, [x28]
 	cmp	w1, 2
 	mul	w2, w0, w2
-	beq	.L2595
-	adrp	x0, .LANCHOR36
-	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbz	w0, .L2596
-.L2595:
+	beq	.L2539
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbz	w0, .L2540
+.L2539:
 	ldrh	w0, [x23, 16]
 	sub	w3, w0, #1
 	add	w0, w24, w2
 	add	w0, w3, w0
 	orr	w1, w0, w1, lsl 24
 	str	w1, [x22, 40]
-.L2597:
+.L2541:
 	mov	w1, 1
 	mov	x0, x22
 	bl	sblk_read_page
 	ldr	w2, [x22, 52]
-	adrp	x1, .LANCHOR162
+	adrp	x1, .LANCHOR159
 	cmn	w2, #1
-	beq	.L2600
+	beq	.L2544
 	ldrh	w0, [x23, 22]
-	ldr	x4, [x1, #:lo12:.LANCHOR162]
+	ldr	x4, [x1, #:lo12:.LANCHOR159]
 	ldr	x3, [x22, 24]
 	lsl	x0, x0, 2
 	ldr	w5, [x4, x0]
 	ldr	w4, [x3, 4]
 	cmp	w5, w4
-	bne	.L2600
-	adrp	x4, .LANCHOR163
-	ldr	x4, [x4, #:lo12:.LANCHOR163]
+	bne	.L2544
+	adrp	x4, .LANCHOR160
+	ldr	x4, [x4, #:lo12:.LANCHOR160]
 	ldr	w4, [x4, x0]
 	ldr	w0, [x3, 8]
 	cmp	w4, w0
-	beq	.L2601
-.L2600:
+	beq	.L2545
+.L2544:
 	ldrh	w0, [x23, 22]
-	ldr	x1, [x1, #:lo12:.LANCHOR162]
+	ldr	x1, [x1, #:lo12:.LANCHOR159]
 	lsl	x0, x0, 2
 	ldr	w3, [x1, x0]
 	cmn	w3, #1
-	beq	.L2601
-	adrp	x1, .LANCHOR14
-	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 10, .L2602
+	beq	.L2545
+	adrp	x1, .LANCHOR19
+	ldr	w1, [x1, #:lo12:.LANCHOR19]
+	tbz	x1, 10, .L2546
 	ldr	x1, [x22, 24]
-	adrp	x4, .LANCHOR163
-	ldr	x4, [x4, #:lo12:.LANCHOR163]
+	adrp	x4, .LANCHOR160
+	ldr	x4, [x4, #:lo12:.LANCHOR160]
 	ldr	w5, [x1, 12]
 	str	w5, [sp]
 	ldr	w4, [x4, x0]
-	adrp	x0, .LC146
+	adrp	x0, .LC143
 	ldp	w5, w6, [x1]
-	add	x0, x0, :lo12:.LC146
+	add	x0, x0, :lo12:.LC143
 	ldr	w7, [x1, 8]
 	ldr	w1, [x22, 40]
 	bl	printf
-.L2602:
+.L2546:
 	adrp	x0, .LANCHOR124
 	ldrh	w1, [x21, 80]
 	ldrb	w2, [x0, #:lo12:.LANCHOR124]
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	strh	wzr, [x0, x1, lsl 1]
-	ldr	x1, [x20, #:lo12:.LANCHOR10]
+	ldr	x1, [x20, #:lo12:.LANCHOR12]
 	ldr	w0, [x1, 556]
 	add	w0, w0, 1
 	str	w0, [x1, 556]
@@ -15884,16 +15705,16 @@ gc_check_data_one_wl:
 	mov	w0, 20041
 	movk	w0, 0x444b, lsl 16
 	cmp	w1, w0
-	bne	.L2609
-	cbnz	w2, .L2609
-	adrp	x0, .LANCHOR81
-	ldrb	w0, [x0, #:lo12:.LANCHOR81]
-	cbnz	w0, .L2609
+	bne	.L2553
+	cbnz	w2, .L2553
+	adrp	x0, .LANCHOR80
+	ldrb	w0, [x0, #:lo12:.LANCHOR80]
+	cbnz	w0, .L2553
 	ldr	w0, [x22, 40]
 	bl	ftl_mask_bad_block
-.L2609:
+.L2553:
 	mov	w0, -1
-.L2591:
+.L2535:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -15902,54 +15723,54 @@ gc_check_data_one_wl:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 112
 	ret
-.L2596:
+.L2540:
 	cmp	w1, 3
 	ldrh	w0, [x23, 16]
-	bne	.L2598
-	adrp	x1, .LANCHOR37
-	ldrb	w1, [x1, #:lo12:.LANCHOR37]
-	cbz	w1, .L2599
+	bne	.L2542
+	adrp	x1, .LANCHOR36
+	ldrb	w1, [x1, #:lo12:.LANCHOR36]
+	cbz	w1, .L2543
 	add	w0, w0, w0, lsl 1
 	sub	w1, w0, #1
 	add	w0, w24, w2
 	add	w0, w1, w0
 	orr	w0, w0, 50331648
-.L2624:
+.L2568:
 	str	w0, [x22, 40]
-	b	.L2597
-.L2599:
+	b	.L2541
+.L2543:
 	add	w0, w0, w2
 	orr	w0, w0, w24, lsl 24
-	b	.L2624
-.L2598:
+	b	.L2568
+.L2542:
 	add	w0, w0, w2
-	b	.L2624
-.L2601:
+	b	.L2568
+.L2545:
 	ldrh	w0, [x23, 22]
 	add	w24, w24, 1
 	add	w0, w0, 1
 	strh	w0, [x23, 22]
-.L2606:
+.L2550:
 	ldrh	w0, [x23, 20]
 	cmp	w24, w0
-	ble	.L2604
+	ble	.L2548
 	add	w25, w25, 1
 	add	x26, x26, 2
-	b	.L2594
-.L2605:
-	add	x19, x19, :lo12:.LANCHOR71
+	b	.L2538
+.L2549:
+	add	x19, x19, :lo12:.LANCHOR70
 	ldrh	w0, [x19, 16]
 	add	w1, w0, 1
 	strh	w1, [x19, 16]
-	adrp	x1, .LANCHOR81
-	ldrb	w1, [x1, #:lo12:.LANCHOR81]
-	cbz	w1, .L2610
+	adrp	x1, .LANCHOR80
+	ldrb	w1, [x1, #:lo12:.LANCHOR80]
+	cbz	w1, .L2554
 	add	w0, w0, 2
 	strh	w0, [x19, 16]
-.L2610:
-.L2603:
+.L2554:
+.L2547:
 	mov	w0, 0
-	b	.L2591
+	b	.L2535
 	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
 	.section	.text.sblk_tlc_prog_one_page,"ax",@progbits
 	.align	2
@@ -15962,11 +15783,11 @@ sblk_tlc_prog_one_page:
 	mov	x19, x0
 	ldr	x0, [x0]
 	ldr	w20, [x0, 40]
-.L2626:
+.L2570:
 	mov	w1, 1
 	mov	w0, w20
 	bl	queue_lun_state
-	cbnz	w0, .L2627
+	cbnz	w0, .L2571
 	mov	x0, x19
 	mov	w1, 1
 	bl	queue_tlc_prog_cmd
@@ -15974,10 +15795,10 @@ sblk_tlc_prog_one_page:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2627:
+.L2571:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2626
+	b	.L2570
 	.size	sblk_tlc_prog_one_page, .-sblk_tlc_prog_one_page
 	.section	.text.sblk_xlc_prog_pages,"ax",@progbits
 	.align	2
@@ -15995,37 +15816,37 @@ sblk_xlc_prog_pages:
 	mov	w24, w2
 	ldr	w19, [x0, 40]
 	str	x25, [sp, 64]
-.L2630:
+.L2574:
 	mov	w1, 1
 	mov	w0, w19
 	bl	queue_lun_state
-	cbnz	w0, .L2631
+	cbnz	w0, .L2575
 	cmp	w24, 2
-	bne	.L2632
-	adrp	x0, .LANCHOR45
+	bne	.L2576
+	adrp	x0, .LANCHOR44
 	ldr	x3, [x22]
-	ldrb	w0, [x0, #:lo12:.LANCHOR45]
-	cbz	w0, .L2633
-	adrp	x0, .LANCHOR32
+	ldrb	w0, [x0, #:lo12:.LANCHOR44]
+	cbz	w0, .L2577
+	adrp	x0, .LANCHOR31
 	ldr	x7, [x20]
 	mov	w25, 1
 	mov	w2, 24
-	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
 	ldr	w3, [x3, 40]
 	sub	w2, w2, w0
 	ldr	w1, [x7, 40]
 	lsl	w19, w25, w0
-	adrp	x0, .LANCHOR37
+	adrp	x0, .LANCHOR36
 	lsl	w21, w25, w2
 	sub	w19, w19, #1
-	ldrb	w0, [x0, #:lo12:.LANCHOR37]
+	ldrb	w0, [x0, #:lo12:.LANCHOR36]
 	sub	w21, w21, #1
 	and	w23, w1, w21
 	lsr	w1, w1, w2
 	and	w19, w19, w1
 	and	w21, w21, w3
 	and	w19, w19, 255
-	cbz	w0, .L2634
+	cbz	w0, .L2578
 	mov	w0, w19
 	bl	zftl_flash_exit_slc_mode
 	ldr	x0, [x20]
@@ -16087,7 +15908,7 @@ sblk_xlc_prog_pages:
 	ldr	x6, [x0, 24]
 	mov	w0, 0
 	bl	flash_start_one_pass_page_prog
-.L2635:
+.L2579:
 	ldr	x1, [x20]
 	mov	w0, 5
 	strb	w0, [x1, 58]
@@ -16095,10 +15916,10 @@ sblk_xlc_prog_pages:
 	strb	w0, [x1, 59]
 	mov	w0, -1
 	strb	w0, [x1]
-	adrp	x0, .LANCHOR60
-	add	x0, x0, :lo12:.LANCHOR60
+	adrp	x0, .LANCHOR59
+	add	x0, x0, :lo12:.LANCHOR59
 	bl	buf_add_tail
-.L2636:
+.L2580:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -16106,11 +15927,11 @@ sblk_xlc_prog_pages:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2631:
+.L2575:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2630
-.L2634:
+	b	.L2574
+.L2578:
 	ldr	x5, [x7, 8]
 	mov	w4, w23
 	ldr	x6, [x7, 24]
@@ -16173,37 +15994,37 @@ sblk_xlc_prog_pages:
 	ldr	x6, [x0, 24]
 	ldrb	w0, [x7, 60]
 	bl	flash_start_tlc_page_prog
-	b	.L2635
-.L2633:
+	b	.L2579
+.L2577:
 	ldr	w19, [x3, 40]
-.L2637:
+.L2581:
 	mov	w1, 1
 	mov	w0, w19
 	bl	queue_lun_state
-	cbnz	w0, .L2638
+	cbnz	w0, .L2582
 	mov	w1, 1
 	mov	x0, x20
 	bl	queue_tlc_prog_cmd
 	mov	w1, 0
 	mov	x0, x22
 	bl	queue_tlc_prog_cmd
-.L2639:
+.L2583:
 	mov	w1, 1
 	mov	w0, w19
 	bl	queue_lun_state
-	cbz	w0, .L2636
+	cbz	w0, .L2580
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2639
-.L2638:
+	b	.L2583
+.L2582:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2637
-.L2632:
+	b	.L2581
+.L2576:
 	mov	w1, 1
 	mov	x0, x20
 	bl	queue_tlc_prog_cmd
-	b	.L2636
+	b	.L2580
 	.size	sblk_xlc_prog_pages, .-sblk_xlc_prog_pages
 	.section	.text.sblk_3d_mlc_prog_pages,"ax",@progbits
 	.align	2
@@ -16217,17 +16038,17 @@ sblk_3d_mlc_prog_pages:
 	stp	x21, x22, [sp, 32]
 	add	x21, x0, x1
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR32
-	adrp	x24, .LANCHOR60
+	adrp	x23, .LANCHOR31
+	adrp	x24, .LANCHOR59
 	str	x25, [sp, 64]
-	add	x23, x23, :lo12:.LANCHOR32
-	add	x24, x24, :lo12:.LANCHOR60
+	add	x23, x23, :lo12:.LANCHOR31
+	add	x24, x24, :lo12:.LANCHOR59
 	add	x25, x0, 8
 	stp	x19, x20, [sp, 16]
 	mov	w22, 1
-.L2643:
+.L2587:
 	cmp	x21, x25
-	bne	.L2646
+	bne	.L2590
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -16235,14 +16056,14 @@ sblk_3d_mlc_prog_pages:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2646:
+.L2590:
 	ldr	x0, [x25, -8]
 	ldr	w19, [x0, 40]
-.L2644:
+.L2588:
 	mov	w1, 1
 	mov	w0, w19
 	bl	queue_lun_state
-	cbnz	w0, .L2645
+	cbnz	w0, .L2589
 	ldr	x0, [x25, -8]
 	mov	w2, 24
 	ldrb	w1, [x23]
@@ -16274,7 +16095,7 @@ sblk_3d_mlc_prog_pages:
 	ldr	x4, [x0, 24]
 	mov	w0, 16
 	bl	flash_start_3d_mlc_page_prog
-	bl	nandc_de_cs.constprop.33
+	bl	nandc_de_cs.constprop.32
 	ldr	x1, [x25, -24]
 	mov	w0, 4
 	strb	w22, [x1, 59]
@@ -16283,11 +16104,11 @@ sblk_3d_mlc_prog_pages:
 	strb	w0, [x1]
 	mov	x0, x24
 	bl	buf_add_tail
-	b	.L2643
-.L2645:
+	b	.L2587
+.L2589:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2644
+	b	.L2588
 	.size	sblk_3d_mlc_prog_pages, .-sblk_3d_mlc_prog_pages
 	.section	.text.flash_prog_page_en,"ax",@progbits
 	.align	2
@@ -16301,63 +16122,63 @@ flash_prog_page_en:
 	and	w0, w5, 255
 	stp	x19, x20, [sp, 16]
 	str	w0, [x29, 124]
-	adrp	x0, .LANCHOR18
+	adrp	x0, .LANCHOR23
 	stp	x23, x24, [sp, 48]
 	mov	w20, w1
 	stp	x27, x28, [sp, 80]
 	mov	x23, x2
-	ldrb	w1, [x0, #:lo12:.LANCHOR18]
+	ldrb	w1, [x0, #:lo12:.LANCHOR23]
 	mov	x22, x3
 	stp	x25, x26, [sp, 64]
 	mov	w28, w4
 	ubfx	x24, x20, 24, 2
 	cmp	w1, w21
 	mov	x19, x0
-	bhi	.L2649
-	adrp	x1, .LANCHOR189
+	bhi	.L2593
+	adrp	x1, .LANCHOR186
 	adrp	x0, .LC0
-	mov	w2, 635
-	add	x1, x1, :lo12:.LANCHOR189
+	mov	w2, 642
+	add	x1, x1, :lo12:.LANCHOR186
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2649:
-	ldrb	w0, [x19, #:lo12:.LANCHOR18]
+.L2593:
+	ldrb	w0, [x19, #:lo12:.LANCHOR23]
 	cmp	w0, w21
-	bls	.L2660
-	adrp	x0, .LANCHOR30
-	add	x0, x0, :lo12:.LANCHOR30
+	bls	.L2604
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w27, [x0, w21, sxtw]
-	cbnz	w24, .L2662
+	cbnz	w24, .L2606
 	adrp	x0, .LANCHOR0
 	ldrb	w1, [x0, #:lo12:.LANCHOR0]
 	adrp	x0, .LANCHOR1
-	cbz	w1, .L2652
+	cbz	w1, .L2596
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
-	cbz	w1, .L2662
-.L2652:
+	cbz	w1, .L2606
+.L2596:
 	adrp	x1, .LANCHOR2
 	ldrb	w0, [x0, #:lo12:.LANCHOR1]
 	ldrh	w1, [x1, #:lo12:.LANCHOR2]
 	udiv	w19, w20, w1
 	mul	w19, w19, w1
 	sub	w1, w20, w19
-	cbz	w0, .L2653
+	cbz	w0, .L2597
 	add	w19, w19, w1, lsl 1
-.L2651:
-	adrp	x24, .LANCHOR14
-	adrp	x25, .LC147
-	add	x24, x24, :lo12:.LANCHOR14
-	add	x25, x25, :lo12:.LC147
-	adrp	x26, .LANCHOR175
-.L2657:
+.L2595:
+	adrp	x24, .LANCHOR19
+	adrp	x25, .LC144
+	add	x24, x24, :lo12:.LANCHOR19
+	add	x25, x25, :lo12:.LC144
+	adrp	x26, .LANCHOR172
+.L2601:
 	ldr	w0, [x24]
-	tbz	x0, 4, .L2654
+	tbz	x0, 4, .L2598
 	mov	w3, w19
 	mov	w2, w20
 	mov	w1, w27
 	mov	x0, x25
 	bl	printf
-.L2654:
+.L2598:
 	mov	w4, w28
 	mov	x3, x22
 	mov	x2, x23
@@ -16366,12 +16187,12 @@ flash_prog_page_en:
 	bl	flash_prog_page
 	mov	w5, w0
 	ldr	w0, [x29, 124]
-	cbz	w0, .L2655
-	adrp	x6, .LANCHOR176
-	ldr	x3, [x26, #:lo12:.LANCHOR175]
+	cbz	w0, .L2599
+	adrp	x6, .LANCHOR173
+	ldr	x3, [x26, #:lo12:.LANCHOR172]
 	mov	w4, w28
 	str	x6, [x29, 112]
-	ldr	x2, [x6, #:lo12:.LANCHOR176]
+	ldr	x2, [x6, #:lo12:.LANCHOR173]
 	mov	w1, w20
 	mov	w0, w21
 	str	w5, [x29, 104]
@@ -16381,78 +16202,78 @@ flash_prog_page_en:
 	mov	w4, w0
 	ccmn	w0, #1, 4, ne
 	mov	x7, x6
-	beq	.L2656
-	ldr	x0, [x6, #:lo12:.LANCHOR176]
+	beq	.L2600
+	ldr	x0, [x6, #:lo12:.LANCHOR173]
 	ldr	w1, [x23]
 	ldr	w5, [x29, 104]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	bne	.L2656
-	ldr	x0, [x26, #:lo12:.LANCHOR175]
+	bne	.L2600
+	ldr	x0, [x26, #:lo12:.LANCHOR172]
 	ldr	w1, [x22]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	beq	.L2655
-.L2656:
+	beq	.L2599
+.L2600:
 	str	w4, [x29, 112]
 	mov	w3, 4
 	str	x7, [x29, 104]
 	mov	w2, w3
 	mov	x1, x23
-	adrp	x0, .LC148
-	add	x0, x0, :lo12:.LC148
+	adrp	x0, .LC145
+	add	x0, x0, :lo12:.LC145
 	bl	rknand_print_hex
 	mov	w3, 4
 	mov	x1, x22
 	mov	w2, w3
-	adrp	x0, .LC149
-	add	x0, x0, :lo12:.LC149
+	adrp	x0, .LC146
+	add	x0, x0, :lo12:.LC146
 	bl	rknand_print_hex
-	adrp	x0, .LANCHOR175
+	adrp	x0, .LANCHOR172
 	mov	w3, 4
 	mov	w2, w3
-	ldr	x1, [x0, #:lo12:.LANCHOR175]
-	adrp	x0, .LC150
-	add	x0, x0, :lo12:.LC150
+	ldr	x1, [x0, #:lo12:.LANCHOR172]
+	adrp	x0, .LC147
+	add	x0, x0, :lo12:.LC147
 	bl	rknand_print_hex
 	ldr	x7, [x29, 104]
 	mov	w3, 4
-	adrp	x0, .LC151
+	adrp	x0, .LC148
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC151
-	ldr	x1, [x7, #:lo12:.LANCHOR176]
+	add	x0, x0, :lo12:.LC148
+	ldr	x1, [x7, #:lo12:.LANCHOR173]
 	bl	rknand_print_hex
 	ldr	w4, [x29, 112]
 	cmp	w4, 512
-	beq	.L2657
-.L2659:
+	beq	.L2601
+.L2603:
 	mov	w1, w20
-	adrp	x0, .LC152
-	add	x0, x0, :lo12:.LC152
+	adrp	x0, .LC149
+	add	x0, x0, :lo12:.LC149
 	bl	printf
-	adrp	x1, .LANCHOR189
+	adrp	x1, .LANCHOR186
 	adrp	x0, .LC0
-	mov	w2, 678
-	add	x1, x1, :lo12:.LANCHOR189
+	mov	w2, 685
+	add	x1, x1, :lo12:.LANCHOR186
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2660:
+.L2604:
 	mov	w0, -1
-	b	.L2648
-.L2653:
+	b	.L2592
+.L2597:
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
 	ldrh	w0, [x0, w1, uxtw 1]
 	add	w19, w0, w19
-	b	.L2651
-.L2662:
+	b	.L2595
+.L2606:
 	mov	w19, w20
-	b	.L2651
-.L2655:
+	b	.L2595
+.L2599:
 	mov	w0, w5
 	cmn	w5, #1
-	beq	.L2659
-.L2648:
+	beq	.L2603
+.L2592:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -16469,61 +16290,61 @@ ftl_test_block:
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR190
+	adrp	x24, .LANCHOR187
 	stp	x21, x22, [sp, 32]
 	and	w21, w0, 65535
-	ldr	x0, [x24, #:lo12:.LANCHOR190]
+	ldr	x0, [x24, #:lo12:.LANCHOR187]
 	mov	w23, 0
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR191
+	adrp	x25, .LANCHOR188
 	stp	x19, x20, [sp, 16]
 	adrp	x26, .LANCHOR112
 	stp	x27, x28, [sp, 80]
 	mov	w20, 0
 	str	wzr, [x0]
 	add	x0, x26, :lo12:.LANCHOR112
-	adrp	x27, .LANCHOR76
+	adrp	x27, .LANCHOR75
 	str	x0, [x29, 112]
-	str	wzr, [x25, #:lo12:.LANCHOR191]
-	add	x0, x27, :lo12:.LANCHOR76
+	str	wzr, [x25, #:lo12:.LANCHOR188]
+	add	x0, x27, :lo12:.LANCHOR75
 	str	x0, [x29, 96]
-.L2679:
+.L2623:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
 	cmp	w0, w20
-	bls	.L2689
-	add	x0, x27, :lo12:.LANCHOR76
+	bls	.L2633
+	add	x0, x27, :lo12:.LANCHOR75
 	mov	w22, 0
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR14
-	add	x0, x0, :lo12:.LANCHOR14
+	adrp	x0, .LANCHOR19
+	add	x0, x0, :lo12:.LANCHOR19
 	str	x0, [x29, 104]
-	b	.L2690
-.L2688:
+	b	.L2634
+.L2632:
 	ldr	x0, [x29, 104]
 	ldr	w0, [x0]
-	tbz	x0, 12, .L2680
-	adrp	x0, .LC153
+	tbz	x0, 12, .L2624
+	adrp	x0, .LC150
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC153
+	add	x0, x0, :lo12:.LC150
 	bl	printf
-.L2680:
+.L2624:
 	ldr	x0, [x29, 96]
 	ldrb	w19, [x0]
 	madd	w19, w21, w19, w22
 	and	w19, w19, 65535
-	cbnz	w20, .L2681
-	adrp	x0, .LANCHOR27
-	ldr	x0, [x0, #:lo12:.LANCHOR27]
+	cbnz	w20, .L2625
+	adrp	x0, .LANCHOR6
+	ldr	x0, [x0, #:lo12:.LANCHOR6]
 	ldrb	w0, [x0, 47]
 	cmp	w0, w19
-	bcs	.L2682
-.L2681:
+	bcs	.L2626
+.L2625:
 	and	w28, w20, 255
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_check_bad_block
-	cbnz	w0, .L2682
+	cbnz	w0, .L2626
 	adrp	x0, .LANCHOR111
 	mov	w1, w23
 	ldrh	w7, [x0, #:lo12:.LANCHOR111]
@@ -16531,62 +16352,62 @@ ftl_test_block:
 	mul	w26, w7, w19
 	mov	w2, w26
 	bl	flash_erase_block_en
-	cbz	w0, .L2683
-	adrp	x0, .LANCHOR79
-	ldrb	w0, [x0, #:lo12:.LANCHOR79]
+	cbz	w0, .L2627
+	adrp	x0, .LANCHOR78
+	ldrb	w0, [x0, #:lo12:.LANCHOR78]
 	cmp	w0, 2
-	bne	.L2705
+	bne	.L2649
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L2705
+	cbz	w0, .L2649
 	mov	w2, w26
 	mov	w1, 1
 	mov	w0, w28
 	bl	flash_erase_block_en
-	cbnz	w0, .L2705
-.L2687:
-	adrp	x0, .LANCHOR79
+	cbnz	w0, .L2649
+.L2631:
+	adrp	x0, .LANCHOR78
 	mov	w23, 1
-	ldrb	w0, [x0, #:lo12:.LANCHOR79]
+	ldrb	w0, [x0, #:lo12:.LANCHOR78]
 	add	w26, w26, w0, lsl 24
-.L2686:
+.L2630:
 	adrp	x0, .LANCHOR131
-	ldr	x2, [x24, #:lo12:.LANCHOR190]
+	ldr	x2, [x24, #:lo12:.LANCHOR187]
 	mov	w5, 1
-	add	x3, x25, :lo12:.LANCHOR191
+	add	x3, x25, :lo12:.LANCHOR188
 	ldrb	w4, [x0, #:lo12:.LANCHOR131]
 	mov	w1, w26
 	mov	w0, w28
 	bl	flash_prog_page_en
-	cbz	w0, .L2682
-.L2705:
+	cbz	w0, .L2626
+.L2649:
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_mask_bad_block
-.L2682:
+.L2626:
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L2690:
+.L2634:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, w22
-	bhi	.L2688
+	bhi	.L2632
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2679
-.L2683:
-	cbz	w23, .L2686
-	b	.L2687
-.L2689:
-	cbz	w23, .L2691
-	adrp	x0, .LANCHOR7
+	b	.L2623
+.L2627:
+	cbz	w23, .L2630
+	b	.L2631
+.L2633:
+	cbz	w23, .L2635
+	adrp	x0, .LANCHOR9
 	mov	w1, 2
-	ldr	x0, [x0, #:lo12:.LANCHOR7]
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	add	x21, x0, x21, uxth 2
 	ldrb	w0, [x21, 2]
 	bfi	w0, w1, 3, 2
 	strb	w0, [x21, 2]
-.L2691:
+.L2635:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -16621,18 +16442,18 @@ ftl_prog_page:
 	bl	flash_prog_page_en
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L2706
-	mov	w2, 2670
-	adrp	x1, .LANCHOR192
+	bne	.L2650
+	mov	w2, 2678
+	adrp	x1, .LANCHOR189
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR192
+	add	x1, x1, :lo12:.LANCHOR189
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	adrp	x0, .LC152
+	adrp	x0, .LC149
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC152
+	add	x0, x0, :lo12:.LC149
 	bl	printf
-.L2706:
+.L2650:
 	mov	w0, w19
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -16654,74 +16475,75 @@ ftl_info_flush:
 	adrp	x24, .LANCHOR110
 	ldrb	w2, [x21, #:lo12:.LANCHOR131]
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR193
+	adrp	x20, .LANCHOR190
 	str	w0, [x29, 116]
-	add	x0, x20, :lo12:.LANCHOR193
+	add	x0, x20, :lo12:.LANCHOR190
 	stp	x25, x26, [sp, 64]
 	lsl	w2, w2, 1
 	stp	x27, x28, [sp, 80]
 	bl	ftl_memset
 	ldr	x0, [x24, #:lo12:.LANCHOR110]
 	ldrh	w1, [x0, 74]
-	cbz	w1, .L2710
+	cmp	w1, 1
+	bls	.L2654
 	strh	wzr, [x0, 150]
-.L2710:
-	adrp	x23, .LANCHOR194
-	add	x19, x23, :lo12:.LANCHOR194
+.L2654:
+	adrp	x23, .LANCHOR191
+	add	x19, x23, :lo12:.LANCHOR191
 	adrp	x25, .LANCHOR111
 	mov	w26, 0
 	add	x0, x25, :lo12:.LANCHOR111
 	str	x0, [x29, 104]
-.L2723:
-	add	x0, x23, :lo12:.LANCHOR194
-	adrp	x22, .LANCHOR195
+.L2667:
+	add	x0, x23, :lo12:.LANCHOR191
+	adrp	x22, .LANCHOR192
 	ldrh	w1, [x25, #:lo12:.LANCHOR111]
-	add	x7, x20, :lo12:.LANCHOR193
+	add	x7, x20, :lo12:.LANCHOR190
 	str	w1, [x29, 120]
 	ldrh	w27, [x0, 2]
 	ldr	x0, [x24, #:lo12:.LANCHOR110]
 	ldrb	w1, [x21, #:lo12:.LANCHOR131]
-	ldrb	w28, [x23, #:lo12:.LANCHOR194]
+	ldrb	w28, [x23, #:lo12:.LANCHOR191]
 	ldr	w6, [x0, 4]
 	lsl	w1, w1, 9
 	add	w6, w6, 1
 	str	w6, [x0, 4]
 	ldr	w0, [x29, 116]
-	str	w0, [x20, #:lo12:.LANCHOR193]
-	ldr	x0, [x22, #:lo12:.LANCHOR195]
+	str	w0, [x20, #:lo12:.LANCHOR190]
+	ldr	x0, [x22, #:lo12:.LANCHOR192]
 	str	w6, [x7, 4]
 	bl	js_hash
 	str	w0, [x7, 8]
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2711
-	adrp	x0, .LC154
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L2655
+	adrp	x0, .LC151
 	mov	w3, w6
 	mov	w2, w27
 	mov	w1, w28
-	add	x0, x0, :lo12:.LC154
+	add	x0, x0, :lo12:.LC151
 	bl	printf
-.L2711:
-	adrp	x1, .LANCHOR95
+.L2655:
+	adrp	x1, .LANCHOR94
 	ldrh	w0, [x19, 2]
-	ldrh	w1, [x1, #:lo12:.LANCHOR95]
+	ldrh	w1, [x1, #:lo12:.LANCHOR94]
 	cmp	w1, w0
-	bhi	.L2712
-	adrp	x27, .LANCHOR196
+	bhi	.L2656
+	adrp	x27, .LANCHOR193
 	adrp	x3, .LC0
-	add	x27, x27, :lo12:.LANCHOR196
+	add	x27, x27, :lo12:.LANCHOR193
 	add	x3, x3, :lo12:.LC0
-.L2719:
+.L2663:
 	ldrb	w0, [x19, 1]
-	adrp	x28, .LANCHOR27
+	adrp	x28, .LANCHOR6
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x19, 1]
 	cmp	w0, 7
-	bls	.L2713
+	bls	.L2657
 	mov	x0, 0
-.L2718:
-	ldr	x2, [x28, #:lo12:.LANCHOR27]
+.L2662:
+	ldr	x2, [x28, #:lo12:.LANCHOR6]
 	add	w1, w0, 8
 	and	w26, w0, 65535
 	add	x1, x2, x1, sxtw
@@ -16729,24 +16551,24 @@ ftl_info_flush:
 	add	w1, w2, 127
 	and	w1, w1, 255
 	cmp	w1, 125
-	bhi	.L2714
+	bhi	.L2658
 	mov	x0, x3
 	str	x3, [x29, 120]
-	mov	w2, 841
+	mov	w2, 846
 	mov	x1, x27
 	bl	printf
 	ldr	x3, [x29, 120]
-.L2717:
+.L2661:
 	strb	w26, [x19, 1]
 	mov	w26, 1
-.L2713:
-	ldr	x0, [x28, #:lo12:.LANCHOR27]
+.L2657:
+	ldr	x0, [x28, #:lo12:.LANCHOR6]
 	ldrb	w1, [x19, 1]
 	add	x0, x0, x1
 	ldrb	w28, [x0, 40]
 	strb	w28, [x19]
 	cmp	w28, 255
-	beq	.L2719
+	beq	.L2663
 	ldr	x0, [x29, 104]
 	ldrh	w27, [x0]
 	mov	w0, 0
@@ -16755,60 +16577,60 @@ ftl_info_flush:
 	bl	flash_erase_block
 	ldrb	w4, [x21, #:lo12:.LANCHOR131]
 	mov	w1, w27
-	ldr	x2, [x22, #:lo12:.LANCHOR195]
-	add	x3, x20, :lo12:.LANCHOR193
+	ldr	x2, [x22, #:lo12:.LANCHOR192]
+	add	x3, x20, :lo12:.LANCHOR190
 	mov	w0, 0
 	add	w27, w27, 1
 	bl	ftl_prog_page
 	mov	w0, 1
 	strh	w0, [x19, 2]
-.L2720:
+.L2664:
 	ldrb	w4, [x21, #:lo12:.LANCHOR131]
 	mov	w1, w27
-	ldr	x2, [x22, #:lo12:.LANCHOR195]
-	add	x3, x20, :lo12:.LANCHOR193
+	ldr	x2, [x22, #:lo12:.LANCHOR192]
+	add	x3, x20, :lo12:.LANCHOR190
 	mov	w0, 0
 	bl	ftl_prog_page
 	cmn	w0, #1
 	ldrh	w1, [x19, 2]
-	adrp	x0, .LANCHOR197
+	adrp	x0, .LANCHOR194
 	add	w1, w1, 1
 	strh	w1, [x19, 2]
-	beq	.L2721
-	ldrb	w1, [x0, #:lo12:.LANCHOR197]
-	cbz	w1, .L2722
-.L2721:
-	strb	wzr, [x0, #:lo12:.LANCHOR197]
-	b	.L2723
-.L2714:
+	beq	.L2665
+	ldrb	w1, [x0, #:lo12:.LANCHOR194]
+	cbz	w1, .L2666
+.L2665:
+	strb	wzr, [x0, #:lo12:.LANCHOR194]
+	b	.L2667
+.L2658:
 	cmp	w2, 255
-	bne	.L2717
+	bne	.L2661
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L2718
+	bne	.L2662
 	mov	w26, w0
-	b	.L2717
-.L2712:
+	b	.L2661
+.L2656:
 	ldr	w1, [x29, 120]
 	madd	w27, w1, w28, w27
-	cbnz	w0, .L2720
+	cbnz	w0, .L2664
 	mov	w1, w27
 	bl	flash_erase_block
-	b	.L2720
-.L2722:
-	cbnz	w26, .L2724
-.L2732:
-	adrp	x0, .LANCHOR194
-	ldrb	w0, [x0, #:lo12:.LANCHOR194]
+	b	.L2664
+.L2666:
+	cbnz	w26, .L2668
+.L2676:
+	adrp	x0, .LANCHOR191
+	ldrb	w0, [x0, #:lo12:.LANCHOR191]
 	cmp	w0, 255
-	bne	.L2726
-	adrp	x1, .LANCHOR196
+	bne	.L2670
+	adrp	x1, .LANCHOR193
 	adrp	x0, .LC0
-	mov	w2, 885
-	add	x1, x1, :lo12:.LANCHOR196
+	mov	w2, 890
+	add	x1, x1, :lo12:.LANCHOR193
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2726:
+.L2670:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -16817,43 +16639,43 @@ ftl_info_flush:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2724:
+.L2668:
 	ldrb	w19, [x19, 1]
-	adrp	x20, .LANCHOR196
+	adrp	x20, .LANCHOR193
 	adrp	x21, .LC0
-	add	x20, x20, :lo12:.LANCHOR196
+	add	x20, x20, :lo12:.LANCHOR193
 	add	w19, w19, 1
 	add	x21, x21, :lo12:.LC0
-	adrp	x22, .LANCHOR27
-.L2727:
+	adrp	x22, .LANCHOR6
+.L2671:
 	cmp	w19, 7
-	bhi	.L2732
-	ldr	x1, [x22, #:lo12:.LANCHOR27]
+	bhi	.L2676
+	ldr	x1, [x22, #:lo12:.LANCHOR6]
 	add	w0, w19, 8
 	add	x0, x1, x0, sxtw
 	ldrb	w23, [x0, 32]
 	add	w0, w23, 127
 	and	w0, w0, 255
 	cmp	w0, 125
-	bhi	.L2728
-	mov	w2, 876
+	bhi	.L2672
+	mov	w2, 881
 	mov	x1, x20
 	mov	x0, x21
 	bl	printf
-.L2729:
+.L2673:
 	adrp	x0, .LANCHOR111
 	ldrh	w1, [x0, #:lo12:.LANCHOR111]
 	mov	w0, 0
 	mul	w1, w1, w23
 	bl	flash_erase_block
-	b	.L2730
-.L2728:
+	b	.L2674
+.L2672:
 	cmp	w23, 255
-	bne	.L2729
-.L2730:
+	bne	.L2673
+.L2674:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L2727
+	b	.L2671
 	.size	ftl_info_flush, .-ftl_info_flush
 	.section	.text.ftl_info_blk_init,"ax",@progbits
 	.align	2
@@ -16861,28 +16683,28 @@ ftl_info_flush:
 	.type	ftl_info_blk_init, %function
 ftl_info_blk_init:
 	stp	x29, x30, [sp, -112]!
-	adrp	x0, .LANCHOR198
-	adrp	x1, .LANCHOR197
+	adrp	x0, .LANCHOR195
+	adrp	x1, .LANCHOR194
 	mov	w2, 16384
 	add	x29, sp, 0
-	strb	wzr, [x0, #:lo12:.LANCHOR198]
+	strb	wzr, [x0, #:lo12:.LANCHOR195]
 	mov	w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR197]
-	adrp	x1, .LANCHOR199
+	strb	w0, [x1, #:lo12:.LANCHOR194]
+	adrp	x1, .LANCHOR196
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR195
-	strb	w0, [x1, #:lo12:.LANCHOR199]
-	adrp	x1, .LANCHOR7
-	ldr	x0, [x21, #:lo12:.LANCHOR195]
+	adrp	x21, .LANCHOR192
+	strb	w0, [x1, #:lo12:.LANCHOR196]
+	adrp	x1, .LANCHOR9
+	ldr	x0, [x21, #:lo12:.LANCHOR192]
 	mov	x22, 7
-	str	x0, [x1, #:lo12:.LANCHOR7]
-	adrp	x1, .LANCHOR6
+	str	x0, [x1, #:lo12:.LANCHOR9]
+	adrp	x1, .LANCHOR8
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR110
-	ldrh	w1, [x1, #:lo12:.LANCHOR6]
-	adrp	x20, .LANCHOR194
+	ldrh	w1, [x1, #:lo12:.LANCHOR8]
+	adrp	x20, .LANCHOR191
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR27
+	adrp	x23, .LANCHOR6
 	stp	x25, x26, [sp, 64]
 	adrp	x24, .LANCHOR131
 	add	x1, x0, x1, lsl 2
@@ -16891,50 +16713,50 @@ ftl_info_blk_init:
 	mov	w1, 0
 	bl	ftl_memset
 	adrp	x26, .LANCHOR111
-	adrp	x0, .LANCHOR200
+	adrp	x0, .LANCHOR197
 	mov	w1, 0
 	mov	w2, 16384
 	mov	w27, 21574
-	ldr	x0, [x0, #:lo12:.LANCHOR200]
+	ldr	x0, [x0, #:lo12:.LANCHOR197]
 	add	x26, x26, :lo12:.LANCHOR111
 	add	x24, x24, :lo12:.LANCHOR131
 	movk	w27, 0x494c, lsl 16
 	bl	ftl_memset
-	ldr	x1, [x23, #:lo12:.LANCHOR27]
-	add	x0, x20, :lo12:.LANCHOR194
+	ldr	x1, [x23, #:lo12:.LANCHOR6]
+	add	x0, x20, :lo12:.LANCHOR191
 	strb	wzr, [x0, 1]
 	ldrb	w1, [x1, 40]
-	strb	w1, [x20, #:lo12:.LANCHOR194]
+	strb	w1, [x20, #:lo12:.LANCHOR191]
 	strh	wzr, [x0, 2]
-.L2751:
-	ldr	x1, [x23, #:lo12:.LANCHOR27]
+.L2692:
+	ldr	x1, [x23, #:lo12:.LANCHOR6]
 	add	w0, w22, 8
 	sxth	w25, w22
 	mov	w28, w22
 	add	x0, x1, x0, sxtw
 	ldrb	w0, [x0, 32]
 	cmp	w0, 255
-	bne	.L2750
-.L2755:
+	bne	.L2691
+.L2696:
 	sub	x22, x22, #1
 	cmn	x22, #1
-	bne	.L2751
+	bne	.L2692
 	mov	w25, 0
-.L2752:
-	adrp	x24, .LANCHOR14
-	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2756
+.L2693:
+	adrp	x24, .LANCHOR19
+	ldr	w0, [x24, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L2697
 	ldr	x0, [x19, #:lo12:.LANCHOR110]
 	mov	w2, 4800
 	mov	w1, w22
 	ldr	w3, [x0]
-	adrp	x0, .LC156
-	add	x0, x0, :lo12:.LC156
+	adrp	x0, .LC153
+	add	x0, x0, :lo12:.LC153
 	bl	printf
-.L2756:
+.L2697:
 	cmn	w22, #1
-	bne	.L2757
-	ldr	x0, [x21, #:lo12:.LANCHOR195]
+	bne	.L2698
+	ldr	x0, [x21, #:lo12:.LANCHOR192]
 	mov	w1, 0
 	mov	w2, 16384
 	bl	ftl_memset
@@ -16942,11 +16764,11 @@ ftl_info_blk_init:
 	mov	w1, 21574
 	movk	w1, 0x494c, lsl 16
 	str	w1, [x0]
-	mov	w1, 35
+	mov	w1, 36
 	movk	w1, 0x6, lsl 16
 	str	w1, [x0, 12]
 	mov	w0, w22
-.L2749:
+.L2690:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -16954,12 +16776,12 @@ ftl_info_blk_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2750:
+.L2691:
 	ldrh	w6, [x26]
-	adrp	x7, .LANCHOR193
+	adrp	x7, .LANCHOR190
 	ldrb	w4, [x24]
-	add	x7, x7, :lo12:.LANCHOR193
-	ldr	x2, [x21, #:lo12:.LANCHOR195]
+	add	x7, x7, :lo12:.LANCHOR190
+	ldr	x2, [x21, #:lo12:.LANCHOR192]
 	mov	x3, x7
 	str	x7, [x29, 96]
 	mul	w6, w6, w0
@@ -16971,87 +16793,87 @@ ftl_info_blk_init:
 	cmn	w0, #1
 	ldr	w6, [x29, 108]
 	ldr	x7, [x29, 96]
-	bne	.L2753
+	bne	.L2694
 	ldrb	w4, [x24]
 	mov	x3, x7
-	ldr	x2, [x21, #:lo12:.LANCHOR195]
+	ldr	x2, [x21, #:lo12:.LANCHOR192]
 	add	w1, w6, 1
 	mov	w0, 0
 	bl	ftl_read_page
 	mov	w5, w0
-.L2753:
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2754
+.L2694:
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L2695
 	ldr	x0, [x19, #:lo12:.LANCHOR110]
 	mov	w2, w5
 	str	w5, [x29, 108]
-	mov	w3, 744
+	mov	w3, 749
 	mov	w1, w28
 	ldr	w4, [x0]
-	adrp	x0, .LC155
-	add	x0, x0, :lo12:.LC155
+	adrp	x0, .LC152
+	add	x0, x0, :lo12:.LC152
 	bl	printf
 	ldr	w5, [x29, 108]
-.L2754:
+.L2695:
 	cmn	w5, #1
-	beq	.L2755
+	beq	.L2696
 	ldr	x0, [x19, #:lo12:.LANCHOR110]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L2755
+	bne	.L2696
 	mov	w22, w25
-	b	.L2752
-.L2757:
-	ldr	x1, [x23, #:lo12:.LANCHOR27]
+	b	.L2693
+.L2698:
+	ldr	x1, [x23, #:lo12:.LANCHOR6]
 	add	w0, w25, 8
-	ldr	x2, [x21, #:lo12:.LANCHOR195]
+	ldr	x2, [x21, #:lo12:.LANCHOR192]
 	mov	w4, 4
 	adrp	x26, .LANCHOR131
 	mov	w28, 21574
 	add	x0, x1, x0, sxtw
-	adrp	x27, .LC157
+	adrp	x27, .LC154
 	add	x26, x26, :lo12:.LANCHOR131
-	add	x27, x27, :lo12:.LC157
+	add	x27, x27, :lo12:.LC154
 	movk	w28, 0x494c, lsl 16
 	ldrb	w1, [x0, 32]
-	add	x0, x20, :lo12:.LANCHOR194
-	strb	w1, [x20, #:lo12:.LANCHOR194]
+	add	x0, x20, :lo12:.LANCHOR191
+	strb	w1, [x20, #:lo12:.LANCHOR191]
 	strb	w25, [x0, 1]
-	adrp	x25, .LANCHOR193
+	adrp	x25, .LANCHOR190
 	mov	w0, 0
-	add	x3, x25, :lo12:.LANCHOR193
+	add	x3, x25, :lo12:.LANCHOR190
 	bl	flash_get_last_written_page
 	sxth	w22, w0
 	add	w0, w0, 1
-	ldrb	w23, [x20, #:lo12:.LANCHOR194]
+	ldrb	w23, [x20, #:lo12:.LANCHOR191]
 	and	w0, w0, 65535
 	str	w0, [x29, 108]
 	adrp	x0, .LANCHOR111
 	ldrh	w0, [x0, #:lo12:.LANCHOR111]
 	madd	w23, w23, w0, w22
-.L2759:
-	tbnz	w22, #31, .L2763
+.L2700:
+	tbnz	w22, #31, .L2704
 	ldrb	w4, [x26]
-	add	x5, x25, :lo12:.LANCHOR193
-	ldr	x2, [x21, #:lo12:.LANCHOR195]
+	add	x5, x25, :lo12:.LANCHOR190
+	ldr	x2, [x21, #:lo12:.LANCHOR192]
 	mov	x3, x5
 	mov	w1, w23
 	mov	w0, 0
 	str	x5, [x29, 96]
 	bl	ftl_read_page
 	cmn	w0, #1
-	beq	.L2760
+	beq	.L2701
 	ldr	x0, [x19, #:lo12:.LANCHOR110]
 	ldr	x5, [x29, 96]
 	ldr	w0, [x0]
 	cmp	w0, w28
-	bne	.L2760
+	bne	.L2701
 	ldr	w6, [x5, 8]
-	cbnz	w6, .L2761
-.L2763:
+	cbnz	w6, .L2702
+.L2704:
 	ldrh	w0, [x29, 108]
-	add	x20, x20, :lo12:.LANCHOR194
+	add	x20, x20, :lo12:.LANCHOR191
 	strh	w0, [x20, 2]
 	bl	ftl_tmp_into_update
 	ldr	x1, [x19, #:lo12:.LANCHOR110]
@@ -17062,33 +16884,33 @@ ftl_info_blk_init:
 	bl	ftl_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbnz	x0, 14, .L2762
-.L2779:
+	ldr	w0, [x24, #:lo12:.LANCHOR19]
+	tbnz	x0, 14, .L2703
+.L2720:
 	mov	w0, 0
-	b	.L2749
-.L2761:
-	ldr	x0, [x21, #:lo12:.LANCHOR195]
+	b	.L2690
+.L2702:
+	ldr	x0, [x21, #:lo12:.LANCHOR192]
 	ldrb	w1, [x26]
 	lsl	w1, w1, 9
 	bl	js_hash
 	cmp	w6, w0
-	beq	.L2763
+	beq	.L2704
 	mov	w1, w6
 	mov	x0, x27
 	bl	printf
-.L2760:
+.L2701:
 	sub	w22, w22, #1
 	sub	w23, w23, #1
 	sxth	w22, w22
-	b	.L2759
-.L2762:
+	b	.L2700
+.L2703:
 	ldr	x0, [x19, #:lo12:.LANCHOR110]
 	ldr	w1, [x0, 156]
-	adrp	x0, .LC158
-	add	x0, x0, :lo12:.LC158
+	adrp	x0, .LC155
+	add	x0, x0, :lo12:.LC155
 	bl	printf
-	b	.L2779
+	b	.L2720
 	.size	ftl_info_blk_init, .-ftl_info_blk_init
 	.section	.text.ftl_ext_info_flush,"ax",@progbits
 	.align	2
@@ -17096,30 +16918,30 @@ ftl_info_blk_init:
 	.type	ftl_ext_info_flush, %function
 ftl_ext_info_flush:
 	stp	x29, x30, [sp, -96]!
-	adrp	x0, .LANCHOR10
+	adrp	x0, .LANCHOR12
 	add	x29, sp, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	ldr	x0, [x0, #:lo12:.LANCHOR12]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	ldr	w1, [x0, 520]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbz	w1, .L2781
+	cbz	w1, .L2722
 	str	wzr, [x0, 520]
-.L2781:
-	adrp	x20, .LANCHOR95
-	adrp	x22, .LANCHOR201
-	adrp	x21, .LANCHOR32
-	add	x20, x20, :lo12:.LANCHOR95
-	add	x22, x22, :lo12:.LANCHOR201
-	add	x21, x21, :lo12:.LANCHOR32
+.L2722:
+	adrp	x20, .LANCHOR94
+	adrp	x22, .LANCHOR198
+	adrp	x21, .LANCHOR31
+	add	x20, x20, :lo12:.LANCHOR94
+	add	x22, x22, :lo12:.LANCHOR198
+	add	x21, x21, :lo12:.LANCHOR31
 	mov	w0, 0
 	bl	ftl_total_vpn_update
-.L2782:
+.L2723:
 	adrp	x23, .LANCHOR110
 	mov	x24, x23
-.L2785:
+.L2726:
 	ldr	x0, [x23, #:lo12:.LANCHOR110]
 	ldr	w1, [x0, 56]
 	add	w1, w1, 1
@@ -17127,29 +16949,29 @@ ftl_ext_info_flush:
 	ldrh	w1, [x0, 140]
 	ldrh	w0, [x20]
 	cmp	w1, w0
-	bcc	.L2783
+	bcc	.L2724
 	bl	ftl_ext_alloc_new_blk
-.L2783:
+.L2724:
 	ldr	x0, [x24, #:lo12:.LANCHOR110]
 	ldrh	w1, [x0, 130]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2784
+	bne	.L2725
 	adrp	x0, .LC0
-	mov	w2, 2203
+	mov	w2, 2211
 	mov	x1, x22
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2784:
+.L2725:
 	ldrb	w19, [x21]
 	mov	w0, 24
 	ldr	x1, [x24, #:lo12:.LANCHOR110]
 	adrp	x26, .LANCHOR131
 	sub	w19, w0, w19
-	adrp	x0, .LANCHOR75
-	adrp	x27, .LANCHOR193
-	add	x25, x27, :lo12:.LANCHOR193
-	ldrh	w0, [x0, #:lo12:.LANCHOR75]
+	adrp	x0, .LANCHOR74
+	adrp	x27, .LANCHOR190
+	add	x25, x27, :lo12:.LANCHOR190
+	ldrh	w0, [x0, #:lo12:.LANCHOR74]
 	ldrh	w2, [x1, 130]
 	sub	w0, w19, w0
 	mov	w19, 1
@@ -17169,12 +16991,12 @@ ftl_ext_info_flush:
 	bl	ftl_memset
 	ldr	x0, [x24, #:lo12:.LANCHOR110]
 	ldrb	w7, [x26, #:lo12:.LANCHOR131]
-	str	wzr, [x27, #:lo12:.LANCHOR193]
+	str	wzr, [x27, #:lo12:.LANCHOR190]
 	ldr	w0, [x0, 56]
 	lsl	w1, w7, 9
 	str	w0, [x25, 4]
-	adrp	x0, .LANCHOR200
-	ldr	x6, [x0, #:lo12:.LANCHOR200]
+	adrp	x0, .LANCHOR197
+	ldr	x6, [x0, #:lo12:.LANCHOR197]
 	mov	x0, x6
 	bl	js_hash
 	mov	x2, x6
@@ -17190,16 +17012,16 @@ ftl_ext_info_flush:
 	and	w1, w1, 65535
 	strh	w1, [x2, 140]
 	cmp	w1, 1
-	beq	.L2785
+	beq	.L2726
 	cmn	w0, #1
-	adrp	x0, .LANCHOR199
-	beq	.L2786
-	ldrb	w1, [x0, #:lo12:.LANCHOR199]
-	cbz	w1, .L2787
-.L2786:
-	strb	wzr, [x0, #:lo12:.LANCHOR199]
-	b	.L2782
-.L2787:
+	adrp	x0, .LANCHOR196
+	beq	.L2727
+	ldrb	w1, [x0, #:lo12:.LANCHOR196]
+	cbz	w1, .L2728
+.L2727:
+	strb	wzr, [x0, #:lo12:.LANCHOR196]
+	b	.L2723
+.L2728:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -17216,7 +17038,7 @@ ftl_ext_info_flush:
 ftl_ext_info_init:
 	stp	x29, x30, [sp, -128]!
 	adrp	x0, .LANCHOR121
-	adrp	x2, .LANCHOR75
+	adrp	x2, .LANCHOR74
 	mov	w4, 4
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
@@ -17224,19 +17046,19 @@ ftl_ext_info_init:
 	strh	wzr, [x0, #:lo12:.LANCHOR121]
 	ldr	x0, [x20, #:lo12:.LANCHOR110]
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR200
+	adrp	x21, .LANCHOR197
 	stp	x27, x28, [sp, 80]
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR193
+	adrp	x24, .LANCHOR190
 	ldrh	w1, [x0, 130]
-	adrp	x0, .LANCHOR32
+	adrp	x0, .LANCHOR31
 	stp	x25, x26, [sp, 64]
-	add	x3, x24, :lo12:.LANCHOR193
-	ldrb	w19, [x0, #:lo12:.LANCHOR32]
+	add	x3, x24, :lo12:.LANCHOR190
+	ldrb	w19, [x0, #:lo12:.LANCHOR31]
 	mov	w0, 24
 	sub	w0, w0, w19
-	ldrh	w19, [x2, #:lo12:.LANCHOR75]
-	ldr	x2, [x21, #:lo12:.LANCHOR200]
+	ldrh	w19, [x2, #:lo12:.LANCHOR74]
+	ldr	x2, [x21, #:lo12:.LANCHOR197]
 	sub	w0, w0, w19
 	mov	w19, 1
 	lsl	w19, w19, w0
@@ -17248,21 +17070,21 @@ ftl_ext_info_init:
 	mov	w0, w27
 	bl	flash_get_last_written_page
 	sxth	w23, w0
-	adrp	x0, .LANCHOR14
+	adrp	x0, .LANCHOR19
 	stp	x0, x24, [x29, 112]
-	ldr	w1, [x0, #:lo12:.LANCHOR14]
-	tbz	x1, 12, .L2798
+	ldr	w1, [x0, #:lo12:.LANCHOR19]
+	tbz	x1, 12, .L2739
 	ldr	x0, [x20, #:lo12:.LANCHOR110]
-	adrp	x1, .LANCHOR202
+	adrp	x1, .LANCHOR199
 	and	w4, w22, 65535
 	mov	w3, w23
-	mov	w2, 2248
-	add	x1, x1, :lo12:.LANCHOR202
+	mov	w2, 2256
+	add	x1, x1, :lo12:.LANCHOR199
 	ldrh	w5, [x0, 130]
-	adrp	x0, .LC159
-	add	x0, x0, :lo12:.LC159
+	adrp	x0, .LC156
+	add	x0, x0, :lo12:.LC156
 	bl	printf
-.L2798:
+.L2739:
 	adrp	x25, .LANCHOR131
 	adrp	x26, .LANCHOR111
 	mov	w28, 20038
@@ -17270,16 +17092,16 @@ ftl_ext_info_init:
 	add	x26, x26, :lo12:.LANCHOR111
 	mov	w24, 0
 	movk	w28, 0x4549, lsl 16
-.L2799:
+.L2740:
 	and	w22, w23, 65535
 	sub	w0, w22, w24
-	tbnz	x0, 15, .L2804
+	tbnz	x0, 15, .L2745
 	ldr	x0, [x29, 120]
 	sub	w1, w23, w24
 	ldrb	w4, [x25]
-	add	x5, x0, :lo12:.LANCHOR193
+	add	x5, x0, :lo12:.LANCHOR190
 	ldrh	w0, [x26]
-	ldr	x2, [x21, #:lo12:.LANCHOR200]
+	ldr	x2, [x21, #:lo12:.LANCHOR197]
 	mov	x3, x5
 	str	x5, [x29, 104]
 	madd	w1, w0, w19, w1
@@ -17287,28 +17109,28 @@ ftl_ext_info_init:
 	bl	flash_read_page_en
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2800
-	adrp	x0, .LANCHOR10
+	beq	.L2741
+	adrp	x0, .LANCHOR12
 	ldr	x5, [x29, 104]
-	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	ldr	x0, [x0, #:lo12:.LANCHOR12]
 	ldr	w0, [x0]
 	cmp	w0, w28
-	bne	.L2800
+	bne	.L2741
 	ldr	w6, [x5, 8]
-	cbnz	w6, .L2801
-.L2804:
+	cbnz	w6, .L2742
+.L2745:
 	bl	zftl_sblk_list_init
 	ldr	x0, [x20, #:lo12:.LANCHOR110]
 	ldrh	w1, [x0, 140]
 	cmp	w1, w23
-	bgt	.L2803
+	bgt	.L2744
 	add	w22, w22, 1
 	strh	w22, [x0, 140]
 	bl	ftl_ext_info_flush
-.L2803:
-	adrp	x0, .LANCHOR10
+.L2744:
+	adrp	x0, .LANCHOR12
 	mov	w1, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	ldr	x0, [x0, #:lo12:.LANCHOR12]
 	strh	w1, [x0, 584]
 	strh	w1, [x0, 586]
 	strh	w1, [x0, 588]
@@ -17321,21 +17143,21 @@ ftl_ext_info_init:
 	str	wzr, [x0, 520]
 	str	wzr, [x0, 604]
 	str	wzr, [x0, 608]
-	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 12, .L2806
+	ldr	w1, [x1, #:lo12:.LANCHOR19]
+	tbz	x1, 12, .L2747
 	ldr	w3, [x0, 12]
-	adrp	x1, .LANCHOR202
-	adrp	x0, .LC161
+	adrp	x1, .LANCHOR199
+	adrp	x0, .LC158
 	mov	w4, 0
 	mov	w2, 0
-	add	x1, x1, :lo12:.LANCHOR202
-	add	x0, x0, :lo12:.LC161
+	add	x1, x1, :lo12:.LANCHOR199
+	add	x0, x0, :lo12:.LC158
 	bl	printf
-.L2806:
-	adrp	x0, .LANCHOR73
+.L2747:
+	adrp	x0, .LANCHOR72
 	mov	w1, -1
 	ldp	x19, x20, [sp, 16]
-	strh	w1, [x0, #:lo12:.LANCHOR73]
+	strh	w1, [x0, #:lo12:.LANCHOR72]
 	ldp	x21, x22, [sp, 32]
 	mov	w0, 0
 	ldp	x23, x24, [sp, 48]
@@ -17343,1041 +17165,1784 @@ ftl_ext_info_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2801:
-	ldr	x0, [x21, #:lo12:.LANCHOR200]
+.L2742:
+	ldr	x0, [x21, #:lo12:.LANCHOR197]
 	ldrb	w1, [x25]
 	lsl	w1, w1, 9
 	bl	js_hash
 	cmp	w6, w0
-	beq	.L2804
-	adrp	x0, .LC160
+	beq	.L2745
+	adrp	x0, .LC157
 	mov	w1, w6
-	add	x0, x0, :lo12:.LC160
+	add	x0, x0, :lo12:.LC157
 	bl	printf
-.L2800:
+.L2741:
 	add	w24, w24, 1
-	b	.L2799
+	b	.L2740
 	.size	ftl_ext_info_init, .-ftl_ext_info_init
-	.section	.text.ftl_low_format_data_init,"ax",@progbits
+	.section	.text.ftl_prog_ppa_page,"ax",@progbits
 	.align	2
-	.global	ftl_low_format_data_init
-	.type	ftl_low_format_data_init, %function
-ftl_low_format_data_init:
+	.global	ftl_prog_ppa_page
+	.type	ftl_prog_ppa_page, %function
+ftl_prog_ppa_page:
+	adrp	x4, .LANCHOR31
+	mov	w5, 1
+	ldrb	w6, [x4, #:lo12:.LANCHOR31]
+	mov	w4, 24
+	sub	w4, w4, w6
+	lsl	w7, w5, w4
+	sub	w7, w7, #1
+	lsl	w5, w5, w6
+	sub	w6, w5, #1
+	lsr	w5, w0, w4
+	mov	w4, w3
+	mov	x3, x2
+	mov	x2, x1
+	and	w1, w7, w0
+	and	w0, w6, w5
+	b	ftl_prog_page
+	.size	ftl_prog_ppa_page, .-ftl_prog_ppa_page
+	.section	.text.ftl_write_last_log_page,"ax",@progbits
+	.align	2
+	.global	ftl_write_last_log_page
+	.type	ftl_write_last_log_page, %function
+ftl_write_last_log_page:
+	ldrh	w1, [x0, 6]
+	cmp	w1, 1
+	bne	.L2761
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LANCHOR200
-	mov	w2, 16384
-	mov	w1, 0
+	adrp	x1, .LANCHOR117
 	add	x29, sp, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR200]
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR110
-	str	x21, [sp, 32]
-	bl	ftl_memset
-	bl	zftl_sblk_list_init
-	mov	w0, 1
-	bl	ftl_alloc_sblk
-	mov	w1, 0
+	mov	x19, x0
+	stp	x21, x22, [sp, 32]
+	ldr	x20, [x1, #:lo12:.LANCHOR117]
+	ldrh	w22, [x0, 12]
+	bl	ftl_get_new_free_page
 	mov	w21, w0
-	bl	ftl_erase_sblk
-	ldr	x1, [x19, #:lo12:.LANCHOR110]
+	cmn	w0, #1
+	beq	.L2762
+	ldrh	w0, [x19]
+	add	x20, x20, x22, uxth 2
+	bl	ftl_vpn_decrement
+	adrp	x0, .LANCHOR188
+	mov	w1, 15555
+	add	x7, x0, :lo12:.LANCHOR188
+	movk	w1, 0xf55f, lsl 16
+	str	w1, [x0, #:lo12:.LANCHOR188]
+	adrp	x0, .LANCHOR94
+	ldrh	w1, [x0, #:lo12:.LANCHOR94]
+	adrp	x0, .LANCHOR79
+	ldrb	w0, [x0, #:lo12:.LANCHOR79]
+	mul	w1, w1, w0
+	mov	x0, x20
+	lsl	w1, w1, 2
+	bl	js_hash
+	mov	x1, x7
+	mov	x2, 0
+	stp	w0, wzr, [x7, 4]
+	mov	w0, 2
+	str	wzr, [x7, 12]
+	str	wzr, [x1, 16]!
+	bl	ftl_debug_info_fill
+	mov	x2, x7
+	adrp	x0, .LANCHOR131
+	mov	x1, x20
+	ldrb	w3, [x0, #:lo12:.LANCHOR131]
 	mov	w0, w21
-	add	x1, x1, 672
+	bl	ftl_prog_ppa_page
+.L2762:
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
+.L2761:
+	mov	w0, -1
+	ret
+	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
+	.section	.text.ftl_dump_write_open_sblk,"ax",@progbits
+	.align	2
+	.global	ftl_dump_write_open_sblk
+	.type	ftl_dump_write_open_sblk, %function
+ftl_dump_write_open_sblk:
+	sub	sp, sp, #224
+	stp	x29, x30, [sp, 48]
+	add	x29, sp, 48
+	stp	x19, x20, [sp, 64]
+	and	w20, w0, 65535
+	adrp	x0, .LANCHOR8
+	stp	x21, x22, [sp, 80]
+	stp	x23, x24, [sp, 96]
+	ldrh	w0, [x0, #:lo12:.LANCHOR8]
+	stp	x25, x26, [sp, 112]
+	stp	x27, x28, [sp, 128]
+	cmp	w0, w20
+	bls	.L2767
+	adrp	x0, .LANCHOR83
+	str	x0, [x29, 120]
+	ldrb	w1, [x0, #:lo12:.LANCHOR83]
+	cbnz	w1, .L2769
+	adrp	x0, .LANCHOR80
+	ldrb	w0, [x0, #:lo12:.LANCHOR80]
+	cbz	w0, .L2767
+.L2769:
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbnz	w0, .L2767
+	adrp	x0, .LANCHOR9
+	ubfiz	x14, x20, 2, 16
+	mov	x15, x0
+	ldr	x1, [x0, #:lo12:.LANCHOR9]
+	add	x1, x1, x14
+	ldrb	w1, [x1, 2]
+	and	w1, w1, 224
+	cmp	w1, 160
+	bne	.L2791
+	adrp	x0, .LANCHOR78
+	ldrb	w25, [x0, #:lo12:.LANCHOR78]
+.L2770:
+	add	x21, x29, 176
+	adrp	x23, .LANCHOR94
+	mov	w0, w20
+	adrp	x26, .LANCHOR111
+	add	x26, x26, :lo12:.LANCHOR111
+	mov	w27, 0
+	strh	w20, [x21, -32]!
+	mov	w28, 0
+	add	x1, x21, 16
 	bl	ftl_get_blk_list_in_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR110]
-	ldrh	w20, [x0, 672]
-	strh	wzr, [x0, 690]
-	mov	w0, 65533
-	sub	w1, w20, #1
-	cmp	w0, w1, uxth
-	bcs	.L2818
-	adrp	x1, .LANCHOR203
-	adrp	x0, .LC0
-	mov	w2, 2476
-	add	x1, x1, :lo12:.LANCHOR203
-	add	x0, x0, :lo12:.LC0
+	ldrh	w1, [x23, #:lo12:.LANCHOR94]
+	and	w0, w0, 255
+	strb	w0, [x29, 153]
+	strb	wzr, [x29, 149]
+	strh	wzr, [x29, 146]
+	mul	w0, w0, w1
+	strh	wzr, [x29, 154]
+	strh	w0, [x29, 150]
+	ldr	x0, [x15, #:lo12:.LANCHOR9]
+	add	x1, x0, x14
+	ldr	w5, [x0, x14]
+	ldrb	w2, [x1, 2]
+	mov	w1, w20
+	ldrh	w4, [x0, x14]
+	adrp	x0, .LC159
+	ubfx	x5, x5, 11, 8
+	add	x0, x0, :lo12:.LC159
+	ubfx	x3, x2, 3, 2
+	and	w4, w4, 2047
+	ubfx	x2, x2, 5, 3
 	bl	printf
-.L2818:
-	ldr	x0, [x19, #:lo12:.LANCHOR110]
-	mov	w2, 256
-	mov	w1, 255
-	add	x0, x0, 416
-	strh	wzr, [x0, 280]
+	mov	w0, 1
+	bl	buf_alloc
+	mov	x19, x0
+	mov	w10, 0
+	add	x0, x23, :lo12:.LANCHOR94
+	str	x0, [x29, 128]
+.L2771:
+	ldr	x0, [x29, 128]
+	ldrh	w0, [x0]
+	cmp	w0, w27
+	bls	.L2779
+	lsl	w22, w27, 1
+	mov	w28, 0
+	sub	w0, w22, #1
+	add	w22, w22, w27
+	str	w0, [x29, 140]
+	sub	w22, w22, #1
+	adrp	x0, .LC160
+	add	x0, x0, :lo12:.LC160
+	str	x0, [x29, 112]
+	b	.L2782
+.L2791:
+	mov	w25, 1
+	b	.L2770
+.L2780:
+	ldrh	w12, [x21, x24]
+	mov	w0, 65535
+	cmp	w12, w0
+	bne	.L2772
+.L2778:
+	add	w10, w10, 1
+	and	w10, w10, 65535
+.L2773:
+	cmp	w25, w10
+	bcs	.L2780
+	add	w11, w28, 1
+	and	w28, w11, 65535
+.L2782:
+	ldrb	w0, [x29, 153]
+	cmp	w0, w28
+	bls	.L2781
+	sxtw	x24, w28
+	mov	w10, 1
+	add	x24, x24, 8
+	lsl	x24, x24, 1
+	b	.L2773
+.L2772:
+	ldrh	w3, [x26]
+	cmp	w25, 3
+	mul	w3, w3, w12
+	add	w0, w3, w10
+	bne	.L2774
+	adrp	x1, .LANCHOR36
+	ldrb	w1, [x1, #:lo12:.LANCHOR36]
+	cbz	w1, .L2775
+	adrp	x1, .LANCHOR78
+	add	w0, w0, w22
+	ldrb	w3, [x1, #:lo12:.LANCHOR78]
+.L2805:
+	orr	w3, w0, w3, lsl 24
+	b	.L2776
+.L2775:
+	add	w3, w27, w3
+	orr	w3, w3, w10, lsl 24
+.L2776:
+	str	w3, [x19, 40]
+	mov	w1, 1
+	stp	w10, w12, [x29, 104]
+	mov	x0, x19
+	str	w3, [x29, 136]
+	bl	sblk_read_page
+	ldr	w13, [x19, 52]
+	ldp	w10, w12, [x29, 104]
+	cmp	w13, 512
+	ccmn	w13, #1, 4, ne
+	ldr	w3, [x29, 136]
+	bne	.L2778
+	ldr	x1, [x19, 24]
+	mov	w4, w13
+	ldr	x0, [x19, 8]
+	str	w10, [x29, 108]
+	str	w13, [x29, 136]
+	ldr	w2, [x1, 12]
+	str	w2, [sp, 32]
+	ldr	w2, [x1, 8]
+	str	w2, [sp, 24]
+	ldr	w2, [x1, 4]
+	str	w2, [sp, 16]
+	mov	w2, w27
+	ldr	w1, [x1]
+	str	w1, [sp, 8]
+	ldr	w1, [x0, 12]
+	str	w1, [sp]
+	mov	w1, w12
+	ldp	w5, w6, [x0]
+	ldr	w7, [x0, 8]
+	ldr	x0, [x29, 112]
+	bl	printf
+	ldr	w13, [x29, 136]
+	ldr	w10, [x29, 108]
+	cmp	w13, 512
+	bne	.L2778
+.L2779:
+	mov	w4, w10
+	mov	w3, w28
+	mov	w2, w27
+	mov	w1, w20
+	adrp	x24, .LANCHOR131
+	adrp	x0, .LC161
+	add	x0, x0, :lo12:.LC161
+	bl	printf
+	ldr	x0, [x19, 8]
+	mov	w1, 0
+	ldrb	w2, [x24, #:lo12:.LANCHOR131]
+	adrp	x25, .LANCHOR19
+	adrp	x26, .LC162
+	add	x25, x25, :lo12:.LANCHOR19
+	add	x26, x26, :lo12:.LC162
+	lsl	w2, w2, 9
 	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR110]
-	mov	w2, 4096
+	ldr	x0, [x19, 24]
 	mov	w1, 0
-	add	x0, x0, 704
+	ldrb	w2, [x24, #:lo12:.LANCHOR131]
+	lsl	w2, w2, 1
 	bl	ftl_memset
-	adrp	x0, .LANCHOR32
-	ldr	x1, [x19, #:lo12:.LANCHOR110]
-	ldrb	w2, [x0, #:lo12:.LANCHOR32]
+.L2783:
+	ldrh	w0, [x23, #:lo12:.LANCHOR94]
+	cmp	w0, w27
+	bls	.L2789
+	lsl	w0, w27, 1
+	str	w0, [x29, 140]
+	ldr	x0, [x29, 120]
+	mov	w22, 0
+	add	x28, x0, :lo12:.LANCHOR83
+	b	.L2790
+.L2774:
+	cmp	w25, 2
+	bne	.L2777
+	adrp	x1, .LANCHOR78
+	ldrb	w3, [x1, #:lo12:.LANCHOR78]
+	ldr	w1, [x29, 140]
+	add	w0, w1, w0
+	b	.L2805
+.L2777:
+	add	w3, w27, w3
+	b	.L2776
+.L2781:
+	add	w8, w27, 1
+	and	w27, w8, 65535
+	b	.L2771
+.L2788:
+	ldr	w0, [x25]
+	tbz	x0, 12, .L2784
+	mov	w2, w22
+	mov	w1, w27
+	mov	x0, x26
+	bl	printf
+.L2784:
+	ldrb	w1, [x28]
+	adrp	x2, .LANCHOR111
+	sxtw	x0, w22
+	cbz	w1, .L2785
+	add	x0, x0, 8
+	ldrh	w1, [x2, #:lo12:.LANCHOR111]
+	ldrh	w0, [x21, x0, lsl 1]
+	mul	w0, w0, w1
+	orr	w0, w0, w27
+	str	w0, [x19, 40]
+	mov	x0, x19
+	bl	sblk_3d_tlc_dump_prog
+.L2786:
+	add	w22, w22, 1
+	and	w22, w22, 65535
+.L2790:
+	ldrb	w0, [x29, 153]
+	cmp	w0, w22
+	bhi	.L2788
+	add	w8, w27, 1
+	and	w27, w8, 65535
+	b	.L2783
+.L2785:
+	adrp	x1, .LANCHOR78
+	add	x0, x0, 8
+	ldrb	w1, [x1, #:lo12:.LANCHOR78]
+	cmp	w1, 2
+	bne	.L2787
+	ldrh	w1, [x2, #:lo12:.LANCHOR111]
+	ldrh	w0, [x21, x0, lsl 1]
+	mul	w0, w0, w1
+	ldr	w1, [x29, 140]
+	orr	w0, w0, w1
+	orr	w0, w0, 33554432
+	str	w0, [x19, 40]
+	mov	x0, x19
+	bl	sblk_mlc_dump_prog
+	b	.L2786
+.L2787:
+	ldrh	w1, [x21, x0, lsl 1]
+	mov	w6, 1
+	ldrh	w0, [x2, #:lo12:.LANCHOR111]
+	mov	w5, 0
+	ldrb	w4, [x24, #:lo12:.LANCHOR131]
+	ldr	x3, [x19, 24]
+	mul	w1, w1, w0
+	adrp	x0, .LANCHOR31
+	ldrb	w2, [x0, #:lo12:.LANCHOR31]
 	mov	w0, 24
+	orr	w1, w1, w27
+	str	w1, [x19, 40]
 	sub	w0, w0, w2
-	adrp	x2, .LANCHOR75
-	strh	w21, [x1, 416]
-	adrp	x21, .LANCHOR10
-	ldrh	w2, [x2, #:lo12:.LANCHOR75]
-	strh	w20, [x1, 692]
-	sub	w0, w0, w2
-	asr	w0, w20, w0
-	strh	w0, [x1, 694]
-	mov	w0, 1
-	strh	w0, [x1, 688]
-	adrp	x0, .LANCHOR204
-	ldrh	w0, [x0, #:lo12:.LANCHOR204]
-	strh	w0, [x1, 698]
-	mov	w1, 20038
-	ldr	x0, [x21, #:lo12:.LANCHOR10]
-	movk	w1, 0x4549, lsl 16
-	str	w1, [x0]
-	bl	ftl_alloc_sys_blk
-	mov	w20, w0
-	mov	w1, 0
-	bl	ftl_erase_phy_blk
-	ldr	x0, [x19, #:lo12:.LANCHOR110]
-	mov	w1, 2
-	strh	w20, [x0, 130]
-	mov	w20, -1
-	strh	wzr, [x0, 140]
-	ldr	x0, [x21, #:lo12:.LANCHOR10]
-	add	x0, x0, 16
-	strh	w20, [x0, 568]
-	strh	w20, [x0, 570]
-	strh	w20, [x0, 572]
-	strh	w20, [x0, 574]
-	bl	ftl_open_sblk_init
-	ldr	x0, [x21, #:lo12:.LANCHOR10]
-	mov	w1, 3
-	add	x0, x0, 48
-	bl	ftl_open_sblk_init
-	ldr	x1, [x19, #:lo12:.LANCHOR110]
-	ldr	x0, [x21, #:lo12:.LANCHOR10]
-	add	x0, x0, 136
-	ldrh	w2, [x1, 134]
-	strh	w2, [x0, -10]
-	strh	w20, [x0, -56]
-	mov	w2, -1
-	strh	w20, [x0, -6]
-	str	w2, [x0, 408]
-	strh	wzr, [x0, -12]
-	strh	wzr, [x0, -16]
-	strh	wzr, [x0, -14]
-	strh	w2, [x1, 126]
-	mov	w2, 256
-	str	wzr, [x0, 384]
-	mov	w1, 255
-	str	wzr, [x0, 388]
-	str	wzr, [x0, 392]
-	bl	ftl_memset
-	mov	w2, 128
-	mov	w1, 255
-	ldr	x0, [x21, #:lo12:.LANCHOR10]
-	add	x0, x0, 392
-	bl	ftl_memset
-	bl	ftl_ext_info_flush
-	mov	w0, 0
-	bl	ftl_info_flush
-	bl	ftl_info_blk_init
-	ldr	x21, [sp, 32]
-	mov	w0, 0
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
+	lsl	w6, w6, w2
+	ldr	x2, [x19, 8]
+	sub	w6, w6, #1
+	lsl	w7, w6, w0
+	lsr	w0, w1, w0
+	bic	w1, w1, w7
+	and	w0, w0, w6
+	bl	flash_prog_page_en
+	b	.L2786
+.L2789:
+	mov	x0, x19
+	bl	zbuf_free
+	adrp	x0, .LC163
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC163
+	bl	printf
+.L2767:
+	ldp	x19, x20, [sp, 64]
+	ldp	x21, x22, [sp, 80]
+	ldp	x23, x24, [sp, 96]
+	ldp	x25, x26, [sp, 112]
+	ldp	x27, x28, [sp, 128]
+	ldp	x29, x30, [sp, 48]
+	add	sp, sp, 224
 	ret
-	.size	ftl_low_format_data_init, .-ftl_low_format_data_init
-	.section	.text.ftl_low_format,"ax",@progbits
+	.size	ftl_dump_write_open_sblk, .-ftl_dump_write_open_sblk
+	.section	.text.gc_ink_check_sblk,"ax",@progbits
 	.align	2
-	.global	ftl_low_format
-	.type	ftl_low_format, %function
-ftl_low_format:
+	.global	gc_ink_check_sblk
+	.type	gc_ink_check_sblk, %function
+gc_ink_check_sblk:
 	stp	x29, x30, [sp, -80]!
-	mov	w1, 0
-	adrp	x0, .LC162
-	add	x0, x0, :lo12:.LC162
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR205
+	adrp	x19, .LANCHOR70
+	add	x0, x19, :lo12:.LANCHOR70
 	stp	x21, x22, [sp, 32]
-	add	x20, x20, :lo12:.LANCHOR205
-	stp	x25, x26, [sp, 64]
-	adrp	x22, .LANCHOR27
-	mov	x25, x22
 	stp	x23, x24, [sp, 48]
-	mov	w19, 8
-	adrp	x23, .LC0
-	bl	printf
-.L2823:
-	ldr	x0, [x22, #:lo12:.LANCHOR27]
-	add	x0, x0, x19, sxtw
-	ldrb	w21, [x0, 32]
-	add	w0, w21, 127
-	and	w0, w0, 255
-	cmp	w0, 125
-	bhi	.L2821
-	mov	w2, 2531
-	mov	x1, x20
-	add	x0, x23, :lo12:.LC0
-	bl	printf
-.L2821:
-	cmp	w21, 255
-	beq	.L2822
-	adrp	x0, .LANCHOR111
-	ldrh	w1, [x0, #:lo12:.LANCHOR111]
-	mov	w0, 0
-	mul	w1, w1, w21
-	bl	flash_erase_block
-.L2822:
-	add	w19, w19, 1
-	cmp	w19, 16
-	bne	.L2823
-	bl	sblk_init
-	adrp	x22, .LANCHOR7
-	bl	ftl_info_blk_init
-	adrp	x19, .LANCHOR6
-	adrp	x0, .LANCHOR195
-	mov	w2, 16384
+	stp	x25, x26, [sp, 64]
+	ldrh	w1, [x0, 2110]
+	ldr	x22, [x0, 2184]
+	cmp	w1, 3
+	bhi	.L2807
+	adrp	x0, .L2809
+	mov	x20, x19
+	add	x0, x0, :lo12:.L2809
+	ldrh	w0, [x0,w1,uxtw #1]
+	adr	x1, .Lrtx2809
+	add	x0, x1, w0, sxth #2
+	br	x0
+.Lrtx2809:
+	.section	.rodata.gc_ink_check_sblk,"a",@progbits
+	.align	0
+	.align	2
+.L2809:
+	.2byte	(.L2808 - .Lrtx2809) / 4
+	.2byte	(.L2810 - .Lrtx2809) / 4
+	.2byte	(.L2811 - .Lrtx2809) / 4
+	.2byte	(.L2812 - .Lrtx2809) / 4
+	.section	.text.gc_ink_check_sblk
+.L2808:
+	adrp	x0, .LANCHOR107
+	add	x24, x0, :lo12:.LANCHOR107
+	ldrh	w0, [x0, #:lo12:.LANCHOR107]
+	cmp	w0, 7
+	bls	.L2806
+	adrp	x0, .LANCHOR57
+	ldrb	w0, [x0, #:lo12:.LANCHOR57]
+	cmp	w0, 2
+	bls	.L2806
+	adrp	x21, .LANCHOR108
+	add	x21, x21, :lo12:.LANCHOR108
 	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR195]
-	bl	ftl_memset
-	ldr	x0, [x22, #:lo12:.LANCHOR7]
-	mov	w3, 1
-	ldrh	w2, [x19, #:lo12:.LANCHOR6]
-	add	x2, x0, x2, lsl 2
-.L2824:
-	cmp	x0, x2
-	bne	.L2825
-	adrp	x21, .LANCHOR110
-	mov	w1, 21574
-	adrp	x24, .LANCHOR69
-	add	x24, x24, :lo12:.LANCHOR69
-	ldr	x0, [x21, #:lo12:.LANCHOR110]
-	movk	w1, 0x494c, lsl 16
-	mov	w20, 0
-	mov	w26, 1
-	strh	wzr, [x0, 148]
-	str	w1, [x0]
-.L2826:
-	ldrh	w0, [x19, #:lo12:.LANCHOR6]
-	adrp	x23, .LANCHOR76
-	cmp	w0, w20
-	bhi	.L2835
-	ldr	x0, [x25, #:lo12:.LANCHOR27]
-	mov	w4, 3
-	ldrb	w2, [x23, #:lo12:.LANCHOR76]
-	mov	w10, 15
-	ldr	x6, [x21, #:lo12:.LANCHOR110]
-	cmp	w2, 1
-	ldr	x1, [x22, #:lo12:.LANCHOR7]
-	ldrb	w0, [x0, 47]
-	csinc	w4, w4, wzr, ne
-	and	w4, w4, 255
-	and	w8, w2, 65535
-	ldrh	w3, [x6, 148]
-	udiv	w0, w0, w2
-	and	w5, w0, 65535
-	ubfiz	x0, x0, 2, 8
-	add	x0, x0, 4
-	add	w20, w5, 1
-	add	x0, x1, x0
-.L2838:
-	cmp	w2, 4
-	add	x1, x1, 4
-	csel	w7, w10, w4, eq
-	strb	w7, [x1, -1]
-	ldrb	w7, [x1, -2]
-	orr	w7, w7, -32
-	strb	w7, [x1, -2]
-	cmp	x1, x0
-	bne	.L2838
-	mul	w5, w5, w8
-	mov	w4, 16
-	add	w0, w8, w3
-	sdiv	w4, w4, w2
-	add	w0, w5, w0, uxth
-	strh	w0, [x6, 148]
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	add	w4, w20, w4
-	and	w4, w4, 65535
-	strh	w4, [x6, 134]
-	tbz	x0, 12, .L2839
-	adrp	x0, .LC163
-	mov	w3, w20
-	mov	w2, 128
-	mov	w1, 2590
-	add	x0, x0, :lo12:.LC163
-	bl	printf
-.L2839:
-	ldr	x0, [x21, #:lo12:.LANCHOR110]
-	mov	w2, 128
-	mov	w1, 255
-	add	x0, x0, 160
-	bl	ftl_memset
-	adrp	x0, .LANCHOR112
-	ldrb	w10, [x23, #:lo12:.LANCHOR76]
-	adrp	x3, .LANCHOR75
-	ldr	x2, [x21, #:lo12:.LANCHOR110]
-	ldrb	w16, [x0, #:lo12:.LANCHOR112]
-	adrp	x0, .LANCHOR32
-	and	w11, w10, 65535
-	ldr	x15, [x22, #:lo12:.LANCHOR7]
-	ldrb	w4, [x0, #:lo12:.LANCHOR32]
-	mov	w0, 24
-	ldrh	w8, [x2, 134]
-	sub	w0, w0, w4
-	ldrh	w4, [x3, #:lo12:.LANCHOR75]
-	mul	w1, w20, w11
-	mov	w3, 0
-	sub	w0, w0, w4
-	mov	w4, 1
-	and	w1, w1, 65535
-	lsl	w4, w4, w0
-	and	w4, w4, 65535
-.L2840:
-	cmp	w20, w8
-	bcc	.L2846
-	ldrh	w0, [x19, #:lo12:.LANCHOR6]
-	strh	w3, [x2, 112]
-	sub	w0, w0, w8
-	strh	wzr, [x2, 114]
-	strh	w0, [x2, 116]
-	strh	wzr, [x2, 118]
-	strh	w8, [x2, 132]
-	bl	ftl_low_format_data_init
-	mov	w0, 0
+	mov	x0, x21
+	bl	_list_get_gc_head_node
+	and	w0, w0, 65535
+	mov	w23, 65535
+	cmp	w0, w23
+	beq	.L2806
+	adrp	x22, .LANCHOR9
+	ubfiz	x0, x0, 2, 16
+	ldr	x1, [x22, #:lo12:.LANCHOR9]
+	ldrh	w0, [x1, x0]
+	and	w0, w0, 2047
+	cmp	w0, 2
+	bgt	.L2806
+	add	x20, x19, :lo12:.LANCHOR70
+	mov	w0, 1
+	bl	buf_alloc
+	str	x0, [x20, 2184]
+	cbz	x0, .L2806
+	mov	x2, x24
+	mov	w1, 0
+	mov	x0, x21
+	bl	_list_pop_index_node
+	and	w14, w0, 65535
+	cmp	w14, w23
+	bne	.L2816
+	ldr	x0, [x20, 2184]
+	bl	zbuf_free
+	str	xzr, [x20, 2184]
+.L2806:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2825:
-	ldrb	w1, [x0, 2]
-	add	x0, x0, 4
-	and	w1, w1, 31
-	bfi	w1, w3, 3, 2
-	strb	w1, [x0, -2]
-	b	.L2824
-.L2835:
-	adrp	x0, .LANCHOR82
-	strh	w20, [x24]
-	ldrb	w0, [x0, #:lo12:.LANCHOR82]
-	cbnz	w0, .L2827
-	mov	w0, w20
-	bl	ftl_test_block
-.L2827:
-	ldrb	w11, [x23, #:lo12:.LANCHOR76]
-	adrp	x0, .LANCHOR112
-	ldr	x6, [x22, #:lo12:.LANCHOR7]
-	mov	w7, 0
-	ldrb	w14, [x0, #:lo12:.LANCHOR112]
-	mov	w10, 0
-	ldr	x13, [x21, #:lo12:.LANCHOR110]
-	mov	w8, 0
-	mul	w12, w20, w11
-	add	x6, x6, x20, uxth 2
-.L2828:
-	cmp	w8, w14
-	bcs	.L2832
-	add	w15, w11, w7
-	b	.L2833
-.L2831:
-	add	w1, w7, w12
-	mov	w0, w8
-	bl	flash_check_bad_block
-	cbz	w0, .L2829
-	ldrb	w1, [x6, 3]
-	lsl	w0, w26, w7
-	orr	w0, w0, w1
-	strb	w0, [x6, 3]
-	ldrh	w0, [x13, 148]
-	add	w0, w0, 1
-	strh	w0, [x13, 148]
-.L2830:
-	add	w7, w7, 1
-.L2833:
-	cmp	w7, w15
-	bne	.L2831
-	add	w8, w8, 1
-	sub	w12, w12, w11
-	and	w8, w8, 65535
-	b	.L2828
-.L2829:
-	add	w10, w10, 1
-	and	w10, w10, 65535
-	b	.L2830
+.L2816:
+	add	x1, x20, 2162
+	mov	w0, w14
+	bl	ftl_get_blk_list_in_sblk
+	strb	w0, [x20, 2155]
+	mov	w0, 1
+	strh	w0, [x20, 2110]
+	ldr	x0, [x22, #:lo12:.LANCHOR9]
+	strh	w14, [x20, 2146]
+	ubfiz	x14, x14, 2, 16
+	strh	wzr, [x20, 2148]
+	ldrh	w1, [x0, x14]
+	adrp	x0, .LANCHOR131
+	ldrb	w2, [x0, #:lo12:.LANCHOR131]
+	ldr	x0, [x20, 2184]
+	lsl	w2, w2, 9
+	tbz	x1, 0, .L2817
+	mov	w1, 85
 .L2832:
-	cbnz	w10, .L2834
-	ldrb	w0, [x6, 2]
-	orr	w0, w0, -32
-	strb	w0, [x6, 2]
-.L2834:
-	add	w20, w20, 1
-	and	w20, w20, 65535
-	b	.L2826
-.L2846:
-	add	x13, x15, x20, uxth 2
-	mov	w6, 0
-	mov	w12, 0
-	mov	w5, 0
-	ldrb	w0, [x13, 2]
-	orr	w0, w0, -32
-	strb	w0, [x13, 2]
-.L2841:
-	cmp	w5, w16
-	bcc	.L2848
-	add	w20, w20, 1
-	add	w1, w1, w11
-	and	w20, w20, 65535
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldr	x0, [x0, 8]
+	ldp	x29, x30, [sp], 80
+	b	ftl_memset
+.L2817:
+	mov	w1, 170
+	b	.L2832
+.L2810:
+	add	x20, x19, :lo12:.LANCHOR70
+	mov	w1, 0
+	ldrh	w0, [x20, 2146]
+	bl	ftl_erase_sblk
+	mov	w0, 2
+	strh	w0, [x20, 2110]
+	b	.L2806
+.L2811:
+	adrp	x21, .LANCHOR111
+	mov	w24, 65280
+	adrp	x23, .LANCHOR31
+	add	x21, x21, :lo12:.LANCHOR111
+	add	x23, x23, :lo12:.LANCHOR31
+	mov	w19, 0
+	movk	w24, 0x55aa, lsl 16
+	bl	sblk_wait_write_queue_completed
+.L2818:
+	add	x0, x20, :lo12:.LANCHOR70
+	ldrb	w1, [x0, 2155]
+	cmp	w1, w19
+	bhi	.L2820
+	ldrh	w1, [x0, 2148]
+	adrp	x2, .LANCHOR94
+	add	w1, w1, 1
+	ldrh	w2, [x2, #:lo12:.LANCHOR94]
 	and	w1, w1, 65535
-	b	.L2840
-.L2844:
-	ldrb	w14, [x13, 3]
-	add	w17, w12, w7
-	asr	w14, w14, w17
-	tbnz	x14, 0, .L2842
-	cmp	w10, 1
-	bls	.L2847
-	and	w0, w0, 1
-	add	w0, w1, w0
+	strh	w1, [x0, 2148]
+	cmp	w2, w1
+	bhi	.L2806
+	mov	w1, 3
+	strh	wzr, [x0, 2148]
+	strh	w1, [x0, 2110]
+	b	.L2806
+.L2820:
+	add	x1, x0, x19, sxtw 1
+	ldrh	w2, [x1, 2162]
+	mov	w1, 65535
+	cmp	w2, w1
+	beq	.L2819
+	ldrh	w0, [x0, 2148]
+	mov	w6, 1
+	ldrh	w1, [x21]
+	mov	w5, 0
+	ldr	x3, [x22, 24]
+	madd	w1, w1, w2, w0
+	ldr	x2, [x22, 8]
+	mov	w0, 24
+	stp	w1, w24, [x2]
+	str	wzr, [x3]
+	ldrb	w4, [x23]
+	sub	w0, w0, w4
+	lsl	w6, w6, w4
+	adrp	x4, .LANCHOR131
+	sub	w6, w6, #1
+	ldrb	w4, [x4, #:lo12:.LANCHOR131]
+	lsl	w7, w6, w0
+	lsr	w0, w1, w0
+	bic	w1, w1, w7
+	and	w0, w0, w6
+	bl	flash_prog_page_en
+.L2819:
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L2818
+.L2812:
+	adrp	x25, .LANCHOR111
+	add	x19, x19, :lo12:.LANCHOR70
+	add	x25, x25, :lo12:.LANCHOR111
+	mov	w21, 0
+	mov	w26, 65535
+	bl	sblk_wait_write_queue_completed
+.L2821:
+	ldrb	w0, [x19, 2155]
+	cmp	w0, w21
+	bhi	.L2825
+	ldrh	w0, [x19, 2148]
+	adrp	x1, .LANCHOR94
+	add	w0, w0, 1
+	ldrh	w1, [x1, #:lo12:.LANCHOR94]
 	and	w0, w0, 65535
-.L2843:
-	add	x14, x2, x3, sxtw 1
-	add	w3, w3, 1
-	and	w3, w3, 65535
-	add	w0, w0, w6
-	strh	w0, [x14, 160]
-.L2842:
-	add	x7, x7, 1
-.L2845:
-	and	w0, w7, 65535
-	cmp	w0, w11
-	bcc	.L2844
-	add	w5, w5, 1
-	add	w6, w4, w6
-	and	w5, w5, 65535
-	add	w12, w12, w10
-	and	w6, w6, 65535
-	b	.L2841
-.L2847:
-	mov	w0, w1
-	b	.L2843
-.L2848:
-	mov	x7, 0
-	b	.L2845
-	.size	ftl_low_format, .-ftl_low_format
-	.section	.text.ftl_re_low_format,"ax",@progbits
-	.align	2
-	.global	ftl_re_low_format
-	.type	ftl_re_low_format, %function
-ftl_re_low_format:
-	stp	x29, x30, [sp, -16]!
-	mov	w1, 1
+	strh	w0, [x19, 2148]
+	cmp	w1, w0
+	bhi	.L2806
+	ldr	x0, [x19, 2184]
+	strh	wzr, [x19, 2110]
+	bl	zbuf_free
+	str	xzr, [x19, 2184]
+	ldrh	w0, [x19, 2112]
+	cmp	w0, 15
+	bhi	.L2826
+	add	w1, w0, 1
+	add	x0, x19, x0, sxtw 1
+	strh	w1, [x19, 2112]
+	ldrh	w1, [x19, 2146]
+	strh	w1, [x0, 2114]
+.L2827:
+	add	x19, x20, :lo12:.LANCHOR70
 	adrp	x0, .LC164
+	ldp	x21, x22, [sp, 32]
 	add	x0, x0, :lo12:.LC164
-	add	x29, sp, 0
-	bl	printf
-	bl	sblk_init
-	bl	ftl_info_blk_init
-	bl	ftl_ext_info_init
-	adrp	x0, .LANCHOR110
-	adrp	x2, .LANCHOR6
-	mov	w3, 0
-	mov	w4, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR110]
-	mov	w5, 0
-	ldrh	w7, [x2, #:lo12:.LANCHOR6]
-	adrp	x2, .LANCHOR7
-	ldr	x2, [x2, #:lo12:.LANCHOR7]
-	ldrh	w1, [x0, 134]
-	add	x2, x2, x1, uxth 2
-.L2859:
-	cmp	w1, w7
-	bcc	.L2863
-	strh	w5, [x0, 114]
-	strh	w4, [x0, 118]
-	strh	w3, [x0, 116]
-	strh	wzr, [x0, 122]
-	strh	wzr, [x0, 120]
-	strh	wzr, [x0, 124]
-	bl	ftl_low_format_data_init
-	mov	w0, 0
-	ldp	x29, x30, [sp], 16
-	ret
-.L2863:
-	ldrb	w6, [x2, 2]
-	and	w8, w6, 31
-	strb	w8, [x2, 2]
-	ands	w6, w6, 24
-	bne	.L2860
-	add	w5, w5, 1
-	and	w5, w5, 65535
-.L2861:
-	add	w1, w1, 1
-	add	x2, x2, 4
-	and	w1, w1, 65535
-	b	.L2859
-.L2860:
-	cmp	w6, 16
-	bne	.L2862
-	add	w4, w4, 1
-	and	w4, w4, 65535
-	b	.L2861
-.L2862:
-	add	w3, w3, 1
-	and	w3, w3, 65535
-	b	.L2861
-	.size	ftl_re_low_format, .-ftl_re_low_format
-	.section	.text.ftl_prog_ppa_page,"ax",@progbits
-	.align	2
-	.global	ftl_prog_ppa_page
-	.type	ftl_prog_ppa_page, %function
-ftl_prog_ppa_page:
-	adrp	x4, .LANCHOR32
-	mov	w5, 1
-	ldrb	w6, [x4, #:lo12:.LANCHOR32]
-	mov	w4, 24
-	sub	w4, w4, w6
-	lsl	w7, w5, w4
-	sub	w7, w7, #1
-	lsl	w5, w5, w6
-	sub	w6, w5, #1
-	lsr	w5, w0, w4
-	mov	w4, w3
-	mov	x3, x2
-	mov	x2, x1
-	and	w1, w7, w0
-	and	w0, w6, w5
-	b	ftl_prog_page
-	.size	ftl_prog_ppa_page, .-ftl_prog_ppa_page
-	.section	.text.ftl_write_last_log_page,"ax",@progbits
-	.align	2
-	.global	ftl_write_last_log_page
-	.type	ftl_write_last_log_page, %function
-ftl_write_last_log_page:
-	ldrh	w1, [x0, 6]
-	cmp	w1, 1
-	bne	.L2868
-	stp	x29, x30, [sp, -48]!
-	adrp	x1, .LANCHOR117
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	x19, x0
-	stp	x21, x22, [sp, 32]
-	ldr	x20, [x1, #:lo12:.LANCHOR117]
-	ldrh	w22, [x0, 12]
-	bl	ftl_get_new_free_page
-	mov	w21, w0
-	cmn	w0, #1
-	beq	.L2869
-	ldrh	w0, [x19]
-	add	x20, x20, x22, uxth 2
-	bl	ftl_vpn_decrement
-	adrp	x0, .LANCHOR191
-	mov	w1, 15555
-	add	x7, x0, :lo12:.LANCHOR191
-	movk	w1, 0xf55f, lsl 16
-	str	w1, [x0, #:lo12:.LANCHOR191]
-	adrp	x0, .LANCHOR95
-	ldrh	w1, [x0, #:lo12:.LANCHOR95]
-	adrp	x0, .LANCHOR80
-	ldrb	w0, [x0, #:lo12:.LANCHOR80]
-	mul	w1, w1, w0
-	mov	x0, x20
-	lsl	w1, w1, 2
-	bl	js_hash
-	mov	x1, x7
-	mov	x2, 0
-	stp	w0, wzr, [x7, 4]
-	mov	w0, 2
-	str	wzr, [x7, 12]
-	str	wzr, [x1, 16]!
-	bl	ftl_debug_info_fill
-	mov	x2, x7
-	adrp	x0, .LANCHOR131
-	mov	x1, x20
-	ldrb	w3, [x0, #:lo12:.LANCHOR131]
-	mov	w0, w21
-	bl	ftl_prog_ppa_page
-.L2869:
-	mov	w0, 0
+	ldrh	w2, [x19, 2112]
+	ldrh	w1, [x19, 2146]
+	ldp	x23, x24, [sp, 48]
 	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 48
-	ret
-.L2868:
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	b	printf
+.L2825:
+	add	x24, x19, x21, sxtw 1
+	add	x24, x24, 16
+	ldrh	w0, [x24, 2146]
+	cmp	w0, w26
+	beq	.L2823
+	ldrh	w1, [x19, 2148]
+	ldrh	w23, [x25]
+	madd	w23, w23, w0, w1
+	mov	w1, 1
+	str	w23, [x22, 40]
+	mov	x0, x22
+	bl	sblk_read_page
+	ldr	x0, [x22, 8]
+	ldr	w0, [x0]
+	cmp	w23, w0
+	beq	.L2823
+	mov	w0, w23
+	bl	ftl_mask_bad_block
 	mov	w0, -1
-	ret
-	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
-	.section	.text.pm_write_page,"ax",@progbits
+	strh	w0, [x24, 2146]
+.L2823:
+	add	w21, w21, 1
+	and	w21, w21, 65535
+	b	.L2821
+.L2826:
+	ldrh	w0, [x19, 2146]
+	bl	zftl_insert_free_list
+	b	.L2827
+.L2807:
+	strh	wzr, [x0, 2110]
+	b	.L2806
+	.size	gc_ink_check_sblk, .-gc_ink_check_sblk
+	.section	.text.ftl_ink_check_sblk,"ax",@progbits
 	.align	2
-	.global	pm_write_page
-	.type	pm_write_page, %function
-pm_write_page:
-	stp	x29, x30, [sp, -96]!
+	.global	ftl_ink_check_sblk
+	.type	ftl_ink_check_sblk, %function
+ftl_ink_check_sblk:
+	stp	x29, x30, [sp, -144]!
 	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x24, .LANCHOR9
 	stp	x19, x20, [sp, 16]
-	mov	w19, w0
+	and	w19, w0, 65535
+	ldr	x0, [x24, #:lo12:.LANCHOR9]
+	ubfiz	x23, x19, 2, 16
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR95
-	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR111
-	adrp	x24, .LANCHOR110
-	mov	x23, x1
-	add	x21, x21, :lo12:.LANCHOR95
-	mov	x20, x24
-	add	x22, x22, :lo12:.LANCHOR111
+	mov	w1, w19
 	stp	x25, x26, [sp, 64]
-	str	x27, [sp, 80]
-	mov	w25, 65535
-.L2875:
-	ldr	x0, [x24, #:lo12:.LANCHOR110]
-	ldr	w1, [x0, 48]
-	ldrh	w2, [x0, 696]
-	add	w1, w1, 1
-	str	w1, [x0, 48]
-	ldrh	w1, [x21]
-	cmp	w2, w1
-	bcs	.L2876
-	ldrh	w0, [x0, 692]
-	cmp	w0, w25
-	bne	.L2877
-.L2876:
-	bl	pm_alloc_new_blk
-	mov	w0, 0
-	bl	ftl_info_flush
-.L2877:
-	ldr	x0, [x20, #:lo12:.LANCHOR110]
-	ldrh	w0, [x0, 692]
-	cmp	w0, w25
-	bne	.L2878
-	adrp	x1, .LANCHOR206
-	adrp	x0, .LC0
-	mov	w2, 303
-	add	x1, x1, :lo12:.LANCHOR206
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2878:
-	ldr	x0, [x20, #:lo12:.LANCHOR110]
-	adrp	x27, .LANCHOR207
-	ldrh	w1, [x22]
-	mov	w2, 64
-	ldrh	w26, [x0, 692]
-	ldrh	w0, [x0, 696]
-	madd	w26, w26, w1, w0
-	ldr	x0, [x27, #:lo12:.LANCHOR207]
-	mov	w1, 0
-	bl	ftl_memset
-	ldr	x6, [x27, #:lo12:.LANCHOR207]
-	ldr	x7, [x20, #:lo12:.LANCHOR110]
-	str	w19, [x6]
-	ldr	w0, [x7, 48]
-	str	w0, [x6, 4]
-	adrp	x0, .LANCHOR131
-	ldrb	w8, [x0, #:lo12:.LANCHOR131]
-	mov	x0, x23
-	lsl	w1, w8, 9
-	bl	js_hash
-	str	w0, [x6, 8]
-	ldrb	w0, [x7, 694]
-	mov	x2, x23
-	mov	w1, w26
-	mov	w4, w8
-	mov	x3, x6
-	bl	ftl_prog_page
-	ldr	x2, [x20, #:lo12:.LANCHOR110]
-	ldrh	w1, [x2, 696]
-	add	w1, w1, 1
-	and	w1, w1, 65535
-	strh	w1, [x2, 696]
-	cmp	w1, 1
-	adrp	x1, .LANCHOR208
-	beq	.L2879
-	ldrb	w3, [x1, #:lo12:.LANCHOR208]
-	cbz	w3, .L2880
-.L2879:
-	strb	wzr, [x1, #:lo12:.LANCHOR208]
-	b	.L2875
-.L2880:
-	cmn	w0, #1
-	bne	.L2882
-	mov	w1, w26
+	stp	x27, x28, [sp, 80]
+	ldr	w3, [x0, x23]
+	ldrh	w2, [x0, x23]
 	adrp	x0, .LC165
 	add	x0, x0, :lo12:.LC165
+	ubfx	x3, x3, 11, 8
+	and	w2, w2, 2047
 	bl	printf
-	b	.L2875
-.L2882:
-	ldrh	w0, [x2, 698]
+	mov	w0, 65535
 	cmp	w19, w0
-	bcs	.L2883
-	add	x19, x2, x19, uxtw 2
-	str	w26, [x19, 704]
-.L2883:
-	mov	w0, 0
-	ldr	x27, [sp, 80]
+	beq	.L2833
+	adrp	x0, .LANCHOR8
+	ldrh	w0, [x0, #:lo12:.LANCHOR8]
+	cmp	w0, w19
+	bls	.L2833
+	add	x21, x29, 144
+	mov	w1, 0
+	mov	w0, w19
+	bl	ftl_erase_sblk
+	mov	w0, w19
+	adrp	x27, .LANCHOR131
+	strh	w19, [x21, -32]!
+	add	x1, x21, 16
+	bl	ftl_get_blk_list_in_sblk
+	strb	w0, [x29, 121]
+	mov	w0, 1
+	bl	buf_alloc
+	mov	x20, x0
+	ldr	x0, [x24, #:lo12:.LANCHOR9]
+	ldrb	w2, [x27, #:lo12:.LANCHOR131]
+	ldrh	w0, [x0, x23]
+	lsl	w2, w2, 9
+	and	w0, w0, 2047
+	cmp	w0, 1
+	bgt	.L2835
+	mov	w1, 85
+.L2851:
+	ldr	x0, [x20, 8]
+	adrp	x28, .LANCHOR111
+	add	x28, x28, :lo12:.LANCHOR111
+	mov	w26, 0
+	bl	ftl_memset
+	bl	sblk_wait_write_queue_completed
+	mov	w7, 65280
+	movk	w7, 0x55aa, lsl 16
+.L2837:
+	adrp	x25, .LANCHOR94
+	ldrh	w0, [x25, #:lo12:.LANCHOR94]
+	cmp	w0, w26
+	bls	.L2840
+	adrp	x25, .LANCHOR31
+	mov	w22, 0
+	add	x25, x25, :lo12:.LANCHOR31
+	b	.L2841
+.L2835:
+	mov	w1, 170
+	b	.L2851
+.L2839:
+	add	x0, x21, x22, sxtw 1
+	mov	w1, 65535
+	ldrh	w0, [x0, 16]
+	cmp	w0, w1
+	beq	.L2838
+	ldrh	w1, [x28]
+	mov	w6, 1
+	ldr	x2, [x20, 8]
+	mov	w5, 0
+	ldr	x3, [x20, 24]
+	str	w7, [x29, 108]
+	madd	w1, w1, w0, w26
+	mov	w0, 24
+	stp	w1, w7, [x2]
+	str	wzr, [x3]
+	ldrb	w4, [x25]
+	sub	w0, w0, w4
+	lsl	w6, w6, w4
+	ldrb	w4, [x27, #:lo12:.LANCHOR131]
+	sub	w6, w6, #1
+	lsl	w8, w6, w0
+	lsr	w0, w1, w0
+	bic	w1, w1, w8
+	and	w0, w0, w6
+	bl	flash_prog_page_en
+	ldr	w7, [x29, 108]
+.L2838:
+	add	w22, w22, 1
+	and	w22, w22, 65535
+.L2841:
+	ldrb	w0, [x29, 121]
+	cmp	w0, w22
+	bhi	.L2839
+	add	w26, w26, 1
+	and	w26, w26, 65535
+	b	.L2837
+.L2840:
+	adrp	x26, .LANCHOR111
+	add	x26, x26, :lo12:.LANCHOR111
+	mov	w28, 0
+.L2842:
+	ldrh	w0, [x25, #:lo12:.LANCHOR94]
+	cmp	w0, w28
+	bls	.L2847
+	mov	w27, 0
+	b	.L2848
+.L2846:
+	sxtw	x22, w27
+	mov	w1, 65535
+	add	x22, x22, 8
+	lsl	x22, x22, 1
+	ldrh	w0, [x21, x22]
+	cmp	w0, w1
+	beq	.L2844
+	ldrh	w4, [x26]
+	mov	w1, 1
+	madd	w4, w4, w0, w28
+	mov	x0, x20
+	str	w4, [x20, 40]
+	str	w4, [x29, 108]
+	bl	sblk_read_page
+	ldr	x0, [x20, 8]
+	ldr	w4, [x29, 108]
+	ldr	w0, [x0]
+	cmp	w4, w0
+	beq	.L2844
+	mov	w0, w4
+	bl	ftl_mask_bad_block
+	mov	w0, -1
+	strh	w0, [x21, x22]
+.L2844:
+	add	w2, w27, 1
+	and	w27, w2, 65535
+.L2848:
+	ldrb	w0, [x29, 121]
+	cmp	w0, w27
+	bhi	.L2846
+	add	w3, w28, 1
+	and	w28, w3, 65535
+	b	.L2842
+.L2847:
+	mov	x0, x20
+	bl	zbuf_free
+	ldr	x0, [x24, #:lo12:.LANCHOR9]
+	mov	w1, w19
+	ldr	w3, [x0, x23]
+	ldrh	w2, [x0, x23]
+	adrp	x0, .LC166
+	add	x0, x0, :lo12:.LC166
+	ubfx	x3, x3, 11, 8
+	and	w2, w2, 2047
+	bl	printf
+.L2833:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 96
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 144
 	ret
-	.size	pm_write_page, .-pm_write_page
-	.section	.text.ftl_dump_write_open_sblk,"ax",@progbits
+	.size	ftl_ink_check_sblk, .-ftl_ink_check_sblk
+	.section	.text.ftl_alloc_sblk,"ax",@progbits
 	.align	2
-	.global	ftl_dump_write_open_sblk
-	.type	ftl_dump_write_open_sblk, %function
-ftl_dump_write_open_sblk:
-	sub	sp, sp, #224
-	stp	x29, x30, [sp, 48]
-	add	x29, sp, 48
-	stp	x19, x20, [sp, 64]
+	.global	ftl_alloc_sblk
+	.type	ftl_alloc_sblk, %function
+ftl_alloc_sblk:
+	stp	x29, x30, [sp, -80]!
+	cmp	w0, 5
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	and	w23, w0, 65535
+	stp	x21, x22, [sp, 32]
+	mov	w1, w23
+	stp	x19, x20, [sp, 16]
+	cset	w22, eq
+	mov	w21, w0
+	str	x25, [sp, 64]
+	mov	w0, 0
+	bl	zftl_get_free_sblk
+	and	w19, w0, 65535
+	mov	w0, 65535
+	cmp	w19, w0
+	beq	.L2854
+	adrp	x0, .LANCHOR9
+	ubfiz	x25, x19, 2, 16
+	lsl	w22, w22, 1
+	mov	w24, w19
+	ldr	x20, [x0, #:lo12:.LANCHOR9]
+	mov	x23, x0
+	add	x20, x20, x25
+	ldrb	w1, [x20, 2]
+	tst	w1, 224
+	beq	.L2855
+	adrp	x1, .LANCHOR200
+	adrp	x0, .LC0
+	mov	w2, 1012
+	add	x1, x1, :lo12:.LANCHOR200
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2855:
+	ldrb	w0, [x20, 2]
+	bfi	w0, w21, 5, 3
+	ubfx	x1, x0, 3, 2
+	orr	w1, w22, w1
+	bfi	w0, w1, 3, 2
+	strb	w0, [x20, 2]
+	and	w1, w0, 24
+	cmp	w1, 24
+	bne	.L2856
+	cbnz	w22, .L2856
+	mov	w1, 1
+	bfi	w0, w1, 3, 2
+	strb	w0, [x20, 2]
+.L2856:
+	adrp	x0, .LANCHOR110
+	ldr	x0, [x0, #:lo12:.LANCHOR110]
+	ldrh	w0, [x0, 150]
+	cbz	w0, .L2857
+	ldr	x0, [x23, #:lo12:.LANCHOR9]
+	ldrh	w0, [x0, x25]
+	tst	x0, 2047
+	bne	.L2857
+	cbnz	w22, .L2857
+	mov	w0, w24
+	bl	ftl_ink_check_sblk
+.L2857:
+	mov	w0, w19
+	ldr	x25, [sp, 64]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	ret
+.L2854:
+	bl	print_ftl_debug_info
+	adrp	x20, .LC167
+	mov	w2, w21
+	add	x20, x20, :lo12:.LC167
+	mov	w1, w19
+	mov	x0, x20
+	bl	printf
+	mov	w1, w23
+	mov	w0, 0
+	bl	zftl_get_free_sblk
+	and	w19, w0, 65535
+	mov	w2, w21
+	mov	w1, w19
+	mov	x0, x20
+	bl	printf
+	bl	dump_all_list_info
+	mov	w2, 1031
+	adrp	x1, .LANCHOR200
+	adrp	x0, .LC0
+	add	x1, x1, :lo12:.LANCHOR200
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+	b	.L2857
+	.size	ftl_alloc_sblk, .-ftl_alloc_sblk
+	.section	.text.ftl_open_sblk_init,"ax",@progbits
+	.align	2
+	.global	ftl_open_sblk_init
+	.type	ftl_open_sblk_init, %function
+ftl_open_sblk_init:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR79
+	stp	x23, x24, [sp, 48]
+	adrp	x22, .LC168
+	stp	x19, x20, [sp, 16]
+	adrp	x24, .LANCHOR94
+	mov	x19, x0
+	mov	w23, w1
+	add	x24, x24, :lo12:.LANCHOR94
+	add	x21, x21, :lo12:.LANCHOR79
+	add	x22, x22, :lo12:.LC168
+	stp	x25, x26, [sp, 64]
+.L2867:
+	mov	w25, 65535
+.L2868:
+	mov	w0, w23
+	bl	ftl_alloc_sblk
 	and	w20, w0, 65535
-	adrp	x0, .LANCHOR6
-	stp	x21, x22, [sp, 80]
-	stp	x23, x24, [sp, 96]
-	ldrh	w0, [x0, #:lo12:.LANCHOR6]
-	stp	x25, x26, [sp, 112]
-	stp	x27, x28, [sp, 128]
-	cmp	w0, w20
-	bls	.L2888
-	adrp	x0, .LANCHOR84
-	str	x0, [x29, 120]
-	ldrb	w1, [x0, #:lo12:.LANCHOR84]
-	cbnz	w1, .L2890
-	adrp	x0, .LANCHOR81
-	ldrb	w0, [x0, #:lo12:.LANCHOR81]
-	cbz	w0, .L2888
-.L2890:
-	adrp	x0, .LANCHOR36
-	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbnz	w0, .L2888
-	adrp	x0, .LANCHOR7
-	ubfiz	x14, x20, 2, 16
-	mov	x15, x0
-	ldr	x1, [x0, #:lo12:.LANCHOR7]
-	add	x1, x1, x14
-	ldrb	w1, [x1, 2]
-	and	w1, w1, 224
-	cmp	w1, 160
-	bne	.L2912
-	adrp	x0, .LANCHOR79
-	ldrb	w25, [x0, #:lo12:.LANCHOR79]
-.L2891:
-	add	x21, x29, 176
-	adrp	x23, .LANCHOR95
+	cmp	w20, w25
+	beq	.L2868
+	mov	w1, 0
+	mov	w0, w20
+	bl	ftl_erase_sblk
+	add	x1, x19, 16
 	mov	w0, w20
-	adrp	x26, .LANCHOR111
-	add	x26, x26, :lo12:.LANCHOR111
-	mov	w27, 0
-	strh	w20, [x21, -32]!
-	mov	w28, 0
-	add	x1, x21, 16
 	bl	ftl_get_blk_list_in_sblk
-	ldrh	w1, [x23, #:lo12:.LANCHOR95]
 	and	w0, w0, 255
-	strb	w0, [x29, 153]
-	strb	wzr, [x29, 149]
-	strh	wzr, [x29, 146]
-	mul	w0, w0, w1
-	strh	wzr, [x29, 154]
-	strh	w0, [x29, 150]
-	ldr	x0, [x15, #:lo12:.LANCHOR7]
-	add	x1, x0, x14
-	ldr	w5, [x0, x14]
-	ldrb	w2, [x1, 2]
+	ldrh	w1, [x24]
+	cmp	w23, 2
+	strb	w0, [x19, 9]
+	strh	w20, [x19]
+	strh	wzr, [x19, 2]
+	mul	w0, w1, w0
+	strb	wzr, [x19, 5]
+	strh	w0, [x19, 6]
+	strh	wzr, [x19, 10]
+	strb	w23, [x19, 4]
+	beq	.L2871
+	ldrb	w0, [x21]
+	mul	w0, w1, w0
+	and	w0, w0, 65535
+.L2869:
+	ldrb	w2, [x21]
+	adrp	x26, .LANCHOR11
+	strh	w0, [x19, 12]
+	ubfiz	x25, x20, 1, 16
+	mul	w2, w2, w1
+	adrp	x1, .LANCHOR117
+	ldr	x3, [x1, #:lo12:.LANCHOR117]
+	mov	w1, 255
+	lsl	w2, w2, 2
+	add	x0, x3, x0, uxth 2
+	bl	ftl_memset
+	ldr	x0, [x26, #:lo12:.LANCHOR11]
+	ldrh	w1, [x19, 6]
+	strh	w1, [x0, x25]
+	ldrb	w0, [x19, 9]
+	cbnz	w0, .L2866
 	mov	w1, w20
-	ldrh	w4, [x0, x14]
-	adrp	x0, .LC166
-	ubfx	x5, x5, 11, 8
-	add	x0, x0, :lo12:.LC166
-	ubfx	x3, x2, 3, 2
-	and	w4, w4, 2047
-	ubfx	x2, x2, 5, 3
+	mov	x0, x22
 	bl	printf
+	ldr	x0, [x26, #:lo12:.LANCHOR11]
+	mov	w1, -1
+	strh	w1, [x0, x25]
+	mov	w0, 7
+	strb	w0, [x19, 4]
+	b	.L2867
+.L2871:
+	mov	w0, 0
+	b	.L2869
+.L2866:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+	.size	ftl_open_sblk_init, .-ftl_open_sblk_init
+	.section	.text.ftl_low_format_data_init,"ax",@progbits
+	.align	2
+	.global	ftl_low_format_data_init
+	.type	ftl_low_format_data_init, %function
+ftl_low_format_data_init:
+	stp	x29, x30, [sp, -48]!
+	adrp	x0, .LANCHOR197
+	mov	w2, 16384
+	mov	w1, 0
+	add	x29, sp, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR197]
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR110
+	str	x21, [sp, 32]
+	bl	ftl_memset
+	bl	zftl_sblk_list_init
 	mov	w0, 1
-	bl	buf_alloc
-	mov	x19, x0
-	mov	w10, 0
-	add	x0, x23, :lo12:.LANCHOR95
-	str	x0, [x29, 128]
-.L2892:
-	ldr	x0, [x29, 128]
-	ldrh	w0, [x0]
-	cmp	w0, w27
-	bls	.L2900
-	lsl	w22, w27, 1
-	mov	w28, 0
-	sub	w0, w22, #1
-	add	w22, w22, w27
-	str	w0, [x29, 140]
-	sub	w22, w22, #1
-	adrp	x0, .LC167
-	add	x0, x0, :lo12:.LC167
-	str	x0, [x29, 112]
-	b	.L2903
-.L2912:
-	mov	w25, 1
-	b	.L2891
-.L2901:
-	ldrh	w12, [x21, x24]
-	mov	w0, 65535
-	cmp	w12, w0
-	bne	.L2893
-.L2899:
-	add	w10, w10, 1
-	and	w10, w10, 65535
-.L2894:
-	cmp	w25, w10
-	bcs	.L2901
-	add	w11, w28, 1
-	and	w28, w11, 65535
-.L2903:
-	ldrb	w0, [x29, 153]
-	cmp	w0, w28
-	bls	.L2902
-	sxtw	x24, w28
-	mov	w10, 1
-	add	x24, x24, 8
-	lsl	x24, x24, 1
-	b	.L2894
-.L2893:
-	ldrh	w3, [x26]
-	cmp	w25, 3
-	mul	w3, w3, w12
-	add	w0, w3, w10
-	bne	.L2895
-	adrp	x1, .LANCHOR37
-	ldrb	w1, [x1, #:lo12:.LANCHOR37]
-	cbz	w1, .L2896
-	adrp	x1, .LANCHOR79
-	add	w0, w0, w22
-	ldrb	w3, [x1, #:lo12:.LANCHOR79]
-.L2926:
-	orr	w3, w0, w3, lsl 24
-	b	.L2897
-.L2896:
-	add	w3, w27, w3
-	orr	w3, w3, w10, lsl 24
-.L2897:
-	str	w3, [x19, 40]
-	mov	w1, 1
-	stp	w10, w12, [x29, 104]
-	mov	x0, x19
-	str	w3, [x29, 136]
-	bl	sblk_read_page
-	ldr	w13, [x19, 52]
-	ldp	w10, w12, [x29, 104]
-	cmp	w13, 512
-	ccmn	w13, #1, 4, ne
-	ldr	w3, [x29, 136]
-	bne	.L2899
-	ldr	x1, [x19, 24]
-	mov	w4, w13
-	ldr	x0, [x19, 8]
-	str	w10, [x29, 108]
-	str	w13, [x29, 136]
-	ldr	w2, [x1, 12]
-	str	w2, [sp, 32]
-	ldr	w2, [x1, 8]
-	str	w2, [sp, 24]
-	ldr	w2, [x1, 4]
-	str	w2, [sp, 16]
-	mov	w2, w27
-	ldr	w1, [x1]
-	str	w1, [sp, 8]
-	ldr	w1, [x0, 12]
-	str	w1, [sp]
-	mov	w1, w12
-	ldp	w5, w6, [x0]
-	ldr	w7, [x0, 8]
-	ldr	x0, [x29, 112]
-	bl	printf
-	ldr	w13, [x29, 136]
-	ldr	w10, [x29, 108]
-	cmp	w13, 512
-	bne	.L2899
-.L2900:
-	mov	w4, w10
-	mov	w3, w28
-	mov	w2, w27
-	mov	w1, w20
-	adrp	x24, .LANCHOR131
-	adrp	x0, .LC168
-	add	x0, x0, :lo12:.LC168
-	bl	printf
-	ldr	x0, [x19, 8]
+	bl	ftl_alloc_sblk
 	mov	w1, 0
-	ldrb	w2, [x24, #:lo12:.LANCHOR131]
-	adrp	x25, .LANCHOR14
-	adrp	x26, .LC169
-	add	x25, x25, :lo12:.LANCHOR14
-	add	x26, x26, :lo12:.LC169
-	lsl	w2, w2, 9
+	mov	w21, w0
+	bl	ftl_erase_sblk
+	ldr	x1, [x19, #:lo12:.LANCHOR110]
+	mov	w0, w21
+	add	x1, x1, 672
+	bl	ftl_get_blk_list_in_sblk
+	ldr	x0, [x19, #:lo12:.LANCHOR110]
+	ldrh	w20, [x0, 672]
+	strh	wzr, [x0, 690]
+	mov	w0, 65533
+	sub	w1, w20, #1
+	cmp	w0, w1, uxth
+	bcs	.L2875
+	adrp	x1, .LANCHOR201
+	adrp	x0, .LC0
+	mov	w2, 2484
+	add	x1, x1, :lo12:.LANCHOR201
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2875:
+	ldr	x0, [x19, #:lo12:.LANCHOR110]
+	mov	w2, 256
+	mov	w1, 255
+	add	x0, x0, 416
+	strh	wzr, [x0, 280]
 	bl	ftl_memset
-	ldr	x0, [x19, 24]
+	ldr	x0, [x19, #:lo12:.LANCHOR110]
+	mov	w2, 4096
 	mov	w1, 0
-	ldrb	w2, [x24, #:lo12:.LANCHOR131]
-	lsl	w2, w2, 1
+	add	x0, x0, 704
 	bl	ftl_memset
-.L2904:
-	ldrh	w0, [x23, #:lo12:.LANCHOR95]
-	cmp	w0, w27
-	bls	.L2910
-	lsl	w0, w27, 1
-	str	w0, [x29, 140]
-	ldr	x0, [x29, 120]
-	mov	w22, 0
-	add	x28, x0, :lo12:.LANCHOR84
-	b	.L2911
-.L2895:
-	cmp	w25, 2
-	bne	.L2898
-	adrp	x1, .LANCHOR79
-	ldrb	w3, [x1, #:lo12:.LANCHOR79]
-	ldr	w1, [x29, 140]
-	add	w0, w1, w0
-	b	.L2926
-.L2898:
-	add	w3, w27, w3
-	b	.L2897
-.L2902:
-	add	w8, w27, 1
-	and	w27, w8, 65535
-	b	.L2892
-.L2909:
-	ldr	w0, [x25]
-	tbz	x0, 12, .L2905
-	mov	w2, w22
-	mov	w1, w27
-	mov	x0, x26
-	bl	printf
-.L2905:
-	ldrb	w1, [x28]
-	adrp	x2, .LANCHOR111
-	sxtw	x0, w22
-	cbz	w1, .L2906
-	add	x0, x0, 8
-	ldrh	w1, [x2, #:lo12:.LANCHOR111]
-	ldrh	w0, [x21, x0, lsl 1]
-	mul	w0, w0, w1
-	orr	w0, w0, w27
-	str	w0, [x19, 40]
-	mov	x0, x19
-	bl	sblk_3d_tlc_dump_prog
-.L2907:
-	add	w22, w22, 1
-	and	w22, w22, 65535
-.L2911:
-	ldrb	w0, [x29, 153]
-	cmp	w0, w22
-	bhi	.L2909
-	add	w8, w27, 1
-	and	w27, w8, 65535
-	b	.L2904
-.L2906:
-	adrp	x1, .LANCHOR79
-	add	x0, x0, 8
-	ldrb	w1, [x1, #:lo12:.LANCHOR79]
-	cmp	w1, 2
-	bne	.L2908
-	ldrh	w1, [x2, #:lo12:.LANCHOR111]
-	ldrh	w0, [x21, x0, lsl 1]
-	mul	w0, w0, w1
-	ldr	w1, [x29, 140]
-	orr	w0, w0, w1
-	orr	w0, w0, 33554432
-	str	w0, [x19, 40]
-	mov	x0, x19
-	bl	sblk_mlc_dump_prog
-	b	.L2907
-.L2908:
-	ldrh	w1, [x21, x0, lsl 1]
-	mov	w6, 1
-	ldrh	w0, [x2, #:lo12:.LANCHOR111]
-	mov	w5, 0
-	ldrb	w4, [x24, #:lo12:.LANCHOR131]
-	ldr	x3, [x19, 24]
-	mul	w1, w1, w0
-	adrp	x0, .LANCHOR32
-	ldrb	w2, [x0, #:lo12:.LANCHOR32]
+	adrp	x0, .LANCHOR31
+	ldr	x1, [x19, #:lo12:.LANCHOR110]
+	ldrb	w2, [x0, #:lo12:.LANCHOR31]
 	mov	w0, 24
-	orr	w1, w1, w27
-	str	w1, [x19, 40]
 	sub	w0, w0, w2
-	lsl	w6, w6, w2
-	ldr	x2, [x19, 8]
-	sub	w6, w6, #1
-	lsl	w7, w6, w0
-	lsr	w0, w1, w0
-	bic	w1, w1, w7
-	and	w0, w0, w6
-	bl	flash_prog_page_en
-	b	.L2907
-.L2910:
-	mov	x0, x19
-	bl	zbuf_free
-	adrp	x0, .LC170
-	mov	w1, w20
-	add	x0, x0, :lo12:.LC170
-	bl	printf
-.L2888:
-	ldp	x19, x20, [sp, 64]
-	ldp	x21, x22, [sp, 80]
-	ldp	x23, x24, [sp, 96]
-	ldp	x25, x26, [sp, 112]
-	ldp	x27, x28, [sp, 128]
-	ldp	x29, x30, [sp, 48]
-	add	sp, sp, 224
+	adrp	x2, .LANCHOR74
+	strh	w21, [x1, 416]
+	adrp	x21, .LANCHOR12
+	ldrh	w2, [x2, #:lo12:.LANCHOR74]
+	strh	w20, [x1, 692]
+	sub	w0, w0, w2
+	asr	w0, w20, w0
+	strh	w0, [x1, 694]
+	mov	w0, 1
+	strh	w0, [x1, 688]
+	adrp	x0, .LANCHOR202
+	ldrh	w0, [x0, #:lo12:.LANCHOR202]
+	strh	w0, [x1, 698]
+	mov	w1, 20038
+	ldr	x0, [x21, #:lo12:.LANCHOR12]
+	movk	w1, 0x4549, lsl 16
+	str	w1, [x0]
+	bl	ftl_alloc_sys_blk
+	mov	w20, w0
+	mov	w1, 0
+	bl	ftl_erase_phy_blk
+	ldr	x0, [x19, #:lo12:.LANCHOR110]
+	mov	w1, 2
+	strh	w20, [x0, 130]
+	mov	w20, -1
+	strh	wzr, [x0, 140]
+	ldr	x0, [x21, #:lo12:.LANCHOR12]
+	add	x0, x0, 16
+	strh	w20, [x0, 568]
+	strh	w20, [x0, 570]
+	strh	w20, [x0, 572]
+	strh	w20, [x0, 574]
+	bl	ftl_open_sblk_init
+	ldr	x0, [x21, #:lo12:.LANCHOR12]
+	mov	w1, 3
+	add	x0, x0, 48
+	bl	ftl_open_sblk_init
+	ldr	x1, [x19, #:lo12:.LANCHOR110]
+	ldr	x0, [x21, #:lo12:.LANCHOR12]
+	add	x0, x0, 136
+	ldrh	w2, [x1, 134]
+	strh	w2, [x0, -10]
+	strh	w20, [x0, -56]
+	mov	w2, -1
+	strh	w20, [x0, -6]
+	str	w2, [x0, 408]
+	strh	wzr, [x0, -12]
+	strh	wzr, [x0, -16]
+	strh	wzr, [x0, -14]
+	strh	w2, [x1, 126]
+	mov	w2, 256
+	str	wzr, [x0, 384]
+	mov	w1, 255
+	str	wzr, [x0, 388]
+	str	wzr, [x0, 392]
+	bl	ftl_memset
+	mov	w2, 128
+	mov	w1, 255
+	ldr	x0, [x21, #:lo12:.LANCHOR12]
+	add	x0, x0, 392
+	bl	ftl_memset
+	bl	ftl_ext_info_flush
+	mov	w0, 0
+	bl	ftl_info_flush
+	bl	ftl_info_blk_init
+	ldr	x21, [sp, 32]
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+	.size	ftl_low_format_data_init, .-ftl_low_format_data_init
+	.section	.text.ftl_low_format,"ax",@progbits
+	.align	2
+	.global	ftl_low_format
+	.type	ftl_low_format, %function
+ftl_low_format:
+	stp	x29, x30, [sp, -80]!
+	mov	w1, 0
+	adrp	x0, .LC169
+	add	x0, x0, :lo12:.LC169
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR203
+	stp	x21, x22, [sp, 32]
+	add	x20, x20, :lo12:.LANCHOR203
+	stp	x25, x26, [sp, 64]
+	adrp	x22, .LANCHOR6
+	mov	x25, x22
+	stp	x23, x24, [sp, 48]
+	mov	w19, 8
+	adrp	x23, .LC0
+	bl	printf
+.L2880:
+	ldr	x0, [x22, #:lo12:.LANCHOR6]
+	add	x0, x0, x19, sxtw
+	ldrb	w21, [x0, 32]
+	add	w0, w21, 127
+	and	w0, w0, 255
+	cmp	w0, 125
+	bhi	.L2878
+	mov	w2, 2539
+	mov	x1, x20
+	add	x0, x23, :lo12:.LC0
+	bl	printf
+.L2878:
+	cmp	w21, 255
+	beq	.L2879
+	adrp	x0, .LANCHOR111
+	ldrh	w1, [x0, #:lo12:.LANCHOR111]
+	mov	w0, 0
+	mul	w1, w1, w21
+	bl	flash_erase_block
+.L2879:
+	add	w19, w19, 1
+	cmp	w19, 16
+	bne	.L2880
+	bl	sblk_init
+	adrp	x22, .LANCHOR9
+	bl	ftl_info_blk_init
+	adrp	x19, .LANCHOR8
+	adrp	x0, .LANCHOR192
+	mov	w2, 16384
+	mov	w1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR192]
+	bl	ftl_memset
+	ldr	x0, [x22, #:lo12:.LANCHOR9]
+	mov	w3, 1
+	ldrh	w2, [x19, #:lo12:.LANCHOR8]
+	add	x2, x0, x2, lsl 2
+.L2881:
+	cmp	x0, x2
+	bne	.L2882
+	adrp	x21, .LANCHOR110
+	mov	w1, 21574
+	adrp	x24, .LANCHOR68
+	add	x24, x24, :lo12:.LANCHOR68
+	ldr	x0, [x21, #:lo12:.LANCHOR110]
+	movk	w1, 0x494c, lsl 16
+	mov	w20, 0
+	mov	w26, 1
+	strh	wzr, [x0, 148]
+	str	w1, [x0]
+.L2883:
+	ldrh	w0, [x19, #:lo12:.LANCHOR8]
+	adrp	x23, .LANCHOR75
+	cmp	w0, w20
+	bhi	.L2892
+	ldr	x0, [x25, #:lo12:.LANCHOR6]
+	mov	w4, 3
+	ldrb	w2, [x23, #:lo12:.LANCHOR75]
+	mov	w10, 15
+	ldr	x6, [x21, #:lo12:.LANCHOR110]
+	cmp	w2, 1
+	ldr	x1, [x22, #:lo12:.LANCHOR9]
+	ldrb	w0, [x0, 47]
+	csinc	w4, w4, wzr, ne
+	and	w4, w4, 255
+	and	w8, w2, 65535
+	ldrh	w3, [x6, 148]
+	udiv	w0, w0, w2
+	and	w5, w0, 65535
+	ubfiz	x0, x0, 2, 8
+	add	x0, x0, 4
+	add	w20, w5, 1
+	add	x0, x1, x0
+.L2895:
+	cmp	w2, 4
+	add	x1, x1, 4
+	csel	w7, w10, w4, eq
+	strb	w7, [x1, -1]
+	ldrb	w7, [x1, -2]
+	orr	w7, w7, -32
+	strb	w7, [x1, -2]
+	cmp	x1, x0
+	bne	.L2895
+	mul	w5, w5, w8
+	mov	w4, 16
+	add	w0, w8, w3
+	sdiv	w4, w4, w2
+	add	w0, w5, w0, uxth
+	strh	w0, [x6, 148]
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	add	w4, w20, w4
+	and	w4, w4, 65535
+	strh	w4, [x6, 134]
+	tbz	x0, 12, .L2896
+	adrp	x0, .LC170
+	mov	w3, w20
+	mov	w2, 128
+	mov	w1, 2598
+	add	x0, x0, :lo12:.LC170
+	bl	printf
+.L2896:
+	ldr	x0, [x21, #:lo12:.LANCHOR110]
+	mov	w2, 128
+	mov	w1, 255
+	add	x0, x0, 160
+	bl	ftl_memset
+	adrp	x0, .LANCHOR112
+	ldrb	w10, [x23, #:lo12:.LANCHOR75]
+	adrp	x3, .LANCHOR74
+	ldr	x2, [x21, #:lo12:.LANCHOR110]
+	ldrb	w16, [x0, #:lo12:.LANCHOR112]
+	adrp	x0, .LANCHOR31
+	and	w11, w10, 65535
+	ldr	x15, [x22, #:lo12:.LANCHOR9]
+	ldrb	w4, [x0, #:lo12:.LANCHOR31]
+	mov	w0, 24
+	ldrh	w8, [x2, 134]
+	sub	w0, w0, w4
+	ldrh	w4, [x3, #:lo12:.LANCHOR74]
+	mul	w1, w20, w11
+	mov	w3, 0
+	sub	w0, w0, w4
+	mov	w4, 1
+	and	w1, w1, 65535
+	lsl	w4, w4, w0
+	and	w4, w4, 65535
+.L2897:
+	cmp	w20, w8
+	bcc	.L2903
+	ldrh	w0, [x19, #:lo12:.LANCHOR8]
+	strh	w3, [x2, 112]
+	sub	w0, w0, w8
+	strh	wzr, [x2, 114]
+	strh	w0, [x2, 116]
+	strh	wzr, [x2, 118]
+	strh	w8, [x2, 132]
+	bl	ftl_low_format_data_init
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L2882:
+	ldrb	w1, [x0, 2]
+	add	x0, x0, 4
+	and	w1, w1, 31
+	bfi	w1, w3, 3, 2
+	strb	w1, [x0, -2]
+	b	.L2881
+.L2892:
+	adrp	x0, .LANCHOR81
+	strh	w20, [x24]
+	ldrb	w0, [x0, #:lo12:.LANCHOR81]
+	cbnz	w0, .L2884
+	mov	w0, w20
+	bl	ftl_test_block
+.L2884:
+	ldrb	w11, [x23, #:lo12:.LANCHOR75]
+	adrp	x0, .LANCHOR112
+	ldr	x6, [x22, #:lo12:.LANCHOR9]
+	mov	w7, 0
+	ldrb	w14, [x0, #:lo12:.LANCHOR112]
+	mov	w10, 0
+	ldr	x13, [x21, #:lo12:.LANCHOR110]
+	mov	w8, 0
+	mul	w12, w20, w11
+	add	x6, x6, x20, uxth 2
+.L2885:
+	cmp	w8, w14
+	bcs	.L2889
+	add	w15, w11, w7
+	b	.L2890
+.L2888:
+	add	w1, w7, w12
+	mov	w0, w8
+	bl	flash_check_bad_block
+	cbz	w0, .L2886
+	ldrb	w1, [x6, 3]
+	lsl	w0, w26, w7
+	orr	w0, w0, w1
+	strb	w0, [x6, 3]
+	ldrh	w0, [x13, 148]
+	add	w0, w0, 1
+	strh	w0, [x13, 148]
+.L2887:
+	add	w7, w7, 1
+.L2890:
+	cmp	w7, w15
+	bne	.L2888
+	add	w8, w8, 1
+	sub	w12, w12, w11
+	and	w8, w8, 65535
+	b	.L2885
+.L2886:
+	add	w10, w10, 1
+	and	w10, w10, 65535
+	b	.L2887
+.L2889:
+	cbnz	w10, .L2891
+	ldrb	w0, [x6, 2]
+	orr	w0, w0, -32
+	strb	w0, [x6, 2]
+.L2891:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L2883
+.L2903:
+	add	x13, x15, x20, uxth 2
+	mov	w6, 0
+	mov	w12, 0
+	mov	w5, 0
+	ldrb	w0, [x13, 2]
+	orr	w0, w0, -32
+	strb	w0, [x13, 2]
+.L2898:
+	cmp	w5, w16
+	bcc	.L2905
+	add	w20, w20, 1
+	add	w1, w1, w11
+	and	w20, w20, 65535
+	and	w1, w1, 65535
+	b	.L2897
+.L2901:
+	ldrb	w14, [x13, 3]
+	add	w17, w12, w7
+	asr	w14, w14, w17
+	tbnz	x14, 0, .L2899
+	cmp	w10, 1
+	bls	.L2904
+	and	w0, w0, 1
+	add	w0, w1, w0
+	and	w0, w0, 65535
+.L2900:
+	add	x14, x2, x3, sxtw 1
+	add	w3, w3, 1
+	and	w3, w3, 65535
+	add	w0, w0, w6
+	strh	w0, [x14, 160]
+.L2899:
+	add	x7, x7, 1
+.L2902:
+	and	w0, w7, 65535
+	cmp	w0, w11
+	bcc	.L2901
+	add	w5, w5, 1
+	add	w6, w4, w6
+	and	w5, w5, 65535
+	add	w12, w12, w10
+	and	w6, w6, 65535
+	b	.L2898
+.L2904:
+	mov	w0, w1
+	b	.L2900
+.L2905:
+	mov	x7, 0
+	b	.L2902
+	.size	ftl_low_format, .-ftl_low_format
+	.section	.text.ftl_re_low_format,"ax",@progbits
+	.align	2
+	.global	ftl_re_low_format
+	.type	ftl_re_low_format, %function
+ftl_re_low_format:
+	stp	x29, x30, [sp, -16]!
+	mov	w1, 1
+	adrp	x0, .LC171
+	add	x0, x0, :lo12:.LC171
+	add	x29, sp, 0
+	bl	printf
+	bl	sblk_init
+	bl	ftl_info_blk_init
+	bl	ftl_ext_info_init
+	adrp	x0, .LANCHOR110
+	adrp	x2, .LANCHOR8
+	mov	w3, 0
+	mov	w4, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR110]
+	mov	w5, 0
+	ldrh	w7, [x2, #:lo12:.LANCHOR8]
+	adrp	x2, .LANCHOR9
+	ldr	x2, [x2, #:lo12:.LANCHOR9]
+	ldrh	w1, [x0, 134]
+	add	x2, x2, x1, uxth 2
+.L2916:
+	cmp	w1, w7
+	bcc	.L2920
+	strh	w5, [x0, 114]
+	strh	w4, [x0, 118]
+	strh	w3, [x0, 116]
+	strh	wzr, [x0, 122]
+	strh	wzr, [x0, 120]
+	strh	wzr, [x0, 124]
+	bl	ftl_low_format_data_init
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+.L2920:
+	ldrb	w6, [x2, 2]
+	and	w8, w6, 31
+	strb	w8, [x2, 2]
+	ands	w6, w6, 24
+	bne	.L2917
+	add	w5, w5, 1
+	and	w5, w5, 65535
+.L2918:
+	add	w1, w1, 1
+	add	x2, x2, 4
+	and	w1, w1, 65535
+	b	.L2916
+.L2917:
+	cmp	w6, 16
+	bne	.L2919
+	add	w4, w4, 1
+	and	w4, w4, 65535
+	b	.L2918
+.L2919:
+	add	w3, w3, 1
+	and	w3, w3, 65535
+	b	.L2918
+	.size	ftl_re_low_format, .-ftl_re_low_format
+	.section	.text.pm_alloc_new_blk,"ax",@progbits
+	.align	2
+	.global	pm_alloc_new_blk
+	.type	pm_alloc_new_blk, %function
+pm_alloc_new_blk:
+	stp	x29, x30, [sp, -64]!
+	adrp	x2, .LANCHOR79
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR110
+	stp	x21, x22, [sp, 32]
+	ldr	x1, [x20, #:lo12:.LANCHOR110]
+	ldrb	w2, [x2, #:lo12:.LANCHOR79]
+	ldrh	w0, [x1, 690]
+	str	x23, [sp, 48]
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	strh	w0, [x1, 690]
+	cmp	w2, w0
+	bls	.L2923
+	add	x0, x1, x0, sxtw 1
+	ldrh	w1, [x0, 672]
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L2924
+.L2923:
+	adrp	x19, .LC168
+	add	x19, x19, :lo12:.LC168
+	mov	w23, 65535
+	adrp	x22, .LANCHOR9
+.L2925:
+	mov	w0, 1
+	bl	ftl_alloc_sblk
+	and	w21, w0, 65535
+	cmp	w21, w23
+	beq	.L2925
+	mov	w1, 0
+	mov	w0, w21
+	bl	ftl_erase_sblk
+	add	x14, x20, :lo12:.LANCHOR110
+	ldr	x1, [x20, #:lo12:.LANCHOR110]
+	mov	w0, w21
+	add	x1, x1, 672
+	bl	ftl_get_blk_list_in_sblk
+	tst	w0, 65535
+	bne	.L2926
+	mov	w1, w21
+	mov	x0, x19
+	bl	printf
+	ldr	x0, [x22, #:lo12:.LANCHOR9]
+	add	x21, x0, x21, uxth 2
+	ldrb	w0, [x21, 2]
+	orr	w0, w0, -32
+	strb	w0, [x21, 2]
+	b	.L2925
+.L2926:
+	ldr	x0, [x14]
+	adrp	x1, .LANCHOR204
+	mov	w2, 1
+	mov	w19, 0
+	add	x0, x0, 416
+	str	w2, [x1, #:lo12:.LANCHOR204]
+	mov	w1, 65535
+	strh	wzr, [x0, 274]
+.L2928:
+	ldrh	w2, [x0]
+	cmp	w2, w1
+	beq	.L2927
+	add	w19, w19, 1
+	add	x0, x0, 2
+	and	w19, w19, 65535
+	cmp	w19, 128
+	bne	.L2928
+	adrp	x1, .LANCHOR205
+	adrp	x0, .LC0
+	mov	w2, 264
+	add	x1, x1, :lo12:.LANCHOR205
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2927:
+	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	add	x19, x0, x19, sxtw 1
+	ldrh	w1, [x0, 688]
+	strh	w21, [x19, 416]
+	add	w1, w1, 1
+	strh	w1, [x0, 688]
+.L2924:
+	ldr	x1, [x20, #:lo12:.LANCHOR110]
+	ldrh	w0, [x1, 690]
+	add	x0, x0, 336
+	ldrh	w19, [x1, x0, lsl 1]
+	mov	w0, 65533
+	sub	w1, w19, #1
+	cmp	w0, w1, uxth
+	bcs	.L2930
+	adrp	x1, .LANCHOR205
+	adrp	x0, .LC0
+	mov	w2, 270
+	add	x1, x1, :lo12:.LANCHOR205
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2930:
+	adrp	x1, .LANCHOR31
+	mov	w2, 24
+	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	ldrb	w1, [x1, #:lo12:.LANCHOR31]
+	sub	w2, w2, w1
+	adrp	x1, .LANCHOR74
+	strh	wzr, [x0, 696]
+	ldrh	w1, [x1, #:lo12:.LANCHOR74]
+	strh	w19, [x0, 692]
+	sub	w2, w2, w1
+	asr	w4, w19, w2
+	strh	w4, [x0, 694]
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L2933
+	mov	w0, 1
+	and	w4, w4, 65535
+	lsl	w2, w0, w2
+	mov	w3, w19
+	adrp	x0, .LC172
+	sub	w2, w2, #1
+	mov	w1, w19
+	add	x0, x0, :lo12:.LC172
+	bl	printf
+.L2933:
+	mov	w0, 0
+	ldr	x23, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+	.size	pm_alloc_new_blk, .-pm_alloc_new_blk
+	.section	.text.pm_write_page,"ax",@progbits
+	.align	2
+	.global	pm_write_page
+	.type	pm_write_page, %function
+pm_write_page:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w19, w0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR94
+	stp	x23, x24, [sp, 48]
+	adrp	x22, .LANCHOR111
+	adrp	x24, .LANCHOR110
+	mov	x23, x1
+	add	x21, x21, :lo12:.LANCHOR94
+	mov	x20, x24
+	add	x22, x22, :lo12:.LANCHOR111
+	stp	x25, x26, [sp, 64]
+	str	x27, [sp, 80]
+	mov	w25, 65535
+.L2941:
+	ldr	x0, [x24, #:lo12:.LANCHOR110]
+	ldr	w1, [x0, 48]
+	ldrh	w2, [x0, 696]
+	add	w1, w1, 1
+	str	w1, [x0, 48]
+	ldrh	w1, [x21]
+	cmp	w2, w1
+	bcs	.L2942
+	ldrh	w0, [x0, 692]
+	cmp	w0, w25
+	bne	.L2943
+.L2942:
+	bl	pm_alloc_new_blk
+	mov	w0, 0
+	bl	ftl_info_flush
+.L2943:
+	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	ldrh	w0, [x0, 692]
+	cmp	w0, w25
+	bne	.L2944
+	adrp	x1, .LANCHOR206
+	adrp	x0, .LC0
+	mov	w2, 303
+	add	x1, x1, :lo12:.LANCHOR206
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2944:
+	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	adrp	x27, .LANCHOR207
+	ldrh	w1, [x22]
+	mov	w2, 64
+	ldrh	w26, [x0, 692]
+	ldrh	w0, [x0, 696]
+	madd	w26, w26, w1, w0
+	ldr	x0, [x27, #:lo12:.LANCHOR207]
+	mov	w1, 0
+	bl	ftl_memset
+	ldr	x6, [x27, #:lo12:.LANCHOR207]
+	ldr	x7, [x20, #:lo12:.LANCHOR110]
+	str	w19, [x6]
+	ldr	w0, [x7, 48]
+	str	w0, [x6, 4]
+	adrp	x0, .LANCHOR131
+	ldrb	w8, [x0, #:lo12:.LANCHOR131]
+	mov	x0, x23
+	lsl	w1, w8, 9
+	bl	js_hash
+	str	w0, [x6, 8]
+	ldrb	w0, [x7, 694]
+	mov	x2, x23
+	mov	w1, w26
+	mov	w4, w8
+	mov	x3, x6
+	bl	ftl_prog_page
+	ldr	x2, [x20, #:lo12:.LANCHOR110]
+	ldrh	w1, [x2, 696]
+	add	w1, w1, 1
+	and	w1, w1, 65535
+	strh	w1, [x2, 696]
+	cmp	w1, 1
+	adrp	x1, .LANCHOR208
+	beq	.L2945
+	ldrb	w3, [x1, #:lo12:.LANCHOR208]
+	cbz	w3, .L2946
+.L2945:
+	strb	wzr, [x1, #:lo12:.LANCHOR208]
+	b	.L2941
+.L2946:
+	cmn	w0, #1
+	bne	.L2948
+	mov	w1, w26
+	adrp	x0, .LC173
+	add	x0, x0, :lo12:.LC173
+	bl	printf
+	b	.L2941
+.L2948:
+	ldrh	w0, [x2, 698]
+	cmp	w19, w0
+	bcs	.L2949
+	add	x19, x2, x19, uxtw 2
+	str	w26, [x19, 704]
+.L2949:
+	mov	w0, 0
+	ldr	x27, [sp, 80]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
 	ret
-	.size	ftl_dump_write_open_sblk, .-ftl_dump_write_open_sblk
+	.size	pm_write_page, .-pm_write_page
 	.section	.text.flash_info_flush,"ax",@progbits
 	.align	2
 	.global	flash_info_flush
 	.type	flash_info_flush, %function
 flash_info_flush:
 	stp	x29, x30, [sp, -112]!
-	adrp	x0, .LANCHOR14
+	adrp	x0, .LANCHOR19
 	add	x29, sp, 0
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2928
+	tbz	x0, 12, .L2955
 	adrp	x2, .LANCHOR209
-	adrp	x0, .LC97
+	adrp	x0, .LC94
 	add	x2, x2, :lo12:.LANCHOR209
-	mov	w1, 364
-	add	x0, x0, :lo12:.LC97
+	mov	w1, 365
+	add	x0, x0, :lo12:.LC94
 	bl	printf
-.L2928:
+.L2955:
 	adrp	x23, .LANCHOR210
-	adrp	x20, .LANCHOR27
+	adrp	x20, .LANCHOR6
 	mov	w2, 64
 	mov	w1, 0
 	ldr	x0, [x23, #:lo12:.LANCHOR210]
 	adrp	x21, .LANCHOR211
 	adrp	x22, .LANCHOR2
-	adrp	x24, .LC172
-	adrp	x25, .LANCHOR147
+	adrp	x24, .LC175
+	adrp	x25, .LANCHOR144
 	add	x22, x22, :lo12:.LANCHOR2
-	add	x24, x24, :lo12:.LC172
-	add	x25, x25, :lo12:.LANCHOR147
+	add	x24, x24, :lo12:.LC175
+	add	x25, x25, :lo12:.LANCHOR144
 	bl	ftl_memset
 	add	x27, x21, :lo12:.LANCHOR211
-	ldr	x1, [x20, #:lo12:.LANCHOR27]
+	ldr	x1, [x20, #:lo12:.LANCHOR6]
 	mov	w3, 16
 	mov	w2, 4
-	adrp	x0, .LC171
-	add	x0, x0, :lo12:.LC171
+	adrp	x0, .LC174
+	add	x0, x0, :lo12:.LC174
 	mov	w26, 0
 	bl	rknand_print_hex
-	ldr	x6, [x20, #:lo12:.LANCHOR27]
+	ldr	x6, [x20, #:lo12:.LANCHOR6]
 	add	x0, x6, 16
 	ldr	w1, [x6, 8]
 	bl	js_hash
 	str	w0, [x6, 12]
-.L2929:
+.L2956:
 	add	x28, x21, :lo12:.LANCHOR211
 	ldrb	w4, [x21, #:lo12:.LANCHOR211]
 	ldrh	w19, [x22]
@@ -18392,8 +18957,8 @@ flash_info_flush:
 	sub	w0, w0, #1
 	cmp	w1, w0
 	ldp	w3, w4, [x29, 104]
-	blt	.L2930
-	ldr	x6, [x20, #:lo12:.LANCHOR27]
+	blt	.L2957
+	ldr	x6, [x20, #:lo12:.LANCHOR6]
 	ldrb	w7, [x28, 1]
 	strh	wzr, [x28, 2]
 	ldr	w0, [x6, 4]
@@ -18411,19 +18976,19 @@ flash_info_flush:
 	ldrh	w19, [x22]
 	str	w0, [x6, 12]
 	mul	w19, w19, w7
-.L2939:
+.L2966:
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_erase_block
-	b	.L2931
-.L2934:
+	b	.L2958
+.L2961:
 	mov	w26, 1
-	b	.L2929
-.L2930:
+	b	.L2956
+.L2957:
 	madd	w19, w19, w4, w3
-	cbz	w1, .L2939
-.L2931:
-	ldr	x2, [x20, #:lo12:.LANCHOR27]
+	cbz	w1, .L2966
+.L2958:
+	ldr	x2, [x20, #:lo12:.LANCHOR6]
 	mov	w1, w19
 	ldr	x3, [x23, #:lo12:.LANCHOR210]
 	mov	w5, 1
@@ -18439,14 +19004,14 @@ flash_info_flush:
 	ldrh	w1, [x27, 2]
 	add	w1, w1, 1
 	strh	w1, [x27, 2]
-	bne	.L2932
+	bne	.L2959
 	mov	w1, w19
-	adrp	x0, .LC173
-	add	x0, x0, :lo12:.LC173
+	adrp	x0, .LC176
+	add	x0, x0, :lo12:.LC176
 	bl	printf
-	b	.L2929
-.L2932:
-	cbz	w26, .L2934
+	b	.L2956
+.L2959:
+	cbz	w26, .L2961
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -18462,59 +19027,59 @@ flash_info_flush:
 	.type	flash_info_blk_init, %function
 flash_info_blk_init:
 	stp	x29, x30, [sp, -96]!
-	adrp	x0, .LANCHOR14
+	adrp	x0, .LANCHOR19
 	add	x29, sp, 0
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR27
+	adrp	x20, .LANCHOR6
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	tbz	x0, 12, .L2941
-	ldr	x4, [x20, #:lo12:.LANCHOR27]
+	tbz	x0, 12, .L2968
+	ldr	x4, [x20, #:lo12:.LANCHOR6]
 	adrp	x2, .LANCHOR212
-	adrp	x0, .LC174
+	adrp	x0, .LC177
 	mov	w3, 2048
 	add	x2, x2, :lo12:.LANCHOR212
-	mov	w1, 49
-	add	x0, x0, :lo12:.LC174
+	mov	w1, 50
+	add	x0, x0, :lo12:.LC177
 	bl	printf
-.L2941:
+.L2968:
 	adrp	x24, .LANCHOR2
 	mov	w23, 21321
 	add	x26, x24, :lo12:.LANCHOR2
 	mov	w22, 4
 	adrp	x21, .LANCHOR210
 	movk	w23, 0x5359, lsl 16
-.L2945:
+.L2972:
 	mov	w19, 0
-.L2944:
+.L2971:
 	ldrh	w1, [x26]
 	mov	w4, 4
 	ldr	x3, [x21, #:lo12:.LANCHOR210]
 	mov	w0, 0
-	ldr	x2, [x20, #:lo12:.LANCHOR27]
+	ldr	x2, [x20, #:lo12:.LANCHOR6]
 	add	x27, x21, :lo12:.LANCHOR210
-	add	x25, x20, :lo12:.LANCHOR27
+	add	x25, x20, :lo12:.LANCHOR6
 	madd	w1, w1, w22, w19
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L2942
-	ldr	x2, [x20, #:lo12:.LANCHOR27]
+	beq	.L2969
+	ldr	x2, [x20, #:lo12:.LANCHOR6]
 	ldr	w0, [x2]
 	cmp	w0, w23
-	beq	.L2943
-.L2942:
+	beq	.L2970
+.L2969:
 	add	w19, w19, 1
 	cmp	w19, 4
-	bne	.L2944
+	bne	.L2971
 	add	w22, w22, 1
 	cmp	w22, 16
-	bne	.L2945
-.L2971:
+	bne	.L2972
+.L2998:
 	mov	w0, -1
-.L2940:
+.L2967:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -18522,43 +19087,43 @@ flash_info_blk_init:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2953:
+.L2980:
 	ldr	x0, [x25]
 	ldr	w1, [x0]
 	cmp	w1, w23
-	bne	.L2954
+	bne	.L2981
 	ldr	w22, [x0, 4]
-.L2947:
+.L2974:
 	add	x23, x19, :lo12:.LANCHOR211
 	ldrh	w0, [x24, #:lo12:.LANCHOR2]
 	ldr	x3, [x21, #:lo12:.LANCHOR210]
 	mov	w4, 4
-	ldr	x2, [x20, #:lo12:.LANCHOR27]
+	ldr	x2, [x20, #:lo12:.LANCHOR6]
 	ldrb	w1, [x23, 1]
 	mul	w1, w1, w0
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L2948
-	ldr	x0, [x20, #:lo12:.LANCHOR27]
+	beq	.L2975
+	ldr	x0, [x20, #:lo12:.LANCHOR6]
 	mov	w1, 21321
 	movk	w1, 0x5359, lsl 16
 	ldr	w2, [x0]
 	cmp	w2, w1
-	bne	.L2948
+	bne	.L2975
 	ldr	w1, [x0, 4]
 	cmp	w22, w1
-	bcs	.L2948
+	bcs	.L2975
 	ldrb	w1, [x0, 37]
 	ldrb	w0, [x0, 36]
 	strb	w1, [x19, #:lo12:.LANCHOR211]
 	strb	w0, [x23, 1]
-.L2948:
+.L2975:
 	ldrb	w1, [x19, #:lo12:.LANCHOR211]
 	add	x22, x19, :lo12:.LANCHOR211
 	ldr	x3, [x21, #:lo12:.LANCHOR210]
 	mov	w4, 4
-	ldr	x2, [x20, #:lo12:.LANCHOR27]
+	ldr	x2, [x20, #:lo12:.LANCHOR6]
 	mov	w0, 0
 	bl	flash_get_last_written_page
 	and	w25, w0, 65535
@@ -18571,42 +19136,42 @@ flash_info_blk_init:
 	movk	w24, 0x5359, lsl 16
 	mul	w23, w23, w1
 	add	w23, w23, w0, sxth
-.L2949:
+.L2976:
 	sub	w0, w25, w22
 	sxth	w19, w0
-	tbz	w19, #31, .L2952
+	tbz	w19, #31, .L2979
 	cmn	w19, #1
-	bne	.L2951
-	ldr	x0, [x20, #:lo12:.LANCHOR27]
+	bne	.L2978
+	ldr	x0, [x20, #:lo12:.LANCHOR6]
 	ldr	w1, [x0]
-	adrp	x0, .LC175
-	add	x0, x0, :lo12:.LC175
+	adrp	x0, .LC178
+	add	x0, x0, :lo12:.LC178
 	bl	printf
-	b	.L2971
-.L2952:
+	b	.L2998
+.L2979:
 	ldr	x3, [x21, #:lo12:.LANCHOR210]
 	mov	w4, 4
-	ldr	x2, [x20, #:lo12:.LANCHOR27]
+	ldr	x2, [x20, #:lo12:.LANCHOR6]
 	sub	w1, w23, w22
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L2950
-	ldr	x0, [x20, #:lo12:.LANCHOR27]
+	beq	.L2977
+	ldr	x0, [x20, #:lo12:.LANCHOR6]
 	ldr	w0, [x0]
 	cmp	w0, w24
-	beq	.L2951
-.L2950:
+	beq	.L2978
+.L2977:
 	add	w22, w22, 1
-	b	.L2949
-.L2951:
+	b	.L2976
+.L2978:
 	cmp	w22, 1
-	bls	.L2955
+	bls	.L2982
 	bl	flash_info_flush
-.L2955:
+.L2982:
 	mov	w0, 0
-	b	.L2940
-.L2943:
+	b	.L2967
+.L2970:
 	adrp	x19, .LANCHOR211
 	add	x1, x19, :lo12:.LANCHOR211
 	ldrb	w3, [x2, 37]
@@ -18620,10 +19185,10 @@ flash_info_blk_init:
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	bne	.L2953
-.L2954:
+	bne	.L2980
+.L2981:
 	mov	w22, 0
-	b	.L2947
+	b	.L2974
 	.size	flash_info_blk_init, .-flash_info_blk_init
 	.section	.text.nand_flash_init,"ax",@progbits
 	.align	2
@@ -18633,64 +19198,64 @@ nand_flash_init:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR14
+	adrp	x21, .LANCHOR19
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	ldr	w0, [x21, #:lo12:.LANCHOR19]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	tbz	x0, 12, .L2973
+	tbz	x0, 12, .L3000
 	adrp	x2, .LANCHOR213
-	adrp	x0, .LC97
+	adrp	x0, .LC94
 	add	x2, x2, :lo12:.LANCHOR213
-	mov	w1, 3429
-	add	x0, x0, :lo12:.LC97
+	mov	w1, 3451
+	add	x0, x0, :lo12:.LC94
 	bl	printf
-.L2973:
-	adrp	x0, .LANCHOR172
-	adrp	x24, .LANCHOR16
-	adrp	x22, .LANCHOR48
-	add	x25, x22, :lo12:.LANCHOR48
-	str	wzr, [x0, #:lo12:.LANCHOR172]
+.L3000:
+	adrp	x0, .LANCHOR169
+	adrp	x24, .LANCHOR21
+	adrp	x22, .LANCHOR47
+	add	x25, x22, :lo12:.LANCHOR47
+	str	wzr, [x0, #:lo12:.LANCHOR169]
 	mov	x0, x19
 	bl	nandc_init
-	adrp	x19, .LANCHOR33
-	add	x0, x19, :lo12:.LANCHOR33
-	str	x0, [x24, #:lo12:.LANCHOR16]
-	adrp	x0, .LANCHOR18
-	adrp	x23, .LANCHOR32
+	adrp	x19, .LANCHOR32
+	add	x0, x19, :lo12:.LANCHOR32
+	str	x0, [x24, #:lo12:.LANCHOR21]
+	adrp	x0, .LANCHOR23
+	adrp	x23, .LANCHOR31
 	mov	x26, x25
 	mov	w1, 1
 	mov	w20, 0
-	strb	w1, [x0, #:lo12:.LANCHOR18]
+	strb	w1, [x0, #:lo12:.LANCHOR23]
 	mov	w27, 44
 	mov	w0, 3
 	mov	w2, 8
-	strb	w0, [x23, #:lo12:.LANCHOR32]
+	strb	w0, [x23, #:lo12:.LANCHOR31]
 	mov	w1, 0
-	adrp	x0, .LANCHOR30
-	add	x0, x0, :lo12:.LANCHOR30
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
 	bl	ftl_memset
 	mov	w2, 32
 	mov	w1, 0
-	adrp	x0, .LANCHOR148
-	add	x0, x0, :lo12:.LANCHOR148
+	adrp	x0, .LANCHOR145
+	add	x0, x0, :lo12:.LANCHOR145
 	bl	ftl_memset
-.L2979:
+.L3006:
 	mov	x1, x25
 	mov	w0, w20
 	bl	flash_read_id
-	cbnz	w20, .L2974
+	cbnz	w20, .L3001
 	ldrb	w0, [x26]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bls	.L2975
-.L2977:
-	mov	w8, -2
-.L2972:
-	mov	w0, w8
+	bls	.L3002
+.L3004:
+	mov	w22, -2
+.L2999:
+	mov	w0, w22
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -18698,35 +19263,35 @@ nand_flash_init:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2975:
+.L3002:
 	ldrb	w0, [x26, 1]
 	cmp	w0, 255
-	beq	.L2977
-.L2974:
+	beq	.L3004
+.L3001:
 	ldrb	w0, [x25]
 	cmp	w0, 181
-	bne	.L2978
+	bne	.L3005
 	strb	w27, [x25]
-.L2978:
+.L3005:
 	add	w20, w20, 1
 	add	x25, x25, 8
 	and	w20, w20, 255
 	cmp	w20, 4
-	bne	.L2979
+	bne	.L3006
 	adrp	x0, .LANCHOR214
 	add	x8, x0, :lo12:.LANCHOR214
 	add	x8, x8, 1
 	mov	x7, x0
-	add	x12, x22, :lo12:.LANCHOR48
+	add	x12, x22, :lo12:.LANCHOR47
 	mov	x10, 0
-.L2982:
+.L3009:
 	ldrb	w2, [x8, -1]
 	mov	w11, w10
 	lsl	x25, x10, 5
 	mov	x1, x12
 	mov	x0, x8
 	bl	flash_mem_cmp8
-	cbnz	w0, .L2980
+	cbnz	w0, .L3007
 	add	x0, x7, :lo12:.LANCHOR214
 	ubfiz	x11, x11, 5, 32
 	add	x25, x0, x25
@@ -18735,77 +19300,77 @@ nand_flash_init:
 	add	x4, x1, :lo12:.LANCHOR215
 	ldrb	w3, [x0, 22]
 	mov	x0, 0
-.L2981:
+.L3008:
 	lsl	x5, x0, 5
 	mov	w2, w0
 	ldrb	w5, [x5, x4]
 	cmp	w5, w3
-	beq	.L2983
+	beq	.L3010
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L2981
+	bne	.L3008
 	mov	w2, w0
-.L2983:
+.L3010:
 	ubfiz	x0, x2, 5, 32
 	add	x1, x1, :lo12:.LANCHOR215
 	add	x1, x1, x0
 	mov	w2, 32
-	adrp	x0, .LANCHOR20
-	add	x20, x19, :lo12:.LANCHOR33
-	add	x0, x0, :lo12:.LANCHOR20
-	adrp	x26, .LANCHOR28
+	adrp	x0, .LANCHOR25
+	add	x20, x19, :lo12:.LANCHOR32
+	add	x0, x0, :lo12:.LANCHOR25
+	adrp	x26, .LANCHOR27
 	bl	ftl_memcpy
 	mov	w2, 32
 	mov	x1, x25
 	mov	x0, x20
 	bl	ftl_memcpy
-	ldrb	w0, [x26, #:lo12:.LANCHOR28]
+	ldrb	w0, [x26, #:lo12:.LANCHOR27]
 	cmp	w0, 8
-	bhi	.L2984
+	bhi	.L3011
 	ldrb	w0, [x20, 20]
 	cmp	w0, 60
-	bls	.L2984
+	bls	.L3011
 	mov	w0, 60
 	strb	w0, [x20, 20]
-.L2984:
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3014
+.L3011:
+	ldr	w0, [x21, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L3041
 	adrp	x2, .LANCHOR213
-	adrp	x0, .LC97
+	adrp	x0, .LC94
 	add	x2, x2, :lo12:.LANCHOR213
-	mov	w1, 3456
-	add	x0, x0, :lo12:.LC97
+	mov	w1, 3478
+	add	x0, x0, :lo12:.LC94
 	bl	printf
-.L3014:
-	ldr	x0, [x24, #:lo12:.LANCHOR16]
+.L3041:
+	ldr	x0, [x24, #:lo12:.LANCHOR21]
 	ldrh	w0, [x0, 10]
 	cmp	w0, 1023
-	bls	.L2985
+	bls	.L3012
 	mov	w0, 2
-	strb	w0, [x23, #:lo12:.LANCHOR32]
-.L2985:
+	strb	w0, [x23, #:lo12:.LANCHOR31]
+.L3012:
 	mov	w0, 16384
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR176
-	adrp	x23, .LANCHOR27
-	add	x20, x19, :lo12:.LANCHOR33
-	adrp	x25, .LANCHOR49
-	str	x0, [x1, #:lo12:.LANCHOR176]
+	adrp	x1, .LANCHOR173
+	adrp	x23, .LANCHOR6
+	add	x20, x19, :lo12:.LANCHOR32
+	adrp	x25, .LANCHOR48
+	str	x0, [x1, #:lo12:.LANCHOR173]
 	mov	w0, 16384
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR166
-	str	x0, [x1, #:lo12:.LANCHOR166]
+	adrp	x1, .LANCHOR163
+	str	x0, [x1, #:lo12:.LANCHOR163]
 	mov	w0, 2048
 	bl	ftl_malloc
-	str	x0, [x23, #:lo12:.LANCHOR27]
+	str	x0, [x23, #:lo12:.LANCHOR6]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR175
-	str	x0, [x1, #:lo12:.LANCHOR175]
+	adrp	x1, .LANCHOR172
+	str	x0, [x1, #:lo12:.LANCHOR172]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR168
-	str	x0, [x1, #:lo12:.LANCHOR168]
+	adrp	x1, .LANCHOR165
+	str	x0, [x1, #:lo12:.LANCHOR165]
 	mov	w0, 64
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR210
@@ -18816,28 +19381,28 @@ nand_flash_init:
 	ldrb	w0, [x20, 18]
 	bl	flash_lsb_page_tbl_build
 	ldrb	w0, [x20, 20]
-	adrp	x20, .LANCHOR174
+	adrp	x20, .LANCHOR171
 	bl	nandc_bch_sel
-	str	xzr, [x20, #:lo12:.LANCHOR174]
-	ldr	x2, [x24, #:lo12:.LANCHOR16]
+	str	xzr, [x20, #:lo12:.LANCHOR171]
+	ldr	x2, [x24, #:lo12:.LANCHOR21]
 	ldrh	w0, [x2, 16]
 	ubfx	x1, x0, 8, 3
-	strb	w1, [x25, #:lo12:.LANCHOR49]
-	adrp	x1, .LANCHOR186
+	strb	w1, [x25, #:lo12:.LANCHOR48]
+	adrp	x1, .LANCHOR183
 	ubfx	x3, x0, 3, 1
-	strb	w3, [x1, #:lo12:.LANCHOR186]
-	adrp	x1, .LANCHOR45
+	strb	w3, [x1, #:lo12:.LANCHOR183]
+	adrp	x1, .LANCHOR44
 	ubfx	x3, x0, 4, 1
-	strb	w3, [x1, #:lo12:.LANCHOR45]
-	adrp	x1, .LANCHOR84
+	strb	w3, [x1, #:lo12:.LANCHOR44]
+	adrp	x1, .LANCHOR83
 	ubfx	x3, x0, 12, 1
-	strb	w3, [x1, #:lo12:.LANCHOR84]
-	adrp	x1, .LANCHOR81
+	strb	w3, [x1, #:lo12:.LANCHOR83]
+	adrp	x1, .LANCHOR80
 	ubfx	x3, x0, 13, 1
-	strb	w3, [x1, #:lo12:.LANCHOR81]
-	adrp	x1, .LANCHOR36
+	strb	w3, [x1, #:lo12:.LANCHOR80]
+	adrp	x1, .LANCHOR35
 	ubfx	x3, x0, 11, 1
-	strb	w3, [x1, #:lo12:.LANCHOR36]
+	strb	w3, [x1, #:lo12:.LANCHOR35]
 	adrp	x3, .LANCHOR124
 	ldrb	w1, [x2, 31]
 	ldrb	w2, [x2, 28]
@@ -18850,227 +19415,227 @@ nand_flash_init:
 	ubfx	x4, x0, 14, 1
 	lsr	w0, w0, 15
 	strb	w4, [x3, #:lo12:.LANCHOR1]
-	adrp	x3, .LANCHOR82
-	strb	w0, [x3, #:lo12:.LANCHOR82]
+	adrp	x3, .LANCHOR81
+	strb	w0, [x3, #:lo12:.LANCHOR81]
 	adrp	x0, .LANCHOR0
 	ubfx	x3, x1, 3, 1
 	ubfx	x1, x1, 4, 1
 	strb	w2, [x0, #:lo12:.LANCHOR0]
-	adrp	x0, .LANCHOR31
-	strb	w3, [x0, #:lo12:.LANCHOR31]
-	adrp	x0, .LANCHOR37
-	strb	w1, [x0, #:lo12:.LANCHOR37]
-	adrp	x1, .LANCHOR17
+	adrp	x0, .LANCHOR30
+	strb	w3, [x0, #:lo12:.LANCHOR30]
+	adrp	x0, .LANCHOR36
+	strb	w1, [x0, #:lo12:.LANCHOR36]
+	adrp	x1, .LANCHOR22
 	mov	w0, 60
-	strb	w0, [x1, #:lo12:.LANCHOR17]
-	ldrb	w0, [x26, #:lo12:.LANCHOR28]
+	strb	w0, [x1, #:lo12:.LANCHOR22]
+	ldrb	w0, [x26, #:lo12:.LANCHOR27]
 	cmp	w0, 9
-	bne	.L2986
+	bne	.L3013
 	mov	w3, 70
-	strb	w3, [x1, #:lo12:.LANCHOR17]
-.L2986:
-	add	x1, x19, :lo12:.LANCHOR33
-	adrp	x24, .LANCHOR19
-	strb	w2, [x24, #:lo12:.LANCHOR19]
+	strb	w3, [x1, #:lo12:.LANCHOR22]
+.L3013:
+	add	x1, x19, :lo12:.LANCHOR32
+	adrp	x24, .LANCHOR24
+	strb	w2, [x24, #:lo12:.LANCHOR24]
 	ldrb	w2, [x1, 31]
-	tbz	x2, 0, .L2987
+	tbz	x2, 0, .L3014
 	ldrb	w1, [x1, 29]
-	cbz	w1, .L2988
+	cbz	w1, .L3015
 	mov	w1, 2
-.L3046:
-	strb	w1, [x24, #:lo12:.LANCHOR19]
-.L2987:
+.L3073:
+	strb	w1, [x24, #:lo12:.LANCHOR24]
+.L3014:
 	cmp	w0, 8
-	bne	.L2989
-	ldrb	w0, [x22, #:lo12:.LANCHOR48]
+	bne	.L3016
+	ldrb	w0, [x22, #:lo12:.LANCHOR47]
 	mov	w1, 137
 	cmp	w0, 44
 	ccmp	w0, w1, 4, ne
-	bne	.L2989
-	add	x0, x19, :lo12:.LANCHOR33
+	bne	.L3016
+	add	x0, x19, :lo12:.LANCHOR32
 	ldrb	w0, [x0, 28]
 	cmp	w0, 3
-	bne	.L2989
-	strb	wzr, [x24, #:lo12:.LANCHOR19]
-.L2989:
+	bne	.L3016
+	strb	wzr, [x24, #:lo12:.LANCHOR24]
+.L3016:
 	bl	nand_flash_exit_boot_rom_slc_mode
-	adrp	x27, .LANCHOR24
-	add	x1, x19, :lo12:.LANCHOR33
+	adrp	x27, .LANCHOR16
+	add	x1, x19, :lo12:.LANCHOR32
 	ldrb	w0, [x1, 19]
 	ldrh	w1, [x1, 16]
-	strb	w0, [x27, #:lo12:.LANCHOR24]
-	tbz	x1, 6, .L2991
+	strb	w0, [x27, #:lo12:.LANCHOR16]
+	tbz	x1, 6, .L3018
 	sub	w1, w0, #17
 	and	w1, w1, 255
 	cmp	w1, 2
 	ccmp	w0, 21, 4, hi
-	bne	.L2992
+	bne	.L3019
 	adrp	x1, micron_read_retrial
 	add	x1, x1, :lo12:micron_read_retrial
-	str	x1, [x20, #:lo12:.LANCHOR174]
+	str	x1, [x20, #:lo12:.LANCHOR171]
 	cmp	w0, 21
-	adrp	x0, .LANCHOR169
-	beq	.L2993
+	adrp	x0, .LANCHOR166
+	beq	.L3020
 	mov	w1, 15
-.L3048:
-	strb	w1, [x0, #:lo12:.LANCHOR169]
-.L2991:
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3002
+.L3075:
+	strb	w1, [x0, #:lo12:.LANCHOR166]
+.L3018:
+	ldr	w0, [x21, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L3029
 	adrp	x2, .LANCHOR213
-	adrp	x0, .LC97
+	adrp	x0, .LC94
 	add	x2, x2, :lo12:.LANCHOR213
-	mov	w1, 3549
-	add	x0, x0, :lo12:.LC97
+	mov	w1, 3571
+	add	x0, x0, :lo12:.LC94
 	bl	printf
-.L3002:
-	adrp	x26, .LANCHOR21
-	ldrb	w0, [x25, #:lo12:.LANCHOR49]
-	strb	wzr, [x26, #:lo12:.LANCHOR21]
-	tbz	x0, 0, .L3003
-	ldrb	w0, [x22, #:lo12:.LANCHOR48]
+.L3029:
+	adrp	x26, .LANCHOR26
+	ldrb	w0, [x25, #:lo12:.LANCHOR48]
+	strb	wzr, [x26, #:lo12:.LANCHOR26]
+	tbz	x0, 0, .L3030
+	ldrb	w0, [x22, #:lo12:.LANCHOR47]
 	cmp	w0, 155
-	beq	.L3004
+	beq	.L3031
 	mov	w0, 4
 	bl	flash_set_interface_mode
 	mov	w0, 4
 	bl	nandc_set_if_mode
-.L3004:
+.L3031:
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
-.L3050:
+.L3077:
 	bl	nandc_set_if_mode
 	bl	flash_info_blk_init
-	mov	w8, w0
+	mov	w22, w0
 	cmn	w0, #1
-	bne	.L3006
-	ldr	x0, [x23, #:lo12:.LANCHOR27]
+	bne	.L3033
+	ldr	x0, [x23, #:lo12:.LANCHOR6]
 	mov	w1, 17
 	strb	w1, [x0, 32]
-	adrp	x0, .LANCHOR34
-	strb	wzr, [x0, #:lo12:.LANCHOR34]
+	adrp	x0, .LANCHOR33
+	strb	wzr, [x0, #:lo12:.LANCHOR33]
 	mov	w0, 0
 	bl	zftl_flash_exit_slc_mode
-	b	.L2972
-.L2980:
+	b	.L2999
+.L3007:
 	add	x10, x10, 1
 	add	x8, x8, 32
 	cmp	x10, 49
-	bne	.L2982
-	b	.L2977
-.L2988:
+	bne	.L3009
+	b	.L3004
+.L3015:
 	mov	w1, 3
-	b	.L3046
-.L2993:
+	b	.L3073
+.L3020:
 	mov	w1, 4
-	b	.L3048
-.L2992:
+	b	.L3075
+.L3019:
 	sub	w1, w0, #65
 	cmp	w0, 33
 	and	w1, w1, 255
 	ccmp	w1, 1, 0, ne
-	bhi	.L2995
+	bhi	.L3022
 	adrp	x0, toshiba_read_retrial
 	add	x0, x0, :lo12:toshiba_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR174]
-	adrp	x0, .LANCHOR26
+	str	x0, [x20, #:lo12:.LANCHOR171]
+	adrp	x0, .LANCHOR18
 	mov	w1, 4
-	strb	w1, [x0, #:lo12:.LANCHOR26]
-.L3052:
+	strb	w1, [x0, #:lo12:.LANCHOR18]
+.L3079:
 	mov	w1, 7
-.L3051:
-	adrp	x0, .LANCHOR169
-	b	.L3048
-.L2995:
+.L3078:
+	adrp	x0, .LANCHOR166
+	b	.L3075
+.L3022:
 	sub	w2, w0, #34
 	sub	w1, w0, #67
 	and	w2, w2, 255
 	and	w1, w1, 255
 	cmp	w2, 1
 	ccmp	w1, 1, 0, hi
-	bhi	.L2996
+	bhi	.L3023
 	adrp	x2, toshiba_read_retrial
 	add	x2, x2, :lo12:toshiba_read_retrial
-	str	x2, [x20, #:lo12:.LANCHOR174]
+	str	x2, [x20, #:lo12:.LANCHOR171]
 	cmp	w0, 35
 	mov	w2, 68
 	ccmp	w0, w2, 4, ne
-	adrp	x0, .LANCHOR169
-	beq	.L2997
+	adrp	x0, .LANCHOR166
+	beq	.L3024
 	mov	w2, 7
-.L3047:
-	strb	w2, [x0, #:lo12:.LANCHOR169]
+.L3074:
+	strb	w2, [x0, #:lo12:.LANCHOR166]
 	cmp	w1, 1
-	adrp	x0, .LANCHOR26
-	bhi	.L2999
+	adrp	x0, .LANCHOR18
+	bhi	.L3026
 	mov	w1, 4
-.L3049:
-	strb	w1, [x0, #:lo12:.LANCHOR26]
-	b	.L2991
-.L2997:
+.L3076:
+	strb	w1, [x0, #:lo12:.LANCHOR18]
+	b	.L3018
+.L3024:
 	mov	w2, 17
-	b	.L3047
-.L2999:
+	b	.L3074
+.L3026:
 	mov	w1, 5
-	b	.L3049
-.L2996:
+	b	.L3076
+.L3023:
 	sub	w1, w0, #36
 	and	w1, w1, 255
 	cmp	w1, 1
-	bhi	.L3000
+	bhi	.L3027
 	adrp	x0, toshiba_3d_read_retrial
 	add	x0, x0, :lo12:toshiba_3d_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR174]
-	b	.L3052
-.L3000:
+	str	x0, [x20, #:lo12:.LANCHOR171]
+	b	.L3079
+.L3027:
 	cmp	w0, 50
-	bne	.L3001
+	bne	.L3028
 	adrp	x0, samsung_read_retrial
 	mov	w1, 25
 	add	x0, x0, :lo12:samsung_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR174]
-	b	.L3051
-.L3001:
+	str	x0, [x20, #:lo12:.LANCHOR171]
+	b	.L3078
+.L3028:
 	cmp	w0, 81
-	bne	.L2991
+	bne	.L3018
 	adrp	x0, ymtc_3d_read_retrial
 	add	x0, x0, :lo12:ymtc_3d_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR174]
-	adrp	x0, .LANCHOR169
+	str	x0, [x20, #:lo12:.LANCHOR171]
+	adrp	x0, .LANCHOR166
 	mov	w1, 7
-	strb	w1, [x0, #:lo12:.LANCHOR169]
-	adrp	x0, .LANCHOR51
-	strb	wzr, [x0, #:lo12:.LANCHOR51]
-	b	.L2991
-.L3003:
+	strb	w1, [x0, #:lo12:.LANCHOR166]
+	adrp	x0, .LANCHOR50
+	strb	wzr, [x0, #:lo12:.LANCHOR50]
+	b	.L3018
+.L3030:
 	mov	w0, 4
-	b	.L3050
-.L3006:
-	add	x19, x19, :lo12:.LANCHOR33
+	b	.L3077
+.L3033:
+	add	x19, x19, :lo12:.LANCHOR32
 	ldrb	w0, [x19, 7]
 	cmp	w0, 9
-	bne	.L3007
-	ldr	x0, [x23, #:lo12:.LANCHOR27]
+	bne	.L3034
+	ldr	x0, [x23, #:lo12:.LANCHOR6]
 	ldrb	w0, [x0, 20]
 	cmp	w0, 1
-	beq	.L3007
-	strb	wzr, [x24, #:lo12:.LANCHOR19]
-.L3007:
-	ldrb	w0, [x27, #:lo12:.LANCHOR24]
+	beq	.L3034
+	strb	wzr, [x24, #:lo12:.LANCHOR24]
+.L3034:
+	ldrb	w0, [x27, #:lo12:.LANCHOR16]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 7
-	bhi	.L3008
+	bhi	.L3035
 	adrp	x0, hynix_read_retrial
 	add	x0, x0, :lo12:hynix_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR174]
-.L3008:
-	ldrb	w0, [x25, #:lo12:.LANCHOR49]
-	tbz	x0, 2, .L3010
-	ldr	x0, [x23, #:lo12:.LANCHOR27]
+	str	x0, [x20, #:lo12:.LANCHOR171]
+.L3035:
+	ldrb	w0, [x25, #:lo12:.LANCHOR48]
+	tbz	x0, 2, .L3037
+	ldr	x0, [x23, #:lo12:.LANCHOR6]
 	ldrb	w0, [x0, 19]
-	cbz	w0, .L3010
+	cbz	w0, .L3037
 	adrp	x0, .LANCHOR211
 	ldrb	w1, [x0, #:lo12:.LANCHOR211]
 	adrp	x0, .LANCHOR2
@@ -19078,25 +19643,25 @@ nand_flash_init:
 	mul	w1, w1, w0
 	mov	w0, 0
 	bl	flash_ddr_para_scan
-	ldrb	w0, [x26, #:lo12:.LANCHOR21]
-	cbnz	w0, .L3010
-	ldr	x0, [x23, #:lo12:.LANCHOR27]
+	ldrb	w0, [x26, #:lo12:.LANCHOR26]
+	cbnz	w0, .L3037
+	ldr	x0, [x23, #:lo12:.LANCHOR6]
 	strb	wzr, [x0, 19]
 	bl	flash_info_flush
-.L3010:
+.L3037:
 	bl	nand_flash_exit_boot_rom_slc_mode
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3012
+	ldr	w0, [x21, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L3039
 	adrp	x2, .LANCHOR213
-	adrp	x0, .LC97
+	adrp	x0, .LC94
 	add	x2, x2, :lo12:.LANCHOR213
-	mov	w1, 3647
-	add	x0, x0, :lo12:.LC97
+	mov	w1, 3674
+	add	x0, x0, :lo12:.LC94
 	bl	printf
-.L3012:
+.L3039:
 	bl	nand_flash_print_info
-	mov	w8, 0
-	b	.L2972
+	mov	w22, 0
+	b	.L2999
 	.size	nand_flash_init, .-nand_flash_init
 	.section	.text.ftl_sysblk_dump,"ax",@progbits
 	.align	2
@@ -19113,37 +19678,37 @@ ftl_sysblk_dump:
 	stp	x25, x26, [sp, 112]
 	mov	w0, 1
 	stp	x27, x28, [sp, 128]
-	adrp	x25, .LANCHOR95
+	adrp	x25, .LANCHOR94
 	stp	x21, x22, [sp, 80]
 	bl	buf_alloc
 	ldr	x28, [x0, 8]
 	adrp	x26, .LANCHOR111
 	adrp	x27, .LANCHOR131
 	mov	x24, x0
-	add	x25, x25, :lo12:.LANCHOR95
+	add	x25, x25, :lo12:.LANCHOR94
 	add	x26, x26, :lo12:.LANCHOR111
 	add	x27, x27, :lo12:.LANCHOR131
 	mov	w19, 0
-.L3054:
+.L3081:
 	ldrh	w0, [x25]
 	cmp	w0, w19
-	bhi	.L3056
+	bhi	.L3083
 	add	x1, x28, 704
 	mov	w3, 32
 	mov	w2, 4
-	adrp	x0, .LC176
-	add	x0, x0, :lo12:.LC176
+	adrp	x0, .LC179
+	add	x0, x0, :lo12:.LC179
 	bl	rknand_print_hex
 	mov	x0, x24
 	bl	zbuf_free
-	cbz	w20, .L3057
+	cbz	w20, .L3084
 	adrp	x1, .LANCHOR218
 	adrp	x0, .LC0
-	mov	w2, 1611
+	mov	w2, 1619
 	add	x1, x1, :lo12:.LANCHOR218
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3057:
+.L3084:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
@@ -19153,7 +19718,7 @@ ftl_sysblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 144
 	ret
-.L3056:
+.L3083:
 	ldrh	w21, [x26]
 	ldrb	w3, [x27]
 	ldr	x1, [x24, 8]
@@ -19182,13 +19747,13 @@ ftl_sysblk_dump:
 	mov	w1, w23
 	ldp	w5, w6, [x0]
 	ldr	w7, [x0, 8]
-	adrp	x0, .LC167
-	add	x0, x0, :lo12:.LC167
+	adrp	x0, .LC160
+	add	x0, x0, :lo12:.LC160
 	bl	printf
 	cmp	w22, 512
 	ccmn	w22, #1, 4, ne
 	csinc	w20, w20, wzr, ne
-	b	.L3054
+	b	.L3081
 	.size	ftl_sysblk_dump, .-ftl_sysblk_dump
 	.section	.text.ftl_open_sblk_recovery,"ax",@progbits
 	.align	2
@@ -19198,56 +19763,56 @@ ftl_open_sblk_recovery:
 	stp	x29, x30, [sp, -368]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR14
+	adrp	x21, .LANCHOR19
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	ldr	w0, [x21, #:lo12:.LANCHOR19]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	str	x1, [x29, 144]
-	tbz	x0, 12, .L3065
+	tbz	x0, 12, .L3092
 	ldrh	w1, [x19, 2]
-	adrp	x0, .LC177
-	add	x0, x0, :lo12:.LC177
+	adrp	x0, .LC180
+	add	x0, x0, :lo12:.LC180
 	bl	printf
-.L3065:
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3066
+.L3092:
+	ldr	w0, [x21, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L3093
 	ldrb	w1, [x19, 5]
-	adrp	x0, .LC178
-	add	x0, x0, :lo12:.LC178
+	adrp	x0, .LC181
+	add	x0, x0, :lo12:.LC181
 	bl	printf
-.L3066:
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3067
+.L3093:
+	ldr	w0, [x21, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L3094
 	ldrh	w1, [x19]
-	adrp	x0, .LC179
-	add	x0, x0, :lo12:.LC179
+	adrp	x0, .LC182
+	add	x0, x0, :lo12:.LC182
 	bl	printf
-.L3067:
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3068
+.L3094:
+	ldr	w0, [x21, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L3095
 	ldrh	w2, [x19, 18]
-	adrp	x0, .LC180
+	adrp	x0, .LC183
 	ldrh	w1, [x19, 16]
-	add	x0, x0, :lo12:.LC180
+	add	x0, x0, :lo12:.LC183
 	bl	printf
-.L3068:
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3069
+.L3095:
+	ldr	w0, [x21, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L3096
 	ldrb	w1, [x19, 9]
-	adrp	x0, .LC181
-	add	x0, x0, :lo12:.LC181
+	adrp	x0, .LC184
+	add	x0, x0, :lo12:.LC184
 	bl	printf
-.L3069:
+.L3096:
 	ldrh	w0, [x19, 10]
 	strh	w0, [x19, 14]
-	adrp	x0, .LANCHOR6
+	adrp	x0, .LANCHOR8
 	ldrh	w1, [x19]
-	ldrh	w0, [x0, #:lo12:.LANCHOR6]
+	ldrh	w0, [x0, #:lo12:.LANCHOR8]
 	cmp	w1, w0
-	bcs	.L3064
+	bcs	.L3091
 	mov	w0, 1
 	adrp	x22, .LANCHOR131
 	bl	buf_alloc
@@ -19277,101 +19842,101 @@ ftl_open_sblk_recovery:
 	ldrh	w24, [x19, 2]
 	add	x0, x0, :lo12:.LANCHOR111
 	str	x0, [x29, 128]
-.L3071:
-	adrp	x25, .LANCHOR95
-	ldrh	w0, [x25, #:lo12:.LANCHOR95]
+.L3098:
+	adrp	x25, .LANCHOR94
+	ldrh	w0, [x25, #:lo12:.LANCHOR94]
 	cmp	w0, w24
-	bhi	.L3086
-.L3074:
+	bhi	.L3113
+.L3101:
 	ldrh	w0, [x19, 10]
 	ldrh	w1, [x19, 6]
-	ldrh	w2, [x25, #:lo12:.LANCHOR95]
+	ldrh	w2, [x25, #:lo12:.LANCHOR94]
 	add	w1, w1, w0
 	ldrb	w0, [x19, 9]
 	strh	w24, [x19, 2]
 	strb	w23, [x19, 5]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L3087
+	beq	.L3114
 	adrp	x1, .LANCHOR219
 	adrp	x0, .LC0
-	mov	w2, 1794
+	mov	w2, 1802
 	add	x1, x1, :lo12:.LANCHOR219
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3087:
+.L3114:
 	adrp	x2, .LANCHOR117
 	ldrh	w3, [x19, 10]
 	mov	w0, 0
 	mov	w1, 0
 	ldr	x4, [x2, #:lo12:.LANCHOR117]
 	str	x2, [x29, 152]
-.L3088:
+.L3115:
 	cmp	w1, w3
-	bcc	.L3090
+	bcc	.L3117
 	ldrb	w23, [x19, 9]
-	adrp	x24, .LANCHOR9
-	ldrh	w1, [x25, #:lo12:.LANCHOR95]
+	adrp	x24, .LANCHOR11
+	ldrh	w1, [x25, #:lo12:.LANCHOR94]
 	madd	w23, w23, w1, w0
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	ldr	w0, [x21, #:lo12:.LANCHOR19]
 	sub	w23, w23, w3
 	and	w23, w23, 65535
-	tbz	x0, 12, .L3091
+	tbz	x0, 12, .L3118
 	ldrh	w1, [x19]
-	ldr	x2, [x24, #:lo12:.LANCHOR9]
+	ldr	x2, [x24, #:lo12:.LANCHOR11]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w3, [x2, x0]
-	adrp	x0, .LC184
+	adrp	x0, .LC187
 	mov	w2, w23
-	add	x0, x0, :lo12:.LC184
+	add	x0, x0, :lo12:.LC187
 	bl	printf
-.L3091:
-	ldr	x0, [x24, #:lo12:.LANCHOR9]
+.L3118:
+	ldr	x0, [x24, #:lo12:.LANCHOR11]
 	ldrh	w1, [x19]
 	strh	w23, [x0, x1, lsl 1]
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 14, .L3092
+	ldr	w0, [x21, #:lo12:.LANCHOR19]
+	tbz	x0, 14, .L3119
 	ldp	w1, w2, [x29, 176]
-	adrp	x0, .LC185
+	adrp	x0, .LC188
 	ldp	w3, w4, [x29, 184]
-	add	x0, x0, :lo12:.LC185
+	add	x0, x0, :lo12:.LC188
 	bl	printf
-.L3092:
+.L3119:
 	ldr	x0, [x20, 8]
 	mov	w1, 0
 	ldrb	w2, [x22, #:lo12:.LANCHOR131]
-	adrp	x28, .LANCHOR80
+	adrp	x28, .LANCHOR79
 	mov	x24, 0
 	lsl	w2, w2, 9
 	bl	ftl_memset
-	adrp	x0, .LC187
-	add	x0, x0, :lo12:.LC187
+	adrp	x0, .LC190
+	add	x0, x0, :lo12:.LC190
 	str	x0, [x29, 136]
-	add	x0, x28, :lo12:.LANCHOR80
+	add	x0, x28, :lo12:.LANCHOR79
 	str	x0, [x29, 128]
-.L3093:
-	ldrb	w0, [x28, #:lo12:.LANCHOR80]
-	add	x1, x28, :lo12:.LANCHOR80
+.L3120:
+	ldrb	w0, [x28, #:lo12:.LANCHOR79]
+	add	x1, x28, :lo12:.LANCHOR79
 	str	w24, [x29, 168]
 	mul	w0, w0, w27
 	cmp	w24, w0
-	bcc	.L3104
-	adrp	x24, .LC188
-	adrp	x23, .LC187
-	add	x24, x24, :lo12:.LC188
-	add	x23, x23, :lo12:.LC187
+	bcc	.L3131
+	adrp	x24, .LC191
+	adrp	x23, .LC190
+	add	x24, x24, :lo12:.LC191
+	add	x23, x23, :lo12:.LC190
 	mov	x28, 0
 	str	x1, [x29, 160]
-.L3105:
+.L3132:
 	ldr	x0, [x29, 160]
 	ldrb	w0, [x0]
 	mul	w0, w0, w27
 	cmp	w0, w28
-	bhi	.L3111
+	bhi	.L3138
 	mov	x0, x20
 	bl	zbuf_free
 	ldrh	w1, [x19, 12]
-	ldrh	w0, [x25, #:lo12:.LANCHOR95]
+	ldrh	w0, [x25, #:lo12:.LANCHOR94]
 	ldrb	w2, [x19, 9]
 	madd	w0, w0, w2, w1
 	mov	x1, -4
@@ -19380,20 +19945,20 @@ ftl_open_sblk_recovery:
 	ldr	x1, [x1, #:lo12:.LANCHOR117]
 	ldr	w0, [x1, x0]
 	cmn	w0, #1
-	beq	.L3112
+	beq	.L3139
 	adrp	x1, .LANCHOR219
 	adrp	x0, .LC0
-	mov	w2, 1909
+	mov	w2, 1917
 	add	x1, x1, :lo12:.LANCHOR219
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3112:
+.L3139:
 	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bne	.L3064
+	bne	.L3091
 	mov	x0, x19
 	bl	ftl_write_last_log_page
-.L3064:
+.L3091:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -19401,27 +19966,27 @@ ftl_open_sblk_recovery:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 368
 	ret
-.L3086:
+.L3113:
 	ldrb	w23, [x19, 5]
-	adrp	x0, .LANCHOR198
-	add	x0, x0, :lo12:.LANCHOR198
+	adrp	x0, .LANCHOR195
+	add	x0, x0, :lo12:.LANCHOR195
 	str	x0, [x29, 136]
-.L3072:
+.L3099:
 	ldrb	w0, [x19, 9]
 	cmp	w0, w23
-	bhi	.L3085
+	bhi	.L3112
 	add	w24, w24, 1
 	strb	wzr, [x19, 5]
 	and	w24, w24, 65535
-	b	.L3071
-.L3085:
+	b	.L3098
+.L3112:
 	add	x0, x19, x23, sxtw 1
 	ldrh	w0, [x0, 16]
 	str	w0, [x29, 168]
 	mov	w0, 65535
 	ldr	w1, [x29, 168]
 	cmp	w1, w0
-	beq	.L3073
+	beq	.L3100
 	ldr	x0, [x29, 128]
 	ldrb	w3, [x22, #:lo12:.LANCHOR131]
 	ldr	x2, [x20, 24]
@@ -19432,21 +19997,21 @@ ftl_open_sblk_recovery:
 	bl	ftl_read_ppa_page
 	mov	w28, w0
 	cmp	w0, 512
-	beq	.L3074
+	beq	.L3101
 	cmn	w0, #1
-	beq	.L3075
+	beq	.L3102
 	ldr	x0, [x20, 24]
 	ldr	w1, [x0]
 	cmn	w1, #1
-	bne	.L3075
+	bne	.L3102
 	ldr	w0, [x0, 4]
 	cmn	w0, #1
-	bne	.L3075
+	bne	.L3102
 	ldr	x0, [x20, 8]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L3074
-.L3075:
+	beq	.L3101
+.L3102:
 	ldr	x1, [x29, 136]
 	mov	w0, 1
 	strb	w0, [x1]
@@ -19454,76 +20019,76 @@ ftl_open_sblk_recovery:
 	ldrh	w1, [x19, 10]
 	madd	w0, w0, w24, w23
 	cmp	w1, w0
-	beq	.L3076
+	beq	.L3103
 	adrp	x1, .LANCHOR219
 	adrp	x0, .LC0
-	mov	w2, 1686
+	mov	w2, 1694
 	add	x1, x1, :lo12:.LANCHOR219
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3076:
+.L3103:
 	ldrh	w0, [x19, 10]
 	ldrh	w1, [x19, 6]
 	ldrb	w2, [x19, 9]
 	add	w1, w1, w0
-	ldrh	w0, [x25, #:lo12:.LANCHOR95]
+	ldrh	w0, [x25, #:lo12:.LANCHOR94]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L3077
+	beq	.L3104
 	adrp	x1, .LANCHOR219
 	adrp	x0, .LC0
-	mov	w2, 1687
+	mov	w2, 1695
 	add	x1, x1, :lo12:.LANCHOR219
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3077:
+.L3104:
 	ldrb	w0, [x22, #:lo12:.LANCHOR131]
 	cmp	w0, 8
-	bls	.L3078
+	bls	.L3105
 	ldr	x6, [x20, 24]
 	mov	w1, 15555
 	movk	w1, 0xf55f, lsl 16
 	ldr	w0, [x6]
 	cmp	w0, w1
-	beq	.L3078
+	beq	.L3105
 	cmn	w28, #1
-	beq	.L3080
+	beq	.L3107
 	ldr	w0, [x6, 4]
 	cmn	w0, #1
-	beq	.L3081
+	beq	.L3108
 	ldr	w1, [x6, 16]
 	mov	w0, 21320
 	movk	w0, 0x4841, lsl 16
 	cmp	w1, w0
-	bne	.L3081
+	bne	.L3108
 	ldr	x0, [x29, 152]
 	mov	w1, 1024
 	bl	js_hash
 	ldr	w1, [x6, 20]
 	cmp	w1, w0
-	beq	.L3081
+	beq	.L3108
 	ldr	w3, [x29, 160]
 	mov	w5, w0
 	ldr	w1, [x29, 168]
 	mov	w4, w28
 	mov	w2, w24
-	adrp	x0, .LC182
-	add	x0, x0, :lo12:.LC182
+	adrp	x0, .LC185
+	add	x0, x0, :lo12:.LC185
 	bl	printf
 	ldr	x1, [x29, 152]
 	mov	w3, 16
 	mov	w2, 4
-	adrp	x0, .LC183
-	add	x0, x0, :lo12:.LC183
+	adrp	x0, .LC186
+	add	x0, x0, :lo12:.LC186
 	bl	rknand_print_hex
 	ldr	x1, [x20, 24]
-	adrp	x0, .LC150
+	adrp	x0, .LC147
 	ldrb	w3, [x22, #:lo12:.LANCHOR131]
 	mov	w2, 4
-	add	x0, x0, :lo12:.LC150
+	add	x0, x0, :lo12:.LC147
 	lsr	w3, w3, 1
 	bl	rknand_print_hex
-.L3080:
+.L3107:
 	ldrh	w0, [x19, 6]
 	mov	w27, 4
 	sub	w0, w0, #1
@@ -19531,55 +20096,55 @@ ftl_open_sblk_recovery:
 	ldrh	w0, [x19, 10]
 	add	w0, w0, 1
 	strh	w0, [x19, 10]
-.L3073:
+.L3100:
 	add	w23, w23, 1
 	and	w23, w23, 65535
-	b	.L3072
-.L3078:
+	b	.L3099
+.L3105:
 	cmn	w28, #1
-	beq	.L3080
-.L3081:
+	beq	.L3107
+.L3108:
 	ldr	x1, [x20, 24]
 	ldr	w0, [x1, 4]
 	cmn	w0, #1
-	beq	.L3080
+	beq	.L3107
 	ldr	w1, [x1]
 	mov	w2, 15555
 	movk	w2, 0xf55f, lsl 16
 	cmp	w1, w2
-	beq	.L3080
+	beq	.L3107
 	bl	lpa_hash_get_ppa
 	ldr	x1, [x29, 144]
-	cbz	x1, .L3083
+	cbz	x1, .L3110
 	ldr	x3, [x20, 24]
 	ldr	w1, [x3, 8]
 	cmp	w0, w1
-	beq	.L3083
+	beq	.L3110
 	cmn	w0, #1
-	beq	.L3083
-	adrp	x4, .LANCHOR32
-	adrp	x5, .LANCHOR75
+	beq	.L3110
+	adrp	x4, .LANCHOR31
+	adrp	x5, .LANCHOR74
 	mov	w28, 24
 	mov	w27, 1
-	ldrb	w1, [x4, #:lo12:.LANCHOR32]
-	ldrh	w6, [x5, #:lo12:.LANCHOR75]
+	ldrb	w1, [x4, #:lo12:.LANCHOR31]
+	ldrh	w6, [x5, #:lo12:.LANCHOR74]
 	sub	w1, w28, w1
 	sub	w1, w1, w6
 	lsr	w2, w0, w6
-	adrp	x6, .LANCHOR76
+	adrp	x6, .LANCHOR75
 	lsl	w1, w27, w1
 	sub	w1, w1, #1
 	and	w1, w1, w2
-	ldrb	w2, [x6, #:lo12:.LANCHOR76]
+	ldrb	w2, [x6, #:lo12:.LANCHOR75]
 	udiv	w1, w1, w2
 	ldr	x2, [x29, 144]
 	ldrh	w2, [x2]
 	cmp	w2, w1, uxth
-	bne	.L3083
+	bne	.L3110
 	ldr	w8, [x3]
-	adrp	x7, .LANCHOR193
+	adrp	x7, .LANCHOR190
 	ldrb	w3, [x22, #:lo12:.LANCHOR131]
-	add	x2, x7, :lo12:.LANCHOR193
+	add	x2, x7, :lo12:.LANCHOR190
 	ldr	x1, [x20, 8]
 	str	w8, [x29, 124]
 	str	x7, [x29, 168]
@@ -19588,43 +20153,43 @@ ftl_open_sblk_recovery:
 	bl	ftl_read_ppa_page
 	ldr	x7, [x29, 168]
 	ldr	w8, [x29, 124]
-	ldr	w0, [x7, #:lo12:.LANCHOR193]
+	ldr	w0, [x7, #:lo12:.LANCHOR190]
 	cmp	w8, w0
-	bhi	.L3083
+	bhi	.L3110
 	ldr	x0, [x20, 24]
 	ldr	w0, [x0, 8]
 	cmn	w0, #1
-	beq	.L3080
+	beq	.L3107
 	ldp	x6, x4, [x29, 96]
 	ldr	x5, [x29, 112]
-	ldrb	w2, [x4, #:lo12:.LANCHOR32]
-	ldrh	w1, [x5, #:lo12:.LANCHOR75]
+	ldrb	w2, [x4, #:lo12:.LANCHOR31]
+	ldrh	w1, [x5, #:lo12:.LANCHOR74]
 	sub	w28, w28, w2
 	sub	w28, w28, w1
 	lsr	w0, w0, w1
 	lsl	w27, w27, w28
 	sub	w27, w27, #1
 	and	w27, w27, w0
-	ldrb	w0, [x6, #:lo12:.LANCHOR76]
+	ldrb	w0, [x6, #:lo12:.LANCHOR75]
 	udiv	w0, w27, w0
 	bl	ftl_vpn_decrement
-	b	.L3080
-.L3090:
+	b	.L3107
+.L3117:
 	ldrh	w2, [x19, 12]
 	add	w2, w2, w1
 	ldr	w2, [x4, x2, lsl 2]
 	cmn	w2, #1
-	beq	.L3089
+	beq	.L3116
 	add	w23, w0, 1
 	and	w0, w23, 65535
-.L3089:
+.L3116:
 	add	w1, w1, 1
-	b	.L3088
-.L3104:
+	b	.L3115
+.L3131:
 	ldr	w0, [x26, x24, lsl 2]
 	cmn	w0, #1
-	bne	.L3094
-.L3098:
+	bne	.L3121
+.L3125:
 	adrp	x0, .LANCHOR110
 	ldr	x1, [x20, 24]
 	mov	w23, -1
@@ -19638,21 +20203,21 @@ ftl_open_sblk_recovery:
 	str	wzr, [x0]
 	mov	w0, 2
 	bl	ftl_debug_info_fill
-.L3095:
+.L3122:
 	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bls	.L3100
-	add	x0, x21, :lo12:.LANCHOR14
+	bls	.L3127
+	add	x0, x21, :lo12:.LANCHOR19
 	str	x0, [x29, 160]
 	add	x0, x22, :lo12:.LANCHOR131
 	str	x0, [x29, 144]
-.L3164:
+.L3191:
 	mov	x0, x19
 	bl	ftl_get_new_free_page
 	mov	w4, w0
 	ldr	x0, [x29, 160]
 	ldr	w0, [x0]
-	tbz	x0, 14, .L3101
+	tbz	x0, 14, .L3128
 	ldrh	w0, [x19, 12]
 	mov	w1, w4
 	ldrh	w3, [x19, 10]
@@ -19664,7 +20229,7 @@ ftl_open_sblk_recovery:
 	ldr	x0, [x29, 136]
 	bl	printf
 	ldr	w4, [x29, 124]
-.L3101:
+.L3128:
 	ldr	x0, [x29, 128]
 	ldr	w2, [x29, 168]
 	ldrh	w1, [x19, 6]
@@ -19673,7 +20238,7 @@ ftl_open_sblk_recovery:
 	add	w0, w0, 1
 	sub	w0, w0, w2
 	cmp	w1, w0
-	bls	.L3100
+	bls	.L3127
 	ldr	x0, [x29, 144]
 	ldr	x1, [x20, 8]
 	ldr	x2, [x20, 24]
@@ -19689,7 +20254,7 @@ ftl_open_sblk_recovery:
 	cmn	w23, #1
 	ldr	w4, [x29, 112]
 	ccmn	w1, #1, 4, ne
-	beq	.L3103
+	beq	.L3130
 	add	x0, x29, 240
 	ldrh	w1, [x19, 12]
 	str	w4, [x0, x24, lsl 2]
@@ -19698,10 +20263,10 @@ ftl_open_sblk_recovery:
 	add	x1, x29, 304
 	sub	w0, w0, #1
 	str	w0, [x1, x24, lsl 2]
-.L3100:
+.L3127:
 	add	x24, x24, 1
-	b	.L3093
-.L3094:
+	b	.L3120
+.L3121:
 	ldrb	w3, [x22, #:lo12:.LANCHOR131]
 	ldr	x1, [x20, 8]
 	ldr	x2, [x20, 24]
@@ -19711,18 +20276,18 @@ ftl_open_sblk_recovery:
 	ldr	w0, [x0, 4]
 	bl	lpa_hash_get_ppa
 	mov	w4, w0
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 14, .L3096
+	ldr	w0, [x21, #:lo12:.LANCHOR19]
+	tbz	x0, 14, .L3123
 	ldr	x0, [x20, 24]
 	mov	w1, w4
 	ldr	w2, [x26, x24, lsl 2]
 	str	w4, [x29, 160]
 	ldr	w3, [x0, 4]
-	adrp	x0, .LC186
-	add	x0, x0, :lo12:.LC186
+	adrp	x0, .LC189
+	add	x0, x0, :lo12:.LC189
 	bl	printf
 	ldr	w4, [x29, 160]
-.L3096:
+.L3123:
 	ldr	x1, [x20, 24]
 	mov	x2, 0
 	ldr	w0, [x26, x24, lsl 2]
@@ -19734,20 +20299,20 @@ ftl_open_sblk_recovery:
 	mov	w0, 2
 	bl	ftl_debug_info_fill
 	cmn	w23, #1
-	bne	.L3095
-	b	.L3098
-.L3103:
+	bne	.L3122
+	b	.L3125
+.L3130:
 	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bls	.L3100
+	bls	.L3127
 	cmn	w23, #1
-	bne	.L3164
-	b	.L3100
-.L3111:
+	bne	.L3191
+	b	.L3127
+.L3138:
 	add	x0, x29, 240
 	ldr	w0, [x0, x28, lsl 2]
 	cmn	w0, #1
-	beq	.L3107
+	beq	.L3134
 	ldrb	w3, [x22, #:lo12:.LANCHOR131]
 	ldr	w0, [x26, x28, lsl 2]
 	ldr	x1, [x20, 8]
@@ -19755,7 +20320,7 @@ ftl_open_sblk_recovery:
 	bl	ftl_read_ppa_page
 	cmp	w0, 256
 	ccmn	w0, #1, 4, ne
-	bne	.L3107
+	bne	.L3134
 	add	x0, x29, 240
 	ldrb	w3, [x22, #:lo12:.LANCHOR131]
 	ldr	x1, [x20, 8]
@@ -19763,8 +20328,8 @@ ftl_open_sblk_recovery:
 	ldr	w0, [x0, x28, lsl 2]
 	bl	ftl_read_ppa_page
 	mov	w5, w0
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 14, .L3109
+	ldr	w0, [x21, #:lo12:.LANCHOR19]
+	tbz	x0, 14, .L3136
 	ldr	x0, [x20, 24]
 	mov	w1, w5
 	ldr	w3, [x26, x28, lsl 2]
@@ -19773,22 +20338,22 @@ ftl_open_sblk_recovery:
 	mov	x0, x23
 	bl	printf
 	ldr	w5, [x29, 168]
-.L3109:
+.L3136:
 	cmn	w5, #1
-	beq	.L3107
+	beq	.L3134
 	ldr	x0, [x20, 24]
 	ldr	w2, [x26, x28, lsl 2]
 	ldr	w1, [x0, 8]
 	cmp	w2, w1
-	bne	.L3107
-	ldr	w1, [x21, #:lo12:.LANCHOR14]
-	tbz	x1, 14, .L3110
+	bne	.L3134
+	ldr	w1, [x21, #:lo12:.LANCHOR19]
+	tbz	x1, 14, .L3137
 	add	x1, x29, 304
 	ldr	w3, [x1, x28, lsl 2]
 	ldr	w1, [x0, 4]
 	mov	x0, x24
 	bl	printf
-.L3110:
+.L3137:
 	add	x1, x29, 304
 	ldr	x0, [x20, 24]
 	ldr	w1, [x1, x28, lsl 2]
@@ -19797,31 +20362,31 @@ ftl_open_sblk_recovery:
 	ldrh	w2, [x29, 168]
 	ldr	w0, [x0, 4]
 	bl	lpa_hash_update_ppa
-.L3107:
+.L3134:
 	add	x28, x28, 1
-	b	.L3105
-.L3083:
+	b	.L3132
+.L3110:
 	ldr	x3, [x20, 24]
 	adrp	x0, .LANCHOR128
 	ldr	w0, [x0, #:lo12:.LANCHOR128]
 	ldr	w1, [x3, 4]
 	cmp	w1, w0
-	bcs	.L3080
+	bcs	.L3107
 	ldrb	w0, [x19, 9]
-	ldrh	w1, [x25, #:lo12:.LANCHOR95]
+	ldrh	w1, [x25, #:lo12:.LANCHOR94]
 	ldrh	w2, [x19, 10]
 	mul	w0, w0, w1
 	sub	w0, w0, #1
 	cmp	w2, w0
-	bge	.L3080
+	bge	.L3107
 	adrp	x0, .LANCHOR110
 	ldr	w1, [x3]
 	ldr	x0, [x0, #:lo12:.LANCHOR110]
 	ldr	w4, [x0, 8]
 	cmp	w1, w4
-	bls	.L3084
+	bls	.L3111
 	str	w1, [x0, 8]
-.L3084:
+.L3111:
 	ldrh	w0, [x19, 12]
 	add	w2, w2, w0
 	ldp	w0, w1, [x3, 4]
@@ -19834,7 +20399,7 @@ ftl_open_sblk_recovery:
 	str	w0, [x29, 184]
 	ldr	w0, [x29, 160]
 	str	w0, [x29, 188]
-	b	.L3080
+	b	.L3107
 	.size	ftl_open_sblk_recovery, .-ftl_open_sblk_recovery
 	.section	.text.dump_ftl_info,"ax",@progbits
 	.align	2
@@ -19842,101 +20407,101 @@ ftl_open_sblk_recovery:
 	.type	dump_ftl_info, %function
 dump_ftl_info:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LANCHOR58
+	adrp	x0, .LANCHOR57
 	add	x29, sp, 0
-	ldrb	w1, [x0, #:lo12:.LANCHOR58]
-	adrp	x0, .LC189
+	ldrb	w1, [x0, #:lo12:.LANCHOR57]
+	adrp	x0, .LC192
 	stp	x19, x20, [sp, 16]
-	add	x0, x0, :lo12:.LC189
+	add	x0, x0, :lo12:.LC192
 	stp	x21, x22, [sp, 32]
 	adrp	x22, .LANCHOR110
-	adrp	x19, .LANCHOR10
-	adrp	x20, .LANCHOR95
+	adrp	x19, .LANCHOR12
+	adrp	x20, .LANCHOR94
 	bl	printf
-	adrp	x21, .LANCHOR6
-	adrp	x0, .LANCHOR194
-	add	x1, x0, :lo12:.LANCHOR194
+	adrp	x21, .LANCHOR8
+	adrp	x0, .LANCHOR191
+	add	x1, x0, :lo12:.LANCHOR191
 	ldrh	w3, [x1, 2]
 	ldrb	w2, [x1, 1]
-	ldrb	w1, [x0, #:lo12:.LANCHOR194]
-	adrp	x0, .LC190
-	add	x0, x0, :lo12:.LC190
+	ldrb	w1, [x0, #:lo12:.LANCHOR191]
+	adrp	x0, .LC193
+	add	x0, x0, :lo12:.LC193
 	bl	printf
 	ldr	x0, [x22, #:lo12:.LANCHOR110]
 	ldrh	w2, [x0, 140]
 	ldrh	w1, [x0, 130]
-	adrp	x0, .LC191
-	add	x0, x0, :lo12:.LC191
+	adrp	x0, .LC194
+	add	x0, x0, :lo12:.LC194
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR10]
-	adrp	x0, .LC192
-	add	x0, x0, :lo12:.LC192
+	ldr	x1, [x19, #:lo12:.LANCHOR12]
+	adrp	x0, .LC195
+	add	x0, x0, :lo12:.LC195
 	ldrh	w5, [x1, 26]
 	ldrh	w4, [x1, 22]
 	ldrb	w3, [x1, 21]
 	ldrh	w2, [x1, 18]
 	ldrh	w1, [x1, 16]
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR10]
-	adrp	x0, .LC193
-	add	x0, x0, :lo12:.LC193
+	ldr	x1, [x19, #:lo12:.LANCHOR12]
+	adrp	x0, .LC196
+	add	x0, x0, :lo12:.LC196
 	ldrh	w5, [x1, 58]
 	ldrh	w4, [x1, 54]
 	ldrb	w3, [x1, 53]
 	ldrh	w2, [x1, 50]
 	ldrh	w1, [x1, 48]
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR10]
-	adrp	x19, .LANCHOR80
-	adrp	x0, .LC194
-	add	x0, x0, :lo12:.LC194
+	ldr	x1, [x19, #:lo12:.LANCHOR12]
+	adrp	x19, .LANCHOR79
+	adrp	x0, .LC197
+	add	x0, x0, :lo12:.LC197
 	ldrh	w5, [x1, 90]
 	ldrh	w4, [x1, 86]
 	ldrb	w3, [x1, 85]
 	ldrh	w2, [x1, 82]
 	ldrh	w1, [x1, 80]
 	bl	printf
-	ldrb	w0, [x19, #:lo12:.LANCHOR80]
+	ldrb	w0, [x19, #:lo12:.LANCHOR79]
 	mov	w2, 4
-	ldrh	w3, [x20, #:lo12:.LANCHOR95]
+	ldrh	w3, [x20, #:lo12:.LANCHOR94]
 	mul	w3, w3, w0
 	adrp	x0, .LANCHOR117
 	ldr	x1, [x0, #:lo12:.LANCHOR117]
-	adrp	x0, .LC195
+	adrp	x0, .LC198
 	lsl	w3, w3, 1
-	add	x0, x0, :lo12:.LC195
+	add	x0, x0, :lo12:.LC198
 	bl	rknand_print_hex
-	adrp	x0, .LANCHOR9
-	ldrh	w3, [x21, #:lo12:.LANCHOR6]
+	adrp	x0, .LANCHOR11
+	ldrh	w3, [x21, #:lo12:.LANCHOR8]
 	mov	w2, 2
-	ldr	x1, [x0, #:lo12:.LANCHOR9]
-	adrp	x0, .LC196
-	add	x0, x0, :lo12:.LC196
+	ldr	x1, [x0, #:lo12:.LANCHOR11]
+	adrp	x0, .LC199
+	add	x0, x0, :lo12:.LC199
 	bl	rknand_print_hex
 	ldr	x1, [x22, #:lo12:.LANCHOR110]
 	mov	w2, 4
-	adrp	x0, .LC176
-	add	x0, x0, :lo12:.LC176
+	adrp	x0, .LC179
+	add	x0, x0, :lo12:.LC179
 	add	x1, x1, 704
 	ldrh	w3, [x1, -6]
 	bl	rknand_print_hex
-	adrp	x0, .LANCHOR7
-	ldrh	w3, [x21, #:lo12:.LANCHOR6]
+	adrp	x0, .LANCHOR9
+	ldrh	w3, [x21, #:lo12:.LANCHOR8]
 	mov	w2, 4
-	ldr	x1, [x0, #:lo12:.LANCHOR7]
-	adrp	x0, .LC197
-	add	x0, x0, :lo12:.LC197
+	ldr	x1, [x0, #:lo12:.LANCHOR9]
+	adrp	x0, .LC200
+	add	x0, x0, :lo12:.LC200
 	bl	rknand_print_hex
 	mov	w3, 256
 	mov	w2, 2
 	adrp	x1, .LANCHOR116
-	adrp	x0, .LC198
+	adrp	x0, .LC201
 	add	x1, x1, :lo12:.LANCHOR116
-	add	x0, x0, :lo12:.LC198
+	add	x0, x0, :lo12:.LC201
 	bl	rknand_print_hex
-	ldrb	w0, [x19, #:lo12:.LANCHOR80]
+	ldrb	w0, [x19, #:lo12:.LANCHOR79]
 	mov	w2, 2
-	ldrh	w3, [x20, #:lo12:.LANCHOR95]
+	ldrh	w3, [x20, #:lo12:.LANCHOR94]
 	ldp	x21, x22, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	mul	w3, w3, w0
@@ -19944,8 +20509,8 @@ dump_ftl_info:
 	ldp	x29, x30, [sp], 48
 	lsl	w3, w3, 1
 	ldr	x1, [x0, #:lo12:.LANCHOR118]
-	adrp	x0, .LC199
-	add	x0, x0, :lo12:.LC199
+	adrp	x0, .LC202
+	add	x0, x0, :lo12:.LC202
 	b	rknand_print_hex
 	.size	dump_ftl_info, .-dump_ftl_info
 	.section	.text.pm_ppa_update_check,"ax",@progbits
@@ -19953,11 +20518,11 @@ dump_ftl_info:
 	.global	pm_ppa_update_check
 	.type	pm_ppa_update_check, %function
 pm_ppa_update_check:
-	adrp	x4, .LANCHOR32
-	adrp	x3, .LANCHOR75
+	adrp	x4, .LANCHOR31
+	adrp	x3, .LANCHOR74
 	mov	w5, 24
-	ldrb	w4, [x4, #:lo12:.LANCHOR32]
-	ldrh	w3, [x3, #:lo12:.LANCHOR75]
+	ldrb	w4, [x4, #:lo12:.LANCHOR31]
+	ldrh	w3, [x3, #:lo12:.LANCHOR74]
 	sub	w4, w5, w4
 	sub	w5, w4, w3
 	mov	w4, 1
@@ -19965,30 +20530,30 @@ pm_ppa_update_check:
 	lsl	w4, w4, w5
 	sub	w4, w4, #1
 	and	w4, w4, w3
-	adrp	x3, .LANCHOR76
-	ldrb	w3, [x3, #:lo12:.LANCHOR76]
+	adrp	x3, .LANCHOR75
+	ldrb	w3, [x3, #:lo12:.LANCHOR75]
 	udiv	w4, w4, w3
-	adrp	x3, .LANCHOR7
-	ldr	x3, [x3, #:lo12:.LANCHOR7]
+	adrp	x3, .LANCHOR9
+	ldr	x3, [x3, #:lo12:.LANCHOR9]
 	add	x4, x3, x4, uxth 2
 	ldrb	w3, [x4, 2]
 	ubfx	x3, x3, 5, 3
 	cmp	w3, 1
 	ccmp	w3, 7, 4, ne
-	bne	.L3196
+	bne	.L3223
 	mov	w3, w2
 	mov	w2, w1
 	mov	x1, x0
 	stp	x29, x30, [sp, -16]!
-	adrp	x0, .LC200
-	add	x0, x0, :lo12:.LC200
+	adrp	x0, .LC203
+	add	x0, x0, :lo12:.LC203
 	add	x29, sp, 0
 	bl	printf
 	bl	dump_ftl_info
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
-.L3196:
+.L3223:
 	mov	w0, 0
 	ret
 	.size	pm_ppa_update_check, .-pm_ppa_update_check
@@ -20005,23 +20570,23 @@ load_l2p_region:
 	stp	x23, x24, [sp, 48]
 	cmp	w21, 7
 	stp	x25, x26, [sp, 64]
-	bls	.L3202
+	bls	.L3229
 	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
 	mov	w2, 32
 	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3202:
+.L3229:
 	adrp	x20, .LANCHOR110
 	mov	x25, x20
 	ldr	x0, [x20, #:lo12:.LANCHOR110]
 	ldrh	w2, [x0, 698]
 	cmp	w2, w19
-	bcs	.L3203
+	bcs	.L3230
 	mov	w1, w19
-	adrp	x0, .LC201
-	add	x0, x0, :lo12:.LC201
+	adrp	x0, .LC204
+	add	x0, x0, :lo12:.LC204
 	bl	printf
 	adrp	x0, .LANCHOR221
 	mov	w1, 255
@@ -20032,47 +20597,47 @@ load_l2p_region:
 	ldr	x0, [x20, #:lo12:.LANCHOR110]
 	ldrh	w0, [x0, 698]
 	cmp	w0, w19
-	bcc	.L3204
-.L3214:
+	bcc	.L3231
+.L3241:
 	mov	w0, 0
-.L3201:
+.L3228:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L3204:
+.L3231:
 	mov	w2, 37
-.L3215:
+.L3242:
 	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3214
-.L3203:
+	b	.L3241
+.L3230:
 	add	x0, x0, x19, sxtw 2
-	adrp	x22, .LANCHOR138
-	add	x1, x22, :lo12:.LANCHOR138
+	adrp	x22, .LANCHOR135
+	add	x1, x22, :lo12:.LANCHOR135
 	ldr	w23, [x0, 704]
 	lsl	x0, x21, 4
 	add	x26, x1, x0
 	strh	w19, [x1, x0]
 	strh	wzr, [x26, 2]
-	cbnz	w23, .L3206
+	cbnz	w23, .L3233
 	mov	w1, w19
 	mov	w2, 0
-	adrp	x0, .LC202
-	add	x0, x0, :lo12:.LC202
+	adrp	x0, .LC205
+	add	x0, x0, :lo12:.LC205
 	bl	printf
 	adrp	x0, .LANCHOR221
 	mov	w1, 255
 	ldrh	w2, [x0, #:lo12:.LANCHOR221]
 	ldr	x0, [x26, 8]
 	bl	ftl_memset
-	b	.L3214
-.L3206:
+	b	.L3241
+.L3233:
 	adrp	x20, .LANCHOR207
 	adrp	x24, .LANCHOR131
 	ldr	x1, [x26, 8]
@@ -20083,45 +20648,45 @@ load_l2p_region:
 	ldr	x1, [x20, #:lo12:.LANCHOR207]
 	ldr	w2, [x1]
 	cmp	w2, w19
-	bne	.L3207
+	bne	.L3234
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L3207
-.L3211:
+	beq	.L3234
+.L3238:
 	ldr	x0, [x20, #:lo12:.LANCHOR207]
 	ldr	w0, [x0]
 	cmp	w19, w0
-	beq	.L3214
+	beq	.L3241
 	mov	w2, 73
-	b	.L3215
-.L3207:
+	b	.L3242
+.L3234:
 	mov	w4, w23
 	mov	w3, w0
 	mov	w1, w19
-	adrp	x0, .LC203
-	add	x0, x0, :lo12:.LC203
+	adrp	x0, .LC206
+	add	x0, x0, :lo12:.LC206
 	bl	printf
 	ldr	x1, [x25, #:lo12:.LANCHOR110]
-	add	x22, x22, :lo12:.LANCHOR138
+	add	x22, x22, :lo12:.LANCHOR135
 	add	x21, x22, x21, lsl 4
 	mov	w2, 4
 	add	x1, x1, 704
-	adrp	x0, .LC204
-	add	x0, x0, :lo12:.LC204
+	adrp	x0, .LC207
+	add	x0, x0, :lo12:.LC207
 	ldrh	w3, [x1, -6]
 	bl	rknand_print_hex
 	ldr	x1, [x21, 8]
 	mov	w2, 4
 	ldrb	w3, [x24, #:lo12:.LANCHOR131]
-	adrp	x0, .LC183
-	add	x0, x0, :lo12:.LC183
+	adrp	x0, .LC186
+	add	x0, x0, :lo12:.LC186
 	lsl	w3, w3, 7
 	bl	rknand_print_hex
 	ldr	x1, [x20, #:lo12:.LANCHOR207]
 	mov	w3, 16
 	mov	w2, 4
-	adrp	x0, .LC205
-	add	x0, x0, :lo12:.LC205
+	adrp	x0, .LC208
+	add	x0, x0, :lo12:.LC208
 	bl	rknand_print_hex
 	ldrb	w3, [x24, #:lo12:.LANCHOR131]
 	mov	w0, w23
@@ -20130,21 +20695,21 @@ load_l2p_region:
 	bl	ftl_read_ppa_page
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3210
+	bne	.L3237
 	adrp	x0, .LANCHOR221
 	mov	w1, 255
 	ldrh	w2, [x0, #:lo12:.LANCHOR221]
 	ldr	x0, [x21, 8]
 	bl	ftl_memset
-.L3212:
+.L3239:
 	mov	w0, -1
-	b	.L3201
-.L3210:
+	b	.L3228
+.L3237:
 	ldr	x0, [x20, #:lo12:.LANCHOR207]
 	ldr	w0, [x0]
 	cmp	w19, w0
-	beq	.L3211
-	b	.L3212
+	beq	.L3238
+	b	.L3239
 	.size	load_l2p_region, .-load_l2p_region
 	.section	.text.pm_gc,"ax",@progbits
 	.align	2
@@ -20156,37 +20721,37 @@ pm_gc:
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR110
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR151
+	adrp	x21, .LANCHOR148
 	ldr	x0, [x19, #:lo12:.LANCHOR110]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	ldrh	w2, [x0, 688]
-	adrp	x0, .LANCHOR155
+	adrp	x0, .LANCHOR152
 	str	x27, [sp, 80]
 	mov	x20, x0
-	ldrh	w1, [x0, #:lo12:.LANCHOR155]
+	ldrh	w1, [x0, #:lo12:.LANCHOR152]
 	sub	w1, w1, #1
 	cmp	w2, w1
-	bge	.L3217
-	ldr	w0, [x21, #:lo12:.LANCHOR151]
-	cbz	w0, .L3218
-.L3217:
+	bge	.L3244
+	ldr	w0, [x21, #:lo12:.LANCHOR148]
+	cbz	w0, .L3245
+.L3244:
 	bl	pm_free_sblk
 	ldr	x2, [x19, #:lo12:.LANCHOR110]
-	ldrh	w1, [x20, #:lo12:.LANCHOR155]
+	ldrh	w1, [x20, #:lo12:.LANCHOR152]
 	sub	w1, w1, #1
 	ldrh	w3, [x2, 688]
 	cmp	w3, w1
-	bge	.L3219
-	ldr	w1, [x21, #:lo12:.LANCHOR151]
-	cbz	w1, .L3218
-.L3219:
+	bge	.L3246
+	ldr	w1, [x21, #:lo12:.LANCHOR148]
+	cbz	w1, .L3245
+.L3246:
 	add	x0, x2, x0, uxth 1
-	str	wzr, [x21, #:lo12:.LANCHOR151]
+	str	wzr, [x21, #:lo12:.LANCHOR148]
 	mov	w20, 65535
 	ldrh	w21, [x0, 416]
 	cmp	w21, w20
-	bne	.L3221
+	bne	.L3248
 	adrp	x1, .LANCHOR222
 	add	x1, x1, :lo12:.LANCHOR222
 	mov	w2, 182
@@ -20198,41 +20763,41 @@ pm_gc:
 	add	x0, x1, x0, uxth 1
 	ldrh	w21, [x0, 416]
 	cmp	w21, w20
-	beq	.L3218
-.L3221:
+	beq	.L3245
+.L3248:
 	bl	pm_select_ram_region
 	and	x22, x0, 65535
 	lsl	x0, x22, 4
-	adrp	x20, .LANCHOR138
-	add	x1, x20, :lo12:.LANCHOR138
+	adrp	x20, .LANCHOR135
+	add	x1, x20, :lo12:.LANCHOR135
 	mov	x25, x22
 	add	x23, x1, x0
 	ldrh	w0, [x1, x0]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3222
+	beq	.L3249
 	ldr	x1, [x23, 8]
-	cbz	x1, .L3222
+	cbz	x1, .L3249
 	ldrsh	w2, [x23, 2]
-	tbz	w2, #31, .L3222
+	tbz	w2, #31, .L3249
 	bl	pm_write_page
 	ldrh	w0, [x23, 2]
 	and	w0, w0, 32767
 	strh	w0, [x23, 2]
-.L3222:
-	adrp	x23, .LANCHOR75
-	adrp	x24, .LANCHOR32
-	add	x23, x23, :lo12:.LANCHOR75
-	add	x24, x24, :lo12:.LANCHOR32
+.L3249:
+	adrp	x23, .LANCHOR74
+	adrp	x24, .LANCHOR31
+	add	x23, x23, :lo12:.LANCHOR74
+	add	x24, x24, :lo12:.LANCHOR31
 	mov	w27, 0
 	mov	w26, 24
-.L3223:
+.L3250:
 	ldr	x2, [x19, #:lo12:.LANCHOR110]
 	ldrh	w0, [x2, 698]
 	cmp	w0, w27
-	bhi	.L3226
+	bhi	.L3253
 	bl	pm_free_sblk
-.L3218:
+.L3245:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -20241,7 +20806,7 @@ pm_gc:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L3226:
+.L3253:
 	ldrb	w0, [x24]
 	add	x2, x2, x27, sxtw 2
 	ldrh	w3, [x23]
@@ -20253,29 +20818,29 @@ pm_gc:
 	sub	w0, w0, #1
 	lsr	w1, w1, w3
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR76
-	ldrb	w1, [x1, #:lo12:.LANCHOR76]
+	adrp	x1, .LANCHOR75
+	ldrb	w1, [x1, #:lo12:.LANCHOR75]
 	udiv	w0, w0, w1
 	cmp	w21, w0, uxth
-	bne	.L3224
+	bne	.L3251
 	mov	w1, w25
 	mov	w0, w27
 	bl	load_l2p_region
-	cbnz	w0, .L3225
-	add	x0, x20, :lo12:.LANCHOR138
+	cbnz	w0, .L3252
+	add	x0, x20, :lo12:.LANCHOR135
 	add	x0, x0, x22, lsl 4
 	ldr	x1, [x0, 8]
 	mov	w0, w27
 	bl	pm_write_page
-.L3225:
-	add	x1, x20, :lo12:.LANCHOR138
+.L3252:
+	add	x1, x20, :lo12:.LANCHOR135
 	lsl	x0, x22, 4
 	mov	w2, -1
 	strh	w2, [x1, x0]
-.L3224:
+.L3251:
 	add	w27, w27, 1
 	and	w27, w27, 65535
-	b	.L3223
+	b	.L3250
 	.size	pm_gc, .-pm_gc
 	.section	.text.pm_flush_id,"ax",@progbits
 	.align	2
@@ -20284,8 +20849,8 @@ pm_gc:
 pm_flush_id:
 	stp	x29, x30, [sp, -32]!
 	ubfiz	x0, x0, 4, 16
-	adrp	x2, .LANCHOR138
-	add	x2, x2, :lo12:.LANCHOR138
+	adrp	x2, .LANCHOR135
+	add	x2, x2, :lo12:.LANCHOR135
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	add	x19, x2, x0
@@ -20295,12 +20860,12 @@ pm_flush_id:
 	ldrh	w0, [x19, 2]
 	and	w0, w0, 32767
 	strh	w0, [x19, 2]
-	adrp	x19, .LANCHOR136
-	ldr	w0, [x19, #:lo12:.LANCHOR136]
-	cbz	w0, .L3235
+	adrp	x19, .LANCHOR204
+	ldr	w0, [x19, #:lo12:.LANCHOR204]
+	cbz	w0, .L3262
 	bl	pm_gc
-	str	wzr, [x19, #:lo12:.LANCHOR136]
-.L3235:
+	str	wzr, [x19, #:lo12:.LANCHOR204]
+.L3262:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -20314,21 +20879,21 @@ pm_flush:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR138
-	add	x19, x19, :lo12:.LANCHOR138
+	adrp	x19, .LANCHOR135
+	add	x19, x19, :lo12:.LANCHOR135
 	mov	w20, 0
 	add	x19, x19, 2
-.L3242:
+.L3269:
 	ldrsh	w0, [x19]
-	tbz	w0, #31, .L3241
+	tbz	w0, #31, .L3268
 	mov	w0, w20
 	bl	pm_flush_id
-.L3241:
+.L3268:
 	add	w20, w20, 1
 	add	x19, x19, 16
 	and	w20, w20, 65535
 	cmp	w20, 8
-	bne	.L3242
+	bne	.L3269
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -20377,15 +20942,15 @@ pm_init:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	mov	w24, w0
-	adrp	x0, .LANCHOR151
+	adrp	x0, .LANCHOR148
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	adrp	x19, .LANCHOR138
-	str	wzr, [x0, #:lo12:.LANCHOR151]
-	adrp	x0, .LANCHOR136
+	adrp	x19, .LANCHOR135
+	str	wzr, [x0, #:lo12:.LANCHOR148]
+	adrp	x0, .LANCHOR204
 	stp	x25, x26, [sp, 64]
-	add	x20, x19, :lo12:.LANCHOR138
-	str	wzr, [x0, #:lo12:.LANCHOR136]
+	add	x20, x19, :lo12:.LANCHOR135
+	str	wzr, [x0, #:lo12:.LANCHOR204]
 	adrp	x0, .LANCHOR208
 	stp	x27, x28, [sp, 80]
 	adrp	x22, .LANCHOR131
@@ -20398,19 +20963,19 @@ pm_init:
 	mov	x21, x1
 	mov	w25, -1
 	str	x0, [x1, #:lo12:.LANCHOR207]
-.L3252:
+.L3279:
 	strh	w25, [x20]
 	strh	wzr, [x20, 2]
-	cbz	w24, .L3251
+	cbz	w24, .L3278
 	ldrb	w0, [x22]
 	lsl	w0, w0, 9
 	bl	ftl_malloc
 	str	x0, [x20, 8]
-.L3251:
+.L3278:
 	add	x20, x20, 16
 	cmp	x20, x23
-	bne	.L3252
-	add	x0, x19, :lo12:.LANCHOR138
+	bne	.L3279
+	add	x0, x19, :lo12:.LANCHOR135
 	adrp	x20, .LANCHOR110
 	ldr	x22, [x21, #:lo12:.LANCHOR207]
 	mov	w4, 4
@@ -20426,32 +20991,32 @@ pm_init:
 	mov	w24, w26
 	ldrh	w2, [x0, 696]
 	cmp	w2, w26
-	bgt	.L3253
+	bgt	.L3280
 	ldrh	w1, [x0, 692]
 	mov	w3, w26
-	adrp	x0, .LC206
-	add	x0, x0, :lo12:.LC206
+	adrp	x0, .LC209
+	add	x0, x0, :lo12:.LC209
 	adrp	x25, .LANCHOR131
 	add	x25, x25, :lo12:.LANCHOR131
-	adrp	x28, .LC207
+	adrp	x28, .LC210
 	bl	printf
 	ldr	x0, [x20, #:lo12:.LANCHOR110]
 	ldrsh	w21, [x0, 696]
 	adrp	x0, .LANCHOR111
 	add	x0, x0, :lo12:.LANCHOR111
 	str	x0, [x29, 104]
-.L3254:
+.L3281:
 	cmp	w21, w26
-	ble	.L3257
-	adrp	x0, .LANCHOR198
+	ble	.L3284
+	adrp	x0, .LANCHOR195
 	mov	w1, 1
 	add	w24, w24, 1
-	strb	w1, [x0, #:lo12:.LANCHOR198]
+	strb	w1, [x0, #:lo12:.LANCHOR195]
 	ldr	x0, [x20, #:lo12:.LANCHOR110]
 	strh	w24, [x0, 696]
 	bl	pm_free_sblk
-.L3253:
-	add	x19, x19, :lo12:.LANCHOR138
+.L3280:
+	add	x19, x19, :lo12:.LANCHOR135
 	adrp	x0, .LANCHOR221
 	mov	w1, 255
 	ldrh	w2, [x0, #:lo12:.LANCHOR221]
@@ -20460,9 +21025,9 @@ pm_init:
 	ldr	x1, [x19, 8]
 	mov	w0, -1
 	bl	pm_write_page
-	adrp	x0, .LANCHOR198
-	ldrb	w0, [x0, #:lo12:.LANCHOR198]
-	cbz	w0, .L3258
+	adrp	x0, .LANCHOR195
+	ldrb	w0, [x0, #:lo12:.LANCHOR195]
+	cbz	w0, .L3285
 	ldr	x1, [x19, 8]
 	mov	w0, -1
 	bl	pm_write_page
@@ -20472,7 +21037,7 @@ pm_init:
 	ldr	x1, [x19, 8]
 	mov	w0, -1
 	bl	pm_write_page
-.L3258:
+.L3285:
 	bl	pm_free_sblk
 	bl	pm_gc
 	mov	w0, 0
@@ -20483,7 +21048,7 @@ pm_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L3257:
+.L3284:
 	ldr	x0, [x20, #:lo12:.LANCHOR110]
 	mov	x3, x22
 	ldr	x1, [x29, 104]
@@ -20503,38 +21068,38 @@ pm_init:
 	ldrh	w3, [x0, 694]
 	add	w1, w1, 1
 	str	w1, [x0, 48]
-	add	x0, x28, :lo12:.LC207
+	add	x0, x28, :lo12:.LC210
 	ldr	w1, [x22]
 	bl	printf
 	ldr	w4, [x29, 100]
 	cmp	w4, 512
 	ccmn	w4, #1, 4, ne
-	beq	.L3255
+	beq	.L3282
 	ldr	x8, [x20, #:lo12:.LANCHOR110]
 	ldr	w6, [x22]
 	ldrh	w0, [x8, 698]
 	cmp	w6, w0
-	bcs	.L3255
+	bcs	.L3282
 	ldr	w7, [x22, 8]
-	cbz	w7, .L3256
+	cbz	w7, .L3283
 	ldrb	w1, [x25]
 	mov	x0, x27
 	lsl	w1, w1, 9
 	bl	js_hash
 	cmp	w7, w0
-	beq	.L3256
-	adrp	x0, .LC208
+	beq	.L3283
+	adrp	x0, .LC211
 	mov	w1, w7
-	add	x0, x0, :lo12:.LC208
+	add	x0, x0, :lo12:.LC211
 	bl	printf
-.L3255:
+.L3282:
 	add	w21, w21, 1
 	sxth	w21, w21
-	b	.L3254
-.L3256:
+	b	.L3281
+.L3283:
 	add	x6, x8, x6, uxtw 2
 	str	w23, [x6, 704]
-	b	.L3255
+	b	.L3282
 	.size	pm_init, .-pm_init
 	.section	.text.pm_log2phys,"ax",@progbits
 	.align	2
@@ -20554,15 +21119,15 @@ pm_log2phys:
 	ldr	w2, [x0, #:lo12:.LANCHOR128]
 	str	x27, [sp, 80]
 	cmp	w25, w2
-	bcc	.L3274
+	bcc	.L3301
 	mov	w1, w25
-	adrp	x0, .LC209
-	add	x0, x0, :lo12:.LC209
+	adrp	x0, .LC212
+	add	x0, x0, :lo12:.LC212
 	bl	printf
 	mov	w0, -1
-	cbnz	w24, .L3273
+	cbnz	w24, .L3300
 	str	w0, [x23]
-.L3273:
+.L3300:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -20570,35 +21135,35 @@ pm_log2phys:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L3274:
+.L3301:
 	adrp	x0, .LANCHOR131
-	adrp	x21, .LANCHOR138
+	adrp	x21, .LANCHOR135
 	mov	x19, 0
 	ldrb	w20, [x0, #:lo12:.LANCHOR131]
-	add	x0, x21, :lo12:.LANCHOR138
+	add	x0, x21, :lo12:.LANCHOR135
 	add	x0, x0, 8
 	lsl	w22, w20, 7
 	udiv	w22, w25, w22
 	and	w26, w22, 65535
-.L3280:
+.L3307:
 	ldr	x1, [x0]
-	cbz	x1, .L3276
+	cbz	x1, .L3303
 	ldrh	w1, [x0, -8]
 	cmp	w1, w26
-	bne	.L3276
-.L3277:
+	bne	.L3303
+.L3304:
 	ubfiz	w20, w20, 7, 9
 	msub	w25, w26, w20, w25
 	and	x25, x25, 65535
-	cbnz	w24, .L3278
-	add	x0, x21, :lo12:.LANCHOR138
-	adrp	x1, .LANCHOR32
+	cbnz	w24, .L3305
+	add	x0, x21, :lo12:.LANCHOR135
+	adrp	x1, .LANCHOR31
 	add	x0, x0, x19, lsl 4
 	mov	w2, 24
 	ldr	x0, [x0, 8]
 	ldr	w0, [x0, x25, lsl 2]
 	str	w0, [x23]
-	ldrb	w3, [x1, #:lo12:.LANCHOR32]
+	ldrb	w3, [x1, #:lo12:.LANCHOR31]
 	mov	w1, 1
 	sub	w2, w2, w3
 	lsl	w1, w1, w3
@@ -20608,23 +21173,23 @@ pm_log2phys:
 	adrp	x1, .LANCHOR112
 	ldrb	w1, [x1, #:lo12:.LANCHOR112]
 	cmp	w0, w1
-	bcc	.L3279
+	bcc	.L3306
 	mov	w0, -1
 	str	w0, [x23]
-.L3279:
-	add	x21, x21, :lo12:.LANCHOR138
+.L3306:
+	add	x21, x21, :lo12:.LANCHOR135
 	add	x19, x21, x19, lsl 4
 	ldrh	w0, [x19, 2]
 	mvn	x1, x0
 	tst	x1, 32767
-	beq	.L3283
+	beq	.L3310
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L3283:
+.L3310:
 	mov	w0, 0
-	b	.L3273
-.L3278:
-	add	x0, x21, :lo12:.LANCHOR138
+	b	.L3300
+.L3305:
+	add	x0, x21, :lo12:.LANCHOR135
 	ldr	w2, [x23]
 	add	x0, x0, x19, lsl 4
 	ldr	x1, [x0, 8]
@@ -20632,35 +21197,35 @@ pm_log2phys:
 	ldrh	w1, [x0, 2]
 	orr	w1, w1, -32768
 	strh	w1, [x0, 2]
-	adrp	x0, .LANCHOR139
-	strb	w22, [x0, #:lo12:.LANCHOR139]
-	b	.L3279
-.L3276:
+	adrp	x0, .LANCHOR136
+	strb	w22, [x0, #:lo12:.LANCHOR136]
+	b	.L3306
+.L3303:
 	add	w19, w19, 1
 	add	x0, x0, 16
 	and	x19, x19, 65535
 	cmp	w19, 8
-	bne	.L3280
+	bne	.L3307
 	bl	pm_select_ram_region
 	and	x19, x0, 65535
 	sbfiz	x1, x19, 4, 32
-	add	x2, x21, :lo12:.LANCHOR138
+	add	x2, x21, :lo12:.LANCHOR135
 	add	x3, x2, x1
 	mov	w27, w0
 	ldrh	w2, [x2, x1]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L3281
+	beq	.L3308
 	ldrsh	w1, [x3, 2]
-	tbz	w1, #31, .L3281
+	tbz	w1, #31, .L3308
 	bl	pm_flush_id
-.L3281:
+.L3308:
 	adrp	x0, .LANCHOR223
 	mov	w1, w27
 	strb	w19, [x0, #:lo12:.LANCHOR223]
 	mov	w0, w26
 	bl	load_l2p_region
-	b	.L3277
+	b	.L3304
 	.size	pm_log2phys, .-pm_log2phys
 	.section	.text.gc_recovery,"ax",@progbits
 	.align	2
@@ -20668,18 +21233,18 @@ pm_log2phys:
 	.type	gc_recovery, %function
 gc_recovery:
 	sub	sp, sp, #240
-	adrp	x0, .LANCHOR10
-	adrp	x1, .LANCHOR85
+	adrp	x0, .LANCHOR12
+	adrp	x1, .LANCHOR84
 	mov	w2, 65535
 	stp	x29, x30, [sp, 32]
 	add	x29, sp, 32
 	stp	x23, x24, [sp, 80]
-	ldr	x23, [x0, #:lo12:.LANCHOR10]
-	strb	wzr, [x1, #:lo12:.LANCHOR85]
-	adrp	x1, .LANCHOR159
+	ldr	x23, [x0, #:lo12:.LANCHOR12]
+	strb	wzr, [x1, #:lo12:.LANCHOR84]
+	adrp	x1, .LANCHOR156
 	stp	x25, x26, [sp, 96]
 	mov	x26, x0
-	strb	wzr, [x1, #:lo12:.LANCHOR159]
+	strb	wzr, [x1, #:lo12:.LANCHOR156]
 	add	x1, x23, 80
 	stp	x19, x20, [sp, 48]
 	str	x1, [x29, 168]
@@ -20687,7 +21252,7 @@ gc_recovery:
 	ldrh	w1, [x23, 80]
 	stp	x27, x28, [sp, 112]
 	cmp	w1, w2
-	beq	.L3290
+	beq	.L3317
 	mov	w0, -1
 	strh	w0, [x23, 130]
 	mov	w0, 1
@@ -20702,40 +21267,40 @@ gc_recovery:
 	ldrh	w1, [x3, #:lo12:.LANCHOR111]
 	ldrh	w0, [x0, 16]
 	mul	w1, w0, w1
-	adrp	x0, .LANCHOR79
+	adrp	x0, .LANCHOR78
 	str	w1, [x29, 200]
-	ldrb	w2, [x0, #:lo12:.LANCHOR79]
+	ldrb	w2, [x0, #:lo12:.LANCHOR78]
 	str	x0, [x29, 176]
 	cmp	w2, 2
-	beq	.L3291
+	beq	.L3318
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbnz	w0, .L3318
 	adrp	x0, .LANCHOR36
 	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbnz	w0, .L3291
-	adrp	x0, .LANCHOR37
-	ldrb	w0, [x0, #:lo12:.LANCHOR37]
-	cbz	w0, .L3292
-.L3291:
-	adrp	x0, .LANCHOR86
-	ldrh	w0, [x0, #:lo12:.LANCHOR86]
+	cbz	w0, .L3319
+.L3318:
+	adrp	x0, .LANCHOR85
+	ldrh	w0, [x0, #:lo12:.LANCHOR85]
 	sub	w0, w0, #1
 	add	w0, w0, w1
 	orr	w2, w0, w2, lsl 24
 	str	w2, [x27, 40]
-.L3293:
+.L3320:
 	mov	w1, 1
 	mov	x0, x27
 	bl	sblk_read_page
 	ldr	w0, [x27, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L3294
+	beq	.L3321
 	ldr	x0, [x27, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L3295
-.L3294:
+	beq	.L3322
+.L3321:
 	mov	x0, x27
 	bl	zbuf_free
 	ldr	x1, [x27, 24]
@@ -20748,68 +21313,68 @@ gc_recovery:
 	str	w2, [sp]
 	ldp	w3, w4, [x0]
 	ldp	w5, w6, [x0, 8]
-	adrp	x0, .LC210
+	adrp	x0, .LC213
 	ldr	w7, [x1]
-	add	x0, x0, :lo12:.LC210
+	add	x0, x0, :lo12:.LC213
 	ldr	w1, [x27, 40]
 	ldr	w2, [x27, 52]
 	bl	printf
-.L3384:
-	adrp	x0, .LANCHOR9
+.L3411:
+	adrp	x0, .LANCHOR11
 	ldrh	w1, [x23, 80]
 	mov	w25, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	strh	wzr, [x0, x1, lsl 1]
-	ldr	x0, [x26, #:lo12:.LANCHOR10]
+	ldr	x0, [x26, #:lo12:.LANCHOR12]
 	ldrh	w1, [x23, 80]
 	strh	w1, [x0, 130]
-.L3296:
+.L3323:
 	ldrh	w0, [x23, 80]
-	adrp	x2, .LANCHOR9
-	ldr	x2, [x2, #:lo12:.LANCHOR9]
+	adrp	x2, .LANCHOR11
+	ldr	x2, [x2, #:lo12:.LANCHOR11]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L3340
+	cbnz	w1, .L3367
 	bl	ftl_dump_write_open_sblk
-.L3340:
+.L3367:
 	ldrh	w1, [x23, 80]
 	mov	w2, w25
-	adrp	x0, .LC212
-	add	x0, x0, :lo12:.LC212
+	adrp	x0, .LC215
+	add	x0, x0, :lo12:.LC215
 	bl	printf
 	mov	w0, -1
 	strh	w0, [x23, 80]
 	bl	pm_flush
 	bl	ftl_ext_info_flush
-	ldr	x0, [x26, #:lo12:.LANCHOR10]
+	ldr	x0, [x26, #:lo12:.LANCHOR12]
 	mov	w1, 65535
 	ldrh	w0, [x0, 130]
 	cmp	w0, w1
-	beq	.L3341
-	adrp	x1, .LANCHOR6
-	ldrh	w1, [x1, #:lo12:.LANCHOR6]
+	beq	.L3368
+	adrp	x1, .LANCHOR8
+	ldrh	w1, [x1, #:lo12:.LANCHOR8]
 	cmp	w1, w0
-	bhi	.L3342
+	bhi	.L3369
 	adrp	x1, .LANCHOR225
 	adrp	x0, .LC0
 	mov	w2, 517
 	add	x1, x1, :lo12:.LANCHOR225
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3342:
-	ldr	x0, [x26, #:lo12:.LANCHOR10]
+.L3369:
+	ldr	x0, [x26, #:lo12:.LANCHOR12]
 	ldrh	w0, [x0, 130]
 	bl	ftl_free_sblk
-.L3341:
+.L3368:
 	adrp	x0, .LANCHOR110
 	ldr	x1, [x0, #:lo12:.LANCHOR110]
 	mov	w0, -1
 	strh	w0, [x1, 126]
-	ldr	x1, [x26, #:lo12:.LANCHOR10]
+	ldr	x1, [x26, #:lo12:.LANCHOR12]
 	strh	w0, [x1, 130]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L3289:
+.L3316:
 	ldp	x19, x20, [sp, 48]
 	ldp	x21, x22, [sp, 64]
 	ldp	x23, x24, [sp, 80]
@@ -20818,32 +21383,32 @@ gc_recovery:
 	ldp	x29, x30, [sp, 32]
 	add	sp, sp, 240
 	ret
-.L3292:
+.L3319:
 	cmp	w2, 3
-	bne	.L3293
-	adrp	x0, .LANCHOR95
-	ldrh	w0, [x0, #:lo12:.LANCHOR95]
+	bne	.L3320
+	adrp	x0, .LANCHOR94
+	ldrh	w0, [x0, #:lo12:.LANCHOR94]
 	sub	w0, w0, #1
 	add	w0, w0, w1
 	orr	w0, w0, 50331648
 	str	w0, [x27, 40]
-	b	.L3293
-.L3295:
+	b	.L3320
+.L3322:
 	adrp	x21, .LANCHOR224
-	adrp	x19, .LANCHOR86
-	adrp	x20, .LANCHOR80
-	adrp	x24, .LANCHOR162
+	adrp	x19, .LANCHOR85
+	adrp	x20, .LANCHOR79
+	adrp	x24, .LANCHOR159
 	ldrb	w0, [x21, #:lo12:.LANCHOR224]
 	cmp	w0, 2
-	bne	.L3297
+	bne	.L3324
 	ldr	x0, [x29, 176]
-	ldrb	w0, [x0, #:lo12:.LANCHOR79]
+	ldrb	w0, [x0, #:lo12:.LANCHOR78]
 	cmp	w0, 3
-	bne	.L3297
-	ldrh	w2, [x19, #:lo12:.LANCHOR86]
+	bne	.L3324
+	ldrh	w2, [x19, #:lo12:.LANCHOR85]
 	adrp	x22, .LANCHOR221
-	ldrb	w1, [x20, #:lo12:.LANCHOR80]
-	ldr	x3, [x24, #:lo12:.LANCHOR162]
+	ldrb	w1, [x20, #:lo12:.LANCHOR79]
+	ldr	x3, [x24, #:lo12:.LANCHOR159]
 	ubfiz	w2, w2, 2, 14
 	ldrh	w0, [x22, #:lo12:.LANCHOR221]
 	mul	w2, w2, w1
@@ -20853,16 +21418,16 @@ gc_recovery:
 	and	w2, w2, 65535
 	add	x0, x3, x0
 	bl	ftl_memcpy
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbnz	w0, .L3325
 	adrp	x0, .LANCHOR36
 	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbnz	w0, .L3298
-	adrp	x0, .LANCHOR37
-	ldrb	w0, [x0, #:lo12:.LANCHOR37]
-	cbz	w0, .L3299
-.L3298:
+	cbz	w0, .L3326
+.L3325:
 	ldr	w0, [x27, 40]
 	sub	w0, w0, #1
-.L3378:
+.L3405:
 	str	w0, [x27, 40]
 	mov	w1, 1
 	mov	x0, x27
@@ -20870,48 +21435,48 @@ gc_recovery:
 	ldr	w0, [x27, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L3301
+	beq	.L3328
 	ldr	x0, [x27, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L3302
-.L3301:
+	beq	.L3329
+.L3328:
 	mov	x0, x27
 	bl	zbuf_free
-	b	.L3384
-.L3299:
-	adrp	x1, .LANCHOR95
+	b	.L3411
+.L3326:
+	adrp	x1, .LANCHOR94
 	ldr	w0, [x29, 200]
-	ldrh	w1, [x1, #:lo12:.LANCHOR95]
+	ldrh	w1, [x1, #:lo12:.LANCHOR94]
 	sub	w0, w0, #1
 	add	w0, w0, w1
 	orr	w0, w0, 33554432
-	b	.L3378
-.L3302:
+	b	.L3405
+.L3329:
 	ldrh	w2, [x22, #:lo12:.LANCHOR221]
-.L3379:
+.L3406:
 	ldr	x1, [x27, 8]
-	adrp	x22, .LANCHOR163
-	ldr	x0, [x24, #:lo12:.LANCHOR162]
+	adrp	x22, .LANCHOR160
+	ldr	x0, [x24, #:lo12:.LANCHOR159]
 	bl	ftl_memcpy
-	ldrb	w1, [x20, #:lo12:.LANCHOR80]
-	ldrh	w0, [x19, #:lo12:.LANCHOR86]
+	ldrb	w1, [x20, #:lo12:.LANCHOR79]
+	ldrh	w0, [x19, #:lo12:.LANCHOR85]
 	mul	w0, w0, w1
 	adrp	x1, .LANCHOR131
 	ldrb	w1, [x1, #:lo12:.LANCHOR131]
 	lsl	w2, w0, 2
 	cmp	w1, w0, lsr 6
-	bge	.L3304
-	ldr	x0, [x22, #:lo12:.LANCHOR163]
+	bge	.L3331
+	ldr	x0, [x22, #:lo12:.LANCHOR160]
 	mov	w1, 0
 	bl	ftl_memset
 	ldrb	w21, [x21, #:lo12:.LANCHOR224]
 	cmp	w21, 1
-	bne	.L3345
-	ldrb	w1, [x20, #:lo12:.LANCHOR80]
-	ldrh	w0, [x19, #:lo12:.LANCHOR86]
+	bne	.L3372
+	ldrb	w1, [x20, #:lo12:.LANCHOR79]
+	ldrh	w0, [x19, #:lo12:.LANCHOR85]
 	mul	w0, w0, w1
 	adrp	x1, .LANCHOR221
 	ldrh	w1, [x1, #:lo12:.LANCHOR221]
@@ -20919,178 +21484,178 @@ gc_recovery:
 	ldr	x1, [x27, 8]
 	mov	w2, w25
 	add	x1, x1, x0, sxtw 2
-	ldr	x0, [x22, #:lo12:.LANCHOR163]
+	ldr	x0, [x22, #:lo12:.LANCHOR160]
 	bl	ftl_memcpy
-.L3305:
-	adrp	x0, .LANCHOR95
-	ldrh	w0, [x0, #:lo12:.LANCHOR95]
+.L3332:
+	adrp	x0, .LANCHOR94
+	ldrh	w0, [x0, #:lo12:.LANCHOR94]
 	str	w0, [x29, 184]
 	ldr	x0, [x29, 176]
-	ldrb	w0, [x0, #:lo12:.LANCHOR79]
+	ldrb	w0, [x0, #:lo12:.LANCHOR78]
 	str	w0, [x29, 188]
 	cmp	w0, 2
-	bne	.L3306
-	adrp	x0, .LANCHOR81
-	ldrb	w0, [x0, #:lo12:.LANCHOR81]
-	cbz	w0, .L3307
-.L3306:
-	adrp	x0, .LANCHOR36
-	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbz	w0, .L3308
-.L3307:
+	bne	.L3333
+	adrp	x0, .LANCHOR80
+	ldrb	w0, [x0, #:lo12:.LANCHOR80]
+	cbz	w0, .L3334
+.L3333:
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbz	w0, .L3335
+.L3334:
 	ldp	w0, w1, [x29, 184]
 	mul	w0, w0, w1
 	str	w0, [x29, 184]
 	mov	w0, 1
 	str	w0, [x29, 188]
-.L3308:
-	adrp	x22, .LANCHOR36
+.L3335:
+	adrp	x22, .LANCHOR35
 	mov	w28, 0
-	add	x0, x22, :lo12:.LANCHOR36
+	add	x0, x22, :lo12:.LANCHOR35
 	mov	w10, 0
 	str	x0, [x29, 112]
-.L3309:
+.L3336:
 	sub	w0, w28, #1
 	str	w0, [x29, 144]
 	ldr	w0, [x29, 184]
 	cmp	w0, w28
-	bls	.L3322
+	bls	.L3349
 	add	w0, w28, w28, lsl 1
 	mov	x20, 0
 	sub	w0, w0, #1
 	str	w0, [x29, 164]
-	adrp	x0, .LANCHOR37
-	add	x0, x0, :lo12:.LANCHOR37
+	adrp	x0, .LANCHOR36
+	add	x0, x0, :lo12:.LANCHOR36
 	str	x0, [x29, 120]
-	b	.L3323
-.L3297:
-	ldrh	w2, [x19, #:lo12:.LANCHOR86]
-	ldrb	w0, [x20, #:lo12:.LANCHOR80]
+	b	.L3350
+.L3324:
+	ldrh	w2, [x19, #:lo12:.LANCHOR85]
+	ldrb	w0, [x20, #:lo12:.LANCHOR79]
 	mul	w2, w2, w0
 	lsl	w2, w2, 2
-	b	.L3379
-.L3304:
+	b	.L3406
+.L3331:
 	ldr	x1, [x27, 8]
 	mov	w21, 0
 	add	x1, x1, x0, sxtw 2
-	ldr	x0, [x22, #:lo12:.LANCHOR163]
+	ldr	x0, [x22, #:lo12:.LANCHOR160]
 	bl	ftl_memcpy
-.L3380:
+.L3407:
 	mov	w25, 0
-	b	.L3305
-.L3345:
+	b	.L3332
+.L3372:
 	mov	w21, 1
-	b	.L3380
-.L3318:
+	b	.L3407
+.L3345:
 	ldp	x1, x0, [x29, 128]
 	ldr	x2, [x29, 176]
 	ldrh	w0, [x0, 96]
 	ldrh	w1, [x1]
-	ldrb	w2, [x2, #:lo12:.LANCHOR79]
+	ldrb	w2, [x2, #:lo12:.LANCHOR78]
 	cmp	w2, 2
 	mul	w0, w0, w1
 	str	w0, [x29, 200]
 	add	w1, w22, w0
-	beq	.L3310
+	beq	.L3337
 	ldr	x3, [x29, 112]
 	ldrb	w3, [x3]
-	cbz	w3, .L3311
-.L3310:
+	cbz	w3, .L3338
+.L3337:
 	ldr	w0, [x29, 144]
 	add	w1, w1, w0
 	orr	w1, w1, w2, lsl 24
-.L3381:
+.L3408:
 	str	w1, [x27, 40]
-.L3312:
+.L3339:
 	mov	w1, 1
 	str	x8, [x29, 96]
 	str	w10, [x29, 104]
 	mov	x0, x27
 	bl	sblk_read_page
-	adrp	x1, .LANCHOR163
+	adrp	x1, .LANCHOR160
 	ldr	w10, [x29, 104]
 	ldr	x0, [x27, 24]
 	ldr	x8, [x29, 96]
-	cbz	w21, .L3315
-	ldr	x2, [x1, #:lo12:.LANCHOR163]
+	cbz	w21, .L3342
+	ldr	x2, [x1, #:lo12:.LANCHOR160]
 	ldr	w3, [x2, x8]
-	cbnz	w3, .L3315
+	cbnz	w3, .L3342
 	ldr	w3, [x0, 8]
 	str	w3, [x2, x8]
-.L3315:
-	ldr	x2, [x24, #:lo12:.LANCHOR162]
+.L3342:
+	ldr	x2, [x24, #:lo12:.LANCHOR159]
 	ldr	w6, [x0, 4]
 	ldr	w3, [x2, x8]
 	cmp	w3, w6
-	bne	.L3316
-	ldr	x2, [x1, #:lo12:.LANCHOR163]
+	bne	.L3343
+	ldr	x2, [x1, #:lo12:.LANCHOR160]
 	ldr	w4, [x2, x8]
 	ldr	w2, [x0, 8]
 	cmp	w4, w2
-	beq	.L3317
-.L3316:
-	ldr	x1, [x1, #:lo12:.LANCHOR163]
+	beq	.L3344
+.L3343:
+	ldr	x1, [x1, #:lo12:.LANCHOR160]
 	ldr	w2, [x0, 12]
 	str	w2, [sp]
 	str	w10, [x29, 96]
 	ldr	w4, [x1, x8]
 	ldr	w5, [x0]
 	ldr	w7, [x0, 8]
-	adrp	x0, .LC211
+	adrp	x0, .LC214
 	ldr	w1, [x27, 40]
-	add	x0, x0, :lo12:.LC211
+	add	x0, x0, :lo12:.LC214
 	ldr	w2, [x27, 52]
 	str	x8, [x29, 104]
 	bl	printf
-	ldr	x0, [x24, #:lo12:.LANCHOR162]
+	ldr	x0, [x24, #:lo12:.LANCHOR159]
 	ldr	x8, [x29, 104]
 	ldr	w10, [x29, 96]
 	ldr	w0, [x0, x8]
 	cmn	w0, #1
-	beq	.L3317
+	beq	.L3344
 	mov	x0, x27
 	bl	zbuf_free
-	adrp	x0, .LANCHOR9
+	adrp	x0, .LANCHOR11
 	ldrh	w1, [x23, 80]
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	strh	wzr, [x0, x1, lsl 1]
-	ldr	x0, [x26, #:lo12:.LANCHOR10]
+	ldr	x0, [x26, #:lo12:.LANCHOR12]
 	ldrh	w1, [x23, 80]
 	strh	w1, [x0, 130]
-	b	.L3296
-.L3311:
+	b	.L3323
+.L3338:
 	cmp	w2, 3
-	bne	.L3313
+	bne	.L3340
 	ldr	x2, [x29, 120]
 	ldrb	w2, [x2]
-	cbz	w2, .L3314
+	cbz	w2, .L3341
 	ldr	w0, [x29, 164]
 	add	w1, w1, w0
 	orr	w1, w1, 50331648
-	b	.L3381
-.L3314:
+	b	.L3408
+.L3341:
 	add	w0, w28, w0
 	orr	w0, w0, w22, lsl 24
-.L3382:
+.L3409:
 	str	w0, [x27, 40]
-	b	.L3312
-.L3313:
+	b	.L3339
+.L3340:
 	add	w0, w28, w0
-	b	.L3382
-.L3317:
+	b	.L3409
+.L3344:
 	add	w10, w10, 1
 	add	w22, w22, 1
 	add	x8, x8, 4
-.L3320:
+.L3347:
 	ldr	w0, [x29, 188]
 	cmp	w0, w22
-	bcs	.L3318
+	bcs	.L3345
 	add	x20, x20, 1
-.L3323:
+.L3350:
 	ldr	x0, [x29, 168]
 	ldrb	w0, [x0, 9]
 	cmp	w0, w20
-	ble	.L3319
+	ble	.L3346
 	add	x0, x23, x20, lsl 1
 	str	x0, [x29, 136]
 	ldr	x0, [x29, 152]
@@ -21098,82 +21663,82 @@ gc_recovery:
 	mov	w22, 1
 	add	x0, x0, :lo12:.LANCHOR111
 	str	x0, [x29, 128]
-	b	.L3320
-.L3319:
-	adrp	x0, .LANCHOR81
-	ldrb	w0, [x0, #:lo12:.LANCHOR81]
+	b	.L3347
+.L3346:
+	adrp	x0, .LANCHOR80
+	ldrb	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w0, 0
 	cinc	w28, w28, ne
 	add	w28, w28, 1
-	b	.L3309
-.L3322:
+	b	.L3336
+.L3349:
 	mov	x0, x27
 	bl	zbuf_free
 	ldr	x0, [x29, 168]
-	adrp	x20, .LANCHOR9
-	ldrh	w3, [x19, #:lo12:.LANCHOR86]
+	adrp	x20, .LANCHOR11
+	ldrh	w3, [x19, #:lo12:.LANCHOR85]
 	mov	w25, 0
 	ldrh	w2, [x23, 80]
 	mov	w27, 0
-	ldr	x1, [x20, #:lo12:.LANCHOR9]
+	ldr	x1, [x20, #:lo12:.LANCHOR11]
 	mov	w28, 0
 	ldrb	w0, [x0, 9]
 	str	x20, [x29, 144]
 	mul	w0, w0, w3
 	strh	w0, [x1, x2, lsl 1]
-	adrp	x0, .LANCHOR75
-	add	x0, x0, :lo12:.LANCHOR75
+	adrp	x0, .LANCHOR74
+	add	x0, x0, :lo12:.LANCHOR74
 	str	x0, [x29, 104]
-.L3324:
+.L3351:
 	sub	w0, w27, #1
 	str	w0, [x29, 128]
 	ldr	w0, [x29, 184]
 	cmp	w0, w27
-	bls	.L3338
+	bls	.L3365
 	add	w22, w27, w27, lsl 1
 	mov	x21, 0
 	sub	w0, w22, #1
 	str	w0, [x29, 120]
-	b	.L3339
-.L3334:
-	ldr	x1, [x24, #:lo12:.LANCHOR162]
+	b	.L3366
+.L3361:
+	ldr	x1, [x24, #:lo12:.LANCHOR159]
 	sbfiz	x0, x28, 2, 32
 	ldr	w20, [x1, x0]
 	cmn	w20, #1
-	beq	.L3325
-	adrp	x1, .LANCHOR163
-	ldr	x1, [x1, #:lo12:.LANCHOR163]
+	beq	.L3352
+	adrp	x1, .LANCHOR160
+	ldr	x1, [x1, #:lo12:.LANCHOR160]
 	ldr	w0, [x1, x0]
 	str	w0, [x29, 164]
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 204]
 	cmn	w0, #1
-	bne	.L3326
+	bne	.L3353
 	mov	w2, 0
 	add	x1, x29, 204
 	mov	w0, w20
 	bl	pm_log2phys
-.L3326:
+.L3353:
 	ldr	x0, [x29, 136]
 	ldr	x1, [x29, 152]
 	ldr	x2, [x29, 176]
 	ldrh	w0, [x0, 96]
 	ldrh	w1, [x1, #:lo12:.LANCHOR111]
-	ldrb	w2, [x2, #:lo12:.LANCHOR79]
+	ldrb	w2, [x2, #:lo12:.LANCHOR78]
 	cmp	w2, 2
 	mul	w0, w0, w1
 	add	w1, w22, w0
-	beq	.L3327
-	adrp	x6, .LANCHOR36
-	ldrb	w6, [x6, #:lo12:.LANCHOR36]
-	cbz	w6, .L3328
-.L3327:
+	beq	.L3354
+	adrp	x6, .LANCHOR35
+	ldrb	w6, [x6, #:lo12:.LANCHOR35]
+	cbz	w6, .L3355
+.L3354:
 	ldr	w0, [x29, 128]
 	add	w1, w0, w1
 	orr	w1, w1, w2, lsl 24
 	str	w1, [x29, 200]
-.L3329:
+.L3356:
 	ldp	x0, x1, [x29, 104]
 	mov	w19, 24
 	mov	w2, 1
@@ -21186,103 +21751,103 @@ gc_recovery:
 	lsl	w19, w2, w19
 	sub	w19, w19, #1
 	and	w19, w19, w0
-	adrp	x0, .LANCHOR76
-	ldrb	w0, [x0, #:lo12:.LANCHOR76]
+	adrp	x0, .LANCHOR75
+	ldrb	w0, [x0, #:lo12:.LANCHOR75]
 	udiv	w19, w19, w0
 	ldr	w0, [x29, 204]
 	cmp	w1, w0
 	and	x19, x19, 65535
-	bne	.L3332
+	bne	.L3359
 	add	x1, x29, 200
 	mov	w0, w20
 	bl	pm_log2phys
 	add	w25, w25, 1
 	mov	w0, w19
 	bl	ftl_vpn_decrement
-.L3333:
-	adrp	x0, .LANCHOR7
+.L3360:
+	adrp	x0, .LANCHOR9
 	add	w28, w28, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR7]
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	add	x0, x0, x19, lsl 2
 	ldrb	w0, [x0, 2]
 	tst	w0, 224
-	bne	.L3325
+	bne	.L3352
 	ldr	x0, [x29, 144]
 	lsl	x19, x19, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrh	w1, [x0, x19]
-	cbz	w1, .L3325
+	cbz	w1, .L3352
 	strh	wzr, [x0, x19]
-.L3325:
+.L3352:
 	add	w22, w22, 1
-.L3336:
+.L3363:
 	ldr	w0, [x29, 188]
 	cmp	w0, w22
-	bcs	.L3334
+	bcs	.L3361
 	add	x21, x21, 1
-.L3339:
+.L3366:
 	ldr	x0, [x29, 168]
 	ldrb	w0, [x0, 9]
 	cmp	w0, w21
-	ble	.L3335
+	ble	.L3362
 	add	x0, x23, x21, lsl 1
 	mov	w22, 1
 	str	x0, [x29, 136]
-	adrp	x0, .LANCHOR32
-	add	x0, x0, :lo12:.LANCHOR32
+	adrp	x0, .LANCHOR31
+	add	x0, x0, :lo12:.LANCHOR31
 	str	x0, [x29, 112]
-	b	.L3336
-.L3328:
+	b	.L3363
+.L3355:
 	cmp	w2, 3
-	bne	.L3330
-	adrp	x2, .LANCHOR37
-	ldrb	w6, [x2, #:lo12:.LANCHOR37]
+	bne	.L3357
+	adrp	x2, .LANCHOR36
+	ldrb	w6, [x2, #:lo12:.LANCHOR36]
 	lsl	w2, w22, 24
-	cbz	w6, .L3331
+	cbz	w6, .L3358
 	ldr	w0, [x29, 120]
 	add	w1, w0, w1
 	orr	w0, w1, w2
-.L3383:
+.L3410:
 	str	w0, [x29, 200]
-	b	.L3329
-.L3331:
+	b	.L3356
+.L3358:
 	add	w0, w27, w0
 	orr	w0, w0, w2
-	b	.L3383
-.L3330:
+	b	.L3410
+.L3357:
 	add	w0, w27, w0
-	b	.L3383
-.L3332:
+	b	.L3410
+.L3359:
 	ldr	w1, [x29, 200]
 	cmp	w0, w1
 	cinc	w25, w25, eq
-	b	.L3333
-.L3335:
-	adrp	x0, .LANCHOR81
-	ldrb	w0, [x0, #:lo12:.LANCHOR81]
+	b	.L3360
+.L3362:
+	adrp	x0, .LANCHOR80
+	ldrb	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w0, 0
 	cinc	w27, w27, ne
 	add	w27, w27, 1
-	b	.L3324
-.L3338:
+	b	.L3351
+.L3365:
 	ldr	x0, [x29, 144]
 	ldrh	w1, [x23, 80]
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	strh	w25, [x0, x1, lsl 1]
 	ldrh	w0, [x23, 80]
 	bl	zftl_insert_data_list
-	b	.L3296
-.L3290:
+	b	.L3323
+.L3317:
 	ldrh	w0, [x23, 130]
 	cmp	w0, w1
-	beq	.L3289
+	beq	.L3316
 	adrp	x19, .LANCHOR110
 	ldr	x1, [x19, #:lo12:.LANCHOR110]
 	ldrh	w1, [x1, 126]
 	cmp	w1, w0
-	bne	.L3344
+	bne	.L3371
 	bl	pm_flush
-	ldr	x0, [x26, #:lo12:.LANCHOR10]
+	ldr	x0, [x26, #:lo12:.LANCHOR12]
 	ldrh	w0, [x0, 130]
 	bl	ftl_free_sblk
 	ldr	x0, [x19, #:lo12:.LANCHOR110]
@@ -21290,11 +21855,11 @@ gc_recovery:
 	strh	w1, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L3344:
-	ldr	x0, [x26, #:lo12:.LANCHOR10]
+.L3371:
+	ldr	x0, [x26, #:lo12:.LANCHOR12]
 	mov	w1, -1
 	strh	w1, [x0, 130]
-	b	.L3289
+	b	.L3316
 	.size	gc_recovery, .-gc_recovery
 	.section	.text.gc_update_l2p_map_new,"ax",@progbits
 	.align	2
@@ -21302,33 +21867,33 @@ gc_recovery:
 	.type	gc_update_l2p_map_new, %function
 gc_update_l2p_map_new:
 	stp	x29, x30, [sp, -176]!
-	adrp	x0, .LANCHOR10
-	adrp	x1, .LANCHOR86
+	adrp	x0, .LANCHOR12
+	adrp	x1, .LANCHOR85
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	ldr	x21, [x0, #:lo12:.LANCHOR10]
+	ldr	x21, [x0, #:lo12:.LANCHOR12]
 	stp	x25, x26, [sp, 64]
-	ldrh	w26, [x1, #:lo12:.LANCHOR86]
+	ldrh	w26, [x1, #:lo12:.LANCHOR85]
 	add	x1, x21, 80
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR14
+	adrp	x24, .LANCHOR19
 	stp	x19, x20, [sp, 16]
 	stp	x27, x28, [sp, 80]
 	stp	x0, x1, [x29, 128]
 	ldrb	w1, [x1, 9]
 	mul	w26, w26, w1
-	ldr	w1, [x24, #:lo12:.LANCHOR14]
-	tbz	x1, 8, .L3386
+	ldr	w1, [x24, #:lo12:.LANCHOR19]
+	tbz	x1, 8, .L3413
 	ldrh	w1, [x21, 80]
-	adrp	x0, .LC213
-	add	x0, x0, :lo12:.LC213
+	adrp	x0, .LC216
+	add	x0, x0, :lo12:.LC216
 	bl	printf
-.L3386:
-	adrp	x23, .LANCHOR9
+.L3413:
+	adrp	x23, .LANCHOR11
 	adrp	x0, .LANCHOR224
 	ldrh	w2, [x21, 80]
 	mov	x22, 0
-	ldr	x1, [x23, #:lo12:.LANCHOR9]
+	ldr	x1, [x23, #:lo12:.LANCHOR11]
 	mov	w25, 0
 	ldrb	w0, [x0, #:lo12:.LANCHOR224]
 	sub	w0, w26, w0
@@ -21336,37 +21901,37 @@ gc_update_l2p_map_new:
 	adrp	x0, .LANCHOR131
 	add	x0, x0, :lo12:.LANCHOR131
 	str	x0, [x29, 104]
-.L3387:
+.L3414:
 	mov	w28, w22
 	cmp	w26, w22
-	bhi	.L3397
-	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3398
+	bhi	.L3424
+	ldr	w0, [x24, #:lo12:.LANCHOR19]
+	tbz	x0, 8, .L3425
 	ldr	x0, [x29, 128]
 	mov	w3, w25
-	ldr	x1, [x23, #:lo12:.LANCHOR9]
+	ldr	x1, [x23, #:lo12:.LANCHOR11]
 	ldrh	w2, [x21, 80]
-	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	ldr	x0, [x0, #:lo12:.LANCHOR12]
 	ldrh	w2, [x1, x2, lsl 1]
 	ldrh	w1, [x0, 80]
-	adrp	x0, .LC216
-	add	x0, x0, :lo12:.LC216
+	adrp	x0, .LC219
+	add	x0, x0, :lo12:.LC219
 	bl	printf
-.L3398:
+.L3425:
 	ldrh	w1, [x21, 80]
-	ldr	x0, [x23, #:lo12:.LANCHOR9]
+	ldr	x0, [x23, #:lo12:.LANCHOR11]
 	ldrh	w0, [x0, x1, lsl 1]
 	cmp	w25, w0
-	beq	.L3399
+	beq	.L3426
 	adrp	x1, .LANCHOR226
 	adrp	x0, .LC0
 	mov	w2, 898
 	add	x1, x1, :lo12:.LANCHOR226
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3399:
+.L3426:
 	ldrh	w1, [x21, 80]
-	ldr	x0, [x23, #:lo12:.LANCHOR9]
+	ldr	x0, [x23, #:lo12:.LANCHOR11]
 	strh	w25, [x0, x1, lsl 1]
 	ldrh	w0, [x21, 80]
 	bl	zftl_insert_data_list
@@ -21377,85 +21942,85 @@ gc_update_l2p_map_new:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L3397:
-	adrp	x27, .LANCHOR162
+.L3424:
+	adrp	x27, .LANCHOR159
 	lsl	x19, x22, 2
-	ldr	x0, [x27, #:lo12:.LANCHOR162]
+	ldr	x0, [x27, #:lo12:.LANCHOR159]
 	ldr	w2, [x0, x19]
 	cmn	w2, #1
-	beq	.L3388
+	beq	.L3415
 	adrp	x0, .LANCHOR131
 	ldrb	w20, [x0, #:lo12:.LANCHOR131]
 	lsl	w20, w20, 7
 	udiv	w20, w2, w20
 	and	w0, w20, 65535
 	str	w0, [x29, 156]
-	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3389
+	ldr	w0, [x24, #:lo12:.LANCHOR19]
+	tbz	x0, 8, .L3416
 	ldr	w1, [x29, 156]
-	adrp	x0, .LC214
+	adrp	x0, .LC217
 	mov	w3, w22
-	add	x0, x0, :lo12:.LC214
+	add	x0, x0, :lo12:.LC217
 	bl	printf
-.L3389:
+.L3416:
 	sub	w28, w26, w28
 	add	x28, x28, x22
 	lsl	x0, x28, 2
 	str	x0, [x29, 144]
-	adrp	x0, .LC215
-	add	x0, x0, :lo12:.LC215
+	adrp	x0, .LC218
+	add	x0, x0, :lo12:.LC218
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR75
-	add	x0, x0, :lo12:.LANCHOR75
+	adrp	x0, .LANCHOR74
+	add	x0, x0, :lo12:.LANCHOR74
 	str	x0, [x29, 112]
-.L3390:
+.L3417:
 	ldr	x0, [x29, 144]
 	cmp	x0, x19
-	bne	.L3396
-.L3388:
+	bne	.L3423
+.L3415:
 	add	x22, x22, 1
-	b	.L3387
-.L3396:
-	ldr	x0, [x27, #:lo12:.LANCHOR162]
+	b	.L3414
+.L3423:
+	ldr	x0, [x27, #:lo12:.LANCHOR159]
 	ldr	w20, [x0, x19]
 	cmn	w20, #1
-	beq	.L3391
+	beq	.L3418
 	ldr	x0, [x29, 104]
 	ldr	w1, [x29, 156]
 	ldrb	w0, [x0]
 	lsl	w0, w0, 7
 	udiv	w0, w20, w0
 	cmp	w1, w0, uxth
-	bne	.L3391
-	adrp	x0, .LANCHOR163
-	ldr	x0, [x0, #:lo12:.LANCHOR163]
+	bne	.L3418
+	adrp	x0, .LANCHOR160
+	ldr	x0, [x0, #:lo12:.LANCHOR160]
 	ldr	w28, [x0, x19]
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 172]
 	cmn	w0, #1
-	bne	.L3392
+	bne	.L3419
 	mov	w2, 0
 	add	x1, x29, 172
 	mov	w0, w20
 	bl	pm_log2phys
-.L3392:
+.L3419:
 	ldr	w3, [x29, 172]
 	cmp	w28, w3
-	bne	.L3393
-	adrp	x0, .LANCHOR164
+	bne	.L3420
+	adrp	x0, .LANCHOR161
 	mov	w2, 1
 	add	x1, x29, 168
 	add	w25, w25, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR164]
+	ldr	x0, [x0, #:lo12:.LANCHOR161]
 	ldr	w0, [x0, x19]
 	str	w0, [x29, 168]
 	mov	w0, w20
 	bl	pm_log2phys
 	ldr	x0, [x29, 112]
 	ldrh	w2, [x0]
-	adrp	x0, .LANCHOR32
-	ldrb	w1, [x0, #:lo12:.LANCHOR32]
+	adrp	x0, .LANCHOR31
+	ldrb	w1, [x0, #:lo12:.LANCHOR31]
 	mov	w0, 24
 	lsr	w28, w28, w2
 	sub	w0, w0, w1
@@ -21464,28 +22029,28 @@ gc_update_l2p_map_new:
 	lsl	w0, w0, w1
 	sub	w0, w0, #1
 	and	w28, w0, w28
-	adrp	x0, .LANCHOR76
-	ldrb	w0, [x0, #:lo12:.LANCHOR76]
+	adrp	x0, .LANCHOR75
+	ldrb	w0, [x0, #:lo12:.LANCHOR75]
 	udiv	w0, w28, w0
-.L3419:
+.L3446:
 	bl	ftl_vpn_decrement
-	ldr	x0, [x27, #:lo12:.LANCHOR162]
+	ldr	x0, [x27, #:lo12:.LANCHOR159]
 	mov	w1, -1
 	str	w1, [x0, x19]
-.L3391:
+.L3418:
 	add	x19, x19, 4
-	b	.L3390
-.L3393:
-	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3395
+	b	.L3417
+.L3420:
+	ldr	w0, [x24, #:lo12:.LANCHOR19]
+	tbz	x0, 8, .L3422
 	ldr	x0, [x29, 120]
 	mov	w2, w28
 	mov	w1, w20
 	bl	printf
-.L3395:
+.L3422:
 	ldr	x0, [x29, 136]
 	ldrh	w0, [x0]
-	b	.L3419
+	b	.L3446
 	.size	gc_update_l2p_map_new, .-gc_update_l2p_map_new
 	.section	.text.gc_scan_src_blk_one_page,"ax",@progbits
 	.align	2
@@ -21498,90 +22063,90 @@ gc_scan_src_blk_one_page:
 	mov	w5, 65535
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR71
-	add	x1, x20, :lo12:.LANCHOR71
+	adrp	x20, .LANCHOR70
+	add	x1, x20, :lo12:.LANCHOR70
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	adrp	x21, .LANCHOR80
+	adrp	x21, .LANCHOR79
 	stp	x25, x26, [sp, 64]
-	ldrb	w6, [x21, #:lo12:.LANCHOR80]
+	ldrb	w6, [x21, #:lo12:.LANCHOR79]
 	ldrb	w0, [x1, 4]
 	add	x2, x1, x0, sxtw 1
 	ldrh	w22, [x2, 40]
 	ldrh	w2, [x1, 2]
-.L3421:
+.L3448:
 	cmp	w22, w5
-	beq	.L3423
-	cbz	w4, .L3424
-	add	x1, x20, :lo12:.LANCHOR71
+	beq	.L3450
+	cbz	w4, .L3451
+	add	x1, x20, :lo12:.LANCHOR70
 	strh	w2, [x1, 2]
-.L3424:
-	cbz	w3, .L3425
-	add	x1, x20, :lo12:.LANCHOR71
+.L3451:
+	cbz	w3, .L3452
+	add	x1, x20, :lo12:.LANCHOR70
 	strb	w0, [x1, 4]
-.L3425:
+.L3452:
 	mov	w0, 1
 	adrp	x23, .LANCHOR111
 	bl	buf_alloc
-	adrp	x24, .LANCHOR36
+	adrp	x24, .LANCHOR35
 	mov	x25, x0
 	add	x23, x23, :lo12:.LANCHOR111
-	add	x24, x24, :lo12:.LANCHOR36
+	add	x24, x24, :lo12:.LANCHOR35
 	mov	w26, 1
-.L3426:
-	add	x19, x20, :lo12:.LANCHOR71
+.L3453:
+	add	x19, x20, :lo12:.LANCHOR70
 	ldrb	w1, [x19, 6]
 	cmp	w26, w1
-	ble	.L3436
+	ble	.L3463
 	mov	x0, x25
 	bl	zbuf_free
 	ldrb	w0, [x19, 4]
-	ldrb	w1, [x21, #:lo12:.LANCHOR80]
+	ldrb	w1, [x21, #:lo12:.LANCHOR79]
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x19, 4]
 	cmp	w1, w0
-	bne	.L3420
+	bne	.L3447
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 4]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L3420:
+.L3447:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L3423:
+.L3450:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	cmp	w0, w6
-	bne	.L3422
+	bne	.L3449
 	add	w2, w2, 1
 	mov	w0, 0
 	and	w2, w2, 65535
 	mov	w4, 1
-.L3422:
+.L3449:
 	add	x3, x1, x0, sxtw 1
 	ldrh	w22, [x3, 40]
 	mov	w3, 1
-	b	.L3421
-.L3436:
+	b	.L3448
+.L3463:
 	ldrh	w0, [x23]
 	cmp	w1, 2
 	mul	w0, w0, w22
-	bne	.L3427
+	bne	.L3454
 	ldrh	w1, [x19, 2]
 	lsl	w1, w1, 1
-.L3446:
+.L3473:
 	sub	w1, w1, #1
 	add	w0, w26, w0
 	add	w0, w1, w0
-	adrp	x1, .LANCHOR79
-	ldrb	w1, [x1, #:lo12:.LANCHOR79]
+	adrp	x1, .LANCHOR78
+	ldrb	w1, [x1, #:lo12:.LANCHOR78]
 	orr	w0, w0, w1, lsl 24
-.L3445:
+.L3472:
 	str	w0, [x25, 40]
 	mov	w1, 1
 	mov	x0, x25
@@ -21589,64 +22154,64 @@ gc_scan_src_blk_one_page:
 	ldr	w0, [x25, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L3433
+	beq	.L3460
 	ldr	x0, [x25, 24]
 	ldr	w19, [x0, 4]
 	mov	w0, w19
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 92]
 	cmn	w0, #1
-	bne	.L3434
+	bne	.L3461
 	adrp	x0, .LANCHOR128
 	ldr	w0, [x0, #:lo12:.LANCHOR128]
 	cmp	w19, w0
-	bcs	.L3434
+	bcs	.L3461
 	mov	w2, 0
 	add	x1, x29, 92
 	mov	w0, w19
 	bl	pm_log2phys
-.L3434:
+.L3461:
 	ldr	w2, [x25, 40]
 	ldr	w0, [x29, 92]
 	cmp	w2, w0
-	bne	.L3433
-	add	x1, x20, :lo12:.LANCHOR71
-	adrp	x4, .LANCHOR77
-	ldr	x4, [x4, #:lo12:.LANCHOR77]
+	bne	.L3460
+	add	x1, x20, :lo12:.LANCHOR70
+	adrp	x4, .LANCHOR76
+	ldr	x4, [x4, #:lo12:.LANCHOR76]
 	ldrh	w0, [x1, 24]
 	ubfiz	x3, x0, 2, 16
 	add	w0, w0, 1
 	str	w2, [x4, x3]
 	strh	w0, [x1, 24]
-.L3433:
-	add	x1, x20, :lo12:.LANCHOR71
+.L3460:
+	add	x1, x20, :lo12:.LANCHOR70
 	add	w26, w26, 1
 	ldrh	w0, [x1, 26]
 	add	w0, w0, 1
 	strh	w0, [x1, 26]
-	b	.L3426
-.L3427:
+	b	.L3453
+.L3454:
 	cmp	w1, 3
-	bne	.L3429
+	bne	.L3456
 	ldrb	w1, [x24]
-	cbnz	w1, .L3430
-	adrp	x1, .LANCHOR37
-	ldrb	w1, [x1, #:lo12:.LANCHOR37]
-	cbz	w1, .L3431
-.L3430:
-	add	x1, x20, :lo12:.LANCHOR71
+	cbnz	w1, .L3457
+	adrp	x1, .LANCHOR36
+	ldrb	w1, [x1, #:lo12:.LANCHOR36]
+	cbz	w1, .L3458
+.L3457:
+	add	x1, x20, :lo12:.LANCHOR70
 	ldrh	w1, [x1, 2]
 	add	w1, w1, w1, lsl 1
-	b	.L3446
-.L3431:
+	b	.L3473
+.L3458:
 	ldrh	w1, [x19, 2]
 	add	w0, w1, w0
 	orr	w0, w0, w26, lsl 24
-	b	.L3445
-.L3429:
+	b	.L3472
+.L3456:
 	ldrh	w1, [x19, 2]
 	add	w0, w1, w0
-	b	.L3445
+	b	.L3472
 	.size	gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page
 	.section	.text.gc_scan_src_blk,"ax",@progbits
 	.align	2
@@ -21657,117 +22222,117 @@ gc_scan_src_blk:
 	mov	w0, 65535
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR71
+	adrp	x21, .LANCHOR70
 	stp	x19, x20, [sp, 16]
-	ldrh	w1, [x21, #:lo12:.LANCHOR71]
+	ldrh	w1, [x21, #:lo12:.LANCHOR70]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w1, w0
 	stp	x27, x28, [sp, 80]
-	bne	.L3448
+	bne	.L3475
 	adrp	x1, .LANCHOR227
 	adrp	x0, .LC0
-	mov	w2, 1504
+	mov	w2, 1505
 	add	x1, x1, :lo12:.LANCHOR227
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3448:
-	ldrh	w1, [x21, #:lo12:.LANCHOR71]
+.L3475:
+	ldrh	w1, [x21, #:lo12:.LANCHOR70]
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L3478
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3450
-	adrp	x2, .LANCHOR9
+	beq	.L3505
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 8, .L3477
+	adrp	x2, .LANCHOR11
 	ubfiz	x0, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR9]
+	ldr	x2, [x2, #:lo12:.LANCHOR11]
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC217
-	add	x0, x0, :lo12:.LC217
+	adrp	x0, .LC220
+	add	x0, x0, :lo12:.LC220
 	bl	printf
-.L3450:
-	ldrh	w0, [x21, #:lo12:.LANCHOR71]
-	add	x14, x21, :lo12:.LANCHOR71
+.L3477:
+	ldrh	w0, [x21, #:lo12:.LANCHOR70]
+	add	x14, x21, :lo12:.LANCHOR70
 	add	x1, x14, 40
 	bl	ftl_get_blk_list_in_sblk
 	and	w1, w0, 255
 	strb	w1, [x14, 5]
-	cbnz	w1, .L3451
+	cbnz	w1, .L3478
 	mov	w0, -1
-	strh	w0, [x21, #:lo12:.LANCHOR71]
-.L3478:
+	strh	w0, [x21, #:lo12:.LANCHOR70]
+.L3505:
 	mov	w0, 0
-	b	.L3447
-.L3451:
-	adrp	x4, .LANCHOR7
-	ldrh	w3, [x21, #:lo12:.LANCHOR71]
+	b	.L3474
+.L3478:
+	adrp	x4, .LANCHOR9
+	ldrh	w3, [x21, #:lo12:.LANCHOR70]
 	mov	x19, x4
-	ldr	x1, [x4, #:lo12:.LANCHOR7]
+	ldr	x1, [x4, #:lo12:.LANCHOR9]
 	mov	x2, x3
 	add	x1, x1, x3, lsl 2
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 32
-	beq	.L3452
+	beq	.L3479
 	cmp	w1, 224
-	beq	.L3452
-	cbz	w1, .L3453
-	adrp	x1, .LANCHOR10
-	ldr	x1, [x1, #:lo12:.LANCHOR10]
+	beq	.L3479
+	cbz	w1, .L3480
+	adrp	x1, .LANCHOR12
+	ldr	x1, [x1, #:lo12:.LANCHOR12]
 	ldrh	w3, [x1, 16]
 	cmp	w3, w2
-	beq	.L3452
+	beq	.L3479
 	ldrh	w3, [x1, 48]
 	cmp	w3, w2
-	beq	.L3452
+	beq	.L3479
 	ldrh	w1, [x1, 80]
 	cmp	w1, w2
-	bne	.L3498
-.L3452:
-	add	x0, x21, :lo12:.LANCHOR71
+	bne	.L3525
+.L3479:
+	add	x0, x21, :lo12:.LANCHOR70
 	mov	w1, -1
-	strh	w1, [x21, #:lo12:.LANCHOR71]
+	strh	w1, [x21, #:lo12:.LANCHOR70]
 	strh	wzr, [x0, 24]
-	b	.L3478
-.L3453:
-	adrp	x0, .LANCHOR9
+	b	.L3505
+.L3480:
+	adrp	x0, .LANCHOR11
 	mov	x19, x0
-	ldr	x1, [x0, #:lo12:.LANCHOR9]
+	ldr	x1, [x0, #:lo12:.LANCHOR11]
 	ldrh	w1, [x1, x3, lsl 1]
-	cbz	w1, .L3455
+	cbz	w1, .L3482
 	adrp	x1, .LANCHOR227
 	adrp	x0, .LC0
-	mov	w2, 1529
+	mov	w2, 1530
 	add	x1, x1, :lo12:.LANCHOR227
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3455:
-	ldrh	w1, [x21, #:lo12:.LANCHOR71]
-	ldr	x0, [x19, #:lo12:.LANCHOR9]
+.L3482:
+	ldrh	w1, [x21, #:lo12:.LANCHOR70]
+	ldr	x0, [x19, #:lo12:.LANCHOR11]
 	strh	wzr, [x0, x1, lsl 1]
-	b	.L3452
-.L3498:
+	b	.L3479
+.L3525:
 	and	w0, w0, 255
 	sub	w0, w0, #1
 	add	x0, x14, x0, sxtw 1
 	ldrh	w24, [x0, 40]
 	mov	w0, 65535
 	cmp	w24, w0
-	bne	.L3456
+	bne	.L3483
 	adrp	x1, .LANCHOR227
 	adrp	x0, .LC0
-	mov	w2, 1539
+	mov	w2, 1540
 	add	x1, x1, :lo12:.LANCHOR227
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3456:
-	ldrh	w1, [x21, #:lo12:.LANCHOR71]
+.L3483:
+	ldrh	w1, [x21, #:lo12:.LANCHOR70]
 	adrp	x23, .LANCHOR111
-	ldr	x2, [x19, #:lo12:.LANCHOR7]
-	adrp	x22, .LANCHOR95
+	ldr	x2, [x19, #:lo12:.LANCHOR9]
+	adrp	x22, .LANCHOR94
 	ldrh	w20, [x23, #:lo12:.LANCHOR111]
-	ldrh	w0, [x22, #:lo12:.LANCHOR95]
+	ldrh	w0, [x22, #:lo12:.LANCHOR94]
 	add	x1, x2, x1, lsl 2
 	sub	w0, w0, #1
 	and	w0, w0, 65535
@@ -21775,31 +22340,31 @@ gc_scan_src_blk:
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 160
-	bne	.L3479
-	adrp	x1, .LANCHOR79
-	ldrb	w1, [x1, #:lo12:.LANCHOR79]
+	bne	.L3506
+	adrp	x1, .LANCHOR78
+	ldrb	w1, [x1, #:lo12:.LANCHOR78]
 	and	w27, w1, 65535
 	cmp	w1, 2
 	orr	w20, w20, w1, lsl 24
-	bne	.L3458
-	adrp	x0, .LANCHOR86
-	ldrh	w0, [x0, #:lo12:.LANCHOR86]
+	bne	.L3485
+	adrp	x0, .LANCHOR85
+	ldrh	w0, [x0, #:lo12:.LANCHOR85]
 	sub	w0, w0, #1
 	and	w0, w0, 65535
-.L3458:
+.L3485:
+	adrp	x1, .LANCHOR35
+	ldrb	w1, [x1, #:lo12:.LANCHOR35]
+	cbnz	w1, .L3486
 	adrp	x1, .LANCHOR36
 	ldrb	w1, [x1, #:lo12:.LANCHOR36]
-	cbnz	w1, .L3459
-	adrp	x1, .LANCHOR37
-	ldrb	w1, [x1, #:lo12:.LANCHOR37]
-	cbz	w1, .L3457
-.L3459:
-	adrp	x0, .LANCHOR86
-	ldrh	w0, [x0, #:lo12:.LANCHOR86]
+	cbz	w1, .L3484
+.L3486:
+	adrp	x0, .LANCHOR85
+	ldrh	w0, [x0, #:lo12:.LANCHOR85]
 	sub	w0, w0, #1
 	and	w0, w0, 65535
-.L3457:
-	add	x25, x21, :lo12:.LANCHOR71
+.L3484:
+	add	x25, x21, :lo12:.LANCHOR70
 	orr	w20, w0, w20
 	mov	w0, 1
 	strb	w27, [x25, 6]
@@ -21816,13 +22381,13 @@ gc_scan_src_blk:
 	ldr	w0, [x19, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3460
-.L3503:
+	bne	.L3487
+.L3530:
 	mov	x0, x19
 	bl	zbuf_free
-.L3501:
+.L3528:
 	mov	w0, -1
-.L3447:
+.L3474:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -21830,43 +22395,43 @@ gc_scan_src_blk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L3479:
+.L3506:
 	mov	w27, 1
-	b	.L3457
-.L3460:
+	b	.L3484
+.L3487:
 	ldr	x7, [x19, 24]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	ldr	w1, [x7]
 	cmp	w1, w0
-	beq	.L3461
-	mov	w2, 1577
-.L3504:
+	beq	.L3488
+	mov	w2, 1578
+.L3531:
 	adrp	x1, .LANCHOR227
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR227
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3503
-.L3461:
-	adrp	x0, .LANCHOR80
-	ldrh	w26, [x22, #:lo12:.LANCHOR95]
-	ldrb	w25, [x0, #:lo12:.LANCHOR80]
+	b	.L3530
+.L3488:
+	adrp	x0, .LANCHOR79
+	ldrh	w26, [x22, #:lo12:.LANCHOR94]
+	ldrb	w25, [x0, #:lo12:.LANCHOR79]
 	adrp	x0, .LANCHOR224
 	ldrb	w0, [x0, #:lo12:.LANCHOR224]
 	mul	w26, w25, w26
 	cmp	w0, 2
 	mul	w26, w27, w26
 	and	w26, w26, 65535
-	bne	.L3462
+	bne	.L3489
 	cmp	w27, 3
-	bne	.L3462
-	adrp	x1, .LANCHOR86
+	bne	.L3489
+	adrp	x1, .LANCHOR85
 	adrp	x28, .LANCHOR221
-	adrp	x27, .LANCHOR77
-	ldrh	w1, [x1, #:lo12:.LANCHOR86]
+	adrp	x27, .LANCHOR76
+	ldrh	w1, [x1, #:lo12:.LANCHOR85]
 	ldrh	w0, [x28, #:lo12:.LANCHOR221]
-	ldr	x3, [x27, #:lo12:.LANCHOR77]
+	ldr	x3, [x27, #:lo12:.LANCHOR76]
 	ubfiz	w1, w1, 2, 14
 	mul	w25, w25, w1
 	ldr	x1, [x19, 8]
@@ -21878,100 +22443,100 @@ gc_scan_src_blk:
 	bl	ftl_memcpy
 	ldr	x0, [x19, 24]
 	ldr	w6, [x0, 4]
-	cbz	w6, .L3463
+	cbz	w6, .L3490
 	ldr	x0, [x19, 8]
 	mov	w1, w25
 	bl	js_hash
 	cmp	w6, w0
-	beq	.L3463
+	beq	.L3490
 	mov	x0, x19
 	bl	zbuf_free
 	ldr	x0, [x19, 24]
 	mov	w3, w25
-.L3502:
+.L3529:
 	ldr	w1, [x0, 4]
-	adrp	x0, .LC218
+	adrp	x0, .LC221
 	ldr	w2, [x19, 40]
-	add	x0, x0, :lo12:.LC218
+	add	x0, x0, :lo12:.LC221
 	bl	printf
-	b	.L3501
-.L3463:
+	b	.L3528
+.L3490:
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbnz	w0, .L3491
 	adrp	x0, .LANCHOR36
 	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbnz	w0, .L3464
-	adrp	x0, .LANCHOR37
-	ldrb	w0, [x0, #:lo12:.LANCHOR37]
-	cbz	w0, .L3465
-.L3464:
+	cbz	w0, .L3492
+.L3491:
 	sub	w0, w20, #1
 	str	w0, [x19, 40]
-.L3466:
+.L3493:
 	mov	w1, 1
 	mov	x0, x19
 	bl	sblk_read_page
 	ldr	w0, [x19, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L3503
+	beq	.L3530
 	ldr	x0, [x19, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L3468
-	mov	w2, 1618
-	b	.L3504
-.L3465:
+	beq	.L3495
+	mov	w2, 1619
+	b	.L3531
+.L3492:
 	ldrh	w1, [x23, #:lo12:.LANCHOR111]
-	ldrh	w0, [x22, #:lo12:.LANCHOR95]
+	ldrh	w0, [x22, #:lo12:.LANCHOR94]
 	sub	w0, w0, #1
 	and	w0, w0, 65535
 	mul	w24, w1, w24
 	orr	w0, w0, 33554432
 	orr	w24, w0, w24
 	str	w24, [x19, 40]
-	b	.L3466
-.L3468:
+	b	.L3493
+.L3495:
 	ldrh	w2, [x28, #:lo12:.LANCHOR221]
-	ldr	x0, [x27, #:lo12:.LANCHOR77]
+	ldr	x0, [x27, #:lo12:.LANCHOR76]
 	ldr	x1, [x19, 8]
-.L3500:
-	adrp	x20, .LANCHOR77
+.L3527:
+	adrp	x20, .LANCHOR76
 	bl	ftl_memcpy
-	adrp	x22, .LANCHOR75
-	adrp	x23, .LANCHOR32
-	ldr	x24, [x20, #:lo12:.LANCHOR77]
-	add	x22, x22, :lo12:.LANCHOR75
-	add	x23, x23, :lo12:.LANCHOR32
+	adrp	x22, .LANCHOR74
+	adrp	x23, .LANCHOR31
+	ldr	x24, [x20, #:lo12:.LANCHOR76]
+	add	x22, x22, :lo12:.LANCHOR74
+	add	x23, x23, :lo12:.LANCHOR31
 	mov	x25, 0
-.L3471:
+.L3498:
 	cmp	w26, w25
-	bgt	.L3476
+	bgt	.L3503
 	mov	x0, x19
 	bl	zbuf_free
-	adrp	x0, .LANCHOR9
-	ldrh	w1, [x21, #:lo12:.LANCHOR71]
-	add	x3, x21, :lo12:.LANCHOR71
+	adrp	x0, .LANCHOR11
+	ldrh	w1, [x21, #:lo12:.LANCHOR70]
+	add	x3, x21, :lo12:.LANCHOR70
 	mov	x19, x0
-	ldr	x4, [x0, #:lo12:.LANCHOR9]
+	ldr	x4, [x0, #:lo12:.LANCHOR11]
 	ubfiz	x2, x1, 1, 16
 	ldrh	w3, [x3, 24]
 	ldrh	w2, [x4, x2]
 	cmp	w2, w3
-	beq	.L3477
-	adrp	x0, .LC219
-	add	x0, x0, :lo12:.LC219
+	beq	.L3504
+	adrp	x0, .LC222
+	add	x0, x0, :lo12:.LC222
 	bl	printf
-.L3477:
-	add	x0, x21, :lo12:.LANCHOR71
-	ldrh	w2, [x21, #:lo12:.LANCHOR71]
-	ldr	x1, [x19, #:lo12:.LANCHOR9]
+.L3504:
+	add	x0, x21, :lo12:.LANCHOR70
+	ldrh	w2, [x21, #:lo12:.LANCHOR70]
+	ldr	x1, [x19, #:lo12:.LANCHOR11]
 	ldrh	w3, [x0, 24]
 	strh	w3, [x1, x2, lsl 1]
 	strh	wzr, [x0, 28]
 	ldrh	w0, [x0, 24]
-	b	.L3447
-.L3462:
+	b	.L3474
+.L3489:
 	ldr	x6, [x19, 8]
 	lsl	w20, w26, 2
 	mov	w1, w20
@@ -21979,31 +22544,31 @@ gc_scan_src_blk:
 	bl	js_hash
 	ldr	w1, [x7, 4]
 	cmp	w1, w0
-	beq	.L3470
+	beq	.L3497
 	mov	x0, x19
 	bl	zbuf_free
 	mov	w3, w20
 	ldr	x0, [x19, 24]
-	b	.L3502
-.L3470:
-	adrp	x0, .LANCHOR77
+	b	.L3529
+.L3497:
+	adrp	x0, .LANCHOR76
 	mov	w2, w20
 	mov	x1, x6
-	ldr	x0, [x0, #:lo12:.LANCHOR77]
-	b	.L3500
-.L3476:
+	ldr	x0, [x0, #:lo12:.LANCHOR76]
+	b	.L3527
+.L3503:
 	ldr	w0, [x24, x25, lsl 2]
 	cmn	w0, #1
-	beq	.L3473
+	beq	.L3500
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 108]
 	cmn	w0, #1
-	bne	.L3474
+	bne	.L3501
 	ldr	w0, [x24, x25, lsl 2]
 	mov	w2, 0
 	add	x1, x29, 108
 	bl	pm_log2phys
-.L3474:
+.L3501:
 	ldrb	w0, [x23]
 	mov	w1, 24
 	ldrh	w2, [x22]
@@ -22012,25 +22577,25 @@ gc_scan_src_blk:
 	sub	w1, w0, w2
 	mov	w0, 1
 	lsl	w0, w0, w1
-	adrp	x1, .LANCHOR76
+	adrp	x1, .LANCHOR75
 	sub	w0, w0, #1
 	lsr	w2, w3, w2
-	ldrb	w1, [x1, #:lo12:.LANCHOR76]
+	ldrb	w1, [x1, #:lo12:.LANCHOR75]
 	and	w0, w0, w2
-	ldrh	w2, [x21, #:lo12:.LANCHOR71]
+	ldrh	w2, [x21, #:lo12:.LANCHOR70]
 	udiv	w0, w0, w1
-	add	x1, x21, :lo12:.LANCHOR71
+	add	x1, x21, :lo12:.LANCHOR70
 	cmp	w0, w2
-	bne	.L3473
+	bne	.L3500
 	ldrh	w0, [x1, 24]
-	ldr	x4, [x20, #:lo12:.LANCHOR77]
+	ldr	x4, [x20, #:lo12:.LANCHOR76]
 	ubfiz	x2, x0, 2, 16
 	add	w0, w0, 1
 	str	w3, [x4, x2]
 	strh	w0, [x1, 24]
-.L3473:
+.L3500:
 	add	x25, x25, 1
-	b	.L3471
+	b	.L3498
 	.size	gc_scan_src_blk, .-gc_scan_src_blk
 	.section	.text.gc_scan_static_data,"ax",@progbits
 	.align	2
@@ -22040,27 +22605,27 @@ gc_scan_static_data:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR10
+	adrp	x19, .LANCHOR12
 	stp	x21, x22, [sp, 32]
-	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	ldr	x0, [x19, #:lo12:.LANCHOR12]
 	ldr	w1, [x0, 544]
 	str	x23, [sp, 48]
 	cmn	w1, #1
-	beq	.L3506
+	beq	.L3533
 	adrp	x21, .LANCHOR228
 	adrp	x22, .LC0
 	add	x21, x21, :lo12:.LANCHOR228
 	add	x22, x22, :lo12:.LC0
 	mov	w20, 0
-.L3514:
-	ldr	x0, [x19, #:lo12:.LANCHOR10]
+.L3541:
+	ldr	x0, [x19, #:lo12:.LANCHOR12]
 	mov	w2, 0
 	add	x1, x29, 76
 	ldr	w0, [x0, 544]
 	bl	pm_log2phys
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L3507
+	beq	.L3534
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 76]
@@ -22070,12 +22635,12 @@ gc_scan_static_data:
 	bl	sblk_read_page
 	ldr	w0, [x23, 52]
 	cmp	w0, 256
-	bne	.L3508
-	adrp	x0, .LANCHOR75
+	bne	.L3535
+	adrp	x0, .LANCHOR74
 	ldr	w2, [x29, 76]
-	ldrh	w3, [x0, #:lo12:.LANCHOR75]
-	adrp	x0, .LANCHOR32
-	ldrb	w1, [x0, #:lo12:.LANCHOR32]
+	ldrh	w3, [x0, #:lo12:.LANCHOR74]
+	adrp	x0, .LANCHOR31
+	ldrb	w1, [x0, #:lo12:.LANCHOR31]
 	mov	w0, 24
 	lsr	w2, w2, w3
 	sub	w0, w0, w1
@@ -22084,34 +22649,34 @@ gc_scan_static_data:
 	lsl	w0, w1, w0
 	sub	w0, w0, #1
 	and	w0, w0, w2
-	adrp	x2, .LANCHOR76
-	ldrb	w3, [x2, #:lo12:.LANCHOR76]
+	adrp	x2, .LANCHOR75
+	ldrb	w3, [x2, #:lo12:.LANCHOR75]
 	mov	w2, 0
 	udiv	w0, w0, w3
 	bl	gc_add_sblk
-.L3508:
-	ldr	x0, [x19, #:lo12:.LANCHOR10]
+.L3535:
+	ldr	x0, [x19, #:lo12:.LANCHOR12]
 	ldr	x1, [x23, 24]
 	ldr	w0, [x0, 544]
 	ldr	w1, [x1, 4]
 	cmp	w1, w0
-	beq	.L3509
-	mov	w2, 2162
+	beq	.L3536
+	mov	w2, 2163
 	mov	x1, x21
 	mov	x0, x22
 	bl	printf
-.L3509:
+.L3536:
 	mov	x0, x23
 	bl	zbuf_free
-.L3507:
-	ldr	x0, [x19, #:lo12:.LANCHOR10]
+.L3534:
+	ldr	x0, [x19, #:lo12:.LANCHOR12]
 	adrp	x2, .LANCHOR128
 	ldr	w2, [x2, #:lo12:.LANCHOR128]
 	ldr	w1, [x0, 544]
 	add	w1, w1, 1
 	str	w1, [x0, 544]
 	cmp	w1, w2
-	bcc	.L3510
+	bcc	.L3537
 	mov	w1, -1
 	str	w1, [x0, 544]
 	ldr	w1, [x0, 548]
@@ -22122,46 +22687,46 @@ gc_scan_static_data:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-.L3505:
+.L3532:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L3510:
+.L3537:
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	bne	.L3505
+	bne	.L3532
 	adrp	x1, .LANCHOR221
 	add	w0, w20, 1
 	and	w0, w0, 65535
 	ldrh	w1, [x1, #:lo12:.LANCHOR221]
 	cmp	w20, w1, lsr 2
-	bcs	.L3505
+	bcs	.L3532
 	mov	w20, w0
-	b	.L3514
-.L3506:
+	b	.L3541
+.L3533:
 	ldr	w1, [x0, 536]
 	adrp	x3, .LANCHOR110
 	ldr	w2, [x0, 12]
 	add	w1, w1, 12959744
 	add	w1, w1, 256
 	cmp	w2, w1
-	bhi	.L3516
+	bhi	.L3543
 	ldr	x4, [x3, #:lo12:.LANCHOR110]
 	mov	w5, 5000
 	ldr	w1, [x0, 540]
 	add	w1, w1, w5
 	ldr	w4, [x4, 44]
 	cmp	w4, w1
-	bls	.L3505
-.L3516:
+	bls	.L3532
+.L3543:
 	ldr	x1, [x3, #:lo12:.LANCHOR110]
 	ldr	w1, [x1, 44]
 	str	w1, [x0, 540]
 	str	w2, [x0, 536]
 	str	wzr, [x0, 544]
-	b	.L3505
+	b	.L3532
 	.size	gc_scan_static_data, .-gc_scan_static_data
 	.section	.text.ftl_sblk_dump,"ax",@progbits
 	.align	2
@@ -22173,12 +22738,12 @@ ftl_sblk_dump:
 	stp	x29, x30, [sp, 48]
 	add	x29, sp, 48
 	stp	x23, x24, [sp, 96]
-	adrp	x24, .LANCHOR7
+	adrp	x24, .LANCHOR9
 	lsl	x23, x0, 2
 	stp	x19, x20, [sp, 64]
 	str	x0, [x29, 144]
 	mov	x20, x0
-	ldr	x0, [x24, #:lo12:.LANCHOR7]
+	ldr	x0, [x24, #:lo12:.LANCHOR9]
 	str	x1, [x29, 160]
 	add	x1, x0, x23
 	stp	x21, x22, [sp, 80]
@@ -22187,50 +22752,50 @@ ftl_sblk_dump:
 	ldrb	w2, [x1, 2]
 	mov	w1, w20
 	ldrh	w4, [x0, x23]
-	adrp	x0, .LC220
+	adrp	x0, .LC223
 	stp	x27, x28, [sp, 128]
 	ubfx	x5, x5, 11, 8
 	ubfx	x3, x2, 3, 2
 	and	w4, w4, 2047
 	ubfx	x2, x2, 5, 3
-	add	x0, x0, :lo12:.LC220
+	add	x0, x0, :lo12:.LC223
 	bl	printf
 	mov	w0, 65535
 	cmp	w20, w0
-	beq	.L3545
-	adrp	x0, .LANCHOR6
-	ldrh	w0, [x0, #:lo12:.LANCHOR6]
+	beq	.L3572
+	adrp	x0, .LANCHOR8
+	ldrh	w0, [x0, #:lo12:.LANCHOR8]
 	cmp	w0, w20
-	bls	.L3545
-	ldr	x0, [x24, #:lo12:.LANCHOR7]
+	bls	.L3572
+	ldr	x0, [x24, #:lo12:.LANCHOR9]
 	add	x0, x0, x23
 	ldrb	w0, [x0, 2]
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L3546
-	adrp	x0, .LANCHOR79
-	ldrb	w25, [x0, #:lo12:.LANCHOR79]
-.L3524:
+	bne	.L3573
+	adrp	x0, .LANCHOR78
+	ldrb	w25, [x0, #:lo12:.LANCHOR78]
+.L3551:
 	add	x28, x29, 240
-	adrp	x21, .LANCHOR95
+	adrp	x21, .LANCHOR94
 	mov	w0, w20
 	mov	w19, 0
 	strh	w20, [x28, -32]!
 	add	x1, x28, 16
 	bl	ftl_get_blk_list_in_sblk
-	ldrh	w2, [x21, #:lo12:.LANCHOR95]
+	ldrh	w2, [x21, #:lo12:.LANCHOR94]
 	and	w1, w0, 255
 	strb	w1, [x29, 217]
 	and	w4, w0, 255
 	strb	wzr, [x29, 213]
 	mov	w3, w25
 	strh	wzr, [x29, 210]
-	adrp	x0, .LC221
+	adrp	x0, .LC224
 	mul	w1, w1, w2
 	strh	wzr, [x29, 218]
 	strh	w1, [x29, 214]
-	add	x0, x0, :lo12:.LC221
-	ldr	x1, [x24, #:lo12:.LANCHOR7]
+	add	x0, x0, :lo12:.LC224
+	ldr	x1, [x24, #:lo12:.LANCHOR9]
 	add	x1, x1, x23
 	ldrb	w2, [x1, 2]
 	mov	w1, w20
@@ -22245,55 +22810,55 @@ ftl_sblk_dump:
 	str	wzr, [x29, 176]
 	add	x0, x0, :lo12:.LANCHOR111
 	str	x0, [x29, 112]
-.L3525:
+.L3552:
 	ldr	x0, [x29, 136]
-	ldrh	w0, [x0, #:lo12:.LANCHOR95]
+	ldrh	w0, [x0, #:lo12:.LANCHOR94]
 	cmp	w0, w19
-	bls	.L3542
+	bls	.L3569
 	lsl	w0, w19, 1
 	mov	w22, 0
 	sub	w1, w0, #1
 	add	w0, w0, w19
 	sub	w0, w0, #1
 	stp	w1, w0, [x29, 152]
-	adrp	x0, .LC167
-	add	x0, x0, :lo12:.LC167
+	adrp	x0, .LC160
+	add	x0, x0, :lo12:.LC160
 	str	x0, [x29, 120]
-	b	.L3543
-.L3546:
+	b	.L3570
+.L3573:
 	mov	w25, 1
-	b	.L3524
-.L3539:
+	b	.L3551
+.L3566:
 	ldr	x0, [x29, 128]
 	ldrh	w11, [x28, x0]
 	mov	w0, 65535
 	cmp	w11, w0
-	beq	.L3526
+	beq	.L3553
 	ldr	x0, [x29, 112]
 	cmp	w25, 3
 	ldrh	w8, [x0]
 	mul	w1, w8, w11
 	add	w0, w21, w1
-	bne	.L3527
-	adrp	x2, .LANCHOR36
-	ldrb	w2, [x2, #:lo12:.LANCHOR36]
-	cbz	w2, .L3528
-	adrp	x1, .LANCHOR79
-	ldrb	w8, [x1, #:lo12:.LANCHOR79]
+	bne	.L3554
+	adrp	x2, .LANCHOR35
+	ldrb	w2, [x2, #:lo12:.LANCHOR35]
+	cbz	w2, .L3555
+	adrp	x1, .LANCHOR78
+	ldrb	w8, [x1, #:lo12:.LANCHOR78]
 	ldr	w1, [x29, 156]
-.L3555:
+.L3582:
 	add	w0, w0, w1
 	orr	w27, w0, w8, lsl 24
-	b	.L3529
-.L3528:
-	adrp	x2, .LANCHOR37
+	b	.L3556
+.L3555:
+	adrp	x2, .LANCHOR36
 	lsl	w8, w21, 24
-	ldrb	w2, [x2, #:lo12:.LANCHOR37]
-	cbz	w2, .L3530
+	ldrb	w2, [x2, #:lo12:.LANCHOR36]
+	cbz	w2, .L3557
 	ldr	w1, [x29, 156]
 	add	w0, w0, w1
 	orr	w27, w0, w8
-.L3529:
+.L3556:
 	str	w27, [x26, 40]
 	mov	w1, 1
 	str	w11, [x29, 100]
@@ -22329,28 +22894,28 @@ ftl_sblk_dump:
 	ccmn	w12, #1, 4, ne
 	csinc	w0, w0, wzr, ne
 	str	w0, [x29, 168]
-	ldr	x0, [x24, #:lo12:.LANCHOR7]
+	ldr	x0, [x24, #:lo12:.LANCHOR9]
 	add	x0, x0, x23
 	ldrb	w0, [x0, 2]
 	and	w0, w0, 224
 	cmp	w0, 224
 	ccmp	w0, w1, 4, ne
-	beq	.L3526
+	beq	.L3553
 	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 204]
 	cmn	w0, #1
-	bne	.L3533
+	bne	.L3560
 	ldr	x0, [x26, 24]
 	mov	w2, 0
 	add	x1, x29, 204
 	ldr	w0, [x0, 4]
 	bl	pm_log2phys
-.L3533:
+.L3560:
 	ldr	w0, [x29, 204]
 	cmp	w27, w0
-	bne	.L3534
+	bne	.L3561
 	ldr	w0, [x29, 172]
 	mov	w1, w27
 	add	w0, w0, 1
@@ -22358,12 +22923,12 @@ ftl_sblk_dump:
 	ldr	x0, [x26, 24]
 	ldr	w3, [x29, 172]
 	ldr	w2, [x0, 4]
-	adrp	x0, .LC222
-	add	x0, x0, :lo12:.LC222
+	adrp	x0, .LC225
+	add	x0, x0, :lo12:.LC225
 	bl	printf
-.L3534:
+.L3561:
 	ldr	x0, [x29, 160]
-	cbz	x0, .L3536
+	cbz	x0, .L3563
 	ldr	x0, [x29, 176]
 	ubfiz	x3, x0, 2, 32
 	ldr	x0, [x29, 160]
@@ -22371,85 +22936,85 @@ ftl_sblk_dump:
 	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	cmp	w0, w2
-	beq	.L3537
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3537
+	beq	.L3564
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L3564
 	ldr	w1, [x29, 176]
-	adrp	x0, .LC223
+	adrp	x0, .LC226
 	str	x3, [x29, 104]
-	add	x0, x0, :lo12:.LC223
+	add	x0, x0, :lo12:.LC226
 	bl	printf
 	ldr	x3, [x29, 104]
-.L3537:
+.L3564:
 	ldr	x1, [x26, 24]
 	ldr	x0, [x29, 160]
 	ldr	w1, [x1, 4]
 	ldr	w0, [x0, x3]
 	cmp	w1, w0
-	beq	.L3536
+	beq	.L3563
 	cmn	w0, #1
-	beq	.L3536
+	beq	.L3563
 	adrp	x1, .LANCHOR229
 	adrp	x0, .LC0
-	mov	w2, 1567
+	mov	w2, 1575
 	add	x1, x1, :lo12:.LANCHOR229
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3536:
+.L3563:
 	ldr	w0, [x29, 176]
 	add	w0, w0, 1
 	str	w0, [x29, 176]
-.L3526:
+.L3553:
 	add	w21, w21, 1
 	and	w21, w21, 65535
-.L3541:
+.L3568:
 	cmp	w25, w21
-	bcs	.L3539
+	bcs	.L3566
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L3543:
+.L3570:
 	ldrb	w0, [x29, 217]
 	cmp	w0, w22
-	bls	.L3540
+	bls	.L3567
 	sxtw	x0, w22
 	mov	w21, 1
 	add	x0, x0, 8
 	lsl	x0, x0, 1
 	str	x0, [x29, 128]
-	b	.L3541
-.L3530:
+	b	.L3568
+.L3557:
 	add	w1, w19, w1
 	orr	w27, w8, w1
-	b	.L3529
-.L3527:
+	b	.L3556
+.L3554:
 	cmp	w25, 2
-	bne	.L3531
-	adrp	x1, .LANCHOR79
-	ldrb	w8, [x1, #:lo12:.LANCHOR79]
+	bne	.L3558
+	adrp	x1, .LANCHOR78
+	ldrb	w8, [x1, #:lo12:.LANCHOR78]
 	ldr	w1, [x29, 152]
-	b	.L3555
-.L3531:
+	b	.L3582
+.L3558:
 	add	w27, w19, w1
-	b	.L3529
-.L3540:
+	b	.L3556
+.L3567:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L3525
-.L3542:
+	b	.L3552
+.L3569:
 	mov	x0, x26
 	bl	zbuf_free
-	adrp	x0, .LANCHOR9
+	adrp	x0, .LANCHOR11
 	ldr	x1, [x29, 144]
 	ldr	w3, [x29, 172]
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrh	w2, [x0, x1, lsl 1]
 	mov	w1, w20
-	adrp	x0, .LC224
-	add	x0, x0, :lo12:.LC224
+	adrp	x0, .LC227
+	add	x0, x0, :lo12:.LC227
 	bl	printf
 	ldr	w0, [x29, 168]
-.L3522:
+.L3549:
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
 	ldp	x23, x24, [sp, 96]
@@ -22458,266 +23023,299 @@ ftl_sblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 288
 	ret
-.L3545:
+.L3572:
 	mov	w0, 0
-	b	.L3522
+	b	.L3549
 	.size	ftl_sblk_dump, .-ftl_sblk_dump
 	.section	.text.zftl_read,"ax",@progbits
 	.align	2
 	.global	zftl_read
 	.type	zftl_read, %function
 zftl_read:
-	sub	sp, sp, #208
+	sub	sp, sp, #192
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x19, x20, [sp, 32]
 	mov	w19, w0
-	adrp	x0, .LANCHOR14
+	adrp	x0, .LANCHOR19
 	stp	x21, x22, [sp, 48]
 	stp	x23, x24, [sp, 64]
 	mov	w20, w1
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
 	mov	w23, w2
 	stp	x25, x26, [sp, 80]
 	mov	x22, x3
 	stp	x27, x28, [sp, 96]
-	tbz	x0, 12, .L3557
+	tbz	x0, 12, .L3584
 	mov	w3, w2
-	adrp	x0, .LC225
+	adrp	x0, .LC228
 	mov	w2, w1
-	add	x0, x0, :lo12:.LC225
+	add	x0, x0, :lo12:.LC228
 	mov	w1, w19
 	bl	printf
-.L3557:
-	cbnz	w19, .L3558
-	adrp	x0, .LANCHOR68
+.L3584:
+	cbnz	w19, .L3585
+	adrp	x0, .LANCHOR67
 	mov	w19, 24576
-	ldr	w0, [x0, #:lo12:.LANCHOR68]
-.L3559:
+	ldr	w0, [x0, #:lo12:.LANCHOR67]
+.L3586:
 	cmp	w0, w20
 	ccmp	w0, w23, 0, hi
-	bcc	.L3589
+	bcc	.L3619
 	add	w1, w20, w23
 	cmp	w0, w1
-	bcc	.L3589
+	bcc	.L3619
 	adrp	x1, .LANCHOR110
-	adrp	x26, .LANCHOR131
+	adrp	x24, .LANCHOR131
 	add	w19, w19, w20
-	str	x1, [x29, 120]
+	str	x1, [x29, 112]
 	ldr	x2, [x1, #:lo12:.LANCHOR110]
-	str	x26, [x29, 168]
 	ldr	w0, [x2, 24]
 	add	w0, w0, w23
 	str	w0, [x2, 24]
-	ldrb	w0, [x26, #:lo12:.LANCHOR131]
+	ldrb	w0, [x24, #:lo12:.LANCHOR131]
+	udiv	w2, w19, w0
+	stp	wzr, w2, [x29, 152]
 	add	w2, w23, w19
-	stp	w2, wzr, [x29, 160]
+	str	w2, [x29, 148]
 	sub	w2, w2, #1
-	udiv	w27, w19, w0
 	udiv	w0, w2, w0
-	mov	w20, w27
-	sub	w25, w0, w27
-	str	w0, [x29, 156]
-	add	w25, w25, 1
+	ldr	w2, [x29, 156]
+	mov	x21, x2
+	sub	w26, w0, w2
+	str	w0, [x29, 144]
+	add	w26, w26, 1
 	adrp	x0, .LANCHOR134
 	add	x28, x0, :lo12:.LANCHOR134
-.L3561:
-	cbnz	w25, .L3586
-	ldr	w0, [x29, 164]
-.L3556:
+.L3588:
+	cbnz	w26, .L3616
+	ldr	w0, [x29, 152]
+.L3583:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
 	ldp	x25, x26, [sp, 80]
 	ldp	x27, x28, [sp, 96]
 	ldp	x29, x30, [sp, 16]
-	add	sp, sp, 208
+	add	sp, sp, 192
 	ret
-.L3558:
+.L3585:
 	cmp	w19, 3
-	bhi	.L3589
+	bhi	.L3619
 	lsl	w19, w19, 13
 	mov	w0, 8192
-	b	.L3559
-.L3586:
-	ldr	x0, [x29, 168]
-	cmp	w20, w27
-	ldrb	w1, [x0, #:lo12:.LANCHOR131]
+	b	.L3586
+.L3616:
+	ldr	w0, [x29, 156]
+	ldrb	w1, [x24, #:lo12:.LANCHOR131]
+	cmp	w21, w0
+	ldr	w0, [x29, 144]
+	and	w25, w1, 65535
+	ccmp	w21, w0, 4, ne
+	bne	.L3620
 	ldr	w0, [x29, 156]
-	and	w24, w1, 65535
-	ccmp	w20, w0, 4, ne
+	cmp	w21, w0
 	bne	.L3590
-	cmp	w20, w27
-	bne	.L3563
 	udiv	w3, w19, w1
 	and	w0, w23, 65535
 	msub	w1, w3, w1, w19
-	and	w26, w1, 65535
-	sub	w24, w24, w26
-	and	w24, w24, 65535
-	cmp	w23, w24
-	csel	w24, w0, w24, cc
-.L3562:
-	adrp	x21, .LANCHOR56
-	add	x1, x21, :lo12:.LANCHOR56
+	and	w27, w1, 65535
+	sub	w25, w25, w27
+	and	w25, w25, 65535
+	cmp	w23, w25
+	csel	w25, w0, w25, cc
+.L3589:
+	adrp	x20, .LANCHOR55
+	add	x1, x20, :lo12:.LANCHOR55
 	add	x1, x1, 2
 	mov	w0, 0
-.L3566:
+.L3593:
 	ldr	w2, [x1, 34]
-	cmp	w20, w2
-	bne	.L3564
+	cmp	w21, w2
+	bne	.L3591
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L3564
-	add	x1, x21, :lo12:.LANCHOR56
+	tbz	x2, 3, .L3591
+	add	x1, x20, :lo12:.LANCHOR55
 	ubfiz	x0, x0, 6, 32
 	add	x0, x1, x0
-	lsl	w2, w24, 9
-	ubfiz	x24, x24, 9, 16
-	ubfiz	x26, x26, 9, 16
+	lsl	w2, w25, 9
+	ubfiz	x25, x25, 9, 16
+	ubfiz	x27, x27, 9, 16
 	ldr	x1, [x0, 8]
 	mov	x0, x22
-	add	x22, x22, x24
-	add	x1, x1, x26
+	add	x22, x22, x25
+	add	x1, x1, x27
 	bl	ftl_memcpy
-.L3565:
-	add	w20, w20, 1
-	sub	w25, w25, #1
-.L3572:
-	adrp	x0, .LANCHOR58
-	ldrb	w0, [x0, #:lo12:.LANCHOR58]
+.L3592:
+	add	w21, w21, 1
+	sub	w26, w26, #1
+.L3599:
+	adrp	x0, .LANCHOR57
+	ldrb	w0, [x0, #:lo12:.LANCHOR57]
 	cmp	w0, 2
-	bls	.L3573
-	cbnz	w25, .L3561
-.L3573:
+	bls	.L3600
+	cbnz	w26, .L3588
+.L3600:
 	adrp	x0, .LANCHOR134
 	ldrb	w1, [x0, #:lo12:.LANCHOR134]
-	cbz	w1, .L3561
-	adrp	x24, .LANCHOR133
-	add	x0, x21, :lo12:.LANCHOR56
-	ldrb	w2, [x24, #:lo12:.LANCHOR133]
+	cbz	w1, .L3588
+	adrp	x25, .LANCHOR133
+	add	x0, x20, :lo12:.LANCHOR55
+	ldrb	w2, [x25, #:lo12:.LANCHOR133]
 	add	x0, x0, x2, lsl 6
 	bl	sblk_read_page
 	adrp	x0, .LANCHOR230
 	add	x0, x0, :lo12:.LANCHOR230
-	str	x0, [x29, 136]
+	str	x0, [x29, 128]
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
-	str	x0, [x29, 128]
-.L3575:
+	str	x0, [x29, 120]
+.L3602:
 	ldrb	w0, [x28]
-	cbnz	w0, .L3585
+	cbnz	w0, .L3615
 	mov	w0, -1
 	strb	wzr, [x28]
-	strb	w0, [x24, #:lo12:.LANCHOR133]
-	b	.L3561
-.L3563:
-	ldr	w0, [x29, 160]
-	msub	w24, w1, w20, w0
-	and	w24, w24, 255
+	strb	w0, [x25, #:lo12:.LANCHOR133]
+	b	.L3588
 .L3590:
-	mov	w26, 0
-	b	.L3562
-.L3564:
+	ldr	w0, [x29, 148]
+	msub	w25, w1, w21, w0
+	and	w25, w25, 255
+.L3620:
+	mov	w27, 0
+	b	.L3589
+.L3591:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 16
-	bne	.L3566
-	mov	w0, w20
+	bne	.L3593
+	mov	w0, w21
 	bl	lpa_hash_get_ppa
-	str	w0, [x29, 188]
+	str	w0, [x29, 172]
 	cmn	w0, #1
-	bne	.L3567
+	bne	.L3594
 	mov	w2, 0
-	add	x1, x29, 188
-	mov	w0, w20
+	add	x1, x29, 172
+	mov	w0, w21
 	bl	pm_log2phys
-.L3567:
-	ldr	w0, [x29, 188]
+.L3594:
+	ldr	w0, [x29, 172]
 	cmn	w0, #1
-	bne	.L3568
-	ldr	x0, [x29, 168]
-	mov	w24, 0
-	add	x26, x0, :lo12:.LANCHOR131
-.L3569:
-	ldrb	w0, [x26]
-	cmp	w24, w0
-	bcs	.L3565
-	madd	w0, w20, w0, w24
+	bne	.L3595
+	add	x27, x24, :lo12:.LANCHOR131
+	mov	w25, 0
+.L3596:
+	ldrb	w0, [x27]
+	cmp	w25, w0
+	bcs	.L3592
+	madd	w0, w21, w0, w25
 	cmp	w19, w0
-	bhi	.L3570
-	ldr	w1, [x29, 160]
+	bhi	.L3597
+	ldr	w1, [x29, 148]
 	cmp	w1, w0
-	bls	.L3570
+	bls	.L3597
 	mov	x0, x22
 	add	x22, x22, 512
 	mov	w2, 512
 	mov	w1, 0
 	bl	ftl_memset
-.L3570:
-	add	w24, w24, 1
-	b	.L3569
-.L3568:
+.L3597:
+	add	w25, w25, 1
+	b	.L3596
+.L3595:
 	mov	w0, 0
 	bl	buf_alloc
-	cbz	x0, .L3572
-	ldr	x2, [x29, 120]
+	cbz	x0, .L3599
+	ldr	x2, [x29, 112]
 	ldr	x4, [x2, #:lo12:.LANCHOR110]
 	ldr	w2, [x4, 40]
 	add	w2, w2, 1
 	str	w2, [x4, 40]
-	ldr	w2, [x29, 188]
-	strb	w24, [x0, 56]
-	ubfiz	x24, x24, 9, 16
+	ldr	w2, [x29, 172]
+	strb	w25, [x0, 56]
+	ubfiz	x25, x25, 9, 16
 	str	x22, [x0, 16]
-	add	x22, x22, x24
-	strb	w26, [x0, 57]
-	stp	w20, w2, [x0, 36]
+	add	x22, x22, x25
+	strb	w27, [x0, 57]
+	stp	w21, w2, [x0, 36]
 	str	w2, [x0, 44]
 	bl	zftl_add_read_buf
-	b	.L3565
-.L3585:
-	ldrb	w0, [x24, #:lo12:.LANCHOR133]
+	b	.L3592
+.L3615:
+	ldrb	w0, [x25, #:lo12:.LANCHOR133]
 	cmp	w0, 255
-	bne	.L3576
-	ldp	x0, x1, [x29, 128]
-	mov	w2, 1276
-	bl	printf
-.L3576:
-	ldrb	w26, [x24, #:lo12:.LANCHOR133]
-	add	x0, x21, :lo12:.LANCHOR56
-	ubfiz	x1, x26, 6, 8
-	lsl	x2, x26, 6
+	bne	.L3603
+	ldp	x0, x1, [x29, 120]
+	mov	w2, 1281
+	bl	printf
+.L3603:
+	ldrb	w27, [x25, #:lo12:.LANCHOR133]
+	add	x0, x20, :lo12:.LANCHOR55
+	ubfiz	x1, x27, 6, 8
+	lsl	x2, x27, 6
 	add	x1, x0, x1
-	str	x1, [x29, 144]
+	str	x1, [x29, 136]
 	add	x1, x0, x2
 	ldrb	w0, [x0, x2]
-	strb	w0, [x24, #:lo12:.LANCHOR133]
+	strb	w0, [x25, #:lo12:.LANCHOR133]
 	ldr	w10, [x1, 52]
 	cmn	w10, #1
-	bne	.L3577
-	adrp	x0, .LANCHOR10
-	str	w10, [x29, 164]
-	ldr	x1, [x0, #:lo12:.LANCHOR10]
+	bne	.L3604
+	adrp	x0, .LANCHOR12
+	str	w10, [x29, 152]
+	ldr	x1, [x0, #:lo12:.LANCHOR12]
 	ldr	w0, [x1, 552]
 	add	w0, w0, 1
 	str	w0, [x1, 552]
-.L3578:
-	add	x1, x21, :lo12:.LANCHOR56
-	add	x1, x1, x26, lsl 6
+.L3605:
+	add	x0, x20, :lo12:.LANCHOR55
+	add	x0, x0, x27, lsl 6
+	ldr	x3, [x0, 24]
+	ldr	w0, [x0, 36]
+	ldr	w1, [x3, 4]
+	cmp	w1, w0
+	bne	.L3606
+	cmn	w10, #1
+	bne	.L3607
+.L3606:
+	add	x0, x20, :lo12:.LANCHOR55
+	ldrb	w4, [x24, #:lo12:.LANCHOR131]
+	add	x0, x0, x27, lsl 6
+	mov	w5, 1
+	ldrb	w1, [x0, 56]
+	ldp	x2, x7, [x0, 8]
+	cmp	w1, w4
+	ldr	w1, [x0, 40]
+	adrp	x0, .LANCHOR31
+	csel	x2, x7, x2, cs
+	ldrb	w6, [x0, #:lo12:.LANCHOR31]
+	mov	w0, 24
+	sub	w0, w0, w6
+	lsl	w5, w5, w6
+	sub	w5, w5, #1
+	lsl	w6, w5, w0
+	lsr	w0, w1, w0
+	bic	w1, w1, w6
+	and	w0, w0, w5
+	bl	flash_read_page_en
+	mov	w10, w0
+.L3607:
+	add	x1, x20, :lo12:.LANCHOR55
+	add	x1, x1, x27, lsl 6
 	ldr	x0, [x1, 24]
 	ldr	w3, [x1, 36]
 	ldr	w1, [x0, 4]
 	cmp	w1, w3
-	bne	.L3579
+	bne	.L3609
 	cmn	w10, #1
-	bne	.L3580
-.L3579:
-	adrp	x1, .LANCHOR10
-	add	x11, x21, :lo12:.LANCHOR56
-	add	x11, x11, x26, lsl 6
-	str	w10, [x29, 152]
-	ldr	x2, [x1, #:lo12:.LANCHOR10]
-	str	x11, [x29, 112]
+	bne	.L3610
+.L3609:
+	adrp	x1, .LANCHOR12
+	add	x11, x20, :lo12:.LANCHOR55
+	add	x11, x11, x27, lsl 6
+	str	w10, [x29, 108]
+	ldr	x2, [x1, #:lo12:.LANCHOR12]
+	str	x11, [x29, 96]
 	ldr	w1, [x2, 552]
 	add	w1, w1, 1
 	str	w1, [x2, 552]
@@ -22727,15 +23325,15 @@ zftl_read:
 	mov	w2, w10
 	ldp	w5, w6, [x0]
 	ldr	w7, [x0, 8]
-	adrp	x0, .LC227
+	adrp	x0, .LC230
 	ldr	w4, [x11, 40]
-	add	x0, x0, :lo12:.LC227
+	add	x0, x0, :lo12:.LC230
 	bl	printf
-	adrp	x0, .LANCHOR75
-	ldr	x11, [x29, 112]
-	ldrh	w2, [x0, #:lo12:.LANCHOR75]
-	adrp	x0, .LANCHOR32
-	ldrb	w1, [x0, #:lo12:.LANCHOR32]
+	adrp	x0, .LANCHOR74
+	ldr	x11, [x29, 96]
+	ldrh	w2, [x0, #:lo12:.LANCHOR74]
+	adrp	x0, .LANCHOR31
+	ldrb	w1, [x0, #:lo12:.LANCHOR31]
 	mov	w0, 24
 	sub	w0, w0, w1
 	sub	w1, w0, w2
@@ -22745,34 +23343,33 @@ zftl_read:
 	sub	w0, w0, #1
 	lsr	w1, w1, w2
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR76
-	ldrb	w2, [x1, #:lo12:.LANCHOR76]
+	adrp	x1, .LANCHOR75
+	ldrb	w2, [x1, #:lo12:.LANCHOR75]
 	mov	x1, 0
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
-	ldr	w10, [x29, 152]
-.L3580:
-	add	x0, x21, :lo12:.LANCHOR56
-	add	x0, x0, x26, lsl 6
+	ldr	w10, [x29, 108]
+.L3610:
+	add	x0, x20, :lo12:.LANCHOR55
+	add	x0, x0, x27, lsl 6
 	ldr	x1, [x0, 24]
 	ldr	w0, [x0, 36]
 	ldr	w1, [x1, 4]
 	cmp	w1, w0
-	bne	.L3581
+	bne	.L3611
 	cmn	w10, #1
-	bne	.L3582
-.L3581:
-	ldp	x0, x1, [x29, 128]
-	mov	w2, 1301
-	bl	printf
-.L3582:
-	add	x0, x21, :lo12:.LANCHOR56
-	add	x8, x0, x26, lsl 6
-	ldr	x0, [x29, 168]
+	bne	.L3612
+.L3611:
+	ldp	x0, x1, [x29, 120]
+	mov	w2, 1317
+	bl	printf
+.L3612:
+	add	x0, x20, :lo12:.LANCHOR55
+	add	x8, x0, x27, lsl 6
+	ldrb	w0, [x24, #:lo12:.LANCHOR131]
 	ldrb	w2, [x8, 56]
-	ldrb	w0, [x0, #:lo12:.LANCHOR131]
 	cmp	w0, w2
-	bls	.L3583
+	bls	.L3613
 	ldrb	w0, [x8, 57]
 	lsl	w2, w2, 9
 	ldr	x1, [x8, 8]
@@ -22780,58 +23377,58 @@ zftl_read:
 	add	x1, x1, x0
 	ldr	x0, [x8, 16]
 	bl	ftl_memcpy
-.L3584:
-	ldr	x1, [x29, 144]
-	adrp	x0, .LANCHOR63
-	add	x0, x0, :lo12:.LANCHOR63
+.L3614:
+	ldr	x1, [x29, 136]
+	adrp	x0, .LANCHOR62
+	add	x0, x0, :lo12:.LANCHOR62
 	bl	buf_remove_buf
-	ldr	x0, [x29, 144]
+	ldr	x0, [x29, 136]
 	bl	zbuf_free
 	ldrb	w0, [x28]
 	sub	w0, w0, #1
 	strb	w0, [x28]
-	b	.L3575
-.L3577:
+	b	.L3602
+.L3604:
 	cmp	w10, 256
-	bne	.L3578
-	adrp	x2, .LANCHOR32
-	adrp	x0, .LANCHOR75
+	bne	.L3605
+	adrp	x2, .LANCHOR31
+	adrp	x0, .LANCHOR74
 	mov	w4, 24
 	mov	w5, 1
-	ldrb	w2, [x2, #:lo12:.LANCHOR32]
-	ldrh	w0, [x0, #:lo12:.LANCHOR75]
+	ldrb	w2, [x2, #:lo12:.LANCHOR31]
+	ldrh	w0, [x0, #:lo12:.LANCHOR74]
 	sub	w4, w4, w2
-	stp	w10, w5, [x29, 108]
+	str	w5, [x29, 96]
 	ldp	w2, w3, [x1, 36]
 	sub	w4, w4, w0
 	lsl	w4, w5, w4
 	sub	w4, w4, #1
 	lsr	w0, w3, w0
 	and	w4, w4, w0
-	adrp	x0, .LANCHOR76
-	ldrb	w0, [x0, #:lo12:.LANCHOR76]
+	adrp	x0, .LANCHOR75
+	ldrb	w0, [x0, #:lo12:.LANCHOR75]
 	udiv	w4, w4, w0
-	adrp	x0, .LC226
-	add	x0, x0, :lo12:.LC226
+	adrp	x0, .LC229
+	add	x0, x0, :lo12:.LC229
+	stp	w10, w4, [x29, 104]
 	and	w1, w4, 65535
-	str	w4, [x29, 152]
 	bl	printf
-	ldr	w5, [x29, 112]
+	ldr	w5, [x29, 96]
 	mov	w2, 0
-	ldr	w4, [x29, 152]
+	ldr	w4, [x29, 108]
 	mov	w1, w5
 	mov	w0, w4
 	bl	gc_add_sblk
-	ldr	w10, [x29, 108]
-	b	.L3578
-.L3583:
+	ldr	w10, [x29, 104]
+	b	.L3605
+.L3613:
 	ldrb	w0, [x8, 2]
 	and	w0, w0, -9
 	strb	w0, [x8, 2]
-	b	.L3584
-.L3589:
+	b	.L3614
+.L3619:
 	mov	w0, -1
-	b	.L3556
+	b	.L3583
 	.size	zftl_read, .-zftl_read
 	.section	.text.zftl_sys_read,"ax",@progbits
 	.align	2
@@ -22913,11 +23510,11 @@ ftl_update_l2p_map:
 	stp	x21, x22, [sp, 32]
 	mov	x22, x0
 	stp	x19, x20, [sp, 16]
-	adrp	x0, .LANCHOR95
+	adrp	x0, .LANCHOR94
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	ldrh	w23, [x0, #:lo12:.LANCHOR95]
+	ldrh	w23, [x0, #:lo12:.LANCHOR94]
 	ldrb	w0, [x22, 9]
 	ldrh	w19, [x22, 12]
 	mul	w23, w23, w0
@@ -22928,37 +23525,37 @@ ftl_update_l2p_map:
 	add	x1, x19, x23, sxtw 2
 	ldr	w1, [x1, -4]
 	cmn	w1, #1
-	beq	.L3613
+	beq	.L3643
 	adrp	x1, .LANCHOR231
 	adrp	x0, .LC0
-	mov	w2, 1990
+	mov	w2, 1998
 	add	x1, x1, :lo12:.LANCHOR231
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3613:
+.L3643:
 	adrp	x27, .LANCHOR131
 	mov	x24, 0
 	add	x0, x27, :lo12:.LANCHOR131
 	mov	w21, 0
 	str	x0, [x29, 96]
-.L3614:
+.L3644:
 	cmp	w24, w23
-	blt	.L3620
-	adrp	x0, .LANCHOR14
-	adrp	x19, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3621
+	blt	.L3650
+	adrp	x0, .LANCHOR19
+	adrp	x19, .LANCHOR11
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L3651
 	ldrh	w1, [x22]
-	ldr	x2, [x19, #:lo12:.LANCHOR9]
+	ldr	x2, [x19, #:lo12:.LANCHOR11]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w3, [x2, x0]
-	adrp	x0, .LC231
+	adrp	x0, .LC234
 	mov	w2, w21
-	add	x0, x0, :lo12:.LC231
+	add	x0, x0, :lo12:.LC234
 	bl	printf
-.L3621:
+.L3651:
 	ldrh	w1, [x22]
-	ldr	x0, [x19, #:lo12:.LANCHOR9]
+	ldr	x0, [x19, #:lo12:.LANCHOR11]
 	ldp	x23, x24, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	strh	w21, [x0, x1, lsl 1]
@@ -22967,38 +23564,38 @@ ftl_update_l2p_map:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L3620:
+.L3650:
 	ldr	w2, [x19, x24, lsl 2]
 	cmn	w2, #1
-	beq	.L3615
+	beq	.L3645
 	ldrb	w20, [x27, #:lo12:.LANCHOR131]
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
 	lsl	w20, w20, 7
 	udiv	w20, w2, w20
 	and	w20, w20, 65535
-	tbz	x0, 12, .L3616
-	adrp	x0, .LC228
+	tbz	x0, 12, .L3646
+	adrp	x0, .LC231
 	mov	w3, w24
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC228
+	add	x0, x0, :lo12:.LC231
 	bl	printf
-.L3616:
+.L3646:
 	adrp	x25, .LANCHOR111
-	adrp	x26, .LC229
+	adrp	x26, .LC232
 	mov	x28, x24
 	add	x25, x25, :lo12:.LANCHOR111
-	add	x26, x26, :lo12:.LC229
-.L3619:
+	add	x26, x26, :lo12:.LC232
+.L3649:
 	ldr	w1, [x19, x28, lsl 2]
 	cmn	w1, #1
-	beq	.L3617
+	beq	.L3647
 	ldr	x0, [x29, 96]
 	ldrb	w2, [x0]
 	lsl	w2, w2, 7
 	udiv	w1, w1, w2
 	cmp	w20, w1, uxth
-	bne	.L3617
+	bne	.L3647
 	ldrb	w0, [x22, 9]
 	sdiv	w1, w28, w0
 	msub	w0, w1, w0, w28
@@ -23010,15 +23607,15 @@ ftl_update_l2p_map:
 	str	w2, [x29, 124]
 	ldr	w1, [x19, x28, lsl 2]
 	bl	pm_ppa_update_check
-	cbz	w0, .L3618
+	cbz	w0, .L3648
 	ldr	x0, [x29, 104]
 	mov	w3, w23
 	mov	w2, 4
 	ldr	x1, [x0, #:lo12:.LANCHOR117]
-	adrp	x0, .LC230
-	add	x0, x0, :lo12:.LC230
+	adrp	x0, .LC233
+	add	x0, x0, :lo12:.LC233
 	bl	rknand_print_hex
-.L3618:
+.L3648:
 	ldr	w0, [x19, x28, lsl 2]
 	add	w21, w21, 1
 	mov	w2, 1
@@ -23027,13 +23624,13 @@ ftl_update_l2p_map:
 	bl	pm_log2phys
 	mov	w0, -1
 	str	w0, [x19, x28, lsl 2]
-.L3617:
+.L3647:
 	add	x28, x28, 1
 	cmp	w23, w28
-	bgt	.L3619
-.L3615:
+	bgt	.L3649
+.L3645:
 	add	x24, x24, 1
-	b	.L3614
+	b	.L3644
 	.size	ftl_update_l2p_map, .-ftl_update_l2p_map
 	.section	.text.ftl_alloc_new_data_sblk,"ax",@progbits
 	.align	2
@@ -23051,36 +23648,36 @@ ftl_alloc_new_data_sblk:
 	ldrh	w0, [x20]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3643
+	beq	.L3673
 	bl	zftl_insert_data_list
-.L3643:
-	adrp	x19, .LANCHOR10
-	ldr	x0, [x19, #:lo12:.LANCHOR10]
+.L3673:
+	adrp	x19, .LANCHOR12
+	ldr	x0, [x19, #:lo12:.LANCHOR12]
 	add	x0, x0, 16
 	cmp	x20, x0
 	mov	x0, x20
 	cset	w1, ne
 	add	w1, w1, 2
 	bl	ftl_open_sblk_init
-	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	ldr	x0, [x19, #:lo12:.LANCHOR12]
 	ldr	w0, [x0, 560]
 	cmp	w0, w21
-	bne	.L3645
+	bne	.L3675
 	mov	w20, 65535
 	cmp	w21, w20
-	beq	.L3645
+	beq	.L3675
 	mov	w1, w21
-	adrp	x0, .LC232
-	add	x0, x0, :lo12:.LC232
+	adrp	x0, .LC235
+	add	x0, x0, :lo12:.LC235
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	ldr	x0, [x19, #:lo12:.LANCHOR12]
 	ldr	w0, [x0, 564]
 	bl	gc_mark_bad_ppa
-	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	ldr	x0, [x19, #:lo12:.LANCHOR12]
 	mov	w1, -1
 	str	w20, [x0, 560]
 	str	w1, [x0, 564]
-.L3645:
+.L3675:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
@@ -23097,56 +23694,56 @@ ftl_alloc_new_data_sblk:
 	.type	ftl_write_commit, %function
 ftl_write_commit:
 	stp	x29, x30, [sp, -160]!
-	adrp	x0, .LANCHOR56
+	adrp	x0, .LANCHOR55
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	add	x24, x0, :lo12:.LANCHOR56
+	add	x24, x0, :lo12:.LANCHOR55
 	add	x0, x24, 1026
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	str	x0, [x29, 104]
-.L3649:
-	adrp	x2, .LANCHOR67
-	ldrb	w1, [x2, #:lo12:.LANCHOR67]
-	cbz	w1, .L3651
-	adrp	x3, .LANCHOR66
-	adrp	x0, .LANCHOR56
-	add	x0, x0, :lo12:.LANCHOR56
+.L3679:
+	adrp	x2, .LANCHOR66
+	ldrb	w1, [x2, #:lo12:.LANCHOR66]
+	cbz	w1, .L3681
+	adrp	x3, .LANCHOR65
+	adrp	x0, .LANCHOR55
+	add	x0, x0, :lo12:.LANCHOR55
 	sub	w1, w1, #1
-	ldrb	w4, [x3, #:lo12:.LANCHOR66]
-	strb	w1, [x2, #:lo12:.LANCHOR67]
-	ubfiz	x28, x4, 6, 8
-	add	x5, x0, x28
-	stp	x4, x5, [x29, 128]
+	ldrb	w4, [x3, #:lo12:.LANCHOR65]
+	strb	w1, [x2, #:lo12:.LANCHOR66]
+	ubfiz	x5, x4, 6, 8
+	add	x5, x0, x5
+	stp	x4, x5, [x29, 120]
 	lsl	x4, x4, 6
 	add	x5, x0, x4
 	ldrb	w0, [x0, x4]
-	strb	w0, [x3, #:lo12:.LANCHOR66]
+	strb	w0, [x3, #:lo12:.LANCHOR65]
 	adrp	x0, .LANCHOR128
 	ldr	w2, [x5, 36]
 	mov	x19, x0
 	ldr	w1, [x0, #:lo12:.LANCHOR128]
 	cmp	w2, w1
-	bcc	.L3653
+	bcc	.L3683
 	adrp	x1, .LANCHOR232
 	adrp	x0, .LC0
 	mov	w2, 604
 	add	x1, x1, :lo12:.LANCHOR232
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3653:
-	ldr	x0, [x29, 128]
+.L3683:
+	ldr	x0, [x29, 120]
 	ldr	w1, [x19, #:lo12:.LANCHOR128]
 	add	x0, x24, x0, lsl 6
 	ldr	w22, [x0, 36]
 	cmp	w22, w1
-	bcc	.L3654
-	ldr	x0, [x29, 136]
+	bcc	.L3684
+	ldr	x0, [x29, 128]
 	bl	zbuf_free
 	mov	w0, -1
-.L3648:
+.L3678:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -23154,25 +23751,25 @@ ftl_write_commit:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L3654:
+.L3684:
 	ldrb	w21, [x0, 57]
 	ldrb	w20, [x0, 56]
 	ldr	x26, [x0, 8]
 	ldr	x23, [x0, 24]
 	adrp	x0, .LANCHOR129
-	str	x0, [x29, 120]
+	str	x0, [x29, 112]
 	ldrb	w1, [x0, #:lo12:.LANCHOR129]
-	cbz	w1, .L3656
-	adrp	x0, .LANCHOR185
-	ldrb	w19, [x0, #:lo12:.LANCHOR185]
+	cbz	w1, .L3686
+	adrp	x0, .LANCHOR182
+	ldrb	w19, [x0, #:lo12:.LANCHOR182]
 	add	x19, x24, x19, lsl 6
-.L3657:
+.L3687:
 	ldrb	w0, [x19]
 	cmp	w0, 255
-	bne	.L3658
+	bne	.L3688
 	ldr	w0, [x19, 36]
 	cmp	w22, w0
-	bne	.L3656
+	bne	.L3686
 	ldr	x0, [x19, 8]
 	ubfiz	x21, x21, 9, 8
 	lsl	w2, w20, 9
@@ -23189,86 +23786,86 @@ ftl_write_commit:
 	add	x2, x2, x0, sxtw 2
 	mov	w0, 2
 	bl	ftl_debug_info_fill
-	ldr	x0, [x29, 136]
+	ldr	x0, [x29, 128]
 	bl	zbuf_free
-	b	.L3649
-.L3658:
+	b	.L3679
+.L3688:
 	ubfiz	x19, x0, 6, 8
 	add	x19, x24, x19
-	b	.L3657
-.L3656:
+	b	.L3687
+.L3686:
 	mov	w0, w22
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 156]
 	cmn	w0, #1
-	bne	.L3660
+	bne	.L3690
 	mov	w2, 0
 	add	x1, x29, 156
 	mov	w0, w22
 	bl	pm_log2phys
-.L3660:
-	adrp	x27, .LANCHOR10
+.L3690:
+	adrp	x27, .LANCHOR12
 	ldr	w2, [x29, 156]
 	add	x0, x24, 2
 	mov	w3, 0
-	ldr	x19, [x27, #:lo12:.LANCHOR10]
+	ldr	x19, [x27, #:lo12:.LANCHOR12]
 	mov	x25, 0
 	add	x19, x19, 16
-.L3662:
+.L3692:
 	ldr	w1, [x0, 34]
 	cmp	w22, w1
-	bne	.L3661
+	bne	.L3691
 	ldrb	w1, [x0]
-	tbz	x1, 3, .L3661
+	tbz	x1, 3, .L3691
 	ldr	w2, [x0, 38]
 	and	w1, w1, -9
 	ldr	x25, [x0, 6]
 	mov	w3, 1
 	strb	w1, [x0]
-.L3661:
+.L3691:
 	ldr	x1, [x29, 104]
 	add	x0, x0, 64
 	cmp	x0, x1
-	bne	.L3662
-	cbz	w3, .L3663
+	bne	.L3692
+	cbz	w3, .L3693
 	str	w2, [x29, 156]
-.L3663:
-	adrp	x0, .LANCHOR131
-	str	x0, [x29, 112]
-	ldrb	w1, [x0, #:lo12:.LANCHOR131]
-	cmp	w20, w1
-	bcs	.L3687
+.L3693:
+	adrp	x28, .LANCHOR131
+	str	x28, [x29, 136]
+	ldrb	w0, [x28, #:lo12:.LANCHOR131]
+	cmp	w20, w0
+	bcs	.L3719
 	add	w20, w21, w20
-	cbz	x25, .L3665
-	cbz	w21, .L3666
+	cbz	x25, .L3695
+	cbz	w21, .L3696
 	lsl	w2, w21, 9
 	mov	x1, x25
 	mov	x0, x26
 	bl	ftl_memcpy
-	ldr	x19, [x27, #:lo12:.LANCHOR10]
+	ldr	x19, [x27, #:lo12:.LANCHOR12]
 	add	x19, x19, 48
-.L3666:
-	ldr	x0, [x29, 112]
+.L3696:
+	ldr	x0, [x29, 136]
 	ldrb	w2, [x0, #:lo12:.LANCHOR131]
 	cmp	w20, w2
-	bcc	.L3667
-	ldr	x19, [x27, #:lo12:.LANCHOR10]
+	bcc	.L3697
+	ldr	x19, [x27, #:lo12:.LANCHOR12]
 	add	x19, x19, 16
-.L3687:
+.L3719:
 	mov	w25, 0
-	b	.L3664
-.L3667:
+	b	.L3694
+.L3697:
 	ubfiz	x0, x20, 9, 9
 	sub	w2, w2, w20
 	add	x1, x25, x0
 	lsl	w2, w2, 9
 	add	x0, x26, x0
 	bl	ftl_memcpy
-	b	.L3687
-.L3665:
+	b	.L3719
+.L3695:
 	ldr	w0, [x29, 156]
 	cmn	w0, #1
-	beq	.L3668
+	beq	.L3698
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 156]
@@ -23276,92 +23873,118 @@ ftl_write_commit:
 	stp	w22, w1, [x0, 36]
 	mov	w1, 1
 	bl	sblk_read_page
+	ldr	x3, [x28, 24]
+	ldr	w0, [x3, 4]
+	ldr	w25, [x3, 12]
+	cmp	w22, w0
+	add	w25, w25, 1
+	bne	.L3699
+	ldr	w0, [x28, 52]
+	cmn	w0, #1
+	bne	.L3700
+.L3699:
+	adrp	x0, .LANCHOR31
+	mov	w6, 1
+	ldr	w1, [x28, 40]
+	ldrb	w2, [x0, #:lo12:.LANCHOR31]
+	mov	w0, 24
+	sub	w0, w0, w2
+	lsl	w6, w6, w2
+	ldr	x2, [x29, 136]
+	sub	w6, w6, #1
+	lsl	w7, w6, w0
+	ldrb	w4, [x2, #:lo12:.LANCHOR131]
+	lsr	w0, w1, w0
+	ldr	x2, [x28, 8]
+	bic	w1, w1, w7
+	and	w0, w0, w6
+	bl	flash_read_page_en
+	str	w0, [x28, 52]
+.L3700:
 	ldr	x0, [x28, 24]
-	ldr	w25, [x0, 12]
 	ldr	w0, [x0, 4]
-	add	w25, w25, 1
 	cmp	w22, w0
-	bne	.L3669
+	bne	.L3701
 	ldr	w0, [x28, 52]
 	cmn	w0, #1
-	bne	.L3670
-.L3669:
-	ldr	x1, [x27, #:lo12:.LANCHOR10]
+	bne	.L3702
+.L3701:
+	ldr	x1, [x27, #:lo12:.LANCHOR12]
 	mov	w3, w22
 	ldr	w4, [x28, 52]
 	ldr	w2, [x29, 156]
 	ldr	w0, [x1, 552]
 	add	w0, w0, 1
 	str	w0, [x1, 552]
-	adrp	x0, .LC233
-	add	x0, x0, :lo12:.LC233
+	adrp	x0, .LC236
+	add	x0, x0, :lo12:.LC236
 	ldrb	w1, [x28, 1]
 	bl	printf
 	ldr	x1, [x28, 24]
 	mov	w3, 4
-	adrp	x0, .LC205
+	adrp	x0, .LC208
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC205
+	add	x0, x0, :lo12:.LC208
 	bl	rknand_print_hex
-.L3670:
+.L3702:
 	ldr	x0, [x28, 24]
 	ldr	w0, [x0, 4]
 	cmp	w22, w0
-	bne	.L3671
+	bne	.L3703
 	ldr	w0, [x28, 52]
 	cmn	w0, #1
-	bne	.L3672
-.L3671:
+	bne	.L3704
+.L3703:
 	adrp	x1, .LANCHOR232
 	adrp	x0, .LC0
-	mov	w2, 691
+	mov	w2, 696
 	add	x1, x1, :lo12:.LANCHOR232
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3672:
-	cbz	w21, .L3673
+.L3704:
+	cbz	w21, .L3705
 	ldr	w0, [x29, 156]
 	lsl	w2, w21, 9
 	cmn	w0, #1
-	beq	.L3674
+	beq	.L3706
 	ldr	x1, [x28, 8]
 	mov	x0, x26
 	bl	ftl_memcpy
-.L3675:
-	ldr	x19, [x27, #:lo12:.LANCHOR10]
+.L3707:
+	ldr	x19, [x27, #:lo12:.LANCHOR12]
 	add	x19, x19, 48
-.L3673:
-	ldr	x0, [x29, 112]
+.L3705:
+	ldr	x0, [x29, 136]
 	ldrb	w2, [x0, #:lo12:.LANCHOR131]
 	cmp	w20, w2
-	bcc	.L3676
-	bls	.L3677
-	ldr	x19, [x27, #:lo12:.LANCHOR10]
+	bcc	.L3708
+	bls	.L3709
+	ldr	x19, [x27, #:lo12:.LANCHOR12]
 	add	x19, x19, 16
-.L3677:
-	cbz	x28, .L3664
+.L3709:
+	cbz	x28, .L3694
 	ldrb	w0, [x28, 2]
 	mov	x1, x28
 	and	w0, w0, -9
 	strb	w0, [x28, 2]
-	adrp	x0, .LANCHOR63
-	add	x0, x0, :lo12:.LANCHOR63
+	adrp	x0, .LANCHOR62
+	add	x0, x0, :lo12:.LANCHOR62
 	bl	buf_remove_buf
 	mov	x0, x28
 	bl	zbuf_free
-.L3664:
+.L3694:
 	ldrh	w0, [x19, 6]
-	cbnz	w0, .L3679
+	cbnz	w0, .L3711
 	bl	ftl_flush
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L3679:
+.L3711:
 	mov	x0, x19
 	bl	ftl_get_new_free_page
 	mov	w10, w0
-	ldr	x0, [x29, 128]
+	ldr	x0, [x29, 120]
 	mov	x1, x23
-	adrp	x20, .LANCHOR185
+	adrp	x20, .LANCHOR182
 	lsl	x8, x0, 6
 	add	x7, x24, x8
 	ldr	w0, [x7, 32]
@@ -23369,7 +23992,7 @@ ftl_write_commit:
 	str	w25, [x23, 12]
 	ldr	w0, [x29, 156]
 	str	w0, [x23, 8]
-	ldr	x0, [x29, 112]
+	ldr	x0, [x29, 136]
 	str	wzr, [x1, 16]!
 	ldrb	w2, [x0, #:lo12:.LANCHOR131]
 	mov	w0, 2
@@ -23388,12 +24011,12 @@ ftl_write_commit:
 	strb	w0, [x7, 2]
 	ldrh	w0, [x19, 10]
 	add	w0, w0, w1
-	ldr	x1, [x29, 136]
+	ldr	x1, [x29, 128]
 	sub	w0, w0, #1
 	strh	w0, [x7, 48]
-	add	x0, x20, :lo12:.LANCHOR185
+	add	x0, x20, :lo12:.LANCHOR182
 	bl	buf_add_tail
-	ldr	x0, [x29, 120]
+	ldr	x0, [x29, 112]
 	ldrb	w2, [x0, #:lo12:.LANCHOR129]
 	add	w2, w2, 1
 	and	w2, w2, 255
@@ -23402,24 +24025,24 @@ ftl_write_commit:
 	cmp	w2, 2
 	str	wzr, [x0, #:lo12:.LANCHOR233]
 	ldrh	w0, [x19, 6]
-	bhi	.L3680
+	bhi	.L3712
 	cmp	w0, 1
-	bne	.L3652
-.L3680:
+	bne	.L3682
+.L3712:
 	ldrb	w1, [x19, 5]
 	cmp	w1, 0
 	mov	w1, 0
 	cset	w4, ne
 	cmp	w0, 1
-	ldrb	w0, [x20, #:lo12:.LANCHOR185]
+	ldrb	w0, [x20, #:lo12:.LANCHOR182]
 	csinc	w4, w2, w4, eq
 	mov	w3, w0
-.L3684:
+.L3716:
 	cmp	w1, w4
-	bne	.L3685
-	strb	w3, [x20, #:lo12:.LANCHOR185]
+	bne	.L3717
+	strb	w3, [x20, #:lo12:.LANCHOR182]
 	and	w1, w1, 255
-	ldr	x3, [x29, 120]
+	ldr	x3, [x29, 112]
 	sub	w2, w2, w1
 	ubfiz	x0, x0, 6, 8
 	add	x0, x24, x0
@@ -23427,58 +24050,58 @@ ftl_write_commit:
 	bl	sblk_prog_page
 	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bne	.L3652
+	bne	.L3682
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	mov	x0, x19
 	bl	ftl_write_last_log_page
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L3652:
-	adrp	x0, .LANCHOR67
-	ldrb	w0, [x0, #:lo12:.LANCHOR67]
-	cbnz	w0, .L3649
-.L3651:
+.L3682:
+	adrp	x0, .LANCHOR66
+	ldrb	w0, [x0, #:lo12:.LANCHOR66]
+	cbnz	w0, .L3679
+.L3681:
 	bl	ftl_write_completed
 	mov	w0, 0
-	b	.L3648
-.L3676:
+	b	.L3678
+.L3708:
 	ldr	w0, [x29, 156]
 	sub	w2, w2, w20
 	lsl	w2, w2, 9
 	cmn	w0, #1
 	ubfiz	x0, x20, 7, 9
-	beq	.L3678
+	beq	.L3710
 	ldr	x1, [x28, 8]
 	lsl	x0, x0, 2
 	add	x1, x1, x0
 	add	x0, x26, x0
 	bl	ftl_memcpy
-	b	.L3677
-.L3678:
+	b	.L3709
+.L3710:
 	mov	w1, 0
 	add	x0, x26, x0, lsl 2
 	bl	ftl_memset
-	b	.L3677
-.L3685:
+	b	.L3709
+.L3717:
 	ubfiz	x3, x3, 6, 8
 	add	w1, w1, 1
 	ldrb	w3, [x24, x3]
-	b	.L3684
-.L3686:
+	b	.L3716
+.L3718:
 	lsl	w2, w21, 9
 	mov	x28, 0
 	mov	w25, 0
-.L3674:
+.L3706:
 	mov	w1, 0
 	mov	x0, x26
 	bl	ftl_memset
-	b	.L3675
-.L3668:
-	cbnz	w21, .L3686
+	b	.L3707
+.L3698:
+	cbnz	w21, .L3718
 	mov	w25, 0
 	mov	x28, 0
-	b	.L3673
+	b	.L3705
 	.size	ftl_write_commit, .-ftl_write_commit
 	.section	.text.gc_do_copy_back,"ax",@progbits
 	.align	2
@@ -23486,20 +24109,20 @@ ftl_write_commit:
 	.type	gc_do_copy_back, %function
 gc_do_copy_back:
 	stp	x29, x30, [sp, -224]!
-	adrp	x0, .LANCHOR85
+	adrp	x0, .LANCHOR84
 	add	x29, sp, 0
-	ldrb	w0, [x0, #:lo12:.LANCHOR85]
+	ldrb	w0, [x0, #:lo12:.LANCHOR84]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w0, .L3713
+	cbnz	w0, .L3745
 	bl	buf_alloc
 	mov	x19, x0
-	cbz	x0, .L3712
-	adrp	x21, .LANCHOR71
-	add	x3, x21, :lo12:.LANCHOR71
+	cbz	x0, .L3744
+	adrp	x21, .LANCHOR70
+	add	x3, x21, :lo12:.LANCHOR70
 	ldrh	w2, [x3, 26]
 	mov	w0, w2
 	bl	gc_get_src_ppa_from_index
@@ -23513,52 +24136,52 @@ gc_do_copy_back:
 	ldr	w0, [x19, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3715
+	bne	.L3747
 	adrp	x1, .LANCHOR234
 	adrp	x0, .LC0
 	mov	w2, 1032
 	add	x1, x1, :lo12:.LANCHOR234
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3715:
+.L3747:
 	ldr	x0, [x19, 24]
 	ldr	w20, [x0, 4]
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 176]
 	cmn	w0, #1
-	bne	.L3716
+	bne	.L3748
 	mov	w2, 0
 	add	x1, x29, 176
 	mov	w0, w20
 	bl	pm_log2phys
-.L3716:
+.L3748:
 	ldr	w23, [x29, 176]
 	cmp	w22, w23
-	bne	.L3717
-	adrp	x0, .LANCHOR56
-	add	x0, x0, :lo12:.LANCHOR56
+	bne	.L3749
+	adrp	x0, .LANCHOR55
+	add	x0, x0, :lo12:.LANCHOR55
 	add	x1, x0, 2
 	add	x0, x0, 1026
-.L3720:
+.L3752:
 	ldr	w2, [x1, 34]
 	cmp	w20, w2
-	bne	.L3718
+	bne	.L3750
 	ldrb	w2, [x1]
-	tbz	x2, 1, .L3718
+	tbz	x2, 1, .L3750
 	mov	x0, x19
 	bl	zbuf_free
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3712
-	add	x21, x21, :lo12:.LANCHOR71
-	adrp	x0, .LC234
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 8, .L3744
+	add	x21, x21, :lo12:.LANCHOR70
+	adrp	x0, .LC237
 	mov	w2, w22
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC234
+	add	x0, x0, :lo12:.LC237
 	ldrh	w3, [x21, 26]
 	bl	printf
-.L3712:
+.L3744:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -23566,10 +24189,10 @@ gc_do_copy_back:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 224
 	ret
-.L3718:
+.L3750:
 	add	x1, x1, 64
 	cmp	x1, x0
-	bne	.L3720
+	bne	.L3752
 	adrp	x0, .LANCHOR131
 	strb	wzr, [x19, 57]
 	str	w20, [x19, 36]
@@ -23579,25 +24202,25 @@ gc_do_copy_back:
 	ldr	w1, [x0]
 	str	w1, [x19, 32]
 	str	wzr, [x0, 16]
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3721
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 8, .L3753
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
-	add	x1, x21, :lo12:.LANCHOR71
+	add	x1, x21, :lo12:.LANCHOR70
 	mov	w3, w0
 	mov	w4, w22
-	adrp	x0, .LC235
+	adrp	x0, .LC238
 	mov	w2, w23
-	add	x0, x0, :lo12:.LC235
+	add	x0, x0, :lo12:.LC238
 	ldrh	w5, [x1, 26]
 	mov	w1, w20
 	bl	printf
-.L3721:
+.L3753:
 	mov	x0, x19
 	bl	ftl_gc_write_buf
 	bl	ftl_write_commit
-	add	x21, x21, :lo12:.LANCHOR71
+	add	x21, x21, :lo12:.LANCHOR70
 	adrp	x0, .LANCHOR110
 	ldr	x1, [x0, #:lo12:.LANCHOR110]
 	ldr	w0, [x1, 60]
@@ -23606,74 +24229,74 @@ gc_do_copy_back:
 	ldrh	w0, [x21, 28]
 	add	w0, w0, 1
 	strh	w0, [x21, 28]
-	b	.L3712
-.L3717:
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3722
-	add	x21, x21, :lo12:.LANCHOR71
+	b	.L3744
+.L3749:
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 8, .L3754
+	add	x21, x21, :lo12:.LANCHOR70
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	mov	w3, w0
 	mov	w4, w22
-	adrp	x0, .LC235
+	adrp	x0, .LC238
 	ldrh	w5, [x21, 26]
 	mov	w2, w23
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC235
+	add	x0, x0, :lo12:.LC238
 	bl	printf
-.L3722:
+.L3754:
 	mov	x0, x19
 	bl	zbuf_free
-	b	.L3712
-.L3713:
-	adrp	x2, .LANCHOR10
-	adrp	x1, .LANCHOR80
+	b	.L3744
+.L3745:
+	adrp	x2, .LANCHOR12
+	adrp	x1, .LANCHOR79
 	stp	x1, x2, [x29, 136]
-	ldr	x26, [x2, #:lo12:.LANCHOR10]
-	ldrb	w3, [x1, #:lo12:.LANCHOR80]
+	ldr	x26, [x2, #:lo12:.LANCHOR12]
+	ldrb	w3, [x1, #:lo12:.LANCHOR79]
 	add	x26, x26, 80
 	ldrb	w0, [x26, 9]
 	and	w20, w0, 65535
 	cmp	w3, w20
-	bhi	.L3777
+	bhi	.L3809
 	cmp	w20, 2
 	mov	w21, 2
 	csel	w21, w20, w21, ls
 	and	w21, w21, 65535
-.L3723:
-	adrp	x1, .LANCHOR79
+.L3755:
+	adrp	x1, .LANCHOR78
 	str	x1, [x29, 120]
-	ldrb	w19, [x1, #:lo12:.LANCHOR79]
+	ldrb	w19, [x1, #:lo12:.LANCHOR78]
 	cmp	w19, 3
-	bne	.L3724
-	adrp	x1, .LANCHOR36
-	ldrb	w1, [x1, #:lo12:.LANCHOR36]
-	cbz	w1, .L3725
-	adrp	x1, .LANCHOR71
-	add	x1, x1, :lo12:.LANCHOR71
+	bne	.L3756
+	adrp	x1, .LANCHOR35
+	ldrb	w1, [x1, #:lo12:.LANCHOR35]
+	cbz	w1, .L3757
+	adrp	x1, .LANCHOR70
+	add	x1, x1, :lo12:.LANCHOR70
 	ldrh	w22, [x1, 2106]
 	adrp	x1, .LANCHOR124
 	ldrb	w1, [x1, #:lo12:.LANCHOR124]
 	sdiv	w2, w22, w0
 	and	w25, w2, 65535
-	cbz	w1, .L3726
+	cbz	w1, .L3758
 	adrp	x1, .LANCHOR235
 	add	x1, x1, :lo12:.LANCHOR235
 	ldrh	w1, [x1, w2, sxtw 1]
 	cmp	w1, 0
 	cset	w19, ne
-.L3844:
+.L3876:
 	add	w19, w19, 1
-.L3727:
+.L3759:
 	msub	w20, w20, w25, w22
 	and	w20, w20, 65535
-.L3728:
-	adrp	x1, .LANCHOR86
+.L3760:
+	adrp	x1, .LANCHOR85
 	mul	w11, w19, w21
 	adrp	x10, .LANCHOR235
 	sxtw	x13, w25
-	ldrh	w5, [x1, #:lo12:.LANCHOR86]
+	ldrh	w5, [x1, #:lo12:.LANCHOR85]
 	adrp	x1, .LANCHOR224
 	add	x10, x10, :lo12:.LANCHOR235
 	mov	w2, 0
@@ -23682,58 +24305,58 @@ gc_do_copy_back:
 	sub	w5, w0, w5
 	adrp	x0, .LANCHOR124
 	ldrb	w12, [x0, #:lo12:.LANCHOR124]
-	adrp	x0, .LANCHOR163
-	ldr	x8, [x0, #:lo12:.LANCHOR163]
-	adrp	x0, .LANCHOR71
-	add	x6, x0, :lo12:.LANCHOR71
+	adrp	x0, .LANCHOR160
+	ldr	x8, [x0, #:lo12:.LANCHOR160]
+	adrp	x0, .LANCHOR70
+	add	x6, x0, :lo12:.LANCHOR70
 	ldrh	w14, [x6, 24]
-.L3732:
+.L3764:
 	cmp	w2, w11
-	bge	.L3785
+	bge	.L3817
 	add	w4, w22, w2
 	cmp	w4, w5
-	blt	.L3733
-	cbz	w12, .L3785
+	blt	.L3765
+	cbz	w12, .L3817
 	ldrh	w0, [x10, x13, lsl 1]
 	cmp	w0, w25
-	bcc	.L3734
-.L3785:
+	bcc	.L3766
+.L3817:
 	mov	w23, 1
-	b	.L3730
-.L3777:
+	b	.L3762
+.L3809:
 	mov	w21, 1
-	b	.L3723
-.L3726:
+	b	.L3755
+.L3758:
 	adrp	x1, .LANCHOR217
 	ldrb	w1, [x1, #:lo12:.LANCHOR217]
-	cbz	w1, .L3779
+	cbz	w1, .L3811
 	sub	w1, w25, #62
 	and	w1, w1, 65535
 	cmp	w1, 2159
-	bhi	.L3780
+	bhi	.L3812
 	udiv	w19, w25, w19
 	add	w19, w19, w19, lsl 1
 	sub	w19, w25, w19
 	and	w19, w19, 65535
 	cmp	w19, 0
 	cset	w19, eq
-	b	.L3844
-.L3779:
+	b	.L3876
+.L3811:
 	mov	w19, 1
-	b	.L3727
-.L3780:
+	b	.L3759
+.L3812:
 	mov	w19, 2
-	b	.L3727
-.L3725:
-	adrp	x1, .LANCHOR84
-	ldrb	w1, [x1, #:lo12:.LANCHOR84]
-	cbz	w1, .L3729
-	adrp	x1, .LANCHOR71
-	add	x1, x1, :lo12:.LANCHOR71
+	b	.L3759
+.L3757:
+	adrp	x1, .LANCHOR83
+	ldrb	w1, [x1, #:lo12:.LANCHOR83]
+	cbz	w1, .L3761
+	adrp	x1, .LANCHOR70
+	add	x1, x1, :lo12:.LANCHOR70
 	add	w20, w0, w0, lsl 1
 	ldrh	w22, [x1, 2106]
-	adrp	x1, .LANCHOR37
-	ldrb	w1, [x1, #:lo12:.LANCHOR37]
+	adrp	x1, .LANCHOR36
+	ldrb	w1, [x1, #:lo12:.LANCHOR36]
 	sdiv	w20, w22, w20
 	and	w25, w20, 65535
 	mul	w20, w0, w20
@@ -23741,13 +24364,13 @@ gc_do_copy_back:
 	add	w20, w20, w22
 	sdiv	w20, w20, w19
 	and	w20, w20, 65535
-	cbz	w1, .L3728
+	cbz	w1, .L3760
 	add	w3, w25, w25, lsl 1
 	and	w25, w3, 65535
-	b	.L3728
-.L3729:
-	adrp	x1, .LANCHOR71
-	add	x1, x1, :lo12:.LANCHOR71
+	b	.L3760
+.L3761:
+	adrp	x1, .LANCHOR70
+	add	x1, x1, :lo12:.LANCHOR70
 	adrp	x2, .LANCHOR236
 	add	x2, x2, :lo12:.LANCHOR236
 	ldrh	w4, [x1, 2106]
@@ -23761,8 +24384,8 @@ gc_do_copy_back:
 	madd	w22, w25, w0, w20
 	add	w22, w22, w22, lsl 1
 	and	w22, w22, 65535
-	beq	.L3728
-.L3730:
+	beq	.L3760
+.L3762:
 	mul	w0, w19, w21
 	stp	wzr, w0, [x29, 152]
 	ubfiz	w0, w21, 1, 15
@@ -23772,104 +24395,104 @@ gc_do_copy_back:
 	str	w0, [x29, 128]
 	ldrh	w0, [x29, 128]
 	str	x0, [x29, 112]
-	adrp	x0, .LANCHOR56
-	add	x0, x0, :lo12:.LANCHOR56
+	adrp	x0, .LANCHOR55
+	add	x0, x0, :lo12:.LANCHOR55
 	str	x0, [x29, 104]
-.L3735:
+.L3767:
 	ldp	w0, w1, [x29, 152]
 	ldrh	w24, [x29, 152]
 	and	w0, w0, 65535
 	str	w0, [x29, 168]
 	cmp	w0, w1
-	blt	.L3759
+	blt	.L3791
 	ldr	x0, [x29, 120]
-	ldrb	w0, [x0, #:lo12:.LANCHOR79]
+	ldrb	w0, [x0, #:lo12:.LANCHOR78]
 	cmp	w0, 3
 	add	x0, x29, 176
-	bne	.L3760
-	adrp	x1, .LANCHOR36
-	ldrb	w1, [x1, #:lo12:.LANCHOR36]
-	cbz	w1, .L3761
+	bne	.L3792
+	adrp	x1, .LANCHOR35
+	ldrb	w1, [x1, #:lo12:.LANCHOR35]
+	cbz	w1, .L3793
 	ldr	w2, [x29, 156]
 	mov	w1, 0
 	sub	w2, w2, #1
-.L3762:
+.L3794:
 	cmp	w1, w2
-	blt	.L3763
-.L3848:
+	blt	.L3795
+.L3880:
 	ldr	x0, [x0, w2, sxtw 3]
 	mov	w1, -1
 	strb	w1, [x0]
 	mul	w1, w21, w19
 	ldr	x0, [x29, 176]
 	bl	sblk_prog_page
-	b	.L3764
-.L3724:
-	adrp	x1, .LANCHOR81
-	ldrb	w1, [x1, #:lo12:.LANCHOR81]
-	cbnz	w1, .L3731
-	adrp	x1, .LANCHOR71
-	add	x1, x1, :lo12:.LANCHOR71
+	b	.L3796
+.L3756:
+	adrp	x1, .LANCHOR80
+	ldrb	w1, [x1, #:lo12:.LANCHOR80]
+	cbnz	w1, .L3763
+	adrp	x1, .LANCHOR70
+	add	x1, x1, :lo12:.LANCHOR70
 	mov	w19, 1
 	ldrh	w22, [x1, 2106]
 	sdiv	w25, w22, w0
 	msub	w20, w20, w25, w22
 	and	w20, w20, 65535
-	b	.L3728
-.L3731:
-	adrp	x1, .LANCHOR71
-	add	x1, x1, :lo12:.LANCHOR71
+	b	.L3760
+.L3763:
+	adrp	x1, .LANCHOR70
+	add	x1, x1, :lo12:.LANCHOR70
 	mov	w19, 2
 	ldrh	w22, [x1, 2106]
 	sdiv	w25, w22, w0
 	msub	w20, w20, w25, w22
 	and	w20, w20, 65535
-	b	.L3728
-.L3734:
-	tbz	x2, 0, .L3785
-.L3733:
+	b	.L3760
+.L3766:
+	tbz	x2, 0, .L3817
+.L3765:
 	sbfiz	x4, x4, 2, 32
 	ldr	w0, [x8, x4]
 	cmn	w0, #1
-	bne	.L3736
+	bne	.L3768
 	ldrh	w7, [x6, 26]
 	cmp	w7, w14
-	bcs	.L3712
-	cbz	w12, .L3737
+	bcs	.L3744
+	cbz	w12, .L3769
 	ldrh	w0, [x10, x13, lsl 1]
 	cmp	w0, w25
-	bcs	.L3737
-	tbz	x2, 0, .L3737
+	bcs	.L3769
+	tbz	x2, 0, .L3769
 	ubfiz	x0, x0, 2, 16
 	ldr	w0, [x8, x0]
-.L3845:
+.L3877:
 	str	w0, [x8, x4]
-.L3736:
+.L3768:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-	b	.L3732
-.L3737:
+	b	.L3764
+.L3769:
 	mov	w0, w7
 	bl	gc_get_src_ppa_from_index
 	add	w7, w7, 1
 	strh	w7, [x6, 26]
-	b	.L3845
-.L3759:
+	b	.L3877
+.L3791:
 	ldr	w0, [x29, 168]
 	add	w0, w22, w0
 	str	w0, [x29, 172]
 	sxtw	x0, w0
 	str	x0, [x29, 160]
-	adrp	x0, .LANCHOR83
+	adrp	x0, .LANCHOR82
 	ldr	x1, [x29, 160]
-	ldr	x0, [x0, #:lo12:.LANCHOR83]
+	ldr	x0, [x0, #:lo12:.LANCHOR82]
 	ldrb	w0, [x0, x1]
 	cmp	w0, 255
-	bne	.L3739
+	bne	.L3771
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x27, x0
-	cbnz	x0, .L3740
+	cbnz	x0, .L3772
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	bl	gc_write_completed
@@ -23877,51 +24500,51 @@ gc_do_copy_back:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x27, x0
-	cbz	x0, .L3712
-.L3740:
-	adrp	x0, .LANCHOR83
+	cbz	x0, .L3744
+.L3772:
+	adrp	x0, .LANCHOR82
 	ldr	x2, [x29, 160]
 	ldrb	w1, [x27, 1]
-	ldr	x0, [x0, #:lo12:.LANCHOR83]
+	ldr	x0, [x0, #:lo12:.LANCHOR82]
 	strb	w1, [x0, x2]
-	adrp	x0, .LANCHOR71
-	add	x1, x0, :lo12:.LANCHOR71
+	adrp	x0, .LANCHOR70
+	add	x1, x0, :lo12:.LANCHOR70
 	strb	w23, [x27, 61]
 	ldrb	w0, [x1, 7]
 	add	w0, w0, 1
 	strb	w0, [x1, 7]
 	add	w0, w24, w22
 	strh	w0, [x27, 48]
-	adrp	x0, .LANCHOR86
+	adrp	x0, .LANCHOR85
 	ldr	w1, [x29, 172]
-	ldrh	w6, [x0, #:lo12:.LANCHOR86]
+	ldrh	w6, [x0, #:lo12:.LANCHOR85]
 	adrp	x0, .LANCHOR224
 	ldrb	w5, [x0, #:lo12:.LANCHOR224]
 	ldrb	w0, [x26, 9]
 	mul	w0, w0, w6
 	sub	w0, w0, w5
 	cmp	w1, w0
-	blt	.L3741
+	blt	.L3773
 	adrp	x1, .LANCHOR124
 	ldrb	w1, [x1, #:lo12:.LANCHOR124]
-	cbz	w1, .L3742
+	cbz	w1, .L3774
 	adrp	x1, .LANCHOR235
 	add	x1, x1, :lo12:.LANCHOR235
 	ldrh	w1, [x1, w25, sxtw 1]
 	cmp	w1, w25
-	bcs	.L3742
-	tbnz	x24, 0, .L3741
-.L3742:
-	adrp	x1, .LANCHOR162
+	bcs	.L3774
+	tbnz	x24, 0, .L3773
+.L3774:
+	adrp	x1, .LANCHOR159
 	ldr	w3, [x29, 172]
 	mov	w2, -1
 	cmp	w5, 2
-	ldr	x1, [x1, #:lo12:.LANCHOR162]
+	ldr	x1, [x1, #:lo12:.LANCHOR159]
 	str	w2, [x1, w3, sxtw 2]
-	bne	.L3743
+	bne	.L3775
 	cmp	w3, w0
 	adrp	x28, .LANCHOR221
-	bne	.L3744
+	bne	.L3776
 	ldrh	w2, [x28, #:lo12:.LANCHOR221]
 	ldr	x0, [x27, 8]
 	bl	ftl_memcpy
@@ -23940,21 +24563,21 @@ gc_do_copy_back:
 	bl	js_hash
 	str	w0, [x6, 4]
 	ldr	x0, [x29, 144]
-	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	ldr	x0, [x0, #:lo12:.LANCHOR12]
 	ldr	w0, [x0, 132]
 	stp	w0, wzr, [x6, 8]
-.L3745:
+.L3777:
 	ldr	x0, [x27, 24]
 	str	wzr, [x0, 16]
-.L3739:
-	adrp	x0, .LANCHOR83
+.L3771:
+	adrp	x0, .LANCHOR82
 	ldrsw	x2, [x29, 168]
 	add	x4, x29, 176
-	ldr	x1, [x0, #:lo12:.LANCHOR83]
+	ldr	x1, [x0, #:lo12:.LANCHOR82]
 	ldr	x0, [x29, 160]
 	ldrb	w5, [x1, x0]
-	adrp	x0, .LANCHOR56
-	add	x6, x0, :lo12:.LANCHOR56
+	adrp	x0, .LANCHOR55
+	add	x6, x0, :lo12:.LANCHOR55
 	mov	x7, x5
 	ubfiz	x0, x5, 6, 8
 	add	x0, x6, x0
@@ -23964,27 +24587,27 @@ gc_do_copy_back:
 	strh	w0, [x6, 50]
 	ldr	x0, [x29, 120]
 	strb	w23, [x6, 61]
-	ldrb	w0, [x0, #:lo12:.LANCHOR79]
+	ldrb	w0, [x0, #:lo12:.LANCHOR78]
 	cmp	w0, 3
-	bne	.L3750
-	adrp	x8, .LANCHOR36
-	ldrb	w8, [x8, #:lo12:.LANCHOR36]
-	cbz	w8, .L3751
+	bne	.L3782
+	adrp	x8, .LANCHOR35
+	ldrb	w8, [x8, #:lo12:.LANCHOR35]
+	cbz	w8, .L3783
 	adrp	x0, .LANCHOR124
 	and	w8, w24, 1
 	add	w10, w8, w25
 	ldrb	w0, [x0, #:lo12:.LANCHOR124]
-	cbz	w0, .L3752
+	cbz	w0, .L3784
 	adrp	x6, .LANCHOR235
 	add	x6, x6, :lo12:.LANCHOR235
 	ldrh	w6, [x6, w25, sxtw 1]
 	cmp	w6, w25
-	bcs	.L3752
+	bcs	.L3784
 	cmp	w8, 0
 	csel	w10, w10, w6, eq
-.L3752:
-	adrp	x0, .LANCHOR56
-	add	x6, x0, :lo12:.LANCHOR56
+.L3784:
+	adrp	x0, .LANCHOR55
+	add	x6, x0, :lo12:.LANCHOR55
 	add	x5, x6, x5, lsl 6
 	udiv	w6, w24, w19
 	add	w6, w6, w20
@@ -23995,21 +24618,21 @@ gc_do_copy_back:
 	madd	w0, w0, w6, w10
 	orr	w0, w0, 50331648
 	str	w0, [x5, 40]
-.L3757:
-	adrp	x0, .LANCHOR56
+.L3789:
+	adrp	x0, .LANCHOR55
 	sbfiz	x7, x7, 6, 32
-	add	x0, x0, :lo12:.LANCHOR56
+	add	x0, x0, :lo12:.LANCHOR55
 	add	x0, x0, x7
 	ldrh	w5, [x0, 48]
 	ldr	w6, [x0, 40]
-	adrp	x0, .LANCHOR164
-	ldr	x0, [x0, #:lo12:.LANCHOR164]
+	adrp	x0, .LANCHOR161
+	ldr	x0, [x0, #:lo12:.LANCHOR161]
 	str	w6, [x0, x5, lsl 2]
-	b	.L3776
-.L3744:
+	b	.L3808
+.L3776:
 	ldr	x2, [x29, 136]
 	ldrh	w0, [x28, #:lo12:.LANCHOR221]
-	ldrb	w28, [x2, #:lo12:.LANCHOR80]
+	ldrb	w28, [x2, #:lo12:.LANCHOR79]
 	mul	w28, w28, w6
 	lsl	w28, w28, 2
 	sub	w28, w28, w0
@@ -24033,36 +24656,36 @@ gc_do_copy_back:
 	bl	js_hash
 	str	w0, [x6, 4]
 	ldr	x0, [x29, 144]
-	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	ldr	x0, [x0, #:lo12:.LANCHOR12]
 	ldr	w0, [x0, 132]
 	str	w0, [x6, 8]
 	mov	w0, 1
 	str	w0, [x6, 12]
-	b	.L3745
-.L3743:
+	b	.L3777
+.L3775:
 	ldr	x0, [x29, 136]
-	ldrb	w2, [x0, #:lo12:.LANCHOR80]
+	ldrb	w2, [x0, #:lo12:.LANCHOR79]
 	ldr	x0, [x27, 8]
 	mul	w2, w2, w6
 	lsl	w2, w2, 2
 	bl	ftl_memcpy
 	ldr	x1, [x29, 136]
-	adrp	x0, .LANCHOR86
-	ldrh	w0, [x0, #:lo12:.LANCHOR86]
-	ldrb	w1, [x1, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR85
+	ldrh	w0, [x0, #:lo12:.LANCHOR85]
+	ldrb	w1, [x1, #:lo12:.LANCHOR79]
 	mul	w0, w0, w1
 	adrp	x1, .LANCHOR131
 	ldrb	w1, [x1, #:lo12:.LANCHOR131]
 	lsl	w2, w0, 2
 	cmp	w1, w0, lsr 6
-	bge	.L3746
+	bge	.L3778
 	adrp	x1, .LANCHOR221
 	ldrh	w1, [x1, #:lo12:.LANCHOR221]
 	sub	w2, w1, w2
-.L3746:
-	adrp	x1, .LANCHOR163
+.L3778:
+	adrp	x1, .LANCHOR160
 	ldr	x5, [x27, 8]
-	ldr	x1, [x1, #:lo12:.LANCHOR163]
+	ldr	x1, [x1, #:lo12:.LANCHOR160]
 	add	x0, x5, x0, sxtw 2
 	bl	ftl_memcpy
 	adrp	x0, .LANCHOR131
@@ -24075,38 +24698,38 @@ gc_do_copy_back:
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	str	w0, [x6]
-	adrp	x0, .LANCHOR86
-	ldrh	w1, [x0, #:lo12:.LANCHOR86]
+	adrp	x0, .LANCHOR85
+	ldrh	w1, [x0, #:lo12:.LANCHOR85]
 	ldr	x0, [x29, 136]
-	ldrb	w0, [x0, #:lo12:.LANCHOR80]
+	ldrb	w0, [x0, #:lo12:.LANCHOR79]
 	mul	w1, w1, w0
 	ldr	x0, [x27, 8]
 	lsl	w1, w1, 2
 	bl	js_hash
 	str	w0, [x6, 4]
 	ldr	x0, [x29, 144]
-	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	ldr	x0, [x0, #:lo12:.LANCHOR12]
 	ldr	w0, [x0, 132]
 	str	w0, [x6, 8]
-	b	.L3745
-.L3741:
+	b	.L3777
+.L3773:
 	ldr	x0, [x29, 160]
 	mov	w1, 1
 	lsl	x28, x0, 2
-	adrp	x0, .LANCHOR163
-	ldr	x0, [x0, #:lo12:.LANCHOR163]
+	adrp	x0, .LANCHOR160
+	ldr	x0, [x0, #:lo12:.LANCHOR160]
 	ldr	w0, [x0, x28]
 	str	w0, [x27, 40]
 	mov	x0, x27
 	bl	sblk_read_page
 	ldr	w0, [x27, 52]
 	cmp	w0, 512
-	ccmn	w0, #1, 4, ne
-	bne	.L3748
-	adrp	x0, .LANCHOR75
-	ldrh	w2, [x0, #:lo12:.LANCHOR75]
-	adrp	x0, .LANCHOR32
-	ldrb	w1, [x0, #:lo12:.LANCHOR32]
+	ccmn	w0, #1, 4, ne
+	bne	.L3780
+	adrp	x0, .LANCHOR74
+	ldrh	w2, [x0, #:lo12:.LANCHOR74]
+	adrp	x0, .LANCHOR31
+	ldrb	w1, [x0, #:lo12:.LANCHOR31]
 	mov	w0, 24
 	sub	w0, w0, w1
 	sub	w1, w0, w2
@@ -24116,50 +24739,50 @@ gc_do_copy_back:
 	sub	w0, w0, #1
 	lsr	w1, w1, w2
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR76
-	ldrb	w2, [x1, #:lo12:.LANCHOR76]
+	adrp	x1, .LANCHOR75
+	ldrb	w2, [x1, #:lo12:.LANCHOR75]
 	mov	x1, 0
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
 	ldr	w0, [x27, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3748
+	bne	.L3780
 	ldr	x0, [x27, 24]
 	mov	w1, -1
 	str	w1, [x0, 4]
 	ldr	w0, [x27, 52]
 	cmp	w0, 512
 	ccmp	w0, w1, 4, ne
-	bne	.L3748
+	bne	.L3780
 	adrp	x1, .LANCHOR234
 	adrp	x0, .LC0
 	mov	w2, 1223
 	add	x1, x1, :lo12:.LANCHOR234
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3748:
+.L3780:
 	ldr	x0, [x27, 24]
 	adrp	x1, .LANCHOR128
 	ldr	w1, [x1, #:lo12:.LANCHOR128]
 	ldr	w2, [x0, 4]
 	cmp	w2, w1
-	bcc	.L3749
+	bcc	.L3781
 	mov	w1, -1
 	str	w1, [x0, 4]
-.L3749:
-	adrp	x1, .LANCHOR162
+.L3781:
+	adrp	x1, .LANCHOR159
 	ldr	w2, [x0, 4]
-	ldr	x1, [x1, #:lo12:.LANCHOR162]
+	ldr	x1, [x1, #:lo12:.LANCHOR159]
 	str	w2, [x1, x28]
 	ldr	w1, [x27, 40]
 	str	w1, [x0, 8]
-	b	.L3745
-.L3751:
+	b	.L3777
+.L3783:
 	udiv	w0, w24, w0
-	adrp	x7, .LANCHOR37
-	ldrb	w7, [x7, #:lo12:.LANCHOR37]
-	cbz	w7, .L3754
+	adrp	x7, .LANCHOR36
+	ldrb	w7, [x7, #:lo12:.LANCHOR36]
+	cbz	w7, .L3786
 	add	w7, w0, w20
 	adrp	x8, .LANCHOR111
 	add	x7, x26, x7, sxtw 1
@@ -24169,12 +24792,12 @@ gc_do_copy_back:
 	ldrh	w7, [x7, 16]
 	madd	w7, w7, w8, w25
 	add	w0, w7, w0, uxth
-.L3849:
+.L3881:
 	str	w0, [x6, 40]
 	ldr	x0, [x29, 104]
 	add	x5, x0, x5, lsl 6
-	adrp	x0, .LANCHOR164
-	ldr	x6, [x0, #:lo12:.LANCHOR164]
+	adrp	x0, .LANCHOR161
+	ldr	x6, [x0, #:lo12:.LANCHOR161]
 	mov	w0, 3
 	ldrh	w7, [x5, 48]
 	udiv	w0, w24, w0
@@ -24185,16 +24808,16 @@ gc_do_copy_back:
 	add	w0, w0, 1
 	orr	w0, w5, w0, lsl 24
 	str	w0, [x6, x7, lsl 2]
-.L3776:
+.L3808:
 	adrp	x0, .LANCHOR124
 	ldrb	w0, [x0, #:lo12:.LANCHOR124]
-	cbz	w0, .L3758
+	cbz	w0, .L3790
 	adrp	x0, .LANCHOR235
 	add	x0, x0, :lo12:.LANCHOR235
 	ldrh	w0, [x0, w25, sxtw 1]
 	cmp	w0, w25
-	bcs	.L3758
-	tbz	x24, 0, .L3758
+	bcs	.L3790
+	tbz	x24, 0, .L3790
 	ldr	x3, [x29, 160]
 	mov	w0, -1
 	strb	w0, [x1, x3]
@@ -24203,45 +24826,45 @@ gc_do_copy_back:
 	ldr	x2, [x29, 112]
 	strh	w1, [x0, 48]
 	ldrb	w1, [x0, 1]
-	adrp	x0, .LANCHOR83
-	ldr	x0, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR82
+	ldr	x0, [x0, #:lo12:.LANCHOR82]
 	strb	w1, [x0, x2]
-	adrp	x0, .LANCHOR163
+	adrp	x0, .LANCHOR160
 	ldr	w2, [x29, 172]
 	mov	w1, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR163]
+	ldr	x0, [x0, #:lo12:.LANCHOR160]
 	str	w1, [x0, w2, sxtw 2]
-.L3758:
+.L3790:
 	ldr	w0, [x29, 152]
 	add	w0, w0, 1
 	str	w0, [x29, 152]
-	b	.L3735
-.L3754:
+	b	.L3767
+.L3786:
 	add	w0, w0, w20
 	adrp	x7, .LANCHOR111
 	add	x0, x26, x0, sxtw 1
 	ldrh	w7, [x7, #:lo12:.LANCHOR111]
 	ldrh	w0, [x0, 16]
 	madd	w0, w0, w7, w25
-	b	.L3849
-.L3750:
+	b	.L3881
+.L3782:
 	cmp	w0, 2
-	bne	.L3757
-	adrp	x0, .LANCHOR81
+	bne	.L3789
+	adrp	x0, .LANCHOR80
 	adrp	x5, .LANCHOR111
-	ldrb	w0, [x0, #:lo12:.LANCHOR81]
-	cbnz	w0, .L3756
+	ldrb	w0, [x0, #:lo12:.LANCHOR80]
+	cbnz	w0, .L3788
 	ldr	w0, [x29, 168]
 	ldrh	w5, [x5, #:lo12:.LANCHOR111]
 	add	w27, w20, w0
 	add	x27, x26, x27, sxtw 1
 	ldrh	w0, [x27, 16]
 	madd	w0, w0, w5, w25
-.L3846:
+.L3878:
 	orr	w0, w0, 33554432
 	str	w0, [x6, 40]
-	b	.L3757
-.L3756:
+	b	.L3789
+.L3788:
 	add	w0, w20, w24, lsr 1
 	ldrh	w5, [x5, #:lo12:.LANCHOR111]
 	add	x0, x26, x0, sxtw 1
@@ -24249,118 +24872,118 @@ gc_do_copy_back:
 	madd	w0, w0, w5, w25
 	and	w5, w24, 1
 	add	w0, w0, w5
-	b	.L3846
-.L3763:
+	b	.L3878
+.L3795:
 	ldr	x4, [x0, w1, sxtw 3]
 	add	w1, w1, 1
 	ldr	x5, [x0, w1, sxtw 3]
 	and	w1, w1, 65535
 	ldrb	w5, [x5, 1]
 	strb	w5, [x4]
-	b	.L3762
-.L3761:
-	adrp	x1, .LANCHOR84
-	ldrb	w2, [x1, #:lo12:.LANCHOR84]
+	b	.L3794
+.L3793:
+	adrp	x1, .LANCHOR83
+	ldrb	w2, [x1, #:lo12:.LANCHOR83]
 	ldr	x1, [x29, 176]
-	cbz	w2, .L3765
-.L3768:
+	cbz	w2, .L3797
+.L3800:
 	strb	wzr, [x1, 60]
-	b	.L3767
-.L3765:
+	b	.L3799
+.L3797:
 	cmp	w23, 1
-	bne	.L3766
+	bne	.L3798
 	mov	w2, 9
-.L3847:
+.L3879:
 	strb	w2, [x1, 60]
-.L3767:
+.L3799:
 	mov	w2, w21
 	add	x1, x0, 24
 	bl	sblk_xlc_prog_pages
-.L3764:
-	adrp	x0, .LANCHOR84
-	ldrb	w0, [x0, #:lo12:.LANCHOR84]
-	cbz	w0, .L3773
+.L3796:
+	adrp	x0, .LANCHOR83
+	ldrb	w0, [x0, #:lo12:.LANCHOR83]
+	cbz	w0, .L3805
 	add	w21, w21, w21, lsl 1
 	and	w21, w21, 65535
-.L3774:
+.L3806:
 	adrp	x0, .LANCHOR110
 	ldr	x1, [x0, #:lo12:.LANCHOR110]
 	ldr	w0, [x1, 52]
 	add	w0, w0, w21
 	str	w0, [x1, 52]
-	adrp	x0, .LANCHOR71
-	add	x25, x0, :lo12:.LANCHOR71
+	adrp	x0, .LANCHOR70
+	add	x25, x0, :lo12:.LANCHOR70
 	ldrh	w0, [x25, 2106]
 	add	w21, w21, w0
-	adrp	x0, .LANCHOR86
+	adrp	x0, .LANCHOR85
 	and	w21, w21, 65535
 	strh	w21, [x25, 2106]
-	ldrh	w0, [x0, #:lo12:.LANCHOR86]
+	ldrh	w0, [x0, #:lo12:.LANCHOR85]
 	ldrb	w1, [x26, 9]
 	mul	w0, w0, w1
 	cmp	w21, w0
-	blt	.L3775
+	blt	.L3807
 	ldr	x0, [x29, 144]
-	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	ldr	x0, [x0, #:lo12:.LANCHOR12]
 	strh	wzr, [x0, 86]
-.L3775:
+.L3807:
 	bl	gc_write_completed
-	b	.L3712
-.L3766:
+	b	.L3744
+.L3798:
 	cmp	w23, 2
-	bne	.L3768
+	bne	.L3800
 	mov	w2, 13
-	b	.L3847
-.L3760:
+	b	.L3879
+.L3792:
+	adrp	x1, .LANCHOR80
+	ldrb	w1, [x1, #:lo12:.LANCHOR80]
+	cbz	w1, .L3818
 	adrp	x1, .LANCHOR81
 	ldrb	w1, [x1, #:lo12:.LANCHOR81]
-	cbz	w1, .L3786
-	adrp	x1, .LANCHOR82
-	ldrb	w1, [x1, #:lo12:.LANCHOR82]
-	cbnz	w1, .L3770
-.L3769:
+	cbnz	w1, .L3802
+.L3801:
 	ldr	w2, [x29, 156]
 	sub	w2, w2, #1
-.L3771:
+.L3803:
 	cmp	w1, w2
-	bge	.L3848
+	bge	.L3880
 	ldr	x4, [x0, w1, sxtw 3]
 	add	w1, w1, 1
 	ldr	x5, [x0, w1, sxtw 3]
 	and	w1, w1, 65535
 	ldrb	w5, [x5, 1]
 	strb	w5, [x4]
-	b	.L3771
-.L3786:
+	b	.L3803
+.L3818:
 	mov	w1, 0
-	b	.L3769
-.L3770:
+	b	.L3801
+.L3802:
 	mov	w1, w21
 	bl	sblk_3d_mlc_prog_pages
-	b	.L3764
-.L3773:
-	adrp	x0, .LANCHOR81
-	ldrb	w0, [x0, #:lo12:.LANCHOR81]
-	cbnz	w0, .L3787
-	adrp	x0, .LANCHOR36
-	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbz	w0, .L3774
+	b	.L3796
+.L3805:
+	adrp	x0, .LANCHOR80
+	ldrb	w0, [x0, #:lo12:.LANCHOR80]
+	cbnz	w0, .L3819
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbz	w0, .L3806
 	adrp	x0, .LANCHOR124
 	ldrh	w1, [x29, 156]
 	ldrb	w0, [x0, #:lo12:.LANCHOR124]
-	cbz	w0, .L3788
+	cbz	w0, .L3820
 	adrp	x0, .LANCHOR235
 	add	x0, x0, :lo12:.LANCHOR235
 	ldrh	w0, [x0, w25, sxtw 1]
 	cmp	w0, w25
 	csel	w21, w21, w1, cc
-	b	.L3774
-.L3787:
+	b	.L3806
+.L3819:
 	ldr	w21, [x29, 132]
-	b	.L3774
-.L3788:
+	b	.L3806
+.L3820:
 	mov	w21, w1
-	b	.L3774
+	b	.L3806
 	.size	gc_do_copy_back, .-gc_do_copy_back
 	.section	.text.zftl_do_gc,"ax",@progbits
 	.align	2
@@ -24371,601 +24994,624 @@ zftl_do_gc:
 	adrp	x1, .LANCHOR107
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
-	stp	x23, x24, [sp, 64]
-	adrp	x24, .LANCHOR103
-	stp	x19, x20, [sp, 32]
-	adrp	x19, .LANCHOR159
+	ldrh	w1, [x1, #:lo12:.LANCHOR107]
 	stp	x21, x22, [sp, 48]
-	adrp	x23, .LANCHOR10
-	ldrh	w22, [x1, #:lo12:.LANCHOR107]
+	adrp	x22, .LANCHOR103
+	stp	x19, x20, [sp, 32]
+	adrp	x20, .LANCHOR156
+	stp	x23, x24, [sp, 64]
+	adrp	x23, .LANCHOR12
 	stp	x25, x26, [sp, 80]
-	ldrh	w21, [x24, #:lo12:.LANCHOR103]
-	ldrb	w1, [x19, #:lo12:.LANCHOR159]
+	ldrh	w21, [x22, #:lo12:.LANCHOR103]
+	ldrb	w2, [x20, #:lo12:.LANCHOR156]
 	stp	x27, x28, [sp, 96]
-	add	w21, w22, w21
-	ldr	x26, [x23, #:lo12:.LANCHOR10]
-	cmp	w1, 6
-	bhi	.L3965
+	add	w21, w1, w21
+	ldr	x26, [x23, #:lo12:.LANCHOR12]
+	cmp	w2, 6
+	bhi	.L3999
 	mov	w25, w0
 	and	w21, w21, 65535
-	adrp	x0, .L3853
-	add	x0, x0, :lo12:.L3853
-	ldrh	w0, [x0,w1,uxtw #1]
-	adr	x1, .Lrtx3853
-	add	x0, x1, w0, sxth #2
+	adrp	x0, .L3885
+	add	x0, x0, :lo12:.L3885
+	ldrh	w0, [x0,w2,uxtw #1]
+	adr	x2, .Lrtx3885
+	add	x0, x2, w0, sxth #2
 	br	x0
-.Lrtx3853:
+.Lrtx3885:
 	.section	.rodata.zftl_do_gc,"a",@progbits
 	.align	0
 	.align	2
-.L3853:
-	.2byte	(.L3852 - .Lrtx3853) / 4
-	.2byte	(.L3854 - .Lrtx3853) / 4
-	.2byte	(.L3855 - .Lrtx3853) / 4
-	.2byte	(.L3856 - .Lrtx3853) / 4
-	.2byte	(.L3857 - .Lrtx3853) / 4
-	.2byte	(.L3858 - .Lrtx3853) / 4
-	.2byte	(.L3859 - .Lrtx3853) / 4
+.L3885:
+	.2byte	(.L3884 - .Lrtx3885) / 4
+	.2byte	(.L3886 - .Lrtx3885) / 4
+	.2byte	(.L3887 - .Lrtx3885) / 4
+	.2byte	(.L3888 - .Lrtx3885) / 4
+	.2byte	(.L3889 - .Lrtx3885) / 4
+	.2byte	(.L3890 - .Lrtx3885) / 4
+	.2byte	(.L3891 - .Lrtx3885) / 4
 	.section	.text.zftl_do_gc
-.L3858:
-	adrp	x20, .LANCHOR71
-	add	x24, x20, :lo12:.LANCHOR71
+.L3890:
+	adrp	x19, .LANCHOR70
+	add	x24, x19, :lo12:.LANCHOR70
 	mov	w22, 0
-.L3860:
+.L3892:
 	bl	gc_check_data_one_wl
-	cbz	w0, .L3961
-	ldr	x0, [x23, #:lo12:.LANCHOR10]
-	add	x20, x20, :lo12:.LANCHOR71
-	strh	wzr, [x20, 56]
+	cbz	w0, .L3995
+	ldr	x0, [x23, #:lo12:.LANCHOR12]
+	add	x19, x19, :lo12:.LANCHOR70
+	strh	wzr, [x19, 56]
 	ldrh	w0, [x0, 80]
 	bl	ftl_free_sblk
 	adrp	x2, .LANCHOR110
-	ldr	x1, [x23, #:lo12:.LANCHOR10]
+	ldr	x1, [x23, #:lo12:.LANCHOR12]
 	mov	w0, -1
 	ldr	x2, [x2, #:lo12:.LANCHOR110]
 	strh	w0, [x1, 80]
 	strh	w0, [x2, 126]
 	strh	w0, [x1, 130]
-	ldr	x0, [x20, 8]
+	ldr	x0, [x19, 8]
 	bl	zbuf_free
-	strb	wzr, [x19, #:lo12:.LANCHOR159]
-	str	xzr, [x20, 8]
-	b	.L4045
-.L3852:
+	strb	wzr, [x20, #:lo12:.LANCHOR156]
+	str	xzr, [x19, 8]
+	b	.L4085
+.L3884:
 	adrp	x0, .LANCHOR105
 	adrp	x27, .LANCHOR97
-	ldrh	w2, [x26, 80]
-	ldrh	w0, [x0, #:lo12:.LANCHOR105]
-	ldrh	w24, [x27, #:lo12:.LANCHOR97]
-	add	w22, w22, w0
+	ldrh	w3, [x26, 80]
+	ldrh	w22, [x0, #:lo12:.LANCHOR105]
 	adrp	x0, .LANCHOR99
+	ldrh	w24, [x27, #:lo12:.LANCHOR97]
+	ldrh	w2, [x0, #:lo12:.LANCHOR99]
+	add	w22, w1, w22
 	stp	x0, x27, [x29, 112]
 	and	w22, w22, 65535
-	ldrh	w1, [x0, #:lo12:.LANCHOR99]
-	add	w24, w24, w1
-	mov	w1, 65535
+	add	w24, w24, w2
+	mov	w2, 65535
 	and	w24, w24, 65535
-	cmp	w2, w1
-	beq	.L3861
-	cbnz	w25, .L3862
-	adrp	x0, .LANCHOR87
-	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	cmp	w3, w2
+	beq	.L3893
+	cbnz	w25, .L3894
+	adrp	x0, .LANCHOR86
+	ldrh	w0, [x0, #:lo12:.LANCHOR86]
 	cmp	w21, w0, lsl 1
-	blt	.L3862
-.L3965:
-	mov	w20, 16
-	b	.L3850
-.L3862:
+	blt	.L3894
+.L3999:
+	mov	w19, 16
+	b	.L3882
+.L3894:
 	adrp	x5, .LANCHOR96
-	mov	w1, 5
-	adrp	x25, .LANCHOR85
-	ldrh	w0, [x5, #:lo12:.LANCHOR96]
-	add	w0, w0, 1
-	and	w0, w0, 65535
-	strh	w0, [x5, #:lo12:.LANCHOR96]
-	bl	zftl_get_gc_node
+	adrp	x0, .LANCHOR92
+	add	x0, x0, :lo12:.LANCHOR92
+	adrp	x25, .LANCHOR84
+	ldrh	w1, [x5, #:lo12:.LANCHOR96]
+	add	w1, w1, 1
+	and	w1, w1, 65535
+	strh	w1, [x5, #:lo12:.LANCHOR96]
+	bl	_list_get_gc_head_node
 	and	w3, w0, 65535
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L3863
-	adrp	x4, .LANCHOR9
+	beq	.L3895
+	adrp	x4, .LANCHOR11
 	ubfiz	x3, x3, 1, 16
-	adrp	x1, .LANCHOR160
-	mov	x20, x1
-	ldr	x4, [x4, #:lo12:.LANCHOR9]
-	ldr	w2, [x1, #:lo12:.LANCHOR160]
+	adrp	x1, .LANCHOR157
+	mov	x19, x1
+	ldr	x4, [x4, #:lo12:.LANCHOR11]
+	ldr	w2, [x1, #:lo12:.LANCHOR157]
 	add	w2, w2, 1
-	str	w2, [x1, #:lo12:.LANCHOR160]
+	str	w2, [x1, #:lo12:.LANCHOR157]
 	ldrh	w3, [x4, x3]
-	adrp	x4, .LANCHOR95
-	ldrh	w4, [x4, #:lo12:.LANCHOR95]
+	adrp	x4, .LANCHOR94
+	ldrh	w4, [x4, #:lo12:.LANCHOR94]
 	cmp	w4, w3
-	bcs	.L3864
-	adrp	x1, .LANCHOR6
-	ldrh	w1, [x1, #:lo12:.LANCHOR6]
+	bcs	.L3896
+	adrp	x1, .LANCHOR8
+	ldrh	w1, [x1, #:lo12:.LANCHOR8]
 	cmp	w2, w1, lsr 4
-	bls	.L3863
+	bls	.L3895
 	adrp	x1, .LANCHOR100
 	ldrh	w1, [x1, #:lo12:.LANCHOR100]
 	cmp	w1, w3
-	bls	.L3863
-.L3864:
-	ldrb	w2, [x25, #:lo12:.LANCHOR85]
+	bls	.L3895
+.L3896:
+	ldrb	w2, [x25, #:lo12:.LANCHOR84]
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L3865
+	cbz	w0, .L3897
 	mov	w0, 1
-	str	wzr, [x20, #:lo12:.LANCHOR160]
-	strb	w0, [x19, #:lo12:.LANCHOR159]
-	b	.L3965
-.L3863:
+	str	wzr, [x19, #:lo12:.LANCHOR157]
+	strb	w0, [x20, #:lo12:.LANCHOR156]
+	b	.L3999
+.L3895:
 	strh	wzr, [x5, #:lo12:.LANCHOR96]
-.L3865:
+.L3897:
 	cmp	w22, 15
-	bls	.L3967
-	adrp	x0, .LANCHOR93
-	ldrh	w1, [x0, #:lo12:.LANCHOR93]
+	bls	.L4001
+	adrp	x0, .LANCHOR91
+	ldrh	w1, [x0, #:lo12:.LANCHOR91]
 	adrp	x0, .LANCHOR101
 	ldrh	w0, [x0, #:lo12:.LANCHOR101]
 	cmp	w1, w0
-	bhi	.L3967
+	bhi	.L4001
 	cmp	w24, 0
-	cset	w20, eq
-	add	w20, w20, 1
-.L3866:
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3867
-	ldr	x0, [x23, #:lo12:.LANCHOR10]
+	cset	w19, eq
+	add	w19, w19, 1
+.L3898:
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 8, .L3899
+	ldr	x0, [x23, #:lo12:.LANCHOR12]
 	mov	w4, w22
-	ldrb	w2, [x25, #:lo12:.LANCHOR85]
+	ldrb	w2, [x25, #:lo12:.LANCHOR84]
 	mov	w3, w21
-	mov	w1, 2662
+	mov	w1, 2807
 	ldrh	w7, [x0, 122]
 	ldrh	w6, [x0, 120]
 	ldrh	w5, [x0, 124]
 	ldrh	w0, [x26, 80]
 	str	w0, [sp]
-	adrp	x0, .LC236
-	add	x0, x0, :lo12:.LC236
+	adrp	x0, .LC239
+	add	x0, x0, :lo12:.LC239
 	bl	printf
-.L3867:
-	ldrb	w0, [x25, #:lo12:.LANCHOR85]
+.L3899:
+	ldrb	w0, [x25, #:lo12:.LANCHOR84]
 	mov	w2, 1
-	mov	w1, w20
+	mov	w1, w19
 	bl	gc_search_src_blk
 	cmp	w0, 0
-	ble	.L3868
-.L3869:
+	ble	.L3900
+.L3901:
 	mov	w0, 1
-.L4047:
-	strb	w0, [x19, #:lo12:.LANCHOR159]
-	b	.L3965
-.L3967:
-	mov	w20, 2
-	b	.L3866
-.L3868:
-	ldrb	w0, [x25, #:lo12:.LANCHOR85]
+.L4087:
+	strb	w0, [x20, #:lo12:.LANCHOR156]
+	b	.L3999
+.L4001:
+	mov	w19, 2
+	b	.L3898
+.L3900:
+	ldrb	w0, [x25, #:lo12:.LANCHOR84]
 	mov	w2, 1
 	mov	w1, 3
 	bl	gc_search_src_blk
 	cmp	w0, 0
-	bgt	.L3869
-	b	.L3965
-.L3861:
+	bgt	.L3901
+	b	.L3999
+.L3893:
 	cmp	w25, 1
-	bne	.L3871
+	bne	.L3903
+	adrp	x0, .LANCHOR110
+	ldr	x0, [x0, #:lo12:.LANCHOR110]
+	ldrh	w0, [x0, 150]
+	cbz	w0, .L3904
+	cmp	w1, 8
+	bls	.L3904
+	bl	gc_ink_check_sblk
+.L3904:
 	bl	gc_scan_static_data
-	adrp	x26, .LANCHOR85
-	ldr	x0, [x23, #:lo12:.LANCHOR10]
+	adrp	x26, .LANCHOR84
+	ldr	x0, [x23, #:lo12:.LANCHOR12]
 	ldrh	w0, [x0, 122]
-	cbz	w0, .L3872
-.L3873:
+	cbz	w0, .L3905
+.L3906:
 	mov	w0, 1
-	strb	w0, [x26, #:lo12:.LANCHOR85]
-	b	.L4047
-.L3872:
+	strb	w0, [x26, #:lo12:.LANCHOR84]
+	b	.L4087
+.L3905:
 	bl	gc_static_wearleveling
-	mov	w20, w0
-	cbnz	w0, .L3873
-	adrp	x27, .LANCHOR161
-	cbz	w22, .L3874
+	mov	w19, w0
+	cbnz	w0, .L3906
+	adrp	x27, .LANCHOR158
+	cbz	w22, .L3907
 	cmp	w21, w24
 	adrp	x1, .LANCHOR98
-	bcs	.L3875
+	bcs	.L3908
 	ldrh	w0, [x1, #:lo12:.LANCHOR98]
 	cmp	w0, w21
-	bhi	.L3876
-.L3875:
+	bhi	.L3909
+.L3908:
 	ldrh	w1, [x1, #:lo12:.LANCHOR98]
 	add	w0, w21, w24
 	cmp	w0, w1
-	blt	.L3876
-	adrp	x0, .LANCHOR93
-	ldrh	w1, [x0, #:lo12:.LANCHOR93]
+	blt	.L3909
+	adrp	x0, .LANCHOR91
+	ldrh	w1, [x0, #:lo12:.LANCHOR91]
 	adrp	x0, .LANCHOR101
 	ldrh	w0, [x0, #:lo12:.LANCHOR101]
 	cmp	w1, w0
-	bcc	.L3874
-.L3876:
+	bcc	.L3907
+.L3909:
 	mov	w0, 1
-	strb	w0, [x26, #:lo12:.LANCHOR85]
-	mov	w0, 16
-	bl	zftl_get_gc_node.part.10
+	mov	w1, 16
+	strb	w0, [x26, #:lo12:.LANCHOR84]
+	adrp	x0, .LANCHOR95
+	add	x0, x0, :lo12:.LANCHOR95
+	bl	_list_get_gc_head_node
 	and	w1, w0, 65535
 	mov	w2, 65535
-	adrp	x28, .LANCHOR160
+	adrp	x28, .LANCHOR157
 	cmp	w1, w2
-	beq	.L3877
-	adrp	x2, .LANCHOR9
+	beq	.L3910
+	adrp	x2, .LANCHOR11
 	ubfiz	x1, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR9]
+	ldr	x2, [x2, #:lo12:.LANCHOR11]
 	ldrh	w2, [x2, x1]
-	ldrh	w1, [x27, #:lo12:.LANCHOR161]
+	ldrh	w1, [x27, #:lo12:.LANCHOR158]
 	cmp	w2, w1
-	bcs	.L3877
+	bcs	.L3910
 	cmp	w21, 2
-	bls	.L3877
-	strb	wzr, [x26, #:lo12:.LANCHOR85]
+	bls	.L3910
+	strb	wzr, [x26, #:lo12:.LANCHOR84]
 	mov	w2, 0
-	str	wzr, [x28, #:lo12:.LANCHOR160]
+	str	wzr, [x28, #:lo12:.LANCHOR157]
 	mov	w1, 1
 	bl	gc_add_sblk
-	cbnz	w0, .L3869
-.L3877:
-	mov	w1, 3
-	mov	w0, 0
-	bl	zftl_get_gc_node
+	cbnz	w0, .L3901
+.L3910:
+	mov	w1, 0
+	adrp	x0, .LANCHOR90
+	add	x0, x0, :lo12:.LANCHOR90
+	bl	_list_get_gc_head_node
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L3878
-	adrp	x2, .LANCHOR9
+	beq	.L3911
+	adrp	x2, .LANCHOR11
 	ubfiz	x1, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR9]
+	ldr	x2, [x2, #:lo12:.LANCHOR11]
 	ldrh	w2, [x2, x1]
-	ldrh	w1, [x27, #:lo12:.LANCHOR161]
+	ldrh	w1, [x27, #:lo12:.LANCHOR158]
 	cmp	w2, w1
-	bcs	.L3878
+	bcs	.L3911
 	cmp	w21, 2
-	bls	.L3878
-	strb	wzr, [x26, #:lo12:.LANCHOR85]
+	bls	.L3911
+	strb	wzr, [x26, #:lo12:.LANCHOR84]
 	mov	w2, 0
-	str	wzr, [x28, #:lo12:.LANCHOR160]
+	str	wzr, [x28, #:lo12:.LANCHOR157]
 	mov	w1, 1
 	bl	gc_add_sblk
-	cbnz	w0, .L3869
-.L3878:
-	ldrh	w0, [x27, #:lo12:.LANCHOR161]
-	adrp	x1, .LANCHOR95
+	cbnz	w0, .L3901
+.L3911:
+	ldrh	w0, [x27, #:lo12:.LANCHOR158]
+	adrp	x1, .LANCHOR94
 	add	w0, w0, 1
-	ldrh	w5, [x1, #:lo12:.LANCHOR95]
+	ldrh	w5, [x1, #:lo12:.LANCHOR94]
 	and	w0, w0, 65535
-	strh	w0, [x27, #:lo12:.LANCHOR161]
+	strh	w0, [x27, #:lo12:.LANCHOR158]
 	cmp	w0, w5, lsr 5
-	bls	.L3879
+	bls	.L3912
 	mov	w0, 4
-	strh	w0, [x27, #:lo12:.LANCHOR161]
-.L3879:
-	adrp	x1, .LANCHOR90
-	ldr	w0, [x28, #:lo12:.LANCHOR160]
-	strh	wzr, [x1, #:lo12:.LANCHOR90]
-	adrp	x1, .LANCHOR91
+	strh	w0, [x27, #:lo12:.LANCHOR158]
+.L3912:
+	adrp	x1, .LANCHOR87
+	ldr	w0, [x28, #:lo12:.LANCHOR157]
+	strh	wzr, [x1, #:lo12:.LANCHOR87]
+	adrp	x1, .LANCHOR88
 	add	w0, w0, 1
-	str	w0, [x28, #:lo12:.LANCHOR160]
-	strh	wzr, [x1, #:lo12:.LANCHOR91]
-	adrp	x1, .LANCHOR92
-	strh	wzr, [x1, #:lo12:.LANCHOR92]
-	adrp	x1, .LANCHOR6
-	ldrh	w1, [x1, #:lo12:.LANCHOR6]
+	str	w0, [x28, #:lo12:.LANCHOR157]
+	strh	wzr, [x1, #:lo12:.LANCHOR88]
+	adrp	x1, .LANCHOR89
+	strh	wzr, [x1, #:lo12:.LANCHOR89]
+	adrp	x1, .LANCHOR8
+	ldrh	w1, [x1, #:lo12:.LANCHOR8]
 	cmp	w0, w1, lsr 5
-	adrp	x0, .LANCHOR93
-	bls	.L3880
-	ldrh	w1, [x0, #:lo12:.LANCHOR93]
+	adrp	x0, .LANCHOR91
+	bls	.L3913
+	ldrh	w1, [x0, #:lo12:.LANCHOR91]
 	cmp	w1, w22
-	bls	.L3880
-	mov	w1, 5
-	mov	w0, 0
-	bl	zftl_get_gc_node
+	bls	.L3913
+	mov	w1, 0
+	adrp	x0, .LANCHOR92
+	add	x0, x0, :lo12:.LANCHOR92
+	bl	_list_get_gc_head_node
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L3881
-.L4035:
-	mov	w20, 16
-.L3882:
-	ldr	x0, [x23, #:lo12:.LANCHOR10]
-	adrp	x28, .LANCHOR85
-	mov	w1, 1
-	mov	x23, x28
-	strb	w1, [x28, #:lo12:.LANCHOR85]
-	ldrh	w0, [x0, 124]
-	cbz	w0, .L3887
-	strb	wzr, [x28, #:lo12:.LANCHOR85]
-	strb	w1, [x19, #:lo12:.LANCHOR159]
-.L3850:
-	mov	w0, w20
-	ldp	x19, x20, [sp, 32]
-	ldp	x21, x22, [sp, 48]
-	ldp	x23, x24, [sp, 64]
-	ldp	x25, x26, [sp, 80]
-	ldp	x27, x28, [sp, 96]
-	ldp	x29, x30, [sp, 16]
-	add	sp, sp, 144
-	ret
-.L3881:
-	adrp	x1, .LANCHOR9
+	bne	.L3914
+.L4075:
+	mov	w19, 16
+	b	.L3915
+.L3914:
+	adrp	x1, .LANCHOR11
 	ubfiz	x0, x0, 1, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR9]
+	ldr	x1, [x1, #:lo12:.LANCHOR11]
 	ldrh	w1, [x1, x0]
-	adrp	x0, .LANCHOR80
-	ldrb	w0, [x0, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR79
+	ldrb	w0, [x0, #:lo12:.LANCHOR79]
 	mul	w0, w0, w5
 	cmp	w1, w0
-	bgt	.L4035
-	str	wzr, [x28, #:lo12:.LANCHOR160]
+	bgt	.L4075
+	str	wzr, [x28, #:lo12:.LANCHOR157]
 	mov	w2, 4
-.L4042:
+.L4081:
 	mov	w1, 2
-.L4034:
-	ldrb	w0, [x26, #:lo12:.LANCHOR85]
+.L4074:
+	ldrb	w0, [x26, #:lo12:.LANCHOR84]
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-	cbz	w0, .L4035
-	b	.L3869
-.L3880:
-	ldrh	w1, [x0, #:lo12:.LANCHOR93]
+	cbz	w0, .L4075
+	b	.L3901
+.L3913:
+	ldrh	w1, [x0, #:lo12:.LANCHOR91]
 	adrp	x0, .LANCHOR101
 	ldrh	w0, [x0, #:lo12:.LANCHOR101]
 	cmp	w1, w0
-	bcc	.L3885
+	bcc	.L3918
 	mov	w2, 1
-	b	.L4042
-.L3885:
+	b	.L4081
+.L3918:
 	ldr	x0, [x29, 120]
 	ldrh	w0, [x0, #:lo12:.LANCHOR97]
-	cbnz	w0, .L3886
+	cbnz	w0, .L3919
 	ldr	x0, [x29, 112]
 	ldrh	w0, [x0, #:lo12:.LANCHOR99]
 	cmp	w0, 8
-	bls	.L3882
-.L3886:
+	bls	.L3920
+.L3919:
 	mov	w2, 4
 	mov	w1, 1
-	b	.L4034
-.L3874:
-	adrp	x0, .LANCHOR95
-	ldrh	w1, [x0, #:lo12:.LANCHOR95]
-	ldrh	w0, [x27, #:lo12:.LANCHOR161]
+	b	.L4074
+.L3920:
+	adrp	x0, .LANCHOR70+2110
+	ldrh	w0, [x0, #:lo12:.LANCHOR70+2110]
+	cbnz	w0, .L4075
+.L3915:
+	ldr	x0, [x23, #:lo12:.LANCHOR12]
+	adrp	x28, .LANCHOR84
+	mov	w1, 1
+	mov	x23, x28
+	strb	w1, [x28, #:lo12:.LANCHOR84]
+	ldrh	w0, [x0, 124]
+	cbz	w0, .L3921
+	strb	wzr, [x28, #:lo12:.LANCHOR84]
+	strb	w1, [x20, #:lo12:.LANCHOR156]
+.L3882:
+	mov	w0, w19
+	ldp	x19, x20, [sp, 32]
+	ldp	x21, x22, [sp, 48]
+	ldp	x23, x24, [sp, 64]
+	ldp	x25, x26, [sp, 80]
+	ldp	x27, x28, [sp, 96]
+	ldp	x29, x30, [sp, 16]
+	add	sp, sp, 144
+	ret
+.L3907:
+	adrp	x0, .LANCHOR94
+	ldrh	w1, [x0, #:lo12:.LANCHOR94]
+	ldrh	w0, [x27, #:lo12:.LANCHOR158]
 	cmp	w0, w1, lsr 5
-	bcc	.L4035
+	bcc	.L4075
 	mov	w0, 4
-	strh	w0, [x27, #:lo12:.LANCHOR161]
-	b	.L4035
-.L3871:
-	adrp	x0, .LANCHOR87
-	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	strh	w0, [x27, #:lo12:.LANCHOR158]
+	b	.L4075
+.L3903:
+	adrp	x0, .LANCHOR86
+	ldrh	w0, [x0, #:lo12:.LANCHOR86]
 	cmp	w0, w21
-	bcs	.L4035
+	bcs	.L4075
 	ldrh	w0, [x26, 124]
-	cbz	w0, .L3965
-	b	.L4035
-.L3887:
-	adrp	x0, .LANCHOR87
+	cbz	w0, .L3999
+	b	.L4075
+.L3921:
+	adrp	x0, .LANCHOR86
 	mov	x26, x0
-	ldrh	w2, [x0, #:lo12:.LANCHOR87]
+	ldrh	w2, [x0, #:lo12:.LANCHOR86]
 	cmp	w21, w2
-	bcs	.L3888
-	cbz	w22, .L3889
+	bcs	.L3922
+	cbz	w22, .L3923
 	cmp	w22, 16
-	bls	.L3890
-	adrp	x0, .LANCHOR93
-	ldrh	w2, [x0, #:lo12:.LANCHOR93]
+	bls	.L3924
+	adrp	x0, .LANCHOR91
+	ldrh	w2, [x0, #:lo12:.LANCHOR91]
 	adrp	x0, .LANCHOR101
 	ldrh	w0, [x0, #:lo12:.LANCHOR101]
 	cmp	w2, w0
-	bhi	.L3890
+	bhi	.L3924
 	mov	w2, 4
 	mov	w0, w1
 	bl	gc_search_src_blk
 	tst	w0, 65535
-	bne	.L3891
-.L4038:
+	bne	.L3925
+.L4082:
 	mov	w2, 4
 	mov	w1, 3
-	ldrb	w0, [x28, #:lo12:.LANCHOR85]
-	b	.L4037
-.L3891:
-	mov	w1, 5
-	mov	w0, 0
-	bl	zftl_get_gc_node
+	ldrb	w0, [x28, #:lo12:.LANCHOR84]
+	b	.L4077
+.L3925:
+	mov	w1, 0
+	adrp	x0, .LANCHOR92
+	add	x0, x0, :lo12:.LANCHOR92
+	bl	_list_get_gc_head_node
 	and	w3, w0, 65535
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L3894
-	adrp	x4, .LANCHOR9
+	beq	.L3928
+	adrp	x4, .LANCHOR11
 	ubfiz	x3, x3, 1, 16
-	adrp	x1, .LANCHOR160
+	adrp	x1, .LANCHOR157
 	mov	x21, x1
-	ldr	x4, [x4, #:lo12:.LANCHOR9]
-	ldr	w2, [x1, #:lo12:.LANCHOR160]
+	ldr	x4, [x4, #:lo12:.LANCHOR11]
+	ldr	w2, [x1, #:lo12:.LANCHOR157]
 	add	w2, w2, 1
-	str	w2, [x1, #:lo12:.LANCHOR160]
+	str	w2, [x1, #:lo12:.LANCHOR157]
 	ldrh	w3, [x4, x3]
-	adrp	x4, .LANCHOR95
-	ldrh	w4, [x4, #:lo12:.LANCHOR95]
+	adrp	x4, .LANCHOR94
+	ldrh	w4, [x4, #:lo12:.LANCHOR94]
 	cmp	w4, w3
-	bcs	.L3895
-	adrp	x1, .LANCHOR6
-	ldrh	w1, [x1, #:lo12:.LANCHOR6]
+	bcs	.L3929
+	adrp	x1, .LANCHOR8
+	ldrh	w1, [x1, #:lo12:.LANCHOR8]
 	cmp	w2, w1, lsr 4
-	bls	.L3894
+	bls	.L3928
 	adrp	x1, .LANCHOR100
 	ldrh	w1, [x1, #:lo12:.LANCHOR100]
 	cmp	w1, w3
-	bls	.L3894
-.L3895:
-	ldrb	w2, [x23, #:lo12:.LANCHOR85]
+	bls	.L3928
+.L3929:
+	ldrb	w2, [x23, #:lo12:.LANCHOR84]
 	mov	w1, 0
 	bl	gc_add_sblk
-	str	wzr, [x21, #:lo12:.LANCHOR160]
+	str	wzr, [x21, #:lo12:.LANCHOR157]
 	adrp	x0, .LANCHOR122
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR122]
-.L3894:
+.L3928:
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR159]
-	b	.L3850
-.L3890:
+	strb	w0, [x20, #:lo12:.LANCHOR156]
+	b	.L3882
+.L3924:
 	mov	w2, 1
 	mov	w1, 2
 	mov	w0, w2
 	bl	gc_search_src_blk
 	tst	w0, 65535
-	bne	.L3894
-	ldrb	w0, [x23, #:lo12:.LANCHOR85]
+	bne	.L3928
+	ldrb	w0, [x23, #:lo12:.LANCHOR84]
 	mov	w2, 4
 	mov	w1, 3
-.L4037:
+.L4077:
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-.L3892:
-	cbnz	w0, .L3894
-	b	.L3850
-.L3889:
-	strb	wzr, [x28, #:lo12:.LANCHOR85]
+.L3926:
+	cbnz	w0, .L3928
+	b	.L3882
+.L3923:
+	strb	wzr, [x28, #:lo12:.LANCHOR84]
 	cmp	w21, 16
-	bls	.L3897
+	bls	.L3931
 	mov	w2, 4
 	mov	w1, 3
 	mov	w0, 0
-	b	.L4037
-.L3897:
+	b	.L4077
+.L3931:
 	mov	w2, w1
 	mov	w0, 0
 	bl	gc_search_src_blk
 	tst	w0, 65535
-	bne	.L3894
-	b	.L4038
-.L3888:
+	bne	.L3928
+	b	.L4082
+.L3922:
 	cmp	w25, 1
-	bne	.L3850
+	bne	.L3882
 	cmp	w21, w2, lsl 1
-	bge	.L3898
+	bge	.L3932
 	cmp	w24, w22, lsr 1
-	bcs	.L3899
-	adrp	x1, .LANCHOR93
-	ldrh	w2, [x1, #:lo12:.LANCHOR93]
+	bcs	.L3933
+	adrp	x1, .LANCHOR91
+	ldrh	w2, [x1, #:lo12:.LANCHOR91]
 	adrp	x1, .LANCHOR101
 	ldrh	w1, [x1, #:lo12:.LANCHOR101]
 	cmp	w2, w1
-	bcs	.L3899
+	bcs	.L3933
 	adrp	x1, .LANCHOR98
 	ldrh	w1, [x1, #:lo12:.LANCHOR98]
 	lsr	w1, w1, 2
-	strh	w1, [x0, #:lo12:.LANCHOR87]
-	b	.L3850
-.L3899:
-	mov	w0, 8
-	bl	zftl_get_gc_node.part.10
+	strh	w1, [x0, #:lo12:.LANCHOR86]
+	b	.L3882
+.L3933:
+	mov	w1, 8
+	adrp	x25, .LANCHOR95
+	add	x0, x25, :lo12:.LANCHOR95
+	bl	_list_get_gc_head_node
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L3900
-	adrp	x2, .LANCHOR9
+	beq	.L3934
+	adrp	x2, .LANCHOR11
 	ubfiz	x1, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR9]
+	ldr	x2, [x2, #:lo12:.LANCHOR11]
 	ldrh	w1, [x2, x1]
 	cmp	w1, 3
-	bhi	.L3900
-	cbz	w21, .L3900
-	strb	wzr, [x23, #:lo12:.LANCHOR85]
+	bhi	.L3934
+	cbz	w21, .L3934
+	strb	wzr, [x23, #:lo12:.LANCHOR84]
 	mov	w2, 0
 	mov	w1, 1
-	bl	gc_add_sblk
-	cbnz	w0, .L3894
-.L3900:
-	mov	w1, 5
-	mov	w0, 0
-	bl	zftl_get_gc_node
-	and	w25, w0, 65535
+	bl	gc_add_sblk
+	cbnz	w0, .L3928
+.L3934:
+	mov	w1, 0
+	adrp	x0, .LANCHOR92
+	add	x0, x0, :lo12:.LANCHOR92
+	bl	_list_get_gc_head_node
+	and	w28, w0, 65535
 	mov	w1, 65535
-	mov	w28, w25
-	cmp	w25, w1
-	bne	.L3901
-.L3906:
+	mov	w3, w28
+	cmp	w28, w1
+	bne	.L3935
+.L3940:
 	cmp	w22, 1
-	bhi	.L3902
-.L3903:
+	bhi	.L3936
+.L3937:
 	cmp	w21, w24
 	adrp	x21, .LANCHOR98
-	bcs	.L3910
-	strb	wzr, [x23, #:lo12:.LANCHOR85]
-	mov	w0, 4
-	bl	zftl_get_gc_node.part.10
+	bcs	.L3944
+	mov	w1, 4
+	strb	wzr, [x23, #:lo12:.LANCHOR84]
+	add	x0, x25, :lo12:.LANCHOR95
+	bl	_list_get_gc_head_node
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3910
-	adrp	x1, .LANCHOR9
+	beq	.L3944
+	adrp	x1, .LANCHOR11
 	ubfiz	x0, x0, 1, 16
-	adrp	x2, .LANCHOR80
-	ldr	x1, [x1, #:lo12:.LANCHOR9]
-	ldrb	w2, [x2, #:lo12:.LANCHOR80]
+	adrp	x2, .LANCHOR79
+	ldr	x1, [x1, #:lo12:.LANCHOR11]
+	ldrb	w2, [x2, #:lo12:.LANCHOR79]
 	ldrh	w1, [x1, x0]
-	adrp	x0, .LANCHOR95
-	ldrh	w0, [x0, #:lo12:.LANCHOR95]
+	adrp	x0, .LANCHOR94
+	ldrh	w0, [x0, #:lo12:.LANCHOR94]
 	mul	w0, w0, w2
 	cmp	w1, w0, lsr 1
-	ble	.L3912
-.L3910:
+	ble	.L3946
+.L3944:
 	ldrh	w0, [x21, #:lo12:.LANCHOR98]
 	lsr	w0, w0, 2
-	strh	w0, [x26, #:lo12:.LANCHOR87]
-	b	.L3850
-.L3901:
-	adrp	x2, .LANCHOR160
-	adrp	x3, .LANCHOR6
-	uxtw	x25, w25
-	ldr	w1, [x2, #:lo12:.LANCHOR160]
-	ldrh	w3, [x3, #:lo12:.LANCHOR6]
+	strh	w0, [x26, #:lo12:.LANCHOR86]
+	b	.L3882
+.L3935:
+	adrp	x2, .LANCHOR157
+	adrp	x4, .LANCHOR8
+	uxtw	x28, w28
+	ldr	w1, [x2, #:lo12:.LANCHOR157]
+	ldrh	w4, [x4, #:lo12:.LANCHOR8]
 	add	w1, w1, 1
-	str	w1, [x2, #:lo12:.LANCHOR160]
-	cmp	w1, w3, lsr 4
-	adrp	x3, .LANCHOR9
-	bls	.L3904
-	ldr	x1, [x3, #:lo12:.LANCHOR9]
-	str	wzr, [x2, #:lo12:.LANCHOR160]
-	ldrh	w2, [x1, x25, lsl 1]
+	str	w1, [x2, #:lo12:.LANCHOR157]
+	cmp	w1, w4, lsr 4
+	adrp	x4, .LANCHOR11
+	bls	.L3938
+	ldr	x1, [x4, #:lo12:.LANCHOR11]
+	str	wzr, [x2, #:lo12:.LANCHOR157]
+	ldrh	w2, [x1, x28, lsl 1]
 	adrp	x1, .LANCHOR100
 	ldrh	w1, [x1, #:lo12:.LANCHOR100]
 	cmp	w2, w1
-	bcs	.L3904
-	mov	w4, 1
-	str	x3, [x29, 96]
-	strb	w4, [x23, #:lo12:.LANCHOR85]
+	bcs	.L3938
+	mov	w5, 1
+	str	x4, [x29, 96]
+	strb	w5, [x23, #:lo12:.LANCHOR84]
 	mov	w2, 1
-	str	w4, [x29, 108]
+	stp	w3, w5, [x29, 104]
 	mov	w1, 0
 	bl	gc_add_sblk
-	ldr	w4, [x29, 108]
-	ldr	x3, [x29, 96]
-	cbz	w0, .L3904
-	strb	w4, [x19, #:lo12:.LANCHOR159]
-	b	.L3850
-.L3904:
-	ldr	x0, [x3, #:lo12:.LANCHOR9]
-	ldrh	w1, [x0, x25, lsl 1]
-	adrp	x0, .LANCHOR95
-	ldrh	w0, [x0, #:lo12:.LANCHOR95]
+	ldp	w3, w5, [x29, 104]
+	ldr	x4, [x29, 96]
+	cbz	w0, .L3938
+	strb	w5, [x20, #:lo12:.LANCHOR156]
+	b	.L3882
+.L3938:
+	ldr	x0, [x4, #:lo12:.LANCHOR11]
+	ldrh	w1, [x0, x28, lsl 1]
+	adrp	x0, .LANCHOR94
+	ldrh	w0, [x0, #:lo12:.LANCHOR94]
 	cmp	w1, w0, lsr 1
-	bhi	.L3905
+	bhi	.L3939
 	mov	w2, 0
 	mov	w1, 1
-	mov	w0, w28
+	mov	w0, w3
 	bl	gc_add_sblk
-	b	.L3894
-.L3905:
+	b	.L3928
+.L3939:
 	ldp	x2, x0, [x29, 112]
 	ldrh	w2, [x2, #:lo12:.LANCHOR99]
 	ldrh	w0, [x0, #:lo12:.LANCHOR97]
@@ -24973,376 +25619,379 @@ zftl_do_gc:
 	adrp	x2, .LANCHOR98
 	ldrh	w2, [x2, #:lo12:.LANCHOR98]
 	cmp	w0, w2, lsl 1
-	ble	.L3906
+	ble	.L3940
 	adrp	x0, .LANCHOR100
 	ldrh	w0, [x0, #:lo12:.LANCHOR100]
 	cmp	w0, w1
-	bcc	.L3903
-	b	.L3906
-.L3902:
+	bcc	.L3937
+	b	.L3940
+.L3936:
 	mov	w1, 1
-	strb	w1, [x23, #:lo12:.LANCHOR85]
+	strb	w1, [x23, #:lo12:.LANCHOR84]
 	cmp	w22, 16
-	bls	.L3907
-	adrp	x0, .LANCHOR93
-	ldrh	w2, [x0, #:lo12:.LANCHOR93]
+	bls	.L3941
+	adrp	x0, .LANCHOR91
+	ldrh	w2, [x0, #:lo12:.LANCHOR91]
 	adrp	x0, .LANCHOR101
 	ldrh	w0, [x0, #:lo12:.LANCHOR101]
 	cmp	w2, w0
-	bhi	.L3907
+	bhi	.L3941
 	mov	w0, w1
 	mov	w2, 4
-.L4044:
+.L4084:
 	bl	gc_search_src_blk
 	ands	w0, w0, 65535
-	bne	.L3908
-	ldrb	w0, [x23, #:lo12:.LANCHOR85]
+	bne	.L3942
+	ldrb	w0, [x23, #:lo12:.LANCHOR84]
 	mov	w2, 4
 	mov	w1, 3
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-.L3908:
+.L3942:
 	adrp	x1, .LANCHOR98
 	cmp	w21, w24, lsr 1
 	ldrh	w1, [x1, #:lo12:.LANCHOR98]
-	bls	.L4039
+	bls	.L4078
 	lsr	w1, w1, 2
-.L4040:
-	strh	w1, [x26, #:lo12:.LANCHOR87]
-	b	.L3892
-.L3907:
+.L4079:
+	strh	w1, [x26, #:lo12:.LANCHOR86]
+	b	.L3926
+.L3941:
 	mov	w2, 1
 	mov	w1, 2
 	mov	w0, w2
-	b	.L4044
-.L3912:
+	b	.L4084
+.L3946:
 	mov	w1, 3
 	mov	w2, 4
 	mov	w0, 0
 	bl	gc_search_src_blk
 	ldrh	w1, [x21, #:lo12:.LANCHOR98]
 	and	w0, w0, 65535
-.L4039:
+.L4078:
 	lsr	w1, w1, 1
-	b	.L4040
-.L3898:
+	b	.L4079
+.L3932:
 	adrp	x1, .LANCHOR98
-	mov	w20, 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR98]
 	lsr	w1, w1, 2
-	strh	w1, [x0, #:lo12:.LANCHOR87]
-	b	.L3850
-.L3854:
-	adrp	x7, .LANCHOR71
+	strh	w1, [x0, #:lo12:.LANCHOR86]
+	adrp	x0, .LANCHOR70+2110
+	ldrh	w0, [x0, #:lo12:.LANCHOR70+2110]
+	cmp	w0, 0
+	csel	w19, w19, wzr, ne
+	b	.L3882
+.L3886:
+	adrp	x7, .LANCHOR70
 	mov	w0, 65535
-	ldrh	w1, [x7, #:lo12:.LANCHOR71]
+	ldrh	w1, [x7, #:lo12:.LANCHOR70]
 	cmp	w1, w0
-	bne	.L3913
+	bne	.L3947
 	bl	gc_get_src_blk
-	strh	w0, [x7, #:lo12:.LANCHOR71]
-.L3913:
-	ldrh	w0, [x7, #:lo12:.LANCHOR71]
+	strh	w0, [x7, #:lo12:.LANCHOR70]
+.L3947:
+	ldrh	w0, [x7, #:lo12:.LANCHOR70]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3914
-	adrp	x1, .LANCHOR6
-	ldrh	w1, [x1, #:lo12:.LANCHOR6]
+	beq	.L3948
+	adrp	x1, .LANCHOR8
+	ldrh	w1, [x1, #:lo12:.LANCHOR8]
 	cmp	w1, w0
-	bhi	.L3914
+	bhi	.L3948
 	mov	w0, -1
-	strh	w0, [x7, #:lo12:.LANCHOR71]
-.L3914:
-	ldrh	w3, [x7, #:lo12:.LANCHOR71]
+	strh	w0, [x7, #:lo12:.LANCHOR70]
+.L3948:
+	ldrh	w3, [x7, #:lo12:.LANCHOR70]
 	mov	w0, 65535
-	add	x1, x7, :lo12:.LANCHOR71
+	add	x1, x7, :lo12:.LANCHOR70
 	cmp	w3, w0
-	beq	.L4046
-	adrp	x0, .LANCHOR7
+	beq	.L4086
+	adrp	x0, .LANCHOR9
 	ldrh	w5, [x1, 56]
 	uxtw	x4, w3
-	ldr	x2, [x0, #:lo12:.LANCHOR7]
+	ldr	x2, [x0, #:lo12:.LANCHOR9]
 	add	x2, x2, x4, lsl 2
-	cbz	w5, .L3916
+	cbz	w5, .L3950
 	add	x1, x1, 58
 	mov	w0, 0
-.L3918:
+.L3952:
 	ldrh	w6, [x1], 2
 	cmp	w6, w3
-	bne	.L3917
-.L3922:
-	adrp	x0, .LANCHOR71
+	bne	.L3951
+.L3956:
+	adrp	x0, .LANCHOR70
 	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR71]
-	b	.L3965
-.L3917:
+	strh	w1, [x0, #:lo12:.LANCHOR70]
+	b	.L3999
+.L3951:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w5, w0
-	bne	.L3918
-.L3916:
+	bne	.L3952
+.L3950:
 	ldrb	w0, [x2, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L3919
+	beq	.L3953
 	tst	w0, 192
-	bne	.L3920
-.L3919:
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	bne	.L3954
+.L3953:
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrh	w0, [x0, x4, lsl 1]
-	cbz	w0, .L3922
-	mov	w2, 3153
+	cbz	w0, .L3956
+	mov	w2, 3306
 	adrp	x1, .LANCHOR237
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR237
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3922
-.L3920:
+	b	.L3956
+.L3954:
 	mov	w0, 2
-	b	.L4047
-.L3855:
+	b	.L4087
+.L3887:
 	bl	gc_scan_src_blk
 	cmn	w0, #1
-	bne	.L3923
+	bne	.L3957
 	mov	w0, 3
-	b	.L4047
-.L3923:
-	adrp	x20, .LANCHOR71
+	b	.L4087
+.L3957:
+	adrp	x19, .LANCHOR70
 	mov	w2, 65535
-	add	x0, x20, :lo12:.LANCHOR71
-	ldrh	w1, [x20, #:lo12:.LANCHOR71]
+	add	x0, x19, :lo12:.LANCHOR70
+	ldrh	w1, [x19, #:lo12:.LANCHOR70]
 	cmp	w1, w2
-	beq	.L3869
+	beq	.L3901
 	ldrh	w2, [x0, 24]
-	cbz	w2, .L3924
+	cbz	w2, .L3958
 	mov	w1, 4
 	strh	wzr, [x0, 26]
-	strb	w1, [x19, #:lo12:.LANCHOR159]
-	b	.L3965
-.L3924:
+	strb	w1, [x20, #:lo12:.LANCHOR156]
+	b	.L3999
+.L3958:
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR159]
-	adrp	x0, .LANCHOR9
+	strb	w0, [x20, #:lo12:.LANCHOR156]
+	adrp	x0, .LANCHOR11
 	ubfiz	x1, x1, 1, 16
-	mov	x19, x0
-	ldr	x2, [x0, #:lo12:.LANCHOR9]
+	mov	x20, x0
+	ldr	x2, [x0, #:lo12:.LANCHOR11]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L3925
+	cbz	w1, .L3959
 	adrp	x1, .LANCHOR237
 	adrp	x0, .LC0
-	mov	w2, 3183
+	mov	w2, 3336
 	add	x1, x1, :lo12:.LANCHOR237
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3925:
-	ldrh	w0, [x20, #:lo12:.LANCHOR71]
-	add	x21, x20, :lo12:.LANCHOR71
+.L3959:
+	ldrh	w0, [x19, #:lo12:.LANCHOR70]
+	add	x21, x19, :lo12:.LANCHOR70
 	bl	ftl_free_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR9]
-	ldrh	w1, [x20, #:lo12:.LANCHOR71]
+	ldr	x0, [x20, #:lo12:.LANCHOR11]
+	ldrh	w1, [x19, #:lo12:.LANCHOR70]
 	strh	wzr, [x0, x1, lsl 1]
 	ldrh	w0, [x21, 30]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w0, 8
-	bhi	.L3926
+	bhi	.L3960
 	strh	w0, [x21, 30]
-	b	.L3922
-.L3926:
+	b	.L3956
+.L3960:
 	strh	wzr, [x21, 30]
 	bl	ftl_flush
 	bl	pm_flush
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L3922
-.L3856:
-	adrp	x20, .LANCHOR71
-	adrp	x23, .LANCHOR95
-	add	x22, x20, :lo12:.LANCHOR71
-	add	x23, x23, :lo12:.LANCHOR95
-.L4010:
+	b	.L3956
+.L3888:
+	adrp	x19, .LANCHOR70
+	adrp	x23, .LANCHOR94
+	add	x22, x19, :lo12:.LANCHOR70
+	add	x23, x23, :lo12:.LANCHOR94
+.L4048:
 	bl	gc_scan_src_blk_one_page
 	ldrh	w1, [x22, 2]
 	ldrh	w0, [x23]
 	cmp	w1, w0
-	bcs	.L3928
+	bcs	.L3962
 	cmp	w21, 7
-	bls	.L4010
-	b	.L3965
-.L3928:
+	bls	.L4048
+	b	.L3999
+.L3962:
 	ldrh	w3, [x22, 24]
 	ldrh	w1, [x22]
-	cbz	w3, .L3929
+	cbz	w3, .L3963
 	mov	w0, 4
-	strb	w0, [x19, #:lo12:.LANCHOR159]
-	adrp	x19, .LANCHOR9
+	strb	w0, [x20, #:lo12:.LANCHOR156]
+	adrp	x20, .LANCHOR11
 	ubfiz	x0, x1, 1, 16
 	strh	wzr, [x22, 26]
-	ldr	x2, [x19, #:lo12:.LANCHOR9]
+	ldr	x2, [x20, #:lo12:.LANCHOR11]
 	ldrh	w2, [x2, x0]
 	cmp	w3, w2
-	beq	.L3930
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L3930
-	adrp	x0, .LC237
-	add	x0, x0, :lo12:.LC237
+	beq	.L3964
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 10, .L3964
+	adrp	x0, .LC240
+	add	x0, x0, :lo12:.LC240
 	bl	printf
-.L3930:
-	ldrh	w2, [x20, #:lo12:.LANCHOR71]
-	add	x0, x20, :lo12:.LANCHOR71
-	ldr	x1, [x19, #:lo12:.LANCHOR9]
+.L3964:
+	ldrh	w2, [x19, #:lo12:.LANCHOR70]
+	add	x0, x19, :lo12:.LANCHOR70
+	ldr	x1, [x20, #:lo12:.LANCHOR11]
 	ldrh	w0, [x0, 24]
 	ldrh	w1, [x1, x2, lsl 1]
 	cmp	w1, w0
-	beq	.L3931
+	beq	.L3965
 	adrp	x1, .LANCHOR237
 	adrp	x0, .LC0
-	mov	w2, 3226
+	mov	w2, 3379
 	add	x1, x1, :lo12:.LANCHOR237
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3931:
-	add	x0, x20, :lo12:.LANCHOR71
-	ldrh	w1, [x20, #:lo12:.LANCHOR71]
+.L3965:
+	add	x0, x19, :lo12:.LANCHOR70
+	ldrh	w1, [x19, #:lo12:.LANCHOR70]
 	ldrh	w2, [x0, 24]
-	ldr	x0, [x19, #:lo12:.LANCHOR9]
+	ldr	x0, [x20, #:lo12:.LANCHOR11]
 	strh	w2, [x0, x1, lsl 1]
-	b	.L3965
-.L3929:
-	adrp	x0, .LANCHOR7
-	ldr	x21, [x0, #:lo12:.LANCHOR7]
+	b	.L3999
+.L3963:
+	adrp	x0, .LANCHOR9
+	ldr	x21, [x0, #:lo12:.LANCHOR9]
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR159]
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	strb	w0, [x20, #:lo12:.LANCHOR156]
+	adrp	x0, .LANCHOR19
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
 	add	x21, x21, x1, uxth 2
-	tbz	x0, 8, .L3932
+	tbz	x0, 8, .L3966
 	ldrb	w2, [x21, 2]
-	adrp	x0, .LC238
-	add	x0, x0, :lo12:.LC238
+	adrp	x0, .LC241
+	add	x0, x0, :lo12:.LC241
 	ubfx	x2, x2, 5, 3
 	bl	printf
-.L3932:
+.L3966:
 	ldrb	w0, [x21, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L3933
+	beq	.L3967
 	tst	w0, 192
-	bne	.L3934
-.L3933:
+	bne	.L3968
+.L3967:
 	adrp	x1, .LANCHOR237
 	adrp	x0, .LC0
-	mov	w2, 3236
+	mov	w2, 3389
 	add	x1, x1, :lo12:.LANCHOR237
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3934:
-	ldrh	w0, [x20, #:lo12:.LANCHOR71]
-	add	x19, x20, :lo12:.LANCHOR71
+.L3968:
+	ldrh	w0, [x19, #:lo12:.LANCHOR70]
+	add	x20, x19, :lo12:.LANCHOR70
 	bl	ftl_free_sblk
 	mov	w0, -1
-	strh	w0, [x20, #:lo12:.LANCHOR71]
-	ldrh	w0, [x19, 30]
+	strh	w0, [x19, #:lo12:.LANCHOR70]
+	ldrh	w0, [x20, 30]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w0, 8
-	bhi	.L3935
-	strh	w0, [x19, 30]
-	b	.L3965
-.L3935:
-	strh	wzr, [x19, 30]
-.L4045:
+	bhi	.L3969
+	strh	w0, [x20, 30]
+	b	.L3999
+.L3969:
+	strh	wzr, [x20, 30]
+.L4085:
 	bl	flt_sys_flush
-	b	.L3965
-.L3857:
+	b	.L3999
+.L3889:
 	ldrh	w1, [x26, 80]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L3936
-	adrp	x0, .LANCHOR85
-	ldrb	w22, [x0, #:lo12:.LANCHOR85]
-	cmp	w22, 1
-	bne	.L3936
+	bne	.L3970
+	adrp	x0, .LANCHOR84
+	ldrb	w19, [x0, #:lo12:.LANCHOR84]
+	cmp	w19, 1
+	bne	.L3970
 	bl	ftl_flush
-	adrp	x0, .LANCHOR71
-	add	x1, x0, :lo12:.LANCHOR71
+	adrp	x0, .LANCHOR70
+	add	x1, x0, :lo12:.LANCHOR70
 	mov	x20, x0
-	ldrh	w1, [x1, 2110]
-	cbz	w1, .L3937
-	mov	w0, w22
+	ldrh	w1, [x1, 2192]
+	cbz	w1, .L3971
+	mov	w0, w19
 	mov	w1, 5
-.L4041:
+.L4080:
 	bl	zftl_gc_get_free_sblk
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L3939
-	adrp	x0, .LANCHOR7
-	ldr	x21, [x0, #:lo12:.LANCHOR7]
+	beq	.L3973
+	adrp	x0, .LANCHOR9
+	ldr	x21, [x0, #:lo12:.LANCHOR9]
 	add	x21, x21, x19, uxth 2
 	ldrb	w0, [x21, 2]
 	tst	w0, 224
-	beq	.L3940
+	beq	.L3974
 	adrp	x1, .LANCHOR237
 	adrp	x0, .LC0
-	mov	w2, 3270
+	mov	w2, 3423
 	add	x1, x1, :lo12:.LANCHOR237
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3940:
+.L3974:
 	ldrb	w0, [x21, 2]
 	mov	w1, 5
 	bfi	w0, w1, 5, 3
 	orr	w0, w0, 16
 	strb	w0, [x21, 2]
-.L3964:
+.L3998:
 	mov	w1, 1
 	mov	w0, w19
 	bl	ftl_erase_sblk
-	adrp	x22, .LANCHOR86
+	adrp	x22, .LANCHOR85
 	mov	w0, 5
 	strb	w0, [x26, 84]
 	add	x1, x26, 96
 	mov	w0, w19
 	bl	ftl_get_blk_list_in_sblk
 	and	w0, w0, 255
-	adrp	x1, .LANCHOR95
-	adrp	x21, .LANCHOR80
+	adrp	x1, .LANCHOR94
+	adrp	x21, .LANCHOR79
 	strb	w0, [x26, 89]
-	ldrh	w1, [x1, #:lo12:.LANCHOR95]
-	ldrh	w2, [x22, #:lo12:.LANCHOR86]
+	ldrh	w1, [x1, #:lo12:.LANCHOR94]
+	ldrh	w2, [x22, #:lo12:.LANCHOR85]
 	strh	w19, [x26, 80]
 	strh	wzr, [x26, 82]
 	mul	w0, w0, w1
 	strb	wzr, [x26, 85]
 	strh	w0, [x26, 86]
 	mov	w1, 255
-	ldrb	w0, [x21, #:lo12:.LANCHOR80]
+	ldrb	w0, [x21, #:lo12:.LANCHOR79]
 	strh	wzr, [x26, 90]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR162
-	ldr	x0, [x0, #:lo12:.LANCHOR162]
+	adrp	x0, .LANCHOR159
+	ldr	x0, [x0, #:lo12:.LANCHOR159]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	ldrb	w0, [x21, #:lo12:.LANCHOR80]
+	ldrb	w0, [x21, #:lo12:.LANCHOR79]
 	mov	w1, 255
-	ldrh	w2, [x22, #:lo12:.LANCHOR86]
+	ldrh	w2, [x22, #:lo12:.LANCHOR85]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR163
-	ldr	x0, [x0, #:lo12:.LANCHOR163]
+	adrp	x0, .LANCHOR160
+	ldr	x0, [x0, #:lo12:.LANCHOR160]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	ldrb	w0, [x21, #:lo12:.LANCHOR80]
+	ldrb	w0, [x21, #:lo12:.LANCHOR79]
 	mov	w1, 255
-	ldrh	w2, [x22, #:lo12:.LANCHOR86]
+	ldrh	w2, [x22, #:lo12:.LANCHOR85]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR83
-	ldr	x0, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR82
+	ldr	x0, [x0, #:lo12:.LANCHOR82]
 	bl	ftl_memset
-	ldr	x0, [x23, #:lo12:.LANCHOR10]
+	ldr	x0, [x23, #:lo12:.LANCHOR12]
 	mov	w1, -1
 	str	w19, [x0, 132]
 	strh	w1, [x0, 128]
@@ -25353,106 +26002,106 @@ zftl_do_gc:
 	mov	w1, -1
 	ldr	x0, [x0, #:lo12:.LANCHOR110]
 	strh	w19, [x0, 126]
-	add	x0, x20, :lo12:.LANCHOR71
-	str	w1, [x0, 2116]
+	add	x0, x20, :lo12:.LANCHOR70
+	str	w1, [x0, 2196]
 	strh	wzr, [x0, 2106]
 	strh	wzr, [x0, 56]
 	strh	wzr, [x0, 2108]
-	strh	wzr, [x0, 2112]
+	strh	wzr, [x0, 2194]
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L3965
-.L3937:
+	b	.L3999
+.L3971:
 	mov	w1, 5
 	mov	w0, 0
-	b	.L4041
-.L3936:
+	b	.L4080
+.L3970:
 	cmp	w25, 1
-	mov	w22, 4
-	csinc	w22, w22, wzr, eq
+	mov	w24, 4
+	csinc	w24, w24, wzr, eq
 	cmp	w21, 15
-	mov	w0, w22
-	add	w22, w22, 4
-	adrp	x25, .LANCHOR85
-	adrp	x21, .LANCHOR71
-	csel	w22, w22, w0, ls
-	add	x25, x25, :lo12:.LANCHOR85
-	add	x20, x21, :lo12:.LANCHOR71
+	mov	w0, w24
+	add	w24, w24, 4
+	adrp	x25, .LANCHOR84
+	adrp	x21, .LANCHOR70
+	csel	w24, w24, w0, ls
+	add	x25, x25, :lo12:.LANCHOR84
+	add	x19, x21, :lo12:.LANCHOR70
 	add	x27, x26, 80
-.L3943:
-	sub	w22, w22, #1
-	and	w22, w22, 255
-	cmp	w22, 255
-	beq	.L3965
+.L3977:
+	sub	w24, w24, #1
+	and	w24, w24, 255
+	cmp	w24, 255
+	beq	.L3999
 	bl	gc_do_copy_back
 	ldrb	w0, [x25]
-	cbnz	w0, .L3944
-	adrp	x0, .LANCHOR58
-	ldrb	w0, [x0, #:lo12:.LANCHOR58]
+	cbnz	w0, .L3978
+	adrp	x0, .LANCHOR57
+	ldrb	w0, [x0, #:lo12:.LANCHOR57]
 	cmp	w0, 3
-	bhi	.L3945
+	bhi	.L3979
 	bl	ftl_write_commit
-.L3945:
-	ldrh	w1, [x20, 26]
-	ldrh	w0, [x20, 24]
+.L3979:
+	ldrh	w1, [x19, 26]
+	ldrh	w0, [x19, 24]
 	cmp	w1, w0
-	bcc	.L3943
+	bcc	.L3977
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR159]
+	strb	w0, [x20, #:lo12:.LANCHOR156]
 	bl	ftl_write_commit
 	bl	ftl_flush
-	adrp	x0, .LANCHOR9
-	ldrh	w2, [x20]
+	adrp	x0, .LANCHOR11
+	ldrh	w2, [x19]
 	mov	x19, x0
-	ldr	x1, [x0, #:lo12:.LANCHOR9]
+	ldr	x1, [x0, #:lo12:.LANCHOR11]
 	ldrh	w1, [x1, x2, lsl 1]
-	cbz	w1, .L3947
+	cbz	w1, .L3981
 	adrp	x1, .LANCHOR237
 	adrp	x0, .LC0
-	mov	w2, 3354
+	mov	w2, 3507
 	add	x1, x1, :lo12:.LANCHOR237
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3947:
-	ldrh	w0, [x21, #:lo12:.LANCHOR71]
-	ldr	x2, [x19, #:lo12:.LANCHOR9]
+.L3981:
+	ldrh	w0, [x21, #:lo12:.LANCHOR70]
+	ldr	x2, [x19, #:lo12:.LANCHOR11]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L3948
+	cbnz	w1, .L3982
 	bl	ftl_free_sblk
-	b	.L3922
-.L3948:
+	b	.L3956
+.L3982:
 	mov	w2, 1
 	mov	w1, 0
 	bl	gc_add_sblk
-	b	.L3922
-.L3944:
-	ldrh	w0, [x20, 2112]
-	cbz	w0, .L3949
-	strh	wzr, [x20, 2112]
+	b	.L3956
+.L3978:
+	ldrh	w0, [x19, 2194]
+	cbz	w0, .L3983
+	strh	wzr, [x19, 2194]
 	bl	sblk_wait_write_queue_completed
 	bl	gc_write_completed
-	ldr	w0, [x20, 2116]
-	adrp	x20, .LANCHOR110
+	ldr	w0, [x19, 2196]
+	adrp	x19, .LANCHOR110
 	cmn	w0, #1
-	beq	.L3950
+	beq	.L3984
 	adrp	x1, .LANCHOR124
 	ldrb	w1, [x1, #:lo12:.LANCHOR124]
-	cbnz	w1, .L3951
-	adrp	x1, .LANCHOR81
-	ldrb	w1, [x1, #:lo12:.LANCHOR81]
-	cbz	w1, .L3952
-.L3951:
-	ldr	x1, [x20, #:lo12:.LANCHOR110]
+	cbnz	w1, .L3985
+	adrp	x1, .LANCHOR80
+	ldrb	w1, [x1, #:lo12:.LANCHOR80]
+	cbz	w1, .L3986
+.L3985:
+	ldr	x1, [x19, #:lo12:.LANCHOR110]
 	ldr	w2, [x1, 156]
 	mov	w1, 20041
 	movk	w1, 0x444b, lsl 16
 	cmp	w2, w1
-	bne	.L3952
-	adrp	x1, .LANCHOR75
-	ldrh	w3, [x1, #:lo12:.LANCHOR75]
-	adrp	x1, .LANCHOR32
-	ldrb	w2, [x1, #:lo12:.LANCHOR32]
+	bne	.L3986
+	adrp	x1, .LANCHOR74
+	ldrh	w3, [x1, #:lo12:.LANCHOR74]
+	adrp	x1, .LANCHOR31
+	ldrb	w2, [x1, #:lo12:.LANCHOR31]
 	mov	w1, 24
 	lsr	w0, w0, w3
 	sub	w1, w1, w2
@@ -25461,26 +26110,26 @@ zftl_do_gc:
 	lsl	w1, w1, w2
 	sub	w1, w1, #1
 	and	w0, w1, w0
-	adrp	x1, .LANCHOR76
-	ldrb	w1, [x1, #:lo12:.LANCHOR76]
+	adrp	x1, .LANCHOR75
+	ldrb	w1, [x1, #:lo12:.LANCHOR75]
 	udiv	w0, w0, w1
-	adrp	x1, .LANCHOR7
-	ldr	x2, [x1, #:lo12:.LANCHOR7]
+	adrp	x1, .LANCHOR9
+	ldr	x2, [x1, #:lo12:.LANCHOR9]
 	lsl	x0, x0, 2
 	add	x4, x2, x0
 	ldrb	w1, [x4, 2]
-	tbz	x1, 3, .L3950
+	tbz	x1, 3, .L3984
 	adrp	x5, .LANCHOR98
-	ldrh	w3, [x24, #:lo12:.LANCHOR103]
+	ldrh	w3, [x22, #:lo12:.LANCHOR103]
 	ldrh	w5, [x5, #:lo12:.LANCHOR98]
 	add	w3, w3, 8
 	cmp	w3, w5
-	bge	.L3950
+	bge	.L3984
 	and	w1, w1, -25
 	strb	w1, [x4, 2]
-	adrp	x1, .LANCHOR8
+	adrp	x1, .LANCHOR10
 	ldr	w3, [x2, x0]
-	ldrh	w1, [x1, #:lo12:.LANCHOR8]
+	ldrh	w1, [x1, #:lo12:.LANCHOR10]
 	ldrh	w4, [x2, x0]
 	ubfx	x3, x3, 11, 8
 	and	w5, w4, 2047
@@ -25493,155 +26142,155 @@ zftl_do_gc:
 	ldr	w1, [x2, x0]
 	bfi	w1, w3, 11, 8
 	str	w1, [x2, x0]
-.L3950:
-	ldr	x0, [x23, #:lo12:.LANCHOR10]
-	add	x22, x21, :lo12:.LANCHOR71
+.L3984:
+	ldr	x0, [x23, #:lo12:.LANCHOR12]
+	add	x22, x21, :lo12:.LANCHOR70
 	strh	wzr, [x22, 56]
 	ldrh	w0, [x0, 80]
-	str	wzr, [x22, 2116]
+	str	wzr, [x22, 2196]
 	bl	ftl_free_sblk
-	ldr	x1, [x23, #:lo12:.LANCHOR10]
+	ldr	x1, [x23, #:lo12:.LANCHOR12]
 	mov	w0, -1
-	ldr	x2, [x20, #:lo12:.LANCHOR110]
+	ldr	x2, [x19, #:lo12:.LANCHOR110]
 	strh	w0, [x1, 80]
 	strh	w0, [x2, 126]
 	strh	w0, [x1, 130]
 	ldr	x0, [x22, 8]
-	cbz	x0, .L3953
+	cbz	x0, .L3987
 	bl	zbuf_free
-.L3953:
-	add	x21, x21, :lo12:.LANCHOR71
+.L3987:
+	add	x21, x21, :lo12:.LANCHOR70
 	str	xzr, [x21, 8]
 	bl	flt_sys_flush
-	mov	w2, 3413
-	strb	wzr, [x19, #:lo12:.LANCHOR159]
+	mov	w2, 3567
+	strb	wzr, [x20, #:lo12:.LANCHOR156]
 	adrp	x1, .LANCHOR237
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR237
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3965
-.L3952:
+	b	.L3999
+.L3986:
 	bl	ftl_mask_bad_block
-	b	.L3950
-.L3949:
+	b	.L3984
+.L3983:
 	ldrh	w0, [x27, 6]
-	ldrh	w1, [x20, 26]
+	ldrh	w1, [x19, 26]
 	cmp	w0, 1
-	ldrh	w0, [x20, 24]
-	bls	.L3954
+	ldrh	w0, [x19, 24]
+	bls	.L3988
 	cmp	w1, w0
-	bcc	.L3943
+	bcc	.L3977
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR159]
-	ldrh	w0, [x20, 56]
+	strb	w0, [x20, #:lo12:.LANCHOR156]
+	ldrh	w0, [x19, 56]
 	add	w1, w0, 1
-	strh	w1, [x20, 56]
-	add	x0, x20, x0, sxtw 1
-	ldrh	w1, [x20]
+	strh	w1, [x19, 56]
+	add	x0, x19, x0, sxtw 1
+	ldrh	w1, [x19]
 	strh	w1, [x0, 58]
 	mov	w0, -1
-	strh	w0, [x20]
-	b	.L3965
-.L3954:
+	strh	w0, [x19]
+	b	.L3999
+.L3988:
 	mov	w2, 5
-	strb	w2, [x19, #:lo12:.LANCHOR159]
+	strb	w2, [x20, #:lo12:.LANCHOR156]
 	cmp	w1, w0
-	bcc	.L3955
-	ldrh	w0, [x20, 56]
+	bcc	.L3989
+	ldrh	w0, [x19, 56]
 	add	w1, w0, 1
-	strh	w1, [x20, 56]
-	add	x0, x20, x0, sxtw 1
-	ldrh	w1, [x20]
+	strh	w1, [x19, 56]
+	add	x0, x19, x0, sxtw 1
+	ldrh	w1, [x19]
 	strh	w1, [x0, 58]
 	mov	w0, -1
-	strh	w0, [x20]
-.L3955:
+	strh	w0, [x19]
+.L3989:
 	bl	ftl_flush
 	bl	sblk_wait_write_queue_completed
 	bl	gc_write_completed
-	ldr	x0, [x23, #:lo12:.LANCHOR10]
+	ldr	x0, [x23, #:lo12:.LANCHOR12]
 	ldrh	w1, [x26, 80]
 	strh	w1, [x0, 128]
 	bl	pm_flush
 	bl	ftl_ext_info_flush
-	adrp	x1, .LANCHOR95
-	add	x0, x21, :lo12:.LANCHOR71
-	adrp	x2, .LANCHOR36
-	ldrh	w1, [x1, #:lo12:.LANCHOR95]
+	adrp	x1, .LANCHOR94
+	add	x0, x21, :lo12:.LANCHOR70
+	adrp	x2, .LANCHOR35
+	ldrh	w1, [x1, #:lo12:.LANCHOR94]
 	strh	w1, [x0, 18]
-	adrp	x1, .LANCHOR79
-	ldrb	w2, [x2, #:lo12:.LANCHOR36]
+	adrp	x1, .LANCHOR78
+	ldrb	w2, [x2, #:lo12:.LANCHOR35]
 	strh	wzr, [x0, 16]
-	ldrb	w1, [x1, #:lo12:.LANCHOR79]
+	ldrb	w1, [x1, #:lo12:.LANCHOR78]
 	strh	w1, [x0, 20]
-	cbz	w2, .L3956
-	adrp	x2, .LANCHOR86
-	ldrh	w2, [x2, #:lo12:.LANCHOR86]
+	cbz	w2, .L3990
+	adrp	x2, .LANCHOR85
+	ldrh	w2, [x2, #:lo12:.LANCHOR85]
 	strh	w2, [x0, 18]
 	mov	w2, 1
 	strh	w2, [x0, 20]
-.L3956:
+.L3990:
 	cmp	w1, 2
-	bne	.L3958
-	add	x0, x21, :lo12:.LANCHOR71
+	bne	.L3992
+	add	x0, x21, :lo12:.LANCHOR70
 	ldrh	w1, [x0, 18]
 	ubfiz	w1, w1, 1, 15
 	strh	w1, [x0, 18]
-	adrp	x1, .LANCHOR81
-	ldrb	w1, [x1, #:lo12:.LANCHOR81]
-	cbnz	w1, .L3958
+	adrp	x1, .LANCHOR80
+	ldrb	w1, [x1, #:lo12:.LANCHOR80]
+	cbnz	w1, .L3992
 	mov	w1, 1
 	strh	w1, [x0, 20]
-.L3958:
-	add	x21, x21, :lo12:.LANCHOR71
+.L3992:
+	add	x21, x21, :lo12:.LANCHOR70
 	strh	wzr, [x21, 22]
-	b	.L3965
-.L3961:
+	b	.L3999
+.L3995:
 	ldrh	w1, [x24, 16]
 	ldrh	w0, [x24, 18]
 	cmp	w1, w0
-	bcc	.L3962
+	bcc	.L3996
 	mov	w0, 6
-	strb	w0, [x19, #:lo12:.LANCHOR159]
+	strb	w0, [x20, #:lo12:.LANCHOR156]
 	ldr	x0, [x24, 8]
 	bl	zbuf_free
 	str	xzr, [x24, 8]
-	b	.L3965
-.L3962:
+	b	.L3999
+.L3996:
 	cmp	w21, 15
-	bls	.L3860
+	bls	.L3892
 	cmp	w25, 1
-	bne	.L3965
+	bne	.L3999
 	add	w22, w22, 1
 	and	w22, w22, 255
 	cmp	w22, 4
-	bls	.L3860
-	b	.L3965
-.L3859:
+	bls	.L3892
+	b	.L3999
+.L3891:
 	bl	gc_update_l2p_map_new
-	mov	w20, -1
+	mov	w19, -1
 	bl	gc_free_src_blk
 	bl	ftl_flush
 	bl	pm_flush
-	strh	w20, [x26, 80]
+	strh	w19, [x26, 80]
 	bl	ftl_ext_info_flush
 	adrp	x0, .LANCHOR110
 	ldr	x0, [x0, #:lo12:.LANCHOR110]
-	strh	w20, [x0, 126]
+	strh	w19, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L4046:
-	strb	wzr, [x19, #:lo12:.LANCHOR159]
-	b	.L3965
-.L3939:
-	mov	w2, 3277
+.L4086:
+	strb	wzr, [x20, #:lo12:.LANCHOR156]
+	b	.L3999
+.L3973:
+	mov	w2, 3430
 	adrp	x1, .LANCHOR237
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR237
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3964
+	b	.L3998
 	.size	zftl_do_gc, .-zftl_do_gc
 	.section	.text.zftl_init,"ax",@progbits
 	.align	2
@@ -25649,84 +26298,84 @@ zftl_do_gc:
 	.type	zftl_init, %function
 zftl_init:
 	stp	x29, x30, [sp, -112]!
-	adrp	x1, .LANCHOR66
+	adrp	x1, .LANCHOR65
 	mov	w0, -1
 	add	x29, sp, 0
-	strb	w0, [x1, #:lo12:.LANCHOR66]
-	adrp	x1, .LANCHOR67
+	strb	w0, [x1, #:lo12:.LANCHOR65]
+	adrp	x1, .LANCHOR66
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR95
-	strb	wzr, [x1, #:lo12:.LANCHOR67]
+	adrp	x22, .LANCHOR94
+	strb	wzr, [x1, #:lo12:.LANCHOR66]
 	adrp	x1, .LANCHOR133
 	stp	x19, x20, [sp, 16]
-	adrp	x21, .LANCHOR80
+	adrp	x21, .LANCHOR79
 	strb	w0, [x1, #:lo12:.LANCHOR133]
 	adrp	x1, .LANCHOR134
 	stp	x23, x24, [sp, 48]
 	adrp	x20, .LANCHOR221
 	strb	wzr, [x1, #:lo12:.LANCHOR134]
-	adrp	x1, .LANCHOR185
+	adrp	x1, .LANCHOR182
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LANCHOR6
-	strb	w0, [x1, #:lo12:.LANCHOR185]
+	adrp	x23, .LANCHOR8
+	strb	w0, [x1, #:lo12:.LANCHOR182]
 	adrp	x0, .LANCHOR129
 	mov	w1, -1
 	stp	x27, x28, [sp, 80]
 	strb	wzr, [x0, #:lo12:.LANCHOR129]
 	adrp	x0, .LANCHOR238
 	str	w1, [x0, #:lo12:.LANCHOR238]
-	adrp	x1, .LC239
-	adrp	x0, .LC104
-	add	x1, x1, :lo12:.LC239
-	add	x0, x0, :lo12:.LC104
+	adrp	x1, .LC242
+	adrp	x0, .LC101
+	add	x1, x1, :lo12:.LC242
+	add	x0, x0, :lo12:.LC101
 	bl	printf
-	adrp	x1, .LANCHOR33
-	add	x1, x1, :lo12:.LANCHOR33
-	adrp	x0, .LANCHOR79
+	adrp	x1, .LANCHOR32
+	add	x1, x1, :lo12:.LANCHOR32
+	adrp	x0, .LANCHOR78
 	adrp	x2, .LANCHOR131
 	adrp	x3, .LANCHOR112
-	adrp	x4, .LANCHOR76
+	adrp	x4, .LANCHOR75
 	ldrb	w7, [x1, 12]
-	strb	w7, [x0, #:lo12:.LANCHOR79]
+	strb	w7, [x0, #:lo12:.LANCHOR78]
 	ldrb	w0, [x1, 9]
 	strb	w0, [x2, #:lo12:.LANCHOR131]
-	adrp	x2, .LANCHOR86
+	adrp	x2, .LANCHOR85
 	ldrh	w5, [x1, 10]
-	strh	w5, [x2, #:lo12:.LANCHOR86]
-	adrp	x2, .LANCHOR18
+	strh	w5, [x2, #:lo12:.LANCHOR85]
+	adrp	x2, .LANCHOR23
 	ldrh	w8, [x1, 14]
 	ubfiz	w6, w0, 9, 7
-	ldrb	w2, [x2, #:lo12:.LANCHOR18]
+	ldrb	w2, [x2, #:lo12:.LANCHOR23]
 	sdiv	w11, w5, w7
 	strb	w2, [x3, #:lo12:.LANCHOR112]
 	ldrb	w3, [x1, 13]
 	adrp	x1, .LANCHOR2
-	strb	w3, [x4, #:lo12:.LANCHOR76]
+	strb	w3, [x4, #:lo12:.LANCHOR75]
 	ldrh	w4, [x1, #:lo12:.LANCHOR2]
 	adrp	x1, .LANCHOR111
-	strh	w11, [x22, #:lo12:.LANCHOR95]
+	strh	w11, [x22, #:lo12:.LANCHOR94]
 	mul	w2, w2, w3
 	strh	w4, [x1, #:lo12:.LANCHOR111]
-	strh	w8, [x23, #:lo12:.LANCHOR6]
+	strh	w8, [x23, #:lo12:.LANCHOR8]
 	mov	w3, 1
 	and	w2, w2, 255
 	strh	w6, [x20, #:lo12:.LANCHOR221]
-	strb	w2, [x21, #:lo12:.LANCHOR80]
+	strb	w2, [x21, #:lo12:.LANCHOR79]
 	mov	w1, 0
-.L4049:
+.L4089:
 	cmp	w4, w3
-	bcs	.L4050
+	bcs	.L4090
 	mul	w10, w0, w5
-	adrp	x3, .LANCHOR75
+	adrp	x3, .LANCHOR74
 	sub	w1, w1, #1
 	mov	w4, 0
-	strh	w1, [x3, #:lo12:.LANCHOR75]
+	strh	w1, [x3, #:lo12:.LANCHOR74]
 	mov	w1, 1
 	mul	w3, w8, w10
 	lsr	w12, w3, 21
-.L4051:
+.L4091:
 	cmp	w12, w1
-	bcs	.L4052
+	bcs	.L4092
 	mov	w1, 57344
 	sub	w4, w4, #1
 	movk	w1, 0x1c, lsl 16
@@ -25734,16 +26383,16 @@ zftl_init:
 	adrp	x28, .LANCHOR128
 	sub	w12, w6, #1
 	mul	w1, w2, w1
-	adrp	x24, .LANCHOR204
+	adrp	x24, .LANCHOR202
 	mul	w11, w11, w2
 	adrp	x27, .LANCHOR240
 	mul	w10, w10, w2
-	adrp	x26, .LANCHOR155
+	adrp	x26, .LANCHOR152
 	lsl	w1, w1, w4
-	adrp	x4, .LANCHOR68
+	adrp	x4, .LANCHOR67
 	sub	w10, w10, #1
 	adrp	x25, .LANCHOR98
-	str	w1, [x4, #:lo12:.LANCHOR68]
+	str	w1, [x4, #:lo12:.LANCHOR67]
 	adrp	x4, .LANCHOR239
 	lsr	w8, w8, 4
 	strh	w8, [x25, #:lo12:.LANCHOR98]
@@ -25757,65 +26406,65 @@ zftl_init:
 	add	w0, w12, w0, lsl 2
 	add	w3, w3, 8
 	udiv	w0, w0, w6
-	strh	w0, [x24, #:lo12:.LANCHOR204]
+	strh	w0, [x24, #:lo12:.LANCHOR202]
 	ubfiz	w0, w0, 4, 16
 	sdiv	w0, w0, w11
-	strh	w0, [x26, #:lo12:.LANCHOR155]
+	strh	w0, [x26, #:lo12:.LANCHOR152]
 	adrp	x0, .LANCHOR101
 	str	x0, [x29, 104]
 	strh	w3, [x0, #:lo12:.LANCHOR101]
-	bhi	.L4053
+	bhi	.L4093
 	mov	w0, 80
 	strh	w0, [x25, #:lo12:.LANCHOR98]
-.L4053:
+.L4093:
 	adrp	x12, .LANCHOR126
 	mov	w0, 2000
 	adrp	x11, .LANCHOR125
-	adrp	x3, .LANCHOR152
+	adrp	x3, .LANCHOR149
 	strh	w0, [x12, #:lo12:.LANCHOR126]
 	mov	w0, 50
-	adrp	x8, .LANCHOR153
+	adrp	x8, .LANCHOR150
 	strh	w0, [x11, #:lo12:.LANCHOR125]
 	mov	w0, 256
-	strh	w0, [x3, #:lo12:.LANCHOR152]
+	strh	w0, [x3, #:lo12:.LANCHOR149]
 	mov	w0, 48
-	strh	w0, [x8, #:lo12:.LANCHOR153]
-	adrp	x0, .LANCHOR8
+	strh	w0, [x8, #:lo12:.LANCHOR150]
+	adrp	x0, .LANCHOR10
 	mov	w10, 32
 	cmp	w7, 2
 	mov	x13, x11
-	strh	w10, [x0, #:lo12:.LANCHOR8]
+	strh	w10, [x0, #:lo12:.LANCHOR10]
 	mov	x7, x12
 	mov	x14, x8
-	beq	.L4054
-	adrp	x15, .LANCHOR84
-	ldrb	w15, [x15, #:lo12:.LANCHOR84]
-	cbz	w15, .L4055
-.L4054:
+	beq	.L4094
+	adrp	x15, .LANCHOR83
+	ldrb	w15, [x15, #:lo12:.LANCHOR83]
+	cbz	w15, .L4095
+.L4094:
 	mov	w8, 150
 	strh	w8, [x13, #:lo12:.LANCHOR125]
 	mov	w8, 64
-	strh	w8, [x14, #:lo12:.LANCHOR153]
+	strh	w8, [x14, #:lo12:.LANCHOR150]
 	mov	w8, 12
-	strh	w8, [x0, #:lo12:.LANCHOR8]
+	strh	w8, [x0, #:lo12:.LANCHOR10]
 	adrp	x8, .LANCHOR0
 	ldrb	w8, [x8, #:lo12:.LANCHOR0]
-	cbnz	w8, .L4056
+	cbnz	w8, .L4096
 	mov	w8, 4
-	strh	w8, [x0, #:lo12:.LANCHOR8]
+	strh	w8, [x0, #:lo12:.LANCHOR10]
 	mov	w0, 600
 	strh	w0, [x7, #:lo12:.LANCHOR126]
 	mov	w0, 128
-	strh	w0, [x3, #:lo12:.LANCHOR152]
-.L4056:
-	adrp	x0, .LANCHOR37
-	ldrb	w0, [x0, #:lo12:.LANCHOR37]
-	cbz	w0, .L4058
+	strh	w0, [x3, #:lo12:.LANCHOR149]
+.L4096:
+	adrp	x0, .LANCHOR36
+	ldrb	w0, [x0, #:lo12:.LANCHOR36]
+	cbz	w0, .L4098
 	mov	w0, 200
 	strh	w0, [x13, #:lo12:.LANCHOR125]
 	mov	w0, 2000
 	strh	w0, [x7, #:lo12:.LANCHOR126]
-.L4058:
+.L4098:
 	adrp	x0, .LANCHOR122
 	mul	w2, w5, w2
 	mov	w3, 1
@@ -25823,186 +26472,186 @@ zftl_init:
 	adrp	x0, .LANCHOR224
 	cmp	w6, w2, lsl 2
 	strb	w3, [x0, #:lo12:.LANCHOR224]
-	bge	.L4060
+	bge	.L4100
 	mov	w2, 2
 	strb	w2, [x0, #:lo12:.LANCHOR224]
-.L4060:
-	adrp	x19, .LANCHOR14
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L4061
+.L4100:
+	adrp	x19, .LANCHOR19
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L4101
 	str	x4, [x29, 96]
-	adrp	x0, .LC240
-	add	x0, x0, :lo12:.LC240
-	bl	printf
-	ldr	x4, [x29, 96]
-.L4061:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L4062
-	ldr	w1, [x4, #:lo12:.LANCHOR239]
-	adrp	x0, .LC241
-	add	x0, x0, :lo12:.LC241
-	bl	printf
-.L4062:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L4063
-	ldr	w1, [x28, #:lo12:.LANCHOR128]
-	adrp	x0, .LC242
-	add	x0, x0, :lo12:.LC242
-	bl	printf
-.L4063:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L4064
-	ldr	w1, [x27, #:lo12:.LANCHOR240]
 	adrp	x0, .LC243
 	add	x0, x0, :lo12:.LC243
 	bl	printf
-.L4064:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L4065
-	ldrh	w1, [x24, #:lo12:.LANCHOR204]
+	ldr	x4, [x29, 96]
+.L4101:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L4102
+	ldr	w1, [x4, #:lo12:.LANCHOR239]
 	adrp	x0, .LC244
 	add	x0, x0, :lo12:.LC244
 	bl	printf
-.L4065:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L4066
-	ldrh	w1, [x20, #:lo12:.LANCHOR221]
+.L4102:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L4103
+	ldr	w1, [x28, #:lo12:.LANCHOR128]
 	adrp	x0, .LC245
 	add	x0, x0, :lo12:.LC245
 	bl	printf
-.L4066:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L4067
-	ldrh	w1, [x26, #:lo12:.LANCHOR155]
+.L4103:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L4104
+	ldr	w1, [x27, #:lo12:.LANCHOR240]
 	adrp	x0, .LC246
 	add	x0, x0, :lo12:.LC246
 	bl	printf
-.L4067:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L4068
-	ldrh	w1, [x25, #:lo12:.LANCHOR98]
+.L4104:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L4105
+	ldrh	w1, [x24, #:lo12:.LANCHOR202]
 	adrp	x0, .LC247
 	add	x0, x0, :lo12:.LC247
 	bl	printf
-.L4068:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L4069
-	ldr	x0, [x29, 104]
-	ldrh	w1, [x0, #:lo12:.LANCHOR101]
+.L4105:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L4106
+	ldrh	w1, [x20, #:lo12:.LANCHOR221]
 	adrp	x0, .LC248
 	add	x0, x0, :lo12:.LC248
 	bl	printf
-.L4069:
+.L4106:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L4107
+	ldrh	w1, [x26, #:lo12:.LANCHOR152]
+	adrp	x0, .LC249
+	add	x0, x0, :lo12:.LC249
+	bl	printf
+.L4107:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L4108
+	ldrh	w1, [x25, #:lo12:.LANCHOR98]
+	adrp	x0, .LC250
+	add	x0, x0, :lo12:.LC250
+	bl	printf
+.L4108:
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L4109
+	ldr	x0, [x29, 104]
+	ldrh	w1, [x0, #:lo12:.LANCHOR101]
+	adrp	x0, .LC251
+	add	x0, x0, :lo12:.LC251
+	bl	printf
+.L4109:
 	bl	zbuf_init
-	adrp	x25, .LANCHOR200
+	adrp	x25, .LANCHOR197
 	mov	w0, 16384
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR195
-	str	x0, [x1, #:lo12:.LANCHOR195]
+	adrp	x1, .LANCHOR192
+	str	x0, [x1, #:lo12:.LANCHOR192]
 	mov	w0, 16384
 	bl	ftl_malloc
-	str	x0, [x25, #:lo12:.LANCHOR200]
+	str	x0, [x25, #:lo12:.LANCHOR197]
 	mov	w0, 16384
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR190
-	str	x0, [x1, #:lo12:.LANCHOR190]
+	adrp	x1, .LANCHOR187
+	str	x0, [x1, #:lo12:.LANCHOR187]
 	mov	w0, 6
-	ldrh	w1, [x23, #:lo12:.LANCHOR6]
+	ldrh	w1, [x23, #:lo12:.LANCHOR8]
 	mul	w0, w1, w0
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR4
 	str	x0, [x1, #:lo12:.LANCHOR4]
-	ldrb	w1, [x21, #:lo12:.LANCHOR80]
-	ldrh	w0, [x22, #:lo12:.LANCHOR95]
+	ldrb	w1, [x21, #:lo12:.LANCHOR79]
+	ldrh	w0, [x22, #:lo12:.LANCHOR94]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR118
-	ldr	x2, [x25, #:lo12:.LANCHOR200]
-	adrp	x25, .LANCHOR10
+	ldr	x2, [x25, #:lo12:.LANCHOR197]
+	adrp	x25, .LANCHOR12
 	str	x0, [x1, #:lo12:.LANCHOR118]
 	adrp	x0, .LANCHOR117
-	ldrh	w1, [x22, #:lo12:.LANCHOR95]
+	ldrh	w1, [x22, #:lo12:.LANCHOR94]
 	str	x2, [x0, #:lo12:.LANCHOR117]
-	ldrb	w0, [x21, #:lo12:.LANCHOR80]
+	ldrb	w0, [x21, #:lo12:.LANCHOR79]
 	mul	w1, w1, w0
 	lsl	w0, w1, 1
-	adrp	x1, .LANCHOR9
+	adrp	x1, .LANCHOR11
 	add	x3, x2, x0, sxtw 2
-	str	x3, [x1, #:lo12:.LANCHOR9]
-	ldrh	w1, [x23, #:lo12:.LANCHOR6]
+	str	x3, [x1, #:lo12:.LANCHOR11]
+	ldrh	w1, [x23, #:lo12:.LANCHOR8]
 	add	w1, w0, w1, lsr 1
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
 	add	x1, x2, x1, sxtw 2
-	str	x1, [x25, #:lo12:.LANCHOR10]
-	tbz	x0, 12, .L4070
-	adrp	x0, .LC249
-	add	x0, x0, :lo12:.LC249
+	str	x1, [x25, #:lo12:.LANCHOR12]
+	tbz	x0, 12, .L4110
+	adrp	x0, .LC252
+	add	x0, x0, :lo12:.LC252
 	bl	printf
-.L4070:
-	ldrh	w0, [x22, #:lo12:.LANCHOR95]
-	ldrb	w21, [x21, #:lo12:.LANCHOR80]
-	ldrh	w1, [x23, #:lo12:.LANCHOR6]
-	ldrh	w22, [x24, #:lo12:.LANCHOR204]
+.L4110:
+	ldrh	w0, [x22, #:lo12:.LANCHOR94]
+	ldrb	w21, [x21, #:lo12:.LANCHOR79]
+	ldrh	w1, [x23, #:lo12:.LANCHOR8]
+	ldrh	w22, [x24, #:lo12:.LANCHOR202]
 	mul	w21, w0, w21
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	ldr	w0, [x19, #:lo12:.LANCHOR19]
 	add	w21, w1, w21, lsl 2
 	lsl	w1, w1, 2
 	lsl	w21, w21, 1
 	add	w22, w1, w22, lsl 2
 	add	w21, w21, 632
 	add	w22, w22, 704
-	tbz	x0, 12, .L4071
+	tbz	x0, 12, .L4111
 	ldrh	w3, [x20, #:lo12:.LANCHOR221]
-	adrp	x0, .LC250
+	adrp	x0, .LC253
 	mov	w2, w22
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC250
+	add	x0, x0, :lo12:.LC253
 	bl	printf
-.L4071:
+.L4111:
 	ldrh	w0, [x20, #:lo12:.LANCHOR221]
 	cmp	w21, w0
-	bhi	.L4072
+	bhi	.L4112
 	cmp	w22, w0
-	bls	.L4073
-.L4072:
-.L4126:
-	b	.L4126
-.L4050:
+	bls	.L4113
+.L4112:
+.L4166:
+	b	.L4166
+.L4090:
 	add	w1, w1, 1
 	lsl	w3, w3, 1
 	and	w1, w1, 65535
-	b	.L4049
-.L4052:
+	b	.L4089
+.L4092:
 	add	w4, w4, 1
 	lsl	w1, w1, 1
 	and	w4, w4, 65535
-	b	.L4051
-.L4055:
-	adrp	x0, .LANCHOR36
-	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbz	w0, .L4058
+	b	.L4091
+.L4095:
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbz	w0, .L4098
 	mov	w0, 1200
 	strh	w10, [x11, #:lo12:.LANCHOR125]
 	strh	w0, [x12, #:lo12:.LANCHOR126]
-	strh	w10, [x8, #:lo12:.LANCHOR153]
-	b	.L4058
-.L4073:
+	strh	w10, [x8, #:lo12:.LANCHOR150]
+	b	.L4098
+.L4113:
 	bl	sblk_init
 	bl	ftl_info_blk_init
 	cmn	w0, #1
-	beq	.L4048
+	beq	.L4088
 	bl	ftl_ext_info_init
 	adrp	x19, .LANCHOR110
 	bl	gc_init
 	mov	w0, 1
 	bl	pm_init
 	bl	lpa_rebuild_hash
-	ldr	x0, [x25, #:lo12:.LANCHOR10]
+	ldr	x0, [x25, #:lo12:.LANCHOR12]
 	mov	x1, 0
 	add	x0, x0, 16
 	bl	ftl_open_sblk_recovery
-	ldr	x0, [x25, #:lo12:.LANCHOR10]
+	ldr	x0, [x25, #:lo12:.LANCHOR12]
 	add	x1, x0, 16
 	add	x0, x0, 48
 	bl	ftl_open_sblk_recovery
@@ -26010,44 +26659,44 @@ zftl_init:
 	ldr	w0, [x1, 8]
 	add	w0, w0, 16
 	str	w0, [x1, 8]
-	ldr	x0, [x25, #:lo12:.LANCHOR10]
+	ldr	x0, [x25, #:lo12:.LANCHOR12]
 	add	x0, x0, 16
 	bl	ftl_info_data_recovery
-	ldr	x0, [x25, #:lo12:.LANCHOR10]
+	ldr	x0, [x25, #:lo12:.LANCHOR12]
 	add	x0, x0, 48
 	bl	ftl_info_data_recovery
-	ldr	x0, [x25, #:lo12:.LANCHOR10]
+	ldr	x0, [x25, #:lo12:.LANCHOR12]
 	add	x0, x0, 80
 	bl	ftl_info_data_recovery
 	bl	gc_recovery
 	bl	pm_flush
 	mov	w0, 1
 	bl	ftl_total_vpn_update
-	adrp	x0, .LANCHOR198
-	ldrb	w0, [x0, #:lo12:.LANCHOR198]
-	cbz	w0, .L4075
+	adrp	x0, .LANCHOR195
+	ldrb	w0, [x0, #:lo12:.LANCHOR195]
+	cbz	w0, .L4115
 	ldr	x1, [x19, #:lo12:.LANCHOR110]
 	ldr	w0, [x1, 68]
 	add	w0, w0, 1
 	str	w0, [x1, 68]
-.L4075:
+.L4115:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
 	bl	print_ftl_debug_info
-	ldr	x0, [x25, #:lo12:.LANCHOR10]
+	ldr	x0, [x25, #:lo12:.LANCHOR12]
 	ldrh	w0, [x0, 124]
-	cbnz	w0, .L4082
+	cbnz	w0, .L4122
 	adrp	x0, .LANCHOR103
 	adrp	x1, .LANCHOR107
 	ldrh	w0, [x0, #:lo12:.LANCHOR103]
 	ldrh	w1, [x1, #:lo12:.LANCHOR107]
 	add	w0, w0, w1
 	cmp	w0, 7
-	ble	.L4082
-.L4078:
+	ble	.L4122
+.L4118:
 	mov	w0, 0
-.L4048:
+.L4088:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -26055,35 +26704,35 @@ zftl_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L4082:
+.L4122:
 	adrp	x20, .LANCHOR103
 	adrp	x21, .LANCHOR107
 	add	x20, x20, :lo12:.LANCHOR103
 	add	x21, x21, :lo12:.LANCHOR107
 	mov	w19, 16384
-.L4079:
+.L4119:
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
 	mov	w1, 1
 	mov	w0, w1
 	bl	zftl_do_gc
-	ldr	x0, [x25, #:lo12:.LANCHOR10]
+	ldr	x0, [x25, #:lo12:.LANCHOR12]
 	ldrh	w1, [x0, 124]
-	cbnz	w1, .L4077
+	cbnz	w1, .L4117
 	ldrh	w1, [x0, 80]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L4077
+	bne	.L4117
 	ldrh	w0, [x20]
 	ldrh	w1, [x21]
 	add	w0, w0, w1
 	cmp	w0, 7
-	bgt	.L4078
-.L4077:
+	bgt	.L4118
+.L4117:
 	subs	w19, w19, #1
-	bne	.L4079
-	b	.L4078
+	bne	.L4119
+	b	.L4118
 	.size	zftl_init, .-zftl_init
 	.section	.text.rk_ftl_init,"ax",@progbits
 	.align	2
@@ -26094,14 +26743,14 @@ rk_ftl_init:
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	bl	nand_flash_init
-	cbnz	w0, .L4130
+	cbnz	w0, .L4170
 	bl	zftl_init
-.L4130:
+.L4170:
 	mov	w19, w0
 	bl	idb_init
 	mov	w1, w19
-	adrp	x0, .LC251
-	add	x0, x0, :lo12:.LC251
+	adrp	x0, .LC254
+	add	x0, x0, :lo12:.LC254
 	bl	printf
 	mov	w0, w19
 	ldr	x19, [sp, 16]
@@ -26117,44 +26766,44 @@ zftl_write:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w19, w0
-	adrp	x0, .LANCHOR14
+	adrp	x0, .LANCHOR19
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	mov	w20, w1
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
 	mov	w21, w2
 	stp	x23, x24, [sp, 48]
 	mov	x25, x3
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L4133
+	tbz	x0, 12, .L4173
 	ldr	w4, [x25]
 	mov	w3, w2
-	adrp	x0, .LC252
+	adrp	x0, .LC255
 	mov	w2, w1
-	add	x0, x0, :lo12:.LC252
+	add	x0, x0, :lo12:.LC255
 	mov	w1, w19
 	bl	printf
-.L4133:
-	cbnz	w19, .L4134
-	adrp	x0, .LANCHOR68
+.L4173:
+	cbnz	w19, .L4174
+	adrp	x0, .LANCHOR67
 	mov	w19, 24576
-	ldr	w0, [x0, #:lo12:.LANCHOR68]
-.L4135:
+	ldr	w0, [x0, #:lo12:.LANCHOR67]
+.L4175:
 	cmp	w0, w20
 	ccmp	w0, w21, 0, hi
-	bcc	.L4153
+	bcc	.L4193
 	add	w1, w20, w21
 	cmp	w0, w1
-	bcc	.L4153
+	bcc	.L4193
 	adrp	x26, .LANCHOR131
 	add	w19, w19, w20
 	sub	w22, w21, #1
-	adrp	x27, .LANCHOR67
+	adrp	x27, .LANCHOR66
 	ldrb	w0, [x26, #:lo12:.LANCHOR131]
 	add	w22, w22, w19
-	adrp	x28, .LANCHOR58
-	add	x27, x27, :lo12:.LANCHOR67
-	add	x28, x28, :lo12:.LANCHOR58
+	adrp	x28, .LANCHOR57
+	add	x27, x27, :lo12:.LANCHOR66
+	add	x28, x28, :lo12:.LANCHOR57
 	udiv	w24, w19, w0
 	udiv	w22, w22, w0
 	add	x0, x26, :lo12:.LANCHOR131
@@ -26162,8 +26811,8 @@ zftl_write:
 	mov	w20, w24
 	sub	w23, w22, w24
 	add	w23, w23, 1
-.L4137:
-	cbnz	w23, .L4146
+.L4177:
+	cbnz	w23, .L4186
 	bl	ftl_write_commit
 	adrp	x20, .LANCHOR103
 	bl	ftl_flush
@@ -26171,30 +26820,30 @@ zftl_write:
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
-	adrp	x0, .LANCHOR10
-	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	adrp	x0, .LANCHOR12
+	ldr	x0, [x0, #:lo12:.LANCHOR12]
 	ldrh	w0, [x0, 124]
-	cbnz	w0, .L4147
+	cbnz	w0, .L4187
 	ldrh	w0, [x20, #:lo12:.LANCHOR103]
 	ldrh	w1, [x19, #:lo12:.LANCHOR107]
 	add	w0, w0, w1
 	cmp	w0, 11
-	bgt	.L4148
-.L4147:
+	bgt	.L4188
+.L4187:
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
-.L4148:
+.L4188:
 	add	x20, x20, :lo12:.LANCHOR103
 	add	x19, x19, :lo12:.LANCHOR107
-.L4149:
+.L4189:
 	ldrh	w0, [x20]
 	ldrh	w1, [x19]
 	add	w0, w0, w1
 	cmp	w0, 7
-	ble	.L4150
+	ble	.L4190
 	mov	w0, 0
-.L4132:
+.L4172:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -26202,36 +26851,36 @@ zftl_write:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L4134:
+.L4174:
 	cmp	w19, 3
-	bhi	.L4153
+	bhi	.L4193
 	lsl	w19, w19, 13
 	mov	w0, 8192
-	b	.L4135
-.L4146:
+	b	.L4175
+.L4186:
 	ldrb	w0, [x27]
-	cbz	w0, .L4138
+	cbz	w0, .L4178
 	ldrb	w0, [x28]
 	cmp	w0, 2
-	bhi	.L4138
+	bhi	.L4178
 	bl	ftl_write_commit
-.L4138:
+.L4178:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x26, x0
-	cbnz	x0, .L4139
+	cbnz	x0, .L4179
 	bl	ftl_write_commit
-	b	.L4137
-.L4139:
+	b	.L4177
+.L4179:
 	strb	wzr, [x0, 57]
 	cmp	w20, w24
 	ldr	x0, [x29, 104]
 	ccmp	w20, w22, 4, ne
 	ldrb	w0, [x0]
 	strb	w0, [x26, 56]
-	bne	.L4142
+	bne	.L4182
 	cmp	w20, w24
-	bne	.L4143
+	bne	.L4183
 	udiv	w1, w19, w0
 	msub	w1, w1, w0, w19
 	and	w1, w1, 255
@@ -26240,9 +26889,9 @@ zftl_write:
 	and	w0, w0, 255
 	cmp	w21, w0
 	csel	w0, w21, w0, cc
-.L4161:
+.L4201:
 	strb	w0, [x26, 56]
-.L4142:
+.L4182:
 	ldr	x4, [x26, 8]
 	mov	x1, x25
 	ldrb	w0, [x26, 57]
@@ -26265,22 +26914,22 @@ zftl_write:
 	ldrb	w0, [x26, 56]
 	ubfiz	x0, x0, 9, 8
 	add	x25, x25, x0
-	b	.L4137
-.L4143:
+	b	.L4177
+.L4183:
 	add	w1, w19, w21
 	msub	w0, w0, w20, w1
-	b	.L4161
-.L4150:
+	b	.L4201
+.L4190:
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
 	mov	w1, 1
 	mov	w0, w1
 	bl	zftl_do_gc
-	b	.L4149
-.L4153:
+	b	.L4189
+.L4193:
 	mov	w0, -1
-	b	.L4132
+	b	.L4172
 	.size	zftl_write, .-zftl_write
 	.section	.text.zftl_sys_write,"ax",@progbits
 	.align	2
@@ -26328,12 +26977,12 @@ ftl_write:
 	mov	x20, x3
 	mov	w22, w1
 	ands	w21, w0, 255
-	bne	.L4166
+	bne	.L4206
 	mov	w3, w2
 	mov	w0, 0
 	mov	x2, x20
 	bl	idb_write_data
-.L4166:
+.L4206:
 	mov	x3, x20
 	mov	w2, w19
 	mov	w1, w22
@@ -26370,34 +27019,34 @@ zftl_discard:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w19, w1
-	adrp	x1, .LANCHOR68
+	adrp	x1, .LANCHOR67
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	ldr	w1, [x1, #:lo12:.LANCHOR68]
+	ldr	w1, [x1, #:lo12:.LANCHOR67]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	cmp	w0, w1
 	ccmp	w19, w1, 2, cc
-	bhi	.L4192
+	bhi	.L4232
 	add	w2, w0, w19
 	cmp	w1, w2
-	bcc	.L4192
+	bcc	.L4232
 	adrp	x24, .LANCHOR241
 	add	w22, w0, 24576
-	adrp	x0, .LANCHOR14
+	adrp	x0, .LANCHOR19
 	str	x0, [x29, 104]
 	ldr	w1, [x24, #:lo12:.LANCHOR241]
-	ldr	w2, [x0, #:lo12:.LANCHOR14]
+	ldr	w2, [x0, #:lo12:.LANCHOR19]
 	add	w1, w19, w1
 	str	w1, [x24, #:lo12:.LANCHOR241]
-	tbz	x2, 12, .L4172
-	adrp	x0, .LC253
+	tbz	x2, 12, .L4212
+	adrp	x0, .LC256
 	mov	w4, 0
 	mov	w3, w19
 	mov	w2, w22
-	add	x0, x0, :lo12:.LC253
+	add	x0, x0, :lo12:.LC256
 	bl	printf
-.L4172:
+.L4212:
 	adrp	x23, .LANCHOR110
 	adrp	x26, .LANCHOR131
 	ldr	x0, [x23, #:lo12:.LANCHOR110]
@@ -26409,7 +27058,7 @@ zftl_discard:
 	ldrb	w21, [x26, #:lo12:.LANCHOR131]
 	udiv	w20, w22, w21
 	msub	w25, w20, w21, w22
-	cbz	w25, .L4173
+	cbz	w25, .L4213
 	sub	w21, w21, w25
 	mov	w0, w20
 	cmp	w21, w19
@@ -26417,20 +27066,20 @@ zftl_discard:
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	bne	.L4174
+	bne	.L4214
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
-.L4174:
+.L4214:
 	ldr	w0, [x29, 120]
 	and	w28, w21, 65535
 	cmn	w0, #1
-	beq	.L4176
+	beq	.L4216
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x3, x0
-	cbz	x0, .L4176
+	cbz	x0, .L4216
 	strb	w25, [x0, 57]
 	ubfiz	x25, x25, 9, 25
 	strb	w21, [x0, 56]
@@ -26449,53 +27098,53 @@ zftl_discard:
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L4176:
+.L4216:
 	add	w20, w20, 1
 	sub	w19, w19, w28
-.L4173:
-	cbz	w19, .L4178
+.L4213:
+	cbz	w19, .L4218
 	bl	ftl_flush
-.L4178:
-	adrp	x25, .LANCHOR75
+.L4218:
+	adrp	x25, .LANCHOR74
 	add	x21, x26, :lo12:.LANCHOR131
-	add	x25, x25, :lo12:.LANCHOR75
+	add	x25, x25, :lo12:.LANCHOR74
 	mov	w0, -1
 	str	w0, [x29, 124]
-.L4179:
+.L4219:
 	ldrb	w0, [x21]
 	cmp	w19, w0
-	bcs	.L4184
-	cbz	w19, .L4186
+	bcs	.L4224
+	cbz	w19, .L4226
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	bne	.L4187
+	bne	.L4227
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
-.L4187:
+.L4227:
 	ldr	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L4186
+	beq	.L4226
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x21, x0
-	cbz	x0, .L4186
+	cbz	x0, .L4226
 	strb	wzr, [x0, 57]
 	strb	w19, [x0, 56]
 	stp	w27, w20, [x21, 32]
 	ldrb	w0, [x26, #:lo12:.LANCHOR131]
 	cmp	w19, w0
-	bcc	.L4189
+	bcc	.L4229
 	adrp	x1, .LANCHOR242
 	adrp	x0, .LC0
-	mov	w2, 1477
+	mov	w2, 1493
 	add	x1, x1, :lo12:.LANCHOR242
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L4189:
+.L4229:
 	ldr	x0, [x21, 8]
 	lsl	w2, w19, 9
 	mov	w1, 0
@@ -26507,38 +27156,38 @@ zftl_discard:
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L4186:
+.L4226:
 	ldr	w1, [x24, #:lo12:.LANCHOR241]
 	cmp	w1, 8192
-	bls	.L4193
+	bls	.L4233
 	ldr	x0, [x29, 104]
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L4190
-	adrp	x0, .LC253
+	ldr	w0, [x0, #:lo12:.LANCHOR19]
+	tbz	x0, 12, .L4230
+	adrp	x0, .LC256
 	mov	w4, 0
 	mov	w3, w19
 	mov	w2, w22
-	add	x0, x0, :lo12:.LC253
+	add	x0, x0, :lo12:.LC256
 	bl	printf
-.L4190:
+.L4230:
 	str	wzr, [x24, #:lo12:.LANCHOR241]
 	bl	flt_sys_flush
 	adrp	x0, .LANCHOR122
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR122]
-.L4193:
+.L4233:
 	mov	w0, 0
-	b	.L4170
-.L4184:
+	b	.L4210
+.L4224:
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L4180
+	beq	.L4220
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbz	x0, .L4182
+	cbz	x0, .L4222
 	ldrb	w2, [x21]
 	mov	w1, 0
 	strb	w2, [x0, 56]
@@ -26550,31 +27199,31 @@ zftl_discard:
 	mov	x0, x28
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-.L4219:
+.L4259:
 	ldr	x1, [x23, #:lo12:.LANCHOR110]
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L4182:
+.L4222:
 	ldrb	w0, [x21]
 	add	w20, w20, 1
 	sub	w19, w19, w0
-	b	.L4179
-.L4180:
+	b	.L4219
+.L4220:
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
 	ldr	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L4182
+	beq	.L4222
 	add	x1, x29, 124
 	mov	w2, 1
 	mov	w0, w20
 	bl	pm_log2phys
-	adrp	x0, .LANCHOR32
+	adrp	x0, .LANCHOR31
 	ldrh	w2, [x25]
-	ldrb	w1, [x0, #:lo12:.LANCHOR32]
+	ldrb	w1, [x0, #:lo12:.LANCHOR31]
 	mov	w0, 24
 	sub	w0, w0, w1
 	sub	w1, w0, w2
@@ -26584,14 +27233,14 @@ zftl_discard:
 	sub	w0, w0, #1
 	lsr	w1, w1, w2
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR76
-	ldrb	w1, [x1, #:lo12:.LANCHOR76]
+	adrp	x1, .LANCHOR75
+	ldrb	w1, [x1, #:lo12:.LANCHOR75]
 	udiv	w0, w0, w1
 	bl	ftl_vpn_decrement
-	b	.L4219
-.L4192:
+	b	.L4259
+.L4232:
 	mov	w0, -1
-.L4170:
+.L4210:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -26616,47 +27265,47 @@ ftl_discard:
 dump_pm_blk:
 	stp	x29, x30, [sp, -48]!
 	mov	w2, 4
-	adrp	x0, .LC254
-	add	x0, x0, :lo12:.LC254
+	adrp	x0, .LC257
+	add	x0, x0, :lo12:.LC257
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x20, .LANCHOR110
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR155
+	adrp	x21, .LANCHOR152
 	ldr	x1, [x20, #:lo12:.LANCHOR110]
 	mov	w19, 0
 	mov	w22, 65535
 	add	x1, x1, 704
 	ldrh	w3, [x1, -6]
 	bl	rknand_print_hex
-	ldrh	w3, [x21, #:lo12:.LANCHOR155]
-	add	x21, x21, :lo12:.LANCHOR155
+	ldrh	w3, [x21, #:lo12:.LANCHOR152]
+	add	x21, x21, :lo12:.LANCHOR152
 	ldr	x1, [x20, #:lo12:.LANCHOR110]
 	mov	w2, 2
-	adrp	x0, .LC255
-	add	x0, x0, :lo12:.LC255
+	adrp	x0, .LC258
+	add	x0, x0, :lo12:.LC258
 	add	x1, x1, 416
 	bl	rknand_print_hex
-.L4222:
+.L4262:
 	ldrh	w0, [x21]
 	cmp	w0, w19
-	bhi	.L4224
+	bhi	.L4264
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L4224:
+.L4264:
 	ldr	x0, [x20, #:lo12:.LANCHOR110]
 	add	x0, x0, x19, sxtw 1
 	ldrh	w0, [x0, 416]
 	cmp	w0, w22
-	beq	.L4223
+	beq	.L4263
 	mov	x1, 0
 	bl	ftl_sblk_dump
-.L4223:
+.L4263:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L4222
+	b	.L4262
 	.size	dump_pm_blk, .-dump_pm_blk
 	.global	g_pm_spare
 	.global	pm_first_write
@@ -26824,21 +27473,21 @@ dump_pm_blk:
 	.global	g_flash_page_buffer
 	.section	.bss.IDByte,"aw",@nobits
 	.align	2
-	.set	.LANCHOR48,. + 0
+	.set	.LANCHOR47,. + 0
 	.type	IDByte, %object
 	.size	IDByte, 32
 IDByte:
 	.zero	32
 	.section	.bss._c_ftl_blk_pre_plane,"aw",@nobits
 	.align	1
-	.set	.LANCHOR6,. + 0
+	.set	.LANCHOR8,. + 0
 	.type	_c_ftl_blk_pre_plane, %object
 	.size	_c_ftl_blk_pre_plane, 2
 _c_ftl_blk_pre_plane:
 	.zero	2
 	.section	.bss._c_ftl_block_addr_log2,"aw",@nobits
 	.align	1
-	.set	.LANCHOR75,. + 0
+	.set	.LANCHOR74,. + 0
 	.type	_c_ftl_block_addr_log2, %object
 	.size	_c_ftl_block_addr_log2, 2
 _c_ftl_block_addr_log2:
@@ -26858,7 +27507,7 @@ _c_ftl_block_align_addr:
 _c_ftl_byte_pre_page:
 	.zero	2
 	.section	.bss._c_ftl_cs_bits,"aw",@nobits
-	.set	.LANCHOR32,. + 0
+	.set	.LANCHOR31,. + 0
 	.type	_c_ftl_cs_bits, %object
 	.size	_c_ftl_cs_bits, 1
 _c_ftl_cs_bits:
@@ -26876,40 +27525,40 @@ _c_ftl_nand_blks_per_die:
 _c_ftl_nand_die_num:
 	.zero	1
 	.section	.bss._c_ftl_nand_planes_num,"aw",@nobits
-	.set	.LANCHOR80,. + 0
+	.set	.LANCHOR79,. + 0
 	.type	_c_ftl_nand_planes_num, %object
 	.size	_c_ftl_nand_planes_num, 1
 _c_ftl_nand_planes_num:
 	.zero	1
 	.section	.bss._c_ftl_nand_type,"aw",@nobits
-	.set	.LANCHOR79,. + 0
+	.set	.LANCHOR78,. + 0
 	.type	_c_ftl_nand_type, %object
 	.size	_c_ftl_nand_type, 1
 _c_ftl_nand_type:
 	.zero	1
 	.section	.bss._c_ftl_page_pre_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR86,. + 0
+	.set	.LANCHOR85,. + 0
 	.type	_c_ftl_page_pre_blk, %object
 	.size	_c_ftl_page_pre_blk, 2
 _c_ftl_page_pre_blk:
 	.zero	2
 	.section	.bss._c_ftl_page_pre_slc_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR95,. + 0
+	.set	.LANCHOR94,. + 0
 	.type	_c_ftl_page_pre_slc_blk, %object
 	.size	_c_ftl_page_pre_slc_blk, 2
 _c_ftl_page_pre_slc_blk:
 	.zero	2
 	.section	.bss._c_ftl_planes_per_die,"aw",@nobits
-	.set	.LANCHOR76,. + 0
+	.set	.LANCHOR75,. + 0
 	.type	_c_ftl_planes_per_die, %object
 	.size	_c_ftl_planes_per_die, 1
 _c_ftl_planes_per_die:
 	.zero	1
 	.section	.bss._c_ftl_pm_page_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR204,. + 0
+	.set	.LANCHOR202,. + 0
 	.type	_c_ftl_pm_page_num, %object
 	.size	_c_ftl_pm_page_num, 2
 _c_ftl_pm_page_num:
@@ -26922,7 +27571,7 @@ _c_ftl_sec_per_page:
 	.zero	1
 	.section	.bss._c_max_pm_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR155,. + 0
+	.set	.LANCHOR152,. + 0
 	.type	_c_max_pm_sblk, %object
 	.size	_c_max_pm_sblk, 2
 _c_max_pm_sblk:
@@ -26943,21 +27592,21 @@ _c_mix_max_xlc_ec_count:
 	.zero	2
 	.section	.bss._c_slc_to_xlc_ec_ratio,"aw",@nobits
 	.align	1
-	.set	.LANCHOR8,. + 0
+	.set	.LANCHOR10,. + 0
 	.type	_c_slc_to_xlc_ec_ratio, %object
 	.size	_c_slc_to_xlc_ec_ratio, 2
 _c_slc_to_xlc_ec_ratio:
 	.zero	2
 	.section	.bss._c_swl_slc_gc_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR152,. + 0
+	.set	.LANCHOR149,. + 0
 	.type	_c_swl_slc_gc_th, %object
 	.size	_c_swl_slc_gc_th, 2
 _c_swl_slc_gc_th:
 	.zero	2
 	.section	.bss._c_swl_xlc_gc_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR153,. + 0
+	.set	.LANCHOR150,. + 0
 	.type	_c_swl_xlc_gc_th, %object
 	.size	_c_swl_xlc_gc_th, 2
 _c_swl_xlc_gc_th:
@@ -26985,7 +27634,7 @@ _c_totle_phy_density:
 	.zero	4
 	.section	.bss._c_user_data_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR68,. + 0
+	.set	.LANCHOR67,. + 0
 	.type	_c_user_data_density, %object
 	.size	_c_user_data_density, 4
 _c_user_data_density:
@@ -27038,27 +27687,27 @@ discard_sector_count:
 	.zero	4
 	.section	.bss.fill_spare_size,"aw",@nobits
 	.align	1
-	.set	.LANCHOR54,. + 0
+	.set	.LANCHOR53,. + 0
 	.type	fill_spare_size, %object
 	.size	fill_spare_size, 2
 fill_spare_size:
 	.zero	2
 	.section	.bss.flash_ddr_tuning_sdr_read_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR172,. + 0
+	.set	.LANCHOR169,. + 0
 	.type	flash_ddr_tuning_sdr_read_count, %object
 	.size	flash_ddr_tuning_sdr_read_count, 4
 flash_ddr_tuning_sdr_read_count:
 	.zero	4
 	.section	.bss.flash_read_retry,"aw",@nobits
 	.align	3
-	.set	.LANCHOR174,. + 0
+	.set	.LANCHOR171,. + 0
 	.type	flash_read_retry, %object
 	.size	flash_read_retry, 8
 flash_read_retry:
 	.zero	8
 	.section	.bss.free_buf_count,"aw",@nobits
-	.set	.LANCHOR58,. + 0
+	.set	.LANCHOR57,. + 0
 	.type	free_buf_count, %object
 	.size	free_buf_count, 1
 free_buf_count:
@@ -27086,13 +27735,13 @@ free_xlc_sblk:
 	.zero	2
 	.section	.bss.ftl_ext_info_data_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR200,. + 0
+	.set	.LANCHOR197,. + 0
 	.type	ftl_ext_info_data_buffer, %object
 	.size	ftl_ext_info_data_buffer, 8
 ftl_ext_info_data_buffer:
 	.zero	8
 	.section	.bss.ftl_ext_info_first_write,"aw",@nobits
-	.set	.LANCHOR199,. + 0
+	.set	.LANCHOR196,. + 0
 	.type	ftl_ext_info_first_write, %object
 	.size	ftl_ext_info_first_write, 1
 ftl_ext_info_first_write:
@@ -27106,27 +27755,27 @@ ftl_flush_jiffies:
 	.zero	4
 	.section	.bss.ftl_info_data_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR195,. + 0
+	.set	.LANCHOR192,. + 0
 	.type	ftl_info_data_buffer, %object
 	.size	ftl_info_data_buffer, 8
 ftl_info_data_buffer:
 	.zero	8
 	.section	.bss.ftl_info_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR193,. + 0
+	.set	.LANCHOR190,. + 0
 	.type	ftl_info_spare, %object
 	.size	ftl_info_spare, 256
 ftl_info_spare:
 	.zero	256
 	.section	.bss.ftl_low_format_cur_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR69,. + 0
+	.set	.LANCHOR68,. + 0
 	.type	ftl_low_format_cur_blk, %object
 	.size	ftl_low_format_cur_blk, 2
 ftl_low_format_cur_blk:
 	.zero	2
 	.section	.bss.ftl_power_lost_flag,"aw",@nobits
-	.set	.LANCHOR198,. + 0
+	.set	.LANCHOR195,. + 0
 	.type	ftl_power_lost_flag, %object
 	.size	ftl_power_lost_flag, 1
 ftl_power_lost_flag:
@@ -27140,7 +27789,7 @@ ftl_sblk_lpa_tbl:
 	.zero	8
 	.section	.bss.ftl_sblk_update_list,"aw",@nobits
 	.align	3
-	.set	.LANCHOR74,. + 0
+	.set	.LANCHOR73,. + 0
 	.type	ftl_sblk_update_list, %object
 	.size	ftl_sblk_update_list, 16
 ftl_sblk_update_list:
@@ -27154,34 +27803,34 @@ ftl_sblk_update_list_offset:
 	.zero	2
 	.section	.bss.ftl_sblk_vpn,"aw",@nobits
 	.align	3
-	.set	.LANCHOR9,. + 0
+	.set	.LANCHOR11,. + 0
 	.type	ftl_sblk_vpn, %object
 	.size	ftl_sblk_vpn, 8
 ftl_sblk_vpn:
 	.zero	8
 	.section	.bss.ftl_sblk_vpn_update_id,"aw",@nobits
 	.align	1
-	.set	.LANCHOR73,. + 0
+	.set	.LANCHOR72,. + 0
 	.type	ftl_sblk_vpn_update_id, %object
 	.size	ftl_sblk_vpn_update_id, 2
 ftl_sblk_vpn_update_id:
 	.zero	2
 	.section	.bss.ftl_sys_info_first_write,"aw",@nobits
-	.set	.LANCHOR197,. + 0
+	.set	.LANCHOR194,. + 0
 	.type	ftl_sys_info_first_write, %object
 	.size	ftl_sys_info_first_write, 1
 ftl_sys_info_first_write:
 	.zero	1
 	.section	.bss.ftl_tmp_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR190,. + 0
+	.set	.LANCHOR187,. + 0
 	.type	ftl_tmp_buffer, %object
 	.size	ftl_tmp_buffer, 8
 ftl_tmp_buffer:
 	.zero	8
 	.section	.bss.ftl_tmp_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR191,. + 0
+	.set	.LANCHOR188,. + 0
 	.type	ftl_tmp_spare, %object
 	.size	ftl_tmp_spare, 256
 ftl_tmp_spare:
@@ -27202,33 +27851,33 @@ g_block_align_addr:
 	.zero	2
 	.section	.bss.g_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR56,. + 0
+	.set	.LANCHOR55,. + 0
 	.type	g_buf, %object
 	.size	g_buf, 1024
 g_buf:
 	.zero	1024
 	.section	.bss.g_die_addr,"aw",@nobits
 	.align	2
-	.set	.LANCHOR148,. + 0
+	.set	.LANCHOR145,. + 0
 	.type	g_die_addr, %object
 	.size	g_die_addr, 32
 g_die_addr:
 	.zero	32
 	.section	.bss.g_die_cs_idx,"aw",@nobits
 	.align	2
-	.set	.LANCHOR30,. + 0
+	.set	.LANCHOR29,. + 0
 	.type	g_die_cs_idx, %object
 	.size	g_die_cs_idx, 8
 g_die_cs_idx:
 	.zero	8
 	.section	.bss.g_flash_3d_mlc_flag,"aw",@nobits
-	.set	.LANCHOR81,. + 0
+	.set	.LANCHOR80,. + 0
 	.type	g_flash_3d_mlc_flag, %object
 	.size	g_flash_3d_mlc_flag, 1
 g_flash_3d_mlc_flag:
 	.zero	1
 	.section	.bss.g_flash_3d_tlc_flag,"aw",@nobits
-	.set	.LANCHOR84,. + 0
+	.set	.LANCHOR83,. + 0
 	.type	g_flash_3d_tlc_flag, %object
 	.size	g_flash_3d_tlc_flag, 1
 g_flash_3d_tlc_flag:
@@ -27242,13 +27891,13 @@ g_flash_blk_info:
 	.zero	4
 	.section	.bss.g_flash_cur_mode,"aw",@nobits
 	.align	3
-	.set	.LANCHOR34,. + 0
+	.set	.LANCHOR33,. + 0
 	.type	g_flash_cur_mode, %object
 	.size	g_flash_cur_mode, 4
 g_flash_cur_mode:
 	.zero	4
 	.section	.bss.g_flash_interface_mode,"aw",@nobits
-	.set	.LANCHOR49,. + 0
+	.set	.LANCHOR48,. + 0
 	.type	g_flash_interface_mode, %object
 	.size	g_flash_interface_mode, 1
 g_flash_interface_mode:
@@ -27266,26 +27915,26 @@ g_flash_micron_3d_tlc_b05a:
 g_flash_micron_3d_tlc_b16a:
 	.zero	1
 	.section	.bss.g_flash_micron_3d_tlc_flag,"aw",@nobits
-	.set	.LANCHOR36,. + 0
+	.set	.LANCHOR35,. + 0
 	.type	g_flash_micron_3d_tlc_flag, %object
 	.size	g_flash_micron_3d_tlc_flag, 1
 g_flash_micron_3d_tlc_flag:
 	.zero	1
 	.section	.bss.g_flash_multi_page_prog_en,"aw",@nobits
-	.set	.LANCHOR45,. + 0
+	.set	.LANCHOR44,. + 0
 	.type	g_flash_multi_page_prog_en, %object
 	.size	g_flash_multi_page_prog_en, 1
 g_flash_multi_page_prog_en:
 	.zero	1
 	.section	.bss.g_flash_multi_page_read_en,"aw",@nobits
-	.set	.LANCHOR186,. + 0
+	.set	.LANCHOR183,. + 0
 	.type	g_flash_multi_page_read_en, %object
 	.size	g_flash_multi_page_read_en, 1
 g_flash_multi_page_read_en:
 	.zero	1
 	.section	.bss.g_flash_page_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR176,. + 0
+	.set	.LANCHOR173,. + 0
 	.type	g_flash_page_buffer, %object
 	.size	g_flash_page_buffer, 8
 g_flash_page_buffer:
@@ -27297,7 +27946,7 @@ g_flash_page_buffer:
 g_flash_reversd_blks:
 	.zero	1
 	.section	.bss.g_flash_six_addr,"aw",@nobits
-	.set	.LANCHOR31,. + 0
+	.set	.LANCHOR30,. + 0
 	.type	g_flash_six_addr, %object
 	.size	g_flash_six_addr, 1
 g_flash_six_addr:
@@ -27310,7 +27959,7 @@ g_flash_slc_mode:
 	.zero	1
 	.section	.bss.g_flash_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR175,. + 0
+	.set	.LANCHOR172,. + 0
 	.type	g_flash_spare_buffer, %object
 	.size	g_flash_spare_buffer, 8
 g_flash_spare_buffer:
@@ -27324,52 +27973,52 @@ g_flash_sys_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_tmp_page_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR166,. + 0
+	.set	.LANCHOR163,. + 0
 	.type	g_flash_tmp_page_buffer, %object
 	.size	g_flash_tmp_page_buffer, 8
 g_flash_tmp_page_buffer:
 	.zero	8
 	.section	.bss.g_flash_tmp_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR168,. + 0
+	.set	.LANCHOR165,. + 0
 	.type	g_flash_tmp_spare_buffer, %object
 	.size	g_flash_tmp_spare_buffer, 8
 g_flash_tmp_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_toggle_mode_en,"aw",@nobits
-	.set	.LANCHOR21,. + 0
+	.set	.LANCHOR26,. + 0
 	.type	g_flash_toggle_mode_en, %object
 	.size	g_flash_toggle_mode_en, 1
 g_flash_toggle_mode_en:
 	.zero	1
 	.section	.bss.g_flash_ymtc_3d_tlc_flag,"aw",@nobits
-	.set	.LANCHOR37,. + 0
+	.set	.LANCHOR36,. + 0
 	.type	g_flash_ymtc_3d_tlc_flag, %object
 	.size	g_flash_ymtc_3d_tlc_flag, 1
 g_flash_ymtc_3d_tlc_flag:
 	.zero	1
 	.section	.bss.g_ftl_info_blk,"aw",@nobits
 	.align	6
-	.set	.LANCHOR194,. + 0
+	.set	.LANCHOR191,. + 0
 	.type	g_ftl_info_blk, %object
 	.size	g_ftl_info_blk, 4
 g_ftl_info_blk:
 	.zero	4
 	.section	.bss.g_gc_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR71,. + 0
+	.set	.LANCHOR70,. + 0
 	.type	g_gc_info, %object
-	.size	g_gc_info, 2136
+	.size	g_gc_info, 2216
 g_gc_info:
-	.zero	2136
+	.zero	2216
 	.section	.bss.g_idb_ecc_bits,"aw",@nobits
-	.set	.LANCHOR17,. + 0
+	.set	.LANCHOR22,. + 0
 	.type	g_idb_ecc_bits, %object
 	.size	g_idb_ecc_bits, 1
 g_idb_ecc_bits:
 	.zero	1
 	.section	.bss.g_idb_slc_mode_enable,"aw",@nobits
-	.set	.LANCHOR19,. + 0
+	.set	.LANCHOR24,. + 0
 	.type	g_idb_slc_mode_enable, %object
 	.size	g_idb_slc_mode_enable, 1
 g_idb_slc_mode_enable:
@@ -27382,64 +28031,64 @@ g_idb_slc_mode_enable:
 g_lsb_page_tbl:
 	.zero	1024
 	.section	.bss.g_maxRegNum,"aw",@nobits
-	.set	.LANCHOR26,. + 0
+	.set	.LANCHOR18,. + 0
 	.type	g_maxRegNum, %object
 	.size	g_maxRegNum, 1
 g_maxRegNum:
 	.zero	1
 	.section	.bss.g_maxRetryCount,"aw",@nobits
-	.set	.LANCHOR169,. + 0
+	.set	.LANCHOR166,. + 0
 	.type	g_maxRetryCount, %object
 	.size	g_maxRetryCount, 1
 g_maxRetryCount:
 	.zero	1
 	.section	.bss.g_msb_page_tbl,"aw",@nobits
 	.align	2
-	.set	.LANCHOR145,. + 0
+	.set	.LANCHOR142,. + 0
 	.type	g_msb_page_tbl, %object
 	.size	g_msb_page_tbl, 2048
 g_msb_page_tbl:
 	.zero	2048
 	.section	.bss.g_nand_max_die,"aw",@nobits
-	.set	.LANCHOR18,. + 0
+	.set	.LANCHOR23,. + 0
 	.type	g_nand_max_die, %object
 	.size	g_nand_max_die, 1
 g_nand_max_die:
 	.zero	1
 	.section	.bss.g_nand_opt_para,"aw",@nobits
 	.align	3
-	.set	.LANCHOR20,. + 0
+	.set	.LANCHOR25,. + 0
 	.type	g_nand_opt_para, %object
 	.size	g_nand_opt_para, 32
 g_nand_opt_para:
 	.zero	32
 	.section	.bss.g_nandc_ecc_bits,"aw",@nobits
-	.set	.LANCHOR50,. + 0
+	.set	.LANCHOR49,. + 0
 	.type	g_nandc_ecc_bits, %object
 	.size	g_nandc_ecc_bits, 1
 g_nandc_ecc_bits:
 	.zero	1
 	.section	.bss.g_nandc_tran_timeout,"aw",@nobits
-	.set	.LANCHOR167,. + 0
+	.set	.LANCHOR164,. + 0
 	.type	g_nandc_tran_timeout, %object
 	.size	g_nandc_tran_timeout, 1
 g_nandc_tran_timeout:
 	.zero	1
 	.section	.bss.g_nandc_v6_master_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR53,. + 0
+	.set	.LANCHOR52,. + 0
 	.type	g_nandc_v6_master_info, %object
 	.size	g_nandc_v6_master_info, 40
 g_nandc_v6_master_info:
 	.zero	40
 	.section	.bss.g_nandc_ver,"aw",@nobits
-	.set	.LANCHOR28,. + 0
+	.set	.LANCHOR27,. + 0
 	.type	g_nandc_ver, %object
 	.size	g_nandc_ver, 1
 g_nandc_ver:
 	.zero	1
 	.section	.bss.g_one_pass_program,"aw",@nobits
-	.set	.LANCHOR82,. + 0
+	.set	.LANCHOR81,. + 0
 	.type	g_one_pass_program, %object
 	.size	g_one_pass_program, 1
 g_one_pass_program:
@@ -27452,7 +28101,7 @@ g_one_pass_program:
 g_pm_spare:
 	.zero	8
 	.section	.bss.g_retryMode,"aw",@nobits
-	.set	.LANCHOR24,. + 0
+	.set	.LANCHOR16,. + 0
 	.type	g_retryMode, %object
 	.size	g_retryMode, 1
 g_retryMode:
@@ -27470,103 +28119,103 @@ g_slc_mode_enable:
 	.zero	1
 	.section	.bss.g_slc_page_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR147,. + 0
+	.set	.LANCHOR144,. + 0
 	.type	g_slc_page_num, %object
 	.size	g_slc_page_num, 2
 g_slc_page_num:
 	.zero	2
 	.section	.bss.g_totle_phy_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR149,. + 0
+	.set	.LANCHOR146,. + 0
 	.type	g_totle_phy_block, %object
 	.size	g_totle_phy_block, 2
 g_totle_phy_block:
 	.zero	2
 	.section	.bss.gc_des_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR164,. + 0
+	.set	.LANCHOR161,. + 0
 	.type	gc_des_ppa_tbl, %object
 	.size	gc_des_ppa_tbl, 8
 gc_des_ppa_tbl:
 	.zero	8
 	.section	.bss.gc_free_slc_sblk_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR87,. + 0
+	.set	.LANCHOR86,. + 0
 	.type	gc_free_slc_sblk_th, %object
 	.size	gc_free_slc_sblk_th, 2
 gc_free_slc_sblk_th:
 	.zero	2
 	.section	.bss.gc_lpa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR162,. + 0
+	.set	.LANCHOR159,. + 0
 	.type	gc_lpa_tbl, %object
 	.size	gc_lpa_tbl, 8
 gc_lpa_tbl:
 	.zero	8
 	.section	.bss.gc_mode,"aw",@nobits
-	.set	.LANCHOR85,. + 0
+	.set	.LANCHOR84,. + 0
 	.type	gc_mode, %object
 	.size	gc_mode, 1
 gc_mode:
 	.zero	1
 	.section	.bss.gc_page_buf_id,"aw",@nobits
 	.align	3
-	.set	.LANCHOR83,. + 0
+	.set	.LANCHOR82,. + 0
 	.type	gc_page_buf_id, %object
 	.size	gc_page_buf_id, 8
 gc_page_buf_id:
 	.zero	8
 	.section	.bss.gc_pre_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR163,. + 0
+	.set	.LANCHOR160,. + 0
 	.type	gc_pre_ppa_tbl, %object
 	.size	gc_pre_ppa_tbl, 8
 gc_pre_ppa_tbl:
 	.zero	8
 	.section	.bss.gc_search_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR160,. + 0
+	.set	.LANCHOR157,. + 0
 	.type	gc_search_count, %object
 	.size	gc_search_count, 4
 gc_search_count:
 	.zero	4
 	.section	.bss.gc_slc_cache_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR91,. + 0
+	.set	.LANCHOR88,. + 0
 	.type	gc_slc_cache_index, %object
 	.size	gc_slc_cache_index, 2
 gc_slc_cache_index:
 	.zero	2
 	.section	.bss.gc_slc_data_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR90,. + 0
+	.set	.LANCHOR87,. + 0
 	.type	gc_slc_data_index, %object
 	.size	gc_slc_data_index, 2
 gc_slc_data_index:
 	.zero	2
 	.section	.bss.gc_slc_mode_slc_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR161,. + 0
+	.set	.LANCHOR158,. + 0
 	.type	gc_slc_mode_slc_vpn_th, %object
 	.size	gc_slc_mode_slc_vpn_th, 2
 gc_slc_mode_slc_vpn_th:
 	.zero	2
 	.section	.bss.gc_slc_mode_tlc_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR94,. + 0
+	.set	.LANCHOR93,. + 0
 	.type	gc_slc_mode_tlc_vpn_th, %object
 	.size	gc_slc_mode_tlc_vpn_th, 2
 gc_slc_mode_tlc_vpn_th:
 	.zero	2
 	.section	.bss.gc_slc_mode_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR70,. + 0
+	.set	.LANCHOR69,. + 0
 	.type	gc_slc_mode_vpn_th, %object
 	.size	gc_slc_mode_vpn_th, 2
 gc_slc_mode_vpn_th:
 	.zero	2
 	.section	.bss.gc_state,"aw",@nobits
-	.set	.LANCHOR159,. + 0
+	.set	.LANCHOR156,. + 0
 	.type	gc_state, %object
 	.size	gc_state, 1
 gc_state:
@@ -27587,14 +28236,14 @@ gc_tlc_mode_tlc_vpn_th:
 	.zero	2
 	.section	.bss.gc_valid_page_ppa,"aw",@nobits
 	.align	3
-	.set	.LANCHOR77,. + 0
+	.set	.LANCHOR76,. + 0
 	.type	gc_valid_page_ppa, %object
 	.size	gc_valid_page_ppa, 8
 gc_valid_page_ppa:
 	.zero	8
 	.section	.bss.gc_xlc_data_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR92,. + 0
+	.set	.LANCHOR89,. + 0
 	.type	gc_xlc_data_index, %object
 	.size	gc_xlc_data_index, 2
 gc_xlc_data_index:
@@ -27608,42 +28257,42 @@ gc_xlc_search_index:
 	.zero	2
 	.section	.bss.gp_blk_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR7,. + 0
+	.set	.LANCHOR9,. + 0
 	.type	gp_blk_info, %object
 	.size	gp_blk_info, 8
 gp_blk_info:
 	.zero	8
 	.section	.bss.gp_data_slc_cache_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR89,. + 0
+	.set	.LANCHOR90,. + 0
 	.type	gp_data_slc_cache_head, %object
 	.size	gp_data_slc_cache_head, 8
 gp_data_slc_cache_head:
 	.zero	8
 	.section	.bss.gp_data_slc_data_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR12,. + 0
+	.set	.LANCHOR95,. + 0
 	.type	gp_data_slc_data_head, %object
 	.size	gp_data_slc_data_head, 8
 gp_data_slc_data_head:
 	.zero	8
 	.section	.bss.gp_data_xlc_data_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR88,. + 0
+	.set	.LANCHOR92,. + 0
 	.type	gp_data_xlc_data_head, %object
 	.size	gp_data_xlc_data_head, 8
 gp_data_xlc_data_head:
 	.zero	8
 	.section	.bss.gp_flash_check_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR144,. + 0
+	.set	.LANCHOR141,. + 0
 	.type	gp_flash_check_buf, %object
 	.size	gp_flash_check_buf, 8
 gp_flash_check_buf:
 	.zero	8
 	.section	.bss.gp_flash_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR27,. + 0
+	.set	.LANCHOR6,. + 0
 	.type	gp_flash_info, %object
 	.size	gp_flash_info, 8
 gp_flash_info:
@@ -27671,7 +28320,7 @@ gp_free_xlc_head:
 	.zero	8
 	.section	.bss.gp_ftl_ext_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR10,. + 0
+	.set	.LANCHOR12,. + 0
 	.type	gp_ftl_ext_info, %object
 	.size	gp_ftl_ext_info, 8
 gp_ftl_ext_info:
@@ -27685,14 +28334,14 @@ gp_ftl_info:
 	.zero	8
 	.section	.bss.gp_nand_para_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR16,. + 0
+	.set	.LANCHOR21,. + 0
 	.type	gp_nand_para_info, %object
 	.size	gp_nand_para_info, 8
 gp_nand_para_info:
 	.zero	8
 	.section	.bss.gp_nandc,"aw",@nobits
 	.align	3
-	.set	.LANCHOR13,. + 0
+	.set	.LANCHOR7,. + 0
 	.type	gp_nandc, %object
 	.size	gp_nandc, 8
 gp_nandc:
@@ -27706,27 +28355,27 @@ gp_sblk_list_tbl:
 	.zero	8
 	.section	.bss.idb_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR141,. + 0
+	.set	.LANCHOR138,. + 0
 	.type	idb_buf, %object
 	.size	idb_buf, 8
 idb_buf:
 	.zero	8
 	.section	.bss.idb_last_lba,"aw",@nobits
 	.align	2
-	.set	.LANCHOR177,. + 0
+	.set	.LANCHOR174,. + 0
 	.type	idb_last_lba, %object
 	.size	idb_last_lba, 4
 idb_last_lba:
 	.zero	4
 	.section	.bss.idb_need_write_back,"aw",@nobits
 	.align	2
-	.set	.LANCHOR142,. + 0
+	.set	.LANCHOR139,. + 0
 	.type	idb_need_write_back, %object
 	.size	idb_need_write_back, 4
 idb_need_write_back:
 	.zero	4
 	.section	.bss.idb_write_enable,"aw",@nobits
-	.set	.LANCHOR143,. + 0
+	.set	.LANCHOR140,. + 0
 	.type	idb_write_enable, %object
 	.size	idb_write_enable, 1
 idb_write_enable:
@@ -27752,19 +28401,19 @@ lpa_hash_index:
 nandc_ecc_sts:
 	.zero	16
 	.section	.bss.nandc_hw_seed,"aw",@nobits
-	.set	.LANCHOR51,. + 0
+	.set	.LANCHOR50,. + 0
 	.type	nandc_hw_seed, %object
 	.size	nandc_hw_seed, 1
 nandc_hw_seed:
 	.zero	1
 	.section	.bss.nandc_randomizer_en,"aw",@nobits
-	.set	.LANCHOR52,. + 0
+	.set	.LANCHOR51,. + 0
 	.type	nandc_randomizer_en, %object
 	.size	nandc_randomizer_en, 1
 nandc_randomizer_en:
 	.zero	1
 	.section	.bss.p_free_buf_head,"aw",@nobits
-	.set	.LANCHOR57,. + 0
+	.set	.LANCHOR56,. + 0
 	.type	p_free_buf_head, %object
 	.size	p_free_buf_head, 1
 p_free_buf_head:
@@ -27783,14 +28432,14 @@ pm_first_write:
 	.zero	1
 	.section	.bss.pm_force_gc,"aw",@nobits
 	.align	2
-	.set	.LANCHOR151,. + 0
+	.set	.LANCHOR148,. + 0
 	.type	pm_force_gc, %object
 	.size	pm_force_gc, 4
 pm_force_gc:
 	.zero	4
 	.section	.bss.pm_gc_enable,"aw",@nobits
 	.align	2
-	.set	.LANCHOR136,. + 0
+	.set	.LANCHOR204,. + 0
 	.type	pm_gc_enable, %object
 	.size	pm_gc_enable, 4
 pm_gc_enable:
@@ -27802,14 +28451,14 @@ pm_gc_enable:
 pm_last_load_ram_id:
 	.zero	1
 	.section	.bss.pm_last_update_ram_id,"aw",@nobits
-	.set	.LANCHOR139,. + 0
+	.set	.LANCHOR136,. + 0
 	.type	pm_last_update_ram_id, %object
 	.size	pm_last_update_ram_id, 1
 pm_last_update_ram_id:
 	.zero	1
 	.section	.bss.pm_ram_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR138,. + 0
+	.set	.LANCHOR135,. + 0
 	.type	pm_ram_info, %object
 	.size	pm_ram_info, 128
 pm_ram_info:
@@ -27834,25 +28483,25 @@ read_buf_count:
 read_buf_head:
 	.zero	1
 	.section	.bss.sblk_gc_write_completed_queue_head,"aw",@nobits
-	.set	.LANCHOR64,. + 0
+	.set	.LANCHOR63,. + 0
 	.type	sblk_gc_write_completed_queue_head, %object
 	.size	sblk_gc_write_completed_queue_head, 1
 sblk_gc_write_completed_queue_head:
 	.zero	1
 	.section	.bss.sblk_queue_head,"aw",@nobits
-	.set	.LANCHOR60,. + 0
+	.set	.LANCHOR59,. + 0
 	.type	sblk_queue_head, %object
 	.size	sblk_queue_head, 1
 sblk_queue_head:
 	.zero	1
 	.section	.bss.sblk_read_completed_queue_head,"aw",@nobits
-	.set	.LANCHOR63,. + 0
+	.set	.LANCHOR62,. + 0
 	.type	sblk_read_completed_queue_head, %object
 	.size	sblk_read_completed_queue_head, 1
 sblk_read_completed_queue_head:
 	.zero	1
 	.section	.bss.sblk_write_completed_queue_head,"aw",@nobits
-	.set	.LANCHOR65,. + 0
+	.set	.LANCHOR64,. + 0
 	.type	sblk_write_completed_queue_head, %object
 	.size	sblk_write_completed_queue_head, 1
 sblk_write_completed_queue_head:
@@ -27872,13 +28521,13 @@ slc_cache_sblk:
 slc_data_sblk:
 	.zero	2
 	.section	.bss.write_buf_count,"aw",@nobits
-	.set	.LANCHOR67,. + 0
+	.set	.LANCHOR66,. + 0
 	.type	write_buf_count, %object
 	.size	write_buf_count, 1
 write_buf_count:
 	.zero	1
 	.section	.bss.write_buf_head,"aw",@nobits
-	.set	.LANCHOR66,. + 0
+	.set	.LANCHOR65,. + 0
 	.type	write_buf_head, %object
 	.size	write_buf_head, 1
 write_buf_head:
@@ -27890,14 +28539,14 @@ write_buf_head:
 write_commit_count:
 	.zero	1
 	.section	.bss.write_commit_head,"aw",@nobits
-	.set	.LANCHOR185,. + 0
+	.set	.LANCHOR182,. + 0
 	.type	write_commit_head, %object
 	.size	write_commit_head, 1
 write_commit_head:
 	.zero	1
 	.section	.bss.xlc_data_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR93,. + 0
+	.set	.LANCHOR91,. + 0
 	.type	xlc_data_sblk, %object
 	.size	xlc_data_sblk, 2
 xlc_data_sblk:
@@ -27911,7 +28560,7 @@ zftl_print_list_count:
 	.zero	2
 	.section	.data.g_nand_para_info,"aw",@progbits
 	.align	3
-	.set	.LANCHOR33,. + 0
+	.set	.LANCHOR32,. + 0
 	.type	g_nand_para_info, %object
 	.size	g_nand_para_info, 32
 g_nand_para_info:
@@ -27945,7 +28594,7 @@ g_nand_para_info:
 	.byte	0
 	.section	.data.hy_f26_ref_value,"aw",@progbits
 	.align	3
-	.set	.LANCHOR165,. + 0
+	.set	.LANCHOR162,. + 0
 	.type	hy_f26_ref_value, %object
 	.size	hy_f26_ref_value, 28
 hy_f26_ref_value:
@@ -28061,7 +28710,7 @@ nand_opt_para:
 	.zero	14
 	.section	.data.sd15_slc_rr,"aw",@progbits
 	.align	3
-	.set	.LANCHOR41,. + 0
+	.set	.LANCHOR40,. + 0
 	.type	sd15_slc_rr, %object
 	.size	sd15_slc_rr, 25
 sd15_slc_rr:
@@ -28092,7 +28741,7 @@ sd15_slc_rr:
 	.byte	112
 	.section	.data.sd15_tlc_rr,"aw",@progbits
 	.align	3
-	.set	.LANCHOR40,. + 0
+	.set	.LANCHOR39,. + 0
 	.type	sd15_tlc_rr, %object
 	.size	sd15_tlc_rr, 329
 sd15_tlc_rr:
@@ -29591,7 +30240,7 @@ tlc_prog_order:
 	.hword	1019
 	.section	.data.zftl_debug,"aw",@progbits
 	.align	2
-	.set	.LANCHOR14,. + 0
+	.set	.LANCHOR19,. + 0
 	.type	zftl_debug, %object
 	.size	zftl_debug, 4
 zftl_debug:
@@ -30974,467 +31623,467 @@ zftl_nand_flash_para_tbl:
 	.byte	-38
 	.byte	-33
 	.byte	0
-	.section	.rodata.__func__.7104,"a",@progbits
+	.section	.rodata.__func__.7124,"a",@progbits
 	.align	3
-	.set	.LANCHOR173,. + 0
-	.type	__func__.7104, %object
-	.size	__func__.7104, 19
-__func__.7104:
+	.set	.LANCHOR170,. + 0
+	.type	__func__.7124, %object
+	.size	__func__.7124, 19
+__func__.7124:
 	.string	"flash_read_page_en"
-	.section	.rodata.__func__.7165,"a",@progbits
+	.section	.rodata.__func__.7185,"a",@progbits
 	.align	3
-	.set	.LANCHOR189,. + 0
-	.type	__func__.7165, %object
-	.size	__func__.7165, 19
-__func__.7165:
+	.set	.LANCHOR186,. + 0
+	.type	__func__.7185, %object
+	.size	__func__.7185, 19
+__func__.7185:
 	.string	"flash_prog_page_en"
-	.section	.rodata.__func__.7181,"a",@progbits
+	.section	.rodata.__func__.7201,"a",@progbits
 	.align	3
-	.set	.LANCHOR44,. + 0
-	.type	__func__.7181, %object
-	.size	__func__.7181, 26
-__func__.7181:
+	.set	.LANCHOR43,. + 0
+	.type	__func__.7201, %object
+	.size	__func__.7201, 26
+__func__.7201:
 	.string	"flash_erase_duplane_block"
-	.section	.rodata.__func__.7192,"a",@progbits
+	.section	.rodata.__func__.7212,"a",@progbits
 	.align	3
-	.set	.LANCHOR46,. + 0
-	.type	__func__.7192, %object
-	.size	__func__.7192, 21
-__func__.7192:
+	.set	.LANCHOR45,. + 0
+	.type	__func__.7212, %object
+	.size	__func__.7212, 21
+__func__.7212:
 	.string	"flash_erase_block_en"
-	.section	.rodata.__func__.7206,"a",@progbits
+	.section	.rodata.__func__.7226,"a",@progbits
 	.align	3
-	.set	.LANCHOR29,. + 0
-	.type	__func__.7206, %object
-	.size	__func__.7206, 28
-__func__.7206:
+	.set	.LANCHOR28,. + 0
+	.type	__func__.7226, %object
+	.size	__func__.7226, 28
+__func__.7226:
 	.string	"flash_wait_device_ready_raw"
-	.section	.rodata.__func__.7230,"a",@progbits
+	.section	.rodata.__func__.7250,"a",@progbits
 	.align	3
-	.set	.LANCHOR178,. + 0
-	.type	__func__.7230, %object
-	.size	__func__.7230, 26
-__func__.7230:
+	.set	.LANCHOR175,. + 0
+	.type	__func__.7250, %object
+	.size	__func__.7250, 26
+__func__.7250:
 	.string	"flash_start_tlc_page_prog"
-	.section	.rodata.__func__.7241,"a",@progbits
+	.section	.rodata.__func__.7261,"a",@progbits
 	.align	3
-	.set	.LANCHOR179,. + 0
-	.type	__func__.7241, %object
-	.size	__func__.7241, 29
-__func__.7241:
+	.set	.LANCHOR176,. + 0
+	.type	__func__.7261, %object
+	.size	__func__.7261, 29
+__func__.7261:
 	.string	"flash_start_3d_mlc_page_prog"
-	.section	.rodata.__func__.7259,"a",@progbits
+	.section	.rodata.__func__.7279,"a",@progbits
 	.align	3
-	.set	.LANCHOR180,. + 0
-	.type	__func__.7259, %object
-	.size	__func__.7259, 22
-__func__.7259:
+	.set	.LANCHOR177,. + 0
+	.type	__func__.7279, %object
+	.size	__func__.7279, 22
+__func__.7279:
 	.string	"flash_start_page_prog"
-	.section	.rodata.__func__.7270,"a",@progbits
+	.section	.rodata.__func__.7290,"a",@progbits
 	.align	3
-	.set	.LANCHOR35,. + 0
-	.type	__func__.7270, %object
-	.size	__func__.7270, 22
-__func__.7270:
+	.set	.LANCHOR34,. + 0
+	.type	__func__.7290, %object
+	.size	__func__.7290, 22
+__func__.7290:
 	.string	"flash_start_page_read"
-	.section	.rodata.__func__.7283,"a",@progbits
+	.section	.rodata.__func__.7303,"a",@progbits
 	.align	3
-	.set	.LANCHOR181,. + 0
-	.type	__func__.7283, %object
-	.size	__func__.7283, 31
-__func__.7283:
+	.set	.LANCHOR178,. + 0
+	.type	__func__.7303, %object
+	.size	__func__.7303, 31
+__func__.7303:
 	.string	"flash_complete_plane_page_read"
-	.section	.rodata.__func__.7295,"a",@progbits
+	.section	.rodata.__func__.7315,"a",@progbits
 	.align	3
-	.set	.LANCHOR47,. + 0
-	.type	__func__.7295, %object
-	.size	__func__.7295, 23
-__func__.7295:
+	.set	.LANCHOR46,. + 0
+	.type	__func__.7315, %object
+	.size	__func__.7315, 23
+__func__.7315:
 	.string	"flash_start_plane_read"
-	.section	.rodata.__func__.7308,"a",@progbits
+	.section	.rodata.__func__.7328,"a",@progbits
 	.align	3
-	.set	.LANCHOR182,. + 0
-	.type	__func__.7308, %object
-	.size	__func__.7308, 25
-__func__.7308:
+	.set	.LANCHOR179,. + 0
+	.type	__func__.7328, %object
+	.size	__func__.7328, 25
+__func__.7328:
 	.string	"flash_complete_page_read"
-	.section	.rodata.__func__.7723,"a",@progbits
+	.section	.rodata.__func__.7743,"a",@progbits
 	.align	3
-	.set	.LANCHOR146,. + 0
-	.type	__func__.7723, %object
-	.size	__func__.7723, 20
-__func__.7723:
+	.set	.LANCHOR143,. + 0
+	.type	__func__.7743, %object
+	.size	__func__.7743, 20
+__func__.7743:
 	.string	"flash_die_info_init"
-	.section	.rodata.__func__.7734,"a",@progbits
+	.section	.rodata.__func__.7754,"a",@progbits
 	.align	3
-	.set	.LANCHOR15,. + 0
-	.type	__func__.7734, %object
-	.size	__func__.7734, 22
-__func__.7734:
+	.set	.LANCHOR20,. + 0
+	.type	__func__.7754, %object
+	.size	__func__.7754, 22
+__func__.7754:
 	.string	"nand_flash_print_info"
-	.section	.rodata.__func__.7783,"a",@progbits
+	.section	.rodata.__func__.7803,"a",@progbits
 	.align	3
 	.set	.LANCHOR213,. + 0
-	.type	__func__.7783, %object
-	.size	__func__.7783, 16
-__func__.7783:
+	.type	__func__.7803, %object
+	.size	__func__.7803, 16
+__func__.7803:
 	.string	"nand_flash_init"
-	.section	.rodata.__func__.7806,"a",@progbits
+	.section	.rodata.__func__.7826,"a",@progbits
 	.align	3
-	.set	.LANCHOR158,. + 0
-	.type	__func__.7806, %object
-	.size	__func__.7806, 11
-__func__.7806:
+	.set	.LANCHOR155,. + 0
+	.type	__func__.7826, %object
+	.size	__func__.7826, 11
+__func__.7826:
 	.string	"nandc_init"
-	.section	.rodata.__func__.7975,"a",@progbits
+	.section	.rodata.__func__.7991,"a",@progbits
 	.align	3
-	.set	.LANCHOR59,. + 0
-	.type	__func__.7975, %object
-	.size	__func__.7975, 13
-__func__.7975:
+	.set	.LANCHOR58,. + 0
+	.type	__func__.7991, %object
+	.size	__func__.7991, 13
+__func__.7991:
 	.string	"buf_add_tail"
-	.section	.rodata.__func__.7988,"a",@progbits
+	.section	.rodata.__func__.8004,"a",@progbits
 	.align	3
-	.set	.LANCHOR61,. + 0
-	.type	__func__.7988, %object
-	.size	__func__.7988, 10
-__func__.7988:
+	.set	.LANCHOR60,. + 0
+	.type	__func__.8004, %object
+	.size	__func__.8004, 10
+__func__.8004:
 	.string	"buf_alloc"
-	.section	.rodata.__func__.8002,"a",@progbits
+	.section	.rodata.__func__.8018,"a",@progbits
 	.align	3
-	.set	.LANCHOR62,. + 0
-	.type	__func__.8002, %object
-	.size	__func__.8002, 16
-__func__.8002:
+	.set	.LANCHOR61,. + 0
+	.type	__func__.8018, %object
+	.size	__func__.8018, 16
+__func__.8018:
 	.string	"buf_remove_free"
-	.section	.rodata.__func__.8023,"a",@progbits
+	.section	.rodata.__func__.8039,"a",@progbits
 	.align	3
 	.set	.LANCHOR212,. + 0
-	.type	__func__.8023, %object
-	.size	__func__.8023, 20
-__func__.8023:
+	.type	__func__.8039, %object
+	.size	__func__.8039, 20
+__func__.8039:
 	.string	"flash_info_blk_init"
-	.section	.rodata.__func__.8038,"a",@progbits
+	.section	.rodata.__func__.8054,"a",@progbits
 	.align	3
-	.set	.LANCHOR157,. + 0
-	.type	__func__.8038, %object
-	.size	__func__.8038, 21
-__func__.8038:
+	.set	.LANCHOR154,. + 0
+	.type	__func__.8054, %object
+	.size	__func__.8054, 21
+__func__.8054:
 	.string	"flash_info_data_init"
-	.section	.rodata.__func__.8060,"a",@progbits
+	.section	.rodata.__func__.8076,"a",@progbits
 	.align	3
 	.set	.LANCHOR209,. + 0
-	.type	__func__.8060, %object
-	.size	__func__.8060, 17
-__func__.8060:
+	.type	__func__.8076, %object
+	.size	__func__.8076, 17
+__func__.8076:
 	.string	"flash_info_flush"
-	.section	.rodata.__func__.8136,"a",@progbits
+	.section	.rodata.__func__.8152,"a",@progbits
 	.align	3
-	.set	.LANCHOR150,. + 0
-	.type	__func__.8136, %object
-	.size	__func__.8136, 17
-__func__.8136:
+	.set	.LANCHOR147,. + 0
+	.type	__func__.8152, %object
+	.size	__func__.8152, 17
+__func__.8152:
 	.string	"lpa_rebuild_hash"
-	.section	.rodata.__func__.8186,"a",@progbits
+	.section	.rodata.__func__.8202,"a",@progbits
 	.align	3
 	.set	.LANCHOR232,. + 0
-	.type	__func__.8186, %object
-	.size	__func__.8186, 17
-__func__.8186:
+	.type	__func__.8202, %object
+	.size	__func__.8202, 17
+__func__.8202:
 	.string	"ftl_write_commit"
-	.section	.rodata.__func__.8204,"a",@progbits
+	.section	.rodata.__func__.8220,"a",@progbits
 	.align	3
 	.set	.LANCHOR130,. + 0
-	.type	__func__.8204, %object
-	.size	__func__.8204, 14
-__func__.8204:
+	.type	__func__.8220, %object
+	.size	__func__.8220, 14
+__func__.8220:
 	.string	"ftl_write_buf"
-	.section	.rodata.__func__.8249,"a",@progbits
+	.section	.rodata.__func__.8265,"a",@progbits
 	.align	3
 	.set	.LANCHOR132,. + 0
-	.type	__func__.8249, %object
-	.size	__func__.8249, 18
-__func__.8249:
+	.type	__func__.8265, %object
+	.size	__func__.8265, 18
+__func__.8265:
 	.string	"zftl_add_read_buf"
-	.section	.rodata.__func__.8282,"a",@progbits
+	.section	.rodata.__func__.8298,"a",@progbits
 	.align	3
 	.set	.LANCHOR230,. + 0
-	.type	__func__.8282, %object
-	.size	__func__.8282, 10
-__func__.8282:
+	.type	__func__.8298, %object
+	.size	__func__.8298, 10
+__func__.8298:
 	.string	"zftl_read"
-	.section	.rodata.__func__.8313,"a",@progbits
+	.section	.rodata.__func__.8330,"a",@progbits
 	.align	3
 	.set	.LANCHOR242,. + 0
-	.type	__func__.8313, %object
-	.size	__func__.8313, 13
-__func__.8313:
+	.type	__func__.8330, %object
+	.size	__func__.8330, 13
+__func__.8330:
 	.string	"_ftl_discard"
-	.section	.rodata.__func__.8459,"a",@progbits
+	.section	.rodata.__func__.8476,"a",@progbits
 	.align	3
 	.set	.LANCHOR225,. + 0
-	.type	__func__.8459, %object
-	.size	__func__.8459, 12
-__func__.8459:
+	.type	__func__.8476, %object
+	.size	__func__.8476, 12
+__func__.8476:
 	.string	"gc_recovery"
-	.section	.rodata.__func__.8469,"a",@progbits
+	.section	.rodata.__func__.8486,"a",@progbits
 	.align	3
-	.set	.LANCHOR72,. + 0
-	.type	__func__.8469, %object
-	.size	__func__.8469, 12
-__func__.8469:
+	.set	.LANCHOR71,. + 0
+	.type	__func__.8486, %object
+	.size	__func__.8486, 12
+__func__.8486:
 	.string	"gc_add_sblk"
-	.section	.rodata.__func__.8516,"a",@progbits
+	.section	.rodata.__func__.8533,"a",@progbits
 	.align	3
-	.set	.LANCHOR188,. + 0
-	.type	__func__.8516, %object
-	.size	__func__.8516, 21
-__func__.8516:
+	.set	.LANCHOR185,. + 0
+	.type	__func__.8533, %object
+	.size	__func__.8533, 21
+__func__.8533:
 	.string	"gc_check_data_one_wl"
-	.section	.rodata.__func__.8548,"a",@progbits
+	.section	.rodata.__func__.8565,"a",@progbits
 	.align	3
 	.set	.LANCHOR226,. + 0
-	.type	__func__.8548, %object
-	.size	__func__.8548, 22
-__func__.8548:
+	.type	__func__.8565, %object
+	.size	__func__.8565, 22
+__func__.8565:
 	.string	"gc_update_l2p_map_new"
-	.section	.rodata.__func__.8561,"a",@progbits
+	.section	.rodata.__func__.8578,"a",@progbits
 	.align	3
-	.set	.LANCHOR78,. + 0
-	.type	__func__.8561, %object
-	.size	__func__.8561, 19
-__func__.8561:
+	.set	.LANCHOR77,. + 0
+	.type	__func__.8578, %object
+	.size	__func__.8578, 19
+__func__.8578:
 	.string	"gc_write_completed"
-	.section	.rodata.__func__.8591,"a",@progbits
+	.section	.rodata.__func__.8608,"a",@progbits
 	.align	3
 	.set	.LANCHOR234,. + 0
-	.type	__func__.8591, %object
-	.size	__func__.8591, 16
-__func__.8591:
+	.type	__func__.8608, %object
+	.size	__func__.8608, 16
+__func__.8608:
 	.string	"gc_do_copy_back"
-	.section	.rodata.__func__.8618,"a",@progbits
+	.section	.rodata.__func__.8635,"a",@progbits
 	.align	3
 	.set	.LANCHOR127,. + 0
-	.type	__func__.8618, %object
-	.size	__func__.8618, 16
-__func__.8618:
+	.type	__func__.8635, %object
+	.size	__func__.8635, 16
+__func__.8635:
 	.string	"gc_free_src_blk"
-	.section	.rodata.__func__.8662,"a",@progbits
+	.section	.rodata.__func__.8679,"a",@progbits
 	.align	3
 	.set	.LANCHOR227,. + 0
-	.type	__func__.8662, %object
-	.size	__func__.8662, 16
-__func__.8662:
+	.type	__func__.8679, %object
+	.size	__func__.8679, 16
+__func__.8679:
 	.string	"gc_scan_src_blk"
-	.section	.rodata.__func__.8723,"a",@progbits
+	.section	.rodata.__func__.8740,"a",@progbits
 	.align	3
 	.set	.LANCHOR228,. + 0
-	.type	__func__.8723, %object
-	.size	__func__.8723, 20
-__func__.8723:
+	.type	__func__.8740, %object
+	.size	__func__.8740, 20
+__func__.8740:
 	.string	"gc_scan_static_data"
-	.section	.rodata.__func__.8790,"a",@progbits
+	.section	.rodata.__func__.8834,"a",@progbits
 	.align	3
 	.set	.LANCHOR237,. + 0
-	.type	__func__.8790, %object
-	.size	__func__.8790, 11
-__func__.8790:
+	.type	__func__.8834, %object
+	.size	__func__.8834, 11
+__func__.8834:
 	.string	"zftl_do_gc"
-	.section	.rodata.__func__.8885,"a",@progbits
+	.section	.rodata.__func__.8929,"a",@progbits
 	.align	3
 	.set	.LANCHOR5,. + 0
-	.type	__func__.8885, %object
-	.size	__func__.8885, 18
-__func__.8885:
+	.type	__func__.8929, %object
+	.size	__func__.8929, 18
+__func__.8929:
 	.string	"_list_remove_node"
-	.section	.rodata.__func__.8910,"a",@progbits
+	.section	.rodata.__func__.8954,"a",@progbits
 	.align	3
-	.set	.LANCHOR11,. + 0
-	.type	__func__.8910, %object
-	.size	__func__.8910, 23
-__func__.8910:
+	.set	.LANCHOR13,. + 0
+	.type	__func__.8954, %object
+	.size	__func__.8954, 23
+__func__.8954:
 	.string	"_list_update_data_list"
-	.section	.rodata.__func__.8985,"a",@progbits
+	.section	.rodata.__func__.9029,"a",@progbits
 	.align	3
-	.set	.LANCHOR154,. + 0
-	.type	__func__.8985, %object
-	.size	__func__.8985, 20
-__func__.8985:
+	.set	.LANCHOR151,. + 0
+	.type	__func__.9029, %object
+	.size	__func__.9029, 20
+__func__.9029:
 	.string	"zftl_sblk_list_init"
-	.section	.rodata.__func__.9019,"a",@progbits
+	.section	.rodata.__func__.9063,"a",@progbits
 	.align	3
-	.set	.LANCHOR196,. + 0
-	.type	__func__.9019, %object
-	.size	__func__.9019, 15
-__func__.9019:
+	.set	.LANCHOR193,. + 0
+	.type	__func__.9063, %object
+	.size	__func__.9063, 15
+__func__.9063:
 	.string	"ftl_info_flush"
-	.section	.rodata.__func__.9051,"a",@progbits
+	.section	.rodata.__func__.9118,"a",@progbits
 	.align	3
-	.set	.LANCHOR135,. + 0
-	.type	__func__.9051, %object
-	.size	__func__.9051, 15
-__func__.9051:
+	.set	.LANCHOR200,. + 0
+	.type	__func__.9118, %object
+	.size	__func__.9118, 15
+__func__.9118:
 	.string	"ftl_alloc_sblk"
-	.section	.rodata.__func__.9093,"a",@progbits
+	.section	.rodata.__func__.9160,"a",@progbits
 	.align	3
 	.set	.LANCHOR113,. + 0
-	.type	__func__.9093, %object
-	.size	__func__.9093, 18
-__func__.9093:
+	.type	__func__.9160, %object
+	.size	__func__.9160, 18
+__func__.9160:
 	.string	"ftl_alloc_sys_blk"
-	.section	.rodata.__func__.9103,"a",@progbits
+	.section	.rodata.__func__.9170,"a",@progbits
 	.align	3
 	.set	.LANCHOR114,. + 0
-	.type	__func__.9103, %object
-	.size	__func__.9103, 17
-__func__.9103:
+	.type	__func__.9170, %object
+	.size	__func__.9170, 17
+__func__.9170:
 	.string	"ftl_free_sys_blk"
-	.section	.rodata.__func__.9138,"a",@progbits
+	.section	.rodata.__func__.9205,"a",@progbits
 	.align	3
 	.set	.LANCHOR229,. + 0
-	.type	__func__.9138, %object
-	.size	__func__.9138, 14
-__func__.9138:
+	.type	__func__.9205, %object
+	.size	__func__.9205, 14
+__func__.9205:
 	.string	"ftl_sblk_dump"
-	.section	.rodata.__func__.9162,"a",@progbits
+	.section	.rodata.__func__.9229,"a",@progbits
 	.align	3
 	.set	.LANCHOR218,. + 0
-	.type	__func__.9162, %object
-	.size	__func__.9162, 16
-__func__.9162:
+	.type	__func__.9229, %object
+	.size	__func__.9229, 16
+__func__.9229:
 	.string	"ftl_sysblk_dump"
-	.section	.rodata.__func__.9187,"a",@progbits
+	.section	.rodata.__func__.9254,"a",@progbits
 	.align	3
 	.set	.LANCHOR219,. + 0
-	.type	__func__.9187, %object
-	.size	__func__.9187, 23
-__func__.9187:
+	.type	__func__.9254, %object
+	.size	__func__.9254, 23
+__func__.9254:
 	.string	"ftl_open_sblk_recovery"
-	.section	.rodata.__func__.9220,"a",@progbits
+	.section	.rodata.__func__.9287,"a",@progbits
 	.align	3
 	.set	.LANCHOR115,. + 0
-	.type	__func__.9220, %object
-	.size	__func__.9220, 23
-__func__.9220:
+	.type	__func__.9287, %object
+	.size	__func__.9287, 23
+__func__.9287:
 	.string	"ftl_get_ppa_from_index"
-	.section	.rodata.__func__.9241,"a",@progbits
+	.section	.rodata.__func__.9308,"a",@progbits
 	.align	3
 	.set	.LANCHOR231,. + 0
-	.type	__func__.9241, %object
-	.size	__func__.9241, 19
-__func__.9241:
+	.type	__func__.9308, %object
+	.size	__func__.9308, 19
+__func__.9308:
 	.string	"ftl_update_l2p_map"
-	.section	.rodata.__func__.9260,"a",@progbits
+	.section	.rodata.__func__.9327,"a",@progbits
 	.align	3
 	.set	.LANCHOR119,. + 0
-	.type	__func__.9260, %object
-	.size	__func__.9260, 22
-__func__.9260:
+	.type	__func__.9327, %object
+	.size	__func__.9327, 22
+__func__.9327:
 	.string	"ftl_get_new_free_page"
-	.section	.rodata.__func__.9271,"a",@progbits
+	.section	.rodata.__func__.9338,"a",@progbits
 	.align	3
 	.set	.LANCHOR120,. + 0
-	.type	__func__.9271, %object
-	.size	__func__.9271, 22
-__func__.9271:
+	.type	__func__.9338, %object
+	.size	__func__.9338, 22
+__func__.9338:
 	.string	"ftl_ext_alloc_new_blk"
-	.section	.rodata.__func__.9297,"a",@progbits
+	.section	.rodata.__func__.9364,"a",@progbits
 	.align	3
-	.set	.LANCHOR201,. + 0
-	.type	__func__.9297, %object
-	.size	__func__.9297, 19
-__func__.9297:
+	.set	.LANCHOR198,. + 0
+	.type	__func__.9364, %object
+	.size	__func__.9364, 19
+__func__.9364:
 	.string	"ftl_ext_info_flush"
-	.section	.rodata.__func__.9309,"a",@progbits
+	.section	.rodata.__func__.9376,"a",@progbits
 	.align	3
-	.set	.LANCHOR202,. + 0
-	.type	__func__.9309, %object
-	.size	__func__.9309, 18
-__func__.9309:
+	.set	.LANCHOR199,. + 0
+	.type	__func__.9376, %object
+	.size	__func__.9376, 18
+__func__.9376:
 	.string	"ftl_ext_info_init"
-	.section	.rodata.__func__.9348,"a",@progbits
+	.section	.rodata.__func__.9415,"a",@progbits
 	.align	3
-	.set	.LANCHOR203,. + 0
-	.type	__func__.9348, %object
-	.size	__func__.9348, 25
-__func__.9348:
+	.set	.LANCHOR201,. + 0
+	.type	__func__.9415, %object
+	.size	__func__.9415, 25
+__func__.9415:
 	.string	"ftl_low_format_data_init"
-	.section	.rodata.__func__.9363,"a",@progbits
+	.section	.rodata.__func__.9430,"a",@progbits
 	.align	3
-	.set	.LANCHOR205,. + 0
-	.type	__func__.9363, %object
-	.size	__func__.9363, 15
-__func__.9363:
+	.set	.LANCHOR203,. + 0
+	.type	__func__.9430, %object
+	.size	__func__.9430, 15
+__func__.9430:
 	.string	"ftl_low_format"
-	.section	.rodata.__func__.9411,"a",@progbits
+	.section	.rodata.__func__.9478,"a",@progbits
 	.align	3
-	.set	.LANCHOR192,. + 0
-	.type	__func__.9411, %object
-	.size	__func__.9411, 14
-__func__.9411:
+	.set	.LANCHOR189,. + 0
+	.type	__func__.9478, %object
+	.size	__func__.9478, 14
+__func__.9478:
 	.string	"ftl_prog_page"
-	.section	.rodata.__func__.9534,"a",@progbits
+	.section	.rodata.__func__.9601,"a",@progbits
 	.align	3
-	.set	.LANCHOR183,. + 0
-	.type	__func__.9534, %object
-	.size	__func__.9534, 31
-__func__.9534:
+	.set	.LANCHOR180,. + 0
+	.type	__func__.9601, %object
+	.size	__func__.9601, 31
+__func__.9601:
 	.string	"queue_wait_first_req_completed"
-	.section	.rodata.__func__.9588,"a",@progbits
+	.section	.rodata.__func__.9655,"a",@progbits
 	.align	3
-	.set	.LANCHOR184,. + 0
-	.type	__func__.9588, %object
-	.size	__func__.9588, 15
-__func__.9588:
+	.set	.LANCHOR181,. + 0
+	.type	__func__.9655, %object
+	.size	__func__.9655, 15
+__func__.9655:
 	.string	"sblk_prog_page"
-	.section	.rodata.__func__.9615,"a",@progbits
+	.section	.rodata.__func__.9682,"a",@progbits
 	.align	3
-	.set	.LANCHOR187,. + 0
-	.type	__func__.9615, %object
-	.size	__func__.9615, 15
-__func__.9615:
+	.set	.LANCHOR184,. + 0
+	.type	__func__.9682, %object
+	.size	__func__.9682, 15
+__func__.9682:
 	.string	"sblk_read_page"
-	.section	.rodata.__func__.9685,"a",@progbits
+	.section	.rodata.__func__.9752,"a",@progbits
 	.align	3
 	.set	.LANCHOR220,. + 0
-	.type	__func__.9685, %object
-	.size	__func__.9685, 16
-__func__.9685:
+	.type	__func__.9752, %object
+	.size	__func__.9752, 16
+__func__.9752:
 	.string	"load_l2p_region"
-	.section	.rodata.__func__.9701,"a",@progbits
+	.section	.rodata.__func__.9768,"a",@progbits
 	.align	3
-	.set	.LANCHOR156,. + 0
-	.type	__func__.9701, %object
-	.size	__func__.9701, 13
-__func__.9701:
+	.set	.LANCHOR153,. + 0
+	.type	__func__.9768, %object
+	.size	__func__.9768, 13
+__func__.9768:
 	.string	"pm_free_sblk"
-	.section	.rodata.__func__.9725,"a",@progbits
+	.section	.rodata.__func__.9792,"a",@progbits
 	.align	3
 	.set	.LANCHOR222,. + 0
-	.type	__func__.9725, %object
-	.size	__func__.9725, 6
-__func__.9725:
+	.type	__func__.9792, %object
+	.size	__func__.9792, 6
+__func__.9792:
 	.string	"pm_gc"
-	.section	.rodata.__func__.9741,"a",@progbits
+	.section	.rodata.__func__.9808,"a",@progbits
 	.align	3
-	.set	.LANCHOR137,. + 0
-	.type	__func__.9741, %object
-	.size	__func__.9741, 17
-__func__.9741:
+	.set	.LANCHOR205,. + 0
+	.type	__func__.9808, %object
+	.size	__func__.9808, 17
+__func__.9808:
 	.string	"pm_alloc_new_blk"
-	.section	.rodata.__func__.9751,"a",@progbits
+	.section	.rodata.__func__.9818,"a",@progbits
 	.align	3
 	.set	.LANCHOR206,. + 0
-	.type	__func__.9751, %object
-	.size	__func__.9751, 14
-__func__.9751:
+	.type	__func__.9818, %object
+	.size	__func__.9818, 14
+__func__.9818:
 	.string	"pm_write_page"
-	.section	.rodata.__func__.9769,"a",@progbits
+	.section	.rodata.__func__.9836,"a",@progbits
 	.align	3
-	.set	.LANCHOR140,. + 0
-	.type	__func__.9769, %object
-	.size	__func__.9769, 21
-__func__.9769:
+	.set	.LANCHOR137,. + 0
+	.type	__func__.9836, %object
+	.size	__func__.9836, 21
+__func__.9836:
 	.string	"pm_select_ram_region"
 	.section	.rodata._list_remove_node.str1.1,"aMS",@progbits,1
 .LC0:
@@ -31455,50 +32104,53 @@ __func__.9769:
 .LC47:
 	.string	"buf = %d, next=%d, flag=%d gc_write_flag=%d, lun_state=%d, op_status = %d lpa=%x, ppa=%x\n"
 	.section	.rodata.dump_ftl_info.str1.1,"aMS",@progbits,1
-.LC189:
+.LC192:
 	.string	"free_buf_count: %d\n"
-.LC190:
+.LC193:
 	.string	"g_ftl_info_blk blk:0x%x, index:0x%x, page:0x%x\n"
-.LC191:
+.LC194:
 	.string	"ftl_ext_info_blk blk:0x%x, page:0x%x\n"
-.LC192:
+.LC195:
 	.string	"ac_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC193:
+.LC196:
 	.string	"tmp_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC194:
+.LC197:
 	.string	"gc_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC195:
+.LC198:
 	.string	"lpa:"
-.LC196:
+.LC199:
 	.string	"vpn:"
-.LC197:
+.LC200:
 	.string	"sblk:"
-.LC198:
+.LC201:
 	.string	"lpa_hash:"
-.LC199:
+.LC202:
 	.string	"lpa_hash_index:"
 	.section	.rodata.dump_pm_blk.str1.1,"aMS",@progbits,1
-.LC254:
+.LC257:
 	.string	"pm l2p:"
-.LC255:
+.LC258:
 	.string	"pm blk:"
 	.section	.rodata.dump_sblk_queue.str1.1,"aMS",@progbits,1
-.LC80:
+.LC79:
 	.string	"dump_sblk_queue: %d\n"
-.LC81:
+.LC80:
 	.string	"buf id= %d state = %d ppa = %x\n"
 	.section	.rodata.flash_complete_page_read.str1.1,"aMS",@progbits,1
-.LC139:
+.LC136:
 	.string	"flash_complete_page_read %x %x error_ecc %d %d\n"
 	.section	.rodata.flash_ddr_tuning_read.str1.1,"aMS",@progbits,1
-.LC125:
+.LC122:
 	.string	"%d flash_ddr_tuning_read %x ecc=%d\n"
-.LC126:
+.LC123:
 	.string	"sync para %d\n"
-.LC127:
+.LC124:
 	.string	"DDR mode Read error %x %x\n"
-.LC128:
+.LC125:
 	.string	"SDR mode Read %x %x ecc:%x\n"
+	.section	.rodata.flash_dual_page_prog.str1.1,"aMS",@progbits,1
+.LC130:
+	.string	"flash_prog_page %x %x %x\n"
 	.section	.rodata.flash_erase_all.str1.1,"aMS",@progbits,1
 .LC35:
 	.string	"erase done: %x\n"
@@ -31513,43 +32165,41 @@ __func__.9769:
 .LC32:
 	.string	"flash_erase_duplane_block pageadd = %x status = %x\n"
 	.section	.rodata.flash_get_last_written_page.str1.1,"aMS",@progbits,1
-.LC131:
+.LC128:
 	.string	"flash_get_last_written_page: %x %x %x\n"
 	.section	.rodata.flash_info_blk_init.str1.1,"aMS",@progbits,1
-.LC174:
+.LC177:
 	.string	"...%d @ %s %d %p\n"
-.LC175:
+.LC178:
 	.string	"no sys info %x\n"
 	.section	.rodata.flash_info_data_init.str1.1,"aMS",@progbits,1
-.LC97:
+.LC94:
 	.string	"...%d @ %s\n"
 	.section	.rodata.flash_info_flush.str1.1,"aMS",@progbits,1
-.LC171:
+.LC174:
 	.string	"finfo:"
-.LC172:
+.LC175:
 	.string	"flash_info_flush id = %x, page = %x\n"
-.LC173:
+.LC176:
 	.string	"sys_info_flush error:%x\n"
 	.section	.rodata.flash_mask_bad_block.str1.1,"aMS",@progbits,1
 .LC48:
 	.string	"flash_mask_bad_block %d %d\n"
 	.section	.rodata.flash_prog_page.str1.1,"aMS",@progbits,1
-.LC132:
-	.string	"flash_prog_page %x %x %x\n"
-.LC133:
+.LC129:
 	.string	"flash_prog_page page_addr = %x status = %x\n"
 	.section	.rodata.flash_prog_page_en.str1.1,"aMS",@progbits,1
-.LC147:
+.LC144:
 	.string	"flash_prog_page_en:%x %x %x\n"
-.LC148:
+.LC145:
 	.string	"w d:"
-.LC149:
+.LC146:
 	.string	"w s:"
-.LC150:
+.LC147:
 	.string	"spare"
-.LC151:
+.LC148:
 	.string	"data"
-.LC152:
+.LC149:
 	.string	"write error: %x\n"
 	.section	.rodata.flash_read_id.str1.1,"aMS",@progbits,1
 .LC38:
@@ -31558,9 +32208,9 @@ __func__.9769:
 .LC39:
 	.string	"otp:%x %x %x %x\n"
 	.section	.rodata.flash_read_page_en.str1.1,"aMS",@progbits,1
-.LC129:
+.LC126:
 	.string	"flash_read_page_en %x %x %x %x\n"
-.LC130:
+.LC127:
 	.string	"flash_read_page_en %x %x error_ecc %d %d\n"
 	.section	.rodata.flash_set_interface_mode.str1.1,"aMS",@progbits,1
 .LC36:
@@ -31568,111 +32218,119 @@ __func__.9769:
 .LC37:
 	.string	"nand ddr mode %x\n"
 	.section	.rodata.ftl_alloc_new_data_sblk.str1.1,"aMS",@progbits,1
-.LC232:
+.LC235:
 	.string	"error gc_add_sblk: %x\n"
 	.section	.rodata.ftl_alloc_sblk.str1.1,"aMS",@progbits,1
-.LC79:
+.LC167:
 	.string	"alloc sblk %x %d\n"
 	.section	.rodata.ftl_dump_write_open_sblk.str1.1,"aMS",@progbits,1
-.LC166:
+.LC159:
 	.string	"ftl_sblk_dump_write = %x %d %d %d %d\n"
-.LC167:
+.LC160:
 	.string	"blk= %x, page=%x, ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
-.LC168:
+.LC161:
 	.string	"ftl_sblk_dump_write2 = %x %d %d %d\n"
-.LC169:
+.LC162:
 	.string	"ftl_sblk_dump_write = %x %x\n"
-.LC170:
+.LC163:
 	.string	"ftl_sblk_dump_write done = %x\n"
 	.section	.rodata.ftl_ext_info_init.str1.1,"aMS",@progbits,1
-.LC159:
+.LC156:
 	.string	"%s %d %d %x %x\n"
-.LC160:
+.LC157:
 	.string	"ext info hash %x error\n"
-.LC161:
+.LC158:
 	.string	"%s %x %x %x\n"
 	.section	.rodata.ftl_free_sblk.str1.1,"aMS",@progbits,1
 .LC68:
 	.string	"swl_slc_free_mini_ec_blk sblk %x\n"
 	.section	.rodata.ftl_info_blk_init.str1.1,"aMS",@progbits,1
-.LC155:
+.LC152:
 	.string	"%d %x @%d %x\n"
-.LC156:
+.LC153:
 	.string	"ftl_info_blk_init %d %d %x\n"
-.LC157:
+.LC154:
 	.string	"ftl info hash %x error\n"
-.LC158:
+.LC155:
 	.string	"ink flag: %x\n"
 	.section	.rodata.ftl_info_flush.str1.1,"aMS",@progbits,1
-.LC154:
+.LC151:
 	.string	"g_ftl_info_blk blk = %x, page = %x version = %d\n"
+	.section	.rodata.ftl_ink_check_sblk.str1.1,"aMS",@progbits,1
+.LC165:
+	.string	"ftl_ink_check_sblk = %x %d %d\n"
+.LC166:
+	.string	"ftl_ink_check_sblk = %x %d %d end\n"
 	.section	.rodata.ftl_low_format.str1.1,"aMS",@progbits,1
-.LC162:
+.LC169:
 	.string	"ftl_low_format %d\n"
-.LC163:
+.LC170:
 	.string	"low format %d %d %d %d\n"
 	.section	.rodata.ftl_mask_bad_block.str1.1,"aMS",@progbits,1
 .LC66:
 	.string	"mask bad block:cs %x %x block: %x %x\n"
+	.section	.rodata.ftl_open_sblk_init.str1.1,"aMS",@progbits,1
+.LC168:
+	.string	"blk %x is bad block\n"
 	.section	.rodata.ftl_open_sblk_recovery.str1.1,"aMS",@progbits,1
-.LC177:
+.LC180:
 	.string	"saved_active_page  = %x\n"
-.LC178:
+.LC181:
 	.string	"saved_active_plane = %x\n"
-.LC179:
+.LC182:
 	.string	"sblk = %x\n"
-.LC180:
+.LC183:
 	.string	"phy_blk = %x %x\n"
-.LC181:
+.LC184:
 	.string	"num_planes = %x\n"
-.LC182:
+.LC185:
 	.string	"recovery blk=%x, page=%x, ppa = %x, status = %x, hash:%x\n"
-.LC183:
+.LC186:
 	.string	"data:"
-.LC184:
+.LC187:
 	.string	"sblk = %x, vpn0 = %d, vpn1 = %d\n"
-.LC185:
+.LC188:
 	.string	"dump_write_lpa = %x %x %x %x\n"
-.LC186:
+.LC189:
 	.string	"dump write new ppa = %x, last ppa = %x lpa = %x\n"
-.LC187:
+.LC190:
 	.string	"dump write = %x %x %x\n"
-.LC188:
+.LC191:
 	.string	"dump write hash update = %x %x %x\n"
 	.section	.rodata.ftl_re_low_format.str1.1,"aMS",@progbits,1
-.LC164:
+.LC171:
 	.string	"re low format %d\n"
 	.section	.rodata.ftl_sblk_dump.str1.1,"aMS",@progbits,1
-.LC220:
+.LC223:
 	.string	"ftl_sblk_dump = %x %d %d %d %d\n"
-.LC221:
+.LC224:
 	.string	"ftl_sblk_dump = %x %x %x %x\n"
-.LC222:
+.LC225:
 	.string	"page_addr = %x, lpa=%x vpn = %d\n"
-.LC223:
+.LC226:
 	.string	"index= %x, lpa=%x\n"
-.LC224:
+.LC227:
 	.string	"block = %x, vpn=%x check vpn = %x\n"
 	.section	.rodata.ftl_sysblk_dump.str1.1,"aMS",@progbits,1
-.LC176:
+.LC179:
 	.string	"l2p:"
 	.section	.rodata.ftl_test_block.str1.1,"aMS",@progbits,1
-.LC153:
+.LC150:
 	.string	"low format %d\n"
 	.section	.rodata.ftl_update_l2p_map.str1.1,"aMS",@progbits,1
-.LC228:
+.LC231:
 	.string	"ftl_update_l2p_map: %x %x %x\n"
-.LC229:
+.LC232:
 	.string	"ftl_update_l2p_map"
-.LC230:
+.LC233:
 	.string	"lpa_tbl:"
-.LC231:
+.LC234:
 	.string	"sblk %x vpn: %d %d\n"
 	.section	.rodata.ftl_vpn_decrement.str1.1,"aMS",@progbits,1
 .LC65:
 	.string	"ftl_vpn_decrement %x = %d, %d\n"
 	.section	.rodata.ftl_write_commit.str1.1,"aMS",@progbits,1
-.LC233:
+.LC236:
 	.string	"%d read error: ppa:%x, lpa:%x, status:%x\n"
 	.section	.rodata.ftl_write_completed.str1.1,"aMS",@progbits,1
 .LC77:
@@ -31689,12 +32347,12 @@ __func__.9769:
 .LC52:
 	.string	"gc_add_sblk = %d, %d, %d, %d, %d, %d\n"
 	.section	.rodata.gc_check_data_one_wl.str1.1,"aMS",@progbits,1
-.LC146:
+.LC143:
 	.string	"err: ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
 	.section	.rodata.gc_do_copy_back.str1.1,"aMS",@progbits,1
-.LC234:
+.LC237:
 	.string	"gc page in buf: lpa %x ppa = %x pageindex= %x\n"
-.LC235:
+.LC238:
 	.string	"gc_do_copy_back: lpa %x des_ppa = %x %x gc_ppa= %x page_index= %d\n"
 	.section	.rodata.gc_free_bad_sblk.str1.1,"aMS",@progbits,1
 .LC67:
@@ -31707,22 +32365,25 @@ __func__.9769:
 	.section	.rodata.gc_free_temp_buf.str1.1,"aMS",@progbits,1
 .LC55:
 	.string	"%d gc_free_temp_buf buf id= %x\n"
+	.section	.rodata.gc_ink_check_sblk.str1.1,"aMS",@progbits,1
+.LC164:
+	.string	"%x: ink_scaned_blk_num %x\n"
 	.section	.rodata.gc_mark_bad_ppa.str1.1,"aMS",@progbits,1
 .LC53:
 	.string	"gc_mark_bad_ppa %d %x %x\n"
 	.section	.rodata.gc_recovery.str1.1,"aMS",@progbits,1
-.LC210:
+.LC213:
 	.string	"ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
-.LC211:
+.LC214:
 	.string	"ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
-.LC212:
+.LC215:
 	.string	"gc_recovery: %x vpn = %x\n"
 	.section	.rodata.gc_scan_src_blk.str1.1,"aMS",@progbits,1
-.LC217:
+.LC220:
 	.string	"gc_scan_src_blk = %x, vpn = %d\n"
-.LC218:
+.LC221:
 	.string	"js hash error:%x %x %x\n"
-.LC219:
+.LC222:
 	.string	"gc_scan_src_blk = %x, s vpn0 = %d, c vpn1 = %d\n"
 	.section	.rodata.gc_search_src_blk.str1.1,"aMS",@progbits,1
 .LC57:
@@ -31730,69 +32391,69 @@ __func__.9769:
 .LC58:
 	.string	"gc_search_src_blk mode = %x, src mode = %x, count= %d %d\n"
 	.section	.rodata.gc_static_wearleveling.str1.1,"aMS",@progbits,1
-.LC85:
+.LC82:
 	.string	"gc_static_wearleveling: min blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
-.LC86:
+.LC83:
 	.string	"gc_static_wearleveling: min slc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
-.LC87:
+.LC84:
 	.string	"gc_static_wearleveling: min tlc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
-.LC88:
+.LC85:
 	.string	"gc_static_wearleveling: max slc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
-.LC89:
+.LC86:
 	.string	"gc_static_wearleveling: max xlc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
-.LC90:
+.LC87:
 	.string	"gc_static_wearleveling: slc blk: %x, tlc blk: %d avg slc ec: %d, avg tlc ec: %d \n"
-.LC91:
+.LC88:
 	.string	"gc_static_wearleveling: min slc ec: %x, min tlc ec: %d max slc ec: %d, max tlc ec: %d; %d %d\n"
-.LC92:
+.LC89:
 	.string	"swl add tlc gc = %x, %d, %d, %d, %d, %d\n"
-.LC93:
+.LC90:
 	.string	"swl add slc gc  = %x, %d, %d, %d, %d, %d\n"
 	.section	.rodata.gc_update_l2p_map_new.str1.1,"aMS",@progbits,1
-.LC213:
+.LC216:
 	.string	"gc_update_l2p_map_new sblk %x\n"
-.LC214:
+.LC217:
 	.string	"gc_update_l2p_map_new: %x %x %x\n"
-.LC215:
+.LC218:
 	.string	"lpa: %x %x %x\n"
-.LC216:
+.LC219:
 	.string	"gc_update_l2p_map_new: %x vpn = %x vpn1 = %x done\n"
 	.section	.rodata.gc_write_completed.str1.1,"aMS",@progbits,1
 .LC54:
 	.string	"status: %x, ppa: %x\n"
 	.section	.rodata.hynix_get_read_retry_default.str1.1,"aMS",@progbits,1
-.LC105:
+.LC102:
 	.string	"otp error! %d"
-.LC106:
+.LC103:
 	.string	"rr"
 	.section	.rodata.hynix_read_retrial.str1.1,"aMS",@progbits,1
-.LC124:
+.LC121:
 	.string	"hynix RR %d row=%x, count %d, status=%d\n"
 	.section	.rodata.idb_write_data.str1.1,"aMS",@progbits,1
-.LC135:
+.LC132:
 	.string	"1 write_idblock fix data %x %x %x\n"
-.LC136:
+.LC133:
 	.string	"write_idblock check fail! %x\n"
-.LC137:
+.LC134:
 	.string	"write_idblock fail! %x\n"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",@progbits,1
-.LC201:
+.LC204:
 	.string	"region_id = %d, pm_max_region = %d\n"
-.LC202:
+.LC205:
 	.string	"load_l2p_region no ppa = %x , %x, all setting 0xff....\n"
-.LC203:
+.LC206:
 	.string	"load_l2p_region = %x,%x,%x, %x\n"
-.LC204:
+.LC207:
 	.string	"pm_ppa:"
-.LC205:
+.LC208:
 	.string	"spare:"
 	.section	.rodata.lpa_rebuild_hash.str1.1,"aMS",@progbits,1
-.LC84:
+.LC81:
 	.string	"%s %d %d\n"
 	.section	.rodata.micron_read_retrial.str1.1,"aMS",@progbits,1
-.LC115:
+.LC112:
 	.string	"MT %d row=%x,last status %d,status = %d\n"
-.LC116:
+.LC113:
 	.string	"MT RR %d row=%x,count %d,status=%d\n"
 	.section	.rodata.nand_flash_print_info.str1.1,"aMS",@progbits,1
 .LC1:
@@ -31856,55 +32517,53 @@ __func__.9769:
 .LC30:
 	.string	"g_flash_toggle_mode_en: %x\n"
 	.section	.rodata.nandc_init.str1.1,"aMS",@progbits,1
-.LC98:
+.LC95:
 	.string	"...%s enter... %p\n"
-.LC99:
+.LC96:
 	.string	"0:%x %x %x %x %x\n"
-.LC100:
+.LC97:
 	.string	"g_nandc_ver...%d\n"
 	.section	.rodata.nandc_xfer.str1.1,"aMS",@progbits,1
-.LC112:
+.LC109:
 	.string	"dqs data abort %x\n"
-.LC113:
+.LC110:
 	.string	"dqs data timeout %x\n"
-.LC114:
+.LC111:
 	.string	"xfer error %x\n"
 	.section	.rodata.nandc_xfer_done.str1.1,"aMS",@progbits,1
-.LC107:
+.LC104:
 	.string	"flash_abort_clear = %d\n"
-.LC108:
+.LC105:
 	.string	"%d mtrans_cnt = %d page_num = %d\n"
-.LC109:
+.LC106:
 	.string	"%d flReg.d32=%x %x\n"
-.LC110:
+.LC107:
 	.string	"nandc:"
-.LC111:
+.LC108:
 	.string	"nandc_xfer_done read error %x\n"
 	.section	.rodata.pm_alloc_new_blk.str1.1,"aMS",@progbits,1
-.LC82:
-	.string	"blk %x is bad block\n"
-.LC83:
+.LC172:
 	.string	"pm_alloc_new_blk: %x %x %x %x\n"
 	.section	.rodata.pm_free_sblk.str1.1,"aMS",@progbits,1
-.LC95:
+.LC92:
 	.string	"GC PM block %x %x %x %d\n"
-.LC96:
+.LC93:
 	.string	"ftl_free_no_use_map_blk %x %x %x %d\n"
 	.section	.rodata.pm_init.str1.1,"aMS",@progbits,1
-.LC206:
+.LC209:
 	.string	"pm_init posr %x %x %x\n"
-.LC207:
+.LC210:
 	.string	"pm_init recovery %x %x %x\n"
-.LC208:
+.LC211:
 	.string	"pm_init hash %x error\n"
 	.section	.rodata.pm_log2phys.str1.1,"aMS",@progbits,1
-.LC209:
+.LC212:
 	.string	"pm_log2phys  lpn = %d, max lpn = %d\n"
 	.section	.rodata.pm_ppa_update_check.str1.1,"aMS",@progbits,1
-.LC200:
+.LC203:
 	.string	"%s w error lpn = %x, max ppa = %d\n"
 	.section	.rodata.pm_write_page.str1.1,"aMS",@progbits,1
-.LC165:
+.LC173:
 	.string	"pm_write_page write error: %x\n"
 	.section	.rodata.print_ftl_debug_info.str1.1,"aMS",@progbits,1
 .LC71:
@@ -31928,19 +32587,19 @@ __func__.9769:
 .LC64:
 	.string	"%d: node:%x %x %x %x, %d %d %d %d %d\n"
 	.section	.rodata.queue_wait_first_req_completed.str1.1,"aMS",@progbits,1
-.LC140:
+.LC137:
 	.string	"read: %x %x %x %x\n"
-.LC141:
+.LC138:
 	.string	"0set buf %d,status = %x, ppa = %x lun state = %d\n"
-.LC142:
+.LC139:
 	.string	"prog end %x %x error_ecc %d %d\n"
-.LC143:
+.LC140:
 	.string	"1set buf %d,status = %x, ppa = %x lun state = %d\n"
-.LC144:
+.LC141:
 	.string	"dp prog end %x %x error_ecc %d %d\n"
 	.section	.rodata.random_seed,"a",@progbits
 	.align	3
-	.set	.LANCHOR55,. + 0
+	.set	.LANCHOR54,. + 0
 	.type	random_seed, %object
 	.size	random_seed, 256
 random_seed:
@@ -32073,20 +32732,20 @@ random_seed:
 	.hword	17598
 	.hword	28087
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",@progbits,1
-.LC251:
+.LC254:
 	.string	"zftl_init %x\n"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
-.LC101:
+.LC98:
 	.string	"%s %p + 0x%x:"
-.LC102:
+.LC99:
 	.string	"%x "
-.LC103:
+.LC100:
 	.string	""
-.LC104:
+.LC101:
 	.string	"%s\n"
 	.section	.rodata.samsung_14nm_mlc_rr,"a",@progbits
 	.align	3
-	.set	.LANCHOR171,. + 0
+	.set	.LANCHOR168,. + 0
 	.type	samsung_14nm_mlc_rr, %object
 	.size	samsung_14nm_mlc_rr, 104
 samsung_14nm_mlc_rr:
@@ -32196,7 +32855,7 @@ samsung_14nm_mlc_rr:
 	.byte	8
 	.section	.rodata.samsung_14nm_slc_rr,"a",@progbits
 	.align	3
-	.set	.LANCHOR170,. + 0
+	.set	.LANCHOR167,. + 0
 	.type	samsung_14nm_slc_rr, %object
 	.size	samsung_14nm_slc_rr, 26
 samsung_14nm_slc_rr:
@@ -32227,24 +32886,24 @@ samsung_14nm_slc_rr:
 	.byte	-115
 	.byte	100
 	.section	.rodata.samsung_read_retrial.str1.1,"aMS",@progbits,1
-.LC121:
+.LC118:
 	.string	"samsung SRR %d row=%x, status=%d\n"
-.LC122:
+.LC119:
 	.string	"samsung TRR %d row=%x, status=%d\n"
-.LC123:
+.LC120:
 	.string	"samsung RR %d row=%x,count %d,status=%d\n"
 	.section	.rodata.sandisk_prog_test_bad_block.str1.1,"aMS",@progbits,1
 .LC40:
 	.string	"bad block test:%x %x\n"
 	.section	.rodata.sblk_mlc_dump_prog.str1.1,"aMS",@progbits,1
-.LC138:
+.LC135:
 	.string	"sblk_mlc_dump_prog wl_addr= %x ppa = %x ppa = %x\n"
 	.section	.rodata.sblk_prog_page.str1.1,"aMS",@progbits,1
-.LC145:
+.LC142:
 	.string	"sblk_prog_page ppa = %x, count = %d\n"
 	.section	.rodata.toshiba_15ref_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR22,. + 0
+	.set	.LANCHOR14,. + 0
 	.type	toshiba_15ref_value, %object
 	.size	toshiba_15ref_value, 95
 toshiba_15ref_value:
@@ -32345,7 +33004,7 @@ toshiba_15ref_value:
 	.byte	0
 	.section	.rodata.toshiba_3D_slc_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR39,. + 0
+	.set	.LANCHOR38,. + 0
 	.type	toshiba_3D_slc_value, %object
 	.size	toshiba_3D_slc_value, 11
 toshiba_3D_slc_value:
@@ -32362,7 +33021,7 @@ toshiba_3D_slc_value:
 	.byte	56
 	.section	.rodata.toshiba_3D_tlc_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR38,. + 0
+	.set	.LANCHOR37,. + 0
 	.type	toshiba_3D_tlc_value, %object
 	.size	toshiba_3D_tlc_value, 399
 toshiba_3D_tlc_value:
@@ -32766,15 +33425,15 @@ toshiba_3D_tlc_value:
 	.byte	12
 	.byte	14
 	.section	.rodata.toshiba_3d_read_retrial.str1.1,"aMS",@progbits,1
-.LC117:
+.LC114:
 	.string	"toshiba SRR %d row=%x, status=%d\n"
-.LC118:
+.LC115:
 	.string	"toshiba TRR %d row=%x, status=%d\n"
-.LC119:
+.LC116:
 	.string	"toshiba RR %d row=%x,count %d,status=%d\n"
 	.section	.rodata.toshiba_A19ref_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR23,. + 0
+	.set	.LANCHOR15,. + 0
 	.type	toshiba_A19ref_value, %object
 	.size	toshiba_A19ref_value, 45
 toshiba_A19ref_value:
@@ -32825,7 +33484,7 @@ toshiba_A19ref_value:
 	.byte	0
 	.section	.rodata.toshiba_ref_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR25,. + 0
+	.set	.LANCHOR17,. + 0
 	.type	toshiba_ref_value, %object
 	.size	toshiba_ref_value, 8
 toshiba_ref_value:
@@ -32839,7 +33498,7 @@ toshiba_ref_value:
 	.byte	112
 	.section	.rodata.ymtc_3D_slc_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR43,. + 0
+	.set	.LANCHOR42,. + 0
 	.type	ymtc_3D_slc_value, %object
 	.size	ymtc_3D_slc_value, 10
 ymtc_3D_slc_value:
@@ -32855,7 +33514,7 @@ ymtc_3D_slc_value:
 	.byte	56
 	.section	.rodata.ymtc_3D_tlc_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR42,. + 0
+	.set	.LANCHOR41,. + 0
 	.type	ymtc_3D_tlc_value, %object
 	.size	ymtc_3D_tlc_value, 357
 ymtc_3D_tlc_value:
@@ -33217,20 +33876,20 @@ ymtc_3D_tlc_value:
 	.byte	12
 	.byte	14
 	.section	.rodata.ymtc_3d_read_retrial.str1.1,"aMS",@progbits,1
-.LC120:
+.LC117:
 	.string	"YMTC RR %d row=%x,count %d,status=%d\n"
 	.section	.rodata.ymtc_flash_tlc_page_prog.str1.1,"aMS",@progbits,1
-.LC134:
+.LC131:
 	.string	"ymtc_flash_tlc_page_prog page_addr = %x status = %x\n"
 	.section	.rodata.zftl_discard.str1.1,"aMS",@progbits,1
-.LC253:
+.LC256:
 	.string	"ftl_discard:(%x, %x, %x, %x)\n"
 	.section	.rodata.zftl_do_gc.str1.1,"aMS",@progbits,1
-.LC236:
+.LC239:
 	.string	"gc %d: %d %d %d %d %d %d %d\n"
-.LC237:
+.LC240:
 	.string	"GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\n"
-.LC238:
+.LC241:
 	.string	"gc free %x, %d\n"
 	.section	.rodata.zftl_gc_get_free_sblk.str1.1,"aMS",@progbits,1
 .LC59:
@@ -33243,40 +33902,40 @@ ymtc_3D_tlc_value:
 .LC62:
 	.string	"swl_slc_free_mini_ec_blk alloc sblk %x\n"
 	.section	.rodata.zftl_init.str1.1,"aMS",@progbits,1
-.LC239:
-	.string	"FTL version: 6.0.23 20201130"
-.LC240:
+.LC242:
+	.string	"FTL version: 6.0.24 20210107"
+.LC243:
 	.string	"_c_user_data_density := %d\n"
-.LC241:
+.LC244:
 	.string	"_c_totle_phy_density := %d\n"
-.LC242:
+.LC245:
 	.string	"_c_totle_log_page := %d\n"
-.LC243:
+.LC246:
 	.string	"_c_totle_data_density := %d\n"
-.LC244:
+.LC247:
 	.string	"_c_ftl_pm_page_num := %d\n"
-.LC245:
+.LC248:
 	.string	"_c_ftl_byte_pre_page := %d\n"
-.LC246:
+.LC249:
 	.string	"_c_max_pm_sblk := %d\n"
-.LC247:
+.LC250:
 	.string	"_min_slc_super_block := %d\n"
-.LC248:
+.LC251:
 	.string	"_max_xlc_super_block := %d\n"
-.LC249:
+.LC252:
 	.string	"gp_ftl_ext_info %p %p %p\n"
-.LC250:
+.LC253:
 	.string	"flash info size: %d %d %d\n"
 	.section	.rodata.zftl_read.str1.1,"aMS",@progbits,1
-.LC225:
+.LC228:
 	.string	"ftl_read %x %x %x\n"
-.LC226:
+.LC229:
 	.string	"ftl_read refresh =%x, lpa = %x, ppa= %x\n"
-.LC227:
+.LC230:
 	.string	"id=%d, status = %x, lpa = %x, ppa = %x spare = %x %x %x %x\n"
 	.section	.rodata.zftl_sblk_list_init.str1.1,"aMS",@progbits,1
-.LC94:
+.LC91:
 	.string	"free blk vpn error: %x %x\n"
 	.section	.rodata.zftl_write.str1.1,"aMS",@progbits,1
-.LC252:
+.LC255:
 	.string	"ftlwrite %x %x %x %x\n"

commit bc58f2110b982c3730c53a49dccfa54b6e6546b1
Author: Shawn Lin <shawn.lin@rock-chips.com>
Date:   Mon Jan 4 11:36:11 2021 +0800

    drivers: pci: Add Rockchip DesignWare based PCIe controller
    
    => pci enum
    PCIe Linking... LTSSM is 0x1
    PCIe Link up, LTSSM is 0x230011
    PCIE-0: Link up (Gen3-x2, Bus0)
    
    => pci scan
    Scanning PCI devices on bus 0
    BusDevFun  VendorId   DeviceId   Device Class       Sub-Class
    _____________________________________________________________
    00.00.00   0x1d87     0x3566     Bridge device           0x04
    
    => pci 1
    Scanning PCI devices on bus 1
    BusDevFun  VendorId   DeviceId   Device Class       Sub-Class
    _____________________________________________________________
    01.00.00   0x144d     0xa808     Mass storage controller 0x08
    
    => nvme scan
    
    => nvme details
    Blk device 0: Optional Admin Command Support:
            Namespace Management/Attachment: no
            Firmware Commit/Image download: yes
            Format NVM: yes
            Security Send/Receive: no
    Blk device 0: Optional NVM Command Support:
            Reservation: yes
            Save/Select field in the Set/Get features: yes
            Write Zeroes: yes
            Dataset Management: yes
            Write Uncorrectable: yes
    Blk device 0: Format NVM Attributes:
            Support Cryptographic Erase: No
            Support erase a particular namespace: Yes
            Support format a particular namespace: Yes
    Blk device 0: LBA Format Support:
    Blk device 0: End-to-End DataProtect Capabilities:
            As last eight bytes: No
            As first eight bytes: No
            Support Type3: No
            Support Type2: No
            Support Type1: No
    Blk device 0: Metadata capabilities:
            As part of a separate buffer: No
            As part of an extended data LBA: No
    
    => nvme info
    Device 0: Vendor: 0x144d Rev: EXD7201Q Prod: S444NA0M384608
                Type: Hard Disk
                Capacity: 244198.3 MB = 238.4 GB (500118192 x 512)
    
    => nvme device 0
    
    => md.l 0x40000000 1
    40000000: d08ec033                               3...
    => mw.l 0x40000000 0x55aa55aa
    => md.l 0x40000000 1
    40000000: 55aa55aa                               .U.U
    
    => nvme write 0x40000000 0x0 0x1
    
    nvme write: device 0 block # 0, count 1 ... 1 blocks written: OK
    
    => md.l 0x44000000 1
    44000000: ffffffff                               ....
    => nvme read 0x44000000 0x0 0x1
    
    nvme read: device 0 block # 0, count 1 ... 1 blocks read: OK
    
    => md.l 0x44000000 1
    44000000: 55aa55aa                               .U.U
    
    Change-Id: I645dfc7e88722e9948ecb6e1a3a589eb4b420c1f
    Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index e2a1c0a409..a076e48189 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -79,4 +79,12 @@ config PCIE_LAYERSCAPE
 	  PCIe controllers. The PCIe may works in RC or EP mode according to
 	  RCW[HOST_AGT_PEX] setting.
 
+config PCIE_DW_ROCKCHIP
+	bool "Rockchip DesignWare PCIe controller"
+	depends on DM_PCI
+	depends on ARCH_ROCKCHIP
+	select CONFIG_DM_REGULATOR_GPIO
+	help
+	  Enables support for the DW PCIe controller in the Rockchip SoC.
+
 endif
diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile
index ad44e83996..6c9f4cedc2 100644
--- a/drivers/pci/Makefile
+++ b/drivers/pci/Makefile
@@ -30,6 +30,7 @@ obj-$(CONFIG_SH7780_PCI) +=pci_sh7780.o
 obj-$(CONFIG_PCI_TEGRA) += pci_tegra.o
 obj-$(CONFIG_TSI108_PCI) += tsi108_pci.o
 obj-$(CONFIG_PCIE_DW_MVEBU) += pcie_dw_mvebu.o
+obj-$(CONFIG_PCIE_DW_ROCKCHIP) += pcie_dw_rockchip.o
 obj-$(CONFIG_PCIE_LAYERSCAPE) += pcie_layerscape.o
 obj-$(CONFIG_PCIE_LAYERSCAPE) += pcie_layerscape_fixup.o
 obj-$(CONFIG_PCI_XILINX) += pcie_xilinx.o
diff --git a/drivers/pci/pcie_dw_rockchip.c b/drivers/pci/pcie_dw_rockchip.c
new file mode 100644
index 0000000000..48506d3157
--- /dev/null
+++ b/drivers/pci/pcie_dw_rockchip.c
@@ -0,0 +1,754 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Rockchip DesignWare based PCIe host controller driver
+ *
+ * Copyright (c) 2021 Rockchip, Inc.
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <generic-phy.h>
+#include <pci.h>
+#include <power-domain.h>
+#include <power/regulator.h>
+#include <reset.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <asm-generic/gpio.h>
+#include <asm/arch-rockchip/clock.h>
+#include <linux/iopoll.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct rk_pcie {
+	struct udevice	*dev;
+	struct udevice  *vpcie3v3;
+	void		*dbi_base;
+	void		*apb_base;
+	void		*cfg_base;
+	fdt_size_t	cfg_size;
+	struct phy	phy;
+	struct clk_bulk	clks;
+	int		first_busno;
+	struct reset_ctl_bulk	rsts;
+	struct gpio_desc	rst_gpio;
+	struct pci_region	io;
+	struct pci_region	mem;
+};
+
+enum {
+	PCIBIOS_SUCCESSFUL = 0x0000,
+	PCIBIOS_UNSUPPORTED = -ENODEV,
+	PCIBIOS_NODEV = -ENODEV,
+};
+
+#define msleep(a)		udelay((a) * 1000)
+
+/* Parameters for the waiting for iATU enabled routine */
+#define PCIE_CLIENT_GENERAL_DEBUG	0x104
+#define PCIE_CLIENT_HOT_RESET_CTRL	0x180
+#define PCIE_LTSSM_ENABLE_ENHANCE	BIT(4)
+#define PCIE_CLIENT_LTSSM_STATUS	0x300
+#define SMLH_LINKUP			BIT(16)
+#define RDLH_LINKUP			BIT(17)
+#define PCIE_CLIENT_DBG_FIFO_MODE_CON	0x310
+#define PCIE_CLIENT_DBG_FIFO_PTN_HIT_D0 0x320
+#define PCIE_CLIENT_DBG_FIFO_PTN_HIT_D1 0x324
+#define PCIE_CLIENT_DBG_FIFO_TRN_HIT_D0 0x328
+#define PCIE_CLIENT_DBG_FIFO_TRN_HIT_D1 0x32c
+#define PCIE_CLIENT_DBG_FIFO_STATUS	0x350
+#define PCIE_CLIENT_DBG_TRANSITION_DATA	0xffff0000
+#define PCIE_CLIENT_DBF_EN		0xffff0003
+#define RK_PCIE_DBG			0
+
+/* PCI DBICS registers */
+#define PCIE_LINK_STATUS_REG		0x80
+#define PCIE_LINK_STATUS_SPEED_OFF	16
+#define PCIE_LINK_STATUS_SPEED_MASK	(0xf << PCIE_LINK_STATUS_SPEED_OFF)
+#define PCIE_LINK_STATUS_WIDTH_OFF	20
+#define PCIE_LINK_STATUS_WIDTH_MASK	(0xf << PCIE_LINK_STATUS_WIDTH_OFF)
+
+#define PCIE_LINK_CAPABILITY		0x7c
+#define PCIE_LINK_CTL_2			0xa0
+#define TARGET_LINK_SPEED_MASK		0xf
+#define LINK_SPEED_GEN_1		0x1
+#define LINK_SPEED_GEN_2		0x2
+#define LINK_SPEED_GEN_3		0x3
+
+#define PCIE_MISC_CONTROL_1_OFF		0x8bc
+#define PCIE_DBI_RO_WR_EN		BIT(0)
+
+#define PCIE_LINK_WIDTH_SPEED_CONTROL	0x80c
+#define PORT_LOGIC_SPEED_CHANGE		BIT(17)
+
+/*
+ * iATU Unroll-specific register definitions
+ * From 4.80 core version the address translation will be made by unroll.
+ * The registers are offset from atu_base
+ */
+#define PCIE_ATU_UNR_REGION_CTRL1	0x00
+#define PCIE_ATU_UNR_REGION_CTRL2	0x04
+#define PCIE_ATU_UNR_LOWER_BASE		0x08
+#define PCIE_ATU_UNR_UPPER_BASE		0x0c
+#define PCIE_ATU_UNR_LIMIT		0x10
+#define PCIE_ATU_UNR_LOWER_TARGET	0x14
+#define PCIE_ATU_UNR_UPPER_TARGET	0x18
+
+#define PCIE_ATU_REGION_INDEX1		(0x1 << 0)
+#define PCIE_ATU_REGION_INDEX0		(0x0 << 0)
+#define PCIE_ATU_TYPE_MEM		(0x0 << 0)
+#define PCIE_ATU_TYPE_IO		(0x2 << 0)
+#define PCIE_ATU_TYPE_CFG0		(0x4 << 0)
+#define PCIE_ATU_TYPE_CFG1		(0x5 << 0)
+#define PCIE_ATU_ENABLE			(0x1 << 31)
+#define PCIE_ATU_BAR_MODE_ENABLE	(0x1 << 30)
+#define PCIE_ATU_BUS(x)			(((x) & 0xff) << 24)
+#define PCIE_ATU_DEV(x)			(((x) & 0x1f) << 19)
+#define PCIE_ATU_FUNC(x)		(((x) & 0x7) << 16)
+
+/* Register address builder */
+#define PCIE_GET_ATU_OUTB_UNR_REG_OFFSET(region)        \
+	((0x3 << 20) | ((region) << 9))
+#define PCIE_GET_ATU_INB_UNR_REG_OFFSET(region) \
+	((0x3 << 20) | ((region) << 9) | (0x1 << 8))
+
+/* Parameters for the waiting for iATU enabled routine */
+#define LINK_WAIT_MAX_IATU_RETRIES	5
+#define LINK_WAIT_IATU			10000
+
+static int rk_pcie_read(void __iomem *addr, int size, u32 *val)
+{
+	if ((uintptr_t)addr & (size - 1)) {
+		*val = 0;
+		return PCIBIOS_UNSUPPORTED;
+	}
+
+	if (size == 4) {
+		*val = readl(addr);
+	} else if (size == 2) {
+		*val = readw(addr);
+	} else if (size == 1) {
+		*val = readb(addr);
+	} else {
+		*val = 0;
+		return PCIBIOS_NODEV;
+	}
+
+	return PCIBIOS_SUCCESSFUL;
+}
+
+static int rk_pcie_write(void __iomem *addr, int size, u32 val)
+{
+	if ((uintptr_t)addr & (size - 1))
+		return PCIBIOS_UNSUPPORTED;
+
+	if (size == 4)
+		writel(val, addr);
+	else if (size == 2)
+		writew(val, addr);
+	else if (size == 1)
+		writeb(val, addr);
+	else
+		return PCIBIOS_NODEV;
+
+	return PCIBIOS_SUCCESSFUL;
+}
+
+static u32 __rk_pcie_read_apb(struct rk_pcie *rk_pcie, void __iomem *base,
+			      u32 reg, size_t size)
+{
+	int ret;
+	u32 val;
+
+	ret = rk_pcie_read(base + reg, size, &val);
+	if (ret)
+		dev_err(rk_pcie->pci->dev, "Read APB address failed\n");
+
+	return val;
+}
+
+static void __rk_pcie_write_apb(struct rk_pcie *rk_pcie, void __iomem *base,
+				u32 reg, size_t size, u32 val)
+{
+	int ret;
+
+	ret = rk_pcie_write(base + reg, size, val);
+	if (ret)
+		dev_err(rk_pcie->pci->dev, "Write APB address failed\n");
+}
+
+static inline u32 rk_pcie_readl_apb(struct rk_pcie *rk_pcie, u32 reg)
+{
+	return __rk_pcie_read_apb(rk_pcie, rk_pcie->apb_base, reg, 0x4);
+}
+
+static inline void rk_pcie_writel_apb(struct rk_pcie *rk_pcie, u32 reg,
+				      u32 val)
+{
+	__rk_pcie_write_apb(rk_pcie, rk_pcie->apb_base, reg, 0x4, val);
+}
+
+static int rk_pcie_get_link_speed(struct rk_pcie *rk_pcie)
+{
+	return (readl(rk_pcie->dbi_base + PCIE_LINK_STATUS_REG) &
+		PCIE_LINK_STATUS_SPEED_MASK) >> PCIE_LINK_STATUS_SPEED_OFF;
+}
+
+static int rk_pcie_get_link_width(struct rk_pcie *rk_pcie)
+{
+	return (readl(rk_pcie->dbi_base + PCIE_LINK_STATUS_REG) &
+		PCIE_LINK_STATUS_WIDTH_MASK) >> PCIE_LINK_STATUS_WIDTH_OFF;
+}
+
+static void rk_pcie_writel_ob_unroll(struct rk_pcie *rk_pcie, u32 index,
+				     u32 reg, u32 val)
+{
+	u32 offset = PCIE_GET_ATU_OUTB_UNR_REG_OFFSET(index);
+	void __iomem *base = rk_pcie->dbi_base;
+
+	writel(val, base + offset + reg);
+}
+
+static u32 rk_pcie_readl_ob_unroll(struct rk_pcie *rk_pcie, u32 index, u32 reg)
+{
+	u32 offset = PCIE_GET_ATU_OUTB_UNR_REG_OFFSET(index);
+	void __iomem *base = rk_pcie->dbi_base;
+
+	return readl(base + offset + reg);
+}
+
+static inline void rk_pcie_dbi_write_enable(struct rk_pcie *rk_pcie, bool en)
+{
+	u32 val;
+
+	val = readl(rk_pcie->dbi_base + PCIE_MISC_CONTROL_1_OFF);
+
+	if (en)
+		val |= PCIE_DBI_RO_WR_EN;
+	else
+		val &= ~PCIE_DBI_RO_WR_EN;
+	writel(val, rk_pcie->dbi_base + PCIE_MISC_CONTROL_1_OFF);
+}
+
+static void rk_pcie_setup_host(struct rk_pcie *rk_pcie)
+{
+	u32 val;
+
+	rk_pcie_dbi_write_enable(rk_pcie, true);
+
+	/* setup RC BARs */
+	writel(PCI_BASE_ADDRESS_MEM_TYPE_64,
+	       rk_pcie->dbi_base + PCI_BASE_ADDRESS_0);
+	writel(0x0, rk_pcie->dbi_base + PCI_BASE_ADDRESS_1);
+
+	/* setup interrupt pins */
+	val = readl(rk_pcie->dbi_base + PCI_INTERRUPT_LINE);
+	val &= 0xffff00ff;
+	val |= 0x00000100;
+	writel(val, rk_pcie->dbi_base + PCI_INTERRUPT_LINE);
+
+	/* setup bus numbers */
+	val = readl(rk_pcie->dbi_base + PCI_PRIMARY_BUS);
+	val &= 0xff000000;
+	val |= 0x00ff0100;
+	writel(val, rk_pcie->dbi_base + PCI_PRIMARY_BUS);
+
+	val = readl(rk_pcie->dbi_base + PCI_PRIMARY_BUS);
+
+	/* setup command register */
+	val = readl(rk_pcie->dbi_base + PCI_COMMAND);
+	val &= 0xffff0000;
+	val |= PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
+		PCI_COMMAND_MASTER | PCI_COMMAND_SERR;
+	writel(val, rk_pcie->dbi_base + PCI_COMMAND);
+
+	/* program correct class for RC */
+	writew(PCI_CLASS_BRIDGE_PCI, rk_pcie->dbi_base + PCI_CLASS_DEVICE);
+	/* Better disable write permission right after the update */
+
+	val = readl(rk_pcie->dbi_base + PCIE_LINK_WIDTH_SPEED_CONTROL);
+	val |= PORT_LOGIC_SPEED_CHANGE;
+	writel(val, rk_pcie->dbi_base + PCIE_LINK_WIDTH_SPEED_CONTROL);
+
+	rk_pcie_dbi_write_enable(rk_pcie, false);
+}
+
+static void rk_pcie_configure(struct rk_pcie *pci, u32 cap_speed)
+{
+	u32 val;
+
+	rk_pcie_dbi_write_enable(pci, true);
+
+	val = readl(pci->dbi_base + PCIE_LINK_CAPABILITY);
+	val &= ~TARGET_LINK_SPEED_MASK;
+	val |= cap_speed;
+	writel(val, pci->dbi_base + PCIE_LINK_CAPABILITY);
+
+	val = readl(pci->dbi_base + PCIE_LINK_CTL_2);
+	val &= ~TARGET_LINK_SPEED_MASK;
+	val |= cap_speed;
+	writel(val, pci->dbi_base + PCIE_LINK_CTL_2);
+
+	rk_pcie_dbi_write_enable(pci, false);
+}
+
+static void rk_pcie_prog_outbound_atu_unroll(struct rk_pcie *pci, int index,
+					     int type, u64 cpu_addr,
+					     u64 pci_addr, u32 size)
+{
+	u32 retries, val;
+
+	dev_dbg(pci->dev, "ATU programmed with: index: %d, type: %d, cpu addr: %8llx, pci addr: %8llx, size: %8x\n",
+		index, type, cpu_addr, pci_addr, size);
+
+	rk_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_LOWER_BASE,
+				 lower_32_bits(cpu_addr));
+	rk_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_UPPER_BASE,
+				 upper_32_bits(cpu_addr));
+	rk_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_LIMIT,
+				 lower_32_bits(cpu_addr + size - 1));
+	rk_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_LOWER_TARGET,
+				 lower_32_bits(pci_addr));
+	rk_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_UPPER_TARGET,
+				 upper_32_bits(pci_addr));
+	rk_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_REGION_CTRL1,
+				 type);
+	rk_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_REGION_CTRL2,
+				 PCIE_ATU_ENABLE);
+
+	/*
+	 * Make sure ATU enable takes effect before any subsequent config
+	 * and I/O accesses.
+	 */
+	for (retries = 0; retries < LINK_WAIT_MAX_IATU_RETRIES; retries++) {
+		val = rk_pcie_readl_ob_unroll(pci, index,
+					      PCIE_ATU_UNR_REGION_CTRL2);
+		if (val & PCIE_ATU_ENABLE)
+			return;
+
+		udelay(LINK_WAIT_IATU);
+	}
+	dev_err(pci->dev, "outbound iATU is not being enabled\n");
+}
+
+static int rk_pcie_addr_valid(pci_dev_t d, int first_busno)
+{
+	if ((PCI_BUS(d) == first_busno) && (PCI_DEV(d) > 0))
+		return 0;
+	if ((PCI_BUS(d) == first_busno + 1) && (PCI_DEV(d) > 0))
+		return 0;
+
+	return 1;
+}
+
+static uintptr_t set_cfg_address(struct rk_pcie *pcie,
+				 pci_dev_t d, uint where)
+{
+	int bus = PCI_BUS(d) - pcie->first_busno;
+	uintptr_t va_address;
+	u32 atu_type;
+
+	/* Use dbi_base for own configuration read and write */
+	if (!bus) {
+		va_address = (uintptr_t)pcie->dbi_base;
+		goto out;
+	}
+
+	if (bus == 1)
+		/*
+		 * For local bus whose primary bus number is root bridge,
+		 * change TLP Type field to 4.
+		 */
+		atu_type = PCIE_ATU_TYPE_CFG0;
+	else
+		/* Otherwise, change TLP Type field to 5. */
+		atu_type = PCIE_ATU_TYPE_CFG1;
+
+	/*
+	 * Not accessing root port configuration space?
+	 * Region #0 is used for Outbound CFG space access.
+	 * Direction = Outbound
+	 * Region Index = 0
+	 */
+	d = PCI_MASK_BUS(d);
+	d = PCI_ADD_BUS(bus, d);
+	rk_pcie_prog_outbound_atu_unroll(pcie, PCIE_ATU_REGION_INDEX1,
+					 atu_type, (u64)pcie->cfg_base,
+					 d << 8, pcie->cfg_size);
+
+	va_address = (uintptr_t)pcie->cfg_base;
+
+out:
+	va_address += where & ~0x3;
+
+	return va_address;
+}
+
+static int rockchip_pcie_rd_conf(struct udevice *bus, pci_dev_t bdf,
+				 uint offset, ulong *valuep,
+				 enum pci_size_t size)
+{
+	struct rk_pcie *pcie = dev_get_priv(bus);
+	uintptr_t va_address;
+	ulong value;
+
+	debug("PCIE CFG read: bdf=%2x:%2x:%2x\n",
+	      PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf));
+
+	if (!rk_pcie_addr_valid(bdf, pcie->first_busno)) {
+		debug("- out of range\n");
+		*valuep = pci_get_ff(size);
+		return 0;
+	}
+
+	va_address = set_cfg_address(pcie, bdf, offset);
+
+	value = readl(va_address);
+
+	debug("(addr,val)=(0x%04x, 0x%08lx)\n", offset, value);
+	*valuep = pci_conv_32_to_size(value, offset, size);
+
+	rk_pcie_prog_outbound_atu_unroll(pcie, PCIE_ATU_REGION_INDEX1,
+					 PCIE_ATU_TYPE_IO, pcie->io.phys_start,
+					 pcie->io.bus_start, pcie->io.size);
+
+	return 0;
+}
+
+static int rockchip_pcie_wr_conf(struct udevice *bus, pci_dev_t bdf,
+				 uint offset, ulong value,
+				 enum pci_size_t size)
+{
+	struct rk_pcie *pcie = dev_get_priv(bus);
+	uintptr_t va_address;
+	ulong old;
+
+	debug("PCIE CFG write: (b,d,f)=(%2d,%2d,%2d)\n",
+	      PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf));
+	debug("(addr,val)=(0x%04x, 0x%08lx)\n", offset, value);
+
+	if (!rk_pcie_addr_valid(bdf, pcie->first_busno)) {
+		debug("- out of range\n");
+		return 0;
+	}
+
+	va_address = set_cfg_address(pcie, bdf, offset);
+
+	old = readl(va_address);
+	value = pci_conv_size_to_32(old, value, offset, size);
+	writel(value, va_address);
+
+	rk_pcie_prog_outbound_atu_unroll(pcie, PCIE_ATU_REGION_INDEX1,
+					 PCIE_ATU_TYPE_IO, pcie->io.phys_start,
+					 pcie->io.bus_start, pcie->io.size);
+
+	return 0;
+}
+
+static void rk_pcie_enable_debug(struct rk_pcie *rk_pcie)
+{
+#if RK_PCIE_DBG
+	rk_pcie_writel_apb(rk_pcie, PCIE_CLIENT_DBG_FIFO_PTN_HIT_D0,
+			   PCIE_CLIENT_DBG_TRANSITION_DATA);
+	rk_pcie_writel_apb(rk_pcie, PCIE_CLIENT_DBG_FIFO_PTN_HIT_D1,
+			   PCIE_CLIENT_DBG_TRANSITION_DATA);
+	rk_pcie_writel_apb(rk_pcie, PCIE_CLIENT_DBG_FIFO_TRN_HIT_D0,
+			   PCIE_CLIENT_DBG_TRANSITION_DATA);
+	rk_pcie_writel_apb(rk_pcie, PCIE_CLIENT_DBG_FIFO_TRN_HIT_D1,
+			   PCIE_CLIENT_DBG_TRANSITION_DATA);
+	rk_pcie_writel_apb(rk_pcie, PCIE_CLIENT_DBG_FIFO_MODE_CON,
+			   PCIE_CLIENT_DBF_EN);
+#endif
+}
+
+static void rk_pcie_debug_dump(struct rk_pcie *rk_pcie)
+{
+#if RK_PCIE_DBG
+	u32 loop;
+
+	dev_info(rk_pcie->dev, "ltssm = 0x%x\n",
+		 rk_pcie_readl_apb(rk_pcie, PCIE_CLIENT_LTSSM_STATUS));
+	for (loop = 0; loop < 64; loop++)
+		dev_info(rk_pcie->dev, "fifo_status = 0x%x\n",
+			 rk_pcie_readl_apb(rk_pcie, PCIE_CLIENT_DBG_FIFO_STATUS));
+#endif
+}
+
+static inline void rk_pcie_link_status_clear(struct rk_pcie *rk_pcie)
+{
+	rk_pcie_writel_apb(rk_pcie, PCIE_CLIENT_GENERAL_DEBUG, 0x0);
+}
+
+static inline void rk_pcie_disable_ltssm(struct rk_pcie *rk_pcie)
+{
+	rk_pcie_writel_apb(rk_pcie, 0x0, 0xc0008);
+}
+
+static inline void rk_pcie_enable_ltssm(struct rk_pcie *rk_pcie)
+{
+	rk_pcie_writel_apb(rk_pcie, 0x0, 0xc000c);
+}
+
+static int is_link_up(struct rk_pcie *priv)
+{
+	u32 val;
+
+	val = rk_pcie_readl_apb(priv, PCIE_CLIENT_LTSSM_STATUS);
+	if ((val & (RDLH_LINKUP | SMLH_LINKUP)) == 0x30000 &&
+	    (val & GENMASK(5, 0)) == 0x11)
+		return 1;
+
+	return 0;
+}
+
+static int rk_pcie_link_up(struct rk_pcie *priv, u32 cap_speed)
+{
+	int retries;
+
+	if (is_link_up(priv)) {
+		printf("PCI Link already up before configuration!\n");
+		return 1;
+	}
+
+	/* DW pre link configurations */
+	rk_pcie_configure(priv, cap_speed);
+
+	/* Rest the device */
+	if (dm_gpio_is_valid(&priv->rst_gpio)) {
+		dm_gpio_set_value(&priv->rst_gpio, 0);
+		msleep(1000);
+		dm_gpio_set_value(&priv->rst_gpio, 1);
+	}
+
+	rk_pcie_disable_ltssm(priv);
+	rk_pcie_link_status_clear(priv);
+	rk_pcie_enable_debug(priv);
+
+	/* Enable LTSSM */
+	rk_pcie_enable_ltssm(priv);
+
+	for (retries = 0; retries < 10000000; retries++) {
+		if (is_link_up(priv)) {
+			dev_info(priv->dev, "PCIe Link up, LTSSM is 0x%x\n",
+				 rk_pcie_readl_apb(priv, PCIE_CLIENT_LTSSM_STATUS));
+			rk_pcie_debug_dump(priv);
+			return 0;
+		}
+
+		dev_info(priv->dev, "PCIe Linking... LTSSM is 0x%x\n",
+			 rk_pcie_readl_apb(priv, PCIE_CLIENT_LTSSM_STATUS));
+		rk_pcie_debug_dump(priv);
+		msleep(1000);
+	}
+
+	dev_err(priv->dev, "PCIe-%d Link Fail\n", priv->dev->seq);
+	/* Link maybe in Gen switch recovery but we need to wait more 1s */
+	msleep(1000);
+	return -EINVAL;
+}
+
+static int rockchip_pcie_init_port(struct udevice *dev)
+{
+	int ret;
+	u32 val;
+	struct rk_pcie *priv = dev_get_priv(dev);
+
+	/* Set power and maybe external ref clk input */
+	if (priv->vpcie3v3) {
+		ret = regulator_set_value(priv->vpcie3v3, 3300000);
+		if (ret) {
+			dev_err(priv->dev, "failed to enable vpcie3v3 (ret=%d)\n",
+				ret);
+			return ret;
+		}
+	}
+
+	msleep(1000);
+
+	ret = generic_phy_init(&priv->phy);
+	if (ret) {
+		dev_err(dev, "failed to init phy (ret=%d)\n", ret);
+		return ret;
+	}
+
+	ret = generic_phy_power_on(&priv->phy);
+	if (ret) {
+		dev_err(dev, "failed to power on phy (ret=%d)\n", ret);
+		goto err_exit_phy;
+	}
+
+	ret = reset_deassert_bulk(&priv->rsts);
+	if (ret) {
+		dev_err(dev, "failed to deassert resets (ret=%d)\n", ret);
+		goto err_power_off_phy;
+	}
+
+	ret = clk_enable_bulk(&priv->clks);
+	if (ret) {
+		dev_err(dev, "failed to enable clks (ret=%d)\n", ret);
+		goto err_deassert_bulk;
+	}
+
+	/* LTSSM EN ctrl mode */
+	val = rk_pcie_readl_apb(priv, PCIE_CLIENT_HOT_RESET_CTRL);
+	val |= PCIE_LTSSM_ENABLE_ENHANCE | (PCIE_LTSSM_ENABLE_ENHANCE << 16);
+	rk_pcie_writel_apb(priv, PCIE_CLIENT_HOT_RESET_CTRL, val);
+
+	/* Set RC mode */
+	rk_pcie_writel_apb(priv, 0x0, 0xf00040);
+	rk_pcie_setup_host(priv);
+
+	ret = rk_pcie_link_up(priv, LINK_SPEED_GEN_3);
+	if (ret < 0)
+		goto err_link_up;
+
+	return 0;
+err_link_up:
+	clk_disable_bulk(&priv->clks);
+err_deassert_bulk:
+	reset_assert_bulk(&priv->rsts);
+err_power_off_phy:
+	generic_phy_power_off(&priv->phy);
+err_exit_phy:
+	generic_phy_exit(&priv->phy);
+	return ret;
+}
+
+static int rockchip_pcie_parse_dt(struct udevice *dev)
+{
+	struct rk_pcie *priv = dev_get_priv(dev);
+	int ret;
+
+	priv->dbi_base = (void *)dev_read_addr_index(dev, 0);
+	if (!priv->dbi_base)
+		return -ENODEV;
+
+	dev_dbg(dev, "DBI address is 0x%p\n", priv->dbi_base);
+
+	priv->apb_base = (void *)dev_read_addr_index(dev, 1);
+	if (!priv->apb_base)
+		return -ENODEV;
+
+	dev_dbg(dev, "APB address is 0x%p\n", priv->apb_base);
+
+	ret = gpio_request_by_name(dev, "reset-gpios", 0,
+				   &priv->rst_gpio, GPIOD_IS_OUT);
+	if (ret) {
+		dev_err(dev, "failed to find reset-gpios property\n");
+		return ret;
+	}
+
+	ret = reset_get_bulk(dev, &priv->rsts);
+	if (ret) {
+		dev_err(dev, "Can't get reset: %d\n", ret);
+		return ret;
+	}
+
+	ret = clk_get_bulk(dev, &priv->clks);
+	if (ret) {
+		dev_err(dev, "Can't get clock: %d\n", ret);
+		return ret;
+	}
+
+	ret = device_get_supply_regulator(dev, "vpcie3v3-supply",
+					  &priv->vpcie3v3);
+	if (ret && ret != -ENOENT) {
+		dev_err(dev, "failed to get vpcie3v3 supply (ret=%d)\n", ret);
+		return ret;
+	}
+
+	ret = generic_phy_get_by_index(dev, 0, &priv->phy);
+	if (ret) {
+		dev_err(dev, "failed to get pcie phy (ret=%d)\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int rockchip_pcie_probe(struct udevice *dev)
+{
+	struct rk_pcie *priv = dev_get_priv(dev);
+	struct udevice *ctlr = pci_get_controller(dev);
+	struct pci_controller *hose = dev_get_uclass_priv(ctlr);
+	int ret;
+
+	priv->first_busno = dev->seq;
+	priv->dev = dev;
+
+	ret = rockchip_pcie_parse_dt(dev);
+	if (ret)
+		return ret;
+
+	ret = rockchip_pcie_init_port(dev);
+	if (ret)
+		return ret;
+
+	dev_info(dev, "PCIE-%d: Link up (Gen%d-x%d, Bus%d)\n",
+		 dev->seq, rk_pcie_get_link_speed(priv),
+		 rk_pcie_get_link_width(priv),
+		 hose->first_busno);
+
+	for (ret = 0; ret < hose->region_count; ret++) {
+		if (hose->regions[ret].flags == PCI_REGION_IO) {
+			priv->io.phys_start = hose->regions[ret].phys_start; /* IO base */
+			priv->io.bus_start  = hose->regions[ret].bus_start;  /* IO_bus_addr */
+			priv->io.size       = hose->regions[ret].size;      /* IO size */
+		} else if (hose->regions[ret].flags == PCI_REGION_MEM) {
+			priv->mem.phys_start = hose->regions[ret].phys_start; /* MEM base */
+			priv->mem.bus_start  = hose->regions[ret].bus_start;  /* MEM_bus_addr */
+			priv->mem.size	     = hose->regions[ret].size;	    /* MEM size */
+		} else if (hose->regions[ret].flags == PCI_REGION_SYS_MEMORY) {
+			priv->cfg_base = (void *)(priv->io.phys_start - priv->io.size);
+			priv->cfg_size = priv->io.size;
+		} else {
+			dev_err(dev, "invalid flags type!\n");
+		}
+	}
+
+	dev_dbg(dev, "Config space: [0x%p - 0x%p, size 0x%llx]\n",
+		priv->cfg_base, priv->cfg_base + priv->cfg_size,
+		priv->cfg_size);
+
+	dev_dbg(dev, "IO space: [0x%llx - 0x%llx, size 0x%x]\n",
+		priv->io.phys_start, priv->io.phys_start + priv->io.size,
+		priv->io.size);
+
+	dev_dbg(dev, "IO bus:   [0x%x - 0x%x, size 0x%x]\n",
+		priv->io.bus_start, priv->io.bus_start + priv->io.size,
+		priv->io.size);
+
+	dev_dbg(dev, "MEM space: [0x%llx - 0x%llx, size 0x%x]\n",
+		priv->mem.phys_start, priv->mem.phys_start + priv->mem.size,
+		priv->mem.size);
+
+	dev_dbg(dev, "MEM bus:   [0x%x - 0x%x, size 0x%x]\n",
+		priv->mem.bus_start, priv->mem.bus_start + priv->mem.size,
+		priv->mem.size);
+
+	rk_pcie_prog_outbound_atu_unroll(priv, PCIE_ATU_REGION_INDEX0,
+					 PCIE_ATU_TYPE_MEM,
+					 priv->mem.phys_start,
+					 priv->mem.bus_start, priv->mem.size);
+	return 0;
+}
+
+static const struct dm_pci_ops rockchip_pcie_ops = {
+	.read_config	= rockchip_pcie_rd_conf,
+	.write_config	= rockchip_pcie_wr_conf,
+};
+
+static const struct udevice_id rockchip_pcie_ids[] = {
+	{ .compatible = "rockchip,rk3568-pcie" },
+	{ }
+};
+
+U_BOOT_DRIVER(rockchip_pcie) = {
+	.name			= "pcie_dw_rockchip",
+	.id			= UCLASS_PCI,
+	.of_match		= rockchip_pcie_ids,
+	.ops			= &rockchip_pcie_ops,
+	.probe			= rockchip_pcie_probe,
+	.priv_auto_alloc_size	= sizeof(struct rk_pcie),
+};

commit 76ab734171771936d48ed11c201bb80d7e60740c
Author: Shawn Lin <shawn.lin@rock-chips.com>
Date:   Mon Jan 4 11:32:00 2021 +0800

    phy: Add Rockchip Synopsys PCIe 3.0 PHY
    
    Change-Id: Ie29e4777f8f0603b779cc3387dc5c4b63336deff
    Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 0b2b9c030b..2759d6c7f1 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -83,6 +83,12 @@ config PHY_ROCKCHIP_NANENG_EDP
 	help
 	  Support for Rockchip eDP Transmitter PHY with Naneng IP block.
 
+config PHY_ROCKCHIP_SNPS_PCIE3
+	bool "Rockchip Snps PCIe3 PHY Driver"
+	depends on PHY && ARCH_ROCKCHIP
+	help
+	  Support for Rockchip PCIe3 PHY with Synopsys IP block.
+
 config PHY_ROCKCHIP_TYPEC
 	bool "Support Rockchip TYPEC PHY Driver"
 	depends on PHY && ARCH_ROCKCHIP
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index f320eb2ef9..a3dd975226 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -11,6 +11,7 @@ obj-$(CONFIG_PHY_ROCKCHIP_INNO_USB2) += phy-rockchip-inno-usb2.o
 obj-$(CONFIG_PHY_ROCKCHIP_NANENG_USB2) += phy-rockchip-naneng-usb2.o
 obj-$(CONFIG_PHY_ROCKCHIP_INNO_USB3) += phy-rockchip-inno-usb3.o
 obj-$(CONFIG_PHY_ROCKCHIP_NANENG_EDP) += phy-rockchip-naneng-edp.o
+obj-$(CONFIG_PHY_ROCKCHIP_SNPS_PCIE3) += phy-rockchip-snps-pcie3.o
 obj-$(CONFIG_PHY_ROCKCHIP_TYPEC) += phy-rockchip-typec.o
 obj-$(CONFIG_PHY_SANDBOX) += sandbox-phy.o
 obj-$(CONFIG_$(SPL_)PIPE3_PHY) += ti-pipe3-phy.o
diff --git a/drivers/phy/phy-rockchip-snps-pcie3.c b/drivers/phy/phy-rockchip-snps-pcie3.c
new file mode 100644
index 0000000000..bf3aeec876
--- /dev/null
+++ b/drivers/phy/phy-rockchip-snps-pcie3.c
@@ -0,0 +1,148 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Rockchip PCIE3.0 phy driver
+ *
+ * Copyright (C) 2021 Rockchip Electronics Co., Ltd.
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <dm/lists.h>
+#include <generic-phy.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <regmap.h>
+#include <reset-uclass.h>
+
+#define GRF_PCIE30PHY_CON1 0x4
+#define GRF_PCIE30PHY_CON6 0x18
+#define GRF_PCIE30PHY_CON9 0x24
+
+struct rockchip_p3phy_priv {
+	void __iomem *mmio;
+	int mode;
+	struct regmap *phy_grf;
+	struct reset_ctl p30phy;
+	struct clk ref_clk_m;
+	struct clk ref_clk_n;
+	struct clk pclk;
+};
+
+static int rochchip_p3phy_init(struct phy *phy)
+{
+	struct rockchip_p3phy_priv *priv = dev_get_priv(phy->dev);
+	int ret;
+
+	ret = clk_enable(&priv->ref_clk_m);
+	if (ret < 0 && ret != -ENOSYS)
+		return ret;
+
+	ret = clk_enable(&priv->ref_clk_n);
+	if (ret < 0 && ret != -ENOSYS)
+		goto err_ref;
+
+	ret = clk_enable(&priv->pclk);
+	if (ret < 0 && ret != -ENOSYS)
+		goto err_pclk;
+
+	reset_assert(&priv->p30phy);
+	udelay(1);
+
+	/* Deassert PCIe PMA output clamp mode */
+	regmap_write(priv->phy_grf, GRF_PCIE30PHY_CON9,
+		     (0x1 << 15) | (0x1 << 31));
+
+	reset_deassert(&priv->p30phy);
+	udelay(1);
+
+	return 0;
+err_pclk:
+	clk_disable(&priv->ref_clk_n);
+err_ref:
+	clk_disable(&priv->ref_clk_m);
+	return ret;
+}
+
+static int rochchip_p3phy_exit(struct phy *phy)
+{
+	struct rockchip_p3phy_priv *priv = dev_get_priv(phy->dev);
+
+	clk_disable(&priv->ref_clk_m);
+	clk_disable(&priv->ref_clk_n);
+	clk_disable(&priv->pclk);
+	reset_assert(&priv->p30phy);
+	return 0;
+}
+
+static int rockchip_p3phy_probe(struct udevice *dev)
+{
+	struct rockchip_p3phy_priv *priv = dev_get_priv(dev);
+	struct udevice *syscon;
+	int ret;
+
+	priv->mmio = (void __iomem *)dev_read_addr(dev);
+	if ((fdt_addr_t)priv->mmio == FDT_ADDR_T_NONE)
+		return -EINVAL;
+
+	ret = uclass_get_device_by_phandle(UCLASS_SYSCON, dev,
+					   "rockchip,phy-grf",  &syscon);
+	if (ret) {
+		pr_err("unable to find syscon device for rockchip,phy-grf\n");
+		return ret;
+	}
+
+	priv->phy_grf = syscon_get_regmap(syscon);
+	if (IS_ERR(priv->phy_grf)) {
+		dev_err(dev, "failed to find rockchip,phy_grf regmap\n");
+		return PTR_ERR(priv->phy_grf);
+	}
+
+	dev_dbg(priv->dev, "phy_grf is 0x%llx\n", priv->phy_grf->base);
+
+	ret = reset_get_by_name(dev, "phy", &priv->p30phy);
+	if (ret) {
+		dev_err(dev, "no phy reset control specified\n");
+		return ret;
+	}
+
+	ret = clk_get_by_name(dev, "refclk_m", &priv->ref_clk_m);
+	if (ret) {
+		dev_err(dev, "failed to find ref clock M\n");
+		return PTR_ERR(&priv->ref_clk_m);
+	}
+
+	ret = clk_get_by_name(dev, "refclk_n", &priv->ref_clk_n);
+	if (ret) {
+		dev_err(dev, "failed to find ref clock N\n");
+		return PTR_ERR(&priv->ref_clk_n);
+	}
+
+	ret = clk_get_by_name(dev, "pclk", &priv->pclk);
+	if (ret) {
+		dev_err(dev, "failed to find pclk\n");
+		return PTR_ERR(&priv->pclk);
+	}
+
+	return 0;
+}
+
+static struct phy_ops rochchip_p3phy_ops = {
+	.init = rochchip_p3phy_init,
+	.exit = rochchip_p3phy_exit,
+};
+
+static const struct udevice_id rockchip_p3phy_of_match[] = {
+	{ .compatible = "rockchip,rk3568-pcie3-phy" },
+	{ },
+};
+
+U_BOOT_DRIVER(rockchip_pcie3phy) = {
+	.name		= "rockchip_pcie3phy",
+	.id		= UCLASS_PHY,
+	.of_match	= rockchip_p3phy_of_match,
+	.ops		= &rochchip_p3phy_ops,
+	.probe		= rockchip_p3phy_probe,
+	.priv_auto_alloc_size = sizeof(struct rockchip_p3phy_priv),
+};

commit 80907d3c4cc02e71d62819239f055f50fa907707
Author: Shawn Lin <shawn.lin@rock-chips.com>
Date:   Mon Jan 4 11:28:10 2021 +0800

    core: device: Add PCIe to bind list if we set GD_FLG_RELOC
    
    Change-Id: Ib115bc6eb52f8a08e28805ea15e2cbf8f27f5f63
    Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

diff --git a/drivers/core/device.c b/drivers/core/device.c
index cb73aef757..4390d5221b 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -54,7 +54,8 @@ static int device_bind_common(struct udevice *parent, const struct driver *drv,
 	if (gd->flags & GD_FLG_RELOC) {
 		/* For mmc/nand/spiflash, just update from kernel dtb instead bind again*/
 		if (drv->id == UCLASS_MMC || drv->id == UCLASS_RKNAND ||
-		    drv->id == UCLASS_SPI_FLASH || drv->id == UCLASS_MTD) {
+		    drv->id == UCLASS_SPI_FLASH || drv->id == UCLASS_MTD ||
+		    drv->id == UCLASS_PCI) {
 			list_for_each_entry(dev, &uc->dev_head, uclass_node) {
 				if (!strcmp(name, dev->name)) {
 					debug("%s do not bind dev already in list %s\n",

commit 0b6867032aae93f0e0169aa32f23713bd385b879
Author: Shawn Lin <shawn.lin@rock-chips.com>
Date:   Mon Jan 4 11:26:30 2021 +0800

    rockchip: dts: rk3568: enable pcie30 for NVMe boot
    
    Change-Id: I2095cec09f765572101353bc21507a82ba71c160
    Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

diff --git a/arch/arm/dts/rk3568-u-boot.dtsi b/arch/arm/dts/rk3568-u-boot.dtsi
index dc542f0115..9d424706d2 100644
--- a/arch/arm/dts/rk3568-u-boot.dtsi
+++ b/arch/arm/dts/rk3568-u-boot.dtsi
@@ -184,7 +184,6 @@
 	};
 };
 
-
 &gmac0_clkin{
 	u-boot,dm-pre-reloc;
 };
@@ -358,6 +357,16 @@
 	u-boot,dm-pre-reloc;
 };
 
+&pcie30phy {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&pcie3x2 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 &pinctrl {
 	u-boot,dm-pre-reloc;
 	status = "okay";

commit cda11ee6a911debfa66f6d58ece82058326775cb
Author: Shawn Lin <shawn.lin@rock-chips.com>
Date:   Mon Jan 4 11:18:55 2021 +0800

    rockchip: rk3568: Map PCIe MMIO regions for CPU
    
    Change-Id: Ieb5ce1ae68e26beba9b1e73548c5db630deb1487
    Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c
index 8eced3c5d1..233a777689 100644
--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
@@ -466,6 +466,13 @@ static struct mm_region rk3568_mem_map[] = {
 		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
 			 PTE_BLOCK_NON_SHARE |
 			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
+	}, {
+		.virt = 0x300000000,
+		.phys = 0x300000000,
+		.size = 0x0c0c00000,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+			 PTE_BLOCK_NON_SHARE |
+			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
 	}, {
 		/* List terminator */
 		0,

commit d504dfb2b11ee4514332b0803ce0e2a14b84b473
Author: Shawn Lin <shawn.lin@rock-chips.com>
Date:   Mon Jan 4 11:17:48 2021 +0800

    clk: rockchip: rk3568: Ungate PCIe30phy refclk_m and refclk_n
    
    Change-Id: I718f280cd78235131f3f3ef76e17e498a6e4db8e
    Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3568.c b/drivers/clk/rockchip/clk_rk3568.c
index 1085a9003d..7e8f1dd12a 100644
--- a/drivers/clk/rockchip/clk_rk3568.c
+++ b/drivers/clk/rockchip/clk_rk3568.c
@@ -493,6 +493,8 @@ static int rk3568_pmuclk_probe(struct udevice *dev)
 			priv->ppll_hz = PPLL_HZ;
 	}
 
+	/* Ungate PCIe30phy refclk_m and refclk_n */
+	rk_clrsetreg(&priv->pmucru->pmu_clkgate_con[2], 0x3 << 13, 0 << 13);
 	return 0;
 }
 

commit cd282fabfa8c8526ef4620c4f91e3c5dba03bf29
Author: Shawn Lin <shawn.lin@rock-chips.com>
Date:   Mon Jan 4 11:14:41 2021 +0800

    power: regulator: Migrate to dev_read_u32_array for gpio-regulator
    
    fdtdec_get_int_array_count is obsoleted and we should use
    dev_read_u32_array for seeking node members.
    
    Change-Id: I666bd7317cfa203229454d24c910049c24bf8a2f
    Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

diff --git a/drivers/power/regulator/gpio-regulator.c b/drivers/power/regulator/gpio-regulator.c
index 1031a0362b..5bf4563916 100644
--- a/drivers/power/regulator/gpio-regulator.c
+++ b/drivers/power/regulator/gpio-regulator.c
@@ -30,7 +30,6 @@ static int gpio_regulator_ofdata_to_platdata(struct udevice *dev)
 	struct gpio_regulator_platdata *dev_pdata;
 	struct gpio_desc *gpio;
 	const void *blob = gd->fdt_blob;
-	int node = dev_of_offset(dev);
 	int ret, count, i, j;
 	u32 states_array[8];
 
@@ -54,13 +53,15 @@ static int gpio_regulator_ofdata_to_platdata(struct udevice *dev)
 	if (ret)
 		debug("regulator gpio - not found! Error: %d", ret);
 
-	count = fdtdec_get_int_array_count(blob, node, "states",
-					   states_array, 8);
+	blob = dev_read_prop(dev, "states", &count);
+	if (!blob)
+		return -EINVAL;
 
-	if (!count)
+	ret = dev_read_u32_array(dev, "states", states_array, count / 4);
+	if (ret)
 		return -EINVAL;
 
-	for (i = 0, j = 0; i < count; i += 2) {
+	for (i = 0, j = 0; i < count / 4; i += 2) {
 		dev_pdata->voltages[j] = states_array[i];
 		dev_pdata->states[j] = states_array[i + 1];
 		j++;

commit 1800dd05696c47518fda4194cc3fe6465b037ad9
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Tue Dec 1 15:01:26 2020 +0800

    configs: rk3568: enable slc nand
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: I885ce4eaf5ac0625e84e1a2195b477725edc6216

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index f8055279ce..017e5b294e 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -114,7 +114,7 @@ CONFIG_MTD=y
 CONFIG_MTD_BLK=y
 CONFIG_MTD_DEVICE=y
 CONFIG_NAND=y
-CONFIG_NAND_ROCKCHIP=y
+CONFIG_NAND_ROCKCHIP_V9=y
 CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
 CONFIG_SYS_NAND_U_BOOT_OFFS=0x8000
 CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND=0x10000

commit 813156ed32207266a1d9a2f6b3f268cf1f67871c
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Tue Dec 1 15:00:43 2020 +0800

    drivers: mtd: nand: support slc nand for rk3568
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: Id9bc21f8fb443574ad150c32b9c6980e2e038ca7

diff --git a/drivers/mtd/nand/raw/Makefile b/drivers/mtd/nand/raw/Makefile
index 527efd0229..e1ea0be8a2 100644
--- a/drivers/mtd/nand/raw/Makefile
+++ b/drivers/mtd/nand/raw/Makefile
@@ -78,5 +78,6 @@ obj-$(CONFIG_NAND_MXC) += mxc_nand_spl.o
 obj-$(CONFIG_NAND_MXS) += mxs_nand_spl.o mxs_nand.o
 obj-$(CONFIG_NAND_SUNXI) += sunxi_nand_spl.o
 obj-$(CONFIG_NAND_ROCKCHIP) += rockchip_nand_spl.o
+obj-$(CONFIG_NAND_ROCKCHIP_V9) += rockchip_nand_spl_v9.o
 
 endif # drivers
diff --git a/drivers/mtd/nand/raw/rockchip_nand_spl_v9.c b/drivers/mtd/nand/raw/rockchip_nand_spl_v9.c
new file mode 100644
index 0000000000..0065406794
--- /dev/null
+++ b/drivers/mtd/nand/raw/rockchip_nand_spl_v9.c
@@ -0,0 +1,565 @@
+/*
+ * Copyright (c) 2017 Yifeng Zhao <yifeng.zhao@rock-chips.com>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <fdtdec.h>
+#include <fdt_support.h>
+#include <inttypes.h>
+#include <nand.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/partitions.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define NANDC_V9_NUM_BANKS	4
+#define NANDC_V9_DEF_TIMEOUT	20000
+#define NANDC_V9_READ		0
+#define NANDC_V9_WRITE		1
+#define NANDC_REG_V9_FMCTL	0x00
+#define NANDC_REG_V9_FMWAIT	0x04
+#define NANDC_REG_V9_FLCTL	0x10
+#define NANDC_REG_V9_BCHCTL	0x20
+#define NANDC_REG_V9_DMA_CFG	0x30
+#define NANDC_REG_V9_DMA_BUF0	0x34
+#define NANDC_REG_V9_DMA_BUF1	0x38
+#define NANDC_REG_V9_DMA_ST	0x40
+#define NANDC_REG_V9_VER	0x80
+#define NANDC_REG_V9_INTEN	0x120
+#define NANDC_REG_V9_INTCLR	0x124
+#define NANDC_REG_V9_INTST	0x128
+#define NANDC_REG_V9_BCHST	0x150
+#define NANDC_REG_V9_SPARE0	0x200
+#define NANDC_REG_V9_SPARE1	0x204
+#define NANDC_REG_V9_RANDMZ	0x208
+#define NANDC_REG_V9_BANK0	0x800
+#define NANDC_REG_V9_SRAM0	0x1000
+#define NANDC_REG_V9_SRAM_SIZE	0x400
+
+#define NANDC_REG_V9_DATA	0x00
+#define NANDC_REG_V9_ADDR	0x04
+#define NANDC_REG_V9_CMD	0x08
+
+/* FMCTL */
+#define NANDC_V9_FM_WP		BIT(8)
+#define NANDC_V9_FM_CE_SEL_M	0xFF
+#define NANDC_V9_FM_CE_SEL(x)	(1 << (x))
+#define NANDC_V9_FM_FREADY	BIT(9)
+
+/* FLCTL */
+#define NANDC_V9_FL_RST		BIT(0)
+#define NANDC_V9_FL_DIR_S	0x1
+#define NANDC_V9_FL_XFER_START	BIT(2)
+#define NANDC_V9_FL_XFER_EN	BIT(3)
+#define NANDC_V9_FL_ST_BUF_S	0x4
+#define NANDC_V9_FL_XFER_COUNT	BIT(5)
+#define NANDC_V9_FL_ACORRECT	BIT(10)
+#define NANDC_V9_FL_XFER_READY	BIT(20)
+
+/* BCHCTL */
+#define NAND_V9_BCH_MODE_S	25
+#define NAND_V9_BCH_MODE_M	0x7
+
+/* BCHST */
+#define NANDC_V9_BCH0_ST_ERR	BIT(2)
+#define NANDC_V9_BCH1_ST_ERR	BIT(18)
+#define NANDC_V9_ECC_ERR_CNT0(x) (((x) & (0x7F << 3)) >> 3)
+#define NANDC_V9_ECC_ERR_CNT1(x) (((x) & (0x7F << 19)) >> 19)
+
+struct rk_nand {
+	void __iomem *regs;
+	u8 chipnr;
+	u8 id[5];
+	u8 *databuf;
+	struct udevice *dev;
+	struct mtd_info *mtd;
+};
+
+static struct rk_nand *g_rk_nand;
+static u32 nand_page_size;
+static u32 nand_page_num;
+static u32 nand_block_num;
+
+static void nandc_init(struct rk_nand *rknand)
+{
+	writel(0, rknand->regs + NANDC_REG_V9_RANDMZ);
+	writel(0, rknand->regs + NANDC_REG_V9_DMA_CFG);
+	writel(0x02000001, rknand->regs + NANDC_REG_V9_BCHCTL);
+	writel(0x1081, rknand->regs + NANDC_REG_V9_FMWAIT);
+}
+
+static void rockchip_nand_wait_dev_ready(void __iomem *regs)
+{
+	u32 reg;
+	u32 timeout = NANDC_V9_DEF_TIMEOUT;
+
+	while (timeout--) {
+		udelay(1);
+		reg = readl(regs + NANDC_REG_V9_FMCTL);
+
+		if (reg & NANDC_V9_FM_FREADY)
+			break;
+	}
+}
+
+static void rockchip_nand_select_chip(void __iomem *regs, int chipnr)
+{
+	u32 reg;
+
+	reg = readl(regs + NANDC_REG_V9_FMCTL);
+	reg &= ~NANDC_V9_FM_CE_SEL_M;
+	if (chipnr != -1)
+		reg |= 1 << chipnr;
+	writel(reg, regs + NANDC_REG_V9_FMCTL);
+}
+
+static void rockchip_nand_read_page(void __iomem *regs,
+				    int page, int col)
+{
+	void __iomem *bank_base = regs + NANDC_REG_V9_BANK0;
+
+	writeb(0x00, bank_base + NANDC_REG_V9_CMD);
+	writeb(col, bank_base + NANDC_REG_V9_ADDR);
+	writeb(col >> 8, bank_base + NANDC_REG_V9_ADDR);
+	writeb(page, bank_base + NANDC_REG_V9_ADDR);
+	writeb(page >> 8, bank_base + NANDC_REG_V9_ADDR);
+	writeb(page >> 16, bank_base + NANDC_REG_V9_ADDR);
+	writeb(0x30, bank_base + NANDC_REG_V9_CMD);
+}
+
+static void rockchip_nand_pio_xfer_start(struct rk_nand *rknand,
+					 u8 dir,
+					 u8 st_buf)
+{
+	u32 reg;
+
+	reg = (dir << NANDC_V9_FL_DIR_S) | (st_buf << NANDC_V9_FL_ST_BUF_S) |
+	      NANDC_V9_FL_XFER_EN | NANDC_V9_FL_XFER_COUNT |
+	      NANDC_V9_FL_ACORRECT;
+	writel(reg, rknand->regs + NANDC_REG_V9_FLCTL);
+
+	reg |= NANDC_V9_FL_XFER_START;
+	writel(reg, rknand->regs + NANDC_REG_V9_FLCTL);
+}
+
+static int rockchip_nand_wait_pio_xfer_done(struct rk_nand *rknand)
+{
+	int timeout = NANDC_V9_DEF_TIMEOUT;
+	int reg;
+
+	while (timeout--) {
+		reg = readl(rknand->regs + NANDC_REG_V9_FLCTL);
+
+		if ((reg & NANDC_V9_FL_XFER_READY)  != 0)
+			break;
+
+		udelay(1);
+	}
+
+	if (timeout == 0)
+		return -1;
+
+	return 0;
+}
+
+static int nandc_read_page(unsigned int page, uint8_t *buf)
+{
+	void __iomem *sram_base = g_rk_nand->regs + NANDC_REG_V9_SRAM0;
+	unsigned int max_bitflips = 0;
+	int ret, step, bch_st, ecc_step;
+
+	ecc_step = nand_page_size / 1024;
+	rockchip_nand_select_chip(g_rk_nand->regs, 0);
+	rockchip_nand_read_page(g_rk_nand->regs, page, 0);
+	rockchip_nand_wait_dev_ready(g_rk_nand->regs);
+	rockchip_nand_pio_xfer_start(g_rk_nand, NANDC_V9_READ, 0);
+
+	for (step = 0; step < ecc_step; step++) {
+		int data_off = step * 1024;
+		u8 *data = buf + data_off;
+
+		ret = rockchip_nand_wait_pio_xfer_done(g_rk_nand);
+		if (ret)
+			return ret;
+
+		bch_st = readl(g_rk_nand->regs + NANDC_REG_V9_BCHST);
+
+		if (bch_st & NANDC_V9_BCH0_ST_ERR) {
+			max_bitflips = -1;
+		} else {
+			ret = NANDC_V9_ECC_ERR_CNT0(bch_st);
+			max_bitflips = max_t(unsigned int, max_bitflips, ret);
+		}
+
+		if ((step + 1) < ecc_step)
+			rockchip_nand_pio_xfer_start(g_rk_nand, NANDC_V9_READ,
+						     (step + 1) & 0x1);
+
+		memcpy_fromio(data, sram_base + NANDC_REG_V9_SRAM_SIZE *
+			      (step & 1), 1024);
+	}
+	rockchip_nand_select_chip(g_rk_nand->regs, -1);
+
+	return max_bitflips;
+}
+
+static int is_badblock(unsigned int page)
+{
+	int res = 0, i;
+	u16 bad = 0xff;
+	void __iomem *regs = g_rk_nand->regs;
+	void __iomem *bank_base = regs + NANDC_REG_V9_BANK0;
+
+	if (nandc_read_page(page, g_rk_nand->databuf) == -1) {
+		rockchip_nand_select_chip(regs, 0);
+		rockchip_nand_read_page(regs, page, nand_page_size);
+		rockchip_nand_wait_dev_ready(regs);
+		for (i = 0; i < 8; i++) {
+			bad = readb(bank_base);
+			if (bad)
+				break;
+		}
+		if (i >= 8)
+			res = 1;
+		rockchip_nand_select_chip(regs, 0);
+	}
+	if (res)
+		printf("%s 0x%x %x %x\n", __func__, page, res, bad);
+	return res;
+}
+
+static void read_flash_id(struct rk_nand *rknand, uint8_t *id)
+{
+	void __iomem *bank_base = rknand->regs + NANDC_REG_V9_BANK0;
+
+	rockchip_nand_wait_dev_ready(g_rk_nand->regs);
+	writeb(0x90, bank_base + NANDC_REG_V9_CMD);
+	writeb(0x00, bank_base + NANDC_REG_V9_ADDR);
+	udelay(1);
+	id[0] = readb(bank_base);
+	id[1] = readb(bank_base);
+	id[2] = readb(bank_base);
+	id[3] = readb(bank_base);
+	id[4] = readb(bank_base);
+	rockchip_nand_select_chip(rknand->regs, -1);
+	if (id[0] != 0xFF && id[0] != 0x00)
+		printf("NAND:%x %x\n", id[0], id[1]);
+}
+
+#ifdef CONFIG_NAND_ROCKCHIP_DT
+static const struct udevice_id rockchip_nandc_ids[] = {
+	{ .compatible = "rockchip,rk-nandc" },
+	{ }
+};
+
+static int spl_nand_block_isbad(struct mtd_info *mtd, loff_t ofs)
+{
+	return is_badblock((u32)ofs / nand_page_size);
+}
+
+static int spl_nand_read_page(struct mtd_info *mtd, loff_t from, size_t len,
+			      size_t *retlen, u_char *buf)
+{
+	int read_size, offset, read_len;
+	unsigned int page;
+	unsigned int max_pages = nand_page_num * nand_block_num;
+
+	/* Convert to page number */
+	page = (u32)from / nand_page_size;
+	offset = from & (nand_page_size - 1);
+	read_len = len;
+	*retlen = 0;
+
+	while (read_len) {
+		read_size = nand_page_size - offset;
+		if (read_size > read_len)
+			read_size = read_len;
+		if (offset || read_size < nand_page_size) {
+			if (nandc_read_page(page, g_rk_nand->databuf) < 0)
+				return -EIO;
+			memcpy(buf, g_rk_nand->databuf + offset, read_size);
+			offset = 0;
+		} else {
+			if (nandc_read_page(page, buf) < 0)
+				return -EIO;
+		}
+		page++;
+		read_len -= read_size;
+		buf += read_size;
+		if (page >= max_pages)
+			return -EIO;
+	}
+
+	*retlen = len;
+
+	return 0;
+}
+
+static int rockchip_nandc_probe(struct udevice *dev)
+{
+	const void *blob = gd->fdt_blob;
+	struct rk_nand *rknand = dev_get_priv(dev);
+	struct mtd_info *mtd = dev_get_uclass_priv(dev);
+	fdt_addr_t regs;
+	int ret = -ENODEV;
+	int node;
+	u8 *id;
+
+	g_rk_nand = rknand;
+	rknand->dev = dev;
+
+	node = fdtdec_next_compatible(blob, 0, COMPAT_ROCKCHIP_NANDC);
+
+	if (node < 0) {
+		printf("Nand node not found\n");
+		return -ENODEV;
+	}
+
+	if (!fdtdec_get_is_enabled(blob, node)) {
+		debug("Nand disabled in device tree\n");
+		return -ENODEV;
+	}
+
+	regs = fdt_get_base_address(blob, node);
+	if (!regs) {
+		debug("Nand address not found\n");
+		return -ENODEV;
+	}
+
+	rknand->regs = (void *)regs;
+
+	nandc_init(g_rk_nand);
+	read_flash_id(g_rk_nand, g_rk_nand->id);
+
+	id = g_rk_nand->id;
+	if (id[0] == id[1])
+		return -ENODEV;
+
+	if (id[1] == 0xA1 || id[1] == 0xF1 ||
+	    id[1] == 0xD1 || id[1] == 0xAA ||
+	    id[1] == 0xDA || id[1] == 0xAC ||
+	    id[1] == 0xDC || id[1] == 0xA3 ||
+	    id[1] == 0xD3 || id[1] == 0x95 ||
+	    id[1] == 0x48) {
+		nand_page_size = 2048;
+		nand_page_num = 64;
+		nand_block_num = 1024;
+		if (id[1] == 0xDC) {
+			if ((id[0] == 0x2C && id[3] == 0xA6) ||
+			    (id[0] == 0xC2 && id[3] == 0xA2)) {
+				nand_page_size = 4096;
+				nand_block_num = 2048;
+			} else if (id[0] == 0x98 && id[3] == 0x26) {
+				nand_page_size = 4096;
+				nand_block_num = 2048;
+			} else {
+				nand_block_num = 4096;
+			}
+		} else if (id[1] == 0xDA) {
+			nand_block_num = 2048;
+		} else if (id[1] == 0x48) {
+			nand_page_size = 4096;
+			nand_page_num = 128;
+			nand_block_num = 4096;
+		} else if (id[1] == 0xD3) {
+			nand_page_size = 4096;
+			nand_block_num = 4096;
+		}
+
+		g_rk_nand->chipnr = 1;
+		g_rk_nand->databuf = kzalloc(nand_page_size, GFP_KERNEL);
+		if (!g_rk_nand)
+			return -ENOMEM;
+		mtd->_block_isbad = spl_nand_block_isbad;
+		mtd->_read = spl_nand_read_page;
+		mtd->size = (size_t)nand_page_size * nand_page_num *
+			    nand_block_num;
+		mtd->writesize = nand_page_size;
+		mtd->erasesize = nand_page_size * nand_page_num;
+		mtd->erasesize_shift = ffs(mtd->erasesize) - 1;
+		mtd->erasesize_mask = (1 << mtd->erasesize_shift) - 1;
+		mtd->type = MTD_NANDFLASH;
+		mtd->dev = rknand->dev;
+		mtd->priv = rknand;
+		add_mtd_device(mtd);
+		mtd->name = "rk-nand";
+		rknand->mtd = mtd;
+		ret = 0;
+	}
+
+	return ret;
+}
+
+static int rockchip_nandc_bind(struct udevice *udev)
+{
+	int ret = 0;
+
+#ifdef CONFIG_MTD_BLK
+	struct udevice *bdev;
+
+	ret = blk_create_devicef(udev, "mtd_blk", "blk", IF_TYPE_MTD,
+				 BLK_MTD_NAND, 512, 0, &bdev);
+	if (ret)
+		printf("Cannot create block device\n");
+#endif
+	return ret;
+}
+
+U_BOOT_DRIVER(rk_nandc_v9) = {
+	.name           = "rk_nandc_v9",
+	.id             = UCLASS_MTD,
+	.of_match       = rockchip_nandc_ids,
+	.bind		= rockchip_nandc_bind,
+	.probe          = rockchip_nandc_probe,
+	.priv_auto_alloc_size = sizeof(struct rk_nand),
+};
+
+void board_nand_init(void)
+{
+	struct udevice *dev;
+	int ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_MTD,
+					  DM_GET_DRIVER(rk_nandc_v9),
+					  &dev);
+	if (ret && ret != -ENODEV)
+		pr_err("Failed to initialize NAND controller. (error %d)\n",
+		       ret);
+}
+
+int nand_spl_load_image(u32 offs, u32 size, void *buf)
+{
+	return -EIO;
+}
+
+void nand_init(void){};
+
+int rk_nand_init(void)
+{
+	return -ENODEV;
+}
+
+#else
+void board_nand_init(void)
+{
+	const void *blob = gd->fdt_blob;
+	static int initialized;
+	fdt_addr_t regs;
+	int node;
+
+	if (initialized)
+		return;
+
+	initialized = 1;
+	nand_page_size = CONFIG_SYS_NAND_PAGE_SIZE;
+	nand_page_num = CONFIG_SYS_NAND_PAGE_COUNT;
+
+	if (g_rk_nand)
+		return;
+
+	node = fdtdec_next_compatible(blob, 0, COMPAT_ROCKCHIP_NANDC);
+
+	if (node < 0) {
+		printf("Nand node not found\n");
+		return;
+	}
+
+	if (!fdtdec_get_is_enabled(blob, node)) {
+		debug("Nand disabled in device tree\n");
+		return;
+	}
+
+	regs = fdt_get_base_address(blob, node);
+	if (!regs) {
+		debug("Nand address not found\n");
+		return;
+	}
+
+	g_rk_nand = kzalloc(sizeof(*g_rk_nand), GFP_KERNEL);
+	g_rk_nand->regs = (void *)regs;
+	g_rk_nand->databuf = kzalloc(nand_page_size, GFP_KERNEL);
+	nandc_init(g_rk_nand);
+	read_flash_id(g_rk_nand, g_rk_nand->id);
+
+	if (g_rk_nand->id[0] == g_rk_nand->id[1])
+		goto err;
+
+	if (g_rk_nand->id[1] == 0xA1 || g_rk_nand->id[1] == 0xF1 ||
+	    g_rk_nand->id[1] == 0xD1 || g_rk_nand->id[1] == 0xAA ||
+	    g_rk_nand->id[1] == 0xDA || g_rk_nand->id[1] == 0xAC ||
+	    g_rk_nand->id[1] == 0xDC || g_rk_nand->id[1] == 0xA3 ||
+	    g_rk_nand->id[1] == 0xD3 || g_rk_nand->id[1] == 0x95 ||
+	    g_rk_nand->id[1] == 0x48) {
+		g_rk_nand->chipnr = 1;
+		return;
+	}
+
+err:
+	kfree(g_rk_nand->databuf);
+	kfree(g_rk_nand);
+	g_rk_nand = NULL;
+}
+
+int nand_spl_load_image(u32 offs, u32 size, void *buf)
+{
+	int i;
+	unsigned int page;
+	unsigned int maxpages = CONFIG_SYS_NAND_SIZE /
+				nand_page_size;
+
+	/* Convert to page number */
+	page = offs / nand_page_size;
+	i = 0;
+
+	size = roundup(size, nand_page_size);
+	while (i < size / nand_page_size) {
+		/*
+		 * Check if we have crossed a block boundary, and if so
+		 * check for bad block.
+		 */
+		if (!(page % nand_page_size)) {
+			/*
+			 * Yes, new block. See if this block is good. If not,
+			 * loop until we find a good block.
+			 */
+			while (is_badblock(page)) {
+				page = page + nand_page_size;
+				/* Check i we've reached the end of flash. */
+				if (page >= maxpages)
+					return -EIO;
+			}
+		}
+
+		if (nandc_read_page(page, buf) < 0)
+			return -EIO;
+
+		page++;
+		i++;
+		buf = buf + nand_page_size;
+	}
+	return 0;
+}
+
+void nand_init(void)
+{
+	board_nand_init();
+}
+
+int rk_nand_init(void)
+{
+	board_nand_init();
+	if (g_rk_nand && g_rk_nand->chipnr)
+		return 0;
+	else
+		return -ENODEV;
+}
+#endif
+
+void nand_deselect(void) {}
+
diff --git a/drivers/mtd/nand/raw/rockchip_nand_v9.c b/drivers/mtd/nand/raw/rockchip_nand_v9.c
index aa4cd1c4df..8c7dbac59d 100644
--- a/drivers/mtd/nand/raw/rockchip_nand_v9.c
+++ b/drivers/mtd/nand/raw/rockchip_nand_v9.c
@@ -19,7 +19,11 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#ifdef CONFIG_ROCKCHIP_RK3568
+#define NANDC_V9_BOOTROM_ECC	16
+#else
 #define NANDC_V9_BOOTROM_ECC	70
+#endif
 #define NANDC_V9_NUM_BANKS	4
 #define NANDC_V9_DEF_TIMEOUT	20000
 #define NANDC_V9_READ		0
@@ -78,7 +82,6 @@ struct rk_nand {
 	uint32_t banks[NANDC_V9_NUM_BANKS];
 	struct nand_hw_control controller;
 	uint32_t ecc_strength;
-	uint32_t max_ecc_strength;
 	struct mtd_info mtd;
 	bool bootromblocks;
 	void __iomem *regs;
@@ -90,13 +93,13 @@ static struct nand_ecclayout nand_oob_fix = {
 	.eccbytes = 24,
 	.eccpos = {
 		4, 5, 6, 7, 8, 9, 10
-        },
+	},
 	.oobfree = {
 		{
 			.offset = 0,
 			.length = 4
-                }
-        }
+		}
+	}
 };
 
 static inline struct rk_nand *to_rknand(struct nand_hw_control *ctrl)
@@ -485,7 +488,7 @@ static int rockchip_nand_hw_ecc_ctrl_init(struct mtd_info *mtd,
 
 	if (fdtdec_get_bool(gd->fdt_blob, chip->flash_node,
 			    "rockchip,protect-bootrom-blocks"))
-                rknand->bootromblocks = true;
+		rknand->bootromblocks = true;
 	else
 		rknand->bootromblocks = false;
 
@@ -494,10 +497,6 @@ static int rockchip_nand_hw_ecc_ctrl_init(struct mtd_info *mtd,
 	else
 		strength = rockchip_nand_ecc_max_strength(mtd, ecc);
 
-	rknand->max_ecc_strength = 70;
-	if (strength > rknand->max_ecc_strength)
-		strength = rknand->max_ecc_strength;
-
 	rockchip_nand_hw_ecc_setup(mtd, ecc, strength);
 
 	rknand->ecc_strength = ecc->strength;
@@ -540,7 +539,7 @@ static int rockchip_nand_ecc_init(struct mtd_info *mtd,
 
 static int rockchip_nand_block_bad(struct mtd_info *mtd, loff_t ofs)
 {
-	int page, res = 0, i;
+	int page, res = 0;
 	struct nand_chip *chip = mtd_to_nand(mtd);
 	u16 bad = 0xff;
 	int chipnr = (int)(ofs >> chip->chip_shift);
@@ -550,13 +549,23 @@ static int rockchip_nand_block_bad(struct mtd_info *mtd, loff_t ofs)
 	chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);
 	if(rockchip_nand_hw_syndrome_pio_read_page(mtd,
 	   chip, chip->buffers->databuf, 0, page) == -1) {
+		/* first page of the block*/
 		chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos, page);
-		for (i = 0; i < 8; i++) {
-			bad = chip->read_byte(mtd);
-			if (bad)
-				break;
-		}
-		if (i >= 8)
+		bad = chip->read_byte(mtd);
+		if (bad != 0xFF)
+			res = 1;
+		/* second page of the block*/
+		chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos,
+			      page + 1);
+		bad = chip->read_byte(mtd);
+		if (bad != 0xFF)
+			res = 1;
+		/* last page of the block */
+		page += ((mtd->erasesize - mtd->writesize) >> chip->chip_shift);
+		page--;
+		chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos, page);
+		bad = chip->read_byte(mtd);
+		if (bad != 0xFF)
 			res = 1;
 	}
 	chip->select_chip(mtd, -1);
@@ -619,6 +628,8 @@ static int rockchip_nand_chip_init(int node, struct rk_nand *rknand, int devnum)
 		return ret;
 	}
 	mtd->name = "rk-nand";
+	memcpy(&rknand->mtd, mtd, sizeof(struct mtd_info));
+
 	return 0;
 }
 
@@ -648,6 +659,7 @@ static int rockchip_nandc_probe(struct udevice *dev)
 {
 	const void *blob = gd->fdt_blob;
 	struct rk_nand *rknand = dev_get_priv(dev);
+	struct mtd_info *mtd = dev_get_uclass_priv(dev);
 	fdt_addr_t regs;
 	int ret = 0, node;
 
@@ -672,6 +684,8 @@ static int rockchip_nandc_probe(struct udevice *dev)
 	if (ret)
 		debug("Failed to init nand chips\n");
 
+	memcpy(mtd, &rknand->mtd, sizeof(struct mtd_info));
+
 	return ret;
 }
 

commit 2f5dff11cbf4d712e196d0c3ea81f09b69fd7439
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Wed Jan 6 16:18:15 2021 +0800

    thermal: rockchip: support rk3568
    
    Change-Id: Icb4d127a9d9c3f599a141c69c7c759da6e38cf36
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index 798f619239..42570427be 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -87,8 +87,11 @@ enum adc_sort_mode {
 #define TSADCV2_AUTO_PERIOD_HT_TIME		50
 #define TSADCV3_AUTO_PERIOD_TIME		1875
 #define TSADCV3_AUTO_PERIOD_HT_TIME		1875
+#define TSADCV5_AUTO_PERIOD_TIME		1622 /* 2.5ms */
+#define TSADCV5_AUTO_PERIOD_HT_TIME		1622 /* 2.5ms */
 
 #define TSADCV2_USER_INTER_PD_SOC		0x340	/* 13 clocks */
+#define TSADCV5_USER_INTER_PD_SOC		0xfc0 /* 97us, at least 90us */
 
 #define GRF_SARADC_TESTBIT			0x0e644
 #define GRF_TSADC_TESTBIT_L			0x0e648
@@ -96,6 +99,12 @@ enum adc_sort_mode {
 
 #define PX30_GRF_SOC_CON2			0x0408
 
+#define RK3568_GRF_TSADC_CON			0x0600
+#define RK3568_GRF_TSADC_ANA_REG0		(0x10001 << 0)
+#define RK3568_GRF_TSADC_ANA_REG1		(0x10001 << 1)
+#define RK3568_GRF_TSADC_ANA_REG2		(0x10001 << 2)
+#define RK3568_GRF_TSADC_TSEN			(0x10001 << 8)
+
 #define GRF_SARADC_TESTBIT_ON			(0x10001 << 2)
 #define GRF_TSADC_TESTBIT_H_ON			(0x10001 << 2)
 #define GRF_TSADC_VCM_EN_L			(0x10001 << 7)
@@ -402,6 +411,45 @@ static const struct tsadc_table rk3399_code_table[] = {
 	{TSADCV3_DATA_MASK, 125000},
 };
 
+static const struct tsadc_table rk3568_code_table[] = {
+	{0, -40000},
+	{1584, -40000},
+	{1620, -35000},
+	{1652, -30000},
+	{1688, -25000},
+	{1720, -20000},
+	{1756, -15000},
+	{1788, -10000},
+	{1824, -5000},
+	{1856, 0},
+	{1892, 5000},
+	{1924, 10000},
+	{1956, 15000},
+	{1992, 20000},
+	{2024, 25000},
+	{2060, 30000},
+	{2092, 35000},
+	{2128, 40000},
+	{2160, 45000},
+	{2196, 50000},
+	{2228, 55000},
+	{2264, 60000},
+	{2300, 65000},
+	{2332, 70000},
+	{2368, 75000},
+	{2400, 80000},
+	{2436, 85000},
+	{2468, 90000},
+	{2500, 95000},
+	{2536, 100000},
+	{2572, 105000},
+	{2604, 110000},
+	{2636, 115000},
+	{2672, 120000},
+	{2704, 125000},
+	{TSADCV2_DATA_MASK, 125000},
+};
+
 /*
  * Struct used for matching a device
  */
@@ -607,6 +655,42 @@ static void tsadc_init_v4(struct udevice *dev)
 		writel(GRF_CON_TSADC_CH_INV, priv->grf + PX30_GRF_SOC_CON2);
 }
 
+static void tsadc_init_v7(struct udevice *dev)
+{
+	struct rockchip_thermal_priv *priv = dev_get_priv(dev);
+
+	writel(TSADCV5_USER_INTER_PD_SOC,
+	       priv->base + TSADCV2_USER_CON);
+	writel(TSADCV5_AUTO_PERIOD_TIME,
+	       priv->base + TSADCV2_AUTO_PERIOD);
+	writel(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
+	       priv->base + TSADCV2_HIGHT_INT_DEBOUNCE);
+	writel(TSADCV5_AUTO_PERIOD_HT_TIME,
+	       priv->base + TSADCV2_AUTO_PERIOD_HT);
+	writel(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
+	       priv->base + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
+
+	if (priv->tshut_polarity == TSHUT_HIGH_ACTIVE)
+		writel(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
+		       priv->base + TSADCV2_AUTO_CON);
+	else
+		writel(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
+		       priv->base + TSADCV2_AUTO_CON);
+
+	if (!IS_ERR(priv->grf)) {
+		writel(RK3568_GRF_TSADC_TSEN,
+		       priv->grf + RK3568_GRF_TSADC_CON);
+		udelay(15);
+		writel(RK3568_GRF_TSADC_ANA_REG0,
+		       priv->grf + RK3568_GRF_TSADC_CON);
+		writel(RK3568_GRF_TSADC_ANA_REG1,
+		       priv->grf + RK3568_GRF_TSADC_CON);
+		writel(RK3568_GRF_TSADC_ANA_REG2,
+		       priv->grf + RK3568_GRF_TSADC_CON);
+		udelay(200);
+	}
+}
+
 static int tsadc_get_temp_v2(struct udevice *dev,
 			     int chn, int *temp)
 {
@@ -1052,6 +1136,31 @@ static const struct rockchip_tsadc_chip rk3399_tsadc_data = {
 	},
 };
 
+static const struct rockchip_tsadc_chip rk3568_tsadc_data = {
+	.chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
+	.chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
+	.chn_num = 2, /* two channels for tsadc */
+
+	.tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
+	.tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
+	.tshut_temp = 95000,
+
+	.tsadc_init = tsadc_init_v7,
+	.tsadc_control = tsadc_control_v3,
+	.tsadc_get_temp = tsadc_get_temp_v2,
+	.irq_ack = tsadc_irq_ack_v3,
+	.set_alarm_temp = tsadc_alarm_temp_v2,
+	.set_tshut_temp = tsadc_tshut_temp_v2,
+	.set_tshut_mode = tsadc_tshut_mode_v2,
+
+	.table = {
+		.id = rk3568_code_table,
+		.length = ARRAY_SIZE(rk3568_code_table),
+		.data_mask = TSADCV2_DATA_MASK,
+		.mode = ADC_INCREMENT,
+	},
+};
+
 static const struct udevice_id rockchip_thermal_match[] = {
 	{
 		.compatible = "rockchip,px30-tsadc",
@@ -1089,6 +1198,10 @@ static const struct udevice_id rockchip_thermal_match[] = {
 		.compatible = "rockchip,rk3399-tsadc",
 		.data = (ulong)&rk3399_tsadc_data,
 	},
+	{
+		.compatible = "rockchip,rk3568-tsadc",
+		.data = (ulong)&rk3568_tsadc_data,
+	},
 	{ /* end */ },
 };
 

commit 6f71993b11dd7e6e321e356659fdbb081d9ec57f
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jan 6 16:12:22 2021 +0800

    rockchip: dts: rk3568: add max-frequency for sdhci
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I0815514fe2eeed99c73ac181f1ce42c89f7644c9

diff --git a/arch/arm/dts/rk3568.dtsi b/arch/arm/dts/rk3568.dtsi
index 91e26ce767..a48611b8ec 100644
--- a/arch/arm/dts/rk3568.dtsi
+++ b/arch/arm/dts/rk3568.dtsi
@@ -1853,6 +1853,7 @@
 	sdhci: sdhci@fe310000 {
 		compatible = "rockchip,dwcmshc-sdhci", "snps,dwcmshc-sdhci";
 		reg = <0x0 0xfe310000 0x0 0x10000>;
+		max-frequency = <200000000>;
 		interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 		assigned-clocks = <&cru BCLK_EMMC>, <&cru TCLK_EMMC>;
 		assigned-clock-rates = <200000000>, <24000000>;

commit 43f2461c069a8750df2e6c5065d92ebb51949ddb
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed Jan 6 15:18:12 2021 +0800

    mtd: spinand: Add optional configuration for different devices
    
    Change-Id: If3d66f2f48f7322493175cdfba46d563b760b44c
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/Kconfig b/drivers/mtd/nand/spi/Kconfig
index 1e69667ae9..b58b769c54 100644
--- a/drivers/mtd/nand/spi/Kconfig
+++ b/drivers/mtd/nand/spi/Kconfig
@@ -6,3 +6,75 @@ menuconfig MTD_SPI_NAND
 	select MTD_NAND_BBT_USING_FLASH
 	help
 	  This is the framework for the SPI NAND device drivers.
+
+if MTD_SPI_NAND
+
+config SPI_NAND_GIGADEVICE
+	bool "GIGADEVICE SPI flash support"
+	default y
+	help
+	  Add support for various GIGADEVICE SPI Nand flash chips
+
+config SPI_NAND_MACRONIX
+	bool "MACRONIX SPI flash support"
+	default y
+	help
+	  Add support for various MACRONIX SPI Nand flash chips
+
+config SPI_NAND_MICRON
+	bool "MICRON SPI flash support"
+	default y
+	help
+	  Add support for various MICRON SPI Nand flash chips
+
+config SPI_NAND_TOSHIBA
+	bool "TOSHIBA SPI flash support"
+	default y
+	help
+	  Add support for various TOSHIBA SPI Nand flash chips
+
+config SPI_NAND_WINBOND
+	bool "WINBOND SPI flash support"
+	default y
+	help
+	  Add support for various WINBOND SPI Nand flash chips
+
+config SPI_NAND_DOSILICON
+	bool "DOSILICON SPI flash support"
+	default y
+	help
+	  Add support for various DOSILICON SPI Nand flash chips
+
+config SPI_NAND_ESMT
+	bool "ESMT SPI flash support"
+	default y
+	select SPI_NAND_MICRON
+	help
+	  Add support for various ESMT SPI Nand flash chips
+
+config SPI_NAND_XTX
+	bool "XTX SPI flash support"
+	default y
+	select SPI_NAND_MICRON
+	help
+	  Add support for various XTX SPI Nand flash chips
+
+config SPI_NAND_HYF
+	bool "HYF SPI flash support"
+	default y
+	help
+	  Add support for various HYF SPI Nand flash chips
+
+config SPI_NAND_FMSH
+	default y
+	bool "FMSH SPI flash support"
+	help
+	  Add support for various FMSH SPI Nand flash chips
+
+config SPI_NAND_FORESEE
+	default y
+	bool "FORESEE SPI flash support"
+	help
+	  Add support for various FORESEE SPI Nand flash chips
+
+endif
diff --git a/drivers/mtd/nand/spi/Makefile b/drivers/mtd/nand/spi/Makefile
index 0f7fbf6aac..2ec3b33285 100644
--- a/drivers/mtd/nand/spi/Makefile
+++ b/drivers/mtd/nand/spi/Makefile
@@ -1,4 +1,15 @@
 # SPDX-License-Identifier: GPL-2.0
 
-spinand-objs := core.o gigadevice.o macronix.o micron.o toshiba.o winbond.o dosilicon.o esmt.o xtx.o hyf.o fmsh.o foresee.o
+spinand-objs := core.o
+obj-$(CONFIG_SPI_NAND_GIGADEVICE) += gigadevice.o
+obj-$(CONFIG_SPI_NAND_MACRONIX) += macronix.o
+obj-$(CONFIG_SPI_NAND_MICRON) += micron.o
+obj-$(CONFIG_SPI_NAND_TOSHIBA) += toshiba.o
+obj-$(CONFIG_SPI_NAND_WINBOND) += winbond.o
+obj-$(CONFIG_SPI_NAND_DOSILICON) += dosilicon.o
+obj-$(CONFIG_SPI_NAND_ESMT) += esmt.o
+obj-$(CONFIG_SPI_NAND_XTX) += xtx.o
+obj-$(CONFIG_SPI_NAND_HYF) += hyf.o
+obj-$(CONFIG_SPI_NAND_FMSH) += fmsh.o
+obj-$(CONFIG_SPI_NAND_FORESEE) += foresee.o
 obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index 82b1e76b10..ebbfe5ab17 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -815,17 +815,39 @@ static const struct nand_ops spinand_ops = {
 };
 
 static const struct spinand_manufacturer *spinand_manufacturers[] = {
+#ifdef CONFIG_SPI_NAND_GIGADEVICE
 	&gigadevice_spinand_manufacturer,
+#endif
+#ifdef CONFIG_SPI_NAND_MACRONIX
 	&macronix_spinand_manufacturer,
+#endif
+#ifdef CONFIG_SPI_NAND_MICRON
 	&micron_spinand_manufacturer,
+#endif
+#ifdef CONFIG_SPI_NAND_TOSHIBA
 	&toshiba_spinand_manufacturer,
+#endif
+#ifdef CONFIG_SPI_NAND_WINBOND
 	&winbond_spinand_manufacturer,
+#endif
+#ifdef CONFIG_SPI_NAND_DOSILICON
 	&dosilicon_spinand_manufacturer,
+#endif
+#ifdef CONFIG_SPI_NAND_ESMT
 	&esmt_spinand_manufacturer,
+#endif
+#ifdef CONFIG_SPI_NAND_XTX
 	&xtx_spinand_manufacturer,
+#endif
+#ifdef CONFIG_SPI_NAND_HYF
 	&hyf_spinand_manufacturer,
+#endif
+#ifdef CONFIG_SPI_NAND_FMSH
 	&fmsh_spinand_manufacturer,
+#endif
+#ifdef CONFIG_SPI_NAND_FORESEE
 	&foresee_spinand_manufacturer,
+#endif
 };
 
 static int spinand_manufacturer_detect(struct spinand_device *spinand)

commit daa2653382d186a646f3e96bb79a538500e27d34
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jan 6 11:10:03 2021 +0800

    configs: rk3568: support mtd write in spl
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ic0c4502bf202796df6138ccfb91a09636d6b99db

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index aa5776fe82..f8055279ce 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -44,6 +44,7 @@ CONFIG_SPL_CRYPTO_SUPPORT=y
 CONFIG_SPL_HASH_SUPPORT=y
 CONFIG_SPL_MMC_WRITE=y
 CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD_WRITE=y
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_SPL_AB=y

commit 0fb8f93bbb817012113b24ff30eb9b283d5000b8
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jan 6 11:09:26 2021 +0800

    configs: rv1126: support mtd write in spl
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Idba0d10e80d6368a912d6369c85efb6eaa2212d6

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index d13b5ccd03..3ff665af71 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -44,6 +44,7 @@ CONFIG_SPL_SHA256_SUPPORT=y
 CONFIG_SPL_CRYPTO_SUPPORT=y
 CONFIG_SPL_HASH_SUPPORT=y
 CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_MTD_WRITE=y
 CONFIG_SPL_OPTEE=y
 CONFIG_SPL_AB=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800

commit 0554021750b22ad31b0c77fb6b2ada7dbed8282b
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jan 6 10:55:19 2021 +0800

    configs: rk3568-spi-nand: reduce code size for spi nand device
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I6f47591f30ff4eb7b9bfa1830bf8060963c3a210

diff --git a/configs/rk3568-spi-nand_defconfig b/configs/rk3568-spi-nand_defconfig
new file mode 100644
index 0000000000..8217548976
--- /dev/null
+++ b/configs/rk3568-spi-nand_defconfig
@@ -0,0 +1,185 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x80000
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.sh"
+CONFIG_ROCKCHIP_RK3568=y
+# CONFIG_SPL_MMC_SUPPORT is not set
+CONFIG_ROCKCHIP_FIT_IMAGE=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_TARGET_EVB_RK3568=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3568-spi-nand"
+CONFIG_SMBIOS_PRODUCT_NAME=""
+CONFIG_DEBUG_UART=y
+# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_FIT=y
+CONFIG_FIT_IMAGE_POST_PROCESS=y
+CONFIG_FIT_HW_CRYPTO=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
+CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_DISPLAY_CPUINFO is not set
+# CONFIG_ANDROID_WRITE_KEYBOX is not set
+CONFIG_ANDROID_AVB=y
+# CONFIG_ANDROID_KEYMASTER_CA is not set
+CONFIG_SPL_BOARD_INIT=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_SPL_SEPARATE_BSS=y
+# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
+CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_FASTBOOT_BUF_ADDR=0x800800
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set
+CONFIG_CMD_DTIMG=y
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_LZMADEC is not set
+# CONFIG_CMD_UNZIP is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPT=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_ITEST is not set
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_TFTP_BOOTM=y
+CONFIG_CMD_TFTP_FLASH=y
+# CONFIG_CMD_MISC is not set
+# CONFIG_CMD_CHARGE_DISPLAY is not set
+CONFIG_CMD_MTD_BLK=y
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_SPL_DTB_MINIMUM=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+# CONFIG_NET_TFTP_VARS is not set
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_DM_CRYPTO=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_ROCKCHIP_GPIO_V2=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_RK8XX_PWRKEY=y
+CONFIG_ADC_KEY=y
+CONFIG_MISC=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_MTD=y
+CONFIG_MTD_BLK=y
+CONFIG_MTD_DEVICE=y
+CONFIG_NAND=y
+CONFIG_NAND_ROCKCHIP=y
+CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
+CONFIG_SYS_NAND_U_BOOT_OFFS=0x8000
+CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND=0x10000
+CONFIG_MTD_SPI_NAND=y
+CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=20000000
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPI_FLASH_MTD=y
+CONFIG_DM_ETH=y
+CONFIG_DM_ETH_PHY=y
+CONFIG_DWC_ETH_QOS=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_NANENG_EDP=y
+CONFIG_PINCTRL=y
+CONFIG_DM_FUEL_GAUGE=y
+CONFIG_POWER_FG_RK817=y
+CONFIG_IO_DOMAIN=y
+CONFIG_ROCKCHIP_IO_DOMAIN=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_DM_CHARGE_DISPLAY=y
+CONFIG_CHARGE_ANIMATION=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_TPL_RAM=y
+CONFIG_ROCKCHIP_SDRAM_COMMON=y
+CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE=0
+CONFIG_DM_RESET=y
+CONFIG_SPL_DM_RESET=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0xFE660000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_ROCKCHIP_SFC=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x350a
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_DW_HDMI=y
+CONFIG_DRM_ROCKCHIP_INNO_MIPI_PHY=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
+CONFIG_LCD=y
+CONFIG_ROCKCHIP_EINK=y
+CONFIG_ROCKCHIP_EBC_TCON=y
+CONFIG_ROCKCHIP_TPS65185=y
+CONFIG_ROCKCHIP_EINK_DISPLAY=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_LIB_RAND=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_RSA=y
+CONFIG_RSA_N_SIZE=0x200
+CONFIG_RSA_E_SIZE=0x10
+CONFIG_RSA_C_SIZE=0x20
+CONFIG_SHA512=y
+CONFIG_LZ4=y
+CONFIG_ERRNO_STR=y
+CONFIG_AVB_LIBAVB=y
+CONFIG_AVB_LIBAVB_AB=y
+CONFIG_AVB_LIBAVB_ATX=y
+CONFIG_AVB_LIBAVB_USER=y
+CONFIG_RK_AVB_LIBAVB_USER=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V2=y

commit f2e13b14c7d5f7bee7ce4e450f96b3b293c4264c
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jan 6 15:19:24 2021 +0800

    rockchip: arm: dts: rk3568-spi-nand: create this dts for spi nand device
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ie6412cf8d5227ddd0f580d129cca77236d1c5bff

diff --git a/arch/arm/dts/rk3568-spi-nand.dts b/arch/arm/dts/rk3568-spi-nand.dts
new file mode 100644
index 0000000000..3d7c9041d2
--- /dev/null
+++ b/arch/arm/dts/rk3568-spi-nand.dts
@@ -0,0 +1,340 @@
+/*
+ * SPDX-License-Identifier:     GPL-2.0+
+ *
+ * (C) Copyright 2021 Rockchip Electronics Co., Ltd
+ */
+
+/dts-v1/;
+#include "rk3568.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Rockchip RK3568 Evaluation Board";
+	compatible = "rockchip,rk3568-evb", "rockchip,rk3568";
+
+	aliases {
+		ethernet0 = &gmac0;
+		ethernet1 = &gmac1;
+		mmc0 = &sdhci;
+		mmc1 = &sdmmc0;
+		mmc2 = &sdmmc1;
+	};
+
+	chosen {
+		stdout-path = &uart2;
+		u-boot,spl-boot-order = &spi_nand;
+	};
+
+	adc-keys {
+		compatible = "adc-keys";
+		io-channels = <&saradc 0>;
+		io-channel-names = "buttons";
+		keyup-threshold-microvolt = <1800000>;
+		u-boot,dm-spl;
+		status = "okay";
+
+		volumeup-key {
+			u-boot,dm-spl;
+			linux,code = <KEY_VOLUMEUP>;
+			label = "volume up";
+			press-threshold-microvolt = <9>;
+		};
+	};
+};
+
+&crypto {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&uart2 {
+	clock-frequency = <24000000>;
+	u-boot,dm-spl;
+	/delete-property/ pinctrl-names;
+	/delete-property/ pinctrl-0;
+	status = "okay";
+};
+
+&grf {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&pmugrf {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&usb2phy0_grf {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&usbdrd30 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&usbdrd_dwc3 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&usbhost30 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&usbhost_dwc3 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&usb2phy0 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&u2phy0_otg {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&u2phy0_host {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&cru {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&pmucru {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&gmac0_clkin{
+	u-boot,dm-pre-reloc;
+};
+
+&gmac1_clkin {
+	u-boot,dm-pre-reloc;
+};
+
+&gmac0 {
+	u-boot,dm-pre-reloc;
+	phy-mode = "rgmii";
+	clock_in_out = "output";
+
+	snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
+	snps,reset-active-low;
+	/* Reset time is 20ms, 100ms for rtl8211f */
+	snps,reset-delays-us = <0 20000 100000>;
+	assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
+	assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>;
+	assigned-clock-rates = <0>, <125000000>;
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&gmac0_miim
+		     &gmac0_tx_bus2
+		     &gmac0_rx_bus2
+		     &gmac0_rgmii_clk
+		     &gmac0_rgmii_bus>;
+
+	tx_delay = <0x3c>;
+	rx_delay = <0x2f>;
+
+	phy-handle = <&rgmii_phy0>;
+	status = "disabled";
+};
+
+&gmac1 {
+	u-boot,dm-pre-reloc;
+	phy-mode = "rgmii";
+	clock_in_out = "output";
+
+	snps,reset-gpio = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>;
+	snps,reset-active-low;
+	/* Reset time is 20ms, 100ms for rtl8211f */
+	snps,reset-delays-us = <0 20000 100000>;
+
+	assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
+	assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>;
+	assigned-clock-rates = <0>, <125000000>;
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&gmac1m1_miim
+		     &gmac1m1_tx_bus2
+		     &gmac1m1_rx_bus2
+		     &gmac1m1_rgmii_clk
+		     &gmac1m1_rgmii_bus>;
+
+	tx_delay = <0x4f>;
+	rx_delay = <0x26>;
+
+	phy-handle = <&rgmii_phy1>;
+	status = "disabled";
+};
+
+&gmac0_stmmac_axi_setup {
+	u-boot,dm-pre-reloc;
+};
+
+&gmac0_mtl_rx_setup {
+	u-boot,dm-pre-reloc;
+	queue0 {
+		u-boot,dm-pre-reloc;
+	};
+};
+
+&gmac0_mtl_tx_setup {
+	u-boot,dm-pre-reloc;
+	queue0 {
+		u-boot,dm-pre-reloc;
+	};
+};
+
+&gmac1_stmmac_axi_setup {
+	u-boot,dm-pre-reloc;
+};
+
+&gmac1_mtl_rx_setup {
+	u-boot,dm-pre-reloc;
+	queue0 {
+		u-boot,dm-pre-reloc;
+	};
+};
+
+&gmac1_mtl_tx_setup {
+	u-boot,dm-pre-reloc;
+	queue0 {
+		u-boot,dm-pre-reloc;
+	};
+};
+
+&mdio0 {
+	u-boot,dm-pre-reloc;
+	rgmii_phy0: phy@0 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		u-boot,dm-pre-reloc;
+		reg = <0x0>;
+	};
+};
+
+&mdio1 {
+	u-boot,dm-pre-reloc;
+	rgmii_phy1: phy@0 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		u-boot,dm-pre-reloc;
+		reg = <0x0>;
+	};
+};
+
+&gmac0_miim {
+	u-boot,dm-pre-reloc;
+};
+
+&gmac0_clkinout {
+	u-boot,dm-pre-reloc;
+};
+
+&gmac0_rx_bus2 {
+	u-boot,dm-pre-reloc;
+};
+
+&gmac0_tx_bus2 {
+	u-boot,dm-pre-reloc;
+};
+
+&gmac0_rgmii_clk {
+	u-boot,dm-pre-reloc;
+};
+
+&gmac0_rgmii_bus {
+	u-boot,dm-pre-reloc;
+};
+
+&gmac1m1_miim {
+	u-boot,dm-pre-reloc;
+};
+
+&gmac1m1_clkinout {
+	u-boot,dm-pre-reloc;
+};
+
+&gmac1m1_rx_bus2 {
+	u-boot,dm-pre-reloc;
+};
+
+&gmac1m1_tx_bus2 {
+	u-boot,dm-pre-reloc;
+};
+
+&gmac1m1_rgmii_clk {
+	u-boot,dm-pre-reloc;
+};
+
+&gmac1m1_rgmii_bus {
+	u-boot,dm-pre-reloc;
+};
+
+&eth0_clkout_pins {
+	u-boot,dm-pre-reloc;
+};
+
+&eth1m1_clkout_pins {
+	u-boot,dm-pre-reloc;
+};
+
+&pinctrl {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&gpio2 {
+	u-boot,dm-pre-reloc;
+};
+
+&pcfg_pull_none_drv_level_1 {
+	u-boot,dm-pre-reloc;
+};
+
+&pcfg_pull_none_drv_level_2 {
+	u-boot,dm-pre-reloc;
+};
+
+&pcfg_pull_none {
+	u-boot,dm-pre-reloc;
+};
+
+&wdt {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&sfc {
+	u-boot,dm-spl;
+	/delete-property/ pinctrl-names;
+	/delete-property/ pinctrl-0;
+	/delete-property/ assigned-clocks;
+	/delete-property/ assigned-clock-rates;
+	status = "okay";
+
+	#address-cells = <1>;
+	#size-cells = <0>;
+	spi_nand: flash@0 {
+		u-boot,dm-spl;
+		compatible = "spi-nand";
+		reg = <0>;
+		spi-tx-bus-width = <1>;
+		spi-rx-bus-width = <4>;
+		spi-max-frequency = <96000000>;
+	};
+};
+
+&saradc {
+	u-boot,dm-spl;
+	status = "okay";
+};

commit 5b4dcfe0cf498cddcdb1a04ca74d5da5a81cf325
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jan 6 15:17:13 2021 +0800

    spi: rockchip_sfc: set clock depended on CONFIG_IS_ENABLED(CLK)
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Icb3662d97eeea8db1e1a62f633f9ba4de9b72dde

diff --git a/drivers/spi/rockchip_sfc.c b/drivers/spi/rockchip_sfc.c
index e5e30dbfc3..3885b42f6a 100644
--- a/drivers/spi/rockchip_sfc.c
+++ b/drivers/spi/rockchip_sfc.c
@@ -146,15 +146,18 @@ struct rockchip_sfc {
 static int rockchip_sfc_ofdata_to_platdata(struct udevice *bus)
 {
 	struct rockchip_sfc_platdata *plat = dev_get_platdata(bus);
+
+	plat->base = dev_read_addr_ptr(bus);
+#if CONFIG_IS_ENABLED(CLK)
 	struct rockchip_sfc *sfc = dev_get_priv(bus);
 	int ret;
 
-	plat->base = dev_read_addr_ptr(bus);
 	ret = clk_get_by_index(bus, 0, &sfc->clk);
 	if (ret < 0) {
 		printf("Could not get clock for %s: %d\n", bus->name, ret);
 		return ret;
 	}
+#endif
 
 	return 0;
 }
@@ -178,8 +181,9 @@ static int rockchip_sfc_probe(struct udevice *bus)
 	sfc->regbase = (struct rockchip_sfc_reg *)plat->base;
 	sfc->max_freq = SFC_MAX_RATE;
 	sfc->speed_hz = SFC_DEFAULT_RATE;
+#if CONFIG_IS_ENABLED(CLK)
 	clk_set_rate(&sfc->clk, sfc->speed_hz);
-
+#endif
 	regs = sfc->regbase;
 	if (rockchip_sfc_get_version(sfc) >= SFC_VER_4) {
 		sfc->max_iosize = SFC_MAX_TRB_VER4;
@@ -658,9 +662,10 @@ static int rockchip_sfc_set_speed(struct udevice *bus, uint speed)
 		speed = sfc->max_freq;
 
 	sfc->speed_hz = speed;
+#if CONFIG_IS_ENABLED(CLK)
 	clk_set_rate(&sfc->clk, sfc->speed_hz);
 	SFC_DBG("%s clk= %ld\n", __func__, clk_get_rate(&sfc->clk));
-
+#endif
 	return 0;
 }
 

commit a0166cc6be15df30787952f9abbc18f796e028bd
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jan 6 09:35:37 2021 +0800

    mtd: Kconfig: add a Kconfig option to enable the support for MTD block write operations
    
    This allows using CONFIG_IS_ENABLED(SPLMTD_WRITE) to compile out code
    needed only if write support is required.
    The option is added for u-boot and for SPL.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ia48169fcd601ad51d1723923ed71d610901275e1

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 0fbd325442..f29424366c 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -482,6 +482,13 @@ config MTD_BLK_U_BOOT_OFFS
 	  Set the offset from the start of the nand,spi nand and nor flash where
 	  u-boot should be loaded from.
 
+config SPL_MTD_WRITE
+	bool "nand & spi nand & spi nor support for write operations in SPL"
+	depends on SPL_MTD_SUPPORT
+	default n
+	help
+	  Enable write access to nand & spi nand & spi nor in SPL
+
 config SPL_MUSB_NEW_SUPPORT
 	bool "Support new Mentor Graphics USB"
 	help
diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig
index 56b6269a45..321f8b2bd5 100644
--- a/drivers/mtd/Kconfig
+++ b/drivers/mtd/Kconfig
@@ -17,6 +17,13 @@ config MTD_BLK
 	help
 	  Enable mtd block model for Memory Technology Devices (MTD).
 
+config MTD_WRITE
+	bool "support for nand & spi nand & spi nor write operations"
+	depends on MTD_BLK
+	default y
+	help
+	  Enable write access to nand & spi nand & spi nor
+
 config MTD_NOR_FLASH
 	bool "Enable parallel NOR flash support"
 	help
diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index e1e3929c42..2ee5b87137 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -486,6 +486,7 @@ ulong mtd_dread(struct udevice *udev, lbaint_t start,
 	}
 }
 
+#if CONFIG_IS_ENABLED(MTD_WRITE)
 ulong mtd_dwrite(struct udevice *udev, lbaint_t start,
 		 lbaint_t blkcnt, const void *src)
 {
@@ -598,6 +599,7 @@ ulong mtd_derase(struct udevice *udev, lbaint_t start,
 
 	return 0;
 }
+#endif
 
 static int mtd_blk_probe(struct udevice *udev)
 {
@@ -648,8 +650,8 @@ static int mtd_blk_probe(struct udevice *udev)
 
 static const struct blk_ops mtd_blk_ops = {
 	.read	= mtd_dread,
+#if CONFIG_IS_ENABLED(MTD_WRITE)
 	.write	= mtd_dwrite,
-#ifndef CONFIG_SPL_BUILD
 	.erase	= mtd_derase,
 #endif
 };

commit 5beee4e82982368bcb9517be2213fb107171fe3d
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Thu Dec 31 14:43:43 2020 +0800

    arch: rockchip: fit misc: fix complie error
    
    arch/arm/mach-rockchip/fit_misc.c:26:12: error: ‘fit_image_check_uncomp_hash
    defined but not used [-Werror=unused-function]
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: If959d9e946351ce41dd1374b4c69f182f5273d39

diff --git a/arch/arm/mach-rockchip/fit_misc.c b/arch/arm/mach-rockchip/fit_misc.c
index 56f11b4626..6a6a27b019 100644
--- a/arch/arm/mach-rockchip/fit_misc.c
+++ b/arch/arm/mach-rockchip/fit_misc.c
@@ -23,6 +23,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #if CONFIG_IS_ENABLED(FIT_IMAGE_POST_PROCESS)
 
 #define FIT_UNCOMP_HASH_NODENAME	"digest"
+#if CONFIG_IS_ENABLED(MISC_DECOMPRESS) || CONFIG_IS_ENABLED(GZIP)
 static int fit_image_check_uncomp_hash(const void *fit, int parent_noffset,
 				       const void *data, size_t size)
 {
@@ -42,7 +43,6 @@ static int fit_image_check_uncomp_hash(const void *fit, int parent_noffset,
 	return 0;
 }
 
-#if CONFIG_IS_ENABLED(MISC_DECOMPRESS) || CONFIG_IS_ENABLED(GZIP)
 static int fit_gunzip_image(void *fit, int node, ulong *load_addr,
 			    ulong **src_addr, size_t *src_len)
 {

commit c7c3548ddfd705446cfe5dfd0541c8725077112c
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Thu Dec 31 14:36:34 2020 +0800

    drivers: Makefile: add block layer while enable rknand
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: I8fc7b3d27e32d767da3597d3d5b7a6aa4a48ca40

diff --git a/drivers/Makefile b/drivers/Makefile
index 15c48e010e..49af8d4f8a 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -60,6 +60,7 @@ obj-$(CONFIG_SPL_MMC_SUPPORT) += block/
 obj-$(CONFIG_SPL_MTD_SUPPORT) += block/
 obj-$(CONFIG_SPL_FPGA_SUPPORT) += fpga/
 obj-$(CONFIG_SPL_RKNAND_SUPPORT) += rknand/
+obj-$(CONFIG_SPL_RKNAND_SUPPORT) += block/
 endif
 endif
 

commit 791045ea0f80ba1bcca19898377c2a04c85444cc
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 29 16:54:19 2020 +0800

    common: android: AVB support lz4 kernel
    
    The key point is to get kernel compression type by:
    bootm_parse_comp((void *)(ulong)hdr + hdr->page_size);
    
    Because if hdr->kernel_address is set as decompress
    address before this comment, android_image_get_kernel_addr()
    would return error kernel offset, result in a wrong
    compression type from android_image_parse_comp().
    
    Tested successfully on RK3568 EVB board:
     - LZ4 Image + AVB full partition load
     - LZ4 Image + AVB separate load
     - LZ4 Image + none-AVB separate load
     - Image + AVB full partition load
     - Image + AVB separate load
     - Image + none-AVB separate load
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ic5385843f036b52eb7a286b7194852accfb52225

diff --git a/common/image-android.c b/common/image-android.c
index d141964672..57d46994a4 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -682,29 +682,12 @@ static ulong android_image_get_comp_addr(struct andr_img_hdr *hdr, int comp)
 	return load_addr;
 }
 
-/*
- * 'boot_android' cmd use "kernel_addr_r" as default load address !
- * We update it according to compress type and "kernel_addr_c/r".
- */
-int android_image_parse_comp(struct andr_img_hdr *hdr, ulong *load_addr)
-{
-	ulong new_load_addr;
-	int comp;
-
-	comp = android_image_parse_kernel_comp(hdr);
-	env_set_ulong("os_comp", comp);
-
-	new_load_addr = android_image_get_comp_addr(hdr, comp);
-	if (new_load_addr != 0)
-		*load_addr = new_load_addr;
-
-	return comp;
-}
-
 void android_image_set_decomp(struct andr_img_hdr *hdr, int comp)
 {
 	ulong kernel_addr_r;
 
+	env_set_ulong("os_comp", comp);
+
 	/* zImage handles decompress itself */
 	if (comp != IH_COMP_NONE && comp != IH_COMP_ZIMAGE) {
 		kernel_addr_r = env_get_ulong("kernel_addr_r", 16, 0x02080000);
@@ -727,23 +710,38 @@ static int android_image_load_separate(struct andr_img_hdr *hdr,
 
 int android_image_memcpy_separate(struct andr_img_hdr *hdr, ulong *load_addr)
 {
-	ulong comp_addr = *load_addr;
+	ulong comp_addr;
 	int comp;
 
-	comp = android_image_parse_comp(hdr, &comp_addr);
-	if (comp_addr == (ulong)hdr)
+	comp = bootm_parse_comp((void *)(ulong)hdr + hdr->page_size);
+	comp_addr = android_image_get_comp_addr(hdr, comp);
+
+	/* non-compressed image: already in-place */
+	if ((ulong)hdr == *load_addr)
 		return 0;
 
+	/* compressed image */
+	if (comp_addr) {
+		*load_addr = comp_addr;
+		if ((ulong)hdr == comp_addr)	/* already in-place */
+			return 0;
+	}
+
+	/*
+	 * The most possible reason to arrive here is:
+	 *
+	 * VBoot=1 and AVB load full partition to a temp memory buffer, now we
+	 * separate(memcpy) subimages from boot.img to where they should be.
+	 */
 	if (hdr->header_version < 3) {
-		if (android_image_separate(hdr, NULL, (void *)comp_addr, hdr))
+		if (android_image_separate(hdr, NULL, (void *)(*load_addr), hdr))
 			return -1;
 	} else {
-		if (android_image_separate_v3(hdr, NULL, (void *)comp_addr, hdr))
+		if (android_image_separate_v3(hdr, NULL, (void *)(*load_addr), hdr))
 			return -1;
 	}
 
-	*load_addr = comp_addr;
-	android_image_set_decomp((void *)comp_addr, comp);
+	android_image_set_decomp((void *)(*load_addr), comp);
 
 	return 0;
 }
@@ -753,6 +751,7 @@ long android_image_load(struct blk_desc *dev_desc,
 			unsigned long load_address,
 			unsigned long max_size) {
 	struct andr_img_hdr *hdr;
+	ulong comp_addr;
 	int comp, ret;
 	int blk_off;
 
@@ -791,11 +790,14 @@ long android_image_load(struct blk_desc *dev_desc,
 		return -1;
 	}
 
-	/* Make kernel start address at load_address */
-	load_address -= hdr->page_size;
+	/* Changed to compressed address ? */
+	comp = bootm_parse_comp((void *)(ulong)hdr + hdr->page_size);
+	comp_addr = android_image_get_comp_addr(hdr, comp);
+	if (comp_addr)
+		load_address = comp_addr;
+	else
+		load_address -= hdr->page_size;
 
-	/* Let's load kernel now ! */
-	comp = android_image_parse_comp(hdr, &load_address);
 	ret = android_image_load_separate(hdr, part_info, (void *)load_address);
 	if (ret) {
 		printf("Failed to load android image\n");

commit 1f5c7b64141e2680c6babc55e09fdbcf7fcd6703
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jan 4 15:40:54 2021 +0800

    spl: fit: support decreasing 1 if verify fail when enable a/b
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I922b929ac37181f61e820b6c2b2de750e816a99d

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index bfcf34e797..f76fc93cc4 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -9,9 +9,10 @@
 #include <boot_rkimg.h>
 #include <errno.h>
 #include <image.h>
-#include <spl.h>
 #include <malloc.h>
 #include <mtd_blk.h>
+#include <spl.h>
+#include <spl_ab.h>
 #include <linux/libfdt.h>
 
 #ifndef CONFIG_SYS_BOOTM_LEN
@@ -790,10 +791,19 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 #ifdef CONFIG_SPL_KERNEL_BOOT
 			ret = spl_load_kernel_fit(spl_image, info);
 #endif
-			return ret;
+			break;
 		}
 	}
-
+#ifdef CONFIG_SPL_AB
+	/*
+	 * If boot fail in spl, spl must decrease 1. If boot
+	 * successfully, it is no need to do that and U-boot will
+	 * always to decrease 1. If in thunderboot process,
+	 * always need to decrease 1.
+	 */
+	if (IS_ENABLED(CONFIG_SPL_KERNEL_BOOT) || ret)
+		spl_ab_decrease_tries(info->dev);
+#endif
 	return ret;
 }
 

commit 093f4d990fa763e87be2a3c6742fd2420b23a84a
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jan 4 15:35:51 2021 +0800

    spl: ab: support decreasing 1 in spl
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ie3bad33476e25bbcbf9d845abc87c6e075671e0c

diff --git a/common/spl/spl_ab.c b/common/spl/spl_ab.c
index 972da2cbb8..31b63f793f 100644
--- a/common/spl/spl_ab.c
+++ b/common/spl/spl_ab.c
@@ -273,3 +273,49 @@ int spl_ab_append_part_slot(struct blk_desc *dev_desc,
 
 	return 0;
 }
+
+static int spl_save_metadata_if_changed(struct blk_desc *dev_desc,
+					AvbABData *ab_data,
+					AvbABData *ab_data_orig)
+{
+	if (safe_memcmp(ab_data, ab_data_orig, sizeof(AvbABData)))
+		return spl_ab_data_write(dev_desc, ab_data, "misc");
+
+	return 0;
+}
+
+/* If verify fail in a/b system, then decrease 1. */
+int spl_ab_decrease_tries(struct blk_desc *dev_desc)
+{
+	AvbABData ab_data, ab_data_orig;
+	size_t slot_index = 0;
+	char slot_suffix[3] = {0};
+	int ret = -1;
+
+	ret = spl_get_current_slot(dev_desc, "misc", slot_suffix);
+	if (ret)
+		goto out;
+
+	if (!strncmp(slot_suffix, "_a", 2))
+		slot_index = 0;
+	else if (!strncmp(slot_suffix, "_b", 2))
+		slot_index = 1;
+	else
+		slot_index = 0;
+
+	ret = spl_ab_data_read(dev_desc, &ab_data, "misc");
+	if (ret)
+		goto out;
+
+	memcpy(&ab_data_orig, &ab_data, sizeof(AvbABData));
+
+	/* ... and decrement tries remaining, if applicable. */
+	if (!ab_data.slots[slot_index].successful_boot &&
+	    ab_data.slots[slot_index].tries_remaining > 0)
+		ab_data.slots[slot_index].tries_remaining -= 1;
+
+	ret = spl_save_metadata_if_changed(dev_desc, &ab_data, &ab_data_orig);
+
+out:
+	return ret;
+}
diff --git a/include/spl_ab.h b/include/spl_ab.h
index fc854787cd..6075555b32 100644
--- a/include/spl_ab.h
+++ b/include/spl_ab.h
@@ -36,4 +36,13 @@ int spl_ab_append_part_slot(struct blk_desc *dev_desc,
 			    const char *part_name,
 			    char *new_name);
 
+/*
+ * spl_ab_decrease_tries
+ *
+ * @dev_desc: block description
+ *
+ * return: 0 success, others fail.
+ */
+int spl_ab_decrease_tries(struct blk_desc *dev_desc);
+
  #endif

commit 153f99a6bf5a9df8cfa84d8b916bde9d3c012f35
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jan 4 11:18:01 2021 +0800

    configs: rk3568: support mmc write in spl
    
    The a/b system info need be stored in spl.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I8296a52ad50a4afa0f4632d589890011c7ff4720

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index adedff94af..aa5776fe82 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -42,6 +42,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
 CONFIG_SPL_SHA256_SUPPORT=y
 CONFIG_SPL_CRYPTO_SUPPORT=y
 CONFIG_SPL_HASH_SUPPORT=y
+CONFIG_SPL_MMC_WRITE=y
 CONFIG_SPL_MTD_SUPPORT=y
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
@@ -178,8 +179,8 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
-CONFIG_DRM_ROCKCHIP_INNO_MIPI_PHY=y
 CONFIG_DRM_ROCKCHIP_DW_HDMI=y
+CONFIG_DRM_ROCKCHIP_INNO_MIPI_PHY=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
 CONFIG_LCD=y

commit 9127fbf440f223256413da7683c210a413f67bc5
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Thu Jan 4 15:23:32 2018 +0100

    UPSTREAM: mmc: add a Kconfig option to enable the support for MMC write operations
    
    This allows using CONFIG_IS_ENABLED(MMC_WRITE) to compile out code
    needed only if write support is required.
    The option is added for u-boot and for SPL
    
    Change-Id: Ibb3836ed8713e491238460783a85ee1808770f66
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    (cherry picked from commit d6400c3f8520bb9a203fe397039279c80f093c27)

diff --git a/cmd/mvebu/bubt.c b/cmd/mvebu/bubt.c
index a1997ac0d3..23fb8cd807 100644
--- a/cmd/mvebu/bubt.c
+++ b/cmd/mvebu/bubt.c
@@ -110,7 +110,7 @@ static ulong get_load_addr(void)
 /********************************************************************
  *     eMMC services
  ********************************************************************/
-#ifdef CONFIG_DM_MMC
+#if CONFIG_IS_ENABLED(DM_MMC) && CONFIG_IS_ENABLED(MMC_WRITE)
 static int mmc_burn_image(size_t image_size)
 {
 	struct mmc	*mmc;
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index cf982b92fe..0fbd325442 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -334,6 +334,7 @@ config SPL_ENV_SUPPORT
 config SPL_SAVEENV
 	bool "Support save environment"
 	depends on SPL_ENV_SUPPORT
+	select SPL_MMC_WRITE if ENV_IS_IN_MMC
 	help
 	  Enable save environment support in SPL after setenv. By default
 	  the saveenv option is not provided in SPL, but some boards need
@@ -448,6 +449,14 @@ config SPL_MMC_SUPPORT
 	  this option to build the drivers in drivers/mmc as part of an SPL
 	  build.
 
+config SPL_MMC_WRITE
+	bool "MMC/SD/SDIO card support for write operations in SPL"
+	depends on SPL_MMC_SUPPORT
+	default n
+	help
+	  Enable write access to MMC and SD Cards in SPL
+
+
 config SPL_MPC8XXX_INIT_DDR_SUPPORT
 	bool "Support MPC8XXX DDR init"
 	help
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 0b3c45af56..551f1af53d 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -10,6 +10,13 @@ config MMC
 	  If you want MMC/SD/SDIO support, you should say Y here and
 	  also to your specific host controller driver.
 
+config MMC_WRITE
+	bool "support for MMC/SD write operations"
+	depends on MMC
+	default y
+	help
+	  Enable write access to MMC and SD Cards
+
 config DM_MMC
 	bool "Enable MMC controllers using Driver Model"
 	depends on DM
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index a6becb2309..6c6bff4c3d 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -7,6 +7,7 @@
 
 obj-y += mmc.o
 obj-$(CONFIG_$(SPL_)DM_MMC) += mmc-uclass.o
+obj-$(CONFIG_$(SPL_)MMC_WRITE) += mmc_write.o
 
 ifndef CONFIG_$(SPL_)BLK
 obj-y += mmc_legacy.o
@@ -16,9 +17,6 @@ obj-$(CONFIG_SUPPORT_EMMC_BOOT) += mmc_boot.o
 
 ifdef CONFIG_SPL_BUILD
 obj-$(CONFIG_SPL_MMC_BOOT) += fsl_esdhc_spl.o
-obj-$(CONFIG_SPL_SAVEENV) += mmc_write.o
-else
-obj-y += mmc_write.o
 endif
 
 obj-$(CONFIG_ARM_PL180_MMCI) += arm_pl180_mmci.o
diff --git a/drivers/mmc/mmc-uclass.c b/drivers/mmc/mmc-uclass.c
index 9548fb98d5..b36e601369 100644
--- a/drivers/mmc/mmc-uclass.c
+++ b/drivers/mmc/mmc-uclass.c
@@ -315,7 +315,7 @@ static int mmc_blk_probe(struct udevice *dev)
 
 static const struct blk_ops mmc_blk_ops = {
 	.read	= mmc_bread,
-#ifndef CONFIG_SPL_BUILD
+#if CONFIG_IS_ENABLED(MMC_WRITE)
 	.write	= mmc_bwrite,
 	.erase	= mmc_berase,
 #endif
diff --git a/drivers/mmc/mmc_private.h b/drivers/mmc/mmc_private.h
index f76e6f8490..0a377d15cc 100644
--- a/drivers/mmc/mmc_private.h
+++ b/drivers/mmc/mmc_private.h
@@ -40,7 +40,7 @@ ulong mmc_bread_prepare(struct blk_desc *block_dev, lbaint_t start, lbaint_t blk
 #endif
 #endif
 
-#if !(defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_SAVEENV))
+#if CONFIG_IS_ENABLED(MMC_WRITE)
 
 #if CONFIG_IS_ENABLED(BLK)
 ulong mmc_bwrite(struct udevice *dev, lbaint_t start, lbaint_t blkcnt,
@@ -52,7 +52,7 @@ ulong mmc_bwrite(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt,
 ulong mmc_berase(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt);
 #endif
 
-#else /* CONFIG_SPL_BUILD and CONFIG_SPL_SAVEENV is not defined */
+#else /* CONFIG_SPL_MMC_WRITE is not defined */
 
 /* declare dummies to reduce code size. */
 

commit e156df4354e0bed6fc45424c9e997a702a1900f5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Dec 31 18:13:41 2020 +0800

    scripts: fit: validate image type of source file
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Id04a4ef397fe19ffac3f09daeea6c5ebc9294dcd

diff --git a/scripts/fit-msg.sh b/scripts/fit-msg.sh
index 941e6f2570..4767feb879 100755
--- a/scripts/fit-msg.sh
+++ b/scripts/fit-msg.sh
@@ -37,6 +37,9 @@ function args_process()
 	if [ ! -f ${IMG} ]; then
 		echo "ERROR: No ${IMG}"
 		exit 1
+	elif ! file ${IMG} | grep 'Device Tree Blob' ; then
+		echo "ERROR: ${IMG} is not FIT image"
+		exit 1
 	fi
 }
 
diff --git a/scripts/fit-repack.sh b/scripts/fit-repack.sh
index 054c295c6c..cc4a9718c2 100755
--- a/scripts/fit-repack.sh
+++ b/scripts/fit-repack.sh
@@ -48,6 +48,9 @@ function fit_repack()
 	if [ ! -f ${IMAGE} ]; then
 		echo "ERROR: No ${IMAGE}"
 		exit 1
+	elif ! file ${IMAGE} | grep 'Device Tree Blob' ; then
+		echo "ERROR: ${IMAGE} is not FIT image"
+		exit 1
 	elif [ ! -d ${DATA} ]; then
 		echo "ERROR: No input directory ${DATA}"
 		exit 1
diff --git a/scripts/fit-resign.sh b/scripts/fit-resign.sh
index 752f6ea8df..44b0582bcf 100755
--- a/scripts/fit-resign.sh
+++ b/scripts/fit-resign.sh
@@ -51,6 +51,9 @@ function fit_resign()
 	if [ ! -f ${ITB} ]; then
 		echo "ERROR: No ${ITB}"
 		exit 1
+	elif ! file ${ITB} | grep 'Device Tree Blob' ; then
+		echo "ERROR: ${ITB} is not FIT image"
+		exit 1
 	elif [ ! -f ${SIG} ]; then
 		echo "ERROR: No ${SIG}"
 		exit 1
diff --git a/scripts/fit-unpack.sh b/scripts/fit-unpack.sh
index e29c314681..43d104c2fe 100755
--- a/scripts/fit-unpack.sh
+++ b/scripts/fit-unpack.sh
@@ -41,6 +41,9 @@ function args_process()
 	if [ ! -f ${ITB} ]; then
 		echo "ERROR: No ${ITB}"
 		exit 1
+	elif ! file ${ITB} | grep 'Device Tree Blob' ; then
+		echo "ERROR: ${ITB} is not FIT image"
+		exit 1
 	fi
 
 	if [ -z ${OUT} ]; then

commit 993c3b78b39df655604a244284ae21d1f44dc552
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Wed Dec 30 17:48:25 2020 +0800

    configs: rv1126-emmc-tb: disable pinctrl for tb
    
    Change-Id: I67932a0c17f8d0f9cab858421ae40965d583a8bd
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/configs/rv1126-emmc-tb.config b/configs/rv1126-emmc-tb.config
index 892c3f452d..3784940a80 100644
--- a/configs/rv1126-emmc-tb.config
+++ b/configs/rv1126-emmc-tb.config
@@ -4,24 +4,25 @@ CONFIG_BASE_DEFCONFIG="rv1126_defconfig"
 # CONFIG_CMD_SF is not set
 # CONFIG_CMD_SPI is not set
 CONFIG_LOADER_INI="RV1126MINIALL_EMMC_TB.ini"
-# CONFIG_MTD_DEVICE is not set
 # CONFIG_MTD is not set
+# CONFIG_MTD_DEVICE is not set
 # CONFIG_MTD_NAND_BBT_USING_FLASH is not set
 # CONFIG_NAND is not set
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 # CONFIG_ROCKCHIP_SFC is not set
 # CONFIG_ROCKCHIP_UIMAGE is not set
 # CONFIG_SPI_FLASH is not set
 # CONFIG_SPI_MEM is not set
 # CONFIG_SPL_AB is not set
-CONFIG_SPL_ADC_KEY=y
 CONFIG_SPL_ADC_SUPPORT=y
 CONFIG_SPL_BLK_READ_PREPARE=y
-# CONFIG_SPL_CROS_EC_KEYB is not set
 CONFIG_SPL_INPUT=y
-CONFIG_SPL_KERNEL_BOOT_SECTOR=0xa000
 CONFIG_SPL_KERNEL_BOOT=y
 # CONFIG_SPL_MTD_SUPPORT is not set
 # CONFIG_SPL_NAND_SUPPORT is not set
+# CONFIG_SPL_PINCTRL is not set
 # CONFIG_SPL_SPI_FLASH_SUPPORT is not set
 # CONFIG_SPL_SPI_SUPPORT is not set
 CONFIG_TRUST_INI="RV1126TOS_TB.ini"
+CONFIG_SPL_ADC_KEY=y
+# CONFIG_SPL_CROS_EC_KEYB is not set

commit 5ead1aa09ac96ac64dd09779114060a41edc5502
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Dec 25 11:28:07 2020 +0800

    rockchip: spl: only allow do reset after dm setup
    
    Without this, there is a dead loop path:
    
    hang() => spl_hang_reset() => do_reset() => failed to reset => hang()!
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I8553bde97bd45ca63e5a12aca1acfc939301b04f

diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index 8c6cf5d752..0e92ee5da2 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -381,8 +381,11 @@ void spl_hang_reset(void)
 {
 	printf("# Reset the board to bootrom #\n");
 #if defined(CONFIG_SPL_SYSRESET) && defined(CONFIG_SPL_DRIVERS_MISC_SUPPORT)
-	writel(BOOT_BROM_DOWNLOAD, CONFIG_ROCKCHIP_BOOT_MODE_REG);
-	do_reset(NULL, 0, 0, NULL);
+	/* reset is available after dm setup */
+	if (gd->flags & GD_FLG_SPL_EARLY_INIT) {
+		writel(BOOT_BROM_DOWNLOAD, CONFIG_ROCKCHIP_BOOT_MODE_REG);
+		do_reset(NULL, 0, 0, NULL);
+	}
 #endif
 }
 

commit 658285c1fb7886da12b18e81a5b61c23bf7b8679
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Thu Dec 10 18:17:43 2020 +0800

    clk: rockchip: rv1126: mux aclk_pdbus according to frequency
    
    Aim to reduce power consumption, cpll should be gated and the clocks
    will mux to non-cpll.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
    Change-Id: If9d1b48cdb237cf38133523a4fc20fa6e87e8e62

diff --git a/drivers/clk/rockchip/clk_rv1126.c b/drivers/clk/rockchip/clk_rv1126.c
index fdbd645dd5..ad3915534c 100644
--- a/drivers/clk/rockchip/clk_rv1126.c
+++ b/drivers/clk/rockchip/clk_rv1126.c
@@ -668,15 +668,21 @@ static ulong rv1126_pdbus_set_clk(struct rv1126_clk_priv *priv, ulong clk_id,
 				  ulong rate)
 {
 	struct rv1126_cru *cru = priv->cru;
-	int src_clk_div;
+	int src_clk_div, clk_sel;
 
 	switch (clk_id) {
 	case ACLK_PDBUS:
-		src_clk_div = DIV_ROUND_UP(priv->cpll_hz, rate);
+		if (CPLL_HZ % rate) {
+			src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);
+			clk_sel = ACLK_PDBUS_SEL_GPLL;
+		} else {
+			src_clk_div = DIV_ROUND_UP(priv->cpll_hz, rate);
+			clk_sel = ACLK_PDBUS_SEL_CPLL;
+		}
 		assert(src_clk_div - 1 <= 31);
 		rk_clrsetreg(&cru->clksel_con[2],
 			     ACLK_PDBUS_SEL_MASK | ACLK_PDBUS_DIV_MASK,
-			     ACLK_PDBUS_SEL_CPLL << ACLK_PDBUS_SEL_SHIFT |
+			     clk_sel << ACLK_PDBUS_SEL_SHIFT |
 			     (src_clk_div - 1) << ACLK_PDBUS_DIV_SHIFT);
 		break;
 	case HCLK_PDBUS:

commit 9db037e4ccb4e831fc5b9aea7db2f4dd203c60ac
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Tue Dec 29 11:45:15 2020 +0800

    configs: rk3568: Enable hdmi config for rk3568
    
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
    Change-Id: I08edf492932839bcc59093e231b5356c1983dc31

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index b37773974f..adedff94af 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -179,6 +179,7 @@ CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_INNO_MIPI_PHY=y
+CONFIG_DRM_ROCKCHIP_DW_HDMI=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
 CONFIG_LCD=y

commit 5ccad8f6bf9b847609a3e100dd2534f7c2c22b84
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Tue Dec 29 09:29:36 2020 +0800

    drm/rockchip: hdmi: Support RK3568 dw-hdmi
    
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
    Change-Id: I3c9275a44c519c3927ea7199147a738d4c2a1334

diff --git a/drivers/video/drm/dw_hdmi.c b/drivers/video/drm/dw_hdmi.c
index e7a77a0372..03d18cdb21 100644
--- a/drivers/video/drm/dw_hdmi.c
+++ b/drivers/video/drm/dw_hdmi.c
@@ -772,9 +772,6 @@ int hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi *hdmi,
 	dw_hdmi_phy_i2c_write(hdmi, phy_config->vlev_ctr,
 			      HDMI_3D_TX_PHY_VLEVCTRL);
 
-	/* Override and disable clock termination. */
-	dw_hdmi_phy_i2c_write(hdmi, HDMI_3D_TX_PHY_CKCALCTRL_OVERRIDE,
-			      HDMI_3D_TX_PHY_CKCALCTRL);
 	return 0;
 }
 
@@ -1525,12 +1522,6 @@ static void hdmi_video_sample(struct dw_hdmi *hdmi)
 	hdmi_writeb(hdmi, 0x0, HDMI_TX_BCBDATA1);
 }
 
-static void hdmi_enable_overflow_interrupts(struct dw_hdmi *hdmi)
-{
-	hdmi_writeb(hdmi, 0, HDMI_FC_MASK2);
-	hdmi_writeb(hdmi, 0, HDMI_IH_MUTE_FC_STAT2);
-}
-
 static void dw_hdmi_disable(struct dw_hdmi *hdmi, struct display_state *state)
 {
 	if (hdmi->phy.enabled) {
@@ -2048,10 +2039,10 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi,
 	if (hdmi->plat_data->get_enc_out_encoding)
 		hdmi->hdmi_data.enc_out_encoding =
 			hdmi->plat_data->get_enc_out_encoding(data);
-	else if ((hdmi->vic == 6) || (hdmi->vic == 7) ||
-		 (hdmi->vic == 21) || (hdmi->vic == 22) ||
-		 (hdmi->vic == 2) || (hdmi->vic == 3) ||
-		 (hdmi->vic == 17) || (hdmi->vic == 18))
+	else if (hdmi->vic == 6 || hdmi->vic == 7 ||
+		 hdmi->vic == 21 || hdmi->vic == 22 ||
+		 hdmi->vic == 2 || hdmi->vic == 3 ||
+		 hdmi->vic == 17 || hdmi->vic == 18)
 		hdmi->hdmi_data.enc_out_encoding = V4L2_YCBCR_ENC_601;
 	else
 		hdmi->hdmi_data.enc_out_encoding = V4L2_YCBCR_ENC_709;
@@ -2129,8 +2120,6 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi,
 	hdmi_video_sample(hdmi);
 	hdmi_tx_hdcp_config(hdmi, mode);
 	dw_hdmi_clear_overflow(hdmi);
-	if (hdmi->cable_plugin && hdmi->sink_is_hdmi)
-		hdmi_enable_overflow_interrupts(hdmi);
 
 	return 0;
 }
@@ -2163,6 +2152,9 @@ static int dw_hdmi_set_reg_wr(struct dw_hdmi *hdmi)
 static void initialize_hdmi_mutes(struct dw_hdmi *hdmi)
 {
 	/*mute unnecessary interrupt, only enable hpd */
+	hdmi_writeb(hdmi, 0xff, HDMI_FC_MASK0);
+	hdmi_writeb(hdmi, 0xff, HDMI_FC_MASK1);
+	hdmi_writeb(hdmi, 0xff, HDMI_FC_MASK2);
 	hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_FC_STAT0);
 	hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_FC_STAT1);
 	hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_FC_STAT2);
@@ -2338,6 +2330,7 @@ int rockchip_dw_hdmi_init(struct display_state *state)
 
 	dw_hdmi_i2c_init(hdmi);
 	conn_state->type = DRM_MODE_CONNECTOR_HDMIA;
+	conn_state->output_if |= VOP_OUTPUT_IF_HDMI0;
 	conn_state->output_mode = ROCKCHIP_OUT_MODE_AAAA;
 
 	hdmi->dev_type = pdata->dev_type;
@@ -2405,6 +2398,7 @@ int rockchip_dw_hdmi_get_timing(struct display_state *state)
 	struct dw_hdmi *hdmi = conn_state->private;
 	struct edid *edid = (struct edid *)conn_state->edid;
 	unsigned int bus_format;
+	unsigned long enc_out_encoding;
 	struct overscan *overscan = &conn_state->overscan;
 	const u8 def_modes_vic[6] = {4, 16, 2, 17, 31, 19};
 
@@ -2412,6 +2406,7 @@ int rockchip_dw_hdmi_get_timing(struct display_state *state)
 		return -EFAULT;
 
 	ret = drm_do_get_edid(&hdmi->adap, conn_state->edid);
+
 	if (!ret) {
 		hdmi->sink_is_hdmi =
 			drm_detect_hdmi_monitor(edid);
@@ -2469,6 +2464,23 @@ int rockchip_dw_hdmi_get_timing(struct display_state *state)
 		break;
 	}
 
+	if (hdmi->vic == 6 || hdmi->vic == 7 || hdmi->vic == 21 ||
+	    hdmi->vic == 22 || hdmi->vic == 2 || hdmi->vic == 3 ||
+	    hdmi->vic == 17 || hdmi->vic == 18)
+		enc_out_encoding = V4L2_YCBCR_ENC_601;
+	else
+		enc_out_encoding = V4L2_YCBCR_ENC_709;
+
+	if (enc_out_encoding == V4L2_YCBCR_ENC_BT2020)
+		conn_state->color_space = V4L2_COLORSPACE_BT2020;
+	else if (bus_format == MEDIA_BUS_FMT_RGB888_1X24 ||
+		 bus_format == MEDIA_BUS_FMT_RGB101010_1X30)
+		conn_state->color_space = V4L2_COLORSPACE_DEFAULT;
+	else if (enc_out_encoding == V4L2_YCBCR_ENC_709)
+		conn_state->color_space = V4L2_COLORSPACE_REC709;
+	else
+		conn_state->color_space = V4L2_COLORSPACE_SMPTE170M;
+
 	return 0;
 }
 
diff --git a/drivers/video/drm/rockchip_dw_hdmi.c b/drivers/video/drm/rockchip_dw_hdmi.c
index c856b61773..0de1c8a7ed 100644
--- a/drivers/video/drm/rockchip_dw_hdmi.c
+++ b/drivers/video/drm/rockchip_dw_hdmi.c
@@ -35,6 +35,10 @@
 #define RK3328_GRF_SOC_CON3              0x040c
 #define RK3328_GRF_SOC_CON4              0x0410
 
+#define RK3568_GRF_VO_CON1               0x0364
+#define RK3568_HDMI_SDAIN_MSK            ((1 << 15) | (1 << (15 + 16)))
+#define RK3568_HDMI_SCLIN_MSK            ((1 << 14) | (1 << (14 + 16)))
+
 static const struct dw_hdmi_mpll_config rockchip_mpll_cfg[] = {
 	{
 		30666000, {
@@ -178,6 +182,7 @@ static const struct dw_hdmi_phy_config rockchip_phy_config[] = {
 	{ 165000000, 0x802b, 0x0004, 0x0209},
 	{ 297000000, 0x8039, 0x0005, 0x028d},
 	{ 594000000, 0x8039, 0x0000, 0x019d},
+	{ ~0UL,	     0x0000, 0x0000, 0x0000},
 	{ ~0UL,	     0x0000, 0x0000, 0x0000}
 };
 
@@ -423,6 +428,10 @@ void dw_hdmi_set_iomux(void *grf, int dev_type)
 		writel(RK3228_IO_3V_DOMAIN, grf + RK3228_GRF_SOC_CON6);
 		writel(RK3228_IO_DDC_IN_MSK, grf + RK3228_GRF_SOC_CON2);
 		break;
+	case RK3568_HDMI:
+		writel(RK3568_HDMI_SDAIN_MSK | RK3568_HDMI_SCLIN_MSK,
+		       grf + RK3568_GRF_VO_CON1);
+		break;
 	default:
 		break;
 	}
@@ -489,11 +498,26 @@ const struct dw_hdmi_plat_data rk3399_hdmi_drv_data = {
 	.dev_type   = RK3399_HDMI,
 };
 
+const struct dw_hdmi_plat_data rk3568_hdmi_drv_data = {
+	.vop_sel_bit = 0,
+	.grf_vop_sel_reg = 0,
+	.mpll_cfg   = rockchip_mpll_cfg,
+	.cur_ctr    = rockchip_cur_ctr,
+	.phy_config = rockchip_phy_config,
+	.mpll_cfg_420 = rockchip_mpll_cfg_420,
+	.dev_type   = RK3568_HDMI,
+};
+
 static int rockchip_dw_hdmi_probe(struct udevice *dev)
 {
 	return 0;
 }
 
+static const struct rockchip_connector rk3568_dw_hdmi_data = {
+	.funcs = &rockchip_dw_hdmi_funcs,
+	.data = &rk3568_hdmi_drv_data,
+};
+
 static const struct rockchip_connector rk3399_dw_hdmi_data = {
 	.funcs = &rockchip_dw_hdmi_funcs,
 	.data = &rk3399_hdmi_drv_data,
@@ -521,6 +545,9 @@ static const struct rockchip_connector rk3228_dw_hdmi_data = {
 
 static const struct udevice_id rockchip_dw_hdmi_ids[] = {
 	{
+	 .compatible = "rockchip,rk3568-dw-hdmi",
+	 .data = (ulong)&rk3568_dw_hdmi_data,
+	}, {
 	 .compatible = "rockchip,rk3399-dw-hdmi",
 	 .data = (ulong)&rk3399_dw_hdmi_data,
 	}, {
diff --git a/include/linux/dw_hdmi.h b/include/linux/dw_hdmi.h
index 6a9f473741..974a4f837c 100644
--- a/include/linux/dw_hdmi.h
+++ b/include/linux/dw_hdmi.h
@@ -92,6 +92,7 @@ enum dw_hdmi_devtype {
 	RK3366_HDMI,
 	RK3368_HDMI,
 	RK3399_HDMI,
+	RK3568_HDMI,
 };
 
 struct dw_hdmi_audio_tmds_n {

commit 10ee9f5b5105b0cc26a0c6f41b46e13cfba88f8e
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Tue Dec 29 11:33:39 2020 +0800

    drm/rockchip: vop2: Add support for hdmi
    
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
    Change-Id: I6043fad382c48670c765bce67a3f291a0fc66bd5

diff --git a/drivers/video/drm/rockchip_vop2.c b/drivers/video/drm/rockchip_vop2.c
index 66cbaddb3a..dd529b1ae5 100644
--- a/drivers/video/drm/rockchip_vop2.c
+++ b/drivers/video/drm/rockchip_vop2.c
@@ -62,6 +62,8 @@
 #define IF_CRTL_MIPI_DCLK_POL_SHIT		19
 #define IF_CRTL_EDP_DCLK_POL_SHIT		15
 #define IF_CRTL_HDMI_DCLK_POL_SHIT		7
+#define IF_CRTL_HDMI_PIN_POL_MASK		0x7
+#define IF_CRTL_HDMI_PIN_POL_SHIT		4
 #define IF_CRTL_RGB_LVDS_DCLK_POL_SHIT		3
 #define RK3568_VP0_LINE_FLAG			0x70
 #define RK3568_VP1_LINE_FLAG			0x74
@@ -86,14 +88,20 @@
 #define RK3568_VP0_DSP_CTRL				0xC00
 #define OUT_MODE_MASK					0xf
 #define OUT_MODE_SHIFT					0
-#define DCLK_DIV2_EN_SHIFT				4
+#define DATA_SWAP_MASK					0x1f
+#define DATA_SWAP_SHIFT					8
+#define DSP_RB_SWAP					2
+#define CORE_DCLK_DIV_EN_SHIFT				4
 #define P2I_EN_SHIFT					5
 #define INTERLACE_EN_SHIFT				7
+#define POST_DSP_OUT_R2Y_SHIFT				15
 #define PRE_DITHER_DOWN_EN_SHIFT			16
 #define DITHER_DOWN_EN_SHIFT				17
 #define STANDBY_EN_SHIFT				31
 
 #define RK3568_VP0_MIPI_CTRL				0xC04
+#define DCLK_DIV2_SHIFT					4
+#define DCLK_DIV2_MASK					0x3
 #define MIPI_DUAL_EN_SHIFT				20
 #define MIPI_DUAL_SWAP_EN_SHIFT				21
 
@@ -253,10 +261,14 @@
 
 /* Esmart register definition */
 #define RK3568_ESMART0_CTRL0			0x1800
+#define RGB2YUV_EN_SHIFT			1
+#define CSC_MODE_SHIFT				2
+#define CSC_MODE_MASK				0x3
 
 #define RK3568_ESMART0_CTRL1			0x1804
 #define YMIRROR_EN_SHIFT			31
 #define RK3568_ESMART0_REGION0_CTRL		0x1810
+#define REGION0_RB_SWAP_SHIFT			14
 #define WIN_EN_SHIFT				0
 #define WIN_FORMAT_MASK				0x1f
 #define WIN_FORMAT_SHIFT			1
@@ -451,6 +463,20 @@
 #define VOP2_LAYER_MAX				8
 #define VOP2_MAX_VP				4
 
+enum vop2_csc_format {
+	CSC_BT601L,
+	CSC_BT709L,
+	CSC_BT601F,
+	CSC_BT2020,
+};
+
+enum vop2_pol {
+	HSYNC_POSITIVE = 0,
+	VSYNC_POSITIVE = 1,
+	DEN_NEGATIVE   = 2,
+	DCLK_INVERT    = 3
+};
+
 #define _VOP_REG(off, _mask, _shift, _write_mask) \
 		{ \
 		 .offset = off, \
@@ -596,6 +622,26 @@ static bool is_yuv_output(uint32_t bus_format)
 	}
 }
 
+static int vop2_convert_csc_mode(int csc_mode)
+{
+	switch (csc_mode) {
+	case V4L2_COLORSPACE_SMPTE170M:
+	case V4L2_COLORSPACE_470_SYSTEM_M:
+	case V4L2_COLORSPACE_470_SYSTEM_BG:
+		return CSC_BT601L;
+	case V4L2_COLORSPACE_REC709:
+	case V4L2_COLORSPACE_SMPTE240M:
+	case V4L2_COLORSPACE_DEFAULT:
+		return CSC_BT709L;
+	case V4L2_COLORSPACE_JPEG:
+		return CSC_BT601F;
+	case V4L2_COLORSPACE_BT2020:
+		return CSC_BT2020;
+	default:
+		return CSC_BT709L;
+	}
+}
+
 static __maybe_unused bool is_uv_swap(uint32_t bus_format, uint32_t output_mode)
 {
 	/*
@@ -817,6 +863,8 @@ static int rockchip_vop2_init(struct display_state *state)
 	vop2_initial(vop2, state);
 
 	dclk_inv = (mode->flags & DRM_MODE_FLAG_PPIXDATA) ? 0 : 1;
+	val = (mode->flags & DRM_MODE_FLAG_NHSYNC) ? 0 : BIT(HSYNC_POSITIVE);
+	val |= (mode->flags & DRM_MODE_FLAG_NVSYNC) ? 0 : BIT(VSYNC_POSITIVE);
 
 	if (conn_state->output_if & VOP_OUTPUT_IF_RGB) {
 		vop2_mask_write(vop2, RK3568_DSP_IF_EN, EN_MASK, RGB_EN_SHIFT,
@@ -913,7 +961,22 @@ static int rockchip_vop2_init(struct display_state *state)
 				1, false);
 		vop2_mask_write(vop2, RK3568_DSP_IF_EN, IF_MUX_MASK,
 				HDMI0_MUX_SHIFT, cstate->crtc_id, false);
+		vop2_mask_write(vop2, RK3568_DSP_IF_POL, EN_MASK,
+				IF_CRTL_HDMI_DCLK_POL_SHIT, 1, false);
+		vop2_mask_write(vop2, RK3568_DSP_IF_POL,
+				IF_CRTL_HDMI_PIN_POL_MASK,
+				IF_CRTL_HDMI_PIN_POL_SHIT, val, false);
 	}
+
+	if (is_uv_swap(conn_state->bus_format, conn_state->output_mode))
+		vop2_mask_write(vop2, RK3568_VP0_DSP_CTRL + vp_offset,
+				DATA_SWAP_MASK, DATA_SWAP_SHIFT, DSP_RB_SWAP,
+				false);
+	else
+		vop2_mask_write(vop2, RK3568_VP0_DSP_CTRL + vp_offset,
+				DATA_SWAP_MASK, DATA_SWAP_SHIFT, 0,
+				false);
+
 	vop2_mask_write(vop2, RK3568_VP0_DSP_CTRL + vp_offset, OUT_MODE_MASK,
 			OUT_MODE_SHIFT, conn_state->output_mode, false);
 
@@ -991,7 +1054,23 @@ static int rockchip_vop2_init(struct display_state *state)
 		    (vtotal << 16) | vsync_len);
 	val = ! !(mode->flags & DRM_MODE_FLAG_DBLCLK);
 	vop2_mask_write(vop2, RK3568_VP0_DSP_CTRL + vp_offset, EN_MASK,
-			DCLK_DIV2_EN_SHIFT, val, false);
+			CORE_DCLK_DIV_EN_SHIFT, val, false);
+
+	if (conn_state->output_mode == ROCKCHIP_OUT_MODE_YUV420)
+		vop2_mask_write(vop2, RK3568_VP0_MIPI_CTRL + vp_offset, DCLK_DIV2_MASK,
+				DCLK_DIV2_SHIFT, 0x3, false);
+	else
+		vop2_mask_write(vop2, RK3568_VP0_MIPI_CTRL + vp_offset, DCLK_DIV2_MASK,
+				DCLK_DIV2_SHIFT, 0, false);
+
+	if (yuv_overlay)
+		val = 0x20010200;
+	else
+		val = 0;
+	vop2_writel(vop2, RK3568_VP0_DSP_BG + vp_offset, val);
+
+	vop2_mask_write(vop2, RK3568_VP0_DSP_CTRL + vp_offset, EN_MASK,
+			POST_DSP_OUT_R2Y_SHIFT, yuv_overlay, false);
 
 	vop2_post_config(state, vop2);
 	vop2_setup_win_for_vp(state);
@@ -1073,6 +1152,7 @@ static int rockchip_vop2_set_plane(struct display_state *state)
 	int crtc_h = cstate->crtc_h;
 	int xvir = cstate->xvir;
 	int y_mirror = 0;
+	int csc_mode;
 	uint32_t win_offset = cstate->crtc_id * 0x200;
 	uint32_t cfg_done = CFG_DONE_EN | BIT(cstate->crtc_id);
 
@@ -1118,6 +1198,13 @@ static int rockchip_vop2_set_plane(struct display_state *state)
 	vop2_mask_write(vop2, RK3568_ESMART0_REGION0_CTRL + win_offset, EN_MASK,
 			WIN_EN_SHIFT, 1, false);
 
+	csc_mode = vop2_convert_csc_mode(conn_state->color_space);
+	vop2_mask_write(vop2, RK3568_ESMART0_CTRL0 + win_offset, EN_MASK,
+			RGB2YUV_EN_SHIFT,
+			is_yuv_output(conn_state->bus_format), false);
+	vop2_mask_write(vop2, RK3568_ESMART0_CTRL0 + win_offset, CSC_MODE_MASK,
+			CSC_MODE_SHIFT, csc_mode, false);
+
 	vop2_writel(vop2, RK3568_REG_CFG_DONE, cfg_done);
 	return 0;
 }

commit 1d22de7f19c7dbc24915ea41f28c37b9224493d1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Dec 25 11:14:34 2020 +0800

    rockchip: rv1126: rename periph device region
    
    Adding to whitelist.txt:
            CONFIG_PERIPH_DEVICE_START_ADDR
            CONFIG_PERIPH_DEVICE_END_ADDR
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ia07a467489e52b7580351829768437dc67e71833

diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c
index cd26ffcd5d..cd962effdd 100644
--- a/arch/arm/lib/cache-cp15.c
+++ b/arch/arm/lib/cache-cp15.c
@@ -122,9 +122,9 @@ static inline void mmu_setup(void)
 	 * only map periph device region to save boot time.
 	 */
 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_KERNEL_BOOT) && \
-    defined(PERIPH_DEVICE_START_ADDR)
-	i = PERIPH_DEVICE_START_ADDR >> MMU_SECTION_SHIFT;
-	end = PERIPH_DEVICE_END_ADDR >> MMU_SECTION_SHIFT;
+    defined(CONFIG_PERIPH_DEVICE_START_ADDR)
+	i = CONFIG_PERIPH_DEVICE_START_ADDR >> MMU_SECTION_SHIFT;
+	end = CONFIG_PERIPH_DEVICE_END_ADDR >> MMU_SECTION_SHIFT;
 #else
 	i = 0;
 	end = (4096ULL * 1024 * 1024) >> MMU_SECTION_SHIFT;
diff --git a/include/configs/rv1126_common.h b/include/configs/rv1126_common.h
index 12fb3bb93a..6efba7bfbe 100644
--- a/include/configs/rv1126_common.h
+++ b/include/configs/rv1126_common.h
@@ -59,8 +59,8 @@
 #define CONFIG_SYS_SDRAM_BASE		0
 #define SDRAM_MAX_SIZE			0xfd000000
 
-#define PERIPH_DEVICE_START_ADDR	(CONFIG_SYS_SDRAM_BASE + SDRAM_MAX_SIZE)
-#define PERIPH_DEVICE_END_ADDR		SZ_4G
+#define CONFIG_PERIPH_DEVICE_START_ADDR	(CONFIG_SYS_SDRAM_BASE + SDRAM_MAX_SIZE)
+#define CONFIG_PERIPH_DEVICE_END_ADDR	SZ_4G
 
 #define CONFIG_SYS_NONCACHED_MEMORY    (1 << 20)       /* 1 MiB */
 #ifndef CONFIG_SPL_BUILD
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index da9096a402..25e82db3e3 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -1673,6 +1673,8 @@ CONFIG_PERIF1_FREQ
 CONFIG_PERIF2_FREQ
 CONFIG_PERIF3_FREQ
 CONFIG_PERIF4_FREQ
+CONFIG_PERIPH_DEVICE_END_ADDR
+CONFIG_PERIPH_DEVICE_START_ADDR
 CONFIG_PHYSMEM
 CONFIG_PHY_ADDR
 CONFIG_PHY_BASE_ADR

commit 173e789e96349f03e20e6944b5de1f63e1e519e2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 16 18:18:12 2020 +0800

    make/fit.sh: support replace components of uboot.img
    
    args: --uboot [bin] --fdt [bin] --tee [bin] --mcu [bin] --bl31 [elf]
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I4453cd48d352592fb232b67c5f70d04845d00545

diff --git a/make.sh b/make.sh
index d9c010d097..4320db3f89 100755
--- a/make.sh
+++ b/make.sh
@@ -105,6 +105,7 @@ SCRIPT_SPL="${SRCTREE}/scripts/spl.sh"
 SCRIPT_UBOOT="${SRCTREE}/scripts/uboot.sh"
 SCRIPT_LOADER="${SRCTREE}/scripts/loader.sh"
 
+REP_DIR="./rep"
 #########################################################################################################
 function help()
 {
@@ -228,6 +229,29 @@ function process_args()
 				ARG_SPL_BIN="spl/u-boot-spl.bin"
 				shift 1
 				;;
+			--uboot|--fdt|--optee|--mcu|--bl31) # uboot.img components
+				mkdir -p ${REP_DIR}
+				if [ ! -f $2 ]; then
+					echo "ERROR: No $2"
+					exit 1
+				fi
+				if [ "$1" == "--uboot" ]; then
+					cp $2 ${REP_DIR}/u-boot-nodtb.bin
+				elif [ "$1" == "--fdt" ]; then
+					cp $2 ${REP_DIR}/u-boot.dtb
+				elif [ "$1" == "--optee" ]; then
+					cp $2 ${REP_DIR}/tee.bin
+				elif [ "$1" == "--mcu" ]; then
+					cp $2 ${REP_DIR}/mcu.bin
+				elif [ "$1" == "--bl31" ]; then
+					if ! file $2 | grep 'ELF ' >/dev/null 2>&1 ; then
+						echo "ERROR: $2 is not a bl31.elf file"
+						exit 1
+					fi
+					cp $2 ${REP_DIR}/bl31.elf
+				fi
+				shift 2
+				;;
 			*)
 				#1. FIT scripts args
 				NUM=$(${SCRIPT_FIT} --args $1)
@@ -637,6 +661,10 @@ function pack_uboot_itb_image()
 		COMPRESSION_ARG="-c ${COMPRESSION}"
 	fi
 
+	if [ -d ${REP_DIR} ]; then
+		mv ${REP_DIR}/* ./
+	fi
+
 	SPL_FIT_SOURCE=`sed -n "/CONFIG_SPL_FIT_SOURCE=/s/CONFIG_SPL_FIT_SOURCE=//p" .config | tr -d '""'`
 	if [ ! -z ${SPL_FIT_SOURCE} ]; then
 		cp ${SPL_FIT_SOURCE} u-boot.its
@@ -735,6 +763,7 @@ function pack_fit_image()
 		fi
 	fi
 
+	rm ${REP_DIR} -rf
 	echo "pack uboot.img okay! Input: ${INI_TRUST}"
 }
 

commit 2708ed29a491310b96f002bf49636a679af11c4f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 30 17:33:26 2020 +0800

    rockchip: fit: update gunzip() max image size to 2MB
    
    RK3568 U-Boot is over 1MB size.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ibe2000e4472c57c8d91b38b1fc2ce3d23c27a3db

diff --git a/arch/arm/mach-rockchip/fit_misc.c b/arch/arm/mach-rockchip/fit_misc.c
index 48301ebfb9..56f11b4626 100644
--- a/arch/arm/mach-rockchip/fit_misc.c
+++ b/arch/arm/mach-rockchip/fit_misc.c
@@ -73,7 +73,7 @@ static int fit_gunzip_image(void *fit, int node, ulong *load_addr,
 				      (ulong)(*src_addr), (ulong)(*src_len),
 				      DECOM_GZIP, false, &len);
 #else
-	ret = gunzip((void *)(*load_addr), ALIGN(len, SZ_1M),
+	ret = gunzip((void *)(*load_addr), ALIGN(len, FIT_MAX_SPL_IMAGE_SZ),
 		     (void *)(*src_addr), (void *)(&len));
 #endif
 	if (ret) {

commit 3e9875cd72672e5717df5ad1a73d9a2a44792306
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 30 16:58:11 2020 +0800

    spl: fit: assume the max size of U-Boot/tee/atf is 2MB
    
    RK3568 U-Boot is over 1MB size.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I743cf403ddfb63d9452a2d6781d99ebdd5313e9c

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 1ad65006f4..bfcf34e797 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -196,9 +196,9 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 		load_addr = image_info->load_addr;
 
 	if (image_comp != IH_COMP_NONE && image_comp != IH_COMP_ZIMAGE) {
-		/* Empirically, 1MB is enough for U-Boot, tee and atf */
+		/* Empirically, 2MB is enough for U-Boot, tee and atf */
 		if (fit_image_get_comp_addr(fit, node, &comp_addr))
-			comp_addr = load_addr + SZ_1M;
+			comp_addr = load_addr + FIT_MAX_SPL_IMAGE_SZ;
 	} else {
 		comp_addr = load_addr;
 	}
diff --git a/include/image.h b/include/image.h
index 93a3344e7c..de1b5cbf04 100644
--- a/include/image.h
+++ b/include/image.h
@@ -948,6 +948,7 @@ int bootz_setup(ulong image, ulong *start, ulong *end);
 #define FIT_STANDALONE_PROP	"standalone"
 
 #define FIT_MAX_HASH_LEN	HASH_MAX_DIGEST_SIZE
+#define FIT_MAX_SPL_IMAGE_SZ	SZ_2M
 
 #if IMAGE_ENABLE_FIT
 

commit ac6373ccc82ef2161cb93b163bcc274dacf05711
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 30 16:55:03 2020 +0800

    configs: rk3568: enable optee-client v2
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ib5eaf36b07bfb88a140669e9755eb5e0a120e83c

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index ac85de6882..b37773974f 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -29,7 +29,9 @@ CONFIG_BOOTDELAY=0
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
+# CONFIG_ANDROID_WRITE_KEYBOX is not set
 CONFIG_ANDROID_AVB=y
+# CONFIG_ANDROID_KEYMASTER_CA is not set
 CONFIG_ANDROID_BOOT_IMAGE_HASH=y
 CONFIG_SPL_BOARD_INIT=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
@@ -201,3 +203,5 @@ CONFIG_AVB_LIBAVB_AB=y
 CONFIG_AVB_LIBAVB_ATX=y
 CONFIG_AVB_LIBAVB_USER=y
 CONFIG_RK_AVB_LIBAVB_USER=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V2=y

commit f62abd3813ab858703678f46f8514c85e5389c57
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 29 19:28:03 2020 +0800

    configs: rk3568: enable android image hash verify
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ib4291c46e46c2d1edffa0338d18f1cc0dae65008

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index e3d4adec8f..ac85de6882 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -30,6 +30,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_ANDROID_AVB=y
+CONFIG_ANDROID_BOOT_IMAGE_HASH=y
 CONFIG_SPL_BOARD_INIT=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set

commit b800cd5a0c3f6f9602c5e4cee5cdcabc60025200
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 29 19:03:49 2020 +0800

    Revert "scripts: fit.sh: remove unused property but not initial as 0"
    
    This reverts commit f269c7e952a4c0e2ab4c185d34d2479944c4e33b.
    
    Reason: It breaks software RSA verify.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I2dd1676d57c3860f3d278ef61935c9e77435a30e

diff --git a/scripts/fit.sh b/scripts/fit.sh
index cd541c2b93..6ba4cc802b 100755
--- a/scripts/fit.sh
+++ b/scripts/fit.sh
@@ -279,16 +279,16 @@ function fit_gen_uboot_itb()
 		if grep -q '^CONFIG_SPL_FIT_HW_CRYPTO=y' .config ; then
 			fdtput -tx ${SPL_DTB} ${SIGNATURE_KEY_NODE} rsa,r-squared 0x0
 			if grep -q '^CONFIG_SPL_ROCKCHIP_CRYPTO_V1=y' .config ; then
-				fdtput -d ${SPL_DTB} ${SIGNATURE_KEY_NODE} rsa,np
+				fdtput -tx ${SPL_DTB} ${SIGNATURE_KEY_NODE} rsa,np 0x0
 				fdtput -r ${SPL_DTB} ${SIGNATURE_KEY_NODE}/hash@np
 			else
-				fdtput -d ${SPL_DTB} ${SIGNATURE_KEY_NODE} rsa,c
+				fdtput -tx ${SPL_DTB} ${SIGNATURE_KEY_NODE} rsa,c 0x0
 				fdtput -r ${SPL_DTB} ${SIGNATURE_KEY_NODE}/hash@c
 			fi
 		else
-			fdtput -d ${SPL_DTB} ${SIGNATURE_KEY_NODE} rsa,c
-			fdtput -d ${SPL_DTB} ${SIGNATURE_KEY_NODE} rsa,np
-			fdtput -d ${SPL_DTB} ${SIGNATURE_KEY_NODE} rsa,exponent-BN
+			fdtput -tx ${SPL_DTB} ${SIGNATURE_KEY_NODE} rsa,c 0x0
+			fdtput -tx ${SPL_DTB} ${SIGNATURE_KEY_NODE} rsa,np 0x0
+			fdtput -tx ${SPL_DTB} ${SIGNATURE_KEY_NODE} rsa,exponent-BN 0x0
 			fdtput -r ${SPL_DTB} ${SIGNATURE_KEY_NODE}/hash@c
 			fdtput -r ${SPL_DTB} ${SIGNATURE_KEY_NODE}/hash@np
 		fi
@@ -392,14 +392,14 @@ function fit_gen_boot_itb()
 		if grep -q '^CONFIG_FIT_HW_CRYPTO=y' .config ; then
 			fdtput -tx ${UBOOT_DTB} ${SIGNATURE_KEY_NODE} rsa,r-squared 0x0
 			if grep -q '^CONFIG_ROCKCHIP_CRYPTO_V1=y' .config ; then
-				fdtput -d ${UBOOT_DTB} ${SIGNATURE_KEY_NODE} rsa,np
+				fdtput -tx ${UBOOT_DTB} ${SIGNATURE_KEY_NODE} rsa,np 0x0
 			else
-				fdtput -d ${UBOOT_DTB} ${SIGNATURE_KEY_NODE} rsa,c
+				fdtput -tx ${UBOOT_DTB} ${SIGNATURE_KEY_NODE} rsa,c 0x0
 			fi
 		else
-			fdtput -d ${UBOOT_DTB} ${SIGNATURE_KEY_NODE} rsa,c
-			fdtput -d ${UBOOT_DTB} ${SIGNATURE_KEY_NODE} rsa,np
-			fdtput -d ${UBOOT_DTB} ${SIGNATURE_KEY_NODE} rsa,exponent-BN
+			fdtput -tx ${UBOOT_DTB} ${SIGNATURE_KEY_NODE} rsa,c 0x0
+			fdtput -tx ${UBOOT_DTB} ${SIGNATURE_KEY_NODE} rsa,np 0x0
+			fdtput -tx ${UBOOT_DTB} ${SIGNATURE_KEY_NODE} rsa,exponent-BN 0x0
 		fi
 		fdtput -r ${UBOOT_DTB} ${SIGNATURE_KEY_NODE}/hash@c
 		fdtput -r ${UBOOT_DTB} ${SIGNATURE_KEY_NODE}/hash@np

commit 449de1d380098d4762fb2862dd56f0d616f135a8
Author: Wenping Zhang <wenping.zhang@rock-chips.com>
Date:   Wed Dec 16 09:33:16 2020 +0000

    video/rk_eink: Only initilize the eink driver on the first time.
    
    This commit fix hardware without eink screen continue outputing
    eink log during charging.
    
    Signed-off-by: Wenping Zhang <wenping.zhang@rock-chips.com>
    Change-Id: I1b14f0cd921342d1efb83dc72be6829a157be6d9

diff --git a/drivers/video/rk_eink/rk_eink_display.c b/drivers/video/rk_eink/rk_eink_display.c
index 8c987d30ec..ea2a562eae 100644
--- a/drivers/video/rk_eink/rk_eink_display.c
+++ b/drivers/video/rk_eink/rk_eink_display.c
@@ -472,9 +472,16 @@ static int rockchip_eink_show_logo(int cur_logo_type, int update_mode)
 	struct udevice *dev;
 
 	if (!eink_dev) {
-		ret = rk_eink_display_init();
-		if (ret) {
-			printf("Get ebc dev failed, check dts configs\n");
+		static bool first_init = true;
+
+		if (first_init) {
+			first_init = false;
+			ret = rk_eink_display_init();
+			if (ret) {
+				printf("Get ebc dev failed, check dts\n");
+				return -ENODEV;
+			}
+		} else {
 			return -ENODEV;
 		}
 	}
@@ -596,7 +603,7 @@ static int rockchip_eink_display_probe(struct udevice *dev)
 	ret = uclass_get_device_by_phandle(UCLASS_EBC, dev,
 					   "ebc_tcon",
 					   &priv->ebc_tcon_dev);
-	if (ret && ret != -ENOENT) {
+	if (ret) {
 		dev_err(dev, "Cannot get ebc_tcon: %d\n", ret);
 		return ret;
 	}
@@ -604,7 +611,7 @@ static int rockchip_eink_display_probe(struct udevice *dev)
 	ret = uclass_get_device_by_phandle(UCLASS_I2C_GENERIC, dev,
 					   "pmic",
 					   &priv->ebc_pwr_dev);
-	if (ret && ret != -ENOENT) {
+	if (ret) {
 		dev_err(dev, "Cannot get pmic: %d\n", ret);
 		return ret;
 	}

commit c6d7f8e4f01732583aba03fe0220a80ce62844bc
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Dec 28 17:20:29 2020 +0800

    spl: ab: print a/b info in spl
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I2f1b05a6e12e53988a84b8ac876e80cd722fcaff

diff --git a/common/spl/spl_ab.c b/common/spl/spl_ab.c
index 17013220b2..972da2cbb8 100644
--- a/common/spl/spl_ab.c
+++ b/common/spl/spl_ab.c
@@ -202,6 +202,7 @@ static int spl_get_lastboot(AvbABData *ab_data)
 
 int spl_get_current_slot(struct blk_desc *dev_desc, char *partition, char *slot)
 {
+	static int last_slot_index = -1;
 	size_t slot_index_to_boot;
 	AvbABData ab_data;
 	int ret;
@@ -238,6 +239,14 @@ int spl_get_current_slot(struct blk_desc *dev_desc, char *partition, char *slot)
 	else if (slot_index_to_boot == 1)
 		memcpy(slot, "_b", 2);
 
+	if (last_slot_index != slot_index_to_boot) {
+		last_slot_index = slot_index_to_boot;
+		printf("SPL: A/B-slot: %s, successful: %d, tries-remain: %d\n",
+		       slot,
+		       ab_data.slots[slot_index_to_boot].successful_boot,
+		       ab_data.slots[slot_index_to_boot].tries_remaining);
+	}
+
 out:
 	return 0;
 }

commit fb4fd3b6ad68696ed31f608351531b97f66fc1e7
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Dec 29 17:51:52 2020 +0800

    configs: rk3568: support a/b system for spl
    
    If support a/b system in uboot, please slect CONFIG_ANDROID_AB.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I7465bbfd5ed526805df02796674bdc1ef769aefb

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index a5c7c05e38..e3d4adec8f 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -34,12 +34,15 @@ CONFIG_SPL_BOARD_INIT=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
 CONFIG_SPL_SEPARATE_BSS=y
+# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
 CONFIG_SPL_SHA256_SUPPORT=y
 CONFIG_SPL_CRYPTO_SUPPORT=y
 CONFIG_SPL_HASH_SUPPORT=y
 CONFIG_SPL_MTD_SUPPORT=y
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_SPL_AB=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y

commit effae6d71544d6cab5ae01aa7160bb709b3a3e6e
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Dec 28 16:46:41 2020 +0800

    disk: part: fix can not find partition with suffix "_a" & "_b"
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I3c4eb52101b77abec367a16cc9c2477b9ec8da04

diff --git a/disk/part.c b/disk/part.c
index 55a20be9ba..fb5e0dc057 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -690,6 +690,13 @@ int part_get_info_by_name(struct blk_desc *dev_desc, const char *name,
 	part_drv = part_driver_lookup_type(dev_desc);
 	if (!part_drv)
 		return -1;
+#if defined(CONFIG_ANDROID_AB) || defined(CONFIG_SPL_AB)
+	char *name_suffix = (char *)name + strlen(name) - 2;
+
+	/* Fix can not find partition with suffix "_a" & "_b". If with them, clear */
+	if (!memcmp(name_suffix, "_a", strlen("_a")) || !memcmp(name_suffix, "_b", strlen("_b")))
+		memset(name_suffix, 0, 2);
+#endif
 #if defined(CONFIG_ANDROID_AB) && !defined(CONFIG_SPL_BUILD)
 	/* 1. Query partition with A/B slot suffix */
 	if (rk_avb_append_part_slot(name, name_slot))

commit edaca8fc2909ac4a1c3a30fe1b399c84a0c220f7
Author: William Wu <william.wu@rock-chips.com>
Date:   Tue Dec 29 15:16:22 2020 +0800

    rockchip: rk3568: assert reset the pipephys to save power
    
    Signed-off-by: William Wu <william.wu@rock-chips.com>
    Change-Id: Ie2df9df2a7312debf215276450476537f5c29bad

diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c
index 6583f9ba7e..8eced3c5d1 100644
--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
@@ -33,6 +33,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define PMU_NOC_AUTO_CON1	(0x74)
 #define CRU_BASE		0xfdd20000
 #define CRU_SOFTRST_CON26	0x468
+#define CRU_SOFTRST_CON28	0x470
 #define SGRF_BASE		0xFDD18000
 #define SGRF_SOC_CON4		0x10
 #define PMUGRF_SOC_CON15	0xfdc20100
@@ -822,6 +823,12 @@ int arch_cpu_init(void)
 	/* Set core pvtpll ring length */
 	writel(0x00ff002b, CPU_GRF_BASE + GRF_CORE_PVTPLL_CON0);
 
+	/*
+	 * Assert reset the pipephy0, pipephy1 and pipephy2,
+	 * and de-assert reset them in Kernel combphy driver.
+	 */
+	 writel(0x02a002a0, CRU_BASE + CRU_SOFTRST_CON28);
+
 #ifndef CONFIG_TPL_BUILD
 	qos_priority_init();
 #endif

commit 9d8aa448b59274f94096664e12e45edaefa5c2fa
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Wed Dec 30 08:36:09 2020 +0800

    common: fix hex print format to %#010lx
    
    Before this patch:
       Flattened Device Tree blob at 08300000
       Booting using the fdt blob at 0x8300000
    
    With this patch:
       Flattened Device Tree blob at 0x08300000
       Booting using the fdt blob at 0x08300000
    
    Change-Id: Ibd5f1cfc07791eff829512d1820eb3c8c0caa007
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/common/image-fdt.c b/common/image-fdt.c
index ed0e57dbc9..89c20a842c 100644
--- a/common/image-fdt.c
+++ b/common/image-fdt.c
@@ -483,7 +483,7 @@ int boot_get_fdt(int flag, int argc, char * const argv[], uint8_t arch,
 				 * FDT blob
 				 */
 				debug("*  fdt: raw FDT blob\n");
-				printf("## Flattened Device Tree blob at %08lx\n",
+				printf("## Flattened Device Tree blob at %#010lx\n",
 				       (long)fdt_addr);
 			}
 			break;
@@ -492,7 +492,7 @@ int boot_get_fdt(int flag, int argc, char * const argv[], uint8_t arch,
 			goto no_fdt;
 		}
 
-		printf("   Booting using the fdt blob at %#08lx\n", fdt_addr);
+		printf("   Booting using the fdt blob at %#010lx\n", fdt_addr);
 		fdt_blob = map_sysmem(fdt_addr, 0);
 	} else if (images->legacy_hdr_valid &&
 			image_check_type(&images->legacy_hdr_os_copy,

commit 34ddf661ae73557314975648cd796884c8692f3e
Author: David Wu <david.wu@rock-chips.com>
Date:   Fri Dec 25 14:27:09 2020 +0800

    arm: dts: rk3568: Add gmac node
    
    Change-Id: Ie75274260889afa7cb5aa1b3814d691542358974
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/dts/rk3568-evb.dts b/arch/arm/dts/rk3568-evb.dts
index 03c9b31168..614736a019 100644
--- a/arch/arm/dts/rk3568-evb.dts
+++ b/arch/arm/dts/rk3568-evb.dts
@@ -30,6 +30,73 @@
 	};
 };
 
+&gmac0 {
+	phy-mode = "rgmii";
+	clock_in_out = "output";
+
+	snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
+	snps,reset-active-low;
+	/* Reset time is 20ms, 100ms for rtl8211f */
+	snps,reset-delays-us = <0 20000 100000>;
+	assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
+	assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>;
+	assigned-clock-rates = <0>, <125000000>;
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&gmac0_miim
+		     &gmac0_tx_bus2
+		     &gmac0_rx_bus2
+		     &gmac0_rgmii_clk
+		     &gmac0_rgmii_bus>;
+
+	tx_delay = <0x3c>;
+	rx_delay = <0x2f>;
+
+	phy-handle = <&rgmii_phy0>;
+	status = "disabled";
+};
+
+&gmac1 {
+	phy-mode = "rgmii";
+	clock_in_out = "output";
+
+	snps,reset-gpio = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>;
+	snps,reset-active-low;
+	/* Reset time is 20ms, 100ms for rtl8211f */
+	snps,reset-delays-us = <0 20000 100000>;
+
+	assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
+	assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>;
+	assigned-clock-rates = <0>, <125000000>;
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&gmac1m1_miim
+		     &gmac1m1_tx_bus2
+		     &gmac1m1_rx_bus2
+		     &gmac1m1_rgmii_clk
+		     &gmac1m1_rgmii_bus>;
+
+	tx_delay = <0x4f>;
+	rx_delay = <0x26>;
+
+	phy-handle = <&rgmii_phy1>;
+	status = "disabled";
+};
+
+&mdio0 {
+	rgmii_phy0: phy@0 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		reg = <0x0>;
+	};
+};
+
+&mdio1 {
+	rgmii_phy1: phy@0 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		reg = <0x0>;
+	};
+};
+
 &crypto {
 	status = "okay";
 };
diff --git a/arch/arm/dts/rk3568-pinctrl.dtsi b/arch/arm/dts/rk3568-pinctrl.dtsi
index 76a4281f8a..859c227371 100644
--- a/arch/arm/dts/rk3568-pinctrl.dtsi
+++ b/arch/arm/dts/rk3568-pinctrl.dtsi
@@ -451,166 +451,166 @@
 		};
 	};
 	gmac0 {
-		gmac0_miim_pins: gmac0-miim-pins {
+		gmac0_miim: gmac0-miim {
 			rockchip,pins =
 				/* gmac0_mdc */
 				<2 RK_PC3 2 &pcfg_pull_none>,
 				/* gmac0_mdio */
 				<2 RK_PC4 2 &pcfg_pull_none>;
 		};
-		gmac0_rmii_pins: gmac0-rmii-pins {
+		gmac0_clkinout: gmac0-clkinout {
 			rockchip,pins =
 				/* gmac0_mclkinout */
-				<2 RK_PC2 2 &pcfg_pull_none>,
+				<2 RK_PC2 2 &pcfg_pull_none>;
+		};
+		gmac0_rx_er: gmac0-rx-er {
+			rockchip,pins =
+				/* gmac0_rxer */
+				<2 RK_PC5 2 &pcfg_pull_none>;
+		};
+		gmac0_rx_bus2: gmac0-rx-bus2 {
+			rockchip,pins =
 				/* gmac0_rxd0 */
 				<2 RK_PB6 1 &pcfg_pull_none>,
 				/* gmac0_rxd1 */
 				<2 RK_PB7 2 &pcfg_pull_none>,
 				/* gmac0_rxdvcrs */
-				<2 RK_PC0 2 &pcfg_pull_none>,
-				/* gmac0_rxer */
-				<2 RK_PC5 2 &pcfg_pull_none>,
+				<2 RK_PC0 2 &pcfg_pull_none>;
+		};
+		gmac0_tx_bus2: gmac0-tx-bus2 {
+			rockchip,pins =
 				/* gmac0_txd0 */
-				<2 RK_PB3 1 &pcfg_pull_none>,
+				<2 RK_PB3 1 &pcfg_pull_none_drv_level_2>,
 				/* gmac0_txd1 */
-				<2 RK_PB4 1 &pcfg_pull_none>,
+				<2 RK_PB4 1 &pcfg_pull_none_drv_level_2>,
 				/* gmac0_txen */
 				<2 RK_PB5 1 &pcfg_pull_none>;
 		};
-		gmac0_rgmii_pins: gmac0-rgmii-pins {
+		gmac0_rgmii_clk: gmac0-rgmii-clk {
 			rockchip,pins =
 				/* gmac0_rxclk */
 				<2 RK_PA5 2 &pcfg_pull_none>,
-				/* gmac0_rxd0 */
-				<2 RK_PB6 1 &pcfg_pull_none>,
-				/* gmac0_rxd1 */
-				<2 RK_PB7 2 &pcfg_pull_none>,
+				/* gmac0_txclk */
+				<2 RK_PB0 2 &pcfg_pull_none_drv_level_1>;
+		};
+		gmac0_rgmii_bus: gmac0-rgmii-bus {
+			rockchip,pins =
 				/* gmac0_rxd2 */
 				<2 RK_PA3 2 &pcfg_pull_none>,
 				/* gmac0_rxd3 */
 				<2 RK_PA4 2 &pcfg_pull_none>,
-				/* gmac0_rxdvcrs */
-				<2 RK_PC0 2 &pcfg_pull_none>,
-				/* gmac0_txclk */
-				<2 RK_PB0 2 &pcfg_pull_none_drv_level_15>,
-				/* gmac0_txd0 */
-				<2 RK_PB3 1 &pcfg_pull_none_drv_level_15>,
-				/* gmac0_txd1 */
-				<2 RK_PB4 1 &pcfg_pull_none_drv_level_15>,
 				/* gmac0_txd2 */
-				<2 RK_PA6 2 &pcfg_pull_none_drv_level_15>,
+				<2 RK_PA6 2 &pcfg_pull_none_drv_level_2>,
 				/* gmac0_txd3 */
-				<2 RK_PA7 2 &pcfg_pull_none_drv_level_15>,
-				/* gmac0_txen */
-				<2 RK_PB5 1 &pcfg_pull_none>;
+				<2 RK_PA7 2 &pcfg_pull_none_drv_level_2>;
 		};
 	};
 	gmac1 {
-		gmac1m0_miim_pins: gmac1m0-miim-pins {
+		gmac1m0_miim: gmac1m0-miim {
 			rockchip,pins =
 				/* gmac1_mdcm0 */
 				<3 RK_PC4 3 &pcfg_pull_none>,
 				/* gmac1_mdiom0 */
 				<3 RK_PC5 3 &pcfg_pull_none>;
 		};
-		gmac1m0_rmii_pins: gmac1m0-rmii-pins {
+		gmac1m0_clkinout: gmac1m0-clkinout {
 			rockchip,pins =
 				/* gmac1_mclkinoutm0 */
-				<3 RK_PC0 3 &pcfg_pull_none>,
+				<3 RK_PC0 3 &pcfg_pull_none>;
+		};
+		gmac1m0_rx_er: gmac1m0-rx-er {
+			rockchip,pins =
+				/* gmac1_rxerm0 */
+				<3 RK_PB4 3 &pcfg_pull_none>;
+		};
+		gmac1m0_rx_bus2: gmac1m0-rx-bus2 {
+			rockchip,pins =
 				/* gmac1_rxd0m0 */
 				<3 RK_PB1 3 &pcfg_pull_none>,
 				/* gmac1_rxd1m0 */
 				<3 RK_PB2 3 &pcfg_pull_none>,
 				/* gmac1_rxdvcrsm0 */
-				<3 RK_PB3 3 &pcfg_pull_none>,
-				/* gmac1_rxerm0 */
-				<3 RK_PB4 3 &pcfg_pull_none>,
+				<3 RK_PB3 3 &pcfg_pull_none>;
+		};
+		gmac1m0_tx_bus2: gmac1m0-tx-bus2 {
+			rockchip,pins =
 				/* gmac1_txd0m0 */
-				<3 RK_PB5 3 &pcfg_pull_none>,
+				<3 RK_PB5 3 &pcfg_pull_none_drv_level_2>,
 				/* gmac1_txd1m0 */
-				<3 RK_PB6 3 &pcfg_pull_none>,
+				<3 RK_PB6 3 &pcfg_pull_none_drv_level_2>,
 				/* gmac1_txenm0 */
 				<3 RK_PB7 3 &pcfg_pull_none>;
 		};
-		gmac1m0_rgmii_pins: gmac1m0-rgmii-pins {
+		gmac1m0_rgmii_clk: gmac1m0-rgmii-clk {
 			rockchip,pins =
 				/* gmac1_rxclkm0 */
 				<3 RK_PA7 3 &pcfg_pull_none>,
-				/* gmac1_rxd0m0 */
-				<3 RK_PB1 3 &pcfg_pull_none>,
-				/* gmac1_rxd1m0 */
-				<3 RK_PB2 3 &pcfg_pull_none>,
+				/* gmac1_txclkm0 */
+				<3 RK_PA6 3 &pcfg_pull_none_drv_level_1>;
+		};
+		gmac1m0_rgmii_bus: gmac1m0-rgmii-bus {
+			rockchip,pins =
 				/* gmac1_rxd2m0 */
 				<3 RK_PA4 3 &pcfg_pull_none>,
 				/* gmac1_rxd3m0 */
 				<3 RK_PA5 3 &pcfg_pull_none>,
-				/* gmac1_rxdvcrsm0 */
-				<3 RK_PB3 3 &pcfg_pull_none>,
-				/* gmac1_txclkm0 */
-				<3 RK_PA6 3 &pcfg_pull_none_drv_level_15>,
-				/* gmac1_txd0m0 */
-				<3 RK_PB5 3 &pcfg_pull_none_drv_level_15>,
-				/* gmac1_txd1m0 */
-				<3 RK_PB6 3 &pcfg_pull_none_drv_level_15>,
 				/* gmac1_txd2m0 */
-				<3 RK_PA2 3 &pcfg_pull_none_drv_level_15>,
+				<3 RK_PA2 3 &pcfg_pull_none_drv_level_2>,
 				/* gmac1_txd3m0 */
-				<3 RK_PA3 3 &pcfg_pull_none_drv_level_15>,
-				/* gmac1_txenm0 */
-				<3 RK_PB7 3 &pcfg_pull_none>;
+				<3 RK_PA3 3 &pcfg_pull_none_drv_level_2>;
 		};
-		gmac1m1_miim_pins: gmac1m1-miim-pins {
+		gmac1m1_miim: gmac1m1-miim {
 			rockchip,pins =
 				/* gmac1_mdcm1 */
 				<4 RK_PB6 3 &pcfg_pull_none>,
 				/* gmac1_mdiom1 */
 				<4 RK_PB7 3 &pcfg_pull_none>;
 		};
-		gmac1m1_rmii_pins: gmac1m1-rmii-pins {
+		gmac1m1_clkinout: gmac1m1-clkinout {
 			rockchip,pins =
 				/* gmac1_mclkinoutm1 */
-				<4 RK_PC1 3 &pcfg_pull_none>,
+				<4 RK_PC1 3 &pcfg_pull_none>;
+		};
+		gmac1m1_rx_er: gmac1m1-rx-er {
+			rockchip,pins =
+				/* gmac1_rxerm1 */
+				<4 RK_PB2 3 &pcfg_pull_none>;
+		};
+		gmac1m1_rx_bus2: gmac1m1-rx-bus2 {
+			rockchip,pins =
 				/* gmac1_rxd0m1 */
 				<4 RK_PA7 3 &pcfg_pull_none>,
 				/* gmac1_rxd1m1 */
 				<4 RK_PB0 3 &pcfg_pull_none>,
 				/* gmac1_rxdvcrsm1 */
-				<4 RK_PB1 3 &pcfg_pull_none>,
-				/* gmac1_rxerm1 */
-				<4 RK_PB2 3 &pcfg_pull_none>,
+				<4 RK_PB1 3 &pcfg_pull_none>;
+		};
+		gmac1m1_tx_bus2: gmac1m1-tx-bus2 {
+			rockchip,pins =
 				/* gmac1_txd0m1 */
-				<4 RK_PA4 3 &pcfg_pull_none>,
+				<4 RK_PA4 3 &pcfg_pull_none_drv_level_2>,
 				/* gmac1_txd1m1 */
-				<4 RK_PA5 3 &pcfg_pull_none>,
+				<4 RK_PA5 3 &pcfg_pull_none_drv_level_2>,
 				/* gmac1_txenm1 */
 				<4 RK_PA6 3 &pcfg_pull_none>;
 		};
-		gmac1m1_rgmii_pins: gmac1m1-rgmii-pins {
+		gmac1m1_rgmii_clk: gmac1m1-rgmii-clk {
 			rockchip,pins =
 				/* gmac1_rxclkm1 */
 				<4 RK_PA3 3 &pcfg_pull_none>,
-				/* gmac1_rxd0m1 */
-				<4 RK_PA7 3 &pcfg_pull_none>,
-				/* gmac1_rxd1m1 */
-				<4 RK_PB0 3 &pcfg_pull_none>,
+				/* gmac1_txclkm1 */
+				<4 RK_PA0 3 &pcfg_pull_none_drv_level_1>;
+		};
+		gmac1m1_rgmii_bus: gmac1m1-rgmii-bus {
+			rockchip,pins =
 				/* gmac1_rxd2m1 */
 				<4 RK_PA1 3 &pcfg_pull_none>,
 				/* gmac1_rxd3m1 */
 				<4 RK_PA2 3 &pcfg_pull_none>,
-				/* gmac1_rxdvcrsm1 */
-				<4 RK_PB1 3 &pcfg_pull_none>,
-				/* gmac1_txclkm1 */
-				<4 RK_PA0 3 &pcfg_pull_none_drv_level_15>,
-				/* gmac1_txd0m1 */
-				<4 RK_PA4 3 &pcfg_pull_none_drv_level_15>,
-				/* gmac1_txd1m1 */
-				<4 RK_PA5 3 &pcfg_pull_none_drv_level_15>,
 				/* gmac1_txd2m1 */
-				<3 RK_PD6 3 &pcfg_pull_none_drv_level_15>,
+				<3 RK_PD6 3 &pcfg_pull_none_drv_level_2>,
 				/* gmac1_txd3m1 */
-				<3 RK_PD7 3 &pcfg_pull_none_drv_level_15>,
-				/* gmac1_txenm1 */
-				<4 RK_PA6 3 &pcfg_pull_none>;
+				<3 RK_PD7 3 &pcfg_pull_none_drv_level_2>;
 		};
 	};
 	gpu {
@@ -2172,4 +2172,89 @@
 				<3 RK_PC4 2 &pcfg_pull_none>;
 		};
 	};
+	gmac-txd-level3 {
+		gmac0_tx_bus2_level3: gmac0-tx-bus2-level3 {
+			rockchip,pins =
+				/* gmac0_txd0 */
+				<2 RK_PB3 1 &pcfg_pull_none_drv_level_3>,
+				/* gmac0_txd1 */
+				<2 RK_PB4 1 &pcfg_pull_none_drv_level_3>,
+				/* gmac0_txen */
+				<2 RK_PB5 1 &pcfg_pull_none>;
+		};
+		gmac0_rgmii_bus_level3: gmac0-rgmii-bus-level3 {
+			rockchip,pins =
+				/* gmac0_rxd2 */
+				<2 RK_PA3 2 &pcfg_pull_none>,
+				/* gmac0_rxd3 */
+				<2 RK_PA4 2 &pcfg_pull_none>,
+				/* gmac0_txd2 */
+				<2 RK_PA6 2 &pcfg_pull_none_drv_level_3>,
+				/* gmac0_txd3 */
+				<2 RK_PA7 2 &pcfg_pull_none_drv_level_3>;
+		};
+		gmac1m0_tx_bus2_level3: gmac1m0-tx-bus2-level3 {
+			rockchip,pins =
+				/* gmac1_txd0m0 */
+				<3 RK_PB5 3 &pcfg_pull_none_drv_level_3>,
+				/* gmac1_txd1m0 */
+				<3 RK_PB6 3 &pcfg_pull_none_drv_level_3>,
+				/* gmac1_txenm0 */
+				<3 RK_PB7 3 &pcfg_pull_none>;
+		};
+		gmac1m0_rgmii_bus_level3: gmac1m0-rgmii-bus-level3 {
+			rockchip,pins =
+				/* gmac1_rxd2m0 */
+				<3 RK_PA4 3 &pcfg_pull_none>,
+				/* gmac1_rxd3m0 */
+				<3 RK_PA5 3 &pcfg_pull_none>,
+				/* gmac1_txd2m0 */
+				<3 RK_PA2 3 &pcfg_pull_none_drv_level_3>,
+				/* gmac1_txd3m0 */
+				<3 RK_PA3 3 &pcfg_pull_none_drv_level_3>;
+		};
+		gmac1m1_tx_bus2_level3: gmac1m1-tx-bus2-level3 {
+			rockchip,pins =
+				/* gmac1_txd0m1 */
+				<4 RK_PA4 3 &pcfg_pull_none_drv_level_3>,
+				/* gmac1_txd1m1 */
+				<4 RK_PA5 3 &pcfg_pull_none_drv_level_3>,
+				/* gmac1_txenm1 */
+				<4 RK_PA6 3 &pcfg_pull_none>;
+		};
+		gmac1m1_rgmii_bus_level3: gmac1m1-rgmii-bus-level3 {
+			rockchip,pins =
+				/* gmac1_rxd2m1 */
+				<4 RK_PA1 3 &pcfg_pull_none>,
+				/* gmac1_rxd3m1 */
+				<4 RK_PA2 3 &pcfg_pull_none>,
+				/* gmac1_txd2m1 */
+				<3 RK_PD6 3 &pcfg_pull_none_drv_level_3>,
+				/* gmac1_txd3m1 */
+				<3 RK_PD7 3 &pcfg_pull_none_drv_level_3>;
+		};
+	};
+	gmac-txc-level2 {
+		gmac0_rgmii_clk_level2: gmac0-rgmii-clk-level2 {
+			rockchip,pins =
+				/* gmac0_rxclk */
+				<2 RK_PA5 2 &pcfg_pull_none>,
+				/* gmac0_txclk */
+				<2 RK_PB0 2 &pcfg_pull_none_drv_level_2>;
+		};
+		gmac1m0_rgmii_clk_level2: gmac1m0-rgmii-clk-level2 {
+			rockchip,pins =
+				/* gmac1_rxclkm0 */
+				<3 RK_PA7 3 &pcfg_pull_none>,
+				/* gmac1_txclkm0 */
+				<3 RK_PA6 3 &pcfg_pull_none_drv_level_2>;
+		};
+		gmac1m1_rgmii_clk_level2: gmac1m1-rgmii-clk-level2 {
+			rockchip,pins =
+				/* gmac1_rxclkm1 */
+				<4 RK_PA3 3 &pcfg_pull_none>,
+				/* gmac1_txclkm1 */
+				<4 RK_PA0 3 &pcfg_pull_none_drv_level_2>;
+		};
+	};
 };
diff --git a/arch/arm/dts/rk3568-u-boot.dtsi b/arch/arm/dts/rk3568-u-boot.dtsi
index fdf7d3ab75..dc542f0115 100644
--- a/arch/arm/dts/rk3568-u-boot.dtsi
+++ b/arch/arm/dts/rk3568-u-boot.dtsi
@@ -6,6 +6,8 @@
 
 / {
 	aliases {
+		ethernet0 = &gmac0;
+		ethernet1 = &gmac1;
 		mmc0 = &sdhci;
 		mmc1 = &sdmmc0;
 		mmc2 = &sdmmc1;
@@ -182,8 +184,182 @@
 	};
 };
 
+
+&gmac0_clkin{
+	u-boot,dm-pre-reloc;
+};
+
+&gmac1_clkin {
+	u-boot,dm-pre-reloc;
+};
+
+&gmac0 {
+	u-boot,dm-pre-reloc;
+	phy-mode = "rgmii";
+	clock_in_out = "output";
+
+	snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
+	snps,reset-active-low;
+	/* Reset time is 20ms, 100ms for rtl8211f */
+	snps,reset-delays-us = <0 20000 100000>;
+	assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
+	assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>;
+	assigned-clock-rates = <0>, <125000000>;
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&gmac0_miim
+		     &gmac0_tx_bus2
+		     &gmac0_rx_bus2
+		     &gmac0_rgmii_clk
+		     &gmac0_rgmii_bus>;
+
+	tx_delay = <0x3c>;
+	rx_delay = <0x2f>;
+
+	phy-handle = <&rgmii_phy0>;
+	status = "disabled";
+};
+
+&gmac1 {
+	u-boot,dm-pre-reloc;
+	phy-mode = "rgmii";
+	clock_in_out = "output";
+
+	snps,reset-gpio = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>;
+	snps,reset-active-low;
+	/* Reset time is 20ms, 100ms for rtl8211f */
+	snps,reset-delays-us = <0 20000 100000>;
+
+	assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
+	assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>;
+	assigned-clock-rates = <0>, <125000000>;
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&gmac1m1_miim
+		     &gmac1m1_tx_bus2
+		     &gmac1m1_rx_bus2
+		     &gmac1m1_rgmii_clk
+		     &gmac1m1_rgmii_bus>;
+
+	tx_delay = <0x4f>;
+	rx_delay = <0x26>;
+
+	phy-handle = <&rgmii_phy1>;
+	status = "disabled";
+};
+
+&gmac0_stmmac_axi_setup {
+	u-boot,dm-pre-reloc;
+};
+
+&gmac0_mtl_rx_setup {
+	u-boot,dm-pre-reloc;
+	queue0 {
+		u-boot,dm-pre-reloc;
+	};
+};
+
+&gmac0_mtl_tx_setup {
+	u-boot,dm-pre-reloc;
+	queue0 {
+		u-boot,dm-pre-reloc;
+	};
+};
+
+&gmac1_stmmac_axi_setup {
+	u-boot,dm-pre-reloc;
+};
+
+&gmac1_mtl_rx_setup {
+	u-boot,dm-pre-reloc;
+	queue0 {
+		u-boot,dm-pre-reloc;
+	};
+};
+
+&gmac1_mtl_tx_setup {
+	u-boot,dm-pre-reloc;
+	queue0 {
+		u-boot,dm-pre-reloc;
+	};
+};
+
+&mdio0 {
+	u-boot,dm-pre-reloc;
+	rgmii_phy0: phy@0 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		u-boot,dm-pre-reloc;
+		reg = <0x0>;
+	};
+};
+
+&mdio1 {
+	u-boot,dm-pre-reloc;
+	rgmii_phy1: phy@0 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		u-boot,dm-pre-reloc;
+		reg = <0x0>;
+	};
+};
+
+&gmac0_miim {
+	u-boot,dm-pre-reloc;
+};
+
+&gmac0_clkinout {
+	u-boot,dm-pre-reloc;
+};
+
+&gmac0_rx_bus2 {
+	u-boot,dm-pre-reloc;
+};
+
+&gmac0_tx_bus2 {
+	u-boot,dm-pre-reloc;
+};
+
+&gmac0_rgmii_clk {
+	u-boot,dm-pre-reloc;
+};
+
+&gmac0_rgmii_bus {
+	u-boot,dm-pre-reloc;
+};
+
+&gmac1m1_miim {
+	u-boot,dm-pre-reloc;
+};
+
+&gmac1m1_clkinout {
+	u-boot,dm-pre-reloc;
+};
+
+&gmac1m1_rx_bus2 {
+	u-boot,dm-pre-reloc;
+};
+
+&gmac1m1_tx_bus2 {
+	u-boot,dm-pre-reloc;
+};
+
+&gmac1m1_rgmii_clk {
+	u-boot,dm-pre-reloc;
+};
+
+&gmac1m1_rgmii_bus {
+	u-boot,dm-pre-reloc;
+};
+
+&eth0_clkout_pins {
+	u-boot,dm-pre-reloc;
+};
+
+&eth1m1_clkout_pins {
+	u-boot,dm-pre-reloc;
+};
+
 &pinctrl {
-	u-boot,dm-spl;
+	u-boot,dm-pre-reloc;
 	status = "okay";
 };
 
@@ -196,6 +372,19 @@
 };
 
 &gpio2 {
+	u-boot,dm-pre-reloc;
+};
+
+&pcfg_pull_none_drv_level_1 {
+	u-boot,dm-pre-reloc;
+};
+
+&pcfg_pull_none_drv_level_2 {
+	u-boot,dm-pre-reloc;
+};
+
+
+&pcfg_pull_up_drv_level_1 {
 	u-boot,dm-spl;
 };
 
@@ -204,7 +393,7 @@
 };
 
 &pcfg_pull_none {
-	u-boot,dm-spl;
+	u-boot,dm-pre-reloc;
 };
 
 &secure_otp {
diff --git a/arch/arm/dts/rk3568.dtsi b/arch/arm/dts/rk3568.dtsi
index 7c3adfb6b5..91e26ce767 100644
--- a/arch/arm/dts/rk3568.dtsi
+++ b/arch/arm/dts/rk3568.dtsi
@@ -4,6 +4,7 @@
  */
 
 #include <dt-bindings/clock/rk3568-cru.h>
+#include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/pinctrl/rockchip.h>

commit 2a2aae6ca3984f3c87c80d20fc25585dbf07c4c8
Author: David Wu <david.wu@rock-chips.com>
Date:   Thu Dec 24 17:51:20 2020 +0800

    arm: dts: rk3568: Fix typo in gmac1_clkin
    
    Change-Id: Ice4a313d004fa9f9b193d7258b0216187a4e5be2
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/dts/rk3568.dtsi b/arch/arm/dts/rk3568.dtsi
index d2c81af6fc..7c3adfb6b5 100644
--- a/arch/arm/dts/rk3568.dtsi
+++ b/arch/arm/dts/rk3568.dtsi
@@ -191,7 +191,7 @@
 		#clock-cells = <0>;
 	};
 
-	gmac1_clkini: external-gmac1-clock {
+	gmac1_clkin: external-gmac1-clock {
 		compatible = "fixed-clock";
 		clock-frequency = <125000000>;
 		clock-output-names = "gmac1_clkin";

commit a38f1c5ac94a1c9650b0f98260d5e53f832ab0a7
Author: David Wu <david.wu@rock-chips.com>
Date:   Thu Dec 17 20:02:44 2020 +0800

    configs: Enable ethernet support for rk3568
    
    Change-Id: I74437c9da16cde98469c6761d73074c6041f0520
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index a83fbeb7d2..a5c7c05e38 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -67,6 +67,9 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_TFTP_BOOTM=y
+CONFIG_CMD_TFTP_FLASH=y
 # CONFIG_CMD_MISC is not set
 # CONFIG_CMD_CHARGE_DISPLAY is not set
 CONFIG_CMD_MTD_BLK=y
@@ -116,7 +119,10 @@ CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SPI_FLASH_XMC=y
 CONFIG_SPI_FLASH_MTD=y
-CONFIG_PHYLIB=y
+CONFIG_DM_ETH=y
+CONFIG_DM_ETH_PHY=y
+CONFIG_DWC_ETH_QOS=y
+CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PHY_ROCKCHIP_NANENG_EDP=y
 CONFIG_PINCTRL=y

commit 33a014bdc90db3189e9d2467cb56a873d5661459
Author: David Wu <david.wu@rock-chips.com>
Date:   Thu Dec 17 20:01:53 2020 +0800

    net: gmac_rockchip: Add rk3568 gmac support
    
    Change-Id: I3de9899a27160f5acccc04cd1ac03b406e4b3296
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/net/gmac_rockchip.c b/drivers/net/gmac_rockchip.c
index 3eda3a6fa5..2b72bf75ef 100644
--- a/drivers/net/gmac_rockchip.c
+++ b/drivers/net/gmac_rockchip.c
@@ -16,6 +16,7 @@
 #include <asm/arch/clock.h>
 #include <asm/arch/hardware.h>
 #ifdef CONFIG_DWC_ETH_QOS
+#include <asm/arch/grf_rk3568.h>
 #include <asm/arch/grf_rv1126.h>
 #include "dwc_eth_qos.h"
 #else
@@ -57,6 +58,7 @@ struct gmac_rockchip_platdata {
 	bool clock_input;
 	int tx_delay;
 	int rx_delay;
+	int bus_id;
 };
 
 struct rk_gmac_ops {
@@ -439,7 +441,8 @@ static int rv1126_set_rgmii_speed(struct rockchip_eth_dev *dev)
 	ret = clk_get_by_name(priv->phy->dev, "clk_mac_speed",
 			      &clk_speed);
 	if (ret) {
-			printf("%s~(ret=%d):\n", __func__, ret);
+		printf("%s can't get clk_mac_speed clock (ret=%d):\n",
+		       __func__, ret);
 		return ret;
 	}
 
@@ -723,6 +726,81 @@ static void rv1108_gmac_set_to_rmii(struct gmac_rockchip_platdata *pdata)
 		     RV1108_GMAC_PHY_INTF_SEL_RMII);
 }
 #else
+static void rk3568_set_to_rmii(struct gmac_rockchip_platdata *pdata)
+{
+	struct rk3568_grf *grf;
+	void *con1;
+
+	enum {
+		RK3568_GMAC_PHY_INTF_SEL_SHIFT = 4,
+		RK3568_GMAC_PHY_INTF_SEL_MASK = GENMASK(6, 4),
+		RK3568_GMAC_PHY_INTF_SEL_RMII = BIT(6),
+	};
+
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
+	if (pdata->bus_id == 1)
+		con1 = &grf->mac1_con1;
+	else
+		con1 = &grf->mac0_con1;
+
+	rk_clrsetreg(con1,
+		     RK3568_GMAC_PHY_INTF_SEL_MASK,
+		     RK3568_GMAC_PHY_INTF_SEL_RMII);
+}
+
+static void rk3568_set_to_rgmii(struct gmac_rockchip_platdata *pdata)
+{
+	struct rk3568_grf *grf;
+	void *con0, *con1;
+
+	enum {
+		RK3568_GMAC_PHY_INTF_SEL_SHIFT = 4,
+		RK3568_GMAC_PHY_INTF_SEL_MASK = GENMASK(6, 4),
+		RK3568_GMAC_PHY_INTF_SEL_RGMII = BIT(4),
+
+		RK3568_RXCLK_DLY_ENA_GMAC_MASK = BIT(1),
+		RK3568_RXCLK_DLY_ENA_GMAC_DISABLE = 0,
+		RK3568_RXCLK_DLY_ENA_GMAC_ENABLE = BIT(1),
+
+		RK3568_TXCLK_DLY_ENA_GMAC_MASK = BIT(0),
+		RK3568_TXCLK_DLY_ENA_GMAC_DISABLE = 0,
+		RK3568_TXCLK_DLY_ENA_GMAC_ENABLE = BIT(0),
+	};
+
+	enum {
+		RK3568_CLK_RX_DL_CFG_GMAC_SHIFT = 0x8,
+		RK3568_CLK_RX_DL_CFG_GMAC_MASK = GENMASK(15, 8),
+
+		RK3568_CLK_TX_DL_CFG_GMAC_SHIFT = 0x0,
+		RK3568_CLK_TX_DL_CFG_GMAC_MASK = GENMASK(7, 0),
+	};
+
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
+	if (pdata->bus_id == 1) {
+		con0 = &grf->mac1_con0;
+		con1 = &grf->mac1_con1;
+	} else {
+		con0 = &grf->mac0_con0;
+		con1 = &grf->mac0_con1;
+	}
+
+	rk_clrsetreg(con0,
+		     RK3568_CLK_RX_DL_CFG_GMAC_MASK |
+		     RK3568_CLK_TX_DL_CFG_GMAC_MASK,
+		     pdata->rx_delay << RK3568_CLK_RX_DL_CFG_GMAC_SHIFT |
+		     pdata->tx_delay << RK3568_CLK_TX_DL_CFG_GMAC_SHIFT);
+
+	rk_clrsetreg(con1,
+		     RK3568_TXCLK_DLY_ENA_GMAC_MASK |
+		     RK3568_RXCLK_DLY_ENA_GMAC_MASK |
+		     RK3568_GMAC_PHY_INTF_SEL_MASK,
+		     RK3568_TXCLK_DLY_ENA_GMAC_ENABLE |
+		     RK3568_RXCLK_DLY_ENA_GMAC_ENABLE |
+		     RK3568_GMAC_PHY_INTF_SEL_RGMII);
+}
+
 static void rv1126_set_to_rmii(struct gmac_rockchip_platdata *pdata)
 {
 	struct rv1126_grf *grf;
@@ -832,6 +910,7 @@ static int gmac_rockchip_probe(struct udevice *dev)
 	dw_pdata = &pdata->dw_eth_pdata;
 	eth_pdata = &dw_pdata->eth_pdata;
 #endif
+	pdata->bus_id = dev->seq;
 	/* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
 	ret = clk_set_defaults(dev);
 	if (ret)
@@ -1029,6 +1108,12 @@ const struct rk_gmac_ops rv1108_gmac_ops = {
 	.set_to_rmii = rv1108_gmac_set_to_rmii,
 };
 #else
+const struct rk_gmac_ops rk3568_gmac_ops = {
+	.fix_mac_speed = rv1126_set_rgmii_speed,
+	.set_to_rgmii = rk3568_set_to_rgmii,
+	.set_to_rmii = rk3568_set_to_rmii,
+};
+
 const struct rk_gmac_ops rv1126_gmac_ops = {
 	.fix_mac_speed = rv1126_set_rgmii_speed,
 	.set_to_rgmii = rv1126_set_to_rgmii,
@@ -1057,6 +1142,8 @@ static const struct udevice_id rockchip_gmac_ids[] = {
 	{ .compatible = "rockchip,rv1108-gmac",
 	  .data = (ulong)&rv1108_gmac_ops },
 #else
+	{ .compatible = "rockchip,rk3568-gmac",
+	  .data = (ulong)&rk3568_gmac_ops },
 	{ .compatible = "rockchip,rv1126-gmac",
 	  .data = (ulong)&rv1126_gmac_ops },
 #endif
diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h
index 65d7e91ea9..33aceeec6b 100644
--- a/include/configs/rk3568_common.h
+++ b/include/configs/rk3568_common.h
@@ -54,6 +54,8 @@
 #define SDRAM_MAX_SIZE			0xf0000000
 #define CONFIG_PREBOOT
 
+#define CONFIG_SYS_NONCACHED_MEMORY	(1 << 20)	/* 1 MiB */
+
 #ifndef CONFIG_SPL_BUILD
 /* usb mass storage */
 #define CONFIG_USB_FUNCTION_MASS_STORAGE

commit befcb6277d8625f35a25bbd24b2e3eb11578d018
Author: David Wu <david.wu@rock-chips.com>
Date:   Thu Dec 24 09:27:18 2020 +0800

    net: gmac_rockchip: Prepare for rk3568 gmac support
    
    Change-Id: Iada7af00c052a7ebe7e6b702ada2bd2ef585a913
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/net/gmac_rockchip.c b/drivers/net/gmac_rockchip.c
index a6def5d086..3eda3a6fa5 100644
--- a/drivers/net/gmac_rockchip.c
+++ b/drivers/net/gmac_rockchip.c
@@ -68,6 +68,17 @@ struct rk_gmac_ops {
 	void (*set_to_rgmii)(struct gmac_rockchip_platdata *pdata);
 };
 
+#ifdef CONFIG_DWC_ETH_QOS
+static const struct eqos_config eqos_rockchip_config = {
+	.reg_access_always_ok = false,
+	.mdio_wait = 10000,
+	.swr_wait = 200,
+	.config_mac = EQOS_MAC_RXQ_CTRL0_RXQ0EN_NOT_ENABLED,
+	.config_mac_mdio = EQOS_MAC_MDIO_ADDRESS_CR_100_150,
+	.ops = &eqos_rockchip_ops,
+};
+#endif
+
 void gmac_set_rgmii(struct udevice *dev, u32 tx_delay, u32 rx_delay)
 {
 	struct gmac_rockchip_platdata *pdata = dev_get_platdata(dev);
@@ -815,6 +826,7 @@ static int gmac_rockchip_probe(struct udevice *dev)
 #ifdef CONFIG_DWC_ETH_QOS
 	eth_pdata = &pdata->eth_pdata;
 	config = (struct eqos_config *)&ops->config;
+	memcpy(config, &eqos_rockchip_config, sizeof(struct eqos_config));
 	eth_pdata->phy_interface = config->ops->eqos_get_interface(dev);
 #else
 	dw_pdata = &pdata->dw_eth_pdata;
@@ -1018,15 +1030,6 @@ const struct rk_gmac_ops rv1108_gmac_ops = {
 };
 #else
 const struct rk_gmac_ops rv1126_gmac_ops = {
-	.config = {
-		.reg_access_always_ok = false,
-		.mdio_wait = 10000,
-		.swr_wait = 200,
-		.config_mac = EQOS_MAC_RXQ_CTRL0_RXQ0EN_NOT_ENABLED,
-		.config_mac_mdio = EQOS_MAC_MDIO_ADDRESS_CR_100_150,
-		.ops = &eqos_rockchip_ops
-	},
-
 	.fix_mac_speed = rv1126_set_rgmii_speed,
 	.set_to_rgmii = rv1126_set_to_rgmii,
 	.set_to_rmii = rv1126_set_to_rmii,

commit ee1ce3c58a34ab02572cfd0791b5db62766bc344
Author: David Wu <david.wu@rock-chips.com>
Date:   Thu Dec 24 17:34:26 2020 +0800

    pinctrl: rockchip: Use gmac1_rxd0 to select M0 and M1
    
    Change-Id: Idba7d638d4fc55b1c163a3fa104c04345a74e51c
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3568.c b/drivers/pinctrl/rockchip/pinctrl-rk3568.c
index dc1451473c..71e17ecfc2 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3568.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3568.c
@@ -20,8 +20,8 @@ static struct rockchip_mux_route_data rk3568_mux_route_data[] = {
 	MR_TOPGRF(RK_GPIO2, RK_PB2, RK_FUNC_4, 0x0300, RK_GENMASK_VAL(4, 4, 1)), /* CAN2 IO mux selection M1 */
 	MR_TOPGRF(RK_GPIO4, RK_PC4, RK_FUNC_1, 0x0300, RK_GENMASK_VAL(6, 6, 0)), /* EDPDP_HPDIN IO mux selection M0 */
 	MR_TOPGRF(RK_GPIO0, RK_PC2, RK_FUNC_2, 0x0300, RK_GENMASK_VAL(6, 6, 1)), /* EDPDP_HPDIN IO mux selection M1 */
-	MR_TOPGRF(RK_GPIO3, RK_PC0, RK_FUNC_3, 0x0300, RK_GENMASK_VAL(8, 8, 0)), /* GMAC1 IO mux selection M0 */
-	MR_TOPGRF(RK_GPIO4, RK_PC1, RK_FUNC_3, 0x0300, RK_GENMASK_VAL(8, 8, 1)), /* GMAC1 IO mux selection M1 */
+	MR_TOPGRF(RK_GPIO3, RK_PB1, RK_FUNC_3, 0x0300, RK_GENMASK_VAL(8, 8, 0)), /* GMAC1 IO mux selection M0 */
+	MR_TOPGRF(RK_GPIO4, RK_PA7, RK_FUNC_3, 0x0300, RK_GENMASK_VAL(8, 8, 1)), /* GMAC1 IO mux selection M1 */
 	MR_TOPGRF(RK_GPIO4, RK_PD1, RK_FUNC_1, 0x0300, RK_GENMASK_VAL(10, 10, 0)), /* HDMITX IO mux selection M0 */
 	MR_TOPGRF(RK_GPIO0, RK_PC7, RK_FUNC_1, 0x0300, RK_GENMASK_VAL(10, 10, 1)), /* HDMITX IO mux selection M1 */
 	MR_TOPGRF(RK_GPIO0, RK_PB6, RK_FUNC_1, 0x0300, RK_GENMASK_VAL(14, 14, 0)), /* I2C2 IO mux selection M0 */

commit 00f93bdf983f4d35864bdecddf25e7d299fb3a8b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 29 15:52:09 2020 +0800

    drivers: pci: separate SPL & U-Boot proper build
    
    It fixes SPL compile issue after PCI enabled.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ic3d4a464defd2074be083effd25f513ae19d2e01

diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index b4d1fa56bc..cb7cfa8ba7 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -521,7 +521,7 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
 
 	/* try Processor Local Bus device first */
 	addr = dev_read_addr(dev);
-#if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI)
+#if defined(CONFIG_PCI) && CONFIG_IS_ENABLED(DM_PCI)
 	if (addr == FDT_ADDR_T_NONE) {
 		/* then try pci device */
 		struct fdt_pci_addr pci_addr;
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 5b637f2639..f6a782d8e2 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -186,7 +186,7 @@ fdt_addr_t fdtdec_get_addr(const void *blob, int node,
 	return fdtdec_get_addr_size(blob, node, prop_name, NULL);
 }
 
-#if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI)
+#if defined(CONFIG_PCI) && CONFIG_IS_ENABLED(DM_PCI)
 int fdtdec_get_pci_addr(const void *blob, int node, enum fdt_pci_space type,
 		const char *prop_name, struct fdt_pci_addr *addr)
 {

commit ee7b0fb8d50f25a5931c44fdb4e6d237e527199a
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Dec 28 22:19:41 2020 +0800

    rockchip: board: fix initial otp index as again and again
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ib520b342edd6e404d8bb4167d0280e8589f38fb4

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 7cd020d9d7..6e9f03e5a6 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -880,11 +880,11 @@ int fit_read_otp_rollback_index(uint32_t fit_index, uint32_t *otp_index)
 		if (ret != TEE_ERROR_ITEM_NOT_FOUND)
 			return ret;
 
-		*otp_index = fit_index;
+		index = 0;
 		printf("Initial otp index as %d\n", fit_index);
-	} else {
-		*otp_index = index;
 	}
+
+	*otp_index = (uint32_t)index;
 #else
 	*otp_index = 0;
 #endif

commit 9148182d3cbe9bf3a2f8ca859dbb76cfca657ec7
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed Dec 23 14:25:27 2020 +0800

    mtd: mtd_blk: Support SPI Nor blk_derase
    
    Change-Id: I1be6dfc1fa7acd25f98031f48002abf13479418c
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index 52c714100e..e1e3929c42 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -587,7 +587,8 @@ ulong mtd_derase(struct udevice *udev, lbaint_t start,
 		return 0;
 
 	if (desc->devnum == BLK_MTD_NAND ||
-	    desc->devnum == BLK_MTD_SPI_NAND) {
+	    desc->devnum == BLK_MTD_SPI_NAND ||
+	    desc->devnum == BLK_MTD_SPI_NOR) {
 		ret = mtd_map_erase(mtd, off, len);
 		if (ret)
 			return ret;

commit 1e5036b9d9fb8554b828fbd5ea1e4c3def4f7145
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue Dec 22 20:48:24 2020 +0800

    rockchip: vendor: Support MTD SPI Nor
    
    Change-Id: I67d01db2d335abfd483596a2f7033d1e38cffaf5
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/vendor.c b/arch/arm/mach-rockchip/vendor.c
index 156f19a902..2e5983c7c3 100644
--- a/arch/arm/mach-rockchip/vendor.c
+++ b/arch/arm/mach-rockchip/vendor.c
@@ -85,14 +85,13 @@ struct vendor_info {
 	u32 *version2;
 };
 
-struct mtd_nand_info {
+struct mtd_flash_info {
 	u32 part_offset;
 	u32 part_size;
 	u32 blk_offset;
 	u32 page_offset;
 	u32 version;
 	u32 ops_size;
-	u32 page_size;
 	u32 blk_size;
 };
 
@@ -129,7 +128,7 @@ static struct vendor_info vendor_info;
 static int bootdev_type;
 
 #ifdef CONFIG_MTD_BLK
-static struct mtd_nand_info nand_info;
+static struct mtd_flash_info s_flash_info;
 static const char *vendor_mtd_name = "vnvm";
 #endif
 
@@ -175,48 +174,49 @@ static int mtd_vendor_storage_init(struct blk_desc *dev_desc)
 	if (part_num < 0)
 		return -EIO;
 
-	nand_info.part_offset = (u32)vnvm_part_info.start;
-	nand_info.part_size = (u32)vnvm_part_info.size;
-	nand_info.page_offset = 0;
-	nand_info.blk_offset = 0;
-	nand_info.version = 0;
-	nand_info.page_size = mtd->writesize >> 9;
-	nand_info.blk_size = mtd->erasesize >> 9;
-	nand_info.ops_size = (FLASH_VENDOR_INFO_SIZE + mtd->writesize - 1) /
-			     mtd->writesize;
-	nand_info.ops_size *= nand_info.page_size;
+	s_flash_info.part_offset = (u32)vnvm_part_info.start;
+	s_flash_info.part_size = (u32)vnvm_part_info.size;
+	s_flash_info.page_offset = 0;
+	s_flash_info.blk_offset = 0;
+	s_flash_info.version = 0;
+	/* SPI Nor unified to Support 64KB erase block */
+	if (dev_desc->devnum == BLK_MTD_SPI_NOR)
+		s_flash_info.blk_size = 0x80;
+	else
+		s_flash_info.blk_size = mtd->erasesize >> 9;
+	s_flash_info.ops_size = roundup(FLASH_VENDOR_INFO_SIZE, mtd->writesize) >> 9;
 
 	/* scan bad block and calculate the real size can be used */
 	bad_block_size = 0;
-	for (offset = 0; offset < nand_info.part_size; offset += nand_info.blk_size) {
-		if (mtd_block_isbad(mtd, (nand_info.part_offset + offset) << 9))
-			bad_block_size += nand_info.blk_size;
+	for (offset = 0; offset < s_flash_info.part_size; offset += s_flash_info.blk_size) {
+		if (mtd_block_isbad(mtd, (s_flash_info.part_offset + offset) << 9))
+			bad_block_size += s_flash_info.blk_size;
 	}
-	nand_info.part_size -= bad_block_size;
+	s_flash_info.part_size -= bad_block_size;
 
-	for (offset = 0; offset < nand_info.part_size; offset += nand_info.blk_size) {
-		ret = blk_dread(dev_desc, nand_info.part_offset + offset,
+	for (offset = 0; offset < s_flash_info.part_size; offset += s_flash_info.blk_size) {
+		ret = blk_dread(dev_desc, s_flash_info.part_offset + offset,
 				FLASH_VENDOR_INFO_SIZE >> 9,
 				(u8 *)buf);
 		debug("%s: read %x version = %x\n", __func__,
-		      nand_info.part_offset + offset,
+		      s_flash_info.part_offset + offset,
 		      vendor_info.hdr->version);
 		if (ret == (FLASH_VENDOR_INFO_SIZE >> 9) && vendor_info.hdr->tag == VENDOR_TAG &&
 		    vendor_info.hdr->version == *vendor_info.version2) {
-			if (vendor_info.hdr->version > nand_info.version) {
-				nand_info.version = vendor_info.hdr->version;
-				nand_info.blk_offset = offset;
+			if (vendor_info.hdr->version > s_flash_info.version) {
+				s_flash_info.version = vendor_info.hdr->version;
+				s_flash_info.blk_offset = offset;
 			}
 		}
 	}
 
-	debug("%s: nand_info.version = %x %x\n", __func__, nand_info.version, nand_info.blk_offset);
-	if (nand_info.version) {
-		for (offset = nand_info.blk_size  - nand_info.ops_size;
+	debug("%s: s_flash_info.version = %x %x\n", __func__, s_flash_info.version, s_flash_info.blk_offset);
+	if (s_flash_info.version) {
+		for (offset = s_flash_info.blk_size  - s_flash_info.ops_size;
 		     offset >= 0;
-		     offset -= nand_info.ops_size) {
-			ret = blk_dread(dev_desc, nand_info.part_offset +
-					nand_info.blk_offset + offset,
+		     offset -= s_flash_info.ops_size) {
+			ret = blk_dread(dev_desc, s_flash_info.part_offset +
+					s_flash_info.blk_offset + offset,
 					1,
 					(u8 *)buf);
 
@@ -225,22 +225,22 @@ static int mtd_vendor_storage_init(struct blk_desc *dev_desc)
 				continue;
 
 			/* point to the last programed page */
-			if (nand_info.page_offset < offset)
-				nand_info.page_offset = offset;
+			if (s_flash_info.page_offset < offset)
+				s_flash_info.page_offset = offset;
 
 			if (ret != 1 || vendor_info.hdr->tag != VENDOR_TAG)
 				continue;
-			ret = blk_dread(dev_desc, nand_info.part_offset +
-					nand_info.blk_offset + offset,
+			ret = blk_dread(dev_desc, s_flash_info.part_offset +
+					s_flash_info.blk_offset + offset,
 					FLASH_VENDOR_INFO_SIZE >> 9,
 					(u8 *)buf);
 			debug("%s: read %x version = %x\n", __func__,
-			      nand_info.part_offset + nand_info.blk_offset  + offset,
+			      s_flash_info.part_offset + s_flash_info.blk_offset  + offset,
 			      vendor_info.hdr->version);
 
 			if (ret == (FLASH_VENDOR_INFO_SIZE >> 9)  && vendor_info.hdr->tag == VENDOR_TAG &&
 			    vendor_info.hdr->version == *vendor_info.version2) {
-				nand_info.version = vendor_info.hdr->version;
+				s_flash_info.version = vendor_info.hdr->version;
 				break;
 			}
 		}
@@ -265,21 +265,23 @@ static int mtd_vendor_write(struct blk_desc *dev_desc,
 	int ret, count = 0, err = 0;
 
 re_write:
-	debug("[Vendor INFO]:%s page_offset=0x%x count = %x\n", __func__, nand_info.part_offset +
-	      nand_info.blk_offset + nand_info.page_offset, count);
-	if (nand_info.page_offset >= nand_info.blk_size) {
-		nand_info.blk_offset += nand_info.blk_size;
-		if (nand_info.blk_offset >= nand_info.part_size)
-			nand_info.blk_offset = 0;
-		nand_info.page_offset = 0;
+	debug("[Vendor INFO]:%s page_offset=0x%x count = %x\n", __func__, s_flash_info.part_offset +
+	      s_flash_info.blk_offset + s_flash_info.page_offset, count);
+	if (s_flash_info.page_offset >= s_flash_info.blk_size) {
+		s_flash_info.blk_offset += s_flash_info.blk_size;
+		if (s_flash_info.blk_offset >= s_flash_info.part_size)
+			s_flash_info.blk_offset = 0;
+		s_flash_info.page_offset = 0;
 	}
 
-	ret = blk_dwrite(dev_desc, nand_info.part_offset +
-			 nand_info.blk_offset + nand_info.page_offset,
+	dev_desc->op_flag |= BLK_MTD_CONT_WRITE;
+	ret = blk_dwrite(dev_desc, s_flash_info.part_offset +
+			 s_flash_info.blk_offset + s_flash_info.page_offset,
 			 FLASH_VENDOR_INFO_SIZE >> 9,
 			 (u8 *)buf);
+	dev_desc->op_flag &= ~(BLK_MTD_CONT_WRITE);
 
-	nand_info.page_offset += nand_info.ops_size;
+	s_flash_info.page_offset += s_flash_info.ops_size;
 	if (ret != (FLASH_VENDOR_INFO_SIZE >> 9)) {
 		err++;
 		if (err > 3)

commit 9ff9a8feadf52a36164e872e730f9e40d856d04b
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Sat Dec 26 11:42:40 2020 +0800

    rockchip: rk356x: setting ebc priority to 0x3
    
    Enable all power domain except npu and gpu.
    
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>
    Change-Id: I3757b8770b6d5a2a96b9d0945bbe536b6d387741

diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c
index c69c79c130..6583f9ba7e 100644
--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
@@ -39,6 +39,14 @@ DECLARE_GLOBAL_DATA_PTR;
 #define CPU_GRF_BASE		0xfdc30000
 #define GRF_CORE_PVTPLL_CON0	(0x10)
 
+#define PMU_PWR_GATE_SFTCON	(0xA0)
+#define PMU_PWR_DWN_ST		(0x98)
+#define PMU_BUS_IDLE_SFTCON0	(0x50)
+#define PMU_BUS_IDLE_ST		(0x68)
+#define PMU_BUS_IDLE_ACK	(0x60)
+
+#define EBC_PRIORITY_REG	(0xfe158008)
+
 enum {
 	/* PMU_GRF_GPIO0C_IOMUX_L */
 	GPIO0C1_SHIFT		= 4,
@@ -730,6 +738,54 @@ void board_debug_uart_init(void)
 #endif
 }
 
+#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
+static void qos_priority_init(void)
+{
+	u32 delay;
+
+	/* enable all pd except npu and gpu */
+	writel(0xffff0000 & ~(BIT(0 + 16) | BIT(1 + 16)),
+	       PMU_BASE_ADDR + PMU_PWR_GATE_SFTCON);
+	delay = 1000;
+	do {
+		udelay(1);
+		delay--;
+		if (delay == 0) {
+			printf("Fail to set domain.");
+			hang();
+		}
+	} while (readl(PMU_BASE_ADDR + PMU_PWR_DWN_ST) & ~(BIT(0) | BIT(1)));
+
+	/* release all idle request except npu and gpu */
+	writel(0xffff0000 & ~(BIT(1 + 16) | BIT(2 + 16)),
+	       PMU_BASE_ADDR + PMU_BUS_IDLE_SFTCON0);
+
+	delay = 1000;
+	/* wait ack status */
+	do {
+		udelay(1);
+		delay--;
+		if (delay == 0) {
+			printf("Fail to get ack on domain.\n");
+			hang();
+		}
+	} while (readl(PMU_BASE_ADDR + PMU_BUS_IDLE_ACK) & ~(BIT(1) | BIT(2)));
+
+	delay = 1000;
+	/* wait idle status */
+	do {
+		udelay(1);
+		delay--;
+		if (delay == 0) {
+			printf("Fail to set idle on domain.\n");
+			hang();
+		}
+	} while (readl(PMU_BASE_ADDR + PMU_BUS_IDLE_ST) & ~(BIT(1) | BIT(2)));
+
+	writel(0x303, EBC_PRIORITY_REG);
+}
+#endif
+
 int arch_cpu_init(void)
 {
 #ifdef CONFIG_SPL_BUILD
@@ -765,6 +821,10 @@ int arch_cpu_init(void)
 
 	/* Set core pvtpll ring length */
 	writel(0x00ff002b, CPU_GRF_BASE + GRF_CORE_PVTPLL_CON0);
+
+#ifndef CONFIG_TPL_BUILD
+	qos_priority_init();
+#endif
 #endif
 
 	return 0;

commit bee25ee6741343be902b61e530cfb437f66b5801
Author: Guochun Huang <hero.huang@rock-chips.com>
Date:   Thu Dec 24 09:23:55 2020 +0800

    video/drm: remove DSI special assign
    
    these flags will be used by other output interface, so remove
    DSI special assign.
    
    Change-Id: Ieb3a20e62c2b899e6757635eced86b85e1fb22f7
    Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>

diff --git a/drivers/video/drm/dw_mipi_dsi.c b/drivers/video/drm/dw_mipi_dsi.c
index 81f9f07f4b..0ea2ed5255 100644
--- a/drivers/video/drm/dw_mipi_dsi.c
+++ b/drivers/video/drm/dw_mipi_dsi.c
@@ -1109,7 +1109,7 @@ static int dw_mipi_dsi_connector_init(struct display_state *state)
 		if (!dsi->master)
 			return -ENODEV;
 
-		conn_state->output_type = ROCKCHIP_OUTPUT_DSI_DUAL_LINK;
+		conn_state->output_flags = ROCKCHIP_OUTPUT_DATA_SWAP;
 	}
 #endif
 
@@ -1138,7 +1138,8 @@ static int dw_mipi_dsi_connector_init(struct display_state *state)
 		dsi->slave->format = dsi->format;
 		dsi->slave->mode_flags = dsi->mode_flags;
 		dsi->slave->channel = dsi->channel;
-		conn_state->output_type = ROCKCHIP_OUTPUT_DSI_DUAL_CHANNEL;
+		conn_state->output_flags =
+				ROCKCHIP_OUTPUT_DUAL_CHANNEL_LEFT_RIGHT_MODE;
 		conn_state->output_if |= VOP_OUTPUT_IF_MIPI1;
 
 #if defined(CONFIG_ROCKCHIP_RK3568)
diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index 4b136556a6..dcf28fcc59 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -12,9 +12,6 @@
 #include <edid.h>
 #include <dm/ofnode.h>
 
-#define ROCKCHIP_OUTPUT_DSI_DUAL_CHANNEL	BIT(0)
-#define ROCKCHIP_OUTPUT_DSI_DUAL_LINK		BIT(1)
-
 #define ROCKCHIP_OUTPUT_DUAL_CHANNEL_LEFT_RIGHT_MODE	BIT(0)
 #define ROCKCHIP_OUTPUT_DUAL_CHANNEL_ODD_EVEN_MODE	BIT(1)
 #define ROCKCHIP_OUTPUT_DATA_SWAP			BIT(2)
@@ -139,7 +136,6 @@ struct connector_state {
 	int bus_format;
 	int output_mode;
 	int type;
-	int output_type;
 	int output_if;
 	int output_flags;
 	int color_space;
diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index aa3d0c5f9c..89d5852e19 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -311,9 +311,9 @@ static int rockchip_vop_init(struct display_state *state)
 		VOP_CTRL_SET(vop, mipi_pin_pol, val);
 		VOP_CTRL_SET(vop, mipi_dclk_pol, dclk_inv);
 		VOP_CTRL_SET(vop, mipi_dual_channel_en,
-			!!(conn_state->output_type & ROCKCHIP_OUTPUT_DSI_DUAL_CHANNEL));
+			!!(conn_state->output_flags & ROCKCHIP_OUTPUT_DUAL_CHANNEL_LEFT_RIGHT_MODE));
 		VOP_CTRL_SET(vop, data01_swap,
-			!!(conn_state->output_type & ROCKCHIP_OUTPUT_DSI_DUAL_LINK) ||
+			!!(conn_state->output_flags & ROCKCHIP_OUTPUT_DATA_SWAP) ||
 			crtc_state->dual_channel_swap);
 		break;
 	case DRM_MODE_CONNECTOR_DisplayPort:

commit 0309acda6dfd89e1d58dadc772c8692c6ae1c00a
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Thu Dec 10 03:29:41 2020 +0000

    configs: rk3568: Add support for edp
    
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
    Change-Id: Id13e7f7964bbddfaa2ff8eb13ec58336abdc0a2b

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index 1fdf48030a..a83fbeb7d2 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -118,6 +118,7 @@ CONFIG_SPI_FLASH_XMC=y
 CONFIG_SPI_FLASH_MTD=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_NANENG_EDP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
@@ -167,6 +168,7 @@ CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_INNO_MIPI_PHY=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
 CONFIG_LCD=y
 CONFIG_ROCKCHIP_EINK=y
 CONFIG_ROCKCHIP_EBC_TCON=y

commit 699c29a5d80f45e5b555411fbd58aa642bd14a02
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Thu Dec 10 03:27:32 2020 +0000

    video/drm: analogix_dp: Add support for rk3568
    
    This patch adds support for Analogix eDP TX IP used on RK3568 SoC.
    
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
    Change-Id: Ia48f1f99f336d4d98d5fba4e5fd15a35bdbaf373

diff --git a/drivers/video/drm/analogix_dp.c b/drivers/video/drm/analogix_dp.c
index 1b32bf3a18..46b080ed0a 100644
--- a/drivers/video/drm/analogix_dp.c
+++ b/drivers/video/drm/analogix_dp.c
@@ -27,13 +27,15 @@
  * @lcdsel_grf_reg: grf register offset of lcdc select
  * @lcdsel_big: reg value of selecting vop big for eDP
  * @lcdsel_lit: reg value of selecting vop little for eDP
+ * @chip_type: specific chip type
+ * @ssc: check if SSC is supported by source
  */
 struct rockchip_dp_chip_data {
 	u32	lcdsel_grf_reg;
 	u32	lcdsel_big;
 	u32	lcdsel_lit;
 	u32	chip_type;
-	bool	has_vop_sel;
+	bool    ssc;
 };
 
 static void
@@ -105,6 +107,14 @@ static int analogix_dp_link_start(struct analogix_dp_device *dp)
 	if (retval)
 		return retval;
 
+	/* Spread AMP if required, enable 8b/10b coding */
+	buf[0] = analogix_dp_ssc_supported(dp) ? DP_SPREAD_AMP_0_5 : 0;
+	buf[1] = DP_SET_ANSI_8B10B;
+	retval = analogix_dp_write_bytes_to_dpcd(dp, DP_DOWNSPREAD_CTRL,
+						 2, buf);
+	if (retval < 0)
+		return retval;
+
 	/* Set TX voltage-swing and pre-emphasis to minimum */
 	for (lane = 0; lane < lane_count; lane++)
 		dp->link_train.training_lane[lane] =
@@ -397,6 +407,8 @@ static int analogix_dp_init_training(struct analogix_dp_device *dp,
 				     enum link_lane_count_type max_lane,
 				     int max_rate)
 {
+	u8 dpcd;
+
 	/*
 	 * MACRO_RST must be applied after the PLL_LOCK to avoid
 	 * the DP inter pair skew issue for at least 10 us
@@ -425,6 +437,9 @@ static int analogix_dp_init_training(struct analogix_dp_device *dp,
 	if (dp->link_train.link_rate > max_rate)
 		dp->link_train.link_rate = max_rate;
 
+	analogix_dp_read_byte_from_dpcd(dp, DP_MAX_DOWNSPREAD, &dpcd);
+	dp->link_train.ssc = !!(dpcd & DP_MAX_DOWNSPREAD_0_5);
+
 	/* All DP analog module power up */
 	analogix_dp_set_analog_power_down(dp, POWER_ALL, 0);
 
@@ -721,14 +736,15 @@ static int analogix_dp_connector_init(struct display_state *state)
 	struct analogix_dp_device *dp = dev_get_priv(conn_state->dev);
 
 	conn_state->type = DRM_MODE_CONNECTOR_eDP;
+	conn_state->output_if |= VOP_OUTPUT_IF_eDP0;
 	conn_state->output_mode = ROCKCHIP_OUT_MODE_AAAA;
 	conn_state->color_space = V4L2_COLORSPACE_DEFAULT;
 
-	/* eDP software reset request */
-	reset_assert(&dp->reset);
+	reset_assert_bulk(&dp->resets);
 	udelay(1);
-	reset_deassert(&dp->reset);
+	reset_deassert_bulk(&dp->resets);
 
+	generic_phy_power_on(&dp->phy);
 	analogix_dp_init_dp(dp);
 
 	return 0;
@@ -762,13 +778,13 @@ static int analogix_dp_connector_enable(struct display_state *state)
 	u32 val;
 	int ret;
 
-	if (pdata->has_vop_sel) {
+	if (pdata->lcdsel_grf_reg) {
 		if (crtc_state->crtc_id)
 			val = pdata->lcdsel_lit;
 		else
 			val = pdata->lcdsel_big;
 
-		writel(val, dp->grf + pdata->lcdsel_grf_reg);
+		writel(val, syscon_get_first_range(ROCKCHIP_SYSCON_GRF) + pdata->lcdsel_grf_reg);
 	}
 
 	switch (conn_state->bpc) {
@@ -840,11 +856,8 @@ static int analogix_dp_probe(struct udevice *dev)
 	int ret;
 
 	dp->reg_base = dev_read_addr_ptr(dev);
-	dp->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	if (IS_ERR(dp->grf))
-		return PTR_ERR(dp->grf);
 
-	ret = reset_get_by_name(dev, "dp", &dp->reset);
+	ret = reset_get_bulk(dev, &dp->resets);
 	if (ret) {
 		dev_err(dev, "failed to get reset control: %d\n", ret);
 		return ret;
@@ -857,10 +870,13 @@ static int analogix_dp_probe(struct udevice *dev)
 		return ret;
 	}
 
+	generic_phy_get_by_name(dev, "dp", &dp->phy);
+
 	dp->force_hpd = dev_read_bool(dev, "force-hpd");
 
 	dp->plat_data.dev_type = ROCKCHIP_DP;
 	dp->plat_data.subdev_type = pdata->chip_type;
+	dp->plat_data.ssc = pdata->ssc;
 	/*
 	 * Like Rockchip DisplayPort TRM indicate that "Main link
 	 * containing 4 physical lanes of 2.7/1.62 Gbps/lane".
@@ -878,7 +894,6 @@ static const struct rockchip_dp_chip_data rk3288_edp_platform_data = {
 	.lcdsel_big = 0 | BIT(21),
 	.lcdsel_lit = BIT(5) | BIT(21),
 	.chip_type = RK3288_DP,
-	.has_vop_sel = true,
 };
 
 static const struct rockchip_connector rk3288_edp_driver_data = {
@@ -888,7 +903,6 @@ static const struct rockchip_connector rk3288_edp_driver_data = {
 
 static const struct rockchip_dp_chip_data rk3368_edp_platform_data = {
 	.chip_type = RK3368_EDP,
-	.has_vop_sel = false,
 };
 
 static const struct rockchip_connector rk3368_edp_driver_data = {
@@ -901,7 +915,6 @@ static const struct rockchip_dp_chip_data rk3399_edp_platform_data = {
 	.lcdsel_big = 0 | BIT(21),
 	.lcdsel_lit = BIT(5) | BIT(21),
 	.chip_type = RK3399_EDP,
-	.has_vop_sel = true,
 };
 
 static const struct rockchip_connector rk3399_edp_driver_data = {
@@ -909,6 +922,16 @@ static const struct rockchip_connector rk3399_edp_driver_data = {
 	 .data = &rk3399_edp_platform_data,
 };
 
+static const struct rockchip_dp_chip_data rk3568_edp_platform_data = {
+	.chip_type = RK3568_EDP,
+	.ssc = true,
+};
+
+static const struct rockchip_connector rk3568_edp_driver_data = {
+	 .funcs = &analogix_dp_connector_funcs,
+	 .data = &rk3568_edp_platform_data,
+};
+
 static const struct udevice_id analogix_dp_ids[] = {
 	{
 		.compatible = "rockchip,rk3288-dp",
@@ -919,6 +942,9 @@ static const struct udevice_id analogix_dp_ids[] = {
 	}, {
 		.compatible = "rockchip,rk3399-edp",
 		.data = (ulong)&rk3399_edp_driver_data,
+	}, {
+		.compatible = "rockchip,rk3568-edp",
+		.data = (ulong)&rk3568_edp_driver_data,
 	},
 	{}
 };
diff --git a/drivers/video/drm/analogix_dp.h b/drivers/video/drm/analogix_dp.h
index 8245b1ed9d..c7f8d49668 100644
--- a/drivers/video/drm/analogix_dp.h
+++ b/drivers/video/drm/analogix_dp.h
@@ -7,6 +7,7 @@
 #ifndef __DRM_ANALOGIX_DP_H__
 #define __DRM_ANALOGIX_DP_H__
 
+#include <generic-phy.h>
 #include <reset.h>
 
 #include <drm/drm_dp_helper.h>
@@ -515,6 +516,7 @@ struct link_train {
 	u8 link_rate;
 	u8 lane_count;
 	u8 training_lane[4];
+	bool ssc;
 
 	enum link_training_state lt_state;
 };
@@ -528,18 +530,20 @@ enum analogix_dp_sub_devtype {
 	RK3288_DP,
 	RK3368_EDP,
 	RK3399_EDP,
+	RK3568_EDP,
 };
 
 struct analogix_dp_plat_data {
 	enum analogix_dp_devtype dev_type;
 	enum analogix_dp_sub_devtype subdev_type;
+	bool ssc;
 };
 
 struct analogix_dp_device {
 	struct udevice *dev;
 	void *reg_base;
-	void *grf;
-	struct reset_ctl reset;
+	struct phy phy;
+	struct reset_ctl_bulk resets;
 	struct gpio_desc hpd_gpio;
 	bool force_hpd;
 	struct video_info	video_info;
@@ -628,5 +632,6 @@ int analogix_dp_is_video_stream_on(struct analogix_dp_device *dp);
 void analogix_dp_config_video_slave_mode(struct analogix_dp_device *dp);
 void analogix_dp_enable_scrambling(struct analogix_dp_device *dp);
 void analogix_dp_disable_scrambling(struct analogix_dp_device *dp);
+bool analogix_dp_ssc_supported(struct analogix_dp_device *dp);
 
 #endif /* __DRM_ANALOGIX_DP__ */
diff --git a/drivers/video/drm/analogix_dp_reg.c b/drivers/video/drm/analogix_dp_reg.c
index f129a37921..e27d60a9ea 100644
--- a/drivers/video/drm/analogix_dp_reg.c
+++ b/drivers/video/drm/analogix_dp_reg.c
@@ -906,8 +906,15 @@ int analogix_dp_read_bytes_from_i2c(struct analogix_dp_device *dp,
 	return retval;
 }
 
+bool analogix_dp_ssc_supported(struct analogix_dp_device *dp)
+{
+	/* Check if SSC is supported by both sides */
+	return dp->plat_data.ssc && dp->link_train.ssc;
+}
+
 void analogix_dp_set_link_bandwidth(struct analogix_dp_device *dp, u32 bwtype)
 {
+	union phy_configure_opts phy_cfg;
 	u32 reg, status;
 	int ret;
 
@@ -915,6 +922,20 @@ void analogix_dp_set_link_bandwidth(struct analogix_dp_device *dp, u32 bwtype)
 	if ((bwtype == DP_LINK_BW_2_7) || (bwtype == DP_LINK_BW_1_62))
 		analogix_dp_write(dp, ANALOGIX_DP_LINK_BW_SET, reg);
 
+	phy_cfg.dp.lanes = dp->link_train.lane_count;
+	phy_cfg.dp.link_rate =
+		drm_dp_bw_code_to_link_rate(dp->link_train.link_rate) / 100;
+	phy_cfg.dp.ssc = analogix_dp_ssc_supported(dp);
+	phy_cfg.dp.set_lanes = false;
+	phy_cfg.dp.set_rate = true;
+	phy_cfg.dp.set_voltages = false;
+	ret = generic_phy_configure(&dp->phy, &phy_cfg);
+	if (ret) {
+		dev_err(dp->dev, "%s: phy_configure() failed: %d\n",
+			__func__, ret);
+		return;
+	}
+
 	ret = readx_poll_timeout(analogix_dp_get_pll_lock_status, dp, status,
 				 status != PLL_UNLOCKED,
 				 120 * DP_TIMEOUT_LOOP_COUNT);
@@ -934,10 +955,23 @@ void analogix_dp_get_link_bandwidth(struct analogix_dp_device *dp, u32 *bwtype)
 
 void analogix_dp_set_lane_count(struct analogix_dp_device *dp, u32 count)
 {
+	union phy_configure_opts phy_cfg;
 	u32 reg;
+	int ret;
 
 	reg = count;
 	analogix_dp_write(dp, ANALOGIX_DP_LANE_COUNT_SET, reg);
+
+	phy_cfg.dp.lanes = dp->link_train.lane_count;
+	phy_cfg.dp.set_lanes = true;
+	phy_cfg.dp.set_rate = false;
+	phy_cfg.dp.set_voltages = false;
+	ret = generic_phy_configure(&dp->phy, &phy_cfg);
+	if (ret) {
+		dev_err(dp->dev, "%s: phy_configure() failed: %d\n",
+			__func__, ret);
+		return;
+	}
 }
 
 void analogix_dp_get_lane_count(struct analogix_dp_device *dp, u32 *count)
@@ -950,12 +984,36 @@ void analogix_dp_get_lane_count(struct analogix_dp_device *dp, u32 *count)
 
 void analogix_dp_set_lane_link_training(struct analogix_dp_device *dp)
 {
+	union phy_configure_opts phy_cfg;
 	u8 lane;
+	int ret;
+
+	for (lane = 0; lane < dp->link_train.lane_count; lane++) {
+		u8 training_lane = dp->link_train.training_lane[lane];
+		u8 vs, pe;
 
-	for (lane = 0; lane < dp->link_train.lane_count; lane++)
 		analogix_dp_write(dp,
 				  ANALOGIX_DP_LN0_LINK_TRAINING_CTL + 4 * lane,
 				  dp->link_train.training_lane[lane]);
+
+		vs = (training_lane >> DP_TRAIN_VOLTAGE_SWING_SHIFT) &
+		     DP_TRAIN_VOLTAGE_SWING_MASK;
+		pe = (training_lane >> DP_TRAIN_PRE_EMPHASIS_SHIFT) &
+		     DP_TRAIN_PRE_EMPHASIS_MASK;
+		phy_cfg.dp.voltage[lane] = vs;
+		phy_cfg.dp.pre[lane] = pe;
+	}
+
+	phy_cfg.dp.lanes = dp->link_train.lane_count;
+	phy_cfg.dp.set_lanes = false;
+	phy_cfg.dp.set_rate = false;
+	phy_cfg.dp.set_voltages = true;
+	ret = generic_phy_configure(&dp->phy, &phy_cfg);
+	if (ret) {
+		dev_err(dp->dev, "%s: phy_configure() failed: %d\n",
+			__func__, ret);
+		return;
+	}
 }
 
 u32 analogix_dp_get_lane_link_training(struct analogix_dp_device *dp, u8 lane)

commit c5b1fb658e875527ff697577093ef07f23309ec9
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Thu Dec 10 06:18:20 2020 +0000

    video/drm: Add dp helper
    
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
    Change-Id: I559f7288038c9b1128f64e56ea7f156a1f643f33

diff --git a/drivers/video/drm/Kconfig b/drivers/video/drm/Kconfig
index 015d0ba0fe..71db4179dc 100644
--- a/drivers/video/drm/Kconfig
+++ b/drivers/video/drm/Kconfig
@@ -11,6 +11,10 @@ menuconfig DRM_ROCKCHIP
 	  This driver supports the on-chip video output device, and targets the
 	  Rockchip RK3288 and RK3399.
 
+config DRM_DP_HELPER
+	bool
+	depends on DRM_ROCKCHIP
+
 config DRM_ROCKCHIP_PANEL
 	bool "Rockchip Panel Support"
 	depends on DRM_ROCKCHIP
@@ -80,6 +84,7 @@ config DRM_ROCKCHIP_ANALOGIX_DP
 	bool "Rockchip specific extensions for Analogix DP driver"
 	depends on DRM_ROCKCHIP
 	select DRM_ROCKCHIP_PANEL
+	select DRM_DP_HELPER
 	help
 	  This selects support for Rockchip SoC specific extensions
 	  for the Analogix Core DP driver. If you want to enable DP
diff --git a/drivers/video/drm/Makefile b/drivers/video/drm/Makefile
index 65835255f5..a1af938ee4 100644
--- a/drivers/video/drm/Makefile
+++ b/drivers/video/drm/Makefile
@@ -8,6 +8,7 @@ obj-y += rockchip_display.o rockchip_crtc.o rockchip_phy.o rockchip_bridge.o \
 		rockchip_vop.o rockchip_vop_reg.o rockchip_vop2.o bmp_helper.o
 
 obj-$(CONFIG_DRM_MIPI_DSI) += drm_mipi_dsi.o
+obj-$(CONFIG_DRM_DP_HELPER) += drm_dp_helper.o
 obj-$(CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI) += dw_mipi_dsi.o
 obj-$(CONFIG_DRM_ROCKCHIP_DW_HDMI) += rockchip_dw_hdmi.o dw_hdmi.o
 obj-$(CONFIG_ROCKCHIP_INNO_HDMI_PHY) += rockchip-inno-hdmi-phy.o
diff --git a/drivers/video/drm/analogix_dp.h b/drivers/video/drm/analogix_dp.h
index dddabe2efd..8245b1ed9d 100644
--- a/drivers/video/drm/analogix_dp.h
+++ b/drivers/video/drm/analogix_dp.h
@@ -9,541 +9,7 @@
 
 #include <reset.h>
 
-/*
- * Unless otherwise noted, all values are from the DP 1.1a spec.  Note that
- * DP and DPCD versions are independent.  Differences from 1.0 are not noted,
- * 1.0 devices basically don't exist in the wild.
- *
- * Abbreviations, in chronological order:
- *
- * eDP: Embedded DisplayPort version 1
- * DPI: DisplayPort Interoperability Guideline v1.1a
- * 1.2: DisplayPort 1.2
- * MST: Multistream Transport - part of DP 1.2a
- *
- * 1.2 formally includes both eDP and DPI definitions.
- */
-
-#define DP_AUX_MAX_PAYLOAD_BYTES	16
-
-#define DP_AUX_I2C_WRITE		0x0
-#define DP_AUX_I2C_READ			0x1
-#define DP_AUX_I2C_WRITE_STATUS_UPDATE	0x2
-#define DP_AUX_I2C_MOT			0x4
-#define DP_AUX_NATIVE_WRITE		0x8
-#define DP_AUX_NATIVE_READ		0x9
-
-#define DP_AUX_NATIVE_REPLY_ACK		(0x0 << 0)
-#define DP_AUX_NATIVE_REPLY_NACK	(0x1 << 0)
-#define DP_AUX_NATIVE_REPLY_DEFER	(0x2 << 0)
-#define DP_AUX_NATIVE_REPLY_MASK	(0x3 << 0)
-
-#define DP_AUX_I2C_REPLY_ACK		(0x0 << 2)
-#define DP_AUX_I2C_REPLY_NACK		(0x1 << 2)
-#define DP_AUX_I2C_REPLY_DEFER		(0x2 << 2)
-#define DP_AUX_I2C_REPLY_MASK		(0x3 << 2)
-
-/* AUX CH addresses */
-/* DPCD */
-#define DP_DPCD_REV                         0x000
-
-#define DP_MAX_LINK_RATE                    0x001
-
-#define DP_MAX_LANE_COUNT                   0x002
-# define DP_MAX_LANE_COUNT_MASK		    0x1f
-# define DP_TPS3_SUPPORTED		    (1 << 6) /* 1.2 */
-# define DP_ENHANCED_FRAME_CAP		    (1 << 7)
-
-#define DP_MAX_DOWNSPREAD                   0x003
-# define DP_NO_AUX_HANDSHAKE_LINK_TRAINING  (1 << 6)
-
-#define DP_NORP                             0x004
-
-#define DP_DOWNSTREAMPORT_PRESENT           0x005
-# define DP_DWN_STRM_PORT_PRESENT           (1 << 0)
-# define DP_DWN_STRM_PORT_TYPE_MASK         0x06
-# define DP_DWN_STRM_PORT_TYPE_DP           (0 << 1)
-# define DP_DWN_STRM_PORT_TYPE_ANALOG       (1 << 1)
-# define DP_DWN_STRM_PORT_TYPE_TMDS         (2 << 1)
-# define DP_DWN_STRM_PORT_TYPE_OTHER        (3 << 1)
-# define DP_FORMAT_CONVERSION               (1 << 3)
-# define DP_DETAILED_CAP_INFO_AVAILABLE	    (1 << 4) /* DPI */
-
-#define DP_MAIN_LINK_CHANNEL_CODING         0x006
-
-#define DP_DOWN_STREAM_PORT_COUNT	    0x007
-# define DP_PORT_COUNT_MASK		    0x0f
-# define DP_MSA_TIMING_PAR_IGNORED	    (1 << 6) /* eDP */
-# define DP_OUI_SUPPORT			    (1 << 7)
-
-#define DP_RECEIVE_PORT_0_CAP_0		    0x008
-# define DP_LOCAL_EDID_PRESENT		    (1 << 1)
-# define DP_ASSOCIATED_TO_PRECEDING_PORT    (1 << 2)
-
-#define DP_RECEIVE_PORT_0_BUFFER_SIZE	    0x009
-
-#define DP_RECEIVE_PORT_1_CAP_0		    0x00a
-#define DP_RECEIVE_PORT_1_BUFFER_SIZE       0x00b
-
-#define DP_I2C_SPEED_CAP		    0x00c    /* DPI */
-# define DP_I2C_SPEED_1K		    0x01
-# define DP_I2C_SPEED_5K		    0x02
-# define DP_I2C_SPEED_10K		    0x04
-# define DP_I2C_SPEED_100K		    0x08
-# define DP_I2C_SPEED_400K		    0x10
-# define DP_I2C_SPEED_1M		    0x20
-
-#define DP_EDP_CONFIGURATION_CAP            0x00d   /* XXX 1.2? */
-# define DP_ALTERNATE_SCRAMBLER_RESET_CAP   (1 << 0)
-# define DP_FRAMING_CHANGE_CAP		    (1 << 1)
-# define DP_DPCD_DISPLAY_CONTROL_CAPABLE     (1 << 3) /* edp v1.2 or higher */
-
-#define DP_TRAINING_AUX_RD_INTERVAL         0x00e   /* XXX 1.2? */
-
-#define DP_ADAPTER_CAP			    0x00f   /* 1.2 */
-# define DP_FORCE_LOAD_SENSE_CAP	    (1 << 0)
-# define DP_ALTERNATE_I2C_PATTERN_CAP	    (1 << 1)
-
-#define DP_SUPPORTED_LINK_RATES		    0x010 /* eDP 1.4 */
-# define DP_MAX_SUPPORTED_RATES		     8	    /* 16-bit little-endian */
-
-/* Multiple stream transport */
-#define DP_FAUX_CAP			    0x020   /* 1.2 */
-# define DP_FAUX_CAP_1			    (1 << 0)
-
-#define DP_MSTM_CAP			    0x021   /* 1.2 */
-# define DP_MST_CAP			    (1 << 0)
-
-#define DP_NUMBER_OF_AUDIO_ENDPOINTS	    0x022   /* 1.2 */
-
-/* AV_SYNC_DATA_BLOCK                                  1.2 */
-#define DP_AV_GRANULARITY		    0x023
-# define DP_AG_FACTOR_MASK		    (0xf << 0)
-# define DP_AG_FACTOR_3MS		    (0 << 0)
-# define DP_AG_FACTOR_2MS		    (1 << 0)
-# define DP_AG_FACTOR_1MS		    (2 << 0)
-# define DP_AG_FACTOR_500US		    (3 << 0)
-# define DP_AG_FACTOR_200US		    (4 << 0)
-# define DP_AG_FACTOR_100US		    (5 << 0)
-# define DP_AG_FACTOR_10US		    (6 << 0)
-# define DP_AG_FACTOR_1US		    (7 << 0)
-# define DP_VG_FACTOR_MASK		    (0xf << 4)
-# define DP_VG_FACTOR_3MS		    (0 << 4)
-# define DP_VG_FACTOR_2MS		    (1 << 4)
-# define DP_VG_FACTOR_1MS		    (2 << 4)
-# define DP_VG_FACTOR_500US		    (3 << 4)
-# define DP_VG_FACTOR_200US		    (4 << 4)
-# define DP_VG_FACTOR_100US		    (5 << 4)
-
-#define DP_AUD_DEC_LAT0			    0x024
-#define DP_AUD_DEC_LAT1			    0x025
-
-#define DP_AUD_PP_LAT0			    0x026
-#define DP_AUD_PP_LAT1			    0x027
-
-#define DP_VID_INTER_LAT		    0x028
-
-#define DP_VID_PROG_LAT			    0x029
-
-#define DP_REP_LAT			    0x02a
-
-#define DP_AUD_DEL_INS0			    0x02b
-#define DP_AUD_DEL_INS1			    0x02c
-#define DP_AUD_DEL_INS2			    0x02d
-/* End of AV_SYNC_DATA_BLOCK */
-
-#define DP_RECEIVER_ALPM_CAP		    0x02e   /* eDP 1.4 */
-# define DP_ALPM_CAP			    (1 << 0)
-
-#define DP_SINK_DEVICE_AUX_FRAME_SYNC_CAP   0x02f   /* eDP 1.4 */
-# define DP_AUX_FRAME_SYNC_CAP		    (1 << 0)
-
-#define DP_GUID				    0x030   /* 1.2 */
-
-#define DP_PSR_SUPPORT                      0x070   /* XXX 1.2? */
-# define DP_PSR_IS_SUPPORTED                1
-# define DP_PSR2_IS_SUPPORTED		    2	    /* eDP 1.4 */
-
-#define DP_PSR_CAPS                         0x071   /* XXX 1.2? */
-# define DP_PSR_NO_TRAIN_ON_EXIT            1
-# define DP_PSR_SETUP_TIME_330              (0 << 1)
-# define DP_PSR_SETUP_TIME_275              (1 << 1)
-# define DP_PSR_SETUP_TIME_220              (2 << 1)
-# define DP_PSR_SETUP_TIME_165              (3 << 1)
-# define DP_PSR_SETUP_TIME_110              (4 << 1)
-# define DP_PSR_SETUP_TIME_55               (5 << 1)
-# define DP_PSR_SETUP_TIME_0                (6 << 1)
-# define DP_PSR_SETUP_TIME_MASK             (7 << 1)
-# define DP_PSR_SETUP_TIME_SHIFT            1
-
-/*
- * 0x80-0x8f describe downstream port capabilities, but there are two layouts
- * based on whether DP_DETAILED_CAP_INFO_AVAILABLE was set.  If it was not,
- * each port's descriptor is one byte wide.  If it was set, each port's is
- * four bytes wide, starting with the one byte from the base info.  As of
- * DP interop v1.1a only VGA defines additional detail.
- */
-
-/* offset 0 */
-#define DP_DOWNSTREAM_PORT_0		    0x80
-# define DP_DS_PORT_TYPE_MASK		    (7 << 0)
-# define DP_DS_PORT_TYPE_DP		    0
-# define DP_DS_PORT_TYPE_VGA		    1
-# define DP_DS_PORT_TYPE_DVI		    2
-# define DP_DS_PORT_TYPE_HDMI		    3
-# define DP_DS_PORT_TYPE_NON_EDID	    4
-# define DP_DS_PORT_HPD			    (1 << 3)
-/* offset 1 for VGA is maximum megapixels per second / 8 */
-/* offset 2 */
-# define DP_DS_VGA_MAX_BPC_MASK		    (3 << 0)
-# define DP_DS_VGA_8BPC			    0
-# define DP_DS_VGA_10BPC		    1
-# define DP_DS_VGA_12BPC		    2
-# define DP_DS_VGA_16BPC		    3
-
-/* link configuration */
-#define	DP_LINK_BW_SET		            0x100
-# define DP_LINK_RATE_TABLE		    0x00    /* eDP 1.4 */
-# define DP_LINK_BW_1_62		    0x06
-# define DP_LINK_BW_2_7			    0x0a
-# define DP_LINK_BW_5_4			    0x14    /* 1.2 */
-
-#define DP_LANE_COUNT_SET	            0x101
-# define DP_LANE_COUNT_MASK		    0x0f
-# define DP_LANE_COUNT_ENHANCED_FRAME_EN    (1 << 7)
-
-#define DP_TRAINING_PATTERN_SET	            0x102
-# define DP_TRAINING_PATTERN_DISABLE	    0
-# define DP_TRAINING_PATTERN_1		    1
-# define DP_TRAINING_PATTERN_2		    2
-# define DP_TRAINING_PATTERN_3		    3	    /* 1.2 */
-# define DP_TRAINING_PATTERN_MASK	    0x3
-
-/* DPCD 1.1 only. For DPCD >= 1.2 see per-lane DP_LINK_QUAL_LANEn_SET */
-# define DP_LINK_QUAL_PATTERN_11_DISABLE    (0 << 2)
-# define DP_LINK_QUAL_PATTERN_11_D10_2	    (1 << 2)
-# define DP_LINK_QUAL_PATTERN_11_ERROR_RATE (2 << 2)
-# define DP_LINK_QUAL_PATTERN_11_PRBS7	    (3 << 2)
-# define DP_LINK_QUAL_PATTERN_11_MASK	    (3 << 2)
-
-# define DP_RECOVERED_CLOCK_OUT_EN	    (1 << 4)
-# define DP_LINK_SCRAMBLING_DISABLE	    (1 << 5)
-
-# define DP_SYMBOL_ERROR_COUNT_BOTH	    (0 << 6)
-# define DP_SYMBOL_ERROR_COUNT_DISPARITY    (1 << 6)
-# define DP_SYMBOL_ERROR_COUNT_SYMBOL	    (2 << 6)
-# define DP_SYMBOL_ERROR_COUNT_MASK	    (3 << 6)
-
-#define DP_TRAINING_LANE0_SET		    0x103
-#define DP_TRAINING_LANE1_SET		    0x104
-#define DP_TRAINING_LANE2_SET		    0x105
-#define DP_TRAINING_LANE3_SET		    0x106
-
-# define DP_TRAIN_VOLTAGE_SWING_MASK	    0x3
-# define DP_TRAIN_VOLTAGE_SWING_SHIFT	    0
-# define DP_TRAIN_MAX_SWING_REACHED	    (1 << 2)
-# define DP_TRAIN_VOLTAGE_SWING_LEVEL_0 (0 << 0)
-# define DP_TRAIN_VOLTAGE_SWING_LEVEL_1 (1 << 0)
-# define DP_TRAIN_VOLTAGE_SWING_LEVEL_2 (2 << 0)
-# define DP_TRAIN_VOLTAGE_SWING_LEVEL_3 (3 << 0)
-
-# define DP_TRAIN_PRE_EMPHASIS_MASK	    (3 << 3)
-# define DP_TRAIN_PRE_EMPH_LEVEL_0		(0 << 3)
-# define DP_TRAIN_PRE_EMPH_LEVEL_1		(1 << 3)
-# define DP_TRAIN_PRE_EMPH_LEVEL_2		(2 << 3)
-# define DP_TRAIN_PRE_EMPH_LEVEL_3		(3 << 3)
-
-# define DP_TRAIN_PRE_EMPHASIS_SHIFT	    3
-# define DP_TRAIN_MAX_PRE_EMPHASIS_REACHED  (1 << 5)
-
-#define DP_DOWNSPREAD_CTRL		    0x107
-# define DP_SPREAD_AMP_0_5		    (1 << 4)
-# define DP_MSA_TIMING_PAR_IGNORE_EN	    (1 << 7) /* eDP */
-
-#define DP_MAIN_LINK_CHANNEL_CODING_SET	    0x108
-# define DP_SET_ANSI_8B10B		    (1 << 0)
-
-#define DP_I2C_SPEED_CONTROL_STATUS	    0x109   /* DPI */
-/* bitmask as for DP_I2C_SPEED_CAP */
-
-#define DP_EDP_CONFIGURATION_SET            0x10a   /* XXX 1.2? */
-# define DP_ALTERNATE_SCRAMBLER_RESET_ENABLE (1 << 0)
-# define DP_FRAMING_CHANGE_ENABLE	    (1 << 1)
-# define DP_PANEL_SELF_TEST_ENABLE	    (1 << 7)
-
-#define DP_LINK_QUAL_LANE0_SET		    0x10b   /* DPCD >= 1.2 */
-#define DP_LINK_QUAL_LANE1_SET		    0x10c
-#define DP_LINK_QUAL_LANE2_SET		    0x10d
-#define DP_LINK_QUAL_LANE3_SET		    0x10e
-# define DP_LINK_QUAL_PATTERN_DISABLE	    0
-# define DP_LINK_QUAL_PATTERN_D10_2	    1
-# define DP_LINK_QUAL_PATTERN_ERROR_RATE    2
-# define DP_LINK_QUAL_PATTERN_PRBS7	    3
-# define DP_LINK_QUAL_PATTERN_80BIT_CUSTOM  4
-# define DP_LINK_QUAL_PATTERN_HBR2_EYE      5
-# define DP_LINK_QUAL_PATTERN_MASK	    7
-
-#define DP_TRAINING_LANE0_1_SET2	    0x10f
-#define DP_TRAINING_LANE2_3_SET2	    0x110
-# define DP_LANE02_POST_CURSOR2_SET_MASK    (3 << 0)
-# define DP_LANE02_MAX_POST_CURSOR2_REACHED (1 << 2)
-# define DP_LANE13_POST_CURSOR2_SET_MASK    (3 << 4)
-# define DP_LANE13_MAX_POST_CURSOR2_REACHED (1 << 6)
-
-#define DP_MSTM_CTRL			    0x111   /* 1.2 */
-# define DP_MST_EN			    (1 << 0)
-# define DP_UP_REQ_EN			    (1 << 1)
-# define DP_UPSTREAM_IS_SRC		    (1 << 2)
-
-#define DP_AUDIO_DELAY0			    0x112   /* 1.2 */
-#define DP_AUDIO_DELAY1			    0x113
-#define DP_AUDIO_DELAY2			    0x114
-
-#define DP_LINK_RATE_SET		    0x115   /* eDP 1.4 */
-# define DP_LINK_RATE_SET_SHIFT		    0
-# define DP_LINK_RATE_SET_MASK		    (7 << 0)
-
-#define DP_RECEIVER_ALPM_CONFIG		    0x116   /* eDP 1.4 */
-# define DP_ALPM_ENABLE			    (1 << 0)
-# define DP_ALPM_LOCK_ERROR_IRQ_HPD_ENABLE  (1 << 1)
-
-#define DP_SINK_DEVICE_AUX_FRAME_SYNC_CONF  0x117   /* eDP 1.4 */
-# define DP_AUX_FRAME_SYNC_ENABLE	    (1 << 0)
-# define DP_IRQ_HPD_ENABLE		    (1 << 1)
-
-#define DP_UPSTREAM_DEVICE_DP_PWR_NEED	    0x118   /* 1.2 */
-# define DP_PWR_NOT_NEEDED		    (1 << 0)
-
-#define DP_AUX_FRAME_SYNC_VALUE		    0x15c   /* eDP 1.4 */
-# define DP_AUX_FRAME_SYNC_VALID	    (1 << 0)
-
-#define DP_PSR_EN_CFG			    0x170   /* XXX 1.2? */
-# define DP_PSR_ENABLE			    (1 << 0)
-# define DP_PSR_MAIN_LINK_ACTIVE	    (1 << 1)
-# define DP_PSR_CRC_VERIFICATION	    (1 << 2)
-# define DP_PSR_FRAME_CAPTURE		    (1 << 3)
-# define DP_PSR_SELECTIVE_UPDATE	    (1 << 4)
-# define DP_PSR_IRQ_HPD_WITH_CRC_ERRORS     (1 << 5)
-
-#define DP_ADAPTER_CTRL			    0x1a0
-# define DP_ADAPTER_CTRL_FORCE_LOAD_SENSE   (1 << 0)
-
-#define DP_BRANCH_DEVICE_CTRL		    0x1a1
-# define DP_BRANCH_DEVICE_IRQ_HPD	    (1 << 0)
-
-#define DP_PAYLOAD_ALLOCATE_SET		    0x1c0
-#define DP_PAYLOAD_ALLOCATE_START_TIME_SLOT 0x1c1
-#define DP_PAYLOAD_ALLOCATE_TIME_SLOT_COUNT 0x1c2
-
-#define DP_SINK_COUNT			    0x200
-/* prior to 1.2 bit 7 was reserved mbz */
-# define DP_GET_SINK_COUNT(x)		    ((((x) & 0x80) >> 1) | ((x) & 0x3f))
-# define DP_SINK_CP_READY		    (1 << 6)
-
-#define DP_DEVICE_SERVICE_IRQ_VECTOR	    0x201
-# define DP_REMOTE_CONTROL_COMMAND_PENDING  (1 << 0)
-# define DP_AUTOMATED_TEST_REQUEST	    (1 << 1)
-# define DP_CP_IRQ			    (1 << 2)
-# define DP_MCCS_IRQ			    (1 << 3)
-# define DP_DOWN_REP_MSG_RDY		    (1 << 4) /* 1.2 MST */
-# define DP_UP_REQ_MSG_RDY		    (1 << 5) /* 1.2 MST */
-# define DP_SINK_SPECIFIC_IRQ		    (1 << 6)
-
-#define DP_LANE0_1_STATUS		    0x202
-#define DP_LANE2_3_STATUS		    0x203
-# define DP_LANE_CR_DONE		    (1 << 0)
-# define DP_LANE_CHANNEL_EQ_DONE	    (1 << 1)
-# define DP_LANE_SYMBOL_LOCKED		    (1 << 2)
-
-#define DP_CHANNEL_EQ_BITS (DP_LANE_CR_DONE |		\
-			    DP_LANE_CHANNEL_EQ_DONE |	\
-			    DP_LANE_SYMBOL_LOCKED)
-
-#define DP_LANE_ALIGN_STATUS_UPDATED	    0x204
-
-#define DP_INTERLANE_ALIGN_DONE		    (1 << 0)
-#define DP_DOWNSTREAM_PORT_STATUS_CHANGED   (1 << 6)
-#define DP_LINK_STATUS_UPDATED		    (1 << 7)
-
-#define DP_SINK_STATUS			    0x205
-
-#define DP_RECEIVE_PORT_0_STATUS	    (1 << 0)
-#define DP_RECEIVE_PORT_1_STATUS	    (1 << 1)
-
-#define DP_ADJUST_REQUEST_LANE0_1	    0x206
-#define DP_ADJUST_REQUEST_LANE2_3	    0x207
-# define DP_ADJUST_VOLTAGE_SWING_LANE0_MASK  0x03
-# define DP_ADJUST_VOLTAGE_SWING_LANE0_SHIFT 0
-# define DP_ADJUST_PRE_EMPHASIS_LANE0_MASK   0x0c
-# define DP_ADJUST_PRE_EMPHASIS_LANE0_SHIFT  2
-# define DP_ADJUST_VOLTAGE_SWING_LANE1_MASK  0x30
-# define DP_ADJUST_VOLTAGE_SWING_LANE1_SHIFT 4
-# define DP_ADJUST_PRE_EMPHASIS_LANE1_MASK   0xc0
-# define DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT  6
-
-#define DP_TEST_REQUEST			    0x218
-# define DP_TEST_LINK_TRAINING		    (1 << 0)
-# define DP_TEST_LINK_VIDEO_PATTERN	    (1 << 1)
-# define DP_TEST_LINK_EDID_READ		    (1 << 2)
-# define DP_TEST_LINK_PHY_TEST_PATTERN	    (1 << 3) /* DPCD >= 1.1 */
-# define DP_TEST_LINK_FAUX_PATTERN	    (1 << 4) /* DPCD >= 1.2 */
-
-#define DP_TEST_LINK_RATE		    0x219
-# define DP_LINK_RATE_162		    (0x6)
-# define DP_LINK_RATE_27		    (0xa)
-
-#define DP_TEST_LANE_COUNT		    0x220
-
-#define DP_TEST_PATTERN			    0x221
-
-#define DP_TEST_CRC_R_CR		    0x240
-#define DP_TEST_CRC_G_Y			    0x242
-#define DP_TEST_CRC_B_CB		    0x244
-
-#define DP_TEST_SINK_MISC		    0x246
-# define DP_TEST_CRC_SUPPORTED		    (1 << 5)
-# define DP_TEST_COUNT_MASK		    0xf
-
-#define DP_TEST_RESPONSE		    0x260
-# define DP_TEST_ACK			    (1 << 0)
-# define DP_TEST_NAK			    (1 << 1)
-# define DP_TEST_EDID_CHECKSUM_WRITE	    (1 << 2)
-
-#define DP_TEST_EDID_CHECKSUM		    0x261
-
-#define DP_TEST_SINK			    0x270
-# define DP_TEST_SINK_START		    (1 << 0)
-
-#define DP_PAYLOAD_TABLE_UPDATE_STATUS      0x2c0   /* 1.2 MST */
-# define DP_PAYLOAD_TABLE_UPDATED           (1 << 0)
-# define DP_PAYLOAD_ACT_HANDLED             (1 << 1)
-
-#define DP_VC_PAYLOAD_ID_SLOT_1             0x2c1   /* 1.2 MST */
-/* up to ID_SLOT_63 at 0x2ff */
-
-#define DP_SOURCE_OUI			    0x300
-#define DP_SINK_OUI			    0x400
-#define DP_BRANCH_OUI			    0x500
-
-#define DP_SET_POWER                        0x600
-# define DP_SET_POWER_D0                    0x1
-# define DP_SET_POWER_D3                    0x2
-# define DP_SET_POWER_MASK                  0x3
-
-#define DP_EDP_DPCD_REV			    0x700    /* eDP 1.2 */
-# define DP_EDP_11			    0x00
-# define DP_EDP_12			    0x01
-# define DP_EDP_13			    0x02
-# define DP_EDP_14			    0x03
-
-#define DP_EDP_GENERAL_CAP_1		    0x701
-
-#define DP_EDP_BACKLIGHT_ADJUSTMENT_CAP     0x702
-
-#define DP_EDP_GENERAL_CAP_2		    0x703
-
-#define DP_EDP_GENERAL_CAP_3		    0x704    /* eDP 1.4 */
-
-#define DP_EDP_DISPLAY_CONTROL_REGISTER     0x720
-
-#define DP_EDP_BACKLIGHT_MODE_SET_REGISTER  0x721
-
-#define DP_EDP_BACKLIGHT_BRIGHTNESS_MSB     0x722
-#define DP_EDP_BACKLIGHT_BRIGHTNESS_LSB     0x723
-
-#define DP_EDP_PWMGEN_BIT_COUNT             0x724
-#define DP_EDP_PWMGEN_BIT_COUNT_CAP_MIN     0x725
-#define DP_EDP_PWMGEN_BIT_COUNT_CAP_MAX     0x726
-
-#define DP_EDP_BACKLIGHT_CONTROL_STATUS     0x727
-
-#define DP_EDP_BACKLIGHT_FREQ_SET           0x728
-
-#define DP_EDP_BACKLIGHT_FREQ_CAP_MIN_MSB   0x72a
-#define DP_EDP_BACKLIGHT_FREQ_CAP_MIN_MID   0x72b
-#define DP_EDP_BACKLIGHT_FREQ_CAP_MIN_LSB   0x72c
-
-#define DP_EDP_BACKLIGHT_FREQ_CAP_MAX_MSB   0x72d
-#define DP_EDP_BACKLIGHT_FREQ_CAP_MAX_MID   0x72e
-#define DP_EDP_BACKLIGHT_FREQ_CAP_MAX_LSB   0x72f
-
-#define DP_EDP_DBC_MINIMUM_BRIGHTNESS_SET   0x732
-#define DP_EDP_DBC_MAXIMUM_BRIGHTNESS_SET   0x733
-
-#define DP_EDP_REGIONAL_BACKLIGHT_BASE      0x740    /* eDP 1.4 */
-#define DP_EDP_REGIONAL_BACKLIGHT_0	    0x741    /* eDP 1.4 */
-
-#define DP_SIDEBAND_MSG_DOWN_REQ_BASE	    0x1000   /* 1.2 MST */
-#define DP_SIDEBAND_MSG_UP_REP_BASE	    0x1200   /* 1.2 MST */
-#define DP_SIDEBAND_MSG_DOWN_REP_BASE	    0x1400   /* 1.2 MST */
-#define DP_SIDEBAND_MSG_UP_REQ_BASE	    0x1600   /* 1.2 MST */
-
-#define DP_SINK_COUNT_ESI		    0x2002   /* 1.2 */
-/* 0-5 sink count */
-# define DP_SINK_COUNT_CP_READY             (1 << 6)
-
-#define DP_DEVICE_SERVICE_IRQ_VECTOR_ESI0   0x2003   /* 1.2 */
-
-#define DP_DEVICE_SERVICE_IRQ_VECTOR_ESI1   0x2004   /* 1.2 */
-
-#define DP_LINK_SERVICE_IRQ_VECTOR_ESI0     0x2005   /* 1.2 */
-
-#define DP_PSR_ERROR_STATUS                 0x2006  /* XXX 1.2? */
-# define DP_PSR_LINK_CRC_ERROR              (1 << 0)
-# define DP_PSR_RFB_STORAGE_ERROR           (1 << 1)
-# define DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR (1 << 2) /* eDP 1.4 */
-
-#define DP_PSR_ESI                          0x2007  /* XXX 1.2? */
-# define DP_PSR_CAPS_CHANGE                 (1 << 0)
-
-#define DP_PSR_STATUS                       0x2008  /* XXX 1.2? */
-# define DP_PSR_SINK_INACTIVE               0
-# define DP_PSR_SINK_ACTIVE_SRC_SYNCED      1
-# define DP_PSR_SINK_ACTIVE_RFB             2
-# define DP_PSR_SINK_ACTIVE_SINK_SYNCED     3
-# define DP_PSR_SINK_ACTIVE_RESYNC          4
-# define DP_PSR_SINK_INTERNAL_ERROR         7
-# define DP_PSR_SINK_STATE_MASK             0x07
-
-#define DP_RECEIVER_ALPM_STATUS		    0x200b  /* eDP 1.4 */
-# define DP_ALPM_LOCK_TIMEOUT_ERROR	    (1 << 0)
-
-/* DP 1.2 Sideband message defines */
-/* peer device type - DP 1.2a Table 2-92 */
-#define DP_PEER_DEVICE_NONE		0x0
-#define DP_PEER_DEVICE_SOURCE_OR_SST	0x1
-#define DP_PEER_DEVICE_MST_BRANCHING	0x2
-#define DP_PEER_DEVICE_SST_SINK		0x3
-#define DP_PEER_DEVICE_DP_LEGACY_CONV	0x4
-
-/* DP 1.2 MST sideband request names DP 1.2a Table 2-80 */
-#define DP_LINK_ADDRESS			0x01
-#define DP_CONNECTION_STATUS_NOTIFY	0x02
-#define DP_ENUM_PATH_RESOURCES		0x10
-#define DP_ALLOCATE_PAYLOAD		0x11
-#define DP_QUERY_PAYLOAD		0x12
-#define DP_RESOURCE_STATUS_NOTIFY	0x13
-#define DP_CLEAR_PAYLOAD_ID_TABLE	0x14
-#define DP_REMOTE_DPCD_READ		0x20
-#define DP_REMOTE_DPCD_WRITE		0x21
-#define DP_REMOTE_I2C_READ		0x22
-#define DP_REMOTE_I2C_WRITE		0x23
-#define DP_POWER_UP_PHY			0x24
-#define DP_POWER_DOWN_PHY		0x25
-#define DP_SINK_EVENT_NOTIFY		0x30
-#define DP_QUERY_STREAM_ENC_STATUS	0x38
-
-/* DP 1.2 MST sideband nak reasons - table 2.84 */
-#define DP_NAK_WRITE_FAILURE		0x01
-#define DP_NAK_INVALID_READ		0x02
-#define DP_NAK_CRC_FAILURE		0x03
-#define DP_NAK_BAD_PARAM		0x04
-#define DP_NAK_DEFER			0x05
-#define DP_NAK_LINK_FAILURE		0x06
-#define DP_NAK_NO_RESOURCES		0x07
-#define DP_NAK_DPCD_FAIL		0x08
-#define DP_NAK_I2C_NAK			0x09
-#define DP_NAK_ALLOCATE_FAIL		0x0a
+#include <drm/drm_dp_helper.h>
 
 #define ANALOGIX_DP_TX_SW_RESET			0x14
 #define ANALOGIX_DP_FUNC_EN_1			0x18
diff --git a/drivers/video/drm/drm_dp_helper.c b/drivers/video/drm/drm_dp_helper.c
new file mode 100644
index 0000000000..00a58d6a61
--- /dev/null
+++ b/drivers/video/drm/drm_dp_helper.c
@@ -0,0 +1,168 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright © 2009 Keith Packard
+ *
+ * Permission to use, copy, modify, distribute, and sell this software and its
+ * documentation for any purpose is hereby granted without fee, provided that
+ * the above copyright notice appear in all copies and that both that copyright
+ * notice and this permission notice appear in supporting documentation, and
+ * that the name of the copyright holders not be used in advertising or
+ * publicity pertaining to distribution of the software without specific,
+ * written prior permission.  The copyright holders make no representations
+ * about the suitability of this software for any purpose.  It is provided "as
+ * is" without express or implied warranty.
+ *
+ * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+ * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
+ * OF THIS SOFTWARE.
+ */
+
+#include <common.h>
+#include <drm/drm_dp_helper.h>
+
+/**
+ * DOC: dp helpers
+ *
+ * These functions contain some common logic and helpers at various abstraction
+ * levels to deal with Display Port sink devices and related things like DP aux
+ * channel transfers, EDID reading over DP aux channels, decoding certain DPCD
+ * blocks, ...
+ */
+
+/* Helpers for DP link training */
+static u8 dp_link_status(const u8 link_status[DP_LINK_STATUS_SIZE], int r)
+{
+	return link_status[r - DP_LANE0_1_STATUS];
+}
+
+static u8 dp_get_lane_status(const u8 link_status[DP_LINK_STATUS_SIZE],
+			     int lane)
+{
+	int i = DP_LANE0_1_STATUS + (lane >> 1);
+	int s = (lane & 1) * 4;
+	u8 l = dp_link_status(link_status, i);
+
+	return (l >> s) & 0xf;
+}
+
+bool drm_dp_channel_eq_ok(const u8 link_status[DP_LINK_STATUS_SIZE],
+			  int lane_count)
+{
+	u8 lane_align;
+	u8 lane_status;
+	int lane;
+
+	lane_align = dp_link_status(link_status,
+				    DP_LANE_ALIGN_STATUS_UPDATED);
+	if ((lane_align & DP_INTERLANE_ALIGN_DONE) == 0)
+		return false;
+	for (lane = 0; lane < lane_count; lane++) {
+		lane_status = dp_get_lane_status(link_status, lane);
+		if ((lane_status & DP_CHANNEL_EQ_BITS) != DP_CHANNEL_EQ_BITS)
+			return false;
+	}
+	return true;
+}
+
+bool drm_dp_clock_recovery_ok(const u8 link_status[DP_LINK_STATUS_SIZE],
+			      int lane_count)
+{
+	int lane;
+	u8 lane_status;
+
+	for (lane = 0; lane < lane_count; lane++) {
+		lane_status = dp_get_lane_status(link_status, lane);
+		if ((lane_status & DP_LANE_CR_DONE) == 0)
+			return false;
+	}
+	return true;
+}
+
+u8 drm_dp_get_adjust_request_voltage(const u8 link_status[DP_LINK_STATUS_SIZE],
+				     int lane)
+{
+	int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1);
+	int s = ((lane & 1) ?
+		 DP_ADJUST_VOLTAGE_SWING_LANE1_SHIFT :
+		 DP_ADJUST_VOLTAGE_SWING_LANE0_SHIFT);
+	u8 l = dp_link_status(link_status, i);
+
+	return ((l >> s) & 0x3) << DP_TRAIN_VOLTAGE_SWING_SHIFT;
+}
+
+u8 drm_dp_get_adjust_request_pre_emphasis(const u8 link_status[DP_LINK_STATUS_SIZE],
+					  int lane)
+{
+	int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1);
+	int s = ((lane & 1) ?
+		 DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT :
+		 DP_ADJUST_PRE_EMPHASIS_LANE0_SHIFT);
+	u8 l = dp_link_status(link_status, i);
+
+	return ((l >> s) & 0x3) << DP_TRAIN_PRE_EMPHASIS_SHIFT;
+}
+
+void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
+{
+	int rd_interval = dpcd[DP_TRAINING_AUX_RD_INTERVAL] &
+			  DP_TRAINING_AUX_RD_MASK;
+
+	if (rd_interval > 4)
+		printf("AUX interval %d, out of range (max 4)\n", rd_interval);
+
+	if (rd_interval == 0 || dpcd[DP_DPCD_REV] >= DP_DPCD_REV_14)
+		udelay(100);
+	else
+		mdelay(rd_interval * 4);
+}
+
+void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
+{
+	int rd_interval = dpcd[DP_TRAINING_AUX_RD_INTERVAL] &
+			  DP_TRAINING_AUX_RD_MASK;
+
+	if (rd_interval > 4)
+		printf("AUX interval %d, out of range (max 4)\n", rd_interval);
+
+	if (rd_interval == 0)
+		udelay(400);
+	else
+		mdelay(rd_interval * 4);
+}
+
+u8 drm_dp_link_rate_to_bw_code(int link_rate)
+{
+	switch (link_rate) {
+	default:
+		WARN(1, "unknown DP link rate %d, using %x\n", link_rate,
+		     DP_LINK_BW_1_62);
+	case 162000:
+		return DP_LINK_BW_1_62;
+	case 270000:
+		return DP_LINK_BW_2_7;
+	case 540000:
+		return DP_LINK_BW_5_4;
+	case 810000:
+		return DP_LINK_BW_8_1;
+	}
+}
+
+int drm_dp_bw_code_to_link_rate(u8 link_bw)
+{
+	switch (link_bw) {
+	default:
+		WARN(1, "unknown DP link BW code %x, using 162000\n", link_bw);
+	case DP_LINK_BW_1_62:
+		return 162000;
+	case DP_LINK_BW_2_7:
+		return 270000;
+	case DP_LINK_BW_5_4:
+		return 540000;
+	case DP_LINK_BW_8_1:
+		return 810000;
+	}
+}
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
new file mode 100644
index 0000000000..b629a25185
--- /dev/null
+++ b/include/drm/drm_dp_helper.h
@@ -0,0 +1,1064 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright © 2008 Keith Packard
+ *
+ * Permission to use, copy, modify, distribute, and sell this software and its
+ * documentation for any purpose is hereby granted without fee, provided that
+ * the above copyright notice appear in all copies and that both that copyright
+ * notice and this permission notice appear in supporting documentation, and
+ * that the name of the copyright holders not be used in advertising or
+ * publicity pertaining to distribution of the software without specific,
+ * written prior permission.  The copyright holders make no representations
+ * about the suitability of this software for any purpose.  It is provided "as
+ * is" without express or implied warranty.
+ *
+ * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+ * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
+ * OF THIS SOFTWARE.
+ */
+
+#ifndef _DRM_DP_HELPER_H_
+#define _DRM_DP_HELPER_H_
+
+/*
+ * Unless otherwise noted, all values are from the DP 1.1a spec.  Note that
+ * DP and DPCD versions are independent.  Differences from 1.0 are not noted,
+ * 1.0 devices basically don't exist in the wild.
+ *
+ * Abbreviations, in chronological order:
+ *
+ * eDP: Embedded DisplayPort version 1
+ * DPI: DisplayPort Interoperability Guideline v1.1a
+ * 1.2: DisplayPort 1.2
+ * MST: Multistream Transport - part of DP 1.2a
+ *
+ * 1.2 formally includes both eDP and DPI definitions.
+ */
+
+#define DP_AUX_MAX_PAYLOAD_BYTES	16
+
+#define DP_AUX_I2C_WRITE		0x0
+#define DP_AUX_I2C_READ			0x1
+#define DP_AUX_I2C_WRITE_STATUS_UPDATE	0x2
+#define DP_AUX_I2C_MOT			0x4
+#define DP_AUX_NATIVE_WRITE		0x8
+#define DP_AUX_NATIVE_READ		0x9
+
+#define DP_AUX_NATIVE_REPLY_ACK		(0x0 << 0)
+#define DP_AUX_NATIVE_REPLY_NACK	(0x1 << 0)
+#define DP_AUX_NATIVE_REPLY_DEFER	(0x2 << 0)
+#define DP_AUX_NATIVE_REPLY_MASK	(0x3 << 0)
+
+#define DP_AUX_I2C_REPLY_ACK		(0x0 << 2)
+#define DP_AUX_I2C_REPLY_NACK		(0x1 << 2)
+#define DP_AUX_I2C_REPLY_DEFER		(0x2 << 2)
+#define DP_AUX_I2C_REPLY_MASK		(0x3 << 2)
+
+/* AUX CH addresses */
+/* DPCD */
+#define DP_DPCD_REV                         0x000
+# define DP_DPCD_REV_10                     0x10
+# define DP_DPCD_REV_11                     0x11
+# define DP_DPCD_REV_12                     0x12
+# define DP_DPCD_REV_13                     0x13
+# define DP_DPCD_REV_14                     0x14
+
+#define DP_MAX_LINK_RATE                    0x001
+
+#define DP_MAX_LANE_COUNT                   0x002
+# define DP_MAX_LANE_COUNT_MASK		    0x1f
+# define DP_TPS3_SUPPORTED		    (1 << 6) /* 1.2 */
+# define DP_ENHANCED_FRAME_CAP		    (1 << 7)
+
+#define DP_MAX_DOWNSPREAD                   0x003
+# define DP_MAX_DOWNSPREAD_0_5		    (1 << 0)
+# define DP_NO_AUX_HANDSHAKE_LINK_TRAINING  (1 << 6)
+# define DP_TPS4_SUPPORTED                  (1 << 7)
+
+#define DP_NORP                             0x004
+
+#define DP_DOWNSTREAMPORT_PRESENT           0x005
+# define DP_DWN_STRM_PORT_PRESENT           (1 << 0)
+# define DP_DWN_STRM_PORT_TYPE_MASK         0x06
+# define DP_DWN_STRM_PORT_TYPE_DP           (0 << 1)
+# define DP_DWN_STRM_PORT_TYPE_ANALOG       (1 << 1)
+# define DP_DWN_STRM_PORT_TYPE_TMDS         (2 << 1)
+# define DP_DWN_STRM_PORT_TYPE_OTHER        (3 << 1)
+# define DP_FORMAT_CONVERSION               (1 << 3)
+# define DP_DETAILED_CAP_INFO_AVAILABLE	    (1 << 4) /* DPI */
+
+#define DP_MAIN_LINK_CHANNEL_CODING         0x006
+
+#define DP_DOWN_STREAM_PORT_COUNT	    0x007
+# define DP_PORT_COUNT_MASK		    0x0f
+# define DP_MSA_TIMING_PAR_IGNORED	    (1 << 6) /* eDP */
+# define DP_OUI_SUPPORT			    (1 << 7)
+
+#define DP_RECEIVE_PORT_0_CAP_0		    0x008
+# define DP_LOCAL_EDID_PRESENT		    (1 << 1)
+# define DP_ASSOCIATED_TO_PRECEDING_PORT    (1 << 2)
+
+#define DP_RECEIVE_PORT_0_BUFFER_SIZE	    0x009
+
+#define DP_RECEIVE_PORT_1_CAP_0		    0x00a
+#define DP_RECEIVE_PORT_1_BUFFER_SIZE       0x00b
+
+#define DP_I2C_SPEED_CAP		    0x00c    /* DPI */
+# define DP_I2C_SPEED_1K		    0x01
+# define DP_I2C_SPEED_5K		    0x02
+# define DP_I2C_SPEED_10K		    0x04
+# define DP_I2C_SPEED_100K		    0x08
+# define DP_I2C_SPEED_400K		    0x10
+# define DP_I2C_SPEED_1M		    0x20
+
+#define DP_EDP_CONFIGURATION_CAP            0x00d   /* XXX 1.2? */
+# define DP_ALTERNATE_SCRAMBLER_RESET_CAP   (1 << 0)
+# define DP_FRAMING_CHANGE_CAP		    (1 << 1)
+# define DP_DPCD_DISPLAY_CONTROL_CAPABLE     (1 << 3) /* edp v1.2 or higher */
+
+#define DP_TRAINING_AUX_RD_INTERVAL         0x00e   /* XXX 1.2? */
+# define DP_TRAINING_AUX_RD_MASK            0x7F    /* XXX 1.2? */
+
+#define DP_ADAPTER_CAP			    0x00f   /* 1.2 */
+# define DP_FORCE_LOAD_SENSE_CAP	    (1 << 0)
+# define DP_ALTERNATE_I2C_PATTERN_CAP	    (1 << 1)
+
+#define DP_SUPPORTED_LINK_RATES		    0x010 /* eDP 1.4 */
+# define DP_MAX_SUPPORTED_RATES		     8	    /* 16-bit little-endian */
+
+/* Multiple stream transport */
+#define DP_FAUX_CAP			    0x020   /* 1.2 */
+# define DP_FAUX_CAP_1			    (1 << 0)
+
+#define DP_MSTM_CAP			    0x021   /* 1.2 */
+# define DP_MST_CAP			    (1 << 0)
+
+#define DP_NUMBER_OF_AUDIO_ENDPOINTS	    0x022   /* 1.2 */
+
+/* AV_SYNC_DATA_BLOCK                                  1.2 */
+#define DP_AV_GRANULARITY		    0x023
+# define DP_AG_FACTOR_MASK		    (0xf << 0)
+# define DP_AG_FACTOR_3MS		    (0 << 0)
+# define DP_AG_FACTOR_2MS		    (1 << 0)
+# define DP_AG_FACTOR_1MS		    (2 << 0)
+# define DP_AG_FACTOR_500US		    (3 << 0)
+# define DP_AG_FACTOR_200US		    (4 << 0)
+# define DP_AG_FACTOR_100US		    (5 << 0)
+# define DP_AG_FACTOR_10US		    (6 << 0)
+# define DP_AG_FACTOR_1US		    (7 << 0)
+# define DP_VG_FACTOR_MASK		    (0xf << 4)
+# define DP_VG_FACTOR_3MS		    (0 << 4)
+# define DP_VG_FACTOR_2MS		    (1 << 4)
+# define DP_VG_FACTOR_1MS		    (2 << 4)
+# define DP_VG_FACTOR_500US		    (3 << 4)
+# define DP_VG_FACTOR_200US		    (4 << 4)
+# define DP_VG_FACTOR_100US		    (5 << 4)
+
+#define DP_AUD_DEC_LAT0			    0x024
+#define DP_AUD_DEC_LAT1			    0x025
+
+#define DP_AUD_PP_LAT0			    0x026
+#define DP_AUD_PP_LAT1			    0x027
+
+#define DP_VID_INTER_LAT		    0x028
+
+#define DP_VID_PROG_LAT			    0x029
+
+#define DP_REP_LAT			    0x02a
+
+#define DP_AUD_DEL_INS0			    0x02b
+#define DP_AUD_DEL_INS1			    0x02c
+#define DP_AUD_DEL_INS2			    0x02d
+/* End of AV_SYNC_DATA_BLOCK */
+
+#define DP_RECEIVER_ALPM_CAP		    0x02e   /* eDP 1.4 */
+# define DP_ALPM_CAP			    (1 << 0)
+
+#define DP_SINK_DEVICE_AUX_FRAME_SYNC_CAP   0x02f   /* eDP 1.4 */
+# define DP_AUX_FRAME_SYNC_CAP		    (1 << 0)
+
+#define DP_GUID				    0x030   /* 1.2 */
+
+#define DP_DSC_SUPPORT                      0x060   /* DP 1.4 */
+# define DP_DSC_DECOMPRESSION_IS_SUPPORTED  (1 << 0)
+
+#define DP_DSC_REV                          0x061
+# define DP_DSC_MAJOR_MASK                  (0xf << 0)
+# define DP_DSC_MINOR_MASK                  (0xf << 4)
+# define DP_DSC_MAJOR_SHIFT                 0
+# define DP_DSC_MINOR_SHIFT                 4
+
+#define DP_DSC_RC_BUF_BLK_SIZE              0x062
+# define DP_DSC_RC_BUF_BLK_SIZE_1           0x0
+# define DP_DSC_RC_BUF_BLK_SIZE_4           0x1
+# define DP_DSC_RC_BUF_BLK_SIZE_16          0x2
+# define DP_DSC_RC_BUF_BLK_SIZE_64          0x3
+
+#define DP_DSC_RC_BUF_SIZE                  0x063
+
+#define DP_DSC_SLICE_CAP_1                  0x064
+# define DP_DSC_1_PER_DP_DSC_SINK           (1 << 0)
+# define DP_DSC_2_PER_DP_DSC_SINK           (1 << 1)
+# define DP_DSC_4_PER_DP_DSC_SINK           (1 << 3)
+# define DP_DSC_6_PER_DP_DSC_SINK           (1 << 4)
+# define DP_DSC_8_PER_DP_DSC_SINK           (1 << 5)
+# define DP_DSC_10_PER_DP_DSC_SINK          (1 << 6)
+# define DP_DSC_12_PER_DP_DSC_SINK          (1 << 7)
+
+#define DP_DSC_LINE_BUF_BIT_DEPTH           0x065
+# define DP_DSC_LINE_BUF_BIT_DEPTH_MASK     (0xf << 0)
+# define DP_DSC_LINE_BUF_BIT_DEPTH_9        0x0
+# define DP_DSC_LINE_BUF_BIT_DEPTH_10       0x1
+# define DP_DSC_LINE_BUF_BIT_DEPTH_11       0x2
+# define DP_DSC_LINE_BUF_BIT_DEPTH_12       0x3
+# define DP_DSC_LINE_BUF_BIT_DEPTH_13       0x4
+# define DP_DSC_LINE_BUF_BIT_DEPTH_14       0x5
+# define DP_DSC_LINE_BUF_BIT_DEPTH_15       0x6
+# define DP_DSC_LINE_BUF_BIT_DEPTH_16       0x7
+# define DP_DSC_LINE_BUF_BIT_DEPTH_8        0x8
+
+#define DP_DSC_BLK_PREDICTION_SUPPORT       0x066
+# define DP_DSC_BLK_PREDICTION_IS_SUPPORTED (1 << 0)
+
+#define DP_DSC_MAX_BITS_PER_PIXEL_LOW       0x067   /* eDP 1.4 */
+
+#define DP_DSC_MAX_BITS_PER_PIXEL_HI        0x068   /* eDP 1.4 */
+
+#define DP_DSC_DEC_COLOR_FORMAT_CAP         0x069
+# define DP_DSC_RGB                         (1 << 0)
+# define DP_DSC_YCbCr444                    (1 << 1)
+# define DP_DSC_YCbCr422_Simple             (1 << 2)
+# define DP_DSC_YCbCr422_Native             (1 << 3)
+# define DP_DSC_YCbCr420_Native             (1 << 4)
+
+#define DP_DSC_DEC_COLOR_DEPTH_CAP          0x06A
+# define DP_DSC_8_BPC                       (1 << 1)
+# define DP_DSC_10_BPC                      (1 << 2)
+# define DP_DSC_12_BPC                      (1 << 3)
+
+#define DP_DSC_PEAK_THROUGHPUT              0x06B
+# define DP_DSC_THROUGHPUT_MODE_0_MASK      (0xf << 0)
+# define DP_DSC_THROUGHPUT_MODE_0_SHIFT     0
+# define DP_DSC_THROUGHPUT_MODE_0_340       (1 << 0)
+# define DP_DSC_THROUGHPUT_MODE_0_400       (2 << 0)
+# define DP_DSC_THROUGHPUT_MODE_0_450       (3 << 0)
+# define DP_DSC_THROUGHPUT_MODE_0_500       (4 << 0)
+# define DP_DSC_THROUGHPUT_MODE_0_550       (5 << 0)
+# define DP_DSC_THROUGHPUT_MODE_0_600       (6 << 0)
+# define DP_DSC_THROUGHPUT_MODE_0_650       (7 << 0)
+# define DP_DSC_THROUGHPUT_MODE_0_700       (8 << 0)
+# define DP_DSC_THROUGHPUT_MODE_0_750       (9 << 0)
+# define DP_DSC_THROUGHPUT_MODE_0_800       (10 << 0)
+# define DP_DSC_THROUGHPUT_MODE_0_850       (11 << 0)
+# define DP_DSC_THROUGHPUT_MODE_0_900       (12 << 0)
+# define DP_DSC_THROUGHPUT_MODE_0_950       (13 << 0)
+# define DP_DSC_THROUGHPUT_MODE_0_1000      (14 << 0)
+# define DP_DSC_THROUGHPUT_MODE_1_MASK      (0xf << 4)
+# define DP_DSC_THROUGHPUT_MODE_1_SHIFT     4
+# define DP_DSC_THROUGHPUT_MODE_1_340       (1 << 4)
+# define DP_DSC_THROUGHPUT_MODE_1_400       (2 << 4)
+# define DP_DSC_THROUGHPUT_MODE_1_450       (3 << 4)
+# define DP_DSC_THROUGHPUT_MODE_1_500       (4 << 4)
+# define DP_DSC_THROUGHPUT_MODE_1_550       (5 << 4)
+# define DP_DSC_THROUGHPUT_MODE_1_600       (6 << 4)
+# define DP_DSC_THROUGHPUT_MODE_1_650       (7 << 4)
+# define DP_DSC_THROUGHPUT_MODE_1_700       (8 << 4)
+# define DP_DSC_THROUGHPUT_MODE_1_750       (9 << 4)
+# define DP_DSC_THROUGHPUT_MODE_1_800       (10 << 4)
+# define DP_DSC_THROUGHPUT_MODE_1_850       (11 << 4)
+# define DP_DSC_THROUGHPUT_MODE_1_900       (12 << 4)
+# define DP_DSC_THROUGHPUT_MODE_1_950       (13 << 4)
+# define DP_DSC_THROUGHPUT_MODE_1_1000      (14 << 4)
+
+#define DP_DSC_MAX_SLICE_WIDTH              0x06C
+
+#define DP_DSC_SLICE_CAP_2                  0x06D
+# define DP_DSC_16_PER_DP_DSC_SINK          (1 << 0)
+# define DP_DSC_20_PER_DP_DSC_SINK          (1 << 1)
+# define DP_DSC_24_PER_DP_DSC_SINK          (1 << 2)
+
+#define DP_DSC_BITS_PER_PIXEL_INC           0x06F
+# define DP_DSC_BITS_PER_PIXEL_1_16         0x0
+# define DP_DSC_BITS_PER_PIXEL_1_8          0x1
+# define DP_DSC_BITS_PER_PIXEL_1_4          0x2
+# define DP_DSC_BITS_PER_PIXEL_1_2          0x3
+# define DP_DSC_BITS_PER_PIXEL_1            0x4
+
+#define DP_PSR_SUPPORT                      0x070   /* XXX 1.2? */
+# define DP_PSR_IS_SUPPORTED                1
+# define DP_PSR2_IS_SUPPORTED		    2	    /* eDP 1.4 */
+# define DP_PSR2_WITH_Y_COORD_IS_SUPPORTED  3	    /* eDP 1.4a */
+
+#define DP_PSR_CAPS                         0x071   /* XXX 1.2? */
+# define DP_PSR_NO_TRAIN_ON_EXIT            1
+# define DP_PSR_SETUP_TIME_330              (0 << 1)
+# define DP_PSR_SETUP_TIME_275              (1 << 1)
+# define DP_PSR_SETUP_TIME_220              (2 << 1)
+# define DP_PSR_SETUP_TIME_165              (3 << 1)
+# define DP_PSR_SETUP_TIME_110              (4 << 1)
+# define DP_PSR_SETUP_TIME_55               (5 << 1)
+# define DP_PSR_SETUP_TIME_0                (6 << 1)
+# define DP_PSR_SETUP_TIME_MASK             (7 << 1)
+# define DP_PSR_SETUP_TIME_SHIFT            1
+# define DP_PSR2_SU_Y_COORDINATE_REQUIRED   (1 << 4)  /* eDP 1.4a */
+# define DP_PSR2_SU_GRANULARITY_REQUIRED    (1 << 5)  /* eDP 1.4b */
+/*
+ * 0x80-0x8f describe downstream port capabilities, but there are two layouts
+ * based on whether DP_DETAILED_CAP_INFO_AVAILABLE was set.  If it was not,
+ * each port's descriptor is one byte wide.  If it was set, each port's is
+ * four bytes wide, starting with the one byte from the base info.  As of
+ * DP interop v1.1a only VGA defines additional detail.
+ */
+
+/* offset 0 */
+#define DP_DOWNSTREAM_PORT_0		    0x80
+# define DP_DS_PORT_TYPE_MASK		    (7 << 0)
+# define DP_DS_PORT_TYPE_DP		    0
+# define DP_DS_PORT_TYPE_VGA		    1
+# define DP_DS_PORT_TYPE_DVI		    2
+# define DP_DS_PORT_TYPE_HDMI		    3
+# define DP_DS_PORT_TYPE_NON_EDID	    4
+# define DP_DS_PORT_TYPE_DP_DUALMODE        5
+# define DP_DS_PORT_TYPE_WIRELESS           6
+# define DP_DS_PORT_HPD			    (1 << 3)
+/* offset 1 for VGA is maximum megapixels per second / 8 */
+/* offset 2 */
+# define DP_DS_MAX_BPC_MASK	            (3 << 0)
+# define DP_DS_8BPC		            0
+# define DP_DS_10BPC		            1
+# define DP_DS_12BPC		            2
+# define DP_DS_16BPC		            3
+
+/* DP Forward error Correction Registers */
+#define DP_FEC_CAPABILITY		    0x090    /* 1.4 */
+# define DP_FEC_CAPABLE			    (1 << 0)
+# define DP_FEC_UNCORR_BLK_ERROR_COUNT_CAP  (1 << 1)
+# define DP_FEC_CORR_BLK_ERROR_COUNT_CAP    (1 << 2)
+# define DP_FEC_BIT_ERROR_COUNT_CAP	    (1 << 3)
+
+/* link configuration */
+#define	DP_LINK_BW_SET		            0x100
+# define DP_LINK_RATE_TABLE		    0x00    /* eDP 1.4 */
+# define DP_LINK_BW_1_62		    0x06
+# define DP_LINK_BW_2_7			    0x0a
+# define DP_LINK_BW_5_4			    0x14    /* 1.2 */
+# define DP_LINK_BW_8_1			    0x1e    /* 1.4 */
+
+#define DP_LANE_COUNT_SET	            0x101
+# define DP_LANE_COUNT_MASK		    0x0f
+# define DP_LANE_COUNT_ENHANCED_FRAME_EN    (1 << 7)
+
+#define DP_TRAINING_PATTERN_SET	            0x102
+# define DP_TRAINING_PATTERN_DISABLE	    0
+# define DP_TRAINING_PATTERN_1		    1
+# define DP_TRAINING_PATTERN_2		    2
+# define DP_TRAINING_PATTERN_3		    3	    /* 1.2 */
+# define DP_TRAINING_PATTERN_4              7       /* 1.4 */
+# define DP_TRAINING_PATTERN_MASK	    0x3
+# define DP_TRAINING_PATTERN_MASK_1_4	    0xf
+
+/* DPCD 1.1 only. For DPCD >= 1.2 see per-lane DP_LINK_QUAL_LANEn_SET */
+# define DP_LINK_QUAL_PATTERN_11_DISABLE    (0 << 2)
+# define DP_LINK_QUAL_PATTERN_11_D10_2	    (1 << 2)
+# define DP_LINK_QUAL_PATTERN_11_ERROR_RATE (2 << 2)
+# define DP_LINK_QUAL_PATTERN_11_PRBS7	    (3 << 2)
+# define DP_LINK_QUAL_PATTERN_11_MASK	    (3 << 2)
+
+# define DP_RECOVERED_CLOCK_OUT_EN	    (1 << 4)
+# define DP_LINK_SCRAMBLING_DISABLE	    (1 << 5)
+
+# define DP_SYMBOL_ERROR_COUNT_BOTH	    (0 << 6)
+# define DP_SYMBOL_ERROR_COUNT_DISPARITY    (1 << 6)
+# define DP_SYMBOL_ERROR_COUNT_SYMBOL	    (2 << 6)
+# define DP_SYMBOL_ERROR_COUNT_MASK	    (3 << 6)
+
+#define DP_TRAINING_LANE0_SET		    0x103
+#define DP_TRAINING_LANE1_SET		    0x104
+#define DP_TRAINING_LANE2_SET		    0x105
+#define DP_TRAINING_LANE3_SET		    0x106
+
+# define DP_TRAIN_VOLTAGE_SWING_MASK	    0x3
+# define DP_TRAIN_VOLTAGE_SWING_SHIFT	    0
+# define DP_TRAIN_MAX_SWING_REACHED	    (1 << 2)
+# define DP_TRAIN_VOLTAGE_SWING_LEVEL_0 (0 << 0)
+# define DP_TRAIN_VOLTAGE_SWING_LEVEL_1 (1 << 0)
+# define DP_TRAIN_VOLTAGE_SWING_LEVEL_2 (2 << 0)
+# define DP_TRAIN_VOLTAGE_SWING_LEVEL_3 (3 << 0)
+
+# define DP_TRAIN_PRE_EMPHASIS_MASK	    (3 << 3)
+# define DP_TRAIN_PRE_EMPH_LEVEL_0		(0 << 3)
+# define DP_TRAIN_PRE_EMPH_LEVEL_1		(1 << 3)
+# define DP_TRAIN_PRE_EMPH_LEVEL_2		(2 << 3)
+# define DP_TRAIN_PRE_EMPH_LEVEL_3		(3 << 3)
+
+# define DP_TRAIN_PRE_EMPHASIS_SHIFT	    3
+# define DP_TRAIN_MAX_PRE_EMPHASIS_REACHED  (1 << 5)
+
+#define DP_DOWNSPREAD_CTRL		    0x107
+# define DP_SPREAD_AMP_0_5		    (1 << 4)
+# define DP_MSA_TIMING_PAR_IGNORE_EN	    (1 << 7) /* eDP */
+
+#define DP_MAIN_LINK_CHANNEL_CODING_SET	    0x108
+# define DP_SET_ANSI_8B10B		    (1 << 0)
+
+#define DP_I2C_SPEED_CONTROL_STATUS	    0x109   /* DPI */
+/* bitmask as for DP_I2C_SPEED_CAP */
+
+#define DP_EDP_CONFIGURATION_SET            0x10a   /* XXX 1.2? */
+# define DP_ALTERNATE_SCRAMBLER_RESET_ENABLE (1 << 0)
+# define DP_FRAMING_CHANGE_ENABLE	    (1 << 1)
+# define DP_PANEL_SELF_TEST_ENABLE	    (1 << 7)
+
+#define DP_LINK_QUAL_LANE0_SET		    0x10b   /* DPCD >= 1.2 */
+#define DP_LINK_QUAL_LANE1_SET		    0x10c
+#define DP_LINK_QUAL_LANE2_SET		    0x10d
+#define DP_LINK_QUAL_LANE3_SET		    0x10e
+# define DP_LINK_QUAL_PATTERN_DISABLE	    0
+# define DP_LINK_QUAL_PATTERN_D10_2	    1
+# define DP_LINK_QUAL_PATTERN_ERROR_RATE    2
+# define DP_LINK_QUAL_PATTERN_PRBS7	    3
+# define DP_LINK_QUAL_PATTERN_80BIT_CUSTOM  4
+# define DP_LINK_QUAL_PATTERN_HBR2_EYE      5
+# define DP_LINK_QUAL_PATTERN_MASK	    7
+
+#define DP_TRAINING_LANE0_1_SET2	    0x10f
+#define DP_TRAINING_LANE2_3_SET2	    0x110
+# define DP_LANE02_POST_CURSOR2_SET_MASK    (3 << 0)
+# define DP_LANE02_MAX_POST_CURSOR2_REACHED (1 << 2)
+# define DP_LANE13_POST_CURSOR2_SET_MASK    (3 << 4)
+# define DP_LANE13_MAX_POST_CURSOR2_REACHED (1 << 6)
+
+#define DP_MSTM_CTRL			    0x111   /* 1.2 */
+# define DP_MST_EN			    (1 << 0)
+# define DP_UP_REQ_EN			    (1 << 1)
+# define DP_UPSTREAM_IS_SRC		    (1 << 2)
+
+#define DP_AUDIO_DELAY0			    0x112   /* 1.2 */
+#define DP_AUDIO_DELAY1			    0x113
+#define DP_AUDIO_DELAY2			    0x114
+
+#define DP_LINK_RATE_SET		    0x115   /* eDP 1.4 */
+# define DP_LINK_RATE_SET_SHIFT		    0
+# define DP_LINK_RATE_SET_MASK		    (7 << 0)
+
+#define DP_RECEIVER_ALPM_CONFIG		    0x116   /* eDP 1.4 */
+# define DP_ALPM_ENABLE			    (1 << 0)
+# define DP_ALPM_LOCK_ERROR_IRQ_HPD_ENABLE  (1 << 1)
+
+#define DP_SINK_DEVICE_AUX_FRAME_SYNC_CONF  0x117   /* eDP 1.4 */
+# define DP_AUX_FRAME_SYNC_ENABLE	    (1 << 0)
+# define DP_IRQ_HPD_ENABLE		    (1 << 1)
+
+#define DP_UPSTREAM_DEVICE_DP_PWR_NEED	    0x118   /* 1.2 */
+# define DP_PWR_NOT_NEEDED		    (1 << 0)
+
+#define DP_FEC_CONFIGURATION		    0x120    /* 1.4 */
+# define DP_FEC_READY			    (1 << 0)
+# define DP_FEC_ERR_COUNT_SEL_MASK	    (7 << 1)
+# define DP_FEC_ERR_COUNT_DIS		    (0 << 1)
+# define DP_FEC_UNCORR_BLK_ERROR_COUNT	    (1 << 1)
+# define DP_FEC_CORR_BLK_ERROR_COUNT	    (2 << 1)
+# define DP_FEC_BIT_ERROR_COUNT		    (3 << 1)
+# define DP_FEC_LANE_SELECT_MASK	    (3 << 4)
+# define DP_FEC_LANE_0_SELECT		    (0 << 4)
+# define DP_FEC_LANE_1_SELECT		    (1 << 4)
+# define DP_FEC_LANE_2_SELECT		    (2 << 4)
+# define DP_FEC_LANE_3_SELECT		    (3 << 4)
+
+#define DP_AUX_FRAME_SYNC_VALUE		    0x15c   /* eDP 1.4 */
+# define DP_AUX_FRAME_SYNC_VALID	    (1 << 0)
+
+#define DP_DSC_ENABLE                       0x160   /* DP 1.4 */
+
+#define DP_PSR_EN_CFG			    0x170   /* XXX 1.2? */
+# define DP_PSR_ENABLE			    (1 << 0)
+# define DP_PSR_MAIN_LINK_ACTIVE	    (1 << 1)
+# define DP_PSR_CRC_VERIFICATION	    (1 << 2)
+# define DP_PSR_FRAME_CAPTURE		    (1 << 3)
+# define DP_PSR_SELECTIVE_UPDATE	    (1 << 4)
+# define DP_PSR_IRQ_HPD_WITH_CRC_ERRORS     (1 << 5)
+# define DP_PSR_ENABLE_PSR2		    (1 << 6) /* eDP 1.4a */
+
+#define DP_ADAPTER_CTRL			    0x1a0
+# define DP_ADAPTER_CTRL_FORCE_LOAD_SENSE   (1 << 0)
+
+#define DP_BRANCH_DEVICE_CTRL		    0x1a1
+# define DP_BRANCH_DEVICE_IRQ_HPD	    (1 << 0)
+
+#define DP_PAYLOAD_ALLOCATE_SET		    0x1c0
+#define DP_PAYLOAD_ALLOCATE_START_TIME_SLOT 0x1c1
+#define DP_PAYLOAD_ALLOCATE_TIME_SLOT_COUNT 0x1c2
+
+#define DP_SINK_COUNT			    0x200
+/* prior to 1.2 bit 7 was reserved mbz */
+# define DP_GET_SINK_COUNT(x)		    ((((x) & 0x80) >> 1) | ((x) & 0x3f))
+# define DP_SINK_CP_READY		    (1 << 6)
+
+#define DP_DEVICE_SERVICE_IRQ_VECTOR	    0x201
+# define DP_REMOTE_CONTROL_COMMAND_PENDING  (1 << 0)
+# define DP_AUTOMATED_TEST_REQUEST	    (1 << 1)
+# define DP_CP_IRQ			    (1 << 2)
+# define DP_MCCS_IRQ			    (1 << 3)
+# define DP_DOWN_REP_MSG_RDY		    (1 << 4) /* 1.2 MST */
+# define DP_UP_REQ_MSG_RDY		    (1 << 5) /* 1.2 MST */
+# define DP_SINK_SPECIFIC_IRQ		    (1 << 6)
+
+#define DP_LANE0_1_STATUS		    0x202
+#define DP_LANE2_3_STATUS		    0x203
+# define DP_LANE_CR_DONE		    (1 << 0)
+# define DP_LANE_CHANNEL_EQ_DONE	    (1 << 1)
+# define DP_LANE_SYMBOL_LOCKED		    (1 << 2)
+
+#define DP_CHANNEL_EQ_BITS (DP_LANE_CR_DONE |		\
+			    DP_LANE_CHANNEL_EQ_DONE |	\
+			    DP_LANE_SYMBOL_LOCKED)
+
+#define DP_LANE_ALIGN_STATUS_UPDATED	    0x204
+
+#define DP_INTERLANE_ALIGN_DONE		    (1 << 0)
+#define DP_DOWNSTREAM_PORT_STATUS_CHANGED   (1 << 6)
+#define DP_LINK_STATUS_UPDATED		    (1 << 7)
+
+#define DP_SINK_STATUS			    0x205
+
+#define DP_RECEIVE_PORT_0_STATUS	    (1 << 0)
+#define DP_RECEIVE_PORT_1_STATUS	    (1 << 1)
+
+#define DP_ADJUST_REQUEST_LANE0_1	    0x206
+#define DP_ADJUST_REQUEST_LANE2_3	    0x207
+# define DP_ADJUST_VOLTAGE_SWING_LANE0_MASK  0x03
+# define DP_ADJUST_VOLTAGE_SWING_LANE0_SHIFT 0
+# define DP_ADJUST_PRE_EMPHASIS_LANE0_MASK   0x0c
+# define DP_ADJUST_PRE_EMPHASIS_LANE0_SHIFT  2
+# define DP_ADJUST_VOLTAGE_SWING_LANE1_MASK  0x30
+# define DP_ADJUST_VOLTAGE_SWING_LANE1_SHIFT 4
+# define DP_ADJUST_PRE_EMPHASIS_LANE1_MASK   0xc0
+# define DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT  6
+
+#define DP_ADJUST_REQUEST_POST_CURSOR2      0x20c
+
+#define DP_TEST_REQUEST			    0x218
+# define DP_TEST_LINK_TRAINING		    (1 << 0)
+# define DP_TEST_LINK_VIDEO_PATTERN	    (1 << 1)
+# define DP_TEST_LINK_EDID_READ		    (1 << 2)
+# define DP_TEST_LINK_PHY_TEST_PATTERN	    (1 << 3) /* DPCD >= 1.1 */
+# define DP_TEST_LINK_FAUX_PATTERN	    (1 << 4) /* DPCD >= 1.2 */
+
+#define DP_TEST_LINK_RATE		    0x219
+# define DP_LINK_RATE_162		    (0x6)
+# define DP_LINK_RATE_27		    (0xa)
+
+#define DP_TEST_LANE_COUNT		    0x220
+
+#define DP_TEST_PATTERN			    0x221
+# define DP_NO_TEST_PATTERN                 0x0
+# define DP_COLOR_RAMP                      0x1
+# define DP_BLACK_AND_WHITE_VERTICAL_LINES  0x2
+# define DP_COLOR_SQUARE                    0x3
+
+#define DP_TEST_H_TOTAL_HI                  0x222
+#define DP_TEST_H_TOTAL_LO                  0x223
+
+#define DP_TEST_V_TOTAL_HI                  0x224
+#define DP_TEST_V_TOTAL_LO                  0x225
+
+#define DP_TEST_H_START_HI                  0x226
+#define DP_TEST_H_START_LO                  0x227
+
+#define DP_TEST_V_START_HI                  0x228
+#define DP_TEST_V_START_LO                  0x229
+
+#define DP_TEST_HSYNC_HI                    0x22A
+# define DP_TEST_HSYNC_POLARITY             (1 << 7)
+# define DP_TEST_HSYNC_WIDTH_HI_MASK        (127 << 0)
+#define DP_TEST_HSYNC_WIDTH_LO              0x22B
+
+#define DP_TEST_VSYNC_HI                    0x22C
+# define DP_TEST_VSYNC_POLARITY             (1 << 7)
+# define DP_TEST_VSYNC_WIDTH_HI_MASK        (127 << 0)
+#define DP_TEST_VSYNC_WIDTH_LO              0x22D
+
+#define DP_TEST_H_WIDTH_HI                  0x22E
+#define DP_TEST_H_WIDTH_LO                  0x22F
+
+#define DP_TEST_V_HEIGHT_HI                 0x230
+#define DP_TEST_V_HEIGHT_LO                 0x231
+
+#define DP_TEST_MISC0                       0x232
+# define DP_TEST_SYNC_CLOCK                 (1 << 0)
+# define DP_TEST_COLOR_FORMAT_MASK          (3 << 1)
+# define DP_TEST_COLOR_FORMAT_SHIFT         1
+# define DP_COLOR_FORMAT_RGB                (0 << 1)
+# define DP_COLOR_FORMAT_YCbCr422           (1 << 1)
+# define DP_COLOR_FORMAT_YCbCr444           (2 << 1)
+# define DP_TEST_DYNAMIC_RANGE_CEA          (1 << 3)
+# define DP_TEST_YCBCR_COEFFICIENTS         (1 << 4)
+# define DP_YCBCR_COEFFICIENTS_ITU601       (0 << 4)
+# define DP_YCBCR_COEFFICIENTS_ITU709       (1 << 4)
+# define DP_TEST_BIT_DEPTH_MASK             (7 << 5)
+# define DP_TEST_BIT_DEPTH_SHIFT            5
+# define DP_TEST_BIT_DEPTH_6                (0 << 5)
+# define DP_TEST_BIT_DEPTH_8                (1 << 5)
+# define DP_TEST_BIT_DEPTH_10               (2 << 5)
+# define DP_TEST_BIT_DEPTH_12               (3 << 5)
+# define DP_TEST_BIT_DEPTH_16               (4 << 5)
+
+#define DP_TEST_MISC1                       0x233
+# define DP_TEST_REFRESH_DENOMINATOR        (1 << 0)
+# define DP_TEST_INTERLACED                 (1 << 1)
+
+#define DP_TEST_REFRESH_RATE_NUMERATOR      0x234
+
+#define DP_TEST_MISC0                       0x232
+
+#define DP_TEST_CRC_R_CR		    0x240
+#define DP_TEST_CRC_G_Y			    0x242
+#define DP_TEST_CRC_B_CB		    0x244
+
+#define DP_TEST_SINK_MISC		    0x246
+# define DP_TEST_CRC_SUPPORTED		    (1 << 5)
+# define DP_TEST_COUNT_MASK		    0xf
+
+#define DP_TEST_PHY_PATTERN                 0x248
+# define DP_TEST_PHY_PATTERN_NONE			0x0
+# define DP_TEST_PHY_PATTERN_D10_2_NO_SCRAMBLING	0x1
+# define DP_TEST_PHY_PATTERN_SYMBOL_ERR_MEASUREMENT_CNT 0x2
+# define DP_TEST_PHY_PATTERN_PRBS7			0x3
+# define DP_TEST_PHY_PATTERN_80_BIT_CUSTOM_PATTERN	0x4
+# define DP_TEST_PHY_PATTERN_CP2520_PATTERN_1		0x5
+# define DP_TEST_PHY_PATTERN_CP2520_PATTERN_2		0x6
+# define DP_TEST_PHY_PATTERN_CP2520_PATTERN_3		0x7
+#define DP_TEST_80BIT_CUSTOM_PATTERN_7_0    0x250
+#define	DP_TEST_80BIT_CUSTOM_PATTERN_15_8   0x251
+#define	DP_TEST_80BIT_CUSTOM_PATTERN_23_16  0x252
+#define	DP_TEST_80BIT_CUSTOM_PATTERN_31_24  0x253
+#define	DP_TEST_80BIT_CUSTOM_PATTERN_39_32  0x254
+#define	DP_TEST_80BIT_CUSTOM_PATTERN_47_40  0x255
+#define	DP_TEST_80BIT_CUSTOM_PATTERN_55_48  0x256
+#define	DP_TEST_80BIT_CUSTOM_PATTERN_63_56  0x257
+#define	DP_TEST_80BIT_CUSTOM_PATTERN_71_64  0x258
+#define	DP_TEST_80BIT_CUSTOM_PATTERN_79_72  0x259
+
+#define DP_TEST_RESPONSE		    0x260
+# define DP_TEST_ACK			    (1 << 0)
+# define DP_TEST_NAK			    (1 << 1)
+# define DP_TEST_EDID_CHECKSUM_WRITE	    (1 << 2)
+
+#define DP_TEST_EDID_CHECKSUM		    0x261
+
+#define DP_TEST_SINK			    0x270
+# define DP_TEST_SINK_START		    (1 << 0)
+
+#define DP_FEC_STATUS			    0x280    /* 1.4 */
+# define DP_FEC_DECODE_EN_DETECTED	    (1 << 0)
+# define DP_FEC_DECODE_DIS_DETECTED	    (1 << 1)
+
+#define DP_FEC_ERROR_COUNT_LSB		    0x0281    /* 1.4 */
+
+#define DP_FEC_ERROR_COUNT_MSB		    0x0282    /* 1.4 */
+# define DP_FEC_ERROR_COUNT_MASK	    0x7F
+# define DP_FEC_ERR_COUNT_VALID		    (1 << 7)
+
+#define DP_PAYLOAD_TABLE_UPDATE_STATUS      0x2c0   /* 1.2 MST */
+# define DP_PAYLOAD_TABLE_UPDATED           (1 << 0)
+# define DP_PAYLOAD_ACT_HANDLED             (1 << 1)
+
+#define DP_VC_PAYLOAD_ID_SLOT_1             0x2c1   /* 1.2 MST */
+/* up to ID_SLOT_63 at 0x2ff */
+
+#define DP_SOURCE_OUI			    0x300
+#define DP_SINK_OUI			    0x400
+#define DP_BRANCH_OUI			    0x500
+#define DP_BRANCH_ID                        0x503
+#define DP_BRANCH_REVISION_START            0x509
+#define DP_BRANCH_HW_REV                    0x509
+#define DP_BRANCH_SW_REV                    0x50A
+
+#define DP_SET_POWER                        0x600
+# define DP_SET_POWER_D0                    0x1
+# define DP_SET_POWER_D3                    0x2
+# define DP_SET_POWER_MASK                  0x3
+# define DP_SET_POWER_D3_AUX_ON             0x5
+
+#define DP_EDP_DPCD_REV			    0x700    /* eDP 1.2 */
+# define DP_EDP_11			    0x00
+# define DP_EDP_12			    0x01
+# define DP_EDP_13			    0x02
+# define DP_EDP_14			    0x03
+
+#define DP_EDP_GENERAL_CAP_1		    0x701
+# define DP_EDP_TCON_BACKLIGHT_ADJUSTMENT_CAP		(1 << 0)
+# define DP_EDP_BACKLIGHT_PIN_ENABLE_CAP		(1 << 1)
+# define DP_EDP_BACKLIGHT_AUX_ENABLE_CAP		(1 << 2)
+# define DP_EDP_PANEL_SELF_TEST_PIN_ENABLE_CAP		(1 << 3)
+# define DP_EDP_PANEL_SELF_TEST_AUX_ENABLE_CAP		(1 << 4)
+# define DP_EDP_FRC_ENABLE_CAP				(1 << 5)
+# define DP_EDP_COLOR_ENGINE_CAP			(1 << 6)
+# define DP_EDP_SET_POWER_CAP				(1 << 7)
+
+#define DP_EDP_BACKLIGHT_ADJUSTMENT_CAP     0x702
+# define DP_EDP_BACKLIGHT_BRIGHTNESS_PWM_PIN_CAP	(1 << 0)
+# define DP_EDP_BACKLIGHT_BRIGHTNESS_AUX_SET_CAP	(1 << 1)
+# define DP_EDP_BACKLIGHT_BRIGHTNESS_BYTE_COUNT		(1 << 2)
+# define DP_EDP_BACKLIGHT_AUX_PWM_PRODUCT_CAP		(1 << 3)
+# define DP_EDP_BACKLIGHT_FREQ_PWM_PIN_PASSTHRU_CAP	(1 << 4)
+# define DP_EDP_BACKLIGHT_FREQ_AUX_SET_CAP		(1 << 5)
+# define DP_EDP_DYNAMIC_BACKLIGHT_CAP			(1 << 6)
+# define DP_EDP_VBLANK_BACKLIGHT_UPDATE_CAP		(1 << 7)
+
+#define DP_EDP_GENERAL_CAP_2		    0x703
+# define DP_EDP_OVERDRIVE_ENGINE_ENABLED		(1 << 0)
+
+#define DP_EDP_GENERAL_CAP_3		    0x704    /* eDP 1.4 */
+# define DP_EDP_X_REGION_CAP_MASK			(0xf << 0)
+# define DP_EDP_X_REGION_CAP_SHIFT			0
+# define DP_EDP_Y_REGION_CAP_MASK			(0xf << 4)
+# define DP_EDP_Y_REGION_CAP_SHIFT			4
+
+#define DP_EDP_DISPLAY_CONTROL_REGISTER     0x720
+# define DP_EDP_BACKLIGHT_ENABLE			(1 << 0)
+# define DP_EDP_BLACK_VIDEO_ENABLE			(1 << 1)
+# define DP_EDP_FRC_ENABLE				(1 << 2)
+# define DP_EDP_COLOR_ENGINE_ENABLE			(1 << 3)
+# define DP_EDP_VBLANK_BACKLIGHT_UPDATE_ENABLE		(1 << 7)
+
+#define DP_EDP_BACKLIGHT_MODE_SET_REGISTER  0x721
+# define DP_EDP_BACKLIGHT_CONTROL_MODE_MASK		(3 << 0)
+# define DP_EDP_BACKLIGHT_CONTROL_MODE_PWM		(0 << 0)
+# define DP_EDP_BACKLIGHT_CONTROL_MODE_PRESET		(1 << 0)
+# define DP_EDP_BACKLIGHT_CONTROL_MODE_DPCD		(2 << 0)
+# define DP_EDP_BACKLIGHT_CONTROL_MODE_PRODUCT		(3 << 0)
+# define DP_EDP_BACKLIGHT_FREQ_PWM_PIN_PASSTHRU_ENABLE	(1 << 2)
+# define DP_EDP_BACKLIGHT_FREQ_AUX_SET_ENABLE		(1 << 3)
+# define DP_EDP_DYNAMIC_BACKLIGHT_ENABLE		(1 << 4)
+# define DP_EDP_REGIONAL_BACKLIGHT_ENABLE		(1 << 5)
+# define DP_EDP_UPDATE_REGION_BRIGHTNESS		(1 << 6) /* eDP 1.4 */
+
+#define DP_EDP_BACKLIGHT_BRIGHTNESS_MSB     0x722
+#define DP_EDP_BACKLIGHT_BRIGHTNESS_LSB     0x723
+
+#define DP_EDP_PWMGEN_BIT_COUNT             0x724
+#define DP_EDP_PWMGEN_BIT_COUNT_CAP_MIN     0x725
+#define DP_EDP_PWMGEN_BIT_COUNT_CAP_MAX     0x726
+# define DP_EDP_PWMGEN_BIT_COUNT_MASK       (0x1f << 0)
+
+#define DP_EDP_BACKLIGHT_CONTROL_STATUS     0x727
+
+#define DP_EDP_BACKLIGHT_FREQ_SET           0x728
+# define DP_EDP_BACKLIGHT_FREQ_BASE_KHZ     27000
+
+#define DP_EDP_BACKLIGHT_FREQ_CAP_MIN_MSB   0x72a
+#define DP_EDP_BACKLIGHT_FREQ_CAP_MIN_MID   0x72b
+#define DP_EDP_BACKLIGHT_FREQ_CAP_MIN_LSB   0x72c
+
+#define DP_EDP_BACKLIGHT_FREQ_CAP_MAX_MSB   0x72d
+#define DP_EDP_BACKLIGHT_FREQ_CAP_MAX_MID   0x72e
+#define DP_EDP_BACKLIGHT_FREQ_CAP_MAX_LSB   0x72f
+
+#define DP_EDP_DBC_MINIMUM_BRIGHTNESS_SET   0x732
+#define DP_EDP_DBC_MAXIMUM_BRIGHTNESS_SET   0x733
+
+#define DP_EDP_REGIONAL_BACKLIGHT_BASE      0x740    /* eDP 1.4 */
+#define DP_EDP_REGIONAL_BACKLIGHT_0	    0x741    /* eDP 1.4 */
+
+#define DP_SIDEBAND_MSG_DOWN_REQ_BASE	    0x1000   /* 1.2 MST */
+#define DP_SIDEBAND_MSG_UP_REP_BASE	    0x1200   /* 1.2 MST */
+#define DP_SIDEBAND_MSG_DOWN_REP_BASE	    0x1400   /* 1.2 MST */
+#define DP_SIDEBAND_MSG_UP_REQ_BASE	    0x1600   /* 1.2 MST */
+
+#define DP_SINK_COUNT_ESI		    0x2002   /* 1.2 */
+/* 0-5 sink count */
+# define DP_SINK_COUNT_CP_READY             (1 << 6)
+
+#define DP_DEVICE_SERVICE_IRQ_VECTOR_ESI0   0x2003   /* 1.2 */
+
+#define DP_DEVICE_SERVICE_IRQ_VECTOR_ESI1   0x2004   /* 1.2 */
+# define DP_RX_GTC_MSTR_REQ_STATUS_CHANGE    (1 << 0)
+# define DP_LOCK_ACQUISITION_REQUEST         (1 << 1)
+# define DP_CEC_IRQ                          (1 << 2)
+
+#define DP_LINK_SERVICE_IRQ_VECTOR_ESI0     0x2005   /* 1.2 */
+
+#define DP_PSR_ERROR_STATUS                 0x2006  /* XXX 1.2? */
+# define DP_PSR_LINK_CRC_ERROR              (1 << 0)
+# define DP_PSR_RFB_STORAGE_ERROR           (1 << 1)
+# define DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR (1 << 2) /* eDP 1.4 */
+
+#define DP_PSR_ESI                          0x2007  /* XXX 1.2? */
+# define DP_PSR_CAPS_CHANGE                 (1 << 0)
+
+#define DP_PSR_STATUS                       0x2008  /* XXX 1.2? */
+# define DP_PSR_SINK_INACTIVE               0
+# define DP_PSR_SINK_ACTIVE_SRC_SYNCED      1
+# define DP_PSR_SINK_ACTIVE_RFB             2
+# define DP_PSR_SINK_ACTIVE_SINK_SYNCED     3
+# define DP_PSR_SINK_ACTIVE_RESYNC          4
+# define DP_PSR_SINK_INTERNAL_ERROR         7
+# define DP_PSR_SINK_STATE_MASK             0x07
+
+#define DP_SYNCHRONIZATION_LATENCY_IN_SINK		0x2009 /* edp 1.4 */
+# define DP_MAX_RESYNC_FRAME_COUNT_MASK			(0xf << 0)
+# define DP_MAX_RESYNC_FRAME_COUNT_SHIFT		0
+# define DP_LAST_ACTUAL_SYNCHRONIZATION_LATENCY_MASK	(0xf << 4)
+# define DP_LAST_ACTUAL_SYNCHRONIZATION_LATENCY_SHIFT	4
+
+#define DP_LAST_RECEIVED_PSR_SDP	    0x200a /* eDP 1.2 */
+# define DP_PSR_STATE_BIT		    (1 << 0) /* eDP 1.2 */
+# define DP_UPDATE_RFB_BIT		    (1 << 1) /* eDP 1.2 */
+# define DP_CRC_VALID_BIT		    (1 << 2) /* eDP 1.2 */
+# define DP_SU_VALID			    (1 << 3) /* eDP 1.4 */
+# define DP_FIRST_SCAN_LINE_SU_REGION	    (1 << 4) /* eDP 1.4 */
+# define DP_LAST_SCAN_LINE_SU_REGION	    (1 << 5) /* eDP 1.4 */
+# define DP_Y_COORDINATE_VALID		    (1 << 6) /* eDP 1.4a */
+
+#define DP_RECEIVER_ALPM_STATUS		    0x200b  /* eDP 1.4 */
+# define DP_ALPM_LOCK_TIMEOUT_ERROR	    (1 << 0)
+
+#define DP_LANE0_1_STATUS_ESI                  0x200c /* status same as 0x202 */
+#define DP_LANE2_3_STATUS_ESI                  0x200d /* status same as 0x203 */
+#define DP_LANE_ALIGN_STATUS_UPDATED_ESI       0x200e /* status same as 0x204 */
+#define DP_SINK_STATUS_ESI                     0x200f /* status same as 0x205 */
+
+#define DP_DP13_DPCD_REV                    0x2200
+#define DP_DP13_MAX_LINK_RATE               0x2201
+
+#define DP_DPRX_FEATURE_ENUMERATION_LIST    0x2210  /* DP 1.3 */
+# define DP_GTC_CAP					(1 << 0)  /* DP 1.3 */
+# define DP_SST_SPLIT_SDP_CAP				(1 << 1)  /* DP 1.4 */
+# define DP_AV_SYNC_CAP					(1 << 2)  /* DP 1.3 */
+# define DP_VSC_SDP_EXT_FOR_COLORIMETRY_SUPPORTED	(1 << 3)  /* DP 1.3 */
+# define DP_VSC_EXT_VESA_SDP_SUPPORTED			(1 << 4)  /* DP 1.4 */
+# define DP_VSC_EXT_VESA_SDP_CHAINING_SUPPORTED		(1 << 5)  /* DP 1.4 */
+# define DP_VSC_EXT_CEA_SDP_SUPPORTED			(1 << 6)  /* DP 1.4 */
+# define DP_VSC_EXT_CEA_SDP_CHAINING_SUPPORTED		(1 << 7)  /* DP 1.4 */
+
+/* HDMI CEC tunneling over AUX DP 1.3 section 5.3.3.3.1 DPCD 1.4+ */
+#define DP_CEC_TUNNELING_CAPABILITY            0x3000
+# define DP_CEC_TUNNELING_CAPABLE               (1 << 0)
+# define DP_CEC_SNOOPING_CAPABLE                (1 << 1)
+# define DP_CEC_MULTIPLE_LA_CAPABLE             (1 << 2)
+
+#define DP_CEC_TUNNELING_CONTROL               0x3001
+# define DP_CEC_TUNNELING_ENABLE                (1 << 0)
+# define DP_CEC_SNOOPING_ENABLE                 (1 << 1)
+
+#define DP_CEC_RX_MESSAGE_INFO                 0x3002
+# define DP_CEC_RX_MESSAGE_LEN_MASK             (0xf << 0)
+# define DP_CEC_RX_MESSAGE_LEN_SHIFT            0
+# define DP_CEC_RX_MESSAGE_HPD_STATE            (1 << 4)
+# define DP_CEC_RX_MESSAGE_HPD_LOST             (1 << 5)
+# define DP_CEC_RX_MESSAGE_ACKED                (1 << 6)
+# define DP_CEC_RX_MESSAGE_ENDED                (1 << 7)
+
+#define DP_CEC_TX_MESSAGE_INFO                 0x3003
+# define DP_CEC_TX_MESSAGE_LEN_MASK             (0xf << 0)
+# define DP_CEC_TX_MESSAGE_LEN_SHIFT            0
+# define DP_CEC_TX_RETRY_COUNT_MASK             (0x7 << 4)
+# define DP_CEC_TX_RETRY_COUNT_SHIFT            4
+# define DP_CEC_TX_MESSAGE_SEND                 (1 << 7)
+
+#define DP_CEC_TUNNELING_IRQ_FLAGS             0x3004
+# define DP_CEC_RX_MESSAGE_INFO_VALID           (1 << 0)
+# define DP_CEC_RX_MESSAGE_OVERFLOW             (1 << 1)
+# define DP_CEC_TX_MESSAGE_SENT                 (1 << 4)
+# define DP_CEC_TX_LINE_ERROR                   (1 << 5)
+# define DP_CEC_TX_ADDRESS_NACK_ERROR           (1 << 6)
+# define DP_CEC_TX_DATA_NACK_ERROR              (1 << 7)
+
+#define DP_CEC_LOGICAL_ADDRESS_MASK            0x300E /* 0x300F word */
+# define DP_CEC_LOGICAL_ADDRESS_0               (1 << 0)
+# define DP_CEC_LOGICAL_ADDRESS_1               (1 << 1)
+# define DP_CEC_LOGICAL_ADDRESS_2               (1 << 2)
+# define DP_CEC_LOGICAL_ADDRESS_3               (1 << 3)
+# define DP_CEC_LOGICAL_ADDRESS_4               (1 << 4)
+# define DP_CEC_LOGICAL_ADDRESS_5               (1 << 5)
+# define DP_CEC_LOGICAL_ADDRESS_6               (1 << 6)
+# define DP_CEC_LOGICAL_ADDRESS_7               (1 << 7)
+#define DP_CEC_LOGICAL_ADDRESS_MASK_2          0x300F /* 0x300E word */
+# define DP_CEC_LOGICAL_ADDRESS_8               (1 << 0)
+# define DP_CEC_LOGICAL_ADDRESS_9               (1 << 1)
+# define DP_CEC_LOGICAL_ADDRESS_10              (1 << 2)
+# define DP_CEC_LOGICAL_ADDRESS_11              (1 << 3)
+# define DP_CEC_LOGICAL_ADDRESS_12              (1 << 4)
+# define DP_CEC_LOGICAL_ADDRESS_13              (1 << 5)
+# define DP_CEC_LOGICAL_ADDRESS_14              (1 << 6)
+# define DP_CEC_LOGICAL_ADDRESS_15              (1 << 7)
+
+#define DP_CEC_RX_MESSAGE_BUFFER               0x3010
+#define DP_CEC_TX_MESSAGE_BUFFER               0x3020
+#define DP_CEC_MESSAGE_BUFFER_LENGTH             0x10
+
+#define DP_AUX_HDCP_BKSV		0x68000
+#define DP_AUX_HDCP_RI_PRIME		0x68005
+#define DP_AUX_HDCP_AKSV		0x68007
+#define DP_AUX_HDCP_AN			0x6800C
+#define DP_AUX_HDCP_V_PRIME(h)		(0x68014 + (h) * 4)
+#define DP_AUX_HDCP_BCAPS		0x68028
+# define DP_BCAPS_REPEATER_PRESENT	BIT(1)
+# define DP_BCAPS_HDCP_CAPABLE		BIT(0)
+#define DP_AUX_HDCP_BSTATUS		0x68029
+# define DP_BSTATUS_REAUTH_REQ		BIT(3)
+# define DP_BSTATUS_LINK_FAILURE	BIT(2)
+# define DP_BSTATUS_R0_PRIME_READY	BIT(1)
+# define DP_BSTATUS_READY		BIT(0)
+#define DP_AUX_HDCP_BINFO		0x6802A
+#define DP_AUX_HDCP_KSV_FIFO		0x6802C
+#define DP_AUX_HDCP_AINFO		0x6803B
+
+/* DP 1.2 Sideband message defines */
+/* peer device type - DP 1.2a Table 2-92 */
+#define DP_PEER_DEVICE_NONE		0x0
+#define DP_PEER_DEVICE_SOURCE_OR_SST	0x1
+#define DP_PEER_DEVICE_MST_BRANCHING	0x2
+#define DP_PEER_DEVICE_SST_SINK		0x3
+#define DP_PEER_DEVICE_DP_LEGACY_CONV	0x4
+
+/* DP 1.2 MST sideband request names DP 1.2a Table 2-80 */
+#define DP_LINK_ADDRESS			0x01
+#define DP_CONNECTION_STATUS_NOTIFY	0x02
+#define DP_ENUM_PATH_RESOURCES		0x10
+#define DP_ALLOCATE_PAYLOAD		0x11
+#define DP_QUERY_PAYLOAD		0x12
+#define DP_RESOURCE_STATUS_NOTIFY	0x13
+#define DP_CLEAR_PAYLOAD_ID_TABLE	0x14
+#define DP_REMOTE_DPCD_READ		0x20
+#define DP_REMOTE_DPCD_WRITE		0x21
+#define DP_REMOTE_I2C_READ		0x22
+#define DP_REMOTE_I2C_WRITE		0x23
+#define DP_POWER_UP_PHY			0x24
+#define DP_POWER_DOWN_PHY		0x25
+#define DP_SINK_EVENT_NOTIFY		0x30
+#define DP_QUERY_STREAM_ENC_STATUS	0x38
+
+/* DP 1.2 MST sideband nak reasons - table 2.84 */
+#define DP_NAK_WRITE_FAILURE		0x01
+#define DP_NAK_INVALID_READ		0x02
+#define DP_NAK_CRC_FAILURE		0x03
+#define DP_NAK_BAD_PARAM		0x04
+#define DP_NAK_DEFER			0x05
+#define DP_NAK_LINK_FAILURE		0x06
+#define DP_NAK_NO_RESOURCES		0x07
+#define DP_NAK_DPCD_FAIL		0x08
+#define DP_NAK_I2C_NAK			0x09
+#define DP_NAK_ALLOCATE_FAIL		0x0a
+
+#define MODE_I2C_START	1
+#define MODE_I2C_WRITE	2
+#define MODE_I2C_READ	4
+#define MODE_I2C_STOP	8
+
+/* DP 1.2 MST PORTs - Section 2.5.1 v1.2a spec */
+#define DP_MST_PHYSICAL_PORT_0 0
+#define DP_MST_LOGICAL_PORT_0 8
+
+#define DP_LINK_STATUS_SIZE	   6
+bool drm_dp_channel_eq_ok(const u8 link_status[DP_LINK_STATUS_SIZE],
+			  int lane_count);
+bool drm_dp_clock_recovery_ok(const u8 link_status[DP_LINK_STATUS_SIZE],
+			      int lane_count);
+u8 drm_dp_get_adjust_request_voltage(const u8 link_status[DP_LINK_STATUS_SIZE],
+				     int lane);
+u8 drm_dp_get_adjust_request_pre_emphasis(const u8 link_status[DP_LINK_STATUS_SIZE],
+					  int lane);
+
+#define DP_BRANCH_OUI_HEADER_SIZE	0xc
+#define DP_RECEIVER_CAP_SIZE		0xf
+#define EDP_PSR_RECEIVER_CAP_SIZE	2
+#define EDP_DISPLAY_CTL_CAP_SIZE	3
+
+void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]);
+void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]);
+
+u8 drm_dp_link_rate_to_bw_code(int link_rate);
+int drm_dp_bw_code_to_link_rate(u8 link_bw);
+
+#define DP_SDP_AUDIO_TIMESTAMP		0x01
+#define DP_SDP_AUDIO_STREAM		0x02
+#define DP_SDP_EXTENSION		0x04 /* DP 1.1 */
+#define DP_SDP_AUDIO_COPYMANAGEMENT	0x05 /* DP 1.2 */
+#define DP_SDP_ISRC			0x06 /* DP 1.2 */
+#define DP_SDP_VSC			0x07 /* DP 1.2 */
+#define DP_SDP_CAMERA_GENERIC(i)	(0x08 + (i)) /* 0-7, DP 1.3 */
+#define DP_SDP_PPS			0x10 /* DP 1.4 */
+#define DP_SDP_VSC_EXT_VESA		0x20 /* DP 1.4 */
+#define DP_SDP_VSC_EXT_CEA		0x21 /* DP 1.4 */
+/* 0x80+ CEA-861 infoframe types */
+
+struct dp_sdp_header {
+	u8 HB0; /* Secondary Data Packet ID */
+	u8 HB1; /* Secondary Data Packet Type */
+	u8 HB2; /* Secondary Data Packet Specific header, Byte 0 */
+	u8 HB3; /* Secondary Data packet Specific header, Byte 1 */
+} __packed;
+
+#define EDP_SDP_HEADER_REVISION_MASK		0x1F
+#define EDP_SDP_HEADER_VALID_PAYLOAD_BYTES	0x1F
+
+struct edp_vsc_psr {
+	struct dp_sdp_header sdp_header;
+	u8 DB0; /* Stereo Interface */
+	u8 DB1; /* 0 - PSR State; 1 - Update RFB; 2 - CRC Valid */
+	u8 DB2; /* CRC value bits 7:0 of the R or Cr component */
+	u8 DB3; /* CRC value bits 15:8 of the R or Cr component */
+	u8 DB4; /* CRC value bits 7:0 of the G or Y component */
+	u8 DB5; /* CRC value bits 15:8 of the G or Y component */
+	u8 DB6; /* CRC value bits 7:0 of the B or Cb component */
+	u8 DB7; /* CRC value bits 15:8 of the B or Cb component */
+	u8 DB8_31[24]; /* Reserved */
+} __packed;
+
+#define EDP_VSC_PSR_STATE_ACTIVE	(1 << 0)
+#define EDP_VSC_PSR_UPDATE_RFB		(1 << 1)
+#define EDP_VSC_PSR_CRC_VALUES_VALID	(1 << 2)
+
+static inline int
+drm_dp_max_link_rate(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
+{
+	return drm_dp_bw_code_to_link_rate(dpcd[DP_MAX_LINK_RATE]);
+}
+
+static inline u8
+drm_dp_max_lane_count(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
+{
+	return dpcd[DP_MAX_LANE_COUNT] & DP_MAX_LANE_COUNT_MASK;
+}
+
+static inline bool
+drm_dp_enhanced_frame_cap(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
+{
+	return dpcd[DP_DPCD_REV] >= 0x11 &&
+		(dpcd[DP_MAX_LANE_COUNT] & DP_ENHANCED_FRAME_CAP);
+}
+
+static inline bool
+drm_dp_tps3_supported(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
+{
+	return dpcd[DP_DPCD_REV] >= 0x12 &&
+		dpcd[DP_MAX_LANE_COUNT] & DP_TPS3_SUPPORTED;
+}
+
+static inline bool
+drm_dp_tps4_supported(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
+{
+	return dpcd[DP_DPCD_REV] >= 0x14 &&
+		dpcd[DP_MAX_DOWNSPREAD] & DP_TPS4_SUPPORTED;
+}
+
+static inline u8
+drm_dp_training_pattern_mask(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
+{
+	return (dpcd[DP_DPCD_REV] >= 0x14) ? DP_TRAINING_PATTERN_MASK_1_4 :
+		DP_TRAINING_PATTERN_MASK;
+}
+
+static inline bool
+drm_dp_is_branch(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
+{
+	return dpcd[DP_DOWNSTREAMPORT_PRESENT] & DP_DWN_STRM_PORT_PRESENT;
+}
+
+#endif /* _DRM_DP_HELPER_H_ */

commit a6285d17cb6e12de86ba6da8d03a159f0649e5aa
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Thu Dec 10 02:44:24 2020 +0000

    video/drm: analogix_dp: Move PLL lock check to analogix_dp_set_link_bandwidth()
    
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
    Change-Id: Iffd2ff42de9102cf0293cf7bb68422dd6331474b

diff --git a/drivers/video/drm/analogix_dp.c b/drivers/video/drm/analogix_dp.c
index 1603c2f987..1b32bf3a18 100644
--- a/drivers/video/drm/analogix_dp.c
+++ b/drivers/video/drm/analogix_dp.c
@@ -84,7 +84,7 @@ static void analogix_dp_training_pattern_dis(struct analogix_dp_device *dp)
 static int analogix_dp_link_start(struct analogix_dp_device *dp)
 {
 	u8 buf[4];
-	int lane, lane_count, pll_tries, retval;
+	int lane, lane_count, retval;
 
 	lane_count = dp->link_train.lane_count;
 
@@ -112,18 +112,6 @@ static int analogix_dp_link_start(struct analogix_dp_device *dp)
 				DP_TRAIN_PRE_EMPH_LEVEL_0;
 	analogix_dp_set_lane_link_training(dp);
 
-	/* Wait for PLL lock */
-	pll_tries = 0;
-	while (analogix_dp_get_pll_lock_status(dp) == PLL_UNLOCKED) {
-		if (pll_tries == DP_TIMEOUT_LOOP_COUNT) {
-			dev_err(dp->dev, "Wait for PLL lock timed out\n");
-			return -ETIMEDOUT;
-		}
-
-		pll_tries++;
-		udelay(120);
-	}
-
 	/* Set training pattern 1 */
 	analogix_dp_set_training_pattern(dp, TRAINING_PTN1);
 
diff --git a/drivers/video/drm/analogix_dp_reg.c b/drivers/video/drm/analogix_dp_reg.c
index a3199eabb4..f129a37921 100644
--- a/drivers/video/drm/analogix_dp_reg.c
+++ b/drivers/video/drm/analogix_dp_reg.c
@@ -21,6 +21,7 @@
 #include <syscon.h>
 #include <asm/io.h>
 #include <asm/gpio.h>
+#include <linux/iopoll.h>
 
 #include "rockchip_display.h"
 #include "rockchip_crtc.h"
@@ -357,7 +358,6 @@ void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
 void analogix_dp_init_analog_func(struct analogix_dp_device *dp)
 {
 	u32 reg;
-	int timeout_loop = 0;
 
 	analogix_dp_set_analog_power_down(dp, POWER_ALL, 0);
 
@@ -369,19 +369,7 @@ void analogix_dp_init_analog_func(struct analogix_dp_device *dp)
 	analogix_dp_write(dp, ANALOGIX_DP_DEBUG_CTL, reg);
 
 	/* Power up PLL */
-	if (analogix_dp_get_pll_lock_status(dp) == PLL_UNLOCKED) {
-		analogix_dp_set_pll_power_down(dp, 0);
-
-		while (analogix_dp_get_pll_lock_status(dp) == PLL_UNLOCKED) {
-			timeout_loop++;
-			if (timeout_loop > DP_TIMEOUT_LOOP_COUNT) {
-				dev_err(dp->dev,
-					"failed to get pll lock status\n");
-				return;
-			}
-			udelay(20);
-		}
-	}
+	analogix_dp_set_pll_power_down(dp, 0);
 
 	/* Enable Serdes FIFO function and Link symbol clock domain module */
 	reg = analogix_dp_read(dp, ANALOGIX_DP_FUNC_EN_2);
@@ -920,11 +908,20 @@ int analogix_dp_read_bytes_from_i2c(struct analogix_dp_device *dp,
 
 void analogix_dp_set_link_bandwidth(struct analogix_dp_device *dp, u32 bwtype)
 {
-	u32 reg;
+	u32 reg, status;
+	int ret;
 
 	reg = bwtype;
 	if ((bwtype == DP_LINK_BW_2_7) || (bwtype == DP_LINK_BW_1_62))
 		analogix_dp_write(dp, ANALOGIX_DP_LINK_BW_SET, reg);
+
+	ret = readx_poll_timeout(analogix_dp_get_pll_lock_status, dp, status,
+				 status != PLL_UNLOCKED,
+				 120 * DP_TIMEOUT_LOOP_COUNT);
+	if (ret) {
+		dev_err(dp->dev, "Wait for pll lock failed %d\n", ret);
+		return;
+	}
 }
 
 void analogix_dp_get_link_bandwidth(struct analogix_dp_device *dp, u32 *bwtype)

commit 253c2dc8a65006926d1acc2cc7f7f28e201f45b7
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Thu Dec 10 02:40:54 2020 +0000

    video/drm: analogix_dp: Simplify analogix_dp_{set/get}_lane_link_training helpers
    
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
    Change-Id: I5e0a90c8a1fd132567635a7751c1ca4ade38e692

diff --git a/drivers/video/drm/analogix_dp.c b/drivers/video/drm/analogix_dp.c
index 5488b7d272..1603c2f987 100644
--- a/drivers/video/drm/analogix_dp.c
+++ b/drivers/video/drm/analogix_dp.c
@@ -81,28 +81,6 @@ static void analogix_dp_training_pattern_dis(struct analogix_dp_device *dp)
 				       DP_TRAINING_PATTERN_DISABLE);
 }
 
-static void
-analogix_dp_set_lane_lane_pre_emphasis(struct analogix_dp_device *dp,
-				       int pre_emphasis, int lane)
-{
-	switch (lane) {
-	case 0:
-		analogix_dp_set_lane0_pre_emphasis(dp, pre_emphasis);
-		break;
-	case 1:
-		analogix_dp_set_lane1_pre_emphasis(dp, pre_emphasis);
-		break;
-
-	case 2:
-		analogix_dp_set_lane2_pre_emphasis(dp, pre_emphasis);
-		break;
-
-	case 3:
-		analogix_dp_set_lane3_pre_emphasis(dp, pre_emphasis);
-		break;
-	}
-}
-
 static int analogix_dp_link_start(struct analogix_dp_device *dp)
 {
 	u8 buf[4];
@@ -127,10 +105,12 @@ static int analogix_dp_link_start(struct analogix_dp_device *dp)
 	if (retval)
 		return retval;
 
-	/* Set TX pre-emphasis to minimum */
+	/* Set TX voltage-swing and pre-emphasis to minimum */
 	for (lane = 0; lane < lane_count; lane++)
-		analogix_dp_set_lane_lane_pre_emphasis(dp,
-			PRE_EMPHASIS_LEVEL_0, lane);
+		dp->link_train.training_lane[lane] =
+				DP_TRAIN_VOLTAGE_SWING_LEVEL_0 |
+				DP_TRAIN_PRE_EMPH_LEVEL_0;
+	analogix_dp_set_lane_link_training(dp);
 
 	/* Wait for PLL lock */
 	pll_tries = 0;
@@ -223,54 +203,6 @@ static unsigned char analogix_dp_get_adjust_request_pre_emphasis(
 	return ((link_value >> shift) & 0xc) >> 2;
 }
 
-static void analogix_dp_set_lane_link_training(struct analogix_dp_device *dp,
-					       u8 training_lane_set, int lane)
-{
-	switch (lane) {
-	case 0:
-		analogix_dp_set_lane0_link_training(dp, training_lane_set);
-		break;
-	case 1:
-		analogix_dp_set_lane1_link_training(dp, training_lane_set);
-		break;
-
-	case 2:
-		analogix_dp_set_lane2_link_training(dp, training_lane_set);
-		break;
-
-	case 3:
-		analogix_dp_set_lane3_link_training(dp, training_lane_set);
-		break;
-	}
-}
-
-static unsigned int
-analogix_dp_get_lane_link_training(struct analogix_dp_device *dp,
-				   int lane)
-{
-	u32 reg;
-
-	switch (lane) {
-	case 0:
-		reg = analogix_dp_get_lane0_link_training(dp);
-		break;
-	case 1:
-		reg = analogix_dp_get_lane1_link_training(dp);
-		break;
-	case 2:
-		reg = analogix_dp_get_lane2_link_training(dp);
-		break;
-	case 3:
-		reg = analogix_dp_get_lane3_link_training(dp);
-		break;
-	default:
-		WARN_ON(1);
-		return 0;
-	}
-
-	return reg;
-}
-
 static void analogix_dp_reduce_link_rate(struct analogix_dp_device *dp)
 {
 	analogix_dp_training_pattern_dis(dp);
@@ -364,10 +296,7 @@ static int analogix_dp_process_clock_recovery(struct analogix_dp_device *dp)
 	}
 
 	analogix_dp_get_adjust_training_lane(dp, adjust_request);
-
-	for (lane = 0; lane < lane_count; lane++)
-		analogix_dp_set_lane_link_training(dp,
-			dp->link_train.training_lane[lane], lane);
+	analogix_dp_set_lane_link_training(dp);
 
 	retval = analogix_dp_write_bytes_to_dpcd(dp,
 			DP_TRAINING_LANE0_SET, lane_count,
@@ -380,7 +309,7 @@ static int analogix_dp_process_clock_recovery(struct analogix_dp_device *dp)
 
 static int analogix_dp_process_equalizer_training(struct analogix_dp_device *dp)
 {
-	int lane, lane_count, retval;
+	int lane_count, retval;
 	u32 reg;
 	u8 link_align, link_status[2], adjust_request[2];
 
@@ -440,9 +369,7 @@ static int analogix_dp_process_equalizer_training(struct analogix_dp_device *dp)
 		return -EIO;
 	}
 
-	for (lane = 0; lane < lane_count; lane++)
-		analogix_dp_set_lane_link_training(dp,
-			dp->link_train.training_lane[lane], lane);
+	analogix_dp_set_lane_link_training(dp);
 
 	retval = analogix_dp_write_bytes_to_dpcd(dp, DP_TRAINING_LANE0_SET,
 			lane_count, dp->link_train.training_lane);
diff --git a/drivers/video/drm/analogix_dp.h b/drivers/video/drm/analogix_dp.h
index 9cfc994a46..dddabe2efd 100644
--- a/drivers/video/drm/analogix_dp.h
+++ b/drivers/video/drm/analogix_dp.h
@@ -1143,26 +1143,8 @@ void analogix_dp_enable_enhanced_mode(struct analogix_dp_device *dp,
 				      bool enable);
 void analogix_dp_set_training_pattern(struct analogix_dp_device *dp,
 				      enum pattern_set pattern);
-void analogix_dp_set_lane0_pre_emphasis(struct analogix_dp_device *dp,
-					u32 level);
-void analogix_dp_set_lane1_pre_emphasis(struct analogix_dp_device *dp,
-					u32 level);
-void analogix_dp_set_lane2_pre_emphasis(struct analogix_dp_device *dp,
-					u32 level);
-void analogix_dp_set_lane3_pre_emphasis(struct analogix_dp_device *dp,
-					u32 level);
-void analogix_dp_set_lane0_link_training(struct analogix_dp_device *dp,
-					 u32 training_lane);
-void analogix_dp_set_lane1_link_training(struct analogix_dp_device *dp,
-					 u32 training_lane);
-void analogix_dp_set_lane2_link_training(struct analogix_dp_device *dp,
-					 u32 training_lane);
-void analogix_dp_set_lane3_link_training(struct analogix_dp_device *dp,
-					 u32 training_lane);
-u32 analogix_dp_get_lane0_link_training(struct analogix_dp_device *dp);
-u32 analogix_dp_get_lane1_link_training(struct analogix_dp_device *dp);
-u32 analogix_dp_get_lane2_link_training(struct analogix_dp_device *dp);
-u32 analogix_dp_get_lane3_link_training(struct analogix_dp_device *dp);
+void analogix_dp_set_lane_link_training(struct analogix_dp_device *dp);
+u32 analogix_dp_get_lane_link_training(struct analogix_dp_device *dp, u8 lane);
 void analogix_dp_reset_macro(struct analogix_dp_device *dp);
 void analogix_dp_init_video(struct analogix_dp_device *dp);
 
diff --git a/drivers/video/drm/analogix_dp_reg.c b/drivers/video/drm/analogix_dp_reg.c
index 6f6b9098b4..a3199eabb4 100644
--- a/drivers/video/drm/analogix_dp_reg.c
+++ b/drivers/video/drm/analogix_dp_reg.c
@@ -951,6 +951,22 @@ void analogix_dp_get_lane_count(struct analogix_dp_device *dp, u32 *count)
 	*count = reg;
 }
 
+void analogix_dp_set_lane_link_training(struct analogix_dp_device *dp)
+{
+	u8 lane;
+
+	for (lane = 0; lane < dp->link_train.lane_count; lane++)
+		analogix_dp_write(dp,
+				  ANALOGIX_DP_LN0_LINK_TRAINING_CTL + 4 * lane,
+				  dp->link_train.training_lane[lane]);
+}
+
+u32 analogix_dp_get_lane_link_training(struct analogix_dp_device *dp, u8 lane)
+{
+	return analogix_dp_read(dp,
+				ANALOGIX_DP_LN0_LINK_TRAINING_CTL + 4 * lane);
+}
+
 void analogix_dp_enable_enhanced_mode(struct analogix_dp_device *dp,
 				      bool enable)
 {
@@ -1000,118 +1016,6 @@ void analogix_dp_set_training_pattern(struct analogix_dp_device *dp,
 	}
 }
 
-void analogix_dp_set_lane0_pre_emphasis(struct analogix_dp_device *dp,
-					u32 level)
-{
-	u32 reg;
-
-	reg = analogix_dp_read(dp, ANALOGIX_DP_LN0_LINK_TRAINING_CTL);
-	reg &= ~PRE_EMPHASIS_SET_MASK;
-	reg |= level << PRE_EMPHASIS_SET_SHIFT;
-	analogix_dp_write(dp, ANALOGIX_DP_LN0_LINK_TRAINING_CTL, reg);
-}
-
-void analogix_dp_set_lane1_pre_emphasis(struct analogix_dp_device *dp,
-					u32 level)
-{
-	u32 reg;
-
-	reg = analogix_dp_read(dp, ANALOGIX_DP_LN1_LINK_TRAINING_CTL);
-	reg &= ~PRE_EMPHASIS_SET_MASK;
-	reg |= level << PRE_EMPHASIS_SET_SHIFT;
-	analogix_dp_write(dp, ANALOGIX_DP_LN1_LINK_TRAINING_CTL, reg);
-}
-
-void analogix_dp_set_lane2_pre_emphasis(struct analogix_dp_device *dp,
-					u32 level)
-{
-	u32 reg;
-
-	reg = analogix_dp_read(dp, ANALOGIX_DP_LN2_LINK_TRAINING_CTL);
-	reg &= ~PRE_EMPHASIS_SET_MASK;
-	reg |= level << PRE_EMPHASIS_SET_SHIFT;
-	analogix_dp_write(dp, ANALOGIX_DP_LN2_LINK_TRAINING_CTL, reg);
-}
-
-void analogix_dp_set_lane3_pre_emphasis(struct analogix_dp_device *dp,
-					u32 level)
-{
-	u32 reg;
-
-	reg = analogix_dp_read(dp, ANALOGIX_DP_LN3_LINK_TRAINING_CTL);
-	reg &= ~PRE_EMPHASIS_SET_MASK;
-	reg |= level << PRE_EMPHASIS_SET_SHIFT;
-	analogix_dp_write(dp, ANALOGIX_DP_LN3_LINK_TRAINING_CTL, reg);
-}
-
-void analogix_dp_set_lane0_link_training(struct analogix_dp_device *dp,
-					 u32 training_lane)
-{
-	u32 reg;
-
-	reg = training_lane;
-	analogix_dp_write(dp, ANALOGIX_DP_LN0_LINK_TRAINING_CTL, reg);
-}
-
-void analogix_dp_set_lane1_link_training(struct analogix_dp_device *dp,
-					 u32 training_lane)
-{
-	u32 reg;
-
-	reg = training_lane;
-	analogix_dp_write(dp, ANALOGIX_DP_LN1_LINK_TRAINING_CTL, reg);
-}
-
-void analogix_dp_set_lane2_link_training(struct analogix_dp_device *dp,
-					 u32 training_lane)
-{
-	u32 reg;
-
-	reg = training_lane;
-	analogix_dp_write(dp, ANALOGIX_DP_LN2_LINK_TRAINING_CTL, reg);
-}
-
-void analogix_dp_set_lane3_link_training(struct analogix_dp_device *dp,
-					 u32 training_lane)
-{
-	u32 reg;
-
-	reg = training_lane;
-	analogix_dp_write(dp, ANALOGIX_DP_LN3_LINK_TRAINING_CTL, reg);
-}
-
-u32 analogix_dp_get_lane0_link_training(struct analogix_dp_device *dp)
-{
-	u32 reg;
-
-	reg = analogix_dp_read(dp, ANALOGIX_DP_LN0_LINK_TRAINING_CTL);
-	return reg;
-}
-
-u32 analogix_dp_get_lane1_link_training(struct analogix_dp_device *dp)
-{
-	u32 reg;
-
-	reg = analogix_dp_read(dp, ANALOGIX_DP_LN1_LINK_TRAINING_CTL);
-	return reg;
-}
-
-u32 analogix_dp_get_lane2_link_training(struct analogix_dp_device *dp)
-{
-	u32 reg;
-
-	reg = analogix_dp_read(dp, ANALOGIX_DP_LN2_LINK_TRAINING_CTL);
-	return reg;
-}
-
-u32 analogix_dp_get_lane3_link_training(struct analogix_dp_device *dp)
-{
-	u32 reg;
-
-	reg = analogix_dp_read(dp, ANALOGIX_DP_LN3_LINK_TRAINING_CTL);
-	return reg;
-}
-
 void analogix_dp_reset_macro(struct analogix_dp_device *dp)
 {
 	u32 reg;

commit d90a0d9f9409a35edc8be9c0298d80912a7e3d1b
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Tue Aug 25 10:49:43 2020 +0800

    video/drm: analogix_dp: Implement detect callback
    
    Change-Id: I1e6746768092747920afcb3af07e36c1ecae9856
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/analogix_dp.c b/drivers/video/drm/analogix_dp.c
index a6ff9f9fdd..5488b7d272 100644
--- a/drivers/video/drm/analogix_dp.c
+++ b/drivers/video/drm/analogix_dp.c
@@ -900,11 +900,20 @@ static int analogix_dp_connector_disable(struct display_state *state)
 	return 0;
 }
 
+static int analogix_dp_connector_detect(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct analogix_dp_device *dp = dev_get_priv(conn_state->dev);
+
+	return analogix_dp_detect(dp);
+}
+
 static const struct rockchip_connector_funcs analogix_dp_connector_funcs = {
 	.init = analogix_dp_connector_init,
 	.get_edid = analogix_dp_connector_get_edid,
 	.enable = analogix_dp_connector_enable,
 	.disable = analogix_dp_connector_disable,
+	.detect = analogix_dp_connector_detect,
 };
 
 static int analogix_dp_probe(struct udevice *dev)
@@ -933,6 +942,8 @@ static int analogix_dp_probe(struct udevice *dev)
 		return ret;
 	}
 
+	dp->force_hpd = dev_read_bool(dev, "force-hpd");
+
 	dp->plat_data.dev_type = ROCKCHIP_DP;
 	dp->plat_data.subdev_type = pdata->chip_type;
 	/*
diff --git a/drivers/video/drm/analogix_dp.h b/drivers/video/drm/analogix_dp.h
index adde139fd7..9cfc994a46 100644
--- a/drivers/video/drm/analogix_dp.h
+++ b/drivers/video/drm/analogix_dp.h
@@ -1075,6 +1075,7 @@ struct analogix_dp_device {
 	void *grf;
 	struct reset_ctl reset;
 	struct gpio_desc hpd_gpio;
+	bool force_hpd;
 	struct video_info	video_info;
 	struct link_train	link_train;
 	struct drm_display_mode *mode;
@@ -1105,7 +1106,7 @@ enum dp_irq_type analogix_dp_get_irq_type(struct analogix_dp_device *dp);
 void analogix_dp_clear_hotplug_interrupts(struct analogix_dp_device *dp);
 void analogix_dp_reset_aux(struct analogix_dp_device *dp);
 void analogix_dp_init_aux(struct analogix_dp_device *dp);
-int analogix_dp_get_plug_in_status(struct analogix_dp_device *dp);
+int analogix_dp_detect(struct analogix_dp_device *dp);
 void analogix_dp_enable_sw_function(struct analogix_dp_device *dp);
 int analogix_dp_start_aux_transaction(struct analogix_dp_device *dp);
 int analogix_dp_write_byte_to_dpcd(struct analogix_dp_device *dp,
diff --git a/drivers/video/drm/analogix_dp_reg.c b/drivers/video/drm/analogix_dp_reg.c
index 6204d0f1f3..6f6b9098b4 100644
--- a/drivers/video/drm/analogix_dp_reg.c
+++ b/drivers/video/drm/analogix_dp_reg.c
@@ -495,20 +495,21 @@ void analogix_dp_init_aux(struct analogix_dp_device *dp)
 	analogix_dp_write(dp, ANALOGIX_DP_FUNC_EN_2, reg);
 }
 
-int analogix_dp_get_plug_in_status(struct analogix_dp_device *dp)
+int analogix_dp_detect(struct analogix_dp_device *dp)
 {
 	u32 reg;
 
-	if (dm_gpio_is_valid(&dp->hpd_gpio)) {
-		if (dm_gpio_get_value(&dp->hpd_gpio))
-			return 0;
-	} else {
-		reg = analogix_dp_read(dp, ANALOGIX_DP_SYS_CTL_3);
-		if (reg & HPD_STATUS)
-			return 0;
-	}
+	if (dm_gpio_is_valid(&dp->hpd_gpio))
+		return dm_gpio_get_value(&dp->hpd_gpio);
 
-	return -EINVAL;
+	if (dp->force_hpd)
+		analogix_dp_force_hpd(dp);
+
+	reg = analogix_dp_read(dp, ANALOGIX_DP_SYS_CTL_3);
+	if (reg & HPD_STATUS)
+		return 1;
+
+	return 0;
 }
 
 void analogix_dp_enable_sw_function(struct analogix_dp_device *dp)

commit 2b756732594ac3d7a8d964836c106e345eeb51a8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Dec 28 09:49:08 2020 +0800

    configs: rk3568: enable decompress image
    
    Do decompress in post image process.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I018d346bf28878e41709d1b50d6c1e097fa6cb6f

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index dbf4e9e0ed..1fdf48030a 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -19,8 +19,10 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3568-evb"
 CONFIG_SMBIOS_PRODUCT_NAME=""
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
+CONFIG_FIT_IMAGE_POST_PROCESS=y
 CONFIG_FIT_HW_CRYPTO=y
 CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
 CONFIG_SPL_FIT_HW_CRYPTO=y
 # CONFIG_SPL_SYS_DCACHE_OFF is not set
 CONFIG_BOOTDELAY=0

commit acfb487b4ae04e32e5ff915da3488e6f5681bd4c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Dec 28 09:48:52 2020 +0800

    configs: rk3568: sync with make savedefconfig
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ib3c7af85ca5bd9989c6f522f00320c7d6f6f18f0

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index 168e3dab69..dbf4e9e0ed 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -24,7 +24,6 @@ CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_FIT_HW_CRYPTO=y
 # CONFIG_SPL_SYS_DCACHE_OFF is not set
 CONFIG_BOOTDELAY=0
-CONFIG_CONSOLE_MUX=y
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
@@ -116,7 +115,6 @@ CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SPI_FLASH_XMC=y
 CONFIG_SPI_FLASH_MTD=y
 CONFIG_PHYLIB=y
-CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
@@ -168,7 +166,6 @@ CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_INNO_MIPI_PHY=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_LCD=y
-CONFIG_I2C_EDID=y
 CONFIG_ROCKCHIP_EINK=y
 CONFIG_ROCKCHIP_EBC_TCON=y
 CONFIG_ROCKCHIP_TPS65185=y

commit cf9110094e1964ae0f51d574eb5e85c9d93d0764
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Thu Dec 10 01:15:47 2020 +0000

    phy: Add driver for Rockchip Naneng eDP Transmitter PHY
    
    DPTPHYT22ULP is designed for chips that perform eDP/DP data
    communication while operating at low power consumption.
    The main link is a multi-gigabit transmitter macro which
    enable speed up to 4.0Gbps data transmitter with optimized
    power and die size, also it can be easily fabricated and
    implemented in a video system. The AUX channel is a halfduplex,
    bidirectional channel consisting of one differential pair,
    supporting the bit rate of about 1Mbps.
    
    Macro consists of multi-main link transmitter channels,
    AUX channel, one PLL and bias-gen unit. The main link
    transmitter performs dedicated P2S, clock generator,
    driver with preemphasis and self-test. Each of the channels
    can be turned off individually.
    
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
    Change-Id: Ic60d8bb86a53f686e8c46323b58d099c727a36d3

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 0b2e6acfeb..0b2b9c030b 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -77,6 +77,12 @@ config PHY_ROCKCHIP_INNO_USB3
 	help
 	  Support for Rockchip USB 3.0 PHY with Innosilicon IP block.
 
+config PHY_ROCKCHIP_NANENG_EDP
+	bool "Support Rockchip Naneng eDP Transmitter PHY"
+	depends on PHY && ARCH_ROCKCHIP
+	help
+	  Support for Rockchip eDP Transmitter PHY with Naneng IP block.
+
 config PHY_ROCKCHIP_TYPEC
 	bool "Support Rockchip TYPEC PHY Driver"
 	depends on PHY && ARCH_ROCKCHIP
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index 1d1ce57e07..f320eb2ef9 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_$(SPL_)NOP_PHY) += nop-phy.o
 obj-$(CONFIG_PHY_ROCKCHIP_INNO_USB2) += phy-rockchip-inno-usb2.o
 obj-$(CONFIG_PHY_ROCKCHIP_NANENG_USB2) += phy-rockchip-naneng-usb2.o
 obj-$(CONFIG_PHY_ROCKCHIP_INNO_USB3) += phy-rockchip-inno-usb3.o
+obj-$(CONFIG_PHY_ROCKCHIP_NANENG_EDP) += phy-rockchip-naneng-edp.o
 obj-$(CONFIG_PHY_ROCKCHIP_TYPEC) += phy-rockchip-typec.o
 obj-$(CONFIG_PHY_SANDBOX) += sandbox-phy.o
 obj-$(CONFIG_$(SPL_)PIPE3_PHY) += ti-pipe3-phy.o
diff --git a/drivers/phy/phy-rockchip-naneng-edp.c b/drivers/phy/phy-rockchip-naneng-edp.c
new file mode 100644
index 0000000000..68bbdeefb0
--- /dev/null
+++ b/drivers/phy/phy-rockchip-naneng-edp.c
@@ -0,0 +1,326 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2020 Rockchip Electronics Co. Ltd.
+ *
+ * Author: Wyon Bi <bivvy.bi@rock-chips.com>
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <generic-phy.h>
+#include <reset.h>
+#include <asm/io.h>
+#include <linux/iopoll.h>
+
+#define HIWORD_UPDATE(x, h, l)		((((x) << (l)) & GENMASK((h), (l))) | \
+					 (GENMASK((h), (l)) << 16))
+
+#define EDP_PHY_GRF_CON0		0x0000
+#define EDP_PHY_TX_IDLE(x)		HIWORD_UPDATE(x, 11,  8)
+#define EDP_PHY_TX_PD(x)		HIWORD_UPDATE(x,  7,  4)
+#define EDP_PHY_IDDQ_EN(x)		HIWORD_UPDATE(x,  1,  1)
+#define EDP_PHY_PD_PLL(x)		HIWORD_UPDATE(x,  0,  0)
+#define EDP_PHY_GRF_CON1		0x0004
+#define EDP_PHY_PLL_DIV(x)		HIWORD_UPDATE(x, 14,  0)
+#define EDP_PHY_GRF_CON2		0x0008
+#define EDP_PHY_TX_RTERM(x)		HIWORD_UPDATE(x, 10,  8)
+#define EDP_PHY_RATE(x)			HIWORD_UPDATE(x,  5,  4)
+#define EDP_PHY_REF_DIV(x)		HIWORD_UPDATE(x,  3,  0)
+#define EDP_PHY_GRF_CON3		0x000c
+#define EDP_PHY_TX_EMP(lane, x)		HIWORD_UPDATE(x, 4 * ((lane) + 1) - 1, \
+						      4 * (lane))
+#define EDP_PHY_GRF_CON4		0x0010
+#define EDP_PHY_TX_AMP(lane, x)		HIWORD_UPDATE(x, 4 * ((lane) + 1) - 2, \
+						      4 * (lane))
+#define EDP_PHY_GRF_CON5		0x0014
+#define EDP_PHY_TX_MODE(x)		HIWORD_UPDATE(x,  9,  8)
+#define EDP_PHY_TX_AMP_SCALE(lane, x)	HIWORD_UPDATE(x, 2 * ((lane) + 1) - 1, \
+						      2 * (lane))
+#define EDP_PHY_GRF_CON6		0x0018
+#define EDP_PHY_SSC_DEPTH(x)		HIWORD_UPDATE(x, 15, 12)
+#define EDP_PHY_SSC_EN(x)		HIWORD_UPDATE(x, 11, 11)
+#define EDP_PHY_SSC_CNT(x)		HIWORD_UPDATE(x,  9,  0)
+#define EDP_PHY_GRF_CON7		0x001c
+#define EDP_PHY_GRF_CON8		0x0020
+#define EDP_PHY_PLL_CTL_H(x)		HIWORD_UPDATE(x, 15,  0)
+#define EDP_PHY_GRF_CON9		0x0024
+#define EDP_PHY_TX_CTL(x)		HIWORD_UPDATE(x, 15,  0)
+#define EDP_PHY_GRF_CON10		0x0028
+#define EDP_PHY_AUX_RCV_PD_SEL(x)	HIWORD_UPDATE(x,  5,  5)
+#define EDP_PHY_AUX_DRV_PD_SEL(x)	HIWORD_UPDATE(x,  4,  4)
+#define EDP_PHY_AUX_IDLE(x)		HIWORD_UPDATE(x,  2,  2)
+#define EDP_PHY_AUX_RCV_PD(x)		HIWORD_UPDATE(x,  1,  1)
+#define EDP_PHY_AUX_DRV_PD(x)		HIWORD_UPDATE(x,  0,  0)
+#define EDP_PHY_GRF_CON11		0x002c
+#define EDP_PHY_AUX_RCV_VCM(x)		HIWORD_UPDATE(x, 14, 12)
+#define EDP_PHY_AUX_MODE(x)		HIWORD_UPDATE(x, 11, 10)
+#define EDP_PHY_AUX_AMP_SCALE(x)	HIWORD_UPDATE(x,  9,  8)
+#define EDP_PHY_AUX_AMP(x)		HIWORD_UPDATE(x,  6,  4)
+#define EDP_PHY_AUX_RTERM(x)		HIWORD_UPDATE(x,  2,  0)
+#define EDP_PHY_GRF_STATUS0		0x0030
+#define PLL_RDY				BIT(0)
+#define EDP_PHY_GRF_STATUS1		0x0034
+
+struct rockchip_edp_phy {
+	void __iomem *regs;
+	struct udevice *dev;
+	struct reset_ctl apb_reset;
+};
+
+static struct {
+	int amp;
+	int amp_scale;
+	int emp;
+} vp[4][4] = {
+	{ {0x1, 0x1, 0x0}, {0x2, 0x1, 0x4}, {0x3, 0x1, 0x8}, {0x4, 0x1, 0xd} },
+	{ {0x3, 0x1, 0x0}, {0x5, 0x1, 0x7}, {0x6, 0x1, 0x6}, { -1,  -1,  -1} },
+	{ {0x5, 0x1, 0x0}, {0x7, 0x1, 0x4}, { -1,  -1,  -1}, { -1,  -1,  -1} },
+	{ {0x7, 0x1, 0x0}, { -1,  -1,  -1}, { -1,  -1,  -1}, { -1,  -1,  -1} },
+};
+
+static int rockchip_edp_phy_set_voltages(struct rockchip_edp_phy *edpphy,
+					 struct phy_configure_opts_dp *dp)
+{
+	u8 lane;
+	u32 val;
+
+	for (lane = 0; lane < dp->lanes; lane++) {
+		val = vp[dp->voltage[lane]][dp->pre[lane]].amp;
+		writel(EDP_PHY_TX_AMP(lane, val),
+		       edpphy->regs + EDP_PHY_GRF_CON4);
+
+		val = vp[dp->voltage[lane]][dp->pre[lane]].amp_scale;
+		writel(EDP_PHY_TX_AMP_SCALE(lane, val),
+		       edpphy->regs + EDP_PHY_GRF_CON5);
+
+		val = vp[dp->voltage[lane]][dp->pre[lane]].emp;
+		writel(EDP_PHY_TX_EMP(lane, val),
+		       edpphy->regs + EDP_PHY_GRF_CON3);
+	}
+
+	return 0;
+}
+
+static int rockchip_edp_phy_set_rate(struct rockchip_edp_phy *edpphy,
+				     struct phy_configure_opts_dp *dp)
+{
+	u32 value;
+	int ret;
+
+	writel(EDP_PHY_TX_IDLE(0xf) | EDP_PHY_TX_PD(0xf),
+	       edpphy->regs + EDP_PHY_GRF_CON0);
+	udelay(100);
+	writel(EDP_PHY_TX_MODE(0x3), edpphy->regs + EDP_PHY_GRF_CON5);
+	writel(EDP_PHY_PD_PLL(0x1), edpphy->regs + EDP_PHY_GRF_CON0);
+
+	switch (dp->link_rate) {
+	case 1620:
+		writel(EDP_PHY_PLL_DIV(0x4380),
+		       edpphy->regs + EDP_PHY_GRF_CON1);
+		writel(EDP_PHY_TX_RTERM(0x1) | EDP_PHY_RATE(0x1) |
+		       EDP_PHY_REF_DIV(0x0), edpphy->regs + EDP_PHY_GRF_CON2);
+		writel(EDP_PHY_PLL_CTL_H(0x0800),
+		       edpphy->regs + EDP_PHY_GRF_CON8);
+		writel(EDP_PHY_TX_CTL(0x0000), edpphy->regs + EDP_PHY_GRF_CON9);
+		break;
+	case 2700:
+		writel(EDP_PHY_PLL_DIV(0x3840),
+		       edpphy->regs + EDP_PHY_GRF_CON1);
+		writel(EDP_PHY_TX_RTERM(0x1) | EDP_PHY_RATE(0x0) |
+		       EDP_PHY_REF_DIV(0x0), edpphy->regs + EDP_PHY_GRF_CON2);
+		writel(EDP_PHY_PLL_CTL_H(0x0800),
+		       edpphy->regs + EDP_PHY_GRF_CON8);
+		writel(EDP_PHY_TX_CTL(0x0000), edpphy->regs + EDP_PHY_GRF_CON9);
+		break;
+	}
+
+	if (dp->ssc)
+		writel(EDP_PHY_SSC_DEPTH(0x9) | EDP_PHY_SSC_EN(0x1) |
+		       EDP_PHY_SSC_CNT(0x17d),
+		       edpphy->regs + EDP_PHY_GRF_CON6);
+	else
+		writel(EDP_PHY_SSC_EN(0x0), edpphy->regs + EDP_PHY_GRF_CON6);
+
+	writel(EDP_PHY_PD_PLL(0x0), edpphy->regs + EDP_PHY_GRF_CON0);
+	writel(EDP_PHY_TX_PD(~GENMASK(dp->lanes - 1, 0)),
+	       edpphy->regs + EDP_PHY_GRF_CON0);
+	ret = readl_poll_timeout(edpphy->regs + EDP_PHY_GRF_STATUS0,
+				 value, value & PLL_RDY, 1000);
+	if (ret) {
+		dev_err(edpphy->dev, "pll is not ready: %d\n", ret);
+		return ret;
+	}
+
+	writel(EDP_PHY_TX_MODE(0x0), edpphy->regs + EDP_PHY_GRF_CON5);
+	writel(EDP_PHY_TX_IDLE(~GENMASK(dp->lanes - 1, 0)),
+	       edpphy->regs + EDP_PHY_GRF_CON0);
+
+	return 0;
+}
+
+static int rockchip_edp_phy_verify_config(struct rockchip_edp_phy *edpphy,
+					  struct phy_configure_opts_dp *dp)
+{
+	int i;
+
+	/* If changing link rate was required, verify it's supported. */
+	if (dp->set_rate) {
+		switch (dp->link_rate) {
+		case 1620:
+		case 2700:
+			/* valid bit rate */
+			break;
+		default:
+			return -EINVAL;
+		}
+	}
+
+	/* Verify lane count. */
+	switch (dp->lanes) {
+	case 1:
+	case 2:
+	case 4:
+		/* valid lane count. */
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	/*
+	 * If changing voltages is required, check swing and pre-emphasis
+	 * levels, per-lane.
+	 */
+	if (dp->set_voltages) {
+		/* Lane count verified previously. */
+		for (i = 0; i < dp->lanes; i++) {
+			if (dp->voltage[i] > 3 || dp->pre[i] > 3)
+				return -EINVAL;
+
+			/*
+			 * Sum of voltage swing and pre-emphasis levels cannot
+			 * exceed 3.
+			 */
+			if (dp->voltage[i] + dp->pre[i] > 3)
+				return -EINVAL;
+		}
+	}
+
+	return 0;
+}
+
+static int rockchip_edp_phy_configure(struct phy *phy,
+				      union phy_configure_opts *opts)
+{
+	struct rockchip_edp_phy *edpphy = dev_get_priv(phy->dev);
+	int ret;
+
+	ret = rockchip_edp_phy_verify_config(edpphy, &opts->dp);
+	if (ret) {
+		dev_err(edpphy->dev, "invalid params for phy configure\n");
+		return ret;
+	}
+
+	if (opts->dp.set_rate) {
+		ret = rockchip_edp_phy_set_rate(edpphy, &opts->dp);
+		if (ret) {
+			dev_err(edpphy->dev,
+				"rockchip_edp_phy_set_rate failed\n");
+			return ret;
+		}
+	}
+
+	if (opts->dp.set_voltages) {
+		ret = rockchip_edp_phy_set_voltages(edpphy, &opts->dp);
+		if (ret) {
+			dev_err(edpphy->dev,
+				"rockchip_edp_phy_set_voltages failed\n");
+			return ret;
+		}
+	}
+
+	return 0;
+}
+
+static int rockchip_edp_phy_power_on(struct phy *phy)
+{
+	struct rockchip_edp_phy *edpphy = dev_get_priv(phy->dev);
+
+	reset_assert(&edpphy->apb_reset);
+	udelay(1);
+	reset_deassert(&edpphy->apb_reset);
+	udelay(1);
+
+	writel(EDP_PHY_AUX_RCV_PD(0x1) | EDP_PHY_AUX_DRV_PD(0x1) |
+	       EDP_PHY_AUX_IDLE(0x1), edpphy->regs + EDP_PHY_GRF_CON10);
+	writel(EDP_PHY_TX_IDLE(0xf) | EDP_PHY_TX_PD(0xf) | EDP_PHY_PD_PLL(0x1),
+	       edpphy->regs + EDP_PHY_GRF_CON0);
+	udelay(100);
+
+	writel(EDP_PHY_AUX_RCV_VCM(0x4) | EDP_PHY_AUX_MODE(0x1) |
+	       EDP_PHY_AUX_AMP_SCALE(0x1) | EDP_PHY_AUX_AMP(0x3) |
+	       EDP_PHY_AUX_RTERM(0x1), edpphy->regs + EDP_PHY_GRF_CON11);
+
+	writel(EDP_PHY_AUX_RCV_PD(0x0) | EDP_PHY_AUX_DRV_PD(0x0),
+	       edpphy->regs + EDP_PHY_GRF_CON10);
+	udelay(100);
+
+	writel(EDP_PHY_AUX_IDLE(0x0), edpphy->regs + EDP_PHY_GRF_CON10);
+	mdelay(20);
+
+	return 0;
+}
+
+static int rockchip_edp_phy_power_off(struct phy *phy)
+{
+	struct rockchip_edp_phy *edpphy = dev_get_priv(phy->dev);
+
+	writel(EDP_PHY_TX_IDLE(0xf) | EDP_PHY_TX_PD(0xf),
+	       edpphy->regs + EDP_PHY_GRF_CON0);
+	udelay(100);
+	writel(EDP_PHY_TX_MODE(0x3), edpphy->regs + EDP_PHY_GRF_CON5);
+	writel(EDP_PHY_PD_PLL(0x1), edpphy->regs + EDP_PHY_GRF_CON0);
+	writel(EDP_PHY_AUX_RCV_PD(0x1) | EDP_PHY_AUX_DRV_PD(0x1) |
+	       EDP_PHY_AUX_IDLE(0x1), edpphy->regs + EDP_PHY_GRF_CON10);
+
+	return 0;
+}
+
+static struct phy_ops rockchip_edp_phy_ops = {
+	.power_on = rockchip_edp_phy_power_on,
+	.power_off = rockchip_edp_phy_power_off,
+	.configure = rockchip_edp_phy_configure,
+};
+
+static int rockchip_edp_phy_probe(struct udevice *dev)
+{
+	struct rockchip_edp_phy *edpphy = dev_get_priv(dev);
+	int ret;
+
+	edpphy->regs = dev_read_addr_ptr(dev);
+	if (!edpphy->regs)
+		return -ENOENT;
+
+	edpphy->dev = dev;
+
+	ret = reset_get_by_name(dev, "apb", &edpphy->apb_reset);
+	if (ret < 0) {
+		dev_err(dev, "failed to get apb reset: %d\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static const struct udevice_id rockchip_edp_phy_ids[] = {
+	{ .compatible = "rockchip,rk3568-edp-phy", },
+	{}
+};
+
+U_BOOT_DRIVER(rockchip_edp_phy) = {
+	.name		= "rockchip_edp_phy",
+	.id		= UCLASS_PHY,
+	.ops		= &rockchip_edp_phy_ops,
+	.of_match	= rockchip_edp_phy_ids,
+	.probe		= rockchip_edp_phy_probe,
+	.priv_auto_alloc_size = sizeof(struct rockchip_edp_phy),
+};

commit 672d3078db622c26e62a60b0d4b433cc1cb32944
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Thu Dec 10 02:23:22 2020 +0000

    phy: Add DisplayPort configuration options
    
    Allow DisplayPort PHYs to be configured through the generic
    functions through a custom structure added to the generic union.
    The configuration structure is used for reconfiguration of
    DisplayPort PHYs during link training operation.
    
    The parameters added here are the ones defined in the DisplayPort
    spec v1.4 which include link rate, number of lanes, voltage swing
    and pre-emphasis.
    
    Add the DisplayPort phy mode to the generic phy_mode enum.
    
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
    Change-Id: I472cc21ccf19ae55888085500bfad27787cc3074

diff --git a/include/generic-phy-dp.h b/include/generic-phy-dp.h
new file mode 100644
index 0000000000..2520e20737
--- /dev/null
+++ b/include/generic-phy-dp.h
@@ -0,0 +1,93 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2019 Cadence Design Systems Inc.
+ */
+
+#ifndef __PHY_DP_H_
+#define __PHY_DP_H_
+
+/**
+ * struct phy_configure_opts_dp - DisplayPort PHY configuration set
+ *
+ * This structure is used to represent the configuration state of a
+ * DisplayPort phy.
+ */
+struct phy_configure_opts_dp {
+	/**
+	 * @link_rate:
+	 *
+	 * Link Rate, in Mb/s, of the main link.
+	 *
+	 * Allowed values: 1620, 2160, 2430, 2700, 3240, 4320, 5400, 8100 Mb/s
+	 */
+	unsigned int link_rate;
+
+	/**
+	 * @lanes:
+	 *
+	 * Number of active, consecutive, data lanes, starting from
+	 * lane 0, used for the transmissions on main link.
+	 *
+	 * Allowed values: 1, 2, 4
+	 */
+	unsigned int lanes;
+
+	/**
+	 * @voltage:
+	 *
+	 * Voltage swing levels, as specified by DisplayPort specification,
+	 * to be used by particular lanes. One value per lane.
+	 * voltage[0] is for lane 0, voltage[1] is for lane 1, etc.
+	 *
+	 * Maximum value: 3
+	 */
+	unsigned int voltage[4];
+
+	/**
+	 * @pre:
+	 *
+	 * Pre-emphasis levels, as specified by DisplayPort specification, to be
+	 * used by particular lanes. One value per lane.
+	 *
+	 * Maximum value: 3
+	 */
+	unsigned int pre[4];
+
+	/**
+	 * @ssc:
+	 *
+	 * Flag indicating, whether or not to enable spread-spectrum clocking.
+	 *
+	 */
+	u8 ssc : 1;
+
+	/**
+	 * @set_rate:
+	 *
+	 * Flag indicating, whether or not reconfigure link rate and SSC to
+	 * requested values.
+	 *
+	 */
+	u8 set_rate : 1;
+
+	/**
+	 * @set_lanes:
+	 *
+	 * Flag indicating, whether or not reconfigure lane count to
+	 * requested value.
+	 *
+	 */
+	u8 set_lanes : 1;
+
+	/**
+	 * @set_voltages:
+	 *
+	 * Flag indicating, whether or not reconfigure voltage swing
+	 * and pre-emphasis to requested values. Only lanes specified
+	 * by "lanes" parameter will be affected.
+	 *
+	 */
+	u8 set_voltages : 1;
+};
+
+#endif /* __PHY_DP_H_ */
diff --git a/include/generic-phy.h b/include/generic-phy.h
index 3334a29119..130d044cd2 100644
--- a/include/generic-phy.h
+++ b/include/generic-phy.h
@@ -8,10 +8,12 @@
 #ifndef __GENERIC_PHY_H
 #define __GENERIC_PHY_H
 
+#include <generic-phy-dp.h>
 #include <generic-phy-mipi-dphy.h>
 
 enum phy_mode {
 	PHY_MODE_INVALID,
+	PHY_MODE_DP,
 };
 
 /**
@@ -19,9 +21,12 @@ enum phy_mode {
  *
  * @mipi_dphy: Configuration set applicable for phys supporting
  *	       the MIPI_DPHY phy mode.
+ * @dp:	       Configuration set applicable for phys supporting
+ *	       the DisplayPort protocol.
  */
 union phy_configure_opts {
 	struct phy_configure_opts_mipi_dphy     mipi_dphy;
+	struct phy_configure_opts_dp		dp;
 };
 
 /**

commit 0725058a7ddefa9a5d1771691bb8fd5a61ae8568
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Thu Dec 10 02:19:17 2020 +0000

    phy: Add MIPI D-PHY configuration options
    
    Now that we have some infrastructure for it, allow the MIPI D-PHY phy's to
    be configured through the generic functions through a custom structure
    added to the generic union.
    
    The parameters added here are the ones defined in the MIPI D-PHY spec, plus
    the number of lanes in use. The current set of parameters should cover all
    the potential users.
    
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
    Change-Id: If546789f44b477b9f46507e70ad9a59a4ab35288

diff --git a/include/generic-phy-mipi-dphy.h b/include/generic-phy-mipi-dphy.h
new file mode 100644
index 0000000000..b6b9e49ee3
--- /dev/null
+++ b/include/generic-phy-mipi-dphy.h
@@ -0,0 +1,277 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2018 Cadence Design Systems Inc.
+ */
+
+#ifndef __PHY_MIPI_DPHY_H_
+#define __PHY_MIPI_DPHY_H_
+
+/**
+ * struct phy_configure_opts_mipi_dphy - MIPI D-PHY configuration set
+ *
+ * This structure is used to represent the configuration state of a
+ * MIPI D-PHY phy.
+ */
+struct phy_configure_opts_mipi_dphy {
+	/**
+	 * @clk_miss:
+	 *
+	 * Timeout, in picoseconds, for receiver to detect absence of
+	 * Clock transitions and disable the Clock Lane HS-RX.
+	 *
+	 * Maximum value: 60000 ps
+	 */
+	unsigned int		clk_miss;
+
+	/**
+	 * @clk_post:
+	 *
+	 * Time, in picoseconds, that the transmitter continues to
+	 * send HS clock after the last associated Data Lane has
+	 * transitioned to LP Mode. Interval is defined as the period
+	 * from the end of @hs_trail to the beginning of @clk_trail.
+	 *
+	 * Minimum value: 60000 ps + 52 * @hs_clk_rate period in ps
+	 */
+	unsigned int		clk_post;
+
+	/**
+	 * @clk_pre:
+	 *
+	 * Time, in UI, that the HS clock shall be driven by
+	 * the transmitter prior to any associated Data Lane beginning
+	 * the transition from LP to HS mode.
+	 *
+	 * Minimum value: 8 UI
+	 */
+	unsigned int		clk_pre;
+
+	/**
+	 * @clk_prepare:
+	 *
+	 * Time, in picoseconds, that the transmitter drives the Clock
+	 * Lane LP-00 Line state immediately before the HS-0 Line
+	 * state starting the HS transmission.
+	 *
+	 * Minimum value: 38000 ps
+	 * Maximum value: 95000 ps
+	 */
+	unsigned int		clk_prepare;
+
+	/**
+	 * @clk_settle:
+	 *
+	 * Time interval, in picoseconds, during which the HS receiver
+	 * should ignore any Clock Lane HS transitions, starting from
+	 * the beginning of @clk_prepare.
+	 *
+	 * Minimum value: 95000 ps
+	 * Maximum value: 300000 ps
+	 */
+	unsigned int		clk_settle;
+
+	/**
+	 * @clk_term_en:
+	 *
+	 * Time, in picoseconds, for the Clock Lane receiver to enable
+	 * the HS line termination.
+	 *
+	 * Maximum value: 38000 ps
+	 */
+	unsigned int		clk_term_en;
+
+	/**
+	 * @clk_trail:
+	 *
+	 * Time, in picoseconds, that the transmitter drives the HS-0
+	 * state after the last payload clock bit of a HS transmission
+	 * burst.
+	 *
+	 * Minimum value: 60000 ps
+	 */
+	unsigned int		clk_trail;
+
+	/**
+	 * @clk_zero:
+	 *
+	 * Time, in picoseconds, that the transmitter drives the HS-0
+	 * state prior to starting the Clock.
+	 */
+	unsigned int		clk_zero;
+
+	/**
+	 * @d_term_en:
+	 *
+	 * Time, in picoseconds, for the Data Lane receiver to enable
+	 * the HS line termination.
+	 *
+	 * Maximum value: 35000 ps + 4 * @hs_clk_rate period in ps
+	 */
+	unsigned int		d_term_en;
+
+	/**
+	 * @eot:
+	 *
+	 * Transmitted time interval, in picoseconds, from the start
+	 * of @hs_trail or @clk_trail, to the start of the LP- 11
+	 * state following a HS burst.
+	 *
+	 * Maximum value: 105000 ps + 12 * @hs_clk_rate period in ps
+	 */
+	unsigned int		eot;
+
+	/**
+	 * @hs_exit:
+	 *
+	 * Time, in picoseconds, that the transmitter drives LP-11
+	 * following a HS burst.
+	 *
+	 * Minimum value: 100000 ps
+	 */
+	unsigned int		hs_exit;
+
+	/**
+	 * @hs_prepare:
+	 *
+	 * Time, in picoseconds, that the transmitter drives the Data
+	 * Lane LP-00 Line state immediately before the HS-0 Line
+	 * state starting the HS transmission.
+	 *
+	 * Minimum value: 40000 ps + 4 * @hs_clk_rate period in ps
+	 * Maximum value: 85000 ps + 6 * @hs_clk_rate period in ps
+	 */
+	unsigned int		hs_prepare;
+
+	/**
+	 * @hs_settle:
+	 *
+	 * Time interval, in picoseconds, during which the HS receiver
+	 * shall ignore any Data Lane HS transitions, starting from
+	 * the beginning of @hs_prepare.
+	 *
+	 * Minimum value: 85000 ps + 6 * @hs_clk_rate period in ps
+	 * Maximum value: 145000 ps + 10 * @hs_clk_rate period in ps
+	 */
+	unsigned int		hs_settle;
+
+	/**
+	 * @hs_skip:
+	 *
+	 * Time interval, in picoseconds, during which the HS-RX
+	 * should ignore any transitions on the Data Lane, following a
+	 * HS burst. The end point of the interval is defined as the
+	 * beginning of the LP-11 state following the HS burst.
+	 *
+	 * Minimum value: 40000 ps
+	 * Maximum value: 55000 ps + 4 * @hs_clk_rate period in ps
+	 */
+	unsigned int		hs_skip;
+
+	/**
+	 * @hs_trail:
+	 *
+	 * Time, in picoseconds, that the transmitter drives the
+	 * flipped differential state after last payload data bit of a
+	 * HS transmission burst
+	 *
+	 * Minimum value: max(8 * @hs_clk_rate period in ps,
+	 *		      60000 ps + 4 * @hs_clk_rate period in ps)
+	 */
+	unsigned int		hs_trail;
+
+	/**
+	 * @hs_zero:
+	 *
+	 * Time, in picoseconds, that the transmitter drives the HS-0
+	 * state prior to transmitting the Sync sequence.
+	 */
+	unsigned int		hs_zero;
+
+	/**
+	 * @init:
+	 *
+	 * Time, in picoseconds for the initialization period to
+	 * complete.
+	 *
+	 * Minimum value: 100000000 ps
+	 */
+	unsigned int		init;
+
+	/**
+	 * @lpx:
+	 *
+	 * Transmitted length, in picoseconds, of any Low-Power state
+	 * period.
+	 *
+	 * Minimum value: 50000 ps
+	 */
+	unsigned int		lpx;
+
+	/**
+	 * @ta_get:
+	 *
+	 * Time, in picoseconds, that the new transmitter drives the
+	 * Bridge state (LP-00) after accepting control during a Link
+	 * Turnaround.
+	 *
+	 * Value: 5 * @lpx
+	 */
+	unsigned int		ta_get;
+
+	/**
+	 * @ta_go:
+	 *
+	 * Time, in picoseconds, that the transmitter drives the
+	 * Bridge state (LP-00) before releasing control during a Link
+	 * Turnaround.
+	 *
+	 * Value: 4 * @lpx
+	 */
+	unsigned int		ta_go;
+
+	/**
+	 * @ta_sure:
+	 *
+	 * Time, in picoseconds, that the new transmitter waits after
+	 * the LP-10 state before transmitting the Bridge state
+	 * (LP-00) during a Link Turnaround.
+	 *
+	 * Minimum value: @lpx
+	 * Maximum value: 2 * @lpx
+	 */
+	unsigned int		ta_sure;
+
+	/**
+	 * @wakeup:
+	 *
+	 * Time, in picoseconds, that a transmitter drives a Mark-1
+	 * state prior to a Stop state in order to initiate an exit
+	 * from ULPS.
+	 *
+	 * Minimum value: 1000000000 ps
+	 */
+	unsigned int		wakeup;
+
+	/**
+	 * @hs_clk_rate:
+	 *
+	 * Clock rate, in Hertz, of the high-speed clock.
+	 */
+	unsigned long		hs_clk_rate;
+
+	/**
+	 * @lp_clk_rate:
+	 *
+	 * Clock rate, in Hertz, of the low-power clock.
+	 */
+	unsigned long		lp_clk_rate;
+
+	/**
+	 * @lanes:
+	 *
+	 * Number of active data lanes used for the transmissions.
+	 */
+	unsigned char		lanes;
+};
+
+#endif /* __PHY_MIPI_DPHY_H_ */
diff --git a/include/generic-phy.h b/include/generic-phy.h
index d77ab348ce..3334a29119 100644
--- a/include/generic-phy.h
+++ b/include/generic-phy.h
@@ -8,14 +8,20 @@
 #ifndef __GENERIC_PHY_H
 #define __GENERIC_PHY_H
 
+#include <generic-phy-mipi-dphy.h>
+
 enum phy_mode {
 	PHY_MODE_INVALID,
 };
 
 /**
  * union phy_configure_opts - Opaque generic phy configuration
+ *
+ * @mipi_dphy: Configuration set applicable for phys supporting
+ *	       the MIPI_DPHY phy mode.
  */
 union phy_configure_opts {
+	struct phy_configure_opts_mipi_dphy     mipi_dphy;
 };
 
 /**

commit 4ef09685defd72409b1e29ce4cb668644dd31bfe
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Thu Dec 10 02:12:15 2020 +0000

    phy: Add configuration interface
    
    The phy framework is only allowing to configure the power state of thePHY
    using the init and power_on hooks, and their power_off and exit
    counterparts.
    
    While it works for most, simple, PHYs supported so far, some more advanced
    PHYs need some configuration depending on runtime parameters. These PHYs
    have been supported by a number of means already, often by using ad-hoc
    drivers in their consumer drivers.
    
    That doesn't work too well however, when a consumer device needs to deal
    with multiple PHYs, or when multiple consumers need to deal with the same
    PHY (a DSI driver and a CSI driver for example).
    
    So we'll add a new interface, through two funtions, phy_validate and
    phy_configure. The first one will allow to check that a current
    configuration, for a given mode, is applicable. It will also allow the PHY
    driver to tune the settings given as parameters as it sees fit.
    
    phy_configure will actually apply that configuration in the phy itself.
    
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
    Change-Id: Icd170eaef9a1dbe21e0c7664b797a27877c703b5

diff --git a/drivers/phy/phy-uclass.c b/drivers/phy/phy-uclass.c
index a29298be5b..77a105cfe8 100644
--- a/drivers/phy/phy-uclass.c
+++ b/drivers/phy/phy-uclass.c
@@ -151,6 +151,29 @@ int generic_phy_power_off(struct phy *phy)
 	return ops->power_off ? ops->power_off(phy) : 0;
 }
 
+int generic_phy_configure(struct phy *phy, union phy_configure_opts *opts)
+{
+	struct phy_ops const *ops;
+
+	if (!generic_phy_valid(phy))
+		return 0;
+	ops = phy_dev_ops(phy->dev);
+
+	return ops->configure ? ops->configure(phy, opts) : 0;
+}
+
+int generic_phy_validate(struct phy *phy, enum phy_mode mode, int submode,
+			 union phy_configure_opts *opts)
+{
+	struct phy_ops const *ops;
+
+	if (!generic_phy_valid(phy))
+		return 0;
+	ops = phy_dev_ops(phy->dev);
+
+	return ops->validate ? ops->validate(phy, mode, submode, opts) : 0;
+}
+
 UCLASS_DRIVER(phy) = {
 	.id		= UCLASS_PHY,
 	.name		= "phy",
diff --git a/include/generic-phy.h b/include/generic-phy.h
index ce506d57e0..d77ab348ce 100644
--- a/include/generic-phy.h
+++ b/include/generic-phy.h
@@ -8,6 +8,15 @@
 #ifndef __GENERIC_PHY_H
 #define __GENERIC_PHY_H
 
+enum phy_mode {
+	PHY_MODE_INVALID,
+};
+
+/**
+ * union phy_configure_opts - Opaque generic phy configuration
+ */
+union phy_configure_opts {
+};
 
 /**
  * struct phy - A handle to (allowing control of) a single phy port.
@@ -93,6 +102,37 @@ struct phy_ops {
 	*/
 	int	(*reset)(struct phy *phy);
 
+	/**
+	 * @configure:
+	 *
+	 * Optional.
+	 *
+	 * Used to change the PHY parameters. phy_init() must have
+	 * been called on the phy.
+	 *
+	 * Returns: 0 if successful, an negative error code otherwise
+	 */
+	int	(*configure)(struct phy *phy, union phy_configure_opts *opts);
+
+	/**
+	 * @validate:
+	 *
+	 * Optional.
+	 *
+	 * Used to check that the current set of parameters can be
+	 * handled by the phy. Implementations are free to tune the
+	 * parameters passed as arguments if needed by some
+	 * implementation detail or constraints. It must not change
+	 * any actual configuration of the PHY, so calling it as many
+	 * times as deemed fit by the consumer must have no side
+	 * effect.
+	 *
+	 * Returns: 0 if the configuration can be applied, an negative
+	 * error code otherwise
+	 */
+	int	(*validate)(struct phy *phy, enum phy_mode mode, int submode,
+			    union phy_configure_opts *opts);
+
 	/**
 	* power_on - power on a PHY device
 	*
@@ -148,6 +188,23 @@ int generic_phy_exit(struct phy *phy);
  */
 int generic_phy_reset(struct phy *phy);
 
+/**
+ * generic_phy_configure() - change the PHY parameters
+ *
+ * @phy:        PHY port to be configure
+ * @return 0 if OK, or a negative error code
+ */
+int generic_phy_configure(struct phy *phy, union phy_configure_opts *opts);
+
+/**
+ * generic_phy_validate() - validate the PHY parameters
+ *
+ * @phy:        PHY port to be validate
+ * @return 0 if OK, or a negative error code
+ */
+int generic_phy_validate(struct phy *phy, enum phy_mode mode, int submode,
+			 union phy_configure_opts *opts);
+
 /**
  * generic_phy_power_on() - power on a PHY device
  *
@@ -238,6 +295,19 @@ static inline int generic_phy_reset(struct phy *phy)
 	return 0;
 }
 
+static inline int generic_phy_configure(struct phy *phy,
+					union phy_configure_opts *opts)
+{
+	return 0;
+}
+
+static inline int generic_phy_validate(struct phy *phy, enum phy_mode mode,
+				       int submode,
+				       union phy_configure_opts *opts)
+{
+	return 0;
+}
+
 static inline int generic_phy_power_on(struct phy *phy)
 {
 	return 0;

commit 37a5e4d859e8e69bace4eaddacad8d3cc30c8287
Author: Vignesh Raghavendra <vigneshr@ti.com>
Date:   Wed May 20 22:35:41 2020 +0530

    UPSTREAM: phy: Fix possible NULL pointer deference
    
    It is possible that users of generic_phy_*() APIs may pass a valid
    struct phy pointer but phy->dev can be NULL, leading to NULL pointer
    deference in phy_dev_ops().
    
    So call generic_phy_valid() to verify that phy and phy->dev are both
    valid.
    
    Change-Id: I0d19180ae8524eb240f4afd6ea55d5d0f2907798
    Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
    (cherry picked from commit 64b69f8c89352975c25730bcca4bf8af2296297f)

diff --git a/drivers/phy/phy-uclass.c b/drivers/phy/phy-uclass.c
index 671365389f..a29298be5b 100644
--- a/drivers/phy/phy-uclass.c
+++ b/drivers/phy/phy-uclass.c
@@ -100,7 +100,7 @@ int generic_phy_init(struct phy *phy)
 {
 	struct phy_ops const *ops;
 
-	if (!phy)
+	if (!generic_phy_valid(phy))
 		return 0;
 	ops = phy_dev_ops(phy->dev);
 
@@ -111,7 +111,7 @@ int generic_phy_reset(struct phy *phy)
 {
 	struct phy_ops const *ops;
 
-	if (!phy)
+	if (!generic_phy_valid(phy))
 		return 0;
 	ops = phy_dev_ops(phy->dev);
 
@@ -122,7 +122,7 @@ int generic_phy_exit(struct phy *phy)
 {
 	struct phy_ops const *ops;
 
-	if (!phy)
+	if (!generic_phy_valid(phy))
 		return 0;
 	ops = phy_dev_ops(phy->dev);
 
@@ -133,7 +133,7 @@ int generic_phy_power_on(struct phy *phy)
 {
 	struct phy_ops const *ops;
 
-	if (!phy)
+	if (!generic_phy_valid(phy))
 		return 0;
 	ops = phy_dev_ops(phy->dev);
 
@@ -144,7 +144,7 @@ int generic_phy_power_off(struct phy *phy)
 {
 	struct phy_ops const *ops;
 
-	if (!phy)
+	if (!generic_phy_valid(phy))
 		return 0;
 	ops = phy_dev_ops(phy->dev);
 

commit 1bac1f3947f2df4a43e6f8e7a4c7468e5010f2f7
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Tue Oct 1 14:03:26 2019 +0200

    UPSTREAM: drivers: phy: Handle gracefully NULL pointers
    
    For some controllers PHYs can be optional. Handling NULL pointers without
    crashing nor failing, makes it easy to handle optional PHYs.
    
    Change-Id: I11c95af8c1b54f2dad41891f6d0edb8d9fac6606
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
    (cherry picked from commit 4e1842988364446ba0cf2171d1eebb53c15bc44e)

diff --git a/drivers/phy/phy-uclass.c b/drivers/phy/phy-uclass.c
index 68e518fc79..671365389f 100644
--- a/drivers/phy/phy-uclass.c
+++ b/drivers/phy/phy-uclass.c
@@ -98,35 +98,55 @@ int generic_phy_get_by_name(struct udevice *dev, const char *phy_name,
 
 int generic_phy_init(struct phy *phy)
 {
-	struct phy_ops const *ops = phy_dev_ops(phy->dev);
+	struct phy_ops const *ops;
+
+	if (!phy)
+		return 0;
+	ops = phy_dev_ops(phy->dev);
 
 	return ops->init ? ops->init(phy) : 0;
 }
 
 int generic_phy_reset(struct phy *phy)
 {
-	struct phy_ops const *ops = phy_dev_ops(phy->dev);
+	struct phy_ops const *ops;
+
+	if (!phy)
+		return 0;
+	ops = phy_dev_ops(phy->dev);
 
 	return ops->reset ? ops->reset(phy) : 0;
 }
 
 int generic_phy_exit(struct phy *phy)
 {
-	struct phy_ops const *ops = phy_dev_ops(phy->dev);
+	struct phy_ops const *ops;
+
+	if (!phy)
+		return 0;
+	ops = phy_dev_ops(phy->dev);
 
 	return ops->exit ? ops->exit(phy) : 0;
 }
 
 int generic_phy_power_on(struct phy *phy)
 {
-	struct phy_ops const *ops = phy_dev_ops(phy->dev);
+	struct phy_ops const *ops;
+
+	if (!phy)
+		return 0;
+	ops = phy_dev_ops(phy->dev);
 
 	return ops->power_on ? ops->power_on(phy) : 0;
 }
 
 int generic_phy_power_off(struct phy *phy)
 {
-	struct phy_ops const *ops = phy_dev_ops(phy->dev);
+	struct phy_ops const *ops;
+
+	if (!phy)
+		return 0;
+	ops = phy_dev_ops(phy->dev);
 
 	return ops->power_off ? ops->power_off(phy) : 0;
 }
diff --git a/include/generic-phy.h b/include/generic-phy.h
index eac5adc893..ce506d57e0 100644
--- a/include/generic-phy.h
+++ b/include/generic-phy.h
@@ -270,7 +270,7 @@ static inline int generic_phy_get_by_name(struct udevice *user, const char *phy_
  */
 static inline bool generic_phy_valid(struct phy *phy)
 {
-	return phy->dev != NULL;
+	return phy && phy->dev;
 }
 
 #endif /*__GENERIC_PHY_H */

commit 0220733d757e754d2e837292d9da1eb0ff93783e
Author: Guochun Huang <hero.huang@rock-chips.com>
Date:   Thu Dec 24 17:06:51 2020 +0800

    drm/rockchip: remove initialization of conn_state->output_if
    
    Change-Id: I9f00db573fd411dc6ea977abfedb562d2e4116b6
    Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_vop2.c b/drivers/video/drm/rockchip_vop2.c
index 77ad107b7c..66cbaddb3a 100644
--- a/drivers/video/drm/rockchip_vop2.c
+++ b/drivers/video/drm/rockchip_vop2.c
@@ -872,7 +872,6 @@ static int rockchip_vop2_init(struct display_state *state)
 					LVDS_DUAL_SWAP_EN_SHIFT, 1, false);
 	}
 
-	conn_state->output_if = VOP_OUTPUT_IF_MIPI0;
 	if (conn_state->output_if & VOP_OUTPUT_IF_MIPI0) {
 		//cstate->crtc_id = 0;
 		vop2_mask_write(vop2, RK3568_DSP_IF_EN, EN_MASK, MIPI0_EN_SHIFT,

commit ee1765b515b73e7cc255454fcf7628b7e97db200
Author: Steven Liu <steven.liu@rock-chips.com>
Date:   Mon Dec 28 14:48:27 2020 +0800

    rockchip: rk3568: fix uart iomux error.
    
    Signed-off-by: Steven Liu <steven.liu@rock-chips.com>
    Change-Id: Ib1683c8ef40127b4fb5b0feb18778b85da47fe03

diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c
index e87278ec10..c69c79c130 100644
--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
@@ -467,7 +467,7 @@ struct mm_region *mem_map = rk3568_mem_map;
 
 void board_debug_uart_init(void)
 {
-#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xfdd5000)
+#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xfdd50000)
 	static struct rk3568_pmugrf * const pmugrf = (void *)PMUGRF_BASE;
 	/* UART0 M0 */
 	rk_clrsetreg(&pmugrf->pmu_soc_con0, UART0_IO_SEL_MASK,
@@ -540,7 +540,7 @@ void board_debug_uart_init(void)
 		     UART3_IO_SEL_M0 << UART3_IO_SEL_SHIFT);
 
 	/* Switch iomux */
-	rk_clrsetreg(&grf->pmu_gpio1a_iomux_l,
+	rk_clrsetreg(&grf->gpio1a_iomux_l,
 		     GPIO1A1_MASK | GPIO1A0_MASK,
 		     GPIO1A1_UART3_TXM0 << GPIO1A1_SHIFT |
 		     GPIO1A0_UART3_RXM0 << GPIO1A0_SHIFT);
@@ -565,7 +565,7 @@ void board_debug_uart_init(void)
 		     UART4_IO_SEL_M0 << UART4_IO_SEL_SHIFT);
 
 	/* Switch iomux */
-	rk_clrsetreg(&grf->pmu_gpio1a_iomux_h,
+	rk_clrsetreg(&grf->gpio1a_iomux_h,
 		     GPIO1A6_MASK | GPIO1A4_MASK,
 		     GPIO1A6_UART4_TXM0 << GPIO1A6_SHIFT |
 		     GPIO1A4_UART4_RXM0 << GPIO1A4_SHIFT);
@@ -590,7 +590,7 @@ void board_debug_uart_init(void)
 		     UART5_IO_SEL_M0 << UART5_IO_SEL_SHIFT);
 
 	/* Switch iomux */
-	rk_clrsetreg(&grf->pmu_gpio2a_iomux_l,
+	rk_clrsetreg(&grf->gpio2a_iomux_l,
 		     GPIO2A2_MASK | GPIO2A1_MASK,
 		     GPIO2A2_UART5_TXM0 << GPIO2A2_SHIFT |
 		     GPIO2A1_UART5_RXM0 << GPIO2A1_SHIFT);

commit cce5b40859e98c6427c150b33ac7609cc2ed9eca
Author: Simon Xue <xxm@rock-chips.com>
Date:   Mon Dec 28 15:26:24 2020 +0800

    rockchip: dts: rv1126: enable wdt
    
    Change-Id: I6d66dd8fca6beaf90557af048e4a50aaabe788d5
    Signed-off-by: Simon Xue <xxm@rock-chips.com>

diff --git a/arch/arm/dts/rv1126-u-boot.dtsi b/arch/arm/dts/rv1126-u-boot.dtsi
index fdc565964c..53df9e2ff3 100644
--- a/arch/arm/dts/rv1126-u-boot.dtsi
+++ b/arch/arm/dts/rv1126-u-boot.dtsi
@@ -290,3 +290,7 @@
 	status = "okay";
 };
 
+&wdt {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};

commit e197a0baf57ef6a914afc653573d320f7ec2d643
Author: Simon Xue <xxm@rock-chips.com>
Date:   Mon Dec 28 15:25:56 2020 +0800

    rockchip: dts: rk3568: enable wdt
    
    Change-Id: I73c34bcdd68cdd30dc07c688331ba9fa284159e7
    Signed-off-by: Simon Xue <xxm@rock-chips.com>

diff --git a/arch/arm/dts/rk3568-u-boot.dtsi b/arch/arm/dts/rk3568-u-boot.dtsi
index 7c68c30317..fdf7d3ab75 100644
--- a/arch/arm/dts/rk3568-u-boot.dtsi
+++ b/arch/arm/dts/rk3568-u-boot.dtsi
@@ -210,3 +210,8 @@
 &secure_otp {
 	u-boot,dm-spl;
 };
+
+&wdt {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};

commit 4d85f76c54070782d837f374480705053edf8f43
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Dec 25 15:58:17 2020 +0800

    rockchip: kernel dtb: fixup cru phandle of "resets" property
    
    Mainly for wdt in U-Boot.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I80946bf85015b84d8ea4db95fc00b314160505f8

diff --git a/arch/arm/mach-rockchip/kernel_dtb.c b/arch/arm/mach-rockchip/kernel_dtb.c
index 9293b1665c..1dbf65bcd4 100644
--- a/arch/arm/mach-rockchip/kernel_dtb.c
+++ b/arch/arm/mach-rockchip/kernel_dtb.c
@@ -16,7 +16,7 @@ DECLARE_GLOBAL_DATA_PTR;
 /* Here, only fixup cru phandle, pmucru is not included */
 static int phandles_fixup_cru(const void *fdt)
 {
-	const char *props[] = { "clocks", "assigned-clocks" };
+	const char *props[] = { "clocks", "assigned-clocks", "resets"};
 	struct udevice *dev;
 	struct uclass *uc;
 	const char *comp;

commit ef5a68b123c46c62dde9eda712b751f12a450d8d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Dec 25 15:57:52 2020 +0800

    core: device: always use wdt from U-Boot
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Icedfecb6de80cb9dc1a71118e7271e2b7b66e90c

diff --git a/drivers/core/device.c b/drivers/core/device.c
index 70ad9ffe1c..cb73aef757 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -79,8 +79,9 @@ static int device_bind_common(struct udevice *parent, const struct driver *drv,
 			    (dev_read_bool(dev, "u-boot,dm-pre-reloc") ||
 			     dev_read_bool(dev, "u-boot,dm-spl"))) {
 
-				/* Always use crypto node from U-Boot dtb */
-				if (drv->id == UCLASS_CRYPTO) {
+				/* Always use these node from U-Boot dtb */
+				if (drv->id == UCLASS_CRYPTO ||
+				    drv->id == UCLASS_WDT) {
 					debug("%s do not delete uboot dev: %s\n",
 					      __func__, dev->name);
 					return 0;

commit 6c0e8ad89679e8cf8a37bbd18024a00dd6069897
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Fri Dec 25 17:33:29 2020 +0800

    clk: rockchip: rk3568: support wdt clk set/get rate
    
    Change-Id: I04b868618f0590b44cea8c00041b9fb676e55919
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3568.c b/drivers/clk/rockchip/clk_rk3568.c
index 2cf7d01060..1085a9003d 100644
--- a/drivers/clk/rockchip/clk_rk3568.c
+++ b/drivers/clk/rockchip/clk_rk3568.c
@@ -742,6 +742,7 @@ static ulong rk3568_bus_get_clk(struct rk3568_clk_priv *priv, ulong clk_id)
 			rate = OSC_HZ;
 		break;
 	case PCLK_BUS:
+	case PCLK_WDT_NS:
 		con = readl(&cru->clksel_con[50]);
 		sel = (con & PCLK_BUS_SEL_MASK) >> PCLK_BUS_SEL_SHIFT;
 		if (sel == PCLK_BUS_SEL_100M)
@@ -781,6 +782,7 @@ static ulong rk3568_bus_set_clk(struct rk3568_clk_priv *priv,
 			     src_clk << ACLK_BUS_SEL_SHIFT);
 		break;
 	case PCLK_BUS:
+	case PCLK_WDT_NS:
 		if (rate == 100 * MHz)
 			src_clk = PCLK_BUS_SEL_100M;
 		else if (rate == 75 * MHz)
@@ -2184,6 +2186,7 @@ static ulong rk3568_clk_get_rate(struct clk *clk)
 		break;
 	case ACLK_BUS:
 	case PCLK_BUS:
+	case PCLK_WDT_NS:
 		rate = rk3568_bus_get_clk(priv, clk->id);
 		break;
 	case ACLK_PERIMID:
@@ -2273,6 +2276,9 @@ static ulong rk3568_clk_get_rate(struct clk *clk)
 	case CLK_RKVDEC_CORE:
 		rate = rk3568_rkvdec_get_clk(priv, clk->id);
 		break;
+	case TCLK_WDT_NS:
+		rate = OSC_HZ;
+		break;
 #endif
 	case ACLK_SECURE_FLASH:
 	case ACLK_CRYPTO_NS:
@@ -2342,6 +2348,7 @@ static ulong rk3568_clk_set_rate(struct clk *clk, ulong rate)
 		break;
 	case ACLK_BUS:
 	case PCLK_BUS:
+	case PCLK_WDT_NS:
 		ret = rk3568_bus_set_clk(priv, clk->id, rate);
 		break;
 	case ACLK_PERIMID:
@@ -2437,6 +2444,9 @@ static ulong rk3568_clk_set_rate(struct clk *clk, ulong rate)
 	case CLK_RKVDEC_CORE:
 		ret = rk3568_rkvdec_set_clk(priv, clk->id, rate);
 		break;
+	case TCLK_WDT_NS:
+		ret = OSC_HZ;
+		break;
 #endif
 	case ACLK_SECURE_FLASH:
 	case ACLK_CRYPTO_NS:

commit 1abad17a963f2c5c312b39cd200c77e3c3b0fc7a
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Mon Dec 28 09:33:54 2020 +0800

    clk: rockchip: rv1126: support wdt clk set/get rate
    
    Change-Id: If47a22130507cb3512a8f19b474ea1e01354b52b
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rv1126.c b/drivers/clk/rockchip/clk_rv1126.c
index f0d08023fc..fdbd645dd5 100644
--- a/drivers/clk/rockchip/clk_rv1126.c
+++ b/drivers/clk/rockchip/clk_rv1126.c
@@ -646,6 +646,7 @@ static ulong rv1126_pdbus_get_clk(struct rv1126_clk_priv *priv, ulong clk_id)
 			return -ENOENT;
 		break;
 	case PCLK_PDBUS:
+	case PCLK_WDT:
 		con = readl(&cru->clksel_con[3]);
 		div = (con & PCLK_PDBUS_DIV_MASK) >> PCLK_PDBUS_DIV_SHIFT;
 		sel = (con & PCLK_PDBUS_SEL_MASK) >> PCLK_PDBUS_SEL_SHIFT;
@@ -687,6 +688,7 @@ static ulong rv1126_pdbus_set_clk(struct rv1126_clk_priv *priv, ulong clk_id,
 			     (src_clk_div - 1) << HCLK_PDBUS_DIV_SHIFT);
 		break;
 	case PCLK_PDBUS:
+	case PCLK_WDT:
 		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);
 		assert(src_clk_div - 1 <= 31);
 		rk_clrsetreg(&cru->clksel_con[3],
@@ -1587,6 +1589,7 @@ static ulong rv1126_clk_get_rate(struct clk *clk)
 	case ACLK_PDBUS:
 	case HCLK_PDBUS:
 	case PCLK_PDBUS:
+	case PCLK_WDT:
 		rate = rv1126_pdbus_get_clk(priv, clk->id);
 		break;
 	case ACLK_PDPHP:
@@ -1698,6 +1701,7 @@ static ulong rv1126_clk_set_rate(struct clk *clk, ulong rate)
 	case ACLK_PDBUS:
 	case HCLK_PDBUS:
 	case PCLK_PDBUS:
+	case PCLK_WDT:
 		ret = rv1126_pdbus_set_clk(priv, clk->id, rate);
 		break;
 	case ACLK_PDPHP:

commit 8cd358cbe2f653281354e11b04d6ed7adf6a052b
Author: Simon Xue <xxm@rock-chips.com>
Date:   Fri Dec 25 14:39:17 2020 +0800

    test: rockchip: power: fix do_test_wdt
    
    Change-Id: I9c1add612aefdaadaa2c065b7b6ab4ce6fd1f4e3
    Signed-off-by: Simon Xue <xxm@rock-chips.com>

diff --git a/test/rockchip/test-power.c b/test/rockchip/test-power.c
index f4787c56d4..433239028e 100644
--- a/test/rockchip/test-power.c
+++ b/test/rockchip/test-power.c
@@ -110,6 +110,7 @@ static int do_test_wdt(cmd_tbl_t *cmdtp, int flag,
 {
 	struct udevice *dev;
 	int ret;
+	int i;
 
 	ret = uclass_get_device(UCLASS_WDT, 0, &dev);
 	if (ret) {
@@ -118,9 +119,20 @@ static int do_test_wdt(cmd_tbl_t *cmdtp, int flag,
 		return ret;
 	}
 
-	printf("Watchdog would reset system 10s later\n");
 	wdt_start(dev, 5000, 0);
-	wdt_stop(dev);
+
+	for (i = 0; i < 5; i++) {
+		printf("%s, Ping\n", dev->name);
+		wdt_reset(dev);
+		mdelay(1000);
+	}
+
+	printf("Watchdog would reset system 5s later\n");
+	printf("Wait reboot");
+	while(1){
+		printf(".");
+		mdelay(500);
+	}
 
 	return 0;
 }

commit 63ea025947efbc5e83531f35fad9b1c1a399109a
Author: Simon Xue <xxm@rock-chips.com>
Date:   Fri Dec 25 14:37:40 2020 +0800

    rockchip: dts: rk3568: wdt add reset
    
    Change-Id: Ib18ae7bc9c83cdd42e4e444b598072f81d2d48c0
    Signed-off-by: Simon Xue <xxm@rock-chips.com>

diff --git a/arch/arm/dts/rk3568.dtsi b/arch/arm/dts/rk3568.dtsi
index 6d7b7a15db..d2c81af6fc 100644
--- a/arch/arm/dts/rk3568.dtsi
+++ b/arch/arm/dts/rk3568.dtsi
@@ -2175,6 +2175,8 @@
 		clocks = <&cru TCLK_WDT_NS>, <&cru PCLK_WDT_NS>;
 		clock-names = "tclk", "pclk";
 		interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
+		resets = <&cru SRST_T_WDT_NS>;
+		reset-names = "reset";
 		status = "okay";
 	};
 

commit 6d2b3a9a8d72f3f5242a4b8ab135a778e7a74230
Author: Simon Xue <xxm@rock-chips.com>
Date:   Fri Dec 25 14:17:59 2020 +0800

    rockchip: dts: rv1126: wdt add reset
    
    Change-Id: I86d24ce0476dcc898dd5f12d6e5039a13358c76b
    Signed-off-by: Simon Xue <xxm@rock-chips.com>

diff --git a/arch/arm/dts/rv1126.dtsi b/arch/arm/dts/rv1126.dtsi
index abddf7165b..85cce78727 100644
--- a/arch/arm/dts/rv1126.dtsi
+++ b/arch/arm/dts/rv1126.dtsi
@@ -1297,6 +1297,8 @@
 		reg = <0xff680000 0x100>;
 		clocks = <&cru PCLK_WDT>;
 		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+		resets = <&cru SRST_WDT_P>;
+		reset-names = "reset";
 		status = "disabled";
 	};
 

commit bcec45798de05caa921e9bf00f13f567c39e1a91
Author: Zain Wang <wzz@rock-chips.com>
Date:   Mon Dec 28 15:10:23 2020 +0800

    rockchip: board: Do not set unvalid index to rollback-index
    
    Signed-off-by: Zain Wang <wzz@rock-chips.com>
    Change-Id: I2ba9c666c8375e02569518db9604d214c2a23b53

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index fc76d98b75..7cd020d9d7 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -882,9 +882,9 @@ int fit_read_otp_rollback_index(uint32_t fit_index, uint32_t *otp_index)
 
 		*otp_index = fit_index;
 		printf("Initial otp index as %d\n", fit_index);
+	} else {
+		*otp_index = index;
 	}
-
-	*otp_index = index;
 #else
 	*otp_index = 0;
 #endif

commit c571b46d59f0af1c5c859ed6c5e03b022447893f
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Mon Dec 28 10:55:35 2020 +0800

    ARM: rockchip: rk1808 set gpio0_C2 to pull down
    
    It's a long story to explain why to set gpio0_c2 to pull down, start
    from ...
    
    The rk1808 suspend supports to swith 32k clock source, BUT need the
    low level for each source clock.
    
    clk_32k  ---  ext_32k from pmic for example (pin on SoC is AWK13)
             |
             ---  int_32k divided from 24MHz
    
    The pin AWK13 default to be GPIO0_C2 which is normal state defaultly.
    
    When the software try to switch clk_32k from int_32k to ext_32k, but
    the pin is in normal state, unluckly for some board it's high level,
    the result is the switch never be done, till device try to do suspend
    and into a halt state.
    
    Make the gpio0_c2 to be pull down as default state for kernel.
    
    Change-Id: I6ae5859352d9a680166b4c711e25491a60442209
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk1808/rk1808.c b/arch/arm/mach-rockchip/rk1808/rk1808.c
index b7f01ac52f..0e9ada0f43 100644
--- a/arch/arm/mach-rockchip/rk1808/rk1808.c
+++ b/arch/arm/mach-rockchip/rk1808/rk1808.c
@@ -43,6 +43,7 @@ static struct mm_region rk1808_mem_map[] = {
 struct mm_region *mem_map = rk1808_mem_map;
 
 #define GRF_BASE	0xfe000000
+#define PMUGRF_BASE	0xfe020000
 
 enum {
 	GPIO4A3_SHIFT           = 12,
@@ -218,6 +219,11 @@ static int env_fixup_ramdisk_addr_r(void)
 
 int rk_board_init(void)
 {
+	struct rk1808_pmugrf * const pmugrf = (void *)PMUGRF_BASE;
+
+	/* Set GPIO0_C2 default to pull down from normal */
+	rk_clrsetreg(&pmugrf->gpio0c_p, 0x30, 0x20);
+
 #if defined(CONFIG_ROCKCHIP_SMCCC) && defined(CONFIG_ROCKCHIP_RK1806)
 	sip_smc_get_sip_version();
 #endif

commit a432abd525cbb40835c3caad21b422e99d723745
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Dec 28 11:16:31 2020 +0800

    rockchip: rk1808: fix typo
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I117c754994afc73a1c57274593ddc216273344d8

diff --git a/arch/arm/mach-rockchip/rk1808/rk1808.c b/arch/arm/mach-rockchip/rk1808/rk1808.c
index 2f314d1a61..b7f01ac52f 100644
--- a/arch/arm/mach-rockchip/rk1808/rk1808.c
+++ b/arch/arm/mach-rockchip/rk1808/rk1808.c
@@ -87,7 +87,7 @@ int arch_cpu_init(void)
 void board_debug_uart_init(void)
 {
 #ifdef CONFIG_TPL_BUILD
-	static struct rk1808_grf * const grf = (void *)GRF_BASE;
+	struct rk1808_grf * const grf = (void *)GRF_BASE;
 
 	/* Enable early UART2 channel m0 on the rk1808 */
 	rk_clrsetreg(&grf->iofunc_con0, UART2_IO_SEL_MASK,
@@ -235,7 +235,7 @@ int rk_board_late_init(void)
 
 void mmc_gpio_init_direct(void)
 {
-	static struct rk1808_grf * const grf = (void *)GRF_BASE;
+	struct rk1808_grf * const grf = (void *)GRF_BASE;
 
 	/*
 	 * The rk1808's pin drive strength control must set to 2ma.

commit 45f0941d2b561c1b4af6f961cca993db50855b57
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Thu Dec 17 09:50:37 2020 +0800

    mtd: spi-nor-ids: Add Gigadevice gd25q256 ID
    
    Change-Id: I70aca02c537b67cd0c92c3067d903763f528a1e8
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 27ef911f91..ec8840b69c 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -116,6 +116,11 @@ const struct flash_info spi_nor_ids[] = {
 			SECT_4K | SPI_NOR_DUAL_READ |
 			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
 	},
+	{	INFO("gd25q256", 0xc84019, 0, 64 * 1024, 512,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+			SPI_NOR_4B_OPCODES | SPI_NOR_HAS_LOCK |
+			SPI_NOR_HAS_TB)
+	},
 #endif
 #ifdef CONFIG_SPI_FLASH_ISSI		/* ISSI */
 	/* ISSI */

commit 3a94f0b1f8efc38fcf8971c78bdb2aad1ac99ca9
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Dec 24 17:55:58 2020 +0800

    rockchip: rv1126: redefine the OTP_UBOOT_ROLLBACK_OFFSET
    
    Redefine it as byte address.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I0c29170aee1331681ba591c9638c00793f5a969f

diff --git a/include/configs/rv1126_common.h b/include/configs/rv1126_common.h
index 187a0b3514..12fb3bb93a 100644
--- a/include/configs/rv1126_common.h
+++ b/include/configs/rv1126_common.h
@@ -37,7 +37,7 @@
 #define GICC_BASE			0xfeff2000
 
 /* secure boot otp rollback */
-#define OTP_UBOOT_ROLLBACK_OFFSET	0x1A	/* word address */
+#define OTP_UBOOT_ROLLBACK_OFFSET	0x68
 #define OTP_UBOOT_ROLLBACK_WORDS	2	/* 64 bits, 2 words */
 #define OTP_ALL_ONES_NUM_BITS		32
 #define OTP_SECURE_BOOT_ENABLE_ADDR	0x0

commit 5c9deb91df2165f530ddf4b38be35f35f09ae1cd
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Dec 23 22:30:48 2020 +0800

    configs: rk3568: add rsa key size
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I714c329f3def375ae4d25953bbe119071b7f16ba

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index 4e1255482c..168e3dab69 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -178,6 +178,9 @@ CONFIG_LIB_RAND=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_RSA=y
 CONFIG_SPL_RSA=y
+CONFIG_RSA_N_SIZE=0x200
+CONFIG_RSA_E_SIZE=0x10
+CONFIG_RSA_C_SIZE=0x20
 CONFIG_SHA512=y
 CONFIG_LZ4=y
 CONFIG_SPL_GZIP=y

commit bf39446f5d011766433ed606db987a01cf9635fb
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Dec 23 23:17:12 2020 +0800

    rockchip: spl: support rollback index
    
    Support rollback index when enable CONFIG_SPL_ROCKCHIP_SECURE_OTP.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Id865d9b13f92a322b576dd0168805e05acbdbcbf

diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index 41271a56cf..8c6cf5d752 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -392,7 +392,7 @@ int fit_read_otp_rollback_index(uint32_t fit_index, uint32_t *otp_index)
 	int ret = 0;
 
 	*otp_index = 0;
-#if defined(CONFIG_SPL_ROCKCHIP_SECURE_OTP_V2)
+#if defined(CONFIG_SPL_ROCKCHIP_SECURE_OTP_V2) || defined(CONFIG_SPL_ROCKCHIP_SECURE_OTP_V1)
 	struct udevice *dev;
 	u32 index, i, otp_version;
 	u32 bit_count;
@@ -403,13 +403,13 @@ int fit_read_otp_rollback_index(uint32_t fit_index, uint32_t *otp_index)
 
 	otp_version = 0;
 	for (i = 0; i < OTP_UBOOT_ROLLBACK_WORDS; i++) {
-		if (misc_otp_read(dev, 4 *
-		    (OTP_UBOOT_ROLLBACK_OFFSET + i),
+		if (misc_otp_read(dev, OTP_UBOOT_ROLLBACK_OFFSET + i * 4,
 		    &index,
 		    4)) {
 			printf("Can't read rollback index\n");
 			return -EIO;
 		}
+
 		bit_count = fls(index);
 		otp_version += bit_count;
 	}
@@ -421,7 +421,7 @@ int fit_read_otp_rollback_index(uint32_t fit_index, uint32_t *otp_index)
 
 static int fit_write_otp_rollback_index(u32 fit_index)
 {
-#if defined(CONFIG_SPL_ROCKCHIP_SECURE_OTP_V2)
+#if defined(CONFIG_SPL_ROCKCHIP_SECURE_OTP_V2) || defined(CONFIG_SPL_ROCKCHIP_SECURE_OTP_V1)
 	struct udevice *dev;
 	u32 index, i, otp_index;
 
@@ -441,14 +441,20 @@ static int fit_write_otp_rollback_index(u32 fit_index)
 	if (otp_index < fit_index) {
 		/* Write new SW version to otp */
 		for (i = 0; i < OTP_UBOOT_ROLLBACK_WORDS; i++) {
+			/*
+			 * If fit_index is equal to 0, then execute 0xffffffff >> 32.
+			 * But the operand can only be 0 - 31. The "0xffffffff >> 32" is
+			 * actually be "0xffffffff >> 0".
+			 */
+			if (!fit_index)
+				break;
 			/* convert to base-1 representation */
 			index = 0xffffffff >> (OTP_ALL_ONES_NUM_BITS -
 				min(fit_index, (u32)OTP_ALL_ONES_NUM_BITS));
 			fit_index -= min(fit_index,
 					  (u32)OTP_ALL_ONES_NUM_BITS);
 			if (index) {
-				if (misc_otp_write(dev, 4 *
-				    (OTP_UBOOT_ROLLBACK_OFFSET + i),
+				if (misc_otp_write(dev, OTP_UBOOT_ROLLBACK_OFFSET + i * 4,
 				    &index,
 				    4)) {
 					printf("Can't write rollback index\n");

commit 59f02c090058946ca8f96c0cfe398092ef669442
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Dec 23 23:16:24 2020 +0800

    misc: rename the ROCKCHIP_SECURE_OTP to ROCKCHIP_SECURE_OTP_V1
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Id0db096848d0ed1137c5153e80e66b37356e3273

diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 876defa8d3..efdce0220a 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -92,11 +92,12 @@ config SPL_ROCKCHIP_HW_DECOMPRESS
 	  This driver support Decompress IP built-in Rockchip SoC, support
 	  LZ4, GZIP, PNG, ZLIB.
 
-config SPL_ROCKCHIP_SECURE_OTP
-	bool "Rockchip Secure OTP Support in spl"
+config SPL_ROCKCHIP_SECURE_OTP_V1
+	bool "Rockchip Secure OTP Version 1 Support in spl"
 	depends on SPL_MISC
 	help
-	  Support read & write secure otp in spl.
+	  Support read & write secure otp in spl. Support platforms: rk3308,
+	  rk3326, px30, rk3568, rk3566.
 
 config SPL_ROCKCHIP_SECURE_OTP_V2
 	bool "Rockchip Secure OTP Version 2 Support in spl"
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 2ff2e137e8..4763a9e13b 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -54,6 +54,6 @@ obj-$(CONFIG_WINBOND_W83627) += winbond_w83627.o
 obj-$(CONFIG_QFW) += qfw.o
 obj-$(CONFIG_ROCKCHIP_EFUSE) += rockchip-efuse.o
 obj-$(CONFIG_ROCKCHIP_OTP) += rockchip-otp.o
-obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_SECURE_OTP) += rockchip-secure-otp.o
+obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_SECURE_OTP_V1) += rockchip-secure-otp.o
 obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_SECURE_OTP_V2) += rockchip-secure-otp-v2.o
 obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_HW_DECOMPRESS) += rockchip_decompress.o

commit 18481d05b70f5fbe5a6517daf5343aa5b990e51e
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Dec 23 22:26:02 2020 +0800

    misc: rockchip-otp: update the rk3568's secure area
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ia787f9c4e67e311fe4cc4e5b8f0c674221f36d8b

diff --git a/drivers/misc/rockchip-secure-otp.S b/drivers/misc/rockchip-secure-otp.S
index e45ce02ec2..7c73f38d08 100644
--- a/drivers/misc/rockchip-secure-otp.S
+++ b/drivers/misc/rockchip-secure-otp.S
@@ -12,7 +12,7 @@ px30_spl_rockchip_otp_start:
 	.loc 1 45 0
 	.cfi_startproc
 .LVL0:
-.LBB34:
+.LBB24:
 	.loc 1 46 0
 #APP
 // 46 "drivers/misc/rockchip-secure-otp.c" 1
@@ -28,8 +28,8 @@ px30_spl_rockchip_otp_start:
 	sxtw	x3, w3
 	str	w1, [x3, x2]
 .LVL3:
-.LBE34:
-.LBB35:
+.LBE24:
+.LBB25:
 	.loc 1 47 0
 #APP
 // 47 "drivers/misc/rockchip-secure-otp.c" 1
@@ -39,7 +39,7 @@ px30_spl_rockchip_otp_start:
 	mov	w1, 536879104
 	str	w1, [x0]
 	ret
-.LBE35:
+.LBE25:
 	.cfi_endproc
 .LFE264:
 	.size	px30_spl_rockchip_otp_start, .-px30_spl_rockchip_otp_start
@@ -51,7 +51,7 @@ px30_spl_rockchip_otp_stop:
 	.loc 1 53 0
 	.cfi_startproc
 .LVL4:
-.LBB36:
+.LBB26:
 	.loc 1 54 0
 #APP
 // 54 "drivers/misc/rockchip-secure-otp.c" 1
@@ -62,8 +62,8 @@ px30_spl_rockchip_otp_stop:
 .LVL5:
 	str	w1, [x0]
 .LVL6:
-.LBE36:
-.LBB37:
+.LBE26:
+.LBB27:
 	.loc 1 55 0
 #APP
 // 55 "drivers/misc/rockchip-secure-otp.c" 1
@@ -79,7 +79,7 @@ px30_spl_rockchip_otp_stop:
 	sxtw	x3, w3
 	str	w0, [x3, x2]
 	ret
-.LBE37:
+.LBE27:
 	.cfi_endproc
 .LFE265:
 	.size	px30_spl_rockchip_otp_stop, .-px30_spl_rockchip_otp_stop
@@ -91,7 +91,7 @@ rk3308_spl_rockchip_otp_start:
 	.loc 1 61 0
 	.cfi_startproc
 .LVL9:
-.LBB38:
+.LBB28:
 	.loc 1 62 0
 #APP
 // 62 "drivers/misc/rockchip-secure-otp.c" 1
@@ -107,8 +107,8 @@ rk3308_spl_rockchip_otp_start:
 	sxtw	x3, w3
 	str	w1, [x3, x2]
 .LVL12:
-.LBE38:
-.LBB39:
+.LBE28:
+.LBB29:
 	.loc 1 63 0
 #APP
 // 63 "drivers/misc/rockchip-secure-otp.c" 1
@@ -118,7 +118,7 @@ rk3308_spl_rockchip_otp_start:
 	mov	w1, 262148
 	str	w1, [x0]
 	ret
-.LBE39:
+.LBE29:
 	.cfi_endproc
 .LFE266:
 	.size	rk3308_spl_rockchip_otp_start, .-rk3308_spl_rockchip_otp_start
@@ -130,7 +130,7 @@ rk3308_spl_rockchip_otp_stop:
 	.loc 1 69 0
 	.cfi_startproc
 .LVL13:
-.LBB40:
+.LBB30:
 	.loc 1 70 0
 #APP
 // 70 "drivers/misc/rockchip-secure-otp.c" 1
@@ -141,8 +141,8 @@ rk3308_spl_rockchip_otp_stop:
 .LVL14:
 	str	w1, [x0]
 .LVL15:
-.LBE40:
-.LBB41:
+.LBE30:
+.LBB31:
 	.loc 1 71 0
 #APP
 // 71 "drivers/misc/rockchip-secure-otp.c" 1
@@ -158,7 +158,7 @@ rk3308_spl_rockchip_otp_stop:
 	sxtw	x3, w3
 	str	w0, [x3, x2]
 	ret
-.LBE41:
+.LBE31:
 	.cfi_endproc
 .LFE267:
 	.size	rk3308_spl_rockchip_otp_stop, .-rk3308_spl_rockchip_otp_stop
@@ -170,7 +170,7 @@ rk3328_spl_rockchip_otp_start:
 	.loc 1 77 0
 	.cfi_startproc
 .LVL18:
-.LBB42:
+.LBB32:
 	.loc 1 78 0
 #APP
 // 78 "drivers/misc/rockchip-secure-otp.c" 1
@@ -181,8 +181,8 @@ rk3328_spl_rockchip_otp_start:
 .LVL19:
 	str	w1, [x0]
 .LVL20:
-.LBE42:
-.LBB43:
+.LBE32:
+.LBB33:
 	.loc 1 79 0
 #APP
 // 79 "drivers/misc/rockchip-secure-otp.c" 1
@@ -194,7 +194,7 @@ rk3328_spl_rockchip_otp_start:
 	movk	w0, 0x600, lsl 16
 	str	w0, [x2]
 	ret
-.LBE43:
+.LBE33:
 	.cfi_endproc
 .LFE268:
 	.size	rk3328_spl_rockchip_otp_start, .-rk3328_spl_rockchip_otp_start
@@ -206,7 +206,7 @@ rk3328_spl_rockchip_otp_stop:
 	.loc 1 85 0
 	.cfi_startproc
 .LVL22:
-.LBB44:
+.LBB34:
 	.loc 1 86 0
 #APP
 // 86 "drivers/misc/rockchip-secure-otp.c" 1
@@ -217,8 +217,8 @@ rk3328_spl_rockchip_otp_stop:
 .LVL23:
 	str	w1, [x0]
 .LVL24:
-.LBE44:
-.LBB45:
+.LBE34:
+.LBB35:
 	.loc 1 87 0
 #APP
 // 87 "drivers/misc/rockchip-secure-otp.c" 1
@@ -229,7 +229,7 @@ rk3328_spl_rockchip_otp_stop:
 .LVL25:
 	str	w0, [x2]
 	ret
-.LBE45:
+.LBE35:
 	.cfi_endproc
 .LFE269:
 	.size	rk3328_spl_rockchip_otp_stop, .-rk3328_spl_rockchip_otp_stop
@@ -241,7 +241,7 @@ rk3568_spl_rockchip_otp_stop:
 	.loc 1 105 0
 	.cfi_startproc
 .LVL26:
-.LBB46:
+.LBB36:
 	.loc 1 106 0
 #APP
 // 106 "drivers/misc/rockchip-secure-otp.c" 1
@@ -251,25 +251,8 @@ rk3568_spl_rockchip_otp_stop:
 	mov	w1, 131072
 .LVL27:
 	str	w1, [x0]
-.LVL28:
-.LBE46:
-.LBB47:
-	.loc 1 107 0
-#APP
-// 107 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	mov	w0, 16
-.LVL29:
-	sdiv	w3, w3, w0
-.LVL30:
-	mov	w0, -1
-	lsl	w3, w3, 2
-	sxtw	x3, w3
-	str	w0, [x3, x2]
 	ret
-.LBE47:
+.LBE36:
 	.cfi_endproc
 .LFE271:
 	.size	rk3568_spl_rockchip_otp_stop, .-rk3568_spl_rockchip_otp_stop
@@ -277,45 +260,45 @@ rk3568_spl_rockchip_otp_stop:
 	.align	2
 	.type	secure_otp_ioctl, %function
 secure_otp_ioctl:
-.LFB285:
-	.loc 1 737 0
+.LFB287:
+	.loc 1 986 0
 	.cfi_startproc
-.LVL31:
-	.loc 1 740 0
+.LVL28:
+	.loc 1 989 0
 	mov	x0, 27908
-.LVL32:
+.LVL29:
 	cmp	x1, x0
 	bne	.L12
-.LVL33:
-.LBB48:
-.LBB49:
-	.loc 1 729 0
+.LVL30:
+.LBB37:
+.LBB38:
+	.loc 1 978 0
 	mov	w0, 8
 	str	w0, [x2]
-.LVL34:
-.LBE49:
-.LBE48:
-	.loc 1 742 0
+.LVL31:
+.LBE38:
+.LBE37:
+	.loc 1 991 0
 	mov	w0, 0
-	.loc 1 743 0
+	.loc 1 992 0
 	ret
-.LVL35:
+.LVL32:
 .L12:
-	.loc 1 738 0
+	.loc 1 987 0
 	mov	w0, -22
-	.loc 1 749 0
+	.loc 1 998 0
 	ret
 	.cfi_endproc
-.LFE285:
+.LFE287:
 	.size	secure_otp_ioctl, .-secure_otp_ioctl
 	.section	.text.secure_otp_write,"ax",@progbits
 	.align	2
 	.type	secure_otp_write, %function
 secure_otp_write:
-.LFB283:
-	.loc 1 721 0
+.LFB285:
+	.loc 1 970 0
 	.cfi_startproc
-.LVL36:
+.LVL33:
 	stp	x29, x30, [sp, -48]!
 	.cfi_def_cfa_offset 48
 	.cfi_offset 29, -48
@@ -329,25 +312,25 @@ secure_otp_write:
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -16
 	.cfi_offset 22, -8
-	.loc 1 721 0
+	.loc 1 970 0
 	mov	w20, w1
 	mov	x21, x2
 	mov	w22, w3
-	.loc 1 722 0
+	.loc 1 971 0
 	bl	dev_get_driver_data
-.LVL37:
-	.loc 1 724 0
+.LVL34:
+	.loc 1 973 0
 	ldr	x4, [x0, 8]
 	mov	w3, w22
 	mov	x2, x21
 	mov	w1, w20
 	mov	x0, x19
-.LVL38:
-	.loc 1 725 0
+.LVL35:
+	.loc 1 974 0
 	ldp	x21, x22, [sp, 32]
-.LVL39:
+.LVL36:
 	ldp	x19, x20, [sp, 16]
-.LVL40:
+.LVL37:
 	ldp	x29, x30, [sp], 48
 	.cfi_restore 30
 	.cfi_restore 29
@@ -356,20 +339,20 @@ secure_otp_write:
 	.cfi_restore 19
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
-	.loc 1 724 0
+	.loc 1 973 0
 	br	x4
-.LVL41:
+.LVL38:
 	.cfi_endproc
-.LFE283:
+.LFE285:
 	.size	secure_otp_write, .-secure_otp_write
 	.section	.text.secure_otp_read,"ax",@progbits
 	.align	2
 	.type	secure_otp_read, %function
 secure_otp_read:
-.LFB282:
-	.loc 1 713 0
+.LFB284:
+	.loc 1 962 0
 	.cfi_startproc
-.LVL42:
+.LVL39:
 	stp	x29, x30, [sp, -48]!
 	.cfi_def_cfa_offset 48
 	.cfi_offset 29, -48
@@ -383,25 +366,25 @@ secure_otp_read:
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -16
 	.cfi_offset 22, -8
-	.loc 1 713 0
+	.loc 1 962 0
 	mov	w20, w1
 	mov	x21, x2
 	mov	w22, w3
-	.loc 1 714 0
+	.loc 1 963 0
 	bl	dev_get_driver_data
-.LVL43:
-	.loc 1 716 0
+.LVL40:
+	.loc 1 965 0
 	ldr	x4, [x0]
 	mov	w3, w22
 	mov	x2, x21
 	mov	w1, w20
 	mov	x0, x19
-.LVL44:
-	.loc 1 717 0
+.LVL41:
+	.loc 1 966 0
 	ldp	x21, x22, [sp, 32]
-.LVL45:
+.LVL42:
 	ldp	x19, x20, [sp, 16]
-.LVL46:
+.LVL43:
 	ldp	x29, x30, [sp], 48
 	.cfi_restore 30
 	.cfi_restore 29
@@ -410,20 +393,20 @@ secure_otp_read:
 	.cfi_restore 19
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
-	.loc 1 716 0
+	.loc 1 965 0
 	br	x4
-.LVL47:
+.LVL44:
 	.cfi_endproc
-.LFE282:
+.LFE284:
 	.size	secure_otp_read, .-secure_otp_read
 	.section	.text.rockchip_secure_otp_ofdata_to_platdata,"ax",@progbits
 	.align	2
 	.type	rockchip_secure_otp_ofdata_to_platdata, %function
 rockchip_secure_otp_ofdata_to_platdata:
-.LFB286:
-	.loc 1 758 0
+.LFB288:
+	.loc 1 1007 0
 	.cfi_startproc
-.LVL48:
+.LVL45:
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
@@ -433,55 +416,55 @@ rockchip_secure_otp_ofdata_to_platdata:
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -16
 	.cfi_offset 20, -8
-	.loc 1 758 0
+	.loc 1 1007 0
 	mov	x20, x0
-	.loc 1 759 0
+	.loc 1 1008 0
 	bl	dev_get_platdata
-.LVL49:
+.LVL46:
 	mov	x19, x0
-.LVL50:
-	.loc 1 761 0
+.LVL47:
+	.loc 1 1010 0
 	mov	x0, x20
-.LVL51:
+.LVL48:
 	bl	dev_read_addr_ptr
-.LVL52:
-	.loc 1 762 0
+.LVL49:
+	.loc 1 1011 0
 	mov	w2, 0
 	adrp	x1, .LC0
-	.loc 1 761 0
+	.loc 1 1010 0
 	str	x0, [x19]
-	.loc 1 762 0
+	.loc 1 1011 0
 	add	x1, x1, :lo12:.LC0
 	mov	x0, x20
 	bl	dev_read_u32_default
-.LVL53:
-	.loc 1 763 0
+.LVL50:
+	.loc 1 1012 0
 	uxtw	x0, w0
 	str	x0, [x19, 8]
-	.loc 1 764 0
+	.loc 1 1013 0
 	mov	w2, 0
 	mov	x0, x20
 	adrp	x1, .LC1
 	add	x1, x1, :lo12:.LC1
 	bl	dev_read_u32_default
-.LVL54:
-	.loc 1 765 0
+.LVL51:
+	.loc 1 1014 0
 	uxtw	x0, w0
 	str	x0, [x19, 16]
-	.loc 1 766 0
+	.loc 1 1015 0
 	mov	w2, 0
 	mov	x0, x20
 	adrp	x1, .LC2
 	add	x1, x1, :lo12:.LC2
 	bl	dev_read_u32_default
-.LVL55:
-	.loc 1 767 0
+.LVL52:
+	.loc 1 1016 0
 	uxtw	x0, w0
 	str	x0, [x19, 24]
-	.loc 1 770 0
+	.loc 1 1019 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-.LVL56:
+.LVL53:
 	ldp	x29, x30, [sp], 32
 	.cfi_restore 30
 	.cfi_restore 29
@@ -490,7 +473,7 @@ rockchip_secure_otp_ofdata_to_platdata:
 	.cfi_def_cfa 31, 0
 	ret
 	.cfi_endproc
-.LFE286:
+.LFE288:
 	.size	rockchip_secure_otp_ofdata_to_platdata, .-rockchip_secure_otp_ofdata_to_platdata
 	.section	.text.rk3568_spl_rockchip_otp_start,"ax",@progbits
 	.align	2
@@ -499,7 +482,7 @@ rk3568_spl_rockchip_otp_start:
 .LFB270:
 	.loc 1 93 0
 	.cfi_startproc
-.LVL57:
+.LVL54:
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
@@ -510,24 +493,7 @@ rk3568_spl_rockchip_otp_start:
 	.cfi_offset 19, -16
 	.loc 1 93 0
 	mov	x19, x1
-.LBB50:
-	.loc 1 94 0
-#APP
-// 94 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	mov	w1, 16
-.LVL58:
-	sdiv	w3, w3, w1
-.LVL59:
-	mov	w1, -65536
-	lsl	w3, w3, 2
-	sxtw	x3, w3
-	str	w1, [x3, x2]
-.LVL60:
-.LBE50:
-.LBB51:
+.LBB39:
 	.loc 1 95 0
 #APP
 // 95 "drivers/misc/rockchip-secure-otp.c" 1
@@ -535,10 +501,11 @@ rk3568_spl_rockchip_otp_start:
 // 0 "" 2
 #NO_APP
 	mov	w1, 131074
+.LVL55:
 	str	w1, [x0]
-.LVL61:
-.LBE51:
-.LBB52:
+.LVL56:
+.LBE39:
+.LBB40:
 	.loc 1 96 0
 #APP
 // 96 "drivers/misc/rockchip-secure-otp.c" 1
@@ -546,14 +513,14 @@ rk3568_spl_rockchip_otp_start:
 // 0 "" 2
 #NO_APP
 	mov	w0, -2147450880
-.LVL62:
+.LVL57:
 	str	w0, [x19]
-.LBE52:
+.LBE40:
 	.loc 1 97 0
 	mov	x0, 2
 	bl	udelay
-.LVL63:
-.LBB53:
+.LVL58:
+.LBB41:
 	.loc 1 98 0
 #APP
 // 98 "drivers/misc/rockchip-secure-otp.c" 1
@@ -562,10 +529,10 @@ rk3568_spl_rockchip_otp_start:
 #NO_APP
 	mov	w0, -2147483648
 	str	w0, [x19]
-.LBE53:
+.LBE41:
 	.loc 1 100 0
 	ldr	x19, [sp, 16]
-.LVL64:
+.LVL59:
 	.loc 1 99 0
 	mov	x0, 1
 	.loc 1 100 0
@@ -576,7 +543,7 @@ rk3568_spl_rockchip_otp_start:
 	.cfi_def_cfa 31, 0
 	.loc 1 99 0
 	b	udelay
-.LVL65:
+.LVL60:
 	.cfi_endproc
 .LFE270:
 	.size	rk3568_spl_rockchip_otp_start, .-rk3568_spl_rockchip_otp_start
@@ -584,7 +551,7 @@ rk3568_spl_rockchip_otp_start:
 	.align	2
 	.type	rockchip_secure_otp_check_flag.isra.0, %function
 rockchip_secure_otp_check_flag.isra.0:
-.LFB287:
+.LFB289:
 	.loc 1 176 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -32]!
@@ -601,37 +568,37 @@ rockchip_secure_otp_check_flag.isra.0:
 	mov	x20, x0
 	movk	w19, 0x1, lsl 16
 .L23:
-.LVL66:
-.LBB54:
+.LVL61:
+.LBB42:
 	.loc 1 182 0
 	ldr	x0, [x20]
 	ldr	w1, [x0, 44]
-.LVL67:
+.LVL62:
 #APP
 // 182 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
-.LVL68:
+.LVL63:
 #NO_APP
-.LBE54:
+.LBE42:
 	.loc 1 183 0
 	and	w0, w1, 16
 	tbz	x1, 4, .L21
 	.loc 1 186 0
 	subs	w19, w19, #1
-.LVL69:
+.LVL64:
 	beq	.L24
-.LVL70:
+.LVL65:
 	.loc 1 192 0
 	mov	x0, 1
 	bl	udelay
-.LVL71:
+.LVL66:
 	b	.L23
-.LVL72:
+.LVL67:
 .L24:
 	.loc 1 187 0
 	mov	w0, -1
-.LVL73:
+.LVL68:
 .L21:
 	.loc 1 196 0
 	ldp	x19, x20, [sp, 16]
@@ -643,13 +610,13 @@ rockchip_secure_otp_check_flag.isra.0:
 	.cfi_def_cfa 31, 0
 	ret
 	.cfi_endproc
-.LFE287:
+.LFE289:
 	.size	rockchip_secure_otp_check_flag.isra.0, .-rockchip_secure_otp_check_flag.isra.0
 	.section	.text.rockchip_secure_otp_wait_flag.isra.1,"ax",@progbits
 	.align	2
 	.type	rockchip_secure_otp_wait_flag.isra.1, %function
 rockchip_secure_otp_wait_flag.isra.1:
-.LFB288:
+.LFB290:
 	.loc 1 154 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -32]!
@@ -665,36 +632,36 @@ rockchip_secure_otp_wait_flag.isra.1:
 	mov	x20, x0
 	mov	w19, 20001
 .L31:
-.LVL74:
-.LBB55:
+.LVL69:
+.LBB43:
 	.loc 1 160 0
 	ldr	x0, [x20]
 	ldr	w0, [x0, 44]
-.LVL75:
+.LVL70:
 #APP
 // 160 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
-.LVL76:
+.LVL71:
 #NO_APP
-.LBE55:
+.LBE43:
 	.loc 1 161 0
 	tbnz	x0, 4, .L32
 	.loc 1 164 0
 	subs	w19, w19, #1
-.LVL77:
+.LVL72:
 	beq	.L33
 	.loc 1 169 0
 	mov	x0, 1
-.LVL78:
+.LVL73:
 	bl	udelay
-.LVL79:
+.LVL74:
 	b	.L31
-.LVL80:
+.LVL75:
 .L32:
 	.loc 1 157 0
 	mov	w0, 0
-.LVL81:
+.LVL76:
 .L29:
 	.loc 1 174 0
 	ldp	x19, x20, [sp, 16]
@@ -706,24 +673,24 @@ rockchip_secure_otp_wait_flag.isra.1:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL82:
+.LVL77:
 .L33:
 	.cfi_restore_state
 	.loc 1 165 0
 	mov	w0, -1
-.LVL83:
+.LVL78:
 	b	.L29
 	.cfi_endproc
-.LFE288:
+.LFE290:
 	.size	rockchip_secure_otp_wait_flag.isra.1, .-rockchip_secure_otp_wait_flag.isra.1
 	.section	.text.rockchip_secure_otp_wait_status.isra.2,"ax",@progbits
 	.align	2
 	.type	rockchip_secure_otp_wait_status.isra.2, %function
 rockchip_secure_otp_wait_status.isra.2:
-.LFB289:
+.LFB291:
 	.loc 1 134 0
 	.cfi_startproc
-.LVL84:
+.LVL79:
 	stp	x29, x30, [sp, -48]!
 	.cfi_def_cfa_offset 48
 	.cfi_offset 29, -48
@@ -739,66 +706,66 @@ rockchip_secure_otp_wait_status.isra.2:
 	.loc 1 134 0
 	mov	x21, x0
 	mov	w20, 10000
-.LVL85:
+.LVL80:
 .L36:
-.LBB62:
+.LBB50:
 	.loc 1 139 0
 	ldr	x0, [x21]
 	ldr	w0, [x0, 772]
-.LVL86:
+.LVL81:
 #APP
 // 139 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-.LBE62:
+.LBE50:
 	tst	w0, w19
 	beq	.L38
-.LBB63:
+.LBB51:
 	.loc 1 149 0
 	orr	w19, w19, -65536
-.LVL87:
+.LVL82:
 #APP
 // 149 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x21]
-.LVL88:
+.LVL83:
 	str	w19, [x0, 772]
-.LBE63:
+.LBE51:
 	.loc 1 151 0
 	mov	w0, 0
 	b	.L35
-.LVL89:
+.LVL84:
 .L38:
 	.loc 1 140 0
 	mov	x0, 1
-.LVL90:
+.LVL85:
 	bl	udelay
-.LVL91:
+.LVL86:
 	.loc 1 142 0
 	subs	w20, w20, #1
-.LVL92:
+.LVL87:
 	bne	.L36
-.LVL93:
-.LBB64:
-.LBB65:
+.LVL88:
+.LBB52:
+.LBB53:
 	.loc 1 143 0
 	adrp	x1, .LANCHOR0
 	adrp	x0, .LC3
 	add	x1, x1, :lo12:.LANCHOR0
 	add	x0, x0, :lo12:.LC3
 	bl	printf
-.LVL94:
+.LVL89:
 	mov	w0, -110
-.LVL95:
+.LVL90:
 .L35:
-.LBE65:
-.LBE64:
+.LBE53:
+.LBE52:
 	.loc 1 152 0
 	ldp	x19, x20, [sp, 16]
-.LVL96:
+.LVL91:
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	.cfi_restore 30
@@ -809,2868 +776,4362 @@ rockchip_secure_otp_wait_status.isra.2:
 	.cfi_def_cfa 31, 0
 	ret
 	.cfi_endproc
-.LFE289:
+.LFE291:
 	.size	rockchip_secure_otp_wait_status.isra.2, .-rockchip_secure_otp_wait_status.isra.2
-	.section	.text.rockchip_secure_otp_ecc_enable.constprop.5,"ax",@progbits
+	.section	.text.rk3568_secure_otp_write_2_bytes_noecc,"ax",@progbits
 	.align	2
-	.type	rockchip_secure_otp_ecc_enable.constprop.5, %function
-rockchip_secure_otp_ecc_enable.constprop.5:
-.LFB292:
-	.loc 1 198 0
+	.type	rk3568_secure_otp_write_2_bytes_noecc, %function
+rk3568_secure_otp_write_2_bytes_noecc:
+.LFB280:
+	.loc 1 528 0
 	.cfi_startproc
-.LVL97:
-	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
+.LVL92:
+	stp	x29, x30, [sp, -96]!
+	.cfi_def_cfa_offset 96
+	.cfi_offset 29, -96
+	.cfi_offset 30, -88
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	str	x19, [sp, 16]
-	.cfi_offset 19, -16
-.LBB80:
-	.loc 1 203 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -64
+	.cfi_offset 22, -56
+	mov	w22, w2
+	stp	x19, x20, [sp, 16]
+	and	w21, w3, 65535
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 19, -80
+	.cfi_offset 20, -72
+	.cfi_offset 27, -16
+	.cfi_offset 28, -8
+	.loc 1 532 0
+	asr	w20, w22, 1
+	.loc 1 528 0
+	stp	x23, x24, [sp, 48]
+	mov	x28, x1
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 23, -48
+	.cfi_offset 24, -40
+	.cfi_offset 25, -32
+	.cfi_offset 26, -24
+	.loc 1 530 0
+	bl	dev_get_driver_data
+.LVL93:
+	.loc 1 533 0
+	cmp	w20, 448
+	bgt	.L50
+	.loc 1 537 0
+	sub	w1, w20, #64
+	mov	x25, x0
+	cmp	w1, 51
+	bhi	.L51
+	mov	x0, -255
+.LVL94:
+	movk	x0, 0x7f, lsl 32
+	movk	x0, 0xf, lsl 48
+	lsr	x0, x0, x1
+	mvn	x0, x0
+.L43:
+	tbz	x0, 0, .L44
+	.loc 1 537 0 is_stmt 0 discriminator 1
+	sub	w0, w20, #229
+	cmp	w0, 218
+	bls	.L44
+	.loc 1 540 0 is_stmt 1
+	adrp	x0, .LC4
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+.LVL95:
+.L50:
+	.loc 1 534 0
+	mov	w0, -1
+.LVL96:
+.L41:
+	.loc 1 734 0
+	ldp	x19, x20, [sp, 16]
+.LVL97:
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+.LVL98:
+	ldp	x29, x30, [sp], 96
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL99:
+.L51:
+	.cfi_restore_state
+	.loc 1 537 0
+	mov	x0, 1
+.LVL100:
+	b	.L43
+.L44:
+	.loc 1 544 0
+	cbz	w21, .L52
+	.loc 1 547 0
+	ldr	x5, [x25, 16]
+	mov	w3, w20
+	ldp	x0, x2, [x28, 8]
+	ldr	x1, [x28, 24]
+	blr	x5
+.LVL101:
+.LBB54:
+	.loc 1 550 0
 #APP
-// 203 "drivers/misc/rockchip-secure-otp.c" 1
+// 550 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x2, [x0]
-	mov	w3, 512
-	movk	w3, 0xff00, lsl 16
-	str	w3, [x2, 32]
-.LVL98:
-.LBE80:
-.LBB81:
-	.loc 1 204 0
+	ldr	x0, [x28]
+	mov	w1, 65536
+	str	w1, [x0, 256]
+.LVL102:
+.LBE54:
+.LBB55:
+	.loc 1 551 0
 #APP
-// 204 "drivers/misc/rockchip-secure-otp.c" 1
+// 551 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x2, [x0]
-	mov	w3, -65535
-	str	w3, [x2, 36]
-.LVL99:
-.LBE81:
-.LBB82:
-	.loc 1 205 0
+	ldr	x0, [x28]
+	mov	w1, 262148
+	str	w1, [x0, 32]
+.LVL103:
+.LBE55:
+.LBB56:
+	.loc 1 552 0
 #APP
-// 205 "drivers/misc/rockchip-secure-otp.c" 1
+// 552 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x2, [x0]
-	mov	w3, 250
-	str	w3, [x2, 4096]
-.LVL100:
-.LBE82:
-.LBB83:
-	.loc 1 207 0
+	ldr	x0, [x28]
+	mov	w1, -65536
+	str	w1, [x0, 40]
+.LVL104:
+.LBE56:
+.LBB57:
+	.loc 1 553 0
 #APP
-// 207 "drivers/misc/rockchip-secure-otp.c" 1
+// 553 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x2, [x0]
-	str	wzr, [x2, 4100]
-.LVL101:
-.LBE83:
-.LBB84:
-	.loc 1 211 0
+	ldr	x0, [x28]
+	mov	w1, 512
+	movk	w1, 0xff00, lsl 16
+	str	w1, [x0, 32]
+.LVL105:
+.LBE57:
+.LBB58:
+	.loc 1 554 0
 #APP
-// 211 "drivers/misc/rockchip-secure-otp.c" 1
+// 554 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x1, [x0]
-	mov	w2, 65537
-	str	w2, [x1, 32]
-.LBE84:
-	.loc 1 213 0
-	mov	w1, 2
-	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL102:
-	mov	w19, w0
-.LVL103:
-	.loc 1 214 0
-	tbz	w0, #31, .L41
-.LVL104:
-.LBB85:
-.LBB86:
-	.loc 1 215 0
-	adrp	x1, .LANCHOR1
-	adrp	x0, .LC4
-.LVL105:
-	add	x1, x1, :lo12:.LANCHOR1
-	add	x0, x0, :lo12:.LC4
-	bl	printf
+	ldr	x0, [x28]
+	mov	w24, -65534
+	str	w24, [x0, 36]
 .LVL106:
-.L41:
-.LBE86:
-.LBE85:
-	.loc 1 218 0
-	mov	w0, w19
-	ldr	x19, [sp, 16]
-.LVL107:
-	ldp	x29, x30, [sp], 32
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_def_cfa 31, 0
-	ret
-	.cfi_endproc
-.LFE292:
-	.size	rockchip_secure_otp_ecc_enable.constprop.5, .-rockchip_secure_otp_ecc_enable.constprop.5
-	.section	.text.rk3568_secure_otp_read,"ax",@progbits
-	.align	2
-	.type	rk3568_secure_otp_read, %function
-rk3568_secure_otp_read:
-.LFB279:
-	.loc 1 465 0
-	.cfi_startproc
-.LVL108:
-	stp	x29, x30, [sp, -80]!
-	.cfi_def_cfa_offset 80
-	.cfi_offset 29, -80
-	.cfi_offset 30, -72
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -64
-	.cfi_offset 20, -56
-	mov	w20, w1
-	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -48
-	.cfi_offset 22, -40
-	mov	x21, x2
-	stp	x23, x24, [sp, 48]
-	mov	x22, x0
-	.cfi_offset 23, -32
-	.cfi_offset 24, -24
-	mov	w23, w3
-	stp	x25, x26, [sp, 64]
-	.cfi_offset 25, -16
-	.cfi_offset 26, -8
-	.loc 1 466 0
-	bl	dev_get_platdata
-.LVL109:
-	mov	x19, x0
-.LVL110:
-	.loc 1 467 0
-	mov	x0, x22
-.LVL111:
-	bl	dev_get_driver_data
-.LVL112:
-	.loc 1 472 0
-	ldr	x4, [x0, 16]
-	.loc 1 467 0
-	mov	x24, x0
-.LVL113:
-	.loc 1 472 0
-	ldr	x1, [x19, 24]
-	mov	w3, w20
-	ldp	x0, x2, [x19, 8]
-.LVL114:
-	blr	x4
-.LVL115:
-	.loc 1 475 0
-	mov	x0, x19
-	bl	rockchip_secure_otp_ecc_enable.constprop.5
-.LVL116:
-.LBB87:
-	.loc 1 476 0
+.LBE58:
+.LBB59:
+	.loc 1 555 0
 #APP
-// 476 "drivers/misc/rockchip-secure-otp.c" 1
+// 555 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x19]
-	mov	w25, 65537
-.LBE87:
-	.loc 1 470 0
-	mov	w22, 0
-.LVL117:
-	.loc 1 483 0
-	mov	w26, 136
-.LBB88:
-	.loc 1 476 0
-	str	w25, [x0, 256]
-.LBE88:
-	.loc 1 477 0
-	mov	x0, 50
-	bl	udelay
-.LVL118:
-.L45:
-	.loc 1 478 0
-	cbz	w23, .L49
-	.loc 1 480 0
-	cmp	w20, 896
-	bgt	.L53
-	.loc 1 483 0
-	sub	w0, w20, #144
-	cmp	w0, 60
-	ccmp	w20, w26, 4, hi
-	beq	.L47
-	.loc 1 483 0 is_stmt 0 discriminator 1
-	sub	w0, w20, #457
-	cmp	w0, 438
-	bls	.L47
-	.loc 1 486 0 is_stmt 1
-	adrp	x0, .LC5
-	add	x0, x0, :lo12:.LC5
-	bl	printf
-.LVL119:
-.L53:
-	.loc 1 481 0
-	mov	w22, -1
-.LVL120:
-	b	.L44
-.LVL121:
-.L47:
-.LBB89:
-	.loc 1 490 0
-	orr	w1, w20, -65536
-.LVL122:
+	ldr	x0, [x28]
+	mov	w1, 252
+	str	w1, [x0, 4096]
+.LVL107:
+.LBE59:
+.LBB60:
+	.loc 1 556 0
 #APP
-// 490 "drivers/misc/rockchip-secure-otp.c" 1
+// 556 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x19]
-.LBE89:
-	.loc 1 492 0
-	add	w20, w20, 2
-.LVL123:
-.LBB90:
-	.loc 1 490 0
-	str	w1, [x0, 260]
-.LBE90:
-.LBB91:
-	.loc 1 493 0
+	ldr	x0, [x28]
+	str	wzr, [x0, 4100]
+.LVL108:
+.LBE60:
+.LBB61:
+	.loc 1 557 0
 #APP
-// 493 "drivers/misc/rockchip-secure-otp.c" 1
+// 557 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x19]
-.LBE91:
-	.loc 1 495 0
-	mov	w1, 4
-.LVL124:
-.LBB92:
-	.loc 1 493 0
-	str	w25, [x0, 264]
-.LVL125:
-.LBE92:
-	.loc 1 495 0
-	mov	x0, x19
+	ldr	x0, [x28]
+	str	wzr, [x0, 4104]
+.LVL109:
+.LBE61:
+.LBB62:
+	.loc 1 558 0
+#APP
+// 558 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w19, 65537
+.LBE62:
+	.loc 1 559 0
+	mov	w1, 2
+.LBB63:
+	.loc 1 558 0
+	str	w19, [x0, 32]
+.LBE63:
+	.loc 1 559 0
+	mov	x0, x28
 	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL126:
-	mov	w22, w0
-.LVL127:
-	.loc 1 496 0
-	tbz	w0, #31, .L48
-	.loc 1 497 0
-	adrp	x1, .LANCHOR2
-	adrp	x0, .LC6
-.LVL128:
-	add	x1, x1, :lo12:.LANCHOR2
-	add	x0, x0, :lo12:.LC6
+.LVL110:
+	.loc 1 560 0
+	tbz	w0, #31, .L45
+.L47:
+	.loc 1 561 0
+	adrp	x1, .LANCHOR1
+	adrp	x0, .LC5
+.LVL111:
+	add	x1, x1, :lo12:.LANCHOR1
+	add	x0, x0, :lo12:.LC5
+.L57:
+	.loc 1 694 0
 	bl	printf
-.LVL129:
-.L49:
-.LBB93:
-	.loc 1 511 0
+.LVL112:
+.L46:
+	.loc 1 730 0
+	ldr	x5, [x25, 24]
+	mov	w3, w20
+	ldp	x0, x2, [x28, 8]
+	ldr	x1, [x28, 24]
+	blr	x5
+.LVL113:
+.L52:
+	.loc 1 545 0
+	mov	w0, 0
+	b	.L41
+.LVL114:
+.L45:
+.LBB64:
+	.loc 1 565 0
 #APP
-// 511 "drivers/misc/rockchip-secure-otp.c" 1
+// 565 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x19]
-	mov	w1, 65536
-.LBE93:
-	.loc 1 513 0
-	ldr	x2, [x19, 16]
-	mov	w3, w20
-	ldr	x4, [x24, 24]
-.LBB94:
-	.loc 1 511 0
-	str	w1, [x0, 256]
-.LBE94:
-	.loc 1 513 0
-	ldr	x0, [x19, 8]
-	ldr	x1, [x19, 24]
-	blr	x4
-.LVL130:
-.L44:
-	.loc 1 518 0
-	mov	w0, w22
-	ldp	x19, x20, [sp, 16]
-.LVL131:
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-.LVL132:
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
-	ret
-.LVL133:
-.L48:
-	.cfi_restore_state
-.LBB95:
-	.loc 1 501 0
-	ldr	x0, [x19]
-.LVL134:
-	ldrh	w0, [x0, 292]
-	and	w0, w0, 65535
-.LVL135:
+	ldr	x0, [x28]
+.LVL115:
+	mov	w1, -65522
+	str	w1, [x0, 36]
+.LVL116:
+.LBE64:
+.LBB65:
+	.loc 1 566 0
 #APP
-// 501 "drivers/misc/rockchip-secure-otp.c" 1
+// 566 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
-.LVL136:
 #NO_APP
-.LBE95:
-	.loc 1 503 0
-	strb	w0, [x21]
-	.loc 1 504 0
-	cmp	w23, 1
-	beq	.L49
-.LVL137:
-	.loc 1 505 0
-	lsr	w0, w0, 8
-.LVL138:
-	.loc 1 506 0
-	sub	w23, w23, #2
-.LVL139:
-	.loc 1 505 0
-	strb	w0, [x21, 1]
-	add	x21, x21, 2
-.LVL140:
-	b	.L45
-	.cfi_endproc
-.LFE279:
-	.size	rk3568_secure_otp_read, .-rk3568_secure_otp_read
-	.section	.text.rockchip_secure_otp_read,"ax",@progbits
-	.align	2
-	.type	rockchip_secure_otp_read, %function
-rockchip_secure_otp_read:
-.LFB276:
-	.loc 1 222 0
-	.cfi_startproc
-.LVL141:
-	stp	x29, x30, [sp, -80]!
-	.cfi_def_cfa_offset 80
-	.cfi_offset 29, -80
-	.cfi_offset 30, -72
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -64
-	.cfi_offset 20, -56
-	mov	w20, w1
-	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -32
-	.cfi_offset 24, -24
-	mov	w24, w3
-	stp	x21, x22, [sp, 32]
-	mov	x23, x0
-	.cfi_offset 21, -48
-	.cfi_offset 22, -40
-	mov	x22, x2
-	str	x25, [sp, 64]
-	.cfi_offset 25, -16
-	.loc 1 223 0
-	bl	dev_get_platdata
-.LVL142:
-	mov	x19, x0
-.LVL143:
-	.loc 1 224 0
-	mov	x0, x23
-.LVL144:
-	bl	dev_get_driver_data
-.LVL145:
-	.loc 1 230 0
-	ldr	x4, [x0, 16]
-	.loc 1 224 0
-	mov	x25, x0
-.LVL146:
-	.loc 1 230 0
-	ldr	x1, [x19, 24]
-	mov	w3, w20
-	ldp	x0, x2, [x19, 8]
-.LVL147:
-	blr	x4
-.LVL148:
-	.loc 1 233 0
-	mov	x0, x19
-	bl	rockchip_secure_otp_ecc_enable.constprop.5
-.LVL149:
-.LBB96:
-	.loc 1 234 0
+	ldr	x0, [x28]
+	mov	w27, 240
+	str	w27, [x0, 4096]
+.LVL117:
+.LBE65:
+.LBB66:
+	.loc 1 567 0
 #APP
-// 234 "drivers/misc/rockchip-secure-otp.c" 1
+// 567 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x19]
-	mov	w23, 65537
-.LVL150:
-	add	w24, w24, w20
-.LVL151:
-.LBE96:
-	.loc 1 227 0
-	mov	w21, 0
-.LBB97:
-	.loc 1 234 0
-	str	w23, [x0, 256]
-.LBE97:
-	.loc 1 235 0
-	mov	x0, 50
-	bl	udelay
-.LVL152:
-.L56:
-	.loc 1 236 0
-	cmp	w20, w24
-	beq	.L60
-	.loc 1 238 0
-	cmp	w20, 448
-	bgt	.L62
-	.loc 1 241 0
-	sub	w1, w20, #16
-	cmp	w20, 0
-	mov	w0, w20
-	ccmp	w1, 31, 0, ne
-	bls	.L58
-	.loc 1 241 0 is_stmt 0 discriminator 1
-	sub	w1, w20, #128
-	cmp	w1, 263
-	bls	.L58
-	.loc 1 244 0 is_stmt 1
-	adrp	x0, .LC5
-	add	x0, x0, :lo12:.LC5
-	bl	printf
-.LVL153:
-.L62:
-	.loc 1 239 0
-	mov	w21, -1
-.LVL154:
-	b	.L55
-.LVL155:
-.L58:
-.LBB98:
-	.loc 1 248 0
-	add	w20, w20, 1
-.LVL156:
-	orr	w0, w0, -65536
-.LVL157:
+	ldr	x0, [x28]
+	mov	w23, 1
+	str	w23, [x0, 4100]
+.LVL118:
+.LBE66:
+.LBB67:
+	.loc 1 568 0
 #APP
-// 248 "drivers/misc/rockchip-secure-otp.c" 1
+// 568 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x1, [x19]
-	str	w0, [x1, 260]
-.LVL158:
-.LBE98:
-.LBB99:
-	.loc 1 250 0
+	ldr	x0, [x28]
+	mov	w26, 122
+	str	w26, [x0, 4104]
+.LVL119:
+.LBE67:
+.LBB68:
+	.loc 1 569 0
 #APP
-// 250 "drivers/misc/rockchip-secure-otp.c" 1
+// 569 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x19]
-.LVL159:
-.LBE99:
-	.loc 1 252 0
-	mov	w1, 4
-.LVL160:
-.LBB100:
-	.loc 1 250 0
-	str	w23, [x0, 264]
-.LVL161:
-.LBE100:
-	.loc 1 252 0
-	mov	x0, x19
-	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL162:
-	mov	w21, w0
-.LVL163:
-	.loc 1 253 0
-	tbz	w0, #31, .L59
-	.loc 1 254 0
-	adrp	x1, .LANCHOR3
-	adrp	x0, .LC6
-.LVL164:
-	add	x1, x1, :lo12:.LANCHOR3
-	add	x0, x0, :lo12:.LC6
-	bl	printf
-.LVL165:
-.L60:
-.LBB101:
-	.loc 1 271 0
+	ldr	x0, [x28]
+	mov	w1, 37
+	str	w1, [x0, 4108]
+.LVL120:
+.LBE68:
+.LBB69:
+	.loc 1 570 0
 #APP
-// 271 "drivers/misc/rockchip-secure-otp.c" 1
+// 570 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x19]
-	mov	w1, 65536
-.LBE101:
-	.loc 1 273 0
-	ldr	x2, [x19, 16]
-	mov	w3, w20
-	ldr	x4, [x25, 24]
-.LBB102:
-	.loc 1 271 0
-	str	w1, [x0, 256]
-.LBE102:
-	.loc 1 273 0
-	ldr	x0, [x19, 8]
-	ldr	x1, [x19, 24]
-	blr	x4
-.LVL166:
-.L55:
-	.loc 1 278 0
-	mov	w0, w21
-	ldr	x25, [sp, 64]
-.LVL167:
-	ldp	x19, x20, [sp, 16]
-.LVL168:
-	ldp	x21, x22, [sp, 32]
-.LVL169:
-	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 80
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 25
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
-	ret
-.LVL170:
-.L59:
-	.cfi_restore_state
-.LBB103:
-	.loc 1 258 0
-	ldr	x0, [x19]
-.LVL171:
-	ldrb	w0, [x0, 292]
-	and	w0, w0, 255
-.LVL172:
+	ldr	x0, [x28]
+	str	wzr, [x0, 4112]
+.LVL121:
+.LBE69:
+.LBB70:
+	.loc 1 571 0
 #APP
-// 258 "drivers/misc/rockchip-secure-otp.c" 1
+// 571 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
-.LVL173:
 #NO_APP
-.LBE103:
-	.loc 1 267 0
-	strb	w0, [x22], 1
-.LVL174:
-	b	.L56
-	.cfi_endproc
-.LFE276:
-	.size	rockchip_secure_otp_read, .-rockchip_secure_otp_read
-	.section	.text.rk3568_secure_otp_write,"ax",@progbits
-	.align	2
-	.type	rk3568_secure_otp_write, %function
-rk3568_secure_otp_write:
-.LFB281:
-	.loc 1 671 0
-	.cfi_startproc
-.LVL175:
-	stp	x29, x30, [sp, -128]!
-	.cfi_def_cfa_offset 128
-	.cfi_offset 29, -128
-	.cfi_offset 30, -120
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -112
-	.cfi_offset 20, -104
-	mov	w20, w3
-	stp	x25, x26, [sp, 64]
-	mov	w19, w1
-	stp	x21, x22, [sp, 32]
-	stp	x23, x24, [sp, 48]
-	stp	x27, x28, [sp, 80]
-	.cfi_offset 25, -64
-	.cfi_offset 26, -56
-	.cfi_offset 21, -96
-	.cfi_offset 22, -88
-	.cfi_offset 23, -80
-	.cfi_offset 24, -72
-	.cfi_offset 27, -48
-	.cfi_offset 28, -40
-	.loc 1 671 0
-	str	x2, [x29, 104]
-	str	x0, [x29, 120]
-	.loc 1 672 0
-	bl	dev_get_platdata
-.LVL176:
-	mov	x26, x0
-.LVL177:
-	.loc 1 674 0
-	sxtw	x0, w20
-.LVL178:
-	bl	malloc_simple
-.LVL179:
-	.loc 1 677 0
-	tbz	x20, 0, .L65
-	.loc 1 678 0
-	adrp	x0, .LC7
-.LVL180:
-	add	x0, x0, :lo12:.LC7
-.LVL181:
-.L90:
-.LBB169:
-.LBB170:
-	.loc 1 534 0
-	bl	printf
-.LVL182:
-	b	.L91
-.LVL183:
-.L65:
-	mov	x21, x0
-.LBE170:
-.LBE169:
-	.loc 1 682 0
-	cbnz	x0, .L67
-.LVL184:
-.L91:
-.LBB248:
-.LBB244:
-	.loc 1 534 0
-	mov	w28, -1
-.L64:
-.LBE244:
-.LBE248:
-	.loc 1 709 0
-	mov	w0, w28
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-.LVL185:
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 128
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
-.LVL186:
-	ret
-.LVL187:
-.L67:
-	.cfi_restore_state
-	.loc 1 685 0
-	mov	x2, x0
-	ldr	x0, [x29, 120]
-.LVL188:
-	mov	w3, w20
-	mov	w1, w19
-	bl	rockchip_secure_otp_read
-.LVL189:
-	.loc 1 686 0
-	cbnz	w0, .L91
-	mov	x0, 0
-.LVL190:
-.L70:
-	.loc 1 691 0 discriminator 1
-	cmp	w20, w0
-	bgt	.L71
-	.loc 1 701 0
-	mov	w0, 2
-.LVL191:
-	mov	x24, 0
-	sdiv	w0, w20, w0
-.LBB249:
-.LBB245:
-	.loc 1 656 0
-	adrp	x20, .LANCHOR4
-.LVL192:
-	add	x20, x20, :lo12:.LANCHOR4
-.LBE245:
-.LBE249:
-	.loc 1 701 0
-	str	w0, [x29, 116]
-.LVL193:
-.L72:
-	.loc 1 701 0 is_stmt 0 discriminator 1
-	ldr	w0, [x29, 116]
-	cmp	w0, w24
-	bgt	.L85
-	mov	w28, 0
-	b	.L64
-.LVL194:
-.L71:
-	add	x0, x0, 1
-.LVL195:
-	.loc 1 692 0 is_stmt 1
-	add	x1, x21, x0
-	ldrb	w1, [x1, -1]
-	cbz	w1, .L70
-	.loc 1 693 0
-	adrp	x0, .LC8
-	add	x0, x0, :lo12:.LC8
-	b	.L90
-.LVL196:
-.L85:
-	.loc 1 702 0
-	ldr	x0, [x29, 104]
-	ldrh	w23, [x0, x24, lsl 1]
-.LVL197:
-.LBB250:
-.LBB246:
-	.loc 1 525 0
-	ldr	x0, [x29, 120]
-	bl	dev_get_driver_data
-.LVL198:
-	mov	x27, x0
-.LVL199:
-	.loc 1 527 0
-	cmp	w19, 896
-	bgt	.L91
-	.loc 1 531 0
-	sub	w0, w19, #144
-.LVL200:
-	cmp	w0, 60
-	mov	w0, 136
-	ccmp	w19, w0, 4, hi
-	beq	.L73
-	sub	w0, w19, #457
-	cmp	w0, 438
-	bls	.L73
-	.loc 1 534 0
-	adrp	x0, .LC5
-	add	x0, x0, :lo12:.LC5
-	b	.L90
-.L73:
-	.loc 1 538 0
-	cbnz	w23, .L74
-.LVL201:
-.L84:
-	add	x24, x24, 1
-.LVL202:
-	add	w19, w19, 2
-	b	.L72
-.LVL203:
-.L74:
-	.loc 1 541 0
-	ldp	x0, x2, [x26, 8]
-	mov	w3, w19
-	ldr	x1, [x26, 24]
-	ldr	x5, [x27, 16]
-	blr	x5
-.LVL204:
-.LBB171:
-	.loc 1 544 0
+	ldr	x0, [x28]
+	str	wzr, [x0, 4116]
+.LVL122:
+.LBE70:
+.LBB71:
+	.loc 1 572 0
 #APP
-// 544 "drivers/misc/rockchip-secure-otp.c" 1
+// 572 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	mov	w1, 65536
-	str	w1, [x0, 256]
-.LVL205:
-.LBE171:
-.LBB172:
-	.loc 1 545 0
+	ldr	x0, [x28]
+	str	wzr, [x0, 4120]
+.LVL123:
+.LBE71:
+.LBB72:
+	.loc 1 573 0
 #APP
-// 545 "drivers/misc/rockchip-secure-otp.c" 1
+// 573 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	mov	w1, 262148
-	str	w1, [x0, 32]
-.LVL206:
-.LBE172:
-.LBB173:
-	.loc 1 546 0
+	ldr	x0, [x28]
+	mov	w1, 31
+	str	w1, [x0, 4124]
+.LVL124:
+.LBE72:
+.LBB73:
+	.loc 1 574 0
 #APP
-// 546 "drivers/misc/rockchip-secure-otp.c" 1
+// 574 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	mov	w1, -65536
-	str	w1, [x0, 40]
-.LVL207:
-.LBE173:
-.LBB174:
-	.loc 1 547 0
+	ldr	x0, [x28]
+	mov	w1, 11
+	str	w1, [x0, 4128]
+.LVL125:
+.LBE73:
+.LBB74:
+	.loc 1 575 0
 #APP
-// 547 "drivers/misc/rockchip-secure-otp.c" 1
+// 575 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	mov	w1, 512
-	movk	w1, 0xff00, lsl 16
-	str	w1, [x0, 32]
-.LVL208:
-.LBE174:
-.LBB175:
-	.loc 1 548 0
+	ldr	x0, [x28]
+	mov	w1, 8
+	str	w1, [x0, 4132]
+.LVL126:
+.LBE74:
+.LBB75:
+	.loc 1 576 0
 #APP
-// 548 "drivers/misc/rockchip-secure-otp.c" 1
+// 576 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	mov	w1, -65522
-	str	w1, [x0, 36]
-.LVL209:
-.LBE175:
-.LBB176:
-	.loc 1 549 0
+	ldr	x0, [x28]
+	str	wzr, [x0, 4136]
+.LVL127:
+.LBE75:
+.LBB76:
+	.loc 1 577 0
 #APP
-// 549 "drivers/misc/rockchip-secure-otp.c" 1
+// 577 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	mov	w25, 240
-	str	w25, [x0, 4096]
-.LVL210:
-.LBE176:
-.LBB177:
-	.loc 1 550 0
+	ldr	x0, [x28]
+	str	wzr, [x0, 4140]
+.LVL128:
+.LBE76:
+.LBB77:
+	.loc 1 578 0
 #APP
-// 550 "drivers/misc/rockchip-secure-otp.c" 1
+// 578 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	mov	w1, 1
-	str	w1, [x0, 4100]
-.LVL211:
-.LBE177:
-.LBB178:
-	.loc 1 551 0
+	ldr	x0, [x28]
+	str	wzr, [x0, 4144]
+.LBE77:
+.LBB78:
+	.loc 1 579 0
+	and	w0, w20, 255
 #APP
-// 551 "drivers/misc/rockchip-secure-otp.c" 1
+// 579 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	mov	w21, 122
-	str	w21, [x0, 4104]
-.LVL212:
-.LBE178:
-.LBB179:
-	.loc 1 552 0
+	ldr	x1, [x28]
+.LBE78:
+.LBB79:
+	.loc 1 580 0
+	ubfx	x22, x22, 9, 8
+.LVL129:
+.LBE79:
+.LBB80:
+	.loc 1 579 0
+	str	w0, [x1, 4148]
+.LBE80:
+.LBB81:
+	.loc 1 580 0
 #APP
-// 552 "drivers/misc/rockchip-secure-otp.c" 1
+// 580 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	mov	w1, 37
-	str	w1, [x0, 4108]
-.LVL213:
-.LBE179:
-.LBB180:
-	.loc 1 553 0
+	ldr	x0, [x28]
+	str	w22, [x0, 4152]
+.LVL130:
+.LBE81:
+.LBB82:
+	.loc 1 581 0
 #APP
-// 553 "drivers/misc/rockchip-secure-otp.c" 1
+// 581 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	str	wzr, [x0, 4112]
-.LVL214:
-.LBE180:
-.LBB181:
-	.loc 1 554 0
+	ldr	x0, [x28]
+.LBE82:
+	.loc 1 582 0
+	mov	w1, 2
+.LBB83:
+	.loc 1 581 0
+	str	w19, [x0, 32]
+.LBE83:
+	.loc 1 582 0
+	mov	x0, x28
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL131:
+	.loc 1 583 0
+	tbnz	w0, #31, .L47
+.LVL132:
+.LBB84:
+	.loc 1 588 0
 #APP
-// 554 "drivers/misc/rockchip-secure-otp.c" 1
+// 588 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	str	wzr, [x0, 4116]
-.LVL215:
-.LBE181:
-.LBB182:
-	.loc 1 555 0
+	ldr	x0, [x28]
+.LVL133:
+	mov	w22, -65535
+.LVL134:
+	str	w22, [x0, 36]
+.LVL135:
+.LBE84:
+.LBB85:
+	.loc 1 589 0
 #APP
-// 555 "drivers/misc/rockchip-secure-otp.c" 1
+// 589 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	str	wzr, [x0, 4120]
-.LVL216:
-.LBE182:
-.LBB183:
-	.loc 1 556 0
+	ldr	x0, [x28]
+	mov	w1, 250
+	str	w1, [x0, 4096]
+.LVL136:
+.LBE85:
+.LBB86:
+	.loc 1 590 0
 #APP
-// 556 "drivers/misc/rockchip-secure-otp.c" 1
+// 590 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	mov	w1, 31
-	str	w1, [x0, 4124]
-.LVL217:
-.LBE183:
-.LBB184:
-	.loc 1 557 0
+	ldr	x0, [x28]
+	mov	w1, 9
+	str	w1, [x0, 4100]
+.LVL137:
+.LBE86:
+.LBB87:
+	.loc 1 591 0
 #APP
-// 557 "drivers/misc/rockchip-secure-otp.c" 1
+// 591 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	mov	w1, 11
-	str	w1, [x0, 4128]
-.LVL218:
-.LBE184:
-.LBB185:
-	.loc 1 558 0
+	ldr	x0, [x28]
+.LBE87:
+	.loc 1 592 0
+	mov	w1, 2
+.LBB88:
+	.loc 1 591 0
+	str	w19, [x0, 32]
+.LBE88:
+	.loc 1 592 0
+	mov	x0, x28
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL138:
+	.loc 1 593 0
+	tbnz	w0, #31, .L47
+.LVL139:
+.LBB89:
+	.loc 1 598 0
 #APP
-// 558 "drivers/misc/rockchip-secure-otp.c" 1
+// 598 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	mov	w1, 8
-	str	w1, [x0, 4132]
-.LVL219:
-.LBE185:
-.LBB186:
-	.loc 1 559 0
+	ldr	x0, [x28]
+.LVL140:
+	mov	w1, 14848
+	movk	w1, 0xff00, lsl 16
+	str	w1, [x0, 32]
+.LVL141:
+.LBE89:
+.LBB90:
+	.loc 1 599 0
 #APP
-// 559 "drivers/misc/rockchip-secure-otp.c" 1
+// 599 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	str	wzr, [x0, 4136]
-.LVL220:
-.LBE186:
-.LBB187:
-	.loc 1 560 0
+	ldr	x0, [x28]
+	mov	w1, -65522
+	str	w1, [x0, 36]
+.LVL142:
+.LBE90:
+.LBB91:
+	.loc 1 600 0
 #APP
-// 560 "drivers/misc/rockchip-secure-otp.c" 1
+// 600 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	str	wzr, [x0, 4140]
-.LVL221:
-.LBE187:
-.LBB188:
-	.loc 1 561 0
+	ldr	x0, [x28]
+	str	w27, [x0, 4096]
+.LVL143:
+.LBE91:
+.LBB92:
+	.loc 1 601 0
 #APP
-// 561 "drivers/misc/rockchip-secure-otp.c" 1
+// 601 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	str	wzr, [x0, 4144]
-.LBE188:
-.LBB189:
-	.loc 1 562 0
-	and	w0, w19, 255
+	ldr	x0, [x28]
+	str	w23, [x0, 4100]
+.LVL144:
+.LBE92:
+.LBB93:
+	.loc 1 602 0
 #APP
-// 562 "drivers/misc/rockchip-secure-otp.c" 1
+// 602 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x1, [x26]
-	str	w0, [x1, 4148]
-.LBE189:
-.LBB190:
-	.loc 1 563 0
-	ubfx	x1, x19, 8, 8
-.LVL222:
+	ldr	x0, [x28]
+	str	w26, [x0, 4104]
+.LVL145:
+.LBE93:
+.LBB94:
+	.loc 1 603 0
 #APP
-// 563 "drivers/misc/rockchip-secure-otp.c" 1
+// 603 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	str	w1, [x0, 4152]
-.LVL223:
-.LBE190:
-.LBB191:
-	.loc 1 564 0
+	ldr	x0, [x28]
+	mov	w1, 21
+	str	w1, [x0, 4108]
+.LVL146:
+.LBE94:
+.LBB95:
+	.loc 1 604 0
 #APP
-// 564 "drivers/misc/rockchip-secure-otp.c" 1
+// 604 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	mov	w22, 65537
-.LBE191:
-	.loc 1 565 0
-	mov	w1, 2
-.LVL224:
-.LBB192:
-	.loc 1 564 0
-	str	w22, [x0, 32]
-.LVL225:
-.LBE192:
-	.loc 1 565 0
-	mov	x0, x26
-	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL226:
-	mov	w28, w0
-.LVL227:
-	.loc 1 566 0
-	tbz	w0, #31, .L75
-	.loc 1 567 0
-	adrp	x0, .LC9
-.LVL228:
-	mov	x1, x20
-	add	x0, x0, :lo12:.LC9
-.LVL229:
-.L89:
-	.loc 1 656 0
-	bl	printf
-.LVL230:
-.L76:
-.LBB193:
-	.loc 1 661 0
+	ldr	x0, [x28]
+	mov	w1, 220
+	str	w1, [x0, 4112]
+.LVL147:
+.LBE95:
+.LBB96:
+	.loc 1 605 0
 #APP
-// 661 "drivers/misc/rockchip-secure-otp.c" 1
+// 605 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	mov	w1, -65533
-.LBE193:
-	.loc 1 662 0
-	ldr	x2, [x26, 16]
-	mov	w3, w19
-	ldr	x6, [x27, 24]
-.LBB194:
-	.loc 1 661 0
-	str	w1, [x0, 772]
-.LBE194:
-	.loc 1 662 0
-	ldr	x0, [x26, 8]
-	ldr	x1, [x26, 24]
-	blr	x6
-.LVL231:
-.LBE246:
-.LBE250:
-	.loc 1 703 0
-	cbz	w28, .L84
-	b	.L64
-.LVL232:
-.L75:
-.LBB251:
-.LBB247:
-.LBB195:
-	.loc 1 571 0
+	ldr	x0, [x28]
+	mov	w1, 146
+	str	w1, [x0, 4116]
+.LVL148:
+.LBE96:
+.LBB97:
+	.loc 1 606 0
 #APP
-// 571 "drivers/misc/rockchip-secure-otp.c" 1
+// 606 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-.LVL233:
-	mov	w1, 14848
-	movk	w1, 0xff00, lsl 16
-	str	w1, [x0, 32]
-.LVL234:
-.LBE195:
-.LBB196:
-	.loc 1 572 0
+	ldr	x0, [x28]
+	mov	w1, 121
+	str	w1, [x0, 4120]
+.LVL149:
+.LBE97:
+.LBB98:
+	.loc 1 607 0
 #APP
-// 572 "drivers/misc/rockchip-secure-otp.c" 1
+// 607 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	str	w25, [x0, 4096]
-.LVL235:
-.LBE196:
-.LBB197:
-	.loc 1 573 0
+	ldr	x0, [x28]
+	mov	w1, 129
+	str	w1, [x0, 4124]
+.LVL150:
+.LBE98:
+.LBB99:
+	.loc 1 608 0
 #APP
-// 573 "drivers/misc/rockchip-secure-otp.c" 1
+// 608 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	mov	w1, 1
-	str	w1, [x0, 4100]
-.LVL236:
-.LBE197:
-.LBB198:
-	.loc 1 574 0
-#APP
-// 574 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x26]
-	str	w21, [x0, 4104]
-.LVL237:
-.LBE198:
-.LBB199:
-	.loc 1 575 0
-#APP
-// 575 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x26]
-	mov	w1, 21
-	str	w1, [x0, 4108]
-.LVL238:
-.LBE199:
-.LBB200:
-	.loc 1 576 0
+	ldr	x0, [x28]
+	mov	w1, 126
+	str	w1, [x0, 4128]
+.LVL151:
+.LBE99:
+.LBB100:
+	.loc 1 609 0
 #APP
-// 576 "drivers/misc/rockchip-secure-otp.c" 1
+// 609 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	mov	w1, 220
-	str	w1, [x0, 4112]
-.LVL239:
-.LBE200:
-.LBB201:
-	.loc 1 577 0
+	ldr	x0, [x28]
+	mov	w1, 33
+	str	w1, [x0, 4132]
+.LVL152:
+.LBE100:
+.LBB101:
+	.loc 1 610 0
 #APP
-// 577 "drivers/misc/rockchip-secure-otp.c" 1
+// 610 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	mov	w1, 146
-	str	w1, [x0, 4116]
-.LVL240:
-.LBE201:
-.LBB202:
-	.loc 1 578 0
+	ldr	x0, [x28]
+	mov	w1, 17
+	str	w1, [x0, 4136]
+.LVL153:
+.LBE101:
+.LBB102:
+	.loc 1 611 0
 #APP
-// 578 "drivers/misc/rockchip-secure-otp.c" 1
+// 611 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	mov	w1, 121
-	str	w1, [x0, 4120]
-.LVL241:
-.LBE202:
-.LBB203:
-	.loc 1 579 0
+	ldr	x0, [x28]
+	mov	w1, 157
+	str	w1, [x0, 4140]
+.LVL154:
+.LBE102:
+.LBB103:
+	.loc 1 612 0
 #APP
-// 579 "drivers/misc/rockchip-secure-otp.c" 1
+// 612 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	mov	w1, 129
-	str	w1, [x0, 4124]
-.LVL242:
-.LBE203:
-.LBB204:
-	.loc 1 580 0
+	ldr	x0, [x28]
+	mov	w26, 2
+	str	w26, [x0, 4144]
+.LVL155:
+.LBE103:
+.LBB104:
+	.loc 1 613 0
 #APP
-// 580 "drivers/misc/rockchip-secure-otp.c" 1
+// 613 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	mov	w1, 126
-	str	w1, [x0, 4128]
-.LVL243:
-.LBE204:
-.LBB205:
-	.loc 1 581 0
+	ldr	x0, [x28]
+	str	wzr, [x0, 4148]
+.LVL156:
+.LBE104:
+.LBB105:
+	.loc 1 614 0
 #APP
-// 581 "drivers/misc/rockchip-secure-otp.c" 1
+// 614 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	mov	w1, 33
-	str	w1, [x0, 4132]
-.LVL244:
-.LBE205:
-.LBB206:
-	.loc 1 582 0
+	ldr	x0, [x28]
+	mov	w1, 64
+	str	w1, [x0, 4152]
+.LVL157:
+.LBE105:
+.LBB106:
+	.loc 1 615 0
 #APP
-// 582 "drivers/misc/rockchip-secure-otp.c" 1
+// 615 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	mov	w1, 17
-	str	w1, [x0, 4136]
-.LVL245:
-.LBE206:
-.LBB207:
-	.loc 1 583 0
+	ldr	x0, [x28]
+.LBE106:
+	.loc 1 616 0
+	mov	w1, w26
+.LBB107:
+	.loc 1 615 0
+	str	w19, [x0, 32]
+.LBE107:
+	.loc 1 616 0
+	mov	x0, x28
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL158:
+	.loc 1 617 0
+	tbnz	w0, #31, .L47
+.LVL159:
+.LBB108:
+	.loc 1 622 0
 #APP
-// 583 "drivers/misc/rockchip-secure-otp.c" 1
+// 622 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	mov	w1, 157
-	str	w1, [x0, 4140]
-.LVL246:
-.LBE207:
-.LBB208:
-	.loc 1 584 0
+	ldr	x0, [x28]
+.LVL160:
+	str	w24, [x0, 36]
+.LVL161:
+.LBE108:
+.LBB109:
+	.loc 1 623 0
 #APP
-// 584 "drivers/misc/rockchip-secure-otp.c" 1
+// 623 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	mov	w21, 2
-	str	w21, [x0, 4144]
-.LVL247:
-.LBE208:
-.LBB209:
-	.loc 1 585 0
+	ldr	x0, [x28]
+	mov	w1, 252
+	str	w1, [x0, 4096]
+.LVL162:
+.LBE109:
+.LBB110:
+	.loc 1 624 0
 #APP
-// 585 "drivers/misc/rockchip-secure-otp.c" 1
+// 624 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	str	wzr, [x0, 4148]
-.LVL248:
-.LBE209:
-.LBB210:
-	.loc 1 586 0
+	ldr	x0, [x28]
+	mov	w27, 10
+	str	w27, [x0, 4100]
+.LVL163:
+.LBE110:
+.LBB111:
+	.loc 1 625 0
 #APP
-// 586 "drivers/misc/rockchip-secure-otp.c" 1
+// 625 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	str	wzr, [x0, 4152]
-.LVL249:
-.LBE210:
-.LBB211:
-	.loc 1 587 0
+	ldr	x0, [x28]
+	mov	w1, 112
+	str	w1, [x0, 4104]
+.LVL164:
+.LBE111:
+.LBB112:
+	.loc 1 626 0
 #APP
-// 587 "drivers/misc/rockchip-secure-otp.c" 1
+// 626 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-.LBE211:
-	.loc 1 588 0
-	mov	w1, w21
-.LBB212:
-	.loc 1 587 0
-	str	w22, [x0, 32]
-.LBE212:
-	.loc 1 588 0
-	mov	x0, x26
+	ldr	x0, [x28]
+.LBE112:
+	.loc 1 627 0
+	mov	w1, w26
+.LBB113:
+	.loc 1 626 0
+	str	w19, [x0, 32]
+.LBE113:
+	.loc 1 627 0
+	mov	x0, x28
 	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL250:
-	mov	w28, w0
-.LVL251:
-	.loc 1 589 0
-	tbz	w0, #31, .L77
-	.loc 1 590 0
-	adrp	x0, .LC10
-.LVL252:
-	mov	x1, x20
-	add	x0, x0, :lo12:.LC10
-	b	.L89
-.LVL253:
-.L77:
-.LBB213:
-	.loc 1 594 0
+.LVL165:
+	.loc 1 628 0
+	tbnz	w0, #31, .L47
+.LVL166:
+.LBB114:
+	.loc 1 633 0
 #APP
-// 594 "drivers/misc/rockchip-secure-otp.c" 1
+// 633 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-.LVL254:
+	ldr	x0, [x28]
+.LVL167:
 	mov	w1, 512
 	movk	w1, 0xff00, lsl 16
 	str	w1, [x0, 32]
-.LVL255:
-.LBE213:
-.LBB214:
-	.loc 1 595 0
+.LVL168:
+.LBE114:
+.LBB115:
+	.loc 1 634 0
 #APP
-// 595 "drivers/misc/rockchip-secure-otp.c" 1
+// 634 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	mov	w25, -65535
-	str	w25, [x0, 36]
-.LVL256:
-.LBE214:
-.LBB215:
-	.loc 1 596 0
+	ldr	x0, [x28]
+	str	w24, [x0, 36]
+.LVL169:
+.LBE115:
+.LBB116:
+	.loc 1 635 0
 #APP
-// 596 "drivers/misc/rockchip-secure-otp.c" 1
+// 635 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	mov	w1, 251
+	ldr	x0, [x28]
+	mov	w1, 192
 	str	w1, [x0, 4096]
-.LVL257:
-.LBE215:
-.LBB216:
-	.loc 1 597 0
+.LBE116:
+.LBB117:
+	.loc 1 636 0
+	and	w1, w21, 255
+.LVL170:
 #APP
-// 597 "drivers/misc/rockchip-secure-otp.c" 1
+// 636 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	str	wzr, [x0, 4100]
-.LVL258:
-.LBE216:
-.LBB217:
-	.loc 1 598 0
+	ldr	x0, [x28]
+.LBE117:
+.LBB118:
+	.loc 1 637 0
+	lsr	w21, w21, 8
+.LVL171:
+.LBE118:
+.LBB119:
+	.loc 1 636 0
+	str	w1, [x0, 4100]
+.LBE119:
+.LBB120:
+	.loc 1 637 0
 #APP
-// 598 "drivers/misc/rockchip-secure-otp.c" 1
+// 637 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-.LBE217:
-	.loc 1 599 0
-	mov	w1, w21
-.LBB218:
-	.loc 1 598 0
-	str	w22, [x0, 32]
-.LBE218:
-	.loc 1 599 0
-	mov	x0, x26
+	ldr	x0, [x28]
+	str	w21, [x0, 4104]
+.LVL172:
+.LBE120:
+.LBB121:
+	.loc 1 638 0
+#APP
+// 638 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+.LBE121:
+	.loc 1 639 0
+	mov	w1, w26
+.LVL173:
+.LBB122:
+	.loc 1 638 0
+	str	w19, [x0, 32]
+.LBE122:
+	.loc 1 639 0
+	mov	x0, x28
 	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL259:
-	mov	w28, w0
-.LVL260:
-	.loc 1 600 0
-	tbz	w0, #31, .L78
-	.loc 1 601 0
-	adrp	x0, .LC11
-.LVL261:
-	mov	x1, x20
-	add	x0, x0, :lo12:.LC11
-	b	.L89
-.LVL262:
-.L78:
-.LBB219:
-	.loc 1 605 0
+.LVL174:
+	.loc 1 640 0
+	tbnz	w0, #31, .L47
+.LVL175:
+.LBB123:
+	.loc 1 645 0
 #APP
-// 605 "drivers/misc/rockchip-secure-otp.c" 1
+// 645 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-.LVL263:
-	mov	w1, -65534
-	str	w1, [x0, 36]
-.LVL264:
-.LBE219:
-.LBB220:
-	.loc 1 606 0
+	ldr	x0, [x28]
+.LVL176:
+	str	w22, [x0, 36]
+.LVL177:
+.LBE123:
+.LBB124:
+	.loc 1 646 0
 #APP
-// 606 "drivers/misc/rockchip-secure-otp.c" 1
+// 646 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	mov	w1, 192
+	ldr	x0, [x28]
+	mov	w1, 224
 	str	w1, [x0, 4096]
-.LBE220:
-.LBB221:
-	.loc 1 607 0
-	and	w1, w23, 255
-.LVL265:
+.LVL178:
+.LBE124:
+.LBB125:
+	.loc 1 647 0
 #APP
-// 607 "drivers/misc/rockchip-secure-otp.c" 1
+// 647 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-.LBE221:
-.LBB222:
-	.loc 1 608 0
-	lsr	w23, w23, 8
-.LVL266:
-.LBE222:
-.LBB223:
-	.loc 1 607 0
-	str	w1, [x0, 4100]
-.LBE223:
-.LBB224:
-	.loc 1 608 0
+	ldr	x0, [x28]
+	str	wzr, [x0, 4100]
+.LVL179:
+.LBE125:
+.LBB126:
+	.loc 1 648 0
 #APP
-// 608 "drivers/misc/rockchip-secure-otp.c" 1
+// 648 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	str	w23, [x0, 4104]
-.LVL267:
-.LBE224:
-.LBB225:
-	.loc 1 609 0
+	ldr	x0, [x28]
+.LBE126:
+	.loc 1 649 0
+	mov	w1, w26
+.LBB127:
+	.loc 1 648 0
+	str	w19, [x0, 32]
+.LBE127:
+	.loc 1 649 0
+	mov	x0, x28
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL180:
+	.loc 1 650 0
+	tbnz	w0, #31, .L47
+.LVL181:
+.LBB128:
+	.loc 1 655 0
 #APP
-// 609 "drivers/misc/rockchip-secure-otp.c" 1
+// 655 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-.LBE225:
-	.loc 1 610 0
-	mov	w1, w21
-.LVL268:
-.LBB226:
-	.loc 1 609 0
-	str	w22, [x0, 32]
-.LBE226:
-	.loc 1 610 0
-	mov	x0, x26
-	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL269:
-	mov	w28, w0
-.LVL270:
-	.loc 1 611 0
-	tbz	w0, #31, .L79
-	.loc 1 612 0
-	adrp	x0, .LC12
-.LVL271:
-	mov	x1, x20
-	add	x0, x0, :lo12:.LC12
-	b	.L89
-.LVL272:
-.L79:
-.LBB227:
-	.loc 1 616 0
+	ldr	x0, [x28]
+.LVL182:
+	str	w22, [x0, 36]
+.LVL183:
+.LBE128:
+.LBB129:
+	.loc 1 656 0
 #APP
-// 616 "drivers/misc/rockchip-secure-otp.c" 1
+// 656 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-.LVL273:
+	ldr	x0, [x28]
 	mov	w1, 14848
 	movk	w1, 0xff00, lsl 16
 	str	w1, [x0, 32]
-.LVL274:
-.LBE227:
-.LBB228:
-	.loc 1 617 0
+.LVL184:
+.LBE129:
+.LBB130:
+	.loc 1 657 0
 #APP
-// 617 "drivers/misc/rockchip-secure-otp.c" 1
+// 657 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	str	w25, [x0, 36]
-.LVL275:
-.LBE228:
-.LBB229:
-	.loc 1 618 0
+	ldr	x0, [x28]
+	mov	w1, 255
+	str	w1, [x0, 4096]
+.LVL185:
+.LBE130:
+.LBB131:
+	.loc 1 658 0
 #APP
-// 618 "drivers/misc/rockchip-secure-otp.c" 1
+// 658 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	mov	w1, 255
-	str	w1, [x0, 4096]
-.LVL276:
-.LBE229:
-.LBB230:
-	.loc 1 619 0
+	ldr	x0, [x28]
+	str	w27, [x0, 4100]
+.LVL186:
+.LBE131:
+.LBB132:
+	.loc 1 659 0
 #APP
-// 619 "drivers/misc/rockchip-secure-otp.c" 1
+// 659 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	mov	w1, 10
-	str	w1, [x0, 4100]
-.LVL277:
-.LBE230:
-.LBB231:
-	.loc 1 620 0
+	ldr	x0, [x28]
+.LBE132:
+	.loc 1 660 0
+	mov	w1, w26
+.LBB133:
+	.loc 1 659 0
+	str	w19, [x0, 32]
+.LBE133:
+	.loc 1 660 0
+	mov	x0, x28
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL187:
+	.loc 1 661 0
+	tbnz	w0, #31, .L47
+.LVL188:
+.LBB134:
+	.loc 1 666 0
 #APP
-// 620 "drivers/misc/rockchip-secure-otp.c" 1
+// 666 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-.LBE231:
-	.loc 1 621 0
-	mov	w1, w21
-.LBB232:
-	.loc 1 620 0
-	str	w22, [x0, 32]
-.LBE232:
-	.loc 1 621 0
-	mov	x0, x26
-	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL278:
-	mov	w28, w0
-.LVL279:
-	.loc 1 622 0
-	tbz	w0, #31, .L80
-	.loc 1 623 0
-	adrp	x0, .LC13
-.LVL280:
-	mov	x1, x20
-	add	x0, x0, :lo12:.LC13
-	b	.L89
-.LVL281:
-.L80:
-.LBB233:
-	.loc 1 627 0
+	ldr	x0, [x28]
+.LVL189:
+	str	w22, [x0, 36]
+.LVL190:
+.LBE134:
+.LBB135:
+	.loc 1 667 0
 #APP
-// 627 "drivers/misc/rockchip-secure-otp.c" 1
+// 667 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-.LVL282:
-	mov	w1, -65534
-	str	w1, [x0, 36]
-.LVL283:
-.LBE233:
-.LBB234:
-	.loc 1 628 0
+	ldr	x0, [x28]
+	str	w23, [x0, 4096]
+.LVL191:
+.LBE135:
+.LBB136:
+	.loc 1 668 0
 #APP
-// 628 "drivers/misc/rockchip-secure-otp.c" 1
+// 668 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	mov	w1, 1
-	str	w1, [x0, 4096]
-.LVL284:
-.LBE234:
-.LBB235:
-	.loc 1 629 0
+	ldr	x0, [x28]
+	mov	w1, 191
+	str	w1, [x0, 4100]
+.LVL192:
+.LBE136:
+.LBB137:
+	.loc 1 669 0
 #APP
-// 629 "drivers/misc/rockchip-secure-otp.c" 1
+// 669 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	mov	w23, 191
-.LVL285:
-	str	w23, [x0, 4100]
-.LVL286:
-.LBE235:
-.LBB236:
-	.loc 1 630 0
+	ldr	x0, [x28]
+.LBE137:
+	.loc 1 670 0
+	mov	w1, w26
+.LBB138:
+	.loc 1 669 0
+	str	w19, [x0, 32]
+.LBE138:
+	.loc 1 670 0
+	mov	x0, x28
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL193:
+	.loc 1 671 0
+	tbnz	w0, #31, .L47
+	.loc 1 676 0
+	mov	x0, x28
+.LVL194:
+	bl	rockchip_secure_otp_check_flag.isra.0
+.LVL195:
+	.loc 1 677 0
+	tbz	w0, #31, .L48
+	.loc 1 678 0
+	adrp	x1, .LANCHOR1
+	adrp	x0, .LC6
+.LVL196:
+	add	x1, x1, :lo12:.LANCHOR1
+	add	x0, x0, :lo12:.LC6
+	b	.L57
+.LVL197:
+.L48:
+.LBB139:
+	.loc 1 682 0
 #APP
-// 630 "drivers/misc/rockchip-secure-otp.c" 1
+// 682 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	str	wzr, [x0, 4104]
-.LVL287:
-.LBE236:
-.LBB237:
-	.loc 1 631 0
+	ldr	x0, [x28]
+.LVL198:
+	mov	w22, -65535
+	str	w22, [x0, 36]
+.LVL199:
+.LBE139:
+.LBB140:
+	.loc 1 683 0
 #APP
-// 631 "drivers/misc/rockchip-secure-otp.c" 1
+// 683 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-.LBE237:
-	.loc 1 632 0
-	mov	w1, w21
-.LBB238:
-	.loc 1 631 0
-	str	w22, [x0, 32]
-.LBE238:
-	.loc 1 632 0
-	mov	x0, x26
+	ldr	x0, [x28]
+	mov	w19, 2
+	str	w19, [x0, 4096]
+.LVL200:
+.LBE140:
+.LBB141:
+	.loc 1 684 0
+#APP
+// 684 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, 191
+	str	w1, [x0, 4100]
+.LVL201:
+.LBE141:
+.LBB142:
+	.loc 1 685 0
+#APP
+// 685 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w21, 65537
+.LVL202:
+.LBE142:
+	.loc 1 686 0
+	mov	w1, w19
+.LBB143:
+	.loc 1 685 0
+	str	w21, [x0, 32]
+.LBE143:
+	.loc 1 686 0
+	mov	x0, x28
 	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL288:
-	mov	w28, w0
-.LVL289:
-	.loc 1 633 0
-	tbz	w0, #31, .L81
-	.loc 1 634 0
-	adrp	x0, .LC14
-.LVL290:
-	mov	x1, x20
-	add	x0, x0, :lo12:.LC14
-	b	.L89
-.LVL291:
-.L81:
-	.loc 1 638 0
-	mov	x0, x26
-.LVL292:
-	bl	rockchip_secure_otp_check_flag.isra.0
-.LVL293:
-	mov	w28, w0
-.LVL294:
-	.loc 1 639 0
-	tbz	w0, #31, .L82
-	.loc 1 640 0
-	adrp	x0, .LC15
-.LVL295:
-	mov	x1, x20
-	add	x0, x0, :lo12:.LC15
-	b	.L89
-.LVL296:
-.L82:
-.LBB239:
-	.loc 1 644 0
+.LVL203:
+	.loc 1 687 0
+	tbnz	w0, #31, .L47
+	.loc 1 692 0
+	mov	x0, x28
+.LVL204:
+	bl	rockchip_secure_otp_wait_flag.isra.1
+.LVL205:
+	.loc 1 693 0
+	tbz	w0, #31, .L49
+	.loc 1 694 0
+	adrp	x1, .LANCHOR1
+	adrp	x0, .LC7
+.LVL206:
+	add	x1, x1, :lo12:.LANCHOR1
+	add	x0, x0, :lo12:.LC7
+	b	.L57
+.LVL207:
+.L49:
+.LBB144:
+	.loc 1 698 0
 #APP
-// 644 "drivers/misc/rockchip-secure-otp.c" 1
+// 698 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-.LVL297:
-	str	w25, [x0, 36]
-.LVL298:
-.LBE239:
-.LBB240:
-	.loc 1 645 0
+	ldr	x0, [x28]
+.LVL208:
+	mov	w1, -65533
+	str	w1, [x0, 772]
+.LVL209:
+.LBE144:
+.LBB145:
+	.loc 1 699 0
 #APP
-// 645 "drivers/misc/rockchip-secure-otp.c" 1
+// 699 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	str	w21, [x0, 4096]
-.LVL299:
-.LBE240:
-.LBB241:
-	.loc 1 646 0
+	ldr	x0, [x28]
+	mov	w1, 512
+	movk	w1, 0xff00, lsl 16
+	str	w1, [x0, 32]
+.LVL210:
+.LBE145:
+.LBB146:
+	.loc 1 700 0
 #APP
-// 646 "drivers/misc/rockchip-secure-otp.c" 1
+// 700 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-	str	w23, [x0, 4100]
-.LVL300:
-.LBE241:
-.LBB242:
-	.loc 1 647 0
+	ldr	x0, [x28]
+	str	w22, [x0, 36]
+.LVL211:
+.LBE146:
+.LBB147:
+	.loc 1 701 0
 #APP
-// 647 "drivers/misc/rockchip-secure-otp.c" 1
+// 701 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x26]
-.LBE242:
-	.loc 1 648 0
-	mov	w1, w21
-.LBB243:
-	.loc 1 647 0
-	str	w22, [x0, 32]
-.LBE243:
-	.loc 1 648 0
-	mov	x0, x26
+	ldr	x0, [x28]
+	str	w19, [x0, 4096]
+.LVL212:
+.LBE147:
+.LBB148:
+	.loc 1 702 0
+#APP
+// 702 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, 128
+	str	w1, [x0, 4100]
+.LVL213:
+.LBE148:
+.LBB149:
+	.loc 1 703 0
+#APP
+// 703 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+.LBE149:
+	.loc 1 704 0
+	mov	w1, w19
+.LBB150:
+	.loc 1 703 0
+	str	w21, [x0, 32]
+.LBE150:
+	.loc 1 704 0
+	mov	x0, x28
 	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL301:
-	mov	w28, w0
-.LVL302:
-	.loc 1 649 0
-	tbz	w0, #31, .L83
-	.loc 1 650 0
-	adrp	x0, .LC16
-.LVL303:
-	mov	x1, x20
-	add	x0, x0, :lo12:.LC16
-	b	.L89
-.LVL304:
-.L83:
-	.loc 1 654 0
-	mov	x0, x26
-.LVL305:
-	bl	rockchip_secure_otp_wait_flag.isra.1
-.LVL306:
-	mov	w28, w0
-.LVL307:
-	.loc 1 655 0
-	tbz	w0, #31, .L76
-	.loc 1 656 0
-	adrp	x0, .LC17
-.LVL308:
-	mov	x1, x20
-	add	x0, x0, :lo12:.LC17
-	b	.L89
-.LBE247:
-.LBE251:
+.LVL214:
+	.loc 1 705 0
+	tbnz	w0, #31, .L47
+.LVL215:
+.LBB151:
+	.loc 1 710 0
+#APP
+// 710 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+.LVL216:
+	str	w22, [x0, 36]
+.LVL217:
+.LBE151:
+.LBB152:
+	.loc 1 711 0
+#APP
+// 711 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, 160
+	str	w1, [x0, 4096]
+.LVL218:
+.LBE152:
+.LBB153:
+	.loc 1 712 0
+#APP
+// 712 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	str	wzr, [x0, 4100]
+.LVL219:
+.LBE153:
+.LBB154:
+	.loc 1 713 0
+#APP
+// 713 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+.LBE154:
+	.loc 1 714 0
+	mov	w1, w19
+.LBB155:
+	.loc 1 713 0
+	str	w21, [x0, 32]
+.LBE155:
+	.loc 1 714 0
+	mov	x0, x28
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL220:
+	.loc 1 715 0
+	tbnz	w0, #31, .L47
+.LVL221:
+.LBB156:
+	.loc 1 720 0
+#APP
+// 720 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+.LVL222:
+	mov	w1, 250
+	str	w1, [x0, 4096]
+.LVL223:
+.LBE156:
+.LBB157:
+	.loc 1 721 0
+#APP
+// 721 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+	mov	w1, 9
+	str	w1, [x0, 4100]
+.LVL224:
+.LBE157:
+.LBB158:
+	.loc 1 722 0
+#APP
+// 722 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x28]
+.LBE158:
+	.loc 1 723 0
+	mov	w1, w19
+.LBB159:
+	.loc 1 722 0
+	str	w21, [x0, 32]
+.LBE159:
+	.loc 1 723 0
+	mov	x0, x28
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL225:
+	.loc 1 724 0
+	tbz	w0, #31, .L46
+	b	.L47
 	.cfi_endproc
-.LFE281:
-	.size	rk3568_secure_otp_write, .-rk3568_secure_otp_write
-	.section	.text.rockchip_secure_otp_write,"ax",@progbits
+.LFE280:
+	.size	rk3568_secure_otp_write_2_bytes_noecc, .-rk3568_secure_otp_write_2_bytes_noecc
+	.section	.text.rockchip_secure_otp_ecc_enable,"ax",@progbits
 	.align	2
-	.type	rockchip_secure_otp_write, %function
-rockchip_secure_otp_write:
-.LFB278:
-	.loc 1 428 0
+	.type	rockchip_secure_otp_ecc_enable, %function
+rockchip_secure_otp_ecc_enable:
+.LFB275:
+	.loc 1 200 0
 	.cfi_startproc
-.LVL309:
-	stp	x29, x30, [sp, -128]!
-	.cfi_def_cfa_offset 128
-	.cfi_offset 29, -128
-	.cfi_offset 30, -120
+.LVL226:
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	and	w1, w1, 255
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -112
-	.cfi_offset 20, -104
-	mov	w19, w1
-	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -80
-	.cfi_offset 24, -72
-	mov	w24, w3
-	stp	x27, x28, [sp, 80]
-	stp	x21, x22, [sp, 32]
-	stp	x25, x26, [sp, 64]
-	.cfi_offset 27, -48
-	.cfi_offset 28, -40
-	.cfi_offset 21, -96
-	.cfi_offset 22, -88
-	.cfi_offset 25, -64
-	.cfi_offset 26, -56
-	.loc 1 428 0
-	stp	x2, x0, [x29, 104]
-	.loc 1 429 0
-	bl	dev_get_platdata
-.LVL310:
-	mov	x27, x0
-.LVL311:
-	.loc 1 431 0
-	sxtw	x0, w24
-.LVL312:
-	bl	malloc_simple
-.LVL313:
-	.loc 1 434 0
-	cbnz	x0, .L93
-.LVL314:
-.L117:
-.LBB313:
-.LBB314:
-	.loc 1 295 0
-	mov	w26, -1
-.L92:
-.LBE314:
-.LBE313:
-	.loc 1 461 0
-	mov	w0, w26
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-.LVL315:
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-.LVL316:
-	ldp	x29, x30, [sp], 128
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
-.LVL317:
-	ret
-.LVL318:
-.L93:
-	.cfi_restore_state
-	mov	x20, x0
-	.loc 1 437 0
-	mov	x2, x0
-	ldr	x0, [x29, 112]
-.LVL319:
-	mov	w3, w24
-	mov	w1, w19
-	bl	rockchip_secure_otp_read
-.LVL320:
-	.loc 1 438 0
-	cbnz	w0, .L117
-	mov	x0, 0
-.LVL321:
-.L97:
-	.loc 1 443 0 discriminator 1
-	cmp	w24, w0
-	bgt	.L98
-.LBB386:
-.LBB382:
-	.loc 1 413 0
-	adrp	x20, .LANCHOR5
-.LVL322:
-	add	x20, x20, :lo12:.LANCHOR5
-.LBE382:
-.LBE386:
-	.loc 1 443 0
-	mov	x23, 0
-.LVL323:
-.L99:
-	.loc 1 453 0 discriminator 1
-	cmp	w24, w23
-	bgt	.L112
-	mov	w26, 0
-	b	.L92
-.LVL324:
-.L98:
-	add	x0, x0, 1
-.LVL325:
-	.loc 1 444 0
-	add	x1, x20, x0
-	ldrb	w1, [x1, -1]
-	cbz	w1, .L97
-	.loc 1 445 0
-	adrp	x0, .LC8
-	add	x0, x0, :lo12:.LC8
-.LVL326:
-.L118:
-.LBB387:
-.LBB383:
-	.loc 1 295 0
-	bl	printf
-.LVL327:
-	b	.L117
-.LVL328:
-.L112:
-.LBE383:
-.LBE387:
-	.loc 1 454 0
-	ldr	x0, [x29, 104]
-	ldrb	w28, [x0, x23]
-.LVL329:
-.LBB388:
-.LBB384:
-	.loc 1 285 0
-	ldr	x0, [x29, 112]
-	bl	dev_get_driver_data
-.LVL330:
-	str	x0, [x29, 120]
-.LVL331:
-	.loc 1 288 0
-	cmp	w19, 448
-	bgt	.L117
-	.loc 1 292 0
-	sub	w0, w19, #16
-.LVL332:
-	cmp	w19, 0
-	ccmp	w0, 31, 0, ne
-	bls	.L100
-	sub	w0, w19, #128
-	cmp	w0, 263
-	bls	.L100
-	.loc 1 295 0
-	adrp	x0, .LC5
-	add	x0, x0, :lo12:.LC5
-	b	.L118
-.L100:
-	.loc 1 299 0
-	cbnz	w28, .L101
-.LVL333:
-.L111:
-	add	x23, x23, 1
-	add	w19, w19, 1
-	b	.L99
-.LVL334:
-.L101:
-	.loc 1 302 0
-	ldr	x0, [x29, 120]
-	mov	w3, w19
-	ldp	x2, x1, [x27, 16]
-	ldr	x5, [x0, 16]
-	ldr	x0, [x27, 8]
-	blr	x5
-.LVL335:
-.LBB315:
-	.loc 1 305 0
+	str	x19, [sp, 16]
+	.cfi_offset 19, -16
+.LBB174:
+	.loc 1 203 0
 #APP
-// 305 "drivers/misc/rockchip-secure-otp.c" 1
+// 203 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-	mov	w1, 262148
-	str	w1, [x0, 32]
-.LVL336:
-.LBE315:
-.LBB316:
-	.loc 1 306 0
+	ldr	x2, [x0]
+	mov	w3, 512
+	movk	w3, 0xff00, lsl 16
+	str	w3, [x2, 32]
+.LVL227:
+.LBE174:
+.LBB175:
+	.loc 1 204 0
 #APP
-// 306 "drivers/misc/rockchip-secure-otp.c" 1
+// 204 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-	mov	w1, -65536
-	str	w1, [x0, 40]
-.LVL337:
-.LBE316:
-.LBB317:
-	.loc 1 307 0
+	ldr	x2, [x0]
+	mov	w3, -65535
+	str	w3, [x2, 36]
+.LVL228:
+.LBE175:
+.LBB176:
+	.loc 1 205 0
 #APP
-// 307 "drivers/misc/rockchip-secure-otp.c" 1
+// 205 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-	mov	w1, 512
-	movk	w1, 0xff00, lsl 16
-	str	w1, [x0, 32]
-.LVL338:
-.LBE317:
-.LBB318:
-	.loc 1 308 0
+	ldr	x2, [x0]
+	mov	w3, 250
+	str	w3, [x2, 4096]
+.LBE176:
+	.loc 1 206 0
+	cbz	w1, .L59
+.LVL229:
+.LBB177:
+	.loc 1 207 0
 #APP
-// 308 "drivers/misc/rockchip-secure-otp.c" 1
+// 207 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-	mov	w1, -65522
-	str	w1, [x0, 36]
-.LVL339:
-.LBE318:
-.LBB319:
-	.loc 1 309 0
+	ldr	x1, [x0]
+.LVL230:
+	str	wzr, [x1, 4100]
+.LVL231:
+.L60:
+.LBE177:
+.LBB178:
+	.loc 1 211 0
 #APP
-// 309 "drivers/misc/rockchip-secure-otp.c" 1
+// 211 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-	mov	w2, 240
-	str	w2, [x29, 100]
-.LVL340:
-	str	w2, [x0, 4096]
-.LBE319:
-.LBB320:
-	.loc 1 310 0
+	ldr	x1, [x0]
+	mov	w2, 65537
+	str	w2, [x1, 32]
+.LBE178:
+	.loc 1 213 0
+	mov	w1, 2
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL232:
+	mov	w19, w0
+.LVL233:
+	.loc 1 214 0
+	tbz	w0, #31, .L58
+.LVL234:
+.LBB179:
+.LBB180:
+	.loc 1 215 0
+	adrp	x1, .LANCHOR2
+	adrp	x0, .LC8
+.LVL235:
+	add	x1, x1, :lo12:.LANCHOR2
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.LVL236:
+.L58:
+.LBE180:
+.LBE179:
+	.loc 1 218 0
+	mov	w0, w19
+	ldr	x19, [sp, 16]
+.LVL237:
+	ldp	x29, x30, [sp], 32
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_def_cfa 31, 0
+	ret
+.LVL238:
+.L59:
+	.cfi_restore_state
+.LBB181:
+	.loc 1 209 0
 #APP
-// 310 "drivers/misc/rockchip-secure-otp.c" 1
+// 209 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-	mov	w25, 1
-	str	w25, [x0, 4100]
-.LVL341:
-.LBE320:
-.LBB321:
-	.loc 1 311 0
-#APP
-// 311 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	mov	w21, 122
-	str	w21, [x0, 4104]
-.LVL342:
-.LBE321:
-.LBB322:
-	.loc 1 312 0
-#APP
-// 312 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	mov	w1, 37
-	str	w1, [x0, 4108]
-.LVL343:
-.LBE322:
-.LBB323:
-	.loc 1 313 0
-#APP
-// 313 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	mov	w1, 4
-	str	w1, [x0, 4112]
-.LVL344:
-.LBE323:
-.LBB324:
-	.loc 1 314 0
-#APP
-// 314 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	str	wzr, [x0, 4116]
-.LVL345:
-.LBE324:
-.LBB325:
-	.loc 1 315 0
+	ldr	x1, [x0]
+	mov	w2, 9
+	str	w2, [x1, 4100]
+	b	.L60
+.LBE181:
+	.cfi_endproc
+.LFE275:
+	.size	rockchip_secure_otp_ecc_enable, .-rockchip_secure_otp_ecc_enable
+	.section	.text.rk3568_secure_otp_read,"ax",@progbits
+	.align	2
+	.type	rk3568_secure_otp_read, %function
+rk3568_secure_otp_read:
+.LFB279:
+	.loc 1 465 0
+	.cfi_startproc
+.LVL239:
+	stp	x29, x30, [sp, -80]!
+	.cfi_def_cfa_offset 80
+	.cfi_offset 29, -80
+	.cfi_offset 30, -72
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -64
+	.cfi_offset 20, -56
+	mov	w20, w1
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -48
+	.cfi_offset 22, -40
+	mov	x21, x2
+	stp	x23, x24, [sp, 48]
+	mov	x22, x0
+	.cfi_offset 23, -32
+	.cfi_offset 24, -24
+	mov	w23, w3
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 25, -16
+	.cfi_offset 26, -8
+	.loc 1 466 0
+	bl	dev_get_platdata
+.LVL240:
+	mov	x19, x0
+.LVL241:
+	.loc 1 467 0
+	mov	x0, x22
+.LVL242:
+	bl	dev_get_driver_data
+.LVL243:
+	.loc 1 473 0
+	ldr	x4, [x0, 16]
+	.loc 1 467 0
+	mov	x24, x0
+.LVL244:
+	.loc 1 473 0
+	ldr	x1, [x19, 24]
+	.loc 1 472 0
+	asr	w20, w20, 1
+.LVL245:
+	.loc 1 473 0
+	ldp	x0, x2, [x19, 8]
+.LVL246:
+	mov	w3, w20
+	blr	x4
+.LVL247:
+	.loc 1 476 0
+	sub	w0, w20, #224
+	cmp	w0, 7
+	bhi	.L64
+	.loc 1 477 0
+	mov	w1, 0
+.L80:
+	.loc 1 479 0
+	mov	x0, x19
+	bl	rockchip_secure_otp_ecc_enable
+.LVL248:
+.LBB182:
+	.loc 1 481 0
 #APP
-// 315 "drivers/misc/rockchip-secure-otp.c" 1
+// 481 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-	str	wzr, [x0, 4120]
-.LVL346:
-.LBE325:
-.LBB326:
-	.loc 1 316 0
+	ldr	x0, [x19]
+	mov	w25, 65537
+.LBE182:
+	.loc 1 488 0
+	mov	x26, -255
+	.loc 1 470 0
+	mov	w22, 0
+.LVL249:
+	.loc 1 488 0
+	movk	x26, 0x7f, lsl 32
+	movk	x26, 0xf, lsl 48
+.LBB183:
+	.loc 1 481 0
+	str	w25, [x0, 256]
+.LBE183:
+	.loc 1 482 0
+	mov	x0, 50
+	bl	udelay
+.LVL250:
+.L66:
+	.loc 1 483 0
+	cbz	w23, .L71
+	.loc 1 485 0
+	cmp	w20, 448
+	bgt	.L75
+	sub	w0, w20, #64
+	.loc 1 488 0
+	cmp	w0, 51
+	bhi	.L68
+	lsr	x0, x26, x0
+	tbnz	x0, 0, .L69
+.L68:
+	.loc 1 488 0 is_stmt 0 discriminator 1
+	sub	w0, w20, #229
+	cmp	w0, 218
+	bls	.L69
+	.loc 1 491 0 is_stmt 1
+	adrp	x0, .LC4
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+.LVL251:
+.L75:
+	.loc 1 486 0
+	mov	w22, -1
+.LVL252:
+	b	.L63
+.LVL253:
+.L64:
+	.loc 1 479 0
+	mov	w1, 1
+	b	.L80
+.LVL254:
+.L69:
+.LBB184:
+	.loc 1 495 0
+	orr	w1, w20, -65536
+.LVL255:
 #APP
-// 316 "drivers/misc/rockchip-secure-otp.c" 1
+// 495 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-	str	wzr, [x0, 4124]
-.LVL347:
-.LBE326:
-.LBB327:
-	.loc 1 317 0
+	ldr	x0, [x19]
+.LBE184:
+	.loc 1 497 0
+	add	w20, w20, 1
+.LVL256:
+.LBB185:
+	.loc 1 495 0
+	str	w1, [x0, 260]
+.LBE185:
+.LBB186:
+	.loc 1 498 0
 #APP
-// 317 "drivers/misc/rockchip-secure-otp.c" 1
+// 498 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-	mov	w1, 11
-	str	w1, [x0, 4128]
-.LVL348:
-.LBE327:
-.LBB328:
-	.loc 1 318 0
+	ldr	x0, [x19]
+.LBE186:
+	.loc 1 500 0
+	mov	w1, 4
+.LVL257:
+.LBB187:
+	.loc 1 498 0
+	str	w25, [x0, 264]
+.LVL258:
+.LBE187:
+	.loc 1 500 0
+	mov	x0, x19
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL259:
+	mov	w22, w0
+.LVL260:
+	.loc 1 501 0
+	tbz	w0, #31, .L70
+	.loc 1 502 0
+	adrp	x1, .LANCHOR3
+	adrp	x0, .LC9
+.LVL261:
+	add	x1, x1, :lo12:.LANCHOR3
+	add	x0, x0, :lo12:.LC9
+	bl	printf
+.LVL262:
+.L71:
+.LBB188:
+	.loc 1 516 0
 #APP
-// 318 "drivers/misc/rockchip-secure-otp.c" 1
+// 516 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-	mov	w1, 8
-	str	w1, [x0, 4132]
-.LVL349:
-.LBE328:
-.LBB329:
-	.loc 1 319 0
+	ldr	x0, [x19]
+	mov	w1, 65536
+.LBE188:
+	.loc 1 518 0
+	ldr	x2, [x19, 16]
+	mov	w3, w20
+	ldr	x4, [x24, 24]
+.LBB189:
+	.loc 1 516 0
+	str	w1, [x0, 256]
+.LBE189:
+	.loc 1 518 0
+	ldr	x0, [x19, 8]
+	ldr	x1, [x19, 24]
+	blr	x4
+.LVL263:
+.L63:
+	.loc 1 523 0
+	mov	w0, w22
+	ldp	x19, x20, [sp, 16]
+.LVL264:
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+.LVL265:
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL266:
+.L70:
+	.cfi_restore_state
+.LBB190:
+	.loc 1 506 0
+	ldr	x0, [x19]
+.LVL267:
+	ldrh	w0, [x0, 292]
+	and	w0, w0, 65535
+.LVL268:
 #APP
-// 319 "drivers/misc/rockchip-secure-otp.c" 1
+// 506 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
+.LVL269:
 #NO_APP
-	ldr	x0, [x27]
-	str	wzr, [x0, 4136]
-.LVL350:
-.LBE329:
-.LBB330:
-	.loc 1 320 0
-#APP
-// 320 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
+.LBE190:
+	.loc 1 508 0
+	strb	w0, [x21]
+	.loc 1 509 0
+	cmp	w23, 1
+	beq	.L71
+.LVL270:
+	.loc 1 510 0
+	lsr	w0, w0, 8
+.LVL271:
+	.loc 1 511 0
+	sub	w23, w23, #2
+.LVL272:
+	.loc 1 510 0
+	strb	w0, [x21, 1]
+	add	x21, x21, 2
+.LVL273:
+	b	.L66
+	.cfi_endproc
+.LFE279:
+	.size	rk3568_secure_otp_read, .-rk3568_secure_otp_read
+	.section	.text.rk3568_secure_otp_write,"ax",@progbits
+	.align	2
+	.type	rk3568_secure_otp_write, %function
+rk3568_secure_otp_write:
+.LFB283:
+	.loc 1 910 0
+	.cfi_startproc
+.LVL274:
+	stp	x29, x30, [sp, -144]!
+	.cfi_def_cfa_offset 144
+	.cfi_offset 29, -144
+	.cfi_offset 30, -136
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -128
+	.cfi_offset 20, -120
+	mov	w20, w3
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 25, -80
+	.cfi_offset 26, -72
+	mov	x25, x0
+	stp	x27, x28, [sp, 80]
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 27, -64
+	.cfi_offset 28, -56
+	.cfi_offset 21, -112
+	.cfi_offset 22, -104
+	.cfi_offset 23, -96
+	.cfi_offset 24, -88
+	.loc 1 910 0
+	str	x2, [x29, 112]
+	str	w1, [x29, 124]
+	.loc 1 911 0
+	bl	dev_get_platdata
+.LVL275:
+	mov	x27, x0
+.LVL276:
+	.loc 1 914 0
+	sxtw	x0, w20
+.LVL277:
+	bl	malloc_simple
+.LVL278:
+	.loc 1 917 0
+	tbz	x20, 0, .L82
+	.loc 1 918 0
+	adrp	x0, .LC10
+.LVL279:
+	add	x0, x0, :lo12:.LC10
+	bl	printf
+.LVL280:
+.L87:
+.LBB258:
+.LBB259:
+	.loc 1 745 0
+	mov	w26, -1
+	b	.L81
+.LVL281:
+.L82:
+.LBE259:
+.LBE258:
+	.loc 1 922 0
+	cbz	x0, .L87
+	.loc 1 942 0
+	ldr	w0, [x29, 124]
+.LVL282:
+	sub	w0, w0, #224
+	cmp	w0, 7
+	bls	.L85
+	.loc 1 950 0 discriminator 1
+	mov	w0, 2
+.LBB263:
+.LBB264:
+	.loc 1 895 0 discriminator 1
+	adrp	x19, .LANCHOR4
+	add	x19, x19, :lo12:.LANCHOR4
+.LBE264:
+.LBE263:
+	.loc 1 950 0 discriminator 1
+	mov	x23, 0
+	sdiv	w0, w20, w0
+	str	w0, [x29, 120]
+.LVL283:
+.L86:
+	ldr	w0, [x29, 120]
+	cmp	w0, w23
+	ble	.L107
+	ldr	w0, [x29, 124]
+	add	w20, w0, w23, lsl 1
+	.loc 1 951 0
+	ldr	x0, [x29, 112]
+.LBB344:
+.LBB340:
+	.loc 1 765 0
+	asr	w21, w20, 1
+.LBE340:
+.LBE344:
+	.loc 1 951 0
+	ldrh	w24, [x0, x23, lsl 1]
+.LVL284:
+.LBB345:
+.LBB341:
+	.loc 1 763 0
+	mov	x0, x25
+	bl	dev_get_driver_data
+.LVL285:
+	mov	x28, x0
+.LVL286:
+	.loc 1 766 0
+	cmp	w21, 448
+	bgt	.L87
+	.loc 1 770 0
+	sub	w0, w21, #64
+.LVL287:
+	cmp	w0, 51
+	bhi	.L93
+	mov	x1, -255
+	movk	x1, 0x7f, lsl 32
+	movk	x1, 0xf, lsl 48
+	lsr	x0, x1, x0
+	tbnz	x0, 0, .L94
+.L93:
+	sub	w0, w21, #229
+	cmp	w0, 218
+	bls	.L94
+	.loc 1 773 0
+	mov	w1, w21
+	adrp	x0, .LC4
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+.LVL288:
+	b	.L87
+.LVL289:
+.L91:
+.LBE341:
+.LBE345:
+	.loc 1 945 0
+	ldr	x0, [x29, 112]
+.LBB346:
+.LBB260:
+	.loc 1 743 0
+	mov	w3, 2
+	add	x2, x29, 142
+.LBE260:
+.LBE346:
+	.loc 1 945 0
+	ldrb	w22, [x0, x19]
+.LVL290:
+.LBB347:
+.LBB261:
+	.loc 1 743 0
+	ldr	w0, [x29, 124]
+	adds	w23, w0, w19
+	mov	x0, x25
+	and	w24, w23, 1
+	csneg	w21, w24, w24, pl
+	sub	w21, w23, w21
+	mov	w1, w21
+	bl	rk3568_secure_otp_read
+.LVL291:
+	.loc 1 744 0
+	cbnz	w0, .L87
+	ldrh	w3, [x29, 142]
+	.loc 1 747 0
+	cbnz	w24, .L88
+.LVL292:
+	.loc 1 749 0
+	bic	w3, w22, w3
+	mov	w2, w23
+.LVL293:
+.L112:
+	.loc 1 752 0
+	mov	x1, x27
+	mov	x0, x25
+.LVL294:
+	add	x19, x19, 1
+.LVL295:
+	bl	rk3568_secure_otp_write_2_bytes_noecc
+.LVL296:
+	mov	w26, w0
+.LVL297:
+.LBE261:
+.LBE347:
+	.loc 1 946 0
+	cbz	w0, .L90
+.LVL298:
+.L81:
+	.loc 1 958 0
+	mov	w0, w26
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+.LVL299:
+	ldp	x27, x28, [sp, 80]
+.LVL300:
+	ldp	x29, x30, [sp], 144
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+.LVL301:
+	ret
+.LVL302:
+.L88:
+	.cfi_restore_state
+.LBB348:
+.LBB262:
+	.loc 1 751 0
+	lsl	w22, w22, 8
+.LVL303:
+	.loc 1 752 0
+	mov	w2, w21
+	bic	w3, w22, w3
+	b	.L112
+.LVL304:
+.L85:
+.LBE262:
+.LBE348:
+	mov	x19, 0
+.LVL305:
+.L90:
+	.loc 1 944 0 discriminator 1
+	cmp	w20, w19
+	bgt	.L91
+.LVL306:
+.L107:
+.LBB349:
+.LBB342:
+	.loc 1 773 0
+	mov	w26, 0
+	b	.L81
+.LVL307:
+.L94:
+	.loc 1 777 0
+	cbnz	w24, .L95
+.LVL308:
+.L105:
+	add	x23, x23, 1
+.LVL309:
+	b	.L86
+.LVL310:
+.L95:
+	.loc 1 780 0
+	ldp	x0, x2, [x27, 8]
+	mov	w3, w21
+	ldr	x1, [x27, 24]
+	ldr	x5, [x28, 16]
+	blr	x5
+.LVL311:
+.LBB265:
+	.loc 1 783 0
+#APP
+// 783 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-	str	wzr, [x0, 4140]
-.LVL351:
-.LBE330:
-.LBB331:
-	.loc 1 321 0
+	mov	w1, 65536
+	str	w1, [x0, 256]
+.LVL312:
+.LBE265:
+.LBB266:
+	.loc 1 784 0
 #APP
-// 321 "drivers/misc/rockchip-secure-otp.c" 1
+// 784 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-	str	wzr, [x0, 4144]
-.LBE331:
-.LBB332:
-	.loc 1 322 0
-	and	w0, w19, 255
+	mov	w1, 262148
+	str	w1, [x0, 32]
+.LVL313:
+.LBE266:
+.LBB267:
+	.loc 1 785 0
 #APP
-// 322 "drivers/misc/rockchip-secure-otp.c" 1
+// 785 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x1, [x27]
-	str	w0, [x1, 4148]
-.LBE332:
-.LBB333:
-	.loc 1 323 0
-	ubfx	x1, x19, 8, 8
-.LVL352:
+	ldr	x0, [x27]
+	mov	w1, -65536
+	str	w1, [x0, 40]
+.LVL314:
+.LBE267:
+.LBB268:
+	.loc 1 786 0
 #APP
-// 323 "drivers/misc/rockchip-secure-otp.c" 1
+// 786 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-	str	w1, [x0, 4152]
-.LVL353:
-.LBE333:
-.LBB334:
-	.loc 1 324 0
+	mov	w1, 512
+	movk	w1, 0xff00, lsl 16
+	str	w1, [x0, 32]
+.LVL315:
+.LBE268:
+.LBB269:
+	.loc 1 787 0
 #APP
-// 324 "drivers/misc/rockchip-secure-otp.c" 1
+// 787 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-	mov	w22, 65537
-.LBE334:
-	.loc 1 325 0
-	mov	w1, 2
-.LVL354:
-.LBB335:
-	.loc 1 324 0
-	str	w22, [x0, 32]
-.LVL355:
-.LBE335:
-	.loc 1 325 0
-	mov	x0, x27
-	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL356:
-	mov	w26, w0
-.LVL357:
-	.loc 1 326 0
-	ldr	w2, [x29, 100]
-	tbz	w0, #31, .L102
-	.loc 1 327 0
-	adrp	x0, .LC9
-.LVL358:
-	mov	x1, x20
-	add	x0, x0, :lo12:.LC9
-.LVL359:
-.L116:
-	.loc 1 413 0
-	bl	printf
-.LVL360:
-.L103:
-.LBB336:
-	.loc 1 418 0
+	mov	w1, -65522
+	str	w1, [x0, 36]
+.LVL316:
+.LBE269:
+.LBB270:
+	.loc 1 788 0
 #APP
-// 418 "drivers/misc/rockchip-secure-otp.c" 1
+// 788 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-	mov	w1, -65533
-.LBE336:
-	.loc 1 419 0
-	ldr	x2, [x27, 16]
-	mov	w3, w19
-.LBB337:
-	.loc 1 418 0
-	str	w1, [x0, 772]
-.LBE337:
-	.loc 1 419 0
-	ldr	x0, [x29, 120]
-	ldr	x1, [x27, 24]
-	ldr	x6, [x0, 24]
-	ldr	x0, [x27, 8]
-	blr	x6
-.LVL361:
-.LBE384:
-.LBE388:
-	.loc 1 455 0
-	cbz	w26, .L111
-	b	.L92
-.LVL362:
-.L102:
-.LBB389:
-.LBB385:
-.LBB338:
-	.loc 1 331 0
+	mov	w3, 240
+	str	w3, [x29, 104]
+.LVL317:
+	str	w3, [x0, 4096]
+.LBE270:
+.LBB271:
+	.loc 1 789 0
 #APP
-// 331 "drivers/misc/rockchip-secure-otp.c" 1
+// 789 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-.LVL363:
-	mov	w1, 14848
-	movk	w1, 0xff00, lsl 16
-	str	w1, [x0, 32]
-.LVL364:
-.LBE338:
-.LBB339:
-	.loc 1 332 0
-#APP
-// 332 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	str	w2, [x0, 4096]
-.LVL365:
-.LBE339:
-.LBB340:
-	.loc 1 333 0
-#APP
-// 333 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	str	w25, [x0, 4100]
-.LVL366:
-.LBE340:
-.LBB341:
-	.loc 1 334 0
+	mov	w1, 1
+	str	w1, [x0, 4100]
+.LVL318:
+.LBE271:
+.LBB272:
+	.loc 1 790 0
 #APP
-// 334 "drivers/misc/rockchip-secure-otp.c" 1
+// 790 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-	str	w21, [x0, 4104]
-.LVL367:
-.LBE341:
-.LBB342:
-	.loc 1 335 0
+	mov	w2, 122
+	str	w2, [x29, 108]
+.LVL319:
+	str	w2, [x0, 4104]
+.LBE272:
+.LBB273:
+	.loc 1 791 0
 #APP
-// 335 "drivers/misc/rockchip-secure-otp.c" 1
+// 791 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-	mov	w1, 21
+	mov	w1, 37
 	str	w1, [x0, 4108]
-.LVL368:
-.LBE342:
-.LBB343:
-	.loc 1 336 0
+.LVL320:
+.LBE273:
+.LBB274:
+	.loc 1 792 0
 #APP
-// 336 "drivers/misc/rockchip-secure-otp.c" 1
+// 792 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-	mov	w1, 220
-	str	w1, [x0, 4112]
-.LVL369:
-.LBE343:
-.LBB344:
-	.loc 1 337 0
+	str	wzr, [x0, 4112]
+.LVL321:
+.LBE274:
+.LBB275:
+	.loc 1 793 0
 #APP
-// 337 "drivers/misc/rockchip-secure-otp.c" 1
+// 793 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-	mov	w1, 146
-	str	w1, [x0, 4116]
-.LVL370:
-.LBE344:
-.LBB345:
-	.loc 1 338 0
+	str	wzr, [x0, 4116]
+.LVL322:
+.LBE275:
+.LBB276:
+	.loc 1 794 0
 #APP
-// 338 "drivers/misc/rockchip-secure-otp.c" 1
+// 794 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-	mov	w1, 121
-	str	w1, [x0, 4120]
-.LVL371:
-.LBE345:
-.LBB346:
-	.loc 1 339 0
+	str	wzr, [x0, 4120]
+.LVL323:
+.LBE276:
+.LBB277:
+	.loc 1 795 0
 #APP
-// 339 "drivers/misc/rockchip-secure-otp.c" 1
+// 795 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-	mov	w1, 129
+	mov	w1, 31
 	str	w1, [x0, 4124]
-.LVL372:
-.LBE346:
-.LBB347:
-	.loc 1 340 0
+.LVL324:
+.LBE277:
+.LBB278:
+	.loc 1 796 0
 #APP
-// 340 "drivers/misc/rockchip-secure-otp.c" 1
+// 796 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-	mov	w1, 126
+	mov	w1, 11
 	str	w1, [x0, 4128]
-.LVL373:
-.LBE347:
-.LBB348:
-	.loc 1 341 0
+.LVL325:
+.LBE278:
+.LBB279:
+	.loc 1 797 0
 #APP
-// 341 "drivers/misc/rockchip-secure-otp.c" 1
+// 797 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-	mov	w1, 33
+	mov	w1, 8
 	str	w1, [x0, 4132]
-.LVL374:
-.LBE348:
-.LBB349:
-	.loc 1 342 0
+.LVL326:
+.LBE279:
+.LBB280:
+	.loc 1 798 0
 #APP
-// 342 "drivers/misc/rockchip-secure-otp.c" 1
+// 798 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-	mov	w1, 17
-	str	w1, [x0, 4136]
-.LVL375:
-.LBE349:
-.LBB350:
-	.loc 1 343 0
+	str	wzr, [x0, 4136]
+.LVL327:
+.LBE280:
+.LBB281:
+	.loc 1 799 0
 #APP
-// 343 "drivers/misc/rockchip-secure-otp.c" 1
+// 799 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-	mov	w1, 157
-	str	w1, [x0, 4140]
-.LVL376:
-.LBE350:
-.LBB351:
-	.loc 1 344 0
+	str	wzr, [x0, 4140]
+.LVL328:
+.LBE281:
+.LBB282:
+	.loc 1 800 0
 #APP
-// 344 "drivers/misc/rockchip-secure-otp.c" 1
+// 800 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-	mov	w21, 2
-	str	w21, [x0, 4144]
-.LVL377:
-.LBE351:
-.LBB352:
-	.loc 1 345 0
+	str	wzr, [x0, 4144]
+.LBE282:
+.LBB283:
+	.loc 1 801 0
+	and	w0, w21, 255
 #APP
-// 345 "drivers/misc/rockchip-secure-otp.c" 1
+// 801 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-	str	wzr, [x0, 4148]
-.LVL378:
-.LBE352:
-.LBB353:
-	.loc 1 346 0
+	ldr	x1, [x27]
+.LBE283:
+.LBB284:
+	.loc 1 802 0
+	ubfx	x20, x20, 9, 8
+.LVL329:
+.LBE284:
+.LBB285:
+	.loc 1 801 0
+	str	w0, [x1, 4148]
+.LBE285:
+.LBB286:
+	.loc 1 802 0
 #APP
-// 346 "drivers/misc/rockchip-secure-otp.c" 1
+// 802 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-	str	wzr, [x0, 4152]
-.LVL379:
-.LBE353:
-.LBB354:
-	.loc 1 347 0
+	str	w20, [x0, 4152]
+.LVL330:
+.LBE286:
+.LBB287:
+	.loc 1 803 0
 #APP
-// 347 "drivers/misc/rockchip-secure-otp.c" 1
+// 803 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-.LBE354:
-	.loc 1 348 0
-	mov	w1, w21
-.LBB355:
-	.loc 1 347 0
+	mov	w22, 65537
+.LBE287:
+	.loc 1 804 0
+	mov	w1, 2
+.LBB288:
+	.loc 1 803 0
 	str	w22, [x0, 32]
-.LBE355:
-	.loc 1 348 0
+.LBE288:
+	.loc 1 804 0
 	mov	x0, x27
 	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL380:
+.LVL331:
 	mov	w26, w0
-.LVL381:
-	.loc 1 349 0
-	tbz	w0, #31, .L104
-	.loc 1 350 0
-	adrp	x0, .LC10
-.LVL382:
-	mov	x1, x20
-	add	x0, x0, :lo12:.LC10
-	b	.L116
-.LVL383:
-.L104:
-.LBB356:
-	.loc 1 354 0
+.LVL332:
+	.loc 1 805 0
+	ldp	w3, w2, [x29, 104]
+	tbz	w0, #31, .L96
+	.loc 1 806 0
+	adrp	x0, .LC5
+.LVL333:
+	mov	x1, x19
+	add	x0, x0, :lo12:.LC5
+.LVL334:
+.L113:
+	.loc 1 895 0
+	bl	printf
+.LVL335:
+.L97:
+.LBB289:
+	.loc 1 900 0
 #APP
-// 354 "drivers/misc/rockchip-secure-otp.c" 1
+// 900 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-.LVL384:
-	mov	w1, 512
+	mov	w1, -65533
+.LBE289:
+	.loc 1 901 0
+	ldr	x2, [x27, 16]
+	mov	w3, w21
+	ldr	x6, [x28, 24]
+.LBB290:
+	.loc 1 900 0
+	str	w1, [x0, 772]
+.LBE290:
+	.loc 1 901 0
+	ldr	x0, [x27, 8]
+	ldr	x1, [x27, 24]
+	blr	x6
+.LVL336:
+.LBE342:
+.LBE349:
+	.loc 1 952 0
+	cbz	w26, .L105
+	b	.L81
+.LVL337:
+.L96:
+.LBB350:
+.LBB343:
+.LBB291:
+	.loc 1 810 0
+#APP
+// 810 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LVL338:
+	mov	w1, 14848
 	movk	w1, 0xff00, lsl 16
 	str	w1, [x0, 32]
-.LVL385:
-.LBE356:
-.LBB357:
-	.loc 1 355 0
+.LVL339:
+.LBE291:
+.LBB292:
+	.loc 1 811 0
 #APP
-// 355 "drivers/misc/rockchip-secure-otp.c" 1
+// 811 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-	mov	w1, -65535
-	str	w1, [x0, 36]
-.LVL386:
-.LBE357:
-.LBB358:
-	.loc 1 356 0
+	str	w3, [x0, 4096]
+.LVL340:
+.LBE292:
+.LBB293:
+	.loc 1 812 0
 #APP
-// 356 "drivers/misc/rockchip-secure-otp.c" 1
+// 812 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-	mov	w1, 251
-	str	w1, [x0, 4096]
-.LVL387:
-.LBE358:
-.LBB359:
-	.loc 1 357 0
+	mov	w1, 1
+	str	w1, [x0, 4100]
+.LVL341:
+.LBE293:
+.LBB294:
+	.loc 1 813 0
 #APP
-// 357 "drivers/misc/rockchip-secure-otp.c" 1
+// 813 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-	str	wzr, [x0, 4100]
-.LVL388:
-.LBE359:
-.LBB360:
-	.loc 1 358 0
+	str	w2, [x0, 4104]
+.LVL342:
+.LBE294:
+.LBB295:
+	.loc 1 814 0
 #APP
-// 358 "drivers/misc/rockchip-secure-otp.c" 1
+// 814 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-.LBE360:
-	.loc 1 359 0
-	mov	w1, w21
-.LBB361:
-	.loc 1 358 0
-	str	w22, [x0, 32]
-.LBE361:
-	.loc 1 359 0
-	mov	x0, x27
-	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL389:
-	mov	w26, w0
-.LVL390:
-	.loc 1 360 0
-	tbz	w0, #31, .L105
-	.loc 1 361 0
-	adrp	x0, .LC11
-.LVL391:
-	mov	x1, x20
-	add	x0, x0, :lo12:.LC11
-	b	.L116
-.LVL392:
-.L105:
-.LBB362:
-	.loc 1 365 0
+	mov	w1, 21
+	str	w1, [x0, 4108]
+.LVL343:
+.LBE295:
+.LBB296:
+	.loc 1 815 0
 #APP
-// 365 "drivers/misc/rockchip-secure-otp.c" 1
+// 815 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-.LVL393:
-	mov	w1, 192
-	str	w1, [x0, 4096]
-.LVL394:
-.LBE362:
-.LBB363:
-	.loc 1 366 0
+	mov	w1, 220
+	str	w1, [x0, 4112]
+.LVL344:
+.LBE296:
+.LBB297:
+	.loc 1 816 0
 #APP
-// 366 "drivers/misc/rockchip-secure-otp.c" 1
+// 816 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-	str	w28, [x0, 4100]
-.LVL395:
-.LBE363:
-.LBB364:
-	.loc 1 367 0
+	mov	w1, 146
+	str	w1, [x0, 4116]
+.LVL345:
+.LBE297:
+.LBB298:
+	.loc 1 817 0
 #APP
-// 367 "drivers/misc/rockchip-secure-otp.c" 1
+// 817 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-.LBE364:
-	.loc 1 368 0
-	mov	w1, w21
-.LBB365:
-	.loc 1 367 0
-	str	w22, [x0, 32]
-.LBE365:
-	.loc 1 368 0
-	mov	x0, x27
-	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL396:
-	mov	w26, w0
-.LVL397:
-	.loc 1 369 0
-	tbz	w0, #31, .L106
-	.loc 1 370 0
-	adrp	x0, .LC12
-.LVL398:
-	mov	x1, x20
-	add	x0, x0, :lo12:.LC12
-	b	.L116
-.LVL399:
-.L106:
-.LBB366:
-	.loc 1 374 0
+	mov	w1, 121
+	str	w1, [x0, 4120]
+.LVL346:
+.LBE298:
+.LBB299:
+	.loc 1 818 0
 #APP
-// 374 "drivers/misc/rockchip-secure-otp.c" 1
+// 818 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-.LVL400:
-	mov	w1, 14848
-	movk	w1, 0xff00, lsl 16
-	str	w1, [x0, 32]
-.LVL401:
-.LBE366:
-.LBB367:
-	.loc 1 375 0
+	mov	w1, 129
+	str	w1, [x0, 4124]
+.LVL347:
+.LBE299:
+.LBB300:
+	.loc 1 819 0
 #APP
-// 375 "drivers/misc/rockchip-secure-otp.c" 1
+// 819 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-	mov	w1, 255
-	str	w1, [x0, 4096]
-.LVL402:
-.LBE367:
-.LBB368:
-	.loc 1 376 0
+	mov	w1, 126
+	str	w1, [x0, 4128]
+.LVL348:
+.LBE300:
+.LBB301:
+	.loc 1 820 0
 #APP
-// 376 "drivers/misc/rockchip-secure-otp.c" 1
+// 820 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-	mov	w1, 10
-	str	w1, [x0, 4100]
-.LVL403:
-.LBE368:
-.LBB369:
-	.loc 1 377 0
+	mov	w1, 33
+	str	w1, [x0, 4132]
+.LVL349:
+.LBE301:
+.LBB302:
+	.loc 1 821 0
 #APP
-// 377 "drivers/misc/rockchip-secure-otp.c" 1
+// 821 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-.LBE369:
-	.loc 1 378 0
-	mov	w1, w21
-.LBB370:
-	.loc 1 377 0
+	mov	w1, 17
+	str	w1, [x0, 4136]
+.LVL350:
+.LBE302:
+.LBB303:
+	.loc 1 822 0
+#APP
+// 822 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 157
+	str	w1, [x0, 4140]
+.LVL351:
+.LBE303:
+.LBB304:
+	.loc 1 823 0
+#APP
+// 823 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w20, 2
+.LVL352:
+	str	w20, [x0, 4144]
+.LVL353:
+.LBE304:
+.LBB305:
+	.loc 1 824 0
+#APP
+// 824 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	wzr, [x0, 4148]
+.LVL354:
+.LBE305:
+.LBB306:
+	.loc 1 825 0
+#APP
+// 825 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	wzr, [x0, 4152]
+.LVL355:
+.LBE306:
+.LBB307:
+	.loc 1 826 0
+#APP
+// 826 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LBE307:
+	.loc 1 827 0
+	mov	w1, w20
+.LBB308:
+	.loc 1 826 0
 	str	w22, [x0, 32]
-.LBE370:
-	.loc 1 378 0
+.LBE308:
+	.loc 1 827 0
 	mov	x0, x27
 	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL404:
+.LVL356:
 	mov	w26, w0
-.LVL405:
-	.loc 1 379 0
-	tbz	w0, #31, .L107
-	.loc 1 380 0
-	adrp	x0, .LC13
-.LVL406:
-	mov	x1, x20
-	add	x0, x0, :lo12:.LC13
-	b	.L116
-.LVL407:
-.L107:
-.LBB371:
-	.loc 1 384 0
+.LVL357:
+	.loc 1 828 0
+	tbz	w0, #31, .L98
+	.loc 1 829 0
+	adrp	x0, .LC11
+.LVL358:
+	mov	x1, x19
+	add	x0, x0, :lo12:.LC11
+	b	.L113
+.LVL359:
+.L98:
+.LBB309:
+	.loc 1 833 0
 #APP
-// 384 "drivers/misc/rockchip-secure-otp.c" 1
+// 833 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-.LVL408:
-	mov	w28, -65534
-.LVL409:
-	str	w28, [x0, 36]
-.LVL410:
-.LBE371:
-.LBB372:
-	.loc 1 385 0
+.LVL360:
+	mov	w1, 512
+	movk	w1, 0xff00, lsl 16
+	str	w1, [x0, 32]
+.LVL361:
+.LBE309:
+.LBB310:
+	.loc 1 834 0
 #APP
-// 385 "drivers/misc/rockchip-secure-otp.c" 1
+// 834 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-	str	w25, [x0, 4096]
-.LVL411:
-.LBE372:
-.LBB373:
-	.loc 1 386 0
+	mov	w1, -65535
+	str	w1, [x0, 36]
+.LVL362:
+.LBE310:
+.LBB311:
+	.loc 1 835 0
 #APP
-// 386 "drivers/misc/rockchip-secure-otp.c" 1
+// 835 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-	mov	w25, 191
-	str	w25, [x0, 4100]
-.LVL412:
-.LBE373:
-.LBB374:
-	.loc 1 387 0
+	mov	w1, 251
+	str	w1, [x0, 4096]
+.LVL363:
+.LBE311:
+.LBB312:
+	.loc 1 836 0
 #APP
-// 387 "drivers/misc/rockchip-secure-otp.c" 1
+// 836 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-	str	wzr, [x0, 4104]
-.LVL413:
-.LBE374:
-.LBB375:
-	.loc 1 388 0
+	str	wzr, [x0, 4100]
+.LVL364:
+.LBE312:
+.LBB313:
+	.loc 1 837 0
 #APP
-// 388 "drivers/misc/rockchip-secure-otp.c" 1
+// 837 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-.LBE375:
-	.loc 1 389 0
-	mov	w1, w21
-.LBB376:
-	.loc 1 388 0
+.LBE313:
+	.loc 1 838 0
+	mov	w1, w20
+.LBB314:
+	.loc 1 837 0
 	str	w22, [x0, 32]
-.LBE376:
-	.loc 1 389 0
+.LBE314:
+	.loc 1 838 0
 	mov	x0, x27
 	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL414:
-	mov	w26, w0
-.LVL415:
-	.loc 1 390 0
-	tbz	w0, #31, .L108
-	.loc 1 391 0
-	adrp	x0, .LC14
-.LVL416:
-	mov	x1, x20
-	add	x0, x0, :lo12:.LC14
-	b	.L116
-.LVL417:
-.L108:
-	.loc 1 395 0
-	mov	x0, x27
-.LVL418:
-	bl	rockchip_secure_otp_check_flag.isra.0
-.LVL419:
+.LVL365:
 	mov	w26, w0
-.LVL420:
-	.loc 1 396 0
-	tbz	w0, #31, .L109
-	.loc 1 397 0
-	adrp	x0, .LC15
-.LVL421:
-	mov	x1, x20
-	add	x0, x0, :lo12:.LC15
-	b	.L116
-.LVL422:
-.L109:
-.LBB377:
-	.loc 1 401 0
+.LVL366:
+	.loc 1 839 0
+	tbz	w0, #31, .L99
+	.loc 1 840 0
+	adrp	x0, .LC12
+.LVL367:
+	mov	x1, x19
+	add	x0, x0, :lo12:.LC12
+	b	.L113
+.LVL368:
+.L99:
+.LBB315:
+	.loc 1 844 0
 #APP
-// 401 "drivers/misc/rockchip-secure-otp.c" 1
+// 844 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-.LVL423:
-	str	w28, [x0, 36]
-.LVL424:
-.LBE377:
-.LBB378:
-	.loc 1 402 0
+.LVL369:
+	mov	w1, -65534
+	str	w1, [x0, 36]
+.LVL370:
+.LBE315:
+.LBB316:
+	.loc 1 845 0
 #APP
-// 402 "drivers/misc/rockchip-secure-otp.c" 1
+// 845 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-	str	w21, [x0, 4096]
-.LVL425:
-.LBE378:
-.LBB379:
-	.loc 1 403 0
+	mov	w1, 192
+	str	w1, [x0, 4096]
+.LBE316:
+.LBB317:
+	.loc 1 846 0
+	and	w1, w24, 255
+.LVL371:
 #APP
-// 403 "drivers/misc/rockchip-secure-otp.c" 1
+// 846 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-	str	w25, [x0, 4100]
-.LVL426:
-.LBE379:
-.LBB380:
-	.loc 1 404 0
+.LBE317:
+.LBB318:
+	.loc 1 847 0
+	lsr	w24, w24, 8
+.LVL372:
+.LBE318:
+.LBB319:
+	.loc 1 846 0
+	str	w1, [x0, 4100]
+.LBE319:
+.LBB320:
+	.loc 1 847 0
 #APP
-// 404 "drivers/misc/rockchip-secure-otp.c" 1
+// 847 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x27]
-.LBE380:
-	.loc 1 405 0
-	mov	w1, w21
-.LBB381:
-	.loc 1 404 0
+	str	w24, [x0, 4104]
+.LVL373:
+.LBE320:
+.LBB321:
+	.loc 1 848 0
+#APP
+// 848 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LBE321:
+	.loc 1 849 0
+	mov	w1, w20
+.LVL374:
+.LBB322:
+	.loc 1 848 0
 	str	w22, [x0, 32]
-.LBE381:
-	.loc 1 405 0
+.LBE322:
+	.loc 1 849 0
 	mov	x0, x27
 	bl	rockchip_secure_otp_wait_status.isra.2
-.LVL427:
-	mov	w26, w0
-.LVL428:
-	.loc 1 406 0
-	tbz	w0, #31, .L110
-	.loc 1 407 0
-	adrp	x0, .LC16
-.LVL429:
-	mov	x1, x20
-	add	x0, x0, :lo12:.LC16
-	b	.L116
-.LVL430:
-.L110:
-	.loc 1 411 0
-	mov	x0, x27
-.LVL431:
-	bl	rockchip_secure_otp_wait_flag.isra.1
-.LVL432:
+.LVL375:
 	mov	w26, w0
-.LVL433:
-	.loc 1 412 0
-	tbz	w0, #31, .L103
-	.loc 1 413 0
-	adrp	x0, .LC17
-.LVL434:
-	mov	x1, x20
-	add	x0, x0, :lo12:.LC17
-	b	.L116
-.LBE385:
-.LBE389:
-	.cfi_endproc
+.LVL376:
+	.loc 1 850 0
+	tbz	w0, #31, .L100
+	.loc 1 851 0
+	adrp	x0, .LC13
+.LVL377:
+	mov	x1, x19
+	add	x0, x0, :lo12:.LC13
+	b	.L113
+.LVL378:
+.L100:
+.LBB323:
+	.loc 1 855 0
+#APP
+// 855 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LVL379:
+	mov	w1, 14848
+	movk	w1, 0xff00, lsl 16
+	str	w1, [x0, 32]
+.LVL380:
+.LBE323:
+.LBB324:
+	.loc 1 856 0
+#APP
+// 856 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, -65535
+	str	w1, [x0, 36]
+.LVL381:
+.LBE324:
+.LBB325:
+	.loc 1 857 0
+#APP
+// 857 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 255
+	str	w1, [x0, 4096]
+.LVL382:
+.LBE325:
+.LBB326:
+	.loc 1 858 0
+#APP
+// 858 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 10
+	str	w1, [x0, 4100]
+.LVL383:
+.LBE326:
+.LBB327:
+	.loc 1 859 0
+#APP
+// 859 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LBE327:
+	.loc 1 860 0
+	mov	w1, w20
+.LBB328:
+	.loc 1 859 0
+	str	w22, [x0, 32]
+.LBE328:
+	.loc 1 860 0
+	mov	x0, x27
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL384:
+	mov	w26, w0
+.LVL385:
+	.loc 1 861 0
+	tbz	w0, #31, .L101
+	.loc 1 862 0
+	adrp	x0, .LC14
+.LVL386:
+	mov	x1, x19
+	add	x0, x0, :lo12:.LC14
+	b	.L113
+.LVL387:
+.L101:
+.LBB329:
+	.loc 1 866 0
+#APP
+// 866 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LVL388:
+	mov	w1, -65534
+	str	w1, [x0, 36]
+.LVL389:
+.LBE329:
+.LBB330:
+	.loc 1 867 0
+#APP
+// 867 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 1
+	str	w1, [x0, 4096]
+.LVL390:
+.LBE330:
+.LBB331:
+	.loc 1 868 0
+#APP
+// 868 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w24, 191
+.LVL391:
+	str	w24, [x0, 4100]
+.LVL392:
+.LBE331:
+.LBB332:
+	.loc 1 869 0
+#APP
+// 869 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	wzr, [x0, 4104]
+.LVL393:
+.LBE332:
+.LBB333:
+	.loc 1 870 0
+#APP
+// 870 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LBE333:
+	.loc 1 871 0
+	mov	w1, w20
+.LBB334:
+	.loc 1 870 0
+	str	w22, [x0, 32]
+.LBE334:
+	.loc 1 871 0
+	mov	x0, x27
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL394:
+	mov	w26, w0
+.LVL395:
+	.loc 1 872 0
+	tbz	w0, #31, .L102
+	.loc 1 873 0
+	adrp	x0, .LC15
+.LVL396:
+	mov	x1, x19
+	add	x0, x0, :lo12:.LC15
+	b	.L113
+.LVL397:
+.L102:
+	.loc 1 877 0
+	mov	x0, x27
+.LVL398:
+	bl	rockchip_secure_otp_check_flag.isra.0
+.LVL399:
+	mov	w26, w0
+.LVL400:
+	.loc 1 878 0
+	tbz	w0, #31, .L103
+	.loc 1 879 0
+	adrp	x0, .LC6
+.LVL401:
+	mov	x1, x19
+	add	x0, x0, :lo12:.LC6
+	b	.L113
+.LVL402:
+.L103:
+.LBB335:
+	.loc 1 883 0
+#APP
+// 883 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LVL403:
+	mov	w1, -65535
+	str	w1, [x0, 36]
+.LVL404:
+.LBE335:
+.LBB336:
+	.loc 1 884 0
+#APP
+// 884 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	w20, [x0, 4096]
+.LVL405:
+.LBE336:
+.LBB337:
+	.loc 1 885 0
+#APP
+// 885 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	w24, [x0, 4100]
+.LVL406:
+.LBE337:
+.LBB338:
+	.loc 1 886 0
+#APP
+// 886 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LBE338:
+	.loc 1 887 0
+	mov	w1, w20
+.LBB339:
+	.loc 1 886 0
+	str	w22, [x0, 32]
+.LBE339:
+	.loc 1 887 0
+	mov	x0, x27
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL407:
+	mov	w26, w0
+.LVL408:
+	.loc 1 888 0
+	tbz	w0, #31, .L104
+	.loc 1 889 0
+	adrp	x0, .LC16
+.LVL409:
+	mov	x1, x19
+	add	x0, x0, :lo12:.LC16
+	b	.L113
+.LVL410:
+.L104:
+	.loc 1 893 0
+	mov	x0, x27
+.LVL411:
+	bl	rockchip_secure_otp_wait_flag.isra.1
+.LVL412:
+	mov	w26, w0
+.LVL413:
+	.loc 1 894 0
+	tbz	w0, #31, .L97
+	.loc 1 895 0
+	adrp	x0, .LC7
+.LVL414:
+	mov	x1, x19
+	add	x0, x0, :lo12:.LC7
+	b	.L113
+.LBE343:
+.LBE350:
+	.cfi_endproc
+.LFE283:
+	.size	rk3568_secure_otp_write, .-rk3568_secure_otp_write
+	.section	.text.rockchip_secure_otp_read,"ax",@progbits
+	.align	2
+	.type	rockchip_secure_otp_read, %function
+rockchip_secure_otp_read:
+.LFB276:
+	.loc 1 222 0
+	.cfi_startproc
+.LVL415:
+	stp	x29, x30, [sp, -80]!
+	.cfi_def_cfa_offset 80
+	.cfi_offset 29, -80
+	.cfi_offset 30, -72
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -64
+	.cfi_offset 20, -56
+	mov	w20, w1
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -32
+	.cfi_offset 24, -24
+	mov	w24, w3
+	stp	x21, x22, [sp, 32]
+	mov	x23, x0
+	.cfi_offset 21, -48
+	.cfi_offset 22, -40
+	mov	x22, x2
+	str	x25, [sp, 64]
+	.cfi_offset 25, -16
+	.loc 1 223 0
+	bl	dev_get_platdata
+.LVL416:
+	mov	x19, x0
+.LVL417:
+	.loc 1 224 0
+	mov	x0, x23
+.LVL418:
+	bl	dev_get_driver_data
+.LVL419:
+	.loc 1 230 0
+	ldr	x4, [x0, 16]
+	.loc 1 224 0
+	mov	x25, x0
+.LVL420:
+	.loc 1 230 0
+	ldr	x1, [x19, 24]
+	mov	w3, w20
+	ldp	x0, x2, [x19, 8]
+.LVL421:
+	blr	x4
+.LVL422:
+	.loc 1 233 0
+	mov	w1, 1
+	mov	x0, x19
+	bl	rockchip_secure_otp_ecc_enable
+.LVL423:
+.LBB351:
+	.loc 1 234 0
+#APP
+// 234 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x19]
+	mov	w23, 65537
+.LVL424:
+	add	w24, w24, w20
+.LVL425:
+.LBE351:
+	.loc 1 227 0
+	mov	w21, 0
+.LBB352:
+	.loc 1 234 0
+	str	w23, [x0, 256]
+.LBE352:
+	.loc 1 235 0
+	mov	x0, 50
+	bl	udelay
+.LVL426:
+.L115:
+	.loc 1 236 0
+	cmp	w20, w24
+	beq	.L119
+	.loc 1 238 0
+	cmp	w20, 448
+	bgt	.L121
+	.loc 1 241 0
+	sub	w1, w20, #16
+	cmp	w20, 0
+	mov	w0, w20
+	ccmp	w1, 31, 0, ne
+	bls	.L117
+	.loc 1 241 0 is_stmt 0 discriminator 1
+	sub	w1, w20, #128
+	cmp	w1, 263
+	bls	.L117
+	.loc 1 244 0 is_stmt 1
+	adrp	x0, .LC17
+	add	x0, x0, :lo12:.LC17
+	bl	printf
+.LVL427:
+.L121:
+	.loc 1 239 0
+	mov	w21, -1
+.LVL428:
+	b	.L114
+.LVL429:
+.L117:
+.LBB353:
+	.loc 1 248 0
+	add	w20, w20, 1
+.LVL430:
+	orr	w0, w0, -65536
+.LVL431:
+#APP
+// 248 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x1, [x19]
+	str	w0, [x1, 260]
+.LVL432:
+.LBE353:
+.LBB354:
+	.loc 1 250 0
+#APP
+// 250 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x19]
+.LVL433:
+.LBE354:
+	.loc 1 252 0
+	mov	w1, 4
+.LVL434:
+.LBB355:
+	.loc 1 250 0
+	str	w23, [x0, 264]
+.LVL435:
+.LBE355:
+	.loc 1 252 0
+	mov	x0, x19
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL436:
+	mov	w21, w0
+.LVL437:
+	.loc 1 253 0
+	tbz	w0, #31, .L118
+	.loc 1 254 0
+	adrp	x1, .LANCHOR5
+	adrp	x0, .LC9
+.LVL438:
+	add	x1, x1, :lo12:.LANCHOR5
+	add	x0, x0, :lo12:.LC9
+	bl	printf
+.LVL439:
+.L119:
+.LBB356:
+	.loc 1 271 0
+#APP
+// 271 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x19]
+	mov	w1, 65536
+.LBE356:
+	.loc 1 273 0
+	ldr	x2, [x19, 16]
+	mov	w3, w20
+	ldr	x4, [x25, 24]
+.LBB357:
+	.loc 1 271 0
+	str	w1, [x0, 256]
+.LBE357:
+	.loc 1 273 0
+	ldr	x0, [x19, 8]
+	ldr	x1, [x19, 24]
+	blr	x4
+.LVL440:
+.L114:
+	.loc 1 278 0
+	mov	w0, w21
+	ldr	x25, [sp, 64]
+.LVL441:
+	ldp	x19, x20, [sp, 16]
+.LVL442:
+	ldp	x21, x22, [sp, 32]
+.LVL443:
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 25
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL444:
+.L118:
+	.cfi_restore_state
+.LBB358:
+	.loc 1 258 0
+	ldr	x0, [x19]
+.LVL445:
+	ldrb	w0, [x0, 292]
+	and	w0, w0, 255
+.LVL446:
+#APP
+// 258 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+.LVL447:
+#NO_APP
+.LBE358:
+	.loc 1 267 0
+	strb	w0, [x22], 1
+.LVL448:
+	b	.L115
+	.cfi_endproc
+.LFE276:
+	.size	rockchip_secure_otp_read, .-rockchip_secure_otp_read
+	.section	.text.rockchip_secure_otp_write,"ax",@progbits
+	.align	2
+	.type	rockchip_secure_otp_write, %function
+rockchip_secure_otp_write:
+.LFB278:
+	.loc 1 428 0
+	.cfi_startproc
+.LVL449:
+	stp	x29, x30, [sp, -128]!
+	.cfi_def_cfa_offset 128
+	.cfi_offset 29, -128
+	.cfi_offset 30, -120
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -112
+	.cfi_offset 20, -104
+	mov	w19, w1
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -80
+	.cfi_offset 24, -72
+	mov	w24, w3
+	stp	x27, x28, [sp, 80]
+	stp	x21, x22, [sp, 32]
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 27, -48
+	.cfi_offset 28, -40
+	.cfi_offset 21, -96
+	.cfi_offset 22, -88
+	.cfi_offset 25, -64
+	.cfi_offset 26, -56
+	.loc 1 428 0
+	stp	x2, x0, [x29, 104]
+	.loc 1 429 0
+	bl	dev_get_platdata
+.LVL450:
+	mov	x27, x0
+.LVL451:
+	.loc 1 431 0
+	sxtw	x0, w24
+.LVL452:
+	bl	malloc_simple
+.LVL453:
+	.loc 1 434 0
+	cbnz	x0, .L124
+.LVL454:
+.L148:
+.LBB420:
+.LBB421:
+	.loc 1 295 0
+	mov	w26, -1
+.L123:
+.LBE421:
+.LBE420:
+	.loc 1 461 0
+	mov	w0, w26
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+.LVL455:
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+.LVL456:
+	ldp	x29, x30, [sp], 128
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+.LVL457:
+	ret
+.LVL458:
+.L124:
+	.cfi_restore_state
+	mov	x20, x0
+	.loc 1 437 0
+	mov	x2, x0
+	ldr	x0, [x29, 112]
+.LVL459:
+	mov	w3, w24
+	mov	w1, w19
+	bl	rockchip_secure_otp_read
+.LVL460:
+	.loc 1 438 0
+	cbnz	w0, .L148
+	mov	x0, 0
+.LVL461:
+.L128:
+	.loc 1 443 0 discriminator 1
+	cmp	w24, w0
+	bgt	.L129
+.LBB493:
+.LBB489:
+	.loc 1 413 0
+	adrp	x20, .LANCHOR6
+.LVL462:
+	add	x20, x20, :lo12:.LANCHOR6
+.LBE489:
+.LBE493:
+	.loc 1 443 0
+	mov	x23, 0
+.LVL463:
+.L130:
+	.loc 1 453 0 discriminator 1
+	cmp	w24, w23
+	bgt	.L143
+	mov	w26, 0
+	b	.L123
+.LVL464:
+.L129:
+	add	x0, x0, 1
+.LVL465:
+	.loc 1 444 0
+	add	x1, x20, x0
+	ldrb	w1, [x1, -1]
+	cbz	w1, .L128
+	.loc 1 445 0
+	adrp	x0, .LC18
+	add	x0, x0, :lo12:.LC18
+.LVL466:
+.L149:
+.LBB494:
+.LBB490:
+	.loc 1 295 0
+	bl	printf
+.LVL467:
+	b	.L148
+.LVL468:
+.L143:
+.LBE490:
+.LBE494:
+	.loc 1 454 0
+	ldr	x0, [x29, 104]
+	ldrb	w28, [x0, x23]
+.LVL469:
+.LBB495:
+.LBB491:
+	.loc 1 285 0
+	ldr	x0, [x29, 112]
+	bl	dev_get_driver_data
+.LVL470:
+	str	x0, [x29, 120]
+.LVL471:
+	.loc 1 288 0
+	cmp	w19, 448
+	bgt	.L148
+	.loc 1 292 0
+	sub	w0, w19, #16
+.LVL472:
+	cmp	w19, 0
+	ccmp	w0, 31, 0, ne
+	bls	.L131
+	sub	w0, w19, #128
+	cmp	w0, 263
+	bls	.L131
+	.loc 1 295 0
+	adrp	x0, .LC17
+	add	x0, x0, :lo12:.LC17
+	b	.L149
+.L131:
+	.loc 1 299 0
+	cbnz	w28, .L132
+.LVL473:
+.L142:
+	add	x23, x23, 1
+	add	w19, w19, 1
+	b	.L130
+.LVL474:
+.L132:
+	.loc 1 302 0
+	ldr	x0, [x29, 120]
+	mov	w3, w19
+	ldp	x2, x1, [x27, 16]
+	ldr	x5, [x0, 16]
+	ldr	x0, [x27, 8]
+	blr	x5
+.LVL475:
+.LBB422:
+	.loc 1 305 0
+#APP
+// 305 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 262148
+	str	w1, [x0, 32]
+.LVL476:
+.LBE422:
+.LBB423:
+	.loc 1 306 0
+#APP
+// 306 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, -65536
+	str	w1, [x0, 40]
+.LVL477:
+.LBE423:
+.LBB424:
+	.loc 1 307 0
+#APP
+// 307 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 512
+	movk	w1, 0xff00, lsl 16
+	str	w1, [x0, 32]
+.LVL478:
+.LBE424:
+.LBB425:
+	.loc 1 308 0
+#APP
+// 308 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, -65522
+	str	w1, [x0, 36]
+.LVL479:
+.LBE425:
+.LBB426:
+	.loc 1 309 0
+#APP
+// 309 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w2, 240
+	str	w2, [x29, 100]
+.LVL480:
+	str	w2, [x0, 4096]
+.LBE426:
+.LBB427:
+	.loc 1 310 0
+#APP
+// 310 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w25, 1
+	str	w25, [x0, 4100]
+.LVL481:
+.LBE427:
+.LBB428:
+	.loc 1 311 0
+#APP
+// 311 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w21, 122
+	str	w21, [x0, 4104]
+.LVL482:
+.LBE428:
+.LBB429:
+	.loc 1 312 0
+#APP
+// 312 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 37
+	str	w1, [x0, 4108]
+.LVL483:
+.LBE429:
+.LBB430:
+	.loc 1 313 0
+#APP
+// 313 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 4
+	str	w1, [x0, 4112]
+.LVL484:
+.LBE430:
+.LBB431:
+	.loc 1 314 0
+#APP
+// 314 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	wzr, [x0, 4116]
+.LVL485:
+.LBE431:
+.LBB432:
+	.loc 1 315 0
+#APP
+// 315 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	wzr, [x0, 4120]
+.LVL486:
+.LBE432:
+.LBB433:
+	.loc 1 316 0
+#APP
+// 316 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	wzr, [x0, 4124]
+.LVL487:
+.LBE433:
+.LBB434:
+	.loc 1 317 0
+#APP
+// 317 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 11
+	str	w1, [x0, 4128]
+.LVL488:
+.LBE434:
+.LBB435:
+	.loc 1 318 0
+#APP
+// 318 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 8
+	str	w1, [x0, 4132]
+.LVL489:
+.LBE435:
+.LBB436:
+	.loc 1 319 0
+#APP
+// 319 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	wzr, [x0, 4136]
+.LVL490:
+.LBE436:
+.LBB437:
+	.loc 1 320 0
+#APP
+// 320 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	wzr, [x0, 4140]
+.LVL491:
+.LBE437:
+.LBB438:
+	.loc 1 321 0
+#APP
+// 321 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	wzr, [x0, 4144]
+.LBE438:
+.LBB439:
+	.loc 1 322 0
+	and	w0, w19, 255
+#APP
+// 322 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x1, [x27]
+	str	w0, [x1, 4148]
+.LBE439:
+.LBB440:
+	.loc 1 323 0
+	ubfx	x1, x19, 8, 8
+.LVL492:
+#APP
+// 323 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	w1, [x0, 4152]
+.LVL493:
+.LBE440:
+.LBB441:
+	.loc 1 324 0
+#APP
+// 324 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w22, 65537
+.LBE441:
+	.loc 1 325 0
+	mov	w1, 2
+.LVL494:
+.LBB442:
+	.loc 1 324 0
+	str	w22, [x0, 32]
+.LVL495:
+.LBE442:
+	.loc 1 325 0
+	mov	x0, x27
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL496:
+	mov	w26, w0
+.LVL497:
+	.loc 1 326 0
+	ldr	w2, [x29, 100]
+	tbz	w0, #31, .L133
+	.loc 1 327 0
+	adrp	x0, .LC5
+.LVL498:
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC5
+.LVL499:
+.L147:
+	.loc 1 413 0
+	bl	printf
+.LVL500:
+.L134:
+.LBB443:
+	.loc 1 418 0
+#APP
+// 418 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, -65533
+.LBE443:
+	.loc 1 419 0
+	ldr	x2, [x27, 16]
+	mov	w3, w19
+.LBB444:
+	.loc 1 418 0
+	str	w1, [x0, 772]
+.LBE444:
+	.loc 1 419 0
+	ldr	x0, [x29, 120]
+	ldr	x1, [x27, 24]
+	ldr	x6, [x0, 24]
+	ldr	x0, [x27, 8]
+	blr	x6
+.LVL501:
+.LBE491:
+.LBE495:
+	.loc 1 455 0
+	cbz	w26, .L142
+	b	.L123
+.LVL502:
+.L133:
+.LBB496:
+.LBB492:
+.LBB445:
+	.loc 1 331 0
+#APP
+// 331 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LVL503:
+	mov	w1, 14848
+	movk	w1, 0xff00, lsl 16
+	str	w1, [x0, 32]
+.LVL504:
+.LBE445:
+.LBB446:
+	.loc 1 332 0
+#APP
+// 332 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	w2, [x0, 4096]
+.LVL505:
+.LBE446:
+.LBB447:
+	.loc 1 333 0
+#APP
+// 333 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	w25, [x0, 4100]
+.LVL506:
+.LBE447:
+.LBB448:
+	.loc 1 334 0
+#APP
+// 334 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	w21, [x0, 4104]
+.LVL507:
+.LBE448:
+.LBB449:
+	.loc 1 335 0
+#APP
+// 335 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 21
+	str	w1, [x0, 4108]
+.LVL508:
+.LBE449:
+.LBB450:
+	.loc 1 336 0
+#APP
+// 336 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 220
+	str	w1, [x0, 4112]
+.LVL509:
+.LBE450:
+.LBB451:
+	.loc 1 337 0
+#APP
+// 337 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 146
+	str	w1, [x0, 4116]
+.LVL510:
+.LBE451:
+.LBB452:
+	.loc 1 338 0
+#APP
+// 338 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 121
+	str	w1, [x0, 4120]
+.LVL511:
+.LBE452:
+.LBB453:
+	.loc 1 339 0
+#APP
+// 339 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 129
+	str	w1, [x0, 4124]
+.LVL512:
+.LBE453:
+.LBB454:
+	.loc 1 340 0
+#APP
+// 340 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 126
+	str	w1, [x0, 4128]
+.LVL513:
+.LBE454:
+.LBB455:
+	.loc 1 341 0
+#APP
+// 341 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 33
+	str	w1, [x0, 4132]
+.LVL514:
+.LBE455:
+.LBB456:
+	.loc 1 342 0
+#APP
+// 342 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 17
+	str	w1, [x0, 4136]
+.LVL515:
+.LBE456:
+.LBB457:
+	.loc 1 343 0
+#APP
+// 343 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 157
+	str	w1, [x0, 4140]
+.LVL516:
+.LBE457:
+.LBB458:
+	.loc 1 344 0
+#APP
+// 344 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w21, 2
+	str	w21, [x0, 4144]
+.LVL517:
+.LBE458:
+.LBB459:
+	.loc 1 345 0
+#APP
+// 345 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	wzr, [x0, 4148]
+.LVL518:
+.LBE459:
+.LBB460:
+	.loc 1 346 0
+#APP
+// 346 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	wzr, [x0, 4152]
+.LVL519:
+.LBE460:
+.LBB461:
+	.loc 1 347 0
+#APP
+// 347 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LBE461:
+	.loc 1 348 0
+	mov	w1, w21
+.LBB462:
+	.loc 1 347 0
+	str	w22, [x0, 32]
+.LBE462:
+	.loc 1 348 0
+	mov	x0, x27
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL520:
+	mov	w26, w0
+.LVL521:
+	.loc 1 349 0
+	tbz	w0, #31, .L135
+	.loc 1 350 0
+	adrp	x0, .LC11
+.LVL522:
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC11
+	b	.L147
+.LVL523:
+.L135:
+.LBB463:
+	.loc 1 354 0
+#APP
+// 354 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LVL524:
+	mov	w1, 512
+	movk	w1, 0xff00, lsl 16
+	str	w1, [x0, 32]
+.LVL525:
+.LBE463:
+.LBB464:
+	.loc 1 355 0
+#APP
+// 355 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, -65535
+	str	w1, [x0, 36]
+.LVL526:
+.LBE464:
+.LBB465:
+	.loc 1 356 0
+#APP
+// 356 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 251
+	str	w1, [x0, 4096]
+.LVL527:
+.LBE465:
+.LBB466:
+	.loc 1 357 0
+#APP
+// 357 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	wzr, [x0, 4100]
+.LVL528:
+.LBE466:
+.LBB467:
+	.loc 1 358 0
+#APP
+// 358 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LBE467:
+	.loc 1 359 0
+	mov	w1, w21
+.LBB468:
+	.loc 1 358 0
+	str	w22, [x0, 32]
+.LBE468:
+	.loc 1 359 0
+	mov	x0, x27
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL529:
+	mov	w26, w0
+.LVL530:
+	.loc 1 360 0
+	tbz	w0, #31, .L136
+	.loc 1 361 0
+	adrp	x0, .LC12
+.LVL531:
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC12
+	b	.L147
+.LVL532:
+.L136:
+.LBB469:
+	.loc 1 365 0
+#APP
+// 365 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LVL533:
+	mov	w1, 192
+	str	w1, [x0, 4096]
+.LVL534:
+.LBE469:
+.LBB470:
+	.loc 1 366 0
+#APP
+// 366 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	w28, [x0, 4100]
+.LVL535:
+.LBE470:
+.LBB471:
+	.loc 1 367 0
+#APP
+// 367 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LBE471:
+	.loc 1 368 0
+	mov	w1, w21
+.LBB472:
+	.loc 1 367 0
+	str	w22, [x0, 32]
+.LBE472:
+	.loc 1 368 0
+	mov	x0, x27
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL536:
+	mov	w26, w0
+.LVL537:
+	.loc 1 369 0
+	tbz	w0, #31, .L137
+	.loc 1 370 0
+	adrp	x0, .LC13
+.LVL538:
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC13
+	b	.L147
+.LVL539:
+.L137:
+.LBB473:
+	.loc 1 374 0
+#APP
+// 374 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LVL540:
+	mov	w1, 14848
+	movk	w1, 0xff00, lsl 16
+	str	w1, [x0, 32]
+.LVL541:
+.LBE473:
+.LBB474:
+	.loc 1 375 0
+#APP
+// 375 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 255
+	str	w1, [x0, 4096]
+.LVL542:
+.LBE474:
+.LBB475:
+	.loc 1 376 0
+#APP
+// 376 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 10
+	str	w1, [x0, 4100]
+.LVL543:
+.LBE475:
+.LBB476:
+	.loc 1 377 0
+#APP
+// 377 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LBE476:
+	.loc 1 378 0
+	mov	w1, w21
+.LBB477:
+	.loc 1 377 0
+	str	w22, [x0, 32]
+.LBE477:
+	.loc 1 378 0
+	mov	x0, x27
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL544:
+	mov	w26, w0
+.LVL545:
+	.loc 1 379 0
+	tbz	w0, #31, .L138
+	.loc 1 380 0
+	adrp	x0, .LC14
+.LVL546:
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC14
+	b	.L147
+.LVL547:
+.L138:
+.LBB478:
+	.loc 1 384 0
+#APP
+// 384 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LVL548:
+	mov	w28, -65534
+.LVL549:
+	str	w28, [x0, 36]
+.LVL550:
+.LBE478:
+.LBB479:
+	.loc 1 385 0
+#APP
+// 385 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	w25, [x0, 4096]
+.LVL551:
+.LBE479:
+.LBB480:
+	.loc 1 386 0
+#APP
+// 386 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w25, 191
+	str	w25, [x0, 4100]
+.LVL552:
+.LBE480:
+.LBB481:
+	.loc 1 387 0
+#APP
+// 387 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	wzr, [x0, 4104]
+.LVL553:
+.LBE481:
+.LBB482:
+	.loc 1 388 0
+#APP
+// 388 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LBE482:
+	.loc 1 389 0
+	mov	w1, w21
+.LBB483:
+	.loc 1 388 0
+	str	w22, [x0, 32]
+.LBE483:
+	.loc 1 389 0
+	mov	x0, x27
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL554:
+	mov	w26, w0
+.LVL555:
+	.loc 1 390 0
+	tbz	w0, #31, .L139
+	.loc 1 391 0
+	adrp	x0, .LC15
+.LVL556:
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC15
+	b	.L147
+.LVL557:
+.L139:
+	.loc 1 395 0
+	mov	x0, x27
+.LVL558:
+	bl	rockchip_secure_otp_check_flag.isra.0
+.LVL559:
+	mov	w26, w0
+.LVL560:
+	.loc 1 396 0
+	tbz	w0, #31, .L140
+	.loc 1 397 0
+	adrp	x0, .LC6
+.LVL561:
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC6
+	b	.L147
+.LVL562:
+.L140:
+.LBB484:
+	.loc 1 401 0
+#APP
+// 401 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LVL563:
+	str	w28, [x0, 36]
+.LVL564:
+.LBE484:
+.LBB485:
+	.loc 1 402 0
+#APP
+// 402 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	w21, [x0, 4096]
+.LVL565:
+.LBE485:
+.LBB486:
+	.loc 1 403 0
+#APP
+// 403 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	w25, [x0, 4100]
+.LVL566:
+.LBE486:
+.LBB487:
+	.loc 1 404 0
+#APP
+// 404 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LBE487:
+	.loc 1 405 0
+	mov	w1, w21
+.LBB488:
+	.loc 1 404 0
+	str	w22, [x0, 32]
+.LBE488:
+	.loc 1 405 0
+	mov	x0, x27
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL567:
+	mov	w26, w0
+.LVL568:
+	.loc 1 406 0
+	tbz	w0, #31, .L141
+	.loc 1 407 0
+	adrp	x0, .LC16
+.LVL569:
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC16
+	b	.L147
+.LVL570:
+.L141:
+	.loc 1 411 0
+	mov	x0, x27
+.LVL571:
+	bl	rockchip_secure_otp_wait_flag.isra.1
+.LVL572:
+	mov	w26, w0
+.LVL573:
+	.loc 1 412 0
+	tbz	w0, #31, .L134
+	.loc 1 413 0
+	adrp	x0, .LC7
+.LVL574:
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC7
+	b	.L147
+.LBE492:
+.LBE496:
+	.cfi_endproc
 .LFE278:
 	.size	rockchip_secure_otp_write, .-rockchip_secure_otp_write
 	.global	_u_boot_list_2_driver_2_rockchip_secure_otp
-	.section	.rodata.__func__.7452,"a",@progbits
+	.section	.rodata.__func__.7513,"a",@progbits
 	.align	3
 	.set	.LANCHOR0,. + 0
-	.type	__func__.7452, %object
-	.size	__func__.7452, 32
-__func__.7452:
+	.type	__func__.7513, %object
+	.size	__func__.7513, 32
+__func__.7513:
 	.string	"rockchip_secure_otp_wait_status"
-	.section	.rodata.__func__.7495,"a",@progbits
+	.section	.rodata.__func__.7556,"a",@progbits
 	.align	3
-	.set	.LANCHOR1,. + 0
-	.type	__func__.7495, %object
-	.size	__func__.7495, 31
-__func__.7495:
+	.set	.LANCHOR2,. + 0
+	.type	__func__.7556, %object
+	.size	__func__.7556, 31
+__func__.7556:
 	.string	"rockchip_secure_otp_ecc_enable"
-	.section	.rodata.__func__.7513,"a",@progbits
+	.section	.rodata.__func__.7574,"a",@progbits
 	.align	3
-	.set	.LANCHOR3,. + 0
-	.type	__func__.7513, %object
-	.size	__func__.7513, 25
-__func__.7513:
+	.set	.LANCHOR5,. + 0
+	.type	__func__.7574, %object
+	.size	__func__.7574, 25
+__func__.7574:
 	.string	"rockchip_secure_otp_read"
-	.section	.rodata.__func__.7570,"a",@progbits
+	.section	.rodata.__func__.7631,"a",@progbits
 	.align	3
-	.set	.LANCHOR5,. + 0
-	.type	__func__.7570, %object
-	.size	__func__.7570, 31
-__func__.7570:
+	.set	.LANCHOR6,. + 0
+	.type	__func__.7631, %object
+	.size	__func__.7631, 31
+__func__.7631:
 	.string	"rockchip_secure_otp_write_byte"
-	.section	.rodata.__func__.7684,"a",@progbits
+	.section	.rodata.__func__.7745,"a",@progbits
 	.align	3
-	.set	.LANCHOR2,. + 0
-	.type	__func__.7684, %object
-	.size	__func__.7684, 23
-__func__.7684:
+	.set	.LANCHOR3,. + 0
+	.type	__func__.7745, %object
+	.size	__func__.7745, 23
+__func__.7745:
 	.string	"rk3568_secure_otp_read"
-	.section	.rodata.__func__.7743,"a",@progbits
+	.section	.rodata.__func__.7780,"a",@progbits
+	.align	3
+	.set	.LANCHOR1,. + 0
+	.type	__func__.7780, %object
+	.size	__func__.7780, 38
+__func__.7780:
+	.string	"rk3568_secure_otp_write_2_bytes_noecc"
+	.section	.rodata.__func__.8001,"a",@progbits
 	.align	3
 	.set	.LANCHOR4,. + 0
-	.type	__func__.7743, %object
-	.size	__func__.7743, 32
-__func__.7743:
+	.type	__func__.8001, %object
+	.size	__func__.8001, 32
+__func__.8001:
 	.string	"rk3568_secure_otp_write_2_bytes"
 	.section	.rodata.px30_data,"a",@progbits
 	.align	3
@@ -3709,51 +5170,50 @@ rk3568_data:
 	.xword	rk3568_spl_rockchip_otp_start
 	.xword	rk3568_spl_rockchip_otp_stop
 	.section	.rodata.rk3568_secure_otp_read.str1.1,"aMS",@progbits,1
-.LC5:
-	.string	"Please input correct addr\n"
-.LC6:
+.LC9:
 	.string	"%s timeout during read setup\n"
 	.section	.rodata.rk3568_secure_otp_write.str1.1,"aMS",@progbits,1
-.LC7:
-	.string	"Please enter the size of multiple of 2\n"
-.LC8:
-	.string	"The zone is written.\n"
-.LC9:
-	.string	"%s timeout during write setup 1\n"
 .LC10:
-	.string	"%s timeout during write setup 2\n"
+	.string	"Please enter the size of multiple of 2\n"
 .LC11:
-	.string	"%s timeout during write setup 3\n"
+	.string	"%s timeout during write setup 2\n"
 .LC12:
-	.string	"%s timeout during write setup 4\n"
+	.string	"%s timeout during write setup 3\n"
 .LC13:
-	.string	"%s timeout during write setup 5\n"
+	.string	"%s timeout during write setup 4\n"
 .LC14:
-	.string	"%s timeout during write setup 6\n"
+	.string	"%s timeout during write setup 5\n"
 .LC15:
-	.string	"%s timeout during write setup 7\n"
+	.string	"%s timeout during write setup 6\n"
 .LC16:
 	.string	"%s timeout during write setup 8\n"
-.LC17:
+	.section	.rodata.rk3568_secure_otp_write_2_bytes_noecc.str1.1,"aMS",@progbits,1
+.LC4:
+	.string	"Please input correct addr, offset is %x\n"
+.LC5:
+	.string	"%s timeout during write setup 1\n"
+.LC6:
+	.string	"%s timeout during write setup 7\n"
+.LC7:
 	.string	"%s timeout during write setup 9\n"
 	.section	.rodata.rockchip_otp_ids,"a",@progbits
 	.align	3
 	.type	rockchip_otp_ids, %object
 	.size	rockchip_otp_ids, 96
 rockchip_otp_ids:
-	.xword	.LC19
-	.xword	rk3308_data
 	.xword	.LC20
-	.xword	rk3328_data
+	.xword	rk3308_data
 	.xword	.LC21
-	.xword	px30_data
+	.xword	rk3328_data
 	.xword	.LC22
 	.xword	px30_data
 	.xword	.LC23
+	.xword	px30_data
+	.xword	.LC24
 	.xword	rk3568_data
 	.zero	16
-	.section	.rodata.rockchip_secure_otp_ecc_enable.constprop.5.str1.1,"aMS",@progbits,1
-.LC4:
+	.section	.rodata.rockchip_secure_otp_ecc_enable.str1.1,"aMS",@progbits,1
+.LC8:
 	.string	"%s timeout during ecc_enable\n"
 	.section	.rodata.rockchip_secure_otp_ofdata_to_platdata.str1.1,"aMS",@progbits,1
 .LC0:
@@ -3771,28 +5231,34 @@ rockchip_secure_otp_ops:
 	.xword	secure_otp_write
 	.xword	secure_otp_ioctl
 	.zero	8
+	.section	.rodata.rockchip_secure_otp_read.str1.1,"aMS",@progbits,1
+.LC17:
+	.string	"Please input correct addr\n"
 	.section	.rodata.rockchip_secure_otp_wait_status.isra.2.str1.1,"aMS",@progbits,1
 .LC3:
 	.string	"%s: wait init status timeout\n"
-	.section	.rodata.str1.1,"aMS",@progbits,1
+	.section	.rodata.rockchip_secure_otp_write.str1.1,"aMS",@progbits,1
 .LC18:
-	.string	"rockchip_secure_otp"
+	.string	"The zone is written.\n"
+	.section	.rodata.str1.1,"aMS",@progbits,1
 .LC19:
-	.string	"rockchip,rk3308-secure-otp"
+	.string	"rockchip_secure_otp"
 .LC20:
-	.string	"rockchip,rk3328-secure-otp"
+	.string	"rockchip,rk3308-secure-otp"
 .LC21:
-	.string	"rockchip,rk3326-secure-otp"
+	.string	"rockchip,rk3328-secure-otp"
 .LC22:
-	.string	"rockchip,px30-secure-otp"
+	.string	"rockchip,rk3326-secure-otp"
 .LC23:
+	.string	"rockchip,px30-secure-otp"
+.LC24:
 	.string	"rockchip,rk3568-secure-otp"
 	.section	.u_boot_list_2_driver_2_rockchip_secure_otp,"aw",@progbits
 	.align	2
 	.type	_u_boot_list_2_driver_2_rockchip_secure_otp, %object
 	.size	_u_boot_list_2_driver_2_rockchip_secure_otp, 120
 _u_boot_list_2_driver_2_rockchip_secure_otp:
-	.8byte	.LC18
+	.8byte	.LC19
 	.word	36
 	.zero	4
 	.8byte	rockchip_otp_ids
@@ -3823,4782 +5289,6335 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.file 17 "include/linux/../../scripts/dtc/libfdt/fdt.h"
 	.file 18 "include/linux/libfdt.h"
 	.file 19 "include/image.h"
-	.file 20 "./arch/arm/include/asm/global_data.h"
-	.file 21 "include/asm-generic/global_data.h"
-	.file 22 "include/dm/of.h"
-	.file 23 "include/net.h"
-	.file 24 "include/dm/uclass-id.h"
-	.file 25 "include/dm/ofnode.h"
-	.file 26 "include/malloc.h"
-	.file 27 "include/linux/compat.h"
-	.file 28 "include/dm/uclass.h"
-	.file 29 "include/asm-generic/ioctl.h"
-	.file 30 "include/misc.h"
-	.file 31 "include/rockchip-otp.h"
-	.file 32 "include/dm/read.h"
-	.file 33 "include/stdio.h"
-	.file 34 "include/linux/delay.h"
-	.file 35 "include/log.h"
+	.file 20 "include/u-boot/sha1.h"
+	.file 21 "include/u-boot/sha256.h"
+	.file 22 "./arch/arm/include/asm/global_data.h"
+	.file 23 "include/asm-generic/global_data.h"
+	.file 24 "include/dm/of.h"
+	.file 25 "include/net.h"
+	.file 26 "include/dm/uclass-id.h"
+	.file 27 "include/dm/ofnode.h"
+	.file 28 "include/malloc.h"
+	.file 29 "include/linux/compat.h"
+	.file 30 "include/dm/uclass.h"
+	.file 31 "include/asm-generic/ioctl.h"
+	.file 32 "include/misc.h"
+	.file 33 "include/rockchip-otp.h"
+	.file 34 "include/dm/read.h"
+	.file 35 "include/stdio.h"
+	.file 36 "include/linux/delay.h"
+	.file 37 "include/log.h"
 	.section	.debug_info,"",@progbits
 .Ldebug_info0:
-	.4byte	0x477e
+	.4byte	0x57da
 	.2byte	0x4
 	.4byte	.Ldebug_abbrev0
 	.byte	0x8
-	.uleb128 0x1
-	.4byte	.LASF468
-	.byte	0xc
-	.4byte	.LASF469
-	.4byte	.LASF470
-	.4byte	.Ldebug_ranges0+0x570
-	.8byte	0
-	.4byte	.Ldebug_line0
-	.uleb128 0x2
-	.4byte	.LASF4
-	.byte	0x2
-	.byte	0xd
-	.4byte	0x34
-	.uleb128 0x3
-	.byte	0x1
+	.uleb128 0x1
+	.4byte	.LASF477
+	.byte	0xc
+	.4byte	.LASF478
+	.4byte	.LASF479
+	.4byte	.Ldebug_ranges0+0x950
+	.8byte	0
+	.4byte	.Ldebug_line0
+	.uleb128 0x2
+	.4byte	.LASF4
+	.byte	0x2
+	.byte	0xd
+	.4byte	0x34
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x8
+	.4byte	.LASF0
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF1
+	.uleb128 0x3
+	.byte	0x2
+	.byte	0x7
+	.4byte	.LASF2
+	.uleb128 0x4
+	.4byte	.LASF21
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+	.byte	0xc
+	.4byte	0x54
+	.uleb128 0x5
+	.byte	0x4
+	.byte	0x5
+	.string	"int"
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x6
+	.4byte	.LASF3
+	.uleb128 0x2
+	.4byte	.LASF5
+	.byte	0x3
+	.byte	0xc
+	.4byte	0x34
+	.uleb128 0x3
+	.byte	0x2
+	.byte	0x5
+	.4byte	.LASF6
+	.uleb128 0x2
+	.4byte	.LASF7
+	.byte	0x3
+	.byte	0x12
+	.4byte	0x7f
+	.uleb128 0x3
+	.byte	0x4
+	.byte	0x7
+	.4byte	.LASF8
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x5
+	.4byte	.LASF9
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF10
+	.uleb128 0x6
+	.string	"u8"
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+	.byte	0x1f
+	.4byte	0x34
+	.uleb128 0x7
+	.4byte	0x94
+	.uleb128 0x6
+	.string	"u16"
+	.byte	0x3
+	.byte	0x22
+	.4byte	0x42
+	.uleb128 0x6
+	.string	"u32"
+	.byte	0x3
+	.byte	0x25
+	.4byte	0x7f
+	.uleb128 0x6
+	.string	"u64"
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+	.byte	0x28
+	.4byte	0x8d
+	.uleb128 0x2
+	.4byte	.LASF11
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+	.byte	0x31
+	.4byte	0x8d
+	.uleb128 0x2
+	.4byte	.LASF12
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+	.4byte	0x8d
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x7
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+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0xee
+	.uleb128 0x3
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+	.uleb128 0x7
+	.4byte	0xe7
+	.uleb128 0x3
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+	.byte	0x5
+	.4byte	.LASF15
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0xe7
+	.uleb128 0x2
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+	.byte	0x59
+	.4byte	0x42
+	.uleb128 0x2
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+	.byte	0x4
+	.byte	0x5b
+	.4byte	0x3b
+	.uleb128 0x2
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+	.4byte	0x62
+	.uleb128 0x7
+	.4byte	0x116
+	.uleb128 0x2
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+	.byte	0x4
+	.byte	0x6b
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+	.uleb128 0x2
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+	.byte	0x97
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+	.uleb128 0x9
+	.byte	0x8
+	.uleb128 0x4
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+	.byte	0xb
+	.4byte	0xfa
+	.uleb128 0x3
+	.byte	0x1
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+	.4byte	0x15b
+	.uleb128 0xb
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+	.uleb128 0xc
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+	.uleb128 0xc
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+	.uleb128 0xc
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+	.uleb128 0xd
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+	.uleb128 0xe
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+	.uleb128 0xe
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+	.uleb128 0xe
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+	.uleb128 0xe
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+	.uleb128 0xe
+	.4byte	.LASF34
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+	.uleb128 0xe
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+	.byte	0x8
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+	.uleb128 0xe
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+	.byte	0x8
+	.byte	0x8a
+	.4byte	0x1523
+	.byte	0x48
+	.uleb128 0xe
+	.4byte	.LASF37
+	.byte	0x8
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+	.uleb128 0xe
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+	.uleb128 0xe
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+	.uleb128 0xe
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+	.uleb128 0xe
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+	.uleb128 0xe
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+	.4byte	0x386
+	.2byte	0x1018
+	.uleb128 0x16
+	.string	"mtd"
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+	.uleb128 0xa
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+	.uleb128 0x8
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+	.4byte	0x3b8
+	.uleb128 0xb
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+	.uleb128 0x4
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+	.uleb128 0x3
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+	.uleb128 0xd
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+	.uleb128 0xe
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+	.byte	0x15
+	.4byte	0x421
+	.uleb128 0xf
+	.string	"cnt"
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+	.uleb128 0xe
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+	.uleb128 0x11
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+	.uleb128 0x1a
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+	.uleb128 0xe
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+	.byte	0x1d
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+	.byte	0
+	.uleb128 0x1b
+	.string	"lmb"
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+	.uleb128 0x1c
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+	.uleb128 0xe
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+	.uleb128 0xe
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+	.uleb128 0xd
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+	.uleb128 0xe
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+	.uleb128 0xe
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+	.uleb128 0xe
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+	.uleb128 0xe
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+	.uleb128 0xe
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+	.uleb128 0x11
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+	.uleb128 0x4
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+	.uleb128 0x2
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+	.uleb128 0xd
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+	.uleb128 0xe
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+	.uleb128 0xe
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+	.uleb128 0xe
+	.4byte	.LASF98
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+	.4byte	0x5e9
+	.byte	0x8
+	.uleb128 0xe
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+	.uleb128 0xe
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+	.uleb128 0xe
+	.4byte	.LASF101
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+	.4byte	0x5e9
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+	.uleb128 0xe
+	.4byte	.LASF102
+	.byte	0x11
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+	.4byte	0x5e9
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+	.uleb128 0xe
+	.4byte	.LASF103
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+	.byte	0x1c
+	.uleb128 0xe
+	.4byte	.LASF104
+	.byte	0x11
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+	.4byte	0x5e9
+	.byte	0x20
+	.uleb128 0xe
+	.4byte	.LASF105
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+	.byte	0x1e
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+	.uleb128 0xe
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+	.uleb128 0xe
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+	.4byte	0x54
+	.byte	0x68
+	.uleb128 0xf
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-	.byte	0xf6
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-	.byte	0x14
-	.byte	0xc
-	.4byte	0xc66
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-	.byte	0x22
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-	.byte	0xc
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-	.byte	0x25
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-	.uleb128 0xe
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-	.byte	0x29
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-	.byte	0x2b
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+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.uleb128 0x4c
+	.4byte	0x4ed8
+	.uleb128 0x2
+	.byte	0x8c
+	.sleb128 0
 	.byte	0
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x2a2a
+	.4byte	0x3aa3
 	.uleb128 0x11
 	.4byte	0xda
-	.byte	0x1f
+	.byte	0x25
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x2a1a
+	.4byte	0x3a93
 	.uleb128 0x31
-	.4byte	.LASF437
+	.4byte	.LASF446
 	.byte	0x1
 	.2byte	0x1cf
 	.4byte	0x54
@@ -8606,127 +11625,127 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.8byte	.LFE279-.LFB279
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2c87
+	.4byte	0x3d06
 	.uleb128 0x32
 	.string	"dev"
 	.byte	0x1
 	.2byte	0x1cf
-	.4byte	0x25f
-	.4byte	.LLST50
+	.4byte	0x264
+	.4byte	.LLST69
 	.uleb128 0x3d
-	.4byte	.LASF429
+	.4byte	.LASF434
 	.byte	0x1
 	.2byte	0x1cf
 	.4byte	0x54
-	.4byte	.LLST51
+	.4byte	.LLST70
 	.uleb128 0x32
 	.string	"buf"
 	.byte	0x1
 	.2byte	0x1d0
-	.4byte	0x137
-	.4byte	.LLST52
+	.4byte	0x13c
+	.4byte	.LLST71
 	.uleb128 0x3d
 	.4byte	.LASF51
 	.byte	0x1
 	.2byte	0x1d0
 	.4byte	0x54
-	.4byte	.LLST53
+	.4byte	.LLST72
 	.uleb128 0x33
 	.string	"otp"
 	.byte	0x1
 	.2byte	0x1d2
-	.4byte	0x196d
-	.4byte	.LLST54
+	.4byte	0x19bf
+	.4byte	.LLST73
 	.uleb128 0x3e
-	.4byte	.LASF389
+	.4byte	.LASF394
 	.byte	0x1
 	.2byte	0x1d3
-	.4byte	0x1ac3
-	.4byte	.LLST55
+	.4byte	0x1b15
+	.4byte	.LLST74
 	.uleb128 0x3e
-	.4byte	.LASF438
+	.4byte	.LASF447
 	.byte	0x1
 	.2byte	0x1d4
-	.4byte	0x12c0
-	.4byte	.LLST56
+	.4byte	0x1312
+	.4byte	.LLST75
 	.uleb128 0x3e
-	.4byte	.LASF433
+	.4byte	.LASF439
 	.byte	0x1
 	.2byte	0x1d5
 	.4byte	0xa3
-	.4byte	.LLST57
+	.4byte	.LLST76
 	.uleb128 0x33
 	.string	"ret"
 	.byte	0x1
 	.2byte	0x1d6
 	.4byte	0x54
-	.4byte	.LLST58
+	.4byte	.LLST77
 	.uleb128 0x55
-	.4byte	.LASF436
-	.4byte	0x2c97
+	.4byte	.LASF442
+	.4byte	0x3d16
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.7684
+	.8byte	__func__.7745
 	.uleb128 0x56
-	.4byte	.LASF443
+	.4byte	.LASF449
 	.byte	0x1
-	.2byte	0x1fe
-	.8byte	.L49
+	.2byte	0x203
+	.8byte	.L71
 	.uleb128 0x4a
-	.4byte	.Ldebug_ranges0+0
-	.4byte	0x2b1e
-	.uleb128 0x57
+	.4byte	.Ldebug_ranges0+0x330
+	.4byte	0x3b97
+	.uleb128 0x33
 	.string	"__v"
 	.byte	0x1
-	.2byte	0x1dc
+	.2byte	0x1e1
 	.4byte	0xae
-	.4byte	0x10001
+	.4byte	.LLST78
 	.byte	0
 	.uleb128 0x4a
-	.4byte	.Ldebug_ranges0+0x30
-	.4byte	0x2b38
+	.4byte	.Ldebug_ranges0+0x360
+	.4byte	0x3bb1
 	.uleb128 0x33
 	.string	"__v"
 	.byte	0x1
-	.2byte	0x1ea
+	.2byte	0x1ef
 	.4byte	0xae
-	.4byte	.LLST59
+	.4byte	.LLST79
 	.byte	0
 	.uleb128 0x4a
-	.4byte	.Ldebug_ranges0+0x60
-	.4byte	0x2b52
+	.4byte	.Ldebug_ranges0+0x390
+	.4byte	0x3bcb
 	.uleb128 0x33
 	.string	"__v"
 	.byte	0x1
-	.2byte	0x1ed
+	.2byte	0x1f2
 	.4byte	0xae
-	.4byte	.LLST60
+	.4byte	.LLST80
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB95
-	.8byte	.LBE95-.LBB95
-	.4byte	0x2b78
+	.uleb128 0x46
+	.8byte	.LBB190
+	.8byte	.LBE190-.LBB190
+	.4byte	0x3bf1
 	.uleb128 0x33
 	.string	"__v"
 	.byte	0x1
-	.2byte	0x1f5
+	.2byte	0x1fa
 	.4byte	0xa3
-	.4byte	.LLST62
+	.4byte	.LLST82
 	.byte	0
 	.uleb128 0x4a
-	.4byte	.Ldebug_ranges0+0x90
-	.4byte	0x2b92
+	.4byte	.Ldebug_ranges0+0x3c0
+	.4byte	0x3c0b
 	.uleb128 0x33
 	.string	"__v"
 	.byte	0x1
-	.2byte	0x1ff
+	.2byte	0x204
 	.4byte	0xae
-	.4byte	.LLST61
+	.4byte	.LLST81
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL109
-	.4byte	0x4731
-	.4byte	0x2baa
+	.8byte	.LVL240
+	.4byte	0x578d
+	.4byte	0x3c23
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -8735,9 +11754,9 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL112
-	.4byte	0x4753
-	.4byte	0x2bc2
+	.8byte	.LVL243
+	.4byte	0x57af
+	.4byte	0x3c3b
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -8745,9 +11764,9 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x86
 	.sleb128 0
 	.byte	0
-	.uleb128 0x4c
-	.8byte	.LVL115
-	.4byte	0x2bd6
+	.uleb128 0x4b
+	.8byte	.LVL247
+	.4byte	0x3c4f
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x53
@@ -8756,9 +11775,9 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL116
-	.4byte	0x45d5
-	.4byte	0x2bee
+	.8byte	.LVL248
+	.4byte	0x4d93
+	.4byte	0x3c67
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -8767,9 +11786,9 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL118
-	.4byte	0x4776
-	.4byte	0x2c06
+	.8byte	.LVL250
+	.4byte	0x57d2
+	.4byte	0x3c7f
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -8778,20 +11797,26 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x32
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL119
-	.4byte	0x475f
-	.4byte	0x2c25
+	.8byte	.LVL251
+	.4byte	0x57bb
+	.4byte	0x3ca4
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC5
+	.8byte	.LC4
+	.uleb128 0x35
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL126
-	.4byte	0x44e8
-	.4byte	0x2c4a
+	.8byte	.LVL259
+	.4byte	0x5522
+	.4byte	0x3cc9
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -8803,31 +11828,31 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x51
 	.uleb128 0x1
 	.byte	0x34
-	.uleb128 0x4d
-	.4byte	0x3e54
+	.uleb128 0x4c
+	.4byte	0x4ed8
 	.uleb128 0x2
 	.byte	0x83
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL129
-	.4byte	0x475f
-	.4byte	0x2c76
+	.8byte	.LVL262
+	.4byte	0x57bb
+	.4byte	0x3cf5
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC6
+	.8byte	.LC9
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR2
+	.8byte	.LANCHOR3
 	.byte	0
-	.uleb128 0x58
-	.8byte	.LVL130
+	.uleb128 0x5b
+	.8byte	.LVL263
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x53
@@ -8838,15 +11863,15 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x2c97
+	.4byte	0x3d16
 	.uleb128 0x11
 	.4byte	0xda
 	.byte	0x16
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x2c87
+	.4byte	0x3d06
 	.uleb128 0x31
-	.4byte	.LASF439
+	.4byte	.LASF450
 	.byte	0x1
 	.2byte	0x1aa
 	.4byte	0x54
@@ -8854,565 +11879,565 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.8byte	.LFE278-.LFB278
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3601
+	.4byte	0x4680
 	.uleb128 0x32
 	.string	"dev"
 	.byte	0x1
 	.2byte	0x1aa
-	.4byte	0x25f
-	.4byte	.LLST93
+	.4byte	0x264
+	.4byte	.LLST120
 	.uleb128 0x3d
-	.4byte	.LASF429
+	.4byte	.LASF434
 	.byte	0x1
 	.2byte	0x1aa
 	.4byte	0x54
-	.4byte	.LLST94
+	.4byte	.LLST121
 	.uleb128 0x32
 	.string	"buf"
 	.byte	0x1
 	.2byte	0x1ab
-	.4byte	0x265
-	.4byte	.LLST95
+	.4byte	0x26a
+	.4byte	.LLST122
 	.uleb128 0x3d
 	.4byte	.LASF51
 	.byte	0x1
 	.2byte	0x1ab
 	.4byte	0x54
-	.4byte	.LLST96
+	.4byte	.LLST123
 	.uleb128 0x33
 	.string	"otp"
 	.byte	0x1
 	.2byte	0x1ad
-	.4byte	0x196d
-	.4byte	.LLST97
+	.4byte	0x19bf
+	.4byte	.LLST124
 	.uleb128 0x3e
-	.4byte	.LASF389
+	.4byte	.LASF394
 	.byte	0x1
 	.2byte	0x1ae
 	.4byte	0xfa
-	.4byte	.LLST98
+	.4byte	.LLST125
 	.uleb128 0x3e
-	.4byte	.LASF433
+	.4byte	.LASF439
 	.byte	0x1
 	.2byte	0x1af
 	.4byte	0xfa
-	.4byte	.LLST99
+	.4byte	.LLST126
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x1
 	.2byte	0x1b0
 	.4byte	0x54
-	.4byte	.LLST100
+	.4byte	.LLST127
 	.uleb128 0x33
 	.string	"ret"
 	.byte	0x1
 	.2byte	0x1b0
 	.4byte	0x54
-	.4byte	.LLST101
+	.4byte	.LLST128
 	.uleb128 0x40
-	.4byte	0x3601
-	.8byte	.LBB313
-	.4byte	.Ldebug_ranges0+0x390
+	.4byte	0x4680
+	.8byte	.LBB420
+	.4byte	.Ldebug_ranges0+0x770
 	.byte	0x1
 	.2byte	0x1c6
-	.4byte	0x35a0
+	.4byte	0x461f
 	.uleb128 0x3a
-	.4byte	0x3636
-	.4byte	.LLST102
+	.4byte	0x46b5
+	.4byte	.LLST129
 	.uleb128 0x3a
-	.4byte	0x362a
-	.4byte	.LLST103
+	.4byte	0x46a9
+	.4byte	.LLST130
 	.uleb128 0x3a
-	.4byte	0x361e
-	.4byte	.LLST104
+	.4byte	0x469d
+	.4byte	.LLST131
 	.uleb128 0x3a
-	.4byte	0x3612
-	.4byte	.LLST105
+	.4byte	0x4691
+	.4byte	.LLST132
 	.uleb128 0x41
-	.4byte	.Ldebug_ranges0+0x390
+	.4byte	.Ldebug_ranges0+0x770
 	.uleb128 0x42
-	.4byte	0x3642
-	.4byte	.LLST106
+	.4byte	0x46c1
+	.4byte	.LLST133
 	.uleb128 0x42
-	.4byte	0x364e
-	.4byte	.LLST107
-	.uleb128 0x43
-	.4byte	0x3667
-	.8byte	.L103
+	.4byte	0x46cd
+	.4byte	.LLST134
 	.uleb128 0x44
-	.4byte	0x365a
+	.4byte	0x46e6
+	.8byte	.L134
 	.uleb128 0x45
-	.8byte	.LBB315
-	.8byte	.LBE315-.LBB315
-	.4byte	0x2dd0
+	.4byte	0x46d9
 	.uleb128 0x46
-	.4byte	0x3674
+	.8byte	.LBB422
+	.8byte	.LBE422-.LBB422
+	.4byte	0x3e4f
+	.uleb128 0x47
+	.4byte	0x46f3
 	.4byte	0x40004
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB316
-	.8byte	.LBE316-.LBB316
-	.4byte	0x2dee
-	.uleb128 0x47
-	.4byte	0x3686
+	.uleb128 0x46
+	.8byte	.LBB423
+	.8byte	.LBE423-.LBB423
+	.4byte	0x3e6d
+	.uleb128 0x48
+	.4byte	0x4705
 	.sleb128 -65536
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB317
-	.8byte	.LBE317-.LBB317
-	.4byte	0x2e0d
-	.uleb128 0x47
-	.4byte	0x3698
+	.uleb128 0x46
+	.8byte	.LBB424
+	.8byte	.LBE424-.LBB424
+	.4byte	0x3e8c
+	.uleb128 0x48
+	.4byte	0x4717
 	.sleb128 -16776704
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB318
-	.8byte	.LBE318-.LBB318
-	.4byte	0x2e2b
-	.uleb128 0x47
-	.4byte	0x36aa
+	.uleb128 0x46
+	.8byte	.LBB425
+	.8byte	.LBE425-.LBB425
+	.4byte	0x3eaa
+	.uleb128 0x48
+	.4byte	0x4729
 	.sleb128 -65522
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB319
-	.8byte	.LBE319-.LBB319
-	.4byte	0x2e47
-	.uleb128 0x48
-	.4byte	0x36bc
+	.uleb128 0x46
+	.8byte	.LBB426
+	.8byte	.LBE426-.LBB426
+	.4byte	0x3ec6
+	.uleb128 0x49
+	.4byte	0x473b
 	.byte	0xf0
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB320
-	.8byte	.LBE320-.LBB320
-	.4byte	0x2e63
-	.uleb128 0x48
-	.4byte	0x36ce
+	.uleb128 0x46
+	.8byte	.LBB427
+	.8byte	.LBE427-.LBB427
+	.4byte	0x3ee2
+	.uleb128 0x49
+	.4byte	0x474d
 	.byte	0x1
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB321
-	.8byte	.LBE321-.LBB321
-	.4byte	0x2e7f
-	.uleb128 0x48
-	.4byte	0x36e0
+	.uleb128 0x46
+	.8byte	.LBB428
+	.8byte	.LBE428-.LBB428
+	.4byte	0x3efe
+	.uleb128 0x49
+	.4byte	0x475f
 	.byte	0x7a
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB322
-	.8byte	.LBE322-.LBB322
-	.4byte	0x2e9b
-	.uleb128 0x48
-	.4byte	0x36f2
+	.uleb128 0x46
+	.8byte	.LBB429
+	.8byte	.LBE429-.LBB429
+	.4byte	0x3f1a
+	.uleb128 0x49
+	.4byte	0x4771
 	.byte	0x25
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB323
-	.8byte	.LBE323-.LBB323
-	.4byte	0x2eb7
-	.uleb128 0x48
-	.4byte	0x3704
+	.uleb128 0x46
+	.8byte	.LBB430
+	.8byte	.LBE430-.LBB430
+	.4byte	0x3f36
+	.uleb128 0x49
+	.4byte	0x4783
 	.byte	0x4
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB324
-	.8byte	.LBE324-.LBB324
-	.4byte	0x2ed3
-	.uleb128 0x48
-	.4byte	0x3716
+	.uleb128 0x46
+	.8byte	.LBB431
+	.8byte	.LBE431-.LBB431
+	.4byte	0x3f52
+	.uleb128 0x49
+	.4byte	0x4795
 	.byte	0
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB325
-	.8byte	.LBE325-.LBB325
-	.4byte	0x2eef
-	.uleb128 0x48
-	.4byte	0x3728
+	.uleb128 0x46
+	.8byte	.LBB432
+	.8byte	.LBE432-.LBB432
+	.4byte	0x3f6e
+	.uleb128 0x49
+	.4byte	0x47a7
 	.byte	0
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB326
-	.8byte	.LBE326-.LBB326
-	.4byte	0x2f0b
-	.uleb128 0x48
-	.4byte	0x373a
+	.uleb128 0x46
+	.8byte	.LBB433
+	.8byte	.LBE433-.LBB433
+	.4byte	0x3f8a
+	.uleb128 0x49
+	.4byte	0x47b9
 	.byte	0
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB327
-	.8byte	.LBE327-.LBB327
-	.4byte	0x2f27
-	.uleb128 0x48
-	.4byte	0x374c
+	.uleb128 0x46
+	.8byte	.LBB434
+	.8byte	.LBE434-.LBB434
+	.4byte	0x3fa6
+	.uleb128 0x49
+	.4byte	0x47cb
 	.byte	0xb
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB328
-	.8byte	.LBE328-.LBB328
-	.4byte	0x2f43
-	.uleb128 0x48
-	.4byte	0x375e
+	.uleb128 0x46
+	.8byte	.LBB435
+	.8byte	.LBE435-.LBB435
+	.4byte	0x3fc2
+	.uleb128 0x49
+	.4byte	0x47dd
 	.byte	0x8
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB329
-	.8byte	.LBE329-.LBB329
-	.4byte	0x2f5f
-	.uleb128 0x48
-	.4byte	0x3770
+	.uleb128 0x46
+	.8byte	.LBB436
+	.8byte	.LBE436-.LBB436
+	.4byte	0x3fde
+	.uleb128 0x49
+	.4byte	0x47ef
 	.byte	0
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB330
-	.8byte	.LBE330-.LBB330
-	.4byte	0x2f7b
-	.uleb128 0x48
-	.4byte	0x3782
+	.uleb128 0x46
+	.8byte	.LBB437
+	.8byte	.LBE437-.LBB437
+	.4byte	0x3ffa
+	.uleb128 0x49
+	.4byte	0x4801
 	.byte	0
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB331
-	.8byte	.LBE331-.LBB331
-	.4byte	0x2f97
-	.uleb128 0x48
-	.4byte	0x3794
+	.uleb128 0x46
+	.8byte	.LBB438
+	.8byte	.LBE438-.LBB438
+	.4byte	0x4016
+	.uleb128 0x49
+	.4byte	0x4813
 	.byte	0
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB332
-	.8byte	.LBE332-.LBB332
-	.4byte	0x2fb4
-	.uleb128 0x49
-	.4byte	0x37a6
+	.uleb128 0x46
+	.8byte	.LBB439
+	.8byte	.LBE439-.LBB439
+	.4byte	0x4033
+	.uleb128 0x43
+	.4byte	0x4825
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB333
-	.8byte	.LBE333-.LBB333
-	.4byte	0x2fd3
+	.uleb128 0x46
+	.8byte	.LBB440
+	.8byte	.LBE440-.LBB440
+	.4byte	0x4052
 	.uleb128 0x42
-	.4byte	0x37b8
-	.4byte	.LLST108
+	.4byte	0x4837
+	.4byte	.LLST135
 	.byte	0
 	.uleb128 0x4a
-	.4byte	.Ldebug_ranges0+0x3f0
-	.4byte	0x2fe6
-	.uleb128 0x46
-	.4byte	0x37ca
+	.4byte	.Ldebug_ranges0+0x7d0
+	.4byte	0x4065
+	.uleb128 0x47
+	.4byte	0x4849
 	.4byte	0x10001
 	.byte	0
 	.uleb128 0x4a
-	.4byte	.Ldebug_ranges0+0x420
-	.4byte	0x2ff9
+	.4byte	.Ldebug_ranges0+0x800
+	.4byte	0x4078
 	.uleb128 0x42
-	.4byte	0x3a84
-	.4byte	.LLST109
+	.4byte	0x4b03
+	.4byte	.LLST136
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB338
-	.8byte	.LBE338-.LBB338
-	.4byte	0x3018
-	.uleb128 0x47
-	.4byte	0x37dc
+	.uleb128 0x46
+	.8byte	.LBB445
+	.8byte	.LBE445-.LBB445
+	.4byte	0x4097
+	.uleb128 0x48
+	.4byte	0x485b
 	.sleb128 -16762368
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB339
-	.8byte	.LBE339-.LBB339
-	.4byte	0x3034
-	.uleb128 0x48
-	.4byte	0x37ee
+	.uleb128 0x46
+	.8byte	.LBB446
+	.8byte	.LBE446-.LBB446
+	.4byte	0x40b3
+	.uleb128 0x49
+	.4byte	0x486d
 	.byte	0xf0
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB340
-	.8byte	.LBE340-.LBB340
-	.4byte	0x3050
-	.uleb128 0x48
-	.4byte	0x3800
+	.uleb128 0x46
+	.8byte	.LBB447
+	.8byte	.LBE447-.LBB447
+	.4byte	0x40cf
+	.uleb128 0x49
+	.4byte	0x487f
 	.byte	0x1
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB341
-	.8byte	.LBE341-.LBB341
-	.4byte	0x306c
-	.uleb128 0x48
-	.4byte	0x3812
+	.uleb128 0x46
+	.8byte	.LBB448
+	.8byte	.LBE448-.LBB448
+	.4byte	0x40eb
+	.uleb128 0x49
+	.4byte	0x4891
 	.byte	0x7a
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB342
-	.8byte	.LBE342-.LBB342
-	.4byte	0x3088
-	.uleb128 0x48
-	.4byte	0x3824
+	.uleb128 0x46
+	.8byte	.LBB449
+	.8byte	.LBE449-.LBB449
+	.4byte	0x4107
+	.uleb128 0x49
+	.4byte	0x48a3
 	.byte	0x15
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB343
-	.8byte	.LBE343-.LBB343
-	.4byte	0x30a4
-	.uleb128 0x48
-	.4byte	0x3836
+	.uleb128 0x46
+	.8byte	.LBB450
+	.8byte	.LBE450-.LBB450
+	.4byte	0x4123
+	.uleb128 0x49
+	.4byte	0x48b5
 	.byte	0xdc
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB344
-	.8byte	.LBE344-.LBB344
-	.4byte	0x30c0
-	.uleb128 0x48
-	.4byte	0x3848
+	.uleb128 0x46
+	.8byte	.LBB451
+	.8byte	.LBE451-.LBB451
+	.4byte	0x413f
+	.uleb128 0x49
+	.4byte	0x48c7
 	.byte	0x92
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB345
-	.8byte	.LBE345-.LBB345
-	.4byte	0x30dc
-	.uleb128 0x48
-	.4byte	0x385a
+	.uleb128 0x46
+	.8byte	.LBB452
+	.8byte	.LBE452-.LBB452
+	.4byte	0x415b
+	.uleb128 0x49
+	.4byte	0x48d9
 	.byte	0x79
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB346
-	.8byte	.LBE346-.LBB346
-	.4byte	0x30f8
-	.uleb128 0x48
-	.4byte	0x386c
+	.uleb128 0x46
+	.8byte	.LBB453
+	.8byte	.LBE453-.LBB453
+	.4byte	0x4177
+	.uleb128 0x49
+	.4byte	0x48eb
 	.byte	0x81
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB347
-	.8byte	.LBE347-.LBB347
-	.4byte	0x3114
-	.uleb128 0x48
-	.4byte	0x387e
+	.uleb128 0x46
+	.8byte	.LBB454
+	.8byte	.LBE454-.LBB454
+	.4byte	0x4193
+	.uleb128 0x49
+	.4byte	0x48fd
 	.byte	0x7e
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB348
-	.8byte	.LBE348-.LBB348
-	.4byte	0x3130
-	.uleb128 0x48
-	.4byte	0x3890
+	.uleb128 0x46
+	.8byte	.LBB455
+	.8byte	.LBE455-.LBB455
+	.4byte	0x41af
+	.uleb128 0x49
+	.4byte	0x490f
 	.byte	0x21
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB349
-	.8byte	.LBE349-.LBB349
-	.4byte	0x314c
-	.uleb128 0x48
-	.4byte	0x38a2
+	.uleb128 0x46
+	.8byte	.LBB456
+	.8byte	.LBE456-.LBB456
+	.4byte	0x41cb
+	.uleb128 0x49
+	.4byte	0x4921
 	.byte	0x11
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB350
-	.8byte	.LBE350-.LBB350
-	.4byte	0x3168
-	.uleb128 0x48
-	.4byte	0x38b4
+	.uleb128 0x46
+	.8byte	.LBB457
+	.8byte	.LBE457-.LBB457
+	.4byte	0x41e7
+	.uleb128 0x49
+	.4byte	0x4933
 	.byte	0x9d
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB351
-	.8byte	.LBE351-.LBB351
-	.4byte	0x3184
-	.uleb128 0x48
-	.4byte	0x38c6
+	.uleb128 0x46
+	.8byte	.LBB458
+	.8byte	.LBE458-.LBB458
+	.4byte	0x4203
+	.uleb128 0x49
+	.4byte	0x4945
 	.byte	0x2
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB352
-	.8byte	.LBE352-.LBB352
-	.4byte	0x31a0
-	.uleb128 0x48
-	.4byte	0x38d8
+	.uleb128 0x46
+	.8byte	.LBB459
+	.8byte	.LBE459-.LBB459
+	.4byte	0x421f
+	.uleb128 0x49
+	.4byte	0x4957
 	.byte	0
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB353
-	.8byte	.LBE353-.LBB353
-	.4byte	0x31bc
-	.uleb128 0x48
-	.4byte	0x38ea
+	.uleb128 0x46
+	.8byte	.LBB460
+	.8byte	.LBE460-.LBB460
+	.4byte	0x423b
+	.uleb128 0x49
+	.4byte	0x4969
 	.byte	0
 	.byte	0
 	.uleb128 0x4a
-	.4byte	.Ldebug_ranges0+0x450
-	.4byte	0x31cf
-	.uleb128 0x46
-	.4byte	0x38fc
+	.4byte	.Ldebug_ranges0+0x830
+	.4byte	0x424e
+	.uleb128 0x47
+	.4byte	0x497b
 	.4byte	0x10001
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB356
-	.8byte	.LBE356-.LBB356
-	.4byte	0x31ee
-	.uleb128 0x47
-	.4byte	0x390e
+	.uleb128 0x46
+	.8byte	.LBB463
+	.8byte	.LBE463-.LBB463
+	.4byte	0x426d
+	.uleb128 0x48
+	.4byte	0x498d
 	.sleb128 -16776704
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB357
-	.8byte	.LBE357-.LBB357
-	.4byte	0x320c
-	.uleb128 0x47
-	.4byte	0x3920
+	.uleb128 0x46
+	.8byte	.LBB464
+	.8byte	.LBE464-.LBB464
+	.4byte	0x428b
+	.uleb128 0x48
+	.4byte	0x499f
 	.sleb128 -65535
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB358
-	.8byte	.LBE358-.LBB358
-	.4byte	0x3228
-	.uleb128 0x48
-	.4byte	0x3932
+	.uleb128 0x46
+	.8byte	.LBB465
+	.8byte	.LBE465-.LBB465
+	.4byte	0x42a7
+	.uleb128 0x49
+	.4byte	0x49b1
 	.byte	0xfb
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB359
-	.8byte	.LBE359-.LBB359
-	.4byte	0x3244
-	.uleb128 0x48
-	.4byte	0x3944
+	.uleb128 0x46
+	.8byte	.LBB466
+	.8byte	.LBE466-.LBB466
+	.4byte	0x42c3
+	.uleb128 0x49
+	.4byte	0x49c3
 	.byte	0
 	.byte	0
 	.uleb128 0x4a
-	.4byte	.Ldebug_ranges0+0x480
-	.4byte	0x3257
-	.uleb128 0x46
-	.4byte	0x3956
+	.4byte	.Ldebug_ranges0+0x860
+	.4byte	0x42d6
+	.uleb128 0x47
+	.4byte	0x49d5
 	.4byte	0x10001
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB362
-	.8byte	.LBE362-.LBB362
-	.4byte	0x3273
-	.uleb128 0x48
-	.4byte	0x3968
+	.uleb128 0x46
+	.8byte	.LBB469
+	.8byte	.LBE469-.LBB469
+	.4byte	0x42f2
+	.uleb128 0x49
+	.4byte	0x49e7
 	.byte	0xc0
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB363
-	.8byte	.LBE363-.LBB363
-	.4byte	0x3292
+	.uleb128 0x46
+	.8byte	.LBB470
+	.8byte	.LBE470-.LBB470
+	.4byte	0x4311
 	.uleb128 0x42
-	.4byte	0x397a
-	.4byte	.LLST110
+	.4byte	0x49f9
+	.4byte	.LLST137
 	.byte	0
 	.uleb128 0x4a
-	.4byte	.Ldebug_ranges0+0x4b0
-	.4byte	0x32a5
-	.uleb128 0x46
-	.4byte	0x398c
+	.4byte	.Ldebug_ranges0+0x890
+	.4byte	0x4324
+	.uleb128 0x47
+	.4byte	0x4a0b
 	.4byte	0x10001
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB366
-	.8byte	.LBE366-.LBB366
-	.4byte	0x32c4
-	.uleb128 0x47
-	.4byte	0x399e
+	.uleb128 0x46
+	.8byte	.LBB473
+	.8byte	.LBE473-.LBB473
+	.4byte	0x4343
+	.uleb128 0x48
+	.4byte	0x4a1d
 	.sleb128 -16762368
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB367
-	.8byte	.LBE367-.LBB367
-	.4byte	0x32e0
-	.uleb128 0x48
-	.4byte	0x39b0
+	.uleb128 0x46
+	.8byte	.LBB474
+	.8byte	.LBE474-.LBB474
+	.4byte	0x435f
+	.uleb128 0x49
+	.4byte	0x4a2f
 	.byte	0xff
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB368
-	.8byte	.LBE368-.LBB368
-	.4byte	0x32fc
-	.uleb128 0x48
-	.4byte	0x39c2
+	.uleb128 0x46
+	.8byte	.LBB475
+	.8byte	.LBE475-.LBB475
+	.4byte	0x437b
+	.uleb128 0x49
+	.4byte	0x4a41
 	.byte	0xa
 	.byte	0
 	.uleb128 0x4a
-	.4byte	.Ldebug_ranges0+0x4e0
-	.4byte	0x330f
-	.uleb128 0x46
-	.4byte	0x39d4
+	.4byte	.Ldebug_ranges0+0x8c0
+	.4byte	0x438e
+	.uleb128 0x47
+	.4byte	0x4a53
 	.4byte	0x10001
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB371
-	.8byte	.LBE371-.LBB371
-	.4byte	0x332d
-	.uleb128 0x47
-	.4byte	0x39e6
+	.uleb128 0x46
+	.8byte	.LBB478
+	.8byte	.LBE478-.LBB478
+	.4byte	0x43ac
+	.uleb128 0x48
+	.4byte	0x4a65
 	.sleb128 -65534
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB372
-	.8byte	.LBE372-.LBB372
-	.4byte	0x3349
-	.uleb128 0x48
-	.4byte	0x39f8
+	.uleb128 0x46
+	.8byte	.LBB479
+	.8byte	.LBE479-.LBB479
+	.4byte	0x43c8
+	.uleb128 0x49
+	.4byte	0x4a77
 	.byte	0x1
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB373
-	.8byte	.LBE373-.LBB373
-	.4byte	0x3365
-	.uleb128 0x48
-	.4byte	0x3a0a
+	.uleb128 0x46
+	.8byte	.LBB480
+	.8byte	.LBE480-.LBB480
+	.4byte	0x43e4
+	.uleb128 0x49
+	.4byte	0x4a89
 	.byte	0xbf
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB374
-	.8byte	.LBE374-.LBB374
-	.4byte	0x3381
-	.uleb128 0x48
-	.4byte	0x3a1c
+	.uleb128 0x46
+	.8byte	.LBB481
+	.8byte	.LBE481-.LBB481
+	.4byte	0x4400
+	.uleb128 0x49
+	.4byte	0x4a9b
 	.byte	0
 	.byte	0
 	.uleb128 0x4a
-	.4byte	.Ldebug_ranges0+0x510
-	.4byte	0x3394
-	.uleb128 0x46
-	.4byte	0x3a2e
+	.4byte	.Ldebug_ranges0+0x8f0
+	.4byte	0x4413
+	.uleb128 0x47
+	.4byte	0x4aad
 	.4byte	0x10001
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB377
-	.8byte	.LBE377-.LBB377
-	.4byte	0x33b2
-	.uleb128 0x47
-	.4byte	0x3a40
+	.uleb128 0x46
+	.8byte	.LBB484
+	.8byte	.LBE484-.LBB484
+	.4byte	0x4431
+	.uleb128 0x48
+	.4byte	0x4abf
 	.sleb128 -65534
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB378
-	.8byte	.LBE378-.LBB378
-	.4byte	0x33ce
-	.uleb128 0x48
-	.4byte	0x3a52
+	.uleb128 0x46
+	.8byte	.LBB485
+	.8byte	.LBE485-.LBB485
+	.4byte	0x444d
+	.uleb128 0x49
+	.4byte	0x4ad1
 	.byte	0x2
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB379
-	.8byte	.LBE379-.LBB379
-	.4byte	0x33ea
-	.uleb128 0x48
-	.4byte	0x3a64
+	.uleb128 0x46
+	.8byte	.LBB486
+	.8byte	.LBE486-.LBB486
+	.4byte	0x4469
+	.uleb128 0x49
+	.4byte	0x4ae3
 	.byte	0xbf
 	.byte	0
 	.uleb128 0x4a
-	.4byte	.Ldebug_ranges0+0x540
-	.4byte	0x33fd
-	.uleb128 0x46
-	.4byte	0x3a76
+	.4byte	.Ldebug_ranges0+0x920
+	.4byte	0x447c
+	.uleb128 0x47
+	.4byte	0x4af5
 	.4byte	0x10001
 	.byte	0
-	.uleb128 0x4b
-	.8byte	.LVL327
-	.4byte	0x475f
+	.uleb128 0x4d
+	.8byte	.LVL467
+	.4byte	0x57bb
 	.uleb128 0x34
-	.8byte	.LVL330
-	.4byte	0x4753
-	.4byte	0x3424
+	.8byte	.LVL470
+	.4byte	0x57af
+	.4byte	0x44a3
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -9421,9 +12446,9 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.sleb128 224
 	.byte	0x6
 	.byte	0
-	.uleb128 0x4c
-	.8byte	.LVL335
-	.4byte	0x3438
+	.uleb128 0x4b
+	.8byte	.LVL475
+	.4byte	0x44b7
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x53
@@ -9432,9 +12457,9 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL356
-	.4byte	0x44e8
-	.4byte	0x345d
+	.8byte	.LVL496
+	.4byte	0x5522
+	.4byte	0x44dc
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -9446,18 +12471,18 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x51
 	.uleb128 0x1
 	.byte	0x32
-	.uleb128 0x4d
-	.4byte	0x3e54
+	.uleb128 0x4c
+	.4byte	0x4ed8
 	.uleb128 0x2
 	.byte	0x8b
 	.sleb128 0
 	.byte	0
+	.uleb128 0x4d
+	.8byte	.LVL500
+	.4byte	0x57bb
 	.uleb128 0x4b
-	.8byte	.LVL360
-	.4byte	0x475f
-	.uleb128 0x4c
-	.8byte	.LVL361
-	.4byte	0x347e
+	.8byte	.LVL501
+	.4byte	0x44fd
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x53
@@ -9466,9 +12491,9 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL380
-	.4byte	0x44e8
-	.4byte	0x34a4
+	.8byte	.LVL520
+	.4byte	0x5522
+	.4byte	0x4523
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -9481,16 +12506,16 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x2
 	.byte	0x85
 	.sleb128 0
-	.uleb128 0x4d
-	.4byte	0x3e54
+	.uleb128 0x4c
+	.4byte	0x4ed8
 	.uleb128 0x2
 	.byte	0x8b
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL389
-	.4byte	0x44e8
-	.4byte	0x34ca
+	.8byte	.LVL529
+	.4byte	0x5522
+	.4byte	0x4549
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -9503,16 +12528,16 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x2
 	.byte	0x85
 	.sleb128 0
-	.uleb128 0x4d
-	.4byte	0x3e54
+	.uleb128 0x4c
+	.4byte	0x4ed8
 	.uleb128 0x2
 	.byte	0x8b
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL396
-	.4byte	0x44e8
-	.4byte	0x34f0
+	.8byte	.LVL536
+	.4byte	0x5522
+	.4byte	0x456f
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -9525,16 +12550,16 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x2
 	.byte	0x85
 	.sleb128 0
-	.uleb128 0x4d
-	.4byte	0x3e54
+	.uleb128 0x4c
+	.4byte	0x4ed8
 	.uleb128 0x2
 	.byte	0x8b
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL404
-	.4byte	0x44e8
-	.4byte	0x3516
+	.8byte	.LVL544
+	.4byte	0x5522
+	.4byte	0x4595
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -9547,16 +12572,16 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x2
 	.byte	0x85
 	.sleb128 0
-	.uleb128 0x4d
-	.4byte	0x3e54
+	.uleb128 0x4c
+	.4byte	0x4ed8
 	.uleb128 0x2
 	.byte	0x8b
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL414
-	.4byte	0x44e8
-	.4byte	0x353c
+	.8byte	.LVL554
+	.4byte	0x5522
+	.4byte	0x45bb
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -9569,32 +12594,32 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x2
 	.byte	0x85
 	.sleb128 0
-	.uleb128 0x4d
-	.4byte	0x3e54
+	.uleb128 0x4c
+	.4byte	0x4ed8
 	.uleb128 0x2
 	.byte	0x8b
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL419
-	.4byte	0x4413
-	.4byte	0x355c
+	.8byte	.LVL559
+	.4byte	0x544d
+	.4byte	0x45db
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x8b
 	.sleb128 0
-	.uleb128 0x4d
-	.4byte	0x3dc0
+	.uleb128 0x4c
+	.4byte	0x4e44
 	.uleb128 0x2
 	.byte	0x8b
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL427
-	.4byte	0x44e8
-	.4byte	0x3582
+	.8byte	.LVL567
+	.4byte	0x5522
+	.4byte	0x4601
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -9607,23 +12632,23 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x2
 	.byte	0x85
 	.sleb128 0
-	.uleb128 0x4d
-	.4byte	0x3e54
+	.uleb128 0x4c
+	.4byte	0x4ed8
 	.uleb128 0x2
 	.byte	0x8b
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL432
-	.4byte	0x447d
+	.8byte	.LVL572
+	.4byte	0x54b7
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x8b
 	.sleb128 0
-	.uleb128 0x4d
-	.4byte	0x3e0a
+	.uleb128 0x4c
+	.4byte	0x4e8e
 	.uleb128 0x2
 	.byte	0x8b
 	.sleb128 0
@@ -9631,9 +12656,9 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL310
-	.4byte	0x4731
-	.4byte	0x35ba
+	.8byte	.LVL450
+	.4byte	0x578d
+	.4byte	0x4639
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -9643,9 +12668,9 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x6
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL313
-	.4byte	0x476a
-	.4byte	0x35d8
+	.8byte	.LVL453
+	.4byte	0x57c6
+	.4byte	0x4657
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -9660,8 +12685,8 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x26
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL320
-	.4byte	0x3aa7
+	.8byte	.LVL460
+	.4byte	0x4b26
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -9690,29 +12715,29 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0
 	.byte	0
 	.uleb128 0x3b
-	.4byte	.LASF440
+	.4byte	.LASF451
 	.byte	0x1
 	.2byte	0x118
 	.4byte	0x54
 	.byte	0x1
-	.4byte	0x3a92
+	.4byte	0x4b11
 	.uleb128 0x3c
 	.string	"dev"
 	.byte	0x1
 	.2byte	0x118
-	.4byte	0x25f
+	.4byte	0x264
 	.uleb128 0x3c
 	.string	"otp"
 	.byte	0x1
 	.2byte	0x119
-	.4byte	0x196d
+	.4byte	0x19bf
 	.uleb128 0x4e
-	.4byte	.LASF429
+	.4byte	.LASF434
 	.byte	0x1
 	.2byte	0x11a
 	.4byte	0x54
 	.uleb128 0x4e
-	.4byte	.LASF389
+	.4byte	.LASF394
 	.byte	0x1
 	.2byte	0x11a
 	.4byte	0x94
@@ -9722,20 +12747,20 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.2byte	0x11c
 	.4byte	0x54
 	.uleb128 0x50
-	.4byte	.LASF430
+	.4byte	.LASF435
 	.byte	0x1
 	.2byte	0x11d
-	.4byte	0x1ac3
+	.4byte	0x1b15
 	.uleb128 0x51
-	.4byte	.LASF436
-	.4byte	0x3aa2
-	.4byte	.LASF440
+	.4byte	.LASF442
+	.4byte	0x4b21
+	.4byte	.LASF451
 	.uleb128 0x52
-	.4byte	.LASF441
+	.4byte	.LASF448
 	.byte	0x1
 	.2byte	0x1a1
 	.uleb128 0x53
-	.4byte	0x3681
+	.4byte	0x4700
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -9743,7 +12768,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x3693
+	.4byte	0x4712
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -9751,7 +12776,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x36a5
+	.4byte	0x4724
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -9759,7 +12784,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x36b7
+	.4byte	0x4736
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -9767,7 +12792,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x36c9
+	.4byte	0x4748
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -9775,7 +12800,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x36db
+	.4byte	0x475a
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -9783,7 +12808,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x36ed
+	.4byte	0x476c
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -9791,7 +12816,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x36ff
+	.4byte	0x477e
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -9799,7 +12824,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x3711
+	.4byte	0x4790
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -9807,7 +12832,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x3723
+	.4byte	0x47a2
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -9815,7 +12840,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x3735
+	.4byte	0x47b4
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -9823,7 +12848,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x3747
+	.4byte	0x47c6
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -9831,7 +12856,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x3759
+	.4byte	0x47d8
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -9839,7 +12864,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x376b
+	.4byte	0x47ea
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -9847,7 +12872,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x377d
+	.4byte	0x47fc
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -9855,7 +12880,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x378f
+	.4byte	0x480e
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -9863,7 +12888,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x37a1
+	.4byte	0x4820
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -9871,7 +12896,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x37b3
+	.4byte	0x4832
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -9879,7 +12904,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x37c5
+	.4byte	0x4844
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -9887,7 +12912,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x37d7
+	.4byte	0x4856
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -9895,7 +12920,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x37e9
+	.4byte	0x4868
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -9903,7 +12928,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x37fb
+	.4byte	0x487a
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -9911,7 +12936,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x380d
+	.4byte	0x488c
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -9919,7 +12944,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x381f
+	.4byte	0x489e
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -9927,7 +12952,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x3831
+	.4byte	0x48b0
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -9935,7 +12960,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x3843
+	.4byte	0x48c2
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -9943,7 +12968,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x3855
+	.4byte	0x48d4
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -9951,7 +12976,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x3867
+	.4byte	0x48e6
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -9959,7 +12984,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x3879
+	.4byte	0x48f8
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -9967,7 +12992,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x388b
+	.4byte	0x490a
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -9975,7 +13000,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x389d
+	.4byte	0x491c
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -9983,7 +13008,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x38af
+	.4byte	0x492e
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -9991,7 +13016,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x38c1
+	.4byte	0x4940
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -9999,7 +13024,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x38d3
+	.4byte	0x4952
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -10007,7 +13032,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x38e5
+	.4byte	0x4964
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -10015,7 +13040,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x38f7
+	.4byte	0x4976
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -10023,7 +13048,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x3909
+	.4byte	0x4988
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -10031,7 +13056,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x391b
+	.4byte	0x499a
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -10039,7 +13064,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x392d
+	.4byte	0x49ac
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -10047,7 +13072,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x393f
+	.4byte	0x49be
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -10055,7 +13080,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x3951
+	.4byte	0x49d0
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -10063,7 +13088,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x3963
+	.4byte	0x49e2
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -10071,7 +13096,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x3975
+	.4byte	0x49f4
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -10079,7 +13104,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x3987
+	.4byte	0x4a06
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -10087,7 +13112,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x3999
+	.4byte	0x4a18
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -10095,7 +13120,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x39ab
+	.4byte	0x4a2a
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -10103,7 +13128,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x39bd
+	.4byte	0x4a3c
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -10111,7 +13136,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x39cf
+	.4byte	0x4a4e
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -10119,7 +13144,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x39e1
+	.4byte	0x4a60
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -10127,7 +13152,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x39f3
+	.4byte	0x4a72
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -10135,7 +13160,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x3a05
+	.4byte	0x4a84
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -10143,7 +13168,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x3a17
+	.4byte	0x4a96
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -10151,7 +13176,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x3a29
+	.4byte	0x4aa8
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -10159,7 +13184,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x3a3b
+	.4byte	0x4aba
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -10167,7 +13192,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x3a4d
+	.4byte	0x4acc
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -10175,7 +13200,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x3a5f
+	.4byte	0x4ade
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -10183,7 +13208,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x3a71
+	.4byte	0x4af0
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -10191,7 +13216,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x3a83
+	.4byte	0x4b02
 	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
@@ -10208,15 +13233,15 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x3aa2
+	.4byte	0x4b21
 	.uleb128 0x11
 	.4byte	0xda
 	.byte	0x1e
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x3a92
-	.uleb128 0x59
-	.4byte	.LASF442
+	.4byte	0x4b11
+	.uleb128 0x5c
+	.4byte	.LASF452
 	.byte	0x1
 	.byte	0xdc
 	.4byte	0x54
@@ -10224,109 +13249,109 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.8byte	.LFE276-.LFB276
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3cfa
-	.uleb128 0x5a
+	.4byte	0x4d7e
+	.uleb128 0x5d
 	.string	"dev"
 	.byte	0x1
 	.byte	0xdc
-	.4byte	0x25f
-	.4byte	.LLST63
-	.uleb128 0x5b
-	.4byte	.LASF429
+	.4byte	0x264
+	.4byte	.LLST109
+	.uleb128 0x5e
+	.4byte	.LASF434
 	.byte	0x1
 	.byte	0xdc
 	.4byte	0x54
-	.4byte	.LLST64
-	.uleb128 0x5a
+	.4byte	.LLST110
+	.uleb128 0x5d
 	.string	"buf"
 	.byte	0x1
 	.byte	0xdd
-	.4byte	0x137
-	.4byte	.LLST65
-	.uleb128 0x5b
+	.4byte	0x13c
+	.4byte	.LLST111
+	.uleb128 0x5e
 	.4byte	.LASF51
 	.byte	0x1
 	.byte	0xdd
 	.4byte	0x54
-	.4byte	.LLST66
-	.uleb128 0x5c
+	.4byte	.LLST112
+	.uleb128 0x5f
 	.string	"otp"
 	.byte	0x1
 	.byte	0xdf
-	.4byte	0x196d
-	.4byte	.LLST67
-	.uleb128 0x5d
-	.4byte	.LASF389
+	.4byte	0x19bf
+	.4byte	.LLST113
+	.uleb128 0x60
+	.4byte	.LASF394
 	.byte	0x1
 	.byte	0xe0
-	.4byte	0x1ac3
-	.4byte	.LLST68
-	.uleb128 0x5d
-	.4byte	.LASF438
+	.4byte	0x1b15
+	.4byte	.LLST114
+	.uleb128 0x60
+	.4byte	.LASF447
 	.byte	0x1
 	.byte	0xe1
-	.4byte	0x12c0
-	.4byte	.LLST69
-	.uleb128 0x5e
-	.4byte	.LASF433
+	.4byte	0x1312
+	.4byte	.LLST115
+	.uleb128 0x61
+	.4byte	.LASF439
 	.byte	0x1
 	.byte	0xe2
 	.4byte	0x94
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x5c
+	.uleb128 0x5f
 	.string	"ret"
 	.byte	0x1
 	.byte	0xe3
 	.4byte	0x54
-	.4byte	.LLST70
+	.4byte	.LLST116
 	.uleb128 0x55
-	.4byte	.LASF436
-	.4byte	0x3d0a
+	.4byte	.LASF442
+	.4byte	0x4d8e
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.7513
+	.8byte	__func__.7574
 	.uleb128 0x56
-	.4byte	.LASF443
+	.4byte	.LASF449
 	.byte	0x1
 	.2byte	0x10e
-	.8byte	.L60
+	.8byte	.L119
 	.uleb128 0x4a
-	.4byte	.Ldebug_ranges0+0xc0
-	.4byte	0x3b89
-	.uleb128 0x5f
+	.4byte	.Ldebug_ranges0+0x6e0
+	.4byte	0x4c08
+	.uleb128 0x62
 	.string	"__v"
 	.byte	0x1
 	.byte	0xea
 	.4byte	0xae
 	.4byte	0x10001
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB98
-	.8byte	.LBE98-.LBB98
-	.4byte	0x3bae
-	.uleb128 0x5c
+	.uleb128 0x46
+	.8byte	.LBB353
+	.8byte	.LBE353-.LBB353
+	.4byte	0x4c2d
+	.uleb128 0x5f
 	.string	"__v"
 	.byte	0x1
 	.byte	0xf8
 	.4byte	0xae
-	.4byte	.LLST71
+	.4byte	.LLST117
 	.byte	0
 	.uleb128 0x4a
-	.4byte	.Ldebug_ranges0+0xf0
-	.4byte	0x3bc7
-	.uleb128 0x5c
+	.4byte	.Ldebug_ranges0+0x710
+	.4byte	0x4c46
+	.uleb128 0x5f
 	.string	"__v"
 	.byte	0x1
 	.byte	0xfa
 	.4byte	0xae
-	.4byte	.LLST72
+	.4byte	.LLST118
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB103
-	.8byte	.LBE103-.LBB103
-	.4byte	0x3beb
-	.uleb128 0x60
+	.uleb128 0x46
+	.8byte	.LBB358
+	.8byte	.LBE358-.LBB358
+	.4byte	0x4c6a
+	.uleb128 0x59
 	.string	"__v"
 	.byte	0x1
 	.2byte	0x102
@@ -10335,19 +13360,19 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x50
 	.byte	0
 	.uleb128 0x4a
-	.4byte	.Ldebug_ranges0+0x120
-	.4byte	0x3c05
+	.4byte	.Ldebug_ranges0+0x740
+	.4byte	0x4c84
 	.uleb128 0x33
 	.string	"__v"
 	.byte	0x1
 	.2byte	0x10f
 	.4byte	0xae
-	.4byte	.LLST73
+	.4byte	.LLST119
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL142
-	.4byte	0x4731
-	.4byte	0x3c1d
+	.8byte	.LVL416
+	.4byte	0x578d
+	.4byte	0x4c9c
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -10356,9 +13381,9 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL145
-	.4byte	0x4753
-	.4byte	0x3c35
+	.8byte	.LVL419
+	.4byte	0x57af
+	.4byte	0x4cb4
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -10366,9 +13391,9 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x87
 	.sleb128 0
 	.byte	0
-	.uleb128 0x4c
-	.8byte	.LVL148
-	.4byte	0x3c49
+	.uleb128 0x4b
+	.8byte	.LVL422
+	.4byte	0x4cc8
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x53
@@ -10377,20 +13402,25 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL149
-	.4byte	0x45d5
-	.4byte	0x3c61
+	.8byte	.LVL423
+	.4byte	0x4d93
+	.4byte	0x4ce5
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x83
 	.sleb128 0
+	.uleb128 0x35
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL152
-	.4byte	0x4776
-	.4byte	0x3c79
+	.8byte	.LVL426
+	.4byte	0x57d2
+	.4byte	0x4cfd
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -10399,20 +13429,20 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x32
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL153
-	.4byte	0x475f
-	.4byte	0x3c98
+	.8byte	.LVL427
+	.4byte	0x57bb
+	.4byte	0x4d1c
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC5
+	.8byte	.LC17
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL162
-	.4byte	0x44e8
-	.4byte	0x3cbd
+	.8byte	.LVL436
+	.4byte	0x5522
+	.4byte	0x4d41
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -10424,31 +13454,31 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x51
 	.uleb128 0x1
 	.byte	0x34
-	.uleb128 0x4d
-	.4byte	0x3e54
+	.uleb128 0x4c
+	.4byte	0x4ed8
 	.uleb128 0x2
 	.byte	0x83
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL165
-	.4byte	0x475f
-	.4byte	0x3ce9
+	.8byte	.LVL439
+	.4byte	0x57bb
+	.4byte	0x4d6d
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC6
+	.8byte	.LC9
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR3
+	.8byte	.LANCHOR5
 	.byte	0
-	.uleb128 0x58
-	.8byte	.LVL166
+	.uleb128 0x5b
+	.8byte	.LVL440
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x53
@@ -10459,326 +13489,306 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x3d0a
+	.4byte	0x4d8e
 	.uleb128 0x11
 	.4byte	0xda
 	.byte	0x18
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x3cfa
-	.uleb128 0x61
-	.4byte	.LASF444
+	.4byte	0x4d7e
+	.uleb128 0x63
+	.4byte	.LASF453
 	.byte	0x1
 	.byte	0xc6
 	.4byte	0x54
 	.byte	0x1
-	.4byte	0x3db0
-	.uleb128 0x62
+	.4byte	0x4e34
+	.uleb128 0x64
 	.string	"otp"
 	.byte	0x1
 	.byte	0xc6
-	.4byte	0x196d
-	.uleb128 0x63
-	.4byte	.LASF262
+	.4byte	0x19bf
+	.uleb128 0x65
+	.4byte	.LASF267
 	.byte	0x1
 	.byte	0xc7
-	.4byte	0x144
-	.uleb128 0x64
+	.4byte	0x149
+	.uleb128 0x66
 	.string	"ret"
 	.byte	0x1
 	.byte	0xc9
 	.4byte	0x54
 	.uleb128 0x51
-	.4byte	.LASF436
-	.4byte	0x3aa2
-	.4byte	.LASF444
+	.4byte	.LASF442
+	.4byte	0x4b21
+	.4byte	.LASF453
 	.uleb128 0x53
-	.4byte	0x3d5e
-	.uleb128 0x64
+	.4byte	0x4de2
+	.uleb128 0x66
 	.string	"__v"
 	.byte	0x1
 	.byte	0xcb
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x3d6f
-	.uleb128 0x64
+	.4byte	0x4df3
+	.uleb128 0x66
 	.string	"__v"
 	.byte	0x1
 	.byte	0xcc
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x3d80
-	.uleb128 0x64
+	.4byte	0x4e04
+	.uleb128 0x66
 	.string	"__v"
 	.byte	0x1
 	.byte	0xcd
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x3d91
-	.uleb128 0x64
+	.4byte	0x4e15
+	.uleb128 0x66
 	.string	"__v"
 	.byte	0x1
 	.byte	0xcf
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x53
-	.4byte	0x3da2
-	.uleb128 0x64
+	.4byte	0x4e26
+	.uleb128 0x66
 	.string	"__v"
 	.byte	0x1
 	.byte	0xd1
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x54
-	.uleb128 0x64
+	.uleb128 0x66
 	.string	"__v"
 	.byte	0x1
 	.byte	0xd3
 	.4byte	0xae
 	.byte	0
 	.byte	0
-	.uleb128 0x61
-	.4byte	.LASF445
+	.uleb128 0x63
+	.4byte	.LASF454
 	.byte	0x1
 	.byte	0xb0
 	.4byte	0x54
 	.byte	0x1
-	.4byte	0x3dfa
-	.uleb128 0x62
+	.4byte	0x4e7e
+	.uleb128 0x64
 	.string	"otp"
 	.byte	0x1
 	.byte	0xb0
-	.4byte	0x196d
-	.uleb128 0x65
-	.4byte	.LASF446
+	.4byte	0x19bf
+	.uleb128 0x67
+	.4byte	.LASF455
 	.byte	0x1
 	.byte	0xb2
 	.4byte	0x54
-	.uleb128 0x65
-	.4byte	.LASF433
+	.uleb128 0x67
+	.4byte	.LASF439
 	.byte	0x1
 	.byte	0xb3
 	.4byte	0x54
-	.uleb128 0x64
+	.uleb128 0x66
 	.string	"ret"
 	.byte	0x1
 	.byte	0xb3
 	.4byte	0x54
 	.uleb128 0x54
-	.uleb128 0x64
+	.uleb128 0x66
 	.string	"__v"
 	.byte	0x1
 	.byte	0xb6
 	.4byte	0xae
 	.byte	0
 	.byte	0
-	.uleb128 0x61
-	.4byte	.LASF447
+	.uleb128 0x63
+	.4byte	.LASF456
 	.byte	0x1
 	.byte	0x9a
 	.4byte	0x54
 	.byte	0x1
-	.4byte	0x3e44
-	.uleb128 0x62
+	.4byte	0x4ec8
+	.uleb128 0x64
 	.string	"otp"
 	.byte	0x1
 	.byte	0x9a
-	.4byte	0x196d
-	.uleb128 0x65
-	.4byte	.LASF446
+	.4byte	0x19bf
+	.uleb128 0x67
+	.4byte	.LASF455
 	.byte	0x1
 	.byte	0x9c
 	.4byte	0x54
-	.uleb128 0x65
-	.4byte	.LASF433
+	.uleb128 0x67
+	.4byte	.LASF439
 	.byte	0x1
 	.byte	0x9d
 	.4byte	0x54
-	.uleb128 0x64
+	.uleb128 0x66
 	.string	"ret"
 	.byte	0x1
 	.byte	0x9d
 	.4byte	0x54
 	.uleb128 0x54
-	.uleb128 0x64
+	.uleb128 0x66
 	.string	"__v"
 	.byte	0x1
 	.byte	0xa0
 	.4byte	0xae
 	.byte	0
 	.byte	0
-	.uleb128 0x61
-	.4byte	.LASF448
+	.uleb128 0x63
+	.4byte	.LASF457
 	.byte	0x1
 	.byte	0x86
 	.4byte	0x54
 	.byte	0x1
-	.4byte	0x3ea1
-	.uleb128 0x62
+	.4byte	0x4f25
+	.uleb128 0x64
 	.string	"otp"
 	.byte	0x1
 	.byte	0x86
-	.4byte	0x196d
-	.uleb128 0x63
-	.4byte	.LASF449
+	.4byte	0x19bf
+	.uleb128 0x65
+	.4byte	.LASF458
 	.byte	0x1
 	.byte	0x87
 	.4byte	0xae
-	.uleb128 0x65
-	.4byte	.LASF446
+	.uleb128 0x67
+	.4byte	.LASF455
 	.byte	0x1
 	.byte	0x89
 	.4byte	0x54
 	.uleb128 0x51
-	.4byte	.LASF436
-	.4byte	0x2a2a
-	.4byte	.LASF448
+	.4byte	.LASF442
+	.4byte	0x2b1c
+	.4byte	.LASF457
 	.uleb128 0x53
-	.4byte	0x3e93
-	.uleb128 0x64
+	.4byte	0x4f17
+	.uleb128 0x66
 	.string	"__v"
 	.byte	0x1
 	.byte	0x8b
 	.4byte	0xae
 	.byte	0
 	.uleb128 0x54
-	.uleb128 0x64
+	.uleb128 0x66
 	.string	"__v"
 	.byte	0x1
 	.byte	0x95
 	.4byte	0xae
 	.byte	0
 	.byte	0
-	.uleb128 0x66
-	.4byte	.LASF453
+	.uleb128 0x68
+	.4byte	.LASF462
 	.byte	0x1
 	.byte	0x66
 	.8byte	.LFB271
 	.8byte	.LFE271-.LFB271
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3f3c
-	.uleb128 0x5b
-	.4byte	.LASF450
+	.4byte	0x4f9a
+	.uleb128 0x69
+	.4byte	.LASF459
 	.byte	0x1
 	.byte	0x66
-	.4byte	0x17c5
-	.4byte	.LLST14
-	.uleb128 0x5b
-	.4byte	.LASF451
+	.4byte	0x1817
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5e
+	.4byte	.LASF460
 	.byte	0x1
 	.byte	0x67
-	.4byte	0x17c5
-	.4byte	.LLST15
-	.uleb128 0x67
-	.4byte	.LASF452
+	.4byte	0x1817
+	.4byte	.LLST14
+	.uleb128 0x69
+	.4byte	.LASF461
 	.byte	0x1
 	.byte	0x68
 	.4byte	0x3b
 	.uleb128 0x1
 	.byte	0x52
-	.uleb128 0x5b
-	.4byte	.LASF429
+	.uleb128 0x69
+	.4byte	.LASF434
 	.byte	0x1
 	.byte	0x68
 	.4byte	0x54
-	.4byte	.LLST16
-	.uleb128 0x45
-	.8byte	.LBB46
-	.8byte	.LBE46-.LBB46
-	.4byte	0x3f1d
-	.uleb128 0x5f
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x6a
+	.8byte	.LBB36
+	.8byte	.LBE36-.LBB36
+	.uleb128 0x62
 	.string	"__v"
 	.byte	0x1
 	.byte	0x6a
 	.4byte	0xae
 	.4byte	0x20000
 	.byte	0
-	.uleb128 0x68
-	.8byte	.LBB47
-	.8byte	.LBE47-.LBB47
-	.uleb128 0x69
-	.string	"__v"
-	.byte	0x1
-	.byte	0x6b
-	.4byte	0xae
-	.sleb128 -1
-	.byte	0
 	.byte	0
-	.uleb128 0x66
-	.4byte	.LASF454
+	.uleb128 0x68
+	.4byte	.LASF463
 	.byte	0x1
 	.byte	0x5a
 	.8byte	.LFB270
 	.8byte	.LFE270-.LFB270
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4055
-	.uleb128 0x5b
-	.4byte	.LASF450
+	.4byte	0x508f
+	.uleb128 0x5e
+	.4byte	.LASF459
 	.byte	0x1
 	.byte	0x5a
-	.4byte	0x17c5
-	.4byte	.LLST32
-	.uleb128 0x5b
-	.4byte	.LASF451
+	.4byte	0x1817
+	.4byte	.LLST30
+	.uleb128 0x5e
+	.4byte	.LASF460
 	.byte	0x1
 	.byte	0x5b
-	.4byte	0x17c5
-	.4byte	.LLST33
-	.uleb128 0x5b
-	.4byte	.LASF452
+	.4byte	0x1817
+	.4byte	.LLST31
+	.uleb128 0x5e
+	.4byte	.LASF461
 	.byte	0x1
 	.byte	0x5c
 	.4byte	0x3b
-	.4byte	.LLST34
-	.uleb128 0x5b
-	.4byte	.LASF429
+	.4byte	.LLST32
+	.uleb128 0x5e
+	.4byte	.LASF434
 	.byte	0x1
 	.byte	0x5c
 	.4byte	0x54
-	.4byte	.LLST35
-	.uleb128 0x45
-	.8byte	.LBB50
-	.8byte	.LBE50-.LBB50
-	.4byte	0x3fb9
-	.uleb128 0x69
-	.string	"__v"
-	.byte	0x1
-	.byte	0x5e
-	.4byte	0xae
-	.sleb128 -65536
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB51
-	.8byte	.LBE51-.LBB51
-	.4byte	0x3fde
-	.uleb128 0x5f
+	.4byte	.LLST33
+	.uleb128 0x46
+	.8byte	.LBB39
+	.8byte	.LBE39-.LBB39
+	.4byte	0x5018
+	.uleb128 0x62
 	.string	"__v"
 	.byte	0x1
 	.byte	0x5f
 	.4byte	0xae
 	.4byte	0x20002
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB52
-	.8byte	.LBE52-.LBB52
-	.4byte	0x4004
-	.uleb128 0x69
+	.uleb128 0x46
+	.8byte	.LBB40
+	.8byte	.LBE40-.LBB40
+	.4byte	0x503e
+	.uleb128 0x6b
 	.string	"__v"
 	.byte	0x1
 	.byte	0x60
 	.4byte	0xae
 	.sleb128 -2147450880
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB53
-	.8byte	.LBE53-.LBB53
-	.4byte	0x402a
-	.uleb128 0x69
+	.uleb128 0x46
+	.8byte	.LBB41
+	.8byte	.LBE41-.LBB41
+	.4byte	0x5064
+	.uleb128 0x6b
 	.string	"__v"
 	.byte	0x1
 	.byte	0x62
@@ -10786,18 +13796,18 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.sleb128 -2147483648
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL63
-	.4byte	0x4776
-	.4byte	0x4041
+	.8byte	.LVL58
+	.4byte	0x57d2
+	.4byte	0x507b
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x1
 	.byte	0x32
 	.byte	0
-	.uleb128 0x6a
-	.8byte	.LVL65
-	.4byte	0x4776
+	.uleb128 0x6c
+	.8byte	.LVL60
+	.4byte	0x57d2
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -10805,56 +13815,56 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x31
 	.byte	0
 	.byte	0
-	.uleb128 0x66
-	.4byte	.LASF455
+	.uleb128 0x68
+	.4byte	.LASF464
 	.byte	0x1
 	.byte	0x52
 	.8byte	.LFB269
 	.8byte	.LFE269-.LFB269
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x40f1
-	.uleb128 0x5b
-	.4byte	.LASF450
+	.4byte	0x512b
+	.uleb128 0x5e
+	.4byte	.LASF459
 	.byte	0x1
 	.byte	0x52
-	.4byte	0x17c5
+	.4byte	0x1817
 	.4byte	.LLST12
-	.uleb128 0x5b
-	.4byte	.LASF451
+	.uleb128 0x5e
+	.4byte	.LASF460
 	.byte	0x1
 	.byte	0x53
-	.4byte	0x17c5
+	.4byte	0x1817
 	.4byte	.LLST13
-	.uleb128 0x67
-	.4byte	.LASF452
+	.uleb128 0x69
+	.4byte	.LASF461
 	.byte	0x1
 	.byte	0x54
 	.4byte	0x3b
 	.uleb128 0x1
 	.byte	0x52
-	.uleb128 0x67
-	.4byte	.LASF429
+	.uleb128 0x69
+	.4byte	.LASF434
 	.byte	0x1
 	.byte	0x54
 	.4byte	0x54
 	.uleb128 0x1
 	.byte	0x53
-	.uleb128 0x45
-	.8byte	.LBB44
-	.8byte	.LBE44-.LBB44
-	.4byte	0x40cf
-	.uleb128 0x5f
+	.uleb128 0x46
+	.8byte	.LBB34
+	.8byte	.LBE34-.LBB34
+	.4byte	0x5109
+	.uleb128 0x62
 	.string	"__v"
 	.byte	0x1
 	.byte	0x56
 	.4byte	0xae
 	.4byte	0x8000000
 	.byte	0
-	.uleb128 0x68
-	.8byte	.LBB45
-	.8byte	.LBE45-.LBB45
-	.uleb128 0x5f
+	.uleb128 0x6a
+	.8byte	.LBB35
+	.8byte	.LBE35-.LBB35
+	.uleb128 0x62
 	.string	"__v"
 	.byte	0x1
 	.byte	0x57
@@ -10862,56 +13872,56 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0x6000000
 	.byte	0
 	.byte	0
-	.uleb128 0x66
-	.4byte	.LASF456
+	.uleb128 0x68
+	.4byte	.LASF465
 	.byte	0x1
 	.byte	0x4a
 	.8byte	.LFB268
 	.8byte	.LFE268-.LFB268
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x418d
-	.uleb128 0x5b
-	.4byte	.LASF450
+	.4byte	0x51c7
+	.uleb128 0x5e
+	.4byte	.LASF459
 	.byte	0x1
 	.byte	0x4a
-	.4byte	0x17c5
+	.4byte	0x1817
 	.4byte	.LLST10
-	.uleb128 0x5b
-	.4byte	.LASF451
+	.uleb128 0x5e
+	.4byte	.LASF460
 	.byte	0x1
 	.byte	0x4b
-	.4byte	0x17c5
+	.4byte	0x1817
 	.4byte	.LLST11
-	.uleb128 0x67
-	.4byte	.LASF452
+	.uleb128 0x69
+	.4byte	.LASF461
 	.byte	0x1
 	.byte	0x4c
 	.4byte	0x3b
 	.uleb128 0x1
 	.byte	0x52
-	.uleb128 0x67
-	.4byte	.LASF429
+	.uleb128 0x69
+	.4byte	.LASF434
 	.byte	0x1
 	.byte	0x4c
 	.4byte	0x54
 	.uleb128 0x1
 	.byte	0x53
-	.uleb128 0x45
-	.8byte	.LBB42
-	.8byte	.LBE42-.LBB42
-	.4byte	0x416b
-	.uleb128 0x5f
+	.uleb128 0x46
+	.8byte	.LBB32
+	.8byte	.LBE32-.LBB32
+	.4byte	0x51a5
+	.uleb128 0x62
 	.string	"__v"
 	.byte	0x1
 	.byte	0x4e
 	.4byte	0xae
 	.4byte	0x8000800
 	.byte	0
-	.uleb128 0x68
-	.8byte	.LBB43
-	.8byte	.LBE43-.LBB43
-	.uleb128 0x5f
+	.uleb128 0x6a
+	.8byte	.LBB33
+	.8byte	.LBE33-.LBB33
+	.uleb128 0x62
 	.string	"__v"
 	.byte	0x1
 	.byte	0x4f
@@ -10919,55 +13929,55 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0x6000400
 	.byte	0
 	.byte	0
-	.uleb128 0x66
-	.4byte	.LASF457
+	.uleb128 0x68
+	.4byte	.LASF466
 	.byte	0x1
 	.byte	0x42
 	.8byte	.LFB267
 	.8byte	.LFE267-.LFB267
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4228
-	.uleb128 0x5b
-	.4byte	.LASF450
+	.4byte	0x5262
+	.uleb128 0x5e
+	.4byte	.LASF459
 	.byte	0x1
 	.byte	0x42
-	.4byte	0x17c5
+	.4byte	0x1817
 	.4byte	.LLST7
-	.uleb128 0x5b
-	.4byte	.LASF451
+	.uleb128 0x5e
+	.4byte	.LASF460
 	.byte	0x1
 	.byte	0x43
-	.4byte	0x17c5
+	.4byte	0x1817
 	.4byte	.LLST8
-	.uleb128 0x67
-	.4byte	.LASF452
+	.uleb128 0x69
+	.4byte	.LASF461
 	.byte	0x1
 	.byte	0x44
 	.4byte	0x3b
 	.uleb128 0x1
 	.byte	0x52
-	.uleb128 0x5b
-	.4byte	.LASF429
+	.uleb128 0x5e
+	.4byte	.LASF434
 	.byte	0x1
 	.byte	0x44
 	.4byte	0x54
 	.4byte	.LLST9
-	.uleb128 0x45
-	.8byte	.LBB40
-	.8byte	.LBE40-.LBB40
-	.4byte	0x4209
-	.uleb128 0x5f
+	.uleb128 0x46
+	.8byte	.LBB30
+	.8byte	.LBE30-.LBB30
+	.4byte	0x5243
+	.uleb128 0x62
 	.string	"__v"
 	.byte	0x1
 	.byte	0x46
 	.4byte	0xae
 	.4byte	0x40000
 	.byte	0
-	.uleb128 0x68
-	.8byte	.LBB41
-	.8byte	.LBE41-.LBB41
-	.uleb128 0x69
+	.uleb128 0x6a
+	.8byte	.LBB31
+	.8byte	.LBE31-.LBB31
+	.uleb128 0x6b
 	.string	"__v"
 	.byte	0x1
 	.byte	0x47
@@ -10975,56 +13985,56 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.sleb128 -1
 	.byte	0
 	.byte	0
-	.uleb128 0x66
-	.4byte	.LASF458
+	.uleb128 0x68
+	.4byte	.LASF467
 	.byte	0x1
 	.byte	0x3a
 	.8byte	.LFB266
 	.8byte	.LFE266-.LFB266
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x42c3
-	.uleb128 0x67
-	.4byte	.LASF450
+	.4byte	0x52fd
+	.uleb128 0x69
+	.4byte	.LASF459
 	.byte	0x1
 	.byte	0x3a
-	.4byte	0x17c5
+	.4byte	0x1817
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x5b
-	.4byte	.LASF451
+	.uleb128 0x5e
+	.4byte	.LASF460
 	.byte	0x1
 	.byte	0x3b
-	.4byte	0x17c5
+	.4byte	0x1817
 	.4byte	.LLST5
-	.uleb128 0x67
-	.4byte	.LASF452
+	.uleb128 0x69
+	.4byte	.LASF461
 	.byte	0x1
 	.byte	0x3c
 	.4byte	0x3b
 	.uleb128 0x1
 	.byte	0x52
-	.uleb128 0x5b
-	.4byte	.LASF429
+	.uleb128 0x5e
+	.4byte	.LASF434
 	.byte	0x1
 	.byte	0x3c
 	.4byte	0x54
 	.4byte	.LLST6
-	.uleb128 0x45
-	.8byte	.LBB38
-	.8byte	.LBE38-.LBB38
-	.4byte	0x42a1
-	.uleb128 0x69
+	.uleb128 0x46
+	.8byte	.LBB28
+	.8byte	.LBE28-.LBB28
+	.4byte	0x52db
+	.uleb128 0x6b
 	.string	"__v"
 	.byte	0x1
 	.byte	0x3e
 	.4byte	0xae
 	.sleb128 -65536
 	.byte	0
-	.uleb128 0x68
-	.8byte	.LBB39
-	.8byte	.LBE39-.LBB39
-	.uleb128 0x5f
+	.uleb128 0x6a
+	.8byte	.LBB29
+	.8byte	.LBE29-.LBB29
+	.uleb128 0x62
 	.string	"__v"
 	.byte	0x1
 	.byte	0x3f
@@ -11032,55 +14042,55 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0x40004
 	.byte	0
 	.byte	0
-	.uleb128 0x66
-	.4byte	.LASF459
+	.uleb128 0x68
+	.4byte	.LASF468
 	.byte	0x1
 	.byte	0x32
 	.8byte	.LFB265
 	.8byte	.LFE265-.LFB265
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x435e
-	.uleb128 0x5b
-	.4byte	.LASF450
+	.4byte	0x5398
+	.uleb128 0x5e
+	.4byte	.LASF459
 	.byte	0x1
 	.byte	0x32
-	.4byte	0x17c5
+	.4byte	0x1817
 	.4byte	.LLST2
-	.uleb128 0x5b
-	.4byte	.LASF451
+	.uleb128 0x5e
+	.4byte	.LASF460
 	.byte	0x1
 	.byte	0x33
-	.4byte	0x17c5
+	.4byte	0x1817
 	.4byte	.LLST3
-	.uleb128 0x67
-	.4byte	.LASF452
+	.uleb128 0x69
+	.4byte	.LASF461
 	.byte	0x1
 	.byte	0x34
 	.4byte	0x3b
 	.uleb128 0x1
 	.byte	0x52
-	.uleb128 0x5b
-	.4byte	.LASF429
+	.uleb128 0x5e
+	.4byte	.LASF434
 	.byte	0x1
 	.byte	0x34
 	.4byte	0x54
 	.4byte	.LLST4
-	.uleb128 0x45
-	.8byte	.LBB36
-	.8byte	.LBE36-.LBB36
-	.4byte	0x433f
-	.uleb128 0x5f
+	.uleb128 0x46
+	.8byte	.LBB26
+	.8byte	.LBE26-.LBB26
+	.4byte	0x5379
+	.uleb128 0x62
 	.string	"__v"
 	.byte	0x1
 	.byte	0x36
 	.4byte	0xae
 	.4byte	0x20000000
 	.byte	0
-	.uleb128 0x68
-	.8byte	.LBB37
-	.8byte	.LBE37-.LBB37
-	.uleb128 0x69
+	.uleb128 0x6a
+	.8byte	.LBB27
+	.8byte	.LBE27-.LBB27
+	.uleb128 0x6b
 	.string	"__v"
 	.byte	0x1
 	.byte	0x37
@@ -11088,56 +14098,56 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.sleb128 -1
 	.byte	0
 	.byte	0
-	.uleb128 0x66
-	.4byte	.LASF460
+	.uleb128 0x68
+	.4byte	.LASF469
 	.byte	0x1
 	.byte	0x2a
 	.8byte	.LFB264
 	.8byte	.LFE264-.LFB264
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x43f9
-	.uleb128 0x67
-	.4byte	.LASF450
+	.4byte	0x5433
+	.uleb128 0x69
+	.4byte	.LASF459
 	.byte	0x1
 	.byte	0x2a
-	.4byte	0x17c5
+	.4byte	0x1817
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x5b
-	.4byte	.LASF451
+	.uleb128 0x5e
+	.4byte	.LASF460
 	.byte	0x1
 	.byte	0x2b
-	.4byte	0x17c5
+	.4byte	0x1817
 	.4byte	.LLST0
-	.uleb128 0x67
-	.4byte	.LASF452
+	.uleb128 0x69
+	.4byte	.LASF461
 	.byte	0x1
 	.byte	0x2c
 	.4byte	0x3b
 	.uleb128 0x1
 	.byte	0x52
-	.uleb128 0x5b
-	.4byte	.LASF429
+	.uleb128 0x5e
+	.4byte	.LASF434
 	.byte	0x1
 	.byte	0x2c
 	.4byte	0x54
 	.4byte	.LLST1
-	.uleb128 0x45
-	.8byte	.LBB34
-	.8byte	.LBE34-.LBB34
-	.4byte	0x43d7
-	.uleb128 0x69
+	.uleb128 0x46
+	.8byte	.LBB24
+	.8byte	.LBE24-.LBB24
+	.4byte	0x5411
+	.uleb128 0x6b
 	.string	"__v"
 	.byte	0x1
 	.byte	0x2e
 	.4byte	0xae
 	.sleb128 -65536
 	.byte	0
-	.uleb128 0x68
-	.8byte	.LBB35
-	.8byte	.LBE35-.LBB35
-	.uleb128 0x5f
+	.uleb128 0x6a
+	.8byte	.LBB25
+	.8byte	.LBE25-.LBB25
+	.uleb128 0x62
 	.string	"__v"
 	.byte	0x1
 	.byte	0x2f
@@ -11145,46 +14155,46 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0x20002000
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
-	.4byte	.LASF472
-	.byte	0x1a
+	.uleb128 0x6d
+	.4byte	.LASF481
+	.byte	0x1c
 	.2byte	0x36f
 	.byte	0x3
-	.4byte	0x4413
+	.4byte	0x544d
 	.uleb128 0x3c
 	.string	"ptr"
-	.byte	0x1a
+	.byte	0x1c
 	.2byte	0x36f
-	.4byte	0x137
+	.4byte	0x13c
 	.byte	0
-	.uleb128 0x6c
-	.4byte	0x3db0
-	.8byte	.LFB287
-	.8byte	.LFE287-.LFB287
+	.uleb128 0x6e
+	.4byte	0x4e34
+	.8byte	.LFB289
+	.8byte	.LFE289-.LFB289
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x447d
-	.uleb128 0x6d
-	.4byte	0x3dc0
+	.4byte	0x54b7
+	.uleb128 0x6f
+	.4byte	0x4e44
 	.uleb128 0x42
-	.4byte	0x3dcb
-	.4byte	.LLST36
+	.4byte	0x4e4f
+	.4byte	.LLST34
 	.uleb128 0x42
-	.4byte	0x3dd6
-	.4byte	.LLST37
-	.uleb128 0x44
-	.4byte	0x3de1
+	.4byte	0x4e5a
+	.4byte	.LLST35
 	.uleb128 0x45
-	.8byte	.LBB54
-	.8byte	.LBE54-.LBB54
-	.4byte	0x4469
+	.4byte	0x4e65
+	.uleb128 0x46
+	.8byte	.LBB42
+	.8byte	.LBE42-.LBB42
+	.4byte	0x54a3
 	.uleb128 0x42
-	.4byte	0x3ded
-	.4byte	.LLST38
+	.4byte	0x4e71
+	.4byte	.LLST36
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL71
-	.4byte	0x4776
+	.8byte	.LVL66
+	.4byte	0x57d2
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -11192,35 +14202,35 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x31
 	.byte	0
 	.byte	0
-	.uleb128 0x6c
-	.4byte	0x3dfa
-	.8byte	.LFB288
-	.8byte	.LFE288-.LFB288
+	.uleb128 0x6e
+	.4byte	0x4e7e
+	.8byte	.LFB290
+	.8byte	.LFE290-.LFB290
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x44e8
-	.uleb128 0x6d
-	.4byte	0x3e0a
+	.4byte	0x5522
+	.uleb128 0x6f
+	.4byte	0x4e8e
 	.uleb128 0x42
-	.4byte	0x3e15
-	.4byte	.LLST39
+	.4byte	0x4e99
+	.4byte	.LLST37
 	.uleb128 0x42
-	.4byte	0x3e20
-	.4byte	.LLST40
-	.uleb128 0x47
-	.4byte	0x3e2b
+	.4byte	0x4ea4
+	.4byte	.LLST38
+	.uleb128 0x48
+	.4byte	0x4eaf
 	.sleb128 -1
-	.uleb128 0x45
-	.8byte	.LBB55
-	.8byte	.LBE55-.LBB55
-	.4byte	0x44d4
+	.uleb128 0x46
+	.8byte	.LBB43
+	.8byte	.LBE43-.LBB43
+	.4byte	0x550e
 	.uleb128 0x42
-	.4byte	0x3e37
-	.4byte	.LLST41
+	.4byte	0x4ebb
+	.4byte	.LLST39
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL79
-	.4byte	0x4776
+	.8byte	.LVL74
+	.4byte	0x57d2
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -11228,57 +14238,57 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x31
 	.byte	0
 	.byte	0
-	.uleb128 0x6c
-	.4byte	0x3e44
-	.8byte	.LFB289
-	.8byte	.LFE289-.LFB289
+	.uleb128 0x6e
+	.4byte	0x4ec8
+	.8byte	.LFB291
+	.8byte	.LFE291-.LFB291
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x45d5
+	.4byte	0x560f
 	.uleb128 0x3a
-	.4byte	0x3e5f
-	.4byte	.LLST42
-	.uleb128 0x6d
-	.4byte	0x3e54
+	.4byte	0x4ee3
+	.4byte	.LLST40
+	.uleb128 0x6f
+	.4byte	0x4ed8
 	.uleb128 0x42
-	.4byte	0x3e6a
-	.4byte	.LLST43
-	.uleb128 0x44
-	.4byte	0x3e75
+	.4byte	0x4eee
+	.4byte	.LLST41
 	.uleb128 0x45
-	.8byte	.LBB62
-	.8byte	.LBE62-.LBB62
-	.4byte	0x453e
+	.4byte	0x4ef9
+	.uleb128 0x46
+	.8byte	.LBB50
+	.8byte	.LBE50-.LBB50
+	.4byte	0x5578
 	.uleb128 0x42
-	.4byte	0x3e87
-	.4byte	.LLST44
+	.4byte	0x4f0b
+	.4byte	.LLST42
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB63
-	.8byte	.LBE63-.LBB63
-	.4byte	0x455d
+	.uleb128 0x46
+	.8byte	.LBB51
+	.8byte	.LBE51-.LBB51
+	.4byte	0x5597
 	.uleb128 0x42
-	.4byte	0x3e94
-	.4byte	.LLST45
+	.4byte	0x4f18
+	.4byte	.LLST43
 	.byte	0
+	.uleb128 0x46
+	.8byte	.LBB52
+	.8byte	.LBE52-.LBB52
+	.4byte	0x55fb
+	.uleb128 0x6f
+	.4byte	0x4ee3
+	.uleb128 0x6f
+	.4byte	0x4ed8
+	.uleb128 0x6a
+	.8byte	.LBB53
+	.8byte	.LBE53-.LBB53
 	.uleb128 0x45
-	.8byte	.LBB64
-	.8byte	.LBE64-.LBB64
-	.4byte	0x45c1
-	.uleb128 0x6d
-	.4byte	0x3e5f
-	.uleb128 0x6d
-	.4byte	0x3e54
-	.uleb128 0x68
-	.8byte	.LBB65
-	.8byte	.LBE65-.LBB65
-	.uleb128 0x44
-	.4byte	0x3e6a
-	.uleb128 0x44
-	.4byte	0x3e75
+	.4byte	0x4eee
+	.uleb128 0x45
+	.4byte	0x4ef9
 	.uleb128 0x36
-	.8byte	.LVL94
-	.4byte	0x475f
+	.8byte	.LVL89
+	.4byte	0x57bb
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -11295,8 +14305,8 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL91
-	.4byte	0x4776
+	.8byte	.LVL86
+	.4byte	0x57d2
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -11304,102 +14314,110 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x31
 	.byte	0
 	.byte	0
-	.uleb128 0x6c
-	.4byte	0x3d0f
-	.8byte	.LFB292
-	.8byte	.LFE292-.LFB292
+	.uleb128 0x6e
+	.4byte	0x4d93
+	.8byte	.LFB275
+	.8byte	.LFE275-.LFB275
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4731
+	.4byte	0x578d
 	.uleb128 0x3a
-	.4byte	0x3d1f
-	.4byte	.LLST46
+	.4byte	0x4da3
+	.4byte	.LLST62
+	.uleb128 0x3a
+	.4byte	0x4dae
+	.4byte	.LLST63
 	.uleb128 0x42
-	.4byte	0x3d35
-	.4byte	.LLST47
-	.uleb128 0x6e
-	.4byte	0x3d2a
-	.byte	0x1
-	.uleb128 0x44
-	.4byte	0x3d40
+	.4byte	0x4db9
+	.4byte	.LLST64
 	.uleb128 0x45
-	.8byte	.LBB80
-	.8byte	.LBE80-.LBB80
-	.4byte	0x462c
-	.uleb128 0x47
-	.4byte	0x3d52
+	.4byte	0x4dc4
+	.uleb128 0x46
+	.8byte	.LBB174
+	.8byte	.LBE174-.LBB174
+	.4byte	0x5669
+	.uleb128 0x48
+	.4byte	0x4dd6
 	.sleb128 -16776704
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB81
-	.8byte	.LBE81-.LBB81
-	.4byte	0x464a
-	.uleb128 0x47
-	.4byte	0x3d63
+	.uleb128 0x46
+	.8byte	.LBB175
+	.8byte	.LBE175-.LBB175
+	.4byte	0x5687
+	.uleb128 0x48
+	.4byte	0x4de7
 	.sleb128 -65535
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB82
-	.8byte	.LBE82-.LBB82
-	.4byte	0x4666
-	.uleb128 0x48
-	.4byte	0x3d74
+	.uleb128 0x46
+	.8byte	.LBB176
+	.8byte	.LBE176-.LBB176
+	.4byte	0x56a3
+	.uleb128 0x49
+	.4byte	0x4df8
 	.byte	0xfa
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB83
-	.8byte	.LBE83-.LBB83
-	.4byte	0x4682
-	.uleb128 0x48
-	.4byte	0x3d85
-	.byte	0
+	.uleb128 0x46
+	.8byte	.LBB177
+	.8byte	.LBE177-.LBB177
+	.4byte	0x56c2
+	.uleb128 0x42
+	.4byte	0x4e09
+	.4byte	.LLST65
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB84
-	.8byte	.LBE84-.LBB84
-	.4byte	0x46a1
 	.uleb128 0x46
-	.4byte	0x3da3
-	.4byte	0x10001
+	.8byte	.LBB178
+	.8byte	.LBE178-.LBB178
+	.4byte	0x56e1
+	.uleb128 0x42
+	.4byte	0x4e27
+	.4byte	.LLST66
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LBB85
-	.8byte	.LBE85-.LBB85
-	.4byte	0x470d
+	.uleb128 0x46
+	.8byte	.LBB179
+	.8byte	.LBE179-.LBB179
+	.4byte	0x574d
 	.uleb128 0x3a
-	.4byte	0x3d1f
-	.4byte	.LLST48
+	.4byte	0x4da3
+	.4byte	.LLST67
 	.uleb128 0x3a
-	.4byte	0x3d2a
-	.4byte	.LLST49
-	.uleb128 0x68
-	.8byte	.LBB86
-	.8byte	.LBE86-.LBB86
-	.uleb128 0x44
-	.4byte	0x3d35
-	.uleb128 0x44
-	.4byte	0x3d40
+	.4byte	0x4dae
+	.4byte	.LLST68
+	.uleb128 0x6a
+	.8byte	.LBB180
+	.8byte	.LBE180-.LBB180
+	.uleb128 0x45
+	.4byte	0x563c
+	.uleb128 0x45
+	.4byte	0x5645
 	.uleb128 0x36
-	.8byte	.LVL106
-	.4byte	0x475f
+	.8byte	.LVL236
+	.4byte	0x57bb
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC4
+	.8byte	.LC8
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR1
+	.8byte	.LANCHOR2
+	.byte	0
 	.byte	0
 	.byte	0
+	.uleb128 0x46
+	.8byte	.LBB181
+	.8byte	.LBE181-.LBB181
+	.4byte	0x5769
+	.uleb128 0x49
+	.4byte	0x4e1a
+	.byte	0x9
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL102
-	.4byte	0x44e8
+	.8byte	.LVL232
+	.4byte	0x5522
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -11412,48 +14430,48 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x51
 	.uleb128 0x1
 	.byte	0x32
-	.uleb128 0x4d
-	.4byte	0x3e54
+	.uleb128 0x4c
+	.4byte	0x4ed8
 	.uleb128 0x3
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0
 	.byte	0
-	.uleb128 0x6f
-	.4byte	.LASF461
-	.4byte	.LASF461
+	.uleb128 0x70
+	.4byte	.LASF470
+	.4byte	.LASF470
 	.byte	0x8
 	.2byte	0x112
-	.uleb128 0x70
-	.4byte	.LASF462
-	.4byte	.LASF462
-	.byte	0x20
+	.uleb128 0x71
+	.4byte	.LASF471
+	.4byte	.LASF471
+	.byte	0x22
 	.byte	0x85
-	.uleb128 0x70
-	.4byte	.LASF463
-	.4byte	.LASF463
-	.byte	0x20
+	.uleb128 0x71
+	.4byte	.LASF472
+	.4byte	.LASF472
+	.byte	0x22
 	.byte	0x38
-	.uleb128 0x6f
-	.4byte	.LASF464
-	.4byte	.LASF464
+	.uleb128 0x70
+	.4byte	.LASF473
+	.4byte	.LASF473
 	.byte	0x8
 	.2byte	0x16b
+	.uleb128 0x71
+	.4byte	.LASF474
+	.4byte	.LASF474
+	.byte	0x23
+	.byte	0x13
 	.uleb128 0x70
-	.4byte	.LASF465
-	.4byte	.LASF465
-	.byte	0x21
-	.byte	0x13
-	.uleb128 0x6f
-	.4byte	.LASF466
-	.4byte	.LASF466
-	.byte	0x1a
-	.2byte	0x393
-	.uleb128 0x70
-	.4byte	.LASF467
-	.4byte	.LASF467
-	.byte	0x22
+	.4byte	.LASF475
+	.4byte	.LASF475
+	.byte	0x1c
+	.2byte	0x393
+	.uleb128 0x71
+	.4byte	.LASF476
+	.4byte	.LASF476
+	.byte	0x24
 	.byte	0xb
 	.byte	0
 	.section	.debug_abbrev,"",@progbits
@@ -12311,6 +15329,15 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0
 	.byte	0
 	.uleb128 0x43
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x44
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x31
@@ -12319,14 +15346,14 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x1
 	.byte	0
 	.byte	0
-	.uleb128 0x44
+	.uleb128 0x45
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x45
+	.uleb128 0x46
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x11
@@ -12337,7 +15364,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x46
+	.uleb128 0x47
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -12346,7 +15373,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x6
 	.byte	0
 	.byte	0
-	.uleb128 0x47
+	.uleb128 0x48
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -12355,7 +15382,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0xd
 	.byte	0
 	.byte	0
-	.uleb128 0x48
+	.uleb128 0x49
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -12364,15 +15391,6 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x49
-	.uleb128 0x34
-	.byte	0
-	.uleb128 0x31
-	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x18
-	.byte	0
-	.byte	0
 	.uleb128 0x4a
 	.uleb128 0xb
 	.byte	0x1
@@ -12384,15 +15402,6 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0
 	.uleb128 0x4b
 	.uleb128 0x4109
-	.byte	0
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x31
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x4c
-	.uleb128 0x4109
 	.byte	0x1
 	.uleb128 0x11
 	.uleb128 0x1
@@ -12400,7 +15409,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4d
+	.uleb128 0x4c
 	.uleb128 0x410a
 	.byte	0
 	.uleb128 0x31
@@ -12409,6 +15418,15 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
+	.uleb128 0x4d
+	.uleb128 0x4109
+	.byte	0
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
 	.uleb128 0x4e
 	.uleb128 0x5
 	.byte	0
@@ -12522,17 +15540,62 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x49
 	.uleb128 0x13
 	.uleb128 0x1c
-	.uleb128 0x6
+	.uleb128 0xd
 	.byte	0
 	.byte	0
 	.uleb128 0x58
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x1c
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x59
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x5a
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x1c
+	.uleb128 0x6
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
 	.uleb128 0x4109
 	.byte	0x1
 	.uleb128 0x11
 	.uleb128 0x1
 	.byte	0
 	.byte	0
-	.uleb128 0x59
+	.uleb128 0x5c
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -12557,7 +15620,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x5a
+	.uleb128 0x5d
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -12572,7 +15635,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x5b
+	.uleb128 0x5e
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -12587,7 +15650,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x5c
+	.uleb128 0x5f
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -12602,7 +15665,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x5d
+	.uleb128 0x60
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -12617,7 +15680,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x5e
+	.uleb128 0x61
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -12632,7 +15695,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x5f
+	.uleb128 0x62
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -12647,22 +15710,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x6
 	.byte	0
 	.byte	0
-	.uleb128 0x60
-	.uleb128 0x34
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0x5
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x18
-	.byte	0
-	.byte	0
-	.uleb128 0x61
+	.uleb128 0x63
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -12681,7 +15729,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x62
+	.uleb128 0x64
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -12694,7 +15742,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x63
+	.uleb128 0x65
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -12707,7 +15755,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x64
+	.uleb128 0x66
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -12720,7 +15768,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x65
+	.uleb128 0x67
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -12733,991 +15781,1402 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x66
+	.uleb128 0x68
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x6a
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.byte	0
+	.byte	0
+	.uleb128 0x6b
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x1c
+	.uleb128 0xd
+	.byte	0
+	.byte	0
+	.uleb128 0x6c
+	.uleb128 0x4109
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x2115
+	.uleb128 0x19
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x6d
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x20
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x6e
 	.uleb128 0x2e
 	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x6f
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x70
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
 	.uleb128 0x3
 	.uleb128 0xe
 	.uleb128 0x3a
 	.uleb128 0xb
 	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x27
-	.uleb128 0x19
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x12
-	.uleb128 0x7
-	.uleb128 0x40
-	.uleb128 0x18
-	.uleb128 0x2117
-	.uleb128 0x19
-	.uleb128 0x1
-	.uleb128 0x13
+	.uleb128 0x5
 	.byte	0
 	.byte	0
-	.uleb128 0x67
-	.uleb128 0x5
+	.uleb128 0x71
+	.uleb128 0x2e
 	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
 	.uleb128 0x3
 	.uleb128 0xe
 	.uleb128 0x3a
 	.uleb128 0xb
 	.uleb128 0x3b
 	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x68
-	.uleb128 0xb
-	.byte	0x1
-	.uleb128 0x11
+	.byte	0
+	.section	.debug_loc,"",@progbits
+.Ldebug_loc0:
+.LLST28:
+	.8byte	.LVL45
+	.8byte	.LVL46-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL46-1
+	.8byte	.LVL53
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL53
+	.8byte	.LFE288
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST29:
+	.8byte	.LVL47
+	.8byte	.LVL48
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL48
+	.8byte	.LVL53
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST15:
+	.8byte	.LVL28
+	.8byte	.LVL29
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL29
+	.8byte	.LFE287
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST16:
+	.8byte	.LVL28
+	.8byte	.LVL31
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xea
+	.byte	0x9f
+	.8byte	.LVL32
+	.8byte	.LFE287
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xea
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST17:
+	.8byte	.LVL30
+	.8byte	.LVL31
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST18:
+	.8byte	.LVL33
+	.8byte	.LVL34-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL34-1
+	.8byte	.LVL37
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL37
+	.8byte	.LVL38-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL38-1
+	.8byte	.LFE285
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST19:
+	.8byte	.LVL33
+	.8byte	.LVL34-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL34-1
+	.8byte	.LVL37
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL37
+	.8byte	.LVL38-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL38-1
+	.8byte	.LFE285
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST20:
+	.8byte	.LVL33
+	.8byte	.LVL34-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL34-1
+	.8byte	.LVL36
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL36
+	.8byte	.LVL38-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL38-1
+	.8byte	.LFE285
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST21:
+	.8byte	.LVL33
+	.8byte	.LVL34-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL34-1
+	.8byte	.LVL36
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL36
+	.8byte	.LVL38-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL38-1
+	.8byte	.LFE285
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST22:
+	.8byte	.LVL34
+	.8byte	.LVL35
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST23:
+	.8byte	.LVL39
+	.8byte	.LVL40-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL40-1
+	.8byte	.LVL43
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL43
+	.8byte	.LVL44-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL44-1
+	.8byte	.LFE284
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST24:
+	.8byte	.LVL39
+	.8byte	.LVL40-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL40-1
+	.8byte	.LVL43
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL43
+	.8byte	.LVL44-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL44-1
+	.8byte	.LFE284
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST25:
+	.8byte	.LVL39
+	.8byte	.LVL40-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL40-1
+	.8byte	.LVL42
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL42
+	.8byte	.LVL44-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL44-1
+	.8byte	.LFE284
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST26:
+	.8byte	.LVL39
+	.8byte	.LVL40-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL40-1
+	.8byte	.LVL42
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL42
+	.8byte	.LVL44-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL44-1
+	.8byte	.LFE284
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST27:
+	.8byte	.LVL40
+	.8byte	.LVL41
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST83:
+	.8byte	.LVL274
+	.8byte	.LVL275-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL275-1
+	.8byte	.LVL299
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL299
+	.8byte	.LVL302
+	.2byte	0x4
+	.byte	0xf3
 	.uleb128 0x1
-	.uleb128 0x12
-	.uleb128 0x7
-	.byte	0
-	.byte	0
-	.uleb128 0x69
-	.uleb128 0x34
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x1c
-	.uleb128 0xd
-	.byte	0
-	.byte	0
-	.uleb128 0x6a
-	.uleb128 0x4109
-	.byte	0x1
-	.uleb128 0x11
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL302
+	.8byte	.LFE283
+	.2byte	0x1
+	.byte	0x69
+	.8byte	0
+	.8byte	0
+.LLST84:
+	.8byte	.LVL274
+	.8byte	.LVL275-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL275-1
+	.8byte	.LVL301
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 236
+	.8byte	.LVL301
+	.8byte	.LVL302
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 92
+	.8byte	.LVL302
+	.8byte	.LFE283
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 236
+	.8byte	0
+	.8byte	0
+.LLST85:
+	.8byte	.LVL274
+	.8byte	.LVL275-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL275-1
+	.8byte	.LVL301
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 224
+	.8byte	.LVL301
+	.8byte	.LVL302
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 80
+	.8byte	.LVL302
+	.8byte	.LFE283
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 224
+	.8byte	0
+	.8byte	0
+.LLST86:
+	.8byte	.LVL274
+	.8byte	.LVL275-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL275-1
+	.8byte	.LVL280
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL280
+	.8byte	.LVL281
+	.2byte	0x4
+	.byte	0xf3
 	.uleb128 0x1
-	.uleb128 0x2115
-	.uleb128 0x19
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-	.uleb128 0x2e
-	.byte	0x1
-	.uleb128 0x3
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-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0x5
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-	.uleb128 0x19
-	.uleb128 0x20
-	.uleb128 0xb
+	.byte	0x53
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+	.8byte	.LVL283
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 	.uleb128 0x1
-	.uleb128 0x13
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-	.uleb128 0x2e
-	.byte	0x1
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-	.uleb128 0x11
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-	.uleb128 0x7
-	.uleb128 0x40
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-	.uleb128 0x2117
-	.uleb128 0x19
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 	.uleb128 0x1
-	.uleb128 0x13
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-	.uleb128 0x5
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-	.uleb128 0xb
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-	.uleb128 0x3b
-	.uleb128 0x5
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-	.uleb128 0xb
-	.byte	0
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-	.byte	0
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-.LLST30:
-	.8byte	.LVL48
-	.8byte	.LVL49-1
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+	.8byte	.LVL276
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+	.8byte	.LVL278
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+	.8byte	.LVL283
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 	.2byte	0x1
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-	.8byte	.LFE286
-	.2byte	0x4
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-	.uleb128 0x1
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-	.8byte	.LVL50
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-	.8byte	.LVL31
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-	.uleb128 0x1
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-	.8byte	.LVL31
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+	.8byte	.LVL290
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-	.8byte	.LFE285
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-	.8byte	.LVL33
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+	.8byte	.LVL290
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 	.2byte	0x1
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-	.8byte	.LVL36
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+	.8byte	.LVL292
+	.8byte	.LVL293
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+	.8byte	.LVL291
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 	.2byte	0x1
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-	.8byte	.LFE283
-	.2byte	0x4
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-	.uleb128 0x1
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-	.8byte	.LVL36
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+	.8byte	.LVL284
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 	.2byte	0x1
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+	.8byte	.LVL284
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 	.2byte	0x1
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 	.2byte	0x1
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 	.8byte	.LFE283
-	.2byte	0x4
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-	.uleb128 0x1
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-	.8byte	.LVL36
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+	.8byte	.LVL284
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 	.2byte	0x1
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 	.8byte	.LFE283
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-	.8byte	.LVL36
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+	.8byte	.LVL284
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+	.8byte	.LVL284
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-	.8byte	.LVL37
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 	.2byte	0x1
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-	.8byte	.LVL42
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 	.2byte	0x1
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 	.2byte	0x1
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-	.2byte	0x4
-	.byte	0xf3
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+	.8byte	.LVL359
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+	.2byte	0x1
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-	.8byte	.LVL42
-	.8byte	.LVL43-1
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 	.2byte	0x1
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 	.2byte	0x1
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 	.2byte	0x1
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-	.byte	0x51
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-	.8byte	.LVL42
-	.8byte	.LVL43-1
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 	.2byte	0x1
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 	.2byte	0x1
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-	.8byte	.LVL42
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 	.2byte	0x1
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 	.2byte	0x1
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 	.2byte	0x1
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-	.byte	0x53
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-	.8byte	.LVL43
-	.8byte	.LVL44
+	.byte	0x6a
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 	.2byte	0x1
 	.byte	0x50
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-	.8byte	.LVL175
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+	.2byte	0x1
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 	.2byte	0x1
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-	.2byte	0x3
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-	.8byte	.LVL175
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 	.2byte	0x1
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 	.2byte	0x1
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 	.2byte	0x1
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-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	.LVL187
-	.8byte	.LVL193
+	.byte	0x6a
+	.8byte	.LVL397
+	.8byte	.LVL398
 	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL193
-	.8byte	.LVL194
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	.LVL194
-	.8byte	.LVL196
+	.byte	0x50
+	.8byte	.LVL398
+	.8byte	.LVL400
 	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL196
-	.8byte	.LFE281
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
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-	.8byte	.LVL175
-	.8byte	.LVL176-1
+	.byte	0x6a
+	.8byte	.LVL400
+	.8byte	.LVL401
 	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL176-1
-	.8byte	.LVL186
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 216
-	.8byte	.LVL186
-	.8byte	.LVL187
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 88
-	.8byte	.LVL187
-	.8byte	.LFE281
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 216
-	.8byte	0
-	.8byte	0
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-	.8byte	.LVL175
-	.8byte	.LVL176-1
+	.byte	0x50
+	.8byte	.LVL401
+	.8byte	.LVL402
 	.2byte	0x1
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-	.8byte	.LVL176-1
-	.8byte	.LVL181
+	.byte	0x6a
+	.8byte	.LVL402
+	.8byte	.LVL403
 	.2byte	0x1
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-	.8byte	.LVL181
-	.8byte	.LVL183
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.8byte	.LVL183
-	.8byte	.LVL184
+	.byte	0x50
+	.8byte	.LVL403
+	.8byte	.LVL408
 	.2byte	0x1
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-	.8byte	.LVL187
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.8byte	.LVL187
-	.8byte	.LVL192
+	.byte	0x6a
+	.8byte	.LVL408
+	.8byte	.LVL409
 	.2byte	0x1
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-	.8byte	.LVL192
-	.8byte	.LVL194
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.8byte	.LVL194
-	.8byte	.LVL196
+	.byte	0x50
+	.8byte	.LVL409
+	.8byte	.LVL410
 	.2byte	0x1
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-	.8byte	.LVL196
-	.8byte	.LFE281
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
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-	.8byte	0
-	.8byte	0
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-	.8byte	.LVL177
-	.8byte	.LVL178
+	.byte	0x6a
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+	.8byte	.LVL411
 	.2byte	0x1
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-	.8byte	.LVL178
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+	.8byte	.LVL411
+	.8byte	.LVL413
 	.2byte	0x1
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-	.8byte	.LVL187
-	.8byte	.LFE281
+	.8byte	.LVL413
+	.8byte	.LVL414
+	.2byte	0x1
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+	.8byte	.LFE283
 	.2byte	0x1
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 	.8byte	0
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-	.8byte	.LVL177
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-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 216
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-	.8byte	.LVL187
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-	.sleb128 88
-	.8byte	.LVL187
-	.8byte	.LFE281
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-	.sleb128 216
-	.8byte	0
-	.8byte	0
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-	.8byte	.LVL179
-	.8byte	.LVL180
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+	.8byte	.LVL286
+	.8byte	.LVL287
 	.2byte	0x1
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+	.8byte	.LVL287
+	.8byte	.LVL289
 	.2byte	0x1
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-	.8byte	.LVL188
+	.byte	0x6c
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+	.8byte	.LVL308
 	.2byte	0x1
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-	.8byte	.LVL188
-	.8byte	.LVL193
+	.byte	0x6c
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+	.8byte	.LVL336
 	.2byte	0x1
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-	.8byte	.LVL196
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+	.8byte	.LVL337
+	.8byte	.LFE283
 	.2byte	0x1
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 	.8byte	0
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-	.8byte	.LVL190
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-	.2byte	0x1
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-	.2byte	0x1
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+	.8byte	.LVL329
+	.8byte	.LVL334
 	.2byte	0x1
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 	.2byte	0x1
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-	.2byte	0x3
-	.byte	0x88
-	.sleb128 1
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+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL335
+	.8byte	.LVL337
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 	.byte	0x9f
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-	.8byte	.LFE281
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+	.8byte	.LVL371
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+	.2byte	0x1
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+	.8byte	.LVL372
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 	.2byte	0x1
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-	.8byte	.LVL179
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+	.8byte	.LVL92
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-	.8byte	.LFE281
-	.2byte	0x2
-	.byte	0x30
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+	.8byte	.LFE280
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-	.8byte	.LVL197
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+	.8byte	.LVL92
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 	.2byte	0x1
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-	.8byte	.LVL197
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+	.8byte	.LVL92
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 	.2byte	0x1
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-	.8byte	.LVL197
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+	.8byte	.LVL92
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 	.2byte	0x1
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-	.8byte	.LVL197
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-	.8byte	.LVL197
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+	.8byte	.LVL92
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-	.2byte	0x1
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-	.2byte	0x1
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-	.2byte	0x1
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 	.2byte	0x1
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-	.2byte	0x1
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+	.8byte	.LVL114
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 	.2byte	0x1
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-	.2byte	0x1
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 	.2byte	0x1
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 	.2byte	0x1
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 	.2byte	0x1
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 	.2byte	0x1
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 	.2byte	0x1
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-	.8byte	.LVL199
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+	.8byte	.LVL93
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+	.8byte	.LVL101
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+	.8byte	.LVL103
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+	.8byte	.LVL104
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+	.sleb128 -16776704
+	.byte	0x9f
+	.8byte	.LVL114
+	.8byte	.LFE280
+	.2byte	0x6
+	.byte	0x11
+	.sleb128 -16776704
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST90:
-	.8byte	.LVL230
-	.8byte	.LVL232
+.LLST54:
+	.8byte	.LVL105
+	.8byte	.LVL113
 	.2byte	0x5
 	.byte	0x11
-	.sleb128 -65533
+	.sleb128 -65534
+	.byte	0x9f
+	.8byte	.LVL114
+	.8byte	.LFE280
+	.2byte	0x5
+	.byte	0x11
+	.sleb128 -65534
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST91:
-	.8byte	.LVL265
-	.8byte	.LVL268
+.LLST55:
+	.8byte	.LVL106
+	.8byte	.LVL113
+	.2byte	0x3
+	.byte	0x8
+	.byte	0xfc
+	.byte	0x9f
+	.8byte	.LVL114
+	.8byte	.LFE280
+	.2byte	0x3
+	.byte	0x8
+	.byte	0xfc
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST56:
+	.8byte	.LVL107
+	.8byte	.LVL113
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL114
+	.8byte	.LFE280
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST57:
+	.8byte	.LVL108
+	.8byte	.LVL113
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL114
+	.8byte	.LFE280
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST58:
+	.8byte	.LVL109
+	.8byte	.LVL113
+	.2byte	0x6
+	.byte	0xc
+	.4byte	0x10001
+	.byte	0x9f
+	.8byte	.LVL114
+	.8byte	.LFE280
+	.2byte	0x6
+	.byte	0xc
+	.4byte	0x10001
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST59:
+	.8byte	.LVL129
+	.8byte	.LVL134
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST60:
+	.8byte	.LVL170
+	.8byte	.LVL173
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST92:
-	.8byte	.LVL266
-	.8byte	.LVL285
+.LLST61:
+	.8byte	.LVL171
+	.8byte	.LVL202
 	.2byte	0x1
-	.byte	0x67
+	.byte	0x65
+	.8byte	.LVL202
+	.8byte	.LFE280
+	.2byte	0xa
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x38
+	.byte	0x25
+	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST50:
-	.8byte	.LVL108
-	.8byte	.LVL109-1
+.LLST69:
+	.8byte	.LVL239
+	.8byte	.LVL240-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL109-1
-	.8byte	.LVL117
+	.8byte	.LVL240-1
+	.8byte	.LVL249
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL249
+	.8byte	.LVL253
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL253
+	.8byte	.LVL254
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL117
+	.8byte	.LVL254
 	.8byte	.LFE279
 	.2byte	0x4
 	.byte	0xf3
@@ -13726,31 +17185,42 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST51:
-	.8byte	.LVL108
-	.8byte	.LVL109-1
+.LLST70:
+	.8byte	.LVL239
+	.8byte	.LVL240-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL109-1
-	.8byte	.LVL131
+	.8byte	.LVL240-1
+	.8byte	.LVL264
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL133
+	.8byte	.LVL266
 	.8byte	.LFE279
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST52:
-	.8byte	.LVL108
-	.8byte	.LVL109-1
+.LLST71:
+	.8byte	.LVL239
+	.8byte	.LVL240-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL109-1
-	.8byte	.LVL118
+	.8byte	.LVL240-1
+	.8byte	.LVL250
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL250
+	.8byte	.LVL253
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	.LVL253
+	.8byte	.LVL254
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL118
+	.8byte	.LVL254
 	.8byte	.LFE279
 	.2byte	0x4
 	.byte	0xf3
@@ -13759,170 +17229,200 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST53:
-	.8byte	.LVL108
-	.8byte	.LVL109-1
+.LLST72:
+	.8byte	.LVL239
+	.8byte	.LVL240-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL109-1
-	.8byte	.LVL118
+	.8byte	.LVL240-1
+	.8byte	.LVL250
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL118
-	.8byte	.LVL132
+	.8byte	.LVL250
+	.8byte	.LVL253
 	.2byte	0x3
 	.byte	0x87
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL133
-	.8byte	.LVL139
+	.8byte	.LVL253
+	.8byte	.LVL254
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL254
+	.8byte	.LVL265
+	.2byte	0x3
+	.byte	0x87
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL266
+	.8byte	.LVL272
 	.2byte	0x3
 	.byte	0x87
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL139
+	.8byte	.LVL272
 	.8byte	.LFE279
 	.2byte	0x1
 	.byte	0x67
 	.8byte	0
 	.8byte	0
-.LLST54:
-	.8byte	.LVL110
-	.8byte	.LVL111
+.LLST73:
+	.8byte	.LVL241
+	.8byte	.LVL242
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL111
-	.8byte	.LVL131
+	.8byte	.LVL242
+	.8byte	.LVL264
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL133
+	.8byte	.LVL266
 	.8byte	.LFE279
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST55:
-	.8byte	.LVL113
-	.8byte	.LVL114
+.LLST74:
+	.8byte	.LVL244
+	.8byte	.LVL246
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL114
-	.8byte	.LVL132
+	.8byte	.LVL246
+	.8byte	.LVL265
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL133
+	.8byte	.LVL266
 	.8byte	.LFE279
 	.2byte	0x1
 	.byte	0x68
 	.8byte	0
 	.8byte	0
-.LLST56:
-	.8byte	.LVL113
-	.8byte	.LVL129
+.LLST75:
+	.8byte	.LVL244
+	.8byte	.LVL262
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL133
-	.8byte	.LVL136
+	.8byte	.LVL266
+	.8byte	.LVL269
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL136
-	.8byte	.LVL137
+	.8byte	.LVL269
+	.8byte	.LVL270
 	.2byte	0x3
 	.byte	0x85
 	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL137
-	.8byte	.LVL140
+	.8byte	.LVL270
+	.8byte	.LVL273
 	.2byte	0x3
 	.byte	0x85
 	.sleb128 2
 	.byte	0x9f
-	.8byte	.LVL140
+	.8byte	.LVL273
 	.8byte	.LFE279
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST57:
-	.8byte	.LVL136
-	.8byte	.LVL138
+.LLST76:
+	.8byte	.LVL269
+	.8byte	.LVL271
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST58:
-	.8byte	.LVL113
-	.8byte	.LVL118
+.LLST77:
+	.8byte	.LVL244
+	.8byte	.LVL250
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL118
-	.8byte	.LVL120
+	.8byte	.LVL250
+	.8byte	.LVL252
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL121
-	.8byte	.LVL127
+	.8byte	.LVL253
+	.8byte	.LVL254
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL254
+	.8byte	.LVL260
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL127
-	.8byte	.LVL128
+	.8byte	.LVL260
+	.8byte	.LVL261
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL128
-	.8byte	.LVL130
+	.8byte	.LVL261
+	.8byte	.LVL263
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL133
-	.8byte	.LVL134
+	.8byte	.LVL266
+	.8byte	.LVL267
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL134
+	.8byte	.LVL267
 	.8byte	.LFE279
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST59:
-	.8byte	.LVL122
-	.8byte	.LVL124
+.LLST78:
+	.8byte	.LVL248
+	.8byte	.LVL253
+	.2byte	0x6
+	.byte	0xc
+	.4byte	0x10001
+	.byte	0x9f
+	.8byte	.LVL254
+	.8byte	.LFE279
+	.2byte	0x6
+	.byte	0xc
+	.4byte	0x10001
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST79:
+	.8byte	.LVL255
+	.8byte	.LVL257
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL124
-	.8byte	.LVL125
+	.8byte	.LVL257
+	.8byte	.LVL258
 	.2byte	0x6
 	.byte	0x83
 	.sleb128 0
 	.byte	0x6
 	.byte	0x23
 	.uleb128 0x104
-	.8byte	.LVL125
-	.8byte	.LVL129
+	.8byte	.LVL258
+	.8byte	.LVL262
 	.2byte	0x8
 	.byte	0x84
-	.sleb128 -2
+	.sleb128 -1
 	.byte	0x11
 	.sleb128 -65536
 	.byte	0x21
 	.byte	0x9f
-	.8byte	.LVL133
+	.8byte	.LVL266
 	.8byte	.LFE279
 	.2byte	0x8
 	.byte	0x84
-	.sleb128 -2
+	.sleb128 -1
 	.byte	0x11
 	.sleb128 -65536
 	.byte	0x21
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST60:
-	.8byte	.LVL123
-	.8byte	.LVL129
+.LLST80:
+	.8byte	.LVL256
+	.8byte	.LVL262
 	.2byte	0x6
 	.byte	0xc
 	.4byte	0x10001
 	.byte	0x9f
-	.8byte	.LVL133
+	.8byte	.LVL266
 	.8byte	.LFE279
 	.2byte	0x6
 	.byte	0xc
@@ -13930,16 +17430,16 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST62:
-	.8byte	.LVL135
-	.8byte	.LVL138
+.LLST82:
+	.8byte	.LVL268
+	.8byte	.LVL271
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST61:
-	.8byte	.LVL129
-	.8byte	.LVL130
+.LLST81:
+	.8byte	.LVL262
+	.8byte	.LVL263
 	.2byte	0x4
 	.byte	0x40
 	.byte	0x3c
@@ -13947,60 +17447,60 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST93:
-	.8byte	.LVL309
-	.8byte	.LVL310-1
+.LLST120:
+	.8byte	.LVL449
+	.8byte	.LVL450-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL310-1
-	.8byte	.LVL317
+	.8byte	.LVL450-1
+	.8byte	.LVL457
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 224
-	.8byte	.LVL317
-	.8byte	.LVL318
+	.8byte	.LVL457
+	.8byte	.LVL458
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 96
-	.8byte	.LVL318
+	.8byte	.LVL458
 	.8byte	.LFE278
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 224
 	.8byte	0
 	.8byte	0
-.LLST94:
-	.8byte	.LVL309
-	.8byte	.LVL310-1
+.LLST121:
+	.8byte	.LVL449
+	.8byte	.LVL450-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL310-1
-	.8byte	.LVL314
+	.8byte	.LVL450-1
+	.8byte	.LVL454
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL314
-	.8byte	.LVL318
+	.8byte	.LVL454
+	.8byte	.LVL458
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL318
-	.8byte	.LVL323
+	.8byte	.LVL458
+	.8byte	.LVL463
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL323
-	.8byte	.LVL324
+	.8byte	.LVL463
+	.8byte	.LVL464
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL324
-	.8byte	.LVL326
+	.8byte	.LVL464
+	.8byte	.LVL466
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL326
+	.8byte	.LVL466
 	.8byte	.LFE278
 	.2byte	0x4
 	.byte	0xf3
@@ -14009,403 +17509,403 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST95:
-	.8byte	.LVL309
-	.8byte	.LVL310-1
+.LLST122:
+	.8byte	.LVL449
+	.8byte	.LVL450-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL310-1
-	.8byte	.LVL317
+	.8byte	.LVL450-1
+	.8byte	.LVL457
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 216
-	.8byte	.LVL317
-	.8byte	.LVL318
+	.8byte	.LVL457
+	.8byte	.LVL458
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 88
-	.8byte	.LVL318
+	.8byte	.LVL458
 	.8byte	.LFE278
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 216
 	.8byte	0
 	.8byte	0
-.LLST96:
-	.8byte	.LVL309
-	.8byte	.LVL310-1
+.LLST123:
+	.8byte	.LVL449
+	.8byte	.LVL450-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL310-1
-	.8byte	.LVL315
+	.8byte	.LVL450-1
+	.8byte	.LVL455
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL315
-	.8byte	.LVL318
+	.8byte	.LVL455
+	.8byte	.LVL458
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x53
 	.byte	0x9f
-	.8byte	.LVL318
+	.8byte	.LVL458
 	.8byte	.LFE278
 	.2byte	0x1
 	.byte	0x68
 	.8byte	0
 	.8byte	0
-.LLST97:
-	.8byte	.LVL311
-	.8byte	.LVL312
+.LLST124:
+	.8byte	.LVL451
+	.8byte	.LVL452
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL312
-	.8byte	.LVL316
+	.8byte	.LVL452
+	.8byte	.LVL456
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL318
+	.8byte	.LVL458
 	.8byte	.LFE278
 	.2byte	0x1
 	.byte	0x6b
 	.8byte	0
 	.8byte	0
-.LLST98:
-	.8byte	.LVL311
-	.8byte	.LVL317
+.LLST125:
+	.8byte	.LVL451
+	.8byte	.LVL457
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 216
-	.8byte	.LVL317
-	.8byte	.LVL318
+	.8byte	.LVL457
+	.8byte	.LVL458
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 88
-	.8byte	.LVL318
+	.8byte	.LVL458
 	.8byte	.LFE278
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 216
 	.8byte	0
 	.8byte	0
-.LLST99:
-	.8byte	.LVL313
-	.8byte	.LVL314
+.LLST126:
+	.8byte	.LVL453
+	.8byte	.LVL454
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL318
-	.8byte	.LVL319
+	.8byte	.LVL458
+	.8byte	.LVL459
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL319
-	.8byte	.LVL320-1
+	.8byte	.LVL459
+	.8byte	.LVL460-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL320-1
-	.8byte	.LVL322
+	.8byte	.LVL460-1
+	.8byte	.LVL462
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL324
-	.8byte	.LVL326
+	.8byte	.LVL464
+	.8byte	.LVL466
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST100:
-	.8byte	.LVL321
-	.8byte	.LVL323
+.LLST127:
+	.8byte	.LVL461
+	.8byte	.LVL463
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL324
-	.8byte	.LVL325
+	.8byte	.LVL464
+	.8byte	.LVL465
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST101:
-	.8byte	.LVL313
-	.8byte	.LVL314
+.LLST128:
+	.8byte	.LVL453
+	.8byte	.LVL454
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL318
-	.8byte	.LVL320
+	.8byte	.LVL458
+	.8byte	.LVL460
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL320
-	.8byte	.LVL321
+	.8byte	.LVL460
+	.8byte	.LVL461
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL323
-	.8byte	.LVL324
+	.8byte	.LVL463
+	.8byte	.LVL464
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL328
-	.8byte	.LVL333
+	.8byte	.LVL468
+	.8byte	.LVL473
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL334
-	.8byte	.LVL361
+	.8byte	.LVL474
+	.8byte	.LVL501
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL362
+	.8byte	.LVL502
 	.8byte	.LFE278
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST102:
-	.8byte	.LVL329
-	.8byte	.LVL333
+.LLST129:
+	.8byte	.LVL469
+	.8byte	.LVL473
 	.2byte	0x1
 	.byte	0x6c
-	.8byte	.LVL334
-	.8byte	.LVL359
+	.8byte	.LVL474
+	.8byte	.LVL499
 	.2byte	0x1
 	.byte	0x6c
-	.8byte	.LVL362
-	.8byte	.LVL409
+	.8byte	.LVL502
+	.8byte	.LVL549
 	.2byte	0x1
 	.byte	0x6c
 	.8byte	0
 	.8byte	0
-.LLST103:
-	.8byte	.LVL329
-	.8byte	.LVL333
+.LLST130:
+	.8byte	.LVL469
+	.8byte	.LVL473
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL334
-	.8byte	.LVL361
+	.8byte	.LVL474
+	.8byte	.LVL501
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL362
+	.8byte	.LVL502
 	.8byte	.LFE278
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST104:
-	.8byte	.LVL329
-	.8byte	.LVL333
+.LLST131:
+	.8byte	.LVL469
+	.8byte	.LVL473
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL334
-	.8byte	.LVL361
+	.8byte	.LVL474
+	.8byte	.LVL501
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL362
+	.8byte	.LVL502
 	.8byte	.LFE278
 	.2byte	0x1
 	.byte	0x6b
 	.8byte	0
 	.8byte	0
-.LLST105:
-	.8byte	.LVL329
-	.8byte	.LVL333
+.LLST132:
+	.8byte	.LVL469
+	.8byte	.LVL473
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 224
-	.8byte	.LVL334
-	.8byte	.LVL361
+	.8byte	.LVL474
+	.8byte	.LVL501
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 224
-	.8byte	.LVL362
+	.8byte	.LVL502
 	.8byte	.LFE278
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 224
 	.8byte	0
 	.8byte	0
-.LLST106:
-	.8byte	.LVL329
-	.8byte	.LVL333
+.LLST133:
+	.8byte	.LVL469
+	.8byte	.LVL473
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL334
-	.8byte	.LVL357
+	.8byte	.LVL474
+	.8byte	.LVL497
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL357
-	.8byte	.LVL358
+	.8byte	.LVL497
+	.8byte	.LVL498
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL358
-	.8byte	.LVL361
+	.8byte	.LVL498
+	.8byte	.LVL501
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL362
-	.8byte	.LVL363
+	.8byte	.LVL502
+	.8byte	.LVL503
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL363
-	.8byte	.LVL381
+	.8byte	.LVL503
+	.8byte	.LVL521
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL381
-	.8byte	.LVL382
+	.8byte	.LVL521
+	.8byte	.LVL522
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL382
-	.8byte	.LVL383
+	.8byte	.LVL522
+	.8byte	.LVL523
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL383
-	.8byte	.LVL384
+	.8byte	.LVL523
+	.8byte	.LVL524
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL384
-	.8byte	.LVL390
+	.8byte	.LVL524
+	.8byte	.LVL530
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL390
-	.8byte	.LVL391
+	.8byte	.LVL530
+	.8byte	.LVL531
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL391
-	.8byte	.LVL392
+	.8byte	.LVL531
+	.8byte	.LVL532
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL392
-	.8byte	.LVL393
+	.8byte	.LVL532
+	.8byte	.LVL533
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL393
-	.8byte	.LVL397
+	.8byte	.LVL533
+	.8byte	.LVL537
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL397
-	.8byte	.LVL398
+	.8byte	.LVL537
+	.8byte	.LVL538
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL398
-	.8byte	.LVL399
+	.8byte	.LVL538
+	.8byte	.LVL539
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL399
-	.8byte	.LVL400
+	.8byte	.LVL539
+	.8byte	.LVL540
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL400
-	.8byte	.LVL405
+	.8byte	.LVL540
+	.8byte	.LVL545
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL405
-	.8byte	.LVL406
+	.8byte	.LVL545
+	.8byte	.LVL546
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL406
-	.8byte	.LVL407
+	.8byte	.LVL546
+	.8byte	.LVL547
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL407
-	.8byte	.LVL408
+	.8byte	.LVL547
+	.8byte	.LVL548
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL408
-	.8byte	.LVL415
+	.8byte	.LVL548
+	.8byte	.LVL555
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL415
-	.8byte	.LVL416
+	.8byte	.LVL555
+	.8byte	.LVL556
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL416
-	.8byte	.LVL417
+	.8byte	.LVL556
+	.8byte	.LVL557
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL417
-	.8byte	.LVL418
+	.8byte	.LVL557
+	.8byte	.LVL558
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL418
-	.8byte	.LVL420
+	.8byte	.LVL558
+	.8byte	.LVL560
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL420
-	.8byte	.LVL421
+	.8byte	.LVL560
+	.8byte	.LVL561
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL421
-	.8byte	.LVL422
+	.8byte	.LVL561
+	.8byte	.LVL562
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL422
-	.8byte	.LVL423
+	.8byte	.LVL562
+	.8byte	.LVL563
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL423
-	.8byte	.LVL428
+	.8byte	.LVL563
+	.8byte	.LVL568
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL428
-	.8byte	.LVL429
+	.8byte	.LVL568
+	.8byte	.LVL569
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL429
-	.8byte	.LVL430
+	.8byte	.LVL569
+	.8byte	.LVL570
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL430
-	.8byte	.LVL431
+	.8byte	.LVL570
+	.8byte	.LVL571
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL431
-	.8byte	.LVL433
+	.8byte	.LVL571
+	.8byte	.LVL573
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL433
-	.8byte	.LVL434
+	.8byte	.LVL573
+	.8byte	.LVL574
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL434
+	.8byte	.LVL574
 	.8byte	.LFE278
 	.2byte	0x1
 	.byte	0x6a
 	.8byte	0
 	.8byte	0
-.LLST107:
-	.8byte	.LVL331
-	.8byte	.LVL332
+.LLST134:
+	.8byte	.LVL471
+	.8byte	.LVL472
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL332
-	.8byte	.LVL333
+	.8byte	.LVL472
+	.8byte	.LVL473
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 232
-	.8byte	.LVL334
-	.8byte	.LVL361
+	.8byte	.LVL474
+	.8byte	.LVL501
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 232
-	.8byte	.LVL362
+	.8byte	.LVL502
 	.8byte	.LFE278
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 232
 	.8byte	0
 	.8byte	0
-.LLST108:
-	.8byte	.LVL352
-	.8byte	.LVL354
+.LLST135:
+	.8byte	.LVL492
+	.8byte	.LVL494
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL354
-	.8byte	.LVL355
+	.8byte	.LVL494
+	.8byte	.LVL495
 	.2byte	0x6
 	.byte	0x8b
 	.sleb128 0
 	.byte	0x6
 	.byte	0x23
 	.uleb128 0x1038
-	.8byte	.LVL355
-	.8byte	.LVL361
+	.8byte	.LVL495
+	.8byte	.LVL501
 	.2byte	0x6
 	.byte	0x83
 	.sleb128 0
@@ -14413,7 +17913,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0xf8
 	.byte	0x24
 	.byte	0x9f
-	.8byte	.LVL362
+	.8byte	.LVL502
 	.8byte	.LFE278
 	.2byte	0x6
 	.byte	0x83
@@ -14424,32 +17924,32 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST109:
-	.8byte	.LVL360
-	.8byte	.LVL362
+.LLST136:
+	.8byte	.LVL500
+	.8byte	.LVL502
 	.2byte	0x5
 	.byte	0x11
 	.sleb128 -65533
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST110:
-	.8byte	.LVL394
-	.8byte	.LVL409
+.LLST137:
+	.8byte	.LVL534
+	.8byte	.LVL549
 	.2byte	0x1
 	.byte	0x6c
 	.8byte	0
 	.8byte	0
-.LLST63:
-	.8byte	.LVL141
-	.8byte	.LVL142-1
+.LLST109:
+	.8byte	.LVL415
+	.8byte	.LVL416-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL142-1
-	.8byte	.LVL150
+	.8byte	.LVL416-1
+	.8byte	.LVL424
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL150
+	.8byte	.LVL424
 	.8byte	.LFE276
 	.2byte	0x4
 	.byte	0xf3
@@ -14458,39 +17958,39 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST64:
-	.8byte	.LVL141
-	.8byte	.LVL142-1
+.LLST110:
+	.8byte	.LVL415
+	.8byte	.LVL416-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL142-1
-	.8byte	.LVL155
+	.8byte	.LVL416-1
+	.8byte	.LVL429
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL155
-	.8byte	.LVL156
+	.8byte	.LVL429
+	.8byte	.LVL430
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL156
-	.8byte	.LVL168
+	.8byte	.LVL430
+	.8byte	.LVL442
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL170
+	.8byte	.LVL444
 	.8byte	.LFE276
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST65:
-	.8byte	.LVL141
-	.8byte	.LVL142-1
+.LLST111:
+	.8byte	.LVL415
+	.8byte	.LVL416-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL142-1
-	.8byte	.LVL152
+	.8byte	.LVL416-1
+	.8byte	.LVL426
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL152
+	.8byte	.LVL426
 	.8byte	.LFE276
 	.2byte	0x4
 	.byte	0xf3
@@ -14499,23 +17999,23 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST66:
-	.8byte	.LVL141
-	.8byte	.LVL142-1
+.LLST112:
+	.8byte	.LVL415
+	.8byte	.LVL416-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL142-1
-	.8byte	.LVL151
+	.8byte	.LVL416-1
+	.8byte	.LVL425
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL151
-	.8byte	.LVL152
+	.8byte	.LVL425
+	.8byte	.LVL426
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x53
 	.byte	0x9f
-	.8byte	.LVL152
+	.8byte	.LVL426
 	.8byte	.LFE276
 	.2byte	0x6
 	.byte	0xf3
@@ -14526,46 +18026,46 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST67:
-	.8byte	.LVL143
-	.8byte	.LVL144
+.LLST113:
+	.8byte	.LVL417
+	.8byte	.LVL418
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL144
-	.8byte	.LVL168
+	.8byte	.LVL418
+	.8byte	.LVL442
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL170
+	.8byte	.LVL444
 	.8byte	.LFE276
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST68:
-	.8byte	.LVL146
-	.8byte	.LVL147
+.LLST114:
+	.8byte	.LVL420
+	.8byte	.LVL421
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL147
-	.8byte	.LVL167
+	.8byte	.LVL421
+	.8byte	.LVL441
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL170
+	.8byte	.LVL444
 	.8byte	.LFE276
 	.2byte	0x1
 	.byte	0x69
 	.8byte	0
 	.8byte	0
-.LLST69:
-	.8byte	.LVL146
-	.8byte	.LVL169
+.LLST115:
+	.8byte	.LVL420
+	.8byte	.LVL443
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL170
-	.8byte	.LVL174
+	.8byte	.LVL444
+	.8byte	.LVL448
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL174
+	.8byte	.LVL448
 	.8byte	.LFE276
 	.2byte	0x3
 	.byte	0x86
@@ -14573,58 +18073,58 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST70:
-	.8byte	.LVL146
-	.8byte	.LVL152
+.LLST116:
+	.8byte	.LVL420
+	.8byte	.LVL426
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL152
-	.8byte	.LVL154
+	.8byte	.LVL426
+	.8byte	.LVL428
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL155
-	.8byte	.LVL163
+	.8byte	.LVL429
+	.8byte	.LVL437
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL163
-	.8byte	.LVL164
+	.8byte	.LVL437
+	.8byte	.LVL438
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL164
-	.8byte	.LVL166
+	.8byte	.LVL438
+	.8byte	.LVL440
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL170
-	.8byte	.LVL171
+	.8byte	.LVL444
+	.8byte	.LVL445
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL171
+	.8byte	.LVL445
 	.8byte	.LFE276
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST71:
-	.8byte	.LVL157
-	.8byte	.LVL159
+.LLST117:
+	.8byte	.LVL431
+	.8byte	.LVL433
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL159
-	.8byte	.LVL160
+	.8byte	.LVL433
+	.8byte	.LVL434
 	.2byte	0x3
 	.byte	0x71
 	.sleb128 260
-	.8byte	.LVL160
-	.8byte	.LVL161
+	.8byte	.LVL434
+	.8byte	.LVL435
 	.2byte	0x6
 	.byte	0x83
 	.sleb128 0
 	.byte	0x6
 	.byte	0x23
 	.uleb128 0x104
-	.8byte	.LVL161
-	.8byte	.LVL165
+	.8byte	.LVL435
+	.8byte	.LVL439
 	.2byte	0x8
 	.byte	0x84
 	.sleb128 -1
@@ -14632,7 +18132,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.sleb128 -65536
 	.byte	0x21
 	.byte	0x9f
-	.8byte	.LVL170
+	.8byte	.LVL444
 	.8byte	.LFE276
 	.2byte	0x8
 	.byte	0x84
@@ -14643,14 +18143,14 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST72:
-	.8byte	.LVL158
-	.8byte	.LVL165
+.LLST118:
+	.8byte	.LVL432
+	.8byte	.LVL439
 	.2byte	0x6
 	.byte	0xc
 	.4byte	0x10001
 	.byte	0x9f
-	.8byte	.LVL170
+	.8byte	.LVL444
 	.8byte	.LFE276
 	.2byte	0x6
 	.byte	0xc
@@ -14658,9 +18158,9 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST73:
-	.8byte	.LVL165
-	.8byte	.LVL166
+.LLST119:
+	.8byte	.LVL439
+	.8byte	.LVL440
 	.2byte	0x4
 	.byte	0x40
 	.byte	0x3c
@@ -14669,20 +18169,6 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.8byte	0
 	.8byte	0
 .LLST14:
-	.8byte	.LVL26
-	.8byte	.LVL29
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL29
-	.8byte	.LFE271
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST15:
 	.8byte	.LVL26
 	.8byte	.LVL27
 	.2byte	0x1
@@ -14696,26 +18182,12 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST16:
-	.8byte	.LVL26
-	.8byte	.LVL30
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL30
-	.8byte	.LFE271
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST32:
+.LLST30:
+	.8byte	.LVL54
 	.8byte	.LVL57
-	.8byte	.LVL62
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL62
+	.8byte	.LVL57
 	.8byte	.LFE270
 	.2byte	0x4
 	.byte	0xf3
@@ -14724,16 +18196,16 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST33:
-	.8byte	.LVL57
-	.8byte	.LVL58
+.LLST31:
+	.8byte	.LVL54
+	.8byte	.LVL55
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL58
-	.8byte	.LVL64
+	.8byte	.LVL55
+	.8byte	.LVL59
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL64
+	.8byte	.LVL59
 	.8byte	.LFE270
 	.2byte	0x4
 	.byte	0xf3
@@ -14742,12 +18214,12 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST34:
-	.8byte	.LVL57
-	.8byte	.LVL63-1
+.LLST32:
+	.8byte	.LVL54
+	.8byte	.LVL58-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL63-1
+	.8byte	.LVL58-1
 	.8byte	.LFE270
 	.2byte	0x4
 	.byte	0xf3
@@ -14756,12 +18228,12 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST35:
-	.8byte	.LVL57
-	.8byte	.LVL59
+.LLST33:
+	.8byte	.LVL54
+	.8byte	.LVL58-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL59
+	.8byte	.LVL58-1
 	.8byte	.LFE270
 	.2byte	0x4
 	.byte	0xf3
@@ -14966,126 +18438,126 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST36:
-	.8byte	.LVL66
-	.8byte	.LVL69
+.LLST34:
+	.8byte	.LVL61
+	.8byte	.LVL64
 	.2byte	0x3
 	.byte	0x83
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL69
-	.8byte	.LVL70
+	.8byte	.LVL64
+	.8byte	.LVL65
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL70
-	.8byte	.LVL72
+	.8byte	.LVL65
+	.8byte	.LVL67
 	.2byte	0x3
 	.byte	0x83
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL72
-	.8byte	.LVL73
+	.8byte	.LVL67
+	.8byte	.LVL68
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST37:
-	.8byte	.LVL68
-	.8byte	.LVL71-1
+.LLST35:
+	.8byte	.LVL63
+	.8byte	.LVL66-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL72
-	.8byte	.LFE287
+	.8byte	.LVL67
+	.8byte	.LFE289
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST38:
-	.8byte	.LVL67
-	.8byte	.LVL71-1
+.LLST36:
+	.8byte	.LVL62
+	.8byte	.LVL66-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL72
-	.8byte	.LFE287
+	.8byte	.LVL67
+	.8byte	.LFE289
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST39:
-	.8byte	.LVL74
-	.8byte	.LVL77
+.LLST37:
+	.8byte	.LVL69
+	.8byte	.LVL72
 	.2byte	0x3
 	.byte	0x83
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL77
-	.8byte	.LVL79
+	.8byte	.LVL72
+	.8byte	.LVL74
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL79
-	.8byte	.LVL81
+	.8byte	.LVL74
+	.8byte	.LVL76
 	.2byte	0x3
 	.byte	0x83
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL82
-	.8byte	.LFE288
+	.8byte	.LVL77
+	.8byte	.LFE290
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST40:
-	.8byte	.LVL76
-	.8byte	.LVL78
+.LLST38:
+	.8byte	.LVL71
+	.8byte	.LVL73
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL80
-	.8byte	.LVL81
+	.8byte	.LVL75
+	.8byte	.LVL76
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL82
-	.8byte	.LVL83
+	.8byte	.LVL77
+	.8byte	.LVL78
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST41:
-	.8byte	.LVL75
-	.8byte	.LVL78
+.LLST39:
+	.8byte	.LVL70
+	.8byte	.LVL73
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL80
-	.8byte	.LVL81
+	.8byte	.LVL75
+	.8byte	.LVL76
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL82
-	.8byte	.LVL83
+	.8byte	.LVL77
+	.8byte	.LVL78
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST42:
-	.8byte	.LVL84
-	.8byte	.LVL85
+.LLST40:
+	.8byte	.LVL79
+	.8byte	.LVL80
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL85
-	.8byte	.LVL87
+	.8byte	.LVL80
+	.8byte	.LVL82
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL87
-	.8byte	.LVL89
+	.8byte	.LVL82
+	.8byte	.LVL84
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL89
-	.8byte	.LVL95
+	.8byte	.LVL84
+	.8byte	.LVL90
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL95
-	.8byte	.LFE289
+	.8byte	.LVL90
+	.8byte	.LFE291
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -15093,78 +18565,118 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST43:
-	.8byte	.LVL85
-	.8byte	.LVL91
+.LLST41:
+	.8byte	.LVL80
+	.8byte	.LVL86
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL91
-	.8byte	.LVL92
+	.8byte	.LVL86
+	.8byte	.LVL87
 	.2byte	0x3
 	.byte	0x84
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL92
-	.8byte	.LVL96
+	.8byte	.LVL87
+	.8byte	.LVL91
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST44:
-	.8byte	.LVL86
-	.8byte	.LVL88
+.LLST42:
+	.8byte	.LVL81
+	.8byte	.LVL83
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL89
-	.8byte	.LVL90
+	.8byte	.LVL84
+	.8byte	.LVL85
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST45:
-	.8byte	.LVL87
-	.8byte	.LVL89
+.LLST43:
+	.8byte	.LVL82
+	.8byte	.LVL84
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST46:
-	.8byte	.LVL97
-	.8byte	.LVL102-1
+.LLST62:
+	.8byte	.LVL226
+	.8byte	.LVL232-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL102-1
-	.8byte	.LFE292
+	.8byte	.LVL232-1
+	.8byte	.LVL238
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
+	.8byte	.LVL238
+	.8byte	.LFE275
+	.2byte	0x1
+	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST47:
-	.8byte	.LVL97
-	.8byte	.LVL103
+.LLST63:
+	.8byte	.LVL226
+	.8byte	.LVL230
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL230
+	.8byte	.LFE275
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST64:
+	.8byte	.LVL226
+	.8byte	.LVL233
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL103
-	.8byte	.LVL105
+	.8byte	.LVL233
+	.8byte	.LVL235
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL105
-	.8byte	.LVL107
+	.8byte	.LVL235
+	.8byte	.LVL237
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL107
-	.8byte	.LFE292
+	.8byte	.LVL237
+	.8byte	.LVL238
 	.2byte	0x1
 	.byte	0x50
+	.8byte	.LVL238
+	.8byte	.LFE275
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST65:
+	.8byte	.LVL229
+	.8byte	.LVL231
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST66:
+	.8byte	.LVL231
+	.8byte	.LVL238
+	.2byte	0x6
+	.byte	0xc
+	.4byte	0x10001
+	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST48:
-	.8byte	.LVL104
-	.8byte	.LVL106
+.LLST67:
+	.8byte	.LVL234
+	.8byte	.LVL236
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -15172,16 +18684,18 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST49:
-	.8byte	.LVL104
-	.8byte	.LVL106
-	.2byte	0x2
-	.byte	0x31
+.LLST68:
+	.8byte	.LVL234
+	.8byte	.LVL236
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
 	.section	.debug_aranges,"",@progbits
-	.4byte	0x15c
+	.4byte	0x16c
 	.2byte	0x2
 	.4byte	.Ldebug_info0
 	.byte	0x8
@@ -15202,172 +18716,262 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.8byte	.LFE269-.LFB269
 	.8byte	.LFB271
 	.8byte	.LFE271-.LFB271
-	.8byte	.LFB285
-	.8byte	.LFE285-.LFB285
-	.8byte	.LFB283
-	.8byte	.LFE283-.LFB283
-	.8byte	.LFB282
-	.8byte	.LFE282-.LFB282
-	.8byte	.LFB286
-	.8byte	.LFE286-.LFB286
-	.8byte	.LFB270
-	.8byte	.LFE270-.LFB270
 	.8byte	.LFB287
 	.8byte	.LFE287-.LFB287
+	.8byte	.LFB285
+	.8byte	.LFE285-.LFB285
+	.8byte	.LFB284
+	.8byte	.LFE284-.LFB284
 	.8byte	.LFB288
 	.8byte	.LFE288-.LFB288
+	.8byte	.LFB270
+	.8byte	.LFE270-.LFB270
 	.8byte	.LFB289
 	.8byte	.LFE289-.LFB289
-	.8byte	.LFB292
-	.8byte	.LFE292-.LFB292
+	.8byte	.LFB290
+	.8byte	.LFE290-.LFB290
+	.8byte	.LFB291
+	.8byte	.LFE291-.LFB291
+	.8byte	.LFB280
+	.8byte	.LFE280-.LFB280
+	.8byte	.LFB275
+	.8byte	.LFE275-.LFB275
 	.8byte	.LFB279
 	.8byte	.LFE279-.LFB279
+	.8byte	.LFB283
+	.8byte	.LFE283-.LFB283
 	.8byte	.LFB276
 	.8byte	.LFE276-.LFB276
-	.8byte	.LFB281
-	.8byte	.LFE281-.LFB281
 	.8byte	.LFB278
 	.8byte	.LFE278-.LFB278
 	.8byte	0
 	.8byte	0
 	.section	.debug_ranges,"",@progbits
 .Ldebug_ranges0:
+	.8byte	.LBB62
+	.8byte	.LBE62
+	.8byte	.LBB63
+	.8byte	.LBE63
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB78
+	.8byte	.LBE78
+	.8byte	.LBB80
+	.8byte	.LBE80
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB79
+	.8byte	.LBE79
+	.8byte	.LBB81
+	.8byte	.LBE81
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB82
+	.8byte	.LBE82
+	.8byte	.LBB83
+	.8byte	.LBE83
+	.8byte	0
+	.8byte	0
 	.8byte	.LBB87
 	.8byte	.LBE87
 	.8byte	.LBB88
 	.8byte	.LBE88
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB89
-	.8byte	.LBE89
-	.8byte	.LBB90
-	.8byte	.LBE90
+	.8byte	.LBB106
+	.8byte	.LBE106
+	.8byte	.LBB107
+	.8byte	.LBE107
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB91
-	.8byte	.LBE91
-	.8byte	.LBB92
-	.8byte	.LBE92
+	.8byte	.LBB112
+	.8byte	.LBE112
+	.8byte	.LBB113
+	.8byte	.LBE113
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB93
-	.8byte	.LBE93
-	.8byte	.LBB94
-	.8byte	.LBE94
+	.8byte	.LBB117
+	.8byte	.LBE117
+	.8byte	.LBB119
+	.8byte	.LBE119
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB96
-	.8byte	.LBE96
-	.8byte	.LBB97
-	.8byte	.LBE97
+	.8byte	.LBB118
+	.8byte	.LBE118
+	.8byte	.LBB120
+	.8byte	.LBE120
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB99
-	.8byte	.LBE99
-	.8byte	.LBB100
-	.8byte	.LBE100
+	.8byte	.LBB121
+	.8byte	.LBE121
+	.8byte	.LBB122
+	.8byte	.LBE122
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB101
-	.8byte	.LBE101
-	.8byte	.LBB102
-	.8byte	.LBE102
+	.8byte	.LBB126
+	.8byte	.LBE126
+	.8byte	.LBB127
+	.8byte	.LBE127
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB132
+	.8byte	.LBE132
+	.8byte	.LBB133
+	.8byte	.LBE133
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB137
+	.8byte	.LBE137
+	.8byte	.LBB138
+	.8byte	.LBE138
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB142
+	.8byte	.LBE142
+	.8byte	.LBB143
+	.8byte	.LBE143
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB149
+	.8byte	.LBE149
+	.8byte	.LBB150
+	.8byte	.LBE150
+	.8byte	0
 	.8byte	0
+	.8byte	.LBB154
+	.8byte	.LBE154
+	.8byte	.LBB155
+	.8byte	.LBE155
 	.8byte	0
-	.8byte	.LBB169
-	.8byte	.LBE169
-	.8byte	.LBB248
-	.8byte	.LBE248
-	.8byte	.LBB249
-	.8byte	.LBE249
-	.8byte	.LBB250
-	.8byte	.LBE250
-	.8byte	.LBB251
-	.8byte	.LBE251
 	.8byte	0
+	.8byte	.LBB158
+	.8byte	.LBE158
+	.8byte	.LBB159
+	.8byte	.LBE159
 	.8byte	0
-	.8byte	.LBB191
-	.8byte	.LBE191
-	.8byte	.LBB192
-	.8byte	.LBE192
 	.8byte	0
+	.8byte	.LBB182
+	.8byte	.LBE182
+	.8byte	.LBB183
+	.8byte	.LBE183
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB184
+	.8byte	.LBE184
+	.8byte	.LBB185
+	.8byte	.LBE185
 	.8byte	0
-	.8byte	.LBB193
-	.8byte	.LBE193
-	.8byte	.LBB194
-	.8byte	.LBE194
+	.8byte	0
+	.8byte	.LBB186
+	.8byte	.LBE186
+	.8byte	.LBB187
+	.8byte	.LBE187
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB211
-	.8byte	.LBE211
-	.8byte	.LBB212
-	.8byte	.LBE212
+	.8byte	.LBB188
+	.8byte	.LBE188
+	.8byte	.LBB189
+	.8byte	.LBE189
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB217
-	.8byte	.LBE217
-	.8byte	.LBB218
-	.8byte	.LBE218
+	.8byte	.LBB258
+	.8byte	.LBE258
+	.8byte	.LBB346
+	.8byte	.LBE346
+	.8byte	.LBB347
+	.8byte	.LBE347
+	.8byte	.LBB348
+	.8byte	.LBE348
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB221
-	.8byte	.LBE221
-	.8byte	.LBB223
-	.8byte	.LBE223
+	.8byte	.LBB263
+	.8byte	.LBE263
+	.8byte	.LBB344
+	.8byte	.LBE344
+	.8byte	.LBB345
+	.8byte	.LBE345
+	.8byte	.LBB349
+	.8byte	.LBE349
+	.8byte	.LBB350
+	.8byte	.LBE350
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB222
-	.8byte	.LBE222
-	.8byte	.LBB224
-	.8byte	.LBE224
+	.8byte	.LBB283
+	.8byte	.LBE283
+	.8byte	.LBB285
+	.8byte	.LBE285
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB225
-	.8byte	.LBE225
-	.8byte	.LBB226
-	.8byte	.LBE226
+	.8byte	.LBB284
+	.8byte	.LBE284
+	.8byte	.LBB286
+	.8byte	.LBE286
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB231
-	.8byte	.LBE231
-	.8byte	.LBB232
-	.8byte	.LBE232
+	.8byte	.LBB287
+	.8byte	.LBE287
+	.8byte	.LBB288
+	.8byte	.LBE288
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB237
-	.8byte	.LBE237
-	.8byte	.LBB238
-	.8byte	.LBE238
+	.8byte	.LBB289
+	.8byte	.LBE289
+	.8byte	.LBB290
+	.8byte	.LBE290
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB242
-	.8byte	.LBE242
-	.8byte	.LBB243
-	.8byte	.LBE243
+	.8byte	.LBB307
+	.8byte	.LBE307
+	.8byte	.LBB308
+	.8byte	.LBE308
 	.8byte	0
 	.8byte	0
 	.8byte	.LBB313
 	.8byte	.LBE313
-	.8byte	.LBB386
-	.8byte	.LBE386
-	.8byte	.LBB387
-	.8byte	.LBE387
-	.8byte	.LBB388
-	.8byte	.LBE388
-	.8byte	.LBB389
-	.8byte	.LBE389
+	.8byte	.LBB314
+	.8byte	.LBE314
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB317
+	.8byte	.LBE317
+	.8byte	.LBB319
+	.8byte	.LBE319
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB318
+	.8byte	.LBE318
+	.8byte	.LBB320
+	.8byte	.LBE320
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB321
+	.8byte	.LBE321
+	.8byte	.LBB322
+	.8byte	.LBE322
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB327
+	.8byte	.LBE327
+	.8byte	.LBB328
+	.8byte	.LBE328
 	.8byte	0
 	.8byte	0
+	.8byte	.LBB333
+	.8byte	.LBE333
 	.8byte	.LBB334
 	.8byte	.LBE334
-	.8byte	.LBB335
-	.8byte	.LBE335
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB336
-	.8byte	.LBE336
-	.8byte	.LBB337
-	.8byte	.LBE337
+	.8byte	.LBB338
+	.8byte	.LBE338
+	.8byte	.LBB339
+	.8byte	.LBE339
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB351
+	.8byte	.LBE351
+	.8byte	.LBB352
+	.8byte	.LBE352
 	.8byte	0
 	.8byte	0
 	.8byte	.LBB354
@@ -15376,34 +18980,70 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.8byte	.LBE355
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB360
-	.8byte	.LBE360
-	.8byte	.LBB361
-	.8byte	.LBE361
+	.8byte	.LBB356
+	.8byte	.LBE356
+	.8byte	.LBB357
+	.8byte	.LBE357
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB420
+	.8byte	.LBE420
+	.8byte	.LBB493
+	.8byte	.LBE493
+	.8byte	.LBB494
+	.8byte	.LBE494
+	.8byte	.LBB495
+	.8byte	.LBE495
+	.8byte	.LBB496
+	.8byte	.LBE496
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB364
-	.8byte	.LBE364
-	.8byte	.LBB365
-	.8byte	.LBE365
+	.8byte	.LBB441
+	.8byte	.LBE441
+	.8byte	.LBB442
+	.8byte	.LBE442
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB369
-	.8byte	.LBE369
-	.8byte	.LBB370
-	.8byte	.LBE370
+	.8byte	.LBB443
+	.8byte	.LBE443
+	.8byte	.LBB444
+	.8byte	.LBE444
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB375
-	.8byte	.LBE375
-	.8byte	.LBB376
-	.8byte	.LBE376
+	.8byte	.LBB461
+	.8byte	.LBE461
+	.8byte	.LBB462
+	.8byte	.LBE462
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB380
-	.8byte	.LBE380
-	.8byte	.LBB381
-	.8byte	.LBE381
+	.8byte	.LBB467
+	.8byte	.LBE467
+	.8byte	.LBB468
+	.8byte	.LBE468
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB471
+	.8byte	.LBE471
+	.8byte	.LBB472
+	.8byte	.LBE472
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB476
+	.8byte	.LBE476
+	.8byte	.LBB477
+	.8byte	.LBE477
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB482
+	.8byte	.LBE482
+	.8byte	.LBB483
+	.8byte	.LBE483
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB487
+	.8byte	.LBE487
+	.8byte	.LBB488
+	.8byte	.LBE488
 	.8byte	0
 	.8byte	0
 	.8byte	.LFB264
@@ -15420,30 +19060,32 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.8byte	.LFE269
 	.8byte	.LFB271
 	.8byte	.LFE271
-	.8byte	.LFB285
-	.8byte	.LFE285
-	.8byte	.LFB283
-	.8byte	.LFE283
-	.8byte	.LFB282
-	.8byte	.LFE282
-	.8byte	.LFB286
-	.8byte	.LFE286
-	.8byte	.LFB270
-	.8byte	.LFE270
 	.8byte	.LFB287
 	.8byte	.LFE287
+	.8byte	.LFB285
+	.8byte	.LFE285
+	.8byte	.LFB284
+	.8byte	.LFE284
 	.8byte	.LFB288
 	.8byte	.LFE288
+	.8byte	.LFB270
+	.8byte	.LFE270
 	.8byte	.LFB289
 	.8byte	.LFE289
-	.8byte	.LFB292
-	.8byte	.LFE292
+	.8byte	.LFB290
+	.8byte	.LFE290
+	.8byte	.LFB291
+	.8byte	.LFE291
+	.8byte	.LFB280
+	.8byte	.LFE280
+	.8byte	.LFB275
+	.8byte	.LFE275
 	.8byte	.LFB279
 	.8byte	.LFE279
+	.8byte	.LFB283
+	.8byte	.LFE283
 	.8byte	.LFB276
 	.8byte	.LFE276
-	.8byte	.LFB281
-	.8byte	.LFE281
 	.8byte	.LFB278
 	.8byte	.LFE278
 	.8byte	0
@@ -15453,95 +19095,95 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.section	.debug_str,"MS",@progbits,1
 .LASF30:
 	.string	"parent_platdata"
-.LASF451:
+.LASF460:
 	.string	"otp_cru_rst"
 .LASF100:
 	.string	"off_mem_rsvmap"
-.LASF183:
+.LASF186:
 	.string	"UCLASS_I2C_EEPROM"
-.LASF311:
+.LASF316:
 	.string	"jt_funcs"
-.LASF188:
+.LASF191:
 	.string	"UCLASS_IRQ"
 .LASF150:
 	.string	"initrd_start"
-.LASF182:
+.LASF185:
 	.string	"UCLASS_I2C"
 .LASF13:
 	.string	"sizetype"
-.LASF336:
+.LASF341:
 	.string	"net_hostname"
-.LASF331:
+.LASF336:
 	.string	"push_packet"
 .LASF54:
 	.string	"start"
-.LASF222:
+.LASF225:
 	.string	"UCLASS_SPI"
-.LASF308:
+.LASF313:
 	.string	"child"
-.LASF186:
+.LASF189:
 	.string	"UCLASS_I2S"
-.LASF358:
+.LASF363:
 	.string	"NETLOOP_RESTART"
-.LASF430:
+.LASF435:
 	.string	"otp_data"
-.LASF184:
+.LASF187:
 	.string	"UCLASS_I2C_GENERIC"
-.LASF196:
+.LASF199:
 	.string	"UCLASS_MOD_EXP"
-.LASF245:
+.LASF248:
 	.string	"UCLASS_IO_DOMAIN"
-.LASF261:
+.LASF266:
 	.string	"using_pre_serial"
 .LASF37:
 	.string	"uclass_priv"
-.LASF217:
+.LASF220:
 	.string	"UCLASS_RKNAND"
-.LASF159:
+.LASF162:
 	.string	"UCLASS_DEMO"
-.LASF404:
+.LASF409:
 	.string	"OTP_S"
 .LASF108:
 	.string	"ih_magic"
 .LASF46:
 	.string	"list_head"
-.LASF369:
+.LASF374:
 	.string	"child_pre_probe"
-.LASF425:
+.LASF430:
 	.string	"rockchip_secure_otp_ofdata_to_platdata"
-.LASF300:
+.LASF305:
 	.string	"pm_ctx_phys"
-.LASF163:
+.LASF166:
 	.string	"UCLASS_TEST_PROBE"
-.LASF306:
+.LASF311:
 	.string	"full_name"
-.LASF241:
+.LASF244:
 	.string	"UCLASS_KEY"
 .LASF80:
 	.string	"bi_intfreq"
-.LASF436:
+.LASF442:
 	.string	"__func__"
 .LASF11:
 	.string	"phys_addr_t"
-.LASF408:
+.LASF413:
 	.string	"write"
-.LASF236:
+.LASF239:
 	.string	"UCLASS_VIDEO_BRIDGE"
-.LASF299:
+.LASF304:
 	.string	"video_bottom"
 .LASF5:
 	.string	"__u8"
-.LASF357:
+.LASF362:
 	.string	"NETLOOP_CONTINUE"
-.LASF225:
+.LASF228:
 	.string	"UCLASS_SPI_GENERIC"
-.LASF294:
+.LASF299:
 	.string	"malloc_base"
-.LASF462:
+.LASF471:
 	.string	"dev_read_addr_ptr"
 .LASF56:
 	.string	"flash_info_t"
-.LASF201:
+.LASF204:
 	.string	"UCLASS_PANEL"
 .LASF125:
 	.string	"comp"
@@ -15549,111 +19191,111 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"image_header_t"
 .LASF155:
 	.string	"state"
-.LASF176:
+.LASF179:
 	.string	"UCLASS_CROS_EC"
 .LASF74:
 	.string	"bi_dsp_freq"
-.LASF423:
+.LASF428:
 	.string	"rockchip_otp_ids"
 .LASF122:
 	.string	"image_start"
-.LASF161:
+.LASF164:
 	.string	"UCLASS_TEST_FDT"
 .LASF65:
 	.string	"bd_info"
-.LASF355:
+.LASF360:
 	.string	"uclass_id"
 .LASF112:
 	.string	"ih_load"
-.LASF402:
+.LASF407:
 	.string	"DECOM_GZIP"
-.LASF315:
+.LASF320:
 	.string	"__dtb_dt_spl_begin"
-.LASF395:
+.LASF400:
 	.string	"pre_remove"
-.LASF446:
+.LASF455:
 	.string	"delay"
-.LASF431:
+.LASF436:
 	.string	"secure_otp_read"
 .LASF7:
 	.string	"__u32"
 .LASF35:
 	.string	"priv"
-.LASF297:
+.LASF302:
 	.string	"cur_serial_dev"
-.LASF342:
+.LASF347:
 	.string	"net_tx_packet"
-.LASF240:
+.LASF243:
 	.string	"UCLASS_FG"
-.LASF341:
+.LASF346:
 	.string	"net_server_ip"
-.LASF471:
+.LASF480:
 	.string	"ofnode_union"
-.LASF349:
+.LASF354:
 	.string	"net_native_vlan"
-.LASF238:
+.LASF241:
 	.string	"UCLASS_VIDEO_CRTC"
-.LASF175:
+.LASF178:
 	.string	"UCLASS_CODEC"
-.LASF291:
+.LASF296:
 	.string	"env_buf"
-.LASF440:
+.LASF451:
 	.string	"rockchip_secure_otp_write_byte"
 .LASF21:
 	.string	"errno"
 .LASF15:
 	.string	"long int"
-.LASF399:
+.LASF404:
 	.string	"__invalid_size_argument_for_IOC"
 .LASF69:
 	.string	"bi_flashsize"
 .LASF29:
 	.string	"platdata"
-.LASF206:
+.LASF209:
 	.string	"UCLASS_PHY"
-.LASF422:
+.LASF427:
 	.string	"rk3568_data"
-.LASF428:
+.LASF433:
 	.string	"secure_otp_write"
 .LASF93:
 	.string	"IRQ_STACK_START_IN"
 .LASF104:
 	.string	"size_dt_strings"
-.LASF235:
+.LASF238:
 	.string	"UCLASS_VIDEO"
-.LASF275:
+.LASF280:
 	.string	"relocaddr"
-.LASF386:
+.LASF391:
 	.string	"dev_head"
-.LASF470:
+.LASF479:
 	.string	"/home/zzz/code/u-boot"
-.LASF352:
+.LASF357:
 	.string	"net_boot_file_size"
 .LASF114:
 	.string	"ih_dcrc"
 .LASF79:
 	.string	"bi_ethspeed"
-.LASF158:
+.LASF161:
 	.string	"UCLASS_ROOT"
 .LASF44:
 	.string	"ide_bus_offset"
-.LASF339:
+.LASF344:
 	.string	"net_server_ethaddr"
 .LASF82:
 	.string	"bi_arch_number"
 .LASF3:
 	.string	"signed char"
-.LASF189:
+.LASF192:
 	.string	"UCLASS_KEYBOARD"
 .LASF18:
 	.string	"uint8_t"
-.LASF424:
+.LASF429:
 	.string	"_u_boot_list_2_driver_2_rockchip_secure_otp"
-.LASF374:
+.LASF379:
 	.string	"per_child_platdata_auto_alloc_size"
 .LASF45:
 	.string	"udevice"
-.LASF467:
+.LASF476:
 	.string	"udelay"
 .LASF116:
 	.string	"ih_arch"
@@ -15661,15 +19303,15 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"totalsize"
 .LASF109:
 	.string	"ih_hcrc"
-.LASF277:
+.LASF282:
 	.string	"mon_len"
-.LASF410:
+.LASF415:
 	.string	"call"
-.LASF442:
+.LASF452:
 	.string	"rockchip_secure_otp_read"
 .LASF124:
 	.string	"load"
-.LASF230:
+.LASF233:
 	.string	"UCLASS_TPM"
 .LASF59:
 	.string	"lmb_property"
@@ -15679,77 +19321,79 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"unsigned char"
 .LASF84:
 	.string	"bi_andr_version"
-.LASF157:
+.LASF158:
 	.string	"images"
-.LASF244:
+.LASF247:
 	.string	"UCLASS_DVFS"
 .LASF75:
 	.string	"bi_ddr_freq"
-.LASF190:
+.LASF193:
 	.string	"UCLASS_LED"
 .LASF111:
 	.string	"ih_size"
 .LASF39:
 	.string	"uclass_node"
-.LASF411:
+.LASF416:
 	.string	"rockchip_otp_platdata"
-.LASF248:
+.LASF251:
 	.string	"UCLASS_MDIO"
 .LASF23:
 	.string	"_Bool"
-.LASF375:
+.LASF380:
 	.string	"property"
-.LASF434:
+.LASF440:
 	.string	"rockchip_secure_otp_capability"
-.LASF361:
+.LASF366:
 	.string	"net_state"
-.LASF377:
+.LASF382:
 	.string	"value"
-.LASF420:
+.LASF425:
 	.string	"rk3308_data"
-.LASF445:
+.LASF454:
 	.string	"rockchip_secure_otp_check_flag"
-.LASF185:
+.LASF188:
 	.string	"UCLASS_I2C_MUX"
 .LASF14:
 	.string	"char"
 .LASF25:
 	.string	"_binary_u_boot_bin_start"
-.LASF234:
+.LASF237:
 	.string	"UCLASS_USB_GADGET_GENERIC"
-.LASF359:
+.LASF364:
 	.string	"NETLOOP_SUCCESS"
 .LASF36:
 	.string	"uclass"
-.LASF383:
+.LASF388:
 	.string	"p_current"
-.LASF385:
+.LASF390:
 	.string	"uc_drv"
-.LASF356:
+.LASF361:
 	.string	"net_loop_state"
 .LASF43:
 	.string	"req_seq"
-.LASF309:
+.LASF314:
 	.string	"sibling"
-.LASF283:
+.LASF288:
 	.string	"dm_root_f"
-.LASF322:
+.LASF327:
 	.string	"enetaddr"
-.LASF174:
+.LASF177:
 	.string	"UCLASS_AMP"
-.LASF212:
+.LASF215:
 	.string	"UCLASS_PWRSEQ"
-.LASF378:
+.LASF383:
 	.string	"of_offset"
 .LASF140:
 	.string	"fit_hdr_fdt"
-.LASF350:
+.LASF355:
 	.string	"net_restart_wrap"
-.LASF338:
+.LASF343:
 	.string	"net_ethaddr"
 .LASF42:
 	.string	"flags"
-.LASF466:
+.LASF444:
+	.string	"data_2b"
+.LASF475:
 	.string	"malloc_simple"
 .LASF117:
 	.string	"ih_type"
@@ -15757,23 +19401,23 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"off_dt_struct"
 .LASF70:
 	.string	"bi_flashoffset"
-.LASF351:
+.LASF356:
 	.string	"net_boot_file_name"
-.LASF388:
+.LASF393:
 	.string	"compatible"
-.LASF160:
+.LASF163:
 	.string	"UCLASS_TEST"
 .LASF110:
 	.string	"ih_time"
-.LASF270:
+.LASF275:
 	.string	"fb_base"
-.LASF267:
+.LASF272:
 	.string	"bus_clk"
-.LASF213:
+.LASF216:
 	.string	"UCLASS_RAM"
-.LASF457:
+.LASF466:
 	.string	"rk3308_spl_rockchip_otp_stop"
-.LASF179:
+.LASF182:
 	.string	"UCLASS_ETH"
 .LASF32:
 	.string	"node"
@@ -15781,21 +19425,23 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"image_info"
 .LASF127:
 	.string	"arch"
-.LASF269:
+.LASF274:
 	.string	"mem_clk"
-.LASF433:
+.LASF273:
+	.string	"pci_clk"
+.LASF439:
 	.string	"temp"
-.LASF458:
+.LASF467:
 	.string	"rk3308_spl_rockchip_otp_start"
-.LASF266:
+.LASF271:
 	.string	"cpu_clk"
 .LASF50:
 	.string	"select_hwpart"
-.LASF343:
+.LASF348:
 	.string	"net_rx_packets"
-.LASF380:
+.LASF385:
 	.string	"mem_malloc_start"
-.LASF447:
+.LASF456:
 	.string	"rockchip_secure_otp_wait_flag"
 .LASF92:
 	.string	"_datarelro_start_ofs"
@@ -15805,317 +19451,321 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"ih_ep"
 .LASF61:
 	.string	"lmb_region"
-.LASF393:
+.LASF398:
 	.string	"pre_probe"
-.LASF465:
+.LASF474:
 	.string	"printf"
-.LASF403:
+.LASF408:
 	.string	"DECOM_ZLIB"
 .LASF135:
 	.string	"fit_uname_os"
 .LASF76:
 	.string	"bi_bootflags"
-.LASF340:
+.LASF345:
 	.string	"net_ip"
-.LASF448:
+.LASF457:
 	.string	"rockchip_secure_otp_wait_status"
-.LASF289:
+.LASF294:
 	.string	"fdt_size"
-.LASF334:
+.LASF339:
 	.string	"net_dns_server"
-.LASF421:
+.LASF426:
 	.string	"rk3328_data"
-.LASF354:
+.LASF359:
 	.string	"net_ping_ip"
 .LASF63:
 	.string	"memory"
 .LASF95:
 	.string	"fdt_header"
-.LASF432:
+.LASF437:
 	.string	"rk3568_secure_otp_write"
-.LASF381:
+.LASF386:
 	.string	"mem_malloc_end"
-.LASF192:
+.LASF195:
 	.string	"UCLASS_MAILBOX"
 .LASF147:
 	.string	"rd_end"
-.LASF363:
+.LASF368:
 	.string	"bind"
-.LASF278:
+.LASF283:
 	.string	"irq_sp"
 .LASF152:
 	.string	"cmdline_start"
-.LASF329:
+.LASF334:
 	.string	"index"
-.LASF265:
+.LASF270:
 	.string	"global_data"
-.LASF397:
+.LASF402:
 	.string	"per_device_auto_alloc_size"
-.LASF435:
+.LASF441:
 	.string	"rk3568_secure_otp_write_2_bytes"
-.LASF220:
+.LASF223:
 	.string	"UCLASS_SCSI"
-.LASF232:
+.LASF235:
 	.string	"UCLASS_USB_DEV_GENERIC"
-.LASF193:
+.LASF196:
 	.string	"UCLASS_MASS_STORAGE"
 .LASF1:
 	.string	"long unsigned int"
-.LASF168:
+.LASF171:
 	.string	"UCLASS_SIMPLE_BUS"
-.LASF312:
+.LASF317:
 	.string	"gd_t"
-.LASF335:
+.LASF340:
 	.string	"net_nis_domain"
 .LASF142:
 	.string	"fit_noffset_fdt"
-.LASF456:
+.LASF465:
 	.string	"rk3328_spl_rockchip_otp_start"
-.LASF418:
+.LASF423:
 	.string	"rockchip_secure_otp_ops"
-.LASF360:
+.LASF365:
 	.string	"NETLOOP_FAIL"
-.LASF239:
+.LASF242:
 	.string	"UCLASS_WDT"
-.LASF255:
+.LASF260:
 	.string	"timer_reset_value"
-.LASF279:
+.LASF284:
 	.string	"start_addr_sp"
 .LASF71:
 	.string	"bi_sramstart"
 .LASF26:
 	.string	"_binary_u_boot_bin_end"
-.LASF419:
+.LASF424:
 	.string	"px30_data"
-.LASF280:
+.LASF285:
 	.string	"reloc_off"
 .LASF103:
 	.string	"boot_cpuid_phys"
-.LASF254:
+.LASF259:
 	.string	"lastinc"
-.LASF258:
+.LASF263:
 	.string	"tlb_fillptr"
 .LASF138:
 	.string	"fit_uname_rd"
-.LASF226:
+.LASF229:
 	.string	"UCLASS_SYSCON"
-.LASF173:
+.LASF176:
 	.string	"UCLASS_CPU"
 .LASF133:
 	.string	"fit_uname_cfg"
-.LASF221:
+.LASF224:
 	.string	"UCLASS_SERIAL"
-.LASF348:
+.LASF353:
 	.string	"net_our_vlan"
-.LASF301:
+.LASF306:
 	.string	"serial"
-.LASF455:
+.LASF464:
 	.string	"rk3328_spl_rockchip_otp_stop"
-.LASF364:
+.LASF369:
 	.string	"probe"
-.LASF171:
+.LASF174:
 	.string	"UCLASS_BLK"
 .LASF128:
 	.string	"image_info_t"
-.LASF167:
+.LASF170:
 	.string	"UCLASS_USB_EMUL"
-.LASF256:
+.LASF261:
 	.string	"tlb_addr"
-.LASF205:
+.LASF208:
 	.string	"UCLASS_PCI_GENERIC"
 .LASF123:
 	.string	"image_len"
 .LASF77:
 	.string	"bi_ip_addr"
-.LASF207:
+.LASF210:
 	.string	"UCLASS_PINCONFIG"
-.LASF325:
+.LASF330:
 	.string	"send"
-.LASF228:
+.LASF231:
 	.string	"UCLASS_THERMAL"
 .LASF131:
 	.string	"legacy_hdr_os_copy"
+.LASF160:
+	.string	"sha256_der_prefix"
 .LASF9:
 	.string	"long long int"
-.LASF400:
+.LASF405:
 	.string	"misc_mode"
-.LASF288:
+.LASF293:
 	.string	"new_fdt"
 .LASF22:
 	.string	"___strtok"
-.LASF353:
+.LASF358:
 	.string	"net_boot_file_expected_size_in_blocks"
-.LASF262:
+.LASF267:
 	.string	"enable"
-.LASF362:
+.LASF367:
 	.string	"of_match"
-.LASF200:
+.LASF203:
 	.string	"UCLASS_NVME"
-.LASF259:
+.LASF264:
 	.string	"tlb_emerg"
 .LASF129:
 	.string	"bootm_headers"
 .LASF55:
 	.string	"protect"
-.LASF231:
+.LASF234:
 	.string	"UCLASS_USB"
-.LASF390:
+.LASF395:
 	.string	"uclass_driver"
-.LASF242:
+.LASF245:
 	.string	"UCLASS_RC"
-.LASF292:
+.LASF297:
 	.string	"timebase_h"
-.LASF293:
+.LASF298:
 	.string	"timebase_l"
-.LASF177:
+.LASF180:
 	.string	"UCLASS_DISPLAY"
-.LASF347:
+.LASF352:
 	.string	"net_null_ethaddr"
-.LASF273:
+.LASF278:
 	.string	"env_valid"
 .LASF34:
 	.string	"parent"
-.LASF166:
+.LASF169:
 	.string	"UCLASS_PCI_EMUL"
 .LASF89:
 	.string	"_datarel_start_ofs"
 .LASF38:
 	.string	"parent_priv"
-.LASF405:
+.LASF410:
 	.string	"OTP_NS"
-.LASF243:
+.LASF246:
 	.string	"UCLASS_CHARGE_DISPLAY"
-.LASF316:
+.LASF321:
 	.string	"load_addr"
 .LASF134:
 	.string	"fit_hdr_os"
 .LASF90:
 	.string	"_datarelrolocal_start_ofs"
-.LASF464:
+.LASF473:
 	.string	"dev_get_driver_data"
-.LASF417:
+.LASF422:
 	.string	"spl_rockchip_otp_stop"
-.LASF264:
+.LASF269:
 	.string	"addr"
-.LASF460:
+.LASF469:
 	.string	"px30_spl_rockchip_otp_start"
-.LASF407:
+.LASF412:
 	.string	"read"
-.LASF452:
+.LASF461:
 	.string	"mask"
-.LASF437:
+.LASF446:
 	.string	"rk3568_secure_otp_read"
 .LASF8:
 	.string	"unsigned int"
 .LASF16:
 	.string	"ushort"
-.LASF321:
+.LASF326:
 	.string	"eth_device"
-.LASF409:
+.LASF414:
 	.string	"ioctl"
-.LASF463:
+.LASF472:
 	.string	"dev_read_u32_default"
-.LASF287:
+.LASF292:
 	.string	"ufdt_blob"
-.LASF371:
+.LASF376:
 	.string	"priv_auto_alloc_size"
-.LASF295:
+.LASF300:
 	.string	"malloc_limit"
-.LASF209:
+.LASF212:
 	.string	"UCLASS_PMIC"
-.LASF450:
+.LASF459:
 	.string	"secure_conf"
 .LASF130:
 	.string	"legacy_hdr_os"
 .LASF99:
 	.string	"off_dt_strings"
-.LASF313:
+.LASF318:
 	.string	"monitor_flash_len"
-.LASF194:
+.LASF197:
 	.string	"UCLASS_MISC"
 .LASF67:
 	.string	"bi_memsize"
-.LASF449:
+.LASF458:
 	.string	"flag"
+.LASF443:
+	.string	"rk3568_secure_otp_write_byte_noecc"
 .LASF24:
 	.string	"image_base"
-.LASF227:
+.LASF230:
 	.string	"UCLASS_SYSRESET"
-.LASF384:
+.LASF389:
 	.string	"current"
-.LASF181:
+.LASF184:
 	.string	"UCLASS_FIRMWARE"
-.LASF191:
+.LASF194:
 	.string	"UCLASS_LPC"
-.LASF429:
+.LASF434:
 	.string	"offset"
-.LASF187:
+.LASF190:
 	.string	"UCLASS_IDE"
-.LASF406:
+.LASF411:
 	.string	"misc_ops"
-.LASF305:
+.LASF310:
 	.string	"phandle"
-.LASF298:
+.LASF303:
 	.string	"video_top"
-.LASF398:
+.LASF403:
 	.string	"per_device_platdata_auto_alloc_size"
-.LASF156:
+.LASF157:
 	.string	"bootm_headers_t"
 .LASF73:
 	.string	"bi_arm_freq"
-.LASF215:
+.LASF218:
 	.string	"UCLASS_REMOTEPROC"
-.LASF326:
+.LASF331:
 	.string	"recv"
 .LASF126:
 	.string	"type"
 .LASF137:
 	.string	"fit_hdr_rd"
-.LASF272:
+.LASF277:
 	.string	"env_addr"
 .LASF72:
 	.string	"bi_sramsize"
-.LASF284:
+.LASF289:
 	.string	"uclass_root"
-.LASF180:
+.LASF183:
 	.string	"UCLASS_GPIO"
-.LASF414:
+.LASF419:
 	.string	"otp_cru_rst_base"
-.LASF443:
+.LASF449:
 	.string	"read_end"
-.LASF210:
+.LASF213:
 	.string	"UCLASS_PWM"
 .LASF58:
 	.string	"long double"
-.LASF274:
+.LASF279:
 	.string	"ram_top"
-.LASF303:
+.LASF308:
 	.string	"console_evt"
 .LASF146:
 	.string	"rd_start"
-.LASF441:
+.LASF448:
 	.string	"write_end"
-.LASF211:
-	.string	"UCLASS_POWER_DOMAIN"
 .LASF214:
+	.string	"UCLASS_POWER_DOMAIN"
+.LASF217:
 	.string	"UCLASS_REGULATOR"
-.LASF318:
+.LASF323:
 	.string	"save_size"
-.LASF172:
+.LASF175:
 	.string	"UCLASS_CLK"
 .LASF31:
 	.string	"uclass_platdata"
-.LASF461:
+.LASF470:
 	.string	"dev_get_platdata"
-.LASF323:
+.LASF328:
 	.string	"iobase"
-.LASF453:
+.LASF462:
 	.string	"rk3568_spl_rockchip_otp_stop"
-.LASF454:
+.LASF463:
 	.string	"rk3568_spl_rockchip_otp_start"
-.LASF260:
+.LASF265:
 	.string	"pre_serial"
-.LASF468:
+.LASF477:
 	.ascii	"GNU C11 6.3.1 201"
 	.string	"70404 -mstrict-align -march=armv8-a+nosimd -mlittle-endian -mabi=lp64 -g -Os -fno-builtin -ffreestanding -fshort-wchar -fno-stack-protector -fno-delete-null-pointer-checks -fstack-usage -ffunction-sections -fdata-sections -ffixed-r9 -fno-common -ffixed-x18"
 .LASF119:
@@ -16124,23 +19774,23 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"ih_os"
 .LASF153:
 	.string	"cmdline_end"
-.LASF344:
+.LASF349:
 	.string	"net_rx_packet"
-.LASF251:
+.LASF256:
 	.string	"LOGF_MAX_CATEGORIES"
-.LASF286:
+.LASF291:
 	.string	"fdt_blob"
-.LASF387:
+.LASF392:
 	.string	"udevice_id"
 .LASF51:
 	.string	"size"
 .LASF10:
 	.string	"long long unsigned int"
-.LASF396:
+.LASF401:
 	.string	"destroy"
 .LASF107:
 	.string	"image_header"
-.LASF376:
+.LASF381:
 	.string	"length"
 .LASF20:
 	.string	"__be32"
@@ -16148,65 +19798,67 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"bi_flashstart"
 .LASF136:
 	.string	"fit_noffset_os"
-.LASF195:
+.LASF198:
 	.string	"UCLASS_MMC"
-.LASF328:
+.LASF333:
 	.string	"write_hwaddr"
-.LASF250:
+.LASF255:
 	.string	"UCLASS_INVALID"
-.LASF233:
+.LASF236:
 	.string	"UCLASS_USB_HUB"
-.LASF370:
+.LASF375:
 	.string	"child_post_remove"
 .LASF41:
 	.string	"sibling_node"
-.LASF290:
+.LASF295:
 	.string	"of_root"
+.LASF252:
+	.string	"UCLASS_EBC"
 .LASF57:
 	.string	"flash_info"
 .LASF101:
 	.string	"version"
-.LASF327:
+.LASF332:
 	.string	"halt"
 .LASF62:
 	.string	"region"
 .LASF105:
 	.string	"size_dt_struct"
-.LASF282:
+.LASF287:
 	.string	"dm_root"
-.LASF302:
-	.string	"sys_start_tick"
 .LASF307:
+	.string	"sys_start_tick"
+.LASF312:
 	.string	"properties"
-.LASF197:
+.LASF200:
 	.string	"UCLASS_MTD"
 .LASF94:
 	.string	"fdt32_t"
-.LASF281:
+.LASF286:
 	.string	"new_gd"
-.LASF199:
+.LASF202:
 	.string	"UCLASS_NORTHBRIDGE"
 .LASF78:
 	.string	"bi_enetaddr"
-.LASF310:
+.LASF315:
 	.string	"mtd_info"
-.LASF368:
+.LASF373:
 	.string	"child_post_bind"
-.LASF319:
+.LASF324:
 	.string	"in_addr"
-.LASF345:
+.LASF350:
 	.string	"net_rx_packet_len"
-.LASF324:
+.LASF329:
 	.string	"init"
-.LASF444:
+.LASF453:
 	.string	"rockchip_secure_otp_ecc_enable"
-.LASF314:
+.LASF319:
 	.string	"__dtb_dt_begin"
-.LASF216:
+.LASF219:
 	.string	"UCLASS_RESET"
 .LASF139:
 	.string	"fit_noffset_rd"
-.LASF170:
+.LASF173:
 	.string	"UCLASS_AHCI"
 .LASF12:
 	.string	"phys_size_t"
@@ -16216,119 +19868,127 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"FIQ_STACK_START"
 .LASF154:
 	.string	"verify"
-.LASF379:
+.LASF384:
 	.string	"ofnode"
 .LASF28:
 	.string	"name"
-.LASF438:
+.LASF447:
 	.string	"buffer"
-.LASF202:
+.LASF253:
+	.string	"UCLASS_EINK_DISPLAY"
+.LASF205:
 	.string	"UCLASS_PANEL_BACKLIGHT"
-.LASF229:
+.LASF232:
 	.string	"UCLASS_TIMER"
-.LASF224:
+.LASF227:
 	.string	"UCLASS_SPI_FLASH"
-.LASF271:
+.LASF276:
 	.string	"have_console"
 .LASF81:
 	.string	"bi_busfreq"
 .LASF6:
 	.string	"short int"
-.LASF413:
+.LASF418:
 	.string	"otp_mask_base"
-.LASF208:
+.LASF211:
 	.string	"UCLASS_PINCTRL"
-.LASF218:
+.LASF221:
 	.string	"UCLASS_RAMDISK"
-.LASF165:
+.LASF168:
 	.string	"UCLASS_I2C_EMUL"
-.LASF223:
+.LASF226:
 	.string	"UCLASS_SPMI"
-.LASF365:
+.LASF370:
 	.string	"remove"
-.LASF162:
+.LASF165:
 	.string	"UCLASS_TEST_BUS"
-.LASF317:
+.LASF322:
 	.string	"save_addr"
-.LASF373:
+.LASF378:
 	.string	"per_child_auto_alloc_size"
-.LASF296:
+.LASF445:
+	.string	"rk3568_secure_otp_write_2_bytes_noecc"
+.LASF301:
 	.string	"malloc_ptr"
-.LASF412:
+.LASF417:
 	.string	"secure_conf_base"
 .LASF151:
 	.string	"initrd_end"
-.LASF392:
+.LASF397:
 	.string	"pre_unbind"
-.LASF415:
+.LASF420:
 	.string	"secure_otp_data"
-.LASF263:
+.LASF268:
 	.string	"baudrate"
 .LASF91:
 	.string	"_datarellocal_start_ofs"
 .LASF40:
 	.string	"child_head"
-.LASF252:
+.LASF257:
 	.string	"arch_global_data"
-.LASF249:
+.LASF254:
 	.string	"UCLASS_COUNT"
-.LASF268:
-	.string	"pci_clk"
+.LASF159:
+	.string	"sha1_der_prefix"
 .LASF49:
 	.string	"block_drvr"
+.LASF156:
+	.string	"rollback_index"
 .LASF53:
 	.string	"flash_id"
-.LASF246:
+.LASF249:
 	.string	"UCLASS_CRYPTO"
-.LASF304:
+.LASF309:
 	.string	"device_node"
-.LASF276:
+.LASF281:
 	.string	"ram_size"
 .LASF145:
 	.string	"fit_noffset_setup"
 .LASF106:
 	.string	"working_fdt"
-.LASF285:
+.LASF290:
 	.string	"fdt_blob_kern"
-.LASF337:
+.LASF342:
 	.string	"net_root_path"
-.LASF178:
+.LASF181:
 	.string	"UCLASS_DMA"
 .LASF86:
 	.string	"bd_t"
-.LASF320:
+.LASF325:
 	.string	"s_addr"
-.LASF427:
+.LASF432:
 	.string	"request"
-.LASF394:
+.LASF438:
+	.string	"data_byte"
+.LASF399:
 	.string	"post_probe"
-.LASF346:
+.LASF351:
 	.string	"net_bcast_ethaddr"
 .LASF83:
 	.string	"bi_boot_params"
-.LASF416:
+.LASF421:
 	.string	"spl_rockchip_otp_start"
 .LASF19:
 	.string	"uint32_t"
-.LASF382:
+.LASF387:
 	.string	"mem_malloc_brk"
-.LASF332:
+.LASF337:
 	.string	"net_gateway"
-.LASF372:
+.LASF377:
 	.string	"platdata_auto_alloc_size"
 .LASF66:
 	.string	"bi_memstart"
-.LASF401:
+.LASF406:
 	.string	"DECOM_LZ4"
-.LASF237:
+.LASF240:
 	.string	"UCLASS_VIDEO_CONSOLE"
-.LASF330:
+.LASF335:
 	.string	"eth_current"
-.LASF367:
+.LASF372:
 	.string	"ofdata_to_platdata"
 .LASF64:
 	.string	"reserved"
-.LASF472:
+.LASF481:
 	.string	"free"
 .LASF85:
 	.string	"bi_dram"
@@ -16342,23 +20002,23 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"legacy_hdr_valid"
 .LASF60:
 	.string	"base"
-.LASF219:
+.LASF222:
 	.string	"UCLASS_RTC"
-.LASF253:
+.LASF258:
 	.string	"timer_rate_hz"
 .LASF52:
 	.string	"sector_count"
 .LASF118:
 	.string	"ih_comp"
-.LASF391:
+.LASF396:
 	.string	"post_bind"
-.LASF439:
+.LASF450:
 	.string	"rockchip_secure_otp_write"
-.LASF366:
+.LASF371:
 	.string	"unbind"
 .LASF148:
 	.string	"ft_addr"
-.LASF247:
+.LASF250:
 	.string	"UCLASS_ETH_PHY"
 .LASF4:
 	.string	"uchar"
@@ -16366,35 +20026,35 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"ft_len"
 .LASF47:
 	.string	"next"
-.LASF426:
+.LASF431:
 	.string	"secure_otp_ioctl"
-.LASF389:
+.LASF394:
 	.string	"data"
-.LASF198:
+.LASF201:
 	.string	"UCLASS_NOP"
 .LASF144:
 	.string	"fit_uname_setup"
 .LASF48:
 	.string	"prev"
-.LASF203:
+.LASF206:
 	.string	"UCLASS_PCH"
-.LASF204:
+.LASF207:
 	.string	"UCLASS_PCI"
-.LASF333:
+.LASF338:
 	.string	"net_netmask"
 .LASF33:
 	.string	"driver_data"
 .LASF87:
 	.string	"IRQ_STACK_START"
-.LASF169:
+.LASF172:
 	.string	"UCLASS_ADC"
-.LASF459:
+.LASF468:
 	.string	"px30_spl_rockchip_otp_stop"
-.LASF164:
+.LASF167:
 	.string	"UCLASS_SPI_EMUL"
-.LASF257:
+.LASF262:
 	.string	"tlb_size"
-.LASF469:
+.LASF478:
 	.string	"drivers/misc/rockchip-secure-otp.c"
 .LASF141:
 	.string	"fit_uname_fdt"

commit a31e24f37f33454ee5b2508f897777d24fca177d
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Dec 23 22:25:03 2020 +0800

    rockchip: fit_misc: use OTP_SECURE_BOOT_ENABLE_ADDR to get vboot address
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I464f6834d3ec2cb653e5149ab2f9abd3bbcc1724

diff --git a/arch/arm/mach-rockchip/fit_misc.c b/arch/arm/mach-rockchip/fit_misc.c
index f0488fbff8..48301ebfb9 100644
--- a/arch/arm/mach-rockchip/fit_misc.c
+++ b/arch/arm/mach-rockchip/fit_misc.c
@@ -172,7 +172,7 @@ int fit_board_verify_required_sigs(void)
 	if (!dev)
 		return 1;
 
-	if (misc_otp_read(dev, 0, &vboot, 1)) {
+	if (misc_otp_read(dev, OTP_SECURE_BOOT_ENABLE_ADDR, &vboot, 1)) {
 		printf("Can't read verified-boot flag\n");
 		return 1;
 	}

commit 219085f0995b4c748d3918407bc52ea63c5340d8
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Dec 23 22:23:49 2020 +0800

    rockchip: rk3568: add some defination of secure otp
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I493e409a447e48111674683fd24746c5a2cc6553

diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h
index c35e339aa9..65d7e91ea9 100644
--- a/include/configs/rk3568_common.h
+++ b/include/configs/rk3568_common.h
@@ -29,6 +29,15 @@
 #define GICR_BASE			0xfd460000
 #define GICC_BASE			0xfd800000
 
+/* secure otp */
+#define OTP_UBOOT_ROLLBACK_OFFSET	0xe0
+#define OTP_UBOOT_ROLLBACK_WORDS	2	/* 64 bits, 2 words */
+#define OTP_ALL_ONES_NUM_BITS		32
+#define OTP_SECURE_BOOT_ENABLE_ADDR	0x80
+#define OTP_SECURE_BOOT_ENABLE_SIZE	2
+#define OTP_RSA_HASH_ADDR		0x90
+#define OTP_RSA_HASH_SIZE		32
+
 /* MMC/SD IP block */
 #define CONFIG_BOUNCE_BUFFER
 

commit 9b12595b4e5df1ca563da1f75b31e25b7c9fd418
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Dec 23 22:22:01 2020 +0800

    configs: rv1126: add CONFIG_RSA_C_SIZE
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I54fb49bb88110ce430a4451b79c84c8c06a2e4da

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index 761499c2f8..d13b5ccd03 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -180,6 +180,7 @@ CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_RSA=y
 CONFIG_SPL_RSA=y
+CONFIG_RSA_C_SIZE=0x14
 CONFIG_SHA512=y
 CONFIG_ERRNO_STR=y
 # CONFIG_EFI_LOADER is not set

commit 93c979da26b9368b33413d4fcbee3218346ec9af
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Dec 23 22:17:17 2020 +0800

    rockchip: rv1126: delete unused definition
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I3d4eaaad00f886dd91f8746f61bc599276a85758

diff --git a/include/configs/rv1126_common.h b/include/configs/rv1126_common.h
index bc2b6dd3d7..187a0b3514 100644
--- a/include/configs/rv1126_common.h
+++ b/include/configs/rv1126_common.h
@@ -44,7 +44,6 @@
 #define OTP_SECURE_BOOT_ENABLE_SIZE	1
 #define OTP_RSA_HASH_ADDR		0x10
 #define OTP_RSA_HASH_SIZE		32
-#define OTP_RSA2048_C_SIZE		20
 
 /* MMC/SD IP block */
 #define CONFIG_BOUNCE_BUFFER

commit 9c63859ff7048801fcc36e803d05df9d29ae97d8
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Dec 23 22:16:47 2020 +0800

    lib: rsa-verify: calculate the hash depended on operator size
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I72822a2331afb45a1b291e473cd83f7ce3d627f6

diff --git a/lib/rsa/rsa-verify.c b/lib/rsa/rsa-verify.c
index 08e116061b..ce4a33ae1c 100644
--- a/lib/rsa/rsa-verify.c
+++ b/lib/rsa/rsa-verify.c
@@ -62,12 +62,18 @@ static int rsa_verify_padding(const uint8_t *msg, const int pad_len,
 
 #if !defined(USE_HOSTCC)
 #if CONFIG_IS_ENABLED(FIT_HW_CRYPTO)
-static void rsa_convert_big_endian(uint32_t *dst, const uint32_t *src, int len)
+static void rsa_convert_big_endian(uint32_t *dst, const uint32_t *src,
+				   int total_len, int convert_len)
 {
-	int i;
+	int total_wd, convert_wd, i;
 
-	for (i = 0; i < len; i++)
-		dst[i] = fdt32_to_cpu(src[len - 1 - i]);
+	if (total_len < convert_len)
+		convert_len = total_len;
+
+	total_wd = total_len / sizeof(uint32_t);
+	convert_wd = convert_len / sizeof(uint32_t);
+	for (i = 0; i < convert_wd; i++)
+		dst[i] = fdt32_to_cpu(src[total_wd - 1 - i]);
 }
 
 static int rsa_mod_exp_hw(struct key_prop *prop, const uint8_t *sig,
@@ -91,15 +97,15 @@ static int rsa_mod_exp_hw(struct key_prop *prop, const uint8_t *sig,
 		return -ENOMEM;
 
 	rsa_convert_big_endian(rsa_key.n, (uint32_t *)prop->modulus,
-			       key_len / sizeof(uint32_t));
+			       key_len, key_len);
 	rsa_convert_big_endian(rsa_key.e, (uint32_t *)prop->public_exponent_BN,
-			       key_len / sizeof(uint32_t));
+			       key_len, key_len);
 #ifdef CONFIG_ROCKCHIP_CRYPTO_V1
 	rsa_convert_big_endian(rsa_key.c, (uint32_t *)prop->factor_c,
-			       key_len / sizeof(uint32_t));
+			       key_len, key_len);
 #else
 	rsa_convert_big_endian(rsa_key.c, (uint32_t *)prop->factor_np,
-			       key_len / sizeof(uint32_t));
+			       key_len, key_len);
 #endif
 	for (i = 0; i < sig_len; i++)
 		sig_reverse[sig_len-1-i] = sig[i];
@@ -576,7 +582,7 @@ int rsa_burn_key_hash(struct image_sign_info *info)
 	struct udevice *dev;
 	struct key_prop prop;
 	char name[100] = {0};
-	char secure_boot_enable = 0;
+	u16 secure_boot_enable = 0;
 	const void *blob = info->fdt_blob;
 	uint8_t digest[FIT_MAX_HASH_LEN];
 	uint8_t digest_read[FIT_MAX_HASH_LEN];
@@ -622,26 +628,26 @@ int rsa_burn_key_hash(struct image_sign_info *info)
 	if (info->crypto->key_len != RSA2048_BYTES)
 		return -EINVAL;
 
-	rsa_key = malloc(key_len * 3);
+	rsa_key = calloc(key_len * 3, sizeof(char));
 	if (!rsa_key)
 		return -ENOMEM;
 
 	n = rsa_key;
-	e = rsa_key + key_len;
-	c = rsa_key + key_len * 2;
+	e = rsa_key + CONFIG_RSA_N_SIZE;
+	c = rsa_key + CONFIG_RSA_N_SIZE + CONFIG_RSA_E_SIZE;
 	rsa_convert_big_endian(n, (uint32_t *)prop.modulus,
-			       key_len / sizeof(uint32_t));
+			       key_len, CONFIG_RSA_N_SIZE);
 	rsa_convert_big_endian(e, (uint32_t *)prop.public_exponent_BN,
-			       key_len / sizeof(uint32_t));
+			       key_len, CONFIG_RSA_E_SIZE);
 #ifdef CONFIG_ROCKCHIP_CRYPTO_V1
 	rsa_convert_big_endian(c, (uint32_t *)prop.factor_c,
-			       key_len / sizeof(uint32_t));
+			       key_len, CONFIG_RSA_C_SIZE);
 #else
 	rsa_convert_big_endian(c, (uint32_t *)prop.factor_np,
-			       key_len / sizeof(uint32_t));
+			       key_len, CONFIG_RSA_C_SIZE);
 #endif
 
-	ret = calculate_hash(rsa_key, key_len * 2 + OTP_RSA2048_C_SIZE,
+	ret = calculate_hash(rsa_key, CONFIG_RSA_N_SIZE + CONFIG_RSA_E_SIZE + CONFIG_RSA_C_SIZE,
 			     info->checksum->name, digest, &digest_len);
 	if (ret)
 		goto error;
@@ -684,7 +690,7 @@ int rsa_burn_key_hash(struct image_sign_info *info)
 	if (ret)
 		goto error;
 
-	printf("RSA：Write key hash successfully\n");
+	printf("RSA: Write key hash successfully\n");
 
 error:
 	free(rsa_key);

commit 781ee9b3938c7c397359dc632e032ce413091c6f
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Dec 23 22:14:01 2020 +0800

    lib: rsa-sign: support calculate deferent size of rsa's key
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ia473b5123c11ed57d1eed560964b6a7dc482b7df

diff --git a/lib/rsa/Kconfig b/lib/rsa/Kconfig
index fde1ac108d..7aa896cb44 100644
--- a/lib/rsa/Kconfig
+++ b/lib/rsa/Kconfig
@@ -34,4 +34,16 @@ config RSA_FREESCALE_EXP
 	Enables driver for RSA modular exponentiation using Freescale cryptographic
 	accelerator - CAAM.
 
+config RSA_N_SIZE
+	hex "Define the RSA N size"
+	default 0x100
+
+config RSA_E_SIZE
+	hex "Define the RSA E size"
+	default 0x100
+
+config RSA_C_SIZE
+	hex "Define the RSA C size"
+	default 0x100
+
 endif
diff --git a/lib/rsa/rsa-sign.c b/lib/rsa/rsa-sign.c
index 9b49f6bd0b..fed64d512e 100644
--- a/lib/rsa/rsa-sign.c
+++ b/lib/rsa/rsa-sign.c
@@ -9,6 +9,7 @@
 #include <string.h>
 #include <image.h>
 #include <time.h>
+#include <generated/autoconf.h>
 #include <openssl/bn.h>
 #include <openssl/rsa.h>
 #include <openssl/pem.h>
@@ -700,12 +701,18 @@ int rsa_get_params(RSA *key, uint64_t *exponent, uint32_t *n0_invp,
 	return ret;
 }
 
-static void rsa_convert_big_endian(uint32_t *dst, const uint32_t *src, int len)
+static void rsa_convert_big_endian(uint32_t *dst, const uint32_t *src,
+				   int total_len, int convert_len)
 {
-	int i;
+	int total_wd, convert_wd, i;
+
+	if (total_len < convert_len)
+		convert_len = total_len;
 
-	for (i = 0; i < len; i++)
-		dst[i] = fdt32_to_cpu(src[len - 1 - i]);
+	total_wd = total_len / sizeof(uint32_t);
+	convert_wd = convert_len / sizeof(uint32_t);
+	for (i = 0; i < convert_wd; i++)
+		dst[i] = fdt32_to_cpu(src[total_wd - 1 - i]);
 }
 
 static int rsa_set_key_hash(void *keydest, int key_node,
@@ -717,12 +724,11 @@ static int rsa_set_key_hash(void *keydest, int key_node,
 	char hash_c[] = "hash@c";
 	char hash_np[] = "hash@np";
 	char *rsa_key;
-	int key_word;
 	int hash_node;
 	int value_len;
 	int ret = -ENOSPC;
 
-	rsa_key = malloc(key_len * 3);
+	rsa_key = calloc(key_len * 3, sizeof(char));
 	if (!rsa_key)
 		return -ENOSPC;
 
@@ -734,14 +740,13 @@ static int rsa_set_key_hash(void *keydest, int key_node,
 		goto err_nospc;
 
 	n = rsa_key;
-	e = rsa_key + key_len;
-	key_word = key_len / sizeof(uint32_t);
-	rsa_convert_big_endian(n, rsa_n, key_word);
-	rsa_convert_big_endian(e, rsa_e, key_word);
+	e = rsa_key + CONFIG_RSA_N_SIZE;
+	rsa_convert_big_endian(n, rsa_n, key_len, CONFIG_RSA_N_SIZE);
+	rsa_convert_big_endian(e, rsa_e, key_len, CONFIG_RSA_E_SIZE);
 
 	/* hash@c node: n, e, c */
-	c = rsa_key + key_len * 2;
-	rsa_convert_big_endian(c, rsa_c, key_word);
+	c = rsa_key + CONFIG_RSA_N_SIZE + CONFIG_RSA_E_SIZE;
+	rsa_convert_big_endian(c, rsa_c, key_len, CONFIG_RSA_C_SIZE);
 	hash_node = fdt_add_subnode(keydest, key_node, hash_c);
 	if (hash_node < 0)
 		goto err_nospc;
@@ -756,13 +761,14 @@ static int rsa_set_key_hash(void *keydest, int key_node,
 		goto err_nospc;
 
 	/* hash@np node: n, e, np */
-	np = rsa_key + key_len * 2;
-	rsa_convert_big_endian(np, rsa_np, key_word);
+	np = rsa_key + CONFIG_RSA_N_SIZE + CONFIG_RSA_E_SIZE;
+	rsa_convert_big_endian(np, rsa_np, key_len, CONFIG_RSA_C_SIZE);
 	hash_node = fdt_add_subnode(keydest, key_node, hash_np);
 	if (hash_node < 0)
 		goto err_nospc;
 
-	ret = calculate_hash(rsa_key, key_len * 2 + 20, csum_algo, value, &value_len);
+	ret = calculate_hash(rsa_key, CONFIG_RSA_N_SIZE + CONFIG_RSA_E_SIZE + CONFIG_RSA_C_SIZE,
+			     csum_algo, value, &value_len);
 	if (ret)
 		goto err_nospc;
 	ret = fdt_setprop(keydest, hash_node, FIT_VALUE_PROP, value, value_len);

commit aa003068835f01ce5b665665d54b772ca6c14bdf
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Dec 24 14:40:48 2020 +0800

    clk: rockchip: rk3568: fix up the return value for rk3568_clk_set_rate()
    
    Change-Id: If472e1b954624ff5205e3064d484de3533cde949
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3568.c b/drivers/clk/rockchip/clk_rk3568.c
index 396996ab8f..2cf7d01060 100644
--- a/drivers/clk/rockchip/clk_rk3568.c
+++ b/drivers/clk/rockchip/clk_rk3568.c
@@ -2342,100 +2342,100 @@ static ulong rk3568_clk_set_rate(struct clk *clk, ulong rate)
 		break;
 	case ACLK_BUS:
 	case PCLK_BUS:
-		rate = rk3568_bus_set_clk(priv, clk->id, rate);
+		ret = rk3568_bus_set_clk(priv, clk->id, rate);
 		break;
 	case ACLK_PERIMID:
 	case HCLK_PERIMID:
-		rate = rk3568_perimid_set_clk(priv, clk->id, rate);
+		ret = rk3568_perimid_set_clk(priv, clk->id, rate);
 		break;
 	case ACLK_TOP_HIGH:
 	case ACLK_TOP_LOW:
 	case HCLK_TOP:
 	case PCLK_TOP:
-		rate = rk3568_top_set_clk(priv, clk->id, rate);
+		ret = rk3568_top_set_clk(priv, clk->id, rate);
 		break;
 	case CLK_I2C1:
 	case CLK_I2C2:
 	case CLK_I2C3:
 	case CLK_I2C4:
 	case CLK_I2C5:
-		rate = rk3568_i2c_set_clk(priv, clk->id, rate);
+		ret = rk3568_i2c_set_clk(priv, clk->id, rate);
 		break;
 	case CLK_SPI0:
 	case CLK_SPI1:
 	case CLK_SPI2:
 	case CLK_SPI3:
-		rate = rk3568_spi_set_clk(priv, clk->id, rate);
+		ret = rk3568_spi_set_clk(priv, clk->id, rate);
 		break;
 	case CLK_PWM1:
 	case CLK_PWM2:
 	case CLK_PWM3:
-		rate = rk3568_pwm_set_clk(priv, clk->id, rate);
+		ret = rk3568_pwm_set_clk(priv, clk->id, rate);
 		break;
 	case CLK_SARADC:
 	case CLK_TSADC_TSEN:
 	case CLK_TSADC:
-		rate = rk3568_adc_set_clk(priv, clk->id, rate);
+		ret = rk3568_adc_set_clk(priv, clk->id, rate);
 		break;
 	case HCLK_SDMMC0:
 	case CLK_SDMMC0:
 	case CLK_SDMMC1:
 	case CLK_SDMMC2:
-		rate = rk3568_sdmmc_set_clk(priv, clk->id, rate);
+		ret = rk3568_sdmmc_set_clk(priv, clk->id, rate);
 		break;
 	case SCLK_SFC:
-		rate = rk3568_sfc_set_clk(priv, rate);
+		ret = rk3568_sfc_set_clk(priv, rate);
 		break;
 	case NCLK_NANDC:
-		rate = rk3568_nand_set_clk(priv, rate);
+		ret = rk3568_nand_set_clk(priv, rate);
 		break;
 	case CCLK_EMMC:
-		rate = rk3568_emmc_set_clk(priv, rate);
+		ret = rk3568_emmc_set_clk(priv, rate);
 		break;
 #ifndef CONFIG_SPL_BUILD
 	case ACLK_VOP:
-		rate = rk3568_aclk_vop_set_clk(priv, rate);
+		ret = rk3568_aclk_vop_set_clk(priv, rate);
 		break;
 	case DCLK_VOP0:
 	case DCLK_VOP1:
 	case DCLK_VOP2:
-		rate = rk3568_dclk_vop_set_clk(priv, clk->id, rate);
+		ret = rk3568_dclk_vop_set_clk(priv, clk->id, rate);
 		break;
 	case SCLK_GMAC0:
 	case CLK_MAC0_2TOP:
 	case CLK_MAC0_REFOUT:
-		rate = rk3568_gmac_src_set_clk(priv, 0, rate);
+		ret = rk3568_gmac_src_set_clk(priv, 0, rate);
 		break;
 	case CLK_MAC0_OUT:
-		rate = rk3568_gmac_out_set_clk(priv, 0, rate);
+		ret = rk3568_gmac_out_set_clk(priv, 0, rate);
 		break;
 	case SCLK_GMAC0_RX_TX:
-		rate = rk3568_gmac_tx_rx_set_clk(priv, 0, rate);
+		ret = rk3568_gmac_tx_rx_set_clk(priv, 0, rate);
 		break;
 	case CLK_GMAC0_PTP_REF:
-		rate = rk3568_gmac_ptp_ref_set_clk(priv, 0, rate);
+		ret = rk3568_gmac_ptp_ref_set_clk(priv, 0, rate);
 		break;
 	case SCLK_GMAC1:
 	case CLK_MAC1_2TOP:
 	case CLK_MAC1_REFOUT:
-		rate = rk3568_gmac_src_set_clk(priv, 1, rate);
+		ret = rk3568_gmac_src_set_clk(priv, 1, rate);
 		break;
 	case CLK_MAC1_OUT:
-		rate = rk3568_gmac_out_set_clk(priv, 1, rate);
+		ret = rk3568_gmac_out_set_clk(priv, 1, rate);
 		break;
 	case SCLK_GMAC1_RX_TX:
-		rate = rk3568_gmac_tx_rx_set_clk(priv, 1, rate);
+		ret = rk3568_gmac_tx_rx_set_clk(priv, 1, rate);
 		break;
 	case CLK_GMAC1_PTP_REF:
-		rate = rk3568_gmac_ptp_ref_set_clk(priv, 1, rate);
+		ret = rk3568_gmac_ptp_ref_set_clk(priv, 1, rate);
 		break;
 	case DCLK_EBC:
-		rate = rk3568_ebc_set_clk(priv, rate);
+		ret = rk3568_ebc_set_clk(priv, rate);
 		break;
 	case ACLK_RKVDEC_PRE:
 	case ACLK_RKVDEC:
 	case CLK_RKVDEC_CORE:
-		rate = rk3568_rkvdec_set_clk(priv, clk->id, rate);
+		ret = rk3568_rkvdec_set_clk(priv, clk->id, rate);
 		break;
 #endif
 	case ACLK_SECURE_FLASH:
@@ -2445,7 +2445,7 @@ static ulong rk3568_clk_set_rate(struct clk *clk, ulong rate)
 	case CLK_CRYPTO_NS_RNG:
 	case CLK_CRYPTO_NS_CORE:
 	case CLK_CRYPTO_NS_PKA:
-		rate = rk3568_crypto_set_rate(priv, clk->id, rate);
+		ret = rk3568_crypto_set_rate(priv, clk->id, rate);
 		break;
 	case CPLL_500M:
 	case CPLL_333M:
@@ -2455,7 +2455,7 @@ static ulong rk3568_clk_set_rate(struct clk *clk, ulong rate)
 	case CPLL_62P5M:
 	case CPLL_50M:
 	case CPLL_25M:
-		rate = rk3568_cpll_div_set_rate(priv, clk->id, rate);
+		ret = rk3568_cpll_div_set_rate(priv, clk->id, rate);
 		break;
 	default:
 		return -ENOENT;

commit 2bff5c680e0d1241f405cf0295f97fd85b8a785d
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Tue Dec 22 09:20:30 2020 +0800

    clk: rockchip: rv1126: Only change APLL rate to 1008MHz for tb
    
    fixes: (c1bad47 clk: rockchip: rv1126: Change APLL rate to 1008MHz)
    
    Change-Id: If0c284af8c5710b43d353fdf6b12b226c288ae07
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rv1126.h b/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
index 7ab80900c9..c304fce0d2 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
@@ -13,7 +13,11 @@
 #define KHz		1000
 #define OSC_HZ		(24 * MHz)
 
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_KERNEL_BOOT)
 #define APLL_HZ		(1008 * MHz)
+#else
+#define APLL_HZ		(816 * MHz)
+#endif
 #define GPLL_HZ		(1188 * MHz)
 #define CPLL_HZ		(500 * MHz)
 #define HPLL_HZ		(1400 * MHz)

commit 3a5404aff4a0d9057b580172a13a0f4461be240d
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Dec 24 10:00:10 2020 +0800

    clk: rockchip: rk3568: set the APLL_HZ to 816MHz
    
    Set the APLL_HZ to lower frequency in spl when the pmic is not
    available.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Id540ff174ef93c3d9ea22bb37dc26ca7b587a5b7

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3568.h b/arch/arm/include/asm/arch-rockchip/cru_rk3568.h
index d8fe25fcac..f09635d18e 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3568.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3568.h
@@ -11,7 +11,7 @@
 #define KHz		1000
 #define OSC_HZ		(24 * MHz)
 
-#define APLL_HZ		(1008 * MHz)
+#define APLL_HZ		(816 * MHz)
 #define GPLL_HZ		(1188 * MHz)
 #define CPLL_HZ		(1000 * MHz)
 #define PPLL_HZ		(100 * MHz)

commit bc45a18269e2b2029e23c499ee64a65b218fc633
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Wed Dec 23 15:38:13 2020 +0800

    drivers: ram: rockchip: rk3308: coding style
    
    Change-Id: Icf1bb1d8ca588b244eb7b736d0e033013d023851
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram-rk3308-ddr-skew.inc b/drivers/ram/rockchip/sdram-rk3308-ddr-skew.inc
index 2f681d833c..ded648cde9 100644
--- a/drivers/ram/rockchip/sdram-rk3308-ddr-skew.inc
+++ b/drivers/ram/rockchip/sdram-rk3308-ddr-skew.inc
@@ -56,4 +56,3 @@
 		0x6,/*dqsb1  tx*/
 	},
 }
-
diff --git a/drivers/ram/rockchip/sdram_rv1108_pctl_phy.c b/drivers/ram/rockchip/sdram_rv1108_pctl_phy.c
index 038690e50b..b680ab9d80 100644
--- a/drivers/ram/rockchip/sdram_rv1108_pctl_phy.c
+++ b/drivers/ram/rockchip/sdram_rv1108_pctl_phy.c
@@ -279,7 +279,7 @@ static void pctl_cfg(struct dram_info *priv,
 	       &priv->pctl->dfiupdcfg);
 
 	copy_to_reg(&priv->pctl->togcnt1u,
-		    &(params_priv->ddr_timing_t.pctl_timing.togcnt1u),
+		    &params_priv->ddr_timing_t.pctl_timing.togcnt1u,
 		    sizeof(struct pctl_timing));
 	/*
 	 * rv1108 phy is 1:2 mode, noc_timing.b.burstlen

commit 355cdcf34508d6ed289df7581f2c562b32e87d25
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Wed Dec 23 15:36:21 2020 +0800

    rockchip: rk3308: coding style
    
    Change-Id: If0404baf3019317e2dcf9a6c8a77e8a82a13f888
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3308.h b/arch/arm/include/asm/arch-rockchip/grf_rk3308.h
index 2d0663f4db..0ee72b7666 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rk3308.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3308.h
@@ -196,6 +196,10 @@ struct rk3308_sgrf {
 check_member(rk3308_sgrf, fastboot_en, 0x20);
 
 enum {
+	/* GPIO0B_IOMUX */
+	GPIO0B_SEL_SHIFT		= 0x0,
+	GPIO0B_SEL_MASK			= 0x3 << GPIO0B_SEL_SHIFT,
+
 	/* GPIO1D_IOMUX */
 	GPIO1D1_SEL_SHIFT		= 2,
 	GPIO1D1_SEL_MASK		= 0x3 << GPIO1D1_SEL_SHIFT,
@@ -203,6 +207,31 @@ enum {
 	GPIO1D0_SEL_SHIFT		= 0,
 	GPIO1D0_SEL_MASK		= 0x3 << GPIO1D0_SEL_SHIFT,
 	GPIO1D1_SEL_UART1_RX		= 1,
+
+	/* GPIO2A_IOMUX */
+	GPIO2A1_SEL_SHIFT		= 2,
+	GPIO2A1_SEL_MASK		= 0x3 << GPIO2A1_SEL_SHIFT,
+	GPIO2A1_SEL_UART0_TX		= 1,
+	GPIO2A0_SEL_SHIFT		= 0,
+	GPIO2A0_SEL_MASK		= 0x3 << GPIO2A0_SEL_SHIFT,
+	GPIO2A0_SEL_UART0_RX		= 1,
+
+	/* GPIO3B_IOMUX */
+	GPIO3B5_SEL_SHIFT		= 12,
+	GPIO3B5_SEL_MASK		= 0xf << GPIO3B5_SEL_SHIFT,
+	GPIO3B5_SEL_UART3_TX		= 4,
+	GPIO3B4_SEL_SHIFT		= 8,
+	GPIO3B4_SEL_MASK		= 0xf << GPIO3B4_SEL_SHIFT,
+	GPIO3B4_SEL_UART3_RX		= 4,
+
+	/* GPIO4B_IOMUX */
+	GPIO4B1_SEL_SHIFT		= 2,
+	GPIO4B1_SEL_MASK		= 0x3 << GPIO4B1_SEL_SHIFT,
+	GPIO4B1_SEL_UART4_TX		= 1,
+	GPIO4B0_SEL_SHIFT		= 0,
+	GPIO4B0_SEL_MASK		= 0x3 << GPIO4B0_SEL_SHIFT,
+	GPIO4B0_SEL_UART4_RX		= 1,
+
 	/* GPIO4D_IOMUX */
 	GPIO4D3_SEL_SHIFT		= 6,
 	GPIO4D3_SEL_MASK		= 0x3 << GPIO4D3_SEL_SHIFT,
@@ -210,6 +239,23 @@ enum {
 	GPIO4D2_SEL_SHIFT		= 4,
 	GPIO4D2_SEL_MASK		= 0x3 << GPIO4D2_SEL_SHIFT,
 	GPIO4D2_SEL_UART2_RXM1		= 2,
+
+	/* PVTM_CON0 */
+	PVTM_PMU_OSC_EN_SHIFT		= 1,
+	PVTM_PMU_OSC_EN_MASK		= 0x1 << PVTM_PMU_OSC_EN_SHIFT,
+	PVTM_PMU_OSC_EN			= 1,
+
+	PVTM_PMU_START_SHIFT		= 0,
+	PVTM_PMU_START_MASK		= 0x1 << PVTM_PMU_START_SHIFT,
+	PVTM_PMU_START			= 1,
+
+	/* PVTM_CON1 */
+	PVTM_PMU_CAL_CNT		= 0x1234,
+
+	/* PVTM_STATUS0 */
+	PVTM_PMU_FREQ_DONE_SHIFT	= 0,
+	PVTM_PMU_FREQ_DONE_MASK		= 0x1 << PVTM_PMU_FREQ_DONE_SHIFT,
+
 	/* UPCTL_CON0 */
 	CYSYREQ_UPCTL_DDRSTDBY_SHIFT	= 5,
 	CYSYREQ_UPCTL_DDRSTDBY_MASK	= 1 << CYSYREQ_UPCTL_DDRSTDBY_SHIFT,
@@ -217,10 +263,16 @@ enum {
 	GRF_DDR_16BIT_EN_SHIFT		= 0,
 	GRF_DDR_16BIT_EN_MASK		= 1 << GRF_DDR_16BIT_EN_SHIFT,
 	GRF_DDR_16BIT_EN		= 1,
+
+	/* UPCTL_STATUS0 */
+	DFI_SCRAMBLE_KEY_READY_SHIFT	= 21,
+	DFI_SCRAMBLE_KEY_READY_MASK	= 0x1 << DFI_SCRAMBLE_KEY_READY_SHIFT,
+
 	/* SOC_CON5 */
 	UART2_MULTI_IOFUNC_SEL_SHIFT	= 2,
 	UART2_MULTI_IOFUNC_SEL_MASK	= 0x3 << UART2_MULTI_IOFUNC_SEL_SHIFT,
 	UART2_MULTI_IOFUNC_SEL_M1	= 1,
+
 	/* SOC_CON12 */
 	NOC_MSCH_MAIN_PARTIAL_SHIFT	= 1,
 	NOC_MSCH_MAIN_PARTIAL_MASK	= 0x1 << NOC_MSCH_MAIN_PARTIAL_SHIFT,
@@ -231,4 +283,9 @@ enum {
 	NOC_MSCH_MAINDDR3_DIS		= 0,
 };
 
+enum { /* SGRF_CON0 */
+	DDR_DFI_SCRAMBLE_EN_SHIFT	= 13,
+	DDR_DFI_SCRAMBLE_EN_MASK	= 0x1 << DDR_DFI_SCRAMBLE_EN_SHIFT,
+	DDR_DFI_SCRAMBLE_EN		= 1,
+};
 #endif
diff --git a/arch/arm/include/asm/arch-rockchip/pmu_rk3308.h b/arch/arm/include/asm/arch-rockchip/pmu_rk3308.h
index 6c25ec065c..5714f1f45d 100644
--- a/arch/arm/include/asm/arch-rockchip/pmu_rk3308.h
+++ b/arch/arm/include/asm/arch-rockchip/pmu_rk3308.h
@@ -68,4 +68,3 @@ enum { /* SFT_CON_LO */
 };
 
 #endif
-
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rk3308.h b/arch/arm/include/asm/arch-rockchip/sdram_rk3308.h
index d215bb2f0f..30034b980f 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_rk3308.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_rk3308.h
@@ -134,4 +134,3 @@ void set_ds_odt(struct dram_info *priv,
 		struct sdram_params *params_priv);
 
 #endif
-
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rv1108.h b/arch/arm/include/asm/arch-rockchip/sdram_rv1108.h
index b6947523cb..961fedb8b5 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_rv1108.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_rv1108.h
@@ -20,7 +20,6 @@
 #define SDRAM_END_ADDR		0x80000000
 #define PATTERN			(0x5aa5f00f)
 
-
 struct rv1108_service_msch {
 	u32 id_coreid;
 	u32 id_revisionid;
@@ -85,5 +84,4 @@ void set_bw_grf(struct dram_info *priv);
 void set_ds_odt(struct dram_info *priv,
 		struct sdram_params *params_priv);
 
-
 #endif
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rv1108_pctl_phy.h b/arch/arm/include/asm/arch-rockchip/sdram_rv1108_pctl_phy.h
index b7bb61921b..f0b10d94eb 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_rv1108_pctl_phy.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_rv1108_pctl_phy.h
@@ -14,17 +14,17 @@ struct ddr_pctl {
 	u32 sctl;
 	u32 stat;
 	u32 intrstat;
-	u32 reserved0[(0x40-0x10)/4];
+	u32 reserved0[(0x40 - 0x10) / 4];
 	u32 mcmd;
 	u32 powctl;
 	u32 powstat;
 	u32 cmdtstat;
 	u32 cmdtstaten;
-	u32 reserved1[(0x60-0x54)/4];
+	u32 reserved1[(0x60 - 0x54) / 4];
 	u32 mrrcfg0;
 	u32 mrrstat0;
 	u32 mrrstat1;
-	u32 reserved2[(0x7c-0x6c)/4];
+	u32 reserved2[(0x7c - 0x6c) / 4];
 	u32 mcfg1;
 	u32 mcfg;
 	u32 ppcfg;
@@ -39,7 +39,7 @@ struct ddr_pctl {
 	u32 dtuprd2;
 	u32 dtuprd3;
 	u32 dtuawdt;
-	u32 reserved4[(0xc0-0xb4)/4];
+	u32 reserved4[(0xc0 - 0xb4) / 4];
 	u32 togcnt1u;
 	u32 tinit;
 	u32 trsth;
@@ -75,12 +75,12 @@ struct ddr_pctl {
 	u32 tckesr;
 	u32 tdpd;
 	u32 trefi_mem_ddr3;
-	u32 reserved5[(0x180-0x14c)/4];
+	u32 reserved5[(0x180 - 0x14c) / 4];
 	u32 ecccfg;
 	u32 ecctst;
 	u32 eccclr;
 	u32 ecclog;
-	u32 reserved6[(0x200-0x190)/4];
+	u32 reserved6[(0x200 - 0x190) / 4];
 	u32 dtuwactl;
 	u32 dturactl;
 	u32 dtucfg;
@@ -107,7 +107,7 @@ struct ddr_pctl {
 	u32 reserved7;
 	u32 dfitrddataen;
 	u32 dfitphyrdlat;
-	u32 reserved8[(0x270-0x268)/4];
+	u32 reserved8[(0x270 - 0x268) / 4];
 	u32 dfitphyupdtype0;
 	u32 dfitphyupdtype1;
 	u32 dfitphyupdtype2;
@@ -119,7 +119,7 @@ struct ddr_pctl {
 	u32 dfiupdcfg;
 	u32 dfitrefmski;
 	u32 dfitctrlupdi;
-	u32 reserved10[(0x2ac-0x29c)/4];
+	u32 reserved10[(0x2ac - 0x29c) / 4];
 	u32 dfitrcfg0;
 	u32 dfitrstat0;
 	u32 dfitrwrlvlen;
@@ -134,9 +134,9 @@ struct ddr_pctl {
 	u32 dfistcfg2;
 	u32 dfistparclr;
 	u32 dfistparlog;
-	u32 reserved12[(0x2f0-0x2e4)/4];
+	u32 reserved12[(0x2f0 - 0x2e4) / 4];
 	u32 dfilpcfg0;
-	u32 reserved13[(0x300-0x2f4)/4];
+	u32 reserved13[(0x300 - 0x2f4) / 4];
 	u32 dfitrwrlvlresp0;
 	u32 dfitrwrlvlresp1;
 	u32 dfitrwrlvlresp2;
@@ -153,7 +153,7 @@ struct ddr_pctl {
 	u32 dfitrrdlvlgatedelay1;
 	u32 dfitrrdlvlgatedelay2;
 	u32 dfitrcmd;
-	u32 reserved14[(0x3f8-0x340)/4];
+	u32 reserved14[(0x3f8 - 0x340) / 4];
 	u32 ipvr;
 	u32 iptr;
 };
@@ -565,7 +565,6 @@ enum {
 	PD_IDLE_SHIFT				= 8,
 	TWO_T_SHIFT				= 3,
 
-
 	/* PCTL_MCFG1 */
 	SR_IDLE_MASK				= 0xff,
 	HW_EXIT_IDLE_EN_SHIFT			= 31,
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 88628cb435..3a0ba456fd 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -236,7 +236,7 @@ config TPL_TEXT_BASE
 	default 0xfff81000
 
 config TPL_MAX_SIZE
-	default 12288
+	default 10240
 
 config TPL_STACK
 	default 0xfff84000
diff --git a/arch/arm/mach-rockchip/rk3308/rk3308.c b/arch/arm/mach-rockchip/rk3308/rk3308.c
index f259fd8f83..49f3490396 100644
--- a/arch/arm/mach-rockchip/rk3308/rk3308.c
+++ b/arch/arm/mach-rockchip/rk3308/rk3308.c
@@ -48,9 +48,7 @@ struct mm_region *mem_map = rk3308_mem_map;
 #define SGRF_BASE	0xff2b0000
 #define CRU_BASE	0xff500000
 
-
 enum {
-
 	GPIO1C7_SHIFT		= 8,
 	GPIO1C7_MASK		= GENMASK(11, 8),
 	GPIO1C7_GPIO		= 0,
@@ -209,17 +207,28 @@ int arch_cpu_init(void)
 	static struct rk3308_grf * const grf = (void *)GRF_BASE;
 	u32 glb_rst_st;
 
+	/*
+	 * RK3308 internally default select 1.8v for VCCIO4 on reset state,
+	 * but some boards may give a 3.3V power supply for VCCIO4, this may
+	 * bring a risk of chip damage through overvoltage. So we internally
+	 * select 3.3V for VCCIO4 as early as possiple to reduces this risk.
+	 */
 	rk_clrsetreg(&grf->soc_con0, IOVSEL4_MASK, VCCIO4_3V3 << IOVSEL4_SHIFT);
 
+	/*
+	 * write BOOT_WATCHDOG to boot mode register, if we are reset by wdt
+	 */
 	glb_rst_st = readl(&cru->glb_rst_st);
 	writel(FST_GLB_WDT_RST | SND_GLB_WDT_RST, &cru->glb_rst_st);
 	if (glb_rst_st & (FST_GLB_WDT_RST | SND_GLB_WDT_RST))
 		writel(BOOT_WATCHDOG, CONFIG_ROCKCHIP_BOOT_MODE_REG);
 
+	/* set wdt tsadc first global reset*/
 	writel(WDT_GLB_SRST_CTRL << WDT_GLB_SRST_CTRL_SHIFT |
 	       TSADC_GLB_SRST_CTRL << TSADC_GLB_SRST_CTRL_SHIFT,
 	       &cru->glb_rst_con);
 
+	/* Set qos priority level */
 	writel(QOS_PRIORITY_P1_P0(1, 1),
 	       SERVICE_CPU_ADDR + DOS_PRIORITY_OFFSET);
 	writel(QOS_PRIORITY_P1_P0(3, 3),

commit e9b1001b3c538562213429c64ae40cf6abbc5153
Author: Guochun Huang <hero.huang@rock-chips.com>
Date:   Sat Dec 5 16:04:06 2020 +0800

    video/drm: dsi: add rk3568 support
    
    Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
    Change-Id: I8cef8db74dcc9e05f4c0b2511c728838a0d92cb7

diff --git a/drivers/video/drm/dw_mipi_dsi.c b/drivers/video/drm/dw_mipi_dsi.c
index bf43669645..81f9f07f4b 100644
--- a/drivers/video/drm/dw_mipi_dsi.c
+++ b/drivers/video/drm/dw_mipi_dsi.c
@@ -205,6 +205,7 @@ enum grf_reg_fields {
 	VOPSEL,
 	TURNREQUEST,
 	TURNDISABLE,
+	SKEWCALHS,
 	FORCETXSTOPMODE,
 	FORCERXMODE,
 	ENABLE_N,
@@ -1091,7 +1092,10 @@ static int dw_mipi_dsi_connector_init(struct display_state *state)
 	conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
 	conn_state->color_space = V4L2_COLORSPACE_DEFAULT;
 	conn_state->type = DRM_MODE_CONNECTOR_DSI;
+	conn_state->output_if |=
+		dsi->id ? VOP_OUTPUT_IF_MIPI1 : VOP_OUTPUT_IF_MIPI0;
 
+#ifndef CONFIG_ROCKCHIP_RK3568
 	if (dsi->id) {
 		struct udevice *dev;
 		int ret;
@@ -1107,6 +1111,7 @@ static int dw_mipi_dsi_connector_init(struct display_state *state)
 
 		conn_state->output_type = ROCKCHIP_OUTPUT_DSI_DUAL_LINK;
 	}
+#endif
 
 	if (dsi->lanes > 4) {
 		struct udevice *dev;
@@ -1115,8 +1120,10 @@ static int dw_mipi_dsi_connector_init(struct display_state *state)
 		ret = uclass_get_device_by_name(UCLASS_DISPLAY,
 #if defined(CONFIG_ROCKCHIP_RK3288)
 						"dsi@ff964000",
-#else
+#elif defined(CONFIG_ROCKCHIP_RK3399)
 						"dsi@ff968000",
+#else
+						"dsi@fe070000",
 #endif
 						&dev);
 		if (ret)
@@ -1132,6 +1139,26 @@ static int dw_mipi_dsi_connector_init(struct display_state *state)
 		dsi->slave->mode_flags = dsi->mode_flags;
 		dsi->slave->channel = dsi->channel;
 		conn_state->output_type = ROCKCHIP_OUTPUT_DSI_DUAL_CHANNEL;
+		conn_state->output_if |= VOP_OUTPUT_IF_MIPI1;
+
+#if defined(CONFIG_ROCKCHIP_RK3568)
+		struct rockchip_phy *phy = NULL;
+		struct udevice *phy_dev;
+
+		ret = uclass_get_device_by_phandle(UCLASS_PHY, dev,
+						   "phys", &phy_dev);
+		if (ret)
+			return -ENODEV;
+
+		phy = (struct rockchip_phy *)dev_get_driver_data(phy_dev);
+		if (!phy)
+			return -ENODEV;
+
+		dsi->slave->dphy.phy = phy;
+		if (phy->funcs && phy->funcs->init)
+			return phy->funcs->init(phy);
+#endif
+
 	}
 
 	return 0;
@@ -1242,6 +1269,9 @@ static int dw_mipi_dsi_connector_prepare(struct display_state *state)
 	else
 		dw_mipi_dsi_set_pll(dsi, lane_rate);
 
+	if (dsi->slave && dsi->slave->dphy.phy)
+		dw_mipi_dsi_set_hs_clk(dsi->slave, lane_rate);
+
 	printf("final DSI-Link bandwidth: %u Mbps x %d\n",
 	       dsi->lane_mbps, dsi->slave ? dsi->lanes * 2 : dsi->lanes);
 
@@ -1481,6 +1511,36 @@ static const struct rockchip_connector rk3399_mipi_dsi_driver_data = {
 	 .data = &rk3399_mipi_dsi_plat_data,
 };
 
+static const u32 rk3568_dsi0_grf_reg_fields[MAX_FIELDS] = {
+	[DPIUPDATECFG]		= GRF_REG_FIELD(0x0360,  2,  2),
+	[DPICOLORM]		= GRF_REG_FIELD(0x0360,  1,  1),
+	[DPISHUTDN]		= GRF_REG_FIELD(0x0360,  0,  0),
+	[SKEWCALHS]		= GRF_REG_FIELD(0x0368, 11, 15),
+	[FORCETXSTOPMODE]	= GRF_REG_FIELD(0x0368,  4,  7),
+	[TURNDISABLE]		= GRF_REG_FIELD(0x0368,  2,  2),
+	[FORCERXMODE]		= GRF_REG_FIELD(0x0368,  0,  0),
+};
+
+static const u32 rk3568_dsi1_grf_reg_fields[MAX_FIELDS] = {
+	[DPIUPDATECFG]		= GRF_REG_FIELD(0x0360, 10, 10),
+	[DPICOLORM]		= GRF_REG_FIELD(0x0360,  9,  9),
+	[DPISHUTDN]		= GRF_REG_FIELD(0x0360,  8,  8),
+	[SKEWCALHS]             = GRF_REG_FIELD(0x036c, 11, 15),
+	[FORCETXSTOPMODE]	= GRF_REG_FIELD(0x036c,  4,  7),
+	[TURNDISABLE]		= GRF_REG_FIELD(0x036c,  2,  2),
+	[FORCERXMODE]		= GRF_REG_FIELD(0x036c,  0,  0),
+};
+
+static const struct dw_mipi_dsi_plat_data rk3568_mipi_dsi_plat_data = {
+	.dsi0_grf_reg_fields = rk3568_dsi0_grf_reg_fields,
+	.dsi1_grf_reg_fields = rk3568_dsi1_grf_reg_fields,
+	.max_bit_rate_per_lane = 1000000000UL,
+};
+static const struct rockchip_connector rk3568_mipi_dsi_driver_data = {
+	 .funcs = &dw_mipi_dsi_connector_funcs,
+	 .data = &rk3568_mipi_dsi_plat_data,
+};
+
 static const u32 rv1108_dsi_grf_reg_fields[MAX_FIELDS] = {
 	[DPICOLORM]		= GRF_REG_FIELD(0x0410,  7,  7),
 	[DPISHUTDN]		= GRF_REG_FIELD(0x0410,  6,  6),
@@ -1548,6 +1608,10 @@ static const struct udevice_id dw_mipi_dsi_ids[] = {
 		.compatible = "rockchip,rk3399-mipi-dsi",
 		.data = (ulong)&rk3399_mipi_dsi_driver_data,
 	},
+	{
+		.compatible = "rockchip,rk3568-mipi-dsi",
+		.data = (ulong)&rk3568_mipi_dsi_driver_data,
+	},
 	{
 		.compatible = "rockchip,rv1108-mipi-dsi",
 		.data = (ulong)&rv1108_mipi_dsi_driver_data,

commit d0408543457b0ef7d6196d9d2092b5a584849cdf
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Sat Nov 7 21:49:18 2020 +0800

    drm/rockchip: Add support for vop2
    
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: I52af209b3a9b85692d0589e1653160d284f4ba9c

diff --git a/drivers/video/drm/Makefile b/drivers/video/drm/Makefile
index ccc0bafff4..65835255f5 100644
--- a/drivers/video/drm/Makefile
+++ b/drivers/video/drm/Makefile
@@ -5,7 +5,7 @@
 #
 
 obj-y += rockchip_display.o rockchip_crtc.o rockchip_phy.o rockchip_bridge.o \
-		rockchip_vop.o rockchip_vop_reg.o bmp_helper.o
+		rockchip_vop.o rockchip_vop_reg.o rockchip_vop2.o bmp_helper.o
 
 obj-$(CONFIG_DRM_MIPI_DSI) += drm_mipi_dsi.o
 obj-$(CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI) += dw_mipi_dsi.o
diff --git a/drivers/video/drm/rockchip_crtc.c b/drivers/video/drm/rockchip_crtc.c
index bbc290040d..bd4935664b 100644
--- a/drivers/video/drm/rockchip_crtc.c
+++ b/drivers/video/drm/rockchip_crtc.c
@@ -92,6 +92,11 @@ static const struct rockchip_crtc rk3328_vop_data = {
 	.data = &rk3328_vop,
 };
 
+static const struct rockchip_crtc rk3568_vop_data = {
+	.funcs = &rockchip_vop2_funcs,
+	.data = &rk3568_vop,
+};
+
 static const struct udevice_id rockchip_vop_ids[] = {
 	{
 		.compatible = "rockchip,rk3036-vop",
@@ -141,6 +146,9 @@ static const struct udevice_id rockchip_vop_ids[] = {
 	}, {
 		.compatible = "rockchip,rk3328-vop",
 		.data = (ulong)&rk3328_vop_data,
+	}, {
+		.compatible = "rockchip,rk3568-vop",
+		.data = (ulong)&rk3568_vop_data,
 	}, { }
 };
 
diff --git a/drivers/video/drm/rockchip_crtc.h b/drivers/video/drm/rockchip_crtc.h
index b584b45cf9..c761388fb7 100644
--- a/drivers/video/drm/rockchip_crtc.h
+++ b/drivers/video/drm/rockchip_crtc.h
@@ -29,7 +29,9 @@ struct rockchip_crtc_funcs {
 };
 
 struct vop_data;
+struct vop2_data;
 extern const struct rockchip_crtc_funcs rockchip_vop_funcs;
+extern const struct rockchip_crtc_funcs rockchip_vop2_funcs;
 extern const struct vop_data rk3036_vop;
 extern const struct vop_data px30_vop_lit;
 extern const struct vop_data px30_vop_big;
@@ -45,4 +47,5 @@ extern const struct vop_data rk322x_vop;
 extern const struct vop_data rk3328_vop;
 extern const struct vop_data rv1108_vop;
 extern const struct vop_data rv1126_vop;
+extern const struct vop2_data rk3568_vop;
 #endif
diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index 5e89157c36..4b136556a6 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -15,6 +15,10 @@
 #define ROCKCHIP_OUTPUT_DSI_DUAL_CHANNEL	BIT(0)
 #define ROCKCHIP_OUTPUT_DSI_DUAL_LINK		BIT(1)
 
+#define ROCKCHIP_OUTPUT_DUAL_CHANNEL_LEFT_RIGHT_MODE	BIT(0)
+#define ROCKCHIP_OUTPUT_DUAL_CHANNEL_ODD_EVEN_MODE	BIT(1)
+#define ROCKCHIP_OUTPUT_DATA_SWAP			BIT(2)
+
 enum data_format {
 	ROCKCHIP_FMT_ARGB8888 = 0,
 	ROCKCHIP_FMT_RGB888,
@@ -53,6 +57,20 @@ enum rockchip_mcu_cmd {
 /* for use special outface */
 #define ROCKCHIP_OUT_MODE_AAAA	15
 
+#define VOP_OUTPUT_IF_RGB	BIT(0)
+#define VOP_OUTPUT_IF_BT1120	BIT(1)
+#define VOP_OUTPUT_IF_BT656	BIT(2)
+#define VOP_OUTPUT_IF_LVDS0	BIT(3)
+#define VOP_OUTPUT_IF_LVDS1	BIT(4)
+#define VOP_OUTPUT_IF_MIPI0	BIT(5)
+#define VOP_OUTPUT_IF_MIPI1	BIT(6)
+#define VOP_OUTPUT_IF_eDP0	BIT(7)
+#define VOP_OUTPUT_IF_eDP1	BIT(8)
+#define VOP_OUTPUT_IF_DP0	BIT(9)
+#define VOP_OUTPUT_IF_DP1	BIT(10)
+#define VOP_OUTPUT_IF_HDMI0	BIT(11)
+#define VOP_OUTPUT_IF_HDMI1	BIT(12)
+
 struct rockchip_mcu_timing {
 	int mcu_pix_total;
 	int mcu_cs_pst;
@@ -122,6 +140,8 @@ struct connector_state {
 	int output_mode;
 	int type;
 	int output_type;
+	int output_if;
+	int output_flags;
 	int color_space;
 	unsigned int bpc;
 
diff --git a/drivers/video/drm/rockchip_vop2.c b/drivers/video/drm/rockchip_vop2.c
new file mode 100644
index 0000000000..77ad107b7c
--- /dev/null
+++ b/drivers/video/drm/rockchip_vop2.c
@@ -0,0 +1,1202 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ */
+
+#include <config.h>
+#include <common.h>
+#include <errno.h>
+#include <malloc.h>
+#include <fdtdec.h>
+#include <fdt_support.h>
+#include <asm/unaligned.h>
+#include <asm/io.h>
+#include <linux/list.h>
+#include <linux/media-bus-format.h>
+#include <clk.h>
+#include <asm/arch/clock.h>
+#include <linux/err.h>
+#include <dm/device.h>
+#include <dm/read.h>
+#include <syscon.h>
+
+#include "rockchip_display.h"
+#include "rockchip_crtc.h"
+#include "rockchip_connector.h"
+
+/* System registers definition */
+#define RK3568_REG_CFG_DONE			0x000
+#define	CFG_DONE_EN				BIT(15)
+
+#define RK3568_VERSION_INFO			0x004
+
+#define EN_MASK				1
+
+#define RK3568_DSP_IF_EN			0x028
+#define RGB_EN_SHIFT				0
+#define HDMI0_EN_SHIFT				1
+#define EDP0_EN_SHIFT				3
+#define MIPI0_EN_SHIFT				4
+#define MIPI1_EN_SHIFT				20
+#define LVDS0_EN_SHIFT				5
+#define LVDS1_EN_SHIFT				24
+#define BT1120_EN_SHIFT				6
+#define BT656_EN_SHIFT				7
+#define IF_MUX_MASK				3
+#define RGB_MUX_SHIFT				8
+#define HDMI0_MUX_SHIFT				10
+#define EDP0_MUX_SHIFT				14
+#define MIPI0_MUX_SHIFT				16
+#define MIPI1_MUX_SHIFT				21
+#define LVDS0_MUX_SHIFT				5
+#define LVDS1_MUX_SHIFT				25
+
+#define RK3568_DSP_IF_CTRL			0x02c
+#define LVDS_DUAL_EN_SHIFT			0
+#define LVDS_DUAL_LEFT_RIGHT_EN_SHIFT		1
+#define LVDS_DUAL_SWAP_EN_SHIFT			2
+#define RK3568_DSP_IF_POL			0x030
+#define IF_CTRL_REG_DONE_IMD_MASK		1
+#define IF_CTRL_REG_DONE_IMD_SHIFT		28
+#define IF_CRTL_MIPI_DCLK_POL_SHIT		19
+#define IF_CRTL_EDP_DCLK_POL_SHIT		15
+#define IF_CRTL_HDMI_DCLK_POL_SHIT		7
+#define IF_CRTL_RGB_LVDS_DCLK_POL_SHIT		3
+#define RK3568_VP0_LINE_FLAG			0x70
+#define RK3568_VP1_LINE_FLAG			0x74
+#define RK3568_VP2_LINE_FLAG			0x78
+#define RK3568_SYS0_INT_EN			0x80
+#define RK3568_SYS0_INT_CLR			0x84
+#define RK3568_SYS0_INT_STATUS			0x88
+#define RK3568_SYS1_INT_EN			0x90
+#define RK3568_SYS1_INT_CLR			0x94
+#define RK3568_SYS1_INT_STATUS			0x98
+#define RK3568_VP0_INT_EN			0xA0
+#define RK3568_VP0_INT_CLR			0xA4
+#define RK3568_VP0_INT_STATUS			0xA8
+#define RK3568_VP1_INT_EN			0xB0
+#define RK3568_VP1_INT_CLR			0xB4
+#define RK3568_VP1_INT_STATUS			0xB8
+#define RK3568_VP2_INT_EN			0xC0
+#define RK3568_VP2_INT_CLR			0xC4
+#define RK3568_VP2_INT_STATUS			0xC8
+
+/* Video Port registers definition */
+#define RK3568_VP0_DSP_CTRL				0xC00
+#define OUT_MODE_MASK					0xf
+#define OUT_MODE_SHIFT					0
+#define DCLK_DIV2_EN_SHIFT				4
+#define P2I_EN_SHIFT					5
+#define INTERLACE_EN_SHIFT				7
+#define PRE_DITHER_DOWN_EN_SHIFT			16
+#define DITHER_DOWN_EN_SHIFT				17
+#define STANDBY_EN_SHIFT				31
+
+#define RK3568_VP0_MIPI_CTRL				0xC04
+#define MIPI_DUAL_EN_SHIFT				20
+#define MIPI_DUAL_SWAP_EN_SHIFT				21
+
+#define RK3568_VP0_COLOR_BAR_CTRL			0xC08
+#define RK3568_VP0_DSP_BG				0xC2C
+#define RK3568_VP0_PRE_SCAN_HTIMING			0xC30
+#define RK3568_VP0_POST_DSP_HACT_INFO			0xC34
+#define RK3568_VP0_POST_DSP_VACT_INFO			0xC38
+#define RK3568_VP0_POST_SCL_FACTOR_YRGB			0xC3C
+#define RK3568_VP0_POST_SCL_CTRL			0xC40
+#define RK3568_VP0_POST_DSP_VACT_INFO_F1		0xC44
+#define RK3568_VP0_DSP_HTOTAL_HS_END			0xC48
+#define RK3568_VP0_DSP_HACT_ST_END			0xC4C
+#define RK3568_VP0_DSP_VTOTAL_VS_END			0xC50
+#define RK3568_VP0_DSP_VACT_ST_END			0xC54
+#define RK3568_VP0_DSP_VS_ST_END_F1			0xC58
+#define RK3568_VP0_DSP_VACT_ST_END_F1			0xC5C
+
+#define RK3568_VP1_DSP_CTRL				0xD00
+#define RK3568_VP1_MIPI_CTRL				0xD04
+#define RK3568_VP1_COLOR_BAR_CTRL			0xD08
+#define RK3568_VP1_PRE_SCAN_HTIMING			0xD30
+#define RK3568_VP1_POST_DSP_HACT_INFO			0xD34
+#define RK3568_VP1_POST_DSP_VACT_INFO			0xD38
+#define RK3568_VP1_POST_SCL_FACTOR_YRGB			0xD3C
+#define RK3568_VP1_POST_SCL_CTRL			0xD40
+#define RK3568_VP1_DSP_HACT_INFO			0xD34
+#define RK3568_VP1_DSP_VACT_INFO			0xD38
+#define RK3568_VP1_POST_DSP_VACT_INFO_F1		0xD44
+#define RK3568_VP1_DSP_HTOTAL_HS_END			0xD48
+#define RK3568_VP1_DSP_HACT_ST_END			0xD4C
+#define RK3568_VP1_DSP_VTOTAL_VS_END			0xD50
+#define RK3568_VP1_DSP_VACT_ST_END			0xD54
+#define RK3568_VP1_DSP_VS_ST_END_F1			0xD58
+#define RK3568_VP1_DSP_VACT_ST_END_F1			0xD5C
+
+#define RK3568_VP2_DSP_CTRL				0xE00
+#define RK3568_VP2_MIPI_CTRL				0xE04
+#define RK3568_VP2_COLOR_BAR_CTRL			0xE08
+#define RK3568_VP2_PRE_SCAN_HTIMING			0xE30
+#define RK3568_VP2_POST_DSP_HACT_INFO			0xE34
+#define RK3568_VP2_POST_DSP_VACT_INFO			0xE38
+#define RK3568_VP2_POST_SCL_FACTOR_YRGB			0xE3C
+#define RK3568_VP2_POST_SCL_CTRL			0xE40
+#define RK3568_VP2_DSP_HACT_INFO			0xE34
+#define RK3568_VP2_DSP_VACT_INFO			0xE38
+#define RK3568_VP2_POST_DSP_VACT_INFO_F1		0xE44
+#define RK3568_VP2_DSP_HTOTAL_HS_END			0xE48
+#define RK3568_VP2_DSP_HACT_ST_END			0xE4C
+#define RK3568_VP2_DSP_VTOTAL_VS_END			0xE50
+#define RK3568_VP2_DSP_VACT_ST_END			0xE54
+#define RK3568_VP2_DSP_VS_ST_END_F1			0xE58
+#define RK3568_VP2_DSP_VACT_ST_END_F1			0xE5C
+
+/* Overlay registers definition    */
+#define RK3568_OVL_CTRL				0x600
+#define OVL_PORT_MUX_REG_DONE_IMD_SHIFT		28
+#define RK3568_OVL_LAYER_SEL			0x604
+#define LAYER_SEL_MASK				0xf
+
+#define RK3568_OVL_PORT_SEL			0x608
+#define PORT_MUX_MASK				0xf
+#define PORT_MUX_SHIFT				0
+#define LAYER_SEL_PORT_MASK			0x3
+#define LAYER_SEL_PORT_SHIFT			24
+
+#define RK3568_CLUSTER0_MIX_SRC_COLOR_CTRL	0x610
+#define RK3568_CLUSTER0_MIX_DST_COLOR_CTRL	0x614
+#define RK3568_CLUSTER0_MIX_SRC_ALPHA_CTRL	0x618
+#define RK3568_CLUSTER0_MIX_DST_ALPHA_CTRL	0x61C
+#define RK3568_MIX0_SRC_COLOR_CTRL		0x650
+#define RK3568_MIX0_DST_COLOR_CTRL		0x654
+#define RK3568_MIX0_SRC_ALPHA_CTRL		0x658
+#define RK3568_MIX0_DST_ALPHA_CTRL		0x65C
+#define RK3568_HDR0_SRC_COLOR_CTRL		0x6C0
+#define RK3568_HDR0_DST_COLOR_CTRL		0x6C4
+#define RK3568_HDR0_SRC_ALPHA_CTRL		0x6C8
+#define RK3568_HDR0_DST_ALPHA_CTRL		0x6CC
+#define RK3568_VP0_BG_MIX_CTRL			0x6E0
+#define RK3568_VP1_BG_MIX_CTRL			0x6E4
+#define RK3568_VP2_BG_MIX_CTRL			0x6E8
+#define RK3568_CLUSTER_DLY_NUM			0x6F0
+#define RK3568_SMART_DLY_NUM			0x6F8
+
+/* Cluster0 register definition */
+#define RK3568_CLUSTER0_WIN0_CTRL0		0x1000
+#define RK3568_CLUSTER0_WIN0_CTRL1		0x1004
+#define RK3568_CLUSTER0_WIN0_YRGB_MST		0x1010
+#define RK3568_CLUSTER0_WIN0_CBR_MST		0x1014
+#define RK3568_CLUSTER0_WIN0_VIR		0x1018
+#define RK3568_CLUSTER0_WIN0_ACT_INFO		0x1020
+#define RK3568_CLUSTER0_WIN0_DSP_INFO		0x1024
+#define RK3568_CLUSTER0_WIN0_DSP_ST		0x1028
+#define RK3568_CLUSTER0_WIN0_SCL_FACTOR_YRGB	0x1030
+#define RK3568_CLUSTER0_WIN0_AFBCD_ROTATE_MODE	0x1054
+#define RK3568_CLUSTER0_WIN0_AFBCD_HDR_PTR	0x1058
+#define RK3568_CLUSTER0_WIN0_AFBCD_VIR_WIDTH	0x105C
+#define RK3568_CLUSTER0_WIN0_AFBCD_PIC_SIZE	0x1060
+#define RK3568_CLUSTER0_WIN0_AFBCD_PIC_OFFSET	0x1064
+#define RK3568_CLUSTER0_WIN0_AFBCD_DSP_OFFSET	0x1068
+#define RK3568_CLUSTER0_WIN0_AFBCD_CTRL		0x106C
+
+#define RK3568_CLUSTER0_WIN1_CTRL0		0x1080
+#define RK3568_CLUSTER0_WIN1_CTRL1		0x1084
+#define RK3568_CLUSTER0_WIN1_YRGB_MST		0x1090
+#define RK3568_CLUSTER0_WIN1_CBR_MST		0x1094
+#define RK3568_CLUSTER0_WIN1_VIR		0x1098
+#define RK3568_CLUSTER0_WIN1_ACT_INFO		0x10A0
+#define RK3568_CLUSTER0_WIN1_DSP_INFO		0x10A4
+#define RK3568_CLUSTER0_WIN1_DSP_ST		0x10A8
+#define RK3568_CLUSTER0_WIN1_SCL_FACTOR_YRGB	0x10B0
+#define RK3568_CLUSTER0_WIN1_AFBCD_ROTATE_MODE	0x10D4
+#define RK3568_CLUSTER0_WIN1_AFBCD_HDR_PTR	0x10D8
+#define RK3568_CLUSTER0_WIN1_AFBCD_VIR_WIDTH	0x10DC
+#define RK3568_CLUSTER0_WIN1_AFBCD_PIC_SIZE	0x10E0
+#define RK3568_CLUSTER0_WIN1_AFBCD_PIC_OFFSET	0x10E4
+#define RK3568_CLUSTER0_WIN1_AFBCD_DSP_OFFSET	0x10E8
+#define RK3568_CLUSTER0_WIN1_AFBCD_CTRL		0x10EC
+
+#define RK3568_CLUSTER0_CTRL			0x1100
+
+#define RK3568_CLUSTER1_WIN0_CTRL0		0x1200
+#define RK3568_CLUSTER1_WIN0_CTRL1		0x1204
+#define RK3568_CLUSTER1_WIN0_YRGB_MST		0x1210
+#define RK3568_CLUSTER1_WIN0_CBR_MST		0x1214
+#define RK3568_CLUSTER1_WIN0_VIR		0x1218
+#define RK3568_CLUSTER1_WIN0_ACT_INFO		0x1220
+#define RK3568_CLUSTER1_WIN0_DSP_INFO		0x1224
+#define RK3568_CLUSTER1_WIN0_DSP_ST		0x1228
+#define RK3568_CLUSTER1_WIN0_SCL_FACTOR_YRGB	0x1230
+#define RK3568_CLUSTER1_WIN0_AFBCD_ROTATE_MODE	0x1254
+#define RK3568_CLUSTER1_WIN0_AFBCD_HDR_PTR	0x1258
+#define RK3568_CLUSTER1_WIN0_AFBCD_VIR_WIDTH	0x125C
+#define RK3568_CLUSTER1_WIN0_AFBCD_PIC_SIZE	0x1260
+#define RK3568_CLUSTER1_WIN0_AFBCD_PIC_OFFSET	0x1264
+#define RK3568_CLUSTER1_WIN0_AFBCD_DSP_OFFSET	0x1268
+#define RK3568_CLUSTER1_WIN0_AFBCD_CTRL		0x126C
+
+#define RK3568_CLUSTER1_WIN1_CTRL0		0x1280
+#define RK3568_CLUSTER1_WIN1_CTRL1		0x1284
+#define RK3568_CLUSTER1_WIN1_YRGB_MST		0x1290
+#define RK3568_CLUSTER1_WIN1_CBR_MST		0x1294
+#define RK3568_CLUSTER1_WIN1_VIR		0x1298
+#define RK3568_CLUSTER1_WIN1_ACT_INFO		0x12A0
+#define RK3568_CLUSTER1_WIN1_DSP_INFO		0x12A4
+#define RK3568_CLUSTER1_WIN1_DSP_ST		0x12A8
+#define RK3568_CLUSTER1_WIN1_SCL_FACTOR_YRGB	0x12B0
+#define RK3568_CLUSTER1_WIN1_AFBCD_ROTATE_MODE	0x12D4
+#define RK3568_CLUSTER1_WIN1_AFBCD_HDR_PTR	0x12D8
+#define RK3568_CLUSTER1_WIN1_AFBCD_VIR_WIDTH	0x12DC
+#define RK3568_CLUSTER1_WIN1_AFBCD_PIC_SIZE	0x12E0
+#define RK3568_CLUSTER1_WIN1_AFBCD_PIC_OFFSET	0x12E4
+#define RK3568_CLUSTER1_WIN1_AFBCD_DSP_OFFSET	0x12E8
+#define RK3568_CLUSTER1_WIN1_AFBCD_CTRL		0x12EC
+
+#define RK3568_CLUSTER1_CTRL			0x1300
+
+/* Esmart register definition */
+#define RK3568_ESMART0_CTRL0			0x1800
+
+#define RK3568_ESMART0_CTRL1			0x1804
+#define YMIRROR_EN_SHIFT			31
+#define RK3568_ESMART0_REGION0_CTRL		0x1810
+#define WIN_EN_SHIFT				0
+#define WIN_FORMAT_MASK				0x1f
+#define WIN_FORMAT_SHIFT			1
+
+#define RK3568_ESMART0_REGION0_YRGB_MST		0x1814
+#define RK3568_ESMART0_REGION0_CBR_MST		0x1818
+#define RK3568_ESMART0_REGION0_VIR		0x181C
+#define RK3568_ESMART0_REGION0_ACT_INFO		0x1820
+#define RK3568_ESMART0_REGION0_DSP_INFO		0x1824
+#define RK3568_ESMART0_REGION0_DSP_ST		0x1828
+#define RK3568_ESMART0_REGION0_SCL_CTRL		0x1830
+#define RK3568_ESMART0_REGION0_SCL_FACTOR_YRGB	0x1834
+#define RK3568_ESMART0_REGION0_SCL_FACTOR_CBR	0x1838
+#define RK3568_ESMART0_REGION0_SCL_OFFSET	0x183C
+#define RK3568_ESMART0_REGION1_CTRL		0x1840
+#define RK3568_ESMART0_REGION1_YRGB_MST		0x1844
+#define RK3568_ESMART0_REGION1_CBR_MST		0x1848
+#define RK3568_ESMART0_REGION1_VIR		0x184C
+#define RK3568_ESMART0_REGION1_ACT_INFO		0x1850
+#define RK3568_ESMART0_REGION1_DSP_INFO		0x1854
+#define RK3568_ESMART0_REGION1_DSP_ST		0x1858
+#define RK3568_ESMART0_REGION1_SCL_CTRL		0x1860
+#define RK3568_ESMART0_REGION1_SCL_FACTOR_YRGB	0x1864
+#define RK3568_ESMART0_REGION1_SCL_FACTOR_CBR	0x1868
+#define RK3568_ESMART0_REGION1_SCL_OFFSET	0x186C
+#define RK3568_ESMART0_REGION2_CTRL		0x1870
+#define RK3568_ESMART0_REGION2_YRGB_MST		0x1874
+#define RK3568_ESMART0_REGION2_CBR_MST		0x1878
+#define RK3568_ESMART0_REGION2_VIR		0x187C
+#define RK3568_ESMART0_REGION2_ACT_INFO		0x1880
+#define RK3568_ESMART0_REGION2_DSP_INFO		0x1884
+#define RK3568_ESMART0_REGION2_DSP_ST		0x1888
+#define RK3568_ESMART0_REGION2_SCL_CTRL		0x1890
+#define RK3568_ESMART0_REGION2_SCL_FACTOR_YRGB	0x1894
+#define RK3568_ESMART0_REGION2_SCL_FACTOR_CBR	0x1898
+#define RK3568_ESMART0_REGION2_SCL_OFFSET	0x189C
+#define RK3568_ESMART0_REGION3_CTRL		0x18A0
+#define RK3568_ESMART0_REGION3_YRGB_MST		0x18A4
+#define RK3568_ESMART0_REGION3_CBR_MST		0x18A8
+#define RK3568_ESMART0_REGION3_VIR		0x18AC
+#define RK3568_ESMART0_REGION3_ACT_INFO		0x18B0
+#define RK3568_ESMART0_REGION3_DSP_INFO		0x18B4
+#define RK3568_ESMART0_REGION3_DSP_ST		0x18B8
+#define RK3568_ESMART0_REGION3_SCL_CTRL		0x18C0
+#define RK3568_ESMART0_REGION3_SCL_FACTOR_YRGB	0x18C4
+#define RK3568_ESMART0_REGION3_SCL_FACTOR_CBR	0x18C8
+#define RK3568_ESMART0_REGION3_SCL_OFFSET	0x18CC
+
+#define RK3568_ESMART1_CTRL0			0x1A00
+#define RK3568_ESMART1_CTRL1			0x1A04
+#define RK3568_ESMART1_REGION0_CTRL		0x1A10
+#define RK3568_ESMART1_REGION0_YRGB_MST		0x1A14
+#define RK3568_ESMART1_REGION0_CBR_MST		0x1A18
+#define RK3568_ESMART1_REGION0_VIR		0x1A1C
+#define RK3568_ESMART1_REGION0_ACT_INFO		0x1A20
+#define RK3568_ESMART1_REGION0_DSP_INFO		0x1A24
+#define RK3568_ESMART1_REGION0_DSP_ST		0x1A28
+#define RK3568_ESMART1_REGION0_SCL_CTRL		0x1A30
+#define RK3568_ESMART1_REGION0_SCL_FACTOR_YRGB	0x1A34
+#define RK3568_ESMART1_REGION0_SCL_FACTOR_CBR	0x1A38
+#define RK3568_ESMART1_REGION0_SCL_OFFSET	0x1A3C
+#define RK3568_ESMART1_REGION1_CTRL		0x1A40
+#define RK3568_ESMART1_REGION1_YRGB_MST		0x1A44
+#define RK3568_ESMART1_REGION1_CBR_MST		0x1A48
+#define RK3568_ESMART1_REGION1_VIR		0x1A4C
+#define RK3568_ESMART1_REGION1_ACT_INFO		0x1A50
+#define RK3568_ESMART1_REGION1_DSP_INFO		0x1A54
+#define RK3568_ESMART1_REGION1_DSP_ST		0x1A58
+#define RK3568_ESMART1_REGION1_SCL_CTRL		0x1A60
+#define RK3568_ESMART1_REGION1_SCL_FACTOR_YRGB	0x1A64
+#define RK3568_ESMART1_REGION1_SCL_FACTOR_CBR	0x1A68
+#define RK3568_ESMART1_REGION1_SCL_OFFSET	0x1A6C
+#define RK3568_ESMART1_REGION2_CTRL		0x1A70
+#define RK3568_ESMART1_REGION2_YRGB_MST		0x1A74
+#define RK3568_ESMART1_REGION2_CBR_MST		0x1A78
+#define RK3568_ESMART1_REGION2_VIR		0x1A7C
+#define RK3568_ESMART1_REGION2_ACT_INFO		0x1A80
+#define RK3568_ESMART1_REGION2_DSP_INFO		0x1A84
+#define RK3568_ESMART1_REGION2_DSP_ST		0x1A88
+#define RK3568_ESMART1_REGION2_SCL_CTRL		0x1A90
+#define RK3568_ESMART1_REGION2_SCL_FACTOR_YRGB	0x1A94
+#define RK3568_ESMART1_REGION2_SCL_FACTOR_CBR	0x1A98
+#define RK3568_ESMART1_REGION2_SCL_OFFSET	0x1A9C
+#define RK3568_ESMART1_REGION3_CTRL		0x1AA0
+#define RK3568_ESMART1_REGION3_YRGB_MST		0x1AA4
+#define RK3568_ESMART1_REGION3_CBR_MST		0x1AA8
+#define RK3568_ESMART1_REGION3_VIR		0x1AAC
+#define RK3568_ESMART1_REGION3_ACT_INFO		0x1AB0
+#define RK3568_ESMART1_REGION3_DSP_INFO		0x1AB4
+#define RK3568_ESMART1_REGION3_DSP_ST		0x1AB8
+#define RK3568_ESMART1_REGION3_SCL_CTRL		0x1AC0
+#define RK3568_ESMART1_REGION3_SCL_FACTOR_YRGB	0x1AC4
+#define RK3568_ESMART1_REGION3_SCL_FACTOR_CBR	0x1AC8
+#define RK3568_ESMART1_REGION3_SCL_OFFSET	0x1ACC
+
+#define RK3568_SMART0_CTRL0			0x1C00
+#define RK3568_SMART0_CTRL1			0x1C04
+#define RK3568_SMART0_REGION0_CTRL		0x1C10
+#define RK3568_SMART0_REGION0_YRGB_MST		0x1C14
+#define RK3568_SMART0_REGION0_CBR_MST		0x1C18
+#define RK3568_SMART0_REGION0_VIR		0x1C1C
+#define RK3568_SMART0_REGION0_ACT_INFO		0x1C20
+#define RK3568_SMART0_REGION0_DSP_INFO		0x1C24
+#define RK3568_SMART0_REGION0_DSP_ST		0x1C28
+#define RK3568_SMART0_REGION0_SCL_CTRL		0x1C30
+#define RK3568_SMART0_REGION0_SCL_FACTOR_YRGB	0x1C34
+#define RK3568_SMART0_REGION0_SCL_FACTOR_CBR	0x1C38
+#define RK3568_SMART0_REGION0_SCL_OFFSET	0x1C3C
+#define RK3568_SMART0_REGION1_CTRL		0x1C40
+#define RK3568_SMART0_REGION1_YRGB_MST		0x1C44
+#define RK3568_SMART0_REGION1_CBR_MST		0x1C48
+#define RK3568_SMART0_REGION1_VIR		0x1C4C
+#define RK3568_SMART0_REGION1_ACT_INFO		0x1C50
+#define RK3568_SMART0_REGION1_DSP_INFO		0x1C54
+#define RK3568_SMART0_REGION1_DSP_ST		0x1C58
+#define RK3568_SMART0_REGION1_SCL_CTRL		0x1C60
+#define RK3568_SMART0_REGION1_SCL_FACTOR_YRGB	0x1C64
+#define RK3568_SMART0_REGION1_SCL_FACTOR_CBR	0x1C68
+#define RK3568_SMART0_REGION1_SCL_OFFSET	0x1C6C
+#define RK3568_SMART0_REGION2_CTRL		0x1C70
+#define RK3568_SMART0_REGION2_YRGB_MST		0x1C74
+#define RK3568_SMART0_REGION2_CBR_MST		0x1C78
+#define RK3568_SMART0_REGION2_VIR		0x1C7C
+#define RK3568_SMART0_REGION2_ACT_INFO		0x1C80
+#define RK3568_SMART0_REGION2_DSP_INFO		0x1C84
+#define RK3568_SMART0_REGION2_DSP_ST		0x1C88
+#define RK3568_SMART0_REGION2_SCL_CTRL		0x1C90
+#define RK3568_SMART0_REGION2_SCL_FACTOR_YRGB	0x1C94
+#define RK3568_SMART0_REGION2_SCL_FACTOR_CBR	0x1C98
+#define RK3568_SMART0_REGION2_SCL_OFFSET	0x1C9C
+#define RK3568_SMART0_REGION3_CTRL		0x1CA0
+#define RK3568_SMART0_REGION3_YRGB_MST		0x1CA4
+#define RK3568_SMART0_REGION3_CBR_MST		0x1CA8
+#define RK3568_SMART0_REGION3_VIR		0x1CAC
+#define RK3568_SMART0_REGION3_ACT_INFO		0x1CB0
+#define RK3568_SMART0_REGION3_DSP_INFO		0x1CB4
+#define RK3568_SMART0_REGION3_DSP_ST		0x1CB8
+#define RK3568_SMART0_REGION3_SCL_CTRL		0x1CC0
+#define RK3568_SMART0_REGION3_SCL_FACTOR_YRGB	0x1CC4
+#define RK3568_SMART0_REGION3_SCL_FACTOR_CBR	0x1CC8
+#define RK3568_SMART0_REGION3_SCL_OFFSET	0x1CCC
+
+#define RK3568_SMART1_CTRL0			0x1E00
+#define RK3568_SMART1_CTRL1			0x1E04
+#define RK3568_SMART1_REGION0_CTRL		0x1E10
+#define RK3568_SMART1_REGION0_YRGB_MST		0x1E14
+#define RK3568_SMART1_REGION0_CBR_MST		0x1E18
+#define RK3568_SMART1_REGION0_VIR		0x1E1C
+#define RK3568_SMART1_REGION0_ACT_INFO		0x1E20
+#define RK3568_SMART1_REGION0_DSP_INFO		0x1E24
+#define RK3568_SMART1_REGION0_DSP_ST		0x1E28
+#define RK3568_SMART1_REGION0_SCL_CTRL		0x1E30
+#define RK3568_SMART1_REGION0_SCL_FACTOR_YRGB	0x1E34
+#define RK3568_SMART1_REGION0_SCL_FACTOR_CBR	0x1E38
+#define RK3568_SMART1_REGION0_SCL_OFFSET	0x1E3C
+#define RK3568_SMART1_REGION1_CTRL		0x1E40
+#define RK3568_SMART1_REGION1_YRGB_MST		0x1E44
+#define RK3568_SMART1_REGION1_CBR_MST		0x1E48
+#define RK3568_SMART1_REGION1_VIR		0x1E4C
+#define RK3568_SMART1_REGION1_ACT_INFO		0x1E50
+#define RK3568_SMART1_REGION1_DSP_INFO		0x1E54
+#define RK3568_SMART1_REGION1_DSP_ST		0x1E58
+#define RK3568_SMART1_REGION1_SCL_CTRL		0x1E60
+#define RK3568_SMART1_REGION1_SCL_FACTOR_YRGB	0x1E64
+#define RK3568_SMART1_REGION1_SCL_FACTOR_CBR	0x1E68
+#define RK3568_SMART1_REGION1_SCL_OFFSET	0x1E6C
+#define RK3568_SMART1_REGION2_CTRL		0x1E70
+#define RK3568_SMART1_REGION2_YRGB_MST		0x1E74
+#define RK3568_SMART1_REGION2_CBR_MST		0x1E78
+#define RK3568_SMART1_REGION2_VIR		0x1E7C
+#define RK3568_SMART1_REGION2_ACT_INFO		0x1E80
+#define RK3568_SMART1_REGION2_DSP_INFO		0x1E84
+#define RK3568_SMART1_REGION2_DSP_ST		0x1E88
+#define RK3568_SMART1_REGION2_SCL_CTRL		0x1E90
+#define RK3568_SMART1_REGION2_SCL_FACTOR_YRGB	0x1E94
+#define RK3568_SMART1_REGION2_SCL_FACTOR_CBR	0x1E98
+#define RK3568_SMART1_REGION2_SCL_OFFSET	0x1E9C
+#define RK3568_SMART1_REGION3_CTRL		0x1EA0
+#define RK3568_SMART1_REGION3_YRGB_MST		0x1EA4
+#define RK3568_SMART1_REGION3_CBR_MST		0x1EA8
+#define RK3568_SMART1_REGION3_VIR		0x1EAC
+#define RK3568_SMART1_REGION3_ACT_INFO		0x1EB0
+#define RK3568_SMART1_REGION3_DSP_INFO		0x1EB4
+#define RK3568_SMART1_REGION3_DSP_ST		0x1EB8
+#define RK3568_SMART1_REGION3_SCL_CTRL		0x1EC0
+#define RK3568_SMART1_REGION3_SCL_FACTOR_YRGB	0x1EC4
+#define RK3568_SMART1_REGION3_SCL_FACTOR_CBR	0x1EC8
+#define RK3568_SMART1_REGION3_SCL_OFFSET	0x1ECC
+
+#define RK3568_MAX_REG				0x1ED0
+
+#define VOP2_LAYER_MAX				8
+#define VOP2_MAX_VP				4
+
+#define _VOP_REG(off, _mask, _shift, _write_mask) \
+		{ \
+		 .offset = off, \
+		 .mask = _mask, \
+		 .shift = _shift, \
+		 .write_mask = _write_mask, \
+		}
+
+#define VOP_REG(off, _mask, _shift) \
+		_VOP_REG(off, _mask, _shift, false)
+enum dither_down_mode {
+	RGB888_TO_RGB565 = 0x0,
+	RGB888_TO_RGB666 = 0x1
+};
+
+struct vop2_reg {
+	uint32_t mask;
+	uint32_t offset:12;
+	uint32_t shift:5;
+	uint32_t write_mask:1;
+};
+
+struct vop2_grf_ctrl {
+	struct vop2_reg dclk_inv;
+};
+
+enum vop2_video_ports_id {
+	VOP2_VP0,
+	VOP2_VP1,
+	VOP2_VP2,
+	VOP2_VP3,
+	VOP2_VP_MAX,
+};
+
+struct vop2_layer {
+	uint8_t id;
+	/**
+	 * @win_phys_id: window id of the layer selected.
+	 * Every layer must make sure to select different
+	 * windows of others.
+	 */
+	uint8_t win_phys_id;
+};
+
+struct vop2_win {
+	uint8_t id;
+	uint8_t layer_id;
+	uint8_t phys_id;
+};
+
+struct vop2_data {
+	uint32_t version;
+	struct vop_rect max_output[VOP2_MAX_VP];
+	/**
+	 * win_id: id of window attach to VP0,VP1,VP2,VP3,
+	 * Only support one window for one VP in u-boot.
+	 *
+	 */
+	uint8_t win_id[VOP2_MAX_VP];
+	uint8_t nr_vps;
+	uint8_t nr_layers;
+	/**
+	 * win_sel_id: from register LAYER_SEL
+	 *
+	 */
+	uint8_t win_sel_id[VOP2_LAYER_MAX];
+	struct vop2_grf_ctrl *grf_ctrl;
+};
+
+struct vop2 {
+	u32 *regsbak;
+	void *regs;
+	void *grf;
+	uint32_t reg_len;
+	uint32_t version;
+	const struct vop2_data *data;
+	/**
+	 * @nr_wins: active wins attached to the video port
+	 */
+	uint8_t nr_wins[VOP2_VP_MAX];
+	struct vop2_win win[VOP2_LAYER_MAX];
+	struct vop2_layer layer[VOP2_LAYER_MAX];
+};
+
+static struct vop2 *rockchip_vop2;
+static void vop2_setup_win_for_vp(struct display_state *state);
+
+static inline uint16_t scl_cal_scale(int src, int dst, int shift)
+{
+	return ((src * 2 - 3) << (shift - 1)) / (dst - 1);
+}
+
+static inline uint16_t scl_cal_scale2(int src, int dst)
+{
+	return ((src - 1) << 12) / (dst - 1);
+}
+
+static inline void vop2_writel(struct vop2 *vop2, uint32_t offset, uint32_t v)
+{
+	writel(v, vop2->regs + offset);
+	vop2->regsbak[offset >> 2] = v;
+}
+
+static inline uint32_t vop2_readl(struct vop2 *vop2, uint32_t offset)
+{
+	return readl(vop2->regs + offset);
+}
+
+static inline void vop2_mask_write(struct vop2 *vop2, uint32_t offset,
+				   uint32_t mask, uint32_t shift, uint32_t v,
+				   bool write_mask)
+{
+	if (!mask)
+		return;
+
+	if (write_mask) {
+		v = ((v & mask) << shift) | (mask << (shift + 16));
+	} else {
+		uint32_t cached_val = vop2->regsbak[offset >> 2];
+
+		v = (cached_val & ~(mask << shift)) | ((v & mask) << shift);
+		vop2->regsbak[offset >> 2] = v;
+	}
+
+	writel(v, vop2->regs + offset);
+}
+
+static inline int us_to_vertical_line(struct drm_display_mode *mode, int us)
+{
+	return us * mode->clock / mode->htotal / 1000;
+}
+
+static bool is_yuv_output(uint32_t bus_format)
+{
+	switch (bus_format) {
+	case MEDIA_BUS_FMT_YUV8_1X24:
+	case MEDIA_BUS_FMT_YUV10_1X30:
+	case MEDIA_BUS_FMT_UYYVYY8_0_5X24:
+	case MEDIA_BUS_FMT_UYYVYY10_0_5X30:
+		return true;
+	default:
+		return false;
+	}
+}
+
+static __maybe_unused bool is_uv_swap(uint32_t bus_format, uint32_t output_mode)
+{
+	/*
+	 * FIXME:
+	 *
+	 * There is no media type for YUV444 output,
+	 * so when out_mode is AAAA or P888, assume output is YUV444 on
+	 * yuv format.
+	 *
+	 * From H/W testing, YUV444 mode need a rb swap.
+	 */
+	if ((bus_format == MEDIA_BUS_FMT_YUV8_1X24 ||
+	     bus_format == MEDIA_BUS_FMT_YUV10_1X30) &&
+	    (output_mode == ROCKCHIP_OUT_MODE_AAAA ||
+	     output_mode == ROCKCHIP_OUT_MODE_P888))
+		return true;
+	else
+		return false;
+}
+
+static int rockchip_vop2_init_gamma(struct vop2 *vop2,
+				    struct display_state *state)
+{
+	return 0;
+}
+
+static void vop2_post_config(struct display_state *state, struct vop2 *vop2)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct drm_display_mode *mode = &conn_state->mode;
+	u16 vtotal = mode->crtc_vtotal;
+	u16 hact_st = mode->crtc_htotal - mode->crtc_hsync_start;
+	u16 vact_st = mode->crtc_vtotal - mode->crtc_vsync_start;
+	u16 hdisplay = mode->crtc_hdisplay;
+	u16 vdisplay = mode->crtc_vdisplay;
+	u16 hsize =
+	    hdisplay * (conn_state->overscan.left_margin +
+			conn_state->overscan.right_margin) / 200;
+	u16 vsize =
+	    vdisplay * (conn_state->overscan.top_margin +
+			conn_state->overscan.bottom_margin) / 200;
+	u16 hact_end, vact_end;
+	u32 val;
+	u16 nr_mixers = 5, used_layer = 2, pre_scan_max_dly = 40;
+	u32 bg_ovl_dly, bg_dly, pre_scan_dly;
+	u16 hsync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
+
+	if (mode->flags & DRM_MODE_FLAG_INTERLACE)
+		vsize = round_down(vsize, 2);
+
+	hact_st += hdisplay * (100 - conn_state->overscan.left_margin) / 200;
+	hact_end = hact_st + hsize;
+	val = hact_st << 16;
+	val |= hact_end;
+
+	vop2_writel(vop2, RK3568_VP0_POST_DSP_HACT_INFO, val);
+	vact_st += vdisplay * (100 - conn_state->overscan.top_margin) / 200;
+	vact_end = vact_st + vsize;
+	val = vact_st << 16;
+	val |= vact_end;
+	vop2_writel(vop2, RK3568_VP0_POST_DSP_VACT_INFO, val);
+	val = scl_cal_scale2(vdisplay, vsize) << 16;
+	val |= scl_cal_scale2(hdisplay, hsize);
+	vop2_writel(vop2, RK3568_VP0_POST_SCL_FACTOR_YRGB, val);
+#define POST_HORIZONTAL_SCALEDOWN_EN(x)		((x) << 0)
+#define POST_VERTICAL_SCALEDOWN_EN(x)		((x) << 1)
+	vop2_writel(vop2, RK3568_VP0_POST_SCL_CTRL,
+		    POST_HORIZONTAL_SCALEDOWN_EN(hdisplay != hsize) |
+		    POST_VERTICAL_SCALEDOWN_EN(vdisplay != vsize));
+	if (mode->flags & DRM_MODE_FLAG_INTERLACE) {
+		u16 vact_st_f1 = vtotal + vact_st + 1;
+		u16 vact_end_f1 = vact_st_f1 + vsize;
+
+		val = vact_st_f1 << 16 | vact_end_f1;
+		vop2_writel(vop2, RK3568_VP0_POST_DSP_VACT_INFO_F1, val);
+	}
+
+	bg_ovl_dly = (nr_mixers - used_layer) << 1;
+	bg_dly = pre_scan_max_dly - bg_ovl_dly;
+	pre_scan_dly = bg_dly + (hdisplay >> 1) - 1;
+	pre_scan_dly = (pre_scan_dly << 16) | hsync_len;
+	vop2_writel(vop2, RK3568_VP0_PRE_SCAN_HTIMING, pre_scan_dly);
+}
+
+static void vop2_layer_map_initial(struct vop2 *vop2)
+{
+	struct vop2_layer *layer;
+	struct vop2_win *win;
+	uint32_t layer_map, sel;
+	int i, j;
+
+	layer_map = vop2_readl(vop2, RK3568_OVL_LAYER_SEL);
+
+	for (i = 0; i < vop2->data->nr_layers; i++) {
+		sel = (layer_map >> (4 * i)) & 0xf;
+		layer = &vop2->layer[i];
+		win = NULL;
+		for (j = 0; j < vop2->data->nr_layers; j++) {
+			if (sel == vop2->data->win_sel_id[j]) {
+				win = &vop2->win[j];
+				break;
+			}
+		}
+
+		if (!win) {
+			printf("invalid layer map :0x%x\n", layer_map);
+			return;
+		}
+
+		layer->win_phys_id = j;
+		win->layer_id = i;
+		debug("layer%d select %d\n", i, j);
+	}
+}
+
+static int vop2_initial(struct vop2 *vop2, struct display_state *state)
+{
+	struct crtc_state *cstate = &state->crtc_state;
+	struct connector_state *conn_state = &state->conn_state;
+	struct drm_display_mode *mode = &conn_state->mode;
+	char dclk_name[9];
+	struct clk dclk;
+	uint8_t shift = 0;
+	int i, ret;
+
+	/* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
+	ret = clk_set_defaults(cstate->dev);
+	if (ret)
+		debug("%s clk_set_defaults failed %d\n", __func__, ret);
+	snprintf(dclk_name, sizeof(dclk_name), "dclk_vp%d", cstate->crtc_id);
+	ret = clk_get_by_name(cstate->dev, dclk_name, &dclk);
+	if (!ret)
+		ret = clk_set_rate(&dclk, mode->clock * 1000);
+
+	if (IS_ERR_VALUE(ret)) {
+		printf("%s: Failed to set dclk: ret=%d\n", __func__, ret);
+		return ret;
+	}
+
+	memcpy(vop2->regsbak, vop2->regs, vop2->reg_len);
+
+	rockchip_vop2_init_gamma(vop2, state);
+	vop2_mask_write(vop2, RK3568_OVL_CTRL, EN_MASK,
+			OVL_PORT_MUX_REG_DONE_IMD_SHIFT, 1, false);
+	vop2_mask_write(vop2, RK3568_DSP_IF_POL, EN_MASK,
+			IF_CTRL_REG_DONE_IMD_SHIFT, 1, false);
+	for (i = 0; i < vop2->data->nr_vps - 1; i++) {
+		shift = i * 4;
+		vop2_mask_write(vop2, RK3568_OVL_PORT_SEL, PORT_MUX_MASK, PORT_MUX_SHIFT + shift, 8, false);	//todo
+	}
+
+	vop2_layer_map_initial(vop2);
+
+	return 0;
+}
+
+/*
+ * VOP2 have multi video ports.
+ * video port ------- crtc
+ */
+static int rockchip_vop2_preinit(struct display_state *state)
+{
+	struct crtc_state *cstate = &state->crtc_state;
+	const struct vop2_data *vop2_data = cstate->crtc->data;
+
+	if (!rockchip_vop2) {
+		rockchip_vop2 = malloc(sizeof(struct vop2));
+		if (!rockchip_vop2)
+			return -ENOMEM;
+		rockchip_vop2->regs = dev_read_addr_ptr(cstate->dev);
+		rockchip_vop2->regsbak = malloc(RK3568_MAX_REG);
+		rockchip_vop2->reg_len = RK3568_MAX_REG;
+		rockchip_vop2->grf =
+		    syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+		if (rockchip_vop2->grf <= 0)
+			printf("%s: Get syscon grf failed (ret=%p)\n", __func__,
+			       rockchip_vop2->grf);
+
+		rockchip_vop2->version = vop2_data->version;
+		rockchip_vop2->data = vop2_data;
+	}
+
+	cstate->private = rockchip_vop2;
+	cstate->max_output = vop2_data->max_output[cstate->crtc_id];
+
+	return 0;
+}
+
+static int rockchip_vop2_init(struct display_state *state)
+{
+	struct crtc_state *cstate = &state->crtc_state;
+	struct connector_state *conn_state = &state->conn_state;
+	struct drm_display_mode *mode = &conn_state->mode;
+	//const struct rockchip_crtc *crtc = cstate->crtc;
+	//const struct vop2_data *vop2_data = crtc->data;
+	struct vop2 *vop2 = cstate->private;
+	u16 hsync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
+	u16 hdisplay = mode->crtc_hdisplay;
+	u16 htotal = mode->crtc_htotal;
+	u16 hact_st = mode->crtc_htotal - mode->crtc_hsync_start;
+	u16 hact_end = hact_st + hdisplay;
+	u16 vdisplay = mode->crtc_vdisplay;
+	u16 vtotal = mode->crtc_vtotal;
+	u16 vsync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
+	u16 vact_st = mode->crtc_vtotal - mode->crtc_vsync_start;
+	u16 vact_end = vact_st + vdisplay;
+	bool yuv_overlay = false;
+	//bool yuv_overlay = false, post_r2y_en = false, post_y2r_en = false;
+	uint32_t vp_offset = (cstate->crtc_id * 0x100);
+	//struct clk dclk;
+	//fdt_size_t len;
+	u32 val;
+	//int ret;
+	bool dclk_inv;
+	uint8_t dither_down_en = 0;
+	uint8_t pre_dither_down_en = 0;
+	//uint8_t dither_down_mode = RGB888_TO_RGB666;
+
+	vop2_initial(vop2, state);
+
+	dclk_inv = (mode->flags & DRM_MODE_FLAG_PPIXDATA) ? 0 : 1;
+
+	if (conn_state->output_if & VOP_OUTPUT_IF_RGB) {
+		vop2_mask_write(vop2, RK3568_DSP_IF_EN, EN_MASK, RGB_EN_SHIFT,
+				1, false);
+		vop2_mask_write(vop2, RK3568_DSP_IF_EN, IF_MUX_MASK,
+				RGB_MUX_SHIFT, cstate->crtc_id, false);
+		vop2_mask_write(vop2, RK3568_DSP_IF_POL, EN_MASK,
+				IF_CRTL_RGB_LVDS_DCLK_POL_SHIT, ! !dclk_inv,
+				false);
+		//VOP2_GRF_SET(vop2, dclk_inv, dclk_inv);
+	}
+
+	if (conn_state->output_if & VOP_OUTPUT_IF_BT1120) {
+		vop2_mask_write(vop2, RK3568_DSP_IF_EN, EN_MASK,
+				BT1120_EN_SHIFT, 1, false);
+		vop2_mask_write(vop2, RK3568_DSP_IF_EN, IF_MUX_MASK,
+				RGB_MUX_SHIFT, cstate->crtc_id, false);
+	}
+
+	if (conn_state->output_if & VOP_OUTPUT_IF_BT656) {
+		vop2_mask_write(vop2, RK3568_DSP_IF_EN, EN_MASK, BT656_EN_SHIFT,
+				1, false);
+		vop2_mask_write(vop2, RK3568_DSP_IF_EN, IF_MUX_MASK,
+				RGB_MUX_SHIFT, cstate->crtc_id, false);
+	}
+
+	if (conn_state->output_if & VOP_OUTPUT_IF_LVDS0) {
+		vop2_mask_write(vop2, RK3568_DSP_IF_EN, EN_MASK, LVDS0_EN_SHIFT,
+				1, false);
+		vop2_mask_write(vop2, RK3568_DSP_IF_EN, IF_MUX_MASK,
+				LVDS0_MUX_SHIFT, cstate->crtc_id, false);
+	}
+
+	if (conn_state->output_if & VOP_OUTPUT_IF_LVDS1) {
+		vop2_mask_write(vop2, RK3568_DSP_IF_EN, EN_MASK, LVDS1_EN_SHIFT,
+				1, false);
+		vop2_mask_write(vop2, RK3568_DSP_IF_EN, IF_MUX_MASK,
+				LVDS1_MUX_SHIFT, cstate->crtc_id, false);
+	}
+
+	if (conn_state->output_flags &
+	    (ROCKCHIP_OUTPUT_DUAL_CHANNEL_ODD_EVEN_MODE |
+	     ROCKCHIP_OUTPUT_DUAL_CHANNEL_LEFT_RIGHT_MODE)) {
+		vop2_mask_write(vop2, RK3568_DSP_IF_CTRL, EN_MASK,
+				LVDS_DUAL_EN_SHIFT, 1, false);
+		if (conn_state->output_flags &
+		    ROCKCHIP_OUTPUT_DUAL_CHANNEL_LEFT_RIGHT_MODE)
+			vop2_mask_write(vop2, RK3568_DSP_IF_CTRL, EN_MASK,
+					LVDS_DUAL_LEFT_RIGHT_EN_SHIFT, 1,
+					false);
+		if (conn_state->output_flags & ROCKCHIP_OUTPUT_DATA_SWAP)
+			vop2_mask_write(vop2, RK3568_DSP_IF_CTRL, EN_MASK,
+					LVDS_DUAL_SWAP_EN_SHIFT, 1, false);
+	}
+
+	conn_state->output_if = VOP_OUTPUT_IF_MIPI0;
+	if (conn_state->output_if & VOP_OUTPUT_IF_MIPI0) {
+		//cstate->crtc_id = 0;
+		vop2_mask_write(vop2, RK3568_DSP_IF_EN, EN_MASK, MIPI0_EN_SHIFT,
+				1, false);
+		vop2_mask_write(vop2, RK3568_DSP_IF_EN, IF_MUX_MASK,
+				MIPI0_MUX_SHIFT, cstate->crtc_id, false);
+		vop2_mask_write(vop2, RK3568_DSP_IF_POL, EN_MASK,
+				IF_CRTL_MIPI_DCLK_POL_SHIT, ! !dclk_inv, false);
+	}
+
+	if (conn_state->output_if & VOP_OUTPUT_IF_MIPI1) {
+		vop2_mask_write(vop2, RK3568_DSP_IF_EN, EN_MASK, MIPI1_EN_SHIFT,
+				1, false);
+		vop2_mask_write(vop2, RK3568_DSP_IF_EN, IF_MUX_MASK,
+				MIPI1_MUX_SHIFT, cstate->crtc_id, false);
+		vop2_mask_write(vop2, RK3568_DSP_IF_POL, EN_MASK,
+				IF_CRTL_MIPI_DCLK_POL_SHIT, ! !dclk_inv, false);
+	}
+
+	if (conn_state->output_flags &
+	    ROCKCHIP_OUTPUT_DUAL_CHANNEL_LEFT_RIGHT_MODE) {
+		vop2_mask_write(vop2, RK3568_VP0_MIPI_CTRL + vp_offset, EN_MASK,
+				MIPI_DUAL_EN_SHIFT, 1, false);
+		if (conn_state->output_flags & ROCKCHIP_OUTPUT_DATA_SWAP)
+			vop2_mask_write(vop2, RK3568_VP0_MIPI_CTRL + vp_offset,
+					EN_MASK, MIPI_DUAL_SWAP_EN_SHIFT, 1,
+					false);
+	}
+
+	if (conn_state->output_if & VOP_OUTPUT_IF_eDP0) {
+		vop2_mask_write(vop2, RK3568_DSP_IF_EN, EN_MASK, EDP0_EN_SHIFT,
+				1, false);
+		vop2_mask_write(vop2, RK3568_DSP_IF_EN, IF_MUX_MASK,
+				EDP0_MUX_SHIFT, cstate->crtc_id, false);
+	}
+
+	if (conn_state->output_if & VOP_OUTPUT_IF_HDMI0) {
+		vop2_mask_write(vop2, RK3568_DSP_IF_EN, EN_MASK, HDMI0_EN_SHIFT,
+				1, false);
+		vop2_mask_write(vop2, RK3568_DSP_IF_EN, IF_MUX_MASK,
+				HDMI0_MUX_SHIFT, cstate->crtc_id, false);
+	}
+	vop2_mask_write(vop2, RK3568_VP0_DSP_CTRL + vp_offset, OUT_MODE_MASK,
+			OUT_MODE_SHIFT, conn_state->output_mode, false);
+
+	switch (conn_state->bus_format) {
+	case MEDIA_BUS_FMT_RGB565_1X16:
+		dither_down_en = 1;
+		break;
+	case MEDIA_BUS_FMT_RGB666_1X18:
+	case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
+	case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
+	case MEDIA_BUS_FMT_RGB666_1X7X3_JEIDA:
+		dither_down_en = 1;
+		break;
+	case MEDIA_BUS_FMT_YUV8_1X24:
+	case MEDIA_BUS_FMT_UYYVYY8_0_5X24:
+		dither_down_en = 0;
+		pre_dither_down_en = 1;
+		break;
+	case MEDIA_BUS_FMT_YUV10_1X30:
+	case MEDIA_BUS_FMT_UYYVYY10_0_5X30:
+	case MEDIA_BUS_FMT_RGB888_1X24:
+	case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
+	case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
+	default:
+		dither_down_en = 0;
+		pre_dither_down_en = 0;
+		break;
+	}
+
+	if (conn_state->output_mode == ROCKCHIP_OUT_MODE_AAAA)
+		pre_dither_down_en = 0;
+	else
+		pre_dither_down_en = 1;
+	vop2_mask_write(vop2, RK3568_VP0_DSP_CTRL + vp_offset, EN_MASK,
+			DITHER_DOWN_EN_SHIFT, dither_down_en, false);
+	vop2_mask_write(vop2, RK3568_VP0_DSP_CTRL + vp_offset, EN_MASK,
+			PRE_DITHER_DOWN_EN_SHIFT, pre_dither_down_en, false);
+
+	yuv_overlay = is_yuv_output(conn_state->bus_format) ? 1 : 0;
+	vop2_mask_write(vop2, RK3568_OVL_CTRL, EN_MASK, cstate->crtc_id,
+			yuv_overlay, false);
+
+	cstate->yuv_overlay = yuv_overlay;
+
+	vop2_writel(vop2, RK3568_VP0_DSP_HTOTAL_HS_END + vp_offset,
+		    (htotal << 16) | hsync_len);
+	val = hact_st << 16;
+	val |= hact_end;
+	vop2_writel(vop2, RK3568_VP0_DSP_HACT_ST_END + vp_offset, val);
+	val = vact_st << 16;
+	val |= vact_end;
+	vop2_writel(vop2, RK3568_VP0_DSP_VACT_ST_END + vp_offset, val);
+	if (mode->flags & DRM_MODE_FLAG_INTERLACE) {
+		u16 vact_st_f1 = vtotal + vact_st + 1;
+		u16 vact_end_f1 = vact_st_f1 + vdisplay;
+
+		val = vact_st_f1 << 16 | vact_end_f1;
+		vop2_writel(vop2, RK3568_VP0_DSP_VACT_ST_END_F1 + vp_offset,
+			    val);
+
+		val = vtotal << 16 | (vtotal + vsync_len);
+		vop2_writel(vop2, RK3568_VP0_DSP_VS_ST_END_F1 + vp_offset, val);
+		vop2_mask_write(vop2, RK3568_VP0_DSP_CTRL + vp_offset, EN_MASK,
+				INTERLACE_EN_SHIFT, 1, false);
+		vop2_mask_write(vop2, RK3568_VP0_DSP_CTRL + vp_offset, EN_MASK,
+				P2I_EN_SHIFT, 1, false);
+		vtotal += vtotal + 1;
+	} else {
+		vop2_mask_write(vop2, RK3568_VP0_DSP_CTRL + vp_offset, EN_MASK,
+				INTERLACE_EN_SHIFT, 0, false);
+		vop2_mask_write(vop2, RK3568_VP0_DSP_CTRL + vp_offset, EN_MASK,
+				P2I_EN_SHIFT, 0, false);
+	}
+	vop2_writel(vop2, RK3568_VP0_DSP_VTOTAL_VS_END + vp_offset,
+		    (vtotal << 16) | vsync_len);
+	val = ! !(mode->flags & DRM_MODE_FLAG_DBLCLK);
+	vop2_mask_write(vop2, RK3568_VP0_DSP_CTRL + vp_offset, EN_MASK,
+			DCLK_DIV2_EN_SHIFT, val, false);
+
+	vop2_post_config(state, vop2);
+	vop2_setup_win_for_vp(state);
+
+	return 0;
+}
+
+static void vop2_setup_win_for_vp(struct display_state *state)
+{
+	struct crtc_state *cstate = &state->crtc_state;
+	const struct rockchip_crtc *crtc = cstate->crtc;
+	const struct vop2_data *vop2_data = crtc->data;
+	struct vop2 *vop2 = cstate->private;
+	u8 port_id = cstate->crtc_id;
+	struct vop2_win *win;
+	struct vop2_layer *layer;
+	u8 used_layers = 0;
+	u8 layer_id, win_phys_id, win_sel_id;
+	u8 shift;
+	int i;
+
+	for (i = 0; i < port_id; i++)
+		used_layers += vop2->nr_wins[i];
+
+	vop2->nr_wins[port_id]++;
+	/*
+	 * Win and layer must map one by one, if a win is selected
+	 * by two layers, unexpected error may happen.
+	 * So when we attach a new win to a layer, we also move the
+	 * old win of the layer to the layer where the new win comes from.
+	 *
+	 */
+	layer = &vop2->layer[used_layers];
+	win = &vop2->win[port_id];
+	shift = port_id * 2;
+	vop2_mask_write(vop2, RK3568_OVL_PORT_SEL, LAYER_SEL_PORT_MASK,
+			LAYER_SEL_PORT_SHIFT + shift, port_id, false);
+	shift = used_layers * 4;
+	win_phys_id = vop2->data->win_id[port_id];
+	win_sel_id = vop2->data->win_sel_id[win_phys_id];
+	vop2_mask_write(vop2, RK3568_OVL_LAYER_SEL, LAYER_SEL_PORT_MASK, shift,
+			win_sel_id, false);
+	layer_id = win->layer_id;
+	win_phys_id = layer->win_phys_id;
+	win->layer_id = layer->id;
+	layer->win_phys_id = win->phys_id;
+	layer = &vop2->layer[layer_id];
+	win = &vop2->win[win_phys_id];
+	shift = layer_id * 4;
+	win_sel_id = vop2->data->win_sel_id[win_phys_id];
+	vop2_mask_write(vop2, RK3568_OVL_LAYER_SEL, LAYER_SEL_PORT_MASK, shift,
+			win_sel_id, false);
+	win->layer_id = layer_id;
+	layer->win_phys_id = win_phys_id;
+
+	if (port_id == (vop2_data->nr_vps - 1))
+		used_layers = vop2_data->nr_layers;
+	shift = port_id * 4;
+	vop2_mask_write(vop2, RK3568_OVL_PORT_SEL, PORT_MUX_MASK, shift,
+			used_layers, false);
+
+	vop2_writel(vop2, 0x604, 0x54760312);
+	vop2_writel(vop2, 0x608, 0x84000781);
+	vop2_writel(vop2, 0x6e0, 0x22000000);
+}
+
+static int rockchip_vop2_set_plane(struct display_state *state)
+{
+	struct crtc_state *cstate = &state->crtc_state;
+	struct connector_state *conn_state = &state->conn_state;
+	struct drm_display_mode *mode = &conn_state->mode;
+	u32 act_info, dsp_info, dsp_st, dsp_stx, dsp_sty;
+	struct vop2 *vop2 = cstate->private;
+	int src_w = cstate->src_w;
+	int src_h = cstate->src_h;
+	int crtc_x = cstate->crtc_x;
+	int crtc_y = cstate->crtc_y;
+	int crtc_w = cstate->crtc_w;
+	int crtc_h = cstate->crtc_h;
+	int xvir = cstate->xvir;
+	int y_mirror = 0;
+	uint32_t win_offset = cstate->crtc_id * 0x200;
+	uint32_t cfg_done = CFG_DONE_EN | BIT(cstate->crtc_id);
+
+	if (crtc_w > cstate->max_output.width) {
+		printf("ERROR: output w[%d] exceeded max width[%d]\n",
+		       crtc_w, cstate->max_output.width);
+		return -EINVAL;
+	}
+
+	act_info = (src_h - 1) << 16;
+	act_info |= (src_w - 1) & 0xffff;
+
+	dsp_info = (crtc_h - 1) << 16;
+	dsp_info |= (crtc_w - 1) & 0xffff;
+
+	dsp_stx = crtc_x;
+	dsp_sty = crtc_y;
+	dsp_st = dsp_sty << 16 | (dsp_stx & 0xffff);
+
+	if (mode->flags & DRM_MODE_FLAG_YMIRROR)
+		y_mirror = 1;
+	else
+		y_mirror = 0;
+
+	if (y_mirror)
+		cstate->dma_addr += (src_h - 1) * xvir * 4;
+	vop2_mask_write(vop2, RK3568_ESMART0_CTRL1 + win_offset, EN_MASK,
+			YMIRROR_EN_SHIFT, y_mirror, false);
+
+	vop2_mask_write(vop2, RK3568_ESMART0_REGION0_CTRL + win_offset,
+			WIN_FORMAT_MASK, WIN_FORMAT_SHIFT, cstate->format,
+			false);
+	vop2_writel(vop2, RK3568_ESMART0_REGION0_VIR + win_offset, xvir);
+	vop2_writel(vop2, RK3568_ESMART0_REGION0_YRGB_MST + win_offset,
+		    cstate->dma_addr);
+
+	vop2_writel(vop2, RK3568_ESMART0_REGION0_ACT_INFO + win_offset,
+		    act_info);
+	vop2_writel(vop2, RK3568_ESMART0_REGION0_DSP_INFO + win_offset,
+		    dsp_info);
+	vop2_writel(vop2, RK3568_ESMART0_REGION0_DSP_ST + win_offset, dsp_st);
+
+	vop2_mask_write(vop2, RK3568_ESMART0_REGION0_CTRL + win_offset, EN_MASK,
+			WIN_EN_SHIFT, 1, false);
+
+	vop2_writel(vop2, RK3568_REG_CFG_DONE, cfg_done);
+	return 0;
+}
+
+static int rockchip_vop2_prepare(struct display_state *state)
+{
+	return 0;
+}
+
+static int rockchip_vop2_enable(struct display_state *state)
+{
+	struct crtc_state *cstate = &state->crtc_state;
+	struct vop2 *vop2 = cstate->private;
+	uint32_t vp_offset = (cstate->crtc_id * 0x100);
+	uint32_t cfg_done = CFG_DONE_EN | BIT(cstate->crtc_id);
+
+	vop2_mask_write(vop2, RK3568_VP0_DSP_CTRL + vp_offset, EN_MASK,
+			STANDBY_EN_SHIFT, 0, false);
+	vop2_writel(vop2, RK3568_REG_CFG_DONE, cfg_done);
+
+	return 0;
+}
+
+static int rockchip_vop2_disable(struct display_state *state)
+{
+	struct crtc_state *cstate = &state->crtc_state;
+	struct vop2 *vop2 = cstate->private;
+	uint32_t vp_offset = (cstate->crtc_id * 0x100);
+	uint32_t cfg_done = CFG_DONE_EN | BIT(cstate->crtc_id);
+
+	vop2_mask_write(vop2, RK3568_VP0_DSP_CTRL + vp_offset, EN_MASK,
+			STANDBY_EN_SHIFT, 1, false);
+	vop2_writel(vop2, RK3568_REG_CFG_DONE, cfg_done);
+
+	return 0;
+}
+
+const struct vop2_data rk3568_vop = {
+	.nr_vps = 3,
+	.max_output = {
+		       [VOP2_VP0] = {4096, 2304},
+		       [VOP2_VP1] = {2048, 1536},
+		       [VOP2_VP2] = {1920, 1080},
+		       },
+
+	/*
+	 * Cluster0-Win0: 0
+	 * Cluster1-Win0: 1
+	 * Esmart0-Win0:  2
+	 * Esmart1-Win0:  3
+	 * Smart0-Win0:   4
+	 * Smart1-Win0:   5
+	 */
+	.win_id = {
+		   [VOP2_VP0] = 2,
+		   [VOP2_VP1] = 3,
+		   [VOP2_VP2] = 4,
+		   },
+
+	/**
+	 * Win select id: from register LAYER_SEL
+	 *
+	 * Cluster0-Win0: 0
+	 * Cluster1-Win0: 1
+	 * Esmart0-Win0:  2
+	 * Esmart1-Win0:  6
+	 * Smart0-Win0:   3
+	 * Smart1-Win0:   7
+	 */
+	.win_sel_id = {0, 1, 2, 6, 3, 7},
+	.nr_layers = 6,
+};
+
+const struct rockchip_crtc_funcs rockchip_vop2_funcs = {
+	.preinit = rockchip_vop2_preinit,
+	.prepare = rockchip_vop2_prepare,
+	.init = rockchip_vop2_init,
+	.set_plane = rockchip_vop2_set_plane,
+	.enable = rockchip_vop2_enable,
+	.disable = rockchip_vop2_disable,
+};

commit cdb300bd815148cf6fc0e86d69f1e3c027b98e0f
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Wed Dec 23 10:49:39 2020 +0800

    video/drm: display: add compatible rk356x dtsi config
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: I9ef1d7ad2bfaa84b90482208421e8b7a76d051ff

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 139a33801a..dc587e43e0 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -1332,8 +1332,9 @@ static int rockchip_display_probe(struct udevice *dev)
 	const char *name;
 	int ret;
 	ofnode node, route_node;
-	struct device_node *port_node, *vop_node, *ep_node;
+	struct device_node *port_node, *vop_node, *ep_node, *port_parent_node;
 	struct public_phy_data *data;
+	bool is_ports_node = false;
 
 	/* Before relocation we don't need to do anything */
 	if (!(gd->flags & GD_FLG_RELOC))
@@ -1370,11 +1371,24 @@ static int rockchip_display_probe(struct udevice *dev)
 			printf("Warn: can't find port node from phandle\n");
 			continue;
 		}
-		vop_node = of_get_parent(port_node);
-		if (!ofnode_valid(np_to_ofnode(vop_node))) {
-			printf("Warn: can't find crtc node from phandle\n");
+
+		port_parent_node = of_get_parent(port_node);
+		if (!ofnode_valid(np_to_ofnode(port_parent_node))) {
+			printf("Warn: can't find port parent node from phandle\n");
 			continue;
 		}
+
+		is_ports_node = strstr(port_parent_node->full_name, "ports") ? 1 : 0;
+		if (is_ports_node) {
+			vop_node = of_get_parent(port_parent_node);
+			if (!ofnode_valid(np_to_ofnode(vop_node))) {
+				printf("Warn: can't find crtc node from phandle\n");
+				continue;
+			}
+		} else {
+			vop_node = port_parent_node;
+		}
+
 		ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_CRTC,
 						  np_to_ofnode(vop_node),
 						  &crtc_dev);

commit 2cde40a19f360feb7215a5ec9b09a56327308aef
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Dec 22 19:10:16 2020 +0800

    arm: board: Random way to change multiple mac addresses
    
    Change-Id: I11f93717fae567daaba4801979fb38c74e7b4e83
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 5e40a77133..fc76d98b75 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -93,12 +93,24 @@ static int rockchip_set_ethaddr(void)
 	char buf[ARP_HLEN_ASCII + 1], mac[16];
 	u8 ethaddr[ARP_HLEN * MAX_ETHERNET] = {0};
 	int ret, i;
-	bool need_write = false;
+	bool need_write = false, randomed = false;
 
 	ret = vendor_storage_read(VENDOR_LAN_MAC_ID, ethaddr, sizeof(ethaddr));
 	for (i = 0; i < MAX_ETHERNET; i++) {
 		if (ret <= 0 || !is_valid_ethaddr(&ethaddr[i * ARP_HLEN])) {
-			net_random_ethaddr(&ethaddr[i * ARP_HLEN]);
+			if (!randomed) {
+				net_random_ethaddr(&ethaddr[i * ARP_HLEN]);
+				randomed = true;
+			} else {
+				if (i > 0) {
+					memcpy(&ethaddr[i * ARP_HLEN],
+					       &ethaddr[(i - 1) * ARP_HLEN],
+					       ARP_HLEN);
+					ethaddr[i * ARP_HLEN] |= 0x02;
+					ethaddr[i * ARP_HLEN] += (i << 2);
+				}
+			}
+
 			need_write = true;
 		}
 

commit 98637248d5c0178da70c682546e26eb52c8720d3
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Dec 22 12:10:45 2020 +0800

    clk: rockchip: rk3568: fix print error log
    
    The log is "Fail to set the ACLK_BUS clock"
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ie22e5139e1446ae751d1e64729c7a0b4cdbac69e

diff --git a/drivers/clk/rockchip/clk_rk3568.c b/drivers/clk/rockchip/clk_rk3568.c
index 1f56980dd5..396996ab8f 100644
--- a/drivers/clk/rockchip/clk_rk3568.c
+++ b/drivers/clk/rockchip/clk_rk3568.c
@@ -2805,7 +2805,7 @@ static void rk3568_clk_init(struct rk3568_clk_priv *priv)
 
 #ifdef CONFIG_SPL_BUILD
 	ret = rk3568_bus_set_clk(priv, ACLK_BUS, 150000000);
-	if (ret)
+	if (ret < 0)
 		printf("Fail to set the ACLK_BUS clock.\n");
 #endif
 

commit 3c13acb0a2c4a2726c6468cff4e98661ee2fad2b
Author: YouMin Chen <cym@rock-chips.com>
Date:   Sun Dec 20 16:02:49 2020 +0800

    rockchip: sdram_msch: update noc define for rv1126
    
    Change-Id: Ic545cacffabc0c726d6d0de3e6d72a3e6c971849
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_msch.h b/arch/arm/include/asm/arch-rockchip/sdram_msch.h
index cfb3d9cc86..00b0547203 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_msch.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_msch.h
@@ -43,6 +43,16 @@ union noc_ddrtimingc0 {
 	} b;
 };
 
+union noc_ddrtimingl {
+	u32 d32;
+	struct {
+		unsigned ccdl : 3;
+		unsigned wrtordl : 5;
+		unsigned rrdl : 4;
+		unsigned reserved : 20;
+	} b;
+};
+
 union noc_devtodev0 {
 	u32 d32;
 	struct {
@@ -57,6 +67,18 @@ union noc_devtodev0 {
 	} b;
 };
 
+union noc_devtodev_rv1126 {
+	u32 d32;
+	struct {
+		unsigned busrdtord : 3;
+		unsigned reserved0 : 1;
+		unsigned busrdtowr : 4;
+		unsigned buswrtord : 4;
+		unsigned buswrtowr : 3;
+		unsigned reserved2 : 17;
+	} b;
+};
+
 union noc_ddrmode {
 	u32 d32;
 	struct {
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rv1126.h b/arch/arm/include/asm/arch-rockchip/sdram_rv1126.h
index 3f33f37be2..caa5583521 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_rv1126.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_rv1126.h
@@ -301,7 +301,7 @@ struct sdram_msch_timings {
 	union noc_ddrtiminga0 ddrtiminga0;
 	union noc_ddrtimingb0 ddrtimingb0;
 	union noc_ddrtimingc0 ddrtimingc0;
-	union noc_devtodev0 devtodev0;
+	union noc_devtodev_rv1126 devtodev0;
 	union noc_ddrmode ddrmode;
 	union noc_ddr4timing ddr4timing;
 	u32 agingx0;

commit 5290223f29d613f4d0585be630201da98f1a15cf
Author: YouMin Chen <cym@rock-chips.com>
Date:   Sun Dec 20 15:54:32 2020 +0800

    rockchip: sdram: add define for lpddr4x
    
    Change-Id: Ic7cd740e3498e47ad48376784ca0855d633baf65
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/dram_spec_timing.h b/arch/arm/include/asm/arch-rockchip/dram_spec_timing.h
index c4f35fa5c6..a691e97a8b 100644
--- a/arch/arm/include/asm/arch-rockchip/dram_spec_timing.h
+++ b/arch/arm/include/asm/arch-rockchip/dram_spec_timing.h
@@ -387,6 +387,11 @@ enum ddr4_speed_rate {
 #define LPDDR4_SOC_ODT_40	(6)
 #define LPDDR4_SOC_ODT_DIS	(0)
 
+/* LPDDR4x */
+/* MR3 */
+#define LPDDR4X_VDDQ_0_6	(0)
+#define LPDDR4X_VDDQ_0_5	(1)
+
 /* mr0 for ddr4 */
 #define DDR4_BL8		(0)
 #define DDR4_BC4_8		(1)
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h b/arch/arm/include/asm/arch-rockchip/sdram_common.h
index f369e96d70..3e8f6ed83d 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_common.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_common.h
@@ -171,6 +171,9 @@ struct sdram_head_info_index_v2 {
 
 	struct index_info skew_index;
 	struct index_info dq_map_index;
+
+	struct index_info lp4x_index;
+	struct index_info reserved;
 };
 
 struct global_info {

commit de9242dcd733539d4b7cf691465299636a8949b0
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Wed Nov 4 16:23:56 2020 +0800

    drivers: ram: sdram_common: add 4rank support for rk3568
    
    Change-Id: I179ff4ef1f07a881f76ac086c4ab330e3ff82d73
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/sdram.h b/arch/arm/include/asm/arch-rockchip/sdram.h
index 11d61533e1..e44455dacd 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram.h
@@ -14,6 +14,9 @@ enum {
 	LPDDR2 = 5,
 	LPDDR3 = 6,
 	LPDDR4 = 7,
+	LPDDR4X = 8,
+	LPDDR5 = 9,
+	DDR5 = 10,
 	UNUSED = 0xFF
 };
 
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h b/arch/arm/include/asm/arch-rockchip/sdram_common.h
index 12db37b7d4..f369e96d70 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_common.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_common.h
@@ -228,6 +228,10 @@ struct sdram_cap_info {
 	unsigned int row_3_4;
 	unsigned int cs0_row;
 	unsigned int cs1_row;
+#ifdef CONFIG_ROCKCHIP_RK3568
+	unsigned int cs2_row;
+	unsigned int cs3_row;
+#endif
 	unsigned int cs0_high16bit_row;
 	unsigned int cs1_high16bit_row;
 	unsigned int ddrconfig;
diff --git a/drivers/ram/rockchip/sdram_common.c b/drivers/ram/rockchip/sdram_common.c
index 6fb119084a..c00fd89d28 100644
--- a/drivers/ram/rockchip/sdram_common.c
+++ b/drivers/ram/rockchip/sdram_common.c
@@ -28,6 +28,9 @@ void sdram_print_dram_type(unsigned char dramtype)
 	case LPDDR4:
 		printascii("LPDDR4");
 		break;
+	case LPDDR4X:
+		printascii("LPDDR4X");
+		break;
 	default:
 		printascii("Unknown Device");
 		break;
@@ -74,6 +77,14 @@ void sdram_print_ddr_info(struct sdram_cap_info *cap_info,
 			printdec(cap_info->cs1_high16bit_row);
 		}
 	}
+#ifdef CONFIG_ROCKCHIP_RK3568
+	if (cap_info->rank > 2) {
+		printascii(" CS2 Row=");
+		printdec(cap_info->cs2_row);
+		printascii(" CS3 Row=");
+		printdec(cap_info->cs3_row);
+	}
+#endif
 	printascii(" CS=");
 	printdec(cap_info->rank);
 	printascii(" Die BW=");
@@ -99,7 +110,7 @@ void sdram_print_ddr_info(struct sdram_cap_info *cap_info,
 u64 sdram_get_cs_cap(struct sdram_cap_info *cap_info, u32 cs, u32 dram_type)
 {
 	u32 bg;
-	u64 cap[2];
+	u64 cap[4];
 
 	if (dram_type == DDR4)
 		/* DDR4 8bit dram BG = 2(4bank groups),
@@ -111,18 +122,31 @@ u64 sdram_get_cs_cap(struct sdram_cap_info *cap_info, u32 cs, u32 dram_type)
 	cap[0] = 1llu << (cap_info->bw + cap_info->col +
 		bg + cap_info->bk + cap_info->cs0_row);
 
-	if (cap_info->rank == 2)
+	if (cap_info->rank >= 2)
 		cap[1] = 1llu << (cap_info->bw + cap_info->col +
 			bg + cap_info->bk + cap_info->cs1_row);
 	else
 		cap[1] = 0;
-
+#ifdef CONFIG_ROCKCHIP_RK3568
+	if (cap_info->rank == 4) {
+		cap[2] = 1llu << (cap_info->bw + cap_info->col +
+			bg + cap_info->bk + cap_info->cs2_row);
+		cap[3] = 1llu << (cap_info->bw + cap_info->col +
+			bg + cap_info->bk + cap_info->cs3_row);
+	} else {
+		cap[2] = 0;
+		cap[3] = 0;
+	}
+#else
+	cap[2] = 0;
+	cap[3] = 0;
+#endif
 	if (cs == 0)
 		return cap[0];
 	else if (cs == 1)
 		return cap[1];
 	else
-		return (cap[0] + cap[1]);
+		return (cap[0] + cap[1] + cap[2] + cap[3]);
 }
 
 /* n: Unit bytes */

commit 600d0322ca2954dba1af2093c806d2c3cd33785e
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Fri Nov 6 15:42:49 2020 +0800

    driver: ram: rockchip: update sdram_pctl_px30.h
    
    1)add ecc define
    2)fix some define error
    
    Change-Id: I7a5302c320850c2dc579036841b4b0aebd12e03e
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_pctl_px30.h b/arch/arm/include/asm/arch-rockchip/sdram_pctl_px30.h
index 4b77280d73..0ef7232e81 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_pctl_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_pctl_px30.h
@@ -33,6 +33,26 @@ struct ddr_pctl_regs {
 #define DDR_PCTL2_RFSHTMG		0x64
 #define DDR_PCTL2_RFSHTMG1		0x68
 #define DDR_PCTL2_RFSHCTL5		0x6c
+#define DDR_PCTL2_ECCCFG0		0x70
+#define DDR_PCTL2_ECCCFG1		0x74
+#define DDR_PCTL2_ECCSTAT		0x78
+#define DDR_PCTL2_ECCCTL		0x7c
+#define DDR_PCTL2_ECCERRCNT		0x80
+#define DDR_PCTL2_ECCCADDR0		0x84
+#define DDR_PCTL2_ECCCADDR1		0x88
+#define DDR_PCTL2_ECCCSYN0		0x8c
+#define DDR_PCTL2_ECCCSYN1		0x90
+#define DDR_PCTL2_ECCCSYN2		0x94
+#define DDR_PCTL2_ECCBITMASK0		0x98
+#define DDR_PCTL2_ECCBITMASK1		0x9c
+#define DDR_PCTL2_ECCBITMASK2		0xa0
+#define DDR_PCTL2_ECCUADR0		0xa4
+#define DDR_PCTL2_ECCUADR1		0xa8
+#define DDR_PCTL2_ECCUSYNC0		0xac
+#define DDR_PCTL2_ECCUSYNC1		0xb0
+#define DDR_PCTL2_ECCUSYNC2		0xb4
+#define DDR_PCTL2_ECCPOSISONADDR0	0xb8
+#define DDR_PCTL2_ECCPOSISONADDR1	0xbc
 #define DDR_PCTL2_INIT0			0xd0
 #define DDR_PCTL2_INIT1			0xd4
 #define DDR_PCTL2_INIT2			0xd8
@@ -122,16 +142,17 @@ struct ddr_pctl_regs {
 #define UMCTL2_REGS_FREQ(n)	\
 	((0x1000 * (n) + (((n) > 0) ? 0x1000 : 0)))
 
-/* PCTL2_MRSTAT */
+/* PCTL2_MSTR */
 #define PCTL2_FREQUENCY_MODE_MASK	(1)
 #define PCTL2_FREQUENCY_MODE_SHIFT	(29)
 #define PCTL2_DLL_OFF_MODE		BIT(15)
-#define PCTL2_MR_WR_BUSY		BIT(0)
 /* PCTL2_STAT */
 #define PCTL2_SELFREF_TYPE_MASK		(3 << 4)
 #define PCTL2_SELFREF_TYPE_SR_NOT_AUTO	(2 << 4)
 #define PCTL2_OPERATING_MODE_MASK	(7)
-#define PCTL2_OPERATING_MODE_INIT	(1)
+#define PCTL2_OPERATING_MODE_INIT	(0)
+#define PCTL2_OPERATING_MODE_NORMAL	(1)
+#define PCTL2_OPERATING_MODE_PD		(2)
 #define PCTL2_OPERATING_MODE_SR		(3)
 /* PCTL2_MRCTRL0 */
 #define PCTL2_MR_WR			BIT(31)
@@ -142,6 +163,8 @@ struct ddr_pctl_regs {
 /* PCTL2_MRCTRL1 */
 #define PCTL2_MR_ADDRESS_SHIFT		(8)
 #define PCTL2_MR_DATA_MASK		(0xff)
+/* PCTL2_MRSTAT */
+#define PCTL2_MR_WR_BUSY		BIT(0)
 /* PCTL2_DERATEEN */
 #define PCTL2_DERATE_ENABLE		(1)
 /* PCTL2_PWRCTL */
@@ -214,6 +237,19 @@ struct ddr_pctl_regs {
 /* PCTL2_PCTRLn */
 #define PCTL2_PORT_EN			(1)
 
+/* PCTL2_ECCCFG0 */
+#define ECC_MODE_MASK			(0x7)
+#define ECC_MODE_DIS			(0)
+#define ECC_MODE_SEC			(0x4)
+#define ECC_MODE_ADV			(0x5)
+#define ECC_MODE_SHIFT			(0)
+#define ECC_TEST_MODE			BIT(3)
+#define ECC_DIS_SCRUB			BIT(4)
+#define ECC_TYPE_SIDEBAND		(0)
+#define ECC_TYPE_INLINE			(1)
+#define ECC_TYPE_MASK			(1)
+#define ECC_TYPE_SHIFT			(5)
+
 void pctl_read_mr(void __iomem *pctl_base, u32 rank, u32 mr_num);
 int pctl_write_mr(void __iomem *pctl_base, u32 rank, u32 mr_num, u32 arg,
 		  u32 dramtype);

commit b327b5399aa4650b5c165ba2375b79285da3d3d2
Author: Shunqing Chen <csq@rock-chips.com>
Date:   Fri Dec 18 02:20:52 2020 +0000

    drm/rockchip: dw-hdmi: set HDMI/DVI mode
    
    If sink is hdmi, but not set to hdmi mode,
    will cause no sound after entering Android.
    
    Signed-off-by: Shunqing Chen <csq@rock-chips.com>
    Change-Id: I5a8cc308c8064e0c372162145b1e814765e80630

diff --git a/drivers/video/drm/dw_hdmi.c b/drivers/video/drm/dw_hdmi.c
index fe82317666..e7a77a0372 100644
--- a/drivers/video/drm/dw_hdmi.c
+++ b/drivers/video/drm/dw_hdmi.c
@@ -2114,7 +2114,13 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi,
 		/* HDMI Initialization Step F - Configure AVI InfoFrame */
 		hdmi_config_AVI(hdmi, mode);
 		hdmi_config_vendor_specific_infoframe(hdmi, mode);
+		hdmi_modb(hdmi, HDMI_A_HDCPCFG0_HDMIDVI_HDMI,
+			  HDMI_A_HDCPCFG0_HDMIDVI_MASK,
+			  HDMI_A_HDCPCFG0);
 	} else {
+		hdmi_modb(hdmi, HDMI_A_HDCPCFG0_HDMIDVI_DVI,
+			  HDMI_A_HDCPCFG0_HDMIDVI_MASK,
+			  HDMI_A_HDCPCFG0);
 		printf("%s DVI mode\n", __func__);
 	}
 

commit bc5b1ed8746e7949d95c4ef8232a169c80df7b93
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Dec 19 17:09:13 2020 +0800

    Revert "rockchip: rk3568: remove TPL code"
    
    This reverts commit d77dbb6e1cf17678b428f8b44763177c6b5fcc50.
    
    Reason: if we remove TPL code, there will be different compile
    path for SPL to initial platform, which takes some unknonw issue
    in kernel. So let's bring back TPL.
    
    Change-Id: Iee1ab45d0a622425b616b22f8fbcdb7b28f057f7
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 637283f603..88628cb435 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -386,12 +386,29 @@ config ROCKCHIP_RK3568
 	select ARM64
 	select GICV3
 	select SPL
+	select SUPPORT_TPL
 	select SUPPORT_SPL
+	select TPL_TINY_FRAMEWORK if TPL
 	select DEBUG_UART_BOARD_INIT
+	imply TPL
 	imply SPL
+	imply TPL_SERIAL_SUPPORT
 	help
 	  The Rockchip RK3568 is a ARM-based SoC with a quad-core Cortex-A55.
 
+if ROCKCHIP_RK3568
+
+config TPL_LDSCRIPT
+	default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
+
+config TPL_TEXT_BASE
+	default 0xfdcc1000
+
+config TPL_MAX_SIZE
+	default 61440
+
+endif
+
 config ROCKCHIP_RK1808
 	bool "Support Rockchip RK1808"
 	select ARM64
diff --git a/arch/arm/mach-rockchip/rk3568/Makefile b/arch/arm/mach-rockchip/rk3568/Makefile
index 9fda7d7bb4..4e7d87cea4 100644
--- a/arch/arm/mach-rockchip/rk3568/Makefile
+++ b/arch/arm/mach-rockchip/rk3568/Makefile
@@ -4,6 +4,8 @@
 # SPDX-License-Identifier:     GPL-2.0+
 #
 
+ifneq ($(CONFIG_TPL_BUILD)$(CONFIG_TPL_TINY_FRAMEWORK),yy)
 obj-y += syscon_rk3568.o
+endif
 obj-y += rk3568.o
 obj-y += clk_rk3568.o
diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index 573fffe8db..84fa5d6b69 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -15,6 +15,7 @@ obj-$(CONFIG_ROCKCHIP_RK3288) += sdram_rk3288.o
 obj-$(CONFIG_ROCKCHIP_RK3308) += sdram_rv1108_pctl_phy.o sdram_rk3308.o
 obj-$(CONFIG_ROCKCHIP_RK3328) += sdram_rk3328.o sdram_pctl_px30.o sdram_phy_px30.o
 obj-$(CONFIG_ROCKCHIP_RK3399) += sdram_rk3399.o
+obj-$(CONFIG_ROCKCHIP_RK3568) += sdram_rk3568.o
 obj-$(CONFIG_ROCKCHIP_PX30) += sdram_px30.o sdram_pctl_px30.o sdram_phy_px30.o
 obj-$(CONFIG_ROCKCHIP_PX30) += rockchip_sdram.o
 obj-$(CONFIG_ROCKCHIP_RK1808) += rockchip_sdram.o
diff --git a/drivers/ram/rockchip/sdram_rk3568.c b/drivers/ram/rockchip/sdram_rk3568.c
new file mode 100644
index 0000000000..68999e0efb
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_rk3568.c
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * (C) Copyright 2020 Rockchip Electronics Co., Ltd.
+ */
+
+#include <common.h>
+#include <debug_uart.h>
+#include <dm.h>
+#include <ram.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/rk_atags.h>
+#include <asm/arch/cru_rk3568.h>
+#include <asm/arch/grf_rk3568.h>
+
+#ifdef CONFIG_TPL_BUILD
+#ifndef CONFIG_TPL_TINY_FRAMEWORK
+#error please defined CONFIG_TPL_TINY_FRAMEWORK for RK3568 !!!
+#endif
+#endif
+
+#ifdef CONFIG_TPL_BUILD
+
+/* return: 0 = success, other = fail */
+int sdram_init(void)
+{
+	return (-1);
+}
+#endif /* CONFIG_TPL_BUILD */

commit bba527036ad90021165afa91b5d0ac3d4b7dab6e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Dec 19 17:09:11 2020 +0800

    Revert "configs: rk3568: remove TPL"
    
    This reverts commit 9f2604d88900126c7ec4e5c9cb34cb8fe747f9c6.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Idebf1b530ae0a3a171b4045d1631e380b137c1ec

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index af49a0f837..4e1255482c 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -134,7 +134,9 @@ CONFIG_CHARGE_ANIMATION=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
 CONFIG_ROCKCHIP_SDRAM_COMMON=y
+CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE=0
 CONFIG_DM_RESET=y
 CONFIG_SPL_DM_RESET=y
 CONFIG_SPL_RESET_ROCKCHIP=y

commit 9f2604d88900126c7ec4e5c9cb34cb8fe747f9c6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 15 17:31:40 2020 +0800

    configs: rk3568: remove TPL
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I8985b55d2939be88d0e641ff7b966393556d399f

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index 4e1255482c..af49a0f837 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -134,9 +134,7 @@ CONFIG_CHARGE_ANIMATION=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
-CONFIG_TPL_RAM=y
 CONFIG_ROCKCHIP_SDRAM_COMMON=y
-CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE=0
 CONFIG_DM_RESET=y
 CONFIG_SPL_DM_RESET=y
 CONFIG_SPL_RESET_ROCKCHIP=y

commit d77dbb6e1cf17678b428f8b44763177c6b5fcc50
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 15 17:30:25 2020 +0800

    rockchip: rk3568: remove TPL code
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I4b7d7f830d7cc9a5d6623f2add9a4755ce833f2c

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 88628cb435..637283f603 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -386,29 +386,12 @@ config ROCKCHIP_RK3568
 	select ARM64
 	select GICV3
 	select SPL
-	select SUPPORT_TPL
 	select SUPPORT_SPL
-	select TPL_TINY_FRAMEWORK if TPL
 	select DEBUG_UART_BOARD_INIT
-	imply TPL
 	imply SPL
-	imply TPL_SERIAL_SUPPORT
 	help
 	  The Rockchip RK3568 is a ARM-based SoC with a quad-core Cortex-A55.
 
-if ROCKCHIP_RK3568
-
-config TPL_LDSCRIPT
-	default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
-
-config TPL_TEXT_BASE
-	default 0xfdcc1000
-
-config TPL_MAX_SIZE
-	default 61440
-
-endif
-
 config ROCKCHIP_RK1808
 	bool "Support Rockchip RK1808"
 	select ARM64
diff --git a/arch/arm/mach-rockchip/rk3568/Makefile b/arch/arm/mach-rockchip/rk3568/Makefile
index 4e7d87cea4..9fda7d7bb4 100644
--- a/arch/arm/mach-rockchip/rk3568/Makefile
+++ b/arch/arm/mach-rockchip/rk3568/Makefile
@@ -4,8 +4,6 @@
 # SPDX-License-Identifier:     GPL-2.0+
 #
 
-ifneq ($(CONFIG_TPL_BUILD)$(CONFIG_TPL_TINY_FRAMEWORK),yy)
 obj-y += syscon_rk3568.o
-endif
 obj-y += rk3568.o
 obj-y += clk_rk3568.o
diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index 84fa5d6b69..573fffe8db 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -15,7 +15,6 @@ obj-$(CONFIG_ROCKCHIP_RK3288) += sdram_rk3288.o
 obj-$(CONFIG_ROCKCHIP_RK3308) += sdram_rv1108_pctl_phy.o sdram_rk3308.o
 obj-$(CONFIG_ROCKCHIP_RK3328) += sdram_rk3328.o sdram_pctl_px30.o sdram_phy_px30.o
 obj-$(CONFIG_ROCKCHIP_RK3399) += sdram_rk3399.o
-obj-$(CONFIG_ROCKCHIP_RK3568) += sdram_rk3568.o
 obj-$(CONFIG_ROCKCHIP_PX30) += sdram_px30.o sdram_pctl_px30.o sdram_phy_px30.o
 obj-$(CONFIG_ROCKCHIP_PX30) += rockchip_sdram.o
 obj-$(CONFIG_ROCKCHIP_RK1808) += rockchip_sdram.o
diff --git a/drivers/ram/rockchip/sdram_rk3568.c b/drivers/ram/rockchip/sdram_rk3568.c
deleted file mode 100644
index 68999e0efb..0000000000
--- a/drivers/ram/rockchip/sdram_rk3568.c
+++ /dev/null
@@ -1,31 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * (C) Copyright 2020 Rockchip Electronics Co., Ltd.
- */
-
-#include <common.h>
-#include <debug_uart.h>
-#include <dm.h>
-#include <ram.h>
-#include <syscon.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/rk_atags.h>
-#include <asm/arch/cru_rk3568.h>
-#include <asm/arch/grf_rk3568.h>
-
-#ifdef CONFIG_TPL_BUILD
-#ifndef CONFIG_TPL_TINY_FRAMEWORK
-#error please defined CONFIG_TPL_TINY_FRAMEWORK for RK3568 !!!
-#endif
-#endif
-
-#ifdef CONFIG_TPL_BUILD
-
-/* return: 0 = success, other = fail */
-int sdram_init(void)
-{
-	return (-1);
-}
-#endif /* CONFIG_TPL_BUILD */

commit e6b2bd878594639a8c405e30adc826d734198518
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Dec 17 17:17:50 2020 +0800

    irq: irq-gpio-switch: correct usage of strstr()
    
    Fix gpio interrupt register with wrong gpio bank.
    
    (Fixes: 8db677370c irq: irq-gpio-switch: add gpio alias name support)
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ia60e55a134cfab19ed015796486417e0699bd087

diff --git a/drivers/irq/irq-gpio-switch.c b/drivers/irq/irq-gpio-switch.c
index e6dc3e65d3..3c5b92f36e 100644
--- a/drivers/irq/irq-gpio-switch.c
+++ b/drivers/irq/irq-gpio-switch.c
@@ -100,7 +100,7 @@ static int __phandle_gpio_to_irq(u32 gpio_phandle, u32 offset)
 		return EINVAL_GPIO;
 
 	for (bank = 0; bank < GPIO_BANK_NUM; bank++) {
-		if (!strstr(gpio_name, gpio_banks[bank].name)) {
+		if (strstr(gpio_name, gpio_banks[bank].name)) {
 			found = true;
 			break;
 		}
@@ -121,7 +121,7 @@ static int __phandle_gpio_to_irq(u32 gpio_phandle, u32 offset)
 
 		/* match alias ? */
 		for (bank = 0; bank < ARRAY_SIZE(gpio_banks); bank++) {
-			if (!strstr(gpio_alias[bank], gpio_name)) {
+			if (strstr(gpio_alias[bank], gpio_name)) {
 				found = true;
 				break;
 			}

commit 3bcf0b7c0e5c2d54fae431c2586315c9bc44125c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Dec 17 18:07:47 2020 +0800

    scripts: pack_resource.sh: support android and fit image
    
    ./scripts/pack_resource.sh boot.img
    ./scripts/pack_resource.sh recovery.img
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I067b00ecbadaab78962605e0caa03e04ff4f3c02

diff --git a/scripts/pack_resource.sh b/scripts/pack_resource.sh
index 2f46a07596..a6e7baef7c 100755
--- a/scripts/pack_resource.sh
+++ b/scripts/pack_resource.sh
@@ -7,9 +7,14 @@
 
 RSCE_OLD=$1
 RSCE_NEW=resource.img
+
+BOOT_OLD=$1
+BOOT_NEW=boot.img
+
 TOOL=../rkbin/tools/resource_tool
 IMAGES=./tools/images/
 TMP_DIR=.resource_tmp
+TMP_DIR2=.boot_tmp
 
 usage()
 {
@@ -61,6 +66,32 @@ append_images_to_resource()
 	echo "./resource.img with battery images is ready"
 }
 
+append_images_to_android_img()
+{
+	./scripts/unpack_bootimg --boot_img ${BOOT_OLD} --out ${TMP_DIR2}/
+	RSCE_OLD="${TMP_DIR2}/second"
+	append_images_to_resource
+	./scripts/repack-bootimg --boot_img ${BOOT_OLD} --second ${RSCE_NEW} -o ${BOOT_NEW}
+	rm -rf ${TMP_DIR2}
+}
+
+append_images_to_fit_img()
+{
+	./scripts/fit-unpack.sh -f ${BOOT_OLD} -o ${TMP_DIR2}/
+	RSCE_OLD="${TMP_DIR2}/resource"
+	append_images_to_resource
+	rm -rf ${TMP_DIR2}/*
+	mv ${RSCE_NEW} ${TMP_DIR2}/resource
+	 ./scripts/fit-repack.sh -f ${BOOT_OLD} -d ${TMP_DIR2}
+	rm -rf ${TMP_DIR2}
+}
+
 prepare
-append_images_to_resource
+if file ${RSCE_OLD} | grep 'Android bootimg' >/dev/null 2>&1 ; then
+	append_images_to_android_img
+elif file ${RSCE_OLD} | grep 'Device Tree Blob' >/dev/null 2>&1 ; then
+	append_images_to_fit_img
+elif strings ${RSCE_OLD} | grep "RSCE" >/dev/null 2>&1 ; then
+	append_images_to_resource
+fi
 

commit b71a17c51e3eb1b5da55c1e419c625dca28aa12e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 16 18:35:28 2020 +0800

    scripts: pack_resource.sh: clean up
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I4b994653b1959c0c70507b524da37d9cb483c21d

diff --git a/scripts/pack_resource.sh b/scripts/pack_resource.sh
index ba8adca665..2f46a07596 100755
--- a/scripts/pack_resource.sh
+++ b/scripts/pack_resource.sh
@@ -5,10 +5,11 @@
 # SPDX-License-Identifier: GPL-2.0
 #
 
-OLD_IMAGE=$1
-IMAGE=resource.img
+RSCE_OLD=$1
+RSCE_NEW=resource.img
 TOOL=../rkbin/tools/resource_tool
-RESOURCES=./tools/images/
+IMAGES=./tools/images/
+TMP_DIR=.resource_tmp
 
 usage()
 {
@@ -19,53 +20,47 @@ usage()
 prepare()
 {
 	echo
-	if [ "$OLD_IMAGE" = '--help' -o "$OLD_IMAGE" = '-h' -o "$OLD_IMAGE" = '--h' ]; then
+	if [ "${RSCE_OLD}" = '--help' -o "${RSCE_OLD}" = '-h' -o "${RSCE_OLD}" = '--h' ]; then
 		usage
 		exit 0
-	elif [ ! -f "$TOOL" ];then
-		echo "Can't find '../rkbin/' Responsity, please download it before pack image!"
-		echo "How to obtain? 3 ways:"
-		echo "	1. Login your Rockchip gerrit account: \"Projects\" -> \"List\" -> search \"rk/rkbin\" Responsity"
-		echo "	2. Github Responsity: https://github.com/rockchip-linux/rkbin"
-		echo "	3. Download full release SDK Responsity"
+	elif [ ! -d "${IMAGES}" ];then
+		echo "ERROR: No ${RESOURCE}"
 		exit 1
-	elif [ ! -d "$RESOURCES" ];then
-		echo "Can't find resources: $RESOURCES"
-		exit 1
-	elif [ -z "$OLD_IMAGE" ];then
-		echo "Missing: <input image>"
+	elif [ -z "${RSCE_OLD}" ];then
 		usage
 		exit 1
-	elif [ ! -f "$OLD_IMAGE" ];then
-		echo "Can't find file: $OLD_IMAGE"
-		usage
+	elif [ ! -f "${RSCE_OLD}" ];then
+		echo "ERROR: No ${RSCE_OLD}"
 		exit 1
 	fi
 }
 
-append_resource()
+append_images_to_resource()
 {
-	local TMP_DIR=.resource_tmp
-	rm -r $TMP_DIR 2>/dev/null
-	mkdir $TMP_DIR
+	rm -rf ${TMP_DIR} && mkdir -p ${TMP_DIR}
 
-	echo "Pack $RESOURCES & $OLD_IMAGE to $IMAGE ..."
-	if [ -f "$OLD_IMAGE" ];then
-		echo "Unpacking old image($OLD_IMAGE):"
-		$TOOL --unpack --verbose --image=$OLD_IMAGE $TMP_DIR 2>&1|grep entry|sed "s/^.*://"|xargs echo
+	echo "Pack ${IMAGES} & ${RSCE_OLD} to ${RSCE_NEW} ..."
+	if [ -f "${RSCE_OLD}" ];then
+		echo "Unpacking old image(${RSCE_OLD}):"
+		${TOOL} --unpack --verbose --image=${RSCE_OLD} ${TMP_DIR} 2>&1 | grep entry | sed "s/^.*://" | xargs echo
 	fi
-	if [ -d "$RESOURCES" ];then
-		cp -r $RESOURCES/* $TMP_DIR
+
+	if [ -d "${IMAGES}" ];then
+		cp -r ${IMAGES}/* ${TMP_DIR}
 	else
-		cp -r $RESOURCES $TMP_DIR
+		cp -r ${IMAGES}   ${TMP_DIR}
 	fi
-	$TOOL --pack --root=$TMP_DIR --image=$IMAGE `find $TMP_DIR -type f|sort`
+	${TOOL} --pack --root=${TMP_DIR} --image=${RSCE_NEW} `find ${TMP_DIR} -type f|sort`
+
+	echo
 	echo "Packed resources:"
-	$TOOL --unpack --verbose --image=$IMAGE $TMP_DIR 2>&1|grep entry|sed "s/^.*://"|xargs echo
-	rm -r $TMP_DIR 2>/dev/null
+	${TOOL} --unpack --verbose --image=${RSCE_NEW} ${TMP_DIR} 2>&1 | grep entry | sed "s/^.*://" | xargs echo
+
+	rm -rf ${TMP_DIR}
 	echo
-	echo "resource.img is packed ready"
+	echo "./resource.img with battery images is ready"
 }
 
 prepare
-append_resource
\ No newline at end of file
+append_images_to_resource
+

commit 559b4bfa7cb6b508683b899e3de10caf01066c57
Author: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Date:   Fri Mar 15 12:18:41 2019 +0000

    UPSTREAM: arm: arm64 32bit address relocation
    
    Current relocation code is limited to 21bit PC-relative addressing
    which might not be enough for bigger code sizes. The following patch
    increases the addressing to 32bit PC-relative. This feature is
    specially interesting if U-Boot is build without optimiation (-O0) as
    the text section is increased significativelly.
    
    Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ib54540ff040642588b4bfe2d030e5d9eabf8348c

diff --git a/arch/arm/lib/relocate_64.S b/arch/arm/lib/relocate_64.S
index 04804524ed..4c5da45599 100644
--- a/arch/arm/lib/relocate_64.S
+++ b/arch/arm/lib/relocate_64.S
@@ -27,9 +27,10 @@ ENTRY(relocate_code)
 	/*
 	 * Copy u-boot from flash to RAM
 	 */
-	adr	x1, __image_copy_start	/* x1 <- Run &__image_copy_start */
-	subs	x9, x0, x1		/* x8 <- Run to copy offset */
-	b.eq	relocate_done		/* skip relocation */
+	adrp	x1, __image_copy_start		/* x1 <- address bits [31:12] */
+	add	x1, x1, :lo12:__image_copy_start/* x1 <- address bits [11:00] */
+	subs	x9, x0, x1			/* x9 <- Run to copy offset */
+	b.eq	relocate_done			/* skip relocation */
 	/*
 	 * Don't ldr x1, __image_copy_start here, since if the code is already
 	 * running at an address other than it was linked to, that instruction
@@ -43,8 +44,10 @@ ENTRY(relocate_code)
 	ldr	x1, _TEXT_BASE		/* x1 <- Linked &__image_copy_start */
 	subs	x9, x0, x1		/* x9 <- Link to copy offset */
 
-	adr	x1, __image_copy_start	/* x1 <- Run &__image_copy_start */
-	adr	x2, __image_copy_end	/* x2 <- Run &__image_copy_end */
+	adrp	x1, __image_copy_start		/* x1 <- address bits [31:12] */
+	add	x1, x1, :lo12:__image_copy_start/* x1 <- address bits [11:00] */
+	adrp	x2, __image_copy_end		/* x2 <- address bits [31:12] */
+	add	x2, x2, :lo12:__image_copy_end	/* x2 <- address bits [11:00] */
 copy_loop:
 	ldp	x10, x11, [x1], #16	/* copy from source address [x1] */
 	stp	x10, x11, [x0], #16	/* copy to   target address [x0] */
@@ -55,8 +58,10 @@ copy_loop:
 	/*
 	 * Fix .rela.dyn relocations
 	 */
-	adr	x2, __rel_dyn_start	/* x2 <- Run &__rel_dyn_start */
-	adr	x3, __rel_dyn_end	/* x3 <- Run &__rel_dyn_end */
+	adrp	x2, __rel_dyn_start		/* x2 <- address bits [31:12] */
+	add	x2, x2, :lo12:__rel_dyn_start	/* x2 <- address bits [11:00] */
+	adrp	x3, __rel_dyn_end		/* x3 <- address bits [31:12] */
+	add	x3, x3, :lo12:__rel_dyn_end	/* x3 <- address bits [11:00] */
 fixloop:
 	ldp	x0, x1, [x2], #16	/* (x0,x1) <- (SRC location, fixup) */
 	ldr	x4, [x2], #8		/* x4 <- addend */

commit 3c3ec6690314096c5160dd965b2a63669774428a
Author: Shunqing Chen <csq@rock-chips.com>
Date:   Mon Dec 14 09:09:43 2020 +0000

    fuel gauge: rk817/rk809: fix get rsoc error
    
    Signed-off-by: Shunqing Chen <csq@rock-chips.com>
    Change-Id: Id946d56c9aafef87bb864218155e1b2353991140

diff --git a/drivers/power/fuel_gauge/fg_rk817.c b/drivers/power/fuel_gauge/fg_rk817.c
index 73e04f800e..6cae993ee5 100644
--- a/drivers/power/fuel_gauge/fg_rk817.c
+++ b/drivers/power/fuel_gauge/fg_rk817.c
@@ -461,6 +461,8 @@ static void rk817_bat_calibration(struct rk817_battery_device *battery)
 	}
 }
 
+static int rk817_bat_get_rsoc(struct rk817_battery_device *battery);
+
 static void rk817_bat_init_coulomb_cap(struct rk817_battery_device *battery,
 				       u32 capacity)
 {
@@ -486,7 +488,7 @@ static void rk817_bat_init_coulomb_cap(struct rk817_battery_device *battery,
 		val |= rk817_bat_read(battery, Q_INIT_L0) << 0;
 	} while (cap != val);
 
-	battery->rsoc = capacity * 1000 * 100 / battery->fcc;
+	battery->rsoc = rk817_bat_get_rsoc(battery);
 	battery->remain_cap = capacity * 1000;
 }
 

commit d107cc569789ad0f765b5a07f9527772472d6e09
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Dec 17 18:32:09 2020 +0800

    rockchip: make_fit_atf: correct sign-images for standalone
    
    Fixes:
    (ab011df20d rockchip: make_fit_atf: support pack mcu.bin)
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I80d3f7e5dd4f6e713053fa8cbd5c018dc5218748

diff --git a/arch/arm/mach-rockchip/make_fit_atf.sh b/arch/arm/mach-rockchip/make_fit_atf.sh
index d2530e8927..b15964b357 100755
--- a/arch/arm/mach-rockchip/make_fit_atf.sh
+++ b/arch/arm/mach-rockchip/make_fit_atf.sh
@@ -167,7 +167,7 @@ function generate_mcu_node()
 		gzip -k -f -9 mcu.bin
 	fi
 
-	SIGN_MCU=", \"mcu\""
+	STANDALONE_SIGN=", \"standalone\""
 	STANDALONE_MCU="standalone = \"mcu\";"
 	echo "		};"
 }
@@ -223,7 +223,7 @@ cat << EOF
 				algo = "sha256,rsa2048";
 				padding = "pss";
 				key-name-hint = "dev";
-				sign-images = "fdt", "firmware", "loadables"${SIGN_MCU};
+				sign-images = "fdt", "firmware", "loadables"${STANDALONE_SIGN};
 			};
 		};
 	};

commit 173a9307d44cd0d44f9f44042cda92a33b7ae5de
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 16 18:19:04 2020 +0800

    make/fit.sh: show itb making process info
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I6dc634060044839ebbf545cdb20fa38ee05df04b

diff --git a/make.sh b/make.sh
index ee1815e79e..d9c010d097 100755
--- a/make.sh
+++ b/make.sh
@@ -649,7 +649,7 @@ function pack_uboot_itb_image()
 		fi
 	fi
 
-	./tools/mkimage -f u-boot.its -E u-boot.itb
+	./tools/mkimage -f u-boot.its -E u-boot.itb >/dev/null 2>&1
 	echo "pack u-boot.itb okay! Input: ${INI}"
 	echo
 }
diff --git a/scripts/fit.sh b/scripts/fit.sh
index c222f47f81..cd541c2b93 100755
--- a/scripts/fit.sh
+++ b/scripts/fit.sh
@@ -189,7 +189,7 @@ function fit_raw_compile()
 
 function fit_gen_uboot_itb()
 {
-	./make.sh itb ${ARG_INI_TRUST} >/dev/null 2>&1
+	./make.sh itb ${ARG_INI_TRUST}
 	check_its ${ITS_UBOOT}
 
 	if [ "${ARG_SIGN}" != "y" ]; then

commit ed474e7a977204d7f2d1ee2434aa21008ccc8c02
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 15 21:11:01 2020 +0800

    rockchip: make_fit_atf/optee: add platform name
    
    It's better to add platform name for the uboot.img.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I050981356d68ac1816ebd2cdc8c0cc69bfd841bd

diff --git a/arch/arm/mach-rockchip/make_fit_atf.sh b/arch/arm/mach-rockchip/make_fit_atf.sh
index 2696ed9431..d2530e8927 100755
--- a/arch/arm/mach-rockchip/make_fit_atf.sh
+++ b/arch/arm/mach-rockchip/make_fit_atf.sh
@@ -172,6 +172,7 @@ function generate_mcu_node()
 	echo "		};"
 }
 ########################################################################################################
+THIS_PLAT=`sed -n "/CONFIG_DEFAULT_DEVICE_TREE/p" .config | awk -F "=" '{ print $2 }' | tr -d '"'`
 
 cat << EOF
 /*
@@ -212,7 +213,7 @@ cat << EOF
 	configurations {
 		default = "conf";
 		conf {
-			description = "Rockchip armv8 with ATF";
+			description = "${THIS_PLAT}";
 			rollback-index = <0x0>;
 			firmware = "atf-1";
 			loadables = "uboot"${LOADABLE_ATF}${LOADABLE_OPTEE};
diff --git a/arch/arm/mach-rockchip/make_fit_optee.sh b/arch/arm/mach-rockchip/make_fit_optee.sh
index 6c499c5142..5dabcddfc6 100755
--- a/arch/arm/mach-rockchip/make_fit_optee.sh
+++ b/arch/arm/mach-rockchip/make_fit_optee.sh
@@ -80,6 +80,7 @@ if [ -f ${srctree}/dts/kern.dtb ]; then
 		};"
 fi
 ########################################################################################################
+THIS_PLAT=`sed -n "/CONFIG_DEFAULT_DEVICE_TREE/p" .config | awk -F "=" '{ print $2 }' | tr -d '"'`
 
 cat << EOF
 /*
@@ -145,7 +146,7 @@ cat  << EOF
 	configurations {
 		default = "conf";
 		conf {
-			description = "Rockchip armv7 with OP-TEE";
+			description = "${THIS_PLAT}";
 			rollback-index = <0x0>;
 			firmware = "optee";
 			loadables = "uboot";

commit 33e46123fc08fc3e1f2f84026277cf05378b9570
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 15 16:06:42 2020 +0800

    make/fit.sh: arm64 support pack mcu.bin
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ic9324204075ebce4fd746593887894283bde0de1

diff --git a/make.sh b/make.sh
index 201d54df1b..ee1815e79e 100755
--- a/make.sh
+++ b/make.sh
@@ -620,17 +620,18 @@ function pack_uboot_itb_image()
 			TEE_OFFSET=0x8400000
 		fi
 		TEE_ARG="-t ${TEE_OFFSET}"
+	fi
 
-		# MCU
-		MCU_ENABLED=`awk -F"," '/MCU=/ { printf $3 }' ${INI} | tr -d ' '`
-		if [ "${MCU_ENABLED}" == "enabled" -o "${MCU_ENABLED}" == "okay" ]; then
-			MCU=`awk -F"," '/MCU=/  { printf $1 }' ${INI} | tr -d ' ' | cut -c 5-`
-			cp ${RKBIN}/${MCU} mcu.bin
-			MCU_OFFSET=`awk -F"," '/MCU=/ { printf $2 }' ${INI} | tr -d ' '`
-			MCU_ARG="-m ${MCU_OFFSET}"
-		fi
+	# MCU
+	MCU_ENABLED=`awk -F"," '/MCU=/ { printf $3 }' ${INI} | tr -d ' '`
+	if [ "${MCU_ENABLED}" == "enabled" -o "${MCU_ENABLED}" == "okay" ]; then
+		MCU=`awk -F"," '/MCU=/  { printf $1 }' ${INI} | tr -d ' ' | cut -c 5-`
+		cp ${RKBIN}/${MCU} mcu.bin
+		MCU_OFFSET=`awk -F"," '/MCU=/ { printf $2 }' ${INI} | tr -d ' '`
+		MCU_ARG="-m ${MCU_OFFSET}"
 	fi
 
+	# COMPRESSION
 	COMPRESSION=`awk -F"," '/COMPRESSION=/  { printf $1 }' ${INI} | tr -d ' ' | cut -c 13-`
 	if [ ! -z "${COMPRESSION}" -a "${COMPRESSION}" != "none" ]; then
 		COMPRESSION_ARG="-c ${COMPRESSION}"
diff --git a/scripts/fit.sh b/scripts/fit.sh
index 8b2eac5054..c222f47f81 100755
--- a/scripts/fit.sh
+++ b/scripts/fit.sh
@@ -15,7 +15,7 @@ SIG_BIN="data2sign.bin"
 SIG_UBOOT="${FIT_DIR}/uboot.data2sign"
 SIG_BOOT="${FIT_DIR}/boot.data2sign"
 # offs
-OFFS_NS_UBOOT="0xa00"
+OFFS_NS_UBOOT="0xc00"
 OFFS_S_UBOOT="0xc00"
 OFFS_NS_BOOT="0x800"
 OFFS_S_BOOT="0xc00"

commit ab011df20dd31a558b0377f198ceee1d68d8db1a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 15 15:59:44 2020 +0800

    rockchip: make_fit_atf: support pack mcu.bin
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I80e158050e1af1cd1c3c44669fab87402397cc09

diff --git a/arch/arm/mach-rockchip/make_fit_atf.sh b/arch/arm/mach-rockchip/make_fit_atf.sh
index 258695c1b3..2696ed9431 100755
--- a/arch/arm/mach-rockchip/make_fit_atf.sh
+++ b/arch/arm/mach-rockchip/make_fit_atf.sh
@@ -141,6 +141,36 @@ function generate_bl32_node()
 	LOADABLE_OPTEE=", \"optee\""
 	echo "		};"
 }
+
+function generate_mcu_node()
+{
+	if [ -z ${MCU_LOAD_ADDR} ]; then
+		return
+	fi
+
+	echo "		mcu {
+			description = \"mcu\";
+			type = \"standalone\";
+			arch = \"riscv\";
+			data = /incbin/(\"./mcu.bin${SUFFIX}\");
+			compression = \"${COMPRESSION}\";
+			load = <0x"${MCU_LOAD_ADDR}">;
+			hash {
+				algo = \"sha256\";
+			};"
+	if [ "${COMPRESSION}" == "gzip" ]; then
+		echo "			digest {
+				value = /incbin/(\"./mcu.bin.digest\");
+				algo = \"sha256\";
+			};"
+		openssl dgst -sha256 -binary -out mcu.bin.digest mcu.bin
+		gzip -k -f -9 mcu.bin
+	fi
+
+	SIGN_MCU=", \"mcu\""
+	STANDALONE_MCU="standalone = \"mcu\";"
+	echo "		};"
+}
 ########################################################################################################
 
 cat << EOF
@@ -163,6 +193,7 @@ EOF
 	generate_uboot_node
 	generate_bl31_node
 	generate_bl32_node
+	generate_mcu_node
 	generate_kfdt_node
 
 cat << EOF
@@ -185,12 +216,13 @@ cat << EOF
 			rollback-index = <0x0>;
 			firmware = "atf-1";
 			loadables = "uboot"${LOADABLE_ATF}${LOADABLE_OPTEE};
+			${STANDALONE_MCU}
 			fdt = "fdt";
 			signature {
 				algo = "sha256,rsa2048";
 				padding = "pss";
 				key-name-hint = "dev";
-				sign-images = "fdt", "firmware", "loadables";
+				sign-images = "fdt", "firmware", "loadables"${SIGN_MCU};
 			};
 		};
 	};

commit 68e2a287614c96a654d98d23d390ce902f84aa24
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Dec 15 11:56:07 2020 +0800

    lib: avb: return flash unlock status
    
    Return flash unlock status when close CONFIG_OPTEE_CLIENT.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I7a7a03b8305c864d83d3d2c14b0f9aa104b2ef59

diff --git a/lib/avb/rk_avb_user/rk_avb_ops_user.c b/lib/avb/rk_avb_user/rk_avb_ops_user.c
index abc6bd40cb..0ce3457bb3 100644
--- a/lib/avb/rk_avb_user/rk_avb_ops_user.c
+++ b/lib/avb/rk_avb_user/rk_avb_ops_user.c
@@ -120,7 +120,9 @@ int rk_avb_read_flash_lock_state(uint8_t *flash_lock_state)
 
 	return ret;
 #else
-	return -1;
+	*flash_lock_state = 1;
+
+	return 0;
 #endif
 }
 

commit e79e2085796373fe3535c4d9e576120d9015220a
Author: Wenping Zhang <wenping.zhang@rock-chips.com>
Date:   Wed Dec 16 06:42:55 2020 +0000

    video/rk_eink: fix screen display stripes after WF_TYPE_RESET update.
    
    Signed-off-by: Wenping Zhang <wenping.zhang@rock-chips.com>
    Change-Id: Id406c1103a0deea3e3ab9abcb8664e1ccc098520

diff --git a/drivers/video/rk_eink/rk_eink_display.c b/drivers/video/rk_eink/rk_eink_display.c
index f0088e2609..8c987d30ec 100644
--- a/drivers/video/rk_eink/rk_eink_display.c
+++ b/drivers/video/rk_eink/rk_eink_display.c
@@ -174,6 +174,7 @@ static u32 aligned_image_size_4k(struct udevice *dev)
  * Every image logo size must be aligned in 4K, make sure
  * kernel can use it rightly, the buffer of LOGO image is
  * put in order of below map:
+ *  |---reset logo        ---|
  *  |---uboot logo        ---|
  *  |---kernel logo       ---|
  *  |---charge_0 logo   ---|
@@ -193,7 +194,7 @@ static int get_addr_by_type(struct udevice *dev, u32 logo_type)
 		printf("invalid display buffer, please check dts\n");
 		return -EINVAL;
 	}
-	indx = ffs(logo_type) - 1;
+	indx = ffs(logo_type);
 	img_size = aligned_image_size_4k(dev);
 	offset = img_size * indx;
 	if (offset + img_size > plat->disp_pbuf_size) {
@@ -202,6 +203,7 @@ static int get_addr_by_type(struct udevice *dev, u32 logo_type)
 	}
 
 	switch (logo_type) {
+	case EINK_LOGO_RESET:
 	case EINK_LOGO_UBOOT:
 	case EINK_LOGO_KERNEL:
 	case EINK_LOGO_CHARGING_0:
@@ -467,7 +469,6 @@ static int rockchip_eink_show_logo(int cur_logo_type, int update_mode)
 	u32 logo_addr;
 	u32 last_logo_addr;
 	struct ebc_panel *plat;
-	void *reset_disp_addr = NULL;
 	struct udevice *dev;
 
 	if (!eink_dev) {
@@ -493,17 +494,17 @@ static int rockchip_eink_show_logo(int cur_logo_type, int update_mode)
 		return -1;
 	}
 	/*
-	 * The last_logo_type is 0 means it's first displaying
+	 * The last_logo_type is -1 means it's first displaying
 	 */
 	if (last_logo_type == -1) {
 		int size = (plat->width * plat->height) >> 1;
 
-		reset_disp_addr = memalign(ARCH_DMA_MINALIGN, size);
-		memset(reset_disp_addr, 0xff, size);
-		last_logo_addr = (u32)(u64)reset_disp_addr;
-		eink_display(dev, last_logo_addr, last_logo_addr,
+		logo_addr = get_addr_by_type(dev, EINK_LOGO_RESET);
+		memset((u32 *)(u64)logo_addr, 0xff, size);
+		eink_display(dev, logo_addr, logo_addr,
 			     WF_TYPE_RESET, 0);
 		last_logo_type = 0;
+		last_logo_addr = logo_addr;
 	} else {
 		last_logo_addr = get_addr_by_type(dev, last_logo_type);
 		if (last_logo_addr < 0) {
@@ -511,12 +512,9 @@ static int rockchip_eink_show_logo(int cur_logo_type, int update_mode)
 			goto out;
 		}
 		if (cur_logo_type == EINK_LOGO_RESET) {
-			int size = (plat->width * plat->height) >> 1;
-
-			reset_disp_addr = memalign(ARCH_DMA_MINALIGN, size);
-			memset(reset_disp_addr, 0xff, size);
+			logo_addr = get_addr_by_type(dev, EINK_LOGO_RESET);
 			eink_display(dev, last_logo_addr,
-				     (u32)(u64)reset_disp_addr,
+				     logo_addr,
 				     WF_TYPE_GC16, update_mode);
 			last_logo_type = -1;
 			goto out;
@@ -570,8 +568,6 @@ static int rockchip_eink_show_logo(int cur_logo_type, int update_mode)
 	}
 
 out:
-	if (reset_disp_addr)
-		free(reset_disp_addr);
 	ret = ebc_power_set(dev, EBC_PWR_DOWN);
 	if (ret)
 		printf("Eink power down failed\n");

commit c3a1ac49267d6d7900f2e563c57c612ade076fd2
Author: Guochun Huang <hero.huang@rock-chips.com>
Date:   Sat Dec 5 16:08:46 2020 +0800

    video/drm: inno_mipi_phy: Add support for rk3568
    
    Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
    Change-Id: Ie6e5810ad3614e28a540b3bbfc071cf36362da79

diff --git a/drivers/video/drm/inno_mipi_phy.c b/drivers/video/drm/inno_mipi_phy.c
index 0a056c802d..655c159d63 100644
--- a/drivers/video/drm/inno_mipi_phy.c
+++ b/drivers/video/drm/inno_mipi_phy.c
@@ -703,28 +703,18 @@ static const struct rockchip_phy_funcs inno_mipi_dphy_funcs = {
 	.set_pll = inno_mipi_dphy_set_pll,
 };
 
-static struct rockchip_phy inno_mipi_dphy_driver_data = {
-	.funcs = &inno_mipi_dphy_funcs,
-	.soc_type = RV1108_MIPI_DPHY,
-};
-
-static struct rockchip_phy rk1808_inno_mipi_dphy_driver_data = {
-	 .funcs = &inno_mipi_dphy_funcs,
-	 .soc_type = RK1808_MIPI_DPHY,
-};
-
 static const struct udevice_id inno_mipi_dphy_ids[] = {
 	{
 		.compatible = "rockchip,rv1108-mipi-dphy",
-		.data = (ulong)&inno_mipi_dphy_driver_data,
 	},
 	{
 		.compatible = "rockchip,rk1808-mipi-dphy",
-		.data = (ulong)&rk1808_inno_mipi_dphy_driver_data,
 	},
 	{
 		.compatible = "rockchip,rv1126-mipi-dphy",
-		.data = (ulong)&rk1808_inno_mipi_dphy_driver_data,
+	},
+	{
+		.compatible = "rockchip,rk3568-mipi-dphy",
 	},
 	{}
 };
@@ -732,11 +722,22 @@ static const struct udevice_id inno_mipi_dphy_ids[] = {
 static int inno_mipi_dphy_probe(struct udevice *dev)
 {
 	struct inno_mipi_dphy *inno = dev_get_priv(dev);
-	struct rockchip_phy *phy =
-		(struct rockchip_phy *)dev_get_driver_data(dev);
+	struct rockchip_phy *phy;
 
+	phy = calloc(1, sizeof(*phy));
+	if (!phy)
+		return -ENOMEM;
+
+	dev->driver_data = (ulong)phy;
 	inno->dev = dev;
 	phy->dev = dev;
+	phy->funcs = &inno_mipi_dphy_funcs;
+
+#if defined(CONFIG_ROCKCHIP_RV1108)
+	phy->soc_type = RV1108_MIPI_DPHY;
+#else
+	phy->soc_type = RK1808_MIPI_DPHY;
+#endif
 
 	return 0;
 }

commit 094465a9060cd2c8250bbe0062680bc055d34197
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Dec 11 15:22:34 2020 +0800

    power: charge animation: disable timer while uninit timer
    
    Otherwise the time is still working in kernel if there is no
    one to update it, which always wakeups system suspend.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ic2291b26730557c50fb8cbd505d05b40bb582c74

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 4bd30c0516..10e1fb7274 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -283,6 +283,9 @@ static void autowakeup_timer_init(struct udevice *dev, uint32_t seconds)
 
 static void autowakeup_timer_uninit(void)
 {
+	writel(0, TIMER_BASE + TIMER_CTRL);
+
+	irq_handler_disable(TIMER_IRQ);
 	irq_free_handler(TIMER_IRQ);
 }
 #endif

commit cd44409e4eaa7fccbbfcf5979b9170ed39915867
Author: Zorro Liu <lyx@rock-chips.com>
Date:   Sat Dec 12 16:58:13 2020 +0800

    drivers: video: rk_eink: update cmdline vcom parameter
    
    Signed-off-by: Zorro Liu <lyx@rock-chips.com>
    Change-Id: I80ac52356380bf4194d7115036634ffae35d21ce

diff --git a/drivers/video/rk_eink/rk_eink_display.c b/drivers/video/rk_eink/rk_eink_display.c
index a57a615ab7..f0088e2609 100644
--- a/drivers/video/rk_eink/rk_eink_display.c
+++ b/drivers/video/rk_eink/rk_eink_display.c
@@ -110,7 +110,7 @@ static int read_vcom_from_vendor(void)
 	/* Read vcom value from vendor storage part */
 	ret = vendor_storage_read(EINK_VCOM_ID, vcom_str, (EINK_VCOM_MAX - 1));
 	if (ret > 0) {
-		snprintf(vcom_args, strlen(vcom_str) + 6, "vcom=%s", vcom_str);
+		snprintf(vcom_args, strlen(vcom_str) + 15, "ebc_pmic.vcom=%s", vcom_str);
 		printf("eink update bootargs: %s\n", vcom_args);
 		env_update("bootargs", vcom_args);
 	} else {

commit ab1a0b8da2ab3925f5538b4c6ef66e88658f5488
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Dec 14 18:05:43 2020 +0800

    rockchip: dts: rk3568: add secure_otp node
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I67af428fbd0ae016b25a6aafc8c28d36e055d765

diff --git a/arch/arm/dts/rk3568-u-boot.dtsi b/arch/arm/dts/rk3568-u-boot.dtsi
index 67f1742b65..7c68c30317 100644
--- a/arch/arm/dts/rk3568-u-boot.dtsi
+++ b/arch/arm/dts/rk3568-u-boot.dtsi
@@ -206,3 +206,7 @@
 &pcfg_pull_none {
 	u-boot,dm-spl;
 };
+
+&secure_otp {
+	u-boot,dm-spl;
+};
diff --git a/arch/arm/dts/rk3568.dtsi b/arch/arm/dts/rk3568.dtsi
index e258ac3705..6d7b7a15db 100644
--- a/arch/arm/dts/rk3568.dtsi
+++ b/arch/arm/dts/rk3568.dtsi
@@ -1881,6 +1881,14 @@
 		status = "disabled";
 	};
 
+	secure_otp: secure_otp@fe3a0000 {
+		compatible = "rockchip,rk3568-secure-otp";
+		reg = <0x0 0xfe3a0000 0x0 0x4000>;
+		secure_conf = <0xfdd18008>;
+		mask_addr = <0xfe880000>;
+		cru_rst_addr = <0xfdd20470>;
+	};
+
 	i2s0_8ch: i2s@fe400000 {
 		compatible = "rockchip,rk3568-i2s-tdm";
 		reg = <0x0 0xfe400000 0x0 0x1000>;

commit cf432719d2471649fa50b34f5dc1c483c3c50122
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Dec 14 18:04:37 2020 +0800

    misc: rockchip-otp: support rk3568
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I21be09b06f7ac3a0f75e47e59ec094d6e254d05d

diff --git a/drivers/misc/rockchip-secure-otp.S b/drivers/misc/rockchip-secure-otp.S
index b09233d194..e45ce02ec2 100644
--- a/drivers/misc/rockchip-secure-otp.S
+++ b/drivers/misc/rockchip-secure-otp.S
@@ -5,281 +5,425 @@
 	.cfi_sections	.debug_frame
 	.section	.text.px30_spl_rockchip_otp_start,"ax",@progbits
 	.align	2
-	.global	px30_spl_rockchip_otp_start
 	.type	px30_spl_rockchip_otp_start, %function
 px30_spl_rockchip_otp_start:
 .LFB264:
 	.file 1 "drivers/misc/rockchip-secure-otp.c"
-	.loc 1 38 0
+	.loc 1 45 0
 	.cfi_startproc
 .LVL0:
-.LBB22:
-	.loc 1 39 0
+.LBB34:
+	.loc 1 46 0
 #APP
-// 39 "drivers/misc/rockchip-secure-otp.c" 1
+// 46 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	mov	w3, 16
-	sdiv	w2, w2, w3
+	mov	w1, 16
 .LVL1:
-	mov	w3, -65536
-	lsl	w2, w2, 2
-	sxtw	x2, w2
-	str	w3, [x2, x1]
+	sdiv	w3, w3, w1
 .LVL2:
-.LBE22:
-.LBB23:
-	.loc 1 40 0
+	mov	w1, -65536
+	lsl	w3, w3, 2
+	sxtw	x3, w3
+	str	w1, [x3, x2]
+.LVL3:
+.LBE34:
+.LBB35:
+	.loc 1 47 0
 #APP
-// 40 "drivers/misc/rockchip-secure-otp.c" 1
+// 47 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	mov	w1, 536879104
-.LVL3:
 	str	w1, [x0]
 	ret
-.LBE23:
+.LBE35:
 	.cfi_endproc
 .LFE264:
 	.size	px30_spl_rockchip_otp_start, .-px30_spl_rockchip_otp_start
 	.section	.text.px30_spl_rockchip_otp_stop,"ax",@progbits
 	.align	2
-	.global	px30_spl_rockchip_otp_stop
 	.type	px30_spl_rockchip_otp_stop, %function
 px30_spl_rockchip_otp_stop:
 .LFB265:
-	.loc 1 45 0
+	.loc 1 53 0
 	.cfi_startproc
 .LVL4:
-.LBB24:
-	.loc 1 46 0
+.LBB36:
+	.loc 1 54 0
 #APP
-// 46 "drivers/misc/rockchip-secure-otp.c" 1
+// 54 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	mov	w3, 536870912
-	str	w3, [x0]
+	mov	w1, 536870912
 .LVL5:
-.LBE24:
-.LBB25:
-	.loc 1 47 0
+	str	w1, [x0]
+.LVL6:
+.LBE36:
+.LBB37:
+	.loc 1 55 0
 #APP
-// 47 "drivers/misc/rockchip-secure-otp.c" 1
+// 55 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	mov	w0, 16
-.LVL6:
-	sdiv	w2, w2, w0
 .LVL7:
+	sdiv	w3, w3, w0
+.LVL8:
 	mov	w0, -1
-	lsl	w2, w2, 2
-	sxtw	x2, w2
-	str	w0, [x2, x1]
+	lsl	w3, w3, 2
+	sxtw	x3, w3
+	str	w0, [x3, x2]
 	ret
-.LBE25:
+.LBE37:
 	.cfi_endproc
 .LFE265:
 	.size	px30_spl_rockchip_otp_stop, .-px30_spl_rockchip_otp_stop
 	.section	.text.rk3308_spl_rockchip_otp_start,"ax",@progbits
 	.align	2
-	.global	rk3308_spl_rockchip_otp_start
 	.type	rk3308_spl_rockchip_otp_start, %function
 rk3308_spl_rockchip_otp_start:
 .LFB266:
-	.loc 1 52 0
+	.loc 1 61 0
 	.cfi_startproc
-.LVL8:
-.LBB26:
-	.loc 1 53 0
+.LVL9:
+.LBB38:
+	.loc 1 62 0
 #APP
-// 53 "drivers/misc/rockchip-secure-otp.c" 1
+// 62 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	mov	w3, 16
-	sdiv	w2, w2, w3
-.LVL9:
-	mov	w3, -65536
-	lsl	w2, w2, 2
-	sxtw	x2, w2
-	str	w3, [x2, x1]
+	mov	w1, 16
 .LVL10:
-.LBE26:
-.LBB27:
-	.loc 1 54 0
+	sdiv	w3, w3, w1
+.LVL11:
+	mov	w1, -65536
+	lsl	w3, w3, 2
+	sxtw	x3, w3
+	str	w1, [x3, x2]
+.LVL12:
+.LBE38:
+.LBB39:
+	.loc 1 63 0
 #APP
-// 54 "drivers/misc/rockchip-secure-otp.c" 1
+// 63 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	mov	w1, 262148
-.LVL11:
 	str	w1, [x0]
 	ret
-.LBE27:
+.LBE39:
 	.cfi_endproc
 .LFE266:
 	.size	rk3308_spl_rockchip_otp_start, .-rk3308_spl_rockchip_otp_start
 	.section	.text.rk3308_spl_rockchip_otp_stop,"ax",@progbits
 	.align	2
-	.global	rk3308_spl_rockchip_otp_stop
 	.type	rk3308_spl_rockchip_otp_stop, %function
 rk3308_spl_rockchip_otp_stop:
 .LFB267:
-	.loc 1 59 0
+	.loc 1 69 0
 	.cfi_startproc
-.LVL12:
-.LBB28:
-	.loc 1 60 0
+.LVL13:
+.LBB40:
+	.loc 1 70 0
 #APP
-// 60 "drivers/misc/rockchip-secure-otp.c" 1
+// 70 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	mov	w3, 262144
-	str	w3, [x0]
-.LVL13:
-.LBE28:
-.LBB29:
-	.loc 1 61 0
+	mov	w1, 262144
+.LVL14:
+	str	w1, [x0]
+.LVL15:
+.LBE40:
+.LBB41:
+	.loc 1 71 0
 #APP
-// 61 "drivers/misc/rockchip-secure-otp.c" 1
+// 71 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	mov	w0, 16
-.LVL14:
-	sdiv	w2, w2, w0
-.LVL15:
+.LVL16:
+	sdiv	w3, w3, w0
+.LVL17:
 	mov	w0, -1
-	lsl	w2, w2, 2
-	sxtw	x2, w2
-	str	w0, [x2, x1]
+	lsl	w3, w3, 2
+	sxtw	x3, w3
+	str	w0, [x3, x2]
 	ret
-.LBE29:
+.LBE41:
 	.cfi_endproc
 .LFE267:
 	.size	rk3308_spl_rockchip_otp_stop, .-rk3308_spl_rockchip_otp_stop
 	.section	.text.rk3328_spl_rockchip_otp_start,"ax",@progbits
 	.align	2
-	.global	rk3328_spl_rockchip_otp_start
 	.type	rk3328_spl_rockchip_otp_start, %function
 rk3328_spl_rockchip_otp_start:
 .LFB268:
-	.loc 1 66 0
+	.loc 1 77 0
 	.cfi_startproc
-.LVL16:
-.LBB30:
-	.loc 1 67 0
+.LVL18:
+.LBB42:
+	.loc 1 78 0
 #APP
-// 67 "drivers/misc/rockchip-secure-otp.c" 1
+// 78 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	mov	w2, 134219776
-.LVL17:
-	str	w2, [x0]
-.LVL18:
-.LBE30:
-.LBB31:
-	.loc 1 68 0
+	mov	w1, 134219776
+.LVL19:
+	str	w1, [x0]
+.LVL20:
+.LBE42:
+.LBB43:
+	.loc 1 79 0
 #APP
-// 68 "drivers/misc/rockchip-secure-otp.c" 1
+// 79 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	mov	w0, 1024
-.LVL19:
+.LVL21:
 	movk	w0, 0x600, lsl 16
-	str	w0, [x1]
+	str	w0, [x2]
 	ret
-.LBE31:
+.LBE43:
 	.cfi_endproc
 .LFE268:
 	.size	rk3328_spl_rockchip_otp_start, .-rk3328_spl_rockchip_otp_start
 	.section	.text.rk3328_spl_rockchip_otp_stop,"ax",@progbits
 	.align	2
-	.global	rk3328_spl_rockchip_otp_stop
 	.type	rk3328_spl_rockchip_otp_stop, %function
 rk3328_spl_rockchip_otp_stop:
 .LFB269:
-	.loc 1 73 0
+	.loc 1 85 0
 	.cfi_startproc
-.LVL20:
-.LBB32:
-	.loc 1 74 0
+.LVL22:
+.LBB44:
+	.loc 1 86 0
 #APP
-// 74 "drivers/misc/rockchip-secure-otp.c" 1
+// 86 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	mov	w2, 134217728
-.LVL21:
-	str	w2, [x0]
-.LVL22:
-.LBE32:
-.LBB33:
-	.loc 1 75 0
+	mov	w1, 134217728
+.LVL23:
+	str	w1, [x0]
+.LVL24:
+.LBE44:
+.LBB45:
+	.loc 1 87 0
 #APP
-// 75 "drivers/misc/rockchip-secure-otp.c" 1
+// 87 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	mov	w0, 100663296
-.LVL23:
-	str	w0, [x1]
+.LVL25:
+	str	w0, [x2]
 	ret
-.LBE33:
+.LBE45:
 	.cfi_endproc
 .LFE269:
 	.size	rk3328_spl_rockchip_otp_stop, .-rk3328_spl_rockchip_otp_stop
-	.section	.text.rockchip_secure_otp_ioctl,"ax",@progbits
+	.section	.text.rk3568_spl_rockchip_otp_stop,"ax",@progbits
 	.align	2
-	.type	rockchip_secure_otp_ioctl, %function
-rockchip_secure_otp_ioctl:
-.LFB279:
-	.loc 1 488 0
+	.type	rk3568_spl_rockchip_otp_stop, %function
+rk3568_spl_rockchip_otp_stop:
+.LFB271:
+	.loc 1 105 0
 	.cfi_startproc
-.LVL24:
-	.loc 1 491 0
+.LVL26:
+.LBB46:
+	.loc 1 106 0
+#APP
+// 106 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	mov	w1, 131072
+.LVL27:
+	str	w1, [x0]
+.LVL28:
+.LBE46:
+.LBB47:
+	.loc 1 107 0
+#APP
+// 107 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	mov	w0, 16
+.LVL29:
+	sdiv	w3, w3, w0
+.LVL30:
+	mov	w0, -1
+	lsl	w3, w3, 2
+	sxtw	x3, w3
+	str	w0, [x3, x2]
+	ret
+.LBE47:
+	.cfi_endproc
+.LFE271:
+	.size	rk3568_spl_rockchip_otp_stop, .-rk3568_spl_rockchip_otp_stop
+	.section	.text.secure_otp_ioctl,"ax",@progbits
+	.align	2
+	.type	secure_otp_ioctl, %function
+secure_otp_ioctl:
+.LFB285:
+	.loc 1 737 0
+	.cfi_startproc
+.LVL31:
+	.loc 1 740 0
 	mov	x0, 27908
-.LVL25:
+.LVL32:
 	cmp	x1, x0
-	bne	.L11
-.LVL26:
-.LBB34:
-.LBB35:
-	.loc 1 480 0
+	bne	.L12
+.LVL33:
+.LBB48:
+.LBB49:
+	.loc 1 729 0
 	mov	w0, 8
 	str	w0, [x2]
-.LVL27:
-.LBE35:
-.LBE34:
-	.loc 1 493 0
+.LVL34:
+.LBE49:
+.LBE48:
+	.loc 1 742 0
 	mov	w0, 0
-	.loc 1 494 0
+	.loc 1 743 0
 	ret
-.LVL28:
-.L11:
-	.loc 1 489 0
+.LVL35:
+.L12:
+	.loc 1 738 0
 	mov	w0, -22
-	.loc 1 500 0
+	.loc 1 749 0
 	ret
 	.cfi_endproc
-.LFE279:
-	.size	rockchip_secure_otp_ioctl, .-rockchip_secure_otp_ioctl
+.LFE285:
+	.size	secure_otp_ioctl, .-secure_otp_ioctl
+	.section	.text.secure_otp_write,"ax",@progbits
+	.align	2
+	.type	secure_otp_write, %function
+secure_otp_write:
+.LFB283:
+	.loc 1 721 0
+	.cfi_startproc
+.LVL36:
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	mov	x19, x0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -16
+	.cfi_offset 22, -8
+	.loc 1 721 0
+	mov	w20, w1
+	mov	x21, x2
+	mov	w22, w3
+	.loc 1 722 0
+	bl	dev_get_driver_data
+.LVL37:
+	.loc 1 724 0
+	ldr	x4, [x0, 8]
+	mov	w3, w22
+	mov	x2, x21
+	mov	w1, w20
+	mov	x0, x19
+.LVL38:
+	.loc 1 725 0
+	ldp	x21, x22, [sp, 32]
+.LVL39:
+	ldp	x19, x20, [sp, 16]
+.LVL40:
+	ldp	x29, x30, [sp], 48
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	.loc 1 724 0
+	br	x4
+.LVL41:
+	.cfi_endproc
+.LFE283:
+	.size	secure_otp_write, .-secure_otp_write
+	.section	.text.secure_otp_read,"ax",@progbits
+	.align	2
+	.type	secure_otp_read, %function
+secure_otp_read:
+.LFB282:
+	.loc 1 713 0
+	.cfi_startproc
+.LVL42:
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	mov	x19, x0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -16
+	.cfi_offset 22, -8
+	.loc 1 713 0
+	mov	w20, w1
+	mov	x21, x2
+	mov	w22, w3
+	.loc 1 714 0
+	bl	dev_get_driver_data
+.LVL43:
+	.loc 1 716 0
+	ldr	x4, [x0]
+	mov	w3, w22
+	mov	x2, x21
+	mov	w1, w20
+	mov	x0, x19
+.LVL44:
+	.loc 1 717 0
+	ldp	x21, x22, [sp, 32]
+.LVL45:
+	ldp	x19, x20, [sp, 16]
+.LVL46:
+	ldp	x29, x30, [sp], 48
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	.loc 1 716 0
+	br	x4
+.LVL47:
+	.cfi_endproc
+.LFE282:
+	.size	secure_otp_read, .-secure_otp_read
 	.section	.text.rockchip_secure_otp_ofdata_to_platdata,"ax",@progbits
 	.align	2
 	.type	rockchip_secure_otp_ofdata_to_platdata, %function
 rockchip_secure_otp_ofdata_to_platdata:
-.LFB280:
-	.loc 1 509 0
+.LFB286:
+	.loc 1 758 0
 	.cfi_startproc
-.LVL29:
+.LVL48:
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
@@ -289,45 +433,55 @@ rockchip_secure_otp_ofdata_to_platdata:
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -16
 	.cfi_offset 20, -8
-	.loc 1 509 0
+	.loc 1 758 0
 	mov	x20, x0
-	.loc 1 510 0
+	.loc 1 759 0
 	bl	dev_get_platdata
-.LVL30:
+.LVL49:
 	mov	x19, x0
-.LVL31:
-	.loc 1 512 0
+.LVL50:
+	.loc 1 761 0
 	mov	x0, x20
-.LVL32:
+.LVL51:
 	bl	dev_read_addr_ptr
-.LVL33:
-	.loc 1 513 0
+.LVL52:
+	.loc 1 762 0
 	mov	w2, 0
 	adrp	x1, .LC0
-	.loc 1 512 0
+	.loc 1 761 0
 	str	x0, [x19]
-	.loc 1 513 0
+	.loc 1 762 0
 	add	x1, x1, :lo12:.LC0
 	mov	x0, x20
 	bl	dev_read_u32_default
-.LVL34:
-	.loc 1 514 0
+.LVL53:
+	.loc 1 763 0
 	uxtw	x0, w0
 	str	x0, [x19, 8]
-	.loc 1 515 0
+	.loc 1 764 0
 	mov	w2, 0
 	mov	x0, x20
 	adrp	x1, .LC1
 	add	x1, x1, :lo12:.LC1
 	bl	dev_read_u32_default
-.LVL35:
-	.loc 1 516 0
+.LVL54:
+	.loc 1 765 0
 	uxtw	x0, w0
 	str	x0, [x19, 16]
-	.loc 1 519 0
+	.loc 1 766 0
+	mov	w2, 0
+	mov	x0, x20
+	adrp	x1, .LC2
+	add	x1, x1, :lo12:.LC2
+	bl	dev_read_u32_default
+.LVL55:
+	.loc 1 767 0
+	uxtw	x0, w0
+	str	x0, [x19, 24]
+	.loc 1 770 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-.LVL36:
+.LVL56:
 	ldp	x29, x30, [sp], 32
 	.cfi_restore 30
 	.cfi_restore 29
@@ -336,91 +490,315 @@ rockchip_secure_otp_ofdata_to_platdata:
 	.cfi_def_cfa 31, 0
 	ret
 	.cfi_endproc
-.LFE280:
+.LFE286:
 	.size	rockchip_secure_otp_ofdata_to_platdata, .-rockchip_secure_otp_ofdata_to_platdata
-	.section	.text.rockchip_secure_otp_wait_status.isra.1,"ax",@progbits
+	.section	.text.rk3568_spl_rockchip_otp_start,"ax",@progbits
 	.align	2
-	.type	rockchip_secure_otp_wait_status.isra.1, %function
-rockchip_secure_otp_wait_status.isra.1:
-.LFB282:
-	.loc 1 94 0
+	.type	rk3568_spl_rockchip_otp_start, %function
+rk3568_spl_rockchip_otp_start:
+.LFB270:
+	.loc 1 93 0
 	.cfi_startproc
-.LVL37:
-	stp	x29, x30, [sp, -48]!
-	.cfi_def_cfa_offset 48
-	.cfi_offset 29, -48
-	.cfi_offset 30, -40
+.LVL57:
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
-	mov	w19, w1
-	str	x21, [sp, 32]
-	.cfi_offset 21, -16
+	str	x19, [sp, 16]
+	.cfi_offset 19, -16
+	.loc 1 93 0
+	mov	x19, x1
+.LBB50:
 	.loc 1 94 0
-	mov	x21, x0
-	mov	w20, 10000
-.LVL38:
-.L15:
-.LBB42:
-	.loc 1 99 0
-	ldr	x0, [x21]
-	ldr	w0, [x0, 772]
-.LVL39:
 #APP
-// 99 "drivers/misc/rockchip-secure-otp.c" 1
+// 94 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-.LBE42:
-	tst	w0, w19
-	beq	.L17
-.LBB43:
-	.loc 1 109 0
-	orr	w19, w19, -65536
-.LVL40:
+	mov	w1, 16
+.LVL58:
+	sdiv	w3, w3, w1
+.LVL59:
+	mov	w1, -65536
+	lsl	w3, w3, 2
+	sxtw	x3, w3
+	str	w1, [x3, x2]
+.LVL60:
+.LBE50:
+.LBB51:
+	.loc 1 95 0
 #APP
-// 109 "drivers/misc/rockchip-secure-otp.c" 1
+// 95 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x21]
-.LVL41:
-	str	w19, [x0, 772]
-.LBE43:
-	.loc 1 111 0
-	mov	w0, 0
-	b	.L14
-.LVL42:
-.L17:
-	.loc 1 100 0
-	mov	x0, 1
-.LVL43:
-	bl	udelay
-.LVL44:
-	.loc 1 102 0
-	subs	w20, w20, #1
-.LVL45:
-	bne	.L15
-.LVL46:
-.LBB44:
-.LBB45:
-	.loc 1 103 0
+	mov	w1, 131074
+	str	w1, [x0]
+.LVL61:
+.LBE51:
+.LBB52:
+	.loc 1 96 0
+#APP
+// 96 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	mov	w0, -2147450880
+.LVL62:
+	str	w0, [x19]
+.LBE52:
+	.loc 1 97 0
+	mov	x0, 2
+	bl	udelay
+.LVL63:
+.LBB53:
+	.loc 1 98 0
+#APP
+// 98 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	mov	w0, -2147483648
+	str	w0, [x19]
+.LBE53:
+	.loc 1 100 0
+	ldr	x19, [sp, 16]
+.LVL64:
+	.loc 1 99 0
+	mov	x0, 1
+	.loc 1 100 0
+	ldp	x29, x30, [sp], 32
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_def_cfa 31, 0
+	.loc 1 99 0
+	b	udelay
+.LVL65:
+	.cfi_endproc
+.LFE270:
+	.size	rk3568_spl_rockchip_otp_start, .-rk3568_spl_rockchip_otp_start
+	.section	.text.rockchip_secure_otp_check_flag.isra.0,"ax",@progbits
+	.align	2
+	.type	rockchip_secure_otp_check_flag.isra.0, %function
+rockchip_secure_otp_check_flag.isra.0:
+.LFB287:
+	.loc 1 176 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -16
+	.cfi_offset 20, -8
+	.loc 1 176 0
+	mov	w19, 34465
+	mov	x20, x0
+	movk	w19, 0x1, lsl 16
+.L23:
+.LVL66:
+.LBB54:
+	.loc 1 182 0
+	ldr	x0, [x20]
+	ldr	w1, [x0, 44]
+.LVL67:
+#APP
+// 182 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+.LVL68:
+#NO_APP
+.LBE54:
+	.loc 1 183 0
+	and	w0, w1, 16
+	tbz	x1, 4, .L21
+	.loc 1 186 0
+	subs	w19, w19, #1
+.LVL69:
+	beq	.L24
+.LVL70:
+	.loc 1 192 0
+	mov	x0, 1
+	bl	udelay
+.LVL71:
+	b	.L23
+.LVL72:
+.L24:
+	.loc 1 187 0
+	mov	w0, -1
+.LVL73:
+.L21:
+	.loc 1 196 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE287:
+	.size	rockchip_secure_otp_check_flag.isra.0, .-rockchip_secure_otp_check_flag.isra.0
+	.section	.text.rockchip_secure_otp_wait_flag.isra.1,"ax",@progbits
+	.align	2
+	.type	rockchip_secure_otp_wait_flag.isra.1, %function
+rockchip_secure_otp_wait_flag.isra.1:
+.LFB288:
+	.loc 1 154 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -16
+	.cfi_offset 20, -8
+	.loc 1 154 0
+	mov	x20, x0
+	mov	w19, 20001
+.L31:
+.LVL74:
+.LBB55:
+	.loc 1 160 0
+	ldr	x0, [x20]
+	ldr	w0, [x0, 44]
+.LVL75:
+#APP
+// 160 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+.LVL76:
+#NO_APP
+.LBE55:
+	.loc 1 161 0
+	tbnz	x0, 4, .L32
+	.loc 1 164 0
+	subs	w19, w19, #1
+.LVL77:
+	beq	.L33
+	.loc 1 169 0
+	mov	x0, 1
+.LVL78:
+	bl	udelay
+.LVL79:
+	b	.L31
+.LVL80:
+.L32:
+	.loc 1 157 0
+	mov	w0, 0
+.LVL81:
+.L29:
+	.loc 1 174 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL82:
+.L33:
+	.cfi_restore_state
+	.loc 1 165 0
+	mov	w0, -1
+.LVL83:
+	b	.L29
+	.cfi_endproc
+.LFE288:
+	.size	rockchip_secure_otp_wait_flag.isra.1, .-rockchip_secure_otp_wait_flag.isra.1
+	.section	.text.rockchip_secure_otp_wait_status.isra.2,"ax",@progbits
+	.align	2
+	.type	rockchip_secure_otp_wait_status.isra.2, %function
+rockchip_secure_otp_wait_status.isra.2:
+.LFB289:
+	.loc 1 134 0
+	.cfi_startproc
+.LVL84:
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	mov	w19, w1
+	str	x21, [sp, 32]
+	.cfi_offset 21, -16
+	.loc 1 134 0
+	mov	x21, x0
+	mov	w20, 10000
+.LVL85:
+.L36:
+.LBB62:
+	.loc 1 139 0
+	ldr	x0, [x21]
+	ldr	w0, [x0, 772]
+.LVL86:
+#APP
+// 139 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+.LBE62:
+	tst	w0, w19
+	beq	.L38
+.LBB63:
+	.loc 1 149 0
+	orr	w19, w19, -65536
+.LVL87:
+#APP
+// 149 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x21]
+.LVL88:
+	str	w19, [x0, 772]
+.LBE63:
+	.loc 1 151 0
+	mov	w0, 0
+	b	.L35
+.LVL89:
+.L38:
+	.loc 1 140 0
+	mov	x0, 1
+.LVL90:
+	bl	udelay
+.LVL91:
+	.loc 1 142 0
+	subs	w20, w20, #1
+.LVL92:
+	bne	.L36
+.LVL93:
+.LBB64:
+.LBB65:
+	.loc 1 143 0
 	adrp	x1, .LANCHOR0
-	adrp	x0, .LC2
+	adrp	x0, .LC3
 	add	x1, x1, :lo12:.LANCHOR0
-	add	x0, x0, :lo12:.LC2
+	add	x0, x0, :lo12:.LC3
 	bl	printf
-.LVL47:
+.LVL94:
 	mov	w0, -110
-.LVL48:
-.L14:
-.LBE45:
-.LBE44:
-	.loc 1 112 0
+.LVL95:
+.L35:
+.LBE65:
+.LBE64:
+	.loc 1 152 0
 	ldp	x19, x20, [sp, 16]
-.LVL49:
+.LVL96:
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	.cfi_restore 30
@@ -431,278 +809,312 @@ rockchip_secure_otp_wait_status.isra.1:
 	.cfi_def_cfa 31, 0
 	ret
 	.cfi_endproc
-.LFE282:
-	.size	rockchip_secure_otp_wait_status.isra.1, .-rockchip_secure_otp_wait_status.isra.1
-	.section	.text.rockchip_secure_otp_read,"ax",@progbits
+.LFE289:
+	.size	rockchip_secure_otp_wait_status.isra.2, .-rockchip_secure_otp_wait_status.isra.2
+	.section	.text.rockchip_secure_otp_ecc_enable.constprop.5,"ax",@progbits
 	.align	2
-	.type	rockchip_secure_otp_read, %function
-rockchip_secure_otp_read:
-.LFB275:
-	.loc 1 182 0
+	.type	rockchip_secure_otp_ecc_enable.constprop.5, %function
+rockchip_secure_otp_ecc_enable.constprop.5:
+.LFB292:
+	.loc 1 198 0
 	.cfi_startproc
-.LVL50:
-	stp	x29, x30, [sp, -96]!
-	.cfi_def_cfa_offset 96
-	.cfi_offset 29, -96
-	.cfi_offset 30, -88
+.LVL97:
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -80
-	.cfi_offset 20, -72
-	mov	w20, w1
-	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -48
-	.cfi_offset 24, -40
-	mov	x24, x2
-	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -64
-	.cfi_offset 22, -56
-	mov	x22, x0
-	str	x27, [sp, 80]
-	.cfi_offset 27, -16
-	mov	w27, w3
-	stp	x25, x26, [sp, 64]
-	.cfi_offset 25, -32
-	.cfi_offset 26, -24
-	.loc 1 183 0
-	bl	dev_get_platdata
-.LVL51:
-	mov	x19, x0
-.LVL52:
-	.loc 1 184 0
-	mov	x0, x22
-.LVL53:
-	bl	dev_get_driver_data
-.LVL54:
-	.loc 1 190 0
-	ldr	x3, [x0]
-	.loc 1 184 0
-	mov	x23, x0
-.LVL55:
-	.loc 1 190 0
-	mov	w2, w20
-	ldp	x0, x1, [x19, 8]
-.LVL56:
-	blr	x3
-.LVL57:
-.LBB62:
-.LBB63:
-.LBB64:
-	.loc 1 163 0
+	str	x19, [sp, 16]
+	.cfi_offset 19, -16
+.LBB80:
+	.loc 1 203 0
 #APP
-// 163 "drivers/misc/rockchip-secure-otp.c" 1
+// 203 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x19]
-	mov	w1, 512
-	movk	w1, 0xff00, lsl 16
-	str	w1, [x0, 32]
-.LVL58:
-.LBE64:
-.LBB65:
-	.loc 1 164 0
+	ldr	x2, [x0]
+	mov	w3, 512
+	movk	w3, 0xff00, lsl 16
+	str	w3, [x2, 32]
+.LVL98:
+.LBE80:
+.LBB81:
+	.loc 1 204 0
 #APP
-// 164 "drivers/misc/rockchip-secure-otp.c" 1
+// 204 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x19]
-	mov	w1, -65535
-	str	w1, [x0, 36]
-.LVL59:
-.LBE65:
-.LBB66:
-	.loc 1 165 0
+	ldr	x2, [x0]
+	mov	w3, -65535
+	str	w3, [x2, 36]
+.LVL99:
+.LBE81:
+.LBB82:
+	.loc 1 205 0
 #APP
-// 165 "drivers/misc/rockchip-secure-otp.c" 1
+// 205 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x19]
-	mov	w1, 250
-	str	w1, [x0, 4096]
-.LVL60:
-.LBE66:
-.LBB67:
-	.loc 1 167 0
+	ldr	x2, [x0]
+	mov	w3, 250
+	str	w3, [x2, 4096]
+.LVL100:
+.LBE82:
+.LBB83:
+	.loc 1 207 0
 #APP
-// 167 "drivers/misc/rockchip-secure-otp.c" 1
+// 207 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x19]
-	str	wzr, [x0, 4100]
-.LVL61:
-.LBE67:
-.LBB68:
-	.loc 1 171 0
+	ldr	x2, [x0]
+	str	wzr, [x2, 4100]
+.LVL101:
+.LBE83:
+.LBB84:
+	.loc 1 211 0
 #APP
-// 171 "drivers/misc/rockchip-secure-otp.c" 1
+// 211 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x19]
-	mov	w1, 65537
-	str	w1, [x0, 32]
-.LBE68:
-	.loc 1 173 0
+	ldr	x1, [x0]
+	mov	w2, 65537
+	str	w2, [x1, 32]
+.LBE84:
+	.loc 1 213 0
 	mov	w1, 2
-	mov	x0, x19
-	bl	rockchip_secure_otp_wait_status.isra.1
-.LVL62:
-	.loc 1 174 0
-	tbz	w0, #31, .L21
-	.loc 1 175 0
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL102:
+	mov	w19, w0
+.LVL103:
+	.loc 1 214 0
+	tbz	w0, #31, .L41
+.LVL104:
+.LBB85:
+.LBB86:
+	.loc 1 215 0
 	adrp	x1, .LANCHOR1
-	adrp	x0, .LC3
-.LVL63:
-	add	x1, x1, :lo12:.LANCHOR1
-	add	x0, x0, :lo12:.LC3
+	adrp	x0, .LC4
+.LVL105:
+	add	x1, x1, :lo12:.LANCHOR1
+	add	x0, x0, :lo12:.LC4
 	bl	printf
-.LVL64:
-.L21:
-.LBE63:
-.LBE62:
-.LBB69:
-	.loc 1 212 0
+.LVL106:
+.L41:
+.LBE86:
+.LBE85:
+	.loc 1 218 0
+	mov	w0, w19
+	ldr	x19, [sp, 16]
+.LVL107:
+	ldp	x29, x30, [sp], 32
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE292:
+	.size	rockchip_secure_otp_ecc_enable.constprop.5, .-rockchip_secure_otp_ecc_enable.constprop.5
+	.section	.text.rk3568_secure_otp_read,"ax",@progbits
+	.align	2
+	.type	rk3568_secure_otp_read, %function
+rk3568_secure_otp_read:
+.LFB279:
+	.loc 1 465 0
+	.cfi_startproc
+.LVL108:
+	stp	x29, x30, [sp, -80]!
+	.cfi_def_cfa_offset 80
+	.cfi_offset 29, -80
+	.cfi_offset 30, -72
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -64
+	.cfi_offset 20, -56
+	mov	w20, w1
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -48
+	.cfi_offset 22, -40
+	mov	x21, x2
+	stp	x23, x24, [sp, 48]
+	mov	x22, x0
+	.cfi_offset 23, -32
+	.cfi_offset 24, -24
+	mov	w23, w3
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 25, -16
+	.cfi_offset 26, -8
+	.loc 1 466 0
+	bl	dev_get_platdata
+.LVL109:
+	mov	x19, x0
+.LVL110:
+	.loc 1 467 0
+	mov	x0, x22
+.LVL111:
+	bl	dev_get_driver_data
+.LVL112:
+	.loc 1 472 0
+	ldr	x4, [x0, 16]
+	.loc 1 467 0
+	mov	x24, x0
+.LVL113:
+	.loc 1 472 0
+	ldr	x1, [x19, 24]
+	mov	w3, w20
+	ldp	x0, x2, [x19, 8]
+.LVL114:
+	blr	x4
+.LVL115:
+	.loc 1 475 0
+	mov	x0, x19
+	bl	rockchip_secure_otp_ecc_enable.constprop.5
+.LVL116:
+.LBB87:
+	.loc 1 476 0
 #APP
-// 212 "drivers/misc/rockchip-secure-otp.c" 1
+// 476 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x19]
-	mov	w26, 65537
-	add	w27, w27, w20
-.LVL65:
-	str	w26, [x0, 256]
-.LBE69:
-	.loc 1 213 0
+	mov	w25, 65537
+.LBE87:
+	.loc 1 470 0
+	mov	w22, 0
+.LVL117:
+	.loc 1 483 0
+	mov	w26, 136
+.LBB88:
+	.loc 1 476 0
+	str	w25, [x0, 256]
+.LBE88:
+	.loc 1 477 0
 	mov	x0, 50
 	bl	udelay
-.LVL66:
-.L22:
-	.loc 1 214 0
-	cmp	w20, w27
-	bne	.L29
-	mov	w22, 0
-	b	.L26
-.L29:
-	.loc 1 216 0
-	cmp	w20, 448
-	bgt	.L30
-	.loc 1 219 0
-	sub	w1, w20, #16
-	cmp	w20, 0
-	mov	w0, w20
-	ccmp	w1, 31, 0, ne
-	bls	.L24
-.LVL67:
-	.loc 1 219 0 is_stmt 0 discriminator 1
-	sub	w1, w20, #128
-	cmp	w1, 263
-	bls	.L24
-	.loc 1 222 0 is_stmt 1
-	adrp	x0, .LC4
-.LVL68:
-	add	x0, x0, :lo12:.LC4
+.LVL118:
+.L45:
+	.loc 1 478 0
+	cbz	w23, .L49
+	.loc 1 480 0
+	cmp	w20, 896
+	bgt	.L53
+	.loc 1 483 0
+	sub	w0, w20, #144
+	cmp	w0, 60
+	ccmp	w20, w26, 4, hi
+	beq	.L47
+	.loc 1 483 0 is_stmt 0 discriminator 1
+	sub	w0, w20, #457
+	cmp	w0, 438
+	bls	.L47
+	.loc 1 486 0 is_stmt 1
+	adrp	x0, .LC5
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-.LVL69:
-.L30:
-	.loc 1 217 0
+.LVL119:
+.L53:
+	.loc 1 481 0
 	mov	w22, -1
-	b	.L20
-.LVL70:
-.L24:
-.LBB70:
-	.loc 1 226 0
-	add	w20, w20, 1
-.LVL71:
-	orr	w0, w0, -65536
-.LVL72:
+.LVL120:
+	b	.L44
+.LVL121:
+.L47:
+.LBB89:
+	.loc 1 490 0
+	orr	w1, w20, -65536
+.LVL122:
 #APP
-// 226 "drivers/misc/rockchip-secure-otp.c" 1
+// 490 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x1, [x19]
-	str	w0, [x1, 260]
-.LVL73:
-.LBE70:
-.LBB71:
-	.loc 1 228 0
+	ldr	x0, [x19]
+.LBE89:
+	.loc 1 492 0
+	add	w20, w20, 2
+.LVL123:
+.LBB90:
+	.loc 1 490 0
+	str	w1, [x0, 260]
+.LBE90:
+.LBB91:
+	.loc 1 493 0
 #APP
-// 228 "drivers/misc/rockchip-secure-otp.c" 1
+// 493 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x19]
-.LVL74:
-.LBE71:
-	.loc 1 230 0
+.LBE91:
+	.loc 1 495 0
 	mov	w1, 4
-.LVL75:
-.LBB72:
-	.loc 1 228 0
-	str	w26, [x0, 264]
-.LVL76:
-.LBE72:
-	.loc 1 230 0
+.LVL124:
+.LBB92:
+	.loc 1 493 0
+	str	w25, [x0, 264]
+.LVL125:
+.LBE92:
+	.loc 1 495 0
 	mov	x0, x19
-	bl	rockchip_secure_otp_wait_status.isra.1
-.LVL77:
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL126:
 	mov	w22, w0
-.LVL78:
-	.loc 1 231 0
-	tbz	w0, #31, .L25
-	.loc 1 232 0
+.LVL127:
+	.loc 1 496 0
+	tbz	w0, #31, .L48
+	.loc 1 497 0
 	adrp	x1, .LANCHOR2
-	adrp	x0, .LC5
-.LVL79:
+	adrp	x0, .LC6
+.LVL128:
 	add	x1, x1, :lo12:.LANCHOR2
-	add	x0, x0, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
 	bl	printf
-.LVL80:
-.L26:
-.LBB73:
-	.loc 1 249 0
+.LVL129:
+.L49:
+.LBB93:
+	.loc 1 511 0
 #APP
-// 249 "drivers/misc/rockchip-secure-otp.c" 1
+// 511 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x19]
 	mov	w1, 65536
-.LBE73:
-	.loc 1 251 0
-	ldr	x3, [x23, 8]
-	mov	w2, w20
-.LBB74:
-	.loc 1 249 0
+.LBE93:
+	.loc 1 513 0
+	ldr	x2, [x19, 16]
+	mov	w3, w20
+	ldr	x4, [x24, 24]
+.LBB94:
+	.loc 1 511 0
 	str	w1, [x0, 256]
-.LBE74:
-	.loc 1 251 0
-	ldp	x0, x1, [x19, 8]
-	blr	x3
-.LVL81:
-.L20:
-	.loc 1 265 0
+.LBE94:
+	.loc 1 513 0
+	ldr	x0, [x19, 8]
+	ldr	x1, [x19, 24]
+	blr	x4
+.LVL130:
+.L44:
+	.loc 1 518 0
 	mov	w0, w22
-	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
-.LVL82:
+.LVL131:
 	ldp	x21, x22, [sp, 32]
-.LVL83:
 	ldp	x23, x24, [sp, 48]
-.LVL84:
+.LVL132:
 	ldp	x25, x26, [sp, 64]
-.LVL85:
-	ldp	x29, x30, [sp], 96
+	ldp	x29, x30, [sp], 80
 	.cfi_remember_state
 	.cfi_restore 30
 	.cfi_restore 29
-	.cfi_restore 27
 	.cfi_restore 25
 	.cfi_restore 26
 	.cfi_restore 23
@@ -713,5231 +1125,8294 @@ rockchip_secure_otp_read:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL86:
-.L25:
+.LVL133:
+.L48:
 	.cfi_restore_state
-.LBB75:
-	.loc 1 236 0
-	ldr	x0, [x19]
-.LVL87:
-	ldrb	w2, [x0, 292]
-	and	w2, w2, 255
-.LVL88:
-#APP
-// 236 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-.LVL89:
-#NO_APP
-.LBE75:
-.LBB76:
-	.loc 1 237 0
+.LBB95:
+	.loc 1 501 0
 	ldr	x0, [x19]
-	ldrb	w0, [x0, 288]
-	and	w0, w0, 255
-.LVL90:
+.LVL134:
+	ldrh	w0, [x0, 292]
+	and	w0, w0, 65535
+.LVL135:
 #APP
-// 237 "drivers/misc/rockchip-secure-otp.c" 1
+// 501 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
-.LVL91:
+.LVL136:
 #NO_APP
-.LBE76:
-.LBB77:
-.LBB78:
-	.loc 1 82 0
-	bfi	w21, w2, 0, 8
-	.loc 1 83 0
-	bfi	w25, w0, 0, 8
-	.loc 1 84 0
-	and	w0, w21, 1
-.LVL92:
-	ubfx	x5, x21, 3, 1
-	ubfx	x3, x21, 4, 1
-	ubfx	x8, x21, 1, 1
-	eor	w1, w0, w5
-	eor	w6, w8, w5
-	eor	w0, w0, w8
-	eor	w5, w5, w3
-	ubfx	x4, x21, 6, 1
-	eor	w0, w0, w5
-	eor	w7, w3, w4
-	eor	w0, w4, w0
-	and	w3, w25, 1
-	cmp	w3, w0
-	bne	.L27
-	.loc 1 85 0
-	ubfx	x3, x21, 2, 1
-	ubfx	x0, x21, 5, 1
-	eor	w4, w4, w3
-	eor	w1, w1, w4
-	ubfx	x4, x25, 1, 1
-	eor	w1, w0, w1
-	cmp	w4, w1
-	bne	.L27
-	.loc 1 86 0
-	ubfx	x1, x21, 7, 1
-	eor	w3, w3, w1
-	eor	w0, w0, w1
-	eor	w3, w6, w3
-	ubfx	x1, x25, 2, 1
-	cmp	w1, w3
-	bne	.L27
-	.loc 1 87 0
-	ubfx	x1, x25, 3, 1
-	eor	w0, w0, w7
-	cmp	w1, w0
-	beq	.L28
-.L27:
-.LVL93:
-.LBE78:
-.LBE77:
-	.loc 1 241 0
-	adrp	x0, .LC6
-	.loc 1 242 0
-	mov	w22, -1
-	.loc 1 241 0
-	add	x0, x0, :lo12:.LC6
-	bl	printf
-.LVL94:
-	.loc 1 242 0
-	b	.L26
-.LVL95:
-.L28:
-	.loc 1 245 0
-	strb	w2, [x24], 1
-.LVL96:
-	b	.L22
+.LBE95:
+	.loc 1 503 0
+	strb	w0, [x21]
+	.loc 1 504 0
+	cmp	w23, 1
+	beq	.L49
+.LVL137:
+	.loc 1 505 0
+	lsr	w0, w0, 8
+.LVL138:
+	.loc 1 506 0
+	sub	w23, w23, #2
+.LVL139:
+	.loc 1 505 0
+	strb	w0, [x21, 1]
+	add	x21, x21, 2
+.LVL140:
+	b	.L45
 	.cfi_endproc
-.LFE275:
-	.size	rockchip_secure_otp_read, .-rockchip_secure_otp_read
-	.section	.text.rockchip_secure_otp_write,"ax",@progbits
+.LFE279:
+	.size	rk3568_secure_otp_read, .-rk3568_secure_otp_read
+	.section	.text.rockchip_secure_otp_read,"ax",@progbits
 	.align	2
-	.type	rockchip_secure_otp_write, %function
-rockchip_secure_otp_write:
-.LFB277:
-	.loc 1 443 0
+	.type	rockchip_secure_otp_read, %function
+rockchip_secure_otp_read:
+.LFB276:
+	.loc 1 222 0
 	.cfi_startproc
-.LVL97:
-	stp	x29, x30, [sp, -128]!
-	.cfi_def_cfa_offset 128
-	.cfi_offset 29, -128
-	.cfi_offset 30, -120
+.LVL141:
+	stp	x29, x30, [sp, -80]!
+	.cfi_def_cfa_offset 80
+	.cfi_offset 29, -80
+	.cfi_offset 30, -72
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -112
-	.cfi_offset 20, -104
-	mov	w19, w1
+	.cfi_offset 19, -64
+	.cfi_offset 20, -56
+	mov	w20, w1
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -80
-	.cfi_offset 24, -72
+	.cfi_offset 23, -32
+	.cfi_offset 24, -24
 	mov	w24, w3
-	stp	x27, x28, [sp, 80]
 	stp	x21, x22, [sp, 32]
-	stp	x25, x26, [sp, 64]
-	.cfi_offset 27, -48
-	.cfi_offset 28, -40
-	.cfi_offset 21, -96
-	.cfi_offset 22, -88
-	.cfi_offset 25, -64
-	.cfi_offset 26, -56
-	.loc 1 443 0
-	stp	x2, x0, [x29, 104]
-	.loc 1 444 0
+	mov	x23, x0
+	.cfi_offset 21, -48
+	.cfi_offset 22, -40
+	mov	x22, x2
+	str	x25, [sp, 64]
+	.cfi_offset 25, -16
+	.loc 1 223 0
 	bl	dev_get_platdata
-.LVL98:
-	mov	x28, x0
-.LVL99:
-	.loc 1 446 0
-	sxtw	x0, w24
-.LVL100:
-	bl	malloc_simple
-.LVL101:
-	.loc 1 449 0
-	cbnz	x0, .L33
-.LVL102:
+.LVL142:
+	mov	x19, x0
+.LVL143:
+	.loc 1 224 0
+	mov	x0, x23
+.LVL144:
+	bl	dev_get_driver_data
+.LVL145:
+	.loc 1 230 0
+	ldr	x4, [x0, 16]
+	.loc 1 224 0
+	mov	x25, x0
+.LVL146:
+	.loc 1 230 0
+	ldr	x1, [x19, 24]
+	mov	w3, w20
+	ldp	x0, x2, [x19, 8]
+.LVL147:
+	blr	x4
+.LVL148:
+	.loc 1 233 0
+	mov	x0, x19
+	bl	rockchip_secure_otp_ecc_enable.constprop.5
+.LVL149:
+.LBB96:
+	.loc 1 234 0
+#APP
+// 234 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x19]
+	mov	w23, 65537
+.LVL150:
+	add	w24, w24, w20
+.LVL151:
+.LBE96:
+	.loc 1 227 0
+	mov	w21, 0
+.LBB97:
+	.loc 1 234 0
+	str	w23, [x0, 256]
+.LBE97:
+	.loc 1 235 0
+	mov	x0, 50
+	bl	udelay
+.LVL152:
+.L56:
+	.loc 1 236 0
+	cmp	w20, w24
+	beq	.L60
+	.loc 1 238 0
+	cmp	w20, 448
+	bgt	.L62
+	.loc 1 241 0
+	sub	w1, w20, #16
+	cmp	w20, 0
+	mov	w0, w20
+	ccmp	w1, 31, 0, ne
+	bls	.L58
+	.loc 1 241 0 is_stmt 0 discriminator 1
+	sub	w1, w20, #128
+	cmp	w1, 263
+	bls	.L58
+	.loc 1 244 0 is_stmt 1
+	adrp	x0, .LC5
+	add	x0, x0, :lo12:.LC5
+	bl	printf
+.LVL153:
 .L62:
-.LBB146:
-.LBB147:
-	.loc 1 282 0
-	mov	w27, -1
-.L32:
-.LBE147:
-.LBE146:
-	.loc 1 476 0
-	mov	w0, w27
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-.LVL103:
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-.LVL104:
-	ldp	x29, x30, [sp], 128
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
+	.loc 1 239 0
+	mov	w21, -1
+.LVL154:
+	b	.L55
+.LVL155:
+.L58:
+.LBB98:
+	.loc 1 248 0
+	add	w20, w20, 1
+.LVL156:
+	orr	w0, w0, -65536
+.LVL157:
+#APP
+// 248 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x1, [x19]
+	str	w0, [x1, 260]
+.LVL158:
+.LBE98:
+.LBB99:
+	.loc 1 250 0
+#APP
+// 250 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x19]
+.LVL159:
+.LBE99:
+	.loc 1 252 0
+	mov	w1, 4
+.LVL160:
+.LBB100:
+	.loc 1 250 0
+	str	w23, [x0, 264]
+.LVL161:
+.LBE100:
+	.loc 1 252 0
+	mov	x0, x19
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL162:
+	mov	w21, w0
+.LVL163:
+	.loc 1 253 0
+	tbz	w0, #31, .L59
+	.loc 1 254 0
+	adrp	x1, .LANCHOR3
+	adrp	x0, .LC6
+.LVL164:
+	add	x1, x1, :lo12:.LANCHOR3
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.LVL165:
+.L60:
+.LBB101:
+	.loc 1 271 0
+#APP
+// 271 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x19]
+	mov	w1, 65536
+.LBE101:
+	.loc 1 273 0
+	ldr	x2, [x19, 16]
+	mov	w3, w20
+	ldr	x4, [x25, 24]
+.LBB102:
+	.loc 1 271 0
+	str	w1, [x0, 256]
+.LBE102:
+	.loc 1 273 0
+	ldr	x0, [x19, 8]
+	ldr	x1, [x19, 24]
+	blr	x4
+.LVL166:
+.L55:
+	.loc 1 278 0
+	mov	w0, w21
+	ldr	x25, [sp, 64]
+.LVL167:
+	ldp	x19, x20, [sp, 16]
+.LVL168:
+	ldp	x21, x22, [sp, 32]
+.LVL169:
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 25
+	.cfi_restore 23
+	.cfi_restore 24
 	.cfi_restore 21
 	.cfi_restore 22
 	.cfi_restore 19
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
-.LVL105:
 	ret
-.LVL106:
-.L33:
+.LVL170:
+.L59:
 	.cfi_restore_state
-	mov	x20, x0
-	.loc 1 452 0
+.LBB103:
+	.loc 1 258 0
+	ldr	x0, [x19]
+.LVL171:
+	ldrb	w0, [x0, 292]
+	and	w0, w0, 255
+.LVL172:
+#APP
+// 258 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+.LVL173:
+#NO_APP
+.LBE103:
+	.loc 1 267 0
+	strb	w0, [x22], 1
+.LVL174:
+	b	.L56
+	.cfi_endproc
+.LFE276:
+	.size	rockchip_secure_otp_read, .-rockchip_secure_otp_read
+	.section	.text.rk3568_secure_otp_write,"ax",@progbits
+	.align	2
+	.type	rk3568_secure_otp_write, %function
+rk3568_secure_otp_write:
+.LFB281:
+	.loc 1 671 0
+	.cfi_startproc
+.LVL175:
+	stp	x29, x30, [sp, -128]!
+	.cfi_def_cfa_offset 128
+	.cfi_offset 29, -128
+	.cfi_offset 30, -120
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -112
+	.cfi_offset 20, -104
+	mov	w20, w3
+	stp	x25, x26, [sp, 64]
+	mov	w19, w1
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 25, -64
+	.cfi_offset 26, -56
+	.cfi_offset 21, -96
+	.cfi_offset 22, -88
+	.cfi_offset 23, -80
+	.cfi_offset 24, -72
+	.cfi_offset 27, -48
+	.cfi_offset 28, -40
+	.loc 1 671 0
+	str	x2, [x29, 104]
+	str	x0, [x29, 120]
+	.loc 1 672 0
+	bl	dev_get_platdata
+.LVL176:
+	mov	x26, x0
+.LVL177:
+	.loc 1 674 0
+	sxtw	x0, w20
+.LVL178:
+	bl	malloc_simple
+.LVL179:
+	.loc 1 677 0
+	tbz	x20, 0, .L65
+	.loc 1 678 0
+	adrp	x0, .LC7
+.LVL180:
+	add	x0, x0, :lo12:.LC7
+.LVL181:
+.L90:
+.LBB169:
+.LBB170:
+	.loc 1 534 0
+	bl	printf
+.LVL182:
+	b	.L91
+.LVL183:
+.L65:
+	mov	x21, x0
+.LBE170:
+.LBE169:
+	.loc 1 682 0
+	cbnz	x0, .L67
+.LVL184:
+.L91:
+.LBB248:
+.LBB244:
+	.loc 1 534 0
+	mov	w28, -1
+.L64:
+.LBE244:
+.LBE248:
+	.loc 1 709 0
+	mov	w0, w28
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+.LVL185:
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+.LVL186:
+	ret
+.LVL187:
+.L67:
+	.cfi_restore_state
+	.loc 1 685 0
 	mov	x2, x0
-	ldr	x0, [x29, 112]
-.LVL107:
-	mov	w3, w24
+	ldr	x0, [x29, 120]
+.LVL188:
+	mov	w3, w20
 	mov	w1, w19
 	bl	rockchip_secure_otp_read
-.LVL108:
-	.loc 1 453 0
-	cbnz	w0, .L62
+.LVL189:
+	.loc 1 686 0
+	cbnz	w0, .L91
 	mov	x0, 0
-.LVL109:
-.L37:
-	.loc 1 458 0 discriminator 1
-	cmp	w24, w0
-	bgt	.L38
-.LBB224:
-.LBB220:
-	.loc 1 397 0
-	adrp	x20, .LANCHOR3
-.LVL110:
-	add	x20, x20, :lo12:.LANCHOR3
-.LBE220:
-.LBE224:
-	.loc 1 458 0
-	mov	x23, 0
-.LVL111:
-.L39:
-	.loc 1 468 0 discriminator 1
-	cmp	w24, w23
-	bgt	.L55
-	mov	w27, 0
-	b	.L32
-.LVL112:
-.L38:
+.LVL190:
+.L70:
+	.loc 1 691 0 discriminator 1
+	cmp	w20, w0
+	bgt	.L71
+	.loc 1 701 0
+	mov	w0, 2
+.LVL191:
+	mov	x24, 0
+	sdiv	w0, w20, w0
+.LBB249:
+.LBB245:
+	.loc 1 656 0
+	adrp	x20, .LANCHOR4
+.LVL192:
+	add	x20, x20, :lo12:.LANCHOR4
+.LBE245:
+.LBE249:
+	.loc 1 701 0
+	str	w0, [x29, 116]
+.LVL193:
+.L72:
+	.loc 1 701 0 is_stmt 0 discriminator 1
+	ldr	w0, [x29, 116]
+	cmp	w0, w24
+	bgt	.L85
+	mov	w28, 0
+	b	.L64
+.LVL194:
+.L71:
 	add	x0, x0, 1
-.LVL113:
-	.loc 1 459 0
-	add	x1, x20, x0
+.LVL195:
+	.loc 1 692 0 is_stmt 1
+	add	x1, x21, x0
 	ldrb	w1, [x1, -1]
-	cbz	w1, .L37
-	.loc 1 460 0
-	adrp	x0, .LC7
-	add	x0, x0, :lo12:.LC7
-.LVL114:
-.L63:
-.LBB225:
-.LBB221:
-	.loc 1 282 0
-	bl	printf
-.LVL115:
-	b	.L62
-.LVL116:
-.L55:
-.LBE221:
-.LBE225:
-	.loc 1 469 0
+	cbz	w1, .L70
+	.loc 1 693 0
+	adrp	x0, .LC8
+	add	x0, x0, :lo12:.LC8
+	b	.L90
+.LVL196:
+.L85:
+	.loc 1 702 0
 	ldr	x0, [x29, 104]
-	ldrb	w0, [x0, x23]
-	str	w0, [x29, 124]
-.LVL117:
-.LBB226:
-.LBB222:
-	.loc 1 272 0
-	ldr	x0, [x29, 112]
+	ldrh	w23, [x0, x24, lsl 1]
+.LVL197:
+.LBB250:
+.LBB246:
+	.loc 1 525 0
+	ldr	x0, [x29, 120]
 	bl	dev_get_driver_data
-.LVL118:
-	mov	x26, x0
-.LVL119:
-	.loc 1 275 0
-	cmp	w19, 448
-	bgt	.L62
-	.loc 1 279 0
-	sub	w0, w19, #16
-.LVL120:
-	cmp	w19, 0
-	ccmp	w0, 31, 0, ne
-	bls	.L40
-	sub	w0, w19, #128
-	cmp	w0, 263
-	bls	.L40
-	.loc 1 282 0
-	adrp	x0, .LC4
-	add	x0, x0, :lo12:.LC4
-	b	.L63
-.L40:
-	.loc 1 286 0
-	ldr	w0, [x29, 124]
-	cbnz	w0, .L41
-.LVL121:
-.L54:
-	add	x23, x23, 1
-	add	w19, w19, 1
-	b	.L39
-.LVL122:
-.L41:
-	.loc 1 289 0
-	ldr	x3, [x26]
-	mov	w2, w19
-	ldp	x0, x1, [x28, 8]
-	blr	x3
-.LVL123:
-.LBB148:
-	.loc 1 311 0
+.LVL198:
+	mov	x27, x0
+.LVL199:
+	.loc 1 527 0
+	cmp	w19, 896
+	bgt	.L91
+	.loc 1 531 0
+	sub	w0, w19, #144
+.LVL200:
+	cmp	w0, 60
+	mov	w0, 136
+	ccmp	w19, w0, 4, hi
+	beq	.L73
+	sub	w0, w19, #457
+	cmp	w0, 438
+	bls	.L73
+	.loc 1 534 0
+	adrp	x0, .LC5
+	add	x0, x0, :lo12:.LC5
+	b	.L90
+.L73:
+	.loc 1 538 0
+	cbnz	w23, .L74
+.LVL201:
+.L84:
+	add	x24, x24, 1
+.LVL202:
+	add	w19, w19, 2
+	b	.L72
+.LVL203:
+.L74:
+	.loc 1 541 0
+	ldp	x0, x2, [x26, 8]
+	mov	w3, w19
+	ldr	x1, [x26, 24]
+	ldr	x5, [x27, 16]
+	blr	x5
+.LVL204:
+.LBB171:
+	.loc 1 544 0
 #APP
-// 311 "drivers/misc/rockchip-secure-otp.c" 1
+// 544 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x26]
+	mov	w1, 65536
+	str	w1, [x0, 256]
+.LVL205:
+.LBE171:
+.LBB172:
+	.loc 1 545 0
+#APP
+// 545 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
+	ldr	x0, [x26]
 	mov	w1, 262148
 	str	w1, [x0, 32]
-.LVL124:
-.LBE148:
-.LBB149:
-	.loc 1 312 0
+.LVL206:
+.LBE172:
+.LBB173:
+	.loc 1 546 0
 #APP
-// 312 "drivers/misc/rockchip-secure-otp.c" 1
+// 546 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
+	ldr	x0, [x26]
 	mov	w1, -65536
 	str	w1, [x0, 40]
-.LVL125:
-.LBE149:
-.LBB150:
-	.loc 1 313 0
+.LVL207:
+.LBE173:
+.LBB174:
+	.loc 1 547 0
 #APP
-// 313 "drivers/misc/rockchip-secure-otp.c" 1
+// 547 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
+	ldr	x0, [x26]
 	mov	w1, 512
 	movk	w1, 0xff00, lsl 16
 	str	w1, [x0, 32]
-.LVL126:
-.LBE150:
-.LBB151:
-	.loc 1 314 0
+.LVL208:
+.LBE174:
+.LBB175:
+	.loc 1 548 0
 #APP
-// 314 "drivers/misc/rockchip-secure-otp.c" 1
+// 548 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
+	ldr	x0, [x26]
 	mov	w1, -65522
 	str	w1, [x0, 36]
-.LVL127:
-.LBE151:
-.LBB152:
-	.loc 1 315 0
+.LVL209:
+.LBE175:
+.LBB176:
+	.loc 1 549 0
 #APP
-// 315 "drivers/misc/rockchip-secure-otp.c" 1
+// 549 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
-	mov	w2, 240
-	str	w2, [x29, 120]
-.LVL128:
-	str	w2, [x0, 4096]
-.LBE152:
-.LBB153:
-	.loc 1 316 0
-#APP
-// 316 "drivers/misc/rockchip-secure-otp.c" 1
+	ldr	x0, [x26]
+	mov	w25, 240
+	str	w25, [x0, 4096]
+.LVL210:
+.LBE176:
+.LBB177:
+	.loc 1 550 0
+#APP
+// 550 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
-	mov	w25, 1
-	str	w25, [x0, 4100]
-.LVL129:
-.LBE153:
-.LBB154:
-	.loc 1 317 0
+	ldr	x0, [x26]
+	mov	w1, 1
+	str	w1, [x0, 4100]
+.LVL211:
+.LBE177:
+.LBB178:
+	.loc 1 551 0
 #APP
-// 317 "drivers/misc/rockchip-secure-otp.c" 1
+// 551 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
+	ldr	x0, [x26]
 	mov	w21, 122
 	str	w21, [x0, 4104]
-.LVL130:
-.LBE154:
-.LBB155:
-	.loc 1 318 0
+.LVL212:
+.LBE178:
+.LBB179:
+	.loc 1 552 0
 #APP
-// 318 "drivers/misc/rockchip-secure-otp.c" 1
+// 552 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
+	ldr	x0, [x26]
 	mov	w1, 37
 	str	w1, [x0, 4108]
-.LVL131:
-.LBE155:
-.LBB156:
-	.loc 1 319 0
+.LVL213:
+.LBE179:
+.LBB180:
+	.loc 1 553 0
 #APP
-// 319 "drivers/misc/rockchip-secure-otp.c" 1
+// 553 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
-	mov	w1, 4
-	str	w1, [x0, 4112]
-.LVL132:
-.LBE156:
-.LBB157:
-	.loc 1 320 0
+	ldr	x0, [x26]
+	str	wzr, [x0, 4112]
+.LVL214:
+.LBE180:
+.LBB181:
+	.loc 1 554 0
 #APP
-// 320 "drivers/misc/rockchip-secure-otp.c" 1
+// 554 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
+	ldr	x0, [x26]
 	str	wzr, [x0, 4116]
-.LVL133:
-.LBE157:
-.LBB158:
-	.loc 1 321 0
+.LVL215:
+.LBE181:
+.LBB182:
+	.loc 1 555 0
 #APP
-// 321 "drivers/misc/rockchip-secure-otp.c" 1
+// 555 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
+	ldr	x0, [x26]
 	str	wzr, [x0, 4120]
-.LVL134:
-.LBE158:
-.LBB159:
-	.loc 1 322 0
+.LVL216:
+.LBE182:
+.LBB183:
+	.loc 1 556 0
 #APP
-// 322 "drivers/misc/rockchip-secure-otp.c" 1
+// 556 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
-	str	wzr, [x0, 4124]
-.LVL135:
-.LBE159:
-.LBB160:
-	.loc 1 323 0
+	ldr	x0, [x26]
+	mov	w1, 31
+	str	w1, [x0, 4124]
+.LVL217:
+.LBE183:
+.LBB184:
+	.loc 1 557 0
 #APP
-// 323 "drivers/misc/rockchip-secure-otp.c" 1
+// 557 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
+	ldr	x0, [x26]
 	mov	w1, 11
 	str	w1, [x0, 4128]
-.LVL136:
-.LBE160:
-.LBB161:
-	.loc 1 324 0
+.LVL218:
+.LBE184:
+.LBB185:
+	.loc 1 558 0
 #APP
-// 324 "drivers/misc/rockchip-secure-otp.c" 1
+// 558 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
+	ldr	x0, [x26]
 	mov	w1, 8
 	str	w1, [x0, 4132]
-.LVL137:
-.LBE161:
-.LBB162:
-	.loc 1 325 0
+.LVL219:
+.LBE185:
+.LBB186:
+	.loc 1 559 0
 #APP
-// 325 "drivers/misc/rockchip-secure-otp.c" 1
+// 559 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
+	ldr	x0, [x26]
 	str	wzr, [x0, 4136]
-.LVL138:
-.LBE162:
-.LBB163:
-	.loc 1 326 0
+.LVL220:
+.LBE186:
+.LBB187:
+	.loc 1 560 0
 #APP
-// 326 "drivers/misc/rockchip-secure-otp.c" 1
+// 560 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
+	ldr	x0, [x26]
 	str	wzr, [x0, 4140]
-.LVL139:
-.LBE163:
-.LBB164:
-	.loc 1 327 0
+.LVL221:
+.LBE187:
+.LBB188:
+	.loc 1 561 0
 #APP
-// 327 "drivers/misc/rockchip-secure-otp.c" 1
+// 561 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
+	ldr	x0, [x26]
 	str	wzr, [x0, 4144]
-.LBE164:
-.LBB165:
-	.loc 1 328 0
+.LBE188:
+.LBB189:
+	.loc 1 562 0
 	and	w0, w19, 255
 #APP
-// 328 "drivers/misc/rockchip-secure-otp.c" 1
+// 562 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x1, [x28]
+	ldr	x1, [x26]
 	str	w0, [x1, 4148]
-.LBE165:
-.LBB166:
-	.loc 1 329 0
+.LBE189:
+.LBB190:
+	.loc 1 563 0
 	ubfx	x1, x19, 8, 8
-.LVL140:
+.LVL222:
 #APP
-// 329 "drivers/misc/rockchip-secure-otp.c" 1
+// 563 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
+	ldr	x0, [x26]
 	str	w1, [x0, 4152]
-.LVL141:
-.LBE166:
-.LBB167:
-	.loc 1 330 0
+.LVL223:
+.LBE190:
+.LBB191:
+	.loc 1 564 0
 #APP
-// 330 "drivers/misc/rockchip-secure-otp.c" 1
+// 564 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
+	ldr	x0, [x26]
 	mov	w22, 65537
-.LBE167:
-	.loc 1 331 0
+.LBE191:
+	.loc 1 565 0
 	mov	w1, 2
-.LVL142:
-.LBB168:
-	.loc 1 330 0
+.LVL224:
+.LBB192:
+	.loc 1 564 0
 	str	w22, [x0, 32]
-.LVL143:
-.LBE168:
-	.loc 1 331 0
-	mov	x0, x28
-	bl	rockchip_secure_otp_wait_status.isra.1
-.LVL144:
-	mov	w27, w0
-.LVL145:
-	.loc 1 332 0
-	ldr	w2, [x29, 120]
-	tbz	w0, #31, .L42
-	.loc 1 333 0
-	adrp	x0, .LC8
-.LVL146:
+.LVL225:
+.LBE192:
+	.loc 1 565 0
+	mov	x0, x26
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL226:
+	mov	w28, w0
+.LVL227:
+	.loc 1 566 0
+	tbz	w0, #31, .L75
+	.loc 1 567 0
+	adrp	x0, .LC9
+.LVL228:
 	mov	x1, x20
-	add	x0, x0, :lo12:.LC8
-.L61:
-	.loc 1 356 0
+	add	x0, x0, :lo12:.LC9
+.LVL229:
+.L89:
+	.loc 1 656 0
 	bl	printf
-.LVL147:
-.L43:
-.LBB169:
-	.loc 1 424 0
+.LVL230:
+.L76:
+.LBB193:
+	.loc 1 661 0
 #APP
-// 424 "drivers/misc/rockchip-secure-otp.c" 1
+// 661 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
+	ldr	x0, [x26]
 	mov	w1, -65533
-.LBE169:
-	.loc 1 425 0
-	ldr	x5, [x26, 8]
-	mov	w2, w19
-.LBB170:
-	.loc 1 424 0
+.LBE193:
+	.loc 1 662 0
+	ldr	x2, [x26, 16]
+	mov	w3, w19
+	ldr	x6, [x27, 24]
+.LBB194:
+	.loc 1 661 0
 	str	w1, [x0, 772]
-.LBE170:
-	.loc 1 425 0
-	ldp	x0, x1, [x28, 8]
-	blr	x5
-.LVL148:
-.LBE222:
-.LBE226:
-	.loc 1 470 0
-	cbz	w27, .L54
-	b	.L32
-.LVL149:
-.L42:
-.LBB227:
-.LBB223:
-.LBB171:
-	.loc 1 337 0
+.LBE194:
+	.loc 1 662 0
+	ldr	x0, [x26, 8]
+	ldr	x1, [x26, 24]
+	blr	x6
+.LVL231:
+.LBE246:
+.LBE250:
+	.loc 1 703 0
+	cbz	w28, .L84
+	b	.L64
+.LVL232:
+.L75:
+.LBB251:
+.LBB247:
+.LBB195:
+	.loc 1 571 0
 #APP
-// 337 "drivers/misc/rockchip-secure-otp.c" 1
+// 571 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
-.LVL150:
+	ldr	x0, [x26]
+.LVL233:
 	mov	w1, 14848
 	movk	w1, 0xff00, lsl 16
 	str	w1, [x0, 32]
-.LVL151:
-.LBE171:
-.LBB172:
-	.loc 1 338 0
+.LVL234:
+.LBE195:
+.LBB196:
+	.loc 1 572 0
 #APP
-// 338 "drivers/misc/rockchip-secure-otp.c" 1
+// 572 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
-	str	w2, [x0, 4096]
-.LVL152:
-.LBE172:
-.LBB173:
-	.loc 1 339 0
+	ldr	x0, [x26]
+	str	w25, [x0, 4096]
+.LVL235:
+.LBE196:
+.LBB197:
+	.loc 1 573 0
 #APP
-// 339 "drivers/misc/rockchip-secure-otp.c" 1
+// 573 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
-	str	w25, [x0, 4100]
-.LVL153:
-.LBE173:
-.LBB174:
-	.loc 1 340 0
+	ldr	x0, [x26]
+	mov	w1, 1
+	str	w1, [x0, 4100]
+.LVL236:
+.LBE197:
+.LBB198:
+	.loc 1 574 0
 #APP
-// 340 "drivers/misc/rockchip-secure-otp.c" 1
+// 574 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
+	ldr	x0, [x26]
 	str	w21, [x0, 4104]
-.LVL154:
-.LBE174:
-.LBB175:
-	.loc 1 341 0
+.LVL237:
+.LBE198:
+.LBB199:
+	.loc 1 575 0
 #APP
-// 341 "drivers/misc/rockchip-secure-otp.c" 1
+// 575 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
+	ldr	x0, [x26]
 	mov	w1, 21
 	str	w1, [x0, 4108]
-.LVL155:
-.LBE175:
-.LBB176:
-	.loc 1 342 0
+.LVL238:
+.LBE199:
+.LBB200:
+	.loc 1 576 0
 #APP
-// 342 "drivers/misc/rockchip-secure-otp.c" 1
+// 576 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
+	ldr	x0, [x26]
 	mov	w1, 220
 	str	w1, [x0, 4112]
-.LVL156:
-.LBE176:
-.LBB177:
-	.loc 1 343 0
+.LVL239:
+.LBE200:
+.LBB201:
+	.loc 1 577 0
 #APP
-// 343 "drivers/misc/rockchip-secure-otp.c" 1
+// 577 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
+	ldr	x0, [x26]
 	mov	w1, 146
 	str	w1, [x0, 4116]
-.LVL157:
-.LBE177:
-.LBB178:
-	.loc 1 344 0
+.LVL240:
+.LBE201:
+.LBB202:
+	.loc 1 578 0
 #APP
-// 344 "drivers/misc/rockchip-secure-otp.c" 1
+// 578 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
+	ldr	x0, [x26]
 	mov	w1, 121
 	str	w1, [x0, 4120]
-.LVL158:
-.LBE178:
-.LBB179:
-	.loc 1 345 0
+.LVL241:
+.LBE202:
+.LBB203:
+	.loc 1 579 0
 #APP
-// 345 "drivers/misc/rockchip-secure-otp.c" 1
+// 579 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
+	ldr	x0, [x26]
 	mov	w1, 129
 	str	w1, [x0, 4124]
-.LVL159:
-.LBE179:
-.LBB180:
-	.loc 1 346 0
+.LVL242:
+.LBE203:
+.LBB204:
+	.loc 1 580 0
 #APP
-// 346 "drivers/misc/rockchip-secure-otp.c" 1
+// 580 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
+	ldr	x0, [x26]
 	mov	w1, 126
 	str	w1, [x0, 4128]
-.LVL160:
-.LBE180:
-.LBB181:
-	.loc 1 347 0
+.LVL243:
+.LBE204:
+.LBB205:
+	.loc 1 581 0
 #APP
-// 347 "drivers/misc/rockchip-secure-otp.c" 1
+// 581 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
+	ldr	x0, [x26]
 	mov	w1, 33
 	str	w1, [x0, 4132]
-.LVL161:
-.LBE181:
-.LBB182:
-	.loc 1 348 0
+.LVL244:
+.LBE205:
+.LBB206:
+	.loc 1 582 0
 #APP
-// 348 "drivers/misc/rockchip-secure-otp.c" 1
+// 582 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
+	ldr	x0, [x26]
 	mov	w1, 17
 	str	w1, [x0, 4136]
-.LVL162:
-.LBE182:
-.LBB183:
-	.loc 1 349 0
+.LVL245:
+.LBE206:
+.LBB207:
+	.loc 1 583 0
 #APP
-// 349 "drivers/misc/rockchip-secure-otp.c" 1
+// 583 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
+	ldr	x0, [x26]
 	mov	w1, 157
 	str	w1, [x0, 4140]
-.LVL163:
-.LBE183:
-.LBB184:
-	.loc 1 350 0
+.LVL246:
+.LBE207:
+.LBB208:
+	.loc 1 584 0
 #APP
-// 350 "drivers/misc/rockchip-secure-otp.c" 1
+// 584 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
+	ldr	x0, [x26]
 	mov	w21, 2
 	str	w21, [x0, 4144]
-.LVL164:
-.LBE184:
-.LBB185:
-	.loc 1 351 0
+.LVL247:
+.LBE208:
+.LBB209:
+	.loc 1 585 0
 #APP
-// 351 "drivers/misc/rockchip-secure-otp.c" 1
+// 585 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
+	ldr	x0, [x26]
 	str	wzr, [x0, 4148]
-.LVL165:
-.LBE185:
-.LBB186:
-	.loc 1 352 0
+.LVL248:
+.LBE209:
+.LBB210:
+	.loc 1 586 0
 #APP
-// 352 "drivers/misc/rockchip-secure-otp.c" 1
+// 586 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
+	ldr	x0, [x26]
 	str	wzr, [x0, 4152]
-.LVL166:
-.LBE186:
-.LBB187:
-	.loc 1 353 0
+.LVL249:
+.LBE210:
+.LBB211:
+	.loc 1 587 0
 #APP
-// 353 "drivers/misc/rockchip-secure-otp.c" 1
+// 587 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
-.LBE187:
-	.loc 1 354 0
+	ldr	x0, [x26]
+.LBE211:
+	.loc 1 588 0
 	mov	w1, w21
-.LBB188:
-	.loc 1 353 0
+.LBB212:
+	.loc 1 587 0
 	str	w22, [x0, 32]
-.LBE188:
-	.loc 1 354 0
-	mov	x0, x28
-	bl	rockchip_secure_otp_wait_status.isra.1
-.LVL167:
-	mov	w27, w0
-.LVL168:
-	.loc 1 355 0
-	tbz	w0, #31, .L44
-	.loc 1 356 0
-	adrp	x0, .LC9
-.LVL169:
+.LBE212:
+	.loc 1 588 0
+	mov	x0, x26
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL250:
+	mov	w28, w0
+.LVL251:
+	.loc 1 589 0
+	tbz	w0, #31, .L77
+	.loc 1 590 0
+	adrp	x0, .LC10
+.LVL252:
 	mov	x1, x20
-	add	x0, x0, :lo12:.LC9
-	b	.L61
-.LVL170:
-.L44:
-.LBB189:
-	.loc 1 360 0
+	add	x0, x0, :lo12:.LC10
+	b	.L89
+.LVL253:
+.L77:
+.LBB213:
+	.loc 1 594 0
 #APP
-// 360 "drivers/misc/rockchip-secure-otp.c" 1
+// 594 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
-.LVL171:
+	ldr	x0, [x26]
+.LVL254:
 	mov	w1, 512
 	movk	w1, 0xff00, lsl 16
 	str	w1, [x0, 32]
-.LVL172:
-.LBE189:
-.LBB190:
-	.loc 1 361 0
+.LVL255:
+.LBE213:
+.LBB214:
+	.loc 1 595 0
 #APP
-// 361 "drivers/misc/rockchip-secure-otp.c" 1
+// 595 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
-	mov	w1, -65535
-	str	w1, [x0, 36]
-.LVL173:
-.LBE190:
-.LBB191:
-	.loc 1 362 0
+	ldr	x0, [x26]
+	mov	w25, -65535
+	str	w25, [x0, 36]
+.LVL256:
+.LBE214:
+.LBB215:
+	.loc 1 596 0
 #APP
-// 362 "drivers/misc/rockchip-secure-otp.c" 1
+// 596 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
+	ldr	x0, [x26]
 	mov	w1, 251
 	str	w1, [x0, 4096]
-.LVL174:
-.LBE191:
-.LBB192:
-	.loc 1 363 0
+.LVL257:
+.LBE215:
+.LBB216:
+	.loc 1 597 0
 #APP
-// 363 "drivers/misc/rockchip-secure-otp.c" 1
+// 597 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
+	ldr	x0, [x26]
 	str	wzr, [x0, 4100]
-.LVL175:
-.LBE192:
-.LBB193:
-	.loc 1 364 0
+.LVL258:
+.LBE216:
+.LBB217:
+	.loc 1 598 0
 #APP
-// 364 "drivers/misc/rockchip-secure-otp.c" 1
+// 598 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
-.LBE193:
-	.loc 1 365 0
+	ldr	x0, [x26]
+.LBE217:
+	.loc 1 599 0
 	mov	w1, w21
-.LBB194:
-	.loc 1 364 0
+.LBB218:
+	.loc 1 598 0
 	str	w22, [x0, 32]
-.LBE194:
-	.loc 1 365 0
-	mov	x0, x28
-	bl	rockchip_secure_otp_wait_status.isra.1
-.LVL176:
-	mov	w27, w0
-.LVL177:
-	.loc 1 366 0
-	tbz	w0, #31, .L45
-	.loc 1 367 0
-	adrp	x0, .LC10
-.LVL178:
+.LBE218:
+	.loc 1 599 0
+	mov	x0, x26
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL259:
+	mov	w28, w0
+.LVL260:
+	.loc 1 600 0
+	tbz	w0, #31, .L78
+	.loc 1 601 0
+	adrp	x0, .LC11
+.LVL261:
 	mov	x1, x20
-	add	x0, x0, :lo12:.LC10
-	b	.L61
-.LVL179:
-.L45:
-.LBB195:
-	.loc 1 371 0
+	add	x0, x0, :lo12:.LC11
+	b	.L89
+.LVL262:
+.L78:
+.LBB219:
+	.loc 1 605 0
 #APP
-// 371 "drivers/misc/rockchip-secure-otp.c" 1
+// 605 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
-.LVL180:
+	ldr	x0, [x26]
+.LVL263:
+	mov	w1, -65534
+	str	w1, [x0, 36]
+.LVL264:
+.LBE219:
+.LBB220:
+	.loc 1 606 0
+#APP
+// 606 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x26]
 	mov	w1, 192
 	str	w1, [x0, 4096]
-.LVL181:
-.LBE195:
-.LBB196:
-	.loc 1 372 0
+.LBE220:
+.LBB221:
+	.loc 1 607 0
+	and	w1, w23, 255
+.LVL265:
 #APP
-// 372 "drivers/misc/rockchip-secure-otp.c" 1
+// 607 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
-	ldr	w1, [x29, 124]
+	ldr	x0, [x26]
+.LBE221:
+.LBB222:
+	.loc 1 608 0
+	lsr	w23, w23, 8
+.LVL266:
+.LBE222:
+.LBB223:
+	.loc 1 607 0
 	str	w1, [x0, 4100]
-.LVL182:
-.LBE196:
-.LBB197:
-	.loc 1 373 0
+.LBE223:
+.LBB224:
+	.loc 1 608 0
 #APP
-// 373 "drivers/misc/rockchip-secure-otp.c" 1
+// 608 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
-.LBE197:
-	.loc 1 374 0
+	ldr	x0, [x26]
+	str	w23, [x0, 4104]
+.LVL267:
+.LBE224:
+.LBB225:
+	.loc 1 609 0
+#APP
+// 609 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x26]
+.LBE225:
+	.loc 1 610 0
 	mov	w1, w21
-.LBB198:
-	.loc 1 373 0
+.LVL268:
+.LBB226:
+	.loc 1 609 0
 	str	w22, [x0, 32]
-.LBE198:
-	.loc 1 374 0
-	mov	x0, x28
-	bl	rockchip_secure_otp_wait_status.isra.1
-.LVL183:
-	mov	w27, w0
-.LVL184:
-	.loc 1 375 0
-	tbz	w0, #31, .L46
-	.loc 1 376 0
-	adrp	x0, .LC11
-.LVL185:
+.LBE226:
+	.loc 1 610 0
+	mov	x0, x26
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL269:
+	mov	w28, w0
+.LVL270:
+	.loc 1 611 0
+	tbz	w0, #31, .L79
+	.loc 1 612 0
+	adrp	x0, .LC12
+.LVL271:
 	mov	x1, x20
-	add	x0, x0, :lo12:.LC11
-	b	.L61
-.LVL186:
-.L46:
-.LBB199:
-	.loc 1 380 0
+	add	x0, x0, :lo12:.LC12
+	b	.L89
+.LVL272:
+.L79:
+.LBB227:
+	.loc 1 616 0
 #APP
-// 380 "drivers/misc/rockchip-secure-otp.c" 1
+// 616 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
-.LVL187:
+	ldr	x0, [x26]
+.LVL273:
 	mov	w1, 14848
 	movk	w1, 0xff00, lsl 16
 	str	w1, [x0, 32]
-.LVL188:
-.LBE199:
-.LBB200:
-	.loc 1 381 0
+.LVL274:
+.LBE227:
+.LBB228:
+	.loc 1 617 0
+#APP
+// 617 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x26]
+	str	w25, [x0, 36]
+.LVL275:
+.LBE228:
+.LBB229:
+	.loc 1 618 0
 #APP
-// 381 "drivers/misc/rockchip-secure-otp.c" 1
+// 618 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
+	ldr	x0, [x26]
 	mov	w1, 255
 	str	w1, [x0, 4096]
-.LVL189:
-.LBE200:
-.LBB201:
-	.loc 1 382 0
+.LVL276:
+.LBE229:
+.LBB230:
+	.loc 1 619 0
 #APP
-// 382 "drivers/misc/rockchip-secure-otp.c" 1
+// 619 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
+	ldr	x0, [x26]
 	mov	w1, 10
 	str	w1, [x0, 4100]
-.LVL190:
-.LBE201:
-.LBB202:
-	.loc 1 383 0
+.LVL277:
+.LBE230:
+.LBB231:
+	.loc 1 620 0
 #APP
-// 383 "drivers/misc/rockchip-secure-otp.c" 1
+// 620 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
-.LBE202:
-	.loc 1 384 0
+	ldr	x0, [x26]
+.LBE231:
+	.loc 1 621 0
 	mov	w1, w21
-.LBB203:
-	.loc 1 383 0
+.LBB232:
+	.loc 1 620 0
 	str	w22, [x0, 32]
-.LBE203:
-	.loc 1 384 0
-	mov	x0, x28
-	bl	rockchip_secure_otp_wait_status.isra.1
-.LVL191:
-	mov	w27, w0
-.LVL192:
-	.loc 1 385 0
-	tbz	w0, #31, .L47
-	.loc 1 386 0
-	adrp	x0, .LC12
-.LVL193:
+.LBE232:
+	.loc 1 621 0
+	mov	x0, x26
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL278:
+	mov	w28, w0
+.LVL279:
+	.loc 1 622 0
+	tbz	w0, #31, .L80
+	.loc 1 623 0
+	adrp	x0, .LC13
+.LVL280:
 	mov	x1, x20
-	add	x0, x0, :lo12:.LC12
-	b	.L61
-.LVL194:
-.L47:
-.LBB204:
-	.loc 1 390 0
+	add	x0, x0, :lo12:.LC13
+	b	.L89
+.LVL281:
+.L80:
+.LBB233:
+	.loc 1 627 0
 #APP
-// 390 "drivers/misc/rockchip-secure-otp.c" 1
+// 627 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
-.LVL195:
+	ldr	x0, [x26]
+.LVL282:
 	mov	w1, -65534
 	str	w1, [x0, 36]
-.LVL196:
-.LBE204:
-.LBB205:
-	.loc 1 391 0
+.LVL283:
+.LBE233:
+.LBB234:
+	.loc 1 628 0
 #APP
-// 391 "drivers/misc/rockchip-secure-otp.c" 1
+// 628 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
-	str	w25, [x0, 4096]
-.LVL197:
-.LBE205:
-.LBB206:
-	.loc 1 392 0
+	ldr	x0, [x26]
+	mov	w1, 1
+	str	w1, [x0, 4096]
+.LVL284:
+.LBE234:
+.LBB235:
+	.loc 1 629 0
 #APP
-// 392 "drivers/misc/rockchip-secure-otp.c" 1
+// 629 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
-	mov	w1, 191
-	str	w1, [x0, 4100]
-.LVL198:
-.LBE206:
-.LBB207:
-	.loc 1 393 0
+	ldr	x0, [x26]
+	mov	w23, 191
+.LVL285:
+	str	w23, [x0, 4100]
+.LVL286:
+.LBE235:
+.LBB236:
+	.loc 1 630 0
 #APP
-// 393 "drivers/misc/rockchip-secure-otp.c" 1
+// 630 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
+	ldr	x0, [x26]
 	str	wzr, [x0, 4104]
-.LVL199:
-.LBE207:
-.LBB208:
-	.loc 1 394 0
+.LVL287:
+.LBE236:
+.LBB237:
+	.loc 1 631 0
 #APP
-// 394 "drivers/misc/rockchip-secure-otp.c" 1
+// 631 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
-.LBE208:
-	.loc 1 395 0
+	ldr	x0, [x26]
+.LBE237:
+	.loc 1 632 0
 	mov	w1, w21
-.LBB209:
-	.loc 1 394 0
+.LBB238:
+	.loc 1 631 0
 	str	w22, [x0, 32]
-.LBE209:
-	.loc 1 395 0
-	mov	x0, x28
-	bl	rockchip_secure_otp_wait_status.isra.1
-.LVL200:
-	mov	w27, w0
-.LVL201:
-	.loc 1 396 0
-	tbnz	w0, #31, .L48
-	mov	w21, 34465
-	movk	w21, 0x1, lsl 16
-.LVL202:
-.L49:
-.LBB210:
-.LBB211:
-.LBB212:
-	.loc 1 142 0
-	ldr	x0, [x28]
-	ldr	w0, [x0, 44]
-.LVL203:
-#APP
-// 142 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-.LVL204:
-#NO_APP
-.LBE212:
-	.loc 1 143 0
-	and	w27, w0, 16
-	tbz	x0, 4, .L50
-	.loc 1 146 0
-	subs	w21, w21, #1
-.LVL205:
-	beq	.L51
-.LVL206:
-	.loc 1 152 0
-	mov	x0, 1
-.LVL207:
-	bl	udelay
-.LVL208:
-	b	.L49
-.LVL209:
-.L48:
-.LBE211:
-.LBE210:
-	.loc 1 397 0
-	adrp	x0, .LC13
-.LVL210:
-	mov	x1, x20
-	add	x0, x0, :lo12:.LC13
-	b	.L61
-.LVL211:
-.L56:
-	.loc 1 413 0
-	mov	x1, x20
+.LBE238:
+	.loc 1 632 0
+	mov	x0, x26
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL288:
+	mov	w28, w0
+.LVL289:
+	.loc 1 633 0
+	tbz	w0, #31, .L81
+	.loc 1 634 0
 	adrp	x0, .LC14
-.LVL212:
-	mov	w27, w21
+.LVL290:
+	mov	x1, x20
 	add	x0, x0, :lo12:.LC14
-	bl	printf
-.LVL213:
-	b	.L43
-.LVL214:
-.L51:
-	.loc 1 403 0
+	b	.L89
+.LVL291:
+.L81:
+	.loc 1 638 0
+	mov	x0, x26
+.LVL292:
+	bl	rockchip_secure_otp_check_flag.isra.0
+.LVL293:
+	mov	w28, w0
+.LVL294:
+	.loc 1 639 0
+	tbz	w0, #31, .L82
+	.loc 1 640 0
 	adrp	x0, .LC15
+.LVL295:
 	mov	x1, x20
 	add	x0, x0, :lo12:.LC15
-.L60:
-	.loc 1 419 0
-	bl	printf
-.LVL215:
-	mov	w27, -1
-	b	.L43
-.LVL216:
-.L50:
-.LBB213:
-	.loc 1 407 0
-#APP
-// 407 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x28]
-	mov	w1, -65534
-	str	w1, [x0, 36]
-.LVL217:
-.LBE213:
-.LBB214:
-	.loc 1 408 0
+	b	.L89
+.LVL296:
+.L82:
+.LBB239:
+	.loc 1 644 0
 #APP
-// 408 "drivers/misc/rockchip-secure-otp.c" 1
+// 644 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
-	mov	w1, 2
-	str	w1, [x0, 4096]
-.LVL218:
-.LBE214:
-.LBB215:
-	.loc 1 409 0
+	ldr	x0, [x26]
+.LVL297:
+	str	w25, [x0, 36]
+.LVL298:
+.LBE239:
+.LBB240:
+	.loc 1 645 0
 #APP
-// 409 "drivers/misc/rockchip-secure-otp.c" 1
+// 645 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
-	mov	w2, 191
-	str	w2, [x0, 4100]
-.LVL219:
-.LBE215:
-.LBB216:
-	.loc 1 410 0
+	ldr	x0, [x26]
+	str	w21, [x0, 4096]
+.LVL299:
+.LBE240:
+.LBB241:
+	.loc 1 646 0
 #APP
-// 410 "drivers/misc/rockchip-secure-otp.c" 1
+// 646 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x28]
-	mov	w2, 65537
-	str	w2, [x0, 32]
-.LBE216:
-	.loc 1 411 0
-	mov	x0, x28
-	bl	rockchip_secure_otp_wait_status.isra.1
-.LVL220:
-	mov	w21, w0
-.LVL221:
-	.loc 1 412 0
-	tbnz	w0, #31, .L56
-	mov	w21, 20001
-.LVL222:
-.L53:
-.LBB217:
-.LBB218:
-.LBB219:
-	.loc 1 120 0
-	ldr	x0, [x28]
-	ldr	w0, [x0, 44]
-.LVL223:
+	ldr	x0, [x26]
+	str	w23, [x0, 4100]
+.LVL300:
+.LBE241:
+.LBB242:
+	.loc 1 647 0
 #APP
-// 120 "drivers/misc/rockchip-secure-otp.c" 1
+// 647 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
-.LVL224:
 #NO_APP
-.LBE219:
-	.loc 1 121 0
-	tbnz	x0, 4, .L43
-	.loc 1 124 0
-	subs	w21, w21, #1
-.LVL225:
-	beq	.L52
-	.loc 1 129 0
-	mov	x0, 1
-.LVL226:
-	bl	udelay
-.LVL227:
-	b	.L53
-.LVL228:
-.L52:
-.LBE218:
-.LBE217:
-	.loc 1 419 0
+	ldr	x0, [x26]
+.LBE242:
+	.loc 1 648 0
+	mov	w1, w21
+.LBB243:
+	.loc 1 647 0
+	str	w22, [x0, 32]
+.LBE243:
+	.loc 1 648 0
+	mov	x0, x26
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL301:
+	mov	w28, w0
+.LVL302:
+	.loc 1 649 0
+	tbz	w0, #31, .L83
+	.loc 1 650 0
 	adrp	x0, .LC16
+.LVL303:
 	mov	x1, x20
 	add	x0, x0, :lo12:.LC16
-	b	.L60
-.LBE223:
-.LBE227:
+	b	.L89
+.LVL304:
+.L83:
+	.loc 1 654 0
+	mov	x0, x26
+.LVL305:
+	bl	rockchip_secure_otp_wait_flag.isra.1
+.LVL306:
+	mov	w28, w0
+.LVL307:
+	.loc 1 655 0
+	tbz	w0, #31, .L76
+	.loc 1 656 0
+	adrp	x0, .LC17
+.LVL308:
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC17
+	b	.L89
+.LBE247:
+.LBE251:
 	.cfi_endproc
-.LFE277:
-	.size	rockchip_secure_otp_write, .-rockchip_secure_otp_write
-	.global	_u_boot_list_2_driver_2_rockchip_secure_otp
-	.section	.rodata.__func__.7407,"a",@progbits
-	.align	3
-	.set	.LANCHOR0,. + 0
-	.type	__func__.7407, %object
-	.size	__func__.7407, 32
-__func__.7407:
-	.string	"rockchip_secure_otp_wait_status"
-	.section	.rodata.__func__.7450,"a",@progbits
-	.align	3
-	.set	.LANCHOR1,. + 0
-	.type	__func__.7450, %object
-	.size	__func__.7450, 31
-__func__.7450:
-	.string	"rockchip_secure_otp_ecc_enable"
-	.section	.rodata.__func__.7470,"a",@progbits
-	.align	3
-	.set	.LANCHOR2,. + 0
-	.type	__func__.7470, %object
-	.size	__func__.7470, 25
-__func__.7470:
-	.string	"rockchip_secure_otp_read"
-	.section	.rodata.__func__.7529,"a",@progbits
-	.align	3
-	.set	.LANCHOR3,. + 0
-	.type	__func__.7529, %object
-	.size	__func__.7529, 31
-__func__.7529:
-	.string	"rockchip_secure_otp_write_byte"
-	.section	.rodata.px30_data,"a",@progbits
-	.align	3
-	.type	px30_data, %object
-	.size	px30_data, 16
-px30_data:
-	.xword	px30_spl_rockchip_otp_start
-	.xword	px30_spl_rockchip_otp_stop
-	.section	.rodata.rk3308_data,"a",@progbits
-	.align	3
-	.type	rk3308_data, %object
-	.size	rk3308_data, 16
-rk3308_data:
-	.xword	rk3308_spl_rockchip_otp_start
-	.xword	rk3308_spl_rockchip_otp_stop
-	.section	.rodata.rk3328_data,"a",@progbits
-	.align	3
-	.type	rk3328_data, %object
-	.size	rk3328_data, 16
-rk3328_data:
-	.xword	rk3328_spl_rockchip_otp_start
-	.xword	rk3328_spl_rockchip_otp_stop
-	.section	.rodata.rockchip_otp_ids,"a",@progbits
-	.align	3
-	.type	rockchip_otp_ids, %object
-	.size	rockchip_otp_ids, 80
-rockchip_otp_ids:
-	.xword	.LC18
-	.xword	rk3308_data
-	.xword	.LC19
-	.xword	rk3328_data
-	.xword	.LC20
-	.xword	px30_data
-	.xword	.LC21
-	.xword	px30_data
-	.zero	16
-	.section	.rodata.rockchip_secure_otp_ofdata_to_platdata.str1.1,"aMS",@progbits,1
-.LC0:
-	.string	"secure_conf"
-.LC1:
-	.string	"mask_addr"
-	.section	.rodata.rockchip_secure_otp_ops,"a",@progbits
-	.align	3
-	.type	rockchip_secure_otp_ops, %object
-	.size	rockchip_secure_otp_ops, 32
-rockchip_secure_otp_ops:
-	.xword	rockchip_secure_otp_read
-	.xword	rockchip_secure_otp_write
-	.xword	rockchip_secure_otp_ioctl
-	.zero	8
-	.section	.rodata.rockchip_secure_otp_read.str1.1,"aMS",@progbits,1
-.LC3:
-	.string	"%s timeout during ecc_enable\n"
-.LC4:
-	.string	"Please input correct addr\n"
-.LC5:
-	.string	"%s timeout during read setup\n"
-.LC6:
-	.string	"OTP ecc check error!\n"
-	.section	.rodata.rockchip_secure_otp_wait_status.isra.1.str1.1,"aMS",@progbits,1
-.LC2:
-	.string	"%s: wait init status timeout\n"
-	.section	.rodata.rockchip_secure_otp_write.str1.1,"aMS",@progbits,1
-.LC7:
-	.string	"The zone is written.\n"
-.LC8:
-	.string	"%s timeout during write setup 1\n"
-.LC9:
-	.string	"%s timeout during write setup 2\n"
-.LC10:
-	.string	"%s timeout during write setup 3\n"
-.LC11:
-	.string	"%s timeout during write setup 4\n"
-.LC12:
-	.string	"%s timeout during write setup 5\n"
-.LC13:
-	.string	"%s timeout during write setup 6\n"
-.LC14:
-	.string	"%s timeout during write setup 8\n"
-.LC15:
-	.string	"%s timeout during write setup 7\n"
-.LC16:
-	.string	"%s timeout during write setup 9\n"
-	.section	.rodata.str1.1,"aMS",@progbits,1
-.LC17:
-	.string	"rockchip_secure_otp"
-.LC18:
-	.string	"rockchip,rk3308-secure-otp"
-.LC19:
-	.string	"rockchip,rk3328-secure-otp"
-.LC20:
-	.string	"rockchip,rk3326-secure-otp"
-.LC21:
-	.string	"rockchip,px30-secure-otp"
-	.section	.u_boot_list_2_driver_2_rockchip_secure_otp,"aw",@progbits
+.LFE281:
+	.size	rk3568_secure_otp_write, .-rk3568_secure_otp_write
+	.section	.text.rockchip_secure_otp_write,"ax",@progbits
 	.align	2
-	.type	_u_boot_list_2_driver_2_rockchip_secure_otp, %object
-	.size	_u_boot_list_2_driver_2_rockchip_secure_otp, 120
-_u_boot_list_2_driver_2_rockchip_secure_otp:
-	.8byte	.LC17
-	.word	36
-	.zero	4
-	.8byte	rockchip_otp_ids
-	.zero	32
-	.8byte	rockchip_secure_otp_ofdata_to_platdata
-	.zero	28
-	.word	24
-	.zero	8
-	.8byte	rockchip_secure_otp_ops
-	.zero	8
-	.text
-.Letext0:
-	.file 2 "include/common.h"
-	.file 3 "./arch/arm/include/asm/types.h"
-	.file 4 "include/linux/types.h"
-	.file 5 "include/errno.h"
-	.file 6 "include/linux/string.h"
-	.file 7 "include/efi.h"
-	.file 8 "include/dm/device.h"
-	.file 9 "include/ide.h"
-	.file 10 "include/linux/list.h"
-	.file 11 "include/part.h"
-	.file 12 "include/flash.h"
-	.file 13 "include/lmb.h"
-	.file 14 "include/asm-generic/u-boot.h"
-	.file 15 "./arch/arm/include/asm/u-boot-arm.h"
-	.file 16 "include/linux/libfdt_env.h"
-	.file 17 "include/linux/../../scripts/dtc/libfdt/fdt.h"
-	.file 18 "include/linux/libfdt.h"
-	.file 19 "include/image.h"
-	.file 20 "./arch/arm/include/asm/global_data.h"
-	.file 21 "include/asm-generic/global_data.h"
-	.file 22 "include/dm/of.h"
-	.file 23 "include/net.h"
-	.file 24 "include/dm/uclass-id.h"
-	.file 25 "include/dm/ofnode.h"
-	.file 26 "include/malloc.h"
-	.file 27 "include/linux/compat.h"
-	.file 28 "include/dm/uclass.h"
-	.file 29 "include/asm-generic/ioctl.h"
-	.file 30 "include/misc.h"
-	.file 31 "include/rockchip-otp.h"
-	.file 32 "include/dm/read.h"
-	.file 33 "include/linux/delay.h"
-	.file 34 "include/stdio.h"
-	.file 35 "include/log.h"
-	.section	.debug_info,"",@progbits
-.Ldebug_info0:
-	.4byte	0x33c8
-	.2byte	0x4
-	.4byte	.Ldebug_abbrev0
-	.byte	0x8
-	.uleb128 0x1
-	.4byte	.LASF456
-	.byte	0xc
-	.4byte	.LASF457
-	.4byte	.LASF458
-	.4byte	.Ldebug_ranges0+0x210
-	.8byte	0
-	.4byte	.Ldebug_line0
-	.uleb128 0x2
-	.4byte	.LASF4
-	.byte	0x2
-	.byte	0xd
-	.4byte	0x34
-	.uleb128 0x3
-	.byte	0x1
-	.byte	0x8
-	.4byte	.LASF0
-	.uleb128 0x3
-	.byte	0x8
-	.byte	0x7
-	.4byte	.LASF1
-	.uleb128 0x3
-	.byte	0x2
-	.byte	0x7
-	.4byte	.LASF2
-	.uleb128 0x4
-	.4byte	.LASF21
-	.byte	0x5
-	.byte	0xc
-	.4byte	0x54
-	.uleb128 0x5
-	.byte	0x4
-	.byte	0x5
-	.string	"int"
-	.uleb128 0x3
-	.byte	0x1
-	.byte	0x6
-	.4byte	.LASF3
-	.uleb128 0x2
-	.4byte	.LASF5
-	.byte	0x3
-	.byte	0xc
-	.4byte	0x34
-	.uleb128 0x3
-	.byte	0x2
-	.byte	0x5
-	.4byte	.LASF6
-	.uleb128 0x2
-	.4byte	.LASF7
-	.byte	0x3
-	.byte	0x12
-	.4byte	0x7f
-	.uleb128 0x3
-	.byte	0x4
-	.byte	0x7
-	.4byte	.LASF8
-	.uleb128 0x3
-	.byte	0x8
-	.byte	0x5
-	.4byte	.LASF9
-	.uleb128 0x3
-	.byte	0x8
-	.byte	0x7
-	.4byte	.LASF10
-	.uleb128 0x6
-	.string	"u8"
-	.byte	0x3
-	.byte	0x1f
-	.4byte	0x34
-	.uleb128 0x7
-	.4byte	0x94
-	.uleb128 0x6
-	.string	"u32"
-	.byte	0x3
-	.byte	0x25
-	.4byte	0x7f
-	.uleb128 0x6
-	.string	"u64"
-	.byte	0x3
-	.byte	0x28
-	.4byte	0x8d
-	.uleb128 0x2
-	.4byte	.LASF11
-	.byte	0x3
-	.byte	0x31
-	.4byte	0x8d
-	.uleb128 0x2
-	.4byte	.LASF12
-	.byte	0x3
-	.byte	0x32
-	.4byte	0x8d
-	.uleb128 0x3
-	.byte	0x8
-	.byte	0x7
-	.4byte	.LASF13
-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0xe3
-	.uleb128 0x3
-	.byte	0x1
-	.byte	0x8
-	.4byte	.LASF14
-	.uleb128 0x7
-	.4byte	0xdc
-	.uleb128 0x3
-	.byte	0x8
-	.byte	0x5
-	.4byte	.LASF15
-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0xdc
-	.uleb128 0x2
-	.4byte	.LASF16
-	.byte	0x4
+	.type	rockchip_secure_otp_write, %function
+rockchip_secure_otp_write:
+.LFB278:
+	.loc 1 428 0
+	.cfi_startproc
+.LVL309:
+	stp	x29, x30, [sp, -128]!
+	.cfi_def_cfa_offset 128
+	.cfi_offset 29, -128
+	.cfi_offset 30, -120
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -112
+	.cfi_offset 20, -104
+	mov	w19, w1
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -80
+	.cfi_offset 24, -72
+	mov	w24, w3
+	stp	x27, x28, [sp, 80]
+	stp	x21, x22, [sp, 32]
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 27, -48
+	.cfi_offset 28, -40
+	.cfi_offset 21, -96
+	.cfi_offset 22, -88
+	.cfi_offset 25, -64
+	.cfi_offset 26, -56
+	.loc 1 428 0
+	stp	x2, x0, [x29, 104]
+	.loc 1 429 0
+	bl	dev_get_platdata
+.LVL310:
+	mov	x27, x0
+.LVL311:
+	.loc 1 431 0
+	sxtw	x0, w24
+.LVL312:
+	bl	malloc_simple
+.LVL313:
+	.loc 1 434 0
+	cbnz	x0, .L93
+.LVL314:
+.L117:
+.LBB313:
+.LBB314:
+	.loc 1 295 0
+	mov	w26, -1
+.L92:
+.LBE314:
+.LBE313:
+	.loc 1 461 0
+	mov	w0, w26
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+.LVL315:
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+.LVL316:
+	ldp	x29, x30, [sp], 128
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+.LVL317:
+	ret
+.LVL318:
+.L93:
+	.cfi_restore_state
+	mov	x20, x0
+	.loc 1 437 0
+	mov	x2, x0
+	ldr	x0, [x29, 112]
+.LVL319:
+	mov	w3, w24
+	mov	w1, w19
+	bl	rockchip_secure_otp_read
+.LVL320:
+	.loc 1 438 0
+	cbnz	w0, .L117
+	mov	x0, 0
+.LVL321:
+.L97:
+	.loc 1 443 0 discriminator 1
+	cmp	w24, w0
+	bgt	.L98
+.LBB386:
+.LBB382:
+	.loc 1 413 0
+	adrp	x20, .LANCHOR5
+.LVL322:
+	add	x20, x20, :lo12:.LANCHOR5
+.LBE382:
+.LBE386:
+	.loc 1 443 0
+	mov	x23, 0
+.LVL323:
+.L99:
+	.loc 1 453 0 discriminator 1
+	cmp	w24, w23
+	bgt	.L112
+	mov	w26, 0
+	b	.L92
+.LVL324:
+.L98:
+	add	x0, x0, 1
+.LVL325:
+	.loc 1 444 0
+	add	x1, x20, x0
+	ldrb	w1, [x1, -1]
+	cbz	w1, .L97
+	.loc 1 445 0
+	adrp	x0, .LC8
+	add	x0, x0, :lo12:.LC8
+.LVL326:
+.L118:
+.LBB387:
+.LBB383:
+	.loc 1 295 0
+	bl	printf
+.LVL327:
+	b	.L117
+.LVL328:
+.L112:
+.LBE383:
+.LBE387:
+	.loc 1 454 0
+	ldr	x0, [x29, 104]
+	ldrb	w28, [x0, x23]
+.LVL329:
+.LBB388:
+.LBB384:
+	.loc 1 285 0
+	ldr	x0, [x29, 112]
+	bl	dev_get_driver_data
+.LVL330:
+	str	x0, [x29, 120]
+.LVL331:
+	.loc 1 288 0
+	cmp	w19, 448
+	bgt	.L117
+	.loc 1 292 0
+	sub	w0, w19, #16
+.LVL332:
+	cmp	w19, 0
+	ccmp	w0, 31, 0, ne
+	bls	.L100
+	sub	w0, w19, #128
+	cmp	w0, 263
+	bls	.L100
+	.loc 1 295 0
+	adrp	x0, .LC5
+	add	x0, x0, :lo12:.LC5
+	b	.L118
+.L100:
+	.loc 1 299 0
+	cbnz	w28, .L101
+.LVL333:
+.L111:
+	add	x23, x23, 1
+	add	w19, w19, 1
+	b	.L99
+.LVL334:
+.L101:
+	.loc 1 302 0
+	ldr	x0, [x29, 120]
+	mov	w3, w19
+	ldp	x2, x1, [x27, 16]
+	ldr	x5, [x0, 16]
+	ldr	x0, [x27, 8]
+	blr	x5
+.LVL335:
+.LBB315:
+	.loc 1 305 0
+#APP
+// 305 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 262148
+	str	w1, [x0, 32]
+.LVL336:
+.LBE315:
+.LBB316:
+	.loc 1 306 0
+#APP
+// 306 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, -65536
+	str	w1, [x0, 40]
+.LVL337:
+.LBE316:
+.LBB317:
+	.loc 1 307 0
+#APP
+// 307 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 512
+	movk	w1, 0xff00, lsl 16
+	str	w1, [x0, 32]
+.LVL338:
+.LBE317:
+.LBB318:
+	.loc 1 308 0
+#APP
+// 308 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, -65522
+	str	w1, [x0, 36]
+.LVL339:
+.LBE318:
+.LBB319:
+	.loc 1 309 0
+#APP
+// 309 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w2, 240
+	str	w2, [x29, 100]
+.LVL340:
+	str	w2, [x0, 4096]
+.LBE319:
+.LBB320:
+	.loc 1 310 0
+#APP
+// 310 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w25, 1
+	str	w25, [x0, 4100]
+.LVL341:
+.LBE320:
+.LBB321:
+	.loc 1 311 0
+#APP
+// 311 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w21, 122
+	str	w21, [x0, 4104]
+.LVL342:
+.LBE321:
+.LBB322:
+	.loc 1 312 0
+#APP
+// 312 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 37
+	str	w1, [x0, 4108]
+.LVL343:
+.LBE322:
+.LBB323:
+	.loc 1 313 0
+#APP
+// 313 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 4
+	str	w1, [x0, 4112]
+.LVL344:
+.LBE323:
+.LBB324:
+	.loc 1 314 0
+#APP
+// 314 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	wzr, [x0, 4116]
+.LVL345:
+.LBE324:
+.LBB325:
+	.loc 1 315 0
+#APP
+// 315 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	wzr, [x0, 4120]
+.LVL346:
+.LBE325:
+.LBB326:
+	.loc 1 316 0
+#APP
+// 316 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	wzr, [x0, 4124]
+.LVL347:
+.LBE326:
+.LBB327:
+	.loc 1 317 0
+#APP
+// 317 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 11
+	str	w1, [x0, 4128]
+.LVL348:
+.LBE327:
+.LBB328:
+	.loc 1 318 0
+#APP
+// 318 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 8
+	str	w1, [x0, 4132]
+.LVL349:
+.LBE328:
+.LBB329:
+	.loc 1 319 0
+#APP
+// 319 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	wzr, [x0, 4136]
+.LVL350:
+.LBE329:
+.LBB330:
+	.loc 1 320 0
+#APP
+// 320 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	wzr, [x0, 4140]
+.LVL351:
+.LBE330:
+.LBB331:
+	.loc 1 321 0
+#APP
+// 321 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	wzr, [x0, 4144]
+.LBE331:
+.LBB332:
+	.loc 1 322 0
+	and	w0, w19, 255
+#APP
+// 322 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x1, [x27]
+	str	w0, [x1, 4148]
+.LBE332:
+.LBB333:
+	.loc 1 323 0
+	ubfx	x1, x19, 8, 8
+.LVL352:
+#APP
+// 323 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	w1, [x0, 4152]
+.LVL353:
+.LBE333:
+.LBB334:
+	.loc 1 324 0
+#APP
+// 324 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w22, 65537
+.LBE334:
+	.loc 1 325 0
+	mov	w1, 2
+.LVL354:
+.LBB335:
+	.loc 1 324 0
+	str	w22, [x0, 32]
+.LVL355:
+.LBE335:
+	.loc 1 325 0
+	mov	x0, x27
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL356:
+	mov	w26, w0
+.LVL357:
+	.loc 1 326 0
+	ldr	w2, [x29, 100]
+	tbz	w0, #31, .L102
+	.loc 1 327 0
+	adrp	x0, .LC9
+.LVL358:
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC9
+.LVL359:
+.L116:
+	.loc 1 413 0
+	bl	printf
+.LVL360:
+.L103:
+.LBB336:
+	.loc 1 418 0
+#APP
+// 418 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, -65533
+.LBE336:
+	.loc 1 419 0
+	ldr	x2, [x27, 16]
+	mov	w3, w19
+.LBB337:
+	.loc 1 418 0
+	str	w1, [x0, 772]
+.LBE337:
+	.loc 1 419 0
+	ldr	x0, [x29, 120]
+	ldr	x1, [x27, 24]
+	ldr	x6, [x0, 24]
+	ldr	x0, [x27, 8]
+	blr	x6
+.LVL361:
+.LBE384:
+.LBE388:
+	.loc 1 455 0
+	cbz	w26, .L111
+	b	.L92
+.LVL362:
+.L102:
+.LBB389:
+.LBB385:
+.LBB338:
+	.loc 1 331 0
+#APP
+// 331 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LVL363:
+	mov	w1, 14848
+	movk	w1, 0xff00, lsl 16
+	str	w1, [x0, 32]
+.LVL364:
+.LBE338:
+.LBB339:
+	.loc 1 332 0
+#APP
+// 332 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	w2, [x0, 4096]
+.LVL365:
+.LBE339:
+.LBB340:
+	.loc 1 333 0
+#APP
+// 333 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	w25, [x0, 4100]
+.LVL366:
+.LBE340:
+.LBB341:
+	.loc 1 334 0
+#APP
+// 334 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	w21, [x0, 4104]
+.LVL367:
+.LBE341:
+.LBB342:
+	.loc 1 335 0
+#APP
+// 335 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 21
+	str	w1, [x0, 4108]
+.LVL368:
+.LBE342:
+.LBB343:
+	.loc 1 336 0
+#APP
+// 336 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 220
+	str	w1, [x0, 4112]
+.LVL369:
+.LBE343:
+.LBB344:
+	.loc 1 337 0
+#APP
+// 337 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 146
+	str	w1, [x0, 4116]
+.LVL370:
+.LBE344:
+.LBB345:
+	.loc 1 338 0
+#APP
+// 338 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 121
+	str	w1, [x0, 4120]
+.LVL371:
+.LBE345:
+.LBB346:
+	.loc 1 339 0
+#APP
+// 339 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 129
+	str	w1, [x0, 4124]
+.LVL372:
+.LBE346:
+.LBB347:
+	.loc 1 340 0
+#APP
+// 340 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 126
+	str	w1, [x0, 4128]
+.LVL373:
+.LBE347:
+.LBB348:
+	.loc 1 341 0
+#APP
+// 341 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 33
+	str	w1, [x0, 4132]
+.LVL374:
+.LBE348:
+.LBB349:
+	.loc 1 342 0
+#APP
+// 342 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 17
+	str	w1, [x0, 4136]
+.LVL375:
+.LBE349:
+.LBB350:
+	.loc 1 343 0
+#APP
+// 343 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 157
+	str	w1, [x0, 4140]
+.LVL376:
+.LBE350:
+.LBB351:
+	.loc 1 344 0
+#APP
+// 344 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w21, 2
+	str	w21, [x0, 4144]
+.LVL377:
+.LBE351:
+.LBB352:
+	.loc 1 345 0
+#APP
+// 345 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	wzr, [x0, 4148]
+.LVL378:
+.LBE352:
+.LBB353:
+	.loc 1 346 0
+#APP
+// 346 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	wzr, [x0, 4152]
+.LVL379:
+.LBE353:
+.LBB354:
+	.loc 1 347 0
+#APP
+// 347 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LBE354:
+	.loc 1 348 0
+	mov	w1, w21
+.LBB355:
+	.loc 1 347 0
+	str	w22, [x0, 32]
+.LBE355:
+	.loc 1 348 0
+	mov	x0, x27
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL380:
+	mov	w26, w0
+.LVL381:
+	.loc 1 349 0
+	tbz	w0, #31, .L104
+	.loc 1 350 0
+	adrp	x0, .LC10
+.LVL382:
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC10
+	b	.L116
+.LVL383:
+.L104:
+.LBB356:
+	.loc 1 354 0
+#APP
+// 354 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LVL384:
+	mov	w1, 512
+	movk	w1, 0xff00, lsl 16
+	str	w1, [x0, 32]
+.LVL385:
+.LBE356:
+.LBB357:
+	.loc 1 355 0
+#APP
+// 355 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, -65535
+	str	w1, [x0, 36]
+.LVL386:
+.LBE357:
+.LBB358:
+	.loc 1 356 0
+#APP
+// 356 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 251
+	str	w1, [x0, 4096]
+.LVL387:
+.LBE358:
+.LBB359:
+	.loc 1 357 0
+#APP
+// 357 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	wzr, [x0, 4100]
+.LVL388:
+.LBE359:
+.LBB360:
+	.loc 1 358 0
+#APP
+// 358 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LBE360:
+	.loc 1 359 0
+	mov	w1, w21
+.LBB361:
+	.loc 1 358 0
+	str	w22, [x0, 32]
+.LBE361:
+	.loc 1 359 0
+	mov	x0, x27
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL389:
+	mov	w26, w0
+.LVL390:
+	.loc 1 360 0
+	tbz	w0, #31, .L105
+	.loc 1 361 0
+	adrp	x0, .LC11
+.LVL391:
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC11
+	b	.L116
+.LVL392:
+.L105:
+.LBB362:
+	.loc 1 365 0
+#APP
+// 365 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LVL393:
+	mov	w1, 192
+	str	w1, [x0, 4096]
+.LVL394:
+.LBE362:
+.LBB363:
+	.loc 1 366 0
+#APP
+// 366 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	w28, [x0, 4100]
+.LVL395:
+.LBE363:
+.LBB364:
+	.loc 1 367 0
+#APP
+// 367 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LBE364:
+	.loc 1 368 0
+	mov	w1, w21
+.LBB365:
+	.loc 1 367 0
+	str	w22, [x0, 32]
+.LBE365:
+	.loc 1 368 0
+	mov	x0, x27
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL396:
+	mov	w26, w0
+.LVL397:
+	.loc 1 369 0
+	tbz	w0, #31, .L106
+	.loc 1 370 0
+	adrp	x0, .LC12
+.LVL398:
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC12
+	b	.L116
+.LVL399:
+.L106:
+.LBB366:
+	.loc 1 374 0
+#APP
+// 374 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LVL400:
+	mov	w1, 14848
+	movk	w1, 0xff00, lsl 16
+	str	w1, [x0, 32]
+.LVL401:
+.LBE366:
+.LBB367:
+	.loc 1 375 0
+#APP
+// 375 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 255
+	str	w1, [x0, 4096]
+.LVL402:
+.LBE367:
+.LBB368:
+	.loc 1 376 0
+#APP
+// 376 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 10
+	str	w1, [x0, 4100]
+.LVL403:
+.LBE368:
+.LBB369:
+	.loc 1 377 0
+#APP
+// 377 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LBE369:
+	.loc 1 378 0
+	mov	w1, w21
+.LBB370:
+	.loc 1 377 0
+	str	w22, [x0, 32]
+.LBE370:
+	.loc 1 378 0
+	mov	x0, x27
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL404:
+	mov	w26, w0
+.LVL405:
+	.loc 1 379 0
+	tbz	w0, #31, .L107
+	.loc 1 380 0
+	adrp	x0, .LC13
+.LVL406:
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC13
+	b	.L116
+.LVL407:
+.L107:
+.LBB371:
+	.loc 1 384 0
+#APP
+// 384 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LVL408:
+	mov	w28, -65534
+.LVL409:
+	str	w28, [x0, 36]
+.LVL410:
+.LBE371:
+.LBB372:
+	.loc 1 385 0
+#APP
+// 385 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	w25, [x0, 4096]
+.LVL411:
+.LBE372:
+.LBB373:
+	.loc 1 386 0
+#APP
+// 386 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w25, 191
+	str	w25, [x0, 4100]
+.LVL412:
+.LBE373:
+.LBB374:
+	.loc 1 387 0
+#APP
+// 387 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	wzr, [x0, 4104]
+.LVL413:
+.LBE374:
+.LBB375:
+	.loc 1 388 0
+#APP
+// 388 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LBE375:
+	.loc 1 389 0
+	mov	w1, w21
+.LBB376:
+	.loc 1 388 0
+	str	w22, [x0, 32]
+.LBE376:
+	.loc 1 389 0
+	mov	x0, x27
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL414:
+	mov	w26, w0
+.LVL415:
+	.loc 1 390 0
+	tbz	w0, #31, .L108
+	.loc 1 391 0
+	adrp	x0, .LC14
+.LVL416:
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC14
+	b	.L116
+.LVL417:
+.L108:
+	.loc 1 395 0
+	mov	x0, x27
+.LVL418:
+	bl	rockchip_secure_otp_check_flag.isra.0
+.LVL419:
+	mov	w26, w0
+.LVL420:
+	.loc 1 396 0
+	tbz	w0, #31, .L109
+	.loc 1 397 0
+	adrp	x0, .LC15
+.LVL421:
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC15
+	b	.L116
+.LVL422:
+.L109:
+.LBB377:
+	.loc 1 401 0
+#APP
+// 401 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LVL423:
+	str	w28, [x0, 36]
+.LVL424:
+.LBE377:
+.LBB378:
+	.loc 1 402 0
+#APP
+// 402 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	w21, [x0, 4096]
+.LVL425:
+.LBE378:
+.LBB379:
+	.loc 1 403 0
+#APP
+// 403 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	w25, [x0, 4100]
+.LVL426:
+.LBE379:
+.LBB380:
+	.loc 1 404 0
+#APP
+// 404 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LBE380:
+	.loc 1 405 0
+	mov	w1, w21
+.LBB381:
+	.loc 1 404 0
+	str	w22, [x0, 32]
+.LBE381:
+	.loc 1 405 0
+	mov	x0, x27
+	bl	rockchip_secure_otp_wait_status.isra.2
+.LVL427:
+	mov	w26, w0
+.LVL428:
+	.loc 1 406 0
+	tbz	w0, #31, .L110
+	.loc 1 407 0
+	adrp	x0, .LC16
+.LVL429:
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC16
+	b	.L116
+.LVL430:
+.L110:
+	.loc 1 411 0
+	mov	x0, x27
+.LVL431:
+	bl	rockchip_secure_otp_wait_flag.isra.1
+.LVL432:
+	mov	w26, w0
+.LVL433:
+	.loc 1 412 0
+	tbz	w0, #31, .L103
+	.loc 1 413 0
+	adrp	x0, .LC17
+.LVL434:
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC17
+	b	.L116
+.LBE385:
+.LBE389:
+	.cfi_endproc
+.LFE278:
+	.size	rockchip_secure_otp_write, .-rockchip_secure_otp_write
+	.global	_u_boot_list_2_driver_2_rockchip_secure_otp
+	.section	.rodata.__func__.7452,"a",@progbits
+	.align	3
+	.set	.LANCHOR0,. + 0
+	.type	__func__.7452, %object
+	.size	__func__.7452, 32
+__func__.7452:
+	.string	"rockchip_secure_otp_wait_status"
+	.section	.rodata.__func__.7495,"a",@progbits
+	.align	3
+	.set	.LANCHOR1,. + 0
+	.type	__func__.7495, %object
+	.size	__func__.7495, 31
+__func__.7495:
+	.string	"rockchip_secure_otp_ecc_enable"
+	.section	.rodata.__func__.7513,"a",@progbits
+	.align	3
+	.set	.LANCHOR3,. + 0
+	.type	__func__.7513, %object
+	.size	__func__.7513, 25
+__func__.7513:
+	.string	"rockchip_secure_otp_read"
+	.section	.rodata.__func__.7570,"a",@progbits
+	.align	3
+	.set	.LANCHOR5,. + 0
+	.type	__func__.7570, %object
+	.size	__func__.7570, 31
+__func__.7570:
+	.string	"rockchip_secure_otp_write_byte"
+	.section	.rodata.__func__.7684,"a",@progbits
+	.align	3
+	.set	.LANCHOR2,. + 0
+	.type	__func__.7684, %object
+	.size	__func__.7684, 23
+__func__.7684:
+	.string	"rk3568_secure_otp_read"
+	.section	.rodata.__func__.7743,"a",@progbits
+	.align	3
+	.set	.LANCHOR4,. + 0
+	.type	__func__.7743, %object
+	.size	__func__.7743, 32
+__func__.7743:
+	.string	"rk3568_secure_otp_write_2_bytes"
+	.section	.rodata.px30_data,"a",@progbits
+	.align	3
+	.type	px30_data, %object
+	.size	px30_data, 32
+px30_data:
+	.xword	rockchip_secure_otp_read
+	.xword	rockchip_secure_otp_write
+	.xword	px30_spl_rockchip_otp_start
+	.xword	px30_spl_rockchip_otp_stop
+	.section	.rodata.rk3308_data,"a",@progbits
+	.align	3
+	.type	rk3308_data, %object
+	.size	rk3308_data, 32
+rk3308_data:
+	.xword	rockchip_secure_otp_read
+	.xword	rockchip_secure_otp_write
+	.xword	rk3308_spl_rockchip_otp_start
+	.xword	rk3308_spl_rockchip_otp_stop
+	.section	.rodata.rk3328_data,"a",@progbits
+	.align	3
+	.type	rk3328_data, %object
+	.size	rk3328_data, 32
+rk3328_data:
+	.xword	rockchip_secure_otp_read
+	.xword	rockchip_secure_otp_write
+	.xword	rk3328_spl_rockchip_otp_start
+	.xword	rk3328_spl_rockchip_otp_stop
+	.section	.rodata.rk3568_data,"a",@progbits
+	.align	3
+	.type	rk3568_data, %object
+	.size	rk3568_data, 32
+rk3568_data:
+	.xword	rk3568_secure_otp_read
+	.xword	rk3568_secure_otp_write
+	.xword	rk3568_spl_rockchip_otp_start
+	.xword	rk3568_spl_rockchip_otp_stop
+	.section	.rodata.rk3568_secure_otp_read.str1.1,"aMS",@progbits,1
+.LC5:
+	.string	"Please input correct addr\n"
+.LC6:
+	.string	"%s timeout during read setup\n"
+	.section	.rodata.rk3568_secure_otp_write.str1.1,"aMS",@progbits,1
+.LC7:
+	.string	"Please enter the size of multiple of 2\n"
+.LC8:
+	.string	"The zone is written.\n"
+.LC9:
+	.string	"%s timeout during write setup 1\n"
+.LC10:
+	.string	"%s timeout during write setup 2\n"
+.LC11:
+	.string	"%s timeout during write setup 3\n"
+.LC12:
+	.string	"%s timeout during write setup 4\n"
+.LC13:
+	.string	"%s timeout during write setup 5\n"
+.LC14:
+	.string	"%s timeout during write setup 6\n"
+.LC15:
+	.string	"%s timeout during write setup 7\n"
+.LC16:
+	.string	"%s timeout during write setup 8\n"
+.LC17:
+	.string	"%s timeout during write setup 9\n"
+	.section	.rodata.rockchip_otp_ids,"a",@progbits
+	.align	3
+	.type	rockchip_otp_ids, %object
+	.size	rockchip_otp_ids, 96
+rockchip_otp_ids:
+	.xword	.LC19
+	.xword	rk3308_data
+	.xword	.LC20
+	.xword	rk3328_data
+	.xword	.LC21
+	.xword	px30_data
+	.xword	.LC22
+	.xword	px30_data
+	.xword	.LC23
+	.xword	rk3568_data
+	.zero	16
+	.section	.rodata.rockchip_secure_otp_ecc_enable.constprop.5.str1.1,"aMS",@progbits,1
+.LC4:
+	.string	"%s timeout during ecc_enable\n"
+	.section	.rodata.rockchip_secure_otp_ofdata_to_platdata.str1.1,"aMS",@progbits,1
+.LC0:
+	.string	"secure_conf"
+.LC1:
+	.string	"mask_addr"
+.LC2:
+	.string	"cru_rst_addr"
+	.section	.rodata.rockchip_secure_otp_ops,"a",@progbits
+	.align	3
+	.type	rockchip_secure_otp_ops, %object
+	.size	rockchip_secure_otp_ops, 32
+rockchip_secure_otp_ops:
+	.xword	secure_otp_read
+	.xword	secure_otp_write
+	.xword	secure_otp_ioctl
+	.zero	8
+	.section	.rodata.rockchip_secure_otp_wait_status.isra.2.str1.1,"aMS",@progbits,1
+.LC3:
+	.string	"%s: wait init status timeout\n"
+	.section	.rodata.str1.1,"aMS",@progbits,1
+.LC18:
+	.string	"rockchip_secure_otp"
+.LC19:
+	.string	"rockchip,rk3308-secure-otp"
+.LC20:
+	.string	"rockchip,rk3328-secure-otp"
+.LC21:
+	.string	"rockchip,rk3326-secure-otp"
+.LC22:
+	.string	"rockchip,px30-secure-otp"
+.LC23:
+	.string	"rockchip,rk3568-secure-otp"
+	.section	.u_boot_list_2_driver_2_rockchip_secure_otp,"aw",@progbits
+	.align	2
+	.type	_u_boot_list_2_driver_2_rockchip_secure_otp, %object
+	.size	_u_boot_list_2_driver_2_rockchip_secure_otp, 120
+_u_boot_list_2_driver_2_rockchip_secure_otp:
+	.8byte	.LC18
+	.word	36
+	.zero	4
+	.8byte	rockchip_otp_ids
+	.zero	32
+	.8byte	rockchip_secure_otp_ofdata_to_platdata
+	.zero	28
+	.word	32
+	.zero	8
+	.8byte	rockchip_secure_otp_ops
+	.zero	8
+	.text
+.Letext0:
+	.file 2 "include/common.h"
+	.file 3 "./arch/arm/include/asm/types.h"
+	.file 4 "include/linux/types.h"
+	.file 5 "include/errno.h"
+	.file 6 "include/linux/string.h"
+	.file 7 "include/efi.h"
+	.file 8 "include/dm/device.h"
+	.file 9 "include/ide.h"
+	.file 10 "include/linux/list.h"
+	.file 11 "include/part.h"
+	.file 12 "include/flash.h"
+	.file 13 "include/lmb.h"
+	.file 14 "include/asm-generic/u-boot.h"
+	.file 15 "./arch/arm/include/asm/u-boot-arm.h"
+	.file 16 "include/linux/libfdt_env.h"
+	.file 17 "include/linux/../../scripts/dtc/libfdt/fdt.h"
+	.file 18 "include/linux/libfdt.h"
+	.file 19 "include/image.h"
+	.file 20 "./arch/arm/include/asm/global_data.h"
+	.file 21 "include/asm-generic/global_data.h"
+	.file 22 "include/dm/of.h"
+	.file 23 "include/net.h"
+	.file 24 "include/dm/uclass-id.h"
+	.file 25 "include/dm/ofnode.h"
+	.file 26 "include/malloc.h"
+	.file 27 "include/linux/compat.h"
+	.file 28 "include/dm/uclass.h"
+	.file 29 "include/asm-generic/ioctl.h"
+	.file 30 "include/misc.h"
+	.file 31 "include/rockchip-otp.h"
+	.file 32 "include/dm/read.h"
+	.file 33 "include/stdio.h"
+	.file 34 "include/linux/delay.h"
+	.file 35 "include/log.h"
+	.section	.debug_info,"",@progbits
+.Ldebug_info0:
+	.4byte	0x477e
+	.2byte	0x4
+	.4byte	.Ldebug_abbrev0
+	.byte	0x8
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+	.byte	0xc
+	.4byte	.LASF469
+	.4byte	.LASF470
+	.4byte	.Ldebug_ranges0+0x570
+	.8byte	0
+	.4byte	.Ldebug_line0
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+	.uleb128 0x3
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+	.4byte	.LASF1
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+	.4byte	0x54
+	.uleb128 0x5
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+	.byte	0x5
+	.string	"int"
+	.uleb128 0x3
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+	.byte	0x6
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-	.4byte	.LASF174
+	.uleb128 0x25
+	.4byte	.LASF405
 	.byte	0x10
-	.uleb128 0x23
-	.4byte	.LASF175
-	.byte	0x11
-	.uleb128 0x23
-	.4byte	.LASF176
-	.byte	0x12
-	.uleb128 0x23
-	.4byte	.LASF177
-	.byte	0x13
-	.uleb128 0x23
-	.4byte	.LASF178
-	.byte	0x14
-	.uleb128 0x23
-	.4byte	.LASF179
-	.byte	0x15
-	.uleb128 0x23
-	.4byte	.LASF180
-	.byte	0x16
-	.uleb128 0x23
-	.4byte	.LASF181
-	.byte	0x17
-	.uleb128 0x23
-	.4byte	.LASF182
-	.byte	0x18
-	.uleb128 0x23
-	.4byte	.LASF183
-	.byte	0x19
-	.uleb128 0x23
-	.4byte	.LASF184
-	.byte	0x1a
-	.uleb128 0x23
-	.4byte	.LASF185
-	.byte	0x1b
-	.uleb128 0x23
-	.4byte	.LASF186
-	.byte	0x1c
-	.uleb128 0x23
-	.4byte	.LASF187
-	.byte	0x1d
-	.uleb128 0x23
-	.4byte	.LASF188
-	.byte	0x1e
-	.uleb128 0x23
-	.4byte	.LASF189
-	.byte	0x1f
-	.uleb128 0x23
-	.4byte	.LASF190
+	.byte	0
+	.uleb128 0xd
+	.4byte	.LASF406
 	.byte	0x20
-	.uleb128 0x23
-	.4byte	.LASF191
-	.byte	0x21
-	.uleb128 0x23
-	.4byte	.LASF192
-	.byte	0x22
-	.uleb128 0x23
-	.4byte	.LASF193
-	.byte	0x23
-	.uleb128 0x23
-	.4byte	.LASF194
-	.byte	0x24
-	.uleb128 0x23
-	.4byte	.LASF195
-	.byte	0x25
-	.uleb128 0x23
-	.4byte	.LASF196
-	.byte	0x26
-	.uleb128 0x23
-	.4byte	.LASF197
-	.byte	0x27
-	.uleb128 0x23
-	.4byte	.LASF198
-	.byte	0x28
-	.uleb128 0x23
-	.4byte	.LASF199
-	.byte	0x29
-	.uleb128 0x23
-	.4byte	.LASF200
-	.byte	0x2a
-	.uleb128 0x23
-	.4byte	.LASF201
-	.byte	0x2b
-	.uleb128 0x23
-	.4byte	.LASF202
-	.byte	0x2c
-	.uleb128 0x23
-	.4byte	.LASF203
-	.byte	0x2d
-	.uleb128 0x23
-	.4byte	.LASF204
-	.byte	0x2e
-	.uleb128 0x23
-	.4byte	.LASF205
-	.byte	0x2f
-	.uleb128 0x23
-	.4byte	.LASF206
-	.byte	0x30
-	.uleb128 0x23
-	.4byte	.LASF207
-	.byte	0x31
-	.uleb128 0x23
-	.4byte	.LASF208
-	.byte	0x32
-	.uleb128 0x23
-	.4byte	.LASF209
-	.byte	0x33
-	.uleb128 0x23
-	.4byte	.LASF210
-	.byte	0x34
-	.uleb128 0x23
-	.4byte	.LASF211
-	.byte	0x35
-	.uleb128 0x23
-	.4byte	.LASF212
-	.byte	0x36
-	.uleb128 0x23
-	.4byte	.LASF213
-	.byte	0x37
-	.uleb128 0x23
-	.4byte	.LASF214
-	.byte	0x38
-	.uleb128 0x23
-	.4byte	.LASF215
-	.byte	0x39
-	.uleb128 0x23
-	.4byte	.LASF216
-	.byte	0x3a
-	.uleb128 0x23
-	.4byte	.LASF217
-	.byte	0x3b
-	.uleb128 0x23
-	.4byte	.LASF218
+	.byte	0x1e
+	.byte	0x61
+	.4byte	0x1692
+	.uleb128 0xe
+	.4byte	.LASF407
+	.byte	0x1e
+	.byte	0x6b
+	.4byte	0x16b5
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF408
+	.byte	0x1e
+	.byte	0x75
+	.4byte	0x16d9
+	.byte	0x8
+	.uleb128 0xe
+	.4byte	.LASF409
+	.byte	0x1e
+	.byte	0x7f
+	.4byte	0x16f8
+	.byte	0x10
+	.uleb128 0xe
+	.4byte	.LASF410
+	.byte	0x1e
+	.byte	0x8c
+	.4byte	0x1726
+	.byte	0x18
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x1655
+	.uleb128 0x12
+	.4byte	0x54
+	.4byte	0x16b5
+	.uleb128 0x13
+	.4byte	0x25f
+	.uleb128 0x13
+	.4byte	0x54
+	.uleb128 0x13
+	.4byte	0x137
+	.uleb128 0x13
+	.4byte	0x54
+	.byte	0
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x1697
+	.uleb128 0x12
+	.4byte	0x54
+	.4byte	0x16d9
+	.uleb128 0x13
+	.4byte	0x25f
+	.uleb128 0x13
+	.4byte	0x54
+	.uleb128 0x13
+	.4byte	0x265
+	.uleb128 0x13
+	.4byte	0x54
+	.byte	0
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x16bb
+	.uleb128 0x12
+	.4byte	0x54
+	.4byte	0x16f8
+	.uleb128 0x13
+	.4byte	0x25f
+	.uleb128 0x13
+	.4byte	0x3b
+	.uleb128 0x13
+	.4byte	0x137
+	.byte	0
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x16df
+	.uleb128 0x12
+	.4byte	0x54
+	.4byte	0x1726
+	.uleb128 0x13
+	.4byte	0x25f
+	.uleb128 0x13
+	.4byte	0x54
+	.uleb128 0x13
+	.4byte	0x137
+	.uleb128 0x13
+	.4byte	0x54
+	.uleb128 0x13
+	.4byte	0x137
+	.uleb128 0x13
+	.4byte	0x54
+	.byte	0
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x16fe
+	.uleb128 0xd
+	.4byte	.LASF411
+	.byte	0x20
+	.byte	0x1f
 	.byte	0x3c
-	.uleb128 0x23
-	.4byte	.LASF219
+	.4byte	0x1769
+	.uleb128 0xe
+	.4byte	.LASF60
+	.byte	0x1f
 	.byte	0x3d
-	.uleb128 0x23
-	.4byte	.LASF220
+	.4byte	0x137
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF412
+	.byte	0x1f
 	.byte	0x3e
-	.uleb128 0x23
-	.4byte	.LASF221
+	.4byte	0x3b
+	.byte	0x8
+	.uleb128 0xe
+	.4byte	.LASF413
+	.byte	0x1f
 	.byte	0x3f
-	.uleb128 0x23
-	.4byte	.LASF222
+	.4byte	0x3b
+	.byte	0x10
+	.uleb128 0xe
+	.4byte	.LASF414
+	.byte	0x1f
 	.byte	0x40
-	.uleb128 0x23
-	.4byte	.LASF223
-	.byte	0x41
-	.uleb128 0x23
-	.4byte	.LASF224
-	.byte	0x42
-	.uleb128 0x23
-	.4byte	.LASF225
-	.byte	0x43
-	.uleb128 0x23
-	.4byte	.LASF226
-	.byte	0x44
-	.uleb128 0x23
-	.4byte	.LASF227
-	.byte	0x45
-	.uleb128 0x23
-	.4byte	.LASF228
-	.byte	0x46
-	.uleb128 0x23
-	.4byte	.LASF229
-	.byte	0x47
-	.uleb128 0x23
-	.4byte	.LASF230
-	.byte	0x48
-	.uleb128 0x23
-	.4byte	.LASF231
-	.byte	0x49
-	.uleb128 0x23
-	.4byte	.LASF232
-	.byte	0x4a
-	.uleb128 0x23
-	.4byte	.LASF233
-	.byte	0x4b
-	.uleb128 0x23
-	.4byte	.LASF234
-	.byte	0x4c
-	.uleb128 0x23
-	.4byte	.LASF235
-	.byte	0x4d
-	.uleb128 0x23
-	.4byte	.LASF236
-	.byte	0x4e
-	.uleb128 0x23
-	.4byte	.LASF237
-	.byte	0x4f
-	.uleb128 0x23
-	.4byte	.LASF238
+	.4byte	0x3b
+	.byte	0x18
+	.byte	0
+	.uleb128 0xd
+	.4byte	.LASF415
+	.byte	0x20
+	.byte	0x1
+	.byte	0xf
+	.4byte	0x17a6
+	.uleb128 0xe
+	.4byte	.LASF407
+	.byte	0x1
+	.byte	0x10
+	.4byte	0x16b5
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF408
+	.byte	0x1
+	.byte	0x11
+	.4byte	0x16d9
+	.byte	0x8
+	.uleb128 0xe
+	.4byte	.LASF416
+	.byte	0x1
+	.byte	0x12
+	.4byte	0x17cb
+	.byte	0x10
+	.uleb128 0xe
+	.4byte	.LASF417
+	.byte	0x1
+	.byte	0x15
+	.4byte	0x17cb
+	.byte	0x18
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x1769
+	.uleb128 0x29
+	.4byte	0x17c5
+	.uleb128 0x13
+	.4byte	0x17c5
+	.uleb128 0x13
+	.4byte	0x17c5
+	.uleb128 0x13
+	.4byte	0x3b
+	.uleb128 0x13
+	.4byte	0x54
+	.byte	0
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x7f
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x17ab
+	.uleb128 0x2f
+	.4byte	.LASF418
+	.byte	0x1
+	.2byte	0x2ef
+	.4byte	0x1692
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	rockchip_secure_otp_ops
+	.uleb128 0x2f
+	.4byte	.LASF419
+	.byte	0x1
+	.2byte	0x304
+	.4byte	0x17a6
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	px30_data
+	.uleb128 0x2f
+	.4byte	.LASF420
+	.byte	0x1
+	.2byte	0x30b
+	.4byte	0x17a6
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	rk3308_data
+	.uleb128 0x2f
+	.4byte	.LASF421
+	.byte	0x1
+	.2byte	0x312
+	.4byte	0x17a6
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	rk3328_data
+	.uleb128 0x2f
+	.4byte	.LASF422
+	.byte	0x1
+	.2byte	0x319
+	.4byte	0x17a6
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	rk3568_data
+	.uleb128 0xa
+	.4byte	0x14fc
+	.4byte	0x184f
+	.uleb128 0x11
+	.4byte	0xda
+	.byte	0x5
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x183f
+	.uleb128 0x2f
+	.4byte	.LASF423
+	.byte	0x1
+	.2byte	0x320
+	.4byte	0x184f
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	rockchip_otp_ids
+	.uleb128 0x30
+	.4byte	.LASF424
+	.byte	0x1
+	.2byte	0x338
+	.4byte	0x12d2
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	_u_boot_list_2_driver_2_rockchip_secure_otp
+	.uleb128 0x31
+	.4byte	.LASF425
+	.byte	0x1
+	.2byte	0x2f5
+	.4byte	0x54
+	.8byte	.LFB286
+	.8byte	.LFE286-.LFB286
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x196d
+	.uleb128 0x32
+	.string	"dev"
+	.byte	0x1
+	.2byte	0x2f5
+	.4byte	0x25f
+	.4byte	.LLST30
+	.uleb128 0x33
+	.string	"otp"
+	.byte	0x1
+	.2byte	0x2f7
+	.4byte	0x196d
+	.4byte	.LLST31
+	.uleb128 0x34
+	.8byte	.LVL49
+	.4byte	0x4731
+	.4byte	0x18da
+	.uleb128 0x35
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL52
+	.4byte	0x473d
+	.4byte	0x18f2
+	.uleb128 0x35
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL53
+	.4byte	0x4748
+	.4byte	0x191c
+	.uleb128 0x35
+	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x23
-	.4byte	.LASF239
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x35
+	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x23
-	.4byte	.LASF240
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC0
+	.uleb128 0x35
+	.uleb128 0x1
 	.byte	0x52
-	.uleb128 0x23
-	.4byte	.LASF241
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL54
+	.4byte	0x4748
+	.4byte	0x1946
+	.uleb128 0x35
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x35
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x35
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL55
+	.4byte	0x4748
+	.uleb128 0x35
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x35
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC2
+	.uleb128 0x35
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x172c
+	.uleb128 0x31
+	.4byte	.LASF426
+	.byte	0x1
+	.2byte	0x2de
+	.4byte	0x54
+	.8byte	.LFB285
+	.8byte	.LFE285-.LFB285
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x19f4
+	.uleb128 0x32
+	.string	"dev"
+	.byte	0x1
+	.2byte	0x2de
+	.4byte	0x25f
+	.4byte	.LLST17
+	.uleb128 0x37
+	.4byte	.LASF427
+	.byte	0x1
+	.2byte	0x2df
+	.4byte	0x3b
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x38
+	.string	"buf"
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+	.2byte	0x2e0
+	.4byte	0x137
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x33
+	.string	"ret"
+	.byte	0x1
+	.2byte	0x2e2
+	.4byte	0x54
+	.4byte	.LLST18
+	.uleb128 0x39
+	.4byte	0x19f4
+	.8byte	.LBB48
+	.8byte	.LBE48-.LBB48
+	.byte	0x1
+	.2byte	0x2e6
+	.uleb128 0x3a
+	.4byte	0x1a05
+	.4byte	.LLST19
+	.byte	0
+	.byte	0
+	.uleb128 0x3b
+	.4byte	.LASF434
+	.byte	0x1
+	.2byte	0x2d7
+	.4byte	0x54
+	.byte	0x1
+	.4byte	0x1a12
+	.uleb128 0x3c
+	.string	"buf"
+	.byte	0x1
+	.2byte	0x2d7
+	.4byte	0x12cc
+	.byte	0
+	.uleb128 0x31
+	.4byte	.LASF428
+	.byte	0x1
+	.2byte	0x2cf
+	.4byte	0x54
+	.8byte	.LFB283
+	.8byte	.LFE283-.LFB283
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x1ac3
+	.uleb128 0x32
+	.string	"dev"
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+	.2byte	0x2cf
+	.4byte	0x25f
+	.4byte	.LLST20
+	.uleb128 0x3d
+	.4byte	.LASF429
+	.byte	0x1
+	.2byte	0x2cf
+	.4byte	0x54
+	.4byte	.LLST21
+	.uleb128 0x32
+	.string	"buf"
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+	.2byte	0x2d0
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+	.4byte	.LLST22
+	.uleb128 0x3d
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+	.2byte	0x2d0
+	.4byte	0x54
+	.4byte	.LLST23
+	.uleb128 0x3e
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+	.4byte	0x1ac3
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+	.uleb128 0x2
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+	.uleb128 0x1
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+	.uleb128 0x3
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+	.uleb128 0x1
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+	.byte	0
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+	.8byte	.LFE282-.LFB282
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+	.byte	0x9c
+	.4byte	0x1b7a
+	.uleb128 0x32
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+	.4byte	.LLST25
+	.uleb128 0x3d
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+	.uleb128 0x32
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+	.4byte	.LLST28
+	.uleb128 0x3e
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+	.uleb128 0x48
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+	.byte	0
+	.uleb128 0x45
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+	.8byte	.LBE199-.LBB199
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+	.uleb128 0x48
+	.4byte	0x2776
 	.byte	0x15
+	.byte	0
+	.uleb128 0x45
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+	.8byte	.LBE200-.LBB200
+	.4byte	0x1fa1
+	.uleb128 0x48
+	.4byte	0x2788
+	.byte	0xdc
+	.byte	0
+	.uleb128 0x45
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+	.8byte	.LBE201-.LBB201
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-	.4byte	0x54
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-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0xc8b
-	.uleb128 0xd
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-	.4byte	0xf1b
-	.uleb128 0xe
-	.4byte	.LASF28
-	.byte	0x16
-	.byte	0x2d
-	.4byte	0xd6
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-	.uleb128 0xe
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-	.uleb128 0xe
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-	.uleb128 0xe
-	.4byte	.LASF307
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-	.uleb128 0x35
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
+	.uleb128 0x45
+	.8byte	.LBB377
+	.8byte	.LBE377-.LBB377
+	.4byte	0x33b2
+	.uleb128 0x47
+	.4byte	0x3a40
+	.sleb128 -65534
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LBB378
+	.8byte	.LBE378-.LBB378
+	.4byte	0x33ce
+	.uleb128 0x48
+	.4byte	0x3a52
+	.byte	0x2
 	.byte	0
+	.uleb128 0x45
+	.8byte	.LBB379
+	.8byte	.LBE379-.LBB379
+	.4byte	0x33ea
+	.uleb128 0x48
+	.4byte	0x3a64
+	.byte	0xbf
 	.byte	0
+	.uleb128 0x4a
+	.4byte	.Ldebug_ranges0+0x540
+	.4byte	0x33fd
+	.uleb128 0x46
+	.4byte	0x3a76
+	.4byte	0x10001
 	.byte	0
-	.uleb128 0x4d
-	.8byte	.LVL115
-	.4byte	0x33a8
+	.uleb128 0x4b
+	.8byte	.LVL327
+	.4byte	0x475f
 	.uleb128 0x34
-	.8byte	.LVL118
-	.4byte	0x33b3
-	.4byte	0x228c
+	.8byte	.LVL330
+	.4byte	0x4753
+	.4byte	0x3424
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -5946,59 +9421,59 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.sleb128 224
 	.byte	0x6
 	.byte	0
-	.uleb128 0x4e
-	.8byte	.LVL123
-	.4byte	0x22a0
+	.uleb128 0x4c
+	.8byte	.LVL335
+	.4byte	0x3438
 	.uleb128 0x35
 	.uleb128 0x1
-	.byte	0x52
+	.byte	0x53
 	.uleb128 0x2
 	.byte	0x83
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL144
-	.4byte	0x328e
-	.4byte	0x22c5
+	.8byte	.LVL356
+	.4byte	0x44e8
+	.4byte	0x345d
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x8c
+	.byte	0x8b
 	.sleb128 0
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x1
 	.byte	0x32
-	.uleb128 0x4f
-	.4byte	0x2e86
+	.uleb128 0x4d
+	.4byte	0x3e54
 	.uleb128 0x2
-	.byte	0x8c
+	.byte	0x8b
 	.sleb128 0
 	.byte	0
-	.uleb128 0x4d
-	.8byte	.LVL147
-	.4byte	0x33a8
-	.uleb128 0x4e
-	.8byte	.LVL148
-	.4byte	0x22e6
+	.uleb128 0x4b
+	.8byte	.LVL360
+	.4byte	0x475f
+	.uleb128 0x4c
+	.8byte	.LVL361
+	.4byte	0x347e
 	.uleb128 0x35
 	.uleb128 0x1
-	.byte	0x52
+	.byte	0x53
 	.uleb128 0x2
 	.byte	0x83
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL167
-	.4byte	0x328e
-	.4byte	0x230c
+	.8byte	.LVL380
+	.4byte	0x44e8
+	.4byte	0x34a4
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x8c
+	.byte	0x8b
 	.sleb128 0
 	.uleb128 0x35
 	.uleb128 0x1
@@ -6006,21 +9481,21 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x2
 	.byte	0x85
 	.sleb128 0
-	.uleb128 0x4f
-	.4byte	0x2e86
+	.uleb128 0x4d
+	.4byte	0x3e54
 	.uleb128 0x2
-	.byte	0x8c
+	.byte	0x8b
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL176
-	.4byte	0x328e
-	.4byte	0x2332
+	.8byte	.LVL389
+	.4byte	0x44e8
+	.4byte	0x34ca
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x8c
+	.byte	0x8b
 	.sleb128 0
 	.uleb128 0x35
 	.uleb128 0x1
@@ -6028,21 +9503,21 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x2
 	.byte	0x85
 	.sleb128 0
-	.uleb128 0x4f
-	.4byte	0x2e86
+	.uleb128 0x4d
+	.4byte	0x3e54
 	.uleb128 0x2
-	.byte	0x8c
+	.byte	0x8b
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL183
-	.4byte	0x328e
-	.4byte	0x2358
+	.8byte	.LVL396
+	.4byte	0x44e8
+	.4byte	0x34f0
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x8c
+	.byte	0x8b
 	.sleb128 0
 	.uleb128 0x35
 	.uleb128 0x1
@@ -6050,21 +9525,21 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x2
 	.byte	0x85
 	.sleb128 0
-	.uleb128 0x4f
-	.4byte	0x2e86
+	.uleb128 0x4d
+	.4byte	0x3e54
 	.uleb128 0x2
-	.byte	0x8c
+	.byte	0x8b
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL191
-	.4byte	0x328e
-	.4byte	0x237e
+	.8byte	.LVL404
+	.4byte	0x44e8
+	.4byte	0x3516
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x8c
+	.byte	0x8b
 	.sleb128 0
 	.uleb128 0x35
 	.uleb128 0x1
@@ -6072,21 +9547,21 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x2
 	.byte	0x85
 	.sleb128 0
-	.uleb128 0x4f
-	.4byte	0x2e86
+	.uleb128 0x4d
+	.4byte	0x3e54
 	.uleb128 0x2
-	.byte	0x8c
+	.byte	0x8b
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL200
-	.4byte	0x328e
-	.4byte	0x23a4
+	.8byte	.LVL414
+	.4byte	0x44e8
+	.4byte	0x353c
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x8c
+	.byte	0x8b
 	.sleb128 0
 	.uleb128 0x35
 	.uleb128 0x1
@@ -6094,58 +9569,71 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x2
 	.byte	0x85
 	.sleb128 0
-	.uleb128 0x4f
-	.4byte	0x2e86
+	.uleb128 0x4d
+	.4byte	0x3e54
 	.uleb128 0x2
-	.byte	0x8c
+	.byte	0x8b
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL213
-	.4byte	0x33a8
-	.4byte	0x23c9
+	.8byte	.LVL419
+	.4byte	0x4413
+	.4byte	0x355c
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC14
-	.uleb128 0x35
-	.uleb128 0x1
-	.byte	0x51
 	.uleb128 0x2
-	.byte	0x84
+	.byte	0x8b
 	.sleb128 0
-	.byte	0
 	.uleb128 0x4d
-	.8byte	.LVL215
-	.4byte	0x33a8
-	.uleb128 0x36
-	.8byte	.LVL220
-	.4byte	0x328e
+	.4byte	0x3dc0
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL427
+	.4byte	0x44e8
+	.4byte	0x3582
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x8c
+	.byte	0x8b
 	.sleb128 0
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x51
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x4d
+	.4byte	0x3e54
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL432
+	.4byte	0x447d
+	.uleb128 0x35
 	.uleb128 0x1
-	.byte	0x32
-	.uleb128 0x4f
-	.4byte	0x2e86
+	.byte	0x50
 	.uleb128 0x2
-	.byte	0x8c
+	.byte	0x8b
+	.sleb128 0
+	.uleb128 0x4d
+	.4byte	0x3e0a
+	.uleb128 0x2
+	.byte	0x8b
 	.sleb128 0
 	.byte	0
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL98
-	.4byte	0x337b
-	.4byte	0x2413
+	.8byte	.LVL310
+	.4byte	0x4731
+	.4byte	0x35ba
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -6155,9 +9643,9 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x6
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL101
-	.4byte	0x33bf
-	.4byte	0x2431
+	.8byte	.LVL313
+	.4byte	0x476a
+	.4byte	0x35d8
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -6172,8 +9660,8 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x26
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL108
-	.4byte	0x2906
+	.8byte	.LVL320
+	.4byte	0x3aa7
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -6202,845 +9690,707 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0
 	.byte	0
 	.uleb128 0x3b
-	.4byte	.LASF429
+	.4byte	.LASF440
 	.byte	0x1
-	.2byte	0x10b
+	.2byte	0x118
 	.4byte	0x54
 	.byte	0x1
-	.4byte	0x28eb
+	.4byte	0x3a92
 	.uleb128 0x3c
 	.string	"dev"
 	.byte	0x1
-	.2byte	0x10b
-	.4byte	0x254
+	.2byte	0x118
+	.4byte	0x25f
 	.uleb128 0x3c
 	.string	"otp"
 	.byte	0x1
-	.2byte	0x10c
-	.4byte	0x1952
-	.uleb128 0x50
-	.4byte	.LASF426
+	.2byte	0x119
+	.4byte	0x196d
+	.uleb128 0x4e
+	.4byte	.LASF429
 	.byte	0x1
-	.2byte	0x10d
+	.2byte	0x11a
 	.4byte	0x54
-	.uleb128 0x50
-	.4byte	.LASF386
+	.uleb128 0x4e
+	.4byte	.LASF389
 	.byte	0x1
-	.2byte	0x10d
+	.2byte	0x11a
 	.4byte	0x94
-	.uleb128 0x51
+	.uleb128 0x4f
 	.string	"ret"
 	.byte	0x1
-	.2byte	0x10f
+	.2byte	0x11c
 	.4byte	0x54
+	.uleb128 0x50
+	.4byte	.LASF430
+	.byte	0x1
+	.2byte	0x11d
+	.4byte	0x1ac3
+	.uleb128 0x51
+	.4byte	.LASF436
+	.4byte	0x3aa2
+	.4byte	.LASF440
 	.uleb128 0x52
-	.4byte	.LASF415
+	.4byte	.LASF441
 	.byte	0x1
-	.2byte	0x110
-	.4byte	0x28eb
+	.2byte	0x1a1
 	.uleb128 0x53
-	.4byte	.LASF430
-	.4byte	0x2901
-	.4byte	.LASF429
-	.uleb128 0x54
-	.4byte	.LASF460
+	.4byte	0x3681
+	.uleb128 0x4f
+	.string	"__v"
 	.byte	0x1
-	.2byte	0x1a7
-	.uleb128 0x55
-	.4byte	0x24da
-	.uleb128 0x51
+	.2byte	0x131
+	.4byte	0xae
+	.byte	0
+	.uleb128 0x53
+	.4byte	0x3693
+	.uleb128 0x4f
+	.string	"__v"
+	.byte	0x1
+	.2byte	0x132
+	.4byte	0xae
+	.byte	0
+	.uleb128 0x53
+	.4byte	0x36a5
+	.uleb128 0x4f
+	.string	"__v"
+	.byte	0x1
+	.2byte	0x133
+	.4byte	0xae
+	.byte	0
+	.uleb128 0x53
+	.4byte	0x36b7
+	.uleb128 0x4f
+	.string	"__v"
+	.byte	0x1
+	.2byte	0x134
+	.4byte	0xae
+	.byte	0
+	.uleb128 0x53
+	.4byte	0x36c9
+	.uleb128 0x4f
+	.string	"__v"
+	.byte	0x1
+	.2byte	0x135
+	.4byte	0xae
+	.byte	0
+	.uleb128 0x53
+	.4byte	0x36db
+	.uleb128 0x4f
+	.string	"__v"
+	.byte	0x1
+	.2byte	0x136
+	.4byte	0xae
+	.byte	0
+	.uleb128 0x53
+	.4byte	0x36ed
+	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
 	.2byte	0x137
-	.4byte	0xa3
+	.4byte	0xae
 	.byte	0
-	.uleb128 0x55
-	.4byte	0x24ec
-	.uleb128 0x51
+	.uleb128 0x53
+	.4byte	0x36ff
+	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
 	.2byte	0x138
-	.4byte	0xa3
+	.4byte	0xae
 	.byte	0
-	.uleb128 0x55
-	.4byte	0x24fe
-	.uleb128 0x51
+	.uleb128 0x53
+	.4byte	0x3711
+	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
 	.2byte	0x139
-	.4byte	0xa3
+	.4byte	0xae
 	.byte	0
-	.uleb128 0x55
-	.4byte	0x2510
-	.uleb128 0x51
+	.uleb128 0x53
+	.4byte	0x3723
+	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
 	.2byte	0x13a
-	.4byte	0xa3
+	.4byte	0xae
 	.byte	0
-	.uleb128 0x55
-	.4byte	0x2522
-	.uleb128 0x51
+	.uleb128 0x53
+	.4byte	0x3735
+	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
 	.2byte	0x13b
-	.4byte	0xa3
+	.4byte	0xae
 	.byte	0
-	.uleb128 0x55
-	.4byte	0x2534
-	.uleb128 0x51
+	.uleb128 0x53
+	.4byte	0x3747
+	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
 	.2byte	0x13c
-	.4byte	0xa3
+	.4byte	0xae
 	.byte	0
-	.uleb128 0x55
-	.4byte	0x2546
-	.uleb128 0x51
+	.uleb128 0x53
+	.4byte	0x3759
+	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
 	.2byte	0x13d
-	.4byte	0xa3
+	.4byte	0xae
 	.byte	0
-	.uleb128 0x55
-	.4byte	0x2558
-	.uleb128 0x51
+	.uleb128 0x53
+	.4byte	0x376b
+	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
 	.2byte	0x13e
-	.4byte	0xa3
+	.4byte	0xae
 	.byte	0
-	.uleb128 0x55
-	.4byte	0x256a
-	.uleb128 0x51
+	.uleb128 0x53
+	.4byte	0x377d
+	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
 	.2byte	0x13f
-	.4byte	0xa3
+	.4byte	0xae
 	.byte	0
-	.uleb128 0x55
-	.4byte	0x257c
-	.uleb128 0x51
+	.uleb128 0x53
+	.4byte	0x378f
+	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
 	.2byte	0x140
-	.4byte	0xa3
+	.4byte	0xae
 	.byte	0
-	.uleb128 0x55
-	.4byte	0x258e
-	.uleb128 0x51
+	.uleb128 0x53
+	.4byte	0x37a1
+	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
 	.2byte	0x141
-	.4byte	0xa3
+	.4byte	0xae
 	.byte	0
-	.uleb128 0x55
-	.4byte	0x25a0
-	.uleb128 0x51
+	.uleb128 0x53
+	.4byte	0x37b3
+	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
 	.2byte	0x142
-	.4byte	0xa3
+	.4byte	0xae
 	.byte	0
-	.uleb128 0x55
-	.4byte	0x25b2
-	.uleb128 0x51
+	.uleb128 0x53
+	.4byte	0x37c5
+	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
 	.2byte	0x143
-	.4byte	0xa3
+	.4byte	0xae
 	.byte	0
-	.uleb128 0x55
-	.4byte	0x25c4
-	.uleb128 0x51
+	.uleb128 0x53
+	.4byte	0x37d7
+	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
 	.2byte	0x144
-	.4byte	0xa3
+	.4byte	0xae
 	.byte	0
-	.uleb128 0x55
-	.4byte	0x25d6
-	.uleb128 0x51
+	.uleb128 0x53
+	.4byte	0x37e9
+	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
-	.2byte	0x145
-	.4byte	0xa3
+	.2byte	0x14b
+	.4byte	0xae
 	.byte	0
-	.uleb128 0x55
-	.4byte	0x25e8
-	.uleb128 0x51
+	.uleb128 0x53
+	.4byte	0x37fb
+	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
-	.2byte	0x146
-	.4byte	0xa3
+	.2byte	0x14c
+	.4byte	0xae
 	.byte	0
-	.uleb128 0x55
-	.4byte	0x25fa
-	.uleb128 0x51
+	.uleb128 0x53
+	.4byte	0x380d
+	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
-	.2byte	0x147
-	.4byte	0xa3
+	.2byte	0x14d
+	.4byte	0xae
 	.byte	0
-	.uleb128 0x55
-	.4byte	0x260c
-	.uleb128 0x51
+	.uleb128 0x53
+	.4byte	0x381f
+	.uleb128 0x4f
 	.string	"__v"
 	.byte	0x1
-	.2byte	0x148
-	.4byte	0xa3
+	.2byte	0x14e
+	.4byte	0xae
 	.byte	0
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-	.4byte	.LLST31
-	.uleb128 0x3a
-	.4byte	0x2d51
-	.4byte	.LLST32
-	.uleb128 0x4c
-	.8byte	.LBB63
-	.8byte	.LBE63-.LBB63
-	.uleb128 0x41
-	.4byte	0x2d67
-	.4byte	.LLST33
-	.uleb128 0x43
-	.4byte	0x2d72
-	.uleb128 0x44
-	.8byte	.LBB64
-	.8byte	.LBE64-.LBB64
-	.4byte	0x2b1a
-	.uleb128 0x46
-	.4byte	0x2d84
-	.sleb128 -16776704
-	.byte	0
-	.uleb128 0x44
-	.8byte	.LBB65
-	.8byte	.LBE65-.LBB65
-	.4byte	0x2b38
-	.uleb128 0x46
-	.4byte	0x2d95
-	.sleb128 -65535
-	.byte	0
-	.uleb128 0x44
-	.8byte	.LBB66
-	.8byte	.LBE66-.LBB66
-	.4byte	0x2b54
-	.uleb128 0x47
-	.4byte	0x2da6
 	.byte	0xfa
+	.4byte	0xae
+	.4byte	.LLST72
 	.byte	0
-	.uleb128 0x44
-	.8byte	.LBB67
-	.8byte	.LBE67-.LBB67
-	.4byte	0x2b70
-	.uleb128 0x47
-	.4byte	0x2db7
-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.8byte	.LBB68
-	.8byte	.LBE68-.LBB68
-	.4byte	0x2b8f
 	.uleb128 0x45
-	.4byte	0x2dd5
-	.4byte	0x10001
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL62
-	.4byte	0x328e
-	.4byte	0x2bb4
-	.uleb128 0x35
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.uleb128 0x35
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x32
-	.uleb128 0x4f
-	.4byte	0x2e86
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL64
-	.4byte	0x33a8
-	.uleb128 0x35
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC3
-	.uleb128 0x35
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR1
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x60
-	.4byte	0x2ee8
-	.8byte	.LBB77
-	.8byte	.LBE77-.LBB77
-	.byte	0x1
-	.byte	0xef
-	.4byte	0x2c30
-	.uleb128 0x3a
-	.4byte	0x2f03
-	.4byte	.LLST28
-	.uleb128 0x3a
-	.4byte	0x2ef8
-	.4byte	.LLST40
-	.uleb128 0x4c
-	.8byte	.LBB78
-	.8byte	.LBE78-.LBB78
-	.uleb128 0x41
-	.4byte	0x2f0e
-	.4byte	.LLST41
-	.uleb128 0x41
-	.4byte	0x2f17
-	.4byte	.LLST42
+	.8byte	.LBB103
+	.8byte	.LBE103-.LBB103
+	.4byte	0x3beb
+	.uleb128 0x60
+	.string	"__v"
+	.byte	0x1
+	.2byte	0x102
+	.4byte	0x94
+	.uleb128 0x1
+	.byte	0x50
 	.byte	0
+	.uleb128 0x4a
+	.4byte	.Ldebug_ranges0+0x120
+	.4byte	0x3c05
+	.uleb128 0x33
+	.string	"__v"
+	.byte	0x1
+	.2byte	0x10f
+	.4byte	0xae
+	.4byte	.LLST73
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL51
-	.4byte	0x337b
-	.4byte	0x2c48
+	.8byte	.LVL142
+	.4byte	0x4731
+	.4byte	0x3c1d
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x86
+	.byte	0x87
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL54
-	.4byte	0x33b3
-	.4byte	0x2c60
+	.8byte	.LVL145
+	.4byte	0x4753
+	.4byte	0x3c35
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x86
+	.byte	0x87
 	.sleb128 0
 	.byte	0
-	.uleb128 0x4e
-	.8byte	.LVL57
-	.4byte	0x2c74
+	.uleb128 0x4c
+	.8byte	.LVL148
+	.4byte	0x3c49
 	.uleb128 0x35
 	.uleb128 0x1
-	.byte	0x52
+	.byte	0x53
 	.uleb128 0x2
 	.byte	0x84
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL66
-	.4byte	0x339d
-	.4byte	0x2c8c
+	.8byte	.LVL149
+	.4byte	0x45d5
+	.4byte	0x3c61
+	.uleb128 0x35
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL152
+	.4byte	0x4776
+	.4byte	0x3c79
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -7049,20 +10399,20 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x32
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL69
-	.4byte	0x33a8
-	.4byte	0x2cab
+	.8byte	.LVL153
+	.4byte	0x475f
+	.4byte	0x3c98
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC4
+	.8byte	.LC5
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL77
-	.4byte	0x328e
-	.4byte	0x2cd0
+	.8byte	.LVL162
+	.4byte	0x44e8
+	.4byte	0x3cbd
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -7074,651 +10424,867 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x51
 	.uleb128 0x1
 	.byte	0x34
-	.uleb128 0x4f
-	.4byte	0x2e86
+	.uleb128 0x4d
+	.4byte	0x3e54
 	.uleb128 0x2
 	.byte	0x83
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL80
-	.4byte	0x33a8
-	.4byte	0x2cfc
+	.8byte	.LVL165
+	.4byte	0x475f
+	.4byte	0x3ce9
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC5
+	.8byte	.LC6
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR2
+	.8byte	.LANCHOR3
 	.byte	0
-	.uleb128 0x4e
-	.8byte	.LVL81
-	.4byte	0x2d10
+	.uleb128 0x58
+	.8byte	.LVL166
 	.uleb128 0x35
 	.uleb128 0x1
-	.byte	0x52
+	.byte	0x53
 	.uleb128 0x2
 	.byte	0x84
 	.sleb128 0
 	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL94
-	.4byte	0x33a8
-	.uleb128 0x35
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC6
-	.byte	0
 	.byte	0
 	.uleb128 0xa
-	.4byte	0xe3
-	.4byte	0x2d3c
+	.4byte	0xee
+	.4byte	0x3d0a
 	.uleb128 0x11
-	.4byte	0xcf
+	.4byte	0xda
 	.byte	0x18
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x2d2c
+	.4byte	0x3cfa
 	.uleb128 0x61
-	.4byte	.LASF434
+	.4byte	.LASF444
 	.byte	0x1
-	.byte	0x9e
+	.byte	0xc6
 	.4byte	0x54
 	.byte	0x1
-	.4byte	0x2de2
+	.4byte	0x3db0
 	.uleb128 0x62
 	.string	"otp"
 	.byte	0x1
-	.byte	0x9e
-	.4byte	0x1952
+	.byte	0xc6
+	.4byte	0x196d
 	.uleb128 0x63
 	.4byte	.LASF262
 	.byte	0x1
-	.byte	0x9f
-	.4byte	0x139
+	.byte	0xc7
+	.4byte	0x144
 	.uleb128 0x64
 	.string	"ret"
 	.byte	0x1
-	.byte	0xa1
+	.byte	0xc9
 	.4byte	0x54
+	.uleb128 0x51
+	.4byte	.LASF436
+	.4byte	0x3aa2
+	.4byte	.LASF444
 	.uleb128 0x53
-	.4byte	.LASF430
-	.4byte	0x2901
-	.4byte	.LASF434
-	.uleb128 0x55
-	.4byte	0x2d90
+	.4byte	0x3d5e
 	.uleb128 0x64
 	.string	"__v"
 	.byte	0x1
-	.byte	0xa3
-	.4byte	0xa3
+	.byte	0xcb
+	.4byte	0xae
 	.byte	0
-	.uleb128 0x55
-	.4byte	0x2da1
+	.uleb128 0x53
+	.4byte	0x3d6f
 	.uleb128 0x64
 	.string	"__v"
 	.byte	0x1
-	.byte	0xa4
-	.4byte	0xa3
+	.byte	0xcc
+	.4byte	0xae
 	.byte	0
-	.uleb128 0x55
-	.4byte	0x2db2
+	.uleb128 0x53
+	.4byte	0x3d80
 	.uleb128 0x64
 	.string	"__v"
 	.byte	0x1
-	.byte	0xa5
-	.4byte	0xa3
+	.byte	0xcd
+	.4byte	0xae
 	.byte	0
-	.uleb128 0x55
-	.4byte	0x2dc3
+	.uleb128 0x53
+	.4byte	0x3d91
 	.uleb128 0x64
 	.string	"__v"
 	.byte	0x1
-	.byte	0xa7
-	.4byte	0xa3
+	.byte	0xcf
+	.4byte	0xae
 	.byte	0
-	.uleb128 0x55
-	.4byte	0x2dd4
+	.uleb128 0x53
+	.4byte	0x3da2
 	.uleb128 0x64
 	.string	"__v"
 	.byte	0x1
-	.byte	0xa9
-	.4byte	0xa3
+	.byte	0xd1
+	.4byte	0xae
 	.byte	0
-	.uleb128 0x56
+	.uleb128 0x54
 	.uleb128 0x64
 	.string	"__v"
 	.byte	0x1
-	.byte	0xab
-	.4byte	0xa3
+	.byte	0xd3
+	.4byte	0xae
 	.byte	0
 	.byte	0
 	.uleb128 0x61
-	.4byte	.LASF435
+	.4byte	.LASF445
 	.byte	0x1
-	.byte	0x88
+	.byte	0xb0
 	.4byte	0x54
 	.byte	0x1
-	.4byte	0x2e2c
+	.4byte	0x3dfa
 	.uleb128 0x62
 	.string	"otp"
 	.byte	0x1
-	.byte	0x88
-	.4byte	0x1952
+	.byte	0xb0
+	.4byte	0x196d
 	.uleb128 0x65
-	.4byte	.LASF436
+	.4byte	.LASF446
 	.byte	0x1
-	.byte	0x8a
+	.byte	0xb2
 	.4byte	0x54
 	.uleb128 0x65
-	.4byte	.LASF427
+	.4byte	.LASF433
 	.byte	0x1
-	.byte	0x8b
+	.byte	0xb3
 	.4byte	0x54
 	.uleb128 0x64
 	.string	"ret"
 	.byte	0x1
-	.byte	0x8b
+	.byte	0xb3
 	.4byte	0x54
-	.uleb128 0x56
+	.uleb128 0x54
 	.uleb128 0x64
 	.string	"__v"
 	.byte	0x1
-	.byte	0x8e
-	.4byte	0xa3
+	.byte	0xb6
+	.4byte	0xae
 	.byte	0
 	.byte	0
 	.uleb128 0x61
-	.4byte	.LASF437
+	.4byte	.LASF447
 	.byte	0x1
-	.byte	0x72
+	.byte	0x9a
 	.4byte	0x54
 	.byte	0x1
-	.4byte	0x2e76
+	.4byte	0x3e44
 	.uleb128 0x62
 	.string	"otp"
 	.byte	0x1
-	.byte	0x72
-	.4byte	0x1952
+	.byte	0x9a
+	.4byte	0x196d
 	.uleb128 0x65
-	.4byte	.LASF436
+	.4byte	.LASF446
 	.byte	0x1
-	.byte	0x74
+	.byte	0x9c
 	.4byte	0x54
 	.uleb128 0x65
-	.4byte	.LASF427
+	.4byte	.LASF433
 	.byte	0x1
-	.byte	0x75
+	.byte	0x9d
 	.4byte	0x54
 	.uleb128 0x64
 	.string	"ret"
 	.byte	0x1
-	.byte	0x75
+	.byte	0x9d
 	.4byte	0x54
-	.uleb128 0x56
+	.uleb128 0x54
 	.uleb128 0x64
 	.string	"__v"
 	.byte	0x1
-	.byte	0x78
-	.4byte	0xa3
+	.byte	0xa0
+	.4byte	0xae
 	.byte	0
 	.byte	0
 	.uleb128 0x61
-	.4byte	.LASF438
+	.4byte	.LASF448
 	.byte	0x1
-	.byte	0x5e
+	.byte	0x86
 	.4byte	0x54
 	.byte	0x1
-	.4byte	0x2ed3
+	.4byte	0x3ea1
 	.uleb128 0x62
 	.string	"otp"
 	.byte	0x1
-	.byte	0x5e
-	.4byte	0x1952
+	.byte	0x86
+	.4byte	0x196d
 	.uleb128 0x63
-	.4byte	.LASF439
+	.4byte	.LASF449
 	.byte	0x1
-	.byte	0x5f
-	.4byte	0xa3
+	.byte	0x87
+	.4byte	0xae
 	.uleb128 0x65
-	.4byte	.LASF436
+	.4byte	.LASF446
 	.byte	0x1
-	.byte	0x61
+	.byte	0x89
 	.4byte	0x54
+	.uleb128 0x51
+	.4byte	.LASF436
+	.4byte	0x2a2a
+	.4byte	.LASF448
 	.uleb128 0x53
-	.4byte	.LASF430
-	.4byte	0x2ee3
-	.4byte	.LASF438
-	.uleb128 0x55
-	.4byte	0x2ec5
+	.4byte	0x3e93
 	.uleb128 0x64
 	.string	"__v"
 	.byte	0x1
-	.byte	0x63
-	.4byte	0xa3
+	.byte	0x8b
+	.4byte	0xae
 	.byte	0
-	.uleb128 0x56
+	.uleb128 0x54
 	.uleb128 0x64
 	.string	"__v"
 	.byte	0x1
-	.byte	0x6d
-	.4byte	0xa3
+	.byte	0x95
+	.4byte	0xae
 	.byte	0
 	.byte	0
-	.uleb128 0xa
-	.4byte	0xe3
-	.4byte	0x2ee3
-	.uleb128 0x11
-	.4byte	0xcf
-	.byte	0x1f
+	.uleb128 0x66
+	.4byte	.LASF453
+	.byte	0x1
+	.byte	0x66
+	.8byte	.LFB271
+	.8byte	.LFE271-.LFB271
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3f3c
+	.uleb128 0x5b
+	.4byte	.LASF450
+	.byte	0x1
+	.byte	0x66
+	.4byte	0x17c5
+	.4byte	.LLST14
+	.uleb128 0x5b
+	.4byte	.LASF451
+	.byte	0x1
+	.byte	0x67
+	.4byte	0x17c5
+	.4byte	.LLST15
+	.uleb128 0x67
+	.4byte	.LASF452
+	.byte	0x1
+	.byte	0x68
+	.4byte	0x3b
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x5b
+	.4byte	.LASF429
+	.byte	0x1
+	.byte	0x68
+	.4byte	0x54
+	.4byte	.LLST16
+	.uleb128 0x45
+	.8byte	.LBB46
+	.8byte	.LBE46-.LBB46
+	.4byte	0x3f1d
+	.uleb128 0x5f
+	.string	"__v"
+	.byte	0x1
+	.byte	0x6a
+	.4byte	0xae
+	.4byte	0x20000
 	.byte	0
-	.uleb128 0x7
-	.4byte	0x2ed3
-	.uleb128 0x61
-	.4byte	.LASF440
+	.uleb128 0x68
+	.8byte	.LBB47
+	.8byte	.LBE47-.LBB47
+	.uleb128 0x69
+	.string	"__v"
 	.byte	0x1
-	.byte	0x4e
+	.byte	0x6b
+	.4byte	0xae
+	.sleb128 -1
+	.byte	0
+	.byte	0
+	.uleb128 0x66
+	.4byte	.LASF454
+	.byte	0x1
+	.byte	0x5a
+	.8byte	.LFB270
+	.8byte	.LFE270-.LFB270
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4055
+	.uleb128 0x5b
+	.4byte	.LASF450
+	.byte	0x1
+	.byte	0x5a
+	.4byte	0x17c5
+	.4byte	.LLST32
+	.uleb128 0x5b
+	.4byte	.LASF451
+	.byte	0x1
+	.byte	0x5b
+	.4byte	0x17c5
+	.4byte	.LLST33
+	.uleb128 0x5b
+	.4byte	.LASF452
+	.byte	0x1
+	.byte	0x5c
+	.4byte	0x3b
+	.4byte	.LLST34
+	.uleb128 0x5b
+	.4byte	.LASF429
+	.byte	0x1
+	.byte	0x5c
 	.4byte	0x54
+	.4byte	.LLST35
+	.uleb128 0x45
+	.8byte	.LBB50
+	.8byte	.LBE50-.LBB50
+	.4byte	0x3fb9
+	.uleb128 0x69
+	.string	"__v"
 	.byte	0x1
-	.4byte	0x2f22
-	.uleb128 0x63
-	.4byte	.LASF386
+	.byte	0x5e
+	.4byte	0xae
+	.sleb128 -65536
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LBB51
+	.8byte	.LBE51-.LBB51
+	.4byte	0x3fde
+	.uleb128 0x5f
+	.string	"__v"
 	.byte	0x1
-	.byte	0x4e
-	.4byte	0x94
-	.uleb128 0x63
-	.4byte	.LASF433
+	.byte	0x5f
+	.4byte	0xae
+	.4byte	0x20002
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LBB52
+	.8byte	.LBE52-.LBB52
+	.4byte	0x4004
+	.uleb128 0x69
+	.string	"__v"
 	.byte	0x1
-	.byte	0x4e
-	.4byte	0x94
-	.uleb128 0x64
-	.string	"d"
+	.byte	0x60
+	.4byte	0xae
+	.sleb128 -2147450880
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LBB53
+	.8byte	.LBE53-.LBB53
+	.4byte	0x402a
+	.uleb128 0x69
+	.string	"__v"
 	.byte	0x1
+	.byte	0x62
+	.4byte	0xae
+	.sleb128 -2147483648
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL63
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-	.8byte	.LC2
+	.8byte	.LC3
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x51
@@ -7729,8 +11295,8 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL44
-	.4byte	0x339d
+	.8byte	.LVL91
+	.4byte	0x4776
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -7738,41 +11304,157 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x31
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
-	.4byte	.LASF449
-	.4byte	.LASF449
+	.uleb128 0x6c
+	.4byte	0x3d0f
+	.8byte	.LFB292
+	.8byte	.LFE292-.LFB292
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4731
+	.uleb128 0x3a
+	.4byte	0x3d1f
+	.4byte	.LLST46
+	.uleb128 0x42
+	.4byte	0x3d35
+	.4byte	.LLST47
+	.uleb128 0x6e
+	.4byte	0x3d2a
+	.byte	0x1
+	.uleb128 0x44
+	.4byte	0x3d40
+	.uleb128 0x45
+	.8byte	.LBB80
+	.8byte	.LBE80-.LBB80
+	.4byte	0x462c
+	.uleb128 0x47
+	.4byte	0x3d52
+	.sleb128 -16776704
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LBB81
+	.8byte	.LBE81-.LBB81
+	.4byte	0x464a
+	.uleb128 0x47
+	.4byte	0x3d63
+	.sleb128 -65535
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LBB82
+	.8byte	.LBE82-.LBB82
+	.4byte	0x4666
+	.uleb128 0x48
+	.4byte	0x3d74
+	.byte	0xfa
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LBB83
+	.8byte	.LBE83-.LBB83
+	.4byte	0x4682
+	.uleb128 0x48
+	.4byte	0x3d85
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LBB84
+	.8byte	.LBE84-.LBB84
+	.4byte	0x46a1
+	.uleb128 0x46
+	.4byte	0x3da3
+	.4byte	0x10001
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LBB85
+	.8byte	.LBE85-.LBB85
+	.4byte	0x470d
+	.uleb128 0x3a
+	.4byte	0x3d1f
+	.4byte	.LLST48
+	.uleb128 0x3a
+	.4byte	0x3d2a
+	.4byte	.LLST49
+	.uleb128 0x68
+	.8byte	.LBB86
+	.8byte	.LBE86-.LBB86
+	.uleb128 0x44
+	.4byte	0x3d35
+	.uleb128 0x44
+	.4byte	0x3d40
+	.uleb128 0x36
+	.8byte	.LVL106
+	.4byte	0x475f
+	.uleb128 0x35
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC4
+	.uleb128 0x35
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR1
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL102
+	.4byte	0x44e8
+	.uleb128 0x35
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x35
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x32
+	.uleb128 0x4d
+	.4byte	0x3e54
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0
+	.byte	0
+	.uleb128 0x6f
+	.4byte	.LASF461
+	.4byte	.LASF461
 	.byte	0x8
 	.2byte	0x112
-	.uleb128 0x6c
-	.4byte	.LASF450
-	.4byte	.LASF450
+	.uleb128 0x70
+	.4byte	.LASF462
+	.4byte	.LASF462
 	.byte	0x20
 	.byte	0x85
-	.uleb128 0x6c
-	.4byte	.LASF451
-	.4byte	.LASF451
-	.byte	0x20
-	.byte	0x38
-	.uleb128 0x6c
-	.4byte	.LASF452
-	.4byte	.LASF452
-	.byte	0x21
-	.byte	0xb
-	.uleb128 0x6c
-	.4byte	.LASF453
-	.4byte	.LASF453
-	.byte	0x22
-	.byte	0x13
-	.uleb128 0x6b
-	.4byte	.LASF454
-	.4byte	.LASF454
+	.uleb128 0x70
+	.4byte	.LASF463
+	.4byte	.LASF463
+	.byte	0x20
+	.byte	0x38
+	.uleb128 0x6f
+	.4byte	.LASF464
+	.4byte	.LASF464
 	.byte	0x8
 	.2byte	0x16b
-	.uleb128 0x6b
-	.4byte	.LASF455
-	.4byte	.LASF455
+	.uleb128 0x70
+	.4byte	.LASF465
+	.4byte	.LASF465
+	.byte	0x21
+	.byte	0x13
+	.uleb128 0x6f
+	.4byte	.LASF466
+	.4byte	.LASF466
 	.byte	0x1a
 	.2byte	0x393
+	.uleb128 0x70
+	.4byte	.LASF467
+	.4byte	.LASF467
+	.byte	0x22
+	.byte	0xb
 	.byte	0
 	.section	.debug_abbrev,"",@progbits
 .Ldebug_abbrev0:
@@ -8020,6 +11702,21 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0
 	.byte	0
 	.uleb128 0x16
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x17
 	.uleb128 0x21
 	.byte	0
 	.uleb128 0x49
@@ -8028,7 +11725,16 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x5
 	.byte	0
 	.byte	0
-	.uleb128 0x17
+	.uleb128 0x18
+	.uleb128 0x13
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3c
+	.uleb128 0x19
+	.byte	0
+	.byte	0
+	.uleb128 0x19
 	.uleb128 0x13
 	.byte	0x1
 	.uleb128 0x3
@@ -8043,7 +11749,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x18
+	.uleb128 0x1a
 	.uleb128 0x13
 	.byte	0x1
 	.uleb128 0x3
@@ -8058,7 +11764,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x19
+	.uleb128 0x1b
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -8075,7 +11781,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x1a
+	.uleb128 0x1c
 	.uleb128 0x13
 	.byte	0x1
 	.uleb128 0xb
@@ -8088,7 +11794,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x1b
+	.uleb128 0x1d
 	.uleb128 0x13
 	.byte	0x1
 	.uleb128 0x3
@@ -8103,7 +11809,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x1c
+	.uleb128 0x1e
 	.uleb128 0xd
 	.byte	0
 	.uleb128 0x3
@@ -8118,7 +11824,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x1d
+	.uleb128 0x1f
 	.uleb128 0x16
 	.byte	0
 	.uleb128 0x3
@@ -8131,7 +11837,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x1e
+	.uleb128 0x20
 	.uleb128 0xd
 	.byte	0
 	.uleb128 0x3
@@ -8146,7 +11852,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x1f
+	.uleb128 0x21
 	.uleb128 0x13
 	.byte	0x1
 	.uleb128 0x3
@@ -8161,7 +11867,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x20
+	.uleb128 0x22
 	.uleb128 0xd
 	.byte	0
 	.uleb128 0x3
@@ -8176,7 +11882,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x5
 	.byte	0
 	.byte	0
-	.uleb128 0x21
+	.uleb128 0x23
 	.uleb128 0xd
 	.byte	0
 	.uleb128 0x3
@@ -8191,7 +11897,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x5
 	.byte	0
 	.byte	0
-	.uleb128 0x22
+	.uleb128 0x24
 	.uleb128 0x4
 	.byte	0x1
 	.uleb128 0x3
@@ -8208,7 +11914,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x23
+	.uleb128 0x25
 	.uleb128 0x28
 	.byte	0
 	.uleb128 0x3
@@ -8217,7 +11923,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x24
+	.uleb128 0x26
 	.uleb128 0x28
 	.byte	0
 	.uleb128 0x3
@@ -8226,7 +11932,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0xd
 	.byte	0
 	.byte	0
-	.uleb128 0x25
+	.uleb128 0x27
 	.uleb128 0x4
 	.byte	0x1
 	.uleb128 0xb
@@ -8241,23 +11947,14 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x26
-	.uleb128 0x13
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3c
-	.uleb128 0x19
-	.byte	0
-	.byte	0
-	.uleb128 0x27
+	.uleb128 0x28
 	.uleb128 0x35
 	.byte	0
 	.uleb128 0x49
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x28
+	.uleb128 0x29
 	.uleb128 0x15
 	.byte	0x1
 	.uleb128 0x27
@@ -8266,7 +11963,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x29
+	.uleb128 0x2a
 	.uleb128 0x4
 	.byte	0x1
 	.uleb128 0x3
@@ -8283,7 +11980,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x2a
+	.uleb128 0x2b
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -8298,7 +11995,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x2b
+	.uleb128 0x2c
 	.uleb128 0x17
 	.byte	0x1
 	.uleb128 0x3
@@ -8313,24 +12010,11 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x2c
-	.uleb128 0xd
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.byte	0
-	.byte	0
 	.uleb128 0x2d
 	.uleb128 0xd
 	.byte	0
 	.uleb128 0x3
-	.uleb128 0xe
+	.uleb128 0x8
 	.uleb128 0x3a
 	.uleb128 0xb
 	.uleb128 0x3b
@@ -8343,21 +12027,13 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0xd
 	.byte	0
 	.uleb128 0x3
-	.uleb128 0x8
+	.uleb128 0xe
 	.uleb128 0x3a
 	.uleb128 0xb
 	.uleb128 0x3b
 	.uleb128 0xb
 	.uleb128 0x49
 	.uleb128 0x13
-	.uleb128 0xb
-	.uleb128 0xb
-	.uleb128 0xd
-	.uleb128 0xb
-	.uleb128 0xc
-	.uleb128 0xb
-	.uleb128 0x38
-	.uleb128 0xb
 	.byte	0
 	.byte	0
 	.uleb128 0x2f
@@ -8593,6 +12269,15 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0
 	.byte	0
 	.uleb128 0x3f
+	.uleb128 0x4109
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x2115
+	.uleb128 0x19
+	.byte	0
+	.byte	0
+	.uleb128 0x40
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -8609,14 +12294,14 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x40
+	.uleb128 0x41
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x55
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x41
+	.uleb128 0x42
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -8625,7 +12310,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x42
+	.uleb128 0x43
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x31
@@ -8634,14 +12319,14 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x1
 	.byte	0
 	.byte	0
-	.uleb128 0x43
+	.uleb128 0x44
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x44
+	.uleb128 0x45
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x11
@@ -8652,7 +12337,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x45
+	.uleb128 0x46
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -8661,7 +12346,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x6
 	.byte	0
 	.byte	0
-	.uleb128 0x46
+	.uleb128 0x47
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -8670,7 +12355,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0xd
 	.byte	0
 	.byte	0
-	.uleb128 0x47
+	.uleb128 0x48
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -8679,7 +12364,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x48
+	.uleb128 0x49
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -8688,7 +12373,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x49
+	.uleb128 0x4a
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x55
@@ -8697,67 +12382,197 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4a
-	.uleb128 0x1d
-	.byte	0x1
+	.uleb128 0x4b
+	.uleb128 0x4109
+	.byte	0
+	.uleb128 0x11
+	.uleb128 0x1
 	.uleb128 0x31
 	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x4c
+	.uleb128 0x4109
+	.byte	0x1
 	.uleb128 0x11
 	.uleb128 0x1
-	.uleb128 0x12
-	.uleb128 0x7
-	.uleb128 0x58
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x4d
+	.uleb128 0x410a
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2111
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x4e
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
 	.uleb128 0xb
-	.uleb128 0x59
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x4f
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x50
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x51
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x34
+	.uleb128 0x19
+	.uleb128 0x1c
+	.uleb128 0xe
+	.byte	0
+	.byte	0
+	.uleb128 0x52
+	.uleb128 0xa
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
 	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x53
+	.uleb128 0xb
+	.byte	0x1
 	.uleb128 0x1
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4b
+	.uleb128 0x54
+	.uleb128 0xb
+	.byte	0x1
+	.byte	0
+	.byte	0
+	.uleb128 0x55
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x34
+	.uleb128 0x19
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x56
+	.uleb128 0xa
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
 	.uleb128 0x5
+	.uleb128 0x11
+	.uleb128 0x1
 	.byte	0
-	.uleb128 0x31
-	.uleb128 0x13
 	.byte	0
+	.uleb128 0x57
+	.uleb128 0x34
 	.byte	0
-	.uleb128 0x4c
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
 	.uleb128 0xb
-	.byte	0x1
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x12
-	.uleb128 0x7
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x1c
+	.uleb128 0x6
 	.byte	0
 	.byte	0
-	.uleb128 0x4d
+	.uleb128 0x58
 	.uleb128 0x4109
-	.byte	0
+	.byte	0x1
 	.uleb128 0x11
 	.uleb128 0x1
-	.uleb128 0x31
-	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4e
-	.uleb128 0x4109
+	.uleb128 0x59
+	.uleb128 0x2e
 	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
 	.uleb128 0x11
 	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
 	.uleb128 0x1
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4f
-	.uleb128 0x410a
+	.uleb128 0x5a
+	.uleb128 0x5
 	.byte	0
-	.uleb128 0x31
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
 	.uleb128 0x13
-	.uleb128 0x2111
-	.uleb128 0x18
+	.uleb128 0x2
+	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x50
+	.uleb128 0x5b
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -8765,12 +12580,14 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x3a
 	.uleb128 0xb
 	.uleb128 0x3b
-	.uleb128 0x5
+	.uleb128 0xb
 	.uleb128 0x49
 	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x51
+	.uleb128 0x5c
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -8778,12 +12595,14 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x3a
 	.uleb128 0xb
 	.uleb128 0x3b
-	.uleb128 0x5
+	.uleb128 0xb
 	.uleb128 0x49
 	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x52
+	.uleb128 0x5d
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -8791,48 +12610,59 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x3a
 	.uleb128 0xb
 	.uleb128 0x3b
-	.uleb128 0x5
+	.uleb128 0xb
 	.uleb128 0x49
 	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x53
+	.uleb128 0x5e
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
 	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
 	.uleb128 0x49
 	.uleb128 0x13
-	.uleb128 0x34
-	.uleb128 0x19
-	.uleb128 0x1c
-	.uleb128 0xe
+	.uleb128 0x2
+	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x54
-	.uleb128 0xa
+	.uleb128 0x5f
+	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
-	.uleb128 0xe
+	.uleb128 0x8
 	.uleb128 0x3a
 	.uleb128 0xb
 	.uleb128 0x3b
-	.uleb128 0x5
-	.byte	0
-	.byte	0
-	.uleb128 0x55
 	.uleb128 0xb
-	.byte	0x1
-	.uleb128 0x1
+	.uleb128 0x49
 	.uleb128 0x13
+	.uleb128 0x1c
+	.uleb128 0x6
 	.byte	0
 	.byte	0
-	.uleb128 0x56
+	.uleb128 0x60
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
 	.uleb128 0xb
-	.byte	0x1
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x57
+	.uleb128 0x61
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -8845,19 +12675,13 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x19
 	.uleb128 0x49
 	.uleb128 0x13
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x12
-	.uleb128 0x7
-	.uleb128 0x40
-	.uleb128 0x18
-	.uleb128 0x2117
-	.uleb128 0x19
+	.uleb128 0x20
+	.uleb128 0xb
 	.uleb128 0x1
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x58
+	.uleb128 0x62
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -8868,11 +12692,9 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0xb
 	.uleb128 0x49
 	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x59
+	.uleb128 0x63
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -8883,11 +12705,9 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0xb
 	.uleb128 0x49
 	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x5a
+	.uleb128 0x64
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -8898,11 +12718,9 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0xb
 	.uleb128 0x49
 	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x5b
+	.uleb128 0x65
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -8913,52 +12731,56 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0xb
 	.uleb128 0x49
 	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x5c
-	.uleb128 0x34
-	.byte	0
+	.uleb128 0x66
+	.uleb128 0x2e
+	.byte	0x1
 	.uleb128 0x3
-	.uleb128 0x8
+	.uleb128 0xe
 	.uleb128 0x3a
 	.uleb128 0xb
 	.uleb128 0x3b
 	.uleb128 0xb
-	.uleb128 0x49
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
 	.uleb128 0x13
-	.uleb128 0x1c
-	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x5d
-	.uleb128 0x34
+	.uleb128 0x67
+	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
 	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
 	.uleb128 0x49
 	.uleb128 0x13
-	.uleb128 0x34
-	.uleb128 0x19
 	.uleb128 0x2
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x5e
-	.uleb128 0xa
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
+	.uleb128 0x68
 	.uleb128 0xb
+	.byte	0x1
 	.uleb128 0x11
 	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
 	.byte	0
 	.byte	0
-	.uleb128 0x5f
+	.uleb128 0x69
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -8970,11 +12792,39 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x49
 	.uleb128 0x13
 	.uleb128 0x1c
-	.uleb128 0x6
+	.uleb128 0xd
 	.byte	0
 	.byte	0
-	.uleb128 0x60
-	.uleb128 0x1d
+	.uleb128 0x6a
+	.uleb128 0x4109
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x2115
+	.uleb128 0x19
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x6b
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x20
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x6c
+	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x31
 	.uleb128 0x13
@@ -8982,222 +12832,893 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x1
 	.uleb128 0x12
 	.uleb128 0x7
-	.uleb128 0x58
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x6d
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x6e
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x1c
 	.uleb128 0xb
-	.uleb128 0x59
+	.byte	0
+	.byte	0
+	.uleb128 0x6f
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
 	.uleb128 0xb
-	.uleb128 0x1
-	.uleb128 0x13
+	.uleb128 0x3b
+	.uleb128 0x5
 	.byte	0
 	.byte	0
-	.uleb128 0x61
+	.uleb128 0x70
 	.uleb128 0x2e
-	.byte	0x1
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
 	.uleb128 0x3
 	.uleb128 0xe
 	.uleb128 0x3a
 	.uleb128 0xb
 	.uleb128 0x3b
 	.uleb128 0xb
-	.uleb128 0x27
-	.uleb128 0x19
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x20
-	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.byte	0
+	.section	.debug_loc,"",@progbits
+.Ldebug_loc0:
+.LLST30:
+	.8byte	.LVL48
+	.8byte	.LVL49-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL49-1
+	.8byte	.LVL56
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL56
+	.8byte	.LFE286
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST31:
+	.8byte	.LVL50
+	.8byte	.LVL51
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL51
+	.8byte	.LVL56
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST17:
+	.8byte	.LVL31
+	.8byte	.LVL32
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL32
+	.8byte	.LFE285
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST18:
+	.8byte	.LVL31
+	.8byte	.LVL34
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xea
+	.byte	0x9f
+	.8byte	.LVL35
+	.8byte	.LFE285
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xea
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST19:
+	.8byte	.LVL33
+	.8byte	.LVL34
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST20:
+	.8byte	.LVL36
+	.8byte	.LVL37-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL37-1
+	.8byte	.LVL40
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL40
+	.8byte	.LVL41-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL41-1
+	.8byte	.LFE283
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST21:
+	.8byte	.LVL36
+	.8byte	.LVL37-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL37-1
+	.8byte	.LVL40
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL40
+	.8byte	.LVL41-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL41-1
+	.8byte	.LFE283
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST22:
+	.8byte	.LVL36
+	.8byte	.LVL37-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL37-1
+	.8byte	.LVL39
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL39
+	.8byte	.LVL41-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL41-1
+	.8byte	.LFE283
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST23:
+	.8byte	.LVL36
+	.8byte	.LVL37-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL37-1
+	.8byte	.LVL39
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL39
+	.8byte	.LVL41-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL41-1
+	.8byte	.LFE283
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST24:
+	.8byte	.LVL37
+	.8byte	.LVL38
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST25:
+	.8byte	.LVL42
+	.8byte	.LVL43-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL43-1
+	.8byte	.LVL46
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL46
+	.8byte	.LVL47-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL47-1
+	.8byte	.LFE282
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST26:
+	.8byte	.LVL42
+	.8byte	.LVL43-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL43-1
+	.8byte	.LVL46
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL46
+	.8byte	.LVL47-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL47-1
+	.8byte	.LFE282
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST27:
+	.8byte	.LVL42
+	.8byte	.LVL43-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL43-1
+	.8byte	.LVL45
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL45
+	.8byte	.LVL47-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL47-1
+	.8byte	.LFE282
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST28:
+	.8byte	.LVL42
+	.8byte	.LVL43-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL43-1
+	.8byte	.LVL45
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL45
+	.8byte	.LVL47-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL47-1
+	.8byte	.LFE282
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST29:
+	.8byte	.LVL43
+	.8byte	.LVL44
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST74:
+	.8byte	.LVL175
+	.8byte	.LVL176-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL176-1
+	.8byte	.LVL186
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 232
+	.8byte	.LVL186
+	.8byte	.LVL187
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 104
+	.8byte	.LVL187
+	.8byte	.LFE281
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 232
+	.8byte	0
+	.8byte	0
+.LLST75:
+	.8byte	.LVL175
+	.8byte	.LVL176-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL176-1
+	.8byte	.LVL181
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL181
+	.8byte	.LVL183
+	.2byte	0x4
+	.byte	0xf3
 	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x62
-	.uleb128 0x5
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x63
-	.uleb128 0x5
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x64
-	.uleb128 0x34
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x65
-	.uleb128 0x34
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x66
-	.uleb128 0x2e
-	.byte	0x1
-	.uleb128 0x3f
-	.uleb128 0x19
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x27
-	.uleb128 0x19
-	.uleb128 0x11
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL183
+	.8byte	.LVL184
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL184
+	.8byte	.LVL187
+	.2byte	0x4
+	.byte	0xf3
 	.uleb128 0x1
-	.uleb128 0x12
-	.uleb128 0x7
-	.uleb128 0x40
-	.uleb128 0x18
-	.uleb128 0x2117
-	.uleb128 0x19
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL187
+	.8byte	.LVL193
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL193
+	.8byte	.LVL194
+	.2byte	0x4
+	.byte	0xf3
 	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x67
-	.uleb128 0x5
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x18
-	.byte	0
-	.byte	0
-	.uleb128 0x68
-	.uleb128 0x34
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x1c
-	.uleb128 0xd
-	.byte	0
-	.byte	0
-	.uleb128 0x69
-	.uleb128 0x2e
-	.byte	0x1
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0x5
-	.uleb128 0x27
-	.uleb128 0x19
-	.uleb128 0x20
-	.uleb128 0xb
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL194
+	.8byte	.LVL196
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL196
+	.8byte	.LFE281
+	.2byte	0x4
+	.byte	0xf3
 	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x6a
-	.uleb128 0x2e
-	.byte	0x1
-	.uleb128 0x31
-	.uleb128 0x13
-	.uleb128 0x11
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST76:
+	.8byte	.LVL175
+	.8byte	.LVL176-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL176-1
+	.8byte	.LVL186
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 216
+	.8byte	.LVL186
+	.8byte	.LVL187
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 88
+	.8byte	.LVL187
+	.8byte	.LFE281
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 216
+	.8byte	0
+	.8byte	0
+.LLST77:
+	.8byte	.LVL175
+	.8byte	.LVL176-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL176-1
+	.8byte	.LVL181
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL181
+	.8byte	.LVL183
+	.2byte	0x4
+	.byte	0xf3
 	.uleb128 0x1
-	.uleb128 0x12
-	.uleb128 0x7
-	.uleb128 0x40
-	.uleb128 0x18
-	.uleb128 0x2117
-	.uleb128 0x19
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL183
+	.8byte	.LVL184
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL184
+	.8byte	.LVL187
+	.2byte	0x4
+	.byte	0xf3
 	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x6b
-	.uleb128 0x2e
-	.byte	0
-	.uleb128 0x3f
-	.uleb128 0x19
-	.uleb128 0x3c
-	.uleb128 0x19
-	.uleb128 0x6e
-	.uleb128 0xe
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0x5
-	.byte	0
-	.byte	0
-	.uleb128 0x6c
-	.uleb128 0x2e
-	.byte	0
-	.uleb128 0x3f
-	.uleb128 0x19
-	.uleb128 0x3c
-	.uleb128 0x19
-	.uleb128 0x6e
-	.uleb128 0xe
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.byte	0
-	.byte	0
-	.byte	0
-	.section	.debug_loc,"",@progbits
-.Ldebug_loc0:
-.LLST15:
-	.8byte	.LVL29
-	.8byte	.LVL30-1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL187
+	.8byte	.LVL192
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL192
+	.8byte	.LVL194
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL194
+	.8byte	.LVL196
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL196
+	.8byte	.LFE281
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST78:
+	.8byte	.LVL177
+	.8byte	.LVL178
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL178
+	.8byte	.LVL185
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL187
+	.8byte	.LFE281
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	0
+	.8byte	0
+.LLST79:
+	.8byte	.LVL177
+	.8byte	.LVL186
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 216
+	.8byte	.LVL186
+	.8byte	.LVL187
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 88
+	.8byte	.LVL187
+	.8byte	.LFE281
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 216
+	.8byte	0
+	.8byte	0
+.LLST80:
+	.8byte	.LVL179
+	.8byte	.LVL180
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL183
+	.8byte	.LVL184
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL187
+	.8byte	.LVL188
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL188
+	.8byte	.LVL193
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL194
+	.8byte	.LVL196
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST81:
+	.8byte	.LVL190
+	.8byte	.LVL191
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL193
+	.8byte	.LVL194
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL194
+	.8byte	.LVL195
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL196
+	.8byte	.LVL201
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL201
+	.8byte	.LVL202
+	.2byte	0x3
+	.byte	0x88
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL203
+	.8byte	.LFE281
+	.2byte	0x1
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST82:
+	.8byte	.LVL179
+	.8byte	.LVL181
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL183
+	.8byte	.LVL184
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL187
+	.8byte	.LVL189
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL189
+	.8byte	.LVL190
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL193
+	.8byte	.LVL194
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL196
+	.8byte	.LVL201
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL203
+	.8byte	.LVL231
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL232
+	.8byte	.LFE281
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST83:
+	.8byte	.LVL197
+	.8byte	.LVL201
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL203
+	.8byte	.LVL229
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL232
+	.8byte	.LVL266
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST84:
+	.8byte	.LVL197
+	.8byte	.LVL201
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL203
+	.8byte	.LVL231
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL232
+	.8byte	.LFE281
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST85:
+	.8byte	.LVL197
+	.8byte	.LVL201
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL203
+	.8byte	.LVL231
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL232
+	.8byte	.LFE281
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	0
+	.8byte	0
+.LLST86:
+	.8byte	.LVL197
+	.8byte	.LVL201
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 232
+	.8byte	.LVL203
+	.8byte	.LVL231
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 232
+	.8byte	.LVL232
+	.8byte	.LFE281
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 232
+	.8byte	0
+	.8byte	0
+.LLST87:
+	.8byte	.LVL197
+	.8byte	.LVL201
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL203
+	.8byte	.LVL227
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL227
+	.8byte	.LVL228
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL228
+	.8byte	.LVL231
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL232
+	.8byte	.LVL233
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL233
+	.8byte	.LVL251
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL251
+	.8byte	.LVL252
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL252
+	.8byte	.LVL253
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL253
+	.8byte	.LVL254
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL254
+	.8byte	.LVL260
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL260
+	.8byte	.LVL261
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL261
+	.8byte	.LVL262
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL262
+	.8byte	.LVL263
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL263
+	.8byte	.LVL270
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL270
+	.8byte	.LVL271
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL271
+	.8byte	.LVL272
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL272
+	.8byte	.LVL273
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL273
+	.8byte	.LVL279
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL279
+	.8byte	.LVL280
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL280
+	.8byte	.LVL281
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL281
+	.8byte	.LVL282
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL282
+	.8byte	.LVL289
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL289
+	.8byte	.LVL290
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL290
+	.8byte	.LVL291
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL291
+	.8byte	.LVL292
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL292
+	.8byte	.LVL294
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL294
+	.8byte	.LVL295
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL295
+	.8byte	.LVL296
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL296
+	.8byte	.LVL297
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL297
+	.8byte	.LVL302
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL302
+	.8byte	.LVL303
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL303
+	.8byte	.LVL304
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL304
+	.8byte	.LVL305
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL305
+	.8byte	.LVL307
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL307
+	.8byte	.LVL308
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL308
+	.8byte	.LFE281
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	0
+	.8byte	0
+.LLST88:
+	.8byte	.LVL199
+	.8byte	.LVL200
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL200
+	.8byte	.LVL201
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL203
+	.8byte	.LVL231
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL232
+	.8byte	.LFE281
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	0
+	.8byte	0
+.LLST89:
+	.8byte	.LVL222
+	.8byte	.LVL224
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL224
+	.8byte	.LVL225
+	.2byte	0x6
+	.byte	0x8a
+	.sleb128 0
+	.byte	0x6
+	.byte	0x23
+	.uleb128 0x1038
+	.8byte	.LVL225
+	.8byte	.LVL231
+	.2byte	0x6
+	.byte	0x83
+	.sleb128 0
+	.byte	0x9
+	.byte	0xf8
+	.byte	0x24
+	.byte	0x9f
+	.8byte	.LVL232
+	.8byte	.LFE281
+	.2byte	0x6
+	.byte	0x83
+	.sleb128 0
+	.byte	0x9
+	.byte	0xf8
+	.byte	0x24
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST90:
+	.8byte	.LVL230
+	.8byte	.LVL232
+	.2byte	0x5
+	.byte	0x11
+	.sleb128 -65533
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST91:
+	.8byte	.LVL265
+	.8byte	.LVL268
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST92:
+	.8byte	.LVL266
+	.8byte	.LVL285
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST50:
+	.8byte	.LVL108
+	.8byte	.LVL109-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL30-1
-	.8byte	.LVL36
+	.8byte	.LVL109-1
+	.8byte	.LVL117
 	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL36
-	.8byte	.LFE280
+	.byte	0x66
+	.8byte	.LVL117
+	.8byte	.LFE279
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9205,108 +13726,282 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST16:
-	.8byte	.LVL31
-	.8byte	.LVL32
+.LLST51:
+	.8byte	.LVL108
+	.8byte	.LVL109-1
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL32
-	.8byte	.LVL36
+	.byte	0x51
+	.8byte	.LVL109-1
+	.8byte	.LVL131
 	.2byte	0x1
-	.byte	0x63
+	.byte	0x64
+	.8byte	.LVL133
+	.8byte	.LFE279
+	.2byte	0x1
+	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST12:
-	.8byte	.LVL24
-	.8byte	.LVL25
+.LLST52:
+	.8byte	.LVL108
+	.8byte	.LVL109-1
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL25
+	.byte	0x52
+	.8byte	.LVL109-1
+	.8byte	.LVL118
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL118
 	.8byte	.LFE279
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
-	.byte	0x50
+	.byte	0x52
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST13:
-	.8byte	.LVL24
-	.8byte	.LVL27
+.LLST53:
+	.8byte	.LVL108
+	.8byte	.LVL109-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL109-1
+	.8byte	.LVL118
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL118
+	.8byte	.LVL132
 	.2byte	0x3
-	.byte	0x9
-	.byte	0xea
+	.byte	0x87
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL133
+	.8byte	.LVL139
+	.2byte	0x3
+	.byte	0x87
+	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL28
+	.8byte	.LVL139
+	.8byte	.LFE279
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST54:
+	.8byte	.LVL110
+	.8byte	.LVL111
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL111
+	.8byte	.LVL131
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL133
 	.8byte	.LFE279
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST55:
+	.8byte	.LVL113
+	.8byte	.LVL114
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL114
+	.8byte	.LVL132
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL133
+	.8byte	.LFE279
+	.2byte	0x1
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST56:
+	.8byte	.LVL113
+	.8byte	.LVL129
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL133
+	.8byte	.LVL136
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL136
+	.8byte	.LVL137
 	.2byte	0x3
-	.byte	0x9
-	.byte	0xea
+	.byte	0x85
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL137
+	.8byte	.LVL140
+	.2byte	0x3
+	.byte	0x85
+	.sleb128 2
 	.byte	0x9f
+	.8byte	.LVL140
+	.8byte	.LFE279
+	.2byte	0x1
+	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST14:
-	.8byte	.LVL26
-	.8byte	.LVL27
+.LLST57:
+	.8byte	.LVL136
+	.8byte	.LVL138
 	.2byte	0x1
-	.byte	0x52
+	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST43:
-	.8byte	.LVL97
-	.8byte	.LVL98-1
+.LLST58:
+	.8byte	.LVL113
+	.8byte	.LVL118
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL118
+	.8byte	.LVL120
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL121
+	.8byte	.LVL127
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL127
+	.8byte	.LVL128
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL98-1
-	.8byte	.LVL105
+	.8byte	.LVL128
+	.8byte	.LVL130
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL133
+	.8byte	.LVL134
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL134
+	.8byte	.LFE279
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST59:
+	.8byte	.LVL122
+	.8byte	.LVL124
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL124
+	.8byte	.LVL125
+	.2byte	0x6
+	.byte	0x83
+	.sleb128 0
+	.byte	0x6
+	.byte	0x23
+	.uleb128 0x104
+	.8byte	.LVL125
+	.8byte	.LVL129
+	.2byte	0x8
+	.byte	0x84
+	.sleb128 -2
+	.byte	0x11
+	.sleb128 -65536
+	.byte	0x21
+	.byte	0x9f
+	.8byte	.LVL133
+	.8byte	.LFE279
+	.2byte	0x8
+	.byte	0x84
+	.sleb128 -2
+	.byte	0x11
+	.sleb128 -65536
+	.byte	0x21
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST60:
+	.8byte	.LVL123
+	.8byte	.LVL129
+	.2byte	0x6
+	.byte	0xc
+	.4byte	0x10001
+	.byte	0x9f
+	.8byte	.LVL133
+	.8byte	.LFE279
+	.2byte	0x6
+	.byte	0xc
+	.4byte	0x10001
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST62:
+	.8byte	.LVL135
+	.8byte	.LVL138
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST61:
+	.8byte	.LVL129
+	.8byte	.LVL130
+	.2byte	0x4
+	.byte	0x40
+	.byte	0x3c
+	.byte	0x24
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST93:
+	.8byte	.LVL309
+	.8byte	.LVL310-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL310-1
+	.8byte	.LVL317
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 224
-	.8byte	.LVL105
-	.8byte	.LVL106
+	.8byte	.LVL317
+	.8byte	.LVL318
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 96
-	.8byte	.LVL106
-	.8byte	.LFE277
+	.8byte	.LVL318
+	.8byte	.LFE278
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 224
 	.8byte	0
 	.8byte	0
-.LLST44:
-	.8byte	.LVL97
-	.8byte	.LVL98-1
+.LLST94:
+	.8byte	.LVL309
+	.8byte	.LVL310-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL98-1
-	.8byte	.LVL102
+	.8byte	.LVL310-1
+	.8byte	.LVL314
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL102
-	.8byte	.LVL106
+	.8byte	.LVL314
+	.8byte	.LVL318
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL106
-	.8byte	.LVL111
+	.8byte	.LVL318
+	.8byte	.LVL323
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL111
-	.8byte	.LVL112
+	.8byte	.LVL323
+	.8byte	.LVL324
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL112
-	.8byte	.LVL114
+	.8byte	.LVL324
+	.8byte	.LVL326
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL114
-	.8byte	.LFE277
+	.8byte	.LVL326
+	.8byte	.LFE278
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9314,533 +14009,448 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST45:
-	.8byte	.LVL97
-	.8byte	.LVL98-1
+.LLST95:
+	.8byte	.LVL309
+	.8byte	.LVL310-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL98-1
-	.8byte	.LVL105
+	.8byte	.LVL310-1
+	.8byte	.LVL317
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 216
-	.8byte	.LVL105
-	.8byte	.LVL106
+	.8byte	.LVL317
+	.8byte	.LVL318
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 88
-	.8byte	.LVL106
-	.8byte	.LFE277
+	.8byte	.LVL318
+	.8byte	.LFE278
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 216
 	.8byte	0
 	.8byte	0
-.LLST46:
-	.8byte	.LVL97
-	.8byte	.LVL98-1
+.LLST96:
+	.8byte	.LVL309
+	.8byte	.LVL310-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL98-1
-	.8byte	.LVL103
+	.8byte	.LVL310-1
+	.8byte	.LVL315
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL103
-	.8byte	.LVL106
+	.8byte	.LVL315
+	.8byte	.LVL318
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x53
 	.byte	0x9f
-	.8byte	.LVL106
-	.8byte	.LFE277
+	.8byte	.LVL318
+	.8byte	.LFE278
 	.2byte	0x1
 	.byte	0x68
 	.8byte	0
 	.8byte	0
-.LLST47:
-	.8byte	.LVL99
-	.8byte	.LVL100
+.LLST97:
+	.8byte	.LVL311
+	.8byte	.LVL312
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL100
-	.8byte	.LVL104
+	.8byte	.LVL312
+	.8byte	.LVL316
 	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL106
-	.8byte	.LFE277
+	.byte	0x6b
+	.8byte	.LVL318
+	.8byte	.LFE278
 	.2byte	0x1
-	.byte	0x6c
+	.byte	0x6b
 	.8byte	0
 	.8byte	0
-.LLST48:
-	.8byte	.LVL99
-	.8byte	.LVL105
+.LLST98:
+	.8byte	.LVL311
+	.8byte	.LVL317
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 216
-	.8byte	.LVL105
-	.8byte	.LVL106
+	.8byte	.LVL317
+	.8byte	.LVL318
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 88
-	.8byte	.LVL106
-	.8byte	.LFE277
+	.8byte	.LVL318
+	.8byte	.LFE278
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 216
 	.8byte	0
 	.8byte	0
-.LLST49:
-	.8byte	.LVL101
-	.8byte	.LVL102
+.LLST99:
+	.8byte	.LVL313
+	.8byte	.LVL314
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL106
-	.8byte	.LVL107
+	.8byte	.LVL318
+	.8byte	.LVL319
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL107
-	.8byte	.LVL108-1
+	.8byte	.LVL319
+	.8byte	.LVL320-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL108-1
-	.8byte	.LVL110
+	.8byte	.LVL320-1
+	.8byte	.LVL322
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL112
-	.8byte	.LVL114
+	.8byte	.LVL324
+	.8byte	.LVL326
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST50:
-	.8byte	.LVL109
-	.8byte	.LVL111
+.LLST100:
+	.8byte	.LVL321
+	.8byte	.LVL323
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL112
-	.8byte	.LVL113
+	.8byte	.LVL324
+	.8byte	.LVL325
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST51:
-	.8byte	.LVL101
-	.8byte	.LVL102
+.LLST101:
+	.8byte	.LVL313
+	.8byte	.LVL314
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL106
-	.8byte	.LVL108
+	.8byte	.LVL318
+	.8byte	.LVL320
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL108
-	.8byte	.LVL109
+	.8byte	.LVL320
+	.8byte	.LVL321
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL111
-	.8byte	.LVL112
+	.8byte	.LVL323
+	.8byte	.LVL324
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL116
-	.8byte	.LVL121
+	.8byte	.LVL328
+	.8byte	.LVL333
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL122
-	.8byte	.LVL148
+	.8byte	.LVL334
+	.8byte	.LVL361
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL149
-	.8byte	.LFE277
+	.8byte	.LVL362
+	.8byte	.LFE278
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST52:
-	.8byte	.LVL117
-	.8byte	.LVL121
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 236
-	.8byte	.LVL122
-	.8byte	.LVL148
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 236
-	.8byte	.LVL149
-	.8byte	.LFE277
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 236
+.LLST102:
+	.8byte	.LVL329
+	.8byte	.LVL333
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL334
+	.8byte	.LVL359
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL362
+	.8byte	.LVL409
+	.2byte	0x1
+	.byte	0x6c
 	.8byte	0
 	.8byte	0
-.LLST53:
-	.8byte	.LVL117
-	.8byte	.LVL121
+.LLST103:
+	.8byte	.LVL329
+	.8byte	.LVL333
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL122
-	.8byte	.LVL148
+	.8byte	.LVL334
+	.8byte	.LVL361
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL149
-	.8byte	.LFE277
+	.8byte	.LVL362
+	.8byte	.LFE278
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST54:
-	.8byte	.LVL117
-	.8byte	.LVL121
+.LLST104:
+	.8byte	.LVL329
+	.8byte	.LVL333
 	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL122
-	.8byte	.LVL148
+	.byte	0x6b
+	.8byte	.LVL334
+	.8byte	.LVL361
 	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL149
-	.8byte	.LFE277
+	.byte	0x6b
+	.8byte	.LVL362
+	.8byte	.LFE278
 	.2byte	0x1
-	.byte	0x6c
+	.byte	0x6b
 	.8byte	0
 	.8byte	0
-.LLST55:
-	.8byte	.LVL117
-	.8byte	.LVL121
+.LLST105:
+	.8byte	.LVL329
+	.8byte	.LVL333
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 224
-	.8byte	.LVL122
-	.8byte	.LVL148
+	.8byte	.LVL334
+	.8byte	.LVL361
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 224
-	.8byte	.LVL149
-	.8byte	.LFE277
+	.8byte	.LVL362
+	.8byte	.LFE278
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 224
 	.8byte	0
 	.8byte	0
-.LLST56:
-	.8byte	.LVL117
-	.8byte	.LVL121
+.LLST106:
+	.8byte	.LVL329
+	.8byte	.LVL333
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL122
-	.8byte	.LVL145
+	.8byte	.LVL334
+	.8byte	.LVL357
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL145
-	.8byte	.LVL146
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL146
-	.8byte	.LVL148
-	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL149
-	.8byte	.LVL150
+	.8byte	.LVL357
+	.8byte	.LVL358
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL150
-	.8byte	.LVL168
+	.8byte	.LVL358
+	.8byte	.LVL361
 	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL168
-	.8byte	.LVL169
+	.byte	0x6a
+	.8byte	.LVL362
+	.8byte	.LVL363
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL169
-	.8byte	.LVL170
+	.8byte	.LVL363
+	.8byte	.LVL381
 	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL170
-	.8byte	.LVL171
+	.byte	0x6a
+	.8byte	.LVL381
+	.8byte	.LVL382
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL171
-	.8byte	.LVL177
+	.8byte	.LVL382
+	.8byte	.LVL383
 	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL177
-	.8byte	.LVL178
+	.byte	0x6a
+	.8byte	.LVL383
+	.8byte	.LVL384
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL178
-	.8byte	.LVL179
+	.8byte	.LVL384
+	.8byte	.LVL390
 	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL179
-	.8byte	.LVL180
+	.byte	0x6a
+	.8byte	.LVL390
+	.8byte	.LVL391
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL180
-	.8byte	.LVL184
+	.8byte	.LVL391
+	.8byte	.LVL392
 	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL184
-	.8byte	.LVL185
+	.byte	0x6a
+	.8byte	.LVL392
+	.8byte	.LVL393
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL185
-	.8byte	.LVL186
+	.8byte	.LVL393
+	.8byte	.LVL397
 	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL186
-	.8byte	.LVL187
+	.byte	0x6a
+	.8byte	.LVL397
+	.8byte	.LVL398
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL187
-	.8byte	.LVL192
+	.8byte	.LVL398
+	.8byte	.LVL399
 	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL192
-	.8byte	.LVL193
+	.byte	0x6a
+	.8byte	.LVL399
+	.8byte	.LVL400
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL193
-	.8byte	.LVL194
+	.8byte	.LVL400
+	.8byte	.LVL405
 	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL194
-	.8byte	.LVL195
+	.byte	0x6a
+	.8byte	.LVL405
+	.8byte	.LVL406
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL195
-	.8byte	.LVL201
-	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL201
-	.8byte	.LVL202
+	.8byte	.LVL406
+	.8byte	.LVL407
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL209
-	.8byte	.LVL210
+	.byte	0x6a
+	.8byte	.LVL407
+	.8byte	.LVL408
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL210
-	.8byte	.LVL211
+	.8byte	.LVL408
+	.8byte	.LVL415
 	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL211
-	.8byte	.LVL212
+	.byte	0x6a
+	.8byte	.LVL415
+	.8byte	.LVL416
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL212
-	.8byte	.LVL214
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL221
-	.8byte	.LVL222
+	.8byte	.LVL416
+	.8byte	.LVL417
 	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST57:
-	.8byte	.LVL119
-	.8byte	.LVL120
+	.byte	0x6a
+	.8byte	.LVL417
+	.8byte	.LVL418
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL120
-	.8byte	.LVL121
+	.8byte	.LVL418
+	.8byte	.LVL420
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL122
-	.8byte	.LVL148
+	.8byte	.LVL420
+	.8byte	.LVL421
 	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL149
-	.8byte	.LFE277
+	.byte	0x50
+	.8byte	.LVL421
+	.8byte	.LVL422
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	0
-	.8byte	0
-.LLST58:
-	.8byte	.LVL140
-	.8byte	.LVL142
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL142
-	.8byte	.LVL143
-	.2byte	0x6
-	.byte	0x8c
-	.sleb128 0
-	.byte	0x6
-	.byte	0x23
-	.uleb128 0x1038
-	.8byte	.LVL143
-	.8byte	.LVL148
-	.2byte	0x6
-	.byte	0x83
-	.sleb128 0
-	.byte	0x9
-	.byte	0xf8
-	.byte	0x24
-	.byte	0x9f
-	.8byte	.LVL149
-	.8byte	.LFE277
-	.2byte	0x6
-	.byte	0x83
-	.sleb128 0
-	.byte	0x9
-	.byte	0xf8
-	.byte	0x24
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST59:
-	.8byte	.LVL147
-	.8byte	.LVL149
-	.2byte	0x5
-	.byte	0x11
-	.sleb128 -65533
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST60:
-	.8byte	.LVL202
-	.8byte	.LVL205
-	.2byte	0x3
-	.byte	0x85
-	.sleb128 -1
-	.byte	0x9f
-	.8byte	.LVL205
-	.8byte	.LVL206
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL206
-	.8byte	.LVL209
-	.2byte	0x3
-	.byte	0x85
-	.sleb128 -1
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST61:
-	.8byte	.LVL204
-	.8byte	.LVL207
+	.8byte	.LVL422
+	.8byte	.LVL423
 	.2byte	0x1
 	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST62:
-	.8byte	.LVL203
-	.8byte	.LVL207
+	.8byte	.LVL423
+	.8byte	.LVL428
 	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST63:
-	.8byte	.LVL211
-	.8byte	.LVL214
-	.2byte	0x5
-	.byte	0x11
-	.sleb128 -65534
-	.byte	0x9f
-	.8byte	.LVL216
-	.8byte	.LFE277
-	.2byte	0x5
-	.byte	0x11
-	.sleb128 -65534
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST64:
-	.8byte	.LVL211
-	.8byte	.LVL214
-	.2byte	0x2
-	.byte	0x32
-	.byte	0x9f
-	.8byte	.LVL217
-	.8byte	.LFE277
-	.2byte	0x2
-	.byte	0x32
-	.byte	0x9f
+	.byte	0x6a
+	.8byte	.LVL428
+	.8byte	.LVL429
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL429
+	.8byte	.LVL430
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL430
+	.8byte	.LVL431
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL431
+	.8byte	.LVL433
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL433
+	.8byte	.LVL434
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL434
+	.8byte	.LFE278
+	.2byte	0x1
+	.byte	0x6a
 	.8byte	0
 	.8byte	0
-.LLST65:
-	.8byte	.LVL211
-	.8byte	.LVL214
+.LLST107:
+	.8byte	.LVL331
+	.8byte	.LVL332
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL332
+	.8byte	.LVL333
 	.2byte	0x3
-	.byte	0x8
-	.byte	0xbf
-	.byte	0x9f
-	.8byte	.LVL218
-	.8byte	.LFE277
+	.byte	0x8f
+	.sleb128 232
+	.8byte	.LVL334
+	.8byte	.LVL361
 	.2byte	0x3
-	.byte	0x8
-	.byte	0xbf
-	.byte	0x9f
+	.byte	0x8f
+	.sleb128 232
+	.8byte	.LVL362
+	.8byte	.LFE278
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 232
 	.8byte	0
 	.8byte	0
-.LLST66:
-	.8byte	.LVL211
-	.8byte	.LVL214
+.LLST108:
+	.8byte	.LVL352
+	.8byte	.LVL354
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL354
+	.8byte	.LVL355
 	.2byte	0x6
-	.byte	0xc
-	.4byte	0x10001
+	.byte	0x8b
+	.sleb128 0
+	.byte	0x6
+	.byte	0x23
+	.uleb128 0x1038
+	.8byte	.LVL355
+	.8byte	.LVL361
+	.2byte	0x6
+	.byte	0x83
+	.sleb128 0
+	.byte	0x9
+	.byte	0xf8
+	.byte	0x24
 	.byte	0x9f
-	.8byte	.LVL219
-	.8byte	.LFE277
+	.8byte	.LVL362
+	.8byte	.LFE278
 	.2byte	0x6
-	.byte	0xc
-	.4byte	0x10001
+	.byte	0x83
+	.sleb128 0
+	.byte	0x9
+	.byte	0xf8
+	.byte	0x24
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST67:
-	.8byte	.LVL222
-	.8byte	.LVL225
-	.2byte	0x3
-	.byte	0x85
-	.sleb128 -1
-	.byte	0x9f
-	.8byte	.LVL225
-	.8byte	.LVL227
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL227
-	.8byte	.LVL228
-	.2byte	0x3
-	.byte	0x85
-	.sleb128 -1
+.LLST109:
+	.8byte	.LVL360
+	.8byte	.LVL362
+	.2byte	0x5
+	.byte	0x11
+	.sleb128 -65533
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST68:
-	.8byte	.LVL224
-	.8byte	.LVL226
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST69:
-	.8byte	.LVL223
-	.8byte	.LVL226
+.LLST110:
+	.8byte	.LVL394
+	.8byte	.LVL409
 	.2byte	0x1
-	.byte	0x50
+	.byte	0x6c
 	.8byte	0
 	.8byte	0
-.LLST21:
-	.8byte	.LVL50
-	.8byte	.LVL51-1
+.LLST63:
+	.8byte	.LVL141
+	.8byte	.LVL142-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL51-1
-	.8byte	.LVL66
+	.8byte	.LVL142-1
+	.8byte	.LVL150
 	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL66
-	.8byte	.LFE275
+	.byte	0x67
+	.8byte	.LVL150
+	.8byte	.LFE276
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9848,48 +14458,40 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST22:
-	.8byte	.LVL50
-	.8byte	.LVL51-1
+.LLST64:
+	.8byte	.LVL141
+	.8byte	.LVL142-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL51-1
-	.8byte	.LVL67
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL67
-	.8byte	.LVL68
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL68
-	.8byte	.LVL70
+	.8byte	.LVL142-1
+	.8byte	.LVL155
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL70
-	.8byte	.LVL71
+	.8byte	.LVL155
+	.8byte	.LVL156
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL71
-	.8byte	.LVL82
+	.8byte	.LVL156
+	.8byte	.LVL168
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL86
-	.8byte	.LFE275
+	.8byte	.LVL170
+	.8byte	.LFE276
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST23:
-	.8byte	.LVL50
-	.8byte	.LVL51-1
+.LLST65:
+	.8byte	.LVL141
+	.8byte	.LVL142-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL51-1
-	.8byte	.LVL66
+	.8byte	.LVL142-1
+	.8byte	.LVL152
 	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL66
-	.8byte	.LFE275
+	.byte	0x66
+	.8byte	.LVL152
+	.8byte	.LFE276
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9897,24 +14499,24 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST24:
-	.8byte	.LVL50
-	.8byte	.LVL51-1
+.LLST66:
+	.8byte	.LVL141
+	.8byte	.LVL142-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL51-1
-	.8byte	.LVL65
+	.8byte	.LVL142-1
+	.8byte	.LVL151
 	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL65
-	.8byte	.LVL66
+	.byte	0x68
+	.8byte	.LVL151
+	.8byte	.LVL152
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x53
 	.byte	0x9f
-	.8byte	.LVL66
-	.8byte	.LFE275
+	.8byte	.LVL152
+	.8byte	.LFE276
 	.2byte	0x6
 	.byte	0xf3
 	.uleb128 0x1
@@ -9924,115 +14526,105 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST25:
-	.8byte	.LVL52
-	.8byte	.LVL53
+.LLST67:
+	.8byte	.LVL143
+	.8byte	.LVL144
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL53
-	.8byte	.LVL82
+	.8byte	.LVL144
+	.8byte	.LVL168
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL86
-	.8byte	.LFE275
+	.8byte	.LVL170
+	.8byte	.LFE276
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST26:
-	.8byte	.LVL55
-	.8byte	.LVL56
+.LLST68:
+	.8byte	.LVL146
+	.8byte	.LVL147
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL56
-	.8byte	.LVL84
+	.8byte	.LVL147
+	.8byte	.LVL167
 	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL86
-	.8byte	.LFE275
+	.byte	0x69
+	.8byte	.LVL170
+	.8byte	.LFE276
 	.2byte	0x1
-	.byte	0x67
+	.byte	0x69
 	.8byte	0
 	.8byte	0
-.LLST27:
-	.8byte	.LVL55
-	.8byte	.LVL84
+.LLST69:
+	.8byte	.LVL146
+	.8byte	.LVL169
 	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL86
-	.8byte	.LVL96
+	.byte	0x66
+	.8byte	.LVL170
+	.8byte	.LVL174
 	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL96
-	.8byte	.LFE275
+	.byte	0x66
+	.8byte	.LVL174
+	.8byte	.LFE276
 	.2byte	0x3
-	.byte	0x88
+	.byte	0x86
 	.sleb128 -1
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST28:
-	.8byte	.LVL91
-	.8byte	.LVL92
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST29:
-	.8byte	.LVL89
-	.8byte	.LVL94-1
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL95
-	.8byte	.LFE275
-	.2byte	0x1
-	.byte	0x52
-	.8byte	0
-	.8byte	0
-.LLST30:
-	.8byte	.LVL55
-	.8byte	.LVL78
+.LLST70:
+	.8byte	.LVL146
+	.8byte	.LVL152
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL78
-	.8byte	.LVL79
+	.8byte	.LVL152
+	.8byte	.LVL154
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL155
+	.8byte	.LVL163
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL163
+	.8byte	.LVL164
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL79
-	.8byte	.LVL81
+	.8byte	.LVL164
+	.8byte	.LVL166
 	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL86
-	.8byte	.LVL87
+	.byte	0x65
+	.8byte	.LVL170
+	.8byte	.LVL171
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL87
-	.8byte	.LVL93
+	.8byte	.LVL171
+	.8byte	.LFE276
 	.2byte	0x1
-	.byte	0x66
+	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST34:
-	.8byte	.LVL72
-	.8byte	.LVL74
+.LLST71:
+	.8byte	.LVL157
+	.8byte	.LVL159
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL74
-	.8byte	.LVL75
+	.8byte	.LVL159
+	.8byte	.LVL160
 	.2byte	0x3
 	.byte	0x71
 	.sleb128 260
-	.8byte	.LVL75
-	.8byte	.LVL76
+	.8byte	.LVL160
+	.8byte	.LVL161
 	.2byte	0x6
 	.byte	0x83
 	.sleb128 0
 	.byte	0x6
 	.byte	0x23
 	.uleb128 0x104
-	.8byte	.LVL76
-	.8byte	.LVL80
+	.8byte	.LVL161
+	.8byte	.LVL165
 	.2byte	0x8
 	.byte	0x84
 	.sleb128 -1
@@ -10040,8 +14632,8 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.sleb128 -65536
 	.byte	0x21
 	.byte	0x9f
-	.8byte	.LVL86
-	.8byte	.LFE275
+	.8byte	.LVL170
+	.8byte	.LFE276
 	.2byte	0x8
 	.byte	0x84
 	.sleb128 -1
@@ -10051,195 +14643,237 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST35:
-	.8byte	.LVL73
-	.8byte	.LVL80
+.LLST72:
+	.8byte	.LVL158
+	.8byte	.LVL165
 	.2byte	0x6
 	.byte	0xc
 	.4byte	0x10001
 	.byte	0x9f
-	.8byte	.LVL86
-	.8byte	.LFE275
+	.8byte	.LVL170
+	.8byte	.LFE276
 	.2byte	0x6
 	.byte	0xc
 	.4byte	0x10001
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST37:
-	.8byte	.LVL88
-	.8byte	.LVL94-1
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL95
-	.8byte	.LFE275
-	.2byte	0x1
-	.byte	0x52
+.LLST73:
+	.8byte	.LVL165
+	.8byte	.LVL166
+	.2byte	0x4
+	.byte	0x40
+	.byte	0x3c
+	.byte	0x24
+	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST38:
-	.8byte	.LVL90
-	.8byte	.LVL92
+.LLST14:
+	.8byte	.LVL26
+	.8byte	.LVL29
 	.2byte	0x1
 	.byte	0x50
+	.8byte	.LVL29
+	.8byte	.LFE271
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST36:
-	.8byte	.LVL80
-	.8byte	.LVL81
-	.2byte	0x4
-	.byte	0x40
-	.byte	0x3c
-	.byte	0x24
+.LLST15:
+	.8byte	.LVL26
+	.8byte	.LVL27
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL27
+	.8byte	.LFE271
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST31:
-	.8byte	.LVL57
-	.8byte	.LVL64
-	.2byte	0x2
-	.byte	0x31
+.LLST16:
+	.8byte	.LVL26
+	.8byte	.LVL30
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL30
+	.8byte	.LFE271
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
 .LLST32:
 	.8byte	.LVL57
-	.8byte	.LVL64
+	.8byte	.LVL62
 	.2byte	0x1
-	.byte	0x63
+	.byte	0x50
+	.8byte	.LVL62
+	.8byte	.LFE270
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
 	.8byte	0
 	.8byte	0
 .LLST33:
 	.8byte	.LVL57
-	.8byte	.LVL62
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL62
-	.8byte	.LVL63
+	.8byte	.LVL58
 	.2byte	0x1
-	.byte	0x50
+	.byte	0x51
+	.8byte	.LVL58
+	.8byte	.LVL64
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL64
+	.8byte	.LFE270
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST40:
-	.8byte	.LVL91
-	.8byte	.LVL93
+.LLST34:
+	.8byte	.LVL57
+	.8byte	.LVL63-1
 	.2byte	0x1
 	.byte	0x52
+	.8byte	.LVL63-1
+	.8byte	.LFE270
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST41:
-	.8byte	.LVL66
-	.8byte	.LVL83
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL86
-	.8byte	.LFE275
+.LLST35:
+	.8byte	.LVL57
+	.8byte	.LVL59
 	.2byte	0x1
-	.byte	0x65
+	.byte	0x53
+	.8byte	.LVL59
+	.8byte	.LFE270
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST42:
-	.8byte	.LVL66
-	.8byte	.LVL85
-	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL86
-	.8byte	.LFE275
+.LLST12:
+	.8byte	.LVL22
+	.8byte	.LVL25
 	.2byte	0x1
-	.byte	0x69
+	.byte	0x50
+	.8byte	.LVL25
+	.8byte	.LFE269
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST10:
-	.8byte	.LVL20
+.LLST13:
+	.8byte	.LVL22
 	.8byte	.LVL23
 	.2byte	0x1
-	.byte	0x50
+	.byte	0x51
 	.8byte	.LVL23
 	.8byte	.LFE269
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
-	.byte	0x50
+	.byte	0x51
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST11:
-	.8byte	.LVL20
+.LLST10:
+	.8byte	.LVL18
 	.8byte	.LVL21
 	.2byte	0x1
-	.byte	0x52
+	.byte	0x50
 	.8byte	.LVL21
-	.8byte	.LFE269
+	.8byte	.LFE268
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
-	.byte	0x52
+	.byte	0x50
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST8:
-	.8byte	.LVL16
+.LLST11:
+	.8byte	.LVL18
 	.8byte	.LVL19
 	.2byte	0x1
-	.byte	0x50
+	.byte	0x51
 	.8byte	.LVL19
 	.8byte	.LFE268
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
-	.byte	0x50
+	.byte	0x51
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST9:
+.LLST7:
+	.8byte	.LVL13
 	.8byte	.LVL16
-	.8byte	.LVL17
 	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL17
-	.8byte	.LFE268
+	.byte	0x50
+	.8byte	.LVL16
+	.8byte	.LFE267
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
-	.byte	0x52
+	.byte	0x50
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST6:
-	.8byte	.LVL12
+.LLST8:
+	.8byte	.LVL13
 	.8byte	.LVL14
 	.2byte	0x1
-	.byte	0x50
+	.byte	0x51
 	.8byte	.LVL14
 	.8byte	.LFE267
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
-	.byte	0x50
+	.byte	0x51
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST7:
-	.8byte	.LVL12
-	.8byte	.LVL15
+.LLST9:
+	.8byte	.LVL13
+	.8byte	.LVL17
 	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL15
+	.byte	0x53
+	.8byte	.LVL17
 	.8byte	.LFE267
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
-	.byte	0x52
+	.byte	0x53
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST4:
-	.8byte	.LVL8
-	.8byte	.LVL11
+.LLST5:
+	.8byte	.LVL9
+	.8byte	.LVL10
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL11
+	.8byte	.LVL10
 	.8byte	.LFE266
 	.2byte	0x4
 	.byte	0xf3
@@ -10248,26 +14882,26 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST5:
-	.8byte	.LVL8
+.LLST6:
 	.8byte	.LVL9
+	.8byte	.LVL11
 	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL9
+	.byte	0x53
+	.8byte	.LVL11
 	.8byte	.LFE266
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
-	.byte	0x52
+	.byte	0x53
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
 .LLST2:
 	.8byte	.LVL4
-	.8byte	.LVL6
+	.8byte	.LVL7
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL6
+	.8byte	.LVL7
 	.8byte	.LFE265
 	.2byte	0x4
 	.byte	0xf3
@@ -10278,68 +14912,180 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.8byte	0
 .LLST3:
 	.8byte	.LVL4
-	.8byte	.LVL7
+	.8byte	.LVL5
 	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL7
+	.byte	0x51
+	.8byte	.LVL5
 	.8byte	.LFE265
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
-	.byte	0x52
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST4:
+	.8byte	.LVL4
+	.8byte	.LVL8
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL8
+	.8byte	.LFE265
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
 .LLST0:
 	.8byte	.LVL0
-	.8byte	.LVL3
+	.8byte	.LVL1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL3
+	.8byte	.LVL1
+	.8byte	.LFE264
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST1:
+	.8byte	.LVL0
+	.8byte	.LVL2
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL2
 	.8byte	.LFE264
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST36:
+	.8byte	.LVL66
+	.8byte	.LVL69
+	.2byte	0x3
+	.byte	0x83
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL69
+	.8byte	.LVL70
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL70
+	.8byte	.LVL72
+	.2byte	0x3
+	.byte	0x83
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL72
+	.8byte	.LVL73
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST37:
+	.8byte	.LVL68
+	.8byte	.LVL71-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL72
+	.8byte	.LFE287
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST38:
+	.8byte	.LVL67
+	.8byte	.LVL71-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL72
+	.8byte	.LFE287
+	.2byte	0x1
 	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST39:
+	.8byte	.LVL74
+	.8byte	.LVL77
+	.2byte	0x3
+	.byte	0x83
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL77
+	.8byte	.LVL79
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL79
+	.8byte	.LVL81
+	.2byte	0x3
+	.byte	0x83
+	.sleb128 -1
 	.byte	0x9f
+	.8byte	.LVL82
+	.8byte	.LFE288
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST40:
+	.8byte	.LVL76
+	.8byte	.LVL78
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL80
+	.8byte	.LVL81
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL82
+	.8byte	.LVL83
+	.2byte	0x1
+	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST1:
-	.8byte	.LVL0
-	.8byte	.LVL1
+.LLST41:
+	.8byte	.LVL75
+	.8byte	.LVL78
 	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL1
-	.8byte	.LFE264
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
+	.byte	0x50
+	.8byte	.LVL80
+	.8byte	.LVL81
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL82
+	.8byte	.LVL83
+	.2byte	0x1
+	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST17:
-	.8byte	.LVL37
-	.8byte	.LVL38
+.LLST42:
+	.8byte	.LVL84
+	.8byte	.LVL85
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL38
-	.8byte	.LVL40
+	.8byte	.LVL85
+	.8byte	.LVL87
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL40
-	.8byte	.LVL42
+	.8byte	.LVL87
+	.8byte	.LVL89
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL42
-	.8byte	.LVL48
+	.8byte	.LVL89
+	.8byte	.LVL95
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL48
-	.8byte	.LFE282
+	.8byte	.LVL95
+	.8byte	.LFE289
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -10347,43 +15093,95 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST18:
-	.8byte	.LVL38
-	.8byte	.LVL44
+.LLST43:
+	.8byte	.LVL85
+	.8byte	.LVL91
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL44
-	.8byte	.LVL45
+	.8byte	.LVL91
+	.8byte	.LVL92
 	.2byte	0x3
 	.byte	0x84
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL45
-	.8byte	.LVL49
+	.8byte	.LVL92
+	.8byte	.LVL96
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST19:
-	.8byte	.LVL39
-	.8byte	.LVL41
+.LLST44:
+	.8byte	.LVL86
+	.8byte	.LVL88
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL42
-	.8byte	.LVL43
+	.8byte	.LVL89
+	.8byte	.LVL90
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST20:
-	.8byte	.LVL40
-	.8byte	.LVL42
+.LLST45:
+	.8byte	.LVL87
+	.8byte	.LVL89
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST46:
+	.8byte	.LVL97
+	.8byte	.LVL102-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL102-1
+	.8byte	.LFE292
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST47:
+	.8byte	.LVL97
+	.8byte	.LVL103
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL103
+	.8byte	.LVL105
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL105
+	.8byte	.LVL107
 	.2byte	0x1
 	.byte	0x63
+	.8byte	.LVL107
+	.8byte	.LFE292
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST48:
+	.8byte	.LVL104
+	.8byte	.LVL106
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST49:
+	.8byte	.LVL104
+	.8byte	.LVL106
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
 	.8byte	0
 	.8byte	0
 	.section	.debug_aranges,"",@progbits
-	.4byte	0xcc
+	.4byte	0x15c
 	.2byte	0x2
 	.4byte	.Ldebug_info0
 	.byte	0x8
@@ -10402,60 +15200,96 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.8byte	.LFE268-.LFB268
 	.8byte	.LFB269
 	.8byte	.LFE269-.LFB269
-	.8byte	.LFB279
-	.8byte	.LFE279-.LFB279
-	.8byte	.LFB280
-	.8byte	.LFE280-.LFB280
+	.8byte	.LFB271
+	.8byte	.LFE271-.LFB271
+	.8byte	.LFB285
+	.8byte	.LFE285-.LFB285
+	.8byte	.LFB283
+	.8byte	.LFE283-.LFB283
 	.8byte	.LFB282
 	.8byte	.LFE282-.LFB282
-	.8byte	.LFB275
-	.8byte	.LFE275-.LFB275
-	.8byte	.LFB277
-	.8byte	.LFE277-.LFB277
+	.8byte	.LFB286
+	.8byte	.LFE286-.LFB286
+	.8byte	.LFB270
+	.8byte	.LFE270-.LFB270
+	.8byte	.LFB287
+	.8byte	.LFE287-.LFB287
+	.8byte	.LFB288
+	.8byte	.LFE288-.LFB288
+	.8byte	.LFB289
+	.8byte	.LFE289-.LFB289
+	.8byte	.LFB292
+	.8byte	.LFE292-.LFB292
+	.8byte	.LFB279
+	.8byte	.LFE279-.LFB279
+	.8byte	.LFB276
+	.8byte	.LFE276-.LFB276
+	.8byte	.LFB281
+	.8byte	.LFE281-.LFB281
+	.8byte	.LFB278
+	.8byte	.LFE278-.LFB278
 	.8byte	0
 	.8byte	0
 	.section	.debug_ranges,"",@progbits
 .Ldebug_ranges0:
-	.8byte	.LBB71
-	.8byte	.LBE71
-	.8byte	.LBB72
-	.8byte	.LBE72
+	.8byte	.LBB87
+	.8byte	.LBE87
+	.8byte	.LBB88
+	.8byte	.LBE88
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB73
-	.8byte	.LBE73
-	.8byte	.LBB74
-	.8byte	.LBE74
+	.8byte	.LBB89
+	.8byte	.LBE89
+	.8byte	.LBB90
+	.8byte	.LBE90
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB146
-	.8byte	.LBE146
-	.8byte	.LBB224
-	.8byte	.LBE224
-	.8byte	.LBB225
-	.8byte	.LBE225
-	.8byte	.LBB226
-	.8byte	.LBE226
-	.8byte	.LBB227
-	.8byte	.LBE227
+	.8byte	.LBB91
+	.8byte	.LBE91
+	.8byte	.LBB92
+	.8byte	.LBE92
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB93
+	.8byte	.LBE93
+	.8byte	.LBB94
+	.8byte	.LBE94
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB96
+	.8byte	.LBE96
+	.8byte	.LBB97
+	.8byte	.LBE97
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB167
-	.8byte	.LBE167
-	.8byte	.LBB168
-	.8byte	.LBE168
+	.8byte	.LBB99
+	.8byte	.LBE99
+	.8byte	.LBB100
+	.8byte	.LBE100
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB101
+	.8byte	.LBE101
+	.8byte	.LBB102
+	.8byte	.LBE102
 	.8byte	0
 	.8byte	0
 	.8byte	.LBB169
 	.8byte	.LBE169
-	.8byte	.LBB170
-	.8byte	.LBE170
+	.8byte	.LBB248
+	.8byte	.LBE248
+	.8byte	.LBB249
+	.8byte	.LBE249
+	.8byte	.LBB250
+	.8byte	.LBE250
+	.8byte	.LBB251
+	.8byte	.LBE251
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB187
-	.8byte	.LBE187
-	.8byte	.LBB188
-	.8byte	.LBE188
+	.8byte	.LBB191
+	.8byte	.LBE191
+	.8byte	.LBB192
+	.8byte	.LBE192
 	.8byte	0
 	.8byte	0
 	.8byte	.LBB193
@@ -10464,22 +15298,112 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.8byte	.LBE194
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB197
-	.8byte	.LBE197
-	.8byte	.LBB198
-	.8byte	.LBE198
+	.8byte	.LBB211
+	.8byte	.LBE211
+	.8byte	.LBB212
+	.8byte	.LBE212
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB202
-	.8byte	.LBE202
-	.8byte	.LBB203
-	.8byte	.LBE203
+	.8byte	.LBB217
+	.8byte	.LBE217
+	.8byte	.LBB218
+	.8byte	.LBE218
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB208
-	.8byte	.LBE208
-	.8byte	.LBB209
-	.8byte	.LBE209
+	.8byte	.LBB221
+	.8byte	.LBE221
+	.8byte	.LBB223
+	.8byte	.LBE223
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB222
+	.8byte	.LBE222
+	.8byte	.LBB224
+	.8byte	.LBE224
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB225
+	.8byte	.LBE225
+	.8byte	.LBB226
+	.8byte	.LBE226
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB231
+	.8byte	.LBE231
+	.8byte	.LBB232
+	.8byte	.LBE232
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB237
+	.8byte	.LBE237
+	.8byte	.LBB238
+	.8byte	.LBE238
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB242
+	.8byte	.LBE242
+	.8byte	.LBB243
+	.8byte	.LBE243
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB313
+	.8byte	.LBE313
+	.8byte	.LBB386
+	.8byte	.LBE386
+	.8byte	.LBB387
+	.8byte	.LBE387
+	.8byte	.LBB388
+	.8byte	.LBE388
+	.8byte	.LBB389
+	.8byte	.LBE389
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB334
+	.8byte	.LBE334
+	.8byte	.LBB335
+	.8byte	.LBE335
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB336
+	.8byte	.LBE336
+	.8byte	.LBB337
+	.8byte	.LBE337
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB354
+	.8byte	.LBE354
+	.8byte	.LBB355
+	.8byte	.LBE355
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB360
+	.8byte	.LBE360
+	.8byte	.LBB361
+	.8byte	.LBE361
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB364
+	.8byte	.LBE364
+	.8byte	.LBB365
+	.8byte	.LBE365
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB369
+	.8byte	.LBE369
+	.8byte	.LBB370
+	.8byte	.LBE370
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB375
+	.8byte	.LBE375
+	.8byte	.LBB376
+	.8byte	.LBE376
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB380
+	.8byte	.LBE380
+	.8byte	.LBB381
+	.8byte	.LBE381
 	.8byte	0
 	.8byte	0
 	.8byte	.LFB264
@@ -10494,16 +15418,34 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.8byte	.LFE268
 	.8byte	.LFB269
 	.8byte	.LFE269
-	.8byte	.LFB279
-	.8byte	.LFE279
-	.8byte	.LFB280
-	.8byte	.LFE280
+	.8byte	.LFB271
+	.8byte	.LFE271
+	.8byte	.LFB285
+	.8byte	.LFE285
+	.8byte	.LFB283
+	.8byte	.LFE283
 	.8byte	.LFB282
 	.8byte	.LFE282
-	.8byte	.LFB275
-	.8byte	.LFE275
-	.8byte	.LFB277
-	.8byte	.LFE277
+	.8byte	.LFB286
+	.8byte	.LFE286
+	.8byte	.LFB270
+	.8byte	.LFE270
+	.8byte	.LFB287
+	.8byte	.LFE287
+	.8byte	.LFB288
+	.8byte	.LFE288
+	.8byte	.LFB289
+	.8byte	.LFE289
+	.8byte	.LFB292
+	.8byte	.LFE292
+	.8byte	.LFB279
+	.8byte	.LFE279
+	.8byte	.LFB276
+	.8byte	.LFE276
+	.8byte	.LFB281
+	.8byte	.LFE281
+	.8byte	.LFB278
+	.8byte	.LFE278
 	.8byte	0
 	.8byte	0
 	.section	.debug_line,"",@progbits
@@ -10511,11 +15453,13 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.section	.debug_str,"MS",@progbits,1
 .LASF30:
 	.string	"parent_platdata"
+.LASF451:
+	.string	"otp_cru_rst"
 .LASF100:
 	.string	"off_mem_rsvmap"
 .LASF183:
 	.string	"UCLASS_I2C_EEPROM"
-.LASF459:
+.LASF311:
 	.string	"jt_funcs"
 .LASF188:
 	.string	"UCLASS_IRQ"
@@ -10525,8 +15469,10 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"UCLASS_I2C"
 .LASF13:
 	.string	"sizetype"
-.LASF333:
+.LASF336:
 	.string	"net_hostname"
+.LASF331:
+	.string	"push_packet"
 .LASF54:
 	.string	"start"
 .LASF222:
@@ -10535,9 +15481,9 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"child"
 .LASF186:
 	.string	"UCLASS_I2S"
-.LASF355:
+.LASF358:
 	.string	"NETLOOP_RESTART"
-.LASF415:
+.LASF430:
 	.string	"otp_data"
 .LASF184:
 	.string	"UCLASS_I2C_GENERIC"
@@ -10553,15 +15499,15 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"UCLASS_RKNAND"
 .LASF159:
 	.string	"UCLASS_DEMO"
-.LASF401:
+.LASF404:
 	.string	"OTP_S"
 .LASF108:
 	.string	"ih_magic"
 .LASF46:
 	.string	"list_head"
-.LASF366:
+.LASF369:
 	.string	"child_pre_probe"
-.LASF422:
+.LASF425:
 	.string	"rockchip_secure_otp_ofdata_to_platdata"
 .LASF300:
 	.string	"pm_ctx_phys"
@@ -10573,11 +15519,11 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"UCLASS_KEY"
 .LASF80:
 	.string	"bi_intfreq"
-.LASF430:
+.LASF436:
 	.string	"__func__"
 .LASF11:
 	.string	"phys_addr_t"
-.LASF405:
+.LASF408:
 	.string	"write"
 .LASF236:
 	.string	"UCLASS_VIDEO_BRIDGE"
@@ -10585,13 +15531,13 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"video_bottom"
 .LASF5:
 	.string	"__u8"
-.LASF354:
+.LASF357:
 	.string	"NETLOOP_CONTINUE"
 .LASF225:
 	.string	"UCLASS_SPI_GENERIC"
 .LASF294:
 	.string	"malloc_base"
-.LASF450:
+.LASF462:
 	.string	"dev_read_addr_ptr"
 .LASF56:
 	.string	"flash_info_t"
@@ -10607,7 +15553,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"UCLASS_CROS_EC"
 .LASF74:
 	.string	"bi_dsp_freq"
-.LASF420:
+.LASF423:
 	.string	"rockchip_otp_ids"
 .LASF122:
 	.string	"image_start"
@@ -10615,33 +15561,35 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"UCLASS_TEST_FDT"
 .LASF65:
 	.string	"bd_info"
-.LASF352:
+.LASF355:
 	.string	"uclass_id"
 .LASF112:
 	.string	"ih_load"
-.LASF399:
+.LASF402:
 	.string	"DECOM_GZIP"
-.LASF313:
+.LASF315:
 	.string	"__dtb_dt_spl_begin"
-.LASF392:
+.LASF395:
 	.string	"pre_remove"
-.LASF436:
+.LASF446:
 	.string	"delay"
+.LASF431:
+	.string	"secure_otp_read"
 .LASF7:
 	.string	"__u32"
 .LASF35:
 	.string	"priv"
 .LASF297:
 	.string	"cur_serial_dev"
-.LASF339:
+.LASF342:
 	.string	"net_tx_packet"
 .LASF240:
 	.string	"UCLASS_FG"
-.LASF338:
+.LASF341:
 	.string	"net_server_ip"
-.LASF414:
+.LASF471:
 	.string	"ofnode_union"
-.LASF346:
+.LASF349:
 	.string	"net_native_vlan"
 .LASF238:
 	.string	"UCLASS_VIDEO_CRTC"
@@ -10649,13 +15597,13 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"UCLASS_CODEC"
 .LASF291:
 	.string	"env_buf"
-.LASF429:
+.LASF440:
 	.string	"rockchip_secure_otp_write_byte"
 .LASF21:
 	.string	"errno"
 .LASF15:
 	.string	"long int"
-.LASF396:
+.LASF399:
 	.string	"__invalid_size_argument_for_IOC"
 .LASF69:
 	.string	"bi_flashsize"
@@ -10663,6 +15611,10 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"platdata"
 .LASF206:
 	.string	"UCLASS_PHY"
+.LASF422:
+	.string	"rk3568_data"
+.LASF428:
+	.string	"secure_otp_write"
 .LASF93:
 	.string	"IRQ_STACK_START_IN"
 .LASF104:
@@ -10671,11 +15623,11 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"UCLASS_VIDEO"
 .LASF275:
 	.string	"relocaddr"
-.LASF383:
+.LASF386:
 	.string	"dev_head"
-.LASF458:
+.LASF470:
 	.string	"/home/zzz/code/u-boot"
-.LASF349:
+.LASF352:
 	.string	"net_boot_file_size"
 .LASF114:
 	.string	"ih_dcrc"
@@ -10685,7 +15637,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"UCLASS_ROOT"
 .LASF44:
 	.string	"ide_bus_offset"
-.LASF336:
+.LASF339:
 	.string	"net_server_ethaddr"
 .LASF82:
 	.string	"bi_arch_number"
@@ -10695,13 +15647,13 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"UCLASS_KEYBOARD"
 .LASF18:
 	.string	"uint8_t"
-.LASF421:
+.LASF424:
 	.string	"_u_boot_list_2_driver_2_rockchip_secure_otp"
-.LASF371:
+.LASF374:
 	.string	"per_child_platdata_auto_alloc_size"
 .LASF45:
 	.string	"udevice"
-.LASF452:
+.LASF467:
 	.string	"udelay"
 .LASF116:
 	.string	"ih_arch"
@@ -10711,8 +15663,10 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"ih_hcrc"
 .LASF277:
 	.string	"mon_len"
-.LASF407:
+.LASF410:
 	.string	"call"
+.LASF442:
+	.string	"rockchip_secure_otp_read"
 .LASF124:
 	.string	"load"
 .LASF230:
@@ -10737,23 +15691,23 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"ih_size"
 .LASF39:
 	.string	"uclass_node"
-.LASF408:
+.LASF411:
 	.string	"rockchip_otp_platdata"
 .LASF248:
 	.string	"UCLASS_MDIO"
 .LASF23:
 	.string	"_Bool"
-.LASF372:
+.LASF375:
 	.string	"property"
-.LASF428:
+.LASF434:
 	.string	"rockchip_secure_otp_capability"
-.LASF358:
+.LASF361:
 	.string	"net_state"
-.LASF374:
+.LASF377:
 	.string	"value"
-.LASF418:
+.LASF420:
 	.string	"rk3308_data"
-.LASF435:
+.LASF445:
 	.string	"rockchip_secure_otp_check_flag"
 .LASF185:
 	.string	"UCLASS_I2C_MUX"
@@ -10763,15 +15717,15 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"_binary_u_boot_bin_start"
 .LASF234:
 	.string	"UCLASS_USB_GADGET_GENERIC"
-.LASF356:
+.LASF359:
 	.string	"NETLOOP_SUCCESS"
 .LASF36:
 	.string	"uclass"
-.LASF380:
+.LASF383:
 	.string	"p_current"
-.LASF382:
+.LASF385:
 	.string	"uc_drv"
-.LASF353:
+.LASF356:
 	.string	"net_loop_state"
 .LASF43:
 	.string	"req_seq"
@@ -10779,23 +15733,23 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"sibling"
 .LASF283:
 	.string	"dm_root_f"
-.LASF320:
+.LASF322:
 	.string	"enetaddr"
 .LASF174:
 	.string	"UCLASS_AMP"
 .LASF212:
 	.string	"UCLASS_PWRSEQ"
-.LASF375:
+.LASF378:
 	.string	"of_offset"
 .LASF140:
 	.string	"fit_hdr_fdt"
-.LASF347:
+.LASF350:
 	.string	"net_restart_wrap"
-.LASF335:
+.LASF338:
 	.string	"net_ethaddr"
 .LASF42:
 	.string	"flags"
-.LASF455:
+.LASF466:
 	.string	"malloc_simple"
 .LASF117:
 	.string	"ih_type"
@@ -10803,9 +15757,9 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"off_dt_struct"
 .LASF70:
 	.string	"bi_flashoffset"
-.LASF348:
+.LASF351:
 	.string	"net_boot_file_name"
-.LASF385:
+.LASF388:
 	.string	"compatible"
 .LASF160:
 	.string	"UCLASS_TEST"
@@ -10817,7 +15771,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"bus_clk"
 .LASF213:
 	.string	"UCLASS_RAM"
-.LASF445:
+.LASF457:
 	.string	"rk3308_spl_rockchip_otp_stop"
 .LASF179:
 	.string	"UCLASS_ETH"
@@ -10829,17 +15783,19 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"arch"
 .LASF269:
 	.string	"mem_clk"
-.LASF446:
+.LASF433:
+	.string	"temp"
+.LASF458:
 	.string	"rk3308_spl_rockchip_otp_start"
 .LASF266:
 	.string	"cpu_clk"
 .LASF50:
 	.string	"select_hwpart"
-.LASF340:
+.LASF343:
 	.string	"net_rx_packets"
-.LASF377:
+.LASF380:
 	.string	"mem_malloc_start"
-.LASF437:
+.LASF447:
 	.string	"rockchip_secure_otp_wait_flag"
 .LASF92:
 	.string	"_datarelro_start_ofs"
@@ -10849,52 +15805,54 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"ih_ep"
 .LASF61:
 	.string	"lmb_region"
-.LASF390:
+.LASF393:
 	.string	"pre_probe"
-.LASF453:
+.LASF465:
 	.string	"printf"
-.LASF400:
+.LASF403:
 	.string	"DECOM_ZLIB"
 .LASF135:
 	.string	"fit_uname_os"
 .LASF76:
 	.string	"bi_bootflags"
-.LASF337:
+.LASF340:
 	.string	"net_ip"
-.LASF438:
+.LASF448:
 	.string	"rockchip_secure_otp_wait_status"
 .LASF289:
 	.string	"fdt_size"
-.LASF331:
+.LASF334:
 	.string	"net_dns_server"
-.LASF419:
+.LASF421:
 	.string	"rk3328_data"
-.LASF351:
+.LASF354:
 	.string	"net_ping_ip"
 .LASF63:
 	.string	"memory"
 .LASF95:
 	.string	"fdt_header"
-.LASF378:
+.LASF432:
+	.string	"rk3568_secure_otp_write"
+.LASF381:
 	.string	"mem_malloc_end"
 .LASF192:
 	.string	"UCLASS_MAILBOX"
 .LASF147:
 	.string	"rd_end"
-.LASF360:
+.LASF363:
 	.string	"bind"
 .LASF278:
 	.string	"irq_sp"
 .LASF152:
 	.string	"cmdline_start"
-.LASF327:
+.LASF329:
 	.string	"index"
 .LASF265:
 	.string	"global_data"
-.LASF394:
+.LASF397:
 	.string	"per_device_auto_alloc_size"
-.LASF423:
-	.string	"rockchip_secure_otp_ioctl"
+.LASF435:
+	.string	"rk3568_secure_otp_write_2_bytes"
 .LASF220:
 	.string	"UCLASS_SCSI"
 .LASF232:
@@ -10905,17 +15863,17 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"long unsigned int"
 .LASF168:
 	.string	"UCLASS_SIMPLE_BUS"
-.LASF310:
+.LASF312:
 	.string	"gd_t"
-.LASF332:
+.LASF335:
 	.string	"net_nis_domain"
 .LASF142:
 	.string	"fit_noffset_fdt"
-.LASF444:
+.LASF456:
 	.string	"rk3328_spl_rockchip_otp_start"
-.LASF416:
+.LASF418:
 	.string	"rockchip_secure_otp_ops"
-.LASF357:
+.LASF360:
 	.string	"NETLOOP_FAIL"
 .LASF239:
 	.string	"UCLASS_WDT"
@@ -10927,7 +15885,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"bi_sramstart"
 .LASF26:
 	.string	"_binary_u_boot_bin_end"
-.LASF417:
+.LASF419:
 	.string	"px30_data"
 .LASF280:
 	.string	"reloc_off"
@@ -10947,13 +15905,13 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"fit_uname_cfg"
 .LASF221:
 	.string	"UCLASS_SERIAL"
-.LASF345:
+.LASF348:
 	.string	"net_our_vlan"
 .LASF301:
 	.string	"serial"
-.LASF443:
+.LASF455:
 	.string	"rk3328_spl_rockchip_otp_stop"
-.LASF361:
+.LASF364:
 	.string	"probe"
 .LASF171:
 	.string	"UCLASS_BLK"
@@ -10971,7 +15929,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"bi_ip_addr"
 .LASF207:
 	.string	"UCLASS_PINCONFIG"
-.LASF323:
+.LASF325:
 	.string	"send"
 .LASF228:
 	.string	"UCLASS_THERMAL"
@@ -10979,19 +15937,17 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"legacy_hdr_os_copy"
 .LASF9:
 	.string	"long long int"
-.LASF397:
+.LASF400:
 	.string	"misc_mode"
 .LASF288:
 	.string	"new_fdt"
 .LASF22:
 	.string	"___strtok"
-.LASF350:
+.LASF353:
 	.string	"net_boot_file_expected_size_in_blocks"
 .LASF262:
 	.string	"enable"
-.LASF440:
-	.string	"rockchip_secure_otp_ecc_check"
-.LASF359:
+.LASF362:
 	.string	"of_match"
 .LASF200:
 	.string	"UCLASS_NVME"
@@ -11003,7 +15959,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"protect"
 .LASF231:
 	.string	"UCLASS_USB"
-.LASF387:
+.LASF390:
 	.string	"uclass_driver"
 .LASF242:
 	.string	"UCLASS_RC"
@@ -11013,7 +15969,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"timebase_l"
 .LASF177:
 	.string	"UCLASS_DISPLAY"
-.LASF344:
+.LASF347:
 	.string	"net_null_ethaddr"
 .LASF273:
 	.string	"env_valid"
@@ -11021,87 +15977,87 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"parent"
 .LASF166:
 	.string	"UCLASS_PCI_EMUL"
-.LASF431:
-	.string	"rockchip_secure_otp_read"
+.LASF89:
+	.string	"_datarel_start_ofs"
 .LASF38:
 	.string	"parent_priv"
-.LASF433:
-	.string	"parity"
-.LASF402:
+.LASF405:
 	.string	"OTP_NS"
 .LASF243:
 	.string	"UCLASS_CHARGE_DISPLAY"
-.LASF314:
+.LASF316:
 	.string	"load_addr"
 .LASF134:
 	.string	"fit_hdr_os"
 .LASF90:
 	.string	"_datarelrolocal_start_ofs"
-.LASF454:
+.LASF464:
 	.string	"dev_get_driver_data"
-.LASF413:
+.LASF417:
 	.string	"spl_rockchip_otp_stop"
 .LASF264:
 	.string	"addr"
-.LASF448:
+.LASF460:
 	.string	"px30_spl_rockchip_otp_start"
-.LASF404:
+.LASF407:
 	.string	"read"
-.LASF442:
+.LASF452:
 	.string	"mask"
+.LASF437:
+	.string	"rk3568_secure_otp_read"
 .LASF8:
 	.string	"unsigned int"
 .LASF16:
 	.string	"ushort"
-.LASF319:
+.LASF321:
 	.string	"eth_device"
-.LASF406:
+.LASF409:
 	.string	"ioctl"
-.LASF451:
+.LASF463:
 	.string	"dev_read_u32_default"
 .LASF287:
 	.string	"ufdt_blob"
-.LASF368:
+.LASF371:
 	.string	"priv_auto_alloc_size"
 .LASF295:
 	.string	"malloc_limit"
 .LASF209:
 	.string	"UCLASS_PMIC"
-.LASF441:
+.LASF450:
 	.string	"secure_conf"
 .LASF130:
 	.string	"legacy_hdr_os"
 .LASF99:
 	.string	"off_dt_strings"
-.LASF311:
+.LASF313:
 	.string	"monitor_flash_len"
 .LASF194:
 	.string	"UCLASS_MISC"
 .LASF67:
 	.string	"bi_memsize"
-.LASF439:
+.LASF449:
 	.string	"flag"
 .LASF24:
 	.string	"image_base"
 .LASF227:
 	.string	"UCLASS_SYSRESET"
-.LASF381:
+.LASF384:
 	.string	"current"
 .LASF181:
 	.string	"UCLASS_FIRMWARE"
 .LASF191:
 	.string	"UCLASS_LPC"
-.LASF426:
+.LASF429:
 	.string	"offset"
 .LASF187:
 	.string	"UCLASS_IDE"
-.LASF403:
+.LASF406:
 	.string	"misc_ops"
 .LASF305:
 	.string	"phandle"
 .LASF298:
 	.string	"video_top"
-.LASF395:
+.LASF398:
 	.string	"per_device_platdata_auto_alloc_size"
 .LASF156:
 	.string	"bootm_headers_t"
@@ -11109,7 +16065,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"bi_arm_freq"
 .LASF215:
 	.string	"UCLASS_REMOTEPROC"
-.LASF324:
+.LASF326:
 	.string	"recv"
 .LASF126:
 	.string	"type"
@@ -11123,7 +16079,9 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"uclass_root"
 .LASF180:
 	.string	"UCLASS_GPIO"
-.LASF461:
+.LASF414:
+	.string	"otp_cru_rst_base"
+.LASF443:
 	.string	"read_end"
 .LASF210:
 	.string	"UCLASS_PWM"
@@ -11135,27 +16093,29 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"console_evt"
 .LASF146:
 	.string	"rd_start"
-.LASF460:
+.LASF441:
 	.string	"write_end"
 .LASF211:
 	.string	"UCLASS_POWER_DOMAIN"
 .LASF214:
 	.string	"UCLASS_REGULATOR"
-.LASF316:
+.LASF318:
 	.string	"save_size"
 .LASF172:
 	.string	"UCLASS_CLK"
 .LASF31:
 	.string	"uclass_platdata"
-.LASF449:
+.LASF461:
 	.string	"dev_get_platdata"
-.LASF321:
+.LASF323:
 	.string	"iobase"
-.LASF89:
-	.string	"_datarel_start_ofs"
+.LASF453:
+	.string	"rk3568_spl_rockchip_otp_stop"
+.LASF454:
+	.string	"rk3568_spl_rockchip_otp_start"
 .LASF260:
 	.string	"pre_serial"
-.LASF456:
+.LASF468:
 	.ascii	"GNU C11 6.3.1 201"
 	.string	"70404 -mstrict-align -march=armv8-a+nosimd -mlittle-endian -mabi=lp64 -g -Os -fno-builtin -ffreestanding -fshort-wchar -fno-stack-protector -fno-delete-null-pointer-checks -fstack-usage -ffunction-sections -fdata-sections -ffixed-r9 -fno-common -ffixed-x18"
 .LASF119:
@@ -11164,23 +16124,23 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"ih_os"
 .LASF153:
 	.string	"cmdline_end"
-.LASF341:
+.LASF344:
 	.string	"net_rx_packet"
 .LASF251:
 	.string	"LOGF_MAX_CATEGORIES"
 .LASF286:
 	.string	"fdt_blob"
-.LASF384:
+.LASF387:
 	.string	"udevice_id"
 .LASF51:
 	.string	"size"
 .LASF10:
 	.string	"long long unsigned int"
-.LASF393:
+.LASF396:
 	.string	"destroy"
 .LASF107:
 	.string	"image_header"
-.LASF373:
+.LASF376:
 	.string	"length"
 .LASF20:
 	.string	"__be32"
@@ -11190,13 +16150,13 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"fit_noffset_os"
 .LASF195:
 	.string	"UCLASS_MMC"
-.LASF326:
+.LASF328:
 	.string	"write_hwaddr"
 .LASF250:
 	.string	"UCLASS_INVALID"
 .LASF233:
 	.string	"UCLASS_USB_HUB"
-.LASF367:
+.LASF370:
 	.string	"child_post_remove"
 .LASF41:
 	.string	"sibling_node"
@@ -11206,7 +16166,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"flash_info"
 .LASF101:
 	.string	"version"
-.LASF325:
+.LASF327:
 	.string	"halt"
 .LASF62:
 	.string	"region"
@@ -11228,17 +16188,19 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"UCLASS_NORTHBRIDGE"
 .LASF78:
 	.string	"bi_enetaddr"
-.LASF365:
+.LASF310:
+	.string	"mtd_info"
+.LASF368:
 	.string	"child_post_bind"
-.LASF317:
+.LASF319:
 	.string	"in_addr"
-.LASF342:
+.LASF345:
 	.string	"net_rx_packet_len"
-.LASF322:
+.LASF324:
 	.string	"init"
-.LASF434:
+.LASF444:
 	.string	"rockchip_secure_otp_ecc_enable"
-.LASF312:
+.LASF314:
 	.string	"__dtb_dt_begin"
 .LASF216:
 	.string	"UCLASS_RESET"
@@ -11254,11 +16216,11 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"FIQ_STACK_START"
 .LASF154:
 	.string	"verify"
-.LASF376:
+.LASF379:
 	.string	"ofnode"
 .LASF28:
 	.string	"name"
-.LASF432:
+.LASF438:
 	.string	"buffer"
 .LASF202:
 	.string	"UCLASS_PANEL_BACKLIGHT"
@@ -11272,7 +16234,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"bi_busfreq"
 .LASF6:
 	.string	"short int"
-.LASF410:
+.LASF413:
 	.string	"otp_mask_base"
 .LASF208:
 	.string	"UCLASS_PINCTRL"
@@ -11282,23 +16244,23 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"UCLASS_I2C_EMUL"
 .LASF223:
 	.string	"UCLASS_SPMI"
-.LASF362:
+.LASF365:
 	.string	"remove"
 .LASF162:
 	.string	"UCLASS_TEST_BUS"
-.LASF315:
+.LASF317:
 	.string	"save_addr"
-.LASF370:
+.LASF373:
 	.string	"per_child_auto_alloc_size"
 .LASF296:
 	.string	"malloc_ptr"
-.LASF409:
+.LASF412:
 	.string	"secure_conf_base"
 .LASF151:
 	.string	"initrd_end"
-.LASF389:
+.LASF392:
 	.string	"pre_unbind"
-.LASF411:
+.LASF415:
 	.string	"secure_otp_data"
 .LASF263:
 	.string	"baudrate"
@@ -11328,45 +16290,45 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"working_fdt"
 .LASF285:
 	.string	"fdt_blob_kern"
-.LASF334:
+.LASF337:
 	.string	"net_root_path"
 .LASF178:
 	.string	"UCLASS_DMA"
 .LASF86:
 	.string	"bd_t"
-.LASF318:
+.LASF320:
 	.string	"s_addr"
-.LASF424:
+.LASF427:
 	.string	"request"
-.LASF391:
+.LASF394:
 	.string	"post_probe"
-.LASF343:
+.LASF346:
 	.string	"net_bcast_ethaddr"
 .LASF83:
 	.string	"bi_boot_params"
-.LASF412:
+.LASF416:
 	.string	"spl_rockchip_otp_start"
 .LASF19:
 	.string	"uint32_t"
-.LASF379:
+.LASF382:
 	.string	"mem_malloc_brk"
-.LASF329:
+.LASF332:
 	.string	"net_gateway"
-.LASF369:
+.LASF372:
 	.string	"platdata_auto_alloc_size"
 .LASF66:
 	.string	"bi_memstart"
-.LASF398:
+.LASF401:
 	.string	"DECOM_LZ4"
 .LASF237:
 	.string	"UCLASS_VIDEO_CONSOLE"
-.LASF328:
+.LASF330:
 	.string	"eth_current"
-.LASF364:
+.LASF367:
 	.string	"ofdata_to_platdata"
 .LASF64:
 	.string	"reserved"
-.LASF462:
+.LASF472:
 	.string	"free"
 .LASF85:
 	.string	"bi_dram"
@@ -11388,25 +16350,25 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"sector_count"
 .LASF118:
 	.string	"ih_comp"
-.LASF388:
+.LASF391:
 	.string	"post_bind"
-.LASF425:
+.LASF439:
 	.string	"rockchip_secure_otp_write"
-.LASF363:
+.LASF366:
 	.string	"unbind"
 .LASF148:
 	.string	"ft_addr"
 .LASF247:
 	.string	"UCLASS_ETH_PHY"
-.LASF427:
-	.string	"temp"
 .LASF4:
 	.string	"uchar"
 .LASF149:
 	.string	"ft_len"
 .LASF47:
 	.string	"next"
-.LASF386:
+.LASF426:
+	.string	"secure_otp_ioctl"
+.LASF389:
 	.string	"data"
 .LASF198:
 	.string	"UCLASS_NOP"
@@ -11418,7 +16380,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"UCLASS_PCH"
 .LASF204:
 	.string	"UCLASS_PCI"
-.LASF330:
+.LASF333:
 	.string	"net_netmask"
 .LASF33:
 	.string	"driver_data"
@@ -11426,13 +16388,13 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"IRQ_STACK_START"
 .LASF169:
 	.string	"UCLASS_ADC"
-.LASF447:
+.LASF459:
 	.string	"px30_spl_rockchip_otp_stop"
 .LASF164:
 	.string	"UCLASS_SPI_EMUL"
 .LASF257:
 	.string	"tlb_size"
-.LASF457:
+.LASF469:
 	.string	"drivers/misc/rockchip-secure-otp.c"
 .LASF141:
 	.string	"fit_uname_fdt"
diff --git a/include/rockchip-otp.h b/include/rockchip-otp.h
index 5a496c58ab..bd9915a8f1 100644
--- a/include/rockchip-otp.h
+++ b/include/rockchip-otp.h
@@ -61,6 +61,7 @@ struct rockchip_otp_platdata {
 	void __iomem *base;
 	unsigned long secure_conf_base;
 	unsigned long otp_mask_base;
+	unsigned long otp_cru_rst_base;
 };
 
 #endif

commit 4bf17e940bb05f3e1ef043b8f491cc6a3659a755
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Sun Dec 13 19:25:18 2020 +0800

    mtd: mtd_blk: Support mtd_dwrite in spl
    
    Change-Id: I495ca5498fae9f03f6042cb074c9c8c3f590eea5
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index b54b23d1bd..52c714100e 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -647,8 +647,8 @@ static int mtd_blk_probe(struct udevice *udev)
 
 static const struct blk_ops mtd_blk_ops = {
 	.read	= mtd_dread,
-#ifndef CONFIG_SPL_BUILD
 	.write	= mtd_dwrite,
+#ifndef CONFIG_SPL_BUILD
 	.erase	= mtd_derase,
 #endif
 };

commit 8ff9c29cc8f6c82d68b6e1f3d373e0f4e78b087c
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Sun Dec 13 17:44:56 2020 +0800

    mtd: spinor: Add more mtd information
    
    1.erasesize_shift, erasesize_mask
    2.it's useful for mtd_blk.c
    
    Change-Id: I0bd184fc86637849fbd079f9f539387465a07b8f
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 1acff745d1..54c0ece37f 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -2288,6 +2288,11 @@ int spi_nor_scan(struct spi_nor *nor)
 	mtd->size = params.size;
 	mtd->_erase = spi_nor_erase;
 	mtd->_read = spi_nor_read;
+	if (is_power_of_2(mtd->erasesize))
+		mtd->erasesize_shift = ffs(mtd->erasesize) - 1;
+	else
+		mtd->erasesize_shift = 0;
+	mtd->erasesize_mask = (1 << mtd->erasesize_shift) - 1;
 
 #if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST)
 	/* NOR protection support for STmicro/Micron chips and similar */

commit d06e16f8b13ee4028cf1dcb84ad1051ef1d66864
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Dec 11 16:25:47 2020 +0800

    common: fit: fix calculate data error
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I3bea25d1d4c2d9e846146e33dbd7a5454ceca853

diff --git a/common/image-fit.c b/common/image-fit.c
index 78d354f03d..a46c2318f1 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -722,7 +722,7 @@ bool fit_image_is_preload(const void *fit, int noffset)
 		return false;
 	}
 
-	if (*data != 1)
+	if (fdt32_to_cpu(*data) != 1)
 		return false;
 
 	return true;

commit b34162859294e76af038cdb2c33b493470b9903c
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Dec 11 10:00:03 2020 +0800

    rockchip: dts: px30: correct the secure_otp's compatible
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I77080f8cb05571b9ac6501a3226a680de0d3c35c

diff --git a/arch/arm/dts/px30.dtsi b/arch/arm/dts/px30.dtsi
index 5d546ef926..1290cc32b3 100644
--- a/arch/arm/dts/px30.dtsi
+++ b/arch/arm/dts/px30.dtsi
@@ -288,8 +288,8 @@
 		status = "disabled";
 	};
 
-	secure_otp: secure_otp@0xff110000 {
-		compatible = "rockchip,rk3308-secure-otp";
+	secure_otp: secure_otp@ff110000 {
+		compatible = "rockchip,px30-secure-otp";
 		reg = <0x0 0xff110000 0x0 0x4000>;
 		secure_conf = <0xff11C008>;
 		mask_addr = <0xff2d0000>;

commit 26cf79001d79a2daee5bb766f89e0c036a7af0a6
Author: Wu Liangqing <wlq@rock-chips.com>
Date:   Thu Dec 10 10:52:47 2020 +0800

    rockchip: rk3568: rkvdec set clk 400MHZ
    
    Change-Id: I3b154200fd81dab82a3c4956adf99437a51f88f9
    Signed-off-by: Wu Liangqing <wlq@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c
index 2b6ecb0470..e87278ec10 100644
--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
@@ -790,6 +790,10 @@ int spl_fit_standalone_release(uintptr_t entry_point)
 #define CRU_RATE_CNT_MIN	6
 #define CRU_PARENT_CNT_MIN	3
 
+#define RKVDEC_NODE_FDT_PATH    "/rkvdec@fdf80200"
+#define RKVDEC_NORMAL_RATE_CNT_MIN     5
+#define RKVDEC_RATE_CNT_MIN     4
+
 int rk_board_fdt_fixup(const void *blob)
 {
 	int node, len;
@@ -831,5 +835,31 @@ int rk_board_fdt_fixup(const void *blob)
 		pp[5] = cpu_to_fdt32(PLL_CPLL);
 	}
 
+	node = fdt_path_offset(blob, RKVDEC_NODE_FDT_PATH);
+	if (node < 0)
+		return 0;
+	pp = (u32 *)fdt_getprop(blob, node, "rockchip,normal-rates", &len);
+	if (!pp)
+		return 0;
+
+	if ((len / 4) >= RKVDEC_NORMAL_RATE_CNT_MIN) {
+		pp[0] = cpu_to_fdt32(400000000);
+		pp[1] = cpu_to_fdt32(0);
+		pp[2] = cpu_to_fdt32(400000000);
+		pp[3] = cpu_to_fdt32(400000000);
+		pp[4] = cpu_to_fdt32(400000000);
+	}
+
+	pp = (u32 *)fdt_getprop(blob, node, "assigned-clock-rates", &len);
+	if (!pp)
+		return 0;
+
+	if ((len / 4) >= RKVDEC_RATE_CNT_MIN) {
+		pp[0] = cpu_to_fdt32(400000000);
+		pp[1] = cpu_to_fdt32(400000000);
+		pp[2] = cpu_to_fdt32(400000000);
+		pp[3] = cpu_to_fdt32(400000000);
+	}
+
 	return 0;
 }

commit bd2c27cc923711a23a21fc9ab43e05d8ac7fc142
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Dec 10 17:00:36 2020 +0800

    rsa: read back to check the key hash after writing OTP
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I9cee6e758b487e3947727dc4c68df66ef2c51f67

diff --git a/lib/rsa/rsa-verify.c b/lib/rsa/rsa-verify.c
index ecd9020a5e..08e116061b 100644
--- a/lib/rsa/rsa-verify.c
+++ b/lib/rsa/rsa-verify.c
@@ -647,7 +647,7 @@ int rsa_burn_key_hash(struct image_sign_info *info)
 		goto error;
 
 	if (memcmp(digest, prop.hash, digest_len) != 0) {
-		printf("RSA: Compare public key fail.\n");
+		printf("RSA: Compare public key hash fail.\n");
 		goto error;
 	}
 
@@ -668,6 +668,16 @@ int rsa_burn_key_hash(struct image_sign_info *info)
 	if (ret)
 		goto error;
 
+	memset(digest_read, 0, FIT_MAX_HASH_LEN);
+	ret = misc_otp_read(dev, OTP_RSA_HASH_ADDR, digest_read, OTP_RSA_HASH_SIZE);
+	if (ret)
+		goto error;
+
+	if (memcmp(digest, digest_read, digest_len) != 0) {
+		printf("RSA: Write public key hash fail.\n");
+		goto error;
+	}
+
 	secure_boot_enable = 0xff;
 	ret = misc_otp_write(dev, OTP_SECURE_BOOT_ENABLE_ADDR,
 			     &secure_boot_enable, OTP_SECURE_BOOT_ENABLE_SIZE);

commit efeef7e54d7547c6ea9a7293577e943eff19c1ba
Author: Wenping Zhang <wenping.zhang@rock-chips.com>
Date:   Mon Dec 7 09:00:26 2020 +0000

    rockchip: board: add logo display for eink screen.
    
    Signed-off-by: Wenping Zhang <wenping.zhang@rock-chips.com>
    Change-Id: If2115b257b6928c4a24afad09c04943bdd72893e

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 258dc4e1c4..5e40a77133 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -46,7 +46,9 @@
 #include <asm/arch/resource_img.h>
 #include <asm/arch/rk_atags.h>
 #include <asm/arch/vendor.h>
-
+#ifdef CONFIG_ROCKCHIP_EINK_DISPLAY
+#include <rk_eink.h>
+#endif
 DECLARE_GLOBAL_DATA_PTR;
 
 __weak int rk_board_late_init(void)
@@ -335,6 +337,9 @@ int board_late_init(void)
 #endif
 #ifdef CONFIG_DRM_ROCKCHIP
 	rockchip_show_logo();
+#endif
+#ifdef CONFIG_ROCKCHIP_EINK_DISPLAY
+	rockchip_eink_show_uboot_logo();
 #endif
 	env_fixup();
 	soc_clk_dump();

commit 255e57518a698cbf76b9503016372211e3b4b975
Author: Wenping Zhang <wenping.zhang@rock-chips.com>
Date:   Mon Nov 23 10:02:56 2020 +0000

    power: charge animation: add eink charging display.
    
    Signed-off-by: Wenping Zhang <wenping.zhang@rock-chips.com>
    Change-Id: Id9d84a27ae2bbc8746e99ed01a96c53e2335a2b6

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 1735d97d18..4bd30c0516 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -29,7 +29,9 @@
 #include <irq-generic.h>
 #include <rk_timer_irq.h>
 #endif
-
+#ifdef CONFIG_ROCKCHIP_EINK_DISPLAY
+#include <rk_eink.h>
+#endif
 DECLARE_GLOBAL_DATA_PTR;
 
 #define IMAGE_RESET_IDX				-1
@@ -577,7 +579,23 @@ static int charge_animation_show(struct udevice *dev)
 		if (charging <= 0) {
 			printf("Not charging, online=%d. Shutdown...\n",
 			       charging);
-
+#ifdef CONFIG_ROCKCHIP_EINK_DISPLAY
+			/*
+			 * If charger is plug out during charging, display white
+			 * screen before device power off.
+			 * Irq must be enable if CONFIG_IRQ is defined, because
+			 * ebc need to wait irq to indicate frame is complete.
+			 */
+#ifdef CONFIG_IRQ
+			local_irq_enable();
+#endif
+			ret = rockchip_eink_show_charge_logo(EINK_LOGO_RESET);
+			if (ret != 0)
+				printf("Eink display reset logo failed\n");
+#ifdef CONFIG_IRQ
+			local_irq_disable();
+#endif
+#endif
 			/* wait uart flush before shutdown */
 			mdelay(5);
 
@@ -699,10 +717,61 @@ show_images:
 
 		debug("step3 (%d)... show_idx=%d\n", screen_on, show_idx);
 
+#ifdef CONFIG_ROCKCHIP_EINK_DISPLAY
+		/*
+		 * Device is auto wakeup from suspend, if it's eink display,
+		 * screen will display the last image after suspend, so
+		 * we should update the image to show the approximate
+		 * battery power if battery is charging to next level.
+		 */
+		if (pdata->auto_wakeup_interval &&
+		    priv->auto_wakeup_key_state == KEY_PRESS_DOWN &&
+		    !screen_on) {
+			if (soc >= image[old_show_idx + 1].soc &&
+			    soc < 100) {
+				int ret;
+				int logo_type = EINK_LOGO_CHARGING_0;
+
+				logo_type = logo_type << (old_show_idx + 1);
+				ret = rockchip_eink_show_charge_logo(logo_type);
+				/*
+				 * only change the logic if eink is
+				 * actually exist
+				 */
+				if (ret == 0) {
+					printf("Update image id[%d] for eink\n",
+					       old_show_idx + 1);
+					old_show_idx++;
+				}
+			}
+		}
+		/*
+		 * If battery capacity is charged to 100%, exit charging
+		 * animation and boot android system.
+		 */
+		if (soc >= 100) {
+			int ret;
+			int logo_type = EINK_LOGO_CHARGING_5;
+
+			ret = rockchip_eink_show_charge_logo(logo_type);
+			/* Only change the logic if eink is acutally exist */
+			if (ret == 0) {
+				printf("battery FULL,exit charge animation\n");
+				mdelay(20);
+				break;
+			}
+		}
+#endif
 		/* Step3: show images */
 		if (screen_on) {
 			/* Don't call 'charge_show_bmp' unless image changed */
 			if (old_show_idx != show_idx) {
+#ifdef CONFIG_ROCKCHIP_EINK_DISPLAY
+				int logo_type = EINK_LOGO_CHARGING_0;
+
+				rockchip_eink_show_charge_logo(logo_type <<
+							       show_idx);
+#endif
 				old_show_idx = show_idx;
 				debug("SHOW: %s\n", image[show_idx].name);
 				charge_show_bmp(image[show_idx].name);
@@ -753,6 +822,20 @@ show_images:
 			 * event turn off the screen and we never show images.
 			 */
 			if (screen_on) {
+#ifdef CONFIG_ROCKCHIP_EINK_DISPLAY
+				int type = EINK_LOGO_CHARGING_0 << start_idx;
+				/*
+				 * Show current battery capacity before suspend
+				 * if it's eink display, because eink screen
+				 * will continue to display the last image
+				 * after suspend, so user can get the
+				 * approximate capacity by image displayed.
+				 */
+				ret = rockchip_eink_show_charge_logo(type);
+				/* only change the logic if eink display ok */
+				if (ret == 0)
+					old_show_idx = start_idx;
+#endif
 				charge_show_bmp(NULL); /* Turn off screen */
 				screen_on = false;
 				priv->suspend_delay_timeout = get_timer(0);

commit 0466543ca91a2431ed1cd41418cfff51f2030032
Author: Wenping Zhang <wenping.zhang@rock-chips.com>
Date:   Wed Nov 11 21:05:29 2020 +0800

    tools: add tools for convert bmp to gray16 and saved as logo.img.
    
    This tool support convert 16bpp/24bpp/32bpp bmp images into
    4 bits grayscale image, and add header info to save as logo.img.
    logo.img is flash into emmc and parsed in uboot to display
    uboot/charging/lowpower/kernel logo.
    [Note]the requirement of bmp files:
    1. The resolution of all bmp image must be same.
    2. The logo.img will be parsed in uboot, the uboot require the resolution
       of image must be same as screen resolution, otherwise will be failed.
    3. The color depth of bmp image must be 16bpp/24bpp/32bpp, 8bpp is not supported.
    
    The usage:
    ./tools/bmp2gray16 --uboot-logo tools/images/eink/uboot.bmp --kernel-logo tools/images/eink/kernel.bmp
    --charge-logo tools/images/eink/battery_0.bmp tools/images/eink/battery_1.bmp tools/images/eink/battery_2.bmp
    tools/images/eink/battery_3.bmp tools/images/eink/battery_4.bmp tools/images/eink/battery_5.bmp
    tools/images/eink/battery_fail.bmp --output ./logo.img
    
    Signed-off-by: Wenping Zhang <wenping.zhang@rock-chips.com>
    Change-Id: Ifc39f0344693fb0b26b04d7904289847e6fa9b90

diff --git a/scripts/README.rockchip b/scripts/README.rockchip
index 4bbe819e3e..c1f75ff7b6 100644
--- a/scripts/README.rockchip
+++ b/scripts/README.rockchip
@@ -51,3 +51,5 @@ Example usage of scripts/tools for Rockchip
 
 		./tools/loaderimage --pack --trustos ./bin/rk32/rk322x_tee_v2.00.bin trust.img 0x80000000  --size 1024 2
 		./tools/loaderimage --unpack --trustos trust.img tee.bin
+	# bmp2gray16
+		./tools/bmp2gray16 --uboot-logo uboot.bmp --charge-logo charging.bmp --lowpower-logo lowpower.bmp --kernel-logo kernel.bmp --output ./logo.img
diff --git a/tools/Makefile b/tools/Makefile
index 1482a9f22b..2bc097f57e 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -63,11 +63,13 @@ hostprogs-y += boot_merger
 hostprogs-y += trust_merger
 hostprogs-y += loaderimage
 hostprogs-y += resource_tool
+hostprogs-y += bmp2gray16
 
 boot_merger-objs := rockchip/boot_merger.o rockchip/sha2.o lib/sha256.o
 trust_merger-objs := rockchip/trust_merger.o rockchip/sha2.o lib/sha256.o
 loaderimage-objs := rockchip/loaderimage.o rockchip/sha.o lib/sha256.o rockchip/crc32_rk.o
 resource_tool-objs := rockchip/resource_tool.o
+bmp2gray16-objs := rockchip/bmp2gray16.o
 endif
 
 FIT_SIG_OBJS-$(CONFIG_FIT_SIGNATURE) := common/image-sig.o
diff --git a/tools/rockchip/bmp2gray16.c b/tools/rockchip/bmp2gray16.c
new file mode 100644
index 0000000000..27627c812f
--- /dev/null
+++ b/tools/rockchip/bmp2gray16.c
@@ -0,0 +1,570 @@
+/*
+ * (C) Copyright 2020 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ * Author: Wenping Zhang <wenping.zhang@rock-chips.com>
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <rk_eink.h>
+
+struct  bmp_header {
+	/* Header */
+	char signature[2];
+	uint32_t	file_size;
+	uint32_t	reserved;
+	uint32_t	data_offset;
+	/* InfoHeader */
+	uint32_t	size;
+	uint32_t	width;
+	uint32_t	height;
+	uint16_t	planes;
+	uint16_t	bit_count;
+	uint32_t	compression;
+	uint32_t	image_size;
+	uint32_t	x_pixels_per_m;
+	uint32_t	y_pixels_per_m;
+	uint32_t	colors_used;
+	uint32_t	colors_important;
+	/* ColorTable */
+} __attribute__((packed));
+
+struct bmp_image {
+	struct bmp_header hdr;
+	uint8_t color_table[0];
+};
+
+struct pixel_u16 {
+	uint16_t blue  : 4,
+		green : 4,
+		red   : 4,
+		alpha : 4;
+} __attribute__((packed));
+
+struct pixel_u24 {
+	uint8_t blue;
+	uint8_t green;
+	uint8_t red;
+} __attribute__((packed));
+
+struct pixel_u32 {
+	uint8_t blue;
+	uint8_t green;
+	uint8_t red;
+	uint8_t alpha;
+} __attribute__((packed));
+
+//logo partition Header, 64byte
+struct logo_part_header {
+	char magic[4]; /* must be "RKEL" */
+	uint32_t  totoal_size;
+	uint32_t  screen_width;
+	uint32_t  screen_height;
+	uint32_t  logo_count;
+	char  version[4];
+	uint32_t  rsv[10];
+} __attribute__((packed));
+
+// logo image header,32 byte
+struct grayscale_header {
+	char magic[4]; /* must be "GR04" */
+	uint16_t x;
+	uint16_t y;
+	uint16_t w;
+	uint16_t h;
+	uint32_t logo_type;
+	uint32_t data_offset; /* image offset in byte */
+	uint32_t data_size; /* image size in byte */
+	uint32_t rsv[2];
+} __attribute__((packed));
+
+/*
+ * The start address of logo image in logo.img must be aligned
+ * in 512 bytes,so the header size must be times of 512 bytes.
+ * Here we fix the size to 512 bytes, so the count of logo image
+ * can only support up to 14.
+ */
+struct logo_info {
+	struct logo_part_header part_hdr;
+	struct grayscale_header img_hdr[14];
+} __attribute__((packed));
+
+struct input_img_info {
+	char path[256];
+	int logo_type;
+};
+
+/*
+ * Every part of logo.img must be aligned in RK_BLK_SIZE,
+ * use macro aligned_in_blk to calculate the the real size
+ */
+#define RK_BLK_SIZE 512
+#define ALIGN(x, y)	(((x) + (y) - 1) & ~((y) - 1))
+
+struct input_img_info in_img_info[16];
+uint32_t screen_w;
+uint32_t screen_h;
+static const char version[4] = "1.00";
+static const char *PROG;
+
+static const char *fix_path(const char *path)
+{
+	if (!memcmp(path, "./", 2))
+		return path + 2;
+	return path;
+}
+
+static void print_version(void)
+{
+	printf("Version %s (zwp@rock-chips.com)\n", version);
+}
+
+void usage(void)
+{
+	printf("Usage: %s [options] [arguments]\n\n", PROG);
+	print_version();
+	printf("\t --uboot-logo path");
+	printf("\t\t\t Pack uboot logo to logo.img from given path\n");
+	printf("\t --charge-logo path");
+	printf("\t\t\t Pack charge logo to logo.img from given path\n");
+	printf("\t --lowpower-logo path");
+	printf("\t\t\t Pack low power logo to logo.img from given path\n");
+	printf("\t --kernel-logo path");
+	printf("\t\t\t Pack low power logo to logo.img from given path\n");
+	printf("\t --output path");
+	printf("\t\t\t Output the grayscale image to path\n");
+}
+
+static inline int size_of_header(void)
+{
+	return ALIGN(sizeof(struct logo_info), RK_BLK_SIZE);
+}
+
+static inline int size_of_one_image(void)
+{
+	return ALIGN((screen_w * screen_h) >> 1, RK_BLK_SIZE);
+}
+
+int get_logo_resolution(char *in_path, uint32_t *logo_width,
+			uint32_t *logo_height)
+{
+	struct bmp_header bmp_hdr;
+	FILE *file;
+	int size;
+	int ret = 0;
+
+	if (!in_path)
+		fprintf(stderr, "Invalid bmp file path.\n");
+
+	file = fopen(in_path, "rb");
+	if (!file) {
+		fprintf(stderr, "File %s open failed.\n", in_path);
+		return -1;
+	}
+	size = sizeof(struct bmp_header);
+	if (size != fread(&bmp_hdr, 1, size, file)) {
+		fprintf(stderr, "Incomplete read of file %s.\n", in_path);
+		ret = -1;
+		goto out;
+	}
+	if (!(bmp_hdr.signature[0] == 'B' &&
+	      bmp_hdr.signature[1] == 'M')) {
+		printf("cat not find bmp file\n");
+		ret = -1;
+		goto out;
+	}
+	*logo_width = bmp_hdr.width;
+	*logo_height = bmp_hdr.height;
+	fprintf(stderr, "logo resolution is %d x %d.\n",
+		*logo_width, *logo_height);
+out:
+	fclose(file);
+	return ret;
+}
+
+/*
+ * The bmp pixel is scan from left-bottom to right-top
+ */
+int convert_bmp_idx_to_gray_idx(int idx, uint32_t w, uint32_t h)
+{
+	int row = h - (idx / w) - 1;
+
+	return (row * w + idx % w) / 2;
+}
+
+int convert_one_image(char *in_path, void *out_buf, uint32_t offset,
+		      struct grayscale_header *gr_hdr, int type)
+{
+	struct bmp_image *bmp;
+	struct bmp_header *bmp_hdr;
+	FILE *file;
+	void *bmp_buf;
+	int size;
+	int ret = -1;
+	uint8_t *gr16_data = (uint8_t *)out_buf;
+
+	if (!out_buf || !in_path) {
+		fprintf(stderr, "in_path or out_buf is NULL.\n");
+		return -1;
+	}
+
+	file = fopen(in_path, "rb");
+	if (!file) {
+		fprintf(stderr, "File %s open failed.\n", in_path);
+		return -1;
+	}
+
+	fseek(file, 0, SEEK_END);
+	size = ftell(file);
+	fseek(file, 0, SEEK_SET);
+
+	bmp_buf = calloc(1, size);
+	if (!bmp_buf) {
+		fprintf(stderr, "Allocate memory of %d bytes failed.\n", size);
+		fclose(file);
+		return -1;
+	}
+	if (size != fread(bmp_buf, 1, size, file)) {
+		fprintf(stderr, "Incomplete read of file %s.\n", in_path);
+		goto out;
+	}
+
+	bmp = (struct bmp_image *)bmp_buf;
+	bmp_hdr = &bmp->hdr;
+	if (!(bmp_hdr->signature[0] == 'B' &&
+	      bmp_hdr->signature[1] == 'M')) {
+		printf("cat not find bmp file\n");
+		goto out;
+	}
+
+	if (size != le32_to_cpu(bmp_hdr->file_size)) {
+		fprintf(stderr, "Invalid BMP file size %d.\n",
+			le32_to_cpu(bmp_hdr->file_size));
+		goto out;
+	}
+	printf("bmp_hdr->width=%d, bmp_hdr->height=%d\n",
+	       bmp_hdr->width, bmp_hdr->height);
+	printf("screen_w=%d, screen_h=%d\n", screen_w, screen_h);
+	if (le32_to_cpu(bmp_hdr->width) != screen_w ||
+	    le32_to_cpu(bmp_hdr->height) != screen_h) {
+		fprintf(stderr, "The image size must same with others.\n");
+		goto out;
+	}
+	//write header
+	gr_hdr->magic[0] = 'G';
+	gr_hdr->magic[1] = 'R';
+	gr_hdr->magic[2] = '0';
+	gr_hdr->magic[3] = '4';
+	gr_hdr->x = 0;
+	gr_hdr->y = 0;
+	gr_hdr->w = screen_w;
+	gr_hdr->h = screen_h;
+	gr_hdr->logo_type = type;
+	gr_hdr->data_offset = offset;
+	gr_hdr->data_size = screen_w * screen_h / 2;
+
+	printf("bmp depth is %d\n", bmp_hdr->bit_count);
+	//convert rgb to gray data, and write to output buffer
+	// the used algorithm please refer to below url:
+	// https://www.cnblogs.com/zhangjiansheng/p/6925722.html
+	// we use below algorithm:
+	// Gray = (R*19595 + G*38469 + B*7472) >> 16
+	switch (bmp_hdr->bit_count) {
+	case 16:{
+		struct pixel_u16 *color_u16;
+		int i;
+
+		color_u16 = (struct pixel_u16 *)bmp->color_table;
+		for (i = 0; i < screen_w * screen_h / 2; i++) {
+			struct pixel_u16 *pix1 = &color_u16[2 * i];
+			struct pixel_u16 *pix2 = &color_u16[2 * i + 1];
+			int j = convert_bmp_idx_to_gray_idx(2 * i, screen_w,
+							    screen_h);
+			/*
+			 * the rgb value of pixel_u16 is 4 bits,
+			 * so the counted grayscale value is 4bit
+			 */
+			uint32_t gray_px1 = (pix1->red * 19595 +
+					     pix1->green * 38469 +
+					     pix1->blue * 7472) >> 16;
+			uint32_t gray_px2 = (pix2->red * 19595 +
+					     pix2->green * 38469 +
+					     pix2->blue * 7472) >> 16;
+			gr16_data[j] = gray_px1 | (gray_px2 << 4);
+		}
+	}
+	break;
+	case 24: {
+		struct pixel_u24 *color_u24;
+		int i;
+
+		color_u24 = (struct pixel_u24 *)bmp->color_table;
+		for (i = 0; i < screen_w * screen_h / 2; i++) {
+			struct pixel_u24 *pix1 = &color_u24[2 * i];
+			struct pixel_u24 *pix2 = &color_u24[2 * i + 1];
+			int j = convert_bmp_idx_to_gray_idx(2 * i, screen_w,
+							    screen_h);
+			/*
+			 * The rgb value of pixel_u24 is 8 bits,
+			 * so the counted grayscale
+			 * value need to divide into 16
+			 */
+			uint32_t gray_px1 = ((pix1->red * 19595 +
+					      pix1->green * 38469 +
+					      pix1->blue * 7472) >> 16) >> 4;
+			uint32_t gray_px2 = ((pix2->red * 19595 +
+					      pix2->green * 38469 +
+					      pix2->blue * 7472) >> 16) >> 4;
+
+			gr16_data[j] = gray_px1 | (gray_px2 << 4);
+		}
+	}
+	break;
+	case 32: {
+		struct pixel_u32 *color_u32;
+		int i;
+
+		color_u32 = (struct pixel_u32 *)bmp->color_table;
+		for (i = 0; i < screen_w * screen_h / 2; i++) {
+			struct pixel_u32 *pix1 = &color_u32[2 * i];
+			struct pixel_u32 *pix2 = &color_u32[2 * i + 1];
+			int j = convert_bmp_idx_to_gray_idx(2 * i, screen_w,
+							    screen_h);
+			/*
+			 * The rgb value of pixel_u32 is 8 bits,
+			 * so the counted grayscale
+			 * value need to divide into 16
+			 */
+			uint32_t gray_px1 = ((pix1->red * 19595 +
+					      pix1->green * 38469 +
+					      pix1->blue * 7472) >> 16) >> 4;
+			uint32_t gray_px2 = ((pix2->red * 19595 +
+					      pix2->green * 38469 +
+					      pix2->blue * 7472) >> 16) >> 4;
+			gr16_data[j] = gray_px1 | (gray_px2 << 4);
+		}
+	}
+	break;
+	default:
+		ret = -1;
+		printf("Invalid bit count[%d],only support 16/24/32 bpp bmp\n",
+		       bmp_hdr->bit_count);
+	break;
+	}
+
+	fprintf(stderr, "Convert image success\n");
+	ret = 0;
+out:
+	free(bmp_buf);
+	fclose(file);
+	return ret;
+}
+
+void *init_grayscale_logo_buf(int logo_count, uint32_t screen_w,
+			      uint32_t screen_h)
+{
+	int size;
+	void *out_buf;
+
+	if (!logo_count) {
+		fprintf(stderr, "No input logo!\n");
+		return NULL;
+	}
+	size = size_of_header();
+	fprintf(stderr, "size of header in logo.img is %d\n", size);
+	//every pixel of the grayscale image is 4 bits
+	size += logo_count * screen_w * screen_h / 2;
+	out_buf = calloc(1, size);
+
+	return out_buf;
+}
+
+void deinit_grayscale_logo_buf(void *buf)
+{
+	if (buf) {
+		free(buf);
+		buf = NULL;
+	}
+}
+
+int main(int argc, char *argv[])
+{
+	char out_path[256] = {0};
+	void *out_buf;
+	int logo_count = 0;
+	int i;
+	int hdr_size, one_img_size, total_size;
+	int ret = -1;
+	struct logo_info *logo_hdr;
+	FILE *file;
+
+	PROG = fix_path(argv[0]);
+
+	argc--, argv++;
+	while (argc > 0 && argv[0][0] == '-') {
+		/* it's a opt arg. */
+		const char *arg = argv[0];
+
+		argc--, argv++;
+		if (!strcmp("-h", arg)) {
+			usage();
+			return 0;
+		}  else if (!strcmp("--charge-logo", arg)) {
+			int len, i;
+			/*
+			 * Charge logo are located in directory
+			 * u-boot/tools/images/eink/, there are 7
+			 * pictures to tell user the battery capacity
+			 * during charging
+			 */
+			for (i = 0; i < 7; i++) {
+				int logo_type = EINK_LOGO_CHARGING_0 << i;
+
+				len = strlen(argv[0]);
+				if (len > 256) {
+					fprintf(stderr,
+						"input charging logo path %s is too long.\n",
+						argv[0]);
+					return -1;
+				}
+				printf("charge logo path %s\n", argv[0]);
+				memcpy(in_img_info[logo_count].path,
+				       argv[0], len);
+				in_img_info[logo_count].logo_type = logo_type;
+				logo_count++;
+				argc--, argv++;
+			}
+		}  else if (!strcmp("--uboot-logo", arg)) {
+			int len = strlen(argv[0]);
+
+			if (len > 256) {
+				printf("Uboot logo path %s is too long.\n",
+				       argv[0]);
+				return -1;
+			}
+			memcpy(in_img_info[logo_count].path, argv[0], len);
+			in_img_info[logo_count].logo_type = EINK_LOGO_UBOOT;
+			logo_count++;
+			argc--, argv++;
+		} else if (!strcmp("--kernel-logo", arg)) {
+			int len = strlen(argv[0]);
+
+			if (len > 256) {
+				printf("Kernel logo path %s is too long\n",
+				       argv[0]);
+				return -1;
+			}
+			memcpy(in_img_info[logo_count].path, argv[0], len);
+			in_img_info[logo_count].logo_type = EINK_LOGO_KERNEL;
+			logo_count++;
+			argc--, argv++;
+		}  else if (!strcmp("--screen-width", arg)) {
+			screen_w = strtoul(argv[0], NULL, 10);
+			argc--, argv++;
+		}  else if (!strcmp("--screen-height", arg)) {
+			screen_h = strtoul(argv[0], NULL, 10);
+			argc--, argv++;
+		}  else if (!strcmp("--output", arg)) {
+			int len = strlen(argv[0]);
+
+			if (len > 256) {
+				printf("input output path %s is too long.\n",
+				       argv[0]);
+				return -1;
+			}
+			memcpy(out_path, argv[0], len);
+			argc--, argv++;
+		} else {
+			fprintf(stderr, "Unknown opt:%s", arg);
+			usage();
+			return -1;
+		}
+	}
+
+	ret = get_logo_resolution(in_img_info[0].path, &screen_w, &screen_h);
+	if (ret < 0) {
+		fprintf(stderr,
+			"Get height and width from logo image failed.\n");
+		usage();
+		return -1;
+	}
+
+	if (screen_w == 0 || screen_h == 0) {
+		fprintf(stderr,
+			"The screen weight and screen height must be set.\n");
+		usage();
+		return -1;
+	}
+
+	file = fopen(out_path, "wb+");
+	if (!file) {
+		fprintf(stderr, "File %s open failed.\n", out_path);
+		usage();
+		return -1;
+	}
+
+	out_buf = init_grayscale_logo_buf(logo_count, screen_w, screen_h);
+	if (!out_buf) {
+		fprintf(stderr, "Can't malloc buffer for grayscale image.\n");
+		fclose(file);
+		return -1;
+	}
+
+	hdr_size = size_of_header();
+	one_img_size = size_of_one_image();
+	logo_hdr = (struct logo_info *)out_buf;
+	fprintf(stderr, "logo count is %d,one_img_size=%d,size=%d.\n",
+		logo_count, one_img_size, screen_w * screen_h / 2);
+	for (i = 0; i < logo_count; i++) {
+		char *in_path = in_img_info[i].path;
+		int type = in_img_info[i].logo_type;
+		void *img_buf;
+		int offset = hdr_size + i *  one_img_size;
+
+		img_buf = out_buf + offset;
+		printf("image[%d] start addr=0x%p\n", i, img_buf);
+		ret = convert_one_image(in_path, img_buf, offset,
+					&logo_hdr->img_hdr[i], type);
+		if (ret < 0) {
+			printf("Convert image[%d] failed, type is %d\n",
+			       i, type);
+			break;
+		}
+	}
+
+	if (ret == 0) {
+		struct logo_part_header *part_hdr = &logo_hdr->part_hdr;
+
+		total_size = hdr_size + (i - 1) * one_img_size +
+				screen_h * screen_w / 2;
+
+		//convert success, write header data.
+		part_hdr->magic[0] = 'R';
+		part_hdr->magic[1] = 'K';
+		part_hdr->magic[2] = 'E';
+		part_hdr->magic[3] = 'L';
+		part_hdr->totoal_size = total_size;
+		part_hdr->screen_width = screen_w;
+		part_hdr->screen_height = screen_h;
+		part_hdr->logo_count = i;
+		printf("screen w=%d, h=%d, total_size=%d\n",
+		       screen_w, screen_h, total_size);
+		memcpy(part_hdr->version, version, 4);
+
+		// write to output file
+		ret = fwrite(out_buf, total_size, 1, file);
+		if (ret != 1)
+			fprintf(stderr, "write image to file %s failed\n",
+				out_path);
+	}
+
+	deinit_grayscale_logo_buf(out_buf);
+	ret = fclose(file);
+	if (ret != 0)
+		printf("Close file[%s] failed, err=%d\n", out_path, ret);
+	file = NULL;
+	return ret;
+}
+

commit a6c9b6a3fb5bcdf9aa3487778605d0c2fdae5147
Author: Wenping Zhang <wenping.zhang@rock-chips.com>
Date:   Mon Nov 23 01:21:32 2020 +0000

    configs: rk3568: enable eink configs for rk3568.
    
    Signed-off-by: Wenping Zhang <wenping.zhang@rock-chips.com>
    Change-Id: I671c08fd2a905d5b9c8c9a70d975b59fb96eabd1

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index 78d50438e0..4e1255482c 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -168,6 +168,11 @@ CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_INNO_MIPI_PHY=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_LCD=y
+CONFIG_I2C_EDID=y
+CONFIG_ROCKCHIP_EINK=y
+CONFIG_ROCKCHIP_EBC_TCON=y
+CONFIG_ROCKCHIP_TPS65185=y
+CONFIG_ROCKCHIP_EINK_DISPLAY=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_LIB_RAND=y
 CONFIG_SPL_TINY_MEMSET=y

commit 93a7515a89b7c181f810a1b9d77717f5e7a27e5f
Author: Wenping Zhang <wenping.zhang@rock-chips.com>
Date:   Thu Oct 29 17:07:15 2020 +0800

    video/rk_eink: add rockchip eink support.
    
    Signed-off-by: Wenping Zhang <wenping.zhang@rock-chips.com>
    Change-Id: I39e92ee00690ea1be274b1abd94d54284ef36898

diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 800cdd168c..27cb8efa9c 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -623,4 +623,9 @@ config VIDEO_DW_HDMI
 	  rather requires a SoC-specific glue driver to call it), it
 	  can not be enabled from the configuration menu.
 
+config ROCKCHIP_EINK
+	bool "enable rockchip eink driver"
+	help
+	  Enable rockchip eink driver
+source "drivers/video/rk_eink/Kconfig"
 endmenu
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 5fff236a41..60ffa667fc 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -57,6 +57,7 @@ obj-${CONFIG_VIDEO_TEGRA124} += tegra124/
 obj-${CONFIG_EXYNOS_FB} += exynos/
 obj-${CONFIG_VIDEO_ROCKCHIP} += rockchip/
 obj-${CONFIG_DRM_ROCKCHIP} += drm/
+obj-${CONFIG_ROCKCHIP_EINK} += rk_eink/
 
 obj-y += bridge/
 obj-y += sunxi/
diff --git a/drivers/video/rk_eink/Kconfig b/drivers/video/rk_eink/Kconfig
new file mode 100644
index 0000000000..4857b03c7e
--- /dev/null
+++ b/drivers/video/rk_eink/Kconfig
@@ -0,0 +1,20 @@
+config ROCKCHIP_EBC_TCON
+        bool "Rockchip ebc tcon Support"
+        depends on ROCKCHIP_EINK
+        help
+           Choose this option to enable support for EBC TCON controller
+
+config ROCKCHIP_TPS65185
+        bool "TPS65185 Support"
+        depends on ROCKCHIP_EINK
+        help
+           Choose this option to enable support for TPS65185, which is
+           used to supply power for eink panel.
+
+config ROCKCHIP_EINK_DISPLAY
+        bool "Rockchip EINK DISPLAY Support"
+        depends on ROCKCHIP_EINK
+        help
+           Choose this option to enable support for eink display, which is
+           used to display uboot/charging/lowerpower logo, and also used to
+           load kernel logo to ram, which can pass to kernel to display.
diff --git a/drivers/video/rk_eink/Makefile b/drivers/video/rk_eink/Makefile
new file mode 100644
index 0000000000..bda3019a41
--- /dev/null
+++ b/drivers/video/rk_eink/Makefile
@@ -0,0 +1,9 @@
+#
+# (C) Copyright Fuzhou Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier:      GPL-2.0+
+#
+
+obj-$(CONFIG_ROCKCHIP_EBC_TCON) += rk_ebc_tcon.o
+obj-$(CONFIG_ROCKCHIP_TPS65185) += tps65185.o
+obj-$(CONFIG_ROCKCHIP_EINK_DISPLAY) += rk_eink_display.o epdlut/
diff --git a/drivers/video/rk_eink/epdlut/Makefile b/drivers/video/rk_eink/epdlut/Makefile
new file mode 100644
index 0000000000..fa80691c1d
--- /dev/null
+++ b/drivers/video/rk_eink/epdlut/Makefile
@@ -0,0 +1,2 @@
+
+obj-$(CONFIG_ROCKCHIP_EINK_DISPLAY) += epd_lut.o pvi_waveform.o rkf_waveform.o
diff --git a/drivers/video/rk_eink/epdlut/epd_lut.c b/drivers/video/rk_eink/epdlut/epd_lut.c
new file mode 100644
index 0000000000..1715b75257
--- /dev/null
+++ b/drivers/video/rk_eink/epdlut/epd_lut.c
@@ -0,0 +1,45 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2020 Rockchip Electronics Co. Ltd.
+ *
+ * Author: Zorro Liu <zorro.liu@rock-chips.com>
+ */
+#include <stdio.h>
+#include <common.h>
+#include <stdlib.h>
+
+#include "epd_lut.h"
+
+int epd_lut_from_mem_init(void *waveform, struct epd_lut_ops *ops)
+{
+	int ret = -1;
+
+	ret = rkf_wf_input(waveform);
+	if (ret < 0) {
+		printf("[lut]: failed to input RKF waveform\n");
+	} else {
+		printf("[lut]: RKF waveform\n");
+		ops->lut_get = rkf_wf_get_lut;
+		return 0;
+	}
+
+	ret = pvi_wf_input(waveform);
+	if (ret < 0) {
+		printf("[lut]: failed to input PVI waveform\n");
+	} else {
+		printf("[lut]: PVI waveform\n");
+		ops->lut_get = pvi_wf_get_lut;
+		return 0;
+	}
+
+	return ret;
+}
+
+const char *epd_lut_get_wf_version(void)
+{
+	if (rkf_wf_get_version())
+		return rkf_wf_get_version();
+	if (pvi_wf_get_version())
+		return pvi_wf_get_version();
+	return NULL;
+}
diff --git a/drivers/video/rk_eink/epdlut/epd_lut.h b/drivers/video/rk_eink/epdlut/epd_lut.h
new file mode 100644
index 0000000000..a5dcdc7a76
--- /dev/null
+++ b/drivers/video/rk_eink/epdlut/epd_lut.h
@@ -0,0 +1,105 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2020 Rockchip Electronics Co. Ltd.
+ *
+ * Author: Zorro Liu <zorro.liu@rock-chips.com>
+ */
+
+#ifndef EPD_LUT_H
+#define EPD_LUT_H
+
+#define LUT_SUCCESS	(0)
+#define LUT_ERROR	(-1)
+
+#define LUT_FROM_GPIO_SPI_FLASH		(0)
+#define LUT_FROM_RK_SPI_FLASH		(1)
+#define LUT_FROM_NAND_FLASH		(2)
+#define LUT_FROM_WAVEFORM_FILE		(3)
+#define LUT_FROM_MEM_RESERVED		(4)
+
+enum epd_lut_type {
+	WF_TYPE_RESET	= 1,
+	WF_TYPE_GRAY16	= 2,
+	WF_TYPE_GRAY4	= 3,
+	WF_TYPE_GRAY2	= 4,
+	WF_TYPE_AUTO	= 5,
+	WF_TYPE_A2	= 6,
+	WF_TYPE_GC16	= 7,
+	WF_TYPE_GL16	= 8,
+	WF_TYPE_GLR16	= 9,
+	WF_TYPE_GLD16	= 10,
+	WF_TYPE_GCC16	= 11,
+	WF_TYPE_GRAY32	= 12,
+	WF_TYPE_MAX	= 13,
+};
+
+enum waveform_type {
+	RKF_WAVEFORM	= 1,
+	PVI_WAVEFORM	= 2,
+	OED_WAVEFORM	= 3,
+};
+
+enum pvi_wf_mode {
+	PVI_WF_RESET	= 0,
+	PVI_WF_DU	= 1,
+	PVI_WF_DU4	= 2,
+	PVI_WF_GC16	= 3,
+	PVI_WF_GL16	= 4,
+	PVI_WF_GLR16	= 5,
+	PVI_WF_GLD16	= 6,
+	PVI_WF_A2	= 7,
+	PVI_WF_GCC16 = 8,
+	PVI_WF_MAX,
+};
+
+enum oed_wf_mode {
+	OED_WF_RESET	= 0,
+	OED_WF_DU	= 1,
+	OED_WF_GC16	= 2,
+	OED_WF_GU16	= 3,
+	OED_WF_A2	= 4,
+	OED_WF_GL16	= 5,
+	OED_WF_A2IN	= 6,
+	OED_WF_A2OUT	= 7,
+	OED_WF_MAX,
+};
+
+struct epd_lut_data {
+	unsigned int frame_num;
+	unsigned int *data;
+};
+
+struct epd_lut_ops {
+	int (*lut_get)(struct epd_lut_data *lut, enum epd_lut_type type,
+		       int temp);
+};
+
+/*
+ * EPD LUT module export symbols
+ */
+int epd_lut_from_mem_init(void *waveform, struct epd_lut_ops *ops);
+const char *epd_lut_get_wf_version(void);
+
+/*
+ * External functions
+ */
+int map_gray16_mode(void);
+int map_auto_mode(void);
+
+/*
+ * PVI Waveform Interfaces
+ */
+int pvi_wf_input(void *waveform_file);
+const char *pvi_wf_get_version(void);
+int pvi_wf_get_lut(struct epd_lut_data *output, enum epd_lut_type lut_type,
+		   int temperature);
+
+/*
+ * RKF Waveform Interfaces
+ */
+int rkf_wf_input(void *waveform_file);
+const char *rkf_wf_get_version(void);
+int rkf_wf_get_lut(struct epd_lut_data *output, enum epd_lut_type lut_type,
+		   int temperature);
+#endif
+
diff --git a/drivers/video/rk_eink/epdlut/pvi_waveform.S b/drivers/video/rk_eink/epdlut/pvi_waveform.S
new file mode 100644
index 0000000000..759c6d7476
--- /dev/null
+++ b/drivers/video/rk_eink/epdlut/pvi_waveform.S
@@ -0,0 +1,13181 @@
+/*
+ * (C) Copyright 2020 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+	.arch armv8-a+nosimd
+	.file	"pvi_waveform.c"
+	.text
+.Ltext0:
+	.cfi_sections	.debug_frame
+	.section	.text.get_wf_mode_index,"ax",@progbits
+	.align	2
+	.type	get_wf_mode_index, %function
+get_wf_mode_index:
+.LFB217:
+	.file 1 "drivers/video/rk_eink/epdlut/pvi_waveform.c"
+	.loc 1 242 0
+	.cfi_startproc
+.LVL0:
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -16
+	.cfi_offset 20, -8
+	.loc 1 242 0
+	mov	w20, w0
+	.loc 1 243 0
+	adrp	x0, .LANCHOR0
+.LVL1:
+	adrp	x19, .LANCHOR1
+	ldr	x2, [x0, #:lo12:.LANCHOR0]
+.LVL2:
+.LBB45:
+.LBB46:
+	.loc 1 166 0
+	ldrb	w1, [x2, 16]
+	cmp	w1, 25
+	beq	.L3
+	bhi	.L4
+	cmp	w1, 18
+	beq	.L5
+	cmp	w1, 24
+.L31:
+	.loc 1 169 0
+	str	wzr, [x19, #:lo12:.LANCHOR1]
+	add	x0, x19, :lo12:.LANCHOR1
+	.loc 1 166 0
+	bne	.L2
+	.loc 1 170 0
+	mov	w1, 1
+	str	w1, [x0, 4]
+.L33:
+	.loc 1 193 0
+	str	w1, [x0, 8]
+	.loc 1 194 0
+	mov	w1, 2
+	.loc 1 197 0
+	mov	w2, 5
+.LVL3:
+	.loc 1 194 0
+	str	w1, [x0, 12]
+	.loc 1 195 0
+	mov	w1, 3
+	.loc 1 197 0
+	str	w2, [x0, 24]
+	.loc 1 195 0
+	str	w1, [x0, 16]
+	.loc 1 198 0
+	mov	w2, 6
+	.loc 1 196 0
+	mov	w1, 4
+	str	w1, [x0, 20]
+	b	.L32
+.LVL4:
+.L4:
+	.loc 1 166 0
+	cmp	w1, 35
+	beq	.L7
+	cmp	w1, 84
+	beq	.L8
+	cmp	w1, 32
+	b	.L31
+.L8:
+	.loc 1 180 0
+	add	x0, x19, :lo12:.LANCHOR1
+	.loc 1 181 0
+	mov	w1, 1
+	.loc 1 180 0
+	str	wzr, [x19, #:lo12:.LANCHOR1]
+	.loc 1 187 0
+	mov	w2, 5
+.LVL5:
+	.loc 1 182 0
+	stp	w1, w1, [x0, 4]
+	.loc 1 183 0
+	mov	w1, 2
+	str	w1, [x0, 12]
+	.loc 1 184 0
+	mov	w1, 3
+	str	w1, [x0, 16]
+	.loc 1 185 0
+	mov	w1, 4
+	.loc 1 186 0
+	stp	w1, w1, [x0, 20]
+.L32:
+	.loc 1 188 0
+	stp	w2, w1, [x0, 28]
+.LVL6:
+.L9:
+.LBE46:
+.LBE45:
+	.loc 1 249 0
+	cmp	w20, 5
+	beq	.L23
+	.loc 1 252 0
+	cmp	w20, 2
+	beq	.L23
+	.loc 1 255 0
+	sub	w20, w20, #1
+.LVL7:
+	cmp	w20, 9
+	bhi	.L11
+	adrp	x0, .L13
+	add	x0, x0, :lo12:.L13
+	ldrb	w0, [x0,w20,uxtw]
+	adr	x1, .Lrtx13
+	add	x0, x1, w0, sxtb #2
+	br	x0
+.Lrtx13:
+	.section	.rodata.get_wf_mode_index,"a",@progbits
+	.align	0
+	.align	2
+.L13:
+	.byte	(.L12 - .Lrtx13) / 4
+	.byte	(.L11 - .Lrtx13) / 4
+	.byte	(.L14 - .Lrtx13) / 4
+	.byte	(.L15 - .Lrtx13) / 4
+	.byte	(.L11 - .Lrtx13) / 4
+	.byte	(.L16 - .Lrtx13) / 4
+	.byte	(.L23 - .Lrtx13) / 4
+	.byte	(.L17 - .Lrtx13) / 4
+	.byte	(.L18 - .Lrtx13) / 4
+	.byte	(.L19 - .Lrtx13) / 4
+	.section	.text.get_wf_mode_index
+.LVL8:
+.L3:
+.LBB48:
+.LBB47:
+	.loc 1 191 0
+	add	x0, x19, :lo12:.LANCHOR1
+	.loc 1 192 0
+	mov	w1, 1
+	.loc 1 191 0
+	str	wzr, [x19, #:lo12:.LANCHOR1]
+	.loc 1 192 0
+	str	w1, [x0, 4]
+	.loc 1 193 0
+	mov	w1, 7
+	b	.L33
+.L5:
+	.loc 1 202 0
+	add	x0, x19, :lo12:.LANCHOR1
+	.loc 1 203 0
+	mov	w1, 1
+	.loc 1 208 0
+	mov	w2, 6
+.LVL9:
+	.loc 1 202 0
+	str	wzr, [x19, #:lo12:.LANCHOR1]
+	.loc 1 203 0
+	str	w1, [x0, 4]
+	.loc 1 204 0
+	mov	w1, 7
+	str	w1, [x0, 8]
+	.loc 1 205 0
+	mov	w1, 3
+	.loc 1 208 0
+	str	w2, [x0, 24]
+	.loc 1 206 0
+	stp	w1, w1, [x0, 12]
+	.loc 1 207 0
+	mov	w1, 5
+	str	w1, [x0, 20]
+.L34:
+	.loc 1 220 0
+	mov	w2, 4
+	b	.L32
+.LVL10:
+.L7:
+	.loc 1 213 0
+	add	x0, x19, :lo12:.LANCHOR1
+	.loc 1 214 0
+	mov	w1, 1
+	.loc 1 213 0
+	str	wzr, [x19, #:lo12:.LANCHOR1]
+	.loc 1 214 0
+	str	w1, [x0, 4]
+	.loc 1 215 0
+	mov	w1, 5
+	str	w1, [x0, 8]
+	.loc 1 216 0
+	mov	w1, 2
+	str	w1, [x0, 12]
+	.loc 1 217 0
+	mov	w1, 3
+	.loc 1 218 0
+	stp	w1, w1, [x0, 16]
+	.loc 1 219 0
+	str	w1, [x0, 24]
+	b	.L34
+.L2:
+	.loc 1 225 0
+	mov	w3, 1
+	.loc 1 226 0
+	stp	w3, w3, [x0, 4]
+	.loc 1 227 0
+	mov	w3, 2
+	.loc 1 230 0
+	mov	w4, 5
+	.loc 1 227 0
+	str	w3, [x0, 12]
+	.loc 1 228 0
+	mov	w3, 3
+	.loc 1 230 0
+	str	w4, [x0, 24]
+	.loc 1 231 0
+	mov	w4, 6
+	.loc 1 228 0
+	str	w3, [x0, 16]
+	.loc 1 229 0
+	mov	w3, 4
+	.loc 1 231 0
+	str	w4, [x0, 28]
+	.loc 1 229 0
+	str	w3, [x0, 20]
+	.loc 1 232 0
+	str	w3, [x0, 32]
+	.loc 1 233 0
+	adrp	x0, .LC0
+	add	x0, x0, :lo12:.LC0
+	ldrb	w2, [x2, 22]
+.LVL11:
+	bl	printf
+.LVL12:
+	b	.L9
+.LVL13:
+.L12:
+.LBE47:
+.LBE48:
+	.loc 1 260 0
+	mov	w0, 0
+.LVL14:
+.L10:
+	.loc 1 285 0
+	add	x19, x19, :lo12:.LANCHOR1
+	ldr	w0, [x19, w0, sxtw 2]
+.LVL15:
+	b	.L1
+.LVL16:
+.L17:
+	.loc 1 266 0
+	mov	w0, 4
+	.loc 1 267 0
+	b	.L10
+.LVL17:
+.L18:
+	.loc 1 269 0
+	mov	w0, 5
+	.loc 1 270 0
+	b	.L10
+.LVL18:
+.L19:
+	.loc 1 272 0
+	mov	w0, 6
+	.loc 1 273 0
+	b	.L10
+.LVL19:
+.L14:
+	.loc 1 275 0
+	mov	w0, 2
+	.loc 1 276 0
+	b	.L10
+.LVL20:
+.L15:
+	.loc 1 278 0
+	mov	w0, 1
+	.loc 1 279 0
+	b	.L10
+.LVL21:
+.L11:
+	.loc 1 281 0
+	adrp	x0, .LC1
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL22:
+	.loc 1 282 0
+	mov	w0, -1
+.L1:
+	.loc 1 286 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL23:
+.L16:
+	.cfi_restore_state
+	.loc 1 257 0
+	mov	w0, 7
+	b	.L10
+.LVL24:
+.L23:
+	.loc 1 263 0
+	mov	w0, 3
+	b	.L10
+	.cfi_endproc
+.LFE217:
+	.size	get_wf_mode_index, .-get_wf_mode_index
+	.section	.text.get_lut_gray8_data.isra.3,"ax",@progbits
+	.align	2
+	.type	get_lut_gray8_data.isra.3, %function
+get_lut_gray8_data.isra.3:
+.LFB238:
+	.loc 1 479 0
+	.cfi_startproc
+.LVL25:
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	.loc 1 487 0
+	mov	x2, 19200
+	.loc 1 479 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	.loc 1 487 0
+	adrp	x19, gray_data
+	.loc 1 479 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -16
+	.cfi_offset 22, -8
+	.loc 1 487 0
+	add	x21, x19, :lo12:gray_data
+	.loc 1 479 0
+	mov	x22, x0
+	mov	w20, w1
+	.loc 1 487 0
+	mov	x0, x21
+.LVL26:
+	mov	w1, 0
+.LVL27:
+	bl	memset
+.LVL28:
+	adrp	x0, waveformdata
+	add	x0, x0, :lo12:waveformdata
+	mov	x4, 0
+.LVL29:
+.L36:
+	lsl	w8, w4, 1
+	.loc 1 479 0
+	mov	x3, 0
+	b	.L41
+.LVL30:
+.L37:
+.LBB49:
+.LBB50:
+	.loc 1 159 0
+	lsl	x2, x5, 10
+	add	x7, x21, x5, lsl 6
+	add	x5, x5, 1
+.LVL31:
+.LBE50:
+.LBE49:
+	.loc 1 493 0
+	ldrb	w2, [x1, x2]
+	lsl	w6, w2, w8
+	ldr	w2, [x7, x3]
+	orr	w2, w2, w6
+	str	w2, [x7, x3]
+.LVL32:
+.L39:
+	.loc 1 490 0
+	cmp	w20, w5
+	bgt	.L37
+	add	x3, x3, 4
+	.loc 1 489 0
+	cmp	x3, 64
+	beq	.L38
+.LVL33:
+.L41:
+	add	x1, x4, x3, lsl 3
+	.loc 1 479 0
+	mov	x5, 0
+	add	x1, x1, x0
+	b	.L39
+.LVL34:
+.L38:
+	add	x4, x4, 1
+.LVL35:
+	.loc 1 488 0
+	cmp	x4, 16
+	bne	.L36
+	.loc 1 498 0
+	lsl	w2, w20, 6
+	add	x1, x19, :lo12:gray_data
+	mov	x0, x22
+	sxtw	x2, w2
+	.loc 1 499 0
+	ldp	x19, x20, [sp, 16]
+.LVL36:
+	ldp	x21, x22, [sp, 32]
+.LVL37:
+	ldp	x29, x30, [sp], 48
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	.loc 1 498 0
+	b	memcpy
+.LVL38:
+	.cfi_endproc
+.LFE238:
+	.size	get_lut_gray8_data.isra.3, .-get_lut_gray8_data.isra.3
+	.section	.text.get_lut_gray2_data.isra.4,"ax",@progbits
+	.align	2
+	.type	get_lut_gray2_data.isra.4, %function
+get_lut_gray2_data.isra.4:
+.LFB239:
+	.loc 1 459 0
+	.cfi_startproc
+.LVL39:
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	.loc 1 465 0
+	mov	x2, 2400
+	.loc 1 459 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	.loc 1 465 0
+	adrp	x20, .LANCHOR2
+	add	x19, x20, :lo12:.LANCHOR2
+	.loc 1 459 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -16
+	.cfi_offset 22, -8
+	.loc 1 459 0
+	mov	x22, x0
+	mov	w21, w1
+	.loc 1 465 0
+	mov	x0, x19
+.LVL40:
+	mov	w1, 0
+.LVL41:
+	bl	memset
+.LVL42:
+	adrp	x3, waveformdata+15
+	add	x0, x19, 4
+	add	x3, x3, :lo12:waveformdata+15
+	.loc 1 466 0
+	mov	w2, 0
+.LVL43:
+.L44:
+	cmp	w2, w21
+	bge	.L45
+	ldr	w1, [x0, -4]
+.LBB51:
+.LBB52:
+.LBB53:
+	.loc 1 159 0
+	sub	x7, x3, #15
+.LBE53:
+.LBE52:
+.LBE51:
+	.loc 1 466 0
+	mov	x4, 0
+.L46:
+.LVL44:
+.LBB56:
+.LBB55:
+.LBB54:
+	.loc 1 159 0
+	lsl	x5, x4, 5
+.LBE54:
+.LBE55:
+	.loc 1 471 0
+	lsl	w6, w4, 1
+	add	x4, x4, 1
+.LVL45:
+.LBE56:
+	.loc 1 468 0
+	cmp	x4, 16
+.LBB57:
+	.loc 1 471 0
+	ldrb	w5, [x7, x5]
+	lsl	w5, w5, w6
+	orr	w1, w1, w5
+.LBE57:
+	.loc 1 468 0
+	bne	.L46
+	ldr	w4, [x0]
+	mov	x6, x3
+	str	w1, [x0, -4]
+	mov	w1, 0
+.L47:
+.LBB58:
+	.loc 1 471 0
+	ldrb	w5, [x6], 32
+	lsl	w5, w5, w1
+	add	w1, w1, 2
+	orr	w4, w4, w5
+.LBE58:
+	.loc 1 468 0
+	cmp	w1, 32
+	bne	.L47
+	str	w4, [x0], 8
+.LVL46:
+	.loc 1 466 0
+	add	w2, w2, 1
+.LVL47:
+	add	x3, x3, 1024
+	b	.L44
+.LVL48:
+.L45:
+	.loc 1 476 0
+	lsl	w2, w21, 3
+.LVL49:
+	add	x1, x20, :lo12:.LANCHOR2
+	mov	x0, x22
+	sxtw	x2, w2
+	.loc 1 477 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+.LVL50:
+	ldp	x29, x30, [sp], 48
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	.loc 1 476 0
+	b	memcpy
+.LVL51:
+	.cfi_endproc
+.LFE239:
+	.size	get_lut_gray2_data.isra.4, .-get_lut_gray2_data.isra.4
+	.section	.text.decodewaveform,"ax",@progbits
+	.align	2
+	.global	decodewaveform
+	.type	decodewaveform, %function
+decodewaveform:
+.LFB214:
+	.loc 1 49 0
+	.cfi_startproc
+.LVL52:
+	.loc 1 57 0
+	cmp	w3, 32
+	ccmp	w3, 16, 4, ne
+	bne	.L69
+	.loc 1 49 0
+	stp	x29, x30, [sp, -64]!
+	.cfi_def_cfa_offset 64
+	.cfi_offset 29, -64
+	.cfi_offset 30, -56
+	.loc 1 60 0
+	mov	w1, 0
+.LVL53:
+	mov	x2, 524288
+.LVL54:
+	.loc 1 49 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -32
+	.cfi_offset 22, -24
+	.loc 1 60 0
+	adrp	x21, waveformdata
+	.loc 1 49 0
+	str	x23, [sp, 48]
+	.cfi_offset 23, -16
+	.loc 1 60 0
+	add	x23, x21, :lo12:waveformdata
+	.loc 1 49 0
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -48
+	.cfi_offset 20, -40
+	mov	x22, x0
+	mov	w20, w3
+	.loc 1 60 0
+	mov	x0, x23
+.LVL55:
+	bl	memset
+.LVL56:
+	.loc 1 51 0
+	mov	w19, 0
+	.loc 1 117 0
+	mov	x4, x23
+	.loc 1 55 0
+	mov	w10, 1
+	.loc 1 52 0
+	mov	w0, 0
+	.loc 1 50 0
+	mov	w1, 0
+	mov	w5, 0
+.LVL57:
+.L55:
+	.loc 1 68 0
+	ldrb	w2, [x22, w0, uxtw]
+	cmp	w2, 255
+	beq	.L56
+	.loc 1 73 0
+	cmp	w2, 252
+	bne	.L57
+	.loc 1 74 0
+	eor	w10, w10, 1
+.LVL58:
+	.loc 1 75 0
+	add	w0, w0, 1
+.LVL59:
+.L57:
+	uxtw	x7, w1
+	add	w6, w1, 1
+	add	w12, w1, 3
+	add	w3, w1, 2
+	uxtw	x13, w0
+	add	w11, w0, 1
+	uxtw	x8, w5
+	uxtw	x2, w19
+	add	w1, w1, 4
+	.loc 1 78 0
+	cbz	w10, .L58
+	.loc 1 81 0
+	lsl	x2, x2, 5
+	.loc 1 79 0
+	ldrb	w16, [x22, x13]
+.LVL60:
+	.loc 1 81 0
+	add	x7, x2, x7
+	.loc 1 82 0
+	add	x6, x2, x6, uxtw
+	.loc 1 81 0
+	add	x7, x4, x7, lsl 5
+	.loc 1 83 0
+	add	x3, x2, x3, uxtw
+	.loc 1 82 0
+	add	x6, x4, x6, lsl 5
+	.loc 1 83 0
+	add	x3, x4, x3, lsl 5
+	.loc 1 84 0
+	add	x2, x2, x12, uxtw
+	.loc 1 81 0
+	and	w13, w16, 3
+	.loc 1 84 0
+	add	x2, x4, x2, lsl 5
+	.loc 1 81 0
+	strb	w13, [x7, x8]
+	.loc 1 82 0
+	ubfx	x14, x16, 2, 2
+	strb	w14, [x6, x8]
+.LVL61:
+	.loc 1 83 0
+	ubfx	x15, x16, 4, 2
+	strb	w15, [x3, x8]
+.LVL62:
+	.loc 1 84 0
+	lsr	w3, w16, 6
+	strb	w3, [x2, x8]
+.LVL63:
+	.loc 1 88 0
+	cmp	w1, w20
+	bcc	.L59
+.LVL64:
+	.loc 1 90 0
+	add	w5, w5, 1
+.LVL65:
+	cmp	w20, w5
+	bhi	.L70
+.LVL66:
+	.loc 1 92 0
+	add	w19, w19, 1
+.LVL67:
+	.loc 1 89 0
+	mov	w1, 0
+	.loc 1 91 0
+	mov	w5, 0
+.LVL68:
+.L59:
+	.loc 1 96 0
+	ldrb	w6, [x22, w11, uxtw]
+.LVL69:
+.L60:
+	.loc 1 97 0 discriminator 1
+	cbnz	w6, .L62
+	.loc 1 112 0
+	add	w0, w0, 2
+.LVL70:
+	b	.L63
+.LVL71:
+.L72:
+	.loc 1 125 0
+	mov	w1, 0
+.LVL72:
+.L63:
+	.loc 1 63 0
+	cmp	w19, 511
+	bls	.L55
+	.loc 1 64 0
+	adrp	x0, .LC2
+.LVL73:
+	add	x0, x0, :lo12:.LC2
+	bl	printf
+.LVL74:
+.L56:
+	.loc 1 135 0
+	cmp	w20, 16
+	beq	.L83
+	add	x21, x21, :lo12:waveformdata
+	mov	w0, 0
+.L65:
+.LVL75:
+	.loc 1 139 0 discriminator 1
+	cmp	w0, w19
+	bcc	.L73
+.LVL76:
+.L83:
+	.loc 1 153 0
+	mov	w0, w19
+	.loc 1 154 0
+	ldr	x23, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+.LVL77:
+	ldp	x21, x22, [sp, 32]
+.LVL78:
+	ldp	x29, x30, [sp], 64
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 23
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL79:
+.L70:
+	.cfi_restore_state
+	.loc 1 89 0
+	mov	w1, 0
+	b	.L59
+.LVL80:
+.L62:
+	.loc 1 98 0
+	ubfiz	x11, x19, 5, 32
+	.loc 1 99 0
+	add	w8, w1, 1
+	.loc 1 98 0
+	add	x7, x11, x1, uxtw
+	uxtw	x2, w5
+	add	x7, x4, x7, lsl 5
+	.loc 1 99 0
+	add	x8, x11, x8
+	add	x8, x4, x8, lsl 5
+	.loc 1 98 0
+	strb	w13, [x7, x2]
+	.loc 1 100 0
+	add	w7, w1, 3
+.LVL81:
+	.loc 1 99 0
+	strb	w14, [x8, x2]
+	.loc 1 100 0
+	add	w8, w1, 2
+	add	x8, x11, x8
+	.loc 1 101 0
+	add	x7, x11, x7, uxtw
+.LVL82:
+	.loc 1 100 0
+	add	x8, x4, x8, lsl 5
+	.loc 1 101 0
+	add	x7, x4, x7, lsl 5
+	add	w1, w1, 4
+.LVL83:
+	.loc 1 103 0
+	cmp	w20, w1
+	.loc 1 100 0
+	strb	w15, [x8, x2]
+.LVL84:
+	.loc 1 101 0
+	strb	w3, [x7, x2]
+	.loc 1 103 0
+	bhi	.L61
+.LVL85:
+	.loc 1 105 0
+	add	w5, w5, 1
+.LVL86:
+	cmp	w20, w5
+	bhi	.L71
+.LVL87:
+	.loc 1 107 0
+	add	w19, w19, 1
+.LVL88:
+	.loc 1 104 0
+	mov	w1, 0
+	.loc 1 106 0
+	mov	w5, 0
+.LVL89:
+.L61:
+	.loc 1 97 0
+	sub	w6, w6, #1
+.LVL90:
+	and	w6, w6, 255
+.LVL91:
+	b	.L60
+.LVL92:
+.L71:
+	.loc 1 104 0
+	mov	w1, 0
+	b	.L61
+.LVL93:
+.L58:
+	.loc 1 117 0
+	lsl	x2, x2, 5
+	.loc 1 115 0
+	ldrb	w0, [x22, x13]
+.LVL94:
+	.loc 1 117 0
+	add	x7, x2, x7
+	.loc 1 118 0
+	add	x6, x2, x6, uxtw
+	.loc 1 117 0
+	add	x7, x4, x7, lsl 5
+	.loc 1 118 0
+	add	x6, x4, x6, lsl 5
+	.loc 1 119 0
+	add	x3, x2, x3, uxtw
+	.loc 1 120 0
+	add	x2, x2, x12, uxtw
+	.loc 1 119 0
+	add	x3, x4, x3, lsl 5
+	.loc 1 117 0
+	and	w13, w0, 3
+	.loc 1 120 0
+	add	x2, x4, x2, lsl 5
+	.loc 1 117 0
+	strb	w13, [x7, x8]
+	.loc 1 118 0
+	ubfx	x7, x0, 2, 2
+	strb	w7, [x6, x8]
+.LVL95:
+	.loc 1 119 0
+	ubfx	x6, x0, 4, 2
+	strb	w6, [x3, x8]
+.LVL96:
+	.loc 1 120 0
+	lsr	w0, w0, 6
+.LVL97:
+	strb	w0, [x2, x8]
+	.loc 1 124 0
+	cmp	w1, w20
+	.loc 1 122 0
+	mov	w0, w11
+.LVL98:
+	.loc 1 124 0
+	bcc	.L63
+.LVL99:
+	.loc 1 126 0
+	add	w5, w5, 1
+.LVL100:
+	cmp	w20, w5
+	bhi	.L72
+.LVL101:
+	.loc 1 128 0
+	add	w19, w19, 1
+.LVL102:
+	.loc 1 125 0
+	mov	w1, 0
+	.loc 1 127 0
+	mov	w5, 0
+	b	.L63
+.LVL103:
+.L73:
+	.loc 1 147 0
+	sbfiz	x5, x0, 5, 32
+	mov	x2, 0
+.L68:
+.LVL104:
+	and	x1, x2, 2147483647
+	add	x4, x2, x0, uxtw 4
+	add	x1, x5, x1
+	add	x4, x21, x4, lsl 6
+	add	x1, x21, x1, lsl 5
+	mov	x3, 0
+.LVL105:
+.L66:
+	.loc 1 146 0 discriminator 3
+	lsl	x6, x3, 1
+	ldrb	w7, [x4, x6]
+.LVL106:
+	.loc 1 147 0 discriminator 3
+	and	x6, x3, 2147483647
+	add	x3, x3, 1
+.LVL107:
+	.loc 1 141 0 discriminator 3
+	cmp	x3, 16
+	.loc 1 147 0 discriminator 3
+	strb	w7, [x1, x6]
+	.loc 1 141 0 discriminator 3
+	bne	.L66
+.LVL108:
+	add	x2, x2, 1
+.LVL109:
+	.loc 1 140 0 discriminator 2
+	cmp	x2, 16
+	bne	.L68
+	.loc 1 139 0 discriminator 2
+	add	w0, w0, 1
+.LVL110:
+	and	w0, w0, 255
+.LVL111:
+	b	.L65
+.LVL112:
+.L69:
+	.cfi_def_cfa 31, 0
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 23
+	.cfi_restore 29
+	.cfi_restore 30
+	.loc 1 58 0
+	mov	w0, -22
+.LVL113:
+	ret
+	.cfi_endproc
+.LFE214:
+	.size	decodewaveform, .-decodewaveform
+	.section	.text.get_wf_frm_num,"ax",@progbits
+	.align	2
+	.type	get_wf_frm_num, %function
+get_wf_frm_num:
+.LFB219:
+	.loc 1 309 0
+	.cfi_startproc
+.LVL114:
+	stp	x29, x30, [sp, -16]!
+	.cfi_def_cfa_offset 16
+	.cfi_offset 29, -16
+	.cfi_offset 30, -8
+	mov	w2, w0
+	.loc 1 310 0
+	adrp	x0, .LANCHOR0
+.LVL115:
+	.loc 1 309 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 1 310 0
+	ldr	x6, [x0, #:lo12:.LANCHOR0]
+.LVL116:
+	.loc 1 315 0
+	ldrb	w5, [x6, 32]
+	add	w5, w5, w2, lsl 2
+.LVL117:
+	.loc 1 317 0
+	sxtw	x5, w5
+	ldrb	w10, [x6, x5]
+.LVL118:
+	.loc 1 318 0
+	add	x5, x6, x5
+.LVL119:
+	ldrb	w4, [x5, 1]
+.LVL120:
+	.loc 1 319 0
+	ldrb	w7, [x5, 2]
+.LVL121:
+	.loc 1 320 0
+	ldrb	w3, [x5, 3]
+	.loc 1 321 0
+	add	w0, w4, w7
+	add	w0, w0, w10
+	cmp	w3, w0, uxtb
+	beq	.L85
+	.loc 1 322 0
+	mov	w2, 322
+.LVL122:
+.L93:
+	.loc 1 336 0
+	adrp	x1, .LANCHOR3
+.LVL123:
+	adrp	x0, .LC3
+	add	x1, x1, :lo12:.LANCHOR3
+	add	x0, x0, :lo12:.LC3
+	bl	printf
+.LVL124:
+	.loc 1 354 0
+	mov	w0, -22
+	ldp	x29, x30, [sp], 16
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+	ret
+.LVL125:
+.L85:
+	.cfi_restore_state
+	.loc 1 326 0
+	lsl	w3, w7, 16
+	mov	w8, w1
+	orr	w3, w3, w4, lsl 8
+	orr	w3, w3, w10
+.LVL126:
+	.loc 1 328 0
+	add	w3, w3, w1, lsl 2
+.LVL127:
+	.loc 1 330 0
+	sxtw	x3, w3
+	ldrb	w0, [x6, x3]
+.LVL128:
+	.loc 1 331 0
+	add	x3, x6, x3
+.LVL129:
+	ldrb	w5, [x3, 1]
+.LVL130:
+	.loc 1 332 0
+	ldrb	w4, [x3, 2]
+.LVL131:
+	.loc 1 333 0
+	ldrb	w7, [x3, 3]
+.LVL132:
+	.loc 1 335 0
+	add	w3, w5, w4
+	add	w3, w3, w0
+	cmp	w7, w3, uxtb
+	beq	.L87
+.LVL133:
+	.loc 1 336 0
+	mov	w2, 336
+.LVL134:
+	b	.L93
+.LVL135:
+.L87:
+	.loc 1 340 0
+	lsl	w4, w4, 16
+.LVL136:
+	.loc 1 342 0
+	ldrb	w3, [x6, 16]
+	.loc 1 340 0
+	orr	w4, w4, w5, lsl 8
+	orr	w4, w4, w0
+.LVL137:
+	cmp	w3, 32
+	bhi	.L88
+	mov	x0, 1
+.LVL138:
+	lsl	x0, x0, x3
+	mov	x3, 50331648
+	movk	x3, 0x1, lsl 32
+	tst	x0, x3
+	beq	.L88
+	.loc 1 346 0
+	mov	w3, 32
+.L94:
+	.loc 1 354 0
+	ldp	x29, x30, [sp], 16
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+	.loc 1 349 0
+	add	x0, x6, x4
+	b	decodewaveform
+.LVL139:
+.L88:
+	.cfi_restore_state
+	mov	w3, 16
+	mov	w1, w8
+.LVL140:
+	b	.L94
+	.cfi_endproc
+.LFE219:
+	.size	get_wf_frm_num, .-get_wf_frm_num
+	.section	.text.parse_wf_gray16_with_lut_type,"ax",@progbits
+	.align	2
+	.type	parse_wf_gray16_with_lut_type, %function
+parse_wf_gray16_with_lut_type:
+.LFB229:
+	.loc 1 572 0
+	.cfi_startproc
+.LVL141:
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -16
+	.cfi_offset 20, -8
+	.loc 1 572 0
+	mov	x20, x0
+	mov	w19, w1
+	.loc 1 576 0
+	mov	w0, w2
+.LVL142:
+	bl	get_wf_mode_index
+.LVL143:
+	.loc 1 577 0
+	mov	w1, w19
+	bl	get_wf_frm_num
+.LVL144:
+	.loc 1 579 0
+	str	w0, [x20]
+	.loc 1 577 0
+	mov	w19, w0
+.LVL145:
+	.loc 1 580 0
+	lsl	w0, w0, 6
+.LVL146:
+.LBB59:
+.LBB60:
+	.file 2 "include/linux/compat.h"
+	.loc 2 58 0
+	mov	w1, 32768
+	sxtw	x0, w0
+.LVL147:
+	bl	kmalloc
+.LVL148:
+.LBE60:
+.LBE59:
+	.loc 1 580 0
+	str	x0, [x20, 8]
+	.loc 1 581 0
+	cbz	x0, .L97
+	.loc 1 584 0
+	mov	w1, w19
+	bl	get_lut_gray8_data.isra.3
+.LVL149:
+	.loc 1 586 0
+	mov	w0, 0
+.L95:
+	.loc 1 587 0
+	ldp	x19, x20, [sp, 16]
+.LVL150:
+	ldp	x29, x30, [sp], 32
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL151:
+.L97:
+	.cfi_restore_state
+	.loc 1 582 0
+	mov	w0, -12
+	b	.L95
+	.cfi_endproc
+.LFE229:
+	.size	parse_wf_gray16_with_lut_type, .-parse_wf_gray16_with_lut_type
+	.section	.text.parse_wf_gray2,"ax",@progbits
+	.align	2
+	.type	parse_wf_gray2, %function
+parse_wf_gray2:
+.LFB227:
+	.loc 1 528 0
+	.cfi_startproc
+.LVL152:
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	str	x21, [sp, 32]
+	.cfi_offset 21, -16
+	mov	x21, x0
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	.loc 1 533 0
+	mov	w0, 4
+.LVL153:
+	.loc 1 528 0
+	mov	w19, w1
+	.loc 1 533 0
+	bl	get_wf_mode_index
+.LVL154:
+	.loc 1 534 0
+	mov	w1, w19
+	bl	get_wf_frm_num
+.LVL155:
+	.loc 1 536 0
+	str	w0, [x21]
+	.loc 1 534 0
+	mov	w19, w0
+.LVL156:
+	.loc 1 537 0
+	lsl	w0, w0, 3
+.LVL157:
+.LBB69:
+.LBB70:
+	.loc 2 58 0
+	mov	w1, 32768
+	sxtw	x0, w0
+.LVL158:
+	bl	kmalloc
+.LVL159:
+.LBE70:
+.LBE69:
+	.loc 1 538 0
+	cbz	x0, .L105
+	mov	x20, x0
+	.loc 1 541 0
+	mov	w1, w19
+	bl	get_lut_gray2_data.isra.4
+.LVL160:
+	.loc 1 545 0
+	str	w19, [x21]
+.LVL161:
+.LBB71:
+.LBB72:
+.LBB73:
+.LBB74:
+	.loc 2 58 0
+	mov	w1, 32768
+	lsl	w0, w19, 6
+.LVL162:
+	bl	kmalloc
+.LVL163:
+.LBE74:
+.LBE73:
+	.loc 1 401 0
+	cbz	x0, .L106
+	mov	x5, x0
+	mov	x4, x20
+	mov	w3, 0
+.LVL164:
+.L102:
+	.loc 1 404 0
+	cmp	w19, w3
+	bgt	.L104
+.LVL165:
+.L101:
+.LBE72:
+.LBE71:
+	.loc 1 546 0
+	str	x0, [x21, 8]
+.LVL166:
+.LBB76:
+.LBB77:
+	.loc 2 81 0
+	mov	x0, x20
+	bl	free
+.LVL167:
+.LBE77:
+.LBE76:
+	.loc 1 550 0
+	mov	w0, 0
+.L99:
+	.loc 1 551 0
+	ldp	x19, x20, [sp, 16]
+.LVL168:
+	ldr	x21, [sp, 32]
+.LVL169:
+	ldp	x29, x30, [sp], 48
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL170:
+.L104:
+	.cfi_restore_state
+.LBB78:
+.LBB75:
+	.loc 1 405 0
+	ldr	w8, [x4], 8
+.LVL171:
+	.loc 1 406 0
+	mov	x2, 0
+	ldr	w7, [x4, -4]
+.LVL172:
+.L103:
+	lsl	w1, w2, 1
+.LVL173:
+	.loc 1 409 0
+	asr	w6, w8, w1
+	and	w6, w6, 3
+	.loc 1 410 0
+	asr	w1, w7, w1
+.LVL174:
+	.loc 1 411 0
+	orr	w1, w6, w1, lsl 30
+	.loc 1 412 0
+	str	w1, [x5, x2, lsl 2]
+.LVL175:
+	add	x2, x2, 1
+.LVL176:
+	.loc 1 408 0
+	cmp	x2, 16
+	bne	.L103
+	.loc 1 404 0
+	add	w3, w3, 1
+.LVL177:
+	add	x5, x5, 64
+	b	.L102
+.LVL178:
+.L106:
+	.loc 1 402 0
+	mov	x0, 0
+	b	.L101
+.LVL179:
+.L105:
+.LBE75:
+.LBE78:
+	.loc 1 539 0
+	mov	w0, -12
+	b	.L99
+	.cfi_endproc
+.LFE227:
+	.size	parse_wf_gray2, .-parse_wf_gray2
+	.section	.text.pvi_wf_get_lut,"ax",@progbits
+	.align	2
+	.global	pvi_wf_get_lut
+	.type	pvi_wf_get_lut, %function
+pvi_wf_get_lut:
+.LFB232:
+	.loc 1 649 0
+	.cfi_startproc
+.LVL180:
+	.loc 1 655 0
+	adrp	x3, .LANCHOR0
+	ldr	x4, [x3, #:lo12:.LANCHOR0]
+	cbz	x4, .L144
+	.loc 1 658 0
+	cbz	x0, .L145
+	.loc 1 662 0
+	adrp	x3, .LANCHOR4
+	ldr	w5, [x3, #:lo12:.LANCHOR4]
+	cmp	w5, w2
+	adrp	x5, .LANCHOR5
+	bne	.L111
+	.loc 1 662 0 is_stmt 0 discriminator 1
+	ldr	w6, [x5, #:lo12:.LANCHOR5]
+	cmp	w6, w1
+	beq	.L146
+.L111:
+	.loc 1 649 0 is_stmt 1
+	stp	x29, x30, [sp, -80]!
+	.cfi_def_cfa_offset 80
+	.cfi_offset 29, -80
+	.cfi_offset 30, -72
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	str	x25, [sp, 64]
+	.cfi_offset 19, -64
+	.cfi_offset 20, -56
+	.cfi_offset 21, -48
+	.cfi_offset 22, -40
+	.cfi_offset 23, -32
+	.cfi_offset 24, -24
+	.cfi_offset 25, -16
+	.loc 1 665 0
+	str	w2, [x3, #:lo12:.LANCHOR4]
+.LBB116:
+.LBB117:
+	.loc 1 291 0
+	mov	x3, 0
+	ldrb	w20, [x4, 38]
+.LBE117:
+.LBE116:
+	.loc 1 666 0
+	str	w1, [x5, #:lo12:.LANCHOR5]
+.LVL181:
+.L112:
+	mov	w5, w3
+.LVL182:
+.LBB120:
+.LBB118:
+	.loc 1 295 0
+	cmp	w20, w3
+	bgt	.L114
+	.loc 1 302 0
+	cmp	w20, w3
+	bne	.L147
+	.loc 1 303 0
+	sub	w20, w20, #1
+.LVL183:
+	b	.L113
+.LVL184:
+.L114:
+	.loc 1 296 0
+	add	x6, x4, x3
+	add	x3, x3, 1
+.LVL185:
+	ldrb	w6, [x6, 48]
+	cmp	w2, w6
+	bge	.L112
+	.loc 1 297 0
+	sub	w20, w5, #1
+.LVL186:
+.L113:
+	mov	x19, x0
+.LVL187:
+.LBE118:
+.LBE120:
+	.loc 1 671 0
+	ldr	x0, [x0, 8]
+.LVL188:
+	mov	w21, w1
+	cbz	x0, .L115
+.LVL189:
+.LBB121:
+.LBB122:
+	.loc 2 81 0
+	bl	free
+.LVL190:
+.LBE122:
+.LBE121:
+	.loc 1 673 0
+	str	xzr, [x19, 8]
+.L115:
+	.loc 1 677 0
+	sub	w1, w21, #1
+	cmp	w1, 10
+	bhi	.L138
+	adrp	x0, .L117
+	add	x0, x0, :lo12:.L117
+	ldrh	w0, [x0,w1,uxtw #1]
+	adr	x1, .Lrtx117
+	add	x0, x1, w0, sxth #2
+	br	x0
+.Lrtx117:
+	.section	.rodata.pvi_wf_get_lut,"a",@progbits
+	.align	0
+	.align	2
+.L117:
+	.2byte	(.L116 - .Lrtx117) / 4
+	.2byte	(.L118 - .Lrtx117) / 4
+	.2byte	(.L119 - .Lrtx117) / 4
+	.2byte	(.L171 - .Lrtx117) / 4
+	.2byte	(.L121 - .Lrtx117) / 4
+	.2byte	(.L122 - .Lrtx117) / 4
+	.2byte	(.L123 - .Lrtx117) / 4
+	.2byte	(.L124 - .Lrtx117) / 4
+	.2byte	(.L125 - .Lrtx117) / 4
+	.2byte	(.L126 - .Lrtx117) / 4
+	.2byte	(.L127 - .Lrtx117) / 4
+	.section	.text.pvi_wf_get_lut
+.LVL191:
+.L147:
+.LBB123:
+.LBB119:
+	.loc 1 292 0
+	mov	w20, -1
+.LVL192:
+	b	.L113
+.LVL193:
+.L116:
+.LBE119:
+.LBE123:
+.LBB124:
+.LBB125:
+	.loc 1 507 0
+	mov	w0, 1
+	bl	get_wf_mode_index
+.LVL194:
+	.loc 1 508 0
+	mov	w1, w20
+	bl	get_wf_frm_num
+.LVL195:
+	.loc 1 510 0
+	add	w21, w0, 3
+.LVL196:
+	mov	w20, 4
+	.loc 1 508 0
+	mov	w22, w0
+.LVL197:
+.LBB126:
+.LBB127:
+	.loc 2 58 0
+	mov	w1, 32768
+.LBE127:
+.LBE126:
+	.loc 1 510 0
+	sdiv	w20, w21, w20
+	sxtw	x20, w20
+.LVL198:
+.LBB129:
+.LBB128:
+	.loc 2 58 0
+	mov	x0, x20
+.LVL199:
+	bl	kmalloc
+.LVL200:
+	mov	x24, x0
+.LVL201:
+.LBE128:
+.LBE129:
+	.loc 1 511 0
+	cbz	x0, .L138
+.LVL202:
+.LBB130:
+.LBB131:
+	.loc 1 450 0
+	adrp	x25, .LANCHOR6
+	add	x23, x25, :lo12:.LANCHOR6
+	mov	x2, 1200
+	mov	w1, 0
+	mov	x0, x23
+.LVL203:
+	bl	memset
+.LVL204:
+.LBB132:
+.LBB133:
+	.loc 1 159 0
+	adrp	x4, waveformdata
+	add	x4, x4, :lo12:waveformdata
+.LBE133:
+.LBE132:
+	.loc 1 450 0
+	mov	x3, 0
+	.loc 1 453 0
+	mov	w5, 16
+.LVL205:
+.L129:
+	mov	w2, w3
+.LVL206:
+	.loc 1 451 0
+	cmp	w22, w3
+	bgt	.L130
+	.loc 1 456 0
+	mov	x2, x20
+.LVL207:
+	add	x1, x25, :lo12:.LANCHOR6
+	mov	x0, x24
+	bl	memcpy
+.LVL208:
+.LBE131:
+.LBE130:
+	.loc 1 518 0
+	str	w22, [x19]
+.LVL209:
+.LBB137:
+.LBB138:
+	.loc 1 364 0
+	lsr	w21, w21, 2
+.LVL210:
+.LBB139:
+.LBB140:
+	.loc 2 58 0
+	mov	w1, 32768
+	lsl	w0, w22, 10
+	bl	kmalloc
+.LVL211:
+.LBE140:
+.LBE139:
+	.loc 1 368 0
+	cbz	x0, .L149
+	mov	x2, 0
+.LVL212:
+.L132:
+	.loc 1 371 0
+	cmp	w21, w2
+	bgt	.L136
+.LVL213:
+.L131:
+.LBE138:
+.LBE137:
+	.loc 1 520 0
+	str	x0, [x19, 8]
+.LVL214:
+.LBB143:
+.LBB144:
+	.loc 2 81 0
+	mov	x0, x24
+.LVL215:
+.L175:
+.LBE144:
+.LBE143:
+.LBE125:
+.LBE124:
+.LBB148:
+.LBB149:
+.LBB150:
+.LBB151:
+	bl	free
+.LVL216:
+	b	.L170
+.LVL217:
+.L130:
+.LBE151:
+.LBE150:
+.LBE149:
+.LBE148:
+.LBB165:
+.LBB147:
+.LBB145:
+.LBB136:
+	.loc 1 453 0
+	sdiv	w1, w3, w5
+.LBB135:
+.LBB134:
+	.loc 1 159 0
+	lsl	x0, x3, 10
+.LBE134:
+.LBE135:
+	.loc 1 453 0
+	negs	w2, w2
+.LVL218:
+	and	w6, w3, 15
+	and	w2, w2, 15
+	add	x3, x3, 1
+.LVL219:
+	ldrb	w0, [x0, x4]
+	csneg	w2, w6, w2, mi
+	sxtw	x1, w1
+	lsl	w2, w2, 1
+	lsl	w2, w0, w2
+	ldr	w0, [x23, x1, lsl 2]
+	orr	w2, w2, w0
+	str	w2, [x23, x1, lsl 2]
+	b	.L129
+.LVL220:
+.L136:
+.LBE136:
+.LBE145:
+.LBB146:
+.LBB142:
+	.loc 1 372 0
+	ldr	w6, [x24, x2, lsl 2]
+.LVL221:
+	lsl	x7, x2, 8
+	mov	x3, 0
+.LVL222:
+.L135:
+.LBB141:
+	.loc 1 374 0
+	lsl	w1, w3, 1
+	mov	w4, 0
+	asr	w1, w6, w1
+	and	w1, w1, 3
+.LVL223:
+	.loc 1 375 0
+	mov	w5, w1
+.LVL224:
+.L133:
+	.loc 1 378 0
+	lsl	w8, w1, w4
+	add	w4, w4, 2
+	orr	w5, w5, w8
+.LVL225:
+	.loc 1 377 0
+	cmp	w4, 32
+	bne	.L133
+	add	x4, x7, x3, lsl 4
+	mov	x1, 0
+.LVL226:
+	add	x4, x0, x4, lsl 2
+.LVL227:
+.L134:
+	.loc 1 381 0
+	str	w5, [x4, x1, lsl 2]
+.LVL228:
+	add	x1, x1, 1
+.LVL229:
+	.loc 1 380 0
+	cmp	x1, 16
+	bne	.L134
+.LVL230:
+	add	x3, x3, 1
+.LVL231:
+.LBE141:
+	.loc 1 373 0
+	cmp	x3, 16
+	bne	.L135
+.LVL232:
+	add	x2, x2, 1
+.LVL233:
+	b	.L132
+.LVL234:
+.L149:
+	.loc 1 369 0
+	mov	x0, 0
+	b	.L131
+.LVL235:
+.L118:
+.LBE142:
+.LBE146:
+.LBE147:
+.LBE165:
+.LBB166:
+.LBB167:
+	.loc 1 558 0
+	mov	w0, 2
+	bl	get_wf_mode_index
+.LVL236:
+	.loc 1 559 0
+	mov	w1, w20
+	bl	get_wf_frm_num
+.LVL237:
+	mov	w20, w0
+.LVL238:
+	.loc 1 561 0
+	str	w20, [x19]
+.LVL239:
+	.loc 1 562 0
+	lsl	w0, w0, 6
+.LVL240:
+.LBB168:
+.LBB169:
+	.loc 2 58 0
+	mov	w1, 32768
+	sxtw	x0, w0
+.LVL241:
+	bl	kmalloc
+.LVL242:
+.LBE169:
+.LBE168:
+	.loc 1 562 0
+	str	x0, [x19, 8]
+	.loc 1 563 0
+	cbnz	x0, .L137
+.LVL243:
+.L138:
+.LBE167:
+.LBE166:
+	.loc 1 733 0
+	mov	w0, -1
+	b	.L109
+.LVL244:
+.L137:
+.LBB171:
+.LBB170:
+	.loc 1 566 0
+	mov	w1, w20
+.LVL245:
+.L173:
+.LBE170:
+.LBE171:
+.LBB172:
+.LBB173:
+	.loc 1 605 0
+	bl	get_lut_gray8_data.isra.3
+.LVL246:
+	b	.L170
+.LVL247:
+.L123:
+.LBE173:
+.LBE172:
+	.loc 1 691 0
+	mov	w2, 7
+.L174:
+	.loc 1 715 0
+	mov	w1, w20
+	mov	x0, x19
+	bl	parse_wf_gray16_with_lut_type
+.LVL248:
+.L172:
+	.loc 1 738 0
+	cmp	w0, 0
+	csetm	w0, ne
+.L109:
+	.loc 1 747 0
+	ldp	x19, x20, [sp, 16]
+.LVL249:
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 25
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL250:
+.L124:
+	.cfi_restore_state
+	.loc 1 697 0
+	mov	w2, 8
+	b	.L174
+.L125:
+	.loc 1 703 0
+	mov	w2, 9
+	b	.L174
+.L126:
+	.loc 1 709 0
+	mov	w2, 10
+	b	.L174
+.L127:
+	.loc 1 715 0
+	mov	w2, 11
+	b	.L174
+.L119:
+	.loc 1 721 0
+	adrp	x0, .LC4
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+.LVL251:
+.L170:
+	.loc 1 746 0
+	mov	w0, 0
+	b	.L109
+.LVL252:
+.L121:
+.LBB177:
+.LBB164:
+	.loc 1 617 0
+	mov	w0, 5
+	bl	get_wf_mode_index
+.LVL253:
+	.loc 1 618 0
+	mov	w1, w20
+	bl	get_wf_frm_num
+.LVL254:
+	mov	w21, w0
+.LVL255:
+	.loc 1 620 0
+	str	w21, [x19]
+.LVL256:
+	.loc 1 621 0
+	lsl	w0, w0, 6
+.LVL257:
+.LBB153:
+.LBB154:
+	.loc 2 58 0
+	mov	w1, 32768
+	sxtw	x0, w0
+.LVL258:
+	bl	kmalloc
+.LVL259:
+.LBE154:
+.LBE153:
+	.loc 1 621 0
+	str	x0, [x19, 8]
+	.loc 1 622 0
+	cbz	x0, .L138
+	.loc 1 625 0
+	mov	w1, w21
+	bl	get_lut_gray8_data.isra.3
+.LVL260:
+	.loc 1 628 0
+	mov	w0, 4
+	bl	get_wf_mode_index
+.LVL261:
+	.loc 1 629 0
+	mov	w1, w20
+	bl	get_wf_frm_num
+.LVL262:
+	mov	w20, w0
+.LVL263:
+	.loc 1 632 0
+	ldr	w0, [x19]
+.LVL264:
+.LBB155:
+.LBB156:
+	.loc 2 58 0
+	mov	w1, 32768
+.LBE156:
+.LBE155:
+	.loc 1 632 0
+	orr	w0, w0, w20, lsl 8
+	str	w0, [x19]
+.LVL265:
+	.loc 1 634 0
+	lsl	w0, w20, 3
+.LBB158:
+.LBB157:
+	.loc 2 58 0
+	sxtw	x0, w0
+.LVL266:
+	bl	kmalloc
+.LVL267:
+	mov	x21, x0
+.LVL268:
+.LBE157:
+.LBE158:
+	.loc 1 635 0
+	cbz	x0, .L138
+	.loc 1 638 0
+	mov	w1, w20
+	bl	get_lut_gray2_data.isra.4
+.LVL269:
+	mov	x0, 4
+	ldr	x3, [x19, 8]
+.LVL270:
+	add	x20, x0, x20, uxtw 3
+.LVL271:
+	add	x2, x21, 4
+	add	x20, x21, x20
+.LVL272:
+.L139:
+.LBB159:
+.LBB160:
+	.loc 1 431 0
+	cmp	x20, x2
+	bne	.L141
+.LVL273:
+.LBE160:
+.LBE159:
+.LBB162:
+.LBB152:
+	.loc 2 81 0
+	mov	x0, x21
+	b	.L175
+.LVL274:
+.L141:
+.LBE152:
+.LBE162:
+.LBB163:
+.LBB161:
+	.loc 1 433 0
+	ldp	w7, w6, [x2, -4]
+.LVL275:
+	mov	x1, 0
+.LVL276:
+.L140:
+	.loc 1 435 0
+	ldr	w0, [x3, x1, lsl 2]
+.LVL277:
+	.loc 1 436 0
+	and	w4, w0, 1073741820
+.LVL278:
+	lsl	w0, w1, 1
+.LVL279:
+	.loc 1 437 0
+	asr	w5, w7, w0
+	and	w5, w5, 3
+	.loc 1 438 0
+	asr	w0, w6, w0
+.LVL280:
+	.loc 1 437 0
+	orr	w0, w5, w0, lsl 30
+	orr	w0, w0, w4
+	.loc 1 439 0
+	str	w0, [x3, x1, lsl 2]
+.LVL281:
+	add	x1, x1, 1
+.LVL282:
+	.loc 1 434 0
+	cmp	x1, 16
+	bne	.L140
+	add	x3, x3, 64
+.LVL283:
+	add	x2, x2, 8
+.LVL284:
+	b	.L139
+.LVL285:
+.L122:
+.LBE161:
+.LBE163:
+.LBE164:
+.LBE177:
+.LBB178:
+.LBB176:
+	.loc 1 594 0
+	mov	w0, 6
+	bl	get_wf_mode_index
+.LVL286:
+	.loc 1 595 0
+	mov	w1, w20
+	bl	get_wf_frm_num
+.LVL287:
+	mov	w21, w0
+.LVL288:
+	.loc 1 597 0
+	cmp	w0, 0
+	bgt	.L142
+.LVL289:
+.L171:
+	.loc 1 598 0
+	mov	w1, w20
+	mov	x0, x19
+	bl	parse_wf_gray2
+.LVL290:
+	b	.L172
+.LVL291:
+.L142:
+	.loc 1 600 0
+	str	w21, [x19]
+.LVL292:
+	.loc 1 601 0
+	lsl	w0, w0, 6
+.LVL293:
+.LBB174:
+.LBB175:
+	.loc 2 58 0
+	mov	w1, 32768
+	sxtw	x0, w0
+	bl	kmalloc
+.LVL294:
+.LBE175:
+.LBE174:
+	.loc 1 601 0
+	str	x0, [x19, 8]
+	.loc 1 602 0
+	cbz	x0, .L138
+	.loc 1 605 0
+	mov	w1, w21
+	b	.L173
+.LVL295:
+.L144:
+	.cfi_def_cfa 31, 0
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 25
+	.cfi_restore 29
+	.cfi_restore 30
+.LBE176:
+.LBE178:
+	.loc 1 656 0
+	mov	w0, -19
+.LVL296:
+	ret
+.LVL297:
+.L145:
+	.loc 1 659 0
+	mov	w0, -22
+.LVL298:
+	ret
+.LVL299:
+.L146:
+	.loc 1 663 0
+	mov	w0, 0
+.LVL300:
+	ret
+	.cfi_endproc
+.LFE232:
+	.size	pvi_wf_get_lut, .-pvi_wf_get_lut
+	.section	.text.pvi_wf_input,"ax",@progbits
+	.align	2
+	.global	pvi_wf_input
+	.type	pvi_wf_input, %function
+pvi_wf_input:
+.LFB233:
+	.loc 1 756 0
+	.cfi_startproc
+.LVL301:
+	.loc 1 759 0
+	adrp	x1, .LANCHOR0
+	ldr	x3, [x1, #:lo12:.LANCHOR0]
+	cbnz	x3, .L181
+	mov	x2, x1
+	.loc 1 763 0
+	ldrb	w1, [x0, 16]
+	cmp	w1, 25
+	bhi	.L179
+	cmp	w1, 24
+	bcs	.L180
+	cmp	w1, 18
+.L198:
+	beq	.L180
+	.loc 1 756 0
+	stp	x29, x30, [sp, -16]!
+	.cfi_def_cfa_offset 16
+	.cfi_offset 29, -16
+	.cfi_offset 30, -8
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 1 772 0
+	ldrb	w2, [x0, 22]
+	adrp	x0, .LC5
+.LVL302:
+	add	x0, x0, :lo12:.LC5
+	bl	printf
+.LVL303:
+	.loc 1 774 0
+	mov	w0, -8
+	.loc 1 780 0
+	ldp	x29, x30, [sp], 16
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+	ret
+.LVL304:
+.L179:
+	.loc 1 763 0
+	cmp	w1, 35
+	beq	.L180
+	cmp	w1, 84
+	beq	.L180
+	cmp	w1, 32
+	b	.L198
+.L180:
+	.loc 1 777 0
+	str	x0, [x2, #:lo12:.LANCHOR0]
+	.loc 1 779 0
+	mov	w0, 0
+.LVL305:
+	ret
+.LVL306:
+.L181:
+	.loc 1 760 0
+	mov	w0, -16
+.LVL307:
+	ret
+	.cfi_endproc
+.LFE233:
+	.size	pvi_wf_input, .-pvi_wf_input
+	.section	.text.pvi_wf_get_version,"ax",@progbits
+	.align	2
+	.global	pvi_wf_get_version
+	.type	pvi_wf_get_version, %function
+pvi_wf_get_version:
+.LFB234:
+	.loc 1 789 0
+	.cfi_startproc
+	.loc 1 790 0
+	adrp	x0, .LANCHOR0
+	ldr	x2, [x0, #:lo12:.LANCHOR0]
+.LVL308:
+	.loc 1 794 0
+	cbz	x2, .L202
+	.loc 1 798 0 discriminator 3
+	adrp	x0, .LANCHOR7
+	add	x0, x0, :lo12:.LANCHOR7
+	mov	x1, 0
+.L201:
+.LVL309:
+	add	x3, x2, x1
+	ldrb	w3, [x3, 65]
+	strb	w3, [x1, x0]
+.LVL310:
+	add	x1, x1, 1
+.LVL311:
+	.loc 1 797 0 discriminator 3
+	cmp	x1, 31
+	bne	.L201
+	.loc 1 800 0
+	strb	wzr, [x0, 31]
+	.loc 1 802 0
+	ret
+.L202:
+	.loc 1 795 0
+	mov	x0, 0
+	.loc 1 803 0
+	ret
+	.cfi_endproc
+.LFE234:
+	.size	pvi_wf_get_version, .-pvi_wf_get_version
+	.section	.bss.global_waveform,"aw",@nobits
+	.align	3
+	.set	.LANCHOR0,. + 0
+	.type	global_waveform, %object
+	.size	global_waveform, 8
+global_waveform:
+	.zero	8
+	.section	.bss.gray_2_data,"aw",@nobits
+	.align	3
+	.set	.LANCHOR2,. + 0
+	.type	gray_2_data, %object
+	.size	gray_2_data, 2400
+gray_2_data:
+	.zero	2400
+	.section	.bss.gray_data,"aw",@nobits
+	.align	3
+	.type	gray_data, %object
+	.size	gray_data, 19200
+gray_data:
+	.zero	19200
+	.section	.bss.pvi_modes.5987,"aw",@nobits
+	.align	3
+	.set	.LANCHOR1,. + 0
+	.type	pvi_modes.5987, %object
+	.size	pvi_modes.5987, 36
+pvi_modes.5987:
+	.zero	36
+	.section	.bss.reset_data,"aw",@nobits
+	.align	3
+	.set	.LANCHOR6,. + 0
+	.type	reset_data, %object
+	.size	reset_data, 1200
+reset_data:
+	.zero	1200
+	.section	.bss.spi_id_buffer.6229,"aw",@nobits
+	.align	3
+	.set	.LANCHOR7,. + 0
+	.type	spi_id_buffer.6229, %object
+	.size	spi_id_buffer.6229, 32
+spi_id_buffer.6229:
+	.zero	32
+	.section	.bss.waveformdata,"aw",@nobits
+	.align	3
+	.type	waveformdata, %object
+	.size	waveformdata, 524288
+waveformdata:
+	.zero	524288
+	.section	.data.sftemp.6197,"aw",@progbits
+	.align	2
+	.set	.LANCHOR4,. + 0
+	.type	sftemp.6197, %object
+	.size	sftemp.6197, 4
+sftemp.6197:
+	.word	-1
+	.section	.data.stype.6196,"aw",@progbits
+	.align	2
+	.set	.LANCHOR5,. + 0
+	.type	stype.6196, %object
+	.size	stype.6196, 4
+stype.6196:
+	.word	13
+	.section	.rodata.__func__.6033,"a",@progbits
+	.align	3
+	.set	.LANCHOR3,. + 0
+	.type	__func__.6033, %object
+	.size	__func__.6033, 15
+__func__.6033:
+	.string	"get_wf_frm_num"
+	.section	.rodata.decodewaveform.str1.1,"aMS",@progbits,1
+.LC2:
+	.string	"pvi: decodec waveform 19 error\n"
+	.section	.rodata.get_wf_frm_num.str1.1,"aMS",@progbits,1
+.LC3:
+	.string	"pvi: %s %d check error\n"
+	.section	.rodata.get_wf_mode_index.str1.1,"aMS",@progbits,1
+.LC0:
+	.string	"pvi : Unknow waveform version %x,%x\n"
+.LC1:
+	.string	"pvi: unspport PVI waveform type"
+	.section	.rodata.pvi_wf_get_lut.str1.1,"aMS",@progbits,1
+.LC4:
+	.string	"pvi: unsupport WF GRAY4n"
+	.section	.rodata.pvi_wf_input.str1.1,"aMS",@progbits,1
+.LC5:
+	.string	"pvi : Unknow waveform version %x,%x, may be wrong waveform file\n"
+	.text
+.Letext0:
+	.file 3 "include/common.h"
+	.file 4 "./arch/arm/include/asm/types.h"
+	.file 5 "./arch/arm/include/asm/posix_types.h"
+	.file 6 "include/linux/types.h"
+	.file 7 "include/errno.h"
+	.file 8 "include/linux/string.h"
+	.file 9 "include/efi.h"
+	.file 10 "include/ide.h"
+	.file 11 "include/part.h"
+	.file 12 "include/flash.h"
+	.file 13 "include/lmb.h"
+	.file 14 "include/asm-generic/u-boot.h"
+	.file 15 "./arch/arm/include/asm/u-boot-arm.h"
+	.file 16 "include/linux/libfdt_env.h"
+	.file 17 "include/linux/../../scripts/dtc/libfdt/fdt.h"
+	.file 18 "include/linux/libfdt.h"
+	.file 19 "include/image.h"
+	.file 20 "include/net.h"
+	.file 21 "include/dm/uclass-id.h"
+	.file 22 "include/malloc.h"
+	.file 23 "drivers/video/rk_eink/epdlut/epd_lut.h"
+	.file 24 "include/stdio.h"
+	.file 25 "include/log.h"
+	.section	.debug_info,"",@progbits
+.Ldebug_info0:
+	.4byte	0x2725
+	.2byte	0x4
+	.4byte	.Ldebug_abbrev0
+	.byte	0x8
+	.uleb128 0x1
+	.4byte	.LASF418
+	.byte	0xc
+	.4byte	.LASF419
+	.4byte	.LASF420
+	.4byte	.Ldebug_ranges0+0x330
+	.8byte	0
+	.4byte	.Ldebug_line0
+	.uleb128 0x2
+	.4byte	.LASF4
+	.byte	0x3
+	.byte	0xd
+	.4byte	0x34
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x8
+	.4byte	.LASF0
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF1
+	.uleb128 0x3
+	.byte	0x2
+	.byte	0x7
+	.4byte	.LASF2
+	.uleb128 0x4
+	.4byte	.LASF23
+	.byte	0x7
+	.byte	0xc
+	.4byte	0x54
+	.uleb128 0x5
+	.byte	0x4
+	.byte	0x5
+	.string	"int"
+	.uleb128 0x6
+	.4byte	0x54
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x6
+	.4byte	.LASF3
+	.uleb128 0x2
+	.4byte	.LASF5
+	.byte	0x4
+	.byte	0xc
+	.4byte	0x34
+	.uleb128 0x3
+	.byte	0x2
+	.byte	0x5
+	.4byte	.LASF6
+	.uleb128 0x2
+	.4byte	.LASF7
+	.byte	0x4
+	.byte	0x12
+	.4byte	0x84
+	.uleb128 0x3
+	.byte	0x4
+	.byte	0x7
+	.4byte	.LASF8
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x5
+	.4byte	.LASF9
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF10
+	.uleb128 0x7
+	.string	"u8"
+	.byte	0x4
+	.byte	0x1f
+	.4byte	0x34
+	.uleb128 0x6
+	.4byte	0x99
+	.uleb128 0x7
+	.string	"u16"
+	.byte	0x4
+	.byte	0x22
+	.4byte	0x42
+	.uleb128 0x7
+	.string	"u32"
+	.byte	0x4
+	.byte	0x25
+	.4byte	0x84
+	.uleb128 0x7
+	.string	"u64"
+	.byte	0x4
+	.byte	0x28
+	.4byte	0x92
+	.uleb128 0x2
+	.4byte	.LASF11
+	.byte	0x4
+	.byte	0x31
+	.4byte	0x92
+	.uleb128 0x2
+	.4byte	.LASF12
+	.byte	0x4
+	.byte	0x32
+	.4byte	0x92
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF13
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0xf3
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x8
+	.4byte	.LASF14
+	.uleb128 0x6
+	.4byte	0xec
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x5
+	.4byte	.LASF15
+	.uleb128 0x2
+	.4byte	.LASF16
+	.byte	0x5
+	.byte	0x21
+	.4byte	0x3b
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0xec
+	.uleb128 0x2
+	.4byte	.LASF17
+	.byte	0x6
+	.byte	0x35
+	.4byte	0xff
+	.uleb128 0x2
+	.4byte	.LASF18
+	.byte	0x6
+	.byte	0x59
+	.4byte	0x42
+	.uleb128 0x2
+	.4byte	.LASF19
+	.byte	0x6
+	.byte	0x5b
+	.4byte	0x3b
+	.uleb128 0x2
+	.4byte	.LASF20
+	.byte	0x6
+	.byte	0x69
+	.4byte	0x67
+	.uleb128 0x2
+	.4byte	.LASF21
+	.byte	0x6
+	.byte	0x97
+	.4byte	0x79
+	.uleb128 0x2
+	.4byte	.LASF22
+	.byte	0x6
+	.byte	0x9f
+	.4byte	0x84
+	.uleb128 0x9
+	.byte	0x8
+	.uleb128 0x4
+	.4byte	.LASF24
+	.byte	0x8
+	.byte	0xb
+	.4byte	0x10a
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x2
+	.4byte	.LASF25
+	.uleb128 0xa
+	.4byte	0xec
+	.4byte	0x171
+	.uleb128 0xb
+	.byte	0
+	.uleb128 0xc
+	.4byte	.LASF26
+	.byte	0x9
+	.2byte	0x140
+	.4byte	0x166
+	.uleb128 0xc
+	.4byte	.LASF27
+	.byte	0x9
+	.2byte	0x143
+	.4byte	0x166
+	.uleb128 0xc
+	.4byte	.LASF28
+	.byte	0x9
+	.2byte	0x143
+	.4byte	0x166
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x19b
+	.uleb128 0xd
+	.uleb128 0xa
+	.4byte	0x126
+	.4byte	0x1a7
+	.uleb128 0xb
+	.byte	0
+	.uleb128 0x4
+	.4byte	.LASF29
+	.byte	0xa
+	.byte	0x10
+	.4byte	0x19c
+	.uleb128 0xa
+	.4byte	0x34
+	.4byte	0x1c2
+	.uleb128 0xe
+	.4byte	0xdf
+	.byte	0x5
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF32
+	.byte	0x10
+	.byte	0xb
+	.byte	0xf
+	.4byte	0x1e7
+	.uleb128 0x10
+	.4byte	.LASF30
+	.byte	0xb
+	.byte	0x10
+	.4byte	0x10a
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF31
+	.byte	0xb
+	.byte	0x11
+	.4byte	0x200
+	.byte	0x8
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1c2
+	.uleb128 0x11
+	.4byte	0x54
+	.4byte	0x200
+	.uleb128 0x12
+	.4byte	0x54
+	.uleb128 0x12
+	.4byte	0x54
+	.byte	0
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x1ec
+	.uleb128 0xa
+	.4byte	0x1e7
+	.4byte	0x211
+	.uleb128 0xb
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x206
+	.uleb128 0x4
+	.4byte	.LASF32
+	.byte	0xb
+	.byte	0xce
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+	.byte	0
+	.uleb128 0x4
+	.4byte	.LASF291
+	.byte	0x2
+	.byte	0x11
+	.4byte	0xea9
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0xe85
+	.uleb128 0x24
+	.4byte	.LASF292
+	.byte	0x4
+	.4byte	0x84
+	.byte	0x17
+	.byte	0x14
+	.4byte	0xf0e
+	.uleb128 0x25
+	.4byte	.LASF293
+	.byte	0x1
+	.uleb128 0x25
+	.4byte	.LASF294
+	.byte	0x2
+	.uleb128 0x25
+	.4byte	.LASF295
+	.byte	0x3
+	.uleb128 0x25
+	.4byte	.LASF296
+	.byte	0x4
+	.uleb128 0x25
+	.4byte	.LASF297
+	.byte	0x5
+	.uleb128 0x25
+	.4byte	.LASF298
+	.byte	0x6
+	.uleb128 0x25
+	.4byte	.LASF299
+	.byte	0x7
+	.uleb128 0x25
+	.4byte	.LASF300
+	.byte	0x8
+	.uleb128 0x25
+	.4byte	.LASF301
+	.byte	0x9
+	.uleb128 0x25
+	.4byte	.LASF302
+	.byte	0xa
+	.uleb128 0x25
+	.4byte	.LASF303
+	.byte	0xb
+	.uleb128 0x25
+	.4byte	.LASF304
+	.byte	0xc
+	.uleb128 0x25
+	.4byte	.LASF305
+	.byte	0xd
+	.byte	0
+	.uleb128 0x24
+	.4byte	.LASF306
+	.byte	0x4
+	.4byte	0x84
+	.byte	0x17
+	.byte	0x2a
+	.4byte	0xf5b
+	.uleb128 0x25
+	.4byte	.LASF307
+	.byte	0
+	.uleb128 0x25
+	.4byte	.LASF308
+	.byte	0x1
+	.uleb128 0x25
+	.4byte	.LASF309
+	.byte	0x2
+	.uleb128 0x25
+	.4byte	.LASF310
+	.byte	0x3
+	.uleb128 0x25
+	.4byte	.LASF311
+	.byte	0x4
+	.uleb128 0x25
+	.4byte	.LASF312
+	.byte	0x5
+	.uleb128 0x25
+	.4byte	.LASF313
+	.byte	0x6
+	.uleb128 0x25
+	.4byte	.LASF314
+	.byte	0x7
+	.uleb128 0x25
+	.4byte	.LASF315
+	.byte	0x8
+	.uleb128 0x25
+	.4byte	.LASF316
+	.byte	0x9
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF317
+	.byte	0x10
+	.byte	0x17
+	.byte	0x43
+	.4byte	0xf80
+	.uleb128 0x10
+	.4byte	.LASF318
+	.byte	0x17
+	.byte	0x44
+	.4byte	0x84
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF319
+	.byte	0x17
+	.byte	0x45
+	.4byte	0xf80
+	.byte	0x8
+	.byte	0
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x84
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0xf5b
+	.uleb128 0xf
+	.4byte	.LASF320
+	.byte	0x30
+	.byte	0x1
+	.byte	0xc
+	.4byte	0x10a1
+	.uleb128 0x10
+	.4byte	.LASF321
+	.byte	0x1
+	.byte	0xd
+	.4byte	0xb3
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF322
+	.byte	0x1
+	.byte	0xe
+	.4byte	0xb3
+	.byte	0x4
+	.uleb128 0x10
+	.4byte	.LASF323
+	.byte	0x1
+	.byte	0xf
+	.4byte	0xb3
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF324
+	.byte	0x1
+	.byte	0x10
+	.4byte	0x99
+	.byte	0xc
+	.uleb128 0x10
+	.4byte	.LASF325
+	.byte	0x1
+	.byte	0x11
+	.4byte	0x99
+	.byte	0xd
+	.uleb128 0x10
+	.4byte	.LASF326
+	.byte	0x1
+	.byte	0x12
+	.4byte	0xa8
+	.byte	0xe
+	.uleb128 0x10
+	.4byte	.LASF327
+	.byte	0x1
+	.byte	0x13
+	.4byte	0x99
+	.byte	0x10
+	.uleb128 0x10
+	.4byte	.LASF328
+	.byte	0x1
+	.byte	0x14
+	.4byte	0x99
+	.byte	0x11
+	.uleb128 0x10
+	.4byte	.LASF329
+	.byte	0x1
+	.byte	0x15
+	.4byte	0x99
+	.byte	0x12
+	.uleb128 0x10
+	.4byte	.LASF330
+	.byte	0x1
+	.byte	0x16
+	.4byte	0x99
+	.byte	0x13
+	.uleb128 0x10
+	.4byte	.LASF331
+	.byte	0x1
+	.byte	0x17
+	.4byte	0x99
+	.byte	0x14
+	.uleb128 0x10
+	.4byte	.LASF332
+	.byte	0x1
+	.byte	0x18
+	.4byte	0x99
+	.byte	0x15
+	.uleb128 0x10
+	.4byte	.LASF333
+	.byte	0x1
+	.byte	0x19
+	.4byte	0x99
+	.byte	0x16
+	.uleb128 0x10
+	.4byte	.LASF334
+	.byte	0x1
+	.byte	0x1a
+	.4byte	0x99
+	.byte	0x17
+	.uleb128 0x10
+	.4byte	.LASF46
+	.byte	0x1
+	.byte	0x1b
+	.4byte	0xb3
+	.byte	0x18
+	.uleb128 0x10
+	.4byte	.LASF335
+	.byte	0x1
+	.byte	0x1c
+	.4byte	0x99
+	.byte	0x1c
+	.uleb128 0x10
+	.4byte	.LASF336
+	.byte	0x1
+	.byte	0x1d
+	.4byte	0x10a1
+	.byte	0x1d
+	.uleb128 0x19
+	.string	"sc1"
+	.byte	0x1
+	.byte	0x1e
+	.4byte	0x99
+	.byte	0x20
+	.uleb128 0x10
+	.4byte	.LASF337
+	.byte	0x1
+	.byte	0x1f
+	.4byte	0x10b1
+	.byte	0x21
+	.uleb128 0x10
+	.4byte	.LASF338
+	.byte	0x1
+	.byte	0x20
+	.4byte	0x99
+	.byte	0x25
+	.uleb128 0x10
+	.4byte	.LASF339
+	.byte	0x1
+	.byte	0x21
+	.4byte	0x99
+	.byte	0x26
+	.uleb128 0x10
+	.4byte	.LASF340
+	.byte	0x1
+	.byte	0x22
+	.4byte	0x10c1
+	.byte	0x27
+	.byte	0
+	.uleb128 0xa
+	.4byte	0x99
+	.4byte	0x10b1
+	.uleb128 0xe
+	.4byte	0xdf
+	.byte	0x2
+	.byte	0
+	.uleb128 0xa
+	.4byte	0x99
+	.4byte	0x10c1
+	.uleb128 0xe
+	.4byte	0xdf
+	.byte	0x3
+	.byte	0
+	.uleb128 0xa
+	.4byte	0x99
+	.4byte	0x10d1
+	.uleb128 0xe
+	.4byte	0xdf
+	.byte	0x8
+	.byte	0
+	.uleb128 0xa
+	.4byte	0x34
+	.4byte	0x10ee
+	.uleb128 0x16
+	.4byte	0xdf
+	.2byte	0x1ff
+	.uleb128 0xe
+	.4byte	0xdf
+	.byte	0x1f
+	.uleb128 0xe
+	.4byte	0xdf
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x2a
+	.4byte	.LASF341
+	.byte	0x1
+	.byte	0x2a
+	.4byte	0x10d1
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	waveformdata
+	.uleb128 0xa
+	.4byte	0x84
+	.4byte	0x111a
+	.uleb128 0x16
+	.4byte	0xdf
+	.2byte	0x12b
+	.uleb128 0xe
+	.4byte	0xdf
+	.byte	0xf
+	.byte	0
+	.uleb128 0x2a
+	.4byte	.LASF342
+	.byte	0x1
+	.byte	0x2b
+	.4byte	0x1103
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	gray_data
+	.uleb128 0xa
+	.4byte	0x84
+	.4byte	0x1140
+	.uleb128 0x16
+	.4byte	0xdf
+	.2byte	0x12b
+	.byte	0
+	.uleb128 0x2a
+	.4byte	.LASF343
+	.byte	0x1
+	.byte	0x2c
+	.4byte	0x112f
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	reset_data
+	.uleb128 0xa
+	.4byte	0x84
+	.4byte	0x116c
+	.uleb128 0x16
+	.4byte	0xdf
+	.2byte	0x12b
+	.uleb128 0xe
+	.4byte	0xdf
+	.byte	0x1
+	.byte	0
+	.uleb128 0x2a
+	.4byte	.LASF344
+	.byte	0x1
+	.byte	0x2d
+	.4byte	0x1155
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	gray_2_data
+	.uleb128 0x2a
+	.4byte	.LASF345
+	.byte	0x1
+	.byte	0x2e
+	.4byte	0x1196
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	global_waveform
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0xf8c
+	.uleb128 0x2b
+	.4byte	.LASF348
+	.byte	0x1
+	.2byte	0x314
+	.4byte	0xe6
+	.8byte	.LFB234
+	.8byte	.LFE234-.LFB234
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x11f1
+	.uleb128 0x2c
+	.4byte	.LASF346
+	.byte	0x1
+	.2byte	0x316
+	.4byte	0xe6
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2c
+	.4byte	.LASF347
+	.byte	0x1
+	.2byte	0x317
+	.4byte	0xb05
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	spi_id_buffer.6229
+	.uleb128 0x2d
+	.string	"i"
+	.byte	0x1
+	.2byte	0x318
+	.4byte	0x54
+	.4byte	.LLST122
+	.byte	0
+	.uleb128 0x2b
+	.4byte	.LASF349
+	.byte	0x1
+	.2byte	0x2f3
+	.4byte	0x54
+	.8byte	.LFB233
+	.8byte	.LFE233-.LFB233
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x124f
+	.uleb128 0x2e
+	.4byte	.LASF352
+	.byte	0x1
+	.2byte	0x2f3
+	.4byte	0x152
+	.4byte	.LLST120
+	.uleb128 0x2f
+	.4byte	.LASF350
+	.byte	0x1
+	.2byte	0x2f5
+	.4byte	0x1196
+	.4byte	.LLST121
+	.uleb128 0x30
+	.8byte	.LVL303
+	.4byte	0x26ee
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC5
+	.byte	0
+	.byte	0
+	.uleb128 0x2b
+	.4byte	.LASF351
+	.byte	0x1
+	.2byte	0x288
+	.4byte	0x54
+	.8byte	.LFB232
+	.8byte	.LFE232-.LFB232
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x19da
+	.uleb128 0x2e
+	.4byte	.LASF353
+	.byte	0x1
+	.2byte	0x288
+	.4byte	0xf86
+	.4byte	.LLST64
+	.uleb128 0x2e
+	.4byte	.LASF354
+	.byte	0x1
+	.2byte	0x288
+	.4byte	0xeaf
+	.4byte	.LLST65
+	.uleb128 0x2e
+	.4byte	.LASF355
+	.byte	0x1
+	.2byte	0x288
+	.4byte	0x54
+	.4byte	.LLST66
+	.uleb128 0x2c
+	.4byte	.LASF356
+	.byte	0x1
+	.2byte	0x28a
+	.4byte	0xeaf
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	stype.6196
+	.uleb128 0x2c
+	.4byte	.LASF357
+	.byte	0x1
+	.2byte	0x28b
+	.4byte	0x54
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	sftemp.6197
+	.uleb128 0x32
+	.4byte	.LASF358
+	.byte	0x1
+	.2byte	0x28c
+	.4byte	0x54
+	.uleb128 0x33
+	.string	"ret"
+	.byte	0x1
+	.2byte	0x28d
+	.4byte	0x54
+	.uleb128 0x34
+	.4byte	0x2216
+	.8byte	.LBB116
+	.4byte	.Ldebug_ranges0+0xe0
+	.byte	0x1
+	.2byte	0x29c
+	.4byte	0x1331
+	.uleb128 0x35
+	.4byte	0x2227
+	.4byte	.LLST67
+	.uleb128 0x36
+	.4byte	.Ldebug_ranges0+0xe0
+	.uleb128 0x37
+	.4byte	0x2233
+	.4byte	.LLST68
+	.uleb128 0x37
+	.4byte	0x223f
+	.4byte	.LLST69
+	.uleb128 0x37
+	.4byte	0x224b
+	.4byte	.LLST70
+	.uleb128 0x37
+	.4byte	0x2257
+	.4byte	.LLST71
+	.byte	0
+	.byte	0
+	.uleb128 0x38
+	.4byte	0x24bb
+	.8byte	.LBB121
+	.8byte	.LBE121-.LBB121
+	.byte	0x1
+	.2byte	0x2a0
+	.4byte	0x1364
+	.uleb128 0x35
+	.4byte	0x24c7
+	.4byte	.LLST72
+	.uleb128 0x39
+	.8byte	.LVL190
+	.4byte	0x26f9
+	.byte	0
+	.uleb128 0x34
+	.4byte	0x1dd8
+	.8byte	.LBB124
+	.4byte	.Ldebug_ranges0+0x120
+	.byte	0x1
+	.2byte	0x2a7
+	.4byte	0x15ec
+	.uleb128 0x3a
+	.4byte	0x1df5
+	.uleb128 0x35
+	.4byte	0x1de9
+	.4byte	.LLST73
+	.uleb128 0x36
+	.4byte	.Ldebug_ranges0+0x120
+	.uleb128 0x3b
+	.4byte	0x1e01
+	.uleb128 0x37
+	.4byte	0x1e0d
+	.4byte	.LLST74
+	.uleb128 0x37
+	.4byte	0x1e19
+	.4byte	.LLST75
+	.uleb128 0x34
+	.4byte	0x24d3
+	.8byte	.LBB126
+	.4byte	.Ldebug_ranges0+0x150
+	.byte	0x1
+	.2byte	0x1fe
+	.4byte	0x13ec
+	.uleb128 0x35
+	.4byte	0x24ee
+	.4byte	.LLST76
+	.uleb128 0x35
+	.4byte	0x24e3
+	.4byte	.LLST77
+	.uleb128 0x30
+	.8byte	.LVL200
+	.4byte	0x2705
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x8000
+	.byte	0
+	.byte	0
+	.uleb128 0x34
+	.4byte	0x1f00
+	.8byte	.LBB130
+	.4byte	.Ldebug_ranges0+0x180
+	.byte	0x1
+	.2byte	0x202
+	.4byte	0x14b2
+	.uleb128 0x3a
+	.4byte	0x1f19
+	.uleb128 0x3a
+	.4byte	0x1f25
+	.uleb128 0x35
+	.4byte	0x1f31
+	.4byte	.LLST78
+	.uleb128 0x35
+	.4byte	0x1f0d
+	.4byte	.LLST79
+	.uleb128 0x36
+	.4byte	.Ldebug_ranges0+0x180
+	.uleb128 0x3b
+	.4byte	0x1f3d
+	.uleb128 0x37
+	.4byte	0x1f49
+	.4byte	.LLST80
+	.uleb128 0x34
+	.4byte	0x236f
+	.8byte	.LBB132
+	.4byte	.Ldebug_ranges0+0x1b0
+	.byte	0x1
+	.2byte	0x1c4
+	.4byte	0x1465
+	.uleb128 0x3a
+	.4byte	0x237f
+	.uleb128 0x3a
+	.4byte	0x238a
+	.uleb128 0x3a
+	.4byte	0x23ab
+	.uleb128 0x3a
+	.4byte	0x23a0
+	.uleb128 0x3a
+	.4byte	0x2395
+	.byte	0
+	.uleb128 0x3c
+	.8byte	.LVL204
+	.4byte	0x2710
+	.4byte	0x1489
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x4b0
+	.byte	0
+	.uleb128 0x30
+	.8byte	.LVL208
+	.4byte	0x271c
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR6
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x34
+	.4byte	0x206a
+	.8byte	.LBB137
+	.4byte	.Ldebug_ranges0+0x1e0
+	.byte	0x1
+	.2byte	0x208
+	.4byte	0x1599
+	.uleb128 0x35
+	.4byte	0x207b
+	.4byte	.LLST81
+	.uleb128 0x36
+	.4byte	.Ldebug_ranges0+0x1e0
+	.uleb128 0x37
+	.4byte	0x2087
+	.4byte	.LLST82
+	.uleb128 0x3b
+	.4byte	0x2093
+	.uleb128 0x37
+	.4byte	0x209f
+	.4byte	.LLST83
+	.uleb128 0x37
+	.4byte	0x20a9
+	.4byte	.LLST84
+	.uleb128 0x37
+	.4byte	0x20b3
+	.4byte	.LLST85
+	.uleb128 0x37
+	.4byte	0x20bd
+	.4byte	.LLST86
+	.uleb128 0x37
+	.4byte	0x20c7
+	.4byte	.LLST87
+	.uleb128 0x37
+	.4byte	0x20d3
+	.4byte	.LLST88
+	.uleb128 0x37
+	.4byte	0x20df
+	.4byte	.LLST89
+	.uleb128 0x38
+	.4byte	0x24d3
+	.8byte	.LBB139
+	.8byte	.LBE139-.LBB139
+	.byte	0x1
+	.2byte	0x16f
+	.4byte	0x1573
+	.uleb128 0x35
+	.4byte	0x24ee
+	.4byte	.LLST90
+	.uleb128 0x3a
+	.4byte	0x24e3
+	.uleb128 0x30
+	.8byte	.LVL211
+	.4byte	0x2705
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0xa
+	.byte	0x86
+	.sleb128 0
+	.byte	0x3a
+	.byte	0x24
+	.byte	0xc
+	.4byte	0xffffffff
+	.byte	0x1a
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x8000
+	.byte	0
+	.byte	0
+	.uleb128 0x3d
+	.8byte	.LBB141
+	.8byte	.LBE141-.LBB141
+	.uleb128 0x37
+	.4byte	0x20ec
+	.4byte	.LLST91
+	.uleb128 0x37
+	.4byte	0x20f8
+	.4byte	.LLST92
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x38
+	.4byte	0x24bb
+	.8byte	.LBB143
+	.8byte	.LBE143-.LBB143
+	.byte	0x1
+	.2byte	0x20a
+	.4byte	0x15bf
+	.uleb128 0x35
+	.4byte	0x24c7
+	.4byte	.LLST93
+	.byte	0
+	.uleb128 0x3c
+	.8byte	.LVL194
+	.4byte	0x2262
+	.4byte	0x15d6
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x30
+	.8byte	.LVL195
+	.4byte	0x2106
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x34
+	.4byte	0x19da
+	.8byte	.LBB148
+	.4byte	.Ldebug_ranges0+0x210
+	.byte	0x1
+	.2byte	0x2db
+	.4byte	0x17fd
+	.uleb128 0x3a
+	.4byte	0x19f7
+	.uleb128 0x35
+	.4byte	0x19eb
+	.4byte	.LLST94
+	.uleb128 0x36
+	.4byte	.Ldebug_ranges0+0x210
+	.uleb128 0x3b
+	.4byte	0x1a03
+	.uleb128 0x37
+	.4byte	0x1a0f
+	.4byte	.LLST95
+	.uleb128 0x37
+	.4byte	0x1a1b
+	.4byte	.LLST96
+	.uleb128 0x34
+	.4byte	0x24bb
+	.8byte	.LBB150
+	.4byte	.Ldebug_ranges0+0x240
+	.byte	0x1
+	.2byte	0x283
+	.4byte	0x165d
+	.uleb128 0x35
+	.4byte	0x24c7
+	.4byte	.LLST97
+	.uleb128 0x39
+	.8byte	.LVL216
+	.4byte	0x26f9
+	.byte	0
+	.uleb128 0x38
+	.4byte	0x24d3
+	.8byte	.LBB153
+	.8byte	.LBE153-.LBB153
+	.byte	0x1
+	.2byte	0x26d
+	.4byte	0x16af
+	.uleb128 0x35
+	.4byte	0x24ee
+	.4byte	.LLST98
+	.uleb128 0x35
+	.4byte	0x24e3
+	.4byte	.LLST99
+	.uleb128 0x30
+	.8byte	.LVL259
+	.4byte	0x2705
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0xa
+	.byte	0x85
+	.sleb128 0
+	.byte	0x36
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x8000
+	.byte	0
+	.byte	0
+	.uleb128 0x34
+	.4byte	0x24d3
+	.8byte	.LBB155
+	.4byte	.Ldebug_ranges0+0x270
+	.byte	0x1
+	.2byte	0x27a
+	.4byte	0x16fd
+	.uleb128 0x35
+	.4byte	0x24ee
+	.4byte	.LLST100
+	.uleb128 0x35
+	.4byte	0x24e3
+	.4byte	.LLST101
+	.uleb128 0x30
+	.8byte	.LVL267
+	.4byte	0x2705
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0xa
+	.byte	0x84
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x8000
+	.byte	0
+	.byte	0
+	.uleb128 0x34
+	.4byte	0x1f54
+	.8byte	.LBB159
+	.4byte	.Ldebug_ranges0+0x2a0
+	.byte	0x1
+	.2byte	0x281
+	.4byte	0x176b
+	.uleb128 0x35
+	.4byte	0x1f6d
+	.4byte	.LLST102
+	.uleb128 0x35
+	.4byte	0x1f61
+	.4byte	.LLST103
+	.uleb128 0x36
+	.4byte	.Ldebug_ranges0+0x2a0
+	.uleb128 0x37
+	.4byte	0x1f79
+	.4byte	.LLST104
+	.uleb128 0x3e
+	.4byte	0x1f85
+	.uleb128 0x1
+	.byte	0x57
+	.uleb128 0x37
+	.4byte	0x1f91
+	.4byte	.LLST105
+	.uleb128 0x37
+	.4byte	0x1f9d
+	.4byte	.LLST106
+	.uleb128 0x37
+	.4byte	0x1fa9
+	.4byte	.LLST107
+	.uleb128 0x37
+	.4byte	0x1fb5
+	.4byte	.LLST108
+	.uleb128 0x37
+	.4byte	0x1fc1
+	.4byte	.LLST109
+	.byte	0
+	.byte	0
+	.uleb128 0x3c
+	.8byte	.LVL253
+	.4byte	0x2262
+	.4byte	0x1782
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x35
+	.byte	0
+	.uleb128 0x3c
+	.8byte	.LVL254
+	.4byte	0x2106
+	.4byte	0x179a
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x3c
+	.8byte	.LVL260
+	.4byte	0x24fa
+	.4byte	0x17b2
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.byte	0
+	.uleb128 0x3c
+	.8byte	.LVL261
+	.4byte	0x2262
+	.4byte	0x17c9
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x34
+	.byte	0
+	.uleb128 0x3c
+	.8byte	.LVL262
+	.4byte	0x2106
+	.4byte	0x17e1
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x30
+	.8byte	.LVL269
+	.4byte	0x25f3
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x34
+	.4byte	0x1b7d
+	.8byte	.LBB166
+	.4byte	.Ldebug_ranges0+0x2d0
+	.byte	0x1
+	.2byte	0x2ad
+	.4byte	0x18b9
+	.uleb128 0x3a
+	.4byte	0x1b9a
+	.uleb128 0x35
+	.4byte	0x1b8e
+	.4byte	.LLST110
+	.uleb128 0x36
+	.4byte	.Ldebug_ranges0+0x2d0
+	.uleb128 0x37
+	.4byte	0x1ba6
+	.4byte	.LLST111
+	.uleb128 0x37
+	.4byte	0x1bb2
+	.4byte	.LLST112
+	.uleb128 0x38
+	.4byte	0x24d3
+	.8byte	.LBB168
+	.8byte	.LBE168-.LBB168
+	.byte	0x1
+	.2byte	0x232
+	.4byte	0x188c
+	.uleb128 0x35
+	.4byte	0x24ee
+	.4byte	.LLST113
+	.uleb128 0x35
+	.4byte	0x24e3
+	.4byte	.LLST114
+	.uleb128 0x30
+	.8byte	.LVL242
+	.4byte	0x2705
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0xa
+	.byte	0x84
+	.sleb128 0
+	.byte	0x36
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x8000
+	.byte	0
+	.byte	0
+	.uleb128 0x3c
+	.8byte	.LVL236
+	.4byte	0x2262
+	.4byte	0x18a3
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x32
+	.byte	0
+	.uleb128 0x30
+	.8byte	.LVL237
+	.4byte	0x2106
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x34
+	.4byte	0x1a28
+	.8byte	.LBB172
+	.4byte	.Ldebug_ranges0+0x300
+	.byte	0x1
+	.2byte	0x2e1
+	.4byte	0x19a0
+	.uleb128 0x3a
+	.4byte	0x1a45
+	.uleb128 0x35
+	.4byte	0x1a39
+	.4byte	.LLST115
+	.uleb128 0x36
+	.4byte	.Ldebug_ranges0+0x300
+	.uleb128 0x37
+	.4byte	0x1a51
+	.4byte	.LLST116
+	.uleb128 0x37
+	.4byte	0x1a5d
+	.4byte	.LLST117
+	.uleb128 0x38
+	.4byte	0x24d3
+	.8byte	.LBB174
+	.8byte	.LBE174-.LBB174
+	.byte	0x1
+	.2byte	0x259
+	.4byte	0x1948
+	.uleb128 0x35
+	.4byte	0x24ee
+	.4byte	.LLST118
+	.uleb128 0x35
+	.4byte	0x24e3
+	.4byte	.LLST119
+	.uleb128 0x30
+	.8byte	.LVL294
+	.4byte	0x2705
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0xa
+	.byte	0x85
+	.sleb128 0
+	.byte	0x36
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x8000
+	.byte	0
+	.byte	0
+	.uleb128 0x39
+	.8byte	.LVL246
+	.4byte	0x24fa
+	.uleb128 0x3c
+	.8byte	.LVL286
+	.4byte	0x2262
+	.4byte	0x196c
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x36
+	.byte	0
+	.uleb128 0x3c
+	.8byte	.LVL287
+	.4byte	0x2106
+	.4byte	0x1984
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x30
+	.8byte	.LVL290
+	.4byte	0x1bbf
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x3c
+	.8byte	.LVL248
+	.4byte	0x1a6a
+	.4byte	0x19be
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x30
+	.8byte	.LVL251
+	.4byte	0x26ee
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC4
+	.byte	0
+	.byte	0
+	.uleb128 0x3f
+	.4byte	.LASF361
+	.byte	0x1
+	.2byte	0x262
+	.4byte	0x54
+	.byte	0x1
+	.4byte	0x1a28
+	.uleb128 0x40
+	.4byte	.LASF353
+	.byte	0x1
+	.2byte	0x262
+	.4byte	0xf86
+	.uleb128 0x40
+	.4byte	.LASF358
+	.byte	0x1
+	.2byte	0x262
+	.4byte	0x54
+	.uleb128 0x32
+	.4byte	.LASF359
+	.byte	0x1
+	.2byte	0x264
+	.4byte	0xf5b
+	.uleb128 0x32
+	.4byte	.LASF360
+	.byte	0x1
+	.2byte	0x265
+	.4byte	0x54
+	.uleb128 0x32
+	.4byte	.LASF318
+	.byte	0x1
+	.2byte	0x266
+	.4byte	0x54
+	.byte	0
+	.uleb128 0x3f
+	.4byte	.LASF362
+	.byte	0x1
+	.2byte	0x24d
+	.4byte	0x54
+	.byte	0x1
+	.4byte	0x1a6a
+	.uleb128 0x40
+	.4byte	.LASF353
+	.byte	0x1
+	.2byte	0x24d
+	.4byte	0xf86
+	.uleb128 0x40
+	.4byte	.LASF358
+	.byte	0x1
+	.2byte	0x24d
+	.4byte	0x54
+	.uleb128 0x32
+	.4byte	.LASF360
+	.byte	0x1
+	.2byte	0x24f
+	.4byte	0x54
+	.uleb128 0x32
+	.4byte	.LASF318
+	.byte	0x1
+	.2byte	0x250
+	.4byte	0x54
+	.byte	0
+	.uleb128 0x41
+	.4byte	.LASF364
+	.byte	0x1
+	.2byte	0x23b
+	.4byte	0x54
+	.8byte	.LFB229
+	.8byte	.LFE229-.LFB229
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x1b7d
+	.uleb128 0x2e
+	.4byte	.LASF353
+	.byte	0x1
+	.2byte	0x23b
+	.4byte	0xf86
+	.4byte	.LLST37
+	.uleb128 0x2e
+	.4byte	.LASF358
+	.byte	0x1
+	.2byte	0x23b
+	.4byte	0x54
+	.4byte	.LLST38
+	.uleb128 0x2e
+	.4byte	.LASF354
+	.byte	0x1
+	.2byte	0x23b
+	.4byte	0xeaf
+	.4byte	.LLST39
+	.uleb128 0x2f
+	.4byte	.LASF360
+	.byte	0x1
+	.2byte	0x23d
+	.4byte	0x54
+	.4byte	.LLST40
+	.uleb128 0x2f
+	.4byte	.LASF318
+	.byte	0x1
+	.2byte	0x23e
+	.4byte	0x54
+	.4byte	.LLST41
+	.uleb128 0x38
+	.4byte	0x24d3
+	.8byte	.LBB59
+	.8byte	.LBE59-.LBB59
+	.byte	0x1
+	.2byte	0x244
+	.4byte	0x1b2e
+	.uleb128 0x35
+	.4byte	0x24ee
+	.4byte	.LLST42
+	.uleb128 0x35
+	.4byte	0x24e3
+	.4byte	.LLST43
+	.uleb128 0x30
+	.8byte	.LVL148
+	.4byte	0x2705
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0xa
+	.byte	0x83
+	.sleb128 0
+	.byte	0x36
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x8000
+	.byte	0
+	.byte	0
+	.uleb128 0x3c
+	.8byte	.LVL143
+	.4byte	0x2262
+	.4byte	0x1b47
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0
+	.uleb128 0x3c
+	.8byte	.LVL144
+	.4byte	0x2106
+	.4byte	0x1b5f
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x30
+	.8byte	.LVL149
+	.4byte	0x24fa
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x42
+	.4byte	0x1e4b
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0
+	.byte	0
+	.uleb128 0x3f
+	.4byte	.LASF363
+	.byte	0x1
+	.2byte	0x229
+	.4byte	0x54
+	.byte	0x1
+	.4byte	0x1bbf
+	.uleb128 0x40
+	.4byte	.LASF353
+	.byte	0x1
+	.2byte	0x229
+	.4byte	0xf86
+	.uleb128 0x40
+	.4byte	.LASF358
+	.byte	0x1
+	.2byte	0x229
+	.4byte	0x54
+	.uleb128 0x32
+	.4byte	.LASF360
+	.byte	0x1
+	.2byte	0x22b
+	.4byte	0x54
+	.uleb128 0x32
+	.4byte	.LASF318
+	.byte	0x1
+	.2byte	0x22c
+	.4byte	0x54
+	.byte	0
+	.uleb128 0x41
+	.4byte	.LASF365
+	.byte	0x1
+	.2byte	0x20f
+	.4byte	0x54
+	.8byte	.LFB227
+	.8byte	.LFE227-.LFB227
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x1dd8
+	.uleb128 0x2e
+	.4byte	.LASF353
+	.byte	0x1
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+	.4byte	0xf86
+	.4byte	.LLST44
+	.uleb128 0x2e
+	.4byte	.LASF358
+	.byte	0x1
+	.2byte	0x20f
+	.4byte	0x54
+	.4byte	.LLST45
+	.uleb128 0x32
+	.4byte	.LASF359
+	.byte	0x1
+	.2byte	0x211
+	.4byte	0xf5b
+	.uleb128 0x2f
+	.4byte	.LASF360
+	.byte	0x1
+	.2byte	0x212
+	.4byte	0x54
+	.4byte	.LLST46
+	.uleb128 0x2f
+	.4byte	.LASF318
+	.byte	0x1
+	.2byte	0x213
+	.4byte	0x54
+	.4byte	.LLST47
+	.uleb128 0x38
+	.4byte	0x24d3
+	.8byte	.LBB69
+	.8byte	.LBE69-.LBB69
+	.byte	0x1
+	.2byte	0x219
+	.4byte	0x1c7f
+	.uleb128 0x35
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+	.uleb128 0x35
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+	.uleb128 0x30
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+	.uleb128 0x31
+	.uleb128 0x1
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+	.sleb128 0
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+	.uleb128 0x36
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+	.uleb128 0x37
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+	.uleb128 0x37
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+	.uleb128 0x2
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+	.byte	0x1
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+	.byte	0x1
+	.2byte	0x1df
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+	.4byte	0x1e92
+	.uleb128 0x45
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+	.uleb128 0x33
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+	.uleb128 0x2e
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+	.4byte	.LLST30
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+	.4byte	.LLST34
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+	.4byte	.LLST35
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+	.uleb128 0x2f
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+	.byte	0xf1
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+	.4byte	.LLST1
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+	.uleb128 0x8
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+	.4byte	0x5b
+	.uleb128 0x4e
+	.4byte	.LASF399
+	.byte	0x1
+	.byte	0xa2
+	.4byte	0x2328
+	.byte	0x1
+	.4byte	0x235f
+	.uleb128 0x4f
+	.4byte	.LASF346
+	.byte	0x1
+	.byte	0xa2
+	.4byte	0x1196
+	.uleb128 0x2a
+	.4byte	.LASF398
+	.byte	0x1
+	.byte	0xa4
+	.4byte	0x235f
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	pvi_modes.5987
+	.byte	0
+	.uleb128 0xa
+	.4byte	0x54
+	.4byte	0x236f
+	.uleb128 0xe
+	.4byte	0xdf
+	.byte	0x8
+	.byte	0
+	.uleb128 0x4e
+	.4byte	.LASF400
+	.byte	0x1
+	.byte	0x9c
+	.4byte	0x34
+	.byte	0x1
+	.4byte	0x23b7
+	.uleb128 0x4f
+	.4byte	.LASF387
+	.byte	0x1
+	.byte	0x9c
+	.4byte	0x54
+	.uleb128 0x4f
+	.4byte	.LASF355
+	.byte	0x1
+	.byte	0x9c
+	.4byte	0x54
+	.uleb128 0x4f
+	.4byte	.LASF401
+	.byte	0x1
+	.byte	0x9c
+	.4byte	0x54
+	.uleb128 0x4f
+	.4byte	.LASF367
+	.byte	0x1
+	.byte	0x9d
+	.4byte	0x54
+	.uleb128 0x4f
+	.4byte	.LASF368
+	.byte	0x1
+	.byte	0x9d
+	.4byte	0x54
+	.byte	0
+	.uleb128 0x50
+	.4byte	.LASF402
+	.byte	0x1
+	.byte	0x30
+	.4byte	0x54
+	.8byte	.LFB214
+	.8byte	.LFE214-.LFB214
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x24bb
+	.uleb128 0x4a
+	.4byte	.LASF319
+	.byte	0x1
+	.byte	0x30
+	.4byte	0x4ea
+	.4byte	.LLST18
+	.uleb128 0x51
+	.string	"tmp"
+	.byte	0x1
+	.byte	0x30
+	.4byte	0x54
+	.4byte	.LLST19
+	.uleb128 0x4a
+	.4byte	.LASF387
+	.byte	0x1
+	.byte	0x30
+	.4byte	0x54
+	.4byte	.LLST20
+	.uleb128 0x4a
+	.4byte	.LASF403
+	.byte	0x1
+	.byte	0x30
+	.4byte	0x54
+	.4byte	.LLST21
+	.uleb128 0x4b
+	.4byte	.LASF404
+	.byte	0x1
+	.byte	0x32
+	.4byte	0x84
+	.4byte	.LLST22
+	.uleb128 0x4b
+	.4byte	.LASF405
+	.byte	0x1
+	.byte	0x32
+	.4byte	0x84
+	.4byte	.LLST23
+	.uleb128 0x4b
+	.4byte	.LASF406
+	.byte	0x1
+	.byte	0x33
+	.4byte	0x84
+	.4byte	.LLST24
+	.uleb128 0x4b
+	.4byte	.LASF392
+	.byte	0x1
+	.byte	0x34
+	.4byte	0x84
+	.4byte	.LLST25
+	.uleb128 0x4b
+	.4byte	.LASF407
+	.byte	0x1
+	.byte	0x35
+	.4byte	0x34
+	.4byte	.LLST26
+	.uleb128 0x52
+	.string	"i"
+	.byte	0x1
+	.byte	0x36
+	.4byte	0x34
+	.4byte	.LLST27
+	.uleb128 0x4b
+	.4byte	.LASF408
+	.byte	0x1
+	.byte	0x37
+	.4byte	0x15f
+	.4byte	.LLST28
+	.uleb128 0x3c
+	.8byte	.LVL56
+	.4byte	0x2710
+	.4byte	0x249f
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0x40
+	.byte	0x3f
+	.byte	0x24
+	.byte	0
+	.uleb128 0x30
+	.8byte	.LVL74
+	.4byte	0x26ee
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC2
+	.byte	0
+	.byte	0
+	.uleb128 0x53
+	.4byte	.LASF409
+	.byte	0x2
+	.byte	0x4f
+	.byte	0x3
+	.4byte	0x24d3
+	.uleb128 0x4f
+	.4byte	.LASF410
+	.byte	0x2
+	.byte	0x4f
+	.4byte	0x195
+	.byte	0
+	.uleb128 0x4e
+	.4byte	.LASF411
+	.byte	0x2
+	.byte	0x38
+	.4byte	0x152
+	.byte	0x3
+	.4byte	0x24fa
+	.uleb128 0x4f
+	.4byte	.LASF33
+	.byte	0x2
+	.byte	0x38
+	.4byte	0x110
+	.uleb128 0x4f
+	.4byte	.LASF412
+	.byte	0x2
+	.byte	0x38
+	.4byte	0x147
+	.byte	0
+	.uleb128 0x54
+	.4byte	0x1e26
+	.8byte	.LFB238
+	.8byte	.LFE238-.LFB238
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x25f3
+	.uleb128 0x35
+	.4byte	0x1e33
+	.4byte	.LLST4
+	.uleb128 0x35
+	.4byte	0x1e57
+	.4byte	.LLST5
+	.uleb128 0x55
+	.4byte	0x1e4b
+	.uleb128 0x6
+	.byte	0xfa
+	.4byte	0x1e4b
+	.byte	0x9f
+	.uleb128 0x55
+	.4byte	0x1e3f
+	.uleb128 0x6
+	.byte	0xfa
+	.4byte	0x1e3f
+	.byte	0x9f
+	.uleb128 0x3b
+	.4byte	0x1e63
+	.uleb128 0x37
+	.4byte	0x1e6f
+	.4byte	.LLST6
+	.uleb128 0x37
+	.4byte	0x1e7b
+	.4byte	.LLST7
+	.uleb128 0x37
+	.4byte	0x1e87
+	.4byte	.LLST8
+	.uleb128 0x38
+	.4byte	0x236f
+	.8byte	.LBB49
+	.8byte	.LBE49-.LBB49
+	.byte	0x1
+	.2byte	0x1eb
+	.4byte	0x259d
+	.uleb128 0x35
+	.4byte	0x237f
+	.4byte	.LLST9
+	.uleb128 0x35
+	.4byte	0x238a
+	.4byte	.LLST10
+	.uleb128 0x3a
+	.4byte	0x23ab
+	.uleb128 0x3a
+	.4byte	0x23a0
+	.uleb128 0x3a
+	.4byte	0x2395
+	.byte	0
+	.uleb128 0x3c
+	.8byte	.LVL28
+	.4byte	0x2710
+	.4byte	0x25c1
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x4b00
+	.byte	0
+	.uleb128 0x56
+	.8byte	.LVL38
+	.4byte	0x271c
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	gray_data
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0xb
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x36
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0
+	.byte	0
+	.uleb128 0x54
+	.4byte	0x1e92
+	.8byte	.LFB239
+	.8byte	.LFE239-.LFB239
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x26ee
+	.uleb128 0x35
+	.4byte	0x1e9f
+	.4byte	.LLST11
+	.uleb128 0x35
+	.4byte	0x1ec3
+	.4byte	.LLST12
+	.uleb128 0x55
+	.4byte	0x1eb7
+	.uleb128 0x6
+	.byte	0xfa
+	.4byte	0x1eb7
+	.byte	0x9f
+	.uleb128 0x55
+	.4byte	0x1eab
+	.uleb128 0x6
+	.byte	0xfa
+	.4byte	0x1eab
+	.byte	0x9f
+	.uleb128 0x37
+	.4byte	0x1ecf
+	.4byte	.LLST13
+	.uleb128 0x37
+	.4byte	0x1edb
+	.4byte	.LLST14
+	.uleb128 0x37
+	.4byte	0x1ee7
+	.4byte	.LLST15
+	.uleb128 0x57
+	.4byte	.Ldebug_ranges0+0x30
+	.4byte	0x2698
+	.uleb128 0x3b
+	.4byte	0x1ef2
+	.uleb128 0x58
+	.4byte	0x236f
+	.8byte	.LBB52
+	.4byte	.Ldebug_ranges0+0x80
+	.byte	0x1
+	.2byte	0x1d6
+	.uleb128 0x35
+	.4byte	0x237f
+	.4byte	.LLST16
+	.uleb128 0x35
+	.4byte	0x238a
+	.4byte	.LLST17
+	.uleb128 0x3a
+	.4byte	0x23ab
+	.uleb128 0x3a
+	.4byte	0x23a0
+	.uleb128 0x3a
+	.4byte	0x2395
+	.byte	0
+	.byte	0
+	.uleb128 0x3c
+	.8byte	.LVL42
+	.4byte	0x2710
+	.4byte	0x26bc
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x960
+	.byte	0
+	.uleb128 0x56
+	.8byte	.LVL51
+	.4byte	0x271c
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR2
+	.uleb128 0x31
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0xb
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x33
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0
+	.byte	0
+	.uleb128 0x59
+	.4byte	.LASF413
+	.4byte	.LASF413
+	.byte	0x18
+	.byte	0x13
+	.uleb128 0x5a
+	.4byte	.LASF414
+	.4byte	.LASF414
+	.byte	0x16
+	.2byte	0x399
+	.uleb128 0x59
+	.4byte	.LASF415
+	.4byte	.LASF415
+	.byte	0x2
+	.byte	0x36
+	.uleb128 0x5a
+	.4byte	.LASF416
+	.4byte	.LASF416
+	.byte	0x16
+	.2byte	0x16c
+	.uleb128 0x5a
+	.4byte	.LASF417
+	.4byte	.LASF417
+	.byte	0x16
+	.2byte	0x16d
+	.byte	0
+	.section	.debug_abbrev,"",@progbits
+.Ldebug_abbrev0:
+	.uleb128 0x1
+	.uleb128 0x11
+	.byte	0x1
+	.uleb128 0x25
+	.uleb128 0xe
+	.uleb128 0x13
+	.uleb128 0xb
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x1b
+	.uleb128 0xe
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x10
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x2
+	.uleb128 0x16
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x24
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3e
+	.uleb128 0xb
+	.uleb128 0x3
+	.uleb128 0xe
+	.byte	0
+	.byte	0
+	.uleb128 0x4
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.byte	0
+	.byte	0
+	.uleb128 0x5
+	.uleb128 0x24
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3e
+	.uleb128 0xb
+	.uleb128 0x3
+	.uleb128 0x8
+	.byte	0
+	.byte	0
+	.uleb128 0x6
+	.uleb128 0x26
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x7
+	.uleb128 0x16
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.uleb128 0xf
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x9
+	.uleb128 0xf
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0xa
+	.uleb128 0x1
+	.byte	0x1
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0x21
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0xc
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.byte	0
+	.byte	0
+	.uleb128 0xd
+	.uleb128 0x26
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0xe
+	.uleb128 0x21
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2f
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0xf
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x10
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x11
+	.uleb128 0x15
+	.byte	0x1
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x12
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x13
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0xb
+	.uleb128 0x5
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x14
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x15
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x16
+	.uleb128 0x21
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2f
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x17
+	.uleb128 0x13
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3c
+	.uleb128 0x19
+	.byte	0
+	.byte	0
+	.uleb128 0x18
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0xb
+	.uleb128 0x5
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x19
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x1a
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0xb
+	.uleb128 0x5
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
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+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x20
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x54
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x55
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x56
+	.uleb128 0x4109
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x2115
+	.uleb128 0x19
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x57
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x58
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x52
+	.uleb128 0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x59
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x5a
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.byte	0
+	.section	.debug_loc,"",@progbits
+.Ldebug_loc0:
+.LLST122:
+	.8byte	.LVL309
+	.8byte	.LVL310
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL310
+	.8byte	.LVL311
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST120:
+	.8byte	.LVL301
+	.8byte	.LVL302
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL302
+	.8byte	.LVL304
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL304
+	.8byte	.LVL305
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL305
+	.8byte	.LVL306
+	.2byte	0x9
+	.byte	0x3
+	.8byte	global_waveform
+	.8byte	.LVL306
+	.8byte	.LVL307
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL307
+	.8byte	.LFE233
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST121:
+	.8byte	.LVL301
+	.8byte	.LVL302
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL302
+	.8byte	.LVL304
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL304
+	.8byte	.LVL305
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL305
+	.8byte	.LVL306
+	.2byte	0x9
+	.byte	0x3
+	.8byte	global_waveform
+	.8byte	.LVL306
+	.8byte	.LVL307
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL307
+	.8byte	.LFE233
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST64:
+	.8byte	.LVL180
+	.8byte	.LVL188
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL188
+	.8byte	.LVL191
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL191
+	.8byte	.LVL193
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL193
+	.8byte	.LVL249
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL249
+	.8byte	.LVL250
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL250
+	.8byte	.LVL295
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL295
+	.8byte	.LVL296
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL296
+	.8byte	.LVL297
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL297
+	.8byte	.LVL298
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL298
+	.8byte	.LVL299
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL299
+	.8byte	.LVL300
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL300
+	.8byte	.LFE232
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST65:
+	.8byte	.LVL180
+	.8byte	.LVL190-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL190-1
+	.8byte	.LVL191
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL191
+	.8byte	.LVL193
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL193
+	.8byte	.LVL196
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL196
+	.8byte	.LVL235
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL235
+	.8byte	.LVL243
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL243
+	.8byte	.LVL244
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL244
+	.8byte	.LVL245
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL245
+	.8byte	.LVL247
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL247
+	.8byte	.LVL248
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL248
+	.8byte	.LVL250
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL250
+	.8byte	.LVL251
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL251
+	.8byte	.LVL252
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL252
+	.8byte	.LVL255
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL255
+	.8byte	.LVL285
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL285
+	.8byte	.LVL288
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL288
+	.8byte	.LVL295
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL295
+	.8byte	.LFE232
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST66:
+	.8byte	.LVL180
+	.8byte	.LVL190-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL190-1
+	.8byte	.LVL191
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	.LVL191
+	.8byte	.LVL193
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL193
+	.8byte	.LVL295
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	.LVL295
+	.8byte	.LFE232
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST67:
+	.8byte	.LVL181
+	.8byte	.LVL187
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL191
+	.8byte	.LVL193
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST68:
+	.8byte	.LVL181
+	.8byte	.LVL187
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL191
+	.8byte	.LVL193
+	.2byte	0x1
+	.byte	0x54
+	.8byte	0
+	.8byte	0
+.LLST69:
+	.8byte	.LVL181
+	.8byte	.LVL183
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL183
+	.8byte	.LVL184
+	.2byte	0x3
+	.byte	0x84
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL184
+	.8byte	.LVL186
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL186
+	.8byte	.LVL187
+	.2byte	0x8
+	.byte	0x74
+	.sleb128 38
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	.LVL191
+	.8byte	.LVL192
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL192
+	.8byte	.LVL193
+	.2byte	0x8
+	.byte	0x74
+	.sleb128 38
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST70:
+	.8byte	.LVL181
+	.8byte	.LVL183
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL183
+	.8byte	.LVL184
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL184
+	.8byte	.LVL186
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL191
+	.8byte	.LVL193
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST71:
+	.8byte	.LVL182
+	.8byte	.LVL185
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL185
+	.8byte	.LVL187
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL191
+	.8byte	.LVL193
+	.2byte	0x1
+	.byte	0x53
+	.8byte	0
+	.8byte	0
+.LLST72:
+	.8byte	.LVL189
+	.8byte	.LVL190-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST73:
+	.8byte	.LVL193
+	.8byte	.LVL215
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL217
+	.8byte	.LVL235
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST74:
+	.8byte	.LVL194
+	.8byte	.LVL195-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST75:
+	.8byte	.LVL197
+	.8byte	.LVL199
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL199
+	.8byte	.LVL215
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL217
+	.8byte	.LVL235
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST76:
+	.8byte	.LVL198
+	.8byte	.LVL201
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST77:
+	.8byte	.LVL198
+	.8byte	.LVL201
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST78:
+	.8byte	.LVL202
+	.8byte	.LVL208
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL217
+	.8byte	.LVL220
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST79:
+	.8byte	.LVL202
+	.8byte	.LVL203
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL203
+	.8byte	.LVL208
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL217
+	.8byte	.LVL220
+	.2byte	0x1
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST80:
+	.8byte	.LVL204
+	.8byte	.LVL205
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL206
+	.8byte	.LVL207
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL207
+	.8byte	.LVL208-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL217
+	.8byte	.LVL218
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL218
+	.8byte	.LVL219
+	.2byte	0x1
+	.byte	0x53
+	.8byte	0
+	.8byte	0
+.LLST81:
+	.8byte	.LVL209
+	.8byte	.LVL213
+	.2byte	0x6
+	.byte	0xf2
+	.4byte	.Ldebug_info0+5007
+	.sleb128 0
+	.8byte	.LVL220
+	.8byte	.LVL235
+	.2byte	0x6
+	.byte	0xf2
+	.4byte	.Ldebug_info0+5007
+	.sleb128 0
+	.8byte	0
+	.8byte	0
+.LLST82:
+	.8byte	.LVL210
+	.8byte	.LVL212
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL212
+	.8byte	.LVL213
+	.2byte	0x8
+	.byte	0x72
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x88
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.8byte	.LVL220
+	.8byte	.LVL233
+	.2byte	0x8
+	.byte	0x72
+	.sleb128 1
+	.byte	0x32
+	.byte	0x24
+	.byte	0x88
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.8byte	.LVL233
+	.8byte	.LVL234
+	.2byte	0x8
+	.byte	0x72
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x88
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.8byte	.LVL234
+	.8byte	.LVL235
+	.2byte	0x1
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST83:
+	.8byte	.LVL212
+	.8byte	.LVL213
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL220
+	.8byte	.LVL232
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL232
+	.8byte	.LVL233
+	.2byte	0x3
+	.byte	0x72
+	.sleb128 1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST84:
+	.8byte	.LVL221
+	.8byte	.LVL222
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL222
+	.8byte	.LVL230
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL230
+	.8byte	.LVL231
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST85:
+	.8byte	.LVL223
+	.8byte	.LVL224
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST86:
+	.8byte	.LVL227
+	.8byte	.LVL228
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL228
+	.8byte	.LVL229
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST87:
+	.8byte	.LVL221
+	.8byte	.LVL234
+	.2byte	0x1
+	.byte	0x56
+	.8byte	0
+	.8byte	0
+.LLST88:
+	.8byte	.LVL209
+	.8byte	.LVL212
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL212
+	.8byte	.LVL213
+	.2byte	0x5
+	.byte	0x72
+	.sleb128 0
+	.byte	0x38
+	.byte	0x24
+	.byte	0x9f
+	.8byte	.LVL220
+	.8byte	.LVL222
+	.2byte	0x5
+	.byte	0x72
+	.sleb128 0
+	.byte	0x38
+	.byte	0x24
+	.byte	0x9f
+	.8byte	.LVL222
+	.8byte	.LVL227
+	.2byte	0xa
+	.byte	0x73
+	.sleb128 0
+	.byte	0x34
+	.byte	0x24
+	.byte	0x72
+	.sleb128 0
+	.byte	0x38
+	.byte	0x24
+	.byte	0x22
+	.byte	0x9f
+	.8byte	.LVL227
+	.8byte	.LVL228
+	.2byte	0xd
+	.byte	0x73
+	.sleb128 0
+	.byte	0x34
+	.byte	0x24
+	.byte	0x72
+	.sleb128 0
+	.byte	0x38
+	.byte	0x24
+	.byte	0x22
+	.byte	0x71
+	.sleb128 0
+	.byte	0x22
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+	.8byte	.LVL210
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+	.8byte	.LVL210
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+	.8byte	.LVL223
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+	.8byte	.LVL214
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+	.8byte	.LVL252
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+	.8byte	.LVL253
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+	.8byte	.LVL255
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+	.8byte	.LVL256
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+	.8byte	.LVL265
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+	.8byte	.LVL265
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+	.8byte	.LVL270
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+	.8byte	.LVL270
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+	.8byte	.LVL275
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+	.8byte	.LVL275
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+	.8byte	.LVL270
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+	.8byte	.LVL270
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+	.8byte	.LVL270
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+	.8byte	.LVL236
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+	.8byte	.LVL154
+	.8byte	.LVL155-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST47:
+	.8byte	.LVL156
+	.8byte	.LVL157
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL157
+	.8byte	.LVL168
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL170
+	.8byte	.LFE227
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST48:
+	.8byte	.LVL156
+	.8byte	.LVL159
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST49:
+	.8byte	.LVL156
+	.8byte	.LVL157
+	.2byte	0xb
+	.byte	0x70
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x9f
+	.8byte	.LVL157
+	.8byte	.LVL158
+	.2byte	0xb
+	.byte	0x83
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x9f
+	.8byte	.LVL158
+	.8byte	.LVL159-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL159-1
+	.8byte	.LVL159
+	.2byte	0xb
+	.byte	0x83
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST50:
+	.8byte	.LVL161
+	.8byte	.LVL165
+	.2byte	0x6
+	.byte	0xf2
+	.4byte	.Ldebug_info0+7169
+	.sleb128 0
+	.8byte	.LVL170
+	.8byte	.LVL179
+	.2byte	0x6
+	.byte	0xf2
+	.4byte	.Ldebug_info0+7169
+	.sleb128 0
+	.8byte	0
+	.8byte	0
+.LLST51:
+	.8byte	.LVL161
+	.8byte	.LVL164
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL164
+	.8byte	.LVL165
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL170
+	.8byte	.LVL171
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 4
+	.byte	0x9f
+	.8byte	.LVL171
+	.8byte	.LVL178
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL178
+	.8byte	.LVL179
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST52:
+	.8byte	.LVL173
+	.8byte	.LVL174
+	.2byte	0x8
+	.byte	0x78
+	.sleb128 0
+	.byte	0x71
+	.sleb128 0
+	.byte	0x26
+	.byte	0x33
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	.LVL174
+	.8byte	.LVL176
+	.2byte	0xa
+	.byte	0x78
+	.sleb128 0
+	.byte	0x72
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x26
+	.byte	0x33
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST53:
+	.8byte	.LVL173
+	.8byte	.LVL174
+	.2byte	0x8
+	.byte	0x77
+	.sleb128 0
+	.byte	0x71
+	.sleb128 0
+	.byte	0x26
+	.byte	0x33
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	.LVL174
+	.8byte	.LVL176
+	.2byte	0xa
+	.byte	0x77
+	.sleb128 0
+	.byte	0x72
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x26
+	.byte	0x33
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST54:
+	.8byte	.LVL173
+	.8byte	.LVL174
+	.2byte	0x10
+	.byte	0x78
+	.sleb128 0
+	.byte	0x71
+	.sleb128 0
+	.byte	0x26
+	.byte	0x33
+	.byte	0x1a
+	.byte	0x77
+	.sleb128 0
+	.byte	0x71
+	.sleb128 0
+	.byte	0x26
+	.byte	0x4e
+	.byte	0x24
+	.byte	0x21
+	.byte	0x9f
+	.8byte	.LVL174
+	.8byte	.LVL176
+	.2byte	0x14
+	.byte	0x78
+	.sleb128 0
+	.byte	0x72
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x26
+	.byte	0x33
+	.byte	0x1a
+	.byte	0x77
+	.sleb128 0
+	.byte	0x72
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x26
+	.byte	0x4e
+	.byte	0x24
+	.byte	0x21
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST55:
+	.8byte	.LVL171
+	.8byte	.LVL178
+	.2byte	0x1
+	.byte	0x58
+	.8byte	0
+	.8byte	0
+.LLST56:
+	.8byte	.LVL172
+	.8byte	.LVL178
+	.2byte	0x1
+	.byte	0x57
+	.8byte	0
+	.8byte	0
+.LLST57:
+	.8byte	.LVL161
+	.8byte	.LVL164
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL164
+	.8byte	.LVL165
+	.2byte	0x5
+	.byte	0x73
+	.sleb128 0
+	.byte	0x34
+	.byte	0x24
+	.byte	0x9f
+	.8byte	.LVL170
+	.8byte	.LVL172
+	.2byte	0x5
+	.byte	0x73
+	.sleb128 0
+	.byte	0x34
+	.byte	0x24
+	.byte	0x9f
+	.8byte	.LVL172
+	.8byte	.LVL175
+	.2byte	0x8
+	.byte	0x73
+	.sleb128 0
+	.byte	0x34
+	.byte	0x24
+	.byte	0x72
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.8byte	.LVL175
+	.8byte	.LVL176
+	.2byte	0xa
+	.byte	0x73
+	.sleb128 0
+	.byte	0x34
+	.byte	0x24
+	.byte	0x72
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x9f
+	.8byte	.LVL178
+	.8byte	.LVL179
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST58:
+	.8byte	.LVL164
+	.8byte	.LVL165
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL170
+	.8byte	.LVL178
+	.2byte	0x1
+	.byte	0x53
+	.8byte	0
+	.8byte	0
+.LLST59:
+	.8byte	.LVL172
+	.8byte	.LVL175
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL175
+	.8byte	.LVL176
+	.2byte	0x3
+	.byte	0x72
+	.sleb128 1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST60:
+	.8byte	.LVL161
+	.8byte	.LVL165
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL170
+	.8byte	.LVL179
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST61:
+	.8byte	.LVL161
+	.8byte	.LVL163
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST62:
+	.8byte	.LVL161
+	.8byte	.LVL162
+	.2byte	0xb
+	.byte	0x83
+	.sleb128 0
+	.byte	0x36
+	.byte	0x24
+	.byte	0xc
+	.4byte	0xffffffff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	.LVL162
+	.8byte	.LVL163-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL163-1
+	.8byte	.LVL163
+	.2byte	0xb
+	.byte	0x83
+	.sleb128 0
+	.byte	0x36
+	.byte	0x24
+	.byte	0xc
+	.4byte	0xffffffff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST63:
+	.8byte	.LVL166
+	.8byte	.LVL167
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST29:
+	.8byte	.LVL114
+	.8byte	.LVL115
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL115
+	.8byte	.LVL122
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL122
+	.8byte	.LVL125
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL125
+	.8byte	.LVL134
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL134
+	.8byte	.LVL135
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL135
+	.8byte	.LVL139-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL139-1
+	.8byte	.LVL139
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL139
+	.8byte	.LFE219
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST30:
+	.8byte	.LVL114
+	.8byte	.LVL123
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL123
+	.8byte	.LVL125
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL125
+	.8byte	.LVL139-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL139-1
+	.8byte	.LVL139
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL139
+	.8byte	.LVL140
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL140
+	.8byte	.LFE219
+	.2byte	0x1
+	.byte	0x58
+	.8byte	0
+	.8byte	0
+.LLST31:
+	.8byte	.LVL116
+	.8byte	.LVL124-1
+	.2byte	0x1
+	.byte	0x56
+	.8byte	.LVL125
+	.8byte	.LVL139-1
+	.2byte	0x1
+	.byte	0x56
+	.8byte	.LVL139
+	.8byte	.LFE219
+	.2byte	0x1
+	.byte	0x56
+	.8byte	0
+	.8byte	0
+.LLST32:
+	.8byte	.LVL118
+	.8byte	.LVL122
+	.2byte	0x1
+	.byte	0x5a
+	.8byte	.LVL125
+	.8byte	.LVL128
+	.2byte	0x1
+	.byte	0x5a
+	.8byte	.LVL128
+	.8byte	.LVL138
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL138
+	.8byte	.LVL139-1
+	.2byte	0x54
+	.byte	0x72
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x76
+	.sleb128 32
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x38
+	.byte	0x24
+	.byte	0x72
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x76
+	.sleb128 32
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x2
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x40
+	.byte	0x24
+	.byte	0x21
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x21
+	.byte	0x71
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	.LVL139
+	.8byte	.LVL140
+	.2byte	0x54
+	.byte	0x72
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x76
+	.sleb128 32
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x38
+	.byte	0x24
+	.byte	0x72
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x76
+	.sleb128 32
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x2
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x40
+	.byte	0x24
+	.byte	0x21
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x21
+	.byte	0x71
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	.LVL140
+	.8byte	.LFE219
+	.2byte	0x54
+	.byte	0x72
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x76
+	.sleb128 32
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x38
+	.byte	0x24
+	.byte	0x72
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x76
+	.sleb128 32
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x2
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x40
+	.byte	0x24
+	.byte	0x21
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x21
+	.byte	0x78
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST33:
+	.8byte	.LVL120
+	.8byte	.LVL122
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL125
+	.8byte	.LVL130
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL130
+	.8byte	.LVL139-1
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL139
+	.8byte	.LFE219
+	.2byte	0x1
+	.byte	0x55
+	.8byte	0
+	.8byte	0
+.LLST34:
+	.8byte	.LVL121
+	.8byte	.LVL122
+	.2byte	0x1
+	.byte	0x57
+	.8byte	.LVL125
+	.8byte	.LVL131
+	.2byte	0x1
+	.byte	0x57
+	.8byte	.LVL131
+	.8byte	.LVL136
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL136
+	.8byte	.LVL139-1
+	.2byte	0x56
+	.byte	0x72
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x76
+	.sleb128 32
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x38
+	.byte	0x24
+	.byte	0x72
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x76
+	.sleb128 32
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x2
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x40
+	.byte	0x24
+	.byte	0x21
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x21
+	.byte	0x71
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x2
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	.LVL139
+	.8byte	.LVL140
+	.2byte	0x56
+	.byte	0x72
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x76
+	.sleb128 32
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x38
+	.byte	0x24
+	.byte	0x72
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x76
+	.sleb128 32
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x2
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x40
+	.byte	0x24
+	.byte	0x21
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x21
+	.byte	0x71
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x2
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	.LVL140
+	.8byte	.LFE219
+	.2byte	0x56
+	.byte	0x72
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x76
+	.sleb128 32
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x38
+	.byte	0x24
+	.byte	0x72
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x76
+	.sleb128 32
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x2
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x40
+	.byte	0x24
+	.byte	0x21
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x21
+	.byte	0x78
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x2
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST35:
+	.8byte	.LVL121
+	.8byte	.LVL122
+	.2byte	0x1d
+	.byte	0x72
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x76
+	.sleb128 32
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x3
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	.LVL125
+	.8byte	.LVL131
+	.2byte	0x1d
+	.byte	0x72
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x76
+	.sleb128 32
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x3
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	.LVL131
+	.8byte	.LVL132
+	.2byte	0x3c
+	.byte	0x72
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x76
+	.sleb128 32
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x38
+	.byte	0x24
+	.byte	0x77
+	.sleb128 0
+	.byte	0x40
+	.byte	0x24
+	.byte	0x21
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x21
+	.byte	0x78
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x3
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	.LVL132
+	.8byte	.LVL133
+	.2byte	0x56
+	.byte	0x72
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x76
+	.sleb128 32
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x38
+	.byte	0x24
+	.byte	0x72
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x76
+	.sleb128 32
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x2
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x40
+	.byte	0x24
+	.byte	0x21
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x21
+	.byte	0x78
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x3
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	.LVL133
+	.8byte	.LVL134
+	.2byte	0x56
+	.byte	0x72
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x76
+	.sleb128 32
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x38
+	.byte	0x24
+	.byte	0x72
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x76
+	.sleb128 32
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x2
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x40
+	.byte	0x24
+	.byte	0x21
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x21
+	.byte	0x71
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x3
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	.LVL134
+	.8byte	.LVL135
+	.2byte	0x58
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x32
+	.byte	0x24
+	.byte	0x76
+	.sleb128 32
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x38
+	.byte	0x24
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x32
+	.byte	0x24
+	.byte	0x76
+	.sleb128 32
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x2
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x40
+	.byte	0x24
+	.byte	0x21
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x21
+	.byte	0x71
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x3
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	.LVL135
+	.8byte	.LVL139-1
+	.2byte	0x56
+	.byte	0x72
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x76
+	.sleb128 32
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x38
+	.byte	0x24
+	.byte	0x72
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x76
+	.sleb128 32
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x2
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x40
+	.byte	0x24
+	.byte	0x21
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x21
+	.byte	0x71
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x3
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	.LVL139
+	.8byte	.LVL140
+	.2byte	0x56
+	.byte	0x72
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x76
+	.sleb128 32
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x38
+	.byte	0x24
+	.byte	0x72
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x76
+	.sleb128 32
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x2
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x40
+	.byte	0x24
+	.byte	0x21
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x21
+	.byte	0x71
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x3
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	.LVL140
+	.8byte	.LFE219
+	.2byte	0x56
+	.byte	0x72
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x76
+	.sleb128 32
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x38
+	.byte	0x24
+	.byte	0x72
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x76
+	.sleb128 32
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x2
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x40
+	.byte	0x24
+	.byte	0x21
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x21
+	.byte	0x78
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x3
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST36:
+	.8byte	.LVL116
+	.8byte	.LVL117
+	.2byte	0xd
+	.byte	0x72
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x76
+	.sleb128 32
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x9f
+	.8byte	.LVL117
+	.8byte	.LVL119
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL119
+	.8byte	.LVL122
+	.2byte	0xd
+	.byte	0x72
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x76
+	.sleb128 32
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x9f
+	.8byte	.LVL125
+	.8byte	.LVL126
+	.2byte	0xd
+	.byte	0x72
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x76
+	.sleb128 32
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x9f
+	.8byte	.LVL126
+	.8byte	.LVL127
+	.2byte	0x8
+	.byte	0x78
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x73
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.8byte	.LVL127
+	.8byte	.LVL129
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL129
+	.8byte	.LVL131
+	.2byte	0x12
+	.byte	0x74
+	.sleb128 0
+	.byte	0x38
+	.byte	0x24
+	.byte	0x77
+	.sleb128 0
+	.byte	0x40
+	.byte	0x24
+	.byte	0x21
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x21
+	.byte	0x78
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x22
+	.byte	0x9f
+	.8byte	.LVL131
+	.8byte	.LVL132
+	.2byte	0x2c
+	.byte	0x72
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x76
+	.sleb128 32
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x38
+	.byte	0x24
+	.byte	0x77
+	.sleb128 0
+	.byte	0x40
+	.byte	0x24
+	.byte	0x21
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x21
+	.byte	0x78
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x22
+	.byte	0x9f
+	.8byte	.LVL132
+	.8byte	.LVL133
+	.2byte	0x46
+	.byte	0x72
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x76
+	.sleb128 32
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x38
+	.byte	0x24
+	.byte	0x72
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x76
+	.sleb128 32
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x2
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x40
+	.byte	0x24
+	.byte	0x21
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x21
+	.byte	0x78
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x22
+	.byte	0x9f
+	.8byte	.LVL133
+	.8byte	.LVL134
+	.2byte	0x46
+	.byte	0x72
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x76
+	.sleb128 32
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x38
+	.byte	0x24
+	.byte	0x72
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x76
+	.sleb128 32
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x2
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x40
+	.byte	0x24
+	.byte	0x21
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x21
+	.byte	0x71
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x22
+	.byte	0x9f
+	.8byte	.LVL134
+	.8byte	.LVL135
+	.2byte	0x48
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x32
+	.byte	0x24
+	.byte	0x76
+	.sleb128 32
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x38
+	.byte	0x24
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x32
+	.byte	0x24
+	.byte	0x76
+	.sleb128 32
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x2
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x40
+	.byte	0x24
+	.byte	0x21
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x21
+	.byte	0x71
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x22
+	.byte	0x9f
+	.8byte	.LVL135
+	.8byte	.LVL137
+	.2byte	0x46
+	.byte	0x72
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x76
+	.sleb128 32
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x38
+	.byte	0x24
+	.byte	0x72
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x76
+	.sleb128 32
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x2
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x40
+	.byte	0x24
+	.byte	0x21
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x21
+	.byte	0x71
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x22
+	.byte	0x9f
+	.8byte	.LVL137
+	.8byte	.LVL139-1
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL139
+	.8byte	.LFE219
+	.2byte	0x1
+	.byte	0x54
+	.8byte	0
+	.8byte	0
+.LLST0:
+	.8byte	.LVL0
+	.8byte	.LVL1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1
+	.8byte	.LVL7
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL7
+	.8byte	.LVL8
+	.2byte	0x3
+	.byte	0x84
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL8
+	.8byte	.LVL13
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL13
+	.8byte	.LVL14
+	.2byte	0x3
+	.byte	0x84
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL14
+	.8byte	.LVL16
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL16
+	.8byte	.LVL21
+	.2byte	0x3
+	.byte	0x84
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL21
+	.8byte	.LVL23
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL23
+	.8byte	.LVL24
+	.2byte	0x3
+	.byte	0x84
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL24
+	.8byte	.LFE217
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST1:
+	.8byte	.LVL2
+	.8byte	.LVL3
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL3
+	.8byte	.LVL4
+	.2byte	0x9
+	.byte	0x3
+	.8byte	global_waveform
+	.8byte	.LVL4
+	.8byte	.LVL5
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL5
+	.8byte	.LVL6
+	.2byte	0x9
+	.byte	0x3
+	.8byte	global_waveform
+	.8byte	.LVL8
+	.8byte	.LVL9
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL9
+	.8byte	.LVL10
+	.2byte	0x9
+	.byte	0x3
+	.8byte	global_waveform
+	.8byte	.LVL10
+	.8byte	.LVL11
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL11
+	.8byte	.LVL12-1
+	.2byte	0x9
+	.byte	0x3
+	.8byte	global_waveform
+	.8byte	0
+	.8byte	0
+.LLST2:
+	.8byte	.LVL14
+	.8byte	.LVL15
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL16
+	.8byte	.LVL17
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL17
+	.8byte	.LVL18
+	.2byte	0x2
+	.byte	0x35
+	.byte	0x9f
+	.8byte	.LVL18
+	.8byte	.LVL19
+	.2byte	0x2
+	.byte	0x36
+	.byte	0x9f
+	.8byte	.LVL19
+	.8byte	.LVL20
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL20
+	.8byte	.LVL21
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST18:
+	.8byte	.LVL52
+	.8byte	.LVL55
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL55
+	.8byte	.LVL78
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL78
+	.8byte	.LVL79
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL79
+	.8byte	.LVL112
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL112
+	.8byte	.LVL113
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL113
+	.8byte	.LFE214
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST19:
+	.8byte	.LVL52
+	.8byte	.LVL53
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL53
+	.8byte	.LVL112
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL112
+	.8byte	.LFE214
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST20:
+	.8byte	.LVL52
+	.8byte	.LVL54
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL54
+	.8byte	.LVL112
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	.LVL112
+	.8byte	.LFE214
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST21:
+	.8byte	.LVL52
+	.8byte	.LVL56-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL56-1
+	.8byte	.LVL77
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL77
+	.8byte	.LVL79
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL79
+	.8byte	.LVL112
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL112
+	.8byte	.LFE214
+	.2byte	0x1
+	.byte	0x53
+	.8byte	0
+	.8byte	0
+.LLST22:
+	.8byte	.LVL52
+	.8byte	.LVL57
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL57
+	.8byte	.LVL66
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL66
+	.8byte	.LVL68
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL68
+	.8byte	.LVL74-1
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL79
+	.8byte	.LVL87
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL87
+	.8byte	.LVL89
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL89
+	.8byte	.LVL101
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL101
+	.8byte	.LVL103
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL104
+	.8byte	.LVL105
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL105
+	.8byte	.LVL107
+	.2byte	0x5
+	.byte	0x73
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x9f
+	.8byte	.LVL112
+	.8byte	.LFE214
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST23:
+	.8byte	.LVL52
+	.8byte	.LVL57
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL61
+	.8byte	.LVL62
+	.2byte	0x1
+	.byte	0x5c
+	.8byte	.LVL62
+	.8byte	.LVL64
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL64
+	.8byte	.LVL68
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL71
+	.8byte	.LVL72
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL79
+	.8byte	.LVL80
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL81
+	.8byte	.LVL82
+	.2byte	0x1
+	.byte	0x57
+	.8byte	.LVL82
+	.8byte	.LVL83
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 3
+	.byte	0x9f
+	.8byte	.LVL83
+	.8byte	.LVL84
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL85
+	.8byte	.LVL89
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL92
+	.8byte	.LVL93
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL95
+	.8byte	.LVL96
+	.2byte	0x1
+	.byte	0x5c
+	.8byte	.LVL96
+	.8byte	.LVL99
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL99
+	.8byte	.LVL103
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL104
+	.8byte	.LVL108
+	.2byte	0x5
+	.byte	0x72
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x9f
+	.8byte	.LVL108
+	.8byte	.LVL109
+	.2byte	0x5
+	.byte	0x72
+	.sleb128 1
+	.byte	0x31
+	.byte	0x24
+	.byte	0x9f
+	.8byte	.LVL112
+	.8byte	.LFE214
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST24:
+	.8byte	.LVL52
+	.8byte	.LVL57
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL57
+	.8byte	.LVL77
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL77
+	.8byte	.LVL79
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL79
+	.8byte	.LVL112
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL112
+	.8byte	.LFE214
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST25:
+	.8byte	.LVL52
+	.8byte	.LVL57
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL57
+	.8byte	.LVL63
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL63
+	.8byte	.LVL69
+	.2byte	0x1
+	.byte	0x5b
+	.8byte	.LVL69
+	.8byte	.LVL70
+	.2byte	0x3
+	.byte	0x70
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL70
+	.8byte	.LVL73
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL79
+	.8byte	.LVL80
+	.2byte	0x1
+	.byte	0x5b
+	.8byte	.LVL80
+	.8byte	.LVL93
+	.2byte	0x3
+	.byte	0x70
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL93
+	.8byte	.LVL94
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL94
+	.8byte	.LVL98
+	.2byte	0x3
+	.byte	0x7b
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL98
+	.8byte	.LVL99
+	.2byte	0x1
+	.byte	0x5b
+	.8byte	.LVL99
+	.8byte	.LVL103
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL112
+	.8byte	.LFE214
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST26:
+	.8byte	.LVL60
+	.8byte	.LVL71
+	.2byte	0x1
+	.byte	0x60
+	.8byte	.LVL79
+	.8byte	.LVL93
+	.2byte	0x1
+	.byte	0x60
+	.8byte	.LVL94
+	.8byte	.LVL97
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL106
+	.8byte	.LVL112
+	.2byte	0x1
+	.byte	0x57
+	.8byte	0
+	.8byte	0
+.LLST27:
+	.8byte	.LVL69
+	.8byte	.LVL71
+	.2byte	0x1
+	.byte	0x56
+	.8byte	.LVL75
+	.8byte	.LVL76
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL80
+	.8byte	.LVL90
+	.2byte	0x1
+	.byte	0x56
+	.8byte	.LVL91
+	.8byte	.LVL93
+	.2byte	0x1
+	.byte	0x56
+	.8byte	.LVL103
+	.8byte	.LVL110
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL111
+	.8byte	.LVL112
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST28:
+	.8byte	.LVL52
+	.8byte	.LVL57
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL57
+	.8byte	.LVL74-1
+	.2byte	0x1
+	.byte	0x5a
+	.8byte	.LVL79
+	.8byte	.LVL103
+	.2byte	0x1
+	.byte	0x5a
+	.8byte	.LVL112
+	.8byte	.LFE214
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST4:
+	.8byte	.LVL25
+	.8byte	.LVL26
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL26
+	.8byte	.LVL37
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL37
+	.8byte	.LVL38-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL38-1
+	.8byte	.LFE238
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST5:
+	.8byte	.LVL25
+	.8byte	.LVL27
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL27
+	.8byte	.LVL36
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL36
+	.8byte	.LFE238
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST6:
+	.8byte	.LVL29
+	.8byte	.LVL30
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST7:
+	.8byte	.LVL28
+	.8byte	.LVL29
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL29
+	.8byte	.LVL34
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL34
+	.8byte	.LVL35
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST8:
+	.8byte	.LVL30
+	.8byte	.LVL31
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL32
+	.8byte	.LVL33
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL34
+	.8byte	.LVL38-1
+	.2byte	0x1
+	.byte	0x55
+	.8byte	0
+	.8byte	0
+.LLST9:
+	.8byte	.LVL30
+	.8byte	.LVL32
+	.2byte	0x6
+	.byte	0xfa
+	.4byte	0x1e3f
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST10:
+	.8byte	.LVL30
+	.8byte	.LVL32
+	.2byte	0x6
+	.byte	0xfa
+	.4byte	0x1e4b
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST11:
+	.8byte	.LVL39
+	.8byte	.LVL40
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL40
+	.8byte	.LVL50
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL50
+	.8byte	.LVL51-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL51-1
+	.8byte	.LFE239
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST12:
+	.8byte	.LVL39
+	.8byte	.LVL41
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL41
+	.8byte	.LVL50
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL50
+	.8byte	.LFE239
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST13:
+	.8byte	.LVL46
+	.8byte	.LVL48
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST14:
+	.8byte	.LVL44
+	.8byte	.LVL45
+	.2byte	0x1
+	.byte	0x54
+	.8byte	0
+	.8byte	0
+.LLST15:
+	.8byte	.LVL42
+	.8byte	.LVL43
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL43
+	.8byte	.LVL49
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST16:
+	.8byte	.LVL44
+	.8byte	.LVL48
+	.2byte	0x6
+	.byte	0xfa
+	.4byte	0x1eab
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST17:
+	.8byte	.LVL44
+	.8byte	.LVL48
+	.2byte	0x6
+	.byte	0xfa
+	.4byte	0x1eb7
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+	.section	.debug_aranges,"",@progbits
+	.4byte	0xbc
+	.2byte	0x2
+	.4byte	.Ldebug_info0
+	.byte	0x8
+	.byte	0
+	.2byte	0
+	.2byte	0
+	.8byte	.LFB217
+	.8byte	.LFE217-.LFB217
+	.8byte	.LFB238
+	.8byte	.LFE238-.LFB238
+	.8byte	.LFB239
+	.8byte	.LFE239-.LFB239
+	.8byte	.LFB214
+	.8byte	.LFE214-.LFB214
+	.8byte	.LFB219
+	.8byte	.LFE219-.LFB219
+	.8byte	.LFB229
+	.8byte	.LFE229-.LFB229
+	.8byte	.LFB227
+	.8byte	.LFE227-.LFB227
+	.8byte	.LFB232
+	.8byte	.LFE232-.LFB232
+	.8byte	.LFB233
+	.8byte	.LFE233-.LFB233
+	.8byte	.LFB234
+	.8byte	.LFE234-.LFB234
+	.8byte	0
+	.8byte	0
+	.section	.debug_ranges,"",@progbits
+.Ldebug_ranges0:
+	.8byte	.LBB45
+	.8byte	.LBE45
+	.8byte	.LBB48
+	.8byte	.LBE48
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB51
+	.8byte	.LBE51
+	.8byte	.LBB56
+	.8byte	.LBE56
+	.8byte	.LBB57
+	.8byte	.LBE57
+	.8byte	.LBB58
+	.8byte	.LBE58
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB52
+	.8byte	.LBE52
+	.8byte	.LBB55
+	.8byte	.LBE55
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB71
+	.8byte	.LBE71
+	.8byte	.LBB78
+	.8byte	.LBE78
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB116
+	.8byte	.LBE116
+	.8byte	.LBB120
+	.8byte	.LBE120
+	.8byte	.LBB123
+	.8byte	.LBE123
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB124
+	.8byte	.LBE124
+	.8byte	.LBB165
+	.8byte	.LBE165
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB126
+	.8byte	.LBE126
+	.8byte	.LBB129
+	.8byte	.LBE129
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB130
+	.8byte	.LBE130
+	.8byte	.LBB145
+	.8byte	.LBE145
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB132
+	.8byte	.LBE132
+	.8byte	.LBB135
+	.8byte	.LBE135
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB137
+	.8byte	.LBE137
+	.8byte	.LBB146
+	.8byte	.LBE146
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB148
+	.8byte	.LBE148
+	.8byte	.LBB177
+	.8byte	.LBE177
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB150
+	.8byte	.LBE150
+	.8byte	.LBB162
+	.8byte	.LBE162
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB155
+	.8byte	.LBE155
+	.8byte	.LBB158
+	.8byte	.LBE158
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB159
+	.8byte	.LBE159
+	.8byte	.LBB163
+	.8byte	.LBE163
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB166
+	.8byte	.LBE166
+	.8byte	.LBB171
+	.8byte	.LBE171
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB172
+	.8byte	.LBE172
+	.8byte	.LBB178
+	.8byte	.LBE178
+	.8byte	0
+	.8byte	0
+	.8byte	.LFB217
+	.8byte	.LFE217
+	.8byte	.LFB238
+	.8byte	.LFE238
+	.8byte	.LFB239
+	.8byte	.LFE239
+	.8byte	.LFB214
+	.8byte	.LFE214
+	.8byte	.LFB219
+	.8byte	.LFE219
+	.8byte	.LFB229
+	.8byte	.LFE229
+	.8byte	.LFB227
+	.8byte	.LFE227
+	.8byte	.LFB232
+	.8byte	.LFE232
+	.8byte	.LFB233
+	.8byte	.LFE233
+	.8byte	.LFB234
+	.8byte	.LFE234
+	.8byte	0
+	.8byte	0
+	.section	.debug_line,"",@progbits
+.Ldebug_line0:
+	.section	.debug_str,"MS",@progbits,1
+.LASF396:
+	.string	"level"
+.LASF375:
+	.string	"white"
+.LASF82:
+	.string	"off_mem_rsvmap"
+.LASF165:
+	.string	"UCLASS_I2C_EEPROM"
+.LASF17:
+	.string	"size_t"
+.LASF170:
+	.string	"UCLASS_IRQ"
+.LASF132:
+	.string	"initrd_start"
+.LASF164:
+	.string	"UCLASS_I2C"
+.LASF13:
+	.string	"sizetype"
+.LASF261:
+	.string	"net_hostname"
+.LASF256:
+	.string	"push_packet"
+.LASF36:
+	.string	"start"
+.LASF204:
+	.string	"UCLASS_SPI"
+.LASF168:
+	.string	"UCLASS_I2S"
+.LASF283:
+	.string	"NETLOOP_RESTART"
+.LASF364:
+	.string	"parse_wf_gray16_with_lut_type"
+.LASF351:
+	.string	"pvi_wf_get_lut"
+.LASF166:
+	.string	"UCLASS_I2C_GENERIC"
+.LASF380:
+	.string	"total"
+.LASF178:
+	.string	"UCLASS_MOD_EXP"
+.LASF227:
+	.string	"UCLASS_IO_DOMAIN"
+.LASF326:
+	.string	"fpl_lot"
+.LASF300:
+	.string	"WF_TYPE_GL16"
+.LASF349:
+	.string	"pvi_wf_input"
+.LASF311:
+	.string	"PVI_WF_GL16"
+.LASF199:
+	.string	"UCLASS_RKNAND"
+.LASF141:
+	.string	"UCLASS_DEMO"
+.LASF90:
+	.string	"ih_magic"
+.LASF145:
+	.string	"UCLASS_TEST_PROBE"
+.LASF223:
+	.string	"UCLASS_KEY"
+.LASF62:
+	.string	"bi_intfreq"
+.LASF393:
+	.string	"__func__"
+.LASF11:
+	.string	"phys_addr_t"
+.LASF419:
+	.string	"drivers/video/rk_eink/epdlut/pvi_waveform.c"
+.LASF5:
+	.string	"__u8"
+.LASF282:
+	.string	"NETLOOP_CONTINUE"
+.LASF207:
+	.string	"UCLASS_SPI_GENERIC"
+.LASF38:
+	.string	"flash_info_t"
+.LASF183:
+	.string	"UCLASS_PANEL"
+.LASF107:
+	.string	"comp"
+.LASF102:
+	.string	"image_header_t"
+.LASF137:
+	.string	"state"
+.LASF158:
+	.string	"UCLASS_CROS_EC"
+.LASF56:
+	.string	"bi_dsp_freq"
+.LASF371:
+	.string	"get_lut_reset_data"
+.LASF104:
+	.string	"image_start"
+.LASF143:
+	.string	"UCLASS_TEST_FDT"
+.LASF47:
+	.string	"bd_info"
+.LASF365:
+	.string	"parse_wf_gray2"
+.LASF280:
+	.string	"uclass_id"
+.LASF306:
+	.string	"pvi_wf_mode"
+.LASF94:
+	.string	"ih_load"
+.LASF238:
+	.string	"__dtb_dt_spl_begin"
+.LASF322:
+	.string	"file_length"
+.LASF330:
+	.string	"wf_type"
+.LASF7:
+	.string	"__u32"
+.LASF148:
+	.string	"UCLASS_PCI_EMUL"
+.LASF394:
+	.string	"get_wf_temp_index"
+.LASF317:
+	.string	"epd_lut_data"
+.LASF267:
+	.string	"net_tx_packet"
+.LASF222:
+	.string	"UCLASS_FG"
+.LASF266:
+	.string	"net_server_ip"
+.LASF363:
+	.string	"parse_wf_gray16"
+.LASF313:
+	.string	"PVI_WF_GLD16"
+.LASF274:
+	.string	"net_native_vlan"
+.LASF220:
+	.string	"UCLASS_VIDEO_CRTC"
+.LASF398:
+	.string	"pvi_modes"
+.LASF293:
+	.string	"WF_TYPE_RESET"
+.LASF157:
+	.string	"UCLASS_CODEC"
+.LASF418:
+	.ascii	"GNU C11 6.3.1 20170404 -ms"
+	.string	"trict-align -march=armv8-a+nosimd -mlittle-endian -mabi=lp64 -g -Os -fno-builtin -ffreestanding -fshort-wchar -fno-stack-protector -fno-delete-null-pointer-checks -fstack-usage -fno-pic -ffunction-sections -fdata-sections -ffixed-r9 -fno-common -ffixed-x18"
+.LASF23:
+	.string	"errno"
+.LASF15:
+	.string	"long int"
+.LASF51:
+	.string	"bi_flashsize"
+.LASF188:
+	.string	"UCLASS_PHY"
+.LASF75:
+	.string	"IRQ_STACK_START_IN"
+.LASF86:
+	.string	"size_dt_strings"
+.LASF217:
+	.string	"UCLASS_VIDEO"
+.LASF404:
+	.string	"oldpic"
+.LASF277:
+	.string	"net_boot_file_size"
+.LASF383:
+	.string	"decode_wf_reset"
+.LASF96:
+	.string	"ih_dcrc"
+.LASF61:
+	.string	"bi_ethspeed"
+.LASF140:
+	.string	"UCLASS_ROOT"
+.LASF386:
+	.string	"get_wf_frm_num"
+.LASF29:
+	.string	"ide_bus_offset"
+.LASF264:
+	.string	"net_server_ethaddr"
+.LASF64:
+	.string	"bi_arch_number"
+.LASF3:
+	.string	"signed char"
+.LASF171:
+	.string	"UCLASS_KEYBOARD"
+.LASF20:
+	.string	"uint8_t"
+.LASF341:
+	.string	"waveformdata"
+.LASF98:
+	.string	"ih_arch"
+.LASF79:
+	.string	"totalsize"
+.LASF406:
+	.string	"frame_tmp"
+.LASF91:
+	.string	"ih_hcrc"
+.LASF376:
+	.string	"idata"
+.LASF106:
+	.string	"load"
+.LASF299:
+	.string	"WF_TYPE_GC16"
+.LASF212:
+	.string	"UCLASS_TPM"
+.LASF310:
+	.string	"PVI_WF_GC16"
+.LASF41:
+	.string	"lmb_property"
+.LASF84:
+	.string	"last_comp_version"
+.LASF0:
+	.string	"unsigned char"
+.LASF66:
+	.string	"bi_andr_version"
+.LASF139:
+	.string	"images"
+.LASF254:
+	.string	"priv"
+.LASF226:
+	.string	"UCLASS_DVFS"
+.LASF57:
+	.string	"bi_ddr_freq"
+.LASF172:
+	.string	"UCLASS_LED"
+.LASF93:
+	.string	"ih_size"
+.LASF405:
+	.string	"newpic"
+.LASF230:
+	.string	"UCLASS_MDIO"
+.LASF25:
+	.string	"_Bool"
+.LASF286:
+	.string	"net_state"
+.LASF347:
+	.string	"spi_id_buffer"
+.LASF167:
+	.string	"UCLASS_I2C_MUX"
+.LASF318:
+	.string	"frame_num"
+.LASF14:
+	.string	"char"
+.LASF27:
+	.string	"_binary_u_boot_bin_start"
+.LASF216:
+	.string	"UCLASS_USB_GADGET_GENERIC"
+.LASF284:
+	.string	"NETLOOP_SUCCESS"
+.LASF353:
+	.string	"output"
+.LASF290:
+	.string	"p_current"
+.LASF281:
+	.string	"net_loop_state"
+.LASF309:
+	.string	"PVI_WF_DU4"
+.LASF245:
+	.string	"enetaddr"
+.LASF156:
+	.string	"UCLASS_AMP"
+.LASF194:
+	.string	"UCLASS_PWRSEQ"
+.LASF122:
+	.string	"fit_hdr_fdt"
+.LASF275:
+	.string	"net_restart_wrap"
+.LASF263:
+	.string	"net_ethaddr"
+.LASF412:
+	.string	"flags"
+.LASF373:
+	.string	"gray"
+.LASF402:
+	.string	"decodewaveform"
+.LASF99:
+	.string	"ih_type"
+.LASF80:
+	.string	"off_dt_struct"
+.LASF52:
+	.string	"bi_flashoffset"
+.LASF276:
+	.string	"net_boot_file_name"
+.LASF142:
+	.string	"UCLASS_TEST"
+.LASF92:
+	.string	"ih_time"
+.LASF195:
+	.string	"UCLASS_RAM"
+.LASF161:
+	.string	"UCLASS_ETH"
+.LASF103:
+	.string	"image_info"
+.LASF218:
+	.string	"UCLASS_VIDEO_BRIDGE"
+.LASF384:
+	.string	"temp_data"
+.LASF109:
+	.string	"arch"
+.LASF359:
+	.string	"input"
+.LASF378:
+	.string	"temp"
+.LASF31:
+	.string	"select_hwpart"
+.LASF268:
+	.string	"net_rx_packets"
+.LASF287:
+	.string	"mem_malloc_start"
+.LASF74:
+	.string	"_datarelro_start_ofs"
+.LASF19:
+	.string	"ulong"
+.LASF361:
+	.string	"parse_wf_auto"
+.LASF95:
+	.string	"ih_ep"
+.LASF43:
+	.string	"lmb_region"
+.LASF346:
+	.string	"waveform"
+.LASF413:
+	.string	"printf"
+.LASF117:
+	.string	"fit_uname_os"
+.LASF58:
+	.string	"bi_bootflags"
+.LASF265:
+	.string	"net_ip"
+.LASF259:
+	.string	"net_dns_server"
+.LASF279:
+	.string	"net_ping_ip"
+.LASF45:
+	.string	"memory"
+.LASF370:
+	.string	"get_lut_gray2_data"
+.LASF77:
+	.string	"fdt_header"
+.LASF288:
+	.string	"mem_malloc_end"
+.LASF339:
+	.string	"temperaturenumber"
+.LASF174:
+	.string	"UCLASS_MAILBOX"
+.LASF129:
+	.string	"rd_end"
+.LASF315:
+	.string	"PVI_WF_GCC16"
+.LASF134:
+	.string	"cmdline_start"
+.LASF253:
+	.string	"index"
+.LASF355:
+	.string	"temperture"
+.LASF377:
+	.string	"odata"
+.LASF202:
+	.string	"UCLASS_SCSI"
+.LASF214:
+	.string	"UCLASS_USB_DEV_GENERIC"
+.LASF175:
+	.string	"UCLASS_MASS_STORAGE"
+.LASF411:
+	.string	"kzalloc"
+.LASF1:
+	.string	"long unsigned int"
+.LASF150:
+	.string	"UCLASS_SIMPLE_BUS"
+.LASF260:
+	.string	"net_nis_domain"
+.LASF295:
+	.string	"WF_TYPE_GRAY4"
+.LASF124:
+	.string	"fit_noffset_fdt"
+.LASF285:
+	.string	"NETLOOP_FAIL"
+.LASF221:
+	.string	"UCLASS_WDT"
+.LASF403:
+	.string	"maxpic"
+.LASF53:
+	.string	"bi_sramstart"
+.LASF28:
+	.string	"_binary_u_boot_bin_end"
+.LASF85:
+	.string	"boot_cpuid_phys"
+.LASF120:
+	.string	"fit_uname_rd"
+.LASF360:
+	.string	"mode_index"
+.LASF208:
+	.string	"UCLASS_SYSCON"
+.LASF115:
+	.string	"fit_uname_cfg"
+.LASF203:
+	.string	"UCLASS_SERIAL"
+.LASF273:
+	.string	"net_our_vlan"
+.LASF323:
+	.string	"serial"
+.LASF153:
+	.string	"UCLASS_BLK"
+.LASF110:
+	.string	"image_info_t"
+.LASF149:
+	.string	"UCLASS_USB_EMUL"
+.LASF316:
+	.string	"PVI_WF_MAX"
+.LASF335:
+	.string	"vcom_offset"
+.LASF187:
+	.string	"UCLASS_PCI_GENERIC"
+.LASF345:
+	.string	"global_waveform"
+.LASF336:
+	.string	"xwia"
+.LASF105:
+	.string	"image_len"
+.LASF59:
+	.string	"bi_ip_addr"
+.LASF189:
+	.string	"UCLASS_PINCONFIG"
+.LASF248:
+	.string	"send"
+.LASF210:
+	.string	"UCLASS_THERMAL"
+.LASF113:
+	.string	"legacy_hdr_os_copy"
+.LASF9:
+	.string	"long long int"
+.LASF301:
+	.string	"WF_TYPE_GLR16"
+.LASF24:
+	.string	"___strtok"
+.LASF278:
+	.string	"net_boot_file_expected_size_in_blocks"
+.LASF16:
+	.string	"__kernel_size_t"
+.LASF182:
+	.string	"UCLASS_NVME"
+.LASF111:
+	.string	"bootm_headers"
+.LASF37:
+	.string	"protect"
+.LASF213:
+	.string	"UCLASS_USB"
+.LASF224:
+	.string	"UCLASS_RC"
+.LASF159:
+	.string	"UCLASS_DISPLAY"
+.LASF272:
+	.string	"net_null_ethaddr"
+.LASF338:
+	.string	"modenumber"
+.LASF71:
+	.string	"_datarel_start_ofs"
+.LASF225:
+	.string	"UCLASS_CHARGE_DISPLAY"
+.LASF239:
+	.string	"load_addr"
+.LASF116:
+	.string	"fit_hdr_os"
+.LASF72:
+	.string	"_datarelrolocal_start_ofs"
+.LASF324:
+	.string	"run_type"
+.LASF8:
+	.string	"unsigned int"
+.LASF18:
+	.string	"ushort"
+.LASF331:
+	.string	"panel_size"
+.LASF244:
+	.string	"eth_device"
+.LASF385:
+	.string	"temp1"
+.LASF333:
+	.string	"wfm_rev"
+.LASF304:
+	.string	"WF_TYPE_GRAY32"
+.LASF401:
+	.string	"frame"
+.LASF191:
+	.string	"UCLASS_PMIC"
+.LASF358:
+	.string	"temp_index"
+.LASF112:
+	.string	"legacy_hdr_os"
+.LASF81:
+	.string	"off_dt_strings"
+.LASF236:
+	.string	"monitor_flash_len"
+.LASF176:
+	.string	"UCLASS_MISC"
+.LASF49:
+	.string	"bi_memsize"
+.LASF307:
+	.string	"PVI_WF_RESET"
+.LASF337:
+	.string	"unknown1"
+.LASF340:
+	.string	"unknown2"
+.LASF26:
+	.string	"image_base"
+.LASF209:
+	.string	"UCLASS_SYSRESET"
+.LASF297:
+	.string	"WF_TYPE_AUTO"
+.LASF291:
+	.string	"current"
+.LASF163:
+	.string	"UCLASS_FIRMWARE"
+.LASF173:
+	.string	"UCLASS_LPC"
+.LASF388:
+	.string	"temp2"
+.LASF389:
+	.string	"temp3"
+.LASF390:
+	.string	"temp4"
+.LASF169:
+	.string	"UCLASS_IDE"
+.LASF408:
+	.string	"israr"
+.LASF410:
+	.string	"block"
+.LASF138:
+	.string	"bootm_headers_t"
+.LASF55:
+	.string	"bi_arm_freq"
+.LASF197:
+	.string	"UCLASS_REMOTEPROC"
+.LASF249:
+	.string	"recv"
+.LASF108:
+	.string	"type"
+.LASF119:
+	.string	"fit_hdr_rd"
+.LASF314:
+	.string	"PVI_WF_A2"
+.LASF54:
+	.string	"bi_sramsize"
+.LASF162:
+	.string	"UCLASS_GPIO"
+.LASF192:
+	.string	"UCLASS_PWM"
+.LASF40:
+	.string	"long double"
+.LASF407:
+	.string	"tempdata"
+.LASF128:
+	.string	"rd_start"
+.LASF193:
+	.string	"UCLASS_POWER_DOMAIN"
+.LASF196:
+	.string	"UCLASS_REGULATOR"
+.LASF334:
+	.string	"frame_rate"
+.LASF241:
+	.string	"save_size"
+.LASF154:
+	.string	"UCLASS_CLK"
+.LASF321:
+	.string	"checksum"
+.LASF348:
+	.string	"pvi_wf_get_version"
+.LASF246:
+	.string	"iobase"
+.LASF101:
+	.string	"ih_name"
+.LASF97:
+	.string	"ih_os"
+.LASF302:
+	.string	"WF_TYPE_GLD16"
+.LASF135:
+	.string	"cmdline_end"
+.LASF269:
+	.string	"net_rx_packet"
+.LASF235:
+	.string	"LOGF_MAX_CATEGORIES"
+.LASF33:
+	.string	"size"
+.LASF10:
+	.string	"long long unsigned int"
+.LASF89:
+	.string	"image_header"
+.LASF296:
+	.string	"WF_TYPE_GRAY2"
+.LASF21:
+	.string	"__be32"
+.LASF50:
+	.string	"bi_flashstart"
+.LASF118:
+	.string	"fit_noffset_os"
+.LASF177:
+	.string	"UCLASS_MMC"
+.LASF251:
+	.string	"write_hwaddr"
+.LASF369:
+	.string	"get_lut_gray8_data"
+.LASF234:
+	.string	"UCLASS_INVALID"
+.LASF215:
+	.string	"UCLASS_USB_HUB"
+.LASF328:
+	.string	"wf_version"
+.LASF231:
+	.string	"UCLASS_EBC"
+.LASF305:
+	.string	"WF_TYPE_MAX"
+.LASF416:
+	.string	"memset"
+.LASF39:
+	.string	"flash_info"
+.LASF83:
+	.string	"version"
+.LASF250:
+	.string	"halt"
+.LASF44:
+	.string	"region"
+.LASF87:
+	.string	"size_dt_struct"
+.LASF308:
+	.string	"PVI_WF_DU"
+.LASF179:
+	.string	"UCLASS_MTD"
+.LASF379:
+	.string	"decode_wf_gray2"
+.LASF76:
+	.string	"fdt32_t"
+.LASF354:
+	.string	"lut_type"
+.LASF181:
+	.string	"UCLASS_NORTHBRIDGE"
+.LASF60:
+	.string	"bi_enetaddr"
+.LASF325:
+	.string	"fpl_platform"
+.LASF421:
+	.string	"mtd_info"
+.LASF381:
+	.string	"_data"
+.LASF242:
+	.string	"in_addr"
+.LASF270:
+	.string	"net_rx_packet_len"
+.LASF247:
+	.string	"init"
+.LASF343:
+	.string	"reset_data"
+.LASF356:
+	.string	"stype"
+.LASF332:
+	.string	"amepd_part_number"
+.LASF392:
+	.string	"offset"
+.LASF237:
+	.string	"__dtb_dt_begin"
+.LASF395:
+	.string	"temp_num"
+.LASF374:
+	.string	"black"
+.LASF198:
+	.string	"UCLASS_RESET"
+.LASF121:
+	.string	"fit_noffset_rd"
+.LASF152:
+	.string	"UCLASS_AHCI"
+.LASF12:
+	.string	"phys_size_t"
+.LASF391:
+	.string	"frm_num"
+.LASF155:
+	.string	"UCLASS_CPU"
+.LASF70:
+	.string	"FIQ_STACK_START"
+.LASF136:
+	.string	"verify"
+.LASF30:
+	.string	"name"
+.LASF399:
+	.string	"parse_mode_version"
+.LASF415:
+	.string	"kmalloc"
+.LASF232:
+	.string	"UCLASS_EINK_DISPLAY"
+.LASF184:
+	.string	"UCLASS_PANEL_BACKLIGHT"
+.LASF350:
+	.string	"pvi_wf"
+.LASF211:
+	.string	"UCLASS_TIMER"
+.LASF206:
+	.string	"UCLASS_SPI_FLASH"
+.LASF63:
+	.string	"bi_busfreq"
+.LASF6:
+	.string	"short int"
+.LASF368:
+	.string	"oldgray"
+.LASF190:
+	.string	"UCLASS_PINCTRL"
+.LASF200:
+	.string	"UCLASS_RAMDISK"
+.LASF387:
+	.string	"mode"
+.LASF147:
+	.string	"UCLASS_I2C_EMUL"
+.LASF205:
+	.string	"UCLASS_SPMI"
+.LASF144:
+	.string	"UCLASS_TEST_BUS"
+.LASF240:
+	.string	"save_addr"
+.LASF420:
+	.string	"/home2/zwp/2_rk3568_11.0/u-boot"
+.LASF362:
+	.string	"parse_wf_a2"
+.LASF133:
+	.string	"initrd_end"
+.LASF409:
+	.string	"kfree"
+.LASF366:
+	.string	"parse_wf_reset"
+.LASF73:
+	.string	"_datarellocal_start_ofs"
+.LASF367:
+	.string	"newgray"
+.LASF233:
+	.string	"UCLASS_COUNT"
+.LASF329:
+	.string	"wf_subversion"
+.LASF32:
+	.string	"block_drvr"
+.LASF417:
+	.string	"memcpy"
+.LASF22:
+	.string	"gfp_t"
+.LASF35:
+	.string	"flash_id"
+.LASF228:
+	.string	"UCLASS_CRYPTO"
+.LASF127:
+	.string	"fit_noffset_setup"
+.LASF88:
+	.string	"working_fdt"
+.LASF262:
+	.string	"net_root_path"
+.LASF160:
+	.string	"UCLASS_DMA"
+.LASF68:
+	.string	"bd_t"
+.LASF243:
+	.string	"s_addr"
+.LASF271:
+	.string	"net_bcast_ethaddr"
+.LASF65:
+	.string	"bi_boot_params"
+.LASF357:
+	.string	"sftemp"
+.LASF289:
+	.string	"mem_malloc_brk"
+.LASF257:
+	.string	"net_gateway"
+.LASF48:
+	.string	"bi_memstart"
+.LASF292:
+	.string	"epd_lut_type"
+.LASF219:
+	.string	"UCLASS_VIDEO_CONSOLE"
+.LASF298:
+	.string	"WF_TYPE_A2"
+.LASF255:
+	.string	"eth_current"
+.LASF46:
+	.string	"reserved"
+.LASF414:
+	.string	"free"
+.LASF400:
+	.string	"getwaveformdata"
+.LASF320:
+	.string	"pvi_waveform"
+.LASF67:
+	.string	"bi_dram"
+.LASF2:
+	.string	"short unsigned int"
+.LASF78:
+	.string	"magic"
+.LASF125:
+	.string	"fit_hdr_setup"
+.LASF303:
+	.string	"WF_TYPE_GCC16"
+.LASF114:
+	.string	"legacy_hdr_valid"
+.LASF42:
+	.string	"base"
+.LASF201:
+	.string	"UCLASS_RTC"
+.LASF34:
+	.string	"sector_count"
+.LASF100:
+	.string	"ih_comp"
+.LASF294:
+	.string	"WF_TYPE_GRAY16"
+.LASF312:
+	.string	"PVI_WF_GLR16"
+.LASF382:
+	.string	"_data1"
+.LASF344:
+	.string	"gray_2_data"
+.LASF130:
+	.string	"ft_addr"
+.LASF229:
+	.string	"UCLASS_ETH_PHY"
+.LASF342:
+	.string	"gray_data"
+.LASF327:
+	.string	"mode_version"
+.LASF4:
+	.string	"uchar"
+.LASF131:
+	.string	"ft_len"
+.LASF252:
+	.string	"next"
+.LASF319:
+	.string	"data"
+.LASF180:
+	.string	"UCLASS_NOP"
+.LASF126:
+	.string	"fit_uname_setup"
+.LASF185:
+	.string	"UCLASS_PCH"
+.LASF186:
+	.string	"UCLASS_PCI"
+.LASF258:
+	.string	"net_netmask"
+.LASF69:
+	.string	"IRQ_STACK_START"
+.LASF151:
+	.string	"UCLASS_ADC"
+.LASF397:
+	.string	"get_wf_mode_index"
+.LASF352:
+	.string	"waveform_file"
+.LASF146:
+	.string	"UCLASS_SPI_EMUL"
+.LASF372:
+	.string	"decode_wf_auto"
+.LASF123:
+	.string	"fit_uname_fdt"
+	.hidden	free
+	.ident	"GCC: (Linaro GCC 6.3-2017.05) 6.3.1 20170404"
+	.section	.note.GNU-stack,"",@progbits
diff --git a/drivers/video/rk_eink/epdlut/rkf_waveform.S b/drivers/video/rk_eink/epdlut/rkf_waveform.S
new file mode 100644
index 0000000000..0907710ee1
--- /dev/null
+++ b/drivers/video/rk_eink/epdlut/rkf_waveform.S
@@ -0,0 +1,8148 @@
+/*
+ * (C) Copyright 2020 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+	.arch armv8-a+nosimd
+	.file	"rkf_waveform.c"
+	.text
+.Ltext0:
+	.cfi_sections	.debug_frame
+	.section	.text.get_wf_buf,"ax",@progbits
+	.align	2
+	.type	get_wf_buf, %function
+get_wf_buf:
+.LFB219:
+	.file 1 "drivers/video/rk_eink/epdlut/rkf_waveform.c"
+	.loc 1 144 0
+	.cfi_startproc
+.LVL0:
+	.loc 1 145 0
+	adrp	x2, .LANCHOR0
+	.loc 1 152 0
+	cmp	w1, 6
+	.loc 1 145 0
+	ldr	x2, [x2, #:lo12:.LANCHOR0]
+.LVL1:
+	.loc 1 152 0
+	bhi	.L15
+	adrp	x3, .L4
+	add	x3, x3, :lo12:.L4
+	ldrb	w1, [x3,w1,uxtw]
+	adr	x3, .Lrtx4
+	add	x1, x3, w1, sxtb #2
+	br	x1
+.Lrtx4:
+.LVL2:
+	.section	.rodata.get_wf_buf,"a",@progbits
+	.align	0
+	.align	2
+.L4:
+	.byte	(.L3 - .Lrtx4) / 4
+	.byte	(.L5 - .Lrtx4) / 4
+	.byte	(.L6 - .Lrtx4) / 4
+	.byte	(.L7 - .Lrtx4) / 4
+	.byte	(.L8 - .Lrtx4) / 4
+	.byte	(.L9 - .Lrtx4) / 4
+	.byte	(.L10 - .Lrtx4) / 4
+	.section	.text.get_wf_buf
+.L3:
+	.loc 1 154 0
+	add	x1, x2, 148
+.LVL3:
+	.loc 1 155 0
+	add	x3, x2, 596
+.LVL4:
+.L11:
+.LBB31:
+.LBB32:
+.LBB33:
+	.loc 1 127 0
+	cmp	w0, 0
+.LBE33:
+.LBB34:
+	.loc 1 128 0
+	mov	w4, 49
+.LBE34:
+.LBB35:
+	.loc 1 127 0
+	csel	w0, w0, wzr, ge
+.LVL5:
+.LBE35:
+	.loc 1 124 0
+	mov	w5, 0
+.LBB36:
+	.loc 1 128 0
+	cmp	w0, 49
+	csel	w0, w0, w4, le
+.LVL6:
+	mov	x4, 0
+.LVL7:
+.L14:
+.LBE36:
+	.loc 1 131 0
+	ldrb	w6, [x1, x4]
+	cmp	w0, w6
+	bgt	.L12
+.LVL8:
+	.loc 1 136 0
+	add	x5, x1, x4
+	ldrb	w5, [x5, 1]
+	cbz	w5, .L16
+	mov	w5, w4
+.L12:
+.LVL9:
+	add	x4, x4, 1
+.LVL10:
+	.loc 1 130 0
+	cmp	x4, 50
+	bne	.L14
+.LVL11:
+.L13:
+.LBE32:
+.LBE31:
+	.loc 1 187 0
+	ldr	w0, [x3, w5, sxtw 2]
+	add	x0, x2, x0
+	.loc 1 189 0
+	ret
+.LVL12:
+.L5:
+	.loc 1 158 0
+	add	x1, x2, 468
+.LVL13:
+	.loc 1 159 0
+	add	x3, x2, 1876
+.LVL14:
+	.loc 1 160 0
+	b	.L11
+.LVL15:
+.L6:
+	.loc 1 162 0
+	add	x1, x2, 212
+.LVL16:
+	.loc 1 163 0
+	add	x3, x2, 852
+.LVL17:
+	.loc 1 164 0
+	b	.L11
+.LVL18:
+.L7:
+	.loc 1 166 0
+	add	x1, x2, 276
+.LVL19:
+	.loc 1 167 0
+	add	x3, x2, 1108
+.LVL20:
+	.loc 1 168 0
+	b	.L11
+.LVL21:
+.L8:
+	.loc 1 170 0
+	add	x1, x2, 340
+.LVL22:
+	.loc 1 171 0
+	add	x3, x2, 1364
+.LVL23:
+	.loc 1 172 0
+	b	.L11
+.LVL24:
+.L9:
+	.loc 1 174 0
+	add	x1, x2, 404
+.LVL25:
+	.loc 1 175 0
+	add	x3, x2, 1620
+.LVL26:
+	.loc 1 176 0
+	b	.L11
+.LVL27:
+.L10:
+	.loc 1 178 0
+	add	x1, x2, 532
+.LVL28:
+	.loc 1 179 0
+	add	x3, x2, 2132
+.LVL29:
+	.loc 1 180 0
+	b	.L11
+.LVL30:
+.L16:
+.LBB38:
+.LBB37:
+	.loc 1 136 0
+	mov	w5, w4
+	b	.L13
+.LVL31:
+.L15:
+.LBE37:
+.LBE38:
+	.loc 1 182 0
+	mov	x0, 0
+.LVL32:
+	.loc 1 190 0
+	ret
+	.cfi_endproc
+.LFE219:
+	.size	get_wf_buf, .-get_wf_buf
+	.section	.text.decode_wf_data,"ax",@progbits
+	.align	2
+	.type	decode_wf_data, %function
+decode_wf_data:
+.LFB221:
+	.loc 1 199 0
+	.cfi_startproc
+.LVL33:
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	.loc 1 202 0
+	uxtw	x20, w1
+.LVL34:
+	.loc 1 199 0
+	str	x21, [sp, 32]
+	.cfi_offset 21, -16
+.LBB39:
+.LBB40:
+	.file 2 "include/linux/compat.h"
+	.loc 2 58 0
+	mov	w1, 32768
+.LVL35:
+.LBE40:
+.LBE39:
+	.loc 1 199 0
+	mov	x21, x0
+.LBB42:
+.LBB41:
+	.loc 2 58 0
+	mov	x0, x20
+.LVL36:
+	bl	kmalloc
+.LVL37:
+	mov	x19, x0
+.LVL38:
+.LBE41:
+.LBE42:
+	.loc 1 203 0
+	cbz	x0, .L19
+	.loc 1 206 0
+	mov	x2, x20
+	add	x1, x21, 4
+	bl	memcpy
+.LVL39:
+.L19:
+	.loc 1 209 0
+	mov	x0, x19
+	ldr	x21, [sp, 32]
+.LVL40:
+	ldp	x19, x20, [sp, 16]
+.LVL41:
+	ldp	x29, x30, [sp], 48
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE221:
+	.size	decode_wf_data, .-decode_wf_data
+	.section	.text.parse_wf_gray16,"ax",@progbits
+	.align	2
+	.type	parse_wf_gray16, %function
+parse_wf_gray16:
+.LFB225:
+	.loc 1 300 0
+	.cfi_startproc
+.LVL42:
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	str	x19, [sp, 16]
+	.cfi_offset 19, -16
+	.loc 1 300 0
+	mov	x19, x0
+	mov	w0, w1
+.LVL43:
+	.loc 1 306 0
+	mov	w1, w2
+.LVL44:
+	bl	get_wf_buf
+.LVL45:
+	.loc 1 307 0
+	ldrb	w1, [x0]
+.LVL46:
+	.loc 1 309 0
+	str	w1, [x19]
+.LVL47:
+	.loc 1 313 0
+	lsl	w1, w1, 6
+.LVL48:
+	bl	decode_wf_data
+.LVL49:
+	str	x0, [x19, 8]
+	.loc 1 317 0
+	cmp	x0, 0
+	.loc 1 318 0
+	ldr	x19, [sp, 16]
+.LVL50:
+	mov	w0, -22
+	ldp	x29, x30, [sp], 32
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_def_cfa 31, 0
+	csel	w0, w0, wzr, eq
+	ret
+	.cfi_endproc
+.LFE225:
+	.size	parse_wf_gray16, .-parse_wf_gray16
+	.section	.text.rkf_wf_input,"ax",@progbits
+	.align	2
+	.global	rkf_wf_input
+	.type	rkf_wf_input, %function
+rkf_wf_input:
+.LFB229:
+	.loc 1 409 0
+	.cfi_startproc
+.LVL51:
+	stp	x29, x30, [sp, -80]!
+	.cfi_def_cfa_offset 80
+	.cfi_offset 29, -80
+	.cfi_offset 30, -72
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -48
+	.cfi_offset 22, -40
+	.loc 1 413 0
+	adrp	x22, .LANCHOR0
+	.loc 1 409 0
+	stp	x19, x20, [sp, 16]
+	.loc 1 413 0
+	ldr	x1, [x22, #:lo12:.LANCHOR0]
+	.loc 1 409 0
+	stp	x23, x24, [sp, 48]
+	str	x25, [sp, 64]
+	.cfi_offset 19, -64
+	.cfi_offset 20, -56
+	.cfi_offset 23, -32
+	.cfi_offset 24, -24
+	.cfi_offset 25, -16
+	.loc 1 413 0
+	cbnz	x1, .L40
+	mov	x19, x0
+.LVL52:
+.LBB51:
+.LBB52:
+	.loc 1 94 0
+	mov	x2, 12
+	adrp	x1, .LC0
+	add	x0, x0, 4
+.LVL53:
+	add	x1, x1, :lo12:.LC0
+	bl	strncmp
+.LVL54:
+	mov	w21, w0
+	cbz	w0, .L30
+	.loc 1 97 0
+	adrp	x0, .LC1
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL55:
+.LBE52:
+.LBE51:
+	.loc 1 418 0
+	adrp	x0, .LC2
+	add	x0, x0, :lo12:.LC2
+.L44:
+	.loc 1 424 0
+	bl	printf
+.LVL56:
+	.loc 1 425 0
+	mov	w21, -1
+	b	.L28
+.LVL57:
+.L36:
+.LBB53:
+.LBB54:
+.LBB55:
+.LBB56:
+	.loc 1 87 0
+	ldrb	w0, [x19, x1]
+	add	x1, x1, 1
+.LVL58:
+	eor	w0, w0, w2, lsr 24
+	ldr	w0, [x20, x0, lsl 2]
+	eor	w2, w0, w2, lsl 8
+.LVL59:
+	b	.L35
+.LVL60:
+.L40:
+.LBE56:
+.LBE55:
+.LBE54:
+.LBE53:
+	.loc 1 414 0
+	mov	w21, -16
+.LVL61:
+.L28:
+	.loc 1 433 0
+	mov	w0, w21
+	ldr	x25, [sp, 64]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 25
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL62:
+.L30:
+	.cfi_restore_state
+.LBB70:
+.LBB69:
+	.loc 1 107 0
+	ldr	w24, [x19]
+	cmp	w24, 262144
+	bgt	.L38
+.LBB67:
+.LBB65:
+	.loc 1 84 0
+	adrp	x20, .LANCHOR1
+	add	x23, x20, :lo12:.LANCHOR1
+.LBE65:
+.LBE67:
+	.loc 1 110 0
+	ldr	w25, [x19, w24, sxtw]
+.LVL63:
+.LBB68:
+.LBB66:
+	.loc 1 84 0
+	mov	x2, 1024
+	mov	w1, 0
+	mov	x0, x23
+	bl	memset
+.LVL64:
+.LBB57:
+.LBB58:
+	.loc 1 70 0
+	mov	w4, 3511
+.LBE58:
+.LBE57:
+	.loc 1 84 0
+	mov	x3, 0
+.LBB62:
+.LBB59:
+	.loc 1 70 0
+	movk	w4, 0x4c1, lsl 16
+.LVL65:
+.L34:
+	lsl	w0, w3, 22
+.LVL66:
+.LBE59:
+.LBE62:
+	.loc 1 84 0
+	mov	w2, 8
+.LBB63:
+.LBB60:
+	.loc 1 67 0
+	mov	w1, 0
+.LVL67:
+.L33:
+	.loc 1 69 0
+	eor	w6, w0, w1
+	lsl	w1, w1, 1
+.LVL68:
+	.loc 1 70 0
+	mov	w5, w1
+	cmp	w6, 0
+	eor	w1, w1, w4
+	.loc 1 73 0
+	lsl	w0, w0, 1
+.LVL69:
+	.loc 1 70 0
+	csel	w1, w1, w5, lt
+.LVL70:
+	.loc 1 68 0
+	subs	w2, w2, #1
+.LVL71:
+	bne	.L33
+	.loc 1 75 0
+	str	w1, [x3, x23]
+	add	x3, x3, 4
+	.loc 1 65 0
+	cmp	x3, 1024
+	bne	.L34
+.LBE60:
+.LBE63:
+	.loc 1 87 0
+	add	x20, x20, :lo12:.LANCHOR1
+.LBB64:
+.LBB61:
+	.loc 1 65 0
+	mov	x1, 0
+.LVL72:
+.L35:
+.LBE61:
+.LBE64:
+	.loc 1 86 0
+	cmp	w24, w1
+	bhi	.L36
+.LVL73:
+.LBE66:
+.LBE68:
+	.loc 1 113 0
+	cmp	w25, w2
+	beq	.L37
+	.loc 1 114 0
+	adrp	x0, .LC3
+	mov	w1, w25
+	add	x0, x0, :lo12:.LC3
+	bl	printf
+.LVL74:
+.L38:
+.LBE69:
+.LBE70:
+	.loc 1 424 0
+	adrp	x0, .LC4
+	add	x0, x0, :lo12:.LC4
+	b	.L44
+.LVL75:
+.L37:
+	.loc 1 428 0
+	add	x1, x19, 20
+	adrp	x0, .LC5
+	add	x0, x0, :lo12:.LC5
+	bl	printf
+.LVL76:
+	.loc 1 430 0
+	str	x19, [x22, #:lo12:.LANCHOR0]
+	.loc 1 432 0
+	b	.L28
+	.cfi_endproc
+.LFE229:
+	.size	rkf_wf_input, .-rkf_wf_input
+	.section	.text.rkf_wf_get_version,"ax",@progbits
+	.align	2
+	.global	rkf_wf_get_version
+	.type	rkf_wf_get_version, %function
+rkf_wf_get_version:
+.LFB230:
+	.loc 1 442 0
+	.cfi_startproc
+	.loc 1 443 0
+	adrp	x0, .LANCHOR0
+	ldr	x1, [x0, #:lo12:.LANCHOR0]
+	.loc 1 446 0
+	add	x0, x1, 84
+	cmp	x1, 0
+	.loc 1 447 0
+	csel	x0, x0, xzr, ne
+	ret
+	.cfi_endproc
+.LFE230:
+	.size	rkf_wf_get_version, .-rkf_wf_get_version
+	.section	.text.rkf_wf_get_lut,"ax",@progbits
+	.align	2
+	.global	rkf_wf_get_lut
+	.type	rkf_wf_get_lut, %function
+rkf_wf_get_lut:
+.LFB231:
+	.loc 1 460 0
+	.cfi_startproc
+.LVL77:
+	.loc 1 465 0
+	adrp	x3, .LANCHOR0
+	ldr	x3, [x3, #:lo12:.LANCHOR0]
+	cbz	x3, .L74
+	.loc 1 468 0
+	cbz	x0, .L75
+	.loc 1 460 0
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	.loc 1 472 0
+	adrp	x20, .LANCHOR2
+	.loc 1 460 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -16
+	.cfi_offset 22, -8
+	.loc 1 472 0
+	ldr	w3, [x20, #:lo12:.LANCHOR2]
+	cmp	w3, w2
+	adrp	x3, .LANCHOR3
+	bne	.L50
+	.loc 1 472 0 is_stmt 0 discriminator 1
+	ldr	w4, [x3, #:lo12:.LANCHOR3]
+	cmp	w4, w1
+	beq	.L76
+.L50:
+	mov	x19, x0
+	.loc 1 479 0 is_stmt 1
+	ldr	x0, [x0, 8]
+.LVL78:
+	.loc 1 475 0
+	str	w2, [x20, #:lo12:.LANCHOR2]
+	mov	w21, w1
+	.loc 1 476 0
+	str	w1, [x3, #:lo12:.LANCHOR3]
+	.loc 1 479 0
+	cbz	x0, .L51
+.LVL79:
+.LBB104:
+.LBB105:
+	.loc 2 81 0
+	bl	free
+.LVL80:
+.LBE105:
+.LBE104:
+	.loc 1 481 0
+	str	xzr, [x19, 8]
+.L51:
+	.loc 1 484 0
+	cmp	w21, 2
+	beq	.L56
+	.loc 1 487 0
+	cmp	w21, 11
+	beq	.L53
+	.loc 1 491 0
+	sub	w21, w21, #1
+.LVL81:
+	cmp	w21, 9
+	bhi	.L70
+	adrp	x0, .L55
+	add	x0, x0, :lo12:.L55
+	ldrb	w0, [x0,w21,uxtw]
+	adr	x1, .Lrtx55
+	add	x0, x1, w0, sxtb #2
+	br	x0
+.Lrtx55:
+	.section	.rodata.rkf_wf_get_lut,"a",@progbits
+	.align	0
+	.align	2
+.L55:
+	.byte	(.L54 - .Lrtx55) / 4
+	.byte	(.L70 - .Lrtx55) / 4
+	.byte	(.L56 - .Lrtx55) / 4
+	.byte	(.L57 - .Lrtx55) / 4
+	.byte	(.L58 - .Lrtx55) / 4
+	.byte	(.L59 - .Lrtx55) / 4
+	.byte	(.L56 - .Lrtx55) / 4
+	.byte	(.L60 - .Lrtx55) / 4
+	.byte	(.L53 - .Lrtx55) / 4
+	.byte	(.L61 - .Lrtx55) / 4
+	.section	.text.rkf_wf_get_lut
+.L54:
+.LVL82:
+.LBB106:
+.LBB107:
+	.loc 1 276 0
+	ldr	w0, [x20, #:lo12:.LANCHOR2]
+	mov	w1, 0
+	bl	get_wf_buf
+.LVL83:
+	.loc 1 277 0
+	ldrb	w22, [x0]
+.LVL84:
+	.loc 1 280 0
+	add	w20, w22, 15
+	lsr	w20, w20, 4
+.LVL85:
+	.loc 1 281 0
+	lsl	w1, w20, 2
+.LVL86:
+	bl	decode_wf_data
+.LVL87:
+	mov	x21, x0
+.LVL88:
+	.loc 1 282 0
+	cbz	x0, .L70
+	.loc 1 286 0
+	str	w22, [x19]
+.LVL89:
+.LBB108:
+.LBB109:
+.LBB110:
+.LBB111:
+	.loc 2 58 0
+	mov	w1, 32768
+	ubfiz	x0, x20, 10, 5
+.LVL90:
+	bl	kmalloc
+.LVL91:
+.LBE111:
+.LBE110:
+	.loc 1 223 0
+	cbz	x0, .L78
+	mov	x2, 0
+.LVL92:
+.L64:
+	.loc 1 226 0
+	cmp	w20, w2
+	bgt	.L68
+.LVL93:
+.L63:
+.LBE109:
+.LBE108:
+	.loc 1 289 0
+	str	x0, [x19, 8]
+	.loc 1 290 0
+	cbnz	x0, .L69
+.LVL94:
+.LBB114:
+.LBB115:
+	.loc 2 81 0
+	mov	x0, x21
+	bl	free
+.LVL95:
+.L70:
+.LBE115:
+.LBE114:
+.LBE107:
+.LBE106:
+	.loc 1 537 0
+	mov	w0, -1
+	b	.L48
+.LVL96:
+.L68:
+.LBB120:
+.LBB119:
+.LBB116:
+.LBB113:
+	.loc 1 227 0
+	ldr	w7, [x21, x2, lsl 2]
+.LVL97:
+	lsl	x6, x2, 8
+	mov	x3, 0
+.LVL98:
+.L67:
+.LBB112:
+	.loc 1 229 0
+	lsl	w1, w3, 1
+	mov	w4, 0
+	asr	w1, w7, w1
+	and	w1, w1, 3
+.LVL99:
+	.loc 1 230 0
+	mov	w5, w1
+.LVL100:
+.L65:
+	.loc 1 233 0
+	lsl	w8, w1, w4
+	add	w4, w4, 2
+	orr	w5, w5, w8
+.LVL101:
+	.loc 1 232 0
+	cmp	w4, 32
+	bne	.L65
+	add	x4, x6, x3, lsl 4
+	mov	x1, 0
+.LVL102:
+	add	x4, x0, x4, lsl 2
+.LVL103:
+.L66:
+	.loc 1 236 0
+	str	w5, [x4, x1, lsl 2]
+.LVL104:
+	add	x1, x1, 1
+.LVL105:
+	.loc 1 235 0
+	cmp	x1, 16
+	bne	.L66
+.LVL106:
+	add	x3, x3, 1
+.LVL107:
+.LBE112:
+	.loc 1 228 0
+	cmp	x3, 16
+	bne	.L67
+.LVL108:
+	add	x2, x2, 1
+.LVL109:
+	b	.L64
+.LVL110:
+.L78:
+	.loc 1 224 0
+	mov	x0, 0
+	b	.L63
+.LVL111:
+.L69:
+.LBE113:
+.LBE116:
+.LBB117:
+.LBB118:
+	.loc 2 81 0
+	mov	x0, x21
+.LVL112:
+.L107:
+.LBE118:
+.LBE117:
+.LBE119:
+.LBE120:
+.LBB121:
+.LBB122:
+.LBB123:
+.LBB124:
+	bl	free
+.LVL113:
+	b	.L76
+.L60:
+.LBE124:
+.LBE123:
+.LBE122:
+.LBE121:
+	.loc 1 505 0
+	mov	w2, 3
+.LVL114:
+.L106:
+	ldr	w1, [x20, #:lo12:.LANCHOR2]
+	mov	x0, x19
+	bl	parse_wf_gray16
+.LVL115:
+	.loc 1 506 0
+	cmp	w0, 0
+	csetm	w0, ne
+.LVL116:
+.L48:
+	.loc 1 551 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL117:
+.L53:
+	.cfi_restore_state
+	.loc 1 511 0
+	mov	w2, 4
+	b	.L106
+.LVL118:
+.L61:
+	.loc 1 517 0
+	mov	w2, 5
+	b	.L106
+.LVL119:
+.L56:
+	.loc 1 523 0
+	mov	w2, 2
+	b	.L106
+.LVL120:
+.L57:
+.LBB130:
+.LBB131:
+	.loc 1 327 0
+	ldr	w0, [x20, #:lo12:.LANCHOR2]
+	mov	w1, 1
+	bl	get_wf_buf
+.LVL121:
+	.loc 1 328 0
+	ldrb	w20, [x0]
+.LVL122:
+	.loc 1 332 0
+	lsl	w1, w20, 6
+.LVL123:
+	bl	decode_wf_data
+.LVL124:
+	str	x0, [x19, 8]
+	.loc 1 333 0
+	cbz	x0, .L70
+	.loc 1 336 0
+	str	w20, [x19]
+.LVL125:
+.L76:
+.LBE131:
+.LBE130:
+	.loc 1 473 0
+	mov	w0, 0
+	b	.L48
+.LVL126:
+.L58:
+	.loc 1 535 0
+	ldr	w20, [x20, #:lo12:.LANCHOR2]
+.LVL127:
+.LBB132:
+.LBB129:
+	.loc 1 349 0
+	mov	w1, 2
+	mov	w0, w20
+	bl	get_wf_buf
+.LVL128:
+	.loc 1 350 0
+	ldrb	w1, [x0]
+.LVL129:
+	.loc 1 352 0
+	str	w1, [x19]
+.LVL130:
+	.loc 1 356 0
+	lsl	w1, w1, 6
+.LVL131:
+	bl	decode_wf_data
+.LVL132:
+	str	x0, [x19, 8]
+	.loc 1 357 0
+	cbz	x0, .L70
+	.loc 1 362 0
+	mov	w1, 1
+	mov	w0, w20
+	bl	get_wf_buf
+.LVL133:
+.LBB125:
+.LBB126:
+	.loc 1 194 0
+	ldrb	w20, [x0]
+.LVL134:
+.LBE126:
+.LBE125:
+	.loc 1 365 0
+	ldr	w1, [x19]
+	orr	w1, w1, w20, lsl 8
+	str	w1, [x19]
+.LVL135:
+	.loc 1 370 0
+	lsl	w1, w20, 6
+.LVL136:
+	bl	decode_wf_data
+.LVL137:
+	.loc 1 371 0
+	cbz	x0, .L70
+	ldr	x7, [x19, 8]
+.LVL138:
+	ubfiz	x20, x20, 6, 8
+.LVL139:
+	mov	x2, 0
+.LVL140:
+.L71:
+	add	x5, x7, x2
+	add	x6, x0, x2
+.LVL141:
+.LBB127:
+.LBB128:
+	.loc 1 254 0
+	cmp	x2, x20
+	beq	.L107
+	mov	x1, 0
+.LVL142:
+.L72:
+	.loc 1 256 0
+	ldr	w3, [x6, x1]
+.LVL143:
+	.loc 1 258 0
+	ldr	w4, [x5, x1]
+.LVL144:
+	.loc 1 257 0
+	and	w3, w3, -1073741821
+.LVL145:
+	.loc 1 259 0
+	and	w4, w4, 1073741820
+.LVL146:
+	.loc 1 261 0
+	orr	w3, w3, w4
+.LVL147:
+	str	w3, [x5, x1]
+.LVL148:
+	add	x1, x1, 4
+.LVL149:
+	.loc 1 255 0
+	cmp	x1, 64
+	bne	.L72
+	add	x2, x2, 64
+	b	.L71
+.LVL150:
+.L59:
+.LBE128:
+.LBE127:
+.LBE129:
+.LBE132:
+.LBB133:
+.LBB134:
+	.loc 1 388 0
+	ldr	w0, [x20, #:lo12:.LANCHOR2]
+	mov	w1, 6
+	bl	get_wf_buf
+.LVL151:
+	.loc 1 389 0
+	ldrb	w1, [x0]
+.LVL152:
+	.loc 1 391 0
+	str	w1, [x19]
+.LVL153:
+	.loc 1 395 0
+	lsl	w1, w1, 6
+.LVL154:
+	bl	decode_wf_data
+.LVL155:
+	.loc 1 396 0
+	cmp	x0, 0
+	.loc 1 395 0
+	str	x0, [x19, 8]
+	.loc 1 396 0
+	csetm	w0, eq
+	b	.L48
+.LVL156:
+.L74:
+	.cfi_def_cfa 31, 0
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 29
+	.cfi_restore 30
+.LBE134:
+.LBE133:
+	.loc 1 466 0
+	mov	w0, -19
+.LVL157:
+	ret
+.LVL158:
+.L75:
+	.loc 1 469 0
+	mov	w0, -22
+.LVL159:
+	ret
+	.cfi_endproc
+.LFE231:
+	.size	rkf_wf_get_lut, .-rkf_wf_get_lut
+	.section	.bss.crc32_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR1,. + 0
+	.type	crc32_table, %object
+	.size	crc32_table, 1024
+crc32_table:
+	.zero	1024
+	.section	.bss.global_waveform,"aw",@nobits
+	.align	3
+	.set	.LANCHOR0,. + 0
+	.type	global_waveform, %object
+	.size	global_waveform, 8
+global_waveform:
+	.zero	8
+	.section	.data.sftemp.6124,"aw",@progbits
+	.align	2
+	.set	.LANCHOR2,. + 0
+	.type	sftemp.6124, %object
+	.size	sftemp.6124, 4
+sftemp.6124:
+	.word	-1
+	.section	.data.stype.6123,"aw",@progbits
+	.align	2
+	.set	.LANCHOR3,. + 0
+	.type	stype.6123, %object
+	.size	stype.6123, 4
+stype.6123:
+	.word	13
+	.section	.rodata.rkf_wf_input.str1.1,"aMS",@progbits,1
+.LC0:
+	.string	"rkf waveform"
+.LC1:
+	.string	"rkf: check format failed\n"
+.LC2:
+	.string	"rkf: failed to check RKF file format\n"
+.LC3:
+	.string	"[EINK]: waveform crc err readcrc = %x crccheck = %x\n"
+.LC4:
+	.string	"rkf: failed to check crc RKF waveform\n"
+.LC5:
+	.string	"rkf file version: %s\n"
+	.text
+.Letext0:
+	.file 3 "include/common.h"
+	.file 4 "./arch/arm/include/asm/types.h"
+	.file 5 "./arch/arm/include/asm/posix_types.h"
+	.file 6 "include/linux/types.h"
+	.file 7 "include/errno.h"
+	.file 8 "include/linux/string.h"
+	.file 9 "include/efi.h"
+	.file 10 "include/ide.h"
+	.file 11 "include/part.h"
+	.file 12 "include/flash.h"
+	.file 13 "include/lmb.h"
+	.file 14 "include/asm-generic/u-boot.h"
+	.file 15 "./arch/arm/include/asm/u-boot-arm.h"
+	.file 16 "include/linux/libfdt_env.h"
+	.file 17 "include/linux/../../scripts/dtc/libfdt/fdt.h"
+	.file 18 "include/linux/libfdt.h"
+	.file 19 "include/image.h"
+	.file 20 "include/net.h"
+	.file 21 "include/dm/uclass-id.h"
+	.file 22 "include/malloc.h"
+	.file 23 "drivers/video/rk_eink/epdlut/epd_lut.h"
+	.file 24 "include/stdio.h"
+	.file 25 "include/log.h"
+	.section	.debug_info,"",@progbits
+.Ldebug_info0:
+	.4byte	0x1e83
+	.2byte	0x4
+	.4byte	.Ldebug_abbrev0
+	.byte	0x8
+	.uleb128 0x1
+	.4byte	.LASF399
+	.byte	0xc
+	.4byte	.LASF400
+	.4byte	.LASF401
+	.4byte	.Ldebug_ranges0+0x210
+	.8byte	0
+	.4byte	.Ldebug_line0
+	.uleb128 0x2
+	.4byte	.LASF4
+	.byte	0x3
+	.byte	0xd
+	.4byte	0x34
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x8
+	.4byte	.LASF0
+	.uleb128 0x4
+	.4byte	0x34
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF1
+	.uleb128 0x3
+	.byte	0x2
+	.byte	0x7
+	.4byte	.LASF2
+	.uleb128 0x5
+	.4byte	.LASF23
+	.byte	0x7
+	.byte	0xc
+	.4byte	0x59
+	.uleb128 0x6
+	.byte	0x4
+	.byte	0x5
+	.string	"int"
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x6
+	.4byte	.LASF3
+	.uleb128 0x2
+	.4byte	.LASF5
+	.byte	0x4
+	.byte	0xc
+	.4byte	0x34
+	.uleb128 0x3
+	.byte	0x2
+	.byte	0x5
+	.4byte	.LASF6
+	.uleb128 0x2
+	.4byte	.LASF7
+	.byte	0x4
+	.byte	0x12
+	.4byte	0x84
+	.uleb128 0x3
+	.byte	0x4
+	.byte	0x7
+	.4byte	.LASF8
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x5
+	.4byte	.LASF9
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF10
+	.uleb128 0x7
+	.string	"u8"
+	.byte	0x4
+	.byte	0x1f
+	.4byte	0x34
+	.uleb128 0x4
+	.4byte	0x99
+	.uleb128 0x7
+	.string	"u32"
+	.byte	0x4
+	.byte	0x25
+	.4byte	0x84
+	.uleb128 0x7
+	.string	"u64"
+	.byte	0x4
+	.byte	0x28
+	.4byte	0x92
+	.uleb128 0x2
+	.4byte	.LASF11
+	.byte	0x4
+	.byte	0x31
+	.4byte	0x92
+	.uleb128 0x2
+	.4byte	.LASF12
+	.byte	0x4
+	.byte	0x32
+	.4byte	0x92
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF13
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0xe8
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x8
+	.4byte	.LASF14
+	.uleb128 0x4
+	.4byte	0xe1
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x5
+	.4byte	.LASF15
+	.uleb128 0x2
+	.4byte	.LASF16
+	.byte	0x5
+	.byte	0x21
+	.4byte	0x40
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0xe1
+	.uleb128 0x2
+	.4byte	.LASF17
+	.byte	0x6
+	.byte	0x35
+	.4byte	0xf4
+	.uleb128 0x2
+	.4byte	.LASF18
+	.byte	0x6
+	.byte	0x59
+	.4byte	0x47
+	.uleb128 0x2
+	.4byte	.LASF19
+	.byte	0x6
+	.byte	0x5b
+	.4byte	0x40
+	.uleb128 0x2
+	.4byte	.LASF20
+	.byte	0x6
+	.byte	0x69
+	.4byte	0x67
+	.uleb128 0x2
+	.4byte	.LASF21
+	.byte	0x6
+	.byte	0x97
+	.4byte	0x79
+	.uleb128 0x2
+	.4byte	.LASF22
+	.byte	0x6
+	.byte	0x9f
+	.4byte	0x84
+	.uleb128 0x9
+	.byte	0x8
+	.uleb128 0x5
+	.4byte	.LASF24
+	.byte	0x8
+	.byte	0xb
+	.4byte	0xff
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x2
+	.4byte	.LASF25
+	.uleb128 0xa
+	.4byte	0xe1
+	.4byte	0x166
+	.uleb128 0xb
+	.byte	0
+	.uleb128 0xc
+	.4byte	.LASF26
+	.byte	0x9
+	.2byte	0x140
+	.4byte	0x15b
+	.uleb128 0xc
+	.4byte	.LASF27
+	.byte	0x9
+	.2byte	0x143
+	.4byte	0x15b
+	.uleb128 0xc
+	.4byte	.LASF28
+	.byte	0x9
+	.2byte	0x143
+	.4byte	0x15b
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x190
+	.uleb128 0xd
+	.uleb128 0xa
+	.4byte	0x11b
+	.4byte	0x19c
+	.uleb128 0xb
+	.byte	0
+	.uleb128 0x5
+	.4byte	.LASF29
+	.byte	0xa
+	.byte	0x10
+	.4byte	0x191
+	.uleb128 0xa
+	.4byte	0x34
+	.4byte	0x1b7
+	.uleb128 0xe
+	.4byte	0xd4
+	.byte	0x5
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF32
+	.byte	0x10
+	.byte	0xb
+	.byte	0xf
+	.4byte	0x1dc
+	.uleb128 0x10
+	.4byte	.LASF30
+	.byte	0xb
+	.byte	0x10
+	.4byte	0xff
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF31
+	.byte	0xb
+	.byte	0x11
+	.4byte	0x1f5
+	.byte	0x8
+	.byte	0
+	.uleb128 0x4
+	.4byte	0x1b7
+	.uleb128 0x11
+	.4byte	0x59
+	.4byte	0x1f5
+	.uleb128 0x12
+	.4byte	0x59
+	.uleb128 0x12
+	.4byte	0x59
+	.byte	0
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x1e1
+	.uleb128 0xa
+	.4byte	0x1dc
+	.4byte	0x206
+	.uleb128 0xb
+	.byte	0
+	.uleb128 0x4
+	.4byte	0x1fb
+	.uleb128 0x5
+	.4byte	.LASF32
+	.byte	0xb
+	.byte	0xce
+	.4byte	0x206
+	.uleb128 0x13
+	.2byte	0x1220
+	.byte	0xc
+	.byte	0x13
+	.4byte	0x26a
+	.uleb128 0x10
+	.4byte	.LASF33
+	.byte	0xc
+	.byte	0x14
+	.4byte	0x11b
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF34
+	.byte	0xc
+	.byte	0x15
+	.4byte	0x110
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF35
+	.byte	0xc
+	.byte	0x16
+	.4byte	0x11b
+	.byte	0x10
+	.uleb128 0x10
+	.4byte	.LASF36
+	.byte	0xc
+	.byte	0x17
+	.4byte	0x26a
+	.byte	0x18
+	.uleb128 0x14
+	.4byte	.LASF37
+	.byte	0xc
+	.byte	0x18
+	.4byte	0x27b
+	.2byte	0x1018
+	.uleb128 0x15
+	.string	"mtd"
+	.byte	0xc
+	.byte	0x31
+	.4byte	0x291
+	.2byte	0x1218
+	.byte	0
+	.uleb128 0xa
+	.4byte	0x11b
+	.4byte	0x27b
+	.uleb128 0x16
+	.4byte	0xd4
+	.2byte	0x1ff
+	.byte	0
+	.uleb128 0xa
+	.4byte	0x29
+	.4byte	0x28c
+	.uleb128 0x16
+	.4byte	0xd4
+	.2byte	0x1ff
+	.byte	0
+	.uleb128 0x17
+	.4byte	.LASF402
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x28c
+	.uleb128 0x2
+	.4byte	.LASF38
+	.byte	0xc
+	.byte	0x37
+	.4byte	0x216
+	.uleb128 0xa
+	.4byte	0x297
+	.4byte	0x2ad
+	.uleb128 0xb
+	.byte	0
+	.uleb128 0x5
+	.4byte	.LASF39
+	.byte	0xc
+	.byte	0x39
+	.4byte	0x2a2
+	.uleb128 0x3
+	.byte	0x10
+	.byte	0x4
+	.4byte	.LASF40
+	.uleb128 0xf
+	.4byte	.LASF41
+	.byte	0x10
+	.byte	0xd
+	.byte	0x10
+	.4byte	0x2e4
+	.uleb128 0x10
+	.4byte	.LASF42
+	.byte	0xd
+	.byte	0x11
+	.4byte	0xbe
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF33
+	.byte	0xd
+	.byte	0x12
+	.4byte	0xc9
+	.byte	0x8
+	.byte	0
+	.uleb128 0x18
+	.4byte	.LASF43
+	.2byte	0x120
+	.byte	0xd
+	.byte	0x15
+	.4byte	0x316
+	.uleb128 0x19
+	.string	"cnt"
+	.byte	0xd
+	.byte	0x16
+	.4byte	0x40
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF33
+	.byte	0xd
+	.byte	0x17
+	.4byte	0xc9
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF44
+	.byte	0xd
+	.byte	0x18
+	.4byte	0x316
+	.byte	0x10
+	.byte	0
+	.uleb128 0xa
+	.4byte	0x2bf
+	.4byte	0x326
+	.uleb128 0xe
+	.4byte	0xd4
+	.byte	0x10
+	.byte	0
+	.uleb128 0x1a
+	.string	"lmb"
+	.2byte	0x240
+	.byte	0xd
+	.byte	0x1b
+	.4byte	0x34d
+	.uleb128 0x10
+	.4byte	.LASF45
+	.byte	0xd
+	.byte	0x1c
+	.4byte	0x2e4
+	.byte	0
+	.uleb128 0x14
+	.4byte	.LASF46
+	.byte	0xd
+	.byte	0x1d
+	.4byte	0x2e4
+	.2byte	0x120
+	.byte	0
+	.uleb128 0x1b
+	.string	"lmb"
+	.byte	0xd
+	.byte	0x20
+	.4byte	0x326
+	.uleb128 0x1c
+	.byte	0x10
+	.byte	0xe
+	.byte	0x5d
+	.4byte	0x379
+	.uleb128 0x10
+	.4byte	.LASF36
+	.byte	0xe
+	.byte	0x5e
+	.4byte	0xb3
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF33
+	.byte	0xe
+	.byte	0x5f
+	.4byte	0xb3
+	.byte	0x8
+	.byte	0
+	.uleb128 0x18
+	.4byte	.LASF47
+	.2byte	0x150
+	.byte	0xe
+	.byte	0x1b
+	.4byte	0x477
+	.uleb128 0x10
+	.4byte	.LASF48
+	.byte	0xe
+	.byte	0x1c
+	.4byte	0x40
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF49
+	.byte	0xe
+	.byte	0x1d
+	.4byte	0xc9
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF50
+	.byte	0xe
+	.byte	0x1e
+	.4byte	0x40
+	.byte	0x10
+	.uleb128 0x10
+	.4byte	.LASF51
+	.byte	0xe
+	.byte	0x1f
+	.4byte	0x40
+	.byte	0x18
+	.uleb128 0x10
+	.4byte	.LASF52
+	.byte	0xe
+	.byte	0x20
+	.4byte	0x40
+	.byte	0x20
+	.uleb128 0x10
+	.4byte	.LASF53
+	.byte	0xe
+	.byte	0x21
+	.4byte	0x40
+	.byte	0x28
+	.uleb128 0x10
+	.4byte	.LASF54
+	.byte	0xe
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+	.uleb128 0x26
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+	.uleb128 0xe
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+	.4byte	.LASF332
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+	.4byte	0x108b
+	.2byte	0x354
+	.uleb128 0x14
+	.4byte	.LASF333
+	.byte	0x1
+	.byte	0x30
+	.4byte	0x108b
+	.2byte	0x454
+	.uleb128 0x14
+	.4byte	.LASF334
+	.byte	0x1
+	.byte	0x31
+	.4byte	0x108b
+	.2byte	0x554
+	.uleb128 0x14
+	.4byte	.LASF335
+	.byte	0x1
+	.byte	0x32
+	.4byte	0x108b
+	.2byte	0x654
+	.uleb128 0x14
+	.4byte	.LASF336
+	.byte	0x1
+	.byte	0x33
+	.4byte	0x108b
+	.2byte	0x754
+	.uleb128 0x14
+	.4byte	.LASF337
+	.byte	0x1
+	.byte	0x34
+	.4byte	0x108b
+	.2byte	0x854
+	.byte	0
+	.uleb128 0xa
+	.4byte	0x84
+	.4byte	0x109b
+	.uleb128 0xe
+	.4byte	0xd4
+	.byte	0x3f
+	.byte	0
+	.uleb128 0x2a
+	.4byte	.LASF338
+	.byte	0x1
+	.byte	0x38
+	.4byte	0x10b0
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	global_waveform
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0xf75
+	.uleb128 0xa
+	.4byte	0x84
+	.4byte	0x10c6
+	.uleb128 0xe
+	.4byte	0xd4
+	.byte	0xff
+	.byte	0
+	.uleb128 0x2a
+	.4byte	.LASF339
+	.byte	0x1
+	.byte	0x39
+	.4byte	0x10b6
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	crc32_table
+	.uleb128 0x2b
+	.4byte	.LASF345
+	.byte	0x1
+	.2byte	0x1cb
+	.4byte	0x59
+	.8byte	.LFB231
+	.8byte	.LFE231-.LFB231
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x15fa
+	.uleb128 0x2c
+	.4byte	.LASF340
+	.byte	0x1
+	.2byte	0x1cb
+	.4byte	0xf34
+	.4byte	.LLST35
+	.uleb128 0x2c
+	.4byte	.LASF341
+	.byte	0x1
+	.2byte	0x1cb
+	.4byte	0xeaa
+	.4byte	.LLST36
+	.uleb128 0x2c
+	.4byte	.LASF342
+	.byte	0x1
+	.2byte	0x1cb
+	.4byte	0x59
+	.4byte	.LLST37
+	.uleb128 0x2d
+	.4byte	.LASF343
+	.byte	0x1
+	.2byte	0x1cd
+	.4byte	0xeaa
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	stype.6123
+	.uleb128 0x2d
+	.4byte	.LASF344
+	.byte	0x1
+	.2byte	0x1ce
+	.4byte	0x59
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	sftemp.6124
+	.uleb128 0x2e
+	.string	"ret"
+	.byte	0x1
+	.2byte	0x1cf
+	.4byte	0x59
+	.4byte	.LLST38
+	.uleb128 0x2f
+	.4byte	0x1e02
+	.8byte	.LBB104
+	.8byte	.LBE104-.LBB104
+	.byte	0x1
+	.2byte	0x1e0
+	.4byte	0x119c
+	.uleb128 0x30
+	.4byte	0x1e0e
+	.4byte	.LLST39
+	.uleb128 0x31
+	.8byte	.LVL80
+	.4byte	0x1e41
+	.byte	0
+	.uleb128 0x32
+	.4byte	0x19aa
+	.8byte	.LBB106
+	.4byte	.Ldebug_ranges0+0x180
+	.byte	0x1
+	.2byte	0x1ed
+	.4byte	0x1362
+	.uleb128 0x30
+	.4byte	0x19c7
+	.4byte	.LLST40
+	.uleb128 0x30
+	.4byte	0x19bb
+	.4byte	.LLST41
+	.uleb128 0x33
+	.4byte	.Ldebug_ranges0+0x180
+	.uleb128 0x34
+	.4byte	0x19d3
+	.uleb128 0x35
+	.4byte	0x19df
+	.4byte	.LLST42
+	.uleb128 0x35
+	.4byte	0x19eb
+	.4byte	.LLST43
+	.uleb128 0x35
+	.4byte	0x19f7
+	.4byte	.LLST44
+	.uleb128 0x32
+	.4byte	0x1a67
+	.8byte	.LBB108
+	.4byte	.Ldebug_ranges0+0x1b0
+	.byte	0x1
+	.2byte	0x121
+	.4byte	0x12d3
+	.uleb128 0x30
+	.4byte	0x1a77
+	.4byte	.LLST45
+	.uleb128 0x33
+	.4byte	.Ldebug_ranges0+0x1b0
+	.uleb128 0x35
+	.4byte	0x1a82
+	.4byte	.LLST46
+	.uleb128 0x34
+	.4byte	0x1a8d
+	.uleb128 0x35
+	.4byte	0x1a98
+	.4byte	.LLST47
+	.uleb128 0x35
+	.4byte	0x1aa1
+	.4byte	.LLST48
+	.uleb128 0x35
+	.4byte	0x1aaa
+	.4byte	.LLST49
+	.uleb128 0x35
+	.4byte	0x1ab3
+	.4byte	.LLST50
+	.uleb128 0x35
+	.4byte	0x1abc
+	.4byte	.LLST51
+	.uleb128 0x35
+	.4byte	0x1ac7
+	.4byte	.LLST52
+	.uleb128 0x35
+	.4byte	0x1ad2
+	.4byte	.LLST53
+	.uleb128 0x36
+	.4byte	0x1e1a
+	.8byte	.LBB110
+	.8byte	.LBE110-.LBB110
+	.byte	0x1
+	.byte	0xde
+	.4byte	0x12ad
+	.uleb128 0x30
+	.4byte	0x1e35
+	.4byte	.LLST54
+	.uleb128 0x30
+	.4byte	0x1e2a
+	.4byte	.LLST55
+	.uleb128 0x37
+	.8byte	.LVL91
+	.4byte	0x1e4d
+	.uleb128 0x38
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x8
+	.byte	0x84
+	.sleb128 0
+	.byte	0x3a
+	.byte	0x24
+	.byte	0xa
+	.2byte	0x7c00
+	.byte	0x1a
+	.uleb128 0x38
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x8000
+	.byte	0
+	.byte	0
+	.uleb128 0x39
+	.8byte	.LBB112
+	.8byte	.LBE112-.LBB112
+	.uleb128 0x35
+	.4byte	0x1ade
+	.4byte	.LLST56
+	.uleb128 0x35
+	.4byte	0x1ae9
+	.4byte	.LLST57
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x2f
+	.4byte	0x1e02
+	.8byte	.LBB114
+	.8byte	.LBE114-.LBB114
+	.byte	0x1
+	.2byte	0x123
+	.4byte	0x130d
+	.uleb128 0x30
+	.4byte	0x1e0e
+	.4byte	.LLST58
+	.uleb128 0x37
+	.8byte	.LVL95
+	.4byte	0x1e41
+	.uleb128 0x38
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x2f
+	.4byte	0x1e02
+	.8byte	.LBB117
+	.8byte	.LBE117-.LBB117
+	.byte	0x1
+	.2byte	0x127
+	.4byte	0x1333
+	.uleb128 0x30
+	.4byte	0x1e0e
+	.4byte	.LLST59
+	.byte	0
+	.uleb128 0x3a
+	.8byte	.LVL83
+	.4byte	0x1bc2
+	.4byte	0x134a
+	.uleb128 0x38
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x37
+	.8byte	.LVL87
+	.4byte	0x1af6
+	.uleb128 0x38
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x84
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x32
+	.4byte	0x1852
+	.8byte	.LBB121
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+	.byte	0x1
+	.2byte	0x217
+	.4byte	0x14dc
+	.uleb128 0x30
+	.4byte	0x186f
+	.4byte	.LLST60
+	.uleb128 0x30
+	.4byte	0x1863
+	.4byte	.LLST61
+	.uleb128 0x33
+	.4byte	.Ldebug_ranges0+0x1e0
+	.uleb128 0x34
+	.4byte	0x187b
+	.uleb128 0x35
+	.4byte	0x1887
+	.4byte	.LLST62
+	.uleb128 0x35
+	.4byte	0x1893
+	.4byte	.LLST63
+	.uleb128 0x35
+	.4byte	0x189f
+	.4byte	.LLST64
+	.uleb128 0x2f
+	.4byte	0x1e02
+	.8byte	.LBB123
+	.8byte	.LBE123-.LBB123
+	.byte	0x1
+	.2byte	0x179
+	.4byte	0x13e4
+	.uleb128 0x30
+	.4byte	0x1e0e
+	.4byte	.LLST65
+	.uleb128 0x31
+	.8byte	.LVL113
+	.4byte	0x1e41
+	.byte	0
+	.uleb128 0x2f
+	.4byte	0x1ba6
+	.8byte	.LBB125
+	.8byte	.LBE125-.LBB125
+	.byte	0x1
+	.2byte	0x16b
+	.4byte	0x140a
+	.uleb128 0x30
+	.4byte	0x1bb6
+	.4byte	.LLST66
+	.byte	0
+	.uleb128 0x2f
+	.4byte	0x1a04
+	.8byte	.LBB127
+	.8byte	.LBE127-.LBB127
+	.byte	0x1
+	.2byte	0x177
+	.4byte	0x147d
+	.uleb128 0x30
+	.4byte	0x1a1b
+	.4byte	.LLST67
+	.uleb128 0x30
+	.4byte	0x1a10
+	.4byte	.LLST68
+	.uleb128 0x39
+	.8byte	.LBB128
+	.8byte	.LBE128-.LBB128
+	.uleb128 0x34
+	.4byte	0x1a26
+	.uleb128 0x35
+	.4byte	0x1a31
+	.4byte	.LLST69
+	.uleb128 0x35
+	.4byte	0x1a3c
+	.4byte	.LLST70
+	.uleb128 0x35
+	.4byte	0x1a47
+	.4byte	.LLST71
+	.uleb128 0x35
+	.4byte	0x1a52
+	.4byte	.LLST72
+	.uleb128 0x35
+	.4byte	0x1a5d
+	.4byte	.LLST73
+	.byte	0
+	.byte	0
+	.uleb128 0x3a
+	.8byte	.LVL128
+	.4byte	0x1bc2
+	.4byte	0x149a
+	.uleb128 0x38
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
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+	.uleb128 0x1
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+	.uleb128 0x1
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+	.byte	0
+	.uleb128 0x31
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+	.uleb128 0x3a
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+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x38
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x37
+	.8byte	.LVL137
+	.4byte	0x1af6
+	.uleb128 0x38
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x84
+	.sleb128 0
+	.byte	0x36
+	.byte	0x24
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x2f
+	.4byte	0x18ac
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+	.8byte	.LBE130-.LBB130
+	.byte	0x1
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+	.uleb128 0x30
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+	.uleb128 0x30
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+	.8byte	.LBE131-.LBB131
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+	.uleb128 0x35
+	.4byte	0x18ed
+	.4byte	.LLST78
+	.uleb128 0x3a
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+	.uleb128 0x38
+	.uleb128 0x1
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+	.uleb128 0x1
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+	.byte	0
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+	.uleb128 0x38
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x84
+	.sleb128 0
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+	.byte	0x24
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x2f
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+	.uleb128 0x1
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+	.uleb128 0x1
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+	.uleb128 0x2
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+	.sleb128 0
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+	.byte	0
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+	.uleb128 0x1
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+	.uleb128 0x2b
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+	.uleb128 0x2c
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+	.4byte	0x147
+	.4byte	.LLST22
+	.uleb128 0x3c
+	.string	"ret"
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+	.2byte	0x19a
+	.4byte	0x59
+	.uleb128 0x2e
+	.string	"wf"
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+	.4byte	0x10b0
+	.4byte	.LLST23
+	.uleb128 0x2f
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+	.8byte	.LBB51
+	.8byte	.LBE51-.LBB51
+	.byte	0x1
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+	.uleb128 0x30
+	.4byte	0x1d70
+	.4byte	.LLST24
+	.uleb128 0x3a
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+	.uleb128 0x2
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+	.sleb128 4
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+	.uleb128 0x1
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+	.uleb128 0x9
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+	.uleb128 0x1
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+	.uleb128 0x3e
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+	.uleb128 0x33
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+	.4byte	.LLST31
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+	.uleb128 0x1
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+	.uleb128 0x2
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+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x31
+	.8byte	.LVL56
+	.4byte	0x1e63
+	.uleb128 0x37
+	.8byte	.LVL76
+	.4byte	0x1e63
+	.uleb128 0x38
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC5
+	.uleb128 0x38
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 20
+	.byte	0
+	.byte	0
+	.uleb128 0x3f
+	.4byte	.LASF350
+	.byte	0x1
+	.2byte	0x17e
+	.4byte	0x59
+	.byte	0x1
+	.4byte	0x1852
+	.uleb128 0x40
+	.4byte	.LASF340
+	.byte	0x1
+	.2byte	0x17e
+	.4byte	0xf34
+	.uleb128 0x40
+	.4byte	.LASF348
+	.byte	0x1
+	.2byte	0x17e
+	.4byte	0x59
+	.uleb128 0x41
+	.4byte	.LASF349
+	.byte	0x1
+	.2byte	0x180
+	.4byte	0x4df
+	.uleb128 0x41
+	.4byte	.LASF307
+	.byte	0x1
+	.2byte	0x181
+	.4byte	0x84
+	.uleb128 0x41
+	.4byte	.LASF318
+	.byte	0x1
+	.2byte	0x182
+	.4byte	0x84
+	.byte	0
+	.uleb128 0x3f
+	.4byte	.LASF351
+	.byte	0x1
+	.2byte	0x155
+	.4byte	0x59
+	.byte	0x1
+	.4byte	0x18ac
+	.uleb128 0x40
+	.4byte	.LASF340
+	.byte	0x1
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+	.4byte	0xf34
+	.uleb128 0x40
+	.4byte	.LASF348
+	.byte	0x1
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+	.4byte	0x59
+	.uleb128 0x41
+	.4byte	.LASF352
+	.byte	0x1
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+	.4byte	0xf09
+	.uleb128 0x41
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+	.byte	0x1
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+	.4byte	0x4df
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+	.4byte	.LASF307
+	.byte	0x1
+	.2byte	0x159
+	.4byte	0x84
+	.uleb128 0x41
+	.4byte	.LASF318
+	.byte	0x1
+	.2byte	0x15a
+	.4byte	0x84
+	.byte	0
+	.uleb128 0x3f
+	.4byte	.LASF353
+	.byte	0x1
+	.2byte	0x140
+	.4byte	0x59
+	.byte	0x1
+	.4byte	0x18fa
+	.uleb128 0x40
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+	.byte	0x1
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+	.4byte	0xf34
+	.uleb128 0x40
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+	.byte	0x1
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+	.4byte	0x59
+	.uleb128 0x41
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+	.byte	0x1
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+	.4byte	0x4df
+	.uleb128 0x41
+	.4byte	.LASF307
+	.byte	0x1
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+	.4byte	0x84
+	.uleb128 0x41
+	.4byte	.LASF318
+	.byte	0x1
+	.2byte	0x144
+	.4byte	0x84
+	.byte	0
+	.uleb128 0x42
+	.4byte	.LASF361
+	.byte	0x1
+	.2byte	0x12b
+	.4byte	0x59
+	.8byte	.LFB225
+	.8byte	.LFE225-.LFB225
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x19aa
+	.uleb128 0x2c
+	.4byte	.LASF340
+	.byte	0x1
+	.2byte	0x12b
+	.4byte	0xf34
+	.4byte	.LLST16
+	.uleb128 0x2c
+	.4byte	.LASF348
+	.byte	0x1
+	.2byte	0x12b
+	.4byte	0x59
+	.4byte	.LLST17
+	.uleb128 0x2c
+	.4byte	.LASF341
+	.byte	0x1
+	.2byte	0x12b
+	.4byte	0xf3a
+	.4byte	.LLST18
+	.uleb128 0x43
+	.4byte	.LASF349
+	.byte	0x1
+	.2byte	0x12d
+	.4byte	0x4df
+	.4byte	.LLST19
+	.uleb128 0x43
+	.4byte	.LASF307
+	.byte	0x1
+	.2byte	0x12e
+	.4byte	0x84
+	.4byte	.LLST20
+	.uleb128 0x43
+	.4byte	.LASF318
+	.byte	0x1
+	.2byte	0x12f
+	.4byte	0x84
+	.4byte	.LLST21
+	.uleb128 0x3a
+	.8byte	.LVL45
+	.4byte	0x1bc2
+	.4byte	0x199c
+	.uleb128 0x38
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x38
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0
+	.uleb128 0x31
+	.8byte	.LVL49
+	.4byte	0x1af6
+	.byte	0
+	.uleb128 0x3f
+	.4byte	.LASF354
+	.byte	0x1
+	.2byte	0x10c
+	.4byte	0x59
+	.byte	0x1
+	.4byte	0x1a04
+	.uleb128 0x40
+	.4byte	.LASF340
+	.byte	0x1
+	.2byte	0x10c
+	.4byte	0xf34
+	.uleb128 0x40
+	.4byte	.LASF348
+	.byte	0x1
+	.2byte	0x10c
+	.4byte	0x59
+	.uleb128 0x41
+	.4byte	.LASF352
+	.byte	0x1
+	.2byte	0x10e
+	.4byte	0xf09
+	.uleb128 0x41
+	.4byte	.LASF349
+	.byte	0x1
+	.2byte	0x10f
+	.4byte	0x4df
+	.uleb128 0x41
+	.4byte	.LASF307
+	.byte	0x1
+	.2byte	0x110
+	.4byte	0x84
+	.uleb128 0x41
+	.4byte	.LASF318
+	.byte	0x1
+	.2byte	0x111
+	.4byte	0x84
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LASF384
+	.byte	0x1
+	.byte	0xf3
+	.byte	0x1
+	.4byte	0x1a67
+	.uleb128 0x45
+	.4byte	.LASF352
+	.byte	0x1
+	.byte	0xf3
+	.4byte	0xf34
+	.uleb128 0x45
+	.4byte	.LASF340
+	.byte	0x1
+	.byte	0xf4
+	.4byte	0xf34
+	.uleb128 0x46
+	.4byte	.LASF355
+	.byte	0x1
+	.byte	0xf6
+	.4byte	0x59
+	.uleb128 0x46
+	.4byte	.LASF356
+	.byte	0x1
+	.byte	0xf7
+	.4byte	0xf2e
+	.uleb128 0x46
+	.4byte	.LASF357
+	.byte	0x1
+	.byte	0xf7
+	.4byte	0xf2e
+	.uleb128 0x46
+	.4byte	.LASF348
+	.byte	0x1
+	.byte	0xf8
+	.4byte	0x59
+	.uleb128 0x46
+	.4byte	.LASF358
+	.byte	0x1
+	.byte	0xf8
+	.4byte	0x59
+	.uleb128 0x47
+	.string	"i"
+	.byte	0x1
+	.byte	0xf9
+	.4byte	0x59
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LASF359
+	.byte	0x1
+	.byte	0xd3
+	.4byte	0xf2e
+	.byte	0x1
+	.4byte	0x1af6
+	.uleb128 0x45
+	.4byte	.LASF352
+	.byte	0x1
+	.byte	0xd3
+	.4byte	0xf34
+	.uleb128 0x46
+	.4byte	.LASF356
+	.byte	0x1
+	.byte	0xd5
+	.4byte	0xf2e
+	.uleb128 0x46
+	.4byte	.LASF357
+	.byte	0x1
+	.byte	0xd5
+	.4byte	0xf2e
+	.uleb128 0x47
+	.string	"i"
+	.byte	0x1
+	.byte	0xd6
+	.4byte	0x59
+	.uleb128 0x47
+	.string	"j"
+	.byte	0x1
+	.byte	0xd6
+	.4byte	0x59
+	.uleb128 0x47
+	.string	"k"
+	.byte	0x1
+	.byte	0xd6
+	.4byte	0x59
+	.uleb128 0x47
+	.string	"h"
+	.byte	0x1
+	.byte	0xd6
+	.4byte	0x59
+	.uleb128 0x46
+	.4byte	.LASF360
+	.byte	0x1
+	.byte	0xd7
+	.4byte	0x59
+	.uleb128 0x47
+	.string	"num"
+	.byte	0x1
+	.byte	0xd8
+	.4byte	0x59
+	.uleb128 0x47
+	.string	"len"
+	.byte	0x1
+	.byte	0xd9
+	.4byte	0x59
+	.uleb128 0x49
+	.uleb128 0x46
+	.4byte	.LASF348
+	.byte	0x1
+	.byte	0xe5
+	.4byte	0x59
+	.uleb128 0x46
+	.4byte	.LASF358
+	.byte	0x1
+	.byte	0xe6
+	.4byte	0x59
+	.byte	0
+	.byte	0
+	.uleb128 0x4a
+	.4byte	.LASF362
+	.byte	0x1
+	.byte	0xc5
+	.4byte	0xf2e
+	.8byte	.LFB221
+	.8byte	.LFE221-.LFB221
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x1ba6
+	.uleb128 0x4b
+	.4byte	.LASF349
+	.byte	0x1
+	.byte	0xc5
+	.4byte	0x4df
+	.4byte	.LLST12
+	.uleb128 0x4b
+	.4byte	.LASF318
+	.byte	0x1
+	.byte	0xc6
+	.4byte	0x84
+	.4byte	.LLST13
+	.uleb128 0x47
+	.string	"out"
+	.byte	0x1
+	.byte	0xc8
+	.4byte	0x4e5
+	.uleb128 0x3d
+	.4byte	0x1e1a
+	.8byte	.LBB39
+	.4byte	.Ldebug_ranges0+0x90
+	.byte	0x1
+	.byte	0xca
+	.4byte	0x1b85
+	.uleb128 0x30
+	.4byte	0x1e35
+	.4byte	.LLST14
+	.uleb128 0x30
+	.4byte	0x1e2a
+	.4byte	.LLST15
+	.uleb128 0x37
+	.8byte	.LVL37
+	.4byte	0x1e4d
+	.uleb128 0x38
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x38
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x8000
+	.byte	0
+	.byte	0
+	.uleb128 0x37
+	.8byte	.LVL39
+	.4byte	0x1e7a
+	.uleb128 0x38
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x38
+	.uleb128 0x1
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+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 4
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+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LASF363
+	.byte	0x1
+	.byte	0xc0
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+	.byte	0x3
+	.4byte	0x1bc2
+	.uleb128 0x45
+	.4byte	.LASF349
+	.byte	0x1
+	.byte	0xc0
+	.4byte	0x4df
+	.byte	0
+	.uleb128 0x4a
+	.4byte	.LASF364
+	.byte	0x1
+	.byte	0x8f
+	.4byte	0x4df
+	.8byte	.LFB219
+	.8byte	.LFE219-.LFB219
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x1cbf
+	.uleb128 0x4b
+	.4byte	.LASF348
+	.byte	0x1
+	.byte	0x8f
+	.4byte	0x59
+	.4byte	.LLST0
+	.uleb128 0x4b
+	.4byte	.LASF365
+	.byte	0x1
+	.byte	0x8f
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+	.4byte	.LLST1
+	.uleb128 0x2a
+	.4byte	.LASF366
+	.byte	0x1
+	.byte	0x91
+	.4byte	0x10b0
+	.uleb128 0x1
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+	.uleb128 0x4c
+	.4byte	.LASF367
+	.byte	0x1
+	.byte	0x92
+	.4byte	0xf2e
+	.4byte	.LLST2
+	.uleb128 0x4c
+	.4byte	.LASF368
+	.byte	0x1
+	.byte	0x93
+	.4byte	0xff
+	.4byte	.LLST3
+	.uleb128 0x4c
+	.4byte	.LASF369
+	.byte	0x1
+	.byte	0x94
+	.4byte	0x84
+	.4byte	.LLST4
+	.uleb128 0x4d
+	.string	"pt"
+	.byte	0x1
+	.byte	0x95
+	.4byte	0x84
+	.4byte	.LLST5
+	.uleb128 0x46
+	.4byte	.LASF349
+	.byte	0x1
+	.byte	0x96
+	.4byte	0x147
+	.uleb128 0x4e
+	.4byte	0x1cbf
+	.8byte	.LBB31
+	.4byte	.Ldebug_ranges0+0
+	.byte	0x1
+	.byte	0xb9
+	.uleb128 0x30
+	.4byte	0x1cda
+	.4byte	.LLST6
+	.uleb128 0x30
+	.4byte	0x1ccf
+	.4byte	.LLST7
+	.uleb128 0x33
+	.4byte	.Ldebug_ranges0+0
+	.uleb128 0x35
+	.4byte	0x1ce5
+	.4byte	.LLST8
+	.uleb128 0x35
+	.4byte	0x1cf0
+	.4byte	.LLST9
+	.uleb128 0x4f
+	.4byte	.Ldebug_ranges0+0x30
+	.4byte	0x1ca4
+	.uleb128 0x34
+	.4byte	0x1cfe
+	.uleb128 0x34
+	.4byte	0x1d09
+	.byte	0
+	.uleb128 0x33
+	.4byte	.Ldebug_ranges0+0x60
+	.uleb128 0x35
+	.4byte	0x1d16
+	.4byte	.LLST10
+	.uleb128 0x35
+	.4byte	0x1d21
+	.4byte	.LLST11
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LASF370
+	.byte	0x1
+	.byte	0x7a
+	.4byte	0x59
+	.byte	0x1
+	.4byte	0x1d2e
+	.uleb128 0x45
+	.4byte	.LASF367
+	.byte	0x1
+	.byte	0x7a
+	.4byte	0xff
+	.uleb128 0x45
+	.4byte	.LASF348
+	.byte	0x1
+	.byte	0x7a
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+	.uleb128 0x46
+	.4byte	.LASF371
+	.byte	0x1
+	.byte	0x7c
+	.4byte	0x59
+	.uleb128 0x47
+	.string	"i"
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+	.byte	0x7d
+	.4byte	0x59
+	.uleb128 0x50
+	.4byte	0x1d15
+	.uleb128 0x46
+	.4byte	.LASF372
+	.byte	0x1
+	.byte	0x7f
+	.4byte	0x59
+	.uleb128 0x46
+	.4byte	.LASF373
+	.byte	0x1
+	.byte	0x7f
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+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x46
+	.4byte	.LASF374
+	.byte	0x1
+	.byte	0x80
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+	.uleb128 0x46
+	.4byte	.LASF375
+	.byte	0x1
+	.byte	0x80
+	.4byte	0x59
+	.byte	0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LASF376
+	.byte	0x1
+	.byte	0x66
+	.4byte	0x59
+	.byte	0x1
+	.4byte	0x1d60
+	.uleb128 0x45
+	.4byte	.LASF366
+	.byte	0x1
+	.byte	0x66
+	.4byte	0x10b0
+	.uleb128 0x46
+	.4byte	.LASF377
+	.byte	0x1
+	.byte	0x68
+	.4byte	0xa8
+	.uleb128 0x46
+	.4byte	.LASF378
+	.byte	0x1
+	.byte	0x69
+	.4byte	0xa8
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LASF379
+	.byte	0x1
+	.byte	0x5c
+	.4byte	0x59
+	.byte	0x1
+	.4byte	0x1d7c
+	.uleb128 0x51
+	.string	"buf"
+	.byte	0x1
+	.byte	0x5c
+	.4byte	0xff
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LASF380
+	.byte	0x1
+	.byte	0x4f
+	.4byte	0x84
+	.byte	0x1
+	.4byte	0x1db7
+	.uleb128 0x45
+	.4byte	.LASF381
+	.byte	0x1
+	.byte	0x4f
+	.4byte	0x4e5
+	.uleb128 0x45
+	.4byte	.LASF382
+	.byte	0x1
+	.byte	0x4f
+	.4byte	0x84
+	.uleb128 0x47
+	.string	"i"
+	.byte	0x1
+	.byte	0x51
+	.4byte	0x84
+	.uleb128 0x46
+	.4byte	.LASF383
+	.byte	0x1
+	.byte	0x52
+	.4byte	0x84
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LASF385
+	.byte	0x1
+	.byte	0x3b
+	.byte	0x1
+	.4byte	0x1e02
+	.uleb128 0x45
+	.4byte	.LASF386
+	.byte	0x1
+	.byte	0x3b
+	.4byte	0x84
+	.uleb128 0x45
+	.4byte	.LASF387
+	.byte	0x1
+	.byte	0x3b
+	.4byte	0xf2e
+	.uleb128 0x47
+	.string	"i"
+	.byte	0x1
+	.byte	0x3d
+	.4byte	0x84
+	.uleb128 0x47
+	.string	"j"
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+	.byte	0x3d
+	.4byte	0x84
+	.uleb128 0x46
+	.4byte	.LASF388
+	.byte	0x1
+	.byte	0x3e
+	.4byte	0x84
+	.uleb128 0x46
+	.4byte	.LASF383
+	.byte	0x1
+	.byte	0x3f
+	.4byte	0x84
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LASF389
+	.byte	0x2
+	.byte	0x4f
+	.byte	0x3
+	.4byte	0x1e1a
+	.uleb128 0x45
+	.4byte	.LASF390
+	.byte	0x2
+	.byte	0x4f
+	.4byte	0x18a
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LASF391
+	.byte	0x2
+	.byte	0x38
+	.4byte	0x147
+	.byte	0x3
+	.4byte	0x1e41
+	.uleb128 0x45
+	.4byte	.LASF33
+	.byte	0x2
+	.byte	0x38
+	.4byte	0x105
+	.uleb128 0x45
+	.4byte	.LASF392
+	.byte	0x2
+	.byte	0x38
+	.4byte	0x13c
+	.byte	0
+	.uleb128 0x52
+	.4byte	.LASF393
+	.4byte	.LASF393
+	.byte	0x16
+	.2byte	0x399
+	.uleb128 0x53
+	.4byte	.LASF394
+	.4byte	.LASF394
+	.byte	0x2
+	.byte	0x36
+	.uleb128 0x53
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+	.byte	0
+	.byte	0
+	.uleb128 0x3d
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x52
+	.uleb128 0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x3e
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x20
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x40
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x41
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x42
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x43
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x20
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x47
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x48
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x20
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0xb
+	.byte	0x1
+	.byte	0
+	.byte	0
+	.uleb128 0x4a
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x4b
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x4c
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x4d
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x4e
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x52
+	.uleb128 0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x4f
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x50
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x51
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x52
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x53
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.byte	0
+	.section	.debug_loc,"",@progbits
+.Ldebug_loc0:
+.LLST35:
+	.8byte	.LVL77
+	.8byte	.LVL78
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL78
+	.8byte	.LVL116
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL116
+	.8byte	.LVL117
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL117
+	.8byte	.LVL125
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL125
+	.8byte	.LVL126
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL126
+	.8byte	.LVL156
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL156
+	.8byte	.LVL157
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL157
+	.8byte	.LVL158
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL158
+	.8byte	.LVL159
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL159
+	.8byte	.LFE231
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST36:
+	.8byte	.LVL77
+	.8byte	.LVL80-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL80-1
+	.8byte	.LVL81
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL81
+	.8byte	.LVL88
+	.2byte	0x3
+	.byte	0x85
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL88
+	.8byte	.LVL114
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL118
+	.8byte	.LVL119
+	.2byte	0x3
+	.byte	0x85
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL119
+	.8byte	.LVL120
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL120
+	.8byte	.LVL125
+	.2byte	0x3
+	.byte	0x85
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL125
+	.8byte	.LVL126
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL126
+	.8byte	.LVL140
+	.2byte	0x3
+	.byte	0x85
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL140
+	.8byte	.LVL150
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL150
+	.8byte	.LVL156
+	.2byte	0x3
+	.byte	0x85
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL156
+	.8byte	.LFE231
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST37:
+	.8byte	.LVL77
+	.8byte	.LVL80-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL80-1
+	.8byte	.LVL156
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	.LVL156
+	.8byte	.LFE231
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST38:
+	.8byte	.LVL115
+	.8byte	.LVL116
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST39:
+	.8byte	.LVL79
+	.8byte	.LVL80-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST40:
+	.8byte	.LVL82
+	.8byte	.LVL83-1
+	.2byte	0x9
+	.byte	0x3
+	.8byte	sftemp.6124
+	.8byte	0
+	.8byte	0
+.LLST41:
+	.8byte	.LVL82
+	.8byte	.LVL95
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL96
+	.8byte	.LVL112
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST42:
+	.8byte	.LVL83
+	.8byte	.LVL87-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST43:
+	.8byte	.LVL84
+	.8byte	.LVL95
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL96
+	.8byte	.LVL112
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST44:
+	.8byte	.LVL85
+	.8byte	.LVL86
+	.2byte	0x5
+	.byte	0x84
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x9f
+	.8byte	.LVL86
+	.8byte	.LVL87-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL87-1
+	.8byte	.LVL95
+	.2byte	0x5
+	.byte	0x84
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x9f
+	.8byte	.LVL96
+	.8byte	.LVL112
+	.2byte	0x5
+	.byte	0x84
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST45:
+	.8byte	.LVL89
+	.8byte	.LVL93
+	.2byte	0x6
+	.byte	0xf2
+	.4byte	.Ldebug_info0+4555
+	.sleb128 0
+	.8byte	.LVL96
+	.8byte	.LVL111
+	.2byte	0x6
+	.byte	0xf2
+	.4byte	.Ldebug_info0+4555
+	.sleb128 0
+	.8byte	0
+	.8byte	0
+.LLST46:
+	.8byte	.LVL89
+	.8byte	.LVL90
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL90
+	.8byte	.LVL92
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL92
+	.8byte	.LVL93
+	.2byte	0x8
+	.byte	0x72
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x85
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.8byte	.LVL96
+	.8byte	.LVL109
+	.2byte	0x8
+	.byte	0x72
+	.sleb128 1
+	.byte	0x32
+	.byte	0x24
+	.byte	0x85
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.8byte	.LVL109
+	.8byte	.LVL110
+	.2byte	0x8
+	.byte	0x72
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x85
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.8byte	.LVL110
+	.8byte	.LVL111
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST47:
+	.8byte	.LVL92
+	.8byte	.LVL93
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL96
+	.8byte	.LVL108
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL108
+	.8byte	.LVL109
+	.2byte	0x3
+	.byte	0x72
+	.sleb128 1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST48:
+	.8byte	.LVL97
+	.8byte	.LVL98
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL98
+	.8byte	.LVL106
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL106
+	.8byte	.LVL107
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST49:
+	.8byte	.LVL99
+	.8byte	.LVL100
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST50:
+	.8byte	.LVL103
+	.8byte	.LVL104
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL104
+	.8byte	.LVL105
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST51:
+	.8byte	.LVL97
+	.8byte	.LVL110
+	.2byte	0x1
+	.byte	0x57
+	.8byte	0
+	.8byte	0
+.LLST52:
+	.8byte	.LVL89
+	.8byte	.LVL92
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL92
+	.8byte	.LVL93
+	.2byte	0x5
+	.byte	0x72
+	.sleb128 0
+	.byte	0x38
+	.byte	0x24
+	.byte	0x9f
+	.8byte	.LVL96
+	.8byte	.LVL98
+	.2byte	0x5
+	.byte	0x72
+	.sleb128 0
+	.byte	0x38
+	.byte	0x24
+	.byte	0x9f
+	.8byte	.LVL98
+	.8byte	.LVL103
+	.2byte	0xa
+	.byte	0x73
+	.sleb128 0
+	.byte	0x34
+	.byte	0x24
+	.byte	0x72
+	.sleb128 0
+	.byte	0x38
+	.byte	0x24
+	.byte	0x22
+	.byte	0x9f
+	.8byte	.LVL103
+	.8byte	.LVL104
+	.2byte	0xd
+	.byte	0x73
+	.sleb128 0
+	.byte	0x34
+	.byte	0x24
+	.byte	0x72
+	.sleb128 0
+	.byte	0x38
+	.byte	0x24
+	.byte	0x22
+	.byte	0x71
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.8byte	.LVL104
+	.8byte	.LVL105
+	.2byte	0xf
+	.byte	0x73
+	.sleb128 0
+	.byte	0x34
+	.byte	0x24
+	.byte	0x72
+	.sleb128 0
+	.byte	0x38
+	.byte	0x24
+	.byte	0x22
+	.byte	0x71
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x9f
+	.8byte	.LVL106
+	.8byte	.LVL107
+	.2byte	0xc
+	.byte	0x73
+	.sleb128 0
+	.byte	0x34
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+	.8byte	.LVL89
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+	.8byte	.LVL89
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+	.8byte	.LVL89
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+	.8byte	.LVL99
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+	.2byte	0xd
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+	.8byte	.LVL99
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+	.8byte	.LVL94
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+	.8byte	.LVL111
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+	.8byte	.LVL127
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+	.8byte	.LVL127
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+	.8byte	.LVL128
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+	.8byte	.LVL129
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+	.8byte	.LVL130
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+	.8byte	.LVL112
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+	.8byte	.LVL133
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+	.8byte	.LVL138
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+	.8byte	.LVL138
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+	.2byte	0x6
+	.byte	0xf2
+	.4byte	.Ldebug_info0+5009
+	.sleb128 0
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+	.8byte	.LVL138
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+	.8byte	.LVL138
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+	.8byte	.LVL143
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+	.8byte	.LVL144
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+	.8byte	.LVL138
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+	.8byte	.LVL120
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+	.8byte	.LVL120
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+	.8byte	.LVL121
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+	.8byte	.LVL122
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+	.8byte	.LVL122
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+	.8byte	.LVL150
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+	.8byte	.LVL150
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+	.8byte	.LVL151
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+	.8byte	.LVL152
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+	.8byte	.LVL153
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+	.8byte	.LVL51
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+	.8byte	.LVL52
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+	.8byte	.LVL42
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+	.8byte	.LVL46
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+	.byte	0x51
+	.8byte	.LVL48
+	.8byte	.LVL49-1
+	.2byte	0x2
+	.byte	0x83
+	.sleb128 0
+	.8byte	0
+	.8byte	0
+.LLST21:
+	.8byte	.LVL47
+	.8byte	.LVL48
+	.2byte	0x5
+	.byte	0x71
+	.sleb128 0
+	.byte	0x36
+	.byte	0x24
+	.byte	0x9f
+	.8byte	.LVL48
+	.8byte	.LVL49-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST12:
+	.8byte	.LVL33
+	.8byte	.LVL36
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL36
+	.8byte	.LVL40
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL40
+	.8byte	.LFE221
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST13:
+	.8byte	.LVL33
+	.8byte	.LVL35
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL35
+	.8byte	.LVL41
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL41
+	.8byte	.LFE221
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST14:
+	.8byte	.LVL34
+	.8byte	.LVL38
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST15:
+	.8byte	.LVL34
+	.8byte	.LVL38
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST0:
+	.8byte	.LVL0
+	.8byte	.LVL5
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL5
+	.8byte	.LVL12
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL12
+	.8byte	.LVL30
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL30
+	.8byte	.LVL31
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL31
+	.8byte	.LVL32
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL32
+	.8byte	.LFE219
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST1:
+	.8byte	.LVL0
+	.8byte	.LVL2
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL2
+	.8byte	.LVL31
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL31
+	.8byte	.LFE219
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST2:
+	.8byte	.LVL4
+	.8byte	.LVL12
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL14
+	.8byte	.LVL15
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL17
+	.8byte	.LVL18
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL20
+	.8byte	.LVL21
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL23
+	.8byte	.LVL24
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL26
+	.8byte	.LVL27
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL29
+	.8byte	.LVL31
+	.2byte	0x1
+	.byte	0x53
+	.8byte	0
+	.8byte	0
+.LLST3:
+	.8byte	.LVL3
+	.8byte	.LVL12
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL13
+	.8byte	.LVL15
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL16
+	.8byte	.LVL18
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL19
+	.8byte	.LVL21
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL22
+	.8byte	.LVL24
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL25
+	.8byte	.LVL27
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL28
+	.8byte	.LVL31
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST4:
+	.8byte	.LVL11
+	.8byte	.LVL12
+	.2byte	0xd
+	.byte	0x75
+	.sleb128 0
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x32
+	.byte	0x24
+	.byte	0x73
+	.sleb128 0
+	.byte	0x22
+	.8byte	0
+	.8byte	0
+.LLST5:
+	.8byte	.LVL11
+	.8byte	.LVL12
+	.2byte	0x1
+	.byte	0x55
+	.8byte	0
+	.8byte	0
+.LLST6:
+	.8byte	.LVL4
+	.8byte	.LVL5
+	.2byte	0x13
+	.byte	0x70
+	.sleb128 0
+	.byte	0x12
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x30
+	.byte	0x16
+	.byte	0x14
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x2b
+	.byte	0x28
+	.2byte	0x1
+	.byte	0x16
+	.byte	0x13
+	.byte	0x9f
+	.8byte	.LVL5
+	.8byte	.LVL6
+	.2byte	0x14
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x12
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x30
+	.byte	0x16
+	.byte	0x14
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x2b
+	.byte	0x28
+	.2byte	0x1
+	.byte	0x16
+	.byte	0x13
+	.byte	0x9f
+	.8byte	.LVL6
+	.8byte	.LVL11
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL30
+	.8byte	.LVL31
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST7:
+	.8byte	.LVL4
+	.8byte	.LVL11
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL30
+	.8byte	.LVL31
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST8:
+	.8byte	.LVL4
+	.8byte	.LVL7
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL7
+	.8byte	.LVL8
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL9
+	.8byte	.LVL11
+	.2byte	0x1
+	.byte	0x55
+	.8byte	0
+	.8byte	0
+.LLST9:
+	.8byte	.LVL6
+	.8byte	.LVL7
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL7
+	.8byte	.LVL9
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL9
+	.8byte	.LVL10
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL30
+	.8byte	.LVL31
+	.2byte	0x1
+	.byte	0x54
+	.8byte	0
+	.8byte	0
+.LLST10:
+	.8byte	.LVL4
+	.8byte	.LVL5
+	.2byte	0x13
+	.byte	0x70
+	.sleb128 0
+	.byte	0x12
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x30
+	.byte	0x16
+	.byte	0x14
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x2b
+	.byte	0x28
+	.2byte	0x1
+	.byte	0x16
+	.byte	0x13
+	.byte	0x9f
+	.8byte	.LVL5
+	.8byte	.LVL6
+	.2byte	0x14
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x12
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x30
+	.byte	0x16
+	.byte	0x14
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x2b
+	.byte	0x28
+	.2byte	0x1
+	.byte	0x16
+	.byte	0x13
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST11:
+	.8byte	.LVL4
+	.8byte	.LVL6
+	.2byte	0x3
+	.byte	0x8
+	.byte	0x31
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+	.section	.debug_aranges,"",@progbits
+	.4byte	0x7c
+	.2byte	0x2
+	.4byte	.Ldebug_info0
+	.byte	0x8
+	.byte	0
+	.2byte	0
+	.2byte	0
+	.8byte	.LFB219
+	.8byte	.LFE219-.LFB219
+	.8byte	.LFB221
+	.8byte	.LFE221-.LFB221
+	.8byte	.LFB225
+	.8byte	.LFE225-.LFB225
+	.8byte	.LFB229
+	.8byte	.LFE229-.LFB229
+	.8byte	.LFB230
+	.8byte	.LFE230-.LFB230
+	.8byte	.LFB231
+	.8byte	.LFE231-.LFB231
+	.8byte	0
+	.8byte	0
+	.section	.debug_ranges,"",@progbits
+.Ldebug_ranges0:
+	.8byte	.LBB31
+	.8byte	.LBE31
+	.8byte	.LBB38
+	.8byte	.LBE38
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB33
+	.8byte	.LBE33
+	.8byte	.LBB35
+	.8byte	.LBE35
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB34
+	.8byte	.LBE34
+	.8byte	.LBB36
+	.8byte	.LBE36
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB39
+	.8byte	.LBE39
+	.8byte	.LBB42
+	.8byte	.LBE42
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB53
+	.8byte	.LBE53
+	.8byte	.LBB70
+	.8byte	.LBE70
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB55
+	.8byte	.LBE55
+	.8byte	.LBB67
+	.8byte	.LBE67
+	.8byte	.LBB68
+	.8byte	.LBE68
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB57
+	.8byte	.LBE57
+	.8byte	.LBB62
+	.8byte	.LBE62
+	.8byte	.LBB63
+	.8byte	.LBE63
+	.8byte	.LBB64
+	.8byte	.LBE64
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB106
+	.8byte	.LBE106
+	.8byte	.LBB120
+	.8byte	.LBE120
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB108
+	.8byte	.LBE108
+	.8byte	.LBB116
+	.8byte	.LBE116
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB121
+	.8byte	.LBE121
+	.8byte	.LBB132
+	.8byte	.LBE132
+	.8byte	0
+	.8byte	0
+	.8byte	.LFB219
+	.8byte	.LFE219
+	.8byte	.LFB221
+	.8byte	.LFE221
+	.8byte	.LFB225
+	.8byte	.LFE225
+	.8byte	.LFB229
+	.8byte	.LFE229
+	.8byte	.LFB230
+	.8byte	.LFE230
+	.8byte	.LFB231
+	.8byte	.LFE231
+	.8byte	0
+	.8byte	0
+	.section	.debug_line,"",@progbits
+.Ldebug_line0:
+	.section	.debug_str,"MS",@progbits,1
+.LASF377:
+	.string	"crccheck"
+.LASF371:
+	.string	"level"
+.LASF82:
+	.string	"off_mem_rsvmap"
+.LASF165:
+	.string	"UCLASS_I2C_EEPROM"
+.LASF328:
+	.string	"gld16_temp_list"
+.LASF17:
+	.string	"size_t"
+.LASF170:
+	.string	"UCLASS_IRQ"
+.LASF132:
+	.string	"initrd_start"
+.LASF164:
+	.string	"UCLASS_I2C"
+.LASF13:
+	.string	"sizetype"
+.LASF261:
+	.string	"net_hostname"
+.LASF256:
+	.string	"push_packet"
+.LASF36:
+	.string	"start"
+.LASF204:
+	.string	"UCLASS_SPI"
+.LASF168:
+	.string	"UCLASS_I2S"
+.LASF283:
+	.string	"NETLOOP_RESTART"
+.LASF166:
+	.string	"UCLASS_I2C_GENERIC"
+.LASF178:
+	.string	"UCLASS_MOD_EXP"
+.LASF227:
+	.string	"UCLASS_IO_DOMAIN"
+.LASF300:
+	.string	"WF_TYPE_GL16"
+.LASF199:
+	.string	"UCLASS_RKNAND"
+.LASF141:
+	.string	"UCLASS_DEMO"
+.LASF333:
+	.string	"gl16_list"
+.LASF90:
+	.string	"ih_magic"
+.LASF330:
+	.string	"a2_temp_list"
+.LASF145:
+	.string	"UCLASS_TEST_PROBE"
+.LASF223:
+	.string	"UCLASS_KEY"
+.LASF62:
+	.string	"bi_intfreq"
+.LASF11:
+	.string	"phys_addr_t"
+.LASF218:
+	.string	"UCLASS_VIDEO_BRIDGE"
+.LASF5:
+	.string	"__u8"
+.LASF214:
+	.string	"UCLASS_USB_DEV_GENERIC"
+.LASF369:
+	.string	"wf_offset"
+.LASF282:
+	.string	"NETLOOP_CONTINUE"
+.LASF207:
+	.string	"UCLASS_SPI_GENERIC"
+.LASF38:
+	.string	"flash_info_t"
+.LASF183:
+	.string	"UCLASS_PANEL"
+.LASF107:
+	.string	"comp"
+.LASF102:
+	.string	"image_header_t"
+.LASF137:
+	.string	"state"
+.LASF158:
+	.string	"UCLASS_CROS_EC"
+.LASF56:
+	.string	"bi_dsp_freq"
+.LASF104:
+	.string	"image_start"
+.LASF143:
+	.string	"UCLASS_TEST_FDT"
+.LASF47:
+	.string	"bd_info"
+.LASF353:
+	.string	"parse_wf_gray2"
+.LASF280:
+	.string	"uclass_id"
+.LASF94:
+	.string	"ih_load"
+.LASF238:
+	.string	"__dtb_dt_spl_begin"
+.LASF350:
+	.string	"parse_wf_a2"
+.LASF7:
+	.string	"__u32"
+.LASF148:
+	.string	"UCLASS_PCI_EMUL"
+.LASF306:
+	.string	"epd_lut_data"
+.LASF267:
+	.string	"net_tx_packet"
+.LASF222:
+	.string	"UCLASS_FG"
+.LASF266:
+	.string	"net_server_ip"
+.LASF361:
+	.string	"parse_wf_gray16"
+.LASF274:
+	.string	"net_native_vlan"
+.LASF220:
+	.string	"UCLASS_VIDEO_CRTC"
+.LASF293:
+	.string	"WF_TYPE_RESET"
+.LASF157:
+	.string	"UCLASS_CODEC"
+.LASF399:
+	.ascii	"GNU C11 6.3.1 20170404 -ms"
+	.string	"trict-align -march=armv8-a+nosimd -mlittle-endian -mabi=lp64 -g -Os -fno-builtin -ffreestanding -fshort-wchar -fno-stack-protector -fno-delete-null-pointer-checks -fstack-usage -fno-pic -ffunction-sections -fdata-sections -ffixed-r9 -fno-common -ffixed-x18"
+.LASF23:
+	.string	"errno"
+.LASF312:
+	.string	"RKF_WF_GC16"
+.LASF15:
+	.string	"long int"
+.LASF51:
+	.string	"bi_flashsize"
+.LASF188:
+	.string	"UCLASS_PHY"
+.LASF75:
+	.string	"IRQ_STACK_START_IN"
+.LASF86:
+	.string	"size_dt_strings"
+.LASF217:
+	.string	"UCLASS_VIDEO"
+.LASF277:
+	.string	"net_boot_file_size"
+.LASF320:
+	.string	"timeandday"
+.LASF359:
+	.string	"decode_wf_reset"
+.LASF96:
+	.string	"ih_dcrc"
+.LASF61:
+	.string	"bi_ethspeed"
+.LASF140:
+	.string	"UCLASS_ROOT"
+.LASF363:
+	.string	"get_wf_frm_num"
+.LASF29:
+	.string	"ide_bus_offset"
+.LASF264:
+	.string	"net_server_ethaddr"
+.LASF64:
+	.string	"bi_arch_number"
+.LASF3:
+	.string	"signed char"
+.LASF171:
+	.string	"UCLASS_KEYBOARD"
+.LASF20:
+	.string	"uint8_t"
+.LASF98:
+	.string	"ih_arch"
+.LASF79:
+	.string	"totalsize"
+.LASF91:
+	.string	"ih_hcrc"
+.LASF356:
+	.string	"idata"
+.LASF106:
+	.string	"load"
+.LASF299:
+	.string	"WF_TYPE_GC16"
+.LASF212:
+	.string	"UCLASS_TPM"
+.LASF41:
+	.string	"lmb_property"
+.LASF84:
+	.string	"last_comp_version"
+.LASF0:
+	.string	"unsigned char"
+.LASF66:
+	.string	"bi_andr_version"
+.LASF139:
+	.string	"images"
+.LASF254:
+	.string	"priv"
+.LASF226:
+	.string	"UCLASS_DVFS"
+.LASF57:
+	.string	"bi_ddr_freq"
+.LASF172:
+	.string	"UCLASS_LED"
+.LASF93:
+	.string	"ih_size"
+.LASF230:
+	.string	"UCLASS_MDIO"
+.LASF25:
+	.string	"_Bool"
+.LASF286:
+	.string	"net_state"
+.LASF167:
+	.string	"UCLASS_I2C_MUX"
+.LASF307:
+	.string	"frame_num"
+.LASF14:
+	.string	"char"
+.LASF27:
+	.string	"_binary_u_boot_bin_start"
+.LASF397:
+	.string	"memset"
+.LASF216:
+	.string	"UCLASS_USB_GADGET_GENERIC"
+.LASF284:
+	.string	"NETLOOP_SUCCESS"
+.LASF340:
+	.string	"output"
+.LASF349:
+	.string	"pbuf"
+.LASF290:
+	.string	"p_current"
+.LASF281:
+	.string	"net_loop_state"
+.LASF368:
+	.string	"templist"
+.LASF314:
+	.string	"RKF_WF_GLR16"
+.LASF245:
+	.string	"enetaddr"
+.LASF156:
+	.string	"UCLASS_AMP"
+.LASF194:
+	.string	"UCLASS_PWRSEQ"
+.LASF122:
+	.string	"fit_hdr_fdt"
+.LASF275:
+	.string	"net_restart_wrap"
+.LASF263:
+	.string	"net_ethaddr"
+.LASF375:
+	.string	"_min2"
+.LASF392:
+	.string	"flags"
+.LASF355:
+	.string	"gray"
+.LASF99:
+	.string	"ih_type"
+.LASF80:
+	.string	"off_dt_struct"
+.LASF52:
+	.string	"bi_flashoffset"
+.LASF276:
+	.string	"net_boot_file_name"
+.LASF376:
+	.string	"check_wf_crc"
+.LASF142:
+	.string	"UCLASS_TEST"
+.LASF92:
+	.string	"ih_time"
+.LASF370:
+	.string	"get_wf_level"
+.LASF195:
+	.string	"UCLASS_RAM"
+.LASF161:
+	.string	"UCLASS_ETH"
+.LASF103:
+	.string	"image_info"
+.LASF360:
+	.string	"temp_data"
+.LASF109:
+	.string	"arch"
+.LASF337:
+	.string	"a2_list"
+.LASF352:
+	.string	"input"
+.LASF348:
+	.string	"temp"
+.LASF31:
+	.string	"select_hwpart"
+.LASF268:
+	.string	"net_rx_packets"
+.LASF287:
+	.string	"mem_malloc_start"
+.LASF74:
+	.string	"_datarelro_start_ofs"
+.LASF19:
+	.string	"ulong"
+.LASF351:
+	.string	"parse_wf_auto"
+.LASF95:
+	.string	"ih_ep"
+.LASF43:
+	.string	"lmb_region"
+.LASF366:
+	.string	"waveform"
+.LASF396:
+	.string	"printf"
+.LASF117:
+	.string	"fit_uname_os"
+.LASF58:
+	.string	"bi_bootflags"
+.LASF265:
+	.string	"net_ip"
+.LASF259:
+	.string	"net_dns_server"
+.LASF279:
+	.string	"net_ping_ip"
+.LASF45:
+	.string	"memory"
+.LASF77:
+	.string	"fdt_header"
+.LASF288:
+	.string	"mem_malloc_end"
+.LASF174:
+	.string	"UCLASS_MAILBOX"
+.LASF129:
+	.string	"rd_end"
+.LASF345:
+	.string	"rkf_wf_get_lut"
+.LASF134:
+	.string	"cmdline_start"
+.LASF253:
+	.string	"index"
+.LASF342:
+	.string	"temperture"
+.LASF357:
+	.string	"odata"
+.LASF331:
+	.string	"reset_list"
+.LASF202:
+	.string	"UCLASS_SCSI"
+.LASF400:
+	.string	"drivers/video/rk_eink/epdlut/rkf_waveform.c"
+.LASF175:
+	.string	"UCLASS_MASS_STORAGE"
+.LASF1:
+	.string	"long unsigned int"
+.LASF150:
+	.string	"UCLASS_SIMPLE_BUS"
+.LASF310:
+	.string	"RKF_WF_RESET"
+.LASF319:
+	.string	"format"
+.LASF260:
+	.string	"net_nis_domain"
+.LASF295:
+	.string	"WF_TYPE_GRAY4"
+.LASF372:
+	.string	"_max1"
+.LASF373:
+	.string	"_max2"
+.LASF124:
+	.string	"fit_noffset_fdt"
+.LASF285:
+	.string	"NETLOOP_FAIL"
+.LASF221:
+	.string	"UCLASS_WDT"
+.LASF53:
+	.string	"bi_sramstart"
+.LASF28:
+	.string	"_binary_u_boot_bin_end"
+.LASF85:
+	.string	"boot_cpuid_phys"
+.LASF120:
+	.string	"fit_uname_rd"
+.LASF329:
+	.string	"du_temp_list"
+.LASF208:
+	.string	"UCLASS_SYSCON"
+.LASF115:
+	.string	"fit_uname_cfg"
+.LASF203:
+	.string	"UCLASS_SERIAL"
+.LASF273:
+	.string	"net_our_vlan"
+.LASF153:
+	.string	"UCLASS_BLK"
+.LASF110:
+	.string	"image_info_t"
+.LASF149:
+	.string	"UCLASS_USB_EMUL"
+.LASF394:
+	.string	"kmalloc"
+.LASF315:
+	.string	"RKF_WF_GLD16"
+.LASF187:
+	.string	"UCLASS_PCI_GENERIC"
+.LASF339:
+	.string	"crc32_table"
+.LASF105:
+	.string	"image_len"
+.LASF327:
+	.string	"glr16_temp_list"
+.LASF59:
+	.string	"bi_ip_addr"
+.LASF378:
+	.string	"readcrc"
+.LASF189:
+	.string	"UCLASS_PINCONFIG"
+.LASF248:
+	.string	"send"
+.LASF210:
+	.string	"UCLASS_THERMAL"
+.LASF113:
+	.string	"legacy_hdr_os_copy"
+.LASF9:
+	.string	"long long int"
+.LASF362:
+	.string	"decode_wf_data"
+.LASF301:
+	.string	"WF_TYPE_GLR16"
+.LASF24:
+	.string	"___strtok"
+.LASF278:
+	.string	"net_boot_file_expected_size_in_blocks"
+.LASF16:
+	.string	"__kernel_size_t"
+.LASF182:
+	.string	"UCLASS_NVME"
+.LASF111:
+	.string	"bootm_headers"
+.LASF37:
+	.string	"protect"
+.LASF213:
+	.string	"UCLASS_USB"
+.LASF224:
+	.string	"UCLASS_RC"
+.LASF159:
+	.string	"UCLASS_DISPLAY"
+.LASF272:
+	.string	"net_null_ethaddr"
+.LASF336:
+	.string	"du_list"
+.LASF225:
+	.string	"UCLASS_CHARGE_DISPLAY"
+.LASF239:
+	.string	"load_addr"
+.LASF116:
+	.string	"fit_hdr_os"
+.LASF383:
+	.string	"n_accum"
+.LASF72:
+	.string	"_datarelrolocal_start_ofs"
+.LASF8:
+	.string	"unsigned int"
+.LASF18:
+	.string	"ushort"
+.LASF244:
+	.string	"eth_device"
+.LASF358:
+	.string	"temp1"
+.LASF304:
+	.string	"WF_TYPE_GRAY32"
+.LASF191:
+	.string	"UCLASS_PMIC"
+.LASF112:
+	.string	"legacy_hdr_os"
+.LASF81:
+	.string	"off_dt_strings"
+.LASF236:
+	.string	"monitor_flash_len"
+.LASF176:
+	.string	"UCLASS_MISC"
+.LASF49:
+	.string	"bi_memsize"
+.LASF317:
+	.string	"rkf_waveform"
+.LASF338:
+	.string	"global_waveform"
+.LASF26:
+	.string	"image_base"
+.LASF388:
+	.string	"n_data"
+.LASF209:
+	.string	"UCLASS_SYSRESET"
+.LASF297:
+	.string	"WF_TYPE_AUTO"
+.LASF291:
+	.string	"current"
+.LASF316:
+	.string	"RKF_WF_A2"
+.LASF163:
+	.string	"UCLASS_FIRMWARE"
+.LASF173:
+	.string	"UCLASS_LPC"
+.LASF169:
+	.string	"UCLASS_IDE"
+.LASF367:
+	.string	"list"
+.LASF390:
+	.string	"block"
+.LASF138:
+	.string	"bootm_headers_t"
+.LASF55:
+	.string	"bi_arm_freq"
+.LASF197:
+	.string	"UCLASS_REMOTEPROC"
+.LASF249:
+	.string	"recv"
+.LASF108:
+	.string	"type"
+.LASF119:
+	.string	"fit_hdr_rd"
+.LASF54:
+	.string	"bi_sramsize"
+.LASF324:
+	.string	"reset_temp_list"
+.LASF162:
+	.string	"UCLASS_GPIO"
+.LASF192:
+	.string	"UCLASS_PWM"
+.LASF40:
+	.string	"long double"
+.LASF395:
+	.string	"strncmp"
+.LASF334:
+	.string	"glr16_list"
+.LASF128:
+	.string	"rd_start"
+.LASF193:
+	.string	"UCLASS_POWER_DOMAIN"
+.LASF196:
+	.string	"UCLASS_REGULATOR"
+.LASF241:
+	.string	"save_size"
+.LASF154:
+	.string	"UCLASS_CLK"
+.LASF246:
+	.string	"iobase"
+.LASF71:
+	.string	"_datarel_start_ofs"
+.LASF101:
+	.string	"ih_name"
+.LASF97:
+	.string	"ih_os"
+.LASF302:
+	.string	"WF_TYPE_GLD16"
+.LASF135:
+	.string	"cmdline_end"
+.LASF269:
+	.string	"net_rx_packet"
+.LASF235:
+	.string	"LOGF_MAX_CATEGORIES"
+.LASF382:
+	.string	"a_size"
+.LASF33:
+	.string	"size"
+.LASF10:
+	.string	"long long unsigned int"
+.LASF89:
+	.string	"image_header"
+.LASF318:
+	.string	"length"
+.LASF296:
+	.string	"WF_TYPE_GRAY2"
+.LASF21:
+	.string	"__be32"
+.LASF50:
+	.string	"bi_flashstart"
+.LASF118:
+	.string	"fit_noffset_os"
+.LASF374:
+	.string	"_min1"
+.LASF177:
+	.string	"UCLASS_MMC"
+.LASF251:
+	.string	"write_hwaddr"
+.LASF234:
+	.string	"UCLASS_INVALID"
+.LASF311:
+	.string	"RKF_WF_DU"
+.LASF215:
+	.string	"UCLASS_USB_HUB"
+.LASF231:
+	.string	"UCLASS_EBC"
+.LASF305:
+	.string	"WF_TYPE_MAX"
+.LASF403:
+	.string	"rkf_wf_get_version"
+.LASF39:
+	.string	"flash_info"
+.LASF83:
+	.string	"version"
+.LASF250:
+	.string	"halt"
+.LASF44:
+	.string	"region"
+.LASF87:
+	.string	"size_dt_struct"
+.LASF179:
+	.string	"UCLASS_MTD"
+.LASF387:
+	.string	"crc_table"
+.LASF76:
+	.string	"fdt32_t"
+.LASF341:
+	.string	"lut_type"
+.LASF181:
+	.string	"UCLASS_NORTHBRIDGE"
+.LASF60:
+	.string	"bi_enetaddr"
+.LASF391:
+	.string	"kzalloc"
+.LASF402:
+	.string	"mtd_info"
+.LASF242:
+	.string	"in_addr"
+.LASF270:
+	.string	"net_rx_packet_len"
+.LASF247:
+	.string	"init"
+.LASF343:
+	.string	"stype"
+.LASF237:
+	.string	"__dtb_dt_begin"
+.LASF198:
+	.string	"UCLASS_RESET"
+.LASF121:
+	.string	"fit_noffset_rd"
+.LASF152:
+	.string	"UCLASS_AHCI"
+.LASF12:
+	.string	"phys_size_t"
+.LASF155:
+	.string	"UCLASS_CPU"
+.LASF70:
+	.string	"FIQ_STACK_START"
+.LASF136:
+	.string	"verify"
+.LASF30:
+	.string	"name"
+.LASF232:
+	.string	"UCLASS_EINK_DISPLAY"
+.LASF184:
+	.string	"UCLASS_PANEL_BACKLIGHT"
+.LASF211:
+	.string	"UCLASS_TIMER"
+.LASF206:
+	.string	"UCLASS_SPI_FLASH"
+.LASF325:
+	.string	"gc16_temp_list"
+.LASF63:
+	.string	"bi_busfreq"
+.LASF6:
+	.string	"short int"
+.LASF190:
+	.string	"UCLASS_PINCTRL"
+.LASF200:
+	.string	"UCLASS_RAMDISK"
+.LASF365:
+	.string	"mode"
+.LASF385:
+	.string	"crc_build_table32"
+.LASF147:
+	.string	"UCLASS_I2C_EMUL"
+.LASF205:
+	.string	"UCLASS_SPMI"
+.LASF144:
+	.string	"UCLASS_TEST_BUS"
+.LASF380:
+	.string	"crc_32"
+.LASF309:
+	.string	"rkf_waveform_type"
+.LASF240:
+	.string	"save_addr"
+.LASF401:
+	.string	"/home2/zwp/2_rk3568_11.0/u-boot"
+.LASF133:
+	.string	"initrd_end"
+.LASF389:
+	.string	"kfree"
+.LASF354:
+	.string	"parse_wf_reset"
+.LASF335:
+	.string	"gld16_list"
+.LASF73:
+	.string	"_datarellocal_start_ofs"
+.LASF322:
+	.string	"panel_info"
+.LASF233:
+	.string	"UCLASS_COUNT"
+.LASF32:
+	.string	"block_drvr"
+.LASF398:
+	.string	"memcpy"
+.LASF22:
+	.string	"gfp_t"
+.LASF35:
+	.string	"flash_id"
+.LASF228:
+	.string	"UCLASS_CRYPTO"
+.LASF127:
+	.string	"fit_noffset_setup"
+.LASF88:
+	.string	"working_fdt"
+.LASF262:
+	.string	"net_root_path"
+.LASF160:
+	.string	"UCLASS_DMA"
+.LASF68:
+	.string	"bd_t"
+.LASF243:
+	.string	"s_addr"
+.LASF364:
+	.string	"get_wf_buf"
+.LASF323:
+	.string	"full_version"
+.LASF271:
+	.string	"net_bcast_ethaddr"
+.LASF65:
+	.string	"bi_boot_params"
+.LASF344:
+	.string	"sftemp"
+.LASF289:
+	.string	"mem_malloc_brk"
+.LASF257:
+	.string	"net_gateway"
+.LASF48:
+	.string	"bi_memstart"
+.LASF292:
+	.string	"epd_lut_type"
+.LASF219:
+	.string	"UCLASS_VIDEO_CONSOLE"
+.LASF298:
+	.string	"WF_TYPE_A2"
+.LASF255:
+	.string	"eth_current"
+.LASF46:
+	.string	"reserved"
+.LASF393:
+	.string	"free"
+.LASF67:
+	.string	"bi_dram"
+.LASF386:
+	.string	"a_poly"
+.LASF2:
+	.string	"short unsigned int"
+.LASF78:
+	.string	"magic"
+.LASF381:
+	.string	"a_data"
+.LASF125:
+	.string	"fit_hdr_setup"
+.LASF303:
+	.string	"WF_TYPE_GCC16"
+.LASF114:
+	.string	"legacy_hdr_valid"
+.LASF42:
+	.string	"base"
+.LASF201:
+	.string	"UCLASS_RTC"
+.LASF34:
+	.string	"sector_count"
+.LASF100:
+	.string	"ih_comp"
+.LASF294:
+	.string	"WF_TYPE_GRAY16"
+.LASF130:
+	.string	"ft_addr"
+.LASF229:
+	.string	"UCLASS_ETH_PHY"
+.LASF313:
+	.string	"RKF_WF_GL16"
+.LASF379:
+	.string	"check_wf_format"
+.LASF346:
+	.string	"rkf_wf_input"
+.LASF4:
+	.string	"uchar"
+.LASF131:
+	.string	"ft_len"
+.LASF384:
+	.string	"decode_wf_auto"
+.LASF326:
+	.string	"gl16_temp_list"
+.LASF252:
+	.string	"next"
+.LASF308:
+	.string	"data"
+.LASF180:
+	.string	"UCLASS_NOP"
+.LASF126:
+	.string	"fit_uname_setup"
+.LASF185:
+	.string	"UCLASS_PCH"
+.LASF186:
+	.string	"UCLASS_PCI"
+.LASF258:
+	.string	"net_netmask"
+.LASF332:
+	.string	"gc16_list"
+.LASF69:
+	.string	"IRQ_STACK_START"
+.LASF151:
+	.string	"UCLASS_ADC"
+.LASF347:
+	.string	"waveform_file"
+.LASF146:
+	.string	"UCLASS_SPI_EMUL"
+.LASF321:
+	.string	"panel_name"
+.LASF123:
+	.string	"fit_uname_fdt"
+	.hidden	free
+	.ident	"GCC: (Linaro GCC 6.3-2017.05) 6.3.1 20170404"
+	.section	.note.GNU-stack,"",@progbits
diff --git a/drivers/video/rk_eink/rk_ebc.h b/drivers/video/rk_eink/rk_ebc.h
new file mode 100644
index 0000000000..80c103e249
--- /dev/null
+++ b/drivers/video/rk_eink/rk_ebc.h
@@ -0,0 +1,76 @@
+/*
+ * (C) Copyright 2020 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ * Author: Wenping Zhang <wenping.zhang@rock-chips.com>
+ */
+
+#ifndef RK_EBC_H
+#define RK_EBC_H
+
+#include "epdlut/epd_lut.h"
+
+struct ebc_panel {
+	u32 width;
+	u32 height;
+	u32 width_mm;
+	u32 height_mm;
+
+	u32 sdck;
+	u32 lsl;
+	u32 lbl;
+	u32 ldl;
+	u32 lel;
+	u32 gdck_sta;
+	u32 lgonl;
+	u32 fsl;
+	u32 fbl;
+	u32 fdl;
+	u32 fel;
+	u32 panel_16bit;
+	u32 panel_color;
+	u32 mirror;
+	u32 disp_pbuf;
+	u32 disp_pbuf_size;
+	u32 *lut_pbuf;
+	u32 lut_pbuf_size;
+	struct epd_lut_data lut_data;
+	struct epd_lut_ops lut_ops;
+};
+
+struct rk_ebc_tcon_ops {
+	int (*enable)(struct udevice *dev, struct ebc_panel *panel);
+	int (*disable)(struct udevice *dev);
+	int (*dsp_mode_set)(struct udevice *dev, int update_mode,
+			    int display_mode, int three_win_mode,
+			    int eink_mode);
+	int (*image_addr_set)(struct udevice *dev, u32 pre_image_addr,
+			      u32 cur_image_addr);
+	int (*frame_addr_set)(struct udevice *dev, u32 frame_addr);
+	int (*lut_data_set)(struct udevice *dev, unsigned int *lut_data,
+			    int frame_count, int lut_32);
+	int (*frame_start)(struct udevice *dev, int frame_total);
+	int (*wait_for_last_frame_complete)(struct udevice *dev);
+};
+
+#define ebc_tcon_get_ops(dev)	((struct rk_ebc_tcon_ops *)(dev)->driver->ops)
+
+/*
+ *interface for ebc power control
+ */
+struct rk_ebc_pwr_ops {
+	int (*power_on)(struct udevice *dev);
+	int (*power_down)(struct udevice *dev);
+	int (*temp_get)(struct udevice *dev, u32 *temp);
+	int (*vcom_set)(struct udevice *dev, u32 vcom);
+};
+
+#define ebc_pwr_get_ops(dev)	((struct rk_ebc_pwr_ops *)(dev)->driver->ops)
+
+//display mode define
+#define DIRECT_MODE		0
+#define LUT_MODE		1
+#define THREE_WIN_MODE		1
+#define EINK_MODE		1
+
+#endif
diff --git a/drivers/video/rk_eink/rk_ebc_tcon.c b/drivers/video/rk_eink/rk_ebc_tcon.c
new file mode 100644
index 0000000000..6f90110358
--- /dev/null
+++ b/drivers/video/rk_eink/rk_ebc_tcon.c
@@ -0,0 +1,529 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2020 Rockchip Electronics Co. Ltd.
+ *
+ * Author: Wenping Zhang <wenping.zhang@rock-chips.com>
+ */
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <pwm.h>
+#include <regmap.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+#include <asm/io.h>
+#include <syscon.h>
+#include <linux/io.h>
+#include "rk_ebc.h"
+#ifdef CONFIG_IRQ
+#include <irq-generic.h>
+#endif
+
+struct ebc_tcon_priv {
+	struct udevice *dev;
+	void __iomem *reg;
+	u32 *regcache;
+	u32 reg_len;
+	void *grf;
+	void *pmugrf;
+};
+
+#define msleep(a)		udelay((a) * 1000)
+#define HIWORD_UPDATE(x, l, h)	(((x) << (l)) | (GENMASK(h, l) << 16))
+#define UPDATE(x, h, l)		(((x) << (l)) & GENMASK((h), (l)))
+
+#define REG_LOAD_GLOBAL_EN	0x1
+
+/* ebc register define */
+#define EBC_DSP_START		0x0000 //Frame statrt register
+#define EBC_EPD_CTRL		0x0004 //EPD control register
+#define EBC_DSP_CTRL		0x0008 //Display control register
+#define EBC_DSP_HTIMING0	0x000c //H-Timing setting register0
+#define EBC_DSP_HTIMING1	0x0010 //H-Timing setting register1
+#define EBC_DSP_VTIMING0	0x0014 //V-Timing setting register0
+#define EBC_DSP_VTIMING1	0x0018 //V-Timing setting register1
+#define EBC_DSP_ACT_INFO	0x001c //ACTIVE width/height
+#define EBC_WIN_CTRL		0x0020 //Window ctrl
+#define EBC_WIN_MST0		0x0024 //Current win memory start
+#define EBC_WIN_MST1		0x0028 //Next win memory start
+#define EBC_WIN_VIR		0x002c //Window vir width/height
+#define EBC_WIN_ACT		0x0030 //Window act width/height
+#define EBC_WIN_DSP		0x0034 //Window dsp width/height
+#define EBC_WIN_DSP_ST		0x0038 //Window display start point
+#define EBC_INT_STATUS		0x003c //Interrupt register
+#define EBC_VCOM0		0x0040 //VCOM setting register0
+#define EBC_VCOM1		0x0044 //VCOM setting register1
+#define EBC_VCOM2		0x0048 //VCOM setting register2
+#define EBC_VCOM3		0x004c //VCOM setting register3
+#define EBC_CONFIG_DONE		0x0050 //Config done register
+#define EBC_VNUM		0x0054 //Line flag num
+#define EBC_WIN_MST2		0x0058 //Framecount memory start
+#define EBC_LUT_DATA_ADDR	0x1000 //lut data address
+
+#define DSP_HTOTAL(x)		UPDATE(x, 27, 16)
+#define DSP_HS_END(x)		UPDATE(x, 7, 0)
+#define DSP_HACT_END(x)		UPDATE(x, 26, 16)
+#define DSP_HACT_ST(x)		UPDATE(x, 7, 0)
+#define DSP_VTOTAL(x)		UPDATE(x, 26, 16)
+#define DSP_VS_END(x)		UPDATE(x, 7, 0)
+#define DSP_VACT_END(x)		UPDATE(x, 26, 16)
+#define DSP_VACT_ST(x)		UPDATE(x, 7, 0)
+#define DSP_HEIGHT(x)		UPDATE(x, 26, 16)
+#define DSP_WIDTH(x)		UPDATE(x, 11, 0)
+
+#define WIN2_FIFO_ALMOST_FULL_LEVEL(x)	UPDATE(x, 27, 19)
+#define WIN_EN(x)			UPDATE(x, 18, 18)
+#define BURST_REG(x)			UPDATE(x, 12, 10)
+#define WIN_FIFO_ALMOST_FULL_LEVEL(x)	UPDATE(x, 9, 2)
+#define WIN_FMT(x)			UPDATE(x, 1, 0)
+
+#define WIN_VIR_HEIGHT(x)		UPDATE(x, 31, 16)
+#define WIN_VIR_WIDTH(x)		UPDATE(x, 15, 0)
+#define WIN_ACT_HEIGHT(x)		UPDATE(x, 26, 16)
+#define WIN_ACT_WIDTH(x)		UPDATE(x, 11, 0)
+#define WIN_DSP_HEIGHT(x)		UPDATE(x, 26, 16)
+#define WIN_DSP_WIDTH(x)		UPDATE(x, 11, 0)
+#define WIN_DSP_YST(x)			UPDATE(x, 26, 16)
+#define WIN_DSP_XST(x)			UPDATE(x, 11, 0)
+
+#define DSP_OUT_LOW			BIT(31)
+#define DSP_EINK_MODE(x)		UPDATE(x, 13, 13)
+#define DSP_EINK_MODE_MASK		BIT(13)
+#define DSP_SDCE_WIDTH(x)		UPDATE(x, 25, 16)
+#define DSP_FRM_TOTAL(x)		UPDATE(x, 9, 2)
+#define DSP_FRM_TOTAL_MASK		GENMASK(9, 2)
+#define DSP_FRM_START			BIT(0)
+#define DSP_FRM_START_MASK		BIT(0)
+#define SW_BURST_CTRL			BIT(12)
+
+#define EINK_MODE_SWAP(x)		UPDATE(x, 31, 31)
+#define EINK_MODE_FRM_SEL(x)		UPDATE(x, 30, 30)
+#define DSP_GD_END(x)			UPDATE(x, 26, 16)
+#define DSP_GD_ST(x)			UPDATE(x, 15, 8)
+#define DSP_THREE_WIN_MODE(x)		UPDATE(x, 7, 7)
+#define THREE_WIN_MODE_MASK		BIT(7)
+#define DSP_SDDW_MODE(x)		UPDATE(x, 6, 6)
+#define EPD_AUO(x)			UPDATE(x, 5, 5)
+#define EPD_PWR(x)			UPDATE(x, 4, 2)
+#define EPD_GDRL(x)			UPDATE(x, 1, 1)
+#define EPD_SDSHR(x)			UPDATE(x, 0, 0)
+
+#define DSP_SWAP_MODE(x)		UPDATE(x, 31, 30)
+#define DSP_SWAP_MODE_MASK		GENMASK(31, 30)
+#define DSP_SDCLK_DIV(x)		UPDATE(x, 19, 16)
+#define DSP_SDCLK_DIV_MASK		GENMASK(19, 16)
+#define DSP_VCOM_MODE(x)		UPDATE(x, 27, 27)
+#define DSP_VCOM_MODE_MASK		BIT(27)
+
+#define DSP_UPDATE_MODE(x)	UPDATE(x, 29, 29)
+#define DSP_DISPLAY_MODE(x)	UPDATE(x, 28, 28)
+#define UPDATE_MODE_MASK	BIT(29)
+#define DISPLAY_MODE_MASK	BIT(28)
+
+#define DSP_FRM_INT_NUM(x)	UPDATE(x, 19, 12)
+#define FRM_END_INT		BIT(0)
+#define DSP_END_INT		BIT(1)
+#define DSP_FRM_INT		BIT(2)
+#define LINE_FLAG_INT		BIT(3)
+#define FRM_END_INT_MASK	BIT(4)
+#define DSP_END_INT_MASK	BIT(5)
+#define DSP_FRM_INT_MASK	BIT(6)
+#define LINE_FLAG_INT_MASK	BIT(7)
+#define FRM_END_INT_CLR		BIT(8)
+#define DSP_END_INT_CLR		BIT(9)
+#define DSP_FRM_INT_CLR		BIT(10)
+#define LINE_FLAG_INT_CLR	BIT(11)
+
+#define PMU_BASE_ADDR		0xfdd90000
+#define PMU_PWR_GATE_SFTCON	0xA0
+#define PMU_PWR_DWN_ST		0x98
+#define RGA_PD_OFF		BIT(5)
+#define RGA_PD_STAT		BIT(5)
+enum ebc_win_data_fmt {
+	Y_DATA_4BPP = 0,
+	Y_DATA_8BPP = 1,
+	RGB888 = 2,
+	RGB565 = 3,
+};
+
+#ifdef CONFIG_IRQ
+#define IRQ_EBC			49
+static volatile int frame_done;
+#endif
+static inline void regs_dump(struct ebc_tcon_priv *tcon)
+{
+	int i;
+
+	printf("dump registers:\n");
+	for (i = 0; i <= EBC_WIN_MST2; i = i + 4) {
+		if (!(i % 16))
+			printf("\n 0x%p:\t", tcon->reg + i);
+		printf("0x%x\t", readl(tcon->reg + i));
+	}
+	printf("\nlut data:\n");
+	for (i = 0x1000; i <= 0x1100; i = i + 4) {
+		if (!(i % 16))
+			printf("\n 0x%p:\t", tcon->reg + i);
+		printf("0x%x\t", readl(tcon->reg + i));
+	}
+	printf("\n");
+}
+
+static int ebc_power_domain(int on)
+{
+	u32 pd_reg;
+	u32 pd_stat;
+	int delay = 0;
+
+	if (on) {
+		pd_reg = RGA_PD_OFF << 16;
+		pd_stat = RGA_PD_STAT;
+	} else {
+		pd_reg = RGA_PD_OFF | (RGA_PD_OFF << 16);
+		pd_stat = ~((u32)RGA_PD_STAT);
+	}
+
+	/* enable rga pd for ebc tcon*/
+	writel(pd_reg, PMU_BASE_ADDR + PMU_PWR_GATE_SFTCON);
+	delay = 1000;
+	do {
+		udelay(1);
+		delay--;
+		if (delay == 0) {
+			printf("Enable rga pd for ebc failed !\n");
+			return -1;
+		}
+	} while (readl(PMU_BASE_ADDR + PMU_PWR_DWN_ST) & pd_stat);
+
+	return 0;
+}
+
+static inline void tcon_write(struct ebc_tcon_priv *tcon, unsigned int reg,
+			      unsigned int value)
+{
+	unsigned int *cache = tcon->regcache + (reg >> 2);
+
+	writel(value, tcon->reg + reg);
+	*cache = value;
+}
+
+static inline unsigned int tcon_read(struct ebc_tcon_priv *tcon,
+				     unsigned int reg)
+{
+	return readl(tcon->reg + reg);
+}
+
+static inline void tcon_update_bits(struct ebc_tcon_priv *tcon,
+				    unsigned int reg, unsigned int mask,
+				    unsigned int val)
+{
+	unsigned int tmp;
+	unsigned int *cache = tcon->regcache + (reg >> 2);
+
+	tmp = *cache & ~mask;
+	tmp |= val & mask;
+
+	writel(tmp, tcon->reg + reg);
+	*cache = tmp;
+}
+
+#ifdef CONFIG_IRQ
+static void ebc_irq_handler(int irq, void *data)
+{
+	u32 intr_status;
+	struct udevice *dev = data;
+	struct ebc_tcon_priv *tcon = dev_get_priv(dev);
+
+	intr_status = readl(tcon->reg + EBC_INT_STATUS);
+
+	if (intr_status & DSP_END_INT) {
+		tcon_update_bits(tcon, EBC_INT_STATUS,
+				 DSP_END_INT_CLR, DSP_END_INT_CLR);
+		frame_done = 1;
+	}
+}
+#endif
+
+static inline void tcon_cfg_done(struct ebc_tcon_priv *tcon)
+{
+	writel(REG_LOAD_GLOBAL_EN, tcon->reg + EBC_CONFIG_DONE);
+}
+
+static int ebc_tcon_enable(struct udevice *dev, struct ebc_panel *panel)
+{
+	struct ebc_tcon_priv *tcon = dev_get_priv(dev);
+
+	/* panel timing and win info config */
+	tcon_write(tcon, EBC_DSP_HTIMING0,
+		   DSP_HTOTAL(panel->lsl + panel->lbl + panel->ldl +
+			      panel->lel) | DSP_HS_END(panel->lsl + 2));
+	tcon_write(tcon, EBC_DSP_HTIMING1,
+		   DSP_HACT_END(panel->lsl + panel->lbl + panel->ldl) |
+		   DSP_HACT_ST(panel->lsl + panel->lbl - 1));
+	tcon_write(tcon, EBC_DSP_VTIMING0,
+		   DSP_VTOTAL(panel->fsl + panel->fbl + panel->fdl +
+			      panel->fel) | DSP_VS_END(panel->fsl));
+	tcon_write(tcon, EBC_DSP_VTIMING1,
+		   DSP_VACT_END(panel->fsl + panel->fbl + panel->fdl) |
+		   DSP_VACT_ST(panel->fsl + panel->fbl));
+	tcon_write(tcon, EBC_DSP_ACT_INFO,
+		   DSP_HEIGHT(panel->height) |
+		   DSP_WIDTH(panel->width));
+	tcon_write(tcon, EBC_WIN_VIR,
+		   WIN_VIR_HEIGHT(panel->height) |
+		   WIN_VIR_WIDTH(panel->width));
+	tcon_write(tcon, EBC_WIN_ACT,
+		   WIN_ACT_HEIGHT(panel->height) |
+		   WIN_ACT_WIDTH(panel->width));
+	tcon_write(tcon, EBC_WIN_DSP,
+		   WIN_DSP_HEIGHT(panel->height) |
+		   WIN_DSP_WIDTH(panel->width));
+	tcon_write(tcon, EBC_WIN_DSP_ST,
+		   WIN_DSP_YST(panel->fsl + panel->fbl) |
+		   WIN_DSP_XST(panel->lsl + panel->lbl));
+
+	/* win2 fifo is 512x128, win fifo is 256x128,
+	 * we set fifo almost value (fifo_size - 16)
+	 * burst_reg = 7 mean ahb burst is incr16
+	 */
+	tcon_write(tcon, EBC_WIN_CTRL,
+		   WIN2_FIFO_ALMOST_FULL_LEVEL(496) | WIN_EN(1) |
+		   BURST_REG(7) | WIN_FIFO_ALMOST_FULL_LEVEL(240) |
+		   WIN_FMT(Y_DATA_4BPP));
+
+	/*
+	 * EBC_EPD_CTRL info:
+	 * DSP_GD_ST: GCLK rising edge point(SCLK), which count from
+	 *            the rasing edge of hsync(spec is wrong, count
+	 *            from rasing edge of hsync, not falling edge of hsync)
+	 * DSP_GD_END : GCLK falling edge point(SCLK), which count from
+	 *              the rasing edge of hsync
+	 * DSP_THREE_WIN_MODE: 0: lut mode or direct mode; 1: three win mode
+	 * DSP_SDDW_MODE: 0: 8 bit data output; 1: 16 bit data output
+	 * EPD_AUO: 0: EINK; 1:AUO
+	 * EPD_GDRL: gate scanning direction: 1:button to top 0:top to button
+	 * EPD_SDSHR: source scanning direction 1:right to left 0:left to right
+	 */
+	tcon_write(tcon, EBC_EPD_CTRL,
+		   EINK_MODE_SWAP(1) |
+		   DSP_GD_ST(panel->lsl + panel->gdck_sta) |
+		   DSP_GD_END(panel->lsl + panel->gdck_sta + panel->lgonl) |
+		   DSP_THREE_WIN_MODE(0) |
+		   DSP_SDDW_MODE(!!panel->panel_16bit) |
+		   EPD_AUO(0) |
+		   EPD_GDRL(1) |
+		   EPD_SDSHR(1));
+	tcon_write(tcon, EBC_DSP_START,
+		   DSP_SDCE_WIDTH(panel->ldl) | SW_BURST_CTRL);
+
+	tcon_write(tcon, EBC_DSP_CTRL,
+		   DSP_SWAP_MODE(panel->panel_16bit ? 2 : 3) |
+		   DSP_VCOM_MODE(1) |
+		   DSP_SDCLK_DIV(panel->panel_16bit ? 7 : 3));
+
+	tcon_cfg_done(tcon);
+
+	return 0;
+}
+
+static int ebc_tcon_disable(struct udevice *dev)
+{
+	return 0;
+}
+
+static int ebc_tcon_dsp_mode_set(struct udevice *dev, int update_mode,
+				 int display_mode, int three_win_mode,
+				 int eink_mode)
+{
+	struct ebc_tcon_priv *tcon = dev_get_priv(dev);
+
+	tcon_update_bits(tcon, EBC_DSP_CTRL,
+			 UPDATE_MODE_MASK | DISPLAY_MODE_MASK,
+			 DSP_UPDATE_MODE(!!update_mode) |
+			 DSP_DISPLAY_MODE(!!display_mode));
+
+	tcon_update_bits(tcon, EBC_EPD_CTRL, THREE_WIN_MODE_MASK,
+			 DSP_THREE_WIN_MODE(!!three_win_mode));
+	/* always set frm start bit 0 before real frame start */
+	tcon_update_bits(tcon, EBC_DSP_START,
+			 DSP_EINK_MODE_MASK | DSP_FRM_START_MASK,
+			 DSP_EINK_MODE(!!eink_mode));
+	tcon_cfg_done(tcon);
+
+	return 0;
+}
+
+static int ebc_tcon_image_addr_set(struct udevice *dev, u32 pre_image_addr,
+				   u32 cur_image_addr)
+{
+	struct ebc_tcon_priv *tcon = dev_get_priv(dev);
+
+	tcon_write(tcon, EBC_WIN_MST0, pre_image_addr);
+	tcon_write(tcon, EBC_WIN_MST1, cur_image_addr);
+	tcon_cfg_done(tcon);
+
+	return 0;
+}
+
+static int ebc_tcon_frame_addr_set(struct udevice *dev, u32 frame_addr)
+{
+	struct ebc_tcon_priv *tcon = dev_get_priv(dev);
+
+	tcon_write(tcon, EBC_WIN_MST2, frame_addr);
+	tcon_cfg_done(tcon);
+
+	return 0;
+}
+
+static int ebc_tcon_lut_data_set(struct udevice *dev, unsigned int *lut_data,
+				 int frame_count, int lut_32)
+{
+	int i, lut_size;
+	struct ebc_tcon_priv *tcon = dev_get_priv(dev);
+
+	if ((!lut_32 && frame_count > 256) || (lut_32 && frame_count > 64)) {
+		dev_err(tcon->dev, "frame count over flow\n");
+		return -1;
+	}
+
+	if (lut_32)
+		lut_size = frame_count * 64;
+	else
+		lut_size = frame_count * 16;
+
+	for (i = 0; i < lut_size; i++)
+		tcon_write(tcon, EBC_LUT_DATA_ADDR + (i * 4), lut_data[i]);
+
+	tcon_cfg_done(tcon);
+
+	return 0;
+}
+
+static int wait_for_last_frame_complete(struct udevice *dev)
+{
+#ifndef CONFIG_IRQ
+	u32 intr_status;
+#endif
+	struct ebc_tcon_priv *tcon = dev_get_priv(dev);
+
+#ifdef CONFIG_IRQ
+	while (!frame_done)
+		msleep(1);
+	frame_done = 0;
+#else
+	/* wait for frame display end*/
+	do {
+		msleep(1);
+		intr_status = readl(tcon->reg + EBC_INT_STATUS);
+	} while (!(intr_status & DSP_END_INT));
+#endif
+
+	tcon_update_bits(tcon, EBC_INT_STATUS,
+			 DSP_END_INT_CLR, DSP_END_INT_CLR);
+
+	return 0;
+}
+
+static int ebc_tcon_frame_start(struct udevice *dev, int frame_total)
+{
+	struct ebc_tcon_priv *tcon = dev_get_priv(dev);
+
+	tcon_write(tcon, EBC_INT_STATUS,
+		   LINE_FLAG_INT_MASK | DSP_FRM_INT_MASK | FRM_END_INT_MASK);
+	tcon_update_bits(tcon, EBC_DSP_START,
+			 DSP_FRM_TOTAL_MASK, DSP_FRM_TOTAL(frame_total - 1));
+	tcon_cfg_done(tcon);
+
+	tcon_update_bits(tcon, EBC_DSP_START,
+			 DSP_FRM_START_MASK, DSP_FRM_START);
+
+	return 0;
+}
+
+static int rk_ebc_tcon_probe(struct udevice *dev)
+{
+	int ret;
+	struct ebc_tcon_priv *priv = dev_get_priv(dev);
+
+	/*Enable PD first*/
+	ret = ebc_power_domain(1);
+	if (ret) {
+		printf("%s, enable pd failed\n", __func__);
+		return -1;
+	}
+
+	priv->dev = dev;
+	ret = clk_set_defaults(dev);
+	if (ret)
+		printf("%s clk_set_defaults failed %d\n", __func__, ret);
+
+#ifdef CONFIG_IRQ
+	irq_install_handler(IRQ_EBC, ebc_irq_handler, dev);
+	irq_handler_enable(IRQ_EBC);
+#endif
+	return 0;
+}
+
+const struct rk_ebc_tcon_ops ebc_tcon_funcs = {
+	.enable = ebc_tcon_enable,
+	.disable = ebc_tcon_disable,
+	.dsp_mode_set = ebc_tcon_dsp_mode_set,
+	.image_addr_set = ebc_tcon_image_addr_set,
+	.frame_addr_set = ebc_tcon_frame_addr_set,
+	.lut_data_set = ebc_tcon_lut_data_set,
+	.frame_start = ebc_tcon_frame_start,
+	.wait_for_last_frame_complete = wait_for_last_frame_complete,
+};
+
+static int rk_ebc_tcon_ofdata_to_platdata(struct udevice *dev)
+{
+	fdt_size_t size;
+	fdt_addr_t addr;
+	struct ebc_tcon_priv *priv = dev_get_priv(dev);
+
+	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	if (priv->grf <= 0) {
+		debug("%s: Get syscon grf failed (ret=%p)\n",
+		      __func__, priv->grf);
+		return  -ENXIO;
+	}
+	priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
+	if (priv->pmugrf <= 0) {
+		debug("%s: Get syscon pmugrf failed (ret=%p)\n",
+		      __func__, priv->grf);
+		return  -ENXIO;
+	}
+	addr = dev_read_addr_size(dev, "reg", &size);
+	if (addr == FDT_ADDR_T_NONE) {
+		debug("%s: Get ebc_tcon address failed\n", __func__);
+		return  -ENXIO;
+	}
+
+	priv->reg = ioremap(addr, size);
+	priv->reg_len = size;
+	priv->regcache = malloc(size);
+	memset(priv->regcache, 0, size);
+	return 0;
+}
+
+static const struct udevice_id ebc_tcon_ids[] = {
+	{ .compatible = "rockchip,rk3568-ebc-tcon" },
+	{ }
+};
+
+U_BOOT_DRIVER(rk_ebc_tcon) = {
+	.name	= "rk_ebc_tcon",
+	.id	= UCLASS_EBC,
+	.of_match = ebc_tcon_ids,
+	.ofdata_to_platdata = rk_ebc_tcon_ofdata_to_platdata,
+	.probe	= rk_ebc_tcon_probe,
+	.ops	= &ebc_tcon_funcs,
+	.priv_auto_alloc_size   = sizeof(struct ebc_tcon_priv),
+};
+
+UCLASS_DRIVER(ebc_tcon) = {
+	.id	= UCLASS_EBC,
+	.name	= "ebc_tcon",
+};
+
diff --git a/drivers/video/rk_eink/rk_eink_display.c b/drivers/video/rk_eink/rk_eink_display.c
new file mode 100644
index 0000000000..a57a615ab7
--- /dev/null
+++ b/drivers/video/rk_eink/rk_eink_display.c
@@ -0,0 +1,727 @@
+/*
+ * (C) Copyright 2020 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ * Author: Wenping Zhang <wenping.zhang@rock-chips.com>
+ */
+#include <common.h>
+#include <dm.h>
+#include <stdio.h>
+#include <errno.h>
+#include <mapmem.h>
+#include <stdlib.h>
+#include <asm/arch/vendor.h>
+#include <dm/of_access.h>
+#include <dm/uclass.h>
+#include <dm/uclass-id.h>
+#include <boot_rkimg.h>
+#include <rk_eink.h>
+#include "rk_ebc.h"
+#include "epdlut/epd_lut.h"
+
+#define PART_WAVEFORM		"waveform"
+#define EINK_LOGO_PART_MAGIC	"RKEL"
+#define EINK_LOGO_IMAGE_MAGIC	"GR04"
+/*
+ * grayscale logo partition format:
+ * block0:
+ * struct logo_part_header part_header;
+ * struct grayscale_header logo1_header;
+ * struct grayscale_header logo2_header;
+ * struct grayscale_header logo3_header;
+ * struct grayscale_header logo4_header;
+ * ....
+ *
+ * block 1:
+ * logo1_image
+ *
+ * .....
+ * block m:
+ * logo2_image
+ *
+ * ........
+ * block n:
+ * logo3_image
+ *
+ * ........
+ * block i:
+ * logoi_image
+ */
+
+//logo partition Header, 64byte
+struct logo_part_header {
+	char magic[4]; /* must be "RKEL" */
+	u32  totoal_size;
+	u32  screen_width;
+	u32  screen_height;
+	u32  logo_count;
+	u8   version[4];
+	u32  rsv[10];
+} __packed;
+
+// logo image header,32 byte
+struct grayscale_header {
+	char magic[4]; /* must be "GR04" */
+	u16 x;
+	u16 y;
+	u16 w;
+	u16 h;
+	u32 logo_type;
+	u32 data_offset; /* image offset in byte */
+	u32 data_size; /* image size in byte */
+	u32 rsv[2];
+} __packed;
+
+/*
+ * The start address of logo image in logo.img must be aligned in 512 bytes,
+ * so the header size must be times of 512 bytes. Here we fix the size to 512
+ * bytes, so the count of logo image can only support up to 14.
+ */
+struct logo_info {
+	struct logo_part_header part_hdr;
+	struct grayscale_header img_hdr[14];
+} __packed;
+
+struct rockchip_eink_display_priv {
+	struct udevice *dev;
+	struct udevice *ebc_tcon_dev;
+	struct udevice *ebc_pwr_dev;
+	int vcom;
+};
+
+enum {
+	EBC_PWR_DOWN = 0,
+	EBC_PWR_ON = 1,
+};
+
+#define EINK_VCOM_ID		17
+#define EINK_VCOM_MAX		64
+#define VCOM_DEFAULT_VALUE	1650
+
+static struct logo_info eink_logo_info;
+static struct udevice *eink_dev;
+static volatile int last_logo_type = -1;
+static int read_vcom_from_vendor(void)
+{
+	int ret = 0;
+	char vcom_str[EINK_VCOM_MAX] = {0};
+	char vcom_args[EINK_VCOM_MAX] = {0};
+
+	/* Read vcom value from vendor storage part */
+	ret = vendor_storage_read(EINK_VCOM_ID, vcom_str, (EINK_VCOM_MAX - 1));
+	if (ret > 0) {
+		snprintf(vcom_args, strlen(vcom_str) + 6, "vcom=%s", vcom_str);
+		printf("eink update bootargs: %s\n", vcom_args);
+		env_update("bootargs", vcom_args);
+	} else {
+		return ret;
+	}
+
+	return atoi(vcom_str);
+}
+
+static int read_waveform(struct udevice *dev)
+{
+	int cnt, start, ret;
+	disk_partition_t part;
+	struct blk_desc *dev_desc;
+	struct ebc_panel *plat = dev_get_platdata(dev);
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: Could not find device\n", __func__);
+		return -EIO;
+	}
+	if (part_get_info_by_name(dev_desc, PART_WAVEFORM, &part) < 0) {
+		printf("Get waveform partition failed\n");
+		return -ENODEV;
+	}
+	cnt = plat->lut_pbuf_size / RK_BLK_SIZE;
+	start = part.start;
+	ret = blk_dread(dev_desc, start, cnt, (void *)plat->lut_pbuf);
+	if (ret != cnt)
+		printf("Try to read %d blocks failed, only read %d\n",
+		       cnt, ret);
+
+	flush_dcache_range((ulong)plat->lut_pbuf,
+			   ALIGN((ulong)plat->lut_pbuf + cnt,
+				 CONFIG_SYS_CACHELINE_SIZE));
+	ret = epd_lut_from_mem_init(plat->lut_pbuf, &plat->lut_ops);
+	if (ret < 0) {
+		printf("lut init failed\n");
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static u32 aligned_image_size_4k(struct udevice *dev)
+{
+	struct ebc_panel *plat = dev_get_platdata(dev);
+	u32 w = plat->width;
+	u32 h = plat->height;
+
+	return ALIGN((w * h) >> 1, 4096);
+}
+
+/*
+ * This driver load the grayscale image from flash,
+ * and put it in the reserve memory which define in dts:
+ * display_reserved: framebuffer@10000000 {
+ *	reg = <0x0 0x10000000 0x0 0x2000000>;
+ *	no-map;
+ * };
+ * Every image logo size must be aligned in 4K, make sure
+ * kernel can use it rightly, the buffer of LOGO image is
+ * put in order of below map:
+ *  |---uboot logo        ---|
+ *  |---kernel logo       ---|
+ *  |---charge_0 logo   ---|
+ *  |---charge_1 logo   ---|
+ *  |---charge_2 logo   ---|
+ *  |---charge_3 logo   ---|
+ *  |---charge_4 logo   ---|
+ *  |---charge_5 logo   ---|
+ *  |---battery low logo---|
+ */
+static int get_addr_by_type(struct udevice *dev, u32 logo_type)
+{
+	u32 offset, indx, img_size;
+	struct ebc_panel *plat = dev_get_platdata(dev);
+
+	if (plat->disp_pbuf_size == 0 || !plat->disp_pbuf) {
+		printf("invalid display buffer, please check dts\n");
+		return -EINVAL;
+	}
+	indx = ffs(logo_type) - 1;
+	img_size = aligned_image_size_4k(dev);
+	offset = img_size * indx;
+	if (offset + img_size > plat->disp_pbuf_size) {
+		printf("reserve display memory size is not enough\n");
+		return -EINVAL;
+	}
+
+	switch (logo_type) {
+	case EINK_LOGO_UBOOT:
+	case EINK_LOGO_KERNEL:
+	case EINK_LOGO_CHARGING_0:
+	case EINK_LOGO_CHARGING_1:
+	case EINK_LOGO_CHARGING_2:
+	case EINK_LOGO_CHARGING_3:
+	case EINK_LOGO_CHARGING_4:
+	case EINK_LOGO_CHARGING_5:
+	case EINK_LOGO_CHARGING_LOWPOWER:
+		return (plat->disp_pbuf + offset);
+	default:
+		printf("invalid logo type[%d]\n", logo_type);
+	}
+
+	return -EINVAL;
+}
+
+static int read_header(struct blk_desc *dev_desc,
+		       disk_partition_t *part,
+		       struct logo_info *header)
+{
+	int i;
+	struct logo_part_header *part_hdr = &header->part_hdr;
+
+	if (blk_dread(dev_desc, part->start, 1, header) != 1)
+		return -EIO;
+
+	if (memcmp(part_hdr->magic, EINK_LOGO_PART_MAGIC, 4)) {
+		printf("partition header is invalid\n");
+		return -EINVAL;
+	}
+	if (part_hdr->logo_count == 0) {
+		printf("the count of logo image is 0\n");
+		return -EINVAL;
+	}
+	for (i = 0; i < part_hdr->logo_count; i++) {
+		struct grayscale_header *img_hdr = &header->img_hdr[i];
+
+		if (memcmp(img_hdr->magic, EINK_LOGO_IMAGE_MAGIC, 4)) {
+			printf("image[%d] header '%s' is invalid\n", i,
+			       img_hdr->magic);
+			return -EINVAL;
+		}
+	}
+
+	return 0;
+}
+
+static int read_grayscale(struct blk_desc *dev_desc,
+			  disk_partition_t *part, u32 offset,
+			  u32 size, void *buf)
+{
+	u32 blk_start, blk_offset, blk_count;
+
+	blk_offset = DIV_ROUND_UP(offset, dev_desc->blksz);
+	blk_start = part->start + blk_offset;
+	blk_count = DIV_ROUND_UP(size, dev_desc->blksz);
+
+	debug("blk_offset=%d, blk_start=%d,blk_count=%d,out buf=%p\n",
+	      blk_offset, blk_start, blk_count, buf);
+	if (blk_dread(dev_desc, blk_start, blk_count, buf) != blk_count) {
+		printf("read grayscale data failed\n");
+		return -EIO;
+	}
+
+	return 0;
+}
+
+/*
+ * The eink kernel driver need last frame to do part refresh,
+ * so we need to transfer two images to kernel, which is kernel
+ * logo and the logo displayed in uboot.
+ *
+ * this function use logo type bitmap to indicate several logo.
+ * u32 needed_logo: we only load needed logo image into ram, such as
+ *                   uboot logo + kernel logo or charger logo + kernel
+ *                   logo
+ * u32 *real_logo: because the needed logo may not exist in logo.img,
+ *                  so have really loaded logo in para loaded_logo.
+ */
+static int read_needed_logo_from_partition(struct udevice *dev,
+					   u32 needed_logo,
+					   u32 *loaded_logo)
+{
+	int ret, i;
+	disk_partition_t part;
+	struct blk_desc *dev_desc;
+	struct logo_info *hdr = &eink_logo_info;
+	struct logo_part_header *part_hdr = &hdr->part_hdr;
+	struct ebc_panel *panel = dev_get_platdata(dev);
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: Could not find device\n", __func__);
+		return -EIO;
+	}
+
+	if (part_get_info_by_name(dev_desc, PART_LOGO, &part) < 0)
+		return -ENODEV;
+
+	ret = read_header(dev_desc, &part, hdr);
+	if (ret < 0) {
+		printf("eink logo read header failed,ret = %d\n", ret);
+		return -EINVAL;
+	}
+	if (part_hdr->screen_width != panel->width ||
+	    part_hdr->screen_height != panel->height){
+		printf("logo size(%dx%d) is not same as screen size(%dx%d)\n",
+		       part_hdr->screen_width, part_hdr->screen_height,
+			panel->width, panel->height);
+		return -EINVAL;
+	}
+
+	*loaded_logo = 0;
+	for (i = 0; i < part_hdr->logo_count; i++) {
+		struct grayscale_header *img_hdr = &hdr->img_hdr[i];
+		int pic_buf;
+		u32 offset = img_hdr->data_offset;
+		u32 size = img_hdr->data_size;
+		u32 logo_type = img_hdr->logo_type;
+
+		debug("offset=0x%x, size=%d,logo_type=%d,w=%d,h=%d\n",
+		      offset, size, logo_type, img_hdr->w, img_hdr->h);
+
+		if (needed_logo & logo_type) {
+			pic_buf = get_addr_by_type(dev, logo_type);
+
+			if (pic_buf <= 0) {
+				printf("Get buffer failed for image %d\n",
+				       img_hdr->logo_type);
+				return -EIO;
+			}
+			if (!IS_ALIGNED((ulong)pic_buf,
+					ARCH_DMA_MINALIGN)) {
+				printf("disp buffer is not dma aligned\n");
+				return -EINVAL;
+			}
+			read_grayscale(dev_desc, &part, offset, size,
+				       (void *)((ulong)pic_buf));
+			flush_dcache_range((ulong)pic_buf,
+					   ALIGN((ulong)pic_buf + size,
+						 CONFIG_SYS_CACHELINE_SIZE));
+			*loaded_logo |= logo_type;
+		}
+	}
+
+	return 0;
+}
+
+static int ebc_power_set(struct udevice *dev, int is_on)
+{
+	int ret;
+	struct rockchip_eink_display_priv *priv = dev_get_priv(dev);
+	struct ebc_panel *panel = dev_get_platdata(dev);
+	struct udevice *ebc_tcon_dev = priv->ebc_tcon_dev;
+	struct rk_ebc_tcon_ops *ebc_tcon_ops = ebc_tcon_get_ops(ebc_tcon_dev);
+	struct udevice *ebc_pwr_dev = priv->ebc_pwr_dev;
+	struct rk_ebc_pwr_ops *pwr_ops = ebc_pwr_get_ops(ebc_pwr_dev);
+
+	if (is_on) {
+		ret = ebc_tcon_ops->enable(ebc_tcon_dev, panel);
+		if (ret) {
+			printf("%s, ebc tcon enabled failed\n", __func__);
+			return -1;
+		}
+		ret = pwr_ops->power_on(ebc_pwr_dev);
+		if (ret) {
+			printf("%s, power on failed\n", __func__);
+			return -1;
+		}
+	} else {
+		ret = pwr_ops->power_down(ebc_pwr_dev);
+		if (ret) {
+			printf("%s, power_down failed\n", __func__);
+			return -1;
+		}
+		ret = ebc_tcon_ops->disable(ebc_tcon_dev);
+		if (ret) {
+			printf("%s, ebc tcon disable failed\n", __func__);
+			return -1;
+		}
+	}
+	return 0;
+}
+
+static int eink_display(struct udevice *dev, u32 pre_img_buf,
+			u32 cur_img_buf, u32 lut_type, int update_mode)
+{
+	u32 temperature, frame_num;
+	struct rockchip_eink_display_priv *priv = dev_get_priv(dev);
+	struct ebc_panel *plat = dev_get_platdata(dev);
+	struct epd_lut_ops *lut_ops = &plat->lut_ops;
+	struct udevice *ebc_pwr_dev = priv->ebc_pwr_dev;
+	struct rk_ebc_pwr_ops *pwr_ops = ebc_pwr_get_ops(ebc_pwr_dev);
+	struct udevice *ebc_tcon_dev = priv->ebc_tcon_dev;
+	struct rk_ebc_tcon_ops *ebc_tcon_ops = ebc_tcon_get_ops(ebc_tcon_dev);
+
+	pwr_ops->temp_get(ebc_pwr_dev, &temperature);
+	if (temperature <= 0 || temperature > 50) {
+		printf("temperature = %d, out of range0~50 ,use 25\n",
+		       temperature);
+		temperature = 25;
+	}
+
+	if (!lut_ops->lut_get) {
+		printf("get lut ops failed\n");
+		return -EIO;
+	}
+	lut_ops->lut_get(&plat->lut_data, lut_type, temperature);
+	frame_num = plat->lut_data.frame_num;
+	debug("lut_type=%d, frame num=%d, temp=%d\n", lut_type,
+	      frame_num, temperature);
+
+	ebc_tcon_ops->lut_data_set(ebc_tcon_dev, plat->lut_data.data,
+				   frame_num, 0);
+	ebc_tcon_ops->dsp_mode_set(ebc_tcon_dev, update_mode,
+				   LUT_MODE, !THREE_WIN_MODE, !EINK_MODE);
+	ebc_tcon_ops->image_addr_set(ebc_tcon_dev, pre_img_buf, cur_img_buf);
+	ebc_tcon_ops->frame_start(ebc_tcon_dev, frame_num);
+	ebc_tcon_ops->wait_for_last_frame_complete(ebc_tcon_dev);
+
+	return 0;
+}
+
+static int rk_eink_display_init(void)
+{
+	int ret;
+	struct uclass *uc;
+	struct udevice *dev;
+
+	if (eink_dev) {
+		printf("ebc-dev is already initialized!\n");
+		return 0;
+	}
+
+	ret = uclass_get(UCLASS_EINK_DISPLAY, &uc);
+	if (ret) {
+		printf("can't find uclass eink\n");
+		return -ENODEV;
+	}
+	for (uclass_first_device(UCLASS_EINK_DISPLAY, &dev);
+	     dev; uclass_next_device(&dev))
+		;
+
+	if (eink_dev) {
+		printf("ebc-dev is probed success!\n");
+		return 0;
+	}
+	printf("Can't find ebc-dev\n");
+	return -ENODEV;
+}
+
+/*
+ * Eink display need current and previous image buffer, We assume
+ * every type of logo has only one image, so just tell this function
+ * last logo type and current logo type, it will find the right images.
+ * last_logo_type: -1 means it's first displaying.
+ */
+static int rockchip_eink_show_logo(int cur_logo_type, int update_mode)
+{
+	int ret = 0;
+	u32 read_logo = 0;
+	u32 logo_addr;
+	u32 last_logo_addr;
+	struct ebc_panel *plat;
+	void *reset_disp_addr = NULL;
+	struct udevice *dev;
+
+	if (!eink_dev) {
+		ret = rk_eink_display_init();
+		if (ret) {
+			printf("Get ebc dev failed, check dts configs\n");
+			return -ENODEV;
+		}
+	}
+	dev = eink_dev;
+
+	/*Don't need to update display*/
+	if (last_logo_type == cur_logo_type) {
+		debug("Same as last picture, Don't need to display\n");
+		return 0;
+	}
+
+	plat = dev_get_platdata(dev);
+
+	ret = ebc_power_set(dev, EBC_PWR_ON);
+	if (ret) {
+		printf("Eink power on failed\n");
+		return -1;
+	}
+	/*
+	 * The last_logo_type is 0 means it's first displaying
+	 */
+	if (last_logo_type == -1) {
+		int size = (plat->width * plat->height) >> 1;
+
+		reset_disp_addr = memalign(ARCH_DMA_MINALIGN, size);
+		memset(reset_disp_addr, 0xff, size);
+		last_logo_addr = (u32)(u64)reset_disp_addr;
+		eink_display(dev, last_logo_addr, last_logo_addr,
+			     WF_TYPE_RESET, 0);
+		last_logo_type = 0;
+	} else {
+		last_logo_addr = get_addr_by_type(dev, last_logo_type);
+		if (last_logo_addr < 0) {
+			printf("Invalid last logo addr, exit!\n");
+			goto out;
+		}
+		if (cur_logo_type == EINK_LOGO_RESET) {
+			int size = (plat->width * plat->height) >> 1;
+
+			reset_disp_addr = memalign(ARCH_DMA_MINALIGN, size);
+			memset(reset_disp_addr, 0xff, size);
+			eink_display(dev, last_logo_addr,
+				     (u32)(u64)reset_disp_addr,
+				     WF_TYPE_GC16, update_mode);
+			last_logo_type = -1;
+			goto out;
+		}
+	}
+	ret = read_needed_logo_from_partition(dev, cur_logo_type,
+					      &read_logo);
+	if (ret || !(read_logo & cur_logo_type)) {
+		printf("read uboot logo failed, read_logo=%d\n", read_logo);
+		ret = -EIO;
+		goto out;
+	}
+	logo_addr = get_addr_by_type(dev, cur_logo_type);
+	debug("logo_addr=%x, logo_type=%d\n", logo_addr, cur_logo_type);
+	if (logo_addr <= 0) {
+		printf("get logo buffer failed\n");
+		ret = -EIO;
+		goto out;
+	}
+
+	eink_display(dev, last_logo_addr, logo_addr, WF_TYPE_GC16, update_mode);
+	last_logo_type = cur_logo_type;
+	/*
+	 * System will boot up to kernel only when the
+	 * logo is uboot logo
+	 */
+	if (cur_logo_type == EINK_LOGO_UBOOT) {
+		char logo_args[64] = {0};
+
+		printf("Transmit uboot logo addr(0x%x) to kernel\n", logo_addr);
+		sprintf(logo_args, "ulogo_addr=0x%x", logo_addr);
+		env_update("bootargs", logo_args);
+		ret = read_needed_logo_from_partition(dev, EINK_LOGO_KERNEL,
+						      &read_logo);
+		if (ret || !(read_logo & EINK_LOGO_KERNEL)) {
+			printf("No invalid kernel logo in logo.img\n");
+		} else {
+			int klogo_addr = get_addr_by_type(dev,
+							  EINK_LOGO_KERNEL);
+
+			if (klogo_addr <= 0) {
+				printf("get kernel logo buffer failed\n");
+				ret = -EIO;
+				goto out;
+			}
+			printf("Transmit kernel logo addr(0x%x) to kernel\n",
+			       klogo_addr);
+			sprintf(logo_args, "klogo_addr=0x%x", klogo_addr);
+			env_update("bootargs", logo_args);
+		}
+	}
+
+out:
+	if (reset_disp_addr)
+		free(reset_disp_addr);
+	ret = ebc_power_set(dev, EBC_PWR_DOWN);
+	if (ret)
+		printf("Eink power down failed\n");
+	return ret;
+}
+
+int rockchip_eink_show_uboot_logo(void)
+{
+	return rockchip_eink_show_logo(EINK_LOGO_UBOOT, EINK_UPDATE_DIFF);
+}
+
+int rockchip_eink_show_charge_logo(int logo_type)
+{
+	return rockchip_eink_show_logo(logo_type, EINK_UPDATE_DIFF);
+}
+
+static int rockchip_eink_display_probe(struct udevice *dev)
+{
+	int ret, vcom;
+	struct rockchip_eink_display_priv *priv = dev_get_priv(dev);
+
+	/* Before relocation we don't need to do anything */
+	if (!(gd->flags & GD_FLG_RELOC))
+		return 0;
+
+	ret = uclass_get_device_by_phandle(UCLASS_EBC, dev,
+					   "ebc_tcon",
+					   &priv->ebc_tcon_dev);
+	if (ret && ret != -ENOENT) {
+		dev_err(dev, "Cannot get ebc_tcon: %d\n", ret);
+		return ret;
+	}
+
+	ret = uclass_get_device_by_phandle(UCLASS_I2C_GENERIC, dev,
+					   "pmic",
+					   &priv->ebc_pwr_dev);
+	if (ret && ret != -ENOENT) {
+		dev_err(dev, "Cannot get pmic: %d\n", ret);
+		return ret;
+	}
+
+	vcom = read_vcom_from_vendor();
+	if (vcom <= 0) {
+		printf("read vcom from vendor failed, use default vcom\n");
+		priv->vcom = VCOM_DEFAULT_VALUE;
+	} else {
+		priv->vcom = vcom;
+	}
+
+	if (priv->ebc_pwr_dev) {
+		struct rk_ebc_pwr_ops *pwr_ops;
+
+		pwr_ops = ebc_pwr_get_ops(priv->ebc_pwr_dev);
+		ret = pwr_ops->vcom_set(priv->ebc_pwr_dev, priv->vcom);
+		if (ret) {
+			printf("%s, vcom_set failed\n", __func__);
+			return -EIO;
+		}
+	}
+
+	// read lut to ram, and get lut ops
+	ret = read_waveform(dev);
+	if (ret < 0) {
+		printf("read wavform failed\n");
+		return -EIO;
+	}
+
+	eink_dev = dev;
+	return 0;
+}
+
+static int rockchip_eink_display_ofdata_to_platdata(struct udevice *dev)
+{
+	fdt_size_t size;
+	fdt_addr_t tmp_addr;
+	struct device_node *disp_mem;
+	struct device_node *waveform_mem;
+	struct ebc_panel *plat = dev_get_platdata(dev);
+
+	plat->width = dev_read_u32_default(dev, "panel,width", 0);
+	plat->height = dev_read_u32_default(dev, "panel,height", 0);
+	plat->sdck = dev_read_u32_default(dev, "panel,sdck", 0);
+	plat->lsl = dev_read_u32_default(dev, "panel,lsl", 0);
+	plat->lbl = dev_read_u32_default(dev, "panel,lbl", 0);
+	plat->ldl = dev_read_u32_default(dev, "panel,ldl", 0);
+	plat->lel = dev_read_u32_default(dev, "panel,lel", 0);
+	plat->gdck_sta = dev_read_u32_default(dev, "panel,gdck-sta", 0);
+	plat->lgonl = dev_read_u32_default(dev, "panel,lgonl", 0);
+	plat->fsl = dev_read_u32_default(dev, "panel,fsl", 0);
+	plat->fbl = dev_read_u32_default(dev, "panel,fbl", 0);
+	plat->fdl = dev_read_u32_default(dev, "panel,fdl", 0);
+	plat->fel = dev_read_u32_default(dev, "panel,fel", 0);
+	plat->panel_16bit = dev_read_u32_default(dev, "panel,panel_16bit", 0);
+	plat->panel_color = dev_read_u32_default(dev, "panel,panel_color", 0);
+	plat->mirror = dev_read_u32_default(dev, "panel,mirror", 0);
+	plat->width_mm = dev_read_u32_default(dev, "panel,width-mm", 0);
+	plat->height_mm = dev_read_u32_default(dev, "panel,height-mm", 0);
+
+	disp_mem = of_parse_phandle(ofnode_to_np(dev_ofnode(dev)),
+				    "memory-region", 0);
+	if (!disp_mem) {
+		dev_err(dev, "Cannot get memory-region from dts\n");
+		return -ENODEV;
+	}
+	tmp_addr = ofnode_get_addr_size(np_to_ofnode(disp_mem), "reg", &size);
+	if (tmp_addr == FDT_ADDR_T_NONE) {
+		printf("get display memory address failed\n");
+		return -ENODEV;
+	}
+
+	plat->disp_pbuf = (u64)map_sysmem(tmp_addr, 0);
+	plat->disp_pbuf_size = size;
+	debug("display mem=0x%x, size=%x\n", plat->disp_pbuf,
+	      plat->disp_pbuf_size);
+	waveform_mem = of_parse_phandle(ofnode_to_np(dev_ofnode(dev)),
+					"waveform-region", 0);
+	if (!waveform_mem) {
+		printf("Cannot get waveform-region from dts\n");
+		return -ENODEV;
+	}
+	tmp_addr = ofnode_get_addr_size(np_to_ofnode(waveform_mem),
+					"reg", &size);
+	if (tmp_addr == FDT_ADDR_T_NONE) {
+		printf("get waveform memory address failed\n");
+		return -ENODEV;
+	}
+
+	plat->lut_pbuf = map_sysmem(tmp_addr, 0);
+	plat->lut_pbuf_size = size;
+	debug("lut mem=0x%p, size=%x\n", plat->lut_pbuf, plat->lut_pbuf_size);
+	return 0;
+}
+
+static const struct udevice_id rockchip_eink_display_ids[] = {
+	{ .compatible = "rockchip,ebc-dev", },
+	{}
+};
+
+U_BOOT_DRIVER(rk_eink_display) = {
+	.name = "rockchip_eink_display",
+	.id = UCLASS_EINK_DISPLAY,
+	.of_match = rockchip_eink_display_ids,
+	.ofdata_to_platdata = rockchip_eink_display_ofdata_to_platdata,
+	.probe = rockchip_eink_display_probe,
+	.priv_auto_alloc_size = sizeof(struct rockchip_eink_display_priv),
+	.platdata_auto_alloc_size = sizeof(struct ebc_panel),
+};
+
+UCLASS_DRIVER(rk_eink) = {
+	.id	= UCLASS_EINK_DISPLAY,
+	.name	= "rk_eink",
+};
+
diff --git a/drivers/video/rk_eink/tps65185.c b/drivers/video/rk_eink/tps65185.c
new file mode 100644
index 0000000000..5d9802c857
--- /dev/null
+++ b/drivers/video/rk_eink/tps65185.c
@@ -0,0 +1,461 @@
+/*
+ * (C) Copyright 2020 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <i2c.h>
+#include <asm/gpio.h>
+#include "rk_ebc.h"
+
+#define msleep(a)		udelay((a) * 1000)
+
+struct tps65185_priv_data {
+	struct udevice *dev;
+	struct gpio_desc pwr_up_gpio;
+	struct gpio_desc vcom_gpio;
+	struct gpio_desc wake_up_gpio;
+	u8 rev_id;
+	u8 vadj;
+	u8 vcom1;
+	u8 vcom2;
+	u8 upseq0;
+	u8 upseq1;
+	u8 dwnseq0;
+	u8 dwnseq1;
+	u8 shadow_en;
+};
+
+#define REG_TMST_VALUE		0x00
+#define REG_ENABLE		0x01
+#define REG_VADJ		0x02
+#define REG_VCOM1_ADJUST	0x03
+#define REG_VCOM2_ADJUST	0x04
+#define REG_INT_ENABLE1		0x05
+#define REG_INT_ENABLE2		0x06
+#define REG_INT_STATUS1		0x07
+#define REG_INT_STATUS2		0x08
+#define REG_UPSEQ0		0x09
+#define REG_UPSEQ1		0x0a
+#define REG_DWNSEQ0		0x0b
+#define REG_DWNSEQ1		0x0c
+#define REG_TMST1		0x0d
+#define REG_TMST2		0x0e
+#define REG_PG_STATUS		0x0f
+#define REG_REVID		0x10
+#define mv_to_vcom1_reg(mv)	(((mv) / 10) & 0xff)
+#define mv_to_vcom2_reg(mv)	((((mv) / 10) & 0x100) >> 8)
+
+/*
+ * After waking up from sleep, Papyrus
+ * waits for VN to be discharged and all
+ * voltage ref to startup before loading
+ * the default EEPROM settings. So accessing
+ * registers too early after WAKEUP could
+ * cause the register to be overridden by
+ * default values
+ */
+#define PAPYRUS_EEPROM_DELAY_MS 50
+/*
+ * Papyrus WAKEUP pin must stay low for
+ * a minimum time
+ */
+#define PAPYRUS_SLEEP_MINIMUM_MS 110
+/*
+ * Temp sensor might take a little time to
+ * settle even though the status bit in TMST1
+ * state conversion is done - if read too early
+ * 0C will be returned instead of the right temp
+ */
+#define PAPYRUS_TEMP_READ_TIME_MS 10
+
+/*
+ * Powerup sequence takes at least 24 ms
+ * - no need to poll too frequently
+ */
+#define HW_GET_STATE_INTERVAL_MS 24
+
+#define SEQ_VDD(index)	(((index) % 4) << 6)
+#define SEQ_VPOS(index)	(((index) % 4) << 4)
+#define SEQ_VEE(index)	(((index) % 4) << 2)
+#define SEQ_VNEG(index)	(((index) % 4) << 0)
+
+/* power up seq delay time */
+#define UDLY_3ms(index)		(0x00 << (((index) % 4) * 2))
+#define UDLY_6ms(index)		(0x01 << (((index) % 4) * 2))
+#define UDLY_9ms(index)		(0x10 << (((index) % 4) * 2))
+#define UDLY_12ms(index)	(0x11 << (((index) % 4) * 2))
+
+/* power down seq delay time */
+#define DDLY_6ms(index)		(0x00 << (((index) % 4) * 2))
+#define DDLY_12ms(index)	(0x01 << (((index) % 4) * 2))
+#define DDLY_24ms(index)	(0x10 << (((index) % 4) * 2))
+#define DDLY_48ms(index)	(0x11 << (((index) % 4) * 2))
+
+#define NUMBER_PMIC_REGS		10
+// INT_ENABLE1
+#define PAPYRUS_INT_ENABLE1_ACQC_EN	1
+#define PAPYRUS_INT_ENABLE1_PRGC_EN	0
+
+// INT_STATUS1
+#define PAPYRUS_INT_STATUS1_ACQC	1
+#define PAPYRUS_INT_STATUS1_PRGC	0
+
+// VCOM2_ADJUST
+#define PAPYRUS_VCOM2_ACQ		7
+#define PAPYRUS_VCOM2_PROG		6
+#define PAPYRUS_VCOM2_HIZ		5
+#define V3P3_EN_MASK			0x20
+
+#define PAPYRUS_V3P3OFF_DELAY_MS	20//100
+
+static struct udevice *pmic_dev;
+
+int tps65185_i2c_write(struct tps65185_priv_data *priv_data, u8 reg, u8 val)
+{
+	int ret;
+	u8 buf[2];
+	struct i2c_msg msg;
+	struct dm_i2c_chip *chip = dev_get_parent_platdata(priv_data->dev);
+
+	buf[0] = reg;
+	buf[1] = val;
+	msg.addr = chip->chip_addr;
+	msg.flags = 0;
+	msg.len = 2;
+	msg.buf = buf;
+
+	ret = dm_i2c_xfer(priv_data->dev, &msg, 1);
+	if (ret) {
+		printf("tps65185 i2c write failed: %d\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+int tps65185_i2c_read(struct tps65185_priv_data *priv_data, u8 reg, u8 *val)
+{
+	int ret;
+	u8 data;
+	struct dm_i2c_chip *chip = dev_get_parent_platdata(priv_data->dev);
+	struct i2c_msg msg[] = {
+		{
+			.addr = chip->chip_addr,
+			.flags = 0,
+			.buf = (u8 *)&reg,
+			.len = 1,
+		}, {
+			.addr = chip->chip_addr,
+			.flags = I2C_M_RD,
+			.buf = (u8 *)&data,
+			.len = 1,
+		}
+	};
+
+	ret = dm_i2c_xfer(priv_data->dev, msg, 2);
+	if (ret) {
+		printf("tps65185 i2c read failed: %d\n", ret);
+		return ret;
+	}
+
+	*val = data;
+
+	return 0;
+}
+
+void tps65185_dump_registers(void)
+{
+	u8 i, reg = 0;
+	struct tps65185_priv_data *priv_data = dev_get_priv(pmic_dev);
+
+	for (i = 0; i <= REG_REVID; i++) {
+		tps65185_i2c_read(priv_data, i, &reg);
+		printf("0x%x\t", reg);
+	}
+	printf("\n");
+}
+
+static int tps65185_read_vcom_value(struct tps65185_priv_data *priv_data,
+				    u32 *vcom_read)
+{
+	int ret;
+	u8 vcom_reg;
+
+	dm_gpio_set_value(&priv_data->wake_up_gpio, 0);
+	msleep(10);
+	dm_gpio_set_value(&priv_data->wake_up_gpio, 1);
+	msleep(10);
+	ret = tps65185_i2c_read(priv_data, REG_VCOM1_ADJUST, &vcom_reg);
+	if (ret) {
+		printf("read vcom failed: %d\n", ret);
+		return ret;
+	}
+	*vcom_read = vcom_reg;
+	ret = tps65185_i2c_read(priv_data, REG_VCOM2_ADJUST, &vcom_reg);
+	if (ret) {
+		printf("read vcom failed: %d\n", ret);
+		return ret;
+	}
+	*vcom_read += (vcom_reg & 0x1) << 8;
+
+	printf("read vcom value: %d\n", *vcom_read);
+
+	return 0;
+}
+
+static int tps65185_set_vcom_value(struct udevice *dev, u32 set_value)
+{
+	int ret = 0;
+	u32 vcom_readback = 0;
+	u8 vcom1_val, vcom2_val, int_stat = 0;
+	struct tps65185_priv_data *priv_data = dev_get_priv(dev);
+
+	ret = tps65185_read_vcom_value(priv_data, &vcom_readback);
+	if (ret < 0) {
+		printf("tps65185 read vcom value failed\n");
+	} else {
+		if (vcom_readback == set_value / 10) {
+			printf("Same as pmic default value, just return.\n");
+			return 0;
+		}
+	}
+
+	vcom1_val = mv_to_vcom1_reg(set_value);
+	vcom2_val = mv_to_vcom2_reg(set_value);
+
+	dm_gpio_set_value(&priv_data->wake_up_gpio, 1);
+	msleep(20);
+	// Set vcom voltage
+	tps65185_i2c_write(priv_data, REG_VCOM1_ADJUST, vcom1_val);
+	tps65185_i2c_write(priv_data, REG_VCOM2_ADJUST, vcom2_val);
+	// PROGRAMMING
+	tps65185_i2c_write(priv_data, REG_VCOM2_ADJUST,
+			   vcom2_val | (1 << PAPYRUS_VCOM2_PROG));
+	do {
+		msleep(20);
+		ret = tps65185_i2c_read(priv_data, REG_INT_STATUS1, &int_stat);
+		if (ret) {
+			printf("read status1 failed: %d\n", ret);
+			break;
+		}
+	} while (!(int_stat & (1 << PAPYRUS_INT_STATUS1_PRGC)));
+
+	// VERIFICATION
+	tps65185_read_vcom_value(priv_data, &vcom_readback);
+
+	if (vcom_readback != set_value / 10) {
+		printf("vcom set failed, expect: %d, readback: %d\n",
+		       set_value, vcom_readback);
+		return -1;
+	}
+
+	return 0;
+}
+
+static bool tps65185_hw_power_ack(struct tps65185_priv_data *priv_data, int up)
+{
+	u8 pg_status;
+	int st, ret, retries_left = 10;
+
+	do {
+		ret = tps65185_i2c_read(priv_data, REG_PG_STATUS, &pg_status);
+		if (ret)
+			printf("read REG_PG_STATUS failed: %d\n", ret);
+
+		pg_status &= 0xfa;
+		if (pg_status == 0xfa && up == 1) {
+			st = 1;
+		} else if (pg_status == 0x00 && up == 0) {
+			st = 0;
+		} else {
+			st = -1;	/* not settled yet */
+			msleep(HW_GET_STATE_INTERVAL_MS);
+		}
+		retries_left--;
+	} while ((st == -1) && retries_left);
+
+	if ((st == -1) && !retries_left)
+		printf("power %s settle error (PG = %02x)\n",
+		       up ? "up" : "down", pg_status);
+
+	return (st == up);
+}
+
+static int tps65185_power_on(struct udevice *dev)
+{
+	struct tps65185_priv_data *priv_data = dev_get_priv(dev);
+
+	tps65185_i2c_write(priv_data, REG_VADJ, priv_data->vadj);
+	tps65185_i2c_write(priv_data, REG_UPSEQ0, priv_data->upseq0);
+	tps65185_i2c_write(priv_data, REG_UPSEQ1, priv_data->upseq1);
+	tps65185_i2c_write(priv_data, REG_DWNSEQ0, priv_data->dwnseq0);
+	tps65185_i2c_write(priv_data, REG_DWNSEQ1, priv_data->dwnseq1);
+
+	priv_data->shadow_en |= V3P3_EN_MASK;
+	tps65185_i2c_write(priv_data, REG_ENABLE, priv_data->shadow_en);
+	msleep(PAPYRUS_V3P3OFF_DELAY_MS);
+	priv_data->shadow_en = (0x80 | 0x30 | 0x0F);
+	tps65185_i2c_write(priv_data, REG_ENABLE, priv_data->shadow_en);
+
+	tps65185_hw_power_ack(priv_data, 1);
+	return 0;
+}
+
+static int tps65185_power_down(struct udevice *dev)
+{
+	struct tps65185_priv_data *priv_data = dev_get_priv(dev);
+
+	priv_data->shadow_en = (0x40 | 0x20 | 0x0F);
+	tps65185_i2c_write(priv_data, REG_ENABLE, priv_data->shadow_en);
+	msleep(PAPYRUS_V3P3OFF_DELAY_MS);
+	priv_data->shadow_en &= ~V3P3_EN_MASK;
+	tps65185_i2c_write(priv_data, REG_ENABLE, priv_data->shadow_en);
+
+	tps65185_hw_power_ack(priv_data, 0);
+
+	return 0;
+}
+
+static int tps65185_temp_get(struct udevice *dev, u32 *temp)
+{
+	int ret;
+	u8 read_val = 0;
+	struct tps65185_priv_data *priv_data = dev_get_priv(dev);
+
+	tps65185_i2c_write(priv_data, REG_TMST1, 0x80);
+	tps65185_i2c_write(priv_data, REG_TMST1, 0x80);
+	do {
+		int retry_time = 100;
+
+		ret = tps65185_i2c_read(priv_data, REG_TMST1, &read_val);
+		if (ret < 0) {
+			printf("read REG_TMST1 failed: %d\n", ret);
+			return ret;
+		}
+		if (retry_time-- == 0) {
+			printf("read REG_TMST1 retry 100 times\n");
+			break;
+		}
+		debug("read_val = 0x%x\n", read_val);
+	} while (((read_val & 0x20) == 0 || (read_val & 0x80)));
+
+	mdelay(PAPYRUS_TEMP_READ_TIME_MS);
+	ret = tps65185_i2c_read(priv_data, REG_TMST_VALUE, &read_val);
+	if (ret) {
+		printf("read REG_TMST_VALUE failed: %d\n", ret);
+		return ret;
+	}
+	*temp = (u32)read_val;
+
+	return 0;
+}
+
+static int tps65185_hw_init(struct udevice *dev)
+{
+	int ret;
+	u8 rev_id = 0;
+	struct tps65185_priv_data *priv_data = dev_get_priv(dev);
+
+	dm_gpio_set_value(&priv_data->wake_up_gpio, 0);
+	mdelay(PAPYRUS_SLEEP_MINIMUM_MS);
+	dm_gpio_set_value(&priv_data->wake_up_gpio, 1);
+	dm_gpio_set_value(&priv_data->pwr_up_gpio, 0);
+	dm_gpio_set_value(&priv_data->vcom_gpio, 1);
+	mdelay(PAPYRUS_EEPROM_DELAY_MS);
+	ret = tps65185_i2c_read(priv_data, REG_REVID, &rev_id);
+	if (ret) {
+		printf("read revid failed: %d\n", ret);
+		return ret;
+	}
+
+	if (rev_id > 0)
+		printf("detected device with ID=%02x (TPS6518%dr%dp%d)\n",
+		       rev_id, rev_id & 0xF, (rev_id & 0xC0) >> 6,
+		       (rev_id & 0x30) >> 4);
+
+	tps65185_i2c_write(priv_data, REG_ENABLE, priv_data->shadow_en);
+	priv_data->rev_id = rev_id;
+	printf("rev_id=%x\n", rev_id);
+	return 0;
+}
+
+static void tps65185_init_arg(struct tps65185_priv_data *priv_data)
+{
+	priv_data->vadj = 0x03;
+
+	priv_data->upseq0 = SEQ_VEE(0) | SEQ_VNEG(1)
+				| SEQ_VPOS(2) | SEQ_VDD(3);
+	priv_data->upseq1 = UDLY_3ms(0) | UDLY_3ms(1)
+				| UDLY_3ms(2) | UDLY_3ms(3);
+
+	priv_data->dwnseq0 = SEQ_VDD(0) | SEQ_VPOS(1)
+				| SEQ_VNEG(2) | SEQ_VEE(3);
+	priv_data->dwnseq1 = DDLY_6ms(0) | DDLY_6ms(1)
+				| DDLY_6ms(2) | DDLY_6ms(3);
+
+	priv_data->vcom1 = mv_to_vcom1_reg(1560);
+	priv_data->vcom2 = mv_to_vcom2_reg(1560);
+	priv_data->shadow_en = 0;
+}
+
+static int tps65185_probe(struct udevice *dev)
+{
+	int ret;
+	struct tps65185_priv_data *tps65185_priv = dev_get_priv(dev);
+
+	tps65185_priv->dev = dev;
+	pmic_dev = dev;
+	tps65185_init_arg(tps65185_priv);
+
+	ret = gpio_request_by_name(dev, "wakeup-gpios", 0,
+				   &tps65185_priv->wake_up_gpio, GPIOD_IS_OUT);
+	if (ret) {
+		printf("Cannot get wakeup_pin GPIO: %d\n", ret);
+		return ret;
+	}
+	ret = gpio_request_by_name(dev, "powerup-gpios", 0,
+				   &tps65185_priv->pwr_up_gpio, GPIOD_IS_OUT);
+	if (ret) {
+		printf("Cannot get pwr_up_gpio GPIO: %d\n", ret);
+		return ret;
+	}
+	ret = gpio_request_by_name(dev, "vcomctl-gpios", 0,
+				   &tps65185_priv->vcom_gpio, GPIOD_IS_OUT);
+	if (ret) {
+		printf("Cannot get vcom_gpio GPIO: %d\n", ret);
+		return ret;
+	}
+	ret = tps65185_hw_init(dev);
+	if (ret) {
+		printf("Cannot init hardware for tps65185: %d\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+const struct rk_ebc_pwr_ops tps65185_funcs = {
+	.power_on = tps65185_power_on,
+	.power_down = tps65185_power_down,
+	.temp_get = tps65185_temp_get,
+	.vcom_set = tps65185_set_vcom_value,
+};
+
+static const struct udevice_id ebc_power_of_match[] = {
+	{ .compatible = "ti,tps65185" },
+	{}
+};
+
+U_BOOT_DRIVER(tps65185_ebc_pwr) = {
+	.name = "tps65185_ebc_pwr",
+	.id = UCLASS_I2C_GENERIC,
+	.of_match = ebc_power_of_match,
+	.probe = tps65185_probe,
+	.ops = &tps65185_funcs,
+	.bind = dm_scan_fdt_dev,
+	.priv_auto_alloc_size = sizeof(struct tps65185_priv_data),
+};
+
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 117bf7d4fe..638bf15ede 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -107,6 +107,8 @@ enum uclass_id {
 	UCLASS_CRYPTO,		/* Crypto */
 	UCLASS_ETH_PHY,		/* Ethernet PHY device */
 	UCLASS_MDIO,		/* MDIO bus */
+	UCLASS_EBC,		/* EBC Controller for eink screen */
+	UCLASS_EINK_DISPLAY,	/* EINK screen display driver */
 	UCLASS_COUNT,
 	UCLASS_INVALID = -1,
 };
diff --git a/include/rk_eink.h b/include/rk_eink.h
new file mode 100644
index 0000000000..7bff50c0af
--- /dev/null
+++ b/include/rk_eink.h
@@ -0,0 +1,31 @@
+/*
+ * (C) Copyright 2020 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef RK_EINK_H
+#define RK_EINK_H
+
+enum type_logo {
+	EINK_LOGO_RESET = 0,
+	EINK_LOGO_UBOOT = 1 << 0,
+	EINK_LOGO_KERNEL = 1 << 1,
+	EINK_LOGO_CHARGING_0 = 1 << 2,
+	EINK_LOGO_CHARGING_1 = 1 << 3,
+	EINK_LOGO_CHARGING_2 = 1 << 4,
+	EINK_LOGO_CHARGING_3 = 1 << 5,
+	EINK_LOGO_CHARGING_4 = 1 << 6,
+	EINK_LOGO_CHARGING_5 = 1 << 7,
+	EINK_LOGO_CHARGING_LOWPOWER = 1 << 8,
+};
+
+enum update_mode {
+	EINK_UPDATE_NORMAL = 0,
+	EINK_UPDATE_DIFF = 1,
+};
+
+int rockchip_eink_show_uboot_logo(void);
+int rockchip_eink_show_charge_logo(int logo_type);
+
+#endif

commit 78263d89a3fb69a53feddc24590b32e616d5b612
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Dec 10 15:59:22 2020 +0800

    rsa: support write public hash in spl
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I4120d0cad1cb24b45c3b281649e1eba520a11ee2

diff --git a/common/image-sig.c b/common/image-sig.c
index 2dbfec5062..97f4b558f1 100644
--- a/common/image-sig.c
+++ b/common/image-sig.c
@@ -424,6 +424,12 @@ int fit_config_check_sig(const void *fit, int noffset, int required_keynode,
 		*err_msgp = "Verification failed";
 		return -1;
 	}
+	/* Get the secure flag here and write the secure data and the secure flag */
+#if !defined(USE_HOSTCC)
+#ifdef CONFIG_SPL_FIT_HW_CRYPTO
+	rsa_burn_key_hash(&info);
+#endif
+#endif
 
 	return 0;
 }
diff --git a/include/u-boot/rsa-mod-exp.h b/include/u-boot/rsa-mod-exp.h
index ae78773bb8..cb99ac6e61 100644
--- a/include/u-boot/rsa-mod-exp.h
+++ b/include/u-boot/rsa-mod-exp.h
@@ -21,6 +21,7 @@
 struct key_prop {
 	const void *rr;		/* R^2 can be treated as byte array */
 	const void *modulus;	/* modulus as byte array */
+	uint32_t burn_key;	/* The flag to burn key's hash */
 	const void *public_exponent; /* public exponent as byte array */
 	const void *public_exponent_BN; /* public exponent as byte array */
 #ifdef CONFIG_ROCKCHIP_CRYPTO_V1
@@ -28,6 +29,7 @@ struct key_prop {
 #else
 	const void *factor_np;	/* rockchip crypto v2 accelerate factor */
 #endif
+	const void *hash;	/* the key hash */
 	uint32_t n0inv;		/* -1 / modulus[0] mod 2^32 */
 	int num_bits;		/* Key length in bits */
 	uint32_t exp_len;	/* Exponent length in number of uint8_t */
diff --git a/include/u-boot/rsa.h b/include/u-boot/rsa.h
index a1dad7194e..e2438ab473 100644
--- a/include/u-boot/rsa.h
+++ b/include/u-boot/rsa.h
@@ -103,6 +103,12 @@ int padding_pkcs_15_verify(struct image_sign_info *info,
 			   uint8_t *msg, int msg_len,
 			   const uint8_t *hash, int hash_len);
 
+#if !defined(USE_HOSTCC)
+#ifdef CONFIG_SPL_FIT_HW_CRYPTO
+int rsa_burn_key_hash(struct image_sign_info *info);
+#endif
+#endif
+
 #ifdef CONFIG_FIT_ENABLE_RSASSA_PSS_SUPPORT
 int padding_pss_verify(struct image_sign_info *info,
 		       uint8_t *msg, int msg_len,
diff --git a/lib/rsa/rsa-verify.c b/lib/rsa/rsa-verify.c
index 8fb3726327..ecd9020a5e 100644
--- a/lib/rsa/rsa-verify.c
+++ b/lib/rsa/rsa-verify.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <crypto.h>
 #include <fdtdec.h>
+#include <misc.h>
 #include <asm/types.h>
 #include <asm/byteorder.h>
 #include <linux/errno.h>
@@ -414,72 +415,88 @@ static int rsa_verify_key(struct image_sign_info *info,
 	return 0;
 }
 
-/**
- * rsa_verify_with_keynode() - Verify a signature against some data using
- * information in node with prperties of RSA Key like modulus, exponent etc.
- *
- * Parse sign-node and fill a key_prop structure with properties of the
- * key.  Verify a RSA PKCS1.5 signature against an expected hash using
- * the properties parsed
- *
- * @info:	Specifies key and FIT information
- * @hash:	Pointer to the expected hash
- * @sig:	Signature
- * @sig_len:	Number of bytes in signature
- * @node:	Node having the RSA Key properties
- * @return 0 if verified, -ve on error
- */
-static int rsa_verify_with_keynode(struct image_sign_info *info,
-				   const void *hash, uint8_t *sig,
-				   uint sig_len, int node)
+static int rsa_get_key_prop(struct key_prop *prop, struct image_sign_info *info, int node)
 {
 	const void *blob = info->fdt_blob;
-	struct key_prop prop;
 	int length;
-	int ret = 0;
+	int hash_node;
 
 	if (node < 0) {
 		debug("%s: Skipping invalid node", __func__);
 		return -EBADF;
 	}
 
-	prop.num_bits = fdtdec_get_int(blob, node, "rsa,num-bits", 0);
+	if (!prop) {
+		debug("%s: The prop is NULL", __func__);
+		return -EBADF;
+	}
 
-	prop.n0inv = fdtdec_get_int(blob, node, "rsa,n0-inverse", 0);
+	prop->burn_key = fdtdec_get_int(blob, node, "burn-key-hash", 0);
 
-	prop.public_exponent = fdt_getprop(blob, node, "rsa,exponent", &length);
-	if (!prop.public_exponent || length < sizeof(uint64_t))
-		prop.public_exponent = NULL;
+	prop->num_bits = fdtdec_get_int(blob, node, "rsa,num-bits", 0);
 
-	prop.exp_len = sizeof(uint64_t);
+	prop->n0inv = fdtdec_get_int(blob, node, "rsa,n0-inverse", 0);
 
-	prop.modulus = fdt_getprop(blob, node, "rsa,modulus", NULL);
-	prop.public_exponent_BN = fdt_getprop(blob, node, "rsa,exponent-BN", NULL);
+	prop->public_exponent = fdt_getprop(blob, node, "rsa,exponent", &length);
+	if (!prop->public_exponent || length < sizeof(uint64_t))
+		prop->public_exponent = NULL;
 
-	prop.rr = fdt_getprop(blob, node, "rsa,r-squared", NULL);
+	prop->exp_len = sizeof(uint64_t);
+	prop->modulus = fdt_getprop(blob, node, "rsa,modulus", NULL);
+	prop->public_exponent_BN = fdt_getprop(blob, node, "rsa,exponent-BN", NULL);
+	prop->rr = fdt_getprop(blob, node, "rsa,r-squared", NULL);
+#ifdef CONFIG_ROCKCHIP_CRYPTO_V1
+	hash_node = fdt_subnode_offset(blob, node, "hash@c");
+#else
+	hash_node = fdt_subnode_offset(blob, node, "hash@np");
+#endif
+	if (hash_node >= 0)
+		prop->hash = fdt_getprop(blob, hash_node, "value", NULL);
 
-	if (!prop.num_bits || !prop.modulus) {
+	if (!prop->num_bits || !prop->modulus) {
 		debug("%s: Missing RSA key info", __func__);
 		return -EFAULT;
 	}
 
-#if !defined(USE_HOSTCC)
-#if CONFIG_IS_ENABLED(FIT_HW_CRYPTO)
 #ifdef CONFIG_ROCKCHIP_CRYPTO_V1
-	prop.factor_c = fdt_getprop(blob, node, "rsa,c", NULL);
+	prop->factor_c = fdt_getprop(blob, node, "rsa,c", NULL);
 	if (!prop.factor_c)
 		return -EFAULT;
 #else
-	prop.factor_np = fdt_getprop(blob, node, "rsa,np", NULL);
-	if (!prop.factor_np)
+	prop->factor_np = fdt_getprop(blob, node, "rsa,np", NULL);
+	if (!prop->factor_np)
 		return -EFAULT;
 #endif
-#endif
-#endif
-	ret = rsa_verify_key(info, &prop, sig, sig_len, hash,
-			     info->crypto->key_len);
 
-	return ret;
+	return 0;
+}
+
+/**
+ * rsa_verify_with_keynode() - Verify a signature against some data using
+ * information in node with prperties of RSA Key like modulus, exponent etc.
+ *
+ * Parse sign-node and fill a key_prop structure with properties of the
+ * key.  Verify a RSA PKCS1.5 signature against an expected hash using
+ * the properties parsed
+ *
+ * @info:	Specifies key and FIT information
+ * @hash:	Pointer to the expected hash
+ * @sig:	Signature
+ * @sig_len:	Number of bytes in signature
+ * @node:	Node having the RSA Key properties
+ * @return 0 if verified, -ve on error
+ */
+static int rsa_verify_with_keynode(struct image_sign_info *info,
+				   const void *hash, uint8_t *sig,
+				   uint sig_len, int node)
+{
+	struct key_prop prop;
+
+	if (rsa_get_key_prop(&prop, info, node))
+		return -EFAULT;
+
+	return rsa_verify_key(info, &prop, sig, sig_len, hash,
+			      info->crypto->key_len);
 }
 
 int rsa_verify(struct image_sign_info *info,
@@ -548,3 +565,121 @@ int rsa_verify(struct image_sign_info *info,
 
 	return ret;
 }
+
+#if !defined(USE_HOSTCC)
+#ifdef CONFIG_SPL_FIT_HW_CRYPTO
+int rsa_burn_key_hash(struct image_sign_info *info)
+{
+	char *rsa_key;
+	void *n, *e, *c;
+	uint32_t key_len;
+	struct udevice *dev;
+	struct key_prop prop;
+	char name[100] = {0};
+	char secure_boot_enable = 0;
+	const void *blob = info->fdt_blob;
+	uint8_t digest[FIT_MAX_HASH_LEN];
+	uint8_t digest_read[FIT_MAX_HASH_LEN];
+	int sig_node, node, digest_len, i, ret = 0;
+
+	dev = misc_otp_get_device(OTP_S);
+	if (!dev)
+		return -ENODEV;
+
+	ret = misc_otp_read(dev, OTP_SECURE_BOOT_ENABLE_ADDR,
+			    &secure_boot_enable, OTP_SECURE_BOOT_ENABLE_SIZE);
+	if (ret)
+		return ret;
+
+	if (secure_boot_enable)
+		return 0;
+
+	sig_node = fdt_subnode_offset(blob, 0, FIT_SIG_NODENAME);
+	if (sig_node < 0) {
+		debug("%s: No signature node found\n", __func__);
+		return -ENOENT;
+	}
+
+	snprintf(name, sizeof(name), "key-%s", info->keyname);
+	node = fdt_subnode_offset(blob, sig_node, name);
+
+	if (rsa_get_key_prop(&prop, info, node))
+		return -1;
+
+	if (!(prop.burn_key))
+		return -EPERM;
+
+	if (!prop.hash || !prop.modulus || !prop.public_exponent_BN)
+		return -ENOENT;
+#ifdef CONFIG_ROCKCHIP_CRYPTO_V1
+	if (!prop.factor_c)
+		return -ENOENT;
+#else
+	if (!prop.factor_np)
+		return -ENOENT;
+#endif
+	key_len = info->crypto->key_len;
+	if (info->crypto->key_len != RSA2048_BYTES)
+		return -EINVAL;
+
+	rsa_key = malloc(key_len * 3);
+	if (!rsa_key)
+		return -ENOMEM;
+
+	n = rsa_key;
+	e = rsa_key + key_len;
+	c = rsa_key + key_len * 2;
+	rsa_convert_big_endian(n, (uint32_t *)prop.modulus,
+			       key_len / sizeof(uint32_t));
+	rsa_convert_big_endian(e, (uint32_t *)prop.public_exponent_BN,
+			       key_len / sizeof(uint32_t));
+#ifdef CONFIG_ROCKCHIP_CRYPTO_V1
+	rsa_convert_big_endian(c, (uint32_t *)prop.factor_c,
+			       key_len / sizeof(uint32_t));
+#else
+	rsa_convert_big_endian(c, (uint32_t *)prop.factor_np,
+			       key_len / sizeof(uint32_t));
+#endif
+
+	ret = calculate_hash(rsa_key, key_len * 2 + OTP_RSA2048_C_SIZE,
+			     info->checksum->name, digest, &digest_len);
+	if (ret)
+		goto error;
+
+	if (memcmp(digest, prop.hash, digest_len) != 0) {
+		printf("RSA: Compare public key fail.\n");
+		goto error;
+	}
+
+	/* burn key hash here */
+	ret = misc_otp_read(dev, OTP_RSA_HASH_ADDR, digest_read, OTP_RSA_HASH_SIZE);
+	if (ret)
+		goto error;
+
+	for (i = 0; i < OTP_RSA_HASH_SIZE; i++) {
+		if (digest_read[i]) {
+			printf("RSA: The secure region has been written.\n");
+			ret = -EIO;
+			goto error;
+		}
+	}
+
+	ret = misc_otp_write(dev, OTP_RSA_HASH_ADDR, digest, OTP_RSA_HASH_SIZE);
+	if (ret)
+		goto error;
+
+	secure_boot_enable = 0xff;
+	ret = misc_otp_write(dev, OTP_SECURE_BOOT_ENABLE_ADDR,
+			     &secure_boot_enable, OTP_SECURE_BOOT_ENABLE_SIZE);
+	if (ret)
+		goto error;
+
+	printf("RSA：Write key hash successfully\n");
+
+error:
+	free(rsa_key);
+
+	return ret;
+}
+#endif
+#endif

commit 5c0419f0831a21f830f6f1a33e47e6f43ba01797
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Dec 10 15:55:33 2020 +0800

    rockchip: rv1126: add some defination of secure otp
    
    Include secure boot enable add rsa hash.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I70c4b030238c01ee1b569521bd5e1b03c70cbc68

diff --git a/include/configs/rv1126_common.h b/include/configs/rv1126_common.h
index 19e4d9cf99..bc2b6dd3d7 100644
--- a/include/configs/rv1126_common.h
+++ b/include/configs/rv1126_common.h
@@ -28,7 +28,7 @@
 /* SPL */
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_TEXT_BASE		0x00000000
-#define CONFIG_SPL_MAX_SIZE		0x20000
+#define CONFIG_SPL_MAX_SIZE		0x30000
 #define CONFIG_SPL_BSS_START_ADDR	0x00600000
 #define CONFIG_SPL_BSS_MAX_SIZE		0x20000
 #define CONFIG_SPL_STACK		0x00600000
@@ -40,6 +40,11 @@
 #define OTP_UBOOT_ROLLBACK_OFFSET	0x1A	/* word address */
 #define OTP_UBOOT_ROLLBACK_WORDS	2	/* 64 bits, 2 words */
 #define OTP_ALL_ONES_NUM_BITS		32
+#define OTP_SECURE_BOOT_ENABLE_ADDR	0x0
+#define OTP_SECURE_BOOT_ENABLE_SIZE	1
+#define OTP_RSA_HASH_ADDR		0x10
+#define OTP_RSA_HASH_SIZE		32
+#define OTP_RSA2048_C_SIZE		20
 
 /* MMC/SD IP block */
 #define CONFIG_BOUNCE_BUFFER

commit d4b31d104708551e51ad0a5a489903552040ac2c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Dec 4 14:47:04 2020 +0800

    Revert "rockchip: make_fit_optee/atf: add "burn-key-hash = <0>"."
    
    This reverts commit 34b05be1cbeccd3d7050c60fbba214913ed4b661.
    
    This property is added in u-boot-spl.dtb file.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I4d102c1acab2d659e4dc8ce493cfd768639ef5bb

diff --git a/arch/arm/mach-rockchip/make_fit_atf.sh b/arch/arm/mach-rockchip/make_fit_atf.sh
index c8f851fd22..258695c1b3 100755
--- a/arch/arm/mach-rockchip/make_fit_atf.sh
+++ b/arch/arm/mach-rockchip/make_fit_atf.sh
@@ -183,7 +183,6 @@ cat << EOF
 		conf {
 			description = "Rockchip armv8 with ATF";
 			rollback-index = <0x0>;
-			burn-key-hash = <0>;
 			firmware = "atf-1";
 			loadables = "uboot"${LOADABLE_ATF}${LOADABLE_OPTEE};
 			fdt = "fdt";
diff --git a/arch/arm/mach-rockchip/make_fit_optee.sh b/arch/arm/mach-rockchip/make_fit_optee.sh
index afc503bd8c..6c499c5142 100755
--- a/arch/arm/mach-rockchip/make_fit_optee.sh
+++ b/arch/arm/mach-rockchip/make_fit_optee.sh
@@ -147,7 +147,6 @@ cat  << EOF
 		conf {
 			description = "Rockchip armv7 with OP-TEE";
 			rollback-index = <0x0>;
-			burn-key-hash = <0>;
 			firmware = "optee";
 			loadables = "uboot";
 			fdt = "fdt";

commit 8d853b0626f48f2fb349473e0ff2258b2a78e5be
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 2 16:55:40 2020 +0800

    scripts: fit.sh: add "burn-key-hash = <1>" in u-boot-spl.dtb
    
    The property path: /signature/key-dev/burn-key-hash.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I6a9058d5f63ac4d98c863eaa9b726aa1deb1fb14

diff --git a/scripts/fit.sh b/scripts/fit.sh
index a1ac1ec726..8b2eac5054 100755
--- a/scripts/fit.sh
+++ b/scripts/fit.sh
@@ -228,11 +228,6 @@ function fit_gen_uboot_itb()
 			sed -i "s/rollback-index = ${VERSION}/rollback-index = <${ARG_ROLLBACK_IDX_UBOOT}>;/g" ${ITS_UBOOT}
 		fi
 
-		# burn-key-hash
-		if [ "${ARG_BURN_KEY_HASH}" == "y" ]; then
-			sed -i "s/burn-key-hash = <0>;/burn-key-hash = <1>;/g" ${ITS_UBOOT}
-		fi
-
 		# u-boot.dtb must contains rsa key
 		if ! fdtget -l ${UBOOT_DTB} /signature >/dev/null 2>&1 ; then
 			${MKIMAGE} -f ${ITS_UBOOT} -k ${KEY_DIR} -K ${UBOOT_DTB} -E -p ${OFFS_S_UBOOT} -r ${ITB_UBOOT} -v ${ARG_VER_UBOOT}
@@ -243,6 +238,10 @@ function fit_gen_uboot_itb()
 		${MKIMAGE} -f ${ITS_UBOOT} -k ${KEY_DIR} -K ${SPL_DTB} -E -p ${OFFS_S_UBOOT} -r ${ITB_UBOOT} -v ${ARG_VER_UBOOT}
 		mv ${SIG_BIN} ${SIG_UBOOT}
 
+		# burn-key-hash
+		if [ "${ARG_BURN_KEY_HASH}" == "y" ]; then
+			fdtput -tx ${SPL_DTB} ${SIGNATURE_KEY_NODE} burn-key-hash 0x1
+		fi
 		# rollback-index read back check
 		if [ "${ARG_SPL_ROLLBACK_PROTECT}" == "y" ]; then
 			VERSION=`fdtget -ti ${ITB_UBOOT} /configurations/conf rollback-index`
@@ -254,8 +253,8 @@ function fit_gen_uboot_itb()
 
 		# burn-key-hash read back check
 		if [ "${ARG_BURN_KEY_HASH}" == "y" ]; then
-			if [ "`fdtget -ti ${ITB_UBOOT} /configurations/conf burn-key-hash`" != "1" ]; then
-				echo "ERROR: Failed to set burn-key-hash for ${ITB_UBOOT}";
+			if [ "`fdtget -ti ${SPL_DTB} ${SIGNATURE_KEY_NODE} burn-key-hash`" != "1" ]; then
+				echo "ERROR: Failed to set burn-key-hash for ${SPL_DTB}";
 				exit 1
 			fi
 		fi
@@ -304,10 +303,14 @@ function fit_gen_uboot_itb()
 			cat ${SPL_DTB} >> spl/u-boot-spl.bin
 
 			./make.sh --spl ${ARG_INI_LOADER}
-			echo "pack loader with new: spl/u-boot-spl.bin"
+			echo "## pack loader with new: spl/u-boot-spl.bin"
 		else
 			./make.sh loader ${ARG_INI_LOADER}
 		fi
+
+		if [ "${ARG_BURN_KEY_HASH}" == "y" ]; then
+			echo "## ${SPL_DTB}: burn-key-hash=1"
+		fi
 	fi
 
 	rm -f u-boot.itb u-boot.img u-boot-dtb.img
@@ -457,11 +460,6 @@ function fit_msg_uboot()
 		MSG_VER=", version=${VERSION}"
 	fi
 
-	if [ "${ARG_BURN_KEY_HASH}" == "y" ]; then
-		echo "uboot.img: burn-key-hash=1"
-		echo
-	fi
-
 	if [ "${ARG_SPL_ROLLBACK_PROTECT}" == "y" ]; then
 		echo "Image(${MSG_SIGN}${MSG_VER}, rollback-index=${ARG_ROLLBACK_IDX_UBOOT}):  ${IMG_UBOOT} (with uboot, trust...) is ready"
 	else

commit 134814e52fefc9db47db469a4602f64ab0000a56
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 2 11:33:04 2020 +0800

    scripts: fit.sh: remove unused hash node of rsa key
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I9117428f812ed00f9b78971d2cabcf1e71aa0989

diff --git a/scripts/fit.sh b/scripts/fit.sh
index 676c703ca2..a1ac1ec726 100755
--- a/scripts/fit.sh
+++ b/scripts/fit.sh
@@ -281,13 +281,17 @@ function fit_gen_uboot_itb()
 			fdtput -tx ${SPL_DTB} ${SIGNATURE_KEY_NODE} rsa,r-squared 0x0
 			if grep -q '^CONFIG_SPL_ROCKCHIP_CRYPTO_V1=y' .config ; then
 				fdtput -d ${SPL_DTB} ${SIGNATURE_KEY_NODE} rsa,np
+				fdtput -r ${SPL_DTB} ${SIGNATURE_KEY_NODE}/hash@np
 			else
 				fdtput -d ${SPL_DTB} ${SIGNATURE_KEY_NODE} rsa,c
+				fdtput -r ${SPL_DTB} ${SIGNATURE_KEY_NODE}/hash@c
 			fi
 		else
 			fdtput -d ${SPL_DTB} ${SIGNATURE_KEY_NODE} rsa,c
 			fdtput -d ${SPL_DTB} ${SIGNATURE_KEY_NODE} rsa,np
 			fdtput -d ${SPL_DTB} ${SIGNATURE_KEY_NODE} rsa,exponent-BN
+			fdtput -r ${SPL_DTB} ${SIGNATURE_KEY_NODE}/hash@c
+			fdtput -r ${SPL_DTB} ${SIGNATURE_KEY_NODE}/hash@np
 		fi
 
 		# repack spl
@@ -394,6 +398,8 @@ function fit_gen_boot_itb()
 			fdtput -d ${UBOOT_DTB} ${SIGNATURE_KEY_NODE} rsa,np
 			fdtput -d ${UBOOT_DTB} ${SIGNATURE_KEY_NODE} rsa,exponent-BN
 		fi
+		fdtput -r ${UBOOT_DTB} ${SIGNATURE_KEY_NODE}/hash@c
+		fdtput -r ${UBOOT_DTB} ${SIGNATURE_KEY_NODE}/hash@np
 	fi
 
 	mv ${ITS_BOOT} ${FIT_DIR}

commit f269c7e952a4c0e2ab4c185d34d2479944c4e33b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 2 10:17:19 2020 +0800

    scripts: fit.sh: remove unused property but not initial as 0
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I3af669575ae53cd7cc72e307a07057a95b3b8955

diff --git a/scripts/fit.sh b/scripts/fit.sh
index 3b5da371f9..676c703ca2 100755
--- a/scripts/fit.sh
+++ b/scripts/fit.sh
@@ -280,14 +280,14 @@ function fit_gen_uboot_itb()
 		if grep -q '^CONFIG_SPL_FIT_HW_CRYPTO=y' .config ; then
 			fdtput -tx ${SPL_DTB} ${SIGNATURE_KEY_NODE} rsa,r-squared 0x0
 			if grep -q '^CONFIG_SPL_ROCKCHIP_CRYPTO_V1=y' .config ; then
-				fdtput -tx ${SPL_DTB} ${SIGNATURE_KEY_NODE} rsa,np 0x0
+				fdtput -d ${SPL_DTB} ${SIGNATURE_KEY_NODE} rsa,np
 			else
-				fdtput -tx ${SPL_DTB} ${SIGNATURE_KEY_NODE} rsa,c 0x0
+				fdtput -d ${SPL_DTB} ${SIGNATURE_KEY_NODE} rsa,c
 			fi
 		else
-			fdtput -tx ${SPL_DTB} ${SIGNATURE_KEY_NODE} rsa,c 0x0
-			fdtput -tx ${SPL_DTB} ${SIGNATURE_KEY_NODE} rsa,np 0x0
-			fdtput -tx ${SPL_DTB} ${SIGNATURE_KEY_NODE} rsa,exponent-BN 0x0
+			fdtput -d ${SPL_DTB} ${SIGNATURE_KEY_NODE} rsa,c
+			fdtput -d ${SPL_DTB} ${SIGNATURE_KEY_NODE} rsa,np
+			fdtput -d ${SPL_DTB} ${SIGNATURE_KEY_NODE} rsa,exponent-BN
 		fi
 
 		# repack spl
@@ -385,14 +385,14 @@ function fit_gen_boot_itb()
 		if grep -q '^CONFIG_FIT_HW_CRYPTO=y' .config ; then
 			fdtput -tx ${UBOOT_DTB} ${SIGNATURE_KEY_NODE} rsa,r-squared 0x0
 			if grep -q '^CONFIG_ROCKCHIP_CRYPTO_V1=y' .config ; then
-				fdtput -tx ${UBOOT_DTB} ${SIGNATURE_KEY_NODE} rsa,np 0x0
+				fdtput -d ${UBOOT_DTB} ${SIGNATURE_KEY_NODE} rsa,np
 			else
-				fdtput -tx ${UBOOT_DTB} ${SIGNATURE_KEY_NODE} rsa,c 0x0
+				fdtput -d ${UBOOT_DTB} ${SIGNATURE_KEY_NODE} rsa,c
 			fi
 		else
-			fdtput -tx ${UBOOT_DTB} ${SIGNATURE_KEY_NODE} rsa,c 0x0
-			fdtput -tx ${UBOOT_DTB} ${SIGNATURE_KEY_NODE} rsa,np 0x0
-			fdtput -tx ${UBOOT_DTB} ${SIGNATURE_KEY_NODE} rsa,exponent-BN 0x0
+			fdtput -d ${UBOOT_DTB} ${SIGNATURE_KEY_NODE} rsa,c
+			fdtput -d ${UBOOT_DTB} ${SIGNATURE_KEY_NODE} rsa,np
+			fdtput -d ${UBOOT_DTB} ${SIGNATURE_KEY_NODE} rsa,exponent-BN
 		fi
 	fi
 

commit b6ea0cb4adae620c68f381ac2f0a0e6d716e13f4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 2 10:17:40 2020 +0800

    lib: rsa-sign: add rockchip rsa key hash
    
    SPL requires key hash to verify and flash it to OTP/EFUSE.
    
    - hash@c:  n, e, c
    - hash@np: n, e, np
    
    / {
        signature {
            key-dev {
                required = "conf";
                algo = "sha256,rsa2048";
                rsa,np = <...>;
                rsa,c = <...>;
                rsa,modulus = <...>;
                rsa,exponent-BN = <...>;
                ...
                key-name-hint = "dev";
                hash@np {
                    algo = "sha256";
                    value = <0x0934bc4d 0xfbc31ffe 0x9224d6c2 0x1a3aa280 0x881d881e 0xe2006246 0x01b9e724 0x35c03428>;
                };
                hash@c {
                    algo = "sha256";
                    value = <0x08962385 0x34585e06 0x0b73a496 0x374b148d 0xa2700a75 0x4aae08ad 0xb2a324a3 0x95ee6b52>;
                };
            };
        };
        ...
    };
    
    But after processed by scripts/fit.sh, only one of "hash@c" and "hash@np" would be left.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Id9454100f9fdb06b30f9a4b2a7bdd180f117cb68

diff --git a/lib/rsa/rsa-sign.c b/lib/rsa/rsa-sign.c
index 39226ad4f2..9b49f6bd0b 100644
--- a/lib/rsa/rsa-sign.c
+++ b/lib/rsa/rsa-sign.c
@@ -700,6 +700,83 @@ int rsa_get_params(RSA *key, uint64_t *exponent, uint32_t *n0_invp,
 	return ret;
 }
 
+static void rsa_convert_big_endian(uint32_t *dst, const uint32_t *src, int len)
+{
+	int i;
+
+	for (i = 0; i < len; i++)
+		dst[i] = fdt32_to_cpu(src[len - 1 - i]);
+}
+
+static int rsa_set_key_hash(void *keydest, int key_node,
+			    int key_len, const char *csum_algo)
+{
+	const void *rsa_n, *rsa_e, *rsa_c, *rsa_np;
+	void *n, *e, *c, *np;
+	uint8_t value[FIT_MAX_HASH_LEN];
+	char hash_c[] = "hash@c";
+	char hash_np[] = "hash@np";
+	char *rsa_key;
+	int key_word;
+	int hash_node;
+	int value_len;
+	int ret = -ENOSPC;
+
+	rsa_key = malloc(key_len * 3);
+	if (!rsa_key)
+		return -ENOSPC;
+
+	rsa_n = fdt_getprop(keydest, key_node, "rsa,modulus", NULL);
+	rsa_e = fdt_getprop(keydest, key_node, "rsa,exponent-BN", NULL);
+	rsa_c = fdt_getprop(keydest, key_node, "rsa,c", NULL);
+	rsa_np = fdt_getprop(keydest, key_node, "rsa,np", NULL);
+	if (!rsa_c || !rsa_np || !rsa_n || !rsa_e)
+		goto err_nospc;
+
+	n = rsa_key;
+	e = rsa_key + key_len;
+	key_word = key_len / sizeof(uint32_t);
+	rsa_convert_big_endian(n, rsa_n, key_word);
+	rsa_convert_big_endian(e, rsa_e, key_word);
+
+	/* hash@c node: n, e, c */
+	c = rsa_key + key_len * 2;
+	rsa_convert_big_endian(c, rsa_c, key_word);
+	hash_node = fdt_add_subnode(keydest, key_node, hash_c);
+	if (hash_node < 0)
+		goto err_nospc;
+	ret = calculate_hash(rsa_key, key_len * 3, csum_algo, value, &value_len);
+	if (ret)
+		goto err_nospc;
+	ret = fdt_setprop(keydest, hash_node, FIT_VALUE_PROP, value, value_len);
+	if (ret)
+		goto err_nospc;
+	ret = fdt_setprop_string(keydest, hash_node, FIT_ALGO_PROP, csum_algo);
+	if (ret < 0)
+		goto err_nospc;
+
+	/* hash@np node: n, e, np */
+	np = rsa_key + key_len * 2;
+	rsa_convert_big_endian(np, rsa_np, key_word);
+	hash_node = fdt_add_subnode(keydest, key_node, hash_np);
+	if (hash_node < 0)
+		goto err_nospc;
+
+	ret = calculate_hash(rsa_key, key_len * 2 + 20, csum_algo, value, &value_len);
+	if (ret)
+		goto err_nospc;
+	ret = fdt_setprop(keydest, hash_node, FIT_VALUE_PROP, value, value_len);
+	if (ret < 0)
+		goto err_nospc;
+	ret = fdt_setprop_string(keydest, hash_node, FIT_ALGO_PROP, csum_algo);
+
+err_nospc:
+	if (rsa_key)
+		free(rsa_key);
+
+	return ret ? -ENOSPC : 0;
+}
+
 static int fdt_add_bignum(void *blob, int noffset, const char *prop_name,
 			  BIGNUM *num, int num_bits)
 {
@@ -854,6 +931,10 @@ int rsa_add_verify_data(struct image_sign_info *info, void *keydest)
 		ret = fdt_setprop_string(keydest, node, "required",
 					 info->require_keys);
 	}
+	if (!ret) {
+		ret = rsa_set_key_hash(keydest, node, info->crypto->key_len,
+				       info->checksum->name);
+	}
 done:
 	BN_free(modulus);
 	BN_free(r_squared);

commit bf8034353dba618c64711bd321bb259f1ececea8
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Wed Dec 9 10:22:38 2020 +0800

    rockchip: rk3568: fixup cru node frequency
    
    Support 25M\50M Gmac clk.
    
    Fixes: d83e3037eea9 ("rockchip: rk3568: fixup cru node for legacy
    variant chip")
    Change-Id: I89a535655dd01e779898188943d8f1e491c5753e
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c
index a202197bb7..2b6ecb0470 100644
--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
@@ -805,17 +805,17 @@ int rk_board_fdt_fixup(const void *blob)
 
 	/*
 	 * fixup as:
-	 *	rate[1] = <408000000>;	// ACLK_RKVDEC_PRE
-	 *	rate[2] = <408000000>;	// CLK_RKVDEC_CORE
-	 *	rate[5] = <408000000>;	// PLL_CPLL
+	 *	rate[1] = <400000000>;	// ACLK_RKVDEC_PRE
+	 *	rate[2] = <400000000>;	// CLK_RKVDEC_CORE
+	 *	rate[5] = <400000000>;	// PLL_CPLL
 	 */
 	pp = (u32 *)fdt_getprop(blob, node, "assigned-clock-rates", &len);
 	if (!pp)
 		return 0;
 	if ((len / 4) >= CRU_RATE_CNT_MIN) {
-		pp[1] = cpu_to_fdt32(408000000);
-		pp[2] = cpu_to_fdt32(408000000);
-		pp[5] = cpu_to_fdt32(408000000);
+		pp[1] = cpu_to_fdt32(400000000);
+		pp[2] = cpu_to_fdt32(400000000);
+		pp[5] = cpu_to_fdt32(400000000);
 	}
 
 	/*

commit 0a04fb50626c2b14c7cd14e27605fc03abade445
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Wed Dec 9 10:17:01 2020 +0800

    clk: rockchip: rk3568: support rkvdec clk setting
    
    Change-Id: Ic63b3c8ecbefcdf551d646ebb40521e6b521610b
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3568.h b/arch/arm/include/asm/arch-rockchip/cru_rk3568.h
index 8f8b166aff..d8fe25fcac 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3568.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3568.h
@@ -356,6 +356,24 @@ enum {
 	DCLK_EBC_SEL_CPLL_333M,
 	DCLK_EBC_SEL_GPLL_200M,
 
+	/* CRU_CLK_SEL47_CON */
+	ACLK_RKVDEC_SEL_SHIFT		= 7,
+	ACLK_RKVDEC_SEL_MASK		= 1 << ACLK_RKVDEC_SEL_SHIFT,
+	ACLK_RKVDEC_SEL_GPLL		= 0,
+	ACLK_RKVDEC_SEL_CPLL,
+	ACLK_RKVDEC_DIV_SHIFT		= 0,
+	ACLK_RKVDEC_DIV_MASK		= 0x1f << ACLK_RKVDEC_DIV_SHIFT,
+
+	/* CRU_CLK_SEL49_CON */
+	CLK_RKVDEC_CORE_SEL_SHIFT	= 14,
+	CLK_RKVDEC_CORE_SEL_MASK	= 0x3 << CLK_RKVDEC_CORE_SEL_SHIFT,
+	CLK_RKVDEC_CORE_SEL_GPLL	= 0,
+	CLK_RKVDEC_CORE_SEL_CPLL,
+	CLK_RKVDEC_CORE_SEL_NPLL,
+	CLK_RKVDEC_CORE_SEL_VPLL,
+	CLK_RKVDEC_CORE_DIV_SHIFT	= 8,
+	CLK_RKVDEC_CORE_DIV_MASK	= 0x1f << CLK_RKVDEC_CORE_DIV_SHIFT,
+
 	/* CRU_CLK_SEL50_CON */
 	PCLK_BUS_SEL_SHIFT		= 4,
 	PCLK_BUS_SEL_MASK		= 3 << PCLK_BUS_SEL_SHIFT,
diff --git a/drivers/clk/rockchip/clk_rk3568.c b/drivers/clk/rockchip/clk_rk3568.c
index bea811c187..1f56980dd5 100644
--- a/drivers/clk/rockchip/clk_rk3568.c
+++ b/drivers/clk/rockchip/clk_rk3568.c
@@ -2059,6 +2059,91 @@ static ulong rk3568_ebc_set_clk(struct rk3568_clk_priv *priv, ulong rate)
 
 	return rk3568_ebc_get_clk(priv);
 }
+
+static ulong rk3568_rkvdec_get_clk(struct rk3568_clk_priv *priv, ulong clk_id)
+{
+	struct rk3568_cru *cru = priv->cru;
+	u32 con, div, src, p_rate;
+
+	switch (clk_id) {
+	case ACLK_RKVDEC_PRE:
+	case ACLK_RKVDEC:
+		con = readl(&cru->clksel_con[47]);
+		src = (con & ACLK_RKVDEC_SEL_MASK) >> ACLK_RKVDEC_SEL_SHIFT;
+		div = (con & ACLK_RKVDEC_DIV_MASK) >> ACLK_RKVDEC_DIV_SHIFT;
+		if (src == ACLK_RKVDEC_SEL_CPLL)
+			p_rate = priv->cpll_hz;
+		else
+			p_rate = priv->gpll_hz;
+		return DIV_TO_RATE(p_rate, div);
+	case CLK_RKVDEC_CORE:
+		con = readl(&cru->clksel_con[49]);
+		src = (con & CLK_RKVDEC_CORE_SEL_MASK)
+		      >> CLK_RKVDEC_CORE_SEL_SHIFT;
+		div = (con & CLK_RKVDEC_CORE_DIV_MASK)
+		      >> CLK_RKVDEC_CORE_DIV_SHIFT;
+		if (src == CLK_RKVDEC_CORE_SEL_CPLL)
+			p_rate = priv->cpll_hz;
+		else if (src == CLK_RKVDEC_CORE_SEL_NPLL)
+			p_rate = priv->npll_hz;
+		else if (src == CLK_RKVDEC_CORE_SEL_VPLL)
+			p_rate = priv->vpll_hz;
+		else
+			p_rate = priv->gpll_hz;
+		return DIV_TO_RATE(p_rate, div);
+	default:
+		return -ENOENT;
+	}
+}
+
+static ulong rk3568_rkvdec_set_clk(struct rk3568_clk_priv *priv,
+				   ulong clk_id, ulong rate)
+{
+	struct rk3568_cru *cru = priv->cru;
+	int src_clk_div, src, p_rate;
+
+	switch (clk_id) {
+	case ACLK_RKVDEC_PRE:
+	case ACLK_RKVDEC:
+		src = (readl(&cru->clksel_con[47]) & ACLK_RKVDEC_SEL_MASK)
+		      >> ACLK_RKVDEC_SEL_SHIFT;
+		if (src == ACLK_RKVDEC_SEL_CPLL)
+			p_rate = priv->cpll_hz;
+		else
+			p_rate = priv->gpll_hz;
+		src_clk_div = DIV_ROUND_UP(p_rate, rate);
+		assert(src_clk_div - 1 <= 31);
+		rk_clrsetreg(&cru->clksel_con[47],
+			     ACLK_RKVDEC_SEL_MASK |
+			     ACLK_RKVDEC_DIV_MASK,
+			     (src << ACLK_RKVDEC_SEL_SHIFT) |
+			     (src_clk_div - 1) << ACLK_RKVDEC_DIV_SHIFT);
+		break;
+	case CLK_RKVDEC_CORE:
+		src = (readl(&cru->clksel_con[49]) & CLK_RKVDEC_CORE_SEL_MASK)
+		      >> CLK_RKVDEC_CORE_SEL_SHIFT;
+		if (src == CLK_RKVDEC_CORE_SEL_CPLL)
+			p_rate = priv->cpll_hz;
+		else if (src == CLK_RKVDEC_CORE_SEL_NPLL)
+			p_rate = priv->npll_hz;
+		else if (src == CLK_RKVDEC_CORE_SEL_VPLL)
+			p_rate = priv->vpll_hz;
+		else
+			p_rate = priv->gpll_hz;
+		src_clk_div = DIV_ROUND_UP(p_rate, rate);
+		assert(src_clk_div - 1 <= 31);
+		rk_clrsetreg(&cru->clksel_con[49],
+			     CLK_RKVDEC_CORE_SEL_MASK |
+			     CLK_RKVDEC_CORE_DIV_MASK,
+			     (src << CLK_RKVDEC_CORE_SEL_SHIFT) |
+			     (src_clk_div - 1) << CLK_RKVDEC_CORE_DIV_SHIFT);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return rk3568_rkvdec_get_clk(priv, clk_id);
+}
 #endif
 
 static ulong rk3568_clk_get_rate(struct clk *clk)
@@ -2183,6 +2268,11 @@ static ulong rk3568_clk_get_rate(struct clk *clk)
 	case DCLK_EBC:
 		rate = rk3568_ebc_get_clk(priv);
 		break;
+	case ACLK_RKVDEC_PRE:
+	case ACLK_RKVDEC:
+	case CLK_RKVDEC_CORE:
+		rate = rk3568_rkvdec_get_clk(priv, clk->id);
+		break;
 #endif
 	case ACLK_SECURE_FLASH:
 	case ACLK_CRYPTO_NS:
@@ -2342,6 +2432,11 @@ static ulong rk3568_clk_set_rate(struct clk *clk, ulong rate)
 	case DCLK_EBC:
 		rate = rk3568_ebc_set_clk(priv, rate);
 		break;
+	case ACLK_RKVDEC_PRE:
+	case ACLK_RKVDEC:
+	case CLK_RKVDEC_CORE:
+		rate = rk3568_rkvdec_set_clk(priv, clk->id, rate);
+		break;
 #endif
 	case ACLK_SECURE_FLASH:
 	case ACLK_CRYPTO_NS:
@@ -2610,6 +2705,38 @@ static int __maybe_unused rk3568_dclk_vop_set_parent(struct clk *clk,
 	return 0;
 }
 
+static int __maybe_unused rk3568_rkvdec_set_parent(struct clk *clk,
+						   struct clk *parent)
+{
+	struct rk3568_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3568_cru *cru = priv->cru;
+	u32 con_id, mask, shift;
+
+	switch (clk->id) {
+	case ACLK_RKVDEC_PRE:
+		con_id = 47;
+		mask = ACLK_RKVDEC_SEL_MASK;
+		shift = ACLK_RKVDEC_SEL_SHIFT;
+		break;
+	case CLK_RKVDEC_CORE:
+		con_id = 49;
+		mask = CLK_RKVDEC_CORE_SEL_MASK;
+		shift = CLK_RKVDEC_CORE_SEL_SHIFT;
+		break;
+	default:
+		return -EINVAL;
+	}
+	if (parent->id == PLL_CPLL) {
+		rk_clrsetreg(&cru->clksel_con[con_id], mask,
+			     ACLK_RKVDEC_SEL_CPLL << shift);
+	} else {
+		rk_clrsetreg(&cru->clksel_con[con_id], mask,
+			     ACLK_RKVDEC_SEL_GPLL << shift);
+	}
+
+	return 0;
+}
+
 static int rk3568_clk_set_parent(struct clk *clk, struct clk *parent)
 {
 	switch (clk->id) {
@@ -2625,6 +2752,9 @@ static int rk3568_clk_set_parent(struct clk *clk, struct clk *parent)
 	case DCLK_VOP1:
 	case DCLK_VOP2:
 		return rk3568_dclk_vop_set_parent(clk, parent);
+	case ACLK_RKVDEC_PRE:
+	case CLK_RKVDEC_CORE:
+		return rk3568_rkvdec_set_parent(clk, parent);
 	default:
 		return -ENOENT;
 	}

commit a792c7e0c59adfaf60567385aa457f4d1da93f43
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed Dec 9 17:29:56 2020 +0800

    mtd: spinand: Support new devices
    
    HYF1GQ4UDACAE, HYF4GQ4UAACBE
    
    Change-Id: I7abcc925ccdf8be5507a8b584b58c6b03a78962c
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/hyf.c b/drivers/mtd/nand/spi/hyf.c
index fdbe1b5ebd..1006fbe4f8 100644
--- a/drivers/mtd/nand/spi/hyf.c
+++ b/drivers/mtd/nand/spi/hyf.c
@@ -158,6 +158,15 @@ static const struct spinand_info hyf_spinand_table[] = {
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&hyf1gq4udacae_ooblayout,
 				     hyf1gq4udacae_ecc_get_status)),
+	SPINAND_INFO("HYF1GQ4UDACAE", 0x22,
+		     NAND_MEMORG(1, 2048, 64, 64, 2048, 1, 1, 1),
+		     NAND_ECCREQ(4, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&hyf1gq4udacae_ooblayout,
+				     hyf1gq4udacae_ecc_get_status)),
 	SPINAND_INFO("HYF2GQ4UAACAE", 0x52,
 		     NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
 		     NAND_ECCREQ(14, 512),
@@ -176,6 +185,15 @@ static const struct spinand_info hyf_spinand_table[] = {
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&hyf2gq4uaacae_ooblayout,
 				     hyf1gq4udacae_ecc_get_status)),
+	SPINAND_INFO("HYF4GQ4UAACBE", 0xD4,
+		     NAND_MEMORG(1, 4096, 128, 64, 2048, 1, 1, 1),
+		     NAND_ECCREQ(4, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&hyf2gq4uaacae_ooblayout,
+				     hyf1gq4udacae_ecc_get_status)),
 };
 
 /**

commit 4cab706e7f50570289db0cd74e50f753ee3a84e7
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed Dec 9 16:36:10 2020 +0800

    mtd: spinand: Support new devices
    
    FM25S01
    
    Change-Id: I1c7eab8799b0a381b7fa32584e608c3a115d83e6
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/fmsh.c b/drivers/mtd/nand/spi/fmsh.c
index 8ea157bcd7..97a4c1467b 100644
--- a/drivers/mtd/nand/spi/fmsh.c
+++ b/drivers/mtd/nand/spi/fmsh.c
@@ -54,6 +54,35 @@ static const struct mtd_ooblayout_ops fm25s01a_ooblayout = {
 	.rfree = fm25s01a_ooblayout_free,
 };
 
+static int fm25s01_ooblayout_ecc(struct mtd_info *mtd, int section,
+				 struct mtd_oob_region *region)
+{
+	if (section)
+		return -ERANGE;
+
+	region->offset = 64;
+	region->length = 64;
+
+	return 0;
+}
+
+static int fm25s01_ooblayout_free(struct mtd_info *mtd, int section,
+				  struct mtd_oob_region *region)
+{
+	if (section)
+		return -ERANGE;
+
+	region->offset = 2;
+	region->length = 62;
+
+	return 0;
+}
+
+static const struct mtd_ooblayout_ops fm25s01_ooblayout = {
+	.ecc = fm25s01_ooblayout_ecc,
+	.rfree = fm25s01_ooblayout_free,
+};
+
 static const struct spinand_info fmsh_spinand_table[] = {
 	SPINAND_INFO("FM25S01A", 0xE4,
 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
@@ -71,6 +100,14 @@ static const struct spinand_info fmsh_spinand_table[] = {
 					      &update_cache_variants),
 		     0,
 		     SPINAND_ECCINFO(&fm25s01a_ooblayout, NULL)),
+	SPINAND_INFO("FM25S01", 0xA1,
+		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
+		     NAND_ECCREQ(1, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     0,
+		     SPINAND_ECCINFO(&fm25s01_ooblayout, NULL)),
 };
 
 /**

commit 0659623d62f1235c7b0749f04fa189faad073240
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed Dec 9 16:09:51 2020 +0800

    mtd: spinand: Support new devices
    
    FS35ND02G-S3Y2, FS35ND04G-S2Y2
    
    Change-Id: Idc74c823fc707ba4dbeac359c4f6ca0a7e3ee778
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/foresee.c b/drivers/mtd/nand/spi/foresee.c
index 7ddce73a1a..f7c09416ea 100644
--- a/drivers/mtd/nand/spi/foresee.c
+++ b/drivers/mtd/nand/spi/foresee.c
@@ -69,6 +69,22 @@ static const struct spinand_info foresee_spinand_table[] = {
 					      &update_cache_variants),
 		     0,
 		     SPINAND_ECCINFO(&fsxxndxxg_ooblayout, NULL)),
+	SPINAND_INFO("FS35ND02G-S3Y2", 0xEB,
+		     NAND_MEMORG(1, 2048, 64, 64, 2048, 1, 1, 1),
+		     NAND_ECCREQ(4, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     0,
+		     SPINAND_ECCINFO(&fsxxndxxg_ooblayout, NULL)),
+	SPINAND_INFO("FS35ND04G-S2Y2", 0xEC,
+		     NAND_MEMORG(1, 2048, 64, 64, 4096, 1, 1, 1),
+		     NAND_ECCREQ(4, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     0,
+		     SPINAND_ECCINFO(&fsxxndxxg_ooblayout, NULL)),
 };
 
 /**

commit ad6355f7d71332c21bfc82f91c3687f1604408c1
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed Dec 9 15:44:54 2020 +0800

    mtd: spinand: Support new devices
    
    XT26G01C
    
    Change-Id: If7147ebd12a993de86b335824d8c6e9d8ea06d52
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/xtx.c b/drivers/mtd/nand/spi/xtx.c
index 74e632233a..51c82995ed 100644
--- a/drivers/mtd/nand/spi/xtx.c
+++ b/drivers/mtd/nand/spi/xtx.c
@@ -155,6 +155,27 @@ static int xt26g02b_ecc_get_status(struct spinand_device *spinand,
 		return -EBADMSG;
 }
 
+/*
+ * ecc bits: 0xC0[4,7]
+ * [0b0000], No bit errors were detected;
+ * [0b0001, 0b0111], 1-7 Bit errors were detected and corrected. Not
+ *	reach Flipping Bits;
+ * [0b1000], 8 Bit errors were detected and corrected. Bit error count
+ *	equals the bit flip detectionthreshold;
+ * [0b1111], Bit errors greater than ECC capability(8 bits) and not corrected;
+ * others, Reserved.
+ */
+static int xt26g01c_ecc_get_status(struct spinand_device *spinand,
+				   u8 status)
+{
+	u8 eccsr = (status & GENMASK(7, 4)) >> 4;
+
+	if (eccsr <= 8)
+		return eccsr;
+	else
+		return -EBADMSG;
+}
+
 static const struct spinand_info xtx_spinand_table[] = {
 	SPINAND_INFO("XT26G01A", 0xE1,
 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
@@ -201,6 +222,15 @@ static const struct spinand_info xtx_spinand_table[] = {
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&xt26g02b_ooblayout,
 				     xt26g02b_ecc_get_status)),
+	SPINAND_INFO("XT26G01C", 0x11,
+		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&xt26g01b_ooblayout,
+				     xt26g01c_ecc_get_status)),
 };
 
 static int xtx_spinand_detect(struct spinand_device *spinand)

commit 266cba03bbf6c90fd048c0435064a0d11dc3caca
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed Dec 9 14:27:13 2020 +0800

    mtd: spinand: Supoprt new devices
    
    TC58CVG2S0HRAIJ
    
    Change-Id: I4412a9208fe8f22053dbb74d1cb362b19e13a18a
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/toshiba.c b/drivers/mtd/nand/spi/toshiba.c
index a44f96f89f..86ee481745 100644
--- a/drivers/mtd/nand/spi/toshiba.c
+++ b/drivers/mtd/nand/spi/toshiba.c
@@ -177,6 +177,16 @@ static const struct spinand_info toshiba_spinand_table[] = {
 		     0,
 		     SPINAND_ECCINFO(&tc58cxgxsx_ooblayout,
 				     tc58cxgxsx_ecc_get_status)),
+	/* 3.3V 4Gb */
+	SPINAND_INFO("TC58CVG2S0HRAIJ", 0xED,
+		     NAND_MEMORG(1, 4096, 128, 64, 2048, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     0,
+		     SPINAND_ECCINFO(&tc58cxgxsx_ooblayout,
+				     tc58cxgxsx_ecc_get_status)),
 };
 
 static int toshiba_spinand_detect(struct spinand_device *spinand)

commit 55efc32aeadc0a7dd6b64ec60ec96bd86a90ce11
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed Dec 9 10:28:08 2020 +0800

    mtd: spinand: Supoprt new MXIC devices
    
    MX35UF1GE4AC, MX35UF2GE4AC
    
    Change-Id: I064e9116c565e2ea3b92432e9c68864d47a7567c
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/macronix.c b/drivers/mtd/nand/spi/macronix.c
index 47fc02fcef..b94c0f65e7 100644
--- a/drivers/mtd/nand/spi/macronix.c
+++ b/drivers/mtd/nand/spi/macronix.c
@@ -50,6 +50,23 @@ static const struct mtd_ooblayout_ops mx35lfxge4ab_ooblayout = {
 	.rfree = mx35lfxge4ab_ooblayout_free,
 };
 
+static int mx35ufxge4ac_ooblayout_free(struct mtd_info *mtd, int section,
+				       struct mtd_oob_region *region)
+{
+	if (section > 3)
+		return -ERANGE;
+
+	region->offset = (16 * section) + 2;
+	region->length = 14;
+
+	return 0;
+}
+
+static const struct mtd_ooblayout_ops mx35ufxge4ac_ooblayout = {
+	.ecc = mx35lfxge4ab_ooblayout_ecc,
+	.rfree = mx35ufxge4ac_ooblayout_free,
+};
+
 static int mx35lf1ge4ab_get_eccsr(struct spinand_device *spinand, u8 *eccsr)
 {
 	struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(0x7c, 1),
@@ -130,6 +147,24 @@ static const struct spinand_info macronix_spinand_table[] = {
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
 				     mx35lf1ge4ab_ecc_get_status)),
+	SPINAND_INFO("MX35UF1GE4AC", 0x92,
+		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
+		     NAND_ECCREQ(4, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&mx35ufxge4ac_ooblayout,
+				     mx35lf1ge4ab_ecc_get_status)),
+	SPINAND_INFO("MX35UF2GE4AC", 0xA2,
+		     NAND_MEMORG(1, 2048, 64, 64, 2048, 1, 1, 1),
+		     NAND_ECCREQ(4, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&mx35ufxge4ac_ooblayout,
+				     mx35lf1ge4ab_ecc_get_status)),
 };
 
 static int macronix_spinand_detect(struct spinand_device *spinand)

commit ae17d6d43532dd420ba0cf8b06f9c6f7abdad0ab
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Mar 23 13:04:28 2020 +0800

    rockchip: dts: px30: add secure_otp node
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I65956e2386f1bb8c9f9594547f0135837a132b7f

diff --git a/arch/arm/dts/px30.dtsi b/arch/arm/dts/px30.dtsi
index b347de9ed5..5d546ef926 100644
--- a/arch/arm/dts/px30.dtsi
+++ b/arch/arm/dts/px30.dtsi
@@ -288,6 +288,13 @@
 		status = "disabled";
 	};
 
+	secure_otp: secure_otp@0xff110000 {
+		compatible = "rockchip,rk3308-secure-otp";
+		reg = <0x0 0xff110000 0x0 0x4000>;
+		secure_conf = <0xff11C008>;
+		mask_addr = <0xff2d0000>;
+	};
+
 	gic: interrupt-controller@ff131000 {
 		compatible = "arm,gic-400";
 		#interrupt-cells = <3>;

commit 0164ed29c6815192ab5f51a9a86b2e27a2f15b64
Author: Guochun Huang <hero.huang@rock-chips.com>
Date:   Sat Dec 5 15:56:29 2020 +0800

    configs: rk3568: enable mipi dsi
    
    Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
    Change-Id: Ia79377d460416847fcab0ddbeaa928ff8cea8918

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index 193189a7d3..78d50438e0 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -162,7 +162,12 @@ CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
 CONFIG_USB_GADGET_VENDOR_NUM=0x2207
 CONFIG_USB_GADGET_PRODUCT_NUM=0x350a
 CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_INNO_MIPI_PHY=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_LIB_RAND=y
 CONFIG_SPL_TINY_MEMSET=y

commit 5fe488ff126e48045448286e124f6c766b800d4a
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue Dec 8 14:30:00 2020 +0800

    mtd: spinand: Support new devices
    
    HYF2GQ4UAACAE, HYF2GQ4UHCCAE
    
    Change-Id: I1b36ca507984d2794375a6c1bce409d749495c62
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/hyf.c b/drivers/mtd/nand/spi/hyf.c
index 0be351d6e5..fdbe1b5ebd 100644
--- a/drivers/mtd/nand/spi/hyf.c
+++ b/drivers/mtd/nand/spi/hyf.c
@@ -89,6 +89,35 @@ static const struct mtd_ooblayout_ops hyf1gq4udacae_ooblayout = {
 	.rfree = hyf1gq4udacae_ooblayout_free,
 };
 
+static int hyf2gq4uaacae_ooblayout_ecc(struct mtd_info *mtd, int section,
+				       struct mtd_oob_region *region)
+{
+	if (section > 3)
+		return -ERANGE;
+
+	region->offset = (32 * section) + 8;
+	region->length = 24;
+
+	return 0;
+}
+
+static int hyf2gq4uaacae_ooblayout_free(struct mtd_info *mtd, int section,
+					struct mtd_oob_region *region)
+{
+	if (section > 3)
+		return -ERANGE;
+
+	region->offset = 16 * section;
+	region->length = 8;
+
+	return 0;
+}
+
+static const struct mtd_ooblayout_ops hyf2gq4uaacae_ooblayout = {
+	.ecc = hyf2gq4uaacae_ooblayout_ecc,
+	.rfree = hyf2gq4uaacae_ooblayout_free,
+};
+
 static int hyf1gq4udacae_ecc_get_status(struct spinand_device *spinand,
 					u8 status)
 {
@@ -121,7 +150,7 @@ static const struct spinand_info hyf_spinand_table[] = {
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&hyf1gq4upacae_ooblayout, NULL)),
 	SPINAND_INFO("HYF1GQ4UDACAE", 0x21,
-		     NAND_MEMORG(1, 2048, 64, 64, 1024, 2, 1, 1),
+		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
 		     NAND_ECCREQ(4, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
 					      &write_cache_variants,
@@ -129,6 +158,24 @@ static const struct spinand_info hyf_spinand_table[] = {
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&hyf1gq4udacae_ooblayout,
 				     hyf1gq4udacae_ecc_get_status)),
+	SPINAND_INFO("HYF2GQ4UAACAE", 0x52,
+		     NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
+		     NAND_ECCREQ(14, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&hyf2gq4uaacae_ooblayout,
+				     hyf1gq4udacae_ecc_get_status)),
+	SPINAND_INFO("HYF2GQ4UHCCAE", 0x5A,
+		     NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
+		     NAND_ECCREQ(14, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&hyf2gq4uaacae_ooblayout,
+				     hyf1gq4udacae_ecc_get_status)),
 };
 
 /**

commit 990fd51c55d536604ce4576a3954849b7402b87c
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Dec 8 17:37:39 2020 +0800

    misc: rockchip-otp: extract the difference in each chips
    
    We use function spl_rockchip_otp_start & spl_rockchip_otp_stop to
    realize the different of each chip's otps, such as mask area and
    secure config.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I3b5d0377d78e5c2ed6e8ed52a89cadefc4994be1

diff --git a/drivers/misc/rockchip-secure-otp.S b/drivers/misc/rockchip-secure-otp.S
index 4decc246ff..b09233d194 100644
--- a/drivers/misc/rockchip-secure-otp.S
+++ b/drivers/misc/rockchip-secure-otp.S
@@ -3,15 +3,283 @@
 	.text
 .Ltext0:
 	.cfi_sections	.debug_frame
+	.section	.text.px30_spl_rockchip_otp_start,"ax",@progbits
+	.align	2
+	.global	px30_spl_rockchip_otp_start
+	.type	px30_spl_rockchip_otp_start, %function
+px30_spl_rockchip_otp_start:
+.LFB264:
+	.file 1 "drivers/misc/rockchip-secure-otp.c"
+	.loc 1 38 0
+	.cfi_startproc
+.LVL0:
+.LBB22:
+	.loc 1 39 0
+#APP
+// 39 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	mov	w3, 16
+	sdiv	w2, w2, w3
+.LVL1:
+	mov	w3, -65536
+	lsl	w2, w2, 2
+	sxtw	x2, w2
+	str	w3, [x2, x1]
+.LVL2:
+.LBE22:
+.LBB23:
+	.loc 1 40 0
+#APP
+// 40 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	mov	w1, 536879104
+.LVL3:
+	str	w1, [x0]
+	ret
+.LBE23:
+	.cfi_endproc
+.LFE264:
+	.size	px30_spl_rockchip_otp_start, .-px30_spl_rockchip_otp_start
+	.section	.text.px30_spl_rockchip_otp_stop,"ax",@progbits
+	.align	2
+	.global	px30_spl_rockchip_otp_stop
+	.type	px30_spl_rockchip_otp_stop, %function
+px30_spl_rockchip_otp_stop:
+.LFB265:
+	.loc 1 45 0
+	.cfi_startproc
+.LVL4:
+.LBB24:
+	.loc 1 46 0
+#APP
+// 46 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	mov	w3, 536870912
+	str	w3, [x0]
+.LVL5:
+.LBE24:
+.LBB25:
+	.loc 1 47 0
+#APP
+// 47 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	mov	w0, 16
+.LVL6:
+	sdiv	w2, w2, w0
+.LVL7:
+	mov	w0, -1
+	lsl	w2, w2, 2
+	sxtw	x2, w2
+	str	w0, [x2, x1]
+	ret
+.LBE25:
+	.cfi_endproc
+.LFE265:
+	.size	px30_spl_rockchip_otp_stop, .-px30_spl_rockchip_otp_stop
+	.section	.text.rk3308_spl_rockchip_otp_start,"ax",@progbits
+	.align	2
+	.global	rk3308_spl_rockchip_otp_start
+	.type	rk3308_spl_rockchip_otp_start, %function
+rk3308_spl_rockchip_otp_start:
+.LFB266:
+	.loc 1 52 0
+	.cfi_startproc
+.LVL8:
+.LBB26:
+	.loc 1 53 0
+#APP
+// 53 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	mov	w3, 16
+	sdiv	w2, w2, w3
+.LVL9:
+	mov	w3, -65536
+	lsl	w2, w2, 2
+	sxtw	x2, w2
+	str	w3, [x2, x1]
+.LVL10:
+.LBE26:
+.LBB27:
+	.loc 1 54 0
+#APP
+// 54 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	mov	w1, 262148
+.LVL11:
+	str	w1, [x0]
+	ret
+.LBE27:
+	.cfi_endproc
+.LFE266:
+	.size	rk3308_spl_rockchip_otp_start, .-rk3308_spl_rockchip_otp_start
+	.section	.text.rk3308_spl_rockchip_otp_stop,"ax",@progbits
+	.align	2
+	.global	rk3308_spl_rockchip_otp_stop
+	.type	rk3308_spl_rockchip_otp_stop, %function
+rk3308_spl_rockchip_otp_stop:
+.LFB267:
+	.loc 1 59 0
+	.cfi_startproc
+.LVL12:
+.LBB28:
+	.loc 1 60 0
+#APP
+// 60 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	mov	w3, 262144
+	str	w3, [x0]
+.LVL13:
+.LBE28:
+.LBB29:
+	.loc 1 61 0
+#APP
+// 61 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	mov	w0, 16
+.LVL14:
+	sdiv	w2, w2, w0
+.LVL15:
+	mov	w0, -1
+	lsl	w2, w2, 2
+	sxtw	x2, w2
+	str	w0, [x2, x1]
+	ret
+.LBE29:
+	.cfi_endproc
+.LFE267:
+	.size	rk3308_spl_rockchip_otp_stop, .-rk3308_spl_rockchip_otp_stop
+	.section	.text.rk3328_spl_rockchip_otp_start,"ax",@progbits
+	.align	2
+	.global	rk3328_spl_rockchip_otp_start
+	.type	rk3328_spl_rockchip_otp_start, %function
+rk3328_spl_rockchip_otp_start:
+.LFB268:
+	.loc 1 66 0
+	.cfi_startproc
+.LVL16:
+.LBB30:
+	.loc 1 67 0
+#APP
+// 67 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	mov	w2, 134219776
+.LVL17:
+	str	w2, [x0]
+.LVL18:
+.LBE30:
+.LBB31:
+	.loc 1 68 0
+#APP
+// 68 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	mov	w0, 1024
+.LVL19:
+	movk	w0, 0x600, lsl 16
+	str	w0, [x1]
+	ret
+.LBE31:
+	.cfi_endproc
+.LFE268:
+	.size	rk3328_spl_rockchip_otp_start, .-rk3328_spl_rockchip_otp_start
+	.section	.text.rk3328_spl_rockchip_otp_stop,"ax",@progbits
+	.align	2
+	.global	rk3328_spl_rockchip_otp_stop
+	.type	rk3328_spl_rockchip_otp_stop, %function
+rk3328_spl_rockchip_otp_stop:
+.LFB269:
+	.loc 1 73 0
+	.cfi_startproc
+.LVL20:
+.LBB32:
+	.loc 1 74 0
+#APP
+// 74 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	mov	w2, 134217728
+.LVL21:
+	str	w2, [x0]
+.LVL22:
+.LBE32:
+.LBB33:
+	.loc 1 75 0
+#APP
+// 75 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	mov	w0, 100663296
+.LVL23:
+	str	w0, [x1]
+	ret
+.LBE33:
+	.cfi_endproc
+.LFE269:
+	.size	rk3328_spl_rockchip_otp_stop, .-rk3328_spl_rockchip_otp_stop
+	.section	.text.rockchip_secure_otp_ioctl,"ax",@progbits
+	.align	2
+	.type	rockchip_secure_otp_ioctl, %function
+rockchip_secure_otp_ioctl:
+.LFB279:
+	.loc 1 488 0
+	.cfi_startproc
+.LVL24:
+	.loc 1 491 0
+	mov	x0, 27908
+.LVL25:
+	cmp	x1, x0
+	bne	.L11
+.LVL26:
+.LBB34:
+.LBB35:
+	.loc 1 480 0
+	mov	w0, 8
+	str	w0, [x2]
+.LVL27:
+.LBE35:
+.LBE34:
+	.loc 1 493 0
+	mov	w0, 0
+	.loc 1 494 0
+	ret
+.LVL28:
+.L11:
+	.loc 1 489 0
+	mov	w0, -22
+	.loc 1 500 0
+	ret
+	.cfi_endproc
+.LFE279:
+	.size	rockchip_secure_otp_ioctl, .-rockchip_secure_otp_ioctl
 	.section	.text.rockchip_secure_otp_ofdata_to_platdata,"ax",@progbits
 	.align	2
 	.type	rockchip_secure_otp_ofdata_to_platdata, %function
 rockchip_secure_otp_ofdata_to_platdata:
-.LFB268:
-	.file 1 "drivers/misc/rockchip-secure-otp.c"
-	.loc 1 385 0
+.LFB280:
+	.loc 1 509 0
 	.cfi_startproc
-.LVL0:
+.LVL29:
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
@@ -21,45 +289,45 @@ rockchip_secure_otp_ofdata_to_platdata:
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -16
 	.cfi_offset 20, -8
-	.loc 1 385 0
+	.loc 1 509 0
 	mov	x20, x0
-	.loc 1 386 0
+	.loc 1 510 0
 	bl	dev_get_platdata
-.LVL1:
+.LVL30:
 	mov	x19, x0
-.LVL2:
-	.loc 1 388 0
+.LVL31:
+	.loc 1 512 0
 	mov	x0, x20
-.LVL3:
+.LVL32:
 	bl	dev_read_addr_ptr
-.LVL4:
-	.loc 1 389 0
+.LVL33:
+	.loc 1 513 0
 	mov	w2, 0
 	adrp	x1, .LC0
-	.loc 1 388 0
+	.loc 1 512 0
 	str	x0, [x19]
-	.loc 1 389 0
+	.loc 1 513 0
 	add	x1, x1, :lo12:.LC0
 	mov	x0, x20
 	bl	dev_read_u32_default
-.LVL5:
-	.loc 1 390 0
+.LVL34:
+	.loc 1 514 0
 	uxtw	x0, w0
 	str	x0, [x19, 8]
-	.loc 1 391 0
+	.loc 1 515 0
 	mov	w2, 0
 	mov	x0, x20
 	adrp	x1, .LC1
 	add	x1, x1, :lo12:.LC1
 	bl	dev_read_u32_default
-.LVL6:
-	.loc 1 392 0
+.LVL35:
+	.loc 1 516 0
 	uxtw	x0, w0
 	str	x0, [x19, 16]
-	.loc 1 395 0
+	.loc 1 519 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-.LVL7:
+.LVL36:
 	ldp	x29, x30, [sp], 32
 	.cfi_restore 30
 	.cfi_restore 29
@@ -68,16 +336,16 @@ rockchip_secure_otp_ofdata_to_platdata:
 	.cfi_def_cfa 31, 0
 	ret
 	.cfi_endproc
-.LFE268:
+.LFE280:
 	.size	rockchip_secure_otp_ofdata_to_platdata, .-rockchip_secure_otp_ofdata_to_platdata
 	.section	.text.rockchip_secure_otp_wait_status.isra.1,"ax",@progbits
 	.align	2
 	.type	rockchip_secure_otp_wait_status.isra.1, %function
 rockchip_secure_otp_wait_status.isra.1:
-.LFB270:
-	.loc 1 47 0
+.LFB282:
+	.loc 1 94 0
 	.cfi_startproc
-.LVL8:
+.LVL37:
 	stp	x29, x30, [sp, -48]!
 	.cfi_def_cfa_offset 48
 	.cfi_offset 29, -48
@@ -90,69 +358,69 @@ rockchip_secure_otp_wait_status.isra.1:
 	mov	w19, w1
 	str	x21, [sp, 32]
 	.cfi_offset 21, -16
-	.loc 1 47 0
+	.loc 1 94 0
 	mov	x21, x0
 	mov	w20, 10000
-.LVL9:
-.L4:
-.LBB26:
-	.loc 1 52 0
+.LVL38:
+.L15:
+.LBB42:
+	.loc 1 99 0
 	ldr	x0, [x21]
 	ldr	w0, [x0, 772]
-.LVL10:
+.LVL39:
 #APP
-// 52 "drivers/misc/rockchip-secure-otp.c" 1
+// 99 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-.LBE26:
+.LBE42:
 	tst	w0, w19
-	beq	.L6
-.LBB27:
-	.loc 1 62 0
+	beq	.L17
+.LBB43:
+	.loc 1 109 0
 	orr	w19, w19, -65536
-.LVL11:
+.LVL40:
 #APP
-// 62 "drivers/misc/rockchip-secure-otp.c" 1
+// 109 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x21]
-.LVL12:
+.LVL41:
 	str	w19, [x0, 772]
-.LBE27:
-	.loc 1 64 0
+.LBE43:
+	.loc 1 111 0
 	mov	w0, 0
-	b	.L3
-.LVL13:
-.L6:
-	.loc 1 53 0
+	b	.L14
+.LVL42:
+.L17:
+	.loc 1 100 0
 	mov	x0, 1
-.LVL14:
+.LVL43:
 	bl	udelay
-.LVL15:
-	.loc 1 55 0
+.LVL44:
+	.loc 1 102 0
 	subs	w20, w20, #1
-.LVL16:
-	bne	.L4
-.LVL17:
-.LBB28:
-.LBB29:
-	.loc 1 56 0
+.LVL45:
+	bne	.L15
+.LVL46:
+.LBB44:
+.LBB45:
+	.loc 1 103 0
 	adrp	x1, .LANCHOR0
 	adrp	x0, .LC2
 	add	x1, x1, :lo12:.LANCHOR0
 	add	x0, x0, :lo12:.LC2
 	bl	printf
-.LVL18:
+.LVL47:
 	mov	w0, -110
-.LVL19:
-.L3:
-.LBE29:
-.LBE28:
-	.loc 1 65 0
+.LVL48:
+.L14:
+.LBE45:
+.LBE44:
+	.loc 1 112 0
 	ldp	x19, x20, [sp, 16]
-.LVL20:
+.LVL49:
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	.cfi_restore 30
@@ -163,91 +431,67 @@ rockchip_secure_otp_wait_status.isra.1:
 	.cfi_def_cfa 31, 0
 	ret
 	.cfi_endproc
-.LFE270:
+.LFE282:
 	.size	rockchip_secure_otp_wait_status.isra.1, .-rockchip_secure_otp_wait_status.isra.1
 	.section	.text.rockchip_secure_otp_read,"ax",@progbits
 	.align	2
 	.type	rockchip_secure_otp_read, %function
 rockchip_secure_otp_read:
-.LFB265:
-	.loc 1 135 0
+.LFB275:
+	.loc 1 182 0
 	.cfi_startproc
-.LVL21:
-	stp	x29, x30, [sp, -80]!
-	.cfi_def_cfa_offset 80
-	.cfi_offset 29, -80
-	.cfi_offset 30, -72
+.LVL50:
+	stp	x29, x30, [sp, -96]!
+	.cfi_def_cfa_offset 96
+	.cfi_offset 29, -96
+	.cfi_offset 30, -88
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -64
-	.cfi_offset 20, -56
+	.cfi_offset 19, -80
+	.cfi_offset 20, -72
 	mov	w20, w1
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -32
-	.cfi_offset 24, -24
-	mov	x23, x2
-	stp	x25, x26, [sp, 64]
-	.cfi_offset 25, -16
-	.cfi_offset 26, -8
-	mov	w26, w3
+	.cfi_offset 23, -48
+	.cfi_offset 24, -40
+	mov	x24, x2
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -48
-	.cfi_offset 22, -40
-	.loc 1 136 0
+	.cfi_offset 21, -64
+	.cfi_offset 22, -56
+	mov	x22, x0
+	str	x27, [sp, 80]
+	.cfi_offset 27, -16
+	mov	w27, w3
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 25, -32
+	.cfi_offset 26, -24
+	.loc 1 183 0
 	bl	dev_get_platdata
-.LVL22:
+.LVL51:
 	mov	x19, x0
-.LVL23:
-.LBB50:
-	.loc 1 143 0
-#APP
-// 143 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	mov	x22, 1044
-	mov	w0, 1048592
-.LVL24:
-	movk	x22, 0xff50, lsl 16
-	str	w0, [x22]
-.LBE50:
-	.loc 1 144 0
-	mov	x0, 10
-	bl	udelay
-.LVL25:
-.LBB51:
-	.loc 1 145 0
-#APP
-// 145 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	mov	w0, 1048576
-	str	w0, [x22]
-.LBE51:
-	.loc 1 146 0
-	mov	x0, 10
-	bl	udelay
-.LVL26:
-.LBB52:
-	.loc 1 148 0
-#APP
-// 148 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x19, 8]
-	mov	w1, 262148
-	str	w1, [x0]
-.LVL27:
-.LBE52:
-.LBB53:
-.LBB54:
-.LBB55:
-	.loc 1 116 0
+.LVL52:
+	.loc 1 184 0
+	mov	x0, x22
+.LVL53:
+	bl	dev_get_driver_data
+.LVL54:
+	.loc 1 190 0
+	ldr	x3, [x0]
+	.loc 1 184 0
+	mov	x23, x0
+.LVL55:
+	.loc 1 190 0
+	mov	w2, w20
+	ldp	x0, x1, [x19, 8]
+.LVL56:
+	blr	x3
+.LVL57:
+.LBB62:
+.LBB63:
+.LBB64:
+	.loc 1 163 0
 #APP
-// 116 "drivers/misc/rockchip-secure-otp.c" 1
+// 163 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
@@ -255,210 +499,210 @@ rockchip_secure_otp_read:
 	mov	w1, 512
 	movk	w1, 0xff00, lsl 16
 	str	w1, [x0, 32]
-.LVL28:
-.LBE55:
-.LBB56:
-	.loc 1 117 0
+.LVL58:
+.LBE64:
+.LBB65:
+	.loc 1 164 0
 #APP
-// 117 "drivers/misc/rockchip-secure-otp.c" 1
+// 164 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x19]
 	mov	w1, -65535
 	str	w1, [x0, 36]
-.LVL29:
-.LBE56:
-.LBB57:
-	.loc 1 118 0
+.LVL59:
+.LBE65:
+.LBB66:
+	.loc 1 165 0
 #APP
-// 118 "drivers/misc/rockchip-secure-otp.c" 1
+// 165 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x19]
 	mov	w1, 250
 	str	w1, [x0, 4096]
-.LVL30:
-.LBE57:
-.LBB58:
-	.loc 1 120 0
+.LVL60:
+.LBE66:
+.LBB67:
+	.loc 1 167 0
 #APP
-// 120 "drivers/misc/rockchip-secure-otp.c" 1
+// 167 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x19]
 	str	wzr, [x0, 4100]
-.LVL31:
-.LBE58:
-.LBB59:
-	.loc 1 124 0
+.LVL61:
+.LBE67:
+.LBB68:
+	.loc 1 171 0
 #APP
-// 124 "drivers/misc/rockchip-secure-otp.c" 1
+// 171 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x19]
 	mov	w1, 65537
 	str	w1, [x0, 32]
-.LBE59:
-	.loc 1 126 0
+.LBE68:
+	.loc 1 173 0
 	mov	w1, 2
 	mov	x0, x19
 	bl	rockchip_secure_otp_wait_status.isra.1
-.LVL32:
-	.loc 1 127 0
-	tbz	w0, #31, .L10
-	.loc 1 128 0
+.LVL62:
+	.loc 1 174 0
+	tbz	w0, #31, .L21
+	.loc 1 175 0
 	adrp	x1, .LANCHOR1
 	adrp	x0, .LC3
-.LVL33:
+.LVL63:
 	add	x1, x1, :lo12:.LANCHOR1
 	add	x0, x0, :lo12:.LC3
 	bl	printf
-.LVL34:
-.L10:
-.LBE54:
-.LBE53:
-.LBB60:
-	.loc 1 150 0
+.LVL64:
+.L21:
+.LBE63:
+.LBE62:
+.LBB69:
+	.loc 1 212 0
 #APP
-// 150 "drivers/misc/rockchip-secure-otp.c" 1
+// 212 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x19]
-	mov	w25, 65537
-	add	w26, w26, w20
-.LVL35:
-	str	w25, [x0, 256]
-.LBE60:
-	.loc 1 151 0
+	mov	w26, 65537
+	add	w27, w27, w20
+.LVL65:
+	str	w26, [x0, 256]
+.LBE69:
+	.loc 1 213 0
 	mov	x0, 50
 	bl	udelay
-.LVL36:
-.L11:
-	.loc 1 152 0
-	cmp	w20, w26
-	bne	.L18
+.LVL66:
+.L22:
+	.loc 1 214 0
+	cmp	w20, w27
+	bne	.L29
 	mov	w22, 0
-	b	.L15
-.L18:
-	.loc 1 154 0
+	b	.L26
+.L29:
+	.loc 1 216 0
 	cmp	w20, 448
-	bgt	.L19
-	.loc 1 157 0
+	bgt	.L30
+	.loc 1 219 0
 	sub	w1, w20, #16
 	cmp	w20, 0
 	mov	w0, w20
 	ccmp	w1, 31, 0, ne
-	bls	.L13
-.LVL37:
-	.loc 1 157 0 is_stmt 0 discriminator 1
+	bls	.L24
+.LVL67:
+	.loc 1 219 0 is_stmt 0 discriminator 1
 	sub	w1, w20, #128
 	cmp	w1, 263
-	bls	.L13
-	.loc 1 160 0 is_stmt 1
+	bls	.L24
+	.loc 1 222 0 is_stmt 1
 	adrp	x0, .LC4
-.LVL38:
+.LVL68:
 	add	x0, x0, :lo12:.LC4
 	bl	printf
-.LVL39:
-.L19:
-	.loc 1 155 0
+.LVL69:
+.L30:
+	.loc 1 217 0
 	mov	w22, -1
-	b	.L9
-.LVL40:
-.L13:
-.LBB61:
-	.loc 1 164 0
+	b	.L20
+.LVL70:
+.L24:
+.LBB70:
+	.loc 1 226 0
 	add	w20, w20, 1
-.LVL41:
+.LVL71:
 	orr	w0, w0, -65536
-.LVL42:
+.LVL72:
 #APP
-// 164 "drivers/misc/rockchip-secure-otp.c" 1
+// 226 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x1, [x19]
 	str	w0, [x1, 260]
-.LVL43:
-.LBE61:
-.LBB62:
-	.loc 1 166 0
+.LVL73:
+.LBE70:
+.LBB71:
+	.loc 1 228 0
 #APP
-// 166 "drivers/misc/rockchip-secure-otp.c" 1
+// 228 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x19]
-.LVL44:
-.LBE62:
-	.loc 1 168 0
+.LVL74:
+.LBE71:
+	.loc 1 230 0
 	mov	w1, 4
-.LVL45:
-.LBB63:
-	.loc 1 166 0
-	str	w25, [x0, 264]
-.LVL46:
-.LBE63:
-	.loc 1 168 0
+.LVL75:
+.LBB72:
+	.loc 1 228 0
+	str	w26, [x0, 264]
+.LVL76:
+.LBE72:
+	.loc 1 230 0
 	mov	x0, x19
 	bl	rockchip_secure_otp_wait_status.isra.1
-.LVL47:
+.LVL77:
 	mov	w22, w0
-.LVL48:
-	.loc 1 169 0
-	tbz	w0, #31, .L14
-	.loc 1 170 0
+.LVL78:
+	.loc 1 231 0
+	tbz	w0, #31, .L25
+	.loc 1 232 0
 	adrp	x1, .LANCHOR2
 	adrp	x0, .LC5
-.LVL49:
+.LVL79:
 	add	x1, x1, :lo12:.LANCHOR2
 	add	x0, x0, :lo12:.LC5
 	bl	printf
-.LVL50:
-.L15:
-.LBB64:
-	.loc 1 187 0
+.LVL80:
+.L26:
+.LBB73:
+	.loc 1 249 0
 #APP
-// 187 "drivers/misc/rockchip-secure-otp.c" 1
+// 249 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
 	ldr	x0, [x19]
 	mov	w1, 65536
+.LBE73:
+	.loc 1 251 0
+	ldr	x3, [x23, 8]
+	mov	w2, w20
+.LBB74:
+	.loc 1 249 0
 	str	w1, [x0, 256]
-.LVL51:
-.LBE64:
-.LBB65:
-	.loc 1 188 0
-#APP
-// 188 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x19, 8]
-	mov	w1, 262144
-	str	w1, [x0]
-.LVL52:
-.L9:
-.LBE65:
-	.loc 1 191 0
+.LBE74:
+	.loc 1 251 0
+	ldp	x0, x1, [x19, 8]
+	blr	x3
+.LVL81:
+.L20:
+	.loc 1 265 0
 	mov	w0, w22
+	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
-.LVL53:
+.LVL82:
 	ldp	x21, x22, [sp, 32]
-.LVL54:
+.LVL83:
 	ldp	x23, x24, [sp, 48]
-.LVL55:
+.LVL84:
 	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
+.LVL85:
+	ldp	x29, x30, [sp], 96
 	.cfi_remember_state
 	.cfi_restore 30
 	.cfi_restore 29
+	.cfi_restore 27
 	.cfi_restore 25
 	.cfi_restore 26
 	.cfi_restore 23
@@ -469,45 +713,45 @@ rockchip_secure_otp_read:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL56:
-.L14:
+.LVL86:
+.L25:
 	.cfi_restore_state
-.LBB66:
-	.loc 1 174 0
+.LBB75:
+	.loc 1 236 0
 	ldr	x0, [x19]
-.LVL57:
+.LVL87:
 	ldrb	w2, [x0, 292]
 	and	w2, w2, 255
-.LVL58:
+.LVL88:
 #APP
-// 174 "drivers/misc/rockchip-secure-otp.c" 1
+// 236 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
-.LVL59:
+.LVL89:
 #NO_APP
-.LBE66:
-.LBB67:
-	.loc 1 175 0
+.LBE75:
+.LBB76:
+	.loc 1 237 0
 	ldr	x0, [x19]
 	ldrb	w0, [x0, 288]
 	and	w0, w0, 255
-.LVL60:
+.LVL90:
 #APP
-// 175 "drivers/misc/rockchip-secure-otp.c" 1
+// 237 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
-.LVL61:
+.LVL91:
 #NO_APP
-.LBE67:
-.LBB68:
-.LBB69:
-	.loc 1 35 0
+.LBE76:
+.LBB77:
+.LBB78:
+	.loc 1 82 0
 	bfi	w21, w2, 0, 8
-	.loc 1 36 0
-	bfi	w24, w0, 0, 8
-	.loc 1 37 0
+	.loc 1 83 0
+	bfi	w25, w0, 0, 8
+	.loc 1 84 0
 	and	w0, w21, 1
-.LVL62:
+.LVL92:
 	ubfx	x5, x21, 3, 1
 	ubfx	x3, x21, 4, 1
 	ubfx	x8, x21, 1, 1
@@ -519,62 +763,62 @@ rockchip_secure_otp_read:
 	eor	w0, w0, w5
 	eor	w7, w3, w4
 	eor	w0, w4, w0
-	and	w3, w24, 1
+	and	w3, w25, 1
 	cmp	w3, w0
-	bne	.L16
-	.loc 1 38 0
+	bne	.L27
+	.loc 1 85 0
 	ubfx	x3, x21, 2, 1
 	ubfx	x0, x21, 5, 1
 	eor	w4, w4, w3
 	eor	w1, w1, w4
-	ubfx	x4, x24, 1, 1
+	ubfx	x4, x25, 1, 1
 	eor	w1, w0, w1
 	cmp	w4, w1
-	bne	.L16
-	.loc 1 39 0
+	bne	.L27
+	.loc 1 86 0
 	ubfx	x1, x21, 7, 1
 	eor	w3, w3, w1
 	eor	w0, w0, w1
 	eor	w3, w6, w3
-	ubfx	x1, x24, 2, 1
+	ubfx	x1, x25, 2, 1
 	cmp	w1, w3
-	bne	.L16
-	.loc 1 40 0
-	ubfx	x1, x24, 3, 1
+	bne	.L27
+	.loc 1 87 0
+	ubfx	x1, x25, 3, 1
 	eor	w0, w0, w7
 	cmp	w1, w0
-	beq	.L17
-.L16:
-.LVL63:
-.LBE69:
-.LBE68:
-	.loc 1 179 0
+	beq	.L28
+.L27:
+.LVL93:
+.LBE78:
+.LBE77:
+	.loc 1 241 0
 	adrp	x0, .LC6
-	.loc 1 180 0
+	.loc 1 242 0
 	mov	w22, -1
-	.loc 1 179 0
+	.loc 1 241 0
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.LVL64:
-	.loc 1 180 0
-	b	.L15
-.LVL65:
-.L17:
-	.loc 1 183 0
-	strb	w2, [x23], 1
-.LVL66:
-	b	.L11
+.LVL94:
+	.loc 1 242 0
+	b	.L26
+.LVL95:
+.L28:
+	.loc 1 245 0
+	strb	w2, [x24], 1
+.LVL96:
+	b	.L22
 	.cfi_endproc
-.LFE265:
+.LFE275:
 	.size	rockchip_secure_otp_read, .-rockchip_secure_otp_read
 	.section	.text.rockchip_secure_otp_write,"ax",@progbits
 	.align	2
 	.type	rockchip_secure_otp_write, %function
 rockchip_secure_otp_write:
-.LFB267:
-	.loc 1 344 0
+.LFB277:
+	.loc 1 443 0
 	.cfi_startproc
-.LVL67:
+.LVL97:
 	stp	x29, x30, [sp, -128]!
 	.cfi_def_cfa_offset 128
 	.cfi_offset 29, -128
@@ -585,52 +829,51 @@ rockchip_secure_otp_write:
 	.cfi_offset 19, -112
 	.cfi_offset 20, -104
 	mov	w19, w1
-	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -96
-	.cfi_offset 22, -88
-	mov	x21, x0
 	stp	x23, x24, [sp, 48]
 	.cfi_offset 23, -80
 	.cfi_offset 24, -72
 	mov	w24, w3
 	stp	x27, x28, [sp, 80]
+	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	.cfi_offset 27, -48
 	.cfi_offset 28, -40
+	.cfi_offset 21, -96
+	.cfi_offset 22, -88
 	.cfi_offset 25, -64
 	.cfi_offset 26, -56
-	.loc 1 344 0
-	str	x2, [x29, 112]
-	.loc 1 345 0
+	.loc 1 443 0
+	stp	x2, x0, [x29, 104]
+	.loc 1 444 0
 	bl	dev_get_platdata
-.LVL68:
-	mov	x27, x0
-.LVL69:
-	.loc 1 347 0
+.LVL98:
+	mov	x28, x0
+.LVL99:
+	.loc 1 446 0
 	sxtw	x0, w24
-.LVL70:
+.LVL100:
 	bl	malloc_simple
-.LVL71:
-	.loc 1 350 0
-	cbnz	x0, .L22
-.LVL72:
-.L51:
-.LBB143:
-.LBB144:
-	.loc 1 206 0
-	mov	w26, -1
-.L21:
-.LBE144:
-.LBE143:
-	.loc 1 377 0
-	mov	w0, w26
+.LVL101:
+	.loc 1 449 0
+	cbnz	x0, .L33
+.LVL102:
+.L62:
+.LBB146:
+.LBB147:
+	.loc 1 282 0
+	mov	w27, -1
+.L32:
+.LBE147:
+.LBE146:
+	.loc 1 476 0
+	mov	w0, w27
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL73:
+.LVL103:
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-.LVL74:
+.LVL104:
 	ldp	x29, x30, [sp], 128
 	.cfi_remember_state
 	.cfi_restore 30
@@ -646,1167 +889,1127 @@ rockchip_secure_otp_write:
 	.cfi_restore 19
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
-.LVL75:
+.LVL105:
 	ret
-.LVL76:
-.L22:
+.LVL106:
+.L33:
 	.cfi_restore_state
 	mov	x20, x0
-	.loc 1 353 0
+	.loc 1 452 0
 	mov	x2, x0
+	ldr	x0, [x29, 112]
+.LVL107:
 	mov	w3, w24
 	mov	w1, w19
-	mov	x0, x21
-.LVL77:
 	bl	rockchip_secure_otp_read
-.LVL78:
-	.loc 1 354 0
-	cbnz	w0, .L51
+.LVL108:
+	.loc 1 453 0
+	cbnz	w0, .L62
 	mov	x0, 0
-.LVL79:
-.L26:
-	.loc 1 359 0 discriminator 1
+.LVL109:
+.L37:
+	.loc 1 458 0 discriminator 1
 	cmp	w24, w0
-	bgt	.L27
-.LBB227:
-.LBB222:
-	.loc 1 308 0
+	bgt	.L38
+.LBB224:
+.LBB220:
+	.loc 1 397 0
 	adrp	x20, .LANCHOR3
-.LVL80:
+.LVL110:
 	add	x20, x20, :lo12:.LANCHOR3
-.LBE222:
-.LBE227:
-	.loc 1 359 0
+.LBE220:
+.LBE224:
+	.loc 1 458 0
 	mov	x23, 0
-.LVL81:
-.L28:
-	.loc 1 369 0 discriminator 1
+.LVL111:
+.L39:
+	.loc 1 468 0 discriminator 1
 	cmp	w24, w23
-	bgt	.L44
-	mov	w26, 0
-	b	.L21
-.LVL82:
-.L27:
+	bgt	.L55
+	mov	w27, 0
+	b	.L32
+.LVL112:
+.L38:
 	add	x0, x0, 1
-.LVL83:
-	.loc 1 360 0
+.LVL113:
+	.loc 1 459 0
 	add	x1, x20, x0
 	ldrb	w1, [x1, -1]
-	cbz	w1, .L26
-	.loc 1 361 0
+	cbz	w1, .L37
+	.loc 1 460 0
 	adrp	x0, .LC7
 	add	x0, x0, :lo12:.LC7
-.LVL84:
-.L52:
-.LBB228:
-.LBB223:
-	.loc 1 206 0
-	bl	printf
-.LVL85:
-	b	.L51
-.LVL86:
-.L44:
-.LBE223:
-.LBE228:
-	.loc 1 370 0
-	ldr	x0, [x29, 112]
-.LBB229:
-.LBB224:
-	.loc 1 199 0
-	cmp	w19, 448
-.LBE224:
-.LBE229:
-	.loc 1 370 0
-	ldrb	w28, [x0, x23]
-.LVL87:
-.LBB230:
+.LVL114:
+.L63:
 .LBB225:
-	.loc 1 199 0
-	bgt	.L51
-	.loc 1 203 0
-	sub	w0, w19, #16
-	cmp	w19, 0
-	ccmp	w0, 31, 0, ne
-	bls	.L29
+.LBB221:
+	.loc 1 282 0
+	bl	printf
+.LVL115:
+	b	.L62
+.LVL116:
+.L55:
+.LBE221:
+.LBE225:
+	.loc 1 469 0
+	ldr	x0, [x29, 104]
+	ldrb	w0, [x0, x23]
+	str	w0, [x29, 124]
+.LVL117:
+.LBB226:
+.LBB222:
+	.loc 1 272 0
+	ldr	x0, [x29, 112]
+	bl	dev_get_driver_data
+.LVL118:
+	mov	x26, x0
+.LVL119:
+	.loc 1 275 0
+	cmp	w19, 448
+	bgt	.L62
+	.loc 1 279 0
+	sub	w0, w19, #16
+.LVL120:
+	cmp	w19, 0
+	ccmp	w0, 31, 0, ne
+	bls	.L40
 	sub	w0, w19, #128
 	cmp	w0, 263
-	bls	.L29
-	.loc 1 206 0
+	bls	.L40
+	.loc 1 282 0
 	adrp	x0, .LC4
 	add	x0, x0, :lo12:.LC4
-	b	.L52
-.L29:
-	.loc 1 210 0
-	cbnz	w28, .L30
-.LVL88:
-.L43:
+	b	.L63
+.L40:
+	.loc 1 286 0
+	ldr	w0, [x29, 124]
+	cbnz	w0, .L41
+.LVL121:
+.L54:
 	add	x23, x23, 1
 	add	w19, w19, 1
-.LVL89:
-	b	.L28
-.LVL90:
-.L30:
-.LBB145:
-	.loc 1 213 0
-#APP
-// 213 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	mov	x1, 1044
-	mov	w0, 1048592
-	movk	x1, 0xff50, lsl 16
-	str	w0, [x1]
-.LBE145:
-	.loc 1 214 0
-	mov	x0, 10
-	bl	udelay
-.LVL91:
-.LBB146:
-	.loc 1 215 0
-#APP
-// 215 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	mov	x1, 1044
-	mov	w0, 1048576
-	movk	x1, 0xff50, lsl 16
-	str	w0, [x1]
-.LBE146:
-	.loc 1 216 0
-	mov	x0, 10
-	bl	udelay
-.LVL92:
-.LBB147:
-	.loc 1 218 0
-#APP
-// 218 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	mov	w0, 16
-	ldr	x1, [x27, 16]
-	sdiv	w0, w19, w0
-	lsl	w0, w0, 2
-	sxtw	x0, w0
-	str	x0, [x29, 120]
-	mov	w0, -65536
-	ldr	x2, [x29, 120]
-	str	w0, [x2, x1]
-.LVL93:
-.LBE147:
+	b	.L39
+.LVL122:
+.L41:
+	.loc 1 289 0
+	ldr	x3, [x26]
+	mov	w2, w19
+	ldp	x0, x1, [x28, 8]
+	blr	x3
+.LVL123:
 .LBB148:
-	.loc 1 221 0
+	.loc 1 311 0
 #APP
-// 221 "drivers/misc/rockchip-secure-otp.c" 1
+// 311 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x2, [x27, 8]
+	ldr	x0, [x28]
 	mov	w1, 262148
-	str	w1, [x2]
-.LVL94:
+	str	w1, [x0, 32]
+.LVL124:
 .LBE148:
 .LBB149:
-	.loc 1 222 0
+	.loc 1 312 0
 #APP
-// 222 "drivers/misc/rockchip-secure-otp.c" 1
+// 312 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x2, [x27]
-	str	w1, [x2, 32]
-.LVL95:
+	ldr	x0, [x28]
+	mov	w1, -65536
+	str	w1, [x0, 40]
+.LVL125:
 .LBE149:
 .LBB150:
-	.loc 1 223 0
+	.loc 1 313 0
 #APP
-// 223 "drivers/misc/rockchip-secure-otp.c" 1
+// 313 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x1, [x27]
-	str	w0, [x1, 40]
-.LVL96:
+	ldr	x0, [x28]
+	mov	w1, 512
+	movk	w1, 0xff00, lsl 16
+	str	w1, [x0, 32]
+.LVL126:
 .LBE150:
 .LBB151:
-	.loc 1 224 0
+	.loc 1 314 0
 #APP
-// 224 "drivers/misc/rockchip-secure-otp.c" 1
+// 314 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-	mov	w1, 512
-	movk	w1, 0xff00, lsl 16
-	str	w1, [x0, 32]
-.LVL97:
+	ldr	x0, [x28]
+	mov	w1, -65522
+	str	w1, [x0, 36]
+.LVL127:
 .LBE151:
 .LBB152:
-	.loc 1 225 0
+	.loc 1 315 0
 #APP
-// 225 "drivers/misc/rockchip-secure-otp.c" 1
+// 315 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-	mov	w1, -65522
-	str	w1, [x0, 36]
-.LVL98:
+	ldr	x0, [x28]
+	mov	w2, 240
+	str	w2, [x29, 120]
+.LVL128:
+	str	w2, [x0, 4096]
 .LBE152:
 .LBB153:
-	.loc 1 226 0
+	.loc 1 316 0
 #APP
-// 226 "drivers/misc/rockchip-secure-otp.c" 1
+// 316 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-	mov	w3, 240
-	str	w3, [x29, 108]
-.LVL99:
-	str	w3, [x0, 4096]
+	ldr	x0, [x28]
+	mov	w25, 1
+	str	w25, [x0, 4100]
+.LVL129:
 .LBE153:
 .LBB154:
-	.loc 1 227 0
+	.loc 1 317 0
 #APP
-// 227 "drivers/misc/rockchip-secure-otp.c" 1
+// 317 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-	mov	w25, 1
-	str	w25, [x0, 4100]
-.LVL100:
+	ldr	x0, [x28]
+	mov	w21, 122
+	str	w21, [x0, 4104]
+.LVL130:
 .LBE154:
 .LBB155:
-	.loc 1 228 0
+	.loc 1 318 0
 #APP
-// 228 "drivers/misc/rockchip-secure-otp.c" 1
+// 318 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-	mov	w21, 122
-	str	w21, [x0, 4104]
-.LVL101:
+	ldr	x0, [x28]
+	mov	w1, 37
+	str	w1, [x0, 4108]
+.LVL131:
 .LBE155:
 .LBB156:
-	.loc 1 229 0
+	.loc 1 319 0
 #APP
-// 229 "drivers/misc/rockchip-secure-otp.c" 1
+// 319 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-	mov	w1, 37
-	str	w1, [x0, 4108]
-.LVL102:
+	ldr	x0, [x28]
+	mov	w1, 4
+	str	w1, [x0, 4112]
+.LVL132:
 .LBE156:
 .LBB157:
-	.loc 1 230 0
+	.loc 1 320 0
 #APP
-// 230 "drivers/misc/rockchip-secure-otp.c" 1
+// 320 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-	mov	w1, 4
-	str	w1, [x0, 4112]
-.LVL103:
+	ldr	x0, [x28]
+	str	wzr, [x0, 4116]
+.LVL133:
 .LBE157:
 .LBB158:
-	.loc 1 231 0
+	.loc 1 321 0
 #APP
-// 231 "drivers/misc/rockchip-secure-otp.c" 1
+// 321 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-	str	wzr, [x0, 4116]
-.LVL104:
+	ldr	x0, [x28]
+	str	wzr, [x0, 4120]
+.LVL134:
 .LBE158:
 .LBB159:
-	.loc 1 232 0
+	.loc 1 322 0
 #APP
-// 232 "drivers/misc/rockchip-secure-otp.c" 1
+// 322 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-	str	wzr, [x0, 4120]
-.LVL105:
+	ldr	x0, [x28]
+	str	wzr, [x0, 4124]
+.LVL135:
 .LBE159:
 .LBB160:
-	.loc 1 233 0
+	.loc 1 323 0
 #APP
-// 233 "drivers/misc/rockchip-secure-otp.c" 1
+// 323 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-	str	wzr, [x0, 4124]
-.LVL106:
+	ldr	x0, [x28]
+	mov	w1, 11
+	str	w1, [x0, 4128]
+.LVL136:
 .LBE160:
 .LBB161:
-	.loc 1 234 0
+	.loc 1 324 0
 #APP
-// 234 "drivers/misc/rockchip-secure-otp.c" 1
+// 324 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-	mov	w1, 11
-	str	w1, [x0, 4128]
-.LVL107:
+	ldr	x0, [x28]
+	mov	w1, 8
+	str	w1, [x0, 4132]
+.LVL137:
 .LBE161:
 .LBB162:
-	.loc 1 235 0
+	.loc 1 325 0
 #APP
-// 235 "drivers/misc/rockchip-secure-otp.c" 1
+// 325 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-	mov	w1, 8
-	str	w1, [x0, 4132]
-.LVL108:
+	ldr	x0, [x28]
+	str	wzr, [x0, 4136]
+.LVL138:
 .LBE162:
 .LBB163:
-	.loc 1 236 0
+	.loc 1 326 0
 #APP
-// 236 "drivers/misc/rockchip-secure-otp.c" 1
+// 326 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-	str	wzr, [x0, 4136]
-.LVL109:
+	ldr	x0, [x28]
+	str	wzr, [x0, 4140]
+.LVL139:
 .LBE163:
 .LBB164:
-	.loc 1 237 0
+	.loc 1 327 0
 #APP
-// 237 "drivers/misc/rockchip-secure-otp.c" 1
+// 327 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-	str	wzr, [x0, 4140]
-.LVL110:
+	ldr	x0, [x28]
+	str	wzr, [x0, 4144]
 .LBE164:
 .LBB165:
-	.loc 1 238 0
-#APP
-// 238 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	str	wzr, [x0, 4144]
-.LBE165:
-.LBB166:
-	.loc 1 239 0
+	.loc 1 328 0
 	and	w0, w19, 255
 #APP
-// 239 "drivers/misc/rockchip-secure-otp.c" 1
+// 328 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x1, [x27]
+	ldr	x1, [x28]
 	str	w0, [x1, 4148]
-.LBE166:
-.LBB167:
-	.loc 1 240 0
+.LBE165:
+.LBB166:
+	.loc 1 329 0
 	ubfx	x1, x19, 8, 8
-.LVL111:
+.LVL140:
 #APP
-// 240 "drivers/misc/rockchip-secure-otp.c" 1
+// 329 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
+	ldr	x0, [x28]
 	str	w1, [x0, 4152]
-.LVL112:
-.LBE167:
-.LBB168:
-	.loc 1 241 0
+.LVL141:
+.LBE166:
+.LBB167:
+	.loc 1 330 0
 #APP
-// 241 "drivers/misc/rockchip-secure-otp.c" 1
+// 330 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
+	ldr	x0, [x28]
 	mov	w22, 65537
-.LBE168:
-	.loc 1 242 0
+.LBE167:
+	.loc 1 331 0
 	mov	w1, 2
-.LVL113:
-.LBB169:
-	.loc 1 241 0
+.LVL142:
+.LBB168:
+	.loc 1 330 0
 	str	w22, [x0, 32]
-.LVL114:
-.LBE169:
-	.loc 1 242 0
-	mov	x0, x27
+.LVL143:
+.LBE168:
+	.loc 1 331 0
+	mov	x0, x28
 	bl	rockchip_secure_otp_wait_status.isra.1
-.LVL115:
-	mov	w26, w0
-.LVL116:
-	.loc 1 243 0
-	ldr	w3, [x29, 108]
-	tbz	w0, #31, .L31
-	.loc 1 244 0
+.LVL144:
+	mov	w27, w0
+.LVL145:
+	.loc 1 332 0
+	ldr	w2, [x29, 120]
+	tbz	w0, #31, .L42
+	.loc 1 333 0
 	adrp	x0, .LC8
-.LVL117:
+.LVL146:
 	mov	x1, x20
 	add	x0, x0, :lo12:.LC8
-.L50:
-	.loc 1 267 0
+.L61:
+	.loc 1 356 0
 	bl	printf
-.LVL118:
-.L32:
-.LBB170:
-	.loc 1 335 0
+.LVL147:
+.L43:
+.LBB169:
+	.loc 1 424 0
 #APP
-// 335 "drivers/misc/rockchip-secure-otp.c" 1
+// 424 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
+	ldr	x0, [x28]
 	mov	w1, -65533
+.LBE169:
+	.loc 1 425 0
+	ldr	x5, [x26, 8]
+	mov	w2, w19
+.LBB170:
+	.loc 1 424 0
 	str	w1, [x0, 772]
-.LVL119:
 .LBE170:
+	.loc 1 425 0
+	ldp	x0, x1, [x28, 8]
+	blr	x5
+.LVL148:
+.LBE222:
+.LBE226:
+	.loc 1 470 0
+	cbz	w27, .L54
+	b	.L32
+.LVL149:
+.L42:
+.LBB227:
+.LBB223:
 .LBB171:
-	.loc 1 336 0
+	.loc 1 337 0
 #APP
-// 336 "drivers/misc/rockchip-secure-otp.c" 1
+// 337 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27, 8]
-	mov	w1, 262144
-	str	w1, [x0]
-.LVL120:
+	ldr	x0, [x28]
+.LVL150:
+	mov	w1, 14848
+	movk	w1, 0xff00, lsl 16
+	str	w1, [x0, 32]
+.LVL151:
 .LBE171:
 .LBB172:
-	.loc 1 337 0
+	.loc 1 338 0
 #APP
-// 337 "drivers/misc/rockchip-secure-otp.c" 1
+// 338 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27, 16]
-	mov	w1, -1
-	ldr	x2, [x29, 120]
-	str	w1, [x2, x0]
-.LVL121:
+	ldr	x0, [x28]
+	str	w2, [x0, 4096]
+.LVL152:
 .LBE172:
-.LBE225:
-.LBE230:
-	.loc 1 371 0
-	cbz	w26, .L43
-	b	.L21
-.LVL122:
-.L31:
-.LBB231:
-.LBB226:
 .LBB173:
-	.loc 1 248 0
+	.loc 1 339 0
 #APP
-// 248 "drivers/misc/rockchip-secure-otp.c" 1
+// 339 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-.LVL123:
-	mov	w1, 14848
-	movk	w1, 0xff00, lsl 16
-	str	w1, [x0, 32]
-.LVL124:
+	ldr	x0, [x28]
+	str	w25, [x0, 4100]
+.LVL153:
 .LBE173:
 .LBB174:
-	.loc 1 249 0
+	.loc 1 340 0
 #APP
-// 249 "drivers/misc/rockchip-secure-otp.c" 1
+// 340 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-	str	w3, [x0, 4096]
-.LVL125:
+	ldr	x0, [x28]
+	str	w21, [x0, 4104]
+.LVL154:
 .LBE174:
 .LBB175:
-	.loc 1 250 0
+	.loc 1 341 0
 #APP
-// 250 "drivers/misc/rockchip-secure-otp.c" 1
+// 341 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-	str	w25, [x0, 4100]
-.LVL126:
+	ldr	x0, [x28]
+	mov	w1, 21
+	str	w1, [x0, 4108]
+.LVL155:
 .LBE175:
 .LBB176:
-	.loc 1 251 0
+	.loc 1 342 0
 #APP
-// 251 "drivers/misc/rockchip-secure-otp.c" 1
+// 342 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-	str	w21, [x0, 4104]
-.LVL127:
+	ldr	x0, [x28]
+	mov	w1, 220
+	str	w1, [x0, 4112]
+.LVL156:
 .LBE176:
 .LBB177:
-	.loc 1 252 0
+	.loc 1 343 0
 #APP
-// 252 "drivers/misc/rockchip-secure-otp.c" 1
+// 343 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-	mov	w1, 21
-	str	w1, [x0, 4108]
-.LVL128:
+	ldr	x0, [x28]
+	mov	w1, 146
+	str	w1, [x0, 4116]
+.LVL157:
 .LBE177:
 .LBB178:
-	.loc 1 253 0
+	.loc 1 344 0
 #APP
-// 253 "drivers/misc/rockchip-secure-otp.c" 1
+// 344 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-	mov	w1, 220
-	str	w1, [x0, 4112]
-.LVL129:
+	ldr	x0, [x28]
+	mov	w1, 121
+	str	w1, [x0, 4120]
+.LVL158:
 .LBE178:
 .LBB179:
-	.loc 1 254 0
+	.loc 1 345 0
 #APP
-// 254 "drivers/misc/rockchip-secure-otp.c" 1
+// 345 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-	mov	w1, 146
-	str	w1, [x0, 4116]
-.LVL130:
+	ldr	x0, [x28]
+	mov	w1, 129
+	str	w1, [x0, 4124]
+.LVL159:
 .LBE179:
 .LBB180:
-	.loc 1 255 0
+	.loc 1 346 0
 #APP
-// 255 "drivers/misc/rockchip-secure-otp.c" 1
+// 346 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-	mov	w1, 121
-	str	w1, [x0, 4120]
-.LVL131:
+	ldr	x0, [x28]
+	mov	w1, 126
+	str	w1, [x0, 4128]
+.LVL160:
 .LBE180:
 .LBB181:
-	.loc 1 256 0
+	.loc 1 347 0
 #APP
-// 256 "drivers/misc/rockchip-secure-otp.c" 1
+// 347 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-	mov	w1, 129
-	str	w1, [x0, 4124]
-.LVL132:
+	ldr	x0, [x28]
+	mov	w1, 33
+	str	w1, [x0, 4132]
+.LVL161:
 .LBE181:
 .LBB182:
-	.loc 1 257 0
+	.loc 1 348 0
 #APP
-// 257 "drivers/misc/rockchip-secure-otp.c" 1
+// 348 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-	mov	w1, 126
-	str	w1, [x0, 4128]
-.LVL133:
+	ldr	x0, [x28]
+	mov	w1, 17
+	str	w1, [x0, 4136]
+.LVL162:
 .LBE182:
 .LBB183:
-	.loc 1 258 0
+	.loc 1 349 0
 #APP
-// 258 "drivers/misc/rockchip-secure-otp.c" 1
+// 349 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-	mov	w1, 33
-	str	w1, [x0, 4132]
-.LVL134:
+	ldr	x0, [x28]
+	mov	w1, 157
+	str	w1, [x0, 4140]
+.LVL163:
 .LBE183:
 .LBB184:
-	.loc 1 259 0
+	.loc 1 350 0
 #APP
-// 259 "drivers/misc/rockchip-secure-otp.c" 1
+// 350 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-	mov	w1, 17
-	str	w1, [x0, 4136]
-.LVL135:
+	ldr	x0, [x28]
+	mov	w21, 2
+	str	w21, [x0, 4144]
+.LVL164:
 .LBE184:
 .LBB185:
-	.loc 1 260 0
+	.loc 1 351 0
 #APP
-// 260 "drivers/misc/rockchip-secure-otp.c" 1
+// 351 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-	mov	w1, 157
-	str	w1, [x0, 4140]
-.LVL136:
+	ldr	x0, [x28]
+	str	wzr, [x0, 4148]
+.LVL165:
 .LBE185:
 .LBB186:
-	.loc 1 261 0
+	.loc 1 352 0
 #APP
-// 261 "drivers/misc/rockchip-secure-otp.c" 1
+// 352 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-	mov	w21, 2
-	str	w21, [x0, 4144]
-.LVL137:
+	ldr	x0, [x28]
+	str	wzr, [x0, 4152]
+.LVL166:
 .LBE186:
 .LBB187:
-	.loc 1 262 0
+	.loc 1 353 0
 #APP
-// 262 "drivers/misc/rockchip-secure-otp.c" 1
+// 353 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-	str	wzr, [x0, 4148]
-.LVL138:
+	ldr	x0, [x28]
 .LBE187:
-.LBB188:
-	.loc 1 263 0
-#APP
-// 263 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-	str	wzr, [x0, 4152]
-.LVL139:
-.LBE188:
-.LBB189:
-	.loc 1 264 0
-#APP
-// 264 "drivers/misc/rockchip-secure-otp.c" 1
-	dmb sy
-// 0 "" 2
-#NO_APP
-	ldr	x0, [x27]
-.LBE189:
-	.loc 1 265 0
+	.loc 1 354 0
 	mov	w1, w21
-.LBB190:
-	.loc 1 264 0
+.LBB188:
+	.loc 1 353 0
 	str	w22, [x0, 32]
-.LBE190:
-	.loc 1 265 0
-	mov	x0, x27
+.LBE188:
+	.loc 1 354 0
+	mov	x0, x28
 	bl	rockchip_secure_otp_wait_status.isra.1
-.LVL140:
-	mov	w26, w0
-.LVL141:
-	.loc 1 266 0
-	tbz	w0, #31, .L33
-	.loc 1 267 0
+.LVL167:
+	mov	w27, w0
+.LVL168:
+	.loc 1 355 0
+	tbz	w0, #31, .L44
+	.loc 1 356 0
 	adrp	x0, .LC9
-.LVL142:
+.LVL169:
 	mov	x1, x20
 	add	x0, x0, :lo12:.LC9
-	b	.L50
-.LVL143:
-.L33:
-.LBB191:
-	.loc 1 271 0
+	b	.L61
+.LVL170:
+.L44:
+.LBB189:
+	.loc 1 360 0
 #APP
-// 271 "drivers/misc/rockchip-secure-otp.c" 1
+// 360 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-.LVL144:
+	ldr	x0, [x28]
+.LVL171:
 	mov	w1, 512
 	movk	w1, 0xff00, lsl 16
 	str	w1, [x0, 32]
-.LVL145:
-.LBE191:
-.LBB192:
-	.loc 1 272 0
+.LVL172:
+.LBE189:
+.LBB190:
+	.loc 1 361 0
 #APP
-// 272 "drivers/misc/rockchip-secure-otp.c" 1
+// 361 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
+	ldr	x0, [x28]
 	mov	w1, -65535
 	str	w1, [x0, 36]
-.LVL146:
-.LBE192:
-.LBB193:
-	.loc 1 273 0
+.LVL173:
+.LBE190:
+.LBB191:
+	.loc 1 362 0
 #APP
-// 273 "drivers/misc/rockchip-secure-otp.c" 1
+// 362 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
+	ldr	x0, [x28]
 	mov	w1, 251
 	str	w1, [x0, 4096]
-.LVL147:
-.LBE193:
-.LBB194:
-	.loc 1 274 0
+.LVL174:
+.LBE191:
+.LBB192:
+	.loc 1 363 0
 #APP
-// 274 "drivers/misc/rockchip-secure-otp.c" 1
+// 363 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
+	ldr	x0, [x28]
 	str	wzr, [x0, 4100]
-.LVL148:
-.LBE194:
-.LBB195:
-	.loc 1 275 0
+.LVL175:
+.LBE192:
+.LBB193:
+	.loc 1 364 0
 #APP
-// 275 "drivers/misc/rockchip-secure-otp.c" 1
+// 364 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-.LBE195:
-	.loc 1 276 0
+	ldr	x0, [x28]
+.LBE193:
+	.loc 1 365 0
 	mov	w1, w21
-.LBB196:
-	.loc 1 275 0
+.LBB194:
+	.loc 1 364 0
 	str	w22, [x0, 32]
-.LBE196:
-	.loc 1 276 0
-	mov	x0, x27
+.LBE194:
+	.loc 1 365 0
+	mov	x0, x28
 	bl	rockchip_secure_otp_wait_status.isra.1
-.LVL149:
-	mov	w26, w0
-.LVL150:
-	.loc 1 277 0
-	tbz	w0, #31, .L34
-	.loc 1 278 0
+.LVL176:
+	mov	w27, w0
+.LVL177:
+	.loc 1 366 0
+	tbz	w0, #31, .L45
+	.loc 1 367 0
 	adrp	x0, .LC10
-.LVL151:
+.LVL178:
 	mov	x1, x20
 	add	x0, x0, :lo12:.LC10
-	b	.L50
-.LVL152:
-.L34:
-.LBB197:
-	.loc 1 282 0
+	b	.L61
+.LVL179:
+.L45:
+.LBB195:
+	.loc 1 371 0
 #APP
-// 282 "drivers/misc/rockchip-secure-otp.c" 1
+// 371 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-.LVL153:
+	ldr	x0, [x28]
+.LVL180:
 	mov	w1, 192
 	str	w1, [x0, 4096]
-.LVL154:
-.LBE197:
-.LBB198:
-	.loc 1 283 0
+.LVL181:
+.LBE195:
+.LBB196:
+	.loc 1 372 0
 #APP
-// 283 "drivers/misc/rockchip-secure-otp.c" 1
+// 372 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-	str	w28, [x0, 4100]
-.LVL155:
-.LBE198:
-.LBB199:
-	.loc 1 284 0
+	ldr	x0, [x28]
+	ldr	w1, [x29, 124]
+	str	w1, [x0, 4100]
+.LVL182:
+.LBE196:
+.LBB197:
+	.loc 1 373 0
 #APP
-// 284 "drivers/misc/rockchip-secure-otp.c" 1
+// 373 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-.LBE199:
-	.loc 1 285 0
+	ldr	x0, [x28]
+.LBE197:
+	.loc 1 374 0
 	mov	w1, w21
-.LBB200:
-	.loc 1 284 0
+.LBB198:
+	.loc 1 373 0
 	str	w22, [x0, 32]
-.LBE200:
-	.loc 1 285 0
-	mov	x0, x27
+.LBE198:
+	.loc 1 374 0
+	mov	x0, x28
 	bl	rockchip_secure_otp_wait_status.isra.1
-.LVL156:
-	mov	w26, w0
-.LVL157:
-	.loc 1 286 0
-	tbz	w0, #31, .L35
-	.loc 1 287 0
+.LVL183:
+	mov	w27, w0
+.LVL184:
+	.loc 1 375 0
+	tbz	w0, #31, .L46
+	.loc 1 376 0
 	adrp	x0, .LC11
-.LVL158:
+.LVL185:
 	mov	x1, x20
 	add	x0, x0, :lo12:.LC11
-	b	.L50
-.LVL159:
-.L35:
-.LBB201:
-	.loc 1 291 0
+	b	.L61
+.LVL186:
+.L46:
+.LBB199:
+	.loc 1 380 0
 #APP
-// 291 "drivers/misc/rockchip-secure-otp.c" 1
+// 380 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-.LVL160:
+	ldr	x0, [x28]
+.LVL187:
 	mov	w1, 14848
 	movk	w1, 0xff00, lsl 16
 	str	w1, [x0, 32]
-.LVL161:
-.LBE201:
-.LBB202:
-	.loc 1 292 0
+.LVL188:
+.LBE199:
+.LBB200:
+	.loc 1 381 0
 #APP
-// 292 "drivers/misc/rockchip-secure-otp.c" 1
+// 381 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
+	ldr	x0, [x28]
 	mov	w1, 255
 	str	w1, [x0, 4096]
-.LVL162:
-.LBE202:
-.LBB203:
-	.loc 1 293 0
+.LVL189:
+.LBE200:
+.LBB201:
+	.loc 1 382 0
 #APP
-// 293 "drivers/misc/rockchip-secure-otp.c" 1
+// 382 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
+	ldr	x0, [x28]
 	mov	w1, 10
 	str	w1, [x0, 4100]
-.LVL163:
-.LBE203:
-.LBB204:
-	.loc 1 294 0
+.LVL190:
+.LBE201:
+.LBB202:
+	.loc 1 383 0
 #APP
-// 294 "drivers/misc/rockchip-secure-otp.c" 1
+// 383 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-.LBE204:
-	.loc 1 295 0
+	ldr	x0, [x28]
+.LBE202:
+	.loc 1 384 0
 	mov	w1, w21
-.LBB205:
-	.loc 1 294 0
+.LBB203:
+	.loc 1 383 0
 	str	w22, [x0, 32]
-.LBE205:
-	.loc 1 295 0
-	mov	x0, x27
+.LBE203:
+	.loc 1 384 0
+	mov	x0, x28
 	bl	rockchip_secure_otp_wait_status.isra.1
-.LVL164:
-	mov	w26, w0
-.LVL165:
-	.loc 1 296 0
-	tbz	w0, #31, .L36
-	.loc 1 297 0
+.LVL191:
+	mov	w27, w0
+.LVL192:
+	.loc 1 385 0
+	tbz	w0, #31, .L47
+	.loc 1 386 0
 	adrp	x0, .LC12
-.LVL166:
+.LVL193:
 	mov	x1, x20
 	add	x0, x0, :lo12:.LC12
-	b	.L50
-.LVL167:
-.L36:
-.LBB206:
-	.loc 1 301 0
+	b	.L61
+.LVL194:
+.L47:
+.LBB204:
+	.loc 1 390 0
 #APP
-// 301 "drivers/misc/rockchip-secure-otp.c" 1
+// 390 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-.LVL168:
+	ldr	x0, [x28]
+.LVL195:
 	mov	w1, -65534
 	str	w1, [x0, 36]
-.LVL169:
-.LBE206:
-.LBB207:
-	.loc 1 302 0
+.LVL196:
+.LBE204:
+.LBB205:
+	.loc 1 391 0
 #APP
-// 302 "drivers/misc/rockchip-secure-otp.c" 1
+// 391 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
+	ldr	x0, [x28]
 	str	w25, [x0, 4096]
-.LVL170:
-.LBE207:
-.LBB208:
-	.loc 1 303 0
+.LVL197:
+.LBE205:
+.LBB206:
+	.loc 1 392 0
 #APP
-// 303 "drivers/misc/rockchip-secure-otp.c" 1
+// 392 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
+	ldr	x0, [x28]
 	mov	w1, 191
 	str	w1, [x0, 4100]
-.LVL171:
-.LBE208:
-.LBB209:
-	.loc 1 304 0
+.LVL198:
+.LBE206:
+.LBB207:
+	.loc 1 393 0
 #APP
-// 304 "drivers/misc/rockchip-secure-otp.c" 1
+// 393 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
+	ldr	x0, [x28]
 	str	wzr, [x0, 4104]
-.LVL172:
-.LBE209:
-.LBB210:
-	.loc 1 305 0
+.LVL199:
+.LBE207:
+.LBB208:
+	.loc 1 394 0
 #APP
-// 305 "drivers/misc/rockchip-secure-otp.c" 1
+// 394 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-.LBE210:
-	.loc 1 306 0
+	ldr	x0, [x28]
+.LBE208:
+	.loc 1 395 0
 	mov	w1, w21
-.LBB211:
-	.loc 1 305 0
+.LBB209:
+	.loc 1 394 0
 	str	w22, [x0, 32]
-.LBE211:
-	.loc 1 306 0
-	mov	x0, x27
+.LBE209:
+	.loc 1 395 0
+	mov	x0, x28
 	bl	rockchip_secure_otp_wait_status.isra.1
-.LVL173:
-	mov	w26, w0
-.LVL174:
-	.loc 1 307 0
-	tbnz	w0, #31, .L37
+.LVL200:
+	mov	w27, w0
+.LVL201:
+	.loc 1 396 0
+	tbnz	w0, #31, .L48
 	mov	w21, 34465
 	movk	w21, 0x1, lsl 16
-.LVL175:
-.L38:
+.LVL202:
+.L49:
+.LBB210:
+.LBB211:
 .LBB212:
-.LBB213:
-.LBB214:
-	.loc 1 95 0
-	ldr	x0, [x27]
+	.loc 1 142 0
+	ldr	x0, [x28]
 	ldr	w0, [x0, 44]
-.LVL176:
+.LVL203:
 #APP
-// 95 "drivers/misc/rockchip-secure-otp.c" 1
+// 142 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
-.LVL177:
+.LVL204:
 #NO_APP
-.LBE214:
-	.loc 1 96 0
-	and	w26, w0, 16
-	tbz	x0, 4, .L39
-	.loc 1 99 0
+.LBE212:
+	.loc 1 143 0
+	and	w27, w0, 16
+	tbz	x0, 4, .L50
+	.loc 1 146 0
 	subs	w21, w21, #1
-.LVL178:
-	beq	.L40
-.LVL179:
-	.loc 1 105 0
+.LVL205:
+	beq	.L51
+.LVL206:
+	.loc 1 152 0
 	mov	x0, 1
-.LVL180:
+.LVL207:
 	bl	udelay
-.LVL181:
-	b	.L38
-.LVL182:
-.L37:
-.LBE213:
-.LBE212:
-	.loc 1 308 0
+.LVL208:
+	b	.L49
+.LVL209:
+.L48:
+.LBE211:
+.LBE210:
+	.loc 1 397 0
 	adrp	x0, .LC13
-.LVL183:
+.LVL210:
 	mov	x1, x20
 	add	x0, x0, :lo12:.LC13
-	b	.L50
-.LVL184:
-.L45:
-	.loc 1 324 0
+	b	.L61
+.LVL211:
+.L56:
+	.loc 1 413 0
 	mov	x1, x20
 	adrp	x0, .LC14
-.LVL185:
-	mov	w26, w21
+.LVL212:
+	mov	w27, w21
 	add	x0, x0, :lo12:.LC14
 	bl	printf
-.LVL186:
-	b	.L32
-.LVL187:
-.L40:
-	.loc 1 314 0
+.LVL213:
+	b	.L43
+.LVL214:
+.L51:
+	.loc 1 403 0
 	adrp	x0, .LC15
 	mov	x1, x20
 	add	x0, x0, :lo12:.LC15
-.L49:
-	.loc 1 330 0
+.L60:
+	.loc 1 419 0
 	bl	printf
-.LVL188:
-	mov	w26, -1
-	b	.L32
-.LVL189:
-.L39:
-.LBB215:
-	.loc 1 318 0
+.LVL215:
+	mov	w27, -1
+	b	.L43
+.LVL216:
+.L50:
+.LBB213:
+	.loc 1 407 0
 #APP
-// 318 "drivers/misc/rockchip-secure-otp.c" 1
+// 407 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
+	ldr	x0, [x28]
 	mov	w1, -65534
 	str	w1, [x0, 36]
-.LVL190:
-.LBE215:
-.LBB216:
-	.loc 1 319 0
+.LVL217:
+.LBE213:
+.LBB214:
+	.loc 1 408 0
 #APP
-// 319 "drivers/misc/rockchip-secure-otp.c" 1
+// 408 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
+	ldr	x0, [x28]
 	mov	w1, 2
 	str	w1, [x0, 4096]
-.LVL191:
-.LBE216:
-.LBB217:
-	.loc 1 320 0
+.LVL218:
+.LBE214:
+.LBB215:
+	.loc 1 409 0
 #APP
-// 320 "drivers/misc/rockchip-secure-otp.c" 1
+// 409 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-	mov	w3, 191
-	str	w3, [x0, 4100]
-.LVL192:
-.LBE217:
-.LBB218:
-	.loc 1 321 0
+	ldr	x0, [x28]
+	mov	w2, 191
+	str	w2, [x0, 4100]
+.LVL219:
+.LBE215:
+.LBB216:
+	.loc 1 410 0
 #APP
-// 321 "drivers/misc/rockchip-secure-otp.c" 1
+// 410 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
 #NO_APP
-	ldr	x0, [x27]
-	mov	w3, 65537
-	str	w3, [x0, 32]
-.LBE218:
-	.loc 1 322 0
-	mov	x0, x27
+	ldr	x0, [x28]
+	mov	w2, 65537
+	str	w2, [x0, 32]
+.LBE216:
+	.loc 1 411 0
+	mov	x0, x28
 	bl	rockchip_secure_otp_wait_status.isra.1
-.LVL193:
+.LVL220:
 	mov	w21, w0
-.LVL194:
-	.loc 1 323 0
-	tbnz	w0, #31, .L45
+.LVL221:
+	.loc 1 412 0
+	tbnz	w0, #31, .L56
 	mov	w21, 20001
-.LVL195:
-.L42:
+.LVL222:
+.L53:
+.LBB217:
+.LBB218:
 .LBB219:
-.LBB220:
-.LBB221:
-	.loc 1 73 0
-	ldr	x0, [x27]
+	.loc 1 120 0
+	ldr	x0, [x28]
 	ldr	w0, [x0, 44]
-.LVL196:
+.LVL223:
 #APP
-// 73 "drivers/misc/rockchip-secure-otp.c" 1
+// 120 "drivers/misc/rockchip-secure-otp.c" 1
 	dmb sy
 // 0 "" 2
-.LVL197:
+.LVL224:
 #NO_APP
-.LBE221:
-	.loc 1 74 0
-	tbnz	x0, 4, .L32
-	.loc 1 77 0
+.LBE219:
+	.loc 1 121 0
+	tbnz	x0, 4, .L43
+	.loc 1 124 0
 	subs	w21, w21, #1
-.LVL198:
-	beq	.L41
-	.loc 1 82 0
+.LVL225:
+	beq	.L52
+	.loc 1 129 0
 	mov	x0, 1
-.LVL199:
+.LVL226:
 	bl	udelay
-.LVL200:
-	b	.L42
-.LVL201:
-.L41:
-.LBE220:
-.LBE219:
-	.loc 1 330 0
+.LVL227:
+	b	.L53
+.LVL228:
+.L52:
+.LBE218:
+.LBE217:
+	.loc 1 419 0
 	adrp	x0, .LC16
 	mov	x1, x20
 	add	x0, x0, :lo12:.LC16
-	b	.L49
-.LBE226:
-.LBE231:
+	b	.L60
+.LBE223:
+.LBE227:
 	.cfi_endproc
-.LFE267:
+.LFE277:
 	.size	rockchip_secure_otp_write, .-rockchip_secure_otp_write
 	.global	_u_boot_list_2_driver_2_rockchip_secure_otp
-	.section	.rodata.__func__.7183,"a",@progbits
+	.section	.rodata.__func__.7407,"a",@progbits
 	.align	3
 	.set	.LANCHOR0,. + 0
-	.type	__func__.7183, %object
-	.size	__func__.7183, 32
-__func__.7183:
+	.type	__func__.7407, %object
+	.size	__func__.7407, 32
+__func__.7407:
 	.string	"rockchip_secure_otp_wait_status"
-	.section	.rodata.__func__.7226,"a",@progbits
+	.section	.rodata.__func__.7450,"a",@progbits
 	.align	3
 	.set	.LANCHOR1,. + 0
-	.type	__func__.7226, %object
-	.size	__func__.7226, 31
-__func__.7226:
+	.type	__func__.7450, %object
+	.size	__func__.7450, 31
+__func__.7450:
 	.string	"rockchip_secure_otp_ecc_enable"
-	.section	.rodata.__func__.7251,"a",@progbits
+	.section	.rodata.__func__.7470,"a",@progbits
 	.align	3
 	.set	.LANCHOR2,. + 0
-	.type	__func__.7251, %object
-	.size	__func__.7251, 25
-__func__.7251:
+	.type	__func__.7470, %object
+	.size	__func__.7470, 25
+__func__.7470:
 	.string	"rockchip_secure_otp_read"
-	.section	.rodata.__func__.7318,"a",@progbits
+	.section	.rodata.__func__.7529,"a",@progbits
 	.align	3
 	.set	.LANCHOR3,. + 0
-	.type	__func__.7318, %object
-	.size	__func__.7318, 31
-__func__.7318:
+	.type	__func__.7529, %object
+	.size	__func__.7529, 31
+__func__.7529:
 	.string	"rockchip_secure_otp_write_byte"
+	.section	.rodata.px30_data,"a",@progbits
+	.align	3
+	.type	px30_data, %object
+	.size	px30_data, 16
+px30_data:
+	.xword	px30_spl_rockchip_otp_start
+	.xword	px30_spl_rockchip_otp_stop
+	.section	.rodata.rk3308_data,"a",@progbits
+	.align	3
+	.type	rk3308_data, %object
+	.size	rk3308_data, 16
+rk3308_data:
+	.xword	rk3308_spl_rockchip_otp_start
+	.xword	rk3308_spl_rockchip_otp_stop
+	.section	.rodata.rk3328_data,"a",@progbits
+	.align	3
+	.type	rk3328_data, %object
+	.size	rk3328_data, 16
+rk3328_data:
+	.xword	rk3328_spl_rockchip_otp_start
+	.xword	rk3328_spl_rockchip_otp_stop
 	.section	.rodata.rockchip_otp_ids,"a",@progbits
 	.align	3
 	.type	rockchip_otp_ids, %object
-	.size	rockchip_otp_ids, 32
+	.size	rockchip_otp_ids, 80
 rockchip_otp_ids:
 	.xword	.LC18
-	.zero	8
+	.xword	rk3308_data
+	.xword	.LC19
+	.xword	rk3328_data
+	.xword	.LC20
+	.xword	px30_data
+	.xword	.LC21
+	.xword	px30_data
 	.zero	16
 	.section	.rodata.rockchip_secure_otp_ofdata_to_platdata.str1.1,"aMS",@progbits,1
 .LC0:
@@ -1820,7 +2023,8 @@ rockchip_otp_ids:
 rockchip_secure_otp_ops:
 	.xword	rockchip_secure_otp_read
 	.xword	rockchip_secure_otp_write
-	.zero	16
+	.xword	rockchip_secure_otp_ioctl
+	.zero	8
 	.section	.rodata.rockchip_secure_otp_read.str1.1,"aMS",@progbits,1
 .LC3:
 	.string	"%s timeout during ecc_enable\n"
@@ -1859,6 +2063,12 @@ rockchip_secure_otp_ops:
 	.string	"rockchip_secure_otp"
 .LC18:
 	.string	"rockchip,rk3308-secure-otp"
+.LC19:
+	.string	"rockchip,rk3328-secure-otp"
+.LC20:
+	.string	"rockchip,rk3326-secure-otp"
+.LC21:
+	.string	"rockchip,px30-secure-otp"
 	.section	.u_boot_list_2_driver_2_rockchip_secure_otp,"aw",@progbits
 	.align	2
 	.type	_u_boot_list_2_driver_2_rockchip_secure_otp, %object
@@ -1904,24 +2114,25 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.file 26 "include/malloc.h"
 	.file 27 "include/linux/compat.h"
 	.file 28 "include/dm/uclass.h"
-	.file 29 "include/misc.h"
-	.file 30 "include/rockchip-otp.h"
-	.file 31 "include/dm/read.h"
-	.file 32 "include/linux/delay.h"
-	.file 33 "include/stdio.h"
-	.file 34 "include/log.h"
+	.file 29 "include/asm-generic/ioctl.h"
+	.file 30 "include/misc.h"
+	.file 31 "include/rockchip-otp.h"
+	.file 32 "include/dm/read.h"
+	.file 33 "include/linux/delay.h"
+	.file 34 "include/stdio.h"
+	.file 35 "include/log.h"
 	.section	.debug_info,"",@progbits
 .Ldebug_info0:
-	.4byte	0x2ec0
+	.4byte	0x33c8
 	.2byte	0x4
 	.4byte	.Ldebug_abbrev0
 	.byte	0x8
 	.uleb128 0x1
-	.4byte	.LASF414
+	.4byte	.LASF456
 	.byte	0xc
-	.4byte	.LASF415
-	.4byte	.LASF416
-	.4byte	.Ldebug_ranges0+0x1c0
+	.4byte	.LASF457
+	.4byte	.LASF458
+	.4byte	.Ldebug_ranges0+0x210
 	.8byte	0
 	.4byte	.Ldebug_line0
 	.uleb128 0x2
@@ -1992,6 +2203,11 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x3
 	.byte	0x25
 	.4byte	0x7f
+	.uleb128 0x6
+	.string	"u64"
+	.byte	0x3
+	.byte	0x28
+	.4byte	0x8d
 	.uleb128 0x2
 	.4byte	.LASF11
 	.byte	0x3
@@ -2008,20 +2224,20 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	.LASF13
 	.uleb128 0x8
 	.byte	0x8
-	.4byte	0xd8
+	.4byte	0xe3
 	.uleb128 0x3
 	.byte	0x1
 	.byte	0x8
 	.4byte	.LASF14
 	.uleb128 0x7
-	.4byte	0xd1
+	.4byte	0xdc
 	.uleb128 0x3
 	.byte	0x8
 	.byte	0x5
 	.4byte	.LASF15
 	.uleb128 0x8
 	.byte	0x8
-	.4byte	0xd1
+	.4byte	0xdc
 	.uleb128 0x2
 	.4byte	.LASF16
 	.byte	0x4
@@ -2053,132 +2269,132 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	.LASF22
 	.byte	0x6
 	.byte	0xb
-	.4byte	0xe4
+	.4byte	0xef
 	.uleb128 0x3
 	.byte	0x1
 	.byte	0x2
 	.4byte	.LASF23
 	.uleb128 0xa
-	.4byte	0xd1
-	.4byte	0x140
+	.4byte	0xdc
+	.4byte	0x14b
 	.uleb128 0xb
 	.byte	0
 	.uleb128 0xc
 	.4byte	.LASF24
 	.byte	0x7
 	.2byte	0x140
-	.4byte	0x135
+	.4byte	0x140
 	.uleb128 0xc
 	.4byte	.LASF25
 	.byte	0x7
 	.2byte	0x143
-	.4byte	0x135
+	.4byte	0x140
 	.uleb128 0xc
 	.4byte	.LASF26
 	.byte	0x7
 	.2byte	0x143
-	.4byte	0x135
+	.4byte	0x140
 	.uleb128 0xd
 	.4byte	.LASF45
 	.byte	0xa0
 	.byte	0x8
 	.byte	0x80
-	.4byte	0x249
+	.4byte	0x254
 	.uleb128 0xe
 	.4byte	.LASF27
 	.byte	0x8
 	.byte	0x81
-	.4byte	0x12d2
+	.4byte	0x1443
 	.byte	0
 	.uleb128 0xe
 	.4byte	.LASF28
 	.byte	0x8
 	.byte	0x82
-	.4byte	0xcb
+	.4byte	0xd6
 	.byte	0x8
 	.uleb128 0xe
 	.4byte	.LASF29
 	.byte	0x8
 	.byte	0x83
-	.4byte	0x121
+	.4byte	0x12c
 	.byte	0x10
 	.uleb128 0xe
 	.4byte	.LASF30
 	.byte	0x8
 	.byte	0x84
-	.4byte	0x121
+	.4byte	0x12c
 	.byte	0x18
 	.uleb128 0xe
 	.4byte	.LASF31
 	.byte	0x8
 	.byte	0x85
-	.4byte	0x121
+	.4byte	0x12c
 	.byte	0x20
 	.uleb128 0xe
 	.4byte	.LASF32
 	.byte	0x8
 	.byte	0x86
-	.4byte	0x1279
+	.4byte	0x13ea
 	.byte	0x28
 	.uleb128 0xe
 	.4byte	.LASF33
 	.byte	0x8
 	.byte	0x87
-	.4byte	0xf5
+	.4byte	0x100
 	.byte	0x30
 	.uleb128 0xe
 	.4byte	.LASF34
 	.byte	0x8
 	.byte	0x88
-	.4byte	0x249
+	.4byte	0x254
 	.byte	0x38
 	.uleb128 0xe
 	.4byte	.LASF35
 	.byte	0x8
 	.byte	0x89
-	.4byte	0x121
+	.4byte	0x12c
 	.byte	0x40
 	.uleb128 0xe
 	.4byte	.LASF36
 	.byte	0x8
 	.byte	0x8a
-	.4byte	0x1315
+	.4byte	0x1486
 	.byte	0x48
 	.uleb128 0xe
 	.4byte	.LASF37
 	.byte	0x8
 	.byte	0x8b
-	.4byte	0x121
+	.4byte	0x12c
 	.byte	0x50
 	.uleb128 0xe
 	.4byte	.LASF38
 	.byte	0x8
 	.byte	0x8c
-	.4byte	0x121
+	.4byte	0x12c
 	.byte	0x58
 	.uleb128 0xe
 	.4byte	.LASF39
 	.byte	0x8
 	.byte	0x8d
-	.4byte	0x27c
+	.4byte	0x287
 	.byte	0x60
 	.uleb128 0xe
 	.4byte	.LASF40
 	.byte	0x8
 	.byte	0x8e
-	.4byte	0x27c
+	.4byte	0x287
 	.byte	0x70
 	.uleb128 0xe
 	.4byte	.LASF41
 	.byte	0x8
 	.byte	0x8f
-	.4byte	0x27c
+	.4byte	0x287
 	.byte	0x80
 	.uleb128 0xe
 	.4byte	.LASF42
 	.byte	0x8
 	.byte	0x90
-	.4byte	0x10b
+	.4byte	0x116
 	.byte	0x90
 	.uleb128 0xe
 	.4byte	.LASF43
@@ -2195,26 +2411,26 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x8
-	.4byte	0x164
+	.4byte	0x16f
 	.uleb128 0x8
 	.byte	0x8
-	.4byte	0x255
+	.4byte	0x260
 	.uleb128 0x10
 	.uleb128 0xa
-	.4byte	0xf5
-	.4byte	0x261
+	.4byte	0x100
+	.4byte	0x26c
 	.uleb128 0xb
 	.byte	0
 	.uleb128 0x4
 	.4byte	.LASF44
 	.byte	0x9
 	.byte	0x10
-	.4byte	0x256
+	.4byte	0x261
 	.uleb128 0xa
 	.4byte	0x34
-	.4byte	0x27c
+	.4byte	0x287
 	.uleb128 0x11
-	.4byte	0xc4
+	.4byte	0xcf
 	.byte	0x5
 	.byte	0
 	.uleb128 0xd
@@ -2222,47 +2438,47 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x10
 	.byte	0xa
 	.byte	0x16
-	.4byte	0x2a1
+	.4byte	0x2ac
 	.uleb128 0xe
 	.4byte	.LASF47
 	.byte	0xa
 	.byte	0x17
-	.4byte	0x2a1
+	.4byte	0x2ac
 	.byte	0
 	.uleb128 0xe
 	.4byte	.LASF48
 	.byte	0xa
 	.byte	0x17
-	.4byte	0x2a1
+	.4byte	0x2ac
 	.byte	0x8
 	.byte	0
 	.uleb128 0x8
 	.byte	0x8
-	.4byte	0x27c
+	.4byte	0x287
 	.uleb128 0xd
 	.4byte	.LASF49
 	.byte	0x10
 	.byte	0xb
 	.byte	0xf
-	.4byte	0x2cc
+	.4byte	0x2d7
 	.uleb128 0xe
 	.4byte	.LASF28
 	.byte	0xb
 	.byte	0x10
-	.4byte	0xe4
+	.4byte	0xef
 	.byte	0
 	.uleb128 0xe
 	.4byte	.LASF50
 	.byte	0xb
 	.byte	0x11
-	.4byte	0x2e5
+	.4byte	0x2f0
 	.byte	0x8
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x2a7
+	.4byte	0x2b2
 	.uleb128 0x12
 	.4byte	0x54
-	.4byte	0x2e5
+	.4byte	0x2f0
 	.uleb128 0x13
 	.4byte	0x54
 	.uleb128 0x13
@@ -2270,95 +2486,84 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x8
-	.4byte	0x2d1
+	.4byte	0x2dc
 	.uleb128 0xa
-	.4byte	0x2cc
-	.4byte	0x2f6
+	.4byte	0x2d7
+	.4byte	0x301
 	.uleb128 0xb
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x2eb
+	.4byte	0x2f6
 	.uleb128 0x4
 	.4byte	.LASF49
 	.byte	0xb
 	.byte	0xce
-	.4byte	0x2f6
+	.4byte	0x301
 	.uleb128 0x14
-	.2byte	0x1220
+	.2byte	0x1218
 	.byte	0xc
 	.byte	0x13
-	.4byte	0x35a
+	.4byte	0x358
 	.uleb128 0xe
 	.4byte	.LASF51
 	.byte	0xc
 	.byte	0x14
-	.4byte	0xf5
+	.4byte	0x100
 	.byte	0
 	.uleb128 0xe
 	.4byte	.LASF52
 	.byte	0xc
 	.byte	0x15
-	.4byte	0xea
+	.4byte	0xf5
 	.byte	0x8
 	.uleb128 0xe
 	.4byte	.LASF53
 	.byte	0xc
 	.byte	0x16
-	.4byte	0xf5
+	.4byte	0x100
 	.byte	0x10
 	.uleb128 0xe
 	.4byte	.LASF54
 	.byte	0xc
 	.byte	0x17
-	.4byte	0x35a
+	.4byte	0x358
 	.byte	0x18
 	.uleb128 0x15
 	.4byte	.LASF55
 	.byte	0xc
 	.byte	0x18
-	.4byte	0x36b
+	.4byte	0x369
 	.2byte	0x1018
-	.uleb128 0x16
-	.string	"mtd"
-	.byte	0xc
-	.byte	0x31
-	.4byte	0x381
-	.2byte	0x1218
 	.byte	0
 	.uleb128 0xa
-	.4byte	0xf5
-	.4byte	0x36b
-	.uleb128 0x17
-	.4byte	0xc4
+	.4byte	0x100
+	.4byte	0x369
+	.uleb128 0x16
+	.4byte	0xcf
 	.2byte	0x1ff
 	.byte	0
 	.uleb128 0xa
 	.4byte	0x29
-	.4byte	0x37c
-	.uleb128 0x17
-	.4byte	0xc4
+	.4byte	0x37a
+	.uleb128 0x16
+	.4byte	0xcf
 	.2byte	0x1ff
 	.byte	0
-	.uleb128 0x18
-	.4byte	.LASF299
-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0x37c
 	.uleb128 0x2
 	.4byte	.LASF56
 	.byte	0xc
 	.byte	0x37
-	.4byte	0x306
+	.4byte	0x311
 	.uleb128 0xa
-	.4byte	0x387
-	.4byte	0x39d
+	.4byte	0x37a
+	.4byte	0x390
 	.uleb128 0xb
 	.byte	0
 	.uleb128 0x4
 	.4byte	.LASF57
 	.byte	0xc
 	.byte	0x39
-	.4byte	0x392
+	.4byte	0x385
 	.uleb128 0x3
 	.byte	0x10
 	.byte	0x4
@@ -2368,26 +2573,26 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x10
 	.byte	0xd
 	.byte	0x10
-	.4byte	0x3d4
+	.4byte	0x3c7
 	.uleb128 0xe
 	.4byte	.LASF60
 	.byte	0xd
 	.byte	0x11
-	.4byte	0xae
+	.4byte	0xb9
 	.byte	0
 	.uleb128 0xe
 	.4byte	.LASF51
 	.byte	0xd
 	.byte	0x12
-	.4byte	0xb9
+	.4byte	0xc4
 	.byte	0x8
 	.byte	0
-	.uleb128 0x19
+	.uleb128 0x17
 	.4byte	.LASF61
 	.2byte	0x120
 	.byte	0xd
 	.byte	0x15
-	.4byte	0x406
+	.4byte	0x3f9
 	.uleb128 0xf
 	.string	"cnt"
 	.byte	0xd
@@ -2398,70 +2603,70 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	.LASF51
 	.byte	0xd
 	.byte	0x17
-	.4byte	0xb9
+	.4byte	0xc4
 	.byte	0x8
 	.uleb128 0xe
 	.4byte	.LASF62
 	.byte	0xd
 	.byte	0x18
-	.4byte	0x406
+	.4byte	0x3f9
 	.byte	0x10
 	.byte	0
 	.uleb128 0xa
-	.4byte	0x3af
-	.4byte	0x416
+	.4byte	0x3a2
+	.4byte	0x409
 	.uleb128 0x11
-	.4byte	0xc4
+	.4byte	0xcf
 	.byte	0x10
 	.byte	0
-	.uleb128 0x1a
+	.uleb128 0x18
 	.string	"lmb"
 	.2byte	0x240
 	.byte	0xd
 	.byte	0x1b
-	.4byte	0x43d
+	.4byte	0x430
 	.uleb128 0xe
 	.4byte	.LASF63
 	.byte	0xd
 	.byte	0x1c
-	.4byte	0x3d4
+	.4byte	0x3c7
 	.byte	0
 	.uleb128 0x15
 	.4byte	.LASF64
 	.byte	0xd
 	.byte	0x1d
-	.4byte	0x3d4
+	.4byte	0x3c7
 	.2byte	0x120
 	.byte	0
-	.uleb128 0x1b
+	.uleb128 0x19
 	.string	"lmb"
 	.byte	0xd
 	.byte	0x20
-	.4byte	0x416
-	.uleb128 0x1c
+	.4byte	0x409
+	.uleb128 0x1a
 	.byte	0x10
 	.byte	0xe
-	.byte	0x5a
-	.4byte	0x469
+	.byte	0x5d
+	.4byte	0x45c
 	.uleb128 0xe
 	.4byte	.LASF54
 	.byte	0xe
-	.byte	0x5b
+	.byte	0x5e
 	.4byte	0xae
 	.byte	0
 	.uleb128 0xe
 	.4byte	.LASF51
 	.byte	0xe
-	.byte	0x5c
-	.4byte	0xb9
+	.byte	0x5f
+	.4byte	0xae
 	.byte	0x8
 	.byte	0
-	.uleb128 0x19
+	.uleb128 0xd
 	.4byte	.LASF65
-	.2byte	0x148
+	.byte	0xb0
 	.byte	0xe
 	.byte	0x1b
-	.4byte	0x55b
+	.4byte	0x559
 	.uleb128 0xe
 	.4byte	.LASF66
 	.byte	0xe
@@ -2472,7 +2677,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	.LASF67
 	.byte	0xe
 	.byte	0x1d
-	.4byte	0xb9
+	.4byte	0xc4
 	.byte	0x8
 	.uleb128 0xe
 	.4byte	.LASF68
@@ -2538,7 +2743,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	.LASF78
 	.byte	0xe
 	.byte	0x33
-	.4byte	0x26c
+	.4byte	0x277
 	.byte	0x60
 	.uleb128 0xe
 	.4byte	.LASF79
@@ -2562,801 +2767,819 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	.LASF82
 	.byte	0xe
 	.byte	0x57
-	.4byte	0xf5
+	.4byte	0x100
 	.byte	0x78
 	.uleb128 0xe
 	.4byte	.LASF83
 	.byte	0xe
 	.byte	0x58
-	.4byte	0xf5
+	.4byte	0x100
 	.byte	0x80
 	.uleb128 0xe
 	.4byte	.LASF84
 	.byte	0xe
-	.byte	0x5d
-	.4byte	0x55b
+	.byte	0x5b
+	.4byte	0x7f
 	.byte	0x88
+	.uleb128 0xe
+	.4byte	.LASF85
+	.byte	0xe
+	.byte	0x60
+	.4byte	0x559
+	.byte	0x90
 	.byte	0
 	.uleb128 0xa
-	.4byte	0x448
-	.4byte	0x56b
+	.4byte	0x43b
+	.4byte	0x569
 	.uleb128 0x11
-	.4byte	0xc4
-	.byte	0xb
+	.4byte	0xcf
+	.byte	0x1
 	.byte	0
 	.uleb128 0x2
-	.4byte	.LASF85
+	.4byte	.LASF86
 	.byte	0xe
-	.byte	0x5f
-	.4byte	0x469
+	.byte	0x62
+	.4byte	0x45c
 	.uleb128 0x4
-	.4byte	.LASF86
+	.4byte	.LASF87
 	.byte	0xf
 	.byte	0x13
-	.4byte	0xf5
+	.4byte	0x100
 	.uleb128 0x4
-	.4byte	.LASF87
+	.4byte	.LASF88
 	.byte	0xf
 	.byte	0x14
-	.4byte	0xf5
+	.4byte	0x100
 	.uleb128 0x4
-	.4byte	.LASF88
+	.4byte	.LASF89
 	.byte	0xf
 	.byte	0x15
-	.4byte	0xf5
+	.4byte	0x100
 	.uleb128 0x4
-	.4byte	.LASF89
+	.4byte	.LASF90
 	.byte	0xf
 	.byte	0x16
-	.4byte	0xf5
+	.4byte	0x100
 	.uleb128 0x4
-	.4byte	.LASF90
+	.4byte	.LASF91
 	.byte	0xf
 	.byte	0x17
-	.4byte	0xf5
+	.4byte	0x100
 	.uleb128 0x4
-	.4byte	.LASF91
+	.4byte	.LASF92
 	.byte	0xf
 	.byte	0x18
-	.4byte	0xf5
+	.4byte	0x100
 	.uleb128 0x4
-	.4byte	.LASF92
+	.4byte	.LASF93
 	.byte	0xf
 	.byte	0x19
-	.4byte	0xf5
+	.4byte	0x100
 	.uleb128 0x2
-	.4byte	.LASF93
+	.4byte	.LASF94
 	.byte	0x10
 	.byte	0x11
-	.4byte	0x116
+	.4byte	0x121
 	.uleb128 0xd
-	.4byte	.LASF94
+	.4byte	.LASF95
 	.byte	0x28
 	.byte	0x11
 	.byte	0x39
-	.4byte	0x653
+	.4byte	0x651
 	.uleb128 0xe
-	.4byte	.LASF95
+	.4byte	.LASF96
 	.byte	0x11
 	.byte	0x3a
-	.4byte	0x5c3
+	.4byte	0x5c1
 	.byte	0
 	.uleb128 0xe
-	.4byte	.LASF96
+	.4byte	.LASF97
 	.byte	0x11
 	.byte	0x3b
-	.4byte	0x5c3
+	.4byte	0x5c1
 	.byte	0x4
 	.uleb128 0xe
-	.4byte	.LASF97
+	.4byte	.LASF98
 	.byte	0x11
 	.byte	0x3c
-	.4byte	0x5c3
+	.4byte	0x5c1
 	.byte	0x8
 	.uleb128 0xe
-	.4byte	.LASF98
+	.4byte	.LASF99
 	.byte	0x11
 	.byte	0x3d
-	.4byte	0x5c3
+	.4byte	0x5c1
 	.byte	0xc
 	.uleb128 0xe
-	.4byte	.LASF99
+	.4byte	.LASF100
 	.byte	0x11
 	.byte	0x3e
-	.4byte	0x5c3
+	.4byte	0x5c1
 	.byte	0x10
 	.uleb128 0xe
-	.4byte	.LASF100
+	.4byte	.LASF101
 	.byte	0x11
 	.byte	0x3f
-	.4byte	0x5c3
+	.4byte	0x5c1
 	.byte	0x14
 	.uleb128 0xe
-	.4byte	.LASF101
+	.4byte	.LASF102
 	.byte	0x11
 	.byte	0x40
-	.4byte	0x5c3
+	.4byte	0x5c1
 	.byte	0x18
 	.uleb128 0xe
-	.4byte	.LASF102
+	.4byte	.LASF103
 	.byte	0x11
 	.byte	0x43
-	.4byte	0x5c3
+	.4byte	0x5c1
 	.byte	0x1c
 	.uleb128 0xe
-	.4byte	.LASF103
+	.4byte	.LASF104
 	.byte	0x11
 	.byte	0x46
-	.4byte	0x5c3
+	.4byte	0x5c1
 	.byte	0x20
 	.uleb128 0xe
-	.4byte	.LASF104
+	.4byte	.LASF105
 	.byte	0x11
 	.byte	0x49
-	.4byte	0x5c3
+	.4byte	0x5c1
 	.byte	0x24
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF105
+	.4byte	.LASF106
 	.byte	0x12
 	.2byte	0x136
-	.4byte	0x65f
+	.4byte	0x65d
 	.uleb128 0x8
 	.byte	0x8
-	.4byte	0x5ce
-	.uleb128 0x1d
-	.4byte	.LASF106
+	.4byte	0x5cc
+	.uleb128 0x1b
+	.4byte	.LASF107
 	.byte	0x40
 	.byte	0x13
-	.2byte	0x134
-	.4byte	0x70f
-	.uleb128 0x1e
-	.4byte	.LASF107
+	.2byte	0x137
+	.4byte	0x70d
+	.uleb128 0x1c
+	.4byte	.LASF108
 	.byte	0x13
-	.2byte	0x135
-	.4byte	0x116
+	.2byte	0x138
+	.4byte	0x121
 	.byte	0
-	.uleb128 0x1e
-	.4byte	.LASF108
+	.uleb128 0x1c
+	.4byte	.LASF109
 	.byte	0x13
-	.2byte	0x136
-	.4byte	0x116
+	.2byte	0x139
+	.4byte	0x121
 	.byte	0x4
-	.uleb128 0x1e
-	.4byte	.LASF109
+	.uleb128 0x1c
+	.4byte	.LASF110
 	.byte	0x13
-	.2byte	0x137
-	.4byte	0x116
+	.2byte	0x13a
+	.4byte	0x121
 	.byte	0x8
-	.uleb128 0x1e
-	.4byte	.LASF110
+	.uleb128 0x1c
+	.4byte	.LASF111
 	.byte	0x13
-	.2byte	0x138
-	.4byte	0x116
+	.2byte	0x13b
+	.4byte	0x121
 	.byte	0xc
-	.uleb128 0x1e
-	.4byte	.LASF111
+	.uleb128 0x1c
+	.4byte	.LASF112
 	.byte	0x13
-	.2byte	0x139
-	.4byte	0x116
+	.2byte	0x13c
+	.4byte	0x121
 	.byte	0x10
-	.uleb128 0x1e
-	.4byte	.LASF112
+	.uleb128 0x1c
+	.4byte	.LASF113
 	.byte	0x13
-	.2byte	0x13a
-	.4byte	0x116
+	.2byte	0x13d
+	.4byte	0x121
 	.byte	0x14
-	.uleb128 0x1e
-	.4byte	.LASF113
+	.uleb128 0x1c
+	.4byte	.LASF114
 	.byte	0x13
-	.2byte	0x13b
-	.4byte	0x116
+	.2byte	0x13e
+	.4byte	0x121
 	.byte	0x18
-	.uleb128 0x1e
-	.4byte	.LASF114
+	.uleb128 0x1c
+	.4byte	.LASF115
 	.byte	0x13
-	.2byte	0x13c
-	.4byte	0x100
+	.2byte	0x13f
+	.4byte	0x10b
 	.byte	0x1c
-	.uleb128 0x1e
-	.4byte	.LASF115
+	.uleb128 0x1c
+	.4byte	.LASF116
 	.byte	0x13
-	.2byte	0x13d
-	.4byte	0x100
+	.2byte	0x140
+	.4byte	0x10b
 	.byte	0x1d
-	.uleb128 0x1e
-	.4byte	.LASF116
+	.uleb128 0x1c
+	.4byte	.LASF117
 	.byte	0x13
-	.2byte	0x13e
-	.4byte	0x100
+	.2byte	0x141
+	.4byte	0x10b
 	.byte	0x1e
-	.uleb128 0x1e
-	.4byte	.LASF117
+	.uleb128 0x1c
+	.4byte	.LASF118
 	.byte	0x13
-	.2byte	0x13f
-	.4byte	0x100
+	.2byte	0x142
+	.4byte	0x10b
 	.byte	0x1f
-	.uleb128 0x1e
-	.4byte	.LASF118
+	.uleb128 0x1c
+	.4byte	.LASF119
 	.byte	0x13
-	.2byte	0x140
-	.4byte	0x70f
+	.2byte	0x143
+	.4byte	0x70d
 	.byte	0x20
 	.byte	0
 	.uleb128 0xa
-	.4byte	0x100
-	.4byte	0x71f
+	.4byte	0x10b
+	.4byte	0x71d
 	.uleb128 0x11
-	.4byte	0xc4
+	.4byte	0xcf
 	.byte	0x1f
 	.byte	0
-	.uleb128 0x1f
-	.4byte	.LASF119
-	.byte	0x13
-	.2byte	0x141
-	.4byte	0x665
 	.uleb128 0x1d
 	.4byte	.LASF120
+	.byte	0x13
+	.2byte	0x144
+	.4byte	0x663
+	.uleb128 0x1b
+	.4byte	.LASF121
 	.byte	0x30
 	.byte	0x13
-	.2byte	0x143
-	.4byte	0x7ad
-	.uleb128 0x1e
+	.2byte	0x146
+	.4byte	0x7ab
+	.uleb128 0x1c
 	.4byte	.LASF54
 	.byte	0x13
-	.2byte	0x144
-	.4byte	0xf5
+	.2byte	0x147
+	.4byte	0x100
 	.byte	0
-	.uleb128 0x20
+	.uleb128 0x1e
 	.string	"end"
 	.byte	0x13
-	.2byte	0x144
-	.4byte	0xf5
+	.2byte	0x147
+	.4byte	0x100
 	.byte	0x8
-	.uleb128 0x1e
-	.4byte	.LASF121
-	.byte	0x13
-	.2byte	0x145
-	.4byte	0xf5
-	.byte	0x10
-	.uleb128 0x1e
+	.uleb128 0x1c
 	.4byte	.LASF122
 	.byte	0x13
-	.2byte	0x145
-	.4byte	0xf5
-	.byte	0x18
-	.uleb128 0x1e
+	.2byte	0x148
+	.4byte	0x100
+	.byte	0x10
+	.uleb128 0x1c
 	.4byte	.LASF123
 	.byte	0x13
-	.2byte	0x146
-	.4byte	0xf5
-	.byte	0x20
-	.uleb128 0x1e
+	.2byte	0x148
+	.4byte	0x100
+	.byte	0x18
+	.uleb128 0x1c
 	.4byte	.LASF124
 	.byte	0x13
-	.2byte	0x147
+	.2byte	0x149
 	.4byte	0x100
-	.byte	0x28
-	.uleb128 0x1e
+	.byte	0x20
+	.uleb128 0x1c
 	.4byte	.LASF125
 	.byte	0x13
-	.2byte	0x147
-	.4byte	0x100
+	.2byte	0x14a
+	.4byte	0x10b
+	.byte	0x28
+	.uleb128 0x1c
+	.4byte	.LASF126
+	.byte	0x13
+	.2byte	0x14a
+	.4byte	0x10b
 	.byte	0x29
-	.uleb128 0x20
+	.uleb128 0x1e
 	.string	"os"
 	.byte	0x13
-	.2byte	0x147
-	.4byte	0x100
+	.2byte	0x14a
+	.4byte	0x10b
 	.byte	0x2a
-	.uleb128 0x1e
-	.4byte	.LASF126
+	.uleb128 0x1c
+	.4byte	.LASF127
 	.byte	0x13
-	.2byte	0x148
-	.4byte	0x100
+	.2byte	0x14b
+	.4byte	0x10b
 	.byte	0x2b
 	.byte	0
-	.uleb128 0x1f
-	.4byte	.LASF127
-	.byte	0x13
-	.2byte	0x149
-	.4byte	0x72b
-	.uleb128 0x21
+	.uleb128 0x1d
 	.4byte	.LASF128
-	.2byte	0x380
 	.byte	0x13
-	.2byte	0x14f
-	.4byte	0x956
-	.uleb128 0x1e
+	.2byte	0x14c
+	.4byte	0x729
+	.uleb128 0x1f
 	.4byte	.LASF129
+	.2byte	0x380
 	.byte	0x13
-	.2byte	0x155
-	.4byte	0x956
-	.byte	0
-	.uleb128 0x1e
+	.2byte	0x152
+	.4byte	0x954
+	.uleb128 0x1c
 	.4byte	.LASF130
 	.byte	0x13
-	.2byte	0x156
-	.4byte	0x71f
-	.byte	0x8
-	.uleb128 0x1e
+	.2byte	0x158
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 	.string	"os"
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 	.string	"ep"
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 	.string	"kbd"
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 	.string	"lmb"
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+	.byte	0x54
+	.uleb128 0x23
 	.4byte	.LASF243
-	.byte	0x56
-	.uleb128 0x25
+	.byte	0x55
+	.uleb128 0x23
 	.4byte	.LASF244
-	.byte	0x57
-	.uleb128 0x26
+	.byte	0x56
+	.uleb128 0x23
 	.4byte	.LASF245
+	.byte	0x57
+	.uleb128 0x23
+	.4byte	.LASF246
+	.byte	0x58
+	.uleb128 0x23
+	.4byte	.LASF247
+	.byte	0x59
+	.uleb128 0x23
+	.4byte	.LASF248
+	.byte	0x5a
+	.uleb128 0x23
+	.4byte	.LASF249
+	.byte	0x5b
+	.uleb128 0x24
+	.4byte	.LASF250
 	.sleb128 -1
 	.byte	0
-	.uleb128 0x27
+	.uleb128 0x25
 	.byte	0x4
 	.4byte	0x7f
-	.byte	0x22
+	.byte	0x23
 	.byte	0xf6
-	.4byte	0xbb4
-	.uleb128 0x25
-	.4byte	.LASF246
+	.4byte	0xbca
+	.uleb128 0x23
+	.4byte	.LASF251
 	.byte	0x5
 	.byte	0
 	.uleb128 0xd
-	.4byte	.LASF247
+	.4byte	.LASF252
 	.byte	0x40
 	.byte	0x14
 	.byte	0xc
-	.4byte	0xc2d
+	.4byte	0xc43
 	.uleb128 0xe
-	.4byte	.LASF248
+	.4byte	.LASF253
 	.byte	0x14
 	.byte	0x22
 	.4byte	0x3b
@@ -3374,722 +3597,887 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.4byte	0x7f
 	.byte	0xc
 	.uleb128 0xe
-	.4byte	.LASF249
+	.4byte	.LASF254
 	.byte	0x14
 	.byte	0x25
 	.4byte	0x3b
 	.byte	0x10
 	.uleb128 0xe
-	.4byte	.LASF250
+	.4byte	.LASF255
 	.byte	0x14
 	.byte	0x26
 	.4byte	0x8d
 	.byte	0x18
 	.uleb128 0xe
-	.4byte	.LASF251
+	.4byte	.LASF256
 	.byte	0x14
 	.byte	0x28
 	.4byte	0x3b
 	.byte	0x20
 	.uleb128 0xe
-	.4byte	.LASF252
+	.4byte	.LASF257
 	.byte	0x14
 	.byte	0x29
 	.4byte	0x3b
 	.byte	0x28
 	.uleb128 0xe
-	.4byte	.LASF253
+	.4byte	.LASF258
 	.byte	0x14
 	.byte	0x2b
 	.4byte	0x3b
 	.byte	0x30
 	.uleb128 0xe
-	.4byte	.LASF254
+	.4byte	.LASF259
 	.byte	0x14
 	.byte	0x2c
 	.4byte	0x3b
 	.byte	0x38
 	.byte	0
 	.uleb128 0xd
-	.4byte	.LASF255
+	.4byte	.LASF260
 	.byte	0x18
 	.byte	0x15
 	.byte	0x22
-	.4byte	0xc69
+	.4byte	0xc8b
 	.uleb128 0xe
-	.4byte	.LASF256
+	.4byte	.LASF261
 	.byte	0x15
 	.byte	0x23
 	.4byte	0xa3
 	.byte	0
-	.uleb128 0xf
-	.string	"id"
+	.uleb128 0xe
+	.4byte	.LASF262
 	.byte	0x15
 	.byte	0x24
 	.4byte	0xa3
 	.byte	0x4
-	.uleb128 0xe
-	.4byte	.LASF257
+	.uleb128 0xf
+	.string	"id"
 	.byte	0x15
 	.byte	0x25
 	.4byte	0xa3
 	.byte	0x8
 	.uleb128 0xe
-	.4byte	.LASF258
+	.4byte	.LASF263
 	.byte	0x15
 	.byte	0x26
-	.4byte	0xf5
+	.4byte	0xa3
+	.byte	0xc
+	.uleb128 0xe
+	.4byte	.LASF264
+	.byte	0x15
+	.byte	0x27
+	.4byte	0x100
 	.byte	0x10
 	.byte	0
-	.uleb128 0x19
-	.4byte	.LASF259
-	.2byte	0x190
+	.uleb128 0x17
+	.4byte	.LASF265
+	.2byte	0x1b8
 	.byte	0x15
-	.byte	0x29
-	.4byte	0xe46
+	.byte	0x2a
+	.4byte	0xea8
 	.uleb128 0xf
 	.string	"bd"
 	.byte	0x15
-	.byte	0x2a
-	.4byte	0x95c
+	.byte	0x2b
+	.4byte	0x95a
 	.byte	0
 	.uleb128 0xe
 	.4byte	.LASF42
 	.byte	0x15
-	.byte	0x2b
+	.byte	0x2c
 	.4byte	0x3b
 	.byte	0x8
 	.uleb128 0xe
-	.4byte	.LASF257
+	.4byte	.LASF263
 	.byte	0x15
-	.byte	0x2c
+	.byte	0x2d
 	.4byte	0x7f
 	.byte	0x10
 	.uleb128 0xe
-	.4byte	.LASF260
+	.4byte	.LASF266
 	.byte	0x15
-	.byte	0x2d
+	.byte	0x2e
 	.4byte	0x3b
 	.byte	0x18
 	.uleb128 0xe
-	.4byte	.LASF261
+	.4byte	.LASF267
 	.byte	0x15
-	.byte	0x2e
+	.byte	0x2f
 	.4byte	0x3b
 	.byte	0x20
 	.uleb128 0xe
-	.4byte	.LASF262
+	.4byte	.LASF268
 	.byte	0x15
-	.byte	0x30
+	.byte	0x31
 	.4byte	0x3b
 	.byte	0x28
 	.uleb128 0xe
-	.4byte	.LASF263
+	.4byte	.LASF269
 	.byte	0x15
-	.byte	0x31
+	.byte	0x32
 	.4byte	0x3b
 	.byte	0x30
 	.uleb128 0xe
-	.4byte	.LASF264
+	.4byte	.LASF270
 	.byte	0x15
-	.byte	0x3d
+	.byte	0x34
 	.4byte	0x3b
 	.byte	0x38
 	.uleb128 0xe
-	.4byte	.LASF265
+	.4byte	.LASF271
 	.byte	0x15
-	.byte	0x41
+	.byte	0x3e
 	.4byte	0x3b
 	.byte	0x40
 	.uleb128 0xe
-	.4byte	.LASF266
+	.4byte	.LASF272
 	.byte	0x15
 	.byte	0x42
 	.4byte	0x3b
 	.byte	0x48
 	.uleb128 0xe
-	.4byte	.LASF267
+	.4byte	.LASF273
 	.byte	0x15
-	.byte	0x44
+	.byte	0x43
 	.4byte	0x3b
 	.byte	0x50
 	.uleb128 0xe
-	.4byte	.LASF268
+	.4byte	.LASF274
 	.byte	0x15
 	.byte	0x45
 	.4byte	0x3b
 	.byte	0x58
 	.uleb128 0xe
-	.4byte	.LASF269
+	.4byte	.LASF275
 	.byte	0x15
 	.byte	0x46
-	.4byte	0xb9
+	.4byte	0x3b
 	.byte	0x60
 	.uleb128 0xe
-	.4byte	.LASF270
+	.4byte	.LASF276
 	.byte	0x15
 	.byte	0x47
-	.4byte	0x3b
+	.4byte	0xc4
 	.byte	0x68
 	.uleb128 0xe
-	.4byte	.LASF271
+	.4byte	.LASF277
 	.byte	0x15
 	.byte	0x48
 	.4byte	0x3b
 	.byte	0x70
 	.uleb128 0xe
-	.4byte	.LASF272
+	.4byte	.LASF278
 	.byte	0x15
 	.byte	0x49
 	.4byte	0x3b
 	.byte	0x78
 	.uleb128 0xe
-	.4byte	.LASF273
+	.4byte	.LASF279
 	.byte	0x15
 	.byte	0x4a
 	.4byte	0x3b
 	.byte	0x80
 	.uleb128 0xe
-	.4byte	.LASF274
+	.4byte	.LASF280
 	.byte	0x15
 	.byte	0x4b
-	.4byte	0xe46
+	.4byte	0x3b
 	.byte	0x88
 	.uleb128 0xe
-	.4byte	.LASF275
+	.4byte	.LASF281
 	.byte	0x15
-	.byte	0x4e
-	.4byte	0x249
+	.byte	0x4c
+	.4byte	0xea8
 	.byte	0x90
 	.uleb128 0xe
-	.4byte	.LASF276
+	.4byte	.LASF282
 	.byte	0x15
 	.byte	0x4f
-	.4byte	0x249
+	.4byte	0x254
 	.byte	0x98
 	.uleb128 0xe
-	.4byte	.LASF277
+	.4byte	.LASF283
 	.byte	0x15
 	.byte	0x50
-	.4byte	0x27c
+	.4byte	0x254
 	.byte	0xa0
 	.uleb128 0xe
-	.4byte	.LASF278
+	.4byte	.LASF284
 	.byte	0x15
-	.byte	0x56
-	.4byte	0x24f
-	.byte	0xb0
+	.byte	0x51
+	.4byte	0x287
+	.byte	0xa8
 	.uleb128 0xe
-	.4byte	.LASF279
+	.4byte	.LASF285
 	.byte	0x15
-	.byte	0x57
-	.4byte	0x121
+	.byte	0x58
+	.4byte	0x25a
 	.byte	0xb8
 	.uleb128 0xe
-	.4byte	.LASF280
+	.4byte	.LASF286
 	.byte	0x15
-	.byte	0x58
-	.4byte	0x3b
+	.byte	0x5a
+	.4byte	0x25a
 	.byte	0xc0
 	.uleb128 0xe
-	.4byte	.LASF281
+	.4byte	.LASF287
 	.byte	0x15
-	.byte	0x5a
-	.4byte	0xebe
+	.byte	0x5d
+	.4byte	0x25a
 	.byte	0xc8
-	.uleb128 0xf
-	.string	"jt"
+	.uleb128 0xe
+	.4byte	.LASF288
 	.byte	0x15
-	.byte	0x5c
-	.4byte	0xec9
+	.byte	0x5f
+	.4byte	0x12c
 	.byte	0xd0
 	.uleb128 0xe
-	.4byte	.LASF282
+	.4byte	.LASF289
 	.byte	0x15
-	.byte	0x5d
-	.4byte	0xecf
+	.byte	0x60
+	.4byte	0x3b
 	.byte	0xd8
 	.uleb128 0xe
-	.4byte	.LASF283
+	.4byte	.LASF290
 	.byte	0x15
-	.byte	0x67
-	.4byte	0x7f
-	.byte	0xf8
+	.byte	0x62
+	.4byte	0xf20
+	.byte	0xe0
+	.uleb128 0xf
+	.string	"jt"
+	.byte	0x15
+	.byte	0x64
+	.4byte	0xf2b
+	.byte	0xe8
 	.uleb128 0xe
-	.4byte	.LASF284
+	.4byte	.LASF291
 	.byte	0x15
-	.byte	0x68
+	.byte	0x65
+	.4byte	0xf31
+	.byte	0xf0
+	.uleb128 0x15
+	.4byte	.LASF292
+	.byte	0x15
+	.byte	0x6f
 	.4byte	0x7f
-	.byte	0xfc
+	.2byte	0x110
 	.uleb128 0x15
-	.4byte	.LASF285
+	.4byte	.LASF293
+	.byte	0x15
+	.byte	0x70
+	.4byte	0x7f
+	.2byte	0x114
+	.uleb128 0x15
+	.4byte	.LASF294
 	.byte	0x15
-	.byte	0x6a
+	.byte	0x72
 	.4byte	0x3b
-	.2byte	0x100
+	.2byte	0x118
 	.uleb128 0x15
-	.4byte	.LASF286
+	.4byte	.LASF295
 	.byte	0x15
-	.byte	0x6b
+	.byte	0x73
 	.4byte	0x3b
-	.2byte	0x108
+	.2byte	0x120
 	.uleb128 0x15
-	.4byte	.LASF287
+	.4byte	.LASF296
 	.byte	0x15
-	.byte	0x6c
+	.byte	0x74
 	.4byte	0x3b
-	.2byte	0x110
+	.2byte	0x128
 	.uleb128 0x15
-	.4byte	.LASF288
+	.4byte	.LASF297
 	.byte	0x15
-	.byte	0x75
-	.4byte	0x249
-	.2byte	0x118
+	.byte	0x7d
+	.4byte	0x254
+	.2byte	0x130
 	.uleb128 0x15
-	.4byte	.LASF126
+	.4byte	.LASF127
 	.byte	0x15
-	.byte	0x76
-	.4byte	0xbb4
-	.2byte	0x120
+	.byte	0x7e
+	.4byte	0xbca
+	.2byte	0x138
 	.uleb128 0x15
-	.4byte	.LASF289
+	.4byte	.LASF298
 	.byte	0x15
-	.byte	0x83
-	.4byte	0xae
-	.2byte	0x160
+	.byte	0x84
+	.4byte	0x100
+	.2byte	0x178
 	.uleb128 0x15
-	.4byte	.LASF290
+	.4byte	.LASF299
 	.byte	0x15
-	.byte	0x88
-	.4byte	0xc2d
-	.2byte	0x168
+	.byte	0x85
+	.4byte	0x100
+	.2byte	0x180
 	.uleb128 0x15
-	.4byte	.LASF291
+	.4byte	.LASF300
 	.byte	0x15
-	.byte	0x89
-	.4byte	0xf5
-	.2byte	0x180
+	.byte	0x8b
+	.4byte	0xb9
+	.2byte	0x188
 	.uleb128 0x15
-	.4byte	.LASF292
+	.4byte	.LASF301
 	.byte	0x15
-	.byte	0x8a
+	.byte	0x90
+	.4byte	0xc43
+	.2byte	0x190
+	.uleb128 0x15
+	.4byte	.LASF302
+	.byte	0x15
+	.byte	0x91
+	.4byte	0x100
+	.2byte	0x1a8
+	.uleb128 0x15
+	.4byte	.LASF303
+	.byte	0x15
+	.byte	0x92
 	.4byte	0x54
-	.2byte	0x188
+	.2byte	0x1b0
 	.byte	0
 	.uleb128 0x8
 	.byte	0x8
-	.4byte	0xc69
+	.4byte	0xc8b
 	.uleb128 0xd
-	.4byte	.LASF293
+	.4byte	.LASF304
 	.byte	0x40
 	.byte	0x16
 	.byte	0x2c
-	.4byte	0xeb9
+	.4byte	0xf1b
 	.uleb128 0xe
 	.4byte	.LASF28
 	.byte	0x16
 	.byte	0x2d
-	.4byte	0xcb
+	.4byte	0xd6
 	.byte	0
 	.uleb128 0xe
-	.4byte	.LASF125
+	.4byte	.LASF126
 	.byte	0x16
 	.byte	0x2e
-	.4byte	0xcb
+	.4byte	0xd6
 	.byte	0x8
 	.uleb128 0xe
-	.4byte	.LASF294
+	.4byte	.LASF305
 	.byte	0x16
 	.byte	0x2f
-	.4byte	0x11f3
+	.4byte	0x1364
 	.byte	0x10
 	.uleb128 0xe
-	.4byte	.LASF295
+	.4byte	.LASF306
 	.byte	0x16
 	.byte	0x30
-	.4byte	0xcb
+	.4byte	0xd6
 	.byte	0x18
 	.uleb128 0xe
-	.4byte	.LASF296
+	.4byte	.LASF307
 	.byte	0x16
 	.byte	0x32
-	.4byte	0x123b
+	.4byte	0x13ac
 	.byte	0x20
 	.uleb128 0xe
 	.4byte	.LASF34
 	.byte	0x16
 	.byte	0x33
-	.4byte	0xebe
+	.4byte	0xf20
 	.byte	0x28
 	.uleb128 0xe
-	.4byte	.LASF297
+	.4byte	.LASF308
 	.byte	0x16
 	.byte	0x34
-	.4byte	0xebe
+	.4byte	0xf20
 	.byte	0x30
 	.uleb128 0xe
-	.4byte	.LASF298
+	.4byte	.LASF309
 	.byte	0x16
 	.byte	0x35
-	.4byte	0xebe
+	.4byte	0xf20
 	.byte	0x38
 	.byte	0
 	.uleb128 0x7
-	.4byte	0xe4c
+	.4byte	0xeae
 	.uleb128 0x8
 	.byte	0x8
-	.4byte	0xe4c
-	.uleb128 0x18
-	.4byte	.LASF300
+	.4byte	0xeae
+	.uleb128 0x26
+	.4byte	.LASF459
 	.uleb128 0x8
 	.byte	0x8
-	.4byte	0xec4
+	.4byte	0xf26
 	.uleb128 0xa
-	.4byte	0xd1
-	.4byte	0xedf
+	.4byte	0xdc
+	.4byte	0xf41
 	.uleb128 0x11
-	.4byte	0xc4
+	.4byte	0xcf
 	.byte	0x1f
 	.byte	0
 	.uleb128 0x2
-	.4byte	.LASF301
+	.4byte	.LASF310
 	.byte	0x15
-	.byte	0x90
-	.4byte	0xc69
-	.uleb128 0x28
-	.4byte	0xedf
+	.byte	0x9b
+	.4byte	0xc8b
+	.uleb128 0x27
+	.4byte	0xf41
 	.uleb128 0x4
-	.4byte	.LASF302
+	.4byte	.LASF311
 	.byte	0x2
-	.byte	0xab
-	.4byte	0xf5
+	.byte	0xad
+	.4byte	0x100
 	.uleb128 0xa
 	.4byte	0x94
-	.4byte	0xf05
+	.4byte	0xf67
 	.uleb128 0xb
 	.byte	0
 	.uleb128 0x4
-	.4byte	.LASF303
+	.4byte	.LASF312
 	.byte	0x2
-	.byte	0xad
-	.4byte	0xefa
+	.byte	0xaf
+	.4byte	0xf5c
 	.uleb128 0x4
-	.4byte	.LASF304
+	.4byte	.LASF313
 	.byte	0x2
-	.byte	0xae
-	.4byte	0xefa
+	.byte	0xb0
+	.4byte	0xf5c
 	.uleb128 0x4
-	.4byte	.LASF305
+	.4byte	.LASF314
 	.byte	0x2
-	.byte	0xfc
-	.4byte	0xf5
+	.byte	0xfe
+	.4byte	0x100
 	.uleb128 0x4
-	.4byte	.LASF306
+	.4byte	.LASF315
 	.byte	0x2
-	.byte	0xfd
-	.4byte	0xf5
-	.uleb128 0x4
-	.4byte	.LASF307
+	.byte	0xff
+	.4byte	0x100
+	.uleb128 0xc
+	.4byte	.LASF316
 	.byte	0x2
-	.byte	0xfe
-	.4byte	0xf5
+	.2byte	0x100
+	.4byte	0x100
 	.uleb128 0xd
-	.4byte	.LASF308
+	.4byte	.LASF317
 	.byte	0x4
 	.byte	0x17
 	.byte	0x2e
-	.4byte	0xf55
+	.4byte	0xfb8
 	.uleb128 0xe
-	.4byte	.LASF309
+	.4byte	.LASF318
 	.byte	0x17
 	.byte	0x2f
-	.4byte	0x116
+	.4byte	0x121
 	.byte	0
 	.byte	0
 	.uleb128 0x8
 	.byte	0x8
 	.4byte	0x29
+	.uleb128 0xd
+	.4byte	.LASF319
+	.byte	0x68
+	.byte	0x17
+	.byte	0xa6
+	.4byte	0x105b
+	.uleb128 0xe
+	.4byte	.LASF28
+	.byte	0x17
+	.byte	0xa8
+	.4byte	0x105b
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF320
+	.byte	0x17
+	.byte	0xa9
+	.4byte	0x277
+	.byte	0x10
+	.uleb128 0xe
+	.4byte	.LASF321
+	.byte	0x17
+	.byte	0xaa
+	.4byte	0xb9
+	.byte	0x18
+	.uleb128 0xe
+	.4byte	.LASF155
+	.byte	0x17
+	.byte	0xab
+	.4byte	0x54
+	.byte	0x20
+	.uleb128 0xe
+	.4byte	.LASF322
+	.byte	0x17
+	.byte	0xad
+	.4byte	0x1085
+	.byte	0x28
+	.uleb128 0xe
+	.4byte	.LASF323
+	.byte	0x17
+	.byte	0xae
+	.4byte	0x10a4
+	.byte	0x30
+	.uleb128 0xe
+	.4byte	.LASF324
+	.byte	0x17
+	.byte	0xaf
+	.4byte	0x10b9
+	.byte	0x38
+	.uleb128 0xe
+	.4byte	.LASF325
+	.byte	0x17
+	.byte	0xb0
+	.4byte	0x10ca
+	.byte	0x40
+	.uleb128 0xe
+	.4byte	.LASF326
+	.byte	0x17
+	.byte	0xb4
+	.4byte	0x10b9
+	.byte	0x48
+	.uleb128 0xe
+	.4byte	.LASF47
+	.byte	0x17
+	.byte	0xb5
+	.4byte	0x107f
+	.byte	0x50
+	.uleb128 0xe
+	.4byte	.LASF327
+	.byte	0x17
+	.byte	0xb6
+	.4byte	0x54
+	.byte	0x58
+	.uleb128 0xe
+	.4byte	.LASF35
+	.byte	0x17
+	.byte	0xb7
+	.4byte	0x12c
+	.byte	0x60
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xdc
+	.4byte	0x106b
+	.uleb128 0x11
+	.4byte	0xcf
+	.byte	0xf
+	.byte	0
+	.uleb128 0x12
+	.4byte	0x54
+	.4byte	0x107f
+	.uleb128 0x13
+	.4byte	0x107f
+	.uleb128 0x13
+	.4byte	0x95a
+	.byte	0
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0xfbe
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x106b
+	.uleb128 0x12
+	.4byte	0x54
+	.4byte	0x10a4
+	.uleb128 0x13
+	.4byte	0x107f
+	.uleb128 0x13
+	.4byte	0x12c
+	.uleb128 0x13
+	.4byte	0x54
+	.byte	0
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x108b
 	.uleb128 0x12
 	.4byte	0x54
-	.4byte	0xf6a
+	.4byte	0x10b9
+	.uleb128 0x13
+	.4byte	0x107f
+	.byte	0
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x10aa
+	.uleb128 0x28
+	.4byte	0x10ca
 	.uleb128 0x13
-	.4byte	0x249
+	.4byte	0x107f
 	.byte	0
 	.uleb128 0x8
 	.byte	0x8
-	.4byte	0xf5b
+	.4byte	0x10bf
+	.uleb128 0x4
+	.4byte	.LASF328
+	.byte	0x17
+	.byte	0xbd
+	.4byte	0x107f
 	.uleb128 0xa
 	.4byte	0x94
-	.4byte	0xf80
+	.4byte	0x10eb
 	.uleb128 0x11
-	.4byte	0xc4
+	.4byte	0xcf
 	.byte	0x5
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF310
+	.4byte	.LASF329
 	.byte	0x17
 	.2byte	0x1fd
-	.4byte	0xf3c
+	.4byte	0xf9f
 	.uleb128 0xc
-	.4byte	.LASF311
+	.4byte	.LASF330
 	.byte	0x17
 	.2byte	0x1fe
-	.4byte	0xf3c
+	.4byte	0xf9f
 	.uleb128 0xc
-	.4byte	.LASF312
+	.4byte	.LASF331
 	.byte	0x17
 	.2byte	0x200
-	.4byte	0xf3c
+	.4byte	0xf9f
 	.uleb128 0xc
-	.4byte	.LASF313
+	.4byte	.LASF332
 	.byte	0x17
 	.2byte	0x205
-	.4byte	0xecf
+	.4byte	0xf31
 	.uleb128 0xc
-	.4byte	.LASF314
+	.4byte	.LASF333
 	.byte	0x17
 	.2byte	0x206
-	.4byte	0xecf
+	.4byte	0xf31
 	.uleb128 0xa
-	.4byte	0xd1
-	.4byte	0xfcc
+	.4byte	0xdc
+	.4byte	0x1137
 	.uleb128 0x11
-	.4byte	0xc4
+	.4byte	0xcf
 	.byte	0x3f
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF315
+	.4byte	.LASF334
 	.byte	0x17
 	.2byte	0x207
-	.4byte	0xfbc
+	.4byte	0x1127
 	.uleb128 0xc
-	.4byte	.LASF316
+	.4byte	.LASF335
 	.byte	0x17
 	.2byte	0x209
-	.4byte	0xf70
+	.4byte	0x10db
 	.uleb128 0xc
-	.4byte	.LASF317
+	.4byte	.LASF336
 	.byte	0x17
 	.2byte	0x20a
-	.4byte	0xf70
+	.4byte	0x10db
 	.uleb128 0xc
-	.4byte	.LASF318
+	.4byte	.LASF337
 	.byte	0x17
 	.2byte	0x20b
-	.4byte	0xf3c
+	.4byte	0xf9f
 	.uleb128 0xc
-	.4byte	.LASF319
+	.4byte	.LASF338
 	.byte	0x17
 	.2byte	0x20c
-	.4byte	0xf3c
+	.4byte	0xf9f
 	.uleb128 0xc
-	.4byte	.LASF320
+	.4byte	.LASF339
 	.byte	0x17
 	.2byte	0x20d
-	.4byte	0xf55
+	.4byte	0xfb8
 	.uleb128 0xa
-	.4byte	0xf55
-	.4byte	0x1024
+	.4byte	0xfb8
+	.4byte	0x118f
 	.uleb128 0x11
-	.4byte	0xc4
+	.4byte	0xcf
 	.byte	0x3
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF321
+	.4byte	.LASF340
 	.byte	0x17
 	.2byte	0x20e
-	.4byte	0x1014
+	.4byte	0x117f
 	.uleb128 0xc
-	.4byte	.LASF322
+	.4byte	.LASF341
 	.byte	0x17
 	.2byte	0x20f
-	.4byte	0xf55
+	.4byte	0xfb8
 	.uleb128 0xc
-	.4byte	.LASF323
+	.4byte	.LASF342
 	.byte	0x17
 	.2byte	0x210
 	.4byte	0x54
 	.uleb128 0xa
 	.4byte	0x9e
-	.4byte	0x1058
+	.4byte	0x11c3
 	.uleb128 0x11
-	.4byte	0xc4
+	.4byte	0xcf
 	.byte	0x5
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x1048
+	.4byte	0x11b3
 	.uleb128 0xc
-	.4byte	.LASF324
+	.4byte	.LASF343
 	.byte	0x17
 	.2byte	0x211
-	.4byte	0x1058
+	.4byte	0x11c3
 	.uleb128 0xc
-	.4byte	.LASF325
+	.4byte	.LASF344
 	.byte	0x17
 	.2byte	0x212
-	.4byte	0x1058
+	.4byte	0x11c3
 	.uleb128 0xc
-	.4byte	.LASF326
+	.4byte	.LASF345
 	.byte	0x17
 	.2byte	0x216
-	.4byte	0xea
+	.4byte	0xf5
 	.uleb128 0xc
-	.4byte	.LASF327
+	.4byte	.LASF346
 	.byte	0x17
 	.2byte	0x217
-	.4byte	0xea
+	.4byte	0xf5
 	.uleb128 0xc
-	.4byte	.LASF328
+	.4byte	.LASF347
 	.byte	0x17
 	.2byte	0x219
 	.4byte	0x54
 	.uleb128 0xa
-	.4byte	0xd1
-	.4byte	0x10aa
-	.uleb128 0x17
-	.4byte	0xc4
+	.4byte	0xdc
+	.4byte	0x1215
+	.uleb128 0x16
+	.4byte	0xcf
 	.2byte	0x3ff
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF329
+	.4byte	.LASF348
 	.byte	0x17
 	.2byte	0x220
-	.4byte	0x1099
+	.4byte	0x1204
 	.uleb128 0xc
-	.4byte	.LASF330
+	.4byte	.LASF349
 	.byte	0x17
 	.2byte	0x222
 	.4byte	0xa3
 	.uleb128 0xc
-	.4byte	.LASF331
+	.4byte	.LASF350
 	.byte	0x17
 	.2byte	0x224
 	.4byte	0xa3
 	.uleb128 0xc
-	.4byte	.LASF332
+	.4byte	.LASF351
 	.byte	0x17
 	.2byte	0x230
-	.4byte	0xf3c
+	.4byte	0xf9f
 	.uleb128 0x29
-	.4byte	.LASF334
+	.4byte	.LASF353
 	.byte	0x4
 	.4byte	0x7f
 	.byte	0x17
 	.2byte	0x286
-	.4byte	0x1104
-	.uleb128 0x25
-	.4byte	.LASF335
+	.4byte	0x126f
+	.uleb128 0x23
+	.4byte	.LASF354
 	.byte	0
-	.uleb128 0x25
-	.4byte	.LASF336
+	.uleb128 0x23
+	.4byte	.LASF355
 	.byte	0x1
-	.uleb128 0x25
-	.4byte	.LASF337
+	.uleb128 0x23
+	.4byte	.LASF356
 	.byte	0x2
-	.uleb128 0x25
-	.4byte	.LASF338
+	.uleb128 0x23
+	.4byte	.LASF357
 	.byte	0x3
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF339
+	.4byte	.LASF358
 	.byte	0x17
 	.2byte	0x28c
-	.4byte	0x10da
+	.4byte	0x1245
 	.uleb128 0x8
 	.byte	0x8
 	.4byte	0x94
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0xa3
 	.uleb128 0xd
 	.4byte	.LASF27
 	.byte	0x78
 	.byte	0x8
 	.byte	0xee
-	.4byte	0x11ee
+	.4byte	0x135f
 	.uleb128 0xe
 	.4byte	.LASF28
 	.byte	0x8
 	.byte	0xef
-	.4byte	0xe4
+	.4byte	0xef
 	.byte	0
 	.uleb128 0xf
 	.string	"id"
 	.byte	0x8
 	.byte	0xf0
-	.4byte	0x97a
+	.4byte	0x978
 	.byte	0x8
 	.uleb128 0xe
-	.4byte	.LASF340
+	.4byte	.LASF359
 	.byte	0x8
 	.byte	0xf1
-	.4byte	0x1345
+	.4byte	0x14b6
 	.byte	0x10
 	.uleb128 0xe
-	.4byte	.LASF341
+	.4byte	.LASF360
 	.byte	0x8
 	.byte	0xf2
-	.4byte	0xf6a
+	.4byte	0x14cb
 	.byte	0x18
 	.uleb128 0xe
-	.4byte	.LASF342
+	.4byte	.LASF361
 	.byte	0x8
 	.byte	0xf3
-	.4byte	0xf6a
+	.4byte	0x14cb
 	.byte	0x20
 	.uleb128 0xe
-	.4byte	.LASF343
+	.4byte	.LASF362
 	.byte	0x8
 	.byte	0xf4
-	.4byte	0xf6a
+	.4byte	0x14cb
 	.byte	0x28
 	.uleb128 0xe
-	.4byte	.LASF344
+	.4byte	.LASF363
 	.byte	0x8
 	.byte	0xf5
-	.4byte	0xf6a
+	.4byte	0x14cb
 	.byte	0x30
 	.uleb128 0xe
-	.4byte	.LASF345
+	.4byte	.LASF364
 	.byte	0x8
 	.byte	0xf6
-	.4byte	0xf6a
+	.4byte	0x14cb
 	.byte	0x38
 	.uleb128 0xe
-	.4byte	.LASF346
+	.4byte	.LASF365
 	.byte	0x8
 	.byte	0xf7
-	.4byte	0xf6a
+	.4byte	0x14cb
 	.byte	0x40
 	.uleb128 0xe
-	.4byte	.LASF347
+	.4byte	.LASF366
 	.byte	0x8
 	.byte	0xf8
-	.4byte	0xf6a
+	.4byte	0x14cb
 	.byte	0x48
 	.uleb128 0xe
-	.4byte	.LASF348
+	.4byte	.LASF367
 	.byte	0x8
 	.byte	0xf9
-	.4byte	0xf6a
+	.4byte	0x14cb
 	.byte	0x50
 	.uleb128 0xe
-	.4byte	.LASF349
+	.4byte	.LASF368
 	.byte	0x8
 	.byte	0xfa
 	.4byte	0x54
 	.byte	0x58
 	.uleb128 0xe
-	.4byte	.LASF350
+	.4byte	.LASF369
 	.byte	0x8
 	.byte	0xfb
 	.4byte	0x54
 	.byte	0x5c
 	.uleb128 0xe
-	.4byte	.LASF351
+	.4byte	.LASF370
 	.byte	0x8
 	.byte	0xfc
 	.4byte	0x54
 	.byte	0x60
 	.uleb128 0xe
-	.4byte	.LASF352
+	.4byte	.LASF371
 	.byte	0x8
 	.byte	0xfd
 	.4byte	0x54
@@ -4098,110 +4486,110 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"ops"
 	.byte	0x8
 	.byte	0xfe
-	.4byte	0x24f
+	.4byte	0x25a
 	.byte	0x68
 	.uleb128 0xe
 	.4byte	.LASF42
 	.byte	0x8
 	.byte	0xff
-	.4byte	0x10b
+	.4byte	0x116
 	.byte	0x70
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x1116
+	.4byte	0x1287
 	.uleb128 0x2
-	.4byte	.LASF294
+	.4byte	.LASF305
 	.byte	0x16
 	.byte	0xf
 	.4byte	0xa3
 	.uleb128 0xd
-	.4byte	.LASF353
+	.4byte	.LASF372
 	.byte	0x20
 	.byte	0x16
 	.byte	0x19
-	.4byte	0x123b
+	.4byte	0x13ac
 	.uleb128 0xe
 	.4byte	.LASF28
 	.byte	0x16
 	.byte	0x1a
-	.4byte	0xe4
+	.4byte	0xef
 	.byte	0
 	.uleb128 0xe
-	.4byte	.LASF354
+	.4byte	.LASF373
 	.byte	0x16
 	.byte	0x1b
 	.4byte	0x54
 	.byte	0x8
 	.uleb128 0xe
-	.4byte	.LASF355
+	.4byte	.LASF374
 	.byte	0x16
 	.byte	0x1c
-	.4byte	0x121
+	.4byte	0x12c
 	.byte	0x10
 	.uleb128 0xe
 	.4byte	.LASF47
 	.byte	0x16
 	.byte	0x1d
-	.4byte	0x123b
+	.4byte	0x13ac
 	.byte	0x18
 	.byte	0
 	.uleb128 0x8
 	.byte	0x8
-	.4byte	0x11fe
+	.4byte	0x136f
 	.uleb128 0x2a
 	.string	"gd"
 	.byte	0x16
 	.byte	0x57
-	.4byte	0x124b
+	.4byte	0x13bc
 	.uleb128 0x8
 	.byte	0x8
-	.4byte	0xeea
+	.4byte	0xf4c
 	.uleb128 0x2b
-	.4byte	.LASF386
+	.4byte	.LASF414
 	.byte	0x8
 	.byte	0x19
 	.byte	0x33
-	.4byte	0x1273
+	.4byte	0x13e4
 	.uleb128 0x2c
 	.string	"np"
 	.byte	0x19
 	.byte	0x34
-	.4byte	0x1273
+	.4byte	0x13e4
 	.uleb128 0x2d
-	.4byte	.LASF356
+	.4byte	.LASF375
 	.byte	0x19
 	.byte	0x35
-	.4byte	0xdd
+	.4byte	0xe8
 	.byte	0
 	.uleb128 0x8
 	.byte	0x8
-	.4byte	0xeb9
+	.4byte	0xf1b
 	.uleb128 0x2
-	.4byte	.LASF357
+	.4byte	.LASF376
 	.byte	0x19
 	.byte	0x36
-	.4byte	0x1251
+	.4byte	0x13c2
 	.uleb128 0xc
-	.4byte	.LASF358
+	.4byte	.LASF377
 	.byte	0x1a
 	.2byte	0x3ba
-	.4byte	0xf5
+	.4byte	0x100
 	.uleb128 0xc
-	.4byte	.LASF359
+	.4byte	.LASF378
 	.byte	0x1a
 	.2byte	0x3bb
-	.4byte	0xf5
+	.4byte	0x100
 	.uleb128 0xc
-	.4byte	.LASF360
+	.4byte	.LASF379
 	.byte	0x1a
 	.2byte	0x3bc
-	.4byte	0xf5
+	.4byte	0x100
 	.uleb128 0xd
-	.4byte	.LASF361
+	.4byte	.LASF380
 	.byte	0x4
 	.byte	0x1b
 	.byte	0xd
-	.4byte	0x12c1
+	.4byte	0x1432
 	.uleb128 0xf
 	.string	"pid"
 	.byte	0x1b
@@ -4210,172 +4598,181 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0
 	.byte	0
 	.uleb128 0x4
-	.4byte	.LASF362
+	.4byte	.LASF381
 	.byte	0x1b
 	.byte	0x11
-	.4byte	0x12cc
+	.4byte	0x143d
 	.uleb128 0x8
 	.byte	0x8
-	.4byte	0x12a8
+	.4byte	0x1419
 	.uleb128 0x8
 	.byte	0x8
-	.4byte	0x11ee
+	.4byte	0x135f
 	.uleb128 0xd
 	.4byte	.LASF36
 	.byte	0x30
 	.byte	0x1c
 	.byte	0x23
-	.4byte	0x1315
+	.4byte	0x1486
 	.uleb128 0xe
 	.4byte	.LASF35
 	.byte	0x1c
 	.byte	0x24
-	.4byte	0x121
+	.4byte	0x12c
 	.byte	0
 	.uleb128 0xe
-	.4byte	.LASF363
+	.4byte	.LASF382
 	.byte	0x1c
 	.byte	0x25
-	.4byte	0x142f
+	.4byte	0x15b5
 	.byte	0x8
 	.uleb128 0xe
-	.4byte	.LASF364
+	.4byte	.LASF383
 	.byte	0x1c
 	.byte	0x26
-	.4byte	0x27c
+	.4byte	0x287
 	.byte	0x10
 	.uleb128 0xe
 	.4byte	.LASF41
 	.byte	0x1c
 	.byte	0x27
-	.4byte	0x27c
+	.4byte	0x287
 	.byte	0x20
 	.byte	0
 	.uleb128 0x8
 	.byte	0x8
-	.4byte	0x12d8
+	.4byte	0x1449
 	.uleb128 0xd
-	.4byte	.LASF365
+	.4byte	.LASF384
 	.byte	0x10
 	.byte	0x8
 	.byte	0xb5
-	.4byte	0x1340
+	.4byte	0x14b1
 	.uleb128 0xe
-	.4byte	.LASF366
+	.4byte	.LASF385
 	.byte	0x8
 	.byte	0xb6
-	.4byte	0xcb
+	.4byte	0xd6
 	.byte	0
 	.uleb128 0xe
-	.4byte	.LASF367
+	.4byte	.LASF386
 	.byte	0x8
 	.byte	0xb7
-	.4byte	0xf5
+	.4byte	0x100
 	.byte	0x8
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x131b
+	.4byte	0x148c
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x14b1
+	.uleb128 0x12
+	.4byte	0x54
+	.4byte	0x14cb
+	.uleb128 0x13
+	.4byte	0x254
+	.byte	0
 	.uleb128 0x8
 	.byte	0x8
-	.4byte	0x1340
+	.4byte	0x14bc
 	.uleb128 0xd
-	.4byte	.LASF368
+	.4byte	.LASF387
 	.byte	0x80
 	.byte	0x1c
 	.byte	0x54
-	.4byte	0x142f
+	.4byte	0x15b5
 	.uleb128 0xe
 	.4byte	.LASF28
 	.byte	0x1c
 	.byte	0x55
-	.4byte	0xcb
+	.4byte	0xd6
 	.byte	0
 	.uleb128 0xf
 	.string	"id"
 	.byte	0x1c
 	.byte	0x56
-	.4byte	0x97a
+	.4byte	0x978
 	.byte	0x8
 	.uleb128 0xe
-	.4byte	.LASF369
+	.4byte	.LASF388
 	.byte	0x1c
 	.byte	0x57
-	.4byte	0xf6a
+	.4byte	0x14cb
 	.byte	0x10
 	.uleb128 0xe
-	.4byte	.LASF370
+	.4byte	.LASF389
 	.byte	0x1c
 	.byte	0x58
-	.4byte	0xf6a
+	.4byte	0x14cb
 	.byte	0x18
 	.uleb128 0xe
-	.4byte	.LASF371
+	.4byte	.LASF390
 	.byte	0x1c
 	.byte	0x59
-	.4byte	0xf6a
+	.4byte	0x14cb
 	.byte	0x20
 	.uleb128 0xe
-	.4byte	.LASF372
+	.4byte	.LASF391
 	.byte	0x1c
 	.byte	0x5a
-	.4byte	0xf6a
+	.4byte	0x14cb
 	.byte	0x28
 	.uleb128 0xe
-	.4byte	.LASF373
+	.4byte	.LASF392
 	.byte	0x1c
 	.byte	0x5b
-	.4byte	0xf6a
+	.4byte	0x14cb
 	.byte	0x30
 	.uleb128 0xe
-	.4byte	.LASF346
+	.4byte	.LASF365
 	.byte	0x1c
 	.byte	0x5c
-	.4byte	0xf6a
+	.4byte	0x14cb
 	.byte	0x38
 	.uleb128 0xe
-	.4byte	.LASF347
+	.4byte	.LASF366
 	.byte	0x1c
 	.byte	0x5d
-	.4byte	0xf6a
+	.4byte	0x14cb
 	.byte	0x40
 	.uleb128 0xe
-	.4byte	.LASF374
+	.4byte	.LASF322
 	.byte	0x1c
 	.byte	0x5e
-	.4byte	0x1444
+	.4byte	0x15ca
 	.byte	0x48
 	.uleb128 0xe
-	.4byte	.LASF375
+	.4byte	.LASF393
 	.byte	0x1c
 	.byte	0x5f
-	.4byte	0x1444
+	.4byte	0x15ca
 	.byte	0x50
 	.uleb128 0xe
-	.4byte	.LASF349
+	.4byte	.LASF368
 	.byte	0x1c
 	.byte	0x60
 	.4byte	0x54
 	.byte	0x58
 	.uleb128 0xe
-	.4byte	.LASF376
+	.4byte	.LASF394
 	.byte	0x1c
 	.byte	0x61
 	.4byte	0x54
 	.byte	0x5c
 	.uleb128 0xe
-	.4byte	.LASF377
+	.4byte	.LASF395
 	.byte	0x1c
 	.byte	0x62
 	.4byte	0x54
 	.byte	0x60
 	.uleb128 0xe
-	.4byte	.LASF351
+	.4byte	.LASF370
 	.byte	0x1c
 	.byte	0x63
 	.4byte	0x54
 	.byte	0x64
 	.uleb128 0xe
-	.4byte	.LASF352
+	.4byte	.LASF371
 	.byte	0x1c
 	.byte	0x64
 	.4byte	0x54
@@ -4384,156 +4781,220 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.string	"ops"
 	.byte	0x1c
 	.byte	0x65
-	.4byte	0x24f
+	.4byte	0x25a
 	.byte	0x70
 	.uleb128 0xe
 	.4byte	.LASF42
 	.byte	0x1c
 	.byte	0x66
-	.4byte	0x10b
+	.4byte	0x116
 	.byte	0x78
 	.byte	0
 	.uleb128 0x8
 	.byte	0x8
-	.4byte	0x134b
+	.4byte	0x14d1
 	.uleb128 0x12
 	.4byte	0x54
-	.4byte	0x1444
+	.4byte	0x15ca
 	.uleb128 0x13
-	.4byte	0x1315
+	.4byte	0x1486
 	.byte	0
 	.uleb128 0x8
 	.byte	0x8
-	.4byte	0x1435
+	.4byte	0x15bb
+	.uleb128 0x4
+	.4byte	.LASF396
+	.byte	0x1d
+	.byte	0x49
+	.4byte	0x7f
+	.uleb128 0x22
+	.4byte	.LASF397
+	.byte	0x4
+	.4byte	0x7f
+	.byte	0x1e
+	.byte	0x15
+	.4byte	0x160a
+	.uleb128 0x23
+	.4byte	.LASF398
+	.byte	0x1
+	.uleb128 0x23
+	.4byte	.LASF399
+	.byte	0x2
+	.uleb128 0x23
+	.4byte	.LASF400
+	.byte	0x4
+	.uleb128 0x23
+	.4byte	.LASF401
+	.byte	0x8
+	.uleb128 0x23
+	.4byte	.LASF402
+	.byte	0x10
+	.byte	0
 	.uleb128 0xd
-	.4byte	.LASF378
+	.4byte	.LASF403
 	.byte	0x20
-	.byte	0x1d
-	.byte	0x43
-	.4byte	0x1487
+	.byte	0x1e
+	.byte	0x61
+	.4byte	0x1647
 	.uleb128 0xe
-	.4byte	.LASF379
-	.byte	0x1d
-	.byte	0x4d
-	.4byte	0x14aa
+	.4byte	.LASF404
+	.byte	0x1e
+	.byte	0x6b
+	.4byte	0x166a
 	.byte	0
 	.uleb128 0xe
-	.4byte	.LASF380
-	.byte	0x1d
-	.byte	0x57
-	.4byte	0x14ce
+	.4byte	.LASF405
+	.byte	0x1e
+	.byte	0x75
+	.4byte	0x168e
 	.byte	0x8
 	.uleb128 0xe
-	.4byte	.LASF381
-	.byte	0x1d
-	.byte	0x61
-	.4byte	0x14ed
+	.4byte	.LASF406
+	.byte	0x1e
+	.byte	0x7f
+	.4byte	0x16ad
 	.byte	0x10
 	.uleb128 0xe
-	.4byte	.LASF382
-	.byte	0x1d
-	.byte	0x6e
-	.4byte	0x151b
+	.4byte	.LASF407
+	.byte	0x1e
+	.byte	0x8c
+	.4byte	0x16db
 	.byte	0x18
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x144a
+	.4byte	0x160a
 	.uleb128 0x12
 	.4byte	0x54
-	.4byte	0x14aa
+	.4byte	0x166a
 	.uleb128 0x13
-	.4byte	0x249
+	.4byte	0x254
 	.uleb128 0x13
 	.4byte	0x54
 	.uleb128 0x13
-	.4byte	0x121
+	.4byte	0x12c
 	.uleb128 0x13
 	.4byte	0x54
 	.byte	0
 	.uleb128 0x8
 	.byte	0x8
-	.4byte	0x148c
+	.4byte	0x164c
 	.uleb128 0x12
 	.4byte	0x54
-	.4byte	0x14ce
+	.4byte	0x168e
 	.uleb128 0x13
-	.4byte	0x249
+	.4byte	0x254
 	.uleb128 0x13
 	.4byte	0x54
 	.uleb128 0x13
-	.4byte	0x24f
+	.4byte	0x25a
 	.uleb128 0x13
 	.4byte	0x54
 	.byte	0
 	.uleb128 0x8
 	.byte	0x8
-	.4byte	0x14b0
+	.4byte	0x1670
 	.uleb128 0x12
 	.4byte	0x54
-	.4byte	0x14ed
+	.4byte	0x16ad
 	.uleb128 0x13
-	.4byte	0x249
+	.4byte	0x254
 	.uleb128 0x13
 	.4byte	0x3b
 	.uleb128 0x13
-	.4byte	0x121
+	.4byte	0x12c
 	.byte	0
 	.uleb128 0x8
 	.byte	0x8
-	.4byte	0x14d4
+	.4byte	0x1694
 	.uleb128 0x12
 	.4byte	0x54
-	.4byte	0x151b
+	.4byte	0x16db
 	.uleb128 0x13
-	.4byte	0x249
+	.4byte	0x254
 	.uleb128 0x13
 	.4byte	0x54
 	.uleb128 0x13
-	.4byte	0x121
+	.4byte	0x12c
 	.uleb128 0x13
 	.4byte	0x54
 	.uleb128 0x13
-	.4byte	0x121
+	.4byte	0x12c
 	.uleb128 0x13
 	.4byte	0x54
 	.byte	0
 	.uleb128 0x8
 	.byte	0x8
-	.4byte	0x14f3
+	.4byte	0x16b3
 	.uleb128 0xd
-	.4byte	.LASF383
+	.4byte	.LASF408
 	.byte	0x18
-	.byte	0x1e
-	.byte	0x2f
-	.4byte	0x1552
+	.byte	0x1f
+	.byte	0x3c
+	.4byte	0x1712
 	.uleb128 0xe
 	.4byte	.LASF60
-	.byte	0x1e
-	.byte	0x30
-	.4byte	0x121
+	.byte	0x1f
+	.byte	0x3d
+	.4byte	0x12c
 	.byte	0
 	.uleb128 0xe
-	.4byte	.LASF384
-	.byte	0x1e
-	.byte	0x31
+	.4byte	.LASF409
+	.byte	0x1f
+	.byte	0x3e
+	.4byte	0x3b
+	.byte	0x8
+	.uleb128 0xe
+	.4byte	.LASF410
+	.byte	0x1f
+	.byte	0x3f
 	.4byte	0x3b
+	.byte	0x10
+	.byte	0
+	.uleb128 0xd
+	.4byte	.LASF411
+	.byte	0x10
+	.byte	0x1
+	.byte	0xf
+	.4byte	0x1737
+	.uleb128 0xe
+	.4byte	.LASF412
+	.byte	0x1
+	.byte	0x10
+	.4byte	0x1757
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF413
+	.byte	0x1
+	.byte	0x11
+	.4byte	0x1757
 	.byte	0x8
-	.uleb128 0xe
-	.4byte	.LASF385
-	.byte	0x1e
-	.byte	0x32
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x1712
+	.uleb128 0x28
+	.4byte	0x1751
+	.uleb128 0x13
+	.4byte	0x1751
+	.uleb128 0x13
 	.4byte	0x3b
-	.byte	0x10
+	.uleb128 0x13
+	.4byte	0x54
 	.byte	0
-	.uleb128 0x1c
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x7f
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x173c
+	.uleb128 0x1a
 	.byte	0x4
 	.byte	0x1
-	.byte	0x13
-	.4byte	0x15cb
+	.byte	0x18
+	.4byte	0x17d6
 	.uleb128 0x2e
 	.string	"b0"
 	.byte	0x1
-	.byte	0x14
+	.byte	0x19
 	.4byte	0x7f
 	.byte	0x4
 	.byte	0x1
@@ -4542,7 +5003,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x2e
 	.string	"b1"
 	.byte	0x1
-	.byte	0x15
+	.byte	0x1a
 	.4byte	0x7f
 	.byte	0x4
 	.byte	0x1
@@ -4551,7 +5012,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x2e
 	.string	"b2"
 	.byte	0x1
-	.byte	0x16
+	.byte	0x1b
 	.4byte	0x7f
 	.byte	0x4
 	.byte	0x1
@@ -4560,7 +5021,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x2e
 	.string	"b3"
 	.byte	0x1
-	.byte	0x17
+	.byte	0x1c
 	.4byte	0x7f
 	.byte	0x4
 	.byte	0x1
@@ -4569,7 +5030,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x2e
 	.string	"b4"
 	.byte	0x1
-	.byte	0x18
+	.byte	0x1d
 	.4byte	0x7f
 	.byte	0x4
 	.byte	0x1
@@ -4578,7 +5039,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x2e
 	.string	"b5"
 	.byte	0x1
-	.byte	0x19
+	.byte	0x1e
 	.4byte	0x7f
 	.byte	0x4
 	.byte	0x1
@@ -4587,7 +5048,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x2e
 	.string	"b6"
 	.byte	0x1
-	.byte	0x1a
+	.byte	0x1f
 	.4byte	0x7f
 	.byte	0x4
 	.byte	0x1
@@ -4596,7 +5057,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x2e
 	.string	"b7"
 	.byte	0x1
-	.byte	0x1b
+	.byte	0x20
 	.4byte	0x7f
 	.byte	0x4
 	.byte	0x1
@@ -4604,81 +5065,105 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF387
+	.4byte	.LASF415
 	.byte	0x4
 	.byte	0x1
-	.byte	0xf
-	.4byte	0x15eb
+	.byte	0x14
+	.4byte	0x17f6
 	.uleb128 0x2c
 	.string	"d8"
 	.byte	0x1
-	.byte	0x11
+	.byte	0x16
 	.4byte	0x94
 	.uleb128 0x2c
 	.string	"b"
 	.byte	0x1
-	.byte	0x1c
-	.4byte	0x1552
+	.byte	0x21
+	.4byte	0x175d
 	.byte	0
 	.uleb128 0x2f
-	.4byte	.LASF388
+	.4byte	.LASF416
 	.byte	0x1
-	.2byte	0x17b
-	.4byte	0x1487
+	.2byte	0x1f6
+	.4byte	0x1647
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	rockchip_secure_otp_ops
+	.uleb128 0x2f
+	.4byte	.LASF417
+	.byte	0x1
+	.2byte	0x209
+	.4byte	0x1737
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	px30_data
+	.uleb128 0x2f
+	.4byte	.LASF418
+	.byte	0x1
+	.2byte	0x20e
+	.4byte	0x1737
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	rk3308_data
+	.uleb128 0x2f
+	.4byte	.LASF419
+	.byte	0x1
+	.2byte	0x213
+	.4byte	0x1737
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	rk3328_data
 	.uleb128 0xa
-	.4byte	0x1340
-	.4byte	0x1611
+	.4byte	0x14b1
+	.4byte	0x185e
 	.uleb128 0x11
-	.4byte	0xc4
-	.byte	0x1
+	.4byte	0xcf
+	.byte	0x4
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x1601
+	.4byte	0x184e
 	.uleb128 0x2f
-	.4byte	.LASF389
+	.4byte	.LASF420
 	.byte	0x1
-	.2byte	0x18d
-	.4byte	0x1611
+	.2byte	0x218
+	.4byte	0x185e
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	rockchip_otp_ids
 	.uleb128 0x30
-	.4byte	.LASF390
+	.4byte	.LASF421
 	.byte	0x1
-	.2byte	0x194
-	.4byte	0x1116
+	.2byte	0x22c
+	.4byte	0x1287
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	_u_boot_list_2_driver_2_rockchip_secure_otp
 	.uleb128 0x31
-	.4byte	.LASF391
+	.4byte	.LASF422
 	.byte	0x1
-	.2byte	0x180
+	.2byte	0x1fc
 	.4byte	0x54
-	.8byte	.LFB268
-	.8byte	.LFE268-.LFB268
+	.8byte	.LFB280
+	.8byte	.LFE280-.LFB280
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1705
+	.4byte	0x1952
 	.uleb128 0x32
 	.string	"dev"
 	.byte	0x1
-	.2byte	0x180
-	.4byte	0x249
-	.4byte	.LLST0
+	.2byte	0x1fc
+	.4byte	0x254
+	.4byte	.LLST15
 	.uleb128 0x33
 	.string	"otp"
 	.byte	0x1
-	.2byte	0x182
-	.4byte	0x1705
-	.4byte	.LLST1
+	.2byte	0x1fe
+	.4byte	0x1952
+	.4byte	.LLST16
 	.uleb128 0x34
-	.8byte	.LVL1
-	.4byte	0x2e7f
-	.4byte	0x169c
+	.8byte	.LVL30
+	.4byte	0x337b
+	.4byte	0x18e9
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -4687,9 +5172,9 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL4
-	.4byte	0x2e8b
-	.4byte	0x16b4
+	.8byte	.LVL33
+	.4byte	0x3387
+	.4byte	0x1901
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -4698,9 +5183,9 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL5
-	.4byte	0x2e96
-	.4byte	0x16de
+	.8byte	.LVL34
+	.4byte	0x3392
+	.4byte	0x192b
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -4720,8 +5205,8 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL6
-	.4byte	0x2e96
+	.8byte	.LVL35
+	.4byte	0x3392
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -4743,612 +5228,630 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x8
-	.4byte	0x1521
+	.4byte	0x16e1
 	.uleb128 0x31
-	.4byte	.LASF392
+	.4byte	.LASF423
 	.byte	0x1
-	.2byte	0x156
+	.2byte	0x1e5
 	.4byte	0x54
-	.8byte	.LFB267
-	.8byte	.LFE267-.LFB267
+	.8byte	.LFB279
+	.8byte	.LFE279-.LFB279
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2207
+	.4byte	0x19d9
 	.uleb128 0x32
 	.string	"dev"
 	.byte	0x1
-	.2byte	0x156
-	.4byte	0x249
-	.4byte	.LLST28
+	.2byte	0x1e5
+	.4byte	0x254
+	.4byte	.LLST12
 	.uleb128 0x37
-	.4byte	.LASF393
+	.4byte	.LASF424
 	.byte	0x1
-	.2byte	0x156
+	.2byte	0x1e6
+	.4byte	0x3b
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x38
+	.string	"buf"
+	.byte	0x1
+	.2byte	0x1e7
+	.4byte	0x12c
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x33
+	.string	"ret"
+	.byte	0x1
+	.2byte	0x1e9
 	.4byte	0x54
-	.4byte	.LLST29
+	.4byte	.LLST13
+	.uleb128 0x39
+	.4byte	0x19d9
+	.8byte	.LBB34
+	.8byte	.LBE34-.LBB34
+	.byte	0x1
+	.2byte	0x1ed
+	.uleb128 0x3a
+	.4byte	0x19ea
+	.4byte	.LLST14
+	.byte	0
+	.byte	0
+	.uleb128 0x3b
+	.4byte	.LASF428
+	.byte	0x1
+	.2byte	0x1de
+	.4byte	0x54
+	.byte	0x1
+	.4byte	0x19f7
+	.uleb128 0x3c
+	.string	"buf"
+	.byte	0x1
+	.2byte	0x1de
+	.4byte	0x1281
+	.byte	0
+	.uleb128 0x31
+	.4byte	.LASF425
+	.byte	0x1
+	.2byte	0x1b9
+	.4byte	0x54
+	.8byte	.LFB277
+	.8byte	.LFE277-.LFB277
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x245a
+	.uleb128 0x32
+	.string	"dev"
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+	.uleb128 0x47
+	.4byte	0x278b
+	.byte	0xfb
 	.byte	0
-	.uleb128 0x3f
+	.uleb128 0x44
 	.8byte	.LBB192
 	.8byte	.LBE192-.LBB192
-	.4byte	0x1d2e
-	.uleb128 0x41
-	.4byte	0x2531
-	.sleb128 -65535
-	.byte	0
-	.uleb128 0x3f
-	.8byte	.LBB193
-	.8byte	.LBE193-.LBB193
-	.4byte	0x1d4a
-	.uleb128 0x42
-	.4byte	0x2543
-	.byte	0xfb
-	.byte	0
-	.uleb128 0x3f
-	.8byte	.LBB194
-	.8byte	.LBE194-.LBB194
-	.4byte	0x1d66
-	.uleb128 0x42
-	.4byte	0x2555
+	.4byte	0x1f9f
+	.uleb128 0x47
+	.4byte	0x279d
 	.byte	0
 	.byte	0
-	.uleb128 0x44
-	.4byte	.Ldebug_ranges0+0x100
-	.4byte	0x1d79
-	.uleb128 0x40
-	.4byte	0x2567
+	.uleb128 0x49
+	.4byte	.Ldebug_ranges0+0x150
+	.4byte	0x1fb2
+	.uleb128 0x45
+	.4byte	0x27af
 	.4byte	0x10001
 	.byte	0
-	.uleb128 0x3f
-	.8byte	.LBB197
-	.8byte	.LBE197-.LBB197
-	.4byte	0x1d95
-	.uleb128 0x42
-	.4byte	0x2579
+	.uleb128 0x44
+	.8byte	.LBB195
+	.8byte	.LBE195-.LBB195
+	.4byte	0x1fce
+	.uleb128 0x47
+	.4byte	0x27c1
 	.byte	0xc0
 	.byte	0
-	.uleb128 0x3f
-	.8byte	.LBB198
-	.8byte	.LBE198-.LBB198
-	.4byte	0x1db2
-	.uleb128 0x43
-	.4byte	0x258b
-	.uleb128 0x1
-	.byte	0x6c
-	.byte	0
 	.uleb128 0x44
-	.4byte	.Ldebug_ranges0+0x130
-	.4byte	0x1dc5
-	.uleb128 0x40
-	.4byte	0x259d
+	.8byte	.LBB196
+	.8byte	.LBE196-.LBB196
+	.4byte	0x1fed
+	.uleb128 0x48
+	.4byte	0x27d3
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 236
+	.byte	0
+	.uleb128 0x49
+	.4byte	.Ldebug_ranges0+0x180
+	.4byte	0x2000
+	.uleb128 0x45
+	.4byte	0x27e5
 	.4byte	0x10001
 	.byte	0
-	.uleb128 0x3f
-	.8byte	.LBB201
-	.8byte	.LBE201-.LBB201
-	.4byte	0x1de4
-	.uleb128 0x41
-	.4byte	0x25af
+	.uleb128 0x44
+	.8byte	.LBB199
+	.8byte	.LBE199-.LBB199
+	.4byte	0x201f
+	.uleb128 0x46
+	.4byte	0x27f7
 	.sleb128 -16762368
 	.byte	0
-	.uleb128 0x3f
-	.8byte	.LBB202
-	.8byte	.LBE202-.LBB202
-	.4byte	0x1e00
-	.uleb128 0x42
-	.4byte	0x25c1
+	.uleb128 0x44
+	.8byte	.LBB200
+	.8byte	.LBE200-.LBB200
+	.4byte	0x203b
+	.uleb128 0x47
+	.4byte	0x2809
 	.byte	0xff
 	.byte	0
-	.uleb128 0x3f
-	.8byte	.LBB203
-	.8byte	.LBE203-.LBB203
-	.4byte	0x1e1c
-	.uleb128 0x42
-	.4byte	0x25d3
+	.uleb128 0x44
+	.8byte	.LBB201
+	.8byte	.LBE201-.LBB201
+	.4byte	0x2057
+	.uleb128 0x47
+	.4byte	0x281b
 	.byte	0xa
 	.byte	0
+	.uleb128 0x49
+	.4byte	.Ldebug_ranges0+0x1b0
+	.4byte	0x206a
+	.uleb128 0x45
+	.4byte	0x282d
+	.4byte	0x10001
+	.byte	0
+	.uleb128 0x44
+	.8byte	.LBB204
+	.8byte	.LBE204-.LBB204
+	.4byte	0x2088
+	.uleb128 0x46
+	.4byte	0x283f
+	.sleb128 -65534
+	.byte	0
 	.uleb128 0x44
-	.4byte	.Ldebug_ranges0+0x160
-	.4byte	0x1e2f
-	.uleb128 0x40
-	.4byte	0x25e5
-	.4byte	0x10001
+	.8byte	.LBB205
+	.8byte	.LBE205-.LBB205
+	.4byte	0x20a4
+	.uleb128 0x47
+	.4byte	0x2851
+	.byte	0x1
 	.byte	0
-	.uleb128 0x3f
+	.uleb128 0x44
 	.8byte	.LBB206
 	.8byte	.LBE206-.LBB206
-	.4byte	0x1e4d
-	.uleb128 0x41
-	.4byte	0x25f7
-	.sleb128 -65534
+	.4byte	0x20c0
+	.uleb128 0x47
+	.4byte	0x2863
+	.byte	0xbf
 	.byte	0
-	.uleb128 0x3f
+	.uleb128 0x44
 	.8byte	.LBB207
 	.8byte	.LBE207-.LBB207
-	.4byte	0x1e69
-	.uleb128 0x42
-	.4byte	0x2609
-	.byte	0x1
-	.byte	0
-	.uleb128 0x3f
-	.8byte	.LBB208
-	.8byte	.LBE208-.LBB208
-	.4byte	0x1e85
-	.uleb128 0x42
-	.4byte	0x261b
-	.byte	0xbf
-	.byte	0
-	.uleb128 0x3f
-	.8byte	.LBB209
-	.8byte	.LBE209-.LBB209
-	.4byte	0x1ea1
-	.uleb128 0x42
-	.4byte	0x262d
+	.4byte	0x20dc
+	.uleb128 0x47
+	.4byte	0x2875
 	.byte	0
 	.byte	0
-	.uleb128 0x44
-	.4byte	.Ldebug_ranges0+0x190
-	.4byte	0x1eb4
-	.uleb128 0x40
-	.4byte	0x263f
+	.uleb128 0x49
+	.4byte	.Ldebug_ranges0+0x1e0
+	.4byte	0x20ef
+	.uleb128 0x45
+	.4byte	0x2887
 	.4byte	0x10001
 	.byte	0
-	.uleb128 0x45
-	.4byte	0x2c38
+	.uleb128 0x4a
+	.4byte	0x2de2
+	.8byte	.LBB210
+	.8byte	.LBE210-.LBB210
+	.byte	0x1
+	.2byte	0x191
+	.4byte	0x216c
+	.uleb128 0x4b
+	.4byte	0x2df2
+	.uleb128 0x4c
+	.8byte	.LBB211
+	.8byte	.LBE211-.LBB211
+	.uleb128 0x41
+	.4byte	0x2dfd
+	.4byte	.LLST60
+	.uleb128 0x41
+	.4byte	0x2e08
+	.4byte	.LLST61
+	.uleb128 0x43
+	.4byte	0x2e13
+	.uleb128 0x44
 	.8byte	.LBB212
 	.8byte	.LBE212-.LBB212
-	.byte	0x1
-	.2byte	0x138
-	.4byte	0x1f31
-	.uleb128 0x46
-	.4byte	0x2c48
-	.uleb128 0x47
-	.8byte	.LBB213
-	.8byte	.LBE213-.LBB213
-	.uleb128 0x3c
-	.4byte	0x2c53
-	.4byte	.LLST45
-	.uleb128 0x3c
-	.4byte	0x2c5e
-	.4byte	.LLST46
-	.uleb128 0x3e
-	.4byte	0x2c69
-	.uleb128 0x3f
-	.8byte	.LBB214
-	.8byte	.LBE214-.LBB214
-	.4byte	0x1f1c
-	.uleb128 0x3c
-	.4byte	0x2c75
-	.4byte	.LLST47
+	.4byte	0x2157
+	.uleb128 0x41
+	.4byte	0x2e1f
+	.4byte	.LLST62
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL181
-	.4byte	0x2ea1
+	.8byte	.LVL208
+	.4byte	0x339d
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -5357,69 +5860,69 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x3f
+	.uleb128 0x44
+	.8byte	.LBB213
+	.8byte	.LBE213-.LBB213
+	.4byte	0x218b
+	.uleb128 0x41
+	.4byte	0x2899
+	.4byte	.LLST63
+	.byte	0
+	.uleb128 0x44
+	.8byte	.LBB214
+	.8byte	.LBE214-.LBB214
+	.4byte	0x21aa
+	.uleb128 0x41
+	.4byte	0x28ab
+	.4byte	.LLST64
+	.byte	0
+	.uleb128 0x44
 	.8byte	.LBB215
 	.8byte	.LBE215-.LBB215
-	.4byte	0x1f50
-	.uleb128 0x3c
-	.4byte	0x2651
-	.4byte	.LLST48
+	.4byte	0x21c9
+	.uleb128 0x41
+	.4byte	0x28bd
+	.4byte	.LLST65
 	.byte	0
-	.uleb128 0x3f
+	.uleb128 0x44
 	.8byte	.LBB216
 	.8byte	.LBE216-.LBB216
-	.4byte	0x1f6f
-	.uleb128 0x3c
-	.4byte	0x2663
-	.4byte	.LLST49
+	.4byte	0x21e8
+	.uleb128 0x41
+	.4byte	0x28cf
+	.4byte	.LLST66
 	.byte	0
-	.uleb128 0x3f
+	.uleb128 0x4a
+	.4byte	0x2e2c
 	.8byte	.LBB217
 	.8byte	.LBE217-.LBB217
-	.4byte	0x1f8e
-	.uleb128 0x3c
-	.4byte	0x2675
-	.4byte	.LLST50
-	.byte	0
-	.uleb128 0x3f
+	.byte	0x1
+	.2byte	0x1a1
+	.4byte	0x2265
+	.uleb128 0x4b
+	.4byte	0x2e3c
+	.uleb128 0x4c
 	.8byte	.LBB218
 	.8byte	.LBE218-.LBB218
-	.4byte	0x1fad
-	.uleb128 0x3c
-	.4byte	0x2687
-	.4byte	.LLST51
-	.byte	0
-	.uleb128 0x45
-	.4byte	0x2c82
+	.uleb128 0x41
+	.4byte	0x2e47
+	.4byte	.LLST67
+	.uleb128 0x41
+	.4byte	0x2e52
+	.4byte	.LLST68
+	.uleb128 0x43
+	.4byte	0x2e5d
+	.uleb128 0x44
 	.8byte	.LBB219
 	.8byte	.LBE219-.LBB219
-	.byte	0x1
-	.2byte	0x148
-	.4byte	0x202a
-	.uleb128 0x46
-	.4byte	0x2c92
-	.uleb128 0x47
-	.8byte	.LBB220
-	.8byte	.LBE220-.LBB220
-	.uleb128 0x3c
-	.4byte	0x2c9d
-	.4byte	.LLST52
-	.uleb128 0x3c
-	.4byte	0x2ca8
-	.4byte	.LLST53
-	.uleb128 0x3e
-	.4byte	0x2cb3
-	.uleb128 0x3f
-	.8byte	.LBB221
-	.8byte	.LBE221-.LBB221
-	.4byte	0x2015
-	.uleb128 0x3c
-	.4byte	0x2cbf
-	.4byte	.LLST54
+	.4byte	0x2250
+	.uleb128 0x41
+	.4byte	0x2e69
+	.4byte	.LLST69
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL200
-	.4byte	0x2ea1
+	.8byte	.LVL227
+	.4byte	0x339d
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -5428,62 +5931,74 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x48
-	.8byte	.LVL85
-	.4byte	0x2eac
+	.uleb128 0x4d
+	.8byte	.LVL115
+	.4byte	0x33a8
 	.uleb128 0x34
-	.8byte	.LVL91
-	.4byte	0x2ea1
-	.4byte	0x204e
+	.8byte	.LVL118
+	.4byte	0x33b3
+	.4byte	0x228c
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x1
-	.byte	0x3a
+	.uleb128 0x4
+	.byte	0x8f
+	.sleb128 224
+	.byte	0x6
 	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL92
-	.4byte	0x2ea1
-	.4byte	0x2065
+	.uleb128 0x4e
+	.8byte	.LVL123
+	.4byte	0x22a0
 	.uleb128 0x35
 	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x3a
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL115
-	.4byte	0x2d92
-	.4byte	0x208a
+	.8byte	.LVL144
+	.4byte	0x328e
+	.4byte	0x22c5
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x8b
+	.byte	0x8c
 	.sleb128 0
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x1
 	.byte	0x32
-	.uleb128 0x49
-	.4byte	0x2cdc
+	.uleb128 0x4f
+	.4byte	0x2e86
 	.uleb128 0x2
-	.byte	0x8b
+	.byte	0x8c
+	.sleb128 0
+	.byte	0
+	.uleb128 0x4d
+	.8byte	.LVL147
+	.4byte	0x33a8
+	.uleb128 0x4e
+	.8byte	.LVL148
+	.4byte	0x22e6
+	.uleb128 0x35
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x83
 	.sleb128 0
 	.byte	0
-	.uleb128 0x48
-	.8byte	.LVL118
-	.4byte	0x2eac
 	.uleb128 0x34
-	.8byte	.LVL140
-	.4byte	0x2d92
-	.4byte	0x20bd
+	.8byte	.LVL167
+	.4byte	0x328e
+	.4byte	0x230c
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x8b
+	.byte	0x8c
 	.sleb128 0
 	.uleb128 0x35
 	.uleb128 0x1
@@ -5491,21 +6006,21 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x2
 	.byte	0x85
 	.sleb128 0
-	.uleb128 0x49
-	.4byte	0x2cdc
+	.uleb128 0x4f
+	.4byte	0x2e86
 	.uleb128 0x2
-	.byte	0x8b
+	.byte	0x8c
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL149
-	.4byte	0x2d92
-	.4byte	0x20e3
+	.8byte	.LVL176
+	.4byte	0x328e
+	.4byte	0x2332
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x8b
+	.byte	0x8c
 	.sleb128 0
 	.uleb128 0x35
 	.uleb128 0x1
@@ -5513,21 +6028,21 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x2
 	.byte	0x85
 	.sleb128 0
-	.uleb128 0x49
-	.4byte	0x2cdc
+	.uleb128 0x4f
+	.4byte	0x2e86
 	.uleb128 0x2
-	.byte	0x8b
+	.byte	0x8c
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL156
-	.4byte	0x2d92
-	.4byte	0x2109
+	.8byte	.LVL183
+	.4byte	0x328e
+	.4byte	0x2358
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x8b
+	.byte	0x8c
 	.sleb128 0
 	.uleb128 0x35
 	.uleb128 0x1
@@ -5535,21 +6050,21 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x2
 	.byte	0x85
 	.sleb128 0
-	.uleb128 0x49
-	.4byte	0x2cdc
+	.uleb128 0x4f
+	.4byte	0x2e86
 	.uleb128 0x2
-	.byte	0x8b
+	.byte	0x8c
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL164
-	.4byte	0x2d92
-	.4byte	0x212f
+	.8byte	.LVL191
+	.4byte	0x328e
+	.4byte	0x237e
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x8b
+	.byte	0x8c
 	.sleb128 0
 	.uleb128 0x35
 	.uleb128 0x1
@@ -5557,21 +6072,21 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x2
 	.byte	0x85
 	.sleb128 0
-	.uleb128 0x49
-	.4byte	0x2cdc
+	.uleb128 0x4f
+	.4byte	0x2e86
 	.uleb128 0x2
-	.byte	0x8b
+	.byte	0x8c
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL173
-	.4byte	0x2d92
-	.4byte	0x2155
+	.8byte	.LVL200
+	.4byte	0x328e
+	.4byte	0x23a4
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x8b
+	.byte	0x8c
 	.sleb128 0
 	.uleb128 0x35
 	.uleb128 0x1
@@ -5579,16 +6094,16 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x2
 	.byte	0x85
 	.sleb128 0
-	.uleb128 0x49
-	.4byte	0x2cdc
+	.uleb128 0x4f
+	.4byte	0x2e86
 	.uleb128 0x2
-	.byte	0x8b
+	.byte	0x8c
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL186
-	.4byte	0x2eac
-	.4byte	0x217a
+	.8byte	.LVL213
+	.4byte	0x33a8
+	.4byte	0x23c9
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -5602,46 +6117,47 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x84
 	.sleb128 0
 	.byte	0
-	.uleb128 0x48
-	.8byte	.LVL188
-	.4byte	0x2eac
+	.uleb128 0x4d
+	.8byte	.LVL215
+	.4byte	0x33a8
 	.uleb128 0x36
-	.8byte	.LVL193
-	.4byte	0x2d92
+	.8byte	.LVL220
+	.4byte	0x328e
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x8b
+	.byte	0x8c
 	.sleb128 0
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x1
 	.byte	0x32
-	.uleb128 0x49
-	.4byte	0x2cdc
+	.uleb128 0x4f
+	.4byte	0x2e86
 	.uleb128 0x2
-	.byte	0x8b
+	.byte	0x8c
 	.sleb128 0
 	.byte	0
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL68
-	.4byte	0x2e7f
-	.4byte	0x21c2
+	.8byte	.LVL98
+	.4byte	0x337b
+	.4byte	0x2413
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
+	.uleb128 0x4
+	.byte	0x8f
+	.sleb128 224
+	.byte	0x6
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL71
-	.4byte	0x2eb7
-	.4byte	0x21e0
+	.8byte	.LVL101
+	.4byte	0x33bf
+	.4byte	0x2431
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -5656,14 +6172,15 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x26
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL78
-	.4byte	0x26dc
+	.8byte	.LVL108
+	.4byte	0x2906
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
+	.uleb128 0x4
+	.byte	0x8f
+	.sleb128 224
+	.byte	0x6
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x51
@@ -5684,825 +6201,751 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x4a
-	.4byte	.LASF399
-	.byte	0x1
-	.byte	0xc1
-	.4byte	0x54
-	.byte	0x1
-	.4byte	0x26c7
-	.uleb128 0x4b
-	.string	"otp"
-	.byte	0x1
-	.byte	0xc1
-	.4byte	0x1705
-	.uleb128 0x4c
-	.4byte	.LASF393
-	.byte	0x1
-	.byte	0xc2
-	.4byte	0x54
-	.uleb128 0x4c
-	.4byte	.LASF367
-	.byte	0x1
-	.byte	0xc2
-	.4byte	0x94
-	.uleb128 0x4d
-	.string	"ret"
+	.uleb128 0x3b
+	.4byte	.LASF429
 	.byte	0x1
-	.byte	0xc4
+	.2byte	0x10b
 	.4byte	0x54
-	.uleb128 0x4e
-	.4byte	.LASF395
-	.4byte	0x26d7
-	.4byte	.LASF399
-	.uleb128 0x4f
-	.4byte	.LASF417
-	.byte	0x1
-	.2byte	0x14e
-	.uleb128 0x50
-	.4byte	0x2269
-	.uleb128 0x4d
-	.string	"__v"
 	.byte	0x1
-	.byte	0xd5
-	.4byte	0xa3
-	.byte	0
-	.uleb128 0x50
-	.4byte	0x227a
-	.uleb128 0x4d
-	.string	"__v"
+	.4byte	0x28eb
+	.uleb128 0x3c
+	.string	"dev"
 	.byte	0x1
-	.byte	0xd7
-	.4byte	0xa3
-	.byte	0
-	.uleb128 0x50
-	.4byte	0x228b
-	.uleb128 0x4d
-	.string	"__v"
+	.2byte	0x10b
+	.4byte	0x254
+	.uleb128 0x3c
+	.string	"otp"
 	.byte	0x1
-	.byte	0xda
-	.4byte	0xa3
-	.byte	0
+	.2byte	0x10c
+	.4byte	0x1952
 	.uleb128 0x50
-	.4byte	0x229c
-	.uleb128 0x4d
-	.string	"__v"
+	.4byte	.LASF426
 	.byte	0x1
-	.byte	0xdd
-	.4byte	0xa3
-	.byte	0
+	.2byte	0x10d
+	.4byte	0x54
 	.uleb128 0x50
-	.4byte	0x22ad
-	.uleb128 0x4d
-	.string	"__v"
+	.4byte	.LASF386
 	.byte	0x1
-	.byte	0xde
-	.4byte	0xa3
-	.byte	0
-	.uleb128 0x50
-	.4byte	0x22be
-	.uleb128 0x4d
-	.string	"__v"
+	.2byte	0x10d
+	.4byte	0x94
+	.uleb128 0x51
+	.string	"ret"
 	.byte	0x1
-	.byte	0xdf
-	.4byte	0xa3
-	.byte	0
-	.uleb128 0x50
-	.4byte	0x22cf
-	.uleb128 0x4d
+	.2byte	0x10f
+	.4byte	0x54
+	.uleb128 0x52
+	.4byte	.LASF415
+	.byte	0x1
+	.2byte	0x110
+	.4byte	0x28eb
+	.uleb128 0x53
+	.4byte	.LASF430
+	.4byte	0x2901
+	.4byte	.LASF429
+	.uleb128 0x54
+	.4byte	.LASF460
+	.byte	0x1
+	.2byte	0x1a7
+	.uleb128 0x55
+	.4byte	0x24da
+	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
-	.byte	0xe0
+	.2byte	0x137
 	.4byte	0xa3
 	.byte	0
-	.uleb128 0x50
-	.4byte	0x22e0
-	.uleb128 0x4d
+	.uleb128 0x55
+	.4byte	0x24ec
+	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
-	.byte	0xe1
+	.2byte	0x138
 	.4byte	0xa3
 	.byte	0
-	.uleb128 0x50
-	.4byte	0x22f1
-	.uleb128 0x4d
+	.uleb128 0x55
+	.4byte	0x24fe
+	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
-	.byte	0xe2
+	.2byte	0x139
 	.4byte	0xa3
 	.byte	0
-	.uleb128 0x50
-	.4byte	0x2302
-	.uleb128 0x4d
+	.uleb128 0x55
+	.4byte	0x2510
+	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
-	.byte	0xe3
+	.2byte	0x13a
 	.4byte	0xa3
 	.byte	0
-	.uleb128 0x50
-	.4byte	0x2313
-	.uleb128 0x4d
+	.uleb128 0x55
+	.4byte	0x2522
+	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
-	.byte	0xe4
+	.2byte	0x13b
 	.4byte	0xa3
 	.byte	0
-	.uleb128 0x50
-	.4byte	0x2324
-	.uleb128 0x4d
+	.uleb128 0x55
+	.4byte	0x2534
+	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
-	.byte	0xe5
+	.2byte	0x13c
 	.4byte	0xa3
 	.byte	0
-	.uleb128 0x50
-	.4byte	0x2335
-	.uleb128 0x4d
+	.uleb128 0x55
+	.4byte	0x2546
+	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
-	.byte	0xe6
+	.2byte	0x13d
 	.4byte	0xa3
 	.byte	0
-	.uleb128 0x50
-	.4byte	0x2346
-	.uleb128 0x4d
+	.uleb128 0x55
+	.4byte	0x2558
+	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
-	.byte	0xe7
+	.2byte	0x13e
 	.4byte	0xa3
 	.byte	0
-	.uleb128 0x50
-	.4byte	0x2357
-	.uleb128 0x4d
+	.uleb128 0x55
+	.4byte	0x256a
+	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
-	.byte	0xe8
+	.2byte	0x13f
 	.4byte	0xa3
 	.byte	0
-	.uleb128 0x50
-	.4byte	0x2368
-	.uleb128 0x4d
+	.uleb128 0x55
+	.4byte	0x257c
+	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
-	.byte	0xe9
+	.2byte	0x140
 	.4byte	0xa3
 	.byte	0
-	.uleb128 0x50
-	.4byte	0x2379
-	.uleb128 0x4d
+	.uleb128 0x55
+	.4byte	0x258e
+	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
-	.byte	0xea
+	.2byte	0x141
 	.4byte	0xa3
 	.byte	0
-	.uleb128 0x50
-	.4byte	0x238a
-	.uleb128 0x4d
+	.uleb128 0x55
+	.4byte	0x25a0
+	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
-	.byte	0xeb
+	.2byte	0x142
 	.4byte	0xa3
 	.byte	0
-	.uleb128 0x50
-	.4byte	0x239b
-	.uleb128 0x4d
+	.uleb128 0x55
+	.4byte	0x25b2
+	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
-	.byte	0xec
+	.2byte	0x143
 	.4byte	0xa3
 	.byte	0
-	.uleb128 0x50
-	.4byte	0x23ac
-	.uleb128 0x4d
+	.uleb128 0x55
+	.4byte	0x25c4
+	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
-	.byte	0xed
+	.2byte	0x144
 	.4byte	0xa3
 	.byte	0
-	.uleb128 0x50
-	.4byte	0x23bd
-	.uleb128 0x4d
+	.uleb128 0x55
+	.4byte	0x25d6
+	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
-	.byte	0xee
+	.2byte	0x145
 	.4byte	0xa3
 	.byte	0
-	.uleb128 0x50
-	.4byte	0x23ce
-	.uleb128 0x4d
+	.uleb128 0x55
+	.4byte	0x25e8
+	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
-	.byte	0xef
+	.2byte	0x146
 	.4byte	0xa3
 	.byte	0
-	.uleb128 0x50
-	.4byte	0x23df
-	.uleb128 0x4d
+	.uleb128 0x55
+	.4byte	0x25fa
+	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
-	.byte	0xf0
+	.2byte	0x147
 	.4byte	0xa3
 	.byte	0
-	.uleb128 0x50
-	.4byte	0x23f0
-	.uleb128 0x4d
+	.uleb128 0x55
+	.4byte	0x260c
+	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
-	.byte	0xf1
+	.2byte	0x148
 	.4byte	0xa3
 	.byte	0
-	.uleb128 0x50
-	.4byte	0x2401
-	.uleb128 0x4d
+	.uleb128 0x55
+	.4byte	0x261e
+	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
-	.byte	0xf8
+	.2byte	0x149
 	.4byte	0xa3
 	.byte	0
-	.uleb128 0x50
-	.4byte	0x2412
-	.uleb128 0x4d
+	.uleb128 0x55
+	.4byte	0x2630
+	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
-	.byte	0xf9
+	.2byte	0x14a
 	.4byte	0xa3
 	.byte	0
-	.uleb128 0x50
-	.4byte	0x2423
-	.uleb128 0x4d
+	.uleb128 0x55
+	.4byte	0x2642
+	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
-	.byte	0xfa
+	.2byte	0x151
 	.4byte	0xa3
 	.byte	0
-	.uleb128 0x50
-	.4byte	0x2434
-	.uleb128 0x4d
+	.uleb128 0x55
+	.4byte	0x2654
+	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
-	.byte	0xfb
+	.2byte	0x152
 	.4byte	0xa3
 	.byte	0
-	.uleb128 0x50
-	.4byte	0x2445
-	.uleb128 0x4d
+	.uleb128 0x55
+	.4byte	0x2666
+	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
-	.byte	0xfc
+	.2byte	0x153
 	.4byte	0xa3
 	.byte	0
-	.uleb128 0x50
-	.4byte	0x2456
-	.uleb128 0x4d
+	.uleb128 0x55
+	.4byte	0x2678
+	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
-	.byte	0xfd
+	.2byte	0x154
 	.4byte	0xa3
 	.byte	0
-	.uleb128 0x50
-	.4byte	0x2467
-	.uleb128 0x4d
+	.uleb128 0x55
+	.4byte	0x268a
+	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
-	.byte	0xfe
+	.2byte	0x155
 	.4byte	0xa3
 	.byte	0
-	.uleb128 0x50
-	.4byte	0x2478
-	.uleb128 0x4d
+	.uleb128 0x55
+	.4byte	0x269c
+	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
-	.byte	0xff
+	.2byte	0x156
 	.4byte	0xa3
 	.byte	0
-	.uleb128 0x50
-	.4byte	0x248a
+	.uleb128 0x55
+	.4byte	0x26ae
 	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
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+	.2byte	0x157
 	.4byte	0xa3
 	.byte	0
-	.uleb128 0x50
-	.4byte	0x249c
+	.uleb128 0x55
+	.4byte	0x26c0
 	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
-	.2byte	0x101
+	.2byte	0x158
 	.4byte	0xa3
 	.byte	0
-	.uleb128 0x50
-	.4byte	0x24ae
+	.uleb128 0x55
+	.4byte	0x26d2
 	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
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 	.4byte	0xa3
 	.byte	0
-	.uleb128 0x50
-	.4byte	0x24c0
+	.uleb128 0x55
+	.4byte	0x26e4
 	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
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+	.2byte	0x15a
 	.4byte	0xa3
 	.byte	0
-	.uleb128 0x50
-	.4byte	0x24d2
+	.uleb128 0x55
+	.4byte	0x26f6
 	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
-	.2byte	0x104
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 	.4byte	0xa3
 	.byte	0
-	.uleb128 0x50
-	.4byte	0x24e4
+	.uleb128 0x55
+	.4byte	0x2708
 	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
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 	.4byte	0xa3
 	.byte	0
-	.uleb128 0x50
-	.4byte	0x24f6
+	.uleb128 0x55
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 	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
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 	.4byte	0xa3
 	.byte	0
-	.uleb128 0x50
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+	.uleb128 0x55
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 	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
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 	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
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 	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
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 	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
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 	.byte	0
-	.uleb128 0x50
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+	.uleb128 0x55
+	.4byte	0x2774
 	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
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 	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
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 	.4byte	0xa3
 	.byte	0
-	.uleb128 0x50
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 	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
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 	.4byte	0xa3
 	.byte	0
-	.uleb128 0x50
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+	.uleb128 0x55
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 	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
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 	.byte	0
-	.uleb128 0x50
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 	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
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 	.4byte	0xa3
 	.byte	0
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 	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
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 	.string	"__v"
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 	.string	"__v"
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 	.string	"__v"
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 	.string	"__v"
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 	.string	"__v"
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 	.string	"__v"
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 	.string	"__v"
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 	.uleb128 0x51
 	.string	"__v"
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-	.2byte	0x130
+	.2byte	0x187
 	.4byte	0xa3
 	.byte	0
-	.uleb128 0x50
-	.4byte	0x264c
+	.uleb128 0x55
+	.4byte	0x2870
 	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
-	.2byte	0x131
+	.2byte	0x188
 	.4byte	0xa3
 	.byte	0
-	.uleb128 0x50
-	.4byte	0x265e
+	.uleb128 0x55
+	.4byte	0x2882
 	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
-	.2byte	0x13e
+	.2byte	0x189
 	.4byte	0xa3
 	.byte	0
-	.uleb128 0x50
-	.4byte	0x2670
+	.uleb128 0x55
+	.4byte	0x2894
 	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
-	.2byte	0x13f
+	.2byte	0x18a
 	.4byte	0xa3
 	.byte	0
-	.uleb128 0x50
-	.4byte	0x2682
+	.uleb128 0x55
+	.4byte	0x28a6
 	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
-	.2byte	0x140
+	.2byte	0x197
 	.4byte	0xa3
 	.byte	0
-	.uleb128 0x50
-	.4byte	0x2694
+	.uleb128 0x55
+	.4byte	0x28b8
 	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
-	.2byte	0x141
+	.2byte	0x198
 	.4byte	0xa3
 	.byte	0
-	.uleb128 0x50
-	.4byte	0x26a6
+	.uleb128 0x55
+	.4byte	0x28ca
 	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
-	.2byte	0x14f
+	.2byte	0x199
 	.4byte	0xa3
 	.byte	0
-	.uleb128 0x50
-	.4byte	0x26b8
+	.uleb128 0x55
+	.4byte	0x28dc
 	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
-	.2byte	0x150
+	.2byte	0x19a
 	.4byte	0xa3
 	.byte	0
-	.uleb128 0x52
+	.uleb128 0x56
 	.uleb128 0x51
 	.string	"__v"
 	.byte	0x1
-	.2byte	0x151
+	.2byte	0x1a8
 	.4byte	0xa3
 	.byte	0
 	.byte	0
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x1712
 	.uleb128 0xa
-	.4byte	0xd8
-	.4byte	0x26d7
+	.4byte	0xe3
+	.4byte	0x2901
 	.uleb128 0x11
-	.4byte	0xc4
+	.4byte	0xcf
 	.byte	0x1e
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x26c7
-	.uleb128 0x53
-	.4byte	.LASF396
+	.4byte	0x28f1
+	.uleb128 0x57
+	.4byte	.LASF431
 	.byte	0x1
-	.byte	0x85
+	.byte	0xb4
 	.4byte	0x54
-	.8byte	.LFB265
-	.8byte	.LFE265-.LFB265
+	.8byte	.LFB275
+	.8byte	.LFE275-.LFB275
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2b82
-	.uleb128 0x54
+	.4byte	0x2d2c
+	.uleb128 0x58
 	.string	"dev"
 	.byte	0x1
-	.byte	0x85
-	.4byte	0x249
-	.4byte	.LLST6
-	.uleb128 0x55
-	.4byte	.LASF393
+	.byte	0xb4
+	.4byte	0x254
+	.4byte	.LLST21
+	.uleb128 0x59
+	.4byte	.LASF426
 	.byte	0x1
-	.byte	0x85
+	.byte	0xb4
 	.4byte	0x54
-	.4byte	.LLST7
-	.uleb128 0x54
+	.4byte	.LLST22
+	.uleb128 0x58
 	.string	"buf"
 	.byte	0x1
-	.byte	0x86
-	.4byte	0x121
-	.4byte	.LLST8
-	.uleb128 0x55
+	.byte	0xb5
+	.4byte	0x12c
+	.4byte	.LLST23
+	.uleb128 0x59
 	.4byte	.LASF51
 	.byte	0x1
-	.byte	0x86
+	.byte	0xb5
 	.4byte	0x54
-	.4byte	.LLST9
-	.uleb128 0x56
+	.4byte	.LLST24
+	.uleb128 0x5a
 	.string	"otp"
 	.byte	0x1
-	.byte	0x88
-	.4byte	0x1705
-	.4byte	.LLST10
-	.uleb128 0x57
-	.4byte	.LASF397
+	.byte	0xb7
+	.4byte	0x1952
+	.4byte	.LLST25
+	.uleb128 0x5b
+	.4byte	.LASF386
 	.byte	0x1
-	.byte	0x89
-	.4byte	0x1110
-	.4byte	.LLST11
-	.uleb128 0x57
-	.4byte	.LASF398
+	.byte	0xb8
+	.4byte	0x28eb
+	.4byte	.LLST26
+	.uleb128 0x5b
+	.4byte	.LASF432
 	.byte	0x1
-	.byte	0x8a
+	.byte	0xb9
+	.4byte	0x127b
+	.4byte	.LLST27
+	.uleb128 0x5b
+	.4byte	.LASF433
+	.byte	0x1
+	.byte	0xba
 	.4byte	0x94
-	.4byte	.LLST12
-	.uleb128 0x57
-	.4byte	.LASF394
+	.4byte	.LLST28
+	.uleb128 0x5b
+	.4byte	.LASF427
 	.byte	0x1
-	.byte	0x8a
+	.byte	0xba
 	.4byte	0x94
-	.4byte	.LLST13
-	.uleb128 0x56
+	.4byte	.LLST29
+	.uleb128 0x5a
 	.string	"ret"
 	.byte	0x1
-	.byte	0x8b
+	.byte	0xbb
 	.4byte	0x54
-	.4byte	.LLST14
-	.uleb128 0x58
+	.4byte	.LLST30
+	.uleb128 0x5c
 	.string	"i"
 	.byte	0x1
-	.byte	0x8c
+	.byte	0xbc
 	.4byte	0x54
 	.byte	0
-	.uleb128 0x59
-	.4byte	.LASF395
-	.4byte	0x2b92
+	.uleb128 0x5d
+	.4byte	.LASF430
+	.4byte	0x2d3c
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.7251
-	.uleb128 0x5a
-	.4byte	.LASF418
-	.byte	0x1
-	.byte	0xba
-	.8byte	.L15
-	.uleb128 0x3f
-	.8byte	.LBB50
-	.8byte	.LBE50-.LBB50
-	.4byte	0x27d5
-	.uleb128 0x5b
-	.string	"__v"
-	.byte	0x1
-	.byte	0x8f
-	.4byte	0xa3
-	.4byte	0x100010
-	.byte	0
-	.uleb128 0x3f
-	.8byte	.LBB51
-	.8byte	.LBE51-.LBB51
-	.4byte	0x27fa
-	.uleb128 0x5b
-	.string	"__v"
-	.byte	0x1
-	.byte	0x91
-	.4byte	0xa3
-	.4byte	0x100000
-	.byte	0
-	.uleb128 0x3f
-	.8byte	.LBB52
-	.8byte	.LBE52-.LBB52
-	.4byte	0x281f
-	.uleb128 0x5b
-	.string	"__v"
+	.8byte	__func__.7470
+	.uleb128 0x5e
+	.4byte	.LASF461
 	.byte	0x1
-	.byte	0x94
-	.4byte	0xa3
-	.4byte	0x40004
-	.byte	0
-	.uleb128 0x3f
-	.8byte	.LBB60
-	.8byte	.LBE60-.LBB60
-	.4byte	0x2844
-	.uleb128 0x5b
+	.byte	0xf8
+	.8byte	.L26
+	.uleb128 0x44
+	.8byte	.LBB69
+	.8byte	.LBE69-.LBB69
+	.4byte	0x2a0e
+	.uleb128 0x5f
 	.string	"__v"
 	.byte	0x1
-	.byte	0x96
+	.byte	0xd4
 	.4byte	0xa3
 	.4byte	0x10001
 	.byte	0
-	.uleb128 0x3f
-	.8byte	.LBB61
-	.8byte	.LBE61-.LBB61
-	.4byte	0x2869
-	.uleb128 0x56
+	.uleb128 0x44
+	.8byte	.LBB70
+	.8byte	.LBE70-.LBB70
+	.4byte	0x2a33
+	.uleb128 0x5a
 	.string	"__v"
 	.byte	0x1
-	.byte	0xa4
+	.byte	0xe2
 	.4byte	0xa3
-	.4byte	.LLST18
+	.4byte	.LLST34
 	.byte	0
-	.uleb128 0x44
+	.uleb128 0x49
 	.4byte	.Ldebug_ranges0+0
-	.4byte	0x2882
-	.uleb128 0x56
+	.4byte	0x2a4c
+	.uleb128 0x5a
 	.string	"__v"
 	.byte	0x1
-	.byte	0xa6
+	.byte	0xe4
 	.4byte	0xa3
-	.4byte	.LLST19
+	.4byte	.LLST35
 	.byte	0
-	.uleb128 0x3f
-	.8byte	.LBB66
-	.8byte	.LBE66-.LBB66
-	.4byte	0x28a7
-	.uleb128 0x56
+	.uleb128 0x44
+	.8byte	.LBB75
+	.8byte	.LBE75-.LBB75
+	.4byte	0x2a71
+	.uleb128 0x5a
 	.string	"__v"
 	.byte	0x1
-	.byte	0xae
+	.byte	0xec
 	.4byte	0x94
-	.4byte	.LLST22
+	.4byte	.LLST37
 	.byte	0
-	.uleb128 0x3f
-	.8byte	.LBB67
-	.8byte	.LBE67-.LBB67
-	.4byte	0x28cc
-	.uleb128 0x56
+	.uleb128 0x44
+	.8byte	.LBB76
+	.8byte	.LBE76-.LBB76
+	.4byte	0x2a96
+	.uleb128 0x5a
 	.string	"__v"
 	.byte	0x1
-	.byte	0xaf
+	.byte	0xed
 	.4byte	0x94
-	.4byte	.LLST23
-	.byte	0
-	.uleb128 0x3f
-	.8byte	.LBB64
-	.8byte	.LBE64-.LBB64
-	.4byte	0x28f1
-	.uleb128 0x56
-	.string	"__v"
-	.byte	0x1
-	.byte	0xbb
-	.4byte	0xa3
-	.4byte	.LLST20
+	.4byte	.LLST38
 	.byte	0
-	.uleb128 0x3f
-	.8byte	.LBB65
-	.8byte	.LBE65-.LBB65
-	.4byte	0x2916
-	.uleb128 0x56
+	.uleb128 0x49
+	.4byte	.Ldebug_ranges0+0x30
+	.4byte	0x2aaf
+	.uleb128 0x5a
 	.string	"__v"
 	.byte	0x1
-	.byte	0xbc
+	.byte	0xf9
 	.4byte	0xa3
-	.4byte	.LLST21
+	.4byte	.LLST36
 	.byte	0
-	.uleb128 0x5c
-	.4byte	0x2b97
-	.8byte	.LBB53
-	.8byte	.LBE53-.LBB53
+	.uleb128 0x60
+	.4byte	0x2d41
+	.8byte	.LBB62
+	.8byte	.LBE62-.LBB62
 	.byte	0x1
-	.byte	0x95
-	.4byte	0x2a45
+	.byte	0xd3
+	.4byte	0x2bde
 	.uleb128 0x3a
-	.4byte	0x2bb2
-	.4byte	.LLST15
+	.4byte	0x2d5c
+	.4byte	.LLST31
 	.uleb128 0x3a
-	.4byte	0x2ba7
-	.4byte	.LLST16
-	.uleb128 0x47
-	.8byte	.LBB54
-	.8byte	.LBE54-.LBB54
-	.uleb128 0x3c
-	.4byte	0x2bbd
-	.4byte	.LLST17
-	.uleb128 0x3e
-	.4byte	0x2bc8
-	.uleb128 0x3f
-	.8byte	.LBB55
-	.8byte	.LBE55-.LBB55
-	.4byte	0x2981
+	.4byte	0x2d51
+	.4byte	.LLST32
+	.uleb128 0x4c
+	.8byte	.LBB63
+	.8byte	.LBE63-.LBB63
 	.uleb128 0x41
-	.4byte	0x2bda
+	.4byte	0x2d67
+	.4byte	.LLST33
+	.uleb128 0x43
+	.4byte	0x2d72
+	.uleb128 0x44
+	.8byte	.LBB64
+	.8byte	.LBE64-.LBB64
+	.4byte	0x2b1a
+	.uleb128 0x46
+	.4byte	0x2d84
 	.sleb128 -16776704
 	.byte	0
-	.uleb128 0x3f
-	.8byte	.LBB56
-	.8byte	.LBE56-.LBB56
-	.4byte	0x299f
-	.uleb128 0x41
-	.4byte	0x2beb
+	.uleb128 0x44
+	.8byte	.LBB65
+	.8byte	.LBE65-.LBB65
+	.4byte	0x2b38
+	.uleb128 0x46
+	.4byte	0x2d95
 	.sleb128 -65535
 	.byte	0
-	.uleb128 0x3f
-	.8byte	.LBB57
-	.8byte	.LBE57-.LBB57
-	.4byte	0x29bb
-	.uleb128 0x42
-	.4byte	0x2bfc
+	.uleb128 0x44
+	.8byte	.LBB66
+	.8byte	.LBE66-.LBB66
+	.4byte	0x2b54
+	.uleb128 0x47
+	.4byte	0x2da6
 	.byte	0xfa
 	.byte	0
-	.uleb128 0x3f
-	.8byte	.LBB58
-	.8byte	.LBE58-.LBB58
-	.4byte	0x29d7
-	.uleb128 0x42
-	.4byte	0x2c0d
+	.uleb128 0x44
+	.8byte	.LBB67
+	.8byte	.LBE67-.LBB67
+	.4byte	0x2b70
+	.uleb128 0x47
+	.4byte	0x2db7
 	.byte	0
 	.byte	0
-	.uleb128 0x3f
-	.8byte	.LBB59
-	.8byte	.LBE59-.LBB59
-	.4byte	0x29f6
-	.uleb128 0x40
-	.4byte	0x2c2b
+	.uleb128 0x44
+	.8byte	.LBB68
+	.8byte	.LBE68-.LBB68
+	.4byte	0x2b8f
+	.uleb128 0x45
+	.4byte	0x2dd5
 	.4byte	0x10001
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL32
-	.4byte	0x2d92
-	.4byte	0x2a1b
+	.8byte	.LVL62
+	.4byte	0x328e
+	.4byte	0x2bb4
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -6514,15 +6957,15 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x51
 	.uleb128 0x1
 	.byte	0x32
-	.uleb128 0x49
-	.4byte	0x2cdc
+	.uleb128 0x4f
+	.4byte	0x2e86
 	.uleb128 0x2
 	.byte	0x83
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL34
-	.4byte	0x2eac
+	.8byte	.LVL64
+	.4byte	0x33a8
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -6538,66 +6981,66 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x5c
-	.4byte	0x2d3e
-	.8byte	.LBB68
-	.8byte	.LBE68-.LBB68
-	.byte	0x1
-	.byte	0xb1
-	.4byte	0x2a97
-	.uleb128 0x3a
-	.4byte	0x2d59
-	.4byte	.LLST12
-	.uleb128 0x3a
-	.4byte	0x2d4e
-	.4byte	.LLST25
-	.uleb128 0x47
-	.8byte	.LBB69
-	.8byte	.LBE69-.LBB69
-	.uleb128 0x3c
-	.4byte	0x2d64
-	.4byte	.LLST26
-	.uleb128 0x3c
-	.4byte	0x2d6d
-	.4byte	.LLST27
+	.uleb128 0x60
+	.4byte	0x2ee8
+	.8byte	.LBB77
+	.8byte	.LBE77-.LBB77
+	.byte	0x1
+	.byte	0xef
+	.4byte	0x2c30
+	.uleb128 0x3a
+	.4byte	0x2f03
+	.4byte	.LLST28
+	.uleb128 0x3a
+	.4byte	0x2ef8
+	.4byte	.LLST40
+	.uleb128 0x4c
+	.8byte	.LBB78
+	.8byte	.LBE78-.LBB78
+	.uleb128 0x41
+	.4byte	0x2f0e
+	.4byte	.LLST41
+	.uleb128 0x41
+	.4byte	0x2f17
+	.4byte	.LLST42
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL22
-	.4byte	0x2e7f
-	.4byte	0x2ab0
+	.8byte	.LVL51
+	.4byte	0x337b
+	.4byte	0x2c48
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL25
-	.4byte	0x2ea1
-	.4byte	0x2ac7
+	.8byte	.LVL54
+	.4byte	0x33b3
+	.4byte	0x2c60
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x1
-	.byte	0x3a
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
 	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL26
-	.4byte	0x2ea1
-	.4byte	0x2ade
+	.uleb128 0x4e
+	.8byte	.LVL57
+	.4byte	0x2c74
 	.uleb128 0x35
 	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x3a
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL36
-	.4byte	0x2ea1
-	.4byte	0x2af6
+	.8byte	.LVL66
+	.4byte	0x339d
+	.4byte	0x2c8c
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -6606,9 +7049,9 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x32
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL39
-	.4byte	0x2eac
-	.4byte	0x2b15
+	.8byte	.LVL69
+	.4byte	0x33a8
+	.4byte	0x2cab
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -6617,9 +7060,9 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.8byte	.LC4
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL47
-	.4byte	0x2d92
-	.4byte	0x2b3a
+	.8byte	.LVL77
+	.4byte	0x328e
+	.4byte	0x2cd0
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -6631,16 +7074,16 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x51
 	.uleb128 0x1
 	.byte	0x34
-	.uleb128 0x49
-	.4byte	0x2cdc
+	.uleb128 0x4f
+	.4byte	0x2e86
 	.uleb128 0x2
 	.byte	0x83
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL50
-	.4byte	0x2eac
-	.4byte	0x2b66
+	.8byte	.LVL80
+	.4byte	0x33a8
+	.4byte	0x2cfc
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -6654,9 +7097,19 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x3
 	.8byte	.LANCHOR2
 	.byte	0
+	.uleb128 0x4e
+	.8byte	.LVL81
+	.4byte	0x2d10
+	.uleb128 0x35
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL64
-	.4byte	0x2eac
+	.8byte	.LVL94
+	.4byte	0x33a8
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -6666,300 +7119,600 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0
 	.byte	0
 	.uleb128 0xa
-	.4byte	0xd8
-	.4byte	0x2b92
+	.4byte	0xe3
+	.4byte	0x2d3c
 	.uleb128 0x11
-	.4byte	0xc4
+	.4byte	0xcf
 	.byte	0x18
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x2b82
-	.uleb128 0x4a
-	.4byte	.LASF400
+	.4byte	0x2d2c
+	.uleb128 0x61
+	.4byte	.LASF434
 	.byte	0x1
-	.byte	0x6f
+	.byte	0x9e
 	.4byte	0x54
 	.byte	0x1
-	.4byte	0x2c38
-	.uleb128 0x4b
+	.4byte	0x2de2
+	.uleb128 0x62
 	.string	"otp"
 	.byte	0x1
-	.byte	0x6f
-	.4byte	0x1705
-	.uleb128 0x4c
-	.4byte	.LASF401
+	.byte	0x9e
+	.4byte	0x1952
+	.uleb128 0x63
+	.4byte	.LASF262
 	.byte	0x1
-	.byte	0x70
-	.4byte	0x12e
-	.uleb128 0x4d
+	.byte	0x9f
+	.4byte	0x139
+	.uleb128 0x64
 	.string	"ret"
 	.byte	0x1
-	.byte	0x72
+	.byte	0xa1
 	.4byte	0x54
-	.uleb128 0x4e
-	.4byte	.LASF395
-	.4byte	0x26d7
-	.4byte	.LASF400
-	.uleb128 0x50
-	.4byte	0x2be6
-	.uleb128 0x4d
+	.uleb128 0x53
+	.4byte	.LASF430
+	.4byte	0x2901
+	.4byte	.LASF434
+	.uleb128 0x55
+	.4byte	0x2d90
+	.uleb128 0x64
 	.string	"__v"
 	.byte	0x1
-	.byte	0x74
+	.byte	0xa3
 	.4byte	0xa3
 	.byte	0
-	.uleb128 0x50
-	.4byte	0x2bf7
-	.uleb128 0x4d
+	.uleb128 0x55
+	.4byte	0x2da1
+	.uleb128 0x64
+	.string	"__v"
+	.byte	0x1
+	.byte	0xa4
+	.4byte	0xa3
+	.byte	0
+	.uleb128 0x55
+	.4byte	0x2db2
+	.uleb128 0x64
+	.string	"__v"
+	.byte	0x1
+	.byte	0xa5
+	.4byte	0xa3
+	.byte	0
+	.uleb128 0x55
+	.4byte	0x2dc3
+	.uleb128 0x64
+	.string	"__v"
+	.byte	0x1
+	.byte	0xa7
+	.4byte	0xa3
+	.byte	0
+	.uleb128 0x55
+	.4byte	0x2dd4
+	.uleb128 0x64
+	.string	"__v"
+	.byte	0x1
+	.byte	0xa9
+	.4byte	0xa3
+	.byte	0
+	.uleb128 0x56
+	.uleb128 0x64
+	.string	"__v"
+	.byte	0x1
+	.byte	0xab
+	.4byte	0xa3
+	.byte	0
+	.byte	0
+	.uleb128 0x61
+	.4byte	.LASF435
+	.byte	0x1
+	.byte	0x88
+	.4byte	0x54
+	.byte	0x1
+	.4byte	0x2e2c
+	.uleb128 0x62
+	.string	"otp"
+	.byte	0x1
+	.byte	0x88
+	.4byte	0x1952
+	.uleb128 0x65
+	.4byte	.LASF436
+	.byte	0x1
+	.byte	0x8a
+	.4byte	0x54
+	.uleb128 0x65
+	.4byte	.LASF427
+	.byte	0x1
+	.byte	0x8b
+	.4byte	0x54
+	.uleb128 0x64
+	.string	"ret"
+	.byte	0x1
+	.byte	0x8b
+	.4byte	0x54
+	.uleb128 0x56
+	.uleb128 0x64
 	.string	"__v"
 	.byte	0x1
+	.byte	0x8e
+	.4byte	0xa3
+	.byte	0
+	.byte	0
+	.uleb128 0x61
+	.4byte	.LASF437
+	.byte	0x1
+	.byte	0x72
+	.4byte	0x54
+	.byte	0x1
+	.4byte	0x2e76
+	.uleb128 0x62
+	.string	"otp"
+	.byte	0x1
+	.byte	0x72
+	.4byte	0x1952
+	.uleb128 0x65
+	.4byte	.LASF436
+	.byte	0x1
+	.byte	0x74
+	.4byte	0x54
+	.uleb128 0x65
+	.4byte	.LASF427
+	.byte	0x1
+	.byte	0x75
+	.4byte	0x54
+	.uleb128 0x64
+	.string	"ret"
+	.byte	0x1
 	.byte	0x75
+	.4byte	0x54
+	.uleb128 0x56
+	.uleb128 0x64
+	.string	"__v"
+	.byte	0x1
+	.byte	0x78
 	.4byte	0xa3
 	.byte	0
-	.uleb128 0x50
-	.4byte	0x2c08
-	.uleb128 0x4d
+	.byte	0
+	.uleb128 0x61
+	.4byte	.LASF438
+	.byte	0x1
+	.byte	0x5e
+	.4byte	0x54
+	.byte	0x1
+	.4byte	0x2ed3
+	.uleb128 0x62
+	.string	"otp"
+	.byte	0x1
+	.byte	0x5e
+	.4byte	0x1952
+	.uleb128 0x63
+	.4byte	.LASF439
+	.byte	0x1
+	.byte	0x5f
+	.4byte	0xa3
+	.uleb128 0x65
+	.4byte	.LASF436
+	.byte	0x1
+	.byte	0x61
+	.4byte	0x54
+	.uleb128 0x53
+	.4byte	.LASF430
+	.4byte	0x2ee3
+	.4byte	.LASF438
+	.uleb128 0x55
+	.4byte	0x2ec5
+	.uleb128 0x64
 	.string	"__v"
 	.byte	0x1
-	.byte	0x76
+	.byte	0x63
 	.4byte	0xa3
 	.byte	0
-	.uleb128 0x50
-	.4byte	0x2c19
-	.uleb128 0x4d
+	.uleb128 0x56
+	.uleb128 0x64
+	.string	"__v"
+	.byte	0x1
+	.byte	0x6d
+	.4byte	0xa3
+	.byte	0
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xe3
+	.4byte	0x2ee3
+	.uleb128 0x11
+	.4byte	0xcf
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x2ed3
+	.uleb128 0x61
+	.4byte	.LASF440
+	.byte	0x1
+	.byte	0x4e
+	.4byte	0x54
+	.byte	0x1
+	.4byte	0x2f22
+	.uleb128 0x63
+	.4byte	.LASF386
+	.byte	0x1
+	.byte	0x4e
+	.4byte	0x94
+	.uleb128 0x63
+	.4byte	.LASF433
+	.byte	0x1
+	.byte	0x4e
+	.4byte	0x94
+	.uleb128 0x64
+	.string	"d"
+	.byte	0x1
+	.byte	0x50
+	.4byte	0x17d6
+	.uleb128 0x64
+	.string	"dq"
+	.byte	0x1
+	.byte	0x50
+	.4byte	0x17d6
+	.byte	0
+	.uleb128 0x66
+	.4byte	.LASF443
+	.byte	0x1
+	.byte	0x47
+	.8byte	.LFB269
+	.8byte	.LFE269-.LFB269
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2fb1
+	.uleb128 0x59
+	.4byte	.LASF441
+	.byte	0x1
+	.byte	0x47
+	.4byte	0x1751
+	.4byte	.LLST10
+	.uleb128 0x67
+	.4byte	.LASF442
+	.byte	0x1
+	.byte	0x48
+	.4byte	0x3b
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x59
+	.4byte	.LASF426
+	.byte	0x1
+	.byte	0x48
+	.4byte	0x54
+	.4byte	.LLST11
+	.uleb128 0x44
+	.8byte	.LBB32
+	.8byte	.LBE32-.LBB32
+	.4byte	0x2f8f
+	.uleb128 0x5f
+	.string	"__v"
+	.byte	0x1
+	.byte	0x4a
+	.4byte	0xa3
+	.4byte	0x8000000
+	.byte	0
+	.uleb128 0x4c
+	.8byte	.LBB33
+	.8byte	.LBE33-.LBB33
+	.uleb128 0x5f
 	.string	"__v"
 	.byte	0x1
-	.byte	0x78
-	.4byte	0xa3
-	.byte	0
-	.uleb128 0x50
-	.4byte	0x2c2a
-	.uleb128 0x4d
+	.byte	0x4b
+	.4byte	0xa3
+	.4byte	0x6000000
+	.byte	0
+	.byte	0
+	.uleb128 0x66
+	.4byte	.LASF444
+	.byte	0x1
+	.byte	0x40
+	.8byte	.LFB268
+	.8byte	.LFE268-.LFB268
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3040
+	.uleb128 0x59
+	.4byte	.LASF441
+	.byte	0x1
+	.byte	0x40
+	.4byte	0x1751
+	.4byte	.LLST8
+	.uleb128 0x67
+	.4byte	.LASF442
+	.byte	0x1
+	.byte	0x41
+	.4byte	0x3b
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x59
+	.4byte	.LASF426
+	.byte	0x1
+	.byte	0x41
+	.4byte	0x54
+	.4byte	.LLST9
+	.uleb128 0x44
+	.8byte	.LBB30
+	.8byte	.LBE30-.LBB30
+	.4byte	0x301e
+	.uleb128 0x5f
 	.string	"__v"
 	.byte	0x1
-	.byte	0x7a
+	.byte	0x43
 	.4byte	0xa3
+	.4byte	0x8000800
 	.byte	0
-	.uleb128 0x52
-	.uleb128 0x4d
+	.uleb128 0x4c
+	.8byte	.LBB31
+	.8byte	.LBE31-.LBB31
+	.uleb128 0x5f
 	.string	"__v"
 	.byte	0x1
-	.byte	0x7c
+	.byte	0x44
 	.4byte	0xa3
+	.4byte	0x6000400
 	.byte	0
 	.byte	0
-	.uleb128 0x4a
-	.4byte	.LASF402
-	.byte	0x1
-	.byte	0x59
-	.4byte	0x54
+	.uleb128 0x66
+	.4byte	.LASF445
 	.byte	0x1
-	.4byte	0x2c82
-	.uleb128 0x4b
-	.string	"otp"
+	.byte	0x39
+	.8byte	.LFB267
+	.8byte	.LFE267-.LFB267
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x30cc
+	.uleb128 0x59
+	.4byte	.LASF441
 	.byte	0x1
-	.byte	0x59
-	.4byte	0x1705
-	.uleb128 0x5d
-	.4byte	.LASF403
+	.byte	0x39
+	.4byte	0x1751
+	.4byte	.LLST6
+	.uleb128 0x67
+	.4byte	.LASF442
 	.byte	0x1
-	.byte	0x5b
-	.4byte	0x54
-	.uleb128 0x5d
-	.4byte	.LASF394
+	.byte	0x3a
+	.4byte	0x3b
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x59
+	.4byte	.LASF426
 	.byte	0x1
-	.byte	0x5c
+	.byte	0x3a
 	.4byte	0x54
-	.uleb128 0x4d
-	.string	"ret"
+	.4byte	.LLST7
+	.uleb128 0x44
+	.8byte	.LBB28
+	.8byte	.LBE28-.LBB28
+	.4byte	0x30ad
+	.uleb128 0x5f
+	.string	"__v"
 	.byte	0x1
-	.byte	0x5c
-	.4byte	0x54
-	.uleb128 0x52
-	.uleb128 0x4d
+	.byte	0x3c
+	.4byte	0xa3
+	.4byte	0x40000
+	.byte	0
+	.uleb128 0x4c
+	.8byte	.LBB29
+	.8byte	.LBE29-.LBB29
+	.uleb128 0x68
 	.string	"__v"
 	.byte	0x1
-	.byte	0x5f
+	.byte	0x3d
 	.4byte	0xa3
+	.sleb128 -1
 	.byte	0
 	.byte	0
-	.uleb128 0x4a
-	.4byte	.LASF404
+	.uleb128 0x66
+	.4byte	.LASF446
 	.byte	0x1
-	.byte	0x43
-	.4byte	0x54
-	.byte	0x1
-	.4byte	0x2ccc
-	.uleb128 0x4b
-	.string	"otp"
+	.byte	0x32
+	.8byte	.LFB266
+	.8byte	.LFE266-.LFB266
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x315a
+	.uleb128 0x67
+	.4byte	.LASF441
 	.byte	0x1
-	.byte	0x43
-	.4byte	0x1705
-	.uleb128 0x5d
-	.4byte	.LASF403
+	.byte	0x32
+	.4byte	0x1751
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x59
+	.4byte	.LASF442
 	.byte	0x1
-	.byte	0x45
-	.4byte	0x54
-	.uleb128 0x5d
-	.4byte	.LASF394
+	.byte	0x33
+	.4byte	0x3b
+	.4byte	.LLST4
+	.uleb128 0x59
+	.4byte	.LASF426
 	.byte	0x1
-	.byte	0x46
+	.byte	0x33
 	.4byte	0x54
-	.uleb128 0x4d
-	.string	"ret"
+	.4byte	.LLST5
+	.uleb128 0x44
+	.8byte	.LBB26
+	.8byte	.LBE26-.LBB26
+	.4byte	0x3138
+	.uleb128 0x68
+	.string	"__v"
 	.byte	0x1
-	.byte	0x46
-	.4byte	0x54
-	.uleb128 0x52
-	.uleb128 0x4d
+	.byte	0x35
+	.4byte	0xa3
+	.sleb128 -65536
+	.byte	0
+	.uleb128 0x4c
+	.8byte	.LBB27
+	.8byte	.LBE27-.LBB27
+	.uleb128 0x5f
 	.string	"__v"
 	.byte	0x1
-	.byte	0x49
+	.byte	0x36
 	.4byte	0xa3
+	.4byte	0x40004
 	.byte	0
 	.byte	0
-	.uleb128 0x4a
-	.4byte	.LASF405
-	.byte	0x1
-	.byte	0x2f
-	.4byte	0x54
+	.uleb128 0x66
+	.4byte	.LASF447
 	.byte	0x1
-	.4byte	0x2d29
-	.uleb128 0x4b
-	.string	"otp"
+	.byte	0x2b
+	.8byte	.LFB265
+	.8byte	.LFE265-.LFB265
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x31e6
+	.uleb128 0x59
+	.4byte	.LASF441
 	.byte	0x1
-	.byte	0x2f
-	.4byte	0x1705
-	.uleb128 0x4c
-	.4byte	.LASF406
+	.byte	0x2b
+	.4byte	0x1751
+	.4byte	.LLST2
+	.uleb128 0x67
+	.4byte	.LASF442
 	.byte	0x1
-	.byte	0x30
-	.4byte	0xa3
-	.uleb128 0x5d
-	.4byte	.LASF403
+	.byte	0x2c
+	.4byte	0x3b
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x59
+	.4byte	.LASF426
 	.byte	0x1
-	.byte	0x32
+	.byte	0x2c
 	.4byte	0x54
-	.uleb128 0x4e
-	.4byte	.LASF395
-	.4byte	0x2d39
-	.4byte	.LASF405
-	.uleb128 0x50
-	.4byte	0x2d1b
-	.uleb128 0x4d
+	.4byte	.LLST3
+	.uleb128 0x44
+	.8byte	.LBB24
+	.8byte	.LBE24-.LBB24
+	.4byte	0x31c7
+	.uleb128 0x5f
 	.string	"__v"
 	.byte	0x1
-	.byte	0x34
+	.byte	0x2e
 	.4byte	0xa3
+	.4byte	0x20000000
 	.byte	0
-	.uleb128 0x52
-	.uleb128 0x4d
+	.uleb128 0x4c
+	.8byte	.LBB25
+	.8byte	.LBE25-.LBB25
+	.uleb128 0x68
 	.string	"__v"
 	.byte	0x1
-	.byte	0x3e
+	.byte	0x2f
 	.4byte	0xa3
+	.sleb128 -1
 	.byte	0
 	.byte	0
-	.uleb128 0xa
-	.4byte	0xd8
-	.4byte	0x2d39
-	.uleb128 0x11
-	.4byte	0xc4
-	.byte	0x1f
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x2d29
-	.uleb128 0x4a
-	.4byte	.LASF407
+	.uleb128 0x66
+	.4byte	.LASF448
 	.byte	0x1
-	.byte	0x1f
-	.4byte	0x54
+	.byte	0x24
+	.8byte	.LFB264
+	.8byte	.LFE264-.LFB264
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3274
+	.uleb128 0x67
+	.4byte	.LASF441
 	.byte	0x1
-	.4byte	0x2d78
-	.uleb128 0x4c
-	.4byte	.LASF367
+	.byte	0x24
+	.4byte	0x1751
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x59
+	.4byte	.LASF442
 	.byte	0x1
-	.byte	0x1f
-	.4byte	0x94
-	.uleb128 0x4c
-	.4byte	.LASF398
+	.byte	0x25
+	.4byte	0x3b
+	.4byte	.LLST0
+	.uleb128 0x59
+	.4byte	.LASF426
 	.byte	0x1
-	.byte	0x1f
-	.4byte	0x94
-	.uleb128 0x4d
-	.string	"d"
+	.byte	0x25
+	.4byte	0x54
+	.4byte	.LLST1
+	.uleb128 0x44
+	.8byte	.LBB22
+	.8byte	.LBE22-.LBB22
+	.4byte	0x3252
+	.uleb128 0x68
+	.string	"__v"
 	.byte	0x1
-	.byte	0x21
-	.4byte	0x15cb
-	.uleb128 0x4d
-	.string	"dq"
+	.byte	0x27
+	.4byte	0xa3
+	.sleb128 -65536
+	.byte	0
+	.uleb128 0x4c
+	.8byte	.LBB23
+	.8byte	.LBE23-.LBB23
+	.uleb128 0x5f
+	.string	"__v"
 	.byte	0x1
-	.byte	0x21
-	.4byte	0x15cb
+	.byte	0x28
+	.4byte	0xa3
+	.4byte	0x20002000
 	.byte	0
-	.uleb128 0x5e
-	.4byte	.LASF419
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF462
 	.byte	0x1a
 	.2byte	0x36f
 	.byte	0x3
-	.4byte	0x2d92
-	.uleb128 0x5f
+	.4byte	0x328e
+	.uleb128 0x3c
 	.string	"ptr"
 	.byte	0x1a
 	.2byte	0x36f
-	.4byte	0x121
+	.4byte	0x12c
 	.byte	0
-	.uleb128 0x60
-	.4byte	0x2ccc
-	.8byte	.LFB270
-	.8byte	.LFE270-.LFB270
+	.uleb128 0x6a
+	.4byte	0x2e76
+	.8byte	.LFB282
+	.8byte	.LFE282-.LFB282
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2e7f
+	.4byte	0x337b
 	.uleb128 0x3a
-	.4byte	0x2ce7
-	.4byte	.LLST2
-	.uleb128 0x46
-	.4byte	0x2cdc
-	.uleb128 0x3c
-	.4byte	0x2cf2
-	.4byte	.LLST3
-	.uleb128 0x3e
-	.4byte	0x2cfd
-	.uleb128 0x3f
-	.8byte	.LBB26
-	.8byte	.LBE26-.LBB26
-	.4byte	0x2de8
-	.uleb128 0x3c
-	.4byte	0x2d0f
-	.4byte	.LLST4
+	.4byte	0x2e91
+	.4byte	.LLST17
+	.uleb128 0x4b
+	.4byte	0x2e86
+	.uleb128 0x41
+	.4byte	0x2e9c
+	.4byte	.LLST18
+	.uleb128 0x43
+	.4byte	0x2ea7
+	.uleb128 0x44
+	.8byte	.LBB42
+	.8byte	.LBE42-.LBB42
+	.4byte	0x32e4
+	.uleb128 0x41
+	.4byte	0x2eb9
+	.4byte	.LLST19
 	.byte	0
-	.uleb128 0x3f
-	.8byte	.LBB27
-	.8byte	.LBE27-.LBB27
-	.4byte	0x2e07
-	.uleb128 0x3c
-	.4byte	0x2d1c
-	.4byte	.LLST5
+	.uleb128 0x44
+	.8byte	.LBB43
+	.8byte	.LBE43-.LBB43
+	.4byte	0x3303
+	.uleb128 0x41
+	.4byte	0x2ec6
+	.4byte	.LLST20
 	.byte	0
-	.uleb128 0x3f
-	.8byte	.LBB28
-	.8byte	.LBE28-.LBB28
-	.4byte	0x2e6b
-	.uleb128 0x46
-	.4byte	0x2ce7
-	.uleb128 0x46
-	.4byte	0x2cdc
-	.uleb128 0x47
-	.8byte	.LBB29
-	.8byte	.LBE29-.LBB29
-	.uleb128 0x3e
-	.4byte	0x2cf2
-	.uleb128 0x3e
-	.4byte	0x2cfd
+	.uleb128 0x44
+	.8byte	.LBB44
+	.8byte	.LBE44-.LBB44
+	.4byte	0x3367
+	.uleb128 0x4b
+	.4byte	0x2e91
+	.uleb128 0x4b
+	.4byte	0x2e86
+	.uleb128 0x4c
+	.8byte	.LBB45
+	.8byte	.LBE45-.LBB45
+	.uleb128 0x43
+	.4byte	0x2e9c
+	.uleb128 0x43
+	.4byte	0x2ea7
 	.uleb128 0x36
-	.8byte	.LVL18
-	.4byte	0x2eac
+	.8byte	.LVL47
+	.4byte	0x33a8
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -6976,8 +7729,8 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL15
-	.4byte	0x2ea1
+	.8byte	.LVL44
+	.4byte	0x339d
 	.uleb128 0x35
 	.uleb128 0x1
 	.byte	0x50
@@ -6985,34 +7738,39 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x31
 	.byte	0
 	.byte	0
-	.uleb128 0x61
-	.4byte	.LASF408
-	.4byte	.LASF408
+	.uleb128 0x6b
+	.4byte	.LASF449
+	.4byte	.LASF449
 	.byte	0x8
 	.2byte	0x112
-	.uleb128 0x62
-	.4byte	.LASF409
-	.4byte	.LASF409
-	.byte	0x1f
-	.byte	0x7b
-	.uleb128 0x62
-	.4byte	.LASF410
-	.4byte	.LASF410
-	.byte	0x1f
-	.byte	0x38
-	.uleb128 0x62
-	.4byte	.LASF411
-	.4byte	.LASF411
+	.uleb128 0x6c
+	.4byte	.LASF450
+	.4byte	.LASF450
 	.byte	0x20
-	.byte	0xb
-	.uleb128 0x62
-	.4byte	.LASF412
-	.4byte	.LASF412
+	.byte	0x85
+	.uleb128 0x6c
+	.4byte	.LASF451
+	.4byte	.LASF451
+	.byte	0x20
+	.byte	0x38
+	.uleb128 0x6c
+	.4byte	.LASF452
+	.4byte	.LASF452
 	.byte	0x21
+	.byte	0xb
+	.uleb128 0x6c
+	.4byte	.LASF453
+	.4byte	.LASF453
+	.byte	0x22
 	.byte	0x13
-	.uleb128 0x61
-	.4byte	.LASF413
-	.4byte	.LASF413
+	.uleb128 0x6b
+	.4byte	.LASF454
+	.4byte	.LASF454
+	.byte	0x8
+	.2byte	0x16b
+	.uleb128 0x6b
+	.4byte	.LASF455
+	.4byte	.LASF455
 	.byte	0x1a
 	.2byte	0x393
 	.byte	0
@@ -7262,21 +8020,6 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0
 	.byte	0
 	.uleb128 0x16
-	.uleb128 0xd
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x38
-	.uleb128 0x5
-	.byte	0
-	.byte	0
-	.uleb128 0x17
 	.uleb128 0x21
 	.byte	0
 	.uleb128 0x49
@@ -7285,16 +8028,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x5
 	.byte	0
 	.byte	0
-	.uleb128 0x18
-	.uleb128 0x13
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3c
-	.uleb128 0x19
-	.byte	0
-	.byte	0
-	.uleb128 0x19
+	.uleb128 0x17
 	.uleb128 0x13
 	.byte	0x1
 	.uleb128 0x3
@@ -7309,7 +8043,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x1a
+	.uleb128 0x18
 	.uleb128 0x13
 	.byte	0x1
 	.uleb128 0x3
@@ -7324,7 +8058,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x1b
+	.uleb128 0x19
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7341,7 +8075,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x1c
+	.uleb128 0x1a
 	.uleb128 0x13
 	.byte	0x1
 	.uleb128 0xb
@@ -7354,7 +8088,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x1d
+	.uleb128 0x1b
 	.uleb128 0x13
 	.byte	0x1
 	.uleb128 0x3
@@ -7369,7 +8103,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x1e
+	.uleb128 0x1c
 	.uleb128 0xd
 	.byte	0
 	.uleb128 0x3
@@ -7384,7 +8118,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x1f
+	.uleb128 0x1d
 	.uleb128 0x16
 	.byte	0
 	.uleb128 0x3
@@ -7397,7 +8131,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x20
+	.uleb128 0x1e
 	.uleb128 0xd
 	.byte	0
 	.uleb128 0x3
@@ -7412,7 +8146,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x21
+	.uleb128 0x1f
 	.uleb128 0x13
 	.byte	0x1
 	.uleb128 0x3
@@ -7427,7 +8161,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x22
+	.uleb128 0x20
 	.uleb128 0xd
 	.byte	0
 	.uleb128 0x3
@@ -7442,7 +8176,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x5
 	.byte	0
 	.byte	0
-	.uleb128 0x23
+	.uleb128 0x21
 	.uleb128 0xd
 	.byte	0
 	.uleb128 0x3
@@ -7457,7 +8191,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x5
 	.byte	0
 	.byte	0
-	.uleb128 0x24
+	.uleb128 0x22
 	.uleb128 0x4
 	.byte	0x1
 	.uleb128 0x3
@@ -7474,7 +8208,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x25
+	.uleb128 0x23
 	.uleb128 0x28
 	.byte	0
 	.uleb128 0x3
@@ -7483,7 +8217,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x26
+	.uleb128 0x24
 	.uleb128 0x28
 	.byte	0
 	.uleb128 0x3
@@ -7492,7 +8226,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0xd
 	.byte	0
 	.byte	0
-	.uleb128 0x27
+	.uleb128 0x25
 	.uleb128 0x4
 	.byte	0x1
 	.uleb128 0xb
@@ -7507,13 +8241,31 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x28
+	.uleb128 0x26
+	.uleb128 0x13
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3c
+	.uleb128 0x19
+	.byte	0
+	.byte	0
+	.uleb128 0x27
 	.uleb128 0x35
 	.byte	0
 	.uleb128 0x49
 	.uleb128 0x13
 	.byte	0
 	.byte	0
+	.uleb128 0x28
+	.uleb128 0x15
+	.byte	0x1
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
 	.uleb128 0x29
 	.uleb128 0x4
 	.byte	0x1
@@ -7736,14 +8488,14 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x49
 	.uleb128 0x13
 	.uleb128 0x2
-	.uleb128 0x17
+	.uleb128 0x18
 	.byte	0
 	.byte	0
 	.uleb128 0x38
-	.uleb128 0x34
+	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
-	.uleb128 0xe
+	.uleb128 0x8
 	.uleb128 0x3a
 	.uleb128 0xb
 	.uleb128 0x3b
@@ -7751,7 +8503,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x49
 	.uleb128 0x13
 	.uleb128 0x2
-	.uleb128 0x17
+	.uleb128 0x18
 	.byte	0
 	.byte	0
 	.uleb128 0x39
@@ -7759,35 +8511,112 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x1
 	.uleb128 0x31
 	.uleb128 0x13
-	.uleb128 0x52
+	.uleb128 0x11
 	.uleb128 0x1
-	.uleb128 0x55
-	.uleb128 0x17
+	.uleb128 0x12
+	.uleb128 0x7
 	.uleb128 0x58
 	.uleb128 0xb
 	.uleb128 0x59
 	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x3a
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x3b
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x20
+	.uleb128 0xb
 	.uleb128 0x1
 	.uleb128 0x13
 	.byte	0
 	.byte	0
+	.uleb128 0x3c
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
 	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x3d
 	.uleb128 0x5
 	.byte	0
-	.uleb128 0x31
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
 	.uleb128 0x13
 	.uleb128 0x2
 	.uleb128 0x17
 	.byte	0
 	.byte	0
+	.uleb128 0x3e
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
 	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x52
+	.uleb128 0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0x5
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x40
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x55
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x41
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -7796,7 +8625,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x3d
+	.uleb128 0x42
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x31
@@ -7805,14 +8634,14 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x1
 	.byte	0
 	.byte	0
-	.uleb128 0x3e
+	.uleb128 0x43
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3f
+	.uleb128 0x44
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x11
@@ -7823,7 +8652,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x40
+	.uleb128 0x45
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -7832,7 +8661,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x6
 	.byte	0
 	.byte	0
-	.uleb128 0x41
+	.uleb128 0x46
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -7841,7 +8670,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0xd
 	.byte	0
 	.byte	0
-	.uleb128 0x42
+	.uleb128 0x47
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -7850,7 +8679,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x43
+	.uleb128 0x48
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -7859,7 +8688,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x44
+	.uleb128 0x49
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x55
@@ -7868,7 +8697,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x45
+	.uleb128 0x4a
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -7885,14 +8714,14 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x46
+	.uleb128 0x4b
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x47
+	.uleb128 0x4c
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x11
@@ -7901,7 +8730,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x7
 	.byte	0
 	.byte	0
-	.uleb128 0x48
+	.uleb128 0x4d
 	.uleb128 0x4109
 	.byte	0
 	.uleb128 0x11
@@ -7910,74 +8739,64 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x49
-	.uleb128 0x410a
-	.byte	0
-	.uleb128 0x31
-	.uleb128 0x13
-	.uleb128 0x2111
-	.uleb128 0x18
-	.byte	0
-	.byte	0
-	.uleb128 0x4a
-	.uleb128 0x2e
+	.uleb128 0x4e
+	.uleb128 0x4109
 	.byte	0x1
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x27
-	.uleb128 0x19
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x20
-	.uleb128 0xb
+	.uleb128 0x11
+	.uleb128 0x1
 	.uleb128 0x1
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4b
+	.uleb128 0x4f
+	.uleb128 0x410a
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2111
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x50
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
-	.uleb128 0x8
+	.uleb128 0xe
 	.uleb128 0x3a
 	.uleb128 0xb
 	.uleb128 0x3b
-	.uleb128 0xb
+	.uleb128 0x5
 	.uleb128 0x49
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4c
-	.uleb128 0x5
+	.uleb128 0x51
+	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
-	.uleb128 0xe
+	.uleb128 0x8
 	.uleb128 0x3a
 	.uleb128 0xb
 	.uleb128 0x3b
-	.uleb128 0xb
+	.uleb128 0x5
 	.uleb128 0x49
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4d
+	.uleb128 0x52
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
-	.uleb128 0x8
+	.uleb128 0xe
 	.uleb128 0x3a
 	.uleb128 0xb
 	.uleb128 0x3b
-	.uleb128 0xb
+	.uleb128 0x5
 	.uleb128 0x49
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4e
+	.uleb128 0x53
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7990,7 +8809,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0xe
 	.byte	0
 	.byte	0
-	.uleb128 0x4f
+	.uleb128 0x54
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x3
@@ -8001,32 +8820,19 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x5
 	.byte	0
 	.byte	0
-	.uleb128 0x50
+	.uleb128 0x55
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x1
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x51
-	.uleb128 0x34
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0x5
-	.uleb128 0x49
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x52
+	.uleb128 0x56
 	.uleb128 0xb
 	.byte	0x1
 	.byte	0
 	.byte	0
-	.uleb128 0x53
+	.uleb128 0x57
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -8051,7 +8857,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x54
+	.uleb128 0x58
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -8066,7 +8872,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x55
+	.uleb128 0x59
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -8081,7 +8887,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x56
+	.uleb128 0x5a
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -8096,7 +8902,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x57
+	.uleb128 0x5b
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -8111,7 +8917,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x58
+	.uleb128 0x5c
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -8126,7 +8932,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x59
+	.uleb128 0x5d
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -8139,7 +8945,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x5a
+	.uleb128 0x5e
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x3
@@ -8152,7 +8958,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x1
 	.byte	0
 	.byte	0
-	.uleb128 0x5b
+	.uleb128 0x5f
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -8167,7 +8973,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x6
 	.byte	0
 	.byte	0
-	.uleb128 0x5c
+	.uleb128 0x60
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -8184,7 +8990,65 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x5d
+	.uleb128 0x61
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x20
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x62
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x63
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x64
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x65
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -8197,37 +9061,79 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x5e
+	.uleb128 0x66
 	.uleb128 0x2e
 	.byte	0x1
+	.uleb128 0x3f
+	.uleb128 0x19
 	.uleb128 0x3
 	.uleb128 0xe
 	.uleb128 0x3a
 	.uleb128 0xb
 	.uleb128 0x3b
-	.uleb128 0x5
+	.uleb128 0xb
 	.uleb128 0x27
 	.uleb128 0x19
-	.uleb128 0x20
-	.uleb128 0xb
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
 	.uleb128 0x1
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x5f
+	.uleb128 0x67
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x68
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
 	.uleb128 0x8
 	.uleb128 0x3a
 	.uleb128 0xb
 	.uleb128 0x3b
-	.uleb128 0x5
+	.uleb128 0xb
 	.uleb128 0x49
 	.uleb128 0x13
+	.uleb128 0x1c
+	.uleb128 0xd
 	.byte	0
 	.byte	0
-	.uleb128 0x60
+	.uleb128 0x69
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x20
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x6a
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x31
@@ -8244,7 +9150,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x61
+	.uleb128 0x6b
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -8261,7 +9167,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.uleb128 0x5
 	.byte	0
 	.byte	0
-	.uleb128 0x62
+	.uleb128 0x6c
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -8281,17 +9187,17 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0
 	.section	.debug_loc,"",@progbits
 .Ldebug_loc0:
-.LLST0:
-	.8byte	.LVL0
-	.8byte	.LVL1-1
+.LLST15:
+	.8byte	.LVL29
+	.8byte	.LVL30-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1-1
-	.8byte	.LVL7
+	.8byte	.LVL30-1
+	.8byte	.LVL36
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL7
-	.8byte	.LFE268
+	.8byte	.LVL36
+	.8byte	.LFE280
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -8299,90 +9205,108 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST1:
-	.8byte	.LVL2
-	.8byte	.LVL3
+.LLST16:
+	.8byte	.LVL31
+	.8byte	.LVL32
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL3
-	.8byte	.LVL7
+	.8byte	.LVL32
+	.8byte	.LVL36
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST28:
-	.8byte	.LVL67
-	.8byte	.LVL68-1
+.LLST12:
+	.8byte	.LVL24
+	.8byte	.LVL25
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL68-1
-	.8byte	.LVL72
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL72
-	.8byte	.LVL76
+	.8byte	.LVL25
+	.8byte	.LFE279
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL76
-	.8byte	.LVL81
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL81
-	.8byte	.LVL82
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST13:
+	.8byte	.LVL24
+	.8byte	.LVL27
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xea
 	.byte	0x9f
-	.8byte	.LVL82
-	.8byte	.LVL84
+	.8byte	.LVL28
+	.8byte	.LFE279
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xea
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST14:
+	.8byte	.LVL26
+	.8byte	.LVL27
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST43:
+	.8byte	.LVL97
+	.8byte	.LVL98-1
 	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL84
-	.8byte	.LFE267
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
 	.byte	0x50
-	.byte	0x9f
+	.8byte	.LVL98-1
+	.8byte	.LVL105
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 224
+	.8byte	.LVL105
+	.8byte	.LVL106
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 96
+	.8byte	.LVL106
+	.8byte	.LFE277
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 224
 	.8byte	0
 	.8byte	0
-.LLST29:
-	.8byte	.LVL67
-	.8byte	.LVL68-1
+.LLST44:
+	.8byte	.LVL97
+	.8byte	.LVL98-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL68-1
-	.8byte	.LVL72
+	.8byte	.LVL98-1
+	.8byte	.LVL102
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL72
-	.8byte	.LVL76
+	.8byte	.LVL102
+	.8byte	.LVL106
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL76
-	.8byte	.LVL81
+	.8byte	.LVL106
+	.8byte	.LVL111
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL81
-	.8byte	.LVL82
+	.8byte	.LVL111
+	.8byte	.LVL112
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL82
-	.8byte	.LVL84
+	.8byte	.LVL112
+	.8byte	.LVL114
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL84
-	.8byte	.LFE267
+	.8byte	.LVL114
+	.8byte	.LFE277
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -8390,373 +9314,371 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST30:
-	.8byte	.LVL67
-	.8byte	.LVL68-1
+.LLST45:
+	.8byte	.LVL97
+	.8byte	.LVL98-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL68-1
-	.8byte	.LVL75
+	.8byte	.LVL98-1
+	.8byte	.LVL105
 	.2byte	0x3
 	.byte	0x8f
-	.sleb128 224
-	.8byte	.LVL75
-	.8byte	.LVL76
+	.sleb128 216
+	.8byte	.LVL105
+	.8byte	.LVL106
 	.2byte	0x3
 	.byte	0x8f
-	.sleb128 96
-	.8byte	.LVL76
-	.8byte	.LFE267
+	.sleb128 88
+	.8byte	.LVL106
+	.8byte	.LFE277
 	.2byte	0x3
 	.byte	0x8f
-	.sleb128 224
+	.sleb128 216
 	.8byte	0
 	.8byte	0
-.LLST31:
-	.8byte	.LVL67
-	.8byte	.LVL68-1
+.LLST46:
+	.8byte	.LVL97
+	.8byte	.LVL98-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL68-1
-	.8byte	.LVL73
+	.8byte	.LVL98-1
+	.8byte	.LVL103
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL73
-	.8byte	.LVL76
+	.8byte	.LVL103
+	.8byte	.LVL106
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x53
 	.byte	0x9f
-	.8byte	.LVL76
-	.8byte	.LFE267
+	.8byte	.LVL106
+	.8byte	.LFE277
 	.2byte	0x1
 	.byte	0x68
 	.8byte	0
 	.8byte	0
-.LLST32:
-	.8byte	.LVL69
-	.8byte	.LVL70
+.LLST47:
+	.8byte	.LVL99
+	.8byte	.LVL100
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL70
-	.8byte	.LVL74
+	.8byte	.LVL100
+	.8byte	.LVL104
 	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL76
-	.8byte	.LFE267
+	.byte	0x6c
+	.8byte	.LVL106
+	.8byte	.LFE277
 	.2byte	0x1
-	.byte	0x6b
+	.byte	0x6c
 	.8byte	0
 	.8byte	0
-.LLST33:
-	.8byte	.LVL69
-	.8byte	.LVL75
+.LLST48:
+	.8byte	.LVL99
+	.8byte	.LVL105
 	.2byte	0x3
 	.byte	0x8f
-	.sleb128 224
-	.8byte	.LVL75
-	.8byte	.LVL76
+	.sleb128 216
+	.8byte	.LVL105
+	.8byte	.LVL106
 	.2byte	0x3
 	.byte	0x8f
-	.sleb128 96
-	.8byte	.LVL76
-	.8byte	.LFE267
+	.sleb128 88
+	.8byte	.LVL106
+	.8byte	.LFE277
 	.2byte	0x3
 	.byte	0x8f
-	.sleb128 224
+	.sleb128 216
 	.8byte	0
 	.8byte	0
-.LLST34:
-	.8byte	.LVL71
-	.8byte	.LVL72
+.LLST49:
+	.8byte	.LVL101
+	.8byte	.LVL102
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL76
-	.8byte	.LVL77
+	.8byte	.LVL106
+	.8byte	.LVL107
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL77
-	.8byte	.LVL78-1
+	.8byte	.LVL107
+	.8byte	.LVL108-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL78-1
-	.8byte	.LVL80
+	.8byte	.LVL108-1
+	.8byte	.LVL110
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL82
-	.8byte	.LVL84
+	.8byte	.LVL112
+	.8byte	.LVL114
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST35:
-	.8byte	.LVL79
-	.8byte	.LVL81
+.LLST50:
+	.8byte	.LVL109
+	.8byte	.LVL111
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL81
-	.8byte	.LVL82
-	.2byte	0x7
-	.byte	0x83
-	.sleb128 0
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x1c
-	.byte	0x9f
-	.8byte	.LVL82
-	.8byte	.LVL83
+	.8byte	.LVL112
+	.8byte	.LVL113
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL86
-	.8byte	.LVL88
-	.2byte	0x7
-	.byte	0x83
-	.sleb128 0
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x1c
-	.byte	0x9f
-	.8byte	.LVL88
-	.8byte	.LVL89
-	.2byte	0x9
-	.byte	0x83
-	.sleb128 0
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x1c
-	.byte	0x23
-	.uleb128 0x1
-	.byte	0x9f
-	.8byte	.LVL89
-	.8byte	.LFE267
-	.2byte	0x7
-	.byte	0x83
-	.sleb128 0
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x1c
-	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST36:
-	.8byte	.LVL71
-	.8byte	.LVL72
+.LLST51:
+	.8byte	.LVL101
+	.8byte	.LVL102
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL76
-	.8byte	.LVL78
+	.8byte	.LVL106
+	.8byte	.LVL108
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL78
-	.8byte	.LVL79
+	.8byte	.LVL108
+	.8byte	.LVL109
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL81
-	.8byte	.LVL82
+	.8byte	.LVL111
+	.8byte	.LVL112
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL86
-	.8byte	.LVL88
+	.8byte	.LVL116
+	.8byte	.LVL121
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL90
-	.8byte	.LVL121
+	.8byte	.LVL122
+	.8byte	.LVL148
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL122
-	.8byte	.LFE267
+	.8byte	.LVL149
+	.8byte	.LFE277
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST37:
-	.8byte	.LVL87
-	.8byte	.LVL88
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL90
+.LLST52:
+	.8byte	.LVL117
 	.8byte	.LVL121
-	.2byte	0x1
-	.byte	0x6c
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 236
 	.8byte	.LVL122
-	.8byte	.LFE267
-	.2byte	0x1
-	.byte	0x6c
+	.8byte	.LVL148
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 236
+	.8byte	.LVL149
+	.8byte	.LFE277
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 236
 	.8byte	0
 	.8byte	0
-.LLST38:
-	.8byte	.LVL87
-	.8byte	.LVL88
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL90
+.LLST53:
+	.8byte	.LVL117
 	.8byte	.LVL121
 	.2byte	0x1
 	.byte	0x63
 	.8byte	.LVL122
-	.8byte	.LFE267
+	.8byte	.LVL148
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL149
+	.8byte	.LFE277
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST39:
-	.8byte	.LVL87
-	.8byte	.LVL88
-	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL90
+.LLST54:
+	.8byte	.LVL117
 	.8byte	.LVL121
 	.2byte	0x1
-	.byte	0x6b
+	.byte	0x6c
 	.8byte	.LVL122
-	.8byte	.LFE267
+	.8byte	.LVL148
 	.2byte	0x1
-	.byte	0x6b
+	.byte	0x6c
+	.8byte	.LVL149
+	.8byte	.LFE277
+	.2byte	0x1
+	.byte	0x6c
 	.8byte	0
 	.8byte	0
-.LLST40:
-	.8byte	.LVL87
-	.8byte	.LVL88
+.LLST55:
+	.8byte	.LVL117
+	.8byte	.LVL121
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 224
+	.8byte	.LVL122
+	.8byte	.LVL148
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 224
+	.8byte	.LVL149
+	.8byte	.LFE277
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 224
+	.8byte	0
+	.8byte	0
+.LLST56:
+	.8byte	.LVL117
+	.8byte	.LVL121
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL90
-	.8byte	.LVL116
+	.8byte	.LVL122
+	.8byte	.LVL145
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL116
-	.8byte	.LVL117
+	.8byte	.LVL145
+	.8byte	.LVL146
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL117
-	.8byte	.LVL121
+	.8byte	.LVL146
+	.8byte	.LVL148
 	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL122
-	.8byte	.LVL123
+	.byte	0x6b
+	.8byte	.LVL149
+	.8byte	.LVL150
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL123
-	.8byte	.LVL141
+	.8byte	.LVL150
+	.8byte	.LVL168
 	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL141
-	.8byte	.LVL142
+	.byte	0x6b
+	.8byte	.LVL168
+	.8byte	.LVL169
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL142
-	.8byte	.LVL143
+	.8byte	.LVL169
+	.8byte	.LVL170
 	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL143
-	.8byte	.LVL144
+	.byte	0x6b
+	.8byte	.LVL170
+	.8byte	.LVL171
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL144
-	.8byte	.LVL150
+	.8byte	.LVL171
+	.8byte	.LVL177
 	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL150
-	.8byte	.LVL151
+	.byte	0x6b
+	.8byte	.LVL177
+	.8byte	.LVL178
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL178
+	.8byte	.LVL179
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL179
+	.8byte	.LVL180
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL180
+	.8byte	.LVL184
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL184
+	.8byte	.LVL185
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL151
-	.8byte	.LVL152
+	.8byte	.LVL185
+	.8byte	.LVL186
 	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL152
-	.8byte	.LVL153
+	.byte	0x6b
+	.8byte	.LVL186
+	.8byte	.LVL187
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL153
-	.8byte	.LVL157
+	.8byte	.LVL187
+	.8byte	.LVL192
 	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL157
-	.8byte	.LVL158
+	.byte	0x6b
+	.8byte	.LVL192
+	.8byte	.LVL193
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL158
-	.8byte	.LVL159
+	.8byte	.LVL193
+	.8byte	.LVL194
 	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL159
-	.8byte	.LVL160
+	.byte	0x6b
+	.8byte	.LVL194
+	.8byte	.LVL195
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL160
-	.8byte	.LVL165
+	.8byte	.LVL195
+	.8byte	.LVL201
 	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL165
-	.8byte	.LVL166
+	.byte	0x6b
+	.8byte	.LVL201
+	.8byte	.LVL202
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL166
-	.8byte	.LVL167
+	.8byte	.LVL209
+	.8byte	.LVL210
 	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL167
-	.8byte	.LVL168
+	.byte	0x50
+	.8byte	.LVL210
+	.8byte	.LVL211
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL211
+	.8byte	.LVL212
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL168
-	.8byte	.LVL174
+	.8byte	.LVL212
+	.8byte	.LVL214
 	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL174
-	.8byte	.LVL175
+	.byte	0x65
+	.8byte	.LVL221
+	.8byte	.LVL222
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL182
-	.8byte	.LVL183
+	.8byte	0
+	.8byte	0
+.LLST57:
+	.8byte	.LVL119
+	.8byte	.LVL120
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL183
-	.8byte	.LVL184
+	.8byte	.LVL120
+	.8byte	.LVL121
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL184
-	.8byte	.LVL185
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL185
-	.8byte	.LVL187
+	.8byte	.LVL122
+	.8byte	.LVL148
 	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL194
-	.8byte	.LVL195
+	.byte	0x6a
+	.8byte	.LVL149
+	.8byte	.LFE277
 	.2byte	0x1
-	.byte	0x50
+	.byte	0x6a
 	.8byte	0
 	.8byte	0
-.LLST41:
-	.8byte	.LVL111
-	.8byte	.LVL113
+.LLST58:
+	.8byte	.LVL140
+	.8byte	.LVL142
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL113
-	.8byte	.LVL114
+	.8byte	.LVL142
+	.8byte	.LVL143
 	.2byte	0x6
-	.byte	0x8b
+	.byte	0x8c
 	.sleb128 0
 	.byte	0x6
 	.byte	0x23
 	.uleb128 0x1038
-	.8byte	.LVL114
-	.8byte	.LVL121
+	.8byte	.LVL143
+	.8byte	.LVL148
 	.2byte	0x6
 	.byte	0x83
 	.sleb128 0
@@ -8764,8 +9686,8 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0xf8
 	.byte	0x24
 	.byte	0x9f
-	.8byte	.LVL122
-	.8byte	.LFE267
+	.8byte	.LVL149
+	.8byte	.LFE277
 	.2byte	0x6
 	.byte	0x83
 	.sleb128 0
@@ -8775,165 +9697,150 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST42:
-	.8byte	.LVL118
-	.8byte	.LVL122
+.LLST59:
+	.8byte	.LVL147
+	.8byte	.LVL149
 	.2byte	0x5
 	.byte	0x11
 	.sleb128 -65533
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST43:
-	.8byte	.LVL119
-	.8byte	.LVL122
-	.2byte	0x4
-	.byte	0x40
-	.byte	0x3e
-	.byte	0x24
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST44:
-	.8byte	.LVL120
-	.8byte	.LVL122
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST45:
-	.8byte	.LVL175
-	.8byte	.LVL178
+.LLST60:
+	.8byte	.LVL202
+	.8byte	.LVL205
 	.2byte	0x3
 	.byte	0x85
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL178
-	.8byte	.LVL179
+	.8byte	.LVL205
+	.8byte	.LVL206
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL179
-	.8byte	.LVL182
+	.8byte	.LVL206
+	.8byte	.LVL209
 	.2byte	0x3
 	.byte	0x85
 	.sleb128 -1
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST46:
-	.8byte	.LVL177
-	.8byte	.LVL180
+.LLST61:
+	.8byte	.LVL204
+	.8byte	.LVL207
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST47:
-	.8byte	.LVL176
-	.8byte	.LVL180
+.LLST62:
+	.8byte	.LVL203
+	.8byte	.LVL207
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST48:
-	.8byte	.LVL184
-	.8byte	.LVL187
+.LLST63:
+	.8byte	.LVL211
+	.8byte	.LVL214
 	.2byte	0x5
 	.byte	0x11
 	.sleb128 -65534
 	.byte	0x9f
-	.8byte	.LVL189
-	.8byte	.LFE267
+	.8byte	.LVL216
+	.8byte	.LFE277
 	.2byte	0x5
 	.byte	0x11
 	.sleb128 -65534
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST49:
-	.8byte	.LVL184
-	.8byte	.LVL187
+.LLST64:
+	.8byte	.LVL211
+	.8byte	.LVL214
 	.2byte	0x2
 	.byte	0x32
 	.byte	0x9f
-	.8byte	.LVL190
-	.8byte	.LFE267
+	.8byte	.LVL217
+	.8byte	.LFE277
 	.2byte	0x2
 	.byte	0x32
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST50:
-	.8byte	.LVL184
-	.8byte	.LVL187
+.LLST65:
+	.8byte	.LVL211
+	.8byte	.LVL214
 	.2byte	0x3
 	.byte	0x8
 	.byte	0xbf
 	.byte	0x9f
-	.8byte	.LVL191
-	.8byte	.LFE267
+	.8byte	.LVL218
+	.8byte	.LFE277
 	.2byte	0x3
 	.byte	0x8
 	.byte	0xbf
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST51:
-	.8byte	.LVL184
-	.8byte	.LVL187
+.LLST66:
+	.8byte	.LVL211
+	.8byte	.LVL214
 	.2byte	0x6
 	.byte	0xc
 	.4byte	0x10001
 	.byte	0x9f
-	.8byte	.LVL192
-	.8byte	.LFE267
+	.8byte	.LVL219
+	.8byte	.LFE277
 	.2byte	0x6
 	.byte	0xc
 	.4byte	0x10001
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST52:
-	.8byte	.LVL195
-	.8byte	.LVL198
+.LLST67:
+	.8byte	.LVL222
+	.8byte	.LVL225
 	.2byte	0x3
 	.byte	0x85
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL198
-	.8byte	.LVL200
+	.8byte	.LVL225
+	.8byte	.LVL227
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL200
-	.8byte	.LVL201
+	.8byte	.LVL227
+	.8byte	.LVL228
 	.2byte	0x3
 	.byte	0x85
 	.sleb128 -1
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST53:
-	.8byte	.LVL197
-	.8byte	.LVL199
+.LLST68:
+	.8byte	.LVL224
+	.8byte	.LVL226
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST54:
-	.8byte	.LVL196
-	.8byte	.LVL199
+.LLST69:
+	.8byte	.LVL223
+	.8byte	.LVL226
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST6:
-	.8byte	.LVL21
-	.8byte	.LVL22-1
+.LLST21:
+	.8byte	.LVL50
+	.8byte	.LVL51-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL22-1
-	.8byte	.LFE265
+	.8byte	.LVL51-1
+	.8byte	.LVL66
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL66
+	.8byte	.LFE275
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -8941,48 +9848,48 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST7:
-	.8byte	.LVL21
-	.8byte	.LVL22-1
+.LLST22:
+	.8byte	.LVL50
+	.8byte	.LVL51-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL22-1
-	.8byte	.LVL37
+	.8byte	.LVL51-1
+	.8byte	.LVL67
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL37
-	.8byte	.LVL38
+	.8byte	.LVL67
+	.8byte	.LVL68
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL38
-	.8byte	.LVL40
+	.8byte	.LVL68
+	.8byte	.LVL70
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL40
-	.8byte	.LVL41
+	.8byte	.LVL70
+	.8byte	.LVL71
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL41
-	.8byte	.LVL53
+	.8byte	.LVL71
+	.8byte	.LVL82
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL56
-	.8byte	.LFE265
+	.8byte	.LVL86
+	.8byte	.LFE275
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST8:
-	.8byte	.LVL21
-	.8byte	.LVL22-1
+.LLST23:
+	.8byte	.LVL50
+	.8byte	.LVL51-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL22-1
-	.8byte	.LVL36
+	.8byte	.LVL51-1
+	.8byte	.LVL66
 	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL36
-	.8byte	.LFE265
+	.byte	0x68
+	.8byte	.LVL66
+	.8byte	.LFE275
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -8990,24 +9897,24 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST9:
-	.8byte	.LVL21
-	.8byte	.LVL22-1
+.LLST24:
+	.8byte	.LVL50
+	.8byte	.LVL51-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL22-1
-	.8byte	.LVL35
+	.8byte	.LVL51-1
+	.8byte	.LVL65
 	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL35
-	.8byte	.LVL36
+	.byte	0x6b
+	.8byte	.LVL65
+	.8byte	.LVL66
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x53
 	.byte	0x9f
-	.8byte	.LVL36
-	.8byte	.LFE265
+	.8byte	.LVL66
+	.8byte	.LFE275
 	.2byte	0x6
 	.byte	0xf3
 	.uleb128 0x1
@@ -9017,100 +9924,115 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST10:
-	.8byte	.LVL23
-	.8byte	.LVL24
+.LLST25:
+	.8byte	.LVL52
+	.8byte	.LVL53
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL24
 	.8byte	.LVL53
+	.8byte	.LVL82
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL56
-	.8byte	.LFE265
+	.8byte	.LVL86
+	.8byte	.LFE275
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST11:
-	.8byte	.LVL23
+.LLST26:
 	.8byte	.LVL55
+	.8byte	.LVL56
 	.2byte	0x1
-	.byte	0x67
+	.byte	0x50
 	.8byte	.LVL56
-	.8byte	.LVL66
+	.8byte	.LVL84
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL66
-	.8byte	.LFE265
+	.8byte	.LVL86
+	.8byte	.LFE275
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST27:
+	.8byte	.LVL55
+	.8byte	.LVL84
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL86
+	.8byte	.LVL96
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL96
+	.8byte	.LFE275
 	.2byte	0x3
-	.byte	0x87
+	.byte	0x88
 	.sleb128 -1
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST12:
-	.8byte	.LVL61
-	.8byte	.LVL62
+.LLST28:
+	.8byte	.LVL91
+	.8byte	.LVL92
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST13:
-	.8byte	.LVL59
-	.8byte	.LVL64-1
+.LLST29:
+	.8byte	.LVL89
+	.8byte	.LVL94-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL65
-	.8byte	.LFE265
+	.8byte	.LVL95
+	.8byte	.LFE275
 	.2byte	0x1
 	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST14:
-	.8byte	.LVL23
-	.8byte	.LVL48
+.LLST30:
+	.8byte	.LVL55
+	.8byte	.LVL78
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL48
-	.8byte	.LVL49
+	.8byte	.LVL78
+	.8byte	.LVL79
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL49
-	.8byte	.LVL52
+	.8byte	.LVL79
+	.8byte	.LVL81
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL56
-	.8byte	.LVL57
+	.8byte	.LVL86
+	.8byte	.LVL87
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL57
-	.8byte	.LVL63
+	.8byte	.LVL87
+	.8byte	.LVL93
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST18:
-	.8byte	.LVL42
-	.8byte	.LVL44
+.LLST34:
+	.8byte	.LVL72
+	.8byte	.LVL74
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL44
-	.8byte	.LVL45
+	.8byte	.LVL74
+	.8byte	.LVL75
 	.2byte	0x3
 	.byte	0x71
 	.sleb128 260
-	.8byte	.LVL45
-	.8byte	.LVL46
+	.8byte	.LVL75
+	.8byte	.LVL76
 	.2byte	0x6
 	.byte	0x83
 	.sleb128 0
 	.byte	0x6
 	.byte	0x23
 	.uleb128 0x104
-	.8byte	.LVL46
-	.8byte	.LVL50
+	.8byte	.LVL76
+	.8byte	.LVL80
 	.2byte	0x8
 	.byte	0x84
 	.sleb128 -1
@@ -9118,8 +10040,8 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.sleb128 -65536
 	.byte	0x21
 	.byte	0x9f
-	.8byte	.LVL56
-	.8byte	.LFE265
+	.8byte	.LVL86
+	.8byte	.LFE275
 	.2byte	0x8
 	.byte	0x84
 	.sleb128 -1
@@ -9129,42 +10051,42 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST19:
-	.8byte	.LVL43
-	.8byte	.LVL50
+.LLST35:
+	.8byte	.LVL73
+	.8byte	.LVL80
 	.2byte	0x6
 	.byte	0xc
 	.4byte	0x10001
 	.byte	0x9f
-	.8byte	.LVL56
-	.8byte	.LFE265
+	.8byte	.LVL86
+	.8byte	.LFE275
 	.2byte	0x6
 	.byte	0xc
 	.4byte	0x10001
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST22:
-	.8byte	.LVL58
-	.8byte	.LVL64-1
+.LLST37:
+	.8byte	.LVL88
+	.8byte	.LVL94-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL65
-	.8byte	.LFE265
+	.8byte	.LVL95
+	.8byte	.LFE275
 	.2byte	0x1
 	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST23:
-	.8byte	.LVL60
-	.8byte	.LVL62
+.LLST38:
+	.8byte	.LVL90
+	.8byte	.LVL92
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST20:
-	.8byte	.LVL50
-	.8byte	.LVL52
+.LLST36:
+	.8byte	.LVL80
+	.8byte	.LVL81
 	.2byte	0x4
 	.byte	0x40
 	.byte	0x3c
@@ -9172,94 +10094,252 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST21:
-	.8byte	.LVL51
-	.8byte	.LVL52
-	.2byte	0x4
-	.byte	0x40
-	.byte	0x3e
-	.byte	0x24
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST15:
-	.8byte	.LVL27
-	.8byte	.LVL34
+.LLST31:
+	.8byte	.LVL57
+	.8byte	.LVL64
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST16:
-	.8byte	.LVL27
-	.8byte	.LVL34
+.LLST32:
+	.8byte	.LVL57
+	.8byte	.LVL64
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST17:
-	.8byte	.LVL27
-	.8byte	.LVL32
+.LLST33:
+	.8byte	.LVL57
+	.8byte	.LVL62
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL32
-	.8byte	.LVL33
+	.8byte	.LVL62
+	.8byte	.LVL63
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST25:
-	.8byte	.LVL61
-	.8byte	.LVL63
+.LLST40:
+	.8byte	.LVL91
+	.8byte	.LVL93
 	.2byte	0x1
 	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST26:
-	.8byte	.LVL36
-	.8byte	.LVL54
+.LLST41:
+	.8byte	.LVL66
+	.8byte	.LVL83
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL56
-	.8byte	.LFE265
+	.8byte	.LVL86
+	.8byte	.LFE275
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST27:
-	.8byte	.LVL36
-	.8byte	.LVL55
+.LLST42:
+	.8byte	.LVL66
+	.8byte	.LVL85
 	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL56
+	.byte	0x69
+	.8byte	.LVL86
+	.8byte	.LFE275
+	.2byte	0x1
+	.byte	0x69
+	.8byte	0
+	.8byte	0
+.LLST10:
+	.8byte	.LVL20
+	.8byte	.LVL23
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL23
+	.8byte	.LFE269
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST11:
+	.8byte	.LVL20
+	.8byte	.LVL21
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL21
+	.8byte	.LFE269
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST8:
+	.8byte	.LVL16
+	.8byte	.LVL19
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL19
+	.8byte	.LFE268
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST9:
+	.8byte	.LVL16
+	.8byte	.LVL17
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL17
+	.8byte	.LFE268
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST6:
+	.8byte	.LVL12
+	.8byte	.LVL14
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL14
+	.8byte	.LFE267
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST7:
+	.8byte	.LVL12
+	.8byte	.LVL15
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL15
+	.8byte	.LFE267
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST4:
+	.8byte	.LVL8
+	.8byte	.LVL11
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL11
+	.8byte	.LFE266
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST5:
+	.8byte	.LVL8
+	.8byte	.LVL9
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL9
+	.8byte	.LFE266
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST2:
+	.8byte	.LVL4
+	.8byte	.LVL6
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL6
+	.8byte	.LFE265
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST3:
+	.8byte	.LVL4
+	.8byte	.LVL7
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL7
 	.8byte	.LFE265
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST0:
+	.8byte	.LVL0
+	.8byte	.LVL3
 	.2byte	0x1
-	.byte	0x68
+	.byte	0x51
+	.8byte	.LVL3
+	.8byte	.LFE264
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST1:
+	.8byte	.LVL0
+	.8byte	.LVL1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL1
+	.8byte	.LFE264
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST2:
-	.8byte	.LVL8
-	.8byte	.LVL9
+.LLST17:
+	.8byte	.LVL37
+	.8byte	.LVL38
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL9
-	.8byte	.LVL11
+	.8byte	.LVL38
+	.8byte	.LVL40
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL11
-	.8byte	.LVL13
+	.8byte	.LVL40
+	.8byte	.LVL42
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL13
-	.8byte	.LVL19
+	.8byte	.LVL42
+	.8byte	.LVL48
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL19
-	.8byte	.LFE270
+	.8byte	.LVL48
+	.8byte	.LFE282
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -9267,125 +10347,163 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST3:
-	.8byte	.LVL9
-	.8byte	.LVL15
+.LLST18:
+	.8byte	.LVL38
+	.8byte	.LVL44
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL15
-	.8byte	.LVL16
+	.8byte	.LVL44
+	.8byte	.LVL45
 	.2byte	0x3
 	.byte	0x84
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL16
-	.8byte	.LVL20
+	.8byte	.LVL45
+	.8byte	.LVL49
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST4:
-	.8byte	.LVL10
-	.8byte	.LVL12
+.LLST19:
+	.8byte	.LVL39
+	.8byte	.LVL41
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL13
-	.8byte	.LVL14
+	.8byte	.LVL42
+	.8byte	.LVL43
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST5:
-	.8byte	.LVL11
-	.8byte	.LVL13
+.LLST20:
+	.8byte	.LVL40
+	.8byte	.LVL42
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
 	.section	.debug_aranges,"",@progbits
-	.4byte	0x5c
+	.4byte	0xcc
 	.2byte	0x2
 	.4byte	.Ldebug_info0
 	.byte	0x8
 	.byte	0
 	.2byte	0
 	.2byte	0
-	.8byte	.LFB268
-	.8byte	.LFE268-.LFB268
-	.8byte	.LFB270
-	.8byte	.LFE270-.LFB270
+	.8byte	.LFB264
+	.8byte	.LFE264-.LFB264
 	.8byte	.LFB265
 	.8byte	.LFE265-.LFB265
+	.8byte	.LFB266
+	.8byte	.LFE266-.LFB266
 	.8byte	.LFB267
 	.8byte	.LFE267-.LFB267
+	.8byte	.LFB268
+	.8byte	.LFE268-.LFB268
+	.8byte	.LFB269
+	.8byte	.LFE269-.LFB269
+	.8byte	.LFB279
+	.8byte	.LFE279-.LFB279
+	.8byte	.LFB280
+	.8byte	.LFE280-.LFB280
+	.8byte	.LFB282
+	.8byte	.LFE282-.LFB282
+	.8byte	.LFB275
+	.8byte	.LFE275-.LFB275
+	.8byte	.LFB277
+	.8byte	.LFE277-.LFB277
 	.8byte	0
 	.8byte	0
 	.section	.debug_ranges,"",@progbits
 .Ldebug_ranges0:
-	.8byte	.LBB62
-	.8byte	.LBE62
-	.8byte	.LBB63
-	.8byte	.LBE63
+	.8byte	.LBB71
+	.8byte	.LBE71
+	.8byte	.LBB72
+	.8byte	.LBE72
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB73
+	.8byte	.LBE73
+	.8byte	.LBB74
+	.8byte	.LBE74
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB143
-	.8byte	.LBE143
+	.8byte	.LBB146
+	.8byte	.LBE146
+	.8byte	.LBB224
+	.8byte	.LBE224
+	.8byte	.LBB225
+	.8byte	.LBE225
+	.8byte	.LBB226
+	.8byte	.LBE226
 	.8byte	.LBB227
 	.8byte	.LBE227
-	.8byte	.LBB228
-	.8byte	.LBE228
-	.8byte	.LBB229
-	.8byte	.LBE229
-	.8byte	.LBB230
-	.8byte	.LBE230
-	.8byte	.LBB231
-	.8byte	.LBE231
 	.8byte	0
 	.8byte	0
+	.8byte	.LBB167
+	.8byte	.LBE167
 	.8byte	.LBB168
 	.8byte	.LBE168
+	.8byte	0
+	.8byte	0
 	.8byte	.LBB169
 	.8byte	.LBE169
+	.8byte	.LBB170
+	.8byte	.LBE170
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB189
-	.8byte	.LBE189
-	.8byte	.LBB190
-	.8byte	.LBE190
+	.8byte	.LBB187
+	.8byte	.LBE187
+	.8byte	.LBB188
+	.8byte	.LBE188
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB195
-	.8byte	.LBE195
-	.8byte	.LBB196
-	.8byte	.LBE196
+	.8byte	.LBB193
+	.8byte	.LBE193
+	.8byte	.LBB194
+	.8byte	.LBE194
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB199
-	.8byte	.LBE199
-	.8byte	.LBB200
-	.8byte	.LBE200
+	.8byte	.LBB197
+	.8byte	.LBE197
+	.8byte	.LBB198
+	.8byte	.LBE198
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB204
-	.8byte	.LBE204
-	.8byte	.LBB205
-	.8byte	.LBE205
+	.8byte	.LBB202
+	.8byte	.LBE202
+	.8byte	.LBB203
+	.8byte	.LBE203
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB210
-	.8byte	.LBE210
-	.8byte	.LBB211
-	.8byte	.LBE211
+	.8byte	.LBB208
+	.8byte	.LBE208
+	.8byte	.LBB209
+	.8byte	.LBE209
 	.8byte	0
 	.8byte	0
-	.8byte	.LFB268
-	.8byte	.LFE268
-	.8byte	.LFB270
-	.8byte	.LFE270
+	.8byte	.LFB264
+	.8byte	.LFE264
 	.8byte	.LFB265
 	.8byte	.LFE265
+	.8byte	.LFB266
+	.8byte	.LFE266
 	.8byte	.LFB267
 	.8byte	.LFE267
+	.8byte	.LFB268
+	.8byte	.LFE268
+	.8byte	.LFB269
+	.8byte	.LFE269
+	.8byte	.LFB279
+	.8byte	.LFE279
+	.8byte	.LFB280
+	.8byte	.LFE280
+	.8byte	.LFB282
+	.8byte	.LFE282
+	.8byte	.LFB275
+	.8byte	.LFE275
+	.8byte	.LFB277
+	.8byte	.LFE277
 	.8byte	0
 	.8byte	0
 	.section	.debug_line,"",@progbits
@@ -9393,844 +10511,930 @@ _u_boot_list_2_driver_2_rockchip_secure_otp:
 	.section	.debug_str,"MS",@progbits,1
 .LASF30:
 	.string	"parent_platdata"
-.LASF99:
+.LASF100:
 	.string	"off_mem_rsvmap"
-.LASF182:
+.LASF183:
 	.string	"UCLASS_I2C_EEPROM"
-.LASF300:
+.LASF459:
 	.string	"jt_funcs"
-.LASF187:
+.LASF188:
 	.string	"UCLASS_IRQ"
-.LASF149:
+.LASF150:
 	.string	"initrd_start"
-.LASF181:
+.LASF182:
 	.string	"UCLASS_I2C"
 .LASF13:
 	.string	"sizetype"
-.LASF314:
+.LASF333:
 	.string	"net_hostname"
 .LASF54:
 	.string	"start"
-.LASF220:
+.LASF222:
 	.string	"UCLASS_SPI"
-.LASF297:
+.LASF308:
 	.string	"child"
-.LASF185:
+.LASF186:
 	.string	"UCLASS_I2S"
-.LASF336:
+.LASF355:
 	.string	"NETLOOP_RESTART"
-.LASF387:
+.LASF415:
 	.string	"otp_data"
-.LASF183:
+.LASF184:
 	.string	"UCLASS_I2C_GENERIC"
-.LASF195:
+.LASF196:
 	.string	"UCLASS_MOD_EXP"
-.LASF242:
+.LASF245:
 	.string	"UCLASS_IO_DOMAIN"
-.LASF256:
+.LASF261:
 	.string	"using_pre_serial"
 .LASF37:
 	.string	"uclass_priv"
-.LASF215:
+.LASF217:
 	.string	"UCLASS_RKNAND"
-.LASF158:
+.LASF159:
 	.string	"UCLASS_DEMO"
-.LASF107:
+.LASF401:
+	.string	"OTP_S"
+.LASF108:
 	.string	"ih_magic"
 .LASF46:
 	.string	"list_head"
-.LASF347:
+.LASF366:
 	.string	"child_pre_probe"
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+.LASF422:
 	.string	"rockchip_secure_otp_ofdata_to_platdata"
-.LASF289:
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 	.string	"pm_ctx_phys"
-.LASF162:
+.LASF163:
 	.string	"UCLASS_TEST_PROBE"
-.LASF295:
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 	.string	"full_name"
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 	.string	"UCLASS_KEY"
 .LASF80:
 	.string	"bi_intfreq"
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 	.string	"__func__"
 .LASF11:
 	.string	"phys_addr_t"
-.LASF380:
+.LASF405:
 	.string	"write"
-.LASF233:
+.LASF236:
 	.string	"UCLASS_VIDEO_BRIDGE"
+.LASF299:
+	.string	"video_bottom"
 .LASF5:
 	.string	"__u8"
-.LASF335:
+.LASF354:
 	.string	"NETLOOP_CONTINUE"
-.LASF223:
+.LASF225:
 	.string	"UCLASS_SPI_GENERIC"
-.LASF285:
+.LASF294:
 	.string	"malloc_base"
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 	.string	"dev_read_addr_ptr"
 .LASF56:
 	.string	"flash_info_t"
-.LASF199:
+.LASF201:
 	.string	"UCLASS_PANEL"
-.LASF124:
+.LASF125:
 	.string	"comp"
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 	.string	"image_header_t"
-.LASF154:
+.LASF155:
 	.string	"state"
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 	.string	"UCLASS_CROS_EC"
 .LASF74:
 	.string	"bi_dsp_freq"
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+.LASF420:
 	.string	"rockchip_otp_ids"
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+.LASF122:
 	.string	"image_start"
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 	.string	"UCLASS_TEST_FDT"
 .LASF65:
 	.string	"bd_info"
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+.LASF352:
 	.string	"uclass_id"
-.LASF111:
+.LASF112:
 	.string	"ih_load"
-.LASF304:
+.LASF399:
+	.string	"DECOM_GZIP"
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 	.string	"__dtb_dt_spl_begin"
-.LASF373:
+.LASF392:
 	.string	"pre_remove"
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 	.string	"delay"
 .LASF7:
 	.string	"__u32"
 .LASF35:
 	.string	"priv"
-.LASF288:
+.LASF297:
 	.string	"cur_serial_dev"
-.LASF320:
+.LASF339:
 	.string	"net_tx_packet"
-.LASF237:
+.LASF240:
 	.string	"UCLASS_FG"
-.LASF319:
+.LASF338:
 	.string	"net_server_ip"
-.LASF386:
+.LASF414:
 	.string	"ofnode_union"
-.LASF327:
+.LASF346:
 	.string	"net_native_vlan"
-.LASF235:
+.LASF238:
 	.string	"UCLASS_VIDEO_CRTC"
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+.LASF175:
 	.string	"UCLASS_CODEC"
-.LASF282:
+.LASF291:
 	.string	"env_buf"
-.LASF399:
+.LASF429:
 	.string	"rockchip_secure_otp_write_byte"
 .LASF21:
 	.string	"errno"
 .LASF15:
 	.string	"long int"
+.LASF396:
+	.string	"__invalid_size_argument_for_IOC"
 .LASF69:
 	.string	"bi_flashsize"
 .LASF29:
 	.string	"platdata"
-.LASF204:
+.LASF206:
 	.string	"UCLASS_PHY"
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+.LASF93:
 	.string	"IRQ_STACK_START_IN"
-.LASF103:
+.LASF104:
 	.string	"size_dt_strings"
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+.LASF235:
 	.string	"UCLASS_VIDEO"
-.LASF268:
+.LASF275:
 	.string	"relocaddr"
-.LASF364:
+.LASF383:
 	.string	"dev_head"
-.LASF381:
-	.string	"ioctl"
-.LASF330:
+.LASF458:
+	.string	"/home/zzz/code/u-boot"
+.LASF349:
 	.string	"net_boot_file_size"
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+.LASF114:
 	.string	"ih_dcrc"
 .LASF79:
 	.string	"bi_ethspeed"
-.LASF157:
+.LASF158:
 	.string	"UCLASS_ROOT"
 .LASF44:
 	.string	"ide_bus_offset"
-.LASF317:
+.LASF336:
 	.string	"net_server_ethaddr"
 .LASF82:
 	.string	"bi_arch_number"
 .LASF3:
 	.string	"signed char"
-.LASF188:
+.LASF189:
 	.string	"UCLASS_KEYBOARD"
 .LASF18:
 	.string	"uint8_t"
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 	.string	"_u_boot_list_2_driver_2_rockchip_secure_otp"
-.LASF352:
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 	.string	"per_child_platdata_auto_alloc_size"
 .LASF45:
 	.string	"udevice"
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 	.string	"udelay"
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 	.string	"ih_arch"
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 	.string	"totalsize"
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 	.string	"ih_hcrc"
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 	.string	"mon_len"
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 	.string	"call"
-.LASF123:
+.LASF124:
 	.string	"load"
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 	.string	"UCLASS_TPM"
 .LASF59:
 	.string	"lmb_property"
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+.LASF102:
 	.string	"last_comp_version"
 .LASF0:
 	.string	"unsigned char"
-.LASF371:
-	.string	"pre_probe"
-.LASF156:
+.LASF84:
+	.string	"bi_andr_version"
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 	.string	"images"
-.LASF416:
-	.string	"/home/zzz/code/u-boot-backup"
-.LASF241:
+.LASF244:
 	.string	"UCLASS_DVFS"
 .LASF75:
 	.string	"bi_ddr_freq"
-.LASF189:
+.LASF190:
 	.string	"UCLASS_LED"
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+.LASF111:
 	.string	"ih_size"
 .LASF39:
 	.string	"uclass_node"
-.LASF383:
+.LASF408:
 	.string	"rockchip_otp_platdata"
+.LASF248:
+	.string	"UCLASS_MDIO"
 .LASF23:
 	.string	"_Bool"
-.LASF353:
+.LASF372:
 	.string	"property"
-.LASF339:
+.LASF428:
+	.string	"rockchip_secure_otp_capability"
+.LASF358:
 	.string	"net_state"
-.LASF355:
+.LASF374:
 	.string	"value"
-.LASF402:
+.LASF418:
+	.string	"rk3308_data"
+.LASF435:
 	.string	"rockchip_secure_otp_check_flag"
-.LASF184:
+.LASF185:
 	.string	"UCLASS_I2C_MUX"
 .LASF14:
 	.string	"char"
 .LASF25:
 	.string	"_binary_u_boot_bin_start"
-.LASF337:
+.LASF234:
+	.string	"UCLASS_USB_GADGET_GENERIC"
+.LASF356:
 	.string	"NETLOOP_SUCCESS"
 .LASF36:
 	.string	"uclass"
-.LASF361:
+.LASF380:
 	.string	"p_current"
-.LASF363:
+.LASF382:
 	.string	"uc_drv"
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+.LASF353:
 	.string	"net_loop_state"
 .LASF43:
 	.string	"req_seq"
-.LASF298:
+.LASF309:
 	.string	"sibling"
-.LASF276:
+.LASF283:
 	.string	"dm_root_f"
-.LASF173:
+.LASF320:
+	.string	"enetaddr"
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 	.string	"UCLASS_AMP"
-.LASF210:
+.LASF212:
 	.string	"UCLASS_PWRSEQ"
-.LASF356:
+.LASF375:
 	.string	"of_offset"
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+.LASF140:
 	.string	"fit_hdr_fdt"
-.LASF328:
+.LASF347:
 	.string	"net_restart_wrap"
-.LASF316:
+.LASF335:
 	.string	"net_ethaddr"
 .LASF42:
 	.string	"flags"
-.LASF413:
+.LASF455:
 	.string	"malloc_simple"
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+.LASF117:
 	.string	"ih_type"
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+.LASF98:
 	.string	"off_dt_struct"
 .LASF70:
 	.string	"bi_flashoffset"
-.LASF329:
+.LASF348:
 	.string	"net_boot_file_name"
-.LASF366:
+.LASF385:
 	.string	"compatible"
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+.LASF160:
 	.string	"UCLASS_TEST"
-.LASF109:
+.LASF110:
 	.string	"ih_time"
-.LASF261:
+.LASF270:
+	.string	"fb_base"
+.LASF267:
 	.string	"bus_clk"
-.LASF211:
+.LASF213:
 	.string	"UCLASS_RAM"
-.LASF178:
+.LASF445:
+	.string	"rk3308_spl_rockchip_otp_stop"
+.LASF179:
 	.string	"UCLASS_ETH"
 .LASF32:
 	.string	"node"
-.LASF120:
+.LASF121:
 	.string	"image_info"
-.LASF126:
+.LASF127:
 	.string	"arch"
-.LASF263:
+.LASF269:
 	.string	"mem_clk"
-.LASF394:
-	.string	"temp"
-.LASF260:
+.LASF446:
+	.string	"rk3308_spl_rockchip_otp_start"
+.LASF266:
 	.string	"cpu_clk"
 .LASF50:
 	.string	"select_hwpart"
-.LASF321:
+.LASF340:
 	.string	"net_rx_packets"
-.LASF358:
+.LASF377:
 	.string	"mem_malloc_start"
-.LASF404:
+.LASF437:
 	.string	"rockchip_secure_otp_wait_flag"
-.LASF91:
+.LASF92:
 	.string	"_datarelro_start_ofs"
 .LASF17:
 	.string	"ulong"
-.LASF112:
+.LASF113:
 	.string	"ih_ep"
 .LASF61:
 	.string	"lmb_region"
-.LASF412:
+.LASF390:
+	.string	"pre_probe"
+.LASF453:
 	.string	"printf"
-.LASF134:
+.LASF400:
+	.string	"DECOM_ZLIB"
+.LASF135:
 	.string	"fit_uname_os"
 .LASF76:
 	.string	"bi_bootflags"
-.LASF318:
+.LASF337:
 	.string	"net_ip"
-.LASF405:
+.LASF438:
 	.string	"rockchip_secure_otp_wait_status"
-.LASF280:
+.LASF289:
 	.string	"fdt_size"
-.LASF312:
+.LASF331:
 	.string	"net_dns_server"
-.LASF332:
+.LASF419:
+	.string	"rk3328_data"
+.LASF351:
 	.string	"net_ping_ip"
 .LASF63:
 	.string	"memory"
-.LASF94:
+.LASF95:
 	.string	"fdt_header"
-.LASF359:
+.LASF378:
 	.string	"mem_malloc_end"
-.LASF191:
+.LASF192:
 	.string	"UCLASS_MAILBOX"
-.LASF146:
+.LASF147:
 	.string	"rd_end"
-.LASF341:
+.LASF360:
 	.string	"bind"
-.LASF271:
+.LASF278:
 	.string	"irq_sp"
-.LASF151:
+.LASF152:
 	.string	"cmdline_start"
-.LASF259:
+.LASF327:
+	.string	"index"
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 	.string	"global_data"
-.LASF376:
+.LASF394:
 	.string	"per_device_auto_alloc_size"
-.LASF218:
+.LASF423:
+	.string	"rockchip_secure_otp_ioctl"
+.LASF220:
 	.string	"UCLASS_SCSI"
-.LASF230:
+.LASF232:
 	.string	"UCLASS_USB_DEV_GENERIC"
-.LASF192:
+.LASF193:
 	.string	"UCLASS_MASS_STORAGE"
 .LASF1:
 	.string	"long unsigned int"
-.LASF167:
+.LASF168:
 	.string	"UCLASS_SIMPLE_BUS"
-.LASF301:
+.LASF310:
 	.string	"gd_t"
-.LASF313:
+.LASF332:
 	.string	"net_nis_domain"
-.LASF141:
+.LASF142:
 	.string	"fit_noffset_fdt"
-.LASF388:
+.LASF444:
+	.string	"rk3328_spl_rockchip_otp_start"
+.LASF416:
 	.string	"rockchip_secure_otp_ops"
-.LASF338:
+.LASF357:
 	.string	"NETLOOP_FAIL"
-.LASF236:
+.LASF239:
 	.string	"UCLASS_WDT"
-.LASF250:
+.LASF255:
 	.string	"timer_reset_value"
-.LASF272:
+.LASF279:
 	.string	"start_addr_sp"
 .LASF71:
 	.string	"bi_sramstart"
 .LASF26:
 	.string	"_binary_u_boot_bin_end"
-.LASF273:
+.LASF417:
+	.string	"px30_data"
+.LASF280:
 	.string	"reloc_off"
-.LASF102:
+.LASF103:
 	.string	"boot_cpuid_phys"
-.LASF249:
+.LASF254:
 	.string	"lastinc"
-.LASF253:
+.LASF258:
 	.string	"tlb_fillptr"
-.LASF137:
+.LASF138:
 	.string	"fit_uname_rd"
-.LASF224:
+.LASF226:
 	.string	"UCLASS_SYSCON"
-.LASF172:
+.LASF173:
 	.string	"UCLASS_CPU"
-.LASF132:
+.LASF133:
 	.string	"fit_uname_cfg"
-.LASF219:
+.LASF221:
 	.string	"UCLASS_SERIAL"
-.LASF326:
+.LASF345:
 	.string	"net_our_vlan"
-.LASF290:
+.LASF301:
 	.string	"serial"
-.LASF342:
+.LASF443:
+	.string	"rk3328_spl_rockchip_otp_stop"
+.LASF361:
 	.string	"probe"
-.LASF170:
+.LASF171:
 	.string	"UCLASS_BLK"
-.LASF127:
+.LASF128:
 	.string	"image_info_t"
-.LASF166:
+.LASF167:
 	.string	"UCLASS_USB_EMUL"
-.LASF251:
+.LASF256:
 	.string	"tlb_addr"
-.LASF203:
+.LASF205:
 	.string	"UCLASS_PCI_GENERIC"
-.LASF122:
+.LASF123:
 	.string	"image_len"
 .LASF77:
 	.string	"bi_ip_addr"
-.LASF205:
+.LASF207:
 	.string	"UCLASS_PINCONFIG"
-.LASF226:
+.LASF323:
+	.string	"send"
+.LASF228:
 	.string	"UCLASS_THERMAL"
-.LASF130:
+.LASF131:
 	.string	"legacy_hdr_os_copy"
 .LASF9:
 	.string	"long long int"
-.LASF279:
+.LASF397:
+	.string	"misc_mode"
+.LASF288:
 	.string	"new_fdt"
 .LASF22:
 	.string	"___strtok"
-.LASF331:
+.LASF350:
 	.string	"net_boot_file_expected_size_in_blocks"
-.LASF401:
+.LASF262:
 	.string	"enable"
-.LASF407:
+.LASF440:
 	.string	"rockchip_secure_otp_ecc_check"
-.LASF340:
+.LASF359:
 	.string	"of_match"
-.LASF198:
+.LASF200:
 	.string	"UCLASS_NVME"
-.LASF254:
+.LASF259:
 	.string	"tlb_emerg"
-.LASF128:
+.LASF129:
 	.string	"bootm_headers"
 .LASF55:
 	.string	"protect"
-.LASF229:
+.LASF231:
 	.string	"UCLASS_USB"
-.LASF368:
+.LASF387:
 	.string	"uclass_driver"
-.LASF239:
+.LASF242:
 	.string	"UCLASS_RC"
-.LASF283:
+.LASF292:
 	.string	"timebase_h"
-.LASF284:
+.LASF293:
 	.string	"timebase_l"
-.LASF176:
+.LASF177:
 	.string	"UCLASS_DISPLAY"
-.LASF325:
+.LASF344:
 	.string	"net_null_ethaddr"
-.LASF266:
+.LASF273:
 	.string	"env_valid"
 .LASF34:
 	.string	"parent"
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+.LASF166:
 	.string	"UCLASS_PCI_EMUL"
-.LASF396:
+.LASF431:
 	.string	"rockchip_secure_otp_read"
 .LASF38:
 	.string	"parent_priv"
-.LASF398:
+.LASF433:
 	.string	"parity"
-.LASF240:
+.LASF402:
+	.string	"OTP_NS"
+.LASF243:
 	.string	"UCLASS_CHARGE_DISPLAY"
-.LASF305:
+.LASF314:
 	.string	"load_addr"
-.LASF133:
+.LASF134:
 	.string	"fit_hdr_os"
-.LASF89:
+.LASF90:
 	.string	"_datarelrolocal_start_ofs"
-.LASF258:
+.LASF454:
+	.string	"dev_get_driver_data"
+.LASF413:
+	.string	"spl_rockchip_otp_stop"
+.LASF264:
 	.string	"addr"
-.LASF379:
+.LASF448:
+	.string	"px30_spl_rockchip_otp_start"
+.LASF404:
 	.string	"read"
+.LASF442:
+	.string	"mask"
 .LASF8:
 	.string	"unsigned int"
 .LASF16:
 	.string	"ushort"
-.LASF410:
+.LASF319:
+	.string	"eth_device"
+.LASF406:
+	.string	"ioctl"
+.LASF451:
 	.string	"dev_read_u32_default"
-.LASF349:
+.LASF287:
+	.string	"ufdt_blob"
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 	.string	"priv_auto_alloc_size"
-.LASF286:
+.LASF295:
 	.string	"malloc_limit"
-.LASF207:
+.LASF209:
 	.string	"UCLASS_PMIC"
-.LASF129:
+.LASF441:
+	.string	"secure_conf"
+.LASF130:
 	.string	"legacy_hdr_os"
-.LASF98:
+.LASF99:
 	.string	"off_dt_strings"
-.LASF302:
+.LASF311:
 	.string	"monitor_flash_len"
-.LASF193:
+.LASF194:
 	.string	"UCLASS_MISC"
 .LASF67:
 	.string	"bi_memsize"
-.LASF406:
+.LASF439:
 	.string	"flag"
 .LASF24:
 	.string	"image_base"
-.LASF225:
+.LASF227:
 	.string	"UCLASS_SYSRESET"
-.LASF362:
+.LASF381:
 	.string	"current"
-.LASF180:
+.LASF181:
 	.string	"UCLASS_FIRMWARE"
-.LASF190:
+.LASF191:
 	.string	"UCLASS_LPC"
-.LASF393:
+.LASF426:
 	.string	"offset"
-.LASF186:
+.LASF187:
 	.string	"UCLASS_IDE"
-.LASF378:
+.LASF403:
 	.string	"misc_ops"
-.LASF294:
+.LASF305:
 	.string	"phandle"
-.LASF377:
+.LASF298:
+	.string	"video_top"
+.LASF395:
 	.string	"per_device_platdata_auto_alloc_size"
-.LASF155:
+.LASF156:
 	.string	"bootm_headers_t"
 .LASF73:
 	.string	"bi_arm_freq"
-.LASF213:
+.LASF215:
 	.string	"UCLASS_REMOTEPROC"
-.LASF125:
+.LASF324:
+	.string	"recv"
+.LASF126:
 	.string	"type"
-.LASF136:
+.LASF137:
 	.string	"fit_hdr_rd"
-.LASF265:
+.LASF272:
 	.string	"env_addr"
 .LASF72:
 	.string	"bi_sramsize"
-.LASF277:
+.LASF284:
 	.string	"uclass_root"
-.LASF179:
+.LASF180:
 	.string	"UCLASS_GPIO"
-.LASF418:
+.LASF461:
 	.string	"read_end"
-.LASF208:
+.LASF210:
 	.string	"UCLASS_PWM"
 .LASF58:
 	.string	"long double"
-.LASF267:
+.LASF274:
 	.string	"ram_top"
-.LASF292:
+.LASF303:
 	.string	"console_evt"
-.LASF145:
+.LASF146:
 	.string	"rd_start"
-.LASF417:
+.LASF460:
 	.string	"write_end"
-.LASF209:
+.LASF211:
 	.string	"UCLASS_POWER_DOMAIN"
-.LASF212:
+.LASF214:
 	.string	"UCLASS_REGULATOR"
-.LASF307:
+.LASF316:
 	.string	"save_size"
-.LASF171:
+.LASF172:
 	.string	"UCLASS_CLK"
 .LASF31:
 	.string	"uclass_platdata"
-.LASF408:
+.LASF449:
 	.string	"dev_get_platdata"
-.LASF88:
+.LASF321:
+	.string	"iobase"
+.LASF89:
 	.string	"_datarel_start_ofs"
-.LASF255:
+.LASF260:
 	.string	"pre_serial"
-.LASF414:
+.LASF456:
 	.ascii	"GNU C11 6.3.1 201"
 	.string	"70404 -mstrict-align -march=armv8-a+nosimd -mlittle-endian -mabi=lp64 -g -Os -fno-builtin -ffreestanding -fshort-wchar -fno-stack-protector -fno-delete-null-pointer-checks -fstack-usage -ffunction-sections -fdata-sections -ffixed-r9 -fno-common -ffixed-x18"
-.LASF118:
+.LASF119:
 	.string	"ih_name"
-.LASF114:
+.LASF115:
 	.string	"ih_os"
-.LASF152:
+.LASF153:
 	.string	"cmdline_end"
-.LASF322:
+.LASF341:
 	.string	"net_rx_packet"
-.LASF246:
+.LASF251:
 	.string	"LOGF_MAX_CATEGORIES"
-.LASF278:
+.LASF286:
 	.string	"fdt_blob"
-.LASF365:
+.LASF384:
 	.string	"udevice_id"
 .LASF51:
 	.string	"size"
 .LASF10:
 	.string	"long long unsigned int"
-.LASF375:
+.LASF393:
 	.string	"destroy"
-.LASF106:
+.LASF107:
 	.string	"image_header"
-.LASF354:
+.LASF373:
 	.string	"length"
 .LASF20:
 	.string	"__be32"
 .LASF68:
 	.string	"bi_flashstart"
-.LASF135:
+.LASF136:
 	.string	"fit_noffset_os"
-.LASF194:
+.LASF195:
 	.string	"UCLASS_MMC"
-.LASF245:
+.LASF326:
+	.string	"write_hwaddr"
+.LASF250:
 	.string	"UCLASS_INVALID"
-.LASF231:
+.LASF233:
 	.string	"UCLASS_USB_HUB"
-.LASF348:
+.LASF367:
 	.string	"child_post_remove"
 .LASF41:
 	.string	"sibling_node"
-.LASF281:
+.LASF290:
 	.string	"of_root"
 .LASF57:
 	.string	"flash_info"
-.LASF100:
+.LASF101:
 	.string	"version"
+.LASF325:
+	.string	"halt"
 .LASF62:
 	.string	"region"
-.LASF104:
+.LASF105:
 	.string	"size_dt_struct"
-.LASF275:
+.LASF282:
 	.string	"dm_root"
-.LASF291:
+.LASF302:
 	.string	"sys_start_tick"
-.LASF296:
+.LASF307:
 	.string	"properties"
-.LASF196:
+.LASF197:
 	.string	"UCLASS_MTD"
-.LASF93:
+.LASF94:
 	.string	"fdt32_t"
-.LASF274:
+.LASF281:
 	.string	"new_gd"
-.LASF197:
+.LASF199:
 	.string	"UCLASS_NORTHBRIDGE"
 .LASF78:
 	.string	"bi_enetaddr"
-.LASF299:
-	.string	"mtd_info"
-.LASF346:
+.LASF365:
 	.string	"child_post_bind"
-.LASF308:
+.LASF317:
 	.string	"in_addr"
-.LASF323:
+.LASF342:
 	.string	"net_rx_packet_len"
-.LASF374:
+.LASF322:
 	.string	"init"
-.LASF400:
+.LASF434:
 	.string	"rockchip_secure_otp_ecc_enable"
-.LASF303:
+.LASF312:
 	.string	"__dtb_dt_begin"
-.LASF214:
+.LASF216:
 	.string	"UCLASS_RESET"
-.LASF138:
+.LASF139:
 	.string	"fit_noffset_rd"
-.LASF169:
+.LASF170:
 	.string	"UCLASS_AHCI"
 .LASF12:
 	.string	"phys_size_t"
 .LASF27:
 	.string	"driver"
-.LASF87:
+.LASF88:
 	.string	"FIQ_STACK_START"
-.LASF153:
+.LASF154:
 	.string	"verify"
-.LASF357:
+.LASF376:
 	.string	"ofnode"
 .LASF28:
 	.string	"name"
-.LASF397:
+.LASF432:
 	.string	"buffer"
-.LASF200:
+.LASF202:
 	.string	"UCLASS_PANEL_BACKLIGHT"
-.LASF227:
+.LASF229:
 	.string	"UCLASS_TIMER"
-.LASF222:
+.LASF224:
 	.string	"UCLASS_SPI_FLASH"
-.LASF264:
+.LASF271:
 	.string	"have_console"
 .LASF81:
 	.string	"bi_busfreq"
 .LASF6:
 	.string	"short int"
-.LASF385:
+.LASF410:
 	.string	"otp_mask_base"
-.LASF206:
+.LASF208:
 	.string	"UCLASS_PINCTRL"
-.LASF216:
+.LASF218:
 	.string	"UCLASS_RAMDISK"
-.LASF164:
+.LASF165:
 	.string	"UCLASS_I2C_EMUL"
-.LASF221:
+.LASF223:
 	.string	"UCLASS_SPMI"
-.LASF343:
+.LASF362:
 	.string	"remove"
-.LASF161:
+.LASF162:
 	.string	"UCLASS_TEST_BUS"
-.LASF306:
+.LASF315:
 	.string	"save_addr"
-.LASF351:
+.LASF370:
 	.string	"per_child_auto_alloc_size"
-.LASF287:
+.LASF296:
 	.string	"malloc_ptr"
-.LASF384:
+.LASF409:
 	.string	"secure_conf_base"
-.LASF150:
+.LASF151:
 	.string	"initrd_end"
-.LASF370:
+.LASF389:
 	.string	"pre_unbind"
-.LASF257:
+.LASF411:
+	.string	"secure_otp_data"
+.LASF263:
 	.string	"baudrate"
-.LASF90:
+.LASF91:
 	.string	"_datarellocal_start_ofs"
 .LASF40:
 	.string	"child_head"
-.LASF247:
+.LASF252:
 	.string	"arch_global_data"
-.LASF244:
+.LASF249:
 	.string	"UCLASS_COUNT"
-.LASF262:
+.LASF268:
 	.string	"pci_clk"
 .LASF49:
 	.string	"block_drvr"
 .LASF53:
 	.string	"flash_id"
-.LASF243:
+.LASF246:
 	.string	"UCLASS_CRYPTO"
-.LASF293:
+.LASF304:
 	.string	"device_node"
-.LASF269:
+.LASF276:
 	.string	"ram_size"
-.LASF144:
+.LASF145:
 	.string	"fit_noffset_setup"
-.LASF105:
+.LASF106:
 	.string	"working_fdt"
-.LASF315:
+.LASF285:
+	.string	"fdt_blob_kern"
+.LASF334:
 	.string	"net_root_path"
-.LASF177:
+.LASF178:
 	.string	"UCLASS_DMA"
-.LASF85:
+.LASF86:
 	.string	"bd_t"
-.LASF309:
+.LASF318:
 	.string	"s_addr"
-.LASF372:
+.LASF424:
+	.string	"request"
+.LASF391:
 	.string	"post_probe"
-.LASF324:
+.LASF343:
 	.string	"net_bcast_ethaddr"
 .LASF83:
 	.string	"bi_boot_params"
+.LASF412:
+	.string	"spl_rockchip_otp_start"
 .LASF19:
 	.string	"uint32_t"
-.LASF360:
+.LASF379:
 	.string	"mem_malloc_brk"
-.LASF310:
+.LASF329:
 	.string	"net_gateway"
-.LASF350:
+.LASF369:
 	.string	"platdata_auto_alloc_size"
 .LASF66:
 	.string	"bi_memstart"
-.LASF234:
+.LASF398:
+	.string	"DECOM_LZ4"
+.LASF237:
 	.string	"UCLASS_VIDEO_CONSOLE"
-.LASF345:
+.LASF328:
+	.string	"eth_current"
+.LASF364:
 	.string	"ofdata_to_platdata"
 .LASF64:
 	.string	"reserved"
-.LASF419:
+.LASF462:
 	.string	"free"
-.LASF84:
+.LASF85:
 	.string	"bi_dram"
 .LASF2:
 	.string	"short unsigned int"
-.LASF95:
+.LASF96:
 	.string	"magic"
-.LASF142:
+.LASF143:
 	.string	"fit_hdr_setup"
-.LASF131:
+.LASF132:
 	.string	"legacy_hdr_valid"
 .LASF60:
 	.string	"base"
-.LASF217:
+.LASF219:
 	.string	"UCLASS_RTC"
-.LASF248:
+.LASF253:
 	.string	"timer_rate_hz"
 .LASF52:
 	.string	"sector_count"
-.LASF117:
+.LASF118:
 	.string	"ih_comp"
-.LASF369:
+.LASF388:
 	.string	"post_bind"
-.LASF392:
+.LASF425:
 	.string	"rockchip_secure_otp_write"
-.LASF344:
+.LASF363:
 	.string	"unbind"
-.LASF147:
+.LASF148:
 	.string	"ft_addr"
+.LASF247:
+	.string	"UCLASS_ETH_PHY"
+.LASF427:
+	.string	"temp"
 .LASF4:
 	.string	"uchar"
-.LASF148:
+.LASF149:
 	.string	"ft_len"
 .LASF47:
 	.string	"next"
-.LASF367:
+.LASF386:
 	.string	"data"
-.LASF143:
+.LASF198:
+	.string	"UCLASS_NOP"
+.LASF144:
 	.string	"fit_uname_setup"
 .LASF48:
 	.string	"prev"
-.LASF201:
+.LASF203:
 	.string	"UCLASS_PCH"
-.LASF202:
+.LASF204:
 	.string	"UCLASS_PCI"
-.LASF311:
+.LASF330:
 	.string	"net_netmask"
 .LASF33:
 	.string	"driver_data"
-.LASF86:
+.LASF87:
 	.string	"IRQ_STACK_START"
-.LASF168:
+.LASF169:
 	.string	"UCLASS_ADC"
-.LASF163:
+.LASF447:
+	.string	"px30_spl_rockchip_otp_stop"
+.LASF164:
 	.string	"UCLASS_SPI_EMUL"
-.LASF252:
+.LASF257:
 	.string	"tlb_size"
-.LASF415:
+.LASF457:
 	.string	"drivers/misc/rockchip-secure-otp.c"
-.LASF140:
+.LASF141:
 	.string	"fit_uname_fdt"
 	.ident	"GCC: (Linaro GCC 6.3-2017.05) 6.3.1 20170404"
 	.section	.note.GNU-stack,"",@progbits

commit d83e3037eea9717ca76cb1638f4e4dfc28788e25
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Dec 7 16:49:56 2020 +0800

    rockchip: rk3568: fixup cru node for legacy variant chip
    
    Implement weak function: rk_board_fdt_fixup().
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Id8ef49959220b145bb9219e456a3ae00cbb6bb13

diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c
index 4a6f31eadd..a202197bb7 100644
--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
@@ -9,6 +9,8 @@
 #include <asm/arch/hardware.h>
 #include <asm/arch/grf_rk3568.h>
 #include <asm/arch/rk_atags.h>
+#include <linux/libfdt.h>
+#include <dt-bindings/clock/rk3568-cru.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -33,7 +35,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define CRU_SOFTRST_CON26	0x468
 #define SGRF_BASE		0xFDD18000
 #define SGRF_SOC_CON4		0x10
-
+#define PMUGRF_SOC_CON15	0xfdc20100
 #define CPU_GRF_BASE		0xfdc30000
 #define GRF_CORE_PVTPLL_CON0	(0x10)
 
@@ -783,3 +785,51 @@ int spl_fit_standalone_release(uintptr_t entry_point)
 	return 0;
 }
 #endif
+
+#define CRU_NODE_FDT_PATH	"/clock-controller@fdd20000"
+#define CRU_RATE_CNT_MIN	6
+#define CRU_PARENT_CNT_MIN	3
+
+int rk_board_fdt_fixup(const void *blob)
+{
+	int node, len;
+	u32 *pp;
+
+	/* Don't go further if new variant */
+	if (readl(PMUGRF_SOC_CON15) & GENMASK(15, 14))
+		return 0;
+
+	node = fdt_path_offset(blob, CRU_NODE_FDT_PATH);
+	if (node < 0)
+		return 0;
+
+	/*
+	 * fixup as:
+	 *	rate[1] = <408000000>;	// ACLK_RKVDEC_PRE
+	 *	rate[2] = <408000000>;	// CLK_RKVDEC_CORE
+	 *	rate[5] = <408000000>;	// PLL_CPLL
+	 */
+	pp = (u32 *)fdt_getprop(blob, node, "assigned-clock-rates", &len);
+	if (!pp)
+		return 0;
+	if ((len / 4) >= CRU_RATE_CNT_MIN) {
+		pp[1] = cpu_to_fdt32(408000000);
+		pp[2] = cpu_to_fdt32(408000000);
+		pp[5] = cpu_to_fdt32(408000000);
+	}
+
+	/*
+	 * fixup as:
+	 *	parents[1] = <&cru PLL_CPLL>;
+	 *	parents[2] = <&cru PLL_CPLL>;
+	 */
+	pp = (u32 *)fdt_getprop(blob, node, "assigned-clock-parents", &len);
+	if (!pp)
+		return 0;
+	if ((len / 8) >= CRU_PARENT_CNT_MIN) {
+		pp[3] = cpu_to_fdt32(PLL_CPLL);
+		pp[5] = cpu_to_fdt32(PLL_CPLL);
+	}
+
+	return 0;
+}

commit aff7b241300fd295cffb670a05d78c400ba7a075
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Dec 7 17:03:36 2020 +0800

    configs: add rk3566.config which base on rk3568_defconfig
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ib57d3871d8adc0b4f6a6bb1a6e54eebca9d8cfd3

diff --git a/configs/rk3566.config b/configs/rk3566.config
new file mode 100644
index 0000000000..e695d41151
--- /dev/null
+++ b/configs/rk3566.config
@@ -0,0 +1,2 @@
+CONFIG_BASE_DEFCONFIG="rk3568_defconfig"
+CONFIG_LOADER_INI="RK3566MINIALL.ini"

commit 3b02c9fe3ae2db42314bc004de8cfbde1fe69fa3
Author: Shunqing Chen <csq@rock-chips.com>
Date:   Mon Dec 7 02:34:36 2020 +0000

    power: fg_cw201x: replace fdt functions
    
    Signed-off-by: Shunqing Chen <csq@rock-chips.com>
    Change-Id: Id03c367e619444f5f76ecbb36f831e09959d2888

diff --git a/drivers/power/fuel_gauge/fg_cw201x.c b/drivers/power/fuel_gauge/fg_cw201x.c
index 3af66d4888..6829290600 100755
--- a/drivers/power/fuel_gauge/fg_cw201x.c
+++ b/drivers/power/fuel_gauge/fg_cw201x.c
@@ -53,10 +53,10 @@ struct cw201x_info {
 	int divider_res1;
 	int divider_res2;
 	int hw_id_check;
-	int hw_id0;
-	int hw_id1;
+	struct gpio_desc hw_id0;
+	struct gpio_desc hw_id1;
 	int support_dc_adp;
-	int dc_det_gpio;
+	struct gpio_desc dc_det_gpio;
 	int dc_det_flag;
 };
 
@@ -103,14 +103,12 @@ static u16 cw201x_read_half_word(struct cw201x_info *cw201x, int reg)
 
 static int cw201x_ofdata_to_platdata(struct udevice *dev)
 {
-	const void *blob = gd->fdt_blob;
-	int node = dev_of_offset(dev);
 	struct cw201x_info *cw201x = dev_get_priv(dev);
 	int ret;
 	int len, size;
 	int hw_id0_val, hw_id1_val;
 
-	if (fdt_getprop(blob, node, "bat_config_info", &len)) {
+	if (dev_read_prop(dev, "bat_config_info", &len)) {
 		len /= sizeof(u32);
 		size = sizeof(*cw201x->cw_bat_config_info) * len;
 		cw201x->cw_bat_config_info = calloc(size, 1);
@@ -118,52 +116,46 @@ static int cw201x_ofdata_to_platdata(struct udevice *dev)
 			debug("calloc cw_bat_config_info fail\n");
 			return -EINVAL;
 		}
-		ret = fdtdec_get_int_array(blob, node,
-					   "bat_config_info",
-					   cw201x->cw_bat_config_info, len);
+		ret = dev_read_u32_array(dev, "bat_config_info",
+					 cw201x->cw_bat_config_info, len);
 		if (ret) {
 			debug("fdtdec_get cw_bat_config_info fail\n");
 			return -EINVAL;
 		}
 	}
 
-	cw201x->support_dc_adp = fdtdec_get_int(blob, node,
-						"support_dc_adp", 0);
-	if (cw201x->support_dc_adp) {
-		cw201x->dc_det_gpio = fdtdec_get_int(blob, node,
-						     "dc_det_gpio", 0);
-		if (!cw201x->dc_det_gpio)
-			return -EINVAL;
-		gpio_request(cw201x->dc_det_gpio, "dc_det_gpio");
-		gpio_direction_input(cw201x->dc_det_gpio);
-
-		cw201x->dc_det_flag = fdtdec_get_int(blob, node,
-						     "dc_det_flag", 0);
+	ret = gpio_request_by_name_nodev(dev_ofnode(dev), "dc_det_gpio",
+					 0, &cw201x->dc_det_gpio, GPIOD_IS_IN);
+	if (!ret) {
+		cw201x->support_dc_adp = 1;
+		debug("DC is valid\n");
+	} else {
+		debug("DC is invalid, ret=%d\n", ret);
 	}
 
-	cw201x->hw_id_check = fdtdec_get_int(blob, node, "hw_id_check", 0);
+	cw201x->hw_id_check = dev_read_u32_default(dev, "hw_id_check", 0);
 	if (cw201x->hw_id_check) {
-		cw201x->hw_id0 = fdtdec_get_int(blob, node, "hw_id0_gpio", 0);
-		if (!cw201x->hw_id0)
+		ret = gpio_request_by_name_nodev(dev_ofnode(dev),
+						 "hw_id0_gpio", 0,
+						 &cw201x->hw_id0, GPIOD_IS_IN);
+		if (ret)
 			return -EINVAL;
-		gpio_request(cw201x->hw_id0, "hw_id0_gpio");
-		gpio_direction_input(cw201x->hw_id0);
-		hw_id0_val = gpio_get_value(cw201x->hw_id0);
+		hw_id0_val = dm_gpio_get_value(&cw201x->hw_id0);
 
-		cw201x->hw_id1 = fdtdec_get_int(blob, node, "hw_id1_gpio", 0);
-		if (!cw201x->hw_id1)
+		ret = gpio_request_by_name_nodev(dev_ofnode(dev),
+						 "hw_id1_gpio", 0,
+						 &cw201x->hw_id1, GPIOD_IS_IN);
+		if (ret)
 			return -EINVAL;
-		gpio_request(cw201x->hw_id1, "hw_id1_gpio");
-		gpio_direction_input(cw201x->hw_id1);
-		hw_id1_val = gpio_get_value(cw201x->hw_id1);
+		hw_id1_val = dm_gpio_get_value(&cw201x->hw_id1);
 
 		/* ID1 = 0, ID0 = 1 : Battery */
 		if (!hw_id0_val || hw_id1_val)
 			return -EINVAL;
 	}
 
-	cw201x->divider_res1 = fdtdec_get_int(blob, node, "divider_res1", 0);
-	cw201x->divider_res2 = fdtdec_get_int(blob, node, "divider_res2", 0);
+	cw201x->divider_res1 = dev_read_u32_default(dev, "divider_res1", 0);
+	cw201x->divider_res2 = dev_read_u32_default(dev, "divider_res2", 0);
 
 	return 0;
 }
@@ -252,7 +244,7 @@ static int cw201x_get_usb_state(struct cw201x_info *cw201x)
 
 static bool cw201x_get_dc_state(struct cw201x_info *cw201x)
 {
-	if (gpio_get_value(cw201x->dc_det_gpio) == cw201x->dc_det_flag)
+	if (dm_gpio_get_value(&cw201x->dc_det_gpio))
 		return true;
 
 	return false;

commit 3511cb80a0ecf4a4c0b9700cfe7b2db6b135353a
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Thu Nov 26 12:02:46 2020 +0800

    cmd: net: Support BLK_MTD_CONT_WRITE
    
    Change-Id: I6127e05418228fef4b269101eb3b202f52af89d2
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/cmd/net.c b/cmd/net.c
index 8413dc0fb0..e2e476adad 100644
--- a/cmd/net.c
+++ b/cmd/net.c
@@ -128,7 +128,11 @@ int do_tftpflash(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	printf("## TFTP flash %s to partititon '%s' size 0x%lx ... ",
 	       argv[2], part_name, filesize);
 
+	if (dev_desc->if_type == IF_TYPE_MTD)
+		dev_desc->op_flag |= BLK_MTD_CONT_WRITE;
 	ret = blk_dwrite(dev_desc, part.start, blknum, (void *)fileaddr);
+	if (dev_desc->if_type == IF_TYPE_MTD)
+		dev_desc->op_flag &= ~(BLK_MTD_CONT_WRITE);
 	if (ret != blknum)
 		printf("Failed(%d)\n", ret);
 	else

commit 26dba18e917a023aea4376a9479f4b87f11577ee
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Dec 3 18:09:27 2020 +0800

    configs: rk3568: support pinctrl driver in spl
    
    So the sd iomux can be set in spl when the process is sd-boot.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I9bb1efc4c33a1433cc09ae8466bfd8f56ab8a2c9

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index cf741139f1..193189a7d3 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -74,7 +74,7 @@ CONFIG_CMD_MTD_BLK=y
 CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 # CONFIG_NET_TFTP_VARS is not set
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
@@ -119,6 +119,7 @@ CONFIG_PHYLIB=y
 CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
 CONFIG_POWER_FG_RK817=y
 CONFIG_IO_DOMAIN=y

commit a230447799928eda2b9f0c2bf4d7ba364ad3c110
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Dec 3 18:06:11 2020 +0800

    rockchip: dts: rk3568: support bring-up from sdmmc0
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I4c36e2968f4a82e64f8583ce20270edffd9c50e3

diff --git a/arch/arm/dts/rk3568-pinctrl.dtsi b/arch/arm/dts/rk3568-pinctrl.dtsi
index 427e5d1443..76a4281f8a 100644
--- a/arch/arm/dts/rk3568-pinctrl.dtsi
+++ b/arch/arm/dts/rk3568-pinctrl.dtsi
@@ -1499,7 +1499,7 @@
 				<1 RK_PA5 3 &pcfg_pull_none>;
 		};
 	};
-	sdmmc0 {
+	sdmmc0_pins: sdmmc0_pins {
 		sdmmc0_bus4: sdmmc0-bus4 {
 			rockchip,pins =
 				/* sdmmc0_d0 */
@@ -1514,7 +1514,7 @@
 		sdmmc0_clk: sdmmc0-clk {
 			rockchip,pins =
 				/* sdmmc0_clk */
-				<2 RK_PA2 1 &pcfg_pull_up_drv_level_1>;
+				<2 RK_PA2 1 &pcfg_pull_up_drv_level_2>;
 		};
 		sdmmc0_cmd: sdmmc0-cmd {
 			rockchip,pins =
diff --git a/arch/arm/dts/rk3568-u-boot.dtsi b/arch/arm/dts/rk3568-u-boot.dtsi
index d04f975615..67f1742b65 100644
--- a/arch/arm/dts/rk3568-u-boot.dtsi
+++ b/arch/arm/dts/rk3568-u-boot.dtsi
@@ -13,7 +13,7 @@
 
 	chosen {
 		stdout-path = &uart2;
-		u-boot,spl-boot-order = &sdhci, &nandc0, &spi_nand, &spi_nor;
+		u-boot,spl-boot-order = &sdmmc0, &sdhci, &nandc0, &spi_nand, &spi_nor;
 	};
 };
 
@@ -24,6 +24,8 @@
 &uart2 {
 	clock-frequency = <24000000>;
 	u-boot,dm-spl;
+	/delete-property/ pinctrl-names;
+	/delete-property/ pinctrl-0;
 	status = "okay";
 };
 
@@ -89,6 +91,8 @@
 
 &sfc {
 	u-boot,dm-spl;
+	/delete-property/ pinctrl-names;
+	/delete-property/ pinctrl-0;
 	/delete-property/ assigned-clocks;
 	/delete-property/ assigned-clock-rates;
 	status = "okay";
@@ -125,14 +129,38 @@
 	status = "okay";
 };
 
+&sdmmc0_pins {
+	u-boot,dm-spl;
+};
+
+&sdmmc0_bus4 {
+	u-boot,dm-spl;
+};
+
+&sdmmc0_clk {
+	u-boot,dm-spl;
+};
+
+&sdmmc0_cmd {
+	u-boot,dm-spl;
+};
+
+&sdmmc0_det {
+	u-boot,dm-spl;
+};
+
 &sdmmc1 {
 	u-boot,dm-spl;
+	/delete-property/ pinctrl-names;
+	/delete-property/ pinctrl-0;
 	status = "okay";
 };
 
 &sdhci {
 	bus-width = <8>;
 	u-boot,dm-spl;
+	/delete-property/ pinctrl-names;
+	/delete-property/ pinctrl-0;
 	mmc-hs200-1_8v;
 	status = "okay";
 };
@@ -142,6 +170,8 @@
 	status = "okay";
 	#address-cells = <1>;
 	#size-cells = <0>;
+	/delete-property/ pinctrl-names;
+	/delete-property/ pinctrl-0;
 
 	nand@0 {
 		u-boot,dm-spl;
@@ -151,3 +181,28 @@
 		nand-ecc-step-size = <1024>;
 	};
 };
+
+&pinctrl {
+	u-boot,dm-spl;
+	status = "okay";
+};
+
+&gpio0 {
+	u-boot,dm-spl;
+};
+
+&gpio1 {
+	u-boot,dm-spl;
+};
+
+&gpio2 {
+	u-boot,dm-spl;
+};
+
+&pcfg_pull_up_drv_level_2 {
+	u-boot,dm-spl;
+};
+
+&pcfg_pull_none {
+	u-boot,dm-spl;
+};
diff --git a/arch/arm/dts/rk3568.dtsi b/arch/arm/dts/rk3568.dtsi
index d7551cac8c..e258ac3705 100644
--- a/arch/arm/dts/rk3568.dtsi
+++ b/arch/arm/dts/rk3568.dtsi
@@ -1818,6 +1818,8 @@
 		fifo-depth = <0x100>;
 		resets = <&cru SRST_SDMMC0>;
 		reset-names = "reset";
+		pinctrl-names = "default";
+		pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_det &sdmmc0_bus4>;
 		status = "disabled";
 	};
 

commit 77e56285c14f492733e2a860497027f2fc482099
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Dec 3 17:54:26 2020 +0800

    clk: rockchip: rk3568: support set sdmmc0 clock
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ic7bdfce9a9551649e053f58b6d9219e73e6afed5

diff --git a/drivers/clk/rockchip/clk_rk3568.c b/drivers/clk/rockchip/clk_rk3568.c
index aff65c72b6..bea811c187 100644
--- a/drivers/clk/rockchip/clk_rk3568.c
+++ b/drivers/clk/rockchip/clk_rk3568.c
@@ -1416,6 +1416,7 @@ static ulong rk3568_sdmmc_get_clk(struct rk3568_clk_priv *priv, ulong clk_id)
 	u32 sel, con;
 
 	switch (clk_id) {
+	case HCLK_SDMMC0:
 	case CLK_SDMMC0:
 		con = readl(&cru->clksel_con[30]);
 		sel = (con & CLK_SDMMC0_SEL_MASK) >> CLK_SDMMC0_SEL_SHIFT;
@@ -1469,10 +1470,12 @@ static ulong rk3568_sdmmc_set_clk(struct rk3568_clk_priv *priv,
 	case 100 * MHz:
 		src_clk = CLK_SDMMC_SEL_100M;
 		break;
+	case 52 * MHz:
 	case 50 * MHz:
 		src_clk = CLK_SDMMC_SEL_50M;
 		break;
 	case 750 * KHz:
+	case 400 * KHz:
 		src_clk = CLK_SDMMC_SEL_750K;
 		break;
 	default:
@@ -1480,6 +1483,7 @@ static ulong rk3568_sdmmc_set_clk(struct rk3568_clk_priv *priv,
 	}
 
 	switch (clk_id) {
+	case HCLK_SDMMC0:
 	case CLK_SDMMC0:
 		rk_clrsetreg(&cru->clksel_con[30],
 			     CLK_SDMMC0_SEL_MASK,
@@ -2130,6 +2134,7 @@ static ulong rk3568_clk_get_rate(struct clk *clk)
 	case CLK_TSADC:
 		rate = rk3568_adc_get_clk(priv, clk->id);
 		break;
+	case HCLK_SDMMC0:
 	case CLK_SDMMC0:
 	case CLK_SDMMC1:
 	case CLK_SDMMC2:
@@ -2282,6 +2287,7 @@ static ulong rk3568_clk_set_rate(struct clk *clk, ulong rate)
 	case CLK_TSADC:
 		rate = rk3568_adc_set_clk(priv, clk->id, rate);
 		break;
+	case HCLK_SDMMC0:
 	case CLK_SDMMC0:
 	case CLK_SDMMC1:
 	case CLK_SDMMC2:

commit d6af9bf82466614031dbd129db06485ccdaa84e3
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Dec 3 17:51:48 2020 +0800

    rockchip: rk3568: set sdmmc0 to secure
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I8fbbc79e6e72dac688f0b46b2f961e97e80b7383

diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c
index 9e1a732f76..4a6f31eadd 100644
--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
@@ -738,8 +738,8 @@ int arch_cpu_init(void)
 	writel(0xffffffff, PMU_BASE_ADDR + PMU_NOC_AUTO_CON0);
 	writel(0x000f000f, PMU_BASE_ADDR + PMU_NOC_AUTO_CON1);
 
-	/* Set the emmc to secure */
-	writel(((0x3 << 11) << 16) | (0x0 << 11), SGRF_BASE + SGRF_SOC_CON4);
+	/* Set the emmc sdmmc0 to secure */
+	writel(((0x3 << 11 | 0x1 << 4) << 16), SGRF_BASE + SGRF_SOC_CON4);
 	/* set the emmc ds to level 2 */
 	writel(0x3f3f0707, GRF_BASE + GRF_GPIO1B_DS_2);
 	writel(0x3f3f0707, GRF_BASE + GRF_GPIO1B_DS_3);

commit f6d2779458839614d2c16857176e652e9d08d807
Author: zhangqing <zhangqing@rock-chips.com>
Date:   Tue Dec 1 16:50:31 2020 +0800

    clk: rockchip: rk3568: support more clk setting
    
    support cpll_xxx settings.
    
    Change-Id: I2735f6abe0fb02828b7ace76b58a60757199cab8
    Signed-off-by: zhangqing <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3568.h b/arch/arm/include/asm/arch-rockchip/cru_rk3568.h
index 2b562f0010..8f8b166aff 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3568.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3568.h
@@ -437,8 +437,30 @@ enum {
 	ACLK_TOP_HIGH_SEL_300M,
 	ACLK_TOP_HIGH_SEL_24M,
 
+	/* CRU_CLK_SEL78_CON */
+	CPLL_500M_DIV_SHIFT		= 8,
+	CPLL_500M_DIV_MASK		= 0x1f << CPLL_500M_DIV_SHIFT,
+
 	/* CRU_CLK_SEL79_CON */
+	CPLL_250M_DIV_SHIFT		= 8,
+	CPLL_250M_DIV_MASK		= 0x1f << CPLL_250M_DIV_SHIFT,
 	CPLL_333M_DIV_SHIFT		= 0,
 	CPLL_333M_DIV_MASK		= 0x1f << CPLL_333M_DIV_SHIFT,
+
+	/* CRU_CLK_SEL80_CON */
+	CPLL_62P5M_DIV_SHIFT		= 8,
+	CPLL_62P5M_DIV_MASK		= 0x1f << CPLL_62P5M_DIV_SHIFT,
+	CPLL_125M_DIV_SHIFT		= 0,
+	CPLL_125M_DIV_MASK		= 0x1f << CPLL_125M_DIV_SHIFT,
+
+	/* CRU_CLK_SEL81_CON */
+	CPLL_25M_DIV_SHIFT		= 8,
+	CPLL_25M_DIV_MASK		= 0x1f << CPLL_25M_DIV_SHIFT,
+	CPLL_50M_DIV_SHIFT		= 0,
+	CPLL_50M_DIV_MASK		= 0x1f << CPLL_50M_DIV_SHIFT,
+
+	/* CRU_CLK_SEL82_CON */
+	CPLL_100M_DIV_SHIFT		= 0,
+	CPLL_100M_DIV_MASK		= 0x1f << CPLL_100M_DIV_SHIFT,
 };
 #endif
diff --git a/drivers/clk/rockchip/clk_rk3568.c b/drivers/clk/rockchip/clk_rk3568.c
index effc6eeaad..aff65c72b6 100644
--- a/drivers/clk/rockchip/clk_rk3568.c
+++ b/drivers/clk/rockchip/clk_rk3568.c
@@ -57,6 +57,7 @@ static struct rockchip_pll_rate_table rk3568_pll_rates[] = {
 	RK3036_PLL_RATE(594000000, 1, 99, 4, 1, 1, 0),
 	RK3036_PLL_RATE(500000000, 1, 125, 6, 1, 1, 0),
 	RK3036_PLL_RATE(408000000, 1, 68, 2, 2, 1, 0),
+	RK3036_PLL_RATE(400000000, 1, 100, 6, 1, 1, 0),
 	RK3036_PLL_RATE(200000000, 1, 100, 6, 2, 1, 0),
 	RK3036_PLL_RATE(100000000, 1, 150, 6, 6, 1, 0),
 	{ /* sentinel */ },
@@ -81,7 +82,7 @@ static struct rockchip_pll_clock rk3568_pll_clks[] = {
 		     RK3568_PMU_MODE, 2, 10, 0, rk3568_pll_rates),
 };
 
-#if (!IS_ENABLED(CONFIG_SPL_BUILD))
+#ifndef CONFIG_SPL_BUILD
 #define RK3568_CLK_DUMP(_id, _name, _iscru)	\
 {						\
 	.id = _id,				\
@@ -111,8 +112,9 @@ static const struct rk3568_clk_info clks_dump[] = {
 };
 #endif
 
-static ulong rk3568_pmu_pll_set_rate(struct rk3568_clk_priv *priv,
-				     ulong pll_id, ulong rate)
+static ulong __maybe_unused
+rk3568_pmu_pll_set_rate(struct rk3568_clk_priv *priv,
+			ulong pll_id, ulong rate)
 {
 	struct udevice *pmucru_dev;
 	struct rk3568_pmuclk_priv *pmu_priv;
@@ -608,6 +610,119 @@ static int rk3568_armclk_set_clk(struct rk3568_clk_priv *priv, ulong hz)
 	return 0;
 }
 
+static ulong rk3568_cpll_div_get_rate(struct rk3568_clk_priv *priv,
+				      ulong clk_id)
+{
+	struct rk3568_cru *cru = priv->cru;
+	int div, mask, shift, con;
+
+	switch (clk_id) {
+	case CPLL_500M:
+		con = 78;
+		mask = CPLL_500M_DIV_MASK;
+		shift = CPLL_500M_DIV_SHIFT;
+		break;
+	case CPLL_333M:
+		con = 79;
+		mask = CPLL_333M_DIV_MASK;
+		shift = CPLL_333M_DIV_SHIFT;
+		break;
+	case CPLL_250M:
+		con = 79;
+		mask = CPLL_250M_DIV_MASK;
+		shift = CPLL_250M_DIV_SHIFT;
+		break;
+	case CPLL_125M:
+		con = 80;
+		mask = CPLL_125M_DIV_MASK;
+		shift = CPLL_125M_DIV_SHIFT;
+		break;
+	case CPLL_100M:
+		con = 82;
+		mask = CPLL_100M_DIV_MASK;
+		shift = CPLL_100M_DIV_SHIFT;
+		break;
+	case CPLL_62P5M:
+		con = 80;
+		mask = CPLL_62P5M_DIV_MASK;
+		shift = CPLL_62P5M_DIV_SHIFT;
+		break;
+	case CPLL_50M:
+		con = 81;
+		mask = CPLL_50M_DIV_MASK;
+		shift = CPLL_50M_DIV_SHIFT;
+		break;
+	case CPLL_25M:
+		con = 81;
+		mask = CPLL_25M_DIV_MASK;
+		shift = CPLL_25M_DIV_SHIFT;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	div = (readl(&cru->clksel_con[con]) & mask) >> shift;
+	return DIV_TO_RATE(priv->cpll_hz, div);
+}
+
+static ulong rk3568_cpll_div_set_rate(struct rk3568_clk_priv *priv,
+				      ulong clk_id, ulong rate)
+{
+	struct rk3568_cru *cru = priv->cru;
+	int div, mask, shift, con;
+
+	switch (clk_id) {
+	case CPLL_500M:
+		con = 78;
+		mask = CPLL_500M_DIV_MASK;
+		shift = CPLL_500M_DIV_SHIFT;
+		break;
+	case CPLL_333M:
+		con = 79;
+		mask = CPLL_333M_DIV_MASK;
+		shift = CPLL_333M_DIV_SHIFT;
+		break;
+	case CPLL_250M:
+		con = 79;
+		mask = CPLL_250M_DIV_MASK;
+		shift = CPLL_250M_DIV_SHIFT;
+		break;
+	case CPLL_125M:
+		con = 80;
+		mask = CPLL_125M_DIV_MASK;
+		shift = CPLL_125M_DIV_SHIFT;
+		break;
+	case CPLL_100M:
+		con = 82;
+		mask = CPLL_100M_DIV_MASK;
+		shift = CPLL_100M_DIV_SHIFT;
+		break;
+	case CPLL_62P5M:
+		con = 80;
+		mask = CPLL_62P5M_DIV_MASK;
+		shift = CPLL_62P5M_DIV_SHIFT;
+		break;
+	case CPLL_50M:
+		con = 81;
+		mask = CPLL_50M_DIV_MASK;
+		shift = CPLL_50M_DIV_SHIFT;
+		break;
+	case CPLL_25M:
+		con = 81;
+		mask = CPLL_25M_DIV_MASK;
+		shift = CPLL_25M_DIV_SHIFT;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	div = DIV_ROUND_UP(priv->cpll_hz, rate);
+	assert(div - 1 <= 31);
+	rk_clrsetreg(&cru->clksel_con[con],
+		     mask, (div - 1) << shift);
+	return rk3568_cpll_div_get_rate(priv, clk_id);
+}
+
 static ulong rk3568_bus_get_clk(struct rk3568_clk_priv *priv, ulong clk_id)
 {
 	struct rk3568_cru *cru = priv->cru;
@@ -1559,6 +1674,7 @@ static ulong rk3568_emmc_set_clk(struct rk3568_clk_priv *priv, ulong rate)
 	return rk3568_emmc_get_clk(priv);
 }
 
+#ifndef CONFIG_SPL_BUILD
 static ulong rk3568_aclk_vop_get_clk(struct rk3568_clk_priv *priv)
 {
 	struct rk3568_cru *cru = priv->cru;
@@ -1900,7 +2016,7 @@ static ulong rk3568_gmac_tx_rx_set_clk(struct rk3568_clk_priv *priv,
 	return 0;
 }
 
-static ulong rk3568_ebc_get_clk(struct rk3568_clk_priv *priv, ulong clk_id)
+static ulong rk3568_ebc_get_clk(struct rk3568_clk_priv *priv)
 {
 	struct rk3568_cru *cru = priv->cru;
 	u32 con, div, p_rate;
@@ -1908,8 +2024,6 @@ static ulong rk3568_ebc_get_clk(struct rk3568_clk_priv *priv, ulong clk_id)
 	con = readl(&cru->clksel_con[79]);
 	div = (con & CPLL_333M_DIV_MASK) >> CPLL_333M_DIV_SHIFT;
 	p_rate = DIV_TO_RATE(priv->cpll_hz, div);
-	if (clk_id == CPLL_333M)
-		return p_rate;
 
 	con = readl(&cru->clksel_con[43]);
 	div = (con & DCLK_EBC_SEL_MASK) >> DCLK_EBC_SEL_SHIFT;
@@ -1925,8 +2039,7 @@ static ulong rk3568_ebc_get_clk(struct rk3568_clk_priv *priv, ulong clk_id)
 	}
 }
 
-static ulong rk3568_ebc_set_clk(struct rk3568_clk_priv *priv,
-				ulong clk_id, ulong rate)
+static ulong rk3568_ebc_set_clk(struct rk3568_clk_priv *priv, ulong rate)
 {
 	struct rk3568_cru *cru = priv->cru;
 	int src_clk_div;
@@ -1936,13 +2049,13 @@ static ulong rk3568_ebc_set_clk(struct rk3568_clk_priv *priv,
 	rk_clrsetreg(&cru->clksel_con[79],
 		     CPLL_333M_DIV_MASK,
 		     (src_clk_div - 1) << CPLL_333M_DIV_SHIFT);
-	if (clk_id == DCLK_EBC)
-		rk_clrsetreg(&cru->clksel_con[43],
-			     DCLK_EBC_SEL_MASK,
-			     DCLK_EBC_SEL_CPLL_333M << DCLK_EBC_SEL_SHIFT);
+	rk_clrsetreg(&cru->clksel_con[43],
+		     DCLK_EBC_SEL_MASK,
+		     DCLK_EBC_SEL_CPLL_333M << DCLK_EBC_SEL_SHIFT);
 
-	return rk3568_ebc_get_clk(priv, clk_id);
+	return rk3568_ebc_get_clk(priv);
 }
+#endif
 
 static ulong rk3568_clk_get_rate(struct clk *clk)
 {
@@ -2031,6 +2144,7 @@ static ulong rk3568_clk_get_rate(struct clk *clk)
 	case CCLK_EMMC:
 		rate = rk3568_emmc_get_clk(priv);
 		break;
+#ifndef CONFIG_SPL_BUILD
 	case ACLK_VOP:
 		rate = rk3568_aclk_vop_get_clk(priv);
 		break;
@@ -2061,10 +2175,10 @@ static ulong rk3568_clk_get_rate(struct clk *clk)
 	case CLK_GMAC1_PTP_REF:
 		rate = rk3568_gmac_ptp_ref_get_clk(priv, 1);
 		break;
-	case CPLL_333M:
 	case DCLK_EBC:
-		rate = rk3568_ebc_get_clk(priv, clk->id);
+		rate = rk3568_ebc_get_clk(priv);
 		break;
+#endif
 	case ACLK_SECURE_FLASH:
 	case ACLK_CRYPTO_NS:
 	case HCLK_SECURE_FLASH:
@@ -2074,6 +2188,16 @@ static ulong rk3568_clk_get_rate(struct clk *clk)
 	case CLK_CRYPTO_NS_PKA:
 		rate = rk3568_crypto_get_rate(priv, clk->id);
 		break;
+	case CPLL_500M:
+	case CPLL_333M:
+	case CPLL_250M:
+	case CPLL_125M:
+	case CPLL_100M:
+	case CPLL_62P5M:
+	case CPLL_50M:
+	case CPLL_25M:
+		rate = rk3568_cpll_div_get_rate(priv, clk->id);
+		break;
 	default:
 		return -ENOENT;
 	}
@@ -2101,10 +2225,14 @@ static ulong rk3568_clk_set_rate(struct clk *clk, ulong rate)
 	case PLL_CPLL:
 		ret = rockchip_pll_set_rate(&rk3568_pll_clks[CPLL], priv->cru,
 					    CPLL, rate);
+		priv->cpll_hz = rockchip_pll_get_rate(&rk3568_pll_clks[CPLL],
+						      priv->cru, CPLL);
 		break;
 	case PLL_GPLL:
 		ret = rockchip_pll_set_rate(&rk3568_pll_clks[GPLL], priv->cru,
 					    GPLL, rate);
+		priv->gpll_hz = rockchip_pll_get_rate(&rk3568_pll_clks[GPLL],
+						      priv->cru, GPLL);
 		break;
 	case PLL_NPLL:
 		ret = rockchip_pll_set_rate(&rk3568_pll_clks[NPLL], priv->cru,
@@ -2113,6 +2241,9 @@ static ulong rk3568_clk_set_rate(struct clk *clk, ulong rate)
 	case PLL_VPLL:
 		ret = rockchip_pll_set_rate(&rk3568_pll_clks[VPLL], priv->cru,
 					    VPLL, rate);
+		priv->vpll_hz = rockchip_pll_get_rate(&rk3568_pll_clks[VPLL],
+						      priv->cru,
+						      VPLL);
 		break;
 	case ACLK_BUS:
 	case PCLK_BUS:
@@ -2165,6 +2296,7 @@ static ulong rk3568_clk_set_rate(struct clk *clk, ulong rate)
 	case CCLK_EMMC:
 		rate = rk3568_emmc_set_clk(priv, rate);
 		break;
+#ifndef CONFIG_SPL_BUILD
 	case ACLK_VOP:
 		rate = rk3568_aclk_vop_set_clk(priv, rate);
 		break;
@@ -2201,10 +2333,10 @@ static ulong rk3568_clk_set_rate(struct clk *clk, ulong rate)
 	case CLK_GMAC1_PTP_REF:
 		rate = rk3568_gmac_ptp_ref_set_clk(priv, 1, rate);
 		break;
-	case CPLL_333M:
 	case DCLK_EBC:
-		rate = rk3568_ebc_set_clk(priv, clk->id, rate);
+		rate = rk3568_ebc_set_clk(priv, rate);
 		break;
+#endif
 	case ACLK_SECURE_FLASH:
 	case ACLK_CRYPTO_NS:
 	case HCLK_SECURE_FLASH:
@@ -2214,6 +2346,16 @@ static ulong rk3568_clk_set_rate(struct clk *clk, ulong rate)
 	case CLK_CRYPTO_NS_PKA:
 		rate = rk3568_crypto_set_rate(priv, clk->id, rate);
 		break;
+	case CPLL_500M:
+	case CPLL_333M:
+	case CPLL_250M:
+	case CPLL_125M:
+	case CPLL_100M:
+	case CPLL_62P5M:
+	case CPLL_50M:
+	case CPLL_25M:
+		rate = rk3568_cpll_div_set_rate(priv, clk->id, rate);
+		break;
 	default:
 		return -ENOENT;
 	}
@@ -2617,7 +2759,7 @@ U_BOOT_DRIVER(rockchip_rk3568_cru) = {
 	.probe		= rk3568_clk_probe,
 };
 
-#if (!IS_ENABLED(CONFIG_SPL_BUILD))
+#ifndef CONFIG_SPL_BUILD
 /**
  * soc_clk_dump() - Print clock frequencies
  * Returns zero on success

commit da3c693fb06fbd51d2fdc6711934e07472ceb366
Author: zhangqing <zhangqing@rock-chips.com>
Date:   Tue Dec 1 16:49:22 2020 +0800

    rockchip: dts: rk3568: Resync from kernel-4.19
    
    Resync from kernel-4.19:
    (I5f310f9b857 clk: rockchip: rk3568: export cpll_xxx clk id for more
    function)
    
    Change-Id: I4f5ea86ed73272dc3381ba27d1c56284fa17d546
    Signed-off-by: zhangqing <zhangqing@rock-chips.com>

diff --git a/include/dt-bindings/clock/rk3568-cru.h b/include/dt-bindings/clock/rk3568-cru.h
index 236c792566..566a043848 100644
--- a/include/dt-bindings/clock/rk3568-cru.h
+++ b/include/dt-bindings/clock/rk3568-cru.h
@@ -471,6 +471,14 @@
 #define CLK_I2S2_2CH		408
 #define CLK_I2S3_2CH_TX		409
 #define CLK_I2S3_2CH_RX		410
+#define CPLL_500M		411
+#define CPLL_250M		412
+#define CPLL_125M		413
+#define CPLL_62P5M		414
+#define CPLL_50M		415
+#define CPLL_25M		416
+#define CPLL_100M		417
+
 #define PCLK_CORE_PVTM		450
 
 #define CLK_NR_CLKS		(PCLK_CORE_PVTM + 1)

commit d62fa5822469b1dfaebec34f787b36192535024d
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Sun Dec 6 16:16:23 2020 +0800

    mmc: sdhci: rockchip: reset the clock phase
    
    Reset the clock phase when the frequency is lower than 52MHz.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I49c50779ab5e1103d815cd2be1a7c9603cea397a

diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index 6cb9d246e7..56105702b4 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -347,6 +347,14 @@ static int rk3568_sdhci_emmc_set_clock(struct sdhci_host *host, unsigned int clo
 		extra = DWCMSHC_EMMC_DLL_DLYENA |
 			DLL_STRBIN_TAPNUM_DEFAULT;
 		sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_STRBIN);
+		udelay(1);
+	} else {
+		/* reset the clock phase when the frequency is lower than 52MHz */
+		extra = DLL_RXCLK_NO_INVERTER << DWCMSHC_EMMC_DLL_RXCLK_SRCSEL;
+		sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_RXCLK);
+		sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_TXCLK);
+		sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_STRBIN);
+		udelay(1);
 	}
 
 	return ret;

commit 3c703382107de575d332b337494bb7680c70fa30
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Thu Dec 3 19:14:28 2020 +0800

    rkflash: Support new spinor
    
    1.Support XT25F256BSFIGU, P25Q32SH-SSH-IT
    2.Fix PUYA devices property
    
    Change-Id: I6c5ff381770508962f8ed16189d03385f511d84f
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/sfc_nor.c b/drivers/rkflash/sfc_nor.c
index b28d43a49d..17b1a1bc47 100644
--- a/drivers/rkflash/sfc_nor.c
+++ b/drivers/rkflash/sfc_nor.c
@@ -70,6 +70,8 @@ static struct flash_info spi_flash_tbl[] = {
 	{ 0x0b4017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 14, 9, 0 },
 	/* XT25F128BSSIGU */
 	{ 0x0b4018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 15, 9, 0 },
+	/* XT25F256BSFIGU */
+	{ 0x0b4019, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 16, 9, 0 },
 
 	/* EN25QH64A */
 	{ 0x1c7017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 0, 0 },
@@ -92,9 +94,13 @@ static struct flash_info spi_flash_tbl[] = {
 	{ 0x5e5018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 9, 0 },
 
 	/* BH25Q128AS */
-	{ 0x684018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x04, 15, 9, 0 },
+	{ 0x684018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 9, 0 },
 	/* BH25Q64BS */
-	{ 0x684017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x04, 14, 9, 0 },
+	{ 0x684017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0 },
+	/* P25Q64H */
+	{ 0x856017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0 },
+	/* P25Q32SH-SSH-IT */
+	{ 0x856016, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 13, 9, 0 },
 
 	/* FM25Q128A */
 	{ 0xA14018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 9, 0 },
@@ -103,8 +109,6 @@ static struct flash_info spi_flash_tbl[] = {
 
 	/* FM25Q64A */
 	{ 0xf83217, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 14, 9, 0 },
-	/* P25Q64H */
-	{ 0x856017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0 },
 };
 
 static int snor_write_en(void)

commit a097a4fc3abc18a449b6940c629c1e2e2aec6709
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Thu Dec 3 19:12:09 2020 +0800

    rkflash: Support spinor prog_addr_lines
    
    Convenient for spinor detection
    
    Change-Id: Id9e09de26ffa978f18a97d8f0555c70ee0baa22c
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/sfc_nor.c b/drivers/rkflash/sfc_nor.c
index 7d4c1db756..b28d43a49d 100644
--- a/drivers/rkflash/sfc_nor.c
+++ b/drivers/rkflash/sfc_nor.c
@@ -338,8 +338,7 @@ int snor_prog_page(struct SFNOR_DEV *p_dev,
 	op.sfctrl.d32 = 0;
 	op.sfctrl.b.datalines = p_dev->prog_lines;
 	op.sfctrl.b.enbledma = 1;
-	if (p_dev->prog_lines == DATA_LINES_X4)
-		op.sfctrl.b.addrlines = SFC_4BITS_LINE;
+	op.sfctrl.b.addrlines = p_dev->prog_addr_lines;
 
 	if (p_dev->addr_mode == ADDR_MODE_4BYTE)
 		op.sfcmd.b.addrbits = SFC_ADDR_32BITS;
@@ -643,6 +642,10 @@ static int snor_parse_flash_table(struct SFNOR_DEV *p_dev,
 		    p_dev->read_lines == DATA_LINES_X4) {
 			p_dev->prog_lines = DATA_LINES_X4;
 			p_dev->prog_cmd = g_spi_flash_info->prog_cmd_4;
+			if ((p_dev->manufacturer == MID_MACRONIX) &&
+			    (p_dev->prog_cmd == CMD_PAGE_PROG_A4 ||
+			     p_dev->prog_cmd == CMD_PAGE_PROG_4PP))
+				p_dev->prog_addr_lines = DATA_LINES_X4;
 		}
 
 		if (g_spi_flash_info->feature & FEA_4BYTE_ADDR)
@@ -687,6 +690,7 @@ int snor_init(struct SFNOR_DEV *p_dev)
 		p_dev->sec_erase_cmd = CMD_SECTOR_ERASE;
 		p_dev->blk_erase_cmd = CMD_BLOCK_ERASE;
 		p_dev->prog_lines = DATA_LINES_X1;
+		p_dev->prog_addr_lines = DATA_LINES_X1;
 		p_dev->read_lines = DATA_LINES_X1;
 		p_dev->write_status = snor_write_status;
 		snor_reset_device();
diff --git a/drivers/rkflash/sfc_nor.h b/drivers/rkflash/sfc_nor.h
index e564b8ed1a..43a7caf50b 100644
--- a/drivers/rkflash/sfc_nor.h
+++ b/drivers/rkflash/sfc_nor.h
@@ -61,6 +61,8 @@
 #define CMD_PAGE_PROG_X4        (0x32)
 /* X1 cmd, X4 addr, X4 data, SUPPORT MARCONIX */
 #define CMD_PAGE_PROG_A4        (0x38)
+/* X1 cmd, X4 addr, X4 data, SUPPORT MARCONIX */
+#define CMD_PAGE_PROG_4PP       (0x3E)
 #define CMD_RESET_NAND          (0xFF)
 #define CMD_ENTER_4BYTE_MODE    (0xB7)
 #define CMD_EXIT_4BYTE_MODE     (0xE9)
@@ -110,6 +112,7 @@ struct SFNOR_DEV {
 
 	enum SFC_DATA_LINES read_lines;
 	enum SFC_DATA_LINES prog_lines;
+	enum SFC_DATA_LINES prog_addr_lines;
 
 	SNOR_WRITE_STATUS write_status;
 	u32 max_iosize;

commit 49eba1a38af4a5e597bddd957f12dae2a3d6b9f9
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Thu Dec 3 19:10:56 2020 +0800

    rkflash: Support sfc DLL api
    
    Change-Id: Ibe8cd0d1e72e8dc871466dcb1014e6817b184e80
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/sfc.c b/drivers/rkflash/sfc.c
index c9be08e794..a8fed5d30b 100644
--- a/drivers/rkflash/sfc.c
+++ b/drivers/rkflash/sfc.c
@@ -21,10 +21,12 @@ static void sfc_reset(void)
 	int timeout = 10000;
 
 	writel(SFC_RESET, g_sfc_reg + SFC_RCVR);
+
 	while ((readl(g_sfc_reg + SFC_RCVR) == SFC_RESET) && (timeout > 0)) {
 		sfc_delay(1);
 		timeout--;
 	}
+
 	writel(0xFFFFFFFF, g_sfc_reg + SFC_ICLR);
 }
 
@@ -41,10 +43,29 @@ u32 sfc_get_max_iosize(void)
 		return SFC_MAX_IOSIZE_VER3;
 }
 
+void sfc_set_delay_lines(u16 cells)
+{
+	u16 cell_max = SCLK_SMP_SEL_MAX_V4;
+
+	if (sfc_get_version() >= SFC_VER_5)
+		cell_max = SCLK_SMP_SEL_MAX_V5;
+
+	if (cells > cell_max)
+		cells = cell_max;
+
+	writel(SCLK_SMP_SEL_EN | cells, g_sfc_reg + SFC_DLL_CTRL0);
+}
+
+void sfc_disable_delay_lines(void)
+{
+	writel(0, g_sfc_reg + SFC_DLL_CTRL0);
+}
+
 int sfc_init(void __iomem *reg_addr)
 {
 	g_sfc_reg = reg_addr;
 	writel(0, g_sfc_reg + SFC_CTRL);
+
 	if (sfc_get_version() >= SFC_VER_4)
 		writel(1, g_sfc_reg + SFC_LEN_CTRL);
 
@@ -65,23 +86,29 @@ int sfc_request(struct rk_sfc_op *op, u32 addr, void *data, u32 size)
 	int timeout = 0;
 
 	reg = readl(g_sfc_reg + SFC_FSR);
+
 	if (!(reg & SFC_TXEMPTY) || !(reg & SFC_RXEMPTY) ||
 	    (readl(g_sfc_reg + SFC_SR) & SFC_BUSY))
 		sfc_reset();
 
 	cmd.d32 = op->sfcmd.d32;
+
 	if (cmd.b.addrbits == SFC_ADDR_XBITS) {
 		union SFCCTRL_DATA ctrl;
 
 		ctrl.d32 = op->sfctrl.d32;
+
 		if (!ctrl.b.addrbits)
 			return SFC_PARAM_ERR;
+
 		/* Controller plus 1 automatically */
 		writel(ctrl.b.addrbits - 1, g_sfc_reg + SFC_ABIT);
 	}
+
 	/* shift in the data at negedge sclk_out */
 	op->sfctrl.d32 |= 0x2;
 	cmd.b.datasize = size;
+
 	if (sfc_get_version() >= SFC_VER_4)
 		writel(size, g_sfc_reg + SFC_LEN_EXT);
 	else
@@ -89,10 +116,13 @@ int sfc_request(struct rk_sfc_op *op, u32 addr, void *data, u32 size)
 
 	writel(op->sfctrl.d32, g_sfc_reg + SFC_CTRL);
 	writel(cmd.d32, g_sfc_reg + SFC_CMD);
+
 	if (cmd.b.addrbits)
 		writel(addr, g_sfc_reg + SFC_ADDR);
+
 	if (!size)
 		goto exit_wait;
+
 	if (op->sfctrl.b.enbledma) {
 		struct bounce_buffer bb;
 		unsigned int bb_flags;
@@ -112,10 +142,13 @@ int sfc_request(struct rk_sfc_op *op, u32 addr, void *data, u32 size)
 		writel(SFC_DMA_START, g_sfc_reg + SFC_DMA_TRIGGER);
 
 		timeout = size * 10;
+
 		while ((readl(g_sfc_reg + SFC_SR) & SFC_BUSY) &&
 		       (timeout-- > 0))
 			sfc_delay(1);
+
 		writel(0xFFFFFFFF, g_sfc_reg + SFC_ICLR);
+
 		if (timeout <= 0)
 			ret = SFC_WAIT_TIMEOUT;
 		bounce_buffer_stop(&bb);
@@ -126,21 +159,27 @@ int sfc_request(struct rk_sfc_op *op, u32 addr, void *data, u32 size)
 
 		if (cmd.b.rw == SFC_WRITE) {
 			words  = (size + 3) >> 2;
+
 			while (words) {
 				fifostat.d32 = readl(g_sfc_reg + SFC_FSR);
+
 				if (fifostat.b.txlevel > 0) {
 					count = words < fifostat.b.txlevel ?
 						words : fifostat.b.txlevel;
+
 					for (i = 0; i < count; i++) {
 						writel(*p_data++,
 						       g_sfc_reg + SFC_DATA);
 						words--;
 					}
+
 					if (words == 0)
 						break;
+
 					timeout = 0;
 				} else {
 					sfc_delay(1);
+
 					if (timeout++ > 10000) {
 						ret = SFC_TX_TIMEOUT;
 						break;
@@ -151,8 +190,10 @@ int sfc_request(struct rk_sfc_op *op, u32 addr, void *data, u32 size)
 			/* SFC_READ == cmd.b.rw */
 			bytes = size & 0x3;
 			words = size >> 2;
+
 			while (words) {
 				fifostat.d32 = readl(g_sfc_reg + SFC_FSR);
+
 				if (fifostat.b.rxlevel > 0) {
 					u32 count;
 
@@ -164,11 +205,14 @@ int sfc_request(struct rk_sfc_op *op, u32 addr, void *data, u32 size)
 								  SFC_DATA);
 						words--;
 					}
+
 					if (words == 0)
 						break;
+
 					timeout = 0;
 				} else {
 					sfc_delay(1);
+
 					if (timeout++ > 10000) {
 						ret = SFC_RX_TIMEOUT;
 						break;
@@ -177,19 +221,24 @@ int sfc_request(struct rk_sfc_op *op, u32 addr, void *data, u32 size)
 			}
 
 			timeout = 0;
+
 			while (bytes) {
 				fifostat.d32 = readl(g_sfc_reg + SFC_FSR);
+
 				if (fifostat.b.rxlevel > 0) {
 					u8 *p_data1 = (u8 *)p_data;
 
 					words = readl(g_sfc_reg + SFC_DATA);
+
 					for (i = 0; i < bytes; i++)
 						p_data1[i] =
-						(u8)((words >> (i * 8)) & 0xFF);
+							(u8)((words >> (i * 8)) & 0xFF);
+
 					break;
 				}
 
 				sfc_delay(1);
+
 				if (timeout++ > 10000) {
 					ret = SFC_RX_TIMEOUT;
 					break;
@@ -200,13 +249,16 @@ int sfc_request(struct rk_sfc_op *op, u32 addr, void *data, u32 size)
 
 exit_wait:
 	timeout = 0;    /* wait cmd or data send complete */
+
 	while (readl(g_sfc_reg + SFC_SR) & SFC_BUSY) {
 		sfc_delay(1);
+
 		if (timeout++ > 100000) {         /* wait 100ms */
 			ret = SFC_TX_TIMEOUT;
 			break;
 		}
 	}
+
 	sfc_delay(1); /* CS# High Time (read/write) >100ns */
 	return ret;
 }
diff --git a/drivers/rkflash/sfc.h b/drivers/rkflash/sfc.h
index a5c6b10c51..ee6b02036c 100644
--- a/drivers/rkflash/sfc.h
+++ b/drivers/rkflash/sfc.h
@@ -9,6 +9,7 @@
 
 #define SFC_VER_3		0x3
 #define SFC_VER_4		0x4
+#define SFC_VER_5		0x5
 
 #define SFC_EN_INT		(0)         /* enable interrupt */
 #define SFC_EN_DMA		(1)         /* enable dma */
@@ -67,6 +68,11 @@
 /* SFC_RCVR Register */
 #define SFC_RESET	BIT(0)     /* controller reset */
 
+/* SFC_DLL_CTRL Register */
+#define SCLK_SMP_SEL_EN		BIT(15)	/* SCLK Sampling Selection */
+#define SCLK_SMP_SEL_MAX_V4	0xFF	/* SCLK Sampling Selection */
+#define SCLK_SMP_SEL_MAX_V5	0x1FF	/* SCLK Sampling Selection */
+
 /* SFC_SR Register */
 /* sfc busy flag. When busy, don't try to set the control register */
 #define SFC_BUSY	BIT(0)
@@ -88,6 +94,7 @@
 #define SFC_RAWISR	0x28
 #define SFC_VER		0x2C
 #define SFC_QOP		0x30
+#define SFC_DLL_CTRL0	0x3C
 #define SFC_DMA_TRIGGER	0x80
 #define SFC_DMA_ADDR	0x84
 #define SFC_LEN_CTRL	0x88
@@ -209,6 +216,8 @@ int sfc_request(struct rk_sfc_op *op, u32 addr, void *data, u32 size);
 u16 sfc_get_version(void);
 void sfc_clean_irq(void);
 u32 sfc_get_max_iosize(void);
+void sfc_set_delay_lines(u16 cells);
+void sfc_disable_delay_lines(void);
 int rksfc_get_reg_addr(unsigned long *p_sfc_addr);
 
 #endif

commit 5b0bc491775b5fbdb7c2928102abff2e61be3376
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Dec 8 18:00:07 2019 +0800

    lib: avb: support crypto sha256/512
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ifbcc1940d9b494fc488c0b9e95f88d7c98604f62

diff --git a/include/android_avb/avb_sha.h b/include/android_avb/avb_sha.h
index 0b0db8b8d9..7d8455929d 100644
--- a/include/android_avb/avb_sha.h
+++ b/include/android_avb/avb_sha.h
@@ -39,8 +39,12 @@
 extern "C" {
 #endif
 
+#ifdef CONFIG_DM_CRYPTO
+#include <crypto.h>
+#endif
 #include <android_avb/avb_crypto.h>
 #include <android_avb/avb_sysdeps.h>
+#include <dm/device.h>
 
 /* Block size in bytes of a SHA-256 digest. */
 #define AVB_SHA256_BLOCK_SIZE 64
@@ -56,6 +60,10 @@ typedef struct {
   size_t len;
   uint8_t block[2 * AVB_SHA256_BLOCK_SIZE];
   uint8_t buf[AVB_SHA256_DIGEST_SIZE]; /* Used for storing the final digest. */
+#ifdef CONFIG_DM_CRYPTO
+  struct udevice *crypto_dev;
+  sha_context crypto_ctx;
+#endif
 } AvbSHA256Ctx;
 
 /* Data structure used for SHA-512. */
@@ -65,6 +73,10 @@ typedef struct {
   size_t len;
   uint8_t block[2 * AVB_SHA512_BLOCK_SIZE];
   uint8_t buf[AVB_SHA512_DIGEST_SIZE]; /* Used for storing the final digest. */
+#ifdef CONFIG_DM_CRYPTO
+  struct udevice *crypto_dev;
+  sha_context crypto_ctx;
+#endif
 } AvbSHA512Ctx;
 
 /* Initializes the SHA-256 context. */
diff --git a/lib/avb/libavb/avb_sha256.c b/lib/avb/libavb/avb_sha256.c
index 6e1d58fe2a..de0306384b 100644
--- a/lib/avb/libavb/avb_sha256.c
+++ b/lib/avb/libavb/avb_sha256.c
@@ -36,7 +36,33 @@
  */
 
 #include <android_avb/avb_sha.h>
+#include <android_avb/avb_util.h>
 
+#ifdef CONFIG_DM_CRYPTO
+void avb_sha256_init(AvbSHA256Ctx* ctx) {
+  ctx->crypto_ctx.algo = CRYPTO_SHA256;
+  ctx->crypto_ctx.length = ctx->tot_len;
+  memset(ctx->buf, 0, sizeof(ctx->buf));
+
+  ctx->crypto_dev = crypto_get_device(ctx->crypto_ctx.algo);
+  if (!ctx->crypto_dev)
+    avb_error("Can't get sha256 crypto device\n");
+  else
+    crypto_sha_init(ctx->crypto_dev, &ctx->crypto_ctx);
+}
+
+void avb_sha256_update(AvbSHA256Ctx* ctx, const uint8_t* data, size_t len) {
+  if (ctx->crypto_dev)
+    crypto_sha_update(ctx->crypto_dev, (u32 *)data, len);
+}
+
+uint8_t* avb_sha256_final(AvbSHA256Ctx* ctx) {
+  if (ctx->crypto_dev)
+    crypto_sha_final(ctx->crypto_dev, &ctx->crypto_ctx, ctx->buf);
+
+  return ctx->buf;
+}
+#else
 #define SHFR(x, n) (x >> n)
 #define ROTR(x, n) ((x >> n) | (x << ((sizeof(x) << 3) - n)))
 #define ROTL(x, n) ((x << n) | (x >> ((sizeof(x) << 3) - n)))
@@ -400,3 +426,4 @@ uint8_t* avb_sha256_final(AvbSHA256Ctx* ctx) {
 
   return ctx->buf;
 }
+#endif
diff --git a/lib/avb/libavb/avb_sha512.c b/lib/avb/libavb/avb_sha512.c
index 724781cc7f..d3e437b4a4 100644
--- a/lib/avb/libavb/avb_sha512.c
+++ b/lib/avb/libavb/avb_sha512.c
@@ -36,7 +36,35 @@
  */
 
 #include <android_avb/avb_sha.h>
+#include <android_avb/avb_util.h>
 
+/* Crypto-v1 is not support sha512 */
+#ifdef CONFIG_ROCKCHIP_CRYPTO_V2
+void avb_sha512_init(AvbSHA512Ctx* ctx) {
+  ctx->crypto_ctx.algo = CRYPTO_SHA512;
+  ctx->crypto_ctx.length = ctx->tot_len;
+  memset(ctx->buf, 0, sizeof(ctx->buf));
+
+  ctx->crypto_dev = crypto_get_device(ctx->crypto_ctx.algo);
+  if (!ctx->crypto_dev)
+    avb_error("Can't get sha512 crypto device\n");
+  else
+    crypto_sha_init(ctx->crypto_dev, &ctx->crypto_ctx);
+}
+
+void avb_sha512_update(AvbSHA512Ctx* ctx, const uint8_t* data, size_t len) {
+  if (ctx->crypto_dev)
+    crypto_sha_update(ctx->crypto_dev, (u32 *)data, len);
+}
+
+uint8_t* avb_sha512_final(AvbSHA512Ctx* ctx) {
+  if (ctx->crypto_dev)
+    crypto_sha_final(ctx->crypto_dev, &ctx->crypto_ctx, ctx->buf);
+
+  return ctx->buf;
+}
+
+#else
 #define SHFR(x, n) (x >> n)
 #define ROTR(x, n) ((x >> n) | (x << ((sizeof(x) << 3) - n)))
 #define ROTL(x, n) ((x << n) | (x >> ((sizeof(x) << 3) - n)))
@@ -386,3 +414,4 @@ uint8_t* avb_sha512_final(AvbSHA512Ctx* ctx) {
 
   return ctx->buf;
 }
+#endif
diff --git a/lib/avb/libavb/avb_slot_verify.c b/lib/avb/libavb/avb_slot_verify.c
index 384b10e54e..123701fc3b 100644
--- a/lib/avb/libavb/avb_slot_verify.c
+++ b/lib/avb/libavb/avb_slot_verify.c
@@ -401,12 +401,14 @@ static AvbSlotVerifyResult load_and_verify_hash_partition(
     image_size_to_hash = image_size;
   }
   if (avb_strcmp((const char*)hash_desc.hash_algorithm, "sha256") == 0) {
+    sha256_ctx.tot_len = hash_desc.salt_len + image_size_to_hash;
     avb_sha256_init(&sha256_ctx);
     avb_sha256_update(&sha256_ctx, desc_salt, hash_desc.salt_len);
     avb_sha256_update(&sha256_ctx, image_buf, image_size_to_hash);
     digest = avb_sha256_final(&sha256_ctx);
     digest_len = AVB_SHA256_DIGEST_SIZE;
   } else if (avb_strcmp((const char*)hash_desc.hash_algorithm, "sha512") == 0) {
+    sha512_ctx.tot_len = hash_desc.salt_len + image_size_to_hash;
     avb_sha512_init(&sha512_ctx);
     avb_sha512_update(&sha512_ctx, desc_salt, hash_desc.salt_len);
     avb_sha512_update(&sha512_ctx, image_buf, image_size_to_hash);
@@ -1716,6 +1718,11 @@ void avb_slot_verify_data_calculate_vbmeta_digest(AvbSlotVerifyData* data,
   switch (digest_type) {
     case AVB_DIGEST_TYPE_SHA256: {
       AvbSHA256Ctx ctx;
+
+      ctx.tot_len = 0;
+      for (n = 0; n < data->num_vbmeta_images; n++)
+        ctx.tot_len += data->vbmeta_images[n].vbmeta_size;
+
       avb_sha256_init(&ctx);
       for (n = 0; n < data->num_vbmeta_images; n++) {
         avb_sha256_update(&ctx,
@@ -1728,6 +1735,11 @@ void avb_slot_verify_data_calculate_vbmeta_digest(AvbSlotVerifyData* data,
 
     case AVB_DIGEST_TYPE_SHA512: {
       AvbSHA512Ctx ctx;
+
+      ctx.tot_len = 0;
+      for (n = 0; n < data->num_vbmeta_images; n++)
+        ctx.tot_len += data->vbmeta_images[n].vbmeta_size;
+
       avb_sha512_init(&ctx);
       for (n = 0; n < data->num_vbmeta_images; n++) {
         avb_sha512_update(&ctx,
diff --git a/lib/avb/libavb/avb_vbmeta_image.c b/lib/avb/libavb/avb_vbmeta_image.c
index cee7db3cf8..5d0179eced 100644
--- a/lib/avb/libavb/avb_vbmeta_image.c
+++ b/lib/avb/libavb/avb_vbmeta_image.c
@@ -178,6 +178,9 @@ AvbVBMetaVerifyResult avb_vbmeta_image_verify(
     case AVB_ALGORITHM_TYPE_SHA256_RSA2048:
     case AVB_ALGORITHM_TYPE_SHA256_RSA4096:
     case AVB_ALGORITHM_TYPE_SHA256_RSA8192:
+
+      sha256_ctx.tot_len = sizeof(AvbVBMetaImageHeader) +
+                                      h.auxiliary_data_block_size;
       avb_sha256_init(&sha256_ctx);
       avb_sha256_update(
           &sha256_ctx, header_block, sizeof(AvbVBMetaImageHeader));
@@ -189,6 +192,8 @@ AvbVBMetaVerifyResult avb_vbmeta_image_verify(
     case AVB_ALGORITHM_TYPE_SHA512_RSA2048:
     case AVB_ALGORITHM_TYPE_SHA512_RSA4096:
     case AVB_ALGORITHM_TYPE_SHA512_RSA8192:
+      sha512_ctx.tot_len = sizeof(AvbVBMetaImageHeader) +
+                                      h.auxiliary_data_block_size;
       avb_sha512_init(&sha512_ctx);
       avb_sha512_update(
           &sha512_ctx, header_block, sizeof(AvbVBMetaImageHeader));
diff --git a/lib/avb/libavb_atx/avb_atx_validate.c b/lib/avb/libavb_atx/avb_atx_validate.c
index 0bf6463f2a..2b21caa97e 100644
--- a/lib/avb/libavb_atx/avb_atx_validate.c
+++ b/lib/avb/libavb_atx/avb_atx_validate.c
@@ -45,6 +45,8 @@ static void sha256(const uint8_t* data,
                    uint32_t length,
                    uint8_t hash[AVB_SHA256_DIGEST_SIZE]) {
   AvbSHA256Ctx context;
+
+  context.tot_len = length;
   avb_sha256_init(&context);
   avb_sha256_update(&context, data, length);
   uint8_t* tmp = avb_sha256_final(&context);

commit 2e32f6669c307addbbfc981d13e10eb6f6644fa6
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Dec 1 18:17:54 2020 +0800

    rockchip: board: Support more mac address
    
    The RK3568 has two gmac, but only support one mac address right now,
    define the more ethernet mac address at vendor storage to support it.
    We also write random address back to vendor storage, so that we can
    not generate random address every time.
    
    Change-Id: I2aba82c4af70d9dfdfdbc5d7e776d8100ae2fda9
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index bbd6b630e9..258dc4e1c4 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -83,19 +83,42 @@ __weak int rk_board_init(void)
 #define CPUID_LEN	0x10
 #define CPUID_OFF	0x07
 
+#define MAX_ETHERNET	0x2
+
 static int rockchip_set_ethaddr(void)
 {
 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
-	char buf[ARP_HLEN_ASCII + 1];
-	u8 ethaddr[ARP_HLEN];
-	int ret;
+	char buf[ARP_HLEN_ASCII + 1], mac[16];
+	u8 ethaddr[ARP_HLEN * MAX_ETHERNET] = {0};
+	int ret, i;
+	bool need_write = false;
 
 	ret = vendor_storage_read(VENDOR_LAN_MAC_ID, ethaddr, sizeof(ethaddr));
-	if (ret > 0 && is_valid_ethaddr(ethaddr)) {
-		sprintf(buf, "%pM", ethaddr);
-		env_set("ethaddr", buf);
+	for (i = 0; i < MAX_ETHERNET; i++) {
+		if (ret <= 0 || !is_valid_ethaddr(&ethaddr[i * ARP_HLEN])) {
+			net_random_ethaddr(&ethaddr[i * ARP_HLEN]);
+			need_write = true;
+		}
+
+		if (is_valid_ethaddr(&ethaddr[i * ARP_HLEN])) {
+			sprintf(buf, "%pM", &ethaddr[i * ARP_HLEN]);
+			if (i == 0)
+				memcpy(mac, "ethaddr", sizeof("ethaddr"));
+			else
+				sprintf(mac, "eth%daddr", i);
+			env_set(mac, buf);
+		}
+	}
+
+	if (need_write) {
+		ret = vendor_storage_write(VENDOR_LAN_MAC_ID,
+					   ethaddr, sizeof(ethaddr));
+		if (ret < 0)
+			printf("%s: vendor_storage_write failed %d\n",
+			       __func__, ret);
 	}
 #endif
+
 	return 0;
 }
 

commit b3621a10789022598206c512edd33e3f5c52e943
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Wed Dec 2 11:40:19 2020 +0800

    spl: zftl: fix L04A and L05B boot fail issue
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: Icdc93ce7d8948c3c12f28aef08c98df4b3aa3166

diff --git a/drivers/rknand/rk_zftl_spl_arm_v8.S b/drivers/rknand/rk_zftl_spl_arm_v8.S
index c10b4d5248..01eb17e7cc 100644
--- a/drivers/rknand/rk_zftl_spl_arm_v8.S
+++ b/drivers/rknand/rk_zftl_spl_arm_v8.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2020-11-18
+ * date: 2020-11-30
  */
 	.arch armv8-a+nosimd
 	.file	"rk_zftl_spl_arm_v8.S"
@@ -525,19 +525,19 @@ _list_update_data_list:
 	ldp	x29, x30, [sp], 80
 	ret
 	.size	_list_update_data_list, .-_list_update_data_list
-	.section	.text.zftl_get_gc_node.part.9,"ax",@progbits
+	.section	.text.zftl_get_gc_node.part.10,"ax",@progbits
 	.align	2
-	.type	zftl_get_gc_node.part.9, %function
-zftl_get_gc_node.part.9:
+	.type	zftl_get_gc_node.part.10, %function
+zftl_get_gc_node.part.10:
 	mov	w1, w0
 	adrp	x0, .LANCHOR12
 	ldr	x0, [x0, #:lo12:.LANCHOR12]
 	b	_list_get_gc_head_node.isra.2
-	.size	zftl_get_gc_node.part.9, .-zftl_get_gc_node.part.9
-	.section	.text.nandc_de_cs.constprop.32,"ax",@progbits
+	.size	zftl_get_gc_node.part.10, .-zftl_get_gc_node.part.10
+	.section	.text.nandc_de_cs.constprop.33,"ax",@progbits
 	.align	2
-	.type	nandc_de_cs.constprop.32, %function
-nandc_de_cs.constprop.32:
+	.type	nandc_de_cs.constprop.33, %function
+nandc_de_cs.constprop.33:
 	adrp	x0, .LANCHOR13
 	ldr	x1, [x0, #:lo12:.LANCHOR13]
 	ldr	w0, [x1]
@@ -545,7 +545,7 @@ nandc_de_cs.constprop.32:
 	and	w0, w0, -131073
 	str	w0, [x1]
 	ret
-	.size	nandc_de_cs.constprop.32, .-nandc_de_cs.constprop.32
+	.size	nandc_de_cs.constprop.33, .-nandc_de_cs.constprop.33
 	.section	.text.nand_flash_print_info,"ax",@progbits
 	.align	2
 	.global	nand_flash_print_info
@@ -1172,7 +1172,7 @@ flash_wait_device_ready_raw:
 	bl	timer_delay_ns
 	ldr	w2, [x4, 2048]
 	and	w2, w2, 255
-	bl	nandc_de_cs.constprop.32
+	bl	nandc_de_cs.constprop.33
 	bics	wzr, w20, w2
 	bne	.L260
 	cmp	w2, 255
@@ -1916,7 +1916,7 @@ flash_erase_duplane_block:
 	mov	x0, x23
 	bl	flash_read_status
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.32
+	bl	nandc_de_cs.constprop.33
 	and	w19, w2, w19
 	orr	w19, w19, w5
 	cbz	w19, .L375
@@ -2026,7 +2026,7 @@ flash_erase_block_en:
 	mov	x0, x25
 	bl	flash_read_status
 	mov	w3, w0
-	bl	nandc_de_cs.constprop.32
+	bl	nandc_de_cs.constprop.33
 	mov	w0, 5
 	ands	w3, w3, w0
 	beq	.L398
@@ -2227,7 +2227,7 @@ flash_start_plane_read:
 	ldp	x21, x22, [sp, 32]
 	str	w0, [x4, 2056]
 	ldp	x29, x30, [sp], 48
-	b	nandc_de_cs.constprop.32
+	b	nandc_de_cs.constprop.33
 .L419:
 	ldr	x0, [x11, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
@@ -2482,7 +2482,7 @@ flash_read_id:
 	strb	w0, [x8, 6]
 	ldr	w0, [x2, 2048]
 	strb	w0, [x8, 7]
-	bl	nandc_de_cs.constprop.32
+	bl	nandc_de_cs.constprop.33
 	ldrb	w2, [x8]
 	sub	w0, w2, #1
 	and	w0, w0, 255
@@ -2608,7 +2608,7 @@ flash_read_otp_data:
 	str	wzr, [x19, 2048]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
-	b	nandc_de_cs.constprop.32
+	b	nandc_de_cs.constprop.33
 	.size	flash_read_otp_data, .-flash_read_otp_data
 	.section	.text.sandisk_prog_test_bad_block,"ax",@progbits
 	.align	2
@@ -2677,6 +2677,66 @@ sandisk_prog_test_bad_block:
 	mov	w1, 162
 	b	.L511
 	.size	sandisk_prog_test_bad_block, .-sandisk_prog_test_bad_block
+	.section	.text.nand_flash_exit_boot_rom_slc_mode,"ax",@progbits
+	.align	2
+	.type	nand_flash_exit_boot_rom_slc_mode, %function
+nand_flash_exit_boot_rom_slc_mode:
+	stp	x29, x30, [sp, -16]!
+	adrp	x0, .LANCHOR13
+	mov	w1, 137
+	adrp	x5, .LANCHOR34
+	add	x29, sp, 0
+	ldr	x4, [x0, #:lo12:.LANCHOR13]
+	adrp	x0, .LANCHOR48
+	ldrb	w0, [x0, #:lo12:.LANCHOR48]
+	cmp	w0, 44
+	ccmp	w0, w1, 4, ne
+	bne	.L513
+	mov	w0, 223
+	str	w0, [x4, 2056]
+	adrp	x0, .LANCHOR33+12
+	mov	w1, 4
+	ldrb	w0, [x0, #:lo12:.LANCHOR33+12]
+	cmp	w0, 2
+	csel	w0, w0, w1, eq
+	strb	w0, [x5, #:lo12:.LANCHOR34]
+	bl	nandc_wait_flash_ready
+	mov	w0, 239
+	str	w0, [x4, 2056]
+	mov	w0, 145
+	str	w0, [x4, 2052]
+	mov	w0, 100
+	bl	timer_delay_ns
+	ldrb	w0, [x5, #:lo12:.LANCHOR34]
+	str	w0, [x4, 2048]
+	str	wzr, [x4, 2048]
+	str	wzr, [x4, 2048]
+	str	wzr, [x4, 2048]
+.L522:
+	ldp	x29, x30, [sp], 16
+	b	nandc_wait_flash_ready
+.L513:
+	cmp	w0, 173
+	bne	.L515
+	add	x4, x4, 2048
+	mov	w0, 190
+	str	w0, [x4, 8]
+	bl	nandc_wait_flash_ready
+	mov	w0, 223
+	str	w0, [x4, 8]
+	adrp	x0, .LANCHOR33+12
+	mov	w1, 4
+	ldrb	w0, [x0, #:lo12:.LANCHOR33+12]
+	cmp	w0, 2
+	csel	w0, w0, w1, eq
+	strb	w0, [x5, #:lo12:.LANCHOR34]
+	b	.L522
+.L515:
+	ldp	x29, x30, [sp], 16
+	strb	wzr, [x5, #:lo12:.LANCHOR34]
+	mov	w0, 0
+	b	zftl_flash_exit_slc_mode
+	.size	nand_flash_exit_boot_rom_slc_mode, .-nand_flash_exit_boot_rom_slc_mode
 	.section	.text.nandc_rdy_status,"ax",@progbits
 	.align	2
 	.global	nandc_rdy_status
@@ -2708,18 +2768,18 @@ nandc_bch_sel:
 	ldrb	w1, [x1, #:lo12:.LANCHOR28]
 	cmp	w1, 9
 	adrp	x1, .LANCHOR13
-	bne	.L515
+	bne	.L526
 	ldr	x1, [x1, #:lo12:.LANCHOR13]
 	cmp	w0, 70
 	ldr	w2, [sp, 8]
 	str	w2, [x1, 16]
-	beq	.L521
+	beq	.L532
 	cmp	w0, 60
-	beq	.L522
+	beq	.L533
 	cmp	w0, 40
 	cset	w0, eq
 	add	w0, w0, 1
-.L516:
+.L527:
 	str	wzr, [sp]
 	ldr	w2, [sp]
 	bfi	w2, w0, 25, 3
@@ -2729,16 +2789,16 @@ nandc_bch_sel:
 	str	w0, [sp]
 	ldr	w0, [sp]
 	str	w0, [x1, 32]
-.L514:
+.L525:
 	add	sp, sp, 16
 	ret
-.L521:
+.L532:
 	mov	w0, 0
-	b	.L516
-.L522:
+	b	.L527
+.L533:
 	mov	w0, 3
-	b	.L516
-.L515:
+	b	.L527
+.L526:
 	ldr	x2, [x1, #:lo12:.LANCHOR13]
 	mov	w3, 16
 	ldr	w1, [sp, 8]
@@ -2751,20 +2811,20 @@ nandc_bch_sel:
 	ldr	w1, [sp]
 	and	w1, w1, -262145
 	str	w1, [sp]
-	bne	.L518
-.L525:
+	bne	.L529
+.L536:
 	ldr	w0, [sp]
 	and	w0, w0, -17
-	b	.L526
-.L518:
+	b	.L537
+.L529:
 	cmp	w0, 24
-	bne	.L520
+	bne	.L531
 	ldr	w0, [sp]
 	orr	w0, w0, 16
-.L526:
+.L537:
 	str	w0, [sp]
-	b	.L519
-.L520:
+	b	.L530
+.L531:
 	ldr	w1, [sp]
 	cmp	w0, 40
 	orr	w1, w1, 262144
@@ -2772,14 +2832,14 @@ nandc_bch_sel:
 	ldr	w1, [sp]
 	orr	w1, w1, 16
 	str	w1, [sp]
-	beq	.L525
-.L519:
+	beq	.L536
+.L530:
 	ldr	w0, [sp]
 	orr	w0, w0, 1
 	str	w0, [sp]
 	ldr	w0, [sp]
 	str	w0, [x2, 12]
-	b	.L514
+	b	.L525
 	.size	nandc_bch_sel, .-nandc_bch_sel
 	.section	.text.zftl_nandc_get_irq_status,"ax",@progbits
 	.align	2
@@ -2789,10 +2849,10 @@ zftl_nandc_get_irq_status:
 	adrp	x1, .LANCHOR28
 	ldrb	w1, [x1, #:lo12:.LANCHOR28]
 	cmp	w1, 9
-	bne	.L528
+	bne	.L539
 	ldr	w0, [x0, 296]
 	ret
-.L528:
+.L539:
 	ldr	w0, [x0, 372]
 	ret
 	.size	zftl_nandc_get_irq_status, .-zftl_nandc_get_irq_status
@@ -2835,7 +2895,7 @@ nandc_xfer_start:
 	ldrb	w0, [x0, #:lo12:.LANCHOR28]
 	cmp	w0, 9
 	add	w0, w1, 1
-	bne	.L534
+	bne	.L545
 	str	wzr, [x29, 56]
 	mov	w5, 1
 	ubfx	x0, x0, 1, 6
@@ -2865,14 +2925,14 @@ nandc_xfer_start:
 	str	w0, [x29, 56]
 	adrp	x0, .LANCHOR51
 	ldrb	w0, [x0, #:lo12:.LANCHOR51]
-	cbz	w0, .L535
+	cbz	w0, .L546
 	adrp	x0, .LANCHOR52
 	ldrb	w0, [x0, #:lo12:.LANCHOR52]
-	cbz	w0, .L535
+	cbz	w0, .L546
 	ldr	w0, [x29, 56]
 	orr	w0, w0, 512
 	str	w0, [x29, 56]
-.L535:
+.L546:
 	ldr	w0, [x29, 56]
 	add	x19, x4, :lo12:.LANCHOR53
 	add	x1, x2, 63
@@ -2935,12 +2995,12 @@ nandc_xfer_start:
 	str	w1, [x29, 56]
 	ldr	w1, [x29, 56]
 	str	w1, [x0, 16]
-.L533:
+.L544:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 80
 	ret
-.L534:
+.L545:
 	ldr	x5, [x21, #:lo12:.LANCHOR13]
 	mov	w7, 16
 	ubfx	x0, x0, 1, 6
@@ -2978,7 +3038,7 @@ nandc_xfer_start:
 	ldr	w5, [x29, 56]
 	bfi	w5, w0, 22, 6
 	str	w5, [x29, 56]
-	cbz	w20, .L537
+	cbz	w20, .L548
 	adrp	x0, .LANCHOR50
 	ubfx	x1, x1, 1, 7
 	ldr	x8, [x4, #:lo12:.LANCHOR53]
@@ -2989,11 +3049,11 @@ nandc_xfer_start:
 	mov	w0, 128
 	csel	w5, w5, w0, cc
 	mov	w0, 0
-.L539:
+.L550:
 	add	w7, w5, w0
 	cmp	x3, x1
-	bne	.L540
-.L541:
+	bne	.L551
+.L552:
 	add	x19, x4, :lo12:.LANCHOR53
 	ldr	x0, [x4, #:lo12:.LANCHOR53]
 	add	x1, x2, 63
@@ -3056,8 +3116,8 @@ nandc_xfer_start:
 	str	w1, [x29, 56]
 	ldr	w1, [x29, 56]
 	str	w1, [x0, 8]
-	b	.L533
-.L540:
+	b	.L544
+.L551:
 	ldrh	w10, [x3]
 	and	x0, x0, 4294967292
 	ldrh	w6, [x3, 2]
@@ -3065,11 +3125,11 @@ nandc_xfer_start:
 	orr	x6, x10, x6, lsl 16
 	str	w6, [x8, x0]
 	mov	w0, w7
-	b	.L539
-.L537:
+	b	.L550
+.L548:
 	ldr	x0, [x4, #:lo12:.LANCHOR53]
 	str	w6, [x0]
-	b	.L541
+	b	.L552
 	.size	nandc_xfer_start, .-nandc_xfer_start
 	.section	.text.nandc_set_seed,"ax",@progbits
 	.align	2
@@ -3090,10 +3150,10 @@ nandc_set_seed:
 	cmp	w1, 9
 	adrp	x1, .LANCHOR13
 	ldr	x1, [x1, #:lo12:.LANCHOR13]
-	bne	.L552
+	bne	.L563
 	str	w0, [x1, 520]
 	ret
-.L552:
+.L563:
 	str	w0, [x1, 336]
 	ret
 	.size	nandc_set_seed, .-nandc_set_seed
@@ -3108,40 +3168,40 @@ zftl_flash_de_init:
 	bl	nandc_wait_flash_ready
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L557
+	cbz	w0, .L568
 	adrp	x0, .LANCHOR19
 	ldrb	w0, [x0, #:lo12:.LANCHOR19]
-	cbnz	w0, .L557
+	cbnz	w0, .L568
 	adrp	x0, .LANCHOR28
 	ldrb	w0, [x0, #:lo12:.LANCHOR28]
 	cmp	w0, 9
-	beq	.L557
+	beq	.L568
 	mov	w0, 0
 	bl	zftl_flash_exit_slc_mode
-.L557:
+.L568:
 	adrp	x19, .LANCHOR21
 	mov	w0, 0
 	bl	hynix_reconfig_rr_para
 	ldrb	w0, [x19, #:lo12:.LANCHOR21]
-	cbz	w0, .L558
+	cbz	w0, .L569
 	adrp	x0, .LANCHOR49
 	ldrb	w0, [x0, #:lo12:.LANCHOR49]
-	tbz	x0, 0, .L558
+	tbz	x0, 0, .L569
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
 	bl	nandc_set_if_mode
 	strb	wzr, [x19, #:lo12:.LANCHOR21]
-.L558:
+.L569:
 	adrp	x3, .LANCHOR52
 	ldrb	w0, [x3, #:lo12:.LANCHOR52]
-	cbz	w0, .L559
+	cbz	w0, .L570
 	mov	w0, 0
 	strb	wzr, [x3, #:lo12:.LANCHOR52]
 	bl	nandc_set_seed
 	mov	w0, 1
 	strb	w0, [x3, #:lo12:.LANCHOR52]
-.L559:
+.L570:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -3176,7 +3236,7 @@ buf_reinit:
 	adrp	x0, .LANCHOR56
 	add	x1, x0, :lo12:.LANCHOR56
 	mov	w2, 0
-.L579:
+.L590:
 	and	w3, w2, 255
 	strb	wzr, [x1, 2]
 	add	w4, w3, 1
@@ -3186,7 +3246,7 @@ buf_reinit:
 	str	xzr, [x1, 16]
 	cmp	w2, 16
 	add	x1, x1, 64
-	bne	.L579
+	bne	.L590
 	add	x0, x0, :lo12:.LANCHOR56
 	mov	w1, -1
 	strb	w1, [x0, 960]
@@ -3211,49 +3271,49 @@ buf_add_tail:
 	mov	x20, x1
 	ldrb	w1, [x19]
 	cmp	w1, 255
-	bne	.L587
+	bne	.L598
 	ldrb	w0, [x20, 1]
 	cmp	w0, 255
-	bne	.L583
+	bne	.L594
 	adrp	x1, .LANCHOR59
 	adrp	x0, .LC0
 	mov	w2, 74
 	add	x1, x1, :lo12:.LANCHOR59
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L583:
+.L594:
 	ldrb	w0, [x20, 1]
 	strb	w0, [x19]
-.L581:
+.L592:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L587:
+.L598:
 	adrp	x0, .LANCHOR56
 	add	x2, x0, :lo12:.LANCHOR56
 	mov	x19, x0
-.L588:
+.L599:
 	sbfiz	x0, x1, 6, 32
 	mov	w21, w1
 	ldrb	w1, [x2, x0]
 	cmp	w1, 255
-	bne	.L588
+	bne	.L599
 	ldrb	w0, [x20, 1]
 	cmp	w0, 255
-	bne	.L585
+	bne	.L596
 	adrp	x1, .LANCHOR59
 	adrp	x0, .LC0
 	mov	w2, 81
 	add	x1, x1, :lo12:.LANCHOR59
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L585:
+.L596:
 	add	x0, x19, :lo12:.LANCHOR56
 	sbfiz	x21, x21, 6, 32
 	ldrb	w1, [x20, 1]
 	strb	w1, [x0, x21]
-	b	.L581
+	b	.L592
 	.size	buf_add_tail, .-buf_add_tail
 	.section	.text.queue_read_cmd,"ax",@progbits
 	.align	2
@@ -3287,10 +3347,10 @@ zbuf_free:
 	adrp	x2, .LANCHOR57
 	and	w1, w1, 8
 	strb	w1, [x0, 2]
-	cbz	w1, .L593
+	cbz	w1, .L604
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L593
+	beq	.L604
 	stp	x29, x30, [sp, -16]!
 	mov	x1, x0
 	add	x0, x2, :lo12:.LANCHOR57
@@ -3302,7 +3362,7 @@ zbuf_free:
 	add	w0, w0, 1
 	strb	w0, [x1, #:lo12:.LANCHOR58]
 	ret
-.L593:
+.L604:
 	ldrb	w1, [x2, #:lo12:.LANCHOR57]
 	strb	w1, [x0]
 	adrp	x1, .LANCHOR58
@@ -3324,8 +3384,8 @@ buf_alloc:
 	adrp	x19, .LANCHOR58
 	and	w20, w0, 255
 	ldrb	w0, [x19, #:lo12:.LANCHOR58]
-	cbz	w0, .L606
-.L609:
+	cbz	w0, .L617
+.L620:
 	adrp	x2, .LANCHOR57
 	adrp	x1, .LANCHOR56
 	add	x0, x1, :lo12:.LANCHOR56
@@ -3333,8 +3393,8 @@ buf_alloc:
 	ubfiz	x4, x3, 6, 8
 	add	x0, x0, x4
 	mov	x4, x2
-	cbz	w20, .L607
-.L608:
+	cbz	w20, .L618
+.L619:
 	add	x1, x1, :lo12:.LANCHOR56
 	sbfiz	x3, x3, 6, 32
 	add	x2, x1, x3
@@ -3353,8 +3413,8 @@ buf_alloc:
 	mov	w1, -1
 	str	xzr, [x2, 16]
 	str	w1, [x2, 36]
-	b	.L605
-.L606:
+	b	.L616
+.L617:
 	mov	w2, 121
 	adrp	x1, .LANCHOR61
 	adrp	x0, .LC0
@@ -3362,18 +3422,18 @@ buf_alloc:
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	ldrb	w0, [x19, #:lo12:.LANCHOR58]
-	cbnz	w0, .L609
-.L611:
+	cbnz	w0, .L620
+.L622:
 	mov	x0, 0
-.L605:
+.L616:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L607:
+.L618:
 	ldrb	w2, [x19, #:lo12:.LANCHOR58]
 	cmp	w2, 1
-	bne	.L608
-	b	.L611
+	bne	.L619
+	b	.L622
 	.size	buf_alloc, .-buf_alloc
 	.section	.text.buf_remove_buf,"ax",@progbits
 	.align	2
@@ -3383,30 +3443,30 @@ buf_remove_buf:
 	ldrb	w4, [x1, 1]
 	ldrb	w2, [x0]
 	cmp	w4, w2
-	bne	.L619
+	bne	.L630
 	ldrb	w1, [x1]
 	strb	w1, [x0]
-.L623:
+.L634:
 	mov	w0, 1
 	ret
-.L620:
+.L631:
 	mov	w3, w2
 	sbfiz	x2, x2, 6, 32
 	ldrb	w2, [x0, x2]
 	cmp	w4, w2
-	bne	.L621
+	bne	.L632
 	sbfiz	x3, x3, 6, 32
 	ldrb	w2, [x1]
 	strb	w2, [x0, x3]
 	mov	w0, -1
 	strb	w0, [x1]
-	b	.L623
-.L619:
+	b	.L634
+.L630:
 	adrp	x0, .LANCHOR56
 	add	x0, x0, :lo12:.LANCHOR56
-.L621:
+.L632:
 	cmp	w2, 255
-	bne	.L620
+	bne	.L631
 	mov	w0, 0
 	ret
 	.size	buf_remove_buf, .-buf_remove_buf
@@ -3421,29 +3481,29 @@ buf_remove_free:
 	adrp	x19, .LANCHOR58
 	mov	x20, x0
 	ldrb	w0, [x19, #:lo12:.LANCHOR58]
-	cbnz	w0, .L625
+	cbnz	w0, .L636
 	adrp	x1, .LANCHOR62
 	adrp	x0, .LC0
 	mov	w2, 172
 	add	x1, x1, :lo12:.LANCHOR62
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L625:
+.L636:
 	ldrb	w0, [x19, #:lo12:.LANCHOR58]
-	cbz	w0, .L624
+	cbz	w0, .L635
 	mov	x1, x20
 	adrp	x0, .LANCHOR57
 	add	x0, x0, :lo12:.LANCHOR57
 	bl	buf_remove_buf
 	cmp	w0, 1
-	bne	.L624
+	bne	.L635
 	ldrb	w0, [x19, #:lo12:.LANCHOR58]
 	sub	w0, w0, #1
 	strb	w0, [x19, #:lo12:.LANCHOR58]
 	ldrb	w0, [x20, 2]
 	orr	w0, w0, 1
 	strb	w0, [x20, 2]
-.L624:
+.L635:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -3493,7 +3553,7 @@ dump_buf_info:
 	adrp	x0, .LC46
 	add	x0, x0, :lo12:.LC46
 	bl	printf
-.L631:
+.L642:
 	ldp	w7, w0, [x19, 36]
 	str	w0, [sp]
 	ldrb	w5, [x19, 58]
@@ -3506,7 +3566,7 @@ dump_buf_info:
 	ldr	w6, [x19, -12]
 	bl	printf
 	cmp	x19, x21
-	bne	.L631
+	bne	.L642
 	ldp	x19, x20, [sp, 32]
 	ldp	x29, x30, [sp, 16]
 	ldr	x21, [sp, 48]
@@ -3614,11 +3674,11 @@ zftl_cache_flush:
 	.global	zftl_get_density
 	.type	zftl_get_density, %function
 zftl_get_density:
-	cbnz	w0, .L641
+	cbnz	w0, .L652
 	adrp	x0, .LANCHOR68
 	ldr	w0, [x0, #:lo12:.LANCHOR68]
 	ret
-.L641:
+.L652:
 	cmp	w0, 4
 	cset	w0, cc
 	lsl	w0, w0, 13
@@ -3686,7 +3746,7 @@ gc_add_sblk:
 	and	w22, w1, 65535
 	stp	x23, x24, [sp, 48]
 	and	w23, w2, 65535
-	tbz	x0, 8, .L651
+	tbz	x0, 8, .L662
 	adrp	x1, .LANCHOR9
 	uxtw	x0, w19
 	mov	w3, w23
@@ -3706,34 +3766,34 @@ gc_add_sblk:
 	ldrh	w6, [x1, #:lo12:.LANCHOR71+56]
 	mov	w1, w19
 	bl	printf
-.L651:
+.L662:
 	adrp	x0, .LANCHOR6
 	mov	x20, x0
 	ldrh	w1, [x0, #:lo12:.LANCHOR6]
 	cmp	w1, w19
-	bhi	.L652
+	bhi	.L663
 	adrp	x1, .LANCHOR72
 	adrp	x0, .LC0
 	mov	w2, 543
 	add	x1, x1, :lo12:.LANCHOR72
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L652:
+.L663:
 	ldrh	w0, [x20, #:lo12:.LANCHOR6]
 	cmp	w0, w19
-	bhi	.L653
+	bhi	.L664
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L675
+	tbz	x0, 10, .L686
 	adrp	x0, .LC50
 	mov	w3, w23
 	mov	w2, w22
 	mov	w1, w19
 	add	x0, x0, :lo12:.LC50
 	bl	printf
-.L675:
+.L686:
 	mov	w0, 0
-	b	.L650
-.L653:
+	b	.L661
+.L664:
 	adrp	x1, .LANCHOR9
 	uxtw	x0, w19
 	ldr	x1, [x1, #:lo12:.LANCHOR9]
@@ -3743,52 +3803,52 @@ gc_add_sblk:
 	add	x0, x1, x0, lsl 2
 	ldrb	w2, [x0, 2]
 	tst	w2, 224
-	bne	.L655
-	cbz	w3, .L675
+	bne	.L666
+	cbz	w3, .L686
 	mov	w2, 553
 	adrp	x1, .LANCHOR72
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR72
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L675
-.L655:
+	b	.L686
+.L666:
 	adrp	x0, .LANCHOR71
 	add	x1, x0, :lo12:.LANCHOR71
 	ldrh	w0, [x0, #:lo12:.LANCHOR71]
 	cmp	w0, w19
-	beq	.L675
+	beq	.L686
 	adrp	x24, .LANCHOR10
 	ldr	x0, [x24, #:lo12:.LANCHOR10]
 	ldrh	w4, [x0, 48]
 	cmp	w4, w19
-	beq	.L675
+	beq	.L686
 	ldrh	w4, [x0, 16]
 	cmp	w4, w19
-	beq	.L675
+	beq	.L686
 	ldrh	w4, [x0, 80]
 	cmp	w4, w19
-	beq	.L675
+	beq	.L686
 	ldrh	w5, [x1, 56]
 	add	x1, x1, 58
 	mov	w4, 0
-.L656:
+.L667:
 	cmp	w4, w5
-	bcc	.L657
-	cbnz	w22, .L661
+	bcc	.L668
+	cbnz	w22, .L672
 	adrp	x1, .LANCHOR73
 	ldrh	w6, [x1, #:lo12:.LANCHOR73]
 	cmp	w19, w6
-	beq	.L675
+	beq	.L686
 	adrp	x4, .LANCHOR74
 	add	x4, x4, :lo12:.LANCHOR74
 	mov	x1, 0
-.L660:
+.L671:
 	ldrh	w7, [x1, x4]
 	cmp	w19, w7
-	bne	.L659
+	bne	.L670
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L675
+	tbz	x0, 8, .L686
 	mov	w5, w6
 	mov	w4, w19
 	ubfx	x2, x2, 5, 3
@@ -3796,23 +3856,23 @@ gc_add_sblk:
 	adrp	x0, .LC51
 	add	x0, x0, :lo12:.LC51
 	bl	printf
-	b	.L675
-.L657:
+	b	.L686
+.L668:
 	ldrh	w6, [x1], 2
 	cmp	w6, w19
-	beq	.L675
+	beq	.L686
 	add	w4, w4, 1
-	b	.L656
-.L659:
+	b	.L667
+.L670:
 	add	x1, x1, 2
 	cmp	x1, 16
-	bne	.L660
+	bne	.L671
 	ubfiz	x20, x23, 7, 16
 	add	x20, x20, 136
 	add	x20, x0, x20
-.L662:
+.L673:
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L663
+	tbz	x0, 8, .L674
 	adrp	x0, .LANCHOR70
 	mov	w4, w3
 	mov	w1, w19
@@ -3822,43 +3882,43 @@ gc_add_sblk:
 	adrp	x0, .LC52
 	add	x0, x0, :lo12:.LC52
 	bl	printf
-.L663:
+.L674:
 	mov	x0, x20
 	add	x1, x20, 128
 	mov	w2, 65535
-.L666:
+.L677:
 	ldrh	w3, [x0]
 	cmp	w3, w2
-	bne	.L664
+	bne	.L675
 	strh	w19, [x0]
-	cbz	w22, .L665
+	cbz	w22, .L676
 	ldr	x1, [x24, #:lo12:.LANCHOR10]
 	ldrh	w0, [x1, 124]
 	add	w0, w0, 1
 	strh	w0, [x1, 124]
-.L685:
+.L696:
 	mov	w0, 1
-.L650:
+.L661:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L661:
+.L672:
 	add	x20, x0, 392
-	b	.L662
-.L665:
+	b	.L673
+.L676:
 	ldr	x0, [x24, #:lo12:.LANCHOR10]
 	add	x23, x0, x23, uxth 1
 	ldrh	w0, [x23, 120]
 	add	w0, w0, 1
 	strh	w0, [x23, 120]
-	b	.L685
-.L664:
+	b	.L696
+.L675:
 	add	x0, x0, 2
 	cmp	x1, x0
-	bne	.L666
-	b	.L685
+	bne	.L677
+	b	.L696
 	.size	gc_add_sblk, .-gc_add_sblk
 	.section	.text.gc_mark_bad_ppa,"ax",@progbits
 	.align	2
@@ -3901,31 +3961,31 @@ gc_mark_bad_ppa:
 	bl	gc_add_sblk
 	ldr	w0, [x21, 2120]
 	mov	w1, 0
-.L687:
+.L698:
 	cmp	w1, w0
-	bcc	.L689
+	bcc	.L700
 	cmp	w0, 5
-	bhi	.L688
+	bhi	.L699
 	add	x20, x20, :lo12:.LANCHOR71
 	add	w1, w0, 1
 	str	w1, [x20, 2120]
 	add	x20, x20, x0, uxtw 1
 	strh	w22, [x20, 2124]
-.L688:
+.L699:
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L689:
+.L700:
 	add	x2, x21, x1, sxtw 1
 	ldrh	w2, [x2, 2124]
 	cmp	w2, w22
-	beq	.L688
+	beq	.L699
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L687
+	b	.L698
 	.size	gc_mark_bad_ppa, .-gc_mark_bad_ppa
 	.section	.text.gc_get_src_ppa_from_index,"ax",@progbits
 	.align	2
@@ -3954,10 +4014,10 @@ gc_write_completed:
 	add	x25, x23, :lo12:.LANCHOR56
 	stp	x19, x20, [sp, 16]
 	str	x27, [sp, 80]
-.L693:
+.L704:
 	ldrb	w0, [x22]
 	cmp	w0, 255
-	bne	.L706
+	bne	.L717
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -3965,7 +4025,7 @@ gc_write_completed:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L706:
+.L717:
 	sxtw	x20, w0
 	add	x1, x23, :lo12:.LANCHOR56
 	lsl	x3, x20, 6
@@ -3974,7 +4034,7 @@ gc_write_completed:
 	ldr	w1, [x2, 52]
 	strb	w0, [x22]
 	ldrh	w24, [x2, 48]
-	cbz	w1, .L694
+	cbz	w1, .L705
 	ldr	w2, [x2, 40]
 	adrp	x0, .LANCHOR71
 	add	x0, x0, :lo12:.LANCHOR71
@@ -3990,15 +4050,15 @@ gc_write_completed:
 	add	x1, x1, :lo12:.LANCHOR78
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L694:
+.L705:
 	adrp	x0, .LANCHOR79
 	mov	x26, x0
 	ldrb	w1, [x0, #:lo12:.LANCHOR79]
 	cmp	w1, 3
-	bne	.L695
+	bne	.L706
 	adrp	x0, .LANCHOR36
 	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbnz	w0, .L695
+	cbnz	w0, .L706
 	adrp	x0, .LANCHOR10
 	adrp	x1, .LANCHOR80
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
@@ -4006,13 +4066,13 @@ gc_write_completed:
 	ldrb	w0, [x0, 89]
 	mov	w19, w0
 	cmp	w1, w0
-	bhi	.L707
+	bhi	.L718
 	cmp	w0, 2
 	mov	w0, 2
 	csel	w19, w19, w0, ls
-.L696:
+.L707:
 	add	w19, w19, w19, lsl 1
-.L697:
+.L708:
 	adrp	x1, .LANCHOR83
 	and	x21, x24, 65535
 	add	x0, x25, x20, lsl 6
@@ -4021,73 +4081,73 @@ gc_write_completed:
 	ldrb	w0, [x0, 1]
 	ldrb	w2, [x2, x21]
 	cmp	w2, w0
-	beq	.L698
+	beq	.L709
 	adrp	x1, .LANCHOR78
 	adrp	x0, .LC0
 	mov	w2, 976
 	add	x1, x1, :lo12:.LANCHOR78
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L698:
+.L709:
 	add	x0, x25, x20, lsl 6
 	ldrb	w0, [x0, 61]
 	cmp	w0, 3
-	beq	.L699
+	beq	.L710
 	ldrb	w0, [x26, #:lo12:.LANCHOR79]
 	cmp	w0, 3
-	bne	.L699
+	bne	.L710
 	adrp	x0, .LANCHOR84
 	ldrb	w0, [x0, #:lo12:.LANCHOR84]
-	cbnz	w0, .L699
+	cbnz	w0, .L710
 	adrp	x0, .LANCHOR36
 	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbnz	w0, .L699
+	cbnz	w0, .L710
 	adrp	x0, .LANCHOR37
 	ldrb	w0, [x0, #:lo12:.LANCHOR37]
-	cbnz	w0, .L699
+	cbnz	w0, .L710
 	adrp	x0, .LANCHOR81
 	ldrb	w0, [x0, #:lo12:.LANCHOR81]
-	cbz	w0, .L700
+	cbz	w0, .L711
 	adrp	x0, .LANCHOR82
 	ldrb	w0, [x0, #:lo12:.LANCHOR82]
-	cbnz	w0, .L699
-.L700:
+	cbnz	w0, .L710
+.L711:
 	ldr	x1, [x27, #:lo12:.LANCHOR83]
 	mov	x0, 0
 	add	x21, x1, x21
-.L701:
+.L712:
 	cmp	w19, w0, uxth
-	bls	.L693
+	bls	.L704
 	ldrb	w1, [x21, x0]
 	add	x0, x0, 1
 	add	x1, x25, x1, lsl 6
 	strb	wzr, [x1, 61]
-	b	.L701
-.L707:
+	b	.L712
+.L718:
 	mov	w19, 1
-	b	.L696
-.L695:
+	b	.L707
+.L706:
 	adrp	x0, .LANCHOR81
 	ldrb	w0, [x0, #:lo12:.LANCHOR81]
-	cbz	w0, .L708
+	cbz	w0, .L719
 	adrp	x0, .LANCHOR82
 	ldrb	w0, [x0, #:lo12:.LANCHOR82]
 	cmp	w0, 0
 	cset	w19, ne
 	add	w19, w19, 1
-	b	.L697
-.L708:
+	b	.L708
+.L719:
 	mov	w19, 1
-	b	.L697
-.L699:
+	b	.L708
+.L710:
 	adrp	x20, .LANCHOR71
 	add	x20, x20, :lo12:.LANCHOR71
 	add	x19, x21, x19, uxth
 	strh	w24, [x20, 2108]
 	mov	w24, -1
-.L702:
+.L713:
 	cmp	x21, x19
-	beq	.L693
+	beq	.L704
 	ldr	x1, [x27, #:lo12:.LANCHOR83]
 	ldrb	w0, [x1, x21]
 	strb	w24, [x1, x21]
@@ -4101,7 +4161,7 @@ gc_write_completed:
 	ldrb	w0, [x20, 7]
 	sub	w0, w0, #1
 	strb	w0, [x20, 7]
-	b	.L702
+	b	.L713
 	.size	gc_write_completed, .-gc_write_completed
 	.section	.text.gc_get_src_blk,"ax",@progbits
 	.align	2
@@ -4113,44 +4173,44 @@ gc_get_src_blk:
 	adrp	x0, .LANCHOR85
 	ldrb	w3, [x0, #:lo12:.LANCHOR85]
 	ldrh	w0, [x2, 124]
-	cbz	w0, .L721
+	cbz	w0, .L732
 	add	x1, x2, 392
 	mov	w4, 1
-.L722:
+.L733:
 	add	x5, x1, 128
 	mov	w6, 65535
-.L726:
+.L737:
 	ldrh	w0, [x1]
 	cmp	w0, w6
-	beq	.L724
+	beq	.L735
 	mov	w5, -1
 	strh	w5, [x1]
-	cbz	w4, .L725
+	cbz	w4, .L736
 	ldrh	w1, [x2, 124]
 	sub	w1, w1, #1
 	strh	w1, [x2, 124]
 	ret
-.L721:
+.L732:
 	add	x0, x2, x3, sxtw 1
 	ldrh	w0, [x0, 120]
-	cbz	w0, .L727
+	cbz	w0, .L738
 	ubfiz	x1, x3, 7, 8
 	mov	w4, 0
 	add	x1, x1, 136
 	add	x1, x2, x1
-	b	.L722
-.L725:
+	b	.L733
+.L736:
 	add	x2, x2, x3, uxtb 1
 	ldrh	w1, [x2, 120]
 	sub	w1, w1, #1
 	strh	w1, [x2, 120]
 	ret
-.L724:
+.L735:
 	add	x1, x1, 2
 	cmp	x1, x5
-	bne	.L726
+	bne	.L737
 	ret
-.L727:
+.L738:
 	mov	w0, 65535
 	ret
 	.size	gc_get_src_blk, .-gc_get_src_blk
@@ -4166,11 +4226,11 @@ gc_free_temp_buf:
 	add	x0, x20, :lo12:.LANCHOR71
 	stp	x21, x22, [sp, 32]
 	ldrb	w1, [x0, 7]
-	cbz	w1, .L736
+	cbz	w1, .L747
 	adrp	x1, .LANCHOR58
 	ldrb	w1, [x1, #:lo12:.LANCHOR58]
 	cmp	w1, 1
-	bhi	.L736
+	bhi	.L747
 	ldrh	w19, [x0, 2108]
 	adrp	x2, .LANCHOR80
 	adrp	x0, .LANCHOR86
@@ -4184,34 +4244,34 @@ gc_free_temp_buf:
 	csel	w1, w0, w1, ls
 	adrp	x0, .LANCHOR56
 	add	x0, x0, :lo12:.LANCHOR56
-.L731:
+.L742:
 	cmp	w19, w1
-	bcc	.L734
-.L736:
+	bcc	.L745
+.L747:
 	mov	w0, 0
-	b	.L729
-.L734:
+	b	.L740
+.L745:
 	uxtw	x22, w19
 	ldrb	w2, [x4, x22]
 	cmp	w2, 255
-	beq	.L732
+	beq	.L743
 	sbfiz	x3, x2, 6, 32
 	add	x3, x0, x3
 	ldrb	w3, [x3, 61]
-	cbnz	w3, .L732
+	cbnz	w3, .L743
 	ubfiz	x2, x2, 6, 8
 	add	x0, x0, x2
 	bl	zbuf_free
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L733
+	tbz	x0, 8, .L744
 	ldr	x0, [x21, #:lo12:.LANCHOR83]
 	mov	w1, w19
 	ldrb	w2, [x0, x22]
 	adrp	x0, .LC55
 	add	x0, x0, :lo12:.LC55
 	bl	printf
-.L733:
+.L744:
 	ldr	x0, [x21, #:lo12:.LANCHOR83]
 	add	x20, x20, :lo12:.LANCHOR71
 	mov	w1, -1
@@ -4220,14 +4280,14 @@ gc_free_temp_buf:
 	sub	w0, w0, #1
 	strb	w0, [x20, 7]
 	mov	w0, 1
-.L729:
+.L740:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L732:
+.L743:
 	add	w19, w19, 1
-	b	.L731
+	b	.L742
 	.size	gc_free_temp_buf, .-gc_free_temp_buf
 	.section	.text.print_gc_debug_info,"ax",@progbits
 	.align	2
@@ -4256,21 +4316,21 @@ zftl_get_gc_node:
 	and	w1, w1, 65535
 	and	w0, w0, 65535
 	cmp	w1, 5
-	bne	.L746
+	bne	.L757
 	mov	w1, w0
 	adrp	x0, .LANCHOR88
 	ldr	x0, [x0, #:lo12:.LANCHOR88]
-.L748:
+.L759:
 	b	_list_get_gc_head_node.isra.2
-.L746:
+.L757:
 	cmp	w1, 2
-	bne	.L747
-	b	zftl_get_gc_node.part.9
-.L747:
+	bne	.L758
+	b	zftl_get_gc_node.part.10
+.L758:
 	mov	w1, w0
 	adrp	x0, .LANCHOR89
 	ldr	x0, [x0, #:lo12:.LANCHOR89]
-	b	.L748
+	b	.L759
 	.size	zftl_get_gc_node, .-zftl_get_gc_node
 	.section	.text.gc_search_src_blk,"ax",@progbits
 	.align	2
@@ -4292,9 +4352,9 @@ gc_search_src_blk:
 	stp	x27, x28, [sp, 80]
 	add	x0, x2, x22, sxtw 1
 	ldrh	w21, [x0, 120]
-	cbz	w21, .L750
+	cbz	w21, .L761
 	mov	w0, w21
-.L749:
+.L760:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -4302,29 +4362,29 @@ gc_search_src_blk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L750:
+.L761:
 	adrp	x0, .LANCHOR71
 	add	x1, x0, :lo12:.LANCHOR71
 	ldrh	w1, [x1, 56]
 	cmp	w1, 1
-	bhi	.L752
+	bhi	.L763
 	adrp	x3, .LANCHOR90
 	strh	wzr, [x3, #:lo12:.LANCHOR90]
 	adrp	x3, .LANCHOR91
 	strh	wzr, [x3, #:lo12:.LANCHOR91]
 	adrp	x3, .LANCHOR92
 	strh	wzr, [x3, #:lo12:.LANCHOR92]
-.L752:
-	cbnz	w22, .L753
+.L763:
+	cbnz	w22, .L764
 	adrp	x26, .LANCHOR91
 	adrp	x25, .LANCHOR14
 	add	x23, x26, :lo12:.LANCHOR91
 	add	x25, x25, :lo12:.LANCHOR14
 	mov	w24, 0
 	mov	w20, 0
-.L754:
+.L765:
 	cmp	w19, w20
-	blt	.L759
+	blt	.L770
 	ldrh	w6, [x23]
 	mov	w1, 3
 	mov	w0, w6
@@ -4336,11 +4396,11 @@ gc_search_src_blk:
 	mov	w0, 65535
 	mov	w27, w1
 	cmp	w1, w0
-	beq	.L755
+	beq	.L766
 	ldr	w0, [x25]
 	adrp	x4, .LANCHOR9
 	uxtw	x28, w1
-	tbz	x0, 8, .L756
+	tbz	x0, 8, .L767
 	ldr	x0, [x4, #:lo12:.LANCHOR9]
 	str	x4, [x29, 136]
 	ldrh	w3, [x0, x28, lsl 1]
@@ -4348,38 +4408,38 @@ gc_search_src_blk:
 	add	x0, x0, :lo12:.LC57
 	bl	printf
 	ldr	x4, [x29, 136]
-.L756:
+.L767:
 	ldr	x0, [x4, #:lo12:.LANCHOR9]
 	ldrh	w1, [x0, x28, lsl 1]
 	adrp	x0, .LANCHOR70
 	ldrh	w0, [x0, #:lo12:.LANCHOR70]
 	cmp	w1, w0
-	bcs	.L757
+	bcs	.L768
 	mov	w2, 0
 	mov	w1, 0
 	mov	w0, w27
 	bl	gc_add_sblk
-	cbz	w0, .L758
+	cbz	w0, .L769
 	add	w5, w24, 1
 	and	w24, w5, 65535
 	cmp	w24, w19
-	bcc	.L758
-.L759:
+	bcc	.L769
+.L770:
 	ldr	x0, [x29, 144]
-	tbz	x0, 1, .L761
+	tbz	x0, 1, .L772
 	adrp	x0, .LANCHOR93
 	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w0, 32
-	bls	.L761
+	bls	.L772
 	adrp	x23, .LANCHOR94
 	adrp	x20, .LANCHOR92
 	add	x27, x23, :lo12:.LANCHOR94
 	add	x20, x20, :lo12:.LANCHOR92
 	mov	w25, 0
 	mov	w26, 65535
-.L762:
+.L773:
 	cmp	w19, w25
-	blt	.L766
+	blt	.L777
 	ldrh	w6, [x20]
 	mov	w1, 5
 	mov	w0, w6
@@ -4388,26 +4448,26 @@ gc_search_src_blk:
 	strh	w6, [x20]
 	and	w1, w0, 65535
 	cmp	w1, w26
-	beq	.L763
+	beq	.L774
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x1]
 	ldrh	w1, [x27]
 	cmp	w2, w1
-	bcs	.L763
+	bcs	.L774
 	mov	w2, 0
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L765
+	cbz	w0, .L776
 	add	w5, w24, 1
 	and	w24, w5, 65535
 	cmp	w24, w19
-	bcc	.L765
-.L766:
+	bcc	.L776
+.L777:
 	cmp	w24, w19
 	adrp	x0, .LANCHOR95
-	bcs	.L768
+	bcs	.L779
 	ldrh	w1, [x0, #:lo12:.LANCHOR95]
 	adrp	x3, .LANCHOR80
 	adrp	x0, .LANCHOR86
@@ -4417,86 +4477,86 @@ gc_search_src_blk:
 	mul	w0, w0, w3
 	sub	w0, w0, w1, lsr 2
 	cmp	w2, w0
-	bge	.L761
+	bge	.L772
 	add	w1, w2, w1, lsr 3
 	strh	w1, [x23, #:lo12:.LANCHOR94]
-.L761:
+.L772:
 	ldr	x0, [x29, 144]
-	tbz	x0, 0, .L769
+	tbz	x0, 0, .L780
 	and	w23, w19, 65535
 	cmp	w24, w23
-	bcs	.L769
+	bcs	.L780
 	adrp	x20, .LANCHOR90
 	add	x20, x20, :lo12:.LANCHOR90
 	mov	w25, 65535
-.L774:
+.L785:
 	ldrh	w6, [x20]
 	mov	w0, w6
-	bl	zftl_get_gc_node.part.9
+	bl	zftl_get_gc_node.part.10
 	add	w6, w6, 1
 	strh	w6, [x20]
 	cmp	w25, w0, uxth
-	beq	.L770
+	beq	.L781
 	mov	w2, 0
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L771
+	cbz	w0, .L782
 	add	w5, w24, 1
 	and	w24, w5, 65535
 	cmp	w23, w24
-	bhi	.L771
-.L772:
+	bhi	.L782
+.L783:
 	adrp	x0, .LANCHOR95
 	adrp	x1, .LANCHOR70
 	ldrh	w0, [x0, #:lo12:.LANCHOR95]
 	ldrh	w2, [x1, #:lo12:.LANCHOR70]
 	cmp	w2, w0, lsr 1
-	bls	.L769
+	bls	.L780
 	sub	w0, w2, w0, lsr 3
-	b	.L860
-.L757:
+	b	.L871
+.L768:
 	strh	wzr, [x26, #:lo12:.LANCHOR91]
-	b	.L759
-.L755:
+	b	.L770
+.L766:
 	strh	wzr, [x23]
-	b	.L759
-.L758:
+	b	.L770
+.L769:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L754
-.L763:
+	b	.L765
+.L774:
 	strh	wzr, [x20]
-	b	.L766
-.L765:
+	b	.L777
+.L776:
 	add	w25, w25, 1
 	and	w25, w25, 65535
-	b	.L762
-.L768:
+	b	.L773
+.L779:
 	ldrh	w1, [x23, #:lo12:.LANCHOR94]
 	ldrh	w0, [x0, #:lo12:.LANCHOR95]
 	cmp	w1, w0
-	bls	.L761
+	bls	.L772
 	sub	w0, w1, w0, lsr 3
 	strh	w0, [x23, #:lo12:.LANCHOR94]
-	b	.L761
-.L770:
+	b	.L772
+.L781:
 	strh	wzr, [x20]
-.L773:
+.L784:
 	cmp	w24, w23
-	bcs	.L772
+	bcs	.L783
 	adrp	x1, .LANCHOR70
 	adrp	x0, .LANCHOR95
 	ldrh	w2, [x1, #:lo12:.LANCHOR70]
 	ldrh	w0, [x0, #:lo12:.LANCHOR95]
 	cmp	w2, w0
-	bcs	.L769
+	bcs	.L780
 	add	w0, w2, w0, lsr 3
-.L860:
+.L871:
 	strh	w0, [x1, #:lo12:.LANCHOR70]
-.L769:
+.L780:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L805
+	tbz	x0, 8, .L816
 	ldr	w2, [x29, 144]
 	adrp	x0, .LC58
 	mov	w4, w19
@@ -4504,16 +4564,16 @@ gc_search_src_blk:
 	mov	w1, w22
 	add	x0, x0, :lo12:.LC58
 	bl	printf
-.L805:
+.L816:
 	mov	w0, w24
-	b	.L749
-.L771:
+	b	.L760
+.L782:
 	add	w21, w21, 1
 	and	w21, w21, 65535
 	cmp	w23, w21
-	bhi	.L774
-	b	.L773
-.L753:
+	bhi	.L785
+	b	.L784
+.L764:
 	adrp	x23, .LANCHOR80
 	adrp	x25, .LANCHOR86
 	str	x23, [x29, 136]
@@ -4522,19 +4582,19 @@ gc_search_src_blk:
 	ldrh	w3, [x25, #:lo12:.LANCHOR86]
 	mul	w20, w20, w3
 	and	w20, w20, 65535
-	bne	.L775
-	cbz	w1, .L775
+	bne	.L786
+	cbz	w1, .L786
 	ldrh	w3, [x2, 80]
 	mov	w2, 65535
 	cmp	w3, w2
-	beq	.L808
+	beq	.L819
 	add	x2, x0, :lo12:.LANCHOR71
 	ldrh	w2, [x2, 2106]
 	sub	w20, w20, w2
 	and	w20, w20, 65535
-.L808:
+.L819:
 	mov	w19, 8
-.L775:
+.L786:
 	add	x0, x0, :lo12:.LANCHOR71
 	strh	wzr, [x0, 2110]
 	adrp	x0, .LANCHOR96
@@ -4543,46 +4603,46 @@ gc_search_src_blk:
 	and	w0, w0, 1
 	str	w0, [x29, 120]
 	ldr	x0, [x29, 144]
-	tbz	x0, 0, .L809
+	tbz	x0, 0, .L820
 	adrp	x2, .LANCHOR98
 	adrp	x26, .LANCHOR97
 	str	x2, [x29, 128]
 	ldrh	w0, [x26, #:lo12:.LANCHOR97]
 	ldrh	w3, [x2, #:lo12:.LANCHOR98]
 	cmp	w0, w3, lsr 2
-	bhi	.L777
+	bhi	.L788
 	adrp	x2, .LANCHOR99
 	ldrh	w2, [x2, #:lo12:.LANCHOR99]
 	cmp	w2, w0
-	bcs	.L810
-.L777:
+	bcs	.L821
+.L788:
 	cmp	w1, 1
 	adrp	x28, .LANCHOR90
-	bls	.L779
-.L781:
+	bls	.L790
+.L792:
 	mov	w24, 0
-.L780:
+.L791:
 	add	x28, x28, :lo12:.LANCHOR90
 	adrp	x0, .LANCHOR99
 	mov	w23, 0
 	add	x0, x0, :lo12:.LANCHOR99
 	mov	w27, 64
 	str	x0, [x29, 112]
-.L784:
+.L795:
 	ldrh	w7, [x28]
 	mov	w0, w7
-	bl	zftl_get_gc_node.part.9
+	bl	zftl_get_gc_node.part.10
 	and	w6, w0, 65535
 	str	w6, [x29, 104]
 	mov	w1, 65535
 	cmp	w6, w1
-	beq	.L782
+	beq	.L793
 	add	w7, w7, 1
 	mov	w2, w22
 	strh	w7, [x28]
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L783
+	cbz	w0, .L794
 	adrp	x0, .LANCHOR9
 	ldr	w6, [x29, 104]
 	add	w5, w24, 1
@@ -4593,35 +4653,35 @@ gc_search_src_blk:
 	ldrh	w0, [x0, x6]
 	add	w3, w23, w0
 	and	w23, w3, 65535
-	bcs	.L778
+	bcs	.L789
 	cmp	w20, w23
-	bcc	.L778
+	bcc	.L789
 	ldr	x0, [x29, 112]
 	ldrh	w1, [x26, #:lo12:.LANCHOR97]
 	ldrh	w0, [x0]
 	cmp	w0, w1, lsl 1
-	ble	.L783
-.L778:
+	ble	.L794
+.L789:
 	adrp	x0, .LANCHOR99
 	ldrh	w1, [x0, #:lo12:.LANCHOR99]
 	ldr	x0, [x29, 128]
 	ldrh	w0, [x0, #:lo12:.LANCHOR98]
 	cmp	w1, w0, lsr 2
-	bhi	.L806
+	bhi	.L817
 	ldrh	w0, [x26, #:lo12:.LANCHOR97]
 	add	w0, w0, 8
 	cmp	w1, w0
-	ble	.L776
-.L806:
+	ble	.L787
+.L817:
 	cmp	w20, w23
-	bls	.L776
+	bls	.L787
 	adrp	x4, .LANCHOR91
 	add	x28, x4, :lo12:.LANCHOR91
 	and	w0, w19, 65535
 	mov	w26, 64
 	adrp	x27, .LANCHOR9
 	str	w0, [x29, 128]
-.L787:
+.L798:
 	ldrh	w6, [x28]
 	mov	w1, 3
 	mov	w0, w6
@@ -4630,13 +4690,13 @@ gc_search_src_blk:
 	str	w7, [x29, 112]
 	mov	w1, 65535
 	cmp	w7, w1
-	beq	.L785
+	beq	.L796
 	add	w6, w6, 1
 	mov	w2, w22
 	strh	w6, [x28]
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L786
+	cbz	w0, .L797
 	ldr	w7, [x29, 112]
 	add	w5, w24, 1
 	ldr	x0, [x27, #:lo12:.LANCHOR9]
@@ -4647,26 +4707,26 @@ gc_search_src_blk:
 	ldr	w0, [x29, 128]
 	and	w23, w3, 65535
 	cmp	w24, w0
-	bcs	.L776
+	bcs	.L787
 	cmp	w20, w23
-	bcs	.L786
-.L776:
+	bcs	.L797
+.L787:
 	ldr	x0, [x29, 144]
-	tbz	x0, 1, .L788
+	tbz	x0, 1, .L799
 	adrp	x0, .LANCHOR93
 	str	x0, [x29, 112]
 	ldrh	w1, [x0, #:lo12:.LANCHOR93]
 	cmp	w1, 32
-	bls	.L788
+	bls	.L799
 	cmp	w23, w20
-	bcs	.L788
+	bcs	.L799
 	adrp	x0, .LANCHOR92
 	adrp	x27, .LANCHOR100
 	add	x28, x0, :lo12:.LANCHOR92
 	mov	w26, 64
 	add	x0, x27, :lo12:.LANCHOR100
 	str	x0, [x29, 128]
-.L794:
+.L805:
 	ldrh	w6, [x28]
 	mov	w1, 5
 	mov	w0, w6
@@ -4674,11 +4734,11 @@ gc_search_src_blk:
 	and	w8, w0, 65535
 	mov	w1, 65535
 	cmp	w8, w1
-	beq	.L789
+	beq	.L800
 	add	w6, w6, 1
 	strh	w6, [x28]
 	cmp	w19, 1
-	bne	.L790
+	bne	.L801
 	ldr	x1, [x29, 136]
 	ldrh	w2, [x25, #:lo12:.LANCHOR86]
 	ldrb	w1, [x1, #:lo12:.LANCHOR80]
@@ -4688,7 +4748,7 @@ gc_search_src_blk:
 	sub	w1, w2, w1, lsr 3
 	ldr	x2, [x29, 128]
 	strh	w1, [x2]
-.L790:
+.L801:
 	ubfiz	x6, x8, 1, 16
 	adrp	x8, .LANCHOR9
 	stp	x8, x6, [x29, 96]
@@ -4697,11 +4757,11 @@ gc_search_src_blk:
 	ldr	x1, [x29, 128]
 	ldrh	w1, [x1]
 	cmp	w2, w1
-	bcs	.L791
+	bcs	.L802
 	mov	w2, w22
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L792
+	cbz	w0, .L803
 	ldp	x8, x6, [x29, 96]
 	add	w5, w24, 1
 	add	w21, w21, 1
@@ -4712,21 +4772,21 @@ gc_search_src_blk:
 	ldrh	w0, [x0, x6]
 	add	w3, w23, w0
 	and	w23, w3, 65535
-	bcs	.L793
+	bcs	.L804
 	cmp	w20, w23
-	bcs	.L792
-.L793:
+	bcs	.L803
+.L804:
 	cmp	w24, w19
 	adrp	x0, .LANCHOR95
-	bcc	.L795
-	cbnz	w21, .L796
+	bcc	.L806
+	cbnz	w21, .L807
 	ldr	x1, [x29, 112]
 	ldrh	w2, [x1, #:lo12:.LANCHOR93]
 	adrp	x1, .LANCHOR101
 	ldrh	w1, [x1, #:lo12:.LANCHOR101]
 	cmp	w2, w1
-	bls	.L796
-.L795:
+	bls	.L807
+.L806:
 	ldr	x3, [x29, 136]
 	ldrh	w2, [x0, #:lo12:.LANCHOR95]
 	ldrh	w0, [x25, #:lo12:.LANCHOR86]
@@ -4736,17 +4796,17 @@ gc_search_src_blk:
 	mul	w0, w0, w6
 	sub	w0, w0, w2
 	cmp	w1, w0
-	bge	.L788
+	bge	.L799
 	add	w1, w1, w2
 	strh	w1, [x27, #:lo12:.LANCHOR100]
-.L788:
+.L799:
 	ldr	w0, [x29, 120]
-	cbz	w0, .L769
+	cbz	w0, .L780
 	and	w26, w19, 65535
 	cmp	w24, w26
-	bcs	.L769
+	bcs	.L780
 	cmp	w23, w20
-	bcs	.L769
+	bcs	.L780
 	adrp	x21, .LANCHOR91
 	add	x21, x21, :lo12:.LANCHOR91
 	adrp	x28, .LANCHOR102
@@ -4754,7 +4814,7 @@ gc_search_src_blk:
 	add	x0, x28, :lo12:.LANCHOR102
 	adrp	x27, .LANCHOR9
 	str	x0, [x29, 128]
-.L804:
+.L815:
 	ldrh	w6, [x21]
 	mov	w1, 3
 	mov	w0, w6
@@ -4762,7 +4822,7 @@ gc_search_src_blk:
 	and	w4, w0, 65535
 	mov	w1, 65535
 	cmp	w4, w1
-	beq	.L798
+	beq	.L809
 	ldr	x1, [x27, #:lo12:.LANCHOR9]
 	ubfiz	x4, x4, 1, 16
 	add	w6, w6, 1
@@ -4771,19 +4831,19 @@ gc_search_src_blk:
 	ldr	x1, [x29, 128]
 	ldrh	w1, [x1]
 	cmp	w2, w1
-	bcs	.L799
+	bcs	.L810
 	adrp	x1, .LANCHOR98
 	ldrh	w2, [x1, #:lo12:.LANCHOR98]
 	adrp	x1, .LANCHOR99
 	ldrh	w1, [x1, #:lo12:.LANCHOR99]
 	cmp	w1, w2, lsr 1
-	bls	.L800
-.L799:
+	bls	.L811
+.L810:
 	mov	w2, w22
 	mov	w1, 0
 	str	x4, [x29, 120]
 	bl	gc_add_sblk
-	cbz	w0, .L801
+	cbz	w0, .L812
 	adrp	x0, .LANCHOR9
 	ldr	x4, [x29, 120]
 	add	w5, w24, 1
@@ -4793,27 +4853,27 @@ gc_search_src_blk:
 	ldrh	w0, [x0, x4]
 	add	w3, w23, w0
 	and	w23, w3, 65535
-	bls	.L802
+	bls	.L813
 	cmp	w20, w23
-	bcs	.L801
-.L803:
+	bcs	.L812
+.L814:
 	adrp	x0, .LANCHOR95
 	ldrh	w1, [x28, #:lo12:.LANCHOR102]
 	ldrh	w0, [x0, #:lo12:.LANCHOR95]
 	cmp	w1, w0, lsr 1
-	bls	.L769
+	bls	.L780
 	sub	w0, w1, w0, lsr 3
 	strh	w0, [x28, #:lo12:.LANCHOR102]
-	b	.L769
-.L779:
+	b	.L780
+.L790:
 	lsr	w0, w0, 2
 	strh	w0, [x28, #:lo12:.LANCHOR90]
 	mov	w0, 0
-	bl	zftl_get_gc_node.part.9
+	bl	zftl_get_gc_node.part.10
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L781
+	beq	.L792
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x3, [x2, #:lo12:.LANCHOR9]
@@ -4821,7 +4881,7 @@ gc_search_src_blk:
 	ldrh	w2, [x2, #:lo12:.LANCHOR95]
 	ldrh	w1, [x3, x1]
 	cmp	w1, w2, lsr 2
-	bcs	.L781
+	bcs	.L792
 	mov	w1, 1
 	mov	w2, w22
 	strh	w1, [x28, #:lo12:.LANCHOR90]
@@ -4829,60 +4889,60 @@ gc_search_src_blk:
 	bl	gc_add_sblk
 	cmp	w0, 0
 	cset	w24, ne
-	b	.L780
-.L782:
+	b	.L791
+.L793:
 	strh	wzr, [x28]
-	b	.L778
-.L783:
+	b	.L789
+.L794:
 	sub	w27, w27, #1
 	ands	w27, w27, 65535
-	bne	.L784
-	b	.L778
-.L785:
+	bne	.L795
+	b	.L789
+.L796:
 	cmp	w6, 64
-	bls	.L776
+	bls	.L787
 	strh	wzr, [x28]
-	b	.L776
-.L786:
+	b	.L787
+.L797:
 	sub	w26, w26, #1
 	ands	w26, w26, 65535
-	bne	.L787
-	b	.L776
-.L809:
+	bne	.L798
+	b	.L787
+.L820:
 	mov	w23, 0
 	mov	w24, 0
-	b	.L776
-.L791:
+	b	.L787
+.L802:
 	adrp	x0, .LANCHOR92
 	strh	wzr, [x0, #:lo12:.LANCHOR92]
-	b	.L793
-.L789:
+	b	.L804
+.L800:
 	strh	wzr, [x28]
-	b	.L793
-.L792:
+	b	.L804
+.L803:
 	sub	w26, w26, #1
 	ands	w26, w26, 65535
-	bne	.L794
-	b	.L793
-.L796:
+	bne	.L805
+	b	.L804
+.L807:
 	ldr	x1, [x29, 136]
 	ldrh	w0, [x0, #:lo12:.LANCHOR95]
 	ldrh	w2, [x27, #:lo12:.LANCHOR100]
 	ldrb	w1, [x1, #:lo12:.LANCHOR80]
 	mul	w1, w1, w0
 	cmp	w2, w1
-	ble	.L769
+	ble	.L780
 	sub	w0, w2, w0, lsr 3
 	strh	w0, [x27, #:lo12:.LANCHOR100]
-	b	.L769
-.L798:
+	b	.L780
+.L809:
 	cmp	w6, 64
-	bls	.L800
+	bls	.L811
 	strh	wzr, [x21]
-.L800:
+.L811:
 	cmp	w24, w26
-	bcc	.L803
-.L802:
+	bcc	.L814
+.L813:
 	adrp	x0, .LANCHOR95
 	ldrh	w2, [x28, #:lo12:.LANCHOR102]
 	ldrh	w1, [x0, #:lo12:.LANCHOR95]
@@ -4891,19 +4951,19 @@ gc_search_src_blk:
 	mul	w0, w0, w1
 	sub	w0, w0, #32
 	cmp	w2, w0
-	bge	.L769
+	bge	.L780
 	add	w1, w2, w1, lsr 3
 	strh	w1, [x28, #:lo12:.LANCHOR102]
-	b	.L769
-.L801:
+	b	.L780
+.L812:
 	sub	w25, w25, #1
 	ands	w25, w25, 65535
-	bne	.L804
-	b	.L800
-.L810:
+	bne	.L815
+	b	.L811
+.L821:
 	mov	w23, 0
 	mov	w24, 0
-	b	.L778
+	b	.L789
 	.size	gc_search_src_blk, .-gc_search_src_blk
 	.section	.text.zftl_insert_free_list,"ax",@progbits
 	.align	2
@@ -4916,27 +4976,27 @@ zftl_insert_free_list:
 	add	x0, x0, x1, uxth 2
 	ldrb	w0, [x0, 2]
 	ands	w0, w0, 24
-	bne	.L862
+	bne	.L873
 	adrp	x2, .LANCHOR103
 	adrp	x0, .LANCHOR104
 	add	x2, x2, :lo12:.LANCHOR103
 	add	x0, x0, :lo12:.LANCHOR104
-.L864:
+.L875:
 	b	_insert_free_list
-.L862:
+.L873:
 	cmp	w0, 16
-	bne	.L863
+	bne	.L874
 	adrp	x2, .LANCHOR105
 	adrp	x0, .LANCHOR106
 	add	x2, x2, :lo12:.LANCHOR105
 	add	x0, x0, :lo12:.LANCHOR106
-	b	.L864
-.L863:
+	b	.L875
+.L874:
 	adrp	x2, .LANCHOR107
 	adrp	x0, .LANCHOR108
 	add	x2, x2, :lo12:.LANCHOR107
 	add	x0, x0, :lo12:.LANCHOR108
-	b	.L864
+	b	.L875
 	.size	zftl_insert_free_list, .-zftl_insert_free_list
 	.section	.text.zftl_insert_data_list,"ax",@progbits
 	.align	2
@@ -4950,30 +5010,30 @@ zftl_insert_data_list:
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L866
+	bne	.L877
 	adrp	x2, .LANCHOR97
 	adrp	x0, .LANCHOR12
 	add	x2, x2, :lo12:.LANCHOR97
 	add	x0, x0, :lo12:.LANCHOR12
-.L869:
+.L880:
 	b	_insert_data_list
-.L866:
+.L877:
 	cmp	w2, 96
-	bne	.L867
+	bne	.L878
 	adrp	x2, .LANCHOR99
 	adrp	x0, .LANCHOR89
 	add	x2, x2, :lo12:.LANCHOR99
 	add	x0, x0, :lo12:.LANCHOR89
-	b	.L869
-.L867:
+	b	.L880
+.L878:
 	cmp	w2, 160
-	bne	.L865
+	bne	.L876
 	adrp	x2, .LANCHOR93
 	adrp	x0, .LANCHOR88
 	add	x2, x2, :lo12:.LANCHOR93
 	add	x0, x0, :lo12:.LANCHOR88
-	b	.L869
-.L865:
+	b	.L880
+.L876:
 	ret
 	.size	zftl_insert_data_list, .-zftl_insert_data_list
 	.section	.text.zftl_gc_get_free_sblk,"ax",@progbits
@@ -4992,8 +5052,8 @@ zftl_gc_get_free_sblk:
 	ldrh	w19, [x0, 588]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L871
-	cbnz	w21, .L871
+	beq	.L882
+	cbnz	w21, .L882
 	mov	w1, w19
 	adrp	x0, .LC59
 	add	x0, x0, :lo12:.LC59
@@ -5001,37 +5061,37 @@ zftl_gc_get_free_sblk:
 	ldr	x0, [x20, #:lo12:.LANCHOR10]
 	mov	w1, -1
 	strh	w1, [x0, 588]
-.L872:
+.L883:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L871:
+.L882:
 	adrp	x2, .LANCHOR105
 	adrp	x20, .LANCHOR107
 	ldrh	w0, [x2, #:lo12:.LANCHOR105]
 	ldrh	w1, [x20, #:lo12:.LANCHOR107]
 	cmp	w0, w1
-	bcc	.L873
+	bcc	.L884
 	adrp	x3, .LANCHOR103
 	ldrh	w3, [x3, #:lo12:.LANCHOR103]
 	cmp	w3, w0
-	bls	.L874
-	cbz	w1, .L874
-.L873:
-	cbnz	w21, .L875
+	bls	.L885
+	cbz	w1, .L885
+.L884:
+	cbnz	w21, .L886
 	lsr	w1, w1, 2
-.L876:
+.L887:
 	adrp	x0, .LANCHOR108
 	add	x2, x20, :lo12:.LANCHOR107
 	add	x0, x0, :lo12:.LANCHOR108
-.L891:
+.L902:
 	bl	_list_pop_index_node
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	bne	.L879
+	bne	.L890
 	adrp	x0, .LANCHOR103
 	ldrh	w5, [x20, #:lo12:.LANCHOR107]
 	mov	w2, w22
@@ -5042,11 +5102,11 @@ zftl_gc_get_free_sblk:
 	adrp	x0, .LC60
 	add	x0, x0, :lo12:.LC60
 	bl	printf
-.L879:
-	cbz	w21, .L872
+.L890:
+	cbz	w21, .L883
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L872
+	tbz	x0, 8, .L883
 	adrp	x4, .LANCHOR9
 	adrp	x1, .LANCHOR7
 	uxtw	x3, w19
@@ -5066,20 +5126,20 @@ zftl_gc_get_free_sblk:
 	ubfx	x2, x2, 5, 3
 	add	x0, x0, :lo12:.LC61
 	bl	printf
-	b	.L872
-.L875:
+	b	.L883
+.L886:
 	mov	w1, 7
 	mul	w1, w0, w1
 	lsr	w1, w1, 3
-	b	.L876
-.L874:
+	b	.L887
+.L885:
 	lsr	w1, w0, 3
 	cmp	w21, 0
 	adrp	x0, .LANCHOR106
 	csel	w1, w1, wzr, ne
 	add	x2, x2, :lo12:.LANCHOR105
 	add	x0, x0, :lo12:.LANCHOR106
-	b	.L891
+	b	.L902
 	.size	zftl_gc_get_free_sblk, .-zftl_gc_get_free_sblk
 	.section	.text.zftl_get_free_sblk,"ax",@progbits
 	.align	2
@@ -5092,36 +5152,36 @@ zftl_get_free_sblk:
 	and	w20, w1, 65535
 	str	x21, [sp, 32]
 	cmp	w20, 5
-	bne	.L893
+	bne	.L904
 	adrp	x2, .LANCHOR105
 	adrp	x0, .LANCHOR107
 	ldrh	w3, [x2, #:lo12:.LANCHOR105]
 	ldrh	w1, [x0, #:lo12:.LANCHOR107]
 	cmp	w3, w1
-	bcc	.L894
+	bcc	.L905
 	adrp	x4, .LANCHOR103
 	ldrh	w4, [x4, #:lo12:.LANCHOR103]
 	cmp	w4, w3
-	bls	.L895
-	cbz	w1, .L895
-.L894:
+	bls	.L906
+	cbz	w1, .L906
+.L905:
 	add	x2, x0, :lo12:.LANCHOR107
 	lsr	w1, w1, 1
-.L914:
+.L925:
 	adrp	x0, .LANCHOR108
 	add	x0, x0, :lo12:.LANCHOR108
-	b	.L913
-.L895:
+	b	.L924
+.L906:
 	adrp	x0, .LANCHOR106
 	add	x2, x2, :lo12:.LANCHOR105
 	add	x0, x0, :lo12:.LANCHOR106
 	mov	w1, 0
-.L913:
+.L924:
 	bl	_list_pop_index_node
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	bne	.L898
+	bne	.L909
 	adrp	x0, .LANCHOR107
 	mov	w2, w20
 	mov	w1, w19
@@ -5133,17 +5193,17 @@ zftl_get_free_sblk:
 	adrp	x0, .LC60
 	add	x0, x0, :lo12:.LC60
 	bl	printf
-	b	.L898
-.L893:
+	b	.L909
+.L904:
 	adrp	x21, .LANCHOR10
 	and	w0, w0, 65535
 	ldr	x1, [x21, #:lo12:.LANCHOR10]
 	ldrh	w19, [x1, 590]
 	mov	w1, 65535
 	cmp	w19, w1
-	beq	.L897
+	beq	.L908
 	cmp	w20, 1
-	beq	.L897
+	beq	.L908
 	mov	w1, w19
 	adrp	x0, .LC62
 	add	x0, x0, :lo12:.LC62
@@ -5151,32 +5211,32 @@ zftl_get_free_sblk:
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	mov	w1, -1
 	strh	w1, [x0, 590]
-.L898:
+.L909:
 	mov	w0, w19
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L897:
+.L908:
 	adrp	x2, .LANCHOR103
 	adrp	x4, .LANCHOR107
 	ldrh	w1, [x2, #:lo12:.LANCHOR103]
 	ldrh	w3, [x4, #:lo12:.LANCHOR107]
 	cmp	w1, w3
-	bcc	.L899
+	bcc	.L910
 	adrp	x5, .LANCHOR105
 	ldrh	w5, [x5, #:lo12:.LANCHOR105]
 	cmp	w5, w1
-	bls	.L900
-	cbz	w3, .L900
-.L899:
+	bls	.L911
+	cbz	w3, .L911
+.L910:
 	cmp	w20, 1
 	lsr	w3, w3, 1
 	csel	w0, w3, w0, eq
 	add	x2, x4, :lo12:.LANCHOR107
 	mov	w1, w0
-	b	.L914
-.L900:
+	b	.L925
+.L911:
 	lsr	w1, w1, 1
 	cmp	w20, 1
 	csel	w0, w1, w0, eq
@@ -5184,7 +5244,7 @@ zftl_get_free_sblk:
 	mov	w1, w0
 	adrp	x0, .LANCHOR104
 	add	x0, x0, :lo12:.LANCHOR104
-	b	.L913
+	b	.L924
 	.size	zftl_get_free_sblk, .-zftl_get_free_sblk
 	.section	.text.zftl_remove_data_node,"ax",@progbits
 	.align	2
@@ -5198,30 +5258,30 @@ zftl_remove_data_node:
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L916
+	bne	.L927
 	adrp	x2, .LANCHOR97
 	adrp	x0, .LANCHOR12
 	add	x2, x2, :lo12:.LANCHOR97
 	add	x0, x0, :lo12:.LANCHOR12
-.L919:
+.L930:
 	b	_list_remove_node
-.L916:
+.L927:
 	cmp	w2, 96
-	bne	.L917
+	bne	.L928
 	adrp	x2, .LANCHOR99
 	adrp	x0, .LANCHOR89
 	add	x2, x2, :lo12:.LANCHOR99
 	add	x0, x0, :lo12:.LANCHOR89
-	b	.L919
-.L917:
+	b	.L930
+.L928:
 	cmp	w2, 160
-	bne	.L915
+	bne	.L926
 	adrp	x2, .LANCHOR93
 	adrp	x0, .LANCHOR88
 	add	x2, x2, :lo12:.LANCHOR93
 	add	x0, x0, :lo12:.LANCHOR88
-	b	.L919
-.L915:
+	b	.L930
+.L926:
 	ret
 	.size	zftl_remove_data_node, .-zftl_remove_data_node
 	.section	.text.zftl_remove_free_node,"ax",@progbits
@@ -5235,27 +5295,27 @@ zftl_remove_free_node:
 	add	x0, x0, x1, uxth 2
 	ldrb	w0, [x0, 2]
 	ands	w0, w0, 24
-	bne	.L921
+	bne	.L932
 	adrp	x2, .LANCHOR103
 	adrp	x0, .LANCHOR104
 	add	x2, x2, :lo12:.LANCHOR103
 	add	x0, x0, :lo12:.LANCHOR104
-.L923:
+.L934:
 	b	_list_remove_node
-.L921:
+.L932:
 	cmp	w0, 16
-	bne	.L922
+	bne	.L933
 	adrp	x2, .LANCHOR105
 	adrp	x0, .LANCHOR106
 	add	x2, x2, :lo12:.LANCHOR105
 	add	x0, x0, :lo12:.LANCHOR106
-	b	.L923
-.L922:
+	b	.L934
+.L933:
 	adrp	x2, .LANCHOR107
 	adrp	x0, .LANCHOR108
 	add	x2, x2, :lo12:.LANCHOR107
 	add	x0, x0, :lo12:.LANCHOR108
-	b	.L923
+	b	.L934
 	.size	zftl_remove_free_node, .-zftl_remove_free_node
 	.section	.text.zftl_list_update_data_list,"ax",@progbits
 	.align	2
@@ -5269,30 +5329,30 @@ zftl_list_update_data_list:
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L925
+	bne	.L936
 	adrp	x2, .LANCHOR97
 	adrp	x0, .LANCHOR12
 	add	x2, x2, :lo12:.LANCHOR97
 	add	x0, x0, :lo12:.LANCHOR12
-.L928:
+.L939:
 	b	_list_update_data_list
-.L925:
+.L936:
 	cmp	w2, 96
-	bne	.L926
+	bne	.L937
 	adrp	x2, .LANCHOR99
 	adrp	x0, .LANCHOR89
 	add	x2, x2, :lo12:.LANCHOR99
 	add	x0, x0, :lo12:.LANCHOR89
-	b	.L928
-.L926:
+	b	.L939
+.L937:
 	cmp	w2, 160
-	bne	.L924
+	bne	.L935
 	adrp	x2, .LANCHOR93
 	adrp	x0, .LANCHOR88
 	add	x2, x2, :lo12:.LANCHOR93
 	add	x0, x0, :lo12:.LANCHOR88
-	b	.L928
-.L924:
+	b	.L939
+.L935:
 	ret
 	.size	zftl_list_update_data_list, .-zftl_list_update_data_list
 	.section	.text.print_list_info,"ax",@progbits
@@ -5313,7 +5373,7 @@ print_list_info:
 	add	x0, x0, :lo12:.LC63
 	bl	printf
 	ldr	x19, [x19]
-	cbz	x19, .L929
+	cbz	x19, .L940
 	mov	x24, -6148914691236517206
 	adrp	x22, .LC64
 	adrp	x21, .LANCHOR109
@@ -5322,7 +5382,7 @@ print_list_info:
 	mov	w20, 0
 	adrp	x23, .LANCHOR4
 	movk	x24, 0xaaab, lsl 0
-.L933:
+.L944:
 	ldr	x2, [x23, #:lo12:.LANCHOR4]
 	adrp	x1, .LANCHOR7
 	adrp	x8, .LANCHOR9
@@ -5355,7 +5415,7 @@ print_list_info:
 	ldrh	w19, [x19]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L929
+	beq	.L940
 	ldr	x0, [x23, #:lo12:.LANCHOR4]
 	mov	w1, 6
 	add	w20, w20, 1
@@ -5363,8 +5423,8 @@ print_list_info:
 	umaddl	x19, w19, w1, x0
 	ldrh	w0, [x21]
 	cmp	w0, w20
-	bcs	.L933
-.L929:
+	bcs	.L944
+.L940:
 	ldp	x19, x20, [sp, 48]
 	ldp	x21, x22, [sp, 64]
 	ldp	x23, x24, [sp, 80]
@@ -5420,36 +5480,36 @@ ftl_tmp_into_update:
 	ldr	x0, [x0, #:lo12:.LANCHOR110]
 	ldr	w1, [x0, 16]
 	cmp	w1, 2048
-	bls	.L938
+	bls	.L949
 	ldr	w2, [x0, 20]
 	add	w2, w2, w1, lsr 11
 	and	w1, w1, 2047
 	stp	w1, w2, [x0, 16]
-.L938:
+.L949:
 	ldr	w1, [x0, 24]
 	cmp	w1, 2048
-	bls	.L939
+	bls	.L950
 	ldr	w2, [x0, 28]
 	add	w2, w2, w1, lsr 11
 	and	w1, w1, 2047
 	stp	w1, w2, [x0, 24]
-.L939:
+.L950:
 	ldr	w1, [x0, 32]
 	cmp	w1, 1024
-	bls	.L940
+	bls	.L951
 	ldr	w2, [x0, 36]
 	add	w2, w2, w1, lsr 10
 	and	w1, w1, 1023
 	stp	w1, w2, [x0, 32]
-.L940:
+.L951:
 	ldr	w1, [x0, 40]
 	cmp	w1, 1024
-	bls	.L937
+	bls	.L948
 	ldr	w2, [x0, 44]
 	add	w2, w2, w1, lsr 10
 	and	w1, w1, 1023
 	stp	w1, w2, [x0, 40]
-.L937:
+.L948:
 	ret
 	.size	ftl_tmp_into_update, .-ftl_tmp_into_update
 	.section	.text.ftl_get_blk_list_in_sblk,"ax",@progbits
@@ -5479,18 +5539,18 @@ ftl_get_blk_list_in_sblk:
 	sxth	w5, w2
 	and	w4, w0, 65535
 	mov	w0, 0
-.L943:
+.L954:
 	cmp	w3, w11
-	blt	.L947
+	blt	.L958
 	sxtw	x2, w0
 	mov	w3, -1
-.L948:
+.L959:
 	cmp	w11, w2
-	bgt	.L949
+	bgt	.L960
 	ret
-.L947:
+.L958:
 	asr	w2, w13, w3
-	tbnz	x2, 0, .L944
+	tbnz	x2, 0, .L955
 	sdiv	w2, w3, w6
 	ldrh	w10, [x8]
 	sbfiz	x12, x0, 1, 32
@@ -5499,21 +5559,21 @@ ftl_get_blk_list_in_sblk:
 	lsl	w2, w2, w10
 	add	w2, w4, w2
 	and	w2, w2, 65535
-	bhi	.L945
-.L950:
+	bhi	.L956
+.L961:
 	add	w0, w0, 1
 	strh	w2, [x1, x12]
-.L944:
+.L955:
 	add	w3, w3, 1
-	b	.L943
-.L945:
+	b	.L954
+.L956:
 	and	w10, w5, w3
 	add	w2, w2, w10
-	b	.L950
-.L949:
+	b	.L961
+.L960:
 	strh	w3, [x1, x2, lsl 1]
 	add	x2, x2, 1
-	b	.L948
+	b	.L959
 	.size	ftl_get_blk_list_in_sblk, .-ftl_get_blk_list_in_sblk
 	.section	.text.ftl_erase_phy_blk,"ax",@progbits
 	.align	2
@@ -5542,17 +5602,17 @@ ftl_erase_phy_blk:
 	adrp	x0, .LANCHOR81
 	sxth	w19, w19
 	ldrb	w0, [x0, #:lo12:.LANCHOR81]
-	cbz	w0, .L952
+	cbz	w0, .L963
 	adrp	x0, .LANCHOR82
 	ldrb	w0, [x0, #:lo12:.LANCHOR82]
-	cbnz	w0, .L952
+	cbnz	w0, .L963
 	ldrh	w2, [x22, #:lo12:.LANCHOR111]
 	cmp	w21, 0
 	cset	w1, eq
 	mov	w0, w20
 	mul	w2, w2, w19
 	bl	flash_erase_block_en
-.L952:
+.L963:
 	ldrh	w2, [x22, #:lo12:.LANCHOR111]
 	mov	w1, w21
 	mov	w0, w20
@@ -5587,10 +5647,10 @@ ftl_erase_sblk:
 	add	x24, x24, :lo12:.LANCHOR76
 	add	x27, x29, 112
 	mov	w19, 0
-.L958:
+.L969:
 	ldrb	w0, [x25]
 	cmp	w19, w0
-	bge	.L969
+	bge	.L980
 	ldrb	w1, [x24]
 	adrp	x0, .LANCHOR111
 	mov	w21, 0
@@ -5599,31 +5659,31 @@ ftl_erase_sblk:
 	mov	w0, 0
 	mul	w6, w19, w1
 	mul	w5, w26, w1
-	b	.L970
-.L960:
+	b	.L981
+.L971:
 	add	w2, w0, w6
 	asr	w2, w28, w2
-	tbnz	x2, 0, .L959
+	tbnz	x2, 0, .L970
 	and	w2, w0, w4
 	add	w2, w2, w5
 	mul	w2, w2, w3
 	str	w2, [x27, w21, sxtw 2]
 	add	w21, w21, 1
-.L959:
-	add	w0, w0, 1
 .L970:
+	add	w0, w0, 1
+.L981:
 	cmp	w0, w1
-	blt	.L960
+	blt	.L971
 	cmp	w1, 4
-	bne	.L961
+	bne	.L972
 	mov	x3, 0
-.L962:
+.L973:
 	cmp	w21, w3
-	bgt	.L963
-.L964:
+	bgt	.L974
+.L975:
 	add	w19, w19, 1
-	b	.L958
-.L963:
+	b	.L969
+.L974:
 	ldr	w2, [x27, x3, lsl 2]
 	mov	w1, w20
 	str	x3, [x29, 104]
@@ -5631,51 +5691,51 @@ ftl_erase_sblk:
 	bl	flash_erase_block_en
 	ldr	x3, [x29, 104]
 	add	x3, x3, 1
-	b	.L962
-.L961:
+	b	.L973
+.L972:
 	cmp	w21, 2
-	bne	.L965
+	bne	.L976
 	adrp	x0, .LANCHOR81
 	ldrb	w0, [x0, #:lo12:.LANCHOR81]
-	cbz	w0, .L966
+	cbz	w0, .L977
 	adrp	x0, .LANCHOR82
 	ldrb	w0, [x0, #:lo12:.LANCHOR82]
-	cbnz	w0, .L966
+	cbnz	w0, .L977
 	ldp	w2, w3, [x29, 112]
 	cmp	w20, 0
 	cset	w1, eq
 	mov	w0, w19
 	bl	flash_erase_duplane_block
-.L966:
+.L977:
 	ldp	w2, w3, [x29, 112]
 	mov	w1, w20
 	mov	w0, w19
 	bl	flash_erase_duplane_block
-	b	.L964
-.L965:
+	b	.L975
+.L976:
 	cmp	w21, 1
-	bne	.L964
+	bne	.L975
 	adrp	x0, .LANCHOR81
 	ldrb	w0, [x0, #:lo12:.LANCHOR81]
-	cbz	w0, .L968
+	cbz	w0, .L979
 	adrp	x0, .LANCHOR82
 	ldrb	w0, [x0, #:lo12:.LANCHOR82]
-	cbnz	w0, .L968
+	cbnz	w0, .L979
 	ldr	w2, [x29, 112]
 	cmp	w20, 0
 	cset	w1, eq
 	mov	w0, w19
 	bl	flash_erase_block_en
-.L968:
+.L979:
 	ldr	w2, [x29, 112]
 	mov	w1, w20
 	mov	w0, w19
 	bl	flash_erase_block_en
-	b	.L964
-.L969:
+	b	.L975
+.L980:
 	adrp	x2, .LANCHOR110
 	ldr	x3, [x23, #:lo12:.LANCHOR7]
-	cbnz	w20, .L971
+	cbnz	w20, .L982
 	ldrh	w1, [x3, x22]
 	add	w0, w1, 1
 	and	w0, w0, 2047
@@ -5687,9 +5747,9 @@ ftl_erase_sblk:
 	str	w2, [x1, 84]
 	ldrh	w2, [x1, 96]
 	cmp	w2, w0
-	bge	.L973
+	bge	.L984
 	strh	w0, [x1, 96]
-.L973:
+.L984:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -5698,7 +5758,7 @@ ftl_erase_sblk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L971:
+.L982:
 	ldr	w1, [x3, x22]
 	ubfx	x0, x1, 11, 8
 	add	w0, w0, 1
@@ -5712,9 +5772,9 @@ ftl_erase_sblk:
 	str	w2, [x1, 80]
 	ldrh	w2, [x1, 98]
 	cmp	w2, w0
-	bcs	.L973
+	bcs	.L984
 	strh	w0, [x1, 98]
-	b	.L973
+	b	.L984
 	.size	ftl_erase_sblk, .-ftl_erase_sblk
 	.section	.text.ftl_alloc_sys_blk,"ax",@progbits
 	.align	2
@@ -5729,37 +5789,37 @@ ftl_alloc_sys_blk:
 	str	x19, [sp, 16]
 	mov	x19, x0
 	cmp	w2, 63
-	bls	.L983
+	bls	.L994
 	strh	wzr, [x1, 136]
-.L983:
+.L994:
 	ldrh	w0, [x1, 112]
-	cbnz	w0, .L984
+	cbnz	w0, .L995
 	adrp	x1, .LANCHOR113
 	adrp	x0, .LC0
 	mov	w2, 1283
 	add	x1, x1, :lo12:.LANCHOR113
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L984:
+.L995:
 	ldr	x1, [x19, #:lo12:.LANCHOR110]
 	mov	w5, 65535
-.L987:
+.L998:
 	ldrh	w2, [x1, 136]
-.L985:
+.L996:
 	mov	w3, w2
 	cmp	w2, 63
-	ble	.L986
+	ble	.L997
 	strh	wzr, [x1, 136]
-	b	.L987
-.L986:
+	b	.L998
+.L997:
 	add	x4, x2, 1
 	add	x0, x1, x4, lsl 1
 	ldrh	w0, [x0, 158]
 	cmp	w0, w5
-	bne	.L990
+	bne	.L1001
 	mov	x2, x4
-	b	.L985
-.L990:
+	b	.L996
+.L1001:
 	add	x3, x1, x3, sxtw 1
 	mov	w4, -1
 	ldr	x19, [sp, 16]
@@ -5785,35 +5845,35 @@ ftl_free_sys_blk:
 	ldr	x1, [x0, #:lo12:.LANCHOR110]
 	ldrh	w2, [x1, 138]
 	cmp	w2, 63
-	bls	.L993
+	bls	.L1004
 	strh	wzr, [x1, 138]
-.L993:
+.L1004:
 	ldrh	w0, [x1, 112]
 	cmp	w0, 63
-	bls	.L994
+	bls	.L1005
 	adrp	x1, .LANCHOR114
 	adrp	x0, .LC0
 	mov	w2, 1310
 	add	x1, x1, :lo12:.LANCHOR114
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L994:
+.L1005:
 	ldr	x0, [x19, #:lo12:.LANCHOR110]
 	mov	w4, 65535
-.L997:
+.L1008:
 	ldrh	w1, [x0, 138]
-.L995:
+.L1006:
 	mov	w2, w1
 	cmp	w1, 63
-	ble	.L996
+	ble	.L1007
 	strh	wzr, [x0, 138]
-	b	.L997
-.L996:
+	b	.L1008
+.L1007:
 	add	x3, x1, 1
 	add	x5, x0, x3, lsl 1
 	ldrh	w5, [x5, 158]
 	cmp	w5, w4
-	bne	.L998
+	bne	.L1009
 	add	x2, x0, x2, sxtw 1
 	strh	w20, [x2, 160]
 	strh	w1, [x0, 138]
@@ -5823,9 +5883,9 @@ ftl_free_sys_blk:
 	strh	w1, [x0, 112]
 	ldp	x29, x30, [sp], 32
 	ret
-.L998:
+.L1009:
 	mov	x1, x3
-	b	.L995
+	b	.L1006
 	.size	ftl_free_sys_blk, .-ftl_free_sys_blk
 	.section	.text.ftl_info_data_recovery,"ax",@progbits
 	.align	2
@@ -5835,7 +5895,7 @@ ftl_info_data_recovery:
 	ldrh	w2, [x0]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L1011
+	beq	.L1022
 	stp	x29, x30, [sp, -48]!
 	adrp	x1, .LANCHOR7
 	add	x29, sp, 0
@@ -5846,7 +5906,7 @@ ftl_info_data_recovery:
 	add	x21, x20, x19
 	ldrb	w1, [x21, 2]
 	tst	w1, 224
-	bne	.L1001
+	bne	.L1012
 	ldrb	w0, [x0, 4]
 	bfi	w1, w0, 5, 3
 	strb	w1, [x21, 2]
@@ -5855,14 +5915,14 @@ ftl_info_data_recovery:
 	ldrb	w0, [x21, 2]
 	adrp	x1, .LANCHOR110
 	ldr	x3, [x1, #:lo12:.LANCHOR110]
-	tbz	x0, 3, .L1005
+	tbz	x0, 3, .L1016
 	ldrh	w2, [x3, 116]
 	sub	w2, w2, #1
 	strh	w2, [x3, 116]
-.L1006:
+.L1017:
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L1008
+	bne	.L1019
 	ldr	w0, [x20, x19]
 	ldr	x1, [x1, #:lo12:.LANCHOR110]
 	ubfx	x2, x0, 11, 8
@@ -5872,44 +5932,44 @@ ftl_info_data_recovery:
 	ldrh	w0, [x1, 120]
 	sub	w0, w0, #1
 	strh	w0, [x1, 120]
-.L1001:
+.L1012:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1005:
+.L1016:
 	tst	w0, 24
-	bne	.L1007
+	bne	.L1018
 	ldrh	w2, [x3, 114]
 	sub	w2, w2, #1
 	strh	w2, [x3, 114]
-	b	.L1006
-.L1007:
+	b	.L1017
+.L1018:
 	ldrh	w2, [x3, 118]
 	sub	w2, w2, #1
 	strh	w2, [x3, 118]
-	b	.L1006
-.L1008:
+	b	.L1017
+.L1019:
 	ldrh	w2, [x20, x19]
 	cmp	w0, 64
 	add	w3, w2, 1
 	bfi	w2, w3, 0, 11
 	strh	w2, [x20, x19]
-	bne	.L1009
+	bne	.L1020
 	ldr	x1, [x1, #:lo12:.LANCHOR110]
 	ldrh	w0, [x1, 122]
 	sub	w0, w0, #1
 	strh	w0, [x1, 122]
-	b	.L1001
-.L1009:
+	b	.L1012
+.L1020:
 	cmp	w0, 96
-	bne	.L1001
+	bne	.L1012
 	ldr	x1, [x1, #:lo12:.LANCHOR110]
 	ldrh	w0, [x1, 124]
 	sub	w0, w0, #1
 	strh	w0, [x1, 124]
-	b	.L1001
-.L1011:
+	b	.L1012
+.L1022:
 	ret
 	.size	ftl_info_data_recovery, .-ftl_info_data_recovery
 	.section	.text.ftl_get_ppa_from_index,"ax",@progbits
@@ -5929,9 +5989,9 @@ ftl_get_ppa_from_index:
 	stp	x19, x20, [sp, 16]
 	mul	w1, w1, w3
 	cmp	w0, w1
-	bge	.L1015
+	bge	.L1026
 	add	x2, x2, 16
-.L1016:
+.L1027:
 	ldrb	w1, [x2, 9]
 	sdiv	w19, w0, w1
 	msub	w0, w19, w1, w0
@@ -5939,25 +5999,25 @@ ftl_get_ppa_from_index:
 	ldrh	w20, [x0, 16]
 	mov	w0, 65535
 	cmp	w20, w0
-	bne	.L1017
+	bne	.L1028
 	adrp	x1, .LANCHOR115
 	adrp	x0, .LC0
 	mov	w2, 1937
 	add	x1, x1, :lo12:.LANCHOR115
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1017:
+.L1028:
 	adrp	x0, .LANCHOR111
 	ldrh	w0, [x0, #:lo12:.LANCHOR111]
 	madd	w0, w0, w20, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1015:
+.L1026:
 	sub	w0, w0, w1
 	add	x2, x2, 48
 	and	w0, w0, 65535
-	b	.L1016
+	b	.L1027
 	.size	ftl_get_ppa_from_index, .-ftl_get_ppa_from_index
 	.section	.text.lpa_hash_get_ppa,"ax",@progbits
 	.align	2
@@ -5973,21 +6033,21 @@ lpa_hash_get_ppa:
 	ldr	x4, [x2, #:lo12:.LANCHOR117]
 	adrp	x2, .LANCHOR118
 	ldr	x5, [x2, #:lo12:.LANCHOR118]
-.L1020:
+.L1031:
 	cmp	w1, w3
-	bne	.L1022
+	bne	.L1033
 	mov	w0, -1
 	ret
-.L1022:
+.L1033:
 	uxtw	x2, w1
 	ldr	w6, [x4, x2, lsl 2]
 	cmp	w0, w6
-	bne	.L1021
+	bne	.L1032
 	mov	w0, w1
 	b	ftl_get_ppa_from_index
-.L1021:
+.L1032:
 	ldrh	w1, [x5, x2, lsl 1]
-	b	.L1020
+	b	.L1031
 	.size	lpa_hash_get_ppa, .-lpa_hash_get_ppa
 	.section	.text.ftl_get_new_free_page,"ax",@progbits
 	.align	2
@@ -6001,45 +6061,45 @@ ftl_get_new_free_page:
 	mov	x19, x0
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1024
+	bne	.L1035
 	adrp	x1, .LANCHOR119
 	adrp	x0, .LC0
 	mov	w2, 2080
 	add	x1, x1, :lo12:.LANCHOR119
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1024:
+.L1035:
 	adrp	x0, .LANCHOR95
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x0, #:lo12:.LANCHOR95]
 	cmp	w1, w0
-	bne	.L1025
+	bne	.L1036
 	adrp	x1, .LANCHOR119
 	adrp	x0, .LC0
 	mov	w2, 2081
 	add	x1, x1, :lo12:.LANCHOR119
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1025:
+.L1036:
 	ldrh	w0, [x19, 6]
-	cbnz	w0, .L1026
+	cbnz	w0, .L1037
 	adrp	x1, .LANCHOR119
 	adrp	x0, .LC0
 	mov	w2, 2082
 	add	x1, x1, :lo12:.LANCHOR119
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1026:
+.L1037:
 	ldrb	w0, [x19, 5]
 	mov	w2, 65535
 	add	x0, x0, 8
 	ldrh	w3, [x19, x0, lsl 1]
 	adrp	x0, .LANCHOR80
 	ldrb	w4, [x0, #:lo12:.LANCHOR80]
-.L1027:
+.L1038:
 	cmp	w3, w2
 	ldrb	w1, [x19, 5]
-	beq	.L1029
+	beq	.L1040
 	adrp	x0, .LANCHOR111
 	add	w1, w1, 1
 	and	w1, w1, 255
@@ -6055,29 +6115,29 @@ ftl_get_new_free_page:
 	orr	w0, w0, w2
 	add	w3, w3, 1
 	strh	w3, [x19, 10]
-	bne	.L1023
+	bne	.L1034
 	add	w2, w2, 1
 	strb	wzr, [x19, 5]
 	strh	w2, [x19, 2]
-.L1023:
+.L1034:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1029:
+.L1040:
 	add	w1, w1, 1
 	and	w1, w1, 255
 	strb	w1, [x19, 5]
 	cmp	w1, w4
-	bne	.L1028
+	bne	.L1039
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 5]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L1028:
+.L1039:
 	ldrb	w0, [x19, 5]
 	add	x0, x0, 8
 	ldrh	w3, [x19, x0, lsl 1]
-	b	.L1027
+	b	.L1038
 	.size	ftl_get_new_free_page, .-ftl_get_new_free_page
 	.section	.text.ftl_ext_alloc_new_blk,"ax",@progbits
 	.align	2
@@ -6093,14 +6153,14 @@ ftl_ext_alloc_new_blk:
 	mov	w19, w0
 	sub	w0, w0, #1
 	cmp	w1, w0, uxth
-	bcs	.L1033
+	bcs	.L1044
 	adrp	x1, .LANCHOR120
 	adrp	x0, .LC0
 	mov	w2, 2117
 	add	x1, x1, :lo12:.LANCHOR120
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1033:
+.L1044:
 	adrp	x20, .LANCHOR110
 	mov	w1, 0
 	mov	w0, w19
@@ -6125,12 +6185,12 @@ ftl_total_vpn_update:
 	mov	x3, x2
 	ldrh	w1, [x2, #:lo12:.LANCHOR121]
 	cmp	w1, 4
-	bhi	.L1036
-	cbnz	w0, .L1036
+	bhi	.L1047
+	cbnz	w0, .L1047
 	add	w1, w1, 1
 	strh	w1, [x2, #:lo12:.LANCHOR121]
 	ret
-.L1036:
+.L1047:
 	adrp	x0, .LANCHOR6
 	strh	wzr, [x3, #:lo12:.LANCHOR121]
 	mov	x1, 0
@@ -6142,9 +6202,9 @@ ftl_total_vpn_update:
 	adrp	x0, .LANCHOR7
 	ldr	x7, [x0, #:lo12:.LANCHOR7]
 	mov	w0, 0
-.L1038:
+.L1049:
 	cmp	w5, w1, uxth
-	bhi	.L1041
+	bhi	.L1052
 	adrp	x1, .LANCHOR10
 	ldr	x1, [x1, #:lo12:.LANCHOR10]
 	str	w2, [x1, 524]
@@ -6152,27 +6212,27 @@ ftl_total_vpn_update:
 	str	w0, [x1, 528]
 	ldr	x2, [x2, #:lo12:.LANCHOR110]
 	ldrh	w2, [x2, 120]
-	cbz	w2, .L1035
+	cbz	w2, .L1046
 	udiv	w0, w0, w2
 	str	w0, [x1, 532]
-.L1035:
+.L1046:
 	ret
-.L1041:
+.L1052:
 	ldrh	w3, [x6, x1, lsl 1]
 	cmp	w3, w8
-	beq	.L1039
+	beq	.L1050
 	add	x4, x7, x1, lsl 2
 	ldrb	w4, [x4, 2]
 	and	w4, w4, 224
 	cmp	w4, 160
-	bne	.L1040
+	bne	.L1051
 	add	w0, w0, w3
-.L1039:
+.L1050:
 	add	x1, x1, 1
-	b	.L1038
-.L1040:
+	b	.L1049
+.L1051:
 	add	w2, w2, w3
-	b	.L1039
+	b	.L1050
 	.size	ftl_total_vpn_update, .-ftl_total_vpn_update
 	.section	.text.ftl_vpn_update,"ax",@progbits
 	.align	2
@@ -6189,17 +6249,17 @@ ftl_vpn_update:
 	ubfiz	x19, x19, 1, 16
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, x19]
-	cbnz	w0, .L1048
+	cbnz	w0, .L1059
 	adrp	x1, .LANCHOR122
 	mov	w0, 1
 	str	w0, [x1, #:lo12:.LANCHOR122]
-.L1046:
+.L1057:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1048:
+.L1059:
 	mov	w0, 0
-	b	.L1046
+	b	.L1057
 	.size	ftl_vpn_update, .-ftl_vpn_update
 	.section	.text.ftl_vpn_decrement,"ax",@progbits
 	.align	2
@@ -6212,13 +6272,13 @@ ftl_vpn_decrement:
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1051
+	beq	.L1062
 	adrp	x0, .LANCHOR9
 	uxtw	x1, w19
 	lsl	x2, x1, 1
 	ldr	x3, [x0, #:lo12:.LANCHOR9]
 	ldrh	w0, [x3, x2]
-	cbnz	w0, .L1052
+	cbnz	w0, .L1063
 	adrp	x0, .LANCHOR7
 	mov	w2, 0
 	ldr	x0, [x0, #:lo12:.LANCHOR7]
@@ -6229,23 +6289,23 @@ ftl_vpn_decrement:
 	mov	w1, w19
 	ubfx	x3, x3, 5, 3
 	bl	printf
-.L1057:
+.L1068:
 	mov	w0, 0
-	b	.L1050
-.L1052:
+	b	.L1061
+.L1063:
 	sub	w0, w0, #1
 	strh	w0, [x3, x2]
-.L1051:
+.L1062:
 	adrp	x20, .LANCHOR73
 	ldrh	w0, [x20, #:lo12:.LANCHOR73]
 	cmp	w19, w0
-	beq	.L1057
+	beq	.L1068
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L1054
+	bne	.L1065
 	strh	w19, [x20, #:lo12:.LANCHOR73]
-	b	.L1057
-.L1054:
+	b	.L1068
+.L1065:
 	bl	ftl_vpn_update
 	cmp	w0, 0
 	adrp	x1, .LANCHOR123
@@ -6262,7 +6322,7 @@ ftl_vpn_decrement:
 	adrp	x1, .LANCHOR74
 	add	x1, x1, :lo12:.LANCHOR74
 	strh	w3, [x1, x2, lsl 1]
-.L1050:
+.L1061:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -6283,27 +6343,27 @@ lpa_hash_update_ppa:
 	ldr	x8, [x4, #:lo12:.LANCHOR117]
 	adrp	x4, .LANCHOR118
 	ldr	x4, [x4, #:lo12:.LANCHOR118]
-.L1060:
+.L1071:
 	cmp	w6, w12
-	beq	.L1064
+	beq	.L1075
 	uxtw	x11, w6
 	lsl	x10, x11, 2
 	add	x13, x8, x10
 	ldr	w10, [x8, x10]
 	cmp	w0, w10
 	lsl	x10, x11, 1
-	bne	.L1061
+	bne	.L1072
 	mov	w6, -1
 	str	w6, [x13]
 	cmp	w7, w12
-	bne	.L1062
+	bne	.L1073
 	add	x6, x3, :lo12:.LANCHOR116
 	ldrh	w7, [x4, x10]
 	strh	w7, [x6, x5, lsl 1]
-.L1063:
+.L1074:
 	mov	w6, -1
 	strh	w6, [x4, x11, lsl 1]
-.L1064:
+.L1075:
 	uxtw	x6, w2
 	add	x3, x3, :lo12:.LANCHOR116
 	cmn	w1, #1
@@ -6311,7 +6371,7 @@ lpa_hash_update_ppa:
 	ldrh	w0, [x3, x5, lsl 1]
 	strh	w2, [x3, x5, lsl 1]
 	strh	w0, [x4, x6, lsl 1]
-	beq	.L1071
+	beq	.L1082
 	stp	x29, x30, [sp, -16]!
 	adrp	x0, .LANCHOR75
 	add	x29, sp, 0
@@ -6333,15 +6393,15 @@ lpa_hash_update_ppa:
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
-.L1062:
+.L1073:
 	ldrh	w6, [x4, x10]
 	strh	w6, [x4, w7, uxtw 1]
-	b	.L1063
-.L1061:
+	b	.L1074
+.L1072:
 	mov	w7, w6
 	ldrh	w6, [x4, x10]
-	b	.L1060
-.L1071:
+	b	.L1071
+.L1082:
 	mov	w0, -1
 	ret
 	.size	lpa_hash_update_ppa, .-lpa_hash_update_ppa
@@ -6378,25 +6438,25 @@ ftl_mask_bad_block:
 	and	w4, w3, 65535
 	udiv	w3, w3, w5
 	and	w20, w3, 65535
-	bls	.L1075
+	bls	.L1086
 	sub	w2, w5, #1
 	and	w2, w2, w4
 	add	w2, w19, w2
 	and	w19, w2, 255
-.L1075:
+.L1086:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 14, .L1076
+	tbz	x0, 14, .L1087
 	adrp	x0, .LC66
 	and	w3, w3, 65535
 	mov	w2, w19
 	add	x0, x0, :lo12:.LC66
 	bl	printf
-.L1076:
+.L1087:
 	adrp	x0, .LANCHOR6
 	ldrh	w0, [x0, #:lo12:.LANCHOR6]
 	cmp	w0, w20
-	bls	.L1074
+	bls	.L1085
 	adrp	x0, .LANCHOR7
 	mov	w2, 1
 	lsl	w2, w2, w19
@@ -6405,7 +6465,7 @@ ftl_mask_bad_block:
 	ldrb	w19, [x20, 3]
 	orr	w2, w2, w19
 	strb	w2, [x20, 3]
-.L1074:
+.L1085:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -6426,18 +6486,18 @@ gc_free_bad_sblk:
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	ldr	w0, [x0, 2120]
-	cbz	w0, .L1097
+	cbz	w0, .L1108
 	adrp	x22, .LC67
 	mov	w24, 20041
 	add	x22, x22, :lo12:.LC67
 	mov	w26, 0
 	movk	w24, 0x444b, lsl 16
-.L1084:
+.L1095:
 	adrp	x0, .LANCHOR80
 	ldrb	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w0, w26
-	bhi	.L1094
-.L1097:
+	bhi	.L1105
+.L1108:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -6446,7 +6506,7 @@ gc_free_bad_sblk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1094:
+.L1105:
 	adrp	x0, .LANCHOR76
 	adrp	x1, .LANCHOR32
 	adrp	x21, .LANCHOR75
@@ -6462,68 +6522,68 @@ gc_free_bad_sblk:
 	lsl	w19, w19, w1
 	madd	w19, w23, w0, w19
 	and	w19, w19, 65535
-	bls	.L1085
+	bls	.L1096
 	sub	w0, w0, #1
 	and	w0, w0, w26
 	add	w19, w19, w0
 	and	w19, w19, 65535
-.L1085:
+.L1096:
 	adrp	x25, .LANCHOR124
 	add	x25, x25, :lo12:.LANCHOR124
 	mov	w20, 0
-.L1086:
+.L1097:
 	add	x0, x27, :lo12:.LANCHOR71
 	ldr	w1, [x0, 2120]
 	cmp	w20, w1
-	bcc	.L1093
+	bcc	.L1104
 	add	w26, w26, 1
 	and	w26, w26, 65535
-	b	.L1084
-.L1093:
+	b	.L1095
+.L1104:
 	add	x0, x0, x20, sxtw 1
 	ldrh	w0, [x0, 2124]
 	cmp	w0, w19
-	bne	.L1087
+	bne	.L1098
 	mov	w1, w19
 	mov	x0, x22
 	bl	printf
 	ldrb	w0, [x25]
-	cbnz	w0, .L1088
+	cbnz	w0, .L1099
 	adrp	x0, .LANCHOR81
 	ldrb	w0, [x0, #:lo12:.LANCHOR81]
-	cbz	w0, .L1089
-.L1088:
+	cbz	w0, .L1100
+.L1099:
 	adrp	x0, .LANCHOR110
 	ldr	x0, [x0, #:lo12:.LANCHOR110]
 	ldr	w0, [x0, 156]
 	cmp	w0, w24
-	beq	.L1090
-.L1089:
+	beq	.L1101
+.L1100:
 	ldrh	w0, [x21, #:lo12:.LANCHOR75]
 	lsl	w0, w19, w0
 	bl	ftl_mask_bad_block
-.L1090:
+.L1101:
 	add	x1, x27, :lo12:.LANCHOR71
 	mov	w0, w20
 	ldr	w2, [x1, 2120]
-.L1091:
+.L1102:
 	cmp	w0, w2
-	bcc	.L1092
+	bcc	.L1103
 	add	x0, x27, :lo12:.LANCHOR71
 	sub	w2, w2, #1
 	str	w2, [x0, 2120]
-.L1087:
+.L1098:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L1086
-.L1092:
+	b	.L1097
+.L1103:
 	add	w3, w0, 1
 	add	x0, x1, x0, sxtw 1
 	add	x4, x1, x3, sxtw 1
 	ldrh	w4, [x4, 2124]
 	strh	w4, [x0, 2124]
 	and	w0, w3, 65535
-	b	.L1091
+	b	.L1102
 	.size	gc_free_bad_sblk, .-gc_free_bad_sblk
 	.section	.text.ftl_free_sblk,"ax",@progbits
 	.align	2
@@ -6543,7 +6603,7 @@ ftl_free_sblk:
 	add	x20, x3, x19
 	ldrb	w0, [x20, 2]
 	ubfx	x22, x0, 5, 3
-	tbz	x0, 3, .L1104
+	tbz	x0, 3, .L1115
 	adrp	x2, .LANCHOR110
 	ldrh	w1, [x3, x19]
 	adrp	x8, .LANCHOR125
@@ -6563,7 +6623,7 @@ ftl_free_sblk:
 	and	w4, w4, 65535
 	add	w7, w7, w4
 	cmp	w7, w8
-	ble	.L1105
+	ble	.L1116
 	adrp	x4, .LANCHOR101
 	adrp	x7, .LANCHOR105
 	ldrh	w6, [x4, #:lo12:.LANCHOR101]
@@ -6573,12 +6633,12 @@ ftl_free_sblk:
 	add	w6, w6, 7
 	add	w4, w4, w7
 	cmp	w6, w4
-	blt	.L1106
-.L1111:
+	blt	.L1117
+.L1122:
 	mov	w4, 2
 	bfi	w0, w4, 3, 2
-	b	.L1122
-.L1106:
+	b	.L1133
+.L1117:
 	adrp	x4, .LANCHOR98
 	adrp	x7, .LANCHOR103
 	ldrh	w6, [x4, #:lo12:.LANCHOR98]
@@ -6591,15 +6651,15 @@ ftl_free_sblk:
 	ldrh	w7, [x7, #:lo12:.LANCHOR99]
 	add	w4, w4, w7
 	cmp	w6, w4
-	blt	.L1111
-.L1124:
+	blt	.L1122
+.L1135:
 	and	w0, w0, -25
-.L1122:
+.L1133:
 	strb	w0, [x20, 2]
-.L1107:
+.L1118:
 	ldrb	w0, [x20, 2]
 	ands	w0, w0, 24
-	bne	.L1112
+	bne	.L1123
 	mul	w2, w5, w2
 	ldrh	w0, [x3, x19]
 	add	w2, w2, w2, lsl 1
@@ -6610,7 +6670,7 @@ ftl_free_sblk:
 	ldr	w0, [x3, x19]
 	bfi	w0, w2, 11, 8
 	str	w0, [x3, x19]
-.L1113:
+.L1124:
 	mov	w0, w21
 	bl	zftl_remove_data_node
 	ldr	x0, [x23, #:lo12:.LANCHOR7]
@@ -6624,23 +6684,23 @@ ftl_free_sblk:
 	adrp	x0, .LANCHOR9
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x24, lsl 1]
-	bhi	.L1116
+	bhi	.L1127
 	mov	w0, w21
 	bl	gc_free_bad_sblk
-.L1116:
+.L1127:
 	ldrb	w0, [x20, 2]
-	tbz	x0, 3, .L1117
+	tbz	x0, 3, .L1128
 	adrp	x0, .LANCHOR10
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldrh	w1, [x0, 586]
 	cmp	w1, w21
-	bne	.L1117
+	bne	.L1128
 	mov	w1, -1
 	ldrh	w2, [x0, 590]
 	strh	w1, [x0, 586]
 	mov	w1, 65535
 	cmp	w2, w1
-	bne	.L1117
+	bne	.L1128
 	strh	w21, [x0, 590]
 	mov	w1, w21
 	ldp	x19, x20, [sp, 16]
@@ -6650,12 +6710,12 @@ ftl_free_sblk:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	b	printf
-.L1105:
+.L1116:
 	madd	w4, w2, w4, w6
 	adrp	x6, .LANCHOR126
 	ldrh	w6, [x6, #:lo12:.LANCHOR126]
 	cmp	w4, w6
-	ble	.L1107
+	ble	.L1118
 	adrp	x4, .LANCHOR98
 	adrp	x7, .LANCHOR103
 	ldrh	w6, [x4, #:lo12:.LANCHOR98]
@@ -6668,7 +6728,7 @@ ftl_free_sblk:
 	add	w4, w4, w7
 	add	w7, w6, 7
 	cmp	w7, w4
-	bge	.L1124
+	bge	.L1135
 	adrp	x7, .LANCHOR101
 	adrp	x10, .LANCHOR105
 	ldrh	w8, [x7, #:lo12:.LANCHOR101]
@@ -6678,35 +6738,35 @@ ftl_free_sblk:
 	add	w8, w8, 7
 	add	w7, w7, w10
 	cmp	w8, w7
-	bge	.L1111
+	bge	.L1122
 	add	w6, w6, 23
 	cmp	w4, w6
-	bgt	.L1111
-	b	.L1124
-.L1112:
+	bgt	.L1122
+	b	.L1135
+.L1123:
 	cmp	w0, 16
-	bne	.L1113
+	bne	.L1124
 	sdiv	w2, w1, w2
 	ldr	w0, [x3, x19]
 	add	w2, w2, w2, lsl 1
 	add	w2, w5, w2, lsr 2
-.L1123:
+.L1134:
 	bfi	w0, w2, 11, 8
 	asr	w1, w1, 5
 	str	w0, [x3, x19]
 	bfi	w0, w1, 0, 11
 	strh	w0, [x3, x19]
-	b	.L1113
-.L1104:
+	b	.L1124
+.L1115:
 	tst	w0, 24
-	bne	.L1113
+	bne	.L1124
 	adrp	x1, .LANCHOR107
 	ldrh	w1, [x1, #:lo12:.LANCHOR107]
-	cbnz	w1, .L1113
+	cbnz	w1, .L1124
 	adrp	x1, .LANCHOR105
 	ldrh	w4, [x1, #:lo12:.LANCHOR105]
 	cmp	w4, 15
-	bhi	.L1113
+	bhi	.L1124
 	adrp	x1, .LANCHOR97
 	adrp	x2, .LANCHOR103
 	ldrh	w1, [x1, #:lo12:.LANCHOR97]
@@ -6719,7 +6779,7 @@ ftl_free_sblk:
 	ldrh	w2, [x2, #:lo12:.LANCHOR98]
 	add	w2, w2, 16
 	cmp	w1, w2
-	ble	.L1113
+	ble	.L1124
 	adrp	x1, .LANCHOR101
 	ldrh	w2, [x1, #:lo12:.LANCHOR101]
 	adrp	x1, .LANCHOR93
@@ -6727,7 +6787,7 @@ ftl_free_sblk:
 	add	w2, w2, 7
 	add	w1, w1, w4
 	cmp	w2, w1
-	blt	.L1113
+	blt	.L1124
 	mov	w1, 2
 	bfi	w0, w1, 3, 2
 	strb	w0, [x20, 2]
@@ -6740,8 +6800,8 @@ ftl_free_sblk:
 	ldr	w0, [x3, x19]
 	ubfx	x4, x0, 11, 8
 	add	w2, w4, w2, lsr 2
-	b	.L1123
-.L1117:
+	b	.L1134
+.L1128:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6767,10 +6827,10 @@ gc_free_src_blk:
 	stp	x19, x20, [sp, 16]
 	mov	w20, 0
 	stp	x25, x26, [sp, 64]
-.L1126:
+.L1137:
 	ldrh	w0, [x21, 56]
 	cmp	w0, w20
-	bhi	.L1140
+	bhi	.L1151
 	strh	wzr, [x21, 56]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6778,18 +6838,18 @@ gc_free_src_blk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1140:
+.L1151:
 	add	x0, x21, x20, sxtw 1
 	ldrh	w25, [x0, 58]
 	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	mov	x19, x25
 	lsl	x26, x25, 1
 	ldrh	w2, [x0, x26]
-	cbz	w2, .L1127
+	cbz	w2, .L1138
 	mov	w1, w25
 	mov	x0, x22
 	bl	printf
-.L1127:
+.L1138:
 	ldr	x0, [x24, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x26]
 	adrp	x0, .LANCHOR7
@@ -6797,95 +6857,95 @@ gc_free_src_blk:
 	add	x25, x0, x25, lsl 2
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L1128
+	tbz	x0, 8, .L1139
 	ldrb	w2, [x25, 2]
 	adrp	x0, .LC70
 	mov	w1, w19
 	add	x0, x0, :lo12:.LC70
 	ubfx	x2, x2, 5, 3
 	bl	printf
-.L1128:
+.L1139:
 	ldrb	w0, [x25, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L1129
+	beq	.L1140
 	tst	w0, 192
-	bne	.L1130
-.L1129:
+	bne	.L1141
+.L1140:
 	adrp	x1, .LANCHOR127
 	adrp	x0, .LC0
 	mov	w2, 1362
 	add	x1, x1, :lo12:.LANCHOR127
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1130:
+.L1141:
 	mov	w0, w19
 	bl	ftl_free_sblk
 	adrp	x0, .LANCHOR10
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldrh	w2, [x0, 124]
-	cbz	w2, .L1131
+	cbz	w2, .L1142
 	add	x3, x0, 392
 	mov	w1, 0
-.L1133:
+.L1144:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L1132
+	bne	.L1143
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 392]
 	strh	w2, [x0, 124]
-.L1131:
+.L1142:
 	ldrh	w2, [x0, 120]
-	cbz	w2, .L1134
+	cbz	w2, .L1145
 	add	x3, x0, 136
 	mov	w1, 0
-.L1136:
+.L1147:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L1135
+	bne	.L1146
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 136]
 	strh	w2, [x0, 120]
-.L1134:
+.L1145:
 	ldrh	w2, [x0, 122]
-	cbz	w2, .L1137
+	cbz	w2, .L1148
 	add	x3, x0, 264
 	mov	w1, 0
-.L1139:
+.L1150:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L1138
+	bne	.L1149
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 264]
 	strh	w2, [x0, 122]
-.L1137:
+.L1148:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L1126
-.L1132:
+	b	.L1137
+.L1143:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L1133
-	b	.L1131
-.L1135:
+	bne	.L1144
+	b	.L1142
+.L1146:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L1136
-	b	.L1134
-.L1138:
+	bne	.L1147
+	b	.L1145
+.L1149:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L1139
-	b	.L1137
+	bne	.L1150
+	b	.L1148
 	.size	gc_free_src_blk, .-gc_free_src_blk
 	.section	.text.print_ftl_debug_info,"ax",@progbits
 	.align	2
@@ -6996,7 +7056,7 @@ ftl_write_buf:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	str	x21, [sp, 32]
-	cbnz	x0, .L1166
+	cbnz	x0, .L1177
 	adrp	x1, .LANCHOR130
 	add	x1, x1, :lo12:.LANCHOR130
 	mov	w2, 803
@@ -7005,12 +7065,12 @@ ftl_write_buf:
 	bl	printf
 	bl	print_ftl_debug_info
 	mov	w0, -1
-.L1165:
+.L1176:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1169:
+.L1180:
 	mov	x1, x19
 	adrp	x0, .LANCHOR66
 	add	x0, x0, :lo12:.LANCHOR66
@@ -7028,33 +7088,33 @@ ftl_write_buf:
 	ldr	w2, [x1, 32]
 	add	w2, w2, 1
 	str	w2, [x1, 32]
-	b	.L1165
-.L1166:
+	b	.L1176
+.L1177:
 	mov	x19, x0
 	adrp	x0, .LANCHOR131
 	mov	x20, x0
 	ldrb	w1, [x0, #:lo12:.LANCHOR131]
 	ldrb	w2, [x19, 56]
 	cmp	w2, w1
-	bls	.L1171
+	bls	.L1182
 	adrp	x1, .LANCHOR130
 	adrp	x0, .LC0
 	mov	w2, 810
 	add	x1, x1, :lo12:.LANCHOR130
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1171:
+.L1182:
 	ldrb	w0, [x19, 56]
 	adrp	x21, .LANCHOR67
-	cbz	w0, .L1168
+	cbz	w0, .L1179
 	ldrb	w1, [x20, #:lo12:.LANCHOR131]
 	cmp	w1, w0
-	bcs	.L1169
-.L1168:
+	bcs	.L1180
+.L1179:
 	mov	x0, x19
 	bl	zbuf_free
 	ldrb	w0, [x21, #:lo12:.LANCHOR67]
-	b	.L1165
+	b	.L1176
 	.size	ftl_write_buf, .-ftl_write_buf
 	.section	.text.ftl_write_completed,"ax",@progbits
 	.align	2
@@ -7074,17 +7134,17 @@ ftl_write_completed:
 	str	x25, [sp, 64]
 	movk	w23, 0x444b, lsl 16
 	mov	w25, 0
-.L1177:
+.L1188:
 	ldrb	w0, [x20]
 	cmp	w0, 255
-	bne	.L1188
+	bne	.L1199
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1188:
+.L1199:
 	add	x1, x21, :lo12:.LANCHOR56
 	lsl	x2, x0, 6
 	add	x24, x1, x2
@@ -7094,20 +7154,20 @@ ftl_write_completed:
 	strb	w1, [x20]
 	ldr	w1, [x24, 52]
 	cmn	w1, #1
-	bne	.L1178
+	bne	.L1189
 	adrp	x1, .LANCHOR124
 	ldrb	w1, [x1, #:lo12:.LANCHOR124]
-	cbnz	w1, .L1179
+	cbnz	w1, .L1190
 	adrp	x1, .LANCHOR81
 	ldrb	w1, [x1, #:lo12:.LANCHOR81]
-	cbz	w1, .L1180
-.L1179:
+	cbz	w1, .L1191
+.L1190:
 	adrp	x1, .LANCHOR110
 	ldr	x1, [x1, #:lo12:.LANCHOR110]
 	ldr	w1, [x1, 156]
 	cmp	w1, w23
-	beq	.L1181
-.L1180:
+	beq	.L1192
+.L1191:
 	add	x1, x22, x0, lsl 6
 	mov	w2, 24
 	mov	w5, 65535
@@ -7133,10 +7193,10 @@ ftl_write_completed:
 	and	w1, w1, w5
 	ldr	w6, [x4, 560]
 	cmp	w6, w5
-	bne	.L1182
+	bne	.L1193
 	str	w1, [x4, 560]
 	str	w3, [x4, 564]
-.L1182:
+.L1193:
 	add	x0, x22, x0, lsl 6
 	ldr	w2, [x0, 36]
 	adrp	x0, .LC77
@@ -7148,42 +7208,42 @@ ftl_write_completed:
 	str	w1, [x0, 556]
 	ldrh	w1, [x0, 16]
 	cmp	w1, w25
-	bne	.L1183
+	bne	.L1194
 	strh	wzr, [x0, 22]
-.L1181:
+.L1192:
 	mov	x0, x19
 	mov	w25, 1
 	bl	ftl_write_buf
-	b	.L1177
-.L1183:
+	b	.L1188
+.L1194:
 	ldrh	w1, [x0, 48]
 	cmp	w1, w25
-	bne	.L1181
+	bne	.L1192
 	strh	wzr, [x0, 54]
-	b	.L1181
-.L1178:
-	cbz	w25, .L1186
+	b	.L1192
+.L1189:
+	cbz	w25, .L1197
 	ldp	w1, w2, [x24, 36]
 	adrp	x0, .LC78
 	add	x0, x0, :lo12:.LC78
 	bl	printf
 	mov	x0, x19
 	bl	ftl_write_buf
-	b	.L1177
-.L1186:
+	b	.L1188
+.L1197:
 	ldrh	w2, [x24, 48]
 	ldr	w0, [x24, 36]
 	ldr	w1, [x24, 44]
 	bl	lpa_hash_update_ppa
 	ldrb	w0, [x24, 2]
-	tbz	x0, 2, .L1187
+	tbz	x0, 2, .L1198
 	and	w0, w0, -3
 	strb	w0, [x24, 2]
-	b	.L1177
-.L1187:
+	b	.L1188
+.L1198:
 	mov	x0, x19
 	bl	zbuf_free
-	b	.L1177
+	b	.L1188
 	.size	ftl_write_completed, .-ftl_write_completed
 	.section	.text.zftl_add_read_buf,"ax",@progbits
 	.align	2
@@ -7193,7 +7253,7 @@ zftl_add_read_buf:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	str	x19, [sp, 16]
-	cbnz	x0, .L1194
+	cbnz	x0, .L1205
 	mov	w2, 1143
 	adrp	x1, .LANCHOR132
 	adrp	x0, .LC0
@@ -7203,20 +7263,20 @@ zftl_add_read_buf:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	print_ftl_debug_info
-.L1194:
+.L1205:
 	ldrb	w1, [x0, 56]
 	mov	x19, x0
 	adrp	x0, .LANCHOR131
 	ldrb	w0, [x0, #:lo12:.LANCHOR131]
 	cmp	w1, w0
-	bls	.L1196
+	bls	.L1207
 	adrp	x1, .LANCHOR132
 	adrp	x0, .LC0
 	mov	w2, 1150
 	add	x1, x1, :lo12:.LANCHOR132
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1196:
+.L1207:
 	mov	x1, x19
 	adrp	x0, .LANCHOR133
 	add	x0, x0, :lo12:.LANCHOR133
@@ -7249,21 +7309,21 @@ ftl_alloc_sblk:
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1201
+	beq	.L1212
 	adrp	x0, .LANCHOR7
 	lsl	w22, w22, 1
 	ldr	x20, [x0, #:lo12:.LANCHOR7]
 	add	x20, x20, x19, uxth 2
 	ldrb	w0, [x20, 2]
 	tst	w0, 224
-	beq	.L1202
+	beq	.L1213
 	adrp	x1, .LANCHOR135
 	adrp	x0, .LC0
 	mov	w2, 939
 	add	x1, x1, :lo12:.LANCHOR135
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1202:
+.L1213:
 	ldrb	w0, [x20, 2]
 	bfi	w0, w21, 5, 3
 	ubfx	x1, x0, 3, 2
@@ -7272,19 +7332,19 @@ ftl_alloc_sblk:
 	strb	w0, [x20, 2]
 	and	w1, w0, 24
 	cmp	w1, 24
-	bne	.L1203
-	cbnz	w22, .L1203
+	bne	.L1214
+	cbnz	w22, .L1214
 	mov	w1, 1
 	bfi	w0, w1, 3, 2
 	strb	w0, [x20, 2]
-.L1203:
+.L1214:
 	mov	w0, w19
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1201:
+.L1212:
 	bl	print_ftl_debug_info
 	adrp	x20, .LC79
 	mov	w2, w21
@@ -7307,7 +7367,7 @@ ftl_alloc_sblk:
 	add	x1, x1, :lo12:.LANCHOR135
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L1203
+	b	.L1214
 	.size	ftl_alloc_sblk, .-ftl_alloc_sblk
 	.section	.text.sblk_init,"ax",@progbits
 	.align	2
@@ -7342,7 +7402,7 @@ dump_sblk_queue:
 	bl	printf
 	ldrb	w19, [x19, #:lo12:.LANCHOR60]
 	cmp	w19, 255
-	beq	.L1210
+	beq	.L1221
 	adrp	x1, .LANCHOR56
 	ubfiz	x19, x19, 6, 8
 	add	x1, x1, :lo12:.LANCHOR56
@@ -7350,7 +7410,7 @@ dump_sblk_queue:
 	add	x19, x1, x19
 	add	x21, x21, :lo12:.LC81
 	mov	x20, x1
-.L1212:
+.L1223:
 	ldrb	w2, [x19, 58]
 	mov	x0, x21
 	ldrb	w1, [x19, 1]
@@ -7358,11 +7418,11 @@ dump_sblk_queue:
 	bl	printf
 	ldrb	w19, [x19]
 	cmp	w19, 255
-	beq	.L1210
+	beq	.L1221
 	ubfiz	x19, x19, 6, 8
 	add	x19, x20, x19
-	b	.L1212
-.L1210:
+	b	.L1223
+.L1221:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -7376,17 +7436,17 @@ queue_lun_state:
 	adrp	x2, .LANCHOR60
 	ldrb	w2, [x2, #:lo12:.LANCHOR60]
 	cmp	w2, 255
-	beq	.L1228
+	beq	.L1239
 	adrp	x3, .LANCHOR32
 	mov	w8, 24
 	adrp	x10, .LANCHOR56
 	add	x10, x10, :lo12:.LANCHOR56
 	ldrb	w4, [x3, #:lo12:.LANCHOR32]
 	mov	w3, 1
-	adrp	x13, .L1224
+	adrp	x13, .L1235
 	mov	x15, x10
 	sub	w8, w8, w4
-	add	x13, x13, :lo12:.L1224
+	add	x13, x13, :lo12:.L1235
 	lsl	w4, w3, w4
 	sub	w4, w4, #1
 	and	w6, w4, 65535
@@ -7405,58 +7465,58 @@ queue_lun_state:
 	and	w5, w5, 65535
 	and	w3, w3, w5
 	and	w3, w3, w7
-.L1227:
+.L1238:
 	add	x14, x10, x2, lsl 6
 	ldr	w4, [x14, 40]
 	lsr	w0, w4, w8
 	and	w0, w6, w0
 	cmp	w11, w0
-	bne	.L1222
+	bne	.L1233
 	lsr	w4, w4, w12
 	and	w4, w5, w4
 	and	w4, w7, w4
 	ldrb	w0, [x14, 58]
 	cmp	w3, w4
-	bne	.L1223
+	bne	.L1234
 	cmp	w1, 1
-	bne	.L1220
+	bne	.L1231
 	cmp	w0, 7
 	ccmp	w0, 9, 4, ne
-	beq	.L1222
+	beq	.L1233
 	ret
-.L1223:
+.L1234:
 	cmp	w1, 3
-	bhi	.L1222
+	bhi	.L1233
 	ldrb	w4, [x13,w1,uxtw]
-	adr	x14, .Lrtx1224
+	adr	x14, .Lrtx1235
 	add	x4, x14, w4, sxtb #2
 	br	x4
-.Lrtx1224:
+.Lrtx1235:
 	.section	.rodata.queue_lun_state,"a",@progbits
 	.align	0
 	.align	2
-.L1224:
-	.byte	(.L1220 - .Lrtx1224) / 4
-	.byte	(.L1225 - .Lrtx1224) / 4
-	.byte	(.L1226 - .Lrtx1224) / 4
-	.byte	(.L1220 - .Lrtx1224) / 4
+.L1235:
+	.byte	(.L1231 - .Lrtx1235) / 4
+	.byte	(.L1236 - .Lrtx1235) / 4
+	.byte	(.L1237 - .Lrtx1235) / 4
+	.byte	(.L1231 - .Lrtx1235) / 4
 	.section	.text.queue_lun_state
-.L1225:
+.L1236:
 	cmp	w0, 7
 	ccmp	w0, 9, 4, ne
-	beq	.L1222
+	beq	.L1233
 	ret
-.L1226:
+.L1237:
 	cmp	w0, 11
-	bne	.L1220
-.L1222:
+	bne	.L1231
+.L1233:
 	lsl	x2, x2, 6
 	ldrb	w2, [x15, x2]
 	cmp	w2, 255
-	bne	.L1227
-.L1228:
+	bne	.L1238
+.L1239:
 	mov	w0, 0
-.L1220:
+.L1231:
 	ret
 	.size	queue_lun_state, .-queue_lun_state
 	.section	.text.queue_remove_completed_req,"ax",@progbits
@@ -7480,9 +7540,9 @@ queue_remove_completed_req:
 	add	x10, x4, :lo12:.LANCHOR65
 	mov	w6, 0
 	mov	w15, -1
-.L1231:
+.L1242:
 	cmp	w2, 255
-	beq	.L1232
+	beq	.L1243
 	sbfiz	x8, x2, 6, 32
 	sxtw	x0, w2
 	add	x4, x5, x8
@@ -7490,61 +7550,61 @@ queue_remove_completed_req:
 	sub	w4, w4, #12
 	and	w4, w4, 255
 	cmp	w4, 1
-	bls	.L1233
-	cbz	w6, .L1230
+	bls	.L1244
+	cbz	w6, .L1241
 	strb	w2, [x1, #:lo12:.LANCHOR60]
 	ret
-.L1233:
+.L1244:
 	lsl	x6, x0, 6
 	ldrb	w2, [x5, x8]
 	add	x4, x5, x6
 	strb	w15, [x5, x6]
 	ldrb	w6, [x4, 59]
 	cmp	w6, 1
-	bne	.L1236
+	bne	.L1247
 	ldrh	w4, [x4, 50]
-	cbnz	w4, .L1244
+	cbnz	w4, .L1255
 	mov	w4, w14
 	mov	x6, x10
-.L1237:
+.L1248:
 	cmp	w4, 255
-	bne	.L1242
+	bne	.L1253
 	add	x3, x3, :lo12:.LANCHOR56
 	strb	w2, [x1, #:lo12:.LANCHOR60]
 	add	x0, x3, x0, lsl 6
 	ldrb	w0, [x0, 1]
 	strb	w0, [x6]
 	ret
-.L1236:
-	cbnz	w6, .L1238
+.L1247:
+	cbnz	w6, .L1249
 	ldr	w4, [x4, 36]
 	cmn	w4, #1
-	beq	.L1238
+	beq	.L1249
 	mov	w4, w13
 	mov	x6, x7
-	b	.L1237
-.L1244:
+	b	.L1248
+.L1255:
 	mov	w4, w12
 	mov	x6, x16
-	b	.L1237
-.L1242:
+	b	.L1248
+.L1253:
 	mov	w6, w4
 	sbfiz	x4, x4, 6, 32
 	ldrb	w4, [x11, x4]
 	cmp	w4, 255
-	bne	.L1242
+	bne	.L1253
 	add	x0, x11, x0, lsl 6
 	sbfiz	x6, x6, 6, 32
 	ldrb	w0, [x0, 1]
 	strb	w0, [x11, x6]
-.L1238:
+.L1249:
 	mov	w6, 1
-	b	.L1231
-.L1232:
-	cbz	w6, .L1230
+	b	.L1242
+.L1243:
+	cbz	w6, .L1241
 	mov	w0, -1
 	strb	w0, [x1, #:lo12:.LANCHOR60]
-.L1230:
+.L1241:
 	ret
 	.size	queue_remove_completed_req, .-queue_remove_completed_req
 	.section	.text.pm_alloc_new_blk,"ax",@progbits
@@ -7566,23 +7626,23 @@ pm_alloc_new_blk:
 	and	w0, w0, 65535
 	strh	w0, [x1, 690]
 	cmp	w2, w0
-	bls	.L1255
+	bls	.L1266
 	add	x0, x1, x0, sxtw 1
 	ldrh	w1, [x0, 672]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1256
-.L1255:
+	bne	.L1267
+.L1266:
 	adrp	x19, .LC82
 	add	x19, x19, :lo12:.LC82
 	mov	w23, 65535
 	adrp	x22, .LANCHOR7
-.L1257:
+.L1268:
 	mov	w0, 1
 	bl	ftl_alloc_sblk
 	and	w21, w0, 65535
 	cmp	w21, w23
-	beq	.L1257
+	beq	.L1268
 	mov	w1, 0
 	mov	w0, w21
 	bl	ftl_erase_sblk
@@ -7592,7 +7652,7 @@ pm_alloc_new_blk:
 	add	x1, x1, 672
 	bl	ftl_get_blk_list_in_sblk
 	tst	w0, 65535
-	bne	.L1258
+	bne	.L1269
 	mov	w1, w21
 	mov	x0, x19
 	bl	printf
@@ -7601,8 +7661,8 @@ pm_alloc_new_blk:
 	ldrb	w0, [x21, 2]
 	orr	w0, w0, -32
 	strb	w0, [x21, 2]
-	b	.L1257
-.L1258:
+	b	.L1268
+.L1269:
 	ldr	x0, [x14]
 	adrp	x1, .LANCHOR136
 	mov	w2, 1
@@ -7611,29 +7671,29 @@ pm_alloc_new_blk:
 	str	w2, [x1, #:lo12:.LANCHOR136]
 	mov	w1, 65535
 	strh	wzr, [x0, 274]
-.L1260:
+.L1271:
 	ldrh	w2, [x0]
 	cmp	w2, w1
-	beq	.L1259
+	beq	.L1270
 	add	w19, w19, 1
 	add	x0, x0, 2
 	and	w19, w19, 65535
 	cmp	w19, 128
-	bne	.L1260
+	bne	.L1271
 	adrp	x1, .LANCHOR137
 	adrp	x0, .LC0
 	mov	w2, 264
 	add	x1, x1, :lo12:.LANCHOR137
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1259:
+.L1270:
 	ldr	x0, [x20, #:lo12:.LANCHOR110]
 	add	x19, x0, x19, sxtw 1
 	ldrh	w1, [x0, 688]
 	strh	w21, [x19, 416]
 	add	w1, w1, 1
 	strh	w1, [x0, 688]
-.L1256:
+.L1267:
 	ldr	x1, [x20, #:lo12:.LANCHOR110]
 	ldrh	w0, [x1, 690]
 	add	x0, x0, 336
@@ -7641,14 +7701,14 @@ pm_alloc_new_blk:
 	mov	w0, 65533
 	sub	w1, w19, #1
 	cmp	w0, w1, uxth
-	bcs	.L1262
+	bcs	.L1273
 	adrp	x1, .LANCHOR137
 	adrp	x0, .LC0
 	mov	w2, 270
 	add	x1, x1, :lo12:.LANCHOR137
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1262:
+.L1273:
 	adrp	x1, .LANCHOR32
 	mov	w2, 24
 	ldr	x0, [x20, #:lo12:.LANCHOR110]
@@ -7663,7 +7723,7 @@ pm_alloc_new_blk:
 	strh	w4, [x0, 694]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1265
+	tbz	x0, 12, .L1276
 	mov	w0, 1
 	and	w4, w4, 65535
 	lsl	w2, w0, w2
@@ -7673,7 +7733,7 @@ pm_alloc_new_blk:
 	mov	w1, w19
 	add	x0, x0, :lo12:.LC83
 	bl	printf
-.L1265:
+.L1276:
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -7693,62 +7753,62 @@ pm_select_ram_region:
 	add	x29, sp, 0
 	mov	w2, 65535
 	str	x19, [sp, 16]
-.L1274:
+.L1285:
 	lsl	x3, x1, 4
 	and	w19, w1, 65535
 	ldrh	w3, [x3, x0]
 	cmp	w3, w2
-	beq	.L1273
+	beq	.L1284
 	add	x1, x1, 1
 	cmp	x1, 8
-	bne	.L1274
+	bne	.L1285
 	add	x0, x0, 2
 	mov	w19, w1
 	mov	x2, x0
 	mov	w4, 32768
 	mov	w1, 0
-.L1276:
+.L1287:
 	ldrh	w3, [x2]
-	tbnz	x3, 15, .L1275
+	tbnz	x3, 15, .L1286
 	cmp	w3, w4
-	bcs	.L1275
+	bcs	.L1286
 	mov	w4, w3
 	mov	w19, w1
-.L1275:
+.L1286:
 	add	w1, w1, 1
 	add	x2, x2, 16
 	and	w1, w1, 65535
 	cmp	w1, 8
-	bne	.L1276
+	bne	.L1287
 	cmp	w19, 8
-	bne	.L1273
+	bne	.L1284
 	adrp	x1, .LANCHOR139
 	mov	w2, -1
 	ldrb	w3, [x1, #:lo12:.LANCHOR139]
 	mov	w1, 0
-.L1278:
+.L1289:
 	ldrh	w5, [x0]
 	cmp	w5, w2
-	bcs	.L1277
+	bcs	.L1288
 	ldrh	w4, [x0, -2]
 	cmp	w4, w3
 	csel	w2, w2, w5, eq
 	csel	w19, w19, w1, eq
-.L1277:
+.L1288:
 	add	w1, w1, 1
 	add	x0, x0, 16
 	and	w1, w1, 65535
 	cmp	w1, 8
-	bne	.L1278
+	bne	.L1289
 	cmp	w19, 8
-	bne	.L1273
+	bne	.L1284
 	adrp	x1, .LANCHOR140
 	adrp	x0, .LC0
 	mov	w2, 377
 	add	x1, x1, :lo12:.LANCHOR140
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1273:
+.L1284:
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -7793,15 +7853,15 @@ flash_lsb_page_tbl_build:
 	adrp	x19, .LANCHOR3
 	ldrb	w1, [x1, 12]
 	sdiv	w20, w20, w1
-	cbnz	w0, .L1286
+	cbnz	w0, .L1297
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1287:
+.L1298:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 512
-	bne	.L1287
-.L1293:
+	bne	.L1298
+.L1304:
 	adrp	x21, .LANCHOR145
 	add	x21, x21, :lo12:.LANCHOR145
 	mov	w2, 2048
@@ -7810,43 +7870,43 @@ flash_lsb_page_tbl_build:
 	add	x19, x19, :lo12:.LANCHOR3
 	bl	ftl_memset
 	mov	x0, 0
-.L1288:
+.L1299:
 	ldrh	w1, [x19, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	w20, w0, uxth
 	strh	w1, [x21, w1, sxtw 1]
-	bhi	.L1288
+	bhi	.L1299
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1286:
+.L1297:
 	cmp	w0, 1
-	bne	.L1289
+	bne	.L1300
 	add	x3, x19, :lo12:.LANCHOR3
 	mov	x1, 0
-.L1292:
+.L1303:
 	and	w0, w1, 65535
 	cmp	x1, 3
-	bls	.L1290
+	bls	.L1301
 	ubfiz	w2, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 2
 	sub	w0, w2, w0
 	and	w0, w0, 65535
-.L1290:
+.L1301:
 	strh	w0, [x3, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 512
-	bne	.L1292
-	b	.L1293
-.L1289:
+	bne	.L1303
+	b	.L1304
+.L1300:
 	cmp	w0, 2
-	bne	.L1294
+	bne	.L1305
 	add	x3, x19, :lo12:.LANCHOR3
 	mov	w1, 65535
 	mov	x0, 0
-.L1296:
+.L1307:
 	cmp	x0, 2
 	and	w2, w0, 65535
 	csel	w2, w2, w1, cc
@@ -7855,31 +7915,31 @@ flash_lsb_page_tbl_build:
 	add	x0, x0, 1
 	and	w1, w1, 65535
 	cmp	x0, 512
-	bne	.L1296
-	b	.L1293
-.L1294:
+	bne	.L1307
+	b	.L1304
+.L1305:
 	cmp	w0, 3
-	bne	.L1297
+	bne	.L1308
 	add	x3, x19, :lo12:.LANCHOR3
 	mov	x1, 0
-.L1300:
+.L1311:
 	and	w0, w1, 65535
 	cmp	x1, 5
-	bls	.L1298
+	bls	.L1309
 	ubfiz	w2, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 4
 	sub	w0, w2, w0
 	and	w0, w0, 65535
-.L1298:
+.L1309:
 	strh	w0, [x3, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 512
-	bne	.L1300
-	b	.L1293
-.L1297:
+	bne	.L1311
+	b	.L1304
+.L1308:
 	cmp	w0, 4
-	bne	.L1301
+	bne	.L1312
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	w2, 1
 	add	x1, x1, 16
@@ -7897,7 +7957,7 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1, -10]
 	strh	w0, [x1, -2]
 	mov	w0, 8
-.L1303:
+.L1314:
 	and	w3, w0, 1
 	ubfiz	w2, w0, 1, 15
 	add	w3, w3, 6
@@ -7906,40 +7966,40 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1], 2
 	and	w0, w0, 65535
 	cmp	w0, 512
-	bne	.L1303
-	b	.L1293
-.L1301:
+	bne	.L1314
+	b	.L1304
+.L1312:
 	cmp	w0, 5
-	bne	.L1304
+	bne	.L1315
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1305:
+.L1316:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 16
-	bne	.L1305
+	bne	.L1316
 	add	x1, x1, 32
-.L1306:
+.L1317:
 	strh	w0, [x1], 2
 	add	w0, w0, 2
 	and	w0, w0, 65535
 	cmp	w0, 1008
-	bne	.L1306
-	b	.L1293
-.L1304:
+	bne	.L1317
+	b	.L1304
+.L1315:
 	cmp	w0, 8
-	bne	.L1307
+	bne	.L1318
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1308:
+.L1319:
 	strh	w0, [x0, x1]
 	add	x0, x0, 2
 	cmp	x0, 1024
-	bne	.L1308
-	b	.L1293
-.L1307:
+	bne	.L1319
+	b	.L1304
+.L1318:
 	cmp	w0, 9
-	bne	.L1309
+	bne	.L1320
 	add	x0, x19, :lo12:.LANCHOR3
 	mov	w1, 1
 	add	x0, x0, 6
@@ -7948,43 +8008,43 @@ flash_lsb_page_tbl_build:
 	mov	w1, 2
 	strh	w1, [x0, -2]
 	mov	w1, 3
-.L1310:
+.L1321:
 	strh	w1, [x0], 2
 	add	w1, w1, 2
 	and	w1, w1, 65535
 	cmp	w1, 1021
-	bne	.L1310
-	b	.L1293
-.L1309:
+	bne	.L1321
+	b	.L1304
+.L1320:
 	cmp	w0, 10
-	bne	.L1311
+	bne	.L1322
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1312:
+.L1323:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 63
-	bne	.L1312
+	bne	.L1323
 	add	x1, x1, 126
-.L1313:
+.L1324:
 	strh	w0, [x1], 2
 	add	w0, w0, 2
 	and	w0, w0, 65535
 	cmp	w0, 961
-	bne	.L1313
-	b	.L1293
-.L1311:
+	bne	.L1324
+	b	.L1304
+.L1322:
 	cmp	w0, 11
-	bne	.L1314
+	bne	.L1325
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1315:
+.L1326:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L1315
+	bne	.L1326
 	add	x1, x1, 16
-.L1317:
+.L1328:
 	and	w3, w0, 1
 	ubfiz	w2, w0, 1, 15
 	add	w3, w3, 6
@@ -7993,22 +8053,22 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1], 2
 	and	w0, w0, 65535
 	cmp	w0, 512
-	bne	.L1317
-	b	.L1293
-.L1314:
+	bne	.L1328
+	b	.L1304
+.L1325:
 	cmp	w0, 13
-	bne	.L1293
+	bne	.L1304
 	add	x2, x19, :lo12:.LANCHOR3
 	mov	x1, 0
 	mov	w0, 0
-.L1318:
+.L1329:
 	strh	w0, [x1, x2]
 	add	w0, w0, 3
 	and	w0, w0, 65535
 	add	x1, x1, 2
 	cmp	w0, 1536
-	bne	.L1318
-	b	.L1293
+	bne	.L1329
+	b	.L1304
 	.size	flash_lsb_page_tbl_build, .-flash_lsb_page_tbl_build
 	.section	.text.flash_die_info_init,"ax",@progbits
 	.align	2
@@ -8022,13 +8082,13 @@ flash_die_info_init:
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	tbz	x0, 12, .L1341
+	tbz	x0, 12, .L1352
 	adrp	x1, .LANCHOR146
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR146
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1341:
+.L1352:
 	adrp	x22, .LANCHOR33
 	add	x19, x22, :lo12:.LANCHOR33
 	adrp	x23, .LANCHOR2
@@ -8060,32 +8120,47 @@ flash_die_info_init:
 	add	x20, x20, :lo12:.LANCHOR34
 	add	x22, x19, 1
 	mov	x12, 0
-.L1343:
+.L1355:
 	ldrb	w2, [x19]
+	lsl	x7, x12, 3
 	mov	w0, 2
 	strb	w0, [x12, x20]
-	add	x1, x21, x12, lsl 3
+	add	x1, x21, x7
 	mov	x0, x22
 	bl	flash_mem_cmp8
-	cbnz	w0, .L1342
+	cbnz	w0, .L1353
 	ldrb	w2, [x24, #:lo12:.LANCHOR18]
 	add	x1, x11, :lo12:.LANCHOR148
+	and	w5, w12, 255
 	add	w0, w2, 1
 	strb	w0, [x24, #:lo12:.LANCHOR18]
-	and	w0, w12, 255
+	add	x0, x15, :lo12:.LANCHOR30
 	str	wzr, [x1, x2, lsl 2]
-	add	x1, x15, :lo12:.LANCHOR30
-	strb	w0, [x1, x2]
+	strb	w5, [x0, x2]
+	ldrb	w0, [x7, x21]
+	cmp	w0, 173
+	bne	.L1354
+	adrp	x0, .LANCHOR13
+	ldr	x4, [x0, #:lo12:.LANCHOR13]
+	mov	w0, 191
+	add	x4, x4, x12, lsl 8
+	str	w0, [x4, 2056]
+	bl	nandc_wait_flash_ready
+	mov	w0, 223
+	str	w0, [x4, 2056]
+	bl	nandc_wait_flash_ready
+.L1354:
+	mov	w0, w5
 	bl	zftl_flash_enter_slc_mode
-.L1342:
+.L1353:
 	add	x12, x12, 1
 	cmp	x12, 4
-	bne	.L1343
+	bne	.L1355
 	add	x0, x8, :lo12:.LANCHOR33
 	ldrb	w1, [x0, 8]
 	cmp	w1, 2
-	beq	.L1344
-.L1348:
+	beq	.L1356
+.L1360:
 	add	x8, x8, :lo12:.LANCHOR33
 	ldrb	w0, [x24, #:lo12:.LANCHOR18]
 	ldp	x19, x20, [sp, 16]
@@ -8099,7 +8174,7 @@ flash_die_info_init:
 	adrp	x1, .LANCHOR149
 	strh	w0, [x1, #:lo12:.LANCHOR149]
 	ret
-.L1344:
+.L1356:
 	ldrh	w1, [x23, #:lo12:.LANCHOR2]
 	add	x14, x14, :lo12:.LANCHOR48
 	ldrb	w12, [x0, 13]
@@ -8115,12 +8190,12 @@ flash_die_info_init:
 	and	w1, w1, 65280
 	mul	w12, w12, w1
 	lsl	w22, w12, 1
-.L1347:
+.L1359:
 	mov	w2, w20
 	add	x1, x14, x13, lsl 3
 	mov	x0, x7
 	bl	flash_mem_cmp8
-	cbnz	w0, .L1345
+	cbnz	w0, .L1357
 	ldrb	w1, [x19]
 	cmp	w21, 0
 	csel	w2, w12, w22, eq
@@ -8128,11 +8203,11 @@ flash_die_info_init:
 	strb	w0, [x19]
 	str	w2, [x11, x1, lsl 2]
 	strb	w13, [x15, x1]
-.L1345:
+.L1357:
 	add	x13, x13, 1
 	cmp	x13, 4
-	bne	.L1347
-	b	.L1348
+	bne	.L1359
+	b	.L1360
 	.size	flash_die_info_init, .-flash_die_info_init
 	.section	.text.lpa_hash_init,"ax",@progbits
 	.align	2
@@ -8169,7 +8244,7 @@ lpa_rebuild_hash:
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	tbz	x0, 12, .L1361
+	tbz	x0, 12, .L1373
 	adrp	x1, .LANCHOR150
 	adrp	x0, .LC84
 	mov	w3, 0
@@ -8177,7 +8252,7 @@ lpa_rebuild_hash:
 	add	x1, x1, :lo12:.LANCHOR150
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L1361:
+.L1373:
 	adrp	x20, .LANCHOR95
 	adrp	x22, .LANCHOR80
 	adrp	x19, .LANCHOR116
@@ -8200,28 +8275,28 @@ lpa_rebuild_hash:
 	ldr	x5, [x21, #:lo12:.LANCHOR118]
 	mov	w1, 0
 	ldr	x4, [x0, #:lo12:.LANCHOR117]
-.L1362:
+.L1374:
 	ldrh	w0, [x20]
 	mul	w0, w0, w3
 	cmp	w1, w0, lsl 1
-	blt	.L1364
+	blt	.L1376
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1364:
+.L1376:
 	uxtw	x2, w1
 	ldr	w0, [x4, x2, lsl 2]
 	cmn	w0, #1
-	beq	.L1363
+	beq	.L1375
 	and	x0, x0, 255
 	ldrh	w6, [x19, x0, lsl 1]
 	strh	w1, [x19, x0, lsl 1]
 	strh	w6, [x5, x2, lsl 1]
-.L1363:
+.L1375:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L1362
+	b	.L1374
 	.size	lpa_rebuild_hash, .-lpa_rebuild_hash
 	.section	.text.zftl_read_flash_info,"ax",@progbits
 	.align	2
@@ -8269,20 +8344,20 @@ zftl_read_flash_info:
 	strb	w0, [x19, 9]
 	adrp	x0, .LANCHOR18
 	ldrb	w3, [x0, #:lo12:.LANCHOR18]
-.L1373:
+.L1385:
 	cmp	w3, w1, uxtb
-	bhi	.L1374
+	bhi	.L1386
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1374:
+.L1386:
 	ldrb	w0, [x1, x2]
 	add	x1, x1, 1
 	ldrb	w5, [x19, 10]
 	lsl	w0, w4, w0
 	orr	w0, w0, w5
 	strb	w0, [x19, 10]
-	b	.L1373
+	b	.L1385
 	.size	zftl_read_flash_info, .-zftl_read_flash_info
 	.section	.text.gc_static_wearleveling,"ax",@progbits
 	.align	2
@@ -8301,24 +8376,35 @@ gc_static_wearleveling:
 	ldr	w1, [x0, 32]
 	mov	w0, 10240
 	cmp	w1, w0
-	bls	.L1377
+	bls	.L1389
 	bl	ftl_tmp_into_update
-.L1377:
+.L1389:
 	adrp	x19, .LANCHOR10
+	mov	w3, 36000
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldr	w1, [x0, 568]
 	ldr	w2, [x0, 12]
+	add	w3, w1, w3
+	cmp	w2, w3
+	bcs	.L1390
+	ldr	x4, [x22, #:lo12:.LANCHOR110]
+	ldr	w3, [x0, 572]
+	add	w3, w3, 256
+	ldr	w4, [x4, 36]
+	cmp	w4, w3
+	bcc	.L1442
+.L1390:
 	add	w1, w1, 860160
 	add	w1, w1, 3840
 	cmp	w2, w1
-	bhi	.L1378
+	bhi	.L1392
 	ldr	x3, [x22, #:lo12:.LANCHOR110]
 	ldr	w1, [x0, 572]
 	add	w1, w1, 32
 	ldr	w3, [x3, 36]
 	cmp	w3, w1
-	bls	.L1428
-.L1378:
+	bls	.L1443
+.L1392:
 	ldr	x1, [x22, #:lo12:.LANCHOR110]
 	mov	w20, 65535
 	adrp	x8, .LANCHOR14
@@ -8338,10 +8424,10 @@ gc_static_wearleveling:
 	str	wzr, [x29, 128]
 	str	wzr, [x29, 136]
 	stp	wzr, wzr, [x29, 144]
-.L1380:
+.L1394:
 	ldrh	w0, [x10]
 	cmp	w0, w28
-	bhi	.L1389
+	bhi	.L1403
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w2, 128
 	mov	w1, 255
@@ -8357,7 +8443,7 @@ gc_static_wearleveling:
 	mov	x1, x0
 	lsl	x28, x0, 2
 	add	x10, x8, x28
-	tbz	x3, 10, .L1390
+	tbz	x3, 10, .L1404
 	adrp	x2, .LANCHOR9
 	ldrb	w6, [x10, 3]
 	ldrb	w4, [x10, 2]
@@ -8374,21 +8460,21 @@ gc_static_wearleveling:
 	add	x0, x0, :lo12:.LC86
 	bl	printf
 	ldp	x8, x10, [x29, 112]
-.L1390:
+.L1404:
 	ldrb	w0, [x10, 2]
 	and	w3, w0, 224
 	cmp	w3, 32
-	bne	.L1391
+	bne	.L1405
 	ldr	x1, [x22, #:lo12:.LANCHOR110]
 	ldrh	w1, [x1, 688]
 	cmp	w1, 2
-	bls	.L1391
+	bls	.L1405
 	adrp	x1, .LANCHOR151
 	mov	w2, 1
 	str	w2, [x1, #:lo12:.LANCHOR151]
-.L1391:
+.L1405:
 	ldrb	w1, [x10, 2]
-	tbz	x1, 3, .L1392
+	tbz	x1, 3, .L1406
 	ldr	x1, [x22, #:lo12:.LANCHOR110]
 	ldrh	w2, [x8, x28]
 	and	w2, w2, 2047
@@ -8397,10 +8483,10 @@ gc_static_wearleveling:
 	ldrh	w1, [x1, #:lo12:.LANCHOR152]
 	add	w1, w2, w1, lsr 2
 	cmp	w4, w1
-	ble	.L1392
+	ble	.L1406
 	and	w0, w0, 192
 	cmp	w0, 64
-	bne	.L1393
+	bne	.L1407
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w1, 0
 	mov	w2, 1
@@ -8409,7 +8495,7 @@ gc_static_wearleveling:
 	adrp	x0, .LANCHOR71+2110
 	mov	w1, 1
 	strh	w1, [x0, #:lo12:.LANCHOR71+2110]
-.L1392:
+.L1406:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldr	x2, [x29, 152]
 	ldr	x11, [x24, #:lo12:.LANCHOR7]
@@ -8418,7 +8504,7 @@ gc_static_wearleveling:
 	mov	x1, x0
 	lsl	x10, x0, 2
 	add	x28, x11, x10
-	tbz	x2, 10, .L1394
+	tbz	x2, 10, .L1408
 	adrp	x2, .LANCHOR9
 	ldrb	w6, [x28, 3]
 	ldrb	w4, [x28, 2]
@@ -8435,9 +8521,9 @@ gc_static_wearleveling:
 	add	x0, x0, :lo12:.LC87
 	bl	printf
 	ldp	x10, x11, [x29, 112]
-.L1394:
+.L1408:
 	ldrb	w0, [x28, 2]
-	tbz	x0, 3, .L1395
+	tbz	x0, 3, .L1409
 	ldr	x0, [x22, #:lo12:.LANCHOR110]
 	ldr	w1, [x11, x10]
 	ldrh	w2, [x0, 98]
@@ -8446,11 +8532,11 @@ gc_static_wearleveling:
 	ldrh	w0, [x0, #:lo12:.LANCHOR153]
 	add	w0, w1, w0, lsr 2
 	cmp	w2, w0
-	ble	.L1395
+	ble	.L1409
 	ldrb	w0, [x28, 2]
 	and	w1, w0, 192
 	cmp	w1, 64
-	bne	.L1396
+	bne	.L1410
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w1, 0
 	mov	w2, 1
@@ -8459,10 +8545,10 @@ gc_static_wearleveling:
 	adrp	x0, .LANCHOR71+2110
 	mov	w1, 1
 	strh	w1, [x0, #:lo12:.LANCHOR71+2110]
-.L1395:
+.L1409:
 	ldr	x0, [x29, 152]
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1397
+	tbz	x0, 10, .L1411
 	adrp	x2, .LANCHOR9
 	ldr	x1, [x24, #:lo12:.LANCHOR7]
 	uxtw	x6, w27
@@ -8482,10 +8568,10 @@ gc_static_wearleveling:
 	and	w2, w2, 2047
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1397:
+.L1411:
 	ldr	x0, [x29, 152]
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1398
+	tbz	x0, 10, .L1412
 	ldr	w6, [x29, 128]
 	adrp	x2, .LANCHOR9
 	ldr	x1, [x24, #:lo12:.LANCHOR7]
@@ -8505,7 +8591,7 @@ gc_static_wearleveling:
 	ubfx	x5, x4, 5, 3
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1398:
+.L1412:
 	ldr	x0, [x22, #:lo12:.LANCHOR110]
 	ldrh	w1, [x29, 148]
 	strh	w1, [x0, 96]
@@ -8520,7 +8606,7 @@ gc_static_wearleveling:
 	strh	w4, [x0, 90]
 	ldr	x0, [x29, 152]
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1399
+	tbz	x0, 10, .L1413
 	adrp	x0, .LC90
 	and	w4, w4, 65535
 	and	w3, w3, 65535
@@ -8528,10 +8614,10 @@ gc_static_wearleveling:
 	mov	w1, w26
 	add	x0, x0, :lo12:.LC90
 	bl	printf
-.L1399:
+.L1413:
 	ldr	x0, [x29, 152]
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1400
+	tbz	x0, 10, .L1414
 	adrp	x0, .LANCHOR153
 	ldr	w3, [x29, 148]
 	mov	w4, w23
@@ -8543,21 +8629,21 @@ gc_static_wearleveling:
 	adrp	x0, .LC91
 	add	x0, x0, :lo12:.LC91
 	bl	printf
-.L1400:
+.L1414:
 	sub	w0, w23, w21
 	str	w0, [x29, 144]
 	adrp	x0, .LANCHOR153
 	ldr	w1, [x29, 144]
 	ldrh	w0, [x0, #:lo12:.LANCHOR153]
 	cmp	w1, w0
-	bgt	.L1401
+	bgt	.L1415
 	adrp	x1, .LANCHOR152
 	ldr	w0, [x29, 148]
 	ldrh	w1, [x1, #:lo12:.LANCHOR152]
 	sub	w0, w0, w20
 	cmp	w0, w1
-	ble	.L1429
-.L1401:
+	ble	.L1444
+.L1415:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	adrp	x26, .LANCHOR71
 	add	x26, x26, :lo12:.LANCHOR71
@@ -8572,60 +8658,60 @@ gc_static_wearleveling:
 	adrp	x0, .LANCHOR152
 	add	x0, x0, :lo12:.LANCHOR152
 	str	x0, [x29, 128]
-.L1403:
+.L1417:
 	ldr	x0, [x29, 136]
 	ldrh	w0, [x0]
 	cmp	w27, w0
-	bcc	.L1413
-.L1412:
+	bcc	.L1427
+.L1426:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	str	w28, [x0, 580]
-.L1402:
-	cbz	w21, .L1415
+.L1416:
+	cbz	w21, .L1429
 	ldr	x2, [x22, #:lo12:.LANCHOR110]
 	adrp	x0, .LANCHOR6
 	ldrh	w5, [x0, #:lo12:.LANCHOR6]
 	ldr	x0, [x24, #:lo12:.LANCHOR7]
 	ldrh	w1, [x2, 134]
 	add	x0, x0, x1, uxth 2
-.L1416:
+.L1430:
 	cmp	w1, w5
-	bcc	.L1418
+	bcc	.L1432
 	ldrh	w0, [x2, 72]
 	add	w0, w21, w0
 	strh	w0, [x2, 72]
 	ldrh	w0, [x2, 98]
 	cmp	w21, w0
-	bcs	.L1415
+	bcs	.L1429
 	sub	w21, w0, w21
 	strh	w21, [x2, 98]
-.L1415:
-	cbz	w20, .L1421
+.L1429:
+	cbz	w20, .L1435
 	ldr	x2, [x22, #:lo12:.LANCHOR110]
 	adrp	x0, .LANCHOR6
 	ldrh	w6, [x0, #:lo12:.LANCHOR6]
 	ldr	x0, [x24, #:lo12:.LANCHOR7]
 	ldrh	w1, [x2, 134]
 	add	x0, x0, x1, uxth 2
-.L1422:
+.L1436:
 	cmp	w1, w6
-	bcc	.L1424
+	bcc	.L1438
 	ldrh	w0, [x2, 74]
 	add	w0, w20, w0
 	strh	w0, [x2, 74]
 	ldrh	w0, [x2, 96]
 	cmp	w20, w0
-	bcs	.L1421
+	bcs	.L1435
 	sub	w20, w0, w20
 	strh	w20, [x2, 96]
-.L1421:
+.L1435:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L1379
+	beq	.L1393
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x3, [x2, #:lo12:.LANCHOR9]
@@ -8633,13 +8719,14 @@ gc_static_wearleveling:
 	ldrh	w2, [x2, #:lo12:.LANCHOR95]
 	ldrh	w1, [x3, x1]
 	cmp	w1, w2, lsr 1
-	bhi	.L1379
+	bhi	.L1393
 	add	w23, w23, 1
 	mov	w2, 1
 	mov	w1, 0
 	bl	gc_add_sblk
-.L1379:
+.L1393:
 	add	w0, w23, w25
+.L1388:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -8647,7 +8734,7 @@ gc_static_wearleveling:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L1389:
+.L1403:
 	uxtw	x7, w28
 	ldr	x6, [x24, #:lo12:.LANCHOR7]
 	lsl	x2, x7, 2
@@ -8655,40 +8742,40 @@ gc_static_wearleveling:
 	ldrb	w0, [x11, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L1381
+	beq	.L1395
 	ubfx	x4, x0, 3, 2
-	tbz	x4, 0, .L1382
+	tbz	x4, 0, .L1396
 	ldr	w0, [x6, x2]
 	ldrh	w1, [x6, x2]
 	ubfx	x0, x0, 11, 8
 	and	w1, w1, 2047
-.L1383:
+.L1397:
 	ldr	w3, [x29, 136]
 	add	w26, w26, 1
 	and	w26, w26, 65535
 	cmp	w20, w1
 	add	w3, w3, w1
 	str	w3, [x29, 136]
-	bls	.L1427
+	bls	.L1441
 	ldr	x3, [x19, #:lo12:.LANCHOR10]
 	mov	w20, w1
 	strh	w28, [x3, 586]
-.L1427:
+.L1441:
 	ldr	w3, [x29, 148]
 	cmp	w3, w1
-	bcs	.L1386
+	bcs	.L1400
 	mov	w27, w28
 	str	w1, [x29, 148]
-.L1386:
+.L1400:
 	mov	w3, 65535
 	cmp	w0, w3
-	bne	.L1385
-.L1387:
+	bne	.L1399
+.L1401:
 	cmp	w0, 9
 	ccmp	w1, 9, 0, hi
-	bhi	.L1381
+	bhi	.L1395
 	ldr	w0, [x8]
-	tbz	x0, 8, .L1381
+	tbz	x0, 8, .L1395
 	adrp	x0, .LANCHOR9
 	ldr	w3, [x6, x2]
 	ldrh	w2, [x6, x2]
@@ -8707,77 +8794,77 @@ gc_static_wearleveling:
 	bl	printf
 	ldr	x8, [x29, 120]
 	ldr	x10, [x29, 152]
-.L1381:
+.L1395:
 	add	w28, w28, 1
 	and	w28, w28, 65535
-	b	.L1380
-.L1382:
+	b	.L1394
+.L1396:
 	tst	w0, 24
-	bne	.L1384
+	bne	.L1398
 	ldrh	w1, [x6, x2]
 	mov	w0, 65535
 	and	w1, w1, 2047
-	b	.L1383
-.L1384:
+	b	.L1397
+.L1398:
 	ldr	w0, [x6, x2]
 	mov	w1, 65535
 	ubfx	x0, x0, 11, 8
-.L1385:
+.L1399:
 	ldr	w3, [x29, 144]
 	add	w25, w25, 1
 	and	w25, w25, 65535
 	cmp	w21, w0
 	add	w3, w3, w0
 	str	w3, [x29, 144]
-	bls	.L1388
+	bls	.L1402
 	ldr	x3, [x19, #:lo12:.LANCHOR10]
 	mov	w21, w0
 	strh	w28, [x3, 584]
-.L1388:
+.L1402:
 	cmp	w23, w0
-	bcs	.L1387
+	bcs	.L1401
 	mov	w23, w0
 	str	w28, [x29, 128]
-	b	.L1387
-.L1393:
-	cbnz	w3, .L1392
+	b	.L1401
+.L1407:
+	cbnz	w3, .L1406
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
 	mov	w0, 65535
 	ldrh	w2, [x1, 590]
 	cmp	w2, w0
-	bne	.L1392
+	bne	.L1406
 	ldrh	w0, [x1, 586]
 	ldrh	w1, [x1, 588]
 	cmp	w1, w0
-	beq	.L1392
+	beq	.L1406
 	bl	zftl_remove_free_node
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldrh	w1, [x0, 586]
 	strh	w1, [x0, 590]
 	mov	w1, -1
 	strh	w1, [x0, 586]
-	b	.L1392
-.L1396:
+	b	.L1406
+.L1410:
 	and	w0, w0, 248
 	cmp	w0, 16
-	bne	.L1395
+	bne	.L1409
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
 	mov	w0, 65535
 	ldrh	w2, [x1, 588]
 	cmp	w2, w0
-	bne	.L1395
+	bne	.L1409
 	ldrh	w0, [x1, 584]
 	ldrh	w1, [x1, 590]
 	cmp	w1, w0
-	beq	.L1395
+	beq	.L1409
 	bl	zftl_remove_free_node
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldrh	w1, [x0, 584]
 	strh	w1, [x0, 588]
 	mov	w1, -1
 	strh	w1, [x0, 584]
-	b	.L1395
-.L1413:
+	b	.L1409
+.L1427:
 	add	w7, w28, 1
 	ldr	x4, [x24, #:lo12:.LANCHOR7]
 	and	w28, w7, 65535
@@ -8788,31 +8875,31 @@ gc_static_wearleveling:
 	add	x0, x4, x3
 	ldrb	w0, [x0, 2]
 	tst	w0, 192
-	beq	.L1405
+	beq	.L1419
 	and	w2, w0, 224
 	cmp	w2, 224
-	beq	.L1405
+	beq	.L1419
 	ubfx	x0, x0, 3, 2
 	and	w1, w0, 1
-	tbz	x0, 0, .L1406
+	tbz	x0, 0, .L1420
 	cmp	w2, 160
-.L1493:
-	bne	.L1408
+.L1507:
+	bne	.L1422
 	adrp	x0, .LANCHOR153
 	ldr	w2, [x29, 144]
 	ldrh	w0, [x0, #:lo12:.LANCHOR153]
 	cmp	w2, w0
-	ble	.L1409
+	ble	.L1423
 	ldr	w0, [x4, x3]
 	ubfx	x0, x0, 11, 8
 	cmp	w0, w21
-	bls	.L1410
-	cbz	w1, .L1409
+	bls	.L1424
+	cbz	w1, .L1423
 	ldrh	w0, [x4, x3]
 	and	w0, w0, 2047
 	cmp	w0, w20
-	bgt	.L1409
-.L1410:
+	bgt	.L1423
+.L1424:
 	stp	x4, x8, [x29, 104]
 	mov	w2, 1
 	str	x3, [x29, 120]
@@ -8826,7 +8913,7 @@ gc_static_wearleveling:
 	ldp	x4, x8, [x29, 104]
 	ldr	x3, [x29, 120]
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1409
+	tbz	x0, 10, .L1423
 	adrp	x0, .LANCHOR9
 	ldr	w6, [x4, x3]
 	ldrh	w5, [x4, x3]
@@ -8842,38 +8929,38 @@ gc_static_wearleveling:
 	ldrh	w3, [x1, x8, lsl 1]
 	mov	w1, w28
 	ubfx	x2, x2, 5, 3
-.L1494:
+.L1508:
 	bl	printf
-.L1409:
+.L1423:
 	cmp	w23, 4
 	ccmp	w25, 4, 2, ls
-	bhi	.L1412
-.L1405:
+	bhi	.L1426
+.L1419:
 	add	w27, w27, 1
 	and	w27, w27, 65535
-	b	.L1403
-.L1406:
+	b	.L1417
+.L1420:
 	cmp	w0, 2
-	b	.L1493
-.L1408:
+	b	.L1507
+.L1422:
 	ldr	x2, [x29, 128]
 	ldr	w0, [x29, 148]
 	sub	w0, w0, w20
 	ldrh	w2, [x2]
 	cmp	w0, w2
-	ble	.L1409
+	ble	.L1423
 	ldrh	w0, [x4, x3]
 	add	w2, w20, 8
 	and	w0, w0, 2047
 	cmp	w0, w2
-	ble	.L1411
-	cbz	w1, .L1409
+	ble	.L1425
+	cbz	w1, .L1423
 	ldr	w0, [x4, x3]
 	add	w1, w21, 4
 	ubfx	x0, x0, 11, 8
 	cmp	w0, w1
-	bgt	.L1409
-.L1411:
+	bgt	.L1423
+.L1425:
 	stp	x4, x8, [x29, 104]
 	mov	w2, 1
 	str	x3, [x29, 120]
@@ -8887,7 +8974,7 @@ gc_static_wearleveling:
 	ldp	x4, x8, [x29, 104]
 	ldr	x3, [x29, 120]
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1409
+	tbz	x0, 10, .L1423
 	adrp	x0, .LANCHOR9
 	ldr	w6, [x4, x3]
 	ldrh	w5, [x4, x3]
@@ -8903,48 +8990,51 @@ gc_static_wearleveling:
 	ldrh	w3, [x1, x8, lsl 1]
 	mov	w1, w28
 	ubfx	x2, x2, 5, 3
-	b	.L1494
-.L1429:
+	b	.L1508
+.L1444:
 	mov	w25, 0
 	mov	w23, 0
-	b	.L1402
-.L1418:
+	b	.L1416
+.L1432:
 	ldr	w3, [x0]
 	ubfx	x4, x3, 11, 8
 	cmp	w21, w4
-	bhi	.L1417
+	bhi	.L1431
 	ldrb	w6, [x0, 2]
 	tst	w6, 24
-	beq	.L1417
+	beq	.L1431
 	sub	w4, w4, w21
 	bfi	w3, w4, 11, 8
 	str	w3, [x0]
-.L1417:
+.L1431:
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 65535
-	b	.L1416
-.L1424:
+	b	.L1430
+.L1438:
 	ldrh	w3, [x0]
 	and	w4, w3, 2047
 	cmp	w4, w20
-	blt	.L1423
+	blt	.L1437
 	ldrb	w5, [x0, 2]
 	and	w5, w5, 24
 	cmp	w5, 16
-	beq	.L1423
+	beq	.L1437
 	sub	w4, w4, w20
 	bfi	w3, w4, 0, 11
 	strh	w3, [x0]
-.L1423:
+.L1437:
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 65535
-	b	.L1422
-.L1428:
+	b	.L1436
+.L1443:
 	mov	w25, 0
 	mov	w23, 0
-	b	.L1379
+	b	.L1393
+.L1442:
+	mov	w0, 0
+	b	.L1388
 	.size	gc_static_wearleveling, .-gc_static_wearleveling
 	.section	.text.zftl_sblk_list_init,"ax",@progbits
 	.align	2
@@ -9022,11 +9112,11 @@ zftl_sblk_list_init:
 	stp	x10, x11, [x29, 168]
 	str	x8, [x29, 184]
 	str	x0, [x29, 104]
-.L1496:
+.L1510:
 	ldr	x0, [x29, 192]
 	ldrh	w0, [x0]
 	cmp	w19, w0
-	blt	.L1513
+	blt	.L1527
 	ldr	x0, [x26, #:lo12:.LANCHOR110]
 	ldrh	w1, [x25, #:lo12:.LANCHOR103]
 	ldp	x27, x28, [sp, 80]
@@ -9047,13 +9137,13 @@ zftl_sblk_list_init:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 208
 	ret
-.L1513:
+.L1527:
 	adrp	x0, .LANCHOR7
 	sxtw	x2, w19
 	ldr	x3, [x0, #:lo12:.LANCHOR7]
 	add	x28, x3, x2, lsl 2
 	ldrb	w5, [x28, 3]
-	cbz	w5, .L1514
+	cbz	w5, .L1528
 	ldr	x0, [x29, 128]
 	mov	w1, 0
 	ldr	x6, [x26, #:lo12:.LANCHOR110]
@@ -9061,15 +9151,15 @@ zftl_sblk_list_init:
 	ldr	x0, [x29, 120]
 	ldrh	w8, [x0, #:lo12:.LANCHOR86]
 	mov	w0, 0
-.L1498:
+.L1512:
 	cmp	w1, w7
-	blt	.L1501
-	cbz	w0, .L1502
+	blt	.L1515
+	cbz	w0, .L1516
 	mov	w1, 32768
 	sdiv	w0, w1, w0
 	add	w0, w0, 1
 	sxth	w0, w0
-.L1497:
+.L1511:
 	ldr	x3, [x29, 184]
 	mov	w1, 6
 	smull	x1, w19, w1
@@ -9084,44 +9174,44 @@ zftl_sblk_list_init:
 	and	w0, w0, 224
 	cmp	w0, 32
 	ccmp	w0, w1, 4, ne
-	beq	.L1503
+	beq	.L1517
 	adrp	x1, .LANCHOR10
 	ldr	x1, [x1, #:lo12:.LANCHOR10]
 	ldrh	w4, [x1, 16]
 	cmp	w19, w4
-	beq	.L1503
+	beq	.L1517
 	ldrh	w4, [x1, 48]
 	cmp	w19, w4
-	beq	.L1503
+	beq	.L1517
 	ldrh	w1, [x1, 80]
 	cmp	w19, w1
-	beq	.L1503
+	beq	.L1517
 	cmp	w0, 64
-	bne	.L1504
+	bne	.L1518
 	ldr	x0, [x29, 144]
 	add	x2, x22, :lo12:.LANCHOR97
 	mov	w1, w19
 	add	x0, x0, :lo12:.LANCHOR12
-.L1520:
+.L1534:
 	bl	_insert_data_list
-.L1503:
+.L1517:
 	add	w19, w19, 1
 	sxth	w19, w19
-	b	.L1496
-.L1501:
+	b	.L1510
+.L1515:
 	asr	w4, w5, w1
-	tbnz	x4, 0, .L1499
+	tbnz	x4, 0, .L1513
 	add	w0, w8, w0
 	sxth	w0, w0
-.L1500:
+.L1514:
 	add	w1, w1, 1
-	b	.L1498
-.L1499:
+	b	.L1512
+.L1513:
 	ldrh	w4, [x6, 146]
 	add	w4, w4, 1
 	strh	w4, [x6, 146]
-	b	.L1500
-.L1502:
+	b	.L1514
+.L1516:
 	ldrb	w1, [x28, 2]
 	mov	w4, -1
 	orr	w1, w1, -32
@@ -9129,34 +9219,34 @@ zftl_sblk_list_init:
 	adrp	x1, .LANCHOR9
 	ldr	x1, [x1, #:lo12:.LANCHOR9]
 	strh	w4, [x1, x2, lsl 1]
-	b	.L1497
-.L1514:
+	b	.L1511
+.L1528:
 	ldr	w0, [x29, 204]
-	b	.L1497
-.L1504:
+	b	.L1511
+.L1518:
 	cmp	w0, 96
-	bne	.L1505
+	bne	.L1519
 	ldr	x0, [x29, 152]
 	add	x2, x20, :lo12:.LANCHOR99
 	mov	w1, w19
 	add	x0, x0, :lo12:.LANCHOR89
-	b	.L1520
-.L1505:
+	b	.L1534
+.L1519:
 	cmp	w0, 160
-	bne	.L1506
+	bne	.L1520
 	ldr	x0, [x29, 136]
 	add	x2, x21, :lo12:.LANCHOR93
 	mov	w1, w19
 	add	x0, x0, :lo12:.LANCHOR88
-	b	.L1520
-.L1506:
-	cbnz	w0, .L1503
+	b	.L1534
+.L1520:
+	cbnz	w0, .L1517
 	adrp	x0, .LANCHOR9
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w2, [x0, x2, lsl 1]
-	cbz	w2, .L1507
+	cbz	w2, .L1521
 	cmp	w27, 2
-	bgt	.L1508
+	bgt	.L1522
 	mov	w1, w19
 	adrp	x0, .LC94
 	add	x0, x0, :lo12:.LC94
@@ -9164,48 +9254,48 @@ zftl_sblk_list_init:
 	ldrb	w0, [x28, 2]
 	add	w27, w27, 1
 	sxth	w27, w27
-	tbz	x0, 4, .L1509
+	tbz	x0, 4, .L1523
 	mov	w1, 5
-.L1519:
+.L1533:
 	bfi	w0, w1, 5, 3
 	strb	w0, [x28, 2]
 	mov	w2, 0
 	mov	w1, 1
 	mov	w0, w19
 	bl	gc_add_sblk
-	b	.L1503
-.L1509:
+	b	.L1517
+.L1523:
 	mov	w1, 2
-	b	.L1519
-.L1508:
+	b	.L1533
+.L1522:
 	ldp	x0, x1, [x29, 104]
 	mov	w2, 651
 	bl	printf
-.L1507:
+.L1521:
 	ldrb	w0, [x28, 2]
 	ands	w0, w0, 24
-	bne	.L1511
+	bne	.L1525
 	ldr	x0, [x29, 176]
 	add	x2, x25, :lo12:.LANCHOR103
 	mov	w1, w19
 	add	x0, x0, :lo12:.LANCHOR104
-.L1521:
+.L1535:
 	bl	_insert_free_list
-	b	.L1503
-.L1511:
+	b	.L1517
+.L1525:
 	cmp	w0, 16
-	bne	.L1512
+	bne	.L1526
 	ldr	x0, [x29, 168]
 	add	x2, x24, :lo12:.LANCHOR105
 	mov	w1, w19
 	add	x0, x0, :lo12:.LANCHOR106
-	b	.L1521
-.L1512:
+	b	.L1535
+.L1526:
 	ldr	x0, [x29, 160]
 	add	x2, x23, :lo12:.LANCHOR107
 	mov	w1, w19
 	add	x0, x0, :lo12:.LANCHOR108
-	b	.L1521
+	b	.L1535
 	.size	zftl_sblk_list_init, .-zftl_sblk_list_init
 	.section	.text.ftl_open_sblk_init,"ax",@progbits
 	.align	2
@@ -9226,14 +9316,14 @@ ftl_open_sblk_init:
 	add	x21, x21, :lo12:.LANCHOR80
 	add	x22, x22, :lo12:.LC82
 	stp	x25, x26, [sp, 64]
-.L1523:
+.L1537:
 	mov	w25, 65535
-.L1524:
+.L1538:
 	mov	w0, w23
 	bl	ftl_alloc_sblk
 	and	w20, w0, 65535
 	cmp	w20, w25
-	beq	.L1524
+	beq	.L1538
 	mov	w1, 0
 	mov	w0, w20
 	bl	ftl_erase_sblk
@@ -9251,11 +9341,11 @@ ftl_open_sblk_init:
 	strh	w0, [x19, 6]
 	strh	wzr, [x19, 10]
 	strb	w23, [x19, 4]
-	beq	.L1527
+	beq	.L1541
 	ldrb	w0, [x21]
 	mul	w0, w1, w0
 	and	w0, w0, 65535
-.L1525:
+.L1539:
 	ldrb	w2, [x21]
 	adrp	x26, .LANCHOR9
 	strh	w0, [x19, 12]
@@ -9271,7 +9361,7 @@ ftl_open_sblk_init:
 	ldrh	w1, [x19, 6]
 	strh	w1, [x0, x25]
 	ldrb	w0, [x19, 9]
-	cbnz	w0, .L1522
+	cbnz	w0, .L1536
 	mov	w1, w20
 	mov	x0, x22
 	bl	printf
@@ -9280,11 +9370,11 @@ ftl_open_sblk_init:
 	strh	w1, [x0, x25]
 	mov	w0, 7
 	strb	w0, [x19, 4]
-	b	.L1523
-.L1527:
+	b	.L1537
+.L1541:
 	mov	w0, 0
-	b	.L1525
-.L1522:
+	b	.L1539
+.L1536:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9308,14 +9398,14 @@ pm_free_sblk:
 	cmp	w1, 128
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	bls	.L1531
+	bls	.L1545
 	adrp	x1, .LANCHOR156
 	adrp	x0, .LC0
 	mov	w2, 94
 	add	x1, x1, :lo12:.LANCHOR156
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1531:
+.L1545:
 	adrp	x5, .LANCHOR110
 	mov	x26, x5
 	ldrh	w3, [x19, #:lo12:.LANCHOR155]
@@ -9325,23 +9415,23 @@ pm_free_sblk:
 	mov	w4, 65535
 	add	x0, x0, 416
 	ldrh	w2, [x0, 272]
-.L1534:
+.L1548:
 	ldrh	w6, [x0]
 	cmp	w6, w4
-	beq	.L1532
+	beq	.L1546
 	add	w1, w1, 1
 	and	w1, w1, 65535
-.L1532:
+.L1546:
 	cmp	w1, w2
-	bcs	.L1533
+	bcs	.L1547
 	cmp	w1, w3
-	bcs	.L1533
+	bcs	.L1547
 	add	w19, w19, 1
 	add	x0, x0, 2
 	and	w19, w19, 65535
 	cmp	w19, 128
-	bne	.L1534
-.L1533:
+	bne	.L1548
+.L1547:
 	add	w19, w19, 1
 	mov	w0, 128
 	and	w19, w19, 65535
@@ -9369,9 +9459,9 @@ pm_free_sblk:
 	add	x1, x6, x1, lsl 2
 	lsl	w2, w2, w0
 	sub	w2, w2, #1
-.L1536:
+.L1550:
 	cmp	x1, x4
-	bne	.L1539
+	bne	.L1553
 	adrp	x24, .LANCHOR80
 	adrp	x25, .LANCHOR95
 	adrp	x27, .LC95
@@ -9386,7 +9476,7 @@ pm_free_sblk:
 	str	wzr, [x29, 124]
 	mul	w21, w21, w0
 	and	w21, w21, 65535
-.L1545:
+.L1559:
 	ldr	x0, [x26, #:lo12:.LANCHOR110]
 	and	w6, w20, 65535
 	ldrb	w2, [x23]
@@ -9396,27 +9486,27 @@ pm_free_sblk:
 	ldrh	w1, [x0, 692]
 	sdiv	w1, w1, w2
 	cmp	w1, w3
-	bne	.L1540
+	bne	.L1554
 	ldrb	w1, [x24, #:lo12:.LANCHOR80]
 	ldrh	w2, [x25, #:lo12:.LANCHOR95]
 	mul	w1, w1, w2
 	strh	w1, [x22, x20, lsl 1]
-.L1540:
+.L1554:
 	ldrh	w2, [x22, x20, lsl 1]
 	cmp	w2, w21
-	bcs	.L1541
+	bcs	.L1555
 	cmp	w2, 0
 	ldr	w1, [x29, 124]
 	csel	w21, w21, w2, eq
 	csel	w1, w1, w6, eq
 	str	w1, [x29, 124]
-.L1541:
+.L1555:
 	ldrh	w1, [x0, 74]
 	cmp	w1, 2
-	bls	.L1542
+	bls	.L1556
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L1542
+	beq	.L1556
 	adrp	x4, .LANCHOR7
 	ubfiz	x1, x3, 2, 16
 	ldrh	w0, [x0, 92]
@@ -9425,7 +9515,7 @@ pm_free_sblk:
 	ldrh	w4, [x4, x1]
 	and	w4, w4, 2047
 	cmp	w4, w0
-	bgt	.L1542
+	bgt	.L1556
 	mov	w1, w8
 	str	w6, [x29, 104]
 	str	w8, [x29, 112]
@@ -9434,18 +9524,18 @@ pm_free_sblk:
 	ldr	w6, [x29, 104]
 	ldr	w8, [x29, 112]
 	mov	w7, w6
-.L1542:
+.L1556:
 	ldrh	w0, [x22, x20, lsl 1]
-	cbnz	w0, .L1543
+	cbnz	w0, .L1557
 	ldr	x0, [x26, #:lo12:.LANCHOR110]
 	sxtw	x6, w8
 	add	x1, x6, 208
 	ldrh	w3, [x0, x1, lsl 1]
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L1543
+	beq	.L1557
 	ldr	w1, [x28]
-	tbz	x1, 12, .L1544
+	tbz	x1, 12, .L1558
 	ldrh	w4, [x0, 688]
 	mov	w2, 0
 	str	x6, [x29, 104]
@@ -9456,7 +9546,7 @@ pm_free_sblk:
 	bl	printf
 	ldr	w7, [x29, 112]
 	ldr	x6, [x29, 104]
-.L1544:
+.L1558:
 	ldr	x0, [x26, #:lo12:.LANCHOR110]
 	add	x6, x6, 208
 	str	w7, [x29, 104]
@@ -9471,10 +9561,10 @@ pm_free_sblk:
 	ldrh	w1, [x0, 688]
 	sub	w1, w1, #1
 	strh	w1, [x0, 688]
-.L1543:
+.L1557:
 	add	x20, x20, 1
 	cmp	w19, w20, uxth
-	bhi	.L1545
+	bhi	.L1559
 	mov	w0, 65535
 	cmp	w7, w0
 	ldr	w0, [x29, 124]
@@ -9486,7 +9576,7 @@ pm_free_sblk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 384
 	ret
-.L1539:
+.L1553:
 	ldr	w0, [x4]
 	add	x7, x6, 416
 	mov	x3, 0
@@ -9494,20 +9584,20 @@ pm_free_sblk:
 	and	w0, w0, w2
 	udiv	w0, w0, w11
 	and	w0, w0, 65535
-.L1538:
+.L1552:
 	ldrh	w8, [x7]
 	cmp	w8, w0
-	bne	.L1537
+	bne	.L1551
 	ldrh	w8, [x22, x3, lsl 1]
 	add	w8, w8, 1
 	strh	w8, [x22, x3, lsl 1]
-.L1537:
+.L1551:
 	add	x3, x3, 1
 	add	x7, x7, 2
 	cmp	w19, w3, uxth
-	bhi	.L1538
+	bhi	.L1552
 	add	x4, x4, 4
-	b	.L1536
+	b	.L1550
 	.size	pm_free_sblk, .-pm_free_sblk
 	.section	.text.ftl_memcpy,"ax",@progbits
 	.align	2
@@ -9527,14 +9617,14 @@ flash_info_data_init:
 	add	x29, sp, 0
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	str	x19, [sp, 16]
-	tbz	x0, 12, .L1558
+	tbz	x0, 12, .L1572
 	adrp	x2, .LANCHOR157
 	adrp	x0, .LC97
 	add	x2, x2, :lo12:.LANCHOR157
 	mov	w1, 119
 	add	x0, x0, :lo12:.LC97
 	bl	printf
-.L1558:
+.L1572:
 	adrp	x19, .LANCHOR27
 	mov	w2, 2048
 	mov	w1, 0
@@ -9568,15 +9658,15 @@ flash_info_data_init:
 	.type	ftl_memcpy32, %function
 ftl_memcpy32:
 	mov	x3, 0
-.L1564:
+.L1578:
 	cmp	w2, w3
-	bhi	.L1565
+	bhi	.L1579
 	ret
-.L1565:
+.L1579:
 	ldr	w4, [x1, x3, lsl 2]
 	str	w4, [x0, x3, lsl 2]
 	add	x3, x3, 1
-	b	.L1564
+	b	.L1578
 	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.ftl_memcmp,"ax",@progbits
 	.align	2
@@ -9617,14 +9707,14 @@ nandc_init:
 	mov	x19, x0
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
 	str	wzr, [x29, 56]
-	tbz	x0, 12, .L1570
+	tbz	x0, 12, .L1584
 	adrp	x1, .LANCHOR158
 	adrp	x0, .LC98
 	mov	x2, x19
 	add	x1, x1, :lo12:.LANCHOR158
 	add	x0, x0, :lo12:.LC98
 	bl	printf
-.L1570:
+.L1584:
 	adrp	x20, .LANCHOR28
 	mov	w0, 6
 	ldr	w2, [x19, 352]
@@ -9635,22 +9725,22 @@ nandc_init:
 	mov	x22, x0
 	str	x19, [x0, #:lo12:.LANCHOR13]
 	cmp	w2, w1
-	bne	.L1571
+	bne	.L1585
 	mov	w0, 8
 	strb	w0, [x20, #:lo12:.LANCHOR28]
-.L1571:
+.L1585:
 	ldr	w1, [x19, 128]
 	mov	w0, 12336
 	movk	w0, 0x5639, lsl 16
 	cmp	w1, w0
-	bne	.L1572
+	bne	.L1586
 	mov	w0, 9
 	strb	w0, [x20, #:lo12:.LANCHOR28]
-.L1572:
+.L1586:
 	ldrb	w0, [x20, #:lo12:.LANCHOR28]
 	cmp	w0, 9
 	adrp	x0, .LANCHOR51
-	bne	.L1573
+	bne	.L1587
 	mov	w1, 1
 	strb	w1, [x0, #:lo12:.LANCHOR51]
 	ldr	w0, [x29, 56]
@@ -9675,17 +9765,17 @@ nandc_init:
 	mov	w0, 39
 	str	w0, [x19, 84]
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1575
+	tbz	x0, 12, .L1589
 	ldr	w1, [x19]
 	ldr	w2, [x19, 8]
 	ldr	w3, [x19, 80]
 	ldr	w4, [x19, 84]
 	ldr	w5, [x19, 88]
-.L1588:
+.L1602:
 	adrp	x0, .LC99
 	add	x0, x0, :lo12:.LC99
 	bl	printf
-.L1575:
+.L1589:
 	adrp	x0, .LANCHOR52
 	mov	w1, 1
 	strb	w1, [x0, #:lo12:.LANCHOR52]
@@ -9694,17 +9784,17 @@ nandc_init:
 	adrp	x0, .LANCHOR50
 	strb	wzr, [x0, #:lo12:.LANCHOR50]
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1569
+	tbz	x0, 12, .L1583
 	ldrb	w1, [x20, #:lo12:.LANCHOR28]
 	adrp	x0, .LC100
 	add	x0, x0, :lo12:.LC100
 	bl	printf
-.L1569:
+.L1583:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1573:
+.L1587:
 	strb	wzr, [x0, #:lo12:.LANCHOR51]
 	mov	w1, 1
 	ldr	w0, [x29, 56]
@@ -9732,14 +9822,14 @@ nandc_init:
 	adrp	x1, .LANCHOR53
 	str	x0, [x1, #:lo12:.LANCHOR53]
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1575
+	tbz	x0, 12, .L1589
 	ldr	x0, [x22, #:lo12:.LANCHOR13]
 	ldr	w1, [x0]
 	ldr	w2, [x0, 344]
 	ldr	w3, [x0, 304]
 	ldr	w4, [x0, 308]
 	ldr	w5, [x0, 312]
-	b	.L1588
+	b	.L1602
 	.size	nandc_init, .-nandc_init
 	.section	.text.zbuf_init,"ax",@progbits
 	.align	2
@@ -9756,7 +9846,7 @@ zbuf_init:
 	adrp	x22, .LANCHOR131
 	add	x22, x22, :lo12:.LANCHOR131
 	mov	w21, 0
-.L1590:
+.L1604:
 	and	w0, w21, 255
 	strb	w0, [x19, 1]
 	add	w1, w0, 1
@@ -9773,7 +9863,7 @@ zbuf_init:
 	bl	ftl_malloc
 	str	x0, [x19, -40]
 	cmp	w21, 16
-	bne	.L1590
+	bne	.L1604
 	add	x0, x20, :lo12:.LANCHOR56
 	mov	w1, -1
 	strb	w1, [x0, 960]
@@ -9889,13 +9979,6 @@ gc_init:
 ftl_free:
 	ret
 	.size	ftl_free, .-ftl_free
-	.section	.text.ftl_malloc_init,"ax",@progbits
-	.align	2
-	.global	ftl_malloc_init
-	.type	ftl_malloc_init, %function
-ftl_malloc_init:
-	ret
-	.size	ftl_malloc_init, .-ftl_malloc_init
 	.section	.text.js_hash,"ax",@progbits
 	.align	2
 	.global	js_hash
@@ -9905,18 +9988,18 @@ js_hash:
 	mov	w0, 42982
 	mov	x3, 0
 	movk	w0, 0x47c6, lsl 16
-.L1598:
+.L1611:
 	cmp	w1, w3
-	bhi	.L1599
+	bhi	.L1612
 	ret
-.L1599:
+.L1612:
 	lsr	w2, w0, 2
 	ldrb	w5, [x4, x3]
 	add	w2, w2, w0, lsl 5
 	add	x3, x3, 1
 	add	w2, w2, w5
 	eor	w0, w0, w2
-	b	.L1598
+	b	.L1611
 	.size	js_hash, .-js_hash
 	.section	.text.ftl_debug_info_fill,"ax",@progbits
 	.align	2
@@ -9926,11 +10009,11 @@ ftl_debug_info_fill:
 	adrp	x3, .LANCHOR131
 	ldrb	w3, [x3, #:lo12:.LANCHOR131]
 	cmp	w3, 8
-	bls	.L1604
+	bls	.L1617
 	and	w0, w0, 255
 	cmp	x2, 0
 	ccmp	w0, 2, 0, ne
-	bne	.L1602
+	bne	.L1615
 	stp	x29, x30, [sp, -16]!
 	mov	x6, x1
 	mov	w1, 21320
@@ -9944,9 +10027,9 @@ ftl_debug_info_fill:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1602:
+.L1615:
 	stp	wzr, wzr, [x1]
-.L1604:
+.L1617:
 	mov	w0, 0
 	ret
 	.size	ftl_debug_info_fill, .-ftl_debug_info_fill
@@ -10013,9 +10096,9 @@ rknand_print_hex:
 	mov	x19, 0
 	mov	w20, 0
 	adrp	x28, .LC103
-.L1613:
+.L1626:
 	cmp	x26, x19
-	bne	.L1619
+	bne	.L1632
 	ldp	x19, x20, [sp, 16]
 	adrp	x1, .LC103
 	ldp	x21, x22, [sp, 32]
@@ -10027,40 +10110,40 @@ rknand_print_hex:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	printf
-.L1619:
-	cbnz	w20, .L1614
+.L1632:
+	cbnz	w20, .L1627
 	mov	w3, w23
 	mov	x2, x22
 	mov	x1, x27
 	mov	x0, x25
 	bl	printf
-.L1614:
+.L1627:
 	cmp	w24, 4
-	bne	.L1615
+	bne	.L1628
 	ldr	w1, [x22, x19, lsl 2]
-.L1621:
+.L1634:
 	mov	x0, x21
 	add	w20, w20, 1
 	bl	printf
 	cmp	w20, 15
-	bls	.L1618
+	bls	.L1631
 	mov	w20, 0
 	add	x1, x28, :lo12:.LC103
 	adrp	x0, .LC104
 	add	x0, x0, :lo12:.LC104
 	bl	printf
-.L1618:
+.L1631:
 	add	x19, x19, 1
 	add	w23, w23, w24
-	b	.L1613
-.L1615:
+	b	.L1626
+.L1628:
 	cmp	w24, 2
-	bne	.L1617
+	bne	.L1630
 	ldrsh	w1, [x22, x19, lsl 1]
-	b	.L1621
-.L1617:
+	b	.L1634
+.L1630:
 	ldrb	w1, [x22, x19]
-	b	.L1621
+	b	.L1634
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.hynix_get_read_retry_default,"ax",@progbits
 	.align	2
@@ -10089,41 +10172,41 @@ hynix_get_read_retry_default:
 	strb	w2, [x8, 129]
 	strb	w1, [x8, 130]
 	strb	w0, [x8, 131]
-	bne	.L1623
+	bne	.L1636
 	mov	w0, -89
 	strb	w0, [x13, 16]
 	adrp	x0, .LANCHOR165+17
 	mov	w1, -9
 	strb	w1, [x0, #:lo12:.LANCHOR165+17]
-.L1687:
+.L1700:
 	mov	w24, 7
-	b	.L1730
-.L1623:
+	b	.L1743
+.L1636:
 	cmp	w10, 3
-	bne	.L1625
+	bne	.L1638
 	mov	x11, 0
-.L1626:
+.L1639:
 	sub	w0, w11, #80
 	strb	w0, [x6, x11]
 	add	x11, x11, 1
 	cmp	x11, 8
-	bne	.L1626
+	bne	.L1639
 	mov	w24, w11
-.L1624:
+.L1637:
 	sub	w0, w10, #1
 	cmp	w0, 1
-	bhi	.L1632
+	bhi	.L1645
 	adrp	x7, .LANCHOR18
 	adrp	x8, .LANCHOR30
 	add	x7, x7, :lo12:.LANCHOR18
 	add	x8, x8, :lo12:.LANCHOR30
 	mov	w5, 0
 	mov	w10, 55
-.L1633:
+.L1646:
 	ldrb	w0, [x7]
 	cmp	w0, w5
-	bhi	.L1639
-.L1640:
+	bhi	.L1652
+.L1653:
 	strb	w11, [x13, 1]
 	strb	w24, [x13, 2]
 	ldp	x19, x20, [sp, 16]
@@ -10133,9 +10216,9 @@ hynix_get_read_retry_default:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1625:
+.L1638:
 	cmp	w10, 4
-	bne	.L1627
+	bne	.L1640
 	mov	w3, -52
 	strb	w3, [x8, 128]
 	mov	w3, -65
@@ -10151,10 +10234,10 @@ hynix_get_read_retry_default:
 	strb	w3, [x8, 132]
 	strb	w1, [x8, 134]
 	strb	w0, [x8, 135]
-	b	.L1624
-.L1627:
+	b	.L1637
+.L1640:
 	cmp	w10, 5
-	bne	.L1628
+	bne	.L1641
 	mov	w0, 56
 	strb	w0, [x8, 128]
 	mov	w0, 57
@@ -10164,12 +10247,12 @@ hynix_get_read_retry_default:
 	strb	w0, [x8, 130]
 	mov	w0, 59
 	strb	w0, [x8, 131]
-.L1730:
+.L1743:
 	mov	w11, 4
-	b	.L1624
-.L1628:
+	b	.L1637
+.L1641:
 	cmp	w10, 6
-	bne	.L1629
+	bne	.L1642
 	mov	w0, 14
 	strb	w0, [x8, 128]
 	mov	w0, 15
@@ -10179,27 +10262,27 @@ hynix_get_read_retry_default:
 	strb	w0, [x8, 130]
 	mov	w0, 17
 	strb	w0, [x8, 131]
-	b	.L1730
-.L1629:
+	b	.L1743
+.L1642:
 	cmp	w10, 7
-	bne	.L1630
+	bne	.L1643
 	mov	x0, 0
-.L1631:
+.L1644:
 	sub	w1, w0, #80
 	strb	w1, [x6, x0]
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L1631
+	bne	.L1644
 	mov	w0, -44
 	mov	w24, 12
 	strb	w0, [x8, 136]
 	mov	w11, 10
 	mov	w0, -43
 	strb	w0, [x8, 137]
-	b	.L1624
-.L1630:
+	b	.L1637
+.L1643:
 	cmp	w10, 8
-	bne	.L1687
+	bne	.L1700
 	mov	w0, 6
 	strb	w0, [x8, 128]
 	mov	w0, 7
@@ -10211,8 +10294,8 @@ hynix_get_read_retry_default:
 	mov	w0, 10
 	mov	w11, 5
 	strb	w0, [x8, 132]
-	b	.L1624
-.L1639:
+	b	.L1637
+.L1652:
 	ldrb	w0, [x8, w5, sxtw]
 	mov	x1, 32
 	mov	w2, 160
@@ -10223,7 +10306,7 @@ hynix_get_read_retry_default:
 	ldr	x4, [x1, #:lo12:.LANCHOR13]
 	add	x2, x13, x2
 	add	x4, x4, x0
-.L1634:
+.L1647:
 	str	w10, [x4, 2056]
 	ldrb	w0, [x6, x3]
 	str	w0, [x4, 2052]
@@ -10233,15 +10316,15 @@ hynix_get_read_retry_default:
 	strb	w0, [x2, x3]
 	add	x3, x3, 1
 	cmp	w11, w3, uxtb
-	bhi	.L1634
+	bhi	.L1647
 	adrp	x3, .LANCHOR165
 	add	x3, x3, :lo12:.LANCHOR165
 	mov	x0, 0
-.L1637:
+.L1650:
 	add	x14, x2, x0
 	add	x12, x3, x0
 	mov	x1, 1
-.L1636:
+.L1649:
 	lsl	x4, x1, 2
 	lsl	x15, x1, 3
 	ldrb	w16, [x2, x0]
@@ -10250,10 +10333,10 @@ hynix_get_read_retry_default:
 	ldrb	w4, [x12, x4]
 	add	w4, w4, w16
 	strb	w4, [x14, x15]
-	bne	.L1636
+	bne	.L1649
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L1637
+	bne	.L1650
 	add	w5, w5, 1
 	strb	wzr, [x2, 16]
 	strb	wzr, [x2, 24]
@@ -10263,11 +10346,11 @@ hynix_get_read_retry_default:
 	strb	wzr, [x2, 48]
 	strb	wzr, [x2, 41]
 	strb	wzr, [x2, 49]
-	b	.L1633
-.L1632:
+	b	.L1646
+.L1645:
 	sub	w0, w10, #3
 	cmp	w0, 5
-	bhi	.L1640
+	bhi	.L1653
 	mul	w19, w24, w11
 	sub	w14, w11, #1
 	and	x14, x14, 255
@@ -10280,10 +10363,10 @@ hynix_get_read_retry_default:
 	lsl	w23, w15, 1
 	sbfiz	x22, x15, 1, 32
 	mov	w12, 0
-.L1641:
+.L1654:
 	ldrb	w0, [x20]
 	cmp	w0, w12
-	bls	.L1640
+	bls	.L1653
 	adrp	x0, .LANCHOR30
 	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w25, [x0, w12, sxtw]
@@ -10302,7 +10385,7 @@ hynix_get_read_retry_default:
 	str	w6, [x4, 2056]
 	bl	nandc_wait_flash_ready
 	cmp	w10, 8
-	bne	.L1642
+	bne	.L1655
 	mov	w0, 120
 	str	w0, [x4, 2056]
 	str	wzr, [x4, 2052]
@@ -10322,7 +10405,7 @@ hynix_get_read_retry_default:
 	str	wzr, [x4, 2052]
 	str	wzr, [x4, 2052]
 	str	w1, [x4, 2052]
-.L1733:
+.L1746:
 	str	w0, [x4, 2052]
 	mov	w0, 48
 	str	wzr, [x4, 2052]
@@ -10330,65 +10413,65 @@ hynix_get_read_retry_default:
 	bl	nandc_wait_flash_ready
 	cmp	w21, 1
 	ccmp	w10, 8, 4, hi
-	beq	.L1688
+	beq	.L1701
 	cmp	w10, 7
 	mov	w0, 32
 	mov	w1, 2
 	csel	w1, w1, w0, ne
-.L1649:
+.L1662:
 	adrp	x6, .LANCHOR166
 	mov	x2, 0
 	ldr	x0, [x6, #:lo12:.LANCHOR166]
-.L1650:
+.L1663:
 	ldr	w3, [x4, 2048]
 	strb	w3, [x0, x2]
 	add	x2, x2, 1
 	cmp	w1, w2, uxtb
-	bhi	.L1650
+	bhi	.L1663
 	cmp	w10, 8
-	bne	.L1651
+	bne	.L1664
 	mov	w1, 0
-.L1653:
+.L1666:
 	ldrb	w2, [x0]
 	cmp	w2, 50
-	beq	.L1652
+	beq	.L1665
 	ldrb	w2, [x0, 1]
 	cmp	w2, 5
-	beq	.L1652
+	beq	.L1665
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 255
 	cmp	w1, 8
-	bne	.L1653
-.L1654:
+	bne	.L1666
+.L1667:
 	adrp	x0, .LC105
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC105
 	bl	printf
-.L1656:
-	b	.L1656
-.L1642:
+.L1669:
+	b	.L1669
+.L1655:
 	mov	w0, 54
 	str	w0, [x4, 2056]
 	cmp	w10, 4
-	bne	.L1644
+	bne	.L1657
 	mov	w0, 64
 	str	w6, [x4, 2052]
 	str	w0, [x4, 2048]
 	mov	w0, 204
-.L1731:
+.L1744:
 	str	w0, [x4, 2052]
 	mov	w0, 77
-	b	.L1732
-.L1644:
+	b	.L1745
+.L1657:
 	cmp	w21, 1
-	bhi	.L1646
+	bhi	.L1659
 	ldrb	w0, [x8, 128]
 	str	w0, [x4, 2052]
 	mov	w0, 82
-.L1732:
+.L1745:
 	str	w0, [x4, 2048]
-.L1645:
+.L1658:
 	mov	w0, 22
 	str	w0, [x4, 2056]
 	mov	w0, 23
@@ -10401,91 +10484,91 @@ hynix_get_read_retry_default:
 	cmp	w10, 6
 	str	wzr, [x4, 2052]
 	str	wzr, [x4, 2052]
-	bne	.L1647
+	bne	.L1660
 	mov	w0, 31
 	str	w0, [x4, 2052]
-.L1648:
+.L1661:
 	mov	w0, 2
-	b	.L1733
-.L1646:
+	b	.L1746
+.L1659:
 	cmp	w10, 7
-	bne	.L1645
+	bne	.L1658
 	mov	w0, 174
 	str	w0, [x4, 2052]
 	str	wzr, [x4, 2048]
 	mov	w0, 176
-	b	.L1731
-.L1647:
+	b	.L1744
+.L1660:
 	str	wzr, [x4, 2052]
-	b	.L1648
-.L1688:
+	b	.L1661
+.L1701:
 	mov	w1, 16
-	b	.L1649
-.L1652:
+	b	.L1662
+.L1665:
 	cmp	w1, 6
-	bhi	.L1654
-.L1655:
+	bhi	.L1667
+.L1668:
 	ldr	x3, [x6, #:lo12:.LANCHOR166]
 	mov	x0, 0
-.L1665:
+.L1678:
 	cmp	w19, w0
-	bgt	.L1666
+	bgt	.L1679
 	ldr	x1, [x6, #:lo12:.LANCHOR166]
 	mov	w6, 8
 	add	x2, x1, x22
-.L1668:
+.L1681:
 	mov	x0, 0
-.L1667:
+.L1680:
 	ldrh	w7, [x2, x0, lsl 1]
 	mvn	w7, w7
 	strh	w7, [x2, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	w15, w0
-	bgt	.L1667
+	bgt	.L1680
 	add	x2, x2, x23, uxtw 1
 	subs	w6, w6, #1
-	bne	.L1668
+	bne	.L1681
 	mov	x6, x1
 	mov	w7, 0
 	mov	w26, 1
-.L1669:
+.L1682:
 	mov	w0, 0
 	mov	w2, 0
-.L1673:
+.L1686:
 	mov	x25, x6
 	lsl	w30, w26, w2
 	mov	w17, 16
 	mov	w16, 0
-.L1671:
+.L1684:
 	ldrh	w27, [x25]
 	add	x25, x25, x22
 	bics	wzr, w30, w27
 	cinc	w16, w16, eq
 	subs	w17, w17, #1
-	bne	.L1671
+	bne	.L1684
 	cmp	w16, 8
-	bls	.L1672
+	bls	.L1685
 	orr	w0, w0, w30
 	and	w0, w0, 65535
-.L1672:
+.L1685:
 	add	w2, w2, 1
 	cmp	w2, 16
-	bne	.L1673
+	bne	.L1686
 	strh	w0, [x6], 2
 	add	w7, w7, 1
 	cmp	w15, w7
-	bgt	.L1669
+	bgt	.L1682
 	mov	x0, 0
 	mov	w2, 0
-.L1676:
+.L1689:
 	ldr	w6, [x1, x0]
 	add	x0, x0, 4
 	cmp	w6, 0
 	cinc	w2, w2, eq
 	cmp	x0, 32
-	bne	.L1676
+	bne	.L1689
 	cmp	w2, 7
-	ble	.L1677
+	ble	.L1690
 	mov	w3, 1024
 	mov	w2, 1
 	adrp	x0, .LC106
@@ -10495,91 +10578,91 @@ hynix_get_read_retry_default:
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC105
 	bl	printf
-.L1678:
-	b	.L1678
-.L1651:
+.L1691:
+	b	.L1691
+.L1664:
 	cmp	w10, 7
-	bne	.L1657
+	bne	.L1670
 	mov	w1, 0
-.L1659:
+.L1672:
 	ldrb	w2, [x0]
 	cmp	w2, 12
-	beq	.L1658
+	beq	.L1671
 	ldrb	w2, [x0, 1]
 	cmp	w2, 10
-	beq	.L1658
+	beq	.L1671
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 255
 	cmp	w1, 8
-	bne	.L1659
-.L1660:
+	bne	.L1672
+.L1673:
 	adrp	x0, .LC105
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC105
 	bl	printf
-.L1661:
-	b	.L1661
-.L1658:
+.L1674:
+	b	.L1674
+.L1671:
 	cmp	w1, 6
-	bls	.L1655
-	b	.L1660
-.L1657:
+	bls	.L1668
+	b	.L1673
+.L1670:
 	cmp	w10, 6
-	bne	.L1655
+	bne	.L1668
 	mov	x1, 0
-.L1662:
+.L1675:
 	ldrb	w2, [x0, x1]
 	cmp	w2, 12
-	beq	.L1655
+	beq	.L1668
 	add	x2, x0, x1
 	ldrb	w2, [x2, 8]
 	cmp	w2, 4
-	beq	.L1655
+	beq	.L1668
 	add	x1, x1, 1
 	cmp	x1, 8
-	bne	.L1662
+	bne	.L1675
 	adrp	x0, .LC105
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC105
 	bl	printf
-.L1664:
-	b	.L1664
-.L1666:
+.L1677:
+	b	.L1677
+.L1679:
 	ldr	w1, [x4, 2048]
 	strb	w1, [x3, x0]
 	add	x0, x0, 1
-	b	.L1665
-.L1677:
+	b	.L1678
+.L1690:
 	cmp	w10, 6
-	beq	.L1690
+	beq	.L1703
 	cmp	w10, 7
-	beq	.L1691
+	beq	.L1704
 	cmp	w10, 8
 	mov	x1, 5
 	mov	x0, 8
 	csel	x0, x0, x1, ne
-.L1679:
+.L1692:
 	mov	x1, x5
 	mov	w5, 0
-.L1680:
+.L1693:
 	mov	x2, 0
-.L1681:
+.L1694:
 	ldrb	w6, [x3, x2]
 	strb	w6, [x1, x2]
 	add	x2, x2, 1
 	cmp	w11, w2, uxtb
-	bhi	.L1681
+	bhi	.L1694
 	add	w5, w5, 1
 	add	x3, x3, x14
 	add	x1, x1, x0
 	cmp	w24, w5
-	bgt	.L1680
+	bgt	.L1693
 	mov	w5, 255
 	str	w5, [x4, 2056]
 	bl	nandc_wait_flash_ready
 	cmp	w21, 1
-	bhi	.L1683
+	bhi	.L1696
 	mov	w0, 54
 	str	w0, [x4, 2056]
 	ldrb	w0, [x8, 128]
@@ -10594,26 +10677,26 @@ hynix_get_read_retry_default:
 	str	w5, [x4, 2052]
 	str	w5, [x4, 2052]
 	str	w5, [x4, 2052]
-.L1734:
+.L1747:
 	str	w0, [x4, 2056]
 	bl	nandc_wait_flash_ready
 	add	w12, w12, 1
 	and	w12, w12, 255
-	b	.L1641
-.L1690:
+	b	.L1654
+.L1703:
 	mov	x0, 4
-	b	.L1679
-.L1691:
+	b	.L1692
+.L1704:
 	mov	x0, 10
-	b	.L1679
-.L1683:
+	b	.L1692
+.L1696:
 	cmp	w10, 8
-	bne	.L1685
+	bne	.L1698
 	mov	w0, 190
-	b	.L1734
-.L1685:
+	b	.L1747
+.L1698:
 	mov	w0, 56
-	b	.L1734
+	b	.L1747
 	.size	hynix_get_read_retry_default, .-hynix_get_read_retry_default
 	.section	.text.flash_get_read_retry_tbl,"ax",@progbits
 	.align	2
@@ -10625,9 +10708,9 @@ flash_get_read_retry_tbl:
 	sub	w1, w0, #1
 	and	w1, w1, 255
 	cmp	w1, 7
-	bhi	.L1735
+	bhi	.L1748
 	b	hynix_get_read_retry_default
-.L1735:
+.L1748:
 	ret
 	.size	flash_get_read_retry_tbl, .-flash_get_read_retry_tbl
 	.section	.text.nandc_xfer_done,"ax",@progbits
@@ -10646,27 +10729,27 @@ nandc_xfer_done:
 	strb	wzr, [x0, #:lo12:.LANCHOR167]
 	cmp	w1, 9
 	str	x23, [sp, 48]
-	bne	.L1738
+	bne	.L1751
 	ldr	x20, [x19, #:lo12:.LANCHOR13]
 	mov	x21, x0
 	ldr	w0, [x20, 16]
 	str	w0, [x29, 64]
 	ldr	w0, [x20, 48]
-	tbnz	x0, 1, .L1739
+	tbnz	x0, 1, .L1752
 	adrp	x22, .LC109
 	adrp	x23, .LC110
 	add	x22, x22, :lo12:.LC109
 	add	x23, x23, :lo12:.LC110
 	mov	w21, 0
-.L1740:
+.L1753:
 	ldr	w0, [x29, 64]
-	tbnz	x0, 20, .L1742
+	tbnz	x0, 20, .L1755
 	ldr	x0, [x19, #:lo12:.LANCHOR13]
 	add	w21, w21, 1
 	tst	x21, 16777215
 	ldr	w0, [x0, 16]
 	str	w0, [x29, 64]
-	bne	.L1740
+	bne	.L1753
 	ldr	w2, [x29, 64]
 	mov	w1, w21
 	ldr	w3, [x20, 64]
@@ -10678,13 +10761,13 @@ nandc_xfer_done:
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1740
-.L1741:
+	b	.L1753
+.L1754:
 	ldr	w0, [x29, 64]
 	add	w1, w1, 1
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0, lsl 12
-	bne	.L1743
+	bne	.L1756
 	ldr	w2, [x20, 64]
 	adrp	x0, .LC108
 	ldr	w3, [x29, 64]
@@ -10695,7 +10778,7 @@ nandc_xfer_done:
 	ldr	w0, [x29, 72]
 	mov	w0, 1
 	strb	w0, [x21, #:lo12:.LANCHOR167]
-.L1742:
+.L1755:
 	adrp	x0, .LANCHOR53+32
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -10703,48 +10786,48 @@ nandc_xfer_done:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1739:
+.L1752:
 	mov	w1, 0
-.L1743:
+.L1756:
 	ldr	w2, [x20, 64]
 	ldr	w0, [x29, 64]
 	ubfx	x2, x2, 16, 6
 	ubfx	x0, x0, 22, 6
 	cmp	w2, w0
-	bge	.L1742
+	bge	.L1755
 	ldr	w0, [x20]
 	str	w0, [x29, 72]
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1741
+	tbz	x0, 13, .L1754
 	ldr	w0, [x29, 72]
-	tbz	x0, 17, .L1741
+	tbz	x0, 17, .L1754
 	ldr	w1, [x29, 72]
 	adrp	x0, .LC107
 	add	x0, x0, :lo12:.LC107
 	ubfx	x1, x1, 17, 1
-.L1772:
+.L1785:
 	bl	printf
-	b	.L1742
-.L1738:
+	b	.L1755
+.L1751:
 	ldr	x20, [x19, #:lo12:.LANCHOR13]
 	mov	w21, 0
 	ldr	w0, [x20, 8]
 	str	w0, [x29, 64]
 	ldr	w0, [x20, 16]
-	tbnz	x0, 1, .L1748
+	tbnz	x0, 1, .L1761
 	adrp	x22, .LC109
 	adrp	x23, .LC110
 	add	x22, x22, :lo12:.LC109
 	add	x23, x23, :lo12:.LC110
-.L1749:
+.L1762:
 	ldr	w0, [x29, 64]
-	tbnz	x0, 20, .L1742
+	tbnz	x0, 20, .L1755
 	ldr	x0, [x19, #:lo12:.LANCHOR13]
 	add	w21, w21, 1
 	tst	x21, 16777215
 	ldr	w0, [x0, 8]
 	str	w0, [x29, 64]
-	bne	.L1749
+	bne	.L1762
 	ldr	w2, [x29, 64]
 	mov	w1, w21
 	ldr	w3, [x20, 28]
@@ -10756,34 +10839,34 @@ nandc_xfer_done:
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1749
-.L1748:
+	b	.L1762
+.L1761:
 	adrp	x22, .LC108
 	adrp	x23, .LC110
 	add	x22, x22, :lo12:.LC108
 	add	x23, x23, :lo12:.LC110
-.L1750:
+.L1763:
 	ldr	w1, [x20, 28]
 	ldr	w0, [x29, 64]
 	ubfx	x1, x1, 16, 5
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0
-	bge	.L1742
+	bge	.L1755
 	ldr	x0, [x19, #:lo12:.LANCHOR13]
 	ldr	w0, [x0]
 	str	w0, [x29, 72]
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1751
+	tbz	x0, 13, .L1764
 	ldr	w0, [x29, 72]
-	tbz	x0, 17, .L1751
+	tbz	x0, 17, .L1764
 	adrp	x0, .LC111
 	ldr	w1, [x29, 72]
 	add	x0, x0, :lo12:.LC111
-	b	.L1772
-.L1751:
+	b	.L1785
+.L1764:
 	add	w21, w21, 1
 	tst	x21, 16777215
-	bne	.L1750
+	bne	.L1763
 	ldr	w2, [x20, 28]
 	mov	w1, w21
 	ldr	w3, [x29, 64]
@@ -10796,7 +10879,7 @@ nandc_xfer_done:
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1750
+	b	.L1763
 	.size	nandc_xfer_done, .-nandc_xfer_done
 	.section	.text.nandc_xfer,"ax",@progbits
 	.align	2
@@ -10818,20 +10901,20 @@ nandc_xfer:
 	bl	nandc_xfer_start
 	mov	w0, w22
 	bl	nandc_xfer_done
-	cbnz	w22, .L1792
+	cbnz	w22, .L1805
 	adrp	x0, .LANCHOR28
 	ldrb	w0, [x0, #:lo12:.LANCHOR28]
 	cmp	w0, 9
-	bne	.L1775
+	bne	.L1788
 	adrp	x22, .LANCHOR13
 	lsr	w19, w19, 2
 	mov	w3, 1
 	mov	w2, 0
 	ldr	x5, [x22, #:lo12:.LANCHOR13]
 	mov	w0, 0
-.L1776:
+.L1789:
 	cmp	w2, w19
-	bcc	.L1780
+	bcc	.L1793
 	ldr	w19, [x5]
 	cmp	w3, 0
 	mov	w1, 512
@@ -10840,7 +10923,7 @@ nandc_xfer:
 	movk	w1, 0x2, lsl 16
 	and	w1, w19, w1
 	cmp	w1, 139264
-	bne	.L1782
+	bne	.L1795
 	mov	w1, w19
 	adrp	x0, .LC112
 	add	x0, x0, :lo12:.LC112
@@ -10849,11 +10932,11 @@ nandc_xfer:
 	orr	w19, w19, 131072
 	str	w19, [x0]
 	mov	w0, -1
-.L1782:
-	tbz	x19, 13, .L1783
+.L1795:
+	tbz	x19, 13, .L1796
 	adrp	x1, .LANCHOR167
 	ldrb	w1, [x1, #:lo12:.LANCHOR167]
-	cbz	w1, .L1783
+	cbz	w1, .L1796
 	mov	w1, w19
 	adrp	x0, .LC113
 	add	x0, x0, :lo12:.LC113
@@ -10861,14 +10944,14 @@ nandc_xfer:
 	ldr	x0, [x22, #:lo12:.LANCHOR13]
 	mov	w1, 1
 	str	w1, [x0, 16]
-.L1811:
+.L1824:
 	mov	w0, -1
-.L1774:
+.L1787:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1780:
+.L1793:
 	uxtw	x1, w2
 	add	x1, x1, 84
 	ldr	w1, [x5, x1, lsl 2]
@@ -10879,30 +10962,30 @@ nandc_xfer:
 	and	w1, w4, w1, lsr 10
 	and	w3, w3, w1
 	ldr	w1, [x29, 56]
-	tbnz	x1, 2, .L1794
+	tbnz	x1, 2, .L1807
 	ldr	w1, [x29, 56]
-	tbnz	x1, 18, .L1794
+	tbnz	x1, 18, .L1807
 	ldr	w4, [x29, 56]
 	ldr	w1, [x29, 56]
 	ubfx	x4, x4, 3, 7
 	ubfx	x1, x1, 19, 7
 	cmp	w4, w1
 	ldr	w1, [x29, 56]
-	ble	.L1778
+	ble	.L1791
 	ubfx	x1, x1, 3, 7
-.L1779:
+.L1792:
 	cmp	w0, w1
 	csel	w0, w0, w1, cs
-.L1777:
+.L1790:
 	add	w2, w2, 1
-	b	.L1776
-.L1778:
+	b	.L1789
+.L1791:
 	ubfx	x1, x1, 19, 7
-	b	.L1779
-.L1794:
+	b	.L1792
+.L1807:
 	mov	w0, -1
-	b	.L1777
-.L1775:
+	b	.L1790
+.L1788:
 	adrp	x0, .LANCHOR50
 	lsr	w4, w19, 1
 	mov	w3, 64
@@ -10914,25 +10997,25 @@ nandc_xfer:
 	mov	w0, 128
 	csel	w3, w3, w0, cc
 	mov	w0, 0
-.L1785:
+.L1798:
 	add	w5, w3, w0
 	cmp	w2, w4
-	bcc	.L1786
+	bcc	.L1799
 	adrp	x22, .LANCHOR13
 	lsr	w19, w19, 2
 	mov	w3, 0
 	mov	w0, 0
 	ldr	x4, [x22, #:lo12:.LANCHOR13]
-.L1787:
+.L1800:
 	cmp	w3, w19
-	bcc	.L1791
+	bcc	.L1804
 	str	wzr, [x4, 16]
 	mov	w1, 8192
 	movk	w1, 0x2, lsl 16
 	ldr	w19, [x4]
 	and	w1, w19, w1
 	cmp	w1, 139264
-	bne	.L1783
+	bne	.L1796
 	mov	w1, w19
 	adrp	x0, .LC114
 	add	x0, x0, :lo12:.LC114
@@ -10940,8 +11023,8 @@ nandc_xfer:
 	ldr	x0, [x22, #:lo12:.LANCHOR13]
 	orr	w19, w19, 131072
 	str	w19, [x0]
-	b	.L1811
-.L1786:
+	b	.L1824
+.L1799:
 	ldr	x7, [x6, #:lo12:.LANCHOR53]
 	and	x0, x0, 4294967292
 	ldr	w0, [x7, x0]
@@ -10958,16 +11041,16 @@ nandc_xfer:
 	add	w1, w1, 4
 	strb	w0, [x21, x7]
 	mov	w0, w5
-	b	.L1785
-.L1791:
+	b	.L1798
+.L1804:
 	uxtw	x1, w3
 	add	x1, x1, 8
 	ldr	w1, [x4, x1, lsl 2]
 	str	w1, [x29, 56]
 	ldr	w1, [x29, 56]
-	tbnz	x1, 2, .L1797
+	tbnz	x1, 2, .L1810
 	ldr	w1, [x29, 56]
-	tbnz	x1, 15, .L1797
+	tbnz	x1, 15, .L1810
 	ldr	w2, [x29, 56]
 	ubfx	x6, x2, 3, 5
 	ldr	w2, [x29, 56]
@@ -10980,42 +11063,42 @@ nandc_xfer:
 	orr	w1, w5, w1, lsl 5
 	cmp	w2, w1
 	ldr	w1, [x29, 56]
-	bls	.L1789
+	bls	.L1802
 	ubfx	x2, x1, 3, 5
 	ldr	w1, [x29, 56]
 	ubfx	x1, x1, 27, 1
-.L1810:
+.L1823:
 	orr	w1, w2, w1, lsl 5
 	cmp	w0, w1
 	csel	w0, w0, w1, cs
-.L1788:
+.L1801:
 	add	w3, w3, 1
-	b	.L1787
-.L1789:
+	b	.L1800
+.L1802:
 	ubfx	x2, x1, 16, 5
 	ldr	w1, [x29, 56]
 	ubfx	x1, x1, 29, 1
-	b	.L1810
-.L1797:
+	b	.L1823
+.L1810:
 	mov	w0, -1
-	b	.L1788
-.L1783:
+	b	.L1801
+.L1796:
 	cmn	w0, #1
-	beq	.L1774
+	beq	.L1787
 	ldr	w1, [x21]
 	cmn	w1, #1
-	bne	.L1774
+	bne	.L1787
 	ldr	w1, [x21, 4]
 	cmn	w1, #1
-	bne	.L1774
+	bne	.L1787
 	ldr	w1, [x20]
 	cmn	w1, #1
 	mov	w1, 512
 	csel	w0, w0, w1, ne
-	b	.L1774
-.L1792:
+	b	.L1787
+.L1805:
 	mov	w0, 0
-	b	.L1774
+	b	.L1787
 	.size	nandc_xfer, .-nandc_xfer
 	.section	.text.flash_read_page,"ax",@progbits
 	.align	2
@@ -11044,23 +11127,23 @@ flash_read_page:
 	bl	nandc_wait_flash_ready
 	mov	w0, w10
 	bl	nandc_cs
-	cbnz	w15, .L1813
+	cbnz	w15, .L1826
 	mov	w0, w10
 	bl	zftl_flash_enter_slc_mode
-.L1814:
+.L1827:
 	ldr	x1, [x19, #:lo12:.LANCHOR16]
 	ldrb	w0, [x1, 7]
 	cmp	w0, 1
-	bne	.L1816
+	bne	.L1829
 	ldrb	w0, [x1, 12]
 	cmp	w0, 2
-	bne	.L1816
+	bne	.L1829
 	sxtw	x0, w10
 	mov	w2, 38
 	add	x0, x0, 8
 	add	x0, x14, x0, lsl 8
 	str	w2, [x0, 8]
-.L1816:
+.L1829:
 	ubfiz	x4, x10, 8, 8
 	and	w0, w8, 255
 	add	x4, x14, x4
@@ -11074,26 +11157,26 @@ flash_read_page:
 	str	w0, [x4, 2052]
 	adrp	x0, .LANCHOR31
 	ldrb	w0, [x0, #:lo12:.LANCHOR31]
-	cbz	w0, .L1817
+	cbz	w0, .L1830
 	lsr	w0, w8, 24
 	str	w0, [x4, 2052]
-.L1817:
+.L1830:
 	mov	w0, 48
 	str	w0, [x4, 2056]
 	ldrb	w0, [x1, 12]
 	cmp	w0, 3
-	bne	.L1818
-	cbz	w15, .L1818
+	bne	.L1831
+	cbz	w15, .L1831
 	adrp	x0, .LANCHOR36
 	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbnz	w0, .L1818
+	cbnz	w0, .L1831
 	adrp	x0, .LANCHOR37
 	ldrb	w0, [x0, #:lo12:.LANCHOR37]
-	cbnz	w0, .L1818
+	cbnz	w0, .L1831
 	add	w8, w8, w8, lsl 1
 	sub	w0, w8, #1
 	add	w0, w0, w15
-.L1827:
+.L1840:
 	bl	nandc_set_seed
 	bl	nandc_wait_flash_ready
 	mov	w2, w11
@@ -11109,34 +11192,34 @@ flash_read_page:
 	mov	w0, w10
 	bl	nandc_xfer
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.32
+	bl	nandc_de_cs.constprop.33
 	ldr	x19, [sp, 16]
 	mov	w0, w2
 	ldp	x29, x30, [sp], 32
 	ret
-.L1813:
+.L1826:
 	ldr	x0, [x19, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1815
+	bne	.L1828
 	adrp	x0, .LANCHOR36
 	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbnz	w0, .L1815
+	cbnz	w0, .L1828
 	adrp	x0, .LANCHOR37
 	ldrb	w0, [x0, #:lo12:.LANCHOR37]
-	cbnz	w0, .L1815
+	cbnz	w0, .L1828
 	sxtw	x0, w10
 	add	x0, x0, 8
 	add	x0, x14, x0, lsl 8
 	str	w15, [x0, 8]
-	b	.L1814
-.L1815:
+	b	.L1827
+.L1828:
 	mov	w0, w10
 	bl	zftl_flash_exit_slc_mode
-	b	.L1814
-.L1818:
-	mov	w0, w8
 	b	.L1827
+.L1831:
+	mov	w0, w8
+	b	.L1840
 	.size	flash_read_page, .-flash_read_page
 	.section	.text.micron_read_retrial,"ax",@progbits
 	.align	2
@@ -11146,39 +11229,43 @@ micron_read_retrial:
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	and	w20, w0, 255
+	and	w19, w0, 255
 	adrp	x0, .LANCHOR50
 	stp	x25, x26, [sp, 64]
-	stp	x21, x22, [sp, 32]
+	str	w4, [x29, 116]
 	mov	x26, x3
+	str	x2, [x29, 120]
+	stp	x21, x22, [sp, 32]
+	mov	w22, 0
 	stp	x23, x24, [sp, 48]
 	mov	w23, w1
-	ldrb	w19, [x0, #:lo12:.LANCHOR50]
-	mov	w22, 0
+	ldrb	w20, [x0, #:lo12:.LANCHOR50]
 	stp	x27, x28, [sp, 80]
-	str	w4, [x29, 116]
-	str	x2, [x29, 120]
 	bl	nandc_wait_flash_ready
+	mov	w0, w19
+	bl	zftl_flash_enter_slc_mode
+	mov	w0, w19
+	bl	zftl_flash_exit_slc_mode
 	adrp	x0, .LANCHOR13
-	add	w19, w19, w19, lsl 1
-	asr	w19, w19, 2
+	add	w20, w20, w20, lsl 1
+	asr	w20, w20, 2
 	ldr	x6, [x0, #:lo12:.LANCHOR13]
 	adrp	x0, .LANCHOR169
 	add	x0, x0, :lo12:.LANCHOR169
 	str	x0, [x29, 104]
-	ubfiz	x0, x20, 8, 8
+	ubfiz	x0, x19, 8, 8
 	add	x25, x6, x0
-.L1829:
+.L1842:
 	adrp	x24, .LANCHOR14
 	add	x24, x24, :lo12:.LANCHOR14
 	mov	w21, 0
 	mov	w28, -1
-.L1830:
+.L1843:
 	ldr	x0, [x29, 104]
 	ldrb	w0, [x0]
 	cmp	w21, w0
-	bcc	.L1835
-.L1834:
+	bcc	.L1848
+.L1847:
 	mov	w0, 239
 	str	w0, [x25, 2056]
 	mov	w0, 137
@@ -11187,20 +11274,20 @@ micron_read_retrial:
 	bl	timer_delay_ns
 	str	wzr, [x25, 2048]
 	str	wzr, [x25, 2048]
-	cmp	w28, w19
+	cmp	w28, w20
 	str	wzr, [x25, 2048]
 	str	wzr, [x25, 2048]
-	bcc	.L1836
+	bcc	.L1849
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L1836:
+.L1849:
 	cmn	w28, #1
 	cset	w24, eq
 	cmp	w28, 256
 	cset	w0, eq
 	orr	w0, w24, w0
-	cbz	w0, .L1837
+	cbz	w0, .L1850
 	mov	w4, w28
 	mov	w3, w21
 	mov	w2, w23
@@ -11210,13 +11297,13 @@ micron_read_retrial:
 	bl	printf
 	eor	w0, w22, 1
 	tst	w24, w0
-	beq	.L1838
+	beq	.L1851
 	mov	w1, 3
-	mov	w0, w20
+	mov	w0, w19
 	mov	w22, 1
 	bl	mt_auto_read_calibration_config
-	b	.L1829
-.L1835:
+	b	.L1842
+.L1848:
 	mov	w0, 239
 	str	w0, [x25, 2056]
 	mov	w0, 137
@@ -11230,13 +11317,13 @@ micron_read_retrial:
 	ldr	w4, [x29, 116]
 	mov	w1, w23
 	ldr	x2, [x29, 120]
-	mov	w0, w20
+	mov	w0, w19
 	str	wzr, [x25, 2048]
 	str	wzr, [x25, 2048]
 	bl	flash_read_page
 	mov	w7, w0
 	ldr	w0, [x24]
-	tbz	x0, 12, .L1831
+	tbz	x0, 12, .L1844
 	mov	w4, w7
 	str	w7, [x29, 112]
 	mov	w3, w28
@@ -11246,33 +11333,33 @@ micron_read_retrial:
 	add	x0, x0, :lo12:.LC115
 	bl	printf
 	ldr	w7, [x29, 112]
-.L1831:
+.L1844:
 	cmn	w7, #1
-	beq	.L1832
+	beq	.L1845
 	adrp	x0, .LANCHOR166
 	cmn	w28, #1
 	csel	w28, w28, w7, ne
-	cmp	w7, w19
+	cmp	w7, w20
 	ldr	x0, [x0, #:lo12:.LANCHOR166]
 	str	x0, [x29, 120]
 	adrp	x0, .LANCHOR168
 	ldr	x26, [x0, #:lo12:.LANCHOR168]
-	bcc	.L1841
-.L1832:
+	bcc	.L1854
+.L1845:
 	mov	w21, w27
-	b	.L1830
-.L1841:
+	b	.L1843
+.L1854:
 	mov	w28, w7
-	b	.L1834
-.L1838:
-	cbz	w22, .L1839
-	mov	w0, w20
+	b	.L1847
+.L1851:
+	cbz	w22, .L1852
+	mov	w0, w19
 	mov	w1, 0
 	bl	mt_auto_read_calibration_config
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L1839:
+.L1852:
 	bl	nandc_wait_flash_ready
 	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
@@ -11282,13 +11369,13 @@ micron_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1837:
-	cbz	w22, .L1839
+.L1850:
+	cbz	w22, .L1852
 	mov	w1, 0
-	mov	w0, w20
+	mov	w0, w19
 	mov	w28, 256
 	bl	mt_auto_read_calibration_config
-	b	.L1839
+	b	.L1852
 	.size	micron_read_retrial, .-micron_read_retrial
 	.section	.text.toshiba_3d_read_retrial,"ax",@progbits
 	.align	2
@@ -11329,17 +11416,17 @@ toshiba_3d_read_retrial:
 	csel	w0, w1, w0, ne
 	str	w0, [x29, 136]
 	add	x0, x22, :lo12:.LANCHOR24
-	cbnz	w4, .L1859
+	cbnz	w4, .L1872
 	str	x0, [x29, 120]
 	sxtw	x0, w24
 	add	x0, x0, 8
 	add	x0, x25, x0, lsl 8
 	str	x0, [x29, 112]
-.L1866:
+.L1879:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, 36
-	bne	.L1860
+	bne	.L1873
 	mov	w1, w20
 	mov	x0, x21
 	mov	w2, 0
@@ -11347,7 +11434,7 @@ toshiba_3d_read_retrial:
 	ldr	x1, [x29, 112]
 	mov	w0, 93
 	str	w0, [x1, 8]
-.L1861:
+.L1874:
 	mov	w4, w28
 	mov	x3, x27
 	mov	x2, x26
@@ -11357,7 +11444,7 @@ toshiba_3d_read_retrial:
 	mov	w4, w0
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 4, .L1862
+	tbz	x0, 4, .L1875
 	mov	w3, w4
 	str	w4, [x29, 108]
 	mov	w2, w23
@@ -11366,9 +11453,9 @@ toshiba_3d_read_retrial:
 	add	x0, x0, :lo12:.LC117
 	bl	printf
 	ldr	w4, [x29, 108]
-.L1862:
+.L1875:
 	cmn	w4, #1
-	beq	.L1863
+	beq	.L1876
 	adrp	x0, .LANCHOR166
 	cmn	w19, #1
 	csel	w19, w19, w4, ne
@@ -11379,38 +11466,38 @@ toshiba_3d_read_retrial:
 	ldrb	w0, [x0, #:lo12:.LANCHOR50]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1881
-.L1863:
+	bcc	.L1894
+.L1876:
 	ldr	w0, [x29, 136]
 	add	w20, w20, 1
 	cmp	w0, w20
-	bne	.L1866
-.L1865:
+	bne	.L1879
+.L1878:
 	ldrb	w0, [x22, #:lo12:.LANCHOR24]
 	cmp	w0, 36
-	bne	.L1867
+	bne	.L1880
 	mov	w2, 0
-.L1904:
+.L1917:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_tlc_set_rr_para
-	b	.L1868
-.L1860:
+	b	.L1881
+.L1873:
 	mov	w1, w20
 	mov	x0, x21
 	bl	toshiba_3d_set_slc_rr_para
-	b	.L1861
-.L1881:
+	b	.L1874
+.L1894:
 	mov	w19, w4
-	b	.L1865
-.L1867:
+	b	.L1878
+.L1880:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_3d_set_slc_rr_para
-.L1868:
+.L1881:
 	ldrb	w0, [x22, #:lo12:.LANCHOR24]
 	cmp	w0, 36
-	bne	.L1877
+	bne	.L1890
 	ldr	x0, [x29, 128]
 	add	x25, x25, x0, lsl 8
 	mov	w0, 85
@@ -11419,19 +11506,19 @@ toshiba_3d_read_retrial:
 	str	wzr, [x25, 2052]
 	str	wzr, [x25, 2048]
 	str	w0, [x25, 2056]
-.L1877:
+.L1890:
 	adrp	x0, .LANCHOR50
 	ldrb	w0, [x0, #:lo12:.LANCHOR50]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L1878
+	bcc	.L1891
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L1878:
+.L1891:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L1879
+	bne	.L1892
 	adrp	x0, .LC119
 	mov	w4, w19
 	mov	w3, w20
@@ -11439,7 +11526,7 @@ toshiba_3d_read_retrial:
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC119
 	bl	printf
-.L1879:
+.L1892:
 	bl	nandc_wait_flash_ready
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
@@ -11449,23 +11536,23 @@ toshiba_3d_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1859:
+.L1872:
 	str	x0, [x29, 112]
 	sxtw	x0, w24
 	add	x0, x0, 8
 	add	x0, x25, x0, lsl 8
 	str	x0, [x29, 136]
-.L1875:
+.L1888:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
 	cmp	w0, 36
-	bne	.L1869
+	bne	.L1882
 	mov	x0, x21
 	mov	w2, 1
 	mov	w1, w20
 	bl	toshiba_tlc_set_rr_para
 	mov	w0, 93
-.L1903:
+.L1916:
 	ldr	x1, [x29, 136]
 	mov	w4, w28
 	mov	x3, x27
@@ -11477,7 +11564,7 @@ toshiba_3d_read_retrial:
 	mov	w4, w0
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 4, .L1871
+	tbz	x0, 4, .L1884
 	mov	w3, w4
 	str	w4, [x29, 108]
 	mov	w2, w23
@@ -11486,9 +11573,9 @@ toshiba_3d_read_retrial:
 	add	x0, x0, :lo12:.LC118
 	bl	printf
 	ldr	w4, [x29, 108]
-.L1871:
+.L1884:
 	cmn	w4, #1
-	beq	.L1872
+	beq	.L1885
 	adrp	x0, .LANCHOR166
 	cmn	w19, #1
 	csel	w19, w19, w4, ne
@@ -11499,32 +11586,32 @@ toshiba_3d_read_retrial:
 	ldrb	w0, [x0, #:lo12:.LANCHOR50]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1882
-.L1872:
+	bcc	.L1895
+.L1885:
 	ldr	w0, [x29, 120]
 	add	w20, w20, 1
 	cmp	w0, w20
-	bne	.L1875
-.L1874:
+	bne	.L1888
+.L1887:
 	ldrb	w0, [x22, #:lo12:.LANCHOR24]
 	cmp	w0, 36
-	bne	.L1876
+	bne	.L1889
 	mov	w2, 1
-	b	.L1904
-.L1869:
+	b	.L1917
+.L1882:
 	mov	x0, x21
 	mov	w1, w20
 	bl	toshiba_3d_set_tlc_rr_para
 	mov	w0, 38
-	b	.L1903
-.L1882:
+	b	.L1916
+.L1895:
 	mov	w19, w4
-	b	.L1874
-.L1876:
+	b	.L1887
+.L1889:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_3d_set_tlc_rr_para
-	b	.L1868
+	b	.L1881
 	.size	toshiba_3d_read_retrial, .-toshiba_3d_read_retrial
 	.section	.text.toshiba_read_retrial,"ax",@progbits
 	.align	2
@@ -11536,14 +11623,18 @@ toshiba_read_retrial:
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	mov	w25, w1
-	stp	x19, x20, [sp, 16]
 	mov	x26, x2
-	stp	x27, x28, [sp, 80]
+	str	w4, [x29, 116]
+	stp	x19, x20, [sp, 16]
 	and	w19, w0, 255
-	stp	x23, x24, [sp, 48]
+	stp	x27, x28, [sp, 80]
 	mov	x27, x3
-	str	w4, [x29, 116]
+	stp	x23, x24, [sp, 48]
 	bl	nandc_wait_flash_ready
+	mov	w0, w19
+	bl	zftl_flash_enter_slc_mode
+	mov	w0, w19
+	bl	zftl_flash_exit_slc_mode
 	adrp	x0, .LANCHOR13
 	adrp	x1, .LANCHOR24
 	str	x1, [x29, 120]
@@ -11556,35 +11647,35 @@ toshiba_read_retrial:
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
-	bls	.L1923
+	bls	.L1936
 	adrp	x0, .LANCHOR21
 	ldrb	w0, [x0, #:lo12:.LANCHOR21]
-	cbz	w0, .L1924
+	cbz	w0, .L1937
 	mov	w23, 1
 	mov	w0, 1
 	bl	nandc_set_if_mode
-.L1907:
+.L1920:
 	and	x0, x19, 255
 	mov	w1, 92
 	add	x0, x22, x0, lsl 8
 	str	w1, [x0, 2056]
 	mov	w1, 197
 	str	w1, [x0, 2056]
-.L1906:
+.L1919:
 	sxtw	x0, w19
 	mov	w20, 1
 	add	x0, x0, 8
 	mov	w24, -1
 	add	x0, x22, x0, lsl 8
 	str	x0, [x29, 96]
-.L1908:
+.L1921:
 	adrp	x0, .LANCHOR169
 	ldrb	w0, [x0, #:lo12:.LANCHOR169]
 	add	w0, w0, 1
 	cmp	w20, w0
-	bcc	.L1917
+	bcc	.L1930
 	mov	w28, w24
-.L1916:
+.L1929:
 	ldr	x0, [x29, 120]
 	mov	w1, 0
 	ldrb	w0, [x0, #:lo12:.LANCHOR24]
@@ -11592,9 +11683,9 @@ toshiba_read_retrial:
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x21
-	bhi	.L1918
+	bhi	.L1931
 	bl	sandisk_set_rr_para
-.L1919:
+.L1932:
 	sxtw	x19, w19
 	mov	w0, 255
 	add	x19, x19, 8
@@ -11604,14 +11695,14 @@ toshiba_read_retrial:
 	ldrb	w0, [x0, #:lo12:.LANCHOR50]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L1920
+	bcc	.L1933
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L1920:
+.L1933:
 	cmp	w28, 256
 	ccmn	w28, #1, 4, ne
-	bne	.L1921
+	bne	.L1934
 	adrp	x0, .LC119
 	mov	w4, w28
 	mov	w3, w20
@@ -11619,12 +11710,12 @@ toshiba_read_retrial:
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC119
 	bl	printf
-.L1921:
+.L1934:
 	bl	nandc_wait_flash_ready
-	cbz	w23, .L1905
+	cbz	w23, .L1918
 	mov	w0, 4
 	bl	nandc_set_if_mode
-.L1905:
+.L1918:
 	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11633,13 +11724,13 @@ toshiba_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1924:
+.L1937:
 	mov	w23, 0
-	b	.L1907
-.L1923:
+	b	.L1920
+.L1936:
 	mov	w23, 0
-	b	.L1906
-.L1917:
+	b	.L1919
+.L1930:
 	ldr	x0, [x29, 120]
 	mov	w1, w20
 	ldrb	w0, [x0, #:lo12:.LANCHOR24]
@@ -11647,22 +11738,22 @@ toshiba_read_retrial:
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x21
-	bhi	.L1909
+	bhi	.L1922
 	bl	sandisk_set_rr_para
-.L1910:
+.L1923:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0, #:lo12:.LANCHOR24]
 	cmp	w0, 34
-	bne	.L1911
+	bne	.L1924
 	adrp	x0, .LANCHOR169
 	ldrb	w0, [x0, #:lo12:.LANCHOR169]
 	sub	w0, w0, #3
 	cmp	w20, w0
-	bne	.L1911
+	bne	.L1924
 	ldr	x1, [x29, 96]
 	mov	w0, 179
 	str	w0, [x1, 8]
-.L1911:
+.L1924:
 	ldr	x0, [x29, 104]
 	mov	w1, 38
 	ldr	w4, [x29, 116]
@@ -11677,7 +11768,7 @@ toshiba_read_retrial:
 	bl	flash_read_page
 	mov	w28, w0
 	cmn	w0, #1
-	beq	.L1914
+	beq	.L1927
 	cmn	w24, #1
 	csel	w24, w24, w0, ne
 	adrp	x0, .LANCHOR166
@@ -11688,16 +11779,16 @@ toshiba_read_retrial:
 	ldrb	w0, [x0, #:lo12:.LANCHOR50]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L1916
-.L1914:
+	bcc	.L1929
+.L1927:
 	add	w20, w20, 1
-	b	.L1908
-.L1909:
+	b	.L1921
+.L1922:
 	bl	toshiba_set_rr_para
-	b	.L1910
-.L1918:
+	b	.L1923
+.L1931:
 	bl	toshiba_set_rr_para
-	b	.L1919
+	b	.L1932
 	.size	toshiba_read_retrial, .-toshiba_read_retrial
 	.section	.text.ymtc_3d_read_retrial,"ax",@progbits
 	.align	2
@@ -11709,17 +11800,21 @@ ymtc_3d_read_retrial:
 	stp	x19, x20, [sp, 16]
 	mov	w19, -1
 	stp	x21, x22, [sp, 32]
-	mov	w22, w1
+	and	w22, w0, 255
 	stp	x23, x24, [sp, 48]
-	mov	x23, x2
+	mov	w23, w1
 	stp	x25, x26, [sp, 64]
-	mov	x24, x3
+	mov	x24, x2
 	stp	x27, x28, [sp, 80]
-	and	w25, w0, 255
+	mov	x25, x3
 	mov	w26, w4
 	bl	nandc_wait_flash_ready
+	mov	w0, w22
+	bl	zftl_flash_enter_slc_mode
+	mov	w0, w22
+	bl	zftl_flash_exit_slc_mode
 	adrp	x1, .LANCHOR13
-	ubfiz	x21, x25, 8, 8
+	ubfiz	x21, x22, 8, 8
 	add	x0, x21, 2048
 	adrp	x27, .LANCHOR50
 	ldr	x21, [x1, #:lo12:.LANCHOR13]
@@ -11728,59 +11823,59 @@ ymtc_3d_read_retrial:
 	adrp	x5, .LANCHOR168
 	add	x21, x21, x0
 	add	x27, x27, :lo12:.LANCHOR50
-	tst	x22, 50331648
-	bne	.L1947
-.L1942:
+	tst	x23, 50331648
+	bne	.L1960
+.L1955:
 	str	x5, [x29, 104]
 	mov	w1, w20
 	mov	x0, x21
 	bl	ymtc_3d_set_slc_rr_para
 	mov	w4, w26
-	mov	x3, x24
-	mov	x2, x23
-	mov	w1, w22
-	mov	w0, w25
+	mov	x3, x25
+	mov	x2, x24
+	mov	w1, w23
+	mov	w0, w22
 	bl	flash_read_page
 	ldr	x5, [x29, 104]
 	cmn	w0, #1
-	beq	.L1939
+	beq	.L1952
 	ldrb	w1, [x27]
 	cmn	w19, #1
 	csel	w19, w19, w0, ne
-	ldr	x23, [x28, #:lo12:.LANCHOR166]
-	ldr	x24, [x5, #:lo12:.LANCHOR168]
+	ldr	x24, [x28, #:lo12:.LANCHOR166]
+	ldr	x25, [x5, #:lo12:.LANCHOR168]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L1950
-.L1939:
+	bcc	.L1963
+.L1952:
 	add	w20, w20, 1
 	cmp	w20, 10
-	bne	.L1942
-.L1941:
+	bne	.L1955
+.L1954:
 	mov	w1, 0
 	mov	x0, x21
 	bl	ymtc_3d_set_slc_rr_para
-.L1943:
+.L1956:
 	adrp	x0, .LANCHOR50
 	ldrb	w0, [x0, #:lo12:.LANCHOR50]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L1948
+	bcc	.L1961
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L1948:
+.L1961:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L1949
+	bne	.L1962
 	adrp	x0, .LC120
 	mov	w4, w19
 	mov	w3, w20
-	mov	w2, w22
+	mov	w2, w23
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC120
 	bl	printf
-.L1949:
+.L1962:
 	bl	nandc_wait_flash_ready
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
@@ -11790,43 +11885,43 @@ ymtc_3d_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1950:
+.L1963:
 	mov	w19, w0
-	b	.L1941
-.L1947:
+	b	.L1954
+.L1960:
 	str	x5, [x29, 104]
 	mov	w1, w20
 	mov	x0, x21
 	bl	ymtc_3d_set_tlc_rr_para
 	mov	w4, w26
-	mov	x3, x24
-	mov	x2, x23
-	mov	w1, w22
-	mov	w0, w25
+	mov	x3, x25
+	mov	x2, x24
+	mov	w1, w23
+	mov	w0, w22
 	bl	flash_read_page
 	ldr	x5, [x29, 104]
 	cmn	w0, #1
-	beq	.L1944
+	beq	.L1957
 	ldrb	w1, [x27]
 	cmn	w19, #1
 	csel	w19, w19, w0, ne
-	ldr	x23, [x28, #:lo12:.LANCHOR166]
-	ldr	x24, [x5, #:lo12:.LANCHOR168]
+	ldr	x24, [x28, #:lo12:.LANCHOR166]
+	ldr	x25, [x5, #:lo12:.LANCHOR168]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L1951
-.L1944:
+	bcc	.L1964
+.L1957:
 	add	w20, w20, 1
 	cmp	w20, 51
-	bne	.L1947
-.L1946:
+	bne	.L1960
+.L1959:
 	mov	w1, 0
 	mov	x0, x21
 	bl	ymtc_3d_set_tlc_rr_para
-	b	.L1943
-.L1951:
+	b	.L1956
+.L1964:
 	mov	w19, w0
-	b	.L1946
+	b	.L1959
 	.size	ymtc_3d_read_retrial, .-ymtc_3d_read_retrial
 	.section	.text.samsung_read_retrial,"ax",@progbits
 	.align	2
@@ -11836,21 +11931,25 @@ samsung_read_retrial:
 	stp	x29, x30, [sp, -112]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	mov	x21, x2
+	and	w21, w0, 255
+	mov	x22, x2
 	stp	x19, x20, [sp, 16]
-	mov	x22, x3
-	stp	x23, x24, [sp, 48]
+	str	w4, [x29, 108]
 	mov	w20, w1
-	and	w23, w0, 255
+	stp	x23, x24, [sp, 48]
+	mov	x23, x3
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	str	w4, [x29, 108]
 	bl	nandc_wait_flash_ready
+	mov	w0, w21
+	bl	zftl_flash_enter_slc_mode
+	mov	w0, w21
+	bl	zftl_flash_exit_slc_mode
 	adrp	x0, .LANCHOR13
 	tst	x20, 50331648
-	and	x5, x23, 255
+	and	x5, x21, 255
 	ldr	x0, [x0, #:lo12:.LANCHOR13]
-	bne	.L1967
+	bne	.L1980
 	adrp	x24, .LANCHOR170
 	adrp	x27, .LC121
 	add	x28, x0, x5, lsl 8
@@ -11858,7 +11957,7 @@ samsung_read_retrial:
 	add	x27, x27, :lo12:.LC121
 	mov	x26, 0
 	mov	w25, -1
-.L1972:
+.L1985:
 	mov	w0, 239
 	str	w0, [x28, 2056]
 	mov	w0, 141
@@ -11872,15 +11971,15 @@ samsung_read_retrial:
 	str	wzr, [x28, 2048]
 	bl	nandc_wait_flash_ready
 	ldr	w4, [x29, 108]
-	mov	x3, x22
-	mov	x2, x21
+	mov	x3, x23
+	mov	x2, x22
 	mov	w1, w20
-	mov	w0, w23
+	mov	w0, w21
 	bl	flash_read_page
 	mov	w4, w0
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 4, .L1968
+	tbz	x0, 4, .L1981
 	mov	w3, w4
 	str	w4, [x29, 104]
 	mov	w2, w20
@@ -11888,26 +11987,26 @@ samsung_read_retrial:
 	mov	x0, x27
 	bl	printf
 	ldr	w4, [x29, 104]
-.L1968:
+.L1981:
 	cmn	w4, #1
-	beq	.L1969
+	beq	.L1982
 	adrp	x0, .LANCHOR166
 	cmn	w25, #1
 	csel	w25, w25, w4, ne
-	ldr	x21, [x0, #:lo12:.LANCHOR166]
+	ldr	x22, [x0, #:lo12:.LANCHOR166]
 	adrp	x0, .LANCHOR168
-	ldr	x22, [x0, #:lo12:.LANCHOR168]
+	ldr	x23, [x0, #:lo12:.LANCHOR168]
 	adrp	x0, .LANCHOR50
 	ldrb	w0, [x0, #:lo12:.LANCHOR50]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1981
-.L1969:
+	bcc	.L1994
+.L1982:
 	add	x26, x26, 1
 	cmp	x26, 25
-	bne	.L1972
+	bne	.L1985
 	mov	w19, 26
-.L1971:
+.L1984:
 	mov	w0, 239
 	str	w0, [x28, 2056]
 	mov	w0, 141
@@ -11916,20 +12015,20 @@ samsung_read_retrial:
 	str	wzr, [x28, 2048]
 	str	wzr, [x28, 2048]
 	str	wzr, [x28, 2048]
-.L2003:
+.L2016:
 	bl	nandc_wait_flash_ready
 	adrp	x0, .LANCHOR50
 	ldrb	w0, [x0, #:lo12:.LANCHOR50]
 	add	w0, w0, w0, lsl 1
 	cmp	w25, w0, lsr 2
-	bcc	.L1979
+	bcc	.L1992
 	cmn	w25, #1
 	mov	w0, 256
 	csel	w25, w25, w0, eq
-.L1979:
+.L1992:
 	cmp	w25, 256
 	ccmn	w25, #1, 4, ne
-	bne	.L1980
+	bne	.L1993
 	adrp	x0, .LC123
 	mov	w4, w25
 	mov	w3, w19
@@ -11937,7 +12036,7 @@ samsung_read_retrial:
 	mov	w1, w19
 	add	x0, x0, :lo12:.LC123
 	bl	printf
-.L1980:
+.L1993:
 	bl	nandc_wait_flash_ready
 	mov	w0, w25
 	ldp	x19, x20, [sp, 16]
@@ -11947,10 +12046,10 @@ samsung_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1981:
+.L1994:
 	mov	w25, w4
-	b	.L1971
-.L1967:
+	b	.L1984
+.L1980:
 	adrp	x7, .LANCHOR171
 	add	x7, x7, :lo12:.LANCHOR171
 	adrp	x24, .LC122
@@ -11960,7 +12059,7 @@ samsung_read_retrial:
 	mov	w25, -1
 	mov	w19, 1
 	mov	w26, 137
-.L1978:
+.L1991:
 	mov	w0, 239
 	str	w0, [x27, 2056]
 	str	w26, [x27, 2052]
@@ -11974,15 +12073,15 @@ samsung_read_retrial:
 	str	w0, [x27, 2048]
 	bl	nandc_wait_flash_ready
 	ldr	w4, [x29, 108]
-	mov	x3, x22
-	mov	x2, x21
+	mov	x3, x23
+	mov	x2, x22
 	mov	w1, w20
-	mov	w0, w23
+	mov	w0, w21
 	bl	flash_read_page
 	mov	w4, w0
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 4, .L1974
+	tbz	x0, 4, .L1987
 	mov	w3, w4
 	str	w4, [x29, 104]
 	mov	w2, w20
@@ -11990,26 +12089,26 @@ samsung_read_retrial:
 	mov	x0, x24
 	bl	printf
 	ldr	w4, [x29, 104]
-.L1974:
+.L1987:
 	cmn	w4, #1
-	beq	.L1975
+	beq	.L1988
 	adrp	x0, .LANCHOR166
 	cmn	w25, #1
 	csel	w25, w25, w4, ne
-	ldr	x21, [x0, #:lo12:.LANCHOR166]
+	ldr	x22, [x0, #:lo12:.LANCHOR166]
 	adrp	x0, .LANCHOR168
-	ldr	x22, [x0, #:lo12:.LANCHOR168]
+	ldr	x23, [x0, #:lo12:.LANCHOR168]
 	adrp	x0, .LANCHOR50
 	ldrb	w0, [x0, #:lo12:.LANCHOR50]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1982
-.L1975:
+	bcc	.L1995
+.L1988:
 	add	w19, w19, 1
 	add	x28, x28, 4
 	cmp	w19, 26
-	bne	.L1978
-.L1977:
+	bne	.L1991
+.L1990:
 	mov	w0, 239
 	str	w0, [x27, 2056]
 	mov	w0, 137
@@ -12018,10 +12117,10 @@ samsung_read_retrial:
 	str	wzr, [x27, 2048]
 	str	wzr, [x27, 2048]
 	str	wzr, [x27, 2048]
-	b	.L2003
-.L1982:
+	b	.L2016
+.L1995:
 	mov	w25, w4
-	b	.L1977
+	b	.L1990
 	.size	samsung_read_retrial, .-samsung_read_retrial
 	.section	.text.hynix_read_retrial,"ax",@progbits
 	.align	2
@@ -12049,29 +12148,33 @@ hynix_read_retrial:
 	ldrb	w24, [x28, 2]
 	ldrb	w20, [x0, 8]
 	bl	nandc_wait_flash_ready
+	mov	w0, w23
+	bl	zftl_flash_enter_slc_mode
+	mov	w0, w23
+	bl	zftl_flash_exit_slc_mode
 	adrp	x6, .LANCHOR50
 	add	x6, x6, :lo12:.LANCHOR50
 	mov	w5, 0
 	adrp	x7, .LANCHOR166
 	adrp	x8, .LANCHOR168
-.L2005:
+.L2018:
 	cmp	w5, w24
-	bcc	.L2010
-.L2009:
+	bcc	.L2023
+.L2022:
 	adrp	x0, .LANCHOR50
 	add	x23, x28, x23
 	ldrb	w0, [x0, #:lo12:.LANCHOR50]
 	strb	w20, [x23, 8]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L2011
+	bcc	.L2024
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L2011:
+.L2024:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L2012
+	bne	.L2025
 	adrp	x0, .LC124
 	mov	w4, w19
 	mov	w3, w5
@@ -12079,7 +12182,7 @@ hynix_read_retrial:
 	mov	w1, w5
 	add	x0, x0, :lo12:.LC124
 	bl	printf
-.L2012:
+.L2025:
 	bl	nandc_wait_flash_ready
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
@@ -12089,7 +12192,7 @@ hynix_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2010:
+.L2023:
 	add	w20, w20, 1
 	stp	x6, x8, [x29, 96]
 	and	w20, w20, 255
@@ -12110,7 +12213,7 @@ hynix_read_retrial:
 	cmn	w0, #1
 	ldp	x6, x8, [x29, 96]
 	ldr	x7, [x29, 112]
-	beq	.L2007
+	beq	.L2020
 	ldrb	w1, [x6]
 	cmn	w19, #1
 	csel	w19, w19, w0, ne
@@ -12118,13 +12221,13 @@ hynix_read_retrial:
 	ldr	x26, [x8, #:lo12:.LANCHOR168]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L2013
-.L2007:
+	bcc	.L2026
+.L2020:
 	add	w5, w5, 1
-	b	.L2005
-.L2013:
+	b	.L2018
+.L2026:
 	mov	w19, w0
-	b	.L2009
+	b	.L2022
 	.size	hynix_read_retrial, .-hynix_read_retrial
 	.section	.text.flash_ddr_tuning_read,"ax",@progbits
 	.align	2
@@ -12160,7 +12263,7 @@ flash_ddr_tuning_read:
 	mov	w7, 6
 	str	wzr, [x29, 140]
 	str	x0, [x29, 112]
-.L2029:
+.L2042:
 	mov	w0, w7
 	str	w7, [x29, 128]
 	bl	nandc_set_ddr_para
@@ -12174,7 +12277,7 @@ flash_ddr_tuning_read:
 	ldr	x0, [x29, 120]
 	ldr	w7, [x29, 128]
 	ldr	w0, [x0]
-	tbz	x0, 4, .L2024
+	tbz	x0, 4, .L2037
 	ldr	x0, [x29, 112]
 	mov	w3, w4
 	mov	w1, w7
@@ -12184,46 +12287,46 @@ flash_ddr_tuning_read:
 	bl	printf
 	ldr	w4, [x29, 108]
 	ldr	w7, [x29, 128]
-.L2024:
+.L2037:
 	add	w0, w19, 1
 	cmp	w4, w0
-	bhi	.L2025
+	bhi	.L2038
 	adrp	x0, .LANCHOR166
 	ldr	x23, [x0, #:lo12:.LANCHOR166]
 	adrp	x0, .LANCHOR168
 	ldr	x24, [x0, #:lo12:.LANCHOR168]
 	ldrb	w0, [x25]
 	cmp	w4, w0, lsr 2
-	bcs	.L2035
+	bcs	.L2048
 	add	w27, w27, 1
 	cmp	w27, 7
-	bls	.L2035
+	bls	.L2048
 	sub	w28, w7, w27
 	mov	w19, w4
 	mov	w21, 0
-.L2027:
+.L2040:
 	ldr	w0, [x29, 140]
 	cmp	w27, w26
 	csel	w28, w28, w0, cs
-.L2028:
-	cbz	w28, .L2030
+.L2041:
+	cbz	w28, .L2043
 	adrp	x0, .LANCHOR50
 	mov	w1, 3
 	ldrb	w0, [x0, #:lo12:.LANCHOR50]
 	udiv	w0, w0, w1
 	cmp	w0, w19
-	bls	.L2030
+	bls	.L2043
 	mov	w1, w28
 	adrp	x0, .LC126
 	add	x0, x0, :lo12:.LC126
 	bl	printf
 	mov	w0, w28
-.L2049:
+.L2062:
 	bl	nandc_set_ddr_para
-	cbz	w21, .L2023
+	cbz	w21, .L2036
 	adrp	x25, .LANCHOR49
 	ldrb	w0, [x25, #:lo12:.LANCHOR49]
-	tbz	x0, 0, .L2023
+	tbz	x0, 0, .L2036
 	mov	w2, w22
 	mov	w1, w20
 	adrp	x0, .LC127
@@ -12257,16 +12360,16 @@ flash_ddr_tuning_read:
 	adrp	x0, .LANCHOR50
 	ldrb	w0, [x0, #:lo12:.LANCHOR50]
 	cmp	w19, w0
-	bhi	.L2037
+	bhi	.L2050
 	adrp	x1, .LANCHOR172
 	ldr	w0, [x1, #:lo12:.LANCHOR172]
 	add	w0, w0, 1
 	str	w0, [x1, #:lo12:.LANCHOR172]
 	cmp	w0, 100
-	bls	.L2033
+	bls	.L2046
 	adrp	x0, .LANCHOR21
 	strb	wzr, [x0, #:lo12:.LANCHOR21]
-.L2023:
+.L2036:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -12275,37 +12378,37 @@ flash_ddr_tuning_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L2025:
+.L2038:
 	cmp	w27, w26
-	bls	.L2036
+	bls	.L2049
 	sub	w0, w28, w27
 	str	w0, [x29, 140]
 	cmp	w27, 7
-	bhi	.L2028
+	bhi	.L2041
 	mov	w26, w27
-.L2036:
+.L2049:
 	mov	w27, 0
-	b	.L2026
-.L2035:
+	b	.L2039
+.L2048:
 	mov	w28, w7
 	mov	w19, w4
 	mov	w21, 0
-.L2026:
+.L2039:
 	add	w7, w7, 2
 	cmp	w7, 50
-	bne	.L2029
-	b	.L2027
-.L2030:
+	bne	.L2042
+	b	.L2040
+.L2043:
 	ldrb	w0, [x29, 132]
-	b	.L2049
-.L2037:
+	b	.L2062
+.L2050:
 	mov	w19, w21
-.L2033:
+.L2046:
 	ldrb	w0, [x25, #:lo12:.LANCHOR49]
 	bl	flash_set_interface_mode
 	ldrb	w0, [x25, #:lo12:.LANCHOR49]
 	bl	nandc_set_if_mode
-	b	.L2023
+	b	.L2036
 	.size	flash_ddr_tuning_read, .-flash_ddr_tuning_read
 	.section	.text.flash_read_page_en,"ax",@progbits
 	.align	2
@@ -12327,59 +12430,59 @@ flash_read_page_en:
 	mov	w24, w4
 	mov	x25, x0
 	cmp	w1, w20
-	bhi	.L2051
+	bhi	.L2064
 	adrp	x1, .LANCHOR173
 	adrp	x0, .LC0
 	mov	w2, 428
 	add	x1, x1, :lo12:.LANCHOR173
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2051:
+.L2064:
 	adrp	x0, .LANCHOR30
 	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w4, [x25, #:lo12:.LANCHOR18]
 	ldrb	w21, [x0, w20, sxtw]
 	cmp	w20, w4
-	bcc	.L2052
+	bcc	.L2065
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbnz	x0, 6, .L2053
-.L2077:
+	tbnz	x0, 6, .L2066
+.L2090:
 	mov	w0, -1
-.L2050:
+.L2063:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2053:
+.L2066:
 	mov	w3, w19
 	mov	w2, w20
 	mov	w1, w21
 	adrp	x0, .LC129
 	add	x0, x0, :lo12:.LC129
 	bl	printf
-	b	.L2077
-.L2052:
+	b	.L2090
+.L2065:
 	tst	x19, 50331648
-	bne	.L2055
+	bne	.L2068
 	adrp	x0, .LANCHOR0
 	adrp	x1, .LANCHOR1
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L2056
+	cbz	w0, .L2069
 	ldrb	w0, [x1, #:lo12:.LANCHOR1]
-	cbz	w0, .L2055
-.L2056:
+	cbz	w0, .L2068
+.L2069:
 	adrp	x0, .LANCHOR2
 	ldrb	w1, [x1, #:lo12:.LANCHOR1]
 	ldrh	w2, [x0, #:lo12:.LANCHOR2]
 	udiv	w0, w19, w2
 	mul	w0, w0, w2
 	sub	w19, w19, w0
-	cbz	w1, .L2057
+	cbz	w1, .L2070
 	add	w19, w0, w19, lsl 1
-.L2055:
+.L2068:
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -12387,15 +12490,15 @@ flash_read_page_en:
 	mov	w0, w21
 	bl	flash_read_page
 	cmn	w0, #1
-	bne	.L2050
+	bne	.L2063
 	adrp	x20, .LANCHOR52
 	ldrb	w25, [x20, #:lo12:.LANCHOR52]
-	cbnz	w25, .L2058
-.L2061:
+	cbnz	w25, .L2071
+.L2074:
 	adrp	x0, .LANCHOR174
 	ldr	x5, [x0, #:lo12:.LANCHOR174]
-	cbnz	x5, .L2059
-.L2060:
+	cbnz	x5, .L2072
+.L2073:
 	ldrb	w4, [x20, #:lo12:.LANCHOR52]
 	mov	w3, -1
 	mov	w2, w19
@@ -12405,7 +12508,7 @@ flash_read_page_en:
 	bl	printf
 	adrp	x0, .LANCHOR21
 	ldrb	w0, [x0, #:lo12:.LANCHOR21]
-	cbz	w0, .L2077
+	cbz	w0, .L2090
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -12417,13 +12520,13 @@ flash_read_page_en:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	b	flash_ddr_tuning_read
-.L2057:
+.L2070:
 	adrp	x1, .LANCHOR3
 	add	x1, x1, :lo12:.LANCHOR3
 	ldrh	w19, [x1, w19, uxtw 1]
 	add	w19, w19, w0
-	b	.L2055
-.L2058:
+	b	.L2068
+.L2071:
 	strb	wzr, [x20, #:lo12:.LANCHOR52]
 	mov	w4, w24
 	mov	x3, x23
@@ -12433,9 +12536,9 @@ flash_read_page_en:
 	bl	flash_read_page
 	strb	w25, [x20, #:lo12:.LANCHOR52]
 	cmn	w0, #1
-	beq	.L2061
-	b	.L2050
-.L2059:
+	beq	.L2074
+	b	.L2063
+.L2072:
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -12443,8 +12546,8 @@ flash_read_page_en:
 	mov	w0, w21
 	blr	x5
 	cmn	w0, #1
-	beq	.L2060
-	b	.L2050
+	beq	.L2073
+	b	.L2063
 	.size	flash_read_page_en, .-flash_read_page_en
 	.section	.text.flash_get_last_written_page,"ax",@progbits
 	.align	2
@@ -12474,23 +12577,23 @@ flash_get_last_written_page:
 	add	w1, w19, w26
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L2079
+	bne	.L2092
 	mov	w27, 0
 	mov	w28, 2
-.L2080:
+.L2093:
 	cmp	w27, w19
-	ble	.L2083
-.L2079:
+	ble	.L2096
+.L2092:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2084
+	tbz	x0, 12, .L2097
 	ldr	w3, [x22]
 	adrp	x0, .LC131
 	mov	w2, w19
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC131
 	bl	printf
-.L2084:
+.L2097:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -12499,7 +12602,7 @@ flash_get_last_written_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2083:
+.L2096:
 	add	w20, w27, w19
 	mov	w4, w25
 	mov	x3, x22
@@ -12509,14 +12612,14 @@ flash_get_last_written_page:
 	add	w1, w26, w20, sxth
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L2081
+	bne	.L2094
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L2080
-.L2081:
+	b	.L2093
+.L2094:
 	add	w20, w20, 1
 	sxth	w27, w20
-	b	.L2080
+	b	.L2093
 	.size	flash_get_last_written_page, .-flash_get_last_written_page
 	.section	.text.flash_get_last_written_page_ext,"ax",@progbits
 	.align	2
@@ -12578,15 +12681,15 @@ flash_ddr_para_scan:
 	bl	flash_read_page
 	cmn	w0, #1
 	mov	x0, x19
-	bne	.L2091
+	bne	.L2104
 	ldrb	w1, [x20, #:lo12:.LANCHOR49]
-	tbz	x1, 0, .L2091
+	tbz	x1, 0, .L2104
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, w21
 	bl	nandc_set_if_mode
 	strb	wzr, [x19, #:lo12:.LANCHOR21]
-.L2092:
+.L2105:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -12594,10 +12697,10 @@ flash_ddr_para_scan:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2091:
+.L2104:
 	mov	w1, 1
 	strb	w1, [x0, #:lo12:.LANCHOR21]
-	b	.L2092
+	b	.L2105
 	.size	flash_ddr_para_scan, .-flash_ddr_para_scan
 	.section	.text.flash_prog_page,"ax",@progbits
 	.align	2
@@ -12631,22 +12734,22 @@ flash_prog_page:
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	and	w20, w20, w1
 	ubfx	x27, x22, 24, 2
-	tbz	x0, 4, .L2098
+	tbz	x0, 4, .L2111
 	adrp	x0, .LC132
 	mov	w3, w4
 	mov	w2, w27
 	add	x0, x0, :lo12:.LC132
 	bl	printf
-.L2098:
+.L2111:
 	bl	nandc_wait_flash_ready
 	mov	w0, w21
 	bl	hynix_reconfig_rr_para
 	mov	w0, w21
 	bl	nandc_cs
 	mov	w0, w21
-	cbnz	w27, .L2099
+	cbnz	w27, .L2112
 	bl	zftl_flash_enter_slc_mode
-.L2100:
+.L2113:
 	add	x19, x26, x19, lsl 8
 	mov	w0, 128
 	str	w0, [x19, 2056]
@@ -12660,10 +12763,10 @@ flash_prog_page:
 	str	w0, [x19, 2052]
 	adrp	x0, .LANCHOR31
 	ldrb	w0, [x0, #:lo12:.LANCHOR31]
-	cbz	w0, .L2101
+	cbz	w0, .L2114
 	lsr	w0, w20, 24
 	str	w0, [x19, 2052]
-.L2101:
+.L2114:
 	mov	w0, w20
 	bl	nandc_set_seed
 	adrp	x0, .LANCHOR33+9
@@ -12679,15 +12782,15 @@ flash_prog_page:
 	mov	x0, x23
 	bl	flash_read_status
 	mov	w3, w0
-	bl	nandc_de_cs.constprop.32
+	bl	nandc_de_cs.constprop.33
 	and	w2, w3, 4
-	tbz	x3, 2, .L2097
+	tbz	x3, 2, .L2110
 	mov	w1, w22
 	adrp	x0, .LC133
 	add	x0, x0, :lo12:.LC133
 	bl	printf
 	mov	w2, -1
-.L2097:
+.L2110:
 	mov	w0, w2
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -12696,9 +12799,9 @@ flash_prog_page:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2099:
+.L2112:
 	bl	zftl_flash_exit_slc_mode
-	b	.L2100
+	b	.L2113
 	.size	flash_prog_page, .-flash_prog_page
 	.section	.text.flash_test_blk,"ax",@progbits
 	.align	2
@@ -12729,10 +12832,10 @@ flash_test_blk:
 	mov	w1, w19
 	bl	flash_erase_block
 	cmn	w0, #1
-	bne	.L2114
-.L2116:
+	bne	.L2127
+.L2129:
 	mov	w21, -1
-.L2115:
+.L2128:
 	mov	w1, w19
 	mov	w0, w20
 	bl	flash_erase_block
@@ -12742,7 +12845,7 @@ flash_test_blk:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2114:
+.L2127:
 	adrp	x23, .LANCHOR33
 	add	x23, x23, :lo12:.LANCHOR33
 	ldr	x3, [x21, #:lo12:.LANCHOR168]
@@ -12752,7 +12855,7 @@ flash_test_blk:
 	ldrb	w4, [x23, 9]
 	bl	flash_prog_page
 	cmn	w0, #1
-	beq	.L2116
+	beq	.L2129
 	ldrb	w4, [x23, 9]
 	mov	w1, w19
 	ldr	x3, [x21, #:lo12:.LANCHOR168]
@@ -12760,20 +12863,20 @@ flash_test_blk:
 	ldr	x2, [x22, #:lo12:.LANCHOR166]
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L2116
+	beq	.L2129
 	ldr	x0, [x22, #:lo12:.LANCHOR166]
 	ldr	w1, [x0]
 	mov	w0, 42405
 	movk	w0, 0xa5a5, lsl 16
 	cmp	w1, w0
-	bne	.L2116
+	bne	.L2129
 	ldr	x0, [x21, #:lo12:.LANCHOR168]
 	ldr	w1, [x0]
 	mov	w0, 23130
 	movk	w0, 0x5a5a, lsl 16
 	cmp	w1, w0
 	csetm	w21, ne
-	b	.L2115
+	b	.L2128
 	.size	flash_test_blk, .-flash_test_blk
 	.section	.text.id_block_prog_msb_ff_data,"ax",@progbits
 	.align	2
@@ -12789,40 +12892,40 @@ id_block_prog_msb_ff_data:
 	stp	x23, x24, [sp, 48]
 	ldrb	w0, [x0, #:lo12:.LANCHOR19]
 	str	x25, [sp, 64]
-	cbnz	w0, .L2124
+	cbnz	w0, .L2137
 	adrp	x20, .LANCHOR33
 	add	x20, x20, :lo12:.LANCHOR33
 	ldrb	w0, [x20, 19]
 	sub	w0, w0, #5
 	and	w3, w0, 255
 	cmp	w3, 63
-	bhi	.L2124
+	bhi	.L2137
 	and	w19, w2, 65535
 	mov	x2, 16391
 	movk	x2, 0x4000, lsl 16
 	movk	x2, 0x8000, lsl 48
 	lsr	x0, x2, x3
-	tbz	x0, 0, .L2124
+	tbz	x0, 0, .L2137
 	adrp	x21, .LANCHOR145
 	mov	w23, w1
 	add	x21, x21, :lo12:.LANCHOR145
 	mov	w25, 65535
 	adrp	x24, .LANCHOR166
-.L2126:
+.L2139:
 	ldrh	w0, [x20, 10]
 	cmp	w0, w19
-	bhi	.L2127
-.L2124:
+	bhi	.L2140
+.L2137:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2127:
+.L2140:
 	ldrh	w0, [x21, w19, sxtw 1]
 	cmp	w0, w25
-	bne	.L2124
+	bne	.L2137
 	ldr	x0, [x24, #:lo12:.LANCHOR166]
 	mov	w2, 16384
 	mov	w1, 255
@@ -12835,7 +12938,7 @@ id_block_prog_msb_ff_data:
 	mov	w0, w22
 	and	w19, w19, 65535
 	bl	flash_prog_page
-	b	.L2126
+	b	.L2139
 	.size	id_block_prog_msb_ff_data, .-id_block_prog_msb_ff_data
 	.section	.text.flash_start_one_pass_page_prog,"ax",@progbits
 	.align	2
@@ -12852,12 +12955,12 @@ flash_start_one_pass_page_prog:
 	ldr	x19, [x0, #:lo12:.LANCHOR13]
 	mov	w0, w7
 	bl	nandc_cs
-	cbz	w8, .L2130
+	cbz	w8, .L2143
 	sxtw	x0, w7
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 8
 	str	w8, [x0, 8]
-.L2130:
+.L2143:
 	ubfiz	x0, x7, 8, 8
 	add	x19, x19, x0
 	mov	w0, 128
@@ -12872,10 +12975,10 @@ flash_start_one_pass_page_prog:
 	str	w0, [x19, 2052]
 	adrp	x0, .LANCHOR31
 	ldrb	w0, [x0, #:lo12:.LANCHOR31]
-	cbz	w0, .L2131
+	cbz	w0, .L2144
 	lsr	w0, w4, 24
 	str	w0, [x19, 2052]
-.L2131:
+.L2144:
 	mov	w0, w4
 	bl	nandc_set_seed
 	adrp	x0, .LANCHOR33+9
@@ -12924,20 +13027,20 @@ flash_dual_page_prog:
 	ldr	w0, [x27, #:lo12:.LANCHOR14]
 	sub	w19, w19, #1
 	and	w19, w19, w1
-	tbz	x0, 4, .L2140
+	tbz	x0, 4, .L2153
 	adrp	x0, .LC132
 	mov	w3, w6
 	mov	w2, w28
 	add	x0, x0, :lo12:.LC132
 	bl	printf
-.L2140:
+.L2153:
 	bl	nandc_wait_flash_ready
 	mov	w0, w20
 	bl	nandc_cs
 	mov	w0, w20
-	cbnz	w28, .L2141
+	cbnz	w28, .L2154
 	bl	zftl_flash_enter_slc_mode
-.L2142:
+.L2155:
 	mov	x6, x26
 	mov	x5, x25
 	mov	w4, w19
@@ -12959,18 +13062,18 @@ flash_dual_page_prog:
 	mov	x0, x22
 	bl	flash_read_status
 	mov	w3, w0
-	bl	nandc_de_cs.constprop.32
+	bl	nandc_de_cs.constprop.33
 	and	w2, w3, 4
-	tbz	x3, 2, .L2139
+	tbz	x3, 2, .L2152
 	ldr	w0, [x27, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2144
+	tbz	x0, 12, .L2157
 	adrp	x0, .LC133
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC133
 	bl	printf
-.L2144:
+.L2157:
 	mov	w2, -1
-.L2139:
+.L2152:
 	mov	w0, w2
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -12979,9 +13082,9 @@ flash_dual_page_prog:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2141:
+.L2154:
 	bl	zftl_flash_exit_slc_mode
-	b	.L2142
+	b	.L2155
 	.size	flash_dual_page_prog, .-flash_dual_page_prog
 	.section	.text.ymtc_flash_tlc_page_prog,"ax",@progbits
 	.align	2
@@ -13046,19 +13149,19 @@ ymtc_flash_tlc_page_prog:
 	mov	x0, x22
 	bl	flash_read_status
 	mov	w3, w0
-	bl	nandc_de_cs.constprop.32
+	bl	nandc_de_cs.constprop.33
 	and	w2, w3, 4
-	tbz	x3, 2, .L2152
+	tbz	x3, 2, .L2165
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2154
+	tbz	x0, 12, .L2167
 	adrp	x0, .LC134
 	mov	w1, w25
 	add	x0, x0, :lo12:.LC134
 	bl	printf
-.L2154:
+.L2167:
 	mov	w2, -1
-.L2152:
+.L2165:
 	mov	w0, w2
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -13067,10 +13170,10 @@ ymtc_flash_tlc_page_prog:
 	ldp	x29, x30, [sp], 80
 	ret
 	.size	ymtc_flash_tlc_page_prog, .-ymtc_flash_tlc_page_prog
-	.section	.text.fw_flash_page_prog.constprop.29,"ax",@progbits
+	.section	.text.fw_flash_page_prog.constprop.30,"ax",@progbits
 	.align	2
-	.type	fw_flash_page_prog.constprop.29, %function
-fw_flash_page_prog.constprop.29:
+	.type	fw_flash_page_prog.constprop.30, %function
+fw_flash_page_prog.constprop.30:
 	stp	x29, x30, [sp, -64]!
 	adrp	x4, .LANCHOR33
 	add	x4, x4, :lo12:.LANCHOR33
@@ -13089,19 +13192,19 @@ fw_flash_page_prog.constprop.29:
 	bl	nandc_bch_sel
 	ldrb	w0, [x4, 7]
 	cmp	w0, 9
-	bne	.L2160
+	bne	.L2173
 	adrp	x0, .LANCHOR19
 	ldrb	w0, [x0, #:lo12:.LANCHOR19]
-	cbnz	w0, .L2160
+	cbnz	w0, .L2173
 	ldrb	w0, [x4, 12]
 	cmp	w0, 3
-	bne	.L2161
+	bne	.L2174
 	mov	x3, x21
 	mov	x2, x20
 	mov	w1, w19
 	mov	w0, 0
 	bl	ymtc_flash_tlc_page_prog
-.L2164:
+.L2177:
 	mov	w4, w0
 	mov	w0, w23
 	bl	nandc_bch_sel
@@ -13111,7 +13214,7 @@ fw_flash_page_prog.constprop.29:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2161:
+.L2174:
 	adrp	x22, .LANCHOR166
 	mov	w2, 16384
 	mov	w1, 255
@@ -13125,16 +13228,16 @@ fw_flash_page_prog.constprop.29:
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_dual_page_prog
-	b	.L2164
-.L2160:
+	b	.L2177
+.L2173:
 	mov	w4, 4
 	mov	x3, x21
 	mov	x2, x20
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_prog_page
-	b	.L2164
-	.size	fw_flash_page_prog.constprop.29, .-fw_flash_page_prog.constprop.29
+	b	.L2177
+	.size	fw_flash_page_prog.constprop.30, .-fw_flash_page_prog.constprop.30
 	.section	.text.idb_write_data,"ax",@progbits
 	.align	2
 	.global	idb_write_data
@@ -13152,7 +13255,7 @@ idb_write_data:
 	stp	x25, x26, [sp, 64]
 	mov	x24, x2
 	stp	x27, x28, [sp, 80]
-	bne	.L2166
+	bne	.L2179
 	ldr	w0, [x2]
 	mov	w1, 35899
 	movk	w1, 0xfcdc, lsl 16
@@ -13160,69 +13263,69 @@ idb_write_data:
 	mov	w1, 19282
 	movk	w1, 0x534e, lsl 16
 	ccmp	w0, w1, 4, ne
-	beq	.L2167
+	beq	.L2180
 	add	w1, w1, 327680
 	cmp	w0, w1
-	bne	.L2166
-.L2167:
+	bne	.L2179
+.L2180:
 	adrp	x21, .LANCHOR141
 	mov	w1, 1
 	strb	w1, [x22, #:lo12:.LANCHOR143]
 	ldr	x0, [x21, #:lo12:.LANCHOR141]
-	cbnz	x0, .L2168
+	cbnz	x0, .L2181
 	mov	w0, 262144
 	bl	ftl_malloc
 	str	x0, [x21, #:lo12:.LANCHOR141]
-.L2168:
+.L2181:
 	adrp	x0, .LANCHOR177
 	mov	w1, 64
 	str	w1, [x0, #:lo12:.LANCHOR177]
-.L2166:
+.L2179:
 	ldrb	w0, [x22, #:lo12:.LANCHOR143]
-	cbz	w0, .L2234
+	cbz	w0, .L2247
 	adrp	x0, .LANCHOR141
 	mov	x23, x0
 	ldr	x21, [x0, #:lo12:.LANCHOR141]
-	cbz	x21, .L2234
+	cbz	x21, .L2247
 	add	w0, w19, w20
 	str	w0, [x29, 140]
 	cmp	w0, 63
-	bls	.L2170
+	bls	.L2183
 	cmp	w19, 575
-	bhi	.L2171
+	bhi	.L2184
 	adrp	x21, .LANCHOR144
 	ldr	x0, [x21, #:lo12:.LANCHOR144]
-	cbz	x0, .L2172
-.L2175:
+	cbz	x0, .L2185
+.L2188:
 	adrp	x1, .LANCHOR142
 	mov	w2, 1
 	ldr	x0, [x23, #:lo12:.LANCHOR141]
 	cmp	w19, 64
 	str	w2, [x1, #:lo12:.LANCHOR142]
-	bhi	.L2287
+	bhi	.L2300
 	mov	w4, 64
 	sub	w4, w4, w19
 	sub	w2, w20, w4
 	ubfiz	x4, x4, 9, 25
 	lsl	w2, w2, 9
 	add	x1, x24, x4
-.L2293:
+.L2306:
 	bl	ftl_memcpy
-.L2176:
+.L2189:
 	adrp	x0, .LANCHOR177
 	ldr	w0, [x0, #:lo12:.LANCHOR177]
 	cmp	w19, w0
-	beq	.L2230
+	beq	.L2243
 	strb	wzr, [x22, #:lo12:.LANCHOR143]
-	b	.L2230
-.L2172:
+	b	.L2243
+.L2185:
 	mov	w0, 262144
 	bl	ftl_malloc
 	str	x0, [x21, #:lo12:.LANCHOR144]
-	cbnz	x0, .L2175
+	cbnz	x0, .L2188
 	mov	w0, -1
-	b	.L2165
-.L2287:
+	b	.L2178
+.L2300:
 	mov	w2, 576
 	sub	w2, w2, w19
 	cmp	w20, w2
@@ -13232,14 +13335,14 @@ idb_write_data:
 	lsl	w2, w2, 9
 	mov	x1, x24
 	add	x0, x0, x3
-	b	.L2293
-.L2170:
+	b	.L2306
+.L2183:
 	cmp	w19, 575
-	bls	.L2176
-.L2171:
+	bls	.L2189
+.L2184:
 	adrp	x0, .LANCHOR142
 	ldr	w0, [x0, #:lo12:.LANCHOR142]
-	cbz	w0, .L2176
+	cbz	w0, .L2189
 	ldr	w0, [x21]
 	mov	w1, 35899
 	movk	w1, 0xfcdc, lsl 16
@@ -13247,11 +13350,11 @@ idb_write_data:
 	mov	w1, 19282
 	movk	w1, 0x534e, lsl 16
 	ccmp	w0, w1, 4, ne
-	beq	.L2177
+	beq	.L2190
 	add	w1, w1, 327680
 	cmp	w0, w1
-	bne	.L2178
-.L2177:
+	bne	.L2191
+.L2190:
 	adrp	x0, .LANCHOR0
 	mov	x10, x0
 	ldrb	w1, [x0, #:lo12:.LANCHOR0]
@@ -13261,13 +13364,13 @@ idb_write_data:
 	ldr	w0, [x29, 176]
 	ldrb	w2, [x1, #:lo12:.LANCHOR19]
 	str	w2, [x29, 204]
-	cbz	w0, .L2179
+	cbz	w0, .L2192
 	ldrh	w0, [x29, 176]
 	str	w0, [x29, 172]
 	uxtw	x0, w2
 	cmp	w0, 0
 	cset	w0, eq
-.L2290:
+.L2303:
 	adrp	x8, .LANCHOR33
 	add	x8, x8, :lo12:.LANCHOR33
 	str	w0, [x29, 200]
@@ -13291,20 +13394,20 @@ idb_write_data:
 	cmp	w20, 512
 	csel	w20, w20, w0, lt
 	mov	w0, 0
-.L2186:
+.L2199:
 	ldr	w5, [x1]
-	cbnz	w5, .L2182
-	cbnz	w0, .L2183
+	cbnz	w5, .L2195
+	cbnz	w0, .L2196
 	str	w4, [x1, 2048]
-.L2184:
+.L2197:
 	add	w0, w0, 1
 	sub	w2, w2, #1
 	cmp	w0, w3
 	sub	x1, x1, #4
 	csel	w0, w0, wzr, ls
 	cmp	w2, 4096
-	bne	.L2186
-.L2182:
+	bne	.L2199
+.L2195:
 	ldr	w1, [x21, w2, uxtw 2]
 	mov	w3, w20
 	adrp	x0, .LC135
@@ -13317,7 +13420,7 @@ idb_write_data:
 	adrp	x0, .LANCHOR52
 	add	x0, x0, :lo12:.LANCHOR52
 	str	x0, [x29, 184]
-.L2225:
+.L2238:
 	adrp	x23, .LANCHOR144
 	mov	w1, 0
 	mov	w2, 512
@@ -13330,24 +13433,24 @@ idb_write_data:
 	add	x0, x0, x1, uxtw
 	ldrb	w19, [x0, 32]
 	cmp	w19, 255
-	beq	.L2187
+	beq	.L2200
 	ldr	w0, [x29, 128]
 	mul	w19, w19, w0
 	ldr	w0, [x29, 200]
-	cbz	w0, .L2188
+	cbz	w0, .L2201
 	and	w0, w1, -3
 	adrp	x10, .LANCHOR0
 	cmp	w0, 1
 	adrp	x8, .LANCHOR19
-	beq	.L2189
+	beq	.L2202
 	ldr	w0, [x29, 200]
 	cmp	w0, 3
-	bne	.L2190
-.L2189:
+	bne	.L2203
+.L2202:
 	ldrb	w0, [x29, 172]
 	strb	w0, [x10, #:lo12:.LANCHOR0]
 	strb	w0, [x8, #:lo12:.LANCHOR19]
-.L2188:
+.L2201:
 	adrp	x22, .LANCHOR33
 	add	x27, x22, :lo12:.LANCHOR33
 	ldr	x0, [x29, 184]
@@ -13371,11 +13474,11 @@ idb_write_data:
 	lsl	w0, w0, 2
 	sdiv	w0, w0, w1
 	str	w0, [x29, 156]
-	bne	.L2240
+	bne	.L2253
 	adrp	x0, .LANCHOR28
 	ldrb	w0, [x0, #:lo12:.LANCHOR28]
 	cmp	w0, 9
-	bne	.L2240
+	bne	.L2253
 	ldr	x0, [x29, 160]
 	mov	w2, 1024
 	mov	w1, 0
@@ -13391,10 +13494,10 @@ idb_write_data:
 	strb	wzr, [x25, 16]
 	str	wzr, [x25, 12]
 	ldrb	w0, [x0, #:lo12:.LANCHOR19]
-	cbz	w0, .L2192
+	cbz	w0, .L2205
 	ldrb	w0, [x27, 29]
 	strb	w0, [x25, 16]
-.L2192:
+.L2205:
 	add	x1, x22, :lo12:.LANCHOR33
 	mov	w0, 4
 	strb	w0, [x25, 17]
@@ -13415,7 +13518,7 @@ idb_write_data:
 	str	w0, [x25, 8]
 	sub	w0, w20, #4
 	str	w0, [x29, 196]
-.L2191:
+.L2204:
 	adrp	x27, .LANCHOR3
 	mov	x23, x21
 	add	x27, x27, :lo12:.LANCHOR3
@@ -13423,10 +13526,10 @@ idb_write_data:
 	mov	w28, 0
 	add	x0, x0, :lo12:.LANCHOR19
 	str	x0, [x29, 144]
-.L2194:
+.L2207:
 	ldr	w0, [x29, 156]
 	cmp	w0, w28
-	bhi	.L2205
+	bhi	.L2218
 	ldr	x0, [x29, 160]
 	add	x22, x22, :lo12:.LANCHOR33
 	mov	w24, 4
@@ -13453,41 +13556,41 @@ idb_write_data:
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
 	str	x0, [x29, 112]
-.L2206:
+.L2219:
 	ldr	w0, [x29, 156]
 	cmp	w25, w0
-	bcc	.L2220
+	bcc	.L2233
 	ldr	x0, [x29, 184]
 	ldrb	w1, [x29, 136]
 	strb	w1, [x0]
 	ldr	w0, [x29, 200]
-	cbz	w0, .L2221
+	cbz	w0, .L2234
 	mov	w0, 0
 	bl	zftl_flash_exit_slc_mode
 	adrp	x0, .LANCHOR0
 	strb	wzr, [x0, #:lo12:.LANCHOR0]
 	adrp	x0, .LANCHOR19
 	strb	wzr, [x0, #:lo12:.LANCHOR19]
-.L2221:
+.L2234:
 	ldr	w0, [x29, 196]
 	mov	x2, 0
 	lsl	w1, w0, 7
 	adrp	x0, .LANCHOR144
 	ldr	x0, [x0, #:lo12:.LANCHOR144]
-.L2222:
+.L2235:
 	mov	w22, w2
 	cmp	w2, w1
-	bcc	.L2223
+	bcc	.L2236
 	ldr	w0, [x29, 180]
 	add	w0, w0, 1
 	str	w0, [x29, 180]
 	cmp	w0, 5
-	bls	.L2187
-	b	.L2232
-.L2179:
+	bls	.L2200
+	b	.L2245
+.L2192:
 	ldr	w0, [x29, 204]
 	cmp	w0, 3
-	beq	.L2236
+	beq	.L2249
 	cmp	w0, 2
 	mov	w0, 2
 	csel	w0, wzr, w0, ne
@@ -13496,27 +13599,27 @@ idb_write_data:
 	cmp	w0, 2
 	mov	w0, 3
 	csel	w0, wzr, w0, ne
-	b	.L2290
-.L2236:
+	b	.L2303
+.L2249:
 	ldr	w0, [x29, 204]
 	str	w0, [x29, 172]
 	mov	w0, 2
-	b	.L2290
-.L2183:
+	b	.L2303
+.L2196:
 	ldr	w5, [x21, w0, uxtw 2]
 	str	w5, [x1, 2048]
-	b	.L2184
-.L2190:
+	b	.L2197
+.L2203:
 	mov	w0, 0
 	bl	zftl_flash_exit_slc_mode
 	strb	wzr, [x10, #:lo12:.LANCHOR0]
 	strb	wzr, [x8, #:lo12:.LANCHOR19]
-	b	.L2188
-.L2240:
+	b	.L2201
+.L2253:
 	mov	x25, 0
 	str	w20, [x29, 196]
-	b	.L2191
-.L2205:
+	b	.L2204
+.L2218:
 	ldr	w0, [x29, 168]
 	adrp	x2, .LANCHOR19
 	add	w4, w0, w28
@@ -13524,73 +13627,73 @@ idb_write_data:
 	ubfx	x4, x4, 2, 16
 	add	w1, w4, 1
 	ldrh	w0, [x27, w1, sxtw 1]
-	cbz	w2, .L2196
+	cbz	w2, .L2209
 	adrp	x0, .LANCHOR1
 	ldrb	w7, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w1, 1
 	cmp	w7, 0
 	csel	w0, w0, w1, ne
-.L2196:
+.L2209:
 	adrp	x1, .LANCHOR28
 	ldrb	w1, [x1, #:lo12:.LANCHOR28]
 	cmp	w1, 9
-	bne	.L2198
-.L2291:
+	bne	.L2211
+.L2304:
 	str	w0, [x29, 208]
 	mov	w0, 61424
 	str	w0, [x29, 212]
 	ldrh	w0, [x27, w4, sxtw 1]
-	cbnz	w2, .L2200
+	cbnz	w2, .L2213
 	mov	w4, w0
-.L2201:
+.L2214:
 	mul	w0, w24, w4
-	cbnz	x25, .L2202
+	cbnz	x25, .L2215
 	str	w4, [x29, 152]
 	add	x2, x29, 208
 	mov	x1, x23
 	add	w0, w0, w26
-	bl	fw_flash_page_prog.constprop.29
+	bl	fw_flash_page_prog.constprop.30
 	ldr	x0, [x29, 144]
 	ldr	w4, [x29, 152]
 	ldrb	w0, [x0]
-	cbnz	w0, .L2203
+	cbnz	w0, .L2216
 	udiv	w1, w26, w24
 	add	w2, w4, 1
 	bl	id_block_prog_msb_ff_data
-.L2203:
+.L2216:
 	ldr	w0, [x29, 196]
 	add	x23, x23, 2048
 	add	w0, w0, 16
 	cmp	w28, w0
-	bcc	.L2204
+	bcc	.L2217
 	ldr	w0, [x29, 196]
 	add	w1, w0, 20
 	add	x0, x21, 2048
 	cmp	w28, w1
 	csel	x23, x0, x23, cc
-.L2204:
+.L2217:
 	add	w5, w28, 4
 	mov	x25, 0
 	and	w28, w5, 65535
-	b	.L2194
-.L2198:
+	b	.L2207
+.L2211:
 	sub	w0, w0, #1
 	lsl	w0, w0, 2
-	b	.L2291
-.L2200:
+	b	.L2304
+.L2213:
 	adrp	x0, .LANCHOR1
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w4, 1
 	cmp	w1, 0
 	csel	w4, w0, w4, ne
-	b	.L2201
-.L2202:
+	b	.L2214
+.L2215:
 	add	x2, x29, 208
 	mov	x1, x25
 	add	w0, w0, w26
-	bl	fw_flash_page_prog.constprop.29
-	b	.L2204
-.L2220:
+	bl	fw_flash_page_prog.constprop.30
+	b	.L2217
+.L2233:
 	ldr	w0, [x29, 160]
 	adrp	x1, .LANCHOR19
 	sub	w27, w24, w0
@@ -13602,9 +13705,9 @@ idb_write_data:
 	udiv	w22, w22, w24
 	and	w22, w22, 65535
 	ldrh	w0, [x0, w22, sxtw 1]
-	cbnz	w1, .L2207
+	cbnz	w1, .L2220
 	mov	w22, w0
-.L2208:
+.L2221:
 	adrp	x0, .LANCHOR17
 	ldr	w1, [x29, 152]
 	ldrb	w26, [x0, #:lo12:.LANCHOR17]
@@ -13623,7 +13726,7 @@ idb_write_data:
 	adrp	x0, .LANCHOR21
 	add	x0, x0, :lo12:.LANCHOR21
 	str	x0, [x29, 120]
-.L2209:
+.L2222:
 	mov	w4, w24
 	add	x3, x29, 208
 	mov	x2, x23
@@ -13632,33 +13735,33 @@ idb_write_data:
 	bl	flash_read_page
 	mov	w5, w0
 	cmn	w0, #1
-	bne	.L2210
+	bne	.L2223
 	ldr	x0, [x29, 184]
 	ldrb	w6, [x0]
-	cbnz	w6, .L2211
-.L2214:
+	cbnz	w6, .L2224
+.L2227:
 	adrp	x0, .LANCHOR174
 	ldr	x6, [x0, #:lo12:.LANCHOR174]
-	cbnz	x6, .L2212
-.L2213:
+	cbnz	x6, .L2225
+.L2226:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
-	cbz	w0, .L2210
+	cbz	w0, .L2223
 	mov	w4, w24
 	add	x3, x29, 208
 	mov	x2, x23
 	mov	w1, w22
 	mov	w0, 0
 	bl	flash_ddr_tuning_read
-	b	.L2292
-.L2207:
+	b	.L2305
+.L2220:
 	adrp	x0, .LANCHOR1
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w22, 1
 	cmp	w1, 0
 	csel	w22, w0, w22, ne
-	b	.L2208
-.L2211:
+	b	.L2221
+.L2224:
 	ldr	x0, [x29, 184]
 	mov	w1, w22
 	stp	w6, w5, [x29, 104]
@@ -13672,21 +13775,21 @@ idb_write_data:
 	ldr	x1, [x29, 184]
 	ldp	w6, w5, [x29, 104]
 	strb	w6, [x1]
-	beq	.L2214
-.L2292:
+	beq	.L2227
+.L2305:
 	mov	w5, w0
-.L2210:
+.L2223:
 	cmn	w5, #1
 	cset	w4, eq
 	cmp	w26, 16
 	cset	w0, ne
 	tst	w4, w0
-	beq	.L2216
+	beq	.L2229
 	mov	w0, 16
 	mov	w26, 16
 	bl	nandc_bch_sel
-	b	.L2209
-.L2212:
+	b	.L2222
+.L2225:
 	str	w5, [x29, 108]
 	mov	w4, w24
 	add	x3, x29, 208
@@ -13696,9 +13799,9 @@ idb_write_data:
 	blr	x6
 	cmn	w0, #1
 	ldr	w5, [x29, 108]
-	beq	.L2213
-	b	.L2292
-.L2216:
+	beq	.L2226
+	b	.L2305
+.L2229:
 	ldr	w0, [x29, 132]
 	bl	nandc_bch_sel
 	cmp	w4, 0
@@ -13706,33 +13809,33 @@ idb_write_data:
 	csinv	w28, w28, wzr, eq
 	cmp	w25, 0
 	ccmp	w19, w0, 0, eq
-	bne	.L2218
-	cbnz	w28, .L2218
+	bne	.L2231
+	cbnz	w28, .L2231
 	ldr	w1, [x23]
 	mov	w0, 18766
 	movk	w0, 0x464e, lsl 16
 	cmp	w1, w0
-	bne	.L2218
+	bne	.L2231
 	ldr	w0, [x29, 156]
 	ldrb	w24, [x23, 17]
 	add	w0, w0, w27
 	str	w0, [x29, 156]
-.L2219:
+.L2232:
 	add	w25, w27, w25
 	and	w25, w25, 65535
-	b	.L2206
-.L2218:
+	b	.L2219
+.L2231:
 	ubfiz	x0, x27, 9, 16
 	str	wzr, [x29, 160]
 	add	x23, x23, x0
-	b	.L2219
-.L2223:
+	b	.L2232
+.L2236:
 	ldr	w4, [x0, x2, lsl 2]
 	add	x2, x2, 1
 	add	x3, x21, x2, lsl 2
 	ldr	w3, [x3, -4]
 	cmp	w4, w3
-	beq	.L2222
+	beq	.L2235
 	mov	w2, 512
 	mov	w1, 0
 	bl	ftl_memset
@@ -13743,56 +13846,56 @@ idb_write_data:
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_erase_block
-.L2187:
+.L2200:
 	ldr	w0, [x29, 192]
 	add	w0, w0, 1
 	str	w0, [x29, 192]
 	cmp	w0, 4
-	bne	.L2225
-.L2232:
+	bne	.L2238
+.L2245:
 	mov	w0, 0
 	bl	zftl_flash_exit_slc_mode
 	adrp	x0, .LANCHOR0
 	ldrb	w1, [x29, 176]
 	strb	w1, [x0, #:lo12:.LANCHOR0]
 	ldr	w0, [x29, 200]
-	cbz	w0, .L2226
+	cbz	w0, .L2239
 	adrp	x0, .LANCHOR19
 	ldrb	w1, [x29, 204]
 	strb	w1, [x0, #:lo12:.LANCHOR19]
-.L2226:
+.L2239:
 	mov	w1, 2
 	adrp	x0, .LANCHOR34
 	strb	w1, [x0, #:lo12:.LANCHOR34]
 	mov	w0, 0
 	bl	zftl_flash_enter_slc_mode
 	ldr	w0, [x29, 180]
-	cbnz	w0, .L2178
+	cbnz	w0, .L2191
 	adrp	x0, .LC137
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC137
 	bl	printf
-.L2178:
+.L2191:
 	adrp	x0, .LANCHOR142
 	str	wzr, [x0, #:lo12:.LANCHOR142]
 	adrp	x0, .LANCHOR143
 	strb	wzr, [x0, #:lo12:.LANCHOR143]
 	adrp	x0, .LANCHOR141
 	ldr	x1, [x0, #:lo12:.LANCHOR141]
-	cbz	x1, .L2228
+	cbz	x1, .L2241
 	str	xzr, [x0, #:lo12:.LANCHOR141]
-.L2228:
+.L2241:
 	adrp	x0, .LANCHOR144
 	ldr	x1, [x0, #:lo12:.LANCHOR144]
-	cbz	x1, .L2230
+	cbz	x1, .L2243
 	str	xzr, [x0, #:lo12:.LANCHOR144]
-.L2230:
+.L2243:
 	adrp	x0, .LANCHOR177
 	ldr	w1, [x29, 140]
 	str	w1, [x0, #:lo12:.LANCHOR177]
-.L2234:
+.L2247:
 	mov	w0, 0
-.L2165:
+.L2178:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -13823,17 +13926,17 @@ flash_start_tlc_page_prog:
 	mov	x24, x6
 	cmp	w1, w26
 	mov	x19, x0
-	bhi	.L2295
+	bhi	.L2308
 	adrp	x1, .LANCHOR178
 	adrp	x0, .LC0
 	mov	w2, 859
 	add	x1, x1, :lo12:.LANCHOR178
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2295:
+.L2308:
 	ldrb	w0, [x19, #:lo12:.LANCHOR18]
 	cmp	w0, w26
-	bls	.L2294
+	bls	.L2307
 	adrp	x0, .LANCHOR30
 	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w5, [x0, w26, sxtw]
@@ -13841,12 +13944,12 @@ flash_start_tlc_page_prog:
 	ldr	x19, [x0, #:lo12:.LANCHOR13]
 	mov	w0, w5
 	bl	nandc_cs
-	cbz	w25, .L2297
+	cbz	w25, .L2310
 	sxtw	x0, w5
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 8
 	str	w25, [x0, 8]
-.L2297:
+.L2310:
 	ubfiz	x0, x5, 8, 8
 	add	x19, x19, x0
 	mov	w0, 128
@@ -13877,8 +13980,8 @@ flash_start_tlc_page_prog:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 80
-	b	nandc_de_cs.constprop.32
-.L2294:
+	b	nandc_de_cs.constprop.33
+.L2307:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -13914,7 +14017,7 @@ queue_tlc_prog_cmd:
 	lsr	w1, w1, w2
 	and	w19, w19, w1
 	and	w19, w19, 255
-	cbz	w0, .L2303
+	cbz	w0, .L2316
 	mov	w0, w19
 	bl	zftl_flash_exit_slc_mode
 	ldr	x0, [x21]
@@ -13946,8 +14049,8 @@ queue_tlc_prog_cmd:
 	ldr	x6, [x0, 24]
 	mov	w0, 0
 	bl	flash_start_one_pass_page_prog
-.L2304:
-	cbz	w23, .L2302
+.L2317:
+	cbz	w23, .L2315
 	ldr	x1, [x21]
 	mov	w0, 4
 	strb	w0, [x1, 58]
@@ -13962,7 +14065,7 @@ queue_tlc_prog_cmd:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	b	buf_add_tail
-.L2303:
+.L2316:
 	ldr	x5, [x7, 8]
 	mov	w4, w20
 	ldr	x6, [x7, 24]
@@ -13992,8 +14095,8 @@ queue_tlc_prog_cmd:
 	ldr	x6, [x0, 24]
 	ldrb	w0, [x7, 60]
 	bl	flash_start_tlc_page_prog
-	b	.L2304
-.L2302:
+	b	.L2317
+.L2315:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
@@ -14026,7 +14129,7 @@ sblk_3d_tlc_dump_prog:
 	lsr	w1, w1, w2
 	and	w19, w19, w1
 	and	w19, w19, 255
-	cbz	w0, .L2308
+	cbz	w0, .L2321
 	mov	w0, w19
 	bl	zftl_flash_exit_slc_mode
 	ldr	x5, [x20, 8]
@@ -14055,7 +14158,7 @@ sblk_3d_tlc_dump_prog:
 	mov	w1, w22
 	mov	w0, 0
 	bl	flash_start_one_pass_page_prog
-.L2309:
+.L2322:
 	bl	nandc_wait_flash_ready
 	ldr	w0, [x20, 40]
 	mov	w1, 64
@@ -14063,7 +14166,7 @@ sblk_3d_tlc_dump_prog:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	b	flash_wait_device_ready
-.L2308:
+.L2321:
 	ldr	x5, [x20, 8]
 	mov	w4, w21
 	ldr	x6, [x20, 24]
@@ -14090,7 +14193,7 @@ sblk_3d_tlc_dump_prog:
 	mov	w1, 3
 	mov	w0, 0
 	bl	flash_start_tlc_page_prog
-	b	.L2309
+	b	.L2322
 	.size	sblk_3d_tlc_dump_prog, .-sblk_3d_tlc_dump_prog
 	.section	.text.flash_start_3d_mlc_page_prog,"ax",@progbits
 	.align	2
@@ -14111,17 +14214,17 @@ flash_start_3d_mlc_page_prog:
 	mov	x23, x4
 	cmp	w1, w24
 	mov	x19, x0
-	bhi	.L2312
+	bhi	.L2325
 	adrp	x1, .LANCHOR179
 	adrp	x0, .LC0
 	mov	w2, 892
 	add	x1, x1, :lo12:.LANCHOR179
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2312:
+.L2325:
 	ldrb	w0, [x19, #:lo12:.LANCHOR18]
 	cmp	w0, w24
-	bls	.L2311
+	bls	.L2324
 	adrp	x0, .LANCHOR30
 	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w5, [x0, w24, sxtw]
@@ -14151,7 +14254,7 @@ flash_start_3d_mlc_page_prog:
 	mov	w0, w5
 	bl	nandc_xfer
 	str	w21, [x19, 2056]
-.L2311:
+.L2324:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -14186,14 +14289,14 @@ sblk_mlc_dump_prog:
 	bl	zftl_flash_exit_slc_mode
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2316
+	tbz	x0, 12, .L2329
 	ldr	w2, [x20, 40]
 	adrp	x0, .LC138
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC138
 	add	w3, w2, 1
 	bl	printf
-.L2316:
+.L2329:
 	ldr	x3, [x20, 8]
 	mov	w2, w21
 	ldr	x4, [x20, 24]
@@ -14212,7 +14315,7 @@ sblk_mlc_dump_prog:
 	mov	w1, 64
 	bl	flash_wait_device_ready
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.32
+	bl	nandc_de_cs.constprop.33
 	ldr	x21, [sp, 32]
 	mov	w0, w2
 	ldp	x19, x20, [sp, 16]
@@ -14248,17 +14351,17 @@ flash_start_page_prog:
 	mov	x22, x2
 	mov	x23, x3
 	cmp	w0, w20
-	bhi	.L2322
+	bhi	.L2335
 	adrp	x1, .LANCHOR180
 	adrp	x0, .LC0
 	mov	w2, 945
 	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2322:
+.L2335:
 	ldrb	w0, [x27, #:lo12:.LANCHOR18]
 	cmp	w0, w20
-	bls	.L2321
+	bls	.L2334
 	adrp	x0, .LANCHOR30
 	add	x0, x0, :lo12:.LANCHOR30
 	mov	w19, 1
@@ -14269,27 +14372,27 @@ flash_start_page_prog:
 	and	w19, w19, w24
 	ldr	x25, [x0, #:lo12:.LANCHOR13]
 	bl	nandc_rdy_status
-	cbnz	w0, .L2324
+	cbnz	w0, .L2337
 	ldrb	w0, [x27, #:lo12:.LANCHOR18]
 	cmp	w0, 1
-	bne	.L2325
+	bne	.L2338
 	bl	nandc_wait_flash_ready
-.L2324:
+.L2337:
 	mov	w0, w26
 	bl	hynix_reconfig_rr_para
 	mov	w0, w26
 	bl	nandc_cs
 	tst	x24, 50331648
-	bne	.L2326
+	bne	.L2339
 	mov	w0, w19
 	bl	slc_phy_page_address_calc
 	mov	w19, w0
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L2327
+	cbz	w0, .L2340
 	mov	w0, w26
 	bl	zftl_flash_enter_slc_mode
-.L2327:
+.L2340:
 	ubfiz	x20, x26, 8, 8
 	mov	w0, 128
 	add	x20, x25, x20
@@ -14304,10 +14407,10 @@ flash_start_page_prog:
 	str	w0, [x20, 2052]
 	adrp	x0, .LANCHOR31
 	ldrb	w0, [x0, #:lo12:.LANCHOR31]
-	cbz	w0, .L2328
+	cbz	w0, .L2341
 	lsr	w0, w19, 24
 	str	w0, [x20, 2052]
-.L2328:
+.L2341:
 	mov	w0, w19
 	bl	nandc_set_seed
 	adrp	x0, .LANCHOR33+9
@@ -14324,18 +14427,18 @@ flash_start_page_prog:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 96
-	b	nandc_de_cs.constprop.32
-.L2325:
+	b	nandc_de_cs.constprop.33
+.L2338:
 	mov	w2, 64
 	mov	w1, w19
 	mov	w0, w20
 	bl	flash_wait_device_ready_raw
-	b	.L2324
-.L2326:
+	b	.L2337
+.L2339:
 	mov	w0, w26
 	bl	zftl_flash_exit_slc_mode
-	b	.L2327
-.L2321:
+	b	.L2340
+.L2334:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -14361,7 +14464,7 @@ queue_prog_cmd:
 	ldr	w3, [x19, 40]
 	ldrb	w1, [x0, #:lo12:.LANCHOR60]
 	cmp	w1, 255
-	beq	.L2337
+	beq	.L2350
 	adrp	x2, .LANCHOR32
 	mov	w5, 24
 	adrp	x6, .LANCHOR56
@@ -14375,19 +14478,19 @@ queue_prog_cmd:
 	and	w2, w2, 65535
 	asr	w3, w3, w5
 	and	w3, w3, w2
-.L2339:
+.L2352:
 	add	x7, x6, x1, lsl 6
 	ldr	w4, [x7, 40]
 	lsr	w4, w4, w5
 	and	w4, w2, w4
 	cmp	w3, w4
-	bne	.L2338
+	bne	.L2351
 	ldrb	w4, [x7, 58]
 	cmp	w4, 7
-	bne	.L2338
+	bne	.L2351
 	mov	w1, 3
 	strb	w1, [x7, 58]
-.L2337:
+.L2350:
 	mov	w1, 3
 	strb	w1, [x19, 58]
 	mov	w1, 1
@@ -14399,12 +14502,12 @@ queue_prog_cmd:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	buf_add_tail
-.L2338:
+.L2351:
 	lsl	x1, x1, 6
 	ldrb	w1, [x8, x1]
 	cmp	w1, 255
-	bne	.L2339
-	b	.L2337
+	bne	.L2352
+	b	.L2350
 	.size	queue_prog_cmd, .-queue_prog_cmd
 	.section	.text.flash_complete_plane_page_read,"ax",@progbits
 	.align	2
@@ -14433,17 +14536,17 @@ flash_complete_plane_page_read:
 	mov	x23, x0
 	ldrb	w1, [x0, #:lo12:.LANCHOR18]
 	cmp	w1, w19
-	bhi	.L2346
+	bhi	.L2359
 	adrp	x1, .LANCHOR181
 	adrp	x0, .LC0
 	mov	w2, 1055
 	add	x1, x1, :lo12:.LANCHOR181
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2346:
+.L2359:
 	ldrb	w0, [x23, #:lo12:.LANCHOR18]
 	cmp	w0, w19
-	bls	.L2357
+	bls	.L2370
 	adrp	x2, .LANCHOR30
 	add	x2, x2, :lo12:.LANCHOR30
 	adrp	x0, .LANCHOR13
@@ -14456,11 +14559,11 @@ flash_complete_plane_page_read:
 	ubfx	x24, x24, 24, 2
 	mov	w0, w8
 	bl	nandc_cs
-	cbnz	w24, .L2348
+	cbnz	w24, .L2361
 	mov	w0, w4
 	bl	slc_phy_page_address_calc
 	mov	w4, w0
-.L2348:
+.L2361:
 	adrp	x0, .LANCHOR20+16
 	and	x1, x8, 255
 	and	w6, w4, 255
@@ -14470,10 +14573,10 @@ flash_complete_plane_page_read:
 	adrp	x2, .LANCHOR31
 	cmp	w0, 1
 	adrp	x0, .LANCHOR16
-	bne	.L2349
+	bne	.L2362
 	add	x1, x7, x1, lsl 8
 	mov	w7, 6
-.L2375:
+.L2388:
 	str	w7, [x1, 2056]
 	str	wzr, [x1, 2052]
 	str	wzr, [x1, 2052]
@@ -14481,27 +14584,27 @@ flash_complete_plane_page_read:
 	str	w5, [x1, 2052]
 	str	w3, [x1, 2052]
 	ldrb	w2, [x2, #:lo12:.LANCHOR31]
-	cbz	w2, .L2371
+	cbz	w2, .L2384
 	lsr	w2, w4, 24
 	str	w2, [x1, 2052]
-.L2371:
+.L2384:
 	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	mov	w2, 224
 	str	w2, [x1, 2056]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L2355
-	cbz	w24, .L2355
+	bne	.L2368
+	cbz	w24, .L2368
 	adrp	x0, .LANCHOR36
 	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbnz	w0, .L2355
+	cbnz	w0, .L2368
 	adrp	x0, .LANCHOR37
 	ldrb	w0, [x0, #:lo12:.LANCHOR37]
-	cbnz	w0, .L2355
+	cbnz	w0, .L2368
 	add	w4, w4, w4, lsl 1
 	sub	w0, w24, #1
 	add	w0, w4, w0
-.L2372:
+.L2385:
 	bl	nandc_set_seed
 	adrp	x0, .LANCHOR33+9
 	mov	x4, x21
@@ -14511,23 +14614,23 @@ flash_complete_plane_page_read:
 	mov	w0, w8
 	bl	nandc_xfer
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.32
+	bl	nandc_de_cs.constprop.33
 	mov	w0, w2
-.L2345:
+.L2358:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2349:
+.L2362:
 	ldr	x10, [x0, #:lo12:.LANCHOR16]
 	add	x1, x7, x1, lsl 8
 	ldrb	w10, [x10, 12]
 	cmp	w10, 3
-	bne	.L2352
+	bne	.L2365
 	mov	w7, 5
-	b	.L2375
-.L2352:
+	b	.L2388
+.L2365:
 	str	wzr, [x1, 2056]
 	str	wzr, [x1, 2052]
 	str	wzr, [x1, 2052]
@@ -14535,21 +14638,21 @@ flash_complete_plane_page_read:
 	ldrb	w2, [x2, #:lo12:.LANCHOR31]
 	str	w5, [x1, 2052]
 	str	w3, [x1, 2052]
-	cbz	w2, .L2354
+	cbz	w2, .L2367
 	lsr	w2, w4, 24
 	str	w2, [x1, 2052]
-.L2354:
+.L2367:
 	mov	w2, 5
 	str	w2, [x1, 2056]
 	str	wzr, [x1, 2052]
 	str	wzr, [x1, 2052]
-	b	.L2371
-.L2355:
+	b	.L2384
+.L2368:
 	mov	w0, w4
-	b	.L2372
-.L2357:
+	b	.L2385
+.L2370:
 	mov	w0, -1
-	b	.L2345
+	b	.L2358
 	.size	flash_complete_plane_page_read, .-flash_complete_plane_page_read
 	.section	.text.flash_complete_page_read,"ax",@progbits
 	.align	2
@@ -14583,14 +14686,14 @@ flash_complete_page_read:
 	and	w19, w19, w21
 	ubfx	x24, x21, 24, 2
 	cmp	w0, w20
-	bhi	.L2377
+	bhi	.L2390
 	adrp	x1, .LANCHOR182
 	adrp	x0, .LC0
 	mov	w2, 1212
 	add	x1, x1, :lo12:.LANCHOR182
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2377:
+.L2390:
 	adrp	x0, .LANCHOR30
 	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w25, [x0, w20, sxtw]
@@ -14598,11 +14701,11 @@ flash_complete_page_read:
 	ldr	x4, [x0, #:lo12:.LANCHOR13]
 	mov	w0, w25
 	bl	nandc_cs
-	cbnz	w24, .L2378
+	cbnz	w24, .L2391
 	mov	w0, w19
 	bl	slc_phy_page_address_calc
 	mov	w19, w0
-.L2378:
+.L2391:
 	ubfiz	x0, x25, 8, 8
 	mov	w1, 5
 	add	x0, x4, x0
@@ -14613,32 +14716,32 @@ flash_complete_page_read:
 	str	wzr, [x0, 2052]
 	ldrb	w1, [x1, 12]
 	cmp	w1, 3
-	bne	.L2379
+	bne	.L2392
 	and	w1, w19, 255
 	str	w1, [x0, 2052]
 	lsr	w1, w19, 8
 	str	w1, [x0, 2052]
 	lsr	w1, w19, 16
 	str	w1, [x0, 2052]
-.L2379:
+.L2392:
 	mov	w1, 224
 	str	w1, [x0, 2056]
 	adrp	x0, .LANCHOR16
 	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L2380
-	cbz	w24, .L2380
+	bne	.L2393
+	cbz	w24, .L2393
 	adrp	x0, .LANCHOR36
 	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbnz	w0, .L2380
+	cbnz	w0, .L2393
 	adrp	x0, .LANCHOR37
 	ldrb	w0, [x0, #:lo12:.LANCHOR37]
-	cbnz	w0, .L2380
+	cbnz	w0, .L2393
 	sub	w0, w24, #1
 	add	w1, w19, w19, lsl 1
 	add	w0, w0, w1
-.L2407:
+.L2420:
 	add	x28, x20, :lo12:.LANCHOR33
 	bl	nandc_set_seed
 	mov	x4, x23
@@ -14648,10 +14751,10 @@ flash_complete_page_read:
 	ldrb	w2, [x28, 9]
 	bl	nandc_xfer
 	cmn	w0, #1
-	bne	.L2382
+	bne	.L2395
 	adrp	x26, .LANCHOR52
 	ldrb	w27, [x26, #:lo12:.LANCHOR52]
-	cbz	w27, .L2383
+	cbz	w27, .L2396
 	ldrb	w4, [x28, 9]
 	mov	x3, x23
 	strb	wzr, [x26, #:lo12:.LANCHOR52]
@@ -14660,16 +14763,16 @@ flash_complete_page_read:
 	mov	w0, w25
 	bl	flash_read_page
 	strb	w27, [x26, #:lo12:.LANCHOR52]
-	cbnz	w24, .L2384
-.L2389:
+	cbnz	w24, .L2397
+.L2402:
 	adrp	x1, .LANCHOR0
 	ldrb	w1, [x1, #:lo12:.LANCHOR0]
-	cbz	w1, .L2384
+	cbz	w1, .L2397
 	adrp	x1, .LANCHOR50
 	ldrb	w1, [x1, #:lo12:.LANCHOR50]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	blt	.L2384
+	blt	.L2397
 	add	x20, x20, :lo12:.LANCHOR33
 	ldrb	w1, [x20, 19]
 	sub	w1, w1, #4
@@ -14677,7 +14780,7 @@ flash_complete_page_read:
 	cmp	w1, 4
 	mov	w1, 256
 	csel	w0, w0, w1, hi
-.L2376:
+.L2389:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -14685,17 +14788,17 @@ flash_complete_page_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2380:
+.L2393:
 	mov	w0, w19
-	b	.L2407
-.L2384:
+	b	.L2420
+.L2397:
 	cmn	w0, #1
-	bne	.L2376
-.L2390:
+	bne	.L2389
+.L2403:
 	adrp	x0, .LANCHOR174
 	ldr	x5, [x0, #:lo12:.LANCHOR174]
-	cbnz	x5, .L2386
-.L2388:
+	cbnz	x5, .L2399
+.L2401:
 	adrp	x0, .LANCHOR52
 	mov	w3, -1
 	mov	w2, w21
@@ -14706,10 +14809,10 @@ flash_complete_page_read:
 	bl	printf
 	adrp	x0, .LANCHOR21
 	ldrb	w0, [x0, #:lo12:.LANCHOR21]
-	cbnz	w0, .L2387
+	cbnz	w0, .L2400
 	mov	w0, -1
-	b	.L2376
-.L2386:
+	b	.L2389
+.L2399:
 	add	x0, x20, :lo12:.LANCHOR33
 	mov	x3, x23
 	mov	x2, x22
@@ -14718,9 +14821,9 @@ flash_complete_page_read:
 	mov	w0, w25
 	blr	x5
 	cmn	w0, #1
-	beq	.L2388
-	b	.L2376
-.L2387:
+	beq	.L2401
+	b	.L2389
+.L2400:
 	add	x20, x20, :lo12:.LANCHOR33
 	orr	w1, w19, w24, lsl 24
 	mov	x3, x23
@@ -14734,12 +14837,12 @@ flash_complete_page_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	flash_ddr_tuning_read
-.L2383:
-	cbz	w24, .L2389
-	b	.L2390
-.L2382:
-	cbnz	w24, .L2376
-	b	.L2389
+.L2396:
+	cbz	w24, .L2402
+	b	.L2403
+.L2395:
+	cbnz	w24, .L2389
+	b	.L2402
 	.size	flash_complete_page_read, .-flash_complete_page_read
 	.section	.text.queue_wait_first_req_completed,"ax",@progbits
 	.align	2
@@ -14755,11 +14858,11 @@ queue_wait_first_req_completed:
 	cmp	w0, 255
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	bne	.L2409
-.L2442:
+	bne	.L2422
+.L2455:
 	mov	w21, 0
-	b	.L2408
-.L2409:
+	b	.L2421
+.L2422:
 	adrp	x19, .LANCHOR56
 	sxtw	x20, w0
 	add	x1, x19, :lo12:.LANCHOR56
@@ -14768,45 +14871,45 @@ queue_wait_first_req_completed:
 	ldr	w21, [x1, 40]
 	sub	w3, w2, #1
 	cmp	w3, 10
-	bhi	.L2442
-	adrp	x1, .L2412
-	add	x1, x1, :lo12:.L2412
+	bhi	.L2455
+	adrp	x1, .L2425
+	add	x1, x1, :lo12:.L2425
 	ldrh	w1, [x1,w3,uxtw #1]
-	adr	x3, .Lrtx2412
+	adr	x3, .Lrtx2425
 	add	x1, x3, w1, sxth #2
 	br	x1
-.Lrtx2412:
+.Lrtx2425:
 	.section	.rodata.queue_wait_first_req_completed,"a",@progbits
 	.align	0
 	.align	2
-.L2412:
-	.2byte	(.L2411 - .Lrtx2412) / 4
-	.2byte	(.L2413 - .Lrtx2412) / 4
-	.2byte	(.L2414 - .Lrtx2412) / 4
-	.2byte	(.L2414 - .Lrtx2412) / 4
-	.2byte	(.L2414 - .Lrtx2412) / 4
-	.2byte	(.L2414 - .Lrtx2412) / 4
-	.2byte	(.L2415 - .Lrtx2412) / 4
-	.2byte	(.L2416 - .Lrtx2412) / 4
-	.2byte	(.L2417 - .Lrtx2412) / 4
-	.2byte	(.L2414 - .Lrtx2412) / 4
-	.2byte	(.L2417 - .Lrtx2412) / 4
+.L2425:
+	.2byte	(.L2424 - .Lrtx2425) / 4
+	.2byte	(.L2426 - .Lrtx2425) / 4
+	.2byte	(.L2427 - .Lrtx2425) / 4
+	.2byte	(.L2427 - .Lrtx2425) / 4
+	.2byte	(.L2427 - .Lrtx2425) / 4
+	.2byte	(.L2427 - .Lrtx2425) / 4
+	.2byte	(.L2428 - .Lrtx2425) / 4
+	.2byte	(.L2429 - .Lrtx2425) / 4
+	.2byte	(.L2430 - .Lrtx2425) / 4
+	.2byte	(.L2427 - .Lrtx2425) / 4
+	.2byte	(.L2430 - .Lrtx2425) / 4
 	.section	.text.queue_wait_first_req_completed
-.L2411:
+.L2424:
 	mov	w1, 64
 	mov	w0, w21
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L2442
+	tbz	x0, 6, .L2455
 	add	x0, x19, :lo12:.LANCHOR56
 	add	x0, x0, x20, lsl 6
 	ldp	x1, x2, [x0, 8]
-	cbz	x2, .L2419
+	cbz	x2, .L2432
 	ldrb	w3, [x0, 56]
 	adrp	x0, .LANCHOR131
 	ldrb	w0, [x0, #:lo12:.LANCHOR131]
 	cmp	w3, w0
 	csel	x1, x1, x2, ne
-.L2419:
+.L2432:
 	add	x19, x19, :lo12:.LANCHOR56
 	mov	w0, w21
 	add	x20, x19, x20, lsl 6
@@ -14818,12 +14921,12 @@ queue_wait_first_req_completed:
 	ldrb	w0, [x20, 2]
 	orr	w0, w0, 8
 	strb	w0, [x20, 2]
-	b	.L2442
-.L2413:
+	b	.L2455
+.L2426:
 	mov	w1, 64
 	mov	w0, w21
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L2442
+	tbz	x0, 6, .L2455
 	add	x0, x19, :lo12:.LANCHOR56
 	lsl	x2, x20, 6
 	add	x1, x0, x2
@@ -14831,23 +14934,23 @@ queue_wait_first_req_completed:
 	add	x0, x0, x21, lsl 6
 	ldr	x24, [x0, 8]
 	ldp	x26, x0, [x1, 8]
-	cbz	x0, .L2420
+	cbz	x0, .L2433
 	ldrb	w2, [x1, 56]
 	adrp	x1, .LANCHOR131
 	ldrb	w1, [x1, #:lo12:.LANCHOR131]
 	cmp	w2, w1
 	csel	x26, x26, x0, ne
-.L2420:
+.L2433:
 	add	x0, x19, :lo12:.LANCHOR56
 	add	x0, x0, x21, lsl 6
 	ldr	x1, [x0, 16]
-	cbz	x1, .L2421
+	cbz	x1, .L2434
 	ldrb	w2, [x0, 56]
 	adrp	x0, .LANCHOR131
 	ldrb	w0, [x0, #:lo12:.LANCHOR131]
 	cmp	w2, w0
 	csel	x24, x24, x1, ne
-.L2421:
+.L2434:
 	add	x22, x19, :lo12:.LANCHOR56
 	mov	x1, x26
 	add	x27, x22, x20, lsl 6
@@ -14862,15 +14965,15 @@ queue_wait_first_req_completed:
 	bl	flash_complete_plane_page_read
 	mov	w25, w0
 	cmn	w23, #1
-	beq	.L2422
+	beq	.L2435
 	ldr	w0, [x27, 36]
 	cmn	w0, #1
-	beq	.L2423
+	beq	.L2436
 	ldr	x1, [x27, 24]
 	ldr	w1, [x1, 4]
 	cmp	w0, w1
-	beq	.L2423
-.L2422:
+	beq	.L2436
+.L2435:
 	adrp	x0, .LANCHOR32
 	add	x22, x19, :lo12:.LANCHOR56
 	add	x22, x22, x20, lsl 6
@@ -14893,36 +14996,36 @@ queue_wait_first_req_completed:
 	mov	w23, w0
 	ldr	w2, [x22, 36]
 	cmn	w2, #1
-	beq	.L2424
+	beq	.L2437
 	ldr	x0, [x22, 24]
 	ldr	w4, [x0, 4]
 	cmp	w2, w4
-	beq	.L2424
+	beq	.L2437
 	adrp	x1, .LANCHOR14
 	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 6, .L2424
+	tbz	x1, 6, .L2437
 	ldr	w3, [x0]
 	adrp	x0, .LC140
 	ldr	w1, [x22, 40]
 	add	x0, x0, :lo12:.LC140
 	bl	printf
-.L2424:
+.L2437:
 	add	x0, x19, :lo12:.LANCHOR56
 	add	x0, x0, x20, lsl 6
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L2423
+	beq	.L2436
 	ldr	x0, [x0, 24]
 	ldr	w0, [x0, 4]
 	cmp	w1, w0
-	beq	.L2423
+	beq	.L2436
 	adrp	x1, .LANCHOR183
 	adrp	x0, .LC0
 	mov	w2, 430
 	add	x1, x1, :lo12:.LANCHOR183
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2423:
+.L2436:
 	add	x0, x19, :lo12:.LANCHOR56
 	mov	w1, 13
 	add	x20, x0, x20, lsl 6
@@ -14932,16 +15035,16 @@ queue_wait_first_req_completed:
 	str	w23, [x20, 52]
 	orr	w1, w1, 8
 	strb	w1, [x20, 2]
-	beq	.L2425
+	beq	.L2438
 	add	x0, x0, x21, lsl 6
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L2427
+	beq	.L2440
 	ldr	x0, [x0, 24]
 	ldr	w0, [x0, 4]
 	cmp	w1, w0
-	beq	.L2427
-.L2425:
+	beq	.L2440
+.L2438:
 	adrp	x0, .LANCHOR32
 	add	x20, x19, :lo12:.LANCHOR56
 	add	x20, x20, x21, lsl 6
@@ -14963,36 +15066,36 @@ queue_wait_first_req_completed:
 	bl	flash_read_page_en
 	ldr	w2, [x20, 36]
 	cmn	w2, #1
-	beq	.L2429
+	beq	.L2442
 	ldr	x0, [x20, 24]
 	ldr	w4, [x0, 4]
 	cmp	w2, w4
-	beq	.L2429
+	beq	.L2442
 	adrp	x1, .LANCHOR14
 	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 6, .L2429
+	tbz	x1, 6, .L2442
 	ldr	w3, [x0]
 	adrp	x0, .LC140
 	ldr	w1, [x20, 40]
 	add	x0, x0, :lo12:.LC140
 	bl	printf
-.L2429:
+.L2442:
 	add	x0, x19, :lo12:.LANCHOR56
 	add	x0, x0, x21, lsl 6
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L2427
+	beq	.L2440
 	ldr	x0, [x0, 24]
 	ldr	w0, [x0, 4]
 	cmp	w1, w0
-	beq	.L2427
+	beq	.L2440
 	adrp	x1, .LANCHOR183
 	adrp	x0, .LC0
 	mov	w2, 449
 	add	x1, x1, :lo12:.LANCHOR183
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2427:
+.L2440:
 	add	x19, x19, :lo12:.LANCHOR56
 	mov	w0, 13
 	add	x21, x19, x21, lsl 6
@@ -15001,16 +15104,16 @@ queue_wait_first_req_completed:
 	str	w23, [x21, 52]
 	orr	w0, w0, 8
 	strb	w0, [x21, 2]
-	b	.L2442
-.L2414:
+	b	.L2455
+.L2427:
 	mov	w0, w21
 	mov	w1, 64
 	bl	flash_wait_device_ready
 	mov	w21, w0
-	tbz	x21, 6, .L2442
+	tbz	x21, 6, .L2455
 	mov	w0, 5
 	tst	w21, w0
-	beq	.L2430
+	beq	.L2443
 	add	x19, x19, :lo12:.LANCHOR56
 	mov	w0, 12
 	add	x20, x19, x20, lsl 6
@@ -15022,11 +15125,11 @@ queue_wait_first_req_completed:
 	adrp	x0, .LC141
 	add	x0, x0, :lo12:.LC141
 	bl	printf
-.L2506:
+.L2519:
 	mov	w0, -1
 	str	w0, [x20, 52]
-	b	.L2408
-.L2430:
+	b	.L2421
+.L2443:
 	add	x21, x19, :lo12:.LANCHOR56
 	mov	w0, 13
 	add	x21, x21, x20, lsl 6
@@ -15038,9 +15141,9 @@ queue_wait_first_req_completed:
 	str	wzr, [x21, 52]
 	movk	w0, 0x444b, lsl 16
 	cmp	w1, w0
-	bne	.L2442
+	bne	.L2455
 	ldrh	w0, [x21, 50]
-	cbnz	w0, .L2442
+	cbnz	w0, .L2455
 	adrp	x0, .LANCHOR32
 	mov	w5, 1
 	adrp	x22, .LANCHOR175
@@ -15061,14 +15164,14 @@ queue_wait_first_req_completed:
 	and	w0, w0, w5
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L2431
+	beq	.L2444
 	ldr	x1, [x22, #:lo12:.LANCHOR175]
 	ldr	x2, [x21, 24]
 	ldr	w1, [x1]
 	ldr	w2, [x2]
 	cmp	w2, w1
-	beq	.L2442
-.L2431:
+	beq	.L2455
+.L2444:
 	add	x19, x19, :lo12:.LANCHOR56
 	adrp	x1, .LANCHOR52
 	add	x20, x19, x20, lsl 6
@@ -15081,8 +15184,8 @@ queue_wait_first_req_completed:
 	bl	printf
 	mov	w0, -1
 	str	w0, [x20, 52]
-	b	.L2442
-.L2417:
+	b	.L2455
+.L2430:
 	cmp	w2, 11
 	mov	w1, 3
 	mov	w5, 10
@@ -15101,36 +15204,36 @@ queue_wait_first_req_completed:
 	lsr	w3, w21, w4
 	and	w3, w3, w2
 	and	w3, w3, 65535
-.L2433:
+.L2446:
 	ldrb	w1, [x0]
 	cmp	w1, 255
-	bne	.L2440
+	bne	.L2453
 	mov	w21, -1
-	b	.L2408
-.L2440:
+	b	.L2421
+.L2453:
 	sxtw	x23, w1
 	ubfiz	x0, x1, 6, 8
 	add	x1, x22, x23, lsl 6
 	add	x0, x22, x0
 	ldrb	w6, [x1, 58]
 	cmp	w6, w5
-	bne	.L2433
+	bne	.L2446
 	ldr	w1, [x1, 40]
 	lsr	w1, w1, w4
 	and	w1, w1, w2
 	cmp	w3, w1
-	bne	.L2433
+	bne	.L2446
 	mov	w0, w21
 	mov	w1, 64
 	bl	flash_wait_device_ready
 	mov	w21, w0
-	tbnz	x21, 6, .L2435
-.L2505:
+	tbnz	x21, 6, .L2448
+.L2518:
 	mov	w21, 0
-	b	.L2436
-.L2435:
+	b	.L2449
+.L2448:
 	tst	x21, 15
-	beq	.L2437
+	beq	.L2450
 	add	x22, x22, x20, lsl 6
 	mov	w2, w0
 	mov	w4, 12
@@ -15143,7 +15246,7 @@ queue_wait_first_req_completed:
 	strb	w0, [x22, 58]
 	mov	w0, -1
 	str	w0, [x22, 52]
-.L2436:
+.L2449:
 	add	x1, x19, :lo12:.LANCHOR56
 	add	x20, x1, x20, lsl 6
 	add	x1, x1, x23, lsl 6
@@ -15151,7 +15254,7 @@ queue_wait_first_req_completed:
 	strb	w0, [x1, 58]
 	ldr	w0, [x20, 52]
 	str	w0, [x1, 52]
-.L2408:
+.L2421:
 	mov	w0, w21
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -15160,7 +15263,7 @@ queue_wait_first_req_completed:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2437:
+.L2450:
 	add	x21, x22, x20, lsl 6
 	mov	w0, 13
 	strb	w0, [x21, 58]
@@ -15171,9 +15274,9 @@ queue_wait_first_req_completed:
 	str	wzr, [x21, 52]
 	movk	w0, 0x444b, lsl 16
 	cmp	w1, w0
-	bne	.L2505
+	bne	.L2518
 	ldrh	w0, [x21, 50]
-	cbnz	w0, .L2505
+	cbnz	w0, .L2518
 	ldrb	w2, [x24, #:lo12:.LANCHOR32]
 	mov	w5, 1
 	mov	w0, 24
@@ -15193,14 +15296,14 @@ queue_wait_first_req_completed:
 	and	w0, w0, w5
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L2439
+	beq	.L2452
 	ldr	x1, [x22, #:lo12:.LANCHOR175]
 	ldr	x2, [x21, 24]
 	ldr	w1, [x1]
 	ldr	w2, [x2]
 	cmp	w2, w1
-	beq	.L2505
-.L2439:
+	beq	.L2518
+.L2452:
 	add	x21, x19, :lo12:.LANCHOR56
 	adrp	x1, .LANCHOR52
 	add	x21, x21, x20, lsl 6
@@ -15213,36 +15316,36 @@ queue_wait_first_req_completed:
 	bl	printf
 	mov	w0, -1
 	str	w0, [x21, 52]
-	b	.L2505
-.L2415:
+	b	.L2518
+.L2428:
 	mov	w0, w21
 	mov	w1, 32
 	bl	flash_wait_device_ready
 	mov	w21, w0
-	tbz	x21, 5, .L2442
+	tbz	x21, 5, .L2455
 	add	x19, x19, :lo12:.LANCHOR56
 	tst	x21, 15
 	add	x20, x19, x20, lsl 6
-	beq	.L2441
+	beq	.L2454
 	mov	w0, 12
 	strb	w0, [x20, 58]
-	b	.L2506
-.L2441:
+	b	.L2519
+.L2454:
 	mov	w0, 13
 	str	wzr, [x20, 52]
 	strb	w0, [x20, 58]
-	b	.L2442
-.L2416:
+	b	.L2455
+.L2429:
 	mov	w1, 64
 	mov	w0, w21
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L2442
+	tbz	x0, 6, .L2455
 	add	x19, x19, :lo12:.LANCHOR56
 	add	x19, x19, x20, lsl 6
 	str	w0, [x19, 52]
 	mov	w0, 7
 	strb	w0, [x19, 58]
-	b	.L2442
+	b	.L2455
 	.size	queue_wait_first_req_completed, .-queue_wait_first_req_completed
 	.section	.text.sblk_prog_page,"ax",@progbits
 	.align	2
@@ -15259,24 +15362,24 @@ sblk_prog_page:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbz	w0, .L2508
+	cbz	w0, .L2521
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2508
+	tbz	x0, 8, .L2521
 	ldr	w1, [x19, 40]
 	adrp	x0, .LC145
 	mov	w2, w20
 	add	x0, x0, :lo12:.LC145
 	bl	printf
-.L2508:
+.L2521:
 	adrp	x23, .LANCHOR45
 	adrp	x25, .LANCHOR32
 	add	x23, x23, :lo12:.LANCHOR45
 	add	x26, x25, :lo12:.LANCHOR32
 	mov	w21, 0
-.L2509:
-	cbnz	w20, .L2520
-.L2536:
+.L2522:
+	cbnz	w20, .L2533
+.L2549:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -15285,37 +15388,37 @@ sblk_prog_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2520:
+.L2533:
 	ldrb	w24, [x19]
 	ldr	w22, [x19, 40]
-.L2510:
+.L2523:
 	mov	w1, 1
 	mov	w0, w22
 	bl	queue_lun_state
-	cbnz	w0, .L2511
+	cbnz	w0, .L2524
 	cmp	w20, 1
-	beq	.L2512
+	beq	.L2525
 	ldrb	w0, [x23]
-	cbz	w0, .L2512
+	cbz	w0, .L2525
 	adrp	x0, .LANCHOR37
 	ldrb	w0, [x0, #:lo12:.LANCHOR37]
-	cbz	w0, .L2513
-.L2512:
+	cbz	w0, .L2526
+.L2525:
 	mov	x0, x19
 	bl	queue_prog_cmd
-.L2514:
+.L2527:
 	subs	w20, w20, #1
-	beq	.L2536
+	beq	.L2549
 	ubfiz	x24, x24, 6, 8
 	adrp	x19, .LANCHOR56
 	add	x19, x19, :lo12:.LANCHOR56
 	add	x19, x19, x24
-	b	.L2509
-.L2511:
+	b	.L2522
+.L2524:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2510
-.L2513:
+	b	.L2523
+.L2526:
 	ldrb	w1, [x25, #:lo12:.LANCHOR32]
 	mov	w27, 24
 	mov	w0, 1
@@ -15327,14 +15430,14 @@ sblk_prog_page:
 	ldrb	w0, [x19]
 	and	w27, w27, 65535
 	cmp	w0, 255
-	bne	.L2515
+	bne	.L2528
 	adrp	x1, .LANCHOR184
 	adrp	x0, .LC0
 	mov	w2, 696
 	add	x1, x1, :lo12:.LANCHOR184
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2515:
+.L2528:
 	ldrb	w0, [x19]
 	adrp	x1, .LANCHOR56
 	add	x1, x1, :lo12:.LANCHOR56
@@ -15349,7 +15452,7 @@ sblk_prog_page:
 	lsr	w1, w4, w3
 	and	w0, w0, w1
 	cmp	w27, w0, uxth
-	bne	.L2516
+	bne	.L2529
 	adrp	x0, .LANCHOR75
 	ldrh	w2, [x0, #:lo12:.LANCHOR75]
 	adrp	x0, .LANCHOR76
@@ -15371,9 +15474,9 @@ sblk_prog_page:
 	cmp	w5, w0
 	and	w1, w1, w4
 	ccmp	w22, w1, 0, ne
-	bne	.L2516
+	bne	.L2529
 	cmp	w21, w3
-	beq	.L2516
+	beq	.L2529
 	ldr	w1, [x19, 40]
 	mov	w0, 17
 	ldr	x2, [x19, 8]
@@ -15389,12 +15492,12 @@ sblk_prog_page:
 	adrp	x0, .LANCHOR60
 	add	x0, x0, :lo12:.LANCHOR60
 	bl	buf_add_tail
-	b	.L2514
-.L2516:
+	b	.L2527
+.L2529:
 	mov	x0, x19
 	mov	w21, 0
 	bl	queue_prog_cmd
-	b	.L2514
+	b	.L2527
 	.size	sblk_prog_page, .-sblk_prog_page
 	.section	.text.sblk_wait_write_queue_completed,"ax",@progbits
 	.align	2
@@ -15406,17 +15509,17 @@ sblk_wait_write_queue_completed:
 	str	x19, [sp, 16]
 	adrp	x19, .LANCHOR60
 	add	x19, x19, :lo12:.LANCHOR60
-.L2539:
+.L2552:
 	ldrb	w0, [x19]
 	cmp	w0, 255
-	bne	.L2540
+	bne	.L2553
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2540:
+.L2553:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2539
+	b	.L2552
 	.size	sblk_wait_write_queue_completed, .-sblk_wait_write_queue_completed
 	.section	.text.ftl_flush,"ax",@progbits
 	.align	2
@@ -15430,13 +15533,13 @@ ftl_flush:
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
 	adrp	x20, .LANCHOR185
-	cbz	w1, .L2543
+	cbz	w1, .L2556
 	ldrb	w2, [x20, #:lo12:.LANCHOR185]
 	adrp	x0, .LANCHOR56
 	add	x0, x0, :lo12:.LANCHOR56
 	add	x0, x0, x2, lsl 6
 	bl	sblk_prog_page
-.L2543:
+.L2556:
 	mov	w0, -1
 	strb	wzr, [x19, #:lo12:.LANCHOR129]
 	strb	w0, [x20, #:lo12:.LANCHOR185]
@@ -15530,13 +15633,13 @@ sblk_read_page:
 	adrp	x25, .LANCHOR186
 	add	x28, x27, :lo12:.LANCHOR32
 	add	x25, x25, :lo12:.LANCHOR186
-.L2553:
-	cbnz	w21, .L2563
-.L2576:
+.L2566:
+	cbnz	w21, .L2576
+.L2589:
 	adrp	x19, .LANCHOR56
 	add	x19, x19, :lo12:.LANCHOR56
-.L2564:
-	cbnz	w22, .L2566
+.L2577:
+	cbnz	w22, .L2579
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -15545,27 +15648,27 @@ sblk_read_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2563:
+.L2576:
 	ldrb	w24, [x19]
 	ldr	w26, [x19, 40]
-.L2554:
+.L2567:
 	mov	w1, 0
 	mov	w0, w26
 	bl	queue_lun_state
-	cbnz	w0, .L2555
+	cbnz	w0, .L2568
 	cmp	w21, 1
-	beq	.L2560
+	beq	.L2573
 	ldrb	w0, [x25]
-	cbnz	w0, .L2557
-.L2560:
+	cbnz	w0, .L2570
+.L2573:
 	mov	x0, x19
 	bl	queue_read_cmd
-	b	.L2558
-.L2555:
+	b	.L2571
+.L2568:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2554
-.L2557:
+	b	.L2567
+.L2570:
 	ldrb	w1, [x27, #:lo12:.LANCHOR32]
 	mov	w20, 24
 	mov	w0, 1
@@ -15577,14 +15680,14 @@ sblk_read_page:
 	ldrb	w0, [x19]
 	and	w20, w20, 65535
 	cmp	w0, 255
-	bne	.L2559
+	bne	.L2572
 	adrp	x1, .LANCHOR187
 	adrp	x0, .LC0
 	mov	w2, 781
 	add	x1, x1, :lo12:.LANCHOR187
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2559:
+.L2572:
 	ldrb	w4, [x19]
 	adrp	x2, .LANCHOR56
 	add	x2, x2, :lo12:.LANCHOR56
@@ -15600,12 +15703,12 @@ sblk_read_page:
 	lsr	w0, w1, w0
 	and	w0, w0, w3
 	cmp	w20, w0, uxth
-	bne	.L2560
+	bne	.L2573
 	adrp	x0, .LANCHOR111
 	ldrh	w0, [x0, #:lo12:.LANCHOR111]
 	add	w26, w0, w26
 	cmp	w1, w26
-	bne	.L2560
+	bne	.L2573
 	ldr	w0, [x19, 40]
 	mov	w26, -1
 	ldrb	w24, [x2, x5]
@@ -15634,28 +15737,28 @@ sblk_read_page:
 	ubfiz	x1, x4, 6, 8
 	add	x1, x2, x1
 	bl	buf_add_tail
-.L2558:
+.L2571:
 	subs	w21, w21, #1
-	beq	.L2576
+	beq	.L2589
 	ubfiz	x24, x24, 6, 8
 	adrp	x19, .LANCHOR56
 	add	x19, x19, :lo12:.LANCHOR56
 	add	x19, x19, x24
-	b	.L2553
-.L2566:
+	b	.L2566
+.L2579:
 	ldrb	w0, [x23, 58]
 	cmp	w0, 13
-	bne	.L2565
+	bne	.L2578
 	ldrb	w0, [x23]
 	sub	w22, w22, #1
 	cmp	w0, 255
-	beq	.L2565
+	beq	.L2578
 	ubfiz	x23, x0, 6, 8
 	add	x23, x19, x23
-.L2565:
+.L2578:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2564
+	b	.L2577
 	.size	sblk_read_page, .-sblk_read_page
 	.section	.text.gc_check_data_one_wl,"ax",@progbits
 	.align	2
@@ -15675,59 +15778,59 @@ gc_check_data_one_wl:
 	ldr	x0, [x22, 8]
 	stp	x27, x28, [sp, 96]
 	ldr	x21, [x20, #:lo12:.LANCHOR10]
-	cbnz	x0, .L2579
+	cbnz	x0, .L2592
 	mov	w0, 1
 	bl	buf_alloc
 	str	x0, [x22, 8]
-.L2579:
+.L2592:
 	add	x0, x19, :lo12:.LANCHOR71
 	ldr	x22, [x0, 8]
-	cbnz	x22, .L2580
+	cbnz	x22, .L2593
 	adrp	x1, .LANCHOR188
 	adrp	x0, .LC0
 	mov	w2, 729
 	add	x1, x1, :lo12:.LANCHOR188
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2580:
+.L2593:
 	adrp	x27, .LANCHOR111
 	adrp	x28, .LANCHOR79
 	add	x26, x21, 96
 	add	x27, x27, :lo12:.LANCHOR111
 	add	x28, x28, :lo12:.LANCHOR79
 	mov	w25, 0
-.L2581:
+.L2594:
 	ldrb	w0, [x21, 89]
 	cmp	w25, w0
-	bge	.L2592
+	bge	.L2605
 	mov	w24, 1
 	add	x23, x19, :lo12:.LANCHOR71
-	b	.L2593
-.L2591:
+	b	.L2606
+.L2604:
 	ldrh	w0, [x26]
 	ldrh	w2, [x27]
 	ldrb	w1, [x28]
 	cmp	w1, 2
 	mul	w2, w0, w2
-	beq	.L2582
+	beq	.L2595
 	adrp	x0, .LANCHOR36
 	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbz	w0, .L2583
-.L2582:
+	cbz	w0, .L2596
+.L2595:
 	ldrh	w0, [x23, 16]
 	sub	w3, w0, #1
 	add	w0, w24, w2
 	add	w0, w3, w0
 	orr	w1, w0, w1, lsl 24
 	str	w1, [x22, 40]
-.L2584:
+.L2597:
 	mov	w1, 1
 	mov	x0, x22
 	bl	sblk_read_page
 	ldr	w2, [x22, 52]
 	adrp	x1, .LANCHOR162
 	cmn	w2, #1
-	beq	.L2587
+	beq	.L2600
 	ldrh	w0, [x23, 22]
 	ldr	x4, [x1, #:lo12:.LANCHOR162]
 	ldr	x3, [x22, 24]
@@ -15735,23 +15838,23 @@ gc_check_data_one_wl:
 	ldr	w5, [x4, x0]
 	ldr	w4, [x3, 4]
 	cmp	w5, w4
-	bne	.L2587
+	bne	.L2600
 	adrp	x4, .LANCHOR163
 	ldr	x4, [x4, #:lo12:.LANCHOR163]
 	ldr	w4, [x4, x0]
 	ldr	w0, [x3, 8]
 	cmp	w4, w0
-	beq	.L2588
-.L2587:
+	beq	.L2601
+.L2600:
 	ldrh	w0, [x23, 22]
 	ldr	x1, [x1, #:lo12:.LANCHOR162]
 	lsl	x0, x0, 2
 	ldr	w3, [x1, x0]
 	cmn	w3, #1
-	beq	.L2588
+	beq	.L2601
 	adrp	x1, .LANCHOR14
 	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 10, .L2589
+	tbz	x1, 10, .L2602
 	ldr	x1, [x22, 24]
 	adrp	x4, .LANCHOR163
 	ldr	x4, [x4, #:lo12:.LANCHOR163]
@@ -15764,7 +15867,7 @@ gc_check_data_one_wl:
 	ldr	w7, [x1, 8]
 	ldr	w1, [x22, 40]
 	bl	printf
-.L2589:
+.L2602:
 	adrp	x0, .LANCHOR124
 	ldrh	w1, [x21, 80]
 	ldrb	w2, [x0, #:lo12:.LANCHOR124]
@@ -15781,16 +15884,16 @@ gc_check_data_one_wl:
 	mov	w0, 20041
 	movk	w0, 0x444b, lsl 16
 	cmp	w1, w0
-	bne	.L2596
-	cbnz	w2, .L2596
+	bne	.L2609
+	cbnz	w2, .L2609
 	adrp	x0, .LANCHOR81
 	ldrb	w0, [x0, #:lo12:.LANCHOR81]
-	cbnz	w0, .L2596
+	cbnz	w0, .L2609
 	ldr	w0, [x22, 40]
 	bl	ftl_mask_bad_block
-.L2596:
+.L2609:
 	mov	w0, -1
-.L2578:
+.L2591:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -15799,54 +15902,54 @@ gc_check_data_one_wl:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 112
 	ret
-.L2583:
+.L2596:
 	cmp	w1, 3
 	ldrh	w0, [x23, 16]
-	bne	.L2585
+	bne	.L2598
 	adrp	x1, .LANCHOR37
 	ldrb	w1, [x1, #:lo12:.LANCHOR37]
-	cbz	w1, .L2586
+	cbz	w1, .L2599
 	add	w0, w0, w0, lsl 1
 	sub	w1, w0, #1
 	add	w0, w24, w2
 	add	w0, w1, w0
 	orr	w0, w0, 50331648
-.L2611:
+.L2624:
 	str	w0, [x22, 40]
-	b	.L2584
-.L2586:
+	b	.L2597
+.L2599:
 	add	w0, w0, w2
 	orr	w0, w0, w24, lsl 24
-	b	.L2611
-.L2585:
+	b	.L2624
+.L2598:
 	add	w0, w0, w2
-	b	.L2611
-.L2588:
+	b	.L2624
+.L2601:
 	ldrh	w0, [x23, 22]
 	add	w24, w24, 1
 	add	w0, w0, 1
 	strh	w0, [x23, 22]
-.L2593:
+.L2606:
 	ldrh	w0, [x23, 20]
 	cmp	w24, w0
-	ble	.L2591
+	ble	.L2604
 	add	w25, w25, 1
 	add	x26, x26, 2
-	b	.L2581
-.L2592:
+	b	.L2594
+.L2605:
 	add	x19, x19, :lo12:.LANCHOR71
 	ldrh	w0, [x19, 16]
 	add	w1, w0, 1
 	strh	w1, [x19, 16]
 	adrp	x1, .LANCHOR81
 	ldrb	w1, [x1, #:lo12:.LANCHOR81]
-	cbz	w1, .L2597
+	cbz	w1, .L2610
 	add	w0, w0, 2
 	strh	w0, [x19, 16]
-.L2597:
-.L2590:
+.L2610:
+.L2603:
 	mov	w0, 0
-	b	.L2578
+	b	.L2591
 	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
 	.section	.text.sblk_tlc_prog_one_page,"ax",@progbits
 	.align	2
@@ -15859,11 +15962,11 @@ sblk_tlc_prog_one_page:
 	mov	x19, x0
 	ldr	x0, [x0]
 	ldr	w20, [x0, 40]
-.L2613:
+.L2626:
 	mov	w1, 1
 	mov	w0, w20
 	bl	queue_lun_state
-	cbnz	w0, .L2614
+	cbnz	w0, .L2627
 	mov	x0, x19
 	mov	w1, 1
 	bl	queue_tlc_prog_cmd
@@ -15871,10 +15974,10 @@ sblk_tlc_prog_one_page:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2614:
+.L2627:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2613
+	b	.L2626
 	.size	sblk_tlc_prog_one_page, .-sblk_tlc_prog_one_page
 	.section	.text.sblk_xlc_prog_pages,"ax",@progbits
 	.align	2
@@ -15892,17 +15995,17 @@ sblk_xlc_prog_pages:
 	mov	w24, w2
 	ldr	w19, [x0, 40]
 	str	x25, [sp, 64]
-.L2617:
+.L2630:
 	mov	w1, 1
 	mov	w0, w19
 	bl	queue_lun_state
-	cbnz	w0, .L2618
+	cbnz	w0, .L2631
 	cmp	w24, 2
-	bne	.L2619
+	bne	.L2632
 	adrp	x0, .LANCHOR45
 	ldr	x3, [x22]
 	ldrb	w0, [x0, #:lo12:.LANCHOR45]
-	cbz	w0, .L2620
+	cbz	w0, .L2633
 	adrp	x0, .LANCHOR32
 	ldr	x7, [x20]
 	mov	w25, 1
@@ -15922,7 +16025,7 @@ sblk_xlc_prog_pages:
 	and	w19, w19, w1
 	and	w21, w21, w3
 	and	w19, w19, 255
-	cbz	w0, .L2621
+	cbz	w0, .L2634
 	mov	w0, w19
 	bl	zftl_flash_exit_slc_mode
 	ldr	x0, [x20]
@@ -15984,7 +16087,7 @@ sblk_xlc_prog_pages:
 	ldr	x6, [x0, 24]
 	mov	w0, 0
 	bl	flash_start_one_pass_page_prog
-.L2622:
+.L2635:
 	ldr	x1, [x20]
 	mov	w0, 5
 	strb	w0, [x1, 58]
@@ -15995,7 +16098,7 @@ sblk_xlc_prog_pages:
 	adrp	x0, .LANCHOR60
 	add	x0, x0, :lo12:.LANCHOR60
 	bl	buf_add_tail
-.L2623:
+.L2636:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -16003,11 +16106,11 @@ sblk_xlc_prog_pages:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2618:
+.L2631:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2617
-.L2621:
+	b	.L2630
+.L2634:
 	ldr	x5, [x7, 8]
 	mov	w4, w23
 	ldr	x6, [x7, 24]
@@ -16070,37 +16173,37 @@ sblk_xlc_prog_pages:
 	ldr	x6, [x0, 24]
 	ldrb	w0, [x7, 60]
 	bl	flash_start_tlc_page_prog
-	b	.L2622
-.L2620:
+	b	.L2635
+.L2633:
 	ldr	w19, [x3, 40]
-.L2624:
+.L2637:
 	mov	w1, 1
 	mov	w0, w19
 	bl	queue_lun_state
-	cbnz	w0, .L2625
+	cbnz	w0, .L2638
 	mov	w1, 1
 	mov	x0, x20
 	bl	queue_tlc_prog_cmd
 	mov	w1, 0
 	mov	x0, x22
 	bl	queue_tlc_prog_cmd
-.L2626:
+.L2639:
 	mov	w1, 1
 	mov	w0, w19
 	bl	queue_lun_state
-	cbz	w0, .L2623
+	cbz	w0, .L2636
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2626
-.L2625:
+	b	.L2639
+.L2638:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2624
-.L2619:
+	b	.L2637
+.L2632:
 	mov	w1, 1
 	mov	x0, x20
 	bl	queue_tlc_prog_cmd
-	b	.L2623
+	b	.L2636
 	.size	sblk_xlc_prog_pages, .-sblk_xlc_prog_pages
 	.section	.text.sblk_3d_mlc_prog_pages,"ax",@progbits
 	.align	2
@@ -16122,9 +16225,9 @@ sblk_3d_mlc_prog_pages:
 	add	x25, x0, 8
 	stp	x19, x20, [sp, 16]
 	mov	w22, 1
-.L2630:
+.L2643:
 	cmp	x21, x25
-	bne	.L2633
+	bne	.L2646
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -16132,14 +16235,14 @@ sblk_3d_mlc_prog_pages:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2633:
+.L2646:
 	ldr	x0, [x25, -8]
 	ldr	w19, [x0, 40]
-.L2631:
+.L2644:
 	mov	w1, 1
 	mov	w0, w19
 	bl	queue_lun_state
-	cbnz	w0, .L2632
+	cbnz	w0, .L2645
 	ldr	x0, [x25, -8]
 	mov	w2, 24
 	ldrb	w1, [x23]
@@ -16171,7 +16274,7 @@ sblk_3d_mlc_prog_pages:
 	ldr	x4, [x0, 24]
 	mov	w0, 16
 	bl	flash_start_3d_mlc_page_prog
-	bl	nandc_de_cs.constprop.32
+	bl	nandc_de_cs.constprop.33
 	ldr	x1, [x25, -24]
 	mov	w0, 4
 	strb	w22, [x1, 59]
@@ -16180,11 +16283,11 @@ sblk_3d_mlc_prog_pages:
 	strb	w0, [x1]
 	mov	x0, x24
 	bl	buf_add_tail
-	b	.L2630
-.L2632:
+	b	.L2643
+.L2645:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2631
+	b	.L2644
 	.size	sblk_3d_mlc_prog_pages, .-sblk_3d_mlc_prog_pages
 	.section	.text.flash_prog_page_en,"ax",@progbits
 	.align	2
@@ -16210,51 +16313,51 @@ flash_prog_page_en:
 	ubfx	x24, x20, 24, 2
 	cmp	w1, w21
 	mov	x19, x0
-	bhi	.L2636
+	bhi	.L2649
 	adrp	x1, .LANCHOR189
 	adrp	x0, .LC0
 	mov	w2, 635
 	add	x1, x1, :lo12:.LANCHOR189
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2636:
+.L2649:
 	ldrb	w0, [x19, #:lo12:.LANCHOR18]
 	cmp	w0, w21
-	bls	.L2647
+	bls	.L2660
 	adrp	x0, .LANCHOR30
 	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w27, [x0, w21, sxtw]
-	cbnz	w24, .L2649
+	cbnz	w24, .L2662
 	adrp	x0, .LANCHOR0
 	ldrb	w1, [x0, #:lo12:.LANCHOR0]
 	adrp	x0, .LANCHOR1
-	cbz	w1, .L2639
+	cbz	w1, .L2652
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
-	cbz	w1, .L2649
-.L2639:
+	cbz	w1, .L2662
+.L2652:
 	adrp	x1, .LANCHOR2
 	ldrb	w0, [x0, #:lo12:.LANCHOR1]
 	ldrh	w1, [x1, #:lo12:.LANCHOR2]
 	udiv	w19, w20, w1
 	mul	w19, w19, w1
 	sub	w1, w20, w19
-	cbz	w0, .L2640
+	cbz	w0, .L2653
 	add	w19, w19, w1, lsl 1
-.L2638:
+.L2651:
 	adrp	x24, .LANCHOR14
 	adrp	x25, .LC147
 	add	x24, x24, :lo12:.LANCHOR14
 	add	x25, x25, :lo12:.LC147
 	adrp	x26, .LANCHOR175
-.L2644:
+.L2657:
 	ldr	w0, [x24]
-	tbz	x0, 4, .L2641
+	tbz	x0, 4, .L2654
 	mov	w3, w19
 	mov	w2, w20
 	mov	w1, w27
 	mov	x0, x25
 	bl	printf
-.L2641:
+.L2654:
 	mov	w4, w28
 	mov	x3, x22
 	mov	x2, x23
@@ -16263,7 +16366,7 @@ flash_prog_page_en:
 	bl	flash_prog_page
 	mov	w5, w0
 	ldr	w0, [x29, 124]
-	cbz	w0, .L2642
+	cbz	w0, .L2655
 	adrp	x6, .LANCHOR176
 	ldr	x3, [x26, #:lo12:.LANCHOR175]
 	mov	w4, w28
@@ -16278,19 +16381,19 @@ flash_prog_page_en:
 	mov	w4, w0
 	ccmn	w0, #1, 4, ne
 	mov	x7, x6
-	beq	.L2643
+	beq	.L2656
 	ldr	x0, [x6, #:lo12:.LANCHOR176]
 	ldr	w1, [x23]
 	ldr	w5, [x29, 104]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	bne	.L2643
+	bne	.L2656
 	ldr	x0, [x26, #:lo12:.LANCHOR175]
 	ldr	w1, [x22]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	beq	.L2642
-.L2643:
+	beq	.L2655
+.L2656:
 	str	w4, [x29, 112]
 	mov	w3, 4
 	str	x7, [x29, 104]
@@ -16321,8 +16424,8 @@ flash_prog_page_en:
 	bl	rknand_print_hex
 	ldr	w4, [x29, 112]
 	cmp	w4, 512
-	beq	.L2644
-.L2646:
+	beq	.L2657
+.L2659:
 	mov	w1, w20
 	adrp	x0, .LC152
 	add	x0, x0, :lo12:.LC152
@@ -16333,23 +16436,23 @@ flash_prog_page_en:
 	add	x1, x1, :lo12:.LANCHOR189
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2647:
+.L2660:
 	mov	w0, -1
-	b	.L2635
-.L2640:
+	b	.L2648
+.L2653:
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
 	ldrh	w0, [x0, w1, uxtw 1]
 	add	w19, w0, w19
-	b	.L2638
-.L2649:
+	b	.L2651
+.L2662:
 	mov	w19, w20
-	b	.L2638
-.L2642:
+	b	.L2651
+.L2655:
 	mov	w0, w5
 	cmn	w5, #1
-	beq	.L2646
-.L2635:
+	beq	.L2659
+.L2648:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -16384,43 +16487,43 @@ ftl_test_block:
 	str	wzr, [x25, #:lo12:.LANCHOR191]
 	add	x0, x27, :lo12:.LANCHOR76
 	str	x0, [x29, 96]
-.L2666:
+.L2679:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
 	cmp	w0, w20
-	bls	.L2676
+	bls	.L2689
 	add	x0, x27, :lo12:.LANCHOR76
 	mov	w22, 0
 	str	x0, [x29, 120]
 	adrp	x0, .LANCHOR14
 	add	x0, x0, :lo12:.LANCHOR14
 	str	x0, [x29, 104]
-	b	.L2677
-.L2675:
+	b	.L2690
+.L2688:
 	ldr	x0, [x29, 104]
 	ldr	w0, [x0]
-	tbz	x0, 12, .L2667
+	tbz	x0, 12, .L2680
 	adrp	x0, .LC153
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC153
 	bl	printf
-.L2667:
+.L2680:
 	ldr	x0, [x29, 96]
 	ldrb	w19, [x0]
 	madd	w19, w21, w19, w22
 	and	w19, w19, 65535
-	cbnz	w20, .L2668
+	cbnz	w20, .L2681
 	adrp	x0, .LANCHOR27
 	ldr	x0, [x0, #:lo12:.LANCHOR27]
 	ldrb	w0, [x0, 47]
 	cmp	w0, w19
-	bcs	.L2669
-.L2668:
+	bcs	.L2682
+.L2681:
 	and	w28, w20, 255
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_check_bad_block
-	cbnz	w0, .L2669
+	cbnz	w0, .L2682
 	adrp	x0, .LANCHOR111
 	mov	w1, w23
 	ldrh	w7, [x0, #:lo12:.LANCHOR111]
@@ -16428,25 +16531,25 @@ ftl_test_block:
 	mul	w26, w7, w19
 	mov	w2, w26
 	bl	flash_erase_block_en
-	cbz	w0, .L2670
+	cbz	w0, .L2683
 	adrp	x0, .LANCHOR79
 	ldrb	w0, [x0, #:lo12:.LANCHOR79]
 	cmp	w0, 2
-	bne	.L2692
+	bne	.L2705
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L2692
+	cbz	w0, .L2705
 	mov	w2, w26
 	mov	w1, 1
 	mov	w0, w28
 	bl	flash_erase_block_en
-	cbnz	w0, .L2692
-.L2674:
+	cbnz	w0, .L2705
+.L2687:
 	adrp	x0, .LANCHOR79
 	mov	w23, 1
 	ldrb	w0, [x0, #:lo12:.LANCHOR79]
 	add	w26, w26, w0, lsl 24
-.L2673:
+.L2686:
 	adrp	x0, .LANCHOR131
 	ldr	x2, [x24, #:lo12:.LANCHOR190]
 	mov	w5, 1
@@ -16455,27 +16558,27 @@ ftl_test_block:
 	mov	w1, w26
 	mov	w0, w28
 	bl	flash_prog_page_en
-	cbz	w0, .L2669
-.L2692:
+	cbz	w0, .L2682
+.L2705:
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_mask_bad_block
-.L2669:
+.L2682:
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L2677:
+.L2690:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, w22
-	bhi	.L2675
+	bhi	.L2688
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2666
-.L2670:
-	cbz	w23, .L2673
-	b	.L2674
-.L2676:
-	cbz	w23, .L2678
+	b	.L2679
+.L2683:
+	cbz	w23, .L2686
+	b	.L2687
+.L2689:
+	cbz	w23, .L2691
 	adrp	x0, .LANCHOR7
 	mov	w1, 2
 	ldr	x0, [x0, #:lo12:.LANCHOR7]
@@ -16483,7 +16586,7 @@ ftl_test_block:
 	ldrb	w0, [x21, 2]
 	bfi	w0, w1, 3, 2
 	strb	w0, [x21, 2]
-.L2678:
+.L2691:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -16518,7 +16621,7 @@ ftl_prog_page:
 	bl	flash_prog_page_en
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L2693
+	bne	.L2706
 	mov	w2, 2670
 	adrp	x1, .LANCHOR192
 	adrp	x0, .LC0
@@ -16529,7 +16632,7 @@ ftl_prog_page:
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC152
 	bl	printf
-.L2693:
+.L2706:
 	mov	w0, w19
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -16560,16 +16663,16 @@ ftl_info_flush:
 	bl	ftl_memset
 	ldr	x0, [x24, #:lo12:.LANCHOR110]
 	ldrh	w1, [x0, 74]
-	cbz	w1, .L2697
+	cbz	w1, .L2710
 	strh	wzr, [x0, 150]
-.L2697:
+.L2710:
 	adrp	x23, .LANCHOR194
 	add	x19, x23, :lo12:.LANCHOR194
 	adrp	x25, .LANCHOR111
 	mov	w26, 0
 	add	x0, x25, :lo12:.LANCHOR111
 	str	x0, [x29, 104]
-.L2710:
+.L2723:
 	add	x0, x23, :lo12:.LANCHOR194
 	adrp	x22, .LANCHOR195
 	ldrh	w1, [x25, #:lo12:.LANCHOR111]
@@ -16591,33 +16694,33 @@ ftl_info_flush:
 	str	w0, [x7, 8]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2698
+	tbz	x0, 12, .L2711
 	adrp	x0, .LC154
 	mov	w3, w6
 	mov	w2, w27
 	mov	w1, w28
 	add	x0, x0, :lo12:.LC154
 	bl	printf
-.L2698:
+.L2711:
 	adrp	x1, .LANCHOR95
 	ldrh	w0, [x19, 2]
 	ldrh	w1, [x1, #:lo12:.LANCHOR95]
 	cmp	w1, w0
-	bhi	.L2699
+	bhi	.L2712
 	adrp	x27, .LANCHOR196
 	adrp	x3, .LC0
 	add	x27, x27, :lo12:.LANCHOR196
 	add	x3, x3, :lo12:.LC0
-.L2706:
+.L2719:
 	ldrb	w0, [x19, 1]
 	adrp	x28, .LANCHOR27
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x19, 1]
 	cmp	w0, 7
-	bls	.L2700
+	bls	.L2713
 	mov	x0, 0
-.L2705:
+.L2718:
 	ldr	x2, [x28, #:lo12:.LANCHOR27]
 	add	w1, w0, 8
 	and	w26, w0, 65535
@@ -16626,24 +16729,24 @@ ftl_info_flush:
 	add	w1, w2, 127
 	and	w1, w1, 255
 	cmp	w1, 125
-	bhi	.L2701
+	bhi	.L2714
 	mov	x0, x3
 	str	x3, [x29, 120]
 	mov	w2, 841
 	mov	x1, x27
 	bl	printf
 	ldr	x3, [x29, 120]
-.L2704:
+.L2717:
 	strb	w26, [x19, 1]
 	mov	w26, 1
-.L2700:
+.L2713:
 	ldr	x0, [x28, #:lo12:.LANCHOR27]
 	ldrb	w1, [x19, 1]
 	add	x0, x0, x1
 	ldrb	w28, [x0, 40]
 	strb	w28, [x19]
 	cmp	w28, 255
-	beq	.L2706
+	beq	.L2719
 	ldr	x0, [x29, 104]
 	ldrh	w27, [x0]
 	mov	w0, 0
@@ -16659,7 +16762,7 @@ ftl_info_flush:
 	bl	ftl_prog_page
 	mov	w0, 1
 	strh	w0, [x19, 2]
-.L2707:
+.L2720:
 	ldrb	w4, [x21, #:lo12:.LANCHOR131]
 	mov	w1, w27
 	ldr	x2, [x22, #:lo12:.LANCHOR195]
@@ -16671,41 +16774,41 @@ ftl_info_flush:
 	adrp	x0, .LANCHOR197
 	add	w1, w1, 1
 	strh	w1, [x19, 2]
-	beq	.L2708
+	beq	.L2721
 	ldrb	w1, [x0, #:lo12:.LANCHOR197]
-	cbz	w1, .L2709
-.L2708:
+	cbz	w1, .L2722
+.L2721:
 	strb	wzr, [x0, #:lo12:.LANCHOR197]
-	b	.L2710
-.L2701:
+	b	.L2723
+.L2714:
 	cmp	w2, 255
-	bne	.L2704
+	bne	.L2717
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L2705
+	bne	.L2718
 	mov	w26, w0
-	b	.L2704
-.L2699:
+	b	.L2717
+.L2712:
 	ldr	w1, [x29, 120]
 	madd	w27, w1, w28, w27
-	cbnz	w0, .L2707
+	cbnz	w0, .L2720
 	mov	w1, w27
 	bl	flash_erase_block
-	b	.L2707
-.L2709:
-	cbnz	w26, .L2711
-.L2719:
+	b	.L2720
+.L2722:
+	cbnz	w26, .L2724
+.L2732:
 	adrp	x0, .LANCHOR194
 	ldrb	w0, [x0, #:lo12:.LANCHOR194]
 	cmp	w0, 255
-	bne	.L2713
+	bne	.L2726
 	adrp	x1, .LANCHOR196
 	adrp	x0, .LC0
 	mov	w2, 885
 	add	x1, x1, :lo12:.LANCHOR196
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2713:
+.L2726:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -16714,7 +16817,7 @@ ftl_info_flush:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2711:
+.L2724:
 	ldrb	w19, [x19, 1]
 	adrp	x20, .LANCHOR196
 	adrp	x21, .LC0
@@ -16722,9 +16825,9 @@ ftl_info_flush:
 	add	w19, w19, 1
 	add	x21, x21, :lo12:.LC0
 	adrp	x22, .LANCHOR27
-.L2714:
+.L2727:
 	cmp	w19, 7
-	bhi	.L2719
+	bhi	.L2732
 	ldr	x1, [x22, #:lo12:.LANCHOR27]
 	add	w0, w19, 8
 	add	x0, x1, x0, sxtw
@@ -16732,25 +16835,25 @@ ftl_info_flush:
 	add	w0, w23, 127
 	and	w0, w0, 255
 	cmp	w0, 125
-	bhi	.L2715
+	bhi	.L2728
 	mov	w2, 876
 	mov	x1, x20
 	mov	x0, x21
 	bl	printf
-.L2716:
+.L2729:
 	adrp	x0, .LANCHOR111
 	ldrh	w1, [x0, #:lo12:.LANCHOR111]
 	mov	w0, 0
 	mul	w1, w1, w23
 	bl	flash_erase_block
-	b	.L2717
-.L2715:
+	b	.L2730
+.L2728:
 	cmp	w23, 255
-	bne	.L2716
-.L2717:
+	bne	.L2729
+.L2730:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L2714
+	b	.L2727
 	.size	ftl_info_flush, .-ftl_info_flush
 	.section	.text.ftl_info_blk_init,"ax",@progbits
 	.align	2
@@ -16803,7 +16906,7 @@ ftl_info_blk_init:
 	ldrb	w1, [x1, 40]
 	strb	w1, [x20, #:lo12:.LANCHOR194]
 	strh	wzr, [x0, 2]
-.L2738:
+.L2751:
 	ldr	x1, [x23, #:lo12:.LANCHOR27]
 	add	w0, w22, 8
 	sxth	w25, w22
@@ -16811,16 +16914,16 @@ ftl_info_blk_init:
 	add	x0, x1, x0, sxtw
 	ldrb	w0, [x0, 32]
 	cmp	w0, 255
-	bne	.L2737
-.L2742:
+	bne	.L2750
+.L2755:
 	sub	x22, x22, #1
 	cmn	x22, #1
-	bne	.L2738
+	bne	.L2751
 	mov	w25, 0
-.L2739:
+.L2752:
 	adrp	x24, .LANCHOR14
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2743
+	tbz	x0, 12, .L2756
 	ldr	x0, [x19, #:lo12:.LANCHOR110]
 	mov	w2, 4800
 	mov	w1, w22
@@ -16828,9 +16931,9 @@ ftl_info_blk_init:
 	adrp	x0, .LC156
 	add	x0, x0, :lo12:.LC156
 	bl	printf
-.L2743:
+.L2756:
 	cmn	w22, #1
-	bne	.L2744
+	bne	.L2757
 	ldr	x0, [x21, #:lo12:.LANCHOR195]
 	mov	w1, 0
 	mov	w2, 16384
@@ -16843,7 +16946,7 @@ ftl_info_blk_init:
 	movk	w1, 0x6, lsl 16
 	str	w1, [x0, 12]
 	mov	w0, w22
-.L2736:
+.L2749:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -16851,7 +16954,7 @@ ftl_info_blk_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2737:
+.L2750:
 	ldrh	w6, [x26]
 	adrp	x7, .LANCHOR193
 	ldrb	w4, [x24]
@@ -16868,7 +16971,7 @@ ftl_info_blk_init:
 	cmn	w0, #1
 	ldr	w6, [x29, 108]
 	ldr	x7, [x29, 96]
-	bne	.L2740
+	bne	.L2753
 	ldrb	w4, [x24]
 	mov	x3, x7
 	ldr	x2, [x21, #:lo12:.LANCHOR195]
@@ -16876,10 +16979,10 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_read_page
 	mov	w5, w0
-.L2740:
+.L2753:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2741
+	tbz	x0, 12, .L2754
 	ldr	x0, [x19, #:lo12:.LANCHOR110]
 	mov	w2, w5
 	str	w5, [x29, 108]
@@ -16890,16 +16993,16 @@ ftl_info_blk_init:
 	add	x0, x0, :lo12:.LC155
 	bl	printf
 	ldr	w5, [x29, 108]
-.L2741:
+.L2754:
 	cmn	w5, #1
-	beq	.L2742
+	beq	.L2755
 	ldr	x0, [x19, #:lo12:.LANCHOR110]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L2742
+	bne	.L2755
 	mov	w22, w25
-	b	.L2739
-.L2744:
+	b	.L2752
+.L2757:
 	ldr	x1, [x23, #:lo12:.LANCHOR27]
 	add	w0, w25, 8
 	ldr	x2, [x21, #:lo12:.LANCHOR195]
@@ -16927,8 +17030,8 @@ ftl_info_blk_init:
 	adrp	x0, .LANCHOR111
 	ldrh	w0, [x0, #:lo12:.LANCHOR111]
 	madd	w23, w23, w0, w22
-.L2746:
-	tbnz	w22, #31, .L2750
+.L2759:
+	tbnz	w22, #31, .L2763
 	ldrb	w4, [x26]
 	add	x5, x25, :lo12:.LANCHOR193
 	ldr	x2, [x21, #:lo12:.LANCHOR195]
@@ -16938,15 +17041,15 @@ ftl_info_blk_init:
 	str	x5, [x29, 96]
 	bl	ftl_read_page
 	cmn	w0, #1
-	beq	.L2747
+	beq	.L2760
 	ldr	x0, [x19, #:lo12:.LANCHOR110]
 	ldr	x5, [x29, 96]
 	ldr	w0, [x0]
 	cmp	w0, w28
-	bne	.L2747
+	bne	.L2760
 	ldr	w6, [x5, 8]
-	cbnz	w6, .L2748
-.L2750:
+	cbnz	w6, .L2761
+.L2763:
 	ldrh	w0, [x29, 108]
 	add	x20, x20, :lo12:.LANCHOR194
 	strh	w0, [x20, 2]
@@ -16960,32 +17063,32 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_info_flush
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbnz	x0, 14, .L2749
-.L2766:
+	tbnz	x0, 14, .L2762
+.L2779:
 	mov	w0, 0
-	b	.L2736
-.L2748:
+	b	.L2749
+.L2761:
 	ldr	x0, [x21, #:lo12:.LANCHOR195]
 	ldrb	w1, [x26]
 	lsl	w1, w1, 9
 	bl	js_hash
 	cmp	w6, w0
-	beq	.L2750
+	beq	.L2763
 	mov	w1, w6
 	mov	x0, x27
 	bl	printf
-.L2747:
+.L2760:
 	sub	w22, w22, #1
 	sub	w23, w23, #1
 	sxth	w22, w22
-	b	.L2746
-.L2749:
+	b	.L2759
+.L2762:
 	ldr	x0, [x19, #:lo12:.LANCHOR110]
 	ldr	w1, [x0, 156]
 	adrp	x0, .LC158
 	add	x0, x0, :lo12:.LC158
 	bl	printf
-	b	.L2766
+	b	.L2779
 	.size	ftl_info_blk_init, .-ftl_info_blk_init
 	.section	.text.ftl_ext_info_flush,"ax",@progbits
 	.align	2
@@ -17002,9 +17105,9 @@ ftl_ext_info_flush:
 	ldr	w1, [x0, 520]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbz	w1, .L2768
+	cbz	w1, .L2781
 	str	wzr, [x0, 520]
-.L2768:
+.L2781:
 	adrp	x20, .LANCHOR95
 	adrp	x22, .LANCHOR201
 	adrp	x21, .LANCHOR32
@@ -17013,10 +17116,10 @@ ftl_ext_info_flush:
 	add	x21, x21, :lo12:.LANCHOR32
 	mov	w0, 0
 	bl	ftl_total_vpn_update
-.L2769:
+.L2782:
 	adrp	x23, .LANCHOR110
 	mov	x24, x23
-.L2772:
+.L2785:
 	ldr	x0, [x23, #:lo12:.LANCHOR110]
 	ldr	w1, [x0, 56]
 	add	w1, w1, 1
@@ -17024,20 +17127,20 @@ ftl_ext_info_flush:
 	ldrh	w1, [x0, 140]
 	ldrh	w0, [x20]
 	cmp	w1, w0
-	bcc	.L2770
+	bcc	.L2783
 	bl	ftl_ext_alloc_new_blk
-.L2770:
+.L2783:
 	ldr	x0, [x24, #:lo12:.LANCHOR110]
 	ldrh	w1, [x0, 130]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2771
+	bne	.L2784
 	adrp	x0, .LC0
 	mov	w2, 2203
 	mov	x1, x22
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2771:
+.L2784:
 	ldrb	w19, [x21]
 	mov	w0, 24
 	ldr	x1, [x24, #:lo12:.LANCHOR110]
@@ -17087,16 +17190,16 @@ ftl_ext_info_flush:
 	and	w1, w1, 65535
 	strh	w1, [x2, 140]
 	cmp	w1, 1
-	beq	.L2772
+	beq	.L2785
 	cmn	w0, #1
 	adrp	x0, .LANCHOR199
-	beq	.L2773
+	beq	.L2786
 	ldrb	w1, [x0, #:lo12:.LANCHOR199]
-	cbz	w1, .L2774
-.L2773:
+	cbz	w1, .L2787
+.L2786:
 	strb	wzr, [x0, #:lo12:.LANCHOR199]
-	b	.L2769
-.L2774:
+	b	.L2782
+.L2787:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -17148,7 +17251,7 @@ ftl_ext_info_init:
 	adrp	x0, .LANCHOR14
 	stp	x0, x24, [x29, 112]
 	ldr	w1, [x0, #:lo12:.LANCHOR14]
-	tbz	x1, 12, .L2785
+	tbz	x1, 12, .L2798
 	ldr	x0, [x20, #:lo12:.LANCHOR110]
 	adrp	x1, .LANCHOR202
 	and	w4, w22, 65535
@@ -17159,7 +17262,7 @@ ftl_ext_info_init:
 	adrp	x0, .LC159
 	add	x0, x0, :lo12:.LC159
 	bl	printf
-.L2785:
+.L2798:
 	adrp	x25, .LANCHOR131
 	adrp	x26, .LANCHOR111
 	mov	w28, 20038
@@ -17167,10 +17270,10 @@ ftl_ext_info_init:
 	add	x26, x26, :lo12:.LANCHOR111
 	mov	w24, 0
 	movk	w28, 0x4549, lsl 16
-.L2786:
+.L2799:
 	and	w22, w23, 65535
 	sub	w0, w22, w24
-	tbnz	x0, 15, .L2791
+	tbnz	x0, 15, .L2804
 	ldr	x0, [x29, 120]
 	sub	w1, w23, w24
 	ldrb	w4, [x25]
@@ -17184,25 +17287,25 @@ ftl_ext_info_init:
 	bl	flash_read_page_en
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2787
+	beq	.L2800
 	adrp	x0, .LANCHOR10
 	ldr	x5, [x29, 104]
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x0]
 	cmp	w0, w28
-	bne	.L2787
+	bne	.L2800
 	ldr	w6, [x5, 8]
-	cbnz	w6, .L2788
-.L2791:
+	cbnz	w6, .L2801
+.L2804:
 	bl	zftl_sblk_list_init
 	ldr	x0, [x20, #:lo12:.LANCHOR110]
 	ldrh	w1, [x0, 140]
 	cmp	w1, w23
-	bgt	.L2790
+	bgt	.L2803
 	add	w22, w22, 1
 	strh	w22, [x0, 140]
 	bl	ftl_ext_info_flush
-.L2790:
+.L2803:
 	adrp	x0, .LANCHOR10
 	mov	w1, -1
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
@@ -17219,7 +17322,7 @@ ftl_ext_info_init:
 	str	wzr, [x0, 604]
 	str	wzr, [x0, 608]
 	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 12, .L2793
+	tbz	x1, 12, .L2806
 	ldr	w3, [x0, 12]
 	adrp	x1, .LANCHOR202
 	adrp	x0, .LC161
@@ -17228,7 +17331,7 @@ ftl_ext_info_init:
 	add	x1, x1, :lo12:.LANCHOR202
 	add	x0, x0, :lo12:.LC161
 	bl	printf
-.L2793:
+.L2806:
 	adrp	x0, .LANCHOR73
 	mov	w1, -1
 	ldp	x19, x20, [sp, 16]
@@ -17240,20 +17343,20 @@ ftl_ext_info_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2788:
+.L2801:
 	ldr	x0, [x21, #:lo12:.LANCHOR200]
 	ldrb	w1, [x25]
 	lsl	w1, w1, 9
 	bl	js_hash
 	cmp	w6, w0
-	beq	.L2791
+	beq	.L2804
 	adrp	x0, .LC160
 	mov	w1, w6
 	add	x0, x0, :lo12:.LC160
 	bl	printf
-.L2787:
+.L2800:
 	add	w24, w24, 1
-	b	.L2786
+	b	.L2799
 	.size	ftl_ext_info_init, .-ftl_ext_info_init
 	.section	.text.ftl_low_format_data_init,"ax",@progbits
 	.align	2
@@ -17286,14 +17389,14 @@ ftl_low_format_data_init:
 	mov	w0, 65533
 	sub	w1, w20, #1
 	cmp	w0, w1, uxth
-	bcs	.L2805
+	bcs	.L2818
 	adrp	x1, .LANCHOR203
 	adrp	x0, .LC0
 	mov	w2, 2476
 	add	x1, x1, :lo12:.LANCHOR203
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2805:
+.L2818:
 	ldr	x0, [x19, #:lo12:.LANCHOR110]
 	mov	w2, 256
 	mov	w1, 255
@@ -17402,30 +17505,30 @@ ftl_low_format:
 	mov	w19, 8
 	adrp	x23, .LC0
 	bl	printf
-.L2810:
+.L2823:
 	ldr	x0, [x22, #:lo12:.LANCHOR27]
 	add	x0, x0, x19, sxtw
 	ldrb	w21, [x0, 32]
 	add	w0, w21, 127
 	and	w0, w0, 255
 	cmp	w0, 125
-	bhi	.L2808
+	bhi	.L2821
 	mov	w2, 2531
 	mov	x1, x20
 	add	x0, x23, :lo12:.LC0
 	bl	printf
-.L2808:
+.L2821:
 	cmp	w21, 255
-	beq	.L2809
+	beq	.L2822
 	adrp	x0, .LANCHOR111
 	ldrh	w1, [x0, #:lo12:.LANCHOR111]
 	mov	w0, 0
 	mul	w1, w1, w21
 	bl	flash_erase_block
-.L2809:
+.L2822:
 	add	w19, w19, 1
 	cmp	w19, 16
-	bne	.L2810
+	bne	.L2823
 	bl	sblk_init
 	adrp	x22, .LANCHOR7
 	bl	ftl_info_blk_init
@@ -17439,9 +17542,9 @@ ftl_low_format:
 	mov	w3, 1
 	ldrh	w2, [x19, #:lo12:.LANCHOR6]
 	add	x2, x0, x2, lsl 2
-.L2811:
+.L2824:
 	cmp	x0, x2
-	bne	.L2812
+	bne	.L2825
 	adrp	x21, .LANCHOR110
 	mov	w1, 21574
 	adrp	x24, .LANCHOR69
@@ -17452,11 +17555,11 @@ ftl_low_format:
 	mov	w26, 1
 	strh	wzr, [x0, 148]
 	str	w1, [x0]
-.L2813:
+.L2826:
 	ldrh	w0, [x19, #:lo12:.LANCHOR6]
 	adrp	x23, .LANCHOR76
 	cmp	w0, w20
-	bhi	.L2822
+	bhi	.L2835
 	ldr	x0, [x25, #:lo12:.LANCHOR27]
 	mov	w4, 3
 	ldrb	w2, [x23, #:lo12:.LANCHOR76]
@@ -17475,7 +17578,7 @@ ftl_low_format:
 	add	x0, x0, 4
 	add	w20, w5, 1
 	add	x0, x1, x0
-.L2825:
+.L2838:
 	cmp	w2, 4
 	add	x1, x1, 4
 	csel	w7, w10, w4, eq
@@ -17484,7 +17587,7 @@ ftl_low_format:
 	orr	w7, w7, -32
 	strb	w7, [x1, -2]
 	cmp	x1, x0
-	bne	.L2825
+	bne	.L2838
 	mul	w5, w5, w8
 	mov	w4, 16
 	add	w0, w8, w3
@@ -17496,14 +17599,14 @@ ftl_low_format:
 	add	w4, w20, w4
 	and	w4, w4, 65535
 	strh	w4, [x6, 134]
-	tbz	x0, 12, .L2826
+	tbz	x0, 12, .L2839
 	adrp	x0, .LC163
 	mov	w3, w20
 	mov	w2, 128
 	mov	w1, 2590
 	add	x0, x0, :lo12:.LC163
 	bl	printf
-.L2826:
+.L2839:
 	ldr	x0, [x21, #:lo12:.LANCHOR110]
 	mov	w2, 128
 	mov	w1, 255
@@ -17529,9 +17632,9 @@ ftl_low_format:
 	and	w1, w1, 65535
 	lsl	w4, w4, w0
 	and	w4, w4, 65535
-.L2827:
+.L2840:
 	cmp	w20, w8
-	bcc	.L2833
+	bcc	.L2846
 	ldrh	w0, [x19, #:lo12:.LANCHOR6]
 	strh	w3, [x2, 112]
 	sub	w0, w0, w8
@@ -17547,21 +17650,21 @@ ftl_low_format:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2812:
+.L2825:
 	ldrb	w1, [x0, 2]
 	add	x0, x0, 4
 	and	w1, w1, 31
 	bfi	w1, w3, 3, 2
 	strb	w1, [x0, -2]
-	b	.L2811
-.L2822:
+	b	.L2824
+.L2835:
 	adrp	x0, .LANCHOR82
 	strh	w20, [x24]
 	ldrb	w0, [x0, #:lo12:.LANCHOR82]
-	cbnz	w0, .L2814
+	cbnz	w0, .L2827
 	mov	w0, w20
 	bl	ftl_test_block
-.L2814:
+.L2827:
 	ldrb	w11, [x23, #:lo12:.LANCHOR76]
 	adrp	x0, .LANCHOR112
 	ldr	x6, [x22, #:lo12:.LANCHOR7]
@@ -17572,16 +17675,16 @@ ftl_low_format:
 	mov	w8, 0
 	mul	w12, w20, w11
 	add	x6, x6, x20, uxth 2
-.L2815:
+.L2828:
 	cmp	w8, w14
-	bcs	.L2819
+	bcs	.L2832
 	add	w15, w11, w7
-	b	.L2820
-.L2818:
+	b	.L2833
+.L2831:
 	add	w1, w7, w12
 	mov	w0, w8
 	bl	flash_check_bad_block
-	cbz	w0, .L2816
+	cbz	w0, .L2829
 	ldrb	w1, [x6, 3]
 	lsl	w0, w26, w7
 	orr	w0, w0, w1
@@ -17589,29 +17692,29 @@ ftl_low_format:
 	ldrh	w0, [x13, 148]
 	add	w0, w0, 1
 	strh	w0, [x13, 148]
-.L2817:
+.L2830:
 	add	w7, w7, 1
-.L2820:
+.L2833:
 	cmp	w7, w15
-	bne	.L2818
+	bne	.L2831
 	add	w8, w8, 1
 	sub	w12, w12, w11
 	and	w8, w8, 65535
-	b	.L2815
-.L2816:
+	b	.L2828
+.L2829:
 	add	w10, w10, 1
 	and	w10, w10, 65535
-	b	.L2817
-.L2819:
-	cbnz	w10, .L2821
+	b	.L2830
+.L2832:
+	cbnz	w10, .L2834
 	ldrb	w0, [x6, 2]
 	orr	w0, w0, -32
 	strb	w0, [x6, 2]
-.L2821:
+.L2834:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2813
-.L2833:
+	b	.L2826
+.L2846:
 	add	x13, x15, x20, uxth 2
 	mov	w6, 0
 	mov	w12, 0
@@ -17619,48 +17722,48 @@ ftl_low_format:
 	ldrb	w0, [x13, 2]
 	orr	w0, w0, -32
 	strb	w0, [x13, 2]
-.L2828:
+.L2841:
 	cmp	w5, w16
-	bcc	.L2835
+	bcc	.L2848
 	add	w20, w20, 1
 	add	w1, w1, w11
 	and	w20, w20, 65535
 	and	w1, w1, 65535
-	b	.L2827
-.L2831:
+	b	.L2840
+.L2844:
 	ldrb	w14, [x13, 3]
 	add	w17, w12, w7
 	asr	w14, w14, w17
-	tbnz	x14, 0, .L2829
+	tbnz	x14, 0, .L2842
 	cmp	w10, 1
-	bls	.L2834
+	bls	.L2847
 	and	w0, w0, 1
 	add	w0, w1, w0
 	and	w0, w0, 65535
-.L2830:
+.L2843:
 	add	x14, x2, x3, sxtw 1
 	add	w3, w3, 1
 	and	w3, w3, 65535
 	add	w0, w0, w6
 	strh	w0, [x14, 160]
-.L2829:
+.L2842:
 	add	x7, x7, 1
-.L2832:
+.L2845:
 	and	w0, w7, 65535
 	cmp	w0, w11
-	bcc	.L2831
+	bcc	.L2844
 	add	w5, w5, 1
 	add	w6, w4, w6
 	and	w5, w5, 65535
 	add	w12, w12, w10
 	and	w6, w6, 65535
-	b	.L2828
-.L2834:
+	b	.L2841
+.L2847:
 	mov	w0, w1
-	b	.L2830
-.L2835:
+	b	.L2843
+.L2848:
 	mov	x7, 0
-	b	.L2832
+	b	.L2845
 	.size	ftl_low_format, .-ftl_low_format
 	.section	.text.ftl_re_low_format,"ax",@progbits
 	.align	2
@@ -17687,9 +17790,9 @@ ftl_re_low_format:
 	ldr	x2, [x2, #:lo12:.LANCHOR7]
 	ldrh	w1, [x0, 134]
 	add	x2, x2, x1, uxth 2
-.L2846:
+.L2859:
 	cmp	w1, w7
-	bcc	.L2850
+	bcc	.L2863
 	strh	w5, [x0, 114]
 	strh	w4, [x0, 118]
 	strh	w3, [x0, 116]
@@ -17700,29 +17803,29 @@ ftl_re_low_format:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L2850:
+.L2863:
 	ldrb	w6, [x2, 2]
 	and	w8, w6, 31
 	strb	w8, [x2, 2]
 	ands	w6, w6, 24
-	bne	.L2847
+	bne	.L2860
 	add	w5, w5, 1
 	and	w5, w5, 65535
-.L2848:
+.L2861:
 	add	w1, w1, 1
 	add	x2, x2, 4
 	and	w1, w1, 65535
-	b	.L2846
-.L2847:
+	b	.L2859
+.L2860:
 	cmp	w6, 16
-	bne	.L2849
+	bne	.L2862
 	add	w4, w4, 1
 	and	w4, w4, 65535
-	b	.L2848
-.L2849:
+	b	.L2861
+.L2862:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L2848
+	b	.L2861
 	.size	ftl_re_low_format, .-ftl_re_low_format
 	.section	.text.ftl_prog_ppa_page,"ax",@progbits
 	.align	2
@@ -17753,7 +17856,7 @@ ftl_prog_ppa_page:
 ftl_write_last_log_page:
 	ldrh	w1, [x0, 6]
 	cmp	w1, 1
-	bne	.L2855
+	bne	.L2868
 	stp	x29, x30, [sp, -48]!
 	adrp	x1, .LANCHOR117
 	add	x29, sp, 0
@@ -17765,7 +17868,7 @@ ftl_write_last_log_page:
 	bl	ftl_get_new_free_page
 	mov	w21, w0
 	cmn	w0, #1
-	beq	.L2856
+	beq	.L2869
 	ldrh	w0, [x19]
 	add	x20, x20, x22, uxth 2
 	bl	ftl_vpn_decrement
@@ -17795,13 +17898,13 @@ ftl_write_last_log_page:
 	ldrb	w3, [x0, #:lo12:.LANCHOR131]
 	mov	w0, w21
 	bl	ftl_prog_ppa_page
-.L2856:
+.L2869:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L2855:
+.L2868:
 	mov	w0, -1
 	ret
 	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
@@ -17826,7 +17929,7 @@ pm_write_page:
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
 	mov	w25, 65535
-.L2862:
+.L2875:
 	ldr	x0, [x24, #:lo12:.LANCHOR110]
 	ldr	w1, [x0, 48]
 	ldrh	w2, [x0, 696]
@@ -17834,26 +17937,26 @@ pm_write_page:
 	str	w1, [x0, 48]
 	ldrh	w1, [x21]
 	cmp	w2, w1
-	bcs	.L2863
+	bcs	.L2876
 	ldrh	w0, [x0, 692]
 	cmp	w0, w25
-	bne	.L2864
-.L2863:
+	bne	.L2877
+.L2876:
 	bl	pm_alloc_new_blk
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2864:
+.L2877:
 	ldr	x0, [x20, #:lo12:.LANCHOR110]
 	ldrh	w0, [x0, 692]
 	cmp	w0, w25
-	bne	.L2865
+	bne	.L2878
 	adrp	x1, .LANCHOR206
 	adrp	x0, .LC0
 	mov	w2, 303
 	add	x1, x1, :lo12:.LANCHOR206
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2865:
+.L2878:
 	ldr	x0, [x20, #:lo12:.LANCHOR110]
 	adrp	x27, .LANCHOR207
 	ldrh	w1, [x22]
@@ -17888,27 +17991,27 @@ pm_write_page:
 	strh	w1, [x2, 696]
 	cmp	w1, 1
 	adrp	x1, .LANCHOR208
-	beq	.L2866
+	beq	.L2879
 	ldrb	w3, [x1, #:lo12:.LANCHOR208]
-	cbz	w3, .L2867
-.L2866:
+	cbz	w3, .L2880
+.L2879:
 	strb	wzr, [x1, #:lo12:.LANCHOR208]
-	b	.L2862
-.L2867:
+	b	.L2875
+.L2880:
 	cmn	w0, #1
-	bne	.L2869
+	bne	.L2882
 	mov	w1, w26
 	adrp	x0, .LC165
 	add	x0, x0, :lo12:.LC165
 	bl	printf
-	b	.L2862
-.L2869:
+	b	.L2875
+.L2882:
 	ldrh	w0, [x2, 698]
 	cmp	w19, w0
-	bcs	.L2870
+	bcs	.L2883
 	add	x19, x2, x19, uxtw 2
 	str	w26, [x19, 704]
-.L2870:
+.L2883:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -17935,18 +18038,18 @@ ftl_dump_write_open_sblk:
 	stp	x25, x26, [sp, 112]
 	stp	x27, x28, [sp, 128]
 	cmp	w0, w20
-	bls	.L2875
+	bls	.L2888
 	adrp	x0, .LANCHOR84
 	str	x0, [x29, 120]
 	ldrb	w1, [x0, #:lo12:.LANCHOR84]
-	cbnz	w1, .L2877
+	cbnz	w1, .L2890
 	adrp	x0, .LANCHOR81
 	ldrb	w0, [x0, #:lo12:.LANCHOR81]
-	cbz	w0, .L2875
-.L2877:
+	cbz	w0, .L2888
+.L2890:
 	adrp	x0, .LANCHOR36
 	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbnz	w0, .L2875
+	cbnz	w0, .L2888
 	adrp	x0, .LANCHOR7
 	ubfiz	x14, x20, 2, 16
 	mov	x15, x0
@@ -17955,10 +18058,10 @@ ftl_dump_write_open_sblk:
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 160
-	bne	.L2899
+	bne	.L2912
 	adrp	x0, .LANCHOR79
 	ldrb	w25, [x0, #:lo12:.LANCHOR79]
-.L2878:
+.L2891:
 	add	x21, x29, 176
 	adrp	x23, .LANCHOR95
 	mov	w0, w20
@@ -17996,11 +18099,11 @@ ftl_dump_write_open_sblk:
 	mov	w10, 0
 	add	x0, x23, :lo12:.LANCHOR95
 	str	x0, [x29, 128]
-.L2879:
+.L2892:
 	ldr	x0, [x29, 128]
 	ldrh	w0, [x0]
 	cmp	w0, w27
-	bls	.L2887
+	bls	.L2900
 	lsl	w22, w27, 1
 	mov	w28, 0
 	sub	w0, w22, #1
@@ -18010,51 +18113,51 @@ ftl_dump_write_open_sblk:
 	adrp	x0, .LC167
 	add	x0, x0, :lo12:.LC167
 	str	x0, [x29, 112]
-	b	.L2890
-.L2899:
+	b	.L2903
+.L2912:
 	mov	w25, 1
-	b	.L2878
-.L2888:
+	b	.L2891
+.L2901:
 	ldrh	w12, [x21, x24]
 	mov	w0, 65535
 	cmp	w12, w0
-	bne	.L2880
-.L2886:
+	bne	.L2893
+.L2899:
 	add	w10, w10, 1
 	and	w10, w10, 65535
-.L2881:
+.L2894:
 	cmp	w25, w10
-	bcs	.L2888
+	bcs	.L2901
 	add	w11, w28, 1
 	and	w28, w11, 65535
-.L2890:
+.L2903:
 	ldrb	w0, [x29, 153]
 	cmp	w0, w28
-	bls	.L2889
+	bls	.L2902
 	sxtw	x24, w28
 	mov	w10, 1
 	add	x24, x24, 8
 	lsl	x24, x24, 1
-	b	.L2881
-.L2880:
+	b	.L2894
+.L2893:
 	ldrh	w3, [x26]
 	cmp	w25, 3
 	mul	w3, w3, w12
 	add	w0, w3, w10
-	bne	.L2882
+	bne	.L2895
 	adrp	x1, .LANCHOR37
 	ldrb	w1, [x1, #:lo12:.LANCHOR37]
-	cbz	w1, .L2883
+	cbz	w1, .L2896
 	adrp	x1, .LANCHOR79
 	add	w0, w0, w22
 	ldrb	w3, [x1, #:lo12:.LANCHOR79]
-.L2913:
+.L2926:
 	orr	w3, w0, w3, lsl 24
-	b	.L2884
-.L2883:
+	b	.L2897
+.L2896:
 	add	w3, w27, w3
 	orr	w3, w3, w10, lsl 24
-.L2884:
+.L2897:
 	str	w3, [x19, 40]
 	mov	w1, 1
 	stp	w10, w12, [x29, 104]
@@ -18066,7 +18169,7 @@ ftl_dump_write_open_sblk:
 	cmp	w13, 512
 	ccmn	w13, #1, 4, ne
 	ldr	w3, [x29, 136]
-	bne	.L2886
+	bne	.L2899
 	ldr	x1, [x19, 24]
 	mov	w4, w13
 	ldr	x0, [x19, 8]
@@ -18091,8 +18194,8 @@ ftl_dump_write_open_sblk:
 	ldr	w13, [x29, 136]
 	ldr	w10, [x29, 108]
 	cmp	w13, 512
-	bne	.L2886
-.L2887:
+	bne	.L2899
+.L2900:
 	mov	w4, w10
 	mov	w3, w28
 	mov	w2, w27
@@ -18115,43 +18218,43 @@ ftl_dump_write_open_sblk:
 	ldrb	w2, [x24, #:lo12:.LANCHOR131]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.L2891:
+.L2904:
 	ldrh	w0, [x23, #:lo12:.LANCHOR95]
 	cmp	w0, w27
-	bls	.L2897
+	bls	.L2910
 	lsl	w0, w27, 1
 	str	w0, [x29, 140]
 	ldr	x0, [x29, 120]
 	mov	w22, 0
 	add	x28, x0, :lo12:.LANCHOR84
-	b	.L2898
-.L2882:
+	b	.L2911
+.L2895:
 	cmp	w25, 2
-	bne	.L2885
+	bne	.L2898
 	adrp	x1, .LANCHOR79
 	ldrb	w3, [x1, #:lo12:.LANCHOR79]
 	ldr	w1, [x29, 140]
 	add	w0, w1, w0
-	b	.L2913
-.L2885:
+	b	.L2926
+.L2898:
 	add	w3, w27, w3
-	b	.L2884
-.L2889:
+	b	.L2897
+.L2902:
 	add	w8, w27, 1
 	and	w27, w8, 65535
-	b	.L2879
-.L2896:
+	b	.L2892
+.L2909:
 	ldr	w0, [x25]
-	tbz	x0, 12, .L2892
+	tbz	x0, 12, .L2905
 	mov	w2, w22
 	mov	w1, w27
 	mov	x0, x26
 	bl	printf
-.L2892:
+.L2905:
 	ldrb	w1, [x28]
 	adrp	x2, .LANCHOR111
 	sxtw	x0, w22
-	cbz	w1, .L2893
+	cbz	w1, .L2906
 	add	x0, x0, 8
 	ldrh	w1, [x2, #:lo12:.LANCHOR111]
 	ldrh	w0, [x21, x0, lsl 1]
@@ -18160,22 +18263,22 @@ ftl_dump_write_open_sblk:
 	str	w0, [x19, 40]
 	mov	x0, x19
 	bl	sblk_3d_tlc_dump_prog
-.L2894:
+.L2907:
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L2898:
+.L2911:
 	ldrb	w0, [x29, 153]
 	cmp	w0, w22
-	bhi	.L2896
+	bhi	.L2909
 	add	w8, w27, 1
 	and	w27, w8, 65535
-	b	.L2891
-.L2893:
+	b	.L2904
+.L2906:
 	adrp	x1, .LANCHOR79
 	add	x0, x0, 8
 	ldrb	w1, [x1, #:lo12:.LANCHOR79]
 	cmp	w1, 2
-	bne	.L2895
+	bne	.L2908
 	ldrh	w1, [x2, #:lo12:.LANCHOR111]
 	ldrh	w0, [x21, x0, lsl 1]
 	mul	w0, w0, w1
@@ -18185,8 +18288,8 @@ ftl_dump_write_open_sblk:
 	str	w0, [x19, 40]
 	mov	x0, x19
 	bl	sblk_mlc_dump_prog
-	b	.L2894
-.L2895:
+	b	.L2907
+.L2908:
 	ldrh	w1, [x21, x0, lsl 1]
 	mov	w6, 1
 	ldrh	w0, [x2, #:lo12:.LANCHOR111]
@@ -18208,15 +18311,15 @@ ftl_dump_write_open_sblk:
 	bic	w1, w1, w7
 	and	w0, w0, w6
 	bl	flash_prog_page_en
-	b	.L2894
-.L2897:
+	b	.L2907
+.L2910:
 	mov	x0, x19
 	bl	zbuf_free
 	adrp	x0, .LC170
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC170
 	bl	printf
-.L2875:
+.L2888:
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
 	ldp	x23, x24, [sp, 96]
@@ -18240,14 +18343,14 @@ flash_info_flush:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2915
+	tbz	x0, 12, .L2928
 	adrp	x2, .LANCHOR209
 	adrp	x0, .LC97
 	add	x2, x2, :lo12:.LANCHOR209
 	mov	w1, 364
 	add	x0, x0, :lo12:.LC97
 	bl	printf
-.L2915:
+.L2928:
 	adrp	x23, .LANCHOR210
 	adrp	x20, .LANCHOR27
 	mov	w2, 64
@@ -18274,7 +18377,7 @@ flash_info_flush:
 	ldr	w1, [x6, 8]
 	bl	js_hash
 	str	w0, [x6, 12]
-.L2916:
+.L2929:
 	add	x28, x21, :lo12:.LANCHOR211
 	ldrb	w4, [x21, #:lo12:.LANCHOR211]
 	ldrh	w19, [x22]
@@ -18289,7 +18392,7 @@ flash_info_flush:
 	sub	w0, w0, #1
 	cmp	w1, w0
 	ldp	w3, w4, [x29, 104]
-	blt	.L2917
+	blt	.L2930
 	ldr	x6, [x20, #:lo12:.LANCHOR27]
 	ldrb	w7, [x28, 1]
 	strh	wzr, [x28, 2]
@@ -18308,18 +18411,18 @@ flash_info_flush:
 	ldrh	w19, [x22]
 	str	w0, [x6, 12]
 	mul	w19, w19, w7
-.L2926:
+.L2939:
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_erase_block
-	b	.L2918
-.L2921:
+	b	.L2931
+.L2934:
 	mov	w26, 1
-	b	.L2916
-.L2917:
+	b	.L2929
+.L2930:
 	madd	w19, w19, w4, w3
-	cbz	w1, .L2926
-.L2918:
+	cbz	w1, .L2939
+.L2931:
 	ldr	x2, [x20, #:lo12:.LANCHOR27]
 	mov	w1, w19
 	ldr	x3, [x23, #:lo12:.LANCHOR210]
@@ -18336,14 +18439,14 @@ flash_info_flush:
 	ldrh	w1, [x27, 2]
 	add	w1, w1, 1
 	strh	w1, [x27, 2]
-	bne	.L2919
+	bne	.L2932
 	mov	w1, w19
 	adrp	x0, .LC173
 	add	x0, x0, :lo12:.LC173
 	bl	printf
-	b	.L2916
-.L2919:
-	cbz	w26, .L2921
+	b	.L2929
+.L2932:
+	cbz	w26, .L2934
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -18368,7 +18471,7 @@ flash_info_blk_init:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	tbz	x0, 12, .L2928
+	tbz	x0, 12, .L2941
 	ldr	x4, [x20, #:lo12:.LANCHOR27]
 	adrp	x2, .LANCHOR212
 	adrp	x0, .LC174
@@ -18377,16 +18480,16 @@ flash_info_blk_init:
 	mov	w1, 49
 	add	x0, x0, :lo12:.LC174
 	bl	printf
-.L2928:
+.L2941:
 	adrp	x24, .LANCHOR2
 	mov	w23, 21321
 	add	x26, x24, :lo12:.LANCHOR2
 	mov	w22, 4
 	adrp	x21, .LANCHOR210
 	movk	w23, 0x5359, lsl 16
-.L2932:
+.L2945:
 	mov	w19, 0
-.L2931:
+.L2944:
 	ldrh	w1, [x26]
 	mov	w4, 4
 	ldr	x3, [x21, #:lo12:.LANCHOR210]
@@ -18397,21 +18500,21 @@ flash_info_blk_init:
 	madd	w1, w1, w22, w19
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L2929
+	beq	.L2942
 	ldr	x2, [x20, #:lo12:.LANCHOR27]
 	ldr	w0, [x2]
 	cmp	w0, w23
-	beq	.L2930
-.L2929:
+	beq	.L2943
+.L2942:
 	add	w19, w19, 1
 	cmp	w19, 4
-	bne	.L2931
+	bne	.L2944
 	add	w22, w22, 1
 	cmp	w22, 16
-	bne	.L2932
-.L2958:
+	bne	.L2945
+.L2971:
 	mov	w0, -1
-.L2927:
+.L2940:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -18419,13 +18522,13 @@ flash_info_blk_init:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2940:
+.L2953:
 	ldr	x0, [x25]
 	ldr	w1, [x0]
 	cmp	w1, w23
-	bne	.L2941
+	bne	.L2954
 	ldr	w22, [x0, 4]
-.L2934:
+.L2947:
 	add	x23, x19, :lo12:.LANCHOR211
 	ldrh	w0, [x24, #:lo12:.LANCHOR2]
 	ldr	x3, [x21, #:lo12:.LANCHOR210]
@@ -18436,21 +18539,21 @@ flash_info_blk_init:
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L2935
+	beq	.L2948
 	ldr	x0, [x20, #:lo12:.LANCHOR27]
 	mov	w1, 21321
 	movk	w1, 0x5359, lsl 16
 	ldr	w2, [x0]
 	cmp	w2, w1
-	bne	.L2935
+	bne	.L2948
 	ldr	w1, [x0, 4]
 	cmp	w22, w1
-	bcs	.L2935
+	bcs	.L2948
 	ldrb	w1, [x0, 37]
 	ldrb	w0, [x0, 36]
 	strb	w1, [x19, #:lo12:.LANCHOR211]
 	strb	w0, [x23, 1]
-.L2935:
+.L2948:
 	ldrb	w1, [x19, #:lo12:.LANCHOR211]
 	add	x22, x19, :lo12:.LANCHOR211
 	ldr	x3, [x21, #:lo12:.LANCHOR210]
@@ -18468,19 +18571,19 @@ flash_info_blk_init:
 	movk	w24, 0x5359, lsl 16
 	mul	w23, w23, w1
 	add	w23, w23, w0, sxth
-.L2936:
+.L2949:
 	sub	w0, w25, w22
 	sxth	w19, w0
-	tbz	w19, #31, .L2939
+	tbz	w19, #31, .L2952
 	cmn	w19, #1
-	bne	.L2938
+	bne	.L2951
 	ldr	x0, [x20, #:lo12:.LANCHOR27]
 	ldr	w1, [x0]
 	adrp	x0, .LC175
 	add	x0, x0, :lo12:.LC175
 	bl	printf
-	b	.L2958
-.L2939:
+	b	.L2971
+.L2952:
 	ldr	x3, [x21, #:lo12:.LANCHOR210]
 	mov	w4, 4
 	ldr	x2, [x20, #:lo12:.LANCHOR27]
@@ -18488,22 +18591,22 @@ flash_info_blk_init:
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L2937
+	beq	.L2950
 	ldr	x0, [x20, #:lo12:.LANCHOR27]
 	ldr	w0, [x0]
 	cmp	w0, w24
-	beq	.L2938
-.L2937:
+	beq	.L2951
+.L2950:
 	add	w22, w22, 1
-	b	.L2936
-.L2938:
+	b	.L2949
+.L2951:
 	cmp	w22, 1
-	bls	.L2942
+	bls	.L2955
 	bl	flash_info_flush
-.L2942:
+.L2955:
 	mov	w0, 0
-	b	.L2927
-.L2930:
+	b	.L2940
+.L2943:
 	adrp	x19, .LANCHOR211
 	add	x1, x19, :lo12:.LANCHOR211
 	ldrb	w3, [x2, 37]
@@ -18517,10 +18620,10 @@ flash_info_blk_init:
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	bne	.L2940
-.L2941:
+	bne	.L2953
+.L2954:
 	mov	w22, 0
-	b	.L2934
+	b	.L2947
 	.size	flash_info_blk_init, .-flash_info_blk_init
 	.section	.text.nand_flash_init,"ax",@progbits
 	.align	2
@@ -18537,14 +18640,14 @@ nand_flash_init:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	tbz	x0, 12, .L2960
+	tbz	x0, 12, .L2973
 	adrp	x2, .LANCHOR213
 	adrp	x0, .LC97
 	add	x2, x2, :lo12:.LANCHOR213
-	mov	w1, 3407
+	mov	w1, 3429
 	add	x0, x0, :lo12:.LC97
 	bl	printf
-.L2960:
+.L2973:
 	adrp	x0, .LANCHOR172
 	adrp	x24, .LANCHOR16
 	adrp	x22, .LANCHOR48
@@ -18574,19 +18677,19 @@ nand_flash_init:
 	adrp	x0, .LANCHOR148
 	add	x0, x0, :lo12:.LANCHOR148
 	bl	ftl_memset
-.L2966:
+.L2979:
 	mov	x1, x25
 	mov	w0, w20
 	bl	flash_read_id
-	cbnz	w20, .L2961
+	cbnz	w20, .L2974
 	ldrb	w0, [x26]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bls	.L2962
-.L2964:
+	bls	.L2975
+.L2977:
 	mov	w8, -2
-.L2959:
+.L2972:
 	mov	w0, w8
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -18595,35 +18698,35 @@ nand_flash_init:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2962:
+.L2975:
 	ldrb	w0, [x26, 1]
 	cmp	w0, 255
-	beq	.L2964
-.L2961:
+	beq	.L2977
+.L2974:
 	ldrb	w0, [x25]
 	cmp	w0, 181
-	bne	.L2965
+	bne	.L2978
 	strb	w27, [x25]
-.L2965:
+.L2978:
 	add	w20, w20, 1
 	add	x25, x25, 8
 	and	w20, w20, 255
 	cmp	w20, 4
-	bne	.L2966
+	bne	.L2979
 	adrp	x0, .LANCHOR214
 	add	x8, x0, :lo12:.LANCHOR214
 	add	x8, x8, 1
 	mov	x7, x0
 	add	x12, x22, :lo12:.LANCHOR48
 	mov	x10, 0
-.L2969:
+.L2982:
 	ldrb	w2, [x8, -1]
 	mov	w11, w10
 	lsl	x25, x10, 5
 	mov	x1, x12
 	mov	x0, x8
 	bl	flash_mem_cmp8
-	cbnz	w0, .L2967
+	cbnz	w0, .L2980
 	add	x0, x7, :lo12:.LANCHOR214
 	ubfiz	x11, x11, 5, 32
 	add	x25, x0, x25
@@ -18632,17 +18735,17 @@ nand_flash_init:
 	add	x4, x1, :lo12:.LANCHOR215
 	ldrb	w3, [x0, 22]
 	mov	x0, 0
-.L2968:
+.L2981:
 	lsl	x5, x0, 5
 	mov	w2, w0
 	ldrb	w5, [x5, x4]
 	cmp	w5, w3
-	beq	.L2970
+	beq	.L2983
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L2968
+	bne	.L2981
 	mov	w2, w0
-.L2970:
+.L2983:
 	ubfiz	x0, x2, 5, 32
 	add	x1, x1, :lo12:.LANCHOR215
 	add	x1, x1, x0
@@ -18658,29 +18761,29 @@ nand_flash_init:
 	bl	ftl_memcpy
 	ldrb	w0, [x26, #:lo12:.LANCHOR28]
 	cmp	w0, 8
-	bhi	.L2971
+	bhi	.L2984
 	ldrb	w0, [x20, 20]
 	cmp	w0, 60
-	bls	.L2971
+	bls	.L2984
 	mov	w0, 60
 	strb	w0, [x20, 20]
-.L2971:
+.L2984:
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3001
+	tbz	x0, 12, .L3014
 	adrp	x2, .LANCHOR213
 	adrp	x0, .LC97
 	add	x2, x2, :lo12:.LANCHOR213
-	mov	w1, 3434
+	mov	w1, 3456
 	add	x0, x0, :lo12:.LC97
 	bl	printf
-.L3001:
+.L3014:
 	ldr	x0, [x24, #:lo12:.LANCHOR16]
 	ldrh	w0, [x0, 10]
 	cmp	w0, 1023
-	bls	.L2972
+	bls	.L2985
 	mov	w0, 2
 	strb	w0, [x23, #:lo12:.LANCHOR32]
-.L2972:
+.L2985:
 	mov	w0, 16384
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR176
@@ -18762,85 +18865,86 @@ nand_flash_init:
 	strb	w0, [x1, #:lo12:.LANCHOR17]
 	ldrb	w0, [x26, #:lo12:.LANCHOR28]
 	cmp	w0, 9
-	bne	.L2973
+	bne	.L2986
 	mov	w3, 70
 	strb	w3, [x1, #:lo12:.LANCHOR17]
-.L2973:
+.L2986:
 	add	x1, x19, :lo12:.LANCHOR33
 	adrp	x24, .LANCHOR19
 	strb	w2, [x24, #:lo12:.LANCHOR19]
 	ldrb	w2, [x1, 31]
-	tbz	x2, 0, .L2974
+	tbz	x2, 0, .L2987
 	ldrb	w1, [x1, 29]
-	cbz	w1, .L2975
+	cbz	w1, .L2988
 	mov	w1, 2
-.L3033:
+.L3046:
 	strb	w1, [x24, #:lo12:.LANCHOR19]
-.L2974:
+.L2987:
 	cmp	w0, 8
-	bne	.L2976
+	bne	.L2989
 	ldrb	w0, [x22, #:lo12:.LANCHOR48]
 	mov	w1, 137
 	cmp	w0, 44
 	ccmp	w0, w1, 4, ne
-	bne	.L2976
+	bne	.L2989
 	add	x0, x19, :lo12:.LANCHOR33
 	ldrb	w0, [x0, 28]
 	cmp	w0, 3
-	bne	.L2976
+	bne	.L2989
 	strb	wzr, [x24, #:lo12:.LANCHOR19]
-.L2976:
-	add	x1, x19, :lo12:.LANCHOR33
+.L2989:
+	bl	nand_flash_exit_boot_rom_slc_mode
 	adrp	x27, .LANCHOR24
+	add	x1, x19, :lo12:.LANCHOR33
 	ldrb	w0, [x1, 19]
 	ldrh	w1, [x1, 16]
 	strb	w0, [x27, #:lo12:.LANCHOR24]
-	tbz	x1, 6, .L2978
+	tbz	x1, 6, .L2991
 	sub	w1, w0, #17
 	and	w1, w1, 255
 	cmp	w1, 2
 	ccmp	w0, 21, 4, hi
-	bne	.L2979
+	bne	.L2992
 	adrp	x1, micron_read_retrial
 	add	x1, x1, :lo12:micron_read_retrial
 	str	x1, [x20, #:lo12:.LANCHOR174]
 	cmp	w0, 21
 	adrp	x0, .LANCHOR169
-	beq	.L2980
+	beq	.L2993
 	mov	w1, 15
-.L3035:
+.L3048:
 	strb	w1, [x0, #:lo12:.LANCHOR169]
-.L2978:
+.L2991:
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2989
+	tbz	x0, 12, .L3002
 	adrp	x2, .LANCHOR213
 	adrp	x0, .LC97
 	add	x2, x2, :lo12:.LANCHOR213
-	mov	w1, 3527
+	mov	w1, 3549
 	add	x0, x0, :lo12:.LC97
 	bl	printf
-.L2989:
+.L3002:
 	adrp	x26, .LANCHOR21
 	ldrb	w0, [x25, #:lo12:.LANCHOR49]
 	strb	wzr, [x26, #:lo12:.LANCHOR21]
-	tbz	x0, 0, .L2990
+	tbz	x0, 0, .L3003
 	ldrb	w0, [x22, #:lo12:.LANCHOR48]
 	cmp	w0, 155
-	beq	.L2991
+	beq	.L3004
 	mov	w0, 4
 	bl	flash_set_interface_mode
 	mov	w0, 4
 	bl	nandc_set_if_mode
-.L2991:
+.L3004:
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
-.L3037:
+.L3050:
 	bl	nandc_set_if_mode
 	bl	flash_info_blk_init
 	mov	w8, w0
 	cmn	w0, #1
-	bne	.L2993
+	bne	.L3006
 	ldr	x0, [x23, #:lo12:.LANCHOR27]
 	mov	w1, 17
 	strb	w1, [x0, 32]
@@ -18848,44 +18952,44 @@ nand_flash_init:
 	strb	wzr, [x0, #:lo12:.LANCHOR34]
 	mov	w0, 0
 	bl	zftl_flash_exit_slc_mode
-	b	.L2959
-.L2967:
+	b	.L2972
+.L2980:
 	add	x10, x10, 1
 	add	x8, x8, 32
 	cmp	x10, 49
-	bne	.L2969
-	b	.L2964
-.L2975:
+	bne	.L2982
+	b	.L2977
+.L2988:
 	mov	w1, 3
-	b	.L3033
-.L2980:
+	b	.L3046
+.L2993:
 	mov	w1, 4
-	b	.L3035
-.L2979:
+	b	.L3048
+.L2992:
 	sub	w1, w0, #65
 	cmp	w0, 33
 	and	w1, w1, 255
 	ccmp	w1, 1, 0, ne
-	bhi	.L2982
+	bhi	.L2995
 	adrp	x0, toshiba_read_retrial
 	add	x0, x0, :lo12:toshiba_read_retrial
 	str	x0, [x20, #:lo12:.LANCHOR174]
 	adrp	x0, .LANCHOR26
 	mov	w1, 4
 	strb	w1, [x0, #:lo12:.LANCHOR26]
-.L3039:
+.L3052:
 	mov	w1, 7
-.L3038:
+.L3051:
 	adrp	x0, .LANCHOR169
-	b	.L3035
-.L2982:
+	b	.L3048
+.L2995:
 	sub	w2, w0, #34
 	sub	w1, w0, #67
 	and	w2, w2, 255
 	and	w1, w1, 255
 	cmp	w2, 1
 	ccmp	w1, 1, 0, hi
-	bhi	.L2983
+	bhi	.L2996
 	adrp	x2, toshiba_read_retrial
 	add	x2, x2, :lo12:toshiba_read_retrial
 	str	x2, [x20, #:lo12:.LANCHOR174]
@@ -18893,43 +18997,43 @@ nand_flash_init:
 	mov	w2, 68
 	ccmp	w0, w2, 4, ne
 	adrp	x0, .LANCHOR169
-	beq	.L2984
+	beq	.L2997
 	mov	w2, 7
-.L3034:
+.L3047:
 	strb	w2, [x0, #:lo12:.LANCHOR169]
 	cmp	w1, 1
 	adrp	x0, .LANCHOR26
-	bhi	.L2986
+	bhi	.L2999
 	mov	w1, 4
-.L3036:
+.L3049:
 	strb	w1, [x0, #:lo12:.LANCHOR26]
-	b	.L2978
-.L2984:
+	b	.L2991
+.L2997:
 	mov	w2, 17
-	b	.L3034
-.L2986:
+	b	.L3047
+.L2999:
 	mov	w1, 5
-	b	.L3036
-.L2983:
+	b	.L3049
+.L2996:
 	sub	w1, w0, #36
 	and	w1, w1, 255
 	cmp	w1, 1
-	bhi	.L2987
+	bhi	.L3000
 	adrp	x0, toshiba_3d_read_retrial
 	add	x0, x0, :lo12:toshiba_3d_read_retrial
 	str	x0, [x20, #:lo12:.LANCHOR174]
-	b	.L3039
-.L2987:
+	b	.L3052
+.L3000:
 	cmp	w0, 50
-	bne	.L2988
+	bne	.L3001
 	adrp	x0, samsung_read_retrial
 	mov	w1, 25
 	add	x0, x0, :lo12:samsung_read_retrial
 	str	x0, [x20, #:lo12:.LANCHOR174]
-	b	.L3038
-.L2988:
+	b	.L3051
+.L3001:
 	cmp	w0, 81
-	bne	.L2978
+	bne	.L2991
 	adrp	x0, ymtc_3d_read_retrial
 	add	x0, x0, :lo12:ymtc_3d_read_retrial
 	str	x0, [x20, #:lo12:.LANCHOR174]
@@ -18938,35 +19042,35 @@ nand_flash_init:
 	strb	w1, [x0, #:lo12:.LANCHOR169]
 	adrp	x0, .LANCHOR51
 	strb	wzr, [x0, #:lo12:.LANCHOR51]
-	b	.L2978
-.L2990:
+	b	.L2991
+.L3003:
 	mov	w0, 4
-	b	.L3037
-.L2993:
+	b	.L3050
+.L3006:
 	add	x19, x19, :lo12:.LANCHOR33
 	ldrb	w0, [x19, 7]
 	cmp	w0, 9
-	bne	.L2994
+	bne	.L3007
 	ldr	x0, [x23, #:lo12:.LANCHOR27]
 	ldrb	w0, [x0, 20]
 	cmp	w0, 1
-	beq	.L2994
+	beq	.L3007
 	strb	wzr, [x24, #:lo12:.LANCHOR19]
-.L2994:
+.L3007:
 	ldrb	w0, [x27, #:lo12:.LANCHOR24]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 7
-	bhi	.L2995
+	bhi	.L3008
 	adrp	x0, hynix_read_retrial
 	add	x0, x0, :lo12:hynix_read_retrial
 	str	x0, [x20, #:lo12:.LANCHOR174]
-.L2995:
+.L3008:
 	ldrb	w0, [x25, #:lo12:.LANCHOR49]
-	tbz	x0, 2, .L2997
+	tbz	x0, 2, .L3010
 	ldr	x0, [x23, #:lo12:.LANCHOR27]
 	ldrb	w0, [x0, 19]
-	cbz	w0, .L2997
+	cbz	w0, .L3010
 	adrp	x0, .LANCHOR211
 	ldrb	w1, [x0, #:lo12:.LANCHOR211]
 	adrp	x0, .LANCHOR2
@@ -18975,23 +19079,24 @@ nand_flash_init:
 	mov	w0, 0
 	bl	flash_ddr_para_scan
 	ldrb	w0, [x26, #:lo12:.LANCHOR21]
-	cbnz	w0, .L2997
+	cbnz	w0, .L3010
 	ldr	x0, [x23, #:lo12:.LANCHOR27]
 	strb	wzr, [x0, 19]
 	bl	flash_info_flush
-.L2997:
+.L3010:
+	bl	nand_flash_exit_boot_rom_slc_mode
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2999
+	tbz	x0, 12, .L3012
 	adrp	x2, .LANCHOR213
 	adrp	x0, .LC97
 	add	x2, x2, :lo12:.LANCHOR213
-	mov	w1, 3625
+	mov	w1, 3647
 	add	x0, x0, :lo12:.LC97
 	bl	printf
-.L2999:
+.L3012:
 	bl	nand_flash_print_info
 	mov	w8, 0
-	b	.L2959
+	b	.L2972
 	.size	nand_flash_init, .-nand_flash_init
 	.section	.text.ftl_sysblk_dump,"ax",@progbits
 	.align	2
@@ -19019,10 +19124,10 @@ ftl_sysblk_dump:
 	add	x26, x26, :lo12:.LANCHOR111
 	add	x27, x27, :lo12:.LANCHOR131
 	mov	w19, 0
-.L3041:
+.L3054:
 	ldrh	w0, [x25]
 	cmp	w0, w19
-	bhi	.L3043
+	bhi	.L3056
 	add	x1, x28, 704
 	mov	w3, 32
 	mov	w2, 4
@@ -19031,14 +19136,14 @@ ftl_sysblk_dump:
 	bl	rknand_print_hex
 	mov	x0, x24
 	bl	zbuf_free
-	cbz	w20, .L3044
+	cbz	w20, .L3057
 	adrp	x1, .LANCHOR218
 	adrp	x0, .LC0
 	mov	w2, 1611
 	add	x1, x1, :lo12:.LANCHOR218
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3044:
+.L3057:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
@@ -19048,7 +19153,7 @@ ftl_sysblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 144
 	ret
-.L3043:
+.L3056:
 	ldrh	w21, [x26]
 	ldrb	w3, [x27]
 	ldr	x1, [x24, 8]
@@ -19083,7 +19188,7 @@ ftl_sysblk_dump:
 	cmp	w22, 512
 	ccmn	w22, #1, 4, ne
 	csinc	w20, w20, wzr, ne
-	b	.L3041
+	b	.L3054
 	.size	ftl_sysblk_dump, .-ftl_sysblk_dump
 	.section	.text.ftl_open_sblk_recovery,"ax",@progbits
 	.align	2
@@ -19100,49 +19205,49 @@ ftl_open_sblk_recovery:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	str	x1, [x29, 136]
-	tbz	x0, 12, .L3052
+	str	x1, [x29, 144]
+	tbz	x0, 12, .L3065
 	ldrh	w1, [x19, 2]
 	adrp	x0, .LC177
 	add	x0, x0, :lo12:.LC177
 	bl	printf
-.L3052:
+.L3065:
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3053
+	tbz	x0, 12, .L3066
 	ldrb	w1, [x19, 5]
 	adrp	x0, .LC178
 	add	x0, x0, :lo12:.LC178
 	bl	printf
-.L3053:
+.L3066:
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3054
+	tbz	x0, 12, .L3067
 	ldrh	w1, [x19]
 	adrp	x0, .LC179
 	add	x0, x0, :lo12:.LC179
 	bl	printf
-.L3054:
+.L3067:
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3055
+	tbz	x0, 12, .L3068
 	ldrh	w2, [x19, 18]
 	adrp	x0, .LC180
 	ldrh	w1, [x19, 16]
 	add	x0, x0, :lo12:.LC180
 	bl	printf
-.L3055:
+.L3068:
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3056
+	tbz	x0, 12, .L3069
 	ldrb	w1, [x19, 9]
 	adrp	x0, .LC181
 	add	x0, x0, :lo12:.LC181
 	bl	printf
-.L3056:
+.L3069:
 	ldrh	w0, [x19, 10]
 	strh	w0, [x19, 14]
 	adrp	x0, .LANCHOR6
 	ldrh	w1, [x19]
 	ldrh	w0, [x0, #:lo12:.LANCHOR6]
 	cmp	w1, w0
-	bcs	.L3051
+	bcs	.L3064
 	mov	w0, 1
 	adrp	x22, .LANCHOR131
 	bl	buf_alloc
@@ -19156,7 +19261,7 @@ ftl_open_sblk_recovery:
 	lsl	w0, w0, 7
 	add	x0, x1, x0, sxtw 2
 	mov	w1, 255
-	str	x0, [x29, 144]
+	str	x0, [x29, 152]
 	mov	x0, x26
 	bl	ftl_memset
 	mov	w2, 64
@@ -19171,14 +19276,13 @@ ftl_open_sblk_recovery:
 	adrp	x0, .LANCHOR111
 	ldrh	w24, [x19, 2]
 	add	x0, x0, :lo12:.LANCHOR111
-	str	wzr, [x29, 156]
-	str	x0, [x29, 120]
-.L3058:
+	str	x0, [x29, 128]
+.L3071:
 	adrp	x25, .LANCHOR95
 	ldrh	w0, [x25, #:lo12:.LANCHOR95]
 	cmp	w0, w24
-	bhi	.L3073
-.L3061:
+	bhi	.L3086
+.L3074:
 	ldrh	w0, [x19, 10]
 	ldrh	w1, [x19, 6]
 	ldrh	w2, [x25, #:lo12:.LANCHOR95]
@@ -19188,23 +19292,23 @@ ftl_open_sblk_recovery:
 	strb	w23, [x19, 5]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L3074
+	beq	.L3087
 	adrp	x1, .LANCHOR219
 	adrp	x0, .LC0
 	mov	w2, 1794
 	add	x1, x1, :lo12:.LANCHOR219
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3074:
+.L3087:
 	adrp	x2, .LANCHOR117
 	ldrh	w3, [x19, 10]
 	mov	w0, 0
 	mov	w1, 0
 	ldr	x4, [x2, #:lo12:.LANCHOR117]
-	str	x2, [x29, 144]
-.L3075:
+	str	x2, [x29, 152]
+.L3088:
 	cmp	w1, w3
-	bcc	.L3077
+	bcc	.L3090
 	ldrb	w23, [x19, 9]
 	adrp	x24, .LANCHOR9
 	ldrh	w1, [x25, #:lo12:.LANCHOR95]
@@ -19212,7 +19316,7 @@ ftl_open_sblk_recovery:
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
 	sub	w23, w23, w3
 	and	w23, w23, 65535
-	tbz	x0, 12, .L3078
+	tbz	x0, 12, .L3091
 	ldrh	w1, [x19]
 	ldr	x2, [x24, #:lo12:.LANCHOR9]
 	ubfiz	x0, x1, 1, 16
@@ -19221,18 +19325,18 @@ ftl_open_sblk_recovery:
 	mov	w2, w23
 	add	x0, x0, :lo12:.LC184
 	bl	printf
-.L3078:
+.L3091:
 	ldr	x0, [x24, #:lo12:.LANCHOR9]
 	ldrh	w1, [x19]
 	strh	w23, [x0, x1, lsl 1]
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 14, .L3079
+	tbz	x0, 14, .L3092
 	ldp	w1, w2, [x29, 176]
 	adrp	x0, .LC185
 	ldp	w3, w4, [x29, 184]
 	add	x0, x0, :lo12:.LC185
 	bl	printf
-.L3079:
+.L3092:
 	ldr	x0, [x20, 8]
 	mov	w1, 0
 	ldrb	w2, [x22, #:lo12:.LANCHOR131]
@@ -19242,28 +19346,28 @@ ftl_open_sblk_recovery:
 	bl	ftl_memset
 	adrp	x0, .LC187
 	add	x0, x0, :lo12:.LC187
-	str	x0, [x29, 128]
+	str	x0, [x29, 136]
 	add	x0, x28, :lo12:.LANCHOR80
-	str	x0, [x29, 120]
-.L3080:
+	str	x0, [x29, 128]
+.L3093:
 	ldrb	w0, [x28, #:lo12:.LANCHOR80]
 	add	x1, x28, :lo12:.LANCHOR80
 	str	w24, [x29, 168]
 	mul	w0, w0, w27
 	cmp	w24, w0
-	bcc	.L3092
+	bcc	.L3104
 	adrp	x24, .LC188
 	adrp	x23, .LC187
 	add	x24, x24, :lo12:.LC188
 	add	x23, x23, :lo12:.LC187
 	mov	x28, 0
 	str	x1, [x29, 160]
-.L3093:
+.L3105:
 	ldr	x0, [x29, 160]
 	ldrb	w0, [x0]
 	mul	w0, w0, w27
 	cmp	w0, w28
-	bhi	.L3099
+	bhi	.L3111
 	mov	x0, x20
 	bl	zbuf_free
 	ldrh	w1, [x19, 12]
@@ -19272,24 +19376,24 @@ ftl_open_sblk_recovery:
 	madd	w0, w0, w2, w1
 	mov	x1, -4
 	add	x0, x1, x0, sxtw 2
-	ldr	x1, [x29, 144]
+	ldr	x1, [x29, 152]
 	ldr	x1, [x1, #:lo12:.LANCHOR117]
 	ldr	w0, [x1, x0]
 	cmn	w0, #1
-	beq	.L3100
+	beq	.L3112
 	adrp	x1, .LANCHOR219
 	adrp	x0, .LC0
 	mov	w2, 1909
 	add	x1, x1, :lo12:.LANCHOR219
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3100:
+.L3112:
 	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bne	.L3051
+	bne	.L3064
 	mov	x0, x19
 	bl	ftl_write_last_log_page
-.L3051:
+.L3064:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -19297,28 +19401,28 @@ ftl_open_sblk_recovery:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 368
 	ret
-.L3073:
+.L3086:
 	ldrb	w23, [x19, 5]
 	adrp	x0, .LANCHOR198
 	add	x0, x0, :lo12:.LANCHOR198
-	str	x0, [x29, 128]
-.L3059:
+	str	x0, [x29, 136]
+.L3072:
 	ldrb	w0, [x19, 9]
 	cmp	w0, w23
-	bhi	.L3072
+	bhi	.L3085
 	add	w24, w24, 1
 	strb	wzr, [x19, 5]
 	and	w24, w24, 65535
-	b	.L3058
-.L3072:
+	b	.L3071
+.L3085:
 	add	x0, x19, x23, sxtw 1
 	ldrh	w0, [x0, 16]
 	str	w0, [x29, 168]
 	mov	w0, 65535
 	ldr	w1, [x29, 168]
 	cmp	w1, w0
-	beq	.L3060
-	ldr	x0, [x29, 120]
+	beq	.L3073
+	ldr	x0, [x29, 128]
 	ldrb	w3, [x22, #:lo12:.LANCHOR131]
 	ldr	x2, [x20, 24]
 	ldrh	w0, [x0]
@@ -19328,36 +19432,36 @@ ftl_open_sblk_recovery:
 	bl	ftl_read_ppa_page
 	mov	w28, w0
 	cmp	w0, 512
-	beq	.L3061
+	beq	.L3074
 	cmn	w0, #1
-	beq	.L3062
+	beq	.L3075
 	ldr	x0, [x20, 24]
 	ldr	w1, [x0]
 	cmn	w1, #1
-	bne	.L3062
+	bne	.L3075
 	ldr	w0, [x0, 4]
 	cmn	w0, #1
-	bne	.L3062
+	bne	.L3075
 	ldr	x0, [x20, 8]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L3061
-.L3062:
-	ldr	x1, [x29, 128]
+	beq	.L3074
+.L3075:
+	ldr	x1, [x29, 136]
 	mov	w0, 1
 	strb	w0, [x1]
 	ldrb	w0, [x19, 9]
 	ldrh	w1, [x19, 10]
 	madd	w0, w0, w24, w23
 	cmp	w1, w0
-	beq	.L3063
+	beq	.L3076
 	adrp	x1, .LANCHOR219
 	adrp	x0, .LC0
 	mov	w2, 1686
 	add	x1, x1, :lo12:.LANCHOR219
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3063:
+.L3076:
 	ldrh	w0, [x19, 10]
 	ldrh	w1, [x19, 6]
 	ldrb	w2, [x19, 9]
@@ -19365,39 +19469,39 @@ ftl_open_sblk_recovery:
 	ldrh	w0, [x25, #:lo12:.LANCHOR95]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L3064
+	beq	.L3077
 	adrp	x1, .LANCHOR219
 	adrp	x0, .LC0
 	mov	w2, 1687
 	add	x1, x1, :lo12:.LANCHOR219
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3064:
+.L3077:
 	ldrb	w0, [x22, #:lo12:.LANCHOR131]
 	cmp	w0, 8
-	bls	.L3065
+	bls	.L3078
 	ldr	x6, [x20, 24]
 	mov	w1, 15555
 	movk	w1, 0xf55f, lsl 16
 	ldr	w0, [x6]
 	cmp	w0, w1
-	beq	.L3065
+	beq	.L3078
 	cmn	w28, #1
-	beq	.L3067
+	beq	.L3080
 	ldr	w0, [x6, 4]
 	cmn	w0, #1
-	beq	.L3068
+	beq	.L3081
 	ldr	w1, [x6, 16]
 	mov	w0, 21320
 	movk	w0, 0x4841, lsl 16
 	cmp	w1, w0
-	bne	.L3068
-	ldr	x0, [x29, 144]
+	bne	.L3081
+	ldr	x0, [x29, 152]
 	mov	w1, 1024
 	bl	js_hash
 	ldr	w1, [x6, 20]
 	cmp	w1, w0
-	beq	.L3068
+	beq	.L3081
 	ldr	w3, [x29, 160]
 	mov	w5, w0
 	ldr	w1, [x29, 168]
@@ -19406,7 +19510,7 @@ ftl_open_sblk_recovery:
 	adrp	x0, .LC182
 	add	x0, x0, :lo12:.LC182
 	bl	printf
-	ldr	x1, [x29, 144]
+	ldr	x1, [x29, 152]
 	mov	w3, 16
 	mov	w2, 4
 	adrp	x0, .LC183
@@ -19419,7 +19523,7 @@ ftl_open_sblk_recovery:
 	add	x0, x0, :lo12:.LC150
 	lsr	w3, w3, 1
 	bl	rknand_print_hex
-.L3067:
+.L3080:
 	ldrh	w0, [x19, 6]
 	mov	w27, 4
 	sub	w0, w0, #1
@@ -19427,34 +19531,32 @@ ftl_open_sblk_recovery:
 	ldrh	w0, [x19, 10]
 	add	w0, w0, 1
 	strh	w0, [x19, 10]
-	mov	w0, 1
-	str	w0, [x29, 156]
-.L3060:
+.L3073:
 	add	w23, w23, 1
 	and	w23, w23, 65535
-	b	.L3059
-.L3065:
+	b	.L3072
+.L3078:
 	cmn	w28, #1
-	beq	.L3067
-.L3068:
+	beq	.L3080
+.L3081:
 	ldr	x1, [x20, 24]
 	ldr	w0, [x1, 4]
 	cmn	w0, #1
-	beq	.L3067
+	beq	.L3080
 	ldr	w1, [x1]
 	mov	w2, 15555
 	movk	w2, 0xf55f, lsl 16
 	cmp	w1, w2
-	beq	.L3067
+	beq	.L3080
 	bl	lpa_hash_get_ppa
-	ldr	x1, [x29, 136]
-	cbz	x1, .L3070
+	ldr	x1, [x29, 144]
+	cbz	x1, .L3083
 	ldr	x3, [x20, 24]
 	ldr	w1, [x3, 8]
 	cmp	w0, w1
-	beq	.L3070
+	beq	.L3083
 	cmn	w0, #1
-	beq	.L3070
+	beq	.L3083
 	adrp	x4, .LANCHOR32
 	adrp	x5, .LANCHOR75
 	mov	w28, 24
@@ -19470,29 +19572,29 @@ ftl_open_sblk_recovery:
 	and	w1, w1, w2
 	ldrb	w2, [x6, #:lo12:.LANCHOR76]
 	udiv	w1, w1, w2
-	ldr	x2, [x29, 136]
+	ldr	x2, [x29, 144]
 	ldrh	w2, [x2]
 	cmp	w2, w1, uxth
-	bne	.L3070
+	bne	.L3083
 	ldr	w8, [x3]
 	adrp	x7, .LANCHOR193
 	ldrb	w3, [x22, #:lo12:.LANCHOR131]
 	add	x2, x7, :lo12:.LANCHOR193
 	ldr	x1, [x20, 8]
-	str	w8, [x29, 156]
+	str	w8, [x29, 124]
 	str	x7, [x29, 168]
 	stp	x6, x4, [x29, 96]
 	str	x5, [x29, 112]
 	bl	ftl_read_ppa_page
 	ldr	x7, [x29, 168]
-	ldr	w8, [x29, 156]
+	ldr	w8, [x29, 124]
 	ldr	w0, [x7, #:lo12:.LANCHOR193]
 	cmp	w8, w0
-	bhi	.L3070
+	bhi	.L3083
 	ldr	x0, [x20, 24]
 	ldr	w0, [x0, 8]
 	cmn	w0, #1
-	beq	.L3067
+	beq	.L3080
 	ldp	x6, x4, [x29, 96]
 	ldr	x5, [x29, 112]
 	ldrb	w2, [x4, #:lo12:.LANCHOR32]
@@ -19506,23 +19608,23 @@ ftl_open_sblk_recovery:
 	ldrb	w0, [x6, #:lo12:.LANCHOR76]
 	udiv	w0, w27, w0
 	bl	ftl_vpn_decrement
-	b	.L3067
-.L3077:
+	b	.L3080
+.L3090:
 	ldrh	w2, [x19, 12]
 	add	w2, w2, w1
 	ldr	w2, [x4, x2, lsl 2]
 	cmn	w2, #1
-	beq	.L3076
+	beq	.L3089
 	add	w23, w0, 1
 	and	w0, w23, 65535
-.L3076:
+.L3089:
 	add	w1, w1, 1
-	b	.L3075
-.L3092:
+	b	.L3088
+.L3104:
 	ldr	w0, [x26, x24, lsl 2]
 	cmn	w0, #1
-	bne	.L3081
-.L3085:
+	bne	.L3094
+.L3098:
 	adrp	x0, .LANCHOR110
 	ldr	x1, [x20, 24]
 	mov	w23, -1
@@ -19536,36 +19638,34 @@ ftl_open_sblk_recovery:
 	str	wzr, [x0]
 	mov	w0, 2
 	bl	ftl_debug_info_fill
-.L3082:
-	ldr	w0, [x29, 156]
-	cbz	w0, .L3087
+.L3095:
 	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bls	.L3087
+	bls	.L3100
 	add	x0, x21, :lo12:.LANCHOR14
 	str	x0, [x29, 160]
 	add	x0, x22, :lo12:.LANCHOR131
-	str	x0, [x29, 136]
-.L3152:
+	str	x0, [x29, 144]
+.L3164:
 	mov	x0, x19
 	bl	ftl_get_new_free_page
 	mov	w4, w0
 	ldr	x0, [x29, 160]
 	ldr	w0, [x0]
-	tbz	x0, 14, .L3089
+	tbz	x0, 14, .L3101
 	ldrh	w0, [x19, 12]
 	mov	w1, w4
 	ldrh	w3, [x19, 10]
-	str	w4, [x29, 112]
+	str	w4, [x29, 124]
 	add	w3, w3, w0
 	ldr	x0, [x20, 24]
 	sub	w3, w3, #1
 	ldr	w2, [x0, 4]
-	ldr	x0, [x29, 128]
+	ldr	x0, [x29, 136]
 	bl	printf
-	ldr	w4, [x29, 112]
-.L3089:
-	ldr	x0, [x29, 120]
+	ldr	w4, [x29, 124]
+.L3101:
+	ldr	x0, [x29, 128]
 	ldr	w2, [x29, 168]
 	ldrh	w1, [x19, 6]
 	ldrb	w0, [x0]
@@ -19573,23 +19673,23 @@ ftl_open_sblk_recovery:
 	add	w0, w0, 1
 	sub	w0, w0, w2
 	cmp	w1, w0
-	bls	.L3087
-	ldr	x0, [x29, 136]
+	bls	.L3100
+	ldr	x0, [x29, 144]
 	ldr	x1, [x20, 8]
 	ldr	x2, [x20, 24]
-	str	w4, [x29, 104]
+	str	w4, [x29, 112]
 	ldrb	w3, [x0]
 	mov	w0, w4
 	bl	ftl_prog_ppa_page
 	mov	w1, w0
 	ldrh	w0, [x19]
-	str	w1, [x29, 112]
+	str	w1, [x29, 124]
 	bl	ftl_vpn_decrement
-	ldr	w1, [x29, 112]
+	ldr	w1, [x29, 124]
 	cmn	w23, #1
-	ldr	w4, [x29, 104]
+	ldr	w4, [x29, 112]
 	ccmn	w1, #1, 4, ne
-	beq	.L3090
+	beq	.L3103
 	add	x0, x29, 240
 	ldrh	w1, [x19, 12]
 	str	w4, [x0, x24, lsl 2]
@@ -19598,10 +19698,10 @@ ftl_open_sblk_recovery:
 	add	x1, x29, 304
 	sub	w0, w0, #1
 	str	w0, [x1, x24, lsl 2]
-.L3087:
+.L3100:
 	add	x24, x24, 1
-	b	.L3080
-.L3081:
+	b	.L3093
+.L3094:
 	ldrb	w3, [x22, #:lo12:.LANCHOR131]
 	ldr	x1, [x20, 8]
 	ldr	x2, [x20, 24]
@@ -19612,7 +19712,7 @@ ftl_open_sblk_recovery:
 	bl	lpa_hash_get_ppa
 	mov	w4, w0
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 14, .L3083
+	tbz	x0, 14, .L3096
 	ldr	x0, [x20, 24]
 	mov	w1, w4
 	ldr	w2, [x26, x24, lsl 2]
@@ -19622,7 +19722,7 @@ ftl_open_sblk_recovery:
 	add	x0, x0, :lo12:.LC186
 	bl	printf
 	ldr	w4, [x29, 160]
-.L3083:
+.L3096:
 	ldr	x1, [x20, 24]
 	mov	x2, 0
 	ldr	w0, [x26, x24, lsl 2]
@@ -19634,20 +19734,20 @@ ftl_open_sblk_recovery:
 	mov	w0, 2
 	bl	ftl_debug_info_fill
 	cmn	w23, #1
-	bne	.L3082
-	b	.L3085
-.L3090:
+	bne	.L3095
+	b	.L3098
+.L3103:
 	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bls	.L3087
+	bls	.L3100
 	cmn	w23, #1
-	bne	.L3152
-	b	.L3087
-.L3099:
+	bne	.L3164
+	b	.L3100
+.L3111:
 	add	x0, x29, 240
 	ldr	w0, [x0, x28, lsl 2]
 	cmn	w0, #1
-	beq	.L3095
+	beq	.L3107
 	ldrb	w3, [x22, #:lo12:.LANCHOR131]
 	ldr	w0, [x26, x28, lsl 2]
 	ldr	x1, [x20, 8]
@@ -19655,7 +19755,7 @@ ftl_open_sblk_recovery:
 	bl	ftl_read_ppa_page
 	cmp	w0, 256
 	ccmn	w0, #1, 4, ne
-	bne	.L3095
+	bne	.L3107
 	add	x0, x29, 240
 	ldrb	w3, [x22, #:lo12:.LANCHOR131]
 	ldr	x1, [x20, 8]
@@ -19664,7 +19764,7 @@ ftl_open_sblk_recovery:
 	bl	ftl_read_ppa_page
 	mov	w5, w0
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 14, .L3097
+	tbz	x0, 14, .L3109
 	ldr	x0, [x20, 24]
 	mov	w1, w5
 	ldr	w3, [x26, x28, lsl 2]
@@ -19673,22 +19773,22 @@ ftl_open_sblk_recovery:
 	mov	x0, x23
 	bl	printf
 	ldr	w5, [x29, 168]
-.L3097:
+.L3109:
 	cmn	w5, #1
-	beq	.L3095
+	beq	.L3107
 	ldr	x0, [x20, 24]
 	ldr	w2, [x26, x28, lsl 2]
 	ldr	w1, [x0, 8]
 	cmp	w2, w1
-	bne	.L3095
+	bne	.L3107
 	ldr	w1, [x21, #:lo12:.LANCHOR14]
-	tbz	x1, 14, .L3098
+	tbz	x1, 14, .L3110
 	add	x1, x29, 304
 	ldr	w3, [x1, x28, lsl 2]
 	ldr	w1, [x0, 4]
 	mov	x0, x24
 	bl	printf
-.L3098:
+.L3110:
 	add	x1, x29, 304
 	ldr	x0, [x20, 24]
 	ldr	w1, [x1, x28, lsl 2]
@@ -19697,31 +19797,31 @@ ftl_open_sblk_recovery:
 	ldrh	w2, [x29, 168]
 	ldr	w0, [x0, 4]
 	bl	lpa_hash_update_ppa
-.L3095:
+.L3107:
 	add	x28, x28, 1
-	b	.L3093
-.L3070:
+	b	.L3105
+.L3083:
 	ldr	x3, [x20, 24]
 	adrp	x0, .LANCHOR128
 	ldr	w0, [x0, #:lo12:.LANCHOR128]
 	ldr	w1, [x3, 4]
 	cmp	w1, w0
-	bcs	.L3067
+	bcs	.L3080
 	ldrb	w0, [x19, 9]
 	ldrh	w1, [x25, #:lo12:.LANCHOR95]
 	ldrh	w2, [x19, 10]
 	mul	w0, w0, w1
 	sub	w0, w0, #1
 	cmp	w2, w0
-	bge	.L3067
+	bge	.L3080
 	adrp	x0, .LANCHOR110
 	ldr	w1, [x3]
 	ldr	x0, [x0, #:lo12:.LANCHOR110]
 	ldr	w4, [x0, 8]
 	cmp	w1, w4
-	bls	.L3071
+	bls	.L3084
 	str	w1, [x0, 8]
-.L3071:
+.L3084:
 	ldrh	w0, [x19, 12]
 	add	w2, w2, w0
 	ldp	w0, w1, [x3, 4]
@@ -19734,7 +19834,7 @@ ftl_open_sblk_recovery:
 	str	w0, [x29, 184]
 	ldr	w0, [x29, 160]
 	str	w0, [x29, 188]
-	b	.L3067
+	b	.L3080
 	.size	ftl_open_sblk_recovery, .-ftl_open_sblk_recovery
 	.section	.text.dump_ftl_info,"ax",@progbits
 	.align	2
@@ -19875,7 +19975,7 @@ pm_ppa_update_check:
 	ubfx	x3, x3, 5, 3
 	cmp	w3, 1
 	ccmp	w3, 7, 4, ne
-	bne	.L3184
+	bne	.L3196
 	mov	w3, w2
 	mov	w2, w1
 	mov	x1, x0
@@ -19888,7 +19988,7 @@ pm_ppa_update_check:
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
-.L3184:
+.L3196:
 	mov	w0, 0
 	ret
 	.size	pm_ppa_update_check, .-pm_ppa_update_check
@@ -19905,20 +20005,20 @@ load_l2p_region:
 	stp	x23, x24, [sp, 48]
 	cmp	w21, 7
 	stp	x25, x26, [sp, 64]
-	bls	.L3190
+	bls	.L3202
 	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
 	mov	w2, 32
 	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3190:
+.L3202:
 	adrp	x20, .LANCHOR110
 	mov	x25, x20
 	ldr	x0, [x20, #:lo12:.LANCHOR110]
 	ldrh	w2, [x0, 698]
 	cmp	w2, w19
-	bcs	.L3191
+	bcs	.L3203
 	mov	w1, w19
 	adrp	x0, .LC201
 	add	x0, x0, :lo12:.LC201
@@ -19932,26 +20032,26 @@ load_l2p_region:
 	ldr	x0, [x20, #:lo12:.LANCHOR110]
 	ldrh	w0, [x0, 698]
 	cmp	w0, w19
-	bcc	.L3192
-.L3202:
+	bcc	.L3204
+.L3214:
 	mov	w0, 0
-.L3189:
+.L3201:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L3192:
+.L3204:
 	mov	w2, 37
-.L3203:
+.L3215:
 	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3202
-.L3191:
+	b	.L3214
+.L3203:
 	add	x0, x0, x19, sxtw 2
 	adrp	x22, .LANCHOR138
 	add	x1, x22, :lo12:.LANCHOR138
@@ -19960,7 +20060,7 @@ load_l2p_region:
 	add	x26, x1, x0
 	strh	w19, [x1, x0]
 	strh	wzr, [x26, 2]
-	cbnz	w23, .L3194
+	cbnz	w23, .L3206
 	mov	w1, w19
 	mov	w2, 0
 	adrp	x0, .LC202
@@ -19971,8 +20071,8 @@ load_l2p_region:
 	ldrh	w2, [x0, #:lo12:.LANCHOR221]
 	ldr	x0, [x26, 8]
 	bl	ftl_memset
-	b	.L3202
-.L3194:
+	b	.L3214
+.L3206:
 	adrp	x20, .LANCHOR207
 	adrp	x24, .LANCHOR131
 	ldr	x1, [x26, 8]
@@ -19983,18 +20083,18 @@ load_l2p_region:
 	ldr	x1, [x20, #:lo12:.LANCHOR207]
 	ldr	w2, [x1]
 	cmp	w2, w19
-	bne	.L3195
+	bne	.L3207
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L3195
-.L3199:
+	beq	.L3207
+.L3211:
 	ldr	x0, [x20, #:lo12:.LANCHOR207]
 	ldr	w0, [x0]
 	cmp	w19, w0
-	beq	.L3202
+	beq	.L3214
 	mov	w2, 73
-	b	.L3203
-.L3195:
+	b	.L3215
+.L3207:
 	mov	w4, w23
 	mov	w3, w0
 	mov	w1, w19
@@ -20030,21 +20130,21 @@ load_l2p_region:
 	bl	ftl_read_ppa_page
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3198
+	bne	.L3210
 	adrp	x0, .LANCHOR221
 	mov	w1, 255
 	ldrh	w2, [x0, #:lo12:.LANCHOR221]
 	ldr	x0, [x21, 8]
 	bl	ftl_memset
-.L3200:
+.L3212:
 	mov	w0, -1
-	b	.L3189
-.L3198:
+	b	.L3201
+.L3210:
 	ldr	x0, [x20, #:lo12:.LANCHOR207]
 	ldr	w0, [x0]
 	cmp	w19, w0
-	beq	.L3199
-	b	.L3200
+	beq	.L3211
+	b	.L3212
 	.size	load_l2p_region, .-load_l2p_region
 	.section	.text.pm_gc,"ax",@progbits
 	.align	2
@@ -20067,26 +20167,26 @@ pm_gc:
 	ldrh	w1, [x0, #:lo12:.LANCHOR155]
 	sub	w1, w1, #1
 	cmp	w2, w1
-	bge	.L3205
+	bge	.L3217
 	ldr	w0, [x21, #:lo12:.LANCHOR151]
-	cbz	w0, .L3206
-.L3205:
+	cbz	w0, .L3218
+.L3217:
 	bl	pm_free_sblk
 	ldr	x2, [x19, #:lo12:.LANCHOR110]
 	ldrh	w1, [x20, #:lo12:.LANCHOR155]
 	sub	w1, w1, #1
 	ldrh	w3, [x2, 688]
 	cmp	w3, w1
-	bge	.L3207
+	bge	.L3219
 	ldr	w1, [x21, #:lo12:.LANCHOR151]
-	cbz	w1, .L3206
-.L3207:
+	cbz	w1, .L3218
+.L3219:
 	add	x0, x2, x0, uxth 1
 	str	wzr, [x21, #:lo12:.LANCHOR151]
 	mov	w20, 65535
 	ldrh	w21, [x0, 416]
 	cmp	w21, w20
-	bne	.L3209
+	bne	.L3221
 	adrp	x1, .LANCHOR222
 	add	x1, x1, :lo12:.LANCHOR222
 	mov	w2, 182
@@ -20098,8 +20198,8 @@ pm_gc:
 	add	x0, x1, x0, uxth 1
 	ldrh	w21, [x0, 416]
 	cmp	w21, w20
-	beq	.L3206
-.L3209:
+	beq	.L3218
+.L3221:
 	bl	pm_select_ram_region
 	and	x22, x0, 65535
 	lsl	x0, x22, 4
@@ -20110,29 +20210,29 @@ pm_gc:
 	ldrh	w0, [x1, x0]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3210
+	beq	.L3222
 	ldr	x1, [x23, 8]
-	cbz	x1, .L3210
+	cbz	x1, .L3222
 	ldrsh	w2, [x23, 2]
-	tbz	w2, #31, .L3210
+	tbz	w2, #31, .L3222
 	bl	pm_write_page
 	ldrh	w0, [x23, 2]
 	and	w0, w0, 32767
 	strh	w0, [x23, 2]
-.L3210:
+.L3222:
 	adrp	x23, .LANCHOR75
 	adrp	x24, .LANCHOR32
 	add	x23, x23, :lo12:.LANCHOR75
 	add	x24, x24, :lo12:.LANCHOR32
 	mov	w27, 0
 	mov	w26, 24
-.L3211:
+.L3223:
 	ldr	x2, [x19, #:lo12:.LANCHOR110]
 	ldrh	w0, [x2, 698]
 	cmp	w0, w27
-	bhi	.L3214
+	bhi	.L3226
 	bl	pm_free_sblk
-.L3206:
+.L3218:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -20141,7 +20241,7 @@ pm_gc:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L3214:
+.L3226:
 	ldrb	w0, [x24]
 	add	x2, x2, x27, sxtw 2
 	ldrh	w3, [x23]
@@ -20157,25 +20257,25 @@ pm_gc:
 	ldrb	w1, [x1, #:lo12:.LANCHOR76]
 	udiv	w0, w0, w1
 	cmp	w21, w0, uxth
-	bne	.L3212
+	bne	.L3224
 	mov	w1, w25
 	mov	w0, w27
 	bl	load_l2p_region
-	cbnz	w0, .L3213
+	cbnz	w0, .L3225
 	add	x0, x20, :lo12:.LANCHOR138
 	add	x0, x0, x22, lsl 4
 	ldr	x1, [x0, 8]
 	mov	w0, w27
 	bl	pm_write_page
-.L3213:
+.L3225:
 	add	x1, x20, :lo12:.LANCHOR138
 	lsl	x0, x22, 4
 	mov	w2, -1
 	strh	w2, [x1, x0]
-.L3212:
+.L3224:
 	add	w27, w27, 1
 	and	w27, w27, 65535
-	b	.L3211
+	b	.L3223
 	.size	pm_gc, .-pm_gc
 	.section	.text.pm_flush_id,"ax",@progbits
 	.align	2
@@ -20197,10 +20297,10 @@ pm_flush_id:
 	strh	w0, [x19, 2]
 	adrp	x19, .LANCHOR136
 	ldr	w0, [x19, #:lo12:.LANCHOR136]
-	cbz	w0, .L3223
+	cbz	w0, .L3235
 	bl	pm_gc
 	str	wzr, [x19, #:lo12:.LANCHOR136]
-.L3223:
+.L3235:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -20218,17 +20318,17 @@ pm_flush:
 	add	x19, x19, :lo12:.LANCHOR138
 	mov	w20, 0
 	add	x19, x19, 2
-.L3230:
+.L3242:
 	ldrsh	w0, [x19]
-	tbz	w0, #31, .L3229
+	tbz	w0, #31, .L3241
 	mov	w0, w20
 	bl	pm_flush_id
-.L3229:
+.L3241:
 	add	w20, w20, 1
 	add	x19, x19, 16
 	and	w20, w20, 65535
 	cmp	w20, 8
-	bne	.L3230
+	bne	.L3242
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -20298,18 +20398,18 @@ pm_init:
 	mov	x21, x1
 	mov	w25, -1
 	str	x0, [x1, #:lo12:.LANCHOR207]
-.L3240:
+.L3252:
 	strh	w25, [x20]
 	strh	wzr, [x20, 2]
-	cbz	w24, .L3239
+	cbz	w24, .L3251
 	ldrb	w0, [x22]
 	lsl	w0, w0, 9
 	bl	ftl_malloc
 	str	x0, [x20, 8]
-.L3239:
+.L3251:
 	add	x20, x20, 16
 	cmp	x20, x23
-	bne	.L3240
+	bne	.L3252
 	add	x0, x19, :lo12:.LANCHOR138
 	adrp	x20, .LANCHOR110
 	ldr	x22, [x21, #:lo12:.LANCHOR207]
@@ -20326,7 +20426,7 @@ pm_init:
 	mov	w24, w26
 	ldrh	w2, [x0, 696]
 	cmp	w2, w26
-	bgt	.L3241
+	bgt	.L3253
 	ldrh	w1, [x0, 692]
 	mov	w3, w26
 	adrp	x0, .LC206
@@ -20340,9 +20440,9 @@ pm_init:
 	adrp	x0, .LANCHOR111
 	add	x0, x0, :lo12:.LANCHOR111
 	str	x0, [x29, 104]
-.L3242:
+.L3254:
 	cmp	w21, w26
-	ble	.L3245
+	ble	.L3257
 	adrp	x0, .LANCHOR198
 	mov	w1, 1
 	add	w24, w24, 1
@@ -20350,7 +20450,7 @@ pm_init:
 	ldr	x0, [x20, #:lo12:.LANCHOR110]
 	strh	w24, [x0, 696]
 	bl	pm_free_sblk
-.L3241:
+.L3253:
 	add	x19, x19, :lo12:.LANCHOR138
 	adrp	x0, .LANCHOR221
 	mov	w1, 255
@@ -20362,7 +20462,7 @@ pm_init:
 	bl	pm_write_page
 	adrp	x0, .LANCHOR198
 	ldrb	w0, [x0, #:lo12:.LANCHOR198]
-	cbz	w0, .L3246
+	cbz	w0, .L3258
 	ldr	x1, [x19, 8]
 	mov	w0, -1
 	bl	pm_write_page
@@ -20372,7 +20472,7 @@ pm_init:
 	ldr	x1, [x19, 8]
 	mov	w0, -1
 	bl	pm_write_page
-.L3246:
+.L3258:
 	bl	pm_free_sblk
 	bl	pm_gc
 	mov	w0, 0
@@ -20383,7 +20483,7 @@ pm_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L3245:
+.L3257:
 	ldr	x0, [x20, #:lo12:.LANCHOR110]
 	mov	x3, x22
 	ldr	x1, [x29, 104]
@@ -20409,32 +20509,32 @@ pm_init:
 	ldr	w4, [x29, 100]
 	cmp	w4, 512
 	ccmn	w4, #1, 4, ne
-	beq	.L3243
+	beq	.L3255
 	ldr	x8, [x20, #:lo12:.LANCHOR110]
 	ldr	w6, [x22]
 	ldrh	w0, [x8, 698]
 	cmp	w6, w0
-	bcs	.L3243
+	bcs	.L3255
 	ldr	w7, [x22, 8]
-	cbz	w7, .L3244
+	cbz	w7, .L3256
 	ldrb	w1, [x25]
 	mov	x0, x27
 	lsl	w1, w1, 9
 	bl	js_hash
 	cmp	w7, w0
-	beq	.L3244
+	beq	.L3256
 	adrp	x0, .LC208
 	mov	w1, w7
 	add	x0, x0, :lo12:.LC208
 	bl	printf
-.L3243:
+.L3255:
 	add	w21, w21, 1
 	sxth	w21, w21
-	b	.L3242
-.L3244:
+	b	.L3254
+.L3256:
 	add	x6, x8, x6, uxtw 2
 	str	w23, [x6, 704]
-	b	.L3243
+	b	.L3255
 	.size	pm_init, .-pm_init
 	.section	.text.pm_log2phys,"ax",@progbits
 	.align	2
@@ -20454,15 +20554,15 @@ pm_log2phys:
 	ldr	w2, [x0, #:lo12:.LANCHOR128]
 	str	x27, [sp, 80]
 	cmp	w25, w2
-	bcc	.L3262
+	bcc	.L3274
 	mov	w1, w25
 	adrp	x0, .LC209
 	add	x0, x0, :lo12:.LC209
 	bl	printf
 	mov	w0, -1
-	cbnz	w24, .L3261
+	cbnz	w24, .L3273
 	str	w0, [x23]
-.L3261:
+.L3273:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -20470,7 +20570,7 @@ pm_log2phys:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L3262:
+.L3274:
 	adrp	x0, .LANCHOR131
 	adrp	x21, .LANCHOR138
 	mov	x19, 0
@@ -20480,17 +20580,17 @@ pm_log2phys:
 	lsl	w22, w20, 7
 	udiv	w22, w25, w22
 	and	w26, w22, 65535
-.L3268:
+.L3280:
 	ldr	x1, [x0]
-	cbz	x1, .L3264
+	cbz	x1, .L3276
 	ldrh	w1, [x0, -8]
 	cmp	w1, w26
-	bne	.L3264
-.L3265:
+	bne	.L3276
+.L3277:
 	ubfiz	w20, w20, 7, 9
 	msub	w25, w26, w20, w25
 	and	x25, x25, 65535
-	cbnz	w24, .L3266
+	cbnz	w24, .L3278
 	add	x0, x21, :lo12:.LANCHOR138
 	adrp	x1, .LANCHOR32
 	add	x0, x0, x19, lsl 4
@@ -20508,22 +20608,22 @@ pm_log2phys:
 	adrp	x1, .LANCHOR112
 	ldrb	w1, [x1, #:lo12:.LANCHOR112]
 	cmp	w0, w1
-	bcc	.L3267
+	bcc	.L3279
 	mov	w0, -1
 	str	w0, [x23]
-.L3267:
+.L3279:
 	add	x21, x21, :lo12:.LANCHOR138
 	add	x19, x21, x19, lsl 4
 	ldrh	w0, [x19, 2]
 	mvn	x1, x0
 	tst	x1, 32767
-	beq	.L3271
+	beq	.L3283
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L3271:
+.L3283:
 	mov	w0, 0
-	b	.L3261
-.L3266:
+	b	.L3273
+.L3278:
 	add	x0, x21, :lo12:.LANCHOR138
 	ldr	w2, [x23]
 	add	x0, x0, x19, lsl 4
@@ -20534,13 +20634,13 @@ pm_log2phys:
 	strh	w1, [x0, 2]
 	adrp	x0, .LANCHOR139
 	strb	w22, [x0, #:lo12:.LANCHOR139]
-	b	.L3267
-.L3264:
+	b	.L3279
+.L3276:
 	add	w19, w19, 1
 	add	x0, x0, 16
 	and	x19, x19, 65535
 	cmp	w19, 8
-	bne	.L3268
+	bne	.L3280
 	bl	pm_select_ram_region
 	and	x19, x0, 65535
 	sbfiz	x1, x19, 4, 32
@@ -20550,17 +20650,17 @@ pm_log2phys:
 	ldrh	w2, [x2, x1]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L3269
+	beq	.L3281
 	ldrsh	w1, [x3, 2]
-	tbz	w1, #31, .L3269
+	tbz	w1, #31, .L3281
 	bl	pm_flush_id
-.L3269:
+.L3281:
 	adrp	x0, .LANCHOR223
 	mov	w1, w27
 	strb	w19, [x0, #:lo12:.LANCHOR223]
 	mov	w0, w26
 	bl	load_l2p_region
-	b	.L3265
+	b	.L3277
 	.size	pm_log2phys, .-pm_log2phys
 	.section	.text.gc_recovery,"ax",@progbits
 	.align	2
@@ -20587,7 +20687,7 @@ gc_recovery:
 	ldrh	w1, [x23, 80]
 	stp	x27, x28, [sp, 112]
 	cmp	w1, w2
-	beq	.L3278
+	beq	.L3290
 	mov	w0, -1
 	strh	w0, [x23, 130]
 	mov	w0, 1
@@ -20607,35 +20707,35 @@ gc_recovery:
 	ldrb	w2, [x0, #:lo12:.LANCHOR79]
 	str	x0, [x29, 176]
 	cmp	w2, 2
-	beq	.L3279
+	beq	.L3291
 	adrp	x0, .LANCHOR36
 	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbnz	w0, .L3279
+	cbnz	w0, .L3291
 	adrp	x0, .LANCHOR37
 	ldrb	w0, [x0, #:lo12:.LANCHOR37]
-	cbz	w0, .L3280
-.L3279:
+	cbz	w0, .L3292
+.L3291:
 	adrp	x0, .LANCHOR86
 	ldrh	w0, [x0, #:lo12:.LANCHOR86]
 	sub	w0, w0, #1
 	add	w0, w0, w1
 	orr	w2, w0, w2, lsl 24
 	str	w2, [x27, 40]
-.L3281:
+.L3293:
 	mov	w1, 1
 	mov	x0, x27
 	bl	sblk_read_page
 	ldr	w0, [x27, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L3282
+	beq	.L3294
 	ldr	x0, [x27, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L3283
-.L3282:
+	beq	.L3295
+.L3294:
 	mov	x0, x27
 	bl	zbuf_free
 	ldr	x1, [x27, 24]
@@ -20654,7 +20754,7 @@ gc_recovery:
 	ldr	w1, [x27, 40]
 	ldr	w2, [x27, 52]
 	bl	printf
-.L3372:
+.L3384:
 	adrp	x0, .LANCHOR9
 	ldrh	w1, [x23, 80]
 	mov	w25, 0
@@ -20663,15 +20763,15 @@ gc_recovery:
 	ldr	x0, [x26, #:lo12:.LANCHOR10]
 	ldrh	w1, [x23, 80]
 	strh	w1, [x0, 130]
-.L3284:
+.L3296:
 	ldrh	w0, [x23, 80]
 	adrp	x2, .LANCHOR9
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L3328
+	cbnz	w1, .L3340
 	bl	ftl_dump_write_open_sblk
-.L3328:
+.L3340:
 	ldrh	w1, [x23, 80]
 	mov	w2, w25
 	adrp	x0, .LC212
@@ -20685,22 +20785,22 @@ gc_recovery:
 	mov	w1, 65535
 	ldrh	w0, [x0, 130]
 	cmp	w0, w1
-	beq	.L3329
+	beq	.L3341
 	adrp	x1, .LANCHOR6
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	cmp	w1, w0
-	bhi	.L3330
+	bhi	.L3342
 	adrp	x1, .LANCHOR225
 	adrp	x0, .LC0
 	mov	w2, 517
 	add	x1, x1, :lo12:.LANCHOR225
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3330:
+.L3342:
 	ldr	x0, [x26, #:lo12:.LANCHOR10]
 	ldrh	w0, [x0, 130]
 	bl	ftl_free_sblk
-.L3329:
+.L3341:
 	adrp	x0, .LANCHOR110
 	ldr	x1, [x0, #:lo12:.LANCHOR110]
 	mov	w0, -1
@@ -20709,7 +20809,7 @@ gc_recovery:
 	strh	w0, [x1, 130]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L3277:
+.L3289:
 	ldp	x19, x20, [sp, 48]
 	ldp	x21, x22, [sp, 64]
 	ldp	x23, x24, [sp, 80]
@@ -20718,28 +20818,28 @@ gc_recovery:
 	ldp	x29, x30, [sp, 32]
 	add	sp, sp, 240
 	ret
-.L3280:
+.L3292:
 	cmp	w2, 3
-	bne	.L3281
+	bne	.L3293
 	adrp	x0, .LANCHOR95
 	ldrh	w0, [x0, #:lo12:.LANCHOR95]
 	sub	w0, w0, #1
 	add	w0, w0, w1
 	orr	w0, w0, 50331648
 	str	w0, [x27, 40]
-	b	.L3281
-.L3283:
+	b	.L3293
+.L3295:
 	adrp	x21, .LANCHOR224
 	adrp	x19, .LANCHOR86
 	adrp	x20, .LANCHOR80
 	adrp	x24, .LANCHOR162
 	ldrb	w0, [x21, #:lo12:.LANCHOR224]
 	cmp	w0, 2
-	bne	.L3285
+	bne	.L3297
 	ldr	x0, [x29, 176]
 	ldrb	w0, [x0, #:lo12:.LANCHOR79]
 	cmp	w0, 3
-	bne	.L3285
+	bne	.L3297
 	ldrh	w2, [x19, #:lo12:.LANCHOR86]
 	adrp	x22, .LANCHOR221
 	ldrb	w1, [x20, #:lo12:.LANCHOR80]
@@ -20755,14 +20855,14 @@ gc_recovery:
 	bl	ftl_memcpy
 	adrp	x0, .LANCHOR36
 	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbnz	w0, .L3286
+	cbnz	w0, .L3298
 	adrp	x0, .LANCHOR37
 	ldrb	w0, [x0, #:lo12:.LANCHOR37]
-	cbz	w0, .L3287
-.L3286:
+	cbz	w0, .L3299
+.L3298:
 	ldr	w0, [x27, 40]
 	sub	w0, w0, #1
-.L3366:
+.L3378:
 	str	w0, [x27, 40]
 	mov	w1, 1
 	mov	x0, x27
@@ -20770,28 +20870,28 @@ gc_recovery:
 	ldr	w0, [x27, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L3289
+	beq	.L3301
 	ldr	x0, [x27, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L3290
-.L3289:
+	beq	.L3302
+.L3301:
 	mov	x0, x27
 	bl	zbuf_free
-	b	.L3372
-.L3287:
+	b	.L3384
+.L3299:
 	adrp	x1, .LANCHOR95
 	ldr	w0, [x29, 200]
 	ldrh	w1, [x1, #:lo12:.LANCHOR95]
 	sub	w0, w0, #1
 	add	w0, w0, w1
 	orr	w0, w0, 33554432
-	b	.L3366
-.L3290:
+	b	.L3378
+.L3302:
 	ldrh	w2, [x22, #:lo12:.LANCHOR221]
-.L3367:
+.L3379:
 	ldr	x1, [x27, 8]
 	adrp	x22, .LANCHOR163
 	ldr	x0, [x24, #:lo12:.LANCHOR162]
@@ -20803,13 +20903,13 @@ gc_recovery:
 	ldrb	w1, [x1, #:lo12:.LANCHOR131]
 	lsl	w2, w0, 2
 	cmp	w1, w0, lsr 6
-	bge	.L3292
+	bge	.L3304
 	ldr	x0, [x22, #:lo12:.LANCHOR163]
 	mov	w1, 0
 	bl	ftl_memset
 	ldrb	w21, [x21, #:lo12:.LANCHOR224]
 	cmp	w21, 1
-	bne	.L3333
+	bne	.L3345
 	ldrb	w1, [x20, #:lo12:.LANCHOR80]
 	ldrh	w0, [x19, #:lo12:.LANCHOR86]
 	mul	w0, w0, w1
@@ -20821,7 +20921,7 @@ gc_recovery:
 	add	x1, x1, x0, sxtw 2
 	ldr	x0, [x22, #:lo12:.LANCHOR163]
 	bl	ftl_memcpy
-.L3293:
+.L3305:
 	adrp	x0, .LANCHOR95
 	ldrh	w0, [x0, #:lo12:.LANCHOR95]
 	str	w0, [x29, 184]
@@ -20829,32 +20929,32 @@ gc_recovery:
 	ldrb	w0, [x0, #:lo12:.LANCHOR79]
 	str	w0, [x29, 188]
 	cmp	w0, 2
-	bne	.L3294
+	bne	.L3306
 	adrp	x0, .LANCHOR81
 	ldrb	w0, [x0, #:lo12:.LANCHOR81]
-	cbz	w0, .L3295
-.L3294:
+	cbz	w0, .L3307
+.L3306:
 	adrp	x0, .LANCHOR36
 	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbz	w0, .L3296
-.L3295:
+	cbz	w0, .L3308
+.L3307:
 	ldp	w0, w1, [x29, 184]
 	mul	w0, w0, w1
 	str	w0, [x29, 184]
 	mov	w0, 1
 	str	w0, [x29, 188]
-.L3296:
+.L3308:
 	adrp	x22, .LANCHOR36
 	mov	w28, 0
 	add	x0, x22, :lo12:.LANCHOR36
 	mov	w10, 0
 	str	x0, [x29, 112]
-.L3297:
+.L3309:
 	sub	w0, w28, #1
 	str	w0, [x29, 144]
 	ldr	w0, [x29, 184]
 	cmp	w0, w28
-	bls	.L3310
+	bls	.L3322
 	add	w0, w28, w28, lsl 1
 	mov	x20, 0
 	sub	w0, w0, #1
@@ -20862,26 +20962,26 @@ gc_recovery:
 	adrp	x0, .LANCHOR37
 	add	x0, x0, :lo12:.LANCHOR37
 	str	x0, [x29, 120]
-	b	.L3311
-.L3285:
+	b	.L3323
+.L3297:
 	ldrh	w2, [x19, #:lo12:.LANCHOR86]
 	ldrb	w0, [x20, #:lo12:.LANCHOR80]
 	mul	w2, w2, w0
 	lsl	w2, w2, 2
-	b	.L3367
-.L3292:
+	b	.L3379
+.L3304:
 	ldr	x1, [x27, 8]
 	mov	w21, 0
 	add	x1, x1, x0, sxtw 2
 	ldr	x0, [x22, #:lo12:.LANCHOR163]
 	bl	ftl_memcpy
-.L3368:
+.L3380:
 	mov	w25, 0
-	b	.L3293
-.L3333:
+	b	.L3305
+.L3345:
 	mov	w21, 1
-	b	.L3368
-.L3306:
+	b	.L3380
+.L3318:
 	ldp	x1, x0, [x29, 128]
 	ldr	x2, [x29, 176]
 	ldrh	w0, [x0, 96]
@@ -20891,17 +20991,17 @@ gc_recovery:
 	mul	w0, w0, w1
 	str	w0, [x29, 200]
 	add	w1, w22, w0
-	beq	.L3298
+	beq	.L3310
 	ldr	x3, [x29, 112]
 	ldrb	w3, [x3]
-	cbz	w3, .L3299
-.L3298:
+	cbz	w3, .L3311
+.L3310:
 	ldr	w0, [x29, 144]
 	add	w1, w1, w0
 	orr	w1, w1, w2, lsl 24
-.L3369:
+.L3381:
 	str	w1, [x27, 40]
-.L3300:
+.L3312:
 	mov	w1, 1
 	str	x8, [x29, 96]
 	str	w10, [x29, 104]
@@ -20911,24 +21011,24 @@ gc_recovery:
 	ldr	w10, [x29, 104]
 	ldr	x0, [x27, 24]
 	ldr	x8, [x29, 96]
-	cbz	w21, .L3303
+	cbz	w21, .L3315
 	ldr	x2, [x1, #:lo12:.LANCHOR163]
 	ldr	w3, [x2, x8]
-	cbnz	w3, .L3303
+	cbnz	w3, .L3315
 	ldr	w3, [x0, 8]
 	str	w3, [x2, x8]
-.L3303:
+.L3315:
 	ldr	x2, [x24, #:lo12:.LANCHOR162]
 	ldr	w6, [x0, 4]
 	ldr	w3, [x2, x8]
 	cmp	w3, w6
-	bne	.L3304
+	bne	.L3316
 	ldr	x2, [x1, #:lo12:.LANCHOR163]
 	ldr	w4, [x2, x8]
 	ldr	w2, [x0, 8]
 	cmp	w4, w2
-	beq	.L3305
-.L3304:
+	beq	.L3317
+.L3316:
 	ldr	x1, [x1, #:lo12:.LANCHOR163]
 	ldr	w2, [x0, 12]
 	str	w2, [sp]
@@ -20947,7 +21047,7 @@ gc_recovery:
 	ldr	w10, [x29, 96]
 	ldr	w0, [x0, x8]
 	cmn	w0, #1
-	beq	.L3305
+	beq	.L3317
 	mov	x0, x27
 	bl	zbuf_free
 	adrp	x0, .LANCHOR9
@@ -20957,40 +21057,40 @@ gc_recovery:
 	ldr	x0, [x26, #:lo12:.LANCHOR10]
 	ldrh	w1, [x23, 80]
 	strh	w1, [x0, 130]
-	b	.L3284
-.L3299:
+	b	.L3296
+.L3311:
 	cmp	w2, 3
-	bne	.L3301
+	bne	.L3313
 	ldr	x2, [x29, 120]
 	ldrb	w2, [x2]
-	cbz	w2, .L3302
+	cbz	w2, .L3314
 	ldr	w0, [x29, 164]
 	add	w1, w1, w0
 	orr	w1, w1, 50331648
-	b	.L3369
-.L3302:
+	b	.L3381
+.L3314:
 	add	w0, w28, w0
 	orr	w0, w0, w22, lsl 24
-.L3370:
+.L3382:
 	str	w0, [x27, 40]
-	b	.L3300
-.L3301:
+	b	.L3312
+.L3313:
 	add	w0, w28, w0
-	b	.L3370
-.L3305:
+	b	.L3382
+.L3317:
 	add	w10, w10, 1
 	add	w22, w22, 1
 	add	x8, x8, 4
-.L3308:
+.L3320:
 	ldr	w0, [x29, 188]
 	cmp	w0, w22
-	bcs	.L3306
+	bcs	.L3318
 	add	x20, x20, 1
-.L3311:
+.L3323:
 	ldr	x0, [x29, 168]
 	ldrb	w0, [x0, 9]
 	cmp	w0, w20
-	ble	.L3307
+	ble	.L3319
 	add	x0, x23, x20, lsl 1
 	str	x0, [x29, 136]
 	ldr	x0, [x29, 152]
@@ -20998,15 +21098,15 @@ gc_recovery:
 	mov	w22, 1
 	add	x0, x0, :lo12:.LANCHOR111
 	str	x0, [x29, 128]
-	b	.L3308
-.L3307:
+	b	.L3320
+.L3319:
 	adrp	x0, .LANCHOR81
 	ldrb	w0, [x0, #:lo12:.LANCHOR81]
 	cmp	w0, 0
 	cinc	w28, w28, ne
 	add	w28, w28, 1
-	b	.L3297
-.L3310:
+	b	.L3309
+.L3322:
 	mov	x0, x27
 	bl	zbuf_free
 	ldr	x0, [x29, 168]
@@ -21024,23 +21124,23 @@ gc_recovery:
 	adrp	x0, .LANCHOR75
 	add	x0, x0, :lo12:.LANCHOR75
 	str	x0, [x29, 104]
-.L3312:
+.L3324:
 	sub	w0, w27, #1
 	str	w0, [x29, 128]
 	ldr	w0, [x29, 184]
 	cmp	w0, w27
-	bls	.L3326
+	bls	.L3338
 	add	w22, w27, w27, lsl 1
 	mov	x21, 0
 	sub	w0, w22, #1
 	str	w0, [x29, 120]
-	b	.L3327
-.L3322:
+	b	.L3339
+.L3334:
 	ldr	x1, [x24, #:lo12:.LANCHOR162]
 	sbfiz	x0, x28, 2, 32
 	ldr	w20, [x1, x0]
 	cmn	w20, #1
-	beq	.L3313
+	beq	.L3325
 	adrp	x1, .LANCHOR163
 	ldr	x1, [x1, #:lo12:.LANCHOR163]
 	ldr	w0, [x1, x0]
@@ -21049,12 +21149,12 @@ gc_recovery:
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 204]
 	cmn	w0, #1
-	bne	.L3314
+	bne	.L3326
 	mov	w2, 0
 	add	x1, x29, 204
 	mov	w0, w20
 	bl	pm_log2phys
-.L3314:
+.L3326:
 	ldr	x0, [x29, 136]
 	ldr	x1, [x29, 152]
 	ldr	x2, [x29, 176]
@@ -21064,16 +21164,16 @@ gc_recovery:
 	cmp	w2, 2
 	mul	w0, w0, w1
 	add	w1, w22, w0
-	beq	.L3315
+	beq	.L3327
 	adrp	x6, .LANCHOR36
 	ldrb	w6, [x6, #:lo12:.LANCHOR36]
-	cbz	w6, .L3316
-.L3315:
+	cbz	w6, .L3328
+.L3327:
 	ldr	w0, [x29, 128]
 	add	w1, w0, w1
 	orr	w1, w1, w2, lsl 24
 	str	w1, [x29, 200]
-.L3317:
+.L3329:
 	ldp	x0, x1, [x29, 104]
 	mov	w19, 24
 	mov	w2, 1
@@ -21092,95 +21192,95 @@ gc_recovery:
 	ldr	w0, [x29, 204]
 	cmp	w1, w0
 	and	x19, x19, 65535
-	bne	.L3320
+	bne	.L3332
 	add	x1, x29, 200
 	mov	w0, w20
 	bl	pm_log2phys
 	add	w25, w25, 1
 	mov	w0, w19
 	bl	ftl_vpn_decrement
-.L3321:
+.L3333:
 	adrp	x0, .LANCHOR7
 	add	w28, w28, 1
 	ldr	x0, [x0, #:lo12:.LANCHOR7]
 	add	x0, x0, x19, lsl 2
 	ldrb	w0, [x0, 2]
 	tst	w0, 224
-	bne	.L3313
+	bne	.L3325
 	ldr	x0, [x29, 144]
 	lsl	x19, x19, 1
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x0, x19]
-	cbz	w1, .L3313
+	cbz	w1, .L3325
 	strh	wzr, [x0, x19]
-.L3313:
+.L3325:
 	add	w22, w22, 1
-.L3324:
+.L3336:
 	ldr	w0, [x29, 188]
 	cmp	w0, w22
-	bcs	.L3322
+	bcs	.L3334
 	add	x21, x21, 1
-.L3327:
+.L3339:
 	ldr	x0, [x29, 168]
 	ldrb	w0, [x0, 9]
 	cmp	w0, w21
-	ble	.L3323
+	ble	.L3335
 	add	x0, x23, x21, lsl 1
 	mov	w22, 1
 	str	x0, [x29, 136]
 	adrp	x0, .LANCHOR32
 	add	x0, x0, :lo12:.LANCHOR32
 	str	x0, [x29, 112]
-	b	.L3324
-.L3316:
+	b	.L3336
+.L3328:
 	cmp	w2, 3
-	bne	.L3318
+	bne	.L3330
 	adrp	x2, .LANCHOR37
 	ldrb	w6, [x2, #:lo12:.LANCHOR37]
 	lsl	w2, w22, 24
-	cbz	w6, .L3319
+	cbz	w6, .L3331
 	ldr	w0, [x29, 120]
 	add	w1, w0, w1
 	orr	w0, w1, w2
-.L3371:
+.L3383:
 	str	w0, [x29, 200]
-	b	.L3317
-.L3319:
+	b	.L3329
+.L3331:
 	add	w0, w27, w0
 	orr	w0, w0, w2
-	b	.L3371
-.L3318:
+	b	.L3383
+.L3330:
 	add	w0, w27, w0
-	b	.L3371
-.L3320:
+	b	.L3383
+.L3332:
 	ldr	w1, [x29, 200]
 	cmp	w0, w1
 	cinc	w25, w25, eq
-	b	.L3321
-.L3323:
+	b	.L3333
+.L3335:
 	adrp	x0, .LANCHOR81
 	ldrb	w0, [x0, #:lo12:.LANCHOR81]
 	cmp	w0, 0
 	cinc	w27, w27, ne
 	add	w27, w27, 1
-	b	.L3312
-.L3326:
+	b	.L3324
+.L3338:
 	ldr	x0, [x29, 144]
 	ldrh	w1, [x23, 80]
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	strh	w25, [x0, x1, lsl 1]
 	ldrh	w0, [x23, 80]
 	bl	zftl_insert_data_list
-	b	.L3284
-.L3278:
+	b	.L3296
+.L3290:
 	ldrh	w0, [x23, 130]
 	cmp	w0, w1
-	beq	.L3277
+	beq	.L3289
 	adrp	x19, .LANCHOR110
 	ldr	x1, [x19, #:lo12:.LANCHOR110]
 	ldrh	w1, [x1, 126]
 	cmp	w1, w0
-	bne	.L3332
+	bne	.L3344
 	bl	pm_flush
 	ldr	x0, [x26, #:lo12:.LANCHOR10]
 	ldrh	w0, [x0, 130]
@@ -21190,11 +21290,11 @@ gc_recovery:
 	strh	w1, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L3332:
+.L3344:
 	ldr	x0, [x26, #:lo12:.LANCHOR10]
 	mov	w1, -1
 	strh	w1, [x0, 130]
-	b	.L3277
+	b	.L3289
 	.size	gc_recovery, .-gc_recovery
 	.section	.text.gc_update_l2p_map_new,"ax",@progbits
 	.align	2
@@ -21218,12 +21318,12 @@ gc_update_l2p_map_new:
 	ldrb	w1, [x1, 9]
 	mul	w26, w26, w1
 	ldr	w1, [x24, #:lo12:.LANCHOR14]
-	tbz	x1, 8, .L3374
+	tbz	x1, 8, .L3386
 	ldrh	w1, [x21, 80]
 	adrp	x0, .LC213
 	add	x0, x0, :lo12:.LC213
 	bl	printf
-.L3374:
+.L3386:
 	adrp	x23, .LANCHOR9
 	adrp	x0, .LANCHOR224
 	ldrh	w2, [x21, 80]
@@ -21236,12 +21336,12 @@ gc_update_l2p_map_new:
 	adrp	x0, .LANCHOR131
 	add	x0, x0, :lo12:.LANCHOR131
 	str	x0, [x29, 104]
-.L3375:
+.L3387:
 	mov	w28, w22
 	cmp	w26, w22
-	bhi	.L3385
+	bhi	.L3397
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3386
+	tbz	x0, 8, .L3398
 	ldr	x0, [x29, 128]
 	mov	w3, w25
 	ldr	x1, [x23, #:lo12:.LANCHOR9]
@@ -21252,19 +21352,19 @@ gc_update_l2p_map_new:
 	adrp	x0, .LC216
 	add	x0, x0, :lo12:.LC216
 	bl	printf
-.L3386:
+.L3398:
 	ldrh	w1, [x21, 80]
 	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, x1, lsl 1]
 	cmp	w25, w0
-	beq	.L3387
+	beq	.L3399
 	adrp	x1, .LANCHOR226
 	adrp	x0, .LC0
 	mov	w2, 898
 	add	x1, x1, :lo12:.LANCHOR226
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3387:
+.L3399:
 	ldrh	w1, [x21, 80]
 	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	strh	w25, [x0, x1, lsl 1]
@@ -21277,13 +21377,13 @@ gc_update_l2p_map_new:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L3385:
+.L3397:
 	adrp	x27, .LANCHOR162
 	lsl	x19, x22, 2
 	ldr	x0, [x27, #:lo12:.LANCHOR162]
 	ldr	w2, [x0, x19]
 	cmn	w2, #1
-	beq	.L3376
+	beq	.L3388
 	adrp	x0, .LANCHOR131
 	ldrb	w20, [x0, #:lo12:.LANCHOR131]
 	lsl	w20, w20, 7
@@ -21291,13 +21391,13 @@ gc_update_l2p_map_new:
 	and	w0, w20, 65535
 	str	w0, [x29, 156]
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3377
+	tbz	x0, 8, .L3389
 	ldr	w1, [x29, 156]
 	adrp	x0, .LC214
 	mov	w3, w22
 	add	x0, x0, :lo12:.LC214
 	bl	printf
-.L3377:
+.L3389:
 	sub	w28, w26, w28
 	add	x28, x28, x22
 	lsl	x0, x28, 2
@@ -21308,25 +21408,25 @@ gc_update_l2p_map_new:
 	adrp	x0, .LANCHOR75
 	add	x0, x0, :lo12:.LANCHOR75
 	str	x0, [x29, 112]
-.L3378:
+.L3390:
 	ldr	x0, [x29, 144]
 	cmp	x0, x19
-	bne	.L3384
-.L3376:
+	bne	.L3396
+.L3388:
 	add	x22, x22, 1
-	b	.L3375
-.L3384:
+	b	.L3387
+.L3396:
 	ldr	x0, [x27, #:lo12:.LANCHOR162]
 	ldr	w20, [x0, x19]
 	cmn	w20, #1
-	beq	.L3379
+	beq	.L3391
 	ldr	x0, [x29, 104]
 	ldr	w1, [x29, 156]
 	ldrb	w0, [x0]
 	lsl	w0, w0, 7
 	udiv	w0, w20, w0
 	cmp	w1, w0, uxth
-	bne	.L3379
+	bne	.L3391
 	adrp	x0, .LANCHOR163
 	ldr	x0, [x0, #:lo12:.LANCHOR163]
 	ldr	w28, [x0, x19]
@@ -21334,15 +21434,15 @@ gc_update_l2p_map_new:
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 172]
 	cmn	w0, #1
-	bne	.L3380
+	bne	.L3392
 	mov	w2, 0
 	add	x1, x29, 172
 	mov	w0, w20
 	bl	pm_log2phys
-.L3380:
+.L3392:
 	ldr	w3, [x29, 172]
 	cmp	w28, w3
-	bne	.L3381
+	bne	.L3393
 	adrp	x0, .LANCHOR164
 	mov	w2, 1
 	add	x1, x29, 168
@@ -21367,25 +21467,25 @@ gc_update_l2p_map_new:
 	adrp	x0, .LANCHOR76
 	ldrb	w0, [x0, #:lo12:.LANCHOR76]
 	udiv	w0, w28, w0
-.L3407:
+.L3419:
 	bl	ftl_vpn_decrement
 	ldr	x0, [x27, #:lo12:.LANCHOR162]
 	mov	w1, -1
 	str	w1, [x0, x19]
-.L3379:
+.L3391:
 	add	x19, x19, 4
-	b	.L3378
-.L3381:
+	b	.L3390
+.L3393:
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3383
+	tbz	x0, 8, .L3395
 	ldr	x0, [x29, 120]
 	mov	w2, w28
 	mov	w1, w20
 	bl	printf
-.L3383:
+.L3395:
 	ldr	x0, [x29, 136]
 	ldrh	w0, [x0]
-	b	.L3407
+	b	.L3419
 	.size	gc_update_l2p_map_new, .-gc_update_l2p_map_new
 	.section	.text.gc_scan_src_blk_one_page,"ax",@progbits
 	.align	2
@@ -21409,17 +21509,17 @@ gc_scan_src_blk_one_page:
 	add	x2, x1, x0, sxtw 1
 	ldrh	w22, [x2, 40]
 	ldrh	w2, [x1, 2]
-.L3409:
+.L3421:
 	cmp	w22, w5
-	beq	.L3411
-	cbz	w4, .L3412
+	beq	.L3423
+	cbz	w4, .L3424
 	add	x1, x20, :lo12:.LANCHOR71
 	strh	w2, [x1, 2]
-.L3412:
-	cbz	w3, .L3413
+.L3424:
+	cbz	w3, .L3425
 	add	x1, x20, :lo12:.LANCHOR71
 	strb	w0, [x1, 4]
-.L3413:
+.L3425:
 	mov	w0, 1
 	adrp	x23, .LANCHOR111
 	bl	buf_alloc
@@ -21428,11 +21528,11 @@ gc_scan_src_blk_one_page:
 	add	x23, x23, :lo12:.LANCHOR111
 	add	x24, x24, :lo12:.LANCHOR36
 	mov	w26, 1
-.L3414:
+.L3426:
 	add	x19, x20, :lo12:.LANCHOR71
 	ldrb	w1, [x19, 6]
 	cmp	w26, w1
-	ble	.L3424
+	ble	.L3436
 	mov	x0, x25
 	bl	zbuf_free
 	ldrb	w0, [x19, 4]
@@ -21441,47 +21541,47 @@ gc_scan_src_blk_one_page:
 	and	w0, w0, 255
 	strb	w0, [x19, 4]
 	cmp	w1, w0
-	bne	.L3408
+	bne	.L3420
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 4]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L3408:
+.L3420:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L3411:
+.L3423:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	cmp	w0, w6
-	bne	.L3410
+	bne	.L3422
 	add	w2, w2, 1
 	mov	w0, 0
 	and	w2, w2, 65535
 	mov	w4, 1
-.L3410:
+.L3422:
 	add	x3, x1, x0, sxtw 1
 	ldrh	w22, [x3, 40]
 	mov	w3, 1
-	b	.L3409
-.L3424:
+	b	.L3421
+.L3436:
 	ldrh	w0, [x23]
 	cmp	w1, 2
 	mul	w0, w0, w22
-	bne	.L3415
+	bne	.L3427
 	ldrh	w1, [x19, 2]
 	lsl	w1, w1, 1
-.L3434:
+.L3446:
 	sub	w1, w1, #1
 	add	w0, w26, w0
 	add	w0, w1, w0
 	adrp	x1, .LANCHOR79
 	ldrb	w1, [x1, #:lo12:.LANCHOR79]
 	orr	w0, w0, w1, lsl 24
-.L3433:
+.L3445:
 	str	w0, [x25, 40]
 	mov	w1, 1
 	mov	x0, x25
@@ -21489,27 +21589,27 @@ gc_scan_src_blk_one_page:
 	ldr	w0, [x25, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L3421
+	beq	.L3433
 	ldr	x0, [x25, 24]
 	ldr	w19, [x0, 4]
 	mov	w0, w19
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 92]
 	cmn	w0, #1
-	bne	.L3422
+	bne	.L3434
 	adrp	x0, .LANCHOR128
 	ldr	w0, [x0, #:lo12:.LANCHOR128]
 	cmp	w19, w0
-	bcs	.L3422
+	bcs	.L3434
 	mov	w2, 0
 	add	x1, x29, 92
 	mov	w0, w19
 	bl	pm_log2phys
-.L3422:
+.L3434:
 	ldr	w2, [x25, 40]
 	ldr	w0, [x29, 92]
 	cmp	w2, w0
-	bne	.L3421
+	bne	.L3433
 	add	x1, x20, :lo12:.LANCHOR71
 	adrp	x4, .LANCHOR77
 	ldr	x4, [x4, #:lo12:.LANCHOR77]
@@ -21518,35 +21618,35 @@ gc_scan_src_blk_one_page:
 	add	w0, w0, 1
 	str	w2, [x4, x3]
 	strh	w0, [x1, 24]
-.L3421:
+.L3433:
 	add	x1, x20, :lo12:.LANCHOR71
 	add	w26, w26, 1
 	ldrh	w0, [x1, 26]
 	add	w0, w0, 1
 	strh	w0, [x1, 26]
-	b	.L3414
-.L3415:
+	b	.L3426
+.L3427:
 	cmp	w1, 3
-	bne	.L3417
+	bne	.L3429
 	ldrb	w1, [x24]
-	cbnz	w1, .L3418
+	cbnz	w1, .L3430
 	adrp	x1, .LANCHOR37
 	ldrb	w1, [x1, #:lo12:.LANCHOR37]
-	cbz	w1, .L3419
-.L3418:
+	cbz	w1, .L3431
+.L3430:
 	add	x1, x20, :lo12:.LANCHOR71
 	ldrh	w1, [x1, 2]
 	add	w1, w1, w1, lsl 1
-	b	.L3434
-.L3419:
+	b	.L3446
+.L3431:
 	ldrh	w1, [x19, 2]
 	add	w0, w1, w0
 	orr	w0, w0, w26, lsl 24
-	b	.L3433
-.L3417:
+	b	.L3445
+.L3429:
 	ldrh	w1, [x19, 2]
 	add	w0, w1, w0
-	b	.L3433
+	b	.L3445
 	.size	gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page
 	.section	.text.gc_scan_src_blk,"ax",@progbits
 	.align	2
@@ -21564,21 +21664,21 @@ gc_scan_src_blk:
 	stp	x25, x26, [sp, 64]
 	cmp	w1, w0
 	stp	x27, x28, [sp, 80]
-	bne	.L3436
+	bne	.L3448
 	adrp	x1, .LANCHOR227
 	adrp	x0, .LC0
 	mov	w2, 1504
 	add	x1, x1, :lo12:.LANCHOR227
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3436:
+.L3448:
 	ldrh	w1, [x21, #:lo12:.LANCHOR71]
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L3466
+	beq	.L3478
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3438
+	tbz	x0, 8, .L3450
 	adrp	x2, .LANCHOR9
 	ubfiz	x0, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
@@ -21586,20 +21686,20 @@ gc_scan_src_blk:
 	adrp	x0, .LC217
 	add	x0, x0, :lo12:.LC217
 	bl	printf
-.L3438:
+.L3450:
 	ldrh	w0, [x21, #:lo12:.LANCHOR71]
 	add	x14, x21, :lo12:.LANCHOR71
 	add	x1, x14, 40
 	bl	ftl_get_blk_list_in_sblk
 	and	w1, w0, 255
 	strb	w1, [x14, 5]
-	cbnz	w1, .L3439
+	cbnz	w1, .L3451
 	mov	w0, -1
 	strh	w0, [x21, #:lo12:.LANCHOR71]
-.L3466:
+.L3478:
 	mov	w0, 0
-	b	.L3435
-.L3439:
+	b	.L3447
+.L3451:
 	adrp	x4, .LANCHOR7
 	ldrh	w3, [x21, #:lo12:.LANCHOR71]
 	mov	x19, x4
@@ -21609,59 +21709,59 @@ gc_scan_src_blk:
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 32
-	beq	.L3440
+	beq	.L3452
 	cmp	w1, 224
-	beq	.L3440
-	cbz	w1, .L3441
+	beq	.L3452
+	cbz	w1, .L3453
 	adrp	x1, .LANCHOR10
 	ldr	x1, [x1, #:lo12:.LANCHOR10]
 	ldrh	w3, [x1, 16]
 	cmp	w3, w2
-	beq	.L3440
+	beq	.L3452
 	ldrh	w3, [x1, 48]
 	cmp	w3, w2
-	beq	.L3440
+	beq	.L3452
 	ldrh	w1, [x1, 80]
 	cmp	w1, w2
-	bne	.L3486
-.L3440:
+	bne	.L3498
+.L3452:
 	add	x0, x21, :lo12:.LANCHOR71
 	mov	w1, -1
 	strh	w1, [x21, #:lo12:.LANCHOR71]
 	strh	wzr, [x0, 24]
-	b	.L3466
-.L3441:
+	b	.L3478
+.L3453:
 	adrp	x0, .LANCHOR9
 	mov	x19, x0
 	ldr	x1, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x1, x3, lsl 1]
-	cbz	w1, .L3443
+	cbz	w1, .L3455
 	adrp	x1, .LANCHOR227
 	adrp	x0, .LC0
 	mov	w2, 1529
 	add	x1, x1, :lo12:.LANCHOR227
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3443:
+.L3455:
 	ldrh	w1, [x21, #:lo12:.LANCHOR71]
 	ldr	x0, [x19, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x1, lsl 1]
-	b	.L3440
-.L3486:
+	b	.L3452
+.L3498:
 	and	w0, w0, 255
 	sub	w0, w0, #1
 	add	x0, x14, x0, sxtw 1
 	ldrh	w24, [x0, 40]
 	mov	w0, 65535
 	cmp	w24, w0
-	bne	.L3444
+	bne	.L3456
 	adrp	x1, .LANCHOR227
 	adrp	x0, .LC0
 	mov	w2, 1539
 	add	x1, x1, :lo12:.LANCHOR227
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3444:
+.L3456:
 	ldrh	w1, [x21, #:lo12:.LANCHOR71]
 	adrp	x23, .LANCHOR111
 	ldr	x2, [x19, #:lo12:.LANCHOR7]
@@ -21675,30 +21775,30 @@ gc_scan_src_blk:
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 160
-	bne	.L3467
+	bne	.L3479
 	adrp	x1, .LANCHOR79
 	ldrb	w1, [x1, #:lo12:.LANCHOR79]
 	and	w27, w1, 65535
 	cmp	w1, 2
 	orr	w20, w20, w1, lsl 24
-	bne	.L3446
+	bne	.L3458
 	adrp	x0, .LANCHOR86
 	ldrh	w0, [x0, #:lo12:.LANCHOR86]
 	sub	w0, w0, #1
 	and	w0, w0, 65535
-.L3446:
+.L3458:
 	adrp	x1, .LANCHOR36
 	ldrb	w1, [x1, #:lo12:.LANCHOR36]
-	cbnz	w1, .L3447
+	cbnz	w1, .L3459
 	adrp	x1, .LANCHOR37
 	ldrb	w1, [x1, #:lo12:.LANCHOR37]
-	cbz	w1, .L3445
-.L3447:
+	cbz	w1, .L3457
+.L3459:
 	adrp	x0, .LANCHOR86
 	ldrh	w0, [x0, #:lo12:.LANCHOR86]
 	sub	w0, w0, #1
 	and	w0, w0, 65535
-.L3445:
+.L3457:
 	add	x25, x21, :lo12:.LANCHOR71
 	orr	w20, w0, w20
 	mov	w0, 1
@@ -21716,13 +21816,13 @@ gc_scan_src_blk:
 	ldr	w0, [x19, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3448
-.L3491:
+	bne	.L3460
+.L3503:
 	mov	x0, x19
 	bl	zbuf_free
-.L3489:
+.L3501:
 	mov	w0, -1
-.L3435:
+.L3447:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -21730,25 +21830,25 @@ gc_scan_src_blk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L3467:
+.L3479:
 	mov	w27, 1
-	b	.L3445
-.L3448:
+	b	.L3457
+.L3460:
 	ldr	x7, [x19, 24]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	ldr	w1, [x7]
 	cmp	w1, w0
-	beq	.L3449
+	beq	.L3461
 	mov	w2, 1577
-.L3492:
+.L3504:
 	adrp	x1, .LANCHOR227
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR227
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3491
-.L3449:
+	b	.L3503
+.L3461:
 	adrp	x0, .LANCHOR80
 	ldrh	w26, [x22, #:lo12:.LANCHOR95]
 	ldrb	w25, [x0, #:lo12:.LANCHOR80]
@@ -21758,9 +21858,9 @@ gc_scan_src_blk:
 	cmp	w0, 2
 	mul	w26, w27, w26
 	and	w26, w26, 65535
-	bne	.L3450
+	bne	.L3462
 	cmp	w27, 3
-	bne	.L3450
+	bne	.L3462
 	adrp	x1, .LANCHOR86
 	adrp	x28, .LANCHOR221
 	adrp	x27, .LANCHOR77
@@ -21778,50 +21878,50 @@ gc_scan_src_blk:
 	bl	ftl_memcpy
 	ldr	x0, [x19, 24]
 	ldr	w6, [x0, 4]
-	cbz	w6, .L3451
+	cbz	w6, .L3463
 	ldr	x0, [x19, 8]
 	mov	w1, w25
 	bl	js_hash
 	cmp	w6, w0
-	beq	.L3451
+	beq	.L3463
 	mov	x0, x19
 	bl	zbuf_free
 	ldr	x0, [x19, 24]
 	mov	w3, w25
-.L3490:
+.L3502:
 	ldr	w1, [x0, 4]
 	adrp	x0, .LC218
 	ldr	w2, [x19, 40]
 	add	x0, x0, :lo12:.LC218
 	bl	printf
-	b	.L3489
-.L3451:
+	b	.L3501
+.L3463:
 	adrp	x0, .LANCHOR36
 	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbnz	w0, .L3452
+	cbnz	w0, .L3464
 	adrp	x0, .LANCHOR37
 	ldrb	w0, [x0, #:lo12:.LANCHOR37]
-	cbz	w0, .L3453
-.L3452:
+	cbz	w0, .L3465
+.L3464:
 	sub	w0, w20, #1
 	str	w0, [x19, 40]
-.L3454:
+.L3466:
 	mov	w1, 1
 	mov	x0, x19
 	bl	sblk_read_page
 	ldr	w0, [x19, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L3491
+	beq	.L3503
 	ldr	x0, [x19, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L3456
+	beq	.L3468
 	mov	w2, 1618
-	b	.L3492
-.L3453:
+	b	.L3504
+.L3465:
 	ldrh	w1, [x23, #:lo12:.LANCHOR111]
 	ldrh	w0, [x22, #:lo12:.LANCHOR95]
 	sub	w0, w0, #1
@@ -21830,12 +21930,12 @@ gc_scan_src_blk:
 	orr	w0, w0, 33554432
 	orr	w24, w0, w24
 	str	w24, [x19, 40]
-	b	.L3454
-.L3456:
+	b	.L3466
+.L3468:
 	ldrh	w2, [x28, #:lo12:.LANCHOR221]
 	ldr	x0, [x27, #:lo12:.LANCHOR77]
 	ldr	x1, [x19, 8]
-.L3488:
+.L3500:
 	adrp	x20, .LANCHOR77
 	bl	ftl_memcpy
 	adrp	x22, .LANCHOR75
@@ -21844,9 +21944,9 @@ gc_scan_src_blk:
 	add	x22, x22, :lo12:.LANCHOR75
 	add	x23, x23, :lo12:.LANCHOR32
 	mov	x25, 0
-.L3459:
+.L3471:
 	cmp	w26, w25
-	bgt	.L3464
+	bgt	.L3476
 	mov	x0, x19
 	bl	zbuf_free
 	adrp	x0, .LANCHOR9
@@ -21858,11 +21958,11 @@ gc_scan_src_blk:
 	ldrh	w3, [x3, 24]
 	ldrh	w2, [x4, x2]
 	cmp	w2, w3
-	beq	.L3465
+	beq	.L3477
 	adrp	x0, .LC219
 	add	x0, x0, :lo12:.LC219
 	bl	printf
-.L3465:
+.L3477:
 	add	x0, x21, :lo12:.LANCHOR71
 	ldrh	w2, [x21, #:lo12:.LANCHOR71]
 	ldr	x1, [x19, #:lo12:.LANCHOR9]
@@ -21870,8 +21970,8 @@ gc_scan_src_blk:
 	strh	w3, [x1, x2, lsl 1]
 	strh	wzr, [x0, 28]
 	ldrh	w0, [x0, 24]
-	b	.L3435
-.L3450:
+	b	.L3447
+.L3462:
 	ldr	x6, [x19, 8]
 	lsl	w20, w26, 2
 	mov	w1, w20
@@ -21879,31 +21979,31 @@ gc_scan_src_blk:
 	bl	js_hash
 	ldr	w1, [x7, 4]
 	cmp	w1, w0
-	beq	.L3458
+	beq	.L3470
 	mov	x0, x19
 	bl	zbuf_free
 	mov	w3, w20
 	ldr	x0, [x19, 24]
-	b	.L3490
-.L3458:
+	b	.L3502
+.L3470:
 	adrp	x0, .LANCHOR77
 	mov	w2, w20
 	mov	x1, x6
 	ldr	x0, [x0, #:lo12:.LANCHOR77]
-	b	.L3488
-.L3464:
+	b	.L3500
+.L3476:
 	ldr	w0, [x24, x25, lsl 2]
 	cmn	w0, #1
-	beq	.L3461
+	beq	.L3473
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 108]
 	cmn	w0, #1
-	bne	.L3462
+	bne	.L3474
 	ldr	w0, [x24, x25, lsl 2]
 	mov	w2, 0
 	add	x1, x29, 108
 	bl	pm_log2phys
-.L3462:
+.L3474:
 	ldrb	w0, [x23]
 	mov	w1, 24
 	ldrh	w2, [x22]
@@ -21921,16 +22021,16 @@ gc_scan_src_blk:
 	udiv	w0, w0, w1
 	add	x1, x21, :lo12:.LANCHOR71
 	cmp	w0, w2
-	bne	.L3461
+	bne	.L3473
 	ldrh	w0, [x1, 24]
 	ldr	x4, [x20, #:lo12:.LANCHOR77]
 	ubfiz	x2, x0, 2, 16
 	add	w0, w0, 1
 	str	w3, [x4, x2]
 	strh	w0, [x1, 24]
-.L3461:
+.L3473:
 	add	x25, x25, 1
-	b	.L3459
+	b	.L3471
 	.size	gc_scan_src_blk, .-gc_scan_src_blk
 	.section	.text.gc_scan_static_data,"ax",@progbits
 	.align	2
@@ -21946,13 +22046,13 @@ gc_scan_static_data:
 	ldr	w1, [x0, 544]
 	str	x23, [sp, 48]
 	cmn	w1, #1
-	beq	.L3494
+	beq	.L3506
 	adrp	x21, .LANCHOR228
 	adrp	x22, .LC0
 	add	x21, x21, :lo12:.LANCHOR228
 	add	x22, x22, :lo12:.LC0
-	mov	w20, 11
-.L3502:
+	mov	w20, 0
+.L3514:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w2, 0
 	add	x1, x29, 76
@@ -21960,7 +22060,7 @@ gc_scan_static_data:
 	bl	pm_log2phys
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L3495
+	beq	.L3507
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 76]
@@ -21970,7 +22070,7 @@ gc_scan_static_data:
 	bl	sblk_read_page
 	ldr	w0, [x23, 52]
 	cmp	w0, 256
-	bne	.L3496
+	bne	.L3508
 	adrp	x0, .LANCHOR75
 	ldr	w2, [x29, 76]
 	ldrh	w3, [x0, #:lo12:.LANCHOR75]
@@ -21989,21 +22089,21 @@ gc_scan_static_data:
 	mov	w2, 0
 	udiv	w0, w0, w3
 	bl	gc_add_sblk
-.L3496:
+.L3508:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldr	x1, [x23, 24]
 	ldr	w0, [x0, 544]
 	ldr	w1, [x1, 4]
 	cmp	w1, w0
-	beq	.L3497
+	beq	.L3509
 	mov	w2, 2162
 	mov	x1, x21
 	mov	x0, x22
 	bl	printf
-.L3497:
+.L3509:
 	mov	x0, x23
 	bl	zbuf_free
-.L3495:
+.L3507:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	adrp	x2, .LANCHOR128
 	ldr	w2, [x2, #:lo12:.LANCHOR128]
@@ -22011,7 +22111,7 @@ gc_scan_static_data:
 	add	w1, w1, 1
 	str	w1, [x0, 544]
 	cmp	w1, w2
-	bcc	.L3498
+	bcc	.L3510
 	mov	w1, -1
 	str	w1, [x0, 544]
 	ldr	w1, [x0, 548]
@@ -22022,42 +22122,46 @@ gc_scan_static_data:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-.L3493:
+.L3505:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L3498:
+.L3510:
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	bne	.L3493
-	sub	w20, w20, #1
-	ands	w20, w20, 65535
-	bne	.L3502
-	b	.L3493
-.L3494:
+	bne	.L3505
+	adrp	x1, .LANCHOR221
+	add	w0, w20, 1
+	and	w0, w0, 65535
+	ldrh	w1, [x1, #:lo12:.LANCHOR221]
+	cmp	w20, w1, lsr 2
+	bcs	.L3505
+	mov	w20, w0
+	b	.L3514
+.L3506:
 	ldr	w1, [x0, 536]
 	adrp	x3, .LANCHOR110
 	ldr	w2, [x0, 12]
 	add	w1, w1, 12959744
 	add	w1, w1, 256
 	cmp	w2, w1
-	bhi	.L3504
+	bhi	.L3516
 	ldr	x4, [x3, #:lo12:.LANCHOR110]
 	mov	w5, 5000
 	ldr	w1, [x0, 540]
 	add	w1, w1, w5
 	ldr	w4, [x4, 44]
 	cmp	w4, w1
-	bls	.L3493
-.L3504:
+	bls	.L3505
+.L3516:
 	ldr	x1, [x3, #:lo12:.LANCHOR110]
 	ldr	w1, [x1, 44]
 	str	w1, [x0, 540]
 	str	w2, [x0, 536]
 	str	wzr, [x0, 544]
-	b	.L3493
+	b	.L3505
 	.size	gc_scan_static_data, .-gc_scan_static_data
 	.section	.text.ftl_sblk_dump,"ax",@progbits
 	.align	2
@@ -22093,20 +22197,20 @@ ftl_sblk_dump:
 	bl	printf
 	mov	w0, 65535
 	cmp	w20, w0
-	beq	.L3533
+	beq	.L3545
 	adrp	x0, .LANCHOR6
 	ldrh	w0, [x0, #:lo12:.LANCHOR6]
 	cmp	w0, w20
-	bls	.L3533
+	bls	.L3545
 	ldr	x0, [x24, #:lo12:.LANCHOR7]
 	add	x0, x0, x23
 	ldrb	w0, [x0, 2]
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L3534
+	bne	.L3546
 	adrp	x0, .LANCHOR79
 	ldrb	w25, [x0, #:lo12:.LANCHOR79]
-.L3512:
+.L3524:
 	add	x28, x29, 240
 	adrp	x21, .LANCHOR95
 	mov	w0, w20
@@ -22141,11 +22245,11 @@ ftl_sblk_dump:
 	str	wzr, [x29, 176]
 	add	x0, x0, :lo12:.LANCHOR111
 	str	x0, [x29, 112]
-.L3513:
+.L3525:
 	ldr	x0, [x29, 136]
 	ldrh	w0, [x0, #:lo12:.LANCHOR95]
 	cmp	w0, w19
-	bls	.L3530
+	bls	.L3542
 	lsl	w0, w19, 1
 	mov	w22, 0
 	sub	w1, w0, #1
@@ -22155,41 +22259,41 @@ ftl_sblk_dump:
 	adrp	x0, .LC167
 	add	x0, x0, :lo12:.LC167
 	str	x0, [x29, 120]
-	b	.L3531
-.L3534:
+	b	.L3543
+.L3546:
 	mov	w25, 1
-	b	.L3512
-.L3527:
+	b	.L3524
+.L3539:
 	ldr	x0, [x29, 128]
 	ldrh	w11, [x28, x0]
 	mov	w0, 65535
 	cmp	w11, w0
-	beq	.L3514
+	beq	.L3526
 	ldr	x0, [x29, 112]
 	cmp	w25, 3
 	ldrh	w8, [x0]
 	mul	w1, w8, w11
 	add	w0, w21, w1
-	bne	.L3515
+	bne	.L3527
 	adrp	x2, .LANCHOR36
 	ldrb	w2, [x2, #:lo12:.LANCHOR36]
-	cbz	w2, .L3516
+	cbz	w2, .L3528
 	adrp	x1, .LANCHOR79
 	ldrb	w8, [x1, #:lo12:.LANCHOR79]
 	ldr	w1, [x29, 156]
-.L3543:
+.L3555:
 	add	w0, w0, w1
 	orr	w27, w0, w8, lsl 24
-	b	.L3517
-.L3516:
+	b	.L3529
+.L3528:
 	adrp	x2, .LANCHOR37
 	lsl	w8, w21, 24
 	ldrb	w2, [x2, #:lo12:.LANCHOR37]
-	cbz	w2, .L3518
+	cbz	w2, .L3530
 	ldr	w1, [x29, 156]
 	add	w0, w0, w1
 	orr	w27, w0, w8
-.L3517:
+.L3529:
 	str	w27, [x26, 40]
 	mov	w1, 1
 	str	w11, [x29, 100]
@@ -22231,22 +22335,22 @@ ftl_sblk_dump:
 	and	w0, w0, 224
 	cmp	w0, 224
 	ccmp	w0, w1, 4, ne
-	beq	.L3514
+	beq	.L3526
 	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 204]
 	cmn	w0, #1
-	bne	.L3521
+	bne	.L3533
 	ldr	x0, [x26, 24]
 	mov	w2, 0
 	add	x1, x29, 204
 	ldr	w0, [x0, 4]
 	bl	pm_log2phys
-.L3521:
+.L3533:
 	ldr	w0, [x29, 204]
 	cmp	w27, w0
-	bne	.L3522
+	bne	.L3534
 	ldr	w0, [x29, 172]
 	mov	w1, w27
 	add	w0, w0, 1
@@ -22257,9 +22361,9 @@ ftl_sblk_dump:
 	adrp	x0, .LC222
 	add	x0, x0, :lo12:.LC222
 	bl	printf
-.L3522:
+.L3534:
 	ldr	x0, [x29, 160]
-	cbz	x0, .L3524
+	cbz	x0, .L3536
 	ldr	x0, [x29, 176]
 	ubfiz	x3, x0, 2, 32
 	ldr	x0, [x29, 160]
@@ -22267,72 +22371,72 @@ ftl_sblk_dump:
 	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	cmp	w0, w2
-	beq	.L3525
+	beq	.L3537
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3525
+	tbz	x0, 12, .L3537
 	ldr	w1, [x29, 176]
 	adrp	x0, .LC223
 	str	x3, [x29, 104]
 	add	x0, x0, :lo12:.LC223
 	bl	printf
 	ldr	x3, [x29, 104]
-.L3525:
+.L3537:
 	ldr	x1, [x26, 24]
 	ldr	x0, [x29, 160]
 	ldr	w1, [x1, 4]
 	ldr	w0, [x0, x3]
 	cmp	w1, w0
-	beq	.L3524
+	beq	.L3536
 	cmn	w0, #1
-	beq	.L3524
+	beq	.L3536
 	adrp	x1, .LANCHOR229
 	adrp	x0, .LC0
 	mov	w2, 1567
 	add	x1, x1, :lo12:.LANCHOR229
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3524:
+.L3536:
 	ldr	w0, [x29, 176]
 	add	w0, w0, 1
 	str	w0, [x29, 176]
-.L3514:
+.L3526:
 	add	w21, w21, 1
 	and	w21, w21, 65535
-.L3529:
+.L3541:
 	cmp	w25, w21
-	bcs	.L3527
+	bcs	.L3539
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L3531:
+.L3543:
 	ldrb	w0, [x29, 217]
 	cmp	w0, w22
-	bls	.L3528
+	bls	.L3540
 	sxtw	x0, w22
 	mov	w21, 1
 	add	x0, x0, 8
 	lsl	x0, x0, 1
 	str	x0, [x29, 128]
-	b	.L3529
-.L3518:
+	b	.L3541
+.L3530:
 	add	w1, w19, w1
 	orr	w27, w8, w1
-	b	.L3517
-.L3515:
+	b	.L3529
+.L3527:
 	cmp	w25, 2
-	bne	.L3519
+	bne	.L3531
 	adrp	x1, .LANCHOR79
 	ldrb	w8, [x1, #:lo12:.LANCHOR79]
 	ldr	w1, [x29, 152]
-	b	.L3543
-.L3519:
+	b	.L3555
+.L3531:
 	add	w27, w19, w1
-	b	.L3517
-.L3528:
+	b	.L3529
+.L3540:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L3513
-.L3530:
+	b	.L3525
+.L3542:
 	mov	x0, x26
 	bl	zbuf_free
 	adrp	x0, .LANCHOR9
@@ -22345,7 +22449,7 @@ ftl_sblk_dump:
 	add	x0, x0, :lo12:.LC224
 	bl	printf
 	ldr	w0, [x29, 168]
-.L3510:
+.L3522:
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
 	ldp	x23, x24, [sp, 96]
@@ -22354,9 +22458,9 @@ ftl_sblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 288
 	ret
-.L3533:
+.L3545:
 	mov	w0, 0
-	b	.L3510
+	b	.L3522
 	.size	ftl_sblk_dump, .-ftl_sblk_dump
 	.section	.text.zftl_read,"ax",@progbits
 	.align	2
@@ -22377,25 +22481,25 @@ zftl_read:
 	stp	x25, x26, [sp, 80]
 	mov	x22, x3
 	stp	x27, x28, [sp, 96]
-	tbz	x0, 12, .L3545
+	tbz	x0, 12, .L3557
 	mov	w3, w2
 	adrp	x0, .LC225
 	mov	w2, w1
 	add	x0, x0, :lo12:.LC225
 	mov	w1, w19
 	bl	printf
-.L3545:
-	cbnz	w19, .L3546
+.L3557:
+	cbnz	w19, .L3558
 	adrp	x0, .LANCHOR68
 	mov	w19, 24576
 	ldr	w0, [x0, #:lo12:.LANCHOR68]
-.L3547:
+.L3559:
 	cmp	w0, w20
 	ccmp	w0, w23, 0, hi
-	bcc	.L3577
+	bcc	.L3589
 	add	w1, w20, w23
 	cmp	w0, w1
-	bcc	.L3577
+	bcc	.L3589
 	adrp	x1, .LANCHOR110
 	adrp	x26, .LANCHOR131
 	add	w19, w19, w20
@@ -22417,10 +22521,10 @@ zftl_read:
 	add	w25, w25, 1
 	adrp	x0, .LANCHOR134
 	add	x28, x0, :lo12:.LANCHOR134
-.L3549:
-	cbnz	w25, .L3574
+.L3561:
+	cbnz	w25, .L3586
 	ldr	w0, [x29, 164]
-.L3544:
+.L3556:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -22429,22 +22533,22 @@ zftl_read:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 208
 	ret
-.L3546:
+.L3558:
 	cmp	w19, 3
-	bhi	.L3577
+	bhi	.L3589
 	lsl	w19, w19, 13
 	mov	w0, 8192
-	b	.L3547
-.L3574:
+	b	.L3559
+.L3586:
 	ldr	x0, [x29, 168]
 	cmp	w20, w27
 	ldrb	w1, [x0, #:lo12:.LANCHOR131]
 	ldr	w0, [x29, 156]
 	and	w24, w1, 65535
 	ccmp	w20, w0, 4, ne
-	bne	.L3578
+	bne	.L3590
 	cmp	w20, w27
-	bne	.L3551
+	bne	.L3563
 	udiv	w3, w19, w1
 	and	w0, w23, 65535
 	msub	w1, w3, w1, w19
@@ -22453,17 +22557,17 @@ zftl_read:
 	and	w24, w24, 65535
 	cmp	w23, w24
 	csel	w24, w0, w24, cc
-.L3550:
+.L3562:
 	adrp	x21, .LANCHOR56
 	add	x1, x21, :lo12:.LANCHOR56
 	add	x1, x1, 2
 	mov	w0, 0
-.L3554:
+.L3566:
 	ldr	w2, [x1, 34]
 	cmp	w20, w2
-	bne	.L3552
+	bne	.L3564
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L3552
+	tbz	x2, 3, .L3564
 	add	x1, x21, :lo12:.LANCHOR56
 	ubfiz	x0, x0, 6, 32
 	add	x0, x1, x0
@@ -22475,19 +22579,19 @@ zftl_read:
 	add	x22, x22, x24
 	add	x1, x1, x26
 	bl	ftl_memcpy
-.L3553:
+.L3565:
 	add	w20, w20, 1
 	sub	w25, w25, #1
-.L3560:
+.L3572:
 	adrp	x0, .LANCHOR58
 	ldrb	w0, [x0, #:lo12:.LANCHOR58]
 	cmp	w0, 2
-	bls	.L3561
-	cbnz	w25, .L3549
-.L3561:
+	bls	.L3573
+	cbnz	w25, .L3561
+.L3573:
 	adrp	x0, .LANCHOR134
 	ldrb	w1, [x0, #:lo12:.LANCHOR134]
-	cbz	w1, .L3549
+	cbz	w1, .L3561
 	adrp	x24, .LANCHOR133
 	add	x0, x21, :lo12:.LANCHOR56
 	ldrb	w2, [x24, #:lo12:.LANCHOR133]
@@ -22499,63 +22603,63 @@ zftl_read:
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	str	x0, [x29, 128]
-.L3563:
+.L3575:
 	ldrb	w0, [x28]
-	cbnz	w0, .L3573
+	cbnz	w0, .L3585
 	mov	w0, -1
 	strb	wzr, [x28]
 	strb	w0, [x24, #:lo12:.LANCHOR133]
-	b	.L3549
-.L3551:
+	b	.L3561
+.L3563:
 	ldr	w0, [x29, 160]
 	msub	w24, w1, w20, w0
 	and	w24, w24, 255
-.L3578:
+.L3590:
 	mov	w26, 0
-	b	.L3550
-.L3552:
+	b	.L3562
+.L3564:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 16
-	bne	.L3554
+	bne	.L3566
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L3555
+	bne	.L3567
 	mov	w2, 0
 	add	x1, x29, 188
 	mov	w0, w20
 	bl	pm_log2phys
-.L3555:
+.L3567:
 	ldr	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L3556
+	bne	.L3568
 	ldr	x0, [x29, 168]
 	mov	w24, 0
 	add	x26, x0, :lo12:.LANCHOR131
-.L3557:
+.L3569:
 	ldrb	w0, [x26]
 	cmp	w24, w0
-	bcs	.L3553
+	bcs	.L3565
 	madd	w0, w20, w0, w24
 	cmp	w19, w0
-	bhi	.L3558
+	bhi	.L3570
 	ldr	w1, [x29, 160]
 	cmp	w1, w0
-	bls	.L3558
+	bls	.L3570
 	mov	x0, x22
 	add	x22, x22, 512
 	mov	w2, 512
 	mov	w1, 0
 	bl	ftl_memset
-.L3558:
+.L3570:
 	add	w24, w24, 1
-	b	.L3557
-.L3556:
+	b	.L3569
+.L3568:
 	mov	w0, 0
 	bl	buf_alloc
-	cbz	x0, .L3560
+	cbz	x0, .L3572
 	ldr	x2, [x29, 120]
 	ldr	x4, [x2, #:lo12:.LANCHOR110]
 	ldr	w2, [x4, 40]
@@ -22570,15 +22674,15 @@ zftl_read:
 	stp	w20, w2, [x0, 36]
 	str	w2, [x0, 44]
 	bl	zftl_add_read_buf
-	b	.L3553
-.L3573:
+	b	.L3565
+.L3585:
 	ldrb	w0, [x24, #:lo12:.LANCHOR133]
 	cmp	w0, 255
-	bne	.L3564
+	bne	.L3576
 	ldp	x0, x1, [x29, 128]
 	mov	w2, 1276
 	bl	printf
-.L3564:
+.L3576:
 	ldrb	w26, [x24, #:lo12:.LANCHOR133]
 	add	x0, x21, :lo12:.LANCHOR56
 	ubfiz	x1, x26, 6, 8
@@ -22590,24 +22694,24 @@ zftl_read:
 	strb	w0, [x24, #:lo12:.LANCHOR133]
 	ldr	w10, [x1, 52]
 	cmn	w10, #1
-	bne	.L3565
+	bne	.L3577
 	adrp	x0, .LANCHOR10
 	str	w10, [x29, 164]
 	ldr	x1, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x1, 552]
 	add	w0, w0, 1
 	str	w0, [x1, 552]
-.L3566:
+.L3578:
 	add	x1, x21, :lo12:.LANCHOR56
 	add	x1, x1, x26, lsl 6
 	ldr	x0, [x1, 24]
 	ldr	w3, [x1, 36]
 	ldr	w1, [x0, 4]
 	cmp	w1, w3
-	bne	.L3567
+	bne	.L3579
 	cmn	w10, #1
-	bne	.L3568
-.L3567:
+	bne	.L3580
+.L3579:
 	adrp	x1, .LANCHOR10
 	add	x11, x21, :lo12:.LANCHOR56
 	add	x11, x11, x26, lsl 6
@@ -22647,28 +22751,28 @@ zftl_read:
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
 	ldr	w10, [x29, 152]
-.L3568:
+.L3580:
 	add	x0, x21, :lo12:.LANCHOR56
 	add	x0, x0, x26, lsl 6
 	ldr	x1, [x0, 24]
 	ldr	w0, [x0, 36]
 	ldr	w1, [x1, 4]
 	cmp	w1, w0
-	bne	.L3569
+	bne	.L3581
 	cmn	w10, #1
-	bne	.L3570
-.L3569:
+	bne	.L3582
+.L3581:
 	ldp	x0, x1, [x29, 128]
 	mov	w2, 1301
 	bl	printf
-.L3570:
+.L3582:
 	add	x0, x21, :lo12:.LANCHOR56
 	add	x8, x0, x26, lsl 6
 	ldr	x0, [x29, 168]
 	ldrb	w2, [x8, 56]
 	ldrb	w0, [x0, #:lo12:.LANCHOR131]
 	cmp	w0, w2
-	bls	.L3571
+	bls	.L3583
 	ldrb	w0, [x8, 57]
 	lsl	w2, w2, 9
 	ldr	x1, [x8, 8]
@@ -22676,7 +22780,7 @@ zftl_read:
 	add	x1, x1, x0
 	ldr	x0, [x8, 16]
 	bl	ftl_memcpy
-.L3572:
+.L3584:
 	ldr	x1, [x29, 144]
 	adrp	x0, .LANCHOR63
 	add	x0, x0, :lo12:.LANCHOR63
@@ -22686,10 +22790,10 @@ zftl_read:
 	ldrb	w0, [x28]
 	sub	w0, w0, #1
 	strb	w0, [x28]
-	b	.L3563
-.L3565:
+	b	.L3575
+.L3577:
 	cmp	w10, 256
-	bne	.L3566
+	bne	.L3578
 	adrp	x2, .LANCHOR32
 	adrp	x0, .LANCHOR75
 	mov	w4, 24
@@ -22719,15 +22823,15 @@ zftl_read:
 	mov	w0, w4
 	bl	gc_add_sblk
 	ldr	w10, [x29, 108]
-	b	.L3566
-.L3571:
+	b	.L3578
+.L3583:
 	ldrb	w0, [x8, 2]
 	and	w0, w0, -9
 	strb	w0, [x8, 2]
-	b	.L3572
-.L3577:
+	b	.L3584
+.L3589:
 	mov	w0, -1
-	b	.L3544
+	b	.L3556
 	.size	zftl_read, .-zftl_read
 	.section	.text.zftl_sys_read,"ax",@progbits
 	.align	2
@@ -22824,26 +22928,26 @@ ftl_update_l2p_map:
 	add	x1, x19, x23, sxtw 2
 	ldr	w1, [x1, -4]
 	cmn	w1, #1
-	beq	.L3601
+	beq	.L3613
 	adrp	x1, .LANCHOR231
 	adrp	x0, .LC0
 	mov	w2, 1990
 	add	x1, x1, :lo12:.LANCHOR231
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3601:
+.L3613:
 	adrp	x27, .LANCHOR131
 	mov	x24, 0
 	add	x0, x27, :lo12:.LANCHOR131
 	mov	w21, 0
 	str	x0, [x29, 96]
-.L3602:
+.L3614:
 	cmp	w24, w23
-	blt	.L3608
+	blt	.L3620
 	adrp	x0, .LANCHOR14
 	adrp	x19, .LANCHOR9
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3609
+	tbz	x0, 12, .L3621
 	ldrh	w1, [x22]
 	ldr	x2, [x19, #:lo12:.LANCHOR9]
 	ubfiz	x0, x1, 1, 16
@@ -22852,7 +22956,7 @@ ftl_update_l2p_map:
 	mov	w2, w21
 	add	x0, x0, :lo12:.LC231
 	bl	printf
-.L3609:
+.L3621:
 	ldrh	w1, [x22]
 	ldr	x0, [x19, #:lo12:.LANCHOR9]
 	ldp	x23, x24, [sp, 48]
@@ -22863,38 +22967,38 @@ ftl_update_l2p_map:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L3608:
+.L3620:
 	ldr	w2, [x19, x24, lsl 2]
 	cmn	w2, #1
-	beq	.L3603
+	beq	.L3615
 	ldrb	w20, [x27, #:lo12:.LANCHOR131]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	lsl	w20, w20, 7
 	udiv	w20, w2, w20
 	and	w20, w20, 65535
-	tbz	x0, 12, .L3604
+	tbz	x0, 12, .L3616
 	adrp	x0, .LC228
 	mov	w3, w24
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC228
 	bl	printf
-.L3604:
+.L3616:
 	adrp	x25, .LANCHOR111
 	adrp	x26, .LC229
 	mov	x28, x24
 	add	x25, x25, :lo12:.LANCHOR111
 	add	x26, x26, :lo12:.LC229
-.L3607:
+.L3619:
 	ldr	w1, [x19, x28, lsl 2]
 	cmn	w1, #1
-	beq	.L3605
+	beq	.L3617
 	ldr	x0, [x29, 96]
 	ldrb	w2, [x0]
 	lsl	w2, w2, 7
 	udiv	w1, w1, w2
 	cmp	w20, w1, uxth
-	bne	.L3605
+	bne	.L3617
 	ldrb	w0, [x22, 9]
 	sdiv	w1, w28, w0
 	msub	w0, w1, w0, w28
@@ -22906,7 +23010,7 @@ ftl_update_l2p_map:
 	str	w2, [x29, 124]
 	ldr	w1, [x19, x28, lsl 2]
 	bl	pm_ppa_update_check
-	cbz	w0, .L3606
+	cbz	w0, .L3618
 	ldr	x0, [x29, 104]
 	mov	w3, w23
 	mov	w2, 4
@@ -22914,7 +23018,7 @@ ftl_update_l2p_map:
 	adrp	x0, .LC230
 	add	x0, x0, :lo12:.LC230
 	bl	rknand_print_hex
-.L3606:
+.L3618:
 	ldr	w0, [x19, x28, lsl 2]
 	add	w21, w21, 1
 	mov	w2, 1
@@ -22923,13 +23027,13 @@ ftl_update_l2p_map:
 	bl	pm_log2phys
 	mov	w0, -1
 	str	w0, [x19, x28, lsl 2]
-.L3605:
+.L3617:
 	add	x28, x28, 1
 	cmp	w23, w28
-	bgt	.L3607
-.L3603:
+	bgt	.L3619
+.L3615:
 	add	x24, x24, 1
-	b	.L3602
+	b	.L3614
 	.size	ftl_update_l2p_map, .-ftl_update_l2p_map
 	.section	.text.ftl_alloc_new_data_sblk,"ax",@progbits
 	.align	2
@@ -22947,9 +23051,9 @@ ftl_alloc_new_data_sblk:
 	ldrh	w0, [x20]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3631
+	beq	.L3643
 	bl	zftl_insert_data_list
-.L3631:
+.L3643:
 	adrp	x19, .LANCHOR10
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	add	x0, x0, 16
@@ -22961,10 +23065,10 @@ ftl_alloc_new_data_sblk:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldr	w0, [x0, 560]
 	cmp	w0, w21
-	bne	.L3633
+	bne	.L3645
 	mov	w20, 65535
 	cmp	w21, w20
-	beq	.L3633
+	beq	.L3645
 	mov	w1, w21
 	adrp	x0, .LC232
 	add	x0, x0, :lo12:.LC232
@@ -22976,7 +23080,7 @@ ftl_alloc_new_data_sblk:
 	mov	w1, -1
 	str	w20, [x0, 560]
 	str	w1, [x0, 564]
-.L3633:
+.L3645:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
@@ -23003,10 +23107,10 @@ ftl_write_commit:
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	str	x0, [x29, 104]
-.L3637:
+.L3649:
 	adrp	x2, .LANCHOR67
 	ldrb	w1, [x2, #:lo12:.LANCHOR67]
-	cbz	w1, .L3639
+	cbz	w1, .L3651
 	adrp	x3, .LANCHOR66
 	adrp	x0, .LANCHOR56
 	add	x0, x0, :lo12:.LANCHOR56
@@ -23025,24 +23129,24 @@ ftl_write_commit:
 	mov	x19, x0
 	ldr	w1, [x0, #:lo12:.LANCHOR128]
 	cmp	w2, w1
-	bcc	.L3641
+	bcc	.L3653
 	adrp	x1, .LANCHOR232
 	adrp	x0, .LC0
 	mov	w2, 604
 	add	x1, x1, :lo12:.LANCHOR232
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3641:
+.L3653:
 	ldr	x0, [x29, 128]
 	ldr	w1, [x19, #:lo12:.LANCHOR128]
 	add	x0, x24, x0, lsl 6
 	ldr	w22, [x0, 36]
 	cmp	w22, w1
-	bcc	.L3642
+	bcc	.L3654
 	ldr	x0, [x29, 136]
 	bl	zbuf_free
 	mov	w0, -1
-.L3636:
+.L3648:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -23050,7 +23154,7 @@ ftl_write_commit:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L3642:
+.L3654:
 	ldrb	w21, [x0, 57]
 	ldrb	w20, [x0, 56]
 	ldr	x26, [x0, 8]
@@ -23058,17 +23162,17 @@ ftl_write_commit:
 	adrp	x0, .LANCHOR129
 	str	x0, [x29, 120]
 	ldrb	w1, [x0, #:lo12:.LANCHOR129]
-	cbz	w1, .L3644
+	cbz	w1, .L3656
 	adrp	x0, .LANCHOR185
 	ldrb	w19, [x0, #:lo12:.LANCHOR185]
 	add	x19, x24, x19, lsl 6
-.L3645:
+.L3657:
 	ldrb	w0, [x19]
 	cmp	w0, 255
-	bne	.L3646
+	bne	.L3658
 	ldr	w0, [x19, 36]
 	cmp	w22, w0
-	bne	.L3644
+	bne	.L3656
 	ldr	x0, [x19, 8]
 	ubfiz	x21, x21, 9, 8
 	lsl	w2, w20, 9
@@ -23087,22 +23191,22 @@ ftl_write_commit:
 	bl	ftl_debug_info_fill
 	ldr	x0, [x29, 136]
 	bl	zbuf_free
-	b	.L3637
-.L3646:
+	b	.L3649
+.L3658:
 	ubfiz	x19, x0, 6, 8
 	add	x19, x24, x19
-	b	.L3645
-.L3644:
+	b	.L3657
+.L3656:
 	mov	w0, w22
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 156]
 	cmn	w0, #1
-	bne	.L3648
+	bne	.L3660
 	mov	w2, 0
 	add	x1, x29, 156
 	mov	w0, w22
 	bl	pm_log2phys
-.L3648:
+.L3660:
 	adrp	x27, .LANCHOR10
 	ldr	w2, [x29, 156]
 	add	x0, x24, 2
@@ -23110,61 +23214,61 @@ ftl_write_commit:
 	ldr	x19, [x27, #:lo12:.LANCHOR10]
 	mov	x25, 0
 	add	x19, x19, 16
-.L3650:
+.L3662:
 	ldr	w1, [x0, 34]
 	cmp	w22, w1
-	bne	.L3649
+	bne	.L3661
 	ldrb	w1, [x0]
-	tbz	x1, 3, .L3649
+	tbz	x1, 3, .L3661
 	ldr	w2, [x0, 38]
 	and	w1, w1, -9
 	ldr	x25, [x0, 6]
 	mov	w3, 1
 	strb	w1, [x0]
-.L3649:
+.L3661:
 	ldr	x1, [x29, 104]
 	add	x0, x0, 64
 	cmp	x0, x1
-	bne	.L3650
-	cbz	w3, .L3651
+	bne	.L3662
+	cbz	w3, .L3663
 	str	w2, [x29, 156]
-.L3651:
+.L3663:
 	adrp	x0, .LANCHOR131
 	str	x0, [x29, 112]
 	ldrb	w1, [x0, #:lo12:.LANCHOR131]
 	cmp	w20, w1
-	bcs	.L3675
+	bcs	.L3687
 	add	w20, w21, w20
-	cbz	x25, .L3653
-	cbz	w21, .L3654
+	cbz	x25, .L3665
+	cbz	w21, .L3666
 	lsl	w2, w21, 9
 	mov	x1, x25
 	mov	x0, x26
 	bl	ftl_memcpy
 	ldr	x19, [x27, #:lo12:.LANCHOR10]
 	add	x19, x19, 48
-.L3654:
+.L3666:
 	ldr	x0, [x29, 112]
 	ldrb	w2, [x0, #:lo12:.LANCHOR131]
 	cmp	w20, w2
-	bcc	.L3655
+	bcc	.L3667
 	ldr	x19, [x27, #:lo12:.LANCHOR10]
 	add	x19, x19, 16
-.L3675:
+.L3687:
 	mov	w25, 0
-	b	.L3652
-.L3655:
+	b	.L3664
+.L3667:
 	ubfiz	x0, x20, 9, 9
 	sub	w2, w2, w20
 	add	x1, x25, x0
 	lsl	w2, w2, 9
 	add	x0, x26, x0
 	bl	ftl_memcpy
-	b	.L3675
-.L3653:
+	b	.L3687
+.L3665:
 	ldr	w0, [x29, 156]
 	cmn	w0, #1
-	beq	.L3656
+	beq	.L3668
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 156]
@@ -23177,11 +23281,11 @@ ftl_write_commit:
 	ldr	w0, [x0, 4]
 	add	w25, w25, 1
 	cmp	w22, w0
-	bne	.L3657
+	bne	.L3669
 	ldr	w0, [x28, 52]
 	cmn	w0, #1
-	bne	.L3658
-.L3657:
+	bne	.L3670
+.L3669:
 	ldr	x1, [x27, #:lo12:.LANCHOR10]
 	mov	w3, w22
 	ldr	w4, [x28, 52]
@@ -23199,43 +23303,43 @@ ftl_write_commit:
 	mov	w2, w3
 	add	x0, x0, :lo12:.LC205
 	bl	rknand_print_hex
-.L3658:
+.L3670:
 	ldr	x0, [x28, 24]
 	ldr	w0, [x0, 4]
 	cmp	w22, w0
-	bne	.L3659
+	bne	.L3671
 	ldr	w0, [x28, 52]
 	cmn	w0, #1
-	bne	.L3660
-.L3659:
+	bne	.L3672
+.L3671:
 	adrp	x1, .LANCHOR232
 	adrp	x0, .LC0
 	mov	w2, 691
 	add	x1, x1, :lo12:.LANCHOR232
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3660:
-	cbz	w21, .L3661
+.L3672:
+	cbz	w21, .L3673
 	ldr	w0, [x29, 156]
 	lsl	w2, w21, 9
 	cmn	w0, #1
-	beq	.L3662
+	beq	.L3674
 	ldr	x1, [x28, 8]
 	mov	x0, x26
 	bl	ftl_memcpy
-.L3663:
+.L3675:
 	ldr	x19, [x27, #:lo12:.LANCHOR10]
 	add	x19, x19, 48
-.L3661:
+.L3673:
 	ldr	x0, [x29, 112]
 	ldrb	w2, [x0, #:lo12:.LANCHOR131]
 	cmp	w20, w2
-	bcc	.L3664
-	bls	.L3665
+	bcc	.L3676
+	bls	.L3677
 	ldr	x19, [x27, #:lo12:.LANCHOR10]
 	add	x19, x19, 16
-.L3665:
-	cbz	x28, .L3652
+.L3677:
+	cbz	x28, .L3664
 	ldrb	w0, [x28, 2]
 	mov	x1, x28
 	and	w0, w0, -9
@@ -23245,13 +23349,13 @@ ftl_write_commit:
 	bl	buf_remove_buf
 	mov	x0, x28
 	bl	zbuf_free
-.L3652:
+.L3664:
 	ldrh	w0, [x19, 6]
-	cbnz	w0, .L3667
+	cbnz	w0, .L3679
 	bl	ftl_flush
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L3667:
+.L3679:
 	mov	x0, x19
 	bl	ftl_get_new_free_page
 	mov	w10, w0
@@ -23298,10 +23402,10 @@ ftl_write_commit:
 	cmp	w2, 2
 	str	wzr, [x0, #:lo12:.LANCHOR233]
 	ldrh	w0, [x19, 6]
-	bhi	.L3668
+	bhi	.L3680
 	cmp	w0, 1
-	bne	.L3640
-.L3668:
+	bne	.L3652
+.L3680:
 	ldrb	w1, [x19, 5]
 	cmp	w1, 0
 	mov	w1, 0
@@ -23310,9 +23414,9 @@ ftl_write_commit:
 	ldrb	w0, [x20, #:lo12:.LANCHOR185]
 	csinc	w4, w2, w4, eq
 	mov	w3, w0
-.L3672:
+.L3684:
 	cmp	w1, w4
-	bne	.L3673
+	bne	.L3685
 	strb	w3, [x20, #:lo12:.LANCHOR185]
 	and	w1, w1, 255
 	ldr	x3, [x29, 120]
@@ -23323,58 +23427,58 @@ ftl_write_commit:
 	bl	sblk_prog_page
 	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bne	.L3640
+	bne	.L3652
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	mov	x0, x19
 	bl	ftl_write_last_log_page
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L3640:
+.L3652:
 	adrp	x0, .LANCHOR67
 	ldrb	w0, [x0, #:lo12:.LANCHOR67]
-	cbnz	w0, .L3637
-.L3639:
+	cbnz	w0, .L3649
+.L3651:
 	bl	ftl_write_completed
 	mov	w0, 0
-	b	.L3636
-.L3664:
+	b	.L3648
+.L3676:
 	ldr	w0, [x29, 156]
 	sub	w2, w2, w20
 	lsl	w2, w2, 9
 	cmn	w0, #1
 	ubfiz	x0, x20, 7, 9
-	beq	.L3666
+	beq	.L3678
 	ldr	x1, [x28, 8]
 	lsl	x0, x0, 2
 	add	x1, x1, x0
 	add	x0, x26, x0
 	bl	ftl_memcpy
-	b	.L3665
-.L3666:
+	b	.L3677
+.L3678:
 	mov	w1, 0
 	add	x0, x26, x0, lsl 2
 	bl	ftl_memset
-	b	.L3665
-.L3673:
+	b	.L3677
+.L3685:
 	ubfiz	x3, x3, 6, 8
 	add	w1, w1, 1
 	ldrb	w3, [x24, x3]
-	b	.L3672
-.L3674:
+	b	.L3684
+.L3686:
 	lsl	w2, w21, 9
 	mov	x28, 0
 	mov	w25, 0
-.L3662:
+.L3674:
 	mov	w1, 0
 	mov	x0, x26
 	bl	ftl_memset
-	b	.L3663
-.L3656:
-	cbnz	w21, .L3674
+	b	.L3675
+.L3668:
+	cbnz	w21, .L3686
 	mov	w25, 0
 	mov	x28, 0
-	b	.L3661
+	b	.L3673
 	.size	ftl_write_commit, .-ftl_write_commit
 	.section	.text.gc_do_copy_back,"ax",@progbits
 	.align	2
@@ -23390,10 +23494,10 @@ gc_do_copy_back:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w0, .L3701
+	cbnz	w0, .L3713
 	bl	buf_alloc
 	mov	x19, x0
-	cbz	x0, .L3700
+	cbz	x0, .L3712
 	adrp	x21, .LANCHOR71
 	add	x3, x21, :lo12:.LANCHOR71
 	ldrh	w2, [x3, 26]
@@ -23409,44 +23513,44 @@ gc_do_copy_back:
 	ldr	w0, [x19, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3703
+	bne	.L3715
 	adrp	x1, .LANCHOR234
 	adrp	x0, .LC0
 	mov	w2, 1032
 	add	x1, x1, :lo12:.LANCHOR234
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3703:
+.L3715:
 	ldr	x0, [x19, 24]
 	ldr	w20, [x0, 4]
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 176]
 	cmn	w0, #1
-	bne	.L3704
+	bne	.L3716
 	mov	w2, 0
 	add	x1, x29, 176
 	mov	w0, w20
 	bl	pm_log2phys
-.L3704:
+.L3716:
 	ldr	w23, [x29, 176]
 	cmp	w22, w23
-	bne	.L3705
+	bne	.L3717
 	adrp	x0, .LANCHOR56
 	add	x0, x0, :lo12:.LANCHOR56
 	add	x1, x0, 2
 	add	x0, x0, 1026
-.L3708:
+.L3720:
 	ldr	w2, [x1, 34]
 	cmp	w20, w2
-	bne	.L3706
+	bne	.L3718
 	ldrb	w2, [x1]
-	tbz	x2, 1, .L3706
+	tbz	x2, 1, .L3718
 	mov	x0, x19
 	bl	zbuf_free
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3700
+	tbz	x0, 8, .L3712
 	add	x21, x21, :lo12:.LANCHOR71
 	adrp	x0, .LC234
 	mov	w2, w22
@@ -23454,7 +23558,7 @@ gc_do_copy_back:
 	add	x0, x0, :lo12:.LC234
 	ldrh	w3, [x21, 26]
 	bl	printf
-.L3700:
+.L3712:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -23462,10 +23566,10 @@ gc_do_copy_back:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 224
 	ret
-.L3706:
+.L3718:
 	add	x1, x1, 64
 	cmp	x1, x0
-	bne	.L3708
+	bne	.L3720
 	adrp	x0, .LANCHOR131
 	strb	wzr, [x19, 57]
 	str	w20, [x19, 36]
@@ -23477,7 +23581,7 @@ gc_do_copy_back:
 	str	wzr, [x0, 16]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3709
+	tbz	x0, 8, .L3721
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	add	x1, x21, :lo12:.LANCHOR71
@@ -23489,7 +23593,7 @@ gc_do_copy_back:
 	ldrh	w5, [x1, 26]
 	mov	w1, w20
 	bl	printf
-.L3709:
+.L3721:
 	mov	x0, x19
 	bl	ftl_gc_write_buf
 	bl	ftl_write_commit
@@ -23502,11 +23606,11 @@ gc_do_copy_back:
 	ldrh	w0, [x21, 28]
 	add	w0, w0, 1
 	strh	w0, [x21, 28]
-	b	.L3700
-.L3705:
+	b	.L3712
+.L3717:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3710
+	tbz	x0, 8, .L3722
 	add	x21, x21, :lo12:.LANCHOR71
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
@@ -23518,11 +23622,11 @@ gc_do_copy_back:
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC235
 	bl	printf
-.L3710:
+.L3722:
 	mov	x0, x19
 	bl	zbuf_free
-	b	.L3700
-.L3701:
+	b	.L3712
+.L3713:
 	adrp	x2, .LANCHOR10
 	adrp	x1, .LANCHOR80
 	stp	x1, x2, [x29, 136]
@@ -23532,20 +23636,20 @@ gc_do_copy_back:
 	ldrb	w0, [x26, 9]
 	and	w20, w0, 65535
 	cmp	w3, w20
-	bhi	.L3765
+	bhi	.L3777
 	cmp	w20, 2
 	mov	w21, 2
 	csel	w21, w20, w21, ls
 	and	w21, w21, 65535
-.L3711:
+.L3723:
 	adrp	x1, .LANCHOR79
 	str	x1, [x29, 120]
 	ldrb	w19, [x1, #:lo12:.LANCHOR79]
 	cmp	w19, 3
-	bne	.L3712
+	bne	.L3724
 	adrp	x1, .LANCHOR36
 	ldrb	w1, [x1, #:lo12:.LANCHOR36]
-	cbz	w1, .L3713
+	cbz	w1, .L3725
 	adrp	x1, .LANCHOR71
 	add	x1, x1, :lo12:.LANCHOR71
 	ldrh	w22, [x1, 2106]
@@ -23553,18 +23657,18 @@ gc_do_copy_back:
 	ldrb	w1, [x1, #:lo12:.LANCHOR124]
 	sdiv	w2, w22, w0
 	and	w25, w2, 65535
-	cbz	w1, .L3714
+	cbz	w1, .L3726
 	adrp	x1, .LANCHOR235
 	add	x1, x1, :lo12:.LANCHOR235
 	ldrh	w1, [x1, w2, sxtw 1]
 	cmp	w1, 0
 	cset	w19, ne
-.L3832:
+.L3844:
 	add	w19, w19, 1
-.L3715:
+.L3727:
 	msub	w20, w20, w25, w22
 	and	w20, w20, 65535
-.L3716:
+.L3728:
 	adrp	x1, .LANCHOR86
 	mul	w11, w19, w21
 	adrp	x10, .LANCHOR235
@@ -23583,47 +23687,47 @@ gc_do_copy_back:
 	adrp	x0, .LANCHOR71
 	add	x6, x0, :lo12:.LANCHOR71
 	ldrh	w14, [x6, 24]
-.L3720:
+.L3732:
 	cmp	w2, w11
-	bge	.L3773
+	bge	.L3785
 	add	w4, w22, w2
 	cmp	w4, w5
-	blt	.L3721
-	cbz	w12, .L3773
+	blt	.L3733
+	cbz	w12, .L3785
 	ldrh	w0, [x10, x13, lsl 1]
 	cmp	w0, w25
-	bcc	.L3722
-.L3773:
+	bcc	.L3734
+.L3785:
 	mov	w23, 1
-	b	.L3718
-.L3765:
+	b	.L3730
+.L3777:
 	mov	w21, 1
-	b	.L3711
-.L3714:
+	b	.L3723
+.L3726:
 	adrp	x1, .LANCHOR217
 	ldrb	w1, [x1, #:lo12:.LANCHOR217]
-	cbz	w1, .L3767
+	cbz	w1, .L3779
 	sub	w1, w25, #62
 	and	w1, w1, 65535
 	cmp	w1, 2159
-	bhi	.L3768
+	bhi	.L3780
 	udiv	w19, w25, w19
 	add	w19, w19, w19, lsl 1
 	sub	w19, w25, w19
 	and	w19, w19, 65535
 	cmp	w19, 0
 	cset	w19, eq
-	b	.L3832
-.L3767:
+	b	.L3844
+.L3779:
 	mov	w19, 1
-	b	.L3715
-.L3768:
+	b	.L3727
+.L3780:
 	mov	w19, 2
-	b	.L3715
-.L3713:
+	b	.L3727
+.L3725:
 	adrp	x1, .LANCHOR84
 	ldrb	w1, [x1, #:lo12:.LANCHOR84]
-	cbz	w1, .L3717
+	cbz	w1, .L3729
 	adrp	x1, .LANCHOR71
 	add	x1, x1, :lo12:.LANCHOR71
 	add	w20, w0, w0, lsl 1
@@ -23637,11 +23741,11 @@ gc_do_copy_back:
 	add	w20, w20, w22
 	sdiv	w20, w20, w19
 	and	w20, w20, 65535
-	cbz	w1, .L3716
+	cbz	w1, .L3728
 	add	w3, w25, w25, lsl 1
 	and	w25, w3, 65535
-	b	.L3716
-.L3717:
+	b	.L3728
+.L3729:
 	adrp	x1, .LANCHOR71
 	add	x1, x1, :lo12:.LANCHOR71
 	adrp	x2, .LANCHOR236
@@ -23657,8 +23761,8 @@ gc_do_copy_back:
 	madd	w22, w25, w0, w20
 	add	w22, w22, w22, lsl 1
 	and	w22, w22, 65535
-	beq	.L3716
-.L3718:
+	beq	.L3728
+.L3730:
 	mul	w0, w19, w21
 	stp	wzr, w0, [x29, 152]
 	ubfiz	w0, w21, 1, 15
@@ -23671,39 +23775,39 @@ gc_do_copy_back:
 	adrp	x0, .LANCHOR56
 	add	x0, x0, :lo12:.LANCHOR56
 	str	x0, [x29, 104]
-.L3723:
+.L3735:
 	ldp	w0, w1, [x29, 152]
 	ldrh	w24, [x29, 152]
 	and	w0, w0, 65535
 	str	w0, [x29, 168]
 	cmp	w0, w1
-	blt	.L3747
+	blt	.L3759
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0, #:lo12:.LANCHOR79]
 	cmp	w0, 3
 	add	x0, x29, 176
-	bne	.L3748
+	bne	.L3760
 	adrp	x1, .LANCHOR36
 	ldrb	w1, [x1, #:lo12:.LANCHOR36]
-	cbz	w1, .L3749
+	cbz	w1, .L3761
 	ldr	w2, [x29, 156]
 	mov	w1, 0
 	sub	w2, w2, #1
-.L3750:
+.L3762:
 	cmp	w1, w2
-	blt	.L3751
-.L3836:
+	blt	.L3763
+.L3848:
 	ldr	x0, [x0, w2, sxtw 3]
 	mov	w1, -1
 	strb	w1, [x0]
 	mul	w1, w21, w19
 	ldr	x0, [x29, 176]
 	bl	sblk_prog_page
-	b	.L3752
-.L3712:
+	b	.L3764
+.L3724:
 	adrp	x1, .LANCHOR81
 	ldrb	w1, [x1, #:lo12:.LANCHOR81]
-	cbnz	w1, .L3719
+	cbnz	w1, .L3731
 	adrp	x1, .LANCHOR71
 	add	x1, x1, :lo12:.LANCHOR71
 	mov	w19, 1
@@ -23711,8 +23815,8 @@ gc_do_copy_back:
 	sdiv	w25, w22, w0
 	msub	w20, w20, w25, w22
 	and	w20, w20, 65535
-	b	.L3716
-.L3719:
+	b	.L3728
+.L3731:
 	adrp	x1, .LANCHOR71
 	add	x1, x1, :lo12:.LANCHOR71
 	mov	w19, 2
@@ -23720,37 +23824,37 @@ gc_do_copy_back:
 	sdiv	w25, w22, w0
 	msub	w20, w20, w25, w22
 	and	w20, w20, 65535
-	b	.L3716
-.L3722:
-	tbz	x2, 0, .L3773
-.L3721:
+	b	.L3728
+.L3734:
+	tbz	x2, 0, .L3785
+.L3733:
 	sbfiz	x4, x4, 2, 32
 	ldr	w0, [x8, x4]
 	cmn	w0, #1
-	bne	.L3724
+	bne	.L3736
 	ldrh	w7, [x6, 26]
 	cmp	w7, w14
-	bcs	.L3700
-	cbz	w12, .L3725
+	bcs	.L3712
+	cbz	w12, .L3737
 	ldrh	w0, [x10, x13, lsl 1]
 	cmp	w0, w25
-	bcs	.L3725
-	tbz	x2, 0, .L3725
+	bcs	.L3737
+	tbz	x2, 0, .L3737
 	ubfiz	x0, x0, 2, 16
 	ldr	w0, [x8, x0]
-.L3833:
+.L3845:
 	str	w0, [x8, x4]
-.L3724:
+.L3736:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-	b	.L3720
-.L3725:
+	b	.L3732
+.L3737:
 	mov	w0, w7
 	bl	gc_get_src_ppa_from_index
 	add	w7, w7, 1
 	strh	w7, [x6, 26]
-	b	.L3833
-.L3747:
+	b	.L3845
+.L3759:
 	ldr	w0, [x29, 168]
 	add	w0, w22, w0
 	str	w0, [x29, 172]
@@ -23761,11 +23865,11 @@ gc_do_copy_back:
 	ldr	x0, [x0, #:lo12:.LANCHOR83]
 	ldrb	w0, [x0, x1]
 	cmp	w0, 255
-	bne	.L3727
+	bne	.L3739
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x27, x0
-	cbnz	x0, .L3728
+	cbnz	x0, .L3740
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	bl	gc_write_completed
@@ -23773,8 +23877,8 @@ gc_do_copy_back:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x27, x0
-	cbz	x0, .L3700
-.L3728:
+	cbz	x0, .L3712
+.L3740:
 	adrp	x0, .LANCHOR83
 	ldr	x2, [x29, 160]
 	ldrb	w1, [x27, 1]
@@ -23797,27 +23901,27 @@ gc_do_copy_back:
 	mul	w0, w0, w6
 	sub	w0, w0, w5
 	cmp	w1, w0
-	blt	.L3729
+	blt	.L3741
 	adrp	x1, .LANCHOR124
 	ldrb	w1, [x1, #:lo12:.LANCHOR124]
-	cbz	w1, .L3730
+	cbz	w1, .L3742
 	adrp	x1, .LANCHOR235
 	add	x1, x1, :lo12:.LANCHOR235
 	ldrh	w1, [x1, w25, sxtw 1]
 	cmp	w1, w25
-	bcs	.L3730
-	tbnz	x24, 0, .L3729
-.L3730:
+	bcs	.L3742
+	tbnz	x24, 0, .L3741
+.L3742:
 	adrp	x1, .LANCHOR162
 	ldr	w3, [x29, 172]
 	mov	w2, -1
 	cmp	w5, 2
 	ldr	x1, [x1, #:lo12:.LANCHOR162]
 	str	w2, [x1, w3, sxtw 2]
-	bne	.L3731
+	bne	.L3743
 	cmp	w3, w0
 	adrp	x28, .LANCHOR221
-	bne	.L3732
+	bne	.L3744
 	ldrh	w2, [x28, #:lo12:.LANCHOR221]
 	ldr	x0, [x27, 8]
 	bl	ftl_memcpy
@@ -23839,10 +23943,10 @@ gc_do_copy_back:
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x0, 132]
 	stp	w0, wzr, [x6, 8]
-.L3733:
+.L3745:
 	ldr	x0, [x27, 24]
 	str	wzr, [x0, 16]
-.L3727:
+.L3739:
 	adrp	x0, .LANCHOR83
 	ldrsw	x2, [x29, 168]
 	add	x4, x29, 176
@@ -23862,23 +23966,23 @@ gc_do_copy_back:
 	strb	w23, [x6, 61]
 	ldrb	w0, [x0, #:lo12:.LANCHOR79]
 	cmp	w0, 3
-	bne	.L3738
+	bne	.L3750
 	adrp	x8, .LANCHOR36
 	ldrb	w8, [x8, #:lo12:.LANCHOR36]
-	cbz	w8, .L3739
+	cbz	w8, .L3751
 	adrp	x0, .LANCHOR124
 	and	w8, w24, 1
 	add	w10, w8, w25
 	ldrb	w0, [x0, #:lo12:.LANCHOR124]
-	cbz	w0, .L3740
+	cbz	w0, .L3752
 	adrp	x6, .LANCHOR235
 	add	x6, x6, :lo12:.LANCHOR235
 	ldrh	w6, [x6, w25, sxtw 1]
 	cmp	w6, w25
-	bcs	.L3740
+	bcs	.L3752
 	cmp	w8, 0
 	csel	w10, w10, w6, eq
-.L3740:
+.L3752:
 	adrp	x0, .LANCHOR56
 	add	x6, x0, :lo12:.LANCHOR56
 	add	x5, x6, x5, lsl 6
@@ -23891,7 +23995,7 @@ gc_do_copy_back:
 	madd	w0, w0, w6, w10
 	orr	w0, w0, 50331648
 	str	w0, [x5, 40]
-.L3745:
+.L3757:
 	adrp	x0, .LANCHOR56
 	sbfiz	x7, x7, 6, 32
 	add	x0, x0, :lo12:.LANCHOR56
@@ -23901,8 +24005,8 @@ gc_do_copy_back:
 	adrp	x0, .LANCHOR164
 	ldr	x0, [x0, #:lo12:.LANCHOR164]
 	str	w6, [x0, x5, lsl 2]
-	b	.L3764
-.L3732:
+	b	.L3776
+.L3744:
 	ldr	x2, [x29, 136]
 	ldrh	w0, [x28, #:lo12:.LANCHOR221]
 	ldrb	w28, [x2, #:lo12:.LANCHOR80]
@@ -23934,8 +24038,8 @@ gc_do_copy_back:
 	str	w0, [x6, 8]
 	mov	w0, 1
 	str	w0, [x6, 12]
-	b	.L3733
-.L3731:
+	b	.L3745
+.L3743:
 	ldr	x0, [x29, 136]
 	ldrb	w2, [x0, #:lo12:.LANCHOR80]
 	ldr	x0, [x27, 8]
@@ -23951,11 +24055,11 @@ gc_do_copy_back:
 	ldrb	w1, [x1, #:lo12:.LANCHOR131]
 	lsl	w2, w0, 2
 	cmp	w1, w0, lsr 6
-	bge	.L3734
+	bge	.L3746
 	adrp	x1, .LANCHOR221
 	ldrh	w1, [x1, #:lo12:.LANCHOR221]
 	sub	w2, w1, w2
-.L3734:
+.L3746:
 	adrp	x1, .LANCHOR163
 	ldr	x5, [x27, 8]
 	ldr	x1, [x1, #:lo12:.LANCHOR163]
@@ -23984,8 +24088,8 @@ gc_do_copy_back:
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x0, 132]
 	str	w0, [x6, 8]
-	b	.L3733
-.L3729:
+	b	.L3745
+.L3741:
 	ldr	x0, [x29, 160]
 	mov	w1, 1
 	lsl	x28, x0, 2
@@ -23998,7 +24102,7 @@ gc_do_copy_back:
 	ldr	w0, [x27, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3736
+	bne	.L3748
 	adrp	x0, .LANCHOR75
 	ldrh	w2, [x0, #:lo12:.LANCHOR75]
 	adrp	x0, .LANCHOR32
@@ -24020,42 +24124,42 @@ gc_do_copy_back:
 	ldr	w0, [x27, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3736
+	bne	.L3748
 	ldr	x0, [x27, 24]
 	mov	w1, -1
 	str	w1, [x0, 4]
 	ldr	w0, [x27, 52]
 	cmp	w0, 512
 	ccmp	w0, w1, 4, ne
-	bne	.L3736
+	bne	.L3748
 	adrp	x1, .LANCHOR234
 	adrp	x0, .LC0
 	mov	w2, 1223
 	add	x1, x1, :lo12:.LANCHOR234
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3736:
+.L3748:
 	ldr	x0, [x27, 24]
 	adrp	x1, .LANCHOR128
 	ldr	w1, [x1, #:lo12:.LANCHOR128]
 	ldr	w2, [x0, 4]
 	cmp	w2, w1
-	bcc	.L3737
+	bcc	.L3749
 	mov	w1, -1
 	str	w1, [x0, 4]
-.L3737:
+.L3749:
 	adrp	x1, .LANCHOR162
 	ldr	w2, [x0, 4]
 	ldr	x1, [x1, #:lo12:.LANCHOR162]
 	str	w2, [x1, x28]
 	ldr	w1, [x27, 40]
 	str	w1, [x0, 8]
-	b	.L3733
-.L3739:
+	b	.L3745
+.L3751:
 	udiv	w0, w24, w0
 	adrp	x7, .LANCHOR37
 	ldrb	w7, [x7, #:lo12:.LANCHOR37]
-	cbz	w7, .L3742
+	cbz	w7, .L3754
 	add	w7, w0, w20
 	adrp	x8, .LANCHOR111
 	add	x7, x26, x7, sxtw 1
@@ -24065,7 +24169,7 @@ gc_do_copy_back:
 	ldrh	w7, [x7, 16]
 	madd	w7, w7, w8, w25
 	add	w0, w7, w0, uxth
-.L3837:
+.L3849:
 	str	w0, [x6, 40]
 	ldr	x0, [x29, 104]
 	add	x5, x0, x5, lsl 6
@@ -24081,16 +24185,16 @@ gc_do_copy_back:
 	add	w0, w0, 1
 	orr	w0, w5, w0, lsl 24
 	str	w0, [x6, x7, lsl 2]
-.L3764:
+.L3776:
 	adrp	x0, .LANCHOR124
 	ldrb	w0, [x0, #:lo12:.LANCHOR124]
-	cbz	w0, .L3746
+	cbz	w0, .L3758
 	adrp	x0, .LANCHOR235
 	add	x0, x0, :lo12:.LANCHOR235
 	ldrh	w0, [x0, w25, sxtw 1]
 	cmp	w0, w25
-	bcs	.L3746
-	tbz	x24, 0, .L3746
+	bcs	.L3758
+	tbz	x24, 0, .L3758
 	ldr	x3, [x29, 160]
 	mov	w0, -1
 	strb	w0, [x1, x3]
@@ -24107,37 +24211,37 @@ gc_do_copy_back:
 	mov	w1, -1
 	ldr	x0, [x0, #:lo12:.LANCHOR163]
 	str	w1, [x0, w2, sxtw 2]
-.L3746:
+.L3758:
 	ldr	w0, [x29, 152]
 	add	w0, w0, 1
 	str	w0, [x29, 152]
-	b	.L3723
-.L3742:
+	b	.L3735
+.L3754:
 	add	w0, w0, w20
 	adrp	x7, .LANCHOR111
 	add	x0, x26, x0, sxtw 1
 	ldrh	w7, [x7, #:lo12:.LANCHOR111]
 	ldrh	w0, [x0, 16]
 	madd	w0, w0, w7, w25
-	b	.L3837
-.L3738:
+	b	.L3849
+.L3750:
 	cmp	w0, 2
-	bne	.L3745
+	bne	.L3757
 	adrp	x0, .LANCHOR81
 	adrp	x5, .LANCHOR111
 	ldrb	w0, [x0, #:lo12:.LANCHOR81]
-	cbnz	w0, .L3744
+	cbnz	w0, .L3756
 	ldr	w0, [x29, 168]
 	ldrh	w5, [x5, #:lo12:.LANCHOR111]
 	add	w27, w20, w0
 	add	x27, x26, x27, sxtw 1
 	ldrh	w0, [x27, 16]
 	madd	w0, w0, w5, w25
-.L3834:
+.L3846:
 	orr	w0, w0, 33554432
 	str	w0, [x6, 40]
-	b	.L3745
-.L3744:
+	b	.L3757
+.L3756:
 	add	w0, w20, w24, lsr 1
 	ldrh	w5, [x5, #:lo12:.LANCHOR111]
 	add	x0, x26, x0, sxtw 1
@@ -24145,40 +24249,40 @@ gc_do_copy_back:
 	madd	w0, w0, w5, w25
 	and	w5, w24, 1
 	add	w0, w0, w5
-	b	.L3834
-.L3751:
+	b	.L3846
+.L3763:
 	ldr	x4, [x0, w1, sxtw 3]
 	add	w1, w1, 1
 	ldr	x5, [x0, w1, sxtw 3]
 	and	w1, w1, 65535
 	ldrb	w5, [x5, 1]
 	strb	w5, [x4]
-	b	.L3750
-.L3749:
+	b	.L3762
+.L3761:
 	adrp	x1, .LANCHOR84
 	ldrb	w2, [x1, #:lo12:.LANCHOR84]
 	ldr	x1, [x29, 176]
-	cbz	w2, .L3753
-.L3756:
+	cbz	w2, .L3765
+.L3768:
 	strb	wzr, [x1, 60]
-	b	.L3755
-.L3753:
+	b	.L3767
+.L3765:
 	cmp	w23, 1
-	bne	.L3754
+	bne	.L3766
 	mov	w2, 9
-.L3835:
+.L3847:
 	strb	w2, [x1, 60]
-.L3755:
+.L3767:
 	mov	w2, w21
 	add	x1, x0, 24
 	bl	sblk_xlc_prog_pages
-.L3752:
+.L3764:
 	adrp	x0, .LANCHOR84
 	ldrb	w0, [x0, #:lo12:.LANCHOR84]
-	cbz	w0, .L3761
+	cbz	w0, .L3773
 	add	w21, w21, w21, lsl 1
 	and	w21, w21, 65535
-.L3762:
+.L3774:
 	adrp	x0, .LANCHOR110
 	ldr	x1, [x0, #:lo12:.LANCHOR110]
 	ldr	w0, [x1, 52]
@@ -24195,68 +24299,68 @@ gc_do_copy_back:
 	ldrb	w1, [x26, 9]
 	mul	w0, w0, w1
 	cmp	w21, w0
-	blt	.L3763
+	blt	.L3775
 	ldr	x0, [x29, 144]
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	strh	wzr, [x0, 86]
-.L3763:
+.L3775:
 	bl	gc_write_completed
-	b	.L3700
-.L3754:
+	b	.L3712
+.L3766:
 	cmp	w23, 2
-	bne	.L3756
+	bne	.L3768
 	mov	w2, 13
-	b	.L3835
-.L3748:
+	b	.L3847
+.L3760:
 	adrp	x1, .LANCHOR81
 	ldrb	w1, [x1, #:lo12:.LANCHOR81]
-	cbz	w1, .L3774
+	cbz	w1, .L3786
 	adrp	x1, .LANCHOR82
 	ldrb	w1, [x1, #:lo12:.LANCHOR82]
-	cbnz	w1, .L3758
-.L3757:
+	cbnz	w1, .L3770
+.L3769:
 	ldr	w2, [x29, 156]
 	sub	w2, w2, #1
-.L3759:
+.L3771:
 	cmp	w1, w2
-	bge	.L3836
+	bge	.L3848
 	ldr	x4, [x0, w1, sxtw 3]
 	add	w1, w1, 1
 	ldr	x5, [x0, w1, sxtw 3]
 	and	w1, w1, 65535
 	ldrb	w5, [x5, 1]
 	strb	w5, [x4]
-	b	.L3759
-.L3774:
+	b	.L3771
+.L3786:
 	mov	w1, 0
-	b	.L3757
-.L3758:
+	b	.L3769
+.L3770:
 	mov	w1, w21
 	bl	sblk_3d_mlc_prog_pages
-	b	.L3752
-.L3761:
+	b	.L3764
+.L3773:
 	adrp	x0, .LANCHOR81
 	ldrb	w0, [x0, #:lo12:.LANCHOR81]
-	cbnz	w0, .L3775
+	cbnz	w0, .L3787
 	adrp	x0, .LANCHOR36
 	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbz	w0, .L3762
+	cbz	w0, .L3774
 	adrp	x0, .LANCHOR124
 	ldrh	w1, [x29, 156]
 	ldrb	w0, [x0, #:lo12:.LANCHOR124]
-	cbz	w0, .L3776
+	cbz	w0, .L3788
 	adrp	x0, .LANCHOR235
 	add	x0, x0, :lo12:.LANCHOR235
 	ldrh	w0, [x0, w25, sxtw 1]
 	cmp	w0, w25
 	csel	w21, w21, w1, cc
-	b	.L3762
-.L3775:
+	b	.L3774
+.L3787:
 	ldr	w21, [x29, 132]
-	b	.L3762
-.L3776:
+	b	.L3774
+.L3788:
 	mov	w21, w1
-	b	.L3762
+	b	.L3774
 	.size	gc_do_copy_back, .-gc_do_copy_back
 	.section	.text.zftl_do_gc,"ax",@progbits
 	.align	2
@@ -24281,35 +24385,35 @@ zftl_do_gc:
 	add	w21, w22, w21
 	ldr	x26, [x23, #:lo12:.LANCHOR10]
 	cmp	w1, 6
-	bhi	.L3953
+	bhi	.L3965
 	mov	w25, w0
 	and	w21, w21, 65535
-	adrp	x0, .L3841
-	add	x0, x0, :lo12:.L3841
+	adrp	x0, .L3853
+	add	x0, x0, :lo12:.L3853
 	ldrh	w0, [x0,w1,uxtw #1]
-	adr	x1, .Lrtx3841
+	adr	x1, .Lrtx3853
 	add	x0, x1, w0, sxth #2
 	br	x0
-.Lrtx3841:
+.Lrtx3853:
 	.section	.rodata.zftl_do_gc,"a",@progbits
 	.align	0
 	.align	2
-.L3841:
-	.2byte	(.L3840 - .Lrtx3841) / 4
-	.2byte	(.L3842 - .Lrtx3841) / 4
-	.2byte	(.L3843 - .Lrtx3841) / 4
-	.2byte	(.L3844 - .Lrtx3841) / 4
-	.2byte	(.L3845 - .Lrtx3841) / 4
-	.2byte	(.L3846 - .Lrtx3841) / 4
-	.2byte	(.L3847 - .Lrtx3841) / 4
+.L3853:
+	.2byte	(.L3852 - .Lrtx3853) / 4
+	.2byte	(.L3854 - .Lrtx3853) / 4
+	.2byte	(.L3855 - .Lrtx3853) / 4
+	.2byte	(.L3856 - .Lrtx3853) / 4
+	.2byte	(.L3857 - .Lrtx3853) / 4
+	.2byte	(.L3858 - .Lrtx3853) / 4
+	.2byte	(.L3859 - .Lrtx3853) / 4
 	.section	.text.zftl_do_gc
-.L3846:
+.L3858:
 	adrp	x20, .LANCHOR71
 	add	x24, x20, :lo12:.LANCHOR71
 	mov	w22, 0
-.L3848:
+.L3860:
 	bl	gc_check_data_one_wl
-	cbz	w0, .L3949
+	cbz	w0, .L3961
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	add	x20, x20, :lo12:.LANCHOR71
 	strh	wzr, [x20, 56]
@@ -24326,8 +24430,8 @@ zftl_do_gc:
 	bl	zbuf_free
 	strb	wzr, [x19, #:lo12:.LANCHOR159]
 	str	xzr, [x20, 8]
-	b	.L4033
-.L3840:
+	b	.L4045
+.L3852:
 	adrp	x0, .LANCHOR105
 	adrp	x27, .LANCHOR97
 	ldrh	w2, [x26, 80]
@@ -24342,16 +24446,16 @@ zftl_do_gc:
 	mov	w1, 65535
 	and	w24, w24, 65535
 	cmp	w2, w1
-	beq	.L3849
-	cbnz	w25, .L3850
+	beq	.L3861
+	cbnz	w25, .L3862
 	adrp	x0, .LANCHOR87
 	ldrh	w0, [x0, #:lo12:.LANCHOR87]
 	cmp	w21, w0, lsl 1
-	blt	.L3850
-.L3953:
+	blt	.L3862
+.L3965:
 	mov	w20, 16
-	b	.L3838
-.L3850:
+	b	.L3850
+.L3862:
 	adrp	x5, .LANCHOR96
 	mov	w1, 5
 	adrp	x25, .LANCHOR85
@@ -24363,7 +24467,7 @@ zftl_do_gc:
 	and	w3, w0, 65535
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L3851
+	beq	.L3863
 	adrp	x4, .LANCHOR9
 	ubfiz	x3, x3, 1, 16
 	adrp	x1, .LANCHOR160
@@ -24376,47 +24480,47 @@ zftl_do_gc:
 	adrp	x4, .LANCHOR95
 	ldrh	w4, [x4, #:lo12:.LANCHOR95]
 	cmp	w4, w3
-	bcs	.L3852
+	bcs	.L3864
 	adrp	x1, .LANCHOR6
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	cmp	w2, w1, lsr 4
-	bls	.L3851
+	bls	.L3863
 	adrp	x1, .LANCHOR100
 	ldrh	w1, [x1, #:lo12:.LANCHOR100]
 	cmp	w1, w3
-	bls	.L3851
-.L3852:
+	bls	.L3863
+.L3864:
 	ldrb	w2, [x25, #:lo12:.LANCHOR85]
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L3853
+	cbz	w0, .L3865
 	mov	w0, 1
 	str	wzr, [x20, #:lo12:.LANCHOR160]
 	strb	w0, [x19, #:lo12:.LANCHOR159]
-	b	.L3953
-.L3851:
+	b	.L3965
+.L3863:
 	strh	wzr, [x5, #:lo12:.LANCHOR96]
-.L3853:
+.L3865:
 	cmp	w22, 15
-	bls	.L3955
+	bls	.L3967
 	adrp	x0, .LANCHOR93
 	ldrh	w1, [x0, #:lo12:.LANCHOR93]
 	adrp	x0, .LANCHOR101
 	ldrh	w0, [x0, #:lo12:.LANCHOR101]
 	cmp	w1, w0
-	bhi	.L3955
+	bhi	.L3967
 	cmp	w24, 0
 	cset	w20, eq
 	add	w20, w20, 1
-.L3854:
+.L3866:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3855
+	tbz	x0, 8, .L3867
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	mov	w4, w22
 	ldrb	w2, [x25, #:lo12:.LANCHOR85]
 	mov	w3, w21
-	mov	w1, 2658
+	mov	w1, 2662
 	ldrh	w7, [x0, 122]
 	ldrh	w6, [x0, 120]
 	ldrh	w5, [x0, 124]
@@ -24425,113 +24529,113 @@ zftl_do_gc:
 	adrp	x0, .LC236
 	add	x0, x0, :lo12:.LC236
 	bl	printf
-.L3855:
+.L3867:
 	ldrb	w0, [x25, #:lo12:.LANCHOR85]
 	mov	w2, 1
 	mov	w1, w20
 	bl	gc_search_src_blk
 	cmp	w0, 0
-	ble	.L3856
-.L3857:
+	ble	.L3868
+.L3869:
 	mov	w0, 1
-.L4035:
+.L4047:
 	strb	w0, [x19, #:lo12:.LANCHOR159]
-	b	.L3953
-.L3955:
+	b	.L3965
+.L3967:
 	mov	w20, 2
-	b	.L3854
-.L3856:
+	b	.L3866
+.L3868:
 	ldrb	w0, [x25, #:lo12:.LANCHOR85]
 	mov	w2, 1
 	mov	w1, 3
 	bl	gc_search_src_blk
 	cmp	w0, 0
-	bgt	.L3857
-	b	.L3953
-.L3849:
+	bgt	.L3869
+	b	.L3965
+.L3861:
 	cmp	w25, 1
-	bne	.L3859
+	bne	.L3871
 	bl	gc_scan_static_data
 	adrp	x26, .LANCHOR85
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	ldrh	w0, [x0, 122]
-	cbz	w0, .L3860
-.L3861:
+	cbz	w0, .L3872
+.L3873:
 	mov	w0, 1
 	strb	w0, [x26, #:lo12:.LANCHOR85]
-	b	.L4035
-.L3860:
+	b	.L4047
+.L3872:
 	bl	gc_static_wearleveling
 	mov	w20, w0
-	cbnz	w0, .L3861
+	cbnz	w0, .L3873
 	adrp	x27, .LANCHOR161
-	cbz	w22, .L3862
+	cbz	w22, .L3874
 	cmp	w21, w24
 	adrp	x1, .LANCHOR98
-	bcs	.L3863
+	bcs	.L3875
 	ldrh	w0, [x1, #:lo12:.LANCHOR98]
 	cmp	w0, w21
-	bhi	.L3864
-.L3863:
+	bhi	.L3876
+.L3875:
 	ldrh	w1, [x1, #:lo12:.LANCHOR98]
 	add	w0, w21, w24
 	cmp	w0, w1
-	blt	.L3864
+	blt	.L3876
 	adrp	x0, .LANCHOR93
 	ldrh	w1, [x0, #:lo12:.LANCHOR93]
 	adrp	x0, .LANCHOR101
 	ldrh	w0, [x0, #:lo12:.LANCHOR101]
 	cmp	w1, w0
-	bcc	.L3862
-.L3864:
+	bcc	.L3874
+.L3876:
 	mov	w0, 1
 	strb	w0, [x26, #:lo12:.LANCHOR85]
 	mov	w0, 16
-	bl	zftl_get_gc_node.part.9
+	bl	zftl_get_gc_node.part.10
 	and	w1, w0, 65535
 	mov	w2, 65535
 	adrp	x28, .LANCHOR160
 	cmp	w1, w2
-	beq	.L3865
+	beq	.L3877
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x1]
 	ldrh	w1, [x27, #:lo12:.LANCHOR161]
 	cmp	w2, w1
-	bcs	.L3865
+	bcs	.L3877
 	cmp	w21, 2
-	bls	.L3865
+	bls	.L3877
 	strb	wzr, [x26, #:lo12:.LANCHOR85]
 	mov	w2, 0
 	str	wzr, [x28, #:lo12:.LANCHOR160]
 	mov	w1, 1
 	bl	gc_add_sblk
-	cbnz	w0, .L3857
-.L3865:
+	cbnz	w0, .L3869
+.L3877:
 	mov	w1, 3
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L3866
+	beq	.L3878
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x1]
 	ldrh	w1, [x27, #:lo12:.LANCHOR161]
 	cmp	w2, w1
-	bcs	.L3866
+	bcs	.L3878
 	cmp	w21, 2
-	bls	.L3866
+	bls	.L3878
 	strb	wzr, [x26, #:lo12:.LANCHOR85]
 	mov	w2, 0
 	str	wzr, [x28, #:lo12:.LANCHOR160]
 	mov	w1, 1
 	bl	gc_add_sblk
-	cbnz	w0, .L3857
-.L3866:
+	cbnz	w0, .L3869
+.L3878:
 	ldrh	w0, [x27, #:lo12:.LANCHOR161]
 	adrp	x1, .LANCHOR95
 	add	w0, w0, 1
@@ -24539,10 +24643,10 @@ zftl_do_gc:
 	and	w0, w0, 65535
 	strh	w0, [x27, #:lo12:.LANCHOR161]
 	cmp	w0, w5, lsr 5
-	bls	.L3867
+	bls	.L3879
 	mov	w0, 4
 	strh	w0, [x27, #:lo12:.LANCHOR161]
-.L3867:
+.L3879:
 	adrp	x1, .LANCHOR90
 	ldr	w0, [x28, #:lo12:.LANCHOR160]
 	strh	wzr, [x1, #:lo12:.LANCHOR90]
@@ -24556,30 +24660,30 @@ zftl_do_gc:
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	cmp	w0, w1, lsr 5
 	adrp	x0, .LANCHOR93
-	bls	.L3868
+	bls	.L3880
 	ldrh	w1, [x0, #:lo12:.LANCHOR93]
 	cmp	w1, w22
-	bls	.L3868
+	bls	.L3880
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L3869
-.L4023:
+	bne	.L3881
+.L4035:
 	mov	w20, 16
-.L3870:
+.L3882:
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	adrp	x28, .LANCHOR85
 	mov	w1, 1
 	mov	x23, x28
 	strb	w1, [x28, #:lo12:.LANCHOR85]
 	ldrh	w0, [x0, 124]
-	cbz	w0, .L3875
+	cbz	w0, .L3887
 	strb	wzr, [x28, #:lo12:.LANCHOR85]
 	strb	w1, [x19, #:lo12:.LANCHOR159]
-.L3838:
+.L3850:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
@@ -24589,7 +24693,7 @@ zftl_do_gc:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 144
 	ret
-.L3869:
+.L3881:
 	adrp	x1, .LANCHOR9
 	ubfiz	x0, x0, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR9]
@@ -24598,87 +24702,87 @@ zftl_do_gc:
 	ldrb	w0, [x0, #:lo12:.LANCHOR80]
 	mul	w0, w0, w5
 	cmp	w1, w0
-	bgt	.L4023
+	bgt	.L4035
 	str	wzr, [x28, #:lo12:.LANCHOR160]
 	mov	w2, 4
-.L4030:
+.L4042:
 	mov	w1, 2
-.L4022:
+.L4034:
 	ldrb	w0, [x26, #:lo12:.LANCHOR85]
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-	cbz	w0, .L4023
-	b	.L3857
-.L3868:
+	cbz	w0, .L4035
+	b	.L3869
+.L3880:
 	ldrh	w1, [x0, #:lo12:.LANCHOR93]
 	adrp	x0, .LANCHOR101
 	ldrh	w0, [x0, #:lo12:.LANCHOR101]
 	cmp	w1, w0
-	bcc	.L3873
+	bcc	.L3885
 	mov	w2, 1
-	b	.L4030
-.L3873:
+	b	.L4042
+.L3885:
 	ldr	x0, [x29, 120]
 	ldrh	w0, [x0, #:lo12:.LANCHOR97]
-	cbnz	w0, .L3874
+	cbnz	w0, .L3886
 	ldr	x0, [x29, 112]
 	ldrh	w0, [x0, #:lo12:.LANCHOR99]
 	cmp	w0, 8
-	bls	.L3870
-.L3874:
+	bls	.L3882
+.L3886:
 	mov	w2, 4
 	mov	w1, 1
-	b	.L4022
-.L3862:
+	b	.L4034
+.L3874:
 	adrp	x0, .LANCHOR95
 	ldrh	w1, [x0, #:lo12:.LANCHOR95]
 	ldrh	w0, [x27, #:lo12:.LANCHOR161]
 	cmp	w0, w1, lsr 5
-	bcc	.L4023
+	bcc	.L4035
 	mov	w0, 4
 	strh	w0, [x27, #:lo12:.LANCHOR161]
-	b	.L4023
-.L3859:
+	b	.L4035
+.L3871:
 	adrp	x0, .LANCHOR87
 	ldrh	w0, [x0, #:lo12:.LANCHOR87]
 	cmp	w0, w21
-	bcs	.L4023
+	bcs	.L4035
 	ldrh	w0, [x26, 124]
-	cbz	w0, .L3953
-	b	.L4023
-.L3875:
+	cbz	w0, .L3965
+	b	.L4035
+.L3887:
 	adrp	x0, .LANCHOR87
 	mov	x26, x0
 	ldrh	w2, [x0, #:lo12:.LANCHOR87]
 	cmp	w21, w2
-	bcs	.L3876
-	cbz	w22, .L3877
+	bcs	.L3888
+	cbz	w22, .L3889
 	cmp	w22, 16
-	bls	.L3878
+	bls	.L3890
 	adrp	x0, .LANCHOR93
 	ldrh	w2, [x0, #:lo12:.LANCHOR93]
 	adrp	x0, .LANCHOR101
 	ldrh	w0, [x0, #:lo12:.LANCHOR101]
 	cmp	w2, w0
-	bhi	.L3878
+	bhi	.L3890
 	mov	w2, 4
 	mov	w0, w1
 	bl	gc_search_src_blk
 	tst	w0, 65535
-	bne	.L3879
-.L4026:
+	bne	.L3891
+.L4038:
 	mov	w2, 4
 	mov	w1, 3
 	ldrb	w0, [x28, #:lo12:.LANCHOR85]
-	b	.L4025
-.L3879:
+	b	.L4037
+.L3891:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	and	w3, w0, 65535
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L3882
+	beq	.L3894
 	adrp	x4, .LANCHOR9
 	ubfiz	x3, x3, 1, 16
 	adrp	x1, .LANCHOR160
@@ -24691,16 +24795,16 @@ zftl_do_gc:
 	adrp	x4, .LANCHOR95
 	ldrh	w4, [x4, #:lo12:.LANCHOR95]
 	cmp	w4, w3
-	bcs	.L3883
+	bcs	.L3895
 	adrp	x1, .LANCHOR6
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	cmp	w2, w1, lsr 4
-	bls	.L3882
+	bls	.L3894
 	adrp	x1, .LANCHOR100
 	ldrh	w1, [x1, #:lo12:.LANCHOR100]
 	cmp	w1, w3
-	bls	.L3882
-.L3883:
+	bls	.L3894
+.L3895:
 	ldrb	w2, [x23, #:lo12:.LANCHOR85]
 	mov	w1, 0
 	bl	gc_add_sblk
@@ -24708,79 +24812,79 @@ zftl_do_gc:
 	adrp	x0, .LANCHOR122
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR122]
-.L3882:
+.L3894:
 	mov	w0, 1
 	strb	w0, [x19, #:lo12:.LANCHOR159]
-	b	.L3838
-.L3878:
+	b	.L3850
+.L3890:
 	mov	w2, 1
 	mov	w1, 2
 	mov	w0, w2
 	bl	gc_search_src_blk
 	tst	w0, 65535
-	bne	.L3882
+	bne	.L3894
 	ldrb	w0, [x23, #:lo12:.LANCHOR85]
 	mov	w2, 4
 	mov	w1, 3
-.L4025:
+.L4037:
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-.L3880:
-	cbnz	w0, .L3882
-	b	.L3838
-.L3877:
+.L3892:
+	cbnz	w0, .L3894
+	b	.L3850
+.L3889:
 	strb	wzr, [x28, #:lo12:.LANCHOR85]
 	cmp	w21, 16
-	bls	.L3885
+	bls	.L3897
 	mov	w2, 4
 	mov	w1, 3
 	mov	w0, 0
-	b	.L4025
-.L3885:
+	b	.L4037
+.L3897:
 	mov	w2, w1
 	mov	w0, 0
 	bl	gc_search_src_blk
 	tst	w0, 65535
-	bne	.L3882
-	b	.L4026
-.L3876:
+	bne	.L3894
+	b	.L4038
+.L3888:
 	cmp	w25, 1
-	bne	.L3838
+	bne	.L3850
 	cmp	w21, w2, lsl 1
-	bge	.L3886
+	bge	.L3898
 	cmp	w24, w22, lsr 1
-	bcs	.L3887
+	bcs	.L3899
 	adrp	x1, .LANCHOR93
 	ldrh	w2, [x1, #:lo12:.LANCHOR93]
 	adrp	x1, .LANCHOR101
 	ldrh	w1, [x1, #:lo12:.LANCHOR101]
 	cmp	w2, w1
-	bcs	.L3887
+	bcs	.L3899
 	adrp	x1, .LANCHOR98
 	ldrh	w1, [x1, #:lo12:.LANCHOR98]
 	lsr	w1, w1, 2
 	strh	w1, [x0, #:lo12:.LANCHOR87]
-	b	.L3838
-.L3887:
+	b	.L3850
+.L3899:
 	mov	w0, 8
-	bl	zftl_get_gc_node.part.9
+	bl	zftl_get_gc_node.part.10
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L3888
+	beq	.L3900
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w1, [x2, x1]
 	cmp	w1, 3
-	bhi	.L3888
-	cbz	w21, .L3888
+	bhi	.L3900
+	cbz	w21, .L3900
 	strb	wzr, [x23, #:lo12:.LANCHOR85]
 	mov	w2, 0
 	mov	w1, 1
 	bl	gc_add_sblk
-	cbnz	w0, .L3882
-.L3888:
+	cbnz	w0, .L3894
+.L3900:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
@@ -24788,21 +24892,21 @@ zftl_do_gc:
 	mov	w1, 65535
 	mov	w28, w25
 	cmp	w25, w1
-	bne	.L3889
-.L3894:
+	bne	.L3901
+.L3906:
 	cmp	w22, 1
-	bhi	.L3890
-.L3891:
+	bhi	.L3902
+.L3903:
 	cmp	w21, w24
 	adrp	x21, .LANCHOR98
-	bcs	.L3898
+	bcs	.L3910
 	strb	wzr, [x23, #:lo12:.LANCHOR85]
 	mov	w0, 4
-	bl	zftl_get_gc_node.part.9
+	bl	zftl_get_gc_node.part.10
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3898
+	beq	.L3910
 	adrp	x1, .LANCHOR9
 	ubfiz	x0, x0, 1, 16
 	adrp	x2, .LANCHOR80
@@ -24813,13 +24917,13 @@ zftl_do_gc:
 	ldrh	w0, [x0, #:lo12:.LANCHOR95]
 	mul	w0, w0, w2
 	cmp	w1, w0, lsr 1
-	ble	.L3900
-.L3898:
+	ble	.L3912
+.L3910:
 	ldrh	w0, [x21, #:lo12:.LANCHOR98]
 	lsr	w0, w0, 2
 	strh	w0, [x26, #:lo12:.LANCHOR87]
-	b	.L3838
-.L3889:
+	b	.L3850
+.L3901:
 	adrp	x2, .LANCHOR160
 	adrp	x3, .LANCHOR6
 	uxtw	x25, w25
@@ -24829,14 +24933,14 @@ zftl_do_gc:
 	str	w1, [x2, #:lo12:.LANCHOR160]
 	cmp	w1, w3, lsr 4
 	adrp	x3, .LANCHOR9
-	bls	.L3892
+	bls	.L3904
 	ldr	x1, [x3, #:lo12:.LANCHOR9]
 	str	wzr, [x2, #:lo12:.LANCHOR160]
 	ldrh	w2, [x1, x25, lsl 1]
 	adrp	x1, .LANCHOR100
 	ldrh	w1, [x1, #:lo12:.LANCHOR100]
 	cmp	w2, w1
-	bcs	.L3892
+	bcs	.L3904
 	mov	w4, 1
 	str	x3, [x29, 96]
 	strb	w4, [x23, #:lo12:.LANCHOR85]
@@ -24846,22 +24950,22 @@ zftl_do_gc:
 	bl	gc_add_sblk
 	ldr	w4, [x29, 108]
 	ldr	x3, [x29, 96]
-	cbz	w0, .L3892
+	cbz	w0, .L3904
 	strb	w4, [x19, #:lo12:.LANCHOR159]
-	b	.L3838
-.L3892:
+	b	.L3850
+.L3904:
 	ldr	x0, [x3, #:lo12:.LANCHOR9]
 	ldrh	w1, [x0, x25, lsl 1]
 	adrp	x0, .LANCHOR95
 	ldrh	w0, [x0, #:lo12:.LANCHOR95]
 	cmp	w1, w0, lsr 1
-	bhi	.L3893
+	bhi	.L3905
 	mov	w2, 0
 	mov	w1, 1
 	mov	w0, w28
 	bl	gc_add_sblk
-	b	.L3882
-.L3893:
+	b	.L3894
+.L3905:
 	ldp	x2, x0, [x29, 112]
 	ldrh	w2, [x2, #:lo12:.LANCHOR99]
 	ldrh	w0, [x0, #:lo12:.LANCHOR97]
@@ -24869,154 +24973,154 @@ zftl_do_gc:
 	adrp	x2, .LANCHOR98
 	ldrh	w2, [x2, #:lo12:.LANCHOR98]
 	cmp	w0, w2, lsl 1
-	ble	.L3894
+	ble	.L3906
 	adrp	x0, .LANCHOR100
 	ldrh	w0, [x0, #:lo12:.LANCHOR100]
 	cmp	w0, w1
-	bcc	.L3891
-	b	.L3894
-.L3890:
+	bcc	.L3903
+	b	.L3906
+.L3902:
 	mov	w1, 1
 	strb	w1, [x23, #:lo12:.LANCHOR85]
 	cmp	w22, 16
-	bls	.L3895
+	bls	.L3907
 	adrp	x0, .LANCHOR93
 	ldrh	w2, [x0, #:lo12:.LANCHOR93]
 	adrp	x0, .LANCHOR101
 	ldrh	w0, [x0, #:lo12:.LANCHOR101]
 	cmp	w2, w0
-	bhi	.L3895
+	bhi	.L3907
 	mov	w0, w1
 	mov	w2, 4
-.L4032:
+.L4044:
 	bl	gc_search_src_blk
 	ands	w0, w0, 65535
-	bne	.L3896
+	bne	.L3908
 	ldrb	w0, [x23, #:lo12:.LANCHOR85]
 	mov	w2, 4
 	mov	w1, 3
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-.L3896:
+.L3908:
 	adrp	x1, .LANCHOR98
 	cmp	w21, w24, lsr 1
 	ldrh	w1, [x1, #:lo12:.LANCHOR98]
-	bls	.L4027
+	bls	.L4039
 	lsr	w1, w1, 2
-.L4028:
+.L4040:
 	strh	w1, [x26, #:lo12:.LANCHOR87]
-	b	.L3880
-.L3895:
+	b	.L3892
+.L3907:
 	mov	w2, 1
 	mov	w1, 2
 	mov	w0, w2
-	b	.L4032
-.L3900:
+	b	.L4044
+.L3912:
 	mov	w1, 3
 	mov	w2, 4
 	mov	w0, 0
 	bl	gc_search_src_blk
 	ldrh	w1, [x21, #:lo12:.LANCHOR98]
 	and	w0, w0, 65535
-.L4027:
+.L4039:
 	lsr	w1, w1, 1
-	b	.L4028
-.L3886:
+	b	.L4040
+.L3898:
 	adrp	x1, .LANCHOR98
 	mov	w20, 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR98]
 	lsr	w1, w1, 2
 	strh	w1, [x0, #:lo12:.LANCHOR87]
-	b	.L3838
-.L3842:
+	b	.L3850
+.L3854:
 	adrp	x7, .LANCHOR71
 	mov	w0, 65535
 	ldrh	w1, [x7, #:lo12:.LANCHOR71]
 	cmp	w1, w0
-	bne	.L3901
+	bne	.L3913
 	bl	gc_get_src_blk
 	strh	w0, [x7, #:lo12:.LANCHOR71]
-.L3901:
+.L3913:
 	ldrh	w0, [x7, #:lo12:.LANCHOR71]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3902
+	beq	.L3914
 	adrp	x1, .LANCHOR6
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	cmp	w1, w0
-	bhi	.L3902
+	bhi	.L3914
 	mov	w0, -1
 	strh	w0, [x7, #:lo12:.LANCHOR71]
-.L3902:
+.L3914:
 	ldrh	w3, [x7, #:lo12:.LANCHOR71]
 	mov	w0, 65535
 	add	x1, x7, :lo12:.LANCHOR71
 	cmp	w3, w0
-	beq	.L4034
+	beq	.L4046
 	adrp	x0, .LANCHOR7
 	ldrh	w5, [x1, 56]
 	uxtw	x4, w3
 	ldr	x2, [x0, #:lo12:.LANCHOR7]
 	add	x2, x2, x4, lsl 2
-	cbz	w5, .L3904
+	cbz	w5, .L3916
 	add	x1, x1, 58
 	mov	w0, 0
-.L3906:
+.L3918:
 	ldrh	w6, [x1], 2
 	cmp	w6, w3
-	bne	.L3905
-.L3910:
+	bne	.L3917
+.L3922:
 	adrp	x0, .LANCHOR71
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR71]
-	b	.L3953
-.L3905:
+	b	.L3965
+.L3917:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w5, w0
-	bne	.L3906
-.L3904:
+	bne	.L3918
+.L3916:
 	ldrb	w0, [x2, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L3907
+	beq	.L3919
 	tst	w0, 192
-	bne	.L3908
-.L3907:
+	bne	.L3920
+.L3919:
 	adrp	x0, .LANCHOR9
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, x4, lsl 1]
-	cbz	w0, .L3910
-	mov	w2, 3147
+	cbz	w0, .L3922
+	mov	w2, 3153
 	adrp	x1, .LANCHOR237
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR237
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3910
-.L3908:
+	b	.L3922
+.L3920:
 	mov	w0, 2
-	b	.L4035
-.L3843:
+	b	.L4047
+.L3855:
 	bl	gc_scan_src_blk
 	cmn	w0, #1
-	bne	.L3911
+	bne	.L3923
 	mov	w0, 3
-	b	.L4035
-.L3911:
+	b	.L4047
+.L3923:
 	adrp	x20, .LANCHOR71
 	mov	w2, 65535
 	add	x0, x20, :lo12:.LANCHOR71
 	ldrh	w1, [x20, #:lo12:.LANCHOR71]
 	cmp	w1, w2
-	beq	.L3857
+	beq	.L3869
 	ldrh	w2, [x0, 24]
-	cbz	w2, .L3912
+	cbz	w2, .L3924
 	mov	w1, 4
 	strh	wzr, [x0, 26]
 	strb	w1, [x19, #:lo12:.LANCHOR159]
-	b	.L3953
-.L3912:
+	b	.L3965
+.L3924:
 	mov	w0, 1
 	strb	w0, [x19, #:lo12:.LANCHOR159]
 	adrp	x0, .LANCHOR9
@@ -25024,14 +25128,14 @@ zftl_do_gc:
 	mov	x19, x0
 	ldr	x2, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L3913
+	cbz	w1, .L3925
 	adrp	x1, .LANCHOR237
 	adrp	x0, .LC0
-	mov	w2, 3177
+	mov	w2, 3183
 	add	x1, x1, :lo12:.LANCHOR237
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3913:
+.L3925:
 	ldrh	w0, [x20, #:lo12:.LANCHOR71]
 	add	x21, x20, :lo12:.LANCHOR71
 	bl	ftl_free_sblk
@@ -25042,35 +25146,35 @@ zftl_do_gc:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w0, 8
-	bhi	.L3914
+	bhi	.L3926
 	strh	w0, [x21, 30]
-	b	.L3910
-.L3914:
+	b	.L3922
+.L3926:
 	strh	wzr, [x21, 30]
 	bl	ftl_flush
 	bl	pm_flush
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L3910
-.L3844:
+	b	.L3922
+.L3856:
 	adrp	x20, .LANCHOR71
 	adrp	x23, .LANCHOR95
 	add	x22, x20, :lo12:.LANCHOR71
 	add	x23, x23, :lo12:.LANCHOR95
-.L3998:
+.L4010:
 	bl	gc_scan_src_blk_one_page
 	ldrh	w1, [x22, 2]
 	ldrh	w0, [x23]
 	cmp	w1, w0
-	bcs	.L3916
+	bcs	.L3928
 	cmp	w21, 7
-	bls	.L3998
-	b	.L3953
-.L3916:
+	bls	.L4010
+	b	.L3965
+.L3928:
 	ldrh	w3, [x22, 24]
 	ldrh	w1, [x22]
-	cbz	w3, .L3917
+	cbz	w3, .L3929
 	mov	w0, 4
 	strb	w0, [x19, #:lo12:.LANCHOR159]
 	adrp	x19, .LANCHOR9
@@ -25079,35 +25183,35 @@ zftl_do_gc:
 	ldr	x2, [x19, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x0]
 	cmp	w3, w2
-	beq	.L3918
+	beq	.L3930
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L3918
+	tbz	x0, 10, .L3930
 	adrp	x0, .LC237
 	add	x0, x0, :lo12:.LC237
 	bl	printf
-.L3918:
+.L3930:
 	ldrh	w2, [x20, #:lo12:.LANCHOR71]
 	add	x0, x20, :lo12:.LANCHOR71
 	ldr	x1, [x19, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, 24]
 	ldrh	w1, [x1, x2, lsl 1]
 	cmp	w1, w0
-	beq	.L3919
+	beq	.L3931
 	adrp	x1, .LANCHOR237
 	adrp	x0, .LC0
-	mov	w2, 3220
+	mov	w2, 3226
 	add	x1, x1, :lo12:.LANCHOR237
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3919:
+.L3931:
 	add	x0, x20, :lo12:.LANCHOR71
 	ldrh	w1, [x20, #:lo12:.LANCHOR71]
 	ldrh	w2, [x0, 24]
 	ldr	x0, [x19, #:lo12:.LANCHOR9]
 	strh	w2, [x0, x1, lsl 1]
-	b	.L3953
-.L3917:
+	b	.L3965
+.L3929:
 	adrp	x0, .LANCHOR7
 	ldr	x21, [x0, #:lo12:.LANCHOR7]
 	mov	w0, 1
@@ -25115,27 +25219,27 @@ zftl_do_gc:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	add	x21, x21, x1, uxth 2
-	tbz	x0, 8, .L3920
+	tbz	x0, 8, .L3932
 	ldrb	w2, [x21, 2]
 	adrp	x0, .LC238
 	add	x0, x0, :lo12:.LC238
 	ubfx	x2, x2, 5, 3
 	bl	printf
-.L3920:
+.L3932:
 	ldrb	w0, [x21, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L3921
+	beq	.L3933
 	tst	w0, 192
-	bne	.L3922
-.L3921:
+	bne	.L3934
+.L3933:
 	adrp	x1, .LANCHOR237
 	adrp	x0, .LC0
-	mov	w2, 3230
+	mov	w2, 3236
 	add	x1, x1, :lo12:.LANCHOR237
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3922:
+.L3934:
 	ldrh	w0, [x20, #:lo12:.LANCHOR71]
 	add	x19, x20, :lo12:.LANCHOR71
 	bl	ftl_free_sblk
@@ -25145,56 +25249,56 @@ zftl_do_gc:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w0, 8
-	bhi	.L3923
+	bhi	.L3935
 	strh	w0, [x19, 30]
-	b	.L3953
-.L3923:
+	b	.L3965
+.L3935:
 	strh	wzr, [x19, 30]
-.L4033:
+.L4045:
 	bl	flt_sys_flush
-	b	.L3953
-.L3845:
+	b	.L3965
+.L3857:
 	ldrh	w1, [x26, 80]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L3924
+	bne	.L3936
 	adrp	x0, .LANCHOR85
 	ldrb	w22, [x0, #:lo12:.LANCHOR85]
 	cmp	w22, 1
-	bne	.L3924
+	bne	.L3936
 	bl	ftl_flush
 	adrp	x0, .LANCHOR71
 	add	x1, x0, :lo12:.LANCHOR71
 	mov	x20, x0
 	ldrh	w1, [x1, 2110]
-	cbz	w1, .L3925
+	cbz	w1, .L3937
 	mov	w0, w22
 	mov	w1, 5
-.L4029:
+.L4041:
 	bl	zftl_gc_get_free_sblk
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L3927
+	beq	.L3939
 	adrp	x0, .LANCHOR7
 	ldr	x21, [x0, #:lo12:.LANCHOR7]
 	add	x21, x21, x19, uxth 2
 	ldrb	w0, [x21, 2]
 	tst	w0, 224
-	beq	.L3928
+	beq	.L3940
 	adrp	x1, .LANCHOR237
 	adrp	x0, .LC0
-	mov	w2, 3264
+	mov	w2, 3270
 	add	x1, x1, :lo12:.LANCHOR237
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3928:
+.L3940:
 	ldrb	w0, [x21, 2]
 	mov	w1, 5
 	bfi	w0, w1, 5, 3
 	orr	w0, w0, 16
 	strb	w0, [x21, 2]
-.L3952:
+.L3964:
 	mov	w1, 1
 	mov	w0, w19
 	bl	ftl_erase_sblk
@@ -25257,12 +25361,12 @@ zftl_do_gc:
 	strh	wzr, [x0, 2112]
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L3953
-.L3925:
+	b	.L3965
+.L3937:
 	mov	w1, 5
 	mov	w0, 0
-	b	.L4029
-.L3924:
+	b	.L4041
+.L3936:
 	cmp	w25, 1
 	mov	w22, 4
 	csinc	w22, w22, wzr, eq
@@ -25275,24 +25379,24 @@ zftl_do_gc:
 	add	x25, x25, :lo12:.LANCHOR85
 	add	x20, x21, :lo12:.LANCHOR71
 	add	x27, x26, 80
-.L3931:
+.L3943:
 	sub	w22, w22, #1
 	and	w22, w22, 255
 	cmp	w22, 255
-	beq	.L3953
+	beq	.L3965
 	bl	gc_do_copy_back
 	ldrb	w0, [x25]
-	cbnz	w0, .L3932
+	cbnz	w0, .L3944
 	adrp	x0, .LANCHOR58
 	ldrb	w0, [x0, #:lo12:.LANCHOR58]
 	cmp	w0, 3
-	bhi	.L3933
+	bhi	.L3945
 	bl	ftl_write_commit
-.L3933:
+.L3945:
 	ldrh	w1, [x20, 26]
 	ldrh	w0, [x20, 24]
 	cmp	w1, w0
-	bcc	.L3931
+	bcc	.L3943
 	mov	w0, 1
 	strb	w0, [x19, #:lo12:.LANCHOR159]
 	bl	ftl_write_commit
@@ -25302,49 +25406,49 @@ zftl_do_gc:
 	mov	x19, x0
 	ldr	x1, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x1, x2, lsl 1]
-	cbz	w1, .L3935
+	cbz	w1, .L3947
 	adrp	x1, .LANCHOR237
 	adrp	x0, .LC0
-	mov	w2, 3348
+	mov	w2, 3354
 	add	x1, x1, :lo12:.LANCHOR237
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3935:
+.L3947:
 	ldrh	w0, [x21, #:lo12:.LANCHOR71]
 	ldr	x2, [x19, #:lo12:.LANCHOR9]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L3936
+	cbnz	w1, .L3948
 	bl	ftl_free_sblk
-	b	.L3910
-.L3936:
+	b	.L3922
+.L3948:
 	mov	w2, 1
 	mov	w1, 0
 	bl	gc_add_sblk
-	b	.L3910
-.L3932:
+	b	.L3922
+.L3944:
 	ldrh	w0, [x20, 2112]
-	cbz	w0, .L3937
+	cbz	w0, .L3949
 	strh	wzr, [x20, 2112]
 	bl	sblk_wait_write_queue_completed
 	bl	gc_write_completed
 	ldr	w0, [x20, 2116]
 	adrp	x20, .LANCHOR110
 	cmn	w0, #1
-	beq	.L3938
+	beq	.L3950
 	adrp	x1, .LANCHOR124
 	ldrb	w1, [x1, #:lo12:.LANCHOR124]
-	cbnz	w1, .L3939
+	cbnz	w1, .L3951
 	adrp	x1, .LANCHOR81
 	ldrb	w1, [x1, #:lo12:.LANCHOR81]
-	cbz	w1, .L3940
-.L3939:
+	cbz	w1, .L3952
+.L3951:
 	ldr	x1, [x20, #:lo12:.LANCHOR110]
 	ldr	w2, [x1, 156]
 	mov	w1, 20041
 	movk	w1, 0x444b, lsl 16
 	cmp	w2, w1
-	bne	.L3940
+	bne	.L3952
 	adrp	x1, .LANCHOR75
 	ldrh	w3, [x1, #:lo12:.LANCHOR75]
 	adrp	x1, .LANCHOR32
@@ -25365,13 +25469,13 @@ zftl_do_gc:
 	lsl	x0, x0, 2
 	add	x4, x2, x0
 	ldrb	w1, [x4, 2]
-	tbz	x1, 3, .L3938
+	tbz	x1, 3, .L3950
 	adrp	x5, .LANCHOR98
 	ldrh	w3, [x24, #:lo12:.LANCHOR103]
 	ldrh	w5, [x5, #:lo12:.LANCHOR98]
 	add	w3, w3, 8
 	cmp	w3, w5
-	bge	.L3938
+	bge	.L3950
 	and	w1, w1, -25
 	strb	w1, [x4, 2]
 	adrp	x1, .LANCHOR8
@@ -25389,7 +25493,7 @@ zftl_do_gc:
 	ldr	w1, [x2, x0]
 	bfi	w1, w3, 11, 8
 	str	w1, [x2, x0]
-.L3938:
+.L3950:
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	add	x22, x21, :lo12:.LANCHOR71
 	strh	wzr, [x22, 56]
@@ -25403,31 +25507,31 @@ zftl_do_gc:
 	strh	w0, [x2, 126]
 	strh	w0, [x1, 130]
 	ldr	x0, [x22, 8]
-	cbz	x0, .L3941
+	cbz	x0, .L3953
 	bl	zbuf_free
-.L3941:
+.L3953:
 	add	x21, x21, :lo12:.LANCHOR71
 	str	xzr, [x21, 8]
 	bl	flt_sys_flush
-	mov	w2, 3407
+	mov	w2, 3413
 	strb	wzr, [x19, #:lo12:.LANCHOR159]
 	adrp	x1, .LANCHOR237
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR237
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3953
-.L3940:
+	b	.L3965
+.L3952:
 	bl	ftl_mask_bad_block
-	b	.L3938
-.L3937:
+	b	.L3950
+.L3949:
 	ldrh	w0, [x27, 6]
 	ldrh	w1, [x20, 26]
 	cmp	w0, 1
 	ldrh	w0, [x20, 24]
-	bls	.L3942
+	bls	.L3954
 	cmp	w1, w0
-	bcc	.L3931
+	bcc	.L3943
 	mov	w0, 1
 	strb	w0, [x19, #:lo12:.LANCHOR159]
 	ldrh	w0, [x20, 56]
@@ -25438,12 +25542,12 @@ zftl_do_gc:
 	strh	w1, [x0, 58]
 	mov	w0, -1
 	strh	w0, [x20]
-	b	.L3953
-.L3942:
+	b	.L3965
+.L3954:
 	mov	w2, 5
 	strb	w2, [x19, #:lo12:.LANCHOR159]
 	cmp	w1, w0
-	bcc	.L3943
+	bcc	.L3955
 	ldrh	w0, [x20, 56]
 	add	w1, w0, 1
 	strh	w1, [x20, 56]
@@ -25452,7 +25556,7 @@ zftl_do_gc:
 	strh	w1, [x0, 58]
 	mov	w0, -1
 	strh	w0, [x20]
-.L3943:
+.L3955:
 	bl	ftl_flush
 	bl	sblk_wait_write_queue_completed
 	bl	gc_write_completed
@@ -25471,50 +25575,50 @@ zftl_do_gc:
 	strh	wzr, [x0, 16]
 	ldrb	w1, [x1, #:lo12:.LANCHOR79]
 	strh	w1, [x0, 20]
-	cbz	w2, .L3944
+	cbz	w2, .L3956
 	adrp	x2, .LANCHOR86
 	ldrh	w2, [x2, #:lo12:.LANCHOR86]
 	strh	w2, [x0, 18]
 	mov	w2, 1
 	strh	w2, [x0, 20]
-.L3944:
+.L3956:
 	cmp	w1, 2
-	bne	.L3946
+	bne	.L3958
 	add	x0, x21, :lo12:.LANCHOR71
 	ldrh	w1, [x0, 18]
 	ubfiz	w1, w1, 1, 15
 	strh	w1, [x0, 18]
 	adrp	x1, .LANCHOR81
 	ldrb	w1, [x1, #:lo12:.LANCHOR81]
-	cbnz	w1, .L3946
+	cbnz	w1, .L3958
 	mov	w1, 1
 	strh	w1, [x0, 20]
-.L3946:
+.L3958:
 	add	x21, x21, :lo12:.LANCHOR71
 	strh	wzr, [x21, 22]
-	b	.L3953
-.L3949:
+	b	.L3965
+.L3961:
 	ldrh	w1, [x24, 16]
 	ldrh	w0, [x24, 18]
 	cmp	w1, w0
-	bcc	.L3950
+	bcc	.L3962
 	mov	w0, 6
 	strb	w0, [x19, #:lo12:.LANCHOR159]
 	ldr	x0, [x24, 8]
 	bl	zbuf_free
 	str	xzr, [x24, 8]
-	b	.L3953
-.L3950:
+	b	.L3965
+.L3962:
 	cmp	w21, 15
-	bls	.L3848
+	bls	.L3860
 	cmp	w25, 1
-	bne	.L3953
+	bne	.L3965
 	add	w22, w22, 1
 	and	w22, w22, 255
 	cmp	w22, 4
-	bls	.L3848
-	b	.L3953
-.L3847:
+	bls	.L3860
+	b	.L3965
+.L3859:
 	bl	gc_update_l2p_map_new
 	mov	w20, -1
 	bl	gc_free_src_blk
@@ -25527,17 +25631,17 @@ zftl_do_gc:
 	strh	w20, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L4034:
+.L4046:
 	strb	wzr, [x19, #:lo12:.LANCHOR159]
-	b	.L3953
-.L3927:
-	mov	w2, 3271
+	b	.L3965
+.L3939:
+	mov	w2, 3277
 	adrp	x1, .LANCHOR237
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR237
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3952
+	b	.L3964
 	.size	zftl_do_gc, .-zftl_do_gc
 	.section	.text.zftl_init,"ax",@progbits
 	.align	2
@@ -25609,9 +25713,9 @@ zftl_init:
 	strh	w6, [x20, #:lo12:.LANCHOR221]
 	strb	w2, [x21, #:lo12:.LANCHOR80]
 	mov	w1, 0
-.L4037:
+.L4049:
 	cmp	w4, w3
-	bcs	.L4038
+	bcs	.L4050
 	mul	w10, w0, w5
 	adrp	x3, .LANCHOR75
 	sub	w1, w1, #1
@@ -25620,9 +25724,9 @@ zftl_init:
 	mov	w1, 1
 	mul	w3, w8, w10
 	lsr	w12, w3, 21
-.L4039:
+.L4051:
 	cmp	w12, w1
-	bcs	.L4040
+	bcs	.L4052
 	mov	w1, 57344
 	sub	w4, w4, #1
 	movk	w1, 0x1c, lsl 16
@@ -25660,10 +25764,10 @@ zftl_init:
 	adrp	x0, .LANCHOR101
 	str	x0, [x29, 104]
 	strh	w3, [x0, #:lo12:.LANCHOR101]
-	bhi	.L4041
+	bhi	.L4053
 	mov	w0, 80
 	strh	w0, [x25, #:lo12:.LANCHOR98]
-.L4041:
+.L4053:
 	adrp	x12, .LANCHOR126
 	mov	w0, 2000
 	adrp	x11, .LANCHOR125
@@ -25683,11 +25787,11 @@ zftl_init:
 	strh	w10, [x0, #:lo12:.LANCHOR8]
 	mov	x7, x12
 	mov	x14, x8
-	beq	.L4042
+	beq	.L4054
 	adrp	x15, .LANCHOR84
 	ldrb	w15, [x15, #:lo12:.LANCHOR84]
-	cbz	w15, .L4043
-.L4042:
+	cbz	w15, .L4055
+.L4054:
 	mov	w8, 150
 	strh	w8, [x13, #:lo12:.LANCHOR125]
 	mov	w8, 64
@@ -25696,22 +25800,22 @@ zftl_init:
 	strh	w8, [x0, #:lo12:.LANCHOR8]
 	adrp	x8, .LANCHOR0
 	ldrb	w8, [x8, #:lo12:.LANCHOR0]
-	cbnz	w8, .L4044
+	cbnz	w8, .L4056
 	mov	w8, 4
 	strh	w8, [x0, #:lo12:.LANCHOR8]
 	mov	w0, 600
 	strh	w0, [x7, #:lo12:.LANCHOR126]
 	mov	w0, 128
 	strh	w0, [x3, #:lo12:.LANCHOR152]
-.L4044:
+.L4056:
 	adrp	x0, .LANCHOR37
 	ldrb	w0, [x0, #:lo12:.LANCHOR37]
-	cbz	w0, .L4046
+	cbz	w0, .L4058
 	mov	w0, 200
 	strh	w0, [x13, #:lo12:.LANCHOR125]
 	mov	w0, 2000
 	strh	w0, [x7, #:lo12:.LANCHOR126]
-.L4046:
+.L4058:
 	adrp	x0, .LANCHOR122
 	mul	w2, w5, w2
 	mov	w3, 1
@@ -25719,76 +25823,76 @@ zftl_init:
 	adrp	x0, .LANCHOR224
 	cmp	w6, w2, lsl 2
 	strb	w3, [x0, #:lo12:.LANCHOR224]
-	bge	.L4048
+	bge	.L4060
 	mov	w2, 2
 	strb	w2, [x0, #:lo12:.LANCHOR224]
-.L4048:
+.L4060:
 	adrp	x19, .LANCHOR14
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L4049
+	tbz	x0, 12, .L4061
 	str	x4, [x29, 96]
 	adrp	x0, .LC240
 	add	x0, x0, :lo12:.LC240
 	bl	printf
 	ldr	x4, [x29, 96]
-.L4049:
+.L4061:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L4050
+	tbz	x0, 12, .L4062
 	ldr	w1, [x4, #:lo12:.LANCHOR239]
 	adrp	x0, .LC241
 	add	x0, x0, :lo12:.LC241
 	bl	printf
-.L4050:
+.L4062:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L4051
+	tbz	x0, 12, .L4063
 	ldr	w1, [x28, #:lo12:.LANCHOR128]
 	adrp	x0, .LC242
 	add	x0, x0, :lo12:.LC242
 	bl	printf
-.L4051:
+.L4063:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L4052
+	tbz	x0, 12, .L4064
 	ldr	w1, [x27, #:lo12:.LANCHOR240]
 	adrp	x0, .LC243
 	add	x0, x0, :lo12:.LC243
 	bl	printf
-.L4052:
+.L4064:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L4053
+	tbz	x0, 12, .L4065
 	ldrh	w1, [x24, #:lo12:.LANCHOR204]
 	adrp	x0, .LC244
 	add	x0, x0, :lo12:.LC244
 	bl	printf
-.L4053:
+.L4065:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L4054
+	tbz	x0, 12, .L4066
 	ldrh	w1, [x20, #:lo12:.LANCHOR221]
 	adrp	x0, .LC245
 	add	x0, x0, :lo12:.LC245
 	bl	printf
-.L4054:
+.L4066:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L4055
+	tbz	x0, 12, .L4067
 	ldrh	w1, [x26, #:lo12:.LANCHOR155]
 	adrp	x0, .LC246
 	add	x0, x0, :lo12:.LC246
 	bl	printf
-.L4055:
+.L4067:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L4056
+	tbz	x0, 12, .L4068
 	ldrh	w1, [x25, #:lo12:.LANCHOR98]
 	adrp	x0, .LC247
 	add	x0, x0, :lo12:.LC247
 	bl	printf
-.L4056:
+.L4068:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L4057
+	tbz	x0, 12, .L4069
 	ldr	x0, [x29, 104]
 	ldrh	w1, [x0, #:lo12:.LANCHOR101]
 	adrp	x0, .LC248
 	add	x0, x0, :lo12:.LC248
 	bl	printf
-.L4057:
+.L4069:
 	bl	zbuf_init
 	adrp	x25, .LANCHOR200
 	mov	w0, 16384
@@ -25831,11 +25935,11 @@ zftl_init:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	add	x1, x2, x1, sxtw 2
 	str	x1, [x25, #:lo12:.LANCHOR10]
-	tbz	x0, 12, .L4058
+	tbz	x0, 12, .L4070
 	adrp	x0, .LC249
 	add	x0, x0, :lo12:.LC249
 	bl	printf
-.L4058:
+.L4070:
 	ldrh	w0, [x22, #:lo12:.LANCHOR95]
 	ldrb	w21, [x21, #:lo12:.LANCHOR80]
 	ldrh	w1, [x23, #:lo12:.LANCHOR6]
@@ -25848,46 +25952,46 @@ zftl_init:
 	add	w22, w1, w22, lsl 2
 	add	w21, w21, 632
 	add	w22, w22, 704
-	tbz	x0, 12, .L4059
+	tbz	x0, 12, .L4071
 	ldrh	w3, [x20, #:lo12:.LANCHOR221]
 	adrp	x0, .LC250
 	mov	w2, w22
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC250
 	bl	printf
-.L4059:
+.L4071:
 	ldrh	w0, [x20, #:lo12:.LANCHOR221]
 	cmp	w21, w0
-	bhi	.L4060
+	bhi	.L4072
 	cmp	w22, w0
-	bls	.L4061
-.L4060:
-.L4114:
-	b	.L4114
-.L4038:
+	bls	.L4073
+.L4072:
+.L4126:
+	b	.L4126
+.L4050:
 	add	w1, w1, 1
 	lsl	w3, w3, 1
 	and	w1, w1, 65535
-	b	.L4037
-.L4040:
+	b	.L4049
+.L4052:
 	add	w4, w4, 1
 	lsl	w1, w1, 1
 	and	w4, w4, 65535
-	b	.L4039
-.L4043:
+	b	.L4051
+.L4055:
 	adrp	x0, .LANCHOR36
 	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbz	w0, .L4046
+	cbz	w0, .L4058
 	mov	w0, 1200
 	strh	w10, [x11, #:lo12:.LANCHOR125]
 	strh	w0, [x12, #:lo12:.LANCHOR126]
 	strh	w10, [x8, #:lo12:.LANCHOR153]
-	b	.L4046
-.L4061:
+	b	.L4058
+.L4073:
 	bl	sblk_init
 	bl	ftl_info_blk_init
 	cmn	w0, #1
-	beq	.L4036
+	beq	.L4048
 	bl	ftl_ext_info_init
 	adrp	x19, .LANCHOR110
 	bl	gc_init
@@ -25921,29 +26025,29 @@ zftl_init:
 	bl	ftl_total_vpn_update
 	adrp	x0, .LANCHOR198
 	ldrb	w0, [x0, #:lo12:.LANCHOR198]
-	cbz	w0, .L4063
+	cbz	w0, .L4075
 	ldr	x1, [x19, #:lo12:.LANCHOR110]
 	ldr	w0, [x1, 68]
 	add	w0, w0, 1
 	str	w0, [x1, 68]
-.L4063:
+.L4075:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
 	bl	print_ftl_debug_info
 	ldr	x0, [x25, #:lo12:.LANCHOR10]
 	ldrh	w0, [x0, 124]
-	cbnz	w0, .L4070
+	cbnz	w0, .L4082
 	adrp	x0, .LANCHOR103
 	adrp	x1, .LANCHOR107
 	ldrh	w0, [x0, #:lo12:.LANCHOR103]
 	ldrh	w1, [x1, #:lo12:.LANCHOR107]
 	add	w0, w0, w1
 	cmp	w0, 7
-	ble	.L4070
-.L4066:
+	ble	.L4082
+.L4078:
 	mov	w0, 0
-.L4036:
+.L4048:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -25951,13 +26055,13 @@ zftl_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L4070:
+.L4082:
 	adrp	x20, .LANCHOR103
 	adrp	x21, .LANCHOR107
 	add	x20, x20, :lo12:.LANCHOR103
 	add	x21, x21, :lo12:.LANCHOR107
 	mov	w19, 16384
-.L4067:
+.L4079:
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
@@ -25966,20 +26070,20 @@ zftl_init:
 	bl	zftl_do_gc
 	ldr	x0, [x25, #:lo12:.LANCHOR10]
 	ldrh	w1, [x0, 124]
-	cbnz	w1, .L4065
+	cbnz	w1, .L4077
 	ldrh	w1, [x0, 80]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L4065
+	bne	.L4077
 	ldrh	w0, [x20]
 	ldrh	w1, [x21]
 	add	w0, w0, w1
 	cmp	w0, 7
-	bgt	.L4066
-.L4065:
+	bgt	.L4078
+.L4077:
 	subs	w19, w19, #1
-	bne	.L4067
-	b	.L4066
+	bne	.L4079
+	b	.L4078
 	.size	zftl_init, .-zftl_init
 	.section	.text.rk_ftl_init,"ax",@progbits
 	.align	2
@@ -25990,9 +26094,9 @@ rk_ftl_init:
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	bl	nand_flash_init
-	cbnz	w0, .L4118
+	cbnz	w0, .L4130
 	bl	zftl_init
-.L4118:
+.L4130:
 	mov	w19, w0
 	bl	idb_init
 	mov	w1, w19
@@ -26022,7 +26126,7 @@ zftl_write:
 	stp	x23, x24, [sp, 48]
 	mov	x25, x3
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L4121
+	tbz	x0, 12, .L4133
 	ldr	w4, [x25]
 	mov	w3, w2
 	adrp	x0, .LC252
@@ -26030,18 +26134,18 @@ zftl_write:
 	add	x0, x0, :lo12:.LC252
 	mov	w1, w19
 	bl	printf
-.L4121:
-	cbnz	w19, .L4122
+.L4133:
+	cbnz	w19, .L4134
 	adrp	x0, .LANCHOR68
 	mov	w19, 24576
 	ldr	w0, [x0, #:lo12:.LANCHOR68]
-.L4123:
+.L4135:
 	cmp	w0, w20
 	ccmp	w0, w21, 0, hi
-	bcc	.L4141
+	bcc	.L4153
 	add	w1, w20, w21
 	cmp	w0, w1
-	bcc	.L4141
+	bcc	.L4153
 	adrp	x26, .LANCHOR131
 	add	w19, w19, w20
 	sub	w22, w21, #1
@@ -26058,8 +26162,8 @@ zftl_write:
 	mov	w20, w24
 	sub	w23, w22, w24
 	add	w23, w23, 1
-.L4125:
-	cbnz	w23, .L4134
+.L4137:
+	cbnz	w23, .L4146
 	bl	ftl_write_commit
 	adrp	x20, .LANCHOR103
 	bl	ftl_flush
@@ -26070,27 +26174,27 @@ zftl_write:
 	adrp	x0, .LANCHOR10
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldrh	w0, [x0, 124]
-	cbnz	w0, .L4135
+	cbnz	w0, .L4147
 	ldrh	w0, [x20, #:lo12:.LANCHOR103]
 	ldrh	w1, [x19, #:lo12:.LANCHOR107]
 	add	w0, w0, w1
 	cmp	w0, 11
-	bgt	.L4136
-.L4135:
+	bgt	.L4148
+.L4147:
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
-.L4136:
+.L4148:
 	add	x20, x20, :lo12:.LANCHOR103
 	add	x19, x19, :lo12:.LANCHOR107
-.L4137:
+.L4149:
 	ldrh	w0, [x20]
 	ldrh	w1, [x19]
 	add	w0, w0, w1
 	cmp	w0, 7
-	ble	.L4138
+	ble	.L4150
 	mov	w0, 0
-.L4120:
+.L4132:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -26098,36 +26202,36 @@ zftl_write:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L4122:
+.L4134:
 	cmp	w19, 3
-	bhi	.L4141
+	bhi	.L4153
 	lsl	w19, w19, 13
 	mov	w0, 8192
-	b	.L4123
-.L4134:
+	b	.L4135
+.L4146:
 	ldrb	w0, [x27]
-	cbz	w0, .L4126
+	cbz	w0, .L4138
 	ldrb	w0, [x28]
 	cmp	w0, 2
-	bhi	.L4126
+	bhi	.L4138
 	bl	ftl_write_commit
-.L4126:
+.L4138:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x26, x0
-	cbnz	x0, .L4127
+	cbnz	x0, .L4139
 	bl	ftl_write_commit
-	b	.L4125
-.L4127:
+	b	.L4137
+.L4139:
 	strb	wzr, [x0, 57]
 	cmp	w20, w24
 	ldr	x0, [x29, 104]
 	ccmp	w20, w22, 4, ne
 	ldrb	w0, [x0]
 	strb	w0, [x26, 56]
-	bne	.L4130
+	bne	.L4142
 	cmp	w20, w24
-	bne	.L4131
+	bne	.L4143
 	udiv	w1, w19, w0
 	msub	w1, w1, w0, w19
 	and	w1, w1, 255
@@ -26136,9 +26240,9 @@ zftl_write:
 	and	w0, w0, 255
 	cmp	w21, w0
 	csel	w0, w21, w0, cc
-.L4149:
+.L4161:
 	strb	w0, [x26, 56]
-.L4130:
+.L4142:
 	ldr	x4, [x26, 8]
 	mov	x1, x25
 	ldrb	w0, [x26, 57]
@@ -26161,22 +26265,22 @@ zftl_write:
 	ldrb	w0, [x26, 56]
 	ubfiz	x0, x0, 9, 8
 	add	x25, x25, x0
-	b	.L4125
-.L4131:
+	b	.L4137
+.L4143:
 	add	w1, w19, w21
 	msub	w0, w0, w20, w1
-	b	.L4149
-.L4138:
+	b	.L4161
+.L4150:
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
 	mov	w1, 1
 	mov	w0, w1
 	bl	zftl_do_gc
-	b	.L4137
-.L4141:
+	b	.L4149
+.L4153:
 	mov	w0, -1
-	b	.L4120
+	b	.L4132
 	.size	zftl_write, .-zftl_write
 	.section	.text.zftl_sys_write,"ax",@progbits
 	.align	2
@@ -26224,12 +26328,12 @@ ftl_write:
 	mov	x20, x3
 	mov	w22, w1
 	ands	w21, w0, 255
-	bne	.L4154
+	bne	.L4166
 	mov	w3, w2
 	mov	w0, 0
 	mov	x2, x20
 	bl	idb_write_data
-.L4154:
+.L4166:
 	mov	x3, x20
 	mov	w2, w19
 	mov	w1, w22
@@ -26274,10 +26378,10 @@ zftl_discard:
 	stp	x27, x28, [sp, 80]
 	cmp	w0, w1
 	ccmp	w19, w1, 2, cc
-	bhi	.L4180
+	bhi	.L4192
 	add	w2, w0, w19
 	cmp	w1, w2
-	bcc	.L4180
+	bcc	.L4192
 	adrp	x24, .LANCHOR241
 	add	w22, w0, 24576
 	adrp	x0, .LANCHOR14
@@ -26286,14 +26390,14 @@ zftl_discard:
 	ldr	w2, [x0, #:lo12:.LANCHOR14]
 	add	w1, w19, w1
 	str	w1, [x24, #:lo12:.LANCHOR241]
-	tbz	x2, 12, .L4160
+	tbz	x2, 12, .L4172
 	adrp	x0, .LC253
 	mov	w4, 0
 	mov	w3, w19
 	mov	w2, w22
 	add	x0, x0, :lo12:.LC253
 	bl	printf
-.L4160:
+.L4172:
 	adrp	x23, .LANCHOR110
 	adrp	x26, .LANCHOR131
 	ldr	x0, [x23, #:lo12:.LANCHOR110]
@@ -26305,7 +26409,7 @@ zftl_discard:
 	ldrb	w21, [x26, #:lo12:.LANCHOR131]
 	udiv	w20, w22, w21
 	msub	w25, w20, w21, w22
-	cbz	w25, .L4161
+	cbz	w25, .L4173
 	sub	w21, w21, w25
 	mov	w0, w20
 	cmp	w21, w19
@@ -26313,20 +26417,20 @@ zftl_discard:
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	bne	.L4162
+	bne	.L4174
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
-.L4162:
+.L4174:
 	ldr	w0, [x29, 120]
 	and	w28, w21, 65535
 	cmn	w0, #1
-	beq	.L4164
+	beq	.L4176
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x3, x0
-	cbz	x0, .L4164
+	cbz	x0, .L4176
 	strb	w25, [x0, 57]
 	ubfiz	x25, x25, 9, 25
 	strb	w21, [x0, 56]
@@ -26345,53 +26449,53 @@ zftl_discard:
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L4164:
+.L4176:
 	add	w20, w20, 1
 	sub	w19, w19, w28
-.L4161:
-	cbz	w19, .L4166
+.L4173:
+	cbz	w19, .L4178
 	bl	ftl_flush
-.L4166:
+.L4178:
 	adrp	x25, .LANCHOR75
 	add	x21, x26, :lo12:.LANCHOR131
 	add	x25, x25, :lo12:.LANCHOR75
 	mov	w0, -1
 	str	w0, [x29, 124]
-.L4167:
+.L4179:
 	ldrb	w0, [x21]
 	cmp	w19, w0
-	bcs	.L4172
-	cbz	w19, .L4174
+	bcs	.L4184
+	cbz	w19, .L4186
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	bne	.L4175
+	bne	.L4187
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
-.L4175:
+.L4187:
 	ldr	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L4174
+	beq	.L4186
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x21, x0
-	cbz	x0, .L4174
+	cbz	x0, .L4186
 	strb	wzr, [x0, 57]
 	strb	w19, [x0, 56]
 	stp	w27, w20, [x21, 32]
 	ldrb	w0, [x26, #:lo12:.LANCHOR131]
 	cmp	w19, w0
-	bcc	.L4177
+	bcc	.L4189
 	adrp	x1, .LANCHOR242
 	adrp	x0, .LC0
 	mov	w2, 1477
 	add	x1, x1, :lo12:.LANCHOR242
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L4177:
+.L4189:
 	ldr	x0, [x21, 8]
 	lsl	w2, w19, 9
 	mov	w1, 0
@@ -26403,38 +26507,38 @@ zftl_discard:
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L4174:
+.L4186:
 	ldr	w1, [x24, #:lo12:.LANCHOR241]
 	cmp	w1, 8192
-	bls	.L4181
+	bls	.L4193
 	ldr	x0, [x29, 104]
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L4178
+	tbz	x0, 12, .L4190
 	adrp	x0, .LC253
 	mov	w4, 0
 	mov	w3, w19
 	mov	w2, w22
 	add	x0, x0, :lo12:.LC253
 	bl	printf
-.L4178:
+.L4190:
 	str	wzr, [x24, #:lo12:.LANCHOR241]
 	bl	flt_sys_flush
 	adrp	x0, .LANCHOR122
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR122]
-.L4181:
+.L4193:
 	mov	w0, 0
-	b	.L4158
-.L4172:
+	b	.L4170
+.L4184:
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L4168
+	beq	.L4180
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbz	x0, .L4170
+	cbz	x0, .L4182
 	ldrb	w2, [x21]
 	mov	w1, 0
 	strb	w2, [x0, 56]
@@ -26446,24 +26550,24 @@ zftl_discard:
 	mov	x0, x28
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-.L4207:
+.L4219:
 	ldr	x1, [x23, #:lo12:.LANCHOR110]
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L4170:
+.L4182:
 	ldrb	w0, [x21]
 	add	w20, w20, 1
 	sub	w19, w19, w0
-	b	.L4167
-.L4168:
+	b	.L4179
+.L4180:
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
 	ldr	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L4170
+	beq	.L4182
 	add	x1, x29, 124
 	mov	w2, 1
 	mov	w0, w20
@@ -26484,10 +26588,10 @@ zftl_discard:
 	ldrb	w1, [x1, #:lo12:.LANCHOR76]
 	udiv	w0, w0, w1
 	bl	ftl_vpn_decrement
-	b	.L4207
-.L4180:
+	b	.L4219
+.L4192:
 	mov	w0, -1
-.L4158:
+.L4170:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -26533,26 +26637,26 @@ dump_pm_blk:
 	add	x0, x0, :lo12:.LC255
 	add	x1, x1, 416
 	bl	rknand_print_hex
-.L4210:
+.L4222:
 	ldrh	w0, [x21]
 	cmp	w0, w19
-	bhi	.L4212
+	bhi	.L4224
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L4212:
+.L4224:
 	ldr	x0, [x20, #:lo12:.LANCHOR110]
 	add	x0, x0, x19, sxtw 1
 	ldrh	w0, [x0, 416]
 	cmp	w0, w22
-	beq	.L4211
+	beq	.L4223
 	mov	x1, 0
 	bl	ftl_sblk_dump
-.L4211:
+.L4223:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L4210
+	b	.L4222
 	.size	dump_pm_blk, .-dump_pm_blk
 	.global	g_pm_spare
 	.global	pm_first_write
@@ -30961,376 +31065,376 @@ __func__.7308:
 	.size	__func__.7723, 20
 __func__.7723:
 	.string	"flash_die_info_init"
-	.section	.rodata.__func__.7733,"a",@progbits
+	.section	.rodata.__func__.7734,"a",@progbits
 	.align	3
 	.set	.LANCHOR15,. + 0
-	.type	__func__.7733, %object
-	.size	__func__.7733, 22
-__func__.7733:
+	.type	__func__.7734, %object
+	.size	__func__.7734, 22
+__func__.7734:
 	.string	"nand_flash_print_info"
-	.section	.rodata.__func__.7778,"a",@progbits
+	.section	.rodata.__func__.7783,"a",@progbits
 	.align	3
 	.set	.LANCHOR213,. + 0
-	.type	__func__.7778, %object
-	.size	__func__.7778, 16
-__func__.7778:
+	.type	__func__.7783, %object
+	.size	__func__.7783, 16
+__func__.7783:
 	.string	"nand_flash_init"
-	.section	.rodata.__func__.7801,"a",@progbits
+	.section	.rodata.__func__.7806,"a",@progbits
 	.align	3
 	.set	.LANCHOR158,. + 0
-	.type	__func__.7801, %object
-	.size	__func__.7801, 11
-__func__.7801:
+	.type	__func__.7806, %object
+	.size	__func__.7806, 11
+__func__.7806:
 	.string	"nandc_init"
-	.section	.rodata.__func__.7970,"a",@progbits
+	.section	.rodata.__func__.7975,"a",@progbits
 	.align	3
 	.set	.LANCHOR59,. + 0
-	.type	__func__.7970, %object
-	.size	__func__.7970, 13
-__func__.7970:
+	.type	__func__.7975, %object
+	.size	__func__.7975, 13
+__func__.7975:
 	.string	"buf_add_tail"
-	.section	.rodata.__func__.7983,"a",@progbits
+	.section	.rodata.__func__.7988,"a",@progbits
 	.align	3
 	.set	.LANCHOR61,. + 0
-	.type	__func__.7983, %object
-	.size	__func__.7983, 10
-__func__.7983:
+	.type	__func__.7988, %object
+	.size	__func__.7988, 10
+__func__.7988:
 	.string	"buf_alloc"
-	.section	.rodata.__func__.7997,"a",@progbits
+	.section	.rodata.__func__.8002,"a",@progbits
 	.align	3
 	.set	.LANCHOR62,. + 0
-	.type	__func__.7997, %object
-	.size	__func__.7997, 16
-__func__.7997:
+	.type	__func__.8002, %object
+	.size	__func__.8002, 16
+__func__.8002:
 	.string	"buf_remove_free"
-	.section	.rodata.__func__.8018,"a",@progbits
+	.section	.rodata.__func__.8023,"a",@progbits
 	.align	3
 	.set	.LANCHOR212,. + 0
-	.type	__func__.8018, %object
-	.size	__func__.8018, 20
-__func__.8018:
+	.type	__func__.8023, %object
+	.size	__func__.8023, 20
+__func__.8023:
 	.string	"flash_info_blk_init"
-	.section	.rodata.__func__.8033,"a",@progbits
+	.section	.rodata.__func__.8038,"a",@progbits
 	.align	3
 	.set	.LANCHOR157,. + 0
-	.type	__func__.8033, %object
-	.size	__func__.8033, 21
-__func__.8033:
+	.type	__func__.8038, %object
+	.size	__func__.8038, 21
+__func__.8038:
 	.string	"flash_info_data_init"
-	.section	.rodata.__func__.8055,"a",@progbits
+	.section	.rodata.__func__.8060,"a",@progbits
 	.align	3
 	.set	.LANCHOR209,. + 0
-	.type	__func__.8055, %object
-	.size	__func__.8055, 17
-__func__.8055:
+	.type	__func__.8060, %object
+	.size	__func__.8060, 17
+__func__.8060:
 	.string	"flash_info_flush"
-	.section	.rodata.__func__.8131,"a",@progbits
+	.section	.rodata.__func__.8136,"a",@progbits
 	.align	3
 	.set	.LANCHOR150,. + 0
-	.type	__func__.8131, %object
-	.size	__func__.8131, 17
-__func__.8131:
+	.type	__func__.8136, %object
+	.size	__func__.8136, 17
+__func__.8136:
 	.string	"lpa_rebuild_hash"
-	.section	.rodata.__func__.8181,"a",@progbits
+	.section	.rodata.__func__.8186,"a",@progbits
 	.align	3
 	.set	.LANCHOR232,. + 0
-	.type	__func__.8181, %object
-	.size	__func__.8181, 17
-__func__.8181:
+	.type	__func__.8186, %object
+	.size	__func__.8186, 17
+__func__.8186:
 	.string	"ftl_write_commit"
-	.section	.rodata.__func__.8199,"a",@progbits
+	.section	.rodata.__func__.8204,"a",@progbits
 	.align	3
 	.set	.LANCHOR130,. + 0
-	.type	__func__.8199, %object
-	.size	__func__.8199, 14
-__func__.8199:
+	.type	__func__.8204, %object
+	.size	__func__.8204, 14
+__func__.8204:
 	.string	"ftl_write_buf"
-	.section	.rodata.__func__.8244,"a",@progbits
+	.section	.rodata.__func__.8249,"a",@progbits
 	.align	3
 	.set	.LANCHOR132,. + 0
-	.type	__func__.8244, %object
-	.size	__func__.8244, 18
-__func__.8244:
+	.type	__func__.8249, %object
+	.size	__func__.8249, 18
+__func__.8249:
 	.string	"zftl_add_read_buf"
-	.section	.rodata.__func__.8277,"a",@progbits
+	.section	.rodata.__func__.8282,"a",@progbits
 	.align	3
 	.set	.LANCHOR230,. + 0
-	.type	__func__.8277, %object
-	.size	__func__.8277, 10
-__func__.8277:
+	.type	__func__.8282, %object
+	.size	__func__.8282, 10
+__func__.8282:
 	.string	"zftl_read"
-	.section	.rodata.__func__.8308,"a",@progbits
+	.section	.rodata.__func__.8313,"a",@progbits
 	.align	3
 	.set	.LANCHOR242,. + 0
-	.type	__func__.8308, %object
-	.size	__func__.8308, 13
-__func__.8308:
+	.type	__func__.8313, %object
+	.size	__func__.8313, 13
+__func__.8313:
 	.string	"_ftl_discard"
-	.section	.rodata.__func__.8454,"a",@progbits
+	.section	.rodata.__func__.8459,"a",@progbits
 	.align	3
 	.set	.LANCHOR225,. + 0
-	.type	__func__.8454, %object
-	.size	__func__.8454, 12
-__func__.8454:
+	.type	__func__.8459, %object
+	.size	__func__.8459, 12
+__func__.8459:
 	.string	"gc_recovery"
-	.section	.rodata.__func__.8464,"a",@progbits
+	.section	.rodata.__func__.8469,"a",@progbits
 	.align	3
 	.set	.LANCHOR72,. + 0
-	.type	__func__.8464, %object
-	.size	__func__.8464, 12
-__func__.8464:
+	.type	__func__.8469, %object
+	.size	__func__.8469, 12
+__func__.8469:
 	.string	"gc_add_sblk"
-	.section	.rodata.__func__.8511,"a",@progbits
+	.section	.rodata.__func__.8516,"a",@progbits
 	.align	3
 	.set	.LANCHOR188,. + 0
-	.type	__func__.8511, %object
-	.size	__func__.8511, 21
-__func__.8511:
+	.type	__func__.8516, %object
+	.size	__func__.8516, 21
+__func__.8516:
 	.string	"gc_check_data_one_wl"
-	.section	.rodata.__func__.8543,"a",@progbits
+	.section	.rodata.__func__.8548,"a",@progbits
 	.align	3
 	.set	.LANCHOR226,. + 0
-	.type	__func__.8543, %object
-	.size	__func__.8543, 22
-__func__.8543:
+	.type	__func__.8548, %object
+	.size	__func__.8548, 22
+__func__.8548:
 	.string	"gc_update_l2p_map_new"
-	.section	.rodata.__func__.8556,"a",@progbits
+	.section	.rodata.__func__.8561,"a",@progbits
 	.align	3
 	.set	.LANCHOR78,. + 0
-	.type	__func__.8556, %object
-	.size	__func__.8556, 19
-__func__.8556:
+	.type	__func__.8561, %object
+	.size	__func__.8561, 19
+__func__.8561:
 	.string	"gc_write_completed"
-	.section	.rodata.__func__.8586,"a",@progbits
+	.section	.rodata.__func__.8591,"a",@progbits
 	.align	3
 	.set	.LANCHOR234,. + 0
-	.type	__func__.8586, %object
-	.size	__func__.8586, 16
-__func__.8586:
+	.type	__func__.8591, %object
+	.size	__func__.8591, 16
+__func__.8591:
 	.string	"gc_do_copy_back"
-	.section	.rodata.__func__.8613,"a",@progbits
+	.section	.rodata.__func__.8618,"a",@progbits
 	.align	3
 	.set	.LANCHOR127,. + 0
-	.type	__func__.8613, %object
-	.size	__func__.8613, 16
-__func__.8613:
+	.type	__func__.8618, %object
+	.size	__func__.8618, 16
+__func__.8618:
 	.string	"gc_free_src_blk"
-	.section	.rodata.__func__.8657,"a",@progbits
+	.section	.rodata.__func__.8662,"a",@progbits
 	.align	3
 	.set	.LANCHOR227,. + 0
-	.type	__func__.8657, %object
-	.size	__func__.8657, 16
-__func__.8657:
+	.type	__func__.8662, %object
+	.size	__func__.8662, 16
+__func__.8662:
 	.string	"gc_scan_src_blk"
-	.section	.rodata.__func__.8718,"a",@progbits
+	.section	.rodata.__func__.8723,"a",@progbits
 	.align	3
 	.set	.LANCHOR228,. + 0
-	.type	__func__.8718, %object
-	.size	__func__.8718, 20
-__func__.8718:
+	.type	__func__.8723, %object
+	.size	__func__.8723, 20
+__func__.8723:
 	.string	"gc_scan_static_data"
-	.section	.rodata.__func__.8785,"a",@progbits
+	.section	.rodata.__func__.8790,"a",@progbits
 	.align	3
 	.set	.LANCHOR237,. + 0
-	.type	__func__.8785, %object
-	.size	__func__.8785, 11
-__func__.8785:
+	.type	__func__.8790, %object
+	.size	__func__.8790, 11
+__func__.8790:
 	.string	"zftl_do_gc"
-	.section	.rodata.__func__.8880,"a",@progbits
+	.section	.rodata.__func__.8885,"a",@progbits
 	.align	3
 	.set	.LANCHOR5,. + 0
-	.type	__func__.8880, %object
-	.size	__func__.8880, 18
-__func__.8880:
+	.type	__func__.8885, %object
+	.size	__func__.8885, 18
+__func__.8885:
 	.string	"_list_remove_node"
-	.section	.rodata.__func__.8905,"a",@progbits
+	.section	.rodata.__func__.8910,"a",@progbits
 	.align	3
 	.set	.LANCHOR11,. + 0
-	.type	__func__.8905, %object
-	.size	__func__.8905, 23
-__func__.8905:
+	.type	__func__.8910, %object
+	.size	__func__.8910, 23
+__func__.8910:
 	.string	"_list_update_data_list"
-	.section	.rodata.__func__.8980,"a",@progbits
+	.section	.rodata.__func__.8985,"a",@progbits
 	.align	3
 	.set	.LANCHOR154,. + 0
-	.type	__func__.8980, %object
-	.size	__func__.8980, 20
-__func__.8980:
+	.type	__func__.8985, %object
+	.size	__func__.8985, 20
+__func__.8985:
 	.string	"zftl_sblk_list_init"
-	.section	.rodata.__func__.9014,"a",@progbits
+	.section	.rodata.__func__.9019,"a",@progbits
 	.align	3
 	.set	.LANCHOR196,. + 0
-	.type	__func__.9014, %object
-	.size	__func__.9014, 15
-__func__.9014:
+	.type	__func__.9019, %object
+	.size	__func__.9019, 15
+__func__.9019:
 	.string	"ftl_info_flush"
-	.section	.rodata.__func__.9046,"a",@progbits
+	.section	.rodata.__func__.9051,"a",@progbits
 	.align	3
 	.set	.LANCHOR135,. + 0
-	.type	__func__.9046, %object
-	.size	__func__.9046, 15
-__func__.9046:
+	.type	__func__.9051, %object
+	.size	__func__.9051, 15
+__func__.9051:
 	.string	"ftl_alloc_sblk"
-	.section	.rodata.__func__.9088,"a",@progbits
+	.section	.rodata.__func__.9093,"a",@progbits
 	.align	3
 	.set	.LANCHOR113,. + 0
-	.type	__func__.9088, %object
-	.size	__func__.9088, 18
-__func__.9088:
+	.type	__func__.9093, %object
+	.size	__func__.9093, 18
+__func__.9093:
 	.string	"ftl_alloc_sys_blk"
-	.section	.rodata.__func__.9098,"a",@progbits
+	.section	.rodata.__func__.9103,"a",@progbits
 	.align	3
 	.set	.LANCHOR114,. + 0
-	.type	__func__.9098, %object
-	.size	__func__.9098, 17
-__func__.9098:
+	.type	__func__.9103, %object
+	.size	__func__.9103, 17
+__func__.9103:
 	.string	"ftl_free_sys_blk"
-	.section	.rodata.__func__.9133,"a",@progbits
+	.section	.rodata.__func__.9138,"a",@progbits
 	.align	3
 	.set	.LANCHOR229,. + 0
-	.type	__func__.9133, %object
-	.size	__func__.9133, 14
-__func__.9133:
+	.type	__func__.9138, %object
+	.size	__func__.9138, 14
+__func__.9138:
 	.string	"ftl_sblk_dump"
-	.section	.rodata.__func__.9157,"a",@progbits
+	.section	.rodata.__func__.9162,"a",@progbits
 	.align	3
 	.set	.LANCHOR218,. + 0
-	.type	__func__.9157, %object
-	.size	__func__.9157, 16
-__func__.9157:
+	.type	__func__.9162, %object
+	.size	__func__.9162, 16
+__func__.9162:
 	.string	"ftl_sysblk_dump"
-	.section	.rodata.__func__.9182,"a",@progbits
+	.section	.rodata.__func__.9187,"a",@progbits
 	.align	3
 	.set	.LANCHOR219,. + 0
-	.type	__func__.9182, %object
-	.size	__func__.9182, 23
-__func__.9182:
+	.type	__func__.9187, %object
+	.size	__func__.9187, 23
+__func__.9187:
 	.string	"ftl_open_sblk_recovery"
-	.section	.rodata.__func__.9215,"a",@progbits
+	.section	.rodata.__func__.9220,"a",@progbits
 	.align	3
 	.set	.LANCHOR115,. + 0
-	.type	__func__.9215, %object
-	.size	__func__.9215, 23
-__func__.9215:
+	.type	__func__.9220, %object
+	.size	__func__.9220, 23
+__func__.9220:
 	.string	"ftl_get_ppa_from_index"
-	.section	.rodata.__func__.9236,"a",@progbits
+	.section	.rodata.__func__.9241,"a",@progbits
 	.align	3
 	.set	.LANCHOR231,. + 0
-	.type	__func__.9236, %object
-	.size	__func__.9236, 19
-__func__.9236:
+	.type	__func__.9241, %object
+	.size	__func__.9241, 19
+__func__.9241:
 	.string	"ftl_update_l2p_map"
-	.section	.rodata.__func__.9255,"a",@progbits
+	.section	.rodata.__func__.9260,"a",@progbits
 	.align	3
 	.set	.LANCHOR119,. + 0
-	.type	__func__.9255, %object
-	.size	__func__.9255, 22
-__func__.9255:
+	.type	__func__.9260, %object
+	.size	__func__.9260, 22
+__func__.9260:
 	.string	"ftl_get_new_free_page"
-	.section	.rodata.__func__.9266,"a",@progbits
+	.section	.rodata.__func__.9271,"a",@progbits
 	.align	3
 	.set	.LANCHOR120,. + 0
-	.type	__func__.9266, %object
-	.size	__func__.9266, 22
-__func__.9266:
+	.type	__func__.9271, %object
+	.size	__func__.9271, 22
+__func__.9271:
 	.string	"ftl_ext_alloc_new_blk"
-	.section	.rodata.__func__.9292,"a",@progbits
+	.section	.rodata.__func__.9297,"a",@progbits
 	.align	3
 	.set	.LANCHOR201,. + 0
-	.type	__func__.9292, %object
-	.size	__func__.9292, 19
-__func__.9292:
+	.type	__func__.9297, %object
+	.size	__func__.9297, 19
+__func__.9297:
 	.string	"ftl_ext_info_flush"
-	.section	.rodata.__func__.9304,"a",@progbits
+	.section	.rodata.__func__.9309,"a",@progbits
 	.align	3
 	.set	.LANCHOR202,. + 0
-	.type	__func__.9304, %object
-	.size	__func__.9304, 18
-__func__.9304:
+	.type	__func__.9309, %object
+	.size	__func__.9309, 18
+__func__.9309:
 	.string	"ftl_ext_info_init"
-	.section	.rodata.__func__.9343,"a",@progbits
+	.section	.rodata.__func__.9348,"a",@progbits
 	.align	3
 	.set	.LANCHOR203,. + 0
-	.type	__func__.9343, %object
-	.size	__func__.9343, 25
-__func__.9343:
+	.type	__func__.9348, %object
+	.size	__func__.9348, 25
+__func__.9348:
 	.string	"ftl_low_format_data_init"
-	.section	.rodata.__func__.9358,"a",@progbits
+	.section	.rodata.__func__.9363,"a",@progbits
 	.align	3
 	.set	.LANCHOR205,. + 0
-	.type	__func__.9358, %object
-	.size	__func__.9358, 15
-__func__.9358:
+	.type	__func__.9363, %object
+	.size	__func__.9363, 15
+__func__.9363:
 	.string	"ftl_low_format"
-	.section	.rodata.__func__.9406,"a",@progbits
+	.section	.rodata.__func__.9411,"a",@progbits
 	.align	3
 	.set	.LANCHOR192,. + 0
-	.type	__func__.9406, %object
-	.size	__func__.9406, 14
-__func__.9406:
+	.type	__func__.9411, %object
+	.size	__func__.9411, 14
+__func__.9411:
 	.string	"ftl_prog_page"
-	.section	.rodata.__func__.9529,"a",@progbits
+	.section	.rodata.__func__.9534,"a",@progbits
 	.align	3
 	.set	.LANCHOR183,. + 0
-	.type	__func__.9529, %object
-	.size	__func__.9529, 31
-__func__.9529:
+	.type	__func__.9534, %object
+	.size	__func__.9534, 31
+__func__.9534:
 	.string	"queue_wait_first_req_completed"
-	.section	.rodata.__func__.9583,"a",@progbits
+	.section	.rodata.__func__.9588,"a",@progbits
 	.align	3
 	.set	.LANCHOR184,. + 0
-	.type	__func__.9583, %object
-	.size	__func__.9583, 15
-__func__.9583:
+	.type	__func__.9588, %object
+	.size	__func__.9588, 15
+__func__.9588:
 	.string	"sblk_prog_page"
-	.section	.rodata.__func__.9610,"a",@progbits
+	.section	.rodata.__func__.9615,"a",@progbits
 	.align	3
 	.set	.LANCHOR187,. + 0
-	.type	__func__.9610, %object
-	.size	__func__.9610, 15
-__func__.9610:
+	.type	__func__.9615, %object
+	.size	__func__.9615, 15
+__func__.9615:
 	.string	"sblk_read_page"
-	.section	.rodata.__func__.9680,"a",@progbits
+	.section	.rodata.__func__.9685,"a",@progbits
 	.align	3
 	.set	.LANCHOR220,. + 0
-	.type	__func__.9680, %object
-	.size	__func__.9680, 16
-__func__.9680:
+	.type	__func__.9685, %object
+	.size	__func__.9685, 16
+__func__.9685:
 	.string	"load_l2p_region"
-	.section	.rodata.__func__.9696,"a",@progbits
+	.section	.rodata.__func__.9701,"a",@progbits
 	.align	3
 	.set	.LANCHOR156,. + 0
-	.type	__func__.9696, %object
-	.size	__func__.9696, 13
-__func__.9696:
+	.type	__func__.9701, %object
+	.size	__func__.9701, 13
+__func__.9701:
 	.string	"pm_free_sblk"
-	.section	.rodata.__func__.9720,"a",@progbits
+	.section	.rodata.__func__.9725,"a",@progbits
 	.align	3
 	.set	.LANCHOR222,. + 0
-	.type	__func__.9720, %object
-	.size	__func__.9720, 6
-__func__.9720:
+	.type	__func__.9725, %object
+	.size	__func__.9725, 6
+__func__.9725:
 	.string	"pm_gc"
-	.section	.rodata.__func__.9736,"a",@progbits
+	.section	.rodata.__func__.9741,"a",@progbits
 	.align	3
 	.set	.LANCHOR137,. + 0
-	.type	__func__.9736, %object
-	.size	__func__.9736, 17
-__func__.9736:
+	.type	__func__.9741, %object
+	.size	__func__.9741, 17
+__func__.9741:
 	.string	"pm_alloc_new_blk"
-	.section	.rodata.__func__.9746,"a",@progbits
+	.section	.rodata.__func__.9751,"a",@progbits
 	.align	3
 	.set	.LANCHOR206,. + 0
-	.type	__func__.9746, %object
-	.size	__func__.9746, 14
-__func__.9746:
+	.type	__func__.9751, %object
+	.size	__func__.9751, 14
+__func__.9751:
 	.string	"pm_write_page"
-	.section	.rodata.__func__.9764,"a",@progbits
+	.section	.rodata.__func__.9769,"a",@progbits
 	.align	3
 	.set	.LANCHOR140,. + 0
-	.type	__func__.9764, %object
-	.size	__func__.9764, 21
-__func__.9764:
+	.type	__func__.9769, %object
+	.size	__func__.9769, 21
+__func__.9769:
 	.string	"pm_select_ram_region"
 	.section	.rodata._list_remove_node.str1.1,"aMS",@progbits,1
 .LC0:
@@ -33140,7 +33244,7 @@ ymtc_3D_tlc_value:
 	.string	"swl_slc_free_mini_ec_blk alloc sblk %x\n"
 	.section	.rodata.zftl_init.str1.1,"aMS",@progbits,1
 .LC239:
-	.string	"FTL version: 6.0.23 20201118"
+	.string	"FTL version: 6.0.23 20201130"
 .LC240:
 	.string	"_c_user_data_density := %d\n"
 .LC241:

commit 32b04d78e7a80c4084f447b3bb02991ca61b3864
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed Dec 2 13:01:44 2020 +0800

    rockchip: rk3568: Modify fspi pins property
    
    Change-Id: Icc50a2087cde8a716b306e90ba4c3793883e684c
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c
index e1a1a2b15f..9e1a732f76 100644
--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
@@ -8,6 +8,7 @@
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/grf_rk3568.h>
+#include <asm/arch/rk_atags.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -19,6 +20,8 @@ DECLARE_GLOBAL_DATA_PTR;
 #define GRF_GPIO1C_DS_1		0x224
 #define GRF_GPIO1C_DS_2		0x228
 #define GRF_GPIO1C_DS_3		0x22c
+#define GRF_GPIO1D_DS_0		0x230
+#define GRF_GPIO1D_DS_1		0x234
 #define GRF_SOC_CON4		0x510
 #define EDP_PHY_GRF_BASE	0xfdcb0000
 #define EDP_PHY_GRF_CON0	(EDP_PHY_GRF_BASE + 0x00)
@@ -745,6 +748,15 @@ int arch_cpu_init(void)
 	writel(0x3f3f0707, GRF_BASE + GRF_GPIO1C_DS_2);
 	writel(0x3f3f0707, GRF_BASE + GRF_GPIO1C_DS_3);
 
+#ifndef CONFIG_TPL_BUILD
+	/* set the fspi d0 cs0 to level 1 */
+	if (get_bootdev_by_brom_bootsource() == BOOT_TYPE_SPI_NOR ||
+	    get_bootdev_by_brom_bootsource() == BOOT_TYPE_SPI_NAND) {
+		writel(0x3f000300, GRF_BASE + GRF_GPIO1D_DS_0);
+		writel(0x3f000300, GRF_BASE + GRF_GPIO1D_DS_1);
+	}
+#endif
+
 	/* Disable eDP phy by default */
 	writel(0x00070007, EDP_PHY_GRF_CON10);
 	writel(0x0ff10ff1, EDP_PHY_GRF_CON0);

commit 70d0725693be4015a4d3596c34c13dedd995d9e1
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Nov 27 22:16:04 2020 +0800

    rv1126: support pinctrl driver in spl
    
    So the sd iomux can be set in spl when the process is sd-boot.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I91873168e6af877c006bb477070a88f66bd1bb8d

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index 7f9ae8c191..761499c2f8 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -82,7 +82,7 @@ CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_SPL_DTB_MINIMUM=y
 CONFIG_OF_LIVE=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_OF_U_BOOT_REMOVE_PROPS="interrupt-parent"
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_REGMAP=y
@@ -132,6 +132,7 @@ CONFIG_DWC_ETH_QOS=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PHY_ROCKCHIP_NANENG_USB2=y
 CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
 CONFIG_POWER_FG_RK817=y
 CONFIG_IO_DOMAIN=y

commit 91fb3e0a6bcfcab3e382aa30695da1c6be5a862f
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Nov 27 22:14:40 2020 +0800

    rockchip: dts: rv1126: add sdmmc pinctrl node
    
    Add sdmmc pinctrl node so that the sdmmc io can be set when in
    sd-boot process. And delete some unused pinctrl node such as
    sfc and nandc.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I675262800dbfaeaf9beb9f7f1724faa6688bbf92

diff --git a/arch/arm/dts/rv1126-pinctrl.dtsi b/arch/arm/dts/rv1126-pinctrl.dtsi
index 67f7c742b8..2423dd9cde 100644
--- a/arch/arm/dts/rv1126-pinctrl.dtsi
+++ b/arch/arm/dts/rv1126-pinctrl.dtsi
@@ -1123,7 +1123,7 @@
 				<2 RK_PC5 2 &pcfg_pull_none>;
 		};
 	};
-	sdmmc0 {
+	sdmmc0: sdmmc0 {
 		sdmmc0_bus4: sdmmc0-bus4 {
 			rockchip,pins =
 				/* sdmmc0_d0 */
diff --git a/arch/arm/dts/rv1126-u-boot.dtsi b/arch/arm/dts/rv1126-u-boot.dtsi
index 01547feff6..fdc565964c 100644
--- a/arch/arm/dts/rv1126-u-boot.dtsi
+++ b/arch/arm/dts/rv1126-u-boot.dtsi
@@ -12,7 +12,7 @@
 
 	chosen {
 		stdout-path = &uart2;
-		u-boot,spl-boot-order = &spi_nand, &spi_nor, &nandc, &emmc;
+		u-boot,spl-boot-order = &sdmmc, &spi_nand, &spi_nor, &nandc, &emmc;
 	};
 
 	crypto: crypto@ff500000 {
@@ -39,8 +39,27 @@
 
 &sdmmc {
 	u-boot,dm-spl;
-	/delete-property/ pinctrl-names;
-	/delete-property/ pinctrl-0;
+	status = "okay";
+};
+
+&sdmmc0 {
+	u-boot,dm-spl;
+};
+
+&sdmmc0_bus4 {
+	u-boot,dm-spl;
+};
+
+&sdmmc0_clk {
+	u-boot,dm-spl;
+};
+
+&sdmmc0_cmd {
+	u-boot,dm-spl;
+};
+
+&sdmmc0_det {
+	u-boot,dm-spl;
 };
 
 &emmc {
@@ -85,6 +104,8 @@
 
 &sfc {
 	u-boot,dm-spl;
+	/delete-property/ pinctrl-names;
+	/delete-property/ pinctrl-0;
 	/delete-property/ assigned-clocks;
 	/delete-property/ assigned-clock-rates;
 	status = "okay";
@@ -113,6 +134,8 @@
 
 &nandc {
 	u-boot,dm-spl;
+	/delete-property/ pinctrl-names;
+	/delete-property/ pinctrl-0;
 	status = "okay";
 	#address-cells = <1>;
 	#size-cells = <0>;
@@ -157,10 +180,23 @@
 };
 
 &pinctrl {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 	status = "okay";
 };
 
+&gpio1 {
+	u-boot,dm-spl;
+	status = "okay";
+};
+
+&pcfg_pull_up_drv_level_2 {
+	u-boot,dm-spl;
+};
+
+&pcfg_pull_none {
+	u-boot,dm-spl;
+};
+
 &gpio3 {
 	u-boot,dm-pre-reloc;
 	status = "okay";

commit 84dc46da6af3ace6116f0f964ff14ba4e0bcd406
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Tue Sep 22 15:17:12 2020 +0800

    drivers: rknand: update nand flash drivers
    
    1. support samsung 14nm 8GB NAND FLASH.
    2. support ymtc 64L 32GB NAND FLASH.
    3. support toshiba 15nm 8GB NAND FLASH.
    4. support rk3568
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: I01c9eb698c1ae829e6a2858c2664d62cf0851ab7

diff --git a/drivers/rknand/rk_ftl_arm_v7.S b/drivers/rknand/rk_ftl_arm_v7.S
index 14a5efc101..9f469dac47 100644
--- a/drivers/rknand/rk_ftl_arm_v7.S
+++ b/drivers/rknand/rk_ftl_arm_v7.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2019-08-28
+ * date: 2020-09-23
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -61,14 +61,14 @@ flash_read_ecc:
 .L2:
 	.word	.LANCHOR0
 	.size	flash_read_ecc, .-flash_read_ecc
-	.section	.text.ftl_set_blk_mode.part.10,"ax",%progbits
+	.section	.text.ftl_set_blk_mode.part.11,"ax",%progbits
 	.align	1
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_set_blk_mode.part.10, %function
-ftl_set_blk_mode.part.10:
+	.type	ftl_set_blk_mode.part.11, %function
+ftl_set_blk_mode.part.11:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
@@ -86,7 +86,7 @@ ftl_set_blk_mode.part.10:
 	.align	2
 .L5:
 	.word	.LANCHOR1
-	.size	ftl_set_blk_mode.part.10, .-ftl_set_blk_mode.part.10
+	.size	ftl_set_blk_mode.part.11, .-ftl_set_blk_mode.part.11
 	.section	.text.FlashMemCmp8,"ax",%progbits
 	.align	1
 	.global	FlashMemCmp8
@@ -234,24 +234,29 @@ FlashBlockAlignInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	cmp	r0, #256
-	ldr	r3, .L47
+	cmp	r0, #512
+	ldr	r3, .L48
 	bls	.L43
-	mov	r2, #512
-.L46:
+	mov	r2, #1024
+.L47:
 	str	r2, [r3]
 	bx	lr
 .L43:
+	cmp	r0, #256
+	bls	.L45
+	mov	r2, #512
+	b	.L47
+.L45:
 	cmp	r0, #128
-	bhi	.L45
+	bhi	.L46
 	str	r0, [r3]
 	bx	lr
-.L45:
+.L46:
 	mov	r2, #256
-	b	.L46
-.L48:
+	b	.L47
+.L49:
 	.align	2
-.L47:
+.L48:
 	.word	.LANCHOR4
 	.size	FlashBlockAlignInit, .-FlashBlockAlignInit
 	.section	.text.FlashReadCmd,"ax",%progbits
@@ -266,30 +271,41 @@ FlashReadCmd:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+	ldr	r2, .L52
 	push	{r4, r5}
+	ldr	r4, .L52+4
+	ldr	r3, [r2, r0, lsl #3]
+	add	r2, r2, r0, lsl #3
+	ldr	r4, [r4]
+	ldrb	r2, [r2, #4]	@ zero_extendqisi2
+	ldrb	r4, [r4, #7]	@ zero_extendqisi2
+	lsls	r2, r2, #8
+	cmp	r4, #1
+	itt	eq
+	addeq	r4, r3, r2
+	moveq	r5, #38
+	add	r3, r3, r2
+	mov	r2, #0
+	it	eq
+	streq	r5, [r4, #2056]
+	str	r2, [r3, #2056]
+	str	r2, [r3, #2052]
+	str	r2, [r3, #2052]
+	uxtb	r2, r1
+	str	r2, [r3, #2052]
+	lsrs	r2, r1, #8
+	str	r2, [r3, #2052]
 	lsrs	r2, r1, #16
-	ldr	r4, .L50
-	ldr	r3, [r4, r0, lsl #3]
-	add	r4, r4, r0, lsl #3
-	ldrb	r4, [r4, #4]	@ zero_extendqisi2
-	add	r3, r3, r4, lsl #8
-	movs	r4, #0
-	str	r4, [r3, #2056]
-	str	r4, [r3, #2052]
-	str	r4, [r3, #2052]
-	uxtb	r4, r1
-	str	r4, [r3, #2052]
-	lsrs	r4, r1, #8
-	str	r4, [r3, #2052]
 	str	r2, [r3, #2052]
 	movs	r2, #48
 	str	r2, [r3, #2056]
 	pop	{r4, r5}
 	b	FlashSetRandomizer
-.L51:
+.L53:
 	.align	2
-.L50:
+.L52:
 	.word	.LANCHOR0
+	.word	.LANCHOR7
 	.size	FlashReadCmd, .-FlashReadCmd
 	.section	.text.FlashReadDpDataOutCmd,"ax",%progbits
 	.align	1
@@ -303,10 +319,10 @@ FlashReadDpDataOutCmd:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L56
+	ldr	r2, .L58
 	push	{r4, r5, r6}
 	uxtb	r6, r1
-	ldr	r4, .L56+4
+	ldr	r4, .L58+4
 	lsrs	r5, r1, #8
 	ldr	r3, [r2, r0, lsl #3]
 	add	r2, r2, r0, lsl #3
@@ -316,7 +332,7 @@ FlashReadDpDataOutCmd:
 	lsr	r4, r1, #16
 	lsl	r2, r2, #8
 	add	r3, r3, r2
-	bne	.L53
+	bne	.L55
 	movs	r2, #6
 	str	r2, [r3, #2056]
 	movs	r2, #0
@@ -325,12 +341,12 @@ FlashReadDpDataOutCmd:
 	str	r6, [r3, #2052]
 	str	r5, [r3, #2052]
 	str	r4, [r3, #2052]
-.L55:
+.L57:
 	movs	r2, #224
 	str	r2, [r3, #2056]
 	pop	{r4, r5, r6}
 	b	FlashSetRandomizer
-.L53:
+.L55:
 	movs	r2, #0
 	str	r2, [r3, #2056]
 	str	r2, [r3, #2052]
@@ -342,12 +358,12 @@ FlashReadDpDataOutCmd:
 	str	r4, [r3, #2056]
 	str	r2, [r3, #2052]
 	str	r2, [r3, #2052]
-	b	.L55
-.L57:
+	b	.L57
+.L59:
 	.align	2
-.L56:
+.L58:
 	.word	.LANCHOR0
-	.word	.LANCHOR7
+	.word	.LANCHOR8
 	.size	FlashReadDpDataOutCmd, .-FlashReadDpDataOutCmd
 	.section	.text.FlashProgFirstCmd,"ax",%progbits
 	.align	1
@@ -363,7 +379,7 @@ FlashProgFirstCmd:
 	@ link register save eliminated.
 	push	{r4, r5}
 	lsrs	r2, r1, #16
-	ldr	r4, .L59
+	ldr	r4, .L61
 	ldr	r3, [r4, r0, lsl #3]
 	add	r4, r4, r0, lsl #3
 	ldrb	r4, [r4, #4]	@ zero_extendqisi2
@@ -380,9 +396,9 @@ FlashProgFirstCmd:
 	str	r2, [r3, #2052]
 	pop	{r4, r5}
 	b	FlashSetRandomizer
-.L60:
+.L62:
 	.align	2
-.L59:
+.L61:
 	.word	.LANCHOR0
 	.size	FlashProgFirstCmd, .-FlashProgFirstCmd
 	.section	.text.FlashEraseCmd,"ax",%progbits
@@ -397,12 +413,12 @@ FlashEraseCmd:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
-	ldr	r4, .L66
+	ldr	r4, .L68
 	ldr	r3, [r4, r0, lsl #3]
 	add	r4, r4, r0, lsl #3
 	ldrb	r0, [r4, #4]	@ zero_extendqisi2
 	lsls	r0, r0, #8
-	cbz	r2, .L62
+	cbz	r2, .L64
 	adds	r2, r3, r0
 	movs	r4, #96
 	str	r4, [r2, #2056]
@@ -412,10 +428,10 @@ FlashEraseCmd:
 	str	r4, [r2, #2052]
 	lsrs	r4, r1, #16
 	str	r4, [r2, #2052]
-	ldr	r2, .L66+4
+	ldr	r2, .L68+4
 	ldr	r2, [r2]
 	add	r1, r1, r2
-.L62:
+.L64:
 	add	r3, r3, r0
 	movs	r2, #96
 	str	r2, [r3, #2056]
@@ -428,9 +444,9 @@ FlashEraseCmd:
 	str	r1, [r3, #2052]
 	str	r2, [r3, #2056]
 	pop	{r4, pc}
-.L67:
+.L69:
 	.align	2
-.L66:
+.L68:
 	.word	.LANCHOR0
 	.word	.LANCHOR4
 	.size	FlashEraseCmd, .-FlashEraseCmd
@@ -448,11 +464,11 @@ FlashProgDpSecondCmd:
 	@ link register save eliminated.
 	push	{r4, r5}
 	lsrs	r2, r1, #16
-	ldr	r4, .L69
+	ldr	r4, .L71
 	ldr	r3, [r4, r0, lsl #3]
 	add	r4, r4, r0, lsl #3
 	ldrb	r5, [r4, #4]	@ zero_extendqisi2
-	ldr	r4, .L69+4
+	ldr	r4, .L71+4
 	ldrb	r4, [r4, #11]	@ zero_extendqisi2
 	add	r3, r3, r5, lsl #8
 	str	r4, [r3, #2056]
@@ -466,11 +482,11 @@ FlashProgDpSecondCmd:
 	str	r2, [r3, #2052]
 	pop	{r4, r5}
 	b	FlashSetRandomizer
-.L70:
+.L72:
 	.align	2
-.L69:
+.L71:
 	.word	.LANCHOR0
-	.word	.LANCHOR7
+	.word	.LANCHOR8
 	.size	FlashProgDpSecondCmd, .-FlashProgDpSecondCmd
 	.section	.text.FlashProgSecondCmd,"ax",%progbits
 	.align	1
@@ -484,7 +500,7 @@ FlashProgSecondCmd:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L72
+	ldr	r3, .L74
 	ldr	r2, [r3, r0, lsl #3]
 	add	r3, r3, r0, lsl #3
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
@@ -492,9 +508,9 @@ FlashProgSecondCmd:
 	movs	r2, #16
 	str	r2, [r3, #2056]
 	bx	lr
-.L73:
+.L75:
 	.align	2
-.L72:
+.L74:
 	.word	.LANCHOR0
 	.size	FlashProgSecondCmd, .-FlashProgSecondCmd
 	.section	.text.FlashProgDpFirstCmd,"ax",%progbits
@@ -509,8 +525,8 @@ FlashProgDpFirstCmd:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L75
-	ldr	r1, .L75+4
+	ldr	r3, .L77
+	ldr	r1, .L77+4
 	ldr	r2, [r3, r0, lsl #3]
 	add	r3, r3, r0, lsl #3
 	ldrb	r1, [r1, #10]	@ zero_extendqisi2
@@ -518,11 +534,11 @@ FlashProgDpFirstCmd:
 	add	r3, r2, r3, lsl #8
 	str	r1, [r3, #2056]
 	bx	lr
-.L76:
+.L78:
 	.align	2
-.L75:
+.L77:
 	.word	.LANCHOR0
-	.word	.LANCHOR7
+	.word	.LANCHOR8
 	.size	FlashProgDpFirstCmd, .-FlashProgDpFirstCmd
 	.section	.text.FlashReadStatus,"ax",%progbits
 	.align	1
@@ -537,7 +553,7 @@ FlashReadStatus:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r2, #112
-	ldr	r3, .L78
+	ldr	r3, .L80
 	ldr	r5, [r3, r0, lsl #3]
 	add	r3, r3, r0, lsl #3
 	movs	r0, #80
@@ -549,9 +565,9 @@ FlashReadStatus:
 	bl	udelay
 	ldr	r0, [r5, r4]
 	pop	{r3, r4, r5, pc}
-.L79:
+.L81:
 	.align	2
-.L78:
+.L80:
 	.word	.LANCHOR0
 	.size	FlashReadStatus, .-FlashReadStatus
 	.section	.text.js_hash,"ax",%progbits
@@ -565,24 +581,24 @@ FlashReadStatus:
 js_hash:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L83
+	ldr	r3, .L85
 	add	r1, r1, r0
 	push	{r4, lr}
-.L81:
+.L83:
 	cmp	r0, r1
-	bne	.L82
+	bne	.L84
 	mov	r0, r3
 	pop	{r4, pc}
-.L82:
+.L84:
 	lsrs	r2, r3, #2
 	ldrb	r4, [r0], #1	@ zero_extendqisi2
 	add	r2, r2, r3, lsl #5
 	add	r2, r2, r4
 	eors	r3, r3, r2
-	b	.L81
-.L84:
+	b	.L83
+.L86:
 	.align	2
-.L83:
+.L85:
 	.word	1204201446
 	.size	js_hash, .-js_hash
 	.section	.text.FlashLoadIdbInfo,"ax",%progbits
@@ -627,54 +643,54 @@ ToshibaSetRRPara:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
 	add	r7, r1, r1, lsl #2
-	ldr	r10, .L95+12
+	ldr	r10, .L97+12
 	mov	r5, r0
 	mov	r6, r1
 	movs	r4, #0
-	ldr	r8, .L95+16
-.L88:
+	ldr	r8, .L97+16
+.L90:
 	ldrb	r3, [r10]	@ zero_extendqisi2
 	cmp	r4, r3
-	bcc	.L92
+	bcc	.L94
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L92:
+.L94:
 	movs	r3, #85
 	movs	r0, #200
 	str	r3, [r5, #8]
 	ldrsb	r3, [r4, r8]
 	str	r3, [r5, #4]
 	bl	udelay
-	ldr	r3, .L95
+	ldr	r3, .L97
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #34
-	bne	.L89
+	bne	.L91
 	adds	r3, r4, r7
 	add	r3, r3, r8
-.L94:
+.L96:
 	ldrsb	r3, [r3, #5]
-.L93:
+.L95:
 	str	r3, [r5]
 	adds	r4, r4, #1
-	b	.L88
-.L89:
+	b	.L90
+.L91:
 	cmp	r3, #35
-	bne	.L91
-	ldr	r3, .L95+4
+	bne	.L93
+	ldr	r3, .L97+4
 	adds	r2, r4, r7
 	add	r3, r3, r2
-	b	.L94
-.L91:
-	ldr	r3, .L95+8
+	b	.L96
+.L93:
+	ldr	r3, .L97+8
 	ldrsb	r3, [r3, r6]
-	b	.L93
-.L96:
+	b	.L95
+.L98:
 	.align	2
-.L95:
-	.word	.LANCHOR9
+.L97:
 	.word	.LANCHOR10
 	.word	.LANCHOR11
 	.word	.LANCHOR12
-	.word	.LANCHOR8
+	.word	.LANCHOR13
+	.word	.LANCHOR9
 	.size	ToshibaSetRRPara, .-ToshibaSetRRPara
 	.section	.text.SamsungSetRRPara,"ax",%progbits
 	.align	1
@@ -689,18 +705,18 @@ SamsungSetRRPara:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
 	mov	r6, r0
-	ldr	r7, .L100
+	ldr	r7, .L102
 	movs	r4, #0
 	mov	r10, #161
-	ldr	r8, .L100+4
+	ldr	r8, .L102+4
 	add	r1, r7, r1, lsl #2
 	adds	r5, r1, #3
-.L98:
+.L100:
 	ldrb	r3, [r8]	@ zero_extendqisi2
 	cmp	r4, r3
-	bcc	.L99
+	bcc	.L101
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L99:
+.L101:
 	movs	r3, #0
 	str	r10, [r6, #8]
 	str	r3, [r6]
@@ -711,12 +727,12 @@ SamsungSetRRPara:
 	ldrsb	r3, [r5, #1]!
 	str	r3, [r6]
 	bl	udelay
-	b	.L98
-.L101:
+	b	.L100
+.L103:
 	.align	2
-.L100:
+.L102:
+	.word	.LANCHOR14
 	.word	.LANCHOR13
-	.word	.LANCHOR12
 	.size	SamsungSetRRPara, .-SamsungSetRRPara
 	.global	__aeabi_uidiv
 	.global	__aeabi_uidivmod
@@ -733,17 +749,17 @@ LogAddr2PhyAddr:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r6, r3
-	ldr	r3, .L107
+	ldr	r3, .L109
 	mov	r8, r1
 	mov	r7, r2
 	mov	r5, r0
 	ldrh	r4, [r3, #14]
 	ldrh	r3, [r3, #12]
 	smulbb	r4, r4, r3
-	ldr	r3, .L107+4
+	ldr	r3, .L109+4
 	ldrh	fp, [r3]
 	uxth	r4, r4
-	ldr	r3, .L107+8
+	ldr	r3, .L109+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #1
 	ldr	r3, [r0, #4]
@@ -766,14 +782,14 @@ LogAddr2PhyAddr:
 	cmp	r8, #1
 	uxth	r1, r1
 	ubfx	r3, r3, #0, #10
-	bne	.L104
-	ldr	r2, .L107+12
+	bne	.L106
+	ldr	r2, .L109+12
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbnz	r2, .L104
-	ldr	r2, .L107+16
+	cbnz	r2, .L106
+	ldr	r2, .L109+16
 	ldrh	r3, [r2, r3, lsl #1]
-.L104:
-	ldr	r2, .L107+20
+.L106:
+	ldr	r2, .L109+20
 	ldr	r2, [r2, r10, lsl #2]
 	mla	r1, fp, r1, r2
 	add	r1, r1, r3
@@ -781,29 +797,29 @@ LogAddr2PhyAddr:
 	str	r1, [r7]
 	str	r10, [r6]
 	cmp	r3, #1
-	bls	.L106
+	bls	.L108
 	ldr	r0, [r5, #4]
 	ldr	r3, [r5, #40]
 	add	r0, r0, #1024
 	subs	r3, r0, r3
 	rsbs	r0, r3, #0
 	adcs	r0, r0, r3
-.L105:
+.L107:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L106:
-	movs	r0, #0
-	b	.L105
 .L108:
+	movs	r0, #0
+	b	.L107
+.L110:
 	.align	2
-.L107:
-	.word	.LANCHOR14
+.L109:
+	.word	.LANCHOR15
 	.word	.LANCHOR4
 	.word	.LANCHOR2
-	.word	.LANCHOR15
 	.word	.LANCHOR16
 	.word	.LANCHOR17
+	.word	.LANCHOR18
 	.size	LogAddr2PhyAddr, .-LogAddr2PhyAddr
 	.section	.text.FlashReadStatusEN,"ax",%progbits
 	.align	1
@@ -816,59 +832,59 @@ LogAddr2PhyAddr:
 FlashReadStatusEN:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L121
+	ldr	r3, .L123
 	push	{r4, r5, r6, lr}
 	ldr	r5, [r3, r0, lsl #3]
 	add	r3, r3, r0, lsl #3
 	ldrb	r4, [r3, #4]	@ zero_extendqisi2
-	ldr	r3, .L121+4
+	ldr	r3, .L123+4
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #8]	@ zero_extendqisi2
 	cmp	r3, #2
 	lsl	r3, r4, #8
 	add	r4, r4, #8
-	bne	.L110
-	ldr	r0, .L121+8
-	cbnz	r2, .L111
+	bne	.L112
+	ldr	r0, .L123+8
+	cbnz	r2, .L113
 	ldrb	r2, [r0, #13]	@ zero_extendqisi2
-.L120:
+.L122:
 	add	r3, r3, r5
 	str	r2, [r3, #2056]
 	ldrb	r0, [r0, #15]	@ zero_extendqisi2
-	cbz	r0, .L115
+	cbz	r0, .L117
 	add	r6, r5, r4, lsl #8
 	movs	r2, #0
-.L114:
+.L116:
 	cmp	r2, r0
-	bcc	.L116
-.L115:
+	bcc	.L118
+.L117:
 	lsls	r4, r4, #8
 	movs	r0, #80
 	bl	udelay
 	ldr	r0, [r5, r4]
 	uxtb	r0, r0
 	pop	{r4, r5, r6, pc}
-.L111:
+.L113:
 	ldrb	r2, [r0, #14]	@ zero_extendqisi2
-	b	.L120
-.L116:
+	b	.L122
+.L118:
 	lsls	r3, r2, #3
 	adds	r2, r2, #1
 	lsr	r3, r1, r3
 	uxtb	r3, r3
 	str	r3, [r6, #4]
-	b	.L114
-.L110:
+	b	.L116
+.L112:
 	add	r3, r3, r5
 	movs	r2, #112
 	str	r2, [r3, #2056]
-	b	.L115
-.L122:
+	b	.L117
+.L124:
 	.align	2
-.L121:
+.L123:
 	.word	.LANCHOR0
-	.word	.LANCHOR18
 	.word	.LANCHOR7
+	.word	.LANCHOR8
 	.size	FlashReadStatusEN, .-FlashReadStatusEN
 	.section	.text.FlashWaitReadyEN,"ax",%progbits
 	.align	1
@@ -885,16 +901,16 @@ FlashWaitReadyEN:
 	mov	r4, r0
 	mov	r5, r1
 	mov	r6, r2
-.L127:
+.L129:
 	mov	r2, r6
 	mov	r1, r5
 	mov	r0, r4
 	bl	FlashReadStatusEN
 	cmp	r0, #255
 	mov	r3, r0
-	beq	.L127
+	beq	.L129
 	lsls	r3, r3, #25
-	bpl	.L127
+	bpl	.L129
 	pop	{r4, r5, r6, pc}
 	.size	FlashWaitReadyEN, .-FlashWaitReadyEN
 	.section	.text.NandcReadDontCaseBusyEn,"ax",%progbits
@@ -923,16 +939,16 @@ NandcGetChipIf:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L132
+	ldr	r2, .L134
 	add	r3, r2, r0, lsl #3
 	ldr	r0, [r2, r0, lsl #3]
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	add	r0, r0, r3, lsl #8
 	bx	lr
-.L133:
+.L135:
 	.align	2
-.L132:
+.L134:
 	.word	.LANCHOR0
 	.size	NandcGetChipIf, .-NandcGetChipIf
 	.section	.text.NandcSetDdrPara,"ax",%progbits
@@ -947,16 +963,16 @@ NandcSetDdrPara:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L135
+	ldr	r3, .L137
 	ldr	r2, [r3]
 	lsls	r3, r0, #8
 	orr	r0, r3, r0, lsl #16
 	orr	r0, r0, #1
 	str	r0, [r2, #304]
 	bx	lr
-.L136:
+.L138:
 	.align	2
-.L135:
+.L137:
 	.word	.LANCHOR19
 	.size	NandcSetDdrPara, .-NandcSetDdrPara
 	.section	.text.NandcSetDdrDiv,"ax",%progbits
@@ -971,14 +987,14 @@ NandcSetDdrDiv:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L138
+	ldr	r3, .L140
 	orr	r0, r0, #16640
 	ldr	r3, [r3]
 	str	r0, [r3, #344]
 	bx	lr
-.L139:
+.L141:
 	.align	2
-.L138:
+.L140:
 	.word	.LANCHOR19
 	.size	NandcSetDdrDiv, .-NandcSetDdrDiv
 	.section	.text.NandcSetDdrMode,"ax",%progbits
@@ -993,20 +1009,20 @@ NandcSetDdrMode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L143
+	ldr	r3, .L145
 	ldr	r2, [r3]
 	ldr	r3, [r2]
-	cbnz	r0, .L141
+	cbnz	r0, .L143
 	bfi	r3, r0, #13, #1
-.L142:
+.L144:
 	str	r3, [r2]
 	bx	lr
-.L141:
+.L143:
 	orr	r3, r3, #253952
-	b	.L142
-.L144:
+	b	.L144
+.L146:
 	.align	2
-.L143:
+.L145:
 	.word	.LANCHOR19
 	.size	NandcSetDdrMode, .-NandcSetDdrMode
 	.section	.text.NandcSetMode,"ax",%progbits
@@ -1021,16 +1037,16 @@ NandcSetMode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L152
+	ldr	r3, .L154
 	ands	r1, r0, #6
 	ldr	r2, [r3]
 	ldr	r3, [r2]
-	beq	.L146
+	beq	.L148
 	lsls	r1, r0, #29
 	movw	r1, #16641
 	str	r1, [r2, #344]
 	orr	r3, r3, #24576
-	ldr	r1, .L152+4
+	ldr	r1, .L154+4
 	bfc	r3, #15, #1
 	orr	r3, r3, #196608
 	it	mi
@@ -1040,16 +1056,16 @@ NandcSetMode:
 	str	r1, [r2, #308]
 	movs	r1, #39
 	str	r1, [r2, #308]
-.L148:
+.L150:
 	str	r3, [r2]
 	movs	r0, #0
 	bx	lr
-.L146:
+.L148:
 	bfi	r3, r1, #13, #1
-	b	.L148
-.L153:
+	b	.L150
+.L155:
 	.align	2
-.L152:
+.L154:
 	.word	.LANCHOR19
 	.word	1710595
 	.size	NandcSetMode, .-NandcSetMode
@@ -1065,7 +1081,7 @@ NandcFlashCs:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L155
+	ldr	r3, .L157
 	movs	r2, #1
 	ldr	r1, [r3, r0, lsl #3]
 	add	r0, r3, r0, lsl #3
@@ -1075,9 +1091,9 @@ NandcFlashCs:
 	bfi	r3, r2, #0, #8
 	str	r3, [r1]
 	bx	lr
-.L156:
+.L158:
 	.align	2
-.L155:
+.L157:
 	.word	.LANCHOR0
 	.size	NandcFlashCs, .-NandcFlashCs
 	.section	.text.NandcFlashDeCs,"ax",%progbits
@@ -1092,16 +1108,16 @@ NandcFlashDeCs:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L158
+	ldr	r3, .L160
 	ldr	r2, [r3, r0, lsl #3]
 	ldr	r3, [r2]
 	bfc	r3, #0, #8
 	bfc	r3, #17, #1
 	str	r3, [r2]
 	bx	lr
-.L159:
+.L161:
 	.align	2
-.L158:
+.L160:
 	.word	.LANCHOR0
 	.size	NandcFlashDeCs, .-NandcFlashDeCs
 	.section	.text.HynixSetRRPara,"ax",%progbits
@@ -1117,23 +1133,23 @@ HynixSetRRPara:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r6, r3
-	ldr	r3, .L169
+	ldr	r3, .L171
 	mov	r5, r0
 	mov	r7, r1
 	mov	r10, r2
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	cmp	r3, #6
-	bne	.L161
+	bne	.L163
 	movs	r4, #20
 	add	r4, r4, r0, lsl #6
 	add	r3, r4, r6, lsl #2
-.L167:
-	ldr	r4, .L169+4
-.L168:
+.L169:
+	ldr	r4, .L171+4
+.L170:
 	add	r4, r4, r3
-.L162:
-	ldr	r3, .L169+8
+.L164:
+	ldr	r3, .L171+8
 	mov	r0, r5
 	subs	r7, r7, #1
 	subs	r4, r4, #1
@@ -1148,42 +1164,42 @@ HynixSetRRPara:
 	str	r3, [r0, #2056]
 	add	r3, r10, #-1
 	mov	r10, r0
-.L165:
+.L167:
 	cmp	r3, r7
-	bne	.L166
+	bne	.L168
 	movs	r3, #22
 	add	r8, r8, fp
 	str	r3, [r8, #2056]
 	mov	r0, r5
 	bl	NandcFlashDeCs
-	ldr	r3, .L169+12
+	ldr	r3, .L171+12
 	strb	r6, [r3, r5]
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L161:
+.L163:
 	cmp	r3, #7
-	bne	.L163
+	bne	.L165
 	movs	r4, #28
 	movs	r3, #160
 	smlabb	r3, r3, r0, r4
 	movs	r4, #10
 	smlabb	r3, r4, r6, r3
-	b	.L167
-.L163:
+	b	.L169
+.L165:
 	cmp	r3, #8
-	bne	.L164
+	bne	.L166
 	add	r4, r6, r6, lsl #2
-	ldr	r3, .L169+16
-	b	.L168
-.L164:
+	ldr	r3, .L171+16
+	b	.L170
+.L166:
 	adds	r4, r6, #2
 	add	r3, r4, r0, lsl #3
-	ldr	r4, .L169+4
+	ldr	r4, .L171+4
 	add	r4, r4, r3, lsl #3
 	adds	r4, r4, #4
-	b	.L162
-.L166:
+	b	.L164
+.L168:
 	ldrb	r2, [r3, #1]!	@ zero_extendqisi2
 	movs	r0, #200
 	str	r2, [r10, #2052]
@@ -1192,11 +1208,11 @@ HynixSetRRPara:
 	ldrsb	r2, [r4, #1]!
 	ldr	r3, [sp, #4]
 	str	r2, [r10, #2048]
-	b	.L165
-.L170:
+	b	.L167
+.L172:
 	.align	2
-.L169:
-	.word	.LANCHOR18
+.L171:
+	.word	.LANCHOR7
 	.word	.LANCHOR20
 	.word	.LANCHOR0
 	.word	.LANCHOR21
@@ -1213,36 +1229,36 @@ HynixSetRRPara:
 FlashSetReadRetryDefault:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L177
+	ldr	r3, .L179
 	push	{r4, r5, r6, lr}
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	cmp	r3, #7
-	bhi	.L171
-	ldr	r5, .L177+4
+	bhi	.L173
+	ldr	r5, .L179+4
 	movs	r4, #0
 	adds	r6, r5, #4
-.L174:
-	ldr	r3, .L177+8
+.L176:
+	ldr	r3, .L179+8
 	uxtb	r0, r4
 	ldrb	r3, [r3, r4, lsl #3]	@ zero_extendqisi2
 	cmp	r3, #173
-	bne	.L173
+	bne	.L175
 	movs	r3, #0
 	mov	r2, r6
 	ldrb	r1, [r5, #1]	@ zero_extendqisi2
 	bl	HynixSetRRPara
-.L173:
+.L175:
 	adds	r4, r4, #1
 	cmp	r4, #4
-	bne	.L174
-.L171:
+	bne	.L176
+.L173:
 	pop	{r4, r5, r6, pc}
-.L178:
+.L180:
 	.align	2
-.L177:
-	.word	.LANCHOR18
+.L179:
+	.word	.LANCHOR7
 	.word	.LANCHOR20
 	.word	.LANCHOR22
 	.size	FlashSetReadRetryDefault, .-FlashSetReadRetryDefault
@@ -1257,17 +1273,17 @@ FlashSetReadRetryDefault:
 FlashWaitCmdDone:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L186
+	ldr	r2, .L188
 	lsls	r3, r0, #4
 	push	{r4, r5, r6, lr}
 	mov	r6, r0
 	adds	r4, r2, r3
 	ldr	r1, [r4, #8]
-	cbz	r1, .L181
+	cbz	r1, .L183
 	ldrb	r5, [r2, r3]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	NandcFlashCs
-	ldr	r3, .L186+4
+	ldr	r3, .L188+4
 	mov	r0, r5
 	ldr	r1, [r4, #4]
 	ldr	r2, [r3, r6, lsl #2]
@@ -1284,17 +1300,17 @@ FlashWaitCmdDone:
 	str	r1, [r3]
 	movs	r3, #0
 	str	r3, [r4, #8]
-	cbz	r2, .L181
+	cbz	r2, .L183
 	str	r1, [r2]
 	str	r3, [r4, #12]
-.L181:
+.L183:
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L187:
+.L189:
 	.align	2
-.L186:
+.L188:
 	.word	.LANCHOR23
-	.word	.LANCHOR17
+	.word	.LANCHOR18
 	.size	FlashWaitCmdDone, .-FlashWaitCmdDone
 	.section	.text.NandcDelayns,"ax",%progbits
 	.align	1
@@ -1323,31 +1339,31 @@ NandcDelayns:
 NandcWaitFlashReadyNoDelay:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L194
+	ldr	r3, .L196
 	push	{r0, r1, r2, r4, r5, lr}
-	ldr	r4, .L194+4
+	ldr	r4, .L196+4
 	ldr	r5, [r3, r0, lsl #3]
-.L191:
+.L193:
 	ldr	r3, [r5]
 	str	r3, [sp, #4]
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #22
-	bmi	.L192
+	bmi	.L194
 	movs	r0, #10
 	bl	udelay
 	subs	r4, r4, #1
-	bne	.L191
+	bne	.L193
 	mov	r0, #-1
-.L189:
+.L191:
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, pc}
-.L192:
+.L194:
 	movs	r0, #0
-	b	.L189
-.L195:
+	b	.L191
+.L197:
 	.align	2
-.L194:
+.L196:
 	.word	.LANCHOR0
 	.word	100000
 	.size	NandcWaitFlashReadyNoDelay, .-NandcWaitFlashReadyNoDelay
@@ -1363,32 +1379,32 @@ NandcWaitFlashReady:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r4, r5, lr}
-	ldr	r3, .L201
-	ldr	r4, .L201+4
+	ldr	r3, .L203
+	ldr	r4, .L203+4
 	ldr	r5, [r3, r0, lsl #3]
-	movs	r0, #150
+	movs	r0, #130
 	bl	udelay
-.L198:
+.L200:
 	ldr	r3, [r5]
 	str	r3, [sp, #4]
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #22
-	bmi	.L199
+	bmi	.L201
 	movs	r0, #10
 	bl	udelay
 	subs	r4, r4, #1
-	bne	.L198
+	bne	.L200
 	mov	r0, #-1
-.L196:
+.L198:
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, pc}
-.L199:
+.L201:
 	movs	r0, #0
-	b	.L196
-.L202:
+	b	.L198
+.L204:
 	.align	2
-.L201:
+.L203:
 	.word	.LANCHOR0
 	.word	100000
 	.size	NandcWaitFlashReady, .-NandcWaitFlashReady
@@ -1403,7 +1419,7 @@ NandcWaitFlashReady:
 FlashReset:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L204
+	ldr	r3, .L206
 	push	{r4, r5, r6, lr}
 	mov	r4, r0
 	ldr	r5, [r3, r0, lsl #3]
@@ -1418,9 +1434,9 @@ FlashReset:
 	mov	r0, r4
 	pop	{r4, r5, r6, lr}
 	b	NandcFlashDeCs
-.L205:
+.L207:
 	.align	2
-.L204:
+.L206:
 	.word	.LANCHOR0
 	.size	FlashReset, .-FlashReset
 	.section	.text.flash_enter_slc_mode,"ax",%progbits
@@ -1434,22 +1450,27 @@ FlashReset:
 flash_enter_slc_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
+	push	{r3, r4, r5, r6, r7, lr}
 	mov	r5, r0
-	ldr	r3, .L208
+	ldr	r3, .L214
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L206
+	cbz	r3, .L208
 	bl	NandcFlashCs
-	ldr	r3, .L208+4
-	movs	r0, #100
-	ldr	r4, [r3, r5, lsl #3]
+	ldr	r3, .L214+4
+	ldr	r6, [r3, r5, lsl #3]
 	add	r3, r3, r5, lsl #3
-	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-	add	r4, r4, r3, lsl #8
+	ldrb	r7, [r3, #4]	@ zero_extendqisi2
+	ldr	r3, .L214+8
+	ldrb	r3, [r3, r5, lsl #3]	@ zero_extendqisi2
+	lsls	r7, r7, #8
+	cmp	r3, #44
+	bne	.L210
+	adds	r4, r6, r7
 	movs	r3, #239
 	str	r3, [r4, #2056]
 	movs	r3, #145
 	str	r3, [r4, #2052]
+	movs	r0, #50
 	bl	udelay
 	movs	r3, #0
 	movs	r2, #1
@@ -1459,20 +1480,26 @@ flash_enter_slc_mode:
 	str	r3, [r4, #2048]
 	str	r3, [r4, #2048]
 	bl	udelay
+.L210:
 	mov	r0, r5
+	add	r6, r6, r7
 	bl	NandcWaitFlashReadyNoDelay
 	movs	r3, #218
 	mov	r0, r5
-	str	r3, [r4, #2056]
-	pop	{r3, r4, r5, lr}
-	b	NandcWaitFlashReady
-.L206:
-	pop	{r3, r4, r5, pc}
-.L209:
-	.align	2
+	str	r3, [r6, #2056]
+	bl	NandcWaitFlashReady
+	ldr	r3, .L214+12
+	movs	r2, #2
+	strb	r2, [r3]
 .L208:
-	.word	.LANCHOR15
+	pop	{r3, r4, r5, r6, r7, pc}
+.L215:
+	.align	2
+.L214:
+	.word	.LANCHOR16
 	.word	.LANCHOR0
+	.word	.LANCHOR22
+	.word	.LANCHOR24
 	.size	flash_enter_slc_mode, .-flash_enter_slc_mode
 	.section	.text.flash_exit_slc_mode,"ax",%progbits
 	.align	1
@@ -1485,22 +1512,27 @@ flash_enter_slc_mode:
 flash_exit_slc_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
+	push	{r3, r4, r5, r6, r7, lr}
 	mov	r5, r0
-	ldr	r3, .L212
+	ldr	r3, .L222
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L210
+	cbz	r3, .L216
 	bl	NandcFlashCs
-	ldr	r3, .L212+4
-	movs	r0, #100
-	ldr	r4, [r3, r5, lsl #3]
+	ldr	r3, .L222+4
+	ldr	r6, [r3, r5, lsl #3]
 	add	r3, r3, r5, lsl #3
-	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-	add	r4, r4, r3, lsl #8
+	ldrb	r7, [r3, #4]	@ zero_extendqisi2
+	ldr	r3, .L222+8
+	ldrb	r3, [r3, r5, lsl #3]	@ zero_extendqisi2
+	lsls	r7, r7, #8
+	cmp	r3, #44
+	bne	.L218
+	adds	r4, r6, r7
 	movs	r3, #239
 	str	r3, [r4, #2056]
 	movs	r3, #145
 	str	r3, [r4, #2052]
+	movs	r0, #50
 	bl	udelay
 	movs	r3, #2
 	movs	r0, #100
@@ -1511,20 +1543,26 @@ flash_exit_slc_mode:
 	str	r3, [r4, #2048]
 	str	r3, [r4, #2048]
 	bl	udelay
+.L218:
 	mov	r0, r5
+	add	r6, r6, r7
 	bl	NandcWaitFlashReadyNoDelay
 	movs	r3, #223
 	mov	r0, r5
-	str	r3, [r4, #2056]
-	pop	{r3, r4, r5, lr}
-	b	NandcWaitFlashReady
-.L210:
-	pop	{r3, r4, r5, pc}
-.L213:
+	str	r3, [r6, #2056]
+	bl	NandcWaitFlashReady
+	ldr	r3, .L222+12
+	movs	r2, #0
+	strb	r2, [r3]
+.L216:
+	pop	{r3, r4, r5, r6, r7, pc}
+.L223:
 	.align	2
-.L212:
-	.word	.LANCHOR15
+.L222:
+	.word	.LANCHOR16
 	.word	.LANCHOR0
+	.word	.LANCHOR22
+	.word	.LANCHOR24
 	.size	flash_exit_slc_mode, .-flash_exit_slc_mode
 	.section	.text.FlashEraseBlock,"ax",%progbits
 	.align	1
@@ -1570,7 +1608,7 @@ FlashEraseBlock:
 FlashSetInterfaceMode:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L243
+	ldr	r3, .L253
 	mov	ip, #128
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r5, #0
@@ -1584,36 +1622,36 @@ FlashSetInterfaceMode:
 	str	r2, [sp, #4]
 	mov	r2, r5
 	str	r3, [sp]
-.L225:
-	ldr	r3, .L243+4
+.L235:
+	ldr	r3, .L253+4
 	ldrb	r4, [r5, r3]	@ zero_extendqisi2
 	cmp	r4, #152
-	beq	.L216
+	beq	.L226
 	cmp	r4, #69
-	beq	.L216
+	beq	.L226
 	cmp	r4, #173
-	beq	.L216
+	beq	.L226
 	cmp	r4, #44
-	bne	.L217
-.L216:
-	ldr	r3, .L243+8
+	bne	.L227
+.L226:
+	ldr	r3, .L253+8
 	cmp	r0, #1
 	ldr	r1, [r5, r3]
 	add	r3, r3, r5
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-	bne	.L218
+	bne	.L228
 	ldr	r6, [sp]
-	cbz	r6, .L217
+	cbz	r6, .L227
 	lsls	r3, r3, #8
 	cmp	r4, #173
 	add	fp, r1, r3
 	str	r7, [fp, #2056]
-	bne	.L219
+	bne	.L229
 	str	r0, [fp, #2052]
-.L242:
+.L252:
 	str	r2, [fp, #2048]
-	b	.L223
-.L219:
+	b	.L233
+.L229:
 	cmp	r4, #44
 	ittet	eq
 	moveq	r4, #5
@@ -1622,46 +1660,46 @@ FlashSetInterfaceMode:
 	streq	r4, [fp, #2048]
 	it	ne
 	strne	r0, [fp, #2048]
-.L223:
+.L233:
 	add	r3, r3, r1
 	str	r2, [r3, #2048]
 	str	r2, [r3, #2048]
 	str	r2, [r3, #2048]
-.L217:
+.L227:
 	adds	r5, r5, #8
 	cmp	r5, #32
-	bne	.L225
+	bne	.L235
 	movs	r0, #0
 	bl	NandcWaitFlashReady
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L218:
+.L228:
 	ldr	r6, [sp, #4]
 	cmp	r6, #0
-	beq	.L217
+	beq	.L227
 	lsls	r3, r3, #8
 	cmp	r4, #173
 	add	fp, r1, r3
 	str	r7, [fp, #2056]
-	bne	.L222
+	bne	.L232
 	str	lr, [fp, #2052]
 	str	r10, [fp, #2048]
-	b	.L223
-.L222:
+	b	.L233
+.L232:
 	cmp	r4, #44
-	bne	.L224
+	bne	.L234
 	str	lr, [fp, #2052]
 	str	r8, [fp, #2048]
-	b	.L223
-.L224:
+	b	.L233
+.L234:
 	str	ip, [fp, #2052]
-	b	.L242
-.L244:
+	b	.L252
+.L254:
 	.align	2
-.L243:
-	.word	.LANCHOR24
+.L253:
+	.word	.LANCHOR25
 	.word	.LANCHOR22
 	.word	.LANCHOR0
 	.size	FlashSetInterfaceMode, .-FlashSetInterfaceMode
@@ -1685,21 +1723,21 @@ SandiskSetRRPara:
 	str	r3, [r0, #4]
 	movs	r0, #200
 	bl	udelay
-	ldr	r3, .L251
+	ldr	r3, .L261
 	add	r4, r4, r4, lsl #2
-	ldr	r6, .L251+4
+	ldr	r6, .L261+4
 	movs	r2, #0
-	ldr	r7, .L251+8
+	ldr	r7, .L261+8
 	ldrb	r1, [r3]	@ zero_extendqisi2
-	ldr	r3, .L251+12
+	ldr	r3, .L261+12
 	ldrb	r0, [r3]	@ zero_extendqisi2
-.L246:
+.L256:
 	cmp	r2, r1
-	bcc	.L249
+	bcc	.L259
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, lr}
 	b	NandcWaitFlashReady
-.L249:
+.L259:
 	adds	r3, r2, r4
 	cmp	r0, #67
 	ite	eq
@@ -1708,14 +1746,14 @@ SandiskSetRRPara:
 	ldrsb	r3, [r3, #5]
 	adds	r2, r2, #1
 	str	r3, [r5]
-	b	.L246
-.L252:
+	b	.L256
+.L262:
 	.align	2
-.L251:
-	.word	.LANCHOR12
-	.word	.LANCHOR10
-	.word	.LANCHOR8
+.L261:
+	.word	.LANCHOR13
+	.word	.LANCHOR11
 	.word	.LANCHOR9
+	.word	.LANCHOR10
 	.size	SandiskSetRRPara, .-SandiskSetRRPara
 	.section	.text.micron_auto_read_calibration_config,"ax",%progbits
 	.align	1
@@ -1732,7 +1770,7 @@ micron_auto_read_calibration_config:
 	mov	r5, r0
 	mov	r6, r1
 	bl	NandcWaitFlashReady
-	ldr	r0, .L254
+	ldr	r0, .L264
 	ldr	r4, [r0, r5, lsl #3]
 	add	r0, r0, r5, lsl #3
 	ldrb	r3, [r0, #4]	@ zero_extendqisi2
@@ -1749,9 +1787,9 @@ micron_auto_read_calibration_config:
 	str	r3, [r4, #2048]
 	str	r3, [r4, #2048]
 	pop	{r4, r5, r6, pc}
-.L255:
+.L265:
 	.align	2
-.L254:
+.L264:
 	.word	.LANCHOR0
 	.size	micron_auto_read_calibration_config, .-micron_auto_read_calibration_config
 	.section	.text.FlashEraseSLc2KBlocks,"ax",%progbits
@@ -1767,19 +1805,19 @@ FlashEraseSLc2KBlocks:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, lr}
 	mov	r7, r1
-	ldr	r8, .L266+12
+	ldr	r8, .L276+12
 	sub	sp, sp, #20
 	mov	r5, r0
 	movs	r6, #0
-	ldr	r10, .L266+16
-.L257:
+	ldr	r10, .L276+16
+.L267:
 	cmp	r6, r7
-	bne	.L262
+	bne	.L272
 	movs	r0, #0
 	add	sp, sp, #20
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L262:
+.L272:
 	subs	r3, r7, r6
 	add	r2, sp, #8
 	uxtb	r3, r3
@@ -1791,17 +1829,17 @@ FlashEraseSLc2KBlocks:
 	ldr	r3, [sp, #12]
 	ldrb	r2, [r8]	@ zero_extendqisi2
 	cmp	r2, r3
-	bhi	.L258
+	bhi	.L268
 	mov	r3, #-1
 	str	r3, [r5]
-.L259:
+.L269:
 	adds	r6, r6, #1
 	adds	r5, r5, #36
-	b	.L257
-.L258:
+	b	.L267
+.L268:
 	ldrb	r4, [r10, r3]	@ zero_extendqisi2
 	lsls	r3, r3, #4
-	ldr	r2, .L266
+	ldr	r2, .L276
 	mov	r0, r4
 	strb	r4, [r2, r3]
 	bl	NandcWaitFlashReady
@@ -1816,7 +1854,7 @@ FlashEraseSLc2KBlocks:
 	ldr	r1, [sp, #8]
 	mov	r0, r4
 	bl	FlashReadStatus
-	ldr	r3, .L266+4
+	ldr	r3, .L276+4
 	sbfx	r0, r0, #0, #1
 	str	r0, [r5]
 	movs	r2, #0
@@ -1836,22 +1874,22 @@ FlashEraseSLc2KBlocks:
 	strmi	r3, [r5]
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	bne	.L261
+	bne	.L271
 	ldr	r1, [sp, #8]
-	ldr	r0, .L266+8
+	ldr	r0, .L276+8
 	bl	printf
-.L261:
+.L271:
 	mov	r0, r4
 	bl	NandcFlashDeCs
-	b	.L259
-.L267:
+	b	.L269
+.L277:
 	.align	2
-.L266:
+.L276:
 	.word	.LANCHOR23
 	.word	.LANCHOR4
 	.word	.LC1
-	.word	.LANCHOR25
 	.word	.LANCHOR26
+	.word	.LANCHOR27
 	.size	FlashEraseSLc2KBlocks, .-FlashEraseSLc2KBlocks
 	.section	.text.FlashEraseBlocks,"ax",%progbits
 	.align	1
@@ -1864,41 +1902,36 @@ FlashEraseSLc2KBlocks:
 FlashEraseBlocks:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L299
+	ldr	r3, .L305
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r8, r0
 	sub	sp, sp, #24
 	mov	fp, r1
 	mov	r7, r2
 	ldrb	r4, [r3]	@ zero_extendqisi2
-	cbnz	r4, .L269
-	ldr	r10, .L299+8
-.L270:
+	cbnz	r4, .L279
+	ldr	r10, .L305+8
+.L280:
 	cmp	r4, r7
-	bcc	.L279
-	ldr	r5, .L299+4
+	bcc	.L289
+	ldr	r5, .L305+4
 	movs	r4, #0
-	ldr	r6, .L299+8
-.L280:
-	ldr	r3, .L299+12
+	ldr	r6, .L305+8
+.L290:
+	ldr	r3, .L305+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r4, r3
-	bcc	.L282
-	ldr	r3, .L299+16
-	ldr	r3, [r3]
-	cmp	r3, #0
-	bne	.L283
-.L284:
+	bcc	.L292
 	movs	r0, #0
-	b	.L268
-.L269:
+	b	.L278
+.L279:
 	mov	r1, r2
 	bl	FlashEraseSLc2KBlocks
-.L268:
+.L278:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L279:
+.L289:
 	movs	r5, #36
 	add	r2, sp, #16
 	muls	r5, r4, r5
@@ -1911,29 +1944,29 @@ FlashEraseBlocks:
 	str	r3, [sp]
 	add	r3, sp, #20
 	bl	LogAddr2PhyAddr
-	ldr	r3, .L299+12
+	ldr	r3, .L305+12
 	mov	r6, r0
 	ldr	r0, [sp, #20]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r0
-	bhi	.L272
+	bhi	.L282
 	mov	r3, #-1
 	str	r3, [r8, r5]
-.L273:
+.L283:
 	adds	r4, r4, #1
-	b	.L270
-.L272:
-	ldr	r3, .L299+20
+	b	.L280
+.L282:
+	ldr	r3, .L305+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
 	add	r3, r10, r0, lsl #4
 	it	eq
 	moveq	r6, #0
 	ldr	r3, [r3, #8]
-	cbz	r3, .L275
+	cbz	r3, .L285
 	uxtb	r0, r0
 	bl	FlashWaitCmdDone
-.L275:
+.L285:
 	ldr	r1, [sp, #20]
 	ldr	r0, [sp, #12]
 	lsls	r2, r1, #4
@@ -1943,25 +1976,25 @@ FlashEraseBlocks:
 	str	r0, [r3, #12]
 	ldr	r0, [sp, #16]
 	str	r0, [r3, #4]
-	cbz	r6, .L276
+	cbz	r6, .L286
 	adds	r5, r5, #36
 	add	r5, r5, r8
 	str	r5, [r3, #12]
-.L276:
-	ldr	r3, .L299+24
+.L286:
+	ldr	r3, .L305+20
 	ldrb	r5, [r3, r1]	@ zero_extendqisi2
 	mov	r0, r5
 	strb	r5, [r10, r2]
 	bl	NandcFlashCs
 	cmp	fp, #1
 	mov	r0, r5
-	bne	.L277
-	ldr	r3, .L299+4
+	bne	.L287
+	ldr	r3, .L305+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L277
+	cbz	r3, .L287
 	bl	flash_enter_slc_mode
-.L278:
-	ldr	r3, .L299+28
+.L288:
+	ldr	r3, .L305+24
 	mov	r0, r5
 	ldr	r2, [sp, #20]
 	add	r4, r4, r6
@@ -1977,50 +2010,33 @@ FlashEraseBlocks:
 	bl	FlashEraseCmd
 	mov	r0, r5
 	bl	NandcFlashDeCs
-	b	.L273
-.L277:
+	b	.L283
+.L287:
 	bl	flash_exit_slc_mode
-	b	.L278
-.L282:
+	b	.L288
+.L292:
 	uxtb	r0, r4
 	bl	FlashWaitCmdDone
 	cmp	fp, #1
-	bne	.L281
+	bne	.L291
 	ldrb	r3, [r5]	@ zero_extendqisi2
-	cbz	r3, .L281
+	cbz	r3, .L291
 	lsls	r3, r4, #4
 	ldrb	r0, [r6, r3]	@ zero_extendqisi2
 	bl	flash_exit_slc_mode
-.L281:
+.L291:
 	adds	r4, r4, #1
-	b	.L280
-.L283:
-	ldr	r3, .L299+32
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #69
-	bne	.L284
-	movs	r3, #0
-	movs	r2, #36
-	mov	r1, r3
-.L285:
-	cmp	r3, r7
-	beq	.L284
-	mul	r0, r2, r3
-	adds	r3, r3, #1
-	str	r1, [r8, r0]
-	b	.L285
-.L300:
+	b	.L290
+.L306:
 	.align	2
-.L299:
+.L305:
 	.word	.LANCHOR2
-	.word	.LANCHOR15
+	.word	.LANCHOR16
 	.word	.LANCHOR23
-	.word	.LANCHOR25
+	.word	.LANCHOR26
 	.word	.LANCHOR28
 	.word	.LANCHOR27
-	.word	.LANCHOR26
-	.word	.LANCHOR17
-	.word	.LANCHOR22
+	.word	.LANCHOR18
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
 	.section	.text.FlashReadDpCmd,"ax",%progbits
 	.align	1
@@ -2033,113 +2049,131 @@ FlashEraseBlocks:
 FlashReadDpCmd:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	mov	r5, r2
-	ldr	r3, .L305
-	mov	r6, r1
-	uxtb	lr, r1
-	mov	r7, r0
-	lsrs	r1, r1, #8
-	uxtb	r8, r5
-	ldr	r10, [r3, r0, lsl #3]
+	ldr	r3, .L313
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r8, r1
+	ldr	lr, .L313+8
+	uxtb	fp, r2
+	lsr	r10, r2, #8
+	lsrs	r5, r2, #16
+	ldr	r4, [r3, r0, lsl #3]
 	add	r3, r3, r0, lsl #3
-	ldrb	r4, [r3, #4]	@ zero_extendqisi2
-	ldr	r3, .L305+4
-	ldrb	r2, [r3, #16]	@ zero_extendqisi2
-	lsls	r4, r4, #8
-	ldrb	ip, [r3, #8]	@ zero_extendqisi2
-	add	r4, r4, r10
-	ldrb	r3, [r3, #9]	@ zero_extendqisi2
+	ldr	r2, [lr]
+	mov	r7, r0
+	ldrb	r6, [r3, #4]	@ zero_extendqisi2
+	uxtb	ip, r8
+	ldr	r3, .L313+4
+	lsr	r0, r8, #8
+	ldrb	r2, [r2, #7]	@ zero_extendqisi2
+	ldrb	r1, [r3, #16]	@ zero_extendqisi2
+	lsls	r6, r6, #8
+	cmp	r1, #1
+	lsr	r1, r8, #16
+	bne	.L308
 	cmp	r2, #1
-	lsr	r2, r6, #16
-	str	ip, [r4, #2056]
-	bne	.L302
-	mov	r10, #0
-	str	r10, [r4, #2052]
-	str	r10, [r4, #2052]
-	str	lr, [r4, #2052]
+	ittt	eq
+	addeq	r2, r4, r6
+	moveq	lr, #38
+	streq	lr, [r2, #2056]
+	add	r4, r4, r6
+	ldrb	r2, [r3, #8]	@ zero_extendqisi2
+	movs	r6, #0
+	str	r2, [r4, #2056]
+	ldrb	r3, [r3, #9]	@ zero_extendqisi2
+	str	r6, [r4, #2052]
+	str	r6, [r4, #2052]
+	str	ip, [r4, #2052]
+	str	r0, [r4, #2052]
+	mov	r0, r7
 	str	r1, [r4, #2052]
-	str	r2, [r4, #2052]
 	str	r3, [r4, #2056]
 	bl	NandcWaitFlashReady
-	str	r10, [r4, #2056]
-	str	r10, [r4, #2052]
-	str	r10, [r4, #2052]
-.L304:
-	lsrs	r3, r5, #8
-	lsrs	r5, r5, #16
-	str	r8, [r4, #2052]
-	str	r3, [r4, #2052]
+	str	r6, [r4, #2056]
+	str	r6, [r4, #2052]
+	str	r6, [r4, #2052]
+.L312:
 	movs	r3, #48
+	str	fp, [r4, #2052]
+	mov	r1, r8
+	str	r10, [r4, #2052]
+	mov	r0, r7
 	str	r5, [r4, #2052]
-	mov	r1, r6
 	str	r3, [r4, #2056]
-	mov	r0, r7
-	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
 	b	FlashSetRandomizer
-.L302:
-	str	lr, [r4, #2052]
+.L308:
+	cmp	r2, #1
+	ittt	eq
+	addeq	r2, r4, r6
+	moveq	lr, #38
+	streq	lr, [r2, #2056]
+	add	r4, r4, r6
+	ldrb	r2, [r3, #8]	@ zero_extendqisi2
+	str	r2, [r4, #2056]
+	ldrb	r3, [r3, #9]	@ zero_extendqisi2
+	str	ip, [r4, #2052]
+	str	r0, [r4, #2052]
 	str	r1, [r4, #2052]
-	str	r2, [r4, #2052]
 	str	r3, [r4, #2056]
-	b	.L304
-.L306:
+	b	.L312
+.L314:
 	.align	2
-.L305:
+.L313:
 	.word	.LANCHOR0
+	.word	.LANCHOR8
 	.word	.LANCHOR7
 	.size	FlashReadDpCmd, .-FlashReadDpCmd
-	.section	.text.FlashDeInit,"ax",%progbits
+	.section	.text.ftl_flash_de_init,"ax",%progbits
 	.align	1
-	.global	FlashDeInit
+	.global	ftl_flash_de_init
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashDeInit, %function
-FlashDeInit:
+	.type	ftl_flash_de_init, %function
+ftl_flash_de_init:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
 	movs	r0, #0
 	bl	NandcWaitFlashReady
 	bl	FlashSetReadRetryDefault
-	ldr	r3, .L317
+	ldr	r3, .L325
 	ldr	r0, [r3]
-	cbz	r0, .L308
+	cbz	r0, .L316
 	movs	r0, #0
 	bl	flash_enter_slc_mode
-.L309:
-	ldr	r4, .L317+4
+.L317:
+	ldr	r4, .L325+4
 	ldrb	r3, [r4]	@ zero_extendqisi2
-	cbz	r3, .L310
-	ldr	r3, .L317+8
+	cbz	r3, .L318
+	ldr	r3, .L325+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	lsls	r3, r3, #31
-	bpl	.L310
+	bpl	.L318
 	movs	r0, #1
 	bl	FlashSetInterfaceMode
 	movs	r0, #1
 	bl	NandcSetMode
 	movs	r3, #0
 	strb	r3, [r4]
-.L310:
-	ldr	r3, .L317+12
+.L318:
+	ldr	r3, .L325+12
 	movs	r0, #0
 	ldr	r3, [r3]
 	str	r0, [r3, #336]
 	pop	{r4, pc}
-.L308:
+.L316:
 	bl	flash_exit_slc_mode
-	b	.L309
-.L318:
+	b	.L317
+.L326:
 	.align	2
-.L317:
+.L325:
 	.word	.LANCHOR29
 	.word	.LANCHOR30
-	.word	.LANCHOR24
+	.word	.LANCHOR25
 	.word	.LANCHOR0
-	.size	FlashDeInit, .-FlashDeInit
+	.size	ftl_flash_de_init, .-ftl_flash_de_init
 	.section	.text.NandcRandmzSel,"ax",%progbits
 	.align	1
 	.global	NandcRandmzSel
@@ -2152,13 +2186,13 @@ NandcRandmzSel:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L320
+	ldr	r3, .L328
 	ldr	r3, [r3, r0, lsl #3]
 	str	r1, [r3, #336]
 	bx	lr
-.L321:
+.L329:
 	.align	2
-.L320:
+.L328:
 	.word	.LANCHOR0
 	.size	NandcRandmzSel, .-NandcRandmzSel
 	.section	.text.NandcTimeCfg,"ax",%progbits
@@ -2173,23 +2207,23 @@ NandcTimeCfg:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L327
+	ldr	r3, .L335
 	cmp	r0, #35
 	ldr	r3, [r3]
-	bhi	.L323
+	bhi	.L331
 	movw	r2, #4193
-.L326:
+.L334:
 	str	r2, [r3, #4]
 	bx	lr
-.L323:
+.L331:
 	cmp	r0, #99
 	ite	hi
 	movwhi	r2, #8322
 	movwls	r2, #4225
-	b	.L326
-.L328:
+	b	.L334
+.L336:
 	.align	2
-.L327:
+.L335:
 	.word	.LANCHOR19
 	.size	NandcTimeCfg, .-NandcTimeCfg
 	.section	.text.FlashTimingCfg,"ax",%progbits
@@ -2204,12 +2238,12 @@ FlashTimingCfg:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L330
+	ldr	r3, .L338
 	ldrb	r0, [r3, #21]	@ zero_extendqisi2
 	b	NandcTimeCfg
-.L331:
+.L339:
 	.align	2
-.L330:
+.L338:
 	.word	.LANCHOR31
 	.size	FlashTimingCfg, .-FlashTimingCfg
 	.section	.text.NandcBchSel,"ax",%progbits
@@ -2223,7 +2257,7 @@ FlashTimingCfg:
 NandcBchSel:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L340
+	ldr	r3, .L348
 	movs	r1, #0
 	push	{r4, lr}
 	movs	r4, #16
@@ -2231,32 +2265,32 @@ NandcBchSel:
 	ldr	r2, [r3]
 	mov	r3, #1
 	str	r3, [r2, #8]
-	ldr	r3, .L340+4
+	ldr	r3, .L348+4
 	str	r0, [r3]
 	mov	r3, r1
 	bfi	r3, r4, #8, #8
 	bfi	r3, r1, #18, #1
-	bne	.L333
-.L336:
+	bne	.L341
+.L344:
 	bfc	r3, #4, #1
-.L334:
+.L342:
 	orr	r3, r3, #1
 	str	r3, [r2, #12]
 	pop	{r4, pc}
-.L333:
+.L341:
 	cmp	r0, #24
-	bne	.L335
+	bne	.L343
 	orr	r3, r3, #16
-	b	.L334
-.L335:
+	b	.L342
+.L343:
 	cmp	r0, #40
 	orr	r3, r3, #262144
 	orr	r3, r3, #16
-	bne	.L334
-	b	.L336
-.L341:
+	bne	.L342
+	b	.L344
+.L349:
 	.align	2
-.L340:
+.L348:
 	.word	.LANCHOR19
 	.word	.LANCHOR32
 	.size	NandcBchSel, .-NandcBchSel
@@ -2272,57 +2306,29 @@ FlashBchSel:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L343
+	ldr	r3, .L351
 	strb	r0, [r3]
 	b	NandcBchSel
-.L344:
+.L352:
 	.align	2
-.L343:
+.L351:
 	.word	.LANCHOR33
 	.size	FlashBchSel, .-FlashBchSel
-	.section	.text.NandCIrqEnable,"ax",%progbits
-	.align	1
-	.global	NandCIrqEnable
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	NandCIrqEnable, %function
-NandCIrqEnable:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	bx	lr
-	.size	NandCIrqEnable, .-NandCIrqEnable
-	.section	.text.NandCIrqDisable,"ax",%progbits
+	.section	.text.ftl_nandc_get_irq_status,"ax",%progbits
 	.align	1
-	.global	NandCIrqDisable
+	.global	ftl_nandc_get_irq_status
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	NandCIrqDisable, %function
-NandCIrqDisable:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	bx	lr
-	.size	NandCIrqDisable, .-NandCIrqDisable
-	.section	.text.rk_nandc_get_irq_status,"ax",%progbits
-	.align	1
-	.global	rk_nandc_get_irq_status
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	rk_nandc_get_irq_status, %function
-rk_nandc_get_irq_status:
+	.type	ftl_nandc_get_irq_status, %function
+ftl_nandc_get_irq_status:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	ldr	r0, [r0, #372]
 	bx	lr
-	.size	rk_nandc_get_irq_status, .-rk_nandc_get_irq_status
+	.size	ftl_nandc_get_irq_status, .-ftl_nandc_get_irq_status
 	.section	.text.rk_nandc_flash_ready,"ax",%progbits
 	.align	1
 	.global	rk_nandc_flash_ready
@@ -2379,7 +2385,7 @@ NandcSendDumpDataStart:
 	@ link register save eliminated.
 	ldr	r2, [r0, #16]
 	sub	sp, sp, #8
-	ldr	r3, .L352
+	ldr	r3, .L358
 	str	r2, [sp, #4]
 	ldr	r2, [sp, #4]
 	bfc	r2, #2, #1
@@ -2392,9 +2398,9 @@ NandcSendDumpDataStart:
 	add	sp, sp, #8
 	@ sp needed
 	bx	lr
-.L353:
+.L359:
 	.align	2
-.L352:
+.L358:
 	.word	538969130
 	.size	NandcSendDumpDataStart, .-NandcSendDumpDataStart
 	.section	.text.NandcSendDumpDataDone,"ax",%progbits
@@ -2410,12 +2416,12 @@ NandcSendDumpDataDone:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	sub	sp, sp, #8
-.L355:
+.L361:
 	ldr	r3, [r0, #8]
 	str	r3, [sp, #4]
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #11
-	bpl	.L355
+	bpl	.L361
 	add	sp, sp, #8
 	@ sp needed
 	bx	lr
@@ -2438,12 +2444,12 @@ NandcXferStart:
 	str	r2, [sp, #4]
 	ldr	fp, [sp, #56]
 	cmp	r1, #0
-	bne	.L372
+	bne	.L378
 	adds	r5, fp, #0
 	it	ne
 	movne	r5, #1
-.L359:
-	ldr	r1, .L377
+.L365:
+	ldr	r1, .L383
 	movs	r4, #0
 	ldr	r6, [r1, r0, lsl #3]
 	add	r1, r1, r0, lsl #3
@@ -2461,29 +2467,29 @@ NandcXferStart:
 	orr	r4, r4, #536870912
 	orr	r4, r4, #1024
 	bfi	r4, r3, #4, #1
-	ldr	r3, .L377+4
+	ldr	r3, .L383+4
 	ldr	r3, [r3]
 	cmp	r3, #3
-	bls	.L360
+	bls	.L366
 	ldr	r3, [r6, #16]
 	str	r3, [sp, #20]
 	ldr	r3, [sp, #20]
 	bfc	r3, #2, #1
 	str	r3, [sp, #20]
 	cmp	r5, #0
-	beq	.L361
-	ldr	r5, .L377+8
+	beq	.L367
+	ldr	r5, .L383+8
 	cmp	r7, #0
-	bne	.L362
-.L370:
+	bne	.L368
+.L376:
 	ldr	r2, [sp, #4]
 	adds	r2, r2, #1
 	asrs	r2, r2, #1
 	bfi	r4, r2, #22, #6
 	cmp	fp, #0
-	beq	.L363
+	beq	.L369
 	mov	r0, fp
-.L364:
+.L370:
 	ldr	r3, [r5, #4]
 	add	r1, r0, #63
 	ubfx	r10, r4, #22, #5
@@ -2534,10 +2540,10 @@ NandcXferStart:
 	ldr	r3, [sp, #20]
 	orr	r3, r3, #1
 	str	r3, [sp, #20]
-.L361:
+.L367:
 	ldr	r3, [sp, #20]
 	str	r3, [r6, #16]
-.L360:
+.L366:
 	str	r8, [r6, #12]
 	str	r4, [r6, #8]
 	orr	r4, r4, #4
@@ -2545,11 +2551,11 @@ NandcXferStart:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L372:
+.L378:
 	movs	r5, #1
-	b	.L359
-.L362:
-	ldr	r3, .L377+12
+	b	.L365
+.L368:
+	ldr	r3, .L383+12
 	movs	r1, #0
 	ldr	lr, [r5, #4]
 	mov	r0, r1
@@ -2563,34 +2569,34 @@ NandcXferStart:
 	lsrs	r3, r3, #1
 	str	r3, [sp, #12]
 	ldr	r3, [sp, #60]
-.L366:
+.L372:
 	ldr	r2, [sp, #12]
 	cmp	r0, r2
-	bcs	.L370
+	bcs	.L376
 	ldr	r2, [sp, #60]
 	bic	r10, r1, #3
-	cbz	r2, .L367
+	cbz	r2, .L373
 	ldrh	ip, [r3]
 	adds	r3, r3, #4
 	ldrh	r2, [r3, #-2]
 	orr	ip, ip, r2, lsl #16
 	str	ip, [lr, r10]
-.L368:
+.L374:
 	ldr	r2, [sp, #8]
 	adds	r0, r0, #1
 	add	r1, r1, r2
-	b	.L366
-.L367:
+	b	.L372
+.L373:
 	mov	r2, #-1
 	str	r2, [lr, r10]
-	b	.L368
-.L363:
-	ldr	r3, .L377+8
+	b	.L374
+.L369:
+	ldr	r3, .L383+8
 	ldr	r0, [r3]
-	b	.L364
-.L378:
+	b	.L370
+.L384:
 	.align	2
-.L377:
+.L383:
 	.word	.LANCHOR0
 	.word	.LANCHOR34
 	.word	.LANCHOR35
@@ -2607,75 +2613,75 @@ NandcXferStart:
 NandcXferComp:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L407
+	ldr	r3, .L413
 	push	{r0, r1, r4, lr}
 	ldr	r1, [r3, r0, lsl #3]
-	ldr	r3, .L407+4
+	ldr	r3, .L413+4
 	ldr	r0, [r3]
 	cmp	r0, #3
-	bls	.L400
+	bls	.L406
 	ldr	r3, [r1, #16]
 	lsls	r2, r3, #29
-	bpl	.L400
+	bpl	.L406
 	ldr	r3, [r1, #16]
 	tst	r3, #2
 	ldr	r3, [r1, #8]
 	str	r3, [sp]
-	beq	.L387
-.L383:
+	beq	.L393
+.L389:
 	ldr	r2, [r1, #28]
 	ldr	r3, [sp]
 	ubfx	r2, r2, #16, #5
 	ubfx	r3, r3, #22, #6
 	cmp	r2, r3
-	bge	.L384
+	bge	.L390
 	cmp	r0, #5
-	bls	.L383
+	bls	.L389
 	ldr	r3, [r1]
 	str	r3, [sp, #4]
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #18
-	bpl	.L383
+	bpl	.L389
 	ldr	r3, [sp, #4]
 	lsls	r4, r3, #14
-	bpl	.L383
-.L384:
-	ldr	r3, .L407+8
+	bpl	.L389
+.L390:
+	ldr	r3, .L413+8
 	movs	r2, #0
 	str	r2, [r3, #24]
-.L379:
+.L385:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, pc}
-.L388:
+.L394:
 	ldr	r3, [r1, #8]
 	str	r3, [sp]
-.L387:
+.L393:
 	ldr	r3, [sp]
 	lsls	r2, r3, #11
-	bpl	.L388
-	ldr	r4, .L407+12
+	bpl	.L394
+	ldr	r4, .L413+12
 	ldr	r2, [r4]
-	cbz	r2, .L389
+	cbz	r2, .L395
 	mov	r0, r1
 	bl	NandcSendDumpDataStart
-.L389:
+.L395:
 	ldr	r3, [r4]
 	cmp	r3, #0
-	beq	.L384
+	beq	.L390
 	mov	r0, r1
 	bl	NandcSendDumpDataDone
-	b	.L384
-.L400:
+	b	.L390
+.L406:
 	ldr	r3, [r1, #8]
 	str	r3, [sp]
 	ldr	r3, [sp]
 	lsls	r3, r3, #11
-	bpl	.L400
-	b	.L379
-.L408:
+	bpl	.L406
+	b	.L385
+.L414:
 	.align	2
-.L407:
+.L413:
 	.word	.LANCHOR0
 	.word	.LANCHOR34
 	.word	.LANCHOR35
@@ -2695,17 +2701,17 @@ Ftl_log2:
 	@ link register save eliminated.
 	movs	r1, #0
 	movs	r2, #1
-.L410:
+.L416:
 	cmp	r2, r0
 	uxth	r3, r1
 	add	r1, r1, #1
-	bls	.L411
+	bls	.L417
 	subs	r0, r3, #1
 	uxth	r0, r0
 	bx	lr
-.L411:
+.L417:
 	lsls	r2, r2, #1
-	b	.L410
+	b	.L416
 	.size	Ftl_log2, .-Ftl_log2
 	.section	.text.FtlPrintInfo,"ax",%progbits
 	.align	1
@@ -2733,31 +2739,31 @@ FtlSysBlkNumInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L414
+	ldr	r3, .L420
 	cmp	r0, #24
 	it	cc
 	movcc	r0, #24
-	ldr	r2, .L414+4
+	ldr	r2, .L420+4
 	str	r0, [r3]
-	ldr	r3, .L414+8
+	ldr	r3, .L420+8
 	ldrh	r3, [r3]
 	muls	r3, r0, r3
 	str	r3, [r2]
-	ldr	r2, .L414+12
+	ldr	r2, .L420+12
 	ldrh	r2, [r2]
 	subs	r0, r2, r0
-	ldr	r2, .L414+16
+	ldr	r2, .L420+16
 	strh	r0, [r2]	@ movhi
 	movs	r0, #0
-	ldr	r2, .L414+20
+	ldr	r2, .L420+20
 	ldr	r2, [r2]
 	subs	r3, r2, r3
-	ldr	r2, .L414+24
+	ldr	r2, .L420+24
 	str	r3, [r2]
 	bx	lr
-.L415:
+.L421:
 	.align	2
-.L414:
+.L420:
 	.word	.LANCHOR37
 	.word	.LANCHOR39
 	.word	.LANCHOR38
@@ -2782,30 +2788,30 @@ FtlConstantsInit:
 	mov	r10, r0
 	ldrh	r7, [r0, #8]
 	sub	sp, sp, #24
-	ldr	r3, .L443
+	ldr	r3, .L449
 	ldrh	r2, [r0, #10]
 	ldrh	r6, [r0, #14]
 	strh	r7, [r3]	@ movhi
 	ldrh	r3, [r0, #12]
-	ldr	r0, .L443+4
-	ldr	r1, .L443+8
-	ldr	r4, .L443+12
+	ldr	r0, .L449+4
+	ldr	r1, .L449+8
+	ldr	r4, .L449+12
 	strh	r6, [r0]	@ movhi
 	str	r0, [sp, #20]
-	ldr	r0, .L443+16
+	ldr	r0, .L449+16
 	strh	r3, [r1]	@ movhi
 	movs	r1, #0
 	strh	r2, [r4]	@ movhi
 	str	r4, [sp, #8]
-.L417:
+.L423:
 	strb	r1, [r1, r0]
 	adds	r1, r1, #1
 	cmp	r1, #32
-	bne	.L417
+	bne	.L423
 	ldrh	r0, [r10, #14]
 	ldrh	r1, [r10, #20]
 	cmp	r1, r0, lsr #8
-	bcs	.L418
+	bcs	.L424
 	uxtb	r8, r3
 	lsl	r1, r8, #1
 	uxtb	r1, r1
@@ -2814,22 +2820,22 @@ FtlConstantsInit:
 	muls	r1, r3, r1
 	str	r1, [sp, #12]
 	movs	r1, #0
-.L419:
+.L425:
 	cmp	r1, r3
-	bcs	.L421
+	bcs	.L427
 	ldr	r4, [sp, #12]
 	sub	fp, r1, r3
 	uxtb	r0, r1
 	adds	r5, r1, r4
-	ldr	r4, .L443+16
+	ldr	r4, .L449+16
 	add	r4, r4, r5
 	movs	r5, #0
 	mov	lr, r4
-	ldr	r4, .L443+16
+	ldr	r4, .L449+16
 	mov	ip, r5
 	add	fp, fp, r4
-	b	.L422
-.L420:
+	b	.L428
+.L426:
 	add	r4, r8, r0
 	strb	r0, [fp, r5]
 	str	r4, [sp, #16]
@@ -2839,47 +2845,47 @@ FtlConstantsInit:
 	ldr	r4, [sp, #4]
 	add	r0, r0, r4
 	uxtb	r0, r0
-.L422:
+.L428:
 	cmp	ip, r2
 	add	r5, r5, r3
-	bcc	.L420
+	bcc	.L426
 	adds	r1, r1, #1
-	b	.L419
-.L421:
+	b	.L425
+.L427:
 	ldr	r1, [sp, #8]
 	lsls	r2, r2, #1
 	lsrs	r6, r6, #1
 	strh	r2, [r1]	@ movhi
-	ldr	r2, .L443+4
+	ldr	r2, .L449+4
 	strh	r6, [r2]	@ movhi
-.L418:
-	ldr	r1, .L443+20
+.L424:
+	ldr	r1, .L449+20
 	movs	r2, #5
 	cmp	r7, #1
 	mov	r0, #0
 	strh	r2, [r1]	@ movhi
-	ldr	r2, .L443+24
+	ldr	r2, .L449+24
 	it	eq
 	strheq	r7, [r1]	@ movhi
-	ldr	r1, .L443+28
+	ldr	r1, .L449+28
 	strh	r0, [r2]	@ movhi
 	mov	r0, #4352
 	strh	r0, [r1]	@ movhi
-	ldr	r0, .L443+32
+	ldr	r0, .L449+32
 	ldrb	r0, [r0]	@ zero_extendqisi2
 	str	r0, [sp, #4]
-	cbz	r0, .L424
+	cbz	r0, .L430
 	mov	r0, #384
 	strh	r0, [r1]	@ movhi
-.L424:
+.L430:
 	str	r2, [sp, #16]
 	ldr	r2, [sp, #8]
-	ldr	r1, .L443+36
+	ldr	r1, .L449+36
 	ldrh	r6, [r10, #16]
 	ldrh	r5, [r2]
 	ldr	r2, [sp, #20]
-	ldr	fp, .L443+116
-	ldr	r8, .L443+120
+	ldr	fp, .L449+116
+	ldr	r8, .L449+120
 	smulbb	r5, r5, r3
 	ldrh	r4, [r2]
 	strh	r6, [fp]	@ movhi
@@ -2887,13 +2893,13 @@ FtlConstantsInit:
 	smulbb	r3, r3, r4
 	strh	r5, [r1]	@ movhi
 	smulbb	r0, r5, r6
-	ldr	r1, .L443+40
+	ldr	r1, .L449+40
 	strh	r3, [r1]	@ movhi
 	ldrh	r1, [r10, #18]
-	ldr	r3, .L443+44
+	ldr	r3, .L449+44
 	str	r1, [sp, #12]
 	strh	r1, [r3]	@ movhi
-	ldr	r3, .L443+48
+	ldr	r3, .L449+48
 	strh	r0, [r3]	@ movhi
 	ldrh	r3, [r10, #20]
 	mov	r0, r3
@@ -2902,9 +2908,9 @@ FtlConstantsInit:
 	bl	Ftl_log2
 	ldr	r3, [sp, #8]
 	mov	r7, r0
-	ldr	ip, .L443+124
+	ldr	ip, .L449+124
 	cmp	r4, #1024
-	ldr	lr, .L443+128
+	ldr	lr, .L449+128
 	ldr	r2, [sp, #16]
 	strh	r0, [ip]	@ movhi
 	lsl	r0, r3, #9
@@ -2912,15 +2918,15 @@ FtlConstantsInit:
 	uxth	r0, r0
 	strh	r0, [lr]	@ movhi
 	lsr	r0, r0, #8
-	ldr	lr, .L443+132
+	ldr	lr, .L449+132
 	mul	r1, r3, r1
 	strh	r0, [lr]	@ movhi
 	ldrh	lr, [r10, #26]
 	mov	r10, ip
-	ldr	r0, .L443+52
+	ldr	r0, .L449+52
 	strh	lr, [r0]	@ movhi
 	mul	lr, r4, r5
-	ldr	r0, .L443+56
+	ldr	r0, .L449+56
 	str	lr, [r0]
 	itt	hi
 	uxtbhi	r0, r4
@@ -2930,16 +2936,16 @@ FtlConstantsInit:
 	muls	r2, r5, r2
 	muls	r2, r3, r2
 	muls	r6, r2, r6
-	ldr	r2, .L443+60
+	ldr	r2, .L449+60
 	asrs	r6, r6, #11
 	str	r6, [r2]
-	ldr	r6, .L443+28
+	ldr	r6, .L449+28
 	ldrh	r0, [r6]
 	lsls	r0, r0, #3
 	bl	__aeabi_idiv
 	uxth	r0, r0
 	mov	r3, r6
-	ldr	r6, .L443+64
+	ldr	r6, .L449+64
 	cmp	r0, #4
 	itt	ls
 	movls	r2, #4
@@ -2947,22 +2953,22 @@ FtlConstantsInit:
 	ldr	r2, [sp, #4]
 	it	hi
 	strhhi	r0, [r6]	@ movhi
-	cbz	r2, .L428
+	cbz	r2, .L434
 	mov	r2, #640
 	strh	r2, [r3]	@ movhi
-.L428:
+.L434:
 	ldrh	r3, [r3]
 	lsls	r4, r4, #6
-	ldr	r2, .L443+68
+	ldr	r2, .L449+68
 	mov	r1, r5
 	ldrh	r0, [r6]
 	asrs	r3, r3, r7
 	adds	r7, r7, #9
 	asrs	r4, r4, r7
-	ldr	r7, .L443+72
+	ldr	r7, .L449+72
 	adds	r3, r3, #2
 	strh	r3, [r2]	@ movhi
-	ldr	r3, .L443+76
+	ldr	r3, .L449+76
 	strh	r4, [r3]	@ movhi
 	uxth	r4, r4
 	mul	r3, r4, r5
@@ -2970,9 +2976,9 @@ FtlConstantsInit:
 	str	r3, [r7]
 	bl	__aeabi_uidiv
 	uxtah	r0, r4, r0
-	ldr	r4, .L443+80
+	ldr	r4, .L449+80
 	cmp	r5, #1
-	ldr	r5, .L443+84
+	ldr	r5, .L449+84
 	it	eq
 	addeq	r0, r0, #4
 	str	r0, [r4]
@@ -2980,10 +2986,10 @@ FtlConstantsInit:
 	bl	FtlSysBlkNumInit
 	ldr	r2, [r4]
 	movs	r0, #24
-	ldr	r3, .L443+88
+	ldr	r3, .L449+88
 	ldrb	r5, [r5]	@ zero_extendqisi2
 	str	r2, [r3]
-	ldr	r3, .L443+92
+	ldr	r3, .L449+92
 	ldr	r2, [r3]
 	ldrh	r3, [fp]
 	lsls	r2, r2, #2
@@ -2991,14 +2997,14 @@ FtlConstantsInit:
 	ldrh	r2, [r10]
 	adds	r2, r2, #9
 	lsrs	r3, r3, r2
-	ldr	r2, .L443+96
+	ldr	r2, .L449+96
 	adds	r3, r3, #2
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L443+100
+	ldr	r2, .L449+100
 	strh	r0, [r2]	@ movhi
 	movs	r0, #0
-	ldr	r2, .L443+104
+	ldr	r2, .L449+104
 	str	r0, [r2]
 	ldrh	r0, [r6]
 	adds	r2, r0, #3
@@ -3006,17 +3012,17 @@ FtlConstantsInit:
 	ldr	r2, [r7]
 	adds	r4, r2, #3
 	str	r4, [r7]
-	cbz	r5, .L431
+	cbz	r5, .L437
 	adds	r2, r2, #5
 	adds	r0, r0, #4
 	strh	r0, [r6]	@ movhi
-.L442:
+.L448:
 	str	r2, [r7]
-.L432:
-	ldr	r1, .L443+108
+.L438:
+	ldr	r1, .L449+108
 	movs	r2, #0
 	strh	r2, [r1]	@ movhi
-	ldr	r2, .L443+112
+	ldr	r2, .L449+112
 	ldrh	r0, [r2]
 	lsrs	r2, r0, #3
 	add	r2, r2, r0, lsl #1
@@ -3031,14 +3037,14 @@ FtlConstantsInit:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L431:
+.L437:
 	cmp	r4, #7
-	bhi	.L432
+	bhi	.L438
 	movs	r2, #8
-	b	.L442
-.L444:
+	b	.L448
+.L450:
 	.align	2
-.L443:
+.L449:
 	.word	.LANCHOR44
 	.word	.LANCHOR41
 	.word	.LANCHOR46
@@ -3060,7 +3066,7 @@ FtlConstantsInit:
 	.word	.LANCHOR64
 	.word	.LANCHOR63
 	.word	.LANCHOR37
-	.word	.LANCHOR15
+	.word	.LANCHOR16
 	.word	.LANCHOR65
 	.word	.LANCHOR42
 	.word	.LANCHOR66
@@ -3086,33 +3092,75 @@ IsBlkInVendorPart:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L452
+	ldr	r3, .L458
 	ldrh	r3, [r3]
-	cbz	r3, .L451
-	ldr	r3, .L452+4
-	ldr	r2, .L452+8
+	cbz	r3, .L457
+	ldr	r3, .L458+4
+	ldr	r2, .L458+8
 	ldr	r3, [r3]
 	ldrh	r2, [r2]
 	add	r2, r3, r2, lsl #1
-.L447:
+.L453:
 	cmp	r3, r2
-	bne	.L448
-.L451:
+	bne	.L454
+.L457:
 	movs	r0, #0
 	bx	lr
-.L448:
+.L454:
 	ldrh	r1, [r3], #2
 	cmp	r0, r1
-	bne	.L447
+	bne	.L453
 	movs	r0, #1
 	bx	lr
-.L453:
+.L459:
 	.align	2
-.L452:
+.L458:
 	.word	.LANCHOR70
 	.word	.LANCHOR71
 	.word	.LANCHOR61
 	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
+	.section	.text.FtlCacheMetchLpa,"ax",%progbits
+	.align	1
+	.global	FtlCacheMetchLpa
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlCacheMetchLpa, %function
+FtlCacheMetchLpa:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L468
+	push	{r4, r5, r6, lr}
+	ldr	r3, [r3]
+	cbz	r3, .L467
+	ldr	r2, .L468+4
+	movs	r6, #36
+	ldr	r5, [r2]
+	movs	r2, #0
+.L463:
+	mla	r4, r6, r2, r5
+	ldr	r4, [r4, #16]
+	cmp	r4, r0
+	bcc	.L462
+	cmp	r4, r1
+	bls	.L465
+.L462:
+	adds	r2, r2, #1
+	cmp	r3, r2
+	bne	.L463
+.L467:
+	movs	r0, #0
+	pop	{r4, r5, r6, pc}
+.L465:
+	movs	r0, #1
+	pop	{r4, r5, r6, pc}
+.L469:
+	.align	2
+.L468:
+	.word	.LANCHOR72
+	.word	.LANCHOR73
+	.size	FtlCacheMetchLpa, .-FtlCacheMetchLpa
 	.section	.text.FtlGetCap,"ax",%progbits
 	.align	1
 	.global	FtlGetCap
@@ -3125,12 +3173,12 @@ FtlGetCap:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L455
+	ldr	r3, .L471
 	ldr	r0, [r3]
 	bx	lr
-.L456:
+.L472:
 	.align	2
-.L455:
+.L471:
 	.word	.LANCHOR68
 	.size	FtlGetCap, .-FtlGetCap
 	.section	.text.FtlGetCapacity,"ax",%progbits
@@ -3145,12 +3193,12 @@ FtlGetCapacity:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L458
+	ldr	r3, .L474
 	ldr	r0, [r3]
 	bx	lr
-.L459:
+.L475:
 	.align	2
-.L458:
+.L474:
 	.word	.LANCHOR68
 	.size	FtlGetCapacity, .-FtlGetCapacity
 	.section	.text.ftl_get_density,"ax",%progbits
@@ -3165,12 +3213,12 @@ ftl_get_density:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L461
+	ldr	r3, .L477
 	ldr	r0, [r3]
 	bx	lr
-.L462:
+.L478:
 	.align	2
-.L461:
+.L477:
 	.word	.LANCHOR68
 	.size	ftl_get_density, .-ftl_get_density
 	.section	.text.FtlGetLpn,"ax",%progbits
@@ -3185,13 +3233,13 @@ FtlGetLpn:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L464
+	ldr	r3, .L480
 	ldr	r0, [r3]
 	bx	lr
-.L465:
+.L481:
 	.align	2
-.L464:
-	.word	.LANCHOR72
+.L480:
+	.word	.LANCHOR74
 	.size	FtlGetLpn, .-FtlGetLpn
 	.section	.text.FtlGetCurEraseBlock,"ax",%progbits
 	.align	1
@@ -3205,16 +3253,16 @@ FtlGetCurEraseBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L467
-	ldr	r3, .L467+4
+	ldr	r2, .L483
+	ldr	r3, .L483+4
 	ldr	r0, [r2]
 	ldrh	r3, [r3]
 	muls	r0, r3, r0
 	bx	lr
-.L468:
+.L484:
 	.align	2
-.L467:
-	.word	.LANCHOR73
+.L483:
+	.word	.LANCHOR75
 	.word	.LANCHOR38
 	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
 	.section	.text.FtlGetAllBlockNum,"ax",%progbits
@@ -3229,15 +3277,15 @@ FtlGetAllBlockNum:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L470
-	ldr	r3, .L470+4
+	ldr	r2, .L486
+	ldr	r3, .L486+4
 	ldrh	r0, [r2]
 	ldrh	r3, [r3]
 	muls	r0, r3, r0
 	bx	lr
-.L471:
+.L487:
 	.align	2
-.L470:
+.L486:
 	.word	.LANCHOR38
 	.word	.LANCHOR41
 	.size	FtlGetAllBlockNum, .-FtlGetAllBlockNum
@@ -3252,14 +3300,14 @@ FtlGetAllBlockNum:
 FtlBbmMapBadBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L473
+	ldr	r3, .L489
 	push	{r0, r1, r2, r4, r5, r6, r7, lr}
 	mov	r5, r0
 	ldrh	r4, [r3]
 	mov	r1, r4
 	bl	__aeabi_uidiv
 	mov	r1, r4
-	ldr	r4, .L473+4
+	ldr	r4, .L489+4
 	uxth	r6, r0
 	mov	r0, r5
 	bl	__aeabi_uidivmod
@@ -3276,7 +3324,7 @@ FtlBbmMapBadBlock:
 	mov	r2, r6
 	str	r0, [sp]
 	mov	r1, r5
-	ldr	r0, .L473+8
+	ldr	r0, .L489+8
 	bl	printf
 	ldrh	r3, [r4, #6]
 	movs	r0, #0
@@ -3285,11 +3333,11 @@ FtlBbmMapBadBlock:
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, pc}
-.L474:
+.L490:
 	.align	2
-.L473:
+.L489:
 	.word	.LANCHOR51
-	.word	.LANCHOR74
+	.word	.LANCHOR76
 	.word	.LC2
 	.size	FtlBbmMapBadBlock, .-FtlBbmMapBadBlock
 	.section	.text.FtlBbmIsBadBlock,"ax",%progbits
@@ -3303,7 +3351,7 @@ FtlBbmMapBadBlock:
 FtlBbmIsBadBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L476
+	ldr	r3, .L492
 	push	{r4, r5, r6, lr}
 	mov	r6, r0
 	ldrh	r5, [r3]
@@ -3313,7 +3361,7 @@ FtlBbmIsBadBlock:
 	uxth	r4, r1
 	mov	r1, r5
 	bl	__aeabi_uidiv
-	ldr	r3, .L476+4
+	ldr	r3, .L492+4
 	uxth	r0, r0
 	lsrs	r2, r4, #5
 	and	r4, r4, #31
@@ -3323,11 +3371,11 @@ FtlBbmIsBadBlock:
 	lsrs	r0, r0, r4
 	and	r0, r0, #1
 	pop	{r4, r5, r6, pc}
-.L477:
+.L493:
 	.align	2
-.L476:
+.L492:
 	.word	.LANCHOR51
-	.word	.LANCHOR74
+	.word	.LANCHOR76
 	.size	FtlBbmIsBadBlock, .-FtlBbmIsBadBlock
 	.section	.text.FtlBbtInfoPrint,"ax",%progbits
 	.align	1
@@ -3356,12 +3404,12 @@ V2P_block:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r5, r1
-	ldr	r3, .L480
+	ldr	r3, .L496
 	mov	r7, r0
 	ldrh	r6, [r3]
 	mov	r1, r6
 	bl	__aeabi_uidiv
-	ldr	r3, .L480+4
+	ldr	r3, .L496+4
 	smulbb	r5, r6, r5
 	mov	r1, r6
 	ldrh	r4, [r3]
@@ -3372,9 +3420,9 @@ V2P_block:
 	add	r0, r0, r4
 	uxth	r0, r0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L481:
+.L497:
 	.align	2
-.L480:
+.L496:
 	.word	.LANCHOR46
 	.word	.LANCHOR51
 	.size	V2P_block, .-V2P_block
@@ -3389,11 +3437,11 @@ V2P_block:
 P2V_plane:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L483
+	ldr	r3, .L499
 	push	{r4, r5, r6, lr}
 	mov	r6, r0
 	ldrh	r5, [r3]
-	ldr	r3, .L483+4
+	ldr	r3, .L499+4
 	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
 	smulbb	r4, r0, r5
@@ -3403,9 +3451,9 @@ P2V_plane:
 	add	r1, r1, r4
 	uxth	r0, r1
 	pop	{r4, r5, r6, pc}
-.L484:
+.L500:
 	.align	2
-.L483:
+.L499:
 	.word	.LANCHOR46
 	.word	.LANCHOR51
 	.size	P2V_plane, .-P2V_plane
@@ -3421,18 +3469,18 @@ P2V_block_in_plane:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L486
+	ldr	r3, .L502
 	ldrh	r1, [r3]
 	bl	__aeabi_uidivmod
-	ldr	r3, .L486+4
+	ldr	r3, .L502+4
 	uxth	r0, r1
 	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
 	uxth	r0, r0
 	pop	{r3, pc}
-.L487:
+.L503:
 	.align	2
-.L486:
+.L502:
 	.word	.LANCHOR51
 	.word	.LANCHOR46
 	.size	P2V_block_in_plane, .-P2V_block_in_plane
@@ -3449,14 +3497,14 @@ ftl_cmp_data_ver:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	cmp	r0, r1
-	bls	.L489
+	bls	.L505
 	subs	r0, r0, r1
 	cmp	r0, #-2147483648
 	ite	hi
 	movhi	r0, #0
 	movls	r0, #1
 	bx	lr
-.L489:
+.L505:
 	subs	r0, r1, r0
 	cmp	r0, #-2147483648
 	ite	ls
@@ -3476,15 +3524,15 @@ FtlFreeSysBlkQueueEmpty:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L492
+	ldr	r3, .L508
 	ldrh	r0, [r3, #6]
 	clz	r0, r0
 	lsrs	r0, r0, #5
 	bx	lr
-.L493:
+.L509:
 	.align	2
-.L492:
-	.word	.LANCHOR75
+.L508:
+	.word	.LANCHOR77
 	.size	FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty
 	.section	.text.FtlFreeSysBlkQueueFull,"ax",%progbits
 	.align	1
@@ -3498,16 +3546,16 @@ FtlFreeSysBlkQueueFull:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L495
+	ldr	r3, .L511
 	ldrh	r0, [r3, #6]
 	sub	r3, r0, #1024
 	rsbs	r0, r3, #0
 	adcs	r0, r0, r3
 	bx	lr
-.L496:
+.L512:
 	.align	2
-.L495:
-	.word	.LANCHOR75
+.L511:
+	.word	.LANCHOR77
 	.size	FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull
 	.section	.text.FtlFreeSysBlkQueueIn,"ax",%progbits
 	.align	1
@@ -3526,17 +3574,17 @@ FtlFreeSysBlkQueueIn:
 	push	{r4, r5, r6, lr}
 	mov	r5, r0
 	cmp	r3, r2
-	bhi	.L497
-	ldr	r4, .L506
+	bhi	.L513
+	ldr	r4, .L522
 	ldrh	r3, [r4, #6]
 	cmp	r3, #1024
-	beq	.L497
-	cbz	r1, .L499
-	ldr	r3, .L506+4
+	beq	.L513
+	cbz	r1, .L515
+	ldr	r3, .L522+4
 	ldr	r3, [r3]
-	cbnz	r3, .L499
+	cbnz	r3, .L515
 	bl	P2V_block_in_plane
-	ldr	r3, .L506+8
+	ldr	r3, .L522+8
 	mov	r6, r0
 	movs	r2, #1
 	mov	r1, r2
@@ -3544,16 +3592,16 @@ FtlFreeSysBlkQueueIn:
 	lsls	r3, r5, #10
 	str	r3, [r0, #4]
 	bl	FlashEraseBlocks
-	ldr	r3, .L506+12
+	ldr	r3, .L522+12
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r6, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r6, lsl #1]	@ movhi
-	ldr	r2, .L506+16
+	ldr	r2, .L522+16
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
-.L499:
+.L515:
 	ldrh	r3, [r4, #6]
 	adds	r3, r3, #1
 	strh	r3, [r4, #6]	@ movhi
@@ -3563,16 +3611,16 @@ FtlFreeSysBlkQueueIn:
 	ubfx	r3, r3, #0, #10
 	strh	r5, [r4, r2, lsl #1]	@ movhi
 	strh	r3, [r4, #4]	@ movhi
-.L497:
+.L513:
 	pop	{r4, r5, r6, pc}
-.L507:
+.L523:
 	.align	2
-.L506:
-	.word	.LANCHOR75
-	.word	.LANCHOR76
+.L522:
 	.word	.LANCHOR77
 	.word	.LANCHOR78
 	.word	.LANCHOR79
+	.word	.LANCHOR80
+	.word	.LANCHOR81
 	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
 	.section	.text.FtlFreeSysBLkSort,"ax",%progbits
 	.align	1
@@ -3585,28 +3633,28 @@ FtlFreeSysBlkQueueIn:
 FtlFreeSysBLkSort:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L517
+	ldr	r3, .L533
 	push	{r4, r5, r6, lr}
 	ldrh	r2, [r3, #6]
-	cbz	r2, .L508
-	ldr	r2, .L517+4
+	cbz	r2, .L524
+	ldr	r2, .L533+4
 	movs	r6, #0
 	ldrh	r1, [r3, #2]
 	mov	r5, r6
 	ldrh	r4, [r2, #28]
 	ldrh	r2, [r3, #4]
 	and	r4, r4, #31
-.L510:
+.L526:
 	uxth	r0, r6
 	adds	r6, r6, #1
 	cmp	r4, r0
-	bgt	.L511
-	cbz	r5, .L508
+	bgt	.L527
+	cbz	r5, .L524
 	strh	r1, [r3, #2]	@ movhi
 	strh	r2, [r3, #4]	@ movhi
-.L508:
+.L524:
 	pop	{r4, r5, r6, pc}
-.L511:
+.L527:
 	adds	r0, r1, #4
 	adds	r1, r1, #1
 	ldrh	r5, [r3, r0, lsl #1]
@@ -3616,12 +3664,12 @@ FtlFreeSysBLkSort:
 	movs	r5, #1
 	add	r2, r2, r5
 	ubfx	r2, r2, #0, #10
-	b	.L510
-.L518:
+	b	.L526
+.L534:
 	.align	2
-.L517:
-	.word	.LANCHOR75
-	.word	.LANCHOR80
+.L533:
+	.word	.LANCHOR77
+	.word	.LANCHOR82
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
 	.section	.text.FtlFreeSysBlkQueueOut,"ax",%progbits
 	.align	1
@@ -3635,12 +3683,12 @@ FtlFreeSysBlkQueueOut:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	ldr	r4, .L529
+	ldr	r4, .L545
 	mov	r6, r4
-.L520:
+.L536:
 	ldrh	r1, [r4, #6]
 	cmp	r1, #0
-	beq	.L521
+	beq	.L537
 	ldrh	r3, [r4, #2]
 	subs	r1, r1, #1
 	strh	r1, [r4, #6]	@ movhi
@@ -3649,67 +3697,67 @@ FtlFreeSysBlkQueueOut:
 	ubfx	r3, r3, #0, #10
 	ldrh	r5, [r4, r2, lsl #1]
 	strh	r3, [r4, #2]	@ movhi
-	ldr	r3, .L529+4
+	ldr	r3, .L545+4
 	ldr	r10, [r3]
 	cmp	r10, #0
-	bne	.L522
-	ldr	r8, .L529+28
+	bne	.L538
+	ldr	r8, .L545+28
 	mov	r0, r5
 	bl	P2V_block_in_plane
 	mov	r7, r0
 	lsls	r3, r5, #10
 	ldr	r0, [r8]
 	str	r3, [r0, #4]
-	ldr	r3, .L529+8
+	ldr	r3, .L545+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L523
+	cbz	r3, .L539
 	movs	r2, #1
 	mov	r1, r10
 	bl	FlashEraseBlocks
-.L523:
+.L539:
 	movs	r2, #1
 	ldr	r0, [r8]
 	mov	r1, r2
 	bl	FlashEraseBlocks
-	ldr	r3, .L529+12
+	ldr	r3, .L545+12
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r7, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r7, lsl #1]	@ movhi
-	ldr	r2, .L529+16
+	ldr	r2, .L545+16
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
-.L522:
+.L538:
 	subs	r3, r5, #1
 	movw	r2, #65533
 	uxth	r3, r3
 	cmp	r3, r2
-	bls	.L525
+	bls	.L541
 	ldrh	r2, [r6, #6]
 	mov	r1, r5
-	ldr	r0, .L529+20
+	ldr	r0, .L545+20
 	bl	printf
-	b	.L520
-.L521:
-	ldr	r0, .L529+24
+	b	.L536
+.L537:
+	ldr	r0, .L545+24
 	bl	printf
-.L524:
-	b	.L524
-.L525:
+.L540:
+	b	.L540
+.L541:
 	mov	r0, r5
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L530:
+.L546:
 	.align	2
-.L529:
-	.word	.LANCHOR75
-	.word	.LANCHOR76
-	.word	.LANCHOR15
+.L545:
+	.word	.LANCHOR77
 	.word	.LANCHOR78
-	.word	.LANCHOR79
+	.word	.LANCHOR16
+	.word	.LANCHOR80
+	.word	.LANCHOR81
 	.word	.LC4
 	.word	.LC3
-	.word	.LANCHOR77
+	.word	.LANCHOR79
 	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
 	.section	.text.test_node_in_list,"ax",%progbits
 	.align	1
@@ -3722,35 +3770,35 @@ FtlFreeSysBlkQueueOut:
 test_node_in_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L536
+	ldr	r3, .L552
 	push	{r4, r5, lr}
 	movw	r5, #65535
 	ldr	r2, [r0]
 	ldr	r4, [r3]
 	subs	r3, r2, r4
 	asrs	r0, r3, #1
-	ldr	r3, .L536+4
+	ldr	r3, .L552+4
 	muls	r3, r0, r3
 	movs	r0, #6
 	uxth	r3, r3
-.L533:
+.L549:
 	cmp	r3, r1
-	beq	.L534
+	beq	.L550
 	ldrh	r3, [r2]
 	cmp	r3, r5
-	beq	.L535
+	beq	.L551
 	mla	r2, r0, r3, r4
-	b	.L533
-.L534:
+	b	.L549
+.L550:
 	movs	r0, #1
 	pop	{r4, r5, pc}
-.L535:
+.L551:
 	movs	r0, #0
 	pop	{r4, r5, pc}
-.L537:
+.L553:
 	.align	2
-.L536:
-	.word	.LANCHOR81
+.L552:
+	.word	.LANCHOR83
 	.word	-1431655765
 	.size	test_node_in_list, .-test_node_in_list
 	.section	.text.insert_data_list,"ax",%progbits
@@ -3765,11 +3813,11 @@ insert_data_list:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L554
+	ldr	r3, .L570
 	ldrh	lr, [r3]
 	cmp	lr, r0
-	bls	.L540
-	ldr	r3, .L554+4
+	bls	.L556
+	ldr	r3, .L570+4
 	movs	r5, #6
 	ldr	r4, [r3]
 	mul	r3, r5, r0
@@ -3779,109 +3827,109 @@ insert_data_list:
 	movw	r3, #65535
 	strh	r3, [r1, #2]	@ movhi
 	strh	r3, [r4, r2]	@ movhi
-	ldr	r3, .L554+8
+	ldr	r3, .L570+8
 	ldr	ip, [r3]
 	cmp	ip, #0
-	bne	.L541
-.L553:
+	bne	.L557
+.L569:
 	str	r1, [r3]
-.L540:
+.L556:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L541:
-	ldr	r3, .L554+12
+.L557:
+	ldr	r3, .L570+12
 	lsls	r2, r0, #1
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
 	ldrh	r6, [r3, r0, lsl #1]
 	ldrh	r3, [r1, #4]
-	cbz	r3, .L551
+	cbz	r3, .L567
 	mul	fp, r3, r6
-.L542:
+.L558:
 	sub	r3, ip, r4
 	asrs	r6, r3, #1
-	ldr	r3, .L554+16
+	ldr	r3, .L570+16
 	muls	r3, r6, r3
-	ldr	r6, .L554+20
+	ldr	r6, .L570+20
 	ldr	r8, [r6]
 	movs	r6, #0
 	uxth	r3, r3
 	add	r2, r8, r2
 	str	r2, [sp, #12]
 	mov	r2, ip
-.L549:
+.L565:
 	adds	r6, r6, #1
 	uxth	r6, r6
 	cmp	lr, r6
-	bcc	.L540
+	bcc	.L556
 	cmp	r3, r0
-	beq	.L540
+	beq	.L556
 	ldr	r7, [sp, #8]
 	lsl	r10, r3, #1
 	ldrh	r7, [r7, r3, lsl #1]
 	mov	r5, r7
 	ldrh	r7, [r2, #4]
-	cbz	r7, .L552
+	cbz	r7, .L568
 	muls	r7, r5, r7
-.L544:
+.L560:
 	cmp	fp, r7
-	bne	.L545
+	bne	.L561
 	ldr	r5, [sp, #12]
 	ldrh	r10, [r8, r10]
 	ldrh	r7, [r5]
 	cmp	r10, r7
-	bcc	.L547
-.L546:
+	bcc	.L563
+.L562:
 	ldr	r5, [sp, #4]
 	cmp	r2, ip
 	strh	r3, [r4, r5]	@ movhi
 	ldrh	r3, [r2, #2]
 	strh	r3, [r1, #2]	@ movhi
-	bne	.L550
+	bne	.L566
 	strh	r0, [r2, #2]	@ movhi
-	ldr	r3, .L554+8
-	b	.L553
-.L551:
+	ldr	r3, .L570+8
+	b	.L569
+.L567:
 	mov	fp, #-1
-	b	.L542
-.L552:
+	b	.L558
+.L568:
 	mov	r7, #-1
-	b	.L544
-.L545:
-	bcc	.L546
-.L547:
+	b	.L560
+.L561:
+	bcc	.L562
+.L563:
 	ldrh	r7, [r2]
 	movw	r5, #65535
 	cmp	r7, r5
-	bne	.L548
+	bne	.L564
 	strh	r3, [r1, #2]	@ movhi
 	strh	r0, [r2]	@ movhi
-	ldr	r3, .L554+24
-	b	.L553
-.L548:
+	ldr	r3, .L570+24
+	b	.L569
+.L564:
 	movs	r3, #6
 	mla	r2, r3, r7, r4
 	mov	r3, r7
-	b	.L549
-.L550:
+	b	.L565
+.L566:
 	ldrh	r1, [r2, #2]
 	movs	r3, #6
 	muls	r3, r1, r3
 	strh	r0, [r4, r3]	@ movhi
 	strh	r0, [r2, #2]	@ movhi
-	b	.L540
-.L555:
+	b	.L556
+.L571:
 	.align	2
-.L554:
+.L570:
 	.word	.LANCHOR40
-	.word	.LANCHOR81
-	.word	.LANCHOR82
 	.word	.LANCHOR83
-	.word	-1431655765
-	.word	.LANCHOR78
 	.word	.LANCHOR84
+	.word	.LANCHOR85
+	.word	-1431655765
+	.word	.LANCHOR80
+	.word	.LANCHOR86
 	.size	insert_data_list, .-insert_data_list
 	.section	.text.INSERT_DATA_LIST,"ax",%progbits
 	.align	1
@@ -3896,31 +3944,31 @@ INSERT_DATA_LIST:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	insert_data_list
-	ldr	r2, .L558
+	ldr	r2, .L574
 	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L558+4
+	ldr	r2, .L574+4
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bcs	.L556
-	ldr	r1, .L558+8
-	movs	r2, #210
-	ldr	r0, .L558+12
+	bcs	.L572
+	ldr	r1, .L574+8
+	movs	r2, #245
+	ldr	r0, .L574+12
 	bl	printf
-	ldr	r1, .L558+16
-	ldr	r0, .L558+20
+	ldr	r1, .L574+16
+	ldr	r0, .L574+20
 	pop	{r3, lr}
 	b	printf
-.L556:
+.L572:
 	pop	{r3, pc}
-.L559:
+.L575:
 	.align	2
-.L558:
-	.word	.LANCHOR85
+.L574:
+	.word	.LANCHOR87
 	.word	.LANCHOR40
-	.word	.LANCHOR86
+	.word	.LANCHOR88
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
@@ -3939,48 +3987,48 @@ insert_free_list:
 	movw	r1, #65535
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	cmp	r0, r1
-	beq	.L561
-	ldr	r3, .L567
+	beq	.L577
+	ldr	r3, .L583
 	mov	r10, #6
 	mul	r7, r10, r0
 	ldr	r4, [r3]
-	ldr	r3, .L567+4
+	ldr	r3, .L583+4
 	adds	r5, r4, r7
 	ldr	r6, [r3]
 	mov	lr, r3
 	strh	r1, [r5, #2]	@ movhi
 	strh	r1, [r4, r7]	@ movhi
-	cbnz	r6, .L562
+	cbnz	r6, .L578
 	str	r5, [r3]
-.L561:
+.L577:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L562:
-	ldr	r3, .L567+8
+.L578:
+	ldr	r3, .L583+8
 	subs	r2, r6, r4
 	mov	fp, r1
 	ldr	ip, [r3]
 	asrs	r3, r2, #1
-	ldr	r2, .L567+12
+	ldr	r2, .L583+12
 	ldrh	r8, [ip, r0, lsl #1]
 	muls	r2, r3, r2
 	mov	r3, r6
 	uxth	r2, r2
-.L565:
+.L581:
 	ldrh	r1, [ip, r2, lsl #1]
 	cmp	r1, r8
-	bcs	.L563
+	bcs	.L579
 	ldrh	r1, [r3]
 	cmp	r1, fp
-	bne	.L564
+	bne	.L580
 	strh	r2, [r5, #2]	@ movhi
 	strh	r0, [r3]	@ movhi
-	b	.L561
-.L564:
+	b	.L577
+.L580:
 	mla	r3, r10, r1, r4
 	mov	r2, r1
-	b	.L565
-.L563:
+	b	.L581
+.L579:
 	ldrh	r1, [r3, #2]
 	cmp	r3, r6
 	strh	r1, [r5, #2]	@ movhi
@@ -3995,13 +4043,13 @@ insert_free_list:
 	itt	ne
 	strhne	r0, [r4, r2]	@ movhi
 	strhne	r0, [r3, #2]	@ movhi
-	b	.L561
-.L568:
+	b	.L577
+.L584:
 	.align	2
-.L567:
-	.word	.LANCHOR81
-	.word	.LANCHOR87
-	.word	.LANCHOR78
+.L583:
+	.word	.LANCHOR83
+	.word	.LANCHOR89
+	.word	.LANCHOR80
 	.word	-1431655765
 	.size	insert_free_list, .-insert_free_list
 	.section	.text.INSERT_FREE_LIST,"ax",%progbits
@@ -4017,31 +4065,31 @@ INSERT_FREE_LIST:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	insert_free_list
-	ldr	r2, .L571
+	ldr	r2, .L587
 	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L571+4
+	ldr	r2, .L587+4
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bcs	.L569
-	ldr	r1, .L571+8
-	movs	r2, #203
-	ldr	r0, .L571+12
+	bcs	.L585
+	ldr	r1, .L587+8
+	movs	r2, #238
+	ldr	r0, .L587+12
 	bl	printf
-	ldr	r1, .L571+16
-	ldr	r0, .L571+20
+	ldr	r1, .L587+16
+	ldr	r0, .L587+20
 	pop	{r3, lr}
 	b	printf
-.L569:
+.L585:
 	pop	{r3, pc}
-.L572:
+.L588:
 	.align	2
-.L571:
-	.word	.LANCHOR88
+.L587:
+	.word	.LANCHOR90
 	.word	.LANCHOR40
-	.word	.LANCHOR89
+	.word	.LANCHOR91
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
@@ -4059,7 +4107,7 @@ List_remove_node:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r6, #6
-	ldr	r5, .L579
+	ldr	r5, .L595
 	muls	r6, r1, r6
 	movw	r3, #65535
 	mov	r8, r0
@@ -4067,23 +4115,23 @@ List_remove_node:
 	adds	r4, r7, r6
 	ldrh	r2, [r4, #2]
 	cmp	r2, r3
-	bne	.L574
+	bne	.L590
 	ldr	r3, [r0]
 	cmp	r4, r3
-	beq	.L574
-	ldr	r1, .L579+4
-	mov	r2, #386
-	ldr	r0, .L579+8
+	beq	.L590
+	ldr	r1, .L595+4
+	movw	r2, #435
+	ldr	r0, .L595+8
 	bl	printf
-	ldr	r1, .L579+12
-	ldr	r0, .L579+16
+	ldr	r1, .L595+12
+	ldr	r0, .L595+16
 	bl	printf
-.L574:
+.L590:
 	ldr	r3, [r8]
 	movw	r1, #65535
 	cmp	r4, r3
 	ldrh	r3, [r7, r6]
-	bne	.L575
+	bne	.L591
 	cmp	r3, r1
 	ittee	ne
 	ldrne	r0, [r5]
@@ -4094,24 +4142,24 @@ List_remove_node:
 	mlane	r3, r2, r3, r0
 	strne	r3, [r8]
 	strhne	r1, [r3, #2]	@ movhi
-.L577:
+.L593:
 	movw	r3, #65535
 	movs	r0, #0
 	strh	r3, [r7, r6]	@ movhi
 	strh	r3, [r4, #2]	@ movhi
 	pop	{r4, r5, r6, r7, r8, pc}
-.L575:
+.L591:
 	cmp	r3, r1
 	ldrh	r1, [r4, #2]
-	bne	.L578
+	bne	.L594
 	cmp	r1, r3
-	beq	.L577
+	beq	.L593
 	movs	r2, #6
 	ldr	r0, [r5]
 	muls	r1, r2, r1
 	strh	r3, [r0, r1]	@ movhi
-	b	.L577
-.L578:
+	b	.L593
+.L594:
 	ldr	r0, [r5]
 	movs	r2, #6
 	mla	r5, r2, r3, r0
@@ -4119,12 +4167,12 @@ List_remove_node:
 	ldrh	r1, [r4, #2]
 	muls	r2, r1, r2
 	strh	r3, [r0, r2]	@ movhi
-	b	.L577
-.L580:
+	b	.L593
+.L596:
 	.align	2
-.L579:
-	.word	.LANCHOR81
-	.word	.LANCHOR90
+.L595:
+	.word	.LANCHOR83
+	.word	.LANCHOR92
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
@@ -4142,15 +4190,15 @@ List_pop_index_node:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	ldr	r3, [r0]
 	push	{r4, r5, r6, lr}
-	cbz	r3, .L587
-	ldr	r2, .L588
+	cbz	r3, .L603
+	ldr	r2, .L604
 	movw	r5, #65535
 	movs	r6, #6
 	ldr	r2, [r2]
-.L583:
-	cbnz	r1, .L584
-.L586:
-	ldr	r4, .L588+4
+.L599:
+	cbnz	r1, .L600
+.L602:
+	ldr	r4, .L604+4
 	subs	r3, r3, r2
 	asrs	r3, r3, #1
 	muls	r4, r3, r4
@@ -4158,21 +4206,21 @@ List_pop_index_node:
 	bl	List_remove_node
 	uxth	r0, r4
 	pop	{r4, r5, r6, pc}
-.L584:
+.L600:
 	ldrh	r4, [r3]
 	cmp	r4, r5
-	beq	.L586
+	beq	.L602
 	subs	r1, r1, #1
 	mla	r3, r6, r4, r2
 	uxth	r1, r1
-	b	.L583
-.L587:
+	b	.L599
+.L603:
 	movw	r0, #65535
 	pop	{r4, r5, r6, pc}
-.L589:
+.L605:
 	.align	2
-.L588:
-	.word	.LANCHOR81
+.L604:
+	.word	.LANCHOR83
 	.word	-1431655765
 	.size	List_pop_index_node, .-List_pop_index_node
 	.section	.text.List_get_gc_head_node,"ax",%progbits
@@ -4186,39 +4234,39 @@ List_pop_index_node:
 List_get_gc_head_node:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L596
+	ldr	r3, .L612
 	push	{r4, lr}
 	ldr	r3, [r3]
-	cbz	r3, .L595
-	ldr	r2, .L596+4
+	cbz	r3, .L611
+	ldr	r2, .L612+4
 	movs	r4, #6
 	ldr	r1, [r2]
 	movw	r2, #65535
-.L592:
-	cbz	r0, .L593
+.L608:
+	cbz	r0, .L609
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bne	.L594
-.L595:
+	bne	.L610
+.L611:
 	movw	r0, #65535
 	pop	{r4, pc}
-.L594:
+.L610:
 	subs	r0, r0, #1
 	mla	r3, r4, r3, r1
 	uxth	r0, r0
-	b	.L592
-.L593:
-	ldr	r0, .L596+8
+	b	.L608
+.L609:
+	ldr	r0, .L612+8
 	subs	r3, r3, r1
 	asrs	r3, r3, #1
 	muls	r3, r0, r3
 	uxth	r0, r3
 	pop	{r4, pc}
-.L597:
+.L613:
 	.align	2
-.L596:
-	.word	.LANCHOR82
-	.word	.LANCHOR81
+.L612:
+	.word	.LANCHOR84
+	.word	.LANCHOR83
 	.word	-1431655765
 	.size	List_get_gc_head_node, .-List_get_gc_head_node
 	.section	.text.List_update_data_list,"ax",%progbits
@@ -4232,64 +4280,64 @@ List_get_gc_head_node:
 List_update_data_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L609
+	ldr	r3, .L625
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L600
-	ldr	r3, .L609+4
+	beq	.L616
+	ldr	r3, .L625+4
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L600
-	ldr	r3, .L609+8
+	beq	.L616
+	ldr	r3, .L625+8
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L600
-	ldr	r7, .L609+12
+	beq	.L616
+	ldr	r7, .L625+12
 	movs	r6, #6
-	ldr	r3, .L609+16
+	ldr	r3, .L625+16
 	muls	r6, r0, r6
 	ldr	fp, [r7]
 	ldr	r3, [r3]
 	add	r10, fp, r6
 	cmp	r10, r3
-	beq	.L600
-	ldr	r3, .L609+20
+	beq	.L616
+	ldr	r3, .L625+20
 	ldrh	r5, [r10, #4]
 	ldr	r2, [r3]
 	mov	r8, r3
 	ldrh	r2, [r2, r0, lsl #1]
 	cmp	r5, #0
-	beq	.L607
+	beq	.L623
 	muls	r5, r2, r5
-.L602:
+.L618:
 	ldrh	r3, [r10, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L603
+	bne	.L619
 	ldrh	r2, [fp, r6]
 	cmp	r2, r3
-	bne	.L603
-	ldr	r1, .L609+24
-	mov	r2, #504
-	ldr	r0, .L609+28
+	bne	.L619
+	ldr	r1, .L625+24
+	movw	r2, #571
+	ldr	r0, .L625+28
 	bl	printf
-	ldr	r1, .L609+32
-	ldr	r0, .L609+36
+	ldr	r1, .L625+32
+	ldr	r0, .L625+36
 	bl	printf
-.L603:
+.L619:
 	ldrh	r3, [r10, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L604
+	bne	.L620
 	ldrh	r2, [fp, r6]
 	cmp	r2, r3
-	beq	.L600
-.L604:
+	beq	.L616
+.L620:
 	movs	r2, #6
 	muls	r2, r3, r2
-	ldr	r3, .L609+40
+	ldr	r3, .L625+40
 	asrs	r1, r2, #1
 	muls	r3, r1, r3
 	ldr	r1, [r8]
@@ -4297,54 +4345,54 @@ List_update_data_list:
 	ldr	r1, [r7]
 	add	r2, r2, r1
 	ldrh	r3, [r2, #4]
-	cbz	r3, .L608
+	cbz	r3, .L624
 	muls	r3, r0, r3
-.L605:
+.L621:
 	cmp	r5, r3
-	bcs	.L600
-	ldr	r5, .L609+44
+	bcs	.L616
+	ldr	r5, .L625+44
 	mov	r1, r4
-	ldr	r0, .L609+16
+	ldr	r0, .L625+16
 	bl	List_remove_node
 	ldrh	r3, [r5]
-	cbnz	r3, .L606
-	ldr	r1, .L609+24
-	movw	r2, #515
-	ldr	r0, .L609+28
+	cbnz	r3, .L622
+	ldr	r1, .L625+24
+	movw	r2, #585
+	ldr	r0, .L625+28
 	bl	printf
-	ldr	r1, .L609+32
-	ldr	r0, .L609+36
+	ldr	r1, .L625+32
+	ldr	r0, .L625+36
 	bl	printf
-.L606:
+.L622:
 	ldrh	r3, [r5]
 	mov	r0, r4
 	subs	r3, r3, #1
 	strh	r3, [r5]	@ movhi
 	bl	INSERT_DATA_LIST
-.L600:
+.L616:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L607:
+.L623:
 	mov	r5, #-1
-	b	.L602
-.L608:
+	b	.L618
+.L624:
 	mov	r3, #-1
-	b	.L605
-.L610:
+	b	.L621
+.L626:
 	.align	2
-.L609:
-	.word	.LANCHOR91
-	.word	.LANCHOR92
+.L625:
 	.word	.LANCHOR93
-	.word	.LANCHOR81
-	.word	.LANCHOR82
-	.word	.LANCHOR83
 	.word	.LANCHOR94
+	.word	.LANCHOR95
+	.word	.LANCHOR83
+	.word	.LANCHOR84
+	.word	.LANCHOR85
+	.word	.LANCHOR96
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
 	.word	-1431655765
-	.word	.LANCHOR85
+	.word	.LANCHOR87
 	.size	List_update_data_list, .-List_update_data_list
 	.section	.text.ftl_map_blk_alloc_new_blk,"ax",%progbits
 	.align	1
@@ -4362,16 +4410,16 @@ ftl_map_blk_alloc_new_blk:
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r4, r0
 	movs	r3, #0
-.L612:
+.L628:
 	uxth	r5, r3
 	cmp	r5, r1
-	bcs	.L615
+	bcs	.L631
 	mov	r7, r2
 	adds	r3, r3, #1
 	ldrh	r6, [r7]
 	adds	r2, r2, #2
 	cmp	r6, #0
-	bne	.L612
+	bne	.L628
 	bl	FtlFreeSysBlkQueueOut
 	subs	r3, r0, #1
 	movw	r2, #65533
@@ -4379,14 +4427,14 @@ ftl_map_blk_alloc_new_blk:
 	mov	r1, r0
 	strh	r0, [r7]	@ movhi
 	cmp	r3, r2
-	bls	.L613
-	ldr	r3, .L619
-	ldr	r0, .L619+4
+	bls	.L629
+	ldr	r3, .L635
+	ldr	r0, .L635+4
 	ldrh	r2, [r3, #6]
 	bl	printf
-.L614:
-	b	.L614
-.L613:
+.L630:
+	b	.L630
+.L629:
 	ldr	r3, [r4, #28]
 	strh	r6, [r4, #2]	@ movhi
 	strh	r5, [r4]	@ movhi
@@ -4395,26 +4443,26 @@ ftl_map_blk_alloc_new_blk:
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-.L615:
+.L631:
 	ldrh	r3, [r4, #10]
 	cmp	r3, r5
-	bhi	.L617
-	ldr	r1, .L619+8
-	movw	r2, #629
-	ldr	r0, .L619+12
+	bhi	.L633
+	ldr	r1, .L635+8
+	movw	r2, #715
+	ldr	r0, .L635+12
 	bl	printf
-	ldr	r1, .L619+16
-	ldr	r0, .L619+20
+	ldr	r1, .L635+16
+	ldr	r0, .L635+20
 	bl	printf
-.L617:
+.L633:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L620:
+.L636:
 	.align	2
-.L619:
-	.word	.LANCHOR75
+.L635:
+	.word	.LANCHOR77
 	.word	.LC8
-	.word	.LANCHOR95
+	.word	.LANCHOR97
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
@@ -4432,86 +4480,86 @@ select_l2p_ram_region:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r1, #0
-	ldr	r3, .L631
+	ldr	r3, .L647
 	movs	r0, #12
 	movw	r5, #65535
 	ldrh	r2, [r3]
-	ldr	r3, .L631+4
+	ldr	r3, .L647+4
 	ldr	r3, [r3]
-.L622:
+.L638:
 	uxth	r4, r1
 	cmp	r4, r2
-	bcc	.L624
+	bcc	.L640
 	mov	r4, r2
 	movs	r1, #0
 	mov	r6, #-2147483648
 	movs	r7, #12
-.L625:
+.L641:
 	uxth	r5, r1
 	cmp	r5, r2
-	bcc	.L627
+	bcc	.L643
 	cmp	r4, r2
-	bcc	.L623
-	ldr	r1, .L631+8
+	bcc	.L639
+	ldr	r1, .L647+8
 	mov	r4, r2
 	mov	r0, #-1
 	ldrh	r7, [r1]
 	movs	r1, #0
-.L628:
+.L644:
 	uxth	r5, r1
 	cmp	r5, r2
-	bcc	.L630
+	bcc	.L646
 	cmp	r4, r2
-	bcc	.L623
-	movw	r2, #859
-	ldr	r1, .L631+12
-	ldr	r0, .L631+16
+	bcc	.L639
+	movw	r2, #977
+	ldr	r1, .L647+12
+	ldr	r0, .L647+16
 	bl	printf
-	ldr	r1, .L631+20
-	ldr	r0, .L631+24
+	ldr	r1, .L647+20
+	ldr	r0, .L647+24
 	bl	printf
-	b	.L623
-.L624:
+	b	.L639
+.L640:
 	adds	r1, r1, #1
 	mla	r6, r0, r1, r3
 	ldrh	r6, [r6, #-12]
 	cmp	r6, r5
-	bne	.L622
-.L623:
+	bne	.L638
+.L639:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, pc}
-.L627:
+.L643:
 	mla	r0, r7, r1, r3
 	ldr	r0, [r0, #4]
 	cmp	r0, #0
-	blt	.L626
+	blt	.L642
 	cmp	r6, r0
 	itt	hi
 	movhi	r6, r0
 	movhi	r4, r5
-.L626:
+.L642:
 	adds	r1, r1, #1
-	b	.L625
-.L630:
+	b	.L641
+.L646:
 	ldr	r6, [r3, #4]
 	cmp	r0, r6
-	bls	.L629
+	bls	.L645
 	ldrh	ip, [r3]
 	cmp	ip, r7
 	itt	ne
 	movne	r0, r6
 	movne	r4, r5
-.L629:
+.L645:
 	adds	r1, r1, #1
 	adds	r3, r3, #12
-	b	.L628
-.L632:
+	b	.L644
+.L648:
 	.align	2
-.L631:
+.L647:
 	.word	.LANCHOR67
-	.word	.LANCHOR96
-	.word	.LANCHOR97
 	.word	.LANCHOR98
+	.word	.LANCHOR99
+	.word	.LANCHOR100
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
@@ -4527,49 +4575,49 @@ select_l2p_ram_region:
 FtlUpdateVaildLpn:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L643
+	ldr	r2, .L659
 	push	{r4, r5, r6, lr}
 	mov	r1, r2
 	ldrh	r3, [r2]
 	cmp	r3, #4
-	bhi	.L634
-	cbnz	r0, .L634
+	bhi	.L650
+	cbnz	r0, .L650
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
 	pop	{r4, r5, r6, pc}
-.L634:
+.L650:
 	movs	r3, #0
-	ldr	r0, .L643+4
+	ldr	r0, .L659+4
 	strh	r3, [r1]	@ movhi
 	movw	r6, #65535
-	ldr	r1, .L643+8
+	ldr	r1, .L659+8
 	ldrh	r4, [r0]
 	mov	r0, r3
-	ldr	r2, .L643+12
+	ldr	r2, .L659+12
 	ldr	r1, [r1]
 	str	r3, [r2]
 	add	r4, r1, r4, lsl #1
-.L635:
+.L651:
 	cmp	r1, r4
-	bne	.L637
-	cbz	r3, .L633
+	bne	.L653
+	cbz	r3, .L649
 	str	r0, [r2]
-.L633:
+.L649:
 	pop	{r4, r5, r6, pc}
-.L637:
+.L653:
 	ldrh	r5, [r1], #2
 	cmp	r5, r6
 	itt	ne
 	addne	r0, r0, r5
 	movne	r3, #1
-	b	.L635
-.L644:
+	b	.L651
+.L660:
 	.align	2
-.L643:
-	.word	.LANCHOR99
+.L659:
+	.word	.LANCHOR101
 	.word	.LANCHOR40
-	.word	.LANCHOR83
-	.word	.LANCHOR100
+	.word	.LANCHOR85
+	.word	.LANCHOR102
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
 	.section	.text.ftl_set_blk_mode,"ax",%progbits
 	.align	1
@@ -4584,10 +4632,10 @@ ftl_set_blk_mode:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	mov	r3, r0
-	cbz	r1, .L646
-	b	ftl_set_blk_mode.part.10
-.L646:
-	ldr	r2, .L647
+	cbz	r1, .L662
+	b	ftl_set_blk_mode.part.11
+.L662:
+	ldr	r2, .L663
 	lsrs	r0, r0, #5
 	and	r3, r3, #31
 	ldr	r1, [r2]
@@ -4597,9 +4645,9 @@ ftl_set_blk_mode:
 	bic	r2, r2, r3
 	str	r2, [r1, r0, lsl #2]
 	bx	lr
-.L648:
+.L664:
 	.align	2
-.L647:
+.L663:
 	.word	.LANCHOR1
 	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
 	.section	.text.ftl_get_blk_mode,"ax",%progbits
@@ -4614,7 +4662,7 @@ ftl_get_blk_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L650
+	ldr	r3, .L666
 	lsrs	r2, r0, #5
 	and	r0, r0, #31
 	ldr	r3, [r3]
@@ -4622,9 +4670,9 @@ ftl_get_blk_mode:
 	lsr	r0, r3, r0
 	and	r0, r0, #1
 	bx	lr
-.L651:
+.L667:
 	.align	2
-.L650:
+.L666:
 	.word	.LANCHOR1
 	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
 	.section	.text.ftl_sb_update_avl_pages,"ax",%progbits
@@ -4642,14 +4690,14 @@ ftl_sb_update_avl_pages:
 	push	{r4, r5, r6, lr}
 	strh	r3, [r0, #4]	@ movhi
 	movw	r6, #65535
-	ldr	r3, .L659
+	ldr	r3, .L675
 	ldrh	r4, [r3]
 	add	r3, r0, r2, lsl #1
 	adds	r3, r3, #14
-.L653:
+.L669:
 	cmp	r2, r4
-	bcc	.L655
-	ldr	r3, .L659+4
+	bcc	.L671
+	ldr	r3, .L675+4
 	add	r5, r0, #16
 	movw	r6, #65535
 	ldrh	r3, [r3]
@@ -4657,12 +4705,12 @@ ftl_sb_update_avl_pages:
 	subs	r1, r3, r1
 	movs	r3, #0
 	uxth	r1, r1
-.L656:
+.L672:
 	uxth	r2, r3
 	cmp	r4, r2
-	bhi	.L658
+	bhi	.L674
 	pop	{r4, r5, r6, pc}
-.L655:
+.L671:
 	ldrh	r5, [r3, #2]!
 	adds	r2, r2, #1
 	uxth	r2, r2
@@ -4671,8 +4719,8 @@ ftl_sb_update_avl_pages:
 	ldrhne	r5, [r0, #4]
 	addne	r5, r5, #1
 	strhne	r5, [r0, #4]	@ movhi
-	b	.L653
-.L658:
+	b	.L669
+.L674:
 	ldrh	r2, [r5], #2
 	adds	r3, r3, #1
 	cmp	r2, r6
@@ -4680,10 +4728,10 @@ ftl_sb_update_avl_pages:
 	ldrhne	r2, [r0, #4]
 	addne	r2, r2, r1
 	strhne	r2, [r0, #4]	@ movhi
-	b	.L656
-.L660:
+	b	.L672
+.L676:
 	.align	2
-.L659:
+.L675:
 	.word	.LANCHOR38
 	.word	.LANCHOR52
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
@@ -4698,44 +4746,44 @@ ftl_sb_update_avl_pages:
 make_superblock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L674
+	ldr	r3, .L690
 	ldrh	r2, [r0]
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L662
-	ldr	r1, .L674+4
-	mov	r2, #2576
-	ldr	r0, .L674+8
+	bcc	.L678
+	ldr	r1, .L690+4
+	movw	r2, #2819
+	ldr	r0, .L690+8
 	bl	printf
-	ldr	r1, .L674+12
-	ldr	r0, .L674+16
+	ldr	r1, .L690+12
+	ldr	r0, .L690+16
 	bl	printf
-.L662:
-	ldr	r3, .L674+20
+.L678:
+	ldr	r3, .L690+20
 	add	r6, r4, #16
-	ldr	r10, .L674+40
+	ldr	r10, .L690+40
 	movw	r7, #65535
 	movs	r5, #0
 	ldrh	r8, [r3]
 	strh	r5, [r4, #4]	@ movhi
 	strb	r5, [r4, #7]
-.L663:
+.L679:
 	uxth	r3, r5
 	cmp	r8, r3
-	bhi	.L665
-	ldr	r2, .L674+24
+	bhi	.L681
+	ldr	r2, .L690+24
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r2]
 	smulbb	r3, r3, r2
 	strh	r3, [r4, #4]	@ movhi
 	movs	r3, #0
 	strb	r3, [r4, #9]
-	ldr	r3, .L674+28
+	ldr	r3, .L690+28
 	ldr	r3, [r3]
-	cbz	r3, .L666
-	ldr	r3, .L674+32
+	cbz	r3, .L682
+	ldr	r3, .L690+32
 	ldrh	r2, [r4]
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r2, lsl #1]
@@ -4743,43 +4791,43 @@ make_superblock:
 	itt	ls
 	movls	r3, #1
 	strbls	r3, [r4, #9]
-.L666:
-	ldr	r3, .L674+36
+.L682:
+	ldr	r3, .L690+36
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L667
+	cbz	r3, .L683
 	movs	r3, #1
 	strb	r3, [r4, #9]
-.L667:
+.L683:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L665:
+.L681:
 	ldrh	r1, [r4]
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
 	strh	r7, [r6]	@ movhi
 	mov	fp, r0
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L664
+	cbnz	r0, .L680
 	strh	fp, [r6]	@ movhi
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	strb	r3, [r4, #7]
-.L664:
+.L680:
 	adds	r5, r5, #1
 	adds	r6, r6, #2
-	b	.L663
-.L675:
+	b	.L679
+.L691:
 	.align	2
-.L674:
+.L690:
 	.word	.LANCHOR40
-	.word	.LANCHOR101
+	.word	.LANCHOR103
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
 	.word	.LANCHOR38
 	.word	.LANCHOR52
-	.word	.LANCHOR28
-	.word	.LANCHOR78
+	.word	.LANCHOR104
+	.word	.LANCHOR80
 	.word	.LANCHOR2
 	.word	.LANCHOR47
 	.size	make_superblock, .-make_superblock
@@ -4796,49 +4844,49 @@ update_multiplier_value:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
 	movs	r5, #0
-	ldr	r3, .L682
+	ldr	r3, .L698
 	mov	r6, r0
 	mov	r4, r5
-	ldr	r10, .L682+12
+	ldr	r10, .L698+12
 	ldrh	r7, [r3]
-	ldr	r3, .L682+4
+	ldr	r3, .L698+4
 	ldrh	r8, [r3]
-.L677:
+.L693:
 	uxth	r3, r5
 	cmp	r7, r3
-	bhi	.L679
-	cbz	r4, .L681
+	bhi	.L695
+	cbz	r4, .L697
 	mov	r1, r4
 	mov	r0, #32768
 	bl	__aeabi_idiv
-.L680:
-	ldr	r3, .L682+8
+.L696:
+	ldr	r3, .L698+8
 	movs	r2, #6
 	ldr	r3, [r3]
 	mla	r6, r2, r6, r3
 	strh	r0, [r6, #4]	@ movhi
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L679:
+.L695:
 	mov	r1, r6
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L678
+	cbnz	r0, .L694
 	add	r4, r4, r8
 	uxth	r4, r4
-.L678:
+.L694:
 	adds	r5, r5, #1
-	b	.L677
-.L681:
+	b	.L693
+.L697:
 	mov	r0, r4
-	b	.L680
-.L683:
+	b	.L696
+.L699:
 	.align	2
-.L682:
+.L698:
 	.word	.LANCHOR38
 	.word	.LANCHOR52
-	.word	.LANCHOR81
+	.word	.LANCHOR83
 	.word	.LANCHOR47
 	.size	update_multiplier_value, .-update_multiplier_value
 	.section	.text.GetFreeBlockMinEraseCount,"ax",%progbits
@@ -4853,28 +4901,28 @@ GetFreeBlockMinEraseCount:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L687
+	ldr	r3, .L703
 	ldr	r0, [r3]
-	cbz	r0, .L685
-	ldr	r3, .L687+4
+	cbz	r0, .L701
+	ldr	r3, .L703+4
 	ldr	r3, [r3]
 	subs	r0, r0, r3
-	ldr	r3, .L687+8
+	ldr	r3, .L703+8
 	asrs	r0, r0, #1
 	muls	r0, r3, r0
-	ldr	r3, .L687+12
+	ldr	r3, .L703+12
 	ldr	r3, [r3]
 	uxth	r0, r0
 	ldrh	r0, [r3, r0, lsl #1]
-.L685:
+.L701:
 	bx	lr
-.L688:
+.L704:
 	.align	2
-.L687:
-	.word	.LANCHOR87
-	.word	.LANCHOR81
+.L703:
+	.word	.LANCHOR89
+	.word	.LANCHOR83
 	.word	-1431655765
-	.word	.LANCHOR78
+	.word	.LANCHOR80
 	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
 	.section	.text.GetFreeBlockMaxEraseCount,"ax",%progbits
 	.align	1
@@ -4887,11 +4935,11 @@ GetFreeBlockMinEraseCount:
 GetFreeBlockMaxEraseCount:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L697
+	ldr	r3, .L713
 	push	{r4, r5, r6, lr}
 	ldr	r3, [r3]
-	cbz	r3, .L695
-	ldr	r2, .L697+4
+	cbz	r3, .L711
+	ldr	r2, .L713+4
 	movs	r5, #6
 	movw	r6, #65535
 	ldrh	r2, [r2]
@@ -4900,42 +4948,42 @@ GetFreeBlockMaxEraseCount:
 	cmp	r0, r2
 	it	gt
 	uxthgt	r0, r2
-	ldr	r2, .L697+8
+	ldr	r2, .L713+8
 	ldr	r1, [r2]
-	ldr	r2, .L697+12
+	ldr	r2, .L713+12
 	subs	r3, r3, r1
 	asrs	r3, r3, #1
 	muls	r3, r2, r3
 	movs	r2, #0
 	uxth	r3, r3
-.L692:
+.L708:
 	uxth	r4, r2
 	cmp	r0, r4
-	bls	.L694
+	bls	.L710
 	mul	r4, r5, r3
 	adds	r2, r2, #1
 	ldrh	r4, [r1, r4]
 	cmp	r4, r6
-	bne	.L696
-.L694:
-	ldr	r2, .L697+16
+	bne	.L712
+.L710:
+	ldr	r2, .L713+16
 	ldr	r2, [r2]
 	ldrh	r0, [r2, r3, lsl #1]
 	pop	{r4, r5, r6, pc}
-.L696:
+.L712:
 	mov	r3, r4
-	b	.L692
-.L695:
+	b	.L708
+.L711:
 	mov	r0, r3
 	pop	{r4, r5, r6, pc}
-.L698:
+.L714:
 	.align	2
-.L697:
-	.word	.LANCHOR87
-	.word	.LANCHOR88
-	.word	.LANCHOR81
+.L713:
+	.word	.LANCHOR89
+	.word	.LANCHOR90
+	.word	.LANCHOR83
 	.word	-1431655765
-	.word	.LANCHOR78
+	.word	.LANCHOR80
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
 	.section	.text.free_data_superblock,"ax",%progbits
 	.align	1
@@ -4951,19 +4999,19 @@ free_data_superblock:
 	movw	r2, #65535
 	push	{r3, lr}
 	cmp	r0, r2
-	beq	.L700
-	ldr	r2, .L701
+	beq	.L716
+	ldr	r2, .L717
 	movs	r1, #0
 	ldr	r2, [r2]
 	strh	r1, [r2, r0, lsl #1]	@ movhi
 	bl	INSERT_FREE_LIST
-.L700:
+.L716:
 	movs	r0, #0
 	pop	{r3, pc}
-.L702:
+.L718:
 	.align	2
-.L701:
-	.word	.LANCHOR83
+.L717:
+	.word	.LANCHOR85
 	.size	free_data_superblock, .-free_data_superblock
 	.section	.text.FtlGcBufInit,"ax",%progbits
 	.align	1
@@ -4978,54 +5026,54 @@ FtlGcBufInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #0
-	ldr	r1, .L708
+	ldr	r1, .L724
 	mov	fp, #1
-	ldr	r2, .L708+4
+	ldr	r2, .L724+4
 	ldr	r5, [r1]
-	ldr	r1, .L708+8
+	ldr	r1, .L724+8
 	str	r3, [r2]
-	ldr	r2, .L708+12
+	ldr	r2, .L724+12
 	mov	r0, r5
 	ldr	r1, [r1]
 	ldrh	r2, [r2]
 	str	r1, [sp, #4]
-	ldr	r1, .L708+16
+	ldr	r1, .L724+16
 	ldrh	r1, [r1]
 	str	r1, [sp]
-	ldr	r1, .L708+20
+	ldr	r1, .L724+20
 	ldr	r10, [r1]
-	ldr	r1, .L708+24
+	ldr	r1, .L724+24
 	ldrh	r7, [r1]
-	ldr	r1, .L708+28
+	ldr	r1, .L724+28
 	ldr	r4, [r1]
 	movs	r1, #12
 	mla	r1, r2, r1, r1
 	adds	r4, r4, #8
 	add	r8, r5, r1
 	mov	r1, r3
-.L704:
+.L720:
 	adds	r0, r0, #12
 	ldr	r6, [sp]
 	cmp	r0, r8
 	add	ip, r3, r7
 	add	r4, r4, #36
 	add	lr, r1, r6
-	bne	.L705
-	ldr	r3, .L708+32
+	bne	.L721
+	ldr	r3, .L724+32
 	mov	lr, #12
 	mov	r8, #0
 	ldr	r0, [r3]
-	ldr	r3, .L708+8
+	ldr	r3, .L724+8
 	ldr	r4, [r3]
-	ldr	r3, .L708+20
+	ldr	r3, .L724+20
 	ldr	ip, [r3]
-.L706:
+.L722:
 	cmp	r2, r0
-	bcc	.L707
+	bcc	.L723
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L705:
+.L721:
 	bic	r1, r1, #3
 	bic	r3, r3, #3
 	mov	r6, r1
@@ -5039,8 +5087,8 @@ FtlGcBufInit:
 	str	r3, [r4, #-32]
 	mov	r3, ip
 	str	r6, [r4, #-36]
-	b	.L704
-.L707:
+	b	.L720
+.L723:
 	ldr	r3, [sp]
 	mul	r10, lr, r2
 	muls	r3, r2, r3
@@ -5055,19 +5103,19 @@ FtlGcBufInit:
 	bic	r3, r3, #3
 	add	r3, r3, ip
 	str	r3, [r1, #4]
-	b	.L706
-.L709:
+	b	.L722
+.L725:
 	.align	2
-.L708:
-	.word	.LANCHOR103
-	.word	.LANCHOR102
-	.word	.LANCHOR104
+.L724:
+	.word	.LANCHOR106
+	.word	.LANCHOR105
+	.word	.LANCHOR107
 	.word	.LANCHOR38
 	.word	.LANCHOR57
-	.word	.LANCHOR105
+	.word	.LANCHOR108
 	.word	.LANCHOR58
-	.word	.LANCHOR106
-	.word	.LANCHOR107
+	.word	.LANCHOR109
+	.word	.LANCHOR110
 	.size	FtlGcBufInit, .-FtlGcBufInit
 	.section	.text.FtlGcBufFree,"ax",%progbits
 	.align	1
@@ -5080,43 +5128,43 @@ FtlGcBufInit:
 FtlGcBufFree:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L717
+	ldr	r3, .L733
 	mov	ip, #12
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
 	mov	fp, #36
 	mov	lr, r4
 	ldr	r7, [r3]
-	ldr	r3, .L717+4
+	ldr	r3, .L733+4
 	ldr	r5, [r3]
-.L711:
+.L727:
 	uxth	r3, r4
 	cmp	r1, r3
-	bls	.L710
+	bls	.L726
 	mla	r8, fp, r3, r0
 	movs	r2, #0
-.L712:
+.L728:
 	uxth	r3, r2
 	cmp	r7, r3
-	bls	.L713
+	bls	.L729
 	mul	r3, ip, r3
 	ldr	r6, [r8, #8]
 	adds	r2, r2, #1
 	add	r10, r5, r3
 	ldr	r3, [r5, r3]
 	cmp	r3, r6
-	bne	.L712
+	bne	.L728
 	str	lr, [r10, #8]
-.L713:
+.L729:
 	adds	r4, r4, #1
-	b	.L711
-.L710:
+	b	.L727
+.L726:
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L718:
+.L734:
 	.align	2
-.L717:
-	.word	.LANCHOR107
-	.word	.LANCHOR103
+.L733:
+	.word	.LANCHOR110
+	.word	.LANCHOR106
 	.size	FtlGcBufFree, .-FtlGcBufFree
 	.section	.text.FtlGcBufAlloc,"ax",%progbits
 	.align	1
@@ -5129,45 +5177,45 @@ FtlGcBufFree:
 FtlGcBufAlloc:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L726
+	ldr	r3, .L742
 	movs	r2, #0
 	push	{r4, r5, r6, r7, r8, r10, lr}
 	mov	ip, #12
 	movs	r7, #1
 	mov	lr, #36
 	ldr	r4, [r3]
-	ldr	r3, .L726+4
+	ldr	r3, .L742+4
 	ldr	r5, [r3]
-.L720:
+.L736:
 	uxth	r8, r2
 	cmp	r1, r8
-	bhi	.L724
+	bhi	.L740
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L724:
+.L740:
 	mov	r10, #0
-.L721:
+.L737:
 	uxth	r3, r10
 	cmp	r4, r3
-	bls	.L722
+	bls	.L738
 	mla	r3, ip, r3, r5
 	add	r10, r10, #1
 	ldr	r6, [r3, #8]
 	cmp	r6, #0
-	bne	.L721
+	bne	.L737
 	mla	r8, lr, r8, r0
 	str	r7, [r3, #8]
 	ldr	r6, [r3]
 	ldr	r3, [r3, #4]
 	str	r6, [r8, #8]
 	str	r3, [r8, #12]
-.L722:
+.L738:
 	adds	r2, r2, #1
-	b	.L720
-.L727:
+	b	.L736
+.L743:
 	.align	2
-.L726:
-	.word	.LANCHOR107
-	.word	.LANCHOR103
+.L742:
+	.word	.LANCHOR110
+	.word	.LANCHOR106
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
 	.section	.text.IsBlkInGcList,"ax",%progbits
 	.align	1
@@ -5181,27 +5229,27 @@ IsBlkInGcList:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L733
-	ldr	r2, .L733+4
+	ldr	r3, .L749
+	ldr	r2, .L749+4
 	ldr	r3, [r3]
 	ldrh	r2, [r2]
 	add	r2, r3, r2, lsl #1
-.L729:
+.L745:
 	cmp	r3, r2
-	bne	.L731
+	bne	.L747
 	movs	r0, #0
 	bx	lr
-.L731:
+.L747:
 	ldrh	r1, [r3], #2
 	cmp	r1, r0
-	bne	.L729
+	bne	.L745
 	movs	r0, #1
 	bx	lr
-.L734:
+.L750:
 	.align	2
-.L733:
-	.word	.LANCHOR108
-	.word	.LANCHOR109
+.L749:
+	.word	.LANCHOR111
+	.word	.LANCHOR112
 	.size	IsBlkInGcList, .-IsBlkInGcList
 	.section	.text.FtlGcUpdatePage,"ax",%progbits
 	.align	1
@@ -5216,35 +5264,35 @@ FtlGcUpdatePage:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r5, r0
-	ldr	r4, .L739
+	ldr	r4, .L755
 	ubfx	r0, r0, #10, #16
 	mov	r6, r1
 	mov	r7, r2
 	bl	P2V_block_in_plane
-	ldr	r3, .L739+4
+	ldr	r3, .L755+4
 	ldrh	r1, [r4]
 	ldr	r2, [r3]
 	movs	r3, #0
-.L736:
+.L752:
 	uxth	ip, r3
 	cmp	ip, r1
-	bcc	.L738
-	bne	.L737
+	bcc	.L754
+	bne	.L753
 	strh	r0, [r2, ip, lsl #1]	@ movhi
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	b	.L737
-.L738:
+	b	.L753
+.L754:
 	adds	r3, r3, #1
 	add	ip, r2, r3, lsl #1
 	ldrh	ip, [ip, #-2]
 	cmp	ip, r0
-	bne	.L736
-.L737:
-	ldr	r2, .L739+8
+	bne	.L752
+.L753:
+	ldr	r2, .L755+8
 	movs	r0, #12
-	ldr	r1, .L739+12
+	ldr	r1, .L755+12
 	ldrh	r3, [r2]
 	ldr	r1, [r1]
 	muls	r0, r3, r0
@@ -5255,13 +5303,13 @@ FtlGcUpdatePage:
 	str	r5, [r1, r0]
 	strh	r3, [r2]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.L740:
+.L756:
 	.align	2
-.L739:
-	.word	.LANCHOR109
-	.word	.LANCHOR108
-	.word	.LANCHOR110
+.L755:
+	.word	.LANCHOR112
 	.word	.LANCHOR111
+	.word	.LANCHOR113
+	.word	.LANCHOR114
 	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
 	.section	.text.FtlGcRefreshOpenBlock,"ax",%progbits
 	.align	1
@@ -5274,52 +5322,52 @@ FtlGcUpdatePage:
 FtlGcRefreshOpenBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	ip, .L746+12
+	ldr	ip, .L762+12
 	push	{r4, r5, r6, r7, lr}
 	ldrh	lr, [ip]
 	cmp	lr, r0
-	beq	.L742
-	ldr	r6, .L746
+	beq	.L758
+	ldr	r6, .L762
 	ldrh	r7, [r6]
 	cmp	r0, r7
-	beq	.L742
-	ldr	r4, .L746+4
+	beq	.L758
+	ldr	r4, .L762+4
 	ldrh	r5, [r4]
 	cmp	r0, r5
-	beq	.L742
-	ldr	r2, .L746+8
+	beq	.L758
+	ldr	r2, .L762+8
 	ldrh	r1, [r2]
 	cmp	r0, r1
-	beq	.L742
+	beq	.L758
 	movw	r3, #65535
 	cmp	lr, r3
-	bne	.L743
+	bne	.L759
 	strh	r0, [ip]	@ movhi
-.L742:
+.L758:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, pc}
-.L743:
+.L759:
 	cmp	r7, r3
-	bne	.L744
+	bne	.L760
 	strh	r0, [r6]	@ movhi
-	b	.L742
-.L744:
+	b	.L758
+.L760:
 	cmp	r5, r3
-	bne	.L745
+	bne	.L761
 	strh	r0, [r4]	@ movhi
-	b	.L742
-.L745:
+	b	.L758
+.L761:
 	cmp	r1, r3
 	it	eq
 	strheq	r0, [r2]	@ movhi
-	b	.L742
-.L747:
+	b	.L758
+.L763:
 	.align	2
-.L746:
-	.word	.LANCHOR113
-	.word	.LANCHOR114
+.L762:
+	.word	.LANCHOR116
+	.word	.LANCHOR117
+	.word	.LANCHOR118
 	.word	.LANCHOR115
-	.word	.LANCHOR112
 	.size	FtlGcRefreshOpenBlock, .-FtlGcRefreshOpenBlock
 	.section	.text.FtlGcRefreshBlock,"ax",%progbits
 	.align	1
@@ -5332,55 +5380,55 @@ FtlGcRefreshOpenBlock:
 FtlGcRefreshBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	ip, .L758+12
+	ldr	ip, .L774+12
 	push	{r4, r5, r6, r7, lr}
 	ldrh	lr, [ip]
 	cmp	lr, r0
-	beq	.L756
-	ldr	r6, .L758
+	beq	.L772
+	ldr	r6, .L774
 	ldrh	r7, [r6]
 	cmp	r0, r7
-	beq	.L756
-	ldr	r4, .L758+4
+	beq	.L772
+	ldr	r4, .L774+4
 	ldrh	r5, [r4]
 	cmp	r0, r5
-	beq	.L756
-	ldr	r2, .L758+8
+	beq	.L772
+	ldr	r2, .L774+8
 	ldrh	r1, [r2]
 	cmp	r0, r1
-	beq	.L756
+	beq	.L772
 	movw	r3, #65535
 	cmp	lr, r3
-	bne	.L750
+	bne	.L766
 	strh	r0, [ip]	@ movhi
-.L756:
+.L772:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, pc}
-.L750:
+.L766:
 	cmp	r7, r3
-	bne	.L751
+	bne	.L767
 	strh	r0, [r6]	@ movhi
-	b	.L756
-.L751:
+	b	.L772
+.L767:
 	cmp	r5, r3
-	bne	.L752
+	bne	.L768
 	strh	r0, [r4]	@ movhi
-	b	.L756
-.L752:
+	b	.L772
+.L768:
 	cmp	r1, r3
-	bne	.L757
+	bne	.L773
 	strh	r0, [r2]	@ movhi
-	b	.L756
-.L757:
+	b	.L772
+.L773:
 	mov	r0, #-1
 	pop	{r4, r5, r6, r7, pc}
-.L759:
+.L775:
 	.align	2
-.L758:
-	.word	.LANCHOR113
-	.word	.LANCHOR114
+.L774:
+	.word	.LANCHOR116
+	.word	.LANCHOR117
+	.word	.LANCHOR118
 	.word	.LANCHOR115
-	.word	.LANCHOR112
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
 	.section	.text.FtlGcMarkBadPhyBlk,"ax",%progbits
 	.align	1
@@ -5398,48 +5446,48 @@ FtlGcMarkBadPhyBlk:
 	bl	P2V_block_in_plane
 	mov	r5, r0
 	bl	FtlGcRefreshBlock
-	ldr	r3, .L768
+	ldr	r3, .L784
 	ldr	r3, [r3]
-	cbz	r3, .L761
-	ldr	r3, .L768+4
+	cbz	r3, .L777
+	ldr	r3, .L784+4
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r5, lsl #1]
 	cmp	r3, #39
 	itt	hi
 	subhi	r3, r3, #40
 	strhhi	r3, [r2, r5, lsl #1]	@ movhi
-.L761:
-	ldr	r2, .L768+8
+.L777:
+	ldr	r2, .L784+8
 	movs	r1, #0
-	ldr	r5, .L768+12
+	ldr	r5, .L784+12
 	ldrh	r3, [r2]
-.L762:
+.L778:
 	uxth	r0, r1
 	cmp	r3, r0
-	bhi	.L764
+	bhi	.L780
 	cmp	r3, #15
 	itttt	ls
 	addls	r1, r3, #1
 	strhls	r1, [r2]	@ movhi
-	ldrls	r2, .L768+12
+	ldrls	r2, .L784+12
 	strhls	r4, [r2, r3, lsl #1]	@ movhi
-	b	.L763
-.L764:
+	b	.L779
+.L780:
 	adds	r1, r1, #1
 	add	r0, r5, r1, lsl #1
 	ldrh	r0, [r0, #-2]
 	cmp	r0, r4
-	bne	.L762
-.L763:
+	bne	.L778
+.L779:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L769:
+.L785:
 	.align	2
-.L768:
-	.word	.LANCHOR28
-	.word	.LANCHOR78
-	.word	.LANCHOR116
-	.word	.LANCHOR117
+.L784:
+	.word	.LANCHOR104
+	.word	.LANCHOR80
+	.word	.LANCHOR119
+	.word	.LANCHOR120
 	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
 	.section	.text.FtlGcReFreshBadBlk,"ax",%progbits
 	.align	1
@@ -5452,22 +5500,22 @@ FtlGcMarkBadPhyBlk:
 FtlGcReFreshBadBlk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L776
+	ldr	r3, .L792
 	push	{r4, lr}
 	ldrh	r3, [r3]
-	cbz	r3, .L771
-	ldr	r2, .L776+4
+	cbz	r3, .L787
+	ldr	r2, .L792+4
 	ldrh	r1, [r2]
 	movw	r2, #65535
 	cmp	r1, r2
-	bne	.L771
-	ldr	r4, .L776+8
+	bne	.L787
+	ldr	r4, .L792+8
 	ldrh	r2, [r4]
 	cmp	r2, r3
 	itt	cs
 	movcs	r3, #0
 	strhcs	r3, [r4]	@ movhi
-	ldr	r3, .L776+12
+	ldr	r3, .L792+12
 	ldrh	r2, [r4]
 	ldrh	r0, [r3, r2, lsl #1]
 	bl	P2V_block_in_plane
@@ -5475,16 +5523,16 @@ FtlGcReFreshBadBlk:
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-.L771:
+.L787:
 	movs	r0, #0
 	pop	{r4, pc}
-.L777:
+.L793:
 	.align	2
-.L776:
-	.word	.LANCHOR116
-	.word	.LANCHOR112
-	.word	.LANCHOR118
-	.word	.LANCHOR117
+.L792:
+	.word	.LANCHOR119
+	.word	.LANCHOR115
+	.word	.LANCHOR121
+	.word	.LANCHOR120
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
 	.section	.text.flash_boot_enter_slc_mode,"ax",%progbits
 	.align	1
@@ -5498,18 +5546,18 @@ flash_boot_enter_slc_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L780
+	ldr	r3, .L796
 	ldr	r2, [r3]
-	ldr	r3, .L780+4
+	ldr	r3, .L796+4
 	cmp	r2, r3
-	bne	.L778
+	bne	.L794
 	b	flash_enter_slc_mode
-.L778:
+.L794:
 	bx	lr
-.L781:
+.L797:
 	.align	2
-.L780:
-	.word	.LANCHOR119
+.L796:
+	.word	.LANCHOR122
 	.word	1446522928
 	.size	flash_boot_enter_slc_mode, .-flash_boot_enter_slc_mode
 	.section	.text.flash_boot_exit_slc_mode,"ax",%progbits
@@ -5524,18 +5572,18 @@ flash_boot_exit_slc_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L784
+	ldr	r3, .L800
 	ldr	r2, [r3]
-	ldr	r3, .L784+4
+	ldr	r3, .L800+4
 	cmp	r2, r3
-	bne	.L782
+	bne	.L798
 	b	flash_exit_slc_mode
-.L782:
+.L798:
 	bx	lr
-.L785:
+.L801:
 	.align	2
-.L784:
-	.word	.LANCHOR119
+.L800:
+	.word	.LANCHOR122
 	.word	1446522928
 	.size	flash_boot_exit_slc_mode, .-flash_boot_exit_slc_mode
 	.section	.text.FW_FlashBlockErase.constprop.41,"ax",%progbits
@@ -5550,7 +5598,7 @@ FW_FlashBlockErase.constprop.41:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	mov	r4, r0
-	ldr	r3, .L787
+	ldr	r3, .L803
 	movs	r0, #0
 	ldr	r3, [r3]
 	ldrb	r5, [r3, #9]	@ zero_extendqisi2
@@ -5567,10 +5615,10 @@ FW_FlashBlockErase.constprop.41:
 	bl	flash_boot_exit_slc_mode
 	uxtb	r0, r4
 	pop	{r3, r4, r5, pc}
-.L788:
+.L804:
 	.align	2
-.L787:
-	.word	.LANCHOR18
+.L803:
+	.word	.LANCHOR7
 	.size	FW_FlashBlockErase.constprop.41, .-FW_FlashBlockErase.constprop.41
 	.section	.text.ftl_memset,"ax",%progbits
 	.align	1
@@ -5599,54 +5647,54 @@ BuildFlashLsbPageTable:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
 	mov	r4, r1
-	cbnz	r0, .L791
-	ldr	r3, .L831
-.L792:
+	cbnz	r0, .L807
+	ldr	r3, .L862
+.L808:
 	strh	r0, [r3, r0, lsl #1]	@ movhi
 	adds	r0, r0, #1
-	cmp	r0, #256
-	bne	.L792
-.L798:
+	cmp	r0, #512
+	bne	.L808
+.L814:
 	movs	r1, #255
-	mov	r2, #1024
-	ldr	r0, .L831+4
+	mov	r2, #2048
+	ldr	r0, .L862+4
 	uxth	r4, r4
 	bl	ftl_memset
-	ldr	r1, .L831
+	ldr	r1, .L862
 	movs	r3, #0
-	ldr	r0, .L831+4
-.L793:
+	ldr	r0, .L862+4
+.L809:
 	uxth	r2, r3
 	cmp	r4, r2
-	bhi	.L817
+	bhi	.L842
 	pop	{r4, pc}
-.L791:
+.L807:
 	cmp	r0, #1
-	bne	.L794
-	ldr	r1, .L831
+	bne	.L810
+	ldr	r1, .L862
 	movs	r3, #0
-.L797:
+.L813:
 	cmp	r3, #3
 	uxth	r2, r3
-	bls	.L795
+	bls	.L811
 	tst	r2, #1
 	ite	ne
 	movne	r0, #3
 	moveq	r0, #2
 	rsb	r2, r0, r2, lsl #1
 	uxth	r2, r2
-.L795:
+.L811:
 	strh	r2, [r1, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
-	cmp	r3, #256
-	bne	.L797
-	b	.L798
-.L794:
+	cmp	r3, #512
+	bne	.L813
+	b	.L814
+.L810:
 	cmp	r0, #2
-	bne	.L799
-	ldr	r1, .L831
+	bne	.L815
+	ldr	r1, .L862
 	movs	r2, #0
-.L801:
+.L817:
 	uxth	r3, r2
 	cmp	r2, #1
 	ittt	hi
@@ -5655,35 +5703,35 @@ BuildFlashLsbPageTable:
 	uxthhi	r3, r3
 	strh	r3, [r1, r2, lsl #1]	@ movhi
 	adds	r2, r2, #1
-	cmp	r2, #256
-	bne	.L801
-	b	.L798
-.L799:
+	cmp	r2, #512
+	bne	.L817
+	b	.L814
+.L815:
 	cmp	r0, #3
-	bne	.L802
-	ldr	r1, .L831
+	bne	.L818
+	ldr	r1, .L862
 	movs	r3, #0
-.L805:
+.L821:
 	cmp	r3, #5
 	uxth	r2, r3
-	bls	.L803
+	bls	.L819
 	tst	r2, #1
 	ite	ne
 	movne	r0, #5
 	moveq	r0, #4
 	rsb	r2, r0, r2, lsl #1
 	uxth	r2, r2
-.L803:
+.L819:
 	strh	r2, [r1, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
-	cmp	r3, #256
-	bne	.L805
-	b	.L798
-.L802:
+	cmp	r3, #512
+	bne	.L821
+	b	.L814
+.L818:
 	cmp	r0, #4
 	mov	r3, #0
-	bne	.L806
-	ldr	r2, .L831
+	bne	.L822
+	ldr	r2, .L862
 	strh	r3, [r2]	@ movhi
 	movs	r3, #1
 	strh	r3, [r2, #2]	@ movhi
@@ -5698,7 +5746,7 @@ BuildFlashLsbPageTable:
 	movs	r3, #8
 	strh	r0, [r2, #8]	@ movhi
 	strh	r3, [r2, #14]!	@ movhi
-.L808:
+.L824:
 	tst	r3, #1
 	ite	ne
 	movne	r1, #7
@@ -5707,54 +5755,54 @@ BuildFlashLsbPageTable:
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r1, [r2, #2]!	@ movhi
-	cmp	r3, #256
-	bne	.L808
-	b	.L798
-.L806:
+	cmp	r3, #512
+	bne	.L824
+	b	.L814
+.L822:
 	cmp	r0, #5
-	bne	.L809
-	ldr	r2, .L831
-.L810:
+	bne	.L825
+	ldr	r2, .L862
+.L826:
 	strh	r3, [r2, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	cmp	r3, #16
-	bne	.L810
-	ldr	r2, .L831+8
-.L811:
+	bne	.L826
+	ldr	r2, .L862+8
+.L827:
 	strh	r3, [r2, #2]!	@ movhi
 	adds	r3, r3, #2
 	uxth	r3, r3
-	cmp	r3, #496
-	bne	.L811
-	b	.L798
-.L809:
+	cmp	r3, #1008
+	bne	.L827
+	b	.L814
+.L825:
 	cmp	r0, #6
-	bne	.L812
-	ldr	r0, .L831
+	bne	.L828
+	ldr	r0, .L862
 	mov	r1, r3
-.L815:
+.L831:
 	cmp	r1, #5
 	uxth	r2, r1
-	bls	.L813
+	bls	.L829
 	tst	r2, #1
 	ite	ne
 	movne	r2, #12
 	moveq	r2, #10
 	subs	r2, r3, r2
 	uxth	r2, r2
-.L813:
+.L829:
 	strh	r2, [r0, r1, lsl #1]	@ movhi
 	adds	r1, r1, #1
-	cmp	r1, #256
+	cmp	r1, #512
 	add	r3, r3, #3
 	uxth	r3, r3
-	bne	.L815
-	b	.L798
-.L812:
+	bne	.L831
+	b	.L814
+.L828:
 	cmp	r0, #9
-	bne	.L798
-	ldr	r2, .L831
-	movw	r1, #509
+	bne	.L832
+	ldr	r2, .L862
+	movw	r1, #1021
 	strh	r3, [r2]	@ movhi
 	movs	r3, #1
 	strh	r3, [r2, #2]	@ movhi
@@ -5762,24 +5810,89 @@ BuildFlashLsbPageTable:
 	movs	r2, #2
 	strh	r2, [r3, #4]!	@ movhi
 	movs	r2, #3
-.L816:
+.L833:
 	strh	r2, [r3, #2]!	@ movhi
 	adds	r2, r2, #2
 	uxth	r2, r2
 	cmp	r2, r1
-	bne	.L816
-	b	.L798
-.L817:
+	bne	.L833
+	b	.L814
+.L832:
+	cmp	r0, #10
+	bne	.L834
+	ldr	r2, .L862
+.L835:
+	strh	r3, [r2, r3, lsl #1]	@ movhi
+	adds	r3, r3, #1
+	cmp	r3, #63
+	bne	.L835
+	ldr	r2, .L862+12
+	movw	r1, #961
+.L836:
+	strh	r3, [r2, #2]!	@ movhi
+	adds	r3, r3, #2
+	uxth	r3, r3
+	cmp	r3, r1
+	bne	.L836
+	b	.L814
+.L834:
+	cmp	r0, #11
+	bne	.L837
+	ldr	r2, .L862
+	movs	r3, #0
+.L838:
+	strh	r3, [r2, r3, lsl #1]	@ movhi
+	adds	r3, r3, #1
+	cmp	r3, #8
+	bne	.L838
+	ldr	r1, .L862+16
+.L840:
+	tst	r3, #1
+	ite	ne
+	movne	r2, #7
+	moveq	r2, #6
+	rsb	r2, r2, r3, lsl #1
+	adds	r3, r3, #1
+	uxth	r3, r3
+	strh	r2, [r1, #2]!	@ movhi
+	cmp	r3, #512
+	bne	.L840
+	b	.L814
+.L837:
+	cmp	r0, #12
+	bne	.L814
+	ldr	r3, .L862
+	movs	r2, #0
+	strh	r2, [r3]	@ movhi
+	movs	r2, #1
+	strh	r2, [r3, #2]	@ movhi
+	movs	r2, #2
+	strh	r2, [r3, #4]	@ movhi
+	movs	r2, #3
+	strh	r2, [r3, #6]!	@ movhi
+	movs	r2, #4
+.L841:
+	subs	r1, r2, #1
+	add	r1, r1, r2, lsr #1
+	adds	r2, r2, #1
+	uxth	r2, r2
+	strh	r1, [r3, #2]!	@ movhi
+	cmp	r2, #512
+	bne	.L841
+	b	.L814
+.L842:
 	ldrh	r2, [r1, r3, lsl #1]
 	adds	r3, r3, #1
 	strh	r2, [r0, r2, lsl #1]	@ movhi
-	b	.L793
-.L832:
+	b	.L809
+.L863:
 	.align	2
-.L831:
-	.word	.LANCHOR16
-	.word	.LANCHOR120
-	.word	.LANCHOR16+30
+.L862:
+	.word	.LANCHOR17
+	.word	.LANCHOR123
+	.word	.LANCHOR17+30
+	.word	.LANCHOR17+124
+	.word	.LANCHOR17+14
 	.size	BuildFlashLsbPageTable, .-BuildFlashLsbPageTable
 	.section	.text.FlashDieInfoInit,"ax",%progbits
 	.align	1
@@ -5792,82 +5905,82 @@ BuildFlashLsbPageTable:
 FlashDieInfoInit:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L847
+	ldr	r3, .L878
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r5, .L847+4
-	ldr	fp, .L847+36
+	ldr	r5, .L878+4
+	ldr	fp, .L878+36
 	ldrh	r0, [r3, #10]
 	strb	r4, [r5]
 	strb	r4, [fp]
 	bl	FlashBlockAlignInit
 	movs	r2, #8
 	mov	r1, r4
-	ldr	r0, .L847+8
+	ldr	r0, .L878+8
 	bl	ftl_memset
 	movs	r2, #32
 	mov	r1, r4
-	ldr	r0, .L847+12
+	ldr	r0, .L878+12
 	bl	ftl_memset
 	movs	r2, #128
 	mov	r1, r4
-	ldr	r0, .L847+16
+	ldr	r0, .L878+16
 	bl	ftl_memset
-	ldr	r3, .L847+20
-	ldr	r10, .L847+32
+	ldr	r3, .L878+20
+	ldr	r10, .L878+32
 	ldr	r6, [r3]
-	ldr	r3, .L847+8
+	ldr	r3, .L878+8
 	ldrb	r8, [r6]	@ zero_extendqisi2
 	adds	r7, r6, #1
-.L835:
+.L866:
 	mov	r2, r8
 	add	r1, r10, r4, lsl #3
 	mov	r0, r7
 	str	r3, [sp, #4]
 	bl	FlashMemCmp8
 	ldr	r3, [sp, #4]
-	cbnz	r0, .L834
+	cbnz	r0, .L865
 	ldrb	r2, [r5]	@ zero_extendqisi2
-	ldr	r1, .L847+12
+	ldr	r1, .L878+12
 	strb	r4, [r3, r2]
 	str	r0, [r1, r2, lsl #2]
 	adds	r1, r2, #1
 	strb	r1, [r5]
-.L834:
+.L865:
 	adds	r4, r4, #1
 	cmp	r4, #4
-	bne	.L835
+	bne	.L866
 	ldrb	r3, [r5]	@ zero_extendqisi2
 	strb	r3, [fp]
 	ldrb	r3, [r6, #8]	@ zero_extendqisi2
 	cmp	r3, #2
-	beq	.L836
-.L840:
+	beq	.L867
+.L871:
 	ldrh	r2, [r6, #14]
 	ldrb	r3, [r5]	@ zero_extendqisi2
 	smulbb	r3, r3, r2
 	ldrb	r2, [r6, #13]	@ zero_extendqisi2
 	smulbb	r3, r3, r2
-	ldr	r2, .L847+24
+	ldr	r2, .L878+24
 	strh	r3, [r2]	@ movhi
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L836:
-	ldr	r3, .L847+28
+.L867:
+	ldr	r3, .L878+28
 	movs	r4, #0
-	ldr	r10, .L847+12
+	ldr	r10, .L878+12
 	ldr	fp, [r3]
-	ldr	r3, .L847+8
-.L839:
+	ldr	r3, .L878+8
+.L870:
 	str	r3, [sp, #4]
 	mov	r2, r8
-	ldr	r3, .L847+32
+	ldr	r3, .L878+32
 	mov	r0, r7
 	add	r1, r3, r4, lsl #3
 	bl	FlashMemCmp8
 	ldr	r3, [sp, #4]
-	cbnz	r0, .L837
+	cbnz	r0, .L868
 	ldrh	r2, [r6, #14]
 	ldrb	r1, [r5]	@ zero_extendqisi2
 	and	r0, r2, #65280
@@ -5876,41 +5989,41 @@ FlashDieInfoInit:
 	muls	r2, r0, r2
 	str	r2, [r10, r1, lsl #2]
 	ldrb	r0, [r6, #23]	@ zero_extendqisi2
-	cbz	r0, .L838
+	cbz	r0, .L869
 	lsls	r2, r2, #1
 	str	r2, [r10, r1, lsl #2]
-.L838:
+.L869:
 	adds	r2, r1, #1
 	strb	r4, [r3, r1]
 	strb	r2, [r5]
-.L837:
+.L868:
 	adds	r4, r4, #1
 	cmp	r4, #4
-	bne	.L839
-	b	.L840
-.L848:
+	bne	.L870
+	b	.L871
+.L879:
 	.align	2
-.L847:
+.L878:
 	.word	.LANCHOR31
-	.word	.LANCHOR25
 	.word	.LANCHOR26
-	.word	.LANCHOR17
-	.word	.LANCHOR23
+	.word	.LANCHOR27
 	.word	.LANCHOR18
-	.word	.LANCHOR122
+	.word	.LANCHOR23
+	.word	.LANCHOR7
+	.word	.LANCHOR125
 	.word	.LANCHOR4
 	.word	.LANCHOR22
-	.word	.LANCHOR121
+	.word	.LANCHOR124
 	.size	FlashDieInfoInit, .-FlashDieInfoInit
-	.section	.text.ReadFlashInfo,"ax",%progbits
+	.section	.text.ftl_read_flash_info,"ax",%progbits
 	.align	1
-	.global	ReadFlashInfo
+	.global	ftl_read_flash_info
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ReadFlashInfo, %function
-ReadFlashInfo:
+	.type	ftl_read_flash_info, %function
+ftl_read_flash_info:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
@@ -5918,63 +6031,66 @@ ReadFlashInfo:
 	movs	r1, #0
 	mov	r4, r0
 	bl	ftl_memset
-	ldr	r3, .L852
+	ldr	r3, .L883
 	movs	r2, #0
 	ldr	r1, [r3]
-	ldr	r3, .L852+4
-	ldrb	r0, [r1, #9]	@ zero_extendqisi2
+	ldr	r3, .L883+4
+	ldrb	r5, [r1, #9]	@ zero_extendqisi2
 	ldr	r3, [r3]
-	smulbb	r3, r3, r0
+	smulbb	r3, r3, r5
 	uxth	r3, r3
+	lsrs	r0, r3, #8
 	strb	r3, [r4, #4]
-	lsrs	r3, r3, #8
-	strb	r3, [r4, #5]
-	ldr	r3, .L852+8
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	strb	r3, [r4, #7]
-	ldr	r3, .L852+12
-	ldrb	r5, [r3]	@ zero_extendqisi2
-	strb	r5, [r4]
-	ldrb	r5, [r3, #1]	@ zero_extendqisi2
-	strb	r5, [r4, #1]
-	ldrb	r5, [r3, #2]	@ zero_extendqisi2
-	ldrb	r3, [r3, #3]	@ zero_extendqisi2
-	strb	r0, [r4, #6]
-	strb	r5, [r4, #2]
+	strb	r0, [r4, #5]
+	ldr	r0, .L883+8
+	ldrb	r0, [r0]	@ zero_extendqisi2
+	strb	r0, [r4, #7]
+	ldrb	r0, [r1, #13]	@ zero_extendqisi2
+	muls	r3, r0, r3
+	ldrh	r0, [r1, #14]
+	muls	r0, r3, r0
+	ldrb	r3, [r1, #8]	@ zero_extendqisi2
+	strb	r5, [r4, #6]
 	movs	r5, #1
+	muls	r3, r0, r3
+	ubfx	r0, r3, #8, #8
+	strb	r3, [r4]
+	strb	r0, [r4, #1]
+	ubfx	r0, r3, #16, #8
+	lsrs	r3, r3, #24
+	strb	r0, [r4, #2]
+	ldr	r0, .L883+12
 	strb	r3, [r4, #3]
 	movs	r3, #32
 	strb	r3, [r4, #8]
 	ldrb	r3, [r1, #7]	@ zero_extendqisi2
-	ldr	r0, .L852+16
 	strb	r2, [r4, #10]
 	strb	r3, [r4, #9]
-	ldr	r3, .L852+20
+	ldr	r3, .L883+16
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	mov	r3, r2
-.L850:
+.L881:
 	uxtb	r2, r3
 	cmp	r1, r2
-	bhi	.L851
+	bhi	.L882
 	pop	{r4, r5, r6, pc}
-.L851:
+.L882:
 	ldrb	r2, [r3, r0]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	ldrb	r6, [r4, #10]	@ zero_extendqisi2
 	lsl	r2, r5, r2
 	orrs	r2, r2, r6
 	strb	r2, [r4, #10]
-	b	.L850
-.L853:
+	b	.L881
+.L884:
 	.align	2
-.L852:
-	.word	.LANCHOR18
+.L883:
+	.word	.LANCHOR7
 	.word	.LANCHOR4
 	.word	.LANCHOR33
-	.word	.LANCHOR68
+	.word	.LANCHOR27
 	.word	.LANCHOR26
-	.word	.LANCHOR25
-	.size	ReadFlashInfo, .-ReadFlashInfo
+	.size	ftl_read_flash_info, .-ftl_read_flash_info
 	.section	.text.FtlBbt2Bitmap,"ax",%progbits
 	.align	1
 	.global	FtlBbt2Bitmap
@@ -5986,35 +6102,35 @@ ReadFlashInfo:
 FtlBbt2Bitmap:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L860
+	ldr	r3, .L891
 	push	{r4, r5, r6, r7, r8, lr}
 	mov	r5, r0
-	ldr	r7, .L860+4
+	ldr	r7, .L891+4
 	mov	r6, r1
 	subs	r4, r5, #2
 	addw	r5, r5, #1022
 	ldrh	r2, [r3]
 	movs	r1, #0
-	ldr	r8, .L860+20
+	ldr	r8, .L891+24
 	mov	r0, r6
 	lsls	r2, r2, #2
 	bl	ftl_memset
-.L857:
+.L888:
 	ldrh	r3, [r4, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L854
+	beq	.L885
 	ldrh	r2, [r7]
 	cmp	r2, r3
-	bhi	.L856
+	bhi	.L887
 	mov	r1, r8
-	movs	r2, #79
-	ldr	r0, .L860+8
+	movs	r2, #92
+	ldr	r0, .L891+8
 	bl	printf
-	ldr	r1, .L860+12
-	ldr	r0, .L860+16
+	ldr	r1, .L891+12
+	ldr	r0, .L891+16
 	bl	printf
-.L856:
+.L887:
 	ldrh	r3, [r4, #2]!
 	movs	r2, #1
 	cmp	r5, r4
@@ -6024,18 +6140,23 @@ FtlBbt2Bitmap:
 	ldr	r2, [r6, r1, lsl #2]
 	orr	r2, r2, r3
 	str	r2, [r6, r1, lsl #2]
-	bne	.L857
-.L854:
+	ldr	r2, .L891+20
+	ldrh	r3, [r2, #6]
+	add	r3, r3, #1
+	strh	r3, [r2, #6]	@ movhi
+	bne	.L888
+.L885:
 	pop	{r4, r5, r6, r7, r8, pc}
-.L861:
+.L892:
 	.align	2
-.L860:
-	.word	.LANCHOR123
+.L891:
+	.word	.LANCHOR126
 	.word	.LANCHOR51
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LANCHOR124
+	.word	.LANCHOR76
+	.word	.LANCHOR127
 	.size	FtlBbt2Bitmap, .-FtlBbt2Bitmap
 	.section	.text.FtlBbtMemInit,"ax",%progbits
 	.align	1
@@ -6049,7 +6170,7 @@ FtlBbtMemInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r0, .L863
+	ldr	r0, .L894
 	movw	r3, #65535
 	movs	r2, #16
 	movs	r1, #255
@@ -6058,10 +6179,10 @@ FtlBbtMemInit:
 	strh	r3, [r0, #6]	@ movhi
 	adds	r0, r0, #12
 	b	ftl_memset
-.L864:
+.L895:
 	.align	2
-.L863:
-	.word	.LANCHOR74
+.L894:
+	.word	.LANCHOR76
 	.size	FtlBbtMemInit, .-FtlBbtMemInit
 	.section	.text.FtlFreeSysBlkQueueInit,"ax",%progbits
 	.align	1
@@ -6074,7 +6195,7 @@ FtlBbtMemInit:
 FtlFreeSysBlkQueueInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L866
+	ldr	r3, .L897
 	mov	r2, #2048
 	push	{r4, lr}
 	movs	r4, #0
@@ -6087,10 +6208,10 @@ FtlFreeSysBlkQueueInit:
 	bl	ftl_memset
 	mov	r0, r4
 	pop	{r4, pc}
-.L867:
+.L898:
 	.align	2
-.L866:
-	.word	.LANCHOR75
+.L897:
+	.word	.LANCHOR77
 	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
 	.section	.text.ftl_free_no_use_map_blk,"ax",%progbits
 	.align	1
@@ -6114,12 +6235,12 @@ ftl_free_no_use_map_blk:
 	mov	r0, r5
 	bl	ftl_memset
 	movs	r3, #0
-.L869:
+.L900:
 	ldrh	r1, [r4, #6]
 	uxth	r2, r3
 	cmp	r1, r2
-	bhi	.L873
-	ldr	r3, .L888
+	bhi	.L904
+	ldr	r3, .L919
 	movs	r6, #0
 	mov	r10, r6
 	ldrh	r2, [r3]
@@ -6127,59 +6248,59 @@ ftl_free_no_use_map_blk:
 	strh	r2, [r5, r3, lsl #1]	@ movhi
 	mov	r2, r6
 	ldrh	fp, [r5]
-.L874:
+.L905:
 	ldrh	r3, [r4, #10]
 	uxth	ip, r6
 	cmp	r3, ip
-	bhi	.L878
+	bhi	.L909
 	mov	r0, r10
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L873:
+.L904:
 	uxth	r2, r3
 	ldr	r1, [r6, r2, lsl #2]
 	movs	r2, #0
 	ubfx	r1, r1, #10, #16
-.L870:
+.L901:
 	ldrh	ip, [r4, #10]
 	uxth	r0, r2
 	cmp	ip, r0
-	bhi	.L872
+	bhi	.L903
 	adds	r3, r3, #1
-	b	.L869
-.L872:
+	b	.L900
+.L903:
 	uxth	r0, r2
 	ldrh	ip, [r7, r0, lsl #1]
 	cmp	ip, r1
-	bne	.L871
-	cbz	r1, .L871
+	bne	.L902
+	cbz	r1, .L902
 	ldrh	ip, [r5, r0, lsl #1]
 	add	ip, ip, #1
 	strh	ip, [r5, r0, lsl #1]	@ movhi
-.L871:
+.L902:
 	adds	r2, r2, #1
-	b	.L870
-.L878:
+	b	.L901
+.L909:
 	uxth	r1, r6
 	ldrh	r3, [r5, r1, lsl #1]
 	lsl	r8, r1, #1
 	cmp	fp, r3
-	bls	.L875
+	bls	.L906
 	ldrh	r0, [r7, r1, lsl #1]
 	add	r8, r8, r7
-	cbnz	r0, .L876
-.L877:
+	cbnz	r0, .L907
+.L908:
 	adds	r6, r6, #1
-	b	.L874
-.L875:
+	b	.L905
+.L906:
 	cmp	r3, #0
-	bne	.L877
+	bne	.L908
 	ldrh	r0, [r7, r1, lsl #1]
 	add	r8, r8, r7
 	cmp	r0, #0
-	beq	.L877
-.L879:
+	beq	.L908
+.L910:
 	movs	r1, #1
 	str	r2, [sp, #4]
 	bl	FtlFreeSysBlkQueueIn
@@ -6188,16 +6309,16 @@ ftl_free_no_use_map_blk:
 	ldrh	r3, [r4, #8]
 	subs	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	b	.L877
-.L876:
+	b	.L908
+.L907:
 	mov	r10, ip
 	mov	fp, r3
 	cmp	r3, #0
-	beq	.L879
-	b	.L877
-.L889:
+	beq	.L910
+	b	.L908
+.L920:
 	.align	2
-.L888:
+.L919:
 	.word	.LANCHOR53
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.section	.text.FtlL2PDataInit,"ax",%progbits
@@ -6213,14 +6334,14 @@ FtlL2PDataInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r1, #0
-	ldr	r5, .L893
-	ldr	r4, .L893+4
+	ldr	r5, .L924
+	ldr	r4, .L924+4
 	ldr	r2, [r5]
-	ldr	r7, .L893+8
-	ldr	r6, .L893+12
+	ldr	r7, .L924+8
+	ldr	r6, .L924+12
 	ldr	r0, [r4]
 	lsls	r2, r2, #1
-	ldr	r8, .L893+44
+	ldr	r8, .L924+44
 	bl	ftl_memset
 	ldrh	r3, [r7]
 	movs	r1, #255
@@ -6228,7 +6349,7 @@ FtlL2PDataInit:
 	ldr	r0, [r8]
 	muls	r2, r3, r2
 	bl	ftl_memset
-	ldr	r3, .L893+16
+	ldr	r3, .L924+16
 	movw	r0, #65535
 	ldrh	r1, [r6]
 	ldr	ip, [r8]
@@ -6239,59 +6360,59 @@ FtlL2PDataInit:
 	adds	r1, r2, r3
 	movs	r3, #0
 	mov	lr, r3
-.L891:
+.L922:
 	adds	r2, r2, #12
 	adds	r6, r3, r7
 	cmp	r2, r1
-	bne	.L892
-	ldr	r3, .L893+20
+	bne	.L923
+	ldr	r3, .L924+20
 	ldr	r2, [r5]
 	strh	r0, [r3, #2]	@ movhi
 	strh	r2, [r3, #10]	@ movhi
 	movw	r2, #61634
 	strh	r2, [r3, #4]	@ movhi
-	ldr	r2, .L893+24
+	ldr	r2, .L924+24
 	strh	r0, [r3]	@ movhi
 	ldrh	r2, [r2]
 	strh	r2, [r3, #8]	@ movhi
-	ldr	r2, .L893+28
+	ldr	r2, .L924+28
 	ldrh	r2, [r2]
 	strh	r2, [r3, #6]	@ movhi
-	ldr	r2, .L893+32
+	ldr	r2, .L924+32
 	ldr	r2, [r2]
 	str	r2, [r3, #12]
-	ldr	r2, .L893+36
+	ldr	r2, .L924+36
 	ldr	r2, [r2]
 	str	r2, [r3, #16]
 	ldr	r2, [r4]
 	str	r2, [r3, #20]
-	ldr	r2, .L893+40
+	ldr	r2, .L924+40
 	ldr	r2, [r2]
 	str	r2, [r3, #24]
 	pop	{r4, r5, r6, r7, r8, pc}
-.L892:
+.L923:
 	bic	r3, r3, #3
 	str	lr, [r2, #-8]
 	add	r3, r3, ip
 	strh	r0, [r2, #-12]	@ movhi
 	str	r3, [r2, #-4]
 	mov	r3, r6
-	b	.L891
-.L894:
+	b	.L922
+.L925:
 	.align	2
-.L893:
+.L924:
 	.word	.LANCHOR64
-	.word	.LANCHOR125
+	.word	.LANCHOR128
 	.word	.LANCHOR57
 	.word	.LANCHOR67
-	.word	.LANCHOR96
-	.word	.LANCHOR127
-	.word	.LANCHOR128
-	.word	.LANCHOR66
-	.word	.LANCHOR129
+	.word	.LANCHOR98
 	.word	.LANCHOR130
 	.word	.LANCHOR131
-	.word	.LANCHOR126
+	.word	.LANCHOR66
+	.word	.LANCHOR132
+	.word	.LANCHOR133
+	.word	.LANCHOR134
+	.word	.LANCHOR129
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
 	.section	.text.FtlVariablesInit,"ax",%progbits
 	.align	1
@@ -6306,71 +6427,71 @@ FtlVariablesInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #0
-	ldr	r3, .L896
+	ldr	r3, .L927
 	movw	r2, #65535
 	mov	r1, r4
-	ldr	r5, .L896+4
+	ldr	r5, .L927+4
 	str	r4, [r3]
-	ldr	r3, .L896+8
+	ldr	r3, .L927+8
 	strh	r2, [r3]	@ movhi
 	mov	r2, #-1
-	ldr	r3, .L896+12
+	ldr	r3, .L927+12
 	str	r4, [r3]
-	ldr	r3, .L896+16
+	ldr	r3, .L927+16
 	str	r4, [r3]
-	ldr	r3, .L896+20
+	ldr	r3, .L927+20
 	str	r2, [r3]
-	ldr	r3, .L896+24
+	ldr	r3, .L927+24
 	str	r4, [r3]
-	ldr	r3, .L896+28
+	ldr	r3, .L927+28
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L896+32
+	ldr	r3, .L927+32
 	ldrh	r2, [r3]
-	ldr	r3, .L896+36
+	ldr	r3, .L927+36
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L896+40
+	ldr	r3, .L927+40
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L896+44
+	ldr	r3, .L927+44
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	mov	r1, r4
 	movs	r2, #48
-	ldr	r0, .L896+48
+	ldr	r0, .L927+48
 	bl	ftl_memset
 	mov	r2, #512
 	mov	r1, r4
-	ldr	r0, .L896+52
+	ldr	r0, .L927+52
 	bl	ftl_memset
 	bl	FtlGcBufInit
 	bl	FtlL2PDataInit
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L897:
+.L928:
 	.align	2
-.L896:
-	.word	.LANCHOR132
-	.word	.LANCHOR41
-	.word	.LANCHOR133
-	.word	.LANCHOR134
+.L927:
 	.word	.LANCHOR135
+	.word	.LANCHOR41
 	.word	.LANCHOR136
-	.word	.LANCHOR28
+	.word	.LANCHOR137
+	.word	.LANCHOR138
+	.word	.LANCHOR139
+	.word	.LANCHOR104
 	.word	.LANCHOR70
 	.word	.LANCHOR61
 	.word	.LANCHOR71
-	.word	.LANCHOR78
-	.word	.LANCHOR137
 	.word	.LANCHOR80
-	.word	.LANCHOR138
+	.word	.LANCHOR140
+	.word	.LANCHOR82
+	.word	.LANCHOR141
 	.size	FtlVariablesInit, .-FtlVariablesInit
 	.section	.text.SupperBlkListInit,"ax",%progbits
 	.align	1
@@ -6383,11 +6504,11 @@ FtlVariablesInit:
 SupperBlkListInit:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L909
+	ldr	r3, .L940
 	movs	r2, #6
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r1, #0
-	ldr	r6, .L909+4
+	ldr	r6, .L940+4
 	sub	sp, sp, #24
 	movs	r4, #0
 	ldrh	r3, [r3]
@@ -6397,39 +6518,39 @@ SupperBlkListInit:
 	mov	r10, r6
 	muls	r2, r3, r2
 	bl	ftl_memset
-	ldr	r3, .L909+8
-	ldr	r2, .L909+12
-	ldr	r1, .L909+16
+	ldr	r3, .L940+8
+	ldr	r2, .L940+12
+	ldr	r1, .L940+16
 	str	r4, [r3]
-	ldr	r3, .L909+20
+	ldr	r3, .L940+20
 	strh	r4, [r2]	@ movhi
 	strh	r4, [r1]	@ movhi
 	str	r4, [r3]
-	ldr	r3, .L909+24
+	ldr	r3, .L940+24
 	str	r2, [sp, #8]
 	str	r4, [r3]
-	ldr	r3, .L909+28
+	ldr	r3, .L940+28
 	mov	fp, r3
 	strh	r4, [r3]	@ movhi
-.L899:
-	ldr	r3, .L909+32
+.L930:
+	ldr	r3, .L940+32
 	sxth	r7, r4
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	bge	.L906
-	ldr	r3, .L909+36
+	bge	.L937
+	ldr	r3, .L940+36
 	uxth	r1, r4
 	str	r1, [sp, #12]
 	ldrh	r2, [r3]
-	ldr	r3, .L909+40
+	ldr	r3, .L940+40
 	ldrh	r3, [r3]
 	str	r3, [sp, #4]
 	movs	r3, #0
 	mov	r6, r3
-	b	.L907
-.L901:
+	b	.L938
+.L932:
 	str	r3, [sp, #20]
-	ldr	r3, .L909+44
+	ldr	r3, .L940+44
 	ldr	r1, [sp, #12]
 	str	r2, [sp, #16]
 	ldrb	r0, [r3, r0]	@ zero_extendqisi2
@@ -6437,102 +6558,102 @@ SupperBlkListInit:
 	bl	FtlBbmIsBadBlock
 	ldr	r2, [sp, #16]
 	ldr	r3, [sp, #20]
-	cbnz	r0, .L900
+	cbnz	r0, .L931
 	ldr	r1, [sp, #4]
 	add	r6, r6, r1
 	sxth	r6, r6
-.L900:
+.L931:
 	adds	r3, r3, #1
-.L907:
+.L938:
 	sxth	r0, r3
 	cmp	r0, r2
-	blt	.L901
+	blt	.L932
 	lsls	r3, r7, #1
-	cbz	r6, .L902
+	cbz	r6, .L933
 	mov	r1, r6
 	str	r3, [sp, #4]
 	mov	r0, #32768
 	bl	__aeabi_idiv
 	ldr	r3, [sp, #4]
 	sxth	r6, r0
-.L903:
+.L934:
 	ldr	r2, [r10]
 	add	r3, r3, r7
 	add	r2, r2, r3, lsl #1
-	ldr	r3, .L909+48
+	ldr	r3, .L940+48
 	strh	r6, [r2, #4]	@ movhi
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	beq	.L904
-	ldr	r3, .L909+52
+	beq	.L935
+	ldr	r3, .L940+52
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	beq	.L904
-	ldr	r3, .L909+56
+	beq	.L935
+	ldr	r3, .L940+56
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	beq	.L904
-	ldr	r3, .L909+60
+	beq	.L935
+	ldr	r3, .L940+60
 	uxth	r0, r4
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r7, lsl #1]
-	cbnz	r3, .L905
+	cbnz	r3, .L936
 	add	r8, r8, #1
 	uxth	r8, r8
 	bl	INSERT_FREE_LIST
-.L904:
+.L935:
 	adds	r4, r4, #1
-	b	.L899
-.L902:
-	ldr	r2, .L909+60
+	b	.L930
+.L933:
+	ldr	r2, .L940+60
 	movw	r1, #65535
 	ldr	r2, [r2]
 	strh	r1, [r2, r7, lsl #1]	@ movhi
-	b	.L903
-.L905:
+	b	.L934
+.L936:
 	adds	r5, r5, #1
 	uxth	r5, r5
 	bl	INSERT_DATA_LIST
-	b	.L904
-.L906:
+	b	.L935
+.L937:
 	ldr	r2, [sp, #8]
 	strh	r8, [fp]	@ movhi
 	strh	r5, [r2]	@ movhi
 	add	r5, r5, r8
 	cmp	r3, r5
-	bge	.L908
-	ldr	r1, .L909+64
-	movw	r2, #2646
-	ldr	r0, .L909+68
+	bge	.L939
+	ldr	r1, .L940+64
+	movw	r2, #2899
+	ldr	r0, .L940+68
 	bl	printf
-	ldr	r1, .L909+72
-	ldr	r0, .L909+76
+	ldr	r1, .L940+72
+	ldr	r0, .L940+76
 	bl	printf
-.L908:
+.L939:
 	movs	r0, #0
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L910:
+.L941:
 	.align	2
-.L909:
+.L940:
 	.word	.LANCHOR41
-	.word	.LANCHOR81
+	.word	.LANCHOR83
+	.word	.LANCHOR89
 	.word	.LANCHOR87
-	.word	.LANCHOR85
-	.word	.LANCHOR139
-	.word	.LANCHOR82
+	.word	.LANCHOR142
 	.word	.LANCHOR84
-	.word	.LANCHOR88
+	.word	.LANCHOR86
+	.word	.LANCHOR90
 	.word	.LANCHOR40
 	.word	.LANCHOR38
 	.word	.LANCHOR52
 	.word	.LANCHOR47
-	.word	.LANCHOR91
-	.word	.LANCHOR92
 	.word	.LANCHOR93
-	.word	.LANCHOR83
-	.word	.LANCHOR140
+	.word	.LANCHOR94
+	.word	.LANCHOR95
+	.word	.LANCHOR85
+	.word	.LANCHOR143
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
@@ -6548,16 +6669,16 @@ SupperBlkListInit:
 FtlGcPageVarInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L912
+	ldr	r2, .L943
 	movs	r3, #0
 	push	{r4, lr}
 	movs	r1, #255
-	ldr	r4, .L912+4
+	ldr	r4, .L943+4
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L912+8
+	ldr	r2, .L943+8
 	strh	r3, [r2]	@ movhi
 	ldrh	r2, [r4]
-	ldr	r3, .L912+12
+	ldr	r3, .L943+12
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
@@ -6565,19 +6686,19 @@ FtlGcPageVarInit:
 	movs	r2, #12
 	movs	r1, #255
 	muls	r2, r3, r2
-	ldr	r3, .L912+16
+	ldr	r3, .L943+16
 	ldr	r0, [r3]
 	bl	ftl_memset
 	pop	{r4, lr}
 	b	FtlGcBufInit
-.L913:
+.L944:
 	.align	2
-.L912:
-	.word	.LANCHOR109
+.L943:
+	.word	.LANCHOR112
 	.word	.LANCHOR54
-	.word	.LANCHOR110
-	.word	.LANCHOR108
+	.word	.LANCHOR113
 	.word	.LANCHOR111
+	.word	.LANCHOR114
 	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
 	.section	.text.idb_init,"ax",%progbits
 	.align	1
@@ -6593,13 +6714,13 @@ idb_init:
 	push	{r3, lr}
 	mov	r2, #262144
 	movs	r1, #0
-	ldr	r0, .L915
+	ldr	r0, .L946
 	bl	ftl_memset
 	movs	r0, #0
 	pop	{r3, pc}
-.L916:
+.L947:
 	.align	2
-.L915:
+.L946:
 	.word	idb_buf
 	.size	idb_init, .-idb_init
 	.section	.text.ftl_memcpy,"ax",%progbits
@@ -6629,14 +6750,14 @@ FlashReadIdbData:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	mov	r2, #2048
-	ldr	r1, .L919
+	ldr	r1, .L950
 	bl	ftl_memcpy
 	movs	r0, #0
 	pop	{r3, pc}
-.L920:
+.L951:
 	.align	2
-.L919:
-	.word	.LANCHOR141
+.L950:
+	.word	.LANCHOR144
 	.size	FlashReadIdbData, .-FlashReadIdbData
 	.section	.text.FlashLoadPhyInfoInRam,"ax",%progbits
 	.align	1
@@ -6651,35 +6772,35 @@ FlashLoadPhyInfoInRam:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r6, #0
-	ldr	r7, .L929
-	ldr	r5, .L929+4
-.L924:
+	ldr	r7, .L960
+	ldr	r5, .L960+4
+.L955:
 	ldrb	r2, [r7, #-1]	@ zero_extendqisi2
 	mov	r1, r5
 	mov	r0, r7
 	lsl	r8, r6, #5
 	bl	FlashMemCmp8
 	mov	r4, r0
-	cbnz	r0, .L922
-	ldr	r5, .L929+8
+	cbnz	r0, .L953
+	ldr	r5, .L960+8
 	mov	r3, r4
-	ldr	r2, .L929+12
+	ldr	r2, .L960+12
 	add	r5, r5, r8
 	ldrb	r0, [r5, #22]	@ zero_extendqisi2
 	mov	r1, r2
-.L923:
+.L954:
 	lsls	r6, r3, #5
 	ldrb	r6, [r6, r2]	@ zero_extendqisi2
 	cmp	r6, r0
-	beq	.L926
+	beq	.L957
 	adds	r3, r3, #1
 	cmp	r3, #4
-	bne	.L923
-.L926:
-	ldr	r6, .L929+16
+	bne	.L954
+.L957:
+	ldr	r6, .L960+16
 	add	r1, r1, r3, lsl #5
 	movs	r2, #32
-	ldr	r0, .L929+20
+	ldr	r0, .L960+20
 	bl	ftl_memcpy
 	movs	r2, #32
 	mov	r1, r5
@@ -6687,52 +6808,29 @@ FlashLoadPhyInfoInRam:
 	bl	ftl_memcpy
 	ldrh	r0, [r6, #10]
 	bl	FlashBlockAlignInit
-	b	.L921
-.L922:
+	b	.L952
+.L953:
 	adds	r6, r6, #1
 	adds	r7, r7, #32
-	cmp	r6, #81
-	bne	.L924
+	cmp	r6, #86
+	bne	.L955
 	mov	r4, #-1
-.L921:
+.L952:
 	mov	r0, r4
 	pop	{r4, r5, r6, r7, r8, pc}
-.L930:
+.L961:
 	.align	2
-.L929:
-	.word	.LANCHOR142+1
+.L960:
+	.word	.LANCHOR145+1
 	.word	.LANCHOR22
-	.word	.LANCHOR142
-	.word	.LANCHOR143
+	.word	.LANCHOR145
+	.word	.LANCHOR146
 	.word	.LANCHOR31
-	.word	.LANCHOR7
+	.word	.LANCHOR8
 	.size	FlashLoadPhyInfoInRam, .-FlashLoadPhyInfoInRam
-	.section	.text.ftl_memcpy32,"ax",%progbits
+	.section	.text.NandcCopy1KB,"ax",%progbits
 	.align	1
-	.global	ftl_memcpy32
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_memcpy32, %function
-ftl_memcpy32:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	movs	r3, #0
-	push	{r4, lr}
-.L932:
-	cmp	r3, r2
-	bne	.L933
-	pop	{r4, pc}
-.L933:
-	ldr	r4, [r1, r3, lsl #2]
-	str	r4, [r0, r3, lsl #2]
-	adds	r3, r3, #1
-	b	.L932
-	.size	ftl_memcpy32, .-ftl_memcpy32
-	.section	.text.NandcCopy1KB,"ax",%progbits
-	.align	1
-	.global	NandcCopy1KB
+	.global	NandcCopy1KB
 	.syntax unified
 	.thumb
 	.thumb_func
@@ -6748,15 +6846,13 @@ NandcCopy1KB:
 	add	r6, r0, #512
 	add	r0, r2, r4, lsl #9
 	ldr	r5, [sp, #16]
-	bne	.L935
-	cbz	r3, .L936
-	lsls	r1, r3, #30
-	bne	.L937
-	mov	r2, #256
+	bne	.L963
+	cbz	r3, .L964
+	mov	r2, #1024
 	mov	r1, r3
-	bl	ftl_memcpy32
-.L936:
-	cbz	r5, .L934
+	bl	ftl_memcpy
+.L964:
+	cbz	r5, .L962
 	ldrb	r2, [r5, #1]	@ zero_extendqisi2
 	lsrs	r4, r4, #1
 	ldrb	r3, [r5]	@ zero_extendqisi2
@@ -6769,21 +6865,14 @@ NandcCopy1KB:
 	orr	r3, r3, r2, lsl #24
 	str	r3, [r6, r4]
 	pop	{r4, r5, r6, pc}
-.L937:
-	mov	r2, #1024
-	mov	r1, r3
-	bl	ftl_memcpy
-	b	.L936
-.L935:
-	cbz	r3, .L940
-	lsls	r2, r3, #30
-	bne	.L941
+.L963:
+	cbz	r3, .L967
 	mov	r1, r0
-	mov	r2, #256
+	mov	r2, #1024
 	mov	r0, r3
-	bl	ftl_memcpy32
-.L940:
-	cbz	r5, .L934
+	bl	ftl_memcpy
+.L967:
+	cbz	r5, .L962
 	lsrs	r4, r4, #1
 	add	r4, r4, r4, lsl #1
 	lsls	r4, r4, #4
@@ -6795,14 +6884,8 @@ NandcCopy1KB:
 	lsrs	r3, r3, #24
 	strb	r2, [r5, #2]
 	strb	r3, [r5, #3]
-.L934:
+.L962:
 	pop	{r4, r5, r6, pc}
-.L941:
-	mov	r1, r0
-	mov	r2, #1024
-	mov	r0, r3
-	bl	ftl_memcpy
-	b	.L940
 	.size	NandcCopy1KB, .-NandcCopy1KB
 	.section	.text.NandcXferData,"ax",%progbits
 	.align	1
@@ -6817,82 +6900,81 @@ NandcXferData:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r7, r3
-	ldr	r3, .L988
+	ldr	r3, .L1014
+	mov	fp, r2
+	lsls	r2, r7, #26
 	sub	sp, sp, #96
 	mov	r6, r0
-	mov	r10, r2
-	str	r1, [sp, #12]
-	ldr	r5, [r3, r0, lsl #3]
-	lsls	r3, r7, #26
+	mov	r5, r1
 	ldr	r4, [sp, #128]
-	bne	.L953
-	cbnz	r4, .L954
+	ldr	r10, [r3, r0, lsl #3]
+	bne	.L979
+	cbnz	r4, .L980
 	add	r4, sp, #32
 	movs	r2, #64
 	movs	r1, #255
 	add	r0, sp, #32
 	bl	ftl_memset
-.L954:
-	movs	r3, #0
-	mov	r2, r10
-	ldr	r1, [sp, #12]
+.L980:
+	mov	r1, r5
 	mov	r0, r6
 	str	r4, [sp, #4]
+	movs	r3, #0
 	str	r7, [sp]
+	mov	r2, fp
 	bl	NandcXferStart
+	mov	r1, r5
 	mov	r0, r6
 	bl	NandcXferComp
-	ldr	r3, [sp, #12]
-	cmp	r3, #0
-	bne	.L978
-	ldr	r2, .L988+4
-	lsr	r0, r10, #1
-	ldr	ip, .L988+12
+	cmp	r5, #0
+	bne	.L1004
+	ldr	r2, .L1014+4
+	lsr	r0, fp, #1
+	ldr	ip, .L1014+12
+	mov	r1, r5
 	ldr	r3, [r2]
 	cmp	r3, #25
-	ldr	r3, [sp, #12]
+	mov	r3, r5
 	ite	cc
 	movcc	r7, #64
 	movcs	r7, #128
-	mov	r1, r3
-.L957:
+.L983:
 	cmp	r1, r0
 	add	r4, r4, #4
 	add	r6, r7, r3
-	bcc	.L958
-	ldr	r3, .L988+8
-	lsr	r4, r10, #2
+	bcc	.L984
+	ldr	r3, .L1014+8
+	lsr	r4, fp, #2
 	ldr	r0, [r2]
 	movs	r2, #0
 	mov	r8, r2
 	ldr	r1, [r3]
-.L959:
+.L985:
 	cmp	r2, r4
-	bcs	.L955
-	cbnz	r0, .L965
-.L955:
+	bcs	.L981
+	cbnz	r0, .L991
+.L981:
 	movs	r3, #0
-	str	r3, [r5, #16]
-.L966:
-	ldr	r3, .L988+8
+	str	r3, [r10, #16]
+.L992:
+	ldr	r3, .L1014+8
 	ldr	r3, [r3]
 	cmp	r3, #5
-	bls	.L952
-	ldr	r3, [sp, #12]
-	cbnz	r3, .L952
-	ldr	r3, [r5]
+	bls	.L978
+	cbnz	r5, .L978
+	ldr	r3, [r10]
 	and	r2, r3, #139264
 	cmp	r2, #139264
 	ittt	eq
 	moveq	r8, #-1
 	orreq	r3, r3, #131072
-	streq	r3, [r5]
-.L952:
+	streq	r3, [r10]
+.L978:
 	mov	r0, r8
 	add	sp, sp, #96
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L958:
+.L984:
 	bic	lr, r3, #3
 	ldr	r3, [ip, #4]
 	adds	r1, r1, #1
@@ -6905,20 +6987,20 @@ NandcXferData:
 	strb	lr, [r4, #-2]
 	strb	r3, [r4, #-1]
 	mov	r3, r6
-	b	.L957
-.L965:
+	b	.L983
+.L991:
 	add	r3, r2, #8
-	ldr	r3, [r5, r3, lsl #2]
+	ldr	r3, [r10, r3, lsl #2]
 	str	r3, [sp, #28]
 	ldr	r3, [sp, #28]
 	lsls	r6, r3, #29
-	bmi	.L981
+	bmi	.L1007
 	ldr	r3, [sp, #28]
 	ubfx	r3, r3, #15, #1
 	cmp	r3, #0
-	bne	.L981
+	bne	.L1007
 	cmp	r1, #5
-	bls	.L961
+	bls	.L987
 	ldr	r6, [sp, #28]
 	ldr	r3, [sp, #28]
 	ubfx	r6, r6, #3, #5
@@ -6939,18 +7021,18 @@ NandcXferData:
 	ite	hi
 	ubfxhi	r6, r6, #27, #1
 	ubfxls	r6, r6, #29, #1
-.L987:
+.L1013:
 	orr	r3, r3, r6, lsl #5
-.L963:
+.L989:
 	cmp	r8, r3
 	it	cc
 	movcc	r8, r3
-.L960:
+.L986:
 	adds	r2, r2, #1
-	b	.L959
-.L961:
+	b	.L985
+.L987:
 	cmp	r1, #3
-	bls	.L963
+	bls	.L989
 	ldr	r6, [sp, #28]
 	ldr	r3, [sp, #28]
 	ubfx	r6, r6, #3, #5
@@ -6971,37 +7053,37 @@ NandcXferData:
 	ite	hi
 	ubfxhi	r6, r6, #28, #1
 	ubfxls	r6, r6, #30, #1
-	b	.L987
-.L981:
+	b	.L1013
+.L1007:
 	mov	r8, #-1
-	b	.L960
-.L978:
+	b	.L986
+.L1004:
 	mov	r8, #0
-	b	.L955
-.L953:
-	ldr	r3, [sp, #12]
-	cmp	r3, #1
-	bne	.L967
+	b	.L981
+.L979:
+	cmp	r1, #1
+	bne	.L993
 	cmp	r4, #0
 	mov	r8, #0
 	ite	ne
 	movne	r3, #4
 	moveq	r3, #0
 	str	r3, [sp, #16]
-.L968:
-	cmp	r8, r10
-	bcc	.L970
+.L994:
+	cmp	r8, fp
+	bcc	.L996
 	mov	r8, #0
-	b	.L966
-.L970:
-	and	fp, r8, #3
-	cbz	r7, .L983
+	b	.L992
+.L996:
+	and	r3, r8, #3
+	str	r3, [sp, #12]
+	cbz	r7, .L1009
 	add	r3, r7, r8, lsl #9
-.L969:
+.L995:
 	str	r4, [sp]
-	mov	r2, fp
 	movs	r1, #1
-	mov	r0, r5
+	ldr	r2, [sp, #12]
+	mov	r0, r10
 	bl	NandcCopy1KB
 	movs	r3, #0
 	movs	r2, #2
@@ -7009,18 +7091,19 @@ NandcXferData:
 	movs	r1, #1
 	str	r3, [sp]
 	mov	r0, r6
-	mov	r3, fp
+	ldr	r3, [sp, #12]
 	add	r8, r8, #2
 	bl	NandcXferStart
+	movs	r1, #1
 	mov	r0, r6
 	bl	NandcXferComp
 	ldr	r3, [sp, #16]
 	add	r4, r4, r3
-	b	.L968
-.L983:
+	b	.L994
+.L1009:
 	mov	r3, r7
-	b	.L969
-.L967:
+	b	.L995
+.L993:
 	mov	r8, #0
 	movs	r2, #2
 	mov	r3, r8
@@ -7028,24 +7111,25 @@ NandcXferData:
 	str	r8, [sp]
 	mov	r1, r8
 	bl	NandcXferStart
-	mov	fp, r7
 	cmp	r4, r8
-	str	r4, [sp, #16]
+	str	r4, [sp, #12]
 	mov	r4, r8
 	ite	ne
 	movne	r3, #4
 	moveq	r3, r8
+	str	r7, [sp, #16]
 	str	r3, [sp, #20]
-.L971:
-	cmp	r4, r10
-	bcs	.L966
+.L997:
+	cmp	r4, fp
+	bcs	.L992
+	mov	r1, r5
 	mov	r0, r6
-	adds	r4, r4, #2
 	bl	NandcXferComp
-	ldr	r3, [r5, #32]
-	cmp	r10, r4
+	adds	r4, r4, #2
+	ldr	r3, [r10, #32]
+	cmp	fp, r4
 	str	r3, [sp, #28]
-	bls	.L972
+	bls	.L998
 	movs	r3, #0
 	movs	r2, #2
 	str	r3, [sp, #4]
@@ -7054,10 +7138,10 @@ NandcXferData:
 	mov	r0, r6
 	and	r3, r4, #3
 	bl	NandcXferStart
-.L972:
+.L998:
 	ldr	r3, [sp, #28]
 	lsls	r3, r3, #29
-	bmi	.L984
+	bmi	.L1010
 	ldr	r3, [sp, #28]
 	ldr	r2, [sp, #28]
 	ubfx	r3, r3, #3, #5
@@ -7066,30 +7150,32 @@ NandcXferData:
 	cmp	r8, r3
 	it	cc
 	movcc	r8, r3
-.L973:
-	ldr	r3, [sp, #16]
+.L999:
+	ldr	r3, [sp, #12]
 	cmp	r7, #0
 	sub	r2, r4, #2
 	mov	r1, #0
 	and	r2, r2, #3
-	mov	r0, r5
+	mov	r0, r10
 	str	r3, [sp]
-	ite	ne
-	movne	r3, fp
+	ldr	r3, [sp, #16]
+	it	eq
 	moveq	r3, #0
-	add	fp, fp, #1024
 	bl	NandcCopy1KB
 	ldr	r3, [sp, #16]
 	ldr	r2, [sp, #20]
-	add	r3, r3, r2
+	add	r3, r3, #1024
 	str	r3, [sp, #16]
-	b	.L971
-.L984:
+	ldr	r3, [sp, #12]
+	add	r3, r3, r2
+	str	r3, [sp, #12]
+	b	.L997
+.L1010:
 	mov	r8, #-1
-	b	.L973
-.L989:
+	b	.L999
+.L1015:
 	.align	2
-.L988:
+.L1014:
 	.word	.LANCHOR0
 	.word	.LANCHOR32
 	.word	.LANCHOR34
@@ -7108,21 +7194,21 @@ FlashReadRawPage:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r8, r3
-	ldr	r3, .L992
+	ldr	r3, .L1018
 	mov	r6, r1
 	mov	r7, r2
 	mov	r4, r0
 	ldrb	r5, [r3, #9]	@ zero_extendqisi2
-	cbnz	r0, .L991
-	ldr	r3, .L992+4
-	ldr	r2, .L992+8
+	cbnz	r0, .L1017
+	ldr	r3, .L1018+4
+	ldr	r2, .L1018+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	ldr	r0, [r2]
 	muls	r0, r3, r0
 	cmp	r0, r1
 	it	hi
 	movhi	r5, #4
-.L991:
+.L1017:
 	mov	r0, r4
 	bl	NandcWaitFlashReady
 	mov	r0, r4
@@ -7145,9 +7231,9 @@ FlashReadRawPage:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L993:
+.L1019:
 	.align	2
-.L992:
+.L1018:
 	.word	.LANCHOR31
 	.word	.LANCHOR3
 	.word	.LANCHOR4
@@ -7165,7 +7251,7 @@ FlashDdrTunningRead:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r7, r3
-	ldr	r3, .L1019
+	ldr	r3, .L1045
 	sub	sp, sp, #24
 	str	r0, [sp, #8]
 	ldr	r3, [r3]
@@ -7173,7 +7259,7 @@ FlashDdrTunningRead:
 	str	r2, [sp, #4]
 	ldr	r3, [r3, #304]
 	str	r3, [sp, #20]
-	ldr	r3, .L1019+4
+	ldr	r3, .L1045+4
 	ldr	r3, [r3]
 	cmp	r3, #8
 	ldr	r3, [sp, #56]
@@ -7181,9 +7267,9 @@ FlashDdrTunningRead:
 	movcc	fp, #6
 	movcs	fp, #12
 	cmp	r3, #0
-	beq	.L1008
+	beq	.L1034
 	movs	r0, #1
-	ldr	r4, .L1019+8
+	ldr	r4, .L1045+8
 	bl	FlashSetInterfaceMode
 	movs	r0, #1
 	bl	NandcSetMode
@@ -7200,37 +7286,37 @@ FlashDdrTunningRead:
 	ldrb	r0, [r4]	@ zero_extendqisi2
 	bl	NandcSetMode
 	adds	r3, r6, #1
-	bne	.L997
-.L1006:
+	bne	.L1023
+.L1032:
 	mov	r6, #-1
-.L994:
+.L1020:
 	mov	r0, r6
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L997:
+.L1023:
 	mov	r2, r6
 	ldr	r1, [sp, #12]
-	ldr	r0, .L1019+12
+	ldr	r0, .L1045+12
 	bl	printf
-	ldr	r2, .L1019+16
+	ldr	r2, .L1045+16
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	cmp	r3, #2048
-	bcs	.L999
+	bcs	.L1025
 	str	r3, [r2]
-	b	.L994
-.L999:
+	b	.L1020
+.L1025:
 	movs	r7, #0
 	str	r7, [r2]
 	str	r7, [sp, #4]
-.L996:
+.L1022:
 	mov	r10, #0
 	mov	r8, #-1
 	mov	r5, r10
 	mov	r4, r10
 	str	r10, [sp, #16]
-.L1004:
+.L1030:
 	uxtb	r0, fp
 	bl	NandcSetDdrPara
 	mov	r3, r7
@@ -7240,77 +7326,77 @@ FlashDdrTunningRead:
 	bl	FlashReadRawPage
 	adds	r3, r6, #1
 	cmp	r0, r3
-	bhi	.L1000
+	bhi	.L1026
 	cmp	r0, #2
-	bhi	.L1010
+	bhi	.L1036
 	adds	r4, r4, #1
 	cmp	r4, #9
-	bls	.L1010
+	bls	.L1036
 	mov	r3, r5
 	mov	r6, r0
 	sub	r5, fp, r4
 	mov	r8, #0
-.L1002:
+.L1028:
 	ldr	r2, [sp, #16]
 	cmp	r4, r2
 	it	ls
 	movls	r5, r3
-.L1003:
-	cbz	r5, .L1005
+.L1029:
+	cbz	r5, .L1031
 	mov	r1, r5
-	ldr	r0, .L1019+20
+	ldr	r0, .L1045+20
 	bl	printf
 	uxtb	r0, r5
 	bl	NandcSetDdrPara
-.L1005:
+.L1031:
 	cmp	r8, #0
-	beq	.L994
+	beq	.L1020
 	ldr	r2, [sp, #12]
 	ldr	r1, [sp, #8]
-	ldr	r0, .L1019+24
+	ldr	r0, .L1045+24
 	bl	printf
 	ldr	r3, [sp, #56]
 	cmp	r3, #0
-	beq	.L1006
+	beq	.L1032
 	ldr	r3, [sp, #20]
 	ubfx	r0, r3, #8, #8
 	bl	NandcSetDdrPara
-	b	.L994
-.L1008:
+	b	.L1020
+.L1034:
 	mov	r6, #1024
-	b	.L996
-.L1000:
+	b	.L1022
+.L1026:
 	ldr	r3, [sp, #16]
 	cmp	r4, r3
-	bls	.L1011
+	bls	.L1037
 	cmp	r4, #7
 	sub	r5, r10, r4
-	bhi	.L1003
+	bhi	.L1029
 	str	r4, [sp, #16]
-.L1011:
+.L1037:
 	movs	r4, #0
-	b	.L1001
-.L1010:
+	b	.L1027
+.L1036:
 	mov	r8, #0
 	mov	r10, fp
 	mov	r6, r0
 	mov	r7, r8
 	str	r8, [sp, #4]
-.L1001:
+.L1027:
 	add	fp, fp, #2
 	cmp	fp, #69
-	bls	.L1004
+	bls	.L1030
 	mov	r3, r5
 	mov	r5, r10
-	b	.L1002
-.L1020:
+	b	.L1028
+.L1046:
 	.align	2
-.L1019:
+.L1045:
 	.word	.LANCHOR19
 	.word	.LANCHOR34
-	.word	.LANCHOR24
+	.word	.LANCHOR25
 	.word	.LC9
-	.word	.LANCHOR144
+	.word	.LANCHOR147
 	.word	.LC10
 	.word	.LC11
 	.size	FlashDdrTunningRead, .-FlashDdrTunningRead
@@ -7333,16 +7419,16 @@ FlashReadPage:
 	bl	FlashReadRawPage
 	adds	r2, r0, #1
 	mov	r4, r0
-	bne	.L1022
-	ldr	r10, .L1040+20
+	bne	.L1048
+	ldr	r10, .L1066+20
 	ldrb	fp, [r10]	@ zero_extendqisi2
 	cmp	fp, #0
-	bne	.L1023
-.L1025:
-	ldr	r3, .L1040
+	bne	.L1049
+.L1051:
+	ldr	r3, .L1066
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1022
-	ldr	r3, .L1040+4
+	cbz	r3, .L1048
+	ldr	r3, .L1066+4
 	mov	r1, r6
 	mov	r2, r7
 	mov	r0, r5
@@ -7354,16 +7440,16 @@ FlashReadPage:
 	bl	FlashDdrTunningRead
 	adds	r1, r0, #1
 	mov	r4, r0
-	beq	.L1026
-	ldr	r3, .L1040+8
+	beq	.L1052
+	ldr	r3, .L1066+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r0, r3, lsr #1
-	bls	.L1022
-.L1026:
+	bls	.L1048
+.L1052:
 	ubfx	r0, r10, #8, #8
 	bl	NandcSetDdrPara
-	b	.L1022
-.L1023:
+	b	.L1048
+.L1049:
 	movs	r3, #0
 	mov	r2, r7
 	strb	r3, [r10]
@@ -7373,15 +7459,15 @@ FlashReadPage:
 	bl	FlashReadRawPage
 	adds	r3, r0, #1
 	strb	fp, [r10]
-	beq	.L1025
+	beq	.L1051
 	mov	r4, r0
-.L1022:
-	ldr	r10, .L1040+24
+.L1048:
+	ldr	r10, .L1066+24
 	ldr	fp, [r10]
 	cmp	fp, #0
-	beq	.L1021
+	beq	.L1047
 	adds	r2, r4, #1
-	bne	.L1021
+	bne	.L1047
 	mov	r3, r8
 	mov	r2, r7
 	mov	r1, r6
@@ -7391,13 +7477,13 @@ FlashReadPage:
 	mov	r4, r0
 	mov	r1, r0
 	mov	r2, r5
-	ldr	r0, .L1040+12
+	ldr	r0, .L1066+12
 	bl	printf
 	adds	r3, r4, #1
-	bne	.L1021
-	ldr	r3, .L1040+16
+	bne	.L1047
+	ldr	r3, .L1066+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1021
+	cbz	r3, .L1047
 	mov	r0, r5
 	bl	flash_enter_slc_mode
 	ldr	r4, [r10]
@@ -7409,21 +7495,21 @@ FlashReadPage:
 	mov	r4, r0
 	mov	r0, r5
 	bl	flash_exit_slc_mode
-.L1021:
+.L1047:
 	mov	r0, r4
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1041:
+.L1067:
 	.align	2
-.L1040:
+.L1066:
 	.word	.LANCHOR30
 	.word	.LANCHOR19
 	.word	.LANCHOR33
 	.word	.LC12
-	.word	.LANCHOR15
+	.word	.LANCHOR16
 	.word	.LANCHOR6
-	.word	.LANCHOR145
+	.word	.LANCHOR148
 	.size	FlashReadPage, .-FlashReadPage
 	.section	.text.FlashDdrParaScan,"ax",%progbits
 	.align	1
@@ -7438,7 +7524,7 @@ FlashDdrParaScan:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r6, r0
-	ldr	r4, .L1053
+	ldr	r4, .L1079
 	movs	r5, #0
 	mov	r7, r1
 	ldrb	r0, [r4]	@ zero_extendqisi2
@@ -7456,295 +7542,142 @@ FlashDdrParaScan:
 	mov	r8, r0
 	mov	r1, r7
 	mov	r0, r6
-	ldr	r5, .L1053+4
+	ldr	r5, .L1079+4
 	bl	FlashReadRawPage
 	adds	r0, r0, #1
-	beq	.L1043
+	beq	.L1069
 	cmp	r8, #-1
-	bne	.L1044
-.L1043:
+	bne	.L1070
+.L1069:
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	lsls	r3, r3, #31
-	bpl	.L1044
+	bpl	.L1070
 	movs	r0, #1
 	bl	FlashSetInterfaceMode
 	movs	r0, #1
 	bl	NandcSetMode
 	movs	r3, #0
-.L1052:
+.L1078:
 	movs	r0, #0
 	strb	r3, [r5]
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1044:
+.L1070:
 	movs	r3, #1
-	b	.L1052
-.L1054:
+	b	.L1078
+.L1080:
 	.align	2
-.L1053:
-	.word	.LANCHOR24
+.L1079:
+	.word	.LANCHOR25
 	.word	.LANCHOR30
 	.size	FlashDdrParaScan, .-FlashDdrParaScan
-	.section	.text.FlashLoadPhyInfo,"ax",%progbits
+	.section	.text.ToshibaReadRetrial,"ax",%progbits
 	.align	1
-	.global	FlashLoadPhyInfo
+	.global	ToshibaReadRetrial
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashLoadPhyInfo, %function
-FlashLoadPhyInfo:
+	.type	ToshibaReadRetrial, %function
+ToshibaReadRetrial:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r3, #60
 	sub	sp, sp, #24
-	ldr	fp, .L1069+32
-	movs	r4, #0
-	movs	r7, #4
-	strb	r3, [sp, #20]
-	movs	r3, #40
-	strb	r3, [sp, #21]
-	movs	r3, #24
-	strb	r3, [sp, #22]
-	movs	r3, #16
-	strb	r3, [sp, #23]
-	mov	r0, r4
-	ldr	r3, [fp]
-	mov	r6, #-1
-	ldr	r8, .L1069+36
-	ldr	r10, .L1069+40
-	str	r3, [sp, #4]
-	ldr	r5, .L1069
-	ldr	r3, [r8]
-	str	r4, [r10]
-	str	r3, [r5]
-	bl	flash_enter_slc_mode
-	str	r10, [sp, #12]
-	mov	r10, r8
-.L1056:
-	mov	r8, #0
-	adds	r3, r4, #1
-	str	r3, [sp, #8]
-.L1058:
-	add	r3, sp, #20
-	ldrb	r0, [r3, r8]	@ zero_extendqisi2
-	bl	FlashBchSel
-	movs	r3, #0
-	ldr	r2, [r10]
-	mov	r1, r4
-	mov	r0, r3
-	bl	FlashReadRawPage
-	adds	r0, r0, #1
-	bne	.L1057
-	movs	r3, #0
-	ldr	r2, [r10]
-	ldr	r1, [sp, #8]
-	mov	r0, r3
-	bl	FlashReadRawPage
-	adds	r0, r0, #1
-	bne	.L1057
-	add	r8, r8, #1
-	cmp	r8, #4
-	bne	.L1058
-.L1059:
-	ldr	r3, [sp, #4]
-	subs	r7, r7, #1
-	add	r4, r4, r3
-	bne	.L1056
-	mov	r0, r7
-	b	.L1068
-.L1060:
-	movw	r1, #2036
-	add	r0, r8, #12
-	bl	js_hash
-	ldr	r3, [r8, #8]
-	cmp	r3, r0
-	bne	.L1066
-	ldr	r6, .L1069+4
-	movs	r2, #32
-	add	r1, r8, #160
-	mov	r0, r6
-	bl	ftl_memcpy
-	ldr	r1, [r5]
-	movs	r2, #32
-	ldr	r0, .L1069+8
-	adds	r1, r1, #192
-	bl	ftl_memcpy
-	ldr	r1, [r5]
-	mov	r2, #852
-	ldr	r0, .L1069+12
-	adds	r1, r1, #224
-	bl	ftl_memcpy
-	ldrh	r0, [r6, #10]
-	bl	FlashBlockAlignInit
-	ldr	r6, [r5]
-	mov	r0, r4
-	ldr	r3, .L1069+16
-	ldr	r1, [fp]
-	ldr	r2, [r6, #1076]
-	strb	r2, [r3]
-	ldr	r3, [sp, #12]
-	str	r4, [r3]
-	bl	__aeabi_uidiv
-	ldr	r3, .L1069+20
-	adds	r0, r0, #1
-	cmp	r0, #1
-	itte	ls
-	movls	r2, #2
-	strls	r2, [r3]
-	strhi	r0, [r3]
-	ldrh	r2, [r6, #14]
-	movs	r6, #0
-	ldr	r3, .L1069+24
-	strb	r2, [r3]
-	b	.L1059
-.L1066:
-	mov	r6, #-1
-	b	.L1059
-.L1057:
-	ldr	r8, [r5]
-	ldr	r2, .L1069+28
-	ldr	r3, [r8]
-	cmp	r3, r2
-	bne	.L1059
-	cmp	r6, #0
-	bne	.L1060
-	ldr	r1, [fp]
-	mov	r0, r4
-	bl	__aeabi_uidiv
-	ldr	r3, .L1069+20
-	adds	r0, r0, #1
-	str	r0, [r3]
-	mov	r0, r6
-.L1068:
-	bl	flash_exit_slc_mode
-	mov	r0, r6
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1070:
-	.align	2
-.L1069:
-	.word	.LANCHOR146
-	.word	.LANCHOR31
-	.word	.LANCHOR7
-	.word	.LANCHOR20
-	.word	.LANCHOR30
-	.word	.LANCHOR149
-	.word	.LANCHOR150
-	.word	1312902724
-	.word	.LANCHOR4
-	.word	.LANCHOR147
-	.word	.LANCHOR148
-	.size	FlashLoadPhyInfo, .-FlashLoadPhyInfo
-	.section	.text.ToshibaReadRetrial,"ax",%progbits
-	.align	1
-	.global	ToshibaReadRetrial
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ToshibaReadRetrial, %function
-ToshibaReadRetrial:
-	@ args = 0, pretend = 0, frame = 24
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #24
-	mov	r6, r0
-	str	r2, [sp, #12]
-	mov	fp, r3
-	str	r1, [sp, #20]
-	bl	NandcWaitFlashReady
-	ldr	r3, .L1098
-	ldr	r2, .L1098+4
-	ldr	r4, [r3, r6, lsl #3]
-	add	r3, r3, r6, lsl #3
-	str	r2, [sp, #16]
-	ldrb	r7, [r3, #4]	@ zero_extendqisi2
-	ldrb	r3, [r2]	@ zero_extendqisi2
-	add	r5, r7, #8
-	subs	r3, r3, #67
-	add	r5, r4, r5, lsl #8
-	cmp	r3, #1
-	bls	.L1088
-	ldr	r3, .L1098+8
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1089
-	movs	r0, #0
-	bl	NandcSetDdrMode
-	movs	r3, #1
-.L1089:
+	mov	r6, r0
+	str	r2, [sp, #12]
+	mov	fp, r3
+	str	r1, [sp, #20]
+	bl	NandcWaitFlashReady
+	ldr	r3, .L1108
+	ldr	r2, .L1108+4
+	ldr	r4, [r3, r6, lsl #3]
+	add	r3, r3, r6, lsl #3
+	str	r2, [sp, #16]
+	ldrb	r7, [r3, #4]	@ zero_extendqisi2
+	ldrb	r3, [r2]	@ zero_extendqisi2
+	add	r5, r7, #8
+	subs	r3, r3, #67
+	add	r5, r4, r5, lsl #8
+	cmp	r3, #1
+	bls	.L1098
+	ldr	r3, .L1108+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L1099
+	movs	r0, #0
+	bl	NandcSetDdrMode
+	movs	r3, #1
+.L1099:
 	str	r3, [sp, #8]
 	add	r3, r4, r7, lsl #8
 	movs	r2, #92
 	str	r2, [r3, #2056]
 	movs	r2, #197
 	str	r2, [r3, #2056]
-.L1072:
+.L1082:
 	mov	r8, #1
 	mov	r3, #-1
 	str	r3, [sp, #4]
-.L1074:
-	ldr	r3, .L1098+12
+.L1084:
+	ldr	r3, .L1108+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	cmp	r8, r3
-	bcc	.L1083
+	bcc	.L1093
 	ldr	r10, [sp, #4]
-.L1082:
+.L1092:
 	ldr	r3, [sp, #16]
 	movs	r1, #0
 	mov	r0, r5
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	subs	r2, r2, #67
 	cmp	r2, #1
-	bhi	.L1084
+	bhi	.L1094
 	bl	SandiskSetRRPara
-.L1085:
+.L1095:
 	add	r4, r4, r7, lsl #8
 	movs	r2, #255
 	str	r2, [r4, #2056]
-	ldr	r2, .L1098+16
+	ldr	r2, .L1108+16
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	add	r2, r2, r2, lsl #1
 	cmp	r10, r2, asr #2
-	bcc	.L1086
+	bcc	.L1096
 	cmp	r10, #-1
 	it	ne
 	movne	r10, #256
-.L1086:
+.L1096:
 	mov	r0, r6
 	bl	NandcWaitFlashReady
 	ldr	r3, [sp, #8]
-	cbz	r3, .L1071
+	cbz	r3, .L1081
 	movs	r0, #4
 	bl	NandcSetDdrMode
-.L1071:
+.L1081:
 	mov	r0, r10
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1088:
+.L1098:
 	movs	r3, #0
 	str	r3, [sp, #8]
-	b	.L1072
-.L1083:
+	b	.L1082
+.L1093:
 	ldr	r3, [sp, #16]
 	mov	r0, r5
 	uxtb	r1, r8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	subs	r3, r3, #67
 	cmp	r3, #1
-	bhi	.L1075
+	bhi	.L1085
 	bl	SandiskSetRRPara
-.L1076:
+.L1086:
 	ldr	r3, [sp, #16]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #34
-	bne	.L1077
-	ldr	r3, .L1098+12
+	bne	.L1087
+	ldr	r3, .L1108+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	subs	r3, r3, #3
 	cmp	r8, r3
@@ -7752,14 +7685,14 @@ ToshibaReadRetrial:
 	addeq	r3, r4, r7, lsl #8
 	moveq	r2, #179
 	streq	r2, [r3, #2056]
-.L1077:
+.L1087:
 	add	r3, r4, r7, lsl #8
 	movs	r2, #38
 	str	r2, [r3, #2056]
 	movs	r2, #93
 	str	r2, [r3, #2056]
 	ldr	r3, [sp, #8]
-	cbz	r3, .L1078
+	cbz	r3, .L1088
 	movs	r0, #4
 	bl	NandcSetDdrMode
 	mov	r3, fp
@@ -7770,10 +7703,10 @@ ToshibaReadRetrial:
 	mov	r10, r0
 	movs	r0, #0
 	bl	NandcSetDdrMode
-.L1079:
+.L1089:
 	cmp	r10, #-1
-	beq	.L1080
-	ldr	r2, .L1098+16
+	beq	.L1090
+	ldr	r2, .L1108+16
 	ldr	r3, [sp, #4]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r3, #-1
@@ -7782,33 +7715,33 @@ ToshibaReadRetrial:
 	str	r3, [sp, #4]
 	add	r2, r2, r2, lsl #1
 	cmp	r10, r2, asr #2
-	bcc	.L1082
+	bcc	.L1092
 	mov	fp, #0
 	str	fp, [sp, #12]
-.L1080:
+.L1090:
 	add	r8, r8, #1
-	b	.L1074
-.L1075:
+	b	.L1084
+.L1085:
 	bl	ToshibaSetRRPara
-	b	.L1076
-.L1078:
+	b	.L1086
+.L1088:
 	mov	r3, fp
 	ldr	r2, [sp, #12]
 	ldr	r1, [sp, #20]
 	mov	r0, r6
 	bl	FlashReadRawPage
 	mov	r10, r0
-	b	.L1079
-.L1084:
+	b	.L1089
+.L1094:
 	bl	ToshibaSetRRPara
-	b	.L1085
-.L1099:
+	b	.L1095
+.L1109:
 	.align	2
-.L1098:
+.L1108:
 	.word	.LANCHOR0
-	.word	.LANCHOR9
+	.word	.LANCHOR10
 	.word	.LANCHOR30
-	.word	.LANCHOR151
+	.word	.LANCHOR149
 	.word	.LANCHOR33
 	.size	ToshibaReadRetrial, .-ToshibaReadRetrial
 	.section	.text.SamsungReadRetrial,"ax",%progbits
@@ -7829,35 +7762,35 @@ SamsungReadRetrial:
 	mov	fp, r1
 	movs	r6, #1
 	bl	NandcWaitFlashReady
-	ldr	r2, .L1113
+	ldr	r2, .L1123
 	mov	r4, #-1
 	add	r3, r2, r7, lsl #3
 	ldrb	r5, [r3, #4]	@ zero_extendqisi2
 	add	r3, r5, #8
 	ldr	r5, [r2, r7, lsl #3]
 	add	r5, r5, r3, lsl #8
-.L1101:
-	ldr	r3, .L1113+4
+.L1111:
+	ldr	r3, .L1123+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	cmp	r6, r3
-	bcc	.L1105
-.L1104:
+	bcc	.L1115
+.L1114:
 	movs	r1, #0
 	mov	r0, r5
 	bl	SamsungSetRRPara
-	ldr	r3, .L1113+8
+	ldr	r3, .L1123+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, asr #2
-	bcc	.L1100
+	bcc	.L1110
 	adds	r3, r4, #1
 	it	ne
 	movne	r4, #256
-.L1100:
+.L1110:
 	mov	r0, r4
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1105:
+.L1115:
 	uxtb	r1, r6
 	mov	r0, r5
 	bl	SamsungSetRRPara
@@ -7867,28 +7800,28 @@ SamsungReadRetrial:
 	mov	r0, r7
 	bl	FlashReadRawPage
 	adds	r2, r0, #1
-	beq	.L1102
-	ldr	r3, .L1113+8
+	beq	.L1112
+	ldr	r3, .L1123+8
 	cmp	r4, #-1
 	it	eq
 	moveq	r4, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r0, r3, asr #2
-	bcc	.L1108
+	bcc	.L1118
 	mov	r8, #0
 	mov	r10, r8
-.L1102:
+.L1112:
 	adds	r6, r6, #1
-	b	.L1101
-.L1108:
+	b	.L1111
+.L1118:
 	mov	r4, r0
-	b	.L1104
-.L1114:
+	b	.L1114
+.L1124:
 	.align	2
-.L1113:
+.L1123:
 	.word	.LANCHOR0
-	.word	.LANCHOR151
+	.word	.LANCHOR149
 	.word	.LANCHOR33
 	.size	SamsungReadRetrial, .-SamsungReadRetrial
 	.section	.text.MicronReadRetrial,"ax",%progbits
@@ -7904,28 +7837,28 @@ MicronReadRetrial:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r7, r3
-	ldr	r3, .L1140
+	ldr	r3, .L1150
 	sub	sp, sp, #40
 	mov	r5, r0
 	str	r2, [sp, #16]
 	ldrb	r2, [r3]	@ zero_extendqisi2
-	ldr	r3, .L1140+4
+	ldr	r3, .L1150+4
 	str	r1, [sp, #28]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1116
+	bne	.L1126
 	add	r2, r2, r2, lsl #1
 	asrs	r3, r2, #2
-.L1139:
-.L1117:
+.L1149:
+.L1127:
 	mov	r8, #0
 	str	r3, [sp, #12]
 	mov	r6, r8
-.L1127:
+.L1137:
 	mov	r0, r5
 	mov	r10, #0
 	bl	NandcWaitFlashReady
-	ldr	r3, .L1140+8
+	ldr	r3, .L1150+8
 	mov	r4, #-1
 	ldr	r2, [r3, r5, lsl #3]
 	add	r3, r3, r5, lsl #3
@@ -7933,12 +7866,12 @@ MicronReadRetrial:
 	str	r2, [sp, #24]
 	lsl	r3, fp, #8
 	str	r3, [sp, #32]
-.L1118:
-	ldr	r3, .L1140+12
+.L1128:
+	ldr	r3, .L1150+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r10, r3
-	bcc	.L1122
-.L1121:
+	bcc	.L1132
+.L1131:
 	ldr	r3, [sp, #24]
 	movs	r0, #200
 	add	fp, r3, fp, lsl #8
@@ -7953,7 +7886,7 @@ MicronReadRetrial:
 	cmp	r4, r3
 	str	r6, [fp, #2048]
 	str	r6, [fp, #2048]
-	bcc	.L1123
+	bcc	.L1133
 	adds	r1, r4, #1
 	mov	r3, r10
 	it	ne
@@ -7961,26 +7894,26 @@ MicronReadRetrial:
 	ldr	r2, [sp, #28]
 	str	r4, [sp]
 	mov	r1, r10
-	ldr	r0, .L1140+16
+	ldr	r0, .L1150+16
 	bl	printf
 	cmp	r8, #0
-	bne	.L1125
-	ldr	r3, .L1140+4
+	bne	.L1135
+	ldr	r3, .L1150+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1115
+	beq	.L1125
 	adds	r2, r4, #1
-	bne	.L1115
+	bne	.L1125
 	movs	r1, #3
 	mov	r0, r5
 	bl	micron_auto_read_calibration_config
 	mov	r8, #1
-	b	.L1127
-.L1116:
-	ldr	r3, .L1140+20
+	b	.L1137
+.L1126:
+	ldr	r3, .L1150+20
 	smull	r2, r3, r2, r3
-	b	.L1139
-.L1122:
+	b	.L1149
+.L1132:
 	ldr	r2, [sp, #32]
 	movs	r0, #200
 	ldr	r3, [sp, #24]
@@ -8005,50 +7938,50 @@ MicronReadRetrial:
 	mov	r3, r7
 	bl	FlashReadRawPage
 	adds	r3, r0, #1
-	beq	.L1119
+	beq	.L1129
 	ldr	r3, [sp, #12]
 	cmp	r4, #-1
 	it	eq
 	moveq	r4, r0
 	cmp	r0, r3
-	bcc	.L1129
+	bcc	.L1139
 	movs	r7, #0
 	str	r7, [sp, #16]
-.L1119:
-	ldr	r10, [sp, #20]
-	b	.L1118
 .L1129:
+	ldr	r10, [sp, #20]
+	b	.L1128
+.L1139:
 	movs	r7, #0
 	mov	r4, r0
 	str	r7, [sp, #16]
-	b	.L1121
-.L1125:
+	b	.L1131
+.L1135:
 	movs	r1, #0
 	mov	r0, r5
 	bl	micron_auto_read_calibration_config
 	adds	r3, r4, #1
 	it	ne
 	movne	r4, #256
-.L1115:
+.L1125:
 	mov	r0, r4
 	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1123:
+.L1133:
 	cmp	r8, #0
-	beq	.L1115
+	beq	.L1125
 	movs	r1, #0
 	mov	r0, r5
 	bl	micron_auto_read_calibration_config
 	mov	r4, #256
-	b	.L1115
-.L1141:
+	b	.L1125
+.L1151:
 	.align	2
-.L1140:
+.L1150:
 	.word	.LANCHOR33
-	.word	.LANCHOR15
+	.word	.LANCHOR16
 	.word	.LANCHOR0
-	.word	.LANCHOR151
+	.word	.LANCHOR149
 	.word	.LC13
 	.word	1431655766
 	.size	MicronReadRetrial, .-MicronReadRetrial
@@ -8065,7 +7998,7 @@ HynixReadRetrial:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, r3
-	ldr	r4, .L1159
+	ldr	r4, .L1169
 	mov	r8, #0
 	mov	r6, #-1
 	mov	fp, r2
@@ -8075,7 +8008,7 @@ HynixReadRetrial:
 	adds	r2, r4, r0
 	ldrb	r5, [r2, #12]	@ zero_extendqisi2
 	str	r3, [sp]
-	ldr	r3, .L1159+4
+	ldr	r3, .L1169+4
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r3, #7
@@ -8083,38 +8016,38 @@ HynixReadRetrial:
 	it	ls
 	ldrbls	r5, [r2, #20]	@ zero_extendqisi2
 	bl	NandcWaitFlashReady
-.L1144:
+.L1154:
 	ldr	r3, [sp]
 	cmp	r8, r3
-	bcc	.L1149
-.L1148:
-	ldr	r3, .L1159+4
+	bcc	.L1159
+.L1158:
+	ldr	r3, .L1169+4
 	add	r4, r4, r7
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r3, #7
 	cmp	r3, #1
-	ldr	r3, .L1159+8
+	ldr	r3, .L1169+8
 	ite	ls
 	strbls	r5, [r4, #20]
 	strbhi	r5, [r4, #12]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r6, r3, asr #2
-	bcc	.L1142
+	bcc	.L1152
 	adds	r3, r6, #1
 	it	ne
 	movne	r6, #256
-.L1142:
+.L1152:
 	mov	r0, r6
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1149:
+.L1159:
 	ldr	r3, [sp]
 	adds	r5, r5, #1
 	uxtb	r5, r5
-	ldr	r2, .L1159+12
+	ldr	r2, .L1169+12
 	ldrb	r1, [r4, #1]	@ zero_extendqisi2
 	mov	r0, r7
 	cmp	r3, r5
@@ -8128,6698 +8061,6173 @@ HynixReadRetrial:
 	mov	r0, r7
 	bl	FlashReadRawPage
 	adds	r2, r0, #1
-	beq	.L1146
-	ldr	r3, .L1159+8
+	beq	.L1156
+	ldr	r3, .L1169+8
 	cmp	r6, #-1
 	it	eq
 	moveq	r6, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r0, r3, asr #2
-	bcc	.L1153
+	bcc	.L1163
 	mov	r10, #0
 	mov	fp, r10
-.L1146:
+.L1156:
 	add	r8, r8, #1
-	b	.L1144
-.L1153:
+	b	.L1154
+.L1163:
 	mov	r6, r0
-	b	.L1148
-.L1160:
+	b	.L1158
+.L1170:
 	.align	2
-.L1159:
+.L1169:
 	.word	.LANCHOR20
-	.word	.LANCHOR18
+	.word	.LANCHOR7
 	.word	.LANCHOR33
 	.word	.LANCHOR20+4
 	.size	HynixReadRetrial, .-HynixReadRetrial
-	.section	.text.FlashProgPage,"ax",%progbits
+	.section	.text.samsung_read_retrial,"ax",%progbits
 	.align	1
-	.global	FlashProgPage
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashProgPage, %function
-FlashProgPage:
-	@ args = 0, pretend = 0, frame = 0
+	.type	samsung_read_retrial, %function
+samsung_read_retrial:
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	mov	r8, r3
-	ldr	r3, .L1164
-	mov	r5, r1
-	mov	r7, r2
-	mov	r4, r0
-	ldrb	r6, [r3, #9]	@ zero_extendqisi2
-	cbnz	r0, .L1162
-	ldr	r3, .L1164+4
-	ldr	r2, .L1164+8
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	ldr	r1, [r2]
-	muls	r1, r3, r1
-	cmp	r1, r5
-	bls	.L1162
-	ldr	r3, .L1164+12
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L1163
-	subs	r6, r6, #2
-.L1162:
-	mov	r0, r4
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #24
+	mov	r8, r0
+	mov	r10, r2
+	mov	r7, r3
+	str	r1, [sp, #16]
 	bl	NandcWaitFlashReady
-	mov	r0, r4
-	bl	NandcFlashCs
-	mov	r1, r5
-	mov	r0, r4
-	bl	FlashProgFirstCmd
+	ldr	r3, .L1196
+	ldr	r2, [r3, r8, lsl #3]
+	add	r3, r3, r8, lsl #3
+	str	r2, [sp, #12]
+	ldr	r2, .L1196+4
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r2, #0
+	bne	.L1172
+	lsls	r3, r3, #8
+	mov	r4, #-1
+	movs	r6, #1
+	str	r3, [sp, #20]
+	ldr	r2, [sp, #20]
+	ldr	r3, [sp, #12]
+	adds	r5, r3, r2
+.L1176:
+	movs	r3, #239
+	mov	fp, #0
+	str	r3, [r5, #2056]
+	movs	r3, #141
+	str	r3, [r5, #2052]
+	mov	r2, r10
+	ldr	r3, .L1196+8
+	mov	r0, r8
+	ldr	r1, [sp, #16]
+	ldrsb	r3, [r6, r3]
+	str	r3, [r5, #2048]
 	mov	r3, r7
-	uxtb	r2, r6
-	str	r8, [sp]
-	movs	r1, #1
-	mov	r0, r4
-	bl	NandcXferData
-	mov	r1, r5
-	mov	r0, r4
-	bl	FlashProgSecondCmd
-	mov	r0, r4
+	str	fp, [r5, #2048]
+	str	fp, [r5, #2048]
+	str	fp, [r5, #2048]
+	bl	FlashReadRawPage
+	adds	r1, r0, #1
+	beq	.L1173
+	ldr	r3, .L1196+12
+	cmp	r4, #-1
+	it	eq
+	moveq	r4, r0
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r0, r3, asr #2
+	bcc	.L1184
+	mov	r7, fp
+	mov	r10, fp
+.L1173:
+	adds	r6, r6, #1
+	cmp	r6, #26
+	bne	.L1176
+.L1175:
+	ldr	r2, [sp, #20]
+	ldr	r3, [sp, #12]
+	add	r3, r3, r2
+	movs	r2, #239
+	str	r2, [r3, #2056]
+	movs	r3, #141
+.L1195:
+	str	r3, [r5, #2052]
+	movs	r3, #0
+	str	r3, [r5, #2048]
+	str	r3, [r5, #2048]
+	str	r3, [r5, #2048]
+	str	r3, [r5, #2048]
+	ldr	r3, .L1196+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r4, r3, asr #2
+	bcc	.L1182
+	adds	r3, r4, #1
+	ldr	r2, [sp, #16]
+	it	ne
+	movne	r4, #256
+	mov	r3, r6
+	str	r4, [sp]
+	mov	r1, r6
+	ldr	r0, .L1196+16
+	bl	printf
+.L1182:
+	mov	r0, r8
 	bl	NandcWaitFlashReady
-	mov	r1, r5
-	mov	r0, r4
-	bl	FlashReadStatus
-	mov	r1, r0
 	mov	r0, r4
-	bl	NandcFlashDeCs
-	and	r0, r1, #1
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, pc}
-.L1163:
-	movs	r6, #4
-	b	.L1162
-.L1165:
-	.align	2
-.L1164:
-	.word	.LANCHOR31
-	.word	.LANCHOR3
-	.word	.LANCHOR4
-	.word	.LANCHOR2
-	.size	FlashProgPage, .-FlashProgPage
-	.section	.text.FlashSavePhyInfo,"ax",%progbits
-	.align	1
-	.global	FlashSavePhyInfo
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FlashSavePhyInfo, %function
-FlashSavePhyInfo:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r7, .L1175
-	ldr	r4, .L1175+4
-	ldr	r3, [r7]
-	ldr	r10, .L1175+56
-	ldr	fp, .L1175+60
-	str	r3, [r4]
-	ldr	r3, .L1175+8
-	ldr	r8, .L1175+64
-	ldrb	r0, [r3]	@ zero_extendqisi2
-	bl	FlashBchSel
-	mov	r2, #2048
-	movs	r1, #0
-	ldr	r0, [r7]
-	bl	ftl_memset
-	ldr	r0, [r4]
-	movs	r2, #32
-	ldr	r3, .L1175+12
-	ldr	r1, .L1175+16
-	str	r10, [r0]
-	adds	r0, r0, #16
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	strh	r3, [r0, #-4]	@ movhi
-	ldr	r3, .L1175+20
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	strh	r3, [r0, #-2]	@ movhi
-	ldr	r3, .L1175+24
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	str	r3, [r0, #1060]
-	bl	ftl_memcpy
-	ldr	r0, [r4]
-	movs	r2, #8
-	ldr	r1, .L1175+28
-	adds	r0, r0, #80
-	bl	ftl_memcpy
-	ldr	r0, [r4]
-	movs	r2, #32
-	ldr	r1, .L1175+32
-	adds	r0, r0, #96
-	bl	ftl_memcpy
-	ldr	r0, [r4]
-	movs	r2, #32
-	ldr	r1, .L1175+36
-	adds	r0, r0, #160
-	bl	ftl_memcpy
-	ldr	r0, [r4]
-	movs	r2, #32
-	ldr	r1, .L1175+40
-	adds	r0, r0, #192
-	bl	ftl_memcpy
-	ldr	r0, [r4]
-	mov	r2, #852
-	ldr	r1, .L1175+44
-	adds	r0, r0, #224
-	bl	ftl_memcpy
-	ldr	r5, [r4]
-	movw	r1, #2036
-	add	r0, r5, #12
-	bl	js_hash
-	mov	r3, #1592
-	str	r0, [r5, #8]
-	str	r3, [r5, #4]
-	movs	r5, #0
-	ldr	r3, [fp]
-	mov	r6, r5
-	movs	r0, #0
-	str	r3, [r4]
-	bl	flash_enter_slc_mode
-.L1169:
-	ldr	r1, [r8]
-	movs	r2, #0
-	mov	r0, r2
-	muls	r1, r6, r1
-	bl	FlashEraseBlock
-	ldr	r1, [r8]
-	movs	r3, #0
-	ldr	r2, [r7]
-	mov	r0, r3
-	muls	r1, r6, r1
-	bl	FlashProgPage
-	ldr	r1, [r8]
-	movs	r3, #0
-	ldr	r2, [r7]
-	mov	r0, r3
-	muls	r1, r6, r1
-	adds	r1, r1, #1
-	bl	FlashProgPage
-	ldr	r1, [r8]
-	movs	r3, #0
-	ldr	r2, [fp]
-	mov	r0, r3
-	muls	r1, r6, r1
-	bl	FlashReadRawPage
-	adds	r0, r0, #1
-	add	r2, r6, #1
-	beq	.L1167
-	ldr	r3, [r4]
-	ldr	r1, [r3]
-	cmp	r1, r10
-	bne	.L1167
-	add	r0, r3, #12
-	movw	r1, #2036
-	str	r2, [sp, #4]
-	str	r3, [sp]
-	bl	js_hash
-	ldr	r3, [sp]
-	ldr	r2, [sp, #4]
-	ldr	r3, [r3, #8]
-	cmp	r3, r0
-	bne	.L1167
-	ldr	r3, .L1175+48
-	cmp	r5, #1
-	str	r2, [r3]
-	ldr	r3, [r8]
-	mul	r6, r6, r3
-	ldr	r3, .L1175+52
-	str	r6, [r3]
-	beq	.L1170
-	movs	r5, #1
-.L1167:
-	cmp	r2, #4
-	mov	r6, r2
-	bne	.L1169
-.L1168:
-	movs	r0, #0
-	bl	flash_exit_slc_mode
-	clz	r0, r5
-	lsrs	r0, r0, #5
-	negs	r0, r0
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1170:
-	movs	r5, #2
-	b	.L1168
-.L1176:
-	.align	2
-.L1175:
-	.word	.LANCHOR147
-	.word	.LANCHOR146
-	.word	.LANCHOR152
-	.word	.LANCHOR25
-	.word	.LANCHOR22
-	.word	.LANCHOR3
-	.word	.LANCHOR30
-	.word	.LANCHOR26
-	.word	.LANCHOR17
-	.word	.LANCHOR31
-	.word	.LANCHOR7
-	.word	.LANCHOR20
-	.word	.LANCHOR149
-	.word	.LANCHOR148
-	.word	1312902724
-	.word	.LANCHOR153
-	.word	.LANCHOR4
-	.size	FlashSavePhyInfo, .-FlashSavePhyInfo
-	.section	.text.FlashReadIdbDataRaw,"ax",%progbits
-	.align	1
-	.global	FlashReadIdbDataRaw
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FlashReadIdbDataRaw, %function
-FlashReadIdbDataRaw:
-	@ args = 0, pretend = 0, frame = 16
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r3, #60
-	strb	r3, [sp, #12]
-	movs	r3, #40
-	mov	r10, r0
-	strb	r3, [sp, #13]
-	movs	r3, #24
-	strb	r3, [sp, #14]
-	movs	r3, #16
-	strb	r3, [sp, #15]
-	ldr	r3, .L1195
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	str	r3, [sp]
-	ldr	r3, .L1195+4
-	ldr	r2, [r3]
-	str	r3, [sp, #4]
-	cbz	r2, .L1178
-	movs	r0, #0
-	bl	flash_enter_slc_mode
-.L1178:
-	mov	r7, #-1
-	movs	r4, #2
-	mov	r2, #2048
-	movs	r1, #0
-	mov	r0, r10
-	bl	ftl_memset
-.L1179:
-	ldr	r3, .L1195+8
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r4, r3
-	bcc	.L1184
-.L1183:
-	ldr	r0, [sp]
-	bl	FlashBchSel
-	ldr	r3, [sp, #4]
-	ldr	r3, [r3]
-	cbz	r3, .L1177
-	movs	r0, #0
-	bl	flash_exit_slc_mode
-.L1177:
-	mov	r0, r7
-	add	sp, sp, #16
+	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
 .L1184:
-	ldr	r5, .L1195+12
-	movs	r6, #0
-	ldr	fp, .L1195+28
+	mov	r4, r0
+	b	.L1175
+.L1172:
+	lsls	r3, r3, #8
+	ldr	fp, .L1196+20
+	mov	r4, #-1
+	str	r3, [sp, #20]
+	movs	r6, #1
+	ldr	r3, [sp, #12]
+	ldr	r2, [sp, #20]
+	adds	r5, r3, r2
 .L1181:
-	add	r3, sp, #12
-	ldrb	r8, [r6, r3]	@ zero_extendqisi2
+	movs	r3, #239
+	mov	r2, r10
+	str	r3, [r5, #2056]
+	movs	r3, #137
+	str	r3, [r5, #2052]
 	mov	r0, r8
-	bl	FlashBchSel
-	ldr	r1, [fp]
-	movs	r3, #0
-	ldr	r2, [r5]
-	mov	r0, r3
-	muls	r1, r4, r1
+	ldrb	r3, [fp, #4]	@ zero_extendqisi2
+	ldr	r1, [sp, #16]
+	str	r3, [r5, #2048]
+	ldrb	r3, [fp, #5]	@ zero_extendqisi2
+	str	r3, [r5, #2048]
+	ldrb	r3, [fp, #6]	@ zero_extendqisi2
+	str	r3, [r5, #2048]
+	ldrb	r3, [fp, #7]	@ zero_extendqisi2
+	str	r3, [r5, #2048]
+	mov	r3, r7
 	bl	FlashReadRawPage
-	adds	r0, r0, #1
-	bne	.L1180
+	adds	r2, r0, #1
+	beq	.L1178
+	ldr	r3, .L1196+12
+	cmp	r4, #-1
+	it	eq
+	moveq	r4, r0
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r0, r3, asr #2
+	bcc	.L1185
+	movs	r7, #0
+	mov	r10, r7
+.L1178:
 	adds	r6, r6, #1
-	cmp	r6, #4
+	add	fp, fp, #4
+	cmp	r6, #26
 	bne	.L1181
-.L1182:
-	adds	r4, r4, #1
-	b	.L1179
-.L1187:
-	movs	r7, #0
-	b	.L1183
 .L1180:
-	ldr	r3, [r5]
-	ldr	r2, [r3]
-	ldr	r3, .L1195+16
-	cmp	r2, r3
-	bne	.L1182
-	mov	r1, r8
-	ldr	r0, .L1195+20
-	bl	printf
-	mov	r2, #2048
-	ldr	r1, [r5]
-	mov	r0, r10
-	bl	ftl_memcpy
-	ldr	r3, [r5]
-	ldr	r2, .L1195+8
-	ldr	r3, [r3, #512]
-	strb	r3, [r2]
-	ldr	r3, .L1195+24
-	ldr	r2, [r3]
-	cmp	r4, r2
-	bcs	.L1187
-	str	r4, [r3]
-	movs	r7, #0
-	bl	FlashSavePhyInfo
-	b	.L1182
-.L1196:
+	ldr	r2, [sp, #20]
+	ldr	r3, [sp, #12]
+	add	r3, r3, r2
+	movs	r2, #239
+	str	r2, [r3, #2056]
+	movs	r3, #137
+	b	.L1195
+.L1185:
+	mov	r4, r0
+	b	.L1180
+.L1197:
 	.align	2
-.L1195:
+.L1196:
+	.word	.LANCHOR0
+	.word	.LANCHOR24
+	.word	.LANCHOR150
 	.word	.LANCHOR33
-	.word	.LANCHOR29
-	.word	.LANCHOR3
-	.word	.LANCHOR147
-	.word	-52655045
 	.word	.LC14
-	.word	.LANCHOR149
-	.word	.LANCHOR4
-	.size	FlashReadIdbDataRaw, .-FlashReadIdbDataRaw
-	.section	.text.FlashPageProgMsbFFData,"ax",%progbits
+	.word	.LANCHOR151
+	.size	samsung_read_retrial, .-samsung_read_retrial
+	.section	.text.FlashProgPage,"ax",%progbits
 	.align	1
-	.global	FlashPageProgMsbFFData
+	.global	FlashProgPage
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashPageProgMsbFFData, %function
-FlashPageProgMsbFFData:
-	@ args = 0, pretend = 0, frame = 0
+	.type	FlashProgPage, %function
+FlashProgPage:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1213
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r7, r0
-	mov	r8, r1
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	mov	r8, r3
+	ldr	r3, .L1201
+	mov	r5, r1
+	mov	r7, r2
+	mov	r4, r0
+	ldrb	r6, [r3, #9]	@ zero_extendqisi2
+	cbnz	r0, .L1199
+	ldr	r3, .L1201+4
+	ldr	r2, .L1201+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	ldr	r1, [r2]
+	muls	r1, r3, r1
+	cmp	r1, r5
+	bls	.L1199
+	ldr	r3, .L1201+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	it	ne
+	movne	r6, #4
+.L1199:
+	mov	r0, r4
+	bl	NandcWaitFlashReady
+	mov	r0, r4
+	bl	NandcFlashCs
+	mov	r1, r5
+	mov	r0, r4
+	bl	FlashProgFirstCmd
+	mov	r3, r7
+	mov	r2, r6
+	str	r8, [sp]
+	movs	r1, #1
+	mov	r0, r4
+	bl	NandcXferData
+	mov	r1, r5
+	mov	r0, r4
+	bl	FlashProgSecondCmd
+	mov	r0, r4
+	bl	NandcWaitFlashReady
+	mov	r1, r5
+	mov	r0, r4
+	bl	FlashReadStatus
+	mov	r1, r0
+	mov	r0, r4
+	bl	NandcFlashDeCs
+	and	r0, r1, #1
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1202:
+	.align	2
+.L1201:
+	.word	.LANCHOR31
+	.word	.LANCHOR3
+	.word	.LANCHOR4
+	.word	.LANCHOR2
+	.size	FlashProgPage, .-FlashProgPage
+	.section	.text.FlashPageProgMsbFFData,"ax",%progbits
+	.align	1
+	.global	FlashPageProgMsbFFData
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashPageProgMsbFFData, %function
+FlashPageProgMsbFFData:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	mov	r6, r0
+	ldr	r3, .L1223
+	mov	r7, r1
 	mov	r4, r2
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1198
-	ldr	r3, .L1213+4
+	cbz	r3, .L1204
+	ldr	r3, .L1223+4
 	ldr	r3, [r3]
-	cmp	r3, #0
-	bne	.L1197
-.L1198:
-	ldr	r5, .L1213+8
+	cbnz	r3, .L1203
+.L1204:
+	ldr	r5, .L1223+8
 	ldr	r3, [r5]
-	ldrb	r6, [r3, #19]	@ zero_extendqisi2
-	subs	r3, r6, #5
+	ldrb	r2, [r3, #19]	@ zero_extendqisi2
+	subs	r3, r2, #5
 	uxtb	r3, r3
 	cmp	r3, #30
-	bhi	.L1199
-	ldr	r2, .L1213+12
-	lsr	r3, r2, r3
+	bhi	.L1205
+	ldr	r1, .L1223+12
+	lsr	r3, r1, r3
 	lsls	r3, r3, #31
-	bmi	.L1201
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1204:
-	ldrh	r2, [fp, r4, lsl #1]
+	bmi	.L1206
+.L1210:
+	cmp	r2, #68
+	bne	.L1203
+.L1206:
+	ldr	r10, .L1223+16
+	ldr	r8, .L1223+20
+.L1208:
+	ldr	r3, [r5]
+	ldrh	r3, [r3, #10]
+	cmp	r3, r4
+	bhi	.L1209
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L1209:
+	ldrh	r2, [r10, r4, lsl #1]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1197
-	cmp	r6, #8
+	bne	.L1203
 	mov	r2, #32768
-	ite	eq
-	moveq	r1, #0
-	movne	r1, #255
-	ldr	r0, [r10]
+	movs	r1, #255
+	ldr	r0, [r8]
 	bl	ftl_memset
-	ldr	r3, [r10]
-	add	r1, r4, r8
+	ldr	r3, [r8]
+	adds	r1, r4, r7
+	mov	r0, r6
 	adds	r4, r4, #1
-	mov	r0, r7
 	uxth	r4, r4
 	mov	r2, r3
 	bl	FlashProgPage
+	b	.L1208
 .L1205:
-	ldr	r3, [r5]
-	ldrh	r3, [r3, #10]
-	cmp	r3, r4
-	bhi	.L1204
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1199:
-	cmp	r6, #68
-	bne	.L1197
-.L1201:
-	ldr	fp, .L1213+16
-	ldr	r10, .L1213+20
-	b	.L1205
-.L1197:
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1214:
+	cmp	r2, #50
+	bne	.L1210
+	b	.L1206
+.L1203:
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L1224:
 	.align	2
-.L1213:
-	.word	.LANCHOR15
+.L1223:
+	.word	.LANCHOR16
 	.word	.LANCHOR29
-	.word	.LANCHOR18
-	.word	1073758223
-	.word	.LANCHOR120
-	.word	.LANCHOR153
+	.word	.LANCHOR7
+	.word	1073758215
+	.word	.LANCHOR123
+	.word	.LANCHOR152
 	.size	FlashPageProgMsbFFData, .-FlashPageProgMsbFFData
-	.section	.text.idb_write_data,"ax",%progbits
+	.section	.text.FlashLoadPhyInfo,"ax",%progbits
 	.align	1
-	.global	idb_write_data
+	.global	FlashLoadPhyInfo
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	idb_write_data, %function
-idb_write_data:
-	@ args = 0, pretend = 0, frame = 96
+	.type	FlashLoadPhyInfo, %function
+FlashLoadPhyInfo:
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	mov	r0, r1
-	mov	r1, r2
-	adds	r2, r0, r3
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	cmp	r2, #63
-	sub	sp, sp, #104
-	bls	.L1216
-	cmp	r0, #576
-	bcs	.L1217
-	ldr	r2, .L1268
-	cmp	r0, #64
-	mov	r4, #1
-	str	r4, [r2]
-	bhi	.L1218
-	rsb	r0, r0, #64
-	subs	r2, r3, r0
-	add	r1, r1, r0, lsl #9
-	ldr	r0, .L1268+4
-	lsls	r2, r2, #9
-.L1267:
-	bl	ftl_memcpy
-.L1256:
-	movs	r0, #0
-	add	sp, sp, #104
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1218:
-	rsb	r2, r0, #576
-	subs	r0, r0, #64
-	cmp	r2, r3
-	it	cs
-	movcs	r2, r3
-	ldr	r3, .L1268+4
-	lsls	r2, r2, #9
-	add	r0, r3, r0, lsl #9
-	b	.L1267
-.L1216:
-	cmp	r0, #576
-	bcc	.L1256
-.L1217:
-	ldr	r3, .L1268
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L1256
-	ldr	r3, .L1268+8
-	ldr	r2, [r3]
-	ldrb	r3, [r2, #9]	@ zero_extendqisi2
-	ldrh	r2, [r2, #10]
-	smulbb	r3, r3, r2
-	uxth	r3, r3
-	mov	r1, r3
-	addw	r0, r3, #511
+	movs	r3, #60
+	sub	sp, sp, #24
+	ldr	fp, .L1239+32
+	movs	r4, #0
+	movs	r7, #4
+	strb	r3, [sp, #20]
+	movs	r3, #40
+	strb	r3, [sp, #21]
+	movs	r3, #24
+	strb	r3, [sp, #22]
+	movs	r3, #16
+	strb	r3, [sp, #23]
+	mov	r0, r4
+	ldr	r3, [fp]
+	mov	r6, #-1
+	ldr	r8, .L1239+36
+	ldr	r10, .L1239+40
+	str	r3, [sp, #4]
+	ldr	r5, .L1239
+	ldr	r3, [r8]
+	str	r4, [r10]
+	str	r3, [r5]
+	bl	flash_enter_slc_mode
+	str	r10, [sp, #12]
+	mov	r10, r8
+.L1226:
+	mov	r8, #0
+	adds	r3, r4, #1
 	str	r3, [sp, #8]
-	bl	__aeabi_uidiv
-	ldr	r1, .L1268+4
+.L1228:
+	add	r3, sp, #20
+	ldrb	r0, [r3, r8]	@ zero_extendqisi2
+	bl	FlashBchSel
 	movs	r3, #0
-	str	r0, [sp, #20]
-	movw	r2, #65535
-	mov	r0, r1
-.L1222:
-	ldr	r4, [r1, r2, lsl #2]
-	cbnz	r4, .L1220
-	ldr	r4, [r1, r3, lsl #2]
-	adds	r3, r3, #1
-	cmp	r3, #4096
-	it	hi
-	movhi	r3, #0
-	str	r4, [r1, r2, lsl #2]
-	subs	r2, r2, #1
-	cmp	r2, #4096
-	bne	.L1222
-.L1220:
-	ldr	r1, [r0, r2, lsl #2]
-	mov	r3, #512
-	ldr	r0, .L1268+12
-	bl	printf
-	ldr	r3, .L1268+16
-	ldr	r2, [sp, #8]
-	ldr	r3, [r3]
-	str	r3, [sp, #16]
-	ldr	r3, [sp, #20]
-	muls	r3, r2, r3
-	str	r3, [sp, #36]
-	ldr	r3, [sp, #16]
-	mul	r4, r3, r2
+	ldr	r2, [r10]
+	mov	r1, r4
+	mov	r0, r3
+	bl	FlashReadRawPage
+	adds	r0, r0, #1
+	bne	.L1227
 	movs	r3, #0
-	str	r3, [sp, #12]
-.L1223:
-	ldr	r3, [sp, #16]
-	cmp	r3, #15
-	bls	.L1240
+	ldr	r2, [r10]
+	ldr	r1, [sp, #8]
+	mov	r0, r3
+	bl	FlashReadRawPage
+	adds	r0, r0, #1
+	bne	.L1227
+	add	r8, r8, #1
+	cmp	r8, #4
+	bne	.L1228
+.L1229:
+	ldr	r3, [sp, #4]
+	subs	r7, r7, #1
+	add	r4, r4, r3
+	bne	.L1226
+	mov	r0, r7
+	b	.L1238
+.L1230:
+	movw	r1, #2036
+	add	r0, r8, #12
+	bl	js_hash
+	ldr	r3, [r8, #8]
+	cmp	r3, r0
+	bne	.L1236
+	ldr	r6, .L1239+4
+	movs	r2, #32
+	add	r1, r8, #160
+	mov	r0, r6
+	bl	ftl_memcpy
+	ldr	r1, [r5]
+	movs	r2, #32
+	ldr	r0, .L1239+8
+	adds	r1, r1, #192
+	bl	ftl_memcpy
+	ldr	r1, [r5]
+	mov	r2, #852
+	ldr	r0, .L1239+12
+	adds	r1, r1, #224
+	bl	ftl_memcpy
+	ldrh	r0, [r6, #10]
+	bl	FlashBlockAlignInit
+	ldr	r6, [r5]
+	mov	r0, r4
+	ldr	r3, .L1239+16
+	ldr	r1, [fp]
+	ldr	r2, [r6, #1076]
+	strb	r2, [r3]
 	ldr	r3, [sp, #12]
-	cbnz	r3, .L1242
-	mov	r1, r3
-	ldr	r0, .L1268+20
-	bl	printf
-.L1242:
-	ldr	r3, .L1268
-	movs	r2, #0
-	str	r2, [r3]
-	b	.L1256
-.L1269:
-	.align	2
-.L1268:
-	.word	.LANCHOR154
-	.word	idb_buf
-	.word	.LANCHOR18
-	.word	.LC15
-	.word	.LANCHOR149
-	.word	.LC17
-.L1240:
-	mov	r2, #512
-	movs	r1, #0
-	ldr	r0, .L1270
-	bl	memset
-	ldr	r3, .L1270+4
-	mov	r0, r4
-	ldr	r3, [r3]
-	ldrb	fp, [r3, #9]	@ zero_extendqisi2
-	ldrh	r5, [r3, #10]
-	bl	FW_FlashBlockErase.constprop.41
-	smulbb	r5, r5, fp
-	uxth	r5, r5
-	cmp	r5, #512
-	bcs	.L1224
-	adds	r0, r5, r4
-	bl	FW_FlashBlockErase.constprop.41
-.L1224:
-	ldr	r7, .L1270+8
-	mov	r1, r5
-	ldr	r10, .L1270+36
-	mov	r0, r4
-	bl	__aeabi_uidivmod
-	mov	r6, r1
-	subs	r3, r4, r1
-	str	r3, [sp, #24]
-.L1228:
-	lsrs	r2, r6, #2
-	beq	.L1225
-	ldr	r0, .L1270+12
-	adds	r1, r2, #1
-	ldr	r3, .L1270+16
-	ldrb	r0, [r0]	@ zero_extendqisi2
-	ldrh	r3, [r3, r1, lsl #1]
-	cbz	r0, .L1226
-	ldr	r0, [r10]
-	ldr	r5, .L1270+20
-	cmp	r0, r5
-	it	eq
-	moveq	r3, r1
-.L1226:
-	add	r3, r3, #1073741824
-	subs	r3, r3, #1
-	lsls	r3, r3, #2
-	str	r3, [sp, #40]
-.L1225:
-	movw	r3, #61424
-	str	r3, [sp, #44]
-	ldr	r3, .L1270+16
-	ldrh	r5, [r3, r2, lsl #1]
-	ldr	r3, .L1270+12
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1227
-	ldr	r3, [r10]
-	ldr	r1, .L1270+20
-	cmp	r3, r1
-	it	eq
-	moveq	r5, r2
-.L1227:
-	ldr	r3, [sp, #24]
-	adds	r6, r6, #4
-	ldr	r2, .L1270+24
-	ldr	r8, .L1270+4
-	mla	r3, r5, fp, r3
-	adds	r5, r5, #1
-	uxth	r5, r5
-	str	r3, [sp, #32]
-	ldrb	r3, [r2]	@ zero_extendqisi2
-	ldr	r2, .L1270+28
-	str	r3, [sp, #28]
-	ldrb	r0, [r2]	@ zero_extendqisi2
-	bl	FlashBchSel
-	movs	r0, #0
-	bl	flash_boot_enter_slc_mode
-	ldr	r2, [r8]
-	ldr	r3, [sp, #32]
-	ldrb	r1, [r2, #9]	@ zero_extendqisi2
-	mov	r0, r3
-	bl	__aeabi_uidiv
-	add	r3, sp, #40
-	mov	r2, r7
-	mov	r1, r0
-	movs	r0, #0
-	bl	FlashProgPage
-	movs	r0, #0
-	add	r7, r7, #2048
-	bl	flash_boot_exit_slc_mode
-	ldr	r0, [sp, #28]
-	bl	FlashBchSel
-	mov	r1, fp
-	ldr	r0, [sp, #24]
+	str	r4, [r3]
 	bl	__aeabi_uidiv
-	mov	r2, r5
-	mov	r1, r0
-	movs	r0, #0
-	bl	FlashPageProgMsbFFData
-	ldr	r3, .L1270+32
-	cmp	r7, r3
-	bne	.L1228
-	ldr	r3, [r8]
-	mov	r0, r4
-	ldr	r7, .L1270
+	ldr	r3, .L1239+20
+	adds	r0, r0, #1
+	cmp	r0, #1
+	itte	ls
+	movls	r2, #2
+	strls	r2, [r3]
+	strhi	r0, [r3]
+	ldrh	r2, [r6, #14]
 	movs	r6, #0
-	ldrb	r8, [r3, #9]	@ zero_extendqisi2
-	ldrh	r1, [r3, #10]
-	smulbb	r1, r1, r8
-	uxth	r1, r1
-	bl	__aeabi_uidivmod
-	mul	r5, r8, r1
-	mov	r10, r1
-	subs	r3, r4, r1
-	str	r3, [sp, #28]
-	ubfx	r5, r5, #2, #2
-.L1229:
-	cmp	r6, #512
-	bcs	.L1236
-	ldr	r1, .L1270+12
-	rsb	r3, r5, #4
-	uxth	r3, r3
-	ldr	r2, .L1270+16
-	ldrb	r1, [r1]	@ zero_extendqisi2
-	str	r3, [sp, #24]
-	add	r3, r10, r6
-	lsrs	r3, r3, #2
-	ldrh	r2, [r2, r3, lsl #1]
-	cbz	r1, .L1230
-	ldr	r1, .L1270+36
-	ldr	r0, .L1270+20
-	ldr	r1, [r1]
-	cmp	r1, r0
-	it	eq
-	moveq	r2, r3
-.L1230:
-	ldr	r3, [sp, #28]
-	add	r5, r5, r3
-	ldr	r3, .L1270+24
-	mla	r5, r2, r8, r5
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	str	r3, [sp, #32]
-	ldr	r3, .L1270+4
-	ldr	r3, [r3]
-	ldrb	fp, [r3, #9]	@ zero_extendqisi2
-	ldr	r3, .L1270+40
-	ldrh	r2, [r3, #26]
-	ldr	r3, .L1270+44
-	ldr	r3, [r3]
-	muls	r3, r2, r3
-	mul	r3, fp, r3
-	cmp	r5, r3
-	bcs	.L1231
-	ldr	r3, .L1270+28
-	ldrb	r0, [r3]	@ zero_extendqisi2
-	bl	FlashBchSel
-.L1231:
-	movs	r0, #0
-	bl	flash_boot_enter_slc_mode
-	mov	r1, fp
-	mov	r0, r5
-	bl	__aeabi_uidiv
-	add	r3, sp, #40
-	mov	r1, r0
-	mov	fp, r0
-	mov	r2, r7
-	movs	r0, #0
-	bl	FlashReadPage
-	adds	r3, r0, #1
-	mov	r5, r0
-	bne	.L1232
-	ldr	r3, .L1270+28
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #40
-	beq	.L1232
-	movs	r0, #40
-	bl	FlashBchSel
-	add	r3, sp, #40
-	mov	r2, r7
-	mov	r1, fp
-	movs	r0, #0
-	bl	FlashReadPage
-	mov	r5, r0
-.L1232:
-	movs	r0, #0
-	bl	flash_boot_exit_slc_mode
-	ldr	r0, [sp, #32]
-	bl	FlashBchSel
-	adds	r5, r5, #1
-	mov	r5, #-1
-	it	ne
-	movne	r5, #0
-	cbz	r5, .L1233
+	ldr	r3, .L1239+24
+	strb	r2, [r3]
+	b	.L1229
 .L1236:
-	ldr	r3, .L1270+8
-	movs	r5, #0
-	ldr	r6, .L1270
-.L1234:
-	mov	r7, r3
-	ldr	r1, [r6, r5, lsl #2]
-	ldr	r2, [r7]
-	adds	r3, r3, #4
-	cmp	r1, r2
-	beq	.L1237
-	mov	r2, #512
-	movs	r1, #0
-	ldr	r0, .L1270
-	bl	memset
-	str	r5, [sp]
-	mov	r1, r4
-	ldr	r3, [r7]
-	ldr	r2, [r6, r5, lsl #2]
-	ldr	r0, .L1270+48
-	bl	printf
+	mov	r6, #-1
+	b	.L1229
+.L1227:
+	ldr	r8, [r5]
+	ldr	r2, .L1239+28
+	ldr	r3, [r8]
+	cmp	r3, r2
+	bne	.L1229
+	cmp	r6, #0
+	bne	.L1230
+	ldr	r1, [fp]
 	mov	r0, r4
-	bl	FW_FlashBlockErase.constprop.41
-	ldr	r3, [sp, #20]
-	cmp	r3, #1
-	bls	.L1238
-	ldr	r3, [sp, #8]
-	adds	r0, r3, r4
-	bl	FW_FlashBlockErase.constprop.41
+	bl	__aeabi_uidiv
+	ldr	r3, .L1239+20
+	adds	r0, r0, #1
+	str	r0, [r3]
+	mov	r0, r6
 .L1238:
-	ldr	r3, [sp, #16]
-	ldr	r2, [sp, #20]
-	add	r3, r3, r2
-	str	r3, [sp, #16]
-	ldr	r3, [sp, #36]
-	add	r4, r4, r3
-	b	.L1223
-.L1233:
-	ldr	r3, [sp, #24]
-	add	r6, r6, r3
-	add	r7, r7, r3, lsl #9
-	uxth	r6, r6
-	b	.L1229
-.L1237:
-	adds	r5, r5, #1
-	cmp	r5, #65536
-	bne	.L1234
-	ldr	r3, [sp, #12]
-	adds	r3, r3, #1
-	cmp	r3, #5
-	str	r3, [sp, #12]
-	bls	.L1238
-	b	.L1242
-.L1271:
+	bl	flash_exit_slc_mode
+	mov	r0, r6
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1240:
 	.align	2
-.L1270:
-	.word	gp_flash_check_buf
-	.word	.LANCHOR18
-	.word	idb_buf
-	.word	.LANCHOR15
-	.word	.LANCHOR16
-	.word	1446522928
-	.word	.LANCHOR33
-	.word	.LANCHOR152
-	.word	idb_buf+262144
-	.word	.LANCHOR119
-	.word	.LANCHOR14
+.L1239:
+	.word	.LANCHOR153
+	.word	.LANCHOR31
+	.word	.LANCHOR8
+	.word	.LANCHOR20
+	.word	.LANCHOR30
+	.word	.LANCHOR156
+	.word	.LANCHOR157
+	.word	1312902724
 	.word	.LANCHOR4
-	.word	.LC16
-	.size	idb_write_data, .-idb_write_data
-	.section	.text.ftl_memcmp,"ax",%progbits
+	.word	.LANCHOR154
+	.word	.LANCHOR155
+	.size	FlashLoadPhyInfo, .-FlashLoadPhyInfo
+	.section	.text.FlashSavePhyInfo,"ax",%progbits
 	.align	1
-	.global	ftl_memcmp
+	.global	FlashSavePhyInfo
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_memcmp, %function
-ftl_memcmp:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	memcmp
-	.size	ftl_memcmp, .-ftl_memcmp
-	.section	.text.rknand_get_clk_rate,"ax",%progbits
-	.align	1
-	.global	rknand_get_clk_rate
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	rknand_get_clk_rate, %function
-rknand_get_clk_rate:
-	@ args = 0, pretend = 0, frame = 0
+	.type	FlashSavePhyInfo, %function
+FlashSavePhyInfo:
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r0, .L1274
-	bx	lr
-.L1275:
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r6, .L1254
+	ldr	r7, .L1254+4
+	ldr	r3, [r6]
+	ldr	r10, .L1254+64
+	ldr	r8, .L1254+68
+	str	r3, [r7]
+	ldr	r3, .L1254+8
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	bl	FlashBchSel
+	mov	r2, #2048
+	movs	r1, #0
+	ldr	r0, [r6]
+	bl	ftl_memset
+	ldr	r0, [r7]
+	movs	r2, #32
+	ldr	r3, .L1254+12
+	ldr	r1, .L1254+16
+	str	r10, [r0]
+	adds	r0, r0, #16
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	strh	r3, [r0, #-4]	@ movhi
+	ldr	r3, .L1254+20
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	strh	r3, [r0, #-2]	@ movhi
+	ldr	r3, .L1254+24
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r3, [r0, #1060]
+	bl	ftl_memcpy
+	ldr	r0, [r7]
+	movs	r2, #8
+	ldr	r1, .L1254+28
+	adds	r0, r0, #80
+	bl	ftl_memcpy
+	ldr	r0, [r7]
+	movs	r2, #32
+	ldr	r1, .L1254+32
+	adds	r0, r0, #96
+	bl	ftl_memcpy
+	ldr	r0, [r7]
+	movs	r2, #32
+	ldr	r1, .L1254+36
+	adds	r0, r0, #160
+	bl	ftl_memcpy
+	ldr	r0, [r7]
+	movs	r2, #32
+	ldr	r1, .L1254+40
+	adds	r0, r0, #192
+	bl	ftl_memcpy
+	ldr	r0, [r7]
+	mov	r2, #852
+	ldr	r1, .L1254+44
+	adds	r0, r0, #224
+	bl	ftl_memcpy
+	ldr	r4, [r7]
+	movw	r1, #2036
+	add	r0, r4, #12
+	bl	js_hash
+	mov	r3, #1592
+	str	r0, [r4, #8]
+	str	r3, [r4, #4]
+	movs	r0, #0
+	ldr	r3, [r8]
+	movs	r4, #0
+	mov	r5, r4
+	str	r3, [r7]
+	bl	flash_enter_slc_mode
+	str	r7, [sp, #4]
+	ldr	r7, .L1254+48
+	str	r10, [sp, #8]
+	mov	fp, r7
+.L1247:
+	ldr	r1, [r7]
+	movs	r2, #0
+	mov	r0, r2
+	muls	r1, r5, r1
+	bl	FlashEraseBlock
+	ldr	r3, .L1254+52
+	ldrb	r10, [r3]	@ zero_extendqisi2
+	cmp	r10, #0
+	beq	.L1242
+	mov	r10, #0
+.L1243:
+	ldr	r1, [fp]
+	movs	r3, #0
+	ldr	r2, [r6]
+	mov	r0, r3
+	mla	r1, r1, r5, r10
+	add	r10, r10, #1
+	bl	FlashProgPage
+	cmp	r10, #10
+	bne	.L1243
+.L1244:
+	ldr	r1, [fp]
+	movs	r3, #0
+	ldr	r2, [r8]
+	mov	r0, r3
+	add	r10, r5, #1
+	muls	r1, r5, r1
+	bl	FlashReadRawPage
+	adds	r0, r0, #1
+	beq	.L1245
+	ldr	r3, [sp, #4]
+	ldr	r1, [sp, #8]
+	ldr	r3, [r3]
+	ldr	r2, [r3]
+	cmp	r2, r1
+	bne	.L1245
+	add	r0, r3, #12
+	movw	r1, #2036
+	str	r3, [sp, #12]
+	bl	js_hash
+	ldr	r3, [sp, #12]
+	ldr	r3, [r3, #8]
+	cmp	r3, r0
+	bne	.L1245
+	ldr	r3, .L1254+56
+	cmp	r4, #1
+	str	r10, [r3]
+	ldr	r3, [fp]
+	mul	r5, r5, r3
+	ldr	r3, .L1254+60
+	str	r5, [r3]
+	beq	.L1248
+	movs	r4, #1
+.L1245:
+	mov	r5, r10
+	cmp	r5, #4
+	bne	.L1247
+.L1246:
+	movs	r0, #0
+	bl	flash_exit_slc_mode
+	clz	r0, r4
+	lsrs	r0, r0, #5
+	negs	r0, r0
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1242:
+	ldr	r1, [r7]
+	mov	r3, r10
+	ldr	r2, [r6]
+	mov	r0, r10
+	muls	r1, r5, r1
+	bl	FlashProgPage
+	ldr	r1, [r7]
+	mov	r3, r10
+	ldr	r2, [r6]
+	mov	r0, r10
+	muls	r1, r5, r1
+	adds	r1, r1, #1
+	bl	FlashProgPage
+	b	.L1244
+.L1248:
+	movs	r4, #2
+	b	.L1246
+.L1255:
 	.align	2
-.L1274:
-	.word	148000000
-	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
-	.section	.text.ftl_malloc,"ax",%progbits
+.L1254:
+	.word	.LANCHOR154
+	.word	.LANCHOR153
+	.word	.LANCHOR158
+	.word	.LANCHOR26
+	.word	.LANCHOR22
+	.word	.LANCHOR3
+	.word	.LANCHOR30
+	.word	.LANCHOR27
+	.word	.LANCHOR18
+	.word	.LANCHOR31
+	.word	.LANCHOR8
+	.word	.LANCHOR20
+	.word	.LANCHOR4
+	.word	.LANCHOR16
+	.word	.LANCHOR156
+	.word	.LANCHOR155
+	.word	1312902724
+	.word	.LANCHOR152
+	.size	FlashSavePhyInfo, .-FlashSavePhyInfo
+	.section	.text.FlashReadIdbDataRaw,"ax",%progbits
 	.align	1
-	.global	ftl_malloc
+	.global	FlashReadIdbDataRaw
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_malloc, %function
-ftl_malloc:
-	@ args = 0, pretend = 0, frame = 0
+	.type	FlashReadIdbDataRaw, %function
+FlashReadIdbDataRaw:
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r3, #60
+	strb	r3, [sp, #12]
+	movs	r3, #40
+	mov	r10, r0
+	strb	r3, [sp, #13]
+	movs	r3, #24
+	strb	r3, [sp, #14]
+	movs	r3, #16
+	strb	r3, [sp, #15]
+	ldr	r3, .L1274
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r3, [sp]
+	ldr	r3, .L1274+4
+	ldr	r2, [r3]
+	str	r3, [sp, #4]
+	cbz	r2, .L1257
+	movs	r0, #0
+	bl	flash_enter_slc_mode
+.L1257:
+	mov	r7, #-1
+	movs	r4, #2
+	mov	r2, #2048
 	movs	r1, #0
-	b	kmalloc
-	.size	ftl_malloc, .-ftl_malloc
-	.section	.text.NandcInit,"ax",%progbits
+	mov	r0, r10
+	bl	ftl_memset
+.L1258:
+	ldr	r3, .L1274+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r4, r3
+	bcc	.L1263
+.L1262:
+	ldr	r0, [sp]
+	bl	FlashBchSel
+	ldr	r3, [sp, #4]
+	ldr	r3, [r3]
+	cbz	r3, .L1256
+	movs	r0, #0
+	bl	flash_exit_slc_mode
+.L1256:
+	mov	r0, r7
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1263:
+	ldr	r5, .L1274+12
+	movs	r6, #0
+	ldr	fp, .L1274+28
+.L1260:
+	add	r3, sp, #12
+	ldrb	r8, [r6, r3]	@ zero_extendqisi2
+	mov	r0, r8
+	bl	FlashBchSel
+	ldr	r1, [fp]
+	movs	r3, #0
+	ldr	r2, [r5]
+	mov	r0, r3
+	muls	r1, r4, r1
+	bl	FlashReadRawPage
+	adds	r0, r0, #1
+	bne	.L1259
+	adds	r6, r6, #1
+	cmp	r6, #4
+	bne	.L1260
+.L1261:
+	adds	r4, r4, #1
+	b	.L1258
+.L1266:
+	movs	r7, #0
+	b	.L1262
+.L1259:
+	ldr	r3, [r5]
+	ldr	r2, [r3]
+	ldr	r3, .L1274+16
+	cmp	r2, r3
+	bne	.L1261
+	mov	r1, r8
+	ldr	r0, .L1274+20
+	bl	printf
+	mov	r2, #2048
+	ldr	r1, [r5]
+	mov	r0, r10
+	bl	ftl_memcpy
+	ldr	r3, [r5]
+	ldr	r2, .L1274+8
+	ldr	r3, [r3, #512]
+	strb	r3, [r2]
+	ldr	r3, .L1274+24
+	ldr	r2, [r3]
+	cmp	r4, r2
+	bcs	.L1266
+	str	r4, [r3]
+	movs	r7, #0
+	bl	FlashSavePhyInfo
+	b	.L1261
+.L1275:
+	.align	2
+.L1274:
+	.word	.LANCHOR33
+	.word	.LANCHOR29
+	.word	.LANCHOR3
+	.word	.LANCHOR154
+	.word	-52655045
+	.word	.LC15
+	.word	.LANCHOR156
+	.word	.LANCHOR4
+	.size	FlashReadIdbDataRaw, .-FlashReadIdbDataRaw
+	.section	.text.idb_write_data,"ax",%progbits
 	.align	1
-	.global	NandcInit
+	.global	idb_write_data
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	NandcInit, %function
-NandcInit:
-	@ args = 0, pretend = 0, frame = 0
+	.type	idb_write_data, %function
+idb_write_data:
+	@ args = 0, pretend = 0, frame = 96
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	movs	r2, #1
-	ldr	r3, .L1279
-	movs	r4, #0
-	ldr	r5, .L1279+4
-	str	r2, [r3, #12]
-	movs	r2, #2
-	str	r2, [r3, #20]
-	movs	r2, #3
-	stm	r3, {r0, r4}
-	str	r0, [r3, #8]
-	str	r0, [r3, #16]
-	str	r2, [r3, #28]
-	str	r0, [r3, #24]
-	ldr	r3, .L1279+8
-	ldr	r2, .L1279+12
-	str	r0, [r3]
-	ldr	r3, [r0]
-	and	r3, r3, #253952
-	ubfx	r1, r3, #13, #1
-	bfi	r3, r4, #13, #1
-	str	r1, [r2]
-	orr	r3, r3, #256
-	ldr	r2, [r0, #352]
-	ldr	r1, .L1279+16
-	ubfx	r2, r2, #16, #4
-	str	r2, [r1]
-	ldr	r2, [r0, #352]
-	str	r2, [r5]
-	movw	r5, #2049
-	cmp	r2, r5
-	itt	eq
-	moveq	r2, #8
-	streq	r2, [r1]
-	str	r3, [r0]
-	movw	r3, #4225
-	str	r4, [r0, #336]
-	str	r3, [r0, #4]
-	movw	r3, #8322
-	str	r3, [r0, #344]
-	ldr	r3, .L1279+20
-	str	r3, [r0, #304]
-	mov	r0, #36864
-	bl	ftl_malloc
-	ldr	r3, .L1279+24
-	str	r0, [r3]
-	ldr	r3, .L1279+28
-	str	r0, [r3]
-	add	r0, r0, #32768
-	str	r0, [r3, #4]
-	str	r4, [r3, #24]
-	ldr	r3, .L1279+32
-	str	r4, [r3]
-	pop	{r3, r4, r5, pc}
-.L1280:
-	.align	2
-.L1279:
-	.word	.LANCHOR0
-	.word	.LANCHOR119
-	.word	.LANCHOR19
-	.word	.LANCHOR155
-	.word	.LANCHOR34
-	.word	1710593
-	.word	.LANCHOR156
-	.word	.LANCHOR35
-	.word	.LANCHOR36
-	.size	NandcInit, .-NandcInit
-	.section	.text.FtlMemInit,"ax",%progbits
-	.align	1
-	.global	FtlMemInit
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlMemInit, %function
-FtlMemInit:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1286
+	mov	r0, r1
+	mov	r1, r2
+	adds	r2, r0, r3
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r4, #0
-	ldr	r2, .L1286+4
-	movs	r6, #12
-	strh	r4, [r3]	@ movhi
-	ldr	r3, .L1286+8
-	ldr	r5, .L1286+12
-	ldr	r10, .L1286+304
-	str	r4, [r3]
-	ldr	r3, .L1286+16
-	ldr	r8, .L1286+308
-	ldr	fp, .L1286+312
-	str	r4, [r3]
-	ldr	r3, .L1286+20
-	str	r4, [r3]
-	ldr	r3, .L1286+24
-	str	r4, [r3]
-	ldr	r3, .L1286+28
-	str	r4, [r3]
-	ldr	r3, .L1286+32
-	str	r4, [r3]
-	ldr	r3, .L1286+36
-	str	r4, [r3]
-	ldr	r3, .L1286+40
-	str	r4, [r3]
-	ldr	r3, .L1286+44
-	str	r4, [r3]
-	ldr	r3, .L1286+48
-	str	r4, [r3]
-	ldr	r3, .L1286+52
-	str	r4, [r3]
-	ldr	r3, .L1286+56
-	str	r4, [r3]
-	ldr	r3, .L1286+60
-	str	r4, [r3]
-	ldr	r3, .L1286+64
-	str	r4, [r3]
-	ldr	r3, .L1286+68
-	str	r4, [r3]
-	ldr	r3, .L1286+72
-	str	r4, [r3]
-	ldr	r3, .L1286+76
-	str	r4, [r3]
-	movw	r3, #65535
-	str	r3, [r2]
-	ldr	r2, .L1286+80
-	str	r4, [r2]
-	ldr	r2, .L1286+84
-	str	r4, [r2]
-	ldr	r2, .L1286+88
+	cmp	r2, #63
+	sub	sp, sp, #104
+	bls	.L1277
+	cmp	r0, #576
+	bcs	.L1278
+	ldr	r2, .L1329
+	cmp	r0, #64
+	mov	r4, #1
 	str	r4, [r2]
-	ldr	r2, .L1286+92
-	strh	r3, [r2]	@ movhi
-	ldr	r2, .L1286+96
-	strh	r3, [r2]	@ movhi
-	ldr	r2, .L1286+100
-	strh	r3, [r2]	@ movhi
-	ldr	r2, .L1286+104
-	strh	r3, [r2]	@ movhi
-	movs	r2, #32
-	ldr	r3, .L1286+108
-	strh	r2, [r3]	@ movhi
-	movs	r2, #128
-	ldr	r3, .L1286+112
-	strh	r2, [r3]	@ movhi
-	ldr	r3, .L1286+116
-	strh	r4, [r3]	@ movhi
-	ldr	r3, .L1286+120
-	strh	r4, [r3]	@ movhi
-	ldr	r3, .L1286+124
-	strh	r4, [r3]	@ movhi
-	ldr	r3, .L1286+128
-	strh	r4, [r3]	@ movhi
-	ldrh	r0, [r5]
-	lsls	r0, r0, #1
-	bl	ftl_malloc
-	ldr	r3, .L1286+132
-	str	r0, [r3]
-	ldrh	r0, [r5]
-	movs	r5, #36
-	muls	r0, r6, r0
-	bl	ftl_malloc
-	ldr	r3, .L1286+136
-	str	r0, [r3]
-	ldrh	r3, [r10]
-	muls	r5, r3, r5
-	lsls	r7, r5, #2
-	mov	r0, r7
-	bl	ftl_malloc
-	ldr	r3, .L1286+140
-	str	r0, [r3]
-	mov	r0, r5
-	bl	ftl_malloc
-	ldr	r3, .L1286+144
-	str	r0, [r3]
-	mov	r0, r7
-	bl	ftl_malloc
-	ldr	r3, .L1286+148
-	ldr	r7, .L1286+152
-	str	r0, [r3]
-	mov	r0, r5
-	bl	ftl_malloc
-	ldr	r3, .L1286+156
-	str	r0, [r3]
-	mov	r0, r5
-	bl	ftl_malloc
-	ldr	r3, .L1286+160
-	ldrh	r5, [r7]
-	str	r0, [r3]
-	ldrh	r3, [r10]
-	mov	r0, r5
-	lsls	r3, r3, #1
-	adds	r3, r3, #1
-	str	r3, [r8]
-	bl	ftl_malloc
-	ldr	r3, .L1286+164
-	str	r0, [r3]
-	mov	r0, r5
-	bl	ftl_malloc
-	ldr	r3, .L1286+168
-	str	r0, [r3]
-	mov	r0, r5
-	bl	ftl_malloc
-	ldr	r3, .L1286+172
-	str	r0, [r3]
-	ldr	r0, [r8]
-	muls	r0, r5, r0
-	bl	ftl_malloc
-	ldr	r3, .L1286+176
-	str	r0, [r3]
-	mov	r0, r5
-	bl	ftl_malloc
-	ldr	r3, .L1286+180
-	str	r0, [r3]
-	mov	r0, r5
-	bl	ftl_malloc
-	ldr	r3, .L1286+184
-	str	r0, [r3]
-	ldr	r0, [r8]
-	muls	r0, r6, r0
-	bl	ftl_malloc
-	ldr	r3, .L1286+188
-	ldrh	r5, [r10]
-	ldr	r10, .L1286+316
-	str	r0, [r3]
-	ldrh	r3, [fp]
-	muls	r5, r3, r5
-	mov	r0, r5
-	bl	ftl_malloc
-	ldr	r3, .L1286+192
-	str	r0, [r3]
-	lsls	r0, r5, #2
-	ldr	r5, .L1286+196
-	bl	ftl_malloc
-	ldr	r3, .L1286+200
-	str	r0, [r3]
-	ldrh	r3, [fp]
-	ldr	r0, [r8]
-	ldr	r8, .L1286+320
-	muls	r0, r3, r0
-	bl	ftl_malloc
-	ldr	r3, .L1286+204
-	str	r0, [r3]
-	ldrh	r0, [r5]
-	lsls	r0, r0, #1
-	uxth	r0, r0
-	strh	r0, [r8]	@ movhi
-	bl	ftl_malloc
-	ldr	r3, .L1286+208
-	str	r0, [r3]
-	ldrh	r3, [r8]
-	ldr	r0, .L1286+212
-	addw	r3, r3, #547
-	lsrs	r3, r3, #9
-	and	r0, r0, r3, lsl #9
-	strh	r3, [r8]	@ movhi
-	bl	ftl_malloc
-	ldr	r3, .L1286+216
-	str	r0, [r3]
-	adds	r0, r0, #32
-	ldr	r3, .L1286+220
-	str	r0, [r3]
-	ldrh	r0, [r5]
-	lsls	r0, r0, #1
-	bl	ftl_malloc
-	ldr	r3, .L1286+224
-	str	r0, [r3]
-	ldr	r3, [r10]
-	lsl	r8, r3, #1
-	mov	r0, r8
-	bl	ftl_malloc
-	ldr	r3, .L1286+228
-	str	r0, [r3]
-	mov	r0, r8
-	bl	ftl_malloc
-	ldr	r3, .L1286+232
-	ldr	r8, .L1286+324
-	str	r0, [r3]
-	ldrh	r0, [r5]
-	lsrs	r0, r0, #3
-	adds	r0, r0, #4
-	bl	ftl_malloc
-	ldr	r3, .L1286+236
-	str	r0, [r3]
-	ldrh	r0, [r8]
-	lsls	r0, r0, #1
-	bl	ftl_malloc
-	ldr	r3, .L1286+240
-	str	r0, [r3]
-	ldrh	r0, [r8]
-	lsls	r0, r0, #1
-	bl	ftl_malloc
-	ldr	r3, .L1286+244
-	str	r0, [r3]
-	ldrh	r0, [r8]
-	ldr	r8, .L1286+328
-	lsls	r0, r0, #2
-	bl	ftl_malloc
-	ldr	r3, .L1286+248
-	str	r0, [r3]
-	ldrh	r0, [r8]
-	lsls	r0, r0, #2
-	bl	ftl_malloc
-	ldrh	r2, [r8]
-	mov	r1, r4
-	ldr	r3, .L1286+252
-	lsls	r2, r2, #2
-	str	r0, [r3]
-	bl	ftl_memset
-	ldr	r3, .L1286+256
-	ldrh	r4, [r3]
-	lsls	r4, r4, #2
-	mov	r0, r4
-	bl	ftl_malloc
-	ldr	r3, .L1286+260
-	str	r0, [r3]
-	mov	r0, r4
-	bl	ftl_malloc
-	ldr	r3, .L1286+264
-	ldr	r4, .L1286+268
-	str	r0, [r3]
-	ldr	r0, [r10]
-	lsls	r0, r0, #2
-	bl	ftl_malloc
-	ldr	r3, .L1286+272
-	str	r0, [r3]
-	ldrh	r0, [r4]
-	muls	r0, r6, r0
-	ldr	r6, .L1286+276
-	bl	ftl_malloc
-	ldr	r3, .L1286+280
-	str	r0, [r3]
-	ldrh	r3, [r4]
-	ldrh	r0, [r7]
-	muls	r0, r3, r0
-	bl	ftl_malloc
-	ldr	r3, .L1286+284
-	str	r0, [r3]
-	movs	r0, #6
-	ldrh	r3, [r5]
-	ldr	r5, .L1286+288
-	muls	r0, r3, r0
-	bl	ftl_malloc
-	ldr	r3, .L1286+292
-	str	r0, [r3]
-	ldr	r3, .L1286+296
-	ldrh	r0, [r3]
-	ldrh	r3, [r6]
-	adds	r0, r0, #31
-	asrs	r0, r0, #5
-	strh	r0, [r5]	@ movhi
-	muls	r0, r3, r0
-	lsls	r0, r0, #2
-	bl	ftl_malloc
-	ldrh	r1, [r5]
-	movs	r2, #1
-	ldr	r3, .L1286+300
-	ldrh	r6, [r6]
-	lsls	r1, r1, #2
-	mov	r4, r3
-	str	r0, [r4, #28]!
-	b	.L1287
-.L1288:
-	.align	2
-.L1286:
-	.word	.LANCHOR139
-	.word	.LANCHOR173
-	.word	.LANCHOR157
-	.word	.LANCHOR54
-	.word	.LANCHOR158
-	.word	.LANCHOR159
-	.word	.LANCHOR160
-	.word	.LANCHOR161
-	.word	.LANCHOR162
-	.word	.LANCHOR163
-	.word	.LANCHOR164
-	.word	.LANCHOR165
-	.word	.LANCHOR166
-	.word	.LANCHOR167
-	.word	.LANCHOR168
-	.word	.LANCHOR79
-	.word	.LANCHOR169
-	.word	.LANCHOR170
-	.word	.LANCHOR171
-	.word	.LANCHOR172
-	.word	.LANCHOR174
-	.word	.LANCHOR175
-	.word	.LANCHOR73
-	.word	.LANCHOR112
-	.word	.LANCHOR113
-	.word	.LANCHOR114
-	.word	.LANCHOR115
-	.word	.LANCHOR176
-	.word	.LANCHOR177
-	.word	.LANCHOR178
-	.word	.LANCHOR116
-	.word	.LANCHOR179
-	.word	.LANCHOR118
-	.word	.LANCHOR108
-	.word	.LANCHOR111
-	.word	.LANCHOR180
-	.word	.LANCHOR181
-	.word	.LANCHOR182
-	.word	.LANCHOR57
-	.word	.LANCHOR77
-	.word	.LANCHOR106
-	.word	.LANCHOR183
-	.word	.LANCHOR184
-	.word	.LANCHOR185
-	.word	.LANCHOR104
-	.word	.LANCHOR186
-	.word	.LANCHOR187
-	.word	.LANCHOR103
-	.word	.LANCHOR188
-	.word	.LANCHOR41
-	.word	.LANCHOR189
-	.word	.LANCHOR105
-	.word	.LANCHOR137
-	.word	33553920
-	.word	.LANCHOR191
-	.word	.LANCHOR78
-	.word	.LANCHOR83
-	.word	.LANCHOR129
-	.word	.LANCHOR125
-	.word	.LANCHOR1
-	.word	.LANCHOR71
-	.word	.LANCHOR192
-	.word	.LANCHOR193
-	.word	.LANCHOR194
-	.word	.LANCHOR66
-	.word	.LANCHOR131
-	.word	.LANCHOR195
-	.word	.LANCHOR67
-	.word	.LANCHOR130
-	.word	.LANCHOR45
-	.word	.LANCHOR96
-	.word	.LANCHOR126
-	.word	.LANCHOR123
-	.word	.LANCHOR81
-	.word	.LANCHOR51
-	.word	.LANCHOR74
-	.word	.LANCHOR38
-	.word	.LANCHOR107
-	.word	.LANCHOR58
-	.word	.LANCHOR64
-	.word	.LANCHOR190
-	.word	.LANCHOR61
-	.word	.LANCHOR62
-.L1287:
-	mov	r0, r1
-.L1282:
-	cmp	r2, r6
-	bcc	.L1283
-	add	r3, r3, r2, lsl #2
-	ldr	r2, .L1289
-	movs	r1, #0
-	adds	r3, r3, #24
-.L1284:
-	cmp	r3, r2
-	bne	.L1285
-	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1283:
-	ldr	r5, [r3, #28]
-	adds	r2, r2, #1
-	add	r5, r5, r0
-	add	r0, r0, r1
-	str	r5, [r4, #4]!
-	b	.L1282
-.L1285:
-	str	r1, [r3, #4]!
-	b	.L1284
-.L1290:
-	.align	2
-.L1289:
-	.word	.LANCHOR74+56
-	.size	FtlMemInit, .-FtlMemInit
-	.section	.text.ftl_free,"ax",%progbits
-	.align	1
-	.global	ftl_free
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_free, %function
-ftl_free:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	free
-	.size	ftl_free, .-ftl_free
-	.section	.text.StorageSysDataLoad,"ax",%progbits
-	.align	1
-	.global	StorageSysDataLoad
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	StorageSysDataLoad, %function
-StorageSysDataLoad:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, lr}
-	mov	r4, r1
-	mov	r5, r0
-	mov	r2, #512
-	movs	r1, #0
-	mov	r0, r4
-	bl	memset
-	mov	r3, r4
-	add	r1, r5, #256
-	movs	r2, #1
-	movs	r0, #16
-	pop	{r4, r5, r6, lr}
-	b	FtlRead
-	.size	StorageSysDataLoad, .-StorageSysDataLoad
-	.section	.text.FlashBootVendorRead,"ax",%progbits
-	.align	1
-	.global	FlashBootVendorRead
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FlashBootVendorRead, %function
-FlashBootVendorRead:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	mov	r3, r2
-	mov	r1, r0
-	movs	r2, #1
-	movs	r0, #16
-	b	FtlRead
-	.size	FlashBootVendorRead, .-FlashBootVendorRead
-	.section	.text.FlashCs123Init,"ax",%progbits
-	.align	1
-	.global	FlashCs123Init
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FlashCs123Init, %function
-FlashCs123Init:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	bx	lr
-	.size	FlashCs123Init, .-FlashCs123Init
-	.section	.text.rk_nand_de_init,"ax",%progbits
-	.align	1
-	.global	rk_nand_de_init
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	rk_nand_de_init, %function
-rk_nand_de_init:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	FlashDeInit
-	.size	rk_nand_de_init, .-rk_nand_de_init
-	.section	.text.rk_ftl_get_capacity,"ax",%progbits
-	.align	1
-	.global	rk_ftl_get_capacity
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	rk_ftl_get_capacity, %function
-rk_ftl_get_capacity:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L1297
-	ldr	r0, [r3]
-	bx	lr
-.L1298:
-	.align	2
-.L1297:
-	.word	.LANCHOR68
-	.size	rk_ftl_get_capacity, .-rk_ftl_get_capacity
-	.section	.text.rknand_print_hex,"ax",%progbits
-	.align	1
-	.global	rknand_print_hex
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	rknand_print_hex, %function
-rknand_print_hex:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r5, #0
-	ldr	r7, .L1308
-	mov	fp, r0
-	mov	r6, r1
-	mov	r8, r2
-	mov	r10, r3
-	mov	r4, r5
-.L1300:
-	cmp	r4, r10
-	bne	.L1306
-	ldr	r1, .L1308+4
-	ldr	r0, .L1308+8
-	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
-	b	printf
-.L1306:
-	cbnz	r5, .L1301
-	mov	r2, r4
-	mov	r1, fp
-	ldr	r0, .L1308+12
-	bl	printf
-.L1301:
-	cmp	r8, #4
-	bne	.L1302
-	ldr	r1, [r6, r4, lsl #2]
-.L1307:
-	mov	r0, r7
-	adds	r5, r5, #1
-	bl	printf
-	cmp	r5, #15
-	bls	.L1305
-	movs	r5, #0
-	ldr	r1, .L1308+4
-	ldr	r0, .L1308+8
-	bl	printf
-.L1305:
-	adds	r4, r4, #1
-	b	.L1300
-.L1302:
-	cmp	r8, #2
-	ite	eq
-	ldrsheq	r1, [r6, r4, lsl #1]
-	ldrbne	r1, [r6, r4]	@ zero_extendqisi2
-	b	.L1307
-.L1309:
-	.align	2
-.L1308:
-	.word	.LC19
-	.word	.LC20
-	.word	.LC7
-	.word	.LC18
-	.size	rknand_print_hex, .-rknand_print_hex
-	.section	.text.HynixGetReadRetryDefault,"ax",%progbits
-	.align	1
-	.global	HynixGetReadRetryDefault
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	HynixGetReadRetryDefault, %function
-HynixGetReadRetryDefault:
-	@ args = 0, pretend = 0, frame = 56
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r3, #172
-	ldr	r5, .L1428
-	cmp	r0, #2
-	mov	r1, #173
-	mov	r2, #174
-	sub	sp, sp, #56
-	mov	r4, r0
-	strb	r3, [r5, #4]
-	mov	r3, #175
-	strb	r0, [r5]
-	strb	r1, [r5, #5]
-	strb	r2, [r5, #6]
-	strb	r3, [r5, #7]
-	bne	.L1311
-	movs	r3, #167
-	mov	fp, #7
-	strb	r3, [r5, #4]
-	movs	r2, #247
-	ldr	r3, .L1428+4
-	strb	r2, [r3, #17]
-.L1421:
-	mov	r10, #4
-	b	.L1312
-.L1311:
-	cmp	r0, #3
-	bne	.L1313
-	movs	r3, #176
-	strb	r3, [r5, #4]
-	movs	r3, #177
-	strb	r3, [r5, #5]
-	movs	r3, #178
-	strb	r3, [r5, #6]
-	movs	r3, #179
-	strb	r3, [r5, #7]
-	movs	r3, #180
-	strb	r3, [r5, #8]
-	movs	r3, #181
-	strb	r3, [r5, #9]
-	movs	r3, #182
-	strb	r3, [r5, #10]
-	movs	r3, #183
-.L1422:
-	mov	fp, #8
-	strb	r3, [r5, #11]
-	mov	r10, fp
-.L1312:
-	subs	r3, r4, #1
-	cmp	r3, #1
-	bhi	.L1318
-	mov	r8, #0
-.L1319:
-	ldr	r3, .L1428+8
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	uxtb	r3, r8
-	cmp	r2, r3
-	bhi	.L1325
-.L1326:
-	ldr	r3, .L1428
-	strb	r10, [r3, #1]
-	strb	fp, [r3, #2]
-	add	sp, sp, #56
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1313:
-	cmp	r0, #4
-	bne	.L1314
-	movs	r0, #204
-	strb	r1, [r5, #9]
-	strb	r0, [r5, #4]
-	movs	r0, #191
-	strb	r0, [r5, #5]
-	movs	r0, #170
-	strb	r0, [r5, #6]
-	movs	r0, #171
-	strb	r0, [r5, #7]
-	movs	r0, #205
-	strb	r0, [r5, #8]
-	strb	r2, [r5, #10]
-	b	.L1422
-.L1314:
-	cmp	r0, #5
-	bne	.L1315
-	movs	r3, #56
-	mov	fp, #8
-	strb	r3, [r5, #4]
-	movs	r3, #57
-	strb	r3, [r5, #5]
-	movs	r3, #58
-	strb	r3, [r5, #6]
-	movs	r3, #59
-	strb	r3, [r5, #7]
-	b	.L1421
-.L1315:
-	cmp	r0, #6
-	bne	.L1316
-	movs	r3, #14
-	mov	fp, #12
-	strb	r3, [r5, #4]
-	movs	r3, #15
-	strb	r3, [r5, #5]
-	movs	r3, #16
-	strb	r3, [r5, #6]
-	movs	r3, #17
-	strb	r3, [r5, #7]
-	b	.L1421
-.L1316:
-	cmp	r0, #7
-	bne	.L1317
-	movs	r3, #176
-	mov	fp, #12
-	strb	r3, [r5, #4]
-	movs	r3, #177
-	strb	r3, [r5, #5]
-	movs	r3, #178
-	strb	r3, [r5, #6]
-	movs	r3, #179
-	strb	r3, [r5, #7]
-	movs	r3, #180
-	strb	r3, [r5, #8]
-	movs	r3, #181
-	strb	r3, [r5, #9]
-	movs	r3, #182
-	strb	r3, [r5, #10]
-	movs	r3, #183
-	strb	r3, [r5, #11]
-	movs	r3, #212
-	strb	r3, [r5, #12]
-	movs	r3, #213
-	strb	r3, [r5, #13]
-	mov	r10, #10
-	b	.L1312
-.L1317:
-	cmp	r0, #8
-	mov	r3, #7
-	bne	.L1376
-	strb	r3, [r5, #5]
-	movs	r3, #9
-	movs	r2, #6
-	strb	r3, [r5, #7]
-	movs	r3, #10
-	strb	r2, [r5, #4]
-	strb	r0, [r5, #6]
-	mov	fp, #50
-	strb	r3, [r5, #8]
-	mov	r10, #5
-	b	.L1312
-.L1376:
-	mov	fp, r3
-	b	.L1421
-.L1325:
-	ldr	r2, .L1428+12
-	movs	r6, #0
-	ldrb	r2, [r2, r3]	@ zero_extendqisi2
-	ldr	r3, .L1428+16
-	ldr	r7, [r3, r2, lsl #3]
-	add	r4, r5, r2, lsl #6
-	add	r3, r3, r2, lsl #3
-	movs	r2, #55
-	adds	r4, r4, #20
-	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-	add	r7, r7, r3, lsl #8
-	addw	r3, r7, #2056
-.L1320:
-	adds	r1, r5, r6
-	str	r2, [r3]
-	ldrb	r1, [r1, #4]	@ zero_extendqisi2
-	movs	r0, #80
-	str	r2, [sp, #4]
-	str	r3, [sp]
-	str	r1, [r7, #2052]
-	bl	udelay
-	ldr	r1, [r7, #2048]
-	ldr	r3, [sp]
-	ldr	r2, [sp, #4]
-	strb	r1, [r4, r6]
-	adds	r6, r6, #1
-	uxtb	r1, r6
-	cmp	r10, r1
-	bhi	.L1320
-	ldr	r7, .L1428+4
-	mov	r1, r4
-	movs	r2, #0
-.L1323:
-	movs	r3, #1
-	adds	r6, r7, r2
-.L1322:
-	ldrb	r0, [r6, r3, lsl #2]	@ zero_extendqisi2
-	ldrb	ip, [r1]	@ zero_extendqisi2
-	add	r0, r0, ip
-	strb	r0, [r1, r3, lsl #3]
-	adds	r3, r3, #1
-	cmp	r3, #7
-	bne	.L1322
-	adds	r2, r2, #1
-	adds	r1, r1, #1
-	cmp	r2, #4
-	bne	.L1323
-	movs	r3, #0
-	add	r8, r8, #1
-	strb	r3, [r4, #16]
-	strb	r3, [r4, #24]
-	strb	r3, [r4, #32]
-	strb	r3, [r4, #40]
-	strb	r3, [r4, #48]
-	strb	r3, [r4, #41]
-	strb	r3, [r4, #49]
-	b	.L1319
-.L1318:
-	subs	r3, r4, #3
-	cmp	r3, #5
-	bhi	.L1326
-	smulbb	r3, fp, r10
-	asrs	r2, r3, #1
-	lsls	r3, r3, #4
-	str	r3, [sp, #48]
-	lsls	r3, r2, #2
-	str	r2, [sp, #12]
-	str	r3, [sp, #44]
-	lsls	r3, r2, #1
-	str	r3, [sp, #32]
-	movs	r3, #0
-.L1427:
-	str	r3, [sp, #28]
-	ldrb	r3, [sp, #28]	@ zero_extendqisi2
-	str	r3, [sp, #16]
-	ldr	r3, .L1428+8
-	ldr	r2, [sp, #16]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, r2
-	bls	.L1326
-	ldr	r2, [sp, #16]
-	ldr	r3, .L1428+12
-	ldrb	r8, [r3, r2]	@ zero_extendqisi2
-	ldr	r3, .L1428+16
-	mov	r0, r8
-	ldr	r2, [r3, r8, lsl #3]
-	add	r3, r3, r8, lsl #3
-	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-	str	r2, [sp]
-	str	r3, [sp, #4]
-	mov	r3, r2
-	ldr	r2, [sp, #4]
-	add	r5, r3, r2, lsl #8
-	movs	r3, #255
-	str	r3, [r5, #2056]
-	bl	NandcWaitFlashReady
-	cmp	r4, #7
-	bne	.L1328
-	ldr	r3, .L1428
-	movs	r0, #160
-	mla	r0, r0, r8, r3
-	add	r3, r0, #28
-.L1423:
-	ldr	r2, [sp, #4]
-	cmp	r4, #4
-	str	r3, [sp, #20]
-	ldr	r3, [sp]
-	add	r3, r3, r2, lsl #8
-	mov	r2, #54
-	str	r2, [r3, #2056]
-	bne	.L1331
-	movs	r2, #255
-	str	r2, [r3, #2052]
-	movs	r2, #64
-	str	r2, [r3, #2048]
-	movs	r2, #204
-.L1424:
-	str	r2, [r3, #2052]
-	movs	r2, #77
-	b	.L1425
+	bhi	.L1279
+	rsb	r0, r0, #64
+	subs	r2, r3, r0
+	add	r1, r1, r0, lsl #9
+	ldr	r0, .L1329+4
+	lsls	r2, r2, #9
 .L1328:
-	cmp	r4, #8
-	beq	.L1330
-	ldr	r0, .L1428
-	add	r0, r0, r8, lsl #6
-	add	r3, r0, #20
-	b	.L1423
-.L1429:
-	.align	2
-.L1428:
-	.word	.LANCHOR20
-	.word	.LANCHOR196
-	.word	.LANCHOR25
-	.word	.LANCHOR26
-	.word	.LANCHOR0
-.L1331:
-	subs	r2, r4, #5
-	cmp	r2, #1
-	bhi	.L1333
-	ldr	r2, .L1430
-	ldrb	r2, [r2, #4]	@ zero_extendqisi2
-	str	r2, [r3, #2052]
-	movs	r2, #82
-.L1425:
-	str	r2, [r3, #2048]
-.L1332:
-	ldr	r2, [sp, #4]
-	cmp	r4, #6
-	ldr	r3, [sp]
-	add	r3, r3, r2, lsl #8
-	mov	r2, #22
-	str	r2, [r3, #2056]
-	mov	r2, #23
-	str	r2, [r3, #2056]
-	mov	r2, #4
-	str	r2, [r3, #2056]
-	mov	r2, #25
-	str	r2, [r3, #2056]
-	mov	r2, #0
-	str	r2, [r3, #2056]
-	str	r2, [r3, #2052]
-	str	r2, [r3, #2052]
-	it	eq
-	moveq	r2, #31
-	str	r2, [r3, #2052]
-	movs	r2, #2
-	str	r2, [r3, #2052]
-	movs	r2, #0
-	str	r2, [r3, #2052]
-.L1375:
-	ldr	r2, [sp, #4]
-	mov	r0, r8
-	ldr	r3, [sp]
-	add	r3, r3, r2, lsl #8
-	movs	r2, #48
-	str	r2, [r3, #2056]
-	bl	NandcWaitFlashReady
-	subs	r3, r4, #5
-	cmp	r3, #1
-	str	r3, [sp, #36]
-	bls	.L1378
-	cmp	r4, #8
-	beq	.L1378
-	cmp	r4, #7
-	ite	eq
-	moveq	r2, #32
-	movne	r2, #2
-.L1336:
-	ldr	r3, .L1430+4
-	subs	r2, r2, #1
-	ldm	sp, {r5, r6}
+	bl	ftl_memcpy
+.L1317:
+	movs	r0, #0
+	add	sp, sp, #104
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1279:
+	rsb	r2, r0, #576
+	subs	r0, r0, #64
+	cmp	r2, r3
+	it	cs
+	movcs	r2, r3
+	ldr	r3, .L1329+4
+	lsls	r2, r2, #9
+	add	r0, r3, r0, lsl #9
+	b	.L1328
+.L1277:
+	cmp	r0, #576
+	bcc	.L1317
+.L1278:
+	ldr	r3, .L1329
 	ldr	r3, [r3]
-	add	r5, r5, r6, lsl #8
-	subs	r1, r3, #1
-	uxtab	r2, r3, r2
+	cmp	r3, #0
+	beq	.L1317
+	ldr	r3, .L1329+8
+	ldr	r2, [r3]
+	ldrb	r3, [r2, #9]	@ zero_extendqisi2
+	ldrh	r2, [r2, #10]
+	smulbb	r3, r3, r2
+	uxth	r3, r3
+	mov	r1, r3
+	addw	r0, r3, #511
+	str	r3, [sp, #8]
+	bl	__aeabi_uidiv
+	ldr	r1, .L1329+4
+	movs	r3, #0
+	str	r0, [sp, #20]
+	movw	r2, #65535
 	mov	r0, r1
-	str	r5, [sp, #8]
-.L1337:
-	ldr	r5, [sp, #8]
-	ldr	r5, [r5, #2048]
-	strb	r5, [r0, #1]!
-	cmp	r0, r2
-	bne	.L1337
-	cmp	r4, #8
-	bne	.L1338
-	movs	r2, #0
-.L1340:
-	ldrb	r0, [r3, r2, lsl #2]	@ zero_extendqisi2
-	uxtb	r1, r2
-	cmp	r0, #50
-	beq	.L1339
-	add	r0, r3, r2, lsl #2
-	ldrb	r0, [r0, #1]	@ zero_extendqisi2
-	cmp	r0, #5
-	beq	.L1339
-	adds	r2, r2, #1
-	cmp	r2, #8
-	bne	.L1340
-.L1341:
-	movs	r1, #0
-	ldr	r0, .L1430+8
+.L1283:
+	ldr	r4, [r1, r2, lsl #2]
+	cbnz	r4, .L1281
+	ldr	r4, [r1, r3, lsl #2]
+	adds	r3, r3, #1
+	cmp	r3, #4096
+	it	hi
+	movhi	r3, #0
+	str	r4, [r1, r2, lsl #2]
+	subs	r2, r2, #1
+	cmp	r2, #4096
+	bne	.L1283
+.L1281:
+	ldr	r1, [r0, r2, lsl #2]
+	mov	r3, #512
+	ldr	r0, .L1329+12
 	bl	printf
-.L1343:
-	b	.L1343
-.L1333:
-	cmp	r4, #7
-	bne	.L1332
-	movs	r2, #174
-	str	r2, [r3, #2052]
+	ldr	r3, .L1329+16
+	ldr	r2, [sp, #8]
+	ldr	r3, [r3]
+	str	r3, [sp, #16]
+	ldr	r3, [sp, #20]
+	muls	r3, r2, r3
+	str	r3, [sp, #36]
+	ldr	r3, [sp, #16]
+	mul	r4, r3, r2
+	movs	r3, #0
+	str	r3, [sp, #12]
+.L1284:
+	ldr	r3, [sp, #16]
+	cmp	r3, #15
+	bls	.L1301
+	ldr	r3, [sp, #12]
+	cbnz	r3, .L1303
+	mov	r1, r3
+	ldr	r0, .L1329+20
+	bl	printf
+.L1303:
+	ldr	r3, .L1329
 	movs	r2, #0
-	str	r2, [r3, #2048]
-	movs	r2, #176
-	b	.L1424
-.L1378:
-	movs	r2, #16
-	b	.L1336
-.L1339:
-	cmp	r1, #6
-	bhi	.L1341
-.L1342:
-	ldr	r3, .L1430+4
-	ldr	r2, [r3]
-	mov	r3, r2
-.L1352:
-	ldr	r0, [sp, #48]
-	subs	r1, r3, r2
-	cmp	r1, r0
-	blt	.L1353
-	ldr	r3, .L1430+4
-	ldr	r1, [r3]
-	ldr	r3, [sp, #32]
-	adds	r0, r1, r3
-	movs	r3, #8
-.L1355:
-	mov	r6, r0
-	movs	r5, #0
-.L1354:
-	ldrh	r7, [r6]
-	adds	r5, r5, #1
-	mvns	r7, r7
-	strh	r7, [r6], #2	@ movhi
-	ldr	r7, [sp, #12]
-	cmp	r7, r5
-	bgt	.L1354
-	ldr	r5, [sp, #44]
+	str	r2, [r3]
+	b	.L1317
+.L1330:
+	.align	2
+.L1329:
+	.word	.LANCHOR159
+	.word	idb_buf
+	.word	.LANCHOR7
+	.word	.LC16
+	.word	.LANCHOR156
+	.word	.LC18
+.L1301:
+	mov	r2, #512
+	movs	r1, #0
+	ldr	r0, .L1331
+	bl	memset
+	ldr	r3, .L1331+4
+	mov	r0, r4
+	ldr	r3, [r3]
+	ldrb	fp, [r3, #9]	@ zero_extendqisi2
+	ldrh	r5, [r3, #10]
+	bl	FW_FlashBlockErase.constprop.41
+	smulbb	r5, r5, fp
+	uxth	r5, r5
+	cmp	r5, #512
+	bcs	.L1285
+	adds	r0, r5, r4
+	bl	FW_FlashBlockErase.constprop.41
+.L1285:
+	ldr	r7, .L1331+8
+	mov	r1, r5
+	ldr	r10, .L1331+36
+	mov	r0, r4
+	bl	__aeabi_uidivmod
+	mov	r6, r1
+	subs	r3, r4, r1
+	str	r3, [sp, #24]
+.L1289:
+	lsrs	r2, r6, #2
+	beq	.L1286
+	ldr	r0, .L1331+12
+	adds	r1, r2, #1
+	ldr	r3, .L1331+16
+	ldrb	r0, [r0]	@ zero_extendqisi2
+	ldrh	r3, [r3, r1, lsl #1]
+	cbz	r0, .L1287
+	ldr	r0, [r10]
+	ldr	r5, .L1331+20
+	cmp	r0, r5
+	it	eq
+	moveq	r3, r1
+.L1287:
+	add	r3, r3, #1073741824
 	subs	r3, r3, #1
-	add	r0, r0, r5
-	bne	.L1355
-	mov	r7, r1
+	lsls	r3, r3, #2
+	str	r3, [sp, #40]
+.L1286:
+	movw	r3, #61424
+	str	r3, [sp, #44]
+	ldr	r3, .L1331+16
+	ldrh	r5, [r3, r2, lsl #1]
+	ldr	r3, .L1331+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L1288
+	ldr	r3, [r10]
+	ldr	r1, .L1331+20
+	cmp	r3, r1
+	it	eq
+	moveq	r5, r2
+.L1288:
+	ldr	r3, [sp, #24]
+	adds	r6, r6, #4
+	ldr	r2, .L1331+24
+	ldr	r8, .L1331+4
+	mla	r3, r5, fp, r3
+	adds	r5, r5, #1
+	uxth	r5, r5
+	str	r3, [sp, #32]
+	ldrb	r3, [r2]	@ zero_extendqisi2
+	ldr	r2, .L1331+28
+	str	r3, [sp, #28]
+	ldrb	r0, [r2]	@ zero_extendqisi2
+	bl	FlashBchSel
+	movs	r0, #0
+	bl	flash_boot_enter_slc_mode
+	ldr	r2, [r8]
+	ldr	r3, [sp, #32]
+	ldrb	r1, [r2, #9]	@ zero_extendqisi2
+	mov	r0, r3
+	bl	__aeabi_uidiv
+	add	r3, sp, #40
+	mov	r2, r7
+	mov	r1, r0
+	movs	r0, #0
+	bl	FlashProgPage
+	movs	r0, #0
+	add	r7, r7, #2048
+	bl	flash_boot_exit_slc_mode
+	ldr	r0, [sp, #28]
+	bl	FlashBchSel
+	mov	r1, fp
+	ldr	r0, [sp, #24]
+	bl	__aeabi_uidiv
+	mov	r2, r5
+	mov	r1, r0
+	movs	r0, #0
+	bl	FlashPageProgMsbFFData
+	ldr	r3, .L1331+32
+	cmp	r7, r3
+	bne	.L1289
+	ldr	r3, [r8]
+	mov	r0, r4
+	ldr	r7, .L1331
+	movs	r6, #0
+	ldrb	r8, [r3, #9]	@ zero_extendqisi2
+	ldrh	r1, [r3, #10]
+	smulbb	r1, r1, r8
+	uxth	r1, r1
+	bl	__aeabi_uidivmod
+	mul	r5, r8, r1
+	mov	r10, r1
+	subs	r3, r4, r1
+	str	r3, [sp, #28]
+	ubfx	r5, r5, #2, #2
+.L1290:
+	cmp	r6, #512
+	bcs	.L1297
+	ldr	r1, .L1331+12
+	rsb	r3, r5, #4
+	uxth	r3, r3
+	ldr	r2, .L1331+16
+	ldrb	r1, [r1]	@ zero_extendqisi2
 	str	r3, [sp, #24]
-.L1361:
+	add	r3, r10, r6
+	lsrs	r3, r3, #2
+	ldrh	r2, [r2, r3, lsl #1]
+	cbz	r1, .L1291
+	ldr	r1, .L1331+36
+	ldr	r0, .L1331+20
+	ldr	r1, [r1]
+	cmp	r1, r0
+	it	eq
+	moveq	r2, r3
+.L1291:
+	ldr	r3, [sp, #28]
+	add	r5, r5, r3
+	ldr	r3, .L1331+24
+	mla	r5, r2, r8, r5
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r3, [sp, #32]
+	ldr	r3, .L1331+4
+	ldr	r3, [r3]
+	ldrb	fp, [r3, #9]	@ zero_extendqisi2
+	ldr	r3, .L1331+40
+	ldrh	r2, [r3, #26]
+	ldr	r3, .L1331+44
+	ldr	r3, [r3]
+	muls	r3, r2, r3
+	mul	r3, fp, r3
+	cmp	r5, r3
+	bcs	.L1292
+	ldr	r3, .L1331+28
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	bl	FlashBchSel
+.L1292:
+	movs	r0, #0
+	bl	flash_boot_enter_slc_mode
+	mov	r1, fp
+	mov	r0, r5
+	bl	__aeabi_uidiv
+	add	r3, sp, #40
+	mov	r1, r0
+	mov	fp, r0
+	mov	r2, r7
+	movs	r0, #0
+	bl	FlashReadPage
+	adds	r3, r0, #1
+	mov	r5, r0
+	bne	.L1293
+	ldr	r3, .L1331+28
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #40
+	beq	.L1293
+	movs	r0, #40
+	bl	FlashBchSel
+	add	r3, sp, #40
+	mov	r2, r7
+	mov	r1, fp
+	movs	r0, #0
+	bl	FlashReadPage
+	mov	r5, r0
+.L1293:
+	movs	r0, #0
+	bl	flash_boot_exit_slc_mode
+	ldr	r0, [sp, #32]
+	bl	FlashBchSel
+	adds	r5, r5, #1
+	mov	r5, #-1
+	it	ne
+	movne	r5, #0
+	cbz	r5, .L1294
+.L1297:
+	ldr	r3, .L1331+8
 	movs	r5, #0
-	mov	r0, r5
-.L1360:
-	movs	r3, #1
-	mov	ip, #0
-	lsl	r6, r3, r0
-	movs	r3, #16
-	str	r3, [sp, #40]
-	mov	lr, r6
-	mov	r6, r7
-.L1358:
-	ldrh	r3, [r6]
-	str	r3, [sp, #52]
-	ldr	r3, [sp, #52]
-	bics	r3, lr, r3
-	ldr	r3, [sp, #32]
-	it	eq
-	addeq	ip, ip, #1
-	add	r6, r6, r3
-	ldr	r3, [sp, #40]
-	subs	r3, r3, #1
-	str	r3, [sp, #40]
-	bne	.L1358
-	cmp	ip, #8
-	add	r0, r0, #1
-	ittt	hi
-	movhi	r3, lr
-	orrhi	r5, r5, r3
-	uxthhi	r5, r5
-	cmp	r0, #16
-	bne	.L1360
-	ldr	r3, [sp, #24]
-	strh	r5, [r7], #2	@ movhi
-	adds	r3, r3, #1
-	str	r3, [sp, #24]
-	ldr	r0, [sp, #24]
-	ldr	r3, [sp, #12]
-	cmp	r3, r0
-	bgt	.L1361
-	subs	r0, r1, #4
-	add	r5, r1, #28
-	movs	r3, #0
-.L1364:
-	ldr	r6, [r0, #4]!
-	cbnz	r6, .L1363
-	adds	r3, r3, #1
-.L1363:
-	cmp	r5, r0
-	bne	.L1364
-	cmp	r3, #7
-	ble	.L1365
-	ldr	r0, .L1430+12
-	mov	r3, #1024
-	movs	r2, #1
-	bl	rknand_print_hex
-	movs	r1, #0
-	ldr	r0, .L1430+8
-	bl	printf
-.L1366:
-	b	.L1366
-.L1338:
-	cmp	r4, #7
-	bne	.L1344
-	movs	r2, #0
-.L1346:
-	ldrb	r0, [r3, r2, lsl #2]	@ zero_extendqisi2
-	uxtb	r1, r2
-	cmp	r0, #12
-	beq	.L1345
-	add	r0, r3, r2, lsl #2
-	ldrb	r0, [r0, #1]	@ zero_extendqisi2
-	cmp	r0, #10
-	beq	.L1345
-	adds	r2, r2, #1
-	cmp	r2, #8
-	bne	.L1346
-.L1347:
-	movs	r1, #0
-	ldr	r0, .L1430+8
-	bl	printf
-.L1348:
-	b	.L1348
-.L1345:
-	cmp	r1, #6
-	bls	.L1342
-	b	.L1347
-.L1344:
-	cmp	r4, #6
-	bne	.L1342
-	adds	r3, r3, #7
-.L1349:
-	ldrb	r2, [r1, #1]!	@ zero_extendqisi2
-	cmp	r2, #12
-	beq	.L1342
-	ldrb	r2, [r1, #8]	@ zero_extendqisi2
-	cmp	r2, #4
-	beq	.L1342
-	cmp	r1, r3
-	bne	.L1349
+	ldr	r6, .L1331
+.L1295:
+	mov	r7, r3
+	ldr	r1, [r6, r5, lsl #2]
+	ldr	r2, [r7]
+	adds	r3, r3, #4
+	cmp	r1, r2
+	beq	.L1298
+	mov	r2, #512
 	movs	r1, #0
-	ldr	r0, .L1430+8
+	ldr	r0, .L1331
+	bl	memset
+	str	r5, [sp]
+	mov	r1, r4
+	ldr	r3, [r7]
+	ldr	r2, [r6, r5, lsl #2]
+	ldr	r0, .L1331+48
 	bl	printf
-.L1351:
-	b	.L1351
-.L1353:
-	ldr	r1, [sp, #8]
-	ldr	r1, [r1, #2048]
-	strb	r1, [r3], #1
-	b	.L1352
-.L1365:
-	cmp	r4, #6
-	beq	.L1380
-	cmp	r4, #7
-	beq	.L1381
-	cmp	r4, #8
-	ite	eq
-	moveq	r6, #5
-	movne	r6, #8
-.L1367:
-	add	r3, r10, #-1
-	ldr	r0, [sp, #20]
-	uxtb	r3, r3
-	movs	r5, #0
-	adds	r3, r3, #1
-.L1368:
-	mov	ip, r0
-	mov	r1, r2
-.L1369:
-	ldrb	r7, [r1], #1	@ zero_extendqisi2
-	strb	r7, [ip], #1
-	subs	r7, r1, r2
-	uxtb	r7, r7
-	cmp	r10, r7
-	bhi	.L1369
-	adds	r5, r5, #1
-	add	r2, r2, r3
-	cmp	fp, r5
-	add	r0, r0, r6
-	bgt	.L1368
-	ldr	r3, [sp]
-	mov	r0, r8
-	ldr	r2, [sp, #4]
-	add	r5, r3, r2, lsl #8
-	movs	r3, #255
-	str	r3, [r5, #2056]
-	bl	NandcWaitFlashReady
-	ldr	r3, [sp, #36]
+	mov	r0, r4
+	bl	FW_FlashBlockErase.constprop.41
+	ldr	r3, [sp, #20]
 	cmp	r3, #1
-	bhi	.L1371
-	movs	r3, #54
-	ldr	r2, [sp, #8]
-	str	r3, [r5, #2056]
-	mov	r1, #-1
-	ldr	r3, .L1430
-	ldr	r0, [sp, #16]
-	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-	str	r3, [r2, #2052]
-	movs	r3, #0
-	str	r3, [r2, #2048]
-	movs	r3, #22
-	str	r3, [r5, #2056]
-	bl	FlashReadCmd
-.L1372:
-	mov	r0, r8
-	bl	NandcWaitFlashReady
-	ldr	r3, [sp, #28]
+	bls	.L1299
+	ldr	r3, [sp, #8]
+	adds	r0, r3, r4
+	bl	FW_FlashBlockErase.constprop.41
+.L1299:
+	ldr	r3, [sp, #16]
+	ldr	r2, [sp, #20]
+	add	r3, r3, r2
+	str	r3, [sp, #16]
+	ldr	r3, [sp, #36]
+	add	r4, r4, r3
+	b	.L1284
+.L1294:
+	ldr	r3, [sp, #24]
+	add	r6, r6, r3
+	add	r7, r7, r3, lsl #9
+	uxth	r6, r6
+	b	.L1290
+.L1298:
+	adds	r5, r5, #1
+	cmp	r5, #65536
+	bne	.L1295
+	ldr	r3, [sp, #12]
 	adds	r3, r3, #1
-	b	.L1427
-.L1380:
-	movs	r6, #4
-	b	.L1367
-.L1381:
-	movs	r6, #10
-	b	.L1367
-.L1371:
-	cmp	r4, #8
-	ite	eq
-	moveq	r3, #190
-	movne	r3, #56
-	str	r3, [r5, #2056]
-	b	.L1372
-.L1330:
-	movs	r3, #120
-	movs	r2, #23
-	str	r3, [r5, #2056]
-	movs	r3, #0
-	str	r3, [r5, #2052]
-	movs	r1, #25
-	str	r3, [r5, #2052]
-	str	r3, [r5, #2052]
-	str	r2, [r5, #2056]
-	movs	r2, #4
-	str	r2, [r5, #2056]
-	str	r1, [r5, #2056]
-	movs	r1, #218
-	str	r1, [r5, #2056]
-	movs	r1, #21
-	str	r3, [r5, #2056]
-	str	r3, [r5, #2052]
-	str	r3, [r5, #2052]
-	str	r1, [r5, #2052]
-	str	r2, [r5, #2052]
-	str	r3, [r5, #2052]
-	ldr	r3, .L1430+16
-	str	r3, [sp, #20]
-	b	.L1375
-.L1431:
+	cmp	r3, #5
+	str	r3, [sp, #12]
+	bls	.L1299
+	b	.L1303
+.L1332:
 	.align	2
-.L1430:
-	.word	.LANCHOR20
-	.word	.LANCHOR147
-	.word	.LC21
-	.word	.LC22
-	.word	.LANCHOR20+28
-	.size	HynixGetReadRetryDefault, .-HynixGetReadRetryDefault
-	.section	.text.FlashGetReadRetryDefault,"ax",%progbits
+.L1331:
+	.word	gp_flash_check_buf
+	.word	.LANCHOR7
+	.word	idb_buf
+	.word	.LANCHOR16
+	.word	.LANCHOR17
+	.word	1446522928
+	.word	.LANCHOR33
+	.word	.LANCHOR158
+	.word	idb_buf+262144
+	.word	.LANCHOR122
+	.word	.LANCHOR15
+	.word	.LANCHOR4
+	.word	.LC17
+	.size	idb_write_data, .-idb_write_data
+	.section	.text.ftl_memcpy32,"ax",%progbits
+	.align	1
+	.global	ftl_memcpy32
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_memcpy32, %function
+ftl_memcpy32:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	movs	r3, #0
+	push	{r4, lr}
+.L1334:
+	cmp	r3, r2
+	bne	.L1335
+	pop	{r4, pc}
+.L1335:
+	ldr	r4, [r1, r3, lsl #2]
+	str	r4, [r0, r3, lsl #2]
+	adds	r3, r3, #1
+	b	.L1334
+	.size	ftl_memcpy32, .-ftl_memcpy32
+	.section	.text.ftl_memcmp,"ax",%progbits
+	.align	1
+	.global	ftl_memcmp
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_memcmp, %function
+ftl_memcmp:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	memcmp
+	.size	ftl_memcmp, .-ftl_memcmp
+	.section	.text.rknand_get_clk_rate,"ax",%progbits
 	.align	1
-	.global	FlashGetReadRetryDefault
+	.global	rknand_get_clk_rate
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashGetReadRetryDefault, %function
-FlashGetReadRetryDefault:
+	.type	rknand_get_clk_rate, %function
+rknand_get_clk_rate:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	mov	r3, r0
-	cbz	r0, .L1432
-	subs	r2, r0, #1
-	cmp	r2, #7
-	bhi	.L1434
-	b	HynixGetReadRetryDefault
-.L1434:
-	cmp	r0, #49
-	bne	.L1435
-	ldr	r0, .L1455
-	movs	r2, #64
-	ldr	r1, .L1455+4
-	strb	r3, [r0]
-	movs	r3, #4
-	strb	r3, [r0, #1]
-	movs	r3, #15
-	strb	r3, [r0, #2]
-.L1453:
-	adds	r0, r0, #4
-	b	ftl_memcpy
-.L1435:
-	cmp	r0, #33
-	beq	.L1436
-	sub	r2, r0, #65
-	cmp	r2, #1
-	bhi	.L1437
-.L1436:
-	ldr	r0, .L1455
-	strb	r3, [r0]
-	movs	r3, #4
-.L1454:
-	strb	r3, [r0, #1]
-	movs	r3, #7
-	strb	r3, [r0, #2]
-	movs	r2, #45
-	ldr	r1, .L1455+8
-	b	.L1453
-.L1437:
-	cmp	r0, #34
-	beq	.L1438
-	cmp	r0, #67
-	bne	.L1439
-.L1438:
-	ldr	r0, .L1455
-	strb	r3, [r0]
-	movs	r3, #5
-	b	.L1454
-.L1439:
-	cmp	r0, #35
-	beq	.L1440
-	cmp	r0, #68
-	bne	.L1432
-.L1440:
-	ldr	r0, .L1455
-	movs	r2, #95
-	ldr	r1, .L1455+12
-	strb	r3, [r0]
-	movs	r3, #5
-	strb	r3, [r0, #1]
-	movs	r3, #17
-	strb	r3, [r0, #2]
-	b	.L1453
-.L1432:
+	ldr	r0, .L1338
 	bx	lr
-.L1456:
+.L1339:
 	.align	2
-.L1455:
-	.word	.LANCHOR20
-	.word	.LANCHOR13
-	.word	.LANCHOR8
-	.word	.LANCHOR10
-	.size	FlashGetReadRetryDefault, .-FlashGetReadRetryDefault
-	.section	.text.FlashInit,"ax",%progbits
+.L1338:
+	.word	148000000
+	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
+	.section	.text.ftl_malloc,"ax",%progbits
 	.align	1
-	.global	FlashInit
+	.global	ftl_malloc
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashInit, %function
-FlashInit:
-	@ args = 0, pretend = 0, frame = 16
+	.type	ftl_malloc, %function
+ftl_malloc:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	movs	r1, #0
+	b	kmalloc
+	.size	ftl_malloc, .-ftl_malloc
+	.section	.text.NandcInit,"ax",%progbits
+	.align	1
+	.global	NandcInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	NandcInit, %function
+NandcInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	movs	r2, #1
+	ldr	r3, .L1343
+	movs	r4, #0
+	ldr	r5, .L1343+4
+	str	r2, [r3, #12]
+	movs	r2, #2
+	str	r2, [r3, #20]
+	movs	r2, #3
+	stm	r3, {r0, r4}
+	str	r0, [r3, #8]
+	str	r0, [r3, #16]
+	str	r2, [r3, #28]
+	str	r0, [r3, #24]
+	ldr	r3, .L1343+8
+	ldr	r2, .L1343+12
+	str	r0, [r3]
+	ldr	r3, [r0]
+	and	r3, r3, #253952
+	ubfx	r1, r3, #13, #1
+	bfi	r3, r4, #13, #1
+	str	r1, [r2]
+	orr	r3, r3, #256
+	ldr	r2, [r0, #352]
+	ldr	r1, .L1343+16
+	ubfx	r2, r2, #16, #4
+	str	r2, [r1]
+	ldr	r2, [r0, #352]
+	str	r2, [r5]
+	movw	r5, #2049
+	cmp	r2, r5
+	itt	eq
+	moveq	r2, #8
+	streq	r2, [r1]
+	str	r3, [r0]
+	movw	r3, #4225
+	str	r4, [r0, #336]
+	str	r3, [r0, #4]
+	movw	r3, #8322
+	str	r3, [r0, #344]
+	ldr	r3, .L1343+20
+	str	r3, [r0, #304]
+	mov	r0, #36864
+	bl	ftl_malloc
+	ldr	r3, .L1343+24
+	str	r0, [r3]
+	ldr	r3, .L1343+28
+	str	r0, [r3]
+	add	r0, r0, #32768
+	str	r0, [r3, #4]
+	str	r4, [r3, #24]
+	ldr	r3, .L1343+32
+	str	r4, [r3]
+	pop	{r3, r4, r5, pc}
+.L1344:
+	.align	2
+.L1343:
+	.word	.LANCHOR0
+	.word	.LANCHOR122
+	.word	.LANCHOR19
+	.word	.LANCHOR160
+	.word	.LANCHOR34
+	.word	1710593
+	.word	.LANCHOR161
+	.word	.LANCHOR35
+	.word	.LANCHOR36
+	.size	NandcInit, .-NandcInit
+	.section	.text.FtlMemInit,"ax",%progbits
+	.align	1
+	.global	FtlMemInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlMemInit, %function
+FtlMemInit:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1351
+	movs	r0, #128
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r4, r0
-	sub	sp, sp, #32
-	mov	r0, #32768
-	movs	r5, #0
+	movs	r4, #0
+	ldr	r2, .L1351+4
+	movs	r6, #12
+	movs	r7, #36
+	strh	r4, [r3]	@ movhi
+	ldr	r3, .L1351+8
+	ldr	r5, .L1351+12
+	ldr	fp, .L1351+320
+	str	r4, [r3]
+	ldr	r3, .L1351+16
+	str	r4, [r3]
+	ldr	r3, .L1351+20
+	str	r4, [r3]
+	ldr	r3, .L1351+24
+	str	r4, [r3]
+	ldr	r3, .L1351+28
+	str	r4, [r3]
+	ldr	r3, .L1351+32
+	str	r4, [r3]
+	ldr	r3, .L1351+36
+	str	r4, [r3]
+	ldr	r3, .L1351+40
+	str	r4, [r3]
+	ldr	r3, .L1351+44
+	str	r4, [r3]
+	ldr	r3, .L1351+48
+	str	r4, [r3]
+	ldr	r3, .L1351+52
+	str	r4, [r3]
+	ldr	r3, .L1351+56
+	str	r4, [r3]
+	ldr	r3, .L1351+60
+	str	r4, [r3]
+	ldr	r3, .L1351+64
+	str	r4, [r3]
+	ldr	r3, .L1351+68
+	str	r4, [r3]
+	ldr	r3, .L1351+72
+	str	r4, [r3]
+	ldr	r3, .L1351+76
+	str	r4, [r3]
+	movw	r3, #65535
+	str	r3, [r2]
+	ldr	r2, .L1351+80
+	str	r4, [r2]
+	ldr	r2, .L1351+84
+	str	r4, [r2]
+	ldr	r2, .L1351+88
+	str	r4, [r2]
+	ldr	r2, .L1351+92
+	strh	r3, [r2]	@ movhi
+	ldr	r2, .L1351+96
+	strh	r3, [r2]	@ movhi
+	ldr	r2, .L1351+100
+	strh	r3, [r2]	@ movhi
+	ldr	r2, .L1351+104
+	strh	r3, [r2]	@ movhi
+	movs	r2, #32
+	ldr	r3, .L1351+108
+	strh	r2, [r3]	@ movhi
+	ldr	r3, .L1351+112
+	strh	r0, [r3]	@ movhi
+	ldr	r3, .L1351+116
+	strh	r4, [r3]	@ movhi
+	ldr	r3, .L1351+120
+	strh	r4, [r3]	@ movhi
+	ldr	r3, .L1351+124
+	strh	r4, [r3]	@ movhi
+	ldr	r3, .L1351+128
+	strh	r4, [r3]	@ movhi
+	ldr	r3, .L1351+132
+	ldrh	r1, [r3]
+	bl	__aeabi_idiv
+	ldr	r2, .L1351+136
+	str	r0, [r5]
+	ldrh	r3, [r2]
+	mov	r8, r2
+	lsls	r3, r3, #2
+	cmp	r0, r3
+	it	hi
+	strhi	r3, [r5]
+	ldr	r3, .L1351+140
+	str	r4, [r3]
+	ldr	r4, .L1351+144
+	ldrh	r0, [r4]
+	lsls	r0, r0, #1
+	bl	ftl_malloc
+	ldr	r3, .L1351+148
+	str	r0, [r3]
+	ldrh	r0, [r4]
+	muls	r0, r6, r0
+	bl	ftl_malloc
+	ldrh	r4, [r8]
+	ldr	r3, .L1351+152
+	muls	r4, r7, r4
+	str	r0, [r3]
+	lsl	r10, r4, #2
+	mov	r0, r10
+	bl	ftl_malloc
+	ldr	r3, .L1351+156
+	str	r0, [r3]
+	mov	r0, r4
+	bl	ftl_malloc
+	ldr	r3, .L1351+160
+	str	r0, [r3]
+	mov	r0, r10
+	bl	ftl_malloc
+	ldr	r3, .L1351+164
+	ldr	r10, .L1351+324
+	str	r0, [r3]
+	mov	r0, r4
+	bl	ftl_malloc
+	ldr	r3, .L1351+168
+	str	r0, [r3]
+	mov	r0, r4
+	bl	ftl_malloc
+	ldr	r3, .L1351+172
+	str	r0, [r3]
+	ldr	r0, [r5]
+	muls	r0, r7, r0
+	ldr	r7, .L1351+176
+	bl	ftl_malloc
+	ldr	r3, .L1351+180
+	ldrh	r4, [r7]
+	str	r0, [r3]
+	ldrh	r3, [r8]
+	mov	r0, r4
+	lsls	r3, r3, #1
+	adds	r3, r3, #1
+	str	r3, [r10]
+	bl	ftl_malloc
+	ldr	r3, .L1351+184
+	str	r0, [r3]
+	mov	r0, r4
+	bl	ftl_malloc
+	ldr	r3, .L1351+188
+	str	r0, [r3]
+	mov	r0, r4
+	bl	ftl_malloc
+	ldr	r3, .L1351+192
+	str	r0, [r3]
+	ldr	r0, [r10]
+	muls	r0, r4, r0
+	bl	ftl_malloc
+	ldr	r3, .L1351+196
+	str	r0, [r3]
+	ldr	r0, [r5]
+	muls	r0, r4, r0
+	bl	ftl_malloc
+	ldr	r3, .L1351+200
+	str	r0, [r3]
+	mov	r0, r4
+	bl	ftl_malloc
+	ldr	r3, .L1351+204
+	str	r0, [r3]
+	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L1561
-	ldr	fp, .L1561+124
-	ldr	r10, .L1561+128
+	ldr	r3, .L1351+208
 	str	r0, [r3]
-	mov	r0, #32768
+	ldr	r0, [r10]
+	muls	r0, r6, r0
 	bl	ftl_malloc
-	ldr	r3, .L1561+4
-	ldr	r6, .L1561+8
-	ldr	r7, .L1561+12
+	ldr	r3, .L1351+212
+	ldrh	r4, [r8]
+	ldr	r8, .L1351+328
 	str	r0, [r3]
-	mov	r0, #4096
+	ldrh	r3, [fp]
+	muls	r4, r3, r4
+	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L1561+16
-	ldr	r8, .L1561+132
+	ldr	r3, .L1351+216
 	str	r0, [r3]
-	mov	r0, #32768
+	lsls	r0, r4, #2
+	ldr	r4, .L1351+220
 	bl	ftl_malloc
-	ldr	r3, .L1561+20
+	ldr	r3, .L1351+224
 	str	r0, [r3]
-	mov	r0, #4096
+	ldrh	r3, [fp]
+	ldr	r0, [r10]
+	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L1561+24
-	ldr	r2, .L1561+28
-	strb	r5, [r6]
+	ldr	r3, .L1351+228
 	str	r0, [r3]
-	movs	r3, #50
-	strb	r3, [r2]
-	movs	r2, #128
-	strb	r3, [fp]
-	mov	r0, r4
-	ldr	r3, .L1561+32
-	ldr	r4, .L1561+36
-	strb	r5, [r7]
-	str	r5, [r3]
-	ldr	r3, .L1561+40
-	strb	r5, [r10]
-	str	r2, [r3]
-	ldr	r3, .L1561+44
-	str	r5, [r3]
-	movs	r3, #60
-	strb	r3, [r8]
-	bl	NandcInit
-	str	fp, [sp, #20]
-	str	r10, [sp, #24]
-.L1463:
-	ldr	r3, .L1561+48
-	uxtb	r10, r5
-	mov	r0, r10
-	ldr	r3, [r3, r5, lsl #3]
-	str	r3, [sp, #28]
-	ldr	r3, .L1561+48
-	add	r2, r3, r5, lsl #3
-	ldrb	fp, [r2, #4]	@ zero_extendqisi2
-	bl	FlashReset
-	mov	r0, r10
-	bl	NandcFlashCs
-	ldr	r3, [sp, #28]
-	movs	r2, #144
-	movs	r0, #200
-	add	fp, r3, fp, lsl #8
-	str	r2, [fp, #2056]
-	movs	r2, #0
-	str	r2, [fp, #2052]
-	str	r2, [sp, #28]
-	bl	udelay
-	ldr	r1, [fp, #2048]
-	uxtb	r1, r1
-	strb	r1, [r4]
-	cmp	r1, #44
-	ldr	r0, [fp, #2048]
-	strb	r0, [r4, #1]
-	ldr	r0, [fp, #2048]
-	strb	r0, [r4, #2]
-	ldr	r0, [fp, #2048]
-	strb	r0, [r4, #3]
-	ldr	r0, [fp, #2048]
-	strb	r0, [r4, #4]
-	ldr	r0, [fp, #2048]
-	strb	r0, [r4, #5]
-	bne	.L1458
-	movs	r1, #239
-	movs	r0, #200
-	str	r1, [fp, #2056]
-	movs	r1, #1
-	str	r1, [fp, #2052]
-	bl	udelay
-	ldr	r2, [sp, #28]
-	movs	r1, #4
-	str	r1, [fp, #2048]
-	str	r2, [fp, #2048]
-	str	r2, [fp, #2048]
-	str	r2, [fp, #2048]
-.L1458:
-	mov	r0, r10
-	bl	NandcFlashDeCs
-	ldrb	r2, [r4]	@ zero_extendqisi2
-	subs	r3, r2, #1
-	uxtb	r3, r3
-	cmp	r3, #253
-	bhi	.L1459
-	ldrb	r1, [r4, #5]	@ zero_extendqisi2
-	ldrb	r3, [r4, #1]	@ zero_extendqisi2
-	ldr	r0, .L1561+52
-	str	r1, [sp, #12]
-	ldrb	r1, [r4, #4]	@ zero_extendqisi2
-	str	r1, [sp, #8]
-	ldrb	r1, [r4, #3]	@ zero_extendqisi2
-	str	r1, [sp, #4]
-	ldrb	r1, [r4, #2]	@ zero_extendqisi2
-	str	r1, [sp]
-	adds	r1, r5, #1
-	bl	printf
-.L1459:
-	cbnz	r5, .L1460
-	ldr	r2, .L1561+36
-	ldrb	r3, [r2]	@ zero_extendqisi2
-	subs	r3, r3, #1
-	uxtb	r3, r3
-	cmp	r3, #253
-	bhi	.L1510
-	ldrb	r3, [r2, #1]	@ zero_extendqisi2
-	cmp	r3, #255
-	beq	.L1510
-.L1460:
-	ldrb	r3, [r4]	@ zero_extendqisi2
-	adds	r5, r5, #1
-	adds	r4, r4, #8
-	cmp	r3, #181
-	itt	eq
-	moveq	r3, #44
-	strbeq	r3, [r4, #-8]
-	cmp	r5, #4
-	bne	.L1463
-	ldr	r3, .L1561+36
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	mov	r10, r3
-	cmp	r2, #173
-	beq	.L1464
-	ldr	r3, .L1561+56
-	ldr	r0, [r3]
-	bl	NandcSetDdrMode
-.L1464:
-	mov	r2, #852
+	ldrh	r3, [fp]
+	ldr	r0, [r5]
+	ldr	r5, .L1351+232
+	muls	r0, r3, r0
+	bl	ftl_malloc
+	ldr	r3, .L1351+236
+	str	r0, [r3]
+	ldrh	r0, [r4]
+	lsls	r0, r0, #1
+	uxth	r0, r0
+	strh	r0, [r5]	@ movhi
+	bl	ftl_malloc
+	ldr	r3, .L1351+240
+	str	r0, [r3]
+	ldrh	r3, [r5]
+	ldr	r0, .L1351+244
+	addw	r3, r3, #547
+	lsrs	r3, r3, #9
+	and	r0, r0, r3, lsl #9
+	strh	r3, [r5]	@ movhi
+	bl	ftl_malloc
+	ldr	r3, .L1351+248
+	str	r0, [r3]
+	adds	r0, r0, #32
+	ldr	r3, .L1351+252
+	str	r0, [r3]
+	ldrh	r0, [r4]
+	lsls	r0, r0, #1
+	bl	ftl_malloc
+	ldr	r5, [r8]
+	ldr	r3, .L1351+256
+	lsls	r5, r5, #1
+	str	r0, [r3]
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L1351+260
+	str	r0, [r3]
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L1351+264
+	ldr	r5, .L1351+268
+	str	r0, [r3]
+	ldrh	r0, [r4]
+	lsrs	r0, r0, #3
+	adds	r0, r0, #4
+	bl	ftl_malloc
+	ldr	r3, .L1351+272
+	str	r0, [r3]
+	ldrh	r0, [r5]
+	lsls	r0, r0, #1
+	bl	ftl_malloc
+	ldr	r3, .L1351+276
+	str	r0, [r3]
+	ldrh	r0, [r5]
+	lsls	r0, r0, #1
+	bl	ftl_malloc
+	ldr	r3, .L1351+280
+	str	r0, [r3]
+	ldrh	r0, [r5]
+	ldr	r5, .L1351+284
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L1351+288
+	str	r0, [r3]
+	ldrh	r0, [r5]
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldrh	r2, [r5]
 	movs	r1, #0
-	ldr	r0, .L1561+60
+	ldr	r3, .L1351+292
+	lsls	r2, r2, #2
+	str	r0, [r3]
 	bl	ftl_memset
-	ldr	r4, .L1561+64
-	movs	r2, #0
-	ldr	r3, .L1561+68
-	ldr	r5, .L1561+72
-	str	r3, [r4]
-	ldr	r3, .L1561+76
-	strb	r2, [r3]
-	mov	fp, r3
-	ldr	r2, .L1561+80
-	ldr	r1, [r2]
-	cmp	r1, r5
-	ittt	eq
-	ldreq	r3, .L1561+84
-	moveq	r2, #1
-	streq	r2, [r3]
-	ldrb	r3, [r10, #1]	@ zero_extendqisi2
-	cmp	r3, #161
-	beq	.L1466
-	cmp	r3, #241
-	beq	.L1466
-	cmp	r3, #218
-	beq	.L1466
-	and	r2, r3, #253
-	cmp	r2, #209
-	beq	.L1466
-	cmp	r3, #220
-	bne	.L1467
-	ldrb	r2, [r10, #3]	@ zero_extendqisi2
-	cmp	r2, #149
-	bne	.L1467
-.L1466:
-	ldr	ip, .L1561+36
-	movs	r2, #16
-	ldr	r0, [sp, #20]
-	mov	r10, #1
-	strb	r2, [r8]
-	ldrb	lr, [ip]	@ zero_extendqisi2
-	strb	r2, [r0]
-	ldr	r2, .L1561+88
-	cmp	lr, #152
-	strb	r10, [r7]
-	strb	lr, [r2, #1]
-	strb	r3, [r2, #2]
-	bne	.L1469
-	ldrsb	ip, [ip, #4]
-	cmp	ip, #0
-	blt	.L1470
-	movs	r0, #24
-	strb	r0, [r8]
-.L1469:
-	cmp	r1, r5
-	beq	.L1472
-	movw	r0, #2049
-	cmp	r1, r0
-	bne	.L1473
-.L1472:
-	movs	r1, #16
-	strb	r1, [r8]
-.L1473:
-	cmp	r3, #218
-	bne	.L1474
-	mov	r1, #2048
-.L1557:
-	strh	r1, [r2, #14]	@ movhi
-	strb	r3, [r2, #2]
-.L1475:
-	movs	r2, #32
-	ldr	r1, .L1561+92
-	ldr	r0, .L1561+96
-	bl	ftl_memcpy
-	movs	r2, #32
-	ldr	r1, .L1561+88
-	ldr	r0, .L1561+68
-	bl	ftl_memcpy
-.L1467:
-	ldrb	r3, [r7]	@ zero_extendqisi2
-	ldr	r10, .L1561+136
-	cmp	r3, #0
-	bne	.L1478
-	bl	FlashLoadPhyInfoInRam
-	cbnz	r0, .L1480
-	ldr	r3, [r4]
-	ldr	r8, .L1561+108
-	ldrh	r3, [r3, #16]
-	lsrs	r3, r3, #8
-	lsls	r1, r3, #31
-	and	r0, r3, #7
-	strb	r0, [r8]
-	bmi	.L1480
-	movs	r3, #1
-	strb	r3, [r6]
-	bl	FlashSetInterfaceMode
-	ldrb	r0, [r8]	@ zero_extendqisi2
-	bl	NandcSetMode
-.L1480:
-	ldr	r3, [r4]
-	ldrb	r3, [r3, #26]	@ zero_extendqisi2
-	strb	r3, [r10]
-	bl	FlashLoadPhyInfo
-	cmp	r0, #0
-	beq	.L1478
-	ldr	r3, [r4]
-	ldr	r0, .L1561+100
-	ldrh	r1, [r3, #14]
-	bl	printf
-	bl	FlashLoadPhyInfoInRam
-	adds	r2, r0, #1
-	beq	.L1457
-	bl	FlashDieInfoInit
-	ldr	r3, [r4]
-	ldrb	r0, [r3, #19]	@ zero_extendqisi2
-	bl	FlashGetReadRetryDefault
-	ldr	r3, [r4]
-	ldr	r2, .L1561+104
-	ldrb	r1, [r3, #9]	@ zero_extendqisi2
-	ldrh	r2, [r2]
-	addw	r2, r2, #4095
-	cmp	r1, r2, asr #12
-	blt	.L1483
-	ldrh	r2, [r3, #14]
-	adds	r2, r2, #255
-	cmp	r1, r2, asr #8
-	bge	.L1484
-.L1483:
-	ldrh	r2, [r3, #14]
-	bic	r2, r2, #255
-	strh	r2, [r3, #14]	@ movhi
-.L1484:
-	ldr	r3, .L1561+108
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	tst	r3, #6
-	beq	.L1485
-	bl	FlashSavePhyInfo
-	ldr	r3, .L1561+112
-	movs	r0, #0
-	ldr	r1, [r3]
-	bl	FlashDdrParaScan
-.L1485:
-	bl	FlashSavePhyInfo
-.L1478:
-	ldr	r8, [r4]
-	ldrh	r2, [r8, #16]
-	ldrb	r3, [r8, #26]	@ zero_extendqisi2
-	ldrh	r0, [r8, #10]
-	ubfx	r1, r2, #3, #1
-	strb	r3, [r10]
-	ubfx	r3, r2, #7, #1
-	strb	r3, [fp]
-	ldr	r3, .L1561+116
-	ldr	fp, .L1561+140
-	strb	r1, [r3]
-	ubfx	r1, r2, #4, #1
-	ldr	r3, .L1561+120
-	ubfx	r2, r2, #8, #3
-	strb	r1, [r3]
-	b	.L1562
-.L1563:
+	ldr	r3, .L1351+296
+	ldrh	r5, [r3]
+	lsls	r5, r5, #2
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L1351+300
+	str	r0, [r3]
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L1351+304
+	ldr	r5, .L1351+308
+	str	r0, [r3]
+	ldr	r0, [r8]
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L1351+312
+	str	r0, [r3]
+	ldrh	r0, [r5]
+	muls	r0, r6, r0
+	ldr	r6, .L1351+316
+	bl	ftl_malloc
+	b	.L1352
+.L1353:
 	.align	2
-.L1561:
-	.word	.LANCHOR147
-	.word	.LANCHOR153
-	.word	.LANCHOR30
-	.word	.LANCHOR2
-	.word	.LANCHOR197
+.L1351:
+	.word	.LANCHOR142
+	.word	.LANCHOR178
+	.word	.LANCHOR162
+	.word	.LANCHOR185
+	.word	.LANCHOR163
+	.word	.LANCHOR164
+	.word	.LANCHOR165
+	.word	.LANCHOR166
+	.word	.LANCHOR167
+	.word	.LANCHOR168
+	.word	.LANCHOR169
+	.word	.LANCHOR170
+	.word	.LANCHOR171
+	.word	.LANCHOR172
+	.word	.LANCHOR173
+	.word	.LANCHOR81
+	.word	.LANCHOR174
+	.word	.LANCHOR175
+	.word	.LANCHOR176
+	.word	.LANCHOR177
+	.word	.LANCHOR179
+	.word	.LANCHOR180
+	.word	.LANCHOR75
+	.word	.LANCHOR115
+	.word	.LANCHOR116
+	.word	.LANCHOR117
+	.word	.LANCHOR118
+	.word	.LANCHOR181
+	.word	.LANCHOR182
+	.word	.LANCHOR183
+	.word	.LANCHOR119
+	.word	.LANCHOR184
+	.word	.LANCHOR121
+	.word	.LANCHOR55
+	.word	.LANCHOR38
+	.word	.LANCHOR72
+	.word	.LANCHOR54
+	.word	.LANCHOR111
+	.word	.LANCHOR114
+	.word	.LANCHOR186
+	.word	.LANCHOR187
+	.word	.LANCHOR188
+	.word	.LANCHOR79
+	.word	.LANCHOR109
+	.word	.LANCHOR57
+	.word	.LANCHOR73
+	.word	.LANCHOR189
+	.word	.LANCHOR190
+	.word	.LANCHOR191
+	.word	.LANCHOR107
+	.word	.LANCHOR192
+	.word	.LANCHOR193
+	.word	.LANCHOR194
+	.word	.LANCHOR106
+	.word	.LANCHOR195
+	.word	.LANCHOR41
+	.word	.LANCHOR196
+	.word	.LANCHOR108
 	.word	.LANCHOR198
+	.word	.LANCHOR197
+	.word	.LANCHOR140
+	.word	33553920
 	.word	.LANCHOR199
-	.word	.LANCHOR150
-	.word	.LANCHOR149
-	.word	.LANCHOR22
-	.word	.LANCHOR4
-	.word	.LANCHOR144
-	.word	.LANCHOR0
-	.word	.LC23
-	.word	.LANCHOR155
-	.word	.LANCHOR20
-	.word	.LANCHOR18
-	.word	.LANCHOR31
-	.word	1446522928
-	.word	.LANCHOR6
-	.word	.LANCHOR119
-	.word	.LANCHOR29
+	.word	.LANCHOR80
+	.word	.LANCHOR85
+	.word	.LANCHOR132
+	.word	.LANCHOR128
+	.word	.LANCHOR61
+	.word	.LANCHOR1
+	.word	.LANCHOR71
+	.word	.LANCHOR200
+	.word	.LANCHOR62
 	.word	.LANCHOR201
-	.word	.LANCHOR143+32
-	.word	.LANCHOR7
-	.word	.LC24
-	.word	.LANCHOR122
-	.word	.LANCHOR24
-	.word	.LANCHOR148
 	.word	.LANCHOR202
-	.word	.LANCHOR27
-	.word	.LANCHOR3
-	.word	.LANCHOR200
-	.word	.LANCHOR152
-	.word	.LANCHOR15
-	.word	.LANCHOR145
-.L1562:
-	ldr	r3, .L1564
-	ldrb	r1, [r8, #12]	@ zero_extendqisi2
-	strb	r2, [r3]
-	movs	r2, #0
-	str	r2, [fp]
-	str	r3, [sp, #24]
-	bl	__aeabi_idiv
-	mov	r1, r0
-	ldrb	r0, [r8, #18]	@ zero_extendqisi2
-	bl	BuildFlashLsbPageTable
-	bl	FlashDieInfoInit
-	ldr	r2, [r4]
-	ldr	r3, [sp, #24]
-	ldrh	r1, [r2, #16]
-	mov	r8, r3
-	tst	r1, #64
-	mov	r1, fp
-	beq	.L1487
-	ldrb	r0, [r2, #19]	@ zero_extendqisi2
-	ldr	r3, .L1564+4
-	ldr	ip, .L1564+68
-	strb	r0, [r3]
-	ldrb	r2, [ip, #1]	@ zero_extendqisi2
-	ldr	r3, .L1564+8
-	ldrb	ip, [ip, #2]	@ zero_extendqisi2
-	strb	r2, [r3]
-	ldr	r2, .L1564+12
-	strb	ip, [r2]
-	add	ip, r0, #-1
-	cmp	ip, #7
-	mov	ip, r2
-	bhi	.L1488
-	ldr	r3, .L1564+16
-	str	r3, [fp]
-	subs	r3, r0, #5
-	cmp	r3, #1
-	bls	.L1489
-	cmp	r0, #8
-	bne	.L1490
-.L1489:
-	ldr	r3, .L1564+20
+	.word	.LANCHOR66
+	.word	.LANCHOR134
+	.word	.LANCHOR203
+	.word	.LANCHOR67
+	.word	.LANCHOR133
+	.word	.LANCHOR45
+	.word	.LANCHOR58
+	.word	.LANCHOR110
+	.word	.LANCHOR64
+.L1352:
+	ldr	r3, .L1354
+	str	r0, [r3]
+	ldrh	r3, [r5]
+	ldrh	r0, [r7]
+	ldr	r5, .L1354+4
+	muls	r0, r3, r0
+	bl	ftl_malloc
+	ldr	r3, .L1354+8
+	str	r0, [r3]
+	movs	r0, #6
+	ldrh	r3, [r4]
+	muls	r0, r3, r0
+	bl	ftl_malloc
+	ldr	r3, .L1354+12
+	str	r0, [r3]
+	ldr	r3, .L1354+16
+	ldrh	r0, [r3]
+	ldrh	r3, [r6]
+	adds	r0, r0, #31
+	asrs	r0, r0, #5
+	strh	r0, [r5]	@ movhi
+	muls	r0, r3, r0
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldrh	r1, [r5]
 	movs	r2, #1
-	str	r2, [r3]
-.L1490:
-	cmp	r0, #7
-	ldr	r3, .L1564+24
-	beq	.L1491
-	sub	r2, r3, #8
-	cmp	r0, #8
-	it	ne
-	movne	r3, r2
-.L1491:
-	subs	r1, r3, #1
-	movs	r2, #0
-	adds	r3, r3, #31
-.L1493:
-	ldrsb	ip, [r1, #1]!
-	cmp	ip, #0
-	bne	.L1492
-	adds	r2, r2, #1
-.L1492:
-	cmp	r3, r1
-	bne	.L1493
-	cmp	r2, #27
-	bls	.L1487
-	bl	FlashGetReadRetryDefault
-	bl	FlashSavePhyInfo
-.L1487:
-	ldr	r3, .L1564+28
-	ldr	r3, [r3]
-	cmp	r3, r5
-	bne	.L1504
-	ldrb	r3, [r10]	@ zero_extendqisi2
-	cbz	r3, .L1504
-	ldr	r3, .L1564+32
-	movs	r2, #0
-	ldr	r3, [r3]
-	strb	r2, [r3, #18]
-.L1504:
-	ldr	r3, .L1564+36
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #44
-	bne	.L1505
-	ldrb	r3, [r6]	@ zero_extendqisi2
-	cbz	r3, .L1505
-	movs	r3, #0
-	movs	r0, #1
-	strb	r3, [r6]
-	bl	FlashSetInterfaceMode
-	movs	r0, #1
-	bl	NandcSetMode
-.L1505:
-	ldrb	r3, [r8]	@ zero_extendqisi2
-	tst	r3, #6
-	beq	.L1506
-	ldrb	r2, [r6]	@ zero_extendqisi2
-	cbnz	r2, .L1507
-	lsls	r3, r3, #31
-	bmi	.L1506
-.L1507:
-	movs	r0, #0
-	bl	flash_enter_slc_mode
-	ldr	r3, .L1564+40
-	movs	r0, #0
-	ldr	r1, [r3]
-	bl	FlashDdrParaScan
-	movs	r0, #0
-	bl	flash_exit_slc_mode
-.L1506:
-	ldr	r3, [r4]
-	movs	r6, #16
-	ldrb	r0, [r3, #20]	@ zero_extendqisi2
-	bl	FlashBchSel
-	ldr	r0, .L1564+44
-	bl	FlashReadIdbDataRaw
-	ldr	r8, [r4]
-	ldr	r3, [sp, #20]
-	ldr	r4, .L1564+48
-	ldrb	r1, [r8, #12]	@ zero_extendqisi2
-	strb	r6, [r3]
-	ldrh	r5, [r8, #10]
-	strh	r1, [r4, #8]	@ movhi
-	ldrb	r3, [r8, #7]	@ zero_extendqisi2
-	ldrh	r10, [r8, #14]
-	mov	r0, r5
-	str	r3, [r4, #4]
-	ldr	r3, .L1564+36
-	ldr	r3, [r3]
-	str	r3, [r4]
-	ldr	r3, .L1564+52
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	strh	r3, [r4, #10]	@ movhi
-	ldrb	r3, [r8, #13]	@ zero_extendqisi2
-	strh	r5, [r4, #16]	@ movhi
-	strh	r10, [r4, #14]	@ movhi
-	strh	r3, [r4, #12]	@ movhi
-	bl	__aeabi_idiv
-	strh	r0, [r4, #18]	@ movhi
-	mov	r2, #512
-	ldrb	r3, [r8, #9]	@ zero_extendqisi2
-	strh	r2, [r4, #24]	@ movhi
-	ldrb	r2, [r7]	@ zero_extendqisi2
-	strh	r3, [r4, #20]	@ movhi
-	smulbb	r5, r5, r3
-	strh	r6, [r4, #26]	@ movhi
-	cmp	r2, #1
-	uxth	r5, r5
-	strh	r5, [r4, #22]	@ movhi
-	bne	.L1508
-	lsls	r3, r3, #1
-	lsr	r2, r10, #1
-	lsls	r5, r5, #1
-	strh	r3, [r4, #20]	@ movhi
-	movs	r3, #8
-	strh	r2, [r4, #14]	@ movhi
-	strh	r5, [r4, #22]	@ movhi
-	strh	r3, [r4, #26]	@ movhi
-.L1508:
-	ldrb	r0, [r8, #20]	@ zero_extendqisi2
-	bl	FlashBchSel
+	ldr	r3, .L1354+20
+	ldrh	r6, [r6]
+	lsls	r1, r1, #2
+	mov	r4, r3
+	str	r0, [r4, #28]!
+	mov	r0, r1
+.L1347:
+	cmp	r2, r6
+	bcc	.L1348
+	add	r3, r3, r2, lsl #2
+	ldr	r2, .L1354+24
+	movs	r1, #0
+	adds	r3, r3, #24
+.L1349:
+	cmp	r3, r2
+	bne	.L1350
 	movs	r0, #0
-.L1457:
-	add	sp, sp, #32
-	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1474:
-	cmp	r3, #220
-	bne	.L1476
-	mov	r1, #4096
-	b	.L1557
-.L1476:
-	cmp	r3, #211
-	itttt	eq
-	moveq	r3, #4096
-	strheq	r3, [r2, #14]	@ movhi
-	moveq	r3, #2
-	strbeq	r3, [r2, #13]
-	b	.L1475
-.L1488:
-	sub	lr, r0, #17
-	cmp	lr, #2
-	bhi	.L1495
-	ldr	r3, .L1564+56
-	cmp	r0, #19
-	str	r3, [fp]
-	ite	ne
-	movne	r3, #7
-	moveq	r3, #15
-	strb	r3, [r2]
-	b	.L1487
-.L1495:
-	cmp	r0, #33
-	beq	.L1497
-	sub	r2, r0, #65
-	cmp	r2, #1
-	bhi	.L1498
-.L1497:
-	ldr	r2, .L1564+60
-	str	r2, [r1]
-	movs	r2, #4
-	strb	r2, [r3]
-	movs	r3, #7
-	strb	r3, [ip]
-	b	.L1487
-.L1498:
-	sub	r2, r0, #67
-	uxtb	r2, r2
-	cmp	r2, #1
-	bls	.L1499
-	sub	ip, r0, #34
-	cmp	ip, #1
-	bhi	.L1500
-.L1499:
-	ldr	ip, .L1564+60
-	cmp	r0, #35
-	str	ip, [r1]
-	ldr	r1, .L1564+12
-	beq	.L1501
-	cmp	r0, #68
-	beq	.L1501
-	movs	r0, #7
-.L1558:
-	cmp	r2, #1
-	strb	r0, [r1]
-	ite	ls
-	movls	r2, #4
-	movhi	r2, #5
-	strb	r2, [r3]
-	b	.L1487
-.L1501:
-	movs	r0, #17
-	b	.L1558
-.L1500:
-	cmp	r0, #49
-	itt	eq
-	ldreq	r3, .L1564+64
-	streq	r3, [fp]
-	b	.L1487
-.L1510:
-	mvn	r0, #1
-	b	.L1457
-.L1470:
-	ldr	r0, [sp, #24]
-	strb	r10, [r0]
-	b	.L1469
-.L1565:
+.L1348:
+	ldr	r5, [r3, #28]
+	adds	r2, r2, #1
+	add	r5, r5, r0
+	add	r0, r0, r1
+	str	r5, [r4, #4]!
+	b	.L1347
+.L1350:
+	str	r1, [r3, #4]!
+	b	.L1349
+.L1355:
 	.align	2
-.L1564:
-	.word	.LANCHOR24
-	.word	.LANCHOR9
-	.word	.LANCHOR12
-	.word	.LANCHOR151
-	.word	HynixReadRetrial
-	.word	.LANCHOR36
-	.word	.LANCHOR20+28
-	.word	.LANCHOR119
-	.word	.LANCHOR18
-	.word	.LANCHOR22
-	.word	.LANCHOR148
-	.word	.LANCHOR141
-	.word	.LANCHOR14
-	.word	.LANCHOR25
-	.word	MicronReadRetrial
-	.word	ToshibaReadRetrial
-	.word	SamsungReadRetrial
-	.word	.LANCHOR20
-	.size	FlashInit, .-FlashInit
-	.section	.text.FlashReadSlc2KPages,"ax",%progbits
+.L1354:
+	.word	.LANCHOR98
+	.word	.LANCHOR126
+	.word	.LANCHOR129
+	.word	.LANCHOR83
+	.word	.LANCHOR51
+	.word	.LANCHOR76
+	.word	.LANCHOR76+56
+	.size	FtlMemInit, .-FtlMemInit
+	.section	.text.ftl_free,"ax",%progbits
 	.align	1
-	.global	FlashReadSlc2KPages
+	.global	ftl_free
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashReadSlc2KPages, %function
-FlashReadSlc2KPages:
-	@ args = 0, pretend = 0, frame = 16
+	.type	ftl_free, %function
+ftl_free:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1623
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r4, r0
-	movs	r7, #0
-	sub	sp, sp, #24
-	ldrb	fp, [r3, #9]	@ zero_extendqisi2
-	str	r1, [sp, #8]
-	str	r2, [sp, #12]
-.L1567:
-	ldr	r3, [sp, #8]
-	cmp	r7, r3
-	bne	.L1591
-	movs	r0, #0
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1591:
-	ldr	r3, [sp, #8]
-	add	r2, sp, #20
-	ldr	r1, [sp, #12]
-	mov	r0, r4
-	subs	r3, r3, r7
-	uxtb	r3, r3
-	str	r3, [sp]
-	add	r3, sp, #16
-	bl	LogAddr2PhyAddr
-	ldr	r2, .L1623+4
-	ldr	r3, [sp, #16]
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cmp	r2, r3
-	bhi	.L1568
-	mov	r3, #-1
-	str	r3, [r4]
-.L1569:
-	adds	r7, r7, #1
-	adds	r4, r4, #36
-	b	.L1567
-.L1568:
-	ldr	r2, .L1623+8
-	mov	r8, #0
-	ldrb	r5, [r2, r3]	@ zero_extendqisi2
-	mov	r0, r5
-	bl	NandcWaitFlashReady
-	mov	r0, r5
-	bl	NandcFlashCs
-.L1570:
-	ldr	r1, [sp, #20]
-	mov	r0, r5
-	bl	FlashReadCmd
-	mov	r0, r5
-	bl	NandcWaitFlashReady
-	ldr	r3, [r4, #12]
-	mov	r2, fp
-	movs	r1, #0
-	mov	r0, r5
-	str	r3, [sp]
-	ldr	r3, [r4, #8]
-	bl	NandcXferData
-	ldr	r3, .L1623+12
-	mov	r6, r0
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #0
-	bne	.L1571
-.L1574:
-	adds	r3, r6, #1
-	beq	.L1572
-.L1573:
-	cmp	r8, #0
-	beq	.L1576
-.L1575:
-	mov	r6, #256
-.L1576:
-	mov	r8, #0
-.L1577:
-	ldr	r3, .L1623+16
-	mov	r0, r5
-	ldr	r1, [sp, #20]
-	ldr	r3, [r3]
-	add	r1, r1, r3
-	bl	FlashReadCmd
-	mov	r0, r5
-	bl	NandcWaitFlashReady
-	ldr	r3, [r4, #8]
-	cbz	r3, .L1578
-	add	r3, r3, #2048
-.L1578:
-	ldr	r2, [r4, #12]
-	cbz	r2, .L1579
-	adds	r2, r2, #8
-.L1579:
-	str	r2, [sp]
-	movs	r1, #0
-	mov	r2, fp
-	mov	r0, r5
-	bl	NandcXferData
-	ldr	r3, .L1623+12
-	mov	r10, r0
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	cmp	r2, #0
-	bne	.L1580
-.L1583:
-	cmp	r10, #-1
-	beq	.L1581
-.L1582:
-	cmp	r8, #0
-	beq	.L1585
-.L1584:
-	mov	r10, #256
-.L1585:
-	mov	r0, r5
-	bl	NandcFlashDeCs
-	ldr	r2, .L1623+20
-	cmp	r6, r10
-	it	cc
-	movcc	r6, r10
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	add	r3, r2, r2, lsl #1
-	cmp	r6, r3, asr #2
-	bhi	.L1586
-	movs	r3, #0
-.L1622:
-	str	r3, [r4]
-	ldr	r3, [r4, #12]
-	cbz	r3, .L1587
-	ldr	r1, [r3, #12]
-	adds	r1, r1, #1
-	bne	.L1587
-	ldr	r1, [r3, #8]
-	adds	r0, r1, #1
-	bne	.L1587
-	ldr	r3, [r3]
-	adds	r3, r3, #1
-	it	ne
-	strne	r1, [r4]
-.L1587:
-	ldr	r3, [r4]
-	adds	r1, r3, #1
-	bne	.L1569
-	ldr	r1, [r4, #4]
-	ldr	r0, .L1623+24
-	bl	printf
-	ldr	r1, [r4, #8]
-	cbz	r1, .L1589
-	movs	r3, #8
-	movs	r2, #4
-	ldr	r0, .L1623+28
-	bl	rknand_print_hex
-.L1589:
-	ldr	r1, [r4, #12]
-	cmp	r1, #0
-	beq	.L1569
-	movs	r3, #4
-	ldr	r0, .L1623+32
-	mov	r2, r3
-	bl	rknand_print_hex
-	b	.L1569
-.L1571:
-	mov	r0, r5
-	bl	flash_read_ecc
-	cmp	r0, #5
-	bls	.L1574
-	mov	r6, #256
-	b	.L1573
-.L1572:
-	cmp	r8, #10
-	beq	.L1575
-	add	r8, r8, #1
-	b	.L1570
-.L1580:
-	mov	r0, r5
-	bl	flash_read_ecc
-	cmp	r0, #5
-	bls	.L1583
-	mov	r10, #256
-	b	.L1582
-.L1581:
-	cmp	r8, #10
-	beq	.L1584
-	add	r8, r8, #1
-	b	.L1577
-.L1586:
-	mov	r3, #256
-	b	.L1622
-.L1624:
-	.align	2
-.L1623:
-	.word	.LANCHOR31
-	.word	.LANCHOR25
-	.word	.LANCHOR26
-	.word	.LANCHOR200
-	.word	.LANCHOR4
-	.word	.LANCHOR33
-	.word	.LC25
-	.word	.LC26
-	.word	.LC27
-	.size	FlashReadSlc2KPages, .-FlashReadSlc2KPages
-	.section	.text.FlashReadPages,"ax",%progbits
+	@ link register save eliminated.
+	b	free
+	.size	ftl_free, .-ftl_free
+	.section	.text.FlashCs123Init,"ax",%progbits
+	.align	1
+	.global	FlashCs123Init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashCs123Init, %function
+FlashCs123Init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	FlashCs123Init, .-FlashCs123Init
+	.section	.text.rk_nand_de_init,"ax",%progbits
 	.align	1
-	.global	FlashReadPages
+	.global	rk_nand_de_init
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashReadPages, %function
-FlashReadPages:
-	@ args = 0, pretend = 0, frame = 32
+	.type	rk_nand_de_init, %function
+rk_nand_de_init:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1716
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #40
-	mov	r10, r0
-	str	r1, [sp, #24]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	str	r2, [sp, #12]
-	cbnz	r3, .L1626
-	ldr	r2, .L1716+4
-	mov	r8, r3
-	str	r3, [sp, #8]
-	ldrb	r2, [r2, #9]	@ zero_extendqisi2
-	str	r2, [sp, #20]
-	ldr	r2, .L1716+8
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	str	r2, [sp, #28]
-.L1627:
-	ldr	r3, [sp, #8]
-	ldr	r2, [sp, #24]
-	cmp	r3, r2
-	bcc	.L1665
-	movs	r0, #0
-	b	.L1625
-.L1626:
-	bl	FlashReadSlc2KPages
-.L1625:
-	add	sp, sp, #40
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1665:
-	ldr	r2, [sp, #8]
-	movs	r3, #36
-	ldr	r1, [sp, #12]
-	mul	fp, r3, r2
-	add	r7, r10, fp
-	ldr	r3, [r7, #4]
-	mov	r0, r7
-	str	r3, [sp, #16]
-	ldr	r3, [sp, #24]
-	subs	r3, r3, r2
-	add	r2, sp, #36
-	uxtb	r3, r3
-	str	r3, [sp]
-	add	r3, sp, #32
-	bl	LogAddr2PhyAddr
-	ldr	r2, .L1716+12
-	mov	r5, r0
-	ldr	r3, [sp, #32]
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cmp	r2, r3
-	bhi	.L1629
-	mov	r3, #-1
-	str	r3, [r10, fp]
-.L1630:
-	ldr	r3, [sp, #8]
-	adds	r3, r3, #1
-	str	r3, [sp, #8]
-	b	.L1627
-.L1629:
-	ldr	r2, .L1716+16
-	ldrb	r4, [r2, r3]	@ zero_extendqisi2
-	ldr	r3, .L1716+20
-	mov	r0, r4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #0
-	it	eq
-	moveq	r5, #0
-	bl	NandcWaitFlashReady
-	ldr	r3, .L1716+24
-	ldr	r3, [r3]
-	ldrb	r2, [r3, #19]	@ zero_extendqisi2
-	subs	r3, r2, #1
-	cmp	r3, #7
-	bhi	.L1632
-	ldr	r3, .L1716+28
-	subs	r2, r2, #7
-	cmp	r2, #1
-	ldr	r2, .L1716+32
-	add	r1, r3, r4
-	ldrb	r3, [r1, #12]	@ zero_extendqisi2
-	ldrb	r2, [r2, r4]	@ zero_extendqisi2
-	it	ls
-	ldrbls	r3, [r1, #20]	@ zero_extendqisi2
-	cmp	r2, r3
-	beq	.L1632
-	ldr	r2, .L1716+36
-	mov	r0, r4
-	ldrb	r1, [r2, #-3]	@ zero_extendqisi2
-	bl	HynixSetRRPara
-.L1632:
-	mov	r0, r4
-	bl	NandcFlashCs
-	ldr	r3, [sp, #12]
-	cmp	r3, #1
-	beq	.L1634
-	ldr	r3, [sp, #16]
-	cmp	r3, #0
-	bge	.L1635
-.L1634:
-	ldr	r3, .L1716+40
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1635
-	mov	r0, r4
-	bl	flash_enter_slc_mode
-.L1642:
-	ldr	r1, [sp, #36]
-	adds	r6, r1, #1
-	bne	.L1637
-	cmp	r4, #255
-	beq	.L1667
-.L1637:
-	cbz	r5, .L1639
-	ldr	r3, .L1716+44
-	mov	r0, r4
-	ldr	r2, [r3]
-	add	r2, r2, r1
-	bl	FlashReadDpCmd
-.L1640:
-	mov	r0, r4
-	bl	NandcWaitFlashReady
-	cbz	r5, .L1638
-	ldr	r1, [sp, #36]
-	mov	r0, r4
-	bl	FlashReadDpDataOutCmd
-.L1638:
-	ldr	r3, [r7, #12]
-	movs	r1, #0
-	ldr	r2, [sp, #20]
-	mov	r0, r4
-	str	r3, [sp]
-	ldr	r3, [r7, #8]
-	bl	NandcXferData
-	ldr	r3, .L1716+8
-	mov	r6, r0
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1641
-	adds	r0, r0, #1
-	bne	.L1641
-	ldr	r3, .L1716+8
-	movs	r5, #0
-	strb	r5, [r3]
-	b	.L1642
-.L1635:
-	mov	r0, r4
-	bl	flash_exit_slc_mode
-	b	.L1642
-.L1639:
-	mov	r0, r4
-	bl	FlashReadCmd
-	b	.L1640
-.L1667:
-	movs	r5, #0
-	b	.L1638
-.L1641:
-	cbz	r5, .L1643
-	ldr	r3, .L1716+44
-	mov	r0, r4
-	ldr	r1, [sp, #36]
-	ldr	r3, [r3]
-	add	r1, r1, r3
-	bl	FlashReadDpDataOutCmd
-	add	r3, fp, #36
-	movs	r1, #0
-	add	r3, r3, r10
-	mov	r0, r4
-	ldr	r2, [r3, #12]
-	str	r2, [sp]
-	ldr	r2, [sp, #20]
-	ldr	r3, [r3, #8]
-	bl	NandcXferData
-	cmp	r0, #-1
-	mov	r8, r0
-	it	eq
-	moveq	r5, #0
-.L1643:
-	mov	r0, r4
-	bl	NandcFlashDeCs
-	ldr	r3, .L1716+8
-	adds	r1, r6, #1
-	ldrb	r2, [sp, #28]	@ zero_extendqisi2
-	strb	r2, [r3]
-	bne	.L1644
-	ldr	r3, .L1716+48
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L1645
-.L1649:
-	ldr	r3, .L1716+52
-	ldr	r5, [r3]
-	cmp	r5, #0
-	bne	.L1646
-	ldr	r3, [r7, #12]
-	mov	r0, r4
-	ldr	r2, [r7, #8]
-	ldr	r1, [sp, #36]
-	bl	FlashReadRawPage
-	b	.L1715
-.L1645:
-	ldr	r3, .L1716+56
-	mov	r0, r4
-	ldr	r1, [sp, #36]
-	ldr	r3, [r3]
-	ldr	r5, [r3, #304]
-	movs	r3, #1
-	str	r3, [sp]
-	ldr	r2, [r7, #8]
-	ldr	r3, [r7, #12]
-	bl	FlashDdrTunningRead
-	adds	r2, r0, #1
-	mov	r6, r0
-	beq	.L1648
-	ldr	r3, .L1716+60
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r0, r3, lsr #1
-	bls	.L1668
-.L1648:
-	ubfx	r0, r5, #8, #8
-	bl	NandcSetDdrPara
-	adds	r3, r6, #1
-	beq	.L1649
-.L1668:
-	movs	r5, #0
-.L1644:
-	ldr	r3, .L1716+60
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	r6, r3, asr #2
-	bls	.L1657
-	ldr	r3, .L1716+52
-	ldr	r3, [r3]
-	cmp	r3, #0
-	bne	.L1657
-	mov	r6, #256
-	b	.L1652
-.L1717:
-	.align	2
-.L1716:
-	.word	.LANCHOR2
-	.word	.LANCHOR31
-	.word	.LANCHOR6
-	.word	.LANCHOR25
-	.word	.LANCHOR26
-	.word	.LANCHOR202
-	.word	.LANCHOR18
-	.word	.LANCHOR20
-	.word	.LANCHOR21
-	.word	.LANCHOR20+4
-	.word	.LANCHOR15
-	.word	.LANCHOR4
-	.word	.LANCHOR30
-	.word	.LANCHOR145
-	.word	.LANCHOR19
-	.word	.LANCHOR33
-.L1646:
-	ldr	r3, [r7, #12]
-	mov	r0, r4
-	ldr	r2, [r7, #8]
-	ldr	r1, [sp, #36]
-	blx	r5
-	adds	r5, r0, #1
-	mov	r6, r0
-	bne	.L1650
-	ldr	r3, .L1718
-	ldr	r3, [r3]
-	ldrb	r3, [r3, #19]	@ zero_extendqisi2
-	subs	r3, r3, #1
-	cmp	r3, #7
-	bhi	.L1651
-	ldr	r2, .L1718+4
-	movs	r3, #0
-	mov	r0, r4
-	ldrb	r1, [r2, #-3]	@ zero_extendqisi2
-	bl	HynixSetRRPara
-.L1651:
-	ldr	r3, [r7, #12]
-	mov	r0, r4
-	ldr	r2, [r7, #8]
-	ldr	r1, [sp, #36]
-	bl	FlashReadRawPage
-	ldr	r2, .L1718+8
-	mov	r6, r0
-	mov	r3, r0
-	ldr	r1, [r7, #4]
-	ldr	r0, .L1718+12
-	ldrb	r2, [r2]	@ zero_extendqisi2
+	@ link register save eliminated.
+	b	FlashDeInit
+	.size	rk_nand_de_init, .-rk_nand_de_init
+	.section	.text.rk_ftl_get_capacity,"ax",%progbits
+	.align	1
+	.global	rk_ftl_get_capacity
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_ftl_get_capacity, %function
+rk_ftl_get_capacity:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L1360
+	ldr	r0, [r3]
+	bx	lr
+.L1361:
+	.align	2
+.L1360:
+	.word	.LANCHOR68
+	.size	rk_ftl_get_capacity, .-rk_ftl_get_capacity
+	.section	.text.rknand_print_hex,"ax",%progbits
+	.align	1
+	.global	rknand_print_hex
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rknand_print_hex, %function
+rknand_print_hex:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r5, #0
+	ldr	r7, .L1371
+	mov	fp, r0
+	mov	r6, r1
+	mov	r8, r2
+	mov	r10, r3
+	mov	r4, r5
+.L1363:
+	cmp	r4, r10
+	bne	.L1369
+	ldr	r1, .L1371+4
+	ldr	r0, .L1371+8
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	printf
+.L1369:
+	cbnz	r5, .L1364
+	mov	r2, r4
+	mov	r1, fp
+	ldr	r0, .L1371+12
 	bl	printf
-	adds	r0, r6, #1
-	bne	.L1650
-	ldr	r3, .L1718+16
-	ldrb	r5, [r3]	@ zero_extendqisi2
-	cbz	r5, .L1652
-	ldr	r3, [sp, #12]
-	mov	r0, r4
-	cmp	r3, #1
-	beq	.L1653
-	ldr	r3, [sp, #16]
-	cmp	r3, #0
-	bge	.L1654
-.L1653:
-	bl	flash_enter_slc_mode
-.L1655:
-	ldr	r3, .L1718+20
-	mov	r0, r4
-	ldr	r2, [r7, #8]
-	ldr	r1, [sp, #36]
-	ldr	r5, [r3]
-	ldr	r3, [r7, #12]
-	blx	r5
-.L1715:
-	adds	r1, r0, #1
-	mov	r6, r0
-	mov	r5, #0
-	bne	.L1657
-.L1652:
-	str	r6, [r10, fp]
-.L1658:
-	ldr	r3, [r10, fp]
-	adds	r2, r3, #1
-	bne	.L1660
-	ldr	r2, .L1718+8
-	ldr	r1, [r7, #4]
-	ldr	r0, .L1718+24
-	ldrb	r2, [r2]	@ zero_extendqisi2
+.L1364:
+	cmp	r8, #4
+	bne	.L1365
+	ldr	r1, [r6, r4, lsl #2]
+.L1370:
+	mov	r0, r7
+	adds	r5, r5, #1
 	bl	printf
-	ldr	r1, [r7, #12]
-	cbz	r1, .L1660
-	movs	r3, #4
-	ldr	r0, .L1718+28
-	mov	r2, r3
-	bl	rknand_print_hex
-.L1660:
-	cbz	r5, .L1662
-	ldr	r3, .L1718+8
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	r8, r3, asr #2
-	bls	.L1663
-	ldr	r3, .L1718+20
-	ldr	r3, [r3]
-	cmp	r3, #0
-	it	eq
-	moveq	r8, #256
-.L1663:
-	cmp	r8, #-1
-	add	r3, fp, #36
-	str	r8, [r10, r3]
-	beq	.L1662
-	cmp	r8, #256
-	itt	ne
-	movne	r2, #0
-	strne	r2, [r10, r3]
-.L1662:
-	ldr	r3, [sp, #8]
-	add	r3, r3, r5
-	str	r3, [sp, #8]
-	ldr	r3, [sp, #12]
-	cmp	r3, #1
-	beq	.L1664
-	ldr	r3, [sp, #16]
-	cmp	r3, #0
-	bge	.L1630
-.L1664:
-	ldr	r3, .L1718+16
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #0
-	beq	.L1630
-	mov	r0, r4
-	bl	flash_exit_slc_mode
-	b	.L1630
-.L1654:
-	bl	flash_exit_slc_mode
-	b	.L1655
-.L1650:
+	cmp	r5, #15
+	bls	.L1368
 	movs	r5, #0
-.L1657:
-	cmp	r6, #256
-	beq	.L1652
-	movs	r3, #0
-	str	r3, [r10, fp]
-	b	.L1658
-.L1719:
+	ldr	r1, .L1371+4
+	ldr	r0, .L1371+8
+	bl	printf
+.L1368:
+	adds	r4, r4, #1
+	b	.L1363
+.L1365:
+	cmp	r8, #2
+	ite	eq
+	ldrsheq	r1, [r6, r4, lsl #1]
+	ldrbne	r1, [r6, r4]	@ zero_extendqisi2
+	b	.L1370
+.L1372:
 	.align	2
-.L1718:
-	.word	.LANCHOR18
-	.word	.LANCHOR20+4
-	.word	.LANCHOR33
-	.word	.LC28
-	.word	.LANCHOR15
-	.word	.LANCHOR145
-	.word	.LC25
-	.word	.LC27
-	.size	FlashReadPages, .-FlashReadPages
-	.section	.text.FlashProgSlc2KPages,"ax",%progbits
+.L1371:
+	.word	.LC20
+	.word	.LC21
+	.word	.LC7
+	.word	.LC19
+	.size	rknand_print_hex, .-rknand_print_hex
+	.section	.text.HynixGetReadRetryDefault,"ax",%progbits
 	.align	1
-	.global	FlashProgSlc2KPages
+	.global	HynixGetReadRetryDefault
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashProgSlc2KPages, %function
-FlashProgSlc2KPages:
+	.type	HynixGetReadRetryDefault, %function
+HynixGetReadRetryDefault:
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #64
-	str	r3, [sp, #12]
-	mov	r8, r1
+	movs	r3, #172
+	ldr	r5, .L1491
+	cmp	r0, #2
+	mov	r1, #173
+	mov	r2, #174
+	sub	sp, sp, #56
 	mov	r4, r0
-	mov	r6, r0
-	ldr	r3, .L1749
-	movs	r7, #0
-	ldr	fp, .L1749+28
-	str	r2, [sp, #8]
-	ldrb	r10, [r3, #9]	@ zero_extendqisi2
-.L1721:
-	cmp	r7, r8
-	bne	.L1727
-	ldr	r3, [sp, #12]
-	cmp	r3, #0
-	bne	.L1738
-.L1748:
-	movs	r0, #0
-	add	sp, sp, #64
+	strb	r3, [r5, #4]
+	mov	r3, #175
+	strb	r0, [r5]
+	strb	r1, [r5, #5]
+	strb	r2, [r5, #6]
+	strb	r3, [r5, #7]
+	bne	.L1374
+	movs	r3, #167
+	mov	fp, #7
+	strb	r3, [r5, #4]
+	movs	r2, #247
+	ldr	r3, .L1491+4
+	strb	r2, [r3, #17]
+.L1484:
+	mov	r10, #4
+	b	.L1375
+.L1374:
+	cmp	r0, #3
+	bne	.L1376
+	movs	r3, #176
+	strb	r3, [r5, #4]
+	movs	r3, #177
+	strb	r3, [r5, #5]
+	movs	r3, #178
+	strb	r3, [r5, #6]
+	movs	r3, #179
+	strb	r3, [r5, #7]
+	movs	r3, #180
+	strb	r3, [r5, #8]
+	movs	r3, #181
+	strb	r3, [r5, #9]
+	movs	r3, #182
+	strb	r3, [r5, #10]
+	movs	r3, #183
+.L1485:
+	mov	fp, #8
+	strb	r3, [r5, #11]
+	mov	r10, fp
+.L1375:
+	subs	r3, r4, #1
+	cmp	r3, #1
+	bhi	.L1381
+	mov	r8, #0
+.L1382:
+	ldr	r3, .L1491+8
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	uxtb	r3, r8
+	cmp	r2, r3
+	bhi	.L1388
+.L1389:
+	ldr	r3, .L1491
+	strb	r10, [r3, #1]
+	strb	fp, [r3, #2]
+	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1727:
-	sub	r3, r8, r7
-	add	r2, sp, #20
-	uxtb	r3, r3
-	ldr	r1, [sp, #8]
-	mov	r0, r6
-	str	r3, [sp]
-	add	r3, sp, #24
-	bl	LogAddr2PhyAddr
-	ldr	r2, .L1749+4
-	ldr	r3, [sp, #24]
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cmp	r2, r3
-	bhi	.L1722
-	mov	r3, #-1
-	str	r3, [r6]
-.L1723:
-	adds	r7, r7, #1
-	adds	r6, r6, #36
-	b	.L1721
-.L1722:
-	ldr	r2, .L1749+8
-	ldrb	r5, [r2, r3]	@ zero_extendqisi2
-	mov	r0, r5
-	bl	NandcWaitFlashReady
-	mov	r0, r5
-	bl	NandcFlashCs
-	ldr	r1, [sp, #20]
-	mov	r0, r5
-	bl	FlashProgFirstCmd
-	ldr	r3, [r6, #12]
-	mov	r2, r10
-	movs	r1, #1
-	mov	r0, r5
+.L1376:
+	cmp	r0, #4
+	bne	.L1377
+	movs	r0, #204
+	strb	r1, [r5, #9]
+	strb	r0, [r5, #4]
+	movs	r0, #191
+	strb	r0, [r5, #5]
+	movs	r0, #170
+	strb	r0, [r5, #6]
+	movs	r0, #171
+	strb	r0, [r5, #7]
+	movs	r0, #205
+	strb	r0, [r5, #8]
+	strb	r2, [r5, #10]
+	b	.L1485
+.L1377:
+	cmp	r0, #5
+	bne	.L1378
+	movs	r3, #56
+	mov	fp, #8
+	strb	r3, [r5, #4]
+	movs	r3, #57
+	strb	r3, [r5, #5]
+	movs	r3, #58
+	strb	r3, [r5, #6]
+	movs	r3, #59
+	strb	r3, [r5, #7]
+	b	.L1484
+.L1378:
+	cmp	r0, #6
+	bne	.L1379
+	movs	r3, #14
+	mov	fp, #12
+	strb	r3, [r5, #4]
+	movs	r3, #15
+	strb	r3, [r5, #5]
+	movs	r3, #16
+	strb	r3, [r5, #6]
+	movs	r3, #17
+	strb	r3, [r5, #7]
+	b	.L1484
+.L1379:
+	cmp	r0, #7
+	bne	.L1380
+	movs	r3, #176
+	mov	fp, #12
+	strb	r3, [r5, #4]
+	movs	r3, #177
+	strb	r3, [r5, #5]
+	movs	r3, #178
+	strb	r3, [r5, #6]
+	movs	r3, #179
+	strb	r3, [r5, #7]
+	movs	r3, #180
+	strb	r3, [r5, #8]
+	movs	r3, #181
+	strb	r3, [r5, #9]
+	movs	r3, #182
+	strb	r3, [r5, #10]
+	movs	r3, #183
+	strb	r3, [r5, #11]
+	movs	r3, #212
+	strb	r3, [r5, #12]
+	movs	r3, #213
+	strb	r3, [r5, #13]
+	mov	r10, #10
+	b	.L1375
+.L1380:
+	cmp	r0, #8
+	mov	r3, #7
+	bne	.L1439
+	strb	r3, [r5, #5]
+	movs	r3, #9
+	movs	r2, #6
+	strb	r3, [r5, #7]
+	movs	r3, #10
+	strb	r2, [r5, #4]
+	strb	r0, [r5, #6]
+	mov	fp, #50
+	strb	r3, [r5, #8]
+	mov	r10, #5
+	b	.L1375
+.L1439:
+	mov	fp, r3
+	b	.L1484
+.L1388:
+	ldr	r2, .L1491+12
+	movs	r6, #0
+	ldrb	r2, [r2, r3]	@ zero_extendqisi2
+	ldr	r3, .L1491+16
+	ldr	r7, [r3, r2, lsl #3]
+	add	r4, r5, r2, lsl #6
+	add	r3, r3, r2, lsl #3
+	movs	r2, #55
+	adds	r4, r4, #20
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+	add	r7, r7, r3, lsl #8
+	addw	r3, r7, #2056
+.L1383:
+	adds	r1, r5, r6
+	str	r2, [r3]
+	ldrb	r1, [r1, #4]	@ zero_extendqisi2
+	movs	r0, #80
+	str	r2, [sp, #4]
 	str	r3, [sp]
-	ldr	r3, [r6, #8]
-	bl	NandcXferData
-	ldr	r1, [sp, #20]
-	mov	r0, r5
-	bl	FlashProgSecondCmd
-	mov	r0, r5
-	bl	NandcWaitFlashReady
-	ldr	r1, [sp, #20]
-	mov	r0, r5
-	bl	FlashReadStatus
-	sbfx	r0, r0, #0, #1
-	ldr	r1, [sp, #20]
-	str	r0, [r6]
-	mov	r0, r5
-	ldr	r3, [fp]
-	add	r1, r1, r3
-	bl	FlashProgFirstCmd
-	ldr	r3, [r6, #8]
-	cbz	r3, .L1724
-	add	r3, r3, #2048
-.L1724:
-	ldr	r2, [r6, #12]
-	cbz	r2, .L1725
-	adds	r2, r2, #8
-.L1725:
+	str	r1, [r7, #2052]
+	bl	udelay
+	ldr	r1, [r7, #2048]
+	ldr	r3, [sp]
+	ldr	r2, [sp, #4]
+	strb	r1, [r4, r6]
+	adds	r6, r6, #1
+	uxtb	r1, r6
+	cmp	r10, r1
+	bhi	.L1383
+	ldr	r7, .L1491+4
+	mov	r1, r4
+	movs	r2, #0
+.L1386:
+	movs	r3, #1
+	adds	r6, r7, r2
+.L1385:
+	ldrb	r0, [r6, r3, lsl #2]	@ zero_extendqisi2
+	ldrb	ip, [r1]	@ zero_extendqisi2
+	add	r0, r0, ip
+	strb	r0, [r1, r3, lsl #3]
+	adds	r3, r3, #1
+	cmp	r3, #7
+	bne	.L1385
+	adds	r2, r2, #1
+	adds	r1, r1, #1
+	cmp	r2, #4
+	bne	.L1386
+	movs	r3, #0
+	add	r8, r8, #1
+	strb	r3, [r4, #16]
+	strb	r3, [r4, #24]
+	strb	r3, [r4, #32]
+	strb	r3, [r4, #40]
+	strb	r3, [r4, #48]
+	strb	r3, [r4, #41]
+	strb	r3, [r4, #49]
+	b	.L1382
+.L1381:
+	subs	r3, r4, #3
+	cmp	r3, #5
+	bhi	.L1389
+	smulbb	r3, fp, r10
+	asrs	r2, r3, #1
+	lsls	r3, r3, #4
+	str	r3, [sp, #48]
+	lsls	r3, r2, #2
+	str	r2, [sp, #12]
+	str	r3, [sp, #44]
+	lsls	r3, r2, #1
+	str	r3, [sp, #32]
+	movs	r3, #0
+.L1490:
+	str	r3, [sp, #28]
+	ldrb	r3, [sp, #28]	@ zero_extendqisi2
+	str	r3, [sp, #16]
+	ldr	r3, .L1491+8
+	ldr	r2, [sp, #16]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r2
+	bls	.L1389
+	ldr	r2, [sp, #16]
+	ldr	r3, .L1491+12
+	ldrb	r8, [r3, r2]	@ zero_extendqisi2
+	ldr	r3, .L1491+16
+	mov	r0, r8
+	ldr	r2, [r3, r8, lsl #3]
+	add	r3, r3, r8, lsl #3
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
 	str	r2, [sp]
-	movs	r1, #1
-	mov	r2, r10
-	mov	r0, r5
-	bl	NandcXferData
-	ldr	r3, [fp]
-	mov	r0, r5
-	ldr	r1, [sp, #20]
-	add	r1, r1, r3
-	bl	FlashProgSecondCmd
-	mov	r0, r5
+	str	r3, [sp, #4]
+	mov	r3, r2
+	ldr	r2, [sp, #4]
+	add	r5, r3, r2, lsl #8
+	movs	r3, #255
+	str	r3, [r5, #2056]
 	bl	NandcWaitFlashReady
-	ldr	r1, [sp, #20]
-	mov	r0, r5
-	bl	FlashReadStatus
-	lsls	r2, r0, #31
+	cmp	r4, #7
+	bne	.L1391
+	ldr	r3, .L1491
+	movs	r0, #160
+	mla	r0, r0, r8, r3
+	add	r3, r0, #28
+.L1486:
+	ldr	r2, [sp, #4]
+	cmp	r4, #4
+	str	r3, [sp, #20]
+	ldr	r3, [sp]
+	add	r3, r3, r2, lsl #8
+	mov	r2, #54
+	str	r2, [r3, #2056]
+	bne	.L1394
+	movs	r2, #255
+	str	r2, [r3, #2052]
+	movs	r2, #64
+	str	r2, [r3, #2048]
+	movs	r2, #204
+.L1487:
+	str	r2, [r3, #2052]
+	movs	r2, #77
+	b	.L1488
+.L1391:
+	cmp	r4, #8
+	beq	.L1393
+	ldr	r0, .L1491
+	add	r0, r0, r8, lsl #6
+	add	r3, r0, #20
+	b	.L1486
+.L1492:
+	.align	2
+.L1491:
+	.word	.LANCHOR20
+	.word	.LANCHOR204
+	.word	.LANCHOR26
+	.word	.LANCHOR27
+	.word	.LANCHOR0
+.L1394:
+	subs	r2, r4, #5
+	cmp	r2, #1
+	bhi	.L1396
+	ldr	r2, .L1493
+	ldrb	r2, [r2, #4]	@ zero_extendqisi2
+	str	r2, [r3, #2052]
+	movs	r2, #82
+.L1488:
+	str	r2, [r3, #2048]
+.L1395:
+	ldr	r2, [sp, #4]
+	cmp	r4, #6
+	ldr	r3, [sp]
+	add	r3, r3, r2, lsl #8
+	mov	r2, #22
+	str	r2, [r3, #2056]
+	mov	r2, #23
+	str	r2, [r3, #2056]
+	mov	r2, #4
+	str	r2, [r3, #2056]
+	mov	r2, #25
+	str	r2, [r3, #2056]
+	mov	r2, #0
+	str	r2, [r3, #2056]
+	str	r2, [r3, #2052]
+	str	r2, [r3, #2052]
+	it	eq
+	moveq	r2, #31
+	str	r2, [r3, #2052]
+	movs	r2, #2
+	str	r2, [r3, #2052]
+	movs	r2, #0
+	str	r2, [r3, #2052]
+.L1438:
+	ldr	r2, [sp, #4]
+	mov	r0, r8
+	ldr	r3, [sp]
+	add	r3, r3, r2, lsl #8
+	movs	r2, #48
+	str	r2, [r3, #2056]
+	bl	NandcWaitFlashReady
+	subs	r3, r4, #5
+	cmp	r3, #1
+	str	r3, [sp, #36]
+	bls	.L1441
+	cmp	r4, #8
+	beq	.L1441
+	cmp	r4, #7
+	ite	eq
+	moveq	r2, #32
+	movne	r2, #2
+.L1399:
+	ldr	r3, .L1493+4
+	subs	r2, r2, #1
+	ldm	sp, {r5, r6}
+	ldr	r3, [r3]
+	add	r5, r5, r6, lsl #8
+	subs	r1, r3, #1
+	uxtab	r2, r3, r2
+	mov	r0, r1
+	str	r5, [sp, #8]
+.L1400:
+	ldr	r5, [sp, #8]
+	ldr	r5, [r5, #2048]
+	strb	r5, [r0, #1]!
+	cmp	r0, r2
+	bne	.L1400
+	cmp	r4, #8
+	bne	.L1401
+	movs	r2, #0
+.L1403:
+	ldrb	r0, [r3, r2, lsl #2]	@ zero_extendqisi2
+	uxtb	r1, r2
+	cmp	r0, #50
+	beq	.L1402
+	add	r0, r3, r2, lsl #2
+	ldrb	r0, [r0, #1]	@ zero_extendqisi2
+	cmp	r0, #5
+	beq	.L1402
+	adds	r2, r2, #1
+	cmp	r2, #8
+	bne	.L1403
+.L1404:
+	movs	r1, #0
+	ldr	r0, .L1493+8
+	bl	printf
+.L1406:
+	b	.L1406
+.L1396:
+	cmp	r4, #7
+	bne	.L1395
+	movs	r2, #174
+	str	r2, [r3, #2052]
+	movs	r2, #0
+	str	r2, [r3, #2048]
+	movs	r2, #176
+	b	.L1487
+.L1441:
+	movs	r2, #16
+	b	.L1399
+.L1402:
+	cmp	r1, #6
+	bhi	.L1404
+.L1405:
+	ldr	r3, .L1493+4
+	ldr	r2, [r3]
+	mov	r3, r2
+.L1415:
+	ldr	r0, [sp, #48]
+	subs	r1, r3, r2
+	cmp	r1, r0
+	blt	.L1416
+	ldr	r3, .L1493+4
+	ldr	r1, [r3]
+	ldr	r3, [sp, #32]
+	adds	r0, r1, r3
+	movs	r3, #8
+.L1418:
+	mov	r6, r0
+	movs	r5, #0
+.L1417:
+	ldrh	r7, [r6]
+	adds	r5, r5, #1
+	mvns	r7, r7
+	strh	r7, [r6], #2	@ movhi
+	ldr	r7, [sp, #12]
+	cmp	r7, r5
+	bgt	.L1417
+	ldr	r5, [sp, #44]
+	subs	r3, r3, #1
+	add	r0, r0, r5
+	bne	.L1418
+	mov	r7, r1
+	str	r3, [sp, #24]
+.L1424:
+	movs	r5, #0
 	mov	r0, r5
-	itt	mi
-	movmi	r3, #-1
-	strmi	r3, [r6]
-	bl	NandcFlashDeCs
-	b	.L1723
-.L1734:
-	ldr	r3, [r4]
+.L1423:
+	movs	r3, #1
+	mov	ip, #0
+	lsl	r6, r3, r0
+	movs	r3, #16
+	str	r3, [sp, #40]
+	mov	lr, r6
+	mov	r6, r7
+.L1421:
+	ldrh	r3, [r6]
+	str	r3, [sp, #52]
+	ldr	r3, [sp, #52]
+	bics	r3, lr, r3
+	ldr	r3, [sp, #32]
+	it	eq
+	addeq	ip, ip, #1
+	add	r6, r6, r3
+	ldr	r3, [sp, #40]
+	subs	r3, r3, #1
+	str	r3, [sp, #40]
+	bne	.L1421
+	cmp	ip, #8
+	add	r0, r0, #1
+	ittt	hi
+	movhi	r3, lr
+	orrhi	r5, r5, r3
+	uxthhi	r5, r5
+	cmp	r0, #16
+	bne	.L1423
+	ldr	r3, [sp, #24]
+	strh	r5, [r7], #2	@ movhi
 	adds	r3, r3, #1
-	bne	.L1729
-	ldr	r1, [r4, #4]
-	ldr	r0, .L1749+12
-	bl	printf
-.L1730:
-	add	r8, r8, #1
-	adds	r4, r4, #36
-.L1728:
-	cmp	r7, r8
-	bne	.L1734
-	b	.L1748
-.L1729:
-	sub	r3, r7, r8
-	ldr	fp, .L1749+32
-	uxtb	r3, r3
-	add	r2, sp, #20
-	ldr	r1, [sp, #8]
-	mov	r0, r4
-	str	r3, [sp]
-	add	r3, sp, #24
-	bl	LogAddr2PhyAddr
-	ldr	lr, [r10]
+	str	r3, [sp, #24]
+	ldr	r0, [sp, #24]
+	ldr	r3, [sp, #12]
+	cmp	r3, r0
+	bgt	.L1424
+	subs	r0, r1, #4
+	add	r5, r1, #28
 	movs	r3, #0
-	ldr	ip, [fp]
-	mov	r6, r4
-	add	r5, sp, #28
-	str	r3, [lr]
-	str	r3, [ip]
-	ldmia	r6!, {r0, r1, r2, r3}
-	stmia	r5!, {r0, r1, r2, r3}
-	str	lr, [sp, #36]
-	ldmia	r6!, {r0, r1, r2, r3}
-	str	ip, [sp, #40]
-	stmia	r5!, {r0, r1, r2, r3}
-	movs	r1, #1
-	ldr	r3, [r6]
-	add	r0, sp, #28
-	ldr	r2, [sp, #8]
-	str	r3, [r5]
-	bl	FlashReadPages
-	ldr	r5, [sp, #28]
-	adds	r3, r5, #1
-	bne	.L1731
-	ldr	r1, [r4, #4]
-	ldr	r0, .L1749+16
+.L1427:
+	ldr	r6, [r0, #4]!
+	cbnz	r6, .L1426
+	adds	r3, r3, #1
+.L1426:
+	cmp	r5, r0
+	bne	.L1427
+	cmp	r3, #7
+	ble	.L1428
+	ldr	r0, .L1493+12
+	mov	r3, #1024
+	movs	r2, #1
+	bl	rknand_print_hex
+	movs	r1, #0
+	ldr	r0, .L1493+8
 	bl	printf
-	str	r5, [r4]
-.L1731:
-	ldr	r3, [r4, #12]
-	cbz	r3, .L1732
-	ldr	r2, [r3]
-	ldr	r3, [fp]
-	ldr	r3, [r3]
-	cmp	r2, r3
-	beq	.L1732
-	ldr	r1, [r4, #4]
-	ldr	r0, .L1749+20
+.L1429:
+	b	.L1429
+.L1401:
+	cmp	r4, #7
+	bne	.L1407
+	movs	r2, #0
+.L1409:
+	ldrb	r0, [r3, r2, lsl #2]	@ zero_extendqisi2
+	uxtb	r1, r2
+	cmp	r0, #12
+	beq	.L1408
+	add	r0, r3, r2, lsl #2
+	ldrb	r0, [r0, #1]	@ zero_extendqisi2
+	cmp	r0, #10
+	beq	.L1408
+	adds	r2, r2, #1
+	cmp	r2, #8
+	bne	.L1409
+.L1410:
+	movs	r1, #0
+	ldr	r0, .L1493+8
 	bl	printf
-	mov	r3, #-1
-	str	r3, [r4]
-.L1732:
-	ldr	r3, [r4, #8]
-	cmp	r3, #0
-	beq	.L1730
-	ldr	r2, [r3]
-	ldr	r3, [r10]
-	ldr	r3, [r3]
-	cmp	r2, r3
-	beq	.L1730
-	ldr	r1, [r4, #4]
-	ldr	r0, .L1749+24
+.L1411:
+	b	.L1411
+.L1408:
+	cmp	r1, #6
+	bls	.L1405
+	b	.L1410
+.L1407:
+	cmp	r4, #6
+	bne	.L1405
+	adds	r3, r3, #7
+.L1412:
+	ldrb	r2, [r1, #1]!	@ zero_extendqisi2
+	cmp	r2, #12
+	beq	.L1405
+	ldrb	r2, [r1, #8]	@ zero_extendqisi2
+	cmp	r2, #4
+	beq	.L1405
+	cmp	r1, r3
+	bne	.L1412
+	movs	r1, #0
+	ldr	r0, .L1493+8
 	bl	printf
-	mov	r3, #-1
-	str	r3, [r4]
-	b	.L1730
-.L1738:
-	mov	r8, #0
-	ldr	r10, .L1749+36
-	b	.L1728
-.L1750:
-	.align	2
-.L1749:
-	.word	.LANCHOR31
-	.word	.LANCHOR25
-	.word	.LANCHOR26
-	.word	.LC29
-	.word	.LC30
-	.word	.LC31
-	.word	.LC32
-	.word	.LANCHOR4
-	.word	.LANCHOR199
-	.word	.LANCHOR198
-	.size	FlashProgSlc2KPages, .-FlashProgSlc2KPages
-	.section	.text.FlashProgPages,"ax",%progbits
+.L1414:
+	b	.L1414
+.L1416:
+	ldr	r1, [sp, #8]
+	ldr	r1, [r1, #2048]
+	strb	r1, [r3], #1
+	b	.L1415
+.L1428:
+	cmp	r4, #6
+	beq	.L1443
+	cmp	r4, #7
+	beq	.L1444
+	cmp	r4, #8
+	ite	eq
+	moveq	r6, #5
+	movne	r6, #8
+.L1430:
+	add	r3, r10, #-1
+	ldr	r0, [sp, #20]
+	uxtb	r3, r3
+	movs	r5, #0
+	adds	r3, r3, #1
+.L1431:
+	mov	ip, r0
+	mov	r1, r2
+.L1432:
+	ldrb	r7, [r1], #1	@ zero_extendqisi2
+	strb	r7, [ip], #1
+	subs	r7, r1, r2
+	uxtb	r7, r7
+	cmp	r10, r7
+	bhi	.L1432
+	adds	r5, r5, #1
+	add	r2, r2, r3
+	cmp	fp, r5
+	add	r0, r0, r6
+	bgt	.L1431
+	ldr	r3, [sp]
+	mov	r0, r8
+	ldr	r2, [sp, #4]
+	add	r5, r3, r2, lsl #8
+	movs	r3, #255
+	str	r3, [r5, #2056]
+	bl	NandcWaitFlashReady
+	ldr	r3, [sp, #36]
+	cmp	r3, #1
+	bhi	.L1434
+	movs	r3, #54
+	ldr	r2, [sp, #8]
+	str	r3, [r5, #2056]
+	mov	r1, #-1
+	ldr	r3, .L1493
+	ldr	r0, [sp, #16]
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+	str	r3, [r2, #2052]
+	movs	r3, #0
+	str	r3, [r2, #2048]
+	movs	r3, #22
+	str	r3, [r5, #2056]
+	bl	FlashReadCmd
+.L1435:
+	mov	r0, r8
+	bl	NandcWaitFlashReady
+	ldr	r3, [sp, #28]
+	adds	r3, r3, #1
+	b	.L1490
+.L1443:
+	movs	r6, #4
+	b	.L1430
+.L1444:
+	movs	r6, #10
+	b	.L1430
+.L1434:
+	cmp	r4, #8
+	ite	eq
+	moveq	r3, #190
+	movne	r3, #56
+	str	r3, [r5, #2056]
+	b	.L1435
+.L1393:
+	movs	r3, #120
+	movs	r2, #23
+	str	r3, [r5, #2056]
+	movs	r3, #0
+	str	r3, [r5, #2052]
+	movs	r1, #25
+	str	r3, [r5, #2052]
+	str	r3, [r5, #2052]
+	str	r2, [r5, #2056]
+	movs	r2, #4
+	str	r2, [r5, #2056]
+	str	r1, [r5, #2056]
+	movs	r1, #218
+	str	r1, [r5, #2056]
+	movs	r1, #21
+	str	r3, [r5, #2056]
+	str	r3, [r5, #2052]
+	str	r3, [r5, #2052]
+	str	r1, [r5, #2052]
+	str	r2, [r5, #2052]
+	str	r3, [r5, #2052]
+	ldr	r3, .L1493+16
+	str	r3, [sp, #20]
+	b	.L1438
+.L1494:
+	.align	2
+.L1493:
+	.word	.LANCHOR20
+	.word	.LANCHOR154
+	.word	.LC22
+	.word	.LC23
+	.word	.LANCHOR20+28
+	.size	HynixGetReadRetryDefault, .-HynixGetReadRetryDefault
+	.section	.text.FlashGetReadRetryDefault,"ax",%progbits
 	.align	1
-	.global	FlashProgPages
+	.global	FlashGetReadRetryDefault
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashProgPages, %function
-FlashProgPages:
-	@ args = 0, pretend = 0, frame = 64
+	.type	FlashGetReadRetryDefault, %function
+FlashGetReadRetryDefault:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #72
-	ldr	r5, .L1803
-	mov	r4, r0
-	mov	r8, r2
-	str	r1, [sp, #8]
-	ldr	r5, [r5]
-	str	r3, [sp, #20]
-	ldrb	r5, [r5, #19]	@ zero_extendqisi2
-	str	r5, [sp, #16]
-	ldr	r5, .L1803+4
-	ldrb	r7, [r5]	@ zero_extendqisi2
-	cbnz	r7, .L1752
-	ldr	r3, .L1803+8
-	ldrb	r3, [r3, #9]	@ zero_extendqisi2
-	str	r3, [sp, #12]
-.L1753:
-	ldr	r3, [sp, #8]
-	cmp	r7, r3
-	bcc	.L1766
-	ldr	r6, .L1803+12
-	movs	r5, #0
-	ldr	r7, .L1803+16
-.L1767:
-	ldrb	r3, [r6]	@ zero_extendqisi2
-	cmp	r5, r3
-	bcc	.L1769
-	ldr	r3, [sp, #20]
-	cmp	r3, #0
-	bne	.L1770
-.L1778:
-	movs	r0, #0
-	b	.L1751
-.L1752:
-	bl	FlashProgSlc2KPages
-.L1751:
-	add	sp, sp, #72
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1766:
-	ldr	r3, [sp, #8]
-	movs	r6, #36
-	muls	r6, r7, r6
-	add	r2, sp, #28
-	mov	r1, r8
-	subs	r3, r3, r7
-	uxtb	r3, r3
-	add	fp, r4, r6
-	str	r3, [sp]
-	mov	r0, fp
-	add	r3, sp, #32
-	bl	LogAddr2PhyAddr
-	ldr	r3, .L1803+12
-	mov	r10, r0
-	ldr	r0, [sp, #32]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, r0
-	bhi	.L1755
-	mov	r3, #-1
-	str	r3, [r4, r6]
-.L1756:
-	adds	r7, r7, #1
-	b	.L1753
-.L1755:
-	ldr	r3, .L1803+20
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #0
-	ldr	r3, .L1803+24
-	it	eq
-	moveq	r10, #0
-	add	r3, r3, r0, lsl #4
-	ldr	r3, [r3, #8]
-	cbz	r3, .L1758
-	uxtb	r0, r0
-	bl	FlashWaitCmdDone
-.L1758:
-	ldr	r3, [sp, #32]
-	movs	r1, #0
-	ldr	r2, .L1803+24
-	add	r2, r2, r3, lsl #4
-	str	r1, [r2, #12]
-	ldr	r1, [sp, #28]
-	str	fp, [r2, #8]
-	str	r1, [r2, #4]
-	cmp	r10, #0
-	beq	.L1759
-	add	r1, r6, #36
-	add	r1, r1, r4
-	str	r1, [r2, #12]
-.L1759:
-	ldr	r2, .L1803+28
-	ldrb	r5, [r2, r3]	@ zero_extendqisi2
-	lsls	r3, r3, #4
-	ldr	r2, .L1803+24
-	mov	r0, r5
-	strb	r5, [r2, r3]
-	ldr	r3, .L1803+12
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #1
-	bne	.L1760
-	bl	NandcWaitFlashReady
-.L1761:
-	ldr	r3, [sp, #16]
-	subs	r3, r3, #1
-	cmp	r3, #7
-	bhi	.L1762
-	ldr	r3, .L1803+32
-	ldrb	r3, [r3, r5]	@ zero_extendqisi2
-	cbz	r3, .L1762
-	ldr	r1, .L1803+36
-	movs	r3, #0
-	mov	r0, r5
-	adds	r2, r1, #4
-	ldrb	r1, [r1, #1]	@ zero_extendqisi2
-	bl	HynixSetRRPara
-.L1762:
-	mov	r0, r5
-	bl	NandcFlashCs
-	cmp	r8, #1
-	mov	r0, r5
-	bne	.L1763
-	ldr	r3, .L1803+16
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #0
-	beq	.L1763
-	bl	flash_enter_slc_mode
-.L1764:
-	ldr	r1, [sp, #28]
-	mov	r0, r5
-	bl	FlashProgFirstCmd
-	ldr	r3, [fp, #12]
-	movs	r1, #1
-	ldr	r2, [sp, #12]
-	mov	r0, r5
-	str	r3, [sp]
-	ldr	r3, [fp, #8]
-	bl	NandcXferData
-	cmp	r10, #0
-	beq	.L1765
-	ldr	r1, [sp, #28]
-	mov	r0, r5
-	bl	FlashProgDpFirstCmd
-	ldr	r3, .L1803+40
-	mov	r0, r5
-	ldr	r2, [sp, #32]
-	adds	r6, r6, #36
-	ldr	r1, [sp, #28]
-	add	r6, r6, r4
-	ldr	r2, [r3, r2, lsl #2]
-	adds	r2, r2, #0
-	it	ne
-	movne	r2, #1
-	bl	FlashWaitReadyEN
-	ldr	r3, .L1803+44
-	mov	r0, r5
-	ldr	r1, [sp, #28]
-	ldr	r3, [r3]
-	add	r1, r1, r3
-	bl	FlashProgDpSecondCmd
-	ldr	r3, [r6, #12]
-	movs	r1, #1
-	ldr	r2, [sp, #12]
-	mov	r0, r5
-	str	r3, [sp]
-	ldr	r3, [r6, #8]
-	bl	NandcXferData
-.L1765:
-	ldr	r1, [sp, #28]
-	mov	r0, r5
-	bl	FlashProgSecondCmd
-	mov	r0, r5
-	add	r7, r7, r10
-	bl	NandcFlashDeCs
-	b	.L1756
-.L1760:
-	bl	NandcFlashCs
-	ldr	r2, [sp, #32]
-	mov	r0, r5
-	ldr	r3, .L1803+40
-	ldr	r1, [sp, #28]
-	ldr	r2, [r3, r2, lsl #2]
-	adds	r2, r2, #0
-	it	ne
-	movne	r2, #1
-	bl	FlashWaitReadyEN
-	mov	r0, r5
-	bl	NandcFlashDeCs
-	b	.L1761
-.L1763:
-	bl	flash_exit_slc_mode
-	b	.L1764
-.L1769:
-	uxtb	r0, r5
-	bl	FlashWaitCmdDone
-	cmp	r8, #1
-	bne	.L1768
-	ldrb	r3, [r7]	@ zero_extendqisi2
-	cbz	r3, .L1768
-	ldr	r2, .L1803+24
-	lsls	r3, r5, #4
-	ldrb	r0, [r2, r3]	@ zero_extendqisi2
-	bl	flash_exit_slc_mode
-.L1768:
-	adds	r5, r5, #1
-	b	.L1767
-.L1770:
-	ldr	r10, .L1803+64
-	movs	r7, #0
-.L1771:
-	ldr	r3, [sp, #8]
-	cmp	r7, r3
-	beq	.L1778
-	ldr	r3, [r4]
-	adds	r3, r3, #1
-	bne	.L1772
-	ldr	r1, [r4, #4]
-	ldr	r0, .L1803+48
-	bl	printf
-.L1773:
-	adds	r7, r7, #1
-	adds	r4, r4, #36
-	b	.L1771
-.L1772:
-	ldr	r3, [sp, #8]
-	add	r2, sp, #28
-	ldr	fp, .L1803+68
-	mov	r1, r8
-	mov	r0, r4
-	mov	r6, r4
-	subs	r3, r3, r7
-	add	r5, sp, #36
-	uxtb	r3, r3
-	str	r3, [sp]
-	add	r3, sp, #32
-	bl	LogAddr2PhyAddr
-	ldr	lr, [r10]
-	movs	r3, #0
-	ldr	ip, [fp]
-	str	r3, [lr]
-	str	r3, [ip]
-	ldmia	r6!, {r0, r1, r2, r3}
-	stmia	r5!, {r0, r1, r2, r3}
-	str	lr, [sp, #44]
-	ldmia	r6!, {r0, r1, r2, r3}
-	str	ip, [sp, #48]
-	stmia	r5!, {r0, r1, r2, r3}
-	mov	r2, r8
-	ldr	r3, [r6]
-	movs	r1, #1
-	add	r0, sp, #36
-	str	r3, [r5]
-	bl	FlashReadPages
-	ldr	r5, [sp, #36]
-	adds	r3, r5, #1
-	bne	.L1774
-	ldr	r1, [r4, #4]
-	ldr	r0, .L1803+52
-	bl	printf
-	str	r5, [r4]
-.L1774:
-	ldr	r3, [r4, #12]
-	cbz	r3, .L1775
-	ldr	r2, [r3]
-	ldr	r3, [fp]
-	ldr	r3, [r3]
-	cmp	r2, r3
-	beq	.L1775
-	ldr	r1, [r4, #4]
-	ldr	r0, .L1803+56
-	bl	printf
-	mov	r3, #-1
-	str	r3, [r4]
-.L1775:
-	ldr	r3, [r4, #8]
-	cmp	r3, #0
-	beq	.L1773
-	ldr	r2, [r3]
-	ldr	r3, [r10]
-	ldr	r3, [r3]
-	cmp	r2, r3
-	beq	.L1773
-	ldr	r1, [r4, #4]
-	ldr	r0, .L1803+60
-	bl	printf
-	mov	r3, #-1
-	str	r3, [r4]
-	b	.L1773
-.L1804:
+	@ link register save eliminated.
+	mov	r3, r0
+	cbz	r0, .L1495
+	subs	r2, r0, #1
+	cmp	r2, #7
+	bhi	.L1497
+	b	HynixGetReadRetryDefault
+.L1497:
+	cmp	r0, #49
+	bne	.L1498
+	ldr	r0, .L1518
+	movs	r2, #64
+	ldr	r1, .L1518+4
+	strb	r3, [r0]
+	movs	r3, #4
+	strb	r3, [r0, #1]
+	movs	r3, #15
+	strb	r3, [r0, #2]
+.L1516:
+	adds	r0, r0, #4
+	b	ftl_memcpy
+.L1498:
+	cmp	r0, #33
+	beq	.L1499
+	sub	r2, r0, #65
+	cmp	r2, #1
+	bhi	.L1500
+.L1499:
+	ldr	r0, .L1518
+	strb	r3, [r0]
+	movs	r3, #4
+.L1517:
+	strb	r3, [r0, #1]
+	movs	r3, #7
+	strb	r3, [r0, #2]
+	movs	r2, #45
+	ldr	r1, .L1518+8
+	b	.L1516
+.L1500:
+	cmp	r0, #34
+	beq	.L1501
+	cmp	r0, #67
+	bne	.L1502
+.L1501:
+	ldr	r0, .L1518
+	strb	r3, [r0]
+	movs	r3, #5
+	b	.L1517
+.L1502:
+	cmp	r0, #35
+	beq	.L1503
+	cmp	r0, #68
+	bne	.L1495
+.L1503:
+	ldr	r0, .L1518
+	movs	r2, #95
+	ldr	r1, .L1518+12
+	strb	r3, [r0]
+	movs	r3, #5
+	strb	r3, [r0, #1]
+	movs	r3, #17
+	strb	r3, [r0, #2]
+	b	.L1516
+.L1495:
+	bx	lr
+.L1519:
 	.align	2
-.L1803:
-	.word	.LANCHOR18
-	.word	.LANCHOR2
-	.word	.LANCHOR31
-	.word	.LANCHOR25
-	.word	.LANCHOR15
-	.word	.LANCHOR27
-	.word	.LANCHOR23
-	.word	.LANCHOR26
-	.word	.LANCHOR21
+.L1518:
 	.word	.LANCHOR20
-	.word	.LANCHOR17
-	.word	.LANCHOR4
-	.word	.LC29
-	.word	.LC30
-	.word	.LC31
-	.word	.LC32
-	.word	.LANCHOR198
-	.word	.LANCHOR199
-	.size	FlashProgPages, .-FlashProgPages
-	.section	.text.FlashTestBlk,"ax",%progbits
+	.word	.LANCHOR14
+	.word	.LANCHOR9
+	.word	.LANCHOR11
+	.size	FlashGetReadRetryDefault, .-FlashGetReadRetryDefault
+	.section	.text.FlashInit,"ax",%progbits
 	.align	1
-	.global	FlashTestBlk
+	.global	FlashInit
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashTestBlk, %function
-FlashTestBlk:
-	@ args = 0, pretend = 0, frame = 104
+	.type	FlashInit, %function
+FlashInit:
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1808
-	push	{r4, r5, lr}
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-	sub	sp, sp, #108
-	ldr	r3, [r3]
-	cmp	r0, r3
-	bcc	.L1807
-	ldr	r5, .L1808+4
-	add	r0, sp, #40
-	movs	r2, #32
-	movs	r1, #165
-	str	r0, [sp, #16]
-	lsls	r4, r4, #10
-	ldr	r3, [r5]
-	str	r3, [sp, #12]
-	bl	ftl_memset
-	movs	r2, #8
-	movs	r1, #90
-	ldr	r0, [r5]
-	bl	ftl_memset
-	movs	r2, #1
-	add	r0, sp, #4
-	mov	r1, r2
-	str	r4, [sp, #8]
-	bl	FlashEraseBlocks
-	movs	r3, #1
-	add	r0, sp, #4
-	mov	r2, r3
-	mov	r1, r3
-	bl	FlashProgPages
-	ldr	r4, [sp, #4]
-	movs	r2, #1
-	movs	r1, #0
-	add	r0, sp, #4
-	adds	r4, r4, #0
-	it	ne
-	movne	r4, #1
-	negs	r4, r4
-	bl	FlashEraseBlocks
-.L1805:
+	sub	sp, sp, #32
+	mov	r0, #32768
+	movs	r5, #0
+	bl	ftl_malloc
+	ldr	r3, .L1628
+	ldr	fp, .L1628+124
+	ldr	r10, .L1628+128
+	str	r0, [r3]
+	mov	r0, #32768
+	bl	ftl_malloc
+	ldr	r3, .L1628+4
+	ldr	r8, .L1628+132
+	ldr	r6, .L1628+8
+	str	r0, [r3]
+	mov	r0, #4096
+	bl	ftl_malloc
+	ldr	r3, .L1628+12
+	ldr	r7, .L1628+16
+	str	r0, [r3]
+	mov	r0, #32768
+	bl	ftl_malloc
+	ldr	r3, .L1628+20
+	str	r0, [r3]
+	mov	r0, #4096
+	bl	ftl_malloc
+	ldr	r3, .L1628+24
+	ldr	r2, .L1628+28
+	strb	r5, [r6]
+	str	r0, [r3]
+	movs	r3, #50
+	strb	r3, [r2]
+	movs	r2, #128
+	strb	r3, [fp]
 	mov	r0, r4
-	add	sp, sp, #108
-	@ sp needed
-	pop	{r4, r5, pc}
-.L1807:
-	movs	r4, #0
-	b	.L1805
-.L1809:
-	.align	2
-.L1808:
-	.word	.LANCHOR149
-	.word	.LANCHOR153
-	.size	FlashTestBlk, .-FlashTestBlk
-	.section	.text.FtlLowFormatEraseBlock,"ax",%progbits
-	.align	1
-	.global	FtlLowFormatEraseBlock
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlLowFormatEraseBlock, %function
-FtlLowFormatEraseBlock:
-	@ args = 0, pretend = 0, frame = 40
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1855
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #40
-	str	r0, [sp, #8]
-	ldr	r3, [r3]
+	ldr	r3, .L1628+32
+	ldr	r4, .L1628+36
+	strb	r5, [r10]
+	str	r5, [r3]
+	ldr	r3, .L1628+40
+	strb	r5, [r8]
+	str	r2, [r3]
+	ldr	r3, .L1628+44
+	str	r5, [r3]
+	movs	r3, #60
+	strb	r3, [r7]
+	bl	NandcInit
+	str	fp, [sp, #24]
+	str	r10, [sp, #20]
+	str	r8, [sp, #28]
+.L1526:
+	ldr	r3, .L1628+48
+	uxtb	r8, r5
+	mov	r0, r8
+	ldr	fp, [r3, r5, lsl #3]
+	add	r2, r3, r5, lsl #3
+	ldrb	r10, [r2, #4]	@ zero_extendqisi2
+	bl	FlashReset
+	mov	r0, r8
+	bl	NandcFlashCs
+	add	fp, fp, r10, lsl #8
+	movs	r2, #144
+	mov	r10, #0
+	str	r2, [fp, #2056]
+	movs	r0, #200
+	str	r10, [fp, #2052]
+	bl	udelay
+	ldr	r1, [fp, #2048]
+	uxtb	r1, r1
+	strb	r1, [r4]
+	cmp	r1, #44
+	ldr	r0, [fp, #2048]
+	strb	r0, [r4, #1]
+	ldr	r0, [fp, #2048]
+	strb	r0, [r4, #2]
+	ldr	r0, [fp, #2048]
+	strb	r0, [r4, #3]
+	ldr	r0, [fp, #2048]
+	strb	r0, [r4, #4]
+	ldr	r0, [fp, #2048]
+	strb	r0, [r4, #5]
+	bne	.L1521
+	movs	r1, #239
+	movs	r0, #200
+	str	r1, [fp, #2056]
+	movs	r1, #1
+	str	r1, [fp, #2052]
+	bl	udelay
+	movs	r1, #4
+	str	r1, [fp, #2048]
+	str	r10, [fp, #2048]
+	str	r10, [fp, #2048]
+	str	r10, [fp, #2048]
+.L1521:
+	mov	r0, r8
+	bl	NandcFlashDeCs
+	ldrb	r2, [r4]	@ zero_extendqisi2
+	subs	r3, r2, #1
+	uxtb	r3, r3
+	cmp	r3, #253
+	bhi	.L1522
+	ldrb	r1, [r4, #5]	@ zero_extendqisi2
+	ldrb	r3, [r4, #1]	@ zero_extendqisi2
+	ldr	r0, .L1628+52
+	str	r1, [sp, #12]
+	ldrb	r1, [r4, #4]	@ zero_extendqisi2
+	str	r1, [sp, #8]
+	ldrb	r1, [r4, #3]	@ zero_extendqisi2
 	str	r1, [sp, #4]
+	ldrb	r1, [r4, #2]	@ zero_extendqisi2
+	str	r1, [sp]
+	adds	r1, r5, #1
+	bl	printf
+.L1522:
+	cbnz	r5, .L1523
+	ldr	r2, .L1628+36
+	ldrb	r3, [r2]	@ zero_extendqisi2
+	subs	r3, r3, #1
+	uxtb	r3, r3
+	cmp	r3, #253
+	bhi	.L1574
+	ldrb	r3, [r2, #1]	@ zero_extendqisi2
+	cmp	r3, #255
+	beq	.L1574
+.L1523:
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	adds	r5, r5, #1
+	adds	r4, r4, #8
+	cmp	r3, #181
+	itt	eq
+	moveq	r3, #44
+	strbeq	r3, [r4, #-8]
+	cmp	r5, #4
+	bne	.L1526
+	ldr	r3, .L1628+36
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	mov	r10, r3
+	cmp	r2, #173
+	beq	.L1527
+	ldr	r3, .L1628+56
+	ldr	r0, [r3]
+	bl	NandcSetDdrMode
+.L1527:
+	ldr	r5, .L1628+60
+	mov	r2, #852
+	movs	r1, #0
+	ldr	r0, .L1628+64
+	bl	ftl_memset
+	movs	r2, #0
+	ldr	r4, .L1628+68
+	strb	r2, [r5]
+	mov	fp, r5
+	ldr	r2, .L1628+72
+	ldr	r3, .L1628+76
+	ldr	r1, [r2]
+	ldr	r2, .L1628+80
+	str	r3, [r4]
+	cmp	r1, r2
+	mov	r8, r2
+	bne	.L1528
+	ldrb	r3, [r3, #19]	@ zero_extendqisi2
+	cmp	r3, #50
+	ittt	ne
+	ldrne	r3, .L1628+84
+	movne	r2, #1
+	strne	r2, [r3]
+.L1528:
+	ldrb	r3, [r10, #1]	@ zero_extendqisi2
+	cmp	r3, #161
+	beq	.L1529
+	cmp	r3, #241
+	beq	.L1529
+	cmp	r3, #218
+	beq	.L1529
+	and	r2, r3, #253
+	cmp	r2, #209
+	beq	.L1529
+	cmp	r3, #220
+	bne	.L1530
+	ldrb	r2, [r10, #3]	@ zero_extendqisi2
+	cmp	r2, #149
+	bne	.L1530
+.L1529:
+	ldr	ip, .L1628+36
+	movs	r0, #1
+	ldr	r2, [sp, #20]
+	ldr	r5, [sp, #24]
+	ldrb	lr, [ip]	@ zero_extendqisi2
+	strb	r0, [r2]
+	movs	r2, #16
+	strb	r2, [r5]
+	strb	r2, [r7]
+	cmp	lr, #152
+	ldr	r2, .L1628+88
+	strb	lr, [r2, #1]
+	strb	r3, [r2, #2]
+	bne	.L1532
+	ldrsb	ip, [ip, #4]
+	cmp	ip, #0
+	blt	.L1533
+	movs	r0, #24
+	strb	r0, [r7]
+.L1532:
+	cmp	r1, r8
+	beq	.L1535
+	movw	r0, #2049
+	cmp	r1, r0
+	bne	.L1536
+.L1535:
+	movs	r1, #16
+	strb	r1, [r7]
+.L1536:
+	cmp	r3, #218
+	bne	.L1537
+	mov	r1, #2048
+.L1624:
+	strh	r1, [r2, #14]	@ movhi
+	strb	r3, [r2, #2]
+.L1538:
+	movs	r2, #32
+	ldr	r1, .L1628+92
+	ldr	r0, .L1628+96
+	bl	ftl_memcpy
+	movs	r2, #32
+	ldr	r1, .L1628+88
+	ldr	r0, .L1628+76
+	bl	ftl_memcpy
+.L1530:
+	ldr	r3, [sp, #20]
+	ldr	r10, .L1628+136
+	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1837
-	ldr	r2, .L1855+4
-	mov	r10, r3
-	mov	r5, r3
-	mov	r4, r3
-	mov	r8, #36
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	str	r2, [sp, #20]
-	ldr	r2, .L1855+8
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	str	r2, [sp, #12]
-	ldr	r2, .L1855+12
-	str	r0, [r2]
-	ldr	r2, .L1855+16
-	ldrh	fp, [r2]
-	ldr	r2, .L1855+20
-	ldr	r7, [r2]
-	ldr	r2, .L1855+24
-	ldr	r2, [r2]
-	str	r2, [sp, #16]
-	ldr	r2, .L1855+28
+	bne	.L1541
+	bl	FlashLoadPhyInfoInRam
+	cbnz	r0, .L1543
+	ldr	r3, [r4]
+	ldr	r7, .L1628+100
+	ldrh	r3, [r3, #16]
+	lsrs	r3, r3, #8
+	lsls	r1, r3, #31
+	and	r0, r3, #7
+	strb	r0, [r7]
+	bmi	.L1543
+	movs	r3, #1
+	strb	r3, [r6]
+	bl	FlashSetInterfaceMode
+	ldrb	r0, [r7]	@ zero_extendqisi2
+	bl	NandcSetMode
+.L1543:
+	ldr	r3, [r4]
+	ldrb	r3, [r3, #26]	@ zero_extendqisi2
+	strb	r3, [r10]
+	bl	FlashLoadPhyInfo
+	cmp	r0, #0
+	beq	.L1541
+	ldr	r3, [r4]
+	ldr	r0, .L1628+104
+	ldrh	r1, [r3, #14]
+	bl	printf
+	bl	FlashLoadPhyInfoInRam
+	adds	r2, r0, #1
+	beq	.L1520
+	bl	FlashDieInfoInit
+	ldr	r3, [r4]
+	ldrb	r0, [r3, #19]	@ zero_extendqisi2
+	bl	FlashGetReadRetryDefault
+	ldr	r3, [r4]
+	ldr	r2, .L1628+108
+	ldrb	r1, [r3, #9]	@ zero_extendqisi2
 	ldrh	r2, [r2]
-	str	r2, [sp, #24]
-.L1812:
-	uxth	r2, r10
-	cmp	fp, r2
-	bhi	.L1816
-	cmp	r5, #0
-	beq	.L1810
-	ldr	r3, [sp, #12]
-	mov	r0, r7
-	ldr	r10, .L1855+4
-	mov	r8, #0
-	mov	r2, r5
-	ldr	r7, .L1855+20
-	adds	r6, r3, #0
-	it	ne
-	movne	r6, #1
-	strb	r8, [r10]
-	mov	r1, r6
-	bl	FlashEraseBlocks
-	ldrb	r3, [sp, #20]	@ zero_extendqisi2
+	addw	r2, r2, #4095
+	cmp	r1, r2, asr #12
+	blt	.L1546
+	ldrh	r2, [r3, #14]
+	adds	r2, r2, #255
+	cmp	r1, r2, asr #8
+	bge	.L1547
+.L1546:
+	ldrh	r2, [r3, #14]
+	bic	r2, r2, #255
+	strh	r2, [r3, #14]	@ movhi
+.L1547:
+	ldr	r3, .L1628+100
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	tst	r3, #6
+	beq	.L1548
+	bl	FlashSavePhyInfo
+	movs	r0, #0
+	bl	flash_enter_slc_mode
+	ldr	r3, .L1628+112
+	movs	r0, #0
+	ldr	r1, [r3]
+	bl	FlashDdrParaScan
+	movs	r0, #0
+	bl	flash_exit_slc_mode
+.L1548:
+	bl	FlashSavePhyInfo
+.L1541:
+	ldr	r7, [r4]
+	ldr	r5, .L1628+116
+	ldrh	r2, [r7, #16]
+	ldrb	r3, [r7, #26]	@ zero_extendqisi2
+	ldrh	r0, [r7, #10]
+	ubfx	r1, r2, #3, #1
 	strb	r3, [r10]
-	mov	r10, #36
-.L1818:
-	uxth	r3, r8
-	cmp	r5, r3
-	bhi	.L1820
-	ldr	r3, [sp, #4]
-	cmp	r3, #0
-	bne	.L1821
-	uxth	r6, r6
-	movs	r3, #6
-	str	r3, [sp, #16]
-	movs	r3, #1
-	str	r3, [sp, #12]
-.L1822:
-	mov	r8, #0
-.L1831:
-	ldr	r3, .L1855+16
+	ubfx	r3, r2, #7, #1
+	strb	r3, [fp]
 	mov	fp, #0
-	mov	r5, fp
-	ldrh	r3, [r3]
-	str	r3, [sp, #24]
-	ldr	r3, .L1855+20
-	ldr	r10, [r3]
-	ldr	r3, .L1855+32
-	ldr	r3, [r3]
+	ldr	r3, .L1628+120
+	str	fp, [r5]
+	strb	r1, [r3]
+	b	.L1629
+.L1630:
+	.align	2
+.L1628:
+	.word	.LANCHOR154
+	.word	.LANCHOR152
+	.word	.LANCHOR30
+	.word	.LANCHOR205
+	.word	.LANCHOR158
+	.word	.LANCHOR206
+	.word	.LANCHOR207
+	.word	.LANCHOR157
+	.word	.LANCHOR156
+	.word	.LANCHOR22
+	.word	.LANCHOR4
+	.word	.LANCHOR147
+	.word	.LANCHOR0
+	.word	.LC24
+	.word	.LANCHOR160
+	.word	.LANCHOR6
+	.word	.LANCHOR20
+	.word	.LANCHOR7
+	.word	.LANCHOR122
+	.word	.LANCHOR31
+	.word	1446522928
+	.word	.LANCHOR29
+	.word	.LANCHOR209
+	.word	.LANCHOR146+32
+	.word	.LANCHOR8
+	.word	.LANCHOR25
+	.word	.LC25
+	.word	.LANCHOR125
+	.word	.LANCHOR155
+	.word	.LANCHOR148
+	.word	.LANCHOR210
+	.word	.LANCHOR3
+	.word	.LANCHOR2
+	.word	.LANCHOR208
+	.word	.LANCHOR16
+.L1629:
+	ubfx	r1, r2, #4, #1
+	ldr	r3, .L1631
+	ubfx	r2, r2, #8, #3
+	strb	r1, [r3]
+	ldr	r3, .L1631+4
+	ldrb	r1, [r7, #12]	@ zero_extendqisi2
+	strb	r2, [r3]
 	str	r3, [sp, #28]
-	ldr	r3, .L1855+36
-	ldr	r3, [r3]
-	str	r3, [sp, #32]
-	ldr	r3, .L1855+28
-	ldrh	r3, [r3]
-	str	r3, [sp, #36]
-.L1823:
-	ldr	r3, [sp, #24]
-	uxth	r2, fp
-	cmp	r3, r2
-	bhi	.L1826
-	cbz	r5, .L1810
-	ldr	fp, .L1855+4
-	movs	r3, #1
-	mov	r0, r10
-	movs	r7, #0
-	mov	r2, r6
-	mov	r1, r5
-	strb	r7, [fp]
-	bl	FlashProgPages
-	ldrb	r3, [sp, #20]	@ zero_extendqisi2
-	ldr	r10, .L1855+20
-	strb	r3, [fp]
-	mov	fp, #36
-.L1828:
-	uxth	r3, r7
-	cmp	r5, r3
-	bhi	.L1830
-	ldr	r3, [sp, #16]
-	add	r8, r8, r3
-	ldr	r3, [sp, #12]
-	uxth	r8, r8
-	cmp	r3, r8
-	bhi	.L1831
-	ldr	r8, .L1855+20
-	movs	r7, #0
-	mov	r10, #36
-.L1832:
-	uxth	r3, r7
-	cmp	r5, r3
-	bhi	.L1834
-	ldr	r3, [sp, #8]
-	cmp	r3, #63
-	bls	.L1835
-	ldr	r3, [sp, #4]
-	cbz	r3, .L1810
-.L1835:
-	ldr	r3, .L1855+20
-	mov	r2, r5
-	mov	r1, r6
-	ldr	r0, [r3]
-	bl	FlashEraseBlocks
-.L1810:
-	mov	r0, r4
-	add	sp, sp, #40
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1816:
-	mul	r2, r8, r10
-	movs	r3, #0
-	ldr	r1, [sp, #8]
-	str	r3, [r7, r2]
-	ldr	r3, .L1855+40
-	ldrb	r0, [r3, r10]	@ zero_extendqisi2
-	bl	V2P_block
-	ldr	r3, [sp, #4]
-	mov	r6, r0
-	cbz	r3, .L1813
-	bl	IsBlkInVendorPart
-	cbnz	r0, .L1814
-.L1813:
-	mov	r0, r6
-	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L1815
-	ldr	r3, [sp, #24]
-	mla	r1, r8, r5, r7
-	lsls	r6, r6, #10
-	mul	r2, r3, r5
-	ldr	r3, [sp, #16]
-	adds	r5, r5, #1
-	str	r6, [r1, #4]
-	uxth	r5, r5
-	str	r0, [r1, #8]
-	bic	r2, r2, #3
-	add	r2, r2, r3
-	str	r2, [r1, #12]
-.L1814:
-	add	r10, r10, #1
-	b	.L1812
-.L1815:
-	adds	r4, r4, #1
-	uxth	r4, r4
-	b	.L1814
-.L1820:
-	mul	r3, r10, r8
-	ldr	r2, [r7]
-	adds	r1, r2, r3
-	ldr	r3, [r2, r3]
-	adds	r3, r3, #1
-	bne	.L1819
-	ldr	r0, [r1, #4]
-	adds	r4, r4, #1
-	uxth	r4, r4
-	ubfx	r0, r0, #10, #16
-	bl	FtlBbmMapBadBlock
-.L1819:
-	add	r8, r8, #1
-	b	.L1818
-.L1821:
-	ldr	r3, .L1855+44
-	ldrh	r3, [r3]
-	str	r3, [sp, #12]
-	ldr	r3, .L1855+8
+	bl	__aeabi_idiv
+	mov	r1, r0
+	ldrb	r0, [r7, #18]	@ zero_extendqisi2
+	bl	BuildFlashLsbPageTable
+	bl	FlashDieInfoInit
+	ldr	r2, [r4]
+	mov	ip, r5
+	ldr	r3, [sp, #28]
+	ldrh	r1, [r2, #16]
+	mov	r7, r3
+	tst	r1, #64
+	beq	.L1550
+	ldrb	r0, [r2, #19]	@ zero_extendqisi2
+	ldr	r3, .L1631+8
+	ldr	r1, .L1631+12
+	strb	r0, [r3]
+	ldrb	r2, [r1, #1]	@ zero_extendqisi2
+	ldr	r3, .L1631+16
+	ldrb	r1, [r1, #2]	@ zero_extendqisi2
+	strb	r2, [r3]
+	ldr	r2, .L1631+20
+	strb	r1, [r2]
+	subs	r1, r0, #1
+	cmp	r1, #7
+	mov	r1, r2
+	bhi	.L1551
+	ldr	r3, .L1631+24
+	str	r3, [r5]
+	subs	r3, r0, #5
+	cmp	r3, #1
+	bls	.L1552
+	cmp	r0, #8
+	bne	.L1553
+.L1552:
+	ldr	r3, .L1631+28
+	movs	r2, #1
+	str	r2, [r3]
+.L1553:
+	cmp	r0, #7
+	ldr	r3, .L1631+32
+	beq	.L1554
+	sub	r2, r3, #8
+	cmp	r0, #8
+	it	ne
+	movne	r3, r2
+.L1554:
+	subs	r1, r3, #1
+	movs	r2, #0
+	adds	r3, r3, #31
+.L1556:
+	ldrsb	r5, [r1, #1]!
+	cbnz	r5, .L1555
+	adds	r2, r2, #1
+.L1555:
+	cmp	r3, r1
+	bne	.L1556
+	cmp	r2, #27
+	bls	.L1550
+	bl	FlashGetReadRetryDefault
+	bl	FlashSavePhyInfo
+.L1550:
+	ldr	r3, .L1631+36
+	ldr	r3, [r3]
+	cmp	r3, r8
+	bne	.L1568
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	cbz	r3, .L1568
+	ldr	r3, .L1631+40
+	movs	r2, #0
+	ldr	r3, [r3]
+	strb	r2, [r3, #18]
+.L1568:
+	ldr	r3, .L1631+44
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L1838
-	ldr	r3, [sp, #12]
-	movs	r6, #1
-	lsrs	r3, r3, #2
-	str	r3, [sp, #16]
-	b	.L1822
-.L1838:
-	movs	r6, #1
-	str	r6, [sp, #16]
-	b	.L1822
-.L1826:
-	movs	r3, #36
-	ldr	r1, [sp, #8]
-	mul	r2, r3, fp
+	cmp	r3, #44
+	bne	.L1569
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	cbz	r3, .L1569
 	movs	r3, #0
-	str	r3, [r10, r2]
-	ldr	r3, .L1855+40
-	ldrb	r0, [r3, fp]	@ zero_extendqisi2
-	bl	V2P_block
-	ldr	r3, [sp, #4]
-	mov	r7, r0
-	cbz	r3, .L1824
-	bl	IsBlkInVendorPart
-	cbnz	r0, .L1825
-.L1824:
-	mov	r0, r7
-	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L1825
-	movs	r3, #36
-	add	r7, r8, r7, lsl #10
-	mla	r1, r3, r5, r10
-	ldr	r3, [sp, #28]
-	str	r3, [r1, #8]
-	ldr	r3, [sp, #36]
-	str	r7, [r1, #4]
-	mul	r2, r3, r5
-	ldr	r3, [sp, #32]
-	adds	r5, r5, #1
+	movs	r0, #1
+	strb	r3, [r6]
+	bl	FlashSetInterfaceMode
+	movs	r0, #1
+	bl	NandcSetMode
+.L1569:
+	ldrb	r3, [r7]	@ zero_extendqisi2
+	tst	r3, #6
+	beq	.L1570
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	cbnz	r2, .L1571
+	lsls	r3, r3, #31
+	bmi	.L1570
+.L1571:
+	movs	r0, #0
+	bl	flash_enter_slc_mode
+	ldr	r3, .L1631+48
+	movs	r0, #0
+	ldr	r1, [r3]
+	bl	FlashDdrParaScan
+	movs	r0, #0
+	bl	flash_exit_slc_mode
+.L1570:
+	ldr	r3, [r4]
+	movs	r6, #16
+	ldrb	r0, [r3, #20]	@ zero_extendqisi2
+	bl	FlashBchSel
+	ldr	r0, .L1631+52
+	bl	FlashReadIdbDataRaw
+	ldr	r7, [r4]
+	ldr	r3, [sp, #24]
+	ldr	r4, .L1631+56
+	ldrb	r1, [r7, #12]	@ zero_extendqisi2
+	strb	r6, [r3]
+	ldrh	r5, [r7, #10]
+	strh	r1, [r4, #8]	@ movhi
+	ldrb	r3, [r7, #7]	@ zero_extendqisi2
+	ldrh	r8, [r7, #14]
+	mov	r0, r5
+	str	r3, [r4, #4]
+	ldr	r3, .L1631+44
+	ldrb	r2, [r3, #1]	@ zero_extendqisi2
+	lsl	r3, r2, r6
+	orr	r3, r3, r2, lsl #8
+	ldr	r2, .L1631+44
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	orrs	r3, r3, r2
+	ldr	r2, .L1631+44
+	ldrb	r2, [r2, #3]	@ zero_extendqisi2
+	orr	r3, r3, r2, lsl #24
+	str	r3, [r4]
+	ldr	r3, .L1631+60
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	strh	r3, [r4, #10]	@ movhi
+	ldrb	r3, [r7, #13]	@ zero_extendqisi2
+	strh	r5, [r4, #16]	@ movhi
+	strh	r8, [r4, #14]	@ movhi
+	strh	r3, [r4, #12]	@ movhi
+	bl	__aeabi_idiv
+	mov	r2, #512
+	strh	r0, [r4, #18]	@ movhi
+	ldrb	r3, [r7, #9]	@ zero_extendqisi2
+	strh	r2, [r4, #24]	@ movhi
+	ldr	r2, [sp, #20]
+	strh	r3, [r4, #20]	@ movhi
+	smulbb	r5, r5, r3
+	strh	r6, [r4, #26]	@ movhi
+	ldrb	r2, [r2]	@ zero_extendqisi2
 	uxth	r5, r5
-	bic	r2, r2, #3
-	add	r2, r2, r3
-	str	r2, [r1, #12]
-.L1825:
-	add	fp, fp, #1
-	b	.L1823
-.L1830:
-	mul	r3, fp, r7
-	ldr	r2, [r10]
-	adds	r1, r2, r3
-	ldr	r3, [r2, r3]
-	cbz	r3, .L1829
-	ldr	r0, [r1, #4]
-	adds	r4, r4, #1
-	uxth	r4, r4
-	ubfx	r0, r0, #10, #16
-	bl	FtlBbmMapBadBlock
-.L1829:
-	adds	r7, r7, #1
-	b	.L1828
-.L1834:
-	ldr	r3, [sp, #4]
-	cbz	r3, .L1833
-	mul	r3, r10, r7
-	ldr	r2, [r8]
-	adds	r1, r2, r3
-	ldr	r3, [r2, r3]
-	cbnz	r3, .L1833
-	ldr	r0, [r1, #4]
-	movs	r1, #1
-	ubfx	r0, r0, #10, #16
-	bl	FtlFreeSysBlkQueueIn
-.L1833:
-	adds	r7, r7, #1
-	b	.L1832
-.L1837:
-	movs	r4, #0
-	b	.L1810
-.L1856:
+	cmp	r2, #1
+	strh	r5, [r4, #22]	@ movhi
+	bne	.L1572
+	lsls	r3, r3, #1
+	lsr	r2, r8, #1
+	lsls	r5, r5, #1
+	strh	r3, [r4, #20]	@ movhi
+	movs	r3, #8
+	strh	r2, [r4, #14]	@ movhi
+	strh	r5, [r4, #22]	@ movhi
+	strh	r3, [r4, #26]	@ movhi
+.L1572:
+	ldrb	r0, [r7, #20]	@ zero_extendqisi2
+	bl	FlashBchSel
+	movs	r0, #0
+.L1520:
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1537:
+	cmp	r3, #220
+	bne	.L1539
+	mov	r1, #4096
+	b	.L1624
+.L1539:
+	cmp	r3, #211
+	itttt	eq
+	moveq	r3, #4096
+	strheq	r3, [r2, #14]	@ movhi
+	moveq	r3, #2
+	strbeq	r3, [r2, #13]
+	b	.L1538
+.L1551:
+	sub	lr, r0, #17
+	cmp	lr, #2
+	bhi	.L1558
+	ldr	r3, .L1631+64
+	cmp	r0, #19
+	str	r3, [r5]
+	ite	ne
+	movne	r3, #7
+	moveq	r3, #15
+	strb	r3, [r2]
+	b	.L1550
+.L1558:
+	cmp	r0, #33
+	beq	.L1560
+	sub	r2, r0, #65
+	cmp	r2, #1
+	bhi	.L1561
+.L1560:
+	ldr	r2, .L1631+68
+	str	r2, [ip]
+	movs	r2, #4
+	strb	r2, [r3]
+	movs	r3, #7
+	strb	r3, [r1]
+	b	.L1550
+.L1561:
+	sub	r2, r0, #67
+	uxtb	r2, r2
+	cmp	r2, #1
+	bls	.L1562
+	sub	r1, r0, #34
+	cmp	r1, #1
+	bhi	.L1563
+.L1562:
+	ldr	r1, .L1631+72
+	cmp	r0, #35
+	ldr	r5, .L1631+68
+	str	r5, [r1]
+	ldr	r1, .L1631+20
+	beq	.L1564
+	cmp	r0, #68
+	beq	.L1564
+	movs	r0, #7
+.L1625:
+	cmp	r2, #1
+	strb	r0, [r1]
+	ite	ls
+	movls	r2, #4
+	movhi	r2, #5
+	strb	r2, [r3]
+	b	.L1550
+.L1564:
+	movs	r0, #17
+	b	.L1625
+.L1563:
+	cmp	r0, #49
+	bne	.L1567
+	ldr	r3, .L1631+76
+	str	r3, [r5]
+	b	.L1550
+.L1567:
+	cmp	r0, #50
+	itttt	eq
+	ldreq	r3, .L1631+80
+	streq	r3, [r5]
+	ldreq	r3, .L1631+84
+	streq	fp, [r3]
+	b	.L1550
+.L1574:
+	mvn	r0, #1
+	b	.L1520
+.L1533:
+	ldr	r5, [sp, #28]
+	strb	r0, [r5]
+	b	.L1532
+.L1632:
 	.align	2
-.L1855:
-	.word	.LANCHOR76
-	.word	.LANCHOR27
+.L1631:
+	.word	.LANCHOR28
+	.word	.LANCHOR25
+	.word	.LANCHOR10
+	.word	.LANCHOR20
+	.word	.LANCHOR13
+	.word	.LANCHOR149
+	.word	HynixReadRetrial
+	.word	.LANCHOR36
+	.word	.LANCHOR20+28
+	.word	.LANCHOR122
+	.word	.LANCHOR7
+	.word	.LANCHOR22
+	.word	.LANCHOR155
+	.word	.LANCHOR144
 	.word	.LANCHOR15
-	.word	.LANCHOR73
-	.word	.LANCHOR38
-	.word	.LANCHOR77
-	.word	.LANCHOR189
-	.word	.LANCHOR58
-	.word	.LANCHOR186
-	.word	.LANCHOR187
-	.word	.LANCHOR47
-	.word	.LANCHOR53
-	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
-	.section	.text.FtlBbmTblFlush,"ax",%progbits
+	.word	.LANCHOR26
+	.word	MicronReadRetrial
+	.word	ToshibaReadRetrial
+	.word	.LANCHOR148
+	.word	SamsungReadRetrial
+	.word	samsung_read_retrial
+	.word	.LANCHOR29
+	.size	FlashInit, .-FlashInit
+	.section	.text.FlashReadSlc2KPages,"ax",%progbits
 	.align	1
-	.global	FtlBbmTblFlush
+	.global	FlashReadSlc2KPages
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlBbmTblFlush, %function
-FtlBbmTblFlush:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L1873
-	ldr	r4, [r3]
-	str	r3, [sp, #12]
-	cmp	r4, #0
-	bne	.L1859
-	ldr	r3, .L1873+4
-	mov	r1, r4
-	ldr	r7, .L1873+8
-	ldr	r5, .L1873+12
-	ldr	r3, [r3]
-	ldr	r0, [r7]
-	mov	fp, r7
-	ldr	r6, .L1873+16
-	str	r3, [r5, #12]
-	ldr	r7, .L1873+20
-	ldr	r3, .L1873+24
-	ldr	r8, .L1873+56
-	str	r0, [r5, #8]
-	ldrh	r2, [r3]
-	bl	ftl_memset
-.L1860:
-	ldrh	r3, [r7]
-	cmp	r4, r3
-	blt	.L1861
-	ldr	r6, [r5, #12]
-	movs	r2, #16
-	ldr	r4, .L1873+28
-	movs	r1, #255
+	.type	FlashReadSlc2KPages, %function
+FlashReadSlc2KPages:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1690
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r0
 	movs	r7, #0
-	mov	r0, r6
-	mov	r8, r7
-	bl	ftl_memset
-	movw	r3, #61649
-	mov	r10, r4
-	strh	r3, [r6]	@ movhi
+	sub	sp, sp, #24
+	ldrb	fp, [r3, #9]	@ zero_extendqisi2
+	str	r1, [sp, #8]
+	str	r2, [sp, #12]
+.L1634:
+	ldr	r3, [sp, #8]
+	cmp	r7, r3
+	bne	.L1658
+	movs	r0, #0
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1658:
+	ldr	r3, [sp, #8]
+	add	r2, sp, #20
+	ldr	r1, [sp, #12]
+	mov	r0, r4
+	subs	r3, r3, r7
+	uxtb	r3, r3
+	str	r3, [sp]
+	add	r3, sp, #16
+	bl	LogAddr2PhyAddr
+	ldr	r2, .L1690+4
+	ldr	r3, [sp, #16]
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r2, r3
+	bhi	.L1635
+	mov	r3, #-1
+	str	r3, [r4]
+.L1636:
+	adds	r7, r7, #1
+	adds	r4, r4, #36
+	b	.L1634
+.L1635:
+	ldr	r2, .L1690+8
+	mov	r8, #0
+	ldrb	r5, [r2, r3]	@ zero_extendqisi2
+	mov	r0, r5
+	bl	NandcWaitFlashReady
+	mov	r0, r5
+	bl	NandcFlashCs
+.L1637:
+	ldr	r1, [sp, #20]
+	mov	r0, r5
+	bl	FlashReadCmd
+	mov	r0, r5
+	bl	NandcWaitFlashReady
+	ldr	r3, [r4, #12]
+	mov	r2, fp
+	movs	r1, #0
+	mov	r0, r5
+	str	r3, [sp]
 	ldr	r3, [r4, #8]
-	str	r3, [r6, #4]
-	ldrh	r3, [r4]
-	strh	r3, [r6, #2]	@ movhi
-	ldrh	r3, [r4, #4]
-	strh	r3, [r6, #8]	@ movhi
-	ldrh	r3, [r4, #6]
-	strh	r3, [r6, #10]	@ movhi
-	ldr	r3, .L1873+32
-	ldr	r3, [r3]
-	strh	r3, [r6, #12]	@ movhi
-.L1862:
-	ldr	r3, [fp]
-	ldrh	r2, [r4, #2]
-	ldrh	r1, [r4]
-	str	r3, [r5, #8]
-	ldr	r3, .L1873+4
-	ldrh	r0, [r6, #10]
+	bl	NandcXferData
+	ldr	r3, .L1690+12
+	mov	r6, r0
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L1638
+.L1641:
+	adds	r3, r6, #1
+	beq	.L1639
+.L1640:
+	cmp	r8, #0
+	beq	.L1643
+.L1642:
+	mov	r6, #256
+.L1643:
+	mov	r8, #0
+.L1644:
+	ldr	r3, .L1690+16
+	mov	r0, r5
+	ldr	r1, [sp, #20]
 	ldr	r3, [r3]
-	str	r3, [r5, #12]
-	movs	r3, #0
-	str	r3, [r5]
-	orr	r3, r2, r1, lsl #10
-	str	r3, [r5, #4]
-	ldrh	r3, [r4, #4]
-	str	r0, [sp]
-	ldr	r0, .L1873+36
-	bl	printf
-	ldr	r3, .L1873+40
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r3]
-	subs	r3, r3, #1
-	cmp	r2, r3
-	blt	.L1863
+	add	r1, r1, r3
+	bl	FlashReadCmd
+	mov	r0, r5
+	bl	NandcWaitFlashReady
 	ldr	r3, [r4, #8]
-	mov	r1, #0	@ movhi
-	ldrh	r2, [r4]
-	strh	r1, [r4, #2]	@ movhi
-	adds	r3, r3, #1
-	str	r3, [r4, #8]
-	str	r3, [r6, #4]
-	strh	r2, [r6, #8]	@ movhi
-	ldrh	r3, [r4, #4]
-	strh	r2, [r4, #4]	@ movhi
-	ldr	r2, .L1873+44
-	strh	r3, [r4]	@ movhi
-	lsls	r3, r3, #10
-	ldr	r0, [r2]
-	movs	r2, #1
-	str	r3, [r5, #4]
-	mov	r1, r2
-	str	r3, [r0, #4]
-	bl	FlashEraseBlocks
-.L1863:
-	movs	r3, #1
-	ldr	r0, .L1873+12
-	mov	r2, r3
-	mov	r1, r3
-	bl	FlashProgPages
-	ldrh	r3, [r10, #2]
+	cbz	r3, .L1645
+	add	r3, r3, #2048
+.L1645:
+	ldr	r2, [r4, #12]
+	cbz	r2, .L1646
+	adds	r2, r2, #8
+.L1646:
+	str	r2, [sp]
+	movs	r1, #0
+	mov	r2, fp
+	mov	r0, r5
+	bl	NandcXferData
+	ldr	r3, .L1690+12
+	mov	r10, r0
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	cmp	r2, #0
+	bne	.L1647
+.L1650:
+	cmp	r10, #-1
+	beq	.L1648
+.L1649:
+	cmp	r8, #0
+	beq	.L1652
+.L1651:
+	mov	r10, #256
+.L1652:
+	mov	r0, r5
+	bl	NandcFlashDeCs
+	ldr	r2, .L1690+20
+	cmp	r6, r10
+	it	cc
+	movcc	r6, r10
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	add	r3, r2, r2, lsl #1
+	cmp	r6, r3, asr #2
+	bhi	.L1653
+	movs	r3, #0
+.L1689:
+	str	r3, [r4]
+	ldr	r3, [r4, #12]
+	cbz	r3, .L1654
+	ldr	r1, [r3, #12]
+	adds	r1, r1, #1
+	bne	.L1654
+	ldr	r1, [r3, #8]
+	adds	r0, r1, #1
+	bne	.L1654
+	ldr	r3, [r3]
 	adds	r3, r3, #1
-	strh	r3, [r10, #2]	@ movhi
-	ldr	r3, [r5]
-	adds	r2, r3, #1
-	bne	.L1864
-	adds	r7, r7, #1
-	ldr	r1, [r5, #4]
-	uxth	r7, r7
-	ldr	r0, .L1873+48
-	bl	printf
-	cmp	r7, #3
-	bls	.L1862
-	mov	r2, r7
-	ldr	r1, [r5, #4]
-	ldr	r0, .L1873+52
+	it	ne
+	strne	r1, [r4]
+.L1654:
+	ldr	r3, [r4]
+	adds	r1, r3, #1
+	bne	.L1636
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1690+24
 	bl	printf
-	ldr	r2, [sp, #12]
-	movs	r3, #1
-	str	r3, [r2]
-.L1859:
-	movs	r0, #0
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1861:
-	ldrh	r2, [r8]
-	ldr	r3, [r5, #8]
-	ldr	r1, [r6, #4]!
-	mul	r0, r4, r2
-	lsls	r2, r2, #2
-	adds	r4, r4, #1
-	add	r0, r3, r0, lsl #2
-	bl	ftl_memcpy
-	b	.L1860
-.L1864:
+	ldr	r1, [r4, #8]
+	cbz	r1, .L1656
+	movs	r3, #8
+	movs	r2, #4
+	ldr	r0, .L1690+28
+	bl	rknand_print_hex
+.L1656:
+	ldr	r1, [r4, #12]
+	cmp	r1, #0
+	beq	.L1636
+	movs	r3, #4
+	ldr	r0, .L1690+32
+	mov	r2, r3
+	bl	rknand_print_hex
+	b	.L1636
+.L1638:
+	mov	r0, r5
+	bl	flash_read_ecc
+	cmp	r0, #5
+	bls	.L1641
+	mov	r6, #256
+	b	.L1640
+.L1639:
+	cmp	r8, #10
+	beq	.L1642
 	add	r8, r8, #1
-	cmp	r8, #1
-	beq	.L1862
-	cmp	r3, #256
-	beq	.L1862
-	b	.L1859
-.L1874:
+	b	.L1637
+.L1647:
+	mov	r0, r5
+	bl	flash_read_ecc
+	cmp	r0, #5
+	bls	.L1650
+	mov	r10, #256
+	b	.L1649
+.L1648:
+	cmp	r8, #10
+	beq	.L1651
+	add	r8, r8, #1
+	b	.L1644
+.L1653:
+	mov	r3, #256
+	b	.L1689
+.L1691:
 	.align	2
-.L1873:
-	.word	.LANCHOR76
-	.word	.LANCHOR188
-	.word	.LANCHOR183
-	.word	.LANCHOR203
-	.word	.LANCHOR74+24
-	.word	.LANCHOR45
-	.word	.LANCHOR57
-	.word	.LANCHOR74
-	.word	.LANCHOR37
-	.word	.LC33
-	.word	.LANCHOR53
-	.word	.LANCHOR77
-	.word	.LC34
-	.word	.LC35
-	.word	.LANCHOR123
-	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
-	.section	.text.allocate_data_superblock,"ax",%progbits
+.L1690:
+	.word	.LANCHOR31
+	.word	.LANCHOR26
+	.word	.LANCHOR27
+	.word	.LANCHOR208
+	.word	.LANCHOR4
+	.word	.LANCHOR33
+	.word	.LC26
+	.word	.LC27
+	.word	.LC28
+	.size	FlashReadSlc2KPages, .-FlashReadSlc2KPages
+	.section	.text.FlashReadPages,"ax",%progbits
 	.align	1
-	.global	allocate_data_superblock
+	.global	FlashReadPages
 	.syntax unified
 	.thumb
 	.thumb_func
-	.fpu softvfp
-	.type	allocate_data_superblock, %function
-allocate_data_superblock:
-	@ args = 0, pretend = 0, frame = 8
+	.fpu softvfp
+	.type	FlashReadPages, %function
+FlashReadPages:
+	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1940
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r4, r0
-	ldr	r3, [r3]
-	cmp	r3, #0
-	bne	.L1877
-.L1876:
-	ldr	r3, .L1940+4
-	ldr	r8, .L1940+60
-	ldr	r7, .L1940+8
-	ldrh	r3, [r3]
-	ldrh	r2, [r8]
-	add	r3, r3, r2
-	ldrh	r2, [r7]
+	ldr	r3, .L1783
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #40
+	mov	r10, r0
+	str	r1, [sp, #24]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r2, [sp, #12]
+	cbnz	r3, .L1693
+	ldr	r2, .L1783+4
+	mov	r8, r3
+	str	r3, [sp, #8]
+	ldrb	r2, [r2, #9]	@ zero_extendqisi2
+	str	r2, [sp, #20]
+	ldr	r2, .L1783+8
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	str	r2, [sp, #28]
+.L1694:
+	ldr	r3, [sp, #8]
+	ldr	r2, [sp, #24]
 	cmp	r3, r2
-	ble	.L1878
-	ldr	r1, .L1940+12
-	movw	r2, #3164
-	ldr	r0, .L1940+16
-	bl	printf
-	ldr	r1, .L1940+20
-	ldr	r0, .L1940+24
-	bl	printf
-.L1878:
-	ldr	r3, .L1940+28
-	ldrb	r2, [r4, #8]	@ zero_extendqisi2
-	cmp	r4, r3
-	bne	.L1879
-	ldr	r3, .L1940+4
-	ldrh	r5, [r3]
-	ldr	r3, .L1940+32
-	ldr	r3, [r3]
-	lsrs	r0, r5, #1
-	adds	r1, r0, #1
-	mul	r6, r3, r5
-	add	r1, r1, r6, lsr #2
-	ldr	r6, .L1940+36
-	uxth	r1, r1
-	ldr	r6, [r6]
-	cbz	r6, .L1880
-	ldr	r6, .L1940+40
-	ldr	r6, [r6]
-	cmp	r6, #39
-	bhi	.L1880
-	cmp	r6, #2
-	bls	.L1914
-	lsls	r1, r5, #31
-	bpl	.L1910
-	cmp	r3, #0
-	beq	.L1914
-.L1910:
-	mov	r1, r0
-	b	.L1880
-.L1879:
-	cmp	r2, #1
-	bne	.L1914
-	ldr	r3, .L1940+44
-	ldrh	r3, [r3]
-	cmp	r3, #1
-	beq	.L1914
-	ldr	r3, .L1940+48
+	bcc	.L1732
+	movs	r0, #0
+	b	.L1692
+.L1693:
+	bl	FlashReadSlc2KPages
+.L1692:
+	add	sp, sp, #40
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1732:
+	ldr	r2, [sp, #8]
+	movs	r3, #36
+	ldr	r1, [sp, #12]
+	mul	fp, r3, r2
+	add	r7, r10, fp
+	ldr	r3, [r7, #4]
+	mov	r0, r7
+	str	r3, [sp, #16]
+	ldr	r3, [sp, #24]
+	subs	r3, r3, r2
+	add	r2, sp, #36
+	uxtb	r3, r3
+	str	r3, [sp]
+	add	r3, sp, #32
+	bl	LogAddr2PhyAddr
+	ldr	r2, .L1783+12
+	mov	r5, r0
+	ldr	r3, [sp, #32]
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r2, r3
+	bhi	.L1696
+	mov	r3, #-1
+	str	r3, [r10, fp]
+.L1697:
+	ldr	r3, [sp, #8]
+	adds	r3, r3, #1
+	str	r3, [sp, #8]
+	b	.L1694
+.L1696:
+	ldr	r2, .L1783+16
+	ldrb	r4, [r2, r3]	@ zero_extendqisi2
+	ldr	r3, .L1783+20
+	mov	r0, r4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1914
-	ldr	r3, .L1940+4
-	ldr	r0, .L1940+36
-	ldrh	r3, [r3]
-	ldr	r0, [r0]
-	lsrs	r1, r3, #3
-	cbz	r0, .L1880
-	ldr	r0, .L1940+40
-	ldr	r0, [r0]
-	cmp	r0, #1
-	bhi	.L1880
-	rsb	r3, r3, r3, lsl #3
-	ubfx	r1, r3, #3, #16
-.L1880:
-	cbz	r1, .L1881
-	subs	r1, r1, #1
-	uxth	r1, r1
-.L1881:
-	ldr	r0, .L1940+52
-	bl	List_pop_index_node
-	ldr	r3, .L1940+4
-	mov	r5, r0
-	uxth	r10, r0
-	ldrh	r3, [r3]
-	cbnz	r3, .L1882
-	ldr	r1, .L1940+12
-	mov	r2, #3184
-	ldr	r0, .L1940+16
-	bl	printf
-	ldr	r1, .L1940+20
-	ldr	r0, .L1940+24
-	bl	printf
-.L1882:
-	ldr	r3, .L1940+4
-	ldr	r2, .L1940+4
-	ldrh	r3, [r3]
-	subs	r3, r3, #1
-	strh	r3, [r2]	@ movhi
-	ldrh	r3, [r7]
-	cmp	r3, r10
-	bls	.L1876
-	uxth	r5, r5
-	lsls	r3, r5, #1
-	str	r3, [sp]
-	ldr	r3, .L1940+56
+	it	eq
+	moveq	r5, #0
+	bl	NandcWaitFlashReady
+	ldr	r3, .L1783+24
 	ldr	r3, [r3]
-	ldrh	r6, [r3, r5, lsl #1]
-	cmp	r6, #0
-	bne	.L1876
-	strh	r10, [r4]	@ movhi
+	ldrb	r2, [r3, #19]	@ zero_extendqisi2
+	subs	r3, r2, #1
+	cmp	r3, #7
+	bhi	.L1699
+	ldr	r3, .L1783+28
+	subs	r2, r2, #7
+	cmp	r2, #1
+	ldr	r2, .L1783+32
+	add	r1, r3, r4
+	ldrb	r3, [r1, #12]	@ zero_extendqisi2
+	ldrb	r2, [r2, r4]	@ zero_extendqisi2
+	it	ls
+	ldrbls	r3, [r1, #20]	@ zero_extendqisi2
+	cmp	r2, r3
+	beq	.L1699
+	ldr	r2, .L1783+36
 	mov	r0, r4
-	bl	make_superblock
-	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	ldrb	r1, [r2, #-3]	@ zero_extendqisi2
+	bl	HynixSetRRPara
+.L1699:
+	mov	r0, r4
+	bl	NandcFlashCs
+	ldr	r3, [sp, #12]
+	cmp	r3, #1
+	beq	.L1701
+	ldr	r3, [sp, #16]
 	cmp	r3, #0
-	bne	.L1884
-	ldr	r3, .L1940+56
-	movw	r2, #65535
-	ldr	r3, [r3]
-	strh	r2, [r3, r5, lsl #1]	@ movhi
-	ldr	r3, .L1940+4
-	ldrh	r2, [r8]
-	ldrh	r3, [r3]
-	add	r3, r3, r2
-	ldrh	r2, [r7]
-	cmp	r3, r2
-	ble	.L1876
-	mov	r2, #3200
-	ldr	r1, .L1940+12
-	ldr	r0, .L1940+16
-	bl	printf
-	ldr	r1, .L1940+20
-	ldr	r0, .L1940+24
-	bl	printf
-	b	.L1876
-.L1914:
-	movs	r1, #0
-	b	.L1881
-.L1941:
-	.align	2
-.L1940:
-	.word	.LANCHOR76
-	.word	.LANCHOR88
-	.word	.LANCHOR40
-	.word	.LANCHOR204
-	.word	.LC5
-	.word	.LC6
-	.word	.LC7
-	.word	.LANCHOR93
-	.word	.LANCHOR172
-	.word	.LANCHOR28
-	.word	.LANCHOR170
-	.word	.LANCHOR44
-	.word	.LANCHOR15
-	.word	.LANCHOR87
-	.word	.LANCHOR83
-	.word	.LANCHOR85
-.L1884:
-	ldr	r3, .L1942
-	ldrh	r2, [r8]
-	ldrh	r3, [r3]
-	add	r3, r3, r2
-	ldrh	r2, [r7]
-	cmp	r3, r2
-	ble	.L1886
-	ldr	r1, .L1942+4
-	movw	r2, #3203
-	ldr	r0, .L1942+8
-	bl	printf
-	ldr	r1, .L1942+12
-	ldr	r0, .L1942+16
-	bl	printf
-.L1886:
-	ldr	r3, .L1942+20
-	add	lr, r4, #16
-	ldr	r2, .L1942+24
-	mov	r8, #0
-	ldr	ip, [r3]
-	ldrh	r0, [r2]
-	movs	r2, #36
-	mov	r3, ip
-	mla	r0, r2, r0, ip
-.L1887:
-	cmp	r0, r3
-	bne	.L1889
-	cbnz	r6, .L1890
-	ldr	r1, .L1942+4
-	movw	r2, #3215
-	ldr	r0, .L1942+8
-	bl	printf
-	ldr	r1, .L1942+12
-	ldr	r0, .L1942+16
-	bl	printf
-.L1890:
-	ldr	r3, .L1942+28
-	ldr	r8, .L1942+80
-	ldr	r3, [r3]
-	cbz	r3, .L1891
-	ldr	r3, .L1942+32
-	cmp	r4, r3
-	bne	.L1891
-	ldr	r3, [r8]
-	ldrh	r3, [r3, r5, lsl #1]
-	cmp	r3, #40
-	itt	hi
-	movhi	r3, #0
-	strbhi	r3, [r4, #8]
-.L1891:
-	ldr	r3, .L1942+36
-	ldrh	r3, [r3]
-	cmp	r3, r10
-	bne	.L1892
-	ldr	r1, .L1942+4
-	movw	r2, #3222
-	ldr	r0, .L1942+8
-	bl	printf
-	ldr	r1, .L1942+12
-	ldr	r0, .L1942+16
-	bl	printf
-.L1892:
-	ldrb	r2, [r4, #8]	@ zero_extendqisi2
-	ldr	r3, .L1942+40
-	ldr	fp, .L1942+84
-	cmp	r2, #0
-	bne	.L1893
-	ldr	r1, [r8]
-	ldrh	r2, [r1, r5, lsl #1]
-	cmp	r2, #0
-	beq	.L1894
-	ldr	r0, .L1942+44
-	ldrh	r0, [r0]
-	add	r2, r2, r0
-.L1937:
-	strh	r2, [r1, r5, lsl #1]	@ movhi
-	mov	r0, r10
+	bge	.L1702
+.L1701:
+	ldr	r3, .L1783+40
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L1702
+	mov	r0, r4
+	bl	flash_enter_slc_mode
+.L1709:
+	ldr	r1, [sp, #36]
+	adds	r6, r1, #1
+	bne	.L1704
+	cmp	r4, #255
+	beq	.L1734
+.L1704:
+	cbz	r5, .L1706
+	ldr	r3, .L1783+44
+	mov	r0, r4
 	ldr	r2, [r3]
+	add	r2, r2, r1
+	bl	FlashReadDpCmd
+.L1707:
+	mov	r0, r4
+	bl	NandcWaitFlashReady
+	cbz	r5, .L1705
+	ldr	r1, [sp, #36]
+	mov	r0, r4
+	bl	FlashReadDpDataOutCmd
+.L1705:
+	ldr	r3, [r7, #12]
 	movs	r1, #0
-	str	r3, [sp, #4]
-	adds	r2, r2, #1
-	str	r2, [r3]
-	bl	ftl_set_blk_mode
-.L1938:
-	ldr	r2, [r8]
-	ldr	r3, [sp, #4]
-	ldrh	r0, [r2, r5, lsl #1]
-	ldr	r2, .L1942+48
-	ldr	r1, [r2]
-	cmp	r0, r1
-	ldrh	r1, [r7]
-	it	hi
-	strhi	r0, [r2]
-	ldr	r2, .L1942+44
-	ldr	r0, [r3]
-	ldr	r3, [fp]
-	ldrh	r2, [r2]
-	ldr	r7, .L1942+52
-	mla	r0, r0, r2, r3
-	bl	__aeabi_uidiv
-	ldr	r3, .L1942+56
-	str	r0, [r3]
-	ldr	r3, .L1942+60
-	ldr	r2, [r3]
-	ldr	r3, [r2, #16]
-	adds	r3, r3, #1
-	str	r3, [r2, #16]
-	ldr	r3, .L1942+20
-	ldr	r0, [r3]
-	movs	r3, #36
-	adds	r1, r0, #4
-	mla	r3, r3, r6, r0
-	adds	r3, r3, #40
-.L1898:
-	adds	r1, r1, #36
-	cmp	r3, r1
-	bne	.L1899
-	ldr	r3, .L1942+64
+	ldr	r2, [sp, #20]
+	mov	r0, r4
+	str	r3, [sp]
+	ldr	r3, [r7, #8]
+	bl	NandcXferData
+	ldr	r3, .L1783+8
+	mov	r6, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1900
-	ldrb	r3, [r4, #8]	@ zero_extendqisi2
-	mov	r2, r6
-	cmp	r3, #1
-	ite	eq
-	moveq	r1, #0
-	movne	r1, #1
-	bl	FlashEraseBlocks
-.L1900:
-	ldr	r3, .L1942+20
-	movs	r7, #0
-	mov	r8, r7
-	mov	fp, #36
-	mov	r2, r6
-	ldrb	r1, [r4, #8]	@ zero_extendqisi2
-	ldr	r0, [r3]
-	bl	FlashEraseBlocks
-.L1902:
-	uxth	r3, r7
-	cmp	r6, r3
-	bhi	.L1904
-	cmp	r8, #0
-	beq	.L1905
-	mov	r0, r10
-	bl	update_multiplier_value
-	bl	FtlBbmTblFlush
-.L1905:
-	ldrb	r2, [r4, #7]	@ zero_extendqisi2
-	cmp	r2, #0
-	bne	.L1906
-	ldr	r3, .L1942+68
-	movw	r2, #65535
+	cbz	r3, .L1708
+	adds	r0, r0, #1
+	bne	.L1708
+	ldr	r3, .L1783+8
+	movs	r5, #0
+	strb	r5, [r3]
+	b	.L1709
+.L1702:
+	mov	r0, r4
+	bl	flash_exit_slc_mode
+	b	.L1709
+.L1706:
+	mov	r0, r4
+	bl	FlashReadCmd
+	b	.L1707
+.L1734:
+	movs	r5, #0
+	b	.L1705
+.L1708:
+	cbz	r5, .L1710
+	ldr	r3, .L1783+44
+	mov	r0, r4
+	ldr	r1, [sp, #36]
 	ldr	r3, [r3]
-	strh	r2, [r3, r5, lsl #1]	@ movhi
-	b	.L1876
-.L1889:
-	ldrh	r1, [lr], #2
-	movw	fp, #65535
-	str	r8, [r3, #8]
-	str	r8, [r3, #12]
-	cmp	r1, fp
-	beq	.L1888
-	mla	fp, r2, r6, ip
-	adds	r6, r6, #1
-	lsls	r1, r1, #10
-	uxth	r6, r6
-	str	r1, [fp, #4]
-.L1888:
-	adds	r3, r3, #36
-	b	.L1887
-.L1894:
-	movs	r2, #2
-	b	.L1937
-.L1893:
-	ldr	r1, [r8]
-	mov	r0, r10
-	str	r3, [sp, #4]
-	ldrh	r2, [r1, r5, lsl #1]
-	adds	r2, r2, #1
-	strh	r2, [r1, r5, lsl #1]	@ movhi
-	ldr	r2, [fp]
-	adds	r2, r2, #1
-	str	r2, [fp]
-	bl	ftl_set_blk_mode.part.10
-	b	.L1938
-.L1899:
-	ldr	r2, [r1, #-36]
-	ands	r2, r2, r7
-	str	r2, [r1, #-36]
-	b	.L1898
-.L1904:
-	ldr	r2, .L1942+20
-	mul	r3, fp, r7
-	ldr	r2, [r2]
-	adds	r1, r2, r3
-	ldr	r2, [r2, r3]
-	adds	r3, r2, #1
-	bne	.L1903
-	ldr	r0, [r1, #4]
-	add	r8, r8, #1
-	str	r2, [sp, #4]
-	ubfx	r0, r0, #10, #16
-	bl	FtlBbmMapBadBlock
-	ldr	r2, [sp, #4]
-	add	r3, r4, r7, lsl #1
-	strh	r2, [r3, #16]	@ movhi
-	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	add	r1, r1, r3
+	bl	FlashReadDpDataOutCmd
+	add	r3, fp, #36
+	movs	r1, #0
+	add	r3, r3, r10
+	mov	r0, r4
+	ldr	r2, [r3, #12]
+	str	r2, [sp]
+	ldr	r2, [sp, #20]
+	ldr	r3, [r3, #8]
+	bl	NandcXferData
+	cmp	r0, #-1
+	mov	r8, r0
+	it	eq
+	moveq	r5, #0
+.L1710:
+	mov	r0, r4
+	bl	NandcFlashDeCs
+	ldr	r3, .L1783+8
+	adds	r1, r6, #1
+	ldrb	r2, [sp, #28]	@ zero_extendqisi2
+	strb	r2, [r3]
+	bne	.L1711
+	ldr	r3, .L1783+48
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L1712
+.L1716:
+	ldr	r3, .L1783+52
+	ldr	r5, [r3]
+	cmp	r5, #0
+	bne	.L1713
+	ldr	r3, [r7, #12]
+	mov	r0, r4
+	ldr	r2, [r7, #8]
+	ldr	r1, [sp, #36]
+	bl	FlashReadRawPage
+	b	.L1782
+.L1712:
+	ldr	r3, .L1783+56
+	mov	r0, r4
+	ldr	r1, [sp, #36]
+	ldr	r3, [r3]
+	ldr	r5, [r3, #304]
+	movs	r3, #1
+	str	r3, [sp]
+	ldr	r2, [r7, #8]
+	ldr	r3, [r7, #12]
+	bl	FlashDdrTunningRead
+	adds	r2, r0, #1
+	mov	r6, r0
+	beq	.L1715
+	ldr	r3, .L1783+60
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r0, r3, lsr #1
+	bls	.L1735
+.L1715:
+	ubfx	r0, r5, #8, #8
+	bl	NandcSetDdrPara
+	adds	r3, r6, #1
+	beq	.L1716
+.L1735:
+	movs	r5, #0
+.L1711:
+	ldr	r3, .L1783+60
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r6, r3, asr #2
+	bls	.L1724
+	ldr	r3, .L1783+52
+	ldr	r3, [r3]
+	cmp	r3, #0
+	bne	.L1724
+	mov	r6, #256
+	b	.L1719
+.L1784:
+	.align	2
+.L1783:
+	.word	.LANCHOR2
+	.word	.LANCHOR31
+	.word	.LANCHOR6
+	.word	.LANCHOR26
+	.word	.LANCHOR27
+	.word	.LANCHOR210
+	.word	.LANCHOR7
+	.word	.LANCHOR20
+	.word	.LANCHOR21
+	.word	.LANCHOR20+4
+	.word	.LANCHOR16
+	.word	.LANCHOR4
+	.word	.LANCHOR30
+	.word	.LANCHOR148
+	.word	.LANCHOR19
+	.word	.LANCHOR33
+.L1713:
+	ldr	r3, [r7, #12]
+	mov	r0, r4
+	ldr	r2, [r7, #8]
+	ldr	r1, [sp, #36]
+	blx	r5
+	adds	r5, r0, #1
+	mov	r6, r0
+	bne	.L1717
+	ldr	r3, .L1785
+	ldr	r3, [r3]
+	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r3, #1
-	strb	r3, [r4, #7]
-.L1903:
-	adds	r7, r7, #1
-	b	.L1902
-.L1906:
-	ldr	r3, .L1942+72
-	ldr	r1, .L1942+76
-	ldrh	r3, [r3]
-	strh	r10, [r4]	@ movhi
-	smulbb	r3, r3, r2
-	movs	r2, #0
-	strh	r2, [r4, #2]	@ movhi
-	strb	r2, [r4, #6]
-	ldr	r2, [r1]
-	uxth	r3, r3
-	strh	r3, [r4, #4]	@ movhi
-	str	r2, [r4, #12]
-	adds	r2, r2, #1
-	str	r2, [r1]
-	ldr	r2, .L1942+68
-	ldr	r1, [sp]
-	ldr	r2, [r2]
-	strh	r3, [r2, r1]	@ movhi
-	ldrh	r3, [r4, #4]
-	cbz	r3, .L1907
-	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1877
-.L1907:
-	ldr	r1, .L1942+4
-	movw	r2, #3281
-	ldr	r0, .L1942+8
+	cmp	r3, #7
+	bhi	.L1718
+	ldr	r2, .L1785+4
+	movs	r3, #0
+	mov	r0, r4
+	ldrb	r1, [r2, #-3]	@ zero_extendqisi2
+	bl	HynixSetRRPara
+.L1718:
+	ldr	r3, [r7, #12]
+	mov	r0, r4
+	ldr	r2, [r7, #8]
+	ldr	r1, [sp, #36]
+	bl	FlashReadRawPage
+	ldr	r2, .L1785+8
+	mov	r6, r0
+	mov	r3, r0
+	ldr	r1, [r7, #4]
+	ldr	r0, .L1785+12
+	ldrb	r2, [r2]	@ zero_extendqisi2
 	bl	printf
-	ldr	r1, .L1942+12
-	ldr	r0, .L1942+16
+	adds	r0, r6, #1
+	bne	.L1717
+	ldr	r3, .L1785+16
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	cbz	r5, .L1719
+	ldr	r3, [sp, #12]
+	mov	r0, r4
+	cmp	r3, #1
+	beq	.L1720
+	ldr	r3, [sp, #16]
+	cmp	r3, #0
+	bge	.L1721
+.L1720:
+	bl	flash_enter_slc_mode
+.L1722:
+	ldr	r3, .L1785+20
+	mov	r0, r4
+	ldr	r2, [r7, #8]
+	ldr	r1, [sp, #36]
+	ldr	r5, [r3]
+	ldr	r3, [r7, #12]
+	blx	r5
+.L1782:
+	adds	r1, r0, #1
+	mov	r6, r0
+	mov	r5, #0
+	bne	.L1724
+.L1719:
+	str	r6, [r10, fp]
+.L1725:
+	ldr	r3, [r10, fp]
+	adds	r2, r3, #1
+	bne	.L1727
+	ldr	r2, .L1785+8
+	ldr	r1, [r7, #4]
+	ldr	r0, .L1785+24
+	ldrb	r2, [r2]	@ zero_extendqisi2
 	bl	printf
-.L1877:
-	movs	r0, #0
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1943:
+	ldr	r1, [r7, #12]
+	cbz	r1, .L1727
+	movs	r3, #4
+	ldr	r0, .L1785+28
+	mov	r2, r3
+	bl	rknand_print_hex
+.L1727:
+	cbz	r5, .L1729
+	ldr	r3, .L1785+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r8, r3, asr #2
+	bls	.L1730
+	ldr	r3, .L1785+20
+	ldr	r3, [r3]
+	cmp	r3, #0
+	it	eq
+	moveq	r8, #256
+.L1730:
+	cmp	r8, #-1
+	add	r3, fp, #36
+	str	r8, [r10, r3]
+	beq	.L1729
+	cmp	r8, #256
+	itt	ne
+	movne	r2, #0
+	strne	r2, [r10, r3]
+.L1729:
+	ldr	r3, [sp, #8]
+	add	r3, r3, r5
+	str	r3, [sp, #8]
+	ldr	r3, [sp, #12]
+	cmp	r3, #1
+	beq	.L1731
+	ldr	r3, [sp, #16]
+	cmp	r3, #0
+	bge	.L1697
+.L1731:
+	ldr	r3, .L1785+16
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L1697
+	mov	r0, r4
+	bl	flash_exit_slc_mode
+	b	.L1697
+.L1721:
+	bl	flash_exit_slc_mode
+	b	.L1722
+.L1717:
+	movs	r5, #0
+.L1724:
+	cmp	r6, #256
+	beq	.L1719
+	movs	r3, #0
+	str	r3, [r10, fp]
+	b	.L1725
+.L1786:
 	.align	2
-.L1942:
-	.word	.LANCHOR88
-	.word	.LANCHOR204
-	.word	.LC5
-	.word	.LC6
-	.word	.LC7
-	.word	.LANCHOR77
-	.word	.LANCHOR38
-	.word	.LANCHOR28
-	.word	.LANCHOR91
-	.word	.LANCHOR205
-	.word	.LANCHOR167
-	.word	.LANCHOR48
-	.word	.LANCHOR169
-	.word	-1024
-	.word	.LANCHOR206
-	.word	.LANCHOR191
-	.word	.LANCHOR15
-	.word	.LANCHOR83
-	.word	.LANCHOR52
-	.word	.LANCHOR159
-	.word	.LANCHOR78
-	.word	.LANCHOR168
-	.size	allocate_data_superblock, .-allocate_data_superblock
-	.section	.text.FtlGcFreeBadSuperBlk,"ax",%progbits
+.L1785:
+	.word	.LANCHOR7
+	.word	.LANCHOR20+4
+	.word	.LANCHOR33
+	.word	.LC29
+	.word	.LANCHOR16
+	.word	.LANCHOR148
+	.word	.LC26
+	.word	.LC28
+	.size	FlashReadPages, .-FlashReadPages
+	.section	.text.FlashProgSlc2KPages,"ax",%progbits
 	.align	1
-	.global	FtlGcFreeBadSuperBlk
+	.global	FlashProgSlc2KPages
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlGcFreeBadSuperBlk, %function
-FtlGcFreeBadSuperBlk:
-	@ args = 0, pretend = 0, frame = 8
+	.type	FlashProgSlc2KPages, %function
+FlashProgSlc2KPages:
+	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r10, r0
-	ldr	r4, .L1956
-	ldrh	r3, [r4]
-	cbz	r3, .L1945
-	ldr	r8, .L1956+12
+	ldr	r3, .L1814
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r8, r1
+	ldr	fp, .L1814+32
+	mov	r4, r0
+	mov	r6, r0
 	movs	r7, #0
-.L1946:
-	ldr	r3, .L1956+4
-	ldrh	r2, [r3]
-	uxth	r3, r7
-	cmp	r2, r3
-	bhi	.L1952
-	bl	FtlGcReFreshBadBlk
-.L1945:
+	ldrb	r10, [r3, #9]	@ zero_extendqisi2
+	sub	sp, sp, #64
+	str	r2, [sp, #12]
+.L1788:
+	cmp	r7, r8
+	bne	.L1794
+	ldr	r10, .L1814+36
+	mov	r8, #0
+.L1795:
+	cmp	r7, r8
+	bne	.L1802
 	movs	r0, #0
-	add	sp, sp, #8
+	add	sp, sp, #64
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1952:
-	ldr	r2, .L1956+8
-	uxth	r3, r7
-	mov	r1, r10
-	mov	fp, #0
-	ldrb	r0, [r2, r3]	@ zero_extendqisi2
-	bl	V2P_block
-	mov	r1, r0
-.L1947:
-	ldrh	r3, [r4]
-	uxth	r5, fp
-	cmp	r3, r5
-	bhi	.L1951
+.L1794:
+	sub	r3, r8, r7
+	add	r2, sp, #20
+	uxtb	r3, r3
+	ldr	r1, [sp, #12]
+	mov	r0, r6
+	str	r3, [sp]
+	add	r3, sp, #24
+	bl	LogAddr2PhyAddr
+	ldr	r2, .L1814+4
+	ldr	r3, [sp, #24]
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r2, r3
+	bhi	.L1789
+	mov	r3, #-1
+	str	r3, [r6]
+.L1790:
 	adds	r7, r7, #1
-	b	.L1946
-.L1951:
-	uxth	r6, fp
-	ldrh	r3, [r8, r6, lsl #1]
-	cmp	r3, r1
-	bne	.L1948
-	mov	r0, r1
-	str	r1, [sp, #4]
-	bl	FtlBbmMapBadBlock
-	bl	FtlBbmTblFlush
-	ldrh	r2, [r4]
-	add	r3, r8, r6, lsl #1
-	ldr	r1, [sp, #4]
-.L1949:
-	cmp	r5, r2
-	bcc	.L1950
-	subs	r2, r2, #1
-	strh	r2, [r4]	@ movhi
-.L1948:
-	add	fp, fp, #1
-	b	.L1947
-.L1950:
-	ldrh	r0, [r3, #2]!
-	adds	r5, r5, #1
-	uxth	r5, r5
-	strh	r0, [r3, #-2]	@ movhi
-	b	.L1949
-.L1957:
+	adds	r6, r6, #36
+	b	.L1788
+.L1789:
+	ldr	r2, .L1814+8
+	ldrb	r5, [r2, r3]	@ zero_extendqisi2
+	mov	r0, r5
+	bl	NandcWaitFlashReady
+	mov	r0, r5
+	bl	NandcFlashCs
+	ldr	r1, [sp, #20]
+	mov	r0, r5
+	bl	FlashProgFirstCmd
+	ldr	r3, [r6, #12]
+	mov	r2, r10
+	movs	r1, #1
+	mov	r0, r5
+	str	r3, [sp]
+	ldr	r3, [r6, #8]
+	bl	NandcXferData
+	ldr	r1, [sp, #20]
+	mov	r0, r5
+	bl	FlashProgSecondCmd
+	mov	r0, r5
+	bl	NandcWaitFlashReady
+	ldr	r1, [sp, #20]
+	mov	r0, r5
+	bl	FlashReadStatus
+	sbfx	r0, r0, #0, #1
+	ldr	r1, [sp, #20]
+	str	r0, [r6]
+	mov	r0, r5
+	ldr	r3, [fp]
+	add	r1, r1, r3
+	bl	FlashProgFirstCmd
+	ldr	r3, [r6, #8]
+	cbz	r3, .L1791
+	add	r3, r3, #2048
+.L1791:
+	ldr	r2, [r6, #12]
+	cbz	r2, .L1792
+	adds	r2, r2, #8
+.L1792:
+	str	r2, [sp]
+	movs	r1, #1
+	mov	r2, r10
+	mov	r0, r5
+	bl	NandcXferData
+	ldr	r3, [fp]
+	mov	r0, r5
+	ldr	r1, [sp, #20]
+	add	r1, r1, r3
+	bl	FlashProgSecondCmd
+	mov	r0, r5
+	bl	NandcWaitFlashReady
+	ldr	r1, [sp, #20]
+	mov	r0, r5
+	bl	FlashReadStatus
+	lsls	r2, r0, #31
+	mov	r0, r5
+	itt	mi
+	movmi	r3, #-1
+	strmi	r3, [r6]
+	bl	NandcFlashDeCs
+	b	.L1790
+.L1802:
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	bne	.L1796
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1814+12
+	bl	printf
+.L1797:
+	add	r8, r8, #1
+	adds	r4, r4, #36
+	b	.L1795
+.L1796:
+	sub	r3, r7, r8
+	ldr	fp, .L1814+40
+	uxtb	r3, r3
+	add	r2, sp, #20
+	ldr	r1, [sp, #12]
+	mov	r0, r4
+	str	r3, [sp]
+	add	r3, sp, #24
+	bl	LogAddr2PhyAddr
+	ldr	lr, [r10]
+	movs	r3, #0
+	ldr	ip, [fp]
+	mov	r6, r4
+	add	r5, sp, #28
+	str	r3, [lr]
+	str	r3, [ip]
+	ldmia	r6!, {r0, r1, r2, r3}
+	stmia	r5!, {r0, r1, r2, r3}
+	str	lr, [sp, #36]
+	ldmia	r6!, {r0, r1, r2, r3}
+	str	ip, [sp, #40]
+	stmia	r5!, {r0, r1, r2, r3}
+	movs	r1, #1
+	ldr	r3, [r6]
+	add	r0, sp, #28
+	ldr	r2, [sp, #12]
+	str	r3, [r5]
+	bl	FlashReadPages
+	ldr	r5, [sp, #28]
+	adds	r3, r5, #1
+	bne	.L1798
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1814+16
+	bl	printf
+	str	r5, [r4]
+.L1798:
+	ldr	r5, [sp, #28]
+	cmp	r5, #256
+	bne	.L1799
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1814+20
+	bl	printf
+	str	r5, [r4]
+.L1799:
+	ldr	r3, [r4, #12]
+	cbz	r3, .L1800
+	ldr	r2, [r3]
+	ldr	r3, [fp]
+	ldr	r3, [r3]
+	cmp	r2, r3
+	beq	.L1800
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1814+24
+	bl	printf
+	mov	r3, #-1
+	str	r3, [r4]
+.L1800:
+	ldr	r3, [r4, #8]
+	cmp	r3, #0
+	beq	.L1797
+	ldr	r2, [r3]
+	ldr	r3, [r10]
+	ldr	r3, [r3]
+	cmp	r2, r3
+	beq	.L1797
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1814+28
+	bl	printf
+	mov	r3, #-1
+	str	r3, [r4]
+	b	.L1797
+.L1815:
 	.align	2
-.L1956:
-	.word	.LANCHOR116
-	.word	.LANCHOR38
-	.word	.LANCHOR47
-	.word	.LANCHOR117
-	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
-	.section	.text.update_vpc_list,"ax",%progbits
+.L1814:
+	.word	.LANCHOR31
+	.word	.LANCHOR26
+	.word	.LANCHOR27
+	.word	.LC30
+	.word	.LC31
+	.word	.LC32
+	.word	.LC33
+	.word	.LC34
+	.word	.LANCHOR4
+	.word	.LANCHOR206
+	.word	.LANCHOR207
+	.size	FlashProgSlc2KPages, .-FlashProgSlc2KPages
+	.section	.text.FlashProgPages,"ax",%progbits
 	.align	1
-	.global	update_vpc_list
+	.global	FlashProgPages
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	update_vpc_list, %function
-update_vpc_list:
-	@ args = 0, pretend = 0, frame = 0
+	.type	FlashProgPages, %function
+FlashProgPages:
+	@ args = 0, pretend = 0, frame = 64
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #72
+	ldr	r5, .L1868
 	mov	r4, r0
-	ldr	r3, .L1968
-	ldr	r3, [r3]
-	ldrh	r3, [r3, r0, lsl #1]
+	mov	r8, r2
+	str	r1, [sp, #8]
+	ldr	r5, [r5]
+	str	r3, [sp, #20]
+	ldrb	r5, [r5, #19]	@ zero_extendqisi2
+	str	r5, [sp, #16]
+	ldr	r5, .L1868+4
+	ldrb	r7, [r5]	@ zero_extendqisi2
+	cbnz	r7, .L1817
+	ldr	r3, .L1868+8
+	ldrb	r3, [r3, #9]	@ zero_extendqisi2
+	str	r3, [sp, #12]
+.L1818:
+	ldr	r3, [sp, #8]
+	cmp	r7, r3
+	bcc	.L1831
+	ldr	r6, .L1868+12
+	movs	r5, #0
+	ldr	r7, .L1868+16
+.L1832:
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	cmp	r5, r3
+	bcc	.L1834
+	ldr	r3, [sp, #20]
 	cmp	r3, #0
-	bne	.L1959
-	ldr	r2, .L1968+4
-	ldrh	r1, [r2]
-	cmp	r1, r0
-	bne	.L1960
-	movw	r3, #65535
-	strh	r3, [r2]	@ movhi
-.L1961:
-	ldr	r5, .L1968+8
-	mov	r1, r4
-	ldr	r0, .L1968+12
-	bl	List_remove_node
-	ldrh	r3, [r5]
-	cbnz	r3, .L1963
-	ldr	r1, .L1968+16
-	mov	r2, #3392
-	ldr	r0, .L1968+20
-	bl	printf
-	ldr	r1, .L1968+24
-	ldr	r0, .L1968+28
-	bl	printf
-.L1963:
-	ldrh	r3, [r5]
-	mov	r0, r4
+	bne	.L1835
+.L1843:
+	movs	r0, #0
+	b	.L1816
+.L1817:
+	bl	FlashProgSlc2KPages
+.L1816:
+	add	sp, sp, #72
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1831:
+	ldr	r3, [sp, #8]
+	movs	r6, #36
+	muls	r6, r7, r6
+	add	r2, sp, #28
+	mov	r1, r8
+	subs	r3, r3, r7
+	uxtb	r3, r3
+	add	fp, r4, r6
+	str	r3, [sp]
+	mov	r0, fp
+	add	r3, sp, #32
+	bl	LogAddr2PhyAddr
+	ldr	r3, .L1868+12
+	mov	r10, r0
+	ldr	r0, [sp, #32]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r0
+	bhi	.L1820
+	mov	r3, #-1
+	str	r3, [r4, r6]
+.L1821:
+	adds	r7, r7, #1
+	b	.L1818
+.L1820:
+	ldr	r3, .L1868+20
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	ldr	r3, .L1868+24
+	it	eq
+	moveq	r10, #0
+	add	r3, r3, r0, lsl #4
+	ldr	r3, [r3, #8]
+	cbz	r3, .L1823
+	uxtb	r0, r0
+	bl	FlashWaitCmdDone
+.L1823:
+	ldr	r3, [sp, #32]
+	movs	r1, #0
+	ldr	r2, .L1868+24
+	add	r2, r2, r3, lsl #4
+	str	r1, [r2, #12]
+	ldr	r1, [sp, #28]
+	str	fp, [r2, #8]
+	str	r1, [r2, #4]
+	cmp	r10, #0
+	beq	.L1824
+	add	r1, r6, #36
+	add	r1, r1, r4
+	str	r1, [r2, #12]
+.L1824:
+	ldr	r2, .L1868+28
+	ldrb	r5, [r2, r3]	@ zero_extendqisi2
+	lsls	r3, r3, #4
+	ldr	r2, .L1868+24
+	mov	r0, r5
+	strb	r5, [r2, r3]
+	ldr	r3, .L1868+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #1
+	bne	.L1825
+	bl	NandcWaitFlashReady
+.L1826:
+	ldr	r3, [sp, #16]
 	subs	r3, r3, #1
-	strh	r3, [r5]	@ movhi
-	bl	free_data_superblock
+	cmp	r3, #7
+	bhi	.L1827
+	ldr	r3, .L1868+32
+	ldrb	r3, [r3, r5]	@ zero_extendqisi2
+	cbz	r3, .L1827
+	ldr	r1, .L1868+36
+	movs	r3, #0
+	mov	r0, r5
+	adds	r2, r1, #4
+	ldrb	r1, [r1, #1]	@ zero_extendqisi2
+	bl	HynixSetRRPara
+.L1827:
+	mov	r0, r5
+	bl	NandcFlashCs
+	cmp	r8, #1
+	mov	r0, r5
+	bne	.L1828
+	ldr	r3, .L1868+16
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L1828
+	bl	flash_enter_slc_mode
+.L1829:
+	ldr	r1, [sp, #28]
+	mov	r0, r5
+	bl	FlashProgFirstCmd
+	ldr	r3, [fp, #12]
+	movs	r1, #1
+	ldr	r2, [sp, #12]
+	mov	r0, r5
+	str	r3, [sp]
+	ldr	r3, [fp, #8]
+	bl	NandcXferData
+	cmp	r10, #0
+	beq	.L1830
+	ldr	r1, [sp, #28]
+	mov	r0, r5
+	bl	FlashProgDpFirstCmd
+	ldr	r3, .L1868+40
+	mov	r0, r5
+	ldr	r2, [sp, #32]
+	adds	r6, r6, #36
+	ldr	r1, [sp, #28]
+	add	r6, r6, r4
+	ldr	r2, [r3, r2, lsl #2]
+	adds	r2, r2, #0
+	it	ne
+	movne	r2, #1
+	bl	FlashWaitReadyEN
+	ldr	r3, .L1868+44
+	mov	r0, r5
+	ldr	r1, [sp, #28]
+	ldr	r3, [r3]
+	add	r1, r1, r3
+	bl	FlashProgDpSecondCmd
+	ldr	r3, [r6, #12]
+	movs	r1, #1
+	ldr	r2, [sp, #12]
+	mov	r0, r5
+	str	r3, [sp]
+	ldr	r3, [r6, #8]
+	bl	NandcXferData
+.L1830:
+	ldr	r1, [sp, #28]
+	mov	r0, r5
+	bl	FlashProgSecondCmd
+	mov	r0, r5
+	add	r7, r7, r10
+	bl	NandcFlashDeCs
+	b	.L1821
+.L1825:
+	bl	NandcFlashCs
+	ldr	r2, [sp, #32]
+	mov	r0, r5
+	ldr	r3, .L1868+40
+	ldr	r1, [sp, #28]
+	ldr	r2, [r3, r2, lsl #2]
+	adds	r2, r2, #0
+	it	ne
+	movne	r2, #1
+	bl	FlashWaitReadyEN
+	mov	r0, r5
+	bl	NandcFlashDeCs
+	b	.L1826
+.L1828:
+	bl	flash_exit_slc_mode
+	b	.L1829
+.L1834:
+	uxtb	r0, r5
+	bl	FlashWaitCmdDone
+	cmp	r8, #1
+	bne	.L1833
+	ldrb	r3, [r7]	@ zero_extendqisi2
+	cbz	r3, .L1833
+	ldr	r2, .L1868+24
+	lsls	r3, r5, #4
+	ldrb	r0, [r2, r3]	@ zero_extendqisi2
+	bl	flash_exit_slc_mode
+.L1833:
+	adds	r5, r5, #1
+	b	.L1832
+.L1835:
+	ldr	r10, .L1868+64
+	movs	r7, #0
+.L1836:
+	ldr	r3, [sp, #8]
+	cmp	r7, r3
+	beq	.L1843
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	bne	.L1837
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1868+48
+	bl	printf
+.L1838:
+	adds	r7, r7, #1
+	adds	r4, r4, #36
+	b	.L1836
+.L1837:
+	ldr	r3, [sp, #8]
+	add	r2, sp, #28
+	ldr	fp, .L1868+68
+	mov	r1, r8
 	mov	r0, r4
-	bl	FtlGcFreeBadSuperBlk
-	ldr	r3, .L1968+32
-	ldrh	r2, [r5]
-	ldrh	r3, [r3]
-	add	r3, r3, r2
-	ldr	r2, .L1968+36
-	ldrh	r2, [r2]
-	cmp	r3, r2
-	ble	.L1967
-	ldr	r1, .L1968+16
-	movw	r2, #3395
-	ldr	r0, .L1968+20
+	mov	r6, r4
+	subs	r3, r3, r7
+	add	r5, sp, #36
+	uxtb	r3, r3
+	str	r3, [sp]
+	add	r3, sp, #32
+	bl	LogAddr2PhyAddr
+	ldr	lr, [r10]
+	movs	r3, #0
+	ldr	ip, [fp]
+	str	r3, [lr]
+	str	r3, [ip]
+	ldmia	r6!, {r0, r1, r2, r3}
+	stmia	r5!, {r0, r1, r2, r3}
+	str	lr, [sp, #44]
+	ldmia	r6!, {r0, r1, r2, r3}
+	str	ip, [sp, #48]
+	stmia	r5!, {r0, r1, r2, r3}
+	mov	r2, r8
+	ldr	r3, [r6]
+	movs	r1, #1
+	add	r0, sp, #36
+	str	r3, [r5]
+	bl	FlashReadPages
+	ldr	r5, [sp, #36]
+	adds	r3, r5, #1
+	bne	.L1839
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1868+52
+	bl	printf
+	str	r5, [r4]
+.L1839:
+	ldr	r3, [r4, #12]
+	cbz	r3, .L1840
+	ldr	r2, [r3]
+	ldr	r3, [fp]
+	ldr	r3, [r3]
+	cmp	r2, r3
+	beq	.L1840
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1868+56
 	bl	printf
-	ldr	r1, .L1968+24
-	ldr	r0, .L1968+28
+	mov	r3, #-1
+	str	r3, [r4]
+.L1840:
+	ldr	r3, [r4, #8]
+	cmp	r3, #0
+	beq	.L1838
+	ldr	r2, [r3]
+	ldr	r3, [r10]
+	ldr	r3, [r3]
+	cmp	r2, r3
+	beq	.L1838
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1868+60
 	bl	printf
-.L1967:
-	movs	r3, #1
-	b	.L1958
-.L1960:
-	ldr	r2, .L1968+40
-	ldrh	r2, [r2]
-	cmp	r2, r0
-	beq	.L1958
-	ldr	r2, .L1968+44
-	ldrh	r2, [r2]
-	cmp	r2, r0
-	beq	.L1958
-	ldr	r2, .L1968+48
-	ldrh	r2, [r2]
-	cmp	r2, r0
-	bne	.L1961
-.L1958:
-	mov	r0, r3
-	pop	{r3, r4, r5, pc}
-.L1959:
-	bl	List_update_data_list
-	movs	r3, #0
-	b	.L1958
-.L1969:
+	mov	r3, #-1
+	str	r3, [r4]
+	b	.L1838
+.L1869:
 	.align	2
-.L1968:
-	.word	.LANCHOR83
-	.word	.LANCHOR205
-	.word	.LANCHOR85
-	.word	.LANCHOR82
+.L1868:
+	.word	.LANCHOR7
+	.word	.LANCHOR2
+	.word	.LANCHOR31
+	.word	.LANCHOR26
+	.word	.LANCHOR16
+	.word	.LANCHOR28
+	.word	.LANCHOR23
+	.word	.LANCHOR27
+	.word	.LANCHOR21
+	.word	.LANCHOR20
+	.word	.LANCHOR18
+	.word	.LANCHOR4
+	.word	.LC30
+	.word	.LC31
+	.word	.LC33
+	.word	.LC34
+	.word	.LANCHOR206
 	.word	.LANCHOR207
-	.word	.LC5
-	.word	.LC6
-	.word	.LC7
-	.word	.LANCHOR88
-	.word	.LANCHOR40
-	.word	.LANCHOR91
-	.word	.LANCHOR92
-	.word	.LANCHOR93
-	.size	update_vpc_list, .-update_vpc_list
-	.section	.text.decrement_vpc_count,"ax",%progbits
+	.size	FlashProgPages, .-FlashProgPages
+	.section	.text.FlashTestBlk,"ax",%progbits
 	.align	1
-	.global	decrement_vpc_count
+	.global	FlashTestBlk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	decrement_vpc_count, %function
-decrement_vpc_count:
-	@ args = 0, pretend = 0, frame = 0
+	.type	FlashTestBlk, %function
+FlashTestBlk:
+	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-	movw	r3, #65535
-	push	{r4, r5, r6, lr}
-	cmp	r0, r3
+	ldr	r3, .L1873
+	push	{r4, r5, lr}
 	mov	r4, r0
-	beq	.L1971
-	ldr	r5, .L1982
-	ldr	r3, [r5]
-	ldrh	r2, [r3, r0, lsl #1]
-	cmp	r2, #0
-	bne	.L1972
-	mov	r1, r0
-	ldr	r0, .L1982+4
-	bl	printf
-	ldr	r3, [r5]
-	ldrh	r3, [r3, r4, lsl #1]
-	cbnz	r3, .L1973
-	ldr	r1, .L1982+8
-	movw	r2, #3410
-	ldr	r0, .L1982+12
-	bl	printf
-	ldr	r1, .L1982+16
-	ldr	r0, .L1982+20
-	bl	printf
-.L1973:
-	ldr	r3, [r5]
+	sub	sp, sp, #108
+	ldr	r3, [r3]
+	cmp	r0, r3
+	bcc	.L1872
+	ldr	r5, .L1873+4
+	add	r0, sp, #40
 	movs	r2, #32
-	mov	r1, r4
-	ldr	r0, .L1982+24
-	strh	r2, [r3, r4, lsl #1]	@ movhi
-	bl	test_node_in_list
-	cbz	r0, .L1974
-	ldr	r6, .L1982+28
-	mov	r1, r4
-	ldr	r0, .L1982+24
-	bl	List_remove_node
-	ldrh	r3, [r6]
-	cbnz	r3, .L1975
-	ldr	r1, .L1982+8
-	movw	r2, #3414
-	ldr	r0, .L1982+12
-	bl	printf
-	ldr	r1, .L1982+16
-	ldr	r0, .L1982+20
-	bl	printf
-.L1975:
-	ldrh	r3, [r6]
-	mov	r0, r4
-	subs	r3, r3, #1
-	strh	r3, [r6]	@ movhi
-	bl	INSERT_DATA_LIST
+	movs	r1, #165
+	str	r0, [sp, #16]
+	lsls	r4, r4, #10
 	ldr	r3, [r5]
-	mov	r1, r4
-	ldr	r0, .L1982+32
-	ldrh	r2, [r3, r4, lsl #1]
-	bl	printf
-.L1974:
-	mov	r0, r4
-	bl	FtlGcRefreshBlock
-.L1978:
-	movs	r5, #0
-	b	.L1970
-.L1972:
-	subs	r2, r2, #1
-	strh	r2, [r3, r0, lsl #1]	@ movhi
-.L1971:
-	ldr	r6, .L1982+36
-	movw	r3, #65535
-	ldrh	r0, [r6]
-	cmp	r0, r3
-	bne	.L1977
-	strh	r4, [r6]	@ movhi
-	b	.L1978
-.L1977:
-	cmp	r4, r0
-	beq	.L1978
-	bl	update_vpc_list
-	ldr	r3, .L1982+40
-	adds	r5, r0, #0
-	ldr	r2, .L1982+44
+	str	r3, [sp, #12]
+	bl	ftl_memset
+	movs	r2, #8
+	movs	r1, #90
+	ldr	r0, [r5]
+	bl	ftl_memset
+	movs	r2, #1
+	add	r0, sp, #4
+	mov	r1, r2
+	str	r4, [sp, #8]
+	bl	FlashEraseBlocks
+	movs	r3, #1
+	add	r0, sp, #4
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+	ldr	r4, [sp, #4]
+	movs	r2, #1
+	movs	r1, #0
+	add	r0, sp, #4
+	adds	r4, r4, #0
 	it	ne
-	movne	r5, #1
-	strh	r4, [r6]	@ movhi
-	ldr	r3, [r3]
-	ldr	r2, [r2]
-	subs	r3, r3, r2
-	asrs	r2, r3, #1
-	ldr	r3, .L1982+48
-	muls	r3, r2, r3
-	ldr	r2, .L1982
-	ldr	r2, [r2]
-	uxth	r1, r3
-	ldrh	r2, [r2, r1, lsl #1]
-	cbnz	r2, .L1970
-	cmp	r4, r1
-	beq	.L1970
-	ldr	r1, .L1982+8
-	movw	r2, #3435
-	ldr	r0, .L1982+12
-	bl	printf
-	ldr	r1, .L1982+16
-	ldr	r0, .L1982+20
-	bl	printf
-.L1970:
-	mov	r0, r5
-	pop	{r4, r5, r6, pc}
-.L1983:
+	movne	r4, #1
+	negs	r4, r4
+	bl	FlashEraseBlocks
+.L1870:
+	mov	r0, r4
+	add	sp, sp, #108
+	@ sp needed
+	pop	{r4, r5, pc}
+.L1872:
+	movs	r4, #0
+	b	.L1870
+.L1874:
 	.align	2
-.L1982:
-	.word	.LANCHOR83
-	.word	.LC36
-	.word	.LANCHOR208
-	.word	.LC5
-	.word	.LC6
-	.word	.LC7
-	.word	.LANCHOR87
-	.word	.LANCHOR88
-	.word	.LC37
-	.word	.LANCHOR133
-	.word	.LANCHOR82
-	.word	.LANCHOR81
-	.word	-1431655765
-	.size	decrement_vpc_count, .-decrement_vpc_count
-	.section	.text.FtlSlcSuperblockCheck,"ax",%progbits
+.L1873:
+	.word	.LANCHOR156
+	.word	.LANCHOR152
+	.size	FlashTestBlk, .-FlashTestBlk
+	.section	.text.FtlLowFormatEraseBlock,"ax",%progbits
 	.align	1
-	.global	FtlSlcSuperblockCheck
+	.global	FtlLowFormatEraseBlock
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlSlcSuperblockCheck, %function
-FtlSlcSuperblockCheck:
-	@ args = 0, pretend = 0, frame = 0
+	.type	FtlLowFormatEraseBlock, %function
+FtlLowFormatEraseBlock:
+	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldrh	r3, [r0, #4]
-	push	{r4, r5, r6, lr}
-	mov	r4, r0
+	ldr	r3, .L1920
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #40
+	str	r0, [sp, #8]
+	ldr	r3, [r3]
+	str	r1, [sp, #4]
 	cmp	r3, #0
-	beq	.L1984
-	ldrh	r2, [r0]
-	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L1984
-	ldrb	r3, [r0, #6]	@ zero_extendqisi2
-	ldr	r5, .L1995
-	ldr	r6, .L1995+4
-	adds	r3, r3, #8
-	ldrh	r3, [r0, r3, lsl #1]
-.L1988:
-	movw	r2, #65535
+	bne	.L1902
+	ldr	r2, .L1920+4
+	mov	r10, r3
+	mov	r5, r3
+	mov	r4, r3
+	mov	r8, #36
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	str	r2, [sp, #20]
+	ldr	r2, .L1920+8
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	str	r2, [sp, #12]
+	ldr	r2, .L1920+12
+	str	r0, [r2]
+	ldr	r2, .L1920+16
+	ldrh	fp, [r2]
+	ldr	r2, .L1920+20
+	ldr	r7, [r2]
+	ldr	r2, .L1920+24
+	ldr	r2, [r2]
+	str	r2, [sp, #16]
+	ldr	r2, .L1920+28
+	ldrh	r2, [r2]
+	str	r2, [sp, #24]
+.L1877:
+	uxth	r2, r10
+	cmp	fp, r2
+	bhi	.L1881
+	cmp	r5, #0
+	beq	.L1875
+	ldr	r3, [sp, #12]
+	mov	r0, r7
+	ldr	r10, .L1920+4
+	mov	r8, #0
+	mov	r2, r5
+	ldr	r7, .L1920+20
+	adds	r6, r3, #0
+	it	ne
+	movne	r6, #1
+	strb	r8, [r10]
+	mov	r1, r6
+	bl	FlashEraseBlocks
+	ldrb	r3, [sp, #20]	@ zero_extendqisi2
+	strb	r3, [r10]
+	mov	r10, #36
+.L1883:
+	uxth	r3, r8
+	cmp	r5, r3
+	bhi	.L1885
+	ldr	r3, [sp, #4]
+	cmp	r3, #0
+	bne	.L1886
+	uxth	r6, r6
+	movs	r3, #6
+	str	r3, [sp, #16]
+	movs	r3, #1
+	str	r3, [sp, #12]
+.L1887:
+	mov	r8, #0
+.L1896:
+	ldr	r3, .L1920+16
+	mov	fp, #0
+	mov	r5, fp
+	ldrh	r3, [r3]
+	str	r3, [sp, #24]
+	ldr	r3, .L1920+20
+	ldr	r10, [r3]
+	ldr	r3, .L1920+32
+	ldr	r3, [r3]
+	str	r3, [sp, #28]
+	ldr	r3, .L1920+36
+	ldr	r3, [r3]
+	str	r3, [sp, #32]
+	ldr	r3, .L1920+28
+	ldrh	r3, [r3]
+	str	r3, [sp, #36]
+.L1888:
+	ldr	r3, [sp, #24]
+	uxth	r2, fp
 	cmp	r3, r2
-	beq	.L1990
-	ldrb	r3, [r4, #8]	@ zero_extendqisi2
-	cmp	r3, #1
-	bne	.L1991
-	ldrb	r1, [r5]	@ zero_extendqisi2
-	cbnz	r1, .L1991
-	ldrh	r1, [r4, #2]
-	ldrh	r1, [r6, r1, lsl #1]
-	cmp	r1, r2
-	bne	.L1991
-	ldrh	r3, [r4, #4]
-	ldrh	r0, [r4]
-	subs	r3, r3, #1
-	strh	r3, [r4, #4]	@ movhi
-	bl	decrement_vpc_count
-	ldrh	r2, [r4, #4]
-	cbnz	r2, .L1990
-	ldrh	r3, [r4, #2]
-	strb	r2, [r4, #6]
-	adds	r3, r3, #1
-	strh	r3, [r4, #2]	@ movhi
-	pop	{r4, r5, r6, pc}
-.L1990:
-	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	ldr	r2, .L1995+8
-	adds	r3, r3, #1
-	ldrh	r2, [r2]
-	uxtb	r3, r3
-	strb	r3, [r4, #6]
-	cmp	r2, r3
-	bne	.L1989
-	ldrh	r3, [r4, #2]
-	adds	r3, r3, #1
-	strh	r3, [r4, #2]	@ movhi
+	bhi	.L1891
+	cbz	r5, .L1875
+	ldr	fp, .L1920+4
+	movs	r3, #1
+	mov	r0, r10
+	movs	r7, #0
+	mov	r2, r6
+	mov	r1, r5
+	strb	r7, [fp]
+	bl	FlashProgPages
+	ldrb	r3, [sp, #20]	@ zero_extendqisi2
+	ldr	r10, .L1920+20
+	strb	r3, [fp]
+	mov	fp, #36
+.L1893:
+	uxth	r3, r7
+	cmp	r5, r3
+	bhi	.L1895
+	ldr	r3, [sp, #16]
+	add	r8, r8, r3
+	ldr	r3, [sp, #12]
+	uxth	r8, r8
+	cmp	r3, r8
+	bhi	.L1896
+	ldr	r8, .L1920+20
+	movs	r7, #0
+	mov	r10, #36
+.L1897:
+	uxth	r3, r7
+	cmp	r5, r3
+	bhi	.L1899
+	ldr	r3, [sp, #8]
+	cmp	r3, #63
+	bls	.L1900
+	ldr	r3, [sp, #4]
+	cbz	r3, .L1875
+.L1900:
+	ldr	r3, .L1920+20
+	mov	r2, r5
+	mov	r1, r6
+	ldr	r0, [r3]
+	bl	FlashEraseBlocks
+.L1875:
+	mov	r0, r4
+	add	sp, sp, #40
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1881:
+	mul	r2, r8, r10
 	movs	r3, #0
-	strb	r3, [r4, #6]
-.L1989:
-	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	adds	r3, r3, #8
-	ldrh	r3, [r4, r3, lsl #1]
-	b	.L1988
-.L1991:
-	ldrb	r2, [r5]	@ zero_extendqisi2
-	cbz	r2, .L1984
-	cmp	r3, #1
-	bne	.L1984
-	ldr	r3, .L1995+12
-	ldrh	r2, [r4, #2]
+	ldr	r1, [sp, #8]
+	str	r3, [r7, r2]
+	ldr	r3, .L1920+40
+	ldrb	r0, [r3, r10]	@ zero_extendqisi2
+	bl	V2P_block
+	ldr	r3, [sp, #4]
+	mov	r6, r0
+	cbz	r3, .L1878
+	bl	IsBlkInVendorPart
+	cbnz	r0, .L1879
+.L1878:
+	mov	r0, r6
+	bl	FtlBbmIsBadBlock
+	cbnz	r0, .L1880
+	ldr	r3, [sp, #24]
+	mla	r1, r8, r5, r7
+	lsls	r6, r6, #10
+	mul	r2, r3, r5
+	ldr	r3, [sp, #16]
+	adds	r5, r5, #1
+	str	r6, [r1, #4]
+	uxth	r5, r5
+	str	r0, [r1, #8]
+	bic	r2, r2, #3
+	add	r2, r2, r3
+	str	r2, [r1, #12]
+.L1879:
+	add	r10, r10, #1
+	b	.L1877
+.L1880:
+	adds	r4, r4, #1
+	uxth	r4, r4
+	b	.L1879
+.L1885:
+	mul	r3, r10, r8
+	ldr	r2, [r7]
+	adds	r1, r2, r3
+	ldr	r3, [r2, r3]
+	adds	r3, r3, #1
+	bne	.L1884
+	ldr	r0, [r1, #4]
+	adds	r4, r4, #1
+	uxth	r4, r4
+	ubfx	r0, r0, #10, #16
+	bl	FtlBbmMapBadBlock
+.L1884:
+	add	r8, r8, #1
+	b	.L1883
+.L1886:
+	ldr	r3, .L1920+44
 	ldrh	r3, [r3]
-	cmp	r2, r3
-	bcc	.L1984
-	ldr	r3, .L1995+16
-	ldrh	r1, [r4]
-	ldrh	r0, [r4, #4]
-	ldr	r2, [r3]
-	ldrh	r3, [r2, r1, lsl #1]
-	subs	r3, r3, r0
-	strh	r3, [r2, r1, lsl #1]	@ movhi
+	str	r3, [sp, #12]
+	ldr	r3, .L1920+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L1903
+	ldr	r3, [sp, #12]
+	movs	r6, #1
+	lsrs	r3, r3, #2
+	str	r3, [sp, #16]
+	b	.L1887
+.L1903:
+	movs	r6, #1
+	str	r6, [sp, #16]
+	b	.L1887
+.L1891:
+	movs	r3, #36
+	ldr	r1, [sp, #8]
+	mul	r2, r3, fp
 	movs	r3, #0
-	ldr	r2, .L1995+20
-	strh	r3, [r4, #4]	@ movhi
-	strb	r3, [r4, #6]
-	ldrh	r2, [r2]
-	strh	r2, [r4, #2]	@ movhi
-.L1984:
-	pop	{r4, r5, r6, pc}
-.L1996:
+	str	r3, [r10, r2]
+	ldr	r3, .L1920+40
+	ldrb	r0, [r3, fp]	@ zero_extendqisi2
+	bl	V2P_block
+	ldr	r3, [sp, #4]
+	mov	r7, r0
+	cbz	r3, .L1889
+	bl	IsBlkInVendorPart
+	cbnz	r0, .L1890
+.L1889:
+	mov	r0, r7
+	bl	FtlBbmIsBadBlock
+	cbnz	r0, .L1890
+	movs	r3, #36
+	add	r7, r8, r7, lsl #10
+	mla	r1, r3, r5, r10
+	ldr	r3, [sp, #28]
+	str	r3, [r1, #8]
+	ldr	r3, [sp, #36]
+	str	r7, [r1, #4]
+	mul	r2, r3, r5
+	ldr	r3, [sp, #32]
+	adds	r5, r5, #1
+	uxth	r5, r5
+	bic	r2, r2, #3
+	add	r2, r2, r3
+	str	r2, [r1, #12]
+.L1890:
+	add	fp, fp, #1
+	b	.L1888
+.L1895:
+	mul	r3, fp, r7
+	ldr	r2, [r10]
+	adds	r1, r2, r3
+	ldr	r3, [r2, r3]
+	cbz	r3, .L1894
+	ldr	r0, [r1, #4]
+	adds	r4, r4, #1
+	uxth	r4, r4
+	ubfx	r0, r0, #10, #16
+	bl	FtlBbmMapBadBlock
+.L1894:
+	adds	r7, r7, #1
+	b	.L1893
+.L1899:
+	ldr	r3, [sp, #4]
+	cbz	r3, .L1898
+	mul	r3, r10, r7
+	ldr	r2, [r8]
+	adds	r1, r2, r3
+	ldr	r3, [r2, r3]
+	cbnz	r3, .L1898
+	ldr	r0, [r1, #4]
+	movs	r1, #1
+	ubfx	r0, r0, #10, #16
+	bl	FtlFreeSysBlkQueueIn
+.L1898:
+	adds	r7, r7, #1
+	b	.L1897
+.L1902:
+	movs	r4, #0
+	b	.L1875
+.L1921:
 	.align	2
-.L1995:
-	.word	.LANCHOR15
-	.word	.LANCHOR120
+.L1920:
+	.word	.LANCHOR78
+	.word	.LANCHOR28
+	.word	.LANCHOR16
+	.word	.LANCHOR75
 	.word	.LANCHOR38
+	.word	.LANCHOR79
+	.word	.LANCHOR196
+	.word	.LANCHOR58
+	.word	.LANCHOR193
+	.word	.LANCHOR194
+	.word	.LANCHOR47
 	.word	.LANCHOR53
-	.word	.LANCHOR83
-	.word	.LANCHOR52
-	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
-	.section	.text.get_new_active_ppa,"ax",%progbits
+	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
+	.section	.text.FtlBbmTblFlush,"ax",%progbits
 	.align	1
-	.global	get_new_active_ppa
+	.global	FtlBbmTblFlush
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	get_new_active_ppa, %function
-get_new_active_ppa:
-	@ args = 0, pretend = 0, frame = 0
+	.type	FtlBbmTblFlush, %function
+FtlBbmTblFlush:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldrh	r2, [r0]
-	movw	r3, #65535
-	push	{r4, r5, r6, r7, r8, lr}
-	mov	r4, r0
-	cmp	r2, r3
-	bne	.L1998
-	ldr	r1, .L2019
-	movw	r2, #3332
-	ldr	r0, .L2019+4
-	bl	printf
-	ldr	r1, .L2019+8
-	ldr	r0, .L2019+12
-	bl	printf
-.L1998:
-	ldr	r5, .L2019+16
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r5]
-	cmp	r2, r3
-	bne	.L1999
-	ldr	r1, .L2019
-	movw	r2, #3333
-	ldr	r0, .L2019+4
-	bl	printf
-	ldr	r1, .L2019+8
-	ldr	r0, .L2019+12
-	bl	printf
-.L1999:
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r3, .L1938
+	ldr	r4, [r3]
+	str	r3, [sp, #12]
+	cmp	r4, #0
+	bne	.L1924
+	ldr	r3, .L1938+4
+	mov	r1, r4
+	ldr	r7, .L1938+8
+	ldr	r5, .L1938+12
+	ldr	r3, [r3]
+	ldr	r0, [r7]
+	mov	fp, r7
+	ldr	r6, .L1938+16
+	str	r3, [r5, #12]
+	ldr	r7, .L1938+20
+	ldr	r3, .L1938+24
+	ldr	r8, .L1938+56
+	str	r0, [r5, #8]
+	ldrh	r2, [r3]
+	bl	ftl_memset
+.L1925:
+	ldrh	r3, [r7]
+	cmp	r4, r3
+	blt	.L1926
+	ldr	r6, [r5, #12]
+	movs	r2, #16
+	ldr	r4, .L1938+28
+	movs	r1, #255
+	movs	r7, #0
+	mov	r0, r6
+	mov	r8, r7
+	bl	ftl_memset
+	movw	r3, #61649
+	mov	r10, r4
+	strh	r3, [r6]	@ movhi
+	ldr	r3, [r4, #8]
+	str	r3, [r6, #4]
+	ldrh	r3, [r4]
+	strh	r3, [r6, #2]	@ movhi
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L2000
-	ldr	r1, .L2019
-	movw	r2, #3334
-	ldr	r0, .L2019+4
-	bl	printf
-	ldr	r1, .L2019+8
-	ldr	r0, .L2019+12
-	bl	printf
-.L2000:
+	strh	r3, [r6, #8]	@ movhi
+	ldrh	r3, [r4, #6]
+	strh	r3, [r6, #10]	@ movhi
+	ldr	r3, .L1938+32
+	ldr	r3, [r3]
+	strh	r3, [r6, #12]	@ movhi
+.L1927:
+	ldr	r3, [fp]
+	ldrh	r2, [r4, #2]
+	ldrh	r1, [r4]
+	str	r3, [r5, #8]
+	ldr	r3, .L1938+4
+	ldrh	r0, [r6, #10]
+	ldr	r3, [r3]
+	str	r3, [r5, #12]
 	movs	r3, #0
-	ldr	r7, .L2019+20
-	strb	r3, [r4, #10]
-	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	ldr	r6, .L2019+24
-	adds	r3, r3, #8
-	ldrh	r2, [r4, r3, lsl #1]
-.L2001:
-	movw	r0, #65535
-	cmp	r2, r0
-	beq	.L2002
-	ldrb	r3, [r4, #8]	@ zero_extendqisi2
-	ldrh	r1, [r4, #2]
-	cmp	r3, #1
+	str	r3, [r5]
+	orr	r3, r2, r1, lsl #10
+	str	r3, [r5, #4]
 	ldrh	r3, [r4, #4]
-	bne	.L2004
-	ldrb	ip, [r6]	@ zero_extendqisi2
-	cmp	ip, #0
-	bne	.L2004
-	ldr	ip, .L2019+28
-	ldrh	ip, [ip, r1, lsl #1]
-	cmp	ip, r0
-	bne	.L2004
+	str	r0, [sp]
+	ldr	r0, .L1938+36
+	bl	printf
+	ldr	r3, .L1938+40
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3]
 	subs	r3, r3, #1
-	ldrh	r0, [r4]
-	strh	r3, [r4, #4]	@ movhi
-	bl	decrement_vpc_count
-.L2002:
-	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	ldrh	r2, [r7]
-	adds	r3, r3, #1
-	uxtb	r3, r3
 	cmp	r2, r3
-	strb	r3, [r4, #6]
-	bne	.L2003
-	ldrh	r3, [r4, #2]
-	adds	r3, r3, #1
-	strh	r3, [r4, #2]	@ movhi
-	movs	r3, #0
-	strb	r3, [r4, #6]
-.L2003:
-	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	adds	r3, r3, #8
-	ldrh	r2, [r4, r3, lsl #1]
-	b	.L2001
-.L2004:
-	ldr	r8, .L2019+24
-	orr	r6, r1, r2, lsl #10
-	subs	r3, r3, #1
-	strh	r3, [r4, #4]	@ movhi
-.L2005:
-	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	movw	r2, #65535
-	ldrh	r0, [r7]
-.L2007:
+	blt	.L1928
+	ldr	r3, [r4, #8]
+	mov	r1, #0	@ movhi
+	ldrh	r2, [r4]
+	strh	r1, [r4, #2]	@ movhi
 	adds	r3, r3, #1
-	uxtb	r3, r3
-	cmp	r3, r0
-	itttt	eq
-	ldrheq	r3, [r4, #2]
-	addeq	r3, r3, #1
-	strheq	r3, [r4, #2]	@ movhi
-	moveq	r3, #0
-	add	r1, r3, #8
-	ldrh	r1, [r4, r1, lsl #1]
-	cmp	r1, r2
-	beq	.L2007
-	strb	r3, [r4, #6]
-	ldrb	r3, [r4, #8]	@ zero_extendqisi2
-	cmp	r3, #1
-	bne	.L2008
-	ldrb	r1, [r8]	@ zero_extendqisi2
-	ldrh	r3, [r4, #2]
-	cbnz	r1, .L2009
-	ldr	r1, .L2019+28
-	ldrh	r3, [r1, r3, lsl #1]
-	cmp	r3, r2
-	bne	.L2008
-	ldrh	r3, [r4, #4]
-	cbz	r3, .L2008
-	subs	r3, r3, #1
-	ldrh	r0, [r4]
-	strh	r3, [r4, #4]	@ movhi
-	bl	decrement_vpc_count
-	b	.L2005
-.L2009:
-	ldr	r2, .L2019+32
-	ldrh	r2, [r2]
-	cmp	r3, r2
-	bcc	.L2008
-	ldr	r3, .L2019+36
-	ldrh	r1, [r4]
-	ldrh	r0, [r4, #4]
-	ldr	r2, [r3]
-	ldrh	r3, [r2, r1, lsl #1]
-	subs	r3, r3, r0
-	strh	r3, [r2, r1, lsl #1]	@ movhi
-	movs	r3, #0
-	ldrh	r2, [r5]
-	strh	r3, [r4, #4]	@ movhi
-	strb	r3, [r4, #6]
-	strh	r2, [r4, #2]	@ movhi
-.L2008:
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r5]
-	cmp	r2, r3
-	bne	.L1997
+	str	r3, [r4, #8]
+	str	r3, [r6, #4]
+	strh	r2, [r6, #8]	@ movhi
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L1997
-	ldr	r1, .L2019
-	movw	r2, #3378
-	ldr	r0, .L2019+4
+	strh	r2, [r4, #4]	@ movhi
+	ldr	r2, .L1938+44
+	strh	r3, [r4]	@ movhi
+	lsls	r3, r3, #10
+	ldr	r0, [r2]
+	movs	r2, #1
+	str	r3, [r5, #4]
+	mov	r1, r2
+	str	r3, [r0, #4]
+	bl	FlashEraseBlocks
+.L1928:
+	movs	r3, #1
+	ldr	r0, .L1938+12
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+	ldrh	r3, [r10, #2]
+	adds	r3, r3, #1
+	strh	r3, [r10, #2]	@ movhi
+	ldr	r3, [r5]
+	adds	r2, r3, #1
+	bne	.L1929
+	adds	r7, r7, #1
+	ldr	r1, [r5, #4]
+	uxth	r7, r7
+	ldr	r0, .L1938+48
 	bl	printf
-	ldr	r1, .L2019+8
-	ldr	r0, .L2019+12
+	cmp	r7, #3
+	bls	.L1927
+	mov	r2, r7
+	ldr	r1, [r5, #4]
+	ldr	r0, .L1938+52
 	bl	printf
-.L1997:
-	mov	r0, r6
-	pop	{r4, r5, r6, r7, r8, pc}
-.L2020:
+	ldr	r2, [sp, #12]
+	movs	r3, #1
+	str	r3, [r2]
+.L1924:
+	movs	r0, #0
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1926:
+	ldrh	r2, [r8]
+	ldr	r3, [r5, #8]
+	ldr	r1, [r6, #4]!
+	mul	r0, r4, r2
+	lsls	r2, r2, #2
+	adds	r4, r4, #1
+	add	r0, r3, r0, lsl #2
+	bl	ftl_memcpy
+	b	.L1925
+.L1929:
+	add	r8, r8, #1
+	cmp	r8, #1
+	beq	.L1927
+	cmp	r3, #256
+	beq	.L1927
+	b	.L1924
+.L1939:
 	.align	2
-.L2019:
-	.word	.LANCHOR209
-	.word	.LC5
-	.word	.LC6
-	.word	.LC7
-	.word	.LANCHOR52
-	.word	.LANCHOR38
-	.word	.LANCHOR15
-	.word	.LANCHOR120
+.L1938:
+	.word	.LANCHOR78
+	.word	.LANCHOR195
+	.word	.LANCHOR189
+	.word	.LANCHOR211
+	.word	.LANCHOR76+24
+	.word	.LANCHOR45
+	.word	.LANCHOR57
+	.word	.LANCHOR76
+	.word	.LANCHOR37
+	.word	.LC35
 	.word	.LANCHOR53
-	.word	.LANCHOR83
-	.size	get_new_active_ppa, .-get_new_active_ppa
-	.section	.text.FtlVpcTblFlush,"ax",%progbits
+	.word	.LANCHOR79
+	.word	.LC36
+	.word	.LC37
+	.word	.LANCHOR126
+	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
+	.section	.text.allocate_data_superblock,"ax",%progbits
 	.align	1
-	.global	FtlVpcTblFlush
+	.global	allocate_data_superblock
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlVpcTblFlush, %function
-FtlVpcTblFlush:
+	.type	allocate_data_superblock, %function
+allocate_data_superblock:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L2045
+	ldr	r3, .L2005
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, [r2]
-	str	r2, [sp, #4]
+	mov	r4, r0
+	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L2023
-	ldr	r4, .L2045+4
-	ldr	r8, .L2045+112
-	ldr	fp, .L2045+116
-	ldr	r5, .L2045+8
-	ldr	r0, [r8]
-	ldr	r6, [fp]
-	ldrh	r2, [r4]
-	str	r0, [r5, #8]
-	str	r6, [r5, #12]
-	strh	r2, [r6, #2]	@ movhi
-	movw	r2, #61604
-	ldr	r7, .L2045+12
-	strh	r2, [r6]	@ movhi
-	str	r3, [r6, #12]
-	ldr	ip, .L2045+120
-	ldr	r2, [r4, #8]
-	str	r3, [r6, #8]
-	ldr	r3, .L2045+16
-	str	r2, [r6, #4]
-	stm	r7, {r3, ip}
-	ldrh	r3, [r4, #6]
-	strh	r3, [r7, #8]	@ movhi
-	ldr	r3, .L2045+20
+	bne	.L1942
+.L1941:
+	ldr	r3, .L2005+4
+	ldr	r8, .L2005+60
+	ldr	r7, .L2005+8
 	ldrh	r3, [r3]
-	strb	r3, [r7, #10]
-	ldr	r3, .L2045+24
-	ldrh	r2, [r3]
-	ldrh	r1, [r3, #2]
-	strh	r2, [r7, #14]	@ movhi
-	ldrb	r2, [r3, #6]	@ zero_extendqisi2
-	ldrb	r3, [r3, #8]	@ zero_extendqisi2
-	strb	r3, [r7, #11]
-	orr	r2, r2, r1, lsl #6
-	ldr	r3, .L2045+28
-	strh	r2, [r7, #16]	@ movhi
-	ldrh	r2, [r3]
-	ldrh	r1, [r3, #2]
-	strh	r2, [r7, #18]	@ movhi
-	ldrb	r2, [r3, #6]	@ zero_extendqisi2
-	ldrb	r3, [r3, #8]	@ zero_extendqisi2
-	strb	r3, [r7, #12]
-	orr	r2, r2, r1, lsl #6
-	ldr	r3, .L2045+32
-	strh	r2, [r7, #20]	@ movhi
-	ldrh	r2, [r3]
-	strh	r2, [r7, #22]	@ movhi
-	ldrh	r1, [r3, #2]
-	ldrb	r2, [r3, #6]	@ zero_extendqisi2
-	ldrb	r3, [r3, #8]	@ zero_extendqisi2
-	strb	r3, [r7, #13]
-	orr	r2, r2, r1, lsl #6
-	ldr	r3, .L2045+36
-	movs	r1, #255
-	strh	r2, [r7, #24]	@ movhi
+	ldrh	r2, [r8]
+	add	r3, r3, r2
+	ldrh	r2, [r7]
+	cmp	r3, r2
+	ble	.L1943
+	ldr	r1, .L2005+12
+	movw	r2, #3507
+	ldr	r0, .L2005+16
+	bl	printf
+	ldr	r1, .L2005+20
+	ldr	r0, .L2005+24
+	bl	printf
+.L1943:
+	ldr	r3, .L2005+28
+	ldrb	r2, [r4, #8]	@ zero_extendqisi2
+	cmp	r4, r3
+	bne	.L1944
+	ldr	r3, .L2005+4
+	ldrh	r5, [r3]
+	ldr	r3, .L2005+32
 	ldr	r3, [r3]
-	str	r3, [r7, #32]
-	ldr	r3, .L2045+40
+	lsrs	r0, r5, #1
+	adds	r1, r0, #1
+	mul	r6, r3, r5
+	add	r1, r1, r6, lsr #2
+	ldr	r6, .L2005+36
+	uxth	r1, r1
+	ldr	r6, [r6]
+	cbz	r6, .L1945
+	ldr	r6, .L2005+40
+	ldr	r6, [r6]
+	cmp	r6, #39
+	bhi	.L1945
+	cmp	r6, #2
+	bls	.L1979
+	lsls	r1, r5, #31
+	bpl	.L1975
+	cmp	r3, #0
+	beq	.L1979
+.L1975:
+	mov	r1, r0
+	b	.L1945
+.L1944:
+	cmp	r2, #1
+	bne	.L1979
+	ldr	r3, .L2005+44
+	ldrh	r3, [r3]
+	cmp	r3, #1
+	beq	.L1979
+	ldr	r3, .L2005+48
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L1979
+	ldr	r3, .L2005+4
+	ldr	r0, .L2005+36
+	ldrh	r3, [r3]
+	ldr	r0, [r0]
+	lsrs	r1, r3, #3
+	cbz	r0, .L1945
+	ldr	r0, .L2005+40
+	ldr	r0, [r0]
+	cmp	r0, #1
+	bhi	.L1945
+	rsb	r3, r3, r3, lsl #3
+	ubfx	r1, r3, #3, #16
+.L1945:
+	cbz	r1, .L1946
+	subs	r1, r1, #1
+	uxth	r1, r1
+.L1946:
+	ldr	r0, .L2005+52
+	bl	List_pop_index_node
+	ldr	r3, .L2005+4
+	mov	r5, r0
+	uxth	r10, r0
+	ldrh	r3, [r3]
+	cbnz	r3, .L1947
+	ldr	r1, .L2005+12
+	movw	r2, #3532
+	ldr	r0, .L2005+16
+	bl	printf
+	ldr	r1, .L2005+20
+	ldr	r0, .L2005+24
+	bl	printf
+.L1947:
+	ldr	r3, .L2005+4
+	ldr	r2, .L2005+4
+	ldrh	r3, [r3]
+	subs	r3, r3, #1
+	strh	r3, [r2]	@ movhi
+	ldrh	r3, [r7]
+	cmp	r3, r10
+	bls	.L1941
+	uxth	r5, r5
+	lsls	r3, r5, #1
+	str	r3, [sp]
+	ldr	r3, .L2005+56
 	ldr	r3, [r3]
-	str	r3, [r7, #40]
-	ldr	r3, .L2045+44
+	ldrh	r6, [r3, r5, lsl #1]
+	cmp	r6, #0
+	bne	.L1941
+	strh	r10, [r4]	@ movhi
+	mov	r0, r4
+	bl	make_superblock
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L1949
+	ldr	r3, .L2005+56
+	movw	r2, #65535
 	ldr	r3, [r3]
-	str	r3, [r7, #36]
-	ldr	r3, .L2045+48
-	ldrh	r3, [r3]
-	strh	r3, [r7, #44]	@ movhi
-	ldr	r3, .L2045+52
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	ldr	r3, .L2005+4
+	ldrh	r2, [r8]
 	ldrh	r3, [r3]
-	strh	r3, [r7, #46]	@ movhi
-	ldr	r3, .L2045+56
-	ldrh	r2, [r3]
-	bl	ftl_memset
-	mov	r1, r7
-	ldr	r7, .L2045+60
-	movs	r2, #48
-	ldr	r0, [r5, #8]
-	bl	ftl_memcpy
+	add	r3, r3, r2
 	ldrh	r2, [r7]
-	ldr	r3, .L2045+64
-	ldr	r0, [r5, #8]
-	ldr	r1, [r3]
-	lsls	r2, r2, #1
-	adds	r0, r0, #48
-	bl	ftl_memcpy
-	ldrh	r0, [r7]
-	ldr	r3, [r5, #8]
-	ldr	r1, .L2045+68
-	lsrs	r2, r0, #3
-	adds	r0, r0, #24
-	lsls	r0, r0, #1
-	ldr	r1, [r1]
-	adds	r2, r2, #4
-	bic	r0, r0, #3
-	add	r0, r0, r3
-	bl	ftl_memcpy
-	ldr	r3, .L2045+72
+	cmp	r3, r2
+	ble	.L1941
+	mov	r2, #3552
+	ldr	r1, .L2005+12
+	ldr	r0, .L2005+16
+	bl	printf
+	ldr	r1, .L2005+20
+	ldr	r0, .L2005+24
+	bl	printf
+	b	.L1941
+.L1979:
+	movs	r1, #0
+	b	.L1946
+.L2006:
+	.align	2
+.L2005:
+	.word	.LANCHOR78
+	.word	.LANCHOR90
+	.word	.LANCHOR40
+	.word	.LANCHOR212
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LANCHOR95
+	.word	.LANCHOR177
+	.word	.LANCHOR104
+	.word	.LANCHOR175
+	.word	.LANCHOR44
+	.word	.LANCHOR16
+	.word	.LANCHOR89
+	.word	.LANCHOR85
+	.word	.LANCHOR87
+.L1949:
+	ldr	r3, .L2007
+	ldrh	r2, [r8]
 	ldrh	r3, [r3]
-	cbz	r3, .L2024
-	ldrh	r0, [r7]
-	ldr	r3, .L2045+76
-	ldr	r1, .L2045+80
-	ldrh	r2, [r3]
-	lsrs	r3, r0, #3
-	ldr	r1, [r1]
-	add	r3, r3, r0, lsl #1
-	ldr	r0, [r5, #8]
-	adds	r3, r3, #52
-	lsls	r2, r2, #2
-	ubfx	r3, r3, #2, #14
-	add	r0, r0, r3, lsl #2
-	bl	ftl_memcpy
-.L2024:
-	movs	r7, #0
-	movw	r10, #65535
-	movs	r0, #0
-	bl	FtlUpdateVaildLpn
-.L2025:
+	add	r3, r3, r2
+	ldrh	r2, [r7]
+	cmp	r3, r2
+	ble	.L1951
+	ldr	r1, .L2007+4
+	movw	r2, #3556
+	ldr	r0, .L2007+8
+	bl	printf
+	ldr	r1, .L2007+12
+	ldr	r0, .L2007+16
+	bl	printf
+.L1951:
+	ldr	r3, .L2007+20
+	add	lr, r4, #16
+	ldr	r2, .L2007+24
+	mov	r8, #0
+	ldr	ip, [r3]
+	ldrh	r0, [r2]
+	movs	r2, #36
+	mov	r3, ip
+	mla	r0, r2, r0, ip
+.L1952:
+	cmp	r0, r3
+	bne	.L1954
+	cbnz	r6, .L1955
+	ldr	r1, .L2007+4
+	movw	r2, #3571
+	ldr	r0, .L2007+8
+	bl	printf
+	ldr	r1, .L2007+12
+	ldr	r0, .L2007+16
+	bl	printf
+.L1955:
+	ldr	r3, .L2007+28
+	ldr	r8, .L2007+80
+	ldr	r3, [r3]
+	cbz	r3, .L1956
+	ldr	r3, .L2007+32
+	cmp	r4, r3
+	bne	.L1956
 	ldr	r3, [r8]
-	ldrh	r1, [r4, #2]
-	ldrh	r2, [r4]
-	str	r3, [r5, #8]
-	ldr	r3, [fp]
-	str	r3, [r5, #12]
-	orr	r3, r1, r2, lsl #10
-	str	r3, [r5, #4]
-	ldr	r3, .L2045+84
+	ldrh	r3, [r3, r5, lsl #1]
+	cmp	r3, #40
+	itt	hi
+	movhi	r3, #0
+	strbhi	r3, [r4, #8]
+.L1956:
+	ldr	r3, .L2007+36
 	ldrh	r3, [r3]
+	cmp	r3, r10
+	bne	.L1957
+	ldr	r1, .L2007+4
+	movw	r2, #3578
+	ldr	r0, .L2007+8
+	bl	printf
+	ldr	r1, .L2007+12
+	ldr	r0, .L2007+16
+	bl	printf
+.L1957:
+	ldrb	r2, [r4, #8]	@ zero_extendqisi2
+	ldr	r3, .L2007+40
+	ldr	fp, .L2007+84
+	cmp	r2, #0
+	bne	.L1958
+	ldr	r1, [r8]
+	ldrh	r2, [r1, r5, lsl #1]
+	cmp	r2, #0
+	beq	.L1959
+	ldr	r0, .L2007+44
+	ldrh	r0, [r0]
+	add	r2, r2, r0
+.L2002:
+	strh	r2, [r1, r5, lsl #1]	@ movhi
+	mov	r0, r10
+	ldr	r2, [r3]
+	movs	r1, #0
+	str	r3, [sp, #4]
+	adds	r2, r2, #1
+	str	r2, [r3]
+	bl	ftl_set_blk_mode
+.L2003:
+	ldr	r2, [r8]
+	ldr	r3, [sp, #4]
+	ldrh	r0, [r2, r5, lsl #1]
+	ldr	r2, .L2007+48
+	ldr	r1, [r2]
+	cmp	r0, r1
+	ldrh	r1, [r7]
+	it	hi
+	strhi	r0, [r2]
+	ldr	r2, .L2007+44
+	ldr	r0, [r3]
+	ldr	r3, [fp]
+	ldrh	r2, [r2]
+	ldr	r7, .L2007+52
+	mla	r0, r0, r2, r3
+	bl	__aeabi_uidiv
+	ldr	r3, .L2007+56
+	str	r0, [r3]
+	ldr	r3, .L2007+60
+	ldr	r2, [r3]
+	ldr	r3, [r2, #16]
+	adds	r3, r3, #1
+	str	r3, [r2, #16]
+	ldr	r3, .L2007+20
+	ldr	r0, [r3]
+	movs	r3, #36
+	adds	r1, r0, #4
+	mla	r3, r3, r6, r0
+	adds	r3, r3, #40
+.L1963:
+	adds	r1, r1, #36
+	cmp	r3, r1
+	bne	.L1964
+	ldr	r3, .L2007+64
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L1965
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	mov	r2, r6
+	cmp	r3, #1
+	ite	eq
+	moveq	r1, #0
+	movne	r1, #1
+	bl	FlashEraseBlocks
+.L1965:
+	ldr	r3, .L2007+20
+	movs	r7, #0
+	mov	r8, r7
+	mov	fp, #36
+	mov	r2, r6
+	ldrb	r1, [r4, #8]	@ zero_extendqisi2
+	ldr	r0, [r3]
+	bl	FlashEraseBlocks
+.L1967:
+	uxth	r3, r7
+	cmp	r6, r3
+	bhi	.L1969
+	cmp	r8, #0
+	beq	.L1970
+	mov	r0, r10
+	bl	update_multiplier_value
+	bl	FtlBbmTblFlush
+.L1970:
+	ldrb	r2, [r4, #7]	@ zero_extendqisi2
+	cmp	r2, #0
+	bne	.L1971
+	ldr	r3, .L2007+68
+	movw	r2, #65535
+	ldr	r3, [r3]
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	b	.L1941
+.L1954:
+	ldrh	r1, [lr], #2
+	movw	fp, #65535
+	str	r8, [r3, #8]
+	str	r8, [r3, #12]
+	cmp	r1, fp
+	beq	.L1953
+	mla	fp, r2, r6, ip
+	adds	r6, r6, #1
+	lsls	r1, r1, #10
+	uxth	r6, r6
+	str	r1, [fp, #4]
+.L1953:
+	adds	r3, r3, #36
+	b	.L1952
+.L1959:
+	movs	r2, #2
+	b	.L2002
+.L1958:
+	ldr	r1, [r8]
+	mov	r0, r10
+	str	r3, [sp, #4]
+	ldrh	r2, [r1, r5, lsl #1]
+	adds	r2, r2, #1
+	strh	r2, [r1, r5, lsl #1]	@ movhi
+	ldr	r2, [fp]
+	adds	r2, r2, #1
+	str	r2, [fp]
+	bl	ftl_set_blk_mode.part.11
+	b	.L2003
+.L1964:
+	ldr	r2, [r1, #-36]
+	ands	r2, r2, r7
+	str	r2, [r1, #-36]
+	b	.L1963
+.L1969:
+	ldr	r2, .L2007+20
+	mul	r3, fp, r7
+	ldr	r2, [r2]
+	adds	r1, r2, r3
+	ldr	r2, [r2, r3]
+	adds	r3, r2, #1
+	bne	.L1968
+	ldr	r0, [r1, #4]
+	add	r8, r8, #1
+	str	r2, [sp, #4]
+	ubfx	r0, r0, #10, #16
+	bl	FtlBbmMapBadBlock
+	ldr	r2, [sp, #4]
+	add	r3, r4, r7, lsl #1
+	strh	r2, [r3, #16]	@ movhi
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	subs	r3, r3, #1
-	cmp	r1, r3
-	blt	.L2026
-	movs	r3, #0
-	ldrh	r10, [r4, #4]
-	strh	r3, [r4, #2]	@ movhi
-	strh	r2, [r4, #4]	@ movhi
-	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L2045+40
-	ldr	r1, .L2045+40
-	strh	r0, [r4]	@ movhi
-	ldr	r3, [r3]
-	adds	r2, r3, #1
-	str	r3, [r4, #8]
-	str	r2, [r1]
-	lsls	r2, r0, #10
-	str	r2, [r5, #4]
-	str	r3, [r6, #4]
-	strh	r0, [r6, #2]	@ movhi
-.L2026:
-	ldr	r3, .L2045+88
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2027
-	ldr	r3, .L2045+56
-	ldr	r0, [r8]
-	ldrh	r1, [r3]
-	bl	js_hash
-	str	r0, [r6, #12]
-.L2027:
-	movs	r3, #1
-	ldr	r0, .L2045+8
-	mov	r2, r3
-	mov	r1, r3
-	bl	FlashProgPages
-	ldrh	r3, [r4, #2]
-	ldr	r2, [r5]
-	adds	r3, r3, #1
+	strb	r3, [r4, #7]
+.L1968:
+	adds	r7, r7, #1
+	b	.L1967
+.L1971:
+	ldr	r3, .L2007+72
+	ldr	r1, .L2007+76
+	ldrh	r3, [r3]
+	strh	r10, [r4]	@ movhi
+	smulbb	r3, r3, r2
+	movs	r2, #0
+	strh	r2, [r4, #2]	@ movhi
+	strb	r2, [r4, #6]
+	ldr	r2, [r1]
 	uxth	r3, r3
-	adds	r1, r2, #1
-	strh	r3, [r4, #2]	@ movhi
-	bne	.L2028
-	cmp	r3, #1
-	bne	.L2029
-	ldr	r1, .L2045+92
-	movw	r2, #1219
-	ldr	r0, .L2045+96
-	bl	printf
-	ldr	r1, .L2045+100
-	ldr	r0, .L2045+104
+	strh	r3, [r4, #4]	@ movhi
+	str	r2, [r4, #12]
+	adds	r2, r2, #1
+	str	r2, [r1]
+	ldr	r2, .L2007+68
+	ldr	r1, [sp]
+	ldr	r2, [r2]
+	strh	r3, [r2, r1]	@ movhi
+	ldrh	r3, [r4, #4]
+	cbz	r3, .L1972
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	cbnz	r3, .L1942
+.L1972:
+	ldr	r1, .L2007+4
+	movw	r2, #3642
+	ldr	r0, .L2007+8
 	bl	printf
-.L2029:
-	ldrh	r3, [r4, #2]
-	adds	r7, r7, #1
-	uxth	r7, r7
-	cmp	r3, #1
-	itttt	eq
-	ldreq	r3, .L2045+84
-	ldrheq	r3, [r3]
-	addeq	r3, r3, #-1
-	strheq	r3, [r4, #2]	@ movhi
-	cmp	r7, #3
-	bls	.L2025
-	mov	r2, r7
-	ldr	r1, [r5, #4]
-	ldr	r0, .L2045+108
+	ldr	r1, .L2007+12
+	ldr	r0, .L2007+16
 	bl	printf
-	ldr	r2, [sp, #4]
-	movs	r3, #1
-	str	r3, [r2]
-.L2023:
+.L1942:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2028:
-	cmp	r3, #1
-	beq	.L2025
-	cmp	r2, #256
-	beq	.L2025
-	movw	r3, #65535
-	cmp	r10, r3
-	beq	.L2023
-	movs	r1, #1
-	mov	r0, r10
-	bl	FtlFreeSysBlkQueueIn
-	b	.L2023
-.L2046:
+.L2008:
 	.align	2
-.L2045:
-	.word	.LANCHOR76
-	.word	.LANCHOR210
-	.word	.LANCHOR203
-	.word	.LANCHOR80
-	.word	1179929683
-	.word	.LANCHOR45
-	.word	.LANCHOR91
-	.word	.LANCHOR92
-	.word	.LANCHOR93
-	.word	.LANCHOR167
-	.word	.LANCHOR159
-	.word	.LANCHOR160
-	.word	.LANCHOR112
-	.word	.LANCHOR113
-	.word	.LANCHOR57
-	.word	.LANCHOR40
-	.word	.LANCHOR83
-	.word	.LANCHOR1
-	.word	.LANCHOR69
-	.word	.LANCHOR66
-	.word	.LANCHOR131
-	.word	.LANCHOR53
-	.word	.LANCHOR2
-	.word	.LANCHOR211
+.L2007:
+	.word	.LANCHOR90
+	.word	.LANCHOR212
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC38
-	.word	.LANCHOR183
-	.word	.LANCHOR188
-	.word	1342177367
-	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
-	.section	.text.FtlSuperblockPowerLostFix,"ax",%progbits
+	.word	.LANCHOR79
+	.word	.LANCHOR38
+	.word	.LANCHOR104
+	.word	.LANCHOR93
+	.word	.LANCHOR213
+	.word	.LANCHOR172
+	.word	.LANCHOR48
+	.word	.LANCHOR174
+	.word	-1024
+	.word	.LANCHOR214
+	.word	.LANCHOR199
+	.word	.LANCHOR16
+	.word	.LANCHOR85
+	.word	.LANCHOR52
+	.word	.LANCHOR164
+	.word	.LANCHOR80
+	.word	.LANCHOR173
+	.size	allocate_data_superblock, .-allocate_data_superblock
+	.section	.text.FtlGcFreeBadSuperBlk,"ax",%progbits
 	.align	1
-	.global	FtlSuperblockPowerLostFix
+	.global	FtlGcFreeBadSuperBlk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlSuperblockPowerLostFix, %function
-FtlSuperblockPowerLostFix:
-	@ args = 0, pretend = 0, frame = 40
+	.type	FtlGcFreeBadSuperBlk, %function
+FtlGcFreeBadSuperBlk:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2062
-	push	{r4, r5, r6, r7, r8, r10, lr}
-	mov	r4, r0
-	sub	sp, sp, #44
-	ldr	r8, [r3]
-	cmp	r8, #0
-	bne	.L2047
-	ldr	r3, .L2062+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #0
-	beq	.L2058
-	ldrb	r3, [r0, #8]	@ zero_extendqisi2
-	cmp	r3, #1
-	bne	.L2058
-	ldrh	r6, [r0, #4]
-	mov	r8, r3
-.L2049:
-	mov	r3, #-1
-	ldr	r2, .L2062+8
-	str	r3, [sp, #20]
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r10, r0
+	ldr	r4, .L2021
+	ldrh	r3, [r4]
+	cbz	r3, .L2010
+	ldr	r8, .L2021+12
 	movs	r7, #0
-	ldr	r3, .L2062+12
-	ldr	r5, [r2]
-	mvn	r2, #2
-	ldr	r10, .L2062+24
-	ldr	r3, [r3]
-	str	r5, [sp, #16]
-	str	r3, [sp, #12]
-	str	r2, [r5, #8]
-	mvn	r2, #1
-	str	r2, [r5, #12]
-	ldrh	r2, [r4]
-	strh	r7, [r5]	@ movhi
-	strh	r2, [r5, #2]	@ movhi
-	movw	r2, #61589
-	str	r2, [r3]
-	add	r2, r2, #304087040
-	add	r2, r2, #1269760
-	addw	r2, r2, #1507
-	str	r2, [r3, #4]
-.L2050:
-	adds	r6, r6, #-1
-	bcc	.L2053
-	ldrh	r3, [r4, #4]
-	cbnz	r3, .L2051
-.L2053:
-	ldr	r3, .L2062+16
-	ldrh	r1, [r4]
-	ldrh	r0, [r4, #4]
-	ldr	r2, [r3]
-	ldrh	r3, [r2, r1, lsl #1]
-	subs	r3, r3, r0
-	strh	r3, [r2, r1, lsl #1]	@ movhi
-	ldr	r3, .L2062+20
-	ldrh	r3, [r3]
-	strh	r3, [r4, #2]	@ movhi
-	movs	r3, #0
-	strb	r3, [r4, #6]
-	strh	r3, [r4, #4]	@ movhi
-.L2047:
-	add	sp, sp, #44
+.L2011:
+	ldr	r3, .L2021+4
+	ldrh	r2, [r3]
+	uxth	r3, r7
+	cmp	r2, r3
+	bhi	.L2017
+	bl	FtlGcReFreshBadBlk
+.L2010:
+	movs	r0, #0
+	add	sp, sp, #8
 	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L2058:
-	movs	r6, #12
-	b	.L2049
-.L2051:
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2017:
+	ldr	r2, .L2021+8
+	uxth	r3, r7
+	mov	r1, r10
+	mov	fp, #0
+	ldrb	r0, [r2, r3]	@ zero_extendqisi2
+	bl	V2P_block
+	mov	r1, r0
+.L2012:
+	ldrh	r3, [r4]
+	uxth	r5, fp
+	cmp	r3, r5
+	bhi	.L2016
+	adds	r7, r7, #1
+	b	.L2011
+.L2016:
+	uxth	r6, fp
+	ldrh	r3, [r8, r6, lsl #1]
+	cmp	r3, r1
+	bne	.L2013
+	mov	r0, r1
+	str	r1, [sp, #4]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	ldrh	r2, [r4]
+	add	r3, r8, r6, lsl #1
+	ldr	r1, [sp, #4]
+.L2014:
+	cmp	r5, r2
+	bcc	.L2015
+	subs	r2, r2, #1
+	strh	r2, [r4]	@ movhi
+.L2013:
+	add	fp, fp, #1
+	b	.L2012
+.L2015:
+	ldrh	r0, [r3, #2]!
+	adds	r5, r5, #1
+	uxth	r5, r5
+	strh	r0, [r3, #-2]	@ movhi
+	b	.L2014
+.L2022:
+	.align	2
+.L2021:
+	.word	.LANCHOR119
+	.word	.LANCHOR38
+	.word	.LANCHOR47
+	.word	.LANCHOR120
+	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
+	.section	.text.update_vpc_list,"ax",%progbits
+	.align	1
+	.global	update_vpc_list
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	update_vpc_list, %function
+update_vpc_list:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	mov	r4, r0
+	ldr	r3, .L2033
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r0, lsl #1]
+	cmp	r3, #0
+	bne	.L2024
+	ldr	r2, .L2033+4
+	ldrh	r1, [r2]
+	cmp	r1, r0
+	bne	.L2025
+	movw	r3, #65535
+	strh	r3, [r2]	@ movhi
+.L2026:
+	ldr	r5, .L2033+8
+	mov	r1, r4
+	ldr	r0, .L2033+12
+	bl	List_remove_node
+	ldrh	r3, [r5]
+	cbnz	r3, .L2028
+	ldr	r1, .L2033+16
+	movw	r2, #3767
+	ldr	r0, .L2033+20
+	bl	printf
+	ldr	r1, .L2033+24
+	ldr	r0, .L2033+28
+	bl	printf
+.L2028:
+	ldrh	r3, [r5]
 	mov	r0, r4
-	bl	get_new_active_ppa
-	str	r0, [sp, #8]
-	adds	r0, r0, #1
-	beq	.L2053
-	ldr	r3, [r10]
-	movs	r1, #1
-	add	r0, sp, #4
-	str	r3, [r5, #4]
-	adds	r3, r3, #1
-	adds	r2, r3, #1
-	mov	r2, r8
-	it	eq
-	moveq	r3, r7
-	str	r3, [r10]
+	subs	r3, r3, #1
+	strh	r3, [r5]	@ movhi
+	bl	free_data_superblock
+	mov	r0, r4
+	bl	FtlGcFreeBadSuperBlk
+	ldr	r3, .L2033+32
+	ldrh	r2, [r5]
+	ldrh	r3, [r3]
+	add	r3, r3, r2
+	ldr	r2, .L2033+36
+	ldrh	r2, [r2]
+	cmp	r3, r2
+	ble	.L2032
+	ldr	r1, .L2033+16
+	movw	r2, #3770
+	ldr	r0, .L2033+20
+	bl	printf
+	ldr	r1, .L2033+24
+	ldr	r0, .L2033+28
+	bl	printf
+.L2032:
+	movs	r3, #1
+	b	.L2023
+.L2025:
+	ldr	r2, .L2033+40
+	ldrh	r2, [r2]
+	cmp	r2, r0
+	beq	.L2023
+	ldr	r2, .L2033+44
+	ldrh	r2, [r2]
+	cmp	r2, r0
+	beq	.L2023
+	ldr	r2, .L2033+48
+	ldrh	r2, [r2]
+	cmp	r2, r0
+	bne	.L2026
+.L2023:
+	mov	r0, r3
+	pop	{r3, r4, r5, pc}
+.L2024:
+	bl	List_update_data_list
 	movs	r3, #0
-	bl	FlashProgPages
-	ldrh	r0, [r4]
-	bl	decrement_vpc_count
-	b	.L2050
-.L2063:
+	b	.L2023
+.L2034:
 	.align	2
-.L2062:
-	.word	.LANCHOR76
-	.word	.LANCHOR15
-	.word	.LANCHOR188
-	.word	.LANCHOR183
-	.word	.LANCHOR83
-	.word	.LANCHOR52
-	.word	.LANCHOR160
-	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
-	.section	.text.FtlLoadFactoryBbt,"ax",%progbits
+.L2033:
+	.word	.LANCHOR85
+	.word	.LANCHOR213
+	.word	.LANCHOR87
+	.word	.LANCHOR84
+	.word	.LANCHOR215
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LANCHOR90
+	.word	.LANCHOR40
+	.word	.LANCHOR93
+	.word	.LANCHOR94
+	.word	.LANCHOR95
+	.size	update_vpc_list, .-update_vpc_list
+	.section	.text.decrement_vpc_count,"ax",%progbits
 	.align	1
-	.global	FtlLoadFactoryBbt
+	.global	decrement_vpc_count
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlLoadFactoryBbt, %function
-FtlLoadFactoryBbt:
+	.type	decrement_vpc_count, %function
+decrement_vpc_count:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2074
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r6, #0
-	ldr	r5, .L2074+4
-	ldr	r3, [r3]
-	ldr	r7, .L2074+8
-	ldr	r10, .L2074+20
-	str	r3, [r5, #8]
-	ldr	r3, .L2074+12
-	ldr	r8, [r3]
-	str	r8, [r5, #12]
-.L2065:
-	ldr	r3, .L2074+16
-	ldrh	r3, [r3]
-	cmp	r6, r3
-	bcc	.L2070
-	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2070:
-	ldrh	r4, [r10]
 	movw	r3, #65535
-	ldr	fp, .L2074+4
-	strh	r3, [r7, #2]!	@ movhi
-	subs	r4, r4, #1
-	uxth	r4, r4
-.L2066:
-	ldrh	r3, [r10]
-	sub	r2, r3, #15
-	cmp	r2, r4
-	bgt	.L2068
-	mla	r3, r6, r3, r4
-	movs	r2, #1
-	mov	r1, r2
-	mov	r0, fp
-	lsls	r3, r3, #10
-	str	r3, [r5, #4]
-	bl	FlashReadPages
+	push	{r4, r5, r6, lr}
+	cmp	r0, r3
+	mov	r4, r0
+	beq	.L2036
+	ldr	r5, .L2047
 	ldr	r3, [r5]
-	adds	r3, r3, #1
-	beq	.L2067
-	ldrh	r2, [r8]
-	movw	r3, #61664
-	cmp	r2, r3
-	bne	.L2067
-	strh	r4, [r7]	@ movhi
-.L2068:
-	adds	r6, r6, #1
-	b	.L2065
-.L2067:
-	subs	r4, r4, #1
-	uxth	r4, r4
-	b	.L2066
-.L2075:
+	ldrh	r2, [r3, r0, lsl #1]
+	cmp	r2, #0
+	bne	.L2037
+	mov	r1, r0
+	ldr	r0, .L2047+4
+	bl	printf
+	ldr	r3, [r5]
+	ldrh	r3, [r3, r4, lsl #1]
+	cbnz	r3, .L2038
+	ldr	r1, .L2047+8
+	movw	r2, #3786
+	ldr	r0, .L2047+12
+	bl	printf
+	ldr	r1, .L2047+16
+	ldr	r0, .L2047+20
+	bl	printf
+.L2038:
+	ldr	r3, [r5]
+	movs	r2, #32
+	mov	r1, r4
+	ldr	r0, .L2047+24
+	strh	r2, [r3, r4, lsl #1]	@ movhi
+	bl	test_node_in_list
+	cbz	r0, .L2039
+	ldr	r6, .L2047+28
+	mov	r1, r4
+	ldr	r0, .L2047+24
+	bl	List_remove_node
+	ldrh	r3, [r6]
+	cbnz	r3, .L2040
+	ldr	r1, .L2047+8
+	mov	r2, #3792
+	ldr	r0, .L2047+12
+	bl	printf
+	ldr	r1, .L2047+16
+	ldr	r0, .L2047+20
+	bl	printf
+.L2040:
+	ldrh	r3, [r6]
+	mov	r0, r4
+	subs	r3, r3, #1
+	strh	r3, [r6]	@ movhi
+	bl	INSERT_DATA_LIST
+	ldr	r3, [r5]
+	mov	r1, r4
+	ldr	r0, .L2047+32
+	ldrh	r2, [r3, r4, lsl #1]
+	bl	printf
+.L2039:
+	mov	r0, r4
+	bl	FtlGcRefreshBlock
+.L2043:
+	movs	r5, #0
+	b	.L2035
+.L2037:
+	subs	r2, r2, #1
+	strh	r2, [r3, r0, lsl #1]	@ movhi
+.L2036:
+	ldr	r6, .L2047+36
+	movw	r3, #65535
+	ldrh	r0, [r6]
+	cmp	r0, r3
+	bne	.L2042
+	strh	r4, [r6]	@ movhi
+	b	.L2043
+.L2042:
+	cmp	r4, r0
+	beq	.L2043
+	bl	update_vpc_list
+	ldr	r3, .L2047+40
+	adds	r5, r0, #0
+	ldr	r2, .L2047+44
+	it	ne
+	movne	r5, #1
+	strh	r4, [r6]	@ movhi
+	ldr	r3, [r3]
+	ldr	r2, [r2]
+	subs	r3, r3, r2
+	asrs	r2, r3, #1
+	ldr	r3, .L2047+48
+	muls	r3, r2, r3
+	ldr	r2, .L2047
+	ldr	r2, [r2]
+	uxth	r1, r3
+	ldrh	r2, [r2, r1, lsl #1]
+	cbnz	r2, .L2035
+	cmp	r4, r1
+	beq	.L2035
+	ldr	r1, .L2047+8
+	movw	r2, #3816
+	ldr	r0, .L2047+12
+	bl	printf
+	ldr	r1, .L2047+16
+	ldr	r0, .L2047+20
+	bl	printf
+.L2035:
+	mov	r0, r5
+	pop	{r4, r5, r6, pc}
+.L2048:
 	.align	2
-.L2074:
-	.word	.LANCHOR183
-	.word	.LANCHOR203
-	.word	.LANCHOR74+10
-	.word	.LANCHOR188
-	.word	.LANCHOR45
-	.word	.LANCHOR51
-	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
-	.section	.text.FtlGetLastWrittenPage,"ax",%progbits
+.L2047:
+	.word	.LANCHOR85
+	.word	.LC38
+	.word	.LANCHOR216
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LANCHOR89
+	.word	.LANCHOR90
+	.word	.LC39
+	.word	.LANCHOR136
+	.word	.LANCHOR84
+	.word	.LANCHOR83
+	.word	-1431655765
+	.size	decrement_vpc_count, .-decrement_vpc_count
+	.section	.text.FtlSlcSuperblockCheck,"ax",%progbits
 	.align	1
-	.global	FtlGetLastWrittenPage
+	.global	FtlSlcSuperblockCheck
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlGetLastWrittenPage, %function
-FtlGetLastWrittenPage:
-	@ args = 0, pretend = 0, frame = 104
+	.type	FtlSlcSuperblockCheck, %function
+FtlSlcSuperblockCheck:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	cmp	r1, #1
-	push	{r4, r5, r6, r7, r8, lr}
-	it	eq
-	ldreq	r3, .L2088
-	sub	sp, sp, #104
-	lsl	r7, r0, #10
-	mov	r2, r1
-	it	ne
-	ldrne	r3, .L2088+4
-	mov	r8, r1
-	movs	r6, #0
-	movs	r1, #1
-	add	r0, sp, #4
-	ldrh	r5, [r3]
-	add	r3, sp, #40
-	str	r3, [sp, #16]
-	str	r6, [sp, #12]
-	subs	r5, r5, #1
-	sxth	r5, r5
-	orr	r3, r5, r7
-	str	r3, [sp, #8]
-	bl	FlashReadPages
-	ldr	r3, [sp, #40]
-	adds	r3, r3, #1
-	bne	.L2079
-.L2080:
-	cmp	r6, r5
-	ble	.L2083
-.L2079:
-	mov	r0, r5
-	add	sp, sp, #104
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, pc}
-.L2083:
-	adds	r3, r6, r5
-	mov	r2, r8
-	add	r3, r3, r3, lsr #31
-	movs	r1, #1
-	add	r0, sp, #4
-	asrs	r4, r3, #1
-	sxth	r3, r4
-	orrs	r3, r3, r7
-	str	r3, [sp, #8]
-	bl	FlashReadPages
-	ldr	r3, [sp, #40]
+	ldrh	r3, [r0, #4]
+	push	{r4, r5, r6, lr}
+	mov	r4, r0
+	cmp	r3, #0
+	beq	.L2049
+	ldrh	r2, [r0]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L2049
+	ldrb	r3, [r0, #6]	@ zero_extendqisi2
+	ldr	r5, .L2060
+	ldr	r6, .L2060+4
+	adds	r3, r3, #8
+	ldrh	r3, [r0, r3, lsl #1]
+.L2053:
+	movw	r2, #65535
+	cmp	r3, r2
+	beq	.L2055
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	cmp	r3, #1
+	bne	.L2056
+	ldrb	r1, [r5]	@ zero_extendqisi2
+	cbnz	r1, .L2056
+	ldrh	r1, [r4, #2]
+	ldrh	r1, [r6, r1, lsl #1]
+	cmp	r1, r2
+	bne	.L2056
+	ldrh	r3, [r4, #4]
+	ldrh	r0, [r4]
+	subs	r3, r3, #1
+	strh	r3, [r4, #4]	@ movhi
+	bl	decrement_vpc_count
+	ldrh	r2, [r4, #4]
+	cbnz	r2, .L2055
+	ldrh	r3, [r4, #2]
+	strb	r2, [r4, #6]
 	adds	r3, r3, #1
-	bne	.L2081
-	ldr	r3, [sp, #44]
+	strh	r3, [r4, #2]	@ movhi
+	pop	{r4, r5, r6, pc}
+.L2055:
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	ldr	r2, .L2060+8
 	adds	r3, r3, #1
-	bne	.L2081
-	ldr	r3, [sp, #4]
+	ldrh	r2, [r2]
+	uxtb	r3, r3
+	strb	r3, [r4, #6]
+	cmp	r2, r3
+	bne	.L2054
+	ldrh	r3, [r4, #2]
 	adds	r3, r3, #1
-	beq	.L2081
-	subs	r4, r4, #1
-	sxth	r5, r4
-	b	.L2080
-.L2081:
-	adds	r4, r4, #1
-	sxth	r6, r4
-	b	.L2080
-.L2089:
+	strh	r3, [r4, #2]	@ movhi
+	movs	r3, #0
+	strb	r3, [r4, #6]
+.L2054:
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	adds	r3, r3, #8
+	ldrh	r3, [r4, r3, lsl #1]
+	b	.L2053
+.L2056:
+	ldrb	r2, [r5]	@ zero_extendqisi2
+	cbz	r2, .L2049
+	cmp	r3, #1
+	bne	.L2049
+	ldr	r3, .L2060+12
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L2049
+	ldr	r3, .L2060+16
+	ldrh	r1, [r4]
+	ldrh	r0, [r4, #4]
+	ldr	r2, [r3]
+	ldrh	r3, [r2, r1, lsl #1]
+	subs	r3, r3, r0
+	strh	r3, [r2, r1, lsl #1]	@ movhi
+	movs	r3, #0
+	ldr	r2, .L2060+20
+	strh	r3, [r4, #4]	@ movhi
+	strb	r3, [r4, #6]
+	ldrh	r2, [r2]
+	strh	r2, [r4, #2]	@ movhi
+.L2049:
+	pop	{r4, r5, r6, pc}
+.L2061:
 	.align	2
-.L2088:
+.L2060:
+	.word	.LANCHOR16
+	.word	.LANCHOR123
+	.word	.LANCHOR38
 	.word	.LANCHOR53
+	.word	.LANCHOR85
 	.word	.LANCHOR52
-	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
-	.section	.text.FtlLoadBbt,"ax",%progbits
+	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
+	.section	.text.get_new_active_ppa,"ax",%progbits
 	.align	1
-	.global	FtlLoadBbt
+	.global	get_new_active_ppa
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlLoadBbt, %function
-FtlLoadBbt:
+	.type	get_new_active_ppa, %function
+get_new_active_ppa:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	ldr	r8, .L2119+48
-	ldr	r4, .L2119
-	ldr	r3, [r8]
-	ldr	r7, .L2119+4
-	mov	r10, r4
-	str	r3, [r4, #8]
-	ldr	r3, .L2119+8
-	ldr	r6, [r3]
-	str	r6, [r4, #12]
-	bl	FtlBbtMemInit
-	ldrh	r5, [r7]
-	subs	r5, r5, #1
-	uxth	r5, r5
-.L2091:
-	ldrh	r3, [r7]
-	subs	r3, r3, #47
-	cmp	r3, r5
-	bgt	.L2094
-	lsls	r3, r5, #10
-	movs	r2, #1
-	mov	r1, r2
-	mov	r0, r10
-	str	r3, [r4, #4]
-	bl	FlashReadPages
-	ldr	r3, [r4]
-	adds	r3, r3, #1
-	bne	.L2092
-	ldr	r3, [r4, #4]
-	movs	r2, #1
-	mov	r1, r2
-	mov	r0, r10
-	adds	r3, r3, #1
-	str	r3, [r4, #4]
-	bl	FlashReadPages
-.L2092:
-	ldr	r3, [r4]
-	adds	r3, r3, #1
-	beq	.L2093
-	ldrh	r2, [r6]
-	movw	r3, #61649
+	ldrh	r2, [r0]
+	movw	r3, #65535
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r4, r0
 	cmp	r2, r3
-	bne	.L2093
-	ldr	r3, .L2119+12
-	ldr	r2, [r6, #4]
-	strh	r5, [r3]	@ movhi
-	str	r2, [r3, #8]
-	ldrh	r2, [r6, #8]
-	strh	r2, [r3, #4]	@ movhi
-.L2094:
-	ldr	r5, .L2119+12
-	movw	r2, #65535
+	bne	.L2063
+	ldr	r1, .L2084
+	movw	r2, #3700
+	ldr	r0, .L2084+4
+	bl	printf
+	ldr	r1, .L2084+8
+	ldr	r0, .L2084+12
+	bl	printf
+.L2063:
+	ldr	r5, .L2084+16
+	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5]
-	cmp	r3, r2
-	beq	.L2108
-	ldrh	r3, [r5, #4]
-	cmp	r3, r2
-	beq	.L2098
-	lsls	r3, r3, #10
-	movs	r2, #1
-	mov	r1, r2
-	ldr	r0, .L2119
-	str	r3, [r4, #4]
-	bl	FlashReadPages
-	ldr	r3, [r4]
-	adds	r3, r3, #1
-	beq	.L2098
-	ldrh	r2, [r6]
-	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L2098
-	ldr	r3, [r6, #4]
-	ldr	r2, [r5, #8]
-	cmp	r3, r2
-	bls	.L2098
-	ldrh	r2, [r5, #4]
-	str	r3, [r5, #8]
-	ldrh	r3, [r6, #8]
-	strh	r2, [r5]	@ movhi
-	strh	r3, [r5, #4]	@ movhi
-.L2098:
-	ldr	r10, .L2119
-	movs	r1, #1
-	ldrh	r0, [r5]
-	bl	FtlGetLastWrittenPage
-	sxth	r7, r0
-	adds	r0, r0, #1
-	strh	r0, [r5, #2]	@ movhi
-.L2100:
-	cmp	r7, #0
-	bge	.L2103
-	ldr	r1, .L2119+16
-	mov	r2, #334
-	ldr	r0, .L2119+20
+	bne	.L2064
+	ldr	r1, .L2084
+	movw	r2, #3701
+	ldr	r0, .L2084+4
 	bl	printf
-	ldr	r1, .L2119+24
-	ldr	r0, .L2119+28
+	ldr	r1, .L2084+8
+	ldr	r0, .L2084+12
 	bl	printf
-.L2102:
-	ldrh	r3, [r6, #10]
-	ldrh	r0, [r6, #12]
-	strh	r3, [r5, #6]	@ movhi
-	movw	r3, #65535
-	cmp	r0, r3
-	beq	.L2105
-	ldr	r3, .L2119+32
-	ldr	r2, [r3]
-	cmp	r0, r2
-	beq	.L2105
-	ldr	r3, .L2119+36
-	ldrh	r3, [r3]
-	lsrs	r3, r3, #2
+.L2064:
+	ldrh	r3, [r4, #4]
+	cbnz	r3, .L2065
+	ldr	r1, .L2084
+	movw	r2, #3702
+	ldr	r0, .L2084+4
+	bl	printf
+	ldr	r1, .L2084+8
+	ldr	r0, .L2084+12
+	bl	printf
+.L2065:
+	movs	r3, #0
+	ldr	r7, .L2084+20
+	strb	r3, [r4, #10]
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	ldr	r6, .L2084+24
+	adds	r3, r3, #8
+	ldrh	r2, [r4, r3, lsl #1]
+.L2066:
+	movw	r0, #65535
+	cmp	r2, r0
+	beq	.L2067
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	ldrh	r1, [r4, #2]
+	cmp	r3, #1
+	ldrh	r3, [r4, #4]
+	bne	.L2069
+	ldrb	ip, [r6]	@ zero_extendqisi2
+	cmp	ip, #0
+	bne	.L2069
+	ldr	ip, .L2084+28
+	ldrh	ip, [ip, r1, lsl #1]
+	cmp	ip, r0
+	bne	.L2069
+	subs	r3, r3, #1
+	ldrh	r0, [r4]
+	strh	r3, [r4, #4]	@ movhi
+	bl	decrement_vpc_count
+.L2067:
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	ldrh	r2, [r7]
+	adds	r3, r3, #1
+	uxtb	r3, r3
 	cmp	r2, r3
-	bcs	.L2105
-	cmp	r0, r3
-	bcs	.L2105
-	bl	FtlSysBlkNumInit
-.L2105:
-	ldr	r6, .L2119+40
-	movs	r5, #0
-	ldr	r7, .L2119+44
-	ldr	r8, .L2119+52
-.L2106:
-	ldrh	r3, [r7]
-	cmp	r5, r3
-	bcc	.L2107
-	movs	r0, #0
-	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L2093:
-	subs	r5, r5, #1
-	uxth	r5, r5
-	b	.L2091
-.L2103:
+	strb	r3, [r4, #6]
+	bne	.L2068
+	ldrh	r3, [r4, #2]
+	adds	r3, r3, #1
+	strh	r3, [r4, #2]	@ movhi
+	movs	r3, #0
+	strb	r3, [r4, #6]
+.L2068:
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	adds	r3, r3, #8
+	ldrh	r2, [r4, r3, lsl #1]
+	b	.L2066
+.L2069:
+	ldr	r8, .L2084+24
+	orr	r6, r1, r2, lsl #10
+	subs	r3, r3, #1
+	strh	r3, [r4, #4]	@ movhi
+.L2070:
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	movw	r2, #65535
+	ldrh	r0, [r7]
+.L2072:
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	cmp	r3, r0
+	itttt	eq
+	ldrheq	r3, [r4, #2]
+	addeq	r3, r3, #1
+	strheq	r3, [r4, #2]	@ movhi
+	moveq	r3, #0
+	add	r1, r3, #8
+	ldrh	r1, [r4, r1, lsl #1]
+	cmp	r1, r2
+	beq	.L2072
+	strb	r3, [r4, #6]
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	cmp	r3, #1
+	bne	.L2073
+	ldrb	r1, [r8]	@ zero_extendqisi2
+	ldrh	r3, [r4, #2]
+	cbnz	r1, .L2074
+	ldr	r1, .L2084+28
+	ldrh	r3, [r1, r3, lsl #1]
+	cmp	r3, r2
+	bne	.L2073
+	ldrh	r3, [r4, #4]
+	cbz	r3, .L2073
+	subs	r3, r3, #1
+	ldrh	r0, [r4]
+	strh	r3, [r4, #4]	@ movhi
+	bl	decrement_vpc_count
+	b	.L2070
+.L2074:
+	ldr	r2, .L2084+32
+	ldrh	r2, [r2]
+	cmp	r3, r2
+	bcc	.L2073
+	ldr	r3, .L2084+36
+	ldrh	r1, [r4]
+	ldrh	r0, [r4, #4]
+	ldr	r2, [r3]
+	ldrh	r3, [r2, r1, lsl #1]
+	subs	r3, r3, r0
+	strh	r3, [r2, r1, lsl #1]	@ movhi
+	movs	r3, #0
+	ldrh	r2, [r5]
+	strh	r3, [r4, #4]	@ movhi
+	strb	r3, [r4, #6]
+	strh	r2, [r4, #2]	@ movhi
+.L2073:
+	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5]
-	movs	r2, #1
-	mov	r1, r2
-	mov	r0, r10
-	orr	r3, r7, r3, lsl #10
-	str	r3, [r4, #4]
-	ldr	r3, [r8]
-	str	r3, [r4, #8]
-	bl	FlashReadPages
-	ldr	r3, [r4]
-	adds	r3, r3, #1
-	beq	.L2101
-	ldrh	r2, [r6]
-	movw	r3, #61649
 	cmp	r2, r3
-	beq	.L2102
-.L2101:
-	subs	r7, r7, #1
-	sxth	r7, r7
-	b	.L2100
-.L2107:
-	ldrh	r2, [r8]
-	ldr	r1, [r4, #8]
-	ldr	r0, [r6, #4]!
-	lsls	r2, r2, #2
-	mla	r1, r5, r2, r1
-	adds	r5, r5, #1
-	bl	ftl_memcpy
-	b	.L2106
-.L2108:
-	mov	r0, #-1
-	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L2120:
+	bne	.L2062
+	ldrh	r3, [r4, #4]
+	cbz	r3, .L2062
+	ldr	r1, .L2084
+	movw	r2, #3752
+	ldr	r0, .L2084+4
+	bl	printf
+	ldr	r1, .L2084+8
+	ldr	r0, .L2084+12
+	bl	printf
+.L2062:
+	mov	r0, r6
+	pop	{r4, r5, r6, r7, r8, pc}
+.L2085:
 	.align	2
-.L2119:
-	.word	.LANCHOR203
-	.word	.LANCHOR51
-	.word	.LANCHOR188
-	.word	.LANCHOR74
-	.word	.LANCHOR212
+.L2084:
+	.word	.LANCHOR217
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LANCHOR37
-	.word	.LANCHOR41
-	.word	.LANCHOR74+24
-	.word	.LANCHOR45
-	.word	.LANCHOR183
+	.word	.LANCHOR52
+	.word	.LANCHOR38
+	.word	.LANCHOR16
 	.word	.LANCHOR123
-	.size	FtlLoadBbt, .-FtlLoadBbt
-	.section	.text.ftl_map_blk_gc,"ax",%progbits
+	.word	.LANCHOR53
+	.word	.LANCHOR85
+	.size	get_new_active_ppa, .-get_new_active_ppa
+	.section	.text.FtlVpcTblFlush,"ax",%progbits
 	.align	1
-	.global	ftl_map_blk_gc
+	.global	FtlVpcTblFlush
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_map_blk_gc, %function
-ftl_map_blk_gc:
+	.type	FtlVpcTblFlush, %function
+FtlVpcTblFlush:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, [r0, #24]
+	ldr	r2, .L2110
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r4, r0
-	ldr	r5, [r0, #12]
-	str	r3, [sp]
-	bl	ftl_free_no_use_map_blk
-	ldrh	r3, [r4, #10]
-	ldrh	r2, [r4, #8]
-	subs	r3, r3, #4
-	cmp	r2, r3
-	blt	.L2122
-	uxth	r0, r0
-	ldrh	r8, [r5, r0, lsl #1]
-	cmp	r8, #0
-	beq	.L2122
-	ldr	r3, [r4, #32]
-	cbnz	r3, .L2122
-	movs	r2, #1
-	str	r2, [r4, #32]
-	strh	r3, [r5, r0, lsl #1]	@ movhi
-	ldrh	r3, [r4, #8]
-	ldrh	r2, [r4, #2]
-	subs	r3, r3, #1
-	strh	r3, [r4, #8]	@ movhi
-	ldr	r3, .L2134
-	ldrh	r3, [r3]
-	cmp	r2, r3
-	bcc	.L2123
-	mov	r0, r4
-	bl	ftl_map_blk_alloc_new_blk
-.L2123:
-	ldr	r5, .L2134+4
-	movs	r6, #0
-.L2124:
+	ldr	r3, [r2]
+	str	r2, [sp, #4]
+	cmp	r3, #0
+	bne	.L2088
+	ldr	r4, .L2110+4
+	ldr	r8, .L2110+112
+	ldr	fp, .L2110+116
+	ldr	r5, .L2110+8
+	ldr	r0, [r8]
+	ldr	r6, [fp]
+	ldrh	r2, [r4]
+	str	r0, [r5, #8]
+	str	r6, [r5, #12]
+	strh	r2, [r6, #2]	@ movhi
+	movw	r2, #61604
+	ldr	r7, .L2110+12
+	strh	r2, [r6]	@ movhi
+	str	r3, [r6, #12]
+	ldr	ip, .L2110+120
+	ldr	r2, [r4, #8]
+	str	r3, [r6, #8]
+	ldr	r3, .L2110+16
+	str	r2, [r6, #4]
+	stm	r7, {r3, ip}
 	ldrh	r3, [r4, #6]
-	uxth	r10, r6
-	cmp	r3, r10
-	bhi	.L2130
-	movs	r1, #1
-	mov	r0, r8
-	bl	FtlFreeSysBlkQueueIn
-	movs	r3, #0
-	str	r3, [r4, #32]
-.L2122:
-	ldr	r3, .L2134
-	ldrh	r2, [r4, #2]
+	strh	r3, [r7, #8]	@ movhi
+	ldr	r3, .L2110+20
 	ldrh	r3, [r3]
-	cmp	r2, r3
-	bcc	.L2128
-	mov	r0, r4
-	bl	ftl_map_blk_alloc_new_blk
-	b	.L2128
-.L2130:
-	ldr	r3, [sp]
-	uxth	fp, r6
-	add	r3, r3, fp, lsl #2
-	str	r3, [sp, #4]
-	ldr	r3, [sp]
-	ldr	r2, [r3, fp, lsl #2]
-	cmp	r8, r2, lsr #10
-	bne	.L2125
-	ldr	r3, .L2134+8
-	str	r2, [r5, #4]
-	movs	r2, #1
-	ldr	r0, .L2134+4
+	strb	r3, [r7, #10]
+	ldr	r3, .L2110+24
+	ldrh	r2, [r3]
+	ldrh	r1, [r3, #2]
+	strh	r2, [r7, #14]	@ movhi
+	ldrb	r2, [r3, #6]	@ zero_extendqisi2
+	ldrb	r3, [r3, #8]	@ zero_extendqisi2
+	strb	r3, [r7, #11]
+	orr	r2, r2, r1, lsl #6
+	ldr	r3, .L2110+28
+	strh	r2, [r7, #16]	@ movhi
+	ldrh	r2, [r3]
+	ldrh	r1, [r3, #2]
+	strh	r2, [r7, #18]	@ movhi
+	ldrb	r2, [r3, #6]	@ zero_extendqisi2
+	ldrb	r3, [r3, #8]	@ zero_extendqisi2
+	strb	r3, [r7, #12]
+	orr	r2, r2, r1, lsl #6
+	ldr	r3, .L2110+32
+	strh	r2, [r7, #20]	@ movhi
+	ldrh	r2, [r3]
+	strh	r2, [r7, #22]	@ movhi
+	ldrh	r1, [r3, #2]
+	ldrb	r2, [r3, #6]	@ zero_extendqisi2
+	ldrb	r3, [r3, #8]	@ zero_extendqisi2
+	strb	r3, [r7, #13]
+	orr	r2, r2, r1, lsl #6
+	ldr	r3, .L2110+36
+	movs	r1, #255
+	strh	r2, [r7, #24]	@ movhi
+	ldr	r3, [r3]
+	str	r3, [r7, #32]
+	ldr	r3, .L2110+40
+	ldr	r3, [r3]
+	str	r3, [r7, #40]
+	ldr	r3, .L2110+44
+	ldr	r3, [r3]
+	str	r3, [r7, #36]
+	ldr	r3, .L2110+48
+	ldrh	r3, [r3]
+	strh	r3, [r7, #44]	@ movhi
+	ldr	r3, .L2110+52
+	ldrh	r3, [r3]
+	strh	r3, [r7, #46]	@ movhi
+	ldr	r3, .L2110+56
+	ldrh	r2, [r3]
+	bl	ftl_memset
+	mov	r1, r7
+	ldr	r7, .L2110+60
+	movs	r2, #48
+	ldr	r0, [r5, #8]
+	bl	ftl_memcpy
+	ldrh	r2, [r7]
+	ldr	r3, .L2110+64
+	ldr	r0, [r5, #8]
 	ldr	r1, [r3]
-	str	r1, [r5, #8]
-	ldr	r1, .L2134+12
-	ldr	r7, [r1]
-	mov	r1, r2
-	str	r7, [r5, #12]
-	bl	FlashReadPages
-	ldrh	r2, [r7, #8]
-	cmp	r2, r10
-	beq	.L2126
-	ldr	r1, .L2134+16
-	movw	r2, #661
-	ldr	r0, .L2134+20
-	bl	printf
-	ldr	r1, .L2134+24
-	ldr	r0, .L2134+28
-	bl	printf
-.L2126:
-	ldr	r2, [r5]
-	adds	r2, r2, #1
-	ldrh	r2, [r7, #8]
-	bne	.L2127
-.L2129:
-	ldr	r1, [sp, #4]
-	movs	r3, #0
-	ldr	r0, .L2134+32
-	str	r3, [r1]
-	ldr	r1, [r5, #4]
-	bl	printf
-	ldr	r3, .L2134+36
-	movs	r2, #1
-	str	r2, [r3]
-.L2128:
-	movs	r0, #0
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2127:
-	cmp	r2, r10
-	bne	.L2129
+	lsls	r2, r2, #1
+	adds	r0, r0, #48
+	bl	ftl_memcpy
 	ldrh	r0, [r7]
-	ldrh	r1, [r4, #4]
-	cmp	r0, r1
-	bne	.L2129
-	ldr	r2, [r5, #8]
-	mov	r1, fp
-	mov	r0, r4
-	bl	FtlMapWritePage
-.L2125:
-	adds	r6, r6, #1
-	b	.L2124
-.L2135:
-	.align	2
-.L2134:
-	.word	.LANCHOR53
-	.word	.LANCHOR203
-	.word	.LANCHOR184
-	.word	.LANCHOR188
-	.word	.LANCHOR213
-	.word	.LC5
-	.word	.LC6
-	.word	.LC7
-	.word	.LC39
-	.word	.LANCHOR76
-	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
-	.section	.text.Ftl_write_map_blk_to_last_page,"ax",%progbits
-	.align	1
-	.global	Ftl_write_map_blk_to_last_page
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	Ftl_write_map_blk_to_last_page, %function
-Ftl_write_map_blk_to_last_page:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2150
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r4, r0
-	ldr	r5, [r3]
-	cbnz	r5, .L2137
-	ldrh	r3, [r0]
-	movw	r2, #65535
-	ldr	r6, [r0, #12]
-	cmp	r3, r2
-	bne	.L2138
-	ldrh	r3, [r0, #8]
-	cbz	r3, .L2139
-	ldr	r1, .L2150+4
-	movw	r2, #697
-	ldr	r0, .L2150+8
-	bl	printf
-	ldr	r1, .L2150+12
-	ldr	r0, .L2150+16
-	bl	printf
-.L2139:
-	ldrh	r3, [r4, #8]
-	adds	r3, r3, #1
-	strh	r3, [r4, #8]	@ movhi
-	bl	FtlFreeSysBlkQueueOut
+	ldr	r3, [r5, #8]
+	ldr	r1, .L2110+68
+	lsrs	r2, r0, #3
+	lsls	r0, r0, #1
+	ldr	r1, [r1]
+	adds	r0, r0, #51
+	adds	r2, r2, #4
+	bic	r0, r0, #3
+	add	r0, r0, r3
+	bl	ftl_memcpy
+	ldr	r3, .L2110+72
+	ldrh	r3, [r3]
+	cbz	r3, .L2089
+	ldrh	r0, [r7]
+	ldr	r3, .L2110+76
+	ldr	r1, .L2110+80
+	ldrh	r2, [r3]
+	lsrs	r3, r0, #3
+	ldr	r1, [r1]
+	add	r3, r3, r0, lsl #1
+	ldr	r0, [r5, #8]
+	adds	r3, r3, #52
+	lsls	r2, r2, #2
+	ubfx	r3, r3, #2, #14
+	add	r0, r0, r3, lsl #2
+	bl	ftl_memcpy
+.L2089:
+	movs	r7, #0
+	movw	r10, #65535
+	movs	r0, #0
+	bl	FtlUpdateVaildLpn
+.L2090:
+	ldr	r3, [r8]
+	ldrh	r1, [r4, #2]
+	ldrh	r2, [r4]
+	str	r3, [r5, #8]
+	ldr	r3, [fp]
+	str	r3, [r5, #12]
+	orr	r3, r1, r2, lsl #10
+	str	r3, [r5, #4]
+	ldr	r3, .L2110+84
+	ldrh	r3, [r3]
+	subs	r3, r3, #1
+	cmp	r1, r3
+	blt	.L2091
 	movs	r3, #0
-	strh	r0, [r6]	@ movhi
+	ldrh	r10, [r4, #4]
 	strh	r3, [r4, #2]	@ movhi
-	strh	r3, [r4]	@ movhi
-	ldr	r3, [r4, #28]
-	adds	r3, r3, #1
-	str	r3, [r4, #28]
-.L2137:
-	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2138:
-	ldrh	r8, [r6, r3, lsl #1]
-	movs	r1, #255
-	ldrh	r3, [r0, #2]
-	ldr	r7, .L2150+20
-	ldr	fp, .L2150+40
-	ldr	r10, [r0, #24]
-	orr	r3, r3, r8, lsl #10
-	ldr	r0, [fp]
-	str	r3, [r7, #4]
-	ldr	r3, .L2150+24
-	str	r0, [r7, #8]
-	ldr	r6, [r3]
-	ldr	r3, [r4, #28]
-	str	r6, [r7, #12]
+	strh	r2, [r4, #4]	@ movhi
+	bl	FtlFreeSysBlkQueueOut
+	ldr	r3, .L2110+40
+	ldr	r1, .L2110+40
+	strh	r0, [r4]	@ movhi
+	ldr	r3, [r3]
+	adds	r2, r3, #1
+	str	r3, [r4, #8]
+	str	r2, [r1]
+	lsls	r2, r0, #10
+	str	r2, [r5, #4]
 	str	r3, [r6, #4]
-	movw	r3, #64245
-	strh	r3, [r6, #8]	@ movhi
-	ldrh	r3, [r4, #4]
-	strh	r8, [r6, #2]	@ movhi
-	strh	r3, [r6]	@ movhi
-	ldr	r3, .L2150+28
-	ldrh	r2, [r3]
-	lsls	r2, r2, #3
-	bl	ftl_memset
-	ldrh	ip, [r4, #6]
-	mov	r3, r5
-	ldr	r1, [fp]
-	mov	r2, r5
-.L2140:
-	uxth	r0, r3
-	cmp	ip, r0
-	bhi	.L2142
-	ldr	r3, .L2150+32
+	strh	r0, [r6, #2]	@ movhi
+.L2091:
+	ldr	r3, .L2110+88
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2143
-	ldr	r3, .L2150+36
-	ldr	r0, [r7, #8]
+	cbz	r3, .L2092
+	ldr	r3, .L2110+56
+	ldr	r0, [r8]
 	ldrh	r1, [r3]
 	bl	js_hash
 	str	r0, [r6, #12]
-.L2143:
-	movs	r2, #1
-	movs	r3, #0
-	mov	r1, r2
-	ldr	r0, .L2150+20
-	bl	FlashProgPages
-	ldrh	r3, [r4, #2]
-	mov	r0, r4
-	adds	r3, r3, #1
-	strh	r3, [r4, #2]	@ movhi
-	bl	ftl_map_blk_gc
-	b	.L2137
-.L2142:
-	ldr	r0, [r10, r3, lsl #2]
-	cmp	r8, r0, lsr #10
-	bne	.L2141
-	adds	r2, r2, #1
-	uxth	r2, r2
-	str	r3, [r1, r2, lsl #3]
-	add	r5, r1, r2, lsl #3
-	ldr	r0, [r10, r3, lsl #2]
-	str	r0, [r5, #4]
-.L2141:
-	adds	r3, r3, #1
-	b	.L2140
-.L2151:
-	.align	2
-.L2150:
-	.word	.LANCHOR76
-	.word	.LANCHOR214
-	.word	.LC5
-	.word	.LC6
-	.word	.LC7
-	.word	.LANCHOR203
-	.word	.LANCHOR188
-	.word	.LANCHOR53
-	.word	.LANCHOR2
-	.word	.LANCHOR57
-	.word	.LANCHOR183
-	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
-	.section	.text.FtlMapWritePage,"ax",%progbits
-	.align	1
-	.global	FtlMapWritePage
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlMapWritePage, %function
-FtlMapWritePage:
-	@ args = 0, pretend = 0, frame = 16
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r4, r0
-	ldr	r10, .L2178+44
-	mov	r8, r1
-	movs	r6, #0
-	str	r2, [sp, #4]
-.L2153:
-	ldr	r2, .L2178
-	ldr	r3, [r2]
-	adds	r3, r3, #1
-	str	r3, [r2]
-	ldrh	r3, [r10]
-	ldrh	r2, [r4, #2]
-	subs	r3, r3, #1
-	cmp	r2, r3
-	bge	.L2154
-	ldrh	r2, [r4]
-	movw	r3, #65535
-	cmp	r2, r3
-	bne	.L2155
-.L2154:
-	mov	r0, r4
-	bl	Ftl_write_map_blk_to_last_page
-.L2155:
-	ldr	r3, .L2178+4
-	ldr	r2, [r3]
-	str	r3, [sp, #8]
-	cmp	r2, #0
-	bne	.L2173
-	ldrh	r2, [r4]
-	ldr	r3, [r4, #12]
-	ldrh	r3, [r3, r2, lsl #1]
-	cbnz	r3, .L2157
-	ldr	r1, .L2178+8
-	movw	r2, #759
-	ldr	r0, .L2178+12
-	bl	printf
-	ldr	r1, .L2178+16
-	ldr	r0, .L2178+20
-	bl	printf
-.L2157:
-	ldrh	r2, [r4]
-	ldrh	r3, [r4, #10]
-	cmp	r2, r3
-	bcc	.L2158
-	ldr	r1, .L2178+8
-	mov	r2, #760
-	ldr	r0, .L2178+12
-	bl	printf
-	ldr	r1, .L2178+16
-	ldr	r0, .L2178+20
-	bl	printf
-.L2158:
-	ldrh	r2, [r4]
-	movs	r1, #0
-	ldr	r3, [r4, #12]
-	ldr	r5, .L2178+24
-	ldrh	r7, [r3, r2, lsl #1]
-	movs	r2, #16
-	ldrh	r3, [r4, #2]
-	mov	fp, r5
-	orr	r3, r3, r7, lsl #10
-	str	r3, [r5, #4]
-	ldr	r3, [sp, #4]
-	str	r3, [r5, #8]
-	ldr	r3, .L2178+28
-	ldr	r0, [r3]
-	str	r0, [r5, #12]
-	bl	ftl_memset
-	ldr	r3, [r5, #12]
-	ldr	r2, [r4, #28]
-	str	r3, [sp, #12]
-	str	r2, [r3, #4]
-	ldrh	r2, [r4, #4]
-	strh	r8, [r3, #8]	@ movhi
-	strh	r7, [r3, #2]	@ movhi
-	strh	r2, [r3]	@ movhi
-	ldr	r2, .L2178+32
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbz	r2, .L2159
-	ldr	r2, .L2178+36
-	ldr	r0, [r5, #8]
-	ldrh	r1, [r2]
-	bl	js_hash
-	ldr	r3, [sp, #12]
-	str	r0, [r3, #12]
-.L2159:
+.L2092:
 	movs	r3, #1
-	ldr	r0, .L2178+24
+	ldr	r0, .L2110+8
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
@@ -14829,3652 +14237,4208 @@ FtlMapWritePage:
 	uxth	r3, r3
 	adds	r1, r2, #1
 	strh	r3, [r4, #2]	@ movhi
-	bne	.L2160
-	ldr	r1, [r5, #4]
-	adds	r6, r6, #1
-	ldr	r0, .L2178+40
-	uxth	r6, r6
+	bne	.L2093
+	cmp	r3, #1
+	bne	.L2094
+	ldr	r1, .L2110+92
+	movw	r2, #1375
+	ldr	r0, .L2110+96
 	bl	printf
+	ldr	r1, .L2110+100
+	ldr	r0, .L2110+104
+	bl	printf
+.L2094:
 	ldrh	r3, [r4, #2]
-	cmp	r3, #2
-	itttt	ls
-	ldrls	r3, .L2178+44
-	ldrhls	r3, [r3]
-	addls	r3, r3, #-1
-	strhls	r3, [r4, #2]	@ movhi
-	cmp	r6, #3
-	bls	.L2153
-	mov	r2, r6
-	ldr	r1, [fp, #4]
-	ldr	r0, .L2178+48
+	adds	r7, r7, #1
+	uxth	r7, r7
+	cmp	r3, #1
+	itttt	eq
+	ldreq	r3, .L2110+84
+	ldrheq	r3, [r3]
+	addeq	r3, r3, #-1
+	strheq	r3, [r4, #2]	@ movhi
+	cmp	r7, #3
+	bls	.L2090
+	mov	r2, r7
+	ldr	r1, [r5, #4]
+	ldr	r0, .L2110+108
 	bl	printf
-	ldr	r2, [sp, #8]
+	ldr	r2, [sp, #4]
 	movs	r3, #1
 	str	r3, [r2]
-.L2173:
+.L2088:
 	movs	r0, #0
-	add	sp, sp, #16
+	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2160:
-	cbz	r2, .L2163
+.L2093:
 	cmp	r3, #1
-	strh	r7, [r4, #40]	@ movhi
-	bne	.L2164
-.L2165:
-	movs	r3, #0
-	str	r3, [r4, #36]
-	b	.L2153
-.L2164:
+	beq	.L2090
 	cmp	r2, #256
-.L2177:
-	beq	.L2165
-	ldr	r3, [r4, #36]
-	cmp	r3, #0
-	bne	.L2165
-	ldr	r2, [fp, #4]
-	ldr	r3, [r4, #24]
-	str	r2, [r3, r8, lsl #2]
-	b	.L2173
-.L2163:
-	cmp	r3, #1
-	b	.L2177
-.L2179:
+	beq	.L2090
+	movw	r3, #65535
+	cmp	r10, r3
+	beq	.L2088
+	movs	r1, #1
+	mov	r0, r10
+	bl	FtlFreeSysBlkQueueIn
+	b	.L2088
+.L2111:
 	.align	2
-.L2178:
+.L2110:
+	.word	.LANCHOR78
+	.word	.LANCHOR218
+	.word	.LANCHOR211
+	.word	.LANCHOR82
+	.word	1179929683
+	.word	.LANCHOR45
+	.word	.LANCHOR93
+	.word	.LANCHOR94
+	.word	.LANCHOR95
+	.word	.LANCHOR172
+	.word	.LANCHOR164
 	.word	.LANCHOR165
-	.word	.LANCHOR76
-	.word	.LANCHOR215
-	.word	.LC5
-	.word	.LC6
-	.word	.LC7
-	.word	.LANCHOR203
-	.word	.LANCHOR188
-	.word	.LANCHOR2
+	.word	.LANCHOR115
+	.word	.LANCHOR116
 	.word	.LANCHOR57
-	.word	.LC40
+	.word	.LANCHOR40
+	.word	.LANCHOR85
+	.word	.LANCHOR1
+	.word	.LANCHOR69
+	.word	.LANCHOR66
+	.word	.LANCHOR134
 	.word	.LANCHOR53
-	.word	.LC41
-	.size	FtlMapWritePage, .-FtlMapWritePage
-	.section	.text.flush_l2p_region,"ax",%progbits
+	.word	.LANCHOR2
+	.word	.LANCHOR219
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LC40
+	.word	.LANCHOR189
+	.word	.LANCHOR195
+	.word	1342177379
+	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
+	.section	.text.FtlSuperblockPowerLostFix,"ax",%progbits
 	.align	1
-	.global	flush_l2p_region
+	.global	FtlSuperblockPowerLostFix
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flush_l2p_region, %function
-flush_l2p_region:
-	@ args = 0, pretend = 0, frame = 0
+	.type	FtlSuperblockPowerLostFix, %function
+FtlSuperblockPowerLostFix:
+	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	movs	r4, #12
-	ldr	r5, .L2181
-	muls	r4, r0, r4
-	ldr	r0, .L2181+4
-	ldr	r3, [r5]
-	adds	r2, r3, r4
-	ldrh	r1, [r3, r4]
-	ldr	r2, [r2, #8]
-	bl	FtlMapWritePage
-	ldr	r3, [r5]
-	movs	r0, #0
-	add	r4, r4, r3
-	ldr	r3, [r4, #4]
-	bic	r3, r3, #-2147483648
-	str	r3, [r4, #4]
-	pop	{r3, r4, r5, pc}
-.L2182:
+	ldr	r3, .L2127
+	push	{r4, r5, r6, r7, r8, r10, lr}
+	mov	r4, r0
+	sub	sp, sp, #44
+	ldr	r8, [r3]
+	cmp	r8, #0
+	bne	.L2112
+	ldr	r3, .L2127+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L2123
+	ldrb	r3, [r0, #8]	@ zero_extendqisi2
+	cmp	r3, #1
+	bne	.L2123
+	ldrh	r6, [r0, #4]
+	mov	r8, r3
+.L2114:
+	mov	r3, #-1
+	ldr	r2, .L2127+8
+	str	r3, [sp, #20]
+	movs	r7, #0
+	ldr	r3, .L2127+12
+	ldr	r5, [r2]
+	mvn	r2, #2
+	ldr	r10, .L2127+24
+	ldr	r3, [r3]
+	str	r5, [sp, #16]
+	str	r3, [sp, #12]
+	str	r2, [r5, #8]
+	mvn	r2, #1
+	str	r2, [r5, #12]
+	ldrh	r2, [r4]
+	strh	r7, [r5]	@ movhi
+	strh	r2, [r5, #2]	@ movhi
+	movw	r2, #61589
+	str	r2, [r3]
+	add	r2, r2, #304087040
+	add	r2, r2, #1269760
+	addw	r2, r2, #1507
+	str	r2, [r3, #4]
+.L2115:
+	adds	r6, r6, #-1
+	bcc	.L2118
+	ldrh	r3, [r4, #4]
+	cbnz	r3, .L2116
+.L2118:
+	ldr	r3, .L2127+16
+	ldrh	r1, [r4]
+	ldrh	r0, [r4, #4]
+	ldr	r2, [r3]
+	ldrh	r3, [r2, r1, lsl #1]
+	subs	r3, r3, r0
+	strh	r3, [r2, r1, lsl #1]	@ movhi
+	ldr	r3, .L2127+20
+	ldrh	r3, [r3]
+	strh	r3, [r4, #2]	@ movhi
+	movs	r3, #0
+	strb	r3, [r4, #6]
+	strh	r3, [r4, #4]	@ movhi
+.L2112:
+	add	sp, sp, #44
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.L2123:
+	movs	r6, #12
+	b	.L2114
+.L2116:
+	mov	r0, r4
+	bl	get_new_active_ppa
+	str	r0, [sp, #8]
+	adds	r0, r0, #1
+	beq	.L2118
+	ldr	r3, [r10]
+	movs	r1, #1
+	add	r0, sp, #4
+	str	r3, [r5, #4]
+	adds	r3, r3, #1
+	adds	r2, r3, #1
+	mov	r2, r8
+	it	eq
+	moveq	r3, r7
+	str	r3, [r10]
+	movs	r3, #0
+	bl	FlashProgPages
+	ldrh	r0, [r4]
+	bl	decrement_vpc_count
+	b	.L2115
+.L2128:
 	.align	2
-.L2181:
-	.word	.LANCHOR96
-	.word	.LANCHOR127
-	.size	flush_l2p_region, .-flush_l2p_region
-	.section	.text.l2p_flush,"ax",%progbits
+.L2127:
+	.word	.LANCHOR78
+	.word	.LANCHOR16
+	.word	.LANCHOR195
+	.word	.LANCHOR189
+	.word	.LANCHOR85
+	.word	.LANCHOR52
+	.word	.LANCHOR165
+	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
+	.section	.text.FtlLoadFactoryBbt,"ax",%progbits
 	.align	1
-	.global	l2p_flush
+	.global	FtlLoadFactoryBbt
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	l2p_flush, %function
-l2p_flush:
+	.type	FtlLoadFactoryBbt, %function
+FtlLoadFactoryBbt:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, lr}
-	movs	r4, #0
-	ldr	r5, .L2187
-	ldr	r6, .L2187+4
-.L2184:
-	ldrh	r3, [r5]
-	uxth	r0, r4
-	cmp	r3, r0
-	bhi	.L2186
+	ldr	r3, .L2139
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r6, #0
+	ldr	r5, .L2139+4
+	ldr	r3, [r3]
+	ldr	r7, .L2139+8
+	ldr	r10, .L2139+20
+	str	r3, [r5, #8]
+	ldr	r3, .L2139+12
+	ldr	r8, [r3]
+	str	r8, [r5, #12]
+.L2130:
+	ldr	r3, .L2139+16
+	ldrh	r3, [r3]
+	cmp	r6, r3
+	bcc	.L2135
 	movs	r0, #0
-	pop	{r4, r5, r6, pc}
-.L2186:
-	ldr	r2, [r6]
-	uxth	r3, r4
-	movs	r1, #12
-	mla	r3, r1, r3, r2
-	ldr	r3, [r3, #4]
-	cmp	r3, #0
-	bge	.L2185
-	bl	flush_l2p_region
-.L2185:
-	adds	r4, r4, #1
-	b	.L2184
-.L2188:
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2135:
+	ldrh	r4, [r10]
+	movw	r3, #65535
+	ldr	fp, .L2139+4
+	strh	r3, [r7, #2]!	@ movhi
+	subs	r4, r4, #1
+	uxth	r4, r4
+.L2131:
+	ldrh	r3, [r10]
+	sub	r2, r3, #15
+	cmp	r2, r4
+	bgt	.L2133
+	mla	r3, r6, r3, r4
+	movs	r2, #1
+	mov	r1, r2
+	mov	r0, fp
+	lsls	r3, r3, #10
+	str	r3, [r5, #4]
+	bl	FlashReadPages
+	ldr	r3, [r5]
+	adds	r3, r3, #1
+	beq	.L2132
+	ldrh	r2, [r8]
+	movw	r3, #61664
+	cmp	r2, r3
+	bne	.L2132
+	strh	r4, [r7]	@ movhi
+.L2133:
+	adds	r6, r6, #1
+	b	.L2130
+.L2132:
+	subs	r4, r4, #1
+	uxth	r4, r4
+	b	.L2131
+.L2140:
 	.align	2
-.L2187:
-	.word	.LANCHOR67
-	.word	.LANCHOR96
-	.size	l2p_flush, .-l2p_flush
-	.section	.text.FtlVendorPartWrite,"ax",%progbits
+.L2139:
+	.word	.LANCHOR189
+	.word	.LANCHOR211
+	.word	.LANCHOR76+10
+	.word	.LANCHOR195
+	.word	.LANCHOR45
+	.word	.LANCHOR51
+	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
+	.section	.text.FtlGetLastWrittenPage,"ax",%progbits
 	.align	1
-	.global	FtlVendorPartWrite
+	.global	FtlGetLastWrittenPage
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlVendorPartWrite, %function
-FtlVendorPartWrite:
-	@ args = 0, pretend = 0, frame = 56
+	.type	FtlGetLastWrittenPage, %function
+FtlGetLastWrittenPage:
+	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2201
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #56
-	str	r2, [sp]
-	adds	r2, r0, r1
-	mov	r7, r0
-	mov	r5, r1
-	ldrh	r3, [r3]
-	cmp	r2, r3
-	bhi	.L2197
-	ldr	r3, .L2201+4
-	mov	r8, #0
-	ldrh	r6, [r3]
-	lsr	r6, r0, r6
-	lsl	fp, r6, #2
-.L2191:
-	cbnz	r5, .L2196
-.L2189:
-	mov	r0, r8
-	add	sp, sp, #56
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2196:
-	ldr	r3, .L2201+8
-	mov	r0, r7
-	ldr	r10, .L2201+24
-	ldr	r3, [r3]
-	ldr	r2, [r3, fp]
-	ldr	r3, .L2201+12
-	str	r2, [sp, #12]
-	ldrh	r3, [r3]
-	mov	r1, r3
-	str	r3, [sp, #8]
-	bl	__aeabi_uidivmod
-	ldr	r3, [sp, #8]
-	ldr	r2, [sp, #12]
-	str	r1, [sp, #4]
-	subs	r4, r3, r1
-	uxth	r4, r4
-	cmp	r5, r4
-	it	cc
-	uxthcc	r4, r5
-	cbz	r2, .L2193
-	cmp	r4, r3
-	beq	.L2193
-	ldr	r3, [r10]
-	add	r0, sp, #20
-	str	r2, [sp, #24]
-	movs	r2, #1
-	mov	r1, r2
-	str	r3, [sp, #28]
-	movs	r3, #0
-	str	r3, [sp, #32]
-	bl	FlashReadPages
-.L2194:
-	lsls	r3, r4, #9
-	ldr	r0, [r10]
-	subs	r5, r5, r4
-	mov	r2, r3
+	cmp	r1, #1
+	push	{r4, r5, r6, r7, r8, lr}
+	it	eq
+	ldreq	r3, .L2153
+	sub	sp, sp, #104
+	lsl	r7, r0, #10
+	mov	r2, r1
+	it	ne
+	ldrne	r3, .L2153+4
+	mov	r8, r1
+	movs	r6, #0
+	movs	r1, #1
+	add	r0, sp, #4
+	ldrh	r5, [r3]
+	add	r3, sp, #40
+	str	r3, [sp, #16]
+	str	r6, [sp, #12]
+	subs	r5, r5, #1
+	sxth	r5, r5
+	orr	r3, r5, r7
 	str	r3, [sp, #8]
-	ldm	sp, {r1, r3}
-	add	r7, r7, r4
-	add	fp, fp, #4
-	add	r0, r0, r3, lsl #9
-	bl	ftl_memcpy
-	ldr	r2, [r10]
-	mov	r1, r6
-	ldr	r0, .L2201+16
-	adds	r6, r6, #1
-	bl	FtlMapWritePage
-	ldr	r3, [sp]
-	adds	r0, r0, #1
-	it	eq
-	moveq	r8, #-1
-	mov	r2, r3
-	ldr	r3, [sp, #8]
-	add	r2, r2, r3
-	str	r2, [sp]
-	b	.L2191
-.L2193:
-	ldr	r3, .L2201+20
-	movs	r1, #0
-	ldr	r0, [r10]
-	ldrh	r2, [r3]
-	bl	ftl_memset
-	b	.L2194
-.L2197:
-	mov	r8, #-1
-	b	.L2189
-.L2202:
+	bl	FlashReadPages
+	ldr	r3, [sp, #40]
+	adds	r3, r3, #1
+	bne	.L2144
+.L2145:
+	cmp	r6, r5
+	ble	.L2148
+.L2144:
+	mov	r0, r5
+	add	sp, sp, #104
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L2148:
+	adds	r3, r6, r5
+	mov	r2, r8
+	add	r3, r3, r3, lsr #31
+	movs	r1, #1
+	add	r0, sp, #4
+	asrs	r4, r3, #1
+	sxth	r3, r4
+	orrs	r3, r3, r7
+	str	r3, [sp, #8]
+	bl	FlashReadPages
+	ldr	r3, [sp, #40]
+	adds	r3, r3, #1
+	bne	.L2146
+	ldr	r3, [sp, #44]
+	adds	r3, r3, #1
+	bne	.L2146
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #1
+	beq	.L2146
+	subs	r4, r4, #1
+	sxth	r5, r4
+	b	.L2145
+.L2146:
+	adds	r4, r4, #1
+	sxth	r6, r4
+	b	.L2145
+.L2154:
 	.align	2
-.L2201:
-	.word	.LANCHOR50
-	.word	.LANCHOR56
-	.word	.LANCHOR194
-	.word	.LANCHOR55
-	.word	.LANCHOR216
-	.word	.LANCHOR57
-	.word	.LANCHOR185
-	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
-	.section	.text.Ftl_save_ext_data,"ax",%progbits
+.L2153:
+	.word	.LANCHOR53
+	.word	.LANCHOR52
+	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
+	.section	.text.FtlLoadBbt,"ax",%progbits
 	.align	1
-	.global	Ftl_save_ext_data
+	.global	FtlLoadBbt
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	Ftl_save_ext_data, %function
-Ftl_save_ext_data:
+	.type	FtlLoadBbt, %function
+FtlLoadBbt:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r2, .L2205
-	ldr	r3, .L2205+4
-	ldr	r1, [r2]
-	cmp	r1, r3
-	bne	.L2203
-	ldr	r3, .L2205+8
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	ldr	r8, .L2184+48
+	ldr	r4, .L2184
+	ldr	r3, [r8]
+	ldr	r7, .L2184+4
+	mov	r10, r4
+	str	r3, [r4, #8]
+	ldr	r3, .L2184+8
+	ldr	r6, [r3]
+	str	r6, [r4, #12]
+	bl	FtlBbtMemInit
+	ldrh	r5, [r7]
+	subs	r5, r5, #1
+	uxth	r5, r5
+.L2156:
+	ldrh	r3, [r7]
+	subs	r3, r3, #47
+	cmp	r3, r5
+	bgt	.L2159
+	lsls	r3, r5, #10
+	movs	r2, #1
+	mov	r1, r2
+	mov	r0, r10
+	str	r3, [r4, #4]
+	bl	FlashReadPages
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	bne	.L2157
+	ldr	r3, [r4, #4]
+	movs	r2, #1
+	mov	r1, r2
+	mov	r0, r10
+	adds	r3, r3, #1
+	str	r3, [r4, #4]
+	bl	FlashReadPages
+.L2157:
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	beq	.L2158
+	ldrh	r2, [r6]
+	movw	r3, #61649
+	cmp	r2, r3
+	bne	.L2158
+	ldr	r3, .L2184+12
+	ldr	r2, [r6, #4]
+	strh	r5, [r3]	@ movhi
+	str	r2, [r3, #8]
+	ldrh	r2, [r6, #8]
+	strh	r2, [r3, #4]	@ movhi
+.L2159:
+	ldr	r5, .L2184+12
+	movw	r2, #65535
+	ldrh	r3, [r5]
+	cmp	r3, r2
+	beq	.L2173
+	ldrh	r3, [r5, #4]
+	cmp	r3, r2
+	beq	.L2163
+	lsls	r3, r3, #10
+	movs	r2, #1
+	mov	r1, r2
+	ldr	r0, .L2184
+	str	r3, [r4, #4]
+	bl	FlashReadPages
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	beq	.L2163
+	ldrh	r2, [r6]
+	movw	r3, #61649
+	cmp	r2, r3
+	bne	.L2163
+	ldr	r3, [r6, #4]
+	ldr	r2, [r5, #8]
+	cmp	r3, r2
+	bls	.L2163
+	ldrh	r2, [r5, #4]
+	str	r3, [r5, #8]
+	ldrh	r3, [r6, #8]
+	strh	r2, [r5]	@ movhi
+	strh	r3, [r5, #4]	@ movhi
+.L2163:
+	ldr	r10, .L2184
 	movs	r1, #1
+	ldrh	r0, [r5]
+	bl	FtlGetLastWrittenPage
+	sxth	r7, r0
+	adds	r0, r0, #1
+	strh	r0, [r5, #2]	@ movhi
+.L2165:
+	cmp	r7, #0
+	bge	.L2168
+	ldr	r1, .L2184+16
+	movw	r2, #339
+	ldr	r0, .L2184+20
+	bl	printf
+	ldr	r1, .L2184+24
+	ldr	r0, .L2184+28
+	bl	printf
+.L2167:
+	ldrh	r3, [r6, #10]
+	ldrh	r0, [r6, #12]
+	strh	r3, [r5, #6]	@ movhi
+	movw	r3, #65535
+	cmp	r0, r3
+	beq	.L2170
+	ldr	r3, .L2184+32
+	ldr	r2, [r3]
+	cmp	r0, r2
+	beq	.L2170
+	ldr	r3, .L2184+36
+	ldrh	r3, [r3]
+	lsrs	r3, r3, #2
+	cmp	r2, r3
+	bcs	.L2170
+	cmp	r0, r3
+	bcs	.L2170
+	bl	FtlSysBlkNumInit
+.L2170:
+	ldr	r6, .L2184+40
+	movs	r5, #0
+	ldr	r7, .L2184+44
+	ldr	r8, .L2184+52
+.L2171:
+	ldrh	r3, [r7]
+	cmp	r5, r3
+	bcc	.L2172
 	movs	r0, #0
-	str	r3, [r2, #4]
-	ldr	r3, .L2205+12
-	ldr	r3, [r3]
-	str	r3, [r2, #88]
-	ldr	r3, .L2205+16
-	ldr	r3, [r3]
-	str	r3, [r2, #92]
-	ldr	r3, .L2205+20
-	ldr	r3, [r3]
-	str	r3, [r2, #8]
-	ldr	r3, .L2205+24
-	ldr	r3, [r3]
-	str	r3, [r2, #12]
-	ldr	r3, .L2205+28
-	ldr	r3, [r3]
-	str	r3, [r2, #16]
-	ldr	r3, .L2205+32
-	ldr	r3, [r3]
-	str	r3, [r2, #20]
-	ldr	r3, .L2205+36
-	ldr	r3, [r3]
-	str	r3, [r2, #28]
-	ldr	r3, .L2205+40
-	ldr	r3, [r3]
-	str	r3, [r2, #32]
-	ldr	r3, .L2205+44
-	ldr	r3, [r3]
-	str	r3, [r2, #36]
-	ldr	r3, .L2205+48
-	ldr	r3, [r3]
-	str	r3, [r2, #40]
-	ldr	r3, .L2205+52
-	ldr	r3, [r3]
-	str	r3, [r2, #44]
-	ldr	r3, .L2205+56
-	ldr	r3, [r3]
-	str	r3, [r2, #48]
-	ldr	r3, .L2205+60
-	ldr	r3, [r3]
-	str	r3, [r2, #60]
-	ldr	r3, .L2205+64
-	ldr	r3, [r3]
-	str	r3, [r2, #64]
-	b	FtlVendorPartWrite
-.L2203:
-	bx	lr
-.L2206:
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L2158:
+	subs	r5, r5, #1
+	uxth	r5, r5
+	b	.L2156
+.L2168:
+	ldrh	r3, [r5]
+	movs	r2, #1
+	mov	r1, r2
+	mov	r0, r10
+	orr	r3, r7, r3, lsl #10
+	str	r3, [r4, #4]
+	ldr	r3, [r8]
+	str	r3, [r4, #8]
+	bl	FlashReadPages
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	beq	.L2166
+	ldrh	r2, [r6]
+	movw	r3, #61649
+	cmp	r2, r3
+	beq	.L2167
+.L2166:
+	subs	r7, r7, #1
+	sxth	r7, r7
+	b	.L2165
+.L2172:
+	ldrh	r2, [r8]
+	ldr	r1, [r4, #8]
+	ldr	r0, [r6, #4]!
+	lsls	r2, r2, #2
+	mla	r1, r5, r2, r1
+	adds	r5, r5, #1
+	bl	ftl_memcpy
+	b	.L2171
+.L2173:
+	mov	r0, #-1
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L2185:
 	.align	2
-.L2205:
-	.word	.LANCHOR138
-	.word	1179929683
-	.word	1342177367
-	.word	.LANCHOR217
-	.word	.LANCHOR218
-	.word	.LANCHOR161
-	.word	.LANCHOR162
-	.word	.LANCHOR166
-	.word	.LANCHOR165
-	.word	.LANCHOR168
-	.word	.LANCHOR79
-	.word	.LANCHOR163
-	.word	.LANCHOR164
-	.word	.LANCHOR169
-	.word	.LANCHOR170
-	.word	.LANCHOR158
-	.word	.LANCHOR157
-	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
-	.section	.text.FtlEctTblFlush,"ax",%progbits
+.L2184:
+	.word	.LANCHOR211
+	.word	.LANCHOR51
+	.word	.LANCHOR195
+	.word	.LANCHOR76
+	.word	.LANCHOR220
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LANCHOR37
+	.word	.LANCHOR41
+	.word	.LANCHOR76+24
+	.word	.LANCHOR45
+	.word	.LANCHOR189
+	.word	.LANCHOR126
+	.size	FtlLoadBbt, .-FtlLoadBbt
+	.section	.text.ftl_map_blk_gc,"ax",%progbits
 	.align	1
-	.global	FtlEctTblFlush
+	.global	ftl_map_blk_gc
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlEctTblFlush, %function
-FtlEctTblFlush:
-	@ args = 0, pretend = 0, frame = 0
+	.type	ftl_map_blk_gc, %function
+ftl_map_blk_gc:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	ldr	r3, .L2214
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L2212
-	ldr	r3, .L2214+4
-	ldr	r3, [r3]
-	cmp	r3, #39
-	ite	hi
-	movhi	r3, #32
-	movls	r3, #4
-.L2208:
-	ldr	r1, .L2214+8
-	ldrh	r2, [r1]
-	cmp	r2, #31
-	ittt	ls
-	addls	r2, r2, #1
-	movls	r3, #1
-	strhls	r2, [r1]	@ movhi
-	ldr	r2, .L2214+12
-	cbnz	r0, .L2210
-	ldr	r1, [r2]
-	ldr	r0, [r1, #20]
-	ldr	r1, [r1, #16]
-	add	r3, r3, r0
-	cmp	r1, r3
-	bcc	.L2211
-.L2210:
-	ldr	r2, [r2]
-	movs	r0, #64
-	ldr	r3, [r2, #16]
-	str	r3, [r2, #20]
-	ldr	r3, .L2214+16
-	str	r3, [r2]
-	ldr	r3, .L2214+20
-	ldrh	r1, [r3]
-	lsls	r3, r1, #9
-	str	r3, [r2, #12]
-	ldr	r3, [r2, #8]
-	adds	r3, r3, #1
-	str	r3, [r2, #8]
+	ldr	r3, [r0, #24]
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r0
+	ldr	r5, [r0, #12]
+	str	r3, [sp]
+	bl	ftl_free_no_use_map_blk
+	ldrh	r3, [r4, #10]
+	ldrh	r2, [r4, #8]
+	subs	r3, r3, #4
+	cmp	r2, r3
+	blt	.L2187
+	uxth	r0, r0
+	ldrh	r8, [r5, r0, lsl #1]
+	cmp	r8, #0
+	beq	.L2187
+	ldr	r3, [r4, #32]
+	cbnz	r3, .L2187
+	movs	r2, #1
+	str	r2, [r4, #32]
+	strh	r3, [r5, r0, lsl #1]	@ movhi
+	ldrh	r3, [r4, #8]
+	ldrh	r2, [r4, #2]
+	subs	r3, r3, #1
+	strh	r3, [r4, #8]	@ movhi
+	ldr	r3, .L2199
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L2188
+	mov	r0, r4
+	bl	ftl_map_blk_alloc_new_blk
+.L2188:
+	ldr	r5, .L2199+4
+	movs	r6, #0
+.L2189:
+	ldrh	r3, [r4, #6]
+	uxth	r10, r6
+	cmp	r3, r10
+	bhi	.L2195
+	movs	r1, #1
+	mov	r0, r8
+	bl	FtlFreeSysBlkQueueIn
 	movs	r3, #0
-	str	r3, [r2, #4]
-	bl	FtlVendorPartWrite
-	bl	Ftl_save_ext_data
-.L2211:
+	str	r3, [r4, #32]
+.L2187:
+	ldr	r3, .L2199
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L2193
+	mov	r0, r4
+	bl	ftl_map_blk_alloc_new_blk
+	b	.L2193
+.L2195:
+	ldr	r3, [sp]
+	uxth	fp, r6
+	add	r3, r3, fp, lsl #2
+	str	r3, [sp, #4]
+	ldr	r3, [sp]
+	ldr	r2, [r3, fp, lsl #2]
+	cmp	r8, r2, lsr #10
+	bne	.L2190
+	ldr	r3, .L2199+8
+	str	r2, [r5, #4]
+	movs	r2, #1
+	ldr	r0, .L2199+4
+	ldr	r1, [r3]
+	str	r1, [r5, #8]
+	ldr	r1, .L2199+12
+	ldr	r7, [r1]
+	mov	r1, r2
+	str	r7, [r5, #12]
+	bl	FlashReadPages
+	ldrh	r2, [r7, #8]
+	cmp	r2, r10
+	beq	.L2191
+	ldr	r1, .L2199+16
+	mov	r2, #752
+	ldr	r0, .L2199+20
+	bl	printf
+	ldr	r1, .L2199+24
+	ldr	r0, .L2199+28
+	bl	printf
+.L2191:
+	ldr	r2, [r5]
+	adds	r2, r2, #1
+	ldrh	r2, [r7, #8]
+	bne	.L2192
+.L2194:
+	ldr	r1, [sp, #4]
+	movs	r3, #0
+	ldr	r0, .L2199+32
+	str	r3, [r1]
+	ldr	r1, [r5, #4]
+	bl	printf
+	ldr	r3, .L2199+36
+	movs	r2, #1
+	str	r2, [r3]
+.L2193:
 	movs	r0, #0
-	pop	{r3, pc}
-.L2212:
-	movs	r3, #32
-	b	.L2208
-.L2215:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2192:
+	cmp	r2, r10
+	bne	.L2194
+	ldrh	r0, [r7]
+	ldrh	r1, [r4, #4]
+	cmp	r0, r1
+	bne	.L2194
+	ldr	r2, [r5, #8]
+	mov	r1, fp
+	mov	r0, r4
+	bl	FtlMapWritePage
+.L2190:
+	adds	r6, r6, #1
+	b	.L2189
+.L2200:
 	.align	2
-.L2214:
-	.word	.LANCHOR28
-	.word	.LANCHOR170
-	.word	.LANCHOR219
-	.word	.LANCHOR191
-	.word	1112818501
+.L2199:
+	.word	.LANCHOR53
+	.word	.LANCHOR211
 	.word	.LANCHOR190
-	.size	FtlEctTblFlush, .-FtlEctTblFlush
-	.section	.text.allocate_new_data_superblock,"ax",%progbits
+	.word	.LANCHOR195
+	.word	.LANCHOR221
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LC41
+	.word	.LANCHOR78
+	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
+	.section	.text.Ftl_write_map_blk_to_last_page,"ax",%progbits
 	.align	1
-	.global	allocate_new_data_superblock
+	.global	Ftl_write_map_blk_to_last_page
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	allocate_new_data_superblock, %function
-allocate_new_data_superblock:
+	.type	Ftl_write_map_blk_to_last_page, %function
+Ftl_write_map_blk_to_last_page:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2243
-	push	{r4, r5, r6, lr}
+	ldr	r3, .L2215
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-	ldrh	r5, [r0]
-	ldrh	r3, [r3]
-	cmp	r3, r5
-	bcs	.L2217
-	ldr	r1, .L2243+4
-	movw	r2, #3289
-	ldr	r0, .L2243+8
+	ldr	r5, [r3]
+	cbnz	r5, .L2202
+	ldrh	r3, [r0]
+	movw	r2, #65535
+	ldr	r6, [r0, #12]
+	cmp	r3, r2
+	bne	.L2203
+	ldrh	r3, [r0, #8]
+	cbz	r3, .L2204
+	ldr	r1, .L2215+4
+	movw	r2, #793
+	ldr	r0, .L2215+8
 	bl	printf
-	ldr	r1, .L2243+12
-	ldr	r0, .L2243+16
+	ldr	r1, .L2215+12
+	ldr	r0, .L2215+16
 	bl	printf
-.L2217:
-	ldr	r3, .L2243+20
-	ldr	r3, [r3]
-	cmp	r3, #0
-	bne	.L2218
-	movw	r3, #65535
-	cmp	r5, r3
-	beq	.L2219
-	ldr	r3, .L2243+24
-	mov	r0, r5
-	ldr	r3, [r3]
-	ldrh	r3, [r3, r5, lsl #1]
-	cbz	r3, .L2220
-	bl	INSERT_DATA_LIST
-.L2219:
+.L2204:
+	ldrh	r3, [r4, #8]
+	adds	r3, r3, #1
+	strh	r3, [r4, #8]	@ movhi
+	bl	FtlFreeSysBlkQueueOut
 	movs	r3, #0
-	strb	r3, [r4, #8]
-	ldr	r3, .L2243+28
-	cmp	r4, r3
-	beq	.L2221
-	ldr	r3, .L2243+32
-	ldrh	r2, [r3]
-	cmp	r2, #1
-	beq	.L2221
-	ldr	r3, .L2243+36
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2222
-.L2221:
-	movs	r3, #1
-	strb	r3, [r4, #8]
-.L2223:
-	ldr	r6, .L2243+40
-	movw	r2, #65535
-	ldrh	r0, [r6]
-	cmp	r0, r2
-	beq	.L2228
-	cmp	r5, r0
-	bne	.L2229
-	ldr	r3, .L2243+24
-	ldr	r3, [r3]
-	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L2230
-.L2229:
-	bl	update_vpc_list
-.L2230:
-	movw	r3, #65535
-	strh	r3, [r6]	@ movhi
-.L2228:
-	mov	r0, r4
-	bl	allocate_data_superblock
-	bl	l2p_flush
-	movs	r0, #0
-	bl	FtlEctTblFlush
-	bl	FtlVpcTblFlush
-.L2218:
+	strh	r0, [r6]	@ movhi
+	strh	r3, [r4, #2]	@ movhi
+	strh	r3, [r4]	@ movhi
+	ldr	r3, [r4, #28]
+	adds	r3, r3, #1
+	str	r3, [r4, #28]
+.L2202:
 	movs	r0, #0
-	pop	{r4, r5, r6, pc}
-.L2220:
-	bl	INSERT_FREE_LIST
-	b	.L2219
-.L2222:
-	ldr	r3, .L2243+44
-	cmp	r4, r3
-	bne	.L2223
-	cmp	r2, #3
-	beq	.L2225
-	ldr	r2, .L2243+48
-	ldr	r2, [r2]
-	cmp	r2, #1
-	bne	.L2226
-.L2225:
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2203:
+	ldrh	r8, [r6, r3, lsl #1]
+	movs	r1, #255
+	ldrh	r3, [r0, #2]
+	ldr	r7, .L2215+20
+	ldr	fp, .L2215+40
+	ldr	r10, [r0, #24]
+	orr	r3, r3, r8, lsl #10
+	ldr	r0, [fp]
+	str	r3, [r7, #4]
+	ldr	r3, .L2215+24
+	str	r0, [r7, #8]
+	ldr	r6, [r3]
+	ldr	r3, [r4, #28]
+	str	r6, [r7, #12]
+	str	r3, [r6, #4]
+	movw	r3, #64245
+	strh	r3, [r6, #8]	@ movhi
+	ldrh	r3, [r4, #4]
+	strh	r8, [r6, #2]	@ movhi
+	strh	r3, [r6]	@ movhi
+	ldr	r3, .L2215+28
+	ldrh	r2, [r3]
+	lsls	r2, r2, #3
+	bl	ftl_memset
+	ldrh	ip, [r4, #6]
+	mov	r3, r5
+	ldr	r1, [fp]
+	mov	r2, r5
+.L2205:
+	uxth	r0, r3
+	cmp	ip, r0
+	bhi	.L2207
+	ldr	r3, .L2215+32
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2208
+	ldr	r3, .L2215+36
+	ldr	r0, [r7, #8]
+	ldrh	r1, [r3]
+	bl	js_hash
+	str	r0, [r6, #12]
+.L2208:
 	movs	r2, #1
-	strb	r2, [r3, #8]
-.L2226:
-	ldr	r2, .L2243+52
-	ldr	r2, [r2]
-	cmp	r2, #0
-	beq	.L2223
-	ldr	r2, .L2243+56
-	ldr	r2, [r2]
-	cmp	r2, #39
-	itt	ls
-	movls	r2, #1
-	strbls	r2, [r3, #8]
-	b	.L2223
-.L2244:
+	movs	r3, #0
+	mov	r1, r2
+	ldr	r0, .L2215+20
+	bl	FlashProgPages
+	ldrh	r3, [r4, #2]
+	mov	r0, r4
+	adds	r3, r3, #1
+	strh	r3, [r4, #2]	@ movhi
+	bl	ftl_map_blk_gc
+	b	.L2202
+.L2207:
+	ldr	r0, [r10, r3, lsl #2]
+	cmp	r8, r0, lsr #10
+	bne	.L2206
+	adds	r2, r2, #1
+	uxth	r2, r2
+	str	r3, [r1, r2, lsl #3]
+	add	r5, r1, r2, lsl #3
+	ldr	r0, [r10, r3, lsl #2]
+	str	r0, [r5, #4]
+.L2206:
+	adds	r3, r3, #1
+	b	.L2205
+.L2216:
 	.align	2
-.L2243:
-	.word	.LANCHOR40
-	.word	.LANCHOR220
+.L2215:
+	.word	.LANCHOR78
+	.word	.LANCHOR222
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LANCHOR76
-	.word	.LANCHOR83
-	.word	.LANCHOR92
-	.word	.LANCHOR44
-	.word	.LANCHOR15
-	.word	.LANCHOR133
-	.word	.LANCHOR91
-	.word	.LANCHOR158
-	.word	.LANCHOR28
-	.word	.LANCHOR170
-	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
-	.section	.text.FtlVendorPartRead,"ax",%progbits
+	.word	.LANCHOR211
+	.word	.LANCHOR195
+	.word	.LANCHOR53
+	.word	.LANCHOR2
+	.word	.LANCHOR57
+	.word	.LANCHOR189
+	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
+	.section	.text.FtlMapWritePage,"ax",%progbits
 	.align	1
-	.global	FtlVendorPartRead
+	.global	FtlMapWritePage
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlVendorPartRead, %function
-FtlVendorPartRead:
-	@ args = 0, pretend = 0, frame = 56
+	.type	FtlMapWritePage, %function
+FtlMapWritePage:
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2255
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r10, r2
-	adds	r2, r0, r1
-	sub	sp, sp, #56
-	mov	r7, r0
-	mov	r6, r1
-	ldrh	r3, [r3]
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r0
+	ldr	r10, .L2243+44
+	mov	r8, r1
+	movs	r6, #0
+	str	r2, [sp, #4]
+.L2218:
+	ldr	r2, .L2243
+	ldr	r3, [r2]
+	adds	r3, r3, #1
+	str	r3, [r2]
+	ldrh	r3, [r10]
+	ldrh	r2, [r4, #2]
+	subs	r3, r3, #1
 	cmp	r2, r3
-	bhi	.L2254
-	ldr	r3, .L2255+4
-	mov	r8, #0
-	ldr	fp, .L2255+28
-	ldrh	r5, [r3]
-	lsr	r5, r0, r5
-	lsls	r3, r5, #2
-	str	r3, [sp]
-.L2247:
-	cbnz	r6, .L2253
-.L2245:
-	mov	r0, r8
-	add	sp, sp, #56
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2253:
-	ldr	r3, .L2255+8
-	mov	r0, r7
-	ldr	r2, [sp]
-	ldr	r3, [r3]
-	ldr	r3, [r3, r2]
-	ldr	r2, .L2255+12
+	bge	.L2219
+	ldrh	r2, [r4]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L2220
+.L2219:
+	mov	r0, r4
+	bl	Ftl_write_map_blk_to_last_page
+.L2220:
+	ldr	r3, .L2243+4
+	ldr	r2, [r3]
 	str	r3, [sp, #8]
-	ldrh	r4, [r2]
-	mov	r1, r4
-	bl	__aeabi_uidivmod
-	subs	r4, r4, r1
-	ldr	r3, [sp, #8]
-	uxth	r4, r4
-	str	r1, [sp, #4]
-	cmp	r6, r4
-	it	cc
-	uxthcc	r4, r6
-	lsls	r2, r4, #9
-	str	r2, [sp, #8]
-	cmp	r3, #0
-	beq	.L2249
-	ldr	r2, [fp]
-	add	r0, sp, #20
-	str	r3, [sp, #24]
+	cmp	r2, #0
+	bne	.L2238
+	ldrh	r2, [r4]
+	ldr	r3, [r4, #12]
+	ldrh	r3, [r3, r2, lsl #1]
+	cbnz	r3, .L2222
+	ldr	r1, .L2243+8
+	movw	r2, #865
+	ldr	r0, .L2243+12
+	bl	printf
+	ldr	r1, .L2243+16
+	ldr	r0, .L2243+20
+	bl	printf
+.L2222:
+	ldrh	r2, [r4]
+	ldrh	r3, [r4, #10]
+	cmp	r2, r3
+	bcc	.L2223
+	ldr	r1, .L2243+8
+	movw	r2, #866
+	ldr	r0, .L2243+12
+	bl	printf
+	ldr	r1, .L2243+16
+	ldr	r0, .L2243+20
+	bl	printf
+.L2223:
+	ldrh	r2, [r4]
+	movs	r1, #0
+	ldr	r3, [r4, #12]
+	ldr	r5, .L2243+24
+	ldrh	r7, [r3, r2, lsl #1]
+	movs	r2, #16
+	ldrh	r3, [r4, #2]
+	mov	fp, r5
+	orr	r3, r3, r7, lsl #10
+	str	r3, [r5, #4]
+	ldr	r3, [sp, #4]
+	str	r3, [r5, #8]
+	ldr	r3, .L2243+28
+	ldr	r0, [r3]
+	str	r0, [r5, #12]
+	bl	ftl_memset
+	ldr	r3, [r5, #12]
+	ldr	r2, [r4, #28]
 	str	r3, [sp, #12]
-	str	r2, [sp, #28]
-	movs	r2, #0
-	str	r2, [sp, #32]
-	movs	r2, #1
-	mov	r1, r2
-	bl	FlashReadPages
-	ldr	r2, [sp, #20]
+	str	r2, [r3, #4]
+	ldrh	r2, [r4, #4]
+	strh	r8, [r3, #8]	@ movhi
+	strh	r7, [r3, #2]	@ movhi
+	strh	r2, [r3]	@ movhi
+	ldr	r2, .L2243+32
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbz	r2, .L2224
+	ldr	r2, .L2243+36
+	ldr	r0, [r5, #8]
+	ldrh	r1, [r2]
+	bl	js_hash
 	ldr	r3, [sp, #12]
-	adds	r2, r2, #1
-	ldr	r2, .L2255+16
-	it	eq
-	moveq	r8, #-1
-	ldr	r2, [r2]
-	cmp	r2, #256
-	bne	.L2251
+	str	r0, [r3, #12]
+.L2224:
+	movs	r3, #1
+	ldr	r0, .L2243+24
 	mov	r2, r3
-	mov	r1, r5
-	ldr	r0, .L2255+20
-	bl	printf
-	ldr	r2, [fp]
-	mov	r1, r5
-	ldr	r0, .L2255+24
-	bl	FtlMapWritePage
-.L2251:
-	ldr	r1, [fp]
-	lsls	r2, r4, #9
-	ldr	r3, [sp, #4]
-	mov	r0, r10
-	add	r1, r1, r3, lsl #9
-	bl	ftl_memcpy
-.L2252:
-	ldr	r3, [sp, #8]
-	adds	r5, r5, #1
-	subs	r6, r6, r4
-	add	r7, r7, r4
-	add	r10, r10, r3
-	ldr	r3, [sp]
-	adds	r3, r3, #4
-	str	r3, [sp]
-	b	.L2247
-.L2249:
-	lsls	r2, r4, #9
 	mov	r1, r3
-	mov	r0, r10
-	bl	ftl_memset
-	b	.L2252
-.L2254:
-	mov	r8, #-1
-	b	.L2245
-.L2256:
-	.align	2
-.L2255:
-	.word	.LANCHOR50
-	.word	.LANCHOR56
-	.word	.LANCHOR194
-	.word	.LANCHOR55
-	.word	.LANCHOR203
-	.word	.LC42
-	.word	.LANCHOR216
-	.word	.LANCHOR185
-	.size	FtlVendorPartRead, .-FtlVendorPartRead
-	.section	.text.FtlLoadEctTbl,"ax",%progbits
-	.align	1
-	.global	FtlLoadEctTbl
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlLoadEctTbl, %function
-FtlLoadEctTbl:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	movs	r0, #64
-	ldr	r4, .L2259
-	ldr	r5, .L2259+4
-	ldr	r2, [r4]
-	ldrh	r1, [r5]
-	bl	FtlVendorPartRead
-	ldr	r3, [r4]
-	ldr	r2, [r3]
-	ldr	r3, .L2259+8
-	cmp	r2, r3
-	beq	.L2258
-	ldr	r1, .L2259+12
-	ldr	r0, .L2259+16
+	bl	FlashProgPages
+	ldrh	r3, [r4, #2]
+	ldr	r2, [r5]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	adds	r1, r2, #1
+	strh	r3, [r4, #2]	@ movhi
+	bne	.L2225
+	ldr	r1, [r5, #4]
+	adds	r6, r6, #1
+	ldr	r0, .L2243+40
+	uxth	r6, r6
+	bl	printf
+	ldrh	r3, [r4, #2]
+	cmp	r3, #2
+	itttt	ls
+	ldrls	r3, .L2243+44
+	ldrhls	r3, [r3]
+	addls	r3, r3, #-1
+	strhls	r3, [r4, #2]	@ movhi
+	cmp	r6, #3
+	bls	.L2218
+	mov	r2, r6
+	ldr	r1, [fp, #4]
+	ldr	r0, .L2243+48
 	bl	printf
-	ldrh	r2, [r5]
-	movs	r1, #0
-	ldr	r0, [r4]
-	lsls	r2, r2, #9
-	bl	ftl_memset
-.L2258:
+	ldr	r2, [sp, #8]
+	movs	r3, #1
+	str	r3, [r2]
+.L2238:
 	movs	r0, #0
-	pop	{r3, r4, r5, pc}
-.L2260:
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2225:
+	cbz	r2, .L2228
+	cmp	r3, #1
+	strh	r7, [r4, #40]	@ movhi
+	bne	.L2229
+.L2230:
+	movs	r3, #0
+	str	r3, [r4, #36]
+	b	.L2218
+.L2229:
+	cmp	r2, #256
+.L2242:
+	beq	.L2230
+	ldr	r3, [r4, #36]
+	cmp	r3, #0
+	bne	.L2230
+	ldr	r2, [fp, #4]
+	ldr	r3, [r4, #24]
+	str	r2, [r3, r8, lsl #2]
+	b	.L2238
+.L2228:
+	cmp	r3, #1
+	b	.L2242
+.L2244:
 	.align	2
-.L2259:
-	.word	.LANCHOR191
-	.word	.LANCHOR190
-	.word	1112818501
-	.word	.LC43
+.L2243:
+	.word	.LANCHOR170
+	.word	.LANCHOR78
+	.word	.LANCHOR223
+	.word	.LC5
+	.word	.LC6
 	.word	.LC7
-	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
-	.section	.text.Ftl_load_ext_data,"ax",%progbits
+	.word	.LANCHOR211
+	.word	.LANCHOR195
+	.word	.LANCHOR2
+	.word	.LANCHOR57
+	.word	.LC42
+	.word	.LANCHOR53
+	.word	.LC43
+	.size	FtlMapWritePage, .-FtlMapWritePage
+	.section	.text.flush_l2p_region,"ax",%progbits
 	.align	1
-	.global	Ftl_load_ext_data
+	.global	flush_l2p_region
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	Ftl_load_ext_data, %function
-Ftl_load_ext_data:
+	.type	flush_l2p_region, %function
+flush_l2p_region:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	movs	r1, #1
-	ldr	r4, .L2265
-	movs	r0, #0
-	ldr	r5, .L2265+4
-	mov	r2, r4
-	bl	FtlVendorPartRead
-	ldr	r3, [r4]
-	cmp	r3, r5
-	beq	.L2262
-	mov	r2, #512
-	movs	r1, #0
-	mov	r0, r4
-	bl	ftl_memset
-	str	r5, [r4]
-.L2262:
-	ldr	r3, [r4]
-	cmp	r3, r5
-	ldr	r5, .L2265+8
-	bne	.L2263
-	ldr	r2, [r4, #88]
-	ldr	r3, .L2265+12
-	str	r2, [r3]
-	ldr	r2, [r4, #92]
-	ldr	r3, .L2265+16
-	str	r2, [r3]
-	ldr	r2, [r4, #8]
-	ldr	r3, .L2265+20
-	str	r2, [r3]
-	ldr	r2, [r4, #12]
-	ldr	r3, .L2265+24
-	str	r2, [r3]
-	ldr	r2, [r4, #16]
-	ldr	r3, .L2265+28
-	str	r2, [r3]
-	ldr	r2, [r4, #20]
-	ldr	r3, .L2265+32
-	str	r2, [r3]
-	ldr	r3, [r4, #28]
-	ldr	r2, [r4, #32]
-	str	r3, [r5]
-	ldr	r3, .L2265+36
-	str	r2, [r3]
-	ldr	r2, [r4, #36]
-	ldr	r3, .L2265+40
-	str	r2, [r3]
-	ldr	r2, [r4, #40]
-	ldr	r3, .L2265+44
-	str	r2, [r3]
-	ldr	r2, [r4, #44]
-	ldr	r3, .L2265+48
-	str	r2, [r3]
-	ldr	r2, [r4, #48]
-	ldr	r3, .L2265+52
-	str	r2, [r3]
-	ldr	r2, [r4, #60]
-	ldr	r3, .L2265+56
-	str	r2, [r3]
-.L2263:
-	ldr	r3, .L2265+60
-	movs	r2, #0
-	str	r2, [r3]
-	ldr	r2, [r4, #68]
-	ldr	r3, .L2265+64
-	cmp	r2, r3
-	bne	.L2264
-	ldr	r3, .L2265+68
-	movs	r2, #1
-	ldr	r1, .L2265+72
-	ldr	r0, .L2265+76
-	str	r2, [r3]
-	bl	printf
-.L2264:
-	ldr	r3, .L2265+80
-	ldr	r1, .L2265+84
-	ldrh	r2, [r3]
-	ldr	r3, .L2265+88
-	ldrh	r1, [r1]
-	ldr	r0, [r3]
+	movs	r4, #12
+	ldr	r5, .L2246
+	muls	r4, r0, r4
+	ldr	r0, .L2246+4
 	ldr	r3, [r5]
-	mla	r0, r0, r2, r3
-	bl	__aeabi_uidiv
-	ldr	r3, .L2265+92
-	str	r0, [r3]
+	adds	r2, r3, r4
+	ldrh	r1, [r3, r4]
+	ldr	r2, [r2, #8]
+	bl	FtlMapWritePage
+	ldr	r3, [r5]
+	movs	r0, #0
+	add	r4, r4, r3
+	ldr	r3, [r4, #4]
+	bic	r3, r3, #-2147483648
+	str	r3, [r4, #4]
 	pop	{r3, r4, r5, pc}
-.L2266:
+.L2247:
 	.align	2
-.L2265:
-	.word	.LANCHOR138
-	.word	1179929683
-	.word	.LANCHOR168
-	.word	.LANCHOR217
-	.word	.LANCHOR218
-	.word	.LANCHOR161
-	.word	.LANCHOR162
-	.word	.LANCHOR166
-	.word	.LANCHOR165
-	.word	.LANCHOR79
-	.word	.LANCHOR163
-	.word	.LANCHOR164
-	.word	.LANCHOR169
-	.word	.LANCHOR170
-	.word	.LANCHOR158
-	.word	.LANCHOR157
-	.word	305432421
-	.word	.LANCHOR28
-	.word	.LC44
-	.word	.LC7
-	.word	.LANCHOR48
-	.word	.LANCHOR40
-	.word	.LANCHOR167
-	.word	.LANCHOR206
-	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
-	.section	.text.ftl_vendor_read,"ax",%progbits
-	.align	1
-	.global	ftl_vendor_read
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_vendor_read, %function
-ftl_vendor_read:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	add	r0, r0, #256
-	b	FtlVendorPartRead
-	.size	ftl_vendor_read, .-ftl_vendor_read
-	.section	.text.ftl_sys_read,"ax",%progbits
-	.align	1
-	.global	ftl_sys_read
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_sys_read, %function
-ftl_sys_read:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	add	r0, r0, #512
-	b	FtlVendorPartRead
-	.size	ftl_sys_read, .-ftl_sys_read
-	.section	.text.FtlMapBlkWriteDumpData,"ax",%progbits
+.L2246:
+	.word	.LANCHOR98
+	.word	.LANCHOR130
+	.size	flush_l2p_region, .-flush_l2p_region
+	.section	.text.l2p_flush,"ax",%progbits
 	.align	1
-	.global	FtlMapBlkWriteDumpData
+	.global	l2p_flush
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlMapBlkWriteDumpData, %function
-FtlMapBlkWriteDumpData:
+	.type	l2p_flush, %function
+l2p_flush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	mov	r4, r0
-	ldr	r3, [r0, #36]
-	cmp	r3, #0
-	beq	.L2269
-	movs	r3, #0
-	ldrh	r6, [r0, #6]
-	str	r3, [r0, #36]
-	ldr	r3, .L2283
-	ldr	r10, [r0, #24]
-	ldr	r3, [r3]
+	push	{r4, r5, r6, lr}
+	movs	r4, #0
+	ldr	r5, .L2252
+	ldr	r6, .L2252+4
+.L2249:
+	ldrh	r3, [r5]
+	uxth	r0, r4
+	cmp	r3, r0
+	bhi	.L2251
+	movs	r0, #0
+	pop	{r4, r5, r6, pc}
+.L2251:
+	ldr	r2, [r6]
+	uxth	r3, r4
+	movs	r1, #12
+	mla	r3, r1, r3, r2
+	ldr	r3, [r3, #4]
 	cmp	r3, #0
-	bne	.L2269
-	ldr	r3, .L2283+4
-	ldr	r5, .L2283+8
-	ldr	r3, [r3]
-	mov	r7, r5
-	str	r3, [r5, #8]
-	ldr	r3, .L2283+12
-	ldr	r8, [r3]
-	ldrh	r3, [r0, #2]
-	str	r8, [r5, #12]
-	cbz	r3, .L2273
-	ldr	r2, .L2283+16
-	ldrh	r2, [r2]
-	subs	r2, r2, #1
-	cmp	r3, r2
-	bge	.L2273
-	ldrh	r2, [r0]
-	movw	r1, #65535
-	cmp	r2, r1
-	beq	.L2273
-	ldr	r1, [r0, #12]
-	subs	r3, r3, #1
-	mov	r0, r5
-	ldrh	r2, [r1, r2, lsl #1]
-	orr	r3, r3, r2, lsl #10
-	movs	r2, #1
-	mov	r1, r2
-	str	r3, [r5, #4]
-	bl	FlashReadPages
-	ldr	r3, [r5]
-	adds	r3, r3, #1
-	beq	.L2273
-	ldr	r3, [r4, #24]
-	ldrh	r1, [r8, #8]
-	ldr	r2, [r3, r1, lsl #2]
-	ldr	r3, [r5, #4]
+	bge	.L2250
+	bl	flush_l2p_region
+.L2250:
+	adds	r4, r4, #1
+	b	.L2249
+.L2253:
+	.align	2
+.L2252:
+	.word	.LANCHOR67
+	.word	.LANCHOR98
+	.size	l2p_flush, .-l2p_flush
+	.section	.text.FtlVendorPartWrite,"ax",%progbits
+	.align	1
+	.global	FtlVendorPartWrite
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlVendorPartWrite, %function
+FtlVendorPartWrite:
+	@ args = 0, pretend = 0, frame = 56
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2266
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #56
+	str	r2, [sp]
+	adds	r2, r0, r1
+	mov	r7, r0
+	mov	r5, r1
+	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L2273
-	ldr	r2, [r5, #8]
-.L2282:
-	mov	r0, r4
-	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
-	b	FtlMapWritePage
-.L2273:
-	subs	r6, r6, #1
-	uxth	r6, r6
-	ldr	r3, [r10, r6, lsl #2]
-	str	r3, [r7, #4]
-	cbz	r3, .L2274
+	bhi	.L2262
+	ldr	r3, .L2266+4
+	mov	r8, #0
+	ldrh	r6, [r3]
+	lsr	r6, r0, r6
+	lsl	fp, r6, #2
+.L2256:
+	cbnz	r5, .L2261
+.L2254:
+	mov	r0, r8
+	add	sp, sp, #56
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2261:
+	ldr	r3, .L2266+8
+	mov	r0, r7
+	ldr	r10, .L2266+24
+	ldr	r3, [r3]
+	ldr	r2, [r3, fp]
+	ldr	r3, .L2266+12
+	str	r2, [sp, #12]
+	ldrh	r3, [r3]
+	mov	r1, r3
+	str	r3, [sp, #8]
+	bl	__aeabi_uidivmod
+	ldr	r3, [sp, #8]
+	ldr	r2, [sp, #12]
+	str	r1, [sp, #4]
+	subs	r4, r3, r1
+	uxth	r4, r4
+	cmp	r5, r4
+	it	cc
+	uxthcc	r4, r5
+	cbz	r2, .L2258
+	cmp	r4, r3
+	beq	.L2258
+	ldr	r3, [r10]
+	add	r0, sp, #20
+	str	r2, [sp, #24]
 	movs	r2, #1
-	ldr	r0, .L2283+8
 	mov	r1, r2
+	str	r3, [sp, #28]
+	movs	r3, #0
+	str	r3, [sp, #32]
 	bl	FlashReadPages
-.L2275:
-	ldr	r2, [r7, #8]
+.L2259:
+	lsls	r3, r4, #9
+	ldr	r0, [r10]
+	subs	r5, r5, r4
+	mov	r2, r3
+	str	r3, [sp, #8]
+	ldm	sp, {r1, r3}
+	add	r7, r7, r4
+	add	fp, fp, #4
+	add	r0, r0, r3, lsl #9
+	bl	ftl_memcpy
+	ldr	r2, [r10]
 	mov	r1, r6
-	b	.L2282
-.L2274:
-	ldr	r3, .L2283+20
-	movs	r1, #255
-	ldr	r0, [r7, #8]
+	ldr	r0, .L2266+16
+	adds	r6, r6, #1
+	bl	FtlMapWritePage
+	ldr	r3, [sp]
+	adds	r0, r0, #1
+	it	eq
+	moveq	r8, #-1
+	mov	r2, r3
+	ldr	r3, [sp, #8]
+	add	r2, r2, r3
+	str	r2, [sp]
+	b	.L2256
+.L2258:
+	ldr	r3, .L2266+20
+	movs	r1, #0
+	ldr	r0, [r10]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-	b	.L2275
-.L2269:
-	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L2284:
+	b	.L2259
+.L2262:
+	mov	r8, #-1
+	b	.L2254
+.L2267:
 	.align	2
-.L2283:
-	.word	.LANCHOR76
-	.word	.LANCHOR184
-	.word	.LANCHOR203
-	.word	.LANCHOR188
-	.word	.LANCHOR53
+.L2266:
+	.word	.LANCHOR50
+	.word	.LANCHOR56
+	.word	.LANCHOR202
+	.word	.LANCHOR55
+	.word	.LANCHOR224
 	.word	.LANCHOR57
-	.size	FtlMapBlkWriteDumpData, .-FtlMapBlkWriteDumpData
-	.section	.text.FtlScanSysBlk,"ax",%progbits
+	.word	.LANCHOR191
+	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
+	.section	.text.Ftl_save_ext_data,"ax",%progbits
 	.align	1
-	.global	FtlScanSysBlk
+	.global	Ftl_save_ext_data
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlScanSysBlk, %function
-FtlScanSysBlk:
-	@ args = 0, pretend = 0, frame = 32
+	.type	Ftl_save_ext_data, %function
+Ftl_save_ext_data:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r4, #0
-	ldr	r5, .L2367
-	sub	sp, sp, #32
-	mov	r1, r4
-	ldr	r3, .L2367+4
-	ldr	r2, [r5]
-	ldr	r6, .L2367+8
-	strh	r4, [r3]	@ movhi
-	ldr	r3, .L2367+12
-	lsls	r2, r2, #2
-	strh	r4, [r6]	@ movhi
-	ldr	r7, .L2367+16
-	ldr	r0, [r3]
-	bl	ftl_memset
-	ldr	r2, [r5]
-	mov	r1, r4
-	ldr	r3, .L2367+20
-	lsls	r2, r2, #1
-	ldr	r0, [r3]
-	bl	ftl_memset
-	ldrh	r2, [r7]
-	mov	r1, r4
-	ldr	r3, .L2367+24
-	lsls	r2, r2, #2
-	ldr	r0, [r3]
-	bl	ftl_memset
-	ldrh	r2, [r7]
-	mov	r1, r4
-	ldr	r3, .L2367+28
-	lsls	r2, r2, #1
-	ldr	r0, [r3]
-	bl	ftl_memset
-	movs	r2, #16
-	movs	r1, #255
-	ldr	r0, .L2367+32
-	bl	ftl_memset
-	ldr	r3, .L2367+36
-	str	r6, [sp, #12]
-	str	r5, [sp, #16]
-	ldrh	r3, [r3]
-	str	r3, [sp, #4]
-.L2286:
-	ldr	r3, .L2367+40
-	ldr	r2, [sp, #4]
-	ldrh	r3, [r3]
-	cmp	r3, r2
-	bls	.L2328
-	ldr	r3, .L2367+44
-	movs	r5, #0
-	ldr	r1, .L2367+48
-	mov	fp, r5
-	movs	r7, #36
-	ldrh	r8, [r3]
-	ldr	r3, .L2367+52
-	ldr	r2, [r1]
-	ldr	r1, .L2367+56
-	ldr	r6, [r3]
-	ldr	r3, .L2367+60
-	str	r2, [sp, #8]
-	ldrh	r10, [r1]
+	@ link register save eliminated.
+	ldr	r2, .L2270
+	ldr	r3, .L2270+4
+	ldr	r1, [r2]
+	cmp	r1, r3
+	bne	.L2268
+	ldr	r3, .L2270+8
+	movs	r1, #1
+	movs	r0, #0
+	str	r3, [r2, #4]
+	ldr	r3, .L2270+12
 	ldr	r3, [r3]
-	ldr	r2, .L2367+64
-	b	.L2329
-.L2288:
-	ldrb	r0, [r2, r5]	@ zero_extendqisi2
-	ldr	r1, [sp, #4]
-	str	r3, [sp, #28]
-	str	r2, [sp, #24]
-	bl	V2P_block
-	str	r0, [sp, #20]
-	bl	FtlBbmIsBadBlock
-	ldr	r2, [sp, #24]
-	ldr	r3, [sp, #28]
-	cbnz	r0, .L2287
-	ldr	r1, [sp, #20]
-	mla	r0, r7, fp, r6
-	ldr	r4, [sp, #8]
-	lsls	r1, r1, #10
-	str	r3, [r0, #8]
-	str	r1, [r0, #4]
-	mul	r1, r10, fp
-	bic	r1, r1, #3
-	add	r1, r1, r4
-	str	r1, [r0, #12]
-	add	r1, fp, #1
-	uxth	fp, r1
-.L2287:
-	adds	r5, r5, #1
-.L2329:
-	uxth	r1, r5
-	cmp	r8, r1
-	bhi	.L2288
-	cmp	fp, #0
-	bne	.L2289
-.L2327:
-	ldr	r3, [sp, #4]
-	adds	r3, r3, #1
-	uxth	r3, r3
-	str	r3, [sp, #4]
-	b	.L2286
-.L2289:
-	movs	r7, #0
-	movs	r2, #1
-	mov	r1, fp
-	mov	r0, r6
-	bl	FlashReadPages
-.L2290:
-	uxth	r3, r7
-	cmp	fp, r3
-	bls	.L2327
-	ldr	r3, .L2367+52
-	mov	r8, #36
-	mul	r8, r8, r7
+	str	r3, [r2, #88]
+	ldr	r3, .L2270+16
+	ldr	r3, [r3]
+	str	r3, [r2, #92]
+	ldr	r3, .L2270+20
+	ldr	r3, [r3]
+	str	r3, [r2, #8]
+	ldr	r3, .L2270+24
+	ldr	r3, [r3]
+	str	r3, [r2, #12]
+	ldr	r3, .L2270+28
+	ldr	r3, [r3]
+	str	r3, [r2, #16]
+	ldr	r3, .L2270+32
+	ldr	r3, [r3]
+	str	r3, [r2, #20]
+	ldr	r3, .L2270+36
+	ldr	r3, [r3]
+	str	r3, [r2, #28]
+	ldr	r3, .L2270+40
+	ldr	r3, [r3]
+	str	r3, [r2, #32]
+	ldr	r3, .L2270+44
+	ldr	r3, [r3]
+	str	r3, [r2, #36]
+	ldr	r3, .L2270+48
+	ldr	r3, [r3]
+	str	r3, [r2, #40]
+	ldr	r3, .L2270+52
+	ldr	r3, [r3]
+	str	r3, [r2, #44]
+	ldr	r3, .L2270+56
+	ldr	r3, [r3]
+	str	r3, [r2, #48]
+	ldr	r3, .L2270+60
+	ldr	r3, [r3]
+	str	r3, [r2, #60]
+	ldr	r3, .L2270+64
+	ldr	r3, [r3]
+	str	r3, [r2, #64]
+	b	FtlVendorPartWrite
+.L2268:
+	bx	lr
+.L2271:
+	.align	2
+.L2270:
+	.word	.LANCHOR141
+	.word	1179929683
+	.word	1342177379
+	.word	.LANCHOR225
+	.word	.LANCHOR226
+	.word	.LANCHOR166
+	.word	.LANCHOR167
+	.word	.LANCHOR171
+	.word	.LANCHOR170
+	.word	.LANCHOR173
+	.word	.LANCHOR81
+	.word	.LANCHOR168
+	.word	.LANCHOR169
+	.word	.LANCHOR174
+	.word	.LANCHOR175
+	.word	.LANCHOR163
+	.word	.LANCHOR162
+	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
+	.section	.text.FtlEctTblFlush,"ax",%progbits
+	.align	1
+	.global	FtlEctTblFlush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlEctTblFlush, %function
+FtlEctTblFlush:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	ldr	r3, .L2279
 	ldr	r3, [r3]
-	add	r2, r3, r8
-	ldr	r3, [r3, r8]
-	ldr	r5, [r2, #4]
-	ldr	r6, [r2, #12]
-	adds	r3, r3, #1
-	ubfx	r5, r5, #10, #16
-	bne	.L2293
-	mov	r10, #16
-.L2295:
-	ldr	r3, .L2367+52
-	movs	r2, #1
-	mov	r1, r2
-	ldr	r0, [r3]
-	add	r0, r0, r8
-	ldr	r3, [r0, #4]
+	cmp	r3, #0
+	beq	.L2277
+	ldr	r3, .L2279+4
+	ldr	r3, [r3]
+	cmp	r3, #39
+	ite	hi
+	movhi	r3, #32
+	movls	r3, #4
+.L2273:
+	ldr	r1, .L2279+8
+	ldrh	r2, [r1]
+	cmp	r2, #31
+	ittt	ls
+	addls	r2, r2, #1
+	movls	r3, #1
+	strhls	r2, [r1]	@ movhi
+	ldr	r2, .L2279+12
+	cbnz	r0, .L2275
+	ldr	r1, [r2]
+	ldr	r0, [r1, #20]
+	ldr	r1, [r1, #16]
+	add	r3, r3, r0
+	cmp	r1, r3
+	bcc	.L2276
+.L2275:
+	ldr	r2, [r2]
+	movs	r0, #64
+	ldr	r3, [r2, #16]
+	str	r3, [r2, #20]
+	ldr	r3, .L2279+16
+	str	r3, [r2]
+	ldr	r3, .L2279+20
+	ldrh	r1, [r3]
+	lsls	r3, r1, #9
+	str	r3, [r2, #12]
+	ldr	r3, [r2, #8]
 	adds	r3, r3, #1
-	str	r3, [r0, #4]
-	bl	FlashReadPages
-	ldrh	r2, [r6]
+	str	r3, [r2, #8]
+	movs	r3, #0
+	str	r3, [r2, #4]
+	bl	FtlVendorPartWrite
+	bl	Ftl_save_ext_data
+.L2276:
+	movs	r0, #0
+	pop	{r3, pc}
+.L2277:
+	movs	r3, #32
+	b	.L2273
+.L2280:
+	.align	2
+.L2279:
+	.word	.LANCHOR104
+	.word	.LANCHOR175
+	.word	.LANCHOR227
+	.word	.LANCHOR199
+	.word	1112818501
+	.word	.LANCHOR198
+	.size	FtlEctTblFlush, .-FtlEctTblFlush
+	.section	.text.allocate_new_data_superblock,"ax",%progbits
+	.align	1
+	.global	allocate_new_data_superblock
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	allocate_new_data_superblock, %function
+allocate_new_data_superblock:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2308
+	push	{r4, r5, r6, lr}
+	mov	r4, r0
+	ldrh	r5, [r0]
+	ldrh	r3, [r3]
+	cmp	r3, r5
+	bcs	.L2282
+	ldr	r1, .L2308+4
+	movw	r2, #3650
+	ldr	r0, .L2308+8
+	bl	printf
+	ldr	r1, .L2308+12
+	ldr	r0, .L2308+16
+	bl	printf
+.L2282:
+	ldr	r3, .L2308+20
+	ldr	r3, [r3]
+	cmp	r3, #0
+	bne	.L2283
 	movw	r3, #65535
-	cmp	r2, r3
-	ldr	r3, .L2367+52
+	cmp	r5, r3
+	beq	.L2284
+	ldr	r3, .L2308+24
+	mov	r0, r5
 	ldr	r3, [r3]
-	bne	.L2292
-	mov	r2, #-1
-	str	r2, [r3, r8]
-	ldr	r3, .L2367+52
+	ldrh	r3, [r3, r5, lsl #1]
+	cbz	r3, .L2285
+	bl	INSERT_DATA_LIST
+.L2284:
+	movs	r3, #0
+	strb	r3, [r4, #8]
+	ldr	r3, .L2308+28
+	cmp	r4, r3
+	beq	.L2286
+	ldr	r3, .L2308+32
+	ldrh	r2, [r3]
+	cmp	r2, #1
+	beq	.L2286
+	ldr	r3, .L2308+36
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2287
+.L2286:
+	movs	r3, #1
+	strb	r3, [r4, #8]
+.L2288:
+	ldr	r6, .L2308+40
+	movw	r2, #65535
+	ldrh	r0, [r6]
+	cmp	r0, r2
+	beq	.L2293
+	cmp	r5, r0
+	bne	.L2294
+	ldr	r3, .L2308+24
 	ldr	r3, [r3]
-	ldr	r3, [r3, r8]
-	cmp	r3, r2
-	beq	.L2294
-.L2293:
-	ldr	r3, .L2367+68
-	ldr	r2, [r3]
-	ldr	r3, [r6, #4]
-	adds	r1, r2, #1
-	beq	.L2296
-	cmp	r2, r3
-	bhi	.L2297
-.L2296:
-	adds	r2, r3, #1
-	ittt	ne
-	ldrne	r1, .L2367+68
-	addne	r2, r3, #1
-	strne	r2, [r1]
-.L2297:
-	ldrh	r2, [r6]
-	movw	r1, #61604
-	cmp	r2, r1
-	beq	.L2299
-	bhi	.L2300
-	movw	r3, #61574
-	cmp	r2, r3
-	beq	.L2301
-.L2298:
-	adds	r7, r7, #1
-	b	.L2290
-.L2292:
-	ldr	r3, [r3, r8]
-	adds	r3, r3, #1
-	bne	.L2293
-	add	r10, r10, #-1
-	uxth	r10, r10
-	cmp	r10, #0
-	bne	.L2295
+	ldrh	r3, [r3, r0, lsl #1]
+	cbz	r3, .L2295
 .L2294:
-	ldr	r3, .L2367+72
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	cbnz	r1, .L2366
-.L2325:
-	mov	r0, r5
-	bl	FtlFreeSysBlkQueueIn
-	b	.L2298
-.L2300:
-	movw	r3, #61634
-	cmp	r2, r3
-	beq	.L2302
+	bl	update_vpc_list
+.L2295:
 	movw	r3, #65535
-	cmp	r2, r3
-	bne	.L2298
-.L2366:
-	movs	r1, #0
-	b	.L2325
-.L2302:
-	ldr	r3, .L2367+8
-	ldrh	r2, [r3]
-	ldr	r3, .L2367
-	ldr	r3, [r3]
-	cmp	r2, r3
-	bls	.L2304
-	ldr	r1, .L2367+76
-	movw	r2, #1307
-	ldr	r0, .L2367+80
-	bl	printf
-	ldr	r1, .L2367+84
-	ldr	r0, .L2367+88
-	bl	printf
-.L2304:
-	ldr	r3, [sp, #16]
-	ldr	r2, [sp, #12]
-	ldr	r1, [r3]
-	ldrh	r0, [r2]
-	ldr	r2, .L2367+12
-	uxth	r10, r1
-	ldr	ip, [r2]
-	add	r3, r10, #-1
-	sub	r10, r10, r0
-	add	r10, r10, #-1
-	sxth	r3, r3
-	sxth	r10, r10
-.L2305:
-	cmp	r3, r10
-	bgt	.L2311
-	cmp	r3, #0
-	bge	.L2344
-	b	.L2298
-.L2311:
-	ldr	r2, [ip, r3, lsl #2]
-	add	r8, ip, r3, lsl #2
-	ldr	r4, [r6, #4]
-	cmp	r4, r2
-	bls	.L2306
-	ldr	r2, [ip]
-	cbnz	r2, .L2307
-	cmp	r1, r0
-	ittt	ne
-	ldrne	r2, .L2367+8
-	addne	r0, r0, #1
-	strhne	r0, [r2]	@ movhi
-.L2307:
-	ldr	r2, .L2367+20
-	uxth	r10, r3
-	ldr	r0, [r2]
-	movs	r2, #0
-.L2308:
-	uxth	lr, r2
-	sxth	r1, r2
-	cmp	r10, lr
-	bhi	.L2309
-	ldr	r2, [r6, #4]
-	cmp	r3, #0
-	str	r2, [r8]
-	strh	r5, [r0, r3, lsl #1]	@ movhi
-	blt	.L2298
-	ldr	r2, .L2367+8
-	ldrh	r0, [r2]
-	ldr	r2, .L2367
+	strh	r3, [r6]	@ movhi
+.L2293:
+	mov	r0, r4
+	bl	allocate_data_superblock
+	bl	l2p_flush
+	movs	r0, #0
+	bl	FtlEctTblFlush
+	bl	FtlVpcTblFlush
+.L2283:
+	movs	r0, #0
+	pop	{r4, r5, r6, pc}
+.L2285:
+	bl	INSERT_FREE_LIST
+	b	.L2284
+.L2287:
+	ldr	r3, .L2308+44
+	cmp	r4, r3
+	bne	.L2288
+	cmp	r2, #3
+	beq	.L2290
+	ldr	r2, .L2308+48
 	ldr	r2, [r2]
-	subs	r2, r2, r0
-	subs	r2, r2, #1
-	sxth	r2, r2
-	cmp	r3, r2
-	bgt	.L2298
-.L2344:
-	ldr	r2, .L2367+8
-	adds	r0, r0, #1
-	strh	r0, [r2]	@ movhi
-	ldr	r2, [r6, #4]
-	str	r2, [ip, r3, lsl #2]
-	ldr	r2, .L2367+20
-.L2364:
+	cmp	r2, #1
+	bne	.L2291
+.L2290:
+	movs	r2, #1
+	strb	r2, [r3, #8]
+.L2291:
+	ldr	r2, .L2308+52
 	ldr	r2, [r2]
-	strh	r5, [r2, r3, lsl #1]	@ movhi
-	b	.L2298
+	cmp	r2, #0
+	beq	.L2288
+	ldr	r2, .L2308+56
+	ldr	r2, [r2]
+	cmp	r2, #39
+	itt	ls
+	movls	r2, #1
+	strbls	r2, [r3, #8]
+	b	.L2288
 .L2309:
-	add	lr, ip, r1, lsl #2
-	adds	r2, r2, #1
-	ldr	r4, [lr, #4]
-	add	lr, r0, r1, lsl #1
-	ldrh	lr, [lr, #2]
-	str	r4, [ip, r1, lsl #2]
-	strh	lr, [r0, r1, lsl #1]	@ movhi
-	b	.L2308
-.L2306:
-	subs	r3, r3, #1
-	sxth	r3, r3
-	b	.L2305
-.L2368:
 	.align	2
-.L2367:
-	.word	.LANCHOR64
-	.word	.LANCHOR70
-	.word	.LANCHOR128
-	.word	.LANCHOR130
-	.word	.LANCHOR61
-	.word	.LANCHOR129
-	.word	.LANCHOR193
-	.word	.LANCHOR71
-	.word	.LANCHOR210
-	.word	.LANCHOR40
-	.word	.LANCHOR41
-	.word	.LANCHOR38
-	.word	.LANCHOR105
-	.word	.LANCHOR180
-	.word	.LANCHOR58
-	.word	.LANCHOR104
-	.word	.LANCHOR47
-	.word	.LANCHOR159
-	.word	.LANCHOR15
-	.word	.LANCHOR221
+.L2308:
+	.word	.LANCHOR40
+	.word	.LANCHOR228
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-.L2301:
-	ldr	r8, .L2369+20
-	ldr	r10, .L2369+28
-	ldrh	r2, [r8]
-	ldrh	r3, [r10]
+	.word	.LANCHOR78
+	.word	.LANCHOR85
+	.word	.LANCHOR94
+	.word	.LANCHOR44
+	.word	.LANCHOR16
+	.word	.LANCHOR136
+	.word	.LANCHOR93
+	.word	.LANCHOR163
+	.word	.LANCHOR104
+	.word	.LANCHOR175
+	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
+	.section	.text.FtlVendorPartRead,"ax",%progbits
+	.align	1
+	.global	FtlVendorPartRead
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlVendorPartRead, %function
+FtlVendorPartRead:
+	@ args = 0, pretend = 0, frame = 56
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2320
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r10, r2
+	adds	r2, r0, r1
+	sub	sp, sp, #56
+	mov	r7, r0
+	mov	r6, r1
+	ldrh	r3, [r3]
 	cmp	r2, r3
-	bls	.L2314
-	ldr	r1, .L2369
-	movw	r2, #1354
-	ldr	r0, .L2369+4
-	bl	printf
-	ldr	r1, .L2369+8
-	ldr	r0, .L2369+12
-	bl	printf
-.L2314:
-	ldr	r2, .L2369+16
-	ldrh	lr, [r10]
-	ldrh	ip, [r8]
-	ldr	r0, [r2]
-	add	r10, lr, #-1
-	sxth	r3, r10
-	sub	r10, r10, ip
-.L2315:
-	cmp	r3, r10
-	ble	.L2320
-	ldr	r1, [r6, #4]
-	add	r8, r0, r3, lsl #2
-	ldr	r2, [r0, r3, lsl #2]
-	cmp	r1, r2
-	bls	.L2316
-	ldr	r2, [r0]
-	cbnz	r2, .L2317
-	cmp	lr, ip
-	ittt	ne
-	ldrne	r2, .L2369+20
-	addne	ip, ip, #1
-	strhne	ip, [r2]	@ movhi
-.L2317:
-	ldr	r2, .L2369+24
-	uxth	r10, r3
-	ldr	ip, [r2]
-	movs	r2, #0
-.L2318:
-	uxth	lr, r2
-	sxth	r1, r2
-	cmp	r10, lr
 	bhi	.L2319
-	ldr	r2, [r6, #4]
-	str	r2, [r8]
-	strh	r5, [ip, r3, lsl #1]	@ movhi
-.L2320:
-	cmp	r3, #0
-	blt	.L2298
-	ldr	r2, .L2369+28
-	ldr	ip, .L2369+20
-	ldrh	r2, [r2]
-	ldrh	r1, [ip]
-	subs	r2, r2, #1
-	subs	r2, r2, r1
-	sxth	r2, r2
-	cmp	r3, r2
-	bgt	.L2298
-	ldr	r2, [r6, #4]
-	adds	r1, r1, #1
-	strh	r1, [ip]	@ movhi
-	str	r2, [r0, r3, lsl #2]
-	ldr	r2, .L2369+24
-	b	.L2364
-.L2319:
-	add	lr, r0, r1, lsl #2
-	adds	r2, r2, #1
-	ldr	r4, [lr, #4]
-	add	lr, ip, r1, lsl #1
-	ldrh	lr, [lr, #2]
-	str	r4, [r0, r1, lsl #2]
-	strh	lr, [ip, r1, lsl #1]	@ movhi
-	b	.L2318
-.L2316:
-	subs	r3, r3, #1
-	sxth	r3, r3
-	b	.L2315
-.L2299:
-	ldr	r8, .L2369+48
-	movw	r2, #65535
-	ldrh	r1, [r8]
-	cmp	r1, r2
-	bne	.L2322
-.L2365:
-	strh	r5, [r8]	@ movhi
-	str	r3, [r8, #8]
-	b	.L2298
-.L2322:
-	ldrh	r0, [r8, #4]
-	cmp	r0, r2
-	beq	.L2323
-	movs	r1, #1
-	bl	FtlFreeSysBlkQueueIn
-.L2323:
-	ldr	r3, [r6, #4]
-	ldr	r2, [r8, #8]
-	cmp	r2, r3
-	bcs	.L2324
-	ldrh	r2, [r8]
-	strh	r2, [r8, #4]	@ movhi
-	b	.L2365
-.L2324:
-	strh	r5, [r8, #4]	@ movhi
-	b	.L2298
-.L2328:
-	ldr	r3, .L2369+32
-	ldr	r2, [r3]
-	ldrh	r3, [r2]
-	cbz	r3, .L2330
-.L2333:
-	ldr	r3, .L2369+24
-	ldr	r4, [r3]
-	ldrh	r2, [r4]
-	cmp	r2, #0
-	beq	.L2331
-.L2332:
-	ldr	r3, .L2369+36
-	ldrh	r2, [r3]
-	ldr	r3, .L2369+40
-	ldr	r3, [r3]
-	cmp	r2, r3
-	bls	.L2363
-	ldr	r1, .L2369
-	mov	r2, #1488
-	ldr	r0, .L2369+4
-	bl	printf
-	ldr	r1, .L2369+8
-	ldr	r0, .L2369+12
-	bl	printf
-.L2363:
-	movs	r0, #0
-	add	sp, sp, #32
+	ldr	r3, .L2320+4
+	mov	r8, #0
+	ldr	fp, .L2320+28
+	ldrh	r5, [r3]
+	lsr	r5, r0, r5
+	lsls	r3, r5, #2
+	str	r3, [sp]
+.L2312:
+	cbnz	r6, .L2318
+.L2310:
+	mov	r0, r8
+	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2330:
-	ldr	r1, .L2369+36
-	ldrh	r1, [r1]
-	cmp	r1, #0
-	beq	.L2333
-	ldr	r5, .L2369+40
-	ldr	r0, [r5]
-.L2334:
-	sxth	r1, r3
-	cmp	r1, r0
-	bcs	.L2333
-	ldrh	r4, [r2, r1, lsl #1]
-	adds	r3, r3, #1
-	cmp	r4, #0
-	beq	.L2334
-	ldr	r3, .L2369+44
-	movs	r6, #0
-	ldr	r0, [r3]
-	mov	r3, r1
-.L2335:
-	ldr	r4, [r5]
-	cmp	r3, r4
-	bcs	.L2333
-	ldrh	r7, [r2, r3, lsl #1]
-	subs	r4, r3, r1
-	strh	r7, [r2, r4, lsl #1]	@ movhi
-	ldr	r7, [r0, r3, lsl #2]
-	str	r7, [r0, r4, lsl #2]
-	strh	r6, [r2, r3, lsl #1]	@ movhi
-	adds	r3, r3, #1
-	sxth	r3, r3
-	b	.L2335
-.L2331:
-	ldr	r3, .L2369+20
-	ldrh	r3, [r3]
+.L2318:
+	ldr	r3, .L2320+8
+	mov	r0, r7
+	ldr	r2, [sp]
+	ldr	r3, [r3]
+	ldr	r3, [r3, r2]
+	ldr	r2, .L2320+12
+	str	r3, [sp, #8]
+	ldrh	r4, [r2]
+	mov	r1, r4
+	bl	__aeabi_uidivmod
+	subs	r4, r4, r1
+	ldr	r3, [sp, #8]
+	uxth	r4, r4
+	str	r1, [sp, #4]
+	cmp	r6, r4
+	it	cc
+	uxthcc	r4, r6
+	lsls	r2, r4, #9
+	str	r2, [sp, #8]
 	cmp	r3, #0
-	beq	.L2332
-	ldr	r5, .L2369+28
-	ldrh	r1, [r5]
-.L2340:
-	sxth	r3, r2
-	cmp	r3, r1
-	mov	r6, r3
-	bge	.L2332
-	ldrh	r0, [r4, r3, lsl #1]
+	beq	.L2314
+	ldr	r2, [fp]
+	add	r0, sp, #20
+	str	r3, [sp, #24]
+	str	r3, [sp, #12]
+	str	r2, [sp, #28]
+	movs	r2, #0
+	str	r2, [sp, #32]
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+	ldr	r2, [sp, #20]
+	ldr	r3, [sp, #12]
 	adds	r2, r2, #1
-	cmp	r0, #0
-	beq	.L2340
-	ldr	r2, .L2369+16
-	movs	r0, #0
+	ldr	r2, .L2320+16
+	it	eq
+	moveq	r8, #-1
 	ldr	r2, [r2]
-.L2341:
-	ldrh	r1, [r5]
-	cmp	r3, r1
-	bge	.L2332
-	ldrh	r7, [r4, r3, lsl #1]
-	subs	r1, r3, r6
-	strh	r7, [r4, r1, lsl #1]	@ movhi
-	ldr	r7, [r2, r3, lsl #2]
-	str	r7, [r2, r1, lsl #2]
-	adds	r1, r3, #1
-	strh	r0, [r4, r3, lsl #1]	@ movhi
-	sxth	r3, r1
-	b	.L2341
-.L2370:
+	cmp	r2, #256
+	bne	.L2316
+	mov	r2, r3
+	mov	r1, r5
+	ldr	r0, .L2320+20
+	bl	printf
+	ldr	r2, [fp]
+	mov	r1, r5
+	ldr	r0, .L2320+24
+	bl	FtlMapWritePage
+.L2316:
+	ldr	r1, [fp]
+	lsls	r2, r4, #9
+	ldr	r3, [sp, #4]
+	mov	r0, r10
+	add	r1, r1, r3, lsl #9
+	bl	ftl_memcpy
+.L2317:
+	ldr	r3, [sp, #8]
+	adds	r5, r5, #1
+	subs	r6, r6, r4
+	add	r7, r7, r4
+	add	r10, r10, r3
+	ldr	r3, [sp]
+	adds	r3, r3, #4
+	str	r3, [sp]
+	b	.L2312
+.L2314:
+	lsls	r2, r4, #9
+	mov	r1, r3
+	mov	r0, r10
+	bl	ftl_memset
+	b	.L2317
+.L2319:
+	mov	r8, #-1
+	b	.L2310
+.L2321:
 	.align	2
-.L2369:
-	.word	.LANCHOR221
-	.word	.LC5
-	.word	.LC6
-	.word	.LC7
-	.word	.LANCHOR193
-	.word	.LANCHOR70
-	.word	.LANCHOR71
-	.word	.LANCHOR61
-	.word	.LANCHOR129
-	.word	.LANCHOR128
-	.word	.LANCHOR64
-	.word	.LANCHOR130
-	.word	.LANCHOR210
-	.size	FtlScanSysBlk, .-FtlScanSysBlk
-	.section	.text.FtlLoadSysInfo,"ax",%progbits
+.L2320:
+	.word	.LANCHOR50
+	.word	.LANCHOR56
+	.word	.LANCHOR202
+	.word	.LANCHOR55
+	.word	.LANCHOR211
+	.word	.LC44
+	.word	.LANCHOR224
+	.word	.LANCHOR191
+	.size	FtlVendorPartRead, .-FtlVendorPartRead
+	.section	.text.FtlLoadEctTbl,"ax",%progbits
 	.align	1
-	.global	FtlLoadSysInfo
+	.global	FtlLoadEctTbl
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlLoadSysInfo, %function
-FtlLoadSysInfo:
-	@ args = 0, pretend = 0, frame = 16
+	.type	FtlLoadEctTbl, %function
+FtlLoadEctTbl:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	push	{r3, r4, r5, lr}
+	movs	r0, #64
+	ldr	r4, .L2324
+	ldr	r5, .L2324+4
+	ldr	r2, [r4]
+	ldrh	r1, [r5]
+	bl	FtlVendorPartRead
+	ldr	r3, [r4]
+	ldr	r2, [r3]
+	ldr	r3, .L2324+8
+	cmp	r2, r3
+	beq	.L2323
+	ldr	r1, .L2324+12
+	ldr	r0, .L2324+16
+	bl	printf
+	ldrh	r2, [r5]
 	movs	r1, #0
-	ldr	r7, .L2405
-	sub	sp, sp, #40
-	ldr	r6, .L2405+4
-	ldr	r3, [r7]
-	ldr	r4, .L2405+8
-	ldr	r8, .L2405+52
-	ldrh	r2, [r6]
-	ldr	r5, .L2405+12
-	str	r3, [r4, #8]
-	ldr	r3, [r8]
-	lsls	r2, r2, #1
-	ldr	r0, [r5]
-	str	r3, [r4, #12]
+	ldr	r0, [r4]
+	lsls	r2, r2, #9
 	bl	ftl_memset
-	ldr	r3, .L2405+16
-	movw	r2, #65535
-	str	r8, [sp, #24]
-	str	r5, [sp, #28]
-	ldrh	r0, [r3]
-	mov	fp, r3
-	cmp	r0, r2
-	bne	.L2372
-.L2384:
-	mov	r0, #-1
-.L2371:
-	add	sp, sp, #40
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2372:
-	movs	r1, #1
-	bl	FtlGetLastWrittenPage
-	ldrsh	r10, [fp]
-	sxth	r5, r0
-	adds	r0, r0, #1
-	strh	r0, [fp, #2]	@ movhi
-.L2374:
-	cmp	r5, #0
-	bge	.L2380
-	movw	r2, #1557
-	ldr	r1, .L2405+20
-	ldr	r0, .L2405+24
-	bl	printf
-	ldr	r1, .L2405+28
-	ldr	r0, .L2405+32
-	bl	printf
-	b	.L2379
-.L2380:
-	orr	r3, r5, r10, lsl #10
-	movs	r2, #1
-	mov	r1, r2
-	ldr	r0, .L2405+8
-	str	r3, [r4, #4]
-	ldr	r3, [r7]
-	str	r3, [r4, #8]
-	bl	FlashReadPages
-	ldr	r3, .L2405+36
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #0
-	beq	.L2375
-	ldr	r8, [r4, #12]
-	ldr	r3, [r8, #12]
-	str	r3, [sp, #36]
-	cmp	r3, #0
-	beq	.L2375
-	ldr	r2, [r4, #8]
-	ldr	r1, .L2405+40
-	mov	r0, r2
-	str	r2, [sp, #32]
-	ldrh	r1, [r1]
-	bl	js_hash
-	ldr	r3, [sp, #36]
-	cmp	r3, r0
-	beq	.L2375
-	cmp	r5, #0
-	bne	.L2376
-	ldr	r2, .L2405+16
-	ldrh	r1, [r2, #4]
-	cmp	r10, r1
-	beq	.L2376
-	ldrh	r1, [r2]
-	ldr	r2, [sp, #32]
-	ldr	r0, .L2405+44
-	ldr	r2, [r2]
-	str	r3, [sp, #12]
-	str	r2, [sp, #16]
-	ldr	r3, [r8, #8]
-	str	r3, [sp, #8]
-	ldr	r3, [r8, #4]
-	str	r3, [sp, #4]
-	ldr	r3, [r8]
-	str	r3, [sp]
-	ldm	r4, {r2, r3}
-	bl	printf
-	ldr	r3, .L2405+16
-	ldrsh	r10, [r3, #4]
-	ldr	r3, .L2405+48
-	ldrh	r5, [r3]
-.L2378:
-	subs	r5, r5, #1
-	sxth	r5, r5
-	b	.L2374
-.L2406:
+.L2323:
+	movs	r0, #0
+	pop	{r3, r4, r5, pc}
+.L2325:
 	.align	2
-.L2405:
-	.word	.LANCHOR183
-	.word	.LANCHOR40
-	.word	.LANCHOR203
-	.word	.LANCHOR83
-	.word	.LANCHOR210
-	.word	.LANCHOR222
-	.word	.LC5
-	.word	.LC6
-	.word	.LC7
-	.word	.LANCHOR2
-	.word	.LANCHOR57
+.L2324:
+	.word	.LANCHOR199
+	.word	.LANCHOR198
+	.word	1112818501
 	.word	.LC45
-	.word	.LANCHOR53
-	.word	.LANCHOR188
-.L2376:
-	mov	r3, #-1
-	str	r3, [r4]
-.L2375:
-	ldr	r3, [r4]
-	adds	r3, r3, #1
-	beq	.L2378
-	ldr	r3, [r7]
-	ldr	r2, .L2407
-	ldr	r3, [r3]
-	cmp	r3, r2
-	bne	.L2378
-	ldr	r3, [sp, #24]
-	ldr	r3, [r3]
-	ldrh	r2, [r3]
-	movw	r3, #61604
-	cmp	r2, r3
-	bne	.L2378
-.L2379:
-	ldr	r2, .L2407+4
-	ldrh	r3, [r6]
-	ldrh	r2, [r2]
-	adds	r3, r3, #24
-	cmp	r2, r3, lsl #1
-	bcs	.L2382
-	ldr	r1, .L2407+8
-	movw	r2, #1559
-	ldr	r0, .L2407+12
-	bl	printf
-	ldr	r1, .L2407+16
-	ldr	r0, .L2407+20
-	bl	printf
-.L2382:
-	movs	r2, #48
-	ldr	r1, [r4, #8]
-	ldr	r0, .L2407+24
-	bl	ftl_memcpy
-	ldrh	r2, [r6]
-	ldr	r3, [sp, #28]
-	ldr	r1, [r4, #8]
-	lsls	r2, r2, #1
-	ldr	r0, [r3]
-	adds	r1, r1, #48
-	bl	ftl_memcpy
-	ldrh	r1, [r6]
-	ldr	r3, [r4, #8]
-	lsrs	r2, r1, #3
-	adds	r1, r1, #24
-	lsls	r1, r1, #1
-	adds	r2, r2, #4
-	bic	r1, r1, #3
-	add	r1, r1, r3
-	ldr	r3, .L2407+28
-	ldr	r0, [r3]
-	bl	ftl_memcpy
-	ldr	r3, .L2407+32
-	ldrh	r3, [r3]
-	cbz	r3, .L2383
-	ldrh	r1, [r6]
-	ldr	r3, .L2407+36
-	ldrh	r2, [r3]
-	lsrs	r3, r1, #3
-	add	r3, r3, r1, lsl #1
-	ldr	r1, [r4, #8]
-	adds	r3, r3, #52
-	lsls	r2, r2, #2
-	ubfx	r3, r3, #2, #14
-	add	r1, r1, r3, lsl #2
-	ldr	r3, .L2407+40
-	ldr	r0, [r3]
-	bl	ftl_memcpy
-.L2383:
-	ldr	r4, .L2407+24
-	ldr	r3, .L2407
-	ldr	r2, [r4]
-	cmp	r2, r3
-	bne	.L2384
-	ldr	r3, .L2407+44
-	ldrb	r2, [r4, #10]	@ zero_extendqisi2
-	ldrh	r5, [r4, #8]
-	ldrh	r3, [r3]
-	strh	r5, [fp, #6]	@ movhi
-	cmp	r2, r3
-	bne	.L2384
-	ldr	r3, .L2407+48
-	ldr	r2, .L2407+52
-	str	r5, [r3]
-	ldr	r3, .L2407+56
-	ldrh	r3, [r3]
-	muls	r3, r5, r3
-	str	r3, [r2]
-	ldr	r2, .L2407+60
-	ldrh	r2, [r2]
-	muls	r3, r2, r3
-	ldr	r2, .L2407+64
-	str	r3, [r2]
-	ldr	r3, .L2407+68
-	ldr	r6, [r3]
-	ldr	r3, .L2407+72
-	ldrh	r0, [r3, #6]
-	ldr	r3, .L2407+76
-	subs	r0, r6, r0
-	ldrh	r1, [r3]
-	subs	r0, r0, r5
-	bl	__aeabi_uidiv
-	ldr	r3, .L2407+80
-	cmp	r5, r6
-	strh	r0, [r3]	@ movhi
-	bls	.L2385
-	ldr	r1, .L2407+8
-	movw	r2, #1586
-	ldr	r0, .L2407+12
-	bl	printf
-	ldr	r1, .L2407+16
-	ldr	r0, .L2407+20
-	bl	printf
-.L2385:
-	ldrh	r2, [r4, #16]
-	ldr	r3, .L2407+84
-	ldrh	ip, [r4, #14]
-	ldr	r7, .L2407+88
-	lsrs	r1, r2, #6
-	and	r2, r2, #63
-	strb	r2, [r3, #6]
-	ldrb	r2, [r4, #11]	@ zero_extendqisi2
-	strh	r1, [r3, #2]	@ movhi
-	ldr	r1, .L2407+92
-	strb	r2, [r3, #8]
-	ldrh	r2, [r4, #18]
-	strh	ip, [r3]	@ movhi
-	movw	r3, #65535
-	strh	r3, [r7]	@ movhi
-	movs	r3, #0
-	strh	r2, [r1]	@ movhi
-	ldrh	r2, [r4, #20]
-	strh	r3, [r7, #2]	@ movhi
-	strb	r3, [r7, #6]
-	strb	r3, [r7, #8]
-	lsrs	r5, r2, #6
-	and	r2, r2, #63
-	strb	r2, [r1, #6]
-	ldrb	r2, [r4, #12]	@ zero_extendqisi2
-	strh	r5, [r1, #2]	@ movhi
-	ldrh	r5, [r4, #22]
-	strb	r2, [r1, #8]
-	ldr	r2, .L2407+96
-	strh	r5, [r2]	@ movhi
-	ldrh	r5, [r4, #24]
-	lsrs	r6, r5, #6
-	and	r5, r5, #63
-	strb	r5, [r2, #6]
-	ldrb	r5, [r4, #13]	@ zero_extendqisi2
-	strh	r6, [r2, #2]	@ movhi
-	ldr	r6, [r4, #32]
-	strb	r5, [r2, #8]
-	ldr	r5, .L2407+100
-	str	r3, [r5]
-	ldr	r5, .L2407+104
-	str	r3, [r5]
-	ldr	r5, .L2407+108
-	str	r3, [r5]
-	ldr	r5, .L2407+112
-	str	r3, [r5]
-	ldr	r5, .L2407+116
-	str	r6, [r5]
-	mov	r6, r1
-	ldr	r5, .L2407+120
-	str	r3, [r5]
-	ldr	r5, .L2407+124
-	str	r3, [r5]
-	ldr	r5, .L2407+128
-	ldr	lr, [r4, #40]
+	.word	.LC7
+	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
+	.section	.text.Ftl_load_ext_data,"ax",%progbits
+	.align	1
+	.global	Ftl_load_ext_data
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	Ftl_load_ext_data, %function
+Ftl_load_ext_data:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	movs	r1, #1
+	ldr	r4, .L2331
+	movs	r0, #0
+	ldr	r5, .L2331+4
+	mov	r2, r4
+	bl	FtlVendorPartRead
+	ldr	r3, [r4]
+	cmp	r3, r5
+	beq	.L2327
+	mov	r2, #512
+	movs	r1, #0
+	mov	r0, r4
+	bl	ftl_memset
+	str	r5, [r4]
+.L2327:
+	ldr	r3, [r4]
+	cmp	r3, r5
+	ldr	r5, .L2331+8
+	bne	.L2328
+	ldr	r2, [r4, #88]
+	ldr	r3, .L2331+12
+	str	r2, [r3]
+	ldr	r2, [r4, #92]
+	ldr	r3, .L2331+16
+	str	r2, [r3]
+	ldr	r2, [r4, #8]
+	ldr	r3, .L2331+20
+	str	r2, [r3]
+	ldr	r2, [r4, #12]
+	ldr	r3, .L2331+24
+	str	r2, [r3]
+	ldr	r2, [r4, #16]
+	ldr	r3, .L2331+28
+	str	r2, [r3]
+	ldr	r2, [r4, #20]
+	ldr	r3, .L2331+32
+	str	r2, [r3]
+	ldr	r3, [r4, #28]
+	ldr	r2, [r4, #32]
 	str	r3, [r5]
-	ldr	r3, .L2407+132
-	ldr	r5, [r3]
-	cmp	lr, r5
-	mov	r5, r2
-	it	hi
-	strhi	lr, [r3]
-	ldr	r3, .L2407+136
+	ldr	r3, .L2331+36
+	str	r2, [r3]
 	ldr	r2, [r4, #36]
-	ldr	r1, [r3]
-	cmp	r2, r1
-	it	hi
-	strhi	r2, [r3]
-	movw	r3, #65535
-	cmp	ip, r3
-	beq	.L2388
-	ldr	r0, .L2407+84
-	bl	make_superblock
-.L2388:
-	ldrh	r2, [r6]
-	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L2389
-	ldr	r0, .L2407+92
-	bl	make_superblock
-.L2389:
-	ldrh	r2, [r5]
-	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L2390
-	ldr	r0, .L2407+96
-	bl	make_superblock
-.L2390:
-	ldrh	r2, [r7]
-	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L2391
-	ldr	r0, .L2407+88
-	bl	make_superblock
-.L2391:
-	movs	r0, #0
-	b	.L2371
-.L2408:
+	ldr	r3, .L2331+40
+	str	r2, [r3]
+	ldr	r2, [r4, #40]
+	ldr	r3, .L2331+44
+	str	r2, [r3]
+	ldr	r2, [r4, #44]
+	ldr	r3, .L2331+48
+	str	r2, [r3]
+	ldr	r2, [r4, #48]
+	ldr	r3, .L2331+52
+	str	r2, [r3]
+	ldr	r2, [r4, #60]
+	ldr	r3, .L2331+56
+	str	r2, [r3]
+.L2328:
+	ldr	r2, .L2331+60
+	movs	r3, #0
+	ldr	r1, [r4, #68]
+	str	r3, [r2]
+	ldr	r2, .L2331+64
+	cmp	r1, r2
+	bne	.L2329
+	ldr	r2, .L2331+68
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbz	r2, .L2330
+	str	r3, [r4, #68]
+	bl	Ftl_save_ext_data
+.L2329:
+	ldr	r3, .L2331+72
+	ldr	r1, .L2331+76
+	ldrh	r2, [r3]
+	ldr	r3, .L2331+80
+	ldrh	r1, [r1]
+	ldr	r0, [r3]
+	ldr	r3, [r5]
+	mla	r0, r0, r2, r3
+	bl	__aeabi_uidiv
+	ldr	r3, .L2331+84
+	str	r0, [r3]
+	pop	{r3, r4, r5, pc}
+.L2330:
+	ldr	r3, .L2331+88
+	movs	r2, #1
+	ldr	r1, .L2331+92
+	ldr	r0, .L2331+96
+	str	r2, [r3]
+	bl	printf
+	b	.L2329
+.L2332:
 	.align	2
-.L2407:
+.L2331:
+	.word	.LANCHOR141
 	.word	1179929683
-	.word	.LANCHOR57
-	.word	.LANCHOR222
-	.word	.LC5
-	.word	.LC6
-	.word	.LC7
-	.word	.LANCHOR80
-	.word	.LANCHOR1
-	.word	.LANCHOR69
-	.word	.LANCHOR66
-	.word	.LANCHOR195
-	.word	.LANCHOR45
-	.word	.LANCHOR223
-	.word	.LANCHOR72
-	.word	.LANCHOR52
-	.word	.LANCHOR55
-	.word	.LANCHOR68
-	.word	.LANCHOR42
-	.word	.LANCHOR74
-	.word	.LANCHOR38
-	.word	.LANCHOR224
-	.word	.LANCHOR91
-	.word	.LANCHOR205
-	.word	.LANCHOR92
-	.word	.LANCHOR93
-	.word	.LANCHOR161
-	.word	.LANCHOR162
+	.word	.LANCHOR173
+	.word	.LANCHOR225
+	.word	.LANCHOR226
 	.word	.LANCHOR166
-	.word	.LANCHOR165
 	.word	.LANCHOR167
+	.word	.LANCHOR171
+	.word	.LANCHOR170
+	.word	.LANCHOR81
 	.word	.LANCHOR168
 	.word	.LANCHOR169
-	.word	.LANCHOR164
-	.word	.LANCHOR159
-	.word	.LANCHOR160
-	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
-	.section	.text.FtlDumpBlockInfo,"ax",%progbits
+	.word	.LANCHOR174
+	.word	.LANCHOR175
+	.word	.LANCHOR163
+	.word	.LANCHOR162
+	.word	305432421
+	.word	.LANCHOR16
+	.word	.LANCHOR48
+	.word	.LANCHOR40
+	.word	.LANCHOR172
+	.word	.LANCHOR214
+	.word	.LANCHOR104
+	.word	.LC46
+	.word	.LC7
+	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
+	.section	.text.FtlMapBlkWriteDumpData,"ax",%progbits
 	.align	1
-	.global	FtlDumpBlockInfo
+	.global	FtlMapBlkWriteDumpData
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlDumpBlockInfo, %function
-FtlDumpBlockInfo:
-	@ args = 0, pretend = 0, frame = 64
+	.type	FtlMapBlkWriteDumpData, %function
+FtlMapBlkWriteDumpData:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	ubfx	r0, r0, #10, #16
-	ldr	r4, .L2421
-	sub	sp, sp, #88
-	mov	r8, r1
-	ldrh	r3, [r4]
-	str	r3, [sp, #24]
-	bl	P2V_block_in_plane
-	ldr	r1, .L2421+4
-	mov	r6, r0
-	ldr	r0, .L2421+8
-	bl	printf
-	ldr	r3, .L2421+12
-	mov	r1, r6
-	ldr	r0, .L2421+16
-	ldr	r3, [r3]
-	ldrh	r2, [r3, r6, lsl #1]
-	bl	printf
-	add	r0, sp, #88
-	strh	r6, [r0, #-48]!	@ movhi
-	bl	make_superblock
-	ldr	r3, .L2421+20
-	ldrb	r5, [r3]	@ zero_extendqisi2
-	cbz	r5, .L2410
-	cmp	r8, #0
-	bne	.L2419
-	mov	r0, r6
-	bl	ftl_get_blk_mode
-	cmp	r0, #1
-	mov	r5, r0
-	bne	.L2410
-	ldr	r3, .L2421+24
-	ldrh	r3, [r3]
-	str	r3, [sp, #24]
-.L2410:
-	movs	r6, #0
-	ldrh	r3, [r4]
-	ldr	r2, [sp, #24]
-	mov	r1, r5
-	ldr	r0, .L2421+28
-	bl	printf
-.L2411:
-	ldr	r3, .L2421+32
-	movs	r2, #0
-	add	ip, sp, #54
-	mov	r4, r2
-	movw	r10, #65535
-	mov	fp, #36
-	ldrh	lr, [r3]
-	ldr	r3, .L2421+36
-	ldr	r0, [r3]
-	ldr	r3, .L2421+40
-	ldr	r3, [r3]
-	str	r3, [sp, #28]
-	ldr	r3, .L2421+44
-	ldrh	r3, [r3]
-	str	r3, [sp, #32]
-	ldr	r3, .L2421+48
-	ldr	r3, [r3]
-	str	r3, [sp, #36]
-	ldr	r3, .L2421+52
-	ldrh	r8, [r3]
-.L2412:
-	uxth	r3, r2
-	cmp	lr, r3
-	bhi	.L2414
-	ldr	fp, .L2421+56
-	mov	r8, #0
-	mov	r10, #36
-	mov	r2, r5
-	mov	r1, r4
-	bl	FlashReadPages
-.L2415:
-	uxth	r3, r8
-	cmp	r4, r3
-	bhi	.L2416
-	adds	r6, r6, #1
-	ldr	r3, [sp, #24]
-	uxth	r6, r6
-	cmp	r3, r6
-	bne	.L2411
-.L2417:
-	movs	r0, #0
-	add	sp, sp, #88
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2419:
-	movs	r5, #0
-	b	.L2410
-.L2414:
-	ldrh	r3, [ip, #2]!
-	cmp	r3, r10
-	beq	.L2413
-	mla	r1, fp, r4, r0
-	ldr	r7, [sp, #28]
-	orr	r3, r6, r3, lsl #10
-	str	r3, [r1, #4]
-	ldr	r3, [sp, #32]
-	muls	r3, r4, r3
-	bic	r3, r3, #3
-	add	r3, r3, r7
-	ldr	r7, [sp, #36]
-	str	r3, [r1, #8]
-	mul	r3, r8, r4
-	adds	r4, r4, #1
-	uxth	r4, r4
-	bic	r3, r3, #3
-	add	r3, r3, r7
-	str	r3, [r1, #12]
-.L2413:
-	adds	r2, r2, #1
-	b	.L2412
-.L2416:
-	ldr	r3, .L2421+36
-	mul	r0, r10, r8
-	ldrh	r1, [sp, #40]
-	add	r8, r8, #1
-	ldr	ip, [r3]
-	add	r2, ip, r0
-	ldr	lr, [r2, #8]
-	ldr	r3, [r2, #12]
-	ldr	r7, [lr, #4]
-	str	r7, [sp, #20]
-	ldr	r7, [lr]
-	str	r7, [sp, #16]
-	ldr	r7, [r3, #12]
-	str	r7, [sp, #12]
-	ldr	r7, [r3, #8]
-	str	r7, [sp, #8]
-	ldr	r7, [r3, #4]
-	str	r7, [sp, #4]
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	mov	r4, r0
+	ldr	r3, [r0, #36]
+	cmp	r3, #0
+	beq	.L2333
+	movs	r3, #0
+	ldrh	r6, [r0, #6]
+	str	r3, [r0, #36]
+	ldr	r3, .L2347
+	ldr	r10, [r0, #24]
 	ldr	r3, [r3]
-	str	r3, [sp]
-	ldr	r3, [r2, #4]
-	ldr	r2, [ip, r0]
-	mov	r0, fp
-	bl	printf
-	b	.L2415
-.L2422:
+	cmp	r3, #0
+	bne	.L2333
+	ldr	r3, .L2347+4
+	ldr	r5, .L2347+8
+	ldr	r3, [r3]
+	mov	r7, r5
+	str	r3, [r5, #8]
+	ldr	r3, .L2347+12
+	ldr	r8, [r3]
+	ldrh	r3, [r0, #2]
+	str	r8, [r5, #12]
+	cbz	r3, .L2337
+	ldr	r2, .L2347+16
+	ldrh	r2, [r2]
+	subs	r2, r2, #1
+	cmp	r3, r2
+	bge	.L2337
+	ldrh	r2, [r0]
+	movw	r1, #65535
+	cmp	r2, r1
+	beq	.L2337
+	ldr	r1, [r0, #12]
+	subs	r3, r3, #1
+	mov	r0, r5
+	ldrh	r2, [r1, r2, lsl #1]
+	orr	r3, r3, r2, lsl #10
+	movs	r2, #1
+	mov	r1, r2
+	str	r3, [r5, #4]
+	bl	FlashReadPages
+	ldr	r3, [r5]
+	adds	r3, r3, #1
+	beq	.L2337
+	ldr	r3, [r4, #24]
+	ldrh	r1, [r8, #8]
+	ldr	r2, [r3, r1, lsl #2]
+	ldr	r3, [r5, #4]
+	cmp	r2, r3
+	bne	.L2337
+	ldr	r2, [r5, #8]
+.L2346:
+	mov	r0, r4
+	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
+	b	FtlMapWritePage
+.L2337:
+	subs	r6, r6, #1
+	uxth	r6, r6
+	ldr	r3, [r10, r6, lsl #2]
+	str	r3, [r7, #4]
+	cbz	r3, .L2338
+	movs	r2, #1
+	ldr	r0, .L2347+8
+	mov	r1, r2
+	bl	FlashReadPages
+.L2339:
+	ldr	r2, [r7, #8]
+	mov	r1, r6
+	b	.L2346
+.L2338:
+	ldr	r3, .L2347+20
+	movs	r1, #255
+	ldr	r0, [r7, #8]
+	ldrh	r2, [r3]
+	bl	ftl_memset
+	b	.L2339
+.L2333:
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L2348:
 	.align	2
-.L2421:
-	.word	.LANCHOR52
-	.word	.LANCHOR225
-	.word	.LC46
-	.word	.LANCHOR83
-	.word	.LC47
-	.word	.LANCHOR15
+.L2347:
+	.word	.LANCHOR78
+	.word	.LANCHOR190
+	.word	.LANCHOR211
+	.word	.LANCHOR195
 	.word	.LANCHOR53
-	.word	.LC48
-	.word	.LANCHOR38
-	.word	.LANCHOR180
-	.word	.LANCHOR104
 	.word	.LANCHOR57
-	.word	.LANCHOR105
-	.word	.LANCHOR58
-	.word	.LC49
-	.size	FtlDumpBlockInfo, .-FtlDumpBlockInfo
-	.section	.text.FtlScanAllBlock,"ax",%progbits
+	.size	FtlMapBlkWriteDumpData, .-FtlMapBlkWriteDumpData
+	.section	.text.FtlScanSysBlk,"ax",%progbits
 	.align	1
-	.global	FtlScanAllBlock
+	.global	FtlScanSysBlk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlScanAllBlock, %function
-FtlScanAllBlock:
-	@ args = 0, pretend = 0, frame = 64
+	.type	FtlScanSysBlk, %function
+FtlScanSysBlk:
+	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #88
-	ldr	r6, .L2433
-	ldr	r1, .L2433+4
-	ldr	r0, .L2433+8
-	bl	printf
-	movs	r3, #0
-	str	r3, [sp, #28]
-.L2424:
-	ldr	r3, .L2433+12
-	ldrh	r0, [sp, #28]
+	movs	r4, #0
+	ldr	r5, .L2431
+	sub	sp, sp, #32
+	mov	r1, r4
+	ldr	r3, .L2431+4
+	ldr	r2, [r5]
+	ldr	r6, .L2431+8
+	strh	r4, [r3]	@ movhi
+	ldr	r3, .L2431+12
+	lsls	r2, r2, #2
+	strh	r4, [r6]	@ movhi
+	ldr	r7, .L2431+16
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldr	r2, [r5]
+	mov	r1, r4
+	ldr	r3, .L2431+20
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldrh	r2, [r7]
+	mov	r1, r4
+	ldr	r3, .L2431+24
+	lsls	r2, r2, #2
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldrh	r2, [r7]
+	mov	r1, r4
+	ldr	r3, .L2431+28
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+	movs	r2, #16
+	movs	r1, #255
+	ldr	r0, .L2431+32
+	bl	ftl_memset
+	ldr	r3, .L2431+36
+	str	r6, [sp, #12]
+	str	r5, [sp, #16]
 	ldrh	r3, [r3]
-	cmp	r3, r0
-	bhi	.L2432
-	movs	r0, #0
-	add	sp, sp, #88
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2432:
-	add	r4, sp, #88
-	add	r7, sp, #54
-	strh	r0, [r4, #-48]!	@ movhi
-	movw	r10, #65535
-	bl	ftl_get_blk_mode
-	ldr	r3, .L2433+16
-	mov	fp, #36
-	ldrh	r1, [sp, #28]
-	ldr	r2, [r3]
-	mov	r3, r0
-	ldr	r0, .L2433+20
-	ldrh	r2, [r2, r1, lsl #1]
-	bl	printf
-	mov	r0, r4
-	bl	make_superblock
-	ldr	r3, .L2433+24
-	movs	r2, #0
-	ldr	r0, [r6]
-	mov	r4, r2
-	ldrh	lr, [r3]
-	ldr	r3, .L2433+28
-	ldr	r3, [r3]
-	str	r3, [sp, #32]
-	ldr	r3, .L2433+32
-	ldrh	ip, [r3]
-	ldr	r3, .L2433+36
-	ldr	r3, [r3]
-	str	r3, [sp, #36]
-	ldr	r3, .L2433+40
+	str	r3, [sp, #4]
+.L2350:
+	ldr	r3, .L2431+40
+	ldr	r2, [sp, #4]
+	ldrh	r3, [r3]
+	cmp	r3, r2
+	bls	.L2392
+	ldr	r3, .L2431+44
+	movs	r5, #0
+	ldr	r1, .L2431+48
+	mov	fp, r5
+	movs	r7, #36
 	ldrh	r8, [r3]
-.L2425:
-	uxth	r3, r2
-	cmp	lr, r3
-	bhi	.L2427
-	ldr	r10, .L2433+44
-	movs	r7, #0
-	mov	r8, #36
-	movs	r2, #0
-	mov	r1, r4
-	bl	FlashReadPages
-.L2428:
-	uxth	r3, r7
-	cmp	r4, r3
-	bhi	.L2429
-	ldr	r10, .L2433+48
+	ldr	r3, .L2431+52
+	ldr	r2, [r1]
+	ldr	r1, .L2431+56
+	ldr	r6, [r3]
+	ldr	r3, .L2431+60
+	str	r2, [sp, #8]
+	ldrh	r10, [r1]
+	ldr	r3, [r3]
+	ldr	r2, .L2431+64
+	b	.L2393
+.L2352:
+	ldrb	r0, [r2, r5]	@ zero_extendqisi2
+	ldr	r1, [sp, #4]
+	str	r3, [sp, #28]
+	str	r2, [sp, #24]
+	bl	V2P_block
+	str	r0, [sp, #20]
+	bl	FtlBbmIsBadBlock
+	ldr	r2, [sp, #24]
+	ldr	r3, [sp, #28]
+	cbnz	r0, .L2351
+	ldr	r1, [sp, #20]
+	mla	r0, r7, fp, r6
+	ldr	r4, [sp, #8]
+	lsls	r1, r1, #10
+	str	r3, [r0, #8]
+	str	r1, [r0, #4]
+	mul	r1, r10, fp
+	bic	r1, r1, #3
+	add	r1, r1, r4
+	str	r1, [r0, #12]
+	add	r1, fp, #1
+	uxth	fp, r1
+.L2351:
+	adds	r5, r5, #1
+.L2393:
+	uxth	r1, r5
+	cmp	r8, r1
+	bhi	.L2352
+	cmp	fp, #0
+	bne	.L2353
+.L2391:
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	str	r3, [sp, #4]
+	b	.L2350
+.L2353:
 	movs	r7, #0
-	mov	r8, #36
 	movs	r2, #1
-	mov	r1, r4
-	ldr	r0, [r6]
+	mov	r1, fp
+	mov	r0, r6
 	bl	FlashReadPages
-.L2430:
+.L2354:
 	uxth	r3, r7
-	cmp	r4, r3
-	bhi	.L2431
-	ldr	r3, [sp, #28]
+	cmp	fp, r3
+	bls	.L2391
+	ldr	r3, .L2431+52
+	mov	r8, #36
+	mul	r8, r8, r7
+	ldr	r3, [r3]
+	add	r2, r3, r8
+	ldr	r3, [r3, r8]
+	ldr	r5, [r2, #4]
+	ldr	r6, [r2, #12]
 	adds	r3, r3, #1
-	str	r3, [sp, #28]
-	b	.L2424
-.L2427:
-	ldrh	r3, [r7, #2]!
-	cmp	r3, r10
-	beq	.L2426
-	mla	r1, fp, r4, r0
-	ldr	r5, [sp, #32]
-	lsls	r3, r3, #10
-	str	r3, [r1, #4]
-	mul	r3, ip, r4
-	bic	r3, r3, #3
-	add	r3, r3, r5
-	ldr	r5, [sp, #36]
-	str	r3, [r1, #8]
-	mul	r3, r8, r4
-	adds	r4, r4, #1
-	uxth	r4, r4
-	bic	r3, r3, #3
-	add	r3, r3, r5
-	str	r3, [r1, #12]
-.L2426:
-	adds	r2, r2, #1
-	b	.L2425
-.L2429:
-	mul	r2, r8, r7
-	ldr	r0, [r6]
-	ldrh	r1, [sp, #40]
-	adds	r7, r7, #1
-	add	lr, r0, r2
-	ldr	fp, [lr, #8]
-	ldr	r3, [lr, #12]
-	ldr	r5, [fp, #4]
-	str	r5, [sp, #20]
-	ldr	r5, [fp]
-	str	r5, [sp, #16]
-	ldr	r5, [r3, #12]
-	str	r5, [sp, #12]
-	ldr	r5, [r3, #8]
-	str	r5, [sp, #8]
-	ldr	r5, [r3, #4]
-	str	r5, [sp, #4]
+	ubfx	r5, r5, #10, #16
+	bne	.L2357
+	mov	r10, #16
+.L2359:
+	ldr	r3, .L2431+52
+	movs	r2, #1
+	mov	r1, r2
+	ldr	r0, [r3]
+	add	r0, r0, r8
+	ldr	r3, [r0, #4]
+	adds	r3, r3, #1
+	str	r3, [r0, #4]
+	bl	FlashReadPages
+	ldrh	r2, [r6]
+	movw	r3, #65535
+	cmp	r2, r3
+	ldr	r3, .L2431+52
 	ldr	r3, [r3]
-	str	r3, [sp]
-	ldr	r2, [r0, r2]
-	mov	r0, r10
-	ldr	r3, [lr, #4]
-	bl	printf
-	b	.L2428
-.L2431:
-	mul	r2, r8, r7
-	ldr	r0, [r6]
-	ldrh	r1, [sp, #40]
+	bne	.L2356
+	mov	r2, #-1
+	str	r2, [r3, r8]
+	ldr	r3, .L2431+52
+	ldr	r3, [r3]
+	ldr	r3, [r3, r8]
+	cmp	r3, r2
+	beq	.L2358
+.L2357:
+	ldr	r3, .L2431+68
+	ldr	r2, [r3]
+	ldr	r3, [r6, #4]
+	adds	r1, r2, #1
+	beq	.L2360
+	cmp	r2, r3
+	bhi	.L2361
+.L2360:
+	adds	r2, r3, #1
+	ittt	ne
+	ldrne	r1, .L2431+68
+	addne	r2, r3, #1
+	strne	r2, [r1]
+.L2361:
+	ldrh	r2, [r6]
+	movw	r1, #61604
+	cmp	r2, r1
+	beq	.L2363
+	bhi	.L2364
+	movw	r3, #61574
+	cmp	r2, r3
+	beq	.L2365
+.L2362:
 	adds	r7, r7, #1
-	add	lr, r0, r2
-	ldr	fp, [lr, #8]
-	ldr	r3, [lr, #12]
-	ldr	r5, [fp, #4]
-	str	r5, [sp, #20]
-	ldr	r5, [fp]
-	str	r5, [sp, #16]
-	ldr	r5, [r3, #12]
-	str	r5, [sp, #12]
-	ldr	r5, [r3, #8]
-	str	r5, [sp, #8]
-	ldr	r5, [r3, #4]
-	str	r5, [sp, #4]
+	b	.L2354
+.L2356:
+	ldr	r3, [r3, r8]
+	adds	r3, r3, #1
+	bne	.L2357
+	add	r10, r10, #-1
+	uxth	r10, r10
+	cmp	r10, #0
+	bne	.L2359
+.L2358:
+	ldr	r3, .L2431+72
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	cbnz	r1, .L2430
+.L2389:
+	mov	r0, r5
+	bl	FtlFreeSysBlkQueueIn
+	b	.L2362
+.L2364:
+	movw	r3, #61634
+	cmp	r2, r3
+	beq	.L2366
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L2362
+.L2430:
+	movs	r1, #0
+	b	.L2389
+.L2366:
+	ldr	r3, .L2431+8
+	ldrh	r2, [r3]
+	ldr	r3, .L2431
 	ldr	r3, [r3]
-	str	r3, [sp]
-	ldr	r2, [r0, r2]
-	mov	r0, r10
-	ldr	r3, [lr, #4]
+	cmp	r2, r3
+	bls	.L2368
+	ldr	r1, .L2431+76
+	movw	r2, #1469
+	ldr	r0, .L2431+80
 	bl	printf
-	b	.L2430
-.L2434:
+	ldr	r1, .L2431+84
+	ldr	r0, .L2431+88
+	bl	printf
+.L2368:
+	ldr	r3, [sp, #16]
+	ldr	r2, [sp, #12]
+	ldr	r1, [r3]
+	ldrh	r0, [r2]
+	ldr	r2, .L2431+12
+	uxth	r10, r1
+	ldr	ip, [r2]
+	add	r3, r10, #-1
+	sub	r10, r10, r0
+	add	r10, r10, #-1
+	sxth	r3, r3
+	sxth	r10, r10
+.L2369:
+	cmp	r3, r10
+	bgt	.L2375
+	cmp	r3, #0
+	bge	.L2408
+	b	.L2362
+.L2375:
+	ldr	r2, [ip, r3, lsl #2]
+	add	r8, ip, r3, lsl #2
+	ldr	r4, [r6, #4]
+	cmp	r4, r2
+	bls	.L2370
+	ldr	r2, [ip]
+	cbnz	r2, .L2371
+	cmp	r1, r0
+	ittt	ne
+	ldrne	r2, .L2431+8
+	addne	r0, r0, #1
+	strhne	r0, [r2]	@ movhi
+.L2371:
+	ldr	r2, .L2431+20
+	uxth	r10, r3
+	ldr	r0, [r2]
+	movs	r2, #0
+.L2372:
+	uxth	lr, r2
+	sxth	r1, r2
+	cmp	r10, lr
+	bhi	.L2373
+	ldr	r2, [r6, #4]
+	cmp	r3, #0
+	str	r2, [r8]
+	strh	r5, [r0, r3, lsl #1]	@ movhi
+	blt	.L2362
+	ldr	r2, .L2431+8
+	ldrh	r0, [r2]
+	ldr	r2, .L2431
+	ldr	r2, [r2]
+	subs	r2, r2, r0
+	subs	r2, r2, #1
+	sxth	r2, r2
+	cmp	r3, r2
+	bgt	.L2362
+.L2408:
+	ldr	r2, .L2431+8
+	adds	r0, r0, #1
+	strh	r0, [r2]	@ movhi
+	ldr	r2, [r6, #4]
+	str	r2, [ip, r3, lsl #2]
+	ldr	r2, .L2431+20
+.L2428:
+	ldr	r2, [r2]
+	strh	r5, [r2, r3, lsl #1]	@ movhi
+	b	.L2362
+.L2373:
+	add	lr, ip, r1, lsl #2
+	adds	r2, r2, #1
+	ldr	r4, [lr, #4]
+	add	lr, r0, r1, lsl #1
+	ldrh	lr, [lr, #2]
+	str	r4, [ip, r1, lsl #2]
+	strh	lr, [r0, r1, lsl #1]	@ movhi
+	b	.L2372
+.L2370:
+	subs	r3, r3, #1
+	sxth	r3, r3
+	b	.L2369
+.L2432:
 	.align	2
-.L2433:
-	.word	.LANCHOR180
-	.word	.LANCHOR226
-	.word	.LC46
+.L2431:
+	.word	.LANCHOR64
+	.word	.LANCHOR70
+	.word	.LANCHOR131
+	.word	.LANCHOR133
+	.word	.LANCHOR61
+	.word	.LANCHOR132
+	.word	.LANCHOR201
+	.word	.LANCHOR71
+	.word	.LANCHOR218
+	.word	.LANCHOR40
 	.word	.LANCHOR41
-	.word	.LANCHOR83
-	.word	.LC50
 	.word	.LANCHOR38
-	.word	.LANCHOR104
-	.word	.LANCHOR57
-	.word	.LANCHOR105
+	.word	.LANCHOR108
+	.word	.LANCHOR186
 	.word	.LANCHOR58
-	.word	.LC51
-	.word	.LC52
-	.size	FtlScanAllBlock, .-FtlScanAllBlock
-	.section	.text.FtlMapTblRecovery,"ax",%progbits
-	.align	1
-	.global	FtlMapTblRecovery
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlMapTblRecovery, %function
-FtlMapTblRecovery:
-	@ args = 0, pretend = 0, frame = 24
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, [r0, #24]
-	movs	r1, #0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #24
-	ldrh	r7, [r0, #6]
-	mov	r4, r0
-	movs	r6, #0
-	str	r3, [sp]
-	ldr	r3, [r0, #16]
-	ldr	r10, [r0, #12]
-	lsls	r2, r7, #2
-	str	r3, [sp, #12]
-	ldrh	r3, [r0, #8]
-	ldr	r0, [sp]
-	str	r3, [sp, #4]
-	bl	ftl_memset
-	ldr	r2, .L2476
-	ldr	r3, .L2476+4
-	str	r6, [r4, #32]
-	ldr	r1, [r2]
-	mov	fp, r3
-	str	r6, [r4, #28]
-	str	r2, [sp, #8]
-	str	r1, [r3, #8]
-	ldr	r1, .L2476+8
-	ldr	r5, [r1]
-	movw	r1, #65535
-	str	r5, [r3, #12]
-	strh	r1, [r4]	@ movhi
-	strh	r1, [r4, #2]	@ movhi
-	movs	r1, #1
-	str	r1, [r4, #36]
-.L2436:
-	ldr	r2, [sp, #4]
-	sxth	r3, r6
-	cmp	r3, r2
-	bge	.L2455
-	ldr	r2, [sp, #4]
-	lsl	r8, r3, #1
+	.word	.LANCHOR107
+	.word	.LANCHOR47
+	.word	.LANCHOR164
+	.word	.LANCHOR16
+	.word	.LANCHOR229
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+.L2365:
+	ldr	r8, .L2433+20
+	ldr	r10, .L2433+28
+	ldrh	r2, [r8]
+	ldrh	r3, [r10]
+	cmp	r2, r3
+	bls	.L2378
+	ldr	r1, .L2433
+	movw	r2, #1513
+	ldr	r0, .L2433+4
+	bl	printf
+	ldr	r1, .L2433+8
+	ldr	r0, .L2433+12
+	bl	printf
+.L2378:
+	ldr	r2, .L2433+16
+	ldrh	lr, [r10]
+	ldrh	ip, [r8]
+	ldr	r0, [r2]
+	add	r10, lr, #-1
+	sxth	r3, r10
+	sub	r10, r10, ip
+.L2379:
+	cmp	r3, r10
+	ble	.L2384
+	ldr	r1, [r6, #4]
+	add	r8, r0, r3, lsl #2
+	ldr	r2, [r0, r3, lsl #2]
+	cmp	r1, r2
+	bls	.L2380
+	ldr	r2, [r0]
+	cbnz	r2, .L2381
+	cmp	lr, ip
+	ittt	ne
+	ldrne	r2, .L2433+20
+	addne	ip, ip, #1
+	strhne	ip, [r2]	@ movhi
+.L2381:
+	ldr	r2, .L2433+24
+	uxth	r10, r3
+	ldr	ip, [r2]
+	movs	r2, #0
+.L2382:
+	uxth	lr, r2
+	sxth	r1, r2
+	cmp	r10, lr
+	bhi	.L2383
+	ldr	r2, [r6, #4]
+	str	r2, [r8]
+	strh	r5, [ip, r3, lsl #1]	@ movhi
+.L2384:
+	cmp	r3, #0
+	blt	.L2362
+	ldr	r2, .L2433+28
+	ldr	ip, .L2433+20
+	ldrh	r2, [r2]
+	ldrh	r1, [ip]
 	subs	r2, r2, #1
+	subs	r2, r2, r1
+	sxth	r2, r2
 	cmp	r3, r2
-	bne	.L2437
-	ldrh	r0, [r10, r3, lsl #1]
+	bgt	.L2362
+	ldr	r2, [r6, #4]
+	adds	r1, r1, #1
+	strh	r1, [ip]	@ movhi
+	str	r2, [r0, r3, lsl #2]
+	ldr	r2, .L2433+24
+	b	.L2428
+.L2383:
+	add	lr, r0, r1, lsl #2
+	adds	r2, r2, #1
+	ldr	r4, [lr, #4]
+	add	lr, ip, r1, lsl #1
+	ldrh	lr, [lr, #2]
+	str	r4, [r0, r1, lsl #2]
+	strh	lr, [ip, r1, lsl #1]	@ movhi
+	b	.L2382
+.L2380:
+	subs	r3, r3, #1
+	sxth	r3, r3
+	b	.L2379
+.L2363:
+	ldr	r8, .L2433+48
+	movw	r2, #65535
+	ldrh	r1, [r8]
+	cmp	r1, r2
+	bne	.L2386
+.L2429:
+	strh	r5, [r8]	@ movhi
+	str	r3, [r8, #8]
+	b	.L2362
+.L2386:
+	ldrh	r0, [r8, #4]
+	cmp	r0, r2
+	beq	.L2387
 	movs	r1, #1
-	str	r3, [sp, #4]
-	mov	fp, #0
-	bl	FtlGetLastWrittenPage
-	ldr	r3, [sp, #12]
-	add	r8, r8, r10
-	strh	r6, [r4]	@ movhi
-	sxth	r10, r0
-	ldr	r6, .L2476+4
-	adds	r0, r0, #1
-	mov	r2, r3
-	ldr	r3, [sp, #4]
-	strh	r0, [r4, #2]	@ movhi
-	ldr	r3, [r2, r3, lsl #2]
-	str	r3, [r4, #28]
-.L2438:
-	sxth	r2, fp
-	cmp	r2, r10
-	ble	.L2441
-.L2455:
-	mov	r0, r4
-	bl	ftl_free_no_use_map_blk
-	ldr	r3, .L2476+12
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r3]
+	bl	FtlFreeSysBlkQueueIn
+.L2387:
+	ldr	r3, [r6, #4]
+	ldr	r2, [r8, #8]
 	cmp	r2, r3
-	bne	.L2443
-	mov	r0, r4
-	bl	ftl_map_blk_alloc_new_blk
-.L2443:
-	mov	r0, r4
-	bl	ftl_map_blk_gc
-	mov	r0, r4
-	bl	ftl_map_blk_gc
+	bcs	.L2388
+	ldrh	r2, [r8]
+	strh	r2, [r8, #4]	@ movhi
+	b	.L2429
+.L2388:
+	strh	r5, [r8, #4]	@ movhi
+	b	.L2362
+.L2392:
+	ldr	r3, .L2433+32
+	ldr	r2, [r3]
+	ldrh	r3, [r2]
+	cbz	r3, .L2394
+.L2397:
+	ldr	r3, .L2433+24
+	ldr	r4, [r3]
+	ldrh	r2, [r4]
+	cmp	r2, #0
+	beq	.L2395
+.L2396:
+	ldr	r3, .L2433+36
+	ldrh	r2, [r3]
+	ldr	r3, .L2433+40
+	ldr	r3, [r3]
+	cmp	r2, r3
+	bls	.L2427
+	ldr	r1, .L2433
+	movw	r2, #1631
+	ldr	r0, .L2433+4
+	bl	printf
+	ldr	r1, .L2433+8
+	ldr	r0, .L2433+12
+	bl	printf
+.L2427:
 	movs	r0, #0
-	add	sp, sp, #24
+	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2441:
-	ldrh	r1, [r8]
-	ldr	r0, .L2476+4
-	orr	r2, r2, r1, lsl #10
-	str	r2, [r6, #4]
-	movs	r2, #1
-	mov	r1, r2
-	bl	FlashReadPages
-	ldr	r3, .L2476+16
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	cbz	r2, .L2439
-	ldr	r2, [r6, #12]
-	ldr	r2, [r2, #12]
-	str	r2, [sp, #4]
-	cbz	r2, .L2439
-	ldr	r1, .L2476+20
-	ldr	r0, [r6, #8]
+.L2394:
+	ldr	r1, .L2433+36
 	ldrh	r1, [r1]
-	bl	js_hash
-	ldr	r2, [sp, #4]
-	cmp	r2, r0
-	itt	ne
-	movne	r2, #-1
-	strne	r2, [r6]
-.L2439:
-	ldr	r2, [r6]
-	adds	r2, r2, #1
-	beq	.L2440
-	ldrh	r2, [r5, #8]
-	cmp	r7, r2
-	bls	.L2440
-	ldrh	r1, [r4, #4]
-	ldrh	r0, [r5]
-	cmp	r0, r1
-	ittt	eq
-	ldreq	r1, [r6, #4]
-	ldreq	r3, [sp]
-	streq	r1, [r3, r2, lsl #2]
-.L2440:
-	add	fp, fp, #1
-	b	.L2438
-.L2437:
-	ldr	r2, [sp, #8]
-	ldr	r0, .L2476+4
-	ldr	r2, [r2]
-	str	r2, [fp, #8]
-	add	r2, r10, r8
-	ldr	r8, .L2476+12
-	str	r2, [sp, #16]
-	ldrh	r2, [r10, r3, lsl #1]
-	ldrh	r3, [r8]
-	subs	r3, r3, #1
-	orr	r3, r3, r2, lsl #10
-	movs	r2, #1
-	mov	r1, r2
-	str	r3, [fp, #4]
-	bl	FlashReadPages
-	ldr	r3, [fp]
+	cmp	r1, #0
+	beq	.L2397
+	ldr	r5, .L2433+40
+	ldr	r0, [r5]
+.L2398:
+	sxth	r1, r3
+	cmp	r1, r0
+	bcs	.L2397
+	ldrh	r4, [r2, r1, lsl #1]
 	adds	r3, r3, #1
-	beq	.L2457
-	ldrh	r2, [r5]
-	ldrh	r3, [r4, #4]
-	cmp	r2, r3
-	bne	.L2457
-	ldrh	r2, [r5, #8]
-	movw	r3, #64245
-	cmp	r2, r3
-	beq	.L2445
-.L2457:
-	mov	r8, #0
-.L2446:
-	ldr	r2, .L2476+12
-	sxth	r3, r8
-	ldrh	r2, [r2]
-	cmp	r3, r2
-	bge	.L2453
-	ldr	r2, [sp, #16]
-	ldr	r0, .L2476+4
-	ldrh	r2, [r2]
-	orr	r3, r3, r2, lsl #10
-	movs	r2, #1
-	mov	r1, r2
-	str	r3, [fp, #4]
-	bl	FlashReadPages
-	ldr	r3, .L2476+16
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2450
-	ldr	r3, [fp, #12]
-	ldr	r3, [r3, #12]
-	str	r3, [sp, #20]
-	cbz	r3, .L2450
-	ldr	r2, .L2476+20
-	ldr	r0, [fp, #8]
-	ldrh	r1, [r2]
-	bl	js_hash
-	ldr	r3, [sp, #20]
-	cmp	r3, r0
-	itt	ne
-	movne	r3, #-1
-	strne	r3, [fp]
-.L2450:
-	ldr	r3, [fp]
+	cmp	r4, #0
+	beq	.L2398
+	ldr	r3, .L2433+44
+	movs	r6, #0
+	ldr	r0, [r3]
+	mov	r3, r1
+.L2399:
+	ldr	r4, [r5]
+	cmp	r3, r4
+	bcs	.L2397
+	ldrh	r7, [r2, r3, lsl #1]
+	subs	r4, r3, r1
+	strh	r7, [r2, r4, lsl #1]	@ movhi
+	ldr	r7, [r0, r3, lsl #2]
+	str	r7, [r0, r4, lsl #2]
+	strh	r6, [r2, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
-	beq	.L2451
-	ldrh	r3, [r5, #8]
-	cmp	r7, r3
-	bls	.L2451
-	ldrh	r1, [r5]
-	ldrh	r2, [r4, #4]
-	cmp	r1, r2
-	ittt	eq
-	ldreq	r2, [fp, #4]
-	ldreq	r1, [sp]
-	streq	r2, [r1, r3, lsl #2]
-.L2451:
-	add	r8, r8, #1
-	b	.L2446
-.L2445:
-	ldr	r3, [sp, #8]
-	movs	r1, #0
-	ldrh	r2, [r8]
-	ldr	ip, [r3]
-	subs	r2, r2, #1
-.L2447:
-	sxth	r3, r1
-	cmp	r3, r2
-	blt	.L2449
-.L2453:
-	adds	r6, r6, #1
-	b	.L2436
-.L2449:
-	lsls	r0, r3, #3
-	ldr	r3, [ip, r3, lsl #3]
-	adds	r1, r1, #1
-	uxth	lr, r3
-	cmp	r7, lr
-	itttt	hi
-	addhi	r0, r0, ip
-	ldrhi	r3, [sp]
-	ldrhi	r0, [r0, #4]
-	strhi	r0, [r3, lr, lsl #2]
-	b	.L2447
-.L2477:
-	.align	2
-.L2476:
-	.word	.LANCHOR183
-	.word	.LANCHOR203
-	.word	.LANCHOR188
-	.word	.LANCHOR53
-	.word	.LANCHOR2
-	.word	.LANCHOR57
-	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
-	.section	.text.FtlLoadVonderInfo,"ax",%progbits
-	.align	1
-	.global	FtlLoadVonderInfo
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlLoadVonderInfo, %function
-FtlLoadVonderInfo:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	ldr	r3, .L2479
-	ldr	r0, .L2479+4
-	ldrh	r3, [r3]
-	strh	r3, [r0, #10]	@ movhi
-	movw	r3, #61574
-	strh	r3, [r0, #4]	@ movhi
-	ldr	r3, .L2479+8
-	ldrh	r3, [r3]
-	strh	r3, [r0, #8]	@ movhi
-	ldr	r3, .L2479+12
+	sxth	r3, r3
+	b	.L2399
+.L2395:
+	ldr	r3, .L2433+20
 	ldrh	r3, [r3]
-	strh	r3, [r0, #6]	@ movhi
-	ldr	r3, .L2479+16
-	ldr	r3, [r3]
-	str	r3, [r0, #12]
-	ldr	r3, .L2479+20
-	ldr	r3, [r3]
-	str	r3, [r0, #16]
-	ldr	r3, .L2479+24
-	ldr	r3, [r3]
-	str	r3, [r0, #20]
-	ldr	r3, .L2479+28
-	ldr	r3, [r3]
-	str	r3, [r0, #24]
-	bl	FtlMapTblRecovery
+	cmp	r3, #0
+	beq	.L2396
+	ldr	r5, .L2433+28
+	ldrh	r1, [r5]
+.L2404:
+	sxth	r3, r2
+	cmp	r3, r1
+	mov	r6, r3
+	bge	.L2396
+	ldrh	r0, [r4, r3, lsl #1]
+	adds	r2, r2, #1
+	cmp	r0, #0
+	beq	.L2404
+	ldr	r2, .L2433+16
 	movs	r0, #0
-	pop	{r3, pc}
-.L2480:
+	ldr	r2, [r2]
+.L2405:
+	ldrh	r1, [r5]
+	cmp	r3, r1
+	bge	.L2396
+	ldrh	r7, [r4, r3, lsl #1]
+	subs	r1, r3, r6
+	strh	r7, [r4, r1, lsl #1]	@ movhi
+	ldr	r7, [r2, r3, lsl #2]
+	str	r7, [r2, r1, lsl #2]
+	adds	r1, r3, #1
+	strh	r0, [r4, r3, lsl #1]	@ movhi
+	sxth	r3, r1
+	b	.L2405
+.L2434:
 	.align	2
-.L2479:
-	.word	.LANCHOR61
-	.word	.LANCHOR216
+.L2433:
+	.word	.LANCHOR229
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LANCHOR201
 	.word	.LANCHOR70
-	.word	.LANCHOR62
 	.word	.LANCHOR71
-	.word	.LANCHOR193
-	.word	.LANCHOR192
-	.word	.LANCHOR194
-	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
-	.section	.text.FtlLoadMapInfo,"ax",%progbits
-	.align	1
-	.global	FtlLoadMapInfo
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlLoadMapInfo, %function
-FtlLoadMapInfo:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	bl	FtlL2PDataInit
-	ldr	r0, .L2482
-	bl	FtlMapTblRecovery
-	movs	r0, #0
-	pop	{r3, pc}
-.L2483:
-	.align	2
-.L2482:
-	.word	.LANCHOR127
-	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
-	.section	.text.ftl_scan_all_ppa,"ax",%progbits
+	.word	.LANCHOR61
+	.word	.LANCHOR132
+	.word	.LANCHOR131
+	.word	.LANCHOR64
+	.word	.LANCHOR133
+	.word	.LANCHOR218
+	.size	FtlScanSysBlk, .-FtlScanSysBlk
+	.section	.text.FtlLoadSysInfo,"ax",%progbits
 	.align	1
-	.global	ftl_scan_all_ppa
+	.global	FtlLoadSysInfo
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_scan_all_ppa, %function
-ftl_scan_all_ppa:
-	@ args = 0, pretend = 0, frame = 0
+	.type	FtlLoadSysInfo, %function
+FtlLoadSysInfo:
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r6, #0
-	ldr	r4, .L2489
-	sub	sp, sp, #24
-	ldr	r7, .L2489+4
-	ldrh	r1, [r4]
-	mov	r8, r4
-	ldr	r4, .L2489+8
-	ldrh	r2, [r7]
-	ldr	r0, .L2489+12
-	bl	printf
-.L2485:
-	ldrh	r3, [r8]
-	cmp	r6, r3
-	bcs	.L2487
-	lsl	fp, r6, #10
-	movs	r5, #0
-	ldr	r10, .L2489+32
-	b	.L2488
-.L2486:
-	add	r3, r5, fp
-	movs	r2, #0
-	str	r3, [r4, #4]
-	movs	r1, #1
-	ldr	r3, [r10]
-	mov	r0, r4
-	str	r2, [r4]
-	adds	r5, r5, #1
+	movs	r1, #0
+	ldr	r7, .L2469
+	sub	sp, sp, #40
+	ldr	r6, .L2469+4
+	ldr	r3, [r7]
+	ldr	r4, .L2469+8
+	ldr	r8, .L2469+52
+	ldrh	r2, [r6]
+	ldr	r5, .L2469+12
 	str	r3, [r4, #8]
-	ldr	r3, .L2489+16
-	ldr	r3, [r3]
+	ldr	r3, [r8]
+	lsls	r2, r2, #1
+	ldr	r0, [r5]
 	str	r3, [r4, #12]
-	bl	FlashReadPages
-	ldr	r2, [r4, #8]
-	ldr	r3, [r4, #12]
-	ldr	r0, .L2489+20
-	ldr	r1, [r2, #4]
-	str	r1, [sp, #16]
-	ldr	r2, [r2]
-	str	r2, [sp, #12]
-	ldr	r2, [r3, #12]
-	str	r2, [sp, #8]
-	ldr	r2, [r3, #8]
-	str	r2, [sp, #4]
-	ldr	r2, [r3, #4]
-	str	r2, [sp]
-	ldr	r3, [r3]
-	ldr	r2, [r4]
-	ldr	r1, [r4, #4]
-	bl	printf
-.L2488:
-	ldrh	r3, [r7]
-	cmp	r5, r3
-	bcc	.L2486
-	adds	r6, r6, #1
-	b	.L2485
-.L2487:
-	ldr	r1, .L2489+24
-	ldr	r0, .L2489+28
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
-	b	printf
-.L2490:
-	.align	2
-.L2489:
-	.word	.LANCHOR51
-	.word	.LANCHOR52
-	.word	.LANCHOR203
-	.word	.LC53
-	.word	.LANCHOR188
-	.word	.LC54
-	.word	.LANCHOR227
-	.word	.LC55
-	.word	.LANCHOR183
-	.size	ftl_scan_all_ppa, .-ftl_scan_all_ppa
-	.section	.text.FlashReadFacBbtData,"ax",%progbits
-	.align	1
-	.global	FlashReadFacBbtData
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FlashReadFacBbtData, %function
-FlashReadFacBbtData:
-	@ args = 0, pretend = 0, frame = 48
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	fp, r2
-	ldr	r2, .L2504
-	sub	sp, sp, #48
-	mov	r6, r1
-	mov	r4, r0
-	ldr	r7, .L2504+4
-	ldrh	r3, [r2, #14]
-	ldrh	r2, [r2, #12]
-	smulbb	r3, r3, r2
-	ldr	r2, [r7]
-	uxth	r3, r3
-	str	r2, [sp, #20]
-	ldr	r2, .L2504+8
-	subs	r5, r3, #1
-	mul	r10, r6, r3
-	uxth	r5, r5
-	subs	r3, r3, #15
-	ldr	r1, [r2]
-	mov	r8, r2
-	str	r1, [sp, #24]
-.L2492:
-	cmp	r3, r5
-	ble	.L2499
+	bl	ftl_memset
+	ldr	r3, .L2469+16
+	movw	r2, #65535
+	str	r8, [sp, #24]
+	str	r5, [sp, #28]
+	ldrh	r0, [r3]
+	mov	fp, r3
+	cmp	r0, r2
+	bne	.L2436
+.L2448:
 	mov	r0, #-1
-	b	.L2491
-.L2499:
-	add	r2, r5, r10
-	add	r0, sp, #12
-	lsls	r2, r2, #10
-	str	r3, [sp, #4]
-	str	r2, [sp, #16]
+.L2435:
+	add	sp, sp, #40
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2436:
+	movs	r1, #1
+	bl	FtlGetLastWrittenPage
+	ldrsh	r10, [fp]
+	sxth	r5, r0
+	adds	r0, r0, #1
+	strh	r0, [fp, #2]	@ movhi
+.L2438:
+	cmp	r5, #0
+	bge	.L2444
+	movw	r2, #1708
+	ldr	r1, .L2469+20
+	ldr	r0, .L2469+24
+	bl	printf
+	ldr	r1, .L2469+28
+	ldr	r0, .L2469+32
+	bl	printf
+	b	.L2443
+.L2444:
+	orr	r3, r5, r10, lsl #10
 	movs	r2, #1
 	mov	r1, r2
+	ldr	r0, .L2469+8
+	str	r3, [r4, #4]
+	ldr	r3, [r7]
+	str	r3, [r4, #8]
 	bl	FlashReadPages
-	ldr	r2, [sp, #12]
-	ldr	r3, [sp, #4]
-	adds	r2, r2, #1
-	beq	.L2493
-	ldr	r2, [r8]
-	ldrh	r1, [r2]
-	movw	r2, #61664
-	cmp	r1, r2
-	bne	.L2493
-	cbz	r4, .L2500
-	cbz	r6, .L2495
-.L2498:
-	mov	r2, fp
-	ldr	r1, [r7]
-	mov	r0, r4
-	bl	ftl_memcpy
-	movs	r3, #4
-	ldr	r0, .L2504+12
-	mov	r2, r3
-	mov	r1, r4
-	bl	rknand_print_hex
-	movs	r0, #0
-.L2491:
-	add	sp, sp, #48
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2495:
-	ldr	r1, [r7]
-	mov	ip, #1
-	ldr	r5, .L2504+16
-.L2496:
-	ldr	r0, [r5]
-	uxth	r3, r6
-	adds	r6, r6, #1
+	ldr	r3, .L2469+36
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L2439
+	ldr	r8, [r4, #12]
+	ldr	r3, [r8, #12]
+	str	r3, [sp, #36]
+	cmp	r3, #0
+	beq	.L2439
+	ldr	r2, [r4, #8]
+	ldr	r1, .L2469+40
+	mov	r0, r2
+	str	r2, [sp, #32]
+	ldrh	r1, [r1]
+	bl	js_hash
+	ldr	r3, [sp, #36]
 	cmp	r3, r0
-	bcs	.L2498
-	lsrs	r0, r3, #5
-	and	r3, r3, #31
-	lsl	r3, ip, r3
-	ldr	r2, [r1, r0, lsl #2]
-	orrs	r3, r3, r2
-	str	r3, [r1, r0, lsl #2]
-	b	.L2496
-.L2493:
+	beq	.L2439
+	cmp	r5, #0
+	bne	.L2440
+	ldr	r2, .L2469+16
+	ldrh	r1, [r2, #4]
+	cmp	r10, r1
+	beq	.L2440
+	ldrh	r1, [r2]
+	ldr	r2, [sp, #32]
+	ldr	r0, .L2469+44
+	ldr	r2, [r2]
+	str	r3, [sp, #12]
+	str	r2, [sp, #16]
+	ldr	r3, [r8, #8]
+	str	r3, [sp, #8]
+	ldr	r3, [r8, #4]
+	str	r3, [sp, #4]
+	ldr	r3, [r8]
+	str	r3, [sp]
+	ldm	r4, {r2, r3}
+	bl	printf
+	ldr	r3, .L2469+16
+	ldrsh	r10, [r3, #4]
+	ldr	r3, .L2469+48
+	ldrh	r5, [r3]
+.L2442:
 	subs	r5, r5, #1
-	uxth	r5, r5
-	b	.L2492
-.L2500:
-	mov	r0, r4
-	b	.L2491
-.L2505:
+	sxth	r5, r5
+	b	.L2438
+.L2470:
 	.align	2
-.L2504:
-	.word	.LANCHOR14
-	.word	.LANCHOR147
-	.word	.LANCHOR197
-	.word	.LC56
-	.word	.LANCHOR149
-	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
-	.section	.text.FlashGetBadBlockList,"ax",%progbits
-	.align	1
-	.global	FlashGetBadBlockList
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FlashGetBadBlockList, %function
-FlashGetBadBlockList:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	mov	r5, r0
-	ldr	r3, .L2516
-	ldr	r6, .L2516+4
+.L2469:
+	.word	.LANCHOR189
+	.word	.LANCHOR40
+	.word	.LANCHOR211
+	.word	.LANCHOR85
+	.word	.LANCHOR218
+	.word	.LANCHOR230
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LANCHOR2
+	.word	.LANCHOR57
+	.word	.LC47
+	.word	.LANCHOR53
+	.word	.LANCHOR195
+.L2440:
+	mov	r3, #-1
+	str	r3, [r4]
+.L2439:
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	beq	.L2442
+	ldr	r3, [r7]
+	ldr	r2, .L2471
 	ldr	r3, [r3]
-	ldr	r0, [r6]
-	ldrb	r4, [r3, #13]	@ zero_extendqisi2
-	ldrh	r3, [r3, #14]
-	smulbb	r4, r4, r3
-	uxth	r4, r4
-	adds	r2, r4, #7
-	asrs	r2, r2, #3
-	bl	FlashReadFacBbtData
-	adds	r0, r0, #1
-	bne	.L2507
-.L2511:
+	cmp	r3, r2
+	bne	.L2442
+	ldr	r3, [sp, #24]
+	ldr	r3, [r3]
+	ldrh	r2, [r3]
+	movw	r3, #61604
+	cmp	r2, r3
+	bne	.L2442
+.L2443:
+	ldr	r2, .L2471+4
+	ldrh	r3, [r6]
+	ldrh	r2, [r2]
+	adds	r3, r3, #24
+	cmp	r2, r3, lsl #1
+	bcs	.L2446
+	ldr	r1, .L2471+8
+	movw	r2, #1710
+	ldr	r0, .L2471+12
+	bl	printf
+	ldr	r1, .L2471+16
+	ldr	r0, .L2471+20
+	bl	printf
+.L2446:
+	movs	r2, #48
+	ldr	r1, [r4, #8]
+	ldr	r0, .L2471+24
+	bl	ftl_memcpy
+	ldrh	r2, [r6]
+	ldr	r3, [sp, #28]
+	ldr	r1, [r4, #8]
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	adds	r1, r1, #48
+	bl	ftl_memcpy
+	ldrh	r1, [r6]
+	ldr	r3, [r4, #8]
+	lsrs	r2, r1, #3
+	lsls	r1, r1, #1
+	adds	r1, r1, #51
+	adds	r2, r2, #4
+	bic	r1, r1, #3
+	add	r1, r1, r3
+	ldr	r3, .L2471+28
+	ldr	r0, [r3]
+	bl	ftl_memcpy
+	ldr	r3, .L2471+32
+	ldrh	r3, [r3]
+	cbz	r3, .L2447
+	ldrh	r1, [r6]
+	ldr	r3, .L2471+36
+	ldrh	r2, [r3]
+	lsrs	r3, r1, #3
+	add	r3, r3, r1, lsl #1
+	ldr	r1, [r4, #8]
+	adds	r3, r3, #52
+	lsls	r2, r2, #2
+	ubfx	r3, r3, #2, #14
+	add	r1, r1, r3, lsl #2
+	ldr	r3, .L2471+40
+	ldr	r0, [r3]
+	bl	ftl_memcpy
+.L2447:
+	ldr	r4, .L2471+24
+	ldr	r3, .L2471
+	ldr	r2, [r4]
+	cmp	r2, r3
+	bne	.L2448
+	ldr	r3, .L2471+44
+	ldrb	r2, [r4, #10]	@ zero_extendqisi2
+	ldrh	r5, [r4, #8]
+	ldrh	r3, [r3]
+	strh	r5, [fp, #6]	@ movhi
+	cmp	r2, r3
+	bne	.L2448
+	ldr	r3, .L2471+48
+	ldr	r2, .L2471+52
+	str	r5, [r3]
+	ldr	r3, .L2471+56
+	ldrh	r3, [r3]
+	muls	r3, r5, r3
+	str	r3, [r2]
+	ldr	r2, .L2471+60
+	ldrh	r2, [r2]
+	muls	r3, r2, r3
+	ldr	r2, .L2471+64
+	str	r3, [r2]
+	ldr	r3, .L2471+68
+	ldr	r6, [r3]
+	ldr	r3, .L2471+72
+	ldrh	r0, [r3, #6]
+	ldr	r3, .L2471+76
+	subs	r0, r6, r0
+	ldrh	r1, [r3]
+	subs	r0, r0, r5
+	bl	__aeabi_uidiv
+	ldr	r3, .L2471+80
+	cmp	r5, r6
+	strh	r0, [r3]	@ movhi
+	bls	.L2449
+	ldr	r1, .L2471+8
+	movw	r2, #1739
+	ldr	r0, .L2471+12
+	bl	printf
+	ldr	r1, .L2471+16
+	ldr	r0, .L2471+20
+	bl	printf
+.L2449:
+	ldrh	r2, [r4, #16]
+	ldr	r3, .L2471+84
+	ldrh	ip, [r4, #14]
+	ldr	r7, .L2471+88
+	lsrs	r1, r2, #6
+	and	r2, r2, #63
+	strb	r2, [r3, #6]
+	ldrb	r2, [r4, #11]	@ zero_extendqisi2
+	strh	r1, [r3, #2]	@ movhi
+	ldr	r1, .L2471+92
+	strb	r2, [r3, #8]
+	ldrh	r2, [r4, #18]
+	strh	ip, [r3]	@ movhi
+	movw	r3, #65535
+	strh	r3, [r7]	@ movhi
 	movs	r3, #0
-.L2508:
-	movw	r2, #65535
+	strh	r2, [r1]	@ movhi
+	ldrh	r2, [r4, #20]
+	strh	r3, [r7, #2]	@ movhi
+	strb	r3, [r7, #6]
+	strb	r3, [r7, #8]
+	lsrs	r5, r2, #6
+	and	r2, r2, #63
+	strb	r2, [r1, #6]
+	ldrb	r2, [r4, #12]	@ zero_extendqisi2
+	strh	r5, [r1, #2]	@ movhi
+	ldrh	r5, [r4, #22]
+	strb	r2, [r1, #8]
+	ldr	r2, .L2471+96
+	strh	r5, [r2]	@ movhi
+	ldrh	r5, [r4, #24]
+	lsrs	r6, r5, #6
+	and	r5, r5, #63
+	strb	r5, [r2, #6]
+	ldrb	r5, [r4, #13]	@ zero_extendqisi2
+	strh	r6, [r2, #2]	@ movhi
+	ldr	r6, [r4, #32]
+	strb	r5, [r2, #8]
+	ldr	r5, .L2471+100
+	str	r3, [r5]
+	ldr	r5, .L2471+104
+	str	r3, [r5]
+	ldr	r5, .L2471+108
+	str	r3, [r5]
+	ldr	r5, .L2471+112
+	str	r3, [r5]
+	ldr	r5, .L2471+116
+	str	r6, [r5]
+	mov	r6, r1
+	ldr	r5, .L2471+120
+	str	r3, [r5]
+	ldr	r5, .L2471+124
+	str	r3, [r5]
+	ldr	r5, .L2471+128
+	ldr	lr, [r4, #40]
+	str	r3, [r5]
+	ldr	r3, .L2471+132
+	ldr	r5, [r3]
+	cmp	lr, r5
+	mov	r5, r2
+	it	hi
+	strhi	lr, [r3]
+	ldr	r3, .L2471+136
+	ldr	r2, [r4, #36]
+	ldr	r1, [r3]
+	cmp	r2, r1
+	it	hi
+	strhi	r2, [r3]
+	movw	r3, #65535
+	cmp	ip, r3
+	beq	.L2452
+	ldr	r0, .L2471+84
+	bl	make_superblock
+.L2452:
+	ldrh	r2, [r6]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L2453
+	ldr	r0, .L2471+92
+	bl	make_superblock
+.L2453:
+	ldrh	r2, [r5]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L2454
+	ldr	r0, .L2471+96
+	bl	make_superblock
+.L2454:
+	ldrh	r2, [r7]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L2455
+	ldr	r0, .L2471+88
+	bl	make_superblock
+.L2455:
 	movs	r0, #0
-	strh	r2, [r5, r3, lsl #1]	@ movhi
-	pop	{r3, r4, r5, r6, r7, pc}
-.L2507:
-	ldr	r7, [r6]
-	movs	r2, #0
-	lsr	ip, r4, #4
-	mov	r3, r2
-	subs	r4, r4, #1
-	mov	lr, #1
-.L2509:
-	uxth	r1, r2
-	cmp	r1, r4
-	bge	.L2508
-	lsrs	r6, r1, #5
-	and	r0, r1, #31
-	lsl	r0, lr, r0
-	adds	r2, r2, #1
-	ldr	r6, [r7, r6, lsl #2]
-	tst	r0, r6
-	ittt	ne
-	addne	r0, r3, #1
-	strhne	r1, [r5, r3, lsl #1]	@ movhi
-	uxthne	r3, r0
-	cmp	r3, ip
-	bcc	.L2509
-	b	.L2511
-.L2517:
+	b	.L2435
+.L2472:
 	.align	2
-.L2516:
-	.word	.LANCHOR18
-	.word	.LANCHOR153
-	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
-	.section	.text.FtlMakeBbt,"ax",%progbits
+.L2471:
+	.word	1179929683
+	.word	.LANCHOR57
+	.word	.LANCHOR230
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LANCHOR82
+	.word	.LANCHOR1
+	.word	.LANCHOR69
+	.word	.LANCHOR66
+	.word	.LANCHOR203
+	.word	.LANCHOR45
+	.word	.LANCHOR231
+	.word	.LANCHOR74
+	.word	.LANCHOR52
+	.word	.LANCHOR55
+	.word	.LANCHOR68
+	.word	.LANCHOR42
+	.word	.LANCHOR76
+	.word	.LANCHOR38
+	.word	.LANCHOR232
+	.word	.LANCHOR93
+	.word	.LANCHOR213
+	.word	.LANCHOR94
+	.word	.LANCHOR95
+	.word	.LANCHOR166
+	.word	.LANCHOR167
+	.word	.LANCHOR171
+	.word	.LANCHOR170
+	.word	.LANCHOR172
+	.word	.LANCHOR173
+	.word	.LANCHOR174
+	.word	.LANCHOR169
+	.word	.LANCHOR164
+	.word	.LANCHOR165
+	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
+	.section	.text.FtlDumpBlockInfo,"ax",%progbits
 	.align	1
-	.global	FtlMakeBbt
+	.global	FtlDumpBlockInfo
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlMakeBbt, %function
-FtlMakeBbt:
-	@ args = 0, pretend = 0, frame = 8
+	.type	FtlDumpBlockInfo, %function
+FtlDumpBlockInfo:
+	@ args = 0, pretend = 0, frame = 64
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2538
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r7, [r3]
-	cmp	r7, #0
-	bne	.L2519
-	ldr	r8, .L2538+40
-	ldr	r4, .L2538+4
-	bl	FtlBbtMemInit
-	sub	r10, r8, #18
-	bl	FtlLoadFactoryBbt
-.L2520:
-	ldr	r3, .L2538+8
-	ldrh	r3, [r3]
-	cmp	r7, r3
-	bcc	.L2526
-	ldr	r5, .L2538+12
-	movs	r4, #0
-.L2527:
-	ldrh	r3, [r5]
-	uxth	r0, r4
-	adds	r4, r4, #1
-	cmp	r3, r0
-	bhi	.L2528
-	ldr	r4, .L2538+16
-	movw	r6, #65535
-	ldrh	r5, [r4, #12]
-	subs	r5, r5, #1
-	uxth	r5, r5
-.L2529:
-	ldrh	r3, [r4, #12]
-	subs	r3, r3, #47
-	cmp	r3, r5
-	bgt	.L2533
-	mov	r0, r5
-	bl	FtlBbmIsBadBlock
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	ubfx	r0, r0, #10, #16
+	ldr	r4, .L2485
+	sub	sp, sp, #88
+	mov	r8, r1
+	ldrh	r3, [r4]
+	str	r3, [sp, #24]
+	bl	P2V_block_in_plane
+	ldr	r1, .L2485+4
+	mov	r6, r0
+	ldr	r0, .L2485+8
+	bl	printf
+	ldr	r3, .L2485+12
+	mov	r1, r6
+	ldr	r0, .L2485+16
+	ldr	r3, [r3]
+	ldrh	r2, [r3, r6, lsl #1]
+	bl	printf
+	add	r0, sp, #88
+	strh	r6, [r0, #-48]!	@ movhi
+	bl	make_superblock
+	ldr	r3, .L2485+20
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	cbz	r5, .L2474
+	cmp	r8, #0
+	bne	.L2483
+	mov	r0, r6
+	bl	ftl_get_blk_mode
 	cmp	r0, #1
-	beq	.L2530
-	mov	r0, r5
-	bl	FlashTestBlk
-	cmp	r0, #0
-	beq	.L2531
-	mov	r0, r5
-	bl	FtlBbmMapBadBlock
-.L2530:
-	subs	r5, r5, #1
-	uxth	r5, r5
-	b	.L2529
-.L2526:
-	ldr	r3, .L2538+20
-	movw	r1, #65535
-	ldrh	r2, [r10, #2]!
+	mov	r5, r0
+	bne	.L2474
+	ldr	r3, .L2485+24
+	ldrh	r3, [r3]
+	str	r3, [sp, #24]
+.L2474:
+	movs	r6, #0
+	ldrh	r3, [r4]
+	ldr	r2, [sp, #24]
+	mov	r1, r5
+	ldr	r0, .L2485+28
+	bl	printf
+.L2475:
+	ldr	r3, .L2485+32
+	movs	r2, #0
+	add	ip, sp, #54
+	mov	r4, r2
+	movw	r10, #65535
+	mov	fp, #36
+	ldrh	lr, [r3]
+	ldr	r3, .L2485+36
 	ldr	r0, [r3]
-	ldr	r3, .L2538+24
-	cmp	r2, r1
-	str	r0, [r4, #8]
-	ldr	fp, [r3]
-	str	r3, [sp, #4]
-	ldr	r3, .L2538+28
-	str	fp, [r4, #12]
-	beq	.L2521
-	ldrh	r6, [r3]
-	mov	r0, r4
-	str	r3, [sp]
-	mla	r6, r7, r6, r2
-	lsls	r2, r6, #10
-	str	r2, [r4, #4]
-	movs	r2, #1
-	mov	r1, r2
+	ldr	r3, .L2485+40
+	ldr	r3, [r3]
+	str	r3, [sp, #28]
+	ldr	r3, .L2485+44
+	ldrh	r3, [r3]
+	str	r3, [sp, #32]
+	ldr	r3, .L2485+48
+	ldr	r3, [r3]
+	str	r3, [sp, #36]
+	ldr	r3, .L2485+52
+	ldrh	r8, [r3]
+.L2476:
+	uxth	r3, r2
+	cmp	lr, r3
+	bhi	.L2478
+	ldr	fp, .L2485+56
+	mov	r8, #0
+	mov	r10, #36
+	mov	r2, r5
+	mov	r1, r4
 	bl	FlashReadPages
-	ldr	r3, [sp]
-	ldr	r1, [r4, #8]
-	ldr	r0, [r8]
-	ldrh	r2, [r3]
-	adds	r2, r2, #7
-	asrs	r2, r2, #3
-	bl	ftl_memcpy
-.L2522:
-	uxth	r0, r6
-	adds	r7, r7, #1
-	add	r8, r8, #4
-	bl	FtlBbmMapBadBlock
-	b	.L2520
-.L2521:
-	mov	r1, r7
-	str	r3, [sp]
-	bl	FlashGetBadBlockList
-	ldr	r1, [r8]
-	ldr	r0, [r4, #8]
-	bl	FtlBbt2Bitmap
-	ldr	r3, [sp]
-	ldrh	r5, [r3]
-.L2524:
-	subs	r5, r5, #1
-	uxth	r5, r5
-.L2523:
-	ldr	r3, [sp]
-	ldrh	r0, [r3]
-	smlabb	r0, r0, r7, r5
-	uxth	r0, r0
-	bl	FtlBbmIsBadBlock
-	cmp	r0, #1
-	beq	.L2524
-	ldr	r3, [sp, #4]
-	movs	r2, #16
-	movs	r1, #0
-	strh	r5, [r10]	@ movhi
-	ldr	r0, [r3]
-	bl	ftl_memset
-	ldr	r2, [sp]
-	movw	r3, #61664
-	strh	r3, [fp]	@ movhi
-	movs	r3, #0
-	str	r3, [fp, #4]
-	ldrh	r6, [r2]
-	ldrh	r3, [r10]
-	ldr	r1, [r8]
-	ldr	r0, [r4, #8]
-	strh	r3, [fp, #2]	@ movhi
-	mla	r6, r7, r6, r3
-	lsls	r3, r6, #10
-	str	r3, [r4, #4]
-	ldr	r3, .L2538+32
-	ldrh	r2, [r3]
-	lsls	r2, r2, #2
-	bl	ftl_memcpy
-	movs	r2, #1
-	mov	r0, r4
-	mov	r1, r2
-	bl	FlashEraseBlocks
-	movs	r3, #1
-	mov	r0, r4
-	mov	r2, r3
-	mov	r1, r3
-	bl	FlashProgPages
-	ldr	r3, [r4]
-	adds	r3, r3, #1
-	bne	.L2522
-	uxth	r0, r6
-	bl	FtlBbmMapBadBlock
-	b	.L2523
-.L2528:
-	bl	FtlBbmMapBadBlock
-	b	.L2527
-.L2531:
-	ldrh	r3, [r4]
+.L2479:
+	uxth	r3, r8
+	cmp	r4, r3
+	bhi	.L2480
+	adds	r6, r6, #1
+	ldr	r3, [sp, #24]
+	uxth	r6, r6
 	cmp	r3, r6
-	bne	.L2532
-	strh	r5, [r4]	@ movhi
-	b	.L2530
-.L2532:
-	strh	r5, [r4, #4]	@ movhi
-.L2533:
-	ldr	r3, .L2538+36
-	movs	r5, #0
-	str	r5, [r4, #8]
-	movs	r2, #2
-	movs	r1, #1
-	strh	r5, [r4, #2]	@ movhi
-	ldr	r0, [r3]
-	ldrh	r3, [r4]
-	lsls	r3, r3, #10
-	str	r3, [r0, #4]
-	ldrh	r3, [r4, #4]
-	lsls	r3, r3, #10
-	str	r3, [r0, #40]
-	bl	FlashEraseBlocks
-	ldrh	r0, [r4]
-	bl	FtlBbmMapBadBlock
-	ldrh	r0, [r4, #4]
-	bl	FtlBbmMapBadBlock
-	bl	FtlBbmTblFlush
-	ldr	r3, [r4, #8]
-	ldrh	r2, [r4, #4]
-	strh	r5, [r4, #2]	@ movhi
-	adds	r3, r3, #1
-	str	r3, [r4, #8]
-	ldrh	r3, [r4]
-	strh	r2, [r4]	@ movhi
-	strh	r3, [r4, #4]	@ movhi
-	bl	FtlBbmTblFlush
-.L2519:
+	bne	.L2475
+.L2481:
 	movs	r0, #0
-	add	sp, sp, #8
+	add	sp, sp, #88
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2539:
+.L2483:
+	movs	r5, #0
+	b	.L2474
+.L2478:
+	ldrh	r3, [ip, #2]!
+	cmp	r3, r10
+	beq	.L2477
+	mla	r1, fp, r4, r0
+	ldr	r7, [sp, #28]
+	orr	r3, r6, r3, lsl #10
+	str	r3, [r1, #4]
+	ldr	r3, [sp, #32]
+	muls	r3, r4, r3
+	bic	r3, r3, #3
+	add	r3, r3, r7
+	ldr	r7, [sp, #36]
+	str	r3, [r1, #8]
+	mul	r3, r8, r4
+	adds	r4, r4, #1
+	uxth	r4, r4
+	bic	r3, r3, #3
+	add	r3, r3, r7
+	str	r3, [r1, #12]
+.L2477:
+	adds	r2, r2, #1
+	b	.L2476
+.L2480:
+	ldr	r3, .L2485+36
+	mul	r0, r10, r8
+	ldrh	r1, [sp, #40]
+	add	r8, r8, #1
+	ldr	ip, [r3]
+	add	r2, ip, r0
+	ldr	lr, [r2, #8]
+	ldr	r3, [r2, #12]
+	ldr	r7, [lr, #4]
+	str	r7, [sp, #20]
+	ldr	r7, [lr]
+	str	r7, [sp, #16]
+	ldr	r7, [r3, #12]
+	str	r7, [sp, #12]
+	ldr	r7, [r3, #8]
+	str	r7, [sp, #8]
+	ldr	r7, [r3, #4]
+	str	r7, [sp, #4]
+	ldr	r3, [r3]
+	str	r3, [sp]
+	ldr	r3, [r2, #4]
+	ldr	r2, [ip, r0]
+	mov	r0, fp
+	bl	printf
+	b	.L2479
+.L2486:
 	.align	2
-.L2538:
-	.word	.LANCHOR76
-	.word	.LANCHOR203
-	.word	.LANCHOR45
-	.word	.LANCHOR59
-	.word	.LANCHOR74
-	.word	.LANCHOR183
-	.word	.LANCHOR188
-	.word	.LANCHOR51
-	.word	.LANCHOR123
-	.word	.LANCHOR77
-	.word	.LANCHOR74+28
-	.size	FtlMakeBbt, .-FtlMakeBbt
-	.section	.text.log2phys,"ax",%progbits
+.L2485:
+	.word	.LANCHOR52
+	.word	.LANCHOR233
+	.word	.LC48
+	.word	.LANCHOR85
+	.word	.LC49
+	.word	.LANCHOR16
+	.word	.LANCHOR53
+	.word	.LC50
+	.word	.LANCHOR38
+	.word	.LANCHOR186
+	.word	.LANCHOR107
+	.word	.LANCHOR57
+	.word	.LANCHOR108
+	.word	.LANCHOR58
+	.word	.LC51
+	.size	FtlDumpBlockInfo, .-FtlDumpBlockInfo
+	.section	.text.FtlScanAllBlock,"ax",%progbits
 	.align	1
-	.global	log2phys
+	.global	FtlScanAllBlock
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	log2phys, %function
-log2phys:
-	@ args = 0, pretend = 0, frame = 24
+	.type	FtlScanAllBlock, %function
+FtlScanAllBlock:
+	@ args = 0, pretend = 0, frame = 64
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #24
-	ldr	r4, .L2558
-	mov	fp, r0
-	str	r2, [sp, #16]
-	ldr	r2, [r4]
-	ldr	r3, .L2558+4
-	str	r1, [sp, #4]
-	cmp	r0, r2
-	ldrh	r5, [r3]
-	bcc	.L2541
-	ldr	r1, .L2558+8
-	mov	r2, #884
-	ldr	r0, .L2558+12
-	bl	printf
-	ldr	r1, .L2558+16
-	ldr	r0, .L2558+20
+	sub	sp, sp, #88
+	ldr	r6, .L2497
+	ldr	r1, .L2497+4
+	ldr	r0, .L2497+8
 	bl	printf
-.L2541:
-	ldr	r3, [r4]
-	cmp	fp, r3
-	bcs	.L2542
-	adds	r3, r5, #7
-	ldr	r5, .L2558+24
-	lsr	r7, fp, r3
-	str	r3, [sp, #8]
-	ldr	r3, .L2558+28
-	movs	r4, #12
-	ldr	r1, [r5]
-	uxth	r6, r7
-	ldrh	r2, [r3]
 	movs	r3, #0
-.L2543:
-	uxth	r10, r3
-	cmp	r10, r2
-	bcc	.L2548
-	bl	select_l2p_ram_region
-	muls	r4, r0, r4
-	ldr	r3, [r5]
-	mov	r10, r0
-	ldrh	r1, [r3, r4]
-	adds	r2, r3, r4
-	movw	r3, #65535
-	cmp	r1, r3
-	beq	.L2549
-	ldr	r3, [r2, #4]
-	cmp	r3, #0
-	bge	.L2549
-	bl	flush_l2p_region
-.L2549:
-	ldr	r3, .L2558+32
+	str	r3, [sp, #28]
+.L2488:
+	ldr	r3, .L2497+12
+	ldrh	r0, [sp, #28]
 	ldrh	r3, [r3]
-	cmp	r3, r6
-	bcs	.L2550
-	ldr	r1, .L2558+36
-	movw	r2, #526
-	ldr	r0, .L2558+12
+	cmp	r3, r0
+	bhi	.L2496
+	movs	r0, #0
+	add	sp, sp, #88
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2496:
+	add	r4, sp, #88
+	add	r7, sp, #54
+	strh	r0, [r4, #-48]!	@ movhi
+	movw	r10, #65535
+	bl	ftl_get_blk_mode
+	ldr	r3, .L2497+16
+	mov	fp, #36
+	ldrh	r1, [sp, #28]
+	ldr	r2, [r3]
+	mov	r3, r0
+	ldr	r0, .L2497+20
+	ldrh	r2, [r2, r1, lsl #1]
 	bl	printf
-	ldr	r1, .L2558+16
-	ldr	r0, .L2558+20
+	mov	r0, r4
+	bl	make_superblock
+	ldr	r3, .L2497+24
+	movs	r2, #0
+	ldr	r0, [r6]
+	mov	r4, r2
+	ldrh	lr, [r3]
+	ldr	r3, .L2497+28
+	ldr	r3, [r3]
+	str	r3, [sp, #32]
+	ldr	r3, .L2497+32
+	ldrh	ip, [r3]
+	ldr	r3, .L2497+36
+	ldr	r3, [r3]
+	str	r3, [sp, #36]
+	ldr	r3, .L2497+40
+	ldrh	r8, [r3]
+.L2489:
+	uxth	r3, r2
+	cmp	lr, r3
+	bhi	.L2491
+	ldr	r10, .L2497+44
+	movs	r7, #0
+	mov	r8, #36
+	movs	r2, #0
+	mov	r1, r4
+	bl	FlashReadPages
+.L2492:
+	uxth	r3, r7
+	cmp	r4, r3
+	bhi	.L2493
+	ldr	r10, .L2497+48
+	movs	r7, #0
+	mov	r8, #36
+	movs	r2, #1
+	mov	r1, r4
+	ldr	r0, [r6]
+	bl	FlashReadPages
+.L2494:
+	uxth	r3, r7
+	cmp	r4, r3
+	bhi	.L2495
+	ldr	r3, [sp, #28]
+	adds	r3, r3, #1
+	str	r3, [sp, #28]
+	b	.L2488
+.L2491:
+	ldrh	r3, [r7, #2]!
+	cmp	r3, r10
+	beq	.L2490
+	mla	r1, fp, r4, r0
+	ldr	r5, [sp, #32]
+	lsls	r3, r3, #10
+	str	r3, [r1, #4]
+	mul	r3, ip, r4
+	bic	r3, r3, #3
+	add	r3, r3, r5
+	ldr	r5, [sp, #36]
+	str	r3, [r1, #8]
+	mul	r3, r8, r4
+	adds	r4, r4, #1
+	uxth	r4, r4
+	bic	r3, r3, #3
+	add	r3, r3, r5
+	str	r3, [r1, #12]
+.L2490:
+	adds	r2, r2, #1
+	b	.L2489
+.L2493:
+	mul	r2, r8, r7
+	ldr	r0, [r6]
+	ldrh	r1, [sp, #40]
+	adds	r7, r7, #1
+	add	lr, r0, r2
+	ldr	fp, [lr, #8]
+	ldr	r3, [lr, #12]
+	ldr	r5, [fp, #4]
+	str	r5, [sp, #20]
+	ldr	r5, [fp]
+	str	r5, [sp, #16]
+	ldr	r5, [r3, #12]
+	str	r5, [sp, #12]
+	ldr	r5, [r3, #8]
+	str	r5, [sp, #8]
+	ldr	r5, [r3, #4]
+	str	r5, [sp, #4]
+	ldr	r3, [r3]
+	str	r3, [sp]
+	ldr	r2, [r0, r2]
+	mov	r0, r10
+	ldr	r3, [lr, #4]
 	bl	printf
-.L2550:
-	ldr	r3, .L2558+40
-	uxth	r7, r7
+	b	.L2492
+.L2495:
+	mul	r2, r8, r7
+	ldr	r0, [r6]
+	ldrh	r1, [sp, #40]
+	adds	r7, r7, #1
+	add	lr, r0, r2
+	ldr	fp, [lr, #8]
+	ldr	r3, [lr, #12]
+	ldr	r5, [fp, #4]
+	str	r5, [sp, #20]
+	ldr	r5, [fp]
+	str	r5, [sp, #16]
+	ldr	r5, [r3, #12]
+	str	r5, [sp, #12]
+	ldr	r5, [r3, #8]
+	str	r5, [sp, #8]
+	ldr	r5, [r3, #4]
+	str	r5, [sp, #4]
 	ldr	r3, [r3]
-	ldr	r3, [r3, r7, lsl #2]
-	cmp	r3, #0
-	bne	.L2551
-	ldr	r2, [r5]
-	movs	r1, #255
+	str	r3, [sp]
+	ldr	r2, [r0, r2]
+	mov	r0, r10
+	ldr	r3, [lr, #4]
+	bl	printf
+	b	.L2494
+.L2498:
+	.align	2
+.L2497:
+	.word	.LANCHOR186
+	.word	.LANCHOR234
+	.word	.LC48
+	.word	.LANCHOR41
+	.word	.LANCHOR85
+	.word	.LC52
+	.word	.LANCHOR38
+	.word	.LANCHOR107
+	.word	.LANCHOR57
+	.word	.LANCHOR108
+	.word	.LANCHOR58
+	.word	.LC53
+	.word	.LC54
+	.size	FtlScanAllBlock, .-FtlScanAllBlock
+	.section	.text.FtlMapTblRecovery,"ax",%progbits
+	.align	1
+	.global	FtlMapTblRecovery
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlMapTblRecovery, %function
+FtlMapTblRecovery:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, [r0, #24]
+	movs	r1, #0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #24
+	ldrh	r7, [r0, #6]
+	mov	r4, r0
+	movs	r6, #0
+	str	r3, [sp]
+	ldr	r3, [r0, #16]
+	ldr	r10, [r0, #12]
+	lsls	r2, r7, #2
 	str	r3, [sp, #12]
-	adds	r0, r2, r4
-	ldr	r2, .L2558+44
-	ldr	r0, [r0, #8]
-	ldrh	r2, [r2]
+	ldrh	r3, [r0, #8]
+	ldr	r0, [sp]
+	str	r3, [sp, #4]
 	bl	ftl_memset
-	ldr	r2, [r5]
+	ldr	r2, .L2540
+	ldr	r3, .L2540+4
+	str	r6, [r4, #32]
+	ldr	r1, [r2]
+	mov	fp, r3
+	str	r6, [r4, #28]
+	str	r2, [sp, #8]
+	str	r1, [r3, #8]
+	ldr	r1, .L2540+8
+	ldr	r5, [r1]
+	movw	r1, #65535
+	str	r5, [r3, #12]
+	strh	r1, [r4]	@ movhi
+	strh	r1, [r4, #2]	@ movhi
+	movs	r1, #1
+	str	r1, [r4, #36]
+.L2500:
+	ldr	r2, [sp, #4]
+	sxth	r3, r6
+	cmp	r3, r2
+	bge	.L2519
+	ldr	r2, [sp, #4]
+	lsl	r8, r3, #1
+	subs	r2, r2, #1
+	cmp	r3, r2
+	bne	.L2501
+	ldrh	r0, [r10, r3, lsl #1]
+	movs	r1, #1
+	str	r3, [sp, #4]
+	mov	fp, #0
+	bl	FtlGetLastWrittenPage
 	ldr	r3, [sp, #12]
-	adds	r1, r2, r4
-	strh	r6, [r2, r4]	@ movhi
-	str	r3, [r1, #4]
-	b	.L2545
-.L2542:
-	ldr	r3, [sp, #16]
-	mov	r0, #-1
-	cbnz	r3, .L2540
+	add	r8, r8, r10
+	strh	r6, [r4]	@ movhi
+	sxth	r10, r0
+	ldr	r6, .L2540+4
+	adds	r0, r0, #1
+	mov	r2, r3
 	ldr	r3, [sp, #4]
-	str	r0, [r3]
-.L2540:
+	strh	r0, [r4, #2]	@ movhi
+	ldr	r3, [r2, r3, lsl #2]
+	str	r3, [r4, #28]
+.L2502:
+	sxth	r2, fp
+	cmp	r2, r10
+	ble	.L2505
+.L2519:
+	mov	r0, r4
+	bl	ftl_free_no_use_map_blk
+	ldr	r3, .L2540+12
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bne	.L2507
+	mov	r0, r4
+	bl	ftl_map_blk_alloc_new_blk
+.L2507:
+	mov	r0, r4
+	bl	ftl_map_blk_gc
+	mov	r0, r4
+	bl	ftl_map_blk_gc
+	movs	r0, #0
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2548:
-	adds	r3, r3, #1
-	mla	r0, r4, r3, r1
-	ldrh	r0, [r0, #-12]
-	cmp	r0, r6
-	bne	.L2543
-.L2545:
+.L2505:
+	ldrh	r1, [r8]
+	ldr	r0, .L2540+4
+	orr	r2, r2, r1, lsl #10
+	str	r2, [r6, #4]
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+	ldr	r3, .L2540+16
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	cbz	r2, .L2503
+	ldr	r2, [r6, #12]
+	ldr	r2, [r2, #12]
+	str	r2, [sp, #4]
+	cbz	r2, .L2503
+	ldr	r1, .L2540+20
+	ldr	r0, [r6, #8]
+	ldrh	r1, [r1]
+	bl	js_hash
+	ldr	r2, [sp, #4]
+	cmp	r2, r0
+	itt	ne
+	movne	r2, #-1
+	strne	r2, [r6]
+.L2503:
+	ldr	r2, [r6]
+	adds	r2, r2, #1
+	beq	.L2504
+	ldrh	r2, [r5, #8]
+	cmp	r7, r2
+	bls	.L2504
+	ldrh	r1, [r4, #4]
+	ldrh	r0, [r5]
+	cmp	r0, r1
+	ittt	eq
+	ldreq	r1, [r6, #4]
+	ldreq	r3, [sp]
+	streq	r1, [r3, r2, lsl #2]
+.L2504:
+	add	fp, fp, #1
+	b	.L2502
+.L2501:
 	ldr	r2, [sp, #8]
-	movs	r3, #1
-	ldr	r0, [sp, #16]
-	ldr	r1, .L2558+24
-	lsls	r3, r3, r2
-	movs	r2, #12
+	ldr	r0, .L2540+4
+	ldr	r2, [r2]
+	str	r2, [fp, #8]
+	add	r2, r10, r8
+	ldr	r8, .L2540+12
+	str	r2, [sp, #16]
+	ldrh	r2, [r10, r3, lsl #1]
+	ldrh	r3, [r8]
 	subs	r3, r3, #1
-	and	r3, r3, fp
-	uxth	r3, r3
-	cbnz	r0, .L2546
-	ldr	r0, [r1]
-	mla	r2, r2, r10, r0
-	ldr	r2, [r2, #8]
-	ldr	r3, [r2, r3, lsl #2]
-	ldr	r2, [sp, #4]
-	str	r3, [r2]
-.L2547:
-	ldr	r2, [r1]
-	movs	r3, #12
-	mla	r10, r3, r10, r2
-	ldr	r3, [r10, #4]
-	adds	r2, r3, #1
-	beq	.L2556
+	orr	r3, r3, r2, lsl #10
+	movs	r2, #1
+	mov	r1, r2
+	str	r3, [fp, #4]
+	bl	FlashReadPages
+	ldr	r3, [fp]
 	adds	r3, r3, #1
-	str	r3, [r10, #4]
-.L2556:
-	movs	r0, #0
-	b	.L2540
-.L2546:
-	ldr	r0, [r1]
-	mla	r2, r2, r10, r0
-	ldr	r0, [sp, #4]
-	ldr	r4, [r0]
-	ldr	r0, [r2, #8]
-	str	r4, [r0, r3, lsl #2]
-	ldr	r3, [r2, #4]
-	orr	r3, r3, #-2147483648
-	str	r3, [r2, #4]
-	ldr	r3, .L2558+48
-	strh	r6, [r3]	@ movhi
-	b	.L2547
-.L2551:
-	ldr	r2, [r5]
-	ldr	r8, .L2558+80
-	str	r3, [sp, #20]
-	add	r2, r2, r4
-	ldr	r2, [r2, #8]
-	mov	r0, r8
-	str	r3, [r8, #4]
-	str	r2, [r8, #8]
-	ldr	r2, .L2558+52
-	ldr	r2, [r2]
-	str	r2, [r8, #12]
+	beq	.L2521
+	ldrh	r2, [r5]
+	ldrh	r3, [r4, #4]
+	cmp	r2, r3
+	bne	.L2521
+	ldrh	r2, [r5, #8]
+	movw	r3, #64245
+	cmp	r2, r3
+	beq	.L2509
+.L2521:
+	mov	r8, #0
+.L2510:
+	ldr	r2, .L2540+12
+	sxth	r3, r8
+	ldrh	r2, [r2]
+	cmp	r3, r2
+	bge	.L2517
+	ldr	r2, [sp, #16]
+	ldr	r0, .L2540+4
+	ldrh	r2, [r2]
+	orr	r3, r3, r2, lsl #10
 	movs	r2, #1
 	mov	r1, r2
+	str	r3, [fp, #4]
 	bl	FlashReadPages
-	ldr	r3, [r8, #12]
-	ldrh	r2, [r3, #8]
-	str	r3, [sp, #12]
+	ldr	r3, .L2540+16
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2514
+	ldr	r3, [fp, #12]
+	ldr	r3, [r3, #12]
+	str	r3, [sp, #20]
+	cbz	r3, .L2514
+	ldr	r2, .L2540+20
+	ldr	r0, [fp, #8]
+	ldrh	r1, [r2]
+	bl	js_hash
 	ldr	r3, [sp, #20]
-	cmp	r2, r6
-	beq	.L2552
-	mov	r2, r3
-	mov	r1, r7
-	ldr	r0, .L2558+56
-	bl	printf
-	movs	r3, #4
-	ldr	r1, [r8, #12]
-	mov	r2, r3
-	ldr	r0, .L2558+60
-	bl	rknand_print_hex
-	ldr	r3, .L2558+32
-	movs	r2, #4
-	ldr	r1, .L2558+40
-	ldr	r0, .L2558+64
-	ldrh	r3, [r3]
-	ldr	r1, [r1]
-	bl	rknand_print_hex
-	ldr	r3, .L2558+68
-	movs	r2, #1
-	str	r2, [r3]
-.L2553:
-	ldr	r3, [sp, #12]
-	ldrh	r3, [r3, #8]
-	cmp	r3, r6
-	beq	.L2554
-	ldr	r1, .L2558+36
-	mov	r2, #552
-	ldr	r0, .L2558+12
-	bl	printf
-	ldr	r1, .L2558+16
-	ldr	r0, .L2558+20
-	bl	printf
-.L2554:
-	ldr	r3, .L2558+24
+	cmp	r3, r0
+	itt	ne
+	movne	r3, #-1
+	strne	r3, [fp]
+.L2514:
+	ldr	r3, [fp]
+	adds	r3, r3, #1
+	beq	.L2515
+	ldrh	r3, [r5, #8]
+	cmp	r7, r3
+	bls	.L2515
+	ldrh	r1, [r5]
+	ldrh	r2, [r4, #4]
+	cmp	r1, r2
+	ittt	eq
+	ldreq	r2, [fp, #4]
+	ldreq	r1, [sp]
+	streq	r2, [r1, r3, lsl #2]
+.L2515:
+	add	r8, r8, #1
+	b	.L2510
+.L2509:
+	ldr	r3, [sp, #8]
 	movs	r1, #0
+	ldrh	r2, [r8]
+	ldr	ip, [r3]
+	subs	r2, r2, #1
+.L2511:
+	sxth	r3, r1
+	cmp	r3, r2
+	blt	.L2513
+.L2517:
+	adds	r6, r6, #1
+	b	.L2500
+.L2513:
+	lsls	r0, r3, #3
+	ldr	r3, [ip, r3, lsl #3]
+	adds	r1, r1, #1
+	uxth	lr, r3
+	cmp	r7, lr
+	itttt	hi
+	addhi	r0, r0, ip
+	ldrhi	r3, [sp]
+	ldrhi	r0, [r0, #4]
+	strhi	r0, [r3, lr, lsl #2]
+	b	.L2511
+.L2541:
+	.align	2
+.L2540:
+	.word	.LANCHOR189
+	.word	.LANCHOR211
+	.word	.LANCHOR195
+	.word	.LANCHOR53
+	.word	.LANCHOR2
+	.word	.LANCHOR57
+	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
+	.section	.text.FtlLoadVonderInfo,"ax",%progbits
+	.align	1
+	.global	FtlLoadVonderInfo
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlLoadVonderInfo, %function
+FtlLoadVonderInfo:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	ldr	r3, .L2543
+	ldr	r0, .L2543+4
+	ldrh	r3, [r3]
+	strh	r3, [r0, #10]	@ movhi
+	movw	r3, #61574
+	strh	r3, [r0, #4]	@ movhi
+	ldr	r3, .L2543+8
+	ldrh	r3, [r3]
+	strh	r3, [r0, #8]	@ movhi
+	ldr	r3, .L2543+12
+	ldrh	r3, [r3]
+	strh	r3, [r0, #6]	@ movhi
+	ldr	r3, .L2543+16
 	ldr	r3, [r3]
-	adds	r2, r3, r4
-	str	r1, [r2, #4]
-	strh	r6, [r3, r4]	@ movhi
-	b	.L2545
-.L2552:
-	ldr	r2, [r8]
-	cmp	r2, #256
-	bne	.L2553
-	mov	r2, r3
-	mov	r1, r7
-	ldr	r0, .L2558+72
-	bl	printf
-	ldr	r3, [r5]
-	mov	r1, r7
-	ldr	r0, .L2558+76
-	add	r3, r3, r4
-	ldr	r2, [r3, #8]
-	bl	FtlMapWritePage
-	b	.L2553
-.L2559:
+	str	r3, [r0, #12]
+	ldr	r3, .L2543+20
+	ldr	r3, [r3]
+	str	r3, [r0, #16]
+	ldr	r3, .L2543+24
+	ldr	r3, [r3]
+	str	r3, [r0, #20]
+	ldr	r3, .L2543+28
+	ldr	r3, [r3]
+	str	r3, [r0, #24]
+	bl	FtlMapTblRecovery
+	movs	r0, #0
+	pop	{r3, pc}
+.L2544:
 	.align	2
-.L2558:
-	.word	.LANCHOR72
-	.word	.LANCHOR56
-	.word	.LANCHOR228
-	.word	.LC5
-	.word	.LC6
-	.word	.LC7
-	.word	.LANCHOR96
-	.word	.LANCHOR67
-	.word	.LANCHOR66
-	.word	.LANCHOR229
-	.word	.LANCHOR131
-	.word	.LANCHOR57
-	.word	.LANCHOR97
-	.word	.LANCHOR188
-	.word	.LC57
-	.word	.LC27
-	.word	.LC58
-	.word	.LANCHOR76
-	.word	.LC59
-	.word	.LANCHOR127
-	.word	.LANCHOR203
-	.size	log2phys, .-log2phys
-	.section	.text.FtlProgPages,"ax",%progbits
+.L2543:
+	.word	.LANCHOR61
+	.word	.LANCHOR224
+	.word	.LANCHOR70
+	.word	.LANCHOR62
+	.word	.LANCHOR71
+	.word	.LANCHOR201
+	.word	.LANCHOR200
+	.word	.LANCHOR202
+	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
+	.section	.text.FtlLoadMapInfo,"ax",%progbits
 	.align	1
-	.global	FtlProgPages
+	.global	FtlLoadMapInfo
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlProgPages, %function
-FtlProgPages:
-	@ args = 0, pretend = 0, frame = 16
+	.type	FtlLoadMapInfo, %function
+FtlLoadMapInfo:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r4, r3
-	ldr	r3, .L2580
-	mov	r5, r0
-	mov	r10, r1
-	ldr	r7, [r3]
-	mov	r8, r3
-	cbnz	r7, .L2560
-	ldr	r3, .L2580+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2575
-	ldrb	r6, [r4, #8]	@ zero_extendqisi2
-	subs	r3, r6, #1
-	rsbs	r6, r3, #0
-	adcs	r6, r6, r3
-.L2562:
-	ldr	fp, .L2580+40
-	mov	r2, r6
-	ldrb	r3, [r4, #9]	@ zero_extendqisi2
-	mov	r1, r10
-	mov	r0, r5
-	bl	FlashProgPages
-.L2563:
-	cmp	r7, r10
-	bne	.L2573
-	ldr	r3, .L2580+8
-	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+	push	{r3, lr}
+	bl	FtlL2PDataInit
+	ldr	r0, .L2546
+	bl	FtlMapTblRecovery
+	movs	r0, #0
+	pop	{r3, pc}
+.L2547:
+	.align	2
+.L2546:
+	.word	.LANCHOR130
+	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
+	.section	.text.ftl_scan_all_ppa,"ax",%progbits
+	.align	1
+	.global	ftl_scan_all_ppa
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_scan_all_ppa, %function
+ftl_scan_all_ppa:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2564
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #32
+	ldr	r5, .L2564+4
+	ldrh	r4, [r3]
+	str	r3, [sp, #28]
+	subs	r4, r4, #16
+	lsl	r10, r4, #10
+.L2549:
+	ldr	r3, [sp, #28]
 	ldrh	r3, [r3]
-	cmp	r2, r3
-	bcc	.L2560
-	ldr	r1, .L2580+12
-	movw	r2, #1605
-	ldr	r0, .L2580+16
-	bl	printf
-	ldr	r1, .L2580+20
-	ldr	r0, .L2580+24
-	bl	printf
-.L2560:
-	add	sp, sp, #16
+	cmp	r4, r3
+	blt	.L2557
+	ldr	r1, .L2564+8
+	ldr	r0, .L2564+12
+	add	sp, sp, #32
 	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2575:
-	mov	r6, r7
-	b	.L2562
-.L2566:
-	ldr	r0, [r5, #4]
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-	ldrh	r3, [r4]
-	cmp	r3, r0
-	bne	.L2564
-	ldr	r1, [fp]
-	ldrh	r0, [r4, #4]
-	ldrh	r2, [r1, r3, lsl #1]
-	subs	r2, r2, r0
-	strh	r2, [r1, r3, lsl #1]	@ movhi
-	ldr	r3, .L2580+28
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	printf
+.L2557:
+	uxth	r7, r4
+	mov	r0, r7
+	bl	ftl_get_blk_mode
+	ldr	r3, .L2564+16
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2550
+	ldr	r3, .L2564+20
 	ldrh	r3, [r3]
-	strh	r3, [r4, #2]	@ movhi
-	movs	r3, #0
-	strb	r3, [r4, #6]
-	strh	r3, [r4, #4]	@ movhi
-.L2564:
-	ldrh	r3, [r4, #4]
-	cbnz	r3, .L2565
-	mov	r0, r4
-	bl	allocate_new_data_superblock
-.L2565:
-	ldr	r2, .L2580+32
-	ldr	r3, [r2, #96]
-	adds	r3, r3, #1
-	str	r3, [r2, #96]
-	ldr	r0, [r5, #4]
-	ubfx	r0, r0, #10, #16
-	bl	FtlGcMarkBadPhyBlk
-	mov	r0, r4
-	bl	get_new_active_ppa
+	cmp	r4, r3
+	bge	.L2551
+	ldr	r3, .L2564+24
+	ldrh	r3, [r3]
+	cmp	r4, r3
+	blt	.L2551
+.L2550:
+	cmp	r0, #1
+	bne	.L2552
+.L2551:
+	ldr	r3, .L2564+28
+	mov	r8, #-2147483648
+	ldrh	r6, [r3]
+.L2553:
+	mov	r3, r8
 	mov	r2, r6
-	str	r0, [r5, #4]
-	str	r0, [sp, #12]
+	mov	r1, r4
+	ldr	r0, .L2564+32
+	bl	printf
+	mov	r0, r7
+	bl	FtlBbmIsBadBlock
+	cbz	r0, .L2554
+	mov	r3, r8
+	mov	r2, r6
+	mov	r1, r4
+	ldr	r0, .L2564+36
+	bl	printf
+.L2554:
+	ldr	fp, .L2564+52
+	movs	r7, #0
+.L2555:
+	cmp	r7, r6
+	bne	.L2556
+	adds	r4, r4, #1
+	add	r10, r10, #1024
+	b	.L2549
+.L2552:
+	ldr	r3, .L2564+40
+	mov	r8, #0
+	ldrh	r6, [r3]
+	b	.L2553
+.L2556:
+	add	r3, r8, r10
+	movs	r2, #0
+	add	r3, r3, r7
 	movs	r1, #1
-	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	str	r3, [r5, #4]
 	mov	r0, r5
-	bl	FlashProgPages
-	ldr	r3, [r8]
-	cmp	r3, #0
-	bne	.L2560
-.L2573:
-	ldr	r3, [r5]
-	adds	r3, r3, #1
-	beq	.L2566
-	ldr	r3, .L2580+8
-	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-	ldrh	r3, [r3]
-	cmp	r2, r3
-	bcc	.L2567
-	ldr	r1, .L2580+12
-	movw	r2, #1588
-	ldr	r0, .L2580+16
-	bl	printf
-	ldr	r1, .L2580+20
-	ldr	r0, .L2580+24
+	ldr	r3, [fp]
+	adds	r7, r7, #1
+	str	r2, [r5]
+	str	r3, [r5, #8]
+	ldr	r3, .L2564+44
+	ldr	r3, [r3]
+	str	r3, [r5, #12]
+	bl	FlashReadPages
+	ldr	r2, [r5, #8]
+	ldr	r3, [r5, #12]
+	ldr	r0, .L2564+48
+	ldr	r1, [r2, #4]
+	str	r1, [sp, #16]
+	ldr	r2, [r2]
+	ldr	r1, [r5, #4]
+	str	r2, [sp, #12]
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	ldr	r2, [r3, #8]
+	str	r2, [sp, #4]
+	ldr	r2, [r3, #4]
+	str	r2, [sp]
+	ldr	r2, [r5]
+	ldr	r3, [r3]
 	bl	printf
+	b	.L2555
+.L2565:
+	.align	2
+.L2564:
+	.word	.LANCHOR51
+	.word	.LANCHOR211
+	.word	.LANCHOR235
+	.word	.LC58
+	.word	.LANCHOR16
+	.word	.LANCHOR40
+	.word	.LANCHOR59
+	.word	.LANCHOR53
+	.word	.LC55
+	.word	.LC56
+	.word	.LANCHOR52
+	.word	.LANCHOR195
+	.word	.LC57
+	.word	.LANCHOR189
+	.size	ftl_scan_all_ppa, .-ftl_scan_all_ppa
+	.section	.text.FlashReadFacBbtData,"ax",%progbits
+	.align	1
+	.global	FlashReadFacBbtData
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashReadFacBbtData, %function
+FlashReadFacBbtData:
+	@ args = 0, pretend = 0, frame = 48
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	fp, r2
+	ldr	r2, .L2579
+	sub	sp, sp, #48
+	mov	r6, r1
+	mov	r4, r0
+	ldr	r7, .L2579+4
+	ldrh	r3, [r2, #14]
+	ldrh	r2, [r2, #12]
+	smulbb	r3, r3, r2
+	ldr	r2, [r7]
+	uxth	r3, r3
+	str	r2, [sp, #20]
+	ldr	r2, .L2579+8
+	subs	r5, r3, #1
+	mul	r10, r6, r3
+	uxth	r5, r5
+	subs	r3, r3, #15
+	ldr	r1, [r2]
+	mov	r8, r2
+	str	r1, [sp, #24]
 .L2567:
-	ldr	r3, [r5, #4]
-	cbnz	r6, .L2568
-.L2579:
+	cmp	r3, r5
+	ble	.L2574
+	mov	r0, #-1
+	b	.L2566
+.L2574:
+	add	r2, r5, r10
+	add	r0, sp, #12
+	lsls	r2, r2, #10
+	str	r3, [sp, #4]
+	str	r2, [sp, #16]
 	movs	r2, #1
-	add	r1, sp, #12
-	ldr	r0, [r5, #16]
-	str	r3, [sp, #12]
-	bl	log2phys
-	ldr	r3, [r5, #12]
-	ldr	r2, [r3, #12]
-	ubfx	r0, r2, #10, #16
-	str	r2, [sp, #4]
-	bl	P2V_block_in_plane
-	ldr	r2, [sp, #4]
-	mov	r3, r0
-	adds	r2, r2, #1
-	beq	.L2570
-	ldr	r2, [fp]
-	ldrh	r2, [r2, r0, lsl #1]
-	cbnz	r2, .L2571
-	mov	r1, r0
-	str	r0, [sp, #4]
-	ldr	r0, .L2580+36
-	bl	printf
+	mov	r1, r2
+	bl	FlashReadPages
+	ldr	r2, [sp, #12]
 	ldr	r3, [sp, #4]
-.L2571:
-	mov	r0, r3
-	bl	decrement_vpc_count
+	adds	r2, r2, #1
+	beq	.L2568
+	ldr	r2, [r8]
+	ldrh	r1, [r2]
+	movw	r2, #61664
+	cmp	r1, r2
+	bne	.L2568
+	cbz	r4, .L2575
+	cbz	r6, .L2570
+.L2573:
+	mov	r2, fp
+	ldr	r1, [r7]
+	mov	r0, r4
+	bl	ftl_memcpy
+	movs	r3, #4
+	ldr	r0, .L2579+12
+	mov	r2, r3
+	mov	r1, r4
+	bl	rknand_print_hex
+	movs	r0, #0
+.L2566:
+	add	sp, sp, #48
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
 .L2570:
-	adds	r7, r7, #1
-	adds	r5, r5, #36
-	b	.L2563
+	ldr	r1, [r7]
+	mov	ip, #1
+	ldr	r5, .L2579+16
+.L2571:
+	ldr	r0, [r5]
+	uxth	r3, r6
+	adds	r6, r6, #1
+	cmp	r3, r0
+	bcs	.L2573
+	lsrs	r0, r3, #5
+	and	r3, r3, #31
+	lsl	r3, ip, r3
+	ldr	r2, [r1, r0, lsl #2]
+	orrs	r3, r3, r2
+	str	r3, [r1, r0, lsl #2]
+	b	.L2571
 .L2568:
-	orr	r3, r3, #-2147483648
-	b	.L2579
-.L2581:
-	.align	2
+	subs	r5, r5, #1
+	uxth	r5, r5
+	b	.L2567
+.L2575:
+	mov	r0, r4
+	b	.L2566
 .L2580:
-	.word	.LANCHOR76
+	.align	2
+.L2579:
 	.word	.LANCHOR15
-	.word	.LANCHOR38
-	.word	.LANCHOR230
-	.word	.LC5
-	.word	.LC6
-	.word	.LC7
-	.word	.LANCHOR52
-	.word	.LANCHOR138
-	.word	.LC60
-	.word	.LANCHOR83
-	.size	FtlProgPages, .-FtlProgPages
-	.section	.text.FtlCacheWriteBack,"ax",%progbits
+	.word	.LANCHOR154
+	.word	.LANCHOR205
+	.word	.LC59
+	.word	.LANCHOR156
+	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
+	.section	.text.FlashGetBadBlockList,"ax",%progbits
 	.align	1
-	.global	FtlCacheWriteBack
+	.global	FlashGetBadBlockList
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlCacheWriteBack, %function
-FtlCacheWriteBack:
+	.type	FlashGetBadBlockList, %function
+FlashGetBadBlockList:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	ldr	r3, .L2587
-	ldr	r4, [r3]
-	cbnz	r4, .L2583
-	ldr	r5, .L2587+4
-	ldr	r0, [r5]
-	cbz	r0, .L2583
-	ldr	r3, .L2587+8
-	mov	r2, r4
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r5, r0
+	ldr	r3, .L2591
+	ldr	r6, .L2591+4
+	ldr	r3, [r3]
+	ldr	r0, [r6]
+	ldrb	r4, [r3, #13]	@ zero_extendqisi2
+	ldrh	r3, [r3, #14]
+	smulbb	r4, r4, r3
+	uxth	r4, r4
+	adds	r2, r4, #7
+	asrs	r2, r2, #3
+	bl	FlashReadFacBbtData
+	adds	r0, r0, #1
+	bne	.L2582
+.L2586:
+	movs	r3, #0
+.L2583:
+	movw	r2, #65535
+	movs	r0, #0
+	strh	r2, [r5, r3, lsl #1]	@ movhi
+	pop	{r3, r4, r5, r6, r7, pc}
+.L2582:
+	ldr	r7, [r6]
+	movs	r2, #0
+	lsr	ip, r4, #4
+	mov	r3, r2
+	subs	r4, r4, #1
+	mov	lr, #1
+.L2584:
+	uxth	r1, r2
+	cmp	r1, r4
+	bge	.L2583
+	lsrs	r6, r1, #5
+	and	r0, r1, #31
+	lsl	r0, lr, r0
+	adds	r2, r2, #1
+	ldr	r6, [r7, r6, lsl #2]
+	tst	r0, r6
+	ittt	ne
+	addne	r0, r3, #1
+	strhne	r1, [r5, r3, lsl #1]	@ movhi
+	uxthne	r3, r0
+	cmp	r3, ip
+	bcc	.L2584
+	b	.L2586
+.L2592:
+	.align	2
+.L2591:
+	.word	.LANCHOR7
+	.word	.LANCHOR152
+	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
+	.section	.text.FtlMakeBbt,"ax",%progbits
+	.align	1
+	.global	FtlMakeBbt
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlMakeBbt, %function
+FtlMakeBbt:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2613
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r7, [r3]
+	cmp	r7, #0
+	bne	.L2594
+	ldr	r8, .L2613+40
+	ldr	r4, .L2613+4
+	bl	FtlBbtMemInit
+	sub	r10, r8, #18
+	bl	FtlLoadFactoryBbt
+.L2595:
+	ldr	r3, .L2613+8
+	ldrh	r3, [r3]
+	cmp	r7, r3
+	bcc	.L2601
+	ldr	r5, .L2613+12
+	movs	r4, #0
+.L2602:
+	ldrh	r3, [r5]
+	uxth	r0, r4
+	adds	r4, r4, #1
+	cmp	r3, r0
+	bhi	.L2603
+	ldr	r4, .L2613+16
+	movw	r6, #65535
+	ldrh	r5, [r4, #12]
+	subs	r5, r5, #1
+	uxth	r5, r5
+.L2604:
+	ldrh	r3, [r4, #12]
+	subs	r3, r3, #47
+	cmp	r3, r5
+	bgt	.L2608
+	mov	r0, r5
+	bl	FtlBbmIsBadBlock
+	cmp	r0, #1
+	beq	.L2605
+	mov	r0, r5
+	bl	FlashTestBlk
+	cmp	r0, #0
+	beq	.L2606
+	mov	r0, r5
+	bl	FtlBbmMapBadBlock
+.L2605:
+	subs	r5, r5, #1
+	uxth	r5, r5
+	b	.L2604
+.L2601:
+	ldr	r3, .L2613+20
+	movw	r1, #65535
+	ldrh	r2, [r10, #2]!
+	ldr	r0, [r3]
+	ldr	r3, .L2613+24
+	cmp	r2, r1
+	str	r0, [r4, #8]
+	ldr	fp, [r3]
+	str	r3, [sp, #4]
+	ldr	r3, .L2613+28
+	str	fp, [r4, #12]
+	beq	.L2596
+	ldrh	r6, [r3]
+	mov	r0, r4
+	str	r3, [sp]
+	mla	r6, r7, r6, r2
+	lsls	r2, r6, #10
+	str	r2, [r4, #4]
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+	ldr	r3, [sp]
+	ldr	r1, [r4, #8]
+	ldr	r0, [r8]
+	ldrh	r2, [r3]
+	adds	r2, r2, #7
+	asrs	r2, r2, #3
+	bl	ftl_memcpy
+.L2597:
+	uxth	r0, r6
+	adds	r7, r7, #1
+	add	r8, r8, #4
+	bl	FtlBbmMapBadBlock
+	b	.L2595
+.L2596:
+	mov	r1, r7
+	str	r3, [sp]
+	bl	FlashGetBadBlockList
+	ldr	r1, [r8]
+	ldr	r0, [r4, #8]
+	bl	FtlBbt2Bitmap
+	ldr	r3, [sp]
+	ldrh	r5, [r3]
+.L2599:
+	subs	r5, r5, #1
+	uxth	r5, r5
+.L2598:
+	ldr	r3, [sp]
+	ldrh	r0, [r3]
+	smlabb	r0, r0, r7, r5
+	uxth	r0, r0
+	bl	FtlBbmIsBadBlock
+	cmp	r0, #1
+	beq	.L2599
+	ldr	r3, [sp, #4]
+	movs	r2, #16
+	movs	r1, #0
+	strh	r5, [r10]	@ movhi
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldr	r2, [sp]
+	movw	r3, #61664
+	strh	r3, [fp]	@ movhi
+	movs	r3, #0
+	str	r3, [fp, #4]
+	ldrh	r6, [r2]
+	ldrh	r3, [r10]
+	ldr	r1, [r8]
+	ldr	r0, [r4, #8]
+	strh	r3, [fp, #2]	@ movhi
+	mla	r6, r7, r6, r3
+	lsls	r3, r6, #10
+	str	r3, [r4, #4]
+	ldr	r3, .L2613+32
+	ldrh	r2, [r3]
+	lsls	r2, r2, #2
+	bl	ftl_memcpy
+	movs	r2, #1
+	mov	r0, r4
+	mov	r1, r2
+	bl	FlashEraseBlocks
+	movs	r3, #1
+	mov	r0, r4
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	bne	.L2597
+	uxth	r0, r6
+	bl	FtlBbmMapBadBlock
+	b	.L2598
+.L2603:
+	bl	FtlBbmMapBadBlock
+	b	.L2602
+.L2606:
+	ldrh	r3, [r4]
+	cmp	r3, r6
+	bne	.L2607
+	strh	r5, [r4]	@ movhi
+	b	.L2605
+.L2607:
+	strh	r5, [r4, #4]	@ movhi
+.L2608:
+	ldr	r3, .L2613+36
+	movs	r5, #0
+	str	r5, [r4, #8]
+	movs	r2, #2
 	movs	r1, #1
-	ldr	r3, [r3]
-	bl	FtlProgPages
-	str	r4, [r5]
-.L2583:
-	movs	r0, #0
-	pop	{r3, r4, r5, pc}
-.L2588:
-	.align	2
-.L2587:
-	.word	.LANCHOR76
-	.word	.LANCHOR132
-	.word	.LANCHOR231
-	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
-	.section	.text.FtlSysFlush,"ax",%progbits
-	.align	1
-	.global	FtlSysFlush
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlSysFlush, %function
-FtlSysFlush:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	ldr	r3, .L2591
-	ldr	r3, [r3]
-	cbnz	r3, .L2590
-	bl	FtlCacheWriteBack
-	bl	l2p_flush
-	movs	r0, #1
-	bl	FtlEctTblFlush
-	bl	FtlVpcTblFlush
-.L2590:
-	movs	r0, #0
-	pop	{r3, pc}
-.L2592:
-	.align	2
-.L2591:
-	.word	.LANCHOR76
-	.size	FtlSysFlush, .-FtlSysFlush
-	.section	.text.FtlDeInit,"ax",%progbits
-	.align	1
-	.global	FtlDeInit
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlDeInit, %function
-FtlDeInit:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	ldr	r3, .L2595
-	ldr	r3, [r3]
-	cmp	r3, #1
-	bne	.L2594
-	bl	FtlSysFlush
+	strh	r5, [r4, #2]	@ movhi
+	ldr	r0, [r3]
+	ldrh	r3, [r4]
+	lsls	r3, r3, #10
+	str	r3, [r0, #4]
+	ldrh	r3, [r4, #4]
+	lsls	r3, r3, #10
+	str	r3, [r0, #40]
+	bl	FlashEraseBlocks
+	ldrh	r0, [r4]
+	bl	FtlBbmMapBadBlock
+	ldrh	r0, [r4, #4]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	ldr	r3, [r4, #8]
+	ldrh	r2, [r4, #4]
+	strh	r5, [r4, #2]	@ movhi
+	adds	r3, r3, #1
+	str	r3, [r4, #8]
+	ldrh	r3, [r4]
+	strh	r2, [r4]	@ movhi
+	strh	r3, [r4, #4]	@ movhi
+	bl	FtlBbmTblFlush
 .L2594:
 	movs	r0, #0
-	pop	{r3, pc}
-.L2596:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2614:
 	.align	2
-.L2595:
-	.word	.LANCHOR232
-	.size	FtlDeInit, .-FtlDeInit
-	.section	.text.rk_ftl_de_init,"ax",%progbits
-	.align	1
-	.global	rk_ftl_de_init
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	rk_ftl_de_init, %function
-rk_ftl_de_init:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	bl	FlashDeInit
-	bl	FtlDeInit
-	pop	{r3, lr}
-	b	FlashDeInit
-	.size	rk_ftl_de_init, .-rk_ftl_de_init
-	.section	.text.ftl_discard,"ax",%progbits
+.L2613:
+	.word	.LANCHOR78
+	.word	.LANCHOR211
+	.word	.LANCHOR45
+	.word	.LANCHOR59
+	.word	.LANCHOR76
+	.word	.LANCHOR189
+	.word	.LANCHOR195
+	.word	.LANCHOR51
+	.word	.LANCHOR126
+	.word	.LANCHOR79
+	.word	.LANCHOR76+28
+	.size	FtlMakeBbt, .-FtlMakeBbt
+	.section	.text.log2phys,"ax",%progbits
 	.align	1
-	.global	ftl_discard
+	.global	log2phys
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_discard, %function
-ftl_discard:
-	@ args = 0, pretend = 0, frame = 8
+	.type	log2phys, %function
+log2phys:
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2613
-	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	mov	r5, r2
-	adds	r2, r1, r2
-	mov	r6, r1
-	ldr	r3, [r3]
-	cmp	r2, r3
-	bhi	.L2606
-	cmp	r5, #31
-	bhi	.L2600
-.L2601:
-	movs	r0, #0
-.L2598:
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, pc}
-.L2600:
-	ldr	r3, .L2613+4
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #24
+	ldr	r4, .L2633
+	mov	fp, r0
+	str	r2, [sp, #16]
+	ldr	r2, [r4]
+	ldr	r3, .L2633+4
+	str	r1, [sp, #4]
+	cmp	r0, r2
+	ldrh	r5, [r3]
+	bcc	.L2616
+	ldr	r1, .L2633+8
+	mov	r2, #1004
+	ldr	r0, .L2633+12
+	bl	printf
+	ldr	r1, .L2633+16
+	ldr	r0, .L2633+20
+	bl	printf
+.L2616:
+	ldr	r3, [r4]
+	cmp	fp, r3
+	bcs	.L2617
+	adds	r3, r5, #7
+	ldr	r5, .L2633+24
+	lsr	r7, fp, r3
+	str	r3, [sp, #8]
+	ldr	r3, .L2633+28
+	movs	r4, #12
+	ldr	r1, [r5]
+	uxth	r6, r7
+	ldrh	r2, [r3]
+	movs	r3, #0
+.L2618:
+	uxth	r10, r3
+	cmp	r10, r2
+	bcc	.L2623
+	bl	select_l2p_ram_region
+	muls	r4, r0, r4
+	ldr	r3, [r5]
+	mov	r10, r0
+	ldrh	r1, [r3, r4]
+	adds	r2, r3, r4
+	movw	r3, #65535
+	cmp	r1, r3
+	beq	.L2624
+	ldr	r3, [r2, #4]
+	cmp	r3, #0
+	bge	.L2624
+	bl	flush_l2p_region
+.L2624:
+	ldr	r3, .L2633+32
+	ldrh	r3, [r3]
+	cmp	r3, r6
+	bcs	.L2625
+	ldr	r1, .L2633+36
+	movw	r2, #597
+	ldr	r0, .L2633+12
+	bl	printf
+	ldr	r1, .L2633+16
+	ldr	r0, .L2633+20
+	bl	printf
+.L2625:
+	ldr	r3, .L2633+40
+	uxth	r7, r7
 	ldr	r3, [r3]
+	ldr	r3, [r3, r7, lsl #2]
 	cmp	r3, #0
-	bne	.L2601
-	ldr	r8, .L2613+16
-	bl	FtlCacheWriteBack
-	mov	r0, r6
-	ldrh	r4, [r8]
-	mov	r1, r4
-	bl	__aeabi_uidiv
-	smulbb	r3, r0, r4
-	mov	r7, r0
-	subs	r6, r6, r3
-	uxth	r6, r6
-	cbz	r6, .L2602
-	subs	r4, r4, r6
-	adds	r7, r7, #1
-	cmp	r4, r5
-	it	cs
-	movcs	r4, r5
-	uxth	r4, r4
-	subs	r5, r5, r4
-.L2602:
-	ldr	r4, .L2613+8
-	mov	r3, #-1
-	ldr	r6, .L2613+12
-	str	r3, [sp, #4]
-.L2603:
-	ldrh	r3, [r8]
-	cmp	r5, r3
-	bcs	.L2605
-	ldr	r3, .L2613+8
-	ldr	r2, [r3]
-	cmp	r2, #32
-	bls	.L2601
-	movs	r4, #0
-	str	r4, [r3]
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
-	b	.L2601
-.L2605:
-	movs	r2, #0
-	mov	r1, sp
-	mov	r0, r7
-	bl	log2phys
-	ldr	r3, [sp]
-	adds	r3, r3, #1
-	beq	.L2604
-	ldr	r3, [r4]
-	movs	r2, #1
-	add	r1, sp, #4
-	mov	r0, r7
+	bne	.L2626
+	ldr	r2, [r5]
+	movs	r1, #255
+	str	r3, [sp, #12]
+	adds	r0, r2, r4
+	ldr	r2, .L2633+44
+	ldr	r0, [r0, #8]
+	ldrh	r2, [r2]
+	bl	ftl_memset
+	ldr	r2, [r5]
+	ldr	r3, [sp, #12]
+	adds	r1, r2, r4
+	strh	r6, [r2, r4]	@ movhi
+	str	r3, [r1, #4]
+	b	.L2620
+.L2617:
+	ldr	r3, [sp, #16]
+	mov	r0, #-1
+	cbnz	r3, .L2615
+	ldr	r3, [sp, #4]
+	str	r0, [r3]
+.L2615:
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2623:
 	adds	r3, r3, #1
-	str	r3, [r4]
-	ldr	r3, [r6]
+	mla	r0, r4, r3, r1
+	ldrh	r0, [r0, #-12]
+	cmp	r0, r6
+	bne	.L2618
+.L2620:
+	ldr	r2, [sp, #8]
+	movs	r3, #1
+	ldr	r0, [sp, #16]
+	ldr	r1, .L2633+24
+	lsls	r3, r3, r2
+	movs	r2, #12
+	subs	r3, r3, #1
+	and	r3, r3, fp
+	uxth	r3, r3
+	cbnz	r0, .L2621
+	ldr	r0, [r1]
+	mla	r2, r2, r10, r0
+	ldr	r2, [r2, #8]
+	ldr	r3, [r2, r3, lsl #2]
+	ldr	r2, [sp, #4]
+	str	r3, [r2]
+.L2622:
+	ldr	r2, [r1]
+	movs	r3, #12
+	mla	r10, r3, r10, r2
+	ldr	r3, [r10, #4]
+	adds	r2, r3, #1
+	beq	.L2631
 	adds	r3, r3, #1
-	str	r3, [r6]
-	bl	log2phys
-	ldr	r0, [sp]
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-	bl	decrement_vpc_count
-.L2604:
-	ldrh	r3, [r8]
-	adds	r7, r7, #1
-	subs	r5, r5, r3
-	b	.L2603
-.L2606:
-	mov	r0, #-1
-	b	.L2598
-.L2614:
+	str	r3, [r10, #4]
+.L2631:
+	movs	r0, #0
+	b	.L2615
+.L2621:
+	ldr	r0, [r1]
+	mla	r2, r2, r10, r0
+	ldr	r0, [sp, #4]
+	ldr	r4, [r0]
+	ldr	r0, [r2, #8]
+	str	r4, [r0, r3, lsl #2]
+	ldr	r3, [r2, #4]
+	orr	r3, r3, #-2147483648
+	str	r3, [r2, #4]
+	ldr	r3, .L2633+48
+	strh	r6, [r3]	@ movhi
+	b	.L2622
+.L2626:
+	ldr	r2, [r5]
+	ldr	r8, .L2633+80
+	str	r3, [sp, #20]
+	add	r2, r2, r4
+	ldr	r2, [r2, #8]
+	mov	r0, r8
+	str	r3, [r8, #4]
+	str	r2, [r8, #8]
+	ldr	r2, .L2633+52
+	ldr	r2, [r2]
+	str	r2, [r8, #12]
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+	ldr	r3, [r8, #12]
+	ldrh	r2, [r3, #8]
+	str	r3, [sp, #12]
+	ldr	r3, [sp, #20]
+	cmp	r2, r6
+	beq	.L2627
+	mov	r2, r3
+	mov	r1, r7
+	ldr	r0, .L2633+56
+	bl	printf
+	movs	r3, #4
+	ldr	r1, [r8, #12]
+	mov	r2, r3
+	ldr	r0, .L2633+60
+	bl	rknand_print_hex
+	ldr	r3, .L2633+32
+	movs	r2, #4
+	ldr	r1, .L2633+40
+	ldr	r0, .L2633+64
+	ldrh	r3, [r3]
+	ldr	r1, [r1]
+	bl	rknand_print_hex
+	ldr	r3, .L2633+68
+	movs	r2, #1
+	str	r2, [r3]
+.L2628:
+	ldr	r3, [sp, #12]
+	ldrh	r3, [r3, #8]
+	cmp	r3, r6
+	beq	.L2629
+	ldr	r1, .L2633+36
+	mov	r2, #624
+	ldr	r0, .L2633+12
+	bl	printf
+	ldr	r1, .L2633+16
+	ldr	r0, .L2633+20
+	bl	printf
+.L2629:
+	ldr	r3, .L2633+24
+	movs	r1, #0
+	ldr	r3, [r3]
+	adds	r2, r3, r4
+	str	r1, [r2, #4]
+	strh	r6, [r3, r4]	@ movhi
+	b	.L2620
+.L2627:
+	ldr	r2, [r8]
+	cmp	r2, #256
+	bne	.L2628
+	mov	r2, r3
+	mov	r1, r7
+	ldr	r0, .L2633+72
+	bl	printf
+	ldr	r3, [r5]
+	mov	r1, r7
+	ldr	r0, .L2633+76
+	add	r3, r3, r4
+	ldr	r2, [r3, #8]
+	bl	FtlMapWritePage
+	b	.L2628
+.L2634:
 	.align	2
-.L2613:
-	.word	.LANCHOR68
-	.word	.LANCHOR76
-	.word	.LANCHOR233
-	.word	.LANCHOR163
-	.word	.LANCHOR55
-	.size	ftl_discard, .-ftl_discard
+.L2633:
+	.word	.LANCHOR74
+	.word	.LANCHOR56
+	.word	.LANCHOR236
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LANCHOR98
+	.word	.LANCHOR67
+	.word	.LANCHOR66
+	.word	.LANCHOR237
+	.word	.LANCHOR134
+	.word	.LANCHOR57
+	.word	.LANCHOR99
+	.word	.LANCHOR195
+	.word	.LC60
+	.word	.LC28
+	.word	.LC61
+	.word	.LANCHOR78
+	.word	.LC62
+	.word	.LANCHOR130
+	.word	.LANCHOR211
+	.size	log2phys, .-log2phys
 	.section	.text.FtlCheckVpc,"ax",%progbits
 	.align	1
 	.global	FtlCheckVpc
@@ -18488,133 +18452,137 @@ FtlCheckVpc:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r6, .L2639
-	ldr	r5, .L2639+4
-	ldr	r1, .L2639+8
-	ldr	r0, .L2639+12
+	ldr	r6, .L2659
+	ldr	r5, .L2659+4
+	ldr	r1, .L2659+8
+	ldr	r0, .L2659+12
 	bl	printf
 	mov	r2, #8192
 	movs	r1, #0
-	ldr	r0, .L2639+4
+	ldr	r0, .L2659+4
 	bl	memset
-.L2616:
+.L2636:
 	ldr	r3, [r6]
 	cmp	r4, r3
-	bcc	.L2618
-	ldr	r10, .L2639+56
+	bcc	.L2638
+	ldr	r10, .L2659+60
 	movs	r4, #0
-	ldr	r7, .L2639+16
-	mov	r6, r4
-.L2619:
+	ldr	r7, .L2659+16
+	mov	r5, r4
+.L2639:
 	ldrh	r2, [r10]
 	uxth	r3, r4
 	cmp	r2, r3
-	bhi	.L2621
-	ldr	r3, .L2639+20
+	bhi	.L2641
+	ldr	r3, .L2659+20
 	ldr	r4, [r3]
-	cbz	r4, .L2622
-	ldr	r3, .L2639+24
+	cbz	r4, .L2642
+	ldr	r3, .L2659+24
 	mov	r8, #0
-	ldr	r5, .L2639+28
-	ldr	r10, .L2639+16
+	ldr	r6, .L2659+28
+	ldr	r10, .L2659+16
 	ldrh	r7, [r3]
-	ldr	r3, [r5]
-	ldr	fp, .L2639+4
+	ldr	r3, [r6]
+	ldr	fp, .L2659+4
 	subs	r4, r4, r3
-	ldr	r3, .L2639+32
+	ldr	r3, .L2659+32
 	asrs	r4, r4, #1
 	muls	r4, r3, r4
 	uxth	r4, r4
-.L2623:
+.L2643:
 	uxth	r3, r8
 	cmp	r7, r3
-	bls	.L2622
+	bls	.L2642
 	ldr	r3, [r10]
 	ldrh	r2, [r3, r4, lsl #1]
-	cbz	r2, .L2624
-	movs	r6, #1
+	cbz	r2, .L2644
+	movs	r5, #1
 	ldrh	r3, [fp, r4, lsl #1]
 	mov	r1, r4
-	ldr	r0, .L2639+36
+	ldr	r0, .L2659+36
 	bl	printf
-.L2624:
+.L2644:
 	movs	r3, #6
-	ldr	r2, [r5]
+	ldr	r2, [r6]
 	muls	r4, r3, r4
 	movw	r3, #65535
 	add	r8, r8, #1
 	ldrh	r4, [r2, r4]
 	cmp	r4, r3
-	bne	.L2623
-.L2622:
-	cbz	r6, .L2615
-	ldr	r1, .L2639+8
-	mov	r2, #1688
-	ldr	r0, .L2639+40
+	bne	.L2643
+.L2642:
+	mov	r1, r5
+	ldr	r0, .L2659+40
 	bl	printf
-	ldr	r1, .L2639+44
-	ldr	r0, .L2639+48
+	cbz	r5, .L2635
+	ldr	r1, .L2659+8
+	movw	r2, #1849
+	ldr	r0, .L2659+44
 	bl	printf
-.L2615:
+	ldr	r1, .L2659+48
+	ldr	r0, .L2659+52
+	bl	printf
+.L2635:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2618:
+.L2638:
 	movs	r2, #0
 	add	r1, sp, #4
 	mov	r0, r4
 	bl	log2phys
 	ldr	r0, [sp, #4]
 	adds	r3, r0, #1
-	beq	.L2617
+	beq	.L2637
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r5, r0, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r5, r0, lsl #1]	@ movhi
-.L2617:
+.L2637:
 	adds	r4, r4, #1
-	b	.L2616
-.L2621:
+	b	.L2636
+.L2641:
 	ldr	r3, [r7]
-	uxth	r5, r4
-	ldr	r8, .L2639+4
-	ldrh	r2, [r3, r5, lsl #1]
-	ldrh	r3, [r8, r5, lsl #1]
+	uxth	r6, r4
+	ldr	r8, .L2659+4
+	ldrh	r2, [r3, r6, lsl #1]
+	ldrh	r3, [r8, r6, lsl #1]
 	cmp	r2, r3
-	beq	.L2620
-	mov	r1, r5
-	ldr	r0, .L2639+52
+	beq	.L2640
+	mov	r1, r6
+	ldr	r0, .L2659+56
 	bl	printf
 	ldr	r3, [r7]
 	movw	r2, #65535
-	ldrh	r3, [r3, r5, lsl #1]
+	ldrh	r3, [r3, r6, lsl #1]
 	cmp	r3, r2
-	beq	.L2620
-	ldrh	r2, [r8, r5, lsl #1]
+	beq	.L2640
+	ldrh	r2, [r8, r6, lsl #1]
 	cmp	r2, r3
 	it	hi
-	movhi	r6, #1
-.L2620:
-	adds	r4, r4, #1
-	b	.L2619
+	movhi	r5, #1
 .L2640:
+	adds	r4, r4, #1
+	b	.L2639
+.L2660:
 	.align	2
-.L2639:
-	.word	.LANCHOR72
+.L2659:
+	.word	.LANCHOR74
 	.word	check_valid_page_count_table
-	.word	.LANCHOR234
-	.word	.LC46
+	.word	.LANCHOR238
+	.word	.LC48
+	.word	.LANCHOR85
+	.word	.LANCHOR89
+	.word	.LANCHOR90
 	.word	.LANCHOR83
-	.word	.LANCHOR87
-	.word	.LANCHOR88
-	.word	.LANCHOR81
 	.word	-1431655765
-	.word	.LC62
+	.word	.LC64
+	.word	.LC65
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC61
+	.word	.LC63
 	.word	.LANCHOR40
 	.size	FtlCheckVpc, .-FtlCheckVpc
 	.section	.text.Ftlscanalldata,"ax",%progbits
@@ -18630,60 +18598,60 @@ Ftlscanalldata:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r5, #0
-	ldr	r7, .L2655
+	ldr	r7, .L2675
 	sub	sp, sp, #32
 	movs	r1, #0
-	ldr	r8, .L2655+24
-	ldr	r0, .L2655+4
+	ldr	r8, .L2675+24
+	ldr	r0, .L2675+4
 	bl	printf
-.L2642:
+.L2662:
 	ldr	r3, [r7]
 	cmp	r5, r3
-	bcc	.L2648
+	bcc	.L2668
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L2648:
+.L2668:
 	movs	r2, #0
 	add	r1, sp, #28
 	mov	r0, r5
 	bl	log2phys
 	ubfx	r3, r5, #0, #11
-	cbnz	r3, .L2643
+	cbnz	r3, .L2663
 	ldr	r2, [sp, #28]
 	mov	r1, r5
 	mov	r0, r8
 	bl	printf
-.L2643:
+.L2663:
 	ldr	r3, [sp, #28]
 	adds	r2, r3, #1
-	beq	.L2645
-	ldr	r4, .L2655+8
+	beq	.L2665
+	ldr	r4, .L2675+8
 	movs	r2, #0
 	movs	r1, #1
 	str	r3, [r4, #4]
 	mov	r0, r4
-	ldr	r3, .L2655+12
+	ldr	r3, .L2675+12
 	str	r5, [r4, #16]
 	str	r2, [r4]
 	ldr	r3, [r3]
 	str	r3, [r4, #8]
-	ldr	r3, .L2655+16
+	ldr	r3, .L2675+16
 	ldr	r6, [r3]
 	str	r6, [r4, #12]
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	cmp	r3, #256
-	beq	.L2646
+	beq	.L2666
 	adds	r3, r3, #1
-	beq	.L2646
+	beq	.L2666
 	ldr	r3, [r6, #8]
 	cmp	r5, r3
-	beq	.L2645
-.L2646:
+	beq	.L2665
+.L2666:
 	ldr	r2, [r4, #8]
 	ldr	r3, [r4, #12]
-	ldr	r0, .L2655+20
+	ldr	r0, .L2675+20
 	ldr	r1, [r2, #4]
 	str	r1, [sp, #16]
 	mov	r1, r5
@@ -18698,19 +18666,19 @@ Ftlscanalldata:
 	ldr	r2, [r4, #4]
 	ldr	r3, [r3]
 	bl	printf
-.L2645:
+.L2665:
 	adds	r5, r5, #1
-	b	.L2642
-.L2656:
+	b	.L2662
+.L2676:
 	.align	2
-.L2655:
-	.word	.LANCHOR72
-	.word	.LC63
-	.word	.LANCHOR203
-	.word	.LANCHOR183
-	.word	.LANCHOR188
-	.word	.LC65
-	.word	.LC64
+.L2675:
+	.word	.LANCHOR74
+	.word	.LC66
+	.word	.LANCHOR211
+	.word	.LANCHOR189
+	.word	.LANCHOR195
+	.word	.LC68
+	.word	.LC67
 	.size	Ftlscanalldata, .-Ftlscanalldata
 	.section	.text.FtlReUsePrevPpa,"ax",%progbits
 	.align	1
@@ -18725,7 +18693,7 @@ FtlReUsePrevPpa:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r6, r0
-	ldr	r5, .L2667
+	ldr	r5, .L2687
 	ubfx	r0, r1, #10, #16
 	str	r1, [sp, #4]
 	bl	P2V_block_in_plane
@@ -18733,15 +18701,15 @@ FtlReUsePrevPpa:
 	mov	r7, r0
 	ldrh	r3, [r2, r0, lsl #1]
 	cmp	r3, #0
-	bne	.L2658
-	ldr	r2, .L2667+4
+	bne	.L2678
+	ldr	r2, .L2687+4
 	ldr	r4, [r2]
 	cmp	r4, #0
-	beq	.L2659
-	ldr	r2, .L2667+8
+	beq	.L2679
+	ldr	r2, .L2687+8
 	movw	lr, #65535
-	ldr	ip, .L2667+32
-	ldr	r0, .L2667+12
+	ldr	ip, .L2687+32
+	ldr	r0, .L2687+12
 	ldr	r2, [r2]
 	ldrh	r1, [r0]
 	mov	r8, r0
@@ -18750,25 +18718,25 @@ FtlReUsePrevPpa:
 	mul	r4, ip, r4
 	mov	ip, #6
 	uxth	r4, r4
-.L2660:
+.L2680:
 	uxth	r0, r3
 	cmp	r1, r0
-	bls	.L2659
+	bls	.L2679
 	cmp	r4, r7
-	bne	.L2661
+	bne	.L2681
 	mov	r1, r4
-	ldr	r0, .L2667+4
+	ldr	r0, .L2687+4
 	bl	List_remove_node
 	ldrh	r3, [r8]
-	cbnz	r3, .L2662
-	ldr	r1, .L2667+16
-	movw	r2, #2099
-	ldr	r0, .L2667+20
+	cbnz	r3, .L2682
+	ldr	r1, .L2687+16
+	movw	r2, #2271
+	ldr	r0, .L2687+20
 	bl	printf
-	ldr	r1, .L2667+24
-	ldr	r0, .L2667+28
+	ldr	r1, .L2687+24
+	ldr	r0, .L2687+28
 	bl	printf
-.L2662:
+.L2682:
 	ldrh	r3, [r8]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -18776,17 +18744,17 @@ FtlReUsePrevPpa:
 	bl	INSERT_DATA_LIST
 	ldr	r2, [r5]
 	ldrh	r3, [r2, r7, lsl #1]
-.L2658:
+.L2678:
 	adds	r3, r3, #1
 	strh	r3, [r2, r7, lsl #1]	@ movhi
-	b	.L2659
-.L2661:
+	b	.L2679
+.L2681:
 	mul	r4, ip, r4
 	adds	r3, r3, #1
 	ldrh	r4, [r2, r4]
 	cmp	r4, lr
-	bne	.L2660
-.L2659:
+	bne	.L2680
+.L2679:
 	movs	r2, #1
 	add	r1, sp, #4
 	mov	r0, r6
@@ -18794,14 +18762,14 @@ FtlReUsePrevPpa:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L2668:
+.L2688:
 	.align	2
-.L2667:
+.L2687:
+	.word	.LANCHOR85
+	.word	.LANCHOR89
 	.word	.LANCHOR83
-	.word	.LANCHOR87
-	.word	.LANCHOR81
-	.word	.LANCHOR88
-	.word	.LANCHOR235
+	.word	.LANCHOR90
+	.word	.LANCHOR239
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
@@ -18824,181 +18792,181 @@ FtlRecoverySuperblock:
 	mov	r10, r0
 	sub	sp, sp, #56
 	cmp	r3, r2
-	beq	.L2833
+	beq	.L2853
 	ldrh	r3, [r0, #2]
 	str	r3, [sp, #12]
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	ldr	r1, [sp, #12]
 	str	r3, [sp, #28]
-	ldr	r3, .L2842
+	ldr	r3, .L2862
 	ldrh	r3, [r3]
 	cmp	r3, r1
 	mov	r3, #0
-	bne	.L2672
+	bne	.L2692
 	strh	r3, [r0, #4]	@ movhi
-.L2840:
+.L2860:
 	strb	r3, [r10, #6]
-.L2833:
+.L2853:
 	movs	r0, #0
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2672:
+.L2692:
 	ldrh	r0, [r0, #16]
-.L2673:
+.L2693:
 	cmp	r0, r2
 	uxth	r5, r3
 	add	r3, r3, #1
-	beq	.L2674
+	beq	.L2694
 	ldrb	r1, [r10, #8]	@ zero_extendqisi2
 	cmp	r1, #1
-	bne	.L2675
+	bne	.L2695
 	bl	FtlGetLastWrittenPage
 	adds	r6, r0, #1
 	mov	r4, r0
-	beq	.L2676
-	ldr	r3, .L2842+4
+	beq	.L2696
+	ldr	r3, .L2862+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L2754
-	ldr	r3, .L2842+8
+	bne	.L2774
+	ldr	r3, .L2862+8
 	ldrh	r5, [r3, r0, lsl #1]
-.L2677:
-	ldr	r3, .L2842+12
+.L2697:
+	ldr	r3, .L2862+12
 	movw	r8, #65535
 	mov	fp, #36
 	ldrh	ip, [r3]
-	ldr	r3, .L2842+16
+	ldr	r3, .L2862+16
 	ldr	r0, [r3]
-	ldr	r3, .L2842+20
+	ldr	r3, .L2862+20
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
-	ldr	r3, .L2842+24
+	ldr	r3, .L2862+24
 	ldrh	lr, [r3]
 	add	r3, r10, #16
 	str	r3, [sp, #20]
 	str	r3, [sp, #4]
 	movs	r3, #0
 	mov	r6, r3
-.L2678:
+.L2698:
 	uxth	r2, r3
 	cmp	ip, r2
-	bhi	.L2682
+	bhi	.L2702
 	ldrb	r3, [r10, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L2755
-	ldr	r3, .L2842+4
+	bne	.L2775
+	ldr	r3, .L2862+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	adds	r3, r3, #0
 	it	ne
 	movne	r3, #1
-.L2834:
+.L2854:
 	str	r3, [sp, #36]
 	mov	r1, r6
 	ldr	r2, [sp, #36]
 	movs	r7, #0
 	bl	FlashReadPages
-	ldr	r3, .L2842+28
+	ldr	r3, .L2862+28
 	movw	fp, #65535
-	ldr	r8, .L2842+16
+	ldr	r8, .L2862+16
 	ldr	r3, [r3]
 	subs	r3, r3, #1
 	str	r3, [sp, #4]
-.L2684:
+.L2704:
 	uxth	r3, r7
 	cmp	r6, r3
-	bhi	.L2689
-	bne	.L2687
+	bhi	.L2709
+	bne	.L2707
 	adds	r4, r4, #1
 	uxth	r3, r4
 	str	r3, [sp, #8]
 	ldr	r3, [r8]
 	ldr	r0, [r3, #4]
-.L2835:
+.L2855:
 	ubfx	r0, r0, #10, #16
 	bl	P2V_plane
 	ldrb	r3, [r10, #8]	@ zero_extendqisi2
 	str	r0, [sp, #16]
 	cmp	r3, #1
-	bne	.L2691
-	ldr	r2, .L2842+4
+	bne	.L2711
+	ldr	r2, .L2862+4
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbnz	r2, .L2691
+	cbnz	r2, .L2711
 	ldr	r1, [sp, #8]
-	ldr	r2, .L2842+8
+	ldr	r2, .L2862+8
 	ldrh	r2, [r2, r1, lsl #1]
 	str	r2, [sp, #8]
-.L2691:
-	ldr	r2, .L2842
+.L2711:
+	ldr	r2, .L2862
 	ldr	r1, [sp, #8]
 	ldrh	r2, [r2]
 	cmp	r2, r1
-	bne	.L2692
+	bne	.L2712
 	ldrh	r2, [sp, #8]
 	strh	r2, [r10, #2]	@ movhi
 	movs	r2, #0
 	strb	r2, [r10, #6]
 	strh	r2, [r10, #4]	@ movhi
-.L2692:
+.L2712:
 	ldr	r2, [sp, #8]
 	ldr	r1, [sp, #12]
 	cmp	r2, r1
-	bne	.L2693
+	bne	.L2713
 	ldr	r2, [sp, #16]
 	ldr	r1, [sp, #28]
 	cmp	r2, r1
-	bne	.L2693
-.L2841:
+	bne	.L2713
+.L2861:
 	ldr	r1, [sp, #8]
 	mov	r0, r10
 	bl	ftl_sb_update_avl_pages
-	b	.L2833
-.L2674:
+	b	.L2853
+.L2694:
 	uxth	r1, r3
 	adds	r1, r1, #8
 	ldrh	r0, [r10, r1, lsl #1]
-	b	.L2673
-.L2675:
+	b	.L2693
+.L2695:
 	movs	r1, #0
 	bl	FtlGetLastWrittenPage
 	mov	r4, r0
 	adds	r0, r0, #1
-	beq	.L2676
-.L2754:
+	beq	.L2696
+.L2774:
 	mov	r5, r4
-	b	.L2677
-.L2676:
+	b	.L2697
+.L2696:
 	ldr	r3, [sp, #12]
-	cbz	r3, .L2679
-	ldr	r1, .L2842+32
-	movw	r2, #2170
-	ldr	r0, .L2842+36
+	cbz	r3, .L2699
+	ldr	r1, .L2862+32
+	movw	r2, #2350
+	ldr	r0, .L2862+36
 	bl	printf
-	ldr	r1, .L2842+40
-	ldr	r0, .L2842+44
+	ldr	r1, .L2862+40
+	ldr	r0, .L2862+44
 	bl	printf
-.L2679:
+.L2699:
 	ldr	r3, [sp, #28]
-	cbz	r3, .L2680
+	cbz	r3, .L2700
 	cmp	r5, r3
-	beq	.L2680
-	ldr	r1, .L2842+32
-	movw	r2, #2171
-	ldr	r0, .L2842+36
+	beq	.L2700
+	ldr	r1, .L2862+32
+	movw	r2, #2351
+	ldr	r0, .L2862+36
 	bl	printf
-	ldr	r1, .L2842+40
-	ldr	r0, .L2842+44
+	ldr	r1, .L2862+40
+	ldr	r0, .L2862+44
 	bl	printf
-.L2680:
+.L2700:
 	movs	r3, #0
 	strh	r3, [r10, #2]	@ movhi
-	b	.L2840
-.L2682:
+	b	.L2860
+.L2702:
 	ldr	r1, [sp, #4]
 	ldrh	r2, [r1], #2
 	cmp	r2, r8
 	str	r1, [sp, #4]
-	beq	.L2681
+	beq	.L2701
 	mla	r1, fp, r6, r0
 	orr	r2, r5, r2, lsl #10
 	str	r2, [r1, #4]
@@ -19012,36 +18980,36 @@ FtlRecoverySuperblock:
 	ldr	r2, [sp, #8]
 	add	r7, r7, r2
 	str	r7, [r1, #12]
-.L2681:
+.L2701:
 	adds	r3, r3, #1
-	b	.L2678
-.L2755:
+	b	.L2698
+.L2775:
 	movs	r3, #0
-	b	.L2834
-.L2689:
+	b	.L2854
+.L2709:
 	movs	r3, #36
 	ldr	r1, [r8]
 	muls	r3, r7, r3
 	adds	r2, r1, r3
 	ldr	r3, [r1, r3]
-	cbnz	r3, .L2685
+	cbnz	r3, .L2705
 	ldr	r2, [r2, #12]
 	ldr	r3, [r2, #4]
 	adds	r1, r3, #1
-	beq	.L2686
-	ldr	r1, .L2842+28
+	beq	.L2706
+	ldr	r1, .L2862+28
 	mov	r0, r3
 	ldr	r1, [r1]
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L2686
-	ldr	r1, .L2842+28
+	cbz	r0, .L2706
+	ldr	r1, .L2862+28
 	adds	r3, r3, #1
 	str	r3, [r1]
-.L2686:
+.L2706:
 	ldr	r3, [r2]
 	adds	r3, r3, #1
-	bne	.L2688
-.L2687:
+	bne	.L2708
+.L2707:
 	uxth	r3, r4
 	uxth	r7, r7
 	str	r3, [sp, #8]
@@ -19049,26 +19017,26 @@ FtlRecoverySuperblock:
 	ldr	r3, [r8]
 	mla	r7, r2, r7, r3
 	ldr	r0, [r7, #4]
-	b	.L2835
-.L2685:
+	b	.L2855
+.L2705:
 	ldr	r1, [r2, #4]
 	uxth	fp, r5
-	ldr	r0, .L2842+48
+	ldr	r0, .L2862+48
 	bl	printf
 	ldrh	r2, [r10]
-	ldr	r3, .L2842+52
+	ldr	r3, .L2862+52
 	strh	r2, [r3]	@ movhi
-.L2688:
+.L2708:
 	adds	r7, r7, #1
-	b	.L2684
-.L2693:
+	b	.L2704
+.L2713:
 	movw	r2, #65535
 	cmp	fp, r2
-	bne	.L2694
+	bne	.L2714
 	cmp	r3, #0
-	bne	.L2695
-.L2694:
-	ldr	r3, .L2842+56
+	bne	.L2715
+.L2714:
+	ldr	r3, .L2862+56
 	uxth	fp, r5
 	uxth	r5, r5
 	mov	r7, #-1
@@ -19087,1103 +19055,1669 @@ FtlRecoverySuperblock:
 	subgt	r4, fp, #7
 	ldrle	r4, [sp, #12]
 	uxthgt	r4, r4
-.L2698:
+.L2718:
 	cmp	r4, fp
-	bhi	.L2713
-	ldr	r3, .L2842+12
+	bhi	.L2733
+	ldr	r3, .L2862+12
 	movw	lr, #65535
 	mov	ip, #36
 	ldrh	r8, [r3]
-	ldr	r3, .L2842+16
+	ldr	r3, .L2862+16
 	ldr	r0, [r3]
 	ldr	r3, [sp, #20]
 	str	r3, [sp, #32]
 	movs	r3, #0
 	mov	r5, r3
-	b	.L2714
-.L2700:
+	b	.L2734
+.L2720:
 	ldr	r1, [sp, #32]
 	ldrh	r2, [r1], #2
 	cmp	r2, lr
 	str	r1, [sp, #32]
-	beq	.L2699
+	beq	.L2719
 	mla	r1, ip, r5, r0
 	adds	r5, r5, #1
 	orr	r2, r4, r2, lsl #10
 	uxth	r5, r5
 	str	r2, [r1, #4]
-.L2699:
+.L2719:
 	adds	r3, r3, #1
-.L2714:
+.L2734:
 	uxth	r2, r3
 	cmp	r8, r2
-	bhi	.L2700
+	bhi	.L2720
 	mov	r1, r5
 	ldr	r2, [sp, #36]
 	bl	FlashReadPages
-	ldr	r2, .L2842+4
+	ldr	r2, .L2862+4
 	movs	r1, #36
-	ldr	r3, .L2842+56
+	ldr	r3, .L2862+56
 	movs	r0, #0
 	movw	ip, #65535
 	ldrb	lr, [r2]	@ zero_extendqisi2
-	ldr	r2, .L2842+16
+	ldr	r2, .L2862+16
 	ldr	r3, [r3]
 	ldr	r2, [r2]
 	mla	r5, r1, r5, r2
-.L2701:
+.L2721:
 	cmp	r5, r2
-	bne	.L2711
-	cbz	r0, .L2712
-	ldr	r2, .L2842+56
+	bne	.L2731
+	cbz	r0, .L2732
+	ldr	r2, .L2862+56
 	str	r3, [r2]
-.L2712:
+.L2732:
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L2698
-.L2843:
+	b	.L2718
+.L2863:
+	.align	2
+.L2862:
+	.word	.LANCHOR52
+	.word	.LANCHOR16
+	.word	.LANCHOR17
+	.word	.LANCHOR38
+	.word	.LANCHOR186
+	.word	.LANCHOR108
+	.word	.LANCHOR58
+	.word	.LANCHOR165
+	.word	.LANCHOR240
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LC69
+	.word	.LANCHOR241
+	.word	.LANCHOR139
+.L2731:
+	ldr	r1, [r2]
+	cbnz	r1, .L2722
+	ldr	r1, [r2, #12]
+	ldrh	r8, [r1]
+	cmp	r8, ip
+	beq	.L2778
+	ldr	r1, [r1, #4]
+	cmp	r1, #-1
+	beq	.L2778
+	adds	r0, r7, #1
+	bne	.L2780
+	ldr	r0, .L2864
+	ldrh	r0, [r0, r4, lsl #1]
+	cmp	r0, ip
+	bne	.L2724
+	cmp	lr, #0
+	beq	.L2780
+.L2724:
+	ldr	r0, [sp, #4]
+	cmp	r0, r3
+	it	ne
+	movne	r7, r3
+.L2780:
+	movs	r0, #1
+	b	.L2723
+.L2722:
+	cbz	r0, .L2725
+	ldr	r2, .L2864+4
+	str	r3, [r2]
+.L2725:
+	ldr	r3, .L2864+8
+	ldrh	r2, [r10]
+	strh	r2, [r3]	@ movhi
+	ldrb	r3, [r10, #8]	@ zero_extendqisi2
+	cbnz	r3, .L2715
+	ldr	r3, .L2864
+	ldrh	r2, [r3, r4, lsl #1]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L2727
+	adds	r1, r7, #1
+	ldr	r3, .L2864+4
+	beq	.L2728
+	str	r7, [r3]
+.L2715:
+	ldr	fp, [sp, #12]
+	movs	r2, #1
+	ldr	r6, .L2864+12
+	ldr	r3, .L2864+16
+	strh	r2, [r3]	@ movhi
+.L2735:
+	ldr	r3, .L2864+20
+	movw	ip, #65535
+	ldr	r0, [r6]
+	mov	lr, #36
+	ldr	r1, [sp, #20]
+	movs	r2, #0
+	ldrh	r5, [r3]
+	ldr	r3, .L2864+24
+	str	r2, [sp, #24]
+	ldrb	r7, [r3]	@ zero_extendqisi2
+.L2736:
+	uxth	r3, r2
+	cmp	r3, r5
+	bcc	.L2739
+	ldr	r2, [sp, #36]
+	ldr	r1, [sp, #24]
+	bl	FlashReadPages
+	movs	r3, #0
+.L2859:
+	str	r3, [sp, #32]
+	ldr	r2, [sp, #24]
+	ldrh	r3, [sp, #32]
+	cmp	r2, r3
+	bhi	.L2768
+	ldrb	r3, [r10, #8]	@ zero_extendqisi2
+	add	fp, fp, #1
+	uxth	fp, fp
+	cmp	r3, #1
+	bne	.L2769
+	ldr	r3, .L2864+24
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2769
+	ldr	r3, .L2864+28
+	ldrh	r3, [r3]
+	cmp	r3, fp
+	bne	.L2769
+	ldr	r3, [sp, #8]
+	cmp	r3, fp
+	beq	.L2744
+.L2769:
+	ldr	r3, .L2864+32
+	ldrh	r3, [r3]
+	cmp	r3, fp
+	bne	.L2735
+	ldr	r2, .L2864+20
+	movw	r0, #65535
+	movs	r3, #0
+	strh	fp, [r10, #2]	@ movhi
+	strh	r3, [r10, #4]	@ movhi
+	ldrh	r2, [r2]
+.L2770:
+	uxth	r1, r3
+	cmp	r1, r2
+	bcs	.L2853
+	ldr	r1, [sp, #20]
+	ldrh	r4, [r1], #2
+	cmp	r4, r0
+	str	r1, [sp, #20]
+	add	r1, r3, #1
+	bne	.L2860
+	mov	r3, r1
+	b	.L2770
+.L2728:
+	ldr	r2, [sp, #4]
+	ldr	r1, [sp, #24]
+	cmp	r2, r1
+	itet	eq
+	ldreq	r2, [r3]
+	movne	r2, r1
+	addeq	r2, r2, #-1
+.L2856:
+	str	r2, [r3]
+	b	.L2715
+.L2727:
+	ldr	r3, [sp, #4]
+	cmp	r6, r3
+	beq	.L2730
+	adds	r2, r6, #1
+	beq	.L2715
+	ldr	r3, .L2864+4
+	str	r6, [r3]
+	b	.L2715
+.L2730:
+	ldr	r2, .L2864+4
+	ldr	r1, [sp, #4]
+	ldr	r3, [r2]
+	cmp	r1, r3
+	beq	.L2715
+	subs	r3, r3, #1
+	str	r3, [r2]
+	b	.L2715
+.L2778:
+	mov	r1, r3
+	mov	r3, r6
+.L2723:
+	mov	r6, r3
+	adds	r2, r2, #36
+	mov	r3, r1
+	b	.L2721
+.L2733:
+	mov	r2, #-1
+	ldr	r3, .L2864+4
+	b	.L2856
+.L2739:
+	ldrh	r3, [r1], #2
+	cmp	r3, ip
+	beq	.L2737
+	ldr	r4, [sp, #24]
+	orr	r3, fp, r3, lsl #10
+	mla	r4, lr, r4, r0
+	str	r3, [r4, #4]
+	ldrb	r8, [r10, #8]	@ zero_extendqisi2
+	cmp	r8, #1
+	bne	.L2738
+	cbz	r7, .L2738
+	orr	r3, r3, #-2147483648
+	str	r3, [r4, #4]
+.L2738:
+	ldr	r3, [sp, #24]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	str	r3, [sp, #24]
+.L2737:
+	adds	r2, r2, #1
+	b	.L2736
+.L2768:
+	ldr	r3, [sp, #32]
+	movs	r5, #36
+	ldr	r8, [r6]
+	muls	r5, r3, r5
+	add	r7, r8, r5
+	ldr	r4, [r7, #4]
+	ubfx	r0, r4, #10, #16
+	str	r4, [sp, #52]
+	bl	P2V_plane
+	ldr	r3, [sp, #12]
+	cmp	fp, r3
+	bcc	.L2741
+	bne	.L2742
+	ldr	r3, [sp, #28]
+	cmp	r3, r0
+	bhi	.L2741
+.L2742:
+	ldr	r3, [sp, #8]
+	cmp	fp, r3
+	bne	.L2743
+	ldr	r3, [sp, #16]
+	cmp	r3, r0
+	beq	.L2744
+.L2743:
+	ldr	r3, [r8, r5]
+	adds	r3, r3, #1
+	beq	.L2745
+	ldr	r3, [r7, #12]
+	movw	r2, #61589
+	ldrh	r1, [r3]
+	cmp	r1, r2
+	beq	.L2746
+	ldrh	r0, [r10]
+.L2857:
+	bl	decrement_vpc_count
+	b	.L2741
+.L2746:
+	ldr	r2, [r3, #4]
+	str	r2, [sp, #4]
+	adds	r2, r2, #1
+	beq	.L2747
+	ldr	r2, .L2864+36
+	ldr	r0, [sp, #4]
+	ldr	r1, [r2]
+	bl	ftl_cmp_data_ver
+	cbz	r0, .L2747
+	ldr	r1, [sp, #4]
+	adds	r1, r1, #1
+	str	r1, [r2]
+.L2747:
+	ldr	r4, [r3, #8]
+	add	r1, sp, #48
+	ldr	r3, [r3, #12]
+	movs	r2, #0
+	mov	r0, r4
+	str	r3, [sp, #44]
+	bl	log2phys
+	ldr	r3, .L2864+4
+	ldr	r1, [r3]
+	adds	r3, r1, #1
+	beq	.L2748
+	ldr	r0, [sp, #4]
+	bl	ftl_cmp_data_ver
+	cmp	r0, #0
+	beq	.L2748
+	ldr	r3, [sp, #44]
+	adds	r7, r3, #1
+	beq	.L2749
+	ldr	r0, [r6]
+	movs	r2, #0
+	movs	r1, #1
+	add	r0, r0, r5
+	str	r3, [r0, #4]
+	ldr	r7, [r0, #12]
+	bl	FlashReadPages
+	ldr	r2, [r6]
+	ldr	r1, [r2, r5]
+	adds	r3, r2, r5
+	adds	r1, r1, #1
+	bne	.L2750
+.L2751:
+	mov	r3, #-1
+	str	r3, [sp, #44]
+.L2758:
+	ldr	r7, [sp, #44]
+	adds	r0, r7, #1
+	beq	.L2741
+.L2773:
+	ubfx	r0, r7, #10, #16
+	bl	P2V_block_in_plane
+	ldr	r3, .L2864+40
+	mov	r4, r0
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bhi	.L2764
+	ldr	r1, .L2864+44
+	movw	r2, #2683
+	ldr	r0, .L2864+48
+	bl	printf
+	ldr	r1, .L2864+52
+	ldr	r0, .L2864+56
+	bl	printf
+.L2764:
+	ldr	r3, .L2864+60
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r4, lsl #1]
+	cmp	r3, #0
+	beq	.L2765
+	mov	r0, r4
+	b	.L2857
+.L2749:
+	ldr	r3, [sp, #52]
+	ldr	r2, [sp, #48]
+	cmp	r2, r3
+	bne	.L2741
+	movs	r2, #1
+	add	r1, sp, #44
+	mov	r0, r4
+	bl	log2phys
+.L2741:
+	ldr	r3, [sp, #32]
+	adds	r3, r3, #1
+	b	.L2859
+.L2750:
+	ldr	r1, [r7, #8]
+	cmp	r4, r1
+	bne	.L2751
+	ldr	r8, [r7, #4]
+	ldr	r0, .L2864+4
+	mov	r1, r8
+	ldr	r0, [r0]
+	bl	ftl_cmp_data_ver
+	cmp	r0, #0
+	beq	.L2751
+	ldr	r1, [sp, #48]
+	ldr	r0, [sp, #52]
+	cmp	r1, r0
+	bne	.L2753
+.L2756:
+	ldr	r1, [sp, #44]
+	mov	r0, r4
+	bl	FtlReUsePrevPpa
+	b	.L2751
+.L2865:
 	.align	2
-.L2842:
-	.word	.LANCHOR52
-	.word	.LANCHOR15
-	.word	.LANCHOR16
+.L2864:
+	.word	.LANCHOR123
+	.word	.LANCHOR139
+	.word	.LANCHOR241
+	.word	.LANCHOR186
+	.word	.LANCHOR242
 	.word	.LANCHOR38
-	.word	.LANCHOR180
-	.word	.LANCHOR105
-	.word	.LANCHOR58
-	.word	.LANCHOR160
-	.word	.LANCHOR236
+	.word	.LANCHOR16
+	.word	.LANCHOR53
+	.word	.LANCHOR52
+	.word	.LANCHOR165
+	.word	.LANCHOR40
+	.word	.LANCHOR240
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC66
-	.word	.LANCHOR237
-	.word	.LANCHOR136
-.L2711:
-	ldr	r1, [r2]
-	cbnz	r1, .L2702
-	ldr	r1, [r2, #12]
-	ldrh	r8, [r1]
-	cmp	r8, ip
-	beq	.L2758
-	ldr	r1, [r1, #4]
-	cmp	r1, #-1
+	.word	.LANCHOR85
+.L2753:
+	ldr	r0, [sp, #44]
+	cmp	r1, r0
+	beq	.L2751
+	adds	r0, r1, #1
+	beq	.L2754
+	str	r1, [r3, #4]
+	movs	r2, #0
+	movs	r1, #1
+	mov	r0, r3
+	ldr	r7, [r3, #12]
+	bl	FlashReadPages
+.L2755:
+	ldr	r3, [r6]
+	ldr	r3, [r3, r5]
+	adds	r3, r3, #1
+	beq	.L2756
+	ldr	r3, [r7, #4]
+	ldr	r2, .L2866
+	mov	r1, r3
+	ldr	r0, [r2]
+	bl	ftl_cmp_data_ver
+	cmp	r0, #0
+	beq	.L2756
+	mov	r1, r3
+	mov	r0, r8
+	bl	ftl_cmp_data_ver
+	cmp	r0, #0
+	beq	.L2751
+	b	.L2756
+.L2754:
+	str	r1, [r2, r5]
+	b	.L2755
+.L2748:
+	ldr	r3, [sp, #52]
+	ldr	r2, [sp, #48]
+	cmp	r2, r3
 	beq	.L2758
-	adds	r0, r7, #1
-	bne	.L2760
-	ldr	r0, .L2844
-	ldrh	r0, [r0, r4, lsl #1]
-	cmp	r0, ip
-	bne	.L2704
-	cmp	lr, #0
+	ldr	r3, [sp, #44]
+	adds	r7, r3, #1
 	beq	.L2760
-.L2704:
-	ldr	r0, [sp, #4]
-	cmp	r0, r3
-	it	ne
-	movne	r7, r3
+	ldr	r2, .L2866+4
+	ubfx	r3, r3, #10, #21
+	ldr	r2, [r2]
+	cmp	r3, r2
+	bcs	.L2741
 .L2760:
-	movs	r0, #1
-	b	.L2703
-.L2702:
-	cbz	r0, .L2705
-	ldr	r2, .L2844+4
-	str	r3, [r2]
-.L2705:
-	ldr	r3, .L2844+8
-	ldrh	r2, [r10]
-	strh	r2, [r3]	@ movhi
-	ldrb	r3, [r10, #8]	@ zero_extendqisi2
-	cbnz	r3, .L2695
-	ldr	r3, .L2844
-	ldrh	r2, [r3, r4, lsl #1]
-	movw	r3, #65535
-	cmp	r2, r3
-	bne	.L2707
-	adds	r1, r7, #1
-	ldr	r3, .L2844+4
-	beq	.L2708
-	str	r7, [r3]
-.L2695:
-	ldr	fp, [sp, #12]
 	movs	r2, #1
-	ldr	r6, .L2844+12
-	ldr	r3, .L2844+16
-	strh	r2, [r3]	@ movhi
-.L2715:
-	ldr	r3, .L2844+20
-	movw	ip, #65535
+	add	r1, sp, #52
+	mov	r0, r4
+	bl	log2phys
+	ldr	r7, [sp, #48]
+	adds	r5, r7, #1
+	beq	.L2758
+	ldr	r3, [sp, #44]
+	cmp	r7, r3
+	beq	.L2773
+	ubfx	r0, r7, #10, #16
+	bl	P2V_block_in_plane
+	ldr	r3, .L2866+8
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	beq	.L2763
+	ldr	r3, .L2866+12
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	beq	.L2763
+	ldr	r3, .L2866+16
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bne	.L2758
+.L2763:
 	ldr	r0, [r6]
-	mov	lr, #36
-	ldr	r1, [sp, #20]
 	movs	r2, #0
-	ldrh	r5, [r3]
-	ldr	r3, .L2844+24
-	str	r2, [sp, #24]
-	ldrb	r7, [r3]	@ zero_extendqisi2
-.L2716:
-	uxth	r3, r2
-	cmp	r3, r5
-	bcc	.L2719
-	ldr	r2, [sp, #36]
-	ldr	r1, [sp, #24]
+	movs	r1, #1
+	str	r7, [r0, #4]
+	ldr	r5, [r0, #12]
 	bl	FlashReadPages
-	movs	r3, #0
-.L2839:
-	str	r3, [sp, #32]
-	ldr	r2, [sp, #24]
-	ldrh	r3, [sp, #32]
-	cmp	r2, r3
-	bhi	.L2748
-	ldrb	r3, [r10, #8]	@ zero_extendqisi2
-	add	fp, fp, #1
-	uxth	fp, fp
-	cmp	r3, #1
-	bne	.L2749
-	ldr	r3, .L2844+24
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2749
-	ldr	r3, .L2844+28
+	ldr	r3, [r6]
+	ldr	r3, [r3]
+	adds	r3, r3, #1
+	beq	.L2758
+	ldr	r1, [r5, #4]
+	ldr	r0, [sp, #4]
+	bl	ftl_cmp_data_ver
+	cmp	r0, #0
+	bne	.L2758
+	movs	r2, #1
+	add	r1, sp, #48
+	mov	r0, r4
+	bl	log2phys
+	b	.L2758
+.L2765:
+	mov	r1, r4
+	ldr	r0, .L2866+20
+	bl	printf
+	b	.L2741
+.L2745:
+	ldrh	r3, [r10]
+	mov	r1, r4
+	ldr	r2, .L2866+24
+	ldr	r0, .L2866+28
+	strh	r3, [r2]	@ movhi
+	ldr	r2, [sp, #4]
+	bl	printf
+	ldr	r2, .L2866+32
+	ldr	r3, [r2]
+	cmp	r3, #31
+	bhi	.L2766
+	ldr	r0, [sp, #52]
+	ldr	r1, .L2866+36
+	str	r0, [r1, r3, lsl #2]
+	adds	r3, r3, #1
+	str	r3, [r2]
+.L2766:
+	ldrh	r0, [r10]
+	bl	decrement_vpc_count
+	ldr	r3, .L2866
+	ldr	r2, [r3]
+	adds	r1, r2, #1
+	bne	.L2767
+	ldr	r2, [sp, #4]
+.L2858:
+	str	r2, [r3]
+	b	.L2741
+.L2767:
+	ldr	r1, [sp, #4]
+	cmp	r1, r2
+	bcs	.L2741
+	mov	r2, r1
+	b	.L2858
+.L2744:
+	ldrb	r3, [sp, #16]	@ zero_extendqisi2
+	ldr	r2, [sp, #16]
+	strb	r3, [r10, #6]
+	ldrh	r3, [sp, #8]
+	strh	r3, [r10, #2]	@ movhi
+	b	.L2861
+.L2867:
+	.align	2
+.L2866:
+	.word	.LANCHOR139
+	.word	.LANCHOR43
+	.word	.LANCHOR93
+	.word	.LANCHOR94
+	.word	.LANCHOR95
+	.word	.LC70
+	.word	.LANCHOR241
+	.word	.LC71
+	.word	.LANCHOR243
+	.word	.LANCHOR244
+	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
+	.section	.text.FtlGcScanTempBlk,"ax",%progbits
+	.align	1
+	.global	FtlGcScanTempBlk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcScanTempBlk, %function
+FtlGcScanTempBlk:
+	@ args = 0, pretend = 0, frame = 64
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2913
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r0
+	sub	sp, sp, #64
+	ldrh	r5, [r3]
+	movw	r3, #65535
+	cmp	r5, r3
+	beq	.L2897
+	cbnz	r5, .L2869
+.L2870:
+	bl	FtlGcPageVarInit
+	b	.L2871
+.L2897:
+	movs	r5, #0
+.L2869:
+	ldr	r3, .L2913+4
 	ldrh	r3, [r3]
-	cmp	r3, fp
-	bne	.L2749
-	ldr	r3, [sp, #8]
-	cmp	r3, fp
-	beq	.L2724
-.L2749:
-	ldr	r3, .L2844+32
+	cmp	r3, r1
+	beq	.L2870
+.L2871:
+	ldr	r8, .L2913+80
+	mov	r3, #-1
+	str	r3, [sp, #8]
+.L2872:
+	ldrh	r1, [r4]
+	movw	r3, #65535
+	movs	r2, #0
+	strb	r2, [r4, #8]
+	cmp	r1, r3
+	beq	.L2873
+.L2896:
+	ldr	r3, .L2913+8
+	movs	r2, #0
+	ldr	r0, [r8]
+	mov	fp, r2
+	movw	lr, #65535
+	mov	r10, #36
+	ldrh	r3, [r3]
+	str	r3, [sp, #12]
+	ldr	r3, .L2913+12
+	ldr	r3, [r3]
+	str	r3, [sp, #16]
+	ldr	r3, .L2913+16
+	ldrh	r3, [r3]
+	str	r3, [sp, #20]
+	ldr	r3, .L2913+20
+	ldr	r7, [r3]
+	ldr	r3, .L2913+24
+	ldrh	ip, [r3]
+	add	r3, r4, #16
+	str	r3, [sp, #4]
+.L2874:
+	ldr	r1, [sp, #12]
+	uxth	r3, r2
+	cmp	r1, r3
+	bhi	.L2876
+	mov	r10, #0
+	movs	r2, #0
+	mov	r1, fp
+	bl	FlashReadPages
+.L2877:
+	uxth	r3, r10
+	cmp	fp, r3
+	bhi	.L2895
+	ldr	r3, .L2913+4
+	adds	r5, r5, #1
+	uxth	r5, r5
 	ldrh	r3, [r3]
-	cmp	r3, fp
-	bne	.L2715
-	ldr	r2, .L2844+20
-	movw	r0, #65535
-	movs	r3, #0
-	strh	fp, [r10, #2]	@ movhi
-	strh	r3, [r10, #4]	@ movhi
-	ldrh	r2, [r2]
-.L2750:
-	uxth	r1, r3
-	cmp	r1, r2
-	bcs	.L2833
-	ldr	r1, [sp, #20]
-	ldrh	r4, [r1], #2
-	cmp	r4, r0
-	str	r1, [sp, #20]
-	add	r1, r3, #1
-	bne	.L2840
-	mov	r3, r1
-	b	.L2750
-.L2708:
-	ldr	r2, [sp, #4]
-	ldr	r1, [sp, #24]
-	cmp	r2, r1
-	itet	eq
-	ldreq	r2, [r3]
-	movne	r2, r1
-	addeq	r2, r2, #-1
-.L2836:
-	str	r2, [r3]
-	b	.L2695
-.L2707:
-	ldr	r3, [sp, #4]
-	cmp	r6, r3
-	beq	.L2710
-	adds	r2, r6, #1
-	beq	.L2695
-	ldr	r3, .L2844+4
-	str	r6, [r3]
-	b	.L2695
-.L2710:
-	ldr	r2, .L2844+4
+	cmp	r3, r5
+	bhi	.L2896
+	movs	r2, #0
+	b	.L2873
+.L2876:
 	ldr	r1, [sp, #4]
-	ldr	r3, [r2]
-	cmp	r1, r3
-	beq	.L2695
-	subs	r3, r3, #1
-	str	r3, [r2]
-	b	.L2695
-.L2758:
-	mov	r1, r3
-	mov	r3, r6
-.L2703:
-	mov	r6, r3
-	adds	r2, r2, #36
-	mov	r3, r1
-	b	.L2701
-.L2713:
-	mov	r2, #-1
-	ldr	r3, .L2844+4
-	b	.L2836
-.L2719:
 	ldrh	r3, [r1], #2
-	cmp	r3, ip
-	beq	.L2717
-	ldr	r4, [sp, #24]
-	orr	r3, fp, r3, lsl #10
-	mla	r4, lr, r4, r0
-	str	r3, [r4, #4]
-	ldrb	r8, [r10, #8]	@ zero_extendqisi2
-	cmp	r8, #1
-	bne	.L2718
-	cbz	r7, .L2718
-	orr	r3, r3, #-2147483648
-	str	r3, [r4, #4]
-.L2718:
-	ldr	r3, [sp, #24]
-	adds	r3, r3, #1
-	uxth	r3, r3
-	str	r3, [sp, #24]
-.L2717:
+	cmp	r3, lr
+	str	r1, [sp, #4]
+	beq	.L2875
+	mla	r1, r10, fp, r0
+	orr	r3, r5, r3, lsl #10
+	str	r3, [r1, #4]
+	ldr	r3, [sp, #20]
+	mul	r3, r3, fp
+	bic	r3, r3, #3
+	mov	r6, r3
+	ldr	r3, [sp, #16]
+	add	r6, r6, r3
+	mul	r3, ip, fp
+	str	r6, [r1, #8]
+	bic	r3, r3, #3
+	add	r3, r3, r7
+	str	r3, [r1, #12]
+	add	r3, fp, #1
+	uxth	fp, r3
+.L2875:
 	adds	r2, r2, #1
-	b	.L2716
-.L2748:
-	ldr	r3, [sp, #32]
-	movs	r5, #36
-	ldr	r8, [r6]
-	muls	r5, r3, r5
-	add	r7, r8, r5
-	ldr	r4, [r7, #4]
-	ubfx	r0, r4, #10, #16
-	str	r4, [sp, #52]
+	b	.L2874
+.L2895:
+	movs	r7, #36
+	ldr	r6, [r8]
+	mul	r7, r7, r10
+	adds	r3, r6, r7
+	ldr	r2, [r3, #4]
+	str	r3, [sp, #12]
+	ubfx	r0, r2, #10, #16
+	str	r2, [sp, #4]
 	bl	P2V_plane
+	ldr	r6, [r6, r7]
+	mov	r2, r0
 	ldr	r3, [sp, #12]
-	cmp	fp, r3
-	bcc	.L2721
-	bne	.L2722
-	ldr	r3, [sp, #28]
-	cmp	r3, r0
-	bhi	.L2721
-.L2722:
-	ldr	r3, [sp, #8]
-	cmp	fp, r3
-	bne	.L2723
-	ldr	r3, [sp, #16]
-	cmp	r3, r0
-	beq	.L2724
-.L2723:
-	ldr	r3, [r8, r5]
+	ldr	r3, [r3, #12]
+	cmp	r6, #0
+	bne	.L2878
+	ldrh	r0, [r3]
+	movw	r1, #65535
+	cmp	r0, r1
+	bne	.L2879
+.L2882:
+	ldr	r3, .L2913+28
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2909
+	ldr	r3, .L2913+32
+	movs	r1, #1
+	str	r1, [r3]
+.L2873:
+	ldr	r3, .L2913
+	movw	r1, #65535
+	mov	r0, r4
+	strh	r5, [r4, #2]	@ movhi
+	strb	r2, [r4, #6]
+	strh	r1, [r3]	@ movhi
+	mov	r1, r5
+	bl	ftl_sb_update_avl_pages
+	ldr	r0, [sp, #8]
+	add	sp, sp, #64
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2879:
+	ldr	r1, .L2913+36
+	ldr	r0, [r3, #8]
+	ldr	r1, [r1]
+	cmp	r0, r1
+	bhi	.L2882
+	ldr	r2, .L2913+40
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbnz	r2, .L2885
+.L2886:
+	ldr	r2, [r3, #8]
+	add	r10, r10, #1
+	ldr	r1, [sp, #4]
+	ldr	r0, [r3, #12]
+	bl	FtlGcUpdatePage
+	b	.L2877
+.L2909:
+	ldr	r2, .L2913+44
+	ldrh	r1, [r4]
+	ldr	r2, [r2]
+	strh	r3, [r2, r1, lsl #1]	@ movhi
+.L2912:
+	ldrh	r0, [r4]
+	bl	INSERT_FREE_LIST
+	ldr	r2, .L2913+48
+	movw	r3, #65535
+	strh	r3, [r4]	@ movhi
+	strh	r3, [r2]	@ movhi
+.L2911:
+	bl	FtlGcPageVarInit
+	movs	r5, #0
+	b	.L2872
+.L2885:
+	mov	r2, r6
+	add	r1, sp, #24
+	str	r3, [sp, #12]
+	bl	log2phys
+	ldr	r3, [sp, #12]
+	ldr	r1, [sp, #24]
+	ldr	r2, [r3, #12]
+	cmp	r2, r1
+	bne	.L2886
+	adds	r1, r2, #1
+	beq	.L2886
+	str	r2, [sp, #32]
+	movs	r1, #1
+	ldr	r2, .L2913+52
+	add	r0, sp, #28
+	ldr	r2, [r2]
+	str	r2, [sp, #36]
+	ldr	r2, .L2913+56
+	ldr	r2, [r2]
+	str	r2, [sp, #40]
+	mov	r2, r6
+	bl	FlashReadPages
+	ldr	r2, .L2913+60
+	ldr	r1, [r8]
+	ldr	r0, [sp, #36]
+	ldrh	r2, [r2]
+	ldr	r3, [sp, #12]
+	add	r7, r7, r1
+	lsl	ip, r2, #7
+.L2887:
+	cmp	r6, ip
+	beq	.L2886
+	ldr	r1, [r7, #8]
+	ldr	r2, [r0, r6, lsl #2]
+	ldr	r1, [r1, r6, lsl #2]
+	cmp	r1, r2
+	beq	.L2888
+	ldr	r2, [sp, #32]
+	ldrh	r1, [r4]
+	ldr	r0, .L2913+64
+	bl	printf
+	ldr	r3, .L2913+44
+	movs	r1, #0
+	ldrh	r2, [r4]
+	ldr	r3, [r3]
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	b	.L2912
+.L2888:
+	adds	r6, r6, #1
+	b	.L2887
+.L2878:
+	ldr	r2, [sp, #4]
+	ldrh	r1, [r4]
+	ldr	r0, .L2913+68
+	bl	printf
+	ldr	r3, .L2913+72
+	ldrh	r2, [r4]
+	ldr	r3, [r3]
+	cbnz	r3, .L2891
+	ldr	r3, .L2913+28
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2892
+.L2891:
+	ldr	r3, .L2913+76
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r2, lsl #1]
+	cmp	r3, #159
+	bls	.L2893
+.L2892:
+	ldr	r3, [r8]
+	ldr	r3, [r3, r7]
 	adds	r3, r3, #1
-	beq	.L2725
-	ldr	r3, [r7, #12]
-	movw	r2, #61589
+	bne	.L2894
+.L2893:
+	ldr	r3, [r8]
+	add	r7, r7, r3
+	ldr	r3, [r7, #4]
+	str	r3, [sp, #8]
+.L2894:
+	ldr	r3, .L2913+44
+	movs	r1, #0
+	ldr	r3, [r3]
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	ldrh	r0, [r4]
+	bl	INSERT_FREE_LIST
+	movw	r3, #65535
+	strh	r3, [r4]	@ movhi
+	b	.L2911
+.L2914:
+	.align	2
+.L2913:
+	.word	.LANCHOR245
+	.word	.LANCHOR52
+	.word	.LANCHOR38
+	.word	.LANCHOR107
+	.word	.LANCHOR57
+	.word	.LANCHOR108
+	.word	.LANCHOR58
+	.word	.LANCHOR16
+	.word	.LANCHOR138
+	.word	.LANCHOR74
+	.word	.LANCHOR2
+	.word	.LANCHOR85
+	.word	.LANCHOR213
+	.word	.LANCHOR194
+	.word	.LANCHOR196
+	.word	.LANCHOR55
+	.word	.LC72
+	.word	.LC73
+	.word	.LANCHOR104
+	.word	.LANCHOR80
+	.word	.LANCHOR186
+	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
+	.section	.text.FtlGcFreeTempBlock,"ax",%progbits
+	.align	1
+	.global	FtlGcFreeTempBlock
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcFreeTempBlock, %function
+FtlGcFreeTempBlock:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r3, .L2939
+	ldr	r3, [r3]
+	cbz	r3, .L2916
+.L2921:
+	movs	r0, #0
+.L2915:
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2916:
+	ldr	r0, .L2939+4
+	movw	r3, #65535
+	ldr	r5, .L2939+8
+	ldrh	r6, [r0]
+	mov	r4, r0
+	cmp	r6, r3
+	beq	.L2918
+	ldr	r3, .L2939+12
 	ldrh	r1, [r3]
+	bl	FtlGcScanTempBlk
+	str	r0, [sp, #12]
+	adds	r0, r0, #1
+	beq	.L2918
+	ldr	r3, .L2939+16
+	ldr	r2, [r3]
+	ldrh	r3, [r2, r6, lsl #1]
+	cmp	r3, #4
+	bls	.L2919
+	subs	r3, r3, #5
+	movs	r0, #1
+	strh	r3, [r2, r6, lsl #1]	@ movhi
+	bl	FtlEctTblFlush
+.L2919:
+	ldr	r3, [r5]
+	cbnz	r3, .L2920
+	ldr	r2, .L2939+20
+	ldr	r0, [sp, #12]
+	ldr	r3, [r2, #96]
+	ubfx	r0, r0, #10, #16
+	adds	r3, r3, #1
+	str	r3, [r2, #96]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+.L2920:
+	movs	r3, #0
+	movs	r0, #1
+	str	r3, [r5]
+	b	.L2915
+.L2918:
+	ldrh	r2, [r4]
+	movs	r3, #0
+	str	r3, [r5]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L2921
+	ldr	r6, .L2939+12
+	bl	FtlCacheWriteBack
+	ldrb	r0, [r4, #7]	@ zero_extendqisi2
+	ldrh	r2, [r6]
+	ldr	r5, .L2939+24
+	muls	r2, r0, r2
+	ldrh	r1, [r5]
 	cmp	r1, r2
-	beq	.L2726
-	ldrh	r0, [r10]
-.L2837:
-	bl	decrement_vpc_count
-	b	.L2721
-.L2726:
-	ldr	r2, [r3, #4]
-	str	r2, [sp, #4]
-	adds	r2, r2, #1
-	beq	.L2727
-	ldr	r2, .L2844+36
-	ldr	r0, [sp, #4]
-	ldr	r1, [r2]
-	bl	ftl_cmp_data_ver
-	cbz	r0, .L2727
-	ldr	r1, [sp, #4]
-	adds	r1, r1, #1
-	str	r1, [r2]
-.L2727:
-	ldr	r4, [r3, #8]
-	add	r1, sp, #48
-	ldr	r3, [r3, #12]
-	movs	r2, #0
-	mov	r0, r4
-	str	r3, [sp, #44]
-	bl	log2phys
-	ldr	r3, .L2844+4
-	ldr	r1, [r3]
-	adds	r3, r1, #1
-	beq	.L2728
-	ldr	r0, [sp, #4]
-	bl	ftl_cmp_data_ver
-	cmp	r0, #0
-	beq	.L2728
-	ldr	r3, [sp, #44]
-	adds	r7, r3, #1
-	beq	.L2729
-	ldr	r0, [r6]
-	movs	r2, #0
-	movs	r1, #1
-	add	r0, r0, r5
-	str	r3, [r0, #4]
-	ldr	r7, [r0, #12]
-	bl	FlashReadPages
-	ldr	r2, [r6]
-	ldr	r1, [r2, r5]
-	adds	r3, r2, r5
-	adds	r1, r1, #1
-	bne	.L2730
-.L2731:
-	mov	r3, #-1
-	str	r3, [sp, #44]
-.L2738:
-	ldr	r7, [sp, #44]
-	adds	r0, r7, #1
-	beq	.L2721
-.L2753:
-	ubfx	r0, r7, #10, #16
-	bl	P2V_block_in_plane
-	ldr	r3, .L2844+40
-	mov	r4, r0
-	ldrh	r3, [r3]
-	cmp	r3, r0
-	bhi	.L2744
-	ldr	r1, .L2844+44
-	movw	r2, #2457
-	ldr	r0, .L2844+48
+	beq	.L2922
+	ldr	r1, .L2939+28
+	movs	r2, #193
+	ldr	r0, .L2939+32
 	bl	printf
-	ldr	r1, .L2844+52
-	ldr	r0, .L2844+56
+	ldr	r1, .L2939+36
+	ldr	r0, .L2939+40
 	bl	printf
-.L2744:
-	ldr	r3, .L2844+60
-	ldr	r3, [r3]
-	ldrh	r3, [r3, r4, lsl #1]
+.L2922:
+	ldrh	r6, [r6]
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	ldr	r2, .L2939+44
+	ldrh	r0, [r4]
+	ldr	fp, .L2939+84
+	smulbb	r3, r3, r6
+	ldr	r1, [r2]
+	movs	r6, #0
+	mov	r10, r2
+	strh	r3, [r1, r0, lsl #1]	@ movhi
+	ldr	r1, .L2939+48
+	ldrh	r3, [r5]
+	ldr	r0, [r1]
+	add	r3, r3, r0
+	str	r3, [r1]
+.L2923:
+	ldrh	r2, [r5]
+	uxth	r3, r6
+	cmp	r2, r3
+	bhi	.L2927
+	movw	r0, #65535
+	bl	decrement_vpc_count
+	ldr	r3, .L2939+52
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2928
+	ldrh	r1, [r4]
+	ldr	r0, .L2939+56
+	bl	printf
+.L2928:
+	ldrh	r0, [r4]
+	ldr	r3, [r10]
+	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	beq	.L2745
+	beq	.L2929
+	bl	INSERT_DATA_LIST
+.L2930:
+	ldr	r3, .L2939+60
+	movw	r6, #65535
+	strh	r6, [r4]	@ movhi
+	movs	r4, #0
+	strh	r4, [r5]	@ movhi
+	strh	r4, [r3]	@ movhi
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	ldr	r3, .L2939+64
+	strh	r6, [r3]	@ movhi
+	ldr	r3, .L2939+68
+	ldrh	r2, [r3]
+	ldr	r3, .L2939+72
+	ldrh	r3, [r3]
+	add	r3, r3, r3, lsl #1
+	cmp	r2, r3, asr #2
+	ble	.L2921
+	ldr	r3, .L2939+76
+	movs	r2, #20
 	mov	r0, r4
-	b	.L2837
-.L2729:
-	ldr	r3, [sp, #52]
-	ldr	r2, [sp, #48]
-	cmp	r2, r3
-	bne	.L2721
+	strh	r2, [r3]	@ movhi
+	b	.L2915
+.L2927:
+	uxth	r3, r6
+	mov	r8, #12
+	ldr	r2, [fp]
+	mul	r8, r8, r3
+	ldr	r3, .L2939+80
+	ldr	r3, [r3]
+	add	r7, r3, r8
+	ldr	r0, [r7, #8]
+	cmp	r0, r2
+	bcc	.L2924
+.L2937:
+	ldrh	r0, [r4]
+	b	.L2938
+.L2924:
+	movs	r2, #0
+	add	r1, sp, #12
+	str	r3, [sp, #4]
+	bl	log2phys
+	ldr	r3, [sp, #4]
+	ldr	r2, [sp, #12]
+	ldr	r0, [r3, r8]
+	cmp	r0, r2
+	bne	.L2926
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
 	movs	r2, #1
-	add	r1, sp, #44
-	mov	r0, r4
+	mov	r8, r0
+	adds	r1, r7, #4
+	ldr	r0, [r7, #8]
 	bl	log2phys
-.L2721:
-	ldr	r3, [sp, #32]
-	adds	r3, r3, #1
-	b	.L2839
-.L2730:
-	ldr	r1, [r7, #8]
-	cmp	r4, r1
-	bne	.L2731
-	ldr	r8, [r7, #4]
-	ldr	r0, .L2844+4
-	mov	r1, r8
-	ldr	r0, [r0]
-	bl	ftl_cmp_data_ver
-	cmp	r0, #0
-	beq	.L2731
-	ldr	r1, [sp, #48]
-	ldr	r0, [sp, #52]
-	cmp	r1, r0
-	bne	.L2733
-.L2736:
-	ldr	r1, [sp, #44]
-	mov	r0, r4
-	bl	FtlReUsePrevPpa
-	b	.L2731
-.L2845:
+	mov	r0, r8
+.L2938:
+	bl	decrement_vpc_count
+	b	.L2925
+.L2926:
+	ldr	r3, [r7, #4]
+	cmp	r2, r3
+	bne	.L2937
+.L2925:
+	adds	r6, r6, #1
+	b	.L2923
+.L2929:
+	bl	INSERT_FREE_LIST
+	b	.L2930
+.L2940:
+	.align	2
+.L2939:
+	.word	.LANCHOR78
+	.word	.LANCHOR95
+	.word	.LANCHOR138
+	.word	.LANCHOR52
+	.word	.LANCHOR80
+	.word	.LANCHOR141
+	.word	.LANCHOR113
+	.word	.LANCHOR246
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LANCHOR85
+	.word	.LANCHOR166
+	.word	.LANCHOR16
+	.word	.LC74
+	.word	.LANCHOR112
+	.word	.LANCHOR213
+	.word	.LANCHOR90
+	.word	.LANCHOR232
+	.word	.LANCHOR181
+	.word	.LANCHOR114
+	.word	.LANCHOR74
+	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
+	.section	.text.FtlGcPageRecovery,"ax",%progbits
+	.align	1
+	.global	FtlGcPageRecovery
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcPageRecovery, %function
+FtlGcPageRecovery:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	ldr	r4, .L2943
+	ldr	r5, .L2943+4
+	ldrh	r1, [r4]
+	mov	r0, r5
+	bl	FtlGcScanTempBlk
+	ldrh	r2, [r5, #2]
+	ldrh	r3, [r4]
+	cmp	r2, r3
+	bcc	.L2941
+	ldr	r0, .L2943+8
+	bl	FtlMapBlkWriteDumpData
+	movs	r0, #0
+	bl	FtlGcFreeTempBlock
+	ldr	r3, .L2943+12
+	movs	r2, #0
+	str	r2, [r3]
+.L2941:
+	pop	{r3, r4, r5, pc}
+.L2944:
 	.align	2
-.L2844:
-	.word	.LANCHOR120
-	.word	.LANCHOR136
-	.word	.LANCHOR237
-	.word	.LANCHOR180
-	.word	.LANCHOR238
-	.word	.LANCHOR38
-	.word	.LANCHOR15
-	.word	.LANCHOR53
+.L2943:
 	.word	.LANCHOR52
-	.word	.LANCHOR160
-	.word	.LANCHOR40
-	.word	.LANCHOR236
-	.word	.LC5
-	.word	.LC6
-	.word	.LC7
-	.word	.LANCHOR83
-.L2733:
-	ldr	r0, [sp, #44]
-	cmp	r1, r0
-	beq	.L2731
-	adds	r0, r1, #1
-	beq	.L2734
-	str	r1, [r3, #4]
-	movs	r2, #0
-	movs	r1, #1
-	mov	r0, r3
-	ldr	r7, [r3, #12]
-	bl	FlashReadPages
-.L2735:
-	ldr	r3, [r6]
-	ldr	r3, [r3, r5]
-	adds	r3, r3, #1
-	beq	.L2736
-	ldr	r3, [r7, #4]
-	ldr	r2, .L2846
-	mov	r1, r3
-	ldr	r0, [r2]
-	bl	ftl_cmp_data_ver
-	cmp	r0, #0
-	beq	.L2736
-	mov	r1, r3
-	mov	r0, r8
-	bl	ftl_cmp_data_ver
-	cmp	r0, #0
-	beq	.L2731
-	b	.L2736
-.L2734:
-	str	r1, [r2, r5]
-	b	.L2735
-.L2728:
-	ldr	r3, [sp, #52]
-	ldr	r2, [sp, #48]
-	cmp	r2, r3
-	beq	.L2738
-	ldr	r3, [sp, #44]
-	adds	r7, r3, #1
-	beq	.L2740
-	ldr	r2, .L2846+4
-	ubfx	r3, r3, #10, #21
-	ldr	r2, [r2]
-	cmp	r3, r2
-	bcs	.L2721
-.L2740:
-	movs	r2, #1
-	add	r1, sp, #52
+	.word	.LANCHOR95
+	.word	.LANCHOR130
+	.word	.LANCHOR138
+	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
+	.section	.text.FtlPowerLostRecovery,"ax",%progbits
+	.align	1
+	.global	FtlPowerLostRecovery
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlPowerLostRecovery, %function
+FtlPowerLostRecovery:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	movs	r4, #0
+	ldr	r5, .L2946
+	ldr	r3, .L2946+4
+	mov	r0, r5
+	str	r4, [r3]
+	bl	FtlRecoverySuperblock
+	mov	r0, r5
+	ldr	r5, .L2946+8
+	bl	FtlSlcSuperblockCheck
+	mov	r0, r5
+	bl	FtlRecoverySuperblock
+	mov	r0, r5
+	bl	FtlSlcSuperblockCheck
+	bl	FtlGcPageRecovery
+	movw	r0, #65535
+	bl	decrement_vpc_count
 	mov	r0, r4
-	bl	log2phys
-	ldr	r7, [sp, #48]
-	adds	r5, r7, #1
-	beq	.L2738
-	ldr	r3, [sp, #44]
-	cmp	r7, r3
-	beq	.L2753
-	ubfx	r0, r7, #10, #16
-	bl	P2V_block_in_plane
-	ldr	r3, .L2846+8
-	ldrh	r3, [r3]
-	cmp	r3, r0
-	beq	.L2743
-	ldr	r3, .L2846+12
-	ldrh	r3, [r3]
-	cmp	r3, r0
-	beq	.L2743
-	ldr	r3, .L2846+16
+	pop	{r3, r4, r5, pc}
+.L2947:
+	.align	2
+.L2946:
+	.word	.LANCHOR93
+	.word	.LANCHOR243
+	.word	.LANCHOR94
+	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
+	.section	.text.FtlSysBlkInit,"ax",%progbits
+	.align	1
+	.global	FtlSysBlkInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlSysBlkInit, %function
+FtlSysBlkInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	movs	r3, #0
+	ldr	r4, .L2961
+	movw	r5, #65535
+	strh	r3, [r4]	@ movhi
+	ldr	r3, .L2961+4
+	strh	r5, [r3]	@ movhi
+	ldr	r3, .L2961+8
+	ldrh	r0, [r3]
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlScanSysBlk
+	ldr	r3, .L2961+12
 	ldrh	r3, [r3]
-	cmp	r3, r0
-	bne	.L2738
-.L2743:
-	ldr	r0, [r6]
+	cmp	r3, r5
+	mov	r5, r4
+	bne	.L2949
+.L2951:
+	mov	r4, #-1
+.L2948:
+	mov	r0, r4
+	pop	{r3, r4, r5, r6, r7, pc}
+.L2949:
+	bl	FtlLoadSysInfo
+	mov	r4, r0
+	cmp	r0, #0
+	bne	.L2951
+	bl	FtlLoadMapInfo
+	bl	FtlLoadVonderInfo
+	bl	Ftl_load_ext_data
+	bl	FtlLoadEctTbl
+	bl	FtlFreeSysBLkSort
+	bl	SupperBlkListInit
+	bl	FtlPowerLostRecovery
+	movs	r0, #1
+	bl	FtlUpdateVaildLpn
+	ldr	r3, .L2961+16
+	movs	r0, #12
+	ldrh	r1, [r3]
+	ldr	r3, .L2961+20
+	ldr	r2, [r3]
+	mov	r3, r4
+.L2952:
+	cmp	r3, r1
+	bge	.L2957
+	mla	r6, r0, r3, r2
+	ldr	r6, [r6, #4]
+	cmp	r6, #0
+	bge	.L2953
+.L2957:
+	ldr	r0, .L2961+24
+	cmp	r3, r1
+	ldr	r2, [r0]
+	add	r2, r2, #32
+	str	r2, [r0]
+	bge	.L2959
+.L2954:
+	ldr	r3, .L2961+28
+	ldr	r1, [r3]
+	ldr	r3, .L2961+32
+	ldrh	r0, [r3]
+	ldrh	r5, [r3, #4]
+	ldrh	r2, [r1, r0, lsl #1]
+	subs	r2, r2, r5
+	ldr	r5, .L2961+36
+	strh	r2, [r1, r0, lsl #1]	@ movhi
+	ldrh	r2, [r5]
+	strh	r2, [r3, #2]	@ movhi
 	movs	r2, #0
-	movs	r1, #1
-	str	r7, [r0, #4]
-	ldr	r5, [r0, #12]
-	bl	FlashReadPages
-	ldr	r3, [r6]
-	ldr	r3, [r3]
+	strh	r2, [r3, #4]	@ movhi
+	strb	r2, [r3, #6]
+	ldr	r3, .L2961+40
+	ldrh	r6, [r3]
+	ldrh	r7, [r3, #4]
+	ldrh	r0, [r1, r6, lsl #1]
+	subs	r0, r0, r7
+	strh	r0, [r1, r6, lsl #1]	@ movhi
+	strb	r2, [r3, #6]
+	ldrh	r1, [r5]
+	strh	r2, [r3, #4]	@ movhi
+	ldr	r2, .L2961+44
+	strh	r1, [r3, #2]	@ movhi
+	ldrh	r3, [r2, #30]
 	adds	r3, r3, #1
-	beq	.L2738
-	ldr	r1, [r5, #4]
-	ldr	r0, [sp, #4]
-	bl	ftl_cmp_data_ver
-	cmp	r0, #0
-	bne	.L2738
-	movs	r2, #1
-	add	r1, sp, #48
-	mov	r0, r4
-	bl	log2phys
-	b	.L2738
-.L2745:
-	mov	r1, r4
-	ldr	r0, .L2846+20
-	bl	printf
-	b	.L2721
-.L2725:
-	ldrh	r3, [r10]
-	mov	r1, r4
-	ldr	r2, .L2846+24
-	ldr	r0, .L2846+28
-	strh	r3, [r2]	@ movhi
-	ldr	r2, [sp, #4]
-	bl	printf
-	ldr	r2, .L2846+32
-	ldr	r3, [r2]
-	cmp	r3, #31
-	bhi	.L2746
-	ldr	r0, [sp, #52]
-	ldr	r1, .L2846+36
-	str	r0, [r1, r3, lsl #2]
+	strh	r3, [r2, #30]	@ movhi
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+.L2960:
+	bl	FtlVpcTblFlush
+	b	.L2948
+.L2953:
 	adds	r3, r3, #1
-	str	r3, [r2]
-.L2746:
-	ldrh	r0, [r10]
-	bl	decrement_vpc_count
-	ldr	r3, .L2846
-	ldr	r2, [r3]
-	adds	r1, r2, #1
-	bne	.L2747
-	ldr	r2, [sp, #4]
-.L2838:
-	str	r2, [r3]
-	b	.L2721
-.L2747:
-	ldr	r1, [sp, #4]
-	cmp	r1, r2
-	bcs	.L2721
-	mov	r2, r1
-	b	.L2838
-.L2724:
-	ldrb	r3, [sp, #16]	@ zero_extendqisi2
-	ldr	r2, [sp, #16]
-	strb	r3, [r10, #6]
-	ldrh	r3, [sp, #8]
-	strh	r3, [r10, #2]	@ movhi
-	b	.L2841
-.L2847:
+	b	.L2952
+.L2959:
+	ldrh	r3, [r5]
+	cmp	r3, #0
+	bne	.L2954
+	bl	l2p_flush
+	b	.L2960
+.L2962:
 	.align	2
-.L2846:
-	.word	.LANCHOR136
-	.word	.LANCHOR43
-	.word	.LANCHOR91
-	.word	.LANCHOR92
+.L2961:
+	.word	.LANCHOR242
+	.word	.LANCHOR241
+	.word	.LANCHOR39
+	.word	.LANCHOR218
+	.word	.LANCHOR67
+	.word	.LANCHOR98
+	.word	.LANCHOR165
+	.word	.LANCHOR85
 	.word	.LANCHOR93
-	.word	.LC67
-	.word	.LANCHOR237
-	.word	.LC68
-	.word	.LANCHOR239
-	.word	.LANCHOR240
-	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
-	.section	.text.FtlGcScanTempBlk,"ax",%progbits
+	.word	.LANCHOR52
+	.word	.LANCHOR94
+	.word	.LANCHOR82
+	.size	FtlSysBlkInit, .-FtlSysBlkInit
+	.section	.text.FtlLowFormat,"ax",%progbits
 	.align	1
-	.global	FtlGcScanTempBlk
+	.global	FtlLowFormat
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlGcScanTempBlk, %function
-FtlGcScanTempBlk:
-	@ args = 0, pretend = 0, frame = 64
+	.type	FtlLowFormat, %function
+FtlLowFormat:
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2887
+	ldr	r3, .L2994
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r4, r0
-	sub	sp, sp, #64
-	ldrh	r5, [r3]
-	movw	r3, #65535
-	cmp	r5, r3
-	beq	.L2874
-	cbnz	r5, .L2849
-.L2850:
-	bl	FtlGcPageVarInit
-	b	.L2851
-.L2874:
-	movs	r5, #0
-.L2849:
-	ldr	r3, .L2887+4
-	ldrh	r3, [r3]
-	cmp	r3, r1
-	beq	.L2850
-.L2851:
-	ldr	r8, .L2887+76
-	mov	r3, #-1
-	str	r3, [sp, #8]
-.L2852:
-	ldrh	r2, [r4]
-	movs	r3, #0
-	strb	r3, [r4, #8]
-	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L2853
-.L2873:
-	ldr	r3, .L2887+8
-	movs	r2, #0
-	ldr	r0, [r8]
-	mov	fp, r2
-	movw	ip, #65535
-	mov	lr, #36
-	ldrh	r10, [r3]
-	ldr	r3, .L2887+12
-	ldr	r3, [r3]
+	sub	sp, sp, #24
+	ldr	r4, [r3]
+	cmp	r4, #0
+	bne	.L2965
+	ldr	r5, .L2994+4
+	mov	r1, r4
+	ldr	r3, .L2994+8
+	ldr	r6, .L2994+12
+	ldrh	r2, [r5]
+	ldr	r0, [r3]
+	ldr	r7, .L2994+16
+	lsls	r2, r2, #2
+	bl	ftl_memset
+	ldrh	r2, [r5]
+	mov	r1, r4
+	ldr	r3, .L2994+20
+	lsls	r2, r2, #2
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldr	r3, .L2994+24
+	ldrh	r0, [r6]
+	str	r4, [r7]
+	str	r4, [r3]
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlLoadBbt
+	cbz	r0, .L2966
+	bl	FtlMakeBbt
+.L2966:
+	ldr	r3, .L2994+28
+	ldr	r2, .L2994+32
+	ldr	ip, .L2994+124
+	ldrh	r1, [r3]
+	ldr	r4, [r2]
+	ldr	r2, .L2994+36
 	str	r3, [sp, #12]
-	ldr	r3, .L2887+16
-	ldrh	r3, [r3]
-	str	r3, [sp, #16]
-	ldr	r3, .L2887+20
-	ldr	r3, [r3]
-	str	r3, [sp, #20]
-	ldr	r3, .L2887+24
-	ldrh	r7, [r3]
-	add	r3, r4, #16
-	str	r3, [sp, #4]
-.L2854:
-	uxth	r3, r2
-	cmp	r10, r3
-	bhi	.L2856
-	mov	r10, #0
+	lsls	r1, r1, #7
+	ldr	r5, [r2]
 	movs	r2, #0
-	mov	r1, fp
-	bl	FlashReadPages
-.L2857:
-	uxth	r3, r10
-	cmp	fp, r3
-	bhi	.L2872
-	ldr	r3, .L2887+4
-	adds	r5, r5, #1
-	uxth	r5, r5
-	ldrh	r3, [r3]
+.L2967:
+	uxth	r3, r2
+	adds	r2, r2, #1
+	cmp	r3, r1
+	blt	.L2968
+	ldr	r3, .L2994+40
+	movs	r4, #0
+	ldr	r8, .L2994+128
+	ldrh	r5, [r3]
+	mov	r10, r8
+	str	r3, [sp]
+.L2969:
+	ldrh	r3, [r8]
 	cmp	r3, r5
-	bhi	.L2873
-.L2853:
-	ldr	r3, .L2887
-	movw	r2, #65535
+	bhi	.L2970
+	ldr	r5, .L2994+44
+	subs	r3, r4, #2
+	ldrh	r1, [r5]
+	cmp	r3, r1, lsl #1
+	ble	.L2971
 	mov	r0, r4
-	strh	r5, [r4, #2]	@ movhi
+	movs	r4, #0
+	bl	__aeabi_uidiv
+	ldr	r3, .L2994+48
+	ldr	r3, [r3]
+	add	r0, r0, r3
+	uxth	r0, r0
+	bl	FtlSysBlkNumInit
+	ldrh	r0, [r6]
+	bl	FtlFreeSysBlkQueueInit
+	ldr	r3, [sp]
+	ldrh	r6, [r3]
+.L2972:
+	ldrh	r3, [r10]
+	cmp	r3, r6
+	bhi	.L2973
+.L2971:
+	mov	r8, #0
+	mov	r6, r8
+.L2974:
+	ldr	r3, [sp]
+	uxth	r0, r8
+	add	r8, r8, #1
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bhi	.L2975
+	ldrh	r2, [r10]
+	ldr	r3, .L2994+52
+	ldrh	r5, [r5]
+	str	r2, [r3]
+	ldr	r3, .L2994+56
 	mov	r1, r5
-	strh	r2, [r3]	@ movhi
-	movs	r2, #0
-	strb	r2, [r4, #6]
-	bl	ftl_sb_update_avl_pages
-	ldr	r0, [sp, #8]
-	add	sp, sp, #64
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2856:
-	ldr	r1, [sp, #4]
-	ldrh	r3, [r1], #2
-	cmp	r3, ip
-	str	r1, [sp, #4]
-	beq	.L2855
-	mla	r1, lr, fp, r0
-	ldr	r6, [sp, #12]
-	orr	r3, r5, r3, lsl #10
-	str	r3, [r1, #4]
-	ldr	r3, [sp, #16]
-	mul	r3, r3, fp
-	bic	r3, r3, #3
-	add	r3, r3, r6
-	ldr	r6, [sp, #20]
-	str	r3, [r1, #8]
-	mul	r3, r7, fp
-	bic	r3, r3, #3
-	add	r3, r3, r6
-	str	r3, [r1, #12]
-	add	r3, fp, #1
-	uxth	fp, r3
-.L2855:
-	adds	r2, r2, #1
-	b	.L2854
-.L2872:
-	movs	r7, #36
-	ldr	r2, [r8]
-	mul	r7, r7, r10
-	adds	r3, r2, r7
-	ldr	r6, [r2, r7]
-	ldr	r1, [r3, #4]
-	ldr	r3, [r3, #12]
-	str	r1, [sp, #4]
-	cmp	r6, #0
-	bne	.L2858
-	ldrh	r1, [r3]
-	movw	r2, #65535
-	cmp	r1, r2
-	beq	.L2886
-	ldr	r2, .L2887+28
-	ldr	r0, [r3, #8]
-	ldr	r2, [r2]
-	cmp	r0, r2
-	bls	.L2860
-.L2886:
-	ldr	r3, .L2887+32
-	movs	r1, #0
-	ldrh	r2, [r4]
 	ldr	r3, [r3]
-	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldrh	r0, [r4]
-	bl	INSERT_FREE_LIST
-	ldr	r2, .L2887+36
-	movw	r3, #65535
-	strh	r3, [r4]	@ movhi
-	strh	r3, [r2]	@ movhi
-.L2885:
-	bl	FtlGcPageVarInit
-	movs	r5, #0
-	b	.L2852
-.L2860:
-	ldr	r2, .L2887+40
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbnz	r2, .L2862
-.L2863:
-	ldr	r2, [r3, #8]
-	add	r10, r10, #1
-	ldr	r1, [sp, #4]
-	ldr	r0, [r3, #12]
-	bl	FtlGcUpdatePage
-	b	.L2857
-.L2862:
-	mov	r2, r6
-	add	r1, sp, #24
-	str	r3, [sp, #12]
-	bl	log2phys
-	ldr	r3, [sp, #12]
-	ldr	r1, [sp, #24]
-	ldr	r2, [r3, #12]
-	cmp	r2, r1
-	bne	.L2863
-	adds	r1, r2, #1
-	beq	.L2863
-	str	r2, [sp, #32]
-	movs	r1, #1
-	ldr	r2, .L2887+44
-	add	r0, sp, #28
-	ldr	r2, [r2]
-	str	r2, [sp, #36]
-	ldr	r2, .L2887+48
-	ldr	r2, [r2]
-	str	r2, [sp, #40]
-	mov	r2, r6
-	bl	FlashReadPages
-	ldr	r2, .L2887+52
-	ldr	r1, [r8]
-	ldr	r0, [sp, #36]
-	ldrh	r2, [r2]
-	ldr	r3, [sp, #12]
-	add	r7, r7, r1
-	lsl	ip, r2, #7
-.L2864:
-	cmp	r6, ip
-	beq	.L2863
-	ldr	r1, [r7, #8]
-	ldr	r2, [r0, r6, lsl #2]
-	ldr	r1, [r1, r6, lsl #2]
-	cmp	r1, r2
-	beq	.L2865
-	ldr	r2, [sp, #32]
-	ldrh	r1, [r4]
-	ldr	r0, .L2887+56
-	bl	printf
-	b	.L2886
-.L2865:
-	adds	r6, r6, #1
-	b	.L2864
-.L2858:
-	ldr	r2, [sp, #4]
-	ldrh	r1, [r4]
-	ldr	r0, .L2887+60
-	bl	printf
-	ldr	r3, .L2887+64
-	ldrh	r2, [r4]
+	mov	r0, r3
+	str	r3, [sp, #16]
+	bl	__aeabi_uidiv
+	ldr	r1, .L2994+60
+	mov	fp, r0
+	ubfx	r3, fp, #5, #16
+	ldr	r0, .L2994+64
+	add	r2, r3, #36
+	str	r3, [sp, #4]
+	strh	r2, [r1]	@ movhi
+	movs	r2, #24
+	muls	r2, r5, r2
+	str	fp, [r0]
+	mov	r8, r0
+	str	r1, [sp, #8]
+	cmp	r6, r2
+	ble	.L2976
+	ldr	r3, [sp, #16]
+	mov	r1, r5
+	subs	r0, r3, r6
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #8]
+	str	r0, [r8]
+	lsrs	r0, r0, #5
+	adds	r0, r0, #24
+	strh	r0, [r3]	@ movhi
+.L2976:
+	ldr	r3, .L2994+68
 	ldr	r3, [r3]
-	cbnz	r3, .L2868
-	ldr	r3, .L2887+68
+	cmp	r3, #1
+	bne	.L2977
+	ldr	r2, .L2994+60
+	mov	r1, r5
+	mov	r0, r6
+	ldrh	r3, [r2]
+	str	r2, [sp, #20]
+	str	r3, [sp, #16]
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #16]
+	ldr	r2, [sp, #20]
+	uxtah	r0, r3, r0
+	add	r3, r3, r0, asr #2
+	strh	r3, [r2]	@ movhi
+.L2977:
+	ldr	r3, .L2994+72
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2869
-.L2868:
-	ldr	r3, .L2887+72
-	ldr	r3, [r3]
-	ldrh	r3, [r3, r2, lsl #1]
-	cmp	r3, #159
-	bls	.L2870
-.L2869:
-	ldr	r3, [r8]
-	ldr	r3, [r3, r7]
-	adds	r3, r3, #1
-	bne	.L2871
-.L2870:
+	cbz	r3, .L2978
+	ldr	r2, .L2994+60
+	mov	r1, r5
+	mov	r0, r6
+	ldrh	r3, [r2]
+	str	r2, [sp, #20]
+	str	r3, [sp, #16]
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #16]
+	ldr	r2, [sp, #20]
+	uxtah	r0, r3, r0
+	add	r3, r3, r0, asr #2
+	strh	r3, [r2]	@ movhi
+.L2978:
+	ldr	r3, .L2994+76
+	ldrh	r3, [r3]
+	cbz	r3, .L2980
+	ldr	r2, .L2994+60
+	ldrh	r1, [r2]
+	add	r1, r1, r3, lsr #1
+	strh	r1, [r2]	@ movhi
+	mul	r1, r5, r3
+	cmp	r6, r1
+	bge	.L2980
+	ldr	r1, .L2994+64
+	adds	r3, r3, #32
+	str	fp, [r1]
+	ldr	r1, [sp, #4]
+	add	r1, r1, r3
+	strh	r1, [r2]	@ movhi
+.L2980:
+	ldr	r3, [sp, #8]
+	ldr	fp, .L2994+132
+	ldrh	r2, [r3]
 	ldr	r3, [r8]
-	add	r7, r7, r3
-	ldr	r3, [r7, #4]
-	str	r3, [sp, #8]
-.L2871:
-	ldr	r3, .L2887+32
-	movs	r1, #0
-	ldr	r3, [r3]
-	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldrh	r0, [r4]
-	bl	INSERT_FREE_LIST
-	movw	r3, #65535
-	strh	r3, [r4]	@ movhi
-	b	.L2885
-.L2888:
-	.align	2
-.L2887:
-	.word	.LANCHOR241
-	.word	.LANCHOR52
-	.word	.LANCHOR38
-	.word	.LANCHOR104
-	.word	.LANCHOR57
-	.word	.LANCHOR105
-	.word	.LANCHOR58
-	.word	.LANCHOR72
-	.word	.LANCHOR83
-	.word	.LANCHOR205
-	.word	.LANCHOR2
-	.word	.LANCHOR187
-	.word	.LANCHOR189
-	.word	.LANCHOR55
-	.word	.LC69
-	.word	.LC70
-	.word	.LANCHOR28
-	.word	.LANCHOR15
-	.word	.LANCHOR78
-	.word	.LANCHOR180
-	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
-	.section	.text.FtlGcFreeTempBlock,"ax",%progbits
-	.align	1
-	.global	FtlGcFreeTempBlock
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlGcFreeTempBlock, %function
-FtlGcFreeTempBlock:
-	@ args = 0, pretend = 0, frame = 16
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L2913
-	ldr	r3, [r3]
-	cbz	r3, .L2890
-.L2895:
-	movs	r0, #0
-.L2889:
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2890:
-	ldr	r0, .L2913+4
-	movw	r3, #65535
-	ldr	r5, .L2913+8
-	ldrh	r6, [r0]
-	mov	r4, r0
-	cmp	r6, r3
-	beq	.L2892
-	ldr	r3, .L2913+12
-	ldrh	r1, [r3]
-	bl	FtlGcScanTempBlk
-	str	r0, [sp, #12]
-	adds	r0, r0, #1
-	beq	.L2892
-	ldr	r3, .L2913+16
-	ldr	r2, [r3]
-	ldrh	r3, [r2, r6, lsl #1]
-	cmp	r3, #4
-	bls	.L2893
-	subs	r3, r3, #5
-	movs	r0, #1
-	strh	r3, [r2, r6, lsl #1]	@ movhi
-	bl	FtlEctTblFlush
-.L2893:
-	ldr	r3, [r5]
-	cbnz	r3, .L2894
-	ldr	r2, .L2913+20
-	ldr	r0, [sp, #12]
-	ldr	r3, [r2, #96]
-	ubfx	r0, r0, #10, #16
-	adds	r3, r3, #1
-	str	r3, [r2, #96]
-	bl	FtlBbmMapBadBlock
+	subs	r3, r3, r2
+	muls	r5, r3, r5
+	ldr	r3, .L2994+80
+	ldrh	r3, [r3]
+	str	r5, [fp]
+	muls	r5, r3, r5
+	ldr	r3, [sp, #12]
+	ldrh	r3, [r3]
+	str	r5, [r8]
+	muls	r5, r3, r5
+	ldr	r3, .L2994+84
+	str	r5, [r3]
 	bl	FtlBbmTblFlush
-.L2894:
-	movs	r3, #0
-	movs	r0, #1
-	str	r3, [r5]
-	b	.L2889
-.L2892:
-	ldrh	r2, [r4]
-	movs	r3, #0
-	str	r3, [r5]
-	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L2895
-	ldr	r6, .L2913+12
-	bl	FtlCacheWriteBack
-	ldrb	r0, [r4, #7]	@ zero_extendqisi2
-	ldrh	r2, [r6]
-	ldr	r5, .L2913+24
-	muls	r2, r0, r2
-	ldrh	r1, [r5]
-	cmp	r1, r2
-	beq	.L2896
-	ldr	r1, .L2913+28
-	movs	r2, #163
-	ldr	r0, .L2913+32
-	bl	printf
-	ldr	r1, .L2913+36
-	ldr	r0, .L2913+40
-	bl	printf
-.L2896:
-	ldrh	r6, [r6]
-	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	ldr	r2, .L2913+44
-	ldrh	r0, [r4]
-	ldr	fp, .L2913+84
-	smulbb	r3, r3, r6
-	ldr	r1, [r2]
-	movs	r6, #0
-	mov	r10, r2
-	strh	r3, [r1, r0, lsl #1]	@ movhi
-	ldr	r1, .L2913+48
-	ldrh	r3, [r5]
-	ldr	r0, [r1]
-	add	r3, r3, r0
-	str	r3, [r1]
-.L2897:
-	ldrh	r2, [r5]
-	uxth	r3, r6
-	cmp	r2, r3
-	bhi	.L2901
-	movw	r0, #65535
-	bl	decrement_vpc_count
-	ldr	r3, .L2913+52
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2902
-	ldrh	r1, [r4]
-	ldr	r0, .L2913+56
+	ldr	r3, .L2994+88
+	adds	r1, r4, r6
+	ldr	r2, [r3]
+	ldr	r3, .L2994+92
+	ldrh	r3, [r3]
+	add	r3, r3, r2, lsr #3
+	cmp	r1, r3
+	bls	.L2982
+	lsrs	r2, r2, #5
+	ldr	r0, .L2994+96
 	bl	printf
-.L2902:
-	ldrh	r0, [r4]
-	ldr	r3, [r10]
-	ldrh	r3, [r3, r0, lsl #1]
-	cmp	r3, #0
-	beq	.L2903
-	bl	INSERT_DATA_LIST
-.L2904:
-	ldr	r3, .L2913+60
+.L2982:
+	ldrh	r2, [r10]
+	movs	r1, #0
+	ldr	r5, .L2994+100
 	movw	r6, #65535
-	strh	r6, [r4]	@ movhi
-	movs	r4, #0
-	strh	r4, [r5]	@ movhi
-	strh	r4, [r3]	@ movhi
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
-	ldr	r3, .L2913+64
-	strh	r6, [r3]	@ movhi
-	ldr	r3, .L2913+68
+	ldr	r4, .L2994+104
+	lsls	r2, r2, #1
+	ldr	r0, [r5]
+	mov	r8, r4
+	bl	ftl_memset
+	ldr	r2, .L2994+108
+	movs	r3, #0
+	strh	r3, [r4, #2]	@ movhi
+	movs	r1, #255
+	strb	r3, [r4, #6]
+	str	r3, [r2]
+	ldr	r2, .L2994+112
+	strh	r3, [r4]	@ movhi
+	strh	r3, [r2, #2]	@ movhi
+	strb	r3, [r2, #6]
+	strb	r3, [r2, #8]
+	movs	r3, #1
+	strb	r3, [r4, #8]
+	ldr	r3, [sp]
+	strh	r6, [r2]	@ movhi
 	ldrh	r2, [r3]
-	ldr	r3, .L2913+72
-	ldrh	r3, [r3]
-	add	r3, r3, r3, lsl #1
-	cmp	r2, r3, asr #2
-	ble	.L2895
-	ldr	r3, .L2913+76
-	movs	r2, #20
-	mov	r0, r4
-	strh	r2, [r3]	@ movhi
-	b	.L2889
-.L2901:
-	uxth	r3, r6
-	mov	r8, #12
-	ldr	r2, [fp]
-	mul	r8, r8, r3
-	ldr	r3, .L2913+80
-	ldr	r3, [r3]
-	add	r7, r3, r8
-	ldr	r0, [r7, #8]
-	cmp	r0, r2
-	bcc	.L2898
-.L2911:
-	ldrh	r0, [r4]
-	b	.L2912
-.L2898:
+	ldr	r3, .L2994+116
+	lsrs	r2, r2, #3
+	ldr	r0, [r3]
+	bl	ftl_memset
+.L2983:
+	mov	r0, r8
+	bl	make_superblock
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	ldrh	r2, [r4]
+	cbnz	r3, .L2984
+	ldr	r3, [r5]
+	strh	r6, [r3, r2, lsl #1]	@ movhi
+	ldrh	r3, [r4]
+	adds	r3, r3, #1
+	strh	r3, [r4]	@ movhi
+	b	.L2983
+.L2968:
+	mvns	r0, r3
+	orr	r0, r3, r0, lsl #16
+	str	r0, [r4, r3, lsl #2]
+	str	ip, [r5, r3, lsl #2]
+	b	.L2967
+.L2970:
+	mov	r0, r5
+	movs	r1, #1
+	bl	FtlLowFormatEraseBlock
+	adds	r5, r5, #1
+	add	r4, r4, r0
+	uxth	r4, r4
+	uxth	r5, r5
+	b	.L2969
+.L2973:
+	mov	r0, r6
+	movs	r1, #1
+	bl	FtlLowFormatEraseBlock
+	adds	r6, r6, #1
+	add	r4, r4, r0
+	uxth	r4, r4
+	uxth	r6, r6
+	b	.L2972
+.L2975:
+	movs	r1, #0
+	bl	FtlLowFormatEraseBlock
+	add	r6, r6, r0
+	uxth	r6, r6
+	b	.L2974
+.L2984:
+	ldr	r3, [r7]
+	movw	r6, #65535
+	ldrh	r1, [r4, #4]
+	str	r3, [r4, #12]
+	adds	r3, r3, #1
+	str	r3, [r7]
+	ldr	r3, [r5]
+	strh	r1, [r3, r2, lsl #1]	@ movhi
 	movs	r2, #0
-	add	r1, sp, #12
-	str	r3, [sp, #4]
-	bl	log2phys
-	ldr	r3, [sp, #4]
-	ldr	r2, [sp, #12]
-	ldr	r0, [r3, r8]
-	cmp	r0, r2
-	bne	.L2900
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
+	ldr	r3, .L2994+120
+	strh	r2, [r3, #2]	@ movhi
+	mov	r8, r3
+	strb	r2, [r3, #6]
+	ldrh	r2, [r4]
+	mov	r4, r3
+	adds	r2, r2, #1
+	strh	r2, [r3]	@ movhi
 	movs	r2, #1
-	mov	r8, r0
-	adds	r1, r7, #4
-	ldr	r0, [r7, #8]
-	bl	log2phys
+	strb	r2, [r3, #8]
+.L2985:
 	mov	r0, r8
-.L2912:
-	bl	decrement_vpc_count
-	b	.L2899
-.L2900:
-	ldr	r3, [r7, #4]
-	cmp	r2, r3
-	bne	.L2911
-.L2899:
-	adds	r6, r6, #1
-	b	.L2897
-.L2903:
-	bl	INSERT_FREE_LIST
-	b	.L2904
-.L2914:
+	bl	make_superblock
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	ldrh	r2, [r4]
+	cmp	r3, #0
+	bne	.L2986
+	ldr	r3, [r5]
+	strh	r6, [r3, r2, lsl #1]	@ movhi
+	ldrh	r3, [r4]
+	adds	r3, r3, #1
+	strh	r3, [r4]	@ movhi
+	b	.L2985
+.L2995:
 	.align	2
-.L2913:
-	.word	.LANCHOR76
-	.word	.LANCHOR93
-	.word	.LANCHOR135
-	.word	.LANCHOR52
+.L2994:
 	.word	.LANCHOR78
-	.word	.LANCHOR138
-	.word	.LANCHOR110
-	.word	.LANCHOR242
-	.word	.LC5
-	.word	.LC6
-	.word	.LC7
-	.word	.LANCHOR83
-	.word	.LANCHOR161
-	.word	.LANCHOR15
-	.word	.LC71
-	.word	.LANCHOR109
-	.word	.LANCHOR205
-	.word	.LANCHOR88
-	.word	.LANCHOR224
-	.word	.LANCHOR176
-	.word	.LANCHOR111
-	.word	.LANCHOR72
-	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
-	.section	.text.Ftl_get_new_temp_ppa,"ax",%progbits
-	.align	1
-	.global	Ftl_get_new_temp_ppa
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	Ftl_get_new_temp_ppa, %function
-Ftl_get_new_temp_ppa:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	movw	r3, #65535
-	ldr	r4, .L2918
-	ldrh	r2, [r4]
-	cmp	r2, r3
-	beq	.L2916
-	ldrh	r3, [r4, #4]
-	cbnz	r3, .L2917
-.L2916:
-	bl	FtlCacheWriteBack
-	movs	r0, #0
-	movs	r5, #0
-	bl	FtlGcFreeTempBlock
-	ldr	r0, .L2918
-	strb	r5, [r4, #8]
-	bl	allocate_data_superblock
-	ldr	r3, .L2918+4
-	strh	r5, [r3]	@ movhi
-	ldr	r3, .L2918+8
-	strh	r5, [r3]	@ movhi
-	bl	l2p_flush
-	mov	r0, r5
-	bl	FtlEctTblFlush
+	.word	.LANCHOR66
+	.word	.LANCHOR203
+	.word	.LANCHOR39
+	.word	.LANCHOR164
+	.word	.LANCHOR134
+	.word	.LANCHOR165
+	.word	.LANCHOR55
+	.word	.LANCHOR193
+	.word	.LANCHOR194
+	.word	.LANCHOR40
+	.word	.LANCHOR38
+	.word	.LANCHOR65
+	.word	.LANCHOR75
+	.word	.LANCHOR42
+	.word	.LANCHOR232
+	.word	.LANCHOR74
+	.word	.LANCHOR104
+	.word	.LANCHOR16
+	.word	.LANCHOR49
+	.word	.LANCHOR52
+	.word	.LANCHOR68
+	.word	.LANCHOR43
+	.word	.LANCHOR59
+	.word	.LC75
+	.word	.LANCHOR85
+	.word	.LANCHOR93
+	.word	.LANCHOR102
+	.word	.LANCHOR213
+	.word	.LANCHOR1
+	.word	.LANCHOR94
+	.word	168778952
+	.word	.LANCHOR41
+	.word	.LANCHOR231
+.L2986:
+	ldr	r3, [r7]
+	ldrh	r1, [r4, #4]
+	str	r3, [r4, #12]
+	adds	r3, r3, #1
+	str	r3, [r7]
+	movw	r4, #65535
+	ldr	r3, [r5]
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	ldr	r3, .L2996
+	strh	r4, [r3]	@ movhi
+	bl	FtlFreeSysBlkQueueOut
+	ldr	r3, .L2996+4
+	movs	r2, #0
+	strh	r2, [r3, #2]	@ movhi
+	ldr	r2, [fp]
+	strh	r0, [r3]	@ movhi
+	strh	r4, [r3, #4]	@ movhi
+	strh	r2, [r3, #6]	@ movhi
+	ldr	r2, [r7]
+	str	r2, [r3, #8]
+	adds	r2, r2, #1
+	str	r2, [r7]
 	bl	FtlVpcTblFlush
-.L2917:
-	ldr	r0, .L2918
-	pop	{r3, r4, r5, lr}
-	b	get_new_active_ppa
-.L2919:
+	bl	FtlSysBlkInit
+	cbnz	r0, .L2965
+	ldr	r3, .L2996+8
+	movs	r2, #1
+	str	r2, [r3]
+.L2965:
+	movs	r0, #0
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2997:
 	.align	2
-.L2918:
-	.word	.LANCHOR93
-	.word	.LANCHOR109
-	.word	.LANCHOR110
-	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
+.L2996:
+	.word	.LANCHOR95
+	.word	.LANCHOR218
+	.word	.LANCHOR247
+	.size	FtlLowFormat, .-FtlLowFormat
 	.section	.text.Ftl_gc_temp_data_write_back,"ax",%progbits
 	.align	1
 	.global	Ftl_gc_temp_data_write_back
@@ -20196,26 +20730,26 @@ Ftl_gc_temp_data_write_back:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
-	ldr	r3, .L2935
+	ldr	r3, .L3013
 	ldr	r3, [r3]
-	cbz	r3, .L2921
-.L2924:
+	cbz	r3, .L2999
+.L3002:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L2921:
-	ldr	r3, .L2935+4
-	ldr	r5, .L2935+8
+.L2999:
+	ldr	r3, .L3013+4
+	ldr	r5, .L3013+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2923
+	cbz	r3, .L3001
 	ldr	r3, [r5]
 	lsls	r2, r3, #31
-	bpl	.L2923
-	ldr	r3, .L2935+12
+	bpl	.L3001
+	ldr	r3, .L3013+12
 	ldrh	r3, [r3, #4]
 	cmp	r3, #0
-	bne	.L2924
-.L2923:
-	ldr	r4, .L2935+16
+	bne	.L3002
+.L3001:
+	ldr	r4, .L3013+16
 	movs	r3, #0
 	movs	r6, #0
 	movs	r7, #36
@@ -20223,23 +20757,23 @@ Ftl_gc_temp_data_write_back:
 	ldr	r1, [r5]
 	ldr	r0, [r4]
 	bl	FlashProgPages
-.L2925:
+.L3003:
 	ldr	r1, [r5]
 	uxth	r3, r6
 	cmp	r3, r1
-	bcc	.L2927
+	bcc	.L3005
 	ldr	r0, [r4]
 	bl	FtlGcBufFree
 	movs	r3, #0
 	str	r3, [r5]
-	ldr	r3, .L2935+12
+	ldr	r3, .L3013+12
 	ldrh	r3, [r3, #4]
 	cmp	r3, #0
-	bne	.L2924
+	bne	.L3002
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
-	b	.L2934
-.L2927:
+	b	.L3012
+.L3005:
 	muls	r3, r7, r3
 	ldr	r2, [r4]
 	adds	r6, r6, #1
@@ -20247,15 +20781,15 @@ Ftl_gc_temp_data_write_back:
 	ldr	r2, [r2, r3]
 	ldr	r0, [r1, #12]
 	adds	r3, r2, #1
-	bne	.L2926
-	ldr	r3, .L2935+12
+	bne	.L3004
+	ldr	r3, .L3013+12
 	movs	r5, #0
-	ldr	r0, .L2935+20
+	ldr	r0, .L3013+20
 	ldrh	r4, [r3]
 	ldr	r0, [r0]
 	strh	r5, [r0, r4, lsl #1]	@ movhi
 	strh	r2, [r3]	@ movhi
-	ldr	r2, .L2935+24
+	ldr	r2, .L3013+24
 	ldr	r0, [r1, #4]
 	ldr	r3, [r2, #96]
 	ubfx	r0, r0, #10, #16
@@ -20264,1266 +20798,1632 @@ Ftl_gc_temp_data_write_back:
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
 	bl	FtlGcPageVarInit
-.L2934:
+.L3012:
 	movs	r0, #1
 	pop	{r3, r4, r5, r6, r7, pc}
-.L2926:
+.L3004:
 	ldr	r2, [r0, #8]
 	ldr	r1, [r1, #4]
-	ldr	r0, [r0, #12]
-	bl	FtlGcUpdatePage
-	b	.L2925
-.L2936:
-	.align	2
-.L2935:
-	.word	.LANCHOR76
-	.word	.LANCHOR15
-	.word	.LANCHOR102
-	.word	.LANCHOR93
-	.word	.LANCHOR181
-	.word	.LANCHOR83
-	.word	.LANCHOR138
-	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
-	.section	.text.FtlGcPageRecovery,"ax",%progbits
-	.align	1
-	.global	FtlGcPageRecovery
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlGcPageRecovery, %function
-FtlGcPageRecovery:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	ldr	r4, .L2939
-	ldr	r5, .L2939+4
-	ldrh	r1, [r4]
-	mov	r0, r5
-	bl	FtlGcScanTempBlk
-	ldrh	r2, [r5, #2]
-	ldrh	r3, [r4]
-	cmp	r2, r3
-	bcc	.L2937
-	ldr	r0, .L2939+8
-	bl	FtlMapBlkWriteDumpData
-	movs	r0, #0
-	bl	FtlGcFreeTempBlock
-	ldr	r3, .L2939+12
-	movs	r2, #0
-	str	r2, [r3]
-.L2937:
-	pop	{r3, r4, r5, pc}
-.L2940:
-	.align	2
-.L2939:
-	.word	.LANCHOR52
-	.word	.LANCHOR93
-	.word	.LANCHOR127
-	.word	.LANCHOR135
-	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
-	.section	.text.FtlPowerLostRecovery,"ax",%progbits
-	.align	1
-	.global	FtlPowerLostRecovery
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlPowerLostRecovery, %function
-FtlPowerLostRecovery:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	movs	r4, #0
-	ldr	r5, .L2942
-	ldr	r3, .L2942+4
-	mov	r0, r5
-	str	r4, [r3]
-	bl	FtlRecoverySuperblock
-	mov	r0, r5
-	ldr	r5, .L2942+8
-	bl	FtlSlcSuperblockCheck
-	mov	r0, r5
-	bl	FtlRecoverySuperblock
-	mov	r0, r5
-	bl	FtlSlcSuperblockCheck
-	bl	FtlGcPageRecovery
-	movw	r0, #65535
-	bl	decrement_vpc_count
-	mov	r0, r4
-	pop	{r3, r4, r5, pc}
-.L2943:
+	ldr	r0, [r0, #12]
+	bl	FtlGcUpdatePage
+	b	.L3003
+.L3014:
 	.align	2
-.L2942:
-	.word	.LANCHOR91
-	.word	.LANCHOR239
-	.word	.LANCHOR92
-	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
-	.section	.text.FtlSysBlkInit,"ax",%progbits
+.L3013:
+	.word	.LANCHOR78
+	.word	.LANCHOR16
+	.word	.LANCHOR105
+	.word	.LANCHOR95
+	.word	.LANCHOR187
+	.word	.LANCHOR85
+	.word	.LANCHOR141
+	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
+	.section	.text.Ftl_get_new_temp_ppa,"ax",%progbits
 	.align	1
-	.global	FtlSysBlkInit
+	.global	Ftl_get_new_temp_ppa
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlSysBlkInit, %function
-FtlSysBlkInit:
+	.type	Ftl_get_new_temp_ppa, %function
+Ftl_get_new_temp_ppa:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	movs	r3, #0
-	ldr	r4, .L2957
-	movw	r5, #65535
-	strh	r3, [r4]	@ movhi
-	ldr	r3, .L2957+4
+	push	{r3, r4, r5, lr}
+	movw	r3, #65535
+	ldr	r4, .L3018
+	ldrh	r2, [r4]
+	cmp	r2, r3
+	beq	.L3016
+	ldrh	r3, [r4, #4]
+	cbnz	r3, .L3017
+.L3016:
+	bl	FtlCacheWriteBack
+	movs	r0, #0
+	movs	r5, #0
+	bl	FtlGcFreeTempBlock
+	ldr	r0, .L3018
+	strb	r5, [r4, #8]
+	bl	allocate_data_superblock
+	ldr	r3, .L3018+4
+	strh	r5, [r3]	@ movhi
+	ldr	r3, .L3018+8
 	strh	r5, [r3]	@ movhi
-	ldr	r3, .L2957+8
-	ldrh	r0, [r3]
-	bl	FtlFreeSysBlkQueueInit
-	bl	FtlScanSysBlk
-	ldr	r3, .L2957+12
-	ldrh	r3, [r3]
-	cmp	r3, r5
-	mov	r5, r4
-	bne	.L2945
-.L2947:
-	mov	r4, #-1
-.L2944:
-	mov	r0, r4
-	pop	{r3, r4, r5, r6, r7, pc}
-.L2945:
-	bl	FtlLoadSysInfo
-	mov	r4, r0
-	cmp	r0, #0
-	bne	.L2947
-	bl	FtlLoadMapInfo
-	bl	FtlLoadVonderInfo
-	bl	Ftl_load_ext_data
-	bl	FtlLoadEctTbl
-	bl	FtlFreeSysBLkSort
-	bl	SupperBlkListInit
-	bl	FtlPowerLostRecovery
-	movs	r0, #1
-	bl	FtlUpdateVaildLpn
-	ldr	r3, .L2957+16
-	movs	r0, #12
-	ldrh	r1, [r3]
-	ldr	r3, .L2957+20
-	ldr	r2, [r3]
-	mov	r3, r4
-.L2948:
-	cmp	r3, r1
-	bge	.L2953
-	mla	r6, r0, r3, r2
-	ldr	r6, [r6, #4]
-	cmp	r6, #0
-	bge	.L2949
-.L2953:
-	ldr	r0, .L2957+24
-	cmp	r3, r1
-	ldr	r2, [r0]
-	add	r2, r2, #32
-	str	r2, [r0]
-	bge	.L2955
-.L2950:
-	ldr	r3, .L2957+28
-	ldr	r1, [r3]
-	ldr	r3, .L2957+32
-	ldrh	r0, [r3]
-	ldrh	r5, [r3, #4]
-	ldrh	r2, [r1, r0, lsl #1]
-	subs	r2, r2, r5
-	ldr	r5, .L2957+36
-	strh	r2, [r1, r0, lsl #1]	@ movhi
-	ldrh	r2, [r5]
-	strh	r2, [r3, #2]	@ movhi
-	movs	r2, #0
-	strh	r2, [r3, #4]	@ movhi
-	strb	r2, [r3, #6]
-	ldr	r3, .L2957+40
-	ldrh	r6, [r3]
-	ldrh	r7, [r3, #4]
-	ldrh	r0, [r1, r6, lsl #1]
-	subs	r0, r0, r7
-	strh	r0, [r1, r6, lsl #1]	@ movhi
-	strb	r2, [r3, #6]
-	ldrh	r1, [r5]
-	strh	r2, [r3, #4]	@ movhi
-	ldr	r2, .L2957+44
-	strh	r1, [r3, #2]	@ movhi
-	ldrh	r3, [r2, #30]
-	adds	r3, r3, #1
-	strh	r3, [r2, #30]	@ movhi
 	bl	l2p_flush
+	mov	r0, r5
+	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L2956:
-	bl	FtlVpcTblFlush
-	b	.L2944
-.L2949:
-	adds	r3, r3, #1
-	b	.L2948
-.L2955:
-	ldrh	r3, [r5]
-	cmp	r3, #0
-	bne	.L2950
-	bl	l2p_flush
-	b	.L2956
-.L2958:
+.L3017:
+	ldr	r0, .L3018
+	pop	{r3, r4, r5, lr}
+	b	get_new_active_ppa
+.L3019:
 	.align	2
-.L2957:
-	.word	.LANCHOR238
-	.word	.LANCHOR237
-	.word	.LANCHOR39
-	.word	.LANCHOR210
-	.word	.LANCHOR67
-	.word	.LANCHOR96
-	.word	.LANCHOR160
-	.word	.LANCHOR83
-	.word	.LANCHOR91
-	.word	.LANCHOR52
-	.word	.LANCHOR92
-	.word	.LANCHOR80
-	.size	FtlSysBlkInit, .-FtlSysBlkInit
-	.section	.text.FtlLowFormat,"ax",%progbits
+.L3018:
+	.word	.LANCHOR95
+	.word	.LANCHOR112
+	.word	.LANCHOR113
+	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
+	.section	.text.ftl_do_gc,"ax",%progbits
 	.align	1
-	.global	FtlLowFormat
+	.global	ftl_do_gc
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlLowFormat, %function
-FtlLowFormat:
-	@ args = 0, pretend = 0, frame = 24
+	.type	ftl_do_gc, %function
+ftl_do_gc:
+	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2990
+	ldr	r3, .L3120
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #24
-	ldr	r4, [r3]
-	cmp	r4, #0
-	bne	.L2961
-	ldr	r5, .L2990+4
-	mov	r1, r4
-	ldr	r3, .L2990+8
-	ldr	r6, .L2990+12
+	mov	lr, r0
+	sub	sp, sp, #32
+	ldr	r0, [r3]
+	cmp	r0, #0
+	bne	.L3079
+	ldr	r3, .L3120+4
+	ldr	r3, [r3]
+	cmp	r3, #1
+	bne	.L3020
+	ldr	r3, .L3120+8
+	ldr	r3, [r3]
+	cmp	r3, #0
+	bne	.L3020
+	ldr	r2, .L3120+12
+	ldrh	r2, [r2]
+	cmp	r2, #47
+	bls	.L3082
+	ldr	r5, .L3120+16
+	movw	r2, #65535
+	ldrh	ip, [r5]
+	cmp	ip, r2
+	beq	.L3022
+	ldr	r7, .L3120+20
+	ldrh	r3, [r7]
+	cmp	r3, r2
+	bne	.L3022
+	ldr	r1, .L3120+24
+	ldrh	r6, [r1]
+	cmp	r6, r3
+	beq	.L3022
+	ldr	r2, .L3120+28
+	ldrh	r4, [r2]
+	cmp	r4, r3
+	itttt	ne
+	strhne	ip, [r7]	@ movhi
+	strhne	r6, [r5]	@ movhi
+	strhne	r4, [r1]	@ movhi
+	strhne	r3, [r2]	@ movhi
+.L3022:
+	cmp	lr, #0
+	bne	.L3083
+	ldr	r3, .L3120+32
+	ldrh	r3, [r3]
+	cmp	r3, #24
+	bhi	.L3084
+	ldr	r2, .L3120+36
+	cmp	r3, #16
+	ldrh	r4, [r2]
+	bls	.L3025
+	lsrs	r4, r4, #5
+.L3024:
+	ldr	r2, .L3120+40
+	ldrh	r1, [r2]
+	cmp	r1, r3
+	mov	r1, r2
+	bcs	.L3028
+	ldr	r3, .L3120+44
+	movw	r0, #65535
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bne	.L3029
+	ldr	r0, .L3120+20
+	ldrh	r0, [r0]
+	cmp	r0, r3
+	bne	.L3029
+	ldr	r3, .L3120+48
+	ldrh	r0, [r3]
+	cbnz	r0, .L3030
+	ldr	r3, .L3120+52
+	ldr	r4, .L3120+56
+	ldr	r3, [r3]
+	ldr	r4, [r4]
+	add	r3, r3, r3, lsl #1
+	cmp	r4, r3, lsr #2
+	bcs	.L3031
+.L3030:
+	ldr	r3, .L3120+60
+	ldrh	r3, [r3]
+	add	r3, r3, r3, lsl #1
+	asrs	r3, r3, #2
+	strh	r3, [r1]	@ movhi
+.L3032:
+	ldr	r3, .L3120+64
+	movs	r2, #0
+	str	r2, [r3]
+.L3020:
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3025:
+	cmp	r3, #12
+	bls	.L3026
+	lsrs	r4, r4, #4
+	b	.L3024
+.L3026:
+	cmp	r3, #8
+	bls	.L3024
+	lsrs	r4, r4, #2
+	b	.L3024
+.L3084:
+	movs	r4, #1
+	b	.L3024
+.L3031:
+	movs	r3, #18
+	strh	r3, [r2]	@ movhi
+	b	.L3032
+.L3029:
+	ldr	r3, .L3120+60
+	ldrh	r3, [r3]
+	add	r3, r3, r3, lsl #1
+	asrs	r3, r3, #2
+	strh	r3, [r1]	@ movhi
+.L3028:
+	ldr	r3, .L3120+68
+	ldrh	r3, [r3]
+	cbz	r3, .L3023
+	adds	r4, r4, #32
+	uxth	r4, r4
+.L3023:
+	ldr	r5, .L3120+72
+	movw	r3, #65535
+	ldrh	r2, [r5]
+	cmp	r2, r3
+	bne	.L3035
+	ldr	r3, .L3120+20
+	ldrh	r1, [r3]
+	cmp	r1, r2
+	beq	.L3036
+	ldr	r0, .L3120+76
+	ldr	r0, [r0]
+	ldrh	r1, [r0, r1, lsl #1]
+	cbnz	r1, .L3037
+	strh	r2, [r3]	@ movhi
+.L3037:
+	ldrh	r2, [r3]
+	strh	r2, [r5]	@ movhi
+	movw	r2, #65535
+	strh	r2, [r3]	@ movhi
+.L3036:
+	ldrh	r0, [r5]
+	movw	r6, #65535
+	movs	r3, #0
+	strb	r3, [r5, #8]
+	cmp	r0, r6
+	beq	.L3035
+	bl	IsBlkInGcList
+	cbz	r0, .L3039
+	strh	r6, [r5]	@ movhi
+.L3039:
+	ldr	r3, .L3120+80
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L3040
+	ldrh	r0, [r5]
+	bl	ftl_get_blk_mode
+	strb	r0, [r5, #8]
+.L3040:
+	ldrh	r2, [r5]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L3035
+	ldr	r0, .L3120+72
+	bl	make_superblock
+	ldr	r2, .L3120+84
+	movs	r3, #0
+	strh	r3, [r5, #2]	@ movhi
+	strb	r3, [r5, #6]
+	strh	r3, [r2]	@ movhi
+	ldr	r3, .L3120+76
 	ldrh	r2, [r5]
-	ldr	r0, [r3]
-	lsls	r2, r2, #2
-	bl	ftl_memset
+	ldr	r3, [r3]
+	ldrh	r2, [r3, r2, lsl #1]
+	ldr	r3, .L3120+88
+	strh	r2, [r3]	@ movhi
+.L3035:
+	ldr	r2, .L3120+92
+	ldrh	r3, [r5]
+	ldrh	r2, [r2]
+	cmp	r2, r3
+	beq	.L3041
+	ldr	r2, .L3120+96
+	ldrh	r2, [r2]
+	cmp	r2, r3
+	beq	.L3041
+	ldr	r2, .L3120+44
+	ldrh	r2, [r2]
+	cmp	r2, r3
+	bne	.L3042
+.L3041:
+	movw	r3, #65535
+	strh	r3, [r5]	@ movhi
+.L3042:
+	ldr	r5, .L3120+72
+	mov	r6, r5
+.L3078:
 	ldrh	r2, [r5]
-	mov	r1, r4
-	ldr	r3, .L2990+16
-	ldr	r5, .L2990+20
-	lsls	r2, r2, #2
-	ldr	r0, [r3]
-	bl	ftl_memset
-	ldr	r3, .L2990+24
-	ldrh	r0, [r6]
-	str	r4, [r5]
-	str	r4, [r3]
-	bl	FtlFreeSysBlkQueueInit
-	bl	FtlLoadBbt
-	cbz	r0, .L2962
-	bl	FtlMakeBbt
-.L2962:
-	ldr	r3, .L2990+28
-	ldr	r2, .L2990+32
-	ldr	ip, .L2990+112
-	ldrh	r1, [r3]
-	ldr	r4, [r2]
-	ldr	r2, .L2990+36
-	str	r3, [sp, #12]
-	lsls	r1, r1, #7
-	ldr	r7, [r2]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L3043
+	ldr	r10, .L3120+104
 	movs	r2, #0
-.L2963:
-	uxth	r3, r2
-	adds	r2, r2, #1
-	cmp	r3, r1
-	blt	.L2964
-	ldr	r3, .L2990+40
-	movs	r7, #0
-	ldr	fp, .L2990+116
-	ldrh	r4, [r3]
-	mov	r8, r3
-	mov	r10, fp
-.L2965:
-	ldrh	r3, [fp]
-	cmp	r3, r4
-	bhi	.L2966
-	ldr	r4, .L2990+44
-	subs	r3, r7, #2
-	ldrh	r1, [r4]
-	cmp	r3, r1, lsl #1
-	bgt	.L2967
-.L2971:
-	movs	r7, #0
-	mov	r6, r7
-.L2968:
-	ldrh	r3, [r8]
-	uxth	r0, r7
-	adds	r7, r7, #1
-	cmp	r3, r0
-	bhi	.L2972
-	ldrh	r2, [r10]
-	ldr	r3, .L2990+48
-	ldrh	r4, [r4]
-	ldr	r7, .L2990+52
+	ldr	r3, .L3120+64
+	mov	r7, r10
 	str	r2, [r3]
-	ldr	r3, .L2990+56
-	mov	r1, r4
-	ldr	r3, [r3]
-	mov	r0, r3
-	str	r3, [sp, #16]
-	bl	__aeabi_uidiv
-	ldr	r1, .L2990+60
-	ubfx	r3, r0, #5, #16
-	add	r2, r3, #36
-	mov	fp, r0
-	str	r0, [r7]
-	strh	r2, [r1]	@ movhi
-	movs	r2, #24
-	muls	r2, r4, r2
-	str	r3, [sp, #4]
-	str	r1, [sp, #8]
-	cmp	r6, r2
-	ble	.L2973
-	ldr	r3, [sp, #16]
-	mov	r1, r4
-	subs	r0, r3, r6
-	bl	__aeabi_uidiv
-	ldr	r3, [sp, #8]
-	str	r0, [r7]
-	lsrs	r0, r0, #5
-	adds	r0, r0, #24
-	strh	r0, [r3]	@ movhi
-.L2973:
-	ldr	r3, .L2990+64
-	ldr	r3, [r3]
-	cmp	r3, #1
-	bne	.L2974
-	ldr	r2, .L2990+60
-	mov	r1, r4
-	mov	r0, r6
-	ldrh	r3, [r2]
-	str	r2, [sp, #20]
-	str	r3, [sp, #16]
-	bl	__aeabi_uidiv
-	ldr	r3, [sp, #16]
-	ldr	r2, [sp, #20]
-	uxtah	r0, r3, r0
-	add	r3, r3, r0, asr #2
-	strh	r3, [r2]	@ movhi
-.L2974:
-	ldr	r3, .L2990+68
+.L3044:
+	ldrh	r8, [r10]
+	mov	r0, r8
+	bl	List_get_gc_head_node
+	uxth	fp, r0
+	movw	r3, #65535
+	cmp	fp, r3
+	strh	fp, [r6]	@ movhi
+	bne	.L3045
+	movs	r3, #0
+	movs	r0, #8
+	strh	r3, [r10]	@ movhi
+	b	.L3020
+.L3083:
+	movs	r4, #1
+	b	.L3023
+.L3045:
+	str	r0, [sp]
+	mov	r0, fp
+	bl	IsBlkInGcList
+	add	r3, r8, #1
+	ldr	r2, [sp]
+	cbz	r0, .L3046
+	strh	r3, [r10]	@ movhi
+	b	.L3044
+.L3046:
+	ldr	r1, .L3120+36
+	uxth	r3, r3
+	ldr	lr, .L3120+108
+	uxth	r2, r2
+	ldr	r8, .L3120+76
+	ldrh	r1, [r1]
+	ldrh	lr, [lr]
+	ldr	r0, [r8]
+	strh	r3, [r10]	@ movhi
+	mul	r1, lr, r1
+	ldrh	ip, [r0, r2, lsl #1]
+	cmp	ip, r1, asr #1
+	bgt	.L3048
+	cmp	r3, #48
+	bls	.L3049
+	cmp	ip, #8
+	bls	.L3049
+	ldr	r3, .L3120+100
+	ldrh	r3, [r3]
+	cmp	r3, #35
+	bhi	.L3049
+.L3048:
+	movs	r3, #0
+	strh	r3, [r7]	@ movhi
+.L3049:
+	ldrh	r3, [r0, r2, lsl #1]
+	cmp	r1, r3
+	bgt	.L3050
+	ldrh	r2, [r7]
+	cmp	r2, #3
+	bhi	.L3050
+	movw	r3, #65535
+	strh	r3, [r6]	@ movhi
+	movs	r3, #0
+	strh	r3, [r7]	@ movhi
+.L3119:
+	ldr	r3, .L3120+48
+	ldrh	r0, [r3]
+	b	.L3020
+.L3050:
+	cmp	r3, #0
+	bne	.L3051
+	movw	r0, #65535
+	bl	decrement_vpc_count
+	ldrh	r3, [r7]
+	adds	r3, r3, #1
+	strh	r3, [r7]	@ movhi
+	b	.L3044
+.L3121:
+	.align	2
+.L3120:
+	.word	.LANCHOR78
+	.word	.LANCHOR247
+	.word	.LANCHOR176
+	.word	.LANCHOR87
+	.word	.LANCHOR116
+	.word	.LANCHOR115
+	.word	.LANCHOR117
+	.word	.LANCHOR118
+	.word	.LANCHOR90
+	.word	.LANCHOR52
+	.word	.LANCHOR181
+	.word	.LANCHOR95
+	.word	.LANCHOR248
+	.word	.LANCHOR74
+	.word	.LANCHOR102
+	.word	.LANCHOR232
+	.word	.LANCHOR177
+	.word	.LANCHOR119
+	.word	.LANCHOR213
+	.word	.LANCHOR85
+	.word	.LANCHOR16
+	.word	.LANCHOR249
+	.word	.LANCHOR250
+	.word	.LANCHOR93
+	.word	.LANCHOR94
+	.word	.LANCHOR112
+	.word	.LANCHOR183
+	.word	.LANCHOR38
+.L3051:
+	movs	r3, #0
+	strb	r3, [r6, #8]
+	ldr	r3, .L3122
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2975
-	ldr	r2, .L2990+60
-	mov	r1, r4
-	mov	r0, r6
-	ldrh	r3, [r2]
-	str	r2, [sp, #20]
-	str	r3, [sp, #16]
-	bl	__aeabi_uidiv
-	ldr	r3, [sp, #16]
-	ldr	r2, [sp, #20]
-	uxtah	r0, r3, r0
-	add	r3, r3, r0, asr #2
-	strh	r3, [r2]	@ movhi
-.L2975:
-	ldr	r3, .L2990+72
+	cbz	r3, .L3052
+	mov	r0, fp
+	bl	ftl_get_blk_mode
+	strb	r0, [r6, #8]
+.L3052:
+	ldr	r3, .L3122+4
 	ldrh	r3, [r3]
-	cbz	r3, .L2977
-	ldr	r2, .L2990+60
-	ldrh	r1, [r2]
-	add	r1, r1, r3, lsr #1
-	strh	r1, [r2]	@ movhi
-	mul	r1, r4, r3
-	cmp	r6, r1
-	bge	.L2977
-	ldr	r1, [sp, #4]
-	adds	r3, r3, #32
-	str	fp, [r7]
-	add	r1, r1, r3
+	cmp	r3, fp
+	bne	.L3053
+	ldr	r1, .L3122+8
+	movw	r2, #1069
+	ldr	r0, .L3122+12
+	bl	printf
+	ldr	r1, .L3122+16
+	ldr	r0, .L3122+20
+	bl	printf
+.L3053:
+	ldr	r3, .L3122+24
+	ldrh	r2, [r6]
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bne	.L3054
+	ldr	r1, .L3122+8
+	movw	r2, #1070
+	ldr	r0, .L3122+12
+	bl	printf
+	ldr	r1, .L3122+16
+	ldr	r0, .L3122+20
+	bl	printf
+.L3054:
+	ldr	r3, .L3122+28
+	ldrh	r2, [r6]
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bne	.L3055
+	ldr	r1, .L3122+8
+	movw	r2, #1071
+	ldr	r0, .L3122+12
+	bl	printf
+	ldr	r1, .L3122+16
+	ldr	r0, .L3122+20
+	bl	printf
+.L3055:
+	mov	r0, r5
+	bl	make_superblock
+	ldr	r2, .L3122+32
+	movs	r3, #0
+	ldrh	r1, [r6]
+	strh	r3, [r2]	@ movhi
+	ldr	r2, [r8]
+	ldrh	r1, [r2, r1, lsl #1]
+	ldr	r2, .L3122+36
+	strh	r3, [r6, #2]	@ movhi
+	strb	r3, [r6, #6]
 	strh	r1, [r2]	@ movhi
-.L2977:
-	ldr	r3, [sp, #8]
-	ldr	r6, .L2990+76
-	ldrh	r2, [r3]
-	ldr	r3, [r7]
-	subs	r3, r3, r2
-	muls	r4, r3, r4
-	ldr	r3, .L2990+80
+.L3043:
+	ldr	r3, .L3122+40
+	movs	r2, #1
+	str	r2, [r3]
+	ldr	r3, .L3122+44
 	ldrh	r3, [r3]
-	str	r4, [r6]
-	muls	r4, r3, r4
+	str	r3, [sp, #4]
+	ldr	r3, .L3122
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L3056
+	ldrb	r3, [r6, #8]	@ zero_extendqisi2
+	cmp	r3, r2
+	ittt	eq
+	ldreq	r3, .L3122+48
+	ldrheq	r3, [r3]
+	streq	r3, [sp, #4]
+.L3056:
+	ldrh	r3, [r6, #2]
+	ldr	r1, [sp, #4]
+	ldr	fp, .L3122+76
+	adds	r2, r3, r4
+	cmp	r2, r1
+	itt	gt
+	movgt	r2, r1
+	subgt	r4, r2, r3
+	mov	r3, #0
+	it	gt
+	uxthgt	r4, r4
+	str	r3, [sp, #12]
+.L3058:
+	ldrh	r3, [sp, #12]
+	cmp	r4, r3
+	bls	.L3066
+	ldr	r3, .L3122+52
+	movw	r8, #65535
+	ldrh	lr, [r5, #2]
+	mov	r10, #36
+	ldr	r0, [fp]
+	ldrh	r7, [r3]
 	ldr	r3, [sp, #12]
-	ldrh	r3, [r3]
-	str	r4, [r7]
-	ldr	r7, .L2990+84
-	muls	r4, r3, r4
-	ldr	r3, .L2990+88
-	str	r4, [r3]
-	movw	r4, #65535
-	bl	FtlBbmTblFlush
-	ldrh	r2, [r10]
-	movs	r1, #0
-	ldr	r10, .L2990+120
-	lsls	r2, r2, #1
-	ldr	r0, [r10]
-	bl	ftl_memset
-	ldr	r2, .L2990+92
+	add	lr, lr, r3
+	ldr	r3, .L3122+56
+	str	r3, [sp, #8]
 	movs	r3, #0
-	strh	r3, [r7, #2]	@ movhi
-	movs	r1, #255
-	strb	r3, [r7, #6]
-	str	r3, [r2]
-	ldr	r2, .L2990+96
-	strh	r3, [r7]	@ movhi
-	strh	r3, [r2, #2]	@ movhi
-	strb	r3, [r2, #6]
-	strb	r3, [r2, #8]
-	movs	r3, #1
-	strh	r4, [r2]	@ movhi
+	str	r3, [sp]
+	b	.L3067
+.L3060:
+	ldr	r1, [sp, #8]
+	ldrh	r2, [r1, #2]!
+	cmp	r2, r8
+	str	r1, [sp, #8]
+	beq	.L3059
+	ldr	r1, [sp]
+	orr	r2, lr, r2, lsl #10
+	mla	ip, r10, r1, r0
+	str	r2, [ip, #4]
+	mov	r2, r1
+	adds	r2, r2, #1
+	uxth	r2, r2
+	str	r2, [sp]
+.L3059:
+	adds	r3, r3, #1
+.L3067:
+	uxth	r2, r3
+	cmp	r7, r2
+	bhi	.L3060
+	ldrb	r2, [r5, #8]	@ zero_extendqisi2
+	ldr	r1, [sp]
+	bl	FlashReadPages
+	movs	r3, #0
+.L3118:
+	str	r3, [sp, #8]
+	ldr	r2, [sp]
+	ldrh	r3, [sp, #8]
+	cmp	r2, r3
+	bhi	.L3065
+	ldr	r3, [sp, #12]
+	adds	r3, r3, #1
+	str	r3, [sp, #12]
+	b	.L3058
+.L3065:
+	ldr	r3, [sp, #8]
+	movs	r7, #36
+	muls	r7, r3, r7
+	ldr	r3, [fp]
+	adds	r2, r3, r7
+	ldr	r3, [r3, r7]
+	adds	r3, r3, #1
+	beq	.L3062
+	ldr	r8, [r2, #12]
+	movw	r3, #61589
 	ldrh	r2, [r8]
-	mov	r8, r10
-	strb	r3, [r7, #8]
-	mov	r10, r7
-	ldr	r3, .L2990+100
-	lsrs	r2, r2, #3
-	ldr	r0, [r3]
-	bl	ftl_memset
-.L2979:
+	cmp	r2, r3
+	bne	.L3062
+	ldr	r10, [r8, #8]
+	cmp	r10, #-1
+	bne	.L3063
+	ldr	r1, .L3122+8
+	movw	r2, #1119
+	ldr	r0, .L3122+12
+	bl	printf
+	ldr	r1, .L3122+16
+	ldr	r0, .L3122+20
+	bl	printf
+.L3063:
+	movs	r2, #0
+	add	r1, sp, #24
 	mov	r0, r10
-	bl	make_superblock
-	ldrb	r3, [r7, #7]	@ zero_extendqisi2
-	ldrh	r2, [r7]
-	cmp	r3, #0
-	bne	.L2980
-	ldr	r3, [r8]
-	strh	r4, [r3, r2, lsl #1]	@ movhi
-	ldrh	r3, [r7]
+	bl	log2phys
+	ldr	r0, [fp]
+	ldr	r3, [sp, #24]
+	add	r0, r0, r7
+	ldr	r2, [r0, #4]
+	bic	r3, r3, #-2147483648
+	cmp	r3, r2
+	bne	.L3062
+	ldr	r2, .L3122+32
+	ldr	r1, .L3122+60
+	ldr	r10, .L3122+72
+	ldrh	r3, [r2]
+	str	r1, [sp, #20]
 	adds	r3, r3, #1
-	strh	r3, [r7]	@ movhi
-	b	.L2979
-.L2964:
-	mvns	r0, r3
-	orr	r0, r3, r0, lsl #16
-	str	r0, [r4, r3, lsl #2]
-	str	ip, [r7, r3, lsl #2]
-	b	.L2963
-.L2966:
-	mov	r0, r4
+	strh	r3, [r2]	@ movhi
+	ldr	r2, [r1]
+	movs	r1, #36
+	ldr	r3, [r10]
+	mla	r3, r1, r3, r2
+	ldr	r2, [r0, #16]
+	str	r2, [r3, #16]
+	str	r3, [sp, #16]
+	bl	Ftl_get_new_temp_ppa
+	ldr	r3, [sp, #16]
+	ldr	r1, [sp, #20]
+	str	r0, [r3, #4]
+	ldr	r2, [r1]
+	movs	r1, #36
+	ldr	r3, [r10]
+	ldr	r0, [fp]
+	mla	r2, r1, r3, r2
+	add	r0, r0, r7
+	ldr	r7, .L3122+28
+	ldr	r1, [r0, #8]
+	adds	r3, r3, #1
+	str	r1, [r2, #8]
+	ldr	r1, [r0, #12]
+	str	r1, [r2, #12]
 	movs	r1, #1
-	bl	FtlLowFormatEraseBlock
-	adds	r4, r4, #1
-	add	r7, r7, r0
-	uxth	r7, r7
+	ldr	r2, [sp, #24]
+	str	r2, [r8, #12]
+	ldrh	r2, [r7]
+	strh	r2, [r8, #2]	@ movhi
+	ldr	r2, .L3122+64
+	str	r3, [r10]
+	ldr	r2, [r2]
+	str	r2, [r8, #4]
+	bl	FtlGcBufAlloc
+	ldr	r3, .L3122
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L3064
+	ldrb	r2, [r7, #7]	@ zero_extendqisi2
+	ldr	r3, [r10]
+	cmp	r2, r3
+	beq	.L3064
+	ldrh	r3, [r7, #4]
+	cbnz	r3, .L3062
+.L3064:
+	bl	Ftl_gc_temp_data_write_back
+	cbz	r0, .L3062
+	ldr	r3, .L3122+40
+	movs	r2, #0
+	movw	r1, #65535
+	str	r2, [r3]
+	ldr	r3, .L3122+68
+	strh	r1, [r3]	@ movhi
+	strh	r2, [r3, #2]	@ movhi
+	b	.L3119
+.L3062:
+	ldr	r3, [sp, #8]
+	adds	r3, r3, #1
+	b	.L3118
+.L3066:
+	ldrh	r3, [r5, #2]
+	add	r4, r4, r3
+	ldr	r3, [sp, #4]
 	uxth	r4, r4
-	b	.L2965
-.L2967:
-	mov	r0, r7
-	bl	__aeabi_uidiv
-	ldr	r3, .L2990+104
+	cmp	r3, r4
+	strh	r4, [r5, #2]	@ movhi
+	bhi	.L3068
+	ldr	r3, .L3122+72
 	ldr	r3, [r3]
-	add	r0, r0, r3
-	uxth	r0, r0
-	bl	FtlSysBlkNumInit
-	ldrh	r0, [r6]
-	bl	FtlFreeSysBlkQueueInit
-	ldrh	r6, [r8]
-.L2969:
-	ldrh	r3, [r10]
-	cmp	r3, r6
-	bls	.L2971
-	mov	r0, r6
-	movs	r1, #1
-	adds	r6, r6, #1
-	bl	FtlLowFormatEraseBlock
-	uxth	r6, r6
-	b	.L2969
-.L2972:
-	movs	r1, #0
-	bl	FtlLowFormatEraseBlock
-	add	r6, r6, r0
-	uxth	r6, r6
-	b	.L2968
-.L2980:
-	ldr	r3, [r5]
-	ldrh	r1, [r7, #4]
-	ldr	r4, .L2990+108
-	str	r3, [r7, #12]
-	adds	r3, r3, #1
-	str	r3, [r5]
-	ldr	r3, [r8]
-	mov	r10, r4
-	strh	r1, [r3, r2, lsl #1]	@ movhi
-	movs	r3, #0
-	strh	r3, [r4, #2]	@ movhi
-	strb	r3, [r4, #6]
-	ldrh	r3, [r7]
-	movw	r7, #65535
-	adds	r3, r3, #1
-	strh	r3, [r4]	@ movhi
-	movs	r3, #1
-	strb	r3, [r4, #8]
-.L2981:
-	mov	r0, r10
-	bl	make_superblock
-	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	ldrh	r2, [r4]
-	cmp	r3, #0
-	bne	.L2982
-	ldr	r3, [r8]
-	strh	r7, [r3, r2, lsl #1]	@ movhi
-	ldrh	r3, [r4]
-	adds	r3, r3, #1
-	strh	r3, [r4]	@ movhi
-	b	.L2981
-.L2991:
+	cbz	r3, .L3069
+	bl	Ftl_gc_temp_data_write_back
+	cbz	r0, .L3069
+	ldr	r3, .L3122+40
+	movs	r2, #0
+	str	r2, [r3]
+	b	.L3119
+.L3123:
 	.align	2
-.L2990:
-	.word	.LANCHOR76
-	.word	.LANCHOR66
-	.word	.LANCHOR195
-	.word	.LANCHOR39
-	.word	.LANCHOR131
-	.word	.LANCHOR159
-	.word	.LANCHOR160
-	.word	.LANCHOR55
-	.word	.LANCHOR186
-	.word	.LANCHOR187
-	.word	.LANCHOR40
-	.word	.LANCHOR38
-	.word	.LANCHOR73
-	.word	.LANCHOR72
-	.word	.LANCHOR42
-	.word	.LANCHOR224
-	.word	.LANCHOR28
-	.word	.LANCHOR15
-	.word	.LANCHOR49
-	.word	.LANCHOR223
+.L3122:
+	.word	.LANCHOR16
+	.word	.LANCHOR93
+	.word	.LANCHOR251
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LANCHOR94
+	.word	.LANCHOR95
+	.word	.LANCHOR249
+	.word	.LANCHOR250
+	.word	.LANCHOR176
 	.word	.LANCHOR52
-	.word	.LANCHOR91
-	.word	.LANCHOR68
-	.word	.LANCHOR100
-	.word	.LANCHOR205
-	.word	.LANCHOR1
-	.word	.LANCHOR65
-	.word	.LANCHOR92
-	.word	168778952
-	.word	.LANCHOR41
-	.word	.LANCHOR83
-.L2982:
-	ldr	r3, [r5]
-	ldrh	r1, [r4, #4]
-	str	r3, [r4, #12]
-	adds	r3, r3, #1
-	str	r3, [r5]
-	movw	r4, #65535
+	.word	.LANCHOR53
+	.word	.LANCHOR38
+	.word	.LANCHOR213+14
+	.word	.LANCHOR187
+	.word	.LANCHOR165
+	.word	.LANCHOR213
+	.word	.LANCHOR105
+	.word	.LANCHOR109
+.L3069:
+	ldr	r3, .L3124
+	ldrh	r7, [r3]
+	cbnz	r7, .L3070
+	ldr	r8, .L3124+20
+	ldrh	r2, [r5]
 	ldr	r3, [r8]
-	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L2992
-	strh	r4, [r3]	@ movhi
-	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L2992+4
+	ldrh	r3, [r3, r2, lsl #1]
+	cbz	r3, .L3070
+	ldr	r4, .L3124+4
+.L3071:
+	ldr	r3, [r4]
+	cmp	r7, r3
+	bcs	.L3076
 	movs	r2, #0
-	strh	r2, [r3, #2]	@ movhi
-	ldr	r2, [r6]
-	strh	r0, [r3]	@ movhi
-	strh	r4, [r3, #4]	@ movhi
-	strh	r2, [r3, #6]	@ movhi
-	ldr	r2, [r5]
-	str	r2, [r3, #8]
-	adds	r2, r2, #1
-	str	r2, [r5]
+	add	r1, sp, #28
+	mov	r0, r7
+	bl	log2phys
+	ldr	r0, [sp, #28]
+	adds	r3, r0, #1
+	beq	.L3072
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	ldrh	r3, [r5]
+	cmp	r3, r0
+	bne	.L3072
+.L3076:
+	ldr	r3, [r4]
+	cmp	r7, r3
+	bcc	.L3070
+	ldrh	r2, [r5]
+	movs	r1, #0
+	ldr	r3, [r8]
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	ldrh	r0, [r5]
+	bl	update_vpc_list
+	bl	FtlCacheWriteBack
+	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	bl	FtlSysBlkInit
-	cbnz	r0, .L2961
-	ldr	r3, .L2992+8
-	movs	r2, #1
+.L3070:
+	movw	r3, #65535
+	strh	r3, [r5]	@ movhi
+.L3068:
+	ldr	r3, .L3124+8
+	ldrh	r0, [r3]
+	cmp	r0, #2
+	bhi	.L3077
+	ldr	r3, .L3124+12
+	ldrh	r4, [r3]
+	b	.L3078
+.L3072:
+	adds	r7, r7, #1
+	b	.L3071
+.L3077:
+	ldr	r3, .L3124+16
+	movs	r2, #0
+	adds	r0, r0, #1
 	str	r2, [r3]
-.L2961:
+	b	.L3020
+.L3079:
 	movs	r0, #0
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2993:
+	b	.L3020
+.L3082:
+	mov	r0, r3
+	b	.L3020
+.L3125:
 	.align	2
-.L2992:
-	.word	.LANCHOR93
-	.word	.LANCHOR210
-	.word	.LANCHOR232
-	.size	FtlLowFormat, .-FtlLowFormat
-	.section	.text.rk_ftl_garbage_collect,"ax",%progbits
+.L3124:
+	.word	.LANCHOR249
+	.word	.LANCHOR74
+	.word	.LANCHOR90
+	.word	.LANCHOR52
+	.word	.LANCHOR176
+	.word	.LANCHOR85
+	.size	ftl_do_gc, .-ftl_do_gc
+	.section	.text.FtlCacheWriteBack,"ax",%progbits
 	.align	1
-	.global	rk_ftl_garbage_collect
+	.global	FtlCacheWriteBack
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	rk_ftl_garbage_collect, %function
-rk_ftl_garbage_collect:
-	@ args = 0, pretend = 0, frame = 32
+	.type	FtlCacheWriteBack, %function
+FtlCacheWriteBack:
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L3093
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #32
-	ldr	r2, [r3]
-	cmp	r2, #0
-	bne	.L3053
-	ldr	r3, .L3093+4
-	ldr	r3, [r3]
-	cmp	r3, #0
-	bne	.L3053
-	ldr	r2, .L3093+8
-	ldrh	r2, [r2]
-	cmp	r2, #47
-	bls	.L3055
-	ldr	r5, .L3093+12
-	movw	r2, #65535
-	ldrh	ip, [r5]
-	cmp	ip, r2
-	beq	.L2996
-	ldr	r7, .L3093+16
-	ldrh	r3, [r7]
-	cmp	r3, r2
-	bne	.L2996
-	ldr	r1, .L3093+20
-	ldrh	r6, [r1]
-	cmp	r6, r3
-	beq	.L2996
-	ldr	r2, .L3093+24
-	ldrh	r4, [r2]
-	cmp	r4, r3
-	itttt	ne
-	strhne	ip, [r7]	@ movhi
-	strhne	r6, [r5]	@ movhi
-	strhne	r4, [r1]	@ movhi
-	strhne	r3, [r2]	@ movhi
-.L2996:
-	cmp	r0, #0
-	bne	.L3056
-	ldr	r3, .L3093+28
-	ldrh	r3, [r3]
-	cmp	r3, #24
-	bhi	.L3057
-	ldr	r2, .L3093+32
-	cmp	r3, #16
-	ldrh	r4, [r2]
-	bls	.L2999
-	lsrs	r4, r4, #5
-.L2998:
-	ldr	r2, .L3093+36
-	ldrh	r1, [r2]
-	cmp	r1, r3
-	mov	r1, r2
-	bcs	.L3002
-	ldr	r3, .L3093+40
-	movw	r0, #65535
-	ldrh	r3, [r3]
-	cmp	r3, r0
-	bne	.L3003
-	ldr	r0, .L3093+16
-	ldrh	r0, [r0]
-	cmp	r0, r3
-	bne	.L3003
-	ldr	r3, .L3093+44
-	ldrh	r0, [r3]
-	cbnz	r0, .L3004
-	ldr	r3, .L3093+48
-	ldr	r4, .L3093+52
-	ldr	r3, [r3]
-	ldr	r4, [r4]
-	add	r3, r3, r3, lsl #1
-	cmp	r4, r3, lsr #2
-	bcs	.L3005
-.L3004:
-	ldr	r3, .L3093+56
-	ldrh	r3, [r3]
-	add	r3, r3, r3, lsl #1
-	asrs	r3, r3, #2
-	strh	r3, [r1]	@ movhi
-.L3006:
-	ldr	r3, .L3093+60
-	movs	r2, #0
-	str	r2, [r3]
-.L2994:
-	add	sp, sp, #32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2999:
-	cmp	r3, #12
-	bls	.L3000
-	lsrs	r4, r4, #4
-	b	.L2998
-.L3000:
-	cmp	r3, #8
-	bls	.L2998
-	lsrs	r4, r4, #2
-	b	.L2998
-.L3057:
-	movs	r4, #1
-	b	.L2998
-.L3005:
-	movs	r3, #18
-	strh	r3, [r2]	@ movhi
-	b	.L3006
-.L3003:
-	ldr	r3, .L3093+56
-	ldrh	r3, [r3]
-	add	r3, r3, r3, lsl #1
-	asrs	r3, r3, #2
-	strh	r3, [r1]	@ movhi
-.L3002:
-	ldr	r3, .L3093+64
-	ldrh	r3, [r3]
-	cbz	r3, .L2997
-	adds	r4, r4, #32
-	uxth	r4, r4
-.L2997:
-	ldr	r5, .L3093+68
-	movw	r3, #65535
-	ldrh	r2, [r5]
-	cmp	r2, r3
-	bne	.L3009
-	ldr	r3, .L3093+16
-	ldrh	r1, [r3]
-	cmp	r1, r2
-	beq	.L3010
-	ldr	r0, .L3093+72
-	ldr	r0, [r0]
-	ldrh	r1, [r0, r1, lsl #1]
-	cbnz	r1, .L3011
-	strh	r2, [r3]	@ movhi
-.L3011:
-	ldrh	r2, [r3]
-	strh	r2, [r5]	@ movhi
-	movw	r2, #65535
-	strh	r2, [r3]	@ movhi
-.L3010:
-	ldrh	r0, [r5]
-	movw	r6, #65535
-	movs	r3, #0
-	strb	r3, [r5, #8]
-	cmp	r0, r6
-	beq	.L3009
-	bl	IsBlkInGcList
-	cbz	r0, .L3013
-	strh	r6, [r5]	@ movhi
-.L3013:
-	ldr	r3, .L3093+76
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r3, .L3168
+	ldr	r10, [r3]
+	str	r3, [sp]
+	cmp	r10, #0
+	bne	.L3128
+	ldr	r3, .L3168+4
+	ldr	r1, [r3]
+	mov	r8, r3
+	cbz	r1, .L3128
+	ldr	r3, .L3168+8
+	ldr	r4, [r3]
+	ldr	r3, .L3168+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L3014
-	ldrh	r0, [r5]
-	bl	ftl_get_blk_mode
-	strb	r0, [r5, #8]
-.L3014:
-	ldrh	r2, [r5]
-	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L3009
-	ldr	r0, .L3093+68
-	bl	make_superblock
-	ldr	r2, .L3093+80
-	movs	r3, #0
-	strh	r3, [r5, #2]	@ movhi
-	strb	r3, [r5, #6]
-	strh	r3, [r2]	@ movhi
-	ldr	r3, .L3093+72
-	ldrh	r2, [r5]
-	ldr	r3, [r3]
-	ldrh	r2, [r3, r2, lsl #1]
-	ldr	r3, .L3093+84
-	strh	r2, [r3]	@ movhi
-.L3009:
-	ldr	r2, .L3093+88
-	ldrh	r3, [r5]
-	ldrh	r2, [r2]
-	cmp	r2, r3
-	beq	.L3015
-	ldr	r2, .L3093+92
-	ldrh	r2, [r2]
-	cmp	r2, r3
-	beq	.L3015
-	ldr	r2, .L3093+40
-	ldrh	r2, [r2]
-	cmp	r2, r3
-	bne	.L3016
-.L3015:
-	movw	r3, #65535
-	strh	r3, [r5]	@ movhi
-.L3016:
-	ldr	r5, .L3093+68
-	mov	r6, r5
-.L3052:
-	ldrh	r2, [r5]
-	movw	r3, #65535
-	cmp	r2, r3
-	bne	.L3017
-	ldr	r10, .L3093+100
-	movs	r2, #0
-	ldr	r3, .L3093+60
-	mov	r7, r10
-	str	r2, [r3]
-.L3018:
-	ldrh	r8, [r10]
-	mov	r0, r8
-	bl	List_get_gc_head_node
-	uxth	fp, r0
-	movw	r3, #65535
-	cmp	fp, r3
-	strh	fp, [r6]	@ movhi
-	bne	.L3019
-	movs	r3, #0
-	movs	r0, #8
-	strh	r3, [r10]	@ movhi
-	b	.L2994
-.L3056:
-	movs	r4, #1
-	b	.L2997
-.L3019:
-	str	r0, [sp]
-	mov	r0, fp
-	bl	IsBlkInGcList
-	add	r3, r8, #1
-	ldr	r2, [sp]
-	cbz	r0, .L3020
-	strh	r3, [r10]	@ movhi
-	b	.L3018
-.L3020:
-	ldr	r1, .L3093+32
-	uxth	r3, r3
-	ldr	lr, .L3093+104
-	uxth	r2, r2
-	ldr	r8, .L3093+72
-	ldrh	r1, [r1]
-	ldrh	lr, [lr]
-	ldr	r0, [r8]
-	strh	r3, [r10]	@ movhi
-	mul	r1, lr, r1
-	ldrh	ip, [r0, r2, lsl #1]
-	cmp	ip, r1, asr #1
-	bgt	.L3022
-	cmp	r3, #48
-	bls	.L3023
-	cmp	ip, #8
-	bls	.L3023
-	ldr	r3, .L3093+96
-	ldrh	r3, [r3]
-	cmp	r3, #35
-	bhi	.L3023
-.L3022:
-	movs	r3, #0
-	strh	r3, [r7]	@ movhi
-.L3023:
-	ldrh	r3, [r0, r2, lsl #1]
-	cmp	r1, r3
-	bgt	.L3024
-	ldrh	r2, [r7]
-	cmp	r2, #3
-	bhi	.L3024
-	movw	r3, #65535
-	strh	r3, [r6]	@ movhi
+	cbz	r3, .L3153
+	ldrb	r7, [r4, #8]	@ zero_extendqisi2
+	subs	r0, r7, #1
+	rsbs	r7, r0, #0
+	adcs	r7, r7, r0
+.L3130:
+	ldr	r5, .L3168+16
+	movs	r6, #0
+	ldr	fp, .L3168+36
+	mov	r2, r7
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	ldr	r0, [r5]
+	bl	FlashProgPages
+.L3131:
+	ldr	r3, [r8]
+	cmp	r6, r3
+	bcc	.L3138
+.L3150:
 	movs	r3, #0
-	strh	r3, [r7]	@ movhi
-.L3092:
-	ldr	r3, .L3093+44
-	ldrh	r0, [r3]
-	b	.L2994
-.L3024:
+	str	r3, [r8]
+.L3128:
+	movs	r0, #0
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3153:
+	mov	r7, r10
+	b	.L3130
+.L3138:
+	movs	r3, #36
+	ldr	r2, [r5]
+	muls	r3, r6, r3
+	adds	r0, r2, r3
+	ldr	r2, [r2, r3]
+	adds	r2, r2, #1
+	bne	.L3132
+	ldr	fp, .L3168+36
+.L3133:
+	ldr	r3, [r8]
+	cmp	r10, r3
+	bcc	.L3148
+	ldr	r5, .L3168+20
+	movw	r4, #16386
+.L3151:
+	ldrh	r3, [r5]
 	cmp	r3, #0
-	bne	.L3025
-	movw	r0, #65535
-	bl	decrement_vpc_count
-	ldrh	r3, [r7]
-	adds	r3, r3, #1
-	strh	r3, [r7]	@ movhi
-	b	.L3018
-.L3094:
-	.align	2
-.L3093:
-	.word	.LANCHOR76
-	.word	.LANCHOR171
-	.word	.LANCHOR85
-	.word	.LANCHOR113
-	.word	.LANCHOR112
-	.word	.LANCHOR114
-	.word	.LANCHOR115
-	.word	.LANCHOR88
-	.word	.LANCHOR52
-	.word	.LANCHOR176
-	.word	.LANCHOR93
-	.word	.LANCHOR243
-	.word	.LANCHOR72
-	.word	.LANCHOR100
-	.word	.LANCHOR224
-	.word	.LANCHOR172
-	.word	.LANCHOR116
-	.word	.LANCHOR205
-	.word	.LANCHOR83
-	.word	.LANCHOR15
-	.word	.LANCHOR244
-	.word	.LANCHOR245
-	.word	.LANCHOR91
-	.word	.LANCHOR92
-	.word	.LANCHOR109
-	.word	.LANCHOR178
-	.word	.LANCHOR38
-.L3025:
-	movs	r3, #0
-	strb	r3, [r6, #8]
-	ldr	r3, .L3095
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L3026
-	mov	r0, fp
-	bl	ftl_get_blk_mode
-	strb	r0, [r6, #8]
-.L3026:
-	ldr	r3, .L3095+4
-	ldrh	r3, [r3]
-	cmp	r3, fp
-	bne	.L3027
-	ldr	r1, .L3095+8
-	movw	r2, #902
-	ldr	r0, .L3095+12
-	bl	printf
-	ldr	r1, .L3095+16
-	ldr	r0, .L3095+20
-	bl	printf
-.L3027:
-	ldr	r3, .L3095+24
-	ldrh	r2, [r6]
-	ldrh	r3, [r3]
-	cmp	r2, r3
-	bne	.L3028
-	ldr	r1, .L3095+8
-	movw	r2, #903
-	ldr	r0, .L3095+12
+	beq	.L3150
+	movs	r1, #1
+	mov	r0, r1
+	bl	ftl_do_gc
+	subs	r4, r4, #1
+	bne	.L3151
+	b	.L3150
+.L3132:
+	ldr	r2, [r0, #4]
+	cbnz	r7, .L3134
+.L3166:
+	str	r2, [sp, #12]
+	add	r1, sp, #12
+	movs	r2, #1
+	ldr	r0, [r0, #16]
+	str	r3, [sp, #4]
+	bl	log2phys
+	ldr	r2, [r5]
+	ldr	r3, [sp, #4]
+	add	r3, r3, r2
+	ldr	r3, [r3, #12]
+	ldr	r0, [r3, #12]
+	adds	r2, r0, #1
+	beq	.L3136
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	ldr	r2, [fp]
+	mov	r3, r0
+	ldrh	r2, [r2, r0, lsl #1]
+	cbnz	r2, .L3137
+	mov	r1, r0
+	str	r0, [sp, #4]
+	ldr	r0, .L3168+24
 	bl	printf
-	ldr	r1, .L3095+16
-	ldr	r0, .L3095+20
+	ldr	r3, [sp, #4]
+.L3137:
+	mov	r0, r3
+	bl	decrement_vpc_count
+.L3136:
+	adds	r6, r6, #1
+	b	.L3131
+.L3134:
+	orr	r2, r2, #-2147483648
+	b	.L3166
+.L3148:
+	movs	r6, #36
+	ldr	r3, [r5]
+	mul	r6, r6, r10
+	mov	r2, #-1
+	str	r2, [r3, r6]
+.L3139:
+	ldr	r2, [r5]
+	adds	r3, r2, r6
+	ldr	r2, [r2, r6]
+	ldr	r0, [r3, #4]
+	adds	r2, r2, #1
+	beq	.L3143
+	cmp	r7, #0
+	bne	.L3144
+.L3167:
+	str	r0, [sp, #12]
+	movs	r2, #1
+	ldr	r0, [r3, #16]
+	add	r1, sp, #12
+	bl	log2phys
+	ldr	r3, [r5]
+	add	r6, r6, r3
+	ldr	r3, [r6, #12]
+	ldr	r0, [r3, #12]
+	adds	r3, r0, #1
+	beq	.L3146
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	ldr	r3, [fp]
+	mov	r6, r0
+	ldrh	r2, [r3, r0, lsl #1]
+	cbnz	r2, .L3147
+	mov	r1, r0
+	ldr	r0, .L3168+24
 	bl	printf
-.L3028:
-	ldr	r3, .L3095+28
-	ldrh	r2, [r6]
+.L3147:
+	mov	r0, r6
+	bl	decrement_vpc_count
+.L3146:
+	add	r10, r10, #1
+	b	.L3133
+.L3143:
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	ldrh	r3, [r4]
+	cmp	r3, r0
+	bne	.L3140
+	ldr	r1, [fp]
+	ldrh	r0, [r4, #4]
+	ldrh	r2, [r1, r3, lsl #1]
+	subs	r2, r2, r0
+	strh	r2, [r1, r3, lsl #1]	@ movhi
+	ldr	r3, .L3168+28
 	ldrh	r3, [r3]
-	cmp	r2, r3
-	bne	.L3029
-	ldr	r1, .L3095+8
-	mov	r2, #904
-	ldr	r0, .L3095+12
-	bl	printf
-	ldr	r1, .L3095+16
-	ldr	r0, .L3095+20
-	bl	printf
-.L3029:
-	mov	r0, r5
-	bl	make_superblock
-	ldr	r2, .L3095+32
+	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
-	ldrh	r1, [r6]
-	strh	r3, [r2]	@ movhi
-	ldr	r2, [r8]
-	ldrh	r1, [r2, r1, lsl #1]
-	ldr	r2, .L3095+36
-	strh	r3, [r6, #2]	@ movhi
-	strb	r3, [r6, #6]
-	strh	r1, [r2]	@ movhi
-.L3017:
-	ldr	r3, .L3095+40
-	movs	r2, #1
-	str	r2, [r3]
-	ldr	r3, .L3095+44
-	ldrh	r3, [r3]
-	str	r3, [sp, #4]
-	ldr	r3, .L3095
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L3030
-	ldrb	r3, [r6, #8]	@ zero_extendqisi2
+	strb	r3, [r4, #6]
+	strh	r3, [r4, #4]	@ movhi
+.L3140:
+	ldrh	r3, [r4, #4]
+	cbnz	r3, .L3141
+	mov	r0, r4
+	bl	allocate_new_data_superblock
+.L3141:
+	ldr	r2, .L3168+32
+	ldr	r3, [r2, #96]
+	adds	r3, r3, #1
+	str	r3, [r2, #96]
+	ldr	r3, [r5]
+	add	r3, r3, r6
+	ldr	r0, [r3, #4]
+	ubfx	r0, r0, #10, #16
+	bl	FtlGcMarkBadPhyBlk
+	mov	r0, r4
+	bl	get_new_active_ppa
+	ldr	r3, [r5]
+	mov	r2, r0
+	str	r0, [sp, #12]
+	movs	r1, #1
+	adds	r0, r3, r6
+	str	r2, [r0, #4]
+	mov	r2, r7
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	bl	FlashProgPages
+	ldr	r3, [r5]
+	ldr	r3, [r3, r6]
+	adds	r3, r3, #1
+	ittt	eq
+	ldreq	r2, [sp]
+	moveq	r3, #1
+	streq	r3, [r2]
+	ldr	r3, [sp]
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L3139
+	b	.L3128
+.L3144:
+	orr	r0, r0, #-2147483648
+	b	.L3167
+.L3169:
+	.align	2
+.L3168:
+	.word	.LANCHOR78
+	.word	.LANCHOR72
+	.word	.LANCHOR252
+	.word	.LANCHOR16
+	.word	.LANCHOR73
+	.word	.LANCHOR119
+	.word	.LC76
+	.word	.LANCHOR52
+	.word	.LANCHOR141
+	.word	.LANCHOR85
+	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
+	.section	.text.FtlSysFlush,"ax",%progbits
+	.align	1
+	.global	FtlSysFlush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlSysFlush, %function
+FtlSysFlush:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L3172
+	push	{r4, lr}
+	ldr	r3, [r3]
+	cbnz	r3, .L3171
+	ldr	r3, .L3172+4
+	ldr	r4, [r3]
+	cmp	r4, #1
+	bne	.L3171
+	bl	FtlCacheWriteBack
+	bl	l2p_flush
+	mov	r0, r4
+	bl	FtlEctTblFlush
+	bl	FtlVpcTblFlush
+.L3171:
+	movs	r0, #0
+	pop	{r4, pc}
+.L3173:
+	.align	2
+.L3172:
+	.word	.LANCHOR78
+	.word	.LANCHOR247
+	.size	FtlSysFlush, .-FtlSysFlush
+	.section	.text.FtlDeInit,"ax",%progbits
+	.align	1
+	.global	FtlDeInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlDeInit, %function
+FtlDeInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	ldr	r3, .L3176
+	ldr	r3, [r3]
+	cmp	r3, #1
+	bne	.L3175
+	bl	FtlSysFlush
+.L3175:
+	movs	r0, #0
+	pop	{r3, pc}
+.L3177:
+	.align	2
+.L3176:
+	.word	.LANCHOR247
+	.size	FtlDeInit, .-FtlDeInit
+	.section	.text.ftl_deinit,"ax",%progbits
+	.align	1
+	.global	ftl_deinit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_deinit, %function
+ftl_deinit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	bl	ftl_flash_de_init
+	bl	FtlDeInit
+	pop	{r3, lr}
+	b	ftl_flash_de_init
+	.size	ftl_deinit, .-ftl_deinit
+	.section	.text.rk_ftl_de_init,"ax",%progbits
+	.align	1
+	.global	rk_ftl_de_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_ftl_de_init, %function
+rk_ftl_de_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	bl	FlashDeInit
+	bl	FtlDeInit
+	pop	{r3, lr}
+	b	FlashDeInit
+	.size	rk_ftl_de_init, .-rk_ftl_de_init
+	.section	.text.ftl_cache_flush,"ax",%progbits
+	.align	1
+	.global	ftl_cache_flush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_cache_flush, %function
+ftl_cache_flush:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	FtlCacheWriteBack
+	.size	ftl_cache_flush, .-ftl_cache_flush
+	.section	.text.ftl_discard,"ax",%progbits
+	.align	1
+	.global	ftl_discard
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_discard, %function
+ftl_discard:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L3198
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	mov	r6, r1
+	mov	r4, r2
+	ldr	r3, [r3]
+	cmp	r3, r1
+	bls	.L3191
 	cmp	r3, r2
-	ittt	eq
-	ldreq	r3, .L3095+48
-	ldrheq	r3, [r3]
-	streq	r3, [sp, #4]
-.L3030:
-	ldrh	r3, [r6, #2]
-	ldr	r1, [sp, #4]
-	ldr	fp, .L3095+76
-	adds	r2, r3, r4
-	cmp	r2, r1
-	itt	gt
-	movgt	r2, r1
-	subgt	r4, r2, r3
-	mov	r3, #0
-	it	gt
-	uxthgt	r4, r4
-	str	r3, [sp, #12]
-.L3032:
-	ldrh	r3, [sp, #12]
+	bcc	.L3191
+	adds	r2, r1, r2
+	cmp	r3, r2
+	bcc	.L3191
+	cmp	r4, #31
+	bhi	.L3183
+.L3184:
+	movs	r0, #0
+.L3181:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L3183:
+	ldr	r3, .L3198+4
+	ldr	r3, [r3]
+	cmp	r3, #0
+	bne	.L3184
+	ldr	r8, .L3198+16
+	bl	FtlCacheWriteBack
+	mov	r0, r6
+	ldrh	r5, [r8]
+	mov	r1, r5
+	bl	__aeabi_uidiv
+	smulbb	r3, r0, r5
+	mov	r7, r0
+	subs	r6, r6, r3
+	uxth	r6, r6
+	cbz	r6, .L3185
+	subs	r5, r5, r6
+	adds	r7, r7, #1
+	cmp	r5, r4
+	it	cs
+	movcs	r5, r4
+	uxth	r5, r5
+	subs	r4, r4, r5
+.L3185:
+	ldr	r5, .L3198+8
+	mov	r3, #-1
+	ldr	r6, .L3198+12
+	str	r3, [sp, #4]
+.L3186:
+	ldrh	r3, [r8]
 	cmp	r4, r3
-	bls	.L3040
-	ldr	r3, .L3095+52
-	movw	r8, #65535
-	ldrh	lr, [r5, #2]
-	mov	r10, #36
-	ldr	r0, [fp]
-	ldrh	r7, [r3]
-	ldr	r3, [sp, #12]
-	add	lr, lr, r3
-	ldr	r3, .L3095+56
-	str	r3, [sp, #8]
-	movs	r3, #0
-	str	r3, [sp]
-	b	.L3041
-.L3034:
-	ldr	r1, [sp, #8]
-	ldrh	r2, [r1, #2]!
-	cmp	r2, r8
-	str	r1, [sp, #8]
-	beq	.L3033
-	ldr	r1, [sp]
-	orr	r2, lr, r2, lsl #10
-	mla	ip, r10, r1, r0
-	str	r2, [ip, #4]
-	mov	r2, r1
-	adds	r2, r2, #1
-	uxth	r2, r2
-	str	r2, [sp]
-.L3033:
+	bcs	.L3188
+	ldr	r3, .L3198+8
+	ldr	r2, [r3]
+	cmp	r2, #32
+	bls	.L3184
+	movs	r4, #0
+	str	r4, [r3]
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	b	.L3184
+.L3188:
+	movs	r2, #0
+	mov	r1, sp
+	mov	r0, r7
+	bl	log2phys
+	ldr	r3, [sp]
 	adds	r3, r3, #1
-.L3041:
-	uxth	r2, r3
-	cmp	r7, r2
-	bhi	.L3034
-	ldrb	r2, [r5, #8]	@ zero_extendqisi2
-	ldr	r1, [sp]
-	bl	FlashReadPages
-	movs	r3, #0
-.L3091:
-	str	r3, [sp, #8]
-	ldr	r2, [sp]
-	ldrh	r3, [sp, #8]
-	cmp	r2, r3
-	bhi	.L3039
-	ldr	r3, [sp, #12]
+	beq	.L3187
+	ldr	r3, [r5]
+	movs	r2, #1
+	add	r1, sp, #4
+	mov	r0, r7
 	adds	r3, r3, #1
-	str	r3, [sp, #12]
-	b	.L3032
-.L3039:
-	ldr	r3, [sp, #8]
-	movs	r7, #36
-	muls	r7, r3, r7
-	ldr	r3, [fp]
-	adds	r2, r3, r7
-	ldr	r3, [r3, r7]
+	str	r3, [r5]
+	ldr	r3, [r6]
 	adds	r3, r3, #1
-	beq	.L3036
-	ldr	r8, [r2, #12]
-	movw	r3, #61589
-	ldrh	r2, [r8]
+	str	r3, [r6]
+	bl	log2phys
+	ldr	r0, [sp]
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	bl	decrement_vpc_count
+.L3187:
+	ldrh	r3, [r8]
+	adds	r7, r7, #1
+	subs	r4, r4, r3
+	b	.L3186
+.L3191:
+	mov	r0, #-1
+	b	.L3181
+.L3199:
+	.align	2
+.L3198:
+	.word	.LANCHOR68
+	.word	.LANCHOR78
+	.word	.LANCHOR253
+	.word	.LANCHOR168
+	.word	.LANCHOR55
+	.size	ftl_discard, .-ftl_discard
+	.section	.text.FtlRead,"ax",%progbits
+	.align	1
+	.global	FtlRead
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlRead, %function
+FtlRead:
+	@ args = 0, pretend = 0, frame = 64
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #88
+	str	r3, [sp, #24]
+	mov	r4, r1
+	ldr	r3, .L3245
+	str	r2, [sp, #44]
+	ldr	r3, [r3]
+	cmp	r3, #1
+	bne	.L3227
+	cmp	r0, #16
+	bne	.L3202
+	ldr	r2, [sp, #24]
+	add	r0, r4, #256
+	ldr	r1, [sp, #44]
+	bl	FtlVendorPartRead
+	mov	r7, r0
+.L3200:
+	mov	r0, r7
+	add	sp, sp, #88
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3202:
+	ldr	r3, .L3245+4
+	ldr	r3, [r3]
+	cmp	r1, r3
+	bcs	.L3227
+	ldr	r2, [sp, #44]
 	cmp	r2, r3
-	bne	.L3036
-	ldr	r10, [r8, #8]
-	cmp	r10, #-1
-	bne	.L3037
-	ldr	r1, .L3095+8
-	movw	r2, #943
-	ldr	r0, .L3095+12
-	bl	printf
-	ldr	r1, .L3095+16
-	ldr	r0, .L3095+20
-	bl	printf
-.L3037:
-	movs	r2, #0
-	add	r1, sp, #24
-	mov	r0, r10
+	bhi	.L3227
+	adds	r2, r1, r2
+	cmp	r3, r2
+	str	r2, [sp, #48]
+	bcc	.L3227
+	ldr	r3, .L3245+8
+	mov	r0, r4
+	ldrh	r5, [r3]
+	mov	r1, r5
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #48]
+	mov	r1, r5
+	str	r0, [sp, #36]
+	subs	r0, r3, #1
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #36]
+	ldr	r2, .L3245+12
+	ldr	r1, [sp, #44]
+	rsb	r3, r3, #1
+	str	r0, [sp, #40]
+	add	r3, r3, r0
+	str	r3, [sp, #32]
+	ldr	r3, [r2]
+	add	r3, r3, r1
+	ldr	r1, [sp, #32]
+	str	r3, [r2]
+	ldr	r2, .L3245+16
+	ldr	r3, [r2]
+	add	r3, r3, r1
+	mov	r1, r0
+	ldr	r0, [sp, #36]
+	str	r3, [r2]
+	bl	FtlCacheMetchLpa
+	cbz	r0, .L3203
+	bl	FtlCacheWriteBack
+.L3203:
+	ldr	r5, [sp, #36]
+	movs	r3, #0
+	ldr	r10, .L3245+60
+	mov	r6, r3
+	mov	r7, r3
+	str	r3, [sp, #28]
+	str	r3, [sp, #52]
+.L3204:
+	ldr	r3, [sp, #32]
+	cbnz	r3, .L3223
+	ldr	r3, .L3245+20
+	ldrh	r3, [r3]
+	cmp	r3, #0
+	beq	.L3200
+	movs	r1, #1
+	ldr	r0, [sp, #32]
+	bl	ftl_do_gc
+	b	.L3200
+.L3223:
+	movs	r2, #0
+	add	r1, sp, #84
+	mov	r0, r5
 	bl	log2phys
-	ldr	r0, [fp]
-	ldr	r3, [sp, #24]
-	add	r0, r0, r7
-	ldr	r2, [r0, #4]
-	bic	r3, r3, #-2147483648
-	cmp	r3, r2
-	bne	.L3036
-	ldr	r2, .L3095+32
-	ldr	r1, .L3095+60
-	ldr	r10, .L3095+72
-	ldrh	r3, [r2]
-	str	r1, [sp, #20]
-	adds	r3, r3, #1
-	strh	r3, [r2]	@ movhi
-	ldr	r2, [r1]
-	movs	r1, #36
-	ldr	r3, [r10]
-	mla	r3, r1, r3, r2
-	ldr	r2, [r0, #16]
-	str	r2, [r3, #16]
-	str	r3, [sp, #16]
-	bl	Ftl_get_new_temp_ppa
-	ldr	r3, [sp, #16]
-	ldr	r1, [sp, #20]
-	str	r0, [r3, #4]
-	ldr	r2, [r1]
-	movs	r1, #36
+	ldr	r3, [sp, #84]
+	adds	r2, r3, #1
+	bne	.L3205
+	ldr	fp, .L3245+8
+	mov	r8, #0
+.L3206:
+	ldrh	r0, [fp]
+	cmp	r8, r0
+	bcc	.L3208
+.L3209:
+	ldr	r3, [sp, #32]
+	adds	r5, r5, #1
+	subs	r3, r3, #1
+	str	r3, [sp, #32]
+	beq	.L3213
+	ldr	r3, .L3245+24
+	ldrh	r3, [r3]
+	cmp	r6, r3, lsl #2
+	bne	.L3204
+.L3213:
+	cmp	r6, #0
+	beq	.L3204
+	movs	r2, #0
+	mov	r1, r6
+	ldr	r0, [r10]
+	mov	fp, #0
+	bl	FlashReadPages
+	ldr	r3, [sp, #28]
+	lsls	r3, r3, #9
+	str	r3, [sp, #68]
+	ldr	r3, [sp, #56]
+	lsls	r3, r3, #9
+	str	r3, [sp, #60]
+	ldr	r3, [sp, #52]
+	lsls	r3, r3, #9
+	str	r3, [sp, #64]
+.L3222:
+	mov	r8, #36
 	ldr	r3, [r10]
-	ldr	r0, [fp]
-	mla	r2, r1, r3, r2
-	add	r0, r0, r7
-	ldr	r7, .L3095+28
-	ldr	r1, [r0, #8]
-	adds	r3, r3, #1
-	str	r1, [r2, #8]
-	ldr	r1, [r0, #12]
-	str	r1, [r2, #12]
-	movs	r1, #1
-	ldr	r2, [sp, #24]
-	str	r2, [r8, #12]
-	ldrh	r2, [r7]
-	strh	r2, [r8, #2]	@ movhi
-	ldr	r2, .L3095+64
-	str	r3, [r10]
-	ldr	r2, [r2]
-	str	r2, [r8, #4]
-	bl	FtlGcBufAlloc
-	ldr	r3, .L3095
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L3038
-	ldrb	r2, [r7, #7]	@ zero_extendqisi2
+	mul	r8, r8, fp
+	ldr	r1, [sp, #36]
+	add	r3, r3, r8
+	ldr	r2, [r3, #16]
+	cmp	r1, r2
+	bne	.L3215
+	ldr	r1, [r3, #8]
+	ldr	r3, .L3245+28
+	ldr	r3, [r3]
+	cmp	r1, r3
+	bne	.L3216
+	ldr	r3, [sp, #60]
+	ldr	r2, [sp, #64]
+	ldr	r0, [sp, #24]
+	add	r1, r1, r3
+.L3244:
+	bl	ftl_memcpy
+.L3216:
 	ldr	r3, [r10]
-	cmp	r2, r3
-	beq	.L3038
-	ldrh	r3, [r7, #4]
-	cbnz	r3, .L3036
-.L3038:
-	bl	Ftl_gc_temp_data_write_back
-	cbz	r0, .L3036
-	ldr	r3, .L3095+40
-	movs	r2, #0
-	movw	r1, #65535
-	str	r2, [r3]
-	ldr	r3, .L3095+68
-	strh	r1, [r3]	@ movhi
-	strh	r2, [r3, #2]	@ movhi
-	b	.L3092
-.L3036:
-	ldr	r3, [sp, #8]
+	ldr	r1, [r3, r8]
+	add	r2, r3, r8
+	adds	r3, r1, #1
+	bne	.L3217
+	ldr	r0, .L3245+32
+	mov	r7, r1
+	ldr	r3, [r0, #72]
 	adds	r3, r3, #1
-	b	.L3091
-.L3040:
-	ldrh	r3, [r5, #2]
-	add	r4, r4, r3
-	ldr	r3, [sp, #4]
-	uxth	r4, r4
-	cmp	r3, r4
-	strh	r4, [r5, #2]	@ movhi
-	bhi	.L3042
-	ldr	r3, .L3095+72
+	str	r3, [r0, #72]
+.L3217:
+	ldr	r3, [r2, #12]
+	ldr	lr, [r2, #16]
+	ldr	r0, [r3, #8]
+	cmp	lr, r0
+	beq	.L3218
+	ldr	ip, .L3245+32
+	ldr	r0, [ip, #72]
+	adds	r0, r0, #1
+	str	r0, [ip, #72]
+	ldr	r0, [r2, #8]
+	ldr	r1, [r0, #4]
+	str	r1, [sp, #16]
+	mov	r1, lr
+	ldr	r0, [r0]
+	str	r0, [sp, #12]
+	ldr	r0, [r3, #12]
+	str	r0, [sp, #8]
+	ldr	r0, [r3, #8]
+	str	r0, [sp, #4]
+	ldr	r0, [r3, #4]
+	str	r0, [sp]
+	ldr	r0, .L3245+36
 	ldr	r3, [r3]
-	cbz	r3, .L3043
-	bl	Ftl_gc_temp_data_write_back
-	cbz	r0, .L3043
-	ldr	r3, .L3095+40
-	movs	r2, #0
-	str	r2, [r3]
-	b	.L3092
-.L3096:
-	.align	2
-.L3095:
-	.word	.LANCHOR15
-	.word	.LANCHOR91
-	.word	.LANCHOR246
-	.word	.LC5
-	.word	.LC6
-	.word	.LC7
-	.word	.LANCHOR92
-	.word	.LANCHOR93
-	.word	.LANCHOR244
-	.word	.LANCHOR245
-	.word	.LANCHOR171
-	.word	.LANCHOR52
-	.word	.LANCHOR53
-	.word	.LANCHOR38
-	.word	.LANCHOR205+14
-	.word	.LANCHOR181
-	.word	.LANCHOR160
-	.word	.LANCHOR205
-	.word	.LANCHOR102
-	.word	.LANCHOR106
-.L3043:
-	ldr	r3, .L3097
-	ldrh	r7, [r3]
-	cbnz	r7, .L3044
-	ldr	r8, .L3097+20
-	ldrh	r2, [r5]
-	ldr	r3, [r8]
-	ldrh	r3, [r3, r2, lsl #1]
-	cbz	r3, .L3044
-	ldr	r4, .L3097+4
-.L3045:
-	ldr	r3, [r4]
-	cmp	r7, r3
-	bcs	.L3050
-	movs	r2, #0
-	add	r1, sp, #28
-	mov	r0, r7
-	bl	log2phys
-	ldr	r0, [sp, #28]
-	adds	r3, r0, #1
-	beq	.L3046
+	ldr	r2, [r2, #4]
+	bl	printf
+.L3218:
+	ldr	r3, [r10]
+	add	r2, r3, r8
+	ldr	r3, [r3, r8]
+	cmp	r3, #256
+	bne	.L3219
+	ldr	r0, [r2, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-	ldrh	r3, [r5]
+	mov	r8, r0
+	bl	FtlGcRefreshBlock
+	ldr	r2, .L3245+40
+	ldr	r3, .L3245+44
+.L3221:
+	movs	r1, #1
+	str	r2, [sp, #72]
+	mov	r0, r1
+	str	r3, [sp, #76]
+	bl	ftl_do_gc
+	ldr	r2, [sp, #72]
+	ldr	r1, [r2]
+	cbnz	r1, .L3220
+	ldr	r3, [sp, #76]
+	ldrh	r1, [r3]
+	cmp	r1, r8
+	beq	.L3221
+.L3220:
+	bl	FtlSysFlush
+.L3219:
+	add	fp, fp, #1
+	cmp	r6, fp
+	bne	.L3222
+	movs	r6, #0
+	b	.L3204
+.L3208:
+	mla	r0, r0, r5, r8
+	cmp	r4, r0
+	bhi	.L3207
+	ldr	r3, [sp, #48]
 	cmp	r3, r0
-	bne	.L3046
-.L3050:
-	ldr	r3, [r4]
-	cmp	r7, r3
-	bcc	.L3044
-	ldrh	r2, [r5]
+	bls	.L3207
+	ldr	r3, [sp, #24]
+	subs	r0, r0, r4
+	mov	r2, #512
 	movs	r1, #0
-	ldr	r3, [r8]
-	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldrh	r0, [r5]
-	bl	update_vpc_list
-	bl	FtlCacheWriteBack
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
-.L3044:
-	movw	r3, #65535
-	strh	r3, [r5]	@ movhi
-.L3042:
-	ldr	r3, .L3097+8
+	add	r0, r3, r0, lsl #9
+	bl	ftl_memset
+.L3207:
+	add	r8, r8, #1
+	b	.L3206
+.L3205:
+	ldr	r2, [r10]
+	mov	r8, #36
+	mla	r8, r8, r6, r2
+	str	r3, [r8, #4]
+	ldr	r3, [sp, #36]
+	cmp	r5, r3
+	ldr	r3, .L3245+8
+	bne	.L3210
+	ldr	r2, .L3245+28
+	mov	r0, r4
+	ldrh	fp, [r3]
+	ldr	r2, [r2]
+	mov	r1, fp
+	str	r2, [r8, #8]
+	bl	__aeabi_uidivmod
+	ldr	r2, [sp, #44]
+	sub	r3, fp, r1
+	str	r1, [sp, #56]
+	cmp	r3, r2
+	it	cs
+	movcs	r3, r2
+	cmp	r3, fp
+	str	r3, [sp, #52]
+	bne	.L3211
+	ldr	r3, [sp, #24]
+.L3242:
+	str	r3, [r8, #8]
+.L3211:
+	ldr	r3, .L3245+48
+	ldr	r2, .L3245+52
+	str	r5, [r8, #16]
+	ldrh	r3, [r3]
+	ldr	r2, [r2]
+	muls	r3, r6, r3
+	adds	r6, r6, #1
+	bic	r3, r3, #3
+	add	r3, r3, r2
+	str	r3, [r8, #12]
+	b	.L3209
+.L3210:
+	ldr	r2, [sp, #40]
+	cmp	r5, r2
+	bne	.L3212
+	ldr	r2, .L3245+56
+	ldr	r1, [sp, #48]
+	ldr	r2, [r2]
+	str	r2, [r8, #8]
+	ldrh	r2, [r3]
+	mul	r3, r2, r5
+	subs	r1, r1, r3
+	cmp	r2, r1
+	str	r1, [sp, #28]
+	bne	.L3211
+.L3243:
+	ldr	r2, [sp, #24]
+	subs	r3, r3, r4
+	add	r3, r2, r3, lsl #9
+	b	.L3242
+.L3212:
+	ldrh	r3, [r3]
+	muls	r3, r5, r3
+	b	.L3243
+.L3215:
+	ldr	r1, [sp, #40]
+	cmp	r1, r2
+	bne	.L3216
+	ldr	r1, [r3, #8]
+	ldr	r3, .L3245+56
+	ldr	r3, [r3]
+	cmp	r1, r3
+	bne	.L3216
+	ldr	r3, .L3245+8
+	ldr	r2, [sp, #68]
 	ldrh	r0, [r3]
-	cmp	r0, #2
-	bhi	.L3051
-	ldr	r3, .L3097+12
-	ldrh	r4, [r3]
-	b	.L3052
-.L3046:
-	adds	r7, r7, #1
-	b	.L3045
-.L3051:
-	ldr	r3, .L3097+16
-	movs	r2, #0
-	adds	r0, r0, #1
-	str	r2, [r3]
-	b	.L2994
-.L3053:
-	movs	r0, #0
-	b	.L2994
-.L3055:
-	mov	r0, r3
-	b	.L2994
-.L3098:
+	ldr	r3, [sp, #40]
+	muls	r0, r3, r0
+	ldr	r3, [sp, #24]
+	subs	r0, r0, r4
+	add	r0, r3, r0, lsl #9
+	b	.L3244
+.L3227:
+	mov	r7, #-1
+	b	.L3200
+.L3246:
 	.align	2
-.L3097:
-	.word	.LANCHOR244
-	.word	.LANCHOR72
-	.word	.LANCHOR88
-	.word	.LANCHOR52
+.L3245:
+	.word	.LANCHOR247
+	.word	.LANCHOR68
+	.word	.LANCHOR55
+	.word	.LANCHOR226
 	.word	.LANCHOR171
-	.word	.LANCHOR83
-	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
+	.word	.LANCHOR119
+	.word	.LANCHOR38
+	.word	.LANCHOR193
+	.word	.LANCHOR141
+	.word	.LC68
+	.word	.LANCHOR78
+	.word	.LANCHOR213
+	.word	.LANCHOR58
+	.word	.LANCHOR196
+	.word	.LANCHOR194
+	.word	.LANCHOR186
+	.size	FtlRead, .-FtlRead
+	.section	.text.ftl_vendor_read,"ax",%progbits
+	.align	1
+	.global	ftl_vendor_read
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_vendor_read, %function
+ftl_vendor_read:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r3, r2
+	mov	r2, r1
+	mov	r1, r0
+	movs	r0, #16
+	b	FtlRead
+	.size	ftl_vendor_read, .-ftl_vendor_read
+	.section	.text.ftl_sys_read,"ax",%progbits
+	.align	1
+	.global	ftl_sys_read
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_sys_read, %function
+ftl_sys_read:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r3, r2
+	mov	r2, r1
+	add	r1, r0, #256
+	movs	r0, #16
+	b	FtlRead
+	.size	ftl_sys_read, .-ftl_sys_read
+	.section	.text.StorageSysDataLoad,"ax",%progbits
+	.align	1
+	.global	StorageSysDataLoad
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	StorageSysDataLoad, %function
+StorageSysDataLoad:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	mov	r4, r1
+	mov	r5, r0
+	mov	r2, #512
+	movs	r1, #0
+	mov	r0, r4
+	bl	memset
+	mov	r3, r4
+	add	r1, r5, #256
+	movs	r2, #1
+	movs	r0, #16
+	pop	{r4, r5, r6, lr}
+	b	FtlRead
+	.size	StorageSysDataLoad, .-StorageSysDataLoad
+	.section	.text.FlashBootVendorRead,"ax",%progbits
+	.align	1
+	.global	FlashBootVendorRead
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashBootVendorRead, %function
+FlashBootVendorRead:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r3, r2
+	mov	r1, r0
+	movs	r2, #1
+	movs	r0, #16
+	b	FtlRead
+	.size	FlashBootVendorRead, .-FlashBootVendorRead
+	.section	.text.ftl_read,"ax",%progbits
+	.align	1
+	.global	ftl_read
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_read, %function
+ftl_read:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	FtlRead
+	.size	ftl_read, .-ftl_read
 	.section	.text.FtlInit,"ax",%progbits
 	.align	1
 	.global	FtlInit
@@ -21537,89 +22437,92 @@ FtlInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	mov	r3, #-1
-	ldr	r5, .L3109
-	mov	r4, r0
-	ldr	r2, .L3109+4
+	ldr	r5, .L3262
+	ldr	r2, .L3262+4
 	str	r3, [r5]
 	movs	r3, #0
-	ldr	r1, .L3109+8
+	ldr	r1, .L3262+8
 	str	r3, [r2]
-	ldr	r2, .L3109+12
-	ldr	r0, .L3109+16
+	ldr	r2, .L3262+12
+	ldr	r0, .L3262+16
 	str	r3, [r2]
 	bl	printf
-	mov	r0, r4
+	ldr	r0, .L3262+20
 	bl	FtlConstantsInit
 	bl	FtlMemInit
 	bl	FtlVariablesInit
-	ldr	r3, .L3109+20
+	ldr	r3, .L3262+24
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	r0, .L3100
-	ldr	r1, .L3109+24
-	ldr	r0, .L3109+28
-.L3108:
+	cbz	r0, .L3253
+	ldr	r1, .L3262+28
+	ldr	r0, .L3262+32
+.L3261:
 	bl	printf
-.L3101:
+.L3254:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, pc}
-.L3100:
+.L3253:
 	bl	FtlSysBlkInit
 	mov	r4, r0
-	cbz	r0, .L3102
-	ldr	r1, .L3109+24
-	ldr	r0, .L3109+32
-	b	.L3108
-.L3102:
+	cbz	r0, .L3255
+	ldr	r1, .L3262+28
+	ldr	r0, .L3262+36
+	b	.L3261
+.L3255:
 	movs	r1, #1
 	str	r1, [r5]
-	ldr	r5, .L3109+36
-	bl	rk_ftl_garbage_collect
+	ldr	r5, .L3262+40
+	bl	ftl_do_gc
 	ldrh	r6, [r5]
 	cmp	r6, #15
-	bhi	.L3101
-	ldr	r7, .L3109+40
-	ldr	r8, .L3109+44
-.L3106:
+	bhi	.L3254
+	ldr	r7, .L3262+44
+	ldr	r8, .L3262+48
+.L3259:
 	ldrh	r3, [r7]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L3104
+	bne	.L3257
 	ldrh	r2, [r8]
 	cmp	r2, r3
-	bne	.L3104
-	and	r0, r4, #7
+	bne	.L3257
+	and	r0, r4, #63
 	bl	List_get_gc_head_node
 	uxth	r0, r0
 	bl	FtlGcRefreshBlock
-.L3104:
+.L3257:
 	movs	r1, #1
 	mov	r0, r1
-	bl	rk_ftl_garbage_collect
+	bl	ftl_do_gc
+	movs	r1, #1
+	movs	r0, #0
+	bl	ftl_do_gc
 	ldrh	r2, [r5]
 	adds	r3, r6, #2
 	cmp	r2, r3
-	bhi	.L3101
+	bhi	.L3254
 	adds	r4, r4, #1
-	cmp	r4, #1024
-	bne	.L3106
-	b	.L3101
-.L3110:
+	cmp	r4, #4096
+	bne	.L3259
+	b	.L3254
+.L3263:
 	.align	2
-.L3109:
-	.word	.LANCHOR232
+.L3262:
 	.word	.LANCHOR247
-	.word	.LC72
-	.word	.LANCHOR76
+	.word	.LANCHOR254
+	.word	.LC77
+	.word	.LANCHOR78
 	.word	.LC7
+	.word	.LANCHOR15
 	.word	.LANCHOR39
-	.word	.LANCHOR248
-	.word	.LC73
-	.word	.LC74
-	.word	.LANCHOR88
-	.word	.LANCHOR205
-	.word	.LANCHOR112
+	.word	.LANCHOR255
+	.word	.LC78
+	.word	.LC79
+	.word	.LANCHOR90
+	.word	.LANCHOR213
+	.word	.LANCHOR115
 	.size	FtlInit, .-FtlInit
 	.section	.text.rk_ftl_init,"ax",%progbits
 	.align	1
@@ -21635,473 +22538,141 @@ rk_ftl_init:
 	push	{r4, lr}
 	bl	FlashInit
 	mov	r4, r0
-	cbnz	r0, .L3112
-	ldr	r0, .L3113
+	cbnz	r0, .L3265
 	bl	FtlInit
-.L3112:
+.L3265:
 	bl	idb_init
 	mov	r1, r4
-	ldr	r0, .L3113+4
-	bl	printf
-	mov	r0, r4
-	pop	{r4, pc}
-.L3114:
-	.align	2
-.L3113:
-	.word	.LANCHOR14
-	.word	.LC75
-	.size	rk_ftl_init, .-rk_ftl_init
-	.section	.text.ftl_fix_nand_power_lost_error,"ax",%progbits
-	.align	1
-	.global	ftl_fix_nand_power_lost_error
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_fix_nand_power_lost_error, %function
-ftl_fix_nand_power_lost_error:
-	@ args = 0, pretend = 0, frame = 56
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L3129
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #56
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #0
-	beq	.L3115
-	ldr	r7, .L3129+4
-	ldr	r6, .L3129+8
-	ldr	r10, .L3129+32
-	ldrh	r5, [r7]
-	ldr	r3, [r6]
-	ldr	r4, .L3129+12
-	mov	r1, r5
-	ldr	r0, .L3129+16
-	ldrh	r2, [r3, r5, lsl #1]
-	lsl	r8, r5, #1
-	bl	printf
-	ldrh	r0, [r10]
-	bl	FtlGcRefreshOpenBlock
-	ldrh	r0, [r4]
-	bl	FtlGcRefreshOpenBlock
-	mov	r0, r10
-	bl	allocate_new_data_superblock
-	mov	r0, r4
-	movw	r4, #4097
-	bl	allocate_new_data_superblock
-	str	r7, [sp, #4]
-.L3117:
-	subs	r4, r4, #1
-	beq	.L3121
-	movs	r1, #1
-	mov	r0, r1
-	bl	rk_ftl_garbage_collect
-	ldr	r3, [r6]
-	ldrh	r3, [r3, r8]
-	cmp	r3, #0
-	bne	.L3117
-.L3121:
-	ldr	r3, [r6]
-	mov	r1, r5
-	ldr	r0, .L3129+16
-	ldrh	r2, [r3, r5, lsl #1]
-	bl	printf
-	ldr	r3, [r6]
-	ldrh	r4, [r3, r5, lsl #1]
-	cbnz	r4, .L3119
-	add	r0, sp, #56
-	ldr	r7, .L3129+20
-	strh	r5, [r0, #-48]!	@ movhi
-	movw	r10, #65535
-	bl	make_superblock
-	ldr	r3, .L3129+24
-	add	r0, sp, #22
-	ldr	r8, [r7]
-	mov	r2, r4
-	mov	fp, #36
-	mov	ip, r4
-	ldrh	lr, [r3]
-.L3122:
-	uxth	r3, r2
-	cmp	lr, r3
-	bhi	.L3124
-	ldr	r3, [r6]
-	mov	r1, r5
-	ldr	r0, .L3129+28
-	ldrh	r2, [r3, r5, lsl #1]
-	bl	printf
-	mov	r2, r4
-	movs	r1, #0
-	ldr	r0, [r7]
-	bl	FlashEraseBlocks
-	mov	r2, r4
-	movs	r1, #1
-	ldr	r0, [r7]
-	bl	FlashEraseBlocks
-.L3119:
-	ldr	r2, [sp, #4]
-	movw	r3, #65535
-	strh	r3, [r2]	@ movhi
-.L3115:
-	add	sp, sp, #56
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3124:
-	ldrh	r3, [r0, #2]!
-	cmp	r3, r10
-	beq	.L3123
-	mla	r1, fp, r4, r8
-	adds	r4, r4, #1
-	lsls	r3, r3, #10
-	uxth	r4, r4
-	str	r3, [r1, #4]
-	str	ip, [r1, #8]
-	str	ip, [r1, #12]
-.L3123:
-	adds	r2, r2, #1
-	b	.L3122
-.L3130:
+	ldr	r0, .L3266
+	bl	printf
+	mov	r0, r4
+	pop	{r4, pc}
+.L3267:
 	.align	2
-.L3129:
-	.word	.LANCHOR15
-	.word	.LANCHOR237
-	.word	.LANCHOR83
-	.word	.LANCHOR92
-	.word	.LC76
-	.word	.LANCHOR77
-	.word	.LANCHOR38
-	.word	.LC77
-	.word	.LANCHOR91
-	.size	ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error
-	.section	.text.ftl_read,"ax",%progbits
+.L3266:
+	.word	.LC80
+	.size	rk_ftl_init, .-rk_ftl_init
+	.section	.text.ftl_fix_nand_power_lost_error,"ax",%progbits
 	.align	1
-	.global	ftl_read
+	.global	ftl_fix_nand_power_lost_error
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_read, %function
-ftl_read:
-	@ args = 0, pretend = 0, frame = 64
+	.type	ftl_fix_nand_power_lost_error, %function
+ftl_fix_nand_power_lost_error:
+	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	cmp	r0, #16
+	ldr	r3, .L3282
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #88
-	mov	r6, r1
-	mov	r7, r3
-	str	r2, [sp, #52]
-	bne	.L3132
-	mov	r2, r3
-	ldr	r1, [sp, #52]
-	add	r0, r6, #256
-	bl	FtlVendorPartRead
-	str	r0, [sp, #32]
-.L3131:
-	ldr	r0, [sp, #32]
-	add	sp, sp, #88
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3132:
-	ldr	r3, [sp, #52]
-	adds	r3, r1, r3
-	str	r3, [sp, #36]
-	ldr	r3, .L3170
-	ldr	r2, [sp, #36]
-	ldr	r3, [r3]
-	cmp	r2, r3
-	bhi	.L3155
-	ldr	r3, .L3170+4
-	ldr	r3, [r3]
-	adds	r4, r3, #1
-	beq	.L3156
-	bl	FtlCacheWriteBack
-	ldr	r3, .L3170+8
-	mov	r0, r6
-	ldr	r10, .L3170+52
-	ldrh	r4, [r3]
-	mov	r1, r4
-	bl	__aeabi_uidiv
-	ldr	r3, [sp, #36]
-	mov	r1, r4
-	str	r0, [sp, #40]
-	subs	r0, r3, #1
-	bl	__aeabi_uidiv
-	ldr	r3, [sp, #40]
-	ldr	r2, .L3170+12
-	ldr	r4, [sp, #40]
-	rsb	r3, r3, #1
-	str	r0, [sp, #44]
-	add	r3, r3, r0
-	str	r3, [sp, #28]
-	ldr	r1, [sp, #28]
-	ldr	r3, [r2]
-	add	r3, r3, r1
-	str	r3, [r2]
-	movs	r3, #0
-	mov	r5, r3
-	str	r3, [sp, #24]
-	str	r3, [sp, #48]
-	str	r3, [sp, #32]
-.L3134:
-	ldr	r3, [sp, #28]
-	cbnz	r3, .L3154
-	ldr	r3, .L3170+16
-	ldrh	r3, [r3]
+	sub	sp, sp, #56
+	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L3131
-	movs	r1, #1
-	ldr	r0, [sp, #28]
-	bl	rk_ftl_garbage_collect
-	b	.L3131
-.L3154:
-	movs	r2, #0
-	add	r1, sp, #84
+	beq	.L3268
+	ldr	r7, .L3282+4
+	ldr	r6, .L3282+8
+	ldr	r10, .L3282+32
+	ldrh	r5, [r7]
+	ldr	r3, [r6]
+	ldr	r4, .L3282+12
+	mov	r1, r5
+	ldr	r0, .L3282+16
+	ldrh	r2, [r3, r5, lsl #1]
+	lsl	r8, r5, #1
+	bl	printf
+	ldrh	r0, [r10]
+	bl	FtlGcRefreshOpenBlock
+	ldrh	r0, [r4]
+	bl	FtlGcRefreshOpenBlock
+	mov	r0, r10
+	bl	allocate_new_data_superblock
 	mov	r0, r4
-	bl	log2phys
-	ldr	r3, [sp, #84]
-	adds	r0, r3, #1
-	bne	.L3135
-	ldr	fp, .L3170+8
-	mov	r8, #0
-.L3136:
-	ldrh	r0, [fp]
-	cmp	r8, r0
-	bcc	.L3138
-.L3139:
-	ldr	r3, [sp, #28]
-	adds	r4, r4, #1
-	subs	r3, r3, #1
-	str	r3, [sp, #28]
-	beq	.L3143
-	ldr	r3, .L3170+20
-	ldrh	r3, [r3]
-	cmp	r5, r3, lsl #2
-	bne	.L3134
-.L3143:
-	cmp	r5, #0
-	beq	.L3134
-	movs	r2, #0
+	movw	r4, #4097
+	bl	allocate_new_data_superblock
+	str	r7, [sp, #4]
+.L3270:
+	subs	r4, r4, #1
+	beq	.L3274
+	movs	r1, #1
+	mov	r0, r1
+	bl	ftl_do_gc
+	ldr	r3, [r6]
+	ldrh	r3, [r3, r8]
+	cmp	r3, #0
+	bne	.L3270
+.L3274:
+	ldr	r3, [r6]
 	mov	r1, r5
-	ldr	r0, [r10]
-	mov	fp, #0
-	bl	FlashReadPages
-	ldr	r3, [sp, #24]
-	lsls	r3, r3, #9
-	str	r3, [sp, #68]
-	ldr	r3, [sp, #56]
-	lsls	r3, r3, #9
-	str	r3, [sp, #60]
-	ldr	r3, [sp, #48]
-	lsls	r3, r3, #9
-	str	r3, [sp, #64]
-.L3153:
-	mov	r8, #36
-	ldr	r3, [r10]
-	mul	r8, r8, fp
-	ldr	r1, [sp, #40]
-	add	r3, r3, r8
-	ldr	r2, [r3, #16]
-	cmp	r1, r2
-	bne	.L3145
-	ldr	r1, [r3, #8]
-	ldr	r3, .L3170+24
-	ldr	r3, [r3]
-	cmp	r1, r3
-	bne	.L3146
-	ldr	r3, [sp, #60]
-	mov	r0, r7
-	ldr	r2, [sp, #64]
-	add	r1, r1, r3
-.L3169:
-	bl	ftl_memcpy
-.L3146:
-	ldr	r2, [r10]
-	add	r2, r2, r8
-	ldr	r3, [r2, #12]
-	ldr	lr, [r2, #16]
-	ldr	r0, [r3, #8]
-	cmp	lr, r0
-	beq	.L3147
-	ldr	ip, .L3170+32
-	ldr	r0, [ip, #72]
-	adds	r0, r0, #1
-	str	r0, [ip, #72]
-	ldr	r0, [r2, #8]
-	ldr	r1, [r0, #4]
-	str	r1, [sp, #16]
-	mov	r1, lr
-	ldr	r0, [r0]
-	str	r0, [sp, #12]
-	ldr	r0, [r3, #12]
-	str	r0, [sp, #8]
-	ldr	r0, [r3, #8]
-	str	r0, [sp, #4]
-	ldr	r0, [r3, #4]
-	str	r0, [sp]
-	ldr	r0, .L3170+28
-	ldr	r3, [r3]
-	ldr	r2, [r2, #4]
+	ldr	r0, .L3282+16
+	ldrh	r2, [r3, r5, lsl #1]
 	bl	printf
-.L3147:
-	ldr	r3, [r10]
-	add	r2, r3, r8
-	ldr	r3, [r3, r8]
-	adds	r1, r3, #1
-	bne	.L3148
-	ldr	r1, .L3170+32
-	str	r3, [sp, #32]
-	ldr	r2, [r1, #72]
-	adds	r2, r2, #1
-	str	r2, [r1, #72]
-.L3149:
-	add	fp, fp, #1
-	cmp	r5, fp
-	bne	.L3153
-	movs	r5, #0
-	b	.L3134
-.L3138:
-	mla	r0, r0, r4, r8
-	cmp	r6, r0
-	bhi	.L3137
-	ldr	r3, [sp, #36]
-	cmp	r3, r0
-	bls	.L3137
-	subs	r0, r0, r6
-	mov	r2, #512
-	movs	r1, #0
-	add	r0, r7, r0, lsl #9
-	bl	ftl_memset
-.L3137:
-	add	r8, r8, #1
-	b	.L3136
-.L3135:
-	ldr	r2, [r10]
-	mov	r8, #36
-	mla	r8, r8, r5, r2
-	str	r3, [r8, #4]
-	ldr	r3, [sp, #40]
-	cmp	r4, r3
-	ldr	r3, .L3170+8
-	bne	.L3140
-	ldr	r2, .L3170+24
-	mov	r0, r6
-	ldrh	fp, [r3]
-	ldr	r2, [r2]
-	mov	r1, fp
-	str	r2, [r8, #8]
-	bl	__aeabi_uidivmod
-	ldr	r2, [sp, #52]
-	sub	r3, fp, r1
-	str	r1, [sp, #56]
-	cmp	r3, r2
-	it	cs
-	movcs	r3, r2
-	cmp	fp, r3
-	str	r3, [sp, #48]
-	bne	.L3141
-	str	r7, [r8, #8]
-.L3141:
-	ldr	r3, .L3170+36
-	ldr	r2, .L3170+40
-	str	r4, [r8, #16]
-	ldrh	r3, [r3]
-	ldr	r2, [r2]
-	muls	r3, r5, r3
-	adds	r5, r5, #1
-	bic	r3, r3, #3
-	add	r3, r3, r2
-	str	r3, [r8, #12]
-	b	.L3139
-.L3140:
-	ldr	r2, [sp, #44]
-	cmp	r4, r2
-	bne	.L3142
-	ldr	r2, .L3170+44
-	ldr	r1, [sp, #36]
-	ldr	r2, [r2]
-	str	r2, [r8, #8]
-	ldrh	r2, [r3]
-	mul	r3, r2, r4
-	subs	r1, r1, r3
-	cmp	r2, r1
-	str	r1, [sp, #24]
-	bne	.L3141
-.L3168:
-	subs	r3, r3, r6
-	add	r3, r7, r3, lsl #9
-	str	r3, [r8, #8]
-	b	.L3141
-.L3142:
-	ldrh	r3, [r3]
-	muls	r3, r4, r3
-	b	.L3168
-.L3145:
-	ldr	r1, [sp, #44]
-	cmp	r1, r2
-	bne	.L3146
-	ldr	r1, [r3, #8]
-	ldr	r3, .L3170+44
-	ldr	r3, [r3]
-	cmp	r1, r3
-	bne	.L3146
-	ldr	r3, .L3170+8
-	ldr	r2, [sp, #68]
-	ldrh	r0, [r3]
-	ldr	r3, [sp, #44]
-	muls	r0, r3, r0
-	subs	r0, r0, r6
-	add	r0, r7, r0, lsl #9
-	b	.L3169
-.L3148:
-	cmp	r3, #256
-	bne	.L3149
-	ldr	r0, [r2, #4]
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-	mov	r8, r0
-	bl	FtlGcRefreshBlock
-	ldr	r2, .L3170+48
-	movw	r3, #2049
-.L3151:
-	subs	r3, r3, #1
-	bne	.L3150
-.L3152:
-	bl	FtlSysFlush
-	b	.L3149
-.L3150:
+	ldr	r3, [r6]
+	ldrh	r4, [r3, r5, lsl #1]
+	cbnz	r4, .L3272
+	add	r0, sp, #56
+	ldr	r7, .L3282+20
+	strh	r5, [r0, #-48]!	@ movhi
+	movw	r10, #65535
+	bl	make_superblock
+	ldr	r3, .L3282+24
+	add	r0, sp, #22
+	ldr	r8, [r7]
+	mov	r2, r4
+	mov	fp, #36
+	mov	ip, r4
+	ldrh	lr, [r3]
+.L3275:
+	uxth	r3, r2
+	cmp	lr, r3
+	bhi	.L3277
+	ldr	r3, [r6]
+	mov	r1, r5
+	ldr	r0, .L3282+28
+	ldrh	r2, [r3, r5, lsl #1]
+	bl	printf
+	mov	r2, r4
+	movs	r1, #0
+	ldr	r0, [r7]
+	bl	FlashEraseBlocks
+	mov	r2, r4
 	movs	r1, #1
-	str	r2, [sp, #76]
-	mov	r0, r1
-	str	r3, [sp, #72]
-	bl	rk_ftl_garbage_collect
-	ldr	r2, [sp, #76]
-	ldr	r3, [sp, #72]
-	ldrh	r1, [r2]
-	cmp	r1, r8
-	beq	.L3151
-	b	.L3152
-.L3155:
-	mov	r3, #-1
-.L3156:
-	str	r3, [sp, #32]
-	b	.L3131
-.L3171:
+	ldr	r0, [r7]
+	bl	FlashEraseBlocks
+.L3272:
+	ldr	r2, [sp, #4]
+	movw	r3, #65535
+	strh	r3, [r2]	@ movhi
+.L3268:
+	add	sp, sp, #56
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3277:
+	ldrh	r3, [r0, #2]!
+	cmp	r3, r10
+	beq	.L3276
+	mla	r1, fp, r4, r8
+	adds	r4, r4, #1
+	lsls	r3, r3, #10
+	uxth	r4, r4
+	str	r3, [r1, #4]
+	str	ip, [r1, #8]
+	str	ip, [r1, #12]
+.L3276:
+	adds	r2, r2, #1
+	b	.L3275
+.L3283:
 	.align	2
-.L3170:
-	.word	.LANCHOR68
-	.word	.LANCHOR232
-	.word	.LANCHOR55
-	.word	.LANCHOR166
-	.word	.LANCHOR116
+.L3282:
+	.word	.LANCHOR16
+	.word	.LANCHOR241
+	.word	.LANCHOR85
+	.word	.LANCHOR94
+	.word	.LC81
+	.word	.LANCHOR79
 	.word	.LANCHOR38
-	.word	.LANCHOR186
-	.word	.LC65
-	.word	.LANCHOR138
-	.word	.LANCHOR58
-	.word	.LANCHOR189
-	.word	.LANCHOR187
-	.word	.LANCHOR205
-	.word	.LANCHOR180
-	.size	ftl_read, .-ftl_read
+	.word	.LC82
+	.word	.LANCHOR93
+	.size	ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error
 	.section	.text.FtlWrite,"ax",%progbits
 	.align	1
 	.global	FtlWrite
@@ -22111,440 +22682,629 @@ ftl_read:
 	.fpu softvfp
 	.type	FtlWrite, %function
 FtlWrite:
-	@ args = 0, pretend = 0, frame = 80
+	@ args = 0, pretend = 0, frame = 72
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r10, r3
-	ldr	r3, .L3220
-	sub	sp, sp, #80
-	mov	r6, r1
-	str	r2, [sp, #12]
+	mov	r8, r3
+	ldr	r3, .L3356
+	sub	sp, sp, #72
+	mov	r5, r1
+	mov	r7, r2
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L3205
+	bne	.L3327
+	ldr	r2, .L3356+4
+	ldr	r2, [r2]
+	cmp	r2, #1
+	bne	.L3328
 	cmp	r0, #16
-	bne	.L3174
-	mov	r2, r10
-	ldr	r1, [sp, #12]
-	add	r0, r6, #256
+	bne	.L3286
+	mov	r2, r8
+	mov	r1, r7
+	add	r0, r5, #256
 	bl	FtlVendorPartWrite
-.L3172:
-	add	sp, sp, #80
+.L3284:
+	add	sp, sp, #72
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3174:
-	ldr	r3, [sp, #12]
-	adds	r5, r1, r3
-	ldr	r3, .L3220+4
+.L3286:
+	ldr	r3, .L3356+8
 	ldr	r3, [r3]
-	cmp	r5, r3
-	bhi	.L3206
-	ldr	r3, .L3220+8
-	ldr	r0, [r3]
-	adds	r4, r0, #1
-	beq	.L3172
-	ldr	r3, .L3220+12
+	cmp	r1, r3
+	bcs	.L3331
+	cmp	r7, r3
+	bhi	.L3331
+	adds	r6, r1, r7
+	cmp	r3, r6
+	bcc	.L3331
+	ldr	r3, .L3356+12
 	mov	r2, #2048
-	mov	r0, r6
+	mov	r0, r5
 	str	r2, [r3]
-	ldr	r3, .L3220+16
+	ldr	r3, .L3356+16
 	ldrh	r4, [r3]
 	mov	r1, r4
 	bl	__aeabi_uidiv
 	mov	r1, r4
-	mov	r8, r0
-	subs	r0, r5, #1
+	mov	fp, r0
+	subs	r0, r6, #1
 	bl	__aeabi_uidiv
-	ldr	r2, .L3220+20
-	sub	r5, r0, r8
-	adds	r3, r5, #1
-	adds	r1, r5, #1
-	str	r3, [sp, #4]
+	ldr	r2, .L3356+20
+	sub	r10, r0, fp
+	add	r6, r10, #1
+	cmp	r7, r4, lsl #1
+	str	r0, [sp, #4]
 	ldr	r3, [r2]
-	str	r0, [sp, #16]
-	add	r3, r3, r1
+	add	r3, r3, r6
 	str	r3, [r2]
-	ldr	r3, .L3220+24
-	ldr	fp, [r3]
-	cmp	fp, #0
-	beq	.L3176
-	ldr	r3, [fp, #16]
-	cmp	r8, r3
-	beq	.L3177
-	bl	FtlCacheWriteBack
-.L3176:
-	ldr	r7, .L3220+28
-	mov	r4, r8
-.L3178:
-	ldr	r3, [sp, #4]
-	cbnz	r3, .L3204
-	ldr	r3, [sp, #16]
-	ldr	r0, [sp, #4]
-	sub	r1, r3, r8
-	bl	rk_ftl_garbage_collect
-.L3205:
-	movs	r0, #0
-	b	.L3172
-.L3177:
-	ldr	r2, .L3220+32
-	mov	r1, r4
-	mov	r0, r6
+	ldr	r2, .L3356+24
 	ldr	r3, [r2]
-	adds	r3, r3, #1
+	add	r3, r3, r7
 	str	r3, [r2]
+	ite	cs
+	movcs	r3, #1
+	movcc	r3, #0
+	str	r3, [sp, #12]
+	ldr	r3, .L3356+28
+	ldr	r2, [r3]
+	cmp	r2, #0
+	beq	.L3332
+	movs	r3, #36
+	muls	r3, r2, r3
+	ldr	r2, .L3356+32
+	ldr	r2, [r2]
+	subs	r3, r3, #36
+	add	r3, r3, r2
+	ldr	r2, [r3, #16]
+	cmp	fp, r2
+	bne	.L3333
+	ldr	r1, .L3356+36
+	mov	r0, r5
+	ldr	r6, .L3356+40
+	str	r3, [sp, #8]
+	ldr	r2, [r1]
+	adds	r2, r2, #1
+	str	r2, [r1]
+	mov	r1, r4
+	ldr	r2, [r6]
+	adds	r2, r2, #1
+	str	r2, [r6]
 	bl	__aeabi_uidivmod
-	ldr	r2, [sp, #12]
 	subs	r4, r4, r1
-	ldr	r0, [fp, #8]
-	mov	r3, r1
-	mov	r1, r10
-	cmp	r4, r2
+	mov	r0, r1
+	cmp	r4, r7
+	mov	r1, r8
 	it	cs
-	movcs	r4, r2
-	lsls	r7, r4, #9
-	add	r0, r0, r3, lsl #9
-	mov	r2, r7
+	movcs	r4, r7
+	lsls	r3, r4, #9
+	lsls	r2, r4, #9
+	str	r3, [sp]
+	ldr	r3, [sp, #8]
+	ldr	r3, [r3, #8]
+	add	r0, r3, r0, lsl #9
 	bl	ftl_memcpy
-	cmp	r5, #0
-	beq	.L3205
-	ldr	r3, [sp, #12]
-	add	r6, r6, r4
-	add	r10, r10, r7
-	add	r8, r8, #1
-	subs	r3, r3, r4
-	str	r3, [sp, #12]
+	cmp	r10, #0
+	bne	.L3290
+	ldr	r3, [r6]
+	cmp	r3, #2
+	bgt	.L3290
+.L3327:
+	movs	r0, #0
+	b	.L3284
+.L3290:
+	ldr	r3, [sp]
+	subs	r7, r7, r4
+	add	r5, r5, r4
+	add	fp, fp, #1
+	mov	r6, r10
+	add	r3, r3, r8
+	str	r3, [sp]
+.L3289:
+	ldr	r3, .L3356+40
+	movs	r2, #0
+	str	r2, [r3]
+.L3288:
+	ldr	r1, [sp, #4]
+	mov	r0, fp
+	bl	FtlCacheMetchLpa
+	cbz	r0, .L3291
 	bl	FtlCacheWriteBack
-	str	r5, [sp, #4]
-	b	.L3176
-.L3204:
-	ldr	r5, .L3220+36
-	ldrb	r2, [r7, #6]	@ zero_extendqisi2
-	ldrh	r3, [r5]
+.L3291:
+	ldr	r3, .L3356+44
+	mov	r4, fp
+	ldr	r2, .L3356+48
+	str	r2, [r3]
+.L3292:
+	cmp	r6, #0
+	bne	.L3322
+	bl	FtlCacheWriteBack
+	ldr	r3, [sp, #4]
+	mov	r0, r6
+	ldr	r4, .L3356+52
+	sub	r1, r3, fp
+	bl	ftl_do_gc
+	ldrh	r3, [r4]
+	cmp	r3, #5
+	bls	.L3323
+	cmp	r3, #31
+	bhi	.L3327
+	ldr	r3, .L3356+56
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L3327
+.L3323:
+	ldr	r5, .L3356+60
+	ldr	r7, .L3356+64
+.L3326:
+	ldrh	r2, [r5]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L3325
+	ldrh	r3, [r7]
+	cmp	r3, r2
+	bne	.L3325
+	ldr	r2, .L3356+68
+	ldrh	r2, [r2]
+	cmp	r2, r3
+	bne	.L3325
+	and	r0, r6, #7
+	bl	List_get_gc_head_node
+	uxth	r0, r0
+	bl	FtlGcRefreshBlock
+.L3325:
+	ldr	r2, .L3356+72
+	movs	r3, #128
+	movs	r1, #1
+	mov	r0, r1
+	strh	r3, [r2]	@ movhi
+	ldr	r2, .L3356+76
+	strh	r3, [r2]	@ movhi
+	bl	ftl_do_gc
+	movs	r1, #1
+	movs	r0, #0
+	bl	ftl_do_gc
+	ldr	r3, .L3356
+	ldr	r3, [r3]
+	cmp	r3, #0
+	bne	.L3327
+	ldrh	r3, [r4]
+	cmp	r3, #2
+	bhi	.L3327
+	adds	r6, r6, #1
+	cmp	r6, #256
+	bne	.L3326
+	b	.L3327
+.L3333:
+	str	r8, [sp]
+	b	.L3289
+.L3332:
+	str	r8, [sp]
+	b	.L3288
+.L3322:
+	ldr	r3, .L3356+48
+	ldr	r8, .L3356+100
+	ldrb	r2, [r3, #6]	@ zero_extendqisi2
+	ldrh	r3, [r8]
 	cmp	r2, r3
-	bcc	.L3179
-	ldr	r1, .L3220+40
-	movw	r2, #1673
-	ldr	r0, .L3220+44
+	bcc	.L3293
+	ldr	r1, .L3356+80
+	mov	r2, #1472
+	ldr	r0, .L3356+84
 	bl	printf
-	ldr	r1, .L3220+48
-	ldr	r0, .L3220+52
+	ldr	r1, .L3356+88
+	ldr	r0, .L3356+92
 	bl	printf
-.L3179:
-	ldrh	r3, [r7, #4]
-	cbnz	r3, .L3180
-	bl	FtlCacheWriteBack
-	mov	r0, r7
+.L3293:
+	ldr	r3, .L3356+48
+	ldrh	r3, [r3, #4]
+	cbnz	r3, .L3294
+	ldr	r0, .L3356+48
 	bl	allocate_new_data_superblock
-.L3180:
-	ldrb	r3, [r7, #7]	@ zero_extendqisi2
-	ldrh	r2, [r7, #4]
-	lsls	r3, r3, #2
+	ldr	r3, .L3356+44
+	ldr	r2, .L3356+48
+	str	r2, [r3]
+.L3294:
+	ldr	r3, .L3356+96
+	ldr	r2, .L3356+28
+	ldr	r3, [r3]
+	ldr	r2, [r2]
+	subs	r3, r3, r2
+	ldr	r2, .L3356+48
+	ldrh	r2, [r2, #4]
 	cmp	r3, r2
 	it	cs
 	movcs	r3, r2
-	ldr	r2, [sp, #4]
-	cmp	r3, r2
+	cmp	r3, r6
 	it	cs
-	movcs	r3, r2
-	ldrb	r2, [r7, #6]	@ zero_extendqisi2
-	str	r3, [sp, #36]
-	ldrh	r3, [r5]
+	movcs	r3, r6
+	str	r3, [sp, #28]
+	ldr	r3, .L3356+48
+	ldrb	r2, [r3, #6]	@ zero_extendqisi2
+	ldrh	r3, [r8]
 	cmp	r2, r3
-	bcc	.L3181
-	ldr	r1, .L3220+40
-	movw	r2, #1706
-	ldr	r0, .L3220+44
+	bcc	.L3295
+	ldr	r1, .L3356+80
+	movw	r2, #1515
+	ldr	r0, .L3356+84
 	bl	printf
-	ldr	r1, .L3220+48
-	ldr	r0, .L3220+52
+	ldr	r1, .L3356+88
+	ldr	r0, .L3356+92
 	bl	printf
-.L3181:
+.L3295:
 	movs	r3, #0
-.L3219:
+.L3354:
 	str	r3, [sp, #8]
 	ldr	r3, [sp, #8]
-	ldr	r2, [sp, #36]
-	cmp	r3, r2
-	bne	.L3202
-.L3183:
-	ldr	r0, .L3220+56
-	mov	r3, r7
-	movs	r2, #0
-	ldr	r1, [sp, #8]
-	ldr	r0, [r0]
-	bl	FtlProgPages
-	ldr	r3, [sp, #4]
-	ldr	r2, [sp, #8]
+	ldr	r2, [sp, #28]
 	cmp	r3, r2
-	bcs	.L3203
-	ldr	r1, .L3220+40
-	movw	r2, #1795
-	ldr	r0, .L3220+44
+	bne	.L3317
+.L3297:
+	ldr	r3, [sp, #8]
+	cmp	r6, r3
+	bcs	.L3318
+	ldr	r1, .L3356+80
+	movw	r2, #1609
+	ldr	r0, .L3356+84
 	bl	printf
-	ldr	r1, .L3220+48
-	ldr	r0, .L3220+52
+	ldr	r1, .L3356+88
+	ldr	r0, .L3356+92
 	bl	printf
-.L3203:
-	ldr	r3, [sp, #4]
-	ldr	r2, [sp, #8]
-	subs	r3, r3, r2
-	str	r3, [sp, #4]
-	b	.L3178
-.L3202:
-	ldrh	r3, [r7, #4]
+.L3318:
+	ldr	r3, [sp, #8]
+	ldr	r8, .L3356+28
+	subs	r6, r6, r3
+	ldr	r3, .L3356+96
+	ldr	r2, [r8]
+	ldr	r3, [r3]
+	cmp	r2, r3
+	bcs	.L3319
+	ldr	r3, [sp, #12]
+	cmp	r3, #0
+	bne	.L3319
+	ldr	r3, .L3356+48
+	ldrh	r3, [r3, #4]
+	cmp	r3, #0
+	beq	.L3319
+.L3321:
+	movs	r3, #0
+	str	r3, [sp, #12]
+	b	.L3292
+.L3357:
+	.align	2
+.L3356:
+	.word	.LANCHOR78
+	.word	.LANCHOR247
+	.word	.LANCHOR68
+	.word	.LANCHOR256
+	.word	.LANCHOR55
+	.word	.LANCHOR167
+	.word	.LANCHOR225
+	.word	.LANCHOR72
+	.word	.LANCHOR73
+	.word	.LANCHOR169
+	.word	.LANCHOR257
+	.word	.LANCHOR252
+	.word	.LANCHOR93
+	.word	.LANCHOR90
+	.word	.LANCHOR2
+	.word	.LANCHOR213
+	.word	.LANCHOR115
+	.word	.LANCHOR116
+	.word	.LANCHOR182
+	.word	.LANCHOR181
+	.word	.LANCHOR258
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LANCHOR185
+	.word	.LANCHOR38
+.L3317:
+	ldr	r3, .L3358
+	ldrh	r3, [r3, #4]
 	cmp	r3, #0
-	beq	.L3183
+	beq	.L3297
+	ldr	r3, [sp, #12]
+	cbz	r3, .L3298
+	ldr	r3, [sp, #4]
+	cmp	r3, r4
+	bne	.L3298
+	ldr	r3, [sp, #8]
+	cbz	r3, .L3298
+	ldr	r3, .L3358+4
+	ldr	r1, [sp, #4]
+	ldrh	r2, [r3]
+	adds	r3, r5, r7
+	mls	r3, r2, r1, r3
+	cmp	r2, r3
+	bne	.L3297
+.L3298:
 	movs	r2, #0
-	add	r1, sp, #40
+	add	r1, sp, #32
 	mov	r0, r4
-	movs	r5, #36
+	ldr	r8, .L3358+28
 	bl	log2phys
-	mov	r0, r7
+	ldr	r0, .L3358
 	bl	get_new_active_ppa
-	ldr	r3, [sp, #8]
-	ldr	r2, .L3220+60
-	muls	r5, r3, r5
-	ldr	r3, .L3220+56
-	ldrh	r2, [r2]
+	ldr	r3, .L3358+8
+	movs	r2, #36
 	ldr	r1, [r3]
+	ldr	r3, [r8]
+	mla	ip, r2, r1, r3
+	ldr	r3, .L3358+12
+	ldrh	r2, [r3]
+	str	r0, [ip, #4]
+	str	r4, [ip, #16]
+	mul	r3, r2, r1
+	bic	r3, r3, #3
 	str	r3, [sp, #20]
-	ldr	r3, [sp, #8]
-	add	r1, r1, r5
-	str	r0, [r1, #4]
-	str	r4, [r1, #16]
-	mul	r0, r2, r3
-	bic	r3, r0, #3
-	ldr	r0, .L3220+64
-	str	r3, [sp, #28]
-	ldr	r3, [r0]
-	ldr	r0, [sp, #28]
-	str	r3, [sp, #32]
-	add	fp, r3, r0
-	str	fp, [r1, #12]
-	mov	r0, fp
+	ldr	r3, .L3358+16
+	ldr	r0, [sp, #20]
+	ldr	r3, [r3]
+	add	r10, r3, r0
+	str	r3, [sp, #24]
+	ldr	r3, .L3358+20
+	str	r10, [ip, #12]
+	ldrh	r0, [r3]
+	str	r3, [sp, #16]
+	muls	r1, r0, r1
+	ldr	r0, .L3358+24
+	ldr	r0, [r0]
+	bic	r1, r1, #3
+	add	r1, r1, r0
+	mov	r0, r10
+	str	r1, [ip, #8]
 	movs	r1, #0
 	bl	ftl_memset
-	cmp	r4, r8
-	ldr	r1, .L3220+16
-	beq	.L3184
-	ldr	r3, [sp, #16]
+	cmp	fp, r4
+	ldr	r2, .L3358+4
+	beq	.L3299
+	ldr	r3, [sp, #4]
 	cmp	r3, r4
-	ldr	r3, [sp, #20]
-	bne	.L3215
-	ldr	r3, [sp, #12]
-	adds	r2, r6, r3
-	ldrh	r3, [r1]
-	ldrh	r1, [sp, #16]
-	smulbb	r3, r3, r1
-	subs	r2, r2, r3
-	uxth	r3, r2
-	str	r3, [sp, #20]
+	ldr	r3, [sp, #16]
+	bne	.L3351
+	ldrh	r3, [sp, #4]
+	add	r8, r5, r7
+	ldrh	r2, [r2]
+	smulbb	r2, r2, r3
 	movs	r3, #0
-	str	r3, [sp, #24]
-	b	.L3187
-.L3184:
-	ldrh	r2, [r1]
-	mov	r0, r6
-	mov	r1, r2
-	str	r2, [sp, #20]
+	str	r3, [sp, #16]
+	sub	r8, r8, r2
+	uxth	r8, r8
+	b	.L3302
+.L3299:
+	ldrh	r8, [r2]
+	mov	r0, r5
+	mov	r1, r8
 	bl	__aeabi_uidivmod
-	ldr	r2, [sp, #20]
-	str	r1, [sp, #24]
-	subs	r2, r2, r1
-	ldr	r1, [sp, #12]
-	mov	r3, r2
-	cmp	r2, r1
+	sub	r8, r8, r1
+	str	r1, [sp, #16]
+	cmp	r8, r7
 	it	cs
-	movcs	r3, r1
-	str	r3, [sp, #20]
-.L3187:
-	ldr	r3, .L3220+16
-	ldr	r2, [sp, #20]
+	movcs	r8, r7
+.L3302:
+	ldr	r3, .L3358+4
+	ldr	r0, .L3358+28
 	ldrh	r3, [r3]
-	cmp	r3, r2
-	ldr	r3, .L3220+56
+	cmp	r3, r8
+	ldr	r3, .L3358+8
+	bne	.L3303
+	cmp	fp, r4
 	ldr	r3, [r3]
-	bne	.L3188
-	cmp	r4, r8
-	add	r5, r5, r3
-	itett	ne
-	ldrne	r2, [sp, #20]
-	streq	r10, [r5, #8]
-	mulne	r2, r2, r4
-	subne	r2, r2, r6
-	itt	ne
-	addne	r2, r10, r2, lsl #9
-	strne	r2, [r5, #8]
-.L3190:
-	ldr	r3, .L3220+36
-	ldrb	r2, [r7, #6]	@ zero_extendqisi2
+	ittet	ne
+	mulne	r1, r8, r4
+	ldrne	r2, [sp]
+	ldreq	r1, [sp]
+	subne	r1, r1, r5
+	it	ne
+	addne	r1, r2, r1, lsl #9
+	ldr	r2, [sp, #12]
+	cmp	r2, #0
+	beq	.L3305
+	ldr	r2, [r0]
+	movs	r0, #36
+	mla	r3, r0, r3, r2
+	str	r1, [r3, #8]
+.L3306:
+	ldr	r3, .L3358
+	ldrb	r2, [r3, #6]	@ zero_extendqisi2
+	ldr	r3, .L3358+32
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L3199
-	ldr	r1, .L3220+40
-	movw	r2, #1780
-	ldr	r0, .L3220+44
+	bcc	.L3314
+	ldr	r1, .L3358+36
+	movw	r2, #1599
+	ldr	r0, .L3358+40
 	bl	printf
-	ldr	r1, .L3220+48
-	ldr	r0, .L3220+52
+	ldr	r1, .L3358+44
+	ldr	r0, .L3358+48
 	bl	printf
-.L3199:
-	ldr	r2, [sp, #32]
+.L3314:
+	ldr	r2, [sp, #24]
 	movw	r3, #61589
-	ldr	r1, [sp, #28]
+	ldr	r1, [sp, #20]
 	strh	r3, [r2, r1]	@ movhi
-	ldr	r2, .L3220+68
-	str	r4, [fp, #8]
+	ldr	r2, .L3358+52
+	str	r4, [r10, #8]
 	adds	r4, r4, #1
 	ldr	r3, [r2]
-	str	r3, [fp, #4]
+	str	r3, [r10, #4]
 	adds	r3, r3, #1
 	adds	r1, r3, #1
 	it	eq
 	moveq	r3, #0
 	str	r3, [r2]
-	ldr	r3, [sp, #40]
-	str	r3, [fp, #12]
-	ldrh	r3, [r7]
-	strh	r3, [fp, #2]	@ movhi
+	ldr	r3, [sp, #32]
+	ldr	r2, .L3358+8
+	str	r3, [r10, #12]
+	ldr	r3, .L3358
+	ldrh	r3, [r3]
+	strh	r3, [r10, #2]	@ movhi
+	ldr	r3, [r2]
+	adds	r3, r3, #1
+	str	r3, [r2]
 	ldr	r3, [sp, #8]
 	adds	r3, r3, #1
-	b	.L3219
-.L3221:
-	.align	2
-.L3220:
-	.word	.LANCHOR76
-	.word	.LANCHOR68
-	.word	.LANCHOR232
-	.word	.LANCHOR249
-	.word	.LANCHOR55
-	.word	.LANCHOR162
-	.word	.LANCHOR132
-	.word	.LANCHOR91
-	.word	.LANCHOR164
-	.word	.LANCHOR38
-	.word	.LANCHOR250
-	.word	.LC5
-	.word	.LC6
-	.word	.LC7
-	.word	.LANCHOR182
-	.word	.LANCHOR58
-	.word	.LANCHOR189
-	.word	.LANCHOR160
-.L3188:
-	cmp	r4, r8
-	add	r3, r3, r5
-	ite	eq
-	ldreq	r2, .L3222
-	ldrne	r2, .L3222+4
+	b	.L3354
+.L3305:
+	ldr	r2, .L3358+28
+	movs	r0, #36
 	ldr	r2, [r2]
-	str	r2, [r3, #8]
-	ldr	r2, [sp, #40]
-	ldr	r3, .L3222+8
-	adds	r0, r2, #1
-	beq	.L3193
+	mla	r3, r0, r3, r2
+	ldr	r2, .L3358+20
+	ldrh	r2, [r2]
+.L3355:
+	ldr	r0, [r3, #8]
+	b	.L3352
+.L3303:
+	ldr	r2, [sp, #32]
+	adds	r1, r2, #1
+	beq	.L3307
+	str	r2, [sp, #40]
+	movs	r1, #36
+	ldr	r2, [r0]
+	add	r0, sp, #36
 	ldr	r3, [r3]
+	str	r4, [sp, #52]
+	mla	r3, r1, r3, r2
 	movs	r1, #1
-	str	r2, [sp, #48]
-	add	r0, sp, #44
-	str	r4, [sp, #60]
-	add	r3, r3, r5
 	ldr	r2, [r3, #8]
 	ldr	r3, [r3, #12]
-	str	r2, [sp, #52]
+	str	r2, [sp, #44]
 	movs	r2, #0
-	str	r3, [sp, #56]
+	str	r3, [sp, #48]
 	bl	FlashReadPages
-	ldr	r3, [sp, #44]
+	ldr	r3, [sp, #36]
 	adds	r3, r3, #1
-	bne	.L3194
-	ldr	r2, .L3222+12
+	bne	.L3308
+	ldr	r2, .L3358+56
 	ldr	r3, [r2, #72]
 	adds	r3, r3, #1
 	str	r3, [r2, #72]
-.L3197:
-	ldr	r2, [sp, #20]
-	cmp	r4, r8
-	ldr	r3, .L3222+8
-	lsl	r2, r2, #9
-	bne	.L3198
+.L3311:
+	cmp	fp, r4
+	ldr	r0, .L3358+28
+	lsl	r2, r8, #9
+	bne	.L3312
+	ldr	r3, .L3358+8
+	ldr	r1, [r0]
+	movs	r0, #36
 	ldr	r3, [r3]
-	mov	r1, r10
-	add	r5, r5, r3
-	ldr	r3, [sp, #24]
-	ldr	r0, [r5, #8]
+	mla	r3, r0, r3, r1
+	ldr	r1, [sp]
+	ldr	r0, [r3, #8]
+	ldr	r3, [sp, #16]
 	add	r0, r0, r3, lsl #9
-.L3217:
+.L3352:
 	bl	ftl_memcpy
-	b	.L3190
-.L3194:
-	ldr	r1, [fp, #8]
+	b	.L3306
+.L3308:
+	ldr	r1, [r10, #8]
 	cmp	r4, r1
-	beq	.L3196
-	ldr	r2, .L3222+12
-	ldr	r0, .L3222+16
+	beq	.L3310
+	ldr	r2, .L3358+56
+	ldr	r0, .L3358+60
 	ldr	r3, [r2, #72]
 	adds	r3, r3, #1
 	str	r3, [r2, #72]
 	mov	r2, r4
 	bl	printf
-.L3196:
-	ldr	r3, [fp, #8]
+.L3310:
+	ldr	r3, [r10, #8]
 	cmp	r4, r3
-	beq	.L3197
-	movw	r2, #1759
-	ldr	r1, .L3222+20
-	ldr	r0, .L3222+24
+	beq	.L3311
+	movw	r2, #1581
+	ldr	r1, .L3358+36
+	ldr	r0, .L3358+40
 	bl	printf
-	ldr	r1, .L3222+28
-	ldr	r0, .L3222+32
+	ldr	r1, .L3358+44
+	ldr	r0, .L3358+48
 	bl	printf
-	b	.L3197
-.L3193:
+	b	.L3311
+.L3307:
+	ldr	r2, [r0]
+	movs	r1, #36
 	ldr	r3, [r3]
+	mla	r3, r1, r3, r2
+	ldr	r2, .L3358+20
 	movs	r1, #0
-	ldr	r2, .L3222+36
-	add	r3, r3, r5
 	ldrh	r2, [r2]
 	ldr	r0, [r3, #8]
 	bl	ftl_memset
-	b	.L3197
-.L3198:
-	ldr	r1, .L3222+40
+	b	.L3311
+.L3312:
+	ldr	r3, .L3358+4
+	mov	ip, #36
+	ldr	r0, [r0]
+	ldrh	r1, [r3]
+	ldr	r3, .L3358+8
 	ldr	r3, [r3]
-	ldrh	r1, [r1]
-	add	r5, r5, r3
-	ldr	r0, [r5, #8]
 	muls	r1, r4, r1
-	subs	r1, r1, r6
-	add	r1, r10, r1, lsl #9
-	b	.L3217
-.L3215:
+	mla	r3, ip, r3, r0
+	ldr	r0, [sp]
+	subs	r1, r1, r5
+	add	r1, r0, r1, lsl #9
+	b	.L3355
+.L3351:
+	ldr	r1, [sp, #12]
+	cbz	r1, .L3313
+	ldr	r3, .L3358+8
+	movs	r0, #36
+	ldr	r1, [r8]
 	ldr	r3, [r3]
-	add	r5, r5, r3
-	ldrh	r3, [r1]
+	mla	r8, r0, r3, r1
+	ldrh	r3, [r2]
+	ldr	r2, [sp]
 	muls	r3, r4, r3
-	subs	r3, r3, r6
-	add	r3, r10, r3, lsl #9
-	str	r3, [r5, #8]
-	b	.L3190
-.L3206:
+	subs	r3, r3, r5
+	add	r3, r2, r3, lsl #9
+	str	r3, [r8, #8]
+	b	.L3306
+.L3313:
+	ldrh	r1, [r2]
+	mov	ip, #36
+	ldr	r2, .L3358+8
+	ldr	r0, [r8]
+	ldr	r2, [r2]
+	muls	r1, r4, r1
+	mla	r8, ip, r2, r0
+	ldrh	r2, [r3]
+	ldr	r3, [sp]
+	subs	r1, r1, r5
+	ldr	r0, [r8, #8]
+	add	r1, r3, r1, lsl #9
+	b	.L3352
+.L3319:
+	bl	FtlCacheWriteBack
+	cmp	r6, #1
+	mov	r3, #0
+	str	r3, [r8]
+	bhi	.L3292
+	b	.L3321
+.L3331:
 	mov	r0, #-1
-	b	.L3172
-.L3223:
+	b	.L3284
+.L3328:
+	mov	r0, r3
+	b	.L3284
+.L3359:
 	.align	2
-.L3222:
-	.word	.LANCHOR186
-	.word	.LANCHOR187
-	.word	.LANCHOR182
-	.word	.LANCHOR138
-	.word	.LC78
-	.word	.LANCHOR250
+.L3358:
+	.word	.LANCHOR93
+	.word	.LANCHOR55
+	.word	.LANCHOR72
+	.word	.LANCHOR58
+	.word	.LANCHOR197
+	.word	.LANCHOR57
+	.word	.LANCHOR192
+	.word	.LANCHOR73
+	.word	.LANCHOR38
+	.word	.LANCHOR258
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LANCHOR57
-	.word	.LANCHOR55
+	.word	.LANCHOR165
+	.word	.LANCHOR141
+	.word	.LC83
 	.size	FtlWrite, .-FtlWrite
 	.section	.text.ftl_vendor_write,"ax",%progbits
 	.align	1
@@ -22634,11 +23394,11 @@ ftl_write:
 	mov	r4, r2
 	mov	r5, r3
 	mov	r6, r0
-	cbnz	r0, .L3229
+	cbnz	r0, .L3365
 	mov	r3, r2
 	mov	r2, r5
 	bl	idb_write_data
-.L3229:
+.L3365:
 	mov	r3, r5
 	mov	r2, r4
 	mov	r1, r7
@@ -22659,27 +23419,27 @@ FtlDumpSysBlock:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	lsl	r10, r0, #10
-	ldr	r5, .L3237
+	ldr	r5, .L3373
 	sub	sp, sp, #24
 	mov	r7, r0
 	movs	r6, #0
-	ldr	r4, .L3237+4
+	ldr	r4, .L3373+4
 	ldr	r3, [r5]
-	ldr	r8, .L3237+20
+	ldr	r8, .L3373+20
 	mov	fp, r4
 	str	r3, [r4, #8]
-	ldr	r3, .L3237+8
+	ldr	r3, .L3373+8
 	ldr	r3, [r3]
 	str	r3, [r4, #12]
-.L3231:
+.L3367:
 	ldrh	r2, [r8]
 	sxth	r3, r6
 	cmp	r3, r2
-	blt	.L3233
+	blt	.L3369
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3233:
+.L3369:
 	movs	r2, #1
 	orr	r3, r3, r10
 	mov	r1, r2
@@ -22689,7 +23449,7 @@ FtlDumpSysBlock:
 	ldr	r2, [r4, #8]
 	mov	r1, r7
 	ldr	r3, [r4, #12]
-	ldr	r0, .L3237+12
+	ldr	r0, .L3373+12
 	ldr	r2, [r2]
 	str	r2, [sp, #16]
 	ldr	r2, [r3, #12]
@@ -22705,23 +23465,23 @@ FtlDumpSysBlock:
 	ldr	r3, [r4, #12]
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L3232
+	beq	.L3368
 	mov	r3, #768
 	movs	r2, #4
 	ldr	r1, [r5]
-	ldr	r0, .L3237+16
+	ldr	r0, .L3373+16
 	bl	rknand_print_hex
-.L3232:
+.L3368:
 	adds	r6, r6, #1
-	b	.L3231
-.L3238:
+	b	.L3367
+.L3374:
 	.align	2
-.L3237:
-	.word	.LANCHOR183
-	.word	.LANCHOR203
-	.word	.LANCHOR188
-	.word	.LC79
-	.word	.LC80
+.L3373:
+	.word	.LANCHOR189
+	.word	.LANCHOR211
+	.word	.LANCHOR195
+	.word	.LC84
+	.word	.LC85
 	.word	.LANCHOR53
 	.size	FtlDumpSysBlock, .-FtlDumpSysBlock
 	.section	.text.dump_map_info,"ax",%progbits
@@ -22735,32 +23495,32 @@ FtlDumpSysBlock:
 dump_map_info:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L3253
+	ldr	r3, .L3389
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #40
-	ldr	r8, .L3253+72
+	ldr	r8, .L3389+72
 	ldrh	r5, [r3]
-.L3240:
-	ldr	r3, .L3253+4
+.L3376:
+	ldr	r3, .L3389+4
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	bhi	.L3247
-	ldr	r4, .L3253+8
+	bhi	.L3383
+	ldr	r4, .L3389+8
 	movs	r7, #0
-.L3248:
-	ldr	r3, .L3253+12
+.L3384:
+	ldr	r3, .L3389+12
 	sxth	r5, r7
 	ldrh	r3, [r3]
 	cmp	r5, r3
-	bge	.L3251
+	bge	.L3387
 	lsls	r5, r5, #1
 	movs	r6, #0
-	ldr	r8, .L3253+76
-	b	.L3252
-.L3242:
+	ldr	r8, .L3389+76
+	b	.L3388
+.L3378:
 	str	r3, [sp, #36]
 	mov	r1, r5
-	ldr	r3, .L3253+16
+	ldr	r3, .L3389+16
 	str	r2, [sp, #32]
 	ldrb	r0, [r3, r6]	@ zero_extendqisi2
 	bl	V2P_block
@@ -22768,7 +23528,7 @@ dump_map_info:
 	bl	FtlBbmIsBadBlock
 	ldr	r2, [sp, #32]
 	ldr	r3, [sp, #36]
-	cbnz	r0, .L3241
+	cbnz	r0, .L3377
 	ldr	r1, [sp, #28]
 	mla	r0, fp, r4, r7
 	lsls	r1, r1, #10
@@ -22781,29 +23541,29 @@ dump_map_info:
 	ldr	r1, [sp, #24]
 	add	r1, r1, ip
 	str	r1, [r0, #12]
-.L3241:
+.L3377:
 	adds	r6, r6, #1
-.L3249:
+.L3385:
 	uxth	r1, r6
 	cmp	r2, r1
-	bhi	.L3242
-	cbnz	r4, .L3243
-.L3246:
+	bhi	.L3378
+	cbnz	r4, .L3379
+.L3382:
 	adds	r5, r5, #1
 	uxth	r5, r5
-	b	.L3240
-.L3243:
-	ldr	r10, .L3253+80
+	b	.L3376
+.L3379:
+	ldr	r10, .L3389+80
 	mov	r0, r7
 	movs	r6, #0
 	movs	r7, #36
 	movs	r2, #1
 	mov	r1, r4
 	bl	FlashReadPages
-.L3244:
+.L3380:
 	uxth	r3, r6
 	cmp	r4, r3
-	bls	.L3246
+	bls	.L3382
 	ldr	r3, [r8]
 	mla	r3, r7, r6, r3
 	adds	r6, r6, #1
@@ -22824,24 +23584,24 @@ dump_map_info:
 	ldr	r3, [r1]
 	ubfx	r1, r2, #10, #16
 	bl	printf
-	b	.L3244
-.L3247:
-	ldr	r1, .L3253+20
+	b	.L3380
+.L3383:
+	ldr	r1, .L3389+20
 	movs	r6, #0
-	ldr	r3, .L3253+24
+	ldr	r3, .L3389+24
 	mov	r4, r6
 	ldr	r7, [r8]
 	mov	fp, #36
 	ldr	r1, [r1]
 	ldrh	r2, [r3]
-	ldr	r3, .L3253+28
+	ldr	r3, .L3389+28
 	str	r1, [sp, #24]
-	ldr	r1, .L3253+32
+	ldr	r1, .L3389+32
 	ldr	r3, [r3]
 	ldrh	r10, [r1]
-	b	.L3249
-.L3250:
-	ldr	r10, .L3253+44
+	b	.L3385
+.L3386:
+	ldr	r10, .L3389+44
 	mov	r0, r4
 	ldr	r2, [r10]
 	ldrh	r2, [r2, r5]
@@ -22857,7 +23617,7 @@ dump_map_info:
 	ldrh	r1, [r1, r5]
 	str	r0, [sp, #20]
 	ldr	r2, [r2]
-	ldr	r0, .L3253+36
+	ldr	r0, .L3389+36
 	str	r2, [sp, #16]
 	ldr	r2, [r3, #12]
 	str	r2, [sp, #12]
@@ -22869,62 +23629,62 @@ dump_map_info:
 	str	r3, [sp]
 	ldm	r4, {r2, r3}
 	bl	printf
-.L3252:
+.L3388:
 	ldrh	r2, [r8]
 	sxth	r3, r6
 	adds	r6, r6, #1
 	cmp	r3, r2
-	blt	.L3250
+	blt	.L3386
 	adds	r7, r7, #1
-	b	.L3248
-.L3251:
-	ldr	r3, .L3253+40
+	b	.L3384
+.L3387:
+	ldr	r3, .L3389+40
 	movs	r2, #2
-	ldr	r1, .L3253+44
-	ldr	r0, .L3253+48
+	ldr	r1, .L3389+44
+	ldr	r0, .L3389+48
 	ldr	r3, [r3]
 	ldr	r1, [r1]
 	bl	rknand_print_hex
-	ldr	r4, .L3253+52
+	ldr	r4, .L3389+52
 	movs	r2, #4
-	ldr	r1, .L3253+56
-	ldr	r0, .L3253+60
+	ldr	r1, .L3389+56
+	ldr	r0, .L3389+60
 	ldrh	r3, [r4]
 	ldr	r1, [r1]
 	bl	rknand_print_hex
-	ldr	r1, .L3253+64
+	ldr	r1, .L3389+64
 	movs	r2, #4
 	ldrh	r3, [r4]
-	ldr	r0, .L3253+68
+	ldr	r0, .L3389+68
 	ldr	r1, [r1]
 	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
 	b	rknand_print_hex
-.L3254:
+.L3390:
 	.align	2
-.L3253:
+.L3389:
 	.word	.LANCHOR40
 	.word	.LANCHOR41
-	.word	.LANCHOR203
-	.word	.LANCHOR128
+	.word	.LANCHOR211
+	.word	.LANCHOR131
 	.word	.LANCHOR47
-	.word	.LANCHOR105
+	.word	.LANCHOR108
 	.word	.LANCHOR38
-	.word	.LANCHOR104
+	.word	.LANCHOR107
 	.word	.LANCHOR58
-	.word	.LC49
+	.word	.LC51
 	.word	.LANCHOR64
-	.word	.LANCHOR129
-	.word	.LC82
+	.word	.LANCHOR132
+	.word	.LC87
 	.word	.LANCHOR66
-	.word	.LANCHOR131
-	.word	.LC83
-	.word	.LANCHOR195
-	.word	.LC84
-	.word	.LANCHOR180
+	.word	.LANCHOR134
+	.word	.LC88
+	.word	.LANCHOR203
+	.word	.LC89
+	.word	.LANCHOR186
 	.word	.LANCHOR53
-	.word	.LC81
+	.word	.LC86
 	.size	dump_map_info, .-dump_map_info
 	.global	FtlMallocOffset
 	.global	FtlMallocBuffer
@@ -22933,6 +23693,7 @@ dump_map_info:
 	.global	check_valid_page_count_table
 	.global	FtlUpdateVaildLpnCount
 	.global	g_ect_tbl_power_up_flush
+	.global	last_cache_match_count
 	.global	power_up_flag
 	.global	g_LowFormat
 	.global	gFtlInitStatus
@@ -23022,7 +23783,6 @@ dump_map_info:
 	.global	p_map_block_valid_page_count
 	.global	p_map_block_table
 	.global	p_blk_mode_table
-	.global	p_valid_page_count_check_table
 	.global	p_valid_page_count_table
 	.global	g_totle_swl_count
 	.global	p_swl_mul_table
@@ -23041,6 +23801,11 @@ dump_map_info:
 	.global	p_vendor_data_buf
 	.global	p_sys_data_buf_1
 	.global	p_sys_data_buf
+	.global	g_wr_page_num
+	.global	req_wr_io
+	.global	c_wr_page_buf_num
+	.global	p_wr_io_data_buf
+	.global	p_wr_io_spare_buf
 	.global	p_plane_order_table
 	.global	g_req_cache
 	.global	req_gc_dst
@@ -23138,6 +23903,7 @@ dump_map_info:
 	.global	gNandMaxChip
 	.global	gNandMaxDie
 	.global	gFlashInterfaceMode
+	.global	gFlashCurMode
 	.global	gFlashSlcMode
 	.global	gFlashOnfiModeEn
 	.global	gFlashToggleModeEn
@@ -23161,21 +23927,21 @@ DeviceCapacity:
 	.space	4
 	.section	.bss.DieAddrs,"aw",%nobits
 	.align	2
-	.set	.LANCHOR17,. + 0
+	.set	.LANCHOR18,. + 0
 	.type	DieAddrs, %object
 	.size	DieAddrs, 32
 DieAddrs:
 	.space	32
 	.section	.bss.DieCsIndex,"aw",%nobits
 	.align	2
-	.set	.LANCHOR26,. + 0
+	.set	.LANCHOR27,. + 0
 	.type	DieCsIndex, %object
 	.size	DieCsIndex, 8
 DieCsIndex:
 	.space	8
 	.section	.bss.FlashDdrTunningReadCount,"aw",%nobits
 	.align	2
-	.set	.LANCHOR144,. + 0
+	.set	.LANCHOR147,. + 0
 	.type	FlashDdrTunningReadCount, %object
 	.size	FlashDdrTunningReadCount, 4
 FlashDdrTunningReadCount:
@@ -23194,7 +23960,7 @@ FtlMallocBuffer:
 	.space	1310720
 	.section	.bss.FtlUpdateVaildLpnCount,"aw",%nobits
 	.align	1
-	.set	.LANCHOR99,. + 0
+	.set	.LANCHOR101,. + 0
 	.type	FtlUpdateVaildLpnCount, %object
 	.size	FtlUpdateVaildLpnCount, 2
 FtlUpdateVaildLpnCount:
@@ -23208,7 +23974,7 @@ IDByte:
 	.space	32
 	.section	.bss.c_ftl_nand_bbm_buf_size,"aw",%nobits
 	.align	1
-	.set	.LANCHOR123,. + 0
+	.set	.LANCHOR126,. + 0
 	.type	c_ftl_nand_bbm_buf_size, %object
 	.size	c_ftl_nand_bbm_buf_size, 2
 c_ftl_nand_bbm_buf_size:
@@ -23250,7 +24016,7 @@ c_ftl_nand_data_blks_per_plane:
 	.space	2
 	.section	.bss.c_ftl_nand_data_op_blks_per_plane,"aw",%nobits
 	.align	1
-	.set	.LANCHOR224,. + 0
+	.set	.LANCHOR232,. + 0
 	.type	c_ftl_nand_data_op_blks_per_plane, %object
 	.size	c_ftl_nand_data_op_blks_per_plane, 2
 c_ftl_nand_data_op_blks_per_plane:
@@ -23418,7 +24184,7 @@ c_ftl_vendor_part_size:
 	.space	2
 	.section	.bss.c_gc_page_buf_num,"aw",%nobits
 	.align	2
-	.set	.LANCHOR107,. + 0
+	.set	.LANCHOR110,. + 0
 	.type	c_gc_page_buf_num, %object
 	.size	c_gc_page_buf_num, 4
 c_gc_page_buf_num:
@@ -23430,6 +24196,13 @@ c_gc_page_buf_num:
 	.size	c_mlc_erase_count_value, 2
 c_mlc_erase_count_value:
 	.space	2
+	.section	.bss.c_wr_page_buf_num,"aw",%nobits
+	.align	2
+	.set	.LANCHOR185,. + 0
+	.type	c_wr_page_buf_num, %object
+	.size	c_wr_page_buf_num, 4
+c_wr_page_buf_num:
+	.space	4
 	.section	.bss.check_valid_page_count_table,"aw",%nobits
 	.align	1
 	.type	check_valid_page_count_table, %object
@@ -23438,14 +24211,14 @@ check_valid_page_count_table:
 	.space	8192
 	.section	.bss.ftl_gc_temp_power_lost_recovery_flag,"aw",%nobits
 	.align	2
-	.set	.LANCHOR135,. + 0
+	.set	.LANCHOR138,. + 0
 	.type	ftl_gc_temp_power_lost_recovery_flag, %object
 	.size	ftl_gc_temp_power_lost_recovery_flag, 4
 ftl_gc_temp_power_lost_recovery_flag:
 	.space	4
 	.section	.bss.gBbtInfo,"aw",%nobits
 	.align	2
-	.set	.LANCHOR74,. + 0
+	.set	.LANCHOR76,. + 0
 	.type	gBbtInfo, %object
 	.size	gBbtInfo, 60
 gBbtInfo:
@@ -23459,7 +24232,7 @@ gBlockPageAlignSize:
 	.space	4
 	.section	.bss.gBootDdrMode,"aw",%nobits
 	.align	2
-	.set	.LANCHOR155,. + 0
+	.set	.LANCHOR160,. + 0
 	.type	gBootDdrMode, %object
 	.size	gBootDdrMode, 4
 gBootDdrMode:
@@ -23471,8 +24244,14 @@ gBootDdrMode:
 	.size	gDieOp, 128
 gDieOp:
 	.space	128
-	.section	.bss.gFlashInterfaceMode,"aw",%nobits
+	.section	.bss.gFlashCurMode,"aw",%nobits
 	.set	.LANCHOR24,. + 0
+	.type	gFlashCurMode, %object
+	.size	gFlashCurMode, 1
+gFlashCurMode:
+	.space	1
+	.section	.bss.gFlashInterfaceMode,"aw",%nobits
+	.set	.LANCHOR25,. + 0
 	.type	gFlashInterfaceMode, %object
 	.size	gFlashInterfaceMode, 1
 gFlashInterfaceMode:
@@ -23484,28 +24263,28 @@ gFlashOnfiModeEn:
 	.space	1
 	.section	.bss.gFlashPageBuffer0,"aw",%nobits
 	.align	2
-	.set	.LANCHOR147,. + 0
+	.set	.LANCHOR154,. + 0
 	.type	gFlashPageBuffer0, %object
 	.size	gFlashPageBuffer0, 4
 gFlashPageBuffer0:
 	.space	4
 	.section	.bss.gFlashPageBuffer1,"aw",%nobits
 	.align	2
-	.set	.LANCHOR153,. + 0
+	.set	.LANCHOR152,. + 0
 	.type	gFlashPageBuffer1, %object
 	.size	gFlashPageBuffer1, 4
 gFlashPageBuffer1:
 	.space	4
 	.section	.bss.gFlashProgCheckBuffer,"aw",%nobits
 	.align	2
-	.set	.LANCHOR198,. + 0
+	.set	.LANCHOR206,. + 0
 	.type	gFlashProgCheckBuffer, %object
 	.size	gFlashProgCheckBuffer, 4
 gFlashProgCheckBuffer:
 	.space	4
 	.section	.bss.gFlashProgCheckSpareBuffer,"aw",%nobits
 	.align	2
-	.set	.LANCHOR199,. + 0
+	.set	.LANCHOR207,. + 0
 	.type	gFlashProgCheckSpareBuffer, %object
 	.size	gFlashProgCheckSpareBuffer, 4
 gFlashProgCheckSpareBuffer:
@@ -23516,14 +24295,14 @@ gFlashProgCheckSpareBuffer:
 gFlashSdrModeEn:
 	.space	1
 	.section	.bss.gFlashSlcMode,"aw",%nobits
-	.set	.LANCHOR15,. + 0
+	.set	.LANCHOR16,. + 0
 	.type	gFlashSlcMode, %object
 	.size	gFlashSlcMode, 1
 gFlashSlcMode:
 	.space	1
 	.section	.bss.gFlashSpareBuffer,"aw",%nobits
 	.align	2
-	.set	.LANCHOR197,. + 0
+	.set	.LANCHOR205,. + 0
 	.type	gFlashSpareBuffer, %object
 	.size	gFlashSpareBuffer, 4
 gFlashSpareBuffer:
@@ -23536,7 +24315,7 @@ gFlashToggleModeEn:
 	.space	1
 	.section	.bss.gL2pMapInfo,"aw",%nobits
 	.align	2
-	.set	.LANCHOR127,. + 0
+	.set	.LANCHOR130,. + 0
 	.type	gL2pMapInfo, %object
 	.size	gL2pMapInfo, 44
 gL2pMapInfo:
@@ -23550,19 +24329,19 @@ gMasterInfo:
 	.space	32
 	.section	.bss.gMasterTempBuf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR156,. + 0
+	.set	.LANCHOR161,. + 0
 	.type	gMasterTempBuf, %object
 	.size	gMasterTempBuf, 4
 gMasterTempBuf:
 	.space	4
 	.section	.bss.gMultiPageProgEn,"aw",%nobits
-	.set	.LANCHOR27,. + 0
+	.set	.LANCHOR28,. + 0
 	.type	gMultiPageProgEn, %object
 	.size	gMultiPageProgEn, 1
 gMultiPageProgEn:
 	.space	1
 	.section	.bss.gMultiPageReadEn,"aw",%nobits
-	.set	.LANCHOR202,. + 0
+	.set	.LANCHOR210,. + 0
 	.type	gMultiPageReadEn, %object
 	.size	gMultiPageReadEn, 1
 gMultiPageReadEn:
@@ -23581,21 +24360,21 @@ gNandChipMap:
 gNandFlashEccBits:
 	.space	1
 	.section	.bss.gNandFlashIDBEccBits,"aw",%nobits
-	.set	.LANCHOR152,. + 0
+	.set	.LANCHOR158,. + 0
 	.type	gNandFlashIDBEccBits, %object
 	.size	gNandFlashIDBEccBits, 1
 gNandFlashIDBEccBits:
 	.space	1
 	.section	.bss.gNandFlashIdbBlockAddr,"aw",%nobits
 	.align	2
-	.set	.LANCHOR149,. + 0
+	.set	.LANCHOR156,. + 0
 	.type	gNandFlashIdbBlockAddr, %object
 	.size	gNandFlashIdbBlockAddr, 4
 gNandFlashIdbBlockAddr:
 	.space	4
 	.section	.bss.gNandFlashInfoBlockAddr,"aw",%nobits
 	.align	2
-	.set	.LANCHOR148,. + 0
+	.set	.LANCHOR155,. + 0
 	.type	gNandFlashInfoBlockAddr, %object
 	.size	gNandFlashInfoBlockAddr, 4
 gNandFlashInfoBlockAddr:
@@ -23618,39 +24397,39 @@ gNandFlashResEndPageAddr:
 gNandIDBResBlkNum:
 	.space	1
 	.section	.bss.gNandIDBResBlkNumSaveInFlash,"aw",%nobits
-	.set	.LANCHOR150,. + 0
+	.set	.LANCHOR157,. + 0
 	.type	gNandIDBResBlkNumSaveInFlash, %object
 	.size	gNandIDBResBlkNumSaveInFlash, 1
 gNandIDBResBlkNumSaveInFlash:
 	.space	1
 	.section	.bss.gNandIDataBuf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR141,. + 0
+	.set	.LANCHOR144,. + 0
 	.type	gNandIDataBuf, %object
 	.size	gNandIDataBuf, 2048
 gNandIDataBuf:
 	.space	2048
 	.section	.bss.gNandMaxChip,"aw",%nobits
-	.set	.LANCHOR121,. + 0
+	.set	.LANCHOR124,. + 0
 	.type	gNandMaxChip, %object
 	.size	gNandMaxChip, 1
 gNandMaxChip:
 	.space	1
 	.section	.bss.gNandMaxDie,"aw",%nobits
-	.set	.LANCHOR25,. + 0
+	.set	.LANCHOR26,. + 0
 	.type	gNandMaxDie, %object
 	.size	gNandMaxDie, 1
 gNandMaxDie:
 	.space	1
 	.section	.bss.gNandOptPara,"aw",%nobits
-	.set	.LANCHOR7,. + 0
+	.set	.LANCHOR8,. + 0
 	.type	gNandOptPara, %object
 	.size	gNandOptPara, 32
 gNandOptPara:
 	.space	32
 	.section	.bss.gNandPhyInfo,"aw",%nobits
 	.align	2
-	.set	.LANCHOR14,. + 0
+	.set	.LANCHOR15,. + 0
 	.type	gNandPhyInfo, %object
 	.size	gNandPhyInfo, 28
 gNandPhyInfo:
@@ -23690,14 +24469,14 @@ gReadRetryInfo:
 	.space	852
 	.section	.bss.gSysFreeQueue,"aw",%nobits
 	.align	1
-	.set	.LANCHOR75,. + 0
+	.set	.LANCHOR77,. + 0
 	.type	gSysFreeQueue, %object
 	.size	gSysFreeQueue, 2056
 gSysFreeQueue:
 	.space	2056
 	.section	.bss.gSysInfo,"aw",%nobits
 	.align	2
-	.set	.LANCHOR210,. + 0
+	.set	.LANCHOR218,. + 0
 	.type	gSysInfo, %object
 	.size	gSysInfo, 16
 gSysInfo:
@@ -23710,35 +24489,35 @@ gToggleModeClkDiv:
 	.space	4
 	.section	.bss.gTotleBlock,"aw",%nobits
 	.align	1
-	.set	.LANCHOR122,. + 0
+	.set	.LANCHOR125,. + 0
 	.type	gTotleBlock, %object
 	.size	gTotleBlock, 2
 gTotleBlock:
 	.space	2
 	.section	.bss.gVendorBlkInfo,"aw",%nobits
 	.align	2
-	.set	.LANCHOR216,. + 0
+	.set	.LANCHOR224,. + 0
 	.type	gVendorBlkInfo, %object
 	.size	gVendorBlkInfo, 44
 gVendorBlkInfo:
 	.space	44
 	.section	.bss.g_GlobalDataVersion,"aw",%nobits
 	.align	2
-	.set	.LANCHOR160,. + 0
+	.set	.LANCHOR165,. + 0
 	.type	g_GlobalDataVersion, %object
 	.size	g_GlobalDataVersion, 4
 g_GlobalDataVersion:
 	.space	4
 	.section	.bss.g_GlobalSysVersion,"aw",%nobits
 	.align	2
-	.set	.LANCHOR159,. + 0
+	.set	.LANCHOR164,. + 0
 	.type	g_GlobalSysVersion, %object
 	.size	g_GlobalSysVersion, 4
 g_GlobalSysVersion:
 	.space	4
 	.section	.bss.g_LowFormat,"aw",%nobits
 	.align	2
-	.set	.LANCHOR247,. + 0
+	.set	.LANCHOR254,. + 0
 	.type	g_LowFormat, %object
 	.size	g_LowFormat, 4
 g_LowFormat:
@@ -23752,217 +24531,217 @@ g_MaxLbaSector:
 	.space	4
 	.section	.bss.g_MaxLbn,"aw",%nobits
 	.align	2
-	.set	.LANCHOR223,. + 0
+	.set	.LANCHOR231,. + 0
 	.type	g_MaxLbn, %object
 	.size	g_MaxLbn, 4
 g_MaxLbn:
 	.space	4
 	.section	.bss.g_MaxLpn,"aw",%nobits
 	.align	2
-	.set	.LANCHOR72,. + 0
+	.set	.LANCHOR74,. + 0
 	.type	g_MaxLpn, %object
 	.size	g_MaxLpn, 4
 g_MaxLpn:
 	.space	4
 	.section	.bss.g_SlcPartLbaEndSector,"aw",%nobits
 	.align	2
-	.set	.LANCHOR157,. + 0
+	.set	.LANCHOR162,. + 0
 	.type	g_SlcPartLbaEndSector, %object
 	.size	g_SlcPartLbaEndSector, 4
 g_SlcPartLbaEndSector:
 	.space	4
 	.section	.bss.g_VaildLpn,"aw",%nobits
 	.align	2
-	.set	.LANCHOR100,. + 0
+	.set	.LANCHOR102,. + 0
 	.type	g_VaildLpn, %object
 	.size	g_VaildLpn, 4
 g_VaildLpn:
 	.space	4
 	.section	.bss.g_active_superblock,"aw",%nobits
 	.align	2
-	.set	.LANCHOR91,. + 0
+	.set	.LANCHOR93,. + 0
 	.type	g_active_superblock, %object
 	.size	g_active_superblock, 48
 g_active_superblock:
 	.space	48
 	.section	.bss.g_all_blk_used_slc_mode,"aw",%nobits
 	.align	2
-	.set	.LANCHOR158,. + 0
+	.set	.LANCHOR163,. + 0
 	.type	g_all_blk_used_slc_mode, %object
 	.size	g_all_blk_used_slc_mode, 4
 g_all_blk_used_slc_mode:
 	.space	4
 	.section	.bss.g_buffer_superblock,"aw",%nobits
 	.align	2
-	.set	.LANCHOR92,. + 0
+	.set	.LANCHOR94,. + 0
 	.type	g_buffer_superblock, %object
 	.size	g_buffer_superblock, 48
 g_buffer_superblock:
 	.space	48
 	.section	.bss.g_cur_erase_blk,"aw",%nobits
 	.align	2
-	.set	.LANCHOR73,. + 0
+	.set	.LANCHOR75,. + 0
 	.type	g_cur_erase_blk, %object
 	.size	g_cur_erase_blk, 4
 g_cur_erase_blk:
 	.space	4
 	.section	.bss.g_ect_tbl_info_size,"aw",%nobits
 	.align	1
-	.set	.LANCHOR190,. + 0
+	.set	.LANCHOR198,. + 0
 	.type	g_ect_tbl_info_size, %object
 	.size	g_ect_tbl_info_size, 2
 g_ect_tbl_info_size:
 	.space	2
 	.section	.bss.g_ect_tbl_power_up_flush,"aw",%nobits
 	.align	1
-	.set	.LANCHOR219,. + 0
+	.set	.LANCHOR227,. + 0
 	.type	g_ect_tbl_power_up_flush, %object
 	.size	g_ect_tbl_power_up_flush, 2
 g_ect_tbl_power_up_flush:
 	.space	2
 	.section	.bss.g_flash_read_only_en,"aw",%nobits
 	.align	2
-	.set	.LANCHOR76,. + 0
+	.set	.LANCHOR78,. + 0
 	.type	g_flash_read_only_en, %object
 	.size	g_flash_read_only_en, 4
 g_flash_read_only_en:
 	.space	4
 	.section	.bss.g_free_slc_blk_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR139,. + 0
+	.set	.LANCHOR142,. + 0
 	.type	g_free_slc_blk_num, %object
 	.size	g_free_slc_blk_num, 2
 g_free_slc_blk_num:
 	.space	2
 	.section	.bss.g_ftl_nand_free_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR249,. + 0
+	.set	.LANCHOR256,. + 0
 	.type	g_ftl_nand_free_count, %object
 	.size	g_ftl_nand_free_count, 4
 g_ftl_nand_free_count:
 	.space	4
 	.section	.bss.g_gc_bad_block_gc_index,"aw",%nobits
 	.align	1
-	.set	.LANCHOR118,. + 0
+	.set	.LANCHOR121,. + 0
 	.type	g_gc_bad_block_gc_index, %object
 	.size	g_gc_bad_block_gc_index, 2
 g_gc_bad_block_gc_index:
 	.space	2
 	.section	.bss.g_gc_bad_block_temp_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR116,. + 0
+	.set	.LANCHOR119,. + 0
 	.type	g_gc_bad_block_temp_num, %object
 	.size	g_gc_bad_block_temp_num, 2
 g_gc_bad_block_temp_num:
 	.space	2
 	.section	.bss.g_gc_bad_block_temp_tbl,"aw",%nobits
 	.align	1
-	.set	.LANCHOR117,. + 0
+	.set	.LANCHOR120,. + 0
 	.type	g_gc_bad_block_temp_tbl, %object
 	.size	g_gc_bad_block_temp_tbl, 34
 g_gc_bad_block_temp_tbl:
 	.space	34
 	.section	.bss.g_gc_blk_index,"aw",%nobits
 	.align	1
-	.set	.LANCHOR178,. + 0
+	.set	.LANCHOR183,. + 0
 	.type	g_gc_blk_index, %object
 	.size	g_gc_blk_index, 2
 g_gc_blk_index:
 	.space	2
 	.section	.bss.g_gc_blk_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR109,. + 0
+	.set	.LANCHOR112,. + 0
 	.type	g_gc_blk_num, %object
 	.size	g_gc_blk_num, 2
 g_gc_blk_num:
 	.space	2
 	.section	.bss.g_gc_cur_blk_max_valid_pages,"aw",%nobits
 	.align	1
-	.set	.LANCHOR245,. + 0
+	.set	.LANCHOR250,. + 0
 	.type	g_gc_cur_blk_max_valid_pages, %object
 	.size	g_gc_cur_blk_max_valid_pages, 2
 g_gc_cur_blk_max_valid_pages:
 	.space	2
 	.section	.bss.g_gc_cur_blk_valid_pages,"aw",%nobits
 	.align	1
-	.set	.LANCHOR244,. + 0
+	.set	.LANCHOR249,. + 0
 	.type	g_gc_cur_blk_valid_pages, %object
 	.size	g_gc_cur_blk_valid_pages, 2
 g_gc_cur_blk_valid_pages:
 	.space	2
 	.section	.bss.g_gc_free_blk_threshold,"aw",%nobits
 	.align	1
-	.set	.LANCHOR176,. + 0
+	.set	.LANCHOR181,. + 0
 	.type	g_gc_free_blk_threshold, %object
 	.size	g_gc_free_blk_threshold, 2
 g_gc_free_blk_threshold:
 	.space	2
 	.section	.bss.g_gc_head_data_block,"aw",%nobits
 	.align	2
-	.set	.LANCHOR173,. + 0
+	.set	.LANCHOR178,. + 0
 	.type	g_gc_head_data_block, %object
 	.size	g_gc_head_data_block, 4
 g_gc_head_data_block:
 	.space	4
 	.section	.bss.g_gc_head_data_block_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR174,. + 0
+	.set	.LANCHOR179,. + 0
 	.type	g_gc_head_data_block_count, %object
 	.size	g_gc_head_data_block_count, 4
 g_gc_head_data_block_count:
 	.space	4
 	.section	.bss.g_gc_merge_free_blk_threshold,"aw",%nobits
 	.align	1
-	.set	.LANCHOR177,. + 0
+	.set	.LANCHOR182,. + 0
 	.type	g_gc_merge_free_blk_threshold, %object
 	.size	g_gc_merge_free_blk_threshold, 2
 g_gc_merge_free_blk_threshold:
 	.space	2
 	.section	.bss.g_gc_next_blk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR112,. + 0
+	.set	.LANCHOR115,. + 0
 	.type	g_gc_next_blk, %object
 	.size	g_gc_next_blk, 2
 g_gc_next_blk:
 	.space	2
 	.section	.bss.g_gc_next_blk_1,"aw",%nobits
 	.align	1
-	.set	.LANCHOR113,. + 0
+	.set	.LANCHOR116,. + 0
 	.type	g_gc_next_blk_1, %object
 	.size	g_gc_next_blk_1, 2
 g_gc_next_blk_1:
 	.space	2
 	.section	.bss.g_gc_next_blk_2,"aw",%nobits
 	.align	1
-	.set	.LANCHOR114,. + 0
+	.set	.LANCHOR117,. + 0
 	.type	g_gc_next_blk_2, %object
 	.size	g_gc_next_blk_2, 2
 g_gc_next_blk_2:
 	.space	2
 	.section	.bss.g_gc_next_blk_3,"aw",%nobits
 	.align	1
-	.set	.LANCHOR115,. + 0
+	.set	.LANCHOR118,. + 0
 	.type	g_gc_next_blk_3, %object
 	.size	g_gc_next_blk_3, 2
 g_gc_next_blk_3:
 	.space	2
 	.section	.bss.g_gc_num_req,"aw",%nobits
 	.align	2
-	.set	.LANCHOR102,. + 0
+	.set	.LANCHOR105,. + 0
 	.type	g_gc_num_req, %object
 	.size	g_gc_num_req, 4
 g_gc_num_req:
 	.space	4
 	.section	.bss.g_gc_page_offset,"aw",%nobits
 	.align	1
-	.set	.LANCHOR110,. + 0
+	.set	.LANCHOR113,. + 0
 	.type	g_gc_page_offset, %object
 	.size	g_gc_page_offset, 2
 g_gc_page_offset:
 	.space	2
 	.section	.bss.g_gc_refresh_block_temp_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR179,. + 0
+	.set	.LANCHOR184,. + 0
 	.type	g_gc_refresh_block_temp_num, %object
 	.size	g_gc_refresh_block_temp_num, 2
 g_gc_refresh_block_temp_num:
@@ -23975,102 +24754,102 @@ g_gc_refresh_block_temp_tbl:
 	.space	34
 	.section	.bss.g_gc_skip_write_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR175,. + 0
+	.set	.LANCHOR180,. + 0
 	.type	g_gc_skip_write_count, %object
 	.size	g_gc_skip_write_count, 4
 g_gc_skip_write_count:
 	.space	4
 	.section	.bss.g_gc_superblock,"aw",%nobits
 	.align	2
-	.set	.LANCHOR205,. + 0
+	.set	.LANCHOR213,. + 0
 	.type	g_gc_superblock, %object
 	.size	g_gc_superblock, 48
 g_gc_superblock:
 	.space	48
 	.section	.bss.g_gc_temp_superblock,"aw",%nobits
 	.align	2
-	.set	.LANCHOR93,. + 0
+	.set	.LANCHOR95,. + 0
 	.type	g_gc_temp_superblock, %object
 	.size	g_gc_temp_superblock, 48
 g_gc_temp_superblock:
 	.space	48
 	.section	.bss.g_in_gc_progress,"aw",%nobits
 	.align	2
-	.set	.LANCHOR171,. + 0
+	.set	.LANCHOR176,. + 0
 	.type	g_in_gc_progress, %object
 	.size	g_in_gc_progress, 4
 g_in_gc_progress:
 	.space	4
 	.section	.bss.g_in_swl_replace,"aw",%nobits
 	.align	2
-	.set	.LANCHOR172,. + 0
+	.set	.LANCHOR177,. + 0
 	.type	g_in_swl_replace, %object
 	.size	g_in_swl_replace, 4
 g_in_swl_replace:
 	.space	4
 	.section	.bss.g_inkDie_check_enable,"aw",%nobits
 	.align	2
-	.set	.LANCHOR28,. + 0
+	.set	.LANCHOR104,. + 0
 	.type	g_inkDie_check_enable, %object
 	.size	g_inkDie_check_enable, 4
 g_inkDie_check_enable:
 	.space	4
 	.section	.bss.g_l2p_last_update_region_id,"aw",%nobits
 	.align	1
-	.set	.LANCHOR97,. + 0
+	.set	.LANCHOR99,. + 0
 	.type	g_l2p_last_update_region_id, %object
 	.size	g_l2p_last_update_region_id, 2
 g_l2p_last_update_region_id:
 	.space	2
 	.section	.bss.g_maxRegNum,"aw",%nobits
-	.set	.LANCHOR12,. + 0
+	.set	.LANCHOR13,. + 0
 	.type	g_maxRegNum, %object
 	.size	g_maxRegNum, 1
 g_maxRegNum:
 	.space	1
 	.section	.bss.g_maxRetryCount,"aw",%nobits
-	.set	.LANCHOR151,. + 0
+	.set	.LANCHOR149,. + 0
 	.type	g_maxRetryCount, %object
 	.size	g_maxRetryCount, 1
 g_maxRetryCount:
 	.space	1
 	.section	.bss.g_max_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR169,. + 0
+	.set	.LANCHOR174,. + 0
 	.type	g_max_erase_count, %object
 	.size	g_max_erase_count, 4
 g_max_erase_count:
 	.space	4
 	.section	.bss.g_min_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR170,. + 0
+	.set	.LANCHOR175,. + 0
 	.type	g_min_erase_count, %object
 	.size	g_min_erase_count, 4
 g_min_erase_count:
 	.space	4
 	.section	.bss.g_nand_ecc_en,"aw",%nobits
-	.set	.LANCHOR200,. + 0
+	.set	.LANCHOR208,. + 0
 	.type	g_nand_ecc_en, %object
 	.size	g_nand_ecc_en, 1
 g_nand_ecc_en:
 	.space	1
 	.section	.bss.g_nandc_version_data,"aw",%nobits
 	.align	2
-	.set	.LANCHOR119,. + 0
+	.set	.LANCHOR122,. + 0
 	.type	g_nandc_version_data, %object
 	.size	g_nandc_version_data, 4
 g_nandc_version_data:
 	.space	4
 	.section	.bss.g_num_data_superblocks,"aw",%nobits
 	.align	1
-	.set	.LANCHOR85,. + 0
+	.set	.LANCHOR87,. + 0
 	.type	g_num_data_superblocks, %object
 	.size	g_num_data_superblocks, 2
 g_num_data_superblocks:
 	.space	2
 	.section	.bss.g_num_free_superblocks,"aw",%nobits
 	.align	1
-	.set	.LANCHOR88,. + 0
+	.set	.LANCHOR90,. + 0
 	.type	g_num_free_superblocks, %object
 	.size	g_num_free_superblocks, 2
 g_num_free_superblocks:
@@ -24084,48 +24863,48 @@ g_page_map_check_enable:
 	.space	2
 	.section	.bss.g_power_lost_ecc_error_blk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR237,. + 0
+	.set	.LANCHOR241,. + 0
 	.type	g_power_lost_ecc_error_blk, %object
 	.size	g_power_lost_ecc_error_blk, 2
 g_power_lost_ecc_error_blk:
 	.space	2
 	.section	.bss.g_power_lost_recovery_flag,"aw",%nobits
 	.align	1
-	.set	.LANCHOR238,. + 0
+	.set	.LANCHOR242,. + 0
 	.type	g_power_lost_recovery_flag, %object
 	.size	g_power_lost_recovery_flag, 2
 g_power_lost_recovery_flag:
 	.space	2
 	.section	.bss.g_recovery_page_min_ver,"aw",%nobits
 	.align	2
-	.set	.LANCHOR136,. + 0
+	.set	.LANCHOR139,. + 0
 	.type	g_recovery_page_min_ver, %object
 	.size	g_recovery_page_min_ver, 4
 g_recovery_page_min_ver:
 	.space	4
 	.section	.bss.g_recovery_page_num,"aw",%nobits
 	.align	2
-	.set	.LANCHOR239,. + 0
+	.set	.LANCHOR243,. + 0
 	.type	g_recovery_page_num, %object
 	.size	g_recovery_page_num, 4
 g_recovery_page_num:
 	.space	4
 	.section	.bss.g_recovery_ppa_tbl,"aw",%nobits
 	.align	2
-	.set	.LANCHOR240,. + 0
+	.set	.LANCHOR244,. + 0
 	.type	g_recovery_ppa_tbl, %object
 	.size	g_recovery_ppa_tbl, 128
 g_recovery_ppa_tbl:
 	.space	128
 	.section	.bss.g_req_cache,"aw",%nobits
 	.align	2
-	.set	.LANCHOR132,. + 0
+	.set	.LANCHOR135,. + 0
 	.type	g_req_cache, %object
 	.size	g_req_cache, 4
 g_req_cache:
 	.space	4
 	.section	.bss.g_retryMode,"aw",%nobits
-	.set	.LANCHOR9,. + 0
+	.set	.LANCHOR10,. + 0
 	.type	g_retryMode, %object
 	.size	g_retryMode, 1
 g_retryMode:
@@ -24138,105 +24917,105 @@ g_slc2KBNand:
 	.space	1
 	.section	.bss.g_sys_ext_data,"aw",%nobits
 	.align	2
-	.set	.LANCHOR138,. + 0
+	.set	.LANCHOR141,. + 0
 	.type	g_sys_ext_data, %object
 	.size	g_sys_ext_data, 512
 g_sys_ext_data:
 	.space	512
 	.section	.bss.g_sys_save_data,"aw",%nobits
 	.align	2
-	.set	.LANCHOR80,. + 0
+	.set	.LANCHOR82,. + 0
 	.type	g_sys_save_data, %object
 	.size	g_sys_save_data, 48
 g_sys_save_data:
 	.space	48
 	.section	.bss.g_tmp_data_superblock_id,"aw",%nobits
 	.align	1
-	.set	.LANCHOR133,. + 0
+	.set	.LANCHOR136,. + 0
 	.type	g_tmp_data_superblock_id, %object
 	.size	g_tmp_data_superblock_id, 2
 g_tmp_data_superblock_id:
 	.space	2
 	.section	.bss.g_totle_avg_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR206,. + 0
+	.set	.LANCHOR214,. + 0
 	.type	g_totle_avg_erase_count, %object
 	.size	g_totle_avg_erase_count, 4
 g_totle_avg_erase_count:
 	.space	4
 	.section	.bss.g_totle_cache_write_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR164,. + 0
+	.set	.LANCHOR169,. + 0
 	.type	g_totle_cache_write_count, %object
 	.size	g_totle_cache_write_count, 4
 g_totle_cache_write_count:
 	.space	4
 	.section	.bss.g_totle_discard_page_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR163,. + 0
+	.set	.LANCHOR168,. + 0
 	.type	g_totle_discard_page_count, %object
 	.size	g_totle_discard_page_count, 4
 g_totle_discard_page_count:
 	.space	4
 	.section	.bss.g_totle_gc_page_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR161,. + 0
+	.set	.LANCHOR166,. + 0
 	.type	g_totle_gc_page_count, %object
 	.size	g_totle_gc_page_count, 4
 g_totle_gc_page_count:
 	.space	4
 	.section	.bss.g_totle_l2p_write_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR165,. + 0
+	.set	.LANCHOR170,. + 0
 	.type	g_totle_l2p_write_count, %object
 	.size	g_totle_l2p_write_count, 4
 g_totle_l2p_write_count:
 	.space	4
 	.section	.bss.g_totle_map_block,"aw",%nobits
 	.align	1
-	.set	.LANCHOR128,. + 0
+	.set	.LANCHOR131,. + 0
 	.type	g_totle_map_block, %object
 	.size	g_totle_map_block, 2
 g_totle_map_block:
 	.space	2
 	.section	.bss.g_totle_mlc_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR167,. + 0
+	.set	.LANCHOR172,. + 0
 	.type	g_totle_mlc_erase_count, %object
 	.size	g_totle_mlc_erase_count, 4
 g_totle_mlc_erase_count:
 	.space	4
 	.section	.bss.g_totle_read_page_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR166,. + 0
+	.set	.LANCHOR171,. + 0
 	.type	g_totle_read_page_count, %object
 	.size	g_totle_read_page_count, 4
 g_totle_read_page_count:
 	.space	4
 	.section	.bss.g_totle_read_sector,"aw",%nobits
 	.align	2
-	.set	.LANCHOR218,. + 0
+	.set	.LANCHOR226,. + 0
 	.type	g_totle_read_sector, %object
 	.size	g_totle_read_sector, 4
 g_totle_read_sector:
 	.space	4
 	.section	.bss.g_totle_slc_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR168,. + 0
+	.set	.LANCHOR173,. + 0
 	.type	g_totle_slc_erase_count, %object
 	.size	g_totle_slc_erase_count, 4
 g_totle_slc_erase_count:
 	.space	4
 	.section	.bss.g_totle_swl_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR134,. + 0
+	.set	.LANCHOR137,. + 0
 	.type	g_totle_swl_count, %object
 	.size	g_totle_swl_count, 4
 g_totle_swl_count:
 	.space	4
 	.section	.bss.g_totle_sys_slc_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR79,. + 0
+	.set	.LANCHOR81,. + 0
 	.type	g_totle_sys_slc_erase_count, %object
 	.size	g_totle_sys_slc_erase_count, 4
 g_totle_sys_slc_erase_count:
@@ -24250,42 +25029,49 @@ g_totle_vendor_block:
 	.space	2
 	.section	.bss.g_totle_write_page_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR162,. + 0
+	.set	.LANCHOR167,. + 0
 	.type	g_totle_write_page_count, %object
 	.size	g_totle_write_page_count, 4
 g_totle_write_page_count:
 	.space	4
 	.section	.bss.g_totle_write_sector,"aw",%nobits
 	.align	2
-	.set	.LANCHOR217,. + 0
+	.set	.LANCHOR225,. + 0
 	.type	g_totle_write_sector, %object
 	.size	g_totle_write_sector, 4
 g_totle_write_sector:
+	.space	4
+	.section	.bss.g_wr_page_num,"aw",%nobits
+	.align	2
+	.set	.LANCHOR72,. + 0
+	.type	g_wr_page_num, %object
+	.size	g_wr_page_num, 4
+g_wr_page_num:
 	.space	4
 	.section	.bss.gc_discard_updated,"aw",%nobits
 	.align	2
-	.set	.LANCHOR233,. + 0
+	.set	.LANCHOR253,. + 0
 	.type	gc_discard_updated, %object
 	.size	gc_discard_updated, 4
 gc_discard_updated:
 	.space	4
 	.section	.bss.gc_ink_free_return_value,"aw",%nobits
 	.align	1
-	.set	.LANCHOR243,. + 0
+	.set	.LANCHOR248,. + 0
 	.type	gc_ink_free_return_value, %object
 	.size	gc_ink_free_return_value, 2
 gc_ink_free_return_value:
 	.space	2
 	.section	.bss.gpFlashSaveInfo,"aw",%nobits
 	.align	2
-	.set	.LANCHOR146,. + 0
+	.set	.LANCHOR153,. + 0
 	.type	gpFlashSaveInfo, %object
 	.size	gpFlashSaveInfo, 4
 gpFlashSaveInfo:
 	.space	4
 	.section	.bss.gpNandParaInfo,"aw",%nobits
 	.align	2
-	.set	.LANCHOR18,. + 0
+	.set	.LANCHOR7,. + 0
 	.type	gpNandParaInfo, %object
 	.size	gpNandParaInfo, 4
 gpNandParaInfo:
@@ -24305,14 +25091,14 @@ gpNandc1:
 	.space	4
 	.section	.bss.gpReadRetrial,"aw",%nobits
 	.align	2
-	.set	.LANCHOR145,. + 0
+	.set	.LANCHOR148,. + 0
 	.type	gpReadRetrial, %object
 	.size	gpReadRetrial, 4
 gpReadRetrial:
 	.space	4
 	.section	.bss.gp_ect_tbl_info,"aw",%nobits
 	.align	2
-	.set	.LANCHOR191,. + 0
+	.set	.LANCHOR199,. + 0
 	.type	gp_ect_tbl_info, %object
 	.size	gp_ect_tbl_info, 4
 gp_ect_tbl_info:
@@ -24325,14 +25111,14 @@ gp_flash_check_buf:
 	.space	262144
 	.section	.bss.gp_gc_page_buf_info,"aw",%nobits
 	.align	2
-	.set	.LANCHOR103,. + 0
+	.set	.LANCHOR106,. + 0
 	.type	gp_gc_page_buf_info, %object
 	.size	gp_gc_page_buf_info, 4
 gp_gc_page_buf_info:
 	.space	4
 	.section	.bss.gp_last_act_superblock,"aw",%nobits
 	.align	2
-	.set	.LANCHOR231,. + 0
+	.set	.LANCHOR252,. + 0
 	.type	gp_last_act_superblock, %object
 	.size	gp_last_act_superblock, 4
 gp_last_act_superblock:
@@ -24352,18 +25138,25 @@ idb_flash_slc_mode:
 	.space	4
 	.section	.bss.idb_need_write_back,"aw",%nobits
 	.align	2
-	.set	.LANCHOR154,. + 0
+	.set	.LANCHOR159,. + 0
 	.type	idb_need_write_back, %object
 	.size	idb_need_write_back, 4
 idb_need_write_back:
+	.space	4
+	.section	.bss.last_cache_match_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR257,. + 0
+	.type	last_cache_match_count, %object
+	.size	last_cache_match_count, 4
+last_cache_match_count:
 	.space	4
 	.section	.bss.mlcPageToSlcPageTbl,"aw",%nobits
 	.align	2
-	.set	.LANCHOR120,. + 0
+	.set	.LANCHOR123,. + 0
 	.type	mlcPageToSlcPageTbl, %object
-	.size	mlcPageToSlcPageTbl, 1024
+	.size	mlcPageToSlcPageTbl, 2048
 mlcPageToSlcPageTbl:
-	.space	1024
+	.space	2048
 	.section	.bss.p_blk_mode_table,"aw",%nobits
 	.align	2
 	.set	.LANCHOR1,. + 0
@@ -24373,133 +25166,133 @@ p_blk_mode_table:
 	.space	4
 	.section	.bss.p_data_block_list_head,"aw",%nobits
 	.align	2
-	.set	.LANCHOR82,. + 0
+	.set	.LANCHOR84,. + 0
 	.type	p_data_block_list_head, %object
 	.size	p_data_block_list_head, 4
 p_data_block_list_head:
 	.space	4
 	.section	.bss.p_data_block_list_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR81,. + 0
+	.set	.LANCHOR83,. + 0
 	.type	p_data_block_list_table, %object
 	.size	p_data_block_list_table, 4
 p_data_block_list_table:
 	.space	4
 	.section	.bss.p_data_block_list_tail,"aw",%nobits
 	.align	2
-	.set	.LANCHOR84,. + 0
+	.set	.LANCHOR86,. + 0
 	.type	p_data_block_list_tail, %object
 	.size	p_data_block_list_tail, 4
 p_data_block_list_tail:
 	.space	4
 	.section	.bss.p_erase_count_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR78,. + 0
+	.set	.LANCHOR80,. + 0
 	.type	p_erase_count_table, %object
 	.size	p_erase_count_table, 4
 p_erase_count_table:
 	.space	4
 	.section	.bss.p_free_data_block_list_head,"aw",%nobits
 	.align	2
-	.set	.LANCHOR87,. + 0
+	.set	.LANCHOR89,. + 0
 	.type	p_free_data_block_list_head, %object
 	.size	p_free_data_block_list_head, 4
 p_free_data_block_list_head:
 	.space	4
 	.section	.bss.p_gc_blk_tbl,"aw",%nobits
 	.align	2
-	.set	.LANCHOR108,. + 0
+	.set	.LANCHOR111,. + 0
 	.type	p_gc_blk_tbl, %object
 	.size	p_gc_blk_tbl, 4
 p_gc_blk_tbl:
 	.space	4
 	.section	.bss.p_gc_data_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR104,. + 0
+	.set	.LANCHOR107,. + 0
 	.type	p_gc_data_buf, %object
 	.size	p_gc_data_buf, 4
 p_gc_data_buf:
 	.space	4
 	.section	.bss.p_gc_page_info,"aw",%nobits
 	.align	2
-	.set	.LANCHOR111,. + 0
+	.set	.LANCHOR114,. + 0
 	.type	p_gc_page_info, %object
 	.size	p_gc_page_info, 4
 p_gc_page_info:
 	.space	4
 	.section	.bss.p_gc_spare_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR105,. + 0
+	.set	.LANCHOR108,. + 0
 	.type	p_gc_spare_buf, %object
 	.size	p_gc_spare_buf, 4
 p_gc_spare_buf:
 	.space	4
 	.section	.bss.p_io_data_buf_0,"aw",%nobits
 	.align	2
-	.set	.LANCHOR186,. + 0
+	.set	.LANCHOR193,. + 0
 	.type	p_io_data_buf_0, %object
 	.size	p_io_data_buf_0, 4
 p_io_data_buf_0:
 	.space	4
 	.section	.bss.p_io_data_buf_1,"aw",%nobits
 	.align	2
-	.set	.LANCHOR187,. + 0
+	.set	.LANCHOR194,. + 0
 	.type	p_io_data_buf_1, %object
 	.size	p_io_data_buf_1, 4
 p_io_data_buf_1:
 	.space	4
 	.section	.bss.p_io_spare_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR189,. + 0
+	.set	.LANCHOR196,. + 0
 	.type	p_io_spare_buf, %object
 	.size	p_io_spare_buf, 4
 p_io_spare_buf:
 	.space	4
 	.section	.bss.p_l2p_map_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR126,. + 0
+	.set	.LANCHOR129,. + 0
 	.type	p_l2p_map_buf, %object
 	.size	p_l2p_map_buf, 4
 p_l2p_map_buf:
 	.space	4
 	.section	.bss.p_l2p_ram_map,"aw",%nobits
 	.align	2
-	.set	.LANCHOR96,. + 0
+	.set	.LANCHOR98,. + 0
 	.type	p_l2p_ram_map, %object
 	.size	p_l2p_ram_map, 4
 p_l2p_ram_map:
 	.space	4
 	.section	.bss.p_map_block_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR129,. + 0
+	.set	.LANCHOR132,. + 0
 	.type	p_map_block_table, %object
 	.size	p_map_block_table, 4
 p_map_block_table:
 	.space	4
 	.section	.bss.p_map_block_valid_page_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR125,. + 0
+	.set	.LANCHOR128,. + 0
 	.type	p_map_block_valid_page_count, %object
 	.size	p_map_block_valid_page_count, 4
 p_map_block_valid_page_count:
 	.space	4
 	.section	.bss.p_map_block_ver_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR130,. + 0
+	.set	.LANCHOR133,. + 0
 	.type	p_map_block_ver_table, %object
 	.size	p_map_block_ver_table, 4
 p_map_block_ver_table:
 	.space	4
 	.section	.bss.p_map_region_ppn_check_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR195,. + 0
+	.set	.LANCHOR203,. + 0
 	.type	p_map_region_ppn_check_table, %object
 	.size	p_map_region_ppn_check_table, 4
 p_map_region_ppn_check_table:
 	.space	4
 	.section	.bss.p_map_region_ppn_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR131,. + 0
+	.set	.LANCHOR134,. + 0
 	.type	p_map_region_ppn_table, %object
 	.size	p_map_region_ppn_table, 4
 p_map_region_ppn_table:
@@ -24512,41 +25305,35 @@ p_plane_order_table:
 	.space	32
 	.section	.bss.p_swl_mul_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR137,. + 0
+	.set	.LANCHOR140,. + 0
 	.type	p_swl_mul_table, %object
 	.size	p_swl_mul_table, 4
 p_swl_mul_table:
 	.space	4
 	.section	.bss.p_sys_data_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR183,. + 0
+	.set	.LANCHOR189,. + 0
 	.type	p_sys_data_buf, %object
 	.size	p_sys_data_buf, 4
 p_sys_data_buf:
 	.space	4
 	.section	.bss.p_sys_data_buf_1,"aw",%nobits
 	.align	2
-	.set	.LANCHOR184,. + 0
+	.set	.LANCHOR190,. + 0
 	.type	p_sys_data_buf_1, %object
 	.size	p_sys_data_buf_1, 4
 p_sys_data_buf_1:
 	.space	4
 	.section	.bss.p_sys_spare_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR188,. + 0
+	.set	.LANCHOR195,. + 0
 	.type	p_sys_spare_buf, %object
 	.size	p_sys_spare_buf, 4
 p_sys_spare_buf:
-	.space	4
-	.section	.bss.p_valid_page_count_check_table,"aw",%nobits
-	.align	2
-	.type	p_valid_page_count_check_table, %object
-	.size	p_valid_page_count_check_table, 4
-p_valid_page_count_check_table:
 	.space	4
 	.section	.bss.p_valid_page_count_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR83,. + 0
+	.set	.LANCHOR85,. + 0
 	.type	p_valid_page_count_table, %object
 	.size	p_valid_page_count_table, 4
 p_valid_page_count_table:
@@ -24560,31 +25347,45 @@ p_vendor_block_table:
 	.space	4
 	.section	.bss.p_vendor_block_valid_page_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR192,. + 0
+	.set	.LANCHOR200,. + 0
 	.type	p_vendor_block_valid_page_count, %object
 	.size	p_vendor_block_valid_page_count, 4
 p_vendor_block_valid_page_count:
 	.space	4
 	.section	.bss.p_vendor_block_ver_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR193,. + 0
+	.set	.LANCHOR201,. + 0
 	.type	p_vendor_block_ver_table, %object
 	.size	p_vendor_block_ver_table, 4
 p_vendor_block_ver_table:
 	.space	4
 	.section	.bss.p_vendor_data_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR185,. + 0
+	.set	.LANCHOR191,. + 0
 	.type	p_vendor_data_buf, %object
 	.size	p_vendor_data_buf, 4
 p_vendor_data_buf:
 	.space	4
 	.section	.bss.p_vendor_region_ppn_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR194,. + 0
+	.set	.LANCHOR202,. + 0
 	.type	p_vendor_region_ppn_table, %object
 	.size	p_vendor_region_ppn_table, 4
 p_vendor_region_ppn_table:
+	.space	4
+	.section	.bss.p_wr_io_data_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR192,. + 0
+	.type	p_wr_io_data_buf, %object
+	.size	p_wr_io_data_buf, 4
+p_wr_io_data_buf:
+	.space	4
+	.section	.bss.p_wr_io_spare_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR197,. + 0
+	.type	p_wr_io_spare_buf, %object
+	.size	p_wr_io_spare_buf, 4
+p_wr_io_spare_buf:
 	.space	4
 	.section	.bss.read_retry_cur_offset,"aw",%nobits
 	.set	.LANCHOR21,. + 0
@@ -24594,53 +25395,60 @@ read_retry_cur_offset:
 	.space	4
 	.section	.bss.req_erase,"aw",%nobits
 	.align	2
-	.set	.LANCHOR77,. + 0
+	.set	.LANCHOR79,. + 0
 	.type	req_erase, %object
 	.size	req_erase, 4
 req_erase:
 	.space	4
 	.section	.bss.req_gc,"aw",%nobits
 	.align	2
-	.set	.LANCHOR106,. + 0
+	.set	.LANCHOR109,. + 0
 	.type	req_gc, %object
 	.size	req_gc, 4
 req_gc:
 	.space	4
 	.section	.bss.req_gc_dst,"aw",%nobits
 	.align	2
-	.set	.LANCHOR181,. + 0
+	.set	.LANCHOR187,. + 0
 	.type	req_gc_dst, %object
 	.size	req_gc_dst, 4
 req_gc_dst:
 	.space	4
 	.section	.bss.req_prgm,"aw",%nobits
 	.align	2
-	.set	.LANCHOR182,. + 0
+	.set	.LANCHOR188,. + 0
 	.type	req_prgm, %object
 	.size	req_prgm, 4
 req_prgm:
 	.space	4
 	.section	.bss.req_read,"aw",%nobits
 	.align	2
-	.set	.LANCHOR180,. + 0
+	.set	.LANCHOR186,. + 0
 	.type	req_read, %object
 	.size	req_read, 4
 req_read:
 	.space	4
 	.section	.bss.req_sys,"aw",%nobits
 	.align	2
-	.set	.LANCHOR203,. + 0
+	.set	.LANCHOR211,. + 0
 	.type	req_sys, %object
 	.size	req_sys, 36
 req_sys:
 	.space	36
+	.section	.bss.req_wr_io,"aw",%nobits
+	.align	2
+	.set	.LANCHOR73,. + 0
+	.type	req_wr_io, %object
+	.size	req_wr_io, 4
+req_wr_io:
+	.space	4
 	.section	.bss.slcPageToMlcPageTbl,"aw",%nobits
 	.align	2
-	.set	.LANCHOR16,. + 0
+	.set	.LANCHOR17,. + 0
 	.type	slcPageToMlcPageTbl, %object
-	.size	slcPageToMlcPageTbl, 512
+	.size	slcPageToMlcPageTbl, 1024
 slcPageToMlcPageTbl:
-	.space	512
+	.space	1024
 	.section	.data.FtlMallocOffset,"aw",%progbits
 	.align	2
 	.type	FtlMallocOffset, %object
@@ -24655,9 +25463,9 @@ LastWritenPbaAddr:
 	.word	-1
 	.section	.data.NandFlashParaTbl,"aw",%progbits
 	.align	1
-	.set	.LANCHOR142,. + 0
+	.set	.LANCHOR145,. + 0
 	.type	NandFlashParaTbl, %object
-	.size	NandFlashParaTbl, 2592
+	.size	NandFlashParaTbl, 2752
 NandFlashParaTbl:
 	.byte	6
 	.byte	44
@@ -25362,6 +26170,32 @@ NandFlashParaTbl:
 	.byte	0
 	.space	4
 	.byte	6
+	.byte	44
+	.byte	-92
+	.byte	100
+	.byte	50
+	.byte	-86
+	.byte	4
+	.byte	4
+	.byte	1
+	.byte	32
+	.short	1024
+	.byte	2
+	.byte	1
+	.short	2192
+	.short	1479
+	.byte	10
+	.byte	19
+	.byte	60
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	4
+	.byte	0
+	.byte	1
+	.byte	0
+	.space	4
+	.byte	6
 	.byte	-83
 	.byte	-34
 	.byte	-108
@@ -25933,6 +26767,58 @@ NandFlashParaTbl:
 	.byte	0
 	.byte	0
 	.space	4
+	.byte	5
+	.byte	-119
+	.byte	-124
+	.byte	100
+	.byte	60
+	.byte	-91
+	.byte	0
+	.byte	7
+	.byte	1
+	.byte	32
+	.short	512
+	.byte	2
+	.byte	2
+	.short	1024
+	.short	455
+	.byte	4
+	.byte	17
+	.byte	40
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	6
+	.byte	-119
+	.byte	-120
+	.byte	36
+	.byte	59
+	.byte	-87
+	.byte	0
+	.byte	7
+	.byte	1
+	.byte	16
+	.short	192
+	.byte	2
+	.byte	2
+	.short	2048
+	.short	279
+	.byte	12
+	.byte	0
+	.byte	24
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
 	.byte	6
 	.byte	-104
 	.byte	-41
@@ -26298,6 +27184,32 @@ NandFlashParaTbl:
 	.byte	0
 	.space	4
 	.byte	6
+	.byte	-104
+	.byte	-34
+	.byte	-108
+	.byte	-109
+	.byte	118
+	.byte	-47
+	.byte	1
+	.byte	1
+	.byte	32
+	.short	256
+	.byte	2
+	.byte	2
+	.short	1074
+	.short	1497
+	.byte	2
+	.byte	35
+	.byte	40
+	.byte	32
+	.byte	3
+	.byte	1
+	.byte	4
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	6
 	.byte	69
 	.byte	-34
 	.byte	-108
@@ -26609,7 +27521,7 @@ NandFlashParaTbl:
 	.byte	0
 	.byte	0
 	.space	4
-	.byte	6
+	.byte	5
 	.byte	-20
 	.byte	-41
 	.byte	-108
@@ -26765,8 +27677,34 @@ NandFlashParaTbl:
 	.byte	0
 	.byte	0
 	.space	4
+	.byte	6
+	.byte	-20
+	.byte	-34
+	.byte	-108
+	.byte	-61
+	.byte	-92
+	.byte	-54
+	.byte	0
+	.byte	1
+	.byte	32
+	.short	792
+	.byte	2
+	.byte	1
+	.short	688
+	.short	1217
+	.byte	11
+	.byte	50
+	.byte	40
+	.byte	32
+	.byte	3
+	.byte	1
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.space	4
 	.section	.data.NandOptPara,"aw",%progbits
-	.set	.LANCHOR143,. + 0
+	.set	.LANCHOR146,. + 0
 	.type	NandOptPara, %object
 	.size	NandOptPara, 128
 NandOptPara:
@@ -26847,7 +27785,7 @@ NandOptPara:
 	.byte	0
 	.space	14
 	.section	.data.SamsungRefValue,"aw",%progbits
-	.set	.LANCHOR13,. + 0
+	.set	.LANCHOR14,. + 0
 	.type	SamsungRefValue, %object
 	.size	SamsungRefValue, 64
 SamsungRefValue:
@@ -26916,7 +27854,7 @@ SamsungRefValue:
 	.byte	2
 	.byte	0
 	.section	.data.Toshiba15RefValue,"aw",%progbits
-	.set	.LANCHOR10,. + 0
+	.set	.LANCHOR11,. + 0
 	.type	Toshiba15RefValue, %object
 	.size	Toshiba15RefValue, 95
 Toshiba15RefValue:
@@ -27016,7 +27954,7 @@ Toshiba15RefValue:
 	.byte	114
 	.byte	0
 	.section	.data.ToshibaA19RefValue,"aw",%progbits
-	.set	.LANCHOR8,. + 0
+	.set	.LANCHOR9,. + 0
 	.type	ToshibaA19RefValue, %object
 	.size	ToshibaA19RefValue, 45
 ToshibaA19RefValue:
@@ -27066,7 +28004,7 @@ ToshibaA19RefValue:
 	.byte	124
 	.byte	0
 	.section	.data.ToshibaRefValue,"aw",%progbits
-	.set	.LANCHOR11,. + 0
+	.set	.LANCHOR12,. + 0
 	.type	ToshibaRefValue, %object
 	.size	ToshibaRefValue, 8
 ToshibaRefValue:
@@ -27080,14 +28018,14 @@ ToshibaRefValue:
 	.byte	112
 	.section	.data.ftl_gc_temp_block_bops_scan_page_addr,"aw",%progbits
 	.align	1
-	.set	.LANCHOR241,. + 0
+	.set	.LANCHOR245,. + 0
 	.type	ftl_gc_temp_block_bops_scan_page_addr, %object
 	.size	ftl_gc_temp_block_bops_scan_page_addr, 2
 ftl_gc_temp_block_bops_scan_page_addr:
 	.short	-1
 	.section	.data.gFtlInitStatus,"aw",%progbits
 	.align	2
-	.set	.LANCHOR232,. + 0
+	.set	.LANCHOR247,. + 0
 	.type	gFtlInitStatus, %object
 	.size	gFtlInitStatus, 4
 gFtlInitStatus:
@@ -27122,7 +28060,7 @@ gNandParaInfo:
 	.space	4
 	.section	.data.gSlcNandParaInfo,"aw",%progbits
 	.align	1
-	.set	.LANCHOR201,. + 0
+	.set	.LANCHOR209,. + 0
 	.type	gSlcNandParaInfo, %object
 	.size	gSlcNandParaInfo, 32
 gSlcNandParaInfo:
@@ -27293,7 +28231,7 @@ random_seed:
 	.short	17598
 	.short	28087
 	.section	.data.refValueDefault,"aw",%progbits
-	.set	.LANCHOR196,. + 0
+	.set	.LANCHOR204,. + 0
 	.type	refValueDefault, %object
 	.size	refValueDefault, 28
 refValueDefault:
@@ -27336,69 +28274,76 @@ refValueDefault:
 .LC1:
 	.ascii	"FlashEraseBlocks pageAddr error %x\012\000"
 	.section	.rodata.FlashInit.str1.1,"aMS",%progbits,1
-.LC23:
-	.ascii	"No.%d FLASH ID:%x %x %x %x %x %x\012\000"
 .LC24:
+	.ascii	"No.%d FLASH ID:%x %x %x %x %x %x\012\000"
+.LC25:
 	.ascii	"FlashLoadPhyInfo fail %x!!\012\000"
 	.section	.rodata.FlashProgSlc2KPages.str1.1,"aMS",%progbits,1
-.LC29:
-	.ascii	"prog error: = %x\012\000"
 .LC30:
-	.ascii	"prog read error: = %x\012\000"
+	.ascii	"prog error: = %x\012\000"
 .LC31:
-	.ascii	"prog read s error: = %x %x %x\012\000"
+	.ascii	"prog read error: = %x\012\000"
 .LC32:
+	.ascii	"prog read REFRESH: = %x\012\000"
+.LC33:
+	.ascii	"prog read s error: = %x %x %x\012\000"
+.LC34:
 	.ascii	"prog read d error: = %x %x %x\012\000"
 	.section	.rodata.FlashReadFacBbtData.str1.1,"aMS",%progbits,1
-.LC56:
+.LC59:
 	.ascii	"BBT:\000"
 	.section	.rodata.FlashReadIdbDataRaw.str1.1,"aMS",%progbits,1
-.LC14:
+.LC15:
 	.ascii	"ECC:%d\012\000"
 	.section	.rodata.FlashReadPage.str1.1,"aMS",%progbits,1
 .LC12:
 	.ascii	"read retry status %x %x %x\012\000"
 	.section	.rodata.FlashReadPages.str1.1,"aMS",%progbits,1
-.LC28:
+.LC29:
 	.ascii	"ReadRetry pageadd=%x ecc=%x err=%x\012\000"
 	.section	.rodata.FlashReadSlc2KPages.str1.1,"aMS",%progbits,1
-.LC25:
-	.ascii	"Read pageadd=%x  ecc=%x err=%x\012\000"
 .LC26:
-	.ascii	"data:\000"
+	.ascii	"Read pageadd=%x  ecc=%x err=%x\012\000"
 .LC27:
+	.ascii	"data:\000"
+.LC28:
 	.ascii	"spare:\000"
 	.section	.rodata.FtlBbmMapBadBlock.str1.1,"aMS",%progbits,1
 .LC2:
 	.ascii	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\012"
 	.ascii	"\000"
 	.section	.rodata.FtlBbmTblFlush.str1.1,"aMS",%progbits,1
-.LC33:
+.LC35:
 	.ascii	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\012\000"
-.LC34:
+.LC36:
 	.ascii	"FtlBbmTblFlush error:%x\012\000"
-.LC35:
+.LC37:
 	.ascii	"FtlBbmTblFlush error = %x error count = %d\012\000"
+	.section	.rodata.FtlCacheWriteBack.str1.1,"aMS",%progbits,1
+.LC76:
+	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
 	.section	.rodata.FtlCheckVpc.str1.1,"aMS",%progbits,1
-.LC61:
+.LC63:
 	.ascii	"FtlCheckVpc2 %x = %x  %x\012\000"
-.LC62:
+.LC64:
 	.ascii	"free blk vpc error %x = %x  %x\012\000"
+.LC65:
+	.ascii	"error_flag %x\012\000"
 	.section	.rodata.FtlDumpBlockInfo.str1.1,"aMS",%progbits,1
-.LC46:
+.LC48:
 	.ascii	"...%s enter...\012\000"
-.LC47:
+.LC49:
 	.ascii	"superBlkID = %x vpc=%x\012\000"
-.LC48:
+.LC50:
 	.ascii	"flashmode = %x pagenum = %x %x\012\000"
-.LC49:
+.LC51:
 	.ascii	"id = %x,%x addr= %x,spare= %x %x %x %x data=%x %x\012"
 	.ascii	"\000"
 	.section	.rodata.FtlDumpSysBlock.str1.1,"aMS",%progbits,1
-.LC79:
+.LC84:
 	.ascii	"id = %x,%x addr= %x,spare= %x %x %x %x data = %x\012"
 	.ascii	"\000"
-.LC80:
+.LC85:
 	.ascii	":\000"
 	.section	.rodata.FtlFreeSysBlkQueueOut.str1.1,"aMS",%progbits,1
 .LC3:
@@ -27407,76 +28352,76 @@ refValueDefault:
 	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\012"
 	.ascii	"\000"
 	.section	.rodata.FtlGcFreeTempBlock.str1.1,"aMS",%progbits,1
-.LC71:
+.LC74:
 	.ascii	"GC des block %x done\012\000"
 	.section	.rodata.FtlGcScanTempBlk.str1.1,"aMS",%progbits,1
-.LC69:
+.LC72:
 	.ascii	"FtlGcScanTempBlk Error ID %x %x!!!!!!! \012\000"
-.LC70:
+.LC73:
 	.ascii	"FtlGcScanTempBlkError ID %x %x!!!!!!!\012\000"
 	.section	.rodata.FtlInit.str1.1,"aMS",%progbits,1
-.LC72:
-	.ascii	"FTL version: 5.0.57 20190828\000"
-.LC73:
+.LC77:
+	.ascii	"FTL version: 5.0.63 20200923\000"
+.LC78:
 	.ascii	"...%s: no bad block mapping table, format device\012"
 	.ascii	"\000"
-.LC74:
+.LC79:
 	.ascii	"...%s FtlSysBlkInit error ,format device!\012\000"
 	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",%progbits,1
-.LC43:
+.LC45:
 	.ascii	"no ect\000"
 	.section	.rodata.FtlLoadSysInfo.str1.1,"aMS",%progbits,1
-.LC45:
+.LC47:
 	.ascii	"id = %x,%x addr= %x,spare= %x %x %x %x data= %x\012"
 	.ascii	"\000"
+	.section	.rodata.FtlLowFormat.str1.1,"aMS",%progbits,1
+.LC75:
+	.ascii	"too many bad block  = %d %d\012\000"
 	.section	.rodata.FtlMapWritePage.str1.1,"aMS",%progbits,1
-.LC40:
+.LC42:
 	.ascii	"FtlMapWritePage error = %x\012\000"
-.LC41:
+.LC43:
 	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
-	.section	.rodata.FtlProgPages.str1.1,"aMS",%progbits,1
-.LC60:
-	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
 	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",%progbits,1
-.LC66:
+.LC69:
 	.ascii	"RSB refresh addr %x\012\000"
-.LC67:
+.LC70:
 	.ascii	"spuer block %x vpn is 0\012 \000"
-.LC68:
+.LC71:
 	.ascii	"g_recovery_ppa %x ver %x\012 \000"
 	.section	.rodata.FtlScanAllBlock.str1.1,"aMS",%progbits,1
-.LC50:
+.LC52:
 	.ascii	"blk = %x vpc=%x mode = %x\012\000"
-.LC51:
+.LC53:
 	.ascii	"mlc id = %x,%x addr= %x,spare= %x %x %x %x data=%x "
 	.ascii	"%x\012\000"
-.LC52:
+.LC54:
 	.ascii	"slc id = %x,%x addr= %x,spare= %x %x %x %x data=%x "
 	.ascii	"%x\012\000"
 	.section	.rodata.FtlVendorPartRead.str1.1,"aMS",%progbits,1
-.LC42:
+.LC44:
 	.ascii	"FtlVendorPartRead refresh = %x phyAddr = %x\012\000"
 	.section	.rodata.FtlVpcTblFlush.str1.1,"aMS",%progbits,1
-.LC38:
+.LC40:
 	.ascii	"FtlVpcTblFlush error = %x error count = %d\012\000"
 	.section	.rodata.FtlWrite.str1.1,"aMS",%progbits,1
-.LC78:
+.LC83:
 	.ascii	"FtlWrite: lpa error:%x %x\012\000"
 	.section	.rodata.Ftl_load_ext_data.str1.1,"aMS",%progbits,1
-.LC44:
+.LC46:
 	.ascii	"slc mode\000"
 	.section	.rodata.Ftlscanalldata.str1.1,"aMS",%progbits,1
-.LC63:
+.LC66:
 	.ascii	"Ftlscanalldata = %x\012\000"
-.LC64:
+.LC67:
 	.ascii	"scan lpa = %x ppa= %x\012\000"
-.LC65:
+.LC68:
 	.ascii	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\012"
 	.ascii	"\000"
 	.section	.rodata.HynixGetReadRetryDefault.str1.1,"aMS",%progbits,1
-.LC21:
-	.ascii	"otp error! %d\000"
 .LC22:
+	.ascii	"otp error! %d\000"
+.LC23:
 	.ascii	"rr\000"
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",%progbits,1
 .LC5:
@@ -27488,266 +28433,406 @@ refValueDefault:
 	.section	.rodata.MicronReadRetrial.str1.1,"aMS",%progbits,1
 .LC13:
 	.ascii	"micron RR %d row=%x,count %d,status=%d\012\000"
-	.section	.rodata.__func__.10478,"a",%progbits
-	.set	.LANCHOR248,. + 0
-	.type	__func__.10478, %object
-	.size	__func__.10478, 8
-__func__.10478:
+	.section	.rodata.__func__.10657,"a",%progbits
+	.set	.LANCHOR255,. + 0
+	.type	__func__.10657, %object
+	.size	__func__.10657, 8
+__func__.10657:
 	.ascii	"FtlInit\000"
-	.section	.rodata.__func__.10539,"a",%progbits
-	.set	.LANCHOR230,. + 0
-	.type	__func__.10539, %object
-	.size	__func__.10539, 13
-__func__.10539:
-	.ascii	"FtlProgPages\000"
-	.section	.rodata.__func__.10565,"a",%progbits
-	.set	.LANCHOR250,. + 0
-	.type	__func__.10565, %object
-	.size	__func__.10565, 9
-__func__.10565:
+	.section	.rodata.__func__.10761,"a",%progbits
+	.set	.LANCHOR258,. + 0
+	.type	__func__.10761, %object
+	.size	__func__.10761, 9
+__func__.10761:
 	.ascii	"FtlWrite\000"
-	.section	.rodata.__func__.10648,"a",%progbits
-	.set	.LANCHOR124,. + 0
-	.type	__func__.10648, %object
-	.size	__func__.10648, 14
-__func__.10648:
+	.section	.rodata.__func__.10851,"a",%progbits
+	.set	.LANCHOR127,. + 0
+	.type	__func__.10851, %object
+	.size	__func__.10851, 14
+__func__.10851:
 	.ascii	"FtlBbt2Bitmap\000"
-	.section	.rodata.__func__.10694,"a",%progbits
-	.set	.LANCHOR212,. + 0
-	.type	__func__.10694, %object
-	.size	__func__.10694, 11
-__func__.10694:
+	.section	.rodata.__func__.10897,"a",%progbits
+	.set	.LANCHOR220,. + 0
+	.type	__func__.10897, %object
+	.size	__func__.10897, 11
+__func__.10897:
 	.ascii	"FtlLoadBbt\000"
-	.section	.rodata.__func__.10787,"a",%progbits
-	.set	.LANCHOR89,. + 0
-	.type	__func__.10787, %object
-	.size	__func__.10787, 17
-__func__.10787:
+	.section	.rodata.__func__.10990,"a",%progbits
+	.set	.LANCHOR91,. + 0
+	.type	__func__.10990, %object
+	.size	__func__.10990, 17
+__func__.10990:
 	.ascii	"INSERT_FREE_LIST\000"
-	.section	.rodata.__func__.10791,"a",%progbits
-	.set	.LANCHOR86,. + 0
-	.type	__func__.10791, %object
-	.size	__func__.10791, 17
-__func__.10791:
+	.section	.rodata.__func__.10994,"a",%progbits
+	.set	.LANCHOR88,. + 0
+	.type	__func__.10994, %object
+	.size	__func__.10994, 17
+__func__.10994:
 	.ascii	"INSERT_DATA_LIST\000"
-	.section	.rodata.__func__.10828,"a",%progbits
-	.set	.LANCHOR90,. + 0
-	.type	__func__.10828, %object
-	.size	__func__.10828, 17
-__func__.10828:
+	.section	.rodata.__func__.11032,"a",%progbits
+	.set	.LANCHOR92,. + 0
+	.type	__func__.11032, %object
+	.size	__func__.11032, 17
+__func__.11032:
 	.ascii	"List_remove_node\000"
-	.section	.rodata.__func__.10858,"a",%progbits
-	.set	.LANCHOR94,. + 0
-	.type	__func__.10858, %object
-	.size	__func__.10858, 22
-__func__.10858:
+	.section	.rodata.__func__.11062,"a",%progbits
+	.set	.LANCHOR96,. + 0
+	.type	__func__.11062, %object
+	.size	__func__.11062, 22
+__func__.11062:
 	.ascii	"List_update_data_list\000"
-	.section	.rodata.__func__.10865,"a",%progbits
-	.set	.LANCHOR229,. + 0
-	.type	__func__.10865, %object
-	.size	__func__.10865, 20
-__func__.10865:
+	.section	.rodata.__func__.11069,"a",%progbits
+	.set	.LANCHOR237,. + 0
+	.type	__func__.11069, %object
+	.size	__func__.11069, 20
+__func__.11069:
 	.ascii	"ftl_load_l2p_region\000"
-	.section	.rodata.__func__.10896,"a",%progbits
-	.set	.LANCHOR95,. + 0
-	.type	__func__.10896, %object
-	.size	__func__.10896, 26
-__func__.10896:
+	.section	.rodata.__func__.11100,"a",%progbits
+	.set	.LANCHOR97,. + 0
+	.type	__func__.11100, %object
+	.size	__func__.11100, 26
+__func__.11100:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.section	.rodata.__func__.10906,"a",%progbits
-	.set	.LANCHOR213,. + 0
-	.type	__func__.10906, %object
-	.size	__func__.10906, 15
-__func__.10906:
+	.section	.rodata.__func__.11110,"a",%progbits
+	.set	.LANCHOR221,. + 0
+	.type	__func__.11110, %object
+	.size	__func__.11110, 15
+__func__.11110:
 	.ascii	"ftl_map_blk_gc\000"
-	.section	.rodata.__func__.10919,"a",%progbits
-	.set	.LANCHOR214,. + 0
-	.type	__func__.10919, %object
-	.size	__func__.10919, 31
-__func__.10919:
+	.section	.rodata.__func__.11123,"a",%progbits
+	.set	.LANCHOR222,. + 0
+	.type	__func__.11123, %object
+	.size	__func__.11123, 31
+__func__.11123:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.section	.rodata.__func__.10932,"a",%progbits
-	.set	.LANCHOR215,. + 0
-	.type	__func__.10932, %object
-	.size	__func__.10932, 16
-__func__.10932:
+	.section	.rodata.__func__.11136,"a",%progbits
+	.set	.LANCHOR223,. + 0
+	.type	__func__.11136, %object
+	.size	__func__.11136, 16
+__func__.11136:
 	.ascii	"FtlMapWritePage\000"
-	.section	.rodata.__func__.10952,"a",%progbits
-	.set	.LANCHOR98,. + 0
-	.type	__func__.10952, %object
-	.size	__func__.10952, 22
-__func__.10952:
+	.section	.rodata.__func__.11156,"a",%progbits
+	.set	.LANCHOR100,. + 0
+	.type	__func__.11156, %object
+	.size	__func__.11156, 22
+__func__.11156:
 	.ascii	"select_l2p_ram_region\000"
-	.section	.rodata.__func__.10968,"a",%progbits
-	.set	.LANCHOR228,. + 0
-	.type	__func__.10968, %object
-	.size	__func__.10968, 9
-__func__.10968:
+	.section	.rodata.__func__.11172,"a",%progbits
+	.set	.LANCHOR236,. + 0
+	.type	__func__.11172, %object
+	.size	__func__.11172, 9
+__func__.11172:
 	.ascii	"log2phys\000"
-	.section	.rodata.__func__.11030,"a",%progbits
-	.set	.LANCHOR211,. + 0
-	.type	__func__.11030, %object
-	.size	__func__.11030, 15
-__func__.11030:
+	.section	.rodata.__func__.11234,"a",%progbits
+	.set	.LANCHOR219,. + 0
+	.type	__func__.11234, %object
+	.size	__func__.11234, 15
+__func__.11234:
 	.ascii	"FtlVpcTblFlush\000"
-	.section	.rodata.__func__.11049,"a",%progbits
-	.set	.LANCHOR221,. + 0
-	.type	__func__.11049, %object
-	.size	__func__.11049, 14
-__func__.11049:
+	.section	.rodata.__func__.11253,"a",%progbits
+	.set	.LANCHOR229,. + 0
+	.type	__func__.11253, %object
+	.size	__func__.11253, 14
+__func__.11253:
 	.ascii	"FtlScanSysBlk\000"
-	.section	.rodata.__func__.11104,"a",%progbits
-	.set	.LANCHOR222,. + 0
-	.type	__func__.11104, %object
-	.size	__func__.11104, 15
-__func__.11104:
+	.section	.rodata.__func__.11308,"a",%progbits
+	.set	.LANCHOR230,. + 0
+	.type	__func__.11308, %object
+	.size	__func__.11308, 15
+__func__.11308:
 	.ascii	"FtlLoadSysInfo\000"
-	.section	.rodata.__func__.11115,"a",%progbits
-	.set	.LANCHOR234,. + 0
-	.type	__func__.11115, %object
-	.size	__func__.11115, 12
-__func__.11115:
+	.section	.rodata.__func__.11319,"a",%progbits
+	.set	.LANCHOR238,. + 0
+	.type	__func__.11319, %object
+	.size	__func__.11319, 12
+__func__.11319:
 	.ascii	"FtlCheckVpc\000"
-	.section	.rodata.__func__.11147,"a",%progbits
-	.set	.LANCHOR225,. + 0
-	.type	__func__.11147, %object
-	.size	__func__.11147, 17
-__func__.11147:
+	.section	.rodata.__func__.11351,"a",%progbits
+	.set	.LANCHOR233,. + 0
+	.type	__func__.11351, %object
+	.size	__func__.11351, 17
+__func__.11351:
 	.ascii	"FtlDumpBlockInfo\000"
-	.section	.rodata.__func__.11166,"a",%progbits
-	.set	.LANCHOR226,. + 0
-	.type	__func__.11166, %object
-	.size	__func__.11166, 16
-__func__.11166:
+	.section	.rodata.__func__.11370,"a",%progbits
+	.set	.LANCHOR234,. + 0
+	.type	__func__.11370, %object
+	.size	__func__.11370, 16
+__func__.11370:
 	.ascii	"FtlScanAllBlock\000"
-	.section	.rodata.__func__.11271,"a",%progbits
-	.set	.LANCHOR235,. + 0
-	.type	__func__.11271, %object
-	.size	__func__.11271, 16
-__func__.11271:
+	.section	.rodata.__func__.11475,"a",%progbits
+	.set	.LANCHOR239,. + 0
+	.type	__func__.11475, %object
+	.size	__func__.11475, 16
+__func__.11475:
 	.ascii	"FtlReUsePrevPpa\000"
-	.section	.rodata.__func__.11304,"a",%progbits
-	.set	.LANCHOR236,. + 0
-	.type	__func__.11304, %object
-	.size	__func__.11304, 22
-__func__.11304:
+	.section	.rodata.__func__.11508,"a",%progbits
+	.set	.LANCHOR240,. + 0
+	.type	__func__.11508, %object
+	.size	__func__.11508, 22
+__func__.11508:
 	.ascii	"FtlRecoverySuperblock\000"
-	.section	.rodata.__func__.11358,"a",%progbits
-	.set	.LANCHOR101,. + 0
-	.type	__func__.11358, %object
-	.size	__func__.11358, 16
-__func__.11358:
+	.section	.rodata.__func__.11562,"a",%progbits
+	.set	.LANCHOR103,. + 0
+	.type	__func__.11562, %object
+	.size	__func__.11562, 16
+__func__.11562:
 	.ascii	"make_superblock\000"
-	.section	.rodata.__func__.11378,"a",%progbits
-	.set	.LANCHOR140,. + 0
-	.type	__func__.11378, %object
-	.size	__func__.11378, 18
-__func__.11378:
+	.section	.rodata.__func__.11582,"a",%progbits
+	.set	.LANCHOR143,. + 0
+	.type	__func__.11582, %object
+	.size	__func__.11582, 18
+__func__.11582:
 	.ascii	"SupperBlkListInit\000"
-	.section	.rodata.__func__.11422,"a",%progbits
-	.set	.LANCHOR227,. + 0
-	.type	__func__.11422, %object
-	.size	__func__.11422, 17
-__func__.11422:
+	.section	.rodata.__func__.11628,"a",%progbits
+	.set	.LANCHOR235,. + 0
+	.type	__func__.11628, %object
+	.size	__func__.11628, 17
+__func__.11628:
 	.ascii	"ftl_scan_all_ppa\000"
-	.section	.rodata.__func__.11467,"a",%progbits
-	.set	.LANCHOR204,. + 0
-	.type	__func__.11467, %object
-	.size	__func__.11467, 25
-__func__.11467:
+	.section	.rodata.__func__.11673,"a",%progbits
+	.set	.LANCHOR212,. + 0
+	.type	__func__.11673, %object
+	.size	__func__.11673, 25
+__func__.11673:
 	.ascii	"allocate_data_superblock\000"
-	.section	.rodata.__func__.11481,"a",%progbits
-	.set	.LANCHOR220,. + 0
-	.type	__func__.11481, %object
-	.size	__func__.11481, 29
-__func__.11481:
+	.section	.rodata.__func__.11687,"a",%progbits
+	.set	.LANCHOR228,. + 0
+	.type	__func__.11687, %object
+	.size	__func__.11687, 29
+__func__.11687:
 	.ascii	"allocate_new_data_superblock\000"
-	.section	.rodata.__func__.11487,"a",%progbits
-	.set	.LANCHOR209,. + 0
-	.type	__func__.11487, %object
-	.size	__func__.11487, 19
-__func__.11487:
+	.section	.rodata.__func__.11693,"a",%progbits
+	.set	.LANCHOR217,. + 0
+	.type	__func__.11693, %object
+	.size	__func__.11693, 19
+__func__.11693:
 	.ascii	"get_new_active_ppa\000"
-	.section	.rodata.__func__.11498,"a",%progbits
-	.set	.LANCHOR207,. + 0
-	.type	__func__.11498, %object
-	.size	__func__.11498, 16
-__func__.11498:
+	.section	.rodata.__func__.11704,"a",%progbits
+	.set	.LANCHOR215,. + 0
+	.type	__func__.11704, %object
+	.size	__func__.11704, 16
+__func__.11704:
 	.ascii	"update_vpc_list\000"
-	.section	.rodata.__func__.11503,"a",%progbits
-	.set	.LANCHOR208,. + 0
-	.type	__func__.11503, %object
-	.size	__func__.11503, 20
-__func__.11503:
+	.section	.rodata.__func__.11709,"a",%progbits
+	.set	.LANCHOR216,. + 0
+	.type	__func__.11709, %object
+	.size	__func__.11709, 20
+__func__.11709:
 	.ascii	"decrement_vpc_count\000"
-	.section	.rodata.__func__.11571,"a",%progbits
-	.set	.LANCHOR242,. + 0
-	.type	__func__.11571, %object
-	.size	__func__.11571, 19
-__func__.11571:
-	.ascii	"FtlGcFreeTempBlock\000"
-	.section	.rodata.__func__.11671,"a",%progbits
+	.section	.rodata.__func__.11777,"a",%progbits
 	.set	.LANCHOR246,. + 0
-	.type	__func__.11671, %object
-	.size	__func__.11671, 23
-__func__.11671:
-	.ascii	"rk_ftl_garbage_collect\000"
+	.type	__func__.11777, %object
+	.size	__func__.11777, 19
+__func__.11777:
+	.ascii	"FtlGcFreeTempBlock\000"
+	.section	.rodata.__func__.11878,"a",%progbits
+	.set	.LANCHOR251,. + 0
+	.type	__func__.11878, %object
+	.size	__func__.11878, 10
+__func__.11878:
+	.ascii	"ftl_do_gc\000"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",%progbits,1
-.LC36:
+.LC38:
 	.ascii	"decrement_vpc_count %x = %d\012\000"
-.LC37:
+.LC39:
 	.ascii	"decrement_vpc_count %x = %d in free list\012\000"
 	.section	.rodata.dump_map_info.str1.1,"aMS",%progbits,1
-.LC81:
+.LC86:
 	.ascii	"phyBlk = %x,addr= %x,spare= %x %x %x %x data=%x %x\012"
 	.ascii	"\000"
-.LC82:
+.LC87:
 	.ascii	"Mblk:\000"
-.LC83:
+.LC88:
 	.ascii	"L2P:\000"
-.LC84:
+.LC89:
 	.ascii	"L2PC:\000"
 	.section	.rodata.ftl_fix_nand_power_lost_error.str1.1,"aMS",%progbits,1
-.LC76:
+.LC81:
 	.ascii	"fix power lost blk = %x vpc=%x\012\000"
-.LC77:
+.LC82:
 	.ascii	"erase power lost blk = %x vpc=%x\012\000"
 	.section	.rodata.ftl_map_blk_alloc_new_blk.str1.1,"aMS",%progbits,1
 .LC8:
 	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d\012\000"
 	.section	.rodata.ftl_map_blk_gc.str1.1,"aMS",%progbits,1
-.LC39:
+.LC41:
 	.ascii	"page map lost: %x %x\012\000"
 	.section	.rodata.ftl_scan_all_ppa.str1.1,"aMS",%progbits,1
-.LC53:
-	.ascii	"ftl_scan_all_ppa blk %x page %x\012\000"
-.LC54:
+.LC55:
+	.ascii	"ftl_scan_all_ppa blk %x page %x flag: %x\012\000"
+.LC56:
+	.ascii	"ftl_scan_all_ppa blk %x page %x flag: %x .........."
+	.ascii	"..... is bad block\012\000"
+.LC57:
 	.ascii	"addr= %x, status= %d,spare= %x %x %x %x data=%x %x\012"
 	.ascii	"\000"
-.LC55:
+.LC58:
 	.ascii	"%s finished\012\000"
 	.section	.rodata.idb_write_data.str1.1,"aMS",%progbits,1
-.LC15:
-	.ascii	"1 write_idblock fix data %x %x %x\012\000"
 .LC16:
-	.ascii	"write_idblock fail! %x %x %x %x\012\000"
+	.ascii	"1 write_idblock fix data %x %x %x\012\000"
 .LC17:
+	.ascii	"write_idblock fail! %x %x %x %x\012\000"
+.LC18:
 	.ascii	"write_idblock fail! %x\012\000"
 	.section	.rodata.log2phys.str1.1,"aMS",%progbits,1
-.LC57:
+.LC60:
 	.ascii	"region_id = %x phyAddr = %x\012\000"
-.LC58:
+.LC61:
 	.ascii	"map_ppn:\000"
-.LC59:
+.LC62:
 	.ascii	"load_l2p_region refresh = %x phyAddr = %x\012\000"
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",%progbits,1
-.LC75:
+.LC80:
 	.ascii	"FtlInit %x\012\000"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",%progbits,1
-.LC18:
-	.ascii	"%s 0x%x:\000"
 .LC19:
-	.ascii	"%x \000"
+	.ascii	"%s 0x%x:\000"
 .LC20:
+	.ascii	"%x \000"
+.LC21:
 	.ascii	"\000"
+	.section	.rodata.samsung_14nm_mlc_rr,"a",%progbits
+	.set	.LANCHOR151,. + 0
+	.type	samsung_14nm_mlc_rr, %object
+	.size	samsung_14nm_mlc_rr, 104
+samsung_14nm_mlc_rr:
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	-4
+	.byte	3
+	.byte	-4
+	.byte	-6
+	.byte	6
+	.byte	0
+	.byte	6
+	.byte	-10
+	.byte	-10
+	.byte	4
+	.byte	-10
+	.byte	16
+	.byte	12
+	.byte	-4
+	.byte	12
+	.byte	8
+	.byte	-16
+	.byte	10
+	.byte	-16
+	.byte	24
+	.byte	18
+	.byte	-14
+	.byte	18
+	.byte	-4
+	.byte	-22
+	.byte	-16
+	.byte	-22
+	.byte	-8
+	.byte	24
+	.byte	-9
+	.byte	24
+	.byte	8
+	.byte	-28
+	.byte	-4
+	.byte	-28
+	.byte	16
+	.byte	30
+	.byte	10
+	.byte	30
+	.byte	10
+	.byte	-34
+	.byte	6
+	.byte	-34
+	.byte	0
+	.byte	36
+	.byte	-8
+	.byte	36
+	.byte	-8
+	.byte	-40
+	.byte	-2
+	.byte	-40
+	.byte	-20
+	.byte	-46
+	.byte	-4
+	.byte	-46
+	.byte	-30
+	.byte	3
+	.byte	0
+	.byte	3
+	.byte	-3
+	.byte	-2
+	.byte	-4
+	.byte	-2
+	.byte	-6
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-10
+	.byte	-6
+	.byte	-8
+	.byte	-6
+	.byte	-14
+	.byte	-9
+	.byte	-8
+	.byte	-9
+	.byte	-18
+	.byte	-52
+	.byte	22
+	.byte	-52
+	.byte	10
+	.byte	42
+	.byte	4
+	.byte	42
+	.byte	4
+	.byte	48
+	.byte	-9
+	.byte	48
+	.byte	4
+	.byte	-58
+	.byte	12
+	.byte	-58
+	.byte	0
+	.byte	-64
+	.byte	-24
+	.byte	-64
+	.byte	-6
+	.byte	9
+	.byte	18
+	.byte	9
+	.byte	8
+	.section	.rodata.samsung_14nm_slc_rr,"a",%progbits
+	.set	.LANCHOR150,. + 0
+	.type	samsung_14nm_slc_rr, %object
+	.size	samsung_14nm_slc_rr, 26
+samsung_14nm_slc_rr:
+	.byte	0
+	.byte	10
+	.byte	-10
+	.byte	20
+	.byte	-20
+	.byte	30
+	.byte	-30
+	.byte	40
+	.byte	-40
+	.byte	50
+	.byte	-50
+	.byte	60
+	.byte	-60
+	.byte	-70
+	.byte	-80
+	.byte	-90
+	.byte	-100
+	.byte	-110
+	.byte	-120
+	.byte	-9
+	.byte	70
+	.byte	80
+	.byte	90
+	.byte	-125
+	.byte	-115
+	.byte	100
+	.section	.rodata.samsung_read_retrial.str1.1,"aMS",%progbits,1
+.LC14:
+	.ascii	"samsung RR %d row=%x,count %d,status=%d\012\000"
 	.hidden	free
diff --git a/drivers/rknand/rk_ftl_arm_v8.S b/drivers/rknand/rk_ftl_arm_v8.S
index 37fa168782..0294d7190c 100644
--- a/drivers/rknand/rk_ftl_arm_v8.S
+++ b/drivers/rknand/rk_ftl_arm_v8.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2019-08-28
+ * date: 2020-09-23
  */
 	.arch armv8-a
 	.file	"rk_ftl_arm_v8.S"
@@ -45,10 +45,10 @@ flash_read_ecc:
 	ldp	x29, x30, [sp], 32
 	ret
 	.size	flash_read_ecc, .-flash_read_ecc
-	.section	.text.ftl_set_blk_mode.part.10,"ax",@progbits
+	.section	.text.ftl_set_blk_mode.part.11,"ax",@progbits
 	.align	2
-	.type	ftl_set_blk_mode.part.10, %function
-ftl_set_blk_mode.part.10:
+	.type	ftl_set_blk_mode.part.11, %function
+ftl_set_blk_mode.part.11:
 	and	w0, w0, 65535
 	adrp	x2, .LANCHOR1
 	ubfx	x1, x0, 5, 11
@@ -61,7 +61,7 @@ ftl_set_blk_mode.part.10:
 	orr	w0, w0, w2
 	str	w0, [x3, x1]
 	ret
-	.size	ftl_set_blk_mode.part.10, .-ftl_set_blk_mode.part.10
+	.size	ftl_set_blk_mode.part.11, .-ftl_set_blk_mode.part.11
 	.section	.text.FlashMemCmp8,"ax",@progbits
 	.align	2
 	.global	FlashMemCmp8
@@ -181,17 +181,22 @@ FlashSetRandomizer:
 FlashBlockAlignInit:
 	and	w0, w0, 65535
 	adrp	x1, .LANCHOR4
-	cmp	w0, 256
+	cmp	w0, 512
 	bls	.L38
-	mov	w0, 512
-.L41:
+	mov	w0, 1024
+.L42:
 	str	w0, [x1, #:lo12:.LANCHOR4]
 	ret
 .L38:
+	cmp	w0, 256
+	bls	.L40
+	mov	w0, 512
+	b	.L42
+.L40:
 	cmp	w0, 128
-	bls	.L41
+	bls	.L42
 	mov	w0, 256
-	b	.L41
+	b	.L42
 	.size	FlashBlockAlignInit, .-FlashBlockAlignInit
 	.section	.text.FlashReadCmd,"ax",@progbits
 	.align	2
@@ -199,21 +204,33 @@ FlashBlockAlignInit:
 	.type	FlashReadCmd, %function
 FlashReadCmd:
 	and	w0, w0, 255
-	adrp	x4, .LANCHOR0
-	sbfiz	x5, x0, 4, 32
-	add	x4, x4, :lo12:.LANCHOR0
-	add	x2, x4, x5
-	lsr	w3, w1, 16
-	ldr	x4, [x4, x5]
-	ldrb	w2, [x2, 8]
-	add	x2, x4, x2, lsl 8
-	and	w4, w1, 255
+	adrp	x2, .LANCHOR0
+	sbfiz	x3, x0, 4, 32
+	add	x2, x2, :lo12:.LANCHOR0
+	add	x4, x2, x3
+	ldr	x2, [x2, x3]
+	adrp	x3, .LANCHOR7
+	ldrb	w4, [x4, 8]
+	ldr	x3, [x3, #:lo12:.LANCHOR7]
+	ldrb	w3, [x3, 7]
+	cmp	w3, 1
+	bne	.L44
+	sxtw	x3, w4
+	mov	w5, 38
+	add	x3, x3, 8
+	add	x3, x2, x3, lsl 8
+	str	w5, [x3, 8]
+.L44:
+	ubfiz	x4, x4, 8, 8
+	and	w3, w1, 255
+	add	x2, x2, x4
 	str	wzr, [x2, 2056]
 	str	wzr, [x2, 2052]
 	str	wzr, [x2, 2052]
-	str	w4, [x2, 2052]
-	lsr	w4, w1, 8
-	str	w4, [x2, 2052]
+	str	w3, [x2, 2052]
+	lsr	w3, w1, 8
+	str	w3, [x2, 2052]
+	lsr	w3, w1, 16
 	str	w3, [x2, 2052]
 	mov	w3, 48
 	str	w3, [x2, 2056]
@@ -231,14 +248,14 @@ FlashReadDpDataOutCmd:
 	add	x4, x2, x3
 	and	w5, w1, 255
 	ldr	x6, [x2, x3]
-	adrp	x2, .LANCHOR7+16
+	adrp	x2, .LANCHOR8+16
 	lsr	w3, w1, 16
-	ldrb	w2, [x2, #:lo12:.LANCHOR7+16]
+	ldrb	w2, [x2, #:lo12:.LANCHOR8+16]
 	cmp	w2, 1
 	ldrb	w2, [x4, 8]
 	lsr	w4, w1, 8
 	add	x2, x6, x2, lsl 8
-	bne	.L44
+	bne	.L46
 	mov	w6, 6
 	str	w6, [x2, 2056]
 	str	wzr, [x2, 2052]
@@ -246,11 +263,11 @@ FlashReadDpDataOutCmd:
 	str	w5, [x2, 2052]
 	str	w4, [x2, 2052]
 	str	w3, [x2, 2052]
-.L46:
+.L48:
 	mov	w3, 224
 	str	w3, [x2, 2056]
 	b	FlashSetRandomizer
-.L44:
+.L46:
 	str	wzr, [x2, 2056]
 	str	wzr, [x2, 2052]
 	str	wzr, [x2, 2052]
@@ -261,7 +278,7 @@ FlashReadDpDataOutCmd:
 	str	w3, [x2, 2056]
 	str	wzr, [x2, 2052]
 	str	wzr, [x2, 2052]
-	b	.L46
+	b	.L48
 	.size	FlashReadDpDataOutCmd, .-FlashReadDpDataOutCmd
 	.section	.text.FlashProgFirstCmd,"ax",@progbits
 	.align	2
@@ -299,7 +316,7 @@ FlashEraseCmd:
 	add	x4, x3, x0
 	ldr	x3, [x3, x0]
 	ldrb	w0, [x4, 8]
-	cbz	w2, .L49
+	cbz	w2, .L51
 	add	x2, x3, x0, lsl 8
 	mov	w4, 96
 	str	w4, [x2, 2056]
@@ -312,7 +329,7 @@ FlashEraseCmd:
 	adrp	x2, .LANCHOR4
 	ldr	w2, [x2, #:lo12:.LANCHOR4]
 	add	w1, w1, w2
-.L49:
+.L51:
 	add	x0, x3, x0, lsl 8
 	mov	w2, 96
 	str	w2, [x0, 2056]
@@ -332,11 +349,11 @@ FlashEraseCmd:
 	.type	FlashProgDpSecondCmd, %function
 FlashProgDpSecondCmd:
 	and	w0, w0, 255
-	adrp	x2, .LANCHOR7+11
+	adrp	x2, .LANCHOR8+11
 	sbfiz	x5, x0, 4, 32
 	adrp	x4, .LANCHOR0
 	add	x4, x4, :lo12:.LANCHOR0
-	ldrb	w6, [x2, #:lo12:.LANCHOR7+11]
+	ldrb	w6, [x2, #:lo12:.LANCHOR8+11]
 	add	x2, x4, x5
 	lsr	w3, w1, 16
 	ldr	x4, [x4, x5]
@@ -379,8 +396,8 @@ FlashProgDpFirstCmd:
 	add	x1, x1, :lo12:.LANCHOR0
 	add	x3, x1, x0
 	ldr	x2, [x1, x0]
-	adrp	x0, .LANCHOR7+10
-	ldrb	w1, [x0, #:lo12:.LANCHOR7+10]
+	adrp	x0, .LANCHOR8+10
+	ldrb	w1, [x0, #:lo12:.LANCHOR8+10]
 	ldrb	w0, [x3, 8]
 	add	x0, x0, 8
 	add	x0, x2, x0, lsl 8
@@ -420,18 +437,18 @@ js_hash:
 	mov	w0, 42982
 	mov	x3, 0
 	movk	w0, 0x47c6, lsl 16
-.L59:
+.L61:
 	cmp	w1, w3
-	bhi	.L60
+	bhi	.L62
 	ret
-.L60:
+.L62:
 	lsr	w2, w0, 2
 	ldrb	w5, [x4, x3]
 	add	w2, w2, w0, lsl 5
 	add	x3, x3, 1
 	add	w2, w2, w5
 	eor	w0, w0, w2
-	b	.L59
+	b	.L61
 	.size	js_hash, .-js_hash
 	.section	.text.FlashLoadIdbInfo,"ax",@progbits
 	.align	2
@@ -462,27 +479,27 @@ ToshibaSetRRPara:
 	mov	x21, x0
 	mov	w0, 5
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR8
+	adrp	x20, .LANCHOR9
 	umull	x2, w2, w0
 	stp	x23, x24, [sp, 48]
-	adrp	x0, .LANCHOR9
-	add	x20, x20, :lo12:.LANCHOR8
-	add	x24, x0, :lo12:.LANCHOR9
+	adrp	x0, .LANCHOR10
+	add	x20, x20, :lo12:.LANCHOR9
+	add	x24, x0, :lo12:.LANCHOR10
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LANCHOR12
-	adrp	x25, .LANCHOR10
-	adrp	x26, .LANCHOR11
-	add	x23, x23, :lo12:.LANCHOR12
-	add	x25, x25, :lo12:.LANCHOR10
-	add	x26, x26, :lo12:.LANCHOR11
+	adrp	x23, .LANCHOR13
+	adrp	x25, .LANCHOR11
+	adrp	x26, .LANCHOR12
+	add	x23, x23, :lo12:.LANCHOR13
+	add	x25, x25, :lo12:.LANCHOR11
+	add	x26, x26, :lo12:.LANCHOR12
 	add	x20, x20, x2
 	add	x24, x24, x2
 	mov	x22, x0
 	mov	x19, 0
-.L64:
+.L66:
 	ldrb	w0, [x23]
 	cmp	w0, w19
-	bhi	.L68
+	bhi	.L70
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -490,30 +507,30 @@ ToshibaSetRRPara:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L68:
+.L70:
 	mov	w0, 85
 	str	w0, [x21, 8]
-	add	x0, x22, :lo12:.LANCHOR9
+	add	x0, x22, :lo12:.LANCHOR10
 	ldrsb	w0, [x19, x0]
 	str	w0, [x21, 4]
 	mov	x0, 200
 	bl	udelay
 	ldrb	w0, [x25]
 	cmp	w0, 34
-	bne	.L65
+	bne	.L67
 	ldrsb	w0, [x24, x19]
-.L70:
+.L72:
 	add	x19, x19, 1
 	str	w0, [x21]
-	b	.L64
-.L65:
+	b	.L66
+.L67:
 	cmp	w0, 35
-	bne	.L67
+	bne	.L69
 	ldrsb	w0, [x20, x19]
-	b	.L70
-.L67:
+	b	.L72
+.L69:
 	ldrsb	w0, [x26, w27, sxtw]
-	b	.L70
+	b	.L72
 	.size	ToshibaSetRRPara, .-ToshibaSetRRPara
 	.section	.text.SamsungSetRRPara,"ax",@progbits
 	.align	2
@@ -526,26 +543,26 @@ SamsungSetRRPara:
 	ubfiz	x21, x1, 2, 8
 	mov	x22, x0
 	add	x21, x21, 4
-	adrp	x0, .LANCHOR13
-	add	x0, x0, :lo12:.LANCHOR13
+	adrp	x0, .LANCHOR14
+	add	x0, x0, :lo12:.LANCHOR14
 	stp	x19, x20, [sp, 16]
 	add	x21, x0, x21
 	stp	x23, x24, [sp, 48]
 	mov	x19, x0
-	adrp	x23, .LANCHOR12
-	add	x23, x23, :lo12:.LANCHOR12
+	adrp	x23, .LANCHOR13
+	add	x23, x23, :lo12:.LANCHOR13
 	mov	x20, 0
 	mov	w24, 161
-.L72:
+.L74:
 	ldrb	w0, [x23]
 	cmp	w0, w20
-	bhi	.L73
+	bhi	.L75
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L73:
+.L75:
 	str	w24, [x22, 8]
 	str	wzr, [x22]
 	ldrsb	w0, [x20, x19]
@@ -555,15 +572,15 @@ SamsungSetRRPara:
 	str	w0, [x22]
 	mov	x0, 300
 	bl	udelay
-	b	.L72
+	b	.L74
 	.size	SamsungSetRRPara, .-SamsungSetRRPara
 	.section	.text.LogAddr2PhyAddr,"ax",@progbits
 	.align	2
 	.global	LogAddr2PhyAddr
 	.type	LogAddr2PhyAddr, %function
 LogAddr2PhyAddr:
-	adrp	x6, .LANCHOR14
-	add	x6, x6, :lo12:.LANCHOR14
+	adrp	x6, .LANCHOR15
+	add	x6, x6, :lo12:.LANCHOR15
 	and	w4, w4, 255
 	ldrh	w8, [x6, 12]
 	ldrh	w5, [x6, 14]
@@ -584,31 +601,31 @@ LogAddr2PhyAddr:
 	and	w10, w5, 65535
 	msub	w5, w5, w8, w11
 	and	w5, w5, 65535
-	bne	.L77
-	adrp	x1, .LANCHOR15
-	ldrb	w1, [x1, #:lo12:.LANCHOR15]
-	cbnz	w1, .L77
+	bne	.L79
 	adrp	x1, .LANCHOR16
-	add	x1, x1, :lo12:.LANCHOR16
-	ldrh	w6, [x1, w6, sxtw 1]
-.L77:
-	uxtw	x8, w10
+	ldrb	w1, [x1, #:lo12:.LANCHOR16]
+	cbnz	w1, .L79
 	adrp	x1, .LANCHOR17
 	add	x1, x1, :lo12:.LANCHOR17
+	ldrh	w6, [x1, w6, sxtw 1]
+.L79:
+	uxtw	x8, w10
+	adrp	x1, .LANCHOR18
+	add	x1, x1, :lo12:.LANCHOR18
 	cmp	w4, 1
 	ldr	w1, [x1, x8, lsl 2]
 	madd	w5, w5, w7, w1
 	add	w5, w5, w6
 	str	w5, [x2]
 	str	w10, [x3]
-	bls	.L79
+	bls	.L81
 	ldr	w1, [x0, 4]
 	ldr	w0, [x0, 60]
 	add	w1, w1, 1024
 	cmp	w1, w0
 	cset	w0, eq
 	ret
-.L79:
+.L81:
 	mov	w0, 0
 	ret
 	.size	LogAddr2PhyAddr, .-LogAddr2PhyAddr
@@ -625,31 +642,31 @@ FlashReadStatusEN:
 	stp	x19, x20, [sp, 16]
 	add	x4, x3, x0
 	ldr	x20, [x3, x0]
-	adrp	x0, .LANCHOR18
-	ldr	x0, [x0, #:lo12:.LANCHOR18]
+	adrp	x0, .LANCHOR7
+	ldr	x0, [x0, #:lo12:.LANCHOR7]
 	ldrb	w19, [x4, 8]
 	ldrb	w0, [x0, 8]
 	cmp	w0, 2
-	bne	.L81
+	bne	.L83
 	and	w2, w2, 255
-	adrp	x0, .LANCHOR7
-	cbnz	w2, .L82
-	add	x2, x0, :lo12:.LANCHOR7
+	adrp	x0, .LANCHOR8
+	cbnz	w2, .L84
+	add	x2, x0, :lo12:.LANCHOR8
 	ldrb	w3, [x2, 13]
-.L92:
+.L94:
 	add	x2, x19, 8
-	add	x0, x0, :lo12:.LANCHOR7
+	add	x0, x0, :lo12:.LANCHOR8
 	add	x2, x20, x2, lsl 8
 	str	w3, [x2, 8]
 	ldrb	w4, [x0, 15]
-	cbz	w4, .L86
+	cbz	w4, .L88
 	add	x3, x19, 8
 	mov	w2, 0
 	add	x3, x20, x3, lsl 8
-.L85:
+.L87:
 	cmp	w2, w4
-	bcc	.L87
-.L86:
+	bcc	.L89
+.L88:
 	add	x19, x19, 8
 	mov	x0, 80
 	lsl	x19, x19, 8
@@ -659,23 +676,23 @@ FlashReadStatusEN:
 	and	w0, w0, 255
 	ldp	x29, x30, [sp], 32
 	ret
-.L82:
-	add	x2, x0, :lo12:.LANCHOR7
+.L84:
+	add	x2, x0, :lo12:.LANCHOR8
 	ldrb	w3, [x2, 14]
-	b	.L92
-.L87:
+	b	.L94
+.L89:
 	lsl	w0, w2, 3
 	add	w2, w2, 1
 	lsr	w0, w1, w0
 	and	w0, w0, 255
 	str	w0, [x3, 4]
-	b	.L85
-.L81:
+	b	.L87
+.L83:
 	add	x0, x19, 8
 	mov	w1, 112
 	add	x0, x20, x0, lsl 8
 	str	w1, [x0, 8]
-	b	.L86
+	b	.L88
 	.size	FlashReadStatusEN, .-FlashReadStatusEN
 	.section	.text.FlashWaitReadyEN,"ax",@progbits
 	.align	2
@@ -689,15 +706,15 @@ FlashWaitReadyEN:
 	str	x21, [sp, 32]
 	mov	w20, w1
 	and	w21, w2, 255
-.L97:
+.L99:
 	mov	w1, w20
 	mov	w2, w21
 	mov	w0, w19
 	bl	FlashReadStatusEN
 	mov	w1, w0
 	cmp	w0, 255
-	beq	.L97
-	tbz	x1, 6, .L97
+	beq	.L99
+	tbz	x1, 6, .L99
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -777,7 +794,7 @@ NandcSetMode:
 	tst	w0, 6
 	ldr	x2, [x1, #:lo12:.LANCHOR19]
 	ldr	w1, [x2]
-	beq	.L109
+	beq	.L111
 	orr	w1, w1, 24576
 	tst	x0, 4
 	and	w1, w1, -32769
@@ -793,13 +810,13 @@ NandcSetMode:
 	str	w0, [x2, 308]
 	mov	w0, 39
 	str	w0, [x2, 308]
-.L111:
+.L113:
 	mov	w0, 0
 	str	w1, [x2]
 	ret
-.L109:
+.L111:
 	and	w1, w1, -8193
-	b	.L111
+	b	.L113
 	.size	NandcSetMode, .-NandcSetMode
 	.section	.text.NandcFlashCs,"ax",@progbits
 	.align	2
@@ -843,25 +860,25 @@ HynixSetRRPara:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	and	w22, w0, 255
-	adrp	x0, .LANCHOR18
+	adrp	x0, .LANCHOR7
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
 	mov	x20, x2
-	ldr	x0, [x0, #:lo12:.LANCHOR18]
+	ldr	x0, [x0, #:lo12:.LANCHOR7]
 	and	w26, w1, 255
 	stp	x23, x24, [sp, 48]
 	and	w21, w3, 255
 	adrp	x19, .LANCHOR20
 	ldrb	w0, [x0, 19]
 	cmp	w0, 6
-	bne	.L117
+	bne	.L119
 	add	x0, x19, :lo12:.LANCHOR20
 	ubfiz	x19, x22, 6, 8
 	add	x19, x19, 20
 	add	x19, x19, x21, uxtw 2
-.L124:
+.L126:
 	add	x19, x0, x19
-.L118:
+.L120:
 	sxtw	x25, w22
 	adrp	x0, .LANCHOR0
 	lsl	x1, x25, 4
@@ -877,9 +894,9 @@ HynixSetRRPara:
 	add	x23, x23, x5
 	mov	w0, 54
 	str	w0, [x23, 2056]
-.L121:
+.L123:
 	cmp	x24, x26
-	bne	.L122
+	bne	.L124
 	mov	w0, 22
 	str	w0, [x23, 2056]
 	mov	w0, w22
@@ -893,33 +910,33 @@ HynixSetRRPara:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L117:
+.L119:
 	cmp	w0, 7
-	bne	.L119
+	bne	.L121
 	add	x0, x19, :lo12:.LANCHOR20
 	mov	x1, 28
 	mov	w19, 160
 	umaddl	x1, w19, w22, x1
 	mov	w19, 10
 	umaddl	x19, w21, w19, x1
-	b	.L124
-.L119:
+	b	.L126
+.L121:
 	cmp	w0, 8
-	bne	.L120
+	bne	.L122
 	add	x19, x19, :lo12:.LANCHOR20
 	add	x0, x19, 28
 	add	w19, w21, w21, lsl 2
 	add	x19, x0, x19, sxtw
-	b	.L118
-.L120:
+	b	.L120
+.L122:
 	add	x0, x19, :lo12:.LANCHOR20
 	and	x19, x21, 255
 	add	x19, x19, 2
 	add	x19, x19, x22, uxtw 3
 	add	x19, x0, x19, lsl 3
 	add	x19, x19, 4
-	b	.L118
-.L122:
+	b	.L120
+.L124:
 	ldrb	w0, [x20, x24]
 	str	w0, [x23, 2052]
 	mov	x0, 200
@@ -927,20 +944,20 @@ HynixSetRRPara:
 	ldrsb	w0, [x19, x24]
 	add	x24, x24, 1
 	str	w0, [x23, 2048]
-	b	.L121
+	b	.L123
 	.size	HynixSetRRPara, .-HynixSetRRPara
 	.section	.text.FlashSetReadRetryDefault,"ax",@progbits
 	.align	2
 	.global	FlashSetReadRetryDefault
 	.type	FlashSetReadRetryDefault, %function
 FlashSetReadRetryDefault:
-	adrp	x0, .LANCHOR18
-	ldr	x0, [x0, #:lo12:.LANCHOR18]
+	adrp	x0, .LANCHOR7
+	ldr	x0, [x0, #:lo12:.LANCHOR7]
 	ldrb	w0, [x0, 19]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 7
-	bhi	.L132
+	bhi	.L134
 	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
@@ -951,25 +968,25 @@ FlashSetReadRetryDefault:
 	add	x22, x20, 4
 	add	x21, x21, :lo12:.LANCHOR22
 	mov	x19, 0
-.L128:
+.L130:
 	lsl	x1, x19, 3
 	and	w0, w19, 255
 	ldrb	w1, [x1, x21]
 	cmp	w1, 173
-	bne	.L127
+	bne	.L129
 	ldrb	w1, [x20, 1]
 	mov	w3, 0
 	mov	x2, x22
 	bl	HynixSetRRPara
-.L127:
+.L129:
 	add	x19, x19, 1
 	cmp	x19, 4
-	bne	.L128
+	bne	.L130
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L132:
+.L134:
 	ret
 	.size	FlashSetReadRetryDefault, .-FlashSetReadRetryDefault
 	.section	.text.FlashWaitCmdDone,"ax",@progbits
@@ -987,12 +1004,12 @@ FlashWaitCmdDone:
 	stp	x19, x20, [sp, 16]
 	add	x19, x1, x0
 	ldr	x2, [x19, 8]
-	cbz	x2, .L137
+	cbz	x2, .L139
 	ldrb	w20, [x1, x0]
 	mov	w0, w20
 	bl	NandcFlashCs
-	adrp	x0, .LANCHOR17
-	add	x0, x0, :lo12:.LANCHOR17
+	adrp	x0, .LANCHOR18
+	add	x0, x0, :lo12:.LANCHOR18
 	ldr	w1, [x19, 4]
 	ldr	w0, [x0, x4, lsl 2]
 	cmp	w0, 0
@@ -1007,10 +1024,10 @@ FlashWaitCmdDone:
 	str	w0, [x1]
 	ldr	x1, [x19, 16]
 	str	xzr, [x19, 8]
-	cbz	x1, .L137
+	cbz	x1, .L139
 	str	w0, [x1]
 	str	xzr, [x19, 16]
-.L137:
+.L139:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -1043,23 +1060,23 @@ NandcWaitFlashReadyNoDelay:
 	mov	w19, 34464
 	ldr	x20, [x1, x0]
 	movk	w19, 0x1, lsl 16
-.L147:
+.L149:
 	ldr	w0, [x20]
 	str	w0, [x29, 40]
 	ldr	w0, [x29, 40]
-	tbnz	x0, 9, .L148
+	tbnz	x0, 9, .L150
 	mov	x0, 10
 	bl	udelay
 	subs	w19, w19, #1
-	bne	.L147
+	bne	.L149
 	mov	w0, -1
-.L145:
+.L147:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L148:
+.L150:
 	mov	w0, 0
-	b	.L145
+	b	.L147
 	.size	NandcWaitFlashReadyNoDelay, .-NandcWaitFlashReadyNoDelay
 	.section	.text.NandcWaitFlashReady,"ax",@progbits
 	.align	2
@@ -1075,25 +1092,25 @@ NandcWaitFlashReady:
 	mov	w19, 34464
 	movk	w19, 0x1, lsl 16
 	ldr	x20, [x1, x0]
-	mov	x0, 150
+	mov	x0, 130
 	bl	udelay
-.L153:
+.L155:
 	ldr	w0, [x20]
 	str	w0, [x29, 40]
 	ldr	w0, [x29, 40]
-	tbnz	x0, 9, .L154
+	tbnz	x0, 9, .L156
 	mov	x0, 10
 	bl	udelay
 	subs	w19, w19, #1
-	bne	.L153
+	bne	.L155
 	mov	w0, -1
-.L151:
+.L153:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L154:
+.L156:
 	mov	w0, 0
-	b	.L151
+	b	.L153
 	.size	NandcWaitFlashReady, .-NandcWaitFlashReady
 	.section	.text.FlashReset,"ax",@progbits
 	.align	2
@@ -1128,46 +1145,60 @@ FlashReset:
 	.global	flash_enter_slc_mode
 	.type	flash_enter_slc_mode, %function
 flash_enter_slc_mode:
-	stp	x29, x30, [sp, -32]!
+	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	and	w21, w0, 255
+	adrp	x0, .LANCHOR16
 	stp	x19, x20, [sp, 16]
-	and	w20, w0, 255
-	adrp	x0, .LANCHOR15
-	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L159
-	mov	w0, w20
+	ldrb	w0, [x0, #:lo12:.LANCHOR16]
+	cbz	w0, .L161
+	mov	w0, w21
 	bl	NandcFlashCs
-	sbfiz	x1, x20, 4, 32
-	adrp	x0, .LANCHOR0
-	add	x0, x0, :lo12:.LANCHOR0
-	add	x2, x0, x1
-	ldr	x0, [x0, x1]
-	ldrb	w19, [x2, 8]
-	add	x19, x0, x19, lsl 8
+	sxtw	x0, w21
+	adrp	x1, .LANCHOR0
+	lsl	x2, x0, 4
+	add	x1, x1, :lo12:.LANCHOR0
+	add	x3, x1, x2
+	lsl	x0, x0, 3
+	ldr	x22, [x1, x2]
+	adrp	x1, .LANCHOR22
+	add	x1, x1, :lo12:.LANCHOR22
+	ldrb	w19, [x3, 8]
+	ldrb	w0, [x1, x0]
+	cmp	w0, 44
+	bne	.L163
+	ubfiz	x20, x19, 8, 8
 	mov	w0, 239
-	str	w0, [x19, 2056]
+	add	x20, x22, x20
+	str	w0, [x20, 2056]
 	mov	w0, 145
-	str	w0, [x19, 2052]
-	mov	x0, 100
+	str	w0, [x20, 2052]
+	mov	x0, 50
 	bl	udelay
-	str	wzr, [x19, 2048]
+	str	wzr, [x20, 2048]
 	mov	w0, 1
-	str	w0, [x19, 2048]
-	str	wzr, [x19, 2048]
+	str	w0, [x20, 2048]
+	str	wzr, [x20, 2048]
 	mov	x0, 100
-	str	wzr, [x19, 2048]
+	str	wzr, [x20, 2048]
 	bl	udelay
-	mov	w0, w20
+.L163:
+	add	x19, x19, 8
+	mov	w0, w21
+	add	x19, x22, x19, lsl 8
 	bl	NandcWaitFlashReadyNoDelay
 	mov	w0, 218
-	str	w0, [x19, 2056]
-	mov	w0, w20
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	b	NandcWaitFlashReady
-.L159:
+	str	w0, [x19, 8]
+	mov	w0, w21
+	bl	NandcWaitFlashReady
+	adrp	x0, .LANCHOR24
+	mov	w1, 2
+	strb	w1, [x0, #:lo12:.LANCHOR24]
+.L161:
 	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 32
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 48
 	ret
 	.size	flash_enter_slc_mode, .-flash_enter_slc_mode
 	.section	.text.flash_exit_slc_mode,"ax",@progbits
@@ -1175,47 +1206,60 @@ flash_enter_slc_mode:
 	.global	flash_exit_slc_mode
 	.type	flash_exit_slc_mode, %function
 flash_exit_slc_mode:
-	stp	x29, x30, [sp, -32]!
+	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	and	w21, w0, 255
+	adrp	x0, .LANCHOR16
 	stp	x19, x20, [sp, 16]
-	and	w20, w0, 255
-	adrp	x0, .LANCHOR15
-	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L162
-	mov	w0, w20
+	ldrb	w0, [x0, #:lo12:.LANCHOR16]
+	cbz	w0, .L168
+	mov	w0, w21
 	bl	NandcFlashCs
-	sbfiz	x1, x20, 4, 32
-	adrp	x0, .LANCHOR0
-	add	x0, x0, :lo12:.LANCHOR0
-	add	x2, x0, x1
-	ldr	x0, [x0, x1]
-	ldrb	w19, [x2, 8]
-	add	x19, x0, x19, lsl 8
+	sxtw	x0, w21
+	adrp	x1, .LANCHOR0
+	lsl	x2, x0, 4
+	add	x1, x1, :lo12:.LANCHOR0
+	add	x3, x1, x2
+	lsl	x0, x0, 3
+	ldr	x22, [x1, x2]
+	adrp	x1, .LANCHOR22
+	add	x1, x1, :lo12:.LANCHOR22
+	ldrb	w19, [x3, 8]
+	ldrb	w0, [x1, x0]
+	cmp	w0, 44
+	bne	.L170
+	ubfiz	x20, x19, 8, 8
 	mov	w0, 239
-	str	w0, [x19, 2056]
+	add	x20, x22, x20
+	str	w0, [x20, 2056]
 	mov	w0, 145
-	str	w0, [x19, 2052]
-	mov	x0, 100
+	str	w0, [x20, 2052]
+	mov	x0, 50
 	bl	udelay
 	mov	w0, 2
-	str	w0, [x19, 2048]
+	str	w0, [x20, 2048]
 	mov	w0, 1
-	str	w0, [x19, 2048]
-	str	wzr, [x19, 2048]
+	str	w0, [x20, 2048]
+	str	wzr, [x20, 2048]
 	mov	x0, 100
-	str	wzr, [x19, 2048]
+	str	wzr, [x20, 2048]
 	bl	udelay
-	mov	w0, w20
+.L170:
+	add	x19, x19, 8
+	mov	w0, w21
+	add	x19, x22, x19, lsl 8
 	bl	NandcWaitFlashReadyNoDelay
 	mov	w0, 223
-	str	w0, [x19, 2056]
-	mov	w0, w20
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	b	NandcWaitFlashReady
-.L162:
+	str	w0, [x19, 8]
+	mov	w0, w21
+	bl	NandcWaitFlashReady
+	adrp	x0, .LANCHOR24
+	strb	wzr, [x0, #:lo12:.LANCHOR24]
+.L168:
 	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 32
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 48
 	ret
 	.size	flash_exit_slc_mode, .-flash_exit_slc_mode
 	.section	.text.FlashEraseBlock,"ax",@progbits
@@ -1258,11 +1302,11 @@ FlashEraseBlock:
 	.type	FlashSetInterfaceMode, %function
 FlashSetInterfaceMode:
 	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR24
+	adrp	x1, .LANCHOR25
 	adrp	x2, .LANCHOR0
 	add	x2, x2, :lo12:.LANCHOR0
 	add	x29, sp, 0
-	ldrb	w1, [x1, #:lo12:.LANCHOR24]
+	ldrb	w1, [x1, #:lo12:.LANCHOR25]
 	adrp	x7, .LANCHOR22
 	add	x2, x2, 8
 	add	x7, x7, :lo12:.LANCHOR22
@@ -1277,71 +1321,71 @@ FlashSetInterfaceMode:
 	mov	w15, 32
 	mov	w16, 5
 	mov	w17, 44
-.L177:
+.L187:
 	ldrb	w3, [x5, x7]
 	ldrb	w4, [x2]
 	cmp	w3, 152
 	ccmp	w3, w13, 4, ne
-	beq	.L168
+	beq	.L178
 	cmp	w3, 173
 	ccmp	w3, w17, 4, ne
-	bne	.L169
-.L168:
+	bne	.L179
+.L178:
 	cmp	w0, 1
 	ldr	x1, [x2, -8]
-	bne	.L170
-	cbz	w6, .L169
+	bne	.L180
+	cbz	w6, .L179
 	ubfiz	x4, x4, 8, 8
 	cmp	w3, 173
 	add	x1, x1, x4
 	str	w8, [x1, 2056]
-	bne	.L171
+	bne	.L181
 	str	w0, [x1, 2052]
-.L189:
+.L199:
 	str	wzr, [x1, 2048]
-	b	.L175
-.L171:
+	b	.L185
+.L181:
 	cmp	w3, 44
-	bne	.L173
+	bne	.L183
 	str	w0, [x1, 2052]
 	str	w16, [x1, 2048]
-.L175:
+.L185:
 	str	wzr, [x1, 2048]
 	str	wzr, [x1, 2048]
 	str	wzr, [x1, 2048]
-.L169:
+.L179:
 	add	x5, x5, 8
 	add	x2, x2, 16
 	cmp	x5, 32
-	bne	.L177
+	bne	.L187
 	mov	w0, 0
 	bl	NandcWaitFlashReady
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L173:
+.L183:
 	str	w10, [x1, 2052]
 	str	w0, [x1, 2048]
-	b	.L175
-.L170:
-	cbz	w12, .L169
+	b	.L185
+.L180:
+	cbz	w12, .L179
 	ubfiz	x4, x4, 8, 8
 	cmp	w3, 173
 	add	x1, x1, x4
 	str	w8, [x1, 2056]
-	bne	.L174
+	bne	.L184
 	str	w11, [x1, 2052]
 	str	w15, [x1, 2048]
-	b	.L175
-.L174:
+	b	.L185
+.L184:
 	cmp	w3, 44
-	bne	.L176
+	bne	.L186
 	str	w11, [x1, 2052]
 	str	w14, [x1, 2048]
-	b	.L175
-.L176:
+	b	.L185
+.L186:
 	str	w10, [x1, 2052]
-	b	.L189
+	b	.L199
 	.size	FlashSetInterfaceMode, .-FlashSetInterfaceMode
 	.section	.text.SandiskSetRRPara,"ax",@progbits
 	.align	2
@@ -1359,38 +1403,38 @@ SandiskSetRRPara:
 	str	w0, [x20, 4]
 	mov	x0, 200
 	bl	udelay
-	adrp	x0, .LANCHOR12
+	adrp	x0, .LANCHOR13
 	add	w1, w19, 1
-	adrp	x2, .LANCHOR8
-	add	x2, x2, :lo12:.LANCHOR8
-	ldrb	w3, [x0, #:lo12:.LANCHOR12]
-	adrp	x0, .LANCHOR10
-	ldrb	w4, [x0, #:lo12:.LANCHOR10]
+	adrp	x2, .LANCHOR9
+	add	x2, x2, :lo12:.LANCHOR9
+	ldrb	w3, [x0, #:lo12:.LANCHOR13]
+	adrp	x0, .LANCHOR11
+	ldrb	w4, [x0, #:lo12:.LANCHOR11]
 	mov	w0, 5
 	umull	x1, w1, w0
-	adrp	x0, .LANCHOR9
-	add	x0, x0, :lo12:.LANCHOR9
+	adrp	x0, .LANCHOR10
+	add	x0, x0, :lo12:.LANCHOR10
 	add	x2, x2, x1
 	add	x1, x0, x1
 	mov	x0, 0
-.L191:
+.L201:
 	cmp	w3, w0
-	bhi	.L194
+	bhi	.L204
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x29, x30, [sp], 32
 	b	NandcWaitFlashReady
-.L194:
+.L204:
 	cmp	w4, 67
-	bne	.L192
+	bne	.L202
 	ldrsb	w5, [x1, x0]
-.L196:
+.L206:
 	add	x0, x0, 1
 	str	w5, [x20]
-	b	.L191
-.L192:
+	b	.L201
+.L202:
 	ldrsb	w5, [x2, x0]
-	b	.L196
+	b	.L206
 	.size	SandiskSetRRPara, .-SandiskSetRRPara
 	.section	.text.micron_auto_read_calibration_config,"ax",@progbits
 	.align	2
@@ -1438,20 +1482,20 @@ FlashEraseSLc2KBlocks:
 	and	w21, w1, 255
 	umaddl	x22, w1, w22, x0
 	stp	x19, x20, [sp, 16]
-	adrp	x23, .LANCHOR25
+	adrp	x23, .LANCHOR26
 	mov	x20, x0
-	add	x23, x23, :lo12:.LANCHOR25
-	adrp	x24, .LANCHOR26
-.L200:
+	add	x23, x23, :lo12:.LANCHOR26
+	adrp	x24, .LANCHOR27
+.L210:
 	cmp	x20, x22
-	bne	.L205
+	bne	.L215
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L205:
+.L215:
 	mov	w1, 0
 	mov	w4, w21
 	add	x3, x29, 76
@@ -1461,17 +1505,17 @@ FlashEraseSLc2KBlocks:
 	ldrb	w1, [x23]
 	ldr	w0, [x29, 76]
 	cmp	w1, w0
-	bhi	.L201
+	bhi	.L211
 	mov	w0, -1
 	str	w0, [x20]
-.L202:
+.L212:
 	sub	w21, w21, #1
 	add	x20, x20, 56
 	and	w21, w21, 255
-	b	.L200
-.L201:
+	b	.L210
+.L211:
 	uxtw	x0, w0
-	add	x1, x24, :lo12:.LANCHOR26
+	add	x1, x24, :lo12:.LANCHOR27
 	ldrb	w19, [x1, x0]
 	mov	x1, 24
 	mul	x0, x0, x1
@@ -1505,21 +1549,21 @@ FlashEraseSLc2KBlocks:
 	ldr	w1, [x29, 72]
 	mov	w0, w19
 	bl	FlashReadStatus
-	tbz	x0, 0, .L203
+	tbz	x0, 0, .L213
 	mov	w0, -1
 	str	w0, [x20]
-.L203:
+.L213:
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L204
+	bne	.L214
 	ldr	w1, [x29, 72]
 	adrp	x0, .LC1
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L204:
+.L214:
 	mov	w0, w19
 	bl	NandcFlashDeCs
-	b	.L202
+	b	.L212
 	.size	FlashEraseSLc2KBlocks, .-FlashEraseSLc2KBlocks
 	.section	.text.FlashEraseBlocks,"ax",@progbits
 	.align	2
@@ -1536,148 +1580,132 @@ FlashEraseBlocks:
 	mov	w22, w2
 	ldrb	w1, [x1, #:lo12:.LANCHOR2]
 	stp	x25, x26, [sp, 64]
-	cbnz	w1, .L211
+	cbnz	w1, .L221
 	adrp	x25, .LANCHOR23
-	mov	x19, x0
+	mov	x23, x0
 	add	x26, x25, :lo12:.LANCHOR23
-	mov	w20, 0
-.L212:
-	cmp	w20, w22
-	adrp	x13, .LANCHOR25
-	bcc	.L221
-	adrp	x21, .LANCHOR15
-	adrp	x23, .LANCHOR23
-	add	x25, x13, :lo12:.LANCHOR25
-	add	x21, x21, :lo12:.LANCHOR15
-	add	x23, x23, :lo12:.LANCHOR23
-	mov	x20, 0
+	mov	w19, 0
 .L222:
-	ldrb	w0, [x25]
-	cmp	w0, w20
-	bhi	.L224
-	adrp	x0, .LANCHOR28
-	ldr	w0, [x0, #:lo12:.LANCHOR28]
-	cbnz	w0, .L225
-.L226:
+	cmp	w19, w22
+	adrp	x13, .LANCHOR26
+	bcc	.L231
+	adrp	x20, .LANCHOR16
+	adrp	x21, .LANCHOR23
+	add	x22, x13, :lo12:.LANCHOR26
+	add	x20, x20, :lo12:.LANCHOR16
+	add	x21, x21, :lo12:.LANCHOR23
+	mov	x19, 0
+.L232:
+	ldrb	w0, [x22]
+	cmp	w0, w19
+	bhi	.L234
 	mov	w0, 0
-	b	.L210
-.L211:
+	b	.L220
+.L221:
 	mov	w1, w2
 	bl	FlashEraseSLc2KBlocks
-.L210:
+.L220:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L221:
+.L231:
 	mov	w12, 56
 	mov	w1, 0
-	sub	w4, w22, w20
+	sub	w4, w22, w19
 	add	x3, x29, 92
-	umull	x12, w20, w12
+	umull	x12, w19, w12
 	add	x2, x29, 88
-	add	x21, x19, x12
-	mov	x0, x21
+	add	x20, x23, x12
+	mov	x0, x20
 	bl	LogAddr2PhyAddr
-	mov	w23, w0
-	ldrb	w1, [x13, #:lo12:.LANCHOR25]
+	mov	w21, w0
+	ldrb	w1, [x13, #:lo12:.LANCHOR26]
 	ldr	w0, [x29, 92]
 	cmp	w1, w0
-	bhi	.L214
+	bhi	.L224
 	mov	w0, -1
-	str	w0, [x19, x12]
-.L215:
-	add	w20, w20, 1
-	b	.L212
-.L214:
-	adrp	x1, .LANCHOR27
+	str	w0, [x23, x12]
+.L225:
+	add	w19, w19, 1
+	b	.L222
+.L224:
+	adrp	x1, .LANCHOR28
 	add	x2, x25, :lo12:.LANCHOR23
 	mov	x3, 24
-	ldrb	w1, [x1, #:lo12:.LANCHOR27]
+	ldrb	w1, [x1, #:lo12:.LANCHOR28]
 	cmp	w1, 0
 	uxtw	x1, w0
-	csel	w23, w23, wzr, ne
+	csel	w21, w21, wzr, ne
 	madd	x1, x1, x3, x2
 	ldr	x1, [x1, 8]
-	cbz	x1, .L217
+	cbz	x1, .L227
 	bl	FlashWaitCmdDone
-.L217:
+.L227:
 	ldp	w2, w1, [x29, 88]
 	mov	x0, 24
 	madd	x0, x1, x0, x26
 	str	w2, [x0, 4]
-	stp	x21, xzr, [x0, 8]
-	cbz	w23, .L218
-	add	w2, w20, 1
+	stp	x20, xzr, [x0, 8]
+	cbz	w21, .L228
+	add	w2, w19, 1
 	mov	w3, 56
-	umaddl	x2, w2, w3, x19
+	umaddl	x2, w2, w3, x23
 	str	x2, [x0, 16]
-.L218:
-	adrp	x0, .LANCHOR26
-	add	x0, x0, :lo12:.LANCHOR26
-	ldrb	w21, [x0, x1]
+.L228:
+	adrp	x0, .LANCHOR27
+	add	x0, x0, :lo12:.LANCHOR27
+	ldrb	w20, [x0, x1]
 	mov	x0, 24
 	mul	x1, x1, x0
-	mov	w0, w21
-	strb	w21, [x26, x1]
+	mov	w0, w20
+	strb	w20, [x26, x1]
 	bl	NandcFlashCs
 	cmp	w24, 1
-	bne	.L219
-	adrp	x0, .LANCHOR15
-	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L219
-	mov	w0, w21
+	bne	.L229
+	adrp	x0, .LANCHOR16
+	ldrb	w0, [x0, #:lo12:.LANCHOR16]
+	cbz	w0, .L229
+	mov	w0, w20
 	bl	flash_enter_slc_mode
-.L220:
+.L230:
 	ldr	w1, [x29, 92]
-	adrp	x0, .LANCHOR17
-	add	x0, x0, :lo12:.LANCHOR17
-	add	w20, w20, w23
+	adrp	x0, .LANCHOR18
+	add	x0, x0, :lo12:.LANCHOR18
+	add	w19, w19, w21
 	ldr	w0, [x0, x1, lsl 2]
 	ldr	w1, [x29, 88]
 	cmp	w0, 0
-	mov	w0, w21
+	mov	w0, w20
 	cset	w2, ne
 	bl	FlashWaitReadyEN
 	ldr	w1, [x29, 88]
-	mov	w2, w23
-	mov	w0, w21
+	mov	w2, w21
+	mov	w0, w20
 	bl	FlashEraseCmd
-	mov	w0, w21
+	mov	w0, w20
 	bl	NandcFlashDeCs
-	b	.L215
-.L219:
-	mov	w0, w21
-	bl	flash_exit_slc_mode
-	b	.L220
-.L224:
+	b	.L225
+.L229:
 	mov	w0, w20
+	bl	flash_exit_slc_mode
+	b	.L230
+.L234:
+	mov	w0, w19
 	bl	FlashWaitCmdDone
 	cmp	w24, 1
-	bne	.L223
-	ldrb	w0, [x21]
-	cbz	w0, .L223
+	bne	.L233
+	ldrb	w0, [x20]
+	cbz	w0, .L233
 	mov	x0, 24
-	mul	x0, x20, x0
-	ldrb	w0, [x0, x23]
+	mul	x0, x19, x0
+	ldrb	w0, [x0, x21]
 	bl	flash_exit_slc_mode
-.L223:
-	add	x20, x20, 1
-	b	.L222
-.L225:
-	adrp	x0, .LANCHOR22
-	ldrb	w0, [x0, #:lo12:.LANCHOR22]
-	cmp	w0, 69
-	bne	.L226
-	mov	w0, 56
-	umaddl	x22, w22, w0, x19
-.L227:
-	cmp	x22, x19
-	beq	.L226
-	str	wzr, [x19], 56
-	b	.L227
+.L233:
+	add	x19, x19, 1
+	b	.L232
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
 	.section	.text.FlashReadDpCmd,"ax",@progbits
 	.align	2
@@ -1685,6 +1713,7 @@ FlashEraseBlocks:
 	.type	FlashReadDpCmd, %function
 FlashReadDpCmd:
 	stp	x29, x30, [sp, -64]!
+	adrp	x7, .LANCHOR7
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	and	w22, w0, 255
@@ -1695,27 +1724,38 @@ FlashReadDpCmd:
 	add	x3, x0, x1
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
-	and	w4, w21, 255
-	ldr	x6, [x0, x1]
-	adrp	x0, .LANCHOR7
-	ldrb	w19, [x3, 8]
-	add	x0, x0, :lo12:.LANCHOR7
-	lsr	w3, w21, 8
+	lsr	w20, w2, 16
+	ldr	x4, [x0, x1]
 	and	w24, w2, 255
+	ldrb	w19, [x3, 8]
+	adrp	x3, .LANCHOR8
+	add	x1, x3, :lo12:.LANCHOR8
 	lsr	w23, w2, 8
-	lsr	w20, w2, 16
-	add	x19, x6, x19, lsl 8
-	ldrb	w5, [x0, 8]
-	ldrb	w1, [x0, 16]
-	ldrb	w0, [x0, 9]
-	str	w5, [x19, 2056]
+	ldr	x2, [x7, #:lo12:.LANCHOR7]
+	and	w6, w21, 255
+	lsr	w5, w21, 8
+	ldrb	w1, [x1, 16]
+	ldrb	w2, [x2, 7]
 	cmp	w1, 1
 	lsr	w1, w21, 16
-	bne	.L243
+	bne	.L249
+	cmp	w2, 1
+	bne	.L250
+	sxtw	x0, w19
+	mov	w2, 38
+	add	x0, x0, 8
+	add	x0, x4, x0, lsl 8
+	str	w2, [x0, 8]
+.L250:
+	add	x0, x3, :lo12:.LANCHOR8
+	add	x19, x4, x19, lsl 8
+	ldrb	w2, [x0, 8]
+	str	w2, [x19, 2056]
 	str	wzr, [x19, 2052]
 	str	wzr, [x19, 2052]
-	str	w4, [x19, 2052]
-	str	w3, [x19, 2052]
+	str	w6, [x19, 2052]
+	str	w5, [x19, 2052]
+	ldrb	w0, [x0, 9]
 	str	w1, [x19, 2052]
 	str	w0, [x19, 2056]
 	mov	w0, w22
@@ -1723,7 +1763,7 @@ FlashReadDpCmd:
 	str	wzr, [x19, 2056]
 	str	wzr, [x19, 2052]
 	str	wzr, [x19, 2052]
-.L246:
+.L254:
 	str	w24, [x19, 2052]
 	mov	w0, 48
 	str	w23, [x19, 2052]
@@ -1736,18 +1776,31 @@ FlashReadDpCmd:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	b	FlashSetRandomizer
-.L243:
-	str	w4, [x19, 2052]
-	str	w3, [x19, 2052]
+.L249:
+	cmp	w2, 1
+	bne	.L252
+	sxtw	x0, w19
+	mov	w2, 38
+	add	x0, x0, 8
+	add	x0, x4, x0, lsl 8
+	str	w2, [x0, 8]
+.L252:
+	add	x0, x3, :lo12:.LANCHOR8
+	add	x19, x4, x19, lsl 8
+	ldrb	w2, [x0, 8]
+	str	w2, [x19, 2056]
+	str	w6, [x19, 2052]
+	str	w5, [x19, 2052]
+	ldrb	w0, [x0, 9]
 	str	w1, [x19, 2052]
 	str	w0, [x19, 2056]
-	b	.L246
+	b	.L254
 	.size	FlashReadDpCmd, .-FlashReadDpCmd
-	.section	.text.FlashDeInit,"ax",@progbits
+	.section	.text.ftl_flash_de_init,"ax",@progbits
 	.align	2
-	.global	FlashDeInit
-	.type	FlashDeInit, %function
-FlashDeInit:
+	.global	ftl_flash_de_init
+	.type	ftl_flash_de_init, %function
+ftl_flash_de_init:
 	stp	x29, x30, [sp, -32]!
 	mov	w0, 0
 	add	x29, sp, 0
@@ -1756,22 +1809,22 @@ FlashDeInit:
 	bl	FlashSetReadRetryDefault
 	adrp	x0, .LANCHOR29
 	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	cbz	w0, .L248
+	cbz	w0, .L256
 	mov	w0, 0
 	bl	flash_enter_slc_mode
-.L249:
+.L257:
 	adrp	x19, .LANCHOR30
 	ldrb	w0, [x19, #:lo12:.LANCHOR30]
-	cbz	w0, .L250
-	adrp	x0, .LANCHOR24
-	ldrb	w0, [x0, #:lo12:.LANCHOR24]
-	tbz	x0, 0, .L250
+	cbz	w0, .L258
+	adrp	x0, .LANCHOR25
+	ldrb	w0, [x0, #:lo12:.LANCHOR25]
+	tbz	x0, 0, .L258
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
 	bl	NandcSetMode
 	strb	wzr, [x19, #:lo12:.LANCHOR30]
-.L250:
+.L258:
 	adrp	x0, .LANCHOR0
 	ldr	x0, [x0, #:lo12:.LANCHOR0]
 	str	wzr, [x0, 336]
@@ -1779,11 +1832,11 @@ FlashDeInit:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L248:
+.L256:
 	mov	w0, 0
 	bl	flash_exit_slc_mode
-	b	.L249
-	.size	FlashDeInit, .-FlashDeInit
+	b	.L257
+	.size	ftl_flash_de_init, .-ftl_flash_de_init
 	.section	.text.NandcRandmzSel,"ax",@progbits
 	.align	2
 	.global	NandcRandmzSel
@@ -1803,21 +1856,21 @@ NandcRandmzSel:
 NandcTimeCfg:
 	cmp	w0, 35
 	adrp	x1, .LANCHOR19
-	bhi	.L260
+	bhi	.L268
 	ldr	x0, [x1, #:lo12:.LANCHOR19]
 	mov	w1, 4193
-.L263:
+.L271:
 	str	w1, [x0, 4]
 	ret
-.L260:
+.L268:
 	cmp	w0, 99
 	ldr	x0, [x1, #:lo12:.LANCHOR19]
-	bls	.L262
+	bls	.L270
 	mov	w1, 8322
-	b	.L263
-.L262:
+	b	.L271
+.L270:
 	mov	w1, 4225
-	b	.L263
+	b	.L271
 	.size	NandcTimeCfg, .-NandcTimeCfg
 	.section	.text.FlashTimingCfg,"ax",@progbits
 	.align	2
@@ -1842,24 +1895,24 @@ NandcBchSel:
 	adrp	x1, .LANCHOR32
 	str	w0, [x1, #:lo12:.LANCHOR32]
 	mov	w1, 4096
-	bne	.L266
-.L269:
+	bne	.L274
+.L277:
 	and	w1, w1, -17
-.L267:
+.L275:
 	orr	w1, w1, 1
 	str	w1, [x2, 12]
 	ret
-.L266:
+.L274:
 	cmp	w0, 24
-	bne	.L268
+	bne	.L276
 	orr	w1, w1, 16
-	b	.L267
-.L268:
+	b	.L275
+.L276:
 	orr	w1, w1, 262144
 	cmp	w0, 40
 	orr	w1, w1, 16
-	bne	.L267
-	b	.L269
+	bne	.L275
+	b	.L277
 	.size	NandcBchSel, .-NandcBchSel
 	.section	.text.FlashBchSel,"ax",@progbits
 	.align	2
@@ -1871,28 +1924,14 @@ FlashBchSel:
 	strb	w0, [x1, #:lo12:.LANCHOR33]
 	b	NandcBchSel
 	.size	FlashBchSel, .-FlashBchSel
-	.section	.text.NandCIrqEnable,"ax",@progbits
-	.align	2
-	.global	NandCIrqEnable
-	.type	NandCIrqEnable, %function
-NandCIrqEnable:
-	ret
-	.size	NandCIrqEnable, .-NandCIrqEnable
-	.section	.text.NandCIrqDisable,"ax",@progbits
-	.align	2
-	.global	NandCIrqDisable
-	.type	NandCIrqDisable, %function
-NandCIrqDisable:
-	ret
-	.size	NandCIrqDisable, .-NandCIrqDisable
-	.section	.text.rk_nandc_get_irq_status,"ax",@progbits
+	.section	.text.ftl_nandc_get_irq_status,"ax",@progbits
 	.align	2
-	.global	rk_nandc_get_irq_status
-	.type	rk_nandc_get_irq_status, %function
-rk_nandc_get_irq_status:
+	.global	ftl_nandc_get_irq_status
+	.type	ftl_nandc_get_irq_status, %function
+ftl_nandc_get_irq_status:
 	ldr	w0, [x0, 372]
 	ret
-	.size	rk_nandc_get_irq_status, .-rk_nandc_get_irq_status
+	.size	ftl_nandc_get_irq_status, .-ftl_nandc_get_irq_status
 	.section	.text.rk_nandc_flash_ready,"ax",@progbits
 	.align	2
 	.global	rk_nandc_flash_ready
@@ -1941,11 +1980,11 @@ NandcSendDumpDataStart:
 	.type	NandcSendDumpDataDone, %function
 NandcSendDumpDataDone:
 	sub	sp, sp, #16
-.L283:
+.L289:
 	ldr	w1, [x0, 8]
 	str	w1, [sp, 8]
 	ldr	w1, [sp, 8]
-	tbz	x1, 20, .L283
+	tbz	x1, 20, .L289
 	add	sp, sp, 16
 	ret
 	.size	NandcSendDumpDataDone, .-NandcSendDumpDataDone
@@ -1983,7 +2022,7 @@ NandcXferStart:
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	bfi	w19, w3, 4, 1
 	cmp	w0, 3
-	bls	.L288
+	bls	.L294
 	ldr	w0, [x21, 16]
 	cmp	x5, 0
 	str	w0, [x29, 88]
@@ -1991,11 +2030,11 @@ NandcXferStart:
 	ldr	w0, [x29, 88]
 	and	w0, w0, -5
 	str	w0, [x29, 88]
-	beq	.L289
+	beq	.L295
 	and	w2, w2, 255
 	adrp	x20, .LANCHOR35
-	cbnz	w24, .L290
-.L298:
+	cbnz	w24, .L296
+.L304:
 	ldr	x0, [x20, #:lo12:.LANCHOR35]
 	add	w2, w2, 1
 	cmp	x4, 0
@@ -2037,12 +2076,12 @@ NandcXferStart:
 	ldr	w0, [x29, 88]
 	orr	w0, w0, 448
 	str	w0, [x29, 88]
-	bne	.L299
+	bne	.L305
 	ldr	w0, [x29, 88]
 	mov	w1, 2
 	bfi	w0, w1, 3, 3
 	str	w0, [x29, 88]
-.L299:
+.L305:
 	ldr	w0, [x29, 88]
 	cmp	w24, 0
 	cset	w1, eq
@@ -2054,10 +2093,10 @@ NandcXferStart:
 	ldr	w0, [x29, 88]
 	orr	w0, w0, 1
 	str	w0, [x29, 88]
-.L289:
+.L295:
 	ldr	w0, [x29, 88]
 	str	w0, [x21, 16]
-.L288:
+.L294:
 	str	w22, [x21, 12]
 	str	w19, [x21, 8]
 	orr	w19, w19, 4
@@ -2068,7 +2107,7 @@ NandcXferStart:
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L290:
+.L296:
 	adrp	x0, .LANCHOR32
 	mov	w6, 64
 	lsr	w11, w2, 1
@@ -2082,24 +2121,24 @@ NandcXferStart:
 	csel	w6, w6, w0, cc
 	add	x0, x20, :lo12:.LANCHOR35
 	ldr	x10, [x0, 8]
-.L294:
+.L300:
 	cmp	w3, w11
-	bcs	.L298
+	bcs	.L304
 	lsr	w0, w7, 2
 	lsl	w0, w0, 2
-	cbz	x5, .L295
+	cbz	x5, .L301
 	ldrh	w13, [x1]
 	add	x1, x1, 4
 	ldrh	w8, [x1, -2]
 	orr	x8, x13, x8, lsl 16
 	str	w8, [x10, x0]
-.L296:
+.L302:
 	add	w3, w3, 1
 	add	w7, w7, w6
-	b	.L294
-.L295:
+	b	.L300
+.L301:
 	str	w12, [x10, x0]
-	b	.L296
+	b	.L302
 	.size	NandcXferStart, .-NandcXferStart
 	.section	.text.NandcXferComp,"ax",@progbits
 	.align	2
@@ -2115,57 +2154,57 @@ NandcXferComp:
 	adrp	x0, .LANCHOR34
 	ldr	w2, [x0, #:lo12:.LANCHOR34]
 	cmp	w2, 3
-	bls	.L327
+	bls	.L333
 	ldr	w0, [x3, 16]
-	tbz	x0, 2, .L327
+	tbz	x0, 2, .L333
 	ldr	w0, [x3, 16]
-	tbz	x0, 1, .L315
+	tbz	x0, 1, .L321
 	ldr	w0, [x3, 8]
 	str	w0, [x29, 16]
-.L310:
+.L316:
 	ldr	w1, [x3, 28]
 	ldr	w0, [x29, 16]
 	ubfx	x1, x1, 16, 5
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0
-	bge	.L311
+	bge	.L317
 	cmp	w2, 5
-	bls	.L310
+	bls	.L316
 	ldr	w0, [x3]
 	str	w0, [x29, 24]
 	ldr	w0, [x29, 24]
-	tbz	x0, 13, .L310
+	tbz	x0, 13, .L316
 	ldr	w0, [x29, 24]
-	tbz	x0, 17, .L310
-.L311:
+	tbz	x0, 17, .L316
+.L317:
 	adrp	x0, .LANCHOR35+40
 	str	wzr, [x0, #:lo12:.LANCHOR35+40]
-.L306:
+.L312:
 	ldp	x29, x30, [sp], 32
 	ret
-.L315:
+.L321:
 	ldr	w0, [x3, 8]
 	str	w0, [x29, 16]
 	ldr	w0, [x29, 16]
-	tbz	x0, 20, .L315
+	tbz	x0, 20, .L321
 	adrp	x0, .LANCHOR36
 	mov	x4, x0
 	ldr	w1, [x0, #:lo12:.LANCHOR36]
-	cbz	w1, .L316
+	cbz	w1, .L322
 	mov	x0, x3
 	bl	NandcSendDumpDataStart
-.L316:
+.L322:
 	ldr	w0, [x4, #:lo12:.LANCHOR36]
-	cbz	w0, .L311
+	cbz	w0, .L317
 	mov	x0, x3
 	bl	NandcSendDumpDataDone
-	b	.L311
-.L327:
+	b	.L317
+.L333:
 	ldr	w0, [x3, 8]
 	str	w0, [x29, 16]
 	ldr	w0, [x29, 16]
-	tbz	x0, 20, .L327
-	b	.L306
+	tbz	x0, 20, .L333
+	b	.L312
 	.size	NandcXferComp, .-NandcXferComp
 	.section	.text.Ftl_log2,"ax",@progbits
 	.align	2
@@ -2174,16 +2213,16 @@ NandcXferComp:
 Ftl_log2:
 	mov	w2, 1
 	mov	w1, 0
-.L336:
+.L342:
 	cmp	w2, w0
-	bls	.L337
+	bls	.L343
 	sub	w0, w1, #1
 	ret
-.L337:
+.L343:
 	add	w1, w1, 1
 	lsl	w2, w2, 1
 	and	w1, w1, 65535
-	b	.L336
+	b	.L342
 	.size	Ftl_log2, .-Ftl_log2
 	.section	.text.FtlPrintInfo,"ax",@progbits
 	.align	2
@@ -2246,28 +2285,28 @@ FtlConstantsInit:
 	strh	w2, [x4, #:lo12:.LANCHOR45]
 	strh	w8, [x6, #:lo12:.LANCHOR41]
 	str	x19, [sp, 16]
-.L341:
+.L347:
 	strb	w3, [x3, x7]
 	add	x3, x3, 1
 	cmp	x3, 32
-	bne	.L341
+	bne	.L347
 	ldrh	w7, [x5, 20]
 	ldrb	w3, [x5, 15]
 	cmp	w7, w3
-	bcs	.L342
+	bcs	.L348
 	and	w13, w0, 255
 	mul	w15, w0, w2
 	ubfiz	w14, w13, 1, 7
 	add	x1, x1, :lo12:.LANCHOR47
 	mov	w7, 0
-.L343:
+.L349:
 	cmp	w7, w0
-	bcs	.L345
+	bcs	.L351
 	and	w3, w7, 255
 	mov	w10, w7
 	mov	w12, 0
-	b	.L346
-.L344:
+	b	.L352
+.L350:
 	add	w16, w15, w10
 	strb	w3, [x1, w10, uxtw]
 	add	w17, w13, w3
@@ -2276,35 +2315,35 @@ FtlConstantsInit:
 	and	w3, w3, 255
 	add	w10, w10, w0
 	strb	w17, [x1, x16]
-.L346:
+.L352:
 	cmp	w12, w2
-	bcc	.L344
+	bcc	.L350
 	add	w7, w7, 1
-	b	.L343
-.L345:
+	b	.L349
+.L351:
 	ubfiz	w2, w2, 1, 15
 	lsr	w8, w8, 1
 	strh	w2, [x4, #:lo12:.LANCHOR45]
 	strh	w8, [x6, #:lo12:.LANCHOR41]
-.L342:
+.L348:
 	adrp	x1, .LANCHOR48
 	adrp	x13, .LANCHOR49
 	mov	w2, 5
 	cmp	w11, 1
 	strh	w2, [x1, #:lo12:.LANCHOR48]
 	strh	wzr, [x13, #:lo12:.LANCHOR49]
-	bne	.L347
+	bne	.L353
 	strh	w11, [x1, #:lo12:.LANCHOR48]
-.L347:
+.L353:
 	adrp	x8, .LANCHOR50
 	mov	w1, 4352
 	strh	w1, [x8, #:lo12:.LANCHOR50]
 	adrp	x1, .LANCHOR2
 	ldrb	w11, [x1, #:lo12:.LANCHOR2]
-	cbz	w11, .L348
+	cbz	w11, .L354
 	mov	w1, 384
 	strh	w1, [x8, #:lo12:.LANCHOR50]
-.L348:
+.L354:
 	ldrh	w4, [x4, #:lo12:.LANCHOR45]
 	adrp	x1, .LANCHOR38
 	ldrh	w3, [x6, #:lo12:.LANCHOR41]
@@ -2344,10 +2383,10 @@ FtlConstantsInit:
 	adrp	x0, .LANCHOR43
 	mul	w1, w4, w3
 	str	w1, [x0, #:lo12:.LANCHOR43]
-	bls	.L349
+	bls	.L355
 	and	w0, w3, 255
 	strh	w0, [x13, #:lo12:.LANCHOR49]
-.L349:
+.L355:
 	ldrh	w0, [x13, #:lo12:.LANCHOR49]
 	adrp	x1, .LANCHOR60
 	sub	w0, w3, w0
@@ -2363,13 +2402,13 @@ FtlConstantsInit:
 	sdiv	w0, w0, w1
 	and	w0, w0, 65535
 	cmp	w0, 4
-	bls	.L350
-.L366:
+	bls	.L356
+.L372:
 	strh	w0, [x10, #:lo12:.LANCHOR61]
-	cbz	w11, .L352
+	cbz	w11, .L358
 	mov	w0, 640
 	strh	w0, [x8, #:lo12:.LANCHOR50]
-.L352:
+.L358:
 	ldrh	w0, [x8, #:lo12:.LANCHOR50]
 	adrp	x1, .LANCHOR62
 	lsl	w3, w3, 6
@@ -2391,8 +2430,8 @@ FtlConstantsInit:
 	udiv	w0, w0, w4
 	mov	x4, x1
 	add	w3, w0, w3
-	beq	.L353
-.L367:
+	beq	.L359
+.L373:
 	str	w3, [x8, #:lo12:.LANCHOR37]
 	ldrh	w0, [x8, #:lo12:.LANCHOR37]
 	bl	FtlSysBlkNumInit
@@ -2406,9 +2445,9 @@ FtlConstantsInit:
 	lsl	w0, w0, 2
 	mul	w0, w0, w1
 	ldrh	w1, [x6, #:lo12:.LANCHOR56]
-	adrp	x6, .LANCHOR15
+	adrp	x6, .LANCHOR16
 	add	w1, w1, 9
-	ldrb	w6, [x6, #:lo12:.LANCHOR15]
+	ldrb	w6, [x6, #:lo12:.LANCHOR16]
 	lsr	w0, w0, w1
 	adrp	x1, .LANCHOR66
 	add	w0, w0, 2
@@ -2424,13 +2463,13 @@ FtlConstantsInit:
 	ldr	w1, [x4, #:lo12:.LANCHOR64]
 	add	w3, w1, 3
 	str	w3, [x4, #:lo12:.LANCHOR64]
-	cbz	w6, .L355
+	cbz	w6, .L361
 	add	w1, w1, 5
 	add	w2, w2, 4
 	strh	w2, [x10, #:lo12:.LANCHOR61]
-.L368:
+.L374:
 	str	w1, [x4, #:lo12:.LANCHOR64]
-.L356:
+.L362:
 	adrp	x1, .LANCHOR40
 	adrp	x3, .LANCHOR69
 	ldrh	w1, [x1, #:lo12:.LANCHOR40]
@@ -2443,25 +2482,25 @@ FtlConstantsInit:
 	add	w0, w0, w1
 	ldrh	w1, [x15, #:lo12:.LANCHOR55]
 	cmp	w0, w1, lsl 9
-	bcs	.L357
+	bcs	.L363
 	mov	w0, 1
 	strh	w0, [x3, #:lo12:.LANCHOR69]
-.L357:
+.L363:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L350:
+.L356:
 	mov	w0, 4
-	b	.L366
-.L353:
+	b	.L372
+.L359:
 	add	w3, w3, 4
-	b	.L367
-.L355:
+	b	.L373
+.L361:
 	cmp	w3, 7
-	bhi	.L356
+	bhi	.L362
 	mov	w1, 8
-	b	.L368
+	b	.L374
 	.size	FtlConstantsInit, .-FtlConstantsInit
 	.section	.text.IsBlkInVendorPart,"ax",@progbits
 	.align	2
@@ -2471,27 +2510,62 @@ IsBlkInVendorPart:
 	adrp	x1, .LANCHOR70
 	and	w0, w0, 65535
 	ldrh	w1, [x1, #:lo12:.LANCHOR70]
-	cbz	w1, .L373
+	cbz	w1, .L379
 	adrp	x1, .LANCHOR61
 	ldrh	w2, [x1, #:lo12:.LANCHOR61]
 	adrp	x1, .LANCHOR71
 	ldr	x3, [x1, #:lo12:.LANCHOR71]
 	mov	x1, 0
-.L371:
+.L377:
 	cmp	w2, w1, uxth
-	bhi	.L372
-.L373:
+	bhi	.L378
+.L379:
 	mov	w0, 0
 	ret
-.L372:
+.L378:
 	add	x1, x1, 1
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w0
-	bne	.L371
+	bne	.L377
 	mov	w0, 1
 	ret
 	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
+	.section	.text.FtlCacheMetchLpa,"ax",@progbits
+	.align	2
+	.global	FtlCacheMetchLpa
+	.type	FtlCacheMetchLpa, %function
+FtlCacheMetchLpa:
+	adrp	x2, .LANCHOR72
+	ldr	w4, [x2, #:lo12:.LANCHOR72]
+	cbz	w4, .L386
+	adrp	x2, .LANCHOR73
+	mov	x5, 24
+	mov	w6, 56
+	ldr	x2, [x2, #:lo12:.LANCHOR73]
+	nop // between mem op and mult-accumulate
+	umaddl	x4, w4, w6, x5
+	add	x3, x2, 24
+	add	x2, x2, x4
+.L383:
+	cmp	x3, x2
+	bne	.L385
+.L386:
+	mov	w0, 0
+	ret
+.L385:
+	ldr	w4, [x3]
+	cmp	w4, w0
+	bcc	.L384
+	cmp	w4, w1
+	bls	.L387
+.L384:
+	add	x3, x3, 56
+	b	.L383
+.L387:
+	mov	w0, 1
+	ret
+	.size	FtlCacheMetchLpa, .-FtlCacheMetchLpa
 	.section	.text.FtlGetCap,"ax",@progbits
 	.align	2
 	.global	FtlGetCap
@@ -2524,8 +2598,8 @@ ftl_get_density:
 	.global	FtlGetLpn
 	.type	FtlGetLpn, %function
 FtlGetLpn:
-	adrp	x0, .LANCHOR72
-	ldr	w0, [x0, #:lo12:.LANCHOR72]
+	adrp	x0, .LANCHOR74
+	ldr	w0, [x0, #:lo12:.LANCHOR74]
 	ret
 	.size	FtlGetLpn, .-FtlGetLpn
 	.section	.text.FtlGetCurEraseBlock,"ax",@progbits
@@ -2535,8 +2609,8 @@ FtlGetLpn:
 FtlGetCurEraseBlock:
 	adrp	x0, .LANCHOR38
 	ldrh	w1, [x0, #:lo12:.LANCHOR38]
-	adrp	x0, .LANCHOR73
-	ldr	w0, [x0, #:lo12:.LANCHOR73]
+	adrp	x0, .LANCHOR75
+	ldr	w0, [x0, #:lo12:.LANCHOR75]
 	mul	w0, w1, w0
 	ret
 	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
@@ -2564,8 +2638,8 @@ FtlBbmMapBadBlock:
 	add	x29, sp, 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR74
-	add	x19, x19, :lo12:.LANCHOR74
+	adrp	x19, .LANCHOR76
+	add	x19, x19, :lo12:.LANCHOR76
 	udiv	w3, w1, w0
 	and	w2, w3, 65535
 	msub	w3, w3, w0, w1
@@ -2600,8 +2674,8 @@ FtlBbmIsBadBlock:
 	ldrh	w1, [x1, #:lo12:.LANCHOR51]
 	udiv	w2, w0, w1
 	msub	w0, w2, w1, w0
-	adrp	x1, .LANCHOR74
-	add	x1, x1, :lo12:.LANCHOR74
+	adrp	x1, .LANCHOR76
+	add	x1, x1, :lo12:.LANCHOR76
 	add	x2, x1, x2, uxth 3
 	and	w0, w0, 65535
 	ubfx	x3, x0, 5, 11
@@ -2675,12 +2749,12 @@ P2V_block_in_plane:
 ftl_cmp_data_ver:
 	cmp	w0, w1
 	mov	w2, -2147483648
-	bls	.L389
+	bls	.L402
 	sub	w1, w0, w1
 	cmp	w1, w2
 	cset	w0, ls
 	ret
-.L389:
+.L402:
 	sub	w1, w1, w0
 	cmp	w1, w2
 	cset	w0, hi
@@ -2691,8 +2765,8 @@ ftl_cmp_data_ver:
 	.global	FtlFreeSysBlkQueueEmpty
 	.type	FtlFreeSysBlkQueueEmpty, %function
 FtlFreeSysBlkQueueEmpty:
-	adrp	x0, .LANCHOR75+6
-	ldrh	w0, [x0, #:lo12:.LANCHOR75+6]
+	adrp	x0, .LANCHOR77+6
+	ldrh	w0, [x0, #:lo12:.LANCHOR77+6]
 	cmp	w0, 0
 	cset	w0, eq
 	ret
@@ -2702,8 +2776,8 @@ FtlFreeSysBlkQueueEmpty:
 	.global	FtlFreeSysBlkQueueFull
 	.type	FtlFreeSysBlkQueueFull, %function
 FtlFreeSysBlkQueueFull:
-	adrp	x0, .LANCHOR75+6
-	ldrh	w0, [x0, #:lo12:.LANCHOR75+6]
+	adrp	x0, .LANCHOR77+6
+	ldrh	w0, [x0, #:lo12:.LANCHOR77+6]
 	cmp	w0, 1024
 	cset	w0, eq
 	ret
@@ -2721,40 +2795,40 @@ FtlFreeSysBlkQueueIn:
 	sub	w2, w20, #1
 	mov	w0, 65533
 	cmp	w0, w2, uxth
-	bcc	.L393
-	adrp	x0, .LANCHOR75
-	add	x2, x0, :lo12:.LANCHOR75
+	bcc	.L406
+	adrp	x0, .LANCHOR77
+	add	x2, x0, :lo12:.LANCHOR77
 	mov	x19, x0
 	ldrh	w2, [x2, 6]
 	cmp	w2, 1024
-	beq	.L393
+	beq	.L406
 	and	w1, w1, 65535
-	cbz	w1, .L395
-	adrp	x0, .LANCHOR76
-	ldr	w0, [x0, #:lo12:.LANCHOR76]
-	cbnz	w0, .L395
+	cbz	w1, .L408
+	adrp	x0, .LANCHOR78
+	ldr	w0, [x0, #:lo12:.LANCHOR78]
+	cbnz	w0, .L408
 	mov	w0, w20
 	bl	P2V_block_in_plane
 	and	w21, w0, 65535
-	adrp	x0, .LANCHOR77
+	adrp	x0, .LANCHOR79
 	lsl	w1, w20, 10
 	mov	w2, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR77]
+	ldr	x0, [x0, #:lo12:.LANCHOR79]
 	str	w1, [x0, 4]
 	mov	w1, w2
 	bl	FlashEraseBlocks
-	adrp	x1, .LANCHOR78
+	adrp	x1, .LANCHOR80
 	ubfiz	x0, x21, 1, 16
-	ldr	x2, [x1, #:lo12:.LANCHOR78]
+	ldr	x2, [x1, #:lo12:.LANCHOR80]
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-	adrp	x1, .LANCHOR79
-	ldr	w0, [x1, #:lo12:.LANCHOR79]
+	adrp	x1, .LANCHOR81
+	ldr	w0, [x1, #:lo12:.LANCHOR81]
 	add	w0, w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR79]
-.L395:
-	add	x0, x19, :lo12:.LANCHOR75
+	str	w0, [x1, #:lo12:.LANCHOR81]
+.L408:
+	add	x0, x19, :lo12:.LANCHOR77
 	ldrh	w1, [x0, 6]
 	add	w1, w1, 1
 	strh	w1, [x0, 6]
@@ -2764,7 +2838,7 @@ FtlFreeSysBlkQueueIn:
 	and	w1, w1, 1023
 	strh	w1, [x0, 4]
 	strh	w20, [x2, 8]
-.L393:
+.L406:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -2775,27 +2849,27 @@ FtlFreeSysBlkQueueIn:
 	.global	FtlFreeSysBLkSort
 	.type	FtlFreeSysBLkSort, %function
 FtlFreeSysBLkSort:
-	adrp	x0, .LANCHOR75
-	add	x1, x0, :lo12:.LANCHOR75
+	adrp	x0, .LANCHOR77
+	add	x1, x0, :lo12:.LANCHOR77
 	ldrh	w2, [x1, 6]
-	cbz	w2, .L403
-	adrp	x2, .LANCHOR80+28
+	cbz	w2, .L416
+	adrp	x2, .LANCHOR82+28
 	ldrh	w3, [x1, 2]
 	mov	w6, 0
 	mov	w4, 0
-	ldrh	w5, [x2, #:lo12:.LANCHOR80+28]
+	ldrh	w5, [x2, #:lo12:.LANCHOR82+28]
 	ldrh	w2, [x1, 4]
 	and	w5, w5, 31
-.L405:
+.L418:
 	cmp	w5, w4
-	bgt	.L406
-	cbz	w6, .L403
-	add	x0, x0, :lo12:.LANCHOR75
+	bgt	.L419
+	cbz	w6, .L416
+	add	x0, x0, :lo12:.LANCHOR77
 	strh	w3, [x0, 2]
 	strh	w2, [x0, 4]
-.L403:
+.L416:
 	ret
-.L406:
+.L419:
 	add	x6, x1, x3, sxtw 1
 	add	w4, w4, 1
 	add	w3, w3, 1
@@ -2807,7 +2881,7 @@ FtlFreeSysBLkSort:
 	mov	w6, 1
 	add	w2, w2, w6
 	and	w2, w2, 1023
-	b	.L405
+	b	.L418
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
 	.section	.text.FtlFreeSysBlkQueueOut,"ax",@progbits
 	.align	2
@@ -2817,16 +2891,16 @@ FtlFreeSysBlkQueueOut:
 	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR75
-	add	x19, x19, :lo12:.LANCHOR75
+	adrp	x19, .LANCHOR77
+	add	x19, x19, :lo12:.LANCHOR77
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR76
+	adrp	x22, .LANCHOR78
 	mov	x23, x19
-	add	x22, x22, :lo12:.LANCHOR76
-.L413:
+	add	x22, x22, :lo12:.LANCHOR78
+.L426:
 	ldrh	w1, [x19, 6]
-	cbz	w1, .L414
+	cbz	w1, .L427
 	ldrh	w0, [x19, 2]
 	sub	w1, w1, #1
 	strh	w1, [x19, 6]
@@ -2836,55 +2910,55 @@ FtlFreeSysBlkQueueOut:
 	strh	w0, [x19, 2]
 	ldr	w0, [x22]
 	ldrh	w20, [x2, 8]
-	cbnz	w0, .L415
+	cbnz	w0, .L428
 	mov	w0, w20
 	bl	P2V_block_in_plane
-	adrp	x1, .LANCHOR77
+	adrp	x1, .LANCHOR79
 	and	w21, w0, 65535
 	lsl	w2, w20, 10
 	mov	x24, x1
-	ldr	x0, [x1, #:lo12:.LANCHOR77]
+	ldr	x0, [x1, #:lo12:.LANCHOR79]
 	str	w2, [x0, 4]
-	adrp	x2, .LANCHOR15
-	ldrb	w2, [x2, #:lo12:.LANCHOR15]
-	cbz	w2, .L416
+	adrp	x2, .LANCHOR16
+	ldrb	w2, [x2, #:lo12:.LANCHOR16]
+	cbz	w2, .L429
 	mov	w2, 1
 	mov	w1, 0
 	bl	FlashEraseBlocks
-.L416:
-	ldr	x0, [x24, #:lo12:.LANCHOR77]
+.L429:
+	ldr	x0, [x24, #:lo12:.LANCHOR79]
 	mov	w2, 1
 	mov	w1, w2
 	bl	FlashEraseBlocks
-	adrp	x1, .LANCHOR78
+	adrp	x1, .LANCHOR80
 	ubfiz	x0, x21, 1, 16
-	ldr	x2, [x1, #:lo12:.LANCHOR78]
+	ldr	x2, [x1, #:lo12:.LANCHOR80]
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-	adrp	x1, .LANCHOR79
-	ldr	w0, [x1, #:lo12:.LANCHOR79]
+	adrp	x1, .LANCHOR81
+	ldr	w0, [x1, #:lo12:.LANCHOR81]
 	add	w0, w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR79]
-.L415:
+	str	w0, [x1, #:lo12:.LANCHOR81]
+.L428:
 	sub	w0, w20, #1
 	mov	w1, 65533
 	cmp	w1, w0, uxth
-	bcs	.L418
+	bcs	.L431
 	ldrh	w2, [x23, 6]
 	mov	w1, w20
 	adrp	x0, .LC4
 	add	x0, x0, :lo12:.LC4
 	bl	printf
-	b	.L413
-.L414:
+	b	.L426
+.L427:
 	adrp	x0, .LC3
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC3
 	bl	printf
-.L417:
-	b	.L417
-.L418:
+.L430:
+	b	.L430
+.L431:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -2898,10 +2972,10 @@ FtlFreeSysBlkQueueOut:
 	.type	test_node_in_list, %function
 test_node_in_list:
 	ldr	x2, [x0]
-	adrp	x0, .LANCHOR81
+	adrp	x0, .LANCHOR83
 	mov	x4, -6148914691236517206
 	and	w1, w1, 65535
-	ldr	x3, [x0, #:lo12:.LANCHOR81]
+	ldr	x3, [x0, #:lo12:.LANCHOR83]
 	movk	x4, 0xaaab, lsl 0
 	mov	w5, 65535
 	sub	x0, x2, x3
@@ -2909,18 +2983,18 @@ test_node_in_list:
 	mul	x0, x0, x4
 	mov	w4, 6
 	and	w0, w0, 65535
-.L425:
+.L438:
 	cmp	w0, w1
-	beq	.L426
+	beq	.L439
 	ldrh	w0, [x2]
 	cmp	w0, w5
-	beq	.L427
+	beq	.L440
 	umaddl	x2, w0, w4, x3
-	b	.L425
-.L426:
+	b	.L438
+.L439:
 	mov	w0, 1
 	ret
-.L427:
+.L440:
 	mov	w0, 0
 	ret
 	.size	test_node_in_list, .-test_node_in_list
@@ -2933,30 +3007,30 @@ insert_data_list:
 	and	w0, w0, 65535
 	ldrh	w14, [x1, #:lo12:.LANCHOR40]
 	cmp	w14, w0
-	bls	.L444
-	adrp	x1, .LANCHOR81
+	bls	.L457
+	adrp	x1, .LANCHOR83
 	mov	w3, 6
-	ldr	x6, [x1, #:lo12:.LANCHOR81]
+	ldr	x6, [x1, #:lo12:.LANCHOR83]
 	umull	x13, w0, w3
 	mov	w1, -1
 	add	x5, x6, x13
 	strh	w1, [x5, 2]
 	strh	w1, [x6, x13]
-	adrp	x1, .LANCHOR82
+	adrp	x1, .LANCHOR84
 	mov	x15, x1
-	ldr	x12, [x1, #:lo12:.LANCHOR82]
-	cbnz	x12, .L431
-	str	x5, [x1, #:lo12:.LANCHOR82]
-.L444:
+	ldr	x12, [x1, #:lo12:.LANCHOR84]
+	cbnz	x12, .L444
+	str	x5, [x1, #:lo12:.LANCHOR84]
+.L457:
 	mov	w0, 0
 	ret
-.L431:
+.L444:
 	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LANCHOR83
+	adrp	x1, .LANCHOR85
 	ubfiz	x2, x0, 1, 16
 	mov	x4, -6148914691236517206
 	add	x29, sp, 0
-	ldr	x16, [x1, #:lo12:.LANCHOR83]
+	ldr	x16, [x1, #:lo12:.LANCHOR85]
 	movk	x4, 0xaaab, lsl 0
 	ldrh	w1, [x5, 4]
 	mov	w8, -1
@@ -2971,19 +3045,19 @@ insert_data_list:
 	csel	w7, w7, w8, ne
 	mov	w8, w3
 	mul	x1, x1, x4
-	adrp	x4, .LANCHOR78
-	ldr	x17, [x4, #:lo12:.LANCHOR78]
+	adrp	x4, .LANCHOR80
+	ldr	x17, [x4, #:lo12:.LANCHOR80]
 	and	w1, w1, 65535
 	mov	x4, x12
 	add	x10, x17, x2
 	mov	w2, 0
-.L439:
+.L452:
 	add	w2, w2, 1
 	and	w2, w2, 65535
 	cmp	w14, w2
-	bcc	.L430
+	bcc	.L443
 	cmp	w1, w0
-	beq	.L430
+	beq	.L443
 	ubfiz	x30, x1, 1, 16
 	ldrh	w19, [x4, 4]
 	cmp	w19, 0
@@ -2991,46 +3065,46 @@ insert_data_list:
 	mul	w3, w3, w19
 	csel	w3, w3, w11, ne
 	cmp	w7, w3
-	bne	.L435
+	bne	.L448
 	ldrh	w19, [x17, x30]
 	ldrh	w3, [x10]
 	cmp	w19, w3
-	bcc	.L437
-.L436:
+	bcc	.L450
+.L449:
 	strh	w1, [x6, x13]
 	cmp	x4, x12
 	ldrh	w1, [x4, 2]
 	strh	w1, [x5, 2]
-	bne	.L440
+	bne	.L453
 	strh	w0, [x4, 2]
-	str	x5, [x15, #:lo12:.LANCHOR82]
-	b	.L430
-.L435:
-	bcc	.L436
-.L437:
+	str	x5, [x15, #:lo12:.LANCHOR84]
+	b	.L443
+.L448:
+	bcc	.L449
+.L450:
 	ldrh	w3, [x4]
 	cmp	w3, w20
-	bne	.L438
+	bne	.L451
 	strh	w1, [x5, 2]
 	strh	w0, [x4]
-	adrp	x0, .LANCHOR84
-	str	x5, [x0, #:lo12:.LANCHOR84]
-.L430:
+	adrp	x0, .LANCHOR86
+	str	x5, [x0, #:lo12:.LANCHOR86]
+.L443:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L438:
+.L451:
 	umaddl	x4, w3, w8, x6
 	mov	w1, w3
-	b	.L439
-.L440:
+	b	.L452
+.L453:
 	ldrh	w1, [x4, 2]
 	mov	w2, 6
 	umull	x1, w1, w2
 	strh	w0, [x6, x1]
 	strh	w0, [x4, 2]
-	b	.L430
+	b	.L443
 	.size	insert_data_list, .-insert_data_list
 	.section	.text.INSERT_DATA_LIST,"ax",@progbits
 	.align	2
@@ -3040,19 +3114,19 @@ INSERT_DATA_LIST:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	insert_data_list
-	adrp	x1, .LANCHOR85
-	ldrh	w0, [x1, #:lo12:.LANCHOR85]
+	adrp	x1, .LANCHOR87
+	ldrh	w0, [x1, #:lo12:.LANCHOR87]
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	strh	w0, [x1, #:lo12:.LANCHOR85]
+	strh	w0, [x1, #:lo12:.LANCHOR87]
 	adrp	x1, .LANCHOR40
 	ldrh	w1, [x1, #:lo12:.LANCHOR40]
 	cmp	w1, w0
-	bcs	.L446
-	mov	w2, 210
-	adrp	x1, .LANCHOR86
+	bcs	.L459
+	mov	w2, 245
+	adrp	x1, .LANCHOR88
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR86
+	add	x1, x1, :lo12:.LANCHOR88
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	ldp	x29, x30, [sp], 16
@@ -3061,7 +3135,7 @@ INSERT_DATA_LIST:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	b	printf
-.L446:
+.L459:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
@@ -3073,28 +3147,28 @@ insert_free_list:
 	and	w0, w0, 65535
 	mov	w7, 65535
 	cmp	w0, w7
-	beq	.L450
-	adrp	x1, .LANCHOR81
+	beq	.L463
+	adrp	x1, .LANCHOR83
 	mov	w6, 6
-	ldr	x3, [x1, #:lo12:.LANCHOR81]
+	ldr	x3, [x1, #:lo12:.LANCHOR83]
 	umull	x8, w0, w6
 	mov	w1, -1
 	add	x4, x3, x8
 	strh	w1, [x4, 2]
 	strh	w1, [x3, x8]
-	adrp	x1, .LANCHOR87
+	adrp	x1, .LANCHOR89
 	mov	x12, x1
-	ldr	x5, [x1, #:lo12:.LANCHOR87]
-	cbnz	x5, .L451
-	str	x4, [x1, #:lo12:.LANCHOR87]
-.L450:
+	ldr	x5, [x1, #:lo12:.LANCHOR89]
+	cbnz	x5, .L464
+	str	x4, [x1, #:lo12:.LANCHOR89]
+.L463:
 	mov	w0, 0
 	ret
-.L451:
-	adrp	x1, .LANCHOR78
+.L464:
+	adrp	x1, .LANCHOR80
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
-	ldr	x11, [x1, #:lo12:.LANCHOR78]
+	ldr	x11, [x1, #:lo12:.LANCHOR80]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w13, [x11, x1]
 	sub	x1, x5, x3
@@ -3102,37 +3176,37 @@ insert_free_list:
 	mul	x1, x1, x2
 	mov	x2, x5
 	and	w1, w1, 65535
-.L454:
+.L467:
 	ubfiz	x10, x1, 1, 16
 	ldrh	w10, [x11, x10]
 	cmp	w10, w13
-	bcs	.L452
+	bcs	.L465
 	ldrh	w10, [x2]
 	cmp	w10, w7
-	bne	.L453
+	bne	.L466
 	strh	w1, [x4, 2]
 	strh	w0, [x2]
-	b	.L450
-.L453:
+	b	.L463
+.L466:
 	umaddl	x2, w10, w6, x3
 	mov	w1, w10
-	b	.L454
-.L452:
+	b	.L467
+.L465:
 	ldrh	w6, [x2, 2]
 	cmp	x2, x5
 	strh	w6, [x4, 2]
 	strh	w1, [x3, x8]
-	bne	.L455
+	bne	.L468
 	strh	w0, [x2, 2]
-	str	x4, [x12, #:lo12:.LANCHOR87]
-	b	.L450
-.L455:
+	str	x4, [x12, #:lo12:.LANCHOR89]
+	b	.L463
+.L468:
 	ldrh	w1, [x2, 2]
 	mov	w4, 6
 	umull	x1, w1, w4
 	strh	w0, [x3, x1]
 	strh	w0, [x2, 2]
-	b	.L450
+	b	.L463
 	.size	insert_free_list, .-insert_free_list
 	.section	.text.INSERT_FREE_LIST,"ax",@progbits
 	.align	2
@@ -3142,19 +3216,19 @@ INSERT_FREE_LIST:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	insert_free_list
-	adrp	x1, .LANCHOR88
-	ldrh	w0, [x1, #:lo12:.LANCHOR88]
+	adrp	x1, .LANCHOR90
+	ldrh	w0, [x1, #:lo12:.LANCHOR90]
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	strh	w0, [x1, #:lo12:.LANCHOR88]
+	strh	w0, [x1, #:lo12:.LANCHOR90]
 	adrp	x1, .LANCHOR40
 	ldrh	w1, [x1, #:lo12:.LANCHOR40]
 	cmp	w1, w0
-	bcs	.L456
-	mov	w2, 203
-	adrp	x1, .LANCHOR89
+	bcs	.L469
+	mov	w2, 238
+	adrp	x1, .LANCHOR91
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR89
+	add	x1, x1, :lo12:.LANCHOR91
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	ldp	x29, x30, [sp], 16
@@ -3163,7 +3237,7 @@ INSERT_FREE_LIST:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	b	printf
-.L456:
+.L469:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
@@ -3176,25 +3250,25 @@ List_remove_node:
 	and	w1, w1, 65535
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR81
+	adrp	x20, .LANCHOR83
 	stp	x21, x22, [sp, 32]
 	mov	x22, x0
 	mov	w0, 6
 	str	x23, [sp, 48]
-	ldr	x23, [x20, #:lo12:.LANCHOR81]
+	ldr	x23, [x20, #:lo12:.LANCHOR83]
 	umull	x21, w1, w0
 	mov	w0, 65535
 	add	x19, x23, x21
 	ldrh	w1, [x19, 2]
 	cmp	w1, w0
-	bne	.L460
+	bne	.L473
 	ldr	x0, [x22]
 	cmp	x19, x0
-	beq	.L460
-	mov	w2, 386
-	adrp	x1, .LANCHOR90
+	beq	.L473
+	mov	w2, 435
+	adrp	x1, .LANCHOR92
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR90
+	add	x1, x1, :lo12:.LANCHOR92
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -3202,16 +3276,16 @@ List_remove_node:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L460:
+.L473:
 	ldr	x0, [x22]
 	mov	w1, 65535
 	cmp	x19, x0
 	ldrh	w0, [x23, x21]
-	bne	.L461
+	bne	.L474
 	cmp	w0, w1
-	bne	.L462
+	bne	.L475
 	str	xzr, [x22]
-.L463:
+.L476:
 	mov	w0, -1
 	strh	w0, [x23, x21]
 	strh	w0, [x19, 2]
@@ -3221,35 +3295,35 @@ List_remove_node:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L462:
-	ldr	x1, [x20, #:lo12:.LANCHOR81]
+.L475:
+	ldr	x1, [x20, #:lo12:.LANCHOR83]
 	mov	w2, 6
 	umaddl	x0, w0, w2, x1
 	mov	w1, -1
 	str	x0, [x22]
 	strh	w1, [x0, 2]
-	b	.L463
-.L461:
+	b	.L476
+.L474:
 	cmp	w0, w1
 	ldrh	w1, [x19, 2]
-	bne	.L464
+	bne	.L477
 	cmp	w1, w0
-	beq	.L463
+	beq	.L476
 	mov	w0, 6
 	mov	w2, -1
 	umull	x1, w1, w0
-	ldr	x0, [x20, #:lo12:.LANCHOR81]
+	ldr	x0, [x20, #:lo12:.LANCHOR83]
 	strh	w2, [x0, x1]
-	b	.L463
-.L464:
-	ldr	x2, [x20, #:lo12:.LANCHOR81]
+	b	.L476
+.L477:
+	ldr	x2, [x20, #:lo12:.LANCHOR83]
 	mov	w3, 6
 	umaddl	x4, w0, w3, x2
 	strh	w1, [x4, 2]
 	ldrh	w1, [x19, 2]
 	umull	x1, w1, w3
 	strh	w0, [x2, x1]
-	b	.L463
+	b	.L476
 	.size	List_remove_node, .-List_remove_node
 	.section	.text.List_pop_index_node,"ax",@progbits
 	.align	2
@@ -3257,18 +3331,18 @@ List_remove_node:
 	.type	List_pop_index_node, %function
 List_pop_index_node:
 	ldr	x2, [x0]
-	cbz	x2, .L472
+	cbz	x2, .L485
 	stp	x29, x30, [sp, -32]!
-	adrp	x3, .LANCHOR81
+	adrp	x3, .LANCHOR83
 	and	w1, w1, 65535
 	mov	w4, 65535
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	mov	w5, 6
-	ldr	x19, [x3, #:lo12:.LANCHOR81]
-.L468:
-	cbnz	w1, .L469
-.L471:
+	ldr	x19, [x3, #:lo12:.LANCHOR83]
+.L481:
+	cbnz	w1, .L482
+.L484:
 	sub	x19, x2, x19
 	mov	x2, -6148914691236517206
 	asr	x19, x19, 1
@@ -3281,15 +3355,15 @@ List_pop_index_node:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L469:
+.L482:
 	ldrh	w3, [x2]
 	cmp	w3, w4
-	beq	.L471
+	beq	.L484
 	sub	w1, w1, #1
 	umaddl	x2, w3, w5, x19
 	and	w1, w1, 65535
-	b	.L468
-.L472:
+	b	.L481
+.L485:
 	mov	w0, 65535
 	ret
 	.size	List_pop_index_node, .-List_pop_index_node
@@ -3299,28 +3373,28 @@ List_pop_index_node:
 	.type	List_get_gc_head_node, %function
 List_get_gc_head_node:
 	and	w2, w0, 65535
-	adrp	x0, .LANCHOR82
-	ldr	x1, [x0, #:lo12:.LANCHOR82]
-	cbz	x1, .L482
-	adrp	x0, .LANCHOR81
+	adrp	x0, .LANCHOR84
+	ldr	x1, [x0, #:lo12:.LANCHOR84]
+	cbz	x1, .L495
+	adrp	x0, .LANCHOR83
 	mov	w4, 6
-	ldr	x3, [x0, #:lo12:.LANCHOR81]
+	ldr	x3, [x0, #:lo12:.LANCHOR83]
 	mov	w0, 65535
-.L479:
-	cbz	w2, .L480
+.L492:
+	cbz	w2, .L493
 	ldrh	w1, [x1]
 	cmp	w1, w0
-	bne	.L481
+	bne	.L494
 	ret
-.L481:
+.L494:
 	sub	w2, w2, #1
 	umaddl	x1, w1, w4, x3
 	and	w2, w2, 65535
-	b	.L479
-.L482:
+	b	.L492
+.L495:
 	mov	w0, 65535
 	ret
-.L480:
+.L493:
 	sub	x0, x1, x3
 	mov	x1, -6148914691236517206
 	asr	x0, x0, 1
@@ -3338,35 +3412,35 @@ List_update_data_list:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w19, w0, 65535
-	adrp	x0, .LANCHOR91
+	adrp	x0, .LANCHOR93
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	stp	x25, x26, [sp, 64]
 	cmp	w0, w19
-	beq	.L485
-	adrp	x0, .LANCHOR92
-	ldrh	w0, [x0, #:lo12:.LANCHOR92]
+	beq	.L498
+	adrp	x0, .LANCHOR94
+	ldrh	w0, [x0, #:lo12:.LANCHOR94]
 	cmp	w0, w19
-	beq	.L485
-	adrp	x0, .LANCHOR93
-	ldrh	w0, [x0, #:lo12:.LANCHOR93]
+	beq	.L498
+	adrp	x0, .LANCHOR95
+	ldrh	w0, [x0, #:lo12:.LANCHOR95]
 	cmp	w0, w19
-	beq	.L485
-	adrp	x0, .LANCHOR81
+	beq	.L498
+	adrp	x0, .LANCHOR83
 	mov	w21, 6
-	adrp	x24, .LANCHOR82
+	adrp	x24, .LANCHOR84
 	mov	x26, x0
 	umull	x21, w19, w21
-	ldr	x23, [x0, #:lo12:.LANCHOR81]
-	ldr	x1, [x24, #:lo12:.LANCHOR82]
+	ldr	x23, [x0, #:lo12:.LANCHOR83]
+	ldr	x1, [x24, #:lo12:.LANCHOR84]
 	add	x22, x23, x21
 	cmp	x22, x1
-	beq	.L485
-	adrp	x1, .LANCHOR83
+	beq	.L498
+	adrp	x1, .LANCHOR85
 	ubfiz	x0, x19, 1, 16
 	mov	x25, x1
-	ldr	x2, [x1, #:lo12:.LANCHOR83]
+	ldr	x2, [x1, #:lo12:.LANCHOR85]
 	mov	w1, 65535
 	ldrh	w20, [x2, x0]
 	ldrh	w0, [x22, 4]
@@ -3375,14 +3449,14 @@ List_update_data_list:
 	ldrh	w0, [x22, 2]
 	csinv	w20, w20, wzr, ne
 	cmp	w0, w1
-	bne	.L488
+	bne	.L501
 	ldrh	w1, [x23, x21]
 	cmp	w1, w0
-	bne	.L488
-	mov	w2, 504
-	adrp	x1, .LANCHOR94
+	bne	.L501
+	mov	w2, 571
+	adrp	x1, .LANCHOR96
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR94
+	add	x1, x1, :lo12:.LANCHOR96
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -3390,41 +3464,41 @@ List_update_data_list:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L488:
+.L501:
 	ldrh	w0, [x22, 2]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L489
+	bne	.L502
 	ldrh	w1, [x23, x21]
 	cmp	w1, w0
-	beq	.L485
-.L489:
+	beq	.L498
+.L502:
 	mov	w1, 6
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
 	umull	x0, w0, w1
 	asr	x1, x0, 1
 	mul	x1, x1, x2
-	ldr	x2, [x25, #:lo12:.LANCHOR83]
+	ldr	x2, [x25, #:lo12:.LANCHOR85]
 	ldrh	w1, [x2, x1, lsl 1]
-	ldr	x2, [x26, #:lo12:.LANCHOR81]
+	ldr	x2, [x26, #:lo12:.LANCHOR83]
 	add	x0, x2, x0
 	ldrh	w2, [x0, 4]
 	cmp	w2, 0
 	mul	w0, w1, w2
 	csinv	w0, w0, wzr, ne
 	cmp	w20, w0
-	bcs	.L485
-	adrp	x20, .LANCHOR85
+	bcs	.L498
+	adrp	x20, .LANCHOR87
 	mov	w1, w19
-	add	x0, x24, :lo12:.LANCHOR82
+	add	x0, x24, :lo12:.LANCHOR84
 	bl	List_remove_node
-	ldrh	w0, [x20, #:lo12:.LANCHOR85]
-	cbnz	w0, .L491
-	mov	w2, 515
-	adrp	x1, .LANCHOR94
+	ldrh	w0, [x20, #:lo12:.LANCHOR87]
+	cbnz	w0, .L504
+	mov	w2, 585
+	adrp	x1, .LANCHOR96
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR94
+	add	x1, x1, :lo12:.LANCHOR96
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -3432,13 +3506,13 @@ List_update_data_list:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L491:
-	ldrh	w0, [x20, #:lo12:.LANCHOR85]
+.L504:
+	ldrh	w0, [x20, #:lo12:.LANCHOR87]
 	sub	w0, w0, #1
-	strh	w0, [x20, #:lo12:.LANCHOR85]
+	strh	w0, [x20, #:lo12:.LANCHOR87]
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-.L485:
+.L498:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -3460,27 +3534,27 @@ ftl_map_blk_alloc_new_blk:
 	mov	w20, 0
 	ldr	x0, [x0, 16]
 	str	x21, [sp, 32]
-.L496:
+.L509:
 	cmp	w20, w1
-	beq	.L500
+	beq	.L513
 	mov	x21, x0
 	ldrh	w2, [x0], 2
-	cbnz	w2, .L497
+	cbnz	w2, .L510
 	bl	FtlFreeSysBlkQueueOut
 	and	w1, w0, 65535
 	strh	w0, [x21]
 	sub	w2, w1, #1
 	mov	w0, 65533
 	cmp	w0, w2, uxth
-	bcs	.L498
-	adrp	x0, .LANCHOR75+6
-	ldrh	w2, [x0, #:lo12:.LANCHOR75+6]
+	bcs	.L511
+	adrp	x0, .LANCHOR77+6
+	ldrh	w2, [x0, #:lo12:.LANCHOR77+6]
 	adrp	x0, .LC8
 	add	x0, x0, :lo12:.LC8
 	bl	printf
-.L499:
-	b	.L499
-.L498:
+.L512:
+	b	.L512
+.L511:
 	ldr	w0, [x19, 48]
 	strh	wzr, [x19, 2]
 	add	w0, w0, 1
@@ -3489,14 +3563,14 @@ ftl_map_blk_alloc_new_blk:
 	strh	w20, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
-.L500:
+.L513:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L502
-	mov	w2, 629
-	adrp	x1, .LANCHOR95
+	bhi	.L515
+	mov	w2, 715
+	adrp	x1, .LANCHOR97
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR95
+	add	x1, x1, :lo12:.LANCHOR97
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -3504,16 +3578,16 @@ ftl_map_blk_alloc_new_blk:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L502:
+.L515:
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L497:
+.L510:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L496
+	b	.L509
 	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
 	.section	.text.select_l2p_ram_region,"ax",@progbits
 	.align	2
@@ -3526,36 +3600,36 @@ select_l2p_ram_region:
 	mov	w3, 65535
 	add	x29, sp, 0
 	ldrh	w2, [x0, #:lo12:.LANCHOR67]
-	adrp	x0, .LANCHOR96
+	adrp	x0, .LANCHOR98
 	str	x19, [sp, 16]
-	ldr	x0, [x0, #:lo12:.LANCHOR96]
-.L505:
+	ldr	x0, [x0, #:lo12:.LANCHOR98]
+.L518:
 	and	w19, w1, 65535
 	cmp	w19, w2
-	bcc	.L507
+	bcc	.L520
 	add	x3, x0, 4
 	mov	w19, w2
 	mov	w5, -2147483648
 	mov	w1, 0
-.L508:
+.L521:
 	cmp	w1, w2
-	bne	.L510
+	bne	.L523
 	cmp	w19, w2
-	bcc	.L506
-	adrp	x1, .LANCHOR97
+	bcc	.L519
+	adrp	x1, .LANCHOR99
 	mov	w19, w2
 	mov	w3, -1
-	ldrh	w4, [x1, #:lo12:.LANCHOR97]
+	ldrh	w4, [x1, #:lo12:.LANCHOR99]
 	mov	w1, 0
-.L511:
+.L524:
 	cmp	w1, w2
-	bne	.L513
+	bne	.L526
 	cmp	w19, w1
-	bcc	.L506
-	mov	w2, 859
-	adrp	x1, .LANCHOR98
+	bcc	.L519
+	mov	w2, 977
+	adrp	x1, .LANCHOR100
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR98
+	add	x1, x1, :lo12:.LANCHOR100
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -3563,86 +3637,86 @@ select_l2p_ram_region:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-	b	.L506
-.L507:
+	b	.L519
+.L520:
 	add	x1, x1, 1
 	add	x4, x0, x1, lsl 4
 	ldrh	w4, [x4, -16]
 	cmp	w4, w3
-	bne	.L505
-.L506:
+	bne	.L518
+.L519:
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L510:
+.L523:
 	ldr	w4, [x3]
-	tbnz	w4, #31, .L509
+	tbnz	w4, #31, .L522
 	cmp	w5, w4
-	bls	.L509
+	bls	.L522
 	mov	w5, w4
 	mov	w19, w1
-.L509:
+.L522:
 	add	w1, w1, 1
 	add	x3, x3, 16
 	and	w1, w1, 65535
-	b	.L508
-.L513:
+	b	.L521
+.L526:
 	ldr	w6, [x0, 4]
 	cmp	w3, w6
-	bls	.L512
+	bls	.L525
 	ldrh	w5, [x0]
 	cmp	w5, w4
 	csel	w3, w3, w6, eq
 	csel	w19, w19, w1, eq
-.L512:
+.L525:
 	add	w1, w1, 1
 	add	x0, x0, 16
 	and	w1, w1, 65535
-	b	.L511
+	b	.L524
 	.size	select_l2p_ram_region, .-select_l2p_ram_region
 	.section	.text.FtlUpdateVaildLpn,"ax",@progbits
 	.align	2
 	.global	FtlUpdateVaildLpn
 	.type	FtlUpdateVaildLpn, %function
 FtlUpdateVaildLpn:
-	adrp	x2, .LANCHOR99
+	adrp	x2, .LANCHOR101
 	mov	x3, x2
-	ldrh	w1, [x2, #:lo12:.LANCHOR99]
+	ldrh	w1, [x2, #:lo12:.LANCHOR101]
 	cmp	w1, 4
-	bhi	.L516
-	cbnz	w0, .L516
+	bhi	.L529
+	cbnz	w0, .L529
 	add	w1, w1, 1
-	strh	w1, [x2, #:lo12:.LANCHOR99]
+	strh	w1, [x2, #:lo12:.LANCHOR101]
 	ret
-.L516:
+.L529:
 	adrp	x1, .LANCHOR40
-	adrp	x0, .LANCHOR100
-	strh	wzr, [x3, #:lo12:.LANCHOR99]
+	adrp	x0, .LANCHOR102
+	strh	wzr, [x3, #:lo12:.LANCHOR101]
 	mov	w2, 0
 	ldrh	w5, [x1, #:lo12:.LANCHOR40]
-	adrp	x1, .LANCHOR83
-	str	wzr, [x0, #:lo12:.LANCHOR100]
+	adrp	x1, .LANCHOR85
+	str	wzr, [x0, #:lo12:.LANCHOR102]
 	mov	w3, 0
-	ldr	x6, [x1, #:lo12:.LANCHOR83]
+	ldr	x6, [x1, #:lo12:.LANCHOR85]
 	mov	w7, 65535
 	mov	x1, 0
-.L517:
+.L530:
 	cmp	w5, w1, uxth
-	bhi	.L519
-	cbz	w3, .L515
-	str	w2, [x0, #:lo12:.LANCHOR100]
-.L515:
+	bhi	.L532
+	cbz	w3, .L528
+	str	w2, [x0, #:lo12:.LANCHOR102]
+.L528:
 	ret
-.L519:
+.L532:
 	ldrh	w4, [x6, x1, lsl 1]
 	cmp	w4, w7
-	beq	.L518
+	beq	.L531
 	add	w2, w2, w4
 	mov	w3, 1
-.L518:
+.L531:
 	add	x1, x1, 1
-	b	.L517
+	b	.L530
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
 	.section	.text.ftl_set_blk_mode,"ax",@progbits
 	.align	2
@@ -3650,9 +3724,9 @@ FtlUpdateVaildLpn:
 	.type	ftl_set_blk_mode, %function
 ftl_set_blk_mode:
 	and	w0, w0, 65535
-	cbz	w1, .L526
-	b	ftl_set_blk_mode.part.10
-.L526:
+	cbz	w1, .L539
+	b	ftl_set_blk_mode.part.11
+.L539:
 	adrp	x1, .LANCHOR1
 	ubfx	x2, x0, 5, 11
 	lsl	x2, x2, 2
@@ -3694,9 +3768,9 @@ ftl_sb_update_avl_pages:
 	add	x4, x0, x4
 	ldrh	w3, [x1, #:lo12:.LANCHOR38]
 	mov	w1, 65535
-.L529:
+.L542:
 	cmp	w2, w3
-	bcc	.L531
+	bcc	.L544
 	adrp	x1, .LANCHOR52
 	ubfiz	x3, x3, 1, 16
 	add	x3, x3, 16
@@ -3707,32 +3781,32 @@ ftl_sb_update_avl_pages:
 	sub	w1, w1, #1
 	and	w1, w1, 65535
 	sub	w1, w1, w6
-.L532:
+.L545:
 	cmp	x2, x3
-	bne	.L534
+	bne	.L547
 	ret
-.L531:
+.L544:
 	ldrh	w5, [x4]
 	cmp	w5, w1
-	beq	.L530
+	beq	.L543
 	ldrh	w5, [x0, 4]
 	add	w5, w5, 1
 	strh	w5, [x0, 4]
-.L530:
+.L543:
 	add	w2, w2, 1
 	add	x4, x4, 2
 	and	w2, w2, 65535
-	b	.L529
-.L534:
+	b	.L542
+.L547:
 	ldrh	w4, [x2]
 	cmp	w4, w5
-	beq	.L533
+	beq	.L546
 	ldrh	w4, [x0, 4]
 	add	w4, w1, w4
 	strh	w4, [x0, 4]
-.L533:
+.L546:
 	add	x2, x2, 2
-	b	.L532
+	b	.L545
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
 	.section	.text.make_superblock,"ax",@progbits
 	.align	2
@@ -3747,11 +3821,11 @@ make_superblock:
 	adrp	x0, .LANCHOR40
 	ldrh	w0, [x0, #:lo12:.LANCHOR40]
 	cmp	w1, w0
-	bcc	.L536
-	mov	w2, 2576
-	adrp	x1, .LANCHOR101
+	bcc	.L549
+	mov	w2, 2819
+	adrp	x1, .LANCHOR103
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR101
+	add	x1, x1, :lo12:.LANCHOR103
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -3759,7 +3833,7 @@ make_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L536:
+.L549:
 	adrp	x0, .LANCHOR38
 	adrp	x7, .LANCHOR47
 	add	x6, x19, 16
@@ -3769,53 +3843,53 @@ make_superblock:
 	strh	wzr, [x19, 4]
 	mov	w10, -1
 	strb	wzr, [x19, 7]
-.L537:
+.L550:
 	cmp	w8, w5, uxth
-	bhi	.L539
+	bhi	.L552
 	adrp	x1, .LANCHOR52
 	ldrb	w0, [x19, 7]
 	strb	wzr, [x19, 9]
 	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	mul	w0, w0, w1
 	strh	w0, [x19, 4]
-	adrp	x0, .LANCHOR28
-	ldr	w0, [x0, #:lo12:.LANCHOR28]
-	cbz	w0, .L540
-	adrp	x0, .LANCHOR78
+	adrp	x0, .LANCHOR104
+	ldr	w0, [x0, #:lo12:.LANCHOR104]
+	cbz	w0, .L553
+	adrp	x0, .LANCHOR80
 	ldrh	w1, [x19]
-	ldr	x0, [x0, #:lo12:.LANCHOR78]
+	ldr	x0, [x0, #:lo12:.LANCHOR80]
 	ldrh	w0, [x0, x1, lsl 1]
 	cmp	w0, 79
-	bhi	.L540
+	bhi	.L553
 	mov	w0, 1
 	strb	w0, [x19, 9]
-.L540:
+.L553:
 	adrp	x0, .LANCHOR2
 	ldrb	w0, [x0, #:lo12:.LANCHOR2]
-	cbz	w0, .L541
+	cbz	w0, .L554
 	mov	w0, 1
 	strb	w0, [x19, 9]
-.L541:
+.L554:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L539:
+.L552:
 	ldrh	w1, [x19]
 	ldrb	w0, [x7, x5]
 	bl	V2P_block
 	mov	w4, w0
 	strh	w10, [x6]
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L538
+	cbnz	w0, .L551
 	strh	w4, [x6]
 	ldrb	w0, [x19, 7]
 	add	w0, w0, 1
 	strb	w0, [x19, 7]
-.L538:
+.L551:
 	add	x5, x5, 1
 	add	x6, x6, 2
-	b	.L537
+	b	.L550
 	.size	make_superblock, .-make_superblock
 	.section	.text.update_multiplier_value,"ax",@progbits
 	.align	2
@@ -3832,46 +3906,46 @@ update_multiplier_value:
 	add	x8, x8, :lo12:.LANCHOR47
 	ldrh	w11, [x0, #:lo12:.LANCHOR52]
 	cmp	w10, w7, uxth
-	bhi	.L561
-	cbz	w5, .L559
+	bhi	.L574
+	cbz	w5, .L572
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.L560:
-	adrp	x0, .LANCHOR81
+.L573:
+	adrp	x0, .LANCHOR83
 	mov	w1, 6
-	ldr	x0, [x0, #:lo12:.LANCHOR81]
+	ldr	x0, [x0, #:lo12:.LANCHOR83]
 	umaddl	x6, w6, w1, x0
 	mov	w0, 0
 	strh	w5, [x6, 4]
 	ret
-.L554:
+.L567:
 	mov	w5, 0
-	b	.L553
-.L559:
+	b	.L566
+.L572:
 	mov	w5, 0
-	b	.L560
-.L561:
+	b	.L573
+.L574:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
-.L552:
+.L565:
 	ldrb	w0, [x8, x7]
 	mov	w1, w6
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L551
+	cbnz	w0, .L564
 	add	w5, w5, w11
 	and	w5, w5, 65535
-.L551:
+.L564:
 	add	x7, x7, 1
 	cmp	w10, w7, uxth
-	bhi	.L552
-	cbz	w5, .L554
+	bhi	.L565
+	cbz	w5, .L567
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.L553:
-	adrp	x0, .LANCHOR81
+.L566:
+	adrp	x0, .LANCHOR83
 	mov	w1, 6
-	ldr	x0, [x0, #:lo12:.LANCHOR81]
+	ldr	x0, [x0, #:lo12:.LANCHOR83]
 	umaddl	x6, w6, w1, x0
 	mov	w0, 0
 	strh	w5, [x6, 4]
@@ -3883,22 +3957,22 @@ update_multiplier_value:
 	.global	GetFreeBlockMinEraseCount
 	.type	GetFreeBlockMinEraseCount, %function
 GetFreeBlockMinEraseCount:
-	adrp	x0, .LANCHOR87
-	ldr	x0, [x0, #:lo12:.LANCHOR87]
-	cbz	x0, .L564
-	adrp	x1, .LANCHOR81
-	ldr	x1, [x1, #:lo12:.LANCHOR81]
+	adrp	x0, .LANCHOR89
+	ldr	x0, [x0, #:lo12:.LANCHOR89]
+	cbz	x0, .L577
+	adrp	x1, .LANCHOR83
+	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	sub	x0, x0, x1
 	mov	x1, -6148914691236517206
 	asr	x0, x0, 1
 	movk	x1, 0xaaab, lsl 0
 	mul	x0, x0, x1
-	adrp	x1, .LANCHOR78
-	ldr	x1, [x1, #:lo12:.LANCHOR78]
+	adrp	x1, .LANCHOR80
+	ldr	x1, [x1, #:lo12:.LANCHOR80]
 	and	x0, x0, 65535
 	ldrh	w0, [x1, x0, lsl 1]
 	ret
-.L564:
+.L577:
 	mov	w0, 0
 	ret
 	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
@@ -3907,21 +3981,21 @@ GetFreeBlockMinEraseCount:
 	.global	GetFreeBlockMaxEraseCount
 	.type	GetFreeBlockMaxEraseCount, %function
 GetFreeBlockMaxEraseCount:
-	adrp	x1, .LANCHOR87
+	adrp	x1, .LANCHOR89
 	and	w0, w0, 65535
-	ldr	x1, [x1, #:lo12:.LANCHOR87]
-	cbz	x1, .L572
-	adrp	x2, .LANCHOR88
+	ldr	x1, [x1, #:lo12:.LANCHOR89]
+	cbz	x1, .L585
+	adrp	x2, .LANCHOR90
 	mov	w3, 7
 	mov	w5, 6
 	mov	w6, 65535
-	ldrh	w2, [x2, #:lo12:.LANCHOR88]
+	ldrh	w2, [x2, #:lo12:.LANCHOR90]
 	mul	w2, w2, w3
 	asr	w2, w2, 3
 	cmp	w0, w2
 	csel	w0, w2, w0, gt
-	adrp	x2, .LANCHOR81
-	ldr	x3, [x2, #:lo12:.LANCHOR81]
+	adrp	x2, .LANCHOR83
+	ldr	x3, [x2, #:lo12:.LANCHOR83]
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
 	sub	x1, x1, x3
@@ -3929,25 +4003,25 @@ GetFreeBlockMaxEraseCount:
 	mul	x1, x1, x2
 	mov	w2, 0
 	and	w1, w1, 65535
-.L568:
+.L581:
 	cmp	w0, w2
-	beq	.L571
+	beq	.L584
 	umull	x4, w1, w5
 	ldrh	w4, [x3, x4]
 	cmp	w4, w6
-	bne	.L569
-.L571:
-	adrp	x0, .LANCHOR78
+	bne	.L582
+.L584:
+	adrp	x0, .LANCHOR80
 	ubfiz	x1, x1, 1, 16
-	ldr	x0, [x0, #:lo12:.LANCHOR78]
+	ldr	x0, [x0, #:lo12:.LANCHOR80]
 	ldrh	w0, [x0, x1]
 	ret
-.L569:
+.L582:
 	add	w2, w2, 1
 	mov	w1, w4
 	and	w2, w2, 65535
-	b	.L568
-.L572:
+	b	.L581
+.L585:
 	mov	w0, 0
 	ret
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
@@ -3959,18 +4033,18 @@ free_data_superblock:
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L576
+	beq	.L589
 	stp	x29, x30, [sp, -16]!
-	adrp	x2, .LANCHOR83
+	adrp	x2, .LANCHOR85
 	ubfiz	x1, x0, 1, 16
 	add	x29, sp, 0
-	ldr	x2, [x2, #:lo12:.LANCHOR83]
+	ldr	x2, [x2, #:lo12:.LANCHOR85]
 	strh	wzr, [x2, x1]
 	bl	INSERT_FREE_LIST
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L576:
+.L589:
 	mov	w0, 0
 	ret
 	.size	free_data_superblock, .-free_data_superblock
@@ -3979,45 +4053,45 @@ free_data_superblock:
 	.global	FtlGcBufInit
 	.type	FtlGcBufInit, %function
 FtlGcBufInit:
-	adrp	x1, .LANCHOR103
-	adrp	x0, .LANCHOR102
-	adrp	x7, .LANCHOR104
-	adrp	x6, .LANCHOR105
-	ldr	x5, [x1, #:lo12:.LANCHOR103]
+	adrp	x1, .LANCHOR106
+	adrp	x0, .LANCHOR105
+	adrp	x7, .LANCHOR107
+	adrp	x6, .LANCHOR108
+	ldr	x5, [x1, #:lo12:.LANCHOR106]
 	adrp	x1, .LANCHOR57
-	str	wzr, [x0, #:lo12:.LANCHOR102]
+	str	wzr, [x0, #:lo12:.LANCHOR105]
 	adrp	x0, .LANCHOR38
 	ldrh	w10, [x1, #:lo12:.LANCHOR57]
 	adrp	x1, .LANCHOR58
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	mov	w8, 24
 	ldrh	w11, [x1, #:lo12:.LANCHOR58]
-	adrp	x1, .LANCHOR106
-	ldr	x14, [x7, #:lo12:.LANCHOR104]
+	adrp	x1, .LANCHOR109
+	ldr	x14, [x7, #:lo12:.LANCHOR107]
 	mov	x3, x5
-	ldr	x4, [x1, #:lo12:.LANCHOR106]
+	ldr	x4, [x1, #:lo12:.LANCHOR109]
 	mov	w2, 0
-	ldr	x15, [x6, #:lo12:.LANCHOR105]
+	ldr	x15, [x6, #:lo12:.LANCHOR108]
 	nop // between mem op and mult-accumulate
 	umaddl	x8, w0, w8, x5
 	add	x4, x4, 8
 	mov	w1, 0
 	mov	w16, 1
-.L580:
+.L593:
 	add	w13, w2, w10
 	add	w12, w1, w11
 	cmp	x3, x8
-	bne	.L581
-	adrp	x1, .LANCHOR107
-	ldr	x7, [x7, #:lo12:.LANCHOR104]
-	ldr	x6, [x6, #:lo12:.LANCHOR105]
+	bne	.L594
+	adrp	x1, .LANCHOR110
+	ldr	x7, [x7, #:lo12:.LANCHOR107]
+	ldr	x6, [x6, #:lo12:.LANCHOR108]
 	mov	w8, 24
-	ldr	w4, [x1, #:lo12:.LANCHOR107]
-.L582:
+	ldr	w4, [x1, #:lo12:.LANCHOR110]
+.L595:
 	cmp	w0, w4
-	bcc	.L583
+	bcc	.L596
 	ret
-.L581:
+.L594:
 	asr	w2, w2, 2
 	asr	w1, w1, 2
 	add	x2, x14, x2, sxtw 2
@@ -4029,8 +4103,8 @@ FtlGcBufInit:
 	add	x4, x4, 56
 	mov	w1, w12
 	mov	w2, w13
-	b	.L580
-.L583:
+	b	.L593
+.L596:
 	umull	x3, w0, w8
 	mul	w1, w10, w0
 	add	x2, x5, x3
@@ -4044,44 +4118,44 @@ FtlGcBufInit:
 	asr	w1, w1, 2
 	add	x1, x6, x1, sxtw 2
 	str	x1, [x2, 8]
-	b	.L582
+	b	.L595
 	.size	FtlGcBufInit, .-FtlGcBufInit
 	.section	.text.FtlGcBufFree,"ax",@progbits
 	.align	2
 	.global	FtlGcBufFree
 	.type	FtlGcBufFree, %function
 FtlGcBufFree:
-	adrp	x2, .LANCHOR107
+	adrp	x2, .LANCHOR110
 	mov	w3, 0
 	mov	w7, 56
 	mov	w10, 24
-	ldr	w8, [x2, #:lo12:.LANCHOR107]
-	adrp	x2, .LANCHOR103
-	ldr	x4, [x2, #:lo12:.LANCHOR103]
-.L585:
+	ldr	w8, [x2, #:lo12:.LANCHOR110]
+	adrp	x2, .LANCHOR106
+	ldr	x4, [x2, #:lo12:.LANCHOR106]
+.L598:
 	cmp	w3, w1
-	bcs	.L584
+	bcs	.L597
 	umaddl	x6, w3, w7, x0
 	mov	w2, 0
-	b	.L590
-.L586:
+	b	.L603
+.L599:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-.L590:
+.L603:
 	cmp	w2, w8
-	bcs	.L587
+	bcs	.L600
 	umull	x5, w2, w10
 	add	x11, x4, x5
 	ldr	x12, [x4, x5]
 	ldr	x5, [x6, 8]
 	cmp	x12, x5
-	bne	.L586
+	bne	.L599
 	str	wzr, [x11, 16]
-.L587:
+.L600:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L585
-.L584:
+	b	.L598
+.L597:
 	ret
 	.size	FtlGcBufFree, .-FtlGcBufFree
 	.section	.text.FtlGcBufAlloc,"ax",@progbits
@@ -4089,38 +4163,38 @@ FtlGcBufFree:
 	.global	FtlGcBufAlloc
 	.type	FtlGcBufAlloc, %function
 FtlGcBufAlloc:
-	adrp	x2, .LANCHOR107
+	adrp	x2, .LANCHOR110
 	mov	w3, 0
 	mov	w7, 24
 	mov	w8, 1
-	ldr	w5, [x2, #:lo12:.LANCHOR107]
-	adrp	x2, .LANCHOR103
+	ldr	w5, [x2, #:lo12:.LANCHOR110]
+	adrp	x2, .LANCHOR106
 	mov	w10, 56
-	ldr	x6, [x2, #:lo12:.LANCHOR103]
-.L592:
+	ldr	x6, [x2, #:lo12:.LANCHOR106]
+.L605:
 	cmp	w3, w1
-	bcs	.L591
+	bcs	.L604
 	mov	w2, 0
-	b	.L597
-.L593:
+	b	.L610
+.L606:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-.L597:
+.L610:
 	cmp	w2, w5
-	bcs	.L594
+	bcs	.L607
 	umaddl	x4, w2, w7, x6
 	ldr	w11, [x4, 16]
-	cbnz	w11, .L593
+	cbnz	w11, .L606
 	umaddl	x2, w3, w10, x0
 	ldr	x11, [x4]
 	str	w8, [x4, 16]
 	ldr	x4, [x4, 8]
 	stp	x11, x4, [x2, 8]
-.L594:
+.L607:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L592
-.L591:
+	b	.L605
+.L604:
 	ret
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
 	.section	.text.IsBlkInGcList,"ax",@progbits
@@ -4128,23 +4202,23 @@ FtlGcBufAlloc:
 	.global	IsBlkInGcList
 	.type	IsBlkInGcList, %function
 IsBlkInGcList:
-	adrp	x1, .LANCHOR108
+	adrp	x1, .LANCHOR111
 	and	w0, w0, 65535
-	ldrh	w2, [x1, #:lo12:.LANCHOR108]
-	adrp	x1, .LANCHOR109
-	ldr	x3, [x1, #:lo12:.LANCHOR109]
+	ldrh	w2, [x1, #:lo12:.LANCHOR111]
+	adrp	x1, .LANCHOR112
+	ldr	x3, [x1, #:lo12:.LANCHOR112]
 	mov	x1, 0
-.L599:
+.L612:
 	cmp	w2, w1, uxth
-	bhi	.L601
+	bhi	.L614
 	mov	w0, 0
 	ret
-.L601:
+.L614:
 	add	x1, x1, 1
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w0
-	bne	.L599
+	bne	.L612
 	mov	w0, 1
 	ret
 	.size	IsBlkInGcList, .-IsBlkInGcList
@@ -4161,40 +4235,40 @@ FtlGcUpdatePage:
 	add	x29, sp, 0
 	bl	P2V_block_in_plane
 	and	w7, w0, 65535
-	adrp	x4, .LANCHOR108
-	adrp	x2, .LANCHOR109
+	adrp	x4, .LANCHOR111
+	adrp	x2, .LANCHOR112
 	mov	x3, 0
-	ldrh	w1, [x4, #:lo12:.LANCHOR108]
-	ldr	x5, [x2, #:lo12:.LANCHOR109]
-.L604:
+	ldrh	w1, [x4, #:lo12:.LANCHOR111]
+	ldr	x5, [x2, #:lo12:.LANCHOR112]
+.L617:
 	and	w2, w3, 65535
 	cmp	w2, w1
-	bcc	.L606
-	bne	.L605
+	bcc	.L619
+	bne	.L618
 	and	x3, x3, 65535
 	strh	w0, [x5, x3, lsl 1]
-	ldrh	w0, [x4, #:lo12:.LANCHOR108]
+	ldrh	w0, [x4, #:lo12:.LANCHOR111]
 	add	w0, w0, 1
-	strh	w0, [x4, #:lo12:.LANCHOR108]
-	b	.L605
-.L606:
+	strh	w0, [x4, #:lo12:.LANCHOR111]
+	b	.L618
+.L619:
 	add	x3, x3, 1
 	add	x2, x5, x3, lsl 1
 	ldrh	w2, [x2, -2]
 	cmp	w2, w7
-	bne	.L604
-.L605:
-	adrp	x4, .LANCHOR110
-	adrp	x1, .LANCHOR111
+	bne	.L617
+.L618:
+	adrp	x4, .LANCHOR113
+	adrp	x1, .LANCHOR114
 	mov	w3, 12
-	ldrh	w0, [x4, #:lo12:.LANCHOR110]
-	ldr	x5, [x1, #:lo12:.LANCHOR111]
+	ldrh	w0, [x4, #:lo12:.LANCHOR113]
+	ldr	x5, [x1, #:lo12:.LANCHOR114]
 	umull	x3, w0, w3
 	add	w0, w0, 1
 	add	x7, x5, x3
 	stp	w10, w8, [x7, 4]
 	str	w6, [x5, x3]
-	strh	w0, [x4, #:lo12:.LANCHOR110]
+	strh	w0, [x4, #:lo12:.LANCHOR113]
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
@@ -4203,91 +4277,91 @@ FtlGcUpdatePage:
 	.global	FtlGcRefreshOpenBlock
 	.type	FtlGcRefreshOpenBlock, %function
 FtlGcRefreshOpenBlock:
-	adrp	x8, .LANCHOR112
+	adrp	x8, .LANCHOR115
 	and	w0, w0, 65535
-	ldrh	w10, [x8, #:lo12:.LANCHOR112]
+	ldrh	w10, [x8, #:lo12:.LANCHOR115]
 	cmp	w10, w0
-	beq	.L609
-	adrp	x6, .LANCHOR113
-	ldrh	w7, [x6, #:lo12:.LANCHOR113]
+	beq	.L622
+	adrp	x6, .LANCHOR116
+	ldrh	w7, [x6, #:lo12:.LANCHOR116]
 	cmp	w0, w7
-	beq	.L609
-	adrp	x4, .LANCHOR114
-	ldrh	w5, [x4, #:lo12:.LANCHOR114]
+	beq	.L622
+	adrp	x4, .LANCHOR117
+	ldrh	w5, [x4, #:lo12:.LANCHOR117]
 	cmp	w0, w5
-	beq	.L609
-	adrp	x2, .LANCHOR115
-	ldrh	w3, [x2, #:lo12:.LANCHOR115]
+	beq	.L622
+	adrp	x2, .LANCHOR118
+	ldrh	w3, [x2, #:lo12:.LANCHOR118]
 	cmp	w0, w3
-	beq	.L609
+	beq	.L622
 	mov	w1, 65535
 	cmp	w10, w1
-	bne	.L610
-	strh	w0, [x8, #:lo12:.LANCHOR112]
-.L609:
+	bne	.L623
+	strh	w0, [x8, #:lo12:.LANCHOR115]
+.L622:
 	mov	w0, 0
 	ret
-.L610:
+.L623:
 	cmp	w7, w1
-	bne	.L611
-	strh	w0, [x6, #:lo12:.LANCHOR113]
-	b	.L609
-.L611:
+	bne	.L624
+	strh	w0, [x6, #:lo12:.LANCHOR116]
+	b	.L622
+.L624:
 	cmp	w5, w1
-	bne	.L612
-	strh	w0, [x4, #:lo12:.LANCHOR114]
-	b	.L609
-.L612:
+	bne	.L625
+	strh	w0, [x4, #:lo12:.LANCHOR117]
+	b	.L622
+.L625:
 	cmp	w3, w1
-	bne	.L609
-	strh	w0, [x2, #:lo12:.LANCHOR115]
-	b	.L609
+	bne	.L622
+	strh	w0, [x2, #:lo12:.LANCHOR118]
+	b	.L622
 	.size	FtlGcRefreshOpenBlock, .-FtlGcRefreshOpenBlock
 	.section	.text.FtlGcRefreshBlock,"ax",@progbits
 	.align	2
 	.global	FtlGcRefreshBlock
 	.type	FtlGcRefreshBlock, %function
 FtlGcRefreshBlock:
-	adrp	x8, .LANCHOR112
+	adrp	x8, .LANCHOR115
 	and	w0, w0, 65535
-	ldrh	w10, [x8, #:lo12:.LANCHOR112]
+	ldrh	w10, [x8, #:lo12:.LANCHOR115]
 	cmp	w10, w0
-	beq	.L621
-	adrp	x6, .LANCHOR113
-	ldrh	w7, [x6, #:lo12:.LANCHOR113]
+	beq	.L634
+	adrp	x6, .LANCHOR116
+	ldrh	w7, [x6, #:lo12:.LANCHOR116]
 	cmp	w0, w7
-	beq	.L621
-	adrp	x4, .LANCHOR114
-	ldrh	w5, [x4, #:lo12:.LANCHOR114]
+	beq	.L634
+	adrp	x4, .LANCHOR117
+	ldrh	w5, [x4, #:lo12:.LANCHOR117]
 	cmp	w0, w5
-	beq	.L621
-	adrp	x2, .LANCHOR115
-	ldrh	w3, [x2, #:lo12:.LANCHOR115]
+	beq	.L634
+	adrp	x2, .LANCHOR118
+	ldrh	w3, [x2, #:lo12:.LANCHOR118]
 	cmp	w0, w3
-	beq	.L621
+	beq	.L634
 	mov	w1, 65535
 	cmp	w10, w1
-	bne	.L615
-	strh	w0, [x8, #:lo12:.LANCHOR112]
-.L621:
+	bne	.L628
+	strh	w0, [x8, #:lo12:.LANCHOR115]
+.L634:
 	mov	w0, 0
 	ret
-.L615:
+.L628:
 	cmp	w7, w1
-	bne	.L616
-	strh	w0, [x6, #:lo12:.LANCHOR113]
-	b	.L621
-.L616:
+	bne	.L629
+	strh	w0, [x6, #:lo12:.LANCHOR116]
+	b	.L634
+.L629:
 	cmp	w5, w1
-	bne	.L617
-	strh	w0, [x4, #:lo12:.LANCHOR114]
-	b	.L621
-.L617:
+	bne	.L630
+	strh	w0, [x4, #:lo12:.LANCHOR117]
+	b	.L634
+.L630:
 	cmp	w3, w1
-	bne	.L622
-	strh	w0, [x2, #:lo12:.LANCHOR115]
-	b	.L621
-.L622:
+	bne	.L635
+	strh	w0, [x2, #:lo12:.LANCHOR118]
+	b	.L634
+.L635:
 	mov	w0, -1
 	ret
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
@@ -4303,41 +4377,41 @@ FtlGcMarkBadPhyBlk:
 	bl	P2V_block_in_plane
 	and	w11, w0, 65535
 	bl	FtlGcRefreshBlock
-	adrp	x0, .LANCHOR28
-	ldr	w0, [x0, #:lo12:.LANCHOR28]
-	cbz	w0, .L624
-	adrp	x1, .LANCHOR78
+	adrp	x0, .LANCHOR104
+	ldr	w0, [x0, #:lo12:.LANCHOR104]
+	cbz	w0, .L637
+	adrp	x1, .LANCHOR80
 	ubfiz	x0, x11, 1, 16
-	ldr	x2, [x1, #:lo12:.LANCHOR78]
+	ldr	x2, [x1, #:lo12:.LANCHOR80]
 	ldrh	w1, [x2, x0]
 	cmp	w1, 39
-	bls	.L624
+	bls	.L637
 	sub	w1, w1, #40
 	strh	w1, [x2, x0]
-.L624:
-	adrp	x1, .LANCHOR116
-	adrp	x3, .LANCHOR117
-	add	x3, x3, :lo12:.LANCHOR117
+.L637:
+	adrp	x1, .LANCHOR119
+	adrp	x3, .LANCHOR120
+	add	x3, x3, :lo12:.LANCHOR120
 	mov	x2, 0
-	ldrh	w0, [x1, #:lo12:.LANCHOR116]
-.L625:
+	ldrh	w0, [x1, #:lo12:.LANCHOR119]
+.L638:
 	cmp	w0, w2, uxth
-	bhi	.L627
+	bhi	.L640
 	cmp	w0, 15
-	bhi	.L626
+	bhi	.L639
 	add	w2, w0, 1
-	strh	w2, [x1, #:lo12:.LANCHOR116]
-	adrp	x1, .LANCHOR117
-	add	x1, x1, :lo12:.LANCHOR117
+	strh	w2, [x1, #:lo12:.LANCHOR119]
+	adrp	x1, .LANCHOR120
+	add	x1, x1, :lo12:.LANCHOR120
 	strh	w12, [x1, w0, sxtw 1]
-	b	.L626
-.L627:
+	b	.L639
+.L640:
 	add	x2, x2, 1
 	add	x4, x3, x2, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w12
-	bne	.L625
-.L626:
+	bne	.L638
+.L639:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
@@ -4347,35 +4421,35 @@ FtlGcMarkBadPhyBlk:
 	.global	FtlGcReFreshBadBlk
 	.type	FtlGcReFreshBadBlk, %function
 FtlGcReFreshBadBlk:
-	adrp	x0, .LANCHOR116
-	ldrh	w0, [x0, #:lo12:.LANCHOR116]
-	cbz	w0, .L639
-	adrp	x1, .LANCHOR112
-	ldrh	w2, [x1, #:lo12:.LANCHOR112]
+	adrp	x0, .LANCHOR119
+	ldrh	w0, [x0, #:lo12:.LANCHOR119]
+	cbz	w0, .L652
+	adrp	x1, .LANCHOR115
+	ldrh	w2, [x1, #:lo12:.LANCHOR115]
 	mov	w1, 65535
 	cmp	w2, w1
-	bne	.L639
+	bne	.L652
 	stp	x29, x30, [sp, -16]!
-	adrp	x11, .LANCHOR118
+	adrp	x11, .LANCHOR121
 	add	x29, sp, 0
-	ldrh	w1, [x11, #:lo12:.LANCHOR118]
+	ldrh	w1, [x11, #:lo12:.LANCHOR121]
 	cmp	w1, w0
-	bcc	.L634
-	strh	wzr, [x11, #:lo12:.LANCHOR118]
-.L634:
-	ldrh	w1, [x11, #:lo12:.LANCHOR118]
-	adrp	x0, .LANCHOR117
-	add	x0, x0, :lo12:.LANCHOR117
+	bcc	.L647
+	strh	wzr, [x11, #:lo12:.LANCHOR121]
+.L647:
+	ldrh	w1, [x11, #:lo12:.LANCHOR121]
+	adrp	x0, .LANCHOR120
+	add	x0, x0, :lo12:.LANCHOR120
 	ldrh	w0, [x0, x1, lsl 1]
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-	ldrh	w0, [x11, #:lo12:.LANCHOR118]
+	ldrh	w0, [x11, #:lo12:.LANCHOR121]
 	ldp	x29, x30, [sp], 16
 	add	w0, w0, 1
-	strh	w0, [x11, #:lo12:.LANCHOR118]
+	strh	w0, [x11, #:lo12:.LANCHOR121]
 	mov	w0, 0
 	ret
-.L639:
+.L652:
 	mov	w0, 0
 	ret
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
@@ -4384,15 +4458,15 @@ FtlGcReFreshBadBlk:
 	.global	flash_boot_enter_slc_mode
 	.type	flash_boot_enter_slc_mode, %function
 flash_boot_enter_slc_mode:
-	adrp	x1, .LANCHOR119
+	adrp	x1, .LANCHOR122
 	and	w0, w0, 255
-	ldr	w2, [x1, #:lo12:.LANCHOR119]
+	ldr	w2, [x1, #:lo12:.LANCHOR122]
 	mov	w1, 12336
 	movk	w1, 0x5638, lsl 16
 	cmp	w2, w1
-	bne	.L642
+	bne	.L655
 	b	flash_enter_slc_mode
-.L642:
+.L655:
 	ret
 	.size	flash_boot_enter_slc_mode, .-flash_boot_enter_slc_mode
 	.section	.text.flash_boot_exit_slc_mode,"ax",@progbits
@@ -4400,27 +4474,27 @@ flash_boot_enter_slc_mode:
 	.global	flash_boot_exit_slc_mode
 	.type	flash_boot_exit_slc_mode, %function
 flash_boot_exit_slc_mode:
-	adrp	x1, .LANCHOR119
+	adrp	x1, .LANCHOR122
 	and	w0, w0, 255
-	ldr	w2, [x1, #:lo12:.LANCHOR119]
+	ldr	w2, [x1, #:lo12:.LANCHOR122]
 	mov	w1, 12336
 	movk	w1, 0x5638, lsl 16
 	cmp	w2, w1
-	bne	.L644
+	bne	.L657
 	b	flash_exit_slc_mode
-.L644:
+.L657:
 	ret
 	.size	flash_boot_exit_slc_mode, .-flash_boot_exit_slc_mode
-	.section	.text.FW_FlashBlockErase.constprop.41,"ax",@progbits
+	.section	.text.FW_FlashBlockErase.constprop.42,"ax",@progbits
 	.align	2
-	.type	FW_FlashBlockErase.constprop.41, %function
-FW_FlashBlockErase.constprop.41:
+	.type	FW_FlashBlockErase.constprop.42, %function
+FW_FlashBlockErase.constprop.42:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w20, w0
-	adrp	x0, .LANCHOR18
-	ldr	x0, [x0, #:lo12:.LANCHOR18]
+	adrp	x0, .LANCHOR7
+	ldr	x0, [x0, #:lo12:.LANCHOR7]
 	ldrb	w19, [x0, 9]
 	mov	w0, 0
 	bl	flash_boot_enter_slc_mode
@@ -4435,7 +4509,7 @@ FW_FlashBlockErase.constprop.41:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-	.size	FW_FlashBlockErase.constprop.41, .-FW_FlashBlockErase.constprop.41
+	.size	FW_FlashBlockErase.constprop.42, .-FW_FlashBlockErase.constprop.42
 	.section	.text.ftl_memset,"ax",@progbits
 	.align	2
 	.global	ftl_memset
@@ -4452,62 +4526,62 @@ BuildFlashLsbPageTable:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	mov	w20, w1
-	cbnz	w0, .L650
-	adrp	x1, .LANCHOR16
-	add	x1, x1, :lo12:.LANCHOR16
+	mov	w19, w1
+	cbnz	w0, .L663
+	adrp	x1, .LANCHOR17
+	add	x1, x1, :lo12:.LANCHOR17
 	mov	x0, 0
-.L651:
+.L664:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
-	cmp	x0, 256
-	bne	.L651
-.L657:
-	adrp	x19, .LANCHOR120
-	add	x19, x19, :lo12:.LANCHOR120
+	cmp	x0, 512
+	bne	.L664
+.L670:
+	adrp	x20, .LANCHOR123
+	add	x20, x20, :lo12:.LANCHOR123
 	mov	w1, 255
-	mov	w2, 1024
-	mov	x0, x19
+	mov	w2, 2048
+	mov	x0, x20
 	bl	ftl_memset
-	adrp	x1, .LANCHOR16
-	and	w20, w20, 65535
-	add	x1, x1, :lo12:.LANCHOR16
+	adrp	x1, .LANCHOR17
+	and	w19, w19, 65535
+	add	x1, x1, :lo12:.LANCHOR17
 	mov	x0, 0
-.L652:
-	cmp	w20, w0, uxth
-	bhi	.L676
+.L665:
+	cmp	w19, w0, uxth
+	bhi	.L698
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L650:
+.L663:
 	cmp	w0, 1
-	bne	.L653
-	adrp	x2, .LANCHOR16
-	add	x2, x2, :lo12:.LANCHOR16
+	bne	.L666
+	adrp	x2, .LANCHOR17
+	add	x2, x2, :lo12:.LANCHOR17
 	mov	x1, 0
-.L656:
+.L669:
 	and	w0, w1, 65535
 	cmp	x1, 3
-	bls	.L654
+	bls	.L667
 	ubfiz	w3, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 2
 	sub	w0, w3, w0
 	and	w0, w0, 65535
-.L654:
+.L667:
 	strh	w0, [x2, x1, lsl 1]
 	add	x1, x1, 1
-	cmp	x1, 256
-	bne	.L656
-	b	.L657
-.L653:
+	cmp	x1, 512
+	bne	.L669
+	b	.L670
+.L666:
 	cmp	w0, 2
-	bne	.L658
-	adrp	x2, .LANCHOR16
-	add	x2, x2, :lo12:.LANCHOR16
+	bne	.L671
+	adrp	x2, .LANCHOR17
+	add	x2, x2, :lo12:.LANCHOR17
 	mov	w1, 65535
 	mov	x0, 0
-.L660:
+.L673:
 	cmp	x0, 2
 	and	w3, w0, 65535
 	csel	w3, w3, w1, cc
@@ -4515,37 +4589,37 @@ BuildFlashLsbPageTable:
 	add	w1, w1, 2
 	add	x0, x0, 1
 	and	w1, w1, 65535
-	cmp	x0, 256
-	bne	.L660
-	b	.L657
-.L658:
+	cmp	x0, 512
+	bne	.L673
+	b	.L670
+.L671:
 	cmp	w0, 3
-	bne	.L661
-	adrp	x2, .LANCHOR16
-	add	x2, x2, :lo12:.LANCHOR16
+	bne	.L674
+	adrp	x2, .LANCHOR17
+	add	x2, x2, :lo12:.LANCHOR17
 	mov	x1, 0
-.L664:
+.L677:
 	and	w0, w1, 65535
 	cmp	x1, 5
-	bls	.L662
+	bls	.L675
 	ubfiz	w3, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 4
 	sub	w0, w3, w0
 	and	w0, w0, 65535
-.L662:
+.L675:
 	strh	w0, [x2, x1, lsl 1]
 	add	x1, x1, 1
-	cmp	x1, 256
-	bne	.L664
-	b	.L657
-.L661:
+	cmp	x1, 512
+	bne	.L677
+	b	.L670
+.L674:
 	cmp	w0, 4
-	bne	.L665
-	adrp	x2, .LANCHOR16
-	add	x1, x2, :lo12:.LANCHOR16
+	bne	.L678
+	adrp	x2, .LANCHOR17
+	add	x1, x2, :lo12:.LANCHOR17
 	add	x1, x1, 16
-	strh	wzr, [x2, #:lo12:.LANCHOR16]
+	strh	wzr, [x2, #:lo12:.LANCHOR17]
 	mov	w2, 1
 	strh	w0, [x1, -8]
 	mov	w0, 5
@@ -4560,7 +4634,7 @@ BuildFlashLsbPageTable:
 	strh	w2, [x1, -10]
 	strh	w0, [x1, -2]
 	mov	w0, 8
-.L667:
+.L680:
 	and	w3, w0, 1
 	ubfiz	w2, w0, 1, 15
 	add	w3, w3, 6
@@ -4568,77 +4642,142 @@ BuildFlashLsbPageTable:
 	sub	w2, w2, w3
 	strh	w2, [x1], 2
 	and	w0, w0, 65535
-	cmp	w0, 256
-	bne	.L667
-	b	.L657
-.L665:
+	cmp	w0, 512
+	bne	.L680
+	b	.L670
+.L678:
 	cmp	w0, 5
-	bne	.L668
-	adrp	x1, .LANCHOR16
-	add	x1, x1, :lo12:.LANCHOR16
+	bne	.L681
+	adrp	x1, .LANCHOR17
+	add	x1, x1, :lo12:.LANCHOR17
 	mov	x0, 0
-.L669:
+.L682:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 16
-	bne	.L669
+	bne	.L682
 	add	x1, x1, 32
-.L670:
+.L683:
 	strh	w0, [x1], 2
 	add	w0, w0, 2
 	and	w0, w0, 65535
-	cmp	w0, 496
-	bne	.L670
-	b	.L657
-.L668:
+	cmp	w0, 1008
+	bne	.L683
+	b	.L670
+.L681:
 	cmp	w0, 6
-	bne	.L671
-	adrp	x3, .LANCHOR16
-	add	x3, x3, :lo12:.LANCHOR16
+	bne	.L684
+	adrp	x3, .LANCHOR17
+	add	x3, x3, :lo12:.LANCHOR17
 	mov	w1, 0
 	mov	x2, 0
 	mov	w4, 12
 	mov	w5, 10
-.L674:
+.L687:
 	and	w0, w2, 65535
 	cmp	x2, 5
-	bls	.L672
+	bls	.L685
 	tst	x0, 1
 	csel	w0, w4, w5, ne
 	sub	w0, w1, w0
 	and	w0, w0, 65535
-.L672:
+.L685:
 	strh	w0, [x3, x2, lsl 1]
 	add	w1, w1, 3
 	and	w1, w1, 65535
 	add	x2, x2, 1
-	cmp	w1, 768
-	bne	.L674
-	b	.L657
-.L671:
+	cmp	w1, 1536
+	bne	.L687
+	b	.L670
+.L684:
 	cmp	w0, 9
-	bne	.L657
-	adrp	x1, .LANCHOR16
-	add	x0, x1, :lo12:.LANCHOR16
-	strh	wzr, [x1, #:lo12:.LANCHOR16]
+	bne	.L688
+	adrp	x1, .LANCHOR17
+	add	x0, x1, :lo12:.LANCHOR17
+	strh	wzr, [x1, #:lo12:.LANCHOR17]
 	mov	w1, 1
 	strh	w1, [x0, 2]
 	mov	w1, 2
 	strh	w1, [x0, 4]
 	add	x1, x0, 6
 	mov	w0, 3
-.L675:
+.L689:
+	strh	w0, [x1], 2
+	add	w0, w0, 2
+	and	w0, w0, 65535
+	cmp	w0, 1021
+	bne	.L689
+	b	.L670
+.L688:
+	cmp	w0, 10
+	bne	.L690
+	adrp	x1, .LANCHOR17
+	add	x1, x1, :lo12:.LANCHOR17
+	mov	x0, 0
+.L691:
+	strh	w0, [x1, x0, lsl 1]
+	add	x0, x0, 1
+	cmp	x0, 63
+	bne	.L691
+	add	x1, x1, 126
+.L692:
 	strh	w0, [x1], 2
 	add	w0, w0, 2
 	and	w0, w0, 65535
-	cmp	w0, 509
-	bne	.L675
-	b	.L657
-.L676:
+	cmp	w0, 961
+	bne	.L692
+	b	.L670
+.L690:
+	cmp	w0, 11
+	bne	.L693
+	adrp	x1, .LANCHOR17
+	add	x1, x1, :lo12:.LANCHOR17
+	mov	x0, 0
+.L694:
+	strh	w0, [x1, x0, lsl 1]
+	add	x0, x0, 1
+	cmp	x0, 8
+	bne	.L694
+	add	x1, x1, 16
+.L696:
+	and	w3, w0, 1
+	ubfiz	w2, w0, 1, 15
+	add	w3, w3, 6
+	add	w0, w0, 1
+	sub	w2, w2, w3
+	strh	w2, [x1], 2
+	and	w0, w0, 65535
+	cmp	w0, 512
+	bne	.L696
+	b	.L670
+.L693:
+	cmp	w0, 12
+	bne	.L670
+	adrp	x1, .LANCHOR17
+	add	x0, x1, :lo12:.LANCHOR17
+	strh	wzr, [x1, #:lo12:.LANCHOR17]
+	mov	w1, 1
+	strh	w1, [x0, 2]
+	mov	w1, 2
+	strh	w1, [x0, 4]
+	mov	w1, 3
+	strh	w1, [x0, 6]
+	add	x1, x0, 8
+	mov	w0, 4
+.L697:
+	sub	w2, w0, #1
+	add	w2, w2, w0, lsr 1
+	add	w0, w0, 1
+	strh	w2, [x1], 2
+	and	w0, w0, 65535
+	cmp	w0, 512
+	bne	.L697
+	b	.L670
+.L698:
 	ldrh	w2, [x1, x0, lsl 1]
 	add	x0, x0, 1
-	strh	w2, [x19, w2, sxtw 1]
-	b	.L652
+	strh	w2, [x20, w2, sxtw 1]
+	b	.L665
 	.size	BuildFlashLsbPageTable, .-BuildFlashLsbPageTable
 	.section	.text.FlashDieInfoInit,"ax",@progbits
 	.align	2
@@ -4650,22 +4789,22 @@ FlashDieInfoInit:
 	add	x29, sp, 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR31+10]
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR121
+	adrp	x19, .LANCHOR124
 	str	x25, [sp, 64]
-	adrp	x25, .LANCHOR25
+	adrp	x25, .LANCHOR26
 	stp	x21, x22, [sp, 32]
 	mov	x22, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR26
-	strb	wzr, [x19, #:lo12:.LANCHOR121]
-	add	x21, x24, :lo12:.LANCHOR26
-	strb	wzr, [x25, #:lo12:.LANCHOR25]
+	adrp	x24, .LANCHOR27
+	strb	wzr, [x19, #:lo12:.LANCHOR124]
+	add	x21, x24, :lo12:.LANCHOR27
+	strb	wzr, [x25, #:lo12:.LANCHOR26]
 	bl	FlashBlockAlignInit
 	mov	w2, 8
 	mov	w1, 0
-	adrp	x23, .LANCHOR17
+	adrp	x23, .LANCHOR18
 	mov	x0, x21
-	add	x20, x23, :lo12:.LANCHOR17
+	add	x20, x23, :lo12:.LANCHOR18
 	bl	ftl_memset
 	mov	w2, 32
 	mov	w1, 0
@@ -4676,35 +4815,35 @@ FlashDieInfoInit:
 	adrp	x0, .LANCHOR23
 	add	x0, x0, :lo12:.LANCHOR23
 	bl	ftl_memset
-	adrp	x0, .LANCHOR18
+	adrp	x0, .LANCHOR7
 	adrp	x13, .LANCHOR22
-	add	x15, x25, :lo12:.LANCHOR25
+	add	x15, x25, :lo12:.LANCHOR26
 	add	x10, x13, :lo12:.LANCHOR22
-	ldr	x7, [x0, #:lo12:.LANCHOR18]
+	ldr	x7, [x0, #:lo12:.LANCHOR7]
 	add	x11, x7, 1
 	ldrb	w12, [x7]
-.L694:
+.L722:
 	mov	w2, w12
 	add	x1, x10, x22, lsl 3
 	mov	x0, x11
 	bl	FlashMemCmp8
-	cbnz	w0, .L693
+	cbnz	w0, .L721
 	ldrb	w1, [x15]
 	add	w0, w1, 1
 	strb	w0, [x15]
 	str	wzr, [x20, x1, lsl 2]
 	strb	w22, [x21, x1]
-.L693:
+.L721:
 	add	x22, x22, 1
 	cmp	x22, 4
-	bne	.L694
-	ldrb	w0, [x25, #:lo12:.LANCHOR25]
-	strb	w0, [x19, #:lo12:.LANCHOR121]
+	bne	.L722
+	ldrb	w0, [x25, #:lo12:.LANCHOR26]
+	strb	w0, [x19, #:lo12:.LANCHOR124]
 	ldrb	w0, [x7, 8]
 	cmp	w0, 2
-	beq	.L695
-.L699:
-	ldrb	w0, [x25, #:lo12:.LANCHOR25]
+	beq	.L723
+.L727:
+	ldrb	w0, [x25, #:lo12:.LANCHOR26]
 	ldrh	w1, [x7, 14]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -4713,24 +4852,24 @@ FlashDieInfoInit:
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	mul	w0, w0, w1
-	adrp	x1, .LANCHOR122
+	adrp	x1, .LANCHOR125
 	ldp	x29, x30, [sp], 80
-	strh	w0, [x1, #:lo12:.LANCHOR122]
+	strh	w0, [x1, #:lo12:.LANCHOR125]
 	ret
-.L695:
+.L723:
 	adrp	x0, .LANCHOR4
 	add	x13, x13, :lo12:.LANCHOR22
-	add	x15, x25, :lo12:.LANCHOR25
-	add	x23, x23, :lo12:.LANCHOR17
+	add	x15, x25, :lo12:.LANCHOR26
+	add	x23, x23, :lo12:.LANCHOR18
 	ldr	w20, [x0, #:lo12:.LANCHOR4]
-	add	x14, x24, :lo12:.LANCHOR26
+	add	x14, x24, :lo12:.LANCHOR27
 	mov	x19, 0
-.L698:
+.L726:
 	mov	w2, w12
 	add	x1, x13, x19, lsl 3
 	mov	x0, x11
 	bl	FlashMemCmp8
-	cbnz	w0, .L696
+	cbnz	w0, .L724
 	ldrb	w2, [x7, 13]
 	ldrh	w0, [x7, 14]
 	ldrb	w1, [x15]
@@ -4740,24 +4879,24 @@ FlashDieInfoInit:
 	sxtw	x2, w1
 	str	w0, [x23, x2, lsl 2]
 	ldrb	w3, [x7, 23]
-	cbz	w3, .L697
+	cbz	w3, .L725
 	lsl	w0, w0, 1
 	str	w0, [x23, x2, lsl 2]
-.L697:
+.L725:
 	add	w1, w1, 1
 	strb	w19, [x14, x2]
 	strb	w1, [x15]
-.L696:
+.L724:
 	add	x19, x19, 1
 	cmp	x19, 4
-	bne	.L698
-	b	.L699
+	bne	.L726
+	b	.L727
 	.size	FlashDieInfoInit, .-FlashDieInfoInit
-	.section	.text.ReadFlashInfo,"ax",@progbits
+	.section	.text.ftl_read_flash_info,"ax",@progbits
 	.align	2
-	.global	ReadFlashInfo
-	.type	ReadFlashInfo, %function
-ReadFlashInfo:
+	.global	ftl_read_flash_info
+	.type	ftl_read_flash_info, %function
+ftl_read_flash_info:
 	stp	x29, x30, [sp, -32]!
 	mov	w2, 11
 	mov	w1, 0
@@ -4765,55 +4904,59 @@ ReadFlashInfo:
 	str	x19, [sp, 16]
 	mov	x19, x0
 	bl	ftl_memset
-	adrp	x0, .LANCHOR18
-	adrp	x3, .LANCHOR68
+	adrp	x0, .LANCHOR7
 	mov	w4, 1
-	ldr	x1, [x0, #:lo12:.LANCHOR18]
+	ldr	x2, [x0, #:lo12:.LANCHOR7]
 	adrp	x0, .LANCHOR4
 	ldr	w0, [x0, #:lo12:.LANCHOR4]
-	ldrb	w2, [x1, 9]
-	mul	w0, w0, w2
-	strb	w0, [x19, 4]
-	ubfx	x0, x0, 8, 8
+	ldrb	w3, [x2, 9]
+	mul	w0, w0, w3
+	and	w1, w0, 65535
+	strb	w1, [x19, 4]
+	ubfx	x0, x1, 8, 8
 	strb	w0, [x19, 5]
 	adrp	x0, .LANCHOR33
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	strb	w0, [x19, 7]
-	add	x0, x3, :lo12:.LANCHOR68
-	ldrb	w3, [x3, #:lo12:.LANCHOR68]
-	strb	w3, [x19]
-	ldrb	w3, [x0, 1]
-	strb	w3, [x19, 1]
-	ldrb	w3, [x0, 2]
-	ldrb	w0, [x0, 3]
-	strb	w3, [x19, 2]
+	ldrb	w0, [x2, 13]
+	mul	w0, w0, w1
+	ldrh	w1, [x2, 14]
+	mul	w0, w0, w1
+	ldrb	w1, [x2, 8]
+	strb	w3, [x19, 6]
+	mul	w0, w0, w1
+	strb	w0, [x19]
+	ubfx	x1, x0, 8, 8
+	strb	w1, [x19, 1]
+	ubfx	x1, x0, 16, 8
+	lsr	w0, w0, 24
+	strb	w1, [x19, 2]
+	mov	x1, 0
 	strb	w0, [x19, 3]
 	mov	w0, 32
-	strb	w2, [x19, 6]
-	adrp	x2, .LANCHOR26
 	strb	w0, [x19, 8]
-	add	x2, x2, :lo12:.LANCHOR26
-	ldrb	w0, [x1, 7]
-	mov	x1, 0
+	ldrb	w0, [x2, 7]
+	adrp	x2, .LANCHOR27
 	strb	w0, [x19, 9]
-	adrp	x0, .LANCHOR25
+	add	x2, x2, :lo12:.LANCHOR27
+	adrp	x0, .LANCHOR26
 	strb	wzr, [x19, 10]
-	ldrb	w3, [x0, #:lo12:.LANCHOR25]
-.L708:
+	ldrb	w3, [x0, #:lo12:.LANCHOR26]
+.L736:
 	cmp	w3, w1, uxtb
-	bhi	.L709
+	bhi	.L737
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L709:
+.L737:
 	ldrb	w0, [x1, x2]
 	add	x1, x1, 1
 	ldrb	w5, [x19, 10]
 	lsl	w0, w4, w0
 	orr	w0, w0, w5
 	strb	w0, [x19, 10]
-	b	.L708
-	.size	ReadFlashInfo, .-ReadFlashInfo
+	b	.L736
+	.size	ftl_read_flash_info, .-ftl_read_flash_info
 	.section	.text.FtlBbt2Bitmap,"ax",@progbits
 	.align	2
 	.global	FtlBbt2Bitmap
@@ -4821,31 +4964,31 @@ ReadFlashInfo:
 FtlBbt2Bitmap:
 	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x20, x0
+	adrp	x0, .LANCHOR126
 	stp	x21, x22, [sp, 32]
-	mov	x21, x0
-	adrp	x0, .LANCHOR123
 	stp	x23, x24, [sp, 48]
 	adrp	x22, .LANCHOR51
-	adrp	x23, .LANCHOR124
-	ldrh	w2, [x0, #:lo12:.LANCHOR123]
+	ldrh	w2, [x0, #:lo12:.LANCHOR126]
+	adrp	x23, .LANCHOR127
 	add	x22, x22, :lo12:.LANCHOR51
-	add	x23, x23, :lo12:.LANCHOR124
-	stp	x19, x20, [sp, 16]
-	mov	w24, 65535
+	add	x23, x23, :lo12:.LANCHOR127
 	mov	x19, 0
-	mov	x20, x1
+	mov	w24, 65535
+	mov	x21, x1
 	lsl	w2, w2, 2
 	mov	w1, 0
-	mov	x0, x20
+	mov	x0, x21
 	bl	ftl_memset
-.L714:
-	ldrh	w0, [x21, x19]
+.L742:
+	ldrh	w0, [x20, x19]
 	cmp	w0, w24
-	beq	.L711
+	beq	.L739
 	ldrh	w1, [x22]
 	cmp	w1, w0
-	bhi	.L713
-	mov	w2, 79
+	bhi	.L741
+	mov	w2, 92
 	mov	x1, x23
 	adrp	x0, .LC5
 	add	x0, x0, :lo12:.LC5
@@ -4855,8 +4998,8 @@ FtlBbt2Bitmap:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L713:
-	ldrh	w1, [x21, x19]
+.L741:
+	ldrh	w1, [x20, x19]
 	mov	w2, 1
 	add	x19, x19, 2
 	cmp	x19, 1024
@@ -4864,11 +5007,16 @@ FtlBbt2Bitmap:
 	and	w1, w1, 31
 	lsl	x0, x0, 2
 	lsl	w2, w2, w1
-	ldr	w1, [x20, x0]
+	ldr	w1, [x21, x0]
 	orr	w1, w1, w2
-	str	w1, [x20, x0]
-	bne	.L714
-.L711:
+	str	w1, [x21, x0]
+	adrp	x0, .LANCHOR76
+	add	x0, x0, :lo12:.LANCHOR76
+	ldrh	w1, [x0, 6]
+	add	w1, w1, 1
+	strh	w1, [x0, 6]
+	bne	.L742
+.L739:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -4880,11 +5028,11 @@ FtlBbt2Bitmap:
 	.global	FtlBbtMemInit
 	.type	FtlBbtMemInit, %function
 FtlBbtMemInit:
-	adrp	x1, .LANCHOR74
-	add	x0, x1, :lo12:.LANCHOR74
+	adrp	x1, .LANCHOR76
+	add	x0, x1, :lo12:.LANCHOR76
 	mov	w2, -1
 	add	x0, x0, 12
-	strh	w2, [x1, #:lo12:.LANCHOR74]
+	strh	w2, [x1, #:lo12:.LANCHOR76]
 	mov	w2, 16
 	strh	wzr, [x0, -6]
 	mov	w1, 255
@@ -4896,11 +5044,11 @@ FtlBbtMemInit:
 	.type	FtlFreeSysBlkQueueInit, %function
 FtlFreeSysBlkQueueInit:
 	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR75
-	add	x3, x1, :lo12:.LANCHOR75
+	adrp	x1, .LANCHOR77
+	add	x3, x1, :lo12:.LANCHOR77
 	mov	w2, 2048
 	add	x29, sp, 0
-	strh	w0, [x1, #:lo12:.LANCHOR75]
+	strh	w0, [x1, #:lo12:.LANCHOR77]
 	mov	w1, 0
 	strh	wzr, [x3, 2]
 	add	x0, x3, 8
@@ -4931,10 +5079,10 @@ ftl_free_no_use_map_blk:
 	str	x25, [sp, 64]
 	bl	ftl_memset
 	mov	w0, 0
-.L722:
+.L750:
 	ldrh	w1, [x19, 6]
 	cmp	w1, w0
-	bhi	.L726
+	bhi	.L754
 	adrp	x0, .LANCHOR53
 	mov	w23, 0
 	mov	w20, 0
@@ -4942,10 +5090,10 @@ ftl_free_no_use_map_blk:
 	ldrh	w0, [x19]
 	strh	w1, [x21, x0, lsl 1]
 	ldrh	w24, [x21]
-.L727:
+.L755:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L731
+	bhi	.L759
 	mov	w0, w23
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -4953,64 +5101,64 @@ ftl_free_no_use_map_blk:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L726:
+.L754:
 	ubfiz	x1, x0, 2, 16
 	ldr	w2, [x20, x1]
 	mov	w1, 0
 	ubfx	x2, x2, 10, 16
-.L723:
+.L751:
 	ldrh	w3, [x19, 10]
 	cmp	w3, w1
-	bhi	.L725
+	bhi	.L753
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L722
-.L725:
+	b	.L750
+.L753:
 	ubfiz	x3, x1, 1, 16
 	ldrh	w4, [x22, x3]
 	cmp	w4, w2
-	bne	.L724
-	cbz	w2, .L724
+	bne	.L752
+	cbz	w2, .L752
 	ldrh	w4, [x21, x3]
 	add	w4, w4, 1
 	strh	w4, [x21, x3]
-.L724:
+.L752:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L723
-.L731:
+	b	.L751
+.L759:
 	ubfiz	x0, x20, 1, 16
 	ldrh	w1, [x21, x0]
 	cmp	w24, w1
-	bls	.L728
+	bls	.L756
 	add	x25, x22, x0
 	ldrh	w0, [x22, x0]
-	cbnz	w0, .L729
-.L730:
+	cbnz	w0, .L757
+.L758:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L727
-.L728:
-	cbnz	w1, .L730
+	b	.L755
+.L756:
+	cbnz	w1, .L758
 	add	x25, x22, x0
 	ldrh	w0, [x22, x0]
-	cbz	w0, .L730
-.L732:
+	cbz	w0, .L758
+.L760:
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
 	strh	wzr, [x25]
 	ldrh	w0, [x19, 8]
 	sub	w0, w0, #1
 	strh	w0, [x19, 8]
-	b	.L730
-.L733:
+	b	.L758
+.L761:
 	mov	w24, 0
-	b	.L732
-.L729:
+	b	.L760
+.L757:
 	mov	w23, w20
-	cbz	w1, .L733
+	cbz	w1, .L761
 	mov	w24, w1
-	b	.L730
+	b	.L758
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.section	.text.FtlL2PDataInit,"ax",@progbits
 	.align	2
@@ -5021,66 +5169,66 @@ FtlL2PDataInit:
 	mov	w1, 0
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR125
+	adrp	x19, .LANCHOR128
 	adrp	x20, .LANCHOR64
 	stp	x21, x22, [sp, 32]
-	ldr	x0, [x19, #:lo12:.LANCHOR125]
+	ldr	x0, [x19, #:lo12:.LANCHOR128]
 	adrp	x22, .LANCHOR57
 	ldr	w2, [x20, #:lo12:.LANCHOR64]
 	adrp	x21, .LANCHOR67
 	str	x23, [sp, 48]
-	adrp	x23, .LANCHOR126
+	adrp	x23, .LANCHOR129
 	lsl	w2, w2, 1
 	bl	ftl_memset
 	ldrh	w0, [x21, #:lo12:.LANCHOR67]
 	mov	w1, 255
 	ldrh	w2, [x22, #:lo12:.LANCHOR57]
 	mul	w2, w2, w0
-	ldr	x0, [x23, #:lo12:.LANCHOR126]
+	ldr	x0, [x23, #:lo12:.LANCHOR129]
 	bl	ftl_memset
-	adrp	x0, .LANCHOR96
+	adrp	x0, .LANCHOR98
 	ldrh	w3, [x21, #:lo12:.LANCHOR67]
-	ldr	x6, [x23, #:lo12:.LANCHOR126]
+	ldr	x6, [x23, #:lo12:.LANCHOR129]
 	mov	x1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR96]
+	ldr	x0, [x0, #:lo12:.LANCHOR98]
 	mov	w2, -1
 	ldrh	w5, [x22, #:lo12:.LANCHOR57]
 	add	x3, x0, x3, lsl 4
-.L743:
+.L771:
 	add	x4, x1, x5
 	cmp	x0, x3
-	bne	.L744
-	adrp	x1, .LANCHOR127
-	add	x0, x1, :lo12:.LANCHOR127
+	bne	.L772
+	adrp	x1, .LANCHOR130
+	add	x0, x1, :lo12:.LANCHOR130
 	ldp	x21, x22, [sp, 32]
-	strh	w2, [x1, #:lo12:.LANCHOR127]
+	strh	w2, [x1, #:lo12:.LANCHOR130]
 	ldr	w1, [x20, #:lo12:.LANCHOR64]
 	strh	w1, [x0, 10]
 	mov	w1, -3902
 	strh	w1, [x0, 4]
-	adrp	x1, .LANCHOR128
+	adrp	x1, .LANCHOR131
 	ldr	x23, [sp, 48]
 	strh	w2, [x0, 2]
-	ldrh	w1, [x1, #:lo12:.LANCHOR128]
+	ldrh	w1, [x1, #:lo12:.LANCHOR131]
 	strh	w1, [x0, 8]
 	adrp	x1, .LANCHOR66
 	ldrh	w1, [x1, #:lo12:.LANCHOR66]
 	strh	w1, [x0, 6]
-	adrp	x1, .LANCHOR129
-	ldr	x1, [x1, #:lo12:.LANCHOR129]
+	adrp	x1, .LANCHOR132
+	ldr	x1, [x1, #:lo12:.LANCHOR132]
 	str	x1, [x0, 16]
-	adrp	x1, .LANCHOR130
-	ldr	x1, [x1, #:lo12:.LANCHOR130]
+	adrp	x1, .LANCHOR133
+	ldr	x1, [x1, #:lo12:.LANCHOR133]
 	str	x1, [x0, 24]
-	ldr	x1, [x19, #:lo12:.LANCHOR125]
+	ldr	x1, [x19, #:lo12:.LANCHOR128]
 	ldp	x19, x20, [sp, 16]
 	str	x1, [x0, 32]
-	adrp	x1, .LANCHOR131
-	ldr	x1, [x1, #:lo12:.LANCHOR131]
+	adrp	x1, .LANCHOR134
+	ldr	x1, [x1, #:lo12:.LANCHOR134]
 	str	x1, [x0, 40]
 	ldp	x29, x30, [sp], 64
 	ret
-.L744:
+.L772:
 	and	x1, x1, -4
 	strh	w2, [x0]
 	add	x1, x6, x1
@@ -5088,7 +5236,7 @@ FtlL2PDataInit:
 	str	x1, [x0, 8]
 	add	x0, x0, 16
 	mov	x1, x4
-	b	.L743
+	b	.L771
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
 	.section	.text.FtlVariablesInit,"ax",@progbits
 	.align	2
@@ -5096,24 +5244,24 @@ FtlL2PDataInit:
 	.type	FtlVariablesInit, %function
 FtlVariablesInit:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR132
+	adrp	x0, .LANCHOR135
 	mov	w1, -1
 	add	x29, sp, 0
-	str	xzr, [x0, #:lo12:.LANCHOR132]
-	adrp	x0, .LANCHOR133
+	str	xzr, [x0, #:lo12:.LANCHOR135]
+	adrp	x0, .LANCHOR136
 	str	x19, [sp, 16]
 	adrp	x19, .LANCHOR41
-	strh	w1, [x0, #:lo12:.LANCHOR133]
-	adrp	x0, .LANCHOR134
+	strh	w1, [x0, #:lo12:.LANCHOR136]
+	adrp	x0, .LANCHOR137
 	mov	w1, -1
-	str	wzr, [x0, #:lo12:.LANCHOR134]
-	adrp	x0, .LANCHOR135
-	str	wzr, [x0, #:lo12:.LANCHOR135]
-	adrp	x0, .LANCHOR136
-	str	w1, [x0, #:lo12:.LANCHOR136]
-	adrp	x0, .LANCHOR28
+	str	wzr, [x0, #:lo12:.LANCHOR137]
+	adrp	x0, .LANCHOR138
+	str	wzr, [x0, #:lo12:.LANCHOR138]
+	adrp	x0, .LANCHOR139
+	str	w1, [x0, #:lo12:.LANCHOR139]
+	adrp	x0, .LANCHOR104
 	mov	w1, 0
-	str	wzr, [x0, #:lo12:.LANCHOR28]
+	str	wzr, [x0, #:lo12:.LANCHOR104]
 	adrp	x0, .LANCHOR70
 	strh	wzr, [x0, #:lo12:.LANCHOR70]
 	adrp	x0, .LANCHOR61
@@ -5122,27 +5270,27 @@ FtlVariablesInit:
 	ldr	x0, [x0, #:lo12:.LANCHOR71]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	adrp	x0, .LANCHOR78
+	adrp	x0, .LANCHOR80
 	ldrh	w2, [x19, #:lo12:.LANCHOR41]
 	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR78]
+	ldr	x0, [x0, #:lo12:.LANCHOR80]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	adrp	x0, .LANCHOR137
+	adrp	x0, .LANCHOR140
 	ldrh	w2, [x19, #:lo12:.LANCHOR41]
 	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR137]
+	ldr	x0, [x0, #:lo12:.LANCHOR140]
 	lsl	w2, w2, 1
 	bl	ftl_memset
 	mov	w2, 48
 	mov	w1, 0
-	adrp	x0, .LANCHOR80
-	add	x0, x0, :lo12:.LANCHOR80
+	adrp	x0, .LANCHOR82
+	add	x0, x0, :lo12:.LANCHOR82
 	bl	ftl_memset
 	mov	w2, 512
 	mov	w1, 0
-	adrp	x0, .LANCHOR138
-	add	x0, x0, :lo12:.LANCHOR138
+	adrp	x0, .LANCHOR141
+	add	x0, x0, :lo12:.LANCHOR141
 	bl	ftl_memset
 	bl	FtlGcBufInit
 	bl	FtlL2PDataInit
@@ -5163,13 +5311,13 @@ SupperBlkListInit:
 	ldrh	w2, [x0, #:lo12:.LANCHOR41]
 	mov	w0, 6
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR81
+	adrp	x24, .LANCHOR83
 	stp	x19, x20, [sp, 16]
-	adrp	x23, .LANCHOR85
+	adrp	x23, .LANCHOR87
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR88
+	adrp	x22, .LANCHOR90
 	mul	w2, w2, w0
-	ldr	x0, [x24, #:lo12:.LANCHOR81]
+	ldr	x0, [x24, #:lo12:.LANCHOR83]
 	stp	x25, x26, [sp, 64]
 	adrp	x25, .LANCHOR40
 	str	x27, [sp, 80]
@@ -5178,98 +5326,98 @@ SupperBlkListInit:
 	add	x26, x26, :lo12:.LANCHOR47
 	bl	ftl_memset
 	mov	w21, 0
-	adrp	x0, .LANCHOR87
+	adrp	x0, .LANCHOR89
 	mov	w20, 0
 	mov	w19, 0
-	strh	wzr, [x23, #:lo12:.LANCHOR85]
-	str	xzr, [x0, #:lo12:.LANCHOR87]
-	adrp	x0, .LANCHOR82
-	strh	wzr, [x22, #:lo12:.LANCHOR88]
-	adrp	x27, .LANCHOR38
-	str	xzr, [x0, #:lo12:.LANCHOR82]
+	strh	wzr, [x23, #:lo12:.LANCHOR87]
+	str	xzr, [x0, #:lo12:.LANCHOR89]
 	adrp	x0, .LANCHOR84
+	strh	wzr, [x22, #:lo12:.LANCHOR90]
+	adrp	x27, .LANCHOR38
 	str	xzr, [x0, #:lo12:.LANCHOR84]
-	adrp	x0, .LANCHOR139
-	strh	wzr, [x0, #:lo12:.LANCHOR139]
-.L749:
+	adrp	x0, .LANCHOR86
+	str	xzr, [x0, #:lo12:.LANCHOR86]
+	adrp	x0, .LANCHOR142
+	strh	wzr, [x0, #:lo12:.LANCHOR142]
+.L777:
 	ldrh	w0, [x25]
 	cmp	w19, w0
-	bge	.L756
+	bge	.L784
 	adrp	x0, .LANCHOR52
 	ldrh	w8, [x27, #:lo12:.LANCHOR38]
 	mov	w5, 0
 	mov	w6, 0
 	ldrh	w7, [x0, #:lo12:.LANCHOR52]
-	b	.L757
-.L751:
+	b	.L785
+.L779:
 	ldrb	w0, [x26, w6, sxtw]
 	mov	w1, w19
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L750
+	cbnz	w0, .L778
 	add	w5, w7, w5
 	sxth	w5, w5
-.L750:
+.L778:
 	add	w6, w6, 1
 	sxth	w6, w6
-.L757:
+.L785:
 	cmp	w6, w8
-	blt	.L751
-	cbz	w5, .L752
+	blt	.L779
+	cbz	w5, .L780
 	mov	w0, 32768
 	sdiv	w5, w0, w5
 	sxth	w5, w5
-.L753:
-	ldr	x1, [x24, #:lo12:.LANCHOR81]
+.L781:
+	ldr	x1, [x24, #:lo12:.LANCHOR83]
 	mov	w0, 6
 	smaddl	x0, w19, w0, x1
 	strh	w5, [x0, 4]
-	adrp	x0, .LANCHOR91
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
-	cmp	w19, w0
-	beq	.L754
-	adrp	x0, .LANCHOR92
-	ldrh	w0, [x0, #:lo12:.LANCHOR92]
-	cmp	w19, w0
-	beq	.L754
 	adrp	x0, .LANCHOR93
 	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w19, w0
-	beq	.L754
-	adrp	x0, .LANCHOR83
-	ldr	x0, [x0, #:lo12:.LANCHOR83]
+	beq	.L782
+	adrp	x0, .LANCHOR94
+	ldrh	w0, [x0, #:lo12:.LANCHOR94]
+	cmp	w19, w0
+	beq	.L782
+	adrp	x0, .LANCHOR95
+	ldrh	w0, [x0, #:lo12:.LANCHOR95]
+	cmp	w19, w0
+	beq	.L782
+	adrp	x0, .LANCHOR85
+	ldr	x0, [x0, #:lo12:.LANCHOR85]
 	ldrh	w0, [x0, w19, sxtw 1]
-	cbnz	w0, .L755
+	cbnz	w0, .L783
 	add	w21, w21, 1
 	mov	w0, w19
 	and	w21, w21, 65535
 	bl	INSERT_FREE_LIST
-.L754:
+.L782:
 	add	w19, w19, 1
 	sxth	w19, w19
-	b	.L749
-.L752:
-	adrp	x0, .LANCHOR83
+	b	.L777
+.L780:
+	adrp	x0, .LANCHOR85
 	mov	w1, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR83]
+	ldr	x0, [x0, #:lo12:.LANCHOR85]
 	strh	w1, [x0, w19, sxtw 1]
-	b	.L753
-.L755:
+	b	.L781
+.L783:
 	add	w20, w20, 1
 	mov	w0, w19
 	and	w20, w20, 65535
 	bl	INSERT_DATA_LIST
-	b	.L754
-.L756:
-	strh	w20, [x23, #:lo12:.LANCHOR85]
+	b	.L782
+.L784:
+	strh	w20, [x23, #:lo12:.LANCHOR87]
 	add	w20, w20, w21
-	strh	w21, [x22, #:lo12:.LANCHOR88]
+	strh	w21, [x22, #:lo12:.LANCHOR90]
 	cmp	w0, w20
-	bge	.L758
-	mov	w2, 2646
-	adrp	x1, .LANCHOR140
+	bge	.L786
+	mov	w2, 2899
+	adrp	x1, .LANCHOR143
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR140
+	add	x1, x1, :lo12:.LANCHOR143
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -5277,7 +5425,7 @@ SupperBlkListInit:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L758:
+.L786:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -5293,25 +5441,25 @@ SupperBlkListInit:
 	.type	FtlGcPageVarInit, %function
 FtlGcPageVarInit:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR108
+	adrp	x0, .LANCHOR111
 	mov	w1, 255
 	add	x29, sp, 0
-	strh	wzr, [x0, #:lo12:.LANCHOR108]
-	adrp	x0, .LANCHOR110
+	strh	wzr, [x0, #:lo12:.LANCHOR111]
+	adrp	x0, .LANCHOR113
 	str	x19, [sp, 16]
 	adrp	x19, .LANCHOR54
-	strh	wzr, [x0, #:lo12:.LANCHOR110]
-	adrp	x0, .LANCHOR109
+	strh	wzr, [x0, #:lo12:.LANCHOR113]
+	adrp	x0, .LANCHOR112
 	ldrh	w2, [x19, #:lo12:.LANCHOR54]
-	ldr	x0, [x0, #:lo12:.LANCHOR109]
+	ldr	x0, [x0, #:lo12:.LANCHOR112]
 	lsl	w2, w2, 1
 	bl	ftl_memset
 	ldrh	w2, [x19, #:lo12:.LANCHOR54]
 	mov	w0, 12
 	mov	w1, 255
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR111
-	ldr	x0, [x0, #:lo12:.LANCHOR111]
+	adrp	x0, .LANCHOR114
+	ldr	x0, [x0, #:lo12:.LANCHOR114]
 	bl	ftl_memset
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -5348,8 +5496,8 @@ ftl_memcpy:
 FlashReadIdbData:
 	stp	x29, x30, [sp, -16]!
 	mov	w2, 2048
-	adrp	x1, .LANCHOR141
-	add	x1, x1, :lo12:.LANCHOR141
+	adrp	x1, .LANCHOR144
+	add	x1, x1, :lo12:.LANCHOR144
 	add	x29, sp, 0
 	bl	ftl_memcpy
 	mov	w0, 0
@@ -5362,8 +5510,8 @@ FlashReadIdbData:
 	.type	FlashLoadPhyInfoInRam, %function
 FlashLoadPhyInfoInRam:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LANCHOR142
-	add	x8, x0, :lo12:.LANCHOR142
+	adrp	x0, .LANCHOR145
+	add	x8, x0, :lo12:.LANCHOR145
 	adrp	x11, .LANCHOR22
 	add	x29, sp, 0
 	add	x8, x8, 1
@@ -5372,7 +5520,7 @@ FlashLoadPhyInfoInRam:
 	stp	x19, x20, [sp, 16]
 	mov	x10, 0
 	str	x21, [sp, 32]
-.L770:
+.L798:
 	ldrb	w2, [x8, -1]
 	mov	w12, w10
 	lsl	x21, x10, 5
@@ -5380,34 +5528,34 @@ FlashLoadPhyInfoInRam:
 	mov	x0, x8
 	bl	FlashMemCmp8
 	mov	w20, w0
-	cbnz	w0, .L768
-	add	x0, x7, :lo12:.LANCHOR142
+	cbnz	w0, .L796
+	add	x0, x7, :lo12:.LANCHOR145
 	ubfiz	x12, x12, 5, 32
 	add	x21, x0, x21
 	add	x0, x0, x12
-	adrp	x1, .LANCHOR143
-	add	x4, x1, :lo12:.LANCHOR143
+	adrp	x1, .LANCHOR146
+	add	x4, x1, :lo12:.LANCHOR146
 	ldrb	w3, [x0, 22]
 	mov	x0, 0
-.L769:
+.L797:
 	lsl	x5, x0, 5
 	mov	w2, w0
 	ldrb	w5, [x5, x4]
 	cmp	w5, w3
-	beq	.L772
+	beq	.L800
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L769
+	bne	.L797
 	mov	w2, w0
-.L772:
+.L800:
 	ubfiz	x0, x2, 5, 32
-	add	x1, x1, :lo12:.LANCHOR143
+	add	x1, x1, :lo12:.LANCHOR146
 	adrp	x19, .LANCHOR31
 	add	x19, x19, :lo12:.LANCHOR31
 	add	x1, x1, x0
 	mov	w2, 32
-	adrp	x0, .LANCHOR7
-	add	x0, x0, :lo12:.LANCHOR7
+	adrp	x0, .LANCHOR8
+	add	x0, x0, :lo12:.LANCHOR8
 	bl	ftl_memcpy
 	mov	w2, 32
 	mov	x1, x21
@@ -5415,36 +5563,20 @@ FlashLoadPhyInfoInRam:
 	bl	ftl_memcpy
 	ldrh	w0, [x19, 10]
 	bl	FlashBlockAlignInit
-	b	.L767
-.L768:
+	b	.L795
+.L796:
 	add	x10, x10, 1
 	add	x8, x8, 32
-	cmp	x10, 81
-	bne	.L770
+	cmp	x10, 86
+	bne	.L798
 	mov	w20, -1
-.L767:
+.L795:
 	mov	w0, w20
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
 	.size	FlashLoadPhyInfoInRam, .-FlashLoadPhyInfoInRam
-	.section	.text.ftl_memcpy32,"ax",@progbits
-	.align	2
-	.global	ftl_memcpy32
-	.type	ftl_memcpy32, %function
-ftl_memcpy32:
-	mov	x3, 0
-.L777:
-	cmp	w2, w3
-	bhi	.L778
-	ret
-.L778:
-	ldr	w4, [x1, x3, lsl 2]
-	str	w4, [x0, x3, lsl 2]
-	add	x3, x3, 1
-	b	.L777
-	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.NandcCopy1KB,"ax",@progbits
 	.align	2
 	.global	NandcCopy1KB
@@ -5462,15 +5594,13 @@ NandcCopy1KB:
 	ubfiz	x0, x19, 9, 8
 	mov	x20, x4
 	add	x0, x2, x0
-	bne	.L780
-	cbz	x3, .L781
-	tst	x3, 3
-	bne	.L782
-	mov	w2, 256
+	bne	.L805
+	cbz	x3, .L806
+	mov	w2, 1024
 	mov	x1, x3
-	bl	ftl_memcpy32
-.L781:
-	cbz	x20, .L779
+	bl	ftl_memcpy
+.L806:
+	cbz	x20, .L804
 	ldrb	w0, [x20]
 	lsr	w19, w19, 1
 	ldrb	w1, [x20, 1]
@@ -5482,26 +5612,19 @@ NandcCopy1KB:
 	mov	w1, 12
 	mul	w19, w19, w1
 	str	w0, [x21, w19, sxtw 2]
-.L779:
+.L804:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L782:
-	mov	w2, 1024
-	mov	x1, x3
-	bl	ftl_memcpy
-	b	.L781
-.L780:
-	cbz	x3, .L785
-	tst	x3, 3
-	bne	.L786
+.L805:
+	cbz	x3, .L809
 	mov	x1, x0
-	mov	w2, 256
+	mov	w2, 1024
 	mov	x0, x3
-	bl	ftl_memcpy32
-.L785:
-	cbz	x20, .L779
+	bl	ftl_memcpy
+.L809:
+	cbz	x20, .L804
 	lsr	w19, w19, 1
 	mov	w0, 12
 	mul	w19, w19, w0
@@ -5513,13 +5636,7 @@ NandcCopy1KB:
 	lsr	w0, w0, 24
 	strb	w1, [x20, 2]
 	strb	w0, [x20, 3]
-	b	.L779
-.L786:
-	mov	x1, x0
-	mov	w2, 1024
-	mov	x0, x3
-	bl	ftl_memcpy
-	b	.L785
+	b	.L804
 	.size	NandcCopy1KB, .-NandcCopy1KB
 	.section	.text.NandcXferData,"ax",@progbits
 	.align	2
@@ -5543,24 +5660,25 @@ NandcXferData:
 	and	w24, w2, 255
 	mov	x21, x4
 	ldr	x19, [x0, x1]
-	bne	.L799
-	cbnz	x4, .L800
+	bne	.L822
+	cbnz	x4, .L823
 	add	x21, x29, 128
 	mov	w2, 64
 	mov	w1, 255
 	add	x0, x29, 128
 	bl	ftl_memset
-.L800:
+.L823:
 	mov	x5, x21
 	mov	x4, x26
 	mov	w2, w24
-	mov	w1, w20
 	mov	w3, 0
+	mov	w1, w20
 	mov	w0, w25
 	bl	NandcXferStart
+	mov	w1, w20
 	mov	w0, w25
 	bl	NandcXferComp
-	cbnz	w20, .L824
+	cbnz	w20, .L847
 	adrp	x0, .LANCHOR32
 	adrp	x4, .LANCHOR35
 	mov	x1, x0
@@ -5573,38 +5691,38 @@ NandcXferData:
 	add	x2, x21, x2, lsl 2
 	csel	w3, w3, w0, cc
 	mov	w0, 0
-.L803:
+.L826:
 	add	w5, w3, w0
 	cmp	x21, x2
-	bne	.L804
+	bne	.L827
 	adrp	x0, .LANCHOR34
 	ldr	w4, [x1, #:lo12:.LANCHOR32]
 	lsr	w24, w24, 2
 	mov	w2, 0
 	ldr	w3, [x0, #:lo12:.LANCHOR34]
 	mov	w22, 0
-.L805:
+.L828:
 	cmp	w2, w24
-	bcs	.L801
-	cbnz	w4, .L811
-.L801:
+	bcs	.L824
+	cbnz	w4, .L834
+.L824:
 	str	wzr, [x19, 16]
-.L812:
+.L835:
 	adrp	x0, .LANCHOR34
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	cmp	w0, 5
-	bls	.L798
-	cbnz	w20, .L798
+	bls	.L821
+	cbnz	w20, .L821
 	ldr	w0, [x19]
 	mov	w1, 8192
 	movk	w1, 0x2, lsl 16
 	and	w1, w0, w1
 	cmp	w1, 139264
-	bne	.L798
+	bne	.L821
 	orr	w0, w0, 131072
 	mov	w22, -1
 	str	w0, [x19]
-.L798:
+.L821:
 	mov	w0, w22
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -5613,7 +5731,7 @@ NandcXferData:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L804:
+.L827:
 	ldr	x6, [x4, 8]
 	and	x0, x0, 4294967292
 	add	x21, x21, 4
@@ -5626,18 +5744,18 @@ NandcXferData:
 	lsr	w0, w0, 24
 	strb	w0, [x21, -1]
 	mov	w0, w5
-	b	.L803
-.L811:
+	b	.L826
+.L834:
 	uxtw	x0, w2
 	add	x0, x0, 8
 	ldr	w0, [x19, x0, lsl 2]
 	str	w0, [x29, 120]
 	ldr	w0, [x29, 120]
-	tbnz	x0, 2, .L827
+	tbnz	x0, 2, .L850
 	ldr	w0, [x29, 120]
-	tbnz	x0, 15, .L827
+	tbnz	x0, 15, .L850
 	cmp	w3, 5
-	bls	.L807
+	bls	.L830
 	ldr	w1, [x29, 120]
 	ubfx	x6, x1, 3, 5
 	ldr	w1, [x29, 120]
@@ -5650,26 +5768,26 @@ NandcXferData:
 	orr	w0, w5, w0, lsl 5
 	cmp	w1, w0
 	ldr	w0, [x29, 120]
-	bls	.L808
+	bls	.L831
 	ubfx	x1, x0, 3, 5
 	ldr	w0, [x29, 120]
 	ubfx	x0, x0, 27, 1
-.L833:
+.L856:
 	orr	w0, w1, w0, lsl 5
-.L809:
+.L832:
 	cmp	w22, w0
 	csel	w22, w22, w0, cs
-.L806:
+.L829:
 	add	w2, w2, 1
-	b	.L805
-.L808:
+	b	.L828
+.L831:
 	ubfx	x1, x0, 16, 5
 	ldr	w0, [x29, 120]
 	ubfx	x0, x0, 29, 1
-	b	.L833
-.L807:
+	b	.L856
+.L830:
 	cmp	w3, 3
-	bls	.L828
+	bls	.L851
 	ldr	w1, [x29, 120]
 	ubfx	x6, x1, 3, 5
 	ldr	w1, [x29, 120]
@@ -5682,45 +5800,45 @@ NandcXferData:
 	orr	w0, w5, w0, lsl 5
 	cmp	w1, w0
 	ldr	w0, [x29, 120]
-	bls	.L810
+	bls	.L833
 	ubfx	x1, x0, 3, 5
 	ldr	w0, [x29, 120]
 	ubfx	x0, x0, 28, 1
-	b	.L833
-.L810:
+	b	.L856
+.L833:
 	ubfx	x1, x0, 16, 5
 	ldr	w0, [x29, 120]
 	ubfx	x0, x0, 30, 1
-	b	.L833
-.L828:
+	b	.L856
+.L851:
 	mov	w0, 0
-	b	.L809
-.L827:
+	b	.L832
+.L850:
 	mov	w22, -1
-	b	.L806
-.L824:
+	b	.L829
+.L847:
 	mov	w22, 0
-	b	.L801
-.L799:
+	b	.L824
+.L822:
 	cmp	w20, 1
-	bne	.L813
+	bne	.L836
 	cmp	x4, 0
 	mov	w23, 2
 	csel	w23, w23, wzr, ne
 	mov	w27, 0
 	lsl	w23, w23, 1
 	mov	w22, 0
-.L814:
+.L837:
 	cmp	w22, w24
-	bcc	.L816
+	bcc	.L839
 	mov	w22, 0
-	b	.L812
-.L816:
+	b	.L835
+.L839:
 	and	w28, w22, 3
-	cbz	x26, .L829
+	cbz	x26, .L852
 	lsl	w3, w22, 9
 	add	x3, x26, x3
-.L815:
+.L838:
 	add	x4, x21, x27, uxtw
 	mov	w2, w28
 	mov	w1, 1
@@ -5735,13 +5853,14 @@ NandcXferData:
 	mov	w0, w25
 	bl	NandcXferStart
 	add	w27, w27, w23
+	mov	w1, 1
 	mov	w0, w25
 	bl	NandcXferComp
-	b	.L814
-.L829:
+	b	.L837
+.L852:
 	mov	x3, 0
-	b	.L815
-.L813:
+	b	.L838
+.L836:
 	mov	w0, w25
 	mov	x5, 0
 	mov	x4, 0
@@ -5757,16 +5876,17 @@ NandcXferData:
 	lsl	w0, w27, 1
 	mov	w22, 0
 	str	w0, [x29, 108]
-.L817:
+.L840:
 	cmp	w24, w23
-	bls	.L812
+	bls	.L835
 	mov	w0, w25
+	mov	w1, w20
 	bl	NandcXferComp
-	ldr	w0, [x19, 32]
 	add	w27, w23, 2
-	str	w0, [x29, 120]
+	ldr	w0, [x19, 32]
 	cmp	w24, w27
-	bls	.L818
+	str	w0, [x29, 120]
+	bls	.L841
 	mov	x5, 0
 	mov	x4, 0
 	and	w3, w27, 3
@@ -5774,9 +5894,9 @@ NandcXferData:
 	mov	w1, 0
 	mov	w0, w25
 	bl	NandcXferStart
-.L818:
+.L841:
 	ldr	w0, [x29, 120]
-	tbnz	x0, 2, .L830
+	tbnz	x0, 2, .L853
 	ldr	w0, [x29, 120]
 	ubfx	x1, x0, 3, 5
 	ldr	w0, [x29, 120]
@@ -5784,12 +5904,12 @@ NandcXferData:
 	orr	w0, w1, w0, lsl 5
 	cmp	w22, w0
 	csel	w22, w22, w0, cs
-.L819:
+.L842:
 	and	w2, w23, 3
-	cbz	x26, .L831
+	cbz	x26, .L854
 	lsl	w3, w23, 9
 	add	x3, x26, x3
-.L820:
+.L843:
 	add	x4, x21, x28, uxtw
 	mov	x0, x19
 	mov	w1, 0
@@ -5797,13 +5917,13 @@ NandcXferData:
 	ldr	w0, [x29, 108]
 	mov	w23, w27
 	add	w28, w28, w0
-	b	.L817
-.L830:
+	b	.L840
+.L853:
 	mov	w22, -1
-	b	.L819
-.L831:
+	b	.L842
+.L854:
 	mov	x3, 0
-	b	.L820
+	b	.L843
 	.size	NandcXferData, .-NandcXferData
 	.section	.text.FlashReadRawPage,"ax",@progbits
 	.align	2
@@ -5821,7 +5941,7 @@ FlashReadRawPage:
 	mov	x22, x2
 	mov	x23, x3
 	ldrb	w20, [x1, #:lo12:.LANCHOR31+9]
-	bne	.L835
+	bne	.L858
 	adrp	x0, .LANCHOR3
 	adrp	x1, .LANCHOR4
 	ldrb	w0, [x0, #:lo12:.LANCHOR3]
@@ -5830,7 +5950,7 @@ FlashReadRawPage:
 	cmp	w0, w21
 	mov	w0, 4
 	csel	w20, w20, w0, ls
-.L835:
+.L858:
 	mov	w0, w19
 	bl	NandcWaitFlashReady
 	mov	w0, w19
@@ -5883,13 +6003,13 @@ FlashDdrTunningRead:
 	cmp	w0, 8
 	mov	w0, 12
 	csel	w22, w22, w0, cc
-	cbz	w4, .L851
+	cbz	w4, .L874
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
 	bl	NandcSetMode
 	mov	w0, w24
-	adrp	x19, .LANCHOR24
+	adrp	x19, .LANCHOR25
 	bl	FlashReset
 	mov	x3, x28
 	mov	x2, x23
@@ -5897,15 +6017,15 @@ FlashDdrTunningRead:
 	mov	w0, w24
 	bl	FlashReadRawPage
 	mov	w21, w0
-	ldrb	w0, [x19, #:lo12:.LANCHOR24]
+	ldrb	w0, [x19, #:lo12:.LANCHOR25]
 	bl	FlashSetInterfaceMode
-	ldrb	w0, [x19, #:lo12:.LANCHOR24]
+	ldrb	w0, [x19, #:lo12:.LANCHOR25]
 	bl	NandcSetMode
 	cmn	w21, #1
-	bne	.L840
-.L849:
+	bne	.L863
+.L872:
 	mov	w21, -1
-.L837:
+.L860:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -5914,30 +6034,30 @@ FlashDdrTunningRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L840:
+.L863:
 	mov	w1, w25
 	mov	w2, w21
 	adrp	x0, .LC9
 	add	x0, x0, :lo12:.LC9
 	bl	printf
-	adrp	x1, .LANCHOR144
-	ldr	w0, [x1, #:lo12:.LANCHOR144]
+	adrp	x1, .LANCHOR147
+	ldr	w0, [x1, #:lo12:.LANCHOR147]
 	add	w0, w0, 1
 	cmp	w0, 2047
-	bhi	.L842
-	str	w0, [x1, #:lo12:.LANCHOR144]
-	b	.L837
-.L842:
-	str	wzr, [x1, #:lo12:.LANCHOR144]
+	bhi	.L865
+	str	w0, [x1, #:lo12:.LANCHOR147]
+	b	.L860
+.L865:
+	str	wzr, [x1, #:lo12:.LANCHOR147]
 	mov	x28, 0
 	mov	x23, 0
-.L839:
+.L862:
 	mov	w5, 0
 	mov	w20, 0
 	mov	w6, 0
 	mov	w19, 0
 	mov	w27, -1
-.L847:
+.L870:
 	stp	w5, w6, [x29, 100]
 	mov	w0, w22
 	bl	NandcSetDdrPara
@@ -5949,65 +6069,65 @@ FlashDdrTunningRead:
 	add	w1, w21, 1
 	cmp	w0, w1
 	ldp	w5, w6, [x29, 100]
-	bhi	.L843
+	bhi	.L866
 	cmp	w0, 2
-	bhi	.L853
+	bhi	.L876
 	add	w19, w19, 1
 	cmp	w19, 9
-	bls	.L853
+	bls	.L876
 	mov	w1, w20
 	mov	w21, w0
 	sub	w20, w22, w19
 	mov	w27, 0
-.L845:
+.L868:
 	cmp	w19, w6
 	csel	w20, w20, w1, hi
-.L846:
-	cbz	w20, .L848
+.L869:
+	cbz	w20, .L871
 	mov	w1, w20
 	adrp	x0, .LC10
 	add	x0, x0, :lo12:.LC10
 	bl	printf
 	mov	w0, w20
 	bl	NandcSetDdrPara
-.L848:
-	cbz	w27, .L837
+.L871:
+	cbz	w27, .L860
 	adrp	x0, .LC11
 	mov	w2, w25
 	mov	w1, w24
 	add	x0, x0, :lo12:.LC11
 	bl	printf
-	cbz	w26, .L849
+	cbz	w26, .L872
 	ldr	w1, [x29, 108]
 	lsr	w0, w1, 8
 	bl	NandcSetDdrPara
-	b	.L837
-.L851:
+	b	.L860
+.L874:
 	mov	w21, 1024
-	b	.L839
-.L843:
+	b	.L862
+.L866:
 	cmp	w19, w6
-	bls	.L854
+	bls	.L877
 	sub	w20, w5, w19
 	cmp	w19, 7
-	bhi	.L846
+	bhi	.L869
 	mov	w6, w19
-.L854:
+.L877:
 	mov	w19, 0
-	b	.L844
-.L853:
+	b	.L867
+.L876:
 	mov	w5, w22
 	mov	w21, w0
 	mov	w27, 0
 	mov	x28, 0
 	mov	x23, 0
-.L844:
+.L867:
 	add	w22, w22, 2
 	cmp	w22, 69
-	bls	.L847
+	bls	.L870
 	mov	w1, w20
 	mov	w20, w5
-	b	.L845
+	b	.L868
 	.size	FlashDdrTunningRead, .-FlashDdrTunningRead
 	.section	.text.FlashReadPage,"ax",@progbits
 	.align	2
@@ -6028,14 +6148,14 @@ FlashReadPage:
 	bl	FlashReadRawPage
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L864
+	bne	.L887
 	adrp	x24, .LANCHOR6
 	ldrb	w25, [x24, #:lo12:.LANCHOR6]
-	cbnz	w25, .L865
-.L867:
+	cbnz	w25, .L888
+.L890:
 	adrp	x0, .LANCHOR30
 	ldrb	w0, [x0, #:lo12:.LANCHOR30]
-	cbz	w0, .L864
+	cbz	w0, .L887
 	adrp	x0, .LANCHOR19
 	mov	w4, 1
 	mov	x3, x23
@@ -6047,16 +6167,16 @@ FlashReadPage:
 	bl	FlashDdrTunningRead
 	mov	w19, w0
 	cmn	w0, #1
-	beq	.L868
+	beq	.L891
 	adrp	x0, .LANCHOR33
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	cmp	w19, w0, lsr 1
-	bls	.L864
-.L868:
+	bls	.L887
+.L891:
 	lsr	w0, w24, 8
 	bl	NandcSetDdrPara
-	b	.L864
-.L865:
+	b	.L887
+.L888:
 	strb	wzr, [x24, #:lo12:.LANCHOR6]
 	mov	x3, x23
 	mov	x2, x22
@@ -6065,14 +6185,14 @@ FlashReadPage:
 	bl	FlashReadRawPage
 	strb	w25, [x24, #:lo12:.LANCHOR6]
 	cmn	w0, #1
-	beq	.L867
+	beq	.L890
 	mov	w19, w0
-.L864:
-	adrp	x24, .LANCHOR145
-	ldr	x4, [x24, #:lo12:.LANCHOR145]
-	cbz	x4, .L863
+.L887:
+	adrp	x24, .LANCHOR148
+	ldr	x4, [x24, #:lo12:.LANCHOR148]
+	cbz	x4, .L886
 	cmn	w19, #1
-	bne	.L863
+	bne	.L886
 	mov	x3, x23
 	mov	x2, x22
 	mov	w1, w21
@@ -6086,13 +6206,13 @@ FlashReadPage:
 	add	x0, x0, :lo12:.LC12
 	bl	printf
 	cmn	w19, #1
-	bne	.L863
-	adrp	x0, .LANCHOR15
-	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L863
+	bne	.L886
+	adrp	x0, .LANCHOR16
+	ldrb	w0, [x0, #:lo12:.LANCHOR16]
+	cbz	w0, .L886
 	mov	w0, w20
 	bl	flash_enter_slc_mode
-	ldr	x4, [x24, #:lo12:.LANCHOR145]
+	ldr	x4, [x24, #:lo12:.LANCHOR148]
 	mov	x3, x23
 	mov	x2, x22
 	mov	w1, w21
@@ -6101,7 +6221,7 @@ FlashReadPage:
 	mov	w19, w0
 	mov	w0, w20
 	bl	flash_exit_slc_mode
-.L863:
+.L886:
 	mov	w0, w19
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -6118,13 +6238,13 @@ FlashDdrParaScan:
 	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR24
+	adrp	x19, .LANCHOR25
 	and	w20, w0, 255
 	stp	x21, x22, [sp, 32]
-	ldrb	w0, [x19, #:lo12:.LANCHOR24]
+	ldrb	w0, [x19, #:lo12:.LANCHOR25]
 	mov	w21, w1
 	bl	FlashSetInterfaceMode
-	ldrb	w0, [x19, #:lo12:.LANCHOR24]
+	ldrb	w0, [x19, #:lo12:.LANCHOR25]
 	bl	NandcSetMode
 	mov	w4, 0
 	mov	x3, 0
@@ -6140,184 +6260,44 @@ FlashDdrParaScan:
 	adrp	x20, .LANCHOR30
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	beq	.L884
+	beq	.L907
 	cmn	w22, #1
-	bne	.L885
-.L884:
-	ldrb	w0, [x19, #:lo12:.LANCHOR24]
-	tbz	x0, 0, .L885
+	bne	.L908
+.L907:
+	ldrb	w0, [x19, #:lo12:.LANCHOR25]
+	tbz	x0, 0, .L908
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
 	bl	NandcSetMode
 	strb	wzr, [x20, #:lo12:.LANCHOR30]
-.L886:
+.L909:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L885:
+.L908:
 	mov	w0, 1
 	strb	w0, [x20, #:lo12:.LANCHOR30]
-	b	.L886
+	b	.L909
 	.size	FlashDdrParaScan, .-FlashDdrParaScan
-	.section	.text.FlashLoadPhyInfo,"ax",@progbits
+	.section	.text.ToshibaReadRetrial,"ax",@progbits
 	.align	2
-	.global	FlashLoadPhyInfo
-	.type	FlashLoadPhyInfo, %function
-FlashLoadPhyInfo:
+	.global	ToshibaReadRetrial
+	.type	ToshibaReadRetrial, %function
+ToshibaReadRetrial:
 	stp	x29, x30, [sp, -128]!
-	mov	w0, 60
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR4
-	adrp	x22, .LANCHOR147
+	and	w21, w0, 255
+	stp	x25, x26, [sp, 64]
+	mov	w0, w21
 	stp	x19, x20, [sp, 16]
-	strb	w0, [x29, 120]
-	mov	w0, 40
-	strb	w0, [x29, 121]
-	mov	w0, 24
-	strb	w0, [x29, 122]
-	mov	w0, 16
-	strb	w0, [x29, 123]
-	adrp	x20, .LANCHOR146
-	ldr	w0, [x21, #:lo12:.LANCHOR4]
-	mov	w19, 0
-	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR148
-	str	w0, [x29, 108]
-	mov	w23, -1
-	ldr	x0, [x22, #:lo12:.LANCHOR147]
-	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR31
-	str	x0, [x20, #:lo12:.LANCHOR146]
-	mov	w26, 4
-	stp	x27, x28, [sp, 80]
-	add	x25, x25, :lo12:.LANCHOR31
-	str	wzr, [x24, #:lo12:.LANCHOR148]
-	mov	w0, 0
-	bl	flash_enter_slc_mode
-.L895:
-	add	w28, w19, 1
-	mov	x27, 0
-.L897:
-	add	x0, x29, 120
-	ldrb	w0, [x0, x27]
-	bl	FlashBchSel
-	ldr	x2, [x22, #:lo12:.LANCHOR147]
-	mov	x3, 0
-	mov	w1, w19
-	mov	w0, 0
-	bl	FlashReadRawPage
-	cmn	w0, #1
-	bne	.L896
-	ldr	x2, [x22, #:lo12:.LANCHOR147]
-	mov	x3, 0
-	mov	w1, w28
-	mov	w0, 0
-	bl	FlashReadRawPage
-	cmn	w0, #1
-	bne	.L896
-	add	x27, x27, 1
-	cmp	x27, 4
-	bne	.L897
-.L898:
-	ldr	w0, [x29, 108]
-	subs	w26, w26, #1
-	add	w19, w19, w0
-	bne	.L895
-	b	.L903
-.L899:
-	mov	w1, 2036
-	add	x0, x6, 12
-	bl	js_hash
-	ldr	w1, [x6, 8]
-	cmp	w1, w0
-	bne	.L905
-	add	x1, x6, 160
-	mov	w2, 32
-	mov	x0, x25
-	bl	ftl_memcpy
-	ldr	x1, [x20, #:lo12:.LANCHOR146]
-	mov	w2, 32
-	adrp	x0, .LANCHOR7
-	add	x0, x0, :lo12:.LANCHOR7
-	add	x1, x1, 192
-	bl	ftl_memcpy
-	ldr	x1, [x20, #:lo12:.LANCHOR146]
-	mov	w2, 852
-	adrp	x0, .LANCHOR20
-	add	x0, x0, :lo12:.LANCHOR20
-	add	x1, x1, 224
-	bl	ftl_memcpy
-	ldrh	w0, [x25, 10]
-	bl	FlashBlockAlignInit
-	str	w19, [x24, #:lo12:.LANCHOR148]
-	ldr	x1, [x20, #:lo12:.LANCHOR146]
-	adrp	x0, .LANCHOR30
-	ldr	w2, [x1, 1076]
-	strb	w2, [x0, #:lo12:.LANCHOR30]
-	ldr	w0, [x21, #:lo12:.LANCHOR4]
-	adrp	x2, .LANCHOR149
-	udiv	w0, w19, w0
-	add	w0, w0, 1
-	cmp	w0, 1
-	bls	.L901
-.L908:
-	str	w0, [x2, #:lo12:.LANCHOR149]
-	adrp	x0, .LANCHOR150
-	ldrh	w1, [x1, 14]
-	mov	w23, 0
-	strb	w1, [x0, #:lo12:.LANCHOR150]
-	b	.L898
-.L901:
-	mov	w0, 2
-	b	.L908
-.L905:
-	mov	w23, -1
-	b	.L898
-.L896:
-	ldr	x6, [x20, #:lo12:.LANCHOR146]
-	mov	w1, 20036
-	movk	w1, 0x4e41, lsl 16
-	ldr	w0, [x6]
-	cmp	w0, w1
-	bne	.L898
-	cbnz	w23, .L899
-	ldr	w0, [x21, #:lo12:.LANCHOR4]
-	udiv	w19, w19, w0
-	adrp	x0, .LANCHOR149
-	add	w19, w19, 1
-	str	w19, [x0, #:lo12:.LANCHOR149]
-.L903:
-	mov	w0, 0
-	bl	flash_exit_slc_mode
-	mov	w0, w23
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 128
-	ret
-	.size	FlashLoadPhyInfo, .-FlashLoadPhyInfo
-	.section	.text.ToshibaReadRetrial,"ax",@progbits
-	.align	2
-	.global	ToshibaReadRetrial
-	.type	ToshibaReadRetrial, %function
-ToshibaReadRetrial:
-	stp	x29, x30, [sp, -128]!
-	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	and	w21, w0, 255
-	stp	x25, x26, [sp, 64]
-	mov	w0, w21
-	stp	x19, x20, [sp, 16]
-	mov	x25, x2
-	stp	x27, x28, [sp, 80]
-	mov	x26, x3
-	str	w1, [x29, 120]
+	mov	x25, x2
+	stp	x27, x28, [sp, 80]
+	mov	x26, x3
+	str	w1, [x29, 120]
 	stp	x23, x24, [sp, 48]
 	bl	NandcWaitFlashReady
 	sbfiz	x1, x21, 4, 32
@@ -6325,9 +6305,9 @@ ToshibaReadRetrial:
 	add	x0, x0, :lo12:.LANCHOR0
 	add	x2, x0, x1
 	ldr	x22, [x0, x1]
-	adrp	x1, .LANCHOR10
+	adrp	x1, .LANCHOR11
 	ldrb	w27, [x2, 8]
-	ldrb	w0, [x1, #:lo12:.LANCHOR10]
+	ldrb	w0, [x1, #:lo12:.LANCHOR11]
 	str	x1, [x29, 112]
 	add	x19, x27, 8
 	sub	w0, w0, #67
@@ -6335,44 +6315,44 @@ ToshibaReadRetrial:
 	and	w0, w0, 255
 	add	x19, x22, x19, lsl 8
 	cmp	w0, 1
-	bls	.L926
+	bls	.L934
 	adrp	x0, .LANCHOR30
 	ldrb	w0, [x0, #:lo12:.LANCHOR30]
-	cbz	w0, .L927
+	cbz	w0, .L935
 	mov	w23, 1
 	mov	w0, 0
 	bl	NandcSetDdrMode
-.L911:
+.L919:
 	add	x0, x22, x27, lsl 8
 	mov	w1, 92
 	str	w1, [x0, 2056]
 	mov	w1, 197
 	str	w1, [x0, 2056]
-.L910:
+.L918:
 	ldrsw	x0, [x29, 124]
 	mov	w20, 1
 	mov	w24, -1
 	add	x0, x0, 8
 	add	x0, x22, x0, lsl 8
 	str	x0, [x29, 104]
-.L912:
-	adrp	x0, .LANCHOR151
-	ldrb	w0, [x0, #:lo12:.LANCHOR151]
+.L920:
+	adrp	x0, .LANCHOR149
+	ldrb	w0, [x0, #:lo12:.LANCHOR149]
 	add	w0, w0, 1
 	cmp	w20, w0
-	bcc	.L921
+	bcc	.L929
 	mov	w28, w24
-.L920:
+.L928:
 	ldr	x0, [x29, 112]
 	mov	w1, 0
-	ldrb	w0, [x0, #:lo12:.LANCHOR10]
+	ldrb	w0, [x0, #:lo12:.LANCHOR11]
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x19
-	bhi	.L922
+	bhi	.L930
 	bl	SandiskSetRRPara
-.L923:
+.L931:
 	ldrsw	x0, [x29, 124]
 	add	x0, x0, 8
 	add	x22, x22, x0, lsl 8
@@ -6382,17 +6362,17 @@ ToshibaReadRetrial:
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L924
+	bcc	.L932
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L924:
+.L932:
 	mov	w0, w21
 	bl	NandcWaitFlashReady
-	cbz	w23, .L909
+	cbz	w23, .L917
 	mov	w0, 4
 	bl	NandcSetDdrMode
-.L909:
+.L917:
 	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6401,42 +6381,42 @@ ToshibaReadRetrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L927:
+.L935:
 	mov	w23, 0
-	b	.L911
-.L926:
+	b	.L919
+.L934:
 	mov	w23, 0
-	b	.L910
-.L921:
+	b	.L918
+.L929:
 	ldr	x0, [x29, 112]
 	mov	w1, w20
-	ldrb	w0, [x0, #:lo12:.LANCHOR10]
+	ldrb	w0, [x0, #:lo12:.LANCHOR11]
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x19
-	bhi	.L913
+	bhi	.L921
 	bl	SandiskSetRRPara
-.L914:
+.L922:
 	ldr	x0, [x29, 112]
-	ldrb	w0, [x0, #:lo12:.LANCHOR10]
+	ldrb	w0, [x0, #:lo12:.LANCHOR11]
 	cmp	w0, 34
-	bne	.L915
-	adrp	x0, .LANCHOR151
-	ldrb	w0, [x0, #:lo12:.LANCHOR151]
+	bne	.L923
+	adrp	x0, .LANCHOR149
+	ldrb	w0, [x0, #:lo12:.LANCHOR149]
 	sub	w0, w0, #3
 	cmp	w20, w0
-	bne	.L915
+	bne	.L923
 	ldr	x1, [x29, 104]
 	mov	w0, 179
 	str	w0, [x1, 8]
-.L915:
+.L923:
 	add	x0, x22, x27, lsl 8
 	mov	w1, 38
 	str	w1, [x0, 2056]
 	mov	w1, 93
 	str	w1, [x0, 2056]
-	cbz	w23, .L916
+	cbz	w23, .L924
 	mov	w0, 4
 	bl	NandcSetDdrMode
 	ldr	w1, [x29, 120]
@@ -6447,35 +6427,35 @@ ToshibaReadRetrial:
 	mov	w28, w0
 	mov	w0, 0
 	bl	NandcSetDdrMode
-.L917:
+.L925:
 	cmn	w28, #1
-	beq	.L918
+	beq	.L926
 	adrp	x0, .LANCHOR33
 	cmn	w24, #1
 	csel	w24, w24, w28, ne
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L920
+	bcc	.L928
 	mov	x26, 0
 	mov	x25, 0
-.L918:
+.L926:
 	add	w20, w20, 1
-	b	.L912
-.L913:
+	b	.L920
+.L921:
 	bl	ToshibaSetRRPara
-	b	.L914
-.L916:
+	b	.L922
+.L924:
 	ldr	w1, [x29, 120]
 	mov	x3, x26
 	mov	x2, x25
 	mov	w0, w21
 	bl	FlashReadRawPage
 	mov	w28, w0
-	b	.L917
-.L922:
+	b	.L925
+.L930:
 	bl	ToshibaSetRRPara
-	b	.L923
+	b	.L931
 	.size	ToshibaReadRetrial, .-ToshibaReadRetrial
 	.section	.text.SamsungReadRetrial,"ax",@progbits
 	.align	2
@@ -6495,13 +6475,13 @@ SamsungReadRetrial:
 	str	x27, [sp, 80]
 	mov	x25, x3
 	bl	NandcWaitFlashReady
-	adrp	x26, .LANCHOR151
+	adrp	x26, .LANCHOR149
 	sbfiz	x1, x22, 4, 32
 	adrp	x0, .LANCHOR0
 	add	x0, x0, :lo12:.LANCHOR0
 	adrp	x27, .LANCHOR33
 	add	x2, x0, x1
-	add	x26, x26, :lo12:.LANCHOR151
+	add	x26, x26, :lo12:.LANCHOR149
 	add	x27, x27, :lo12:.LANCHOR33
 	mov	w21, 1
 	ldr	x0, [x0, x1]
@@ -6509,12 +6489,12 @@ SamsungReadRetrial:
 	ldrb	w20, [x2, 8]
 	add	x20, x20, 8
 	add	x20, x0, x20, lsl 8
-.L938:
+.L946:
 	ldrb	w0, [x26]
 	add	w0, w0, 1
 	cmp	w21, w0
-	bcc	.L942
-.L941:
+	bcc	.L950
+.L949:
 	mov	x0, x20
 	mov	w1, 0
 	bl	SamsungSetRRPara
@@ -6522,11 +6502,11 @@ SamsungReadRetrial:
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L937
+	bcc	.L945
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L937:
+.L945:
 	mov	w0, w19
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -6535,7 +6515,7 @@ SamsungReadRetrial:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L942:
+.L950:
 	mov	w1, w21
 	mov	x0, x20
 	bl	SamsungSetRRPara
@@ -6545,21 +6525,21 @@ SamsungReadRetrial:
 	mov	w0, w22
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	beq	.L939
+	beq	.L947
 	ldrb	w1, [x27]
 	cmn	w19, #1
 	csel	w19, w19, w0, ne
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L944
+	bcc	.L952
 	mov	x25, 0
 	mov	x24, 0
-.L939:
+.L947:
 	add	w21, w21, 1
-	b	.L938
-.L944:
+	b	.L946
+.L952:
 	mov	w19, w0
-	b	.L941
+	b	.L949
 	.size	SamsungReadRetrial, .-SamsungReadRetrial
 	.section	.text.MicronReadRetrial,"ax",@progbits
 	.align	2
@@ -6575,37 +6555,37 @@ MicronReadRetrial:
 	str	w1, [x29, 140]
 	mov	x24, x2
 	ldrb	w19, [x0, #:lo12:.LANCHOR33]
-	adrp	x0, .LANCHOR15
+	adrp	x0, .LANCHOR16
 	stp	x25, x26, [sp, 64]
 	mov	x25, x3
-	ldrb	w1, [x0, #:lo12:.LANCHOR15]
+	ldrb	w1, [x0, #:lo12:.LANCHOR16]
 	stp	x21, x22, [sp, 32]
 	stp	x27, x28, [sp, 80]
 	str	x0, [x29, 128]
-	cbnz	w1, .L952
+	cbnz	w1, .L960
 	add	w19, w19, w19, lsl 1
 	asr	w19, w19, 2
-.L953:
+.L961:
 	adrp	x21, .LANCHOR0
 	add	x21, x21, :lo12:.LANCHOR0
 	add	x21, x21, x20, sxtw 4
 	mov	w23, 0
 	mov	w28, 137
-.L963:
+.L971:
 	mov	w0, w20
 	bl	NandcWaitFlashReady
 	ldrb	w4, [x21, 8]
-	adrp	x7, .LANCHOR151
+	adrp	x7, .LANCHOR149
 	ldr	x8, [x21]
-	add	x7, x7, :lo12:.LANCHOR151
+	add	x7, x7, :lo12:.LANCHOR149
 	mov	w22, 0
 	mov	w26, -1
 	add	x27, x8, x4, lsl 8
-.L954:
+.L962:
 	ldrb	w0, [x7]
 	cmp	w22, w0
-	bcc	.L958
-.L957:
+	bcc	.L966
+.L965:
 	add	x4, x8, x4, lsl 8
 	mov	w0, 239
 	str	x4, [x29, 120]
@@ -6619,14 +6599,14 @@ MicronReadRetrial:
 	str	wzr, [x4, 2048]
 	str	wzr, [x4, 2048]
 	str	wzr, [x4, 2048]
-	bcc	.L959
+	bcc	.L967
 	cmn	w26, #1
 	mov	w0, 256
 	csel	w26, w26, w0, eq
-.L959:
+.L967:
 	cmp	w26, 256
 	ccmn	w26, #1, 4, ne
-	bne	.L960
+	bne	.L968
 	ldr	w2, [x29, 140]
 	adrp	x0, .LC13
 	mov	w4, w26
@@ -6634,22 +6614,22 @@ MicronReadRetrial:
 	mov	w1, w22
 	add	x0, x0, :lo12:.LC13
 	bl	printf
-	cbnz	w23, .L961
+	cbnz	w23, .L969
 	ldr	x0, [x29, 128]
-	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L951
+	ldrb	w0, [x0, #:lo12:.LANCHOR16]
+	cbz	w0, .L959
 	cmn	w26, #1
-	bne	.L951
+	bne	.L959
 	mov	w1, 3
 	mov	w0, w20
 	mov	w23, 1
 	bl	micron_auto_read_calibration_config
-	b	.L963
-.L952:
+	b	.L971
+.L960:
 	mov	w0, 3
 	sdiv	w19, w19, w0
-	b	.L953
-.L958:
+	b	.L961
+.L966:
 	mov	w0, 239
 	str	w0, [x27, 2056]
 	str	w28, [x27, 2052]
@@ -6672,29 +6652,29 @@ MicronReadRetrial:
 	ldr	w10, [x29, 120]
 	ldp	x4, x7, [x29, 96]
 	ldr	x8, [x29, 112]
-	beq	.L955
+	beq	.L963
 	cmn	w26, #1
 	csel	w26, w26, w0, ne
 	cmp	w0, w19
-	bcc	.L965
+	bcc	.L973
 	mov	x25, 0
 	mov	x24, 0
-.L955:
+.L963:
 	mov	w22, w10
-	b	.L954
-.L965:
+	b	.L962
+.L973:
 	mov	w26, w0
 	mov	x25, 0
 	mov	x24, 0
-	b	.L957
-.L961:
+	b	.L965
+.L969:
 	mov	w0, w20
 	mov	w1, 0
 	bl	micron_auto_read_calibration_config
 	cmn	w26, #1
 	mov	w0, 256
 	csel	w26, w26, w0, eq
-.L951:
+.L959:
 	mov	w0, w26
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6703,13 +6683,13 @@ MicronReadRetrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L960:
-	cbz	w23, .L951
+.L968:
+	cbz	w23, .L959
 	mov	w1, 0
 	mov	w0, w20
 	mov	w26, 256
 	bl	micron_auto_read_calibration_config
-	b	.L951
+	b	.L959
 	.size	MicronReadRetrial, .-MicronReadRetrial
 	.section	.text.HynixReadRetrial,"ax",@progbits
 	.align	2
@@ -6727,21 +6707,21 @@ HynixReadRetrial:
 	stp	x21, x22, [sp, 32]
 	mov	w22, w1
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR18
+	adrp	x25, .LANCHOR7
 	add	x1, x0, x28
 	mov	x20, x28
 	ldrb	w21, [x0, 2]
 	mov	x23, x2
-	ldr	x0, [x25, #:lo12:.LANCHOR18]
+	ldr	x0, [x25, #:lo12:.LANCHOR7]
 	mov	x24, x3
 	ldrb	w26, [x1, 12]
 	ldrb	w0, [x0, 19]
 	sub	w0, w0, #7
 	and	w0, w0, 255
 	cmp	w0, 1
-	bhi	.L977
+	bhi	.L985
 	ldrb	w26, [x1, 20]
-.L977:
+.L985:
 	mov	w0, w20
 	bl	NandcWaitFlashReady
 	add	x6, x19, :lo12:.LANCHOR20
@@ -6750,29 +6730,29 @@ HynixReadRetrial:
 	add	x5, x5, :lo12:.LANCHOR33
 	mov	w4, 0
 	mov	w27, -1
-.L978:
+.L986:
 	cmp	w4, w21
-	bcc	.L983
-.L982:
-	ldr	x0, [x25, #:lo12:.LANCHOR18]
+	bcc	.L991
+.L990:
+	ldr	x0, [x25, #:lo12:.LANCHOR7]
 	add	x19, x19, :lo12:.LANCHOR20
 	add	x19, x19, x28
 	ldrb	w0, [x0, 19]
 	sub	w0, w0, #7
 	and	w0, w0, 255
 	cmp	w0, 1
-	bhi	.L984
+	bhi	.L992
 	strb	w26, [x19, 20]
-.L985:
+.L993:
 	adrp	x0, .LANCHOR33
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w27, w0, lsr 2
-	bcc	.L976
+	bcc	.L984
 	cmn	w27, #1
 	mov	w0, 256
 	csel	w27, w27, w0, eq
-.L976:
+.L984:
 	mov	w0, w27
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6781,7 +6761,7 @@ HynixReadRetrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L983:
+.L991:
 	add	w26, w26, 1
 	ldrb	w1, [x6, 1]
 	and	w26, w26, 255
@@ -6803,25 +6783,188 @@ HynixReadRetrial:
 	ldr	w4, [x29, 108]
 	ldr	x5, [x29, 96]
 	ldp	x7, x6, [x29, 112]
-	beq	.L980
+	beq	.L988
 	ldrb	w1, [x5]
 	cmn	w27, #1
 	csel	w27, w27, w0, ne
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L987
+	bcc	.L995
 	mov	x24, 0
 	mov	x23, 0
-.L980:
+.L988:
 	add	w4, w4, 1
-	b	.L978
-.L987:
+	b	.L986
+.L995:
 	mov	w27, w0
-	b	.L982
-.L984:
+	b	.L990
+.L992:
 	strb	w26, [x19, 12]
-	b	.L985
+	b	.L993
 	.size	HynixReadRetrial, .-HynixReadRetrial
+	.section	.text.samsung_read_retrial,"ax",@progbits
+	.align	2
+	.type	samsung_read_retrial, %function
+samsung_read_retrial:
+	stp	x29, x30, [sp, -112]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	and	w22, w0, 255
+	stp	x23, x24, [sp, 48]
+	mov	w0, w22
+	stp	x19, x20, [sp, 16]
+	mov	x23, x2
+	stp	x25, x26, [sp, 64]
+	mov	x24, x3
+	mov	w25, w1
+	stp	x27, x28, [sp, 80]
+	bl	NandcWaitFlashReady
+	sbfiz	x1, x22, 4, 32
+	adrp	x0, .LANCHOR0
+	add	x0, x0, :lo12:.LANCHOR0
+	add	x2, x0, x1
+	ldr	x0, [x0, x1]
+	adrp	x1, .LANCHOR24
+	ldrb	w19, [x2, 8]
+	ldrb	w1, [x1, #:lo12:.LANCHOR24]
+	cbnz	w1, .L1003
+	adrp	x27, .LANCHOR150
+	adrp	x28, .LANCHOR33
+	add	x19, x0, x19, lsl 8
+	add	x27, x27, :lo12:.LANCHOR150
+	add	x28, x28, :lo12:.LANCHOR33
+	mov	x21, 0
+	mov	w20, -1
+	mov	w4, 239
+.L1007:
+	str	w4, [x19, 2056]
+	mov	w0, 141
+	str	w0, [x19, 2052]
+	add	x0, x27, x21
+	str	w4, [x29, 108]
+	mov	x3, x24
+	mov	x2, x23
+	mov	w1, w25
+	ldrsb	w0, [x0, 1]
+	add	w26, w21, 1
+	str	w0, [x19, 2048]
+	mov	w0, w22
+	str	wzr, [x19, 2048]
+	str	wzr, [x19, 2048]
+	str	wzr, [x19, 2048]
+	bl	FlashReadRawPage
+	cmn	w0, #1
+	ldr	w4, [x29, 108]
+	beq	.L1004
+	ldrb	w1, [x28]
+	cmn	w20, #1
+	csel	w20, w20, w0, ne
+	add	w1, w1, w1, lsl 1
+	cmp	w0, w1, lsr 2
+	bcc	.L1015
+	mov	x24, 0
+	mov	x23, 0
+.L1004:
+	add	x21, x21, 1
+	cmp	x21, 25
+	bne	.L1007
+	mov	w26, 26
+.L1006:
+	mov	w0, 239
+	str	w0, [x19, 2056]
+	mov	w0, 141
+.L1031:
+	str	w0, [x19, 2052]
+	adrp	x0, .LANCHOR33
+	str	wzr, [x19, 2048]
+	str	wzr, [x19, 2048]
+	str	wzr, [x19, 2048]
+	str	wzr, [x19, 2048]
+	ldrb	w0, [x0, #:lo12:.LANCHOR33]
+	add	w0, w0, w0, lsl 1
+	cmp	w20, w0, lsr 2
+	bcc	.L1013
+	cmn	w20, #1
+	mov	w0, 256
+	csel	w20, w20, w0, eq
+.L1013:
+	cmp	w20, 256
+	ccmn	w20, #1, 4, ne
+	bne	.L1014
+	adrp	x0, .LC14
+	mov	w4, w20
+	mov	w3, w26
+	mov	w2, w25
+	mov	w1, w26
+	add	x0, x0, :lo12:.LC14
+	bl	printf
+.L1014:
+	mov	w0, w22
+	bl	NandcWaitFlashReady
+	mov	w0, w20
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L1015:
+	mov	w20, w0
+	b	.L1006
+.L1003:
+	adrp	x21, .LANCHOR151
+	add	x21, x21, :lo12:.LANCHOR151
+	adrp	x27, .LANCHOR33
+	add	x21, x21, 4
+	add	x19, x0, x19, lsl 8
+	add	x27, x27, :lo12:.LANCHOR33
+	mov	w20, -1
+	mov	w26, 1
+	mov	w4, 239
+	mov	w28, 137
+.L1012:
+	str	w4, [x19, 2056]
+	mov	x3, x24
+	str	w28, [x19, 2052]
+	mov	x2, x23
+	str	w4, [x29, 108]
+	mov	w1, w25
+	ldrb	w0, [x21]
+	str	w0, [x19, 2048]
+	ldrb	w0, [x21, 1]
+	str	w0, [x19, 2048]
+	ldrb	w0, [x21, 2]
+	str	w0, [x19, 2048]
+	ldrb	w0, [x21, 3]
+	str	w0, [x19, 2048]
+	mov	w0, w22
+	bl	FlashReadRawPage
+	cmn	w0, #1
+	ldr	w4, [x29, 108]
+	beq	.L1009
+	ldrb	w1, [x27]
+	cmn	w20, #1
+	csel	w20, w20, w0, ne
+	add	w1, w1, w1, lsl 1
+	cmp	w0, w1, lsr 2
+	bcc	.L1016
+	mov	x24, 0
+	mov	x23, 0
+.L1009:
+	add	w26, w26, 1
+	add	x21, x21, 4
+	cmp	w26, 26
+	bne	.L1012
+.L1011:
+	mov	w0, 239
+	str	w0, [x19, 2056]
+	mov	w0, 137
+	b	.L1031
+.L1016:
+	mov	w20, w0
+	b	.L1011
+	.size	samsung_read_retrial, .-samsung_read_retrial
 	.section	.text.FlashProgPage,"ax",@progbits
 	.align	2
 	.global	FlashProgPage
@@ -6838,19 +6981,20 @@ FlashProgPage:
 	ldrb	w21, [x1, #:lo12:.LANCHOR31+9]
 	ands	w19, w0, 255
 	mov	x23, x3
-	bne	.L995
+	bne	.L1033
 	adrp	x0, .LANCHOR3
 	adrp	x1, .LANCHOR4
 	ldrb	w0, [x0, #:lo12:.LANCHOR3]
 	ldr	w1, [x1, #:lo12:.LANCHOR4]
 	mul	w0, w0, w1
 	cmp	w0, w20
-	bls	.L995
+	bls	.L1033
 	adrp	x0, .LANCHOR2
 	ldrb	w0, [x0, #:lo12:.LANCHOR2]
-	cbnz	w0, .L996
-	sub	w21, w21, #2
-.L995:
+	cmp	w0, 0
+	mov	w0, 4
+	csel	w21, w21, w0, eq
+.L1033:
 	mov	w0, w19
 	bl	NandcWaitFlashReady
 	mov	w0, w19
@@ -6881,47 +7025,253 @@ FlashProgPage:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L996:
-	mov	w21, 4
-	b	.L995
 	.size	FlashProgPage, .-FlashProgPage
-	.section	.text.FlashSavePhyInfo,"ax",@progbits
+	.section	.text.FlashPageProgMsbFFData,"ax",@progbits
 	.align	2
-	.global	FlashSavePhyInfo
-	.type	FlashSavePhyInfo, %function
-FlashSavePhyInfo:
+	.global	FlashPageProgMsbFFData
+	.type	FlashPageProgMsbFFData, %function
+FlashPageProgMsbFFData:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR147
+	stp	x23, x24, [sp, 48]
+	and	w23, w0, 255
+	adrp	x0, .LANCHOR16
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR146
-	ldr	x0, [x22, #:lo12:.LANCHOR147]
+	stp	x21, x22, [sp, 32]
+	and	w19, w2, 65535
+	ldrb	w0, [x0, #:lo12:.LANCHOR16]
+	str	x25, [sp, 64]
+	cbz	w0, .L1037
+	adrp	x0, .LANCHOR29
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	cbnz	w0, .L1036
+.L1037:
+	adrp	x2, .LANCHOR7
+	mov	x20, x2
+	ldr	x0, [x2, #:lo12:.LANCHOR7]
+	ldrb	w0, [x0, 19]
+	sub	w0, w0, #5
+	and	w3, w0, 255
+	cmp	w3, 63
+	bhi	.L1036
+	mov	x2, 16391
+	movk	x2, 0x4000, lsl 16
+	movk	x2, 0x2000, lsl 32
+	movk	x2, 0x8000, lsl 48
+	lsr	x0, x2, x3
+	tbz	x0, 0, .L1036
+	adrp	x21, .LANCHOR123
+	mov	w22, w1
+	add	x21, x21, :lo12:.LANCHOR123
+	mov	w25, 65535
+	adrp	x24, .LANCHOR152
+.L1039:
+	ldr	x0, [x20, #:lo12:.LANCHOR7]
+	ldrh	w0, [x0, 10]
+	cmp	w0, w19
+	bhi	.L1040
+.L1036:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L1040:
+	ldrh	w0, [x21, w19, sxtw 1]
+	cmp	w0, w25
+	bne	.L1036
+	ldr	x0, [x24, #:lo12:.LANCHOR152]
+	mov	w2, 32768
+	mov	w1, 255
+	bl	ftl_memset
+	ldr	x3, [x24, #:lo12:.LANCHOR152]
+	add	w1, w19, w22
+	add	w19, w19, 1
+	mov	w0, w23
+	mov	x2, x3
+	and	w19, w19, 65535
+	bl	FlashProgPage
+	b	.L1039
+	.size	FlashPageProgMsbFFData, .-FlashPageProgMsbFFData
+	.section	.text.FlashLoadPhyInfo,"ax",@progbits
+	.align	2
+	.global	FlashLoadPhyInfo
+	.type	FlashLoadPhyInfo, %function
+FlashLoadPhyInfo:
+	stp	x29, x30, [sp, -128]!
+	mov	w0, 60
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
 	adrp	x21, .LANCHOR4
-	str	x0, [x19, #:lo12:.LANCHOR146]
+	adrp	x22, .LANCHOR154
+	stp	x19, x20, [sp, 16]
+	strb	w0, [x29, 120]
+	mov	w0, 40
+	strb	w0, [x29, 121]
+	mov	w0, 24
+	strb	w0, [x29, 122]
+	mov	w0, 16
+	strb	w0, [x29, 123]
+	adrp	x20, .LANCHOR153
+	ldr	w0, [x21, #:lo12:.LANCHOR4]
+	mov	w19, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x24, .LANCHOR155
+	str	w0, [x29, 108]
+	mov	w23, -1
+	ldr	x0, [x22, #:lo12:.LANCHOR154]
+	stp	x25, x26, [sp, 64]
+	adrp	x25, .LANCHOR31
+	str	x0, [x20, #:lo12:.LANCHOR153]
+	mov	w26, 4
+	stp	x27, x28, [sp, 80]
+	add	x25, x25, :lo12:.LANCHOR31
+	str	wzr, [x24, #:lo12:.LANCHOR155]
+	mov	w0, 0
+	bl	flash_enter_slc_mode
+.L1046:
+	add	w28, w19, 1
+	mov	x27, 0
+.L1048:
+	add	x0, x29, 120
+	ldrb	w0, [x0, x27]
+	bl	FlashBchSel
+	ldr	x2, [x22, #:lo12:.LANCHOR154]
+	mov	x3, 0
+	mov	w1, w19
+	mov	w0, 0
+	bl	FlashReadRawPage
+	cmn	w0, #1
+	bne	.L1047
+	ldr	x2, [x22, #:lo12:.LANCHOR154]
+	mov	x3, 0
+	mov	w1, w28
+	mov	w0, 0
+	bl	FlashReadRawPage
+	cmn	w0, #1
+	bne	.L1047
+	add	x27, x27, 1
+	cmp	x27, 4
+	bne	.L1048
+.L1049:
+	ldr	w0, [x29, 108]
+	subs	w26, w26, #1
+	add	w19, w19, w0
+	bne	.L1046
+	b	.L1054
+.L1050:
+	mov	w1, 2036
+	add	x0, x6, 12
+	bl	js_hash
+	ldr	w1, [x6, 8]
+	cmp	w1, w0
+	bne	.L1056
+	add	x1, x6, 160
+	mov	w2, 32
+	mov	x0, x25
+	bl	ftl_memcpy
+	ldr	x1, [x20, #:lo12:.LANCHOR153]
+	mov	w2, 32
+	adrp	x0, .LANCHOR8
+	add	x0, x0, :lo12:.LANCHOR8
+	add	x1, x1, 192
+	bl	ftl_memcpy
+	ldr	x1, [x20, #:lo12:.LANCHOR153]
+	mov	w2, 852
+	adrp	x0, .LANCHOR20
+	add	x0, x0, :lo12:.LANCHOR20
+	add	x1, x1, 224
+	bl	ftl_memcpy
+	ldrh	w0, [x25, 10]
+	bl	FlashBlockAlignInit
+	str	w19, [x24, #:lo12:.LANCHOR155]
+	ldr	x1, [x20, #:lo12:.LANCHOR153]
+	adrp	x0, .LANCHOR30
+	ldr	w2, [x1, 1076]
+	strb	w2, [x0, #:lo12:.LANCHOR30]
+	ldr	w0, [x21, #:lo12:.LANCHOR4]
+	adrp	x2, .LANCHOR156
+	udiv	w0, w19, w0
+	add	w0, w0, 1
+	cmp	w0, 1
+	bls	.L1052
+.L1059:
+	str	w0, [x2, #:lo12:.LANCHOR156]
+	adrp	x0, .LANCHOR157
+	ldrh	w1, [x1, 14]
+	mov	w23, 0
+	strb	w1, [x0, #:lo12:.LANCHOR157]
+	b	.L1049
+.L1052:
+	mov	w0, 2
+	b	.L1059
+.L1056:
+	mov	w23, -1
+	b	.L1049
+.L1047:
+	ldr	x6, [x20, #:lo12:.LANCHOR153]
+	mov	w1, 20036
+	movk	w1, 0x4e41, lsl 16
+	ldr	w0, [x6]
+	cmp	w0, w1
+	bne	.L1049
+	cbnz	w23, .L1050
+	ldr	w0, [x21, #:lo12:.LANCHOR4]
+	udiv	w19, w19, w0
+	adrp	x0, .LANCHOR156
+	add	w19, w19, 1
+	str	w19, [x0, #:lo12:.LANCHOR156]
+.L1054:
+	mov	w0, 0
+	bl	flash_exit_slc_mode
+	mov	w0, w23
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+	.size	FlashLoadPhyInfo, .-FlashLoadPhyInfo
+	.section	.text.FlashSavePhyInfo,"ax",@progbits
+	.align	2
+	.global	FlashSavePhyInfo
+	.type	FlashSavePhyInfo, %function
+FlashSavePhyInfo:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR154
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR153
+	ldr	x0, [x21, #:lo12:.LANCHOR154]
+	mov	w22, 0
+	str	x0, [x19, #:lo12:.LANCHOR153]
 	mov	w20, 0
-	adrp	x0, .LANCHOR152
+	adrp	x0, .LANCHOR158
 	stp	x23, x24, [sp, 48]
+	stp	x27, x28, [sp, 80]
+	adrp	x24, .LANCHOR152
+	ldrb	w0, [x0, #:lo12:.LANCHOR158]
+	adrp	x23, .LANCHOR4
 	stp	x25, x26, [sp, 64]
 	mov	w25, 20036
-	ldrb	w0, [x0, #:lo12:.LANCHOR152]
 	movk	w25, 0x4e41, lsl 16
-	adrp	x24, .LANCHOR153
-	adrp	x26, .LANCHOR149
-	mov	w23, 0
-	add	x21, x21, :lo12:.LANCHOR4
-	add	x26, x26, :lo12:.LANCHOR149
+	adrp	x27, .LANCHOR16
+	add	x28, x23, :lo12:.LANCHOR4
+	add	x27, x27, :lo12:.LANCHOR16
 	bl	FlashBchSel
-	ldr	x0, [x22, #:lo12:.LANCHOR147]
+	ldr	x0, [x21, #:lo12:.LANCHOR154]
 	mov	w2, 2048
 	mov	w1, 0
 	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR146]
-	adrp	x1, .LANCHOR25
+	ldr	x0, [x19, #:lo12:.LANCHOR153]
+	adrp	x1, .LANCHOR26
 	mov	w2, 32
 	add	x0, x0, 16
 	str	w25, [x0, -16]
-	ldrb	w1, [x1, #:lo12:.LANCHOR25]
+	ldrb	w1, [x1, #:lo12:.LANCHOR26]
 	strh	w1, [x0, -4]
 	adrp	x1, .LANCHOR3
 	ldrb	w1, [x1, #:lo12:.LANCHOR3]
@@ -6932,111 +7282,129 @@ FlashSavePhyInfo:
 	adrp	x1, .LANCHOR22
 	add	x1, x1, :lo12:.LANCHOR22
 	bl	ftl_memcpy
-	ldr	x0, [x19, #:lo12:.LANCHOR146]
+	ldr	x0, [x19, #:lo12:.LANCHOR153]
 	mov	w2, 8
-	adrp	x1, .LANCHOR26
-	add	x1, x1, :lo12:.LANCHOR26
+	adrp	x1, .LANCHOR27
+	add	x1, x1, :lo12:.LANCHOR27
 	add	x0, x0, 80
 	bl	ftl_memcpy
-	ldr	x0, [x19, #:lo12:.LANCHOR146]
+	ldr	x0, [x19, #:lo12:.LANCHOR153]
 	mov	w2, 32
-	adrp	x1, .LANCHOR17
-	add	x1, x1, :lo12:.LANCHOR17
+	adrp	x1, .LANCHOR18
+	add	x1, x1, :lo12:.LANCHOR18
 	add	x0, x0, 96
 	bl	ftl_memcpy
-	ldr	x0, [x19, #:lo12:.LANCHOR146]
+	ldr	x0, [x19, #:lo12:.LANCHOR153]
 	mov	w2, 32
 	adrp	x1, .LANCHOR31
 	add	x1, x1, :lo12:.LANCHOR31
 	add	x0, x0, 160
 	bl	ftl_memcpy
-	ldr	x0, [x19, #:lo12:.LANCHOR146]
+	ldr	x0, [x19, #:lo12:.LANCHOR153]
 	mov	w2, 32
-	adrp	x1, .LANCHOR7
-	add	x1, x1, :lo12:.LANCHOR7
+	adrp	x1, .LANCHOR8
+	add	x1, x1, :lo12:.LANCHOR8
 	add	x0, x0, 192
 	bl	ftl_memcpy
-	ldr	x0, [x19, #:lo12:.LANCHOR146]
+	ldr	x0, [x19, #:lo12:.LANCHOR153]
 	mov	w2, 852
 	adrp	x1, .LANCHOR20
 	add	x1, x1, :lo12:.LANCHOR20
 	add	x0, x0, 224
 	bl	ftl_memcpy
-	ldr	x6, [x19, #:lo12:.LANCHOR146]
+	ldr	x6, [x19, #:lo12:.LANCHOR153]
 	mov	w1, 2036
 	add	x0, x6, 12
 	bl	js_hash
 	str	w0, [x6, 8]
 	mov	w0, 1592
 	str	w0, [x6, 4]
-	ldr	x0, [x24, #:lo12:.LANCHOR153]
-	str	x0, [x19, #:lo12:.LANCHOR146]
+	ldr	x0, [x24, #:lo12:.LANCHOR152]
+	str	x0, [x19, #:lo12:.LANCHOR153]
 	mov	w0, 0
 	bl	flash_enter_slc_mode
-.L1001:
-	ldr	w1, [x21]
+.L1066:
+	ldr	w1, [x23, #:lo12:.LANCHOR4]
 	mov	w2, 0
 	mov	w0, 0
 	mul	w1, w20, w1
 	bl	FlashEraseBlock
-	ldr	w1, [x21]
-	mov	x3, 0
-	ldr	x2, [x22, #:lo12:.LANCHOR147]
-	mov	w0, 0
-	mul	w1, w20, w1
-	bl	FlashProgPage
-	ldr	w1, [x21]
+	ldrb	w0, [x27]
+	cbz	w0, .L1061
+	mov	w26, 0
+.L1062:
+	ldr	w1, [x28]
 	mov	x3, 0
-	ldr	x2, [x22, #:lo12:.LANCHOR147]
+	ldr	x2, [x21, #:lo12:.LANCHOR154]
 	mov	w0, 0
-	mul	w1, w20, w1
-	add	w1, w1, 1
+	madd	w1, w20, w1, w26
+	add	w26, w26, 1
 	bl	FlashProgPage
-	ldr	w1, [x21]
+	cmp	w26, 10
+	bne	.L1062
+.L1063:
+	ldr	w1, [x28]
 	mov	x3, 0
-	ldr	x2, [x24, #:lo12:.LANCHOR153]
+	ldr	x2, [x24, #:lo12:.LANCHOR152]
 	mov	w0, 0
 	mul	w1, w20, w1
 	bl	FlashReadRawPage
 	cmn	w0, #1
 	add	w7, w20, 1
-	beq	.L999
-	ldr	x6, [x19, #:lo12:.LANCHOR146]
+	beq	.L1064
+	ldr	x6, [x19, #:lo12:.LANCHOR153]
 	ldr	w0, [x6]
 	cmp	w0, w25
-	bne	.L999
+	bne	.L1064
 	mov	w1, 2036
 	add	x0, x6, 12
 	bl	js_hash
 	ldr	w1, [x6, 8]
 	cmp	w1, w0
-	bne	.L999
-	ldr	w0, [x21]
-	cmp	w23, 1
-	str	w7, [x26]
+	bne	.L1064
+	adrp	x0, .LANCHOR156
+	cmp	w22, 1
+	str	w7, [x0, #:lo12:.LANCHOR156]
+	ldr	w0, [x28]
 	mul	w20, w0, w20
-	adrp	x0, .LANCHOR148
-	str	w20, [x0, #:lo12:.LANCHOR148]
-	beq	.L1002
-	mov	w23, 1
-.L999:
+	adrp	x0, .LANCHOR155
+	str	w20, [x0, #:lo12:.LANCHOR155]
+	beq	.L1067
+	mov	w22, 1
+.L1064:
 	mov	w20, w7
 	cmp	w7, 4
-	bne	.L1001
-.L1000:
+	bne	.L1066
+.L1065:
 	mov	w0, 0
 	bl	flash_exit_slc_mode
-	cmp	w23, 0
+	cmp	w22, 0
 	csetm	w0, eq
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
 	ret
-.L1002:
-	mov	w23, 2
-	b	.L1000
+.L1061:
+	ldr	w1, [x23, #:lo12:.LANCHOR4]
+	mov	x3, 0
+	ldr	x2, [x21, #:lo12:.LANCHOR154]
+	mov	w0, 0
+	mul	w1, w20, w1
+	bl	FlashProgPage
+	ldr	w1, [x23, #:lo12:.LANCHOR4]
+	mov	x3, 0
+	ldr	x2, [x21, #:lo12:.LANCHOR154]
+	mov	w0, 0
+	mul	w1, w20, w1
+	add	w1, w1, 1
+	bl	FlashProgPage
+	b	.L1063
+.L1067:
+	mov	w22, 2
+	b	.L1065
 	.size	FlashSavePhyInfo, .-FlashSavePhyInfo
 	.section	.text.FlashReadIdbDataRaw,"ax",@progbits
 	.align	2
@@ -7064,10 +7432,10 @@ FlashReadIdbDataRaw:
 	ldr	w1, [x0, #:lo12:.LANCHOR29]
 	stp	x27, x28, [sp, 80]
 	str	x0, [x29, 120]
-	cbz	w1, .L1009
+	cbz	w1, .L1075
 	mov	w0, 0
 	bl	flash_enter_slc_mode
-.L1009:
+.L1075:
 	adrp	x24, .LANCHOR3
 	adrp	x22, .LANCHOR4
 	add	x27, x29, 136
@@ -7079,19 +7447,19 @@ FlashReadIdbDataRaw:
 	mov	w1, 0
 	mov	x0, x23
 	bl	ftl_memset
-.L1010:
+.L1076:
 	ldrb	w0, [x24, #:lo12:.LANCHOR3]
 	cmp	w19, w0
-	bcc	.L1015
-.L1014:
+	bcc	.L1081
+.L1080:
 	mov	w0, w26
 	bl	FlashBchSel
 	ldr	x0, [x29, 120]
 	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	cbz	w0, .L1008
+	cbz	w0, .L1074
 	mov	w0, 0
 	bl	flash_exit_slc_mode
-.L1008:
+.L1074:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -7100,45 +7468,45 @@ FlashReadIdbDataRaw:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1015:
+.L1081:
 	mov	x4, 0
-	adrp	x25, .LANCHOR147
-.L1012:
+	adrp	x25, .LANCHOR154
+.L1078:
 	ldrb	w5, [x4, x27]
-	add	x21, x25, :lo12:.LANCHOR147
+	add	x21, x25, :lo12:.LANCHOR154
 	str	w5, [x29, 116]
 	mov	w0, w5
 	str	x4, [x29, 104]
 	bl	FlashBchSel
 	ldr	w1, [x22]
 	mov	x3, 0
-	ldr	x2, [x25, #:lo12:.LANCHOR147]
+	ldr	x2, [x25, #:lo12:.LANCHOR154]
 	mov	w0, 0
 	mul	w1, w19, w1
 	bl	FlashReadRawPage
 	cmn	w0, #1
 	ldr	w5, [x29, 116]
-	bne	.L1011
+	bne	.L1077
 	ldr	x4, [x29, 104]
 	add	x4, x4, 1
 	cmp	x4, 4
-	bne	.L1012
-.L1013:
+	bne	.L1078
+.L1079:
 	add	w19, w19, 1
-	b	.L1010
-.L1018:
+	b	.L1076
+.L1084:
 	mov	w20, 0
-	b	.L1014
-.L1011:
+	b	.L1080
+.L1077:
 	ldr	x0, [x21]
 	ldr	w1, [x0]
 	mov	w0, 35899
 	movk	w0, 0xfcdc, lsl 16
 	cmp	w1, w0
-	bne	.L1013
+	bne	.L1079
 	mov	w1, w5
-	adrp	x0, .LC14
-	add	x0, x0, :lo12:.LC14
+	adrp	x0, .LC15
+	add	x0, x0, :lo12:.LC15
 	bl	printf
 	ldr	x1, [x21]
 	mov	w2, 2048
@@ -7147,113 +7515,40 @@ FlashReadIdbDataRaw:
 	ldr	x0, [x21]
 	ldr	w0, [x0, 512]
 	strb	w0, [x28]
-	adrp	x0, .LANCHOR149
-	ldr	w1, [x0, #:lo12:.LANCHOR149]
+	adrp	x0, .LANCHOR156
+	ldr	w1, [x0, #:lo12:.LANCHOR156]
 	cmp	w19, w1
-	bcs	.L1018
-	str	w19, [x0, #:lo12:.LANCHOR149]
+	bcs	.L1084
+	str	w19, [x0, #:lo12:.LANCHOR156]
 	mov	w20, 0
 	bl	FlashSavePhyInfo
-	b	.L1013
+	b	.L1079
 	.size	FlashReadIdbDataRaw, .-FlashReadIdbDataRaw
-	.section	.text.FlashPageProgMsbFFData,"ax",@progbits
+	.section	.text.idb_write_data,"ax",@progbits
 	.align	2
-	.global	FlashPageProgMsbFFData
-	.type	FlashPageProgMsbFFData, %function
-FlashPageProgMsbFFData:
-	stp	x29, x30, [sp, -80]!
+	.global	idb_write_data
+	.type	idb_write_data, %function
+idb_write_data:
+	stp	x29, x30, [sp, -240]!
+	add	w0, w1, w3
+	mov	w4, w1
+	cmp	w0, 63
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	and	w24, w0, 255
-	adrp	x0, .LANCHOR15
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	and	w19, w2, 65535
-	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	stp	x25, x26, [sp, 64]
-	cbz	w0, .L1028
-	adrp	x0, .LANCHOR29
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	cbnz	w0, .L1027
-.L1028:
-	adrp	x2, .LANCHOR18
-	mov	x25, x2
-	ldr	x0, [x2, #:lo12:.LANCHOR18]
-	ldrb	w23, [x0, 19]
-	sub	w0, w23, #5
-	and	w3, w0, 255
-	cmp	w3, 63
-	bhi	.L1027
-	mov	x2, 16399
-	movk	x2, 0x4000, lsl 16
-	movk	x2, 0x8000, lsl 48
-	lsr	x0, x2, x3
-	tbz	x0, 0, .L1027
-	adrp	x20, .LANCHOR120
-	mov	w22, w1
-	add	x20, x20, :lo12:.LANCHOR120
-	mov	w26, 65535
-	adrp	x21, .LANCHOR153
-.L1030:
-	ldr	x0, [x25, #:lo12:.LANCHOR18]
-	ldrh	w0, [x0, 10]
-	cmp	w0, w19
-	bhi	.L1033
-.L1027:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
-	ret
-.L1033:
-	ldrh	w0, [x20, w19, sxtw 1]
-	cmp	w0, w26
-	bne	.L1027
-	mov	w2, 32768
-	cmp	w23, 8
-	bne	.L1031
-	mov	w1, 0
-.L1038:
-	ldr	x0, [x21, #:lo12:.LANCHOR153]
-	bl	ftl_memset
-	ldr	x3, [x21, #:lo12:.LANCHOR153]
-	add	w1, w19, w22
-	add	w19, w19, 1
-	mov	w0, w24
-	mov	x2, x3
-	and	w19, w19, 65535
-	bl	FlashProgPage
-	b	.L1030
-.L1031:
-	mov	w1, 255
-	b	.L1038
-	.size	FlashPageProgMsbFFData, .-FlashPageProgMsbFFData
-	.section	.text.idb_write_data,"ax",@progbits
-	.align	2
-	.global	idb_write_data
-	.type	idb_write_data, %function
-idb_write_data:
-	stp	x29, x30, [sp, -240]!
-	add	w0, w1, w3
-	mov	w4, w1
-	cmp	w0, 63
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	stp	x21, x22, [sp, 32]
-	stp	x23, x24, [sp, 48]
+	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	bls	.L1040
+	bls	.L1094
 	cmp	w1, 575
-	bhi	.L1041
-	adrp	x0, .LANCHOR154
+	bhi	.L1095
+	adrp	x0, .LANCHOR159
 	mov	x1, x2
 	mov	w2, 1
 	cmp	w4, 64
-	str	w2, [x0, #:lo12:.LANCHOR154]
+	str	w2, [x0, #:lo12:.LANCHOR159]
 	adrp	x0, idb_buf
-	bhi	.L1042
+	bhi	.L1096
 	mov	w2, 64
 	sub	w4, w2, w4
 	sub	w2, w3, w4
@@ -7261,9 +7556,9 @@ idb_write_data:
 	lsl	w2, w2, 9
 	add	x1, x1, x4
 	add	x0, x0, :lo12:idb_buf
-.L1092:
+.L1146:
 	bl	ftl_memcpy
-.L1075:
+.L1129:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -7272,7 +7567,7 @@ idb_write_data:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 240
 	ret
-.L1042:
+.L1096:
 	mov	w2, 576
 	sub	w2, w2, w4
 	cmp	w3, w2
@@ -7282,20 +7577,20 @@ idb_write_data:
 	add	x0, x0, :lo12:idb_buf
 	lsl	w2, w2, 9
 	add	x0, x0, x4
-	b	.L1092
-.L1040:
+	b	.L1146
+.L1094:
 	cmp	w1, 575
-	bls	.L1075
-.L1041:
-	adrp	x0, .LANCHOR154
+	bls	.L1129
+.L1095:
+	adrp	x0, .LANCHOR159
 	str	x0, [x29, 104]
-	ldr	w1, [x0, #:lo12:.LANCHOR154]
-	cbz	w1, .L1075
-	adrp	x21, .LANCHOR18
+	ldr	w1, [x0, #:lo12:.LANCHOR159]
+	cbz	w1, .L1129
+	adrp	x21, .LANCHOR7
 	adrp	x1, idb_buf+262140
 	adrp	x25, idb_buf
 	add	x1, x1, :lo12:idb_buf+262140
-	ldr	x0, [x21, #:lo12:.LANCHOR18]
+	ldr	x0, [x21, #:lo12:.LANCHOR7]
 	add	x5, x25, :lo12:idb_buf
 	mov	w2, 65535
 	mov	w3, 4097
@@ -7307,9 +7602,9 @@ idb_write_data:
 	udiv	w0, w0, w20
 	str	w0, [x29, 172]
 	mov	w0, 0
-.L1046:
+.L1100:
 	ldr	w4, [x1]
-	cbnz	w4, .L1044
+	cbnz	w4, .L1098
 	ldr	w4, [x5, w0, uxtw 2]
 	add	w0, w0, 1
 	str	w4, [x1], -4
@@ -7317,73 +7612,73 @@ idb_write_data:
 	sub	w2, w2, #1
 	csel	w0, w0, wzr, cc
 	cmp	w2, 4096
-	bne	.L1046
-.L1044:
+	bne	.L1100
+.L1098:
 	add	x0, x25, :lo12:idb_buf
 	mov	w3, 512
 	mov	w23, 0
 	ldr	w1, [x0, w2, uxtw 2]
-	adrp	x0, .LC15
-	add	x0, x0, :lo12:.LC15
+	adrp	x0, .LC16
+	add	x0, x0, :lo12:.LC16
 	bl	printf
-	adrp	x0, .LANCHOR149
-	ldr	w24, [x0, #:lo12:.LANCHOR149]
+	adrp	x0, .LANCHOR156
+	ldr	w24, [x0, #:lo12:.LANCHOR156]
 	ldr	w0, [x29, 172]
 	mul	w19, w20, w24
 	mul	w0, w20, w0
 	str	w0, [x29, 136]
-	adrp	x0, .LANCHOR16
-	add	x0, x0, :lo12:.LANCHOR16
+	adrp	x0, .LANCHOR17
+	add	x0, x0, :lo12:.LANCHOR17
 	str	x0, [x29, 160]
-.L1047:
+.L1101:
 	cmp	w24, 15
-	bls	.L1065
-	cbnz	w23, .L1067
-	adrp	x0, .LC17
+	bls	.L1119
+	cbnz	w23, .L1121
+	adrp	x0, .LC18
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC17
+	add	x0, x0, :lo12:.LC18
 	bl	printf
-.L1067:
+.L1121:
 	ldr	x0, [x29, 104]
-	str	wzr, [x0, #:lo12:.LANCHOR154]
-	b	.L1075
-.L1065:
+	str	wzr, [x0, #:lo12:.LANCHOR159]
+	b	.L1129
+.L1119:
 	adrp	x27, gp_flash_check_buf
 	mov	x2, 512
 	mov	w1, 0
 	add	x0, x27, :lo12:gp_flash_check_buf
 	bl	memset
-	ldr	x0, [x21, #:lo12:.LANCHOR18]
+	ldr	x0, [x21, #:lo12:.LANCHOR7]
 	ldrb	w22, [x0, 9]
 	ldrh	w26, [x0, 10]
 	mov	w0, w19
-	bl	FW_FlashBlockErase.constprop.41
+	bl	FW_FlashBlockErase.constprop.42
 	str	x27, [x29, 128]
 	mul	w26, w22, w26
 	and	w26, w26, 65535
 	cmp	w26, 511
-	bhi	.L1048
+	bhi	.L1102
 	add	w0, w26, w19
-	bl	FW_FlashBlockErase.constprop.41
-.L1048:
+	bl	FW_FlashBlockErase.constprop.42
+.L1102:
 	udiv	w4, w19, w26
-	adrp	x5, .LANCHOR15
-	add	x5, x5, :lo12:.LANCHOR15
+	adrp	x5, .LANCHOR16
+	add	x5, x5, :lo12:.LANCHOR16
 	mov	x28, 0
 	msub	w4, w4, w26, w19
 	sub	w26, w19, w4
-.L1049:
+.L1103:
 	add	x2, x25, :lo12:idb_buf
 	cmp	x28, 128
 	add	x2, x2, x28, lsl 11
-	bne	.L1053
-	ldr	x0, [x21, #:lo12:.LANCHOR18]
+	bne	.L1107
+	ldr	x0, [x21, #:lo12:.LANCHOR7]
 	mov	w26, 0
 	ldr	x1, [x29, 128]
 	add	x27, x1, :lo12:gp_flash_check_buf
-	adrp	x1, .LANCHOR15
+	adrp	x1, .LANCHOR16
 	ldrb	w28, [x0, 9]
-	add	x1, x1, :lo12:.LANCHOR15
+	add	x1, x1, :lo12:.LANCHOR16
 	ldrh	w22, [x0, 10]
 	str	x1, [x29, 96]
 	mul	w22, w28, w22
@@ -7394,9 +7689,9 @@ idb_write_data:
 	str	w0, [x29, 120]
 	mul	w0, w22, w28
 	ubfx	x0, x0, 2, 2
-.L1054:
+.L1108:
 	cmp	w26, 511
-	bhi	.L1061
+	bhi	.L1115
 	ldr	x3, [x29, 96]
 	mov	w1, 4
 	sub	w1, w1, w0
@@ -7407,14 +7702,14 @@ idb_write_data:
 	ldrb	w3, [x3]
 	lsr	w1, w1, 2
 	ldrh	w2, [x2, w1, sxtw 1]
-	cbz	w3, .L1055
-	adrp	x3, .LANCHOR119
+	cbz	w3, .L1109
+	adrp	x3, .LANCHOR122
 	mov	w4, 12336
 	movk	w4, 0x5638, lsl 16
-	ldr	w3, [x3, #:lo12:.LANCHOR119]
+	ldr	w3, [x3, #:lo12:.LANCHOR122]
 	cmp	w3, w4
 	csel	w2, w2, w1, ne
-.L1055:
+.L1109:
 	ldr	w1, [x29, 120]
 	add	w0, w0, w1
 	adrp	x1, .LANCHOR4
@@ -7424,21 +7719,21 @@ idb_write_data:
 	adrp	x0, .LANCHOR33
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	str	w0, [x29, 112]
-	ldr	x0, [x21, #:lo12:.LANCHOR18]
+	ldr	x0, [x21, #:lo12:.LANCHOR7]
 	ldrb	w0, [x0, 9]
 	str	w0, [x29, 140]
-	adrp	x0, .LANCHOR14+26
-	ldrh	w0, [x0, #:lo12:.LANCHOR14+26]
+	adrp	x0, .LANCHOR15+26
+	ldrh	w0, [x0, #:lo12:.LANCHOR15+26]
 	mul	w0, w0, w1
 	ldr	w1, [x29, 140]
 	mul	w0, w0, w1
 	ldr	w1, [x29, 168]
 	cmp	w1, w0
-	bcs	.L1056
-	adrp	x0, .LANCHOR152
-	ldrb	w0, [x0, #:lo12:.LANCHOR152]
+	bcs	.L1110
+	adrp	x0, .LANCHOR158
+	ldrb	w0, [x0, #:lo12:.LANCHOR158]
 	bl	FlashBchSel
-.L1056:
+.L1110:
 	mov	w0, 0
 	bl	flash_boot_enter_slc_mode
 	ldr	w0, [x29, 168]
@@ -7451,11 +7746,11 @@ idb_write_data:
 	bl	FlashReadPage
 	mov	w1, w0
 	cmn	w0, #1
-	bne	.L1057
-	adrp	x0, .LANCHOR152
-	ldrb	w0, [x0, #:lo12:.LANCHOR152]
+	bne	.L1111
+	adrp	x0, .LANCHOR158
+	ldrb	w0, [x0, #:lo12:.LANCHOR158]
 	cmp	w0, 40
-	beq	.L1057
+	beq	.L1111
 	mov	w0, 40
 	bl	FlashBchSel
 	ldr	w1, [x29, 168]
@@ -7464,7 +7759,7 @@ idb_write_data:
 	mov	w0, 0
 	bl	FlashReadPage
 	mov	w1, w0
-.L1057:
+.L1111:
 	str	w1, [x29, 168]
 	mov	w0, 0
 	bl	flash_boot_exit_slc_mode
@@ -7472,20 +7767,20 @@ idb_write_data:
 	bl	FlashBchSel
 	ldr	w1, [x29, 168]
 	cmn	w1, #1
-	bne	.L1058
-.L1061:
+	bne	.L1112
+.L1115:
 	ldr	x0, [x29, 128]
 	add	x1, x25, :lo12:idb_buf
 	mov	x22, 0
 	add	x26, x0, :lo12:gp_flash_check_buf
-.L1059:
+.L1113:
 	lsl	x0, x22, 2
 	mov	w27, w22
 	add	x28, x0, x1
 	ldr	w2, [x0, x26]
 	ldr	w0, [x0, x1]
 	cmp	w2, w0
-	beq	.L1062
+	beq	.L1116
 	mov	x2, 512
 	mov	w1, 0
 	mov	x0, x26
@@ -7494,68 +7789,68 @@ idb_write_data:
 	mov	w4, w22
 	ldr	w3, [x28]
 	mov	w1, w19
-	adrp	x0, .LC16
-	add	x0, x0, :lo12:.LC16
+	adrp	x0, .LC17
+	add	x0, x0, :lo12:.LC17
 	bl	printf
 	mov	w0, w19
-	bl	FW_FlashBlockErase.constprop.41
+	bl	FW_FlashBlockErase.constprop.42
 	ldr	w0, [x29, 172]
 	cmp	w0, 1
-	bls	.L1063
+	bls	.L1117
 	add	w0, w20, w19
-	bl	FW_FlashBlockErase.constprop.41
-.L1063:
+	bl	FW_FlashBlockErase.constprop.42
+.L1117:
 	ldr	w0, [x29, 172]
 	add	w24, w24, w0
 	ldr	w0, [x29, 136]
 	add	w19, w19, w0
-	b	.L1047
-.L1053:
+	b	.L1101
+.L1107:
 	add	w1, w4, w28, lsl 2
 	lsr	w1, w1, 2
-	cbz	w1, .L1050
+	cbz	w1, .L1104
 	ldr	x0, [x29, 160]
 	add	w3, w1, 1
 	ldrb	w6, [x5]
 	ldrh	w0, [x0, w3, sxtw 1]
-	cbz	w6, .L1051
-	adrp	x6, .LANCHOR119
+	cbz	w6, .L1105
+	adrp	x6, .LANCHOR122
 	mov	w7, 12336
 	movk	w7, 0x5638, lsl 16
-	ldr	w6, [x6, #:lo12:.LANCHOR119]
+	ldr	w6, [x6, #:lo12:.LANCHOR122]
 	cmp	w6, w7
 	csel	w0, w0, w3, ne
-.L1051:
+.L1105:
 	lsl	w0, w0, 2
 	sub	w0, w0, #4
 	str	w0, [x29, 176]
-.L1050:
+.L1104:
 	mov	w0, 61424
 	str	w0, [x29, 180]
 	ldr	x0, [x29, 160]
 	ldrh	w27, [x0, w1, sxtw 1]
 	ldrb	w0, [x5]
-	cbz	w0, .L1052
-	adrp	x0, .LANCHOR119
+	cbz	w0, .L1106
+	adrp	x0, .LANCHOR122
 	mov	w3, 12336
 	movk	w3, 0x5638, lsl 16
-	ldr	w0, [x0, #:lo12:.LANCHOR119]
+	ldr	w0, [x0, #:lo12:.LANCHOR122]
 	cmp	w0, w3
 	csel	w27, w27, w1, ne
-.L1052:
+.L1106:
 	adrp	x0, .LANCHOR33
 	madd	w1, w22, w27, w26
 	stp	x5, x2, [x29, 112]
 	add	x28, x28, 1
 	ldrb	w6, [x0, #:lo12:.LANCHOR33]
-	adrp	x0, .LANCHOR152
+	adrp	x0, .LANCHOR158
 	stp	w4, w6, [x29, 140]
-	ldrb	w0, [x0, #:lo12:.LANCHOR152]
+	ldrb	w0, [x0, #:lo12:.LANCHOR158]
 	str	w1, [x29, 168]
 	bl	FlashBchSel
 	mov	w0, 0
 	bl	flash_boot_enter_slc_mode
-	ldr	x0, [x21, #:lo12:.LANCHOR18]
+	ldr	x0, [x21, #:lo12:.LANCHOR7]
 	add	x3, x29, 176
 	ldr	w1, [x29, 168]
 	ldr	x2, [x29, 120]
@@ -7574,8 +7869,8 @@ idb_write_data:
 	bl	FlashPageProgMsbFFData
 	ldr	w4, [x29, 140]
 	ldr	x5, [x29, 112]
-	b	.L1049
-.L1058:
+	b	.L1103
+.L1112:
 	ldr	x0, [x29, 144]
 	ubfiz	x0, x0, 9, 16
 	add	x27, x27, x0
@@ -7583,16 +7878,32 @@ idb_write_data:
 	add	w26, w0, w26
 	mov	w0, 0
 	and	w26, w26, 65535
-	b	.L1054
-.L1062:
+	b	.L1108
+.L1116:
 	add	x22, x22, 1
 	cmp	x22, 65536
-	bne	.L1059
+	bne	.L1113
 	add	w23, w23, 1
 	cmp	w23, 5
-	bls	.L1063
-	b	.L1067
+	bls	.L1117
+	b	.L1121
 	.size	idb_write_data, .-idb_write_data
+	.section	.text.ftl_memcpy32,"ax",@progbits
+	.align	2
+	.global	ftl_memcpy32
+	.type	ftl_memcpy32, %function
+ftl_memcpy32:
+	mov	x3, 0
+.L1148:
+	cmp	w2, w3
+	bhi	.L1149
+	ret
+.L1149:
+	ldr	w4, [x1, x3, lsl 2]
+	str	w4, [x0, x3, lsl 2]
+	add	x3, x3, 1
+	b	.L1148
+	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.ftl_memcmp,"ax",@progbits
 	.align	2
 	.global	ftl_memcmp
@@ -7627,7 +7938,7 @@ NandcInit:
 	stp	x29, x30, [sp, -16]!
 	adrp	x2, .LANCHOR0
 	add	x1, x2, :lo12:.LANCHOR0
-	adrp	x4, .LANCHOR119
+	adrp	x4, .LANCHOR122
 	add	x29, sp, 0
 	str	x0, [x2, #:lo12:.LANCHOR0]
 	mov	w2, 1
@@ -7638,14 +7949,14 @@ NandcInit:
 	mov	w2, 3
 	str	x0, [x1, 16]
 	str	w2, [x1, 56]
-	adrp	x2, .LANCHOR155
+	adrp	x2, .LANCHOR160
 	str	x0, [x1, 32]
 	str	x0, [x1, 48]
 	adrp	x1, .LANCHOR19
 	str	x0, [x1, #:lo12:.LANCHOR19]
 	ldr	w1, [x0]
 	ubfx	x3, x1, 13, 1
-	str	w3, [x2, #:lo12:.LANCHOR155]
+	str	w3, [x2, #:lo12:.LANCHOR160]
 	ldr	w2, [x0, 352]
 	adrp	x3, .LANCHOR34
 	and	w1, w1, 245760
@@ -7653,12 +7964,12 @@ NandcInit:
 	ubfx	x2, x2, 16, 4
 	str	w2, [x3, #:lo12:.LANCHOR34]
 	ldr	w2, [x0, 352]
-	str	w2, [x4, #:lo12:.LANCHOR119]
+	str	w2, [x4, #:lo12:.LANCHOR122]
 	cmp	w2, 2049
-	bne	.L1097
+	bne	.L1154
 	mov	w2, 8
 	str	w2, [x3, #:lo12:.LANCHOR34]
-.L1097:
+.L1154:
 	str	w1, [x0]
 	mov	w1, 4225
 	str	wzr, [x0, 336]
@@ -7670,9 +7981,9 @@ NandcInit:
 	str	w1, [x0, 304]
 	mov	w0, 36864
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR156
+	adrp	x1, .LANCHOR161
 	adrp	x2, .LANCHOR35
-	str	x0, [x1, #:lo12:.LANCHOR156]
+	str	x0, [x1, #:lo12:.LANCHOR161]
 	add	x1, x2, :lo12:.LANCHOR35
 	str	x0, [x2, #:lo12:.LANCHOR35]
 	add	x0, x0, 32768
@@ -7689,32 +8000,20 @@ NandcInit:
 	.type	FtlMemInit, %function
 FtlMemInit:
 	stp	x29, x30, [sp, -64]!
-	adrp	x0, .LANCHOR139
+	adrp	x0, .LANCHOR142
 	mov	w1, 65535
 	add	x29, sp, 0
-	strh	wzr, [x0, #:lo12:.LANCHOR139]
-	adrp	x0, .LANCHOR157
-	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR54
-	str	wzr, [x0, #:lo12:.LANCHOR157]
-	adrp	x0, .LANCHOR158
-	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR38
-	str	wzr, [x0, #:lo12:.LANCHOR158]
-	adrp	x0, .LANCHOR159
-	str	x23, [sp, 48]
-	adrp	x21, .LANCHOR57
-	str	wzr, [x0, #:lo12:.LANCHOR159]
-	adrp	x0, .LANCHOR160
-	adrp	x23, .LANCHOR58
-	str	wzr, [x0, #:lo12:.LANCHOR160]
-	adrp	x0, .LANCHOR161
-	str	wzr, [x0, #:lo12:.LANCHOR161]
+	strh	wzr, [x0, #:lo12:.LANCHOR142]
 	adrp	x0, .LANCHOR162
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR185
 	str	wzr, [x0, #:lo12:.LANCHOR162]
 	adrp	x0, .LANCHOR163
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR38
 	str	wzr, [x0, #:lo12:.LANCHOR163]
 	adrp	x0, .LANCHOR164
+	stp	x23, x24, [sp, 48]
 	str	wzr, [x0, #:lo12:.LANCHOR164]
 	adrp	x0, .LANCHOR165
 	str	wzr, [x0, #:lo12:.LANCHOR165]
@@ -7724,8 +8023,6 @@ FtlMemInit:
 	str	wzr, [x0, #:lo12:.LANCHOR167]
 	adrp	x0, .LANCHOR168
 	str	wzr, [x0, #:lo12:.LANCHOR168]
-	adrp	x0, .LANCHOR79
-	str	wzr, [x0, #:lo12:.LANCHOR79]
 	adrp	x0, .LANCHOR169
 	str	wzr, [x0, #:lo12:.LANCHOR169]
 	adrp	x0, .LANCHOR170
@@ -7735,276 +8032,320 @@ FtlMemInit:
 	adrp	x0, .LANCHOR172
 	str	wzr, [x0, #:lo12:.LANCHOR172]
 	adrp	x0, .LANCHOR173
-	str	w1, [x0, #:lo12:.LANCHOR173]
+	str	wzr, [x0, #:lo12:.LANCHOR173]
+	adrp	x0, .LANCHOR81
+	str	wzr, [x0, #:lo12:.LANCHOR81]
 	adrp	x0, .LANCHOR174
-	adrp	x1, .LANCHOR112
 	str	wzr, [x0, #:lo12:.LANCHOR174]
 	adrp	x0, .LANCHOR175
 	str	wzr, [x0, #:lo12:.LANCHOR175]
-	adrp	x0, .LANCHOR73
-	str	wzr, [x0, #:lo12:.LANCHOR73]
-	mov	w0, -1
-	strh	w0, [x1, #:lo12:.LANCHOR112]
-	adrp	x1, .LANCHOR113
-	strh	w0, [x1, #:lo12:.LANCHOR113]
-	adrp	x1, .LANCHOR114
-	strh	w0, [x1, #:lo12:.LANCHOR114]
-	adrp	x1, .LANCHOR115
-	strh	w0, [x1, #:lo12:.LANCHOR115]
 	adrp	x0, .LANCHOR176
-	mov	w1, 32
-	strh	w1, [x0, #:lo12:.LANCHOR176]
+	str	wzr, [x0, #:lo12:.LANCHOR176]
 	adrp	x0, .LANCHOR177
-	mov	w1, 128
-	strh	w1, [x0, #:lo12:.LANCHOR177]
+	str	wzr, [x0, #:lo12:.LANCHOR177]
 	adrp	x0, .LANCHOR178
-	strh	wzr, [x0, #:lo12:.LANCHOR178]
-	adrp	x0, .LANCHOR116
-	strh	wzr, [x0, #:lo12:.LANCHOR116]
+	str	w1, [x0, #:lo12:.LANCHOR178]
 	adrp	x0, .LANCHOR179
-	strh	wzr, [x0, #:lo12:.LANCHOR179]
-	adrp	x0, .LANCHOR118
-	strh	wzr, [x0, #:lo12:.LANCHOR118]
-	ldrh	w0, [x19, #:lo12:.LANCHOR54]
+	adrp	x1, .LANCHOR115
+	str	wzr, [x0, #:lo12:.LANCHOR179]
+	adrp	x0, .LANCHOR180
+	str	wzr, [x0, #:lo12:.LANCHOR180]
+	adrp	x0, .LANCHOR75
+	str	wzr, [x0, #:lo12:.LANCHOR75]
+	mov	w0, -1
+	strh	w0, [x1, #:lo12:.LANCHOR115]
+	adrp	x1, .LANCHOR116
+	strh	w0, [x1, #:lo12:.LANCHOR116]
+	adrp	x1, .LANCHOR117
+	strh	w0, [x1, #:lo12:.LANCHOR117]
+	adrp	x1, .LANCHOR118
+	strh	w0, [x1, #:lo12:.LANCHOR118]
+	adrp	x0, .LANCHOR181
+	mov	w1, 32
+	strh	w1, [x0, #:lo12:.LANCHOR181]
+	adrp	x0, .LANCHOR182
+	mov	w1, 128
+	strh	w1, [x0, #:lo12:.LANCHOR182]
+	adrp	x0, .LANCHOR183
+	mov	w1, 128
+	strh	wzr, [x0, #:lo12:.LANCHOR183]
+	adrp	x0, .LANCHOR119
+	strh	wzr, [x0, #:lo12:.LANCHOR119]
+	adrp	x0, .LANCHOR184
+	strh	wzr, [x0, #:lo12:.LANCHOR184]
+	adrp	x0, .LANCHOR121
+	strh	wzr, [x0, #:lo12:.LANCHOR121]
+	adrp	x0, .LANCHOR55
+	ldrh	w0, [x0, #:lo12:.LANCHOR55]
+	sdiv	w1, w1, w0
+	ldrh	w0, [x21, #:lo12:.LANCHOR38]
+	lsl	w0, w0, 2
+	str	w1, [x19, #:lo12:.LANCHOR185]
+	cmp	w1, w0
+	bls	.L1157
+	str	w0, [x19, #:lo12:.LANCHOR185]
+.L1157:
+	adrp	x20, .LANCHOR54
+	adrp	x0, .LANCHOR72
+	mov	w22, 56
+	adrp	x24, .LANCHOR58
+	str	wzr, [x0, #:lo12:.LANCHOR72]
+	ldrh	w0, [x20, #:lo12:.LANCHOR54]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR109
-	str	x0, [x1, #:lo12:.LANCHOR109]
+	adrp	x1, .LANCHOR112
+	str	x0, [x1, #:lo12:.LANCHOR112]
 	mov	w0, 12
-	ldrh	w1, [x19, #:lo12:.LANCHOR54]
+	ldrh	w1, [x20, #:lo12:.LANCHOR54]
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	ldrh	w19, [x22, #:lo12:.LANCHOR38]
-	adrp	x1, .LANCHOR111
-	str	x0, [x1, #:lo12:.LANCHOR111]
-	mov	w0, 56
-	mul	w19, w19, w0
-	lsl	w20, w19, 2
+	ldrh	w20, [x21, #:lo12:.LANCHOR38]
+	adrp	x1, .LANCHOR114
+	str	x0, [x1, #:lo12:.LANCHOR114]
+	mul	w20, w20, w22
+	lsl	w23, w20, 2
+	mov	w0, w23
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR186
+	str	x0, [x1, #:lo12:.LANCHOR186]
 	mov	w0, w20
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR180
-	str	x0, [x1, #:lo12:.LANCHOR180]
-	mov	w0, w19
+	adrp	x1, .LANCHOR187
+	str	x0, [x1, #:lo12:.LANCHOR187]
+	mov	w0, w23
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR181
-	str	x0, [x1, #:lo12:.LANCHOR181]
+	adrp	x23, .LANCHOR57
+	adrp	x1, .LANCHOR188
+	str	x0, [x1, #:lo12:.LANCHOR188]
 	mov	w0, w20
 	bl	ftl_malloc
-	adrp	x20, .LANCHOR107
-	adrp	x1, .LANCHOR182
-	str	x0, [x1, #:lo12:.LANCHOR182]
-	mov	w0, w19
+	adrp	x1, .LANCHOR79
+	str	x0, [x1, #:lo12:.LANCHOR79]
+	mov	w0, w20
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR77
-	str	x0, [x1, #:lo12:.LANCHOR77]
-	mov	w0, w19
+	adrp	x1, .LANCHOR109
+	str	x0, [x1, #:lo12:.LANCHOR109]
+	ldr	w0, [x19, #:lo12:.LANCHOR185]
+	mul	w0, w0, w22
+	adrp	x22, .LANCHOR110
 	bl	ftl_malloc
-	ldrh	w19, [x21, #:lo12:.LANCHOR57]
-	adrp	x1, .LANCHOR106
-	str	x0, [x1, #:lo12:.LANCHOR106]
-	ldrh	w0, [x22, #:lo12:.LANCHOR38]
+	ldrh	w20, [x23, #:lo12:.LANCHOR57]
+	adrp	x1, .LANCHOR73
+	str	x0, [x1, #:lo12:.LANCHOR73]
+	ldrh	w0, [x21, #:lo12:.LANCHOR38]
 	lsl	w0, w0, 1
 	add	w0, w0, 1
-	str	w0, [x20, #:lo12:.LANCHOR107]
-	mov	w0, w19
+	str	w0, [x22, #:lo12:.LANCHOR110]
+	mov	w0, w20
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR183
-	str	x0, [x1, #:lo12:.LANCHOR183]
-	mov	w0, w19
+	adrp	x1, .LANCHOR189
+	str	x0, [x1, #:lo12:.LANCHOR189]
+	mov	w0, w20
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR184
-	str	x0, [x1, #:lo12:.LANCHOR184]
-	mov	w0, w19
+	adrp	x1, .LANCHOR190
+	str	x0, [x1, #:lo12:.LANCHOR190]
+	mov	w0, w20
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR185
-	str	x0, [x1, #:lo12:.LANCHOR185]
-	ldr	w0, [x20, #:lo12:.LANCHOR107]
-	mul	w0, w19, w0
+	adrp	x1, .LANCHOR191
+	str	x0, [x1, #:lo12:.LANCHOR191]
+	ldr	w0, [x22, #:lo12:.LANCHOR110]
+	mul	w0, w20, w0
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR104
-	str	x0, [x1, #:lo12:.LANCHOR104]
-	mov	w0, w19
+	adrp	x1, .LANCHOR107
+	str	x0, [x1, #:lo12:.LANCHOR107]
+	ldr	w0, [x19, #:lo12:.LANCHOR185]
+	mul	w0, w20, w0
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR186
-	str	x0, [x1, #:lo12:.LANCHOR186]
-	mov	w0, w19
+	adrp	x1, .LANCHOR192
+	str	x0, [x1, #:lo12:.LANCHOR192]
+	mov	w0, w20
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR187
-	str	x0, [x1, #:lo12:.LANCHOR187]
+	adrp	x1, .LANCHOR193
+	str	x0, [x1, #:lo12:.LANCHOR193]
+	mov	w0, w20
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR194
+	str	x0, [x1, #:lo12:.LANCHOR194]
 	mov	w0, 24
-	ldr	w1, [x20, #:lo12:.LANCHOR107]
+	ldr	w1, [x22, #:lo12:.LANCHOR110]
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	ldrh	w19, [x23, #:lo12:.LANCHOR58]
-	adrp	x1, .LANCHOR103
-	str	x0, [x1, #:lo12:.LANCHOR103]
-	ldrh	w0, [x22, #:lo12:.LANCHOR38]
-	adrp	x22, .LANCHOR64
-	mul	w19, w19, w0
-	mov	w0, w19
+	ldrh	w20, [x24, #:lo12:.LANCHOR58]
+	adrp	x1, .LANCHOR106
+	str	x0, [x1, #:lo12:.LANCHOR106]
+	ldrh	w0, [x21, #:lo12:.LANCHOR38]
+	adrp	x21, .LANCHOR64
+	mul	w20, w20, w0
+	mov	w0, w20
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR188
-	str	x0, [x1, #:lo12:.LANCHOR188]
-	lsl	w0, w19, 2
+	adrp	x1, .LANCHOR195
+	str	x0, [x1, #:lo12:.LANCHOR195]
+	lsl	w0, w20, 2
 	bl	ftl_malloc
-	adrp	x19, .LANCHOR41
-	adrp	x1, .LANCHOR189
-	str	x0, [x1, #:lo12:.LANCHOR189]
-	ldrh	w1, [x23, #:lo12:.LANCHOR58]
-	ldr	w0, [x20, #:lo12:.LANCHOR107]
-	adrp	x20, .LANCHOR190
+	adrp	x20, .LANCHOR41
+	adrp	x1, .LANCHOR196
+	str	x0, [x1, #:lo12:.LANCHOR196]
+	ldrh	w1, [x24, #:lo12:.LANCHOR58]
+	ldr	w0, [x22, #:lo12:.LANCHOR110]
+	mul	w0, w1, w0
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR108
+	str	x0, [x1, #:lo12:.LANCHOR108]
+	ldrh	w1, [x24, #:lo12:.LANCHOR58]
+	ldr	w0, [x19, #:lo12:.LANCHOR185]
+	adrp	x19, .LANCHOR198
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR105
-	str	x0, [x1, #:lo12:.LANCHOR105]
-	ldrh	w0, [x19, #:lo12:.LANCHOR41]
+	adrp	x1, .LANCHOR197
+	str	x0, [x1, #:lo12:.LANCHOR197]
+	ldrh	w0, [x20, #:lo12:.LANCHOR41]
 	ubfiz	w0, w0, 1, 15
-	strh	w0, [x20, #:lo12:.LANCHOR190]
+	strh	w0, [x19, #:lo12:.LANCHOR198]
 	and	w0, w0, 65534
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR137
-	str	x0, [x1, #:lo12:.LANCHOR137]
-	ldrh	w0, [x20, #:lo12:.LANCHOR190]
+	adrp	x1, .LANCHOR140
+	str	x0, [x1, #:lo12:.LANCHOR140]
+	ldrh	w0, [x19, #:lo12:.LANCHOR198]
 	add	x0, x0, 547
 	lsr	x0, x0, 9
-	strh	w0, [x20, #:lo12:.LANCHOR190]
+	strh	w0, [x19, #:lo12:.LANCHOR198]
 	lsl	w0, w0, 9
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR191
-	str	x0, [x1, #:lo12:.LANCHOR191]
-	adrp	x1, .LANCHOR78
+	adrp	x1, .LANCHOR199
+	str	x0, [x1, #:lo12:.LANCHOR199]
+	adrp	x1, .LANCHOR80
 	add	x0, x0, 32
-	str	x0, [x1, #:lo12:.LANCHOR78]
-	ldrh	w0, [x19, #:lo12:.LANCHOR41]
+	str	x0, [x1, #:lo12:.LANCHOR80]
+	ldrh	w0, [x20, #:lo12:.LANCHOR41]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-	ldr	w20, [x22, #:lo12:.LANCHOR64]
-	adrp	x1, .LANCHOR83
-	str	x0, [x1, #:lo12:.LANCHOR83]
-	lsl	w20, w20, 1
-	mov	w0, w20
+	ldr	w19, [x21, #:lo12:.LANCHOR64]
+	adrp	x1, .LANCHOR85
+	str	x0, [x1, #:lo12:.LANCHOR85]
+	lsl	w19, w19, 1
+	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR129
-	str	x0, [x1, #:lo12:.LANCHOR129]
-	mov	w0, w20
+	adrp	x1, .LANCHOR132
+	str	x0, [x1, #:lo12:.LANCHOR132]
+	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x20, .LANCHOR61
-	adrp	x1, .LANCHOR125
-	str	x0, [x1, #:lo12:.LANCHOR125]
-	ldrh	w0, [x19, #:lo12:.LANCHOR41]
+	adrp	x19, .LANCHOR61
+	adrp	x1, .LANCHOR128
+	str	x0, [x1, #:lo12:.LANCHOR128]
+	ldrh	w0, [x20, #:lo12:.LANCHOR41]
 	lsr	w0, w0, 3
 	add	w0, w0, 4
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR1
 	str	x0, [x1, #:lo12:.LANCHOR1]
-	ldrh	w0, [x20, #:lo12:.LANCHOR61]
+	ldrh	w0, [x19, #:lo12:.LANCHOR61]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR71
 	str	x0, [x1, #:lo12:.LANCHOR71]
-	ldrh	w0, [x20, #:lo12:.LANCHOR61]
+	ldrh	w0, [x19, #:lo12:.LANCHOR61]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR192
-	str	x0, [x1, #:lo12:.LANCHOR192]
-	ldrh	w0, [x20, #:lo12:.LANCHOR61]
-	adrp	x20, .LANCHOR62
+	adrp	x1, .LANCHOR200
+	str	x0, [x1, #:lo12:.LANCHOR200]
+	ldrh	w0, [x19, #:lo12:.LANCHOR61]
+	adrp	x19, .LANCHOR62
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR193
-	str	x0, [x1, #:lo12:.LANCHOR193]
-	ldrh	w0, [x20, #:lo12:.LANCHOR62]
+	adrp	x1, .LANCHOR201
+	str	x0, [x1, #:lo12:.LANCHOR201]
+	ldrh	w0, [x19, #:lo12:.LANCHOR62]
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	ldrh	w2, [x20, #:lo12:.LANCHOR62]
-	adrp	x1, .LANCHOR194
-	str	x0, [x1, #:lo12:.LANCHOR194]
+	ldrh	w2, [x19, #:lo12:.LANCHOR62]
+	adrp	x1, .LANCHOR202
+	str	x0, [x1, #:lo12:.LANCHOR202]
 	mov	w1, 0
 	lsl	w2, w2, 2
 	bl	ftl_memset
 	adrp	x0, .LANCHOR66
-	ldrh	w20, [x0, #:lo12:.LANCHOR66]
-	lsl	w20, w20, 2
-	mov	w0, w20
+	ldrh	w19, [x0, #:lo12:.LANCHOR66]
+	lsl	w19, w19, 2
+	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR131
-	str	x0, [x1, #:lo12:.LANCHOR131]
-	mov	w0, w20
+	adrp	x1, .LANCHOR134
+	str	x0, [x1, #:lo12:.LANCHOR134]
+	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x20, .LANCHOR67
-	adrp	x1, .LANCHOR195
-	str	x0, [x1, #:lo12:.LANCHOR195]
-	ldr	w0, [x22, #:lo12:.LANCHOR64]
+	adrp	x19, .LANCHOR67
+	adrp	x1, .LANCHOR203
+	str	x0, [x1, #:lo12:.LANCHOR203]
+	ldr	w0, [x21, #:lo12:.LANCHOR64]
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR130
-	str	x0, [x1, #:lo12:.LANCHOR130]
-	ldrh	w0, [x20, #:lo12:.LANCHOR67]
+	adrp	x1, .LANCHOR133
+	str	x0, [x1, #:lo12:.LANCHOR133]
+	ldrh	w0, [x19, #:lo12:.LANCHOR67]
 	lsl	w0, w0, 4
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR96
-	str	x0, [x1, #:lo12:.LANCHOR96]
-	ldrh	w1, [x20, #:lo12:.LANCHOR67]
-	adrp	x20, .LANCHOR45
-	ldrh	w0, [x21, #:lo12:.LANCHOR57]
+	adrp	x1, .LANCHOR98
+	str	x0, [x1, #:lo12:.LANCHOR98]
+	ldrh	w1, [x19, #:lo12:.LANCHOR67]
+	adrp	x19, .LANCHOR126
+	ldrh	w0, [x23, #:lo12:.LANCHOR57]
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR126
-	str	x0, [x1, #:lo12:.LANCHOR126]
+	adrp	x1, .LANCHOR129
+	str	x0, [x1, #:lo12:.LANCHOR129]
 	mov	w0, 6
-	ldrh	w1, [x19, #:lo12:.LANCHOR41]
-	adrp	x19, .LANCHOR123
+	ldrh	w1, [x20, #:lo12:.LANCHOR41]
+	adrp	x20, .LANCHOR45
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR81
-	str	x0, [x1, #:lo12:.LANCHOR81]
+	adrp	x1, .LANCHOR83
+	str	x0, [x1, #:lo12:.LANCHOR83]
 	adrp	x0, .LANCHOR51
 	ldrh	w1, [x20, #:lo12:.LANCHOR45]
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	add	w0, w0, 31
 	asr	w0, w0, 5
-	strh	w0, [x19, #:lo12:.LANCHOR123]
+	strh	w0, [x19, #:lo12:.LANCHOR126]
 	mul	w0, w1, w0
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR74
-	ldrh	w5, [x19, #:lo12:.LANCHOR123]
-	add	x2, x1, :lo12:.LANCHOR74
+	adrp	x1, .LANCHOR76
+	ldrh	w5, [x19, #:lo12:.LANCHOR126]
+	add	x2, x1, :lo12:.LANCHOR76
 	ldrh	w7, [x20, #:lo12:.LANCHOR45]
 	add	x6, x2, 40
 	mov	w3, w5
 	str	x0, [x2, 32]
 	mov	x0, 1
-.L1100:
+.L1158:
 	cmp	w0, w7
-	bcc	.L1101
+	bcc	.L1159
 	mov	w2, 8
 	sub	w2, w2, w0
 	add	x2, x2, 1
-	add	x1, x1, :lo12:.LANCHOR74
+	add	x1, x1, :lo12:.LANCHOR76
 	mov	x3, 0
-.L1102:
+.L1160:
 	add	x3, x3, 1
 	cmp	x2, x3
-	bne	.L1103
+	bne	.L1161
 	mov	w0, 0
-	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1101:
+.L1159:
 	ldr	x4, [x2, 32]
 	add	w0, w0, 1
 	add	x4, x4, x3, uxtw 2
 	add	w3, w3, w5
 	str	x4, [x6], 8
-	b	.L1100
-.L1103:
+	b	.L1158
+.L1161:
 	add	x4, x0, x3
 	add	x4, x1, x4, lsl 3
 	str	xzr, [x4, 24]
-	b	.L1102
+	b	.L1160
 	.size	FtlMemInit, .-FtlMemInit
 	.section	.text.ftl_free,"ax",@progbits
 	.align	2
@@ -8013,39 +8354,6 @@ FtlMemInit:
 ftl_free:
 	b	free
 	.size	ftl_free, .-ftl_free
-	.section	.text.StorageSysDataLoad,"ax",@progbits
-	.align	2
-	.global	StorageSysDataLoad
-	.type	StorageSysDataLoad, %function
-StorageSysDataLoad:
-	stp	x29, x30, [sp, -32]!
-	mov	x2, 512
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	x19, x1
-	mov	w20, w0
-	mov	w1, 0
-	mov	x0, x19
-	bl	memset
-	mov	x3, x19
-	add	w1, w20, 256
-	ldp	x19, x20, [sp, 16]
-	mov	w2, 1
-	ldp	x29, x30, [sp], 32
-	mov	w0, 16
-	b	FtlRead
-	.size	StorageSysDataLoad, .-StorageSysDataLoad
-	.section	.text.FlashBootVendorRead,"ax",@progbits
-	.align	2
-	.global	FlashBootVendorRead
-	.type	FlashBootVendorRead, %function
-FlashBootVendorRead:
-	mov	x3, x2
-	mov	w1, w0
-	mov	w2, 1
-	mov	w0, 16
-	b	FtlRead
-	.size	FlashBootVendorRead, .-FlashBootVendorRead
 	.section	.text.FlashCs123Init,"ax",@progbits
 	.align	2
 	.global	FlashCs123Init
@@ -8077,28 +8385,28 @@ rknand_print_hex:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LC19
+	adrp	x21, .LC20
 	stp	x23, x24, [sp, 48]
 	mov	x22, x1
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LC18
+	adrp	x23, .LC19
 	mov	x26, x0
 	mov	w24, w2
 	uxtw	x25, w3
-	add	x23, x23, :lo12:.LC18
-	add	x21, x21, :lo12:.LC19
+	add	x23, x23, :lo12:.LC19
+	add	x21, x21, :lo12:.LC20
 	stp	x19, x20, [sp, 16]
 	str	x27, [sp, 80]
 	mov	x19, 0
 	mov	w20, 0
-	adrp	x27, .LC20
-.L1113:
+	adrp	x27, .LC21
+.L1168:
 	cmp	x25, x19
-	bne	.L1119
+	bne	.L1174
 	ldp	x19, x20, [sp, 16]
-	adrp	x1, .LC20
+	adrp	x1, .LC21
 	ldp	x21, x22, [sp, 32]
-	add	x1, x1, :lo12:.LC20
+	add	x1, x1, :lo12:.LC21
 	ldp	x23, x24, [sp, 48]
 	adrp	x0, .LC7
 	ldp	x25, x26, [sp, 64]
@@ -8106,38 +8414,38 @@ rknand_print_hex:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	printf
-.L1119:
-	cbnz	w20, .L1114
+.L1174:
+	cbnz	w20, .L1169
 	mov	w2, w19
 	mov	x1, x26
 	mov	x0, x23
 	bl	printf
-.L1114:
+.L1169:
 	cmp	w24, 4
-	bne	.L1115
+	bne	.L1170
 	ldr	w1, [x22, x19, lsl 2]
-.L1121:
+.L1176:
 	mov	x0, x21
 	add	w20, w20, 1
 	bl	printf
 	cmp	w20, 15
-	bls	.L1118
+	bls	.L1173
 	mov	w20, 0
-	add	x1, x27, :lo12:.LC20
+	add	x1, x27, :lo12:.LC21
 	adrp	x0, .LC7
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1118:
+.L1173:
 	add	x19, x19, 1
-	b	.L1113
-.L1115:
+	b	.L1168
+.L1170:
 	cmp	w24, 2
-	bne	.L1117
+	bne	.L1172
 	ldrsh	w1, [x22, x19, lsl 1]
-	b	.L1121
-.L1117:
+	b	.L1176
+.L1172:
 	ldrb	w1, [x22, x19]
-	b	.L1121
+	b	.L1176
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.HynixGetReadRetryDefault,"ax",@progbits
 	.align	2
@@ -8164,18 +8472,18 @@ HynixGetReadRetryDefault:
 	strb	w4, [x0, 5]
 	strb	w3, [x0, 6]
 	strb	w1, [x0, 7]
-	bne	.L1123
+	bne	.L1178
 	mov	w1, -89
 	strb	w1, [x0, 4]
-	adrp	x0, .LANCHOR196+17
+	adrp	x0, .LANCHOR204+17
 	mov	w1, -9
-	strb	w1, [x0, #:lo12:.LANCHOR196+17]
-.L1188:
+	strb	w1, [x0, #:lo12:.LANCHOR204+17]
+.L1243:
 	mov	w27, 7
-	b	.L1232
-.L1123:
+	b	.L1287
+.L1178:
 	cmp	w26, 3
-	bne	.L1125
+	bne	.L1180
 	mov	w1, -80
 	strb	w1, [x0, 4]
 	mov	w1, -79
@@ -8191,26 +8499,26 @@ HynixGetReadRetryDefault:
 	mov	w1, -74
 	strb	w1, [x0, 10]
 	mov	w1, -73
-.L1231:
+.L1286:
 	mov	w27, 8
 	mov	w28, w27
 	strb	w1, [x0, 11]
-.L1124:
+.L1179:
 	sub	w0, w26, #1
 	cmp	w0, 1
-	bhi	.L1130
-	adrp	x26, .LANCHOR25
-	adrp	x0, .LANCHOR26
+	bhi	.L1185
+	adrp	x26, .LANCHOR26
+	adrp	x0, .LANCHOR27
 	adrp	x25, .LANCHOR0
-	add	x26, x26, :lo12:.LANCHOR25
-	add	x4, x0, :lo12:.LANCHOR26
+	add	x26, x26, :lo12:.LANCHOR26
+	add	x4, x0, :lo12:.LANCHOR27
 	add	x25, x25, :lo12:.LANCHOR0
 	mov	w24, 0
-.L1131:
+.L1186:
 	ldrb	w0, [x26]
 	cmp	w0, w24
-	bhi	.L1137
-.L1138:
+	bhi	.L1192
+.L1193:
 	add	x20, x20, :lo12:.LANCHOR20
 	ldp	x21, x22, [sp, 32]
 	strb	w28, [x20, 1]
@@ -8221,9 +8529,9 @@ HynixGetReadRetryDefault:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1125:
+.L1180:
 	cmp	w26, 4
-	bne	.L1126
+	bne	.L1181
 	mov	w5, -52
 	strb	w5, [x0, 4]
 	mov	w5, -65
@@ -8236,10 +8544,10 @@ HynixGetReadRetryDefault:
 	mov	w5, -51
 	strb	w3, [x0, 10]
 	strb	w5, [x0, 8]
-	b	.L1231
-.L1126:
+	b	.L1286
+.L1181:
 	cmp	w26, 5
-	bne	.L1127
+	bne	.L1182
 	mov	w1, 56
 	strb	w1, [x0, 4]
 	mov	w1, 57
@@ -8249,12 +8557,12 @@ HynixGetReadRetryDefault:
 	strb	w1, [x0, 6]
 	mov	w1, 59
 	strb	w1, [x0, 7]
-.L1232:
+.L1287:
 	mov	w28, 4
-	b	.L1124
-.L1127:
+	b	.L1179
+.L1182:
 	cmp	w26, 6
-	bne	.L1128
+	bne	.L1183
 	mov	w1, 14
 	strb	w1, [x0, 4]
 	mov	w1, 15
@@ -8264,10 +8572,10 @@ HynixGetReadRetryDefault:
 	strb	w1, [x0, 6]
 	mov	w1, 17
 	strb	w1, [x0, 7]
-	b	.L1232
-.L1128:
+	b	.L1287
+.L1183:
 	cmp	w26, 7
-	bne	.L1129
+	bne	.L1184
 	mov	w1, -80
 	strb	w1, [x0, 4]
 	mov	w1, -79
@@ -8290,10 +8598,10 @@ HynixGetReadRetryDefault:
 	mov	w28, 10
 	mov	w1, -43
 	strb	w1, [x0, 13]
-	b	.L1124
-.L1129:
+	b	.L1179
+.L1184:
 	cmp	w26, 8
-	bne	.L1188
+	bne	.L1243
 	mov	w1, 6
 	strb	w1, [x0, 4]
 	mov	w1, 7
@@ -8305,8 +8613,8 @@ HynixGetReadRetryDefault:
 	mov	w1, 10
 	mov	w28, 5
 	strb	w1, [x0, 8]
-	b	.L1124
-.L1137:
+	b	.L1179
+.L1192:
 	ldrb	w1, [x4, w24, sxtw]
 	add	x0, x20, :lo12:.LANCHOR20
 	mov	x21, x0
@@ -8320,7 +8628,7 @@ HynixGetReadRetryDefault:
 	ldrb	w23, [x2, 8]
 	add	x23, x1, x23, lsl 8
 	mov	w1, 55
-.L1132:
+.L1187:
 	add	x0, x21, x22
 	str	w1, [x23, 2056]
 	str	x4, [x29, 128]
@@ -8335,15 +8643,15 @@ HynixGetReadRetryDefault:
 	cmp	w28, w22, uxtb
 	ldr	w1, [x29, 140]
 	ldr	x4, [x29, 128]
-	bhi	.L1132
-	adrp	x2, .LANCHOR196
-	add	x2, x2, :lo12:.LANCHOR196
+	bhi	.L1187
+	adrp	x2, .LANCHOR204
+	add	x2, x2, :lo12:.LANCHOR204
 	mov	x0, 0
-.L1135:
+.L1190:
 	add	x7, x19, x0
 	add	x6, x2, x0
 	mov	x1, 1
-.L1134:
+.L1189:
 	lsl	x3, x1, 2
 	lsl	x8, x1, 3
 	ldrb	w10, [x19, x0]
@@ -8352,10 +8660,10 @@ HynixGetReadRetryDefault:
 	ldrb	w3, [x6, x3]
 	add	w3, w3, w10
 	strb	w3, [x7, x8]
-	bne	.L1134
+	bne	.L1189
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L1135
+	bne	.L1190
 	add	w24, w24, 1
 	strb	wzr, [x19, 16]
 	strb	wzr, [x19, 24]
@@ -8365,13 +8673,13 @@ HynixGetReadRetryDefault:
 	strb	wzr, [x19, 48]
 	strb	wzr, [x19, 41]
 	strb	wzr, [x19, 49]
-	b	.L1131
-.L1130:
+	b	.L1186
+.L1185:
 	sub	w0, w26, #3
 	cmp	w0, 5
-	bhi	.L1138
+	bhi	.L1193
 	mul	w24, w27, w28
-	adrp	x25, .LANCHOR25
+	adrp	x25, .LANCHOR26
 	sub	w22, w28, #1
 	mov	w21, 0
 	and	x22, x22, 255
@@ -8381,18 +8689,18 @@ HynixGetReadRetryDefault:
 	lsl	w0, w23, 1
 	sbfiz	x24, x23, 1, 32
 	str	w0, [x29, 140]
-	add	x0, x25, :lo12:.LANCHOR25
+	add	x0, x25, :lo12:.LANCHOR26
 	sub	w25, w26, #5
 	str	x0, [x29, 120]
 	add	x0, x22, 1
 	str	x0, [x29, 112]
-.L1139:
+.L1194:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, w21
-	bls	.L1138
-	adrp	x0, .LANCHOR26
-	add	x0, x0, :lo12:.LANCHOR26
+	bls	.L1193
+	adrp	x0, .LANCHOR27
+	add	x0, x0, :lo12:.LANCHOR27
 	ldrb	w22, [x0, w21, sxtw]
 	adrp	x0, .LANCHOR0
 	add	x0, x0, :lo12:.LANCHOR0
@@ -8406,43 +8714,43 @@ HynixGetReadRetryDefault:
 	mov	w0, w22
 	bl	NandcWaitFlashReady
 	cmp	w26, 7
-	bne	.L1140
+	bne	.L1195
 	mov	x1, 28
 	mov	w0, 160
 	add	x3, x20, :lo12:.LANCHOR20
 	umaddl	x0, w0, w22, x1
-.L1233:
+.L1288:
 	add	x3, x3, x0
 	mov	w0, 54
 	str	w0, [x19, 2056]
 	cmp	w26, 4
-	bne	.L1143
+	bne	.L1198
 	mov	w0, 255
 	str	w0, [x19, 2052]
 	mov	w0, 64
 	str	w0, [x19, 2048]
 	mov	w0, 204
-.L1234:
+.L1289:
 	str	w0, [x19, 2052]
 	mov	w0, 77
-	b	.L1235
-.L1140:
+	b	.L1290
+.L1195:
 	cmp	w26, 8
-	beq	.L1142
+	beq	.L1197
 	ubfiz	x0, x22, 6, 8
 	add	x3, x20, :lo12:.LANCHOR20
 	add	x0, x0, 20
-	b	.L1233
-.L1143:
+	b	.L1288
+.L1198:
 	cmp	w25, 1
-	bhi	.L1145
+	bhi	.L1200
 	add	x0, x20, :lo12:.LANCHOR20
 	ldrb	w0, [x0, 4]
 	str	w0, [x19, 2052]
 	mov	w0, 82
-.L1235:
+.L1290:
 	str	w0, [x19, 2048]
-.L1144:
+.L1199:
 	mov	w0, 22
 	str	w0, [x19, 2056]
 	mov	w0, 23
@@ -8455,14 +8763,14 @@ HynixGetReadRetryDefault:
 	cmp	w26, 6
 	str	wzr, [x19, 2052]
 	str	wzr, [x19, 2052]
-	bne	.L1146
+	bne	.L1201
 	mov	w0, 31
 	str	w0, [x19, 2052]
-.L1147:
+.L1202:
 	mov	w0, 2
 	str	w0, [x19, 2052]
 	str	wzr, [x19, 2052]
-.L1187:
+.L1242:
 	mov	w0, 48
 	str	w0, [x19, 2056]
 	str	x3, [x29, 104]
@@ -8471,219 +8779,219 @@ HynixGetReadRetryDefault:
 	cmp	w25, 1
 	ldr	x3, [x29, 104]
 	ccmp	w26, 8, 4, hi
-	beq	.L1189
+	beq	.L1244
 	cmp	w26, 7
 	mov	w0, 2
 	mov	w1, 32
 	csel	w1, w1, w0, eq
-.L1148:
-	adrp	x8, .LANCHOR147
+.L1203:
+	adrp	x8, .LANCHOR154
 	mov	x7, 0
-	ldr	x0, [x8, #:lo12:.LANCHOR147]
-.L1149:
+	ldr	x0, [x8, #:lo12:.LANCHOR154]
+.L1204:
 	ldr	w10, [x19, 2048]
 	strb	w10, [x0, x7]
 	add	x7, x7, 1
 	cmp	w1, w7, uxtb
-	bhi	.L1149
+	bhi	.L1204
 	cmp	w26, 8
-	bne	.L1150
+	bne	.L1205
 	mov	w1, 0
-.L1152:
+.L1207:
 	ldrb	w7, [x0]
 	cmp	w7, 50
-	beq	.L1151
+	beq	.L1206
 	ldrb	w7, [x0, 1]
 	cmp	w7, 5
-	beq	.L1151
+	beq	.L1206
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 255
 	cmp	w1, 8
-	bne	.L1152
-.L1153:
-	adrp	x0, .LC21
+	bne	.L1207
+.L1208:
+	adrp	x0, .LC22
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC21
+	add	x0, x0, :lo12:.LC22
 	bl	printf
-.L1155:
-	b	.L1155
-.L1145:
+.L1210:
+	b	.L1210
+.L1200:
 	cmp	w26, 7
-	bne	.L1144
+	bne	.L1199
 	mov	w0, 174
 	str	w0, [x19, 2052]
 	str	wzr, [x19, 2048]
 	mov	w0, 176
-	b	.L1234
-.L1146:
+	b	.L1289
+.L1201:
 	str	wzr, [x19, 2052]
-	b	.L1147
-.L1189:
+	b	.L1202
+.L1244:
 	mov	w1, 16
-	b	.L1148
-.L1151:
+	b	.L1203
+.L1206:
 	cmp	w1, 6
-	bhi	.L1153
-.L1154:
-	ldr	x7, [x8, #:lo12:.LANCHOR147]
+	bhi	.L1208
+.L1209:
+	ldr	x7, [x8, #:lo12:.LANCHOR154]
 	mov	x0, 0
-.L1164:
+.L1219:
 	ldr	w1, [x29, 128]
 	cmp	w1, w0
-	bgt	.L1165
-	ldr	x1, [x8, #:lo12:.LANCHOR147]
+	bgt	.L1220
+	ldr	x1, [x8, #:lo12:.LANCHOR154]
 	mov	w10, 8
 	add	x8, x1, x24
-.L1167:
+.L1222:
 	mov	x0, 0
-.L1166:
+.L1221:
 	ldrh	w11, [x8, x0, lsl 1]
 	mvn	w11, w11
 	strh	w11, [x8, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	w23, w0
-	bgt	.L1166
+	bgt	.L1221
 	ldr	w0, [x29, 140]
 	subs	w10, w10, #1
 	add	x8, x8, x0, uxtw 1
-	bne	.L1167
+	bne	.L1222
 	mov	x10, x1
 	mov	w11, 0
 	mov	w16, 1
-.L1173:
+.L1228:
 	mov	w0, 0
 	mov	w8, 0
-.L1172:
+.L1227:
 	mov	x14, x10
 	lsl	w15, w16, w8
 	mov	w13, 16
 	mov	w12, 0
-.L1170:
+.L1225:
 	ldrh	w17, [x14]
 	add	x14, x14, x24
 	bics	wzr, w15, w17
 	cinc	w12, w12, eq
 	subs	w13, w13, #1
-	bne	.L1170
+	bne	.L1225
 	cmp	w12, 8
-	bls	.L1171
+	bls	.L1226
 	orr	w0, w0, w15
 	and	w0, w0, 65535
-.L1171:
+.L1226:
 	add	w8, w8, 1
 	cmp	w8, 16
-	bne	.L1172
+	bne	.L1227
 	strh	w0, [x10], 2
 	add	w11, w11, 1
 	cmp	w23, w11
-	bgt	.L1173
+	bgt	.L1228
 	mov	x0, 0
 	mov	w8, 0
-.L1176:
+.L1231:
 	ldr	w10, [x1, x0]
 	add	x0, x0, 4
 	cmp	w10, 0
 	cinc	w8, w8, eq
 	cmp	x0, 32
-	bne	.L1176
+	bne	.L1231
 	cmp	w8, 7
-	ble	.L1177
+	ble	.L1232
 	mov	w3, 1024
 	mov	w2, 1
-	adrp	x0, .LC22
-	add	x0, x0, :lo12:.LC22
+	adrp	x0, .LC23
+	add	x0, x0, :lo12:.LC23
 	bl	rknand_print_hex
-	adrp	x0, .LC21
+	adrp	x0, .LC22
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC21
+	add	x0, x0, :lo12:.LC22
 	bl	printf
-.L1178:
-	b	.L1178
-.L1150:
+.L1233:
+	b	.L1233
+.L1205:
 	cmp	w26, 7
-	bne	.L1156
+	bne	.L1211
 	mov	w1, 0
-.L1158:
+.L1213:
 	ldrb	w7, [x0]
 	cmp	w7, 12
-	beq	.L1157
+	beq	.L1212
 	ldrb	w7, [x0, 1]
 	cmp	w7, 10
-	beq	.L1157
+	beq	.L1212
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 255
 	cmp	w1, 8
-	bne	.L1158
-.L1159:
-	adrp	x0, .LC21
+	bne	.L1213
+.L1214:
+	adrp	x0, .LC22
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC21
+	add	x0, x0, :lo12:.LC22
 	bl	printf
-.L1160:
-	b	.L1160
-.L1157:
+.L1215:
+	b	.L1215
+.L1212:
 	cmp	w1, 6
-	bls	.L1154
-	b	.L1159
-.L1156:
+	bls	.L1209
+	b	.L1214
+.L1211:
 	cmp	w26, 6
-	bne	.L1154
+	bne	.L1209
 	mov	x1, 0
-.L1161:
+.L1216:
 	ldrb	w7, [x0, x1]
 	cmp	w7, 12
-	beq	.L1154
+	beq	.L1209
 	add	x7, x0, x1
 	ldrb	w7, [x7, 8]
 	cmp	w7, 4
-	beq	.L1154
+	beq	.L1209
 	add	x1, x1, 1
 	cmp	x1, 8
-	bne	.L1161
-	adrp	x0, .LC21
+	bne	.L1216
+	adrp	x0, .LC22
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC21
+	add	x0, x0, :lo12:.LC22
 	bl	printf
-.L1163:
-	b	.L1163
-.L1165:
+.L1218:
+	b	.L1218
+.L1220:
 	ldr	w1, [x19, 2048]
 	strb	w1, [x7, x0]
 	add	x0, x0, 1
-	b	.L1164
-.L1177:
+	b	.L1219
+.L1232:
 	cmp	w26, 6
-	beq	.L1191
+	beq	.L1246
 	cmp	w26, 7
-	beq	.L1192
+	beq	.L1247
 	cmp	w26, 8
 	mov	x1, 8
 	mov	x0, 5
 	csel	x0, x0, x1, eq
-.L1179:
+.L1234:
 	mov	w8, 0
-.L1180:
+.L1235:
 	mov	x1, 0
-.L1181:
+.L1236:
 	ldrb	w10, [x7, x1]
 	strb	w10, [x3, x1]
 	add	x1, x1, 1
 	cmp	w28, w1, uxtb
-	bhi	.L1181
+	bhi	.L1236
 	ldr	x1, [x29, 112]
 	add	w8, w8, 1
 	add	x3, x3, x0
 	cmp	w27, w8
 	add	x7, x7, x1
-	bgt	.L1180
+	bgt	.L1235
 	mov	w0, 255
 	str	w0, [x19, 2056]
 	mov	w0, w22
 	bl	NandcWaitFlashReady
 	cmp	w25, 1
-	bhi	.L1183
+	bhi	.L1238
 	mov	w0, 54
 	str	w0, [x19, 2056]
 	adrp	x0, .LANCHOR20+4
@@ -8695,29 +9003,29 @@ HynixGetReadRetryDefault:
 	str	w0, [x19, 2056]
 	mov	w0, w21
 	bl	FlashReadCmd
-.L1184:
+.L1239:
 	add	w21, w21, 1
 	mov	w0, w22
 	and	w21, w21, 255
 	bl	NandcWaitFlashReady
-	b	.L1139
-.L1191:
+	b	.L1194
+.L1246:
 	mov	x0, 4
-	b	.L1179
-.L1192:
+	b	.L1234
+.L1247:
 	mov	x0, 10
-	b	.L1179
-.L1183:
+	b	.L1234
+.L1238:
 	cmp	w26, 8
-	bne	.L1185
+	bne	.L1240
 	mov	w0, 190
-.L1236:
+.L1291:
 	str	w0, [x19, 2056]
-	b	.L1184
-.L1185:
+	b	.L1239
+.L1240:
 	mov	w0, 56
-	b	.L1236
-.L1142:
+	b	.L1291
+.L1197:
 	mov	w0, 120
 	str	w0, [x19, 2056]
 	str	wzr, [x19, 2052]
@@ -8740,7 +9048,7 @@ HynixGetReadRetryDefault:
 	str	w1, [x19, 2052]
 	str	w0, [x19, 2052]
 	str	wzr, [x19, 2052]
-	b	.L1187
+	b	.L1242
 	.size	HynixGetReadRetryDefault, .-HynixGetReadRetryDefault
 	.section	.text.FlashGetReadRetryDefault,"ax",@progbits
 	.align	2
@@ -8748,14 +9056,14 @@ HynixGetReadRetryDefault:
 	.type	FlashGetReadRetryDefault, %function
 FlashGetReadRetryDefault:
 	mov	w1, w0
-	cbz	w0, .L1237
+	cbz	w0, .L1292
 	sub	w2, w0, #1
 	cmp	w2, 7
-	bhi	.L1239
+	bhi	.L1294
 	b	HynixGetReadRetryDefault
-.L1239:
+.L1294:
 	cmp	w0, 49
-	bne	.L1240
+	bne	.L1295
 	adrp	x2, .LANCHOR20
 	add	x0, x2, :lo12:.LANCHOR20
 	strb	w1, [x2, #:lo12:.LANCHOR20]
@@ -8763,44 +9071,44 @@ FlashGetReadRetryDefault:
 	strb	w1, [x0, 1]
 	mov	w1, 15
 	strb	w1, [x0, 2]
-	adrp	x1, .LANCHOR13
-	add	x1, x1, :lo12:.LANCHOR13
+	adrp	x1, .LANCHOR14
+	add	x1, x1, :lo12:.LANCHOR14
 	mov	w2, 64
-.L1249:
+.L1304:
 	add	x0, x0, 4
 	b	ftl_memcpy
-.L1240:
+.L1295:
 	sub	w0, w0, #65
 	cmp	w1, 33
 	ccmp	w0, 1, 0, ne
-	bhi	.L1241
+	bhi	.L1296
 	adrp	x2, .LANCHOR20
 	add	x0, x2, :lo12:.LANCHOR20
 	strb	w1, [x2, #:lo12:.LANCHOR20]
 	mov	w1, 4
-.L1250:
+.L1305:
 	strb	w1, [x0, 1]
 	mov	w1, 7
 	mov	w2, 45
 	strb	w1, [x0, 2]
-	adrp	x1, .LANCHOR9
-	add	x1, x1, :lo12:.LANCHOR9
-	b	.L1249
-.L1241:
+	adrp	x1, .LANCHOR10
+	add	x1, x1, :lo12:.LANCHOR10
+	b	.L1304
+.L1296:
 	cmp	w1, 34
 	mov	w0, 67
 	ccmp	w1, w0, 4, ne
-	bne	.L1242
+	bne	.L1297
 	adrp	x2, .LANCHOR20
 	add	x0, x2, :lo12:.LANCHOR20
 	strb	w1, [x2, #:lo12:.LANCHOR20]
 	mov	w1, 5
-	b	.L1250
-.L1242:
+	b	.L1305
+.L1297:
 	cmp	w1, 35
 	mov	w0, 68
 	ccmp	w1, w0, 4, ne
-	bne	.L1237
+	bne	.L1292
 	adrp	x2, .LANCHOR20
 	add	x0, x2, :lo12:.LANCHOR20
 	strb	w1, [x2, #:lo12:.LANCHOR20]
@@ -8809,10 +9117,10 @@ FlashGetReadRetryDefault:
 	mov	w1, 17
 	mov	w2, 95
 	strb	w1, [x0, 2]
-	adrp	x1, .LANCHOR8
-	add	x1, x1, :lo12:.LANCHOR8
-	b	.L1249
-.L1237:
+	adrp	x1, .LANCHOR9
+	add	x1, x1, :lo12:.LANCHOR9
+	b	.L1304
+.L1292:
 	ret
 	.size	FlashGetReadRetryDefault, .-FlashGetReadRetryDefault
 	.section	.text.FlashInit,"ax",@progbits
@@ -8832,55 +9140,55 @@ FlashInit:
 	adrp	x25, .LANCHOR3
 	stp	x27, x28, [sp, 80]
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR147
-	adrp	x26, .LANCHOR200
+	adrp	x1, .LANCHOR154
+	adrp	x26, .LANCHOR208
 	adrp	x21, .LANCHOR2
-	adrp	x22, .LANCHOR152
-	str	x0, [x1, #:lo12:.LANCHOR147]
+	adrp	x22, .LANCHOR158
+	str	x0, [x1, #:lo12:.LANCHOR154]
 	mov	w0, 32768
 	bl	ftl_malloc
 	adrp	x24, .LANCHOR0
-	adrp	x1, .LANCHOR153
+	adrp	x1, .LANCHOR152
 	add	x24, x24, :lo12:.LANCHOR0
 	mov	w23, 0
-	str	x0, [x1, #:lo12:.LANCHOR153]
+	str	x0, [x1, #:lo12:.LANCHOR152]
 	mov	w0, 4096
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR197
-	str	x0, [x1, #:lo12:.LANCHOR197]
+	adrp	x1, .LANCHOR205
+	str	x0, [x1, #:lo12:.LANCHOR205]
 	mov	w0, 32768
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR198
-	str	x0, [x1, #:lo12:.LANCHOR198]
+	adrp	x1, .LANCHOR206
+	str	x0, [x1, #:lo12:.LANCHOR206]
 	mov	w0, 4096
 	bl	ftl_malloc
-	strb	wzr, [x26, #:lo12:.LANCHOR200]
-	adrp	x1, .LANCHOR199
+	strb	wzr, [x26, #:lo12:.LANCHOR208]
+	adrp	x1, .LANCHOR207
 	strb	wzr, [x20, #:lo12:.LANCHOR30]
 	strb	wzr, [x21, #:lo12:.LANCHOR2]
-	str	x0, [x1, #:lo12:.LANCHOR199]
-	adrp	x1, .LANCHOR150
+	str	x0, [x1, #:lo12:.LANCHOR207]
+	adrp	x1, .LANCHOR157
 	mov	w0, 50
 	strb	w0, [x25, #:lo12:.LANCHOR3]
-	strb	w0, [x1, #:lo12:.LANCHOR150]
-	adrp	x0, .LANCHOR149
+	strb	w0, [x1, #:lo12:.LANCHOR157]
+	adrp	x0, .LANCHOR156
 	mov	w1, 128
-	str	wzr, [x0, #:lo12:.LANCHOR149]
+	str	wzr, [x0, #:lo12:.LANCHOR156]
 	adrp	x0, .LANCHOR4
 	str	w1, [x0, #:lo12:.LANCHOR4]
-	adrp	x0, .LANCHOR144
-	str	wzr, [x0, #:lo12:.LANCHOR144]
+	adrp	x0, .LANCHOR147
+	str	wzr, [x0, #:lo12:.LANCHOR147]
 	mov	w0, 60
-	strb	w0, [x22, #:lo12:.LANCHOR152]
+	strb	w0, [x22, #:lo12:.LANCHOR158]
 	mov	x0, x19
 	adrp	x19, .LANCHOR22
 	bl	NandcInit
 	add	x28, x19, :lo12:.LANCHOR22
 	str	x26, [x29, 120]
-	adrp	x26, .LC23
-	add	x0, x26, :lo12:.LC23
+	adrp	x26, .LC24
+	add	x0, x26, :lo12:.LC24
 	str	x0, [x29, 112]
-.L1257:
+.L1312:
 	ldrb	w2, [x24, 8]
 	and	w27, w23, 255
 	str	w2, [x29, 108]
@@ -8911,7 +9219,7 @@ FlashInit:
 	strb	w2, [x28, 4]
 	ldr	w2, [x26, 2048]
 	strb	w2, [x28, 5]
-	bne	.L1252
+	bne	.L1307
 	mov	w0, 239
 	str	w0, [x26, 2056]
 	mov	w0, 1
@@ -8923,14 +9231,14 @@ FlashInit:
 	str	wzr, [x26, 2048]
 	str	wzr, [x26, 2048]
 	str	wzr, [x26, 2048]
-.L1252:
+.L1307:
 	mov	w0, w27
 	bl	NandcFlashDeCs
 	ldrb	w2, [x28]
 	sub	w0, w2, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bhi	.L1253
+	bhi	.L1308
 	ldrb	w7, [x28, 5]
 	add	w1, w23, 1
 	ldrb	w6, [x28, 4]
@@ -8939,86 +9247,89 @@ FlashInit:
 	ldrb	w3, [x28, 1]
 	ldr	x0, [x29, 112]
 	bl	printf
-.L1253:
-	cbnz	w23, .L1254
+.L1308:
+	cbnz	w23, .L1309
 	ldrb	w0, [x19, #:lo12:.LANCHOR22]
 	add	x1, x19, :lo12:.LANCHOR22
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bhi	.L1301
+	bhi	.L1357
 	ldrb	w0, [x1, 1]
 	cmp	w0, 255
-	beq	.L1301
-.L1254:
+	beq	.L1357
+.L1309:
 	ldrb	w0, [x28]
 	cmp	w0, 181
-	bne	.L1256
+	bne	.L1311
 	mov	w0, 44
 	strb	w0, [x28]
-.L1256:
+.L1311:
 	add	w23, w23, 1
 	add	x24, x24, 16
 	add	x28, x28, 8
 	cmp	w23, 4
-	bne	.L1257
+	bne	.L1312
 	ldrb	w0, [x19, #:lo12:.LANCHOR22]
 	cmp	w0, 173
-	beq	.L1258
-	adrp	x0, .LANCHOR155
-	ldr	w0, [x0, #:lo12:.LANCHOR155]
+	beq	.L1313
+	adrp	x0, .LANCHOR160
+	ldr	w0, [x0, #:lo12:.LANCHOR160]
 	bl	NandcSetDdrMode
-.L1258:
-	adrp	x24, .LANCHOR18
+.L1313:
+	adrp	x24, .LANCHOR7
 	adrp	x27, .LANCHOR6
-	adrp	x26, .LANCHOR119
+	adrp	x26, .LANCHOR122
+	mov	w1, 0
 	adrp	x23, .LANCHOR20
 	mov	w2, 852
-	mov	w1, 0
 	add	x0, x23, :lo12:.LANCHOR20
 	bl	ftl_memset
 	adrp	x3, .LANCHOR31
-	ldr	w4, [x26, #:lo12:.LANCHOR119]
+	ldr	w4, [x26, #:lo12:.LANCHOR122]
 	add	x0, x3, :lo12:.LANCHOR31
 	strb	wzr, [x27, #:lo12:.LANCHOR6]
-	str	x0, [x24, #:lo12:.LANCHOR18]
-	mov	w0, 12336
-	movk	w0, 0x5638, lsl 16
-	cmp	w4, w0
-	bne	.L1259
+	str	x0, [x24, #:lo12:.LANCHOR7]
+	mov	w1, 12336
+	movk	w1, 0x5638, lsl 16
+	cmp	w4, w1
+	bne	.L1314
+	ldrb	w0, [x0, 19]
+	cmp	w0, 50
+	beq	.L1314
 	adrp	x0, .LANCHOR29
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR29]
-.L1259:
+.L1314:
 	add	x0, x19, :lo12:.LANCHOR22
 	ldrb	w2, [x0, 1]
 	add	w0, w2, 95
 	and	w1, w0, 255
 	mov	x0, 1
 	cmp	w1, 57
-	bhi	.L1260
+	bhi	.L1315
 	movk	x0, 0x205, lsl 48
 	lsr	x0, x0, x1
 	mvn	x0, x0
-.L1260:
+.L1315:
 	cmp	w2, 241
 	and	w0, w0, 1
 	cset	w1, eq
 	eor	w0, w0, 1
 	orr	w0, w1, w0
-	cbnz	w0, .L1261
+	cbnz	w0, .L1316
 	cmp	w2, 220
-	bne	.L1262
+	bne	.L1317
 	add	x0, x19, :lo12:.LANCHOR22
 	ldrb	w0, [x0, 3]
 	cmp	w0, 149
-	bne	.L1262
-.L1261:
-	adrp	x28, .LANCHOR201
-	add	x5, x28, :lo12:.LANCHOR201
+	bne	.L1317
+.L1316:
+	adrp	x28, .LANCHOR209
+	add	x5, x28, :lo12:.LANCHOR209
 	mov	w1, 16
 	strb	w1, [x25, #:lo12:.LANCHOR3]
-	strb	w1, [x22, #:lo12:.LANCHOR152]
+	strb	w1, [x22, #:lo12:.LANCHOR158]
 	mov	w0, 1
 	ldrb	w1, [x19, #:lo12:.LANCHOR22]
 	add	x6, x19, :lo12:.LANCHOR22
@@ -9026,237 +9337,248 @@ FlashInit:
 	strb	w1, [x5, 1]
 	cmp	w1, 152
 	strb	w2, [x5, 2]
-	bne	.L1264
+	bne	.L1319
 	ldrsb	w1, [x6, 4]
-	tbnz	w1, #31, .L1265
+	tbnz	w1, #31, .L1320
 	mov	w0, 24
-	strb	w0, [x22, #:lo12:.LANCHOR152]
-.L1264:
+	strb	w0, [x22, #:lo12:.LANCHOR158]
+.L1319:
 	cmp	w4, 2049
 	mov	w0, 12336
 	movk	w0, 0x5638, lsl 16
 	ccmp	w4, w0, 4, ne
-	bne	.L1267
+	bne	.L1322
 	mov	w0, 16
-	strb	w0, [x22, #:lo12:.LANCHOR152]
-.L1267:
+	strb	w0, [x22, #:lo12:.LANCHOR158]
+.L1322:
 	cmp	w2, 218
-	bne	.L1268
-	add	x0, x28, :lo12:.LANCHOR201
+	bne	.L1323
+	add	x0, x28, :lo12:.LANCHOR209
 	mov	w1, 2048
 	strh	w1, [x0, 14]
 	mov	w1, -38
-.L1335:
+.L1394:
 	strb	w1, [x0, 2]
-.L1269:
-	adrp	x1, .LANCHOR143
-	add	x1, x1, :lo12:.LANCHOR143
+.L1324:
+	adrp	x1, .LANCHOR146
+	add	x1, x1, :lo12:.LANCHOR146
 	mov	w2, 32
 	add	x1, x1, 32
 	str	x3, [x29, 120]
-	adrp	x0, .LANCHOR7
-	add	x0, x0, :lo12:.LANCHOR7
+	adrp	x0, .LANCHOR8
+	add	x0, x0, :lo12:.LANCHOR8
 	bl	ftl_memcpy
 	ldr	x3, [x29, 120]
 	mov	w2, 32
-	add	x1, x28, :lo12:.LANCHOR201
+	add	x1, x28, :lo12:.LANCHOR209
 	add	x0, x3, :lo12:.LANCHOR31
 	bl	ftl_memcpy
-.L1262:
+.L1317:
 	ldrb	w0, [x21, #:lo12:.LANCHOR2]
-	adrp	x22, .LANCHOR15
-	cbnz	w0, .L1272
+	adrp	x22, .LANCHOR16
+	cbnz	w0, .L1327
 	bl	FlashLoadPhyInfoInRam
-	cbnz	w0, .L1274
-	ldr	x0, [x24, #:lo12:.LANCHOR18]
-	adrp	x28, .LANCHOR24
+	cbnz	w0, .L1329
+	ldr	x0, [x24, #:lo12:.LANCHOR7]
+	adrp	x28, .LANCHOR25
 	ldrb	w1, [x0, 17]
 	and	w0, w1, 7
-	strb	w0, [x28, #:lo12:.LANCHOR24]
-	tbnz	x1, 0, .L1274
+	strb	w0, [x28, #:lo12:.LANCHOR25]
+	tbnz	x1, 0, .L1329
 	mov	w1, 1
 	strb	w1, [x20, #:lo12:.LANCHOR30]
 	bl	FlashSetInterfaceMode
-	ldrb	w0, [x28, #:lo12:.LANCHOR24]
+	ldrb	w0, [x28, #:lo12:.LANCHOR25]
 	bl	NandcSetMode
-.L1274:
-	ldr	x0, [x24, #:lo12:.LANCHOR18]
+.L1329:
+	ldr	x0, [x24, #:lo12:.LANCHOR7]
 	ldrb	w0, [x0, 26]
-	strb	w0, [x22, #:lo12:.LANCHOR15]
+	strb	w0, [x22, #:lo12:.LANCHOR16]
 	bl	FlashLoadPhyInfo
-	cbz	w0, .L1272
-	ldr	x0, [x24, #:lo12:.LANCHOR18]
+	cbz	w0, .L1327
+	ldr	x0, [x24, #:lo12:.LANCHOR7]
 	ldrh	w1, [x0, 14]
-	adrp	x0, .LC24
-	add	x0, x0, :lo12:.LC24
+	adrp	x0, .LC25
+	add	x0, x0, :lo12:.LC25
 	bl	printf
 	bl	FlashLoadPhyInfoInRam
 	cmn	w0, #1
-	beq	.L1251
+	beq	.L1306
 	bl	FlashDieInfoInit
-	ldr	x0, [x24, #:lo12:.LANCHOR18]
+	ldr	x0, [x24, #:lo12:.LANCHOR7]
 	ldrb	w0, [x0, 19]
 	bl	FlashGetReadRetryDefault
-	ldr	x0, [x24, #:lo12:.LANCHOR18]
-	adrp	x1, .LANCHOR122
-	ldrh	w1, [x1, #:lo12:.LANCHOR122]
+	ldr	x0, [x24, #:lo12:.LANCHOR7]
+	adrp	x1, .LANCHOR125
+	ldrh	w1, [x1, #:lo12:.LANCHOR125]
 	ldrb	w2, [x0, 9]
 	add	w1, w1, 4095
 	cmp	w2, w1, lsr 12
-	blt	.L1277
+	blt	.L1332
 	ldrh	w1, [x0, 14]
 	add	w1, w1, 255
 	cmp	w2, w1, lsr 8
-	bge	.L1278
-.L1277:
+	bge	.L1333
+.L1332:
 	ldrh	w1, [x0, 14]
 	and	w1, w1, -256
 	strh	w1, [x0, 14]
-.L1278:
-	adrp	x0, .LANCHOR24
-	ldrb	w0, [x0, #:lo12:.LANCHOR24]
+.L1333:
+	adrp	x0, .LANCHOR25
+	ldrb	w0, [x0, #:lo12:.LANCHOR25]
 	tst	w0, 6
-	beq	.L1279
+	beq	.L1334
 	bl	FlashSavePhyInfo
-	adrp	x0, .LANCHOR148
-	ldr	w1, [x0, #:lo12:.LANCHOR148]
+	mov	w0, 0
+	bl	flash_enter_slc_mode
+	adrp	x0, .LANCHOR155
+	ldr	w1, [x0, #:lo12:.LANCHOR155]
 	mov	w0, 0
 	bl	FlashDdrParaScan
-.L1279:
+	mov	w0, 0
+	bl	flash_exit_slc_mode
+.L1334:
 	bl	FlashSavePhyInfo
-.L1272:
-	ldr	x2, [x24, #:lo12:.LANCHOR18]
-	adrp	x28, .LANCHOR145
-	str	xzr, [x28, #:lo12:.LANCHOR145]
+.L1327:
+	ldr	x2, [x24, #:lo12:.LANCHOR7]
+	adrp	x28, .LANCHOR148
+	str	xzr, [x28, #:lo12:.LANCHOR148]
 	ldrb	w0, [x2, 26]
-	strb	w0, [x22, #:lo12:.LANCHOR15]
+	strb	w0, [x22, #:lo12:.LANCHOR16]
 	ldrh	w0, [x2, 16]
 	ubfx	x1, x0, 7, 1
 	strb	w1, [x27, #:lo12:.LANCHOR6]
-	adrp	x1, .LANCHOR202
+	adrp	x1, .LANCHOR210
 	ubfx	x3, x0, 3, 1
-	adrp	x27, .LANCHOR24
-	strb	w3, [x1, #:lo12:.LANCHOR202]
-	adrp	x1, .LANCHOR27
+	adrp	x27, .LANCHOR25
+	strb	w3, [x1, #:lo12:.LANCHOR210]
+	adrp	x1, .LANCHOR28
 	ubfx	x3, x0, 4, 1
 	ubfx	x0, x0, 8, 3
-	strb	w3, [x1, #:lo12:.LANCHOR27]
-	strb	w0, [x27, #:lo12:.LANCHOR24]
+	strb	w3, [x1, #:lo12:.LANCHOR28]
+	strb	w0, [x27, #:lo12:.LANCHOR25]
 	ldrh	w1, [x2, 10]
 	ldrb	w0, [x2, 12]
 	sdiv	w1, w1, w0
 	ldrb	w0, [x2, 18]
 	bl	BuildFlashLsbPageTable
 	bl	FlashDieInfoInit
-	ldr	x0, [x24, #:lo12:.LANCHOR18]
+	ldr	x0, [x24, #:lo12:.LANCHOR7]
 	ldrh	w1, [x0, 16]
-	tbz	x1, 6, .L1281
+	tbz	x1, 6, .L1336
 	add	x3, x23, :lo12:.LANCHOR20
-	adrp	x1, .LANCHOR10
+	adrp	x1, .LANCHOR11
 	ldrb	w0, [x0, 19]
-	adrp	x2, .LANCHOR12
-	strb	w0, [x1, #:lo12:.LANCHOR10]
+	adrp	x2, .LANCHOR13
+	strb	w0, [x1, #:lo12:.LANCHOR11]
 	mov	x4, x2
 	ldrb	w1, [x3, 1]
-	strb	w1, [x2, #:lo12:.LANCHOR12]
-	adrp	x1, .LANCHOR151
+	strb	w1, [x2, #:lo12:.LANCHOR13]
+	adrp	x1, .LANCHOR149
 	ldrb	w3, [x3, 2]
-	strb	w3, [x1, #:lo12:.LANCHOR151]
+	strb	w3, [x1, #:lo12:.LANCHOR149]
 	sub	w3, w0, #1
 	and	w3, w3, 255
 	cmp	w3, 7
-	bhi	.L1282
+	bhi	.L1337
 	adrp	x1, HynixReadRetrial
 	add	x1, x1, :lo12:HynixReadRetrial
-	str	x1, [x28, #:lo12:.LANCHOR145]
+	str	x1, [x28, #:lo12:.LANCHOR148]
 	sub	w1, w0, #5
 	and	w1, w1, 255
 	cmp	w1, 1
 	ccmp	w0, 8, 4, hi
-	bne	.L1283
+	bne	.L1338
 	adrp	x1, .LANCHOR36
 	mov	w2, 1
 	str	w2, [x1, #:lo12:.LANCHOR36]
-.L1283:
+.L1338:
 	add	x23, x23, :lo12:.LANCHOR20
 	cmp	w0, 7
-	beq	.L1336
+	beq	.L1395
 	cmp	w0, 8
-	bne	.L1304
-.L1336:
+	bne	.L1360
+.L1395:
 	add	x23, x23, 28
-.L1284:
+.L1339:
 	mov	x1, 0
 	mov	w2, 0
-.L1286:
+.L1341:
 	ldrsb	w3, [x23, x1]
 	add	x1, x1, 1
 	cmp	w3, 0
 	cinc	w2, w2, eq
 	cmp	x1, 32
-	bne	.L1286
+	bne	.L1341
 	cmp	w2, 27
-	bls	.L1281
+	bls	.L1336
 	bl	FlashGetReadRetryDefault
 	bl	FlashSavePhyInfo
-.L1281:
-	ldr	w1, [x26, #:lo12:.LANCHOR119]
+.L1336:
+	ldr	w1, [x26, #:lo12:.LANCHOR122]
 	mov	w0, 12336
 	movk	w0, 0x5638, lsl 16
 	cmp	w1, w0
-	bne	.L1295
-	ldrb	w0, [x22, #:lo12:.LANCHOR15]
-	cbz	w0, .L1295
-	ldr	x0, [x24, #:lo12:.LANCHOR18]
+	bne	.L1351
+	ldrb	w0, [x22, #:lo12:.LANCHOR16]
+	cbz	w0, .L1351
+	ldr	x0, [x24, #:lo12:.LANCHOR7]
 	strb	wzr, [x0, 18]
-.L1295:
+.L1351:
 	ldrb	w0, [x19, #:lo12:.LANCHOR22]
 	cmp	w0, 44
-	bne	.L1296
+	bne	.L1352
 	ldrb	w0, [x20, #:lo12:.LANCHOR30]
-	cbz	w0, .L1296
+	cbz	w0, .L1352
 	strb	wzr, [x20, #:lo12:.LANCHOR30]
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
 	bl	NandcSetMode
-.L1296:
-	ldrb	w0, [x27, #:lo12:.LANCHOR24]
+.L1352:
+	ldrb	w0, [x27, #:lo12:.LANCHOR25]
 	tst	w0, 6
-	beq	.L1297
+	beq	.L1353
 	ldrb	w1, [x20, #:lo12:.LANCHOR30]
-	cbnz	w1, .L1298
-	tbnz	x0, 0, .L1297
-.L1298:
+	cbnz	w1, .L1354
+	tbnz	x0, 0, .L1353
+.L1354:
 	mov	w0, 0
 	bl	flash_enter_slc_mode
-	adrp	x0, .LANCHOR148
-	ldr	w1, [x0, #:lo12:.LANCHOR148]
+	adrp	x0, .LANCHOR155
+	ldr	w1, [x0, #:lo12:.LANCHOR155]
 	mov	w0, 0
 	bl	FlashDdrParaScan
 	mov	w0, 0
 	bl	flash_exit_slc_mode
-.L1297:
-	ldr	x0, [x24, #:lo12:.LANCHOR18]
+.L1353:
+	ldr	x0, [x24, #:lo12:.LANCHOR7]
 	ldrb	w0, [x0, 20]
 	bl	FlashBchSel
-	adrp	x0, .LANCHOR141
-	add	x0, x0, :lo12:.LANCHOR141
+	adrp	x0, .LANCHOR144
+	add	x0, x0, :lo12:.LANCHOR144
 	bl	FlashReadIdbDataRaw
-	ldr	x2, [x24, #:lo12:.LANCHOR18]
+	ldr	x2, [x24, #:lo12:.LANCHOR7]
 	mov	w0, 16
-	adrp	x1, .LANCHOR14
+	adrp	x5, .LANCHOR15
 	strb	w0, [x25, #:lo12:.LANCHOR3]
-	add	x0, x1, :lo12:.LANCHOR14
+	add	x0, x5, :lo12:.LANCHOR15
+	ldrb	w6, [x19, #:lo12:.LANCHOR22]
 	ldrb	w3, [x2, 12]
 	strh	w3, [x0, 8]
-	ldrb	w4, [x2, 7]
-	str	w4, [x0, 4]
-	ldr	w4, [x19, #:lo12:.LANCHOR22]
-	str	w4, [x1, #:lo12:.LANCHOR14]
-	adrp	x1, .LANCHOR25
-	ldrh	w4, [x2, 14]
-	ldrb	w1, [x1, #:lo12:.LANCHOR25]
+	ldrb	w1, [x2, 7]
+	str	w1, [x0, 4]
+	add	x1, x19, :lo12:.LANCHOR22
+	ldrb	w4, [x1, 1]
+	ldrb	w1, [x1, 3]
+	orr	w1, w6, w1, lsl 24
+	lsl	w6, w4, 16
+	orr	w4, w6, w4, lsl 8
+	orr	w1, w1, w4
+	str	w1, [x5, #:lo12:.LANCHOR15]
+	adrp	x1, .LANCHOR26
+	ldrh	w4, [x2, 14]
+	ldrb	w1, [x1, #:lo12:.LANCHOR26]
 	strh	w1, [x0, 10]
 	ldrb	w1, [x2, 13]
 	strh	w1, [x0, 12]
@@ -9277,7 +9599,7 @@ FlashInit:
 	strh	w1, [x0, 22]
 	ldrb	w5, [x21, #:lo12:.LANCHOR2]
 	cmp	w5, 1
-	bne	.L1299
+	bne	.L1355
 	ubfiz	w1, w1, 1, 15
 	lsr	w4, w4, 1
 	ubfiz	w3, w3, 1, 15
@@ -9286,11 +9608,11 @@ FlashInit:
 	mov	w1, 8
 	strh	w3, [x0, 20]
 	strh	w1, [x0, 26]
-.L1299:
+.L1355:
 	ldrb	w0, [x2, 20]
 	bl	FlashBchSel
 	mov	w0, 0
-.L1251:
+.L1306:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9298,100 +9620,109 @@ FlashInit:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1268:
+.L1323:
 	cmp	w2, 220
-	bne	.L1270
-	add	x0, x28, :lo12:.LANCHOR201
+	bne	.L1325
+	add	x0, x28, :lo12:.LANCHOR209
 	mov	w1, 4096
 	strh	w1, [x0, 14]
 	mov	w1, -36
-	b	.L1335
-.L1270:
+	b	.L1394
+.L1325:
 	cmp	w2, 211
-	bne	.L1269
-	add	x0, x28, :lo12:.LANCHOR201
+	bne	.L1324
+	add	x0, x28, :lo12:.LANCHOR209
 	mov	w1, 4096
 	strh	w1, [x0, 14]
 	mov	w1, 2
 	strb	w1, [x0, 13]
-	b	.L1269
-.L1304:
+	b	.L1324
+.L1360:
 	add	x23, x23, 20
-	b	.L1284
-.L1282:
+	b	.L1339
+.L1337:
 	sub	w3, w0, #17
 	and	w3, w3, 255
 	cmp	w3, 2
-	bhi	.L1288
+	bhi	.L1343
 	adrp	x2, MicronReadRetrial
 	add	x2, x2, :lo12:MicronReadRetrial
-	str	x2, [x28, #:lo12:.LANCHOR145]
+	str	x2, [x28, #:lo12:.LANCHOR148]
 	cmp	w0, 19
-	beq	.L1289
-.L1340:
+	beq	.L1344
+.L1399:
 	mov	w0, 7
-	b	.L1338
-.L1289:
+	b	.L1397
+.L1344:
 	mov	w0, 15
-.L1338:
-	strb	w0, [x1, #:lo12:.LANCHOR151]
-	b	.L1281
-.L1288:
+.L1397:
+	strb	w0, [x1, #:lo12:.LANCHOR149]
+	b	.L1336
+.L1343:
 	sub	w3, w0, #65
 	cmp	w0, 33
 	and	w3, w3, 255
 	ccmp	w3, 1, 0, ne
-	bhi	.L1290
+	bhi	.L1345
 	adrp	x0, ToshibaReadRetrial
 	add	x0, x0, :lo12:ToshibaReadRetrial
-	str	x0, [x28, #:lo12:.LANCHOR145]
+	str	x0, [x28, #:lo12:.LANCHOR148]
 	mov	w0, 4
-	strb	w0, [x2, #:lo12:.LANCHOR12]
-	b	.L1340
-.L1290:
+	strb	w0, [x2, #:lo12:.LANCHOR13]
+	b	.L1399
+.L1345:
 	sub	w3, w0, #34
 	sub	w2, w0, #67
 	and	w3, w3, 255
 	and	w2, w2, 255
 	cmp	w3, 1
 	ccmp	w2, 1, 0, hi
-	bhi	.L1291
+	bhi	.L1346
 	adrp	x3, ToshibaReadRetrial
 	add	x3, x3, :lo12:ToshibaReadRetrial
-	str	x3, [x28, #:lo12:.LANCHOR145]
+	str	x3, [x28, #:lo12:.LANCHOR148]
 	cmp	w0, 35
 	mov	w3, 68
 	ccmp	w0, w3, 4, ne
-	beq	.L1292
+	beq	.L1347
 	mov	w0, 7
-.L1337:
-	strb	w0, [x1, #:lo12:.LANCHOR151]
+.L1396:
+	strb	w0, [x1, #:lo12:.LANCHOR149]
 	cmp	w2, 1
-	bhi	.L1294
+	bhi	.L1349
 	mov	w0, 4
-.L1339:
-	strb	w0, [x4, #:lo12:.LANCHOR12]
-	b	.L1281
-.L1292:
+.L1398:
+	strb	w0, [x4, #:lo12:.LANCHOR13]
+	b	.L1336
+.L1347:
 	mov	w0, 17
-	b	.L1337
-.L1294:
+	b	.L1396
+.L1349:
 	mov	w0, 5
-	b	.L1339
-.L1291:
+	b	.L1398
+.L1346:
 	cmp	w0, 49
-	bne	.L1281
+	bne	.L1350
 	adrp	x0, SamsungReadRetrial
 	add	x0, x0, :lo12:SamsungReadRetrial
-	str	x0, [x28, #:lo12:.LANCHOR145]
-	b	.L1281
-.L1301:
+	str	x0, [x28, #:lo12:.LANCHOR148]
+	b	.L1336
+.L1350:
+	cmp	w0, 50
+	bne	.L1336
+	adrp	x0, samsung_read_retrial
+	add	x0, x0, :lo12:samsung_read_retrial
+	str	x0, [x28, #:lo12:.LANCHOR148]
+	adrp	x0, .LANCHOR29
+	str	wzr, [x0, #:lo12:.LANCHOR29]
+	b	.L1336
+.L1357:
 	mov	w0, -2
-	b	.L1251
-.L1265:
+	b	.L1306
+.L1320:
 	ldr	x1, [x29, 120]
-	strb	w0, [x1, #:lo12:.LANCHOR200]
-	b	.L1264
+	strb	w0, [x1, #:lo12:.LANCHOR208]
+	b	.L1319
 	.size	FlashInit, .-FlashInit
 	.section	.text.FlashReadSlc2KPages,"ax",@progbits
 	.align	2
@@ -9411,16 +9742,16 @@ FlashReadSlc2KPages:
 	ldrb	w25, [x2, #:lo12:.LANCHOR31+9]
 	nop // between mem op and mult-accumulate
 	umaddl	x0, w1, w22, x0
-	adrp	x26, .LANCHOR200
+	adrp	x26, .LANCHOR208
 	str	x0, [x29, 120]
 	stp	x23, x24, [sp, 48]
-	add	x0, x26, :lo12:.LANCHOR200
+	add	x0, x26, :lo12:.LANCHOR208
 	stp	x27, x28, [sp, 80]
 	str	x0, [x29, 104]
-.L1342:
+.L1401:
 	ldr	x0, [x29, 120]
 	cmp	x19, x0
-	bne	.L1362
+	bne	.L1421
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -9429,29 +9760,29 @@ FlashReadSlc2KPages:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1362:
+.L1421:
 	ldr	w1, [x29, 116]
 	mov	w4, w21
 	add	x3, x29, 136
 	add	x2, x29, 140
 	mov	x0, x19
 	bl	LogAddr2PhyAddr
-	adrp	x0, .LANCHOR25
+	adrp	x0, .LANCHOR26
 	ldr	w1, [x29, 136]
-	ldrb	w0, [x0, #:lo12:.LANCHOR25]
+	ldrb	w0, [x0, #:lo12:.LANCHOR26]
 	cmp	w0, w1
-	bhi	.L1343
+	bhi	.L1402
 	mov	w0, -1
 	str	w0, [x19]
-.L1344:
+.L1403:
 	sub	w21, w21, #1
 	add	x19, x19, 56
 	and	w21, w21, 255
-	b	.L1342
-.L1343:
-	adrp	x0, .LANCHOR26
-	add	x0, x0, :lo12:.LANCHOR26
-	add	x23, x26, :lo12:.LANCHOR200
+	b	.L1401
+.L1402:
+	adrp	x0, .LANCHOR27
+	add	x0, x0, :lo12:.LANCHOR27
+	add	x23, x26, :lo12:.LANCHOR208
 	mov	w22, 0
 	mov	w24, 256
 	ldrb	w20, [x0, w1, uxtw]
@@ -9459,7 +9790,7 @@ FlashReadSlc2KPages:
 	bl	NandcWaitFlashReady
 	mov	w0, w20
 	bl	NandcFlashCs
-.L1345:
+.L1404:
 	ldr	w1, [x29, 140]
 	mov	w0, w20
 	bl	FlashReadCmd
@@ -9472,25 +9803,25 @@ FlashReadSlc2KPages:
 	bl	NandcXferData
 	mov	w28, w0
 	ldrb	w0, [x23]
-	cbz	w0, .L1346
+	cbz	w0, .L1405
 	mov	w0, w20
 	bl	flash_read_ecc
 	cmp	w0, 5
 	csel	w28, w28, w24, ls
-.L1346:
+.L1405:
 	cmp	w22, 9
 	ccmn	w28, #1, 0, ls
-	bne	.L1347
+	bne	.L1406
 	add	w22, w22, 1
-	b	.L1345
-.L1347:
+	b	.L1404
+.L1406:
 	cmp	w22, 0
 	mov	w23, 256
 	adrp	x24, .LANCHOR4
 	csel	w28, w28, w23, eq
 	add	x24, x24, :lo12:.LANCHOR4
 	mov	w22, 0
-.L1349:
+.L1408:
 	ldr	w0, [x24]
 	ldr	w1, [x29, 140]
 	add	w1, w1, w0
@@ -9513,18 +9844,18 @@ FlashReadSlc2KPages:
 	mov	w27, w0
 	ldr	x0, [x29, 104]
 	ldrb	w0, [x0]
-	cbz	w0, .L1352
+	cbz	w0, .L1411
 	mov	w0, w20
 	bl	flash_read_ecc
 	cmp	w0, 5
 	csel	w27, w27, w23, ls
-.L1352:
+.L1411:
 	cmp	w22, 9
 	ccmn	w27, #1, 0, ls
-	bne	.L1353
+	bne	.L1412
 	add	w22, w22, 1
-	b	.L1349
-.L1353:
+	b	.L1408
+.L1412:
 	cmp	w22, 0
 	mov	w3, 256
 	mov	w0, w20
@@ -9536,50 +9867,50 @@ FlashReadSlc2KPages:
 	ldrb	w2, [x0, #:lo12:.LANCHOR33]
 	add	w0, w2, w2, lsl 1
 	cmp	w5, w0, lsr 2
-	bls	.L1355
+	bls	.L1414
 	cmn	w5, #1
 	csel	w5, w5, w3, eq
-.L1355:
+.L1414:
 	cmp	w5, 256
 	ldr	x0, [x19, 16]
 	ccmn	w5, #1, 4, ne
 	csel	w5, w5, wzr, eq
 	str	w5, [x19]
-	cbz	x0, .L1358
+	cbz	x0, .L1417
 	ldr	w1, [x0, 12]
 	cmn	w1, #1
-	bne	.L1358
+	bne	.L1417
 	ldr	w1, [x0, 8]
 	cmn	w1, #1
-	bne	.L1358
+	bne	.L1417
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L1358
+	beq	.L1417
 	str	w1, [x19]
-.L1358:
+.L1417:
 	ldr	w3, [x19]
 	cmn	w3, #1
-	bne	.L1344
+	bne	.L1403
 	ldr	w1, [x19, 4]
-	adrp	x0, .LC25
-	add	x0, x0, :lo12:.LC25
+	adrp	x0, .LC26
+	add	x0, x0, :lo12:.LC26
 	bl	printf
 	ldr	x1, [x19, 8]
-	cbz	x1, .L1360
-	adrp	x0, .LC26
+	cbz	x1, .L1419
+	adrp	x0, .LC27
 	mov	w3, 8
 	mov	w2, 4
-	add	x0, x0, :lo12:.LC26
+	add	x0, x0, :lo12:.LC27
 	bl	rknand_print_hex
-.L1360:
+.L1419:
 	ldr	x1, [x19, 16]
-	cbz	x1, .L1344
+	cbz	x1, .L1403
 	mov	w3, 4
-	adrp	x0, .LC27
+	adrp	x0, .LC28
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC27
+	add	x0, x0, :lo12:.LC28
 	bl	rknand_print_hex
-	b	.L1344
+	b	.L1403
 	.size	FlashReadSlc2KPages, .-FlashReadSlc2KPages
 	.section	.text.FlashReadPages,"ax",@progbits
 	.align	2
@@ -9596,7 +9927,7 @@ FlashReadPages:
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	stp	w2, w1, [x29, 148]
-	cbnz	w3, .L1391
+	cbnz	w3, .L1450
 	mov	x25, x0
 	adrp	x0, .LANCHOR31+9
 	adrp	x27, .LANCHOR20
@@ -9612,15 +9943,15 @@ FlashReadPages:
 	str	x0, [x29, 104]
 	add	x0, x0, 4
 	str	x0, [x29, 96]
-.L1392:
+.L1451:
 	ldr	w0, [x29, 152]
 	cmp	w22, w0
-	bcc	.L1426
+	bcc	.L1485
 	mov	w0, 0
-	b	.L1390
-.L1391:
+	b	.L1449
+.L1450:
 	bl	FlashReadSlc2KPages
-.L1390:
+.L1449:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9628,7 +9959,7 @@ FlashReadPages:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1426:
+.L1485:
 	mov	w26, 56
 	add	x3, x29, 168
 	ldp	w1, w0, [x29, 148]
@@ -9640,34 +9971,34 @@ FlashReadPages:
 	ldr	w24, [x21, 4]
 	bl	LogAddr2PhyAddr
 	mov	w20, w0
-	adrp	x0, .LANCHOR25
+	adrp	x0, .LANCHOR26
 	ldr	w1, [x29, 168]
-	ldrb	w0, [x0, #:lo12:.LANCHOR25]
+	ldrb	w0, [x0, #:lo12:.LANCHOR26]
 	cmp	w0, w1
-	bhi	.L1394
+	bhi	.L1453
 	mov	w0, -1
 	str	w0, [x25, x26]
-.L1395:
+.L1454:
 	add	w22, w22, 1
-	b	.L1392
-.L1394:
-	adrp	x0, .LANCHOR26
-	add	x0, x0, :lo12:.LANCHOR26
+	b	.L1451
+.L1453:
+	adrp	x0, .LANCHOR27
+	add	x0, x0, :lo12:.LANCHOR27
 	ldrb	w19, [x0, w1, uxtw]
-	adrp	x0, .LANCHOR202
-	ldrb	w0, [x0, #:lo12:.LANCHOR202]
+	adrp	x0, .LANCHOR210
+	ldrb	w0, [x0, #:lo12:.LANCHOR210]
 	cmp	w0, 0
 	mov	w0, w19
 	csel	w20, w20, wzr, ne
 	bl	NandcWaitFlashReady
-	adrp	x2, .LANCHOR18
+	adrp	x2, .LANCHOR7
 	str	x2, [x29, 120]
-	ldr	x0, [x2, #:lo12:.LANCHOR18]
+	ldr	x0, [x2, #:lo12:.LANCHOR7]
 	ldrb	w1, [x0, 19]
 	sub	w0, w1, #1
 	and	w0, w0, 255
 	cmp	w0, 7
-	bhi	.L1397
+	bhi	.L1456
 	add	x0, x27, :lo12:.LANCHOR20
 	sxtw	x2, w19
 	add	x0, x0, x2
@@ -9675,59 +10006,59 @@ FlashReadPages:
 	and	w1, w1, 255
 	cmp	w1, 1
 	ldrb	w3, [x0, 12]
-	bhi	.L1398
+	bhi	.L1457
 	ldrb	w3, [x0, 20]
-.L1398:
+.L1457:
 	adrp	x0, .LANCHOR21
 	add	x0, x0, :lo12:.LANCHOR21
 	ldrb	w0, [x0, x2]
 	cmp	w0, w3
-	beq	.L1397
+	beq	.L1456
 	ldp	x2, x0, [x29, 96]
 	ldrb	w1, [x0, 1]
 	mov	w0, w19
 	bl	HynixSetRRPara
-.L1397:
+.L1456:
 	mov	w0, w19
 	bl	NandcFlashCs
 	ldr	w0, [x29, 148]
 	cmp	w0, 1
 	cset	w0, eq
 	orr	w24, w0, w24, lsr 31
-	cbz	w24, .L1399
-	adrp	x0, .LANCHOR15
-	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L1399
+	cbz	w24, .L1458
+	adrp	x0, .LANCHOR16
+	ldrb	w0, [x0, #:lo12:.LANCHOR16]
+	cbz	w0, .L1458
 	mov	w0, w19
 	bl	flash_enter_slc_mode
-.L1400:
+.L1459:
 	adrp	x0, .LANCHOR4
 	add	x0, x0, :lo12:.LANCHOR4
 	str	x0, [x29, 112]
 	ldr	x0, [x29, 128]
 	add	x0, x0, :lo12:.LANCHOR6
 	str	x0, [x29, 136]
-.L1406:
+.L1465:
 	ldr	w1, [x29, 172]
 	cmn	w1, #1
-	bne	.L1401
+	bne	.L1460
 	cmp	w19, 255
-	beq	.L1428
-.L1401:
-	cbz	w20, .L1403
+	beq	.L1487
+.L1460:
+	cbz	w20, .L1462
 	ldr	x0, [x29, 112]
 	ldr	w2, [x0]
 	mov	w0, w19
 	add	w2, w1, w2
 	bl	FlashReadDpCmd
-.L1404:
+.L1463:
 	mov	w0, w19
 	bl	NandcWaitFlashReady
-	cbz	w20, .L1402
+	cbz	w20, .L1461
 	ldr	w1, [x29, 172]
 	mov	w0, w19
 	bl	FlashReadDpDataOutCmd
-.L1402:
+.L1461:
 	ldrb	w2, [x29, 156]
 	mov	w1, 0
 	ldp	x3, x4, [x21, 8]
@@ -9736,26 +10067,26 @@ FlashReadPages:
 	mov	w28, w0
 	ldr	x0, [x29, 136]
 	ldrb	w0, [x0]
-	cbz	w0, .L1405
+	cbz	w0, .L1464
 	cmn	w28, #1
-	bne	.L1405
+	bne	.L1464
 	ldr	x0, [x29, 136]
 	mov	w20, 0
 	strb	wzr, [x0]
-	b	.L1406
-.L1399:
+	b	.L1465
+.L1458:
 	mov	w0, w19
 	bl	flash_exit_slc_mode
-	b	.L1400
-.L1403:
+	b	.L1459
+.L1462:
 	mov	w0, w19
 	bl	FlashReadCmd
-	b	.L1404
-.L1428:
+	b	.L1463
+.L1487:
 	mov	w20, 0
-	b	.L1402
-.L1405:
-	cbz	w20, .L1407
+	b	.L1461
+.L1464:
+	cbz	w20, .L1466
 	adrp	x0, .LANCHOR4
 	ldr	w1, [x29, 172]
 	ldr	w0, [x0, #:lo12:.LANCHOR4]
@@ -9774,27 +10105,27 @@ FlashReadPages:
 	cmn	w0, #1
 	mov	w23, w0
 	csel	w20, w20, wzr, ne
-.L1407:
+.L1466:
 	mov	w0, w19
 	bl	NandcFlashDeCs
 	ldr	x0, [x29, 128]
 	cmn	w28, #1
 	ldrb	w1, [x29, 144]
 	strb	w1, [x0, #:lo12:.LANCHOR6]
-	bne	.L1408
+	bne	.L1467
 	adrp	x0, .LANCHOR30
 	ldrb	w0, [x0, #:lo12:.LANCHOR30]
-	cbnz	w0, .L1409
-.L1413:
-	adrp	x20, .LANCHOR145
-	ldr	x4, [x20, #:lo12:.LANCHOR145]
-	cbnz	x4, .L1410
+	cbnz	w0, .L1468
+.L1472:
+	adrp	x20, .LANCHOR148
+	ldr	x4, [x20, #:lo12:.LANCHOR148]
+	cbnz	x4, .L1469
 	ldr	w1, [x29, 172]
 	mov	w0, w19
 	ldp	x2, x3, [x21, 8]
 	bl	FlashReadRawPage
-	b	.L1465
-.L1409:
+	b	.L1524
+.L1468:
 	adrp	x0, .LANCHOR19
 	ldr	w1, [x29, 172]
 	ldp	x2, x3, [x21, 8]
@@ -9805,62 +10136,62 @@ FlashReadPages:
 	bl	FlashDdrTunningRead
 	mov	w28, w0
 	cmn	w0, #1
-	beq	.L1412
+	beq	.L1471
 	adrp	x0, .LANCHOR33
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	cmp	w28, w0, lsr 1
-	bls	.L1429
-.L1412:
+	bls	.L1488
+.L1471:
 	lsr	w0, w20, 8
 	bl	NandcSetDdrPara
 	cmn	w28, #1
-	beq	.L1413
-.L1429:
+	beq	.L1472
+.L1488:
 	mov	w20, 0
-.L1408:
+.L1467:
 	adrp	x0, .LANCHOR33
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bls	.L1414
-	adrp	x0, .LANCHOR145
-	ldr	x0, [x0, #:lo12:.LANCHOR145]
+	bls	.L1473
+	adrp	x0, .LANCHOR148
+	ldr	x0, [x0, #:lo12:.LANCHOR148]
 	cmp	x0, 0
 	mov	w0, 256
 	csel	w28, w28, w0, ne
-.L1414:
+.L1473:
 	cmp	w28, 256
 	ccmn	w28, #1, 4, ne
 	csel	w3, w28, wzr, eq
 	str	w3, [x25, x26]
 	cmn	w3, #1
-	bne	.L1421
+	bne	.L1480
 	adrp	x0, .LANCHOR33
 	ldr	w1, [x21, 4]
 	ldrb	w2, [x0, #:lo12:.LANCHOR33]
-	adrp	x0, .LC25
-	add	x0, x0, :lo12:.LC25
+	adrp	x0, .LC26
+	add	x0, x0, :lo12:.LC26
 	bl	printf
 	ldr	x1, [x21, 16]
-	cbz	x1, .L1421
+	cbz	x1, .L1480
 	mov	w3, 4
-	adrp	x0, .LC27
+	adrp	x0, .LC28
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC27
+	add	x0, x0, :lo12:.LC28
 	bl	rknand_print_hex
-.L1421:
-	cbz	w20, .L1423
+.L1480:
+	cbz	w20, .L1482
 	adrp	x0, .LANCHOR33
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w23, w0, lsr 2
-	bls	.L1424
-	adrp	x0, .LANCHOR145
-	ldr	x0, [x0, #:lo12:.LANCHOR145]
+	bls	.L1483
+	adrp	x0, .LANCHOR148
+	ldr	x0, [x0, #:lo12:.LANCHOR148]
 	cmp	x0, 0
 	mov	w0, 256
 	csel	w23, w23, w0, ne
-.L1424:
+.L1483:
 	add	w0, w22, 1
 	mov	w1, 56
 	cmp	w23, 256
@@ -9868,37 +10199,37 @@ FlashReadPages:
 	umull	x0, w0, w1
 	csel	w1, w23, wzr, eq
 	str	w1, [x25, x0]
-.L1423:
+.L1482:
 	add	w22, w22, w20
-	cbz	w24, .L1395
-	adrp	x0, .LANCHOR15
-	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L1395
+	cbz	w24, .L1454
+	adrp	x0, .LANCHOR16
+	ldrb	w0, [x0, #:lo12:.LANCHOR16]
+	cbz	w0, .L1454
 	mov	w0, w19
 	bl	flash_exit_slc_mode
-	b	.L1395
-.L1410:
+	b	.L1454
+.L1469:
 	ldr	w1, [x29, 172]
 	mov	w0, w19
 	ldp	x2, x3, [x21, 8]
 	blr	x4
 	mov	w28, w0
 	cmn	w0, #1
-	bne	.L1432
+	bne	.L1491
 	ldr	x0, [x29, 120]
-	ldr	x0, [x0, #:lo12:.LANCHOR18]
+	ldr	x0, [x0, #:lo12:.LANCHOR7]
 	ldrb	w0, [x0, 19]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 7
-	bhi	.L1415
+	bhi	.L1474
 	add	x0, x27, :lo12:.LANCHOR20
 	mov	w3, 0
 	add	x2, x0, 4
 	ldrb	w1, [x0, 1]
 	mov	w0, w19
 	bl	HynixSetRRPara
-.L1415:
+.L1474:
 	ldp	x2, x3, [x21, 8]
 	mov	w0, w19
 	ldr	w1, [x29, 172]
@@ -9908,228 +10239,231 @@ FlashReadPages:
 	adrp	x0, .LANCHOR33
 	ldr	w1, [x21, 4]
 	ldrb	w2, [x0, #:lo12:.LANCHOR33]
-	adrp	x0, .LC28
-	add	x0, x0, :lo12:.LC28
+	adrp	x0, .LC29
+	add	x0, x0, :lo12:.LC29
 	bl	printf
 	cmn	w28, #1
-	bne	.L1432
-	adrp	x0, .LANCHOR15
-	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L1432
+	bne	.L1491
+	adrp	x0, .LANCHOR16
+	ldrb	w0, [x0, #:lo12:.LANCHOR16]
+	cbz	w0, .L1491
 	mov	w0, w19
-	cbz	w24, .L1416
+	cbz	w24, .L1475
 	bl	flash_enter_slc_mode
-.L1417:
-	ldr	x4, [x20, #:lo12:.LANCHOR145]
+.L1476:
+	ldr	x4, [x20, #:lo12:.LANCHOR148]
 	mov	w0, w19
 	ldr	w1, [x29, 172]
 	ldp	x2, x3, [x21, 8]
 	blr	x4
-.L1465:
+.L1524:
 	mov	w28, w0
-.L1432:
+.L1491:
 	mov	w20, 0
-	b	.L1414
-.L1416:
+	b	.L1473
+.L1475:
 	bl	flash_exit_slc_mode
-	b	.L1417
+	b	.L1476
 	.size	FlashReadPages, .-FlashReadPages
 	.section	.text.FlashProgSlc2KPages,"ax",@progbits
 	.align	2
 	.global	FlashProgSlc2KPages
 	.type	FlashProgSlc2KPages, %function
 FlashProgSlc2KPages:
-	stp	x29, x30, [sp, -176]!
+	stp	x29, x30, [sp, -160]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	mov	w24, w2
-	mov	w23, 56
+	mov	w24, 56
+	stp	x25, x26, [sp, 64]
+	mov	w25, w2
 	adrp	x2, .LANCHOR31+9
 	stp	x21, x22, [sp, 32]
-	and	w21, w1, 255
-	stp	x25, x26, [sp, 64]
 	nop // between mem op and mult-accumulate
-	umaddl	x23, w1, w23, x0
-	ldrb	w25, [x2, #:lo12:.LANCHOR31+9]
-	adrp	x26, .LANCHOR4
+	umaddl	x24, w1, w24, x0
+	and	w22, w1, 255
+	ldrb	w26, [x2, #:lo12:.LANCHOR31+9]
+	mov	w23, w22
 	stp	x27, x28, [sp, 80]
-	mov	w22, w21
+	mov	x21, x0
 	stp	x19, x20, [sp, 16]
-	mov	x27, x0
-	mov	x20, x0
-	add	x28, x26, :lo12:.LANCHOR4
-	str	w3, [x29, 108]
-.L1467:
-	cmp	x20, x23
-	bne	.L1473
-	ldr	w0, [x29, 108]
-	cbnz	w0, .L1474
-.L1493:
+	adrp	x27, .LANCHOR4
+	mov	x19, x0
+	add	x28, x27, :lo12:.LANCHOR4
+.L1526:
+	cmp	x21, x24
+	bne	.L1532
+	adrp	x23, .LANCHOR206
+	mov	x24, x23
+.L1533:
+	cmp	x19, x21
+	bne	.L1540
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 176
+	ldp	x29, x30, [sp], 160
 	ret
-.L1473:
-	mov	w1, w24
-	mov	w4, w22
-	add	x3, x29, 116
-	add	x2, x29, 112
-	mov	x0, x20
+.L1532:
+	mov	w1, w25
+	mov	w4, w23
+	add	x3, x29, 100
+	add	x2, x29, 96
+	mov	x0, x21
 	bl	LogAddr2PhyAddr
-	adrp	x0, .LANCHOR25
-	ldr	w1, [x29, 116]
-	ldrb	w0, [x0, #:lo12:.LANCHOR25]
+	adrp	x0, .LANCHOR26
+	ldr	w1, [x29, 100]
+	ldrb	w0, [x0, #:lo12:.LANCHOR26]
 	cmp	w0, w1
-	bhi	.L1468
+	bhi	.L1527
 	mov	w0, -1
-	str	w0, [x20]
-.L1469:
-	sub	w22, w22, #1
-	add	x20, x20, 56
-	and	w22, w22, 255
-	b	.L1467
-.L1468:
-	adrp	x0, .LANCHOR26
-	add	x0, x0, :lo12:.LANCHOR26
-	ldrb	w19, [x0, w1, uxtw]
-	mov	w0, w19
+	str	w0, [x21]
+.L1528:
+	sub	w23, w23, #1
+	add	x21, x21, 56
+	and	w23, w23, 255
+	b	.L1526
+.L1527:
+	adrp	x0, .LANCHOR27
+	add	x0, x0, :lo12:.LANCHOR27
+	ldrb	w20, [x0, w1, uxtw]
+	mov	w0, w20
 	bl	NandcWaitFlashReady
-	mov	w0, w19
+	mov	w0, w20
 	bl	NandcFlashCs
-	ldr	w1, [x29, 112]
-	mov	w0, w19
+	ldr	w1, [x29, 96]
+	mov	w0, w20
 	bl	FlashProgFirstCmd
-	ldp	x3, x4, [x20, 8]
-	mov	w2, w25
+	ldp	x3, x4, [x21, 8]
+	mov	w2, w26
 	mov	w1, 1
-	mov	w0, w19
+	mov	w0, w20
 	bl	NandcXferData
-	ldr	w1, [x29, 112]
-	mov	w0, w19
+	ldr	w1, [x29, 96]
+	mov	w0, w20
 	bl	FlashProgSecondCmd
-	mov	w0, w19
+	mov	w0, w20
 	bl	NandcWaitFlashReady
-	ldr	w1, [x29, 112]
-	mov	w0, w19
+	ldr	w1, [x29, 96]
+	mov	w0, w20
 	bl	FlashReadStatus
 	sbfx	x0, x0, 0, 1
-	str	w0, [x20]
-	ldr	w1, [x29, 112]
-	ldr	w0, [x26, #:lo12:.LANCHOR4]
+	str	w0, [x21]
+	ldr	w1, [x29, 96]
+	ldr	w0, [x27, #:lo12:.LANCHOR4]
 	add	w1, w1, w0
-	mov	w0, w19
+	mov	w0, w20
 	bl	FlashProgFirstCmd
-	ldr	x0, [x20, 8]
-	mov	w2, w25
+	ldr	x0, [x21, 8]
+	mov	w2, w26
 	mov	w1, 1
 	cmp	x0, 0
 	add	x3, x0, 2048
-	ldr	x0, [x20, 16]
+	ldr	x0, [x21, 16]
 	csel	x3, x3, xzr, ne
 	cmp	x0, 0
 	add	x4, x0, 8
 	csel	x4, x4, xzr, ne
-	mov	w0, w19
+	mov	w0, w20
 	bl	NandcXferData
 	ldr	w0, [x28]
-	ldr	w1, [x29, 112]
+	ldr	w1, [x29, 96]
 	add	w1, w1, w0
-	mov	w0, w19
+	mov	w0, w20
 	bl	FlashProgSecondCmd
-	mov	w0, w19
+	mov	w0, w20
 	bl	NandcWaitFlashReady
-	ldr	w1, [x29, 112]
-	mov	w0, w19
+	ldr	w1, [x29, 96]
+	mov	w0, w20
 	bl	FlashReadStatus
-	tbz	x0, 0, .L1472
+	tbz	x0, 0, .L1531
 	mov	w0, -1
-	str	w0, [x20]
-.L1472:
-	mov	w0, w19
+	str	w0, [x21]
+.L1531:
+	mov	w0, w20
 	bl	NandcFlashDeCs
-	b	.L1469
-.L1480:
-	ldr	w0, [x27]
+	b	.L1528
+.L1540:
+	ldr	w0, [x19]
 	cmn	w0, #1
-	bne	.L1475
-	ldr	w1, [x27, 4]
-	adrp	x0, .LC29
-	add	x0, x0, :lo12:.LC29
+	bne	.L1534
+	ldr	w1, [x19, 4]
+	adrp	x0, .LC30
+	add	x0, x0, :lo12:.LC30
 	bl	printf
-.L1476:
-	sub	w21, w21, #1
-	add	x27, x27, 56
-	and	w21, w21, 255
-.L1494:
-	cmp	x27, x20
-	bne	.L1480
-	b	.L1493
-.L1475:
-	adrp	x19, .LANCHOR199
-	mov	w4, w21
-	add	x3, x29, 116
-	add	x2, x29, 112
-	mov	w1, w24
-	mov	x0, x27
+.L1535:
+	sub	w22, w22, #1
+	add	x19, x19, 56
+	and	w22, w22, 255
+	b	.L1533
+.L1534:
+	adrp	x20, .LANCHOR207
+	mov	w4, w22
+	add	x3, x29, 100
+	add	x2, x29, 96
+	mov	w1, w25
+	mov	x0, x19
 	bl	LogAddr2PhyAddr
-	ldr	x26, [x22, #:lo12:.LANCHOR198]
-	ldr	x25, [x19, #:lo12:.LANCHOR199]
+	ldr	x27, [x23, #:lo12:.LANCHOR206]
+	ldr	x26, [x20, #:lo12:.LANCHOR207]
 	mov	x2, 56
-	mov	x1, x27
-	add	x0, x29, 120
+	mov	x1, x19
+	add	x0, x29, 104
+	str	wzr, [x27]
 	str	wzr, [x26]
-	str	wzr, [x25]
 	bl	memcpy
-	stp	x26, x25, [x29, 128]
-	mov	w2, w24
+	stp	x27, x26, [x29, 112]
+	mov	w2, w25
 	mov	w1, 1
-	add	x0, x29, 120
+	add	x0, x29, 104
 	bl	FlashReadPages
-	ldr	w25, [x29, 120]
-	cmn	w25, #1
-	bne	.L1477
-	ldr	w1, [x27, 4]
-	adrp	x0, .LC30
-	add	x0, x0, :lo12:.LC30
+	ldr	w26, [x29, 104]
+	cmn	w26, #1
+	bne	.L1536
+	ldr	w1, [x19, 4]
+	adrp	x0, .LC31
+	add	x0, x0, :lo12:.LC31
 	bl	printf
-	str	w25, [x27]
-.L1477:
-	ldr	x0, [x27, 16]
-	cbz	x0, .L1478
+	str	w26, [x19]
+.L1536:
+	ldr	w26, [x29, 104]
+	cmp	w26, 256
+	bne	.L1537
+	ldr	w1, [x19, 4]
+	adrp	x0, .LC32
+	add	x0, x0, :lo12:.LC32
+	bl	printf
+	str	w26, [x19]
+.L1537:
+	ldr	x0, [x19, 16]
+	cbz	x0, .L1538
 	ldr	w2, [x0]
-	ldr	x0, [x19, #:lo12:.LANCHOR199]
+	ldr	x0, [x20, #:lo12:.LANCHOR207]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1478
-	ldr	w1, [x27, 4]
-	adrp	x0, .LC31
-	add	x0, x0, :lo12:.LC31
+	beq	.L1538
+	ldr	w1, [x19, 4]
+	adrp	x0, .LC33
+	add	x0, x0, :lo12:.LC33
 	bl	printf
 	mov	w0, -1
-	str	w0, [x27]
-.L1478:
-	ldr	x0, [x27, 8]
-	cbz	x0, .L1476
+	str	w0, [x19]
+.L1538:
+	ldr	x0, [x19, 8]
+	cbz	x0, .L1535
 	ldr	w2, [x0]
-	ldr	x0, [x23, #:lo12:.LANCHOR198]
+	ldr	x0, [x24, #:lo12:.LANCHOR206]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1476
-	ldr	w1, [x27, 4]
-	adrp	x0, .LC32
-	add	x0, x0, :lo12:.LC32
+	beq	.L1535
+	ldr	w1, [x19, 4]
+	adrp	x0, .LC34
+	add	x0, x0, :lo12:.LC34
 	bl	printf
 	mov	w0, -1
-	str	w0, [x27]
-	b	.L1476
-.L1474:
-	adrp	x22, .LANCHOR198
-	mov	x23, x22
-	b	.L1494
+	str	w0, [x19]
+	b	.L1535
 	.size	FlashProgSlc2KPages, .-FlashProgSlc2KPages
 	.section	.text.FlashProgPages,"ax",@progbits
 	.align	2
@@ -10137,9 +10471,9 @@ FlashProgSlc2KPages:
 	.type	FlashProgPages, %function
 FlashProgPages:
 	stp	x29, x30, [sp, -176]!
-	adrp	x4, .LANCHOR18
+	adrp	x4, .LANCHOR7
 	add	x29, sp, 0
-	ldr	x4, [x4, #:lo12:.LANCHOR18]
+	ldr	x4, [x4, #:lo12:.LANCHOR7]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
@@ -10149,7 +10483,7 @@ FlashProgPages:
 	stp	w3, w4, [x29, 100]
 	adrp	x4, .LANCHOR2
 	ldrb	w4, [x4, #:lo12:.LANCHOR2]
-	cbnz	w4, .L1497
+	cbnz	w4, .L1554
 	mov	x19, x0
 	adrp	x0, .LANCHOR31+9
 	adrp	x27, .LANCHOR23
@@ -10159,28 +10493,28 @@ FlashProgPages:
 	add	x28, x27, :lo12:.LANCHOR23
 	mov	w21, 0
 	str	w0, [x29, 108]
-.L1498:
+.L1555:
 	cmp	w21, w24
-	adrp	x26, .LANCHOR25
-	bcc	.L1511
-	adrp	x21, .LANCHOR15
+	adrp	x26, .LANCHOR26
+	bcc	.L1568
+	adrp	x21, .LANCHOR16
 	adrp	x23, .LANCHOR23
-	add	x25, x26, :lo12:.LANCHOR25
-	add	x21, x21, :lo12:.LANCHOR15
+	add	x25, x26, :lo12:.LANCHOR26
+	add	x21, x21, :lo12:.LANCHOR16
 	add	x23, x23, :lo12:.LANCHOR23
 	mov	x20, 0
-.L1512:
+.L1569:
 	ldrb	w0, [x25]
 	cmp	w0, w20
-	bhi	.L1514
+	bhi	.L1571
 	ldr	w0, [x29, 100]
-	cbnz	w0, .L1515
-.L1523:
+	cbnz	w0, .L1572
+.L1580:
 	mov	w0, 0
-	b	.L1496
-.L1497:
+	b	.L1553
+.L1554:
 	bl	FlashProgSlc2KPages
-.L1496:
+.L1553:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -10188,7 +10522,7 @@ FlashProgPages:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1511:
+.L1568:
 	mov	w12, 56
 	mov	w1, w22
 	sub	w4, w24, w21
@@ -10199,59 +10533,59 @@ FlashProgPages:
 	mov	x0, x25
 	bl	LogAddr2PhyAddr
 	mov	w23, w0
-	ldrb	w1, [x26, #:lo12:.LANCHOR25]
+	ldrb	w1, [x26, #:lo12:.LANCHOR26]
 	ldr	w0, [x29, 116]
 	cmp	w1, w0
-	bhi	.L1500
+	bhi	.L1557
 	mov	w0, -1
 	str	w0, [x19, x12]
-.L1501:
+.L1558:
 	add	w21, w21, 1
-	b	.L1498
-.L1500:
-	adrp	x1, .LANCHOR27
+	b	.L1555
+.L1557:
+	adrp	x1, .LANCHOR28
 	add	x2, x27, :lo12:.LANCHOR23
 	mov	x3, 24
-	ldrb	w1, [x1, #:lo12:.LANCHOR27]
+	ldrb	w1, [x1, #:lo12:.LANCHOR28]
 	cmp	w1, 0
 	uxtw	x1, w0
 	csel	w23, w23, wzr, ne
 	madd	x1, x1, x3, x2
 	ldr	x1, [x1, 8]
-	cbz	x1, .L1503
+	cbz	x1, .L1560
 	bl	FlashWaitCmdDone
-.L1503:
+.L1560:
 	ldp	w2, w1, [x29, 112]
 	mov	x0, 24
 	madd	x0, x1, x0, x28
 	str	w2, [x0, 4]
 	stp	x25, xzr, [x0, 8]
-	cbz	w23, .L1504
+	cbz	w23, .L1561
 	add	w2, w21, 1
 	mov	w3, 56
 	umaddl	x2, w2, w3, x19
 	str	x2, [x0, 16]
-.L1504:
-	adrp	x0, .LANCHOR26
-	add	x0, x0, :lo12:.LANCHOR26
+.L1561:
+	adrp	x0, .LANCHOR27
+	add	x0, x0, :lo12:.LANCHOR27
 	ldrb	w20, [x0, x1]
 	mov	x0, 24
 	mul	x1, x1, x0
-	ldrb	w0, [x26, #:lo12:.LANCHOR25]
+	ldrb	w0, [x26, #:lo12:.LANCHOR26]
 	cmp	w0, 1
 	mov	w0, w20
 	strb	w20, [x28, x1]
-	bne	.L1505
+	bne	.L1562
 	bl	NandcWaitFlashReady
-.L1506:
+.L1563:
 	ldr	w0, [x29, 104]
 	sub	w0, w0, #1
 	cmp	w0, 7
-	bhi	.L1507
+	bhi	.L1564
 	adrp	x0, .LANCHOR21
 	add	x0, x0, :lo12:.LANCHOR21
 	ldrb	w0, [x0, w20, sxtw]
-	cbz	w0, .L1507
+	cbz	w0, .L1564
 	adrp	x0, .LANCHOR20
 	add	x0, x0, :lo12:.LANCHOR20
 	add	x2, x0, 4
@@ -10259,17 +10593,17 @@ FlashProgPages:
 	ldrb	w1, [x0, 1]
 	mov	w0, w20
 	bl	HynixSetRRPara
-.L1507:
+.L1564:
 	mov	w0, w20
 	bl	NandcFlashCs
 	cmp	w22, 1
-	bne	.L1508
-	adrp	x0, .LANCHOR15
-	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L1508
+	bne	.L1565
+	adrp	x0, .LANCHOR16
+	ldrb	w0, [x0, #:lo12:.LANCHOR16]
+	cbz	w0, .L1565
 	mov	w0, w20
 	bl	flash_enter_slc_mode
-.L1509:
+.L1566:
 	ldr	w1, [x29, 112]
 	mov	w0, w20
 	bl	FlashProgFirstCmd
@@ -10278,13 +10612,13 @@ FlashProgPages:
 	ldp	x3, x4, [x25, 8]
 	mov	w0, w20
 	bl	NandcXferData
-	cbz	w23, .L1510
+	cbz	w23, .L1567
 	ldr	w1, [x29, 112]
 	mov	w0, w20
 	bl	FlashProgDpFirstCmd
 	ldr	w1, [x29, 116]
-	adrp	x0, .LANCHOR17
-	add	x0, x0, :lo12:.LANCHOR17
+	adrp	x0, .LANCHOR18
+	add	x0, x0, :lo12:.LANCHOR18
 	ldr	w0, [x0, x1, lsl 2]
 	ldr	w1, [x29, 112]
 	cmp	w0, 0
@@ -10306,19 +10640,19 @@ FlashProgPages:
 	ldp	x3, x4, [x0, 8]
 	mov	w0, w20
 	bl	NandcXferData
-.L1510:
+.L1567:
 	ldr	w1, [x29, 112]
 	mov	w0, w20
 	add	w21, w21, w23
 	bl	FlashProgSecondCmd
 	mov	w0, w20
 	bl	NandcFlashDeCs
-	b	.L1501
-.L1505:
+	b	.L1558
+.L1562:
 	bl	NandcFlashCs
 	ldr	w1, [x29, 116]
-	adrp	x0, .LANCHOR17
-	add	x0, x0, :lo12:.LANCHOR17
+	adrp	x0, .LANCHOR18
+	add	x0, x0, :lo12:.LANCHOR18
 	ldr	w0, [x0, x1, lsl 2]
 	ldr	w1, [x29, 112]
 	cmp	w0, 0
@@ -10327,56 +10661,56 @@ FlashProgPages:
 	bl	FlashWaitReadyEN
 	mov	w0, w20
 	bl	NandcFlashDeCs
-	b	.L1506
-.L1508:
+	b	.L1563
+.L1565:
 	mov	w0, w20
 	bl	flash_exit_slc_mode
-	b	.L1509
-.L1514:
+	b	.L1566
+.L1571:
 	mov	w0, w20
 	bl	FlashWaitCmdDone
 	cmp	w22, 1
-	bne	.L1513
+	bne	.L1570
 	ldrb	w0, [x21]
-	cbz	w0, .L1513
+	cbz	w0, .L1570
 	mov	x0, 24
 	mul	x0, x20, x0
 	ldrb	w0, [x0, x23]
 	bl	flash_exit_slc_mode
-.L1513:
+.L1570:
 	add	x20, x20, 1
-	b	.L1512
-.L1515:
+	b	.L1569
+.L1572:
 	mov	w0, 56
 	and	w20, w24, 255
-	adrp	x23, .LANCHOR198
+	adrp	x23, .LANCHOR206
 	mov	x25, x23
 	umaddl	x24, w24, w0, x19
-.L1516:
+.L1573:
 	cmp	x24, x19
-	beq	.L1523
+	beq	.L1580
 	ldr	w0, [x19]
 	cmn	w0, #1
-	bne	.L1517
+	bne	.L1574
 	ldr	w1, [x19, 4]
-	adrp	x0, .LC29
-	add	x0, x0, :lo12:.LC29
+	adrp	x0, .LC30
+	add	x0, x0, :lo12:.LC30
 	bl	printf
-.L1518:
+.L1575:
 	sub	w20, w20, #1
 	add	x19, x19, 56
 	and	w20, w20, 255
-	b	.L1516
-.L1517:
-	adrp	x21, .LANCHOR199
+	b	.L1573
+.L1574:
+	adrp	x21, .LANCHOR207
 	mov	w4, w20
 	add	x3, x29, 116
 	add	x2, x29, 112
 	mov	w1, w22
 	mov	x0, x19
 	bl	LogAddr2PhyAddr
-	ldr	x27, [x23, #:lo12:.LANCHOR198]
-	ldr	x26, [x21, #:lo12:.LANCHOR199]
+	ldr	x27, [x23, #:lo12:.LANCHOR206]
+	ldr	x26, [x21, #:lo12:.LANCHOR207]
 	mov	x2, 56
 	mov	x1, x19
 	add	x0, x29, 120
@@ -10390,41 +10724,41 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	w26, [x29, 120]
 	cmn	w26, #1
-	bne	.L1519
+	bne	.L1576
 	ldr	w1, [x19, 4]
-	adrp	x0, .LC30
-	add	x0, x0, :lo12:.LC30
+	adrp	x0, .LC31
+	add	x0, x0, :lo12:.LC31
 	bl	printf
 	str	w26, [x19]
-.L1519:
+.L1576:
 	ldr	x0, [x19, 16]
-	cbz	x0, .L1520
+	cbz	x0, .L1577
 	ldr	w2, [x0]
-	ldr	x0, [x21, #:lo12:.LANCHOR199]
+	ldr	x0, [x21, #:lo12:.LANCHOR207]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1520
+	beq	.L1577
 	ldr	w1, [x19, 4]
-	adrp	x0, .LC31
-	add	x0, x0, :lo12:.LC31
+	adrp	x0, .LC33
+	add	x0, x0, :lo12:.LC33
 	bl	printf
 	mov	w0, -1
 	str	w0, [x19]
-.L1520:
+.L1577:
 	ldr	x0, [x19, 8]
-	cbz	x0, .L1518
+	cbz	x0, .L1575
 	ldr	w2, [x0]
-	ldr	x0, [x25, #:lo12:.LANCHOR198]
+	ldr	x0, [x25, #:lo12:.LANCHOR206]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1518
+	beq	.L1575
 	ldr	w1, [x19, 4]
-	adrp	x0, .LC32
-	add	x0, x0, :lo12:.LC32
+	adrp	x0, .LC34
+	add	x0, x0, :lo12:.LC34
 	bl	printf
 	mov	w0, -1
 	str	w0, [x19]
-	b	.L1518
+	b	.L1575
 	.size	FlashProgPages, .-FlashProgPages
 	.section	.text.FlashTestBlk,"ax",@progbits
 	.align	2
@@ -10435,20 +10769,20 @@ FlashTestBlk:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w19, w0, 65535
-	adrp	x0, .LANCHOR149
-	ldr	w0, [x0, #:lo12:.LANCHOR149]
+	adrp	x0, .LANCHOR156
+	ldr	w0, [x0, #:lo12:.LANCHOR156]
 	cmp	w19, w0
-	bcc	.L1551
-	adrp	x20, .LANCHOR153
+	bcc	.L1608
+	adrp	x20, .LANCHOR152
 	mov	w2, 32
 	mov	w1, 165
 	lsl	w19, w19, 10
-	ldr	x0, [x20, #:lo12:.LANCHOR153]
+	ldr	x0, [x20, #:lo12:.LANCHOR152]
 	str	x0, [x29, 48]
 	add	x0, x29, 96
 	str	x0, [x29, 56]
 	bl	ftl_memset
-	ldr	x0, [x20, #:lo12:.LANCHOR153]
+	ldr	x0, [x20, #:lo12:.LANCHOR152]
 	mov	w2, 8
 	mov	w1, 90
 	bl	ftl_memset
@@ -10469,14 +10803,14 @@ FlashTestBlk:
 	add	x0, x29, 40
 	csetm	w19, ne
 	bl	FlashEraseBlocks
-.L1549:
+.L1606:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 160
 	ret
-.L1551:
+.L1608:
 	mov	w19, 0
-	b	.L1549
+	b	.L1606
 	.size	FlashTestBlk, .-FlashTestBlk
 	.section	.text.FtlLowFormatEraseBlock,"ax",@progbits
 	.align	2
@@ -10487,30 +10821,30 @@ FtlLowFormatEraseBlock:
 	add	x29, sp, 0
 	stp	x25, x26, [sp, 64]
 	and	w26, w0, 65535
-	adrp	x0, .LANCHOR76
+	adrp	x0, .LANCHOR78
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	ldr	w0, [x0, #:lo12:.LANCHOR76]
+	ldr	w0, [x0, #:lo12:.LANCHOR78]
 	stp	x23, x24, [sp, 48]
 	stp	x27, x28, [sp, 80]
-	cbnz	w0, .L1576
-	adrp	x23, .LANCHOR27
+	cbnz	w0, .L1633
+	adrp	x23, .LANCHOR28
 	and	w25, w1, 255
-	adrp	x20, .LANCHOR15
+	adrp	x20, .LANCHOR16
 	adrp	x1, .LANCHOR38
-	ldrb	w0, [x23, #:lo12:.LANCHOR27]
-	adrp	x21, .LANCHOR77
+	ldrb	w0, [x23, #:lo12:.LANCHOR28]
+	adrp	x21, .LANCHOR79
 	str	w0, [x29, 136]
 	mov	x8, 56
-	adrp	x0, .LANCHOR73
-	ldrb	w10, [x20, #:lo12:.LANCHOR15]
+	adrp	x0, .LANCHOR75
+	ldrb	w10, [x20, #:lo12:.LANCHOR16]
 	ldrh	w11, [x1, #:lo12:.LANCHOR38]
 	adrp	x7, .LANCHOR47
-	str	w26, [x0, #:lo12:.LANCHOR73]
-	adrp	x0, .LANCHOR189
-	ldr	x6, [x21, #:lo12:.LANCHOR77]
+	str	w26, [x0, #:lo12:.LANCHOR75]
+	adrp	x0, .LANCHOR196
+	ldr	x6, [x21, #:lo12:.LANCHOR79]
 	add	x7, x7, :lo12:.LANCHOR47
-	ldr	x12, [x0, #:lo12:.LANCHOR189]
+	ldr	x12, [x0, #:lo12:.LANCHOR196]
 	adrp	x0, .LANCHOR58
 	mov	w14, w8
 	mov	x5, 0
@@ -10519,79 +10853,79 @@ FtlLowFormatEraseBlock:
 	mov	w19, 0
 	str	x1, [x29, 128]
 	str	x0, [x29, 120]
-.L1555:
+.L1612:
 	cmp	w11, w5, uxth
-	bhi	.L1559
-	cbz	w24, .L1553
+	bhi	.L1616
+	cbz	w24, .L1610
 	cmp	w10, 0
 	mov	w2, w24
 	cset	w22, ne
-	strb	wzr, [x23, #:lo12:.LANCHOR27]
+	strb	wzr, [x23, #:lo12:.LANCHOR28]
 	mov	w1, w22
 	mov	x0, x6
 	bl	FlashEraseBlocks
 	mov	x27, 0
 	ldrb	w0, [x29, 136]
-	strb	w0, [x23, #:lo12:.LANCHOR27]
+	strb	w0, [x23, #:lo12:.LANCHOR28]
 	mov	w0, 56
 	umull	x24, w24, w0
-.L1562:
-	ldr	x0, [x21, #:lo12:.LANCHOR77]
+.L1619:
+	ldr	x0, [x21, #:lo12:.LANCHOR79]
 	add	x1, x0, x27
 	ldr	w0, [x0, x27]
 	cmn	w0, #1
-	bne	.L1561
+	bne	.L1618
 	ldr	w0, [x1, 4]
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.L1561:
+.L1618:
 	add	x27, x27, 56
 	cmp	x27, x24
-	bne	.L1562
-	cbnz	w25, .L1563
+	bne	.L1619
+	cbnz	w25, .L1620
 	and	w22, w22, 65535
 	mov	w28, 6
 	mov	w27, 1
-.L1564:
+.L1621:
 	adrp	x0, .LANCHOR47
 	mov	w24, 0
 	add	x0, x0, :lo12:.LANCHOR47
 	str	x0, [x29, 112]
-.L1572:
+.L1629:
 	ldr	x0, [x29, 128]
 	mov	x5, 0
-	ldr	x6, [x21, #:lo12:.LANCHOR77]
+	ldr	x6, [x21, #:lo12:.LANCHOR79]
 	mov	w20, 0
 	mov	w12, 56
 	ldrh	w7, [x0, #:lo12:.LANCHOR38]
-	adrp	x0, .LANCHOR186
-	ldr	x8, [x0, #:lo12:.LANCHOR186]
-	adrp	x0, .LANCHOR187
-	ldr	x10, [x0, #:lo12:.LANCHOR187]
+	adrp	x0, .LANCHOR193
+	ldr	x8, [x0, #:lo12:.LANCHOR193]
+	adrp	x0, .LANCHOR194
+	ldr	x10, [x0, #:lo12:.LANCHOR194]
 	ldr	x0, [x29, 120]
 	ldrh	w11, [x0, #:lo12:.LANCHOR58]
-.L1565:
+.L1622:
 	cmp	w7, w5, uxth
-	bhi	.L1568
-	cbz	w20, .L1553
+	bhi	.L1625
+	cbz	w20, .L1610
 	mov	w2, w22
 	mov	w1, w20
-	strb	wzr, [x23, #:lo12:.LANCHOR27]
+	strb	wzr, [x23, #:lo12:.LANCHOR28]
 	mov	w3, 1
 	mov	x0, x6
 	bl	FlashProgPages
 	mov	w1, 56
 	ldrb	w0, [x29, 136]
-	strb	w0, [x23, #:lo12:.LANCHOR27]
+	strb	w0, [x23, #:lo12:.LANCHOR28]
 	mov	x2, 0
 	umull	x1, w20, w1
-.L1571:
-	ldr	x0, [x21, #:lo12:.LANCHOR77]
+.L1628:
+	ldr	x0, [x21, #:lo12:.LANCHOR79]
 	add	x3, x0, x2
 	ldr	w0, [x0, x2]
-	cbz	w0, .L1570
+	cbz	w0, .L1627
 	ldr	w0, [x3, 4]
 	add	w19, w19, 1
 	stp	x2, x1, [x29, 96]
@@ -10599,39 +10933,39 @@ FtlLowFormatEraseBlock:
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
 	ldp	x2, x1, [x29, 96]
-.L1570:
+.L1627:
 	add	x2, x2, 56
 	cmp	x1, x2
-	bne	.L1571
+	bne	.L1628
 	add	w24, w24, w28
 	and	w24, w24, 65535
 	cmp	w27, w24
-	bhi	.L1572
+	bhi	.L1629
 	mov	x23, 0
-.L1574:
-	cbz	w25, .L1573
-	ldr	x0, [x21, #:lo12:.LANCHOR77]
+.L1631:
+	cbz	w25, .L1630
+	ldr	x0, [x21, #:lo12:.LANCHOR79]
 	add	x1, x0, x23
 	ldr	w0, [x0, x23]
-	cbnz	w0, .L1573
+	cbnz	w0, .L1630
 	ldr	w0, [x1, 4]
 	mov	w1, 1
 	str	x2, [x29, 136]
 	lsr	w0, w0, 10
 	bl	FtlFreeSysBlkQueueIn
 	ldr	x2, [x29, 136]
-.L1573:
+.L1630:
 	add	x23, x23, 56
 	cmp	x23, x2
-	bne	.L1574
+	bne	.L1631
 	cmp	w26, 63
 	ccmp	w25, 0, 0, hi
-	beq	.L1553
-	ldr	x0, [x21, #:lo12:.LANCHOR77]
+	beq	.L1610
+	ldr	x0, [x21, #:lo12:.LANCHOR79]
 	mov	w2, w20
 	mov	w1, w22
 	bl	FlashEraseBlocks
-.L1553:
+.L1610:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10640,7 +10974,7 @@ FtlLowFormatEraseBlock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1559:
+.L1616:
 	mul	x0, x5, x8
 	mov	w1, w26
 	str	wzr, [x6, x0]
@@ -10648,13 +10982,13 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	and	w15, w0, 65535
 	mov	w22, w15
-	cbz	w25, .L1556
+	cbz	w25, .L1613
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L1557
-.L1556:
+	cbnz	w0, .L1614
+.L1613:
 	mov	w0, w22
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L1558
+	cbnz	w0, .L1615
 	umaddl	x1, w24, w14, x6
 	lsl	w15, w15, 10
 	mul	w0, w24, w13
@@ -10664,26 +10998,26 @@ FtlLowFormatEraseBlock:
 	str	w15, [x1, 4]
 	add	x0, x12, x0, sxtw 2
 	stp	xzr, x0, [x1, 8]
-.L1557:
+.L1614:
 	add	x5, x5, 1
-	b	.L1555
-.L1558:
+	b	.L1612
+.L1615:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1557
-.L1563:
+	b	.L1614
+.L1620:
 	adrp	x0, .LANCHOR53
 	ldrh	w27, [x0, #:lo12:.LANCHOR53]
-	ldrb	w0, [x20, #:lo12:.LANCHOR15]
-	cbnz	w0, .L1577
+	ldrb	w0, [x20, #:lo12:.LANCHOR16]
+	cbnz	w0, .L1634
 	lsr	w28, w27, 2
 	mov	w22, 1
-	b	.L1564
-.L1577:
+	b	.L1621
+.L1634:
 	mov	w22, 1
 	mov	w28, w22
-	b	.L1564
-.L1568:
+	b	.L1621
+.L1625:
 	mov	x0, 56
 	mov	w1, w26
 	mul	x0, x5, x0
@@ -10693,13 +11027,13 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	and	w13, w0, 65535
 	mov	w14, w13
-	cbz	w25, .L1566
+	cbz	w25, .L1623
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L1567
-.L1566:
+	cbnz	w0, .L1624
+.L1623:
 	mov	w0, w14
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L1567
+	cbnz	w0, .L1624
 	umaddl	x1, w20, w12, x6
 	add	w13, w24, w13, lsl 10
 	mul	w0, w20, w11
@@ -10709,12 +11043,12 @@ FtlLowFormatEraseBlock:
 	str	w13, [x1, 4]
 	add	x0, x10, x0, sxtw 2
 	stp	x8, x0, [x1, 8]
-.L1567:
+.L1624:
 	add	x5, x5, 1
-	b	.L1565
-.L1576:
+	b	.L1622
+.L1633:
 	mov	w19, 0
-	b	.L1553
+	b	.L1610
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
 	.section	.text.FtlBbmTblFlush,"ax",@progbits
 	.align	2
@@ -10724,44 +11058,44 @@ FtlBbmTblFlush:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR76
+	adrp	x22, .LANCHOR78
 	stp	x19, x20, [sp, 16]
-	ldr	w0, [x22, #:lo12:.LANCHOR76]
+	ldr	w0, [x22, #:lo12:.LANCHOR78]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w0, .L1600
-	adrp	x24, .LANCHOR188
-	adrp	x23, .LANCHOR183
-	adrp	x20, .LANCHOR203
-	add	x19, x20, :lo12:.LANCHOR203
-	ldr	x1, [x24, #:lo12:.LANCHOR188]
-	adrp	x21, .LANCHOR74
-	ldr	x0, [x23, #:lo12:.LANCHOR183]
-	add	x26, x21, :lo12:.LANCHOR74
+	cbnz	w0, .L1657
+	adrp	x24, .LANCHOR195
+	adrp	x23, .LANCHOR189
+	adrp	x20, .LANCHOR211
+	add	x19, x20, :lo12:.LANCHOR211
+	ldr	x1, [x24, #:lo12:.LANCHOR195]
+	adrp	x21, .LANCHOR76
+	ldr	x0, [x23, #:lo12:.LANCHOR189]
+	add	x26, x21, :lo12:.LANCHOR76
 	stp	x0, x1, [x19, 8]
 	adrp	x1, .LANCHOR57
 	adrp	x27, .LANCHOR45
-	adrp	x28, .LANCHOR123
+	adrp	x28, .LANCHOR126
 	ldrh	w2, [x1, #:lo12:.LANCHOR57]
 	add	x26, x26, 32
 	mov	w25, 0
 	add	x27, x27, :lo12:.LANCHOR45
-	add	x28, x28, :lo12:.LANCHOR123
+	add	x28, x28, :lo12:.LANCHOR126
 	mov	w1, 0
 	bl	ftl_memset
-.L1601:
+.L1658:
 	ldrh	w0, [x27]
 	cmp	w25, w0
-	blt	.L1602
-	add	x20, x20, :lo12:.LANCHOR203
-	add	x19, x21, :lo12:.LANCHOR74
+	blt	.L1659
+	add	x20, x20, :lo12:.LANCHOR211
+	add	x19, x21, :lo12:.LANCHOR76
 	mov	w2, 16
 	mov	w1, 255
-	adrp	x26, .LC33
+	adrp	x26, .LC35
 	adrp	x27, .LANCHOR53
 	ldr	x28, [x20, 16]
-	add	x26, x26, :lo12:.LC33
+	add	x26, x26, :lo12:.LC35
 	add	x27, x27, :lo12:.LANCHOR53
 	mov	w25, 0
 	mov	x0, x28
@@ -10770,7 +11104,7 @@ FtlBbmTblFlush:
 	strh	w0, [x28]
 	ldr	w0, [x19, 8]
 	str	w0, [x28, 4]
-	ldrh	w0, [x21, #:lo12:.LANCHOR74]
+	ldrh	w0, [x21, #:lo12:.LANCHOR76]
 	mov	w21, 0
 	strh	w0, [x28, 2]
 	ldrh	w0, [x19, 4]
@@ -10780,14 +11114,14 @@ FtlBbmTblFlush:
 	adrp	x0, .LANCHOR37
 	ldr	w0, [x0, #:lo12:.LANCHOR37]
 	strh	w0, [x28, 12]
-.L1603:
+.L1660:
 	ldrh	w1, [x19]
 	ldrh	w4, [x28, 10]
 	ldrh	w2, [x19, 2]
 	ldrh	w3, [x19, 4]
-	ldr	x0, [x23, #:lo12:.LANCHOR183]
+	ldr	x0, [x23, #:lo12:.LANCHOR189]
 	str	x0, [x20, 8]
-	ldr	x0, [x24, #:lo12:.LANCHOR188]
+	ldr	x0, [x24, #:lo12:.LANCHOR195]
 	str	x0, [x20, 16]
 	orr	w0, w2, w1, lsl 10
 	str	wzr, [x20]
@@ -10798,7 +11132,7 @@ FtlBbmTblFlush:
 	ldrh	w1, [x19, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L1604
+	blt	.L1661
 	ldr	w0, [x19, 8]
 	mov	w2, 1
 	ldrh	w1, [x19, 4]
@@ -10808,16 +11142,16 @@ FtlBbmTblFlush:
 	ldrh	w0, [x19]
 	strh	w0, [x28, 8]
 	strh	w0, [x19, 4]
-	adrp	x0, .LANCHOR77
+	adrp	x0, .LANCHOR79
 	strh	w1, [x19]
 	lsl	w1, w1, 10
-	ldr	x0, [x0, #:lo12:.LANCHOR77]
+	ldr	x0, [x0, #:lo12:.LANCHOR79]
 	str	w1, [x20, 4]
 	strh	wzr, [x19, 2]
 	str	w1, [x0, 4]
 	mov	w1, w2
 	bl	FlashEraseBlocks
-.L1604:
+.L1661:
 	mov	w3, 1
 	mov	x0, x20
 	mov	w2, w3
@@ -10828,23 +11162,23 @@ FtlBbmTblFlush:
 	strh	w0, [x19, 2]
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L1605
+	bne	.L1662
 	ldr	w1, [x20, 4]
 	add	w21, w21, 1
-	adrp	x0, .LC34
+	adrp	x0, .LC36
 	and	w21, w21, 65535
-	add	x0, x0, :lo12:.LC34
+	add	x0, x0, :lo12:.LC36
 	bl	printf
 	cmp	w21, 3
-	bls	.L1603
+	bls	.L1660
 	ldr	w1, [x20, 4]
 	mov	w2, w21
-	adrp	x0, .LC35
-	add	x0, x0, :lo12:.LC35
+	adrp	x0, .LC37
+	add	x0, x0, :lo12:.LC37
 	bl	printf
 	mov	w0, 1
-	str	w0, [x22, #:lo12:.LANCHOR76]
-.L1600:
+	str	w0, [x22, #:lo12:.LANCHOR78]
+.L1657:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10853,7 +11187,7 @@ FtlBbmTblFlush:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1602:
+.L1659:
 	ldrh	w2, [x28]
 	ldr	x1, [x26], 8
 	ldr	x0, [x19, 8]
@@ -10862,50 +11196,50 @@ FtlBbmTblFlush:
 	add	w25, w25, 1
 	add	x0, x0, x3, sxtw 2
 	bl	ftl_memcpy
-	b	.L1601
-.L1605:
+	b	.L1658
+.L1662:
 	add	w25, w25, 1
 	cmp	w25, 1
-	beq	.L1603
+	beq	.L1660
 	cmp	w0, 256
-	beq	.L1603
-	b	.L1600
+	beq	.L1660
+	b	.L1657
 	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
 	.section	.text.allocate_data_superblock,"ax",@progbits
 	.align	2
 	.global	allocate_data_superblock
 	.type	allocate_data_superblock, %function
 allocate_data_superblock:
-	adrp	x1, .LANCHOR76
-	ldr	w1, [x1, #:lo12:.LANCHOR76]
-	cbnz	w1, .L1679
+	adrp	x1, .LANCHOR78
+	ldr	w1, [x1, #:lo12:.LANCHOR78]
+	cbnz	w1, .L1736
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
 	stp	x27, x28, [sp, 80]
-	adrp	x27, .LANCHOR85
-	add	x0, x27, :lo12:.LANCHOR85
+	adrp	x27, .LANCHOR87
+	add	x0, x27, :lo12:.LANCHOR87
 	stp	x23, x24, [sp, 48]
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR88
-	add	x23, x0, :lo12:.LANCHOR88
+	adrp	x0, .LANCHOR90
+	add	x23, x0, :lo12:.LANCHOR90
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
-.L1670:
+.L1727:
 	ldr	x1, [x29, 120]
-	adrp	x0, .LANCHOR88
+	adrp	x0, .LANCHOR90
 	adrp	x24, .LANCHOR40
-	ldrh	w0, [x0, #:lo12:.LANCHOR88]
+	ldrh	w0, [x0, #:lo12:.LANCHOR90]
 	ldrh	w1, [x1]
 	add	w0, w0, w1
 	ldrh	w1, [x24, #:lo12:.LANCHOR40]
 	cmp	w0, w1
-	ble	.L1618
-	mov	w2, 3164
-	adrp	x1, .LANCHOR204
+	ble	.L1675
+	mov	w2, 3507
+	adrp	x1, .LANCHOR212
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR204
+	add	x1, x1, :lo12:.LANCHOR212
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -10913,72 +11247,72 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1618:
-	adrp	x0, .LANCHOR93
-	add	x0, x0, :lo12:.LANCHOR93
+.L1675:
+	adrp	x0, .LANCHOR95
+	add	x0, x0, :lo12:.LANCHOR95
 	cmp	x19, x0
-	bne	.L1619
-	adrp	x1, .LANCHOR172
+	bne	.L1676
+	adrp	x1, .LANCHOR177
 	ldrh	w2, [x23]
-	ldr	w3, [x1, #:lo12:.LANCHOR172]
+	ldr	w3, [x1, #:lo12:.LANCHOR177]
 	lsr	w0, w2, 1
 	add	w4, w0, 1
 	mul	w1, w2, w3
 	add	w1, w4, w1, lsr 2
-	adrp	x4, .LANCHOR28
+	adrp	x4, .LANCHOR104
 	and	w1, w1, 65535
-	ldr	w4, [x4, #:lo12:.LANCHOR28]
-	cbz	w4, .L1620
-	adrp	x4, .LANCHOR170
-	ldr	w4, [x4, #:lo12:.LANCHOR170]
+	ldr	w4, [x4, #:lo12:.LANCHOR104]
+	cbz	w4, .L1677
+	adrp	x4, .LANCHOR175
+	ldr	w4, [x4, #:lo12:.LANCHOR175]
 	cmp	w4, 39
-	bhi	.L1620
+	bhi	.L1677
 	cmp	w4, 2
-	bls	.L1654
-	tbz	x2, 0, .L1650
-	cbz	w3, .L1654
-.L1650:
+	bls	.L1711
+	tbz	x2, 0, .L1707
+	cbz	w3, .L1711
+.L1707:
 	mov	w1, w0
-	b	.L1620
-.L1619:
+	b	.L1677
+.L1676:
 	ldrb	w0, [x19, 8]
 	cmp	w0, 1
-	bne	.L1654
+	bne	.L1711
 	adrp	x0, .LANCHOR44
 	ldrh	w0, [x0, #:lo12:.LANCHOR44]
 	cmp	w0, 1
-	beq	.L1654
-	adrp	x0, .LANCHOR15
-	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbnz	w0, .L1654
-	adrp	x2, .LANCHOR28
+	beq	.L1711
+	adrp	x0, .LANCHOR16
+	ldrb	w0, [x0, #:lo12:.LANCHOR16]
+	cbnz	w0, .L1711
+	adrp	x2, .LANCHOR104
 	ldrh	w0, [x23]
-	ldr	w2, [x2, #:lo12:.LANCHOR28]
+	ldr	w2, [x2, #:lo12:.LANCHOR104]
 	lsr	w1, w0, 3
-	cbz	w2, .L1620
-	adrp	x2, .LANCHOR170
-	ldr	w2, [x2, #:lo12:.LANCHOR170]
+	cbz	w2, .L1677
+	adrp	x2, .LANCHOR175
+	ldr	w2, [x2, #:lo12:.LANCHOR175]
 	cmp	w2, 1
-	bhi	.L1620
+	bhi	.L1677
 	mov	w1, 7
 	mul	w1, w0, w1
 	lsr	w1, w1, 3
-.L1620:
-	cbz	w1, .L1621
+.L1677:
+	cbz	w1, .L1678
 	sub	w1, w1, #1
 	and	w1, w1, 65535
-.L1621:
+.L1678:
 	ldrb	w2, [x19, 8]
-	adrp	x0, .LANCHOR87
-	add	x0, x0, :lo12:.LANCHOR87
+	adrp	x0, .LANCHOR89
+	add	x0, x0, :lo12:.LANCHOR89
 	bl	List_pop_index_node
 	and	w22, w0, 65535
 	ldrh	w0, [x23]
-	cbnz	w0, .L1622
-	mov	w2, 3184
-	adrp	x1, .LANCHOR204
+	cbnz	w0, .L1679
+	mov	w2, 3532
+	adrp	x1, .LANCHOR212
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR204
+	add	x1, x1, :lo12:.LANCHOR212
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -10986,36 +11320,36 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1622:
+.L1679:
 	ldrh	w0, [x23]
 	sub	w0, w0, #1
 	strh	w0, [x23]
 	ldrh	w0, [x24, #:lo12:.LANCHOR40]
 	cmp	w0, w22
-	bls	.L1670
-	adrp	x25, .LANCHOR83
+	bls	.L1727
+	adrp	x25, .LANCHOR85
 	ubfiz	x21, x22, 1, 16
-	ldr	x0, [x25, #:lo12:.LANCHOR83]
+	ldr	x0, [x25, #:lo12:.LANCHOR85]
 	ldrh	w20, [x0, x21]
-	cbnz	w20, .L1670
+	cbnz	w20, .L1727
 	strh	w22, [x19]
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L1624
-	ldr	x0, [x25, #:lo12:.LANCHOR83]
+	cbnz	w0, .L1681
+	ldr	x0, [x25, #:lo12:.LANCHOR85]
 	mov	w1, -1
 	strh	w1, [x0, x21]
-	ldrh	w1, [x27, #:lo12:.LANCHOR85]
+	ldrh	w1, [x27, #:lo12:.LANCHOR87]
 	ldrh	w0, [x23]
 	add	w0, w0, w1
 	ldrh	w1, [x24, #:lo12:.LANCHOR40]
 	cmp	w0, w1
-	ble	.L1670
-	mov	w2, 3200
-	adrp	x1, .LANCHOR204
+	ble	.L1727
+	mov	w2, 3552
+	adrp	x1, .LANCHOR212
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR204
+	add	x1, x1, :lo12:.LANCHOR212
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -11023,21 +11357,21 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-	b	.L1670
-.L1654:
+	b	.L1727
+.L1711:
 	mov	w1, 0
-	b	.L1621
-.L1624:
-	ldrh	w1, [x27, #:lo12:.LANCHOR85]
+	b	.L1678
+.L1681:
+	ldrh	w1, [x27, #:lo12:.LANCHOR87]
 	ldrh	w0, [x23]
 	add	w0, w0, w1
 	ldrh	w1, [x24, #:lo12:.LANCHOR40]
 	cmp	w0, w1
-	ble	.L1626
-	mov	w2, 3203
-	adrp	x1, .LANCHOR204
+	ble	.L1683
+	mov	w2, 3556
+	adrp	x1, .LANCHOR212
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR204
+	add	x1, x1, :lo12:.LANCHOR212
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -11045,27 +11379,27 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1626:
+.L1683:
 	adrp	x1, .LANCHOR38
-	adrp	x25, .LANCHOR77
+	adrp	x25, .LANCHOR79
 	mov	w2, 56
 	mov	x3, 8
 	ldrh	w1, [x1, #:lo12:.LANCHOR38]
 	add	x26, x19, 16
-	ldr	x4, [x25, #:lo12:.LANCHOR77]
+	ldr	x4, [x25, #:lo12:.LANCHOR79]
 	mov	x5, x26
 	mov	w6, 65535
 	add	x0, x4, 8
 	umaddl	x1, w2, w1, x3
 	add	x1, x4, x1
-.L1627:
+.L1684:
 	cmp	x1, x0
-	bne	.L1629
-	cbnz	w20, .L1630
-	mov	w2, 3215
-	adrp	x1, .LANCHOR204
+	bne	.L1686
+	cbnz	w20, .L1687
+	mov	w2, 3571
+	adrp	x1, .LANCHOR212
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR204
+	add	x1, x1, :lo12:.LANCHOR212
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -11073,29 +11407,29 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1630:
-	adrp	x0, .LANCHOR28
-	adrp	x28, .LANCHOR78
-	ldr	w0, [x0, #:lo12:.LANCHOR28]
-	cbz	w0, .L1631
-	adrp	x0, .LANCHOR91
-	add	x0, x0, :lo12:.LANCHOR91
+.L1687:
+	adrp	x0, .LANCHOR104
+	adrp	x28, .LANCHOR80
+	ldr	w0, [x0, #:lo12:.LANCHOR104]
+	cbz	w0, .L1688
+	adrp	x0, .LANCHOR93
+	add	x0, x0, :lo12:.LANCHOR93
 	cmp	x19, x0
-	bne	.L1631
-	ldr	x0, [x28, #:lo12:.LANCHOR78]
+	bne	.L1688
+	ldr	x0, [x28, #:lo12:.LANCHOR80]
 	ldrh	w0, [x0, x21]
 	cmp	w0, 40
-	bls	.L1631
+	bls	.L1688
 	strb	wzr, [x19, 8]
-.L1631:
-	adrp	x0, .LANCHOR205
-	ldrh	w0, [x0, #:lo12:.LANCHOR205]
+.L1688:
+	adrp	x0, .LANCHOR213
+	ldrh	w0, [x0, #:lo12:.LANCHOR213]
 	cmp	w0, w22
-	bne	.L1632
-	mov	w2, 3222
-	adrp	x1, .LANCHOR204
+	bne	.L1689
+	mov	w2, 3578
+	adrp	x1, .LANCHOR212
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR204
+	add	x1, x1, :lo12:.LANCHOR212
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -11103,132 +11437,132 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1632:
+.L1689:
 	ldrb	w0, [x19, 8]
 	adrp	x6, .LANCHOR48
-	adrp	x5, .LANCHOR167
-	adrp	x4, .LANCHOR168
-	ldr	x1, [x28, #:lo12:.LANCHOR78]
-	cbnz	w0, .L1633
+	adrp	x5, .LANCHOR172
+	adrp	x4, .LANCHOR173
+	ldr	x1, [x28, #:lo12:.LANCHOR80]
+	cbnz	w0, .L1690
 	ldrh	w0, [x1, x21]
-	cbz	w0, .L1634
+	cbz	w0, .L1691
 	ldrh	w2, [x6, #:lo12:.LANCHOR48]
 	add	w0, w0, w2
-.L1682:
+.L1739:
 	strh	w0, [x1, x21]
 	mov	w1, 0
-	ldr	w0, [x5, #:lo12:.LANCHOR167]
+	ldr	w0, [x5, #:lo12:.LANCHOR172]
 	add	w0, w0, 1
-	str	w0, [x5, #:lo12:.LANCHOR167]
+	str	w0, [x5, #:lo12:.LANCHOR172]
 	mov	w0, w22
 	bl	ftl_set_blk_mode
-.L1636:
-	ldr	x0, [x28, #:lo12:.LANCHOR78]
+.L1693:
+	ldr	x0, [x28, #:lo12:.LANCHOR80]
 	ldrh	w1, [x0, x21]
-	adrp	x0, .LANCHOR169
-	ldr	w2, [x0, #:lo12:.LANCHOR169]
+	adrp	x0, .LANCHOR174
+	ldr	w2, [x0, #:lo12:.LANCHOR174]
 	cmp	w1, w2
-	bls	.L1637
-	str	w1, [x0, #:lo12:.LANCHOR169]
-.L1637:
-	ldr	w2, [x5, #:lo12:.LANCHOR167]
+	bls	.L1694
+	str	w1, [x0, #:lo12:.LANCHOR174]
+.L1694:
+	ldr	w2, [x5, #:lo12:.LANCHOR172]
 	mov	x3, 4
-	ldr	w1, [x4, #:lo12:.LANCHOR168]
+	ldr	w1, [x4, #:lo12:.LANCHOR173]
 	ldrh	w0, [x6, #:lo12:.LANCHOR48]
 	madd	w0, w0, w2, w1
 	ldrh	w1, [x24, #:lo12:.LANCHOR40]
 	udiv	w0, w0, w1
-	adrp	x1, .LANCHOR206
-	str	w0, [x1, #:lo12:.LANCHOR206]
-	adrp	x0, .LANCHOR191
-	ldr	x1, [x0, #:lo12:.LANCHOR191]
+	adrp	x1, .LANCHOR214
+	str	w0, [x1, #:lo12:.LANCHOR214]
+	adrp	x0, .LANCHOR199
+	ldr	x1, [x0, #:lo12:.LANCHOR199]
 	ldr	w0, [x1, 16]
 	add	w0, w0, 1
 	str	w0, [x1, 16]
 	mov	w1, 56
-	ldr	x0, [x25, #:lo12:.LANCHOR77]
+	ldr	x0, [x25, #:lo12:.LANCHOR79]
 	nop // between mem op and mult-accumulate
 	umaddl	x1, w1, w20, x3
 	add	x2, x0, 4
 	add	x1, x0, x1
-.L1638:
+.L1695:
 	cmp	x1, x2
-	bne	.L1639
-	adrp	x1, .LANCHOR15
-	ldrb	w1, [x1, #:lo12:.LANCHOR15]
-	cbz	w1, .L1640
+	bne	.L1696
+	adrp	x1, .LANCHOR16
+	ldrb	w1, [x1, #:lo12:.LANCHOR16]
+	cbz	w1, .L1697
 	ldrb	w1, [x19, 8]
 	mov	w2, w20
 	cmp	w1, 1
-	bne	.L1641
+	bne	.L1698
 	mov	w1, 0
-.L1683:
+.L1740:
 	bl	FlashEraseBlocks
-.L1640:
+.L1697:
 	ldrb	w1, [x19, 8]
 	mov	w2, w20
-	ldr	x0, [x25, #:lo12:.LANCHOR77]
+	ldr	x0, [x25, #:lo12:.LANCHOR79]
 	mov	x24, 0
 	bl	FlashEraseBlocks
 	mov	w1, 0
 	mov	x3, 56
-.L1642:
+.L1699:
 	cmp	w20, w24, uxth
-	bhi	.L1644
-	cbz	w1, .L1645
+	bhi	.L1701
+	cbz	w1, .L1702
 	mov	w0, w22
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L1645:
+.L1702:
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L1646
-	adrp	x0, .LANCHOR83
+	cbnz	w0, .L1703
+	adrp	x0, .LANCHOR85
 	mov	w1, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR83]
+	ldr	x0, [x0, #:lo12:.LANCHOR85]
 	strh	w1, [x0, x21]
-	b	.L1670
-.L1629:
+	b	.L1727
+.L1686:
 	ldrh	w3, [x5]
 	stp	xzr, xzr, [x0]
 	cmp	w3, w6
-	beq	.L1628
+	beq	.L1685
 	umaddl	x7, w20, w2, x4
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	lsl	w3, w3, 10
 	str	w3, [x7, 4]
-.L1628:
+.L1685:
 	add	x0, x0, 56
 	add	x5, x5, 2
-	b	.L1627
-.L1634:
+	b	.L1684
+.L1691:
 	mov	w0, 2
-	b	.L1682
-.L1633:
+	b	.L1739
+.L1690:
 	ldrh	w0, [x1, x21]
 	add	w0, w0, 1
 	strh	w0, [x1, x21]
-	ldr	w0, [x4, #:lo12:.LANCHOR168]
+	ldr	w0, [x4, #:lo12:.LANCHOR173]
 	add	w0, w0, 1
-	str	w0, [x4, #:lo12:.LANCHOR168]
+	str	w0, [x4, #:lo12:.LANCHOR173]
 	mov	w0, w22
-	bl	ftl_set_blk_mode.part.10
-	b	.L1636
-.L1639:
+	bl	ftl_set_blk_mode.part.11
+	b	.L1693
+.L1696:
 	ldr	w3, [x2]
 	and	w3, w3, -1024
 	str	w3, [x2], 56
-	b	.L1638
-.L1641:
+	b	.L1695
+.L1698:
 	mov	w1, 1
-	b	.L1683
-.L1644:
+	b	.L1740
+.L1701:
 	mul	x0, x24, x3
-	ldr	x2, [x25, #:lo12:.LANCHOR77]
+	ldr	x2, [x25, #:lo12:.LANCHOR79]
 	add	x4, x2, x0
 	ldr	w2, [x2, x0]
 	cmn	w2, #1
-	bne	.L1643
+	bne	.L1700
 	add	w1, w1, 1
 	ldr	w0, [x4, 4]
 	str	x3, [x29, 104]
@@ -11241,36 +11575,36 @@ allocate_data_superblock:
 	ldrb	w0, [x19, 7]
 	sub	w0, w0, #1
 	strb	w0, [x19, 7]
-.L1643:
+.L1700:
 	add	x24, x24, 1
 	add	x26, x26, 2
-	b	.L1642
-.L1646:
+	b	.L1699
+.L1703:
 	adrp	x1, .LANCHOR52
-	adrp	x2, .LANCHOR159
+	adrp	x2, .LANCHOR164
 	strh	wzr, [x19, 2]
 	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	strh	w22, [x19]
 	strb	wzr, [x19, 6]
 	mul	w0, w0, w1
-	ldr	w1, [x2, #:lo12:.LANCHOR159]
+	ldr	w1, [x2, #:lo12:.LANCHOR164]
 	str	w1, [x19, 12]
 	add	w1, w1, 1
-	str	w1, [x2, #:lo12:.LANCHOR159]
-	adrp	x1, .LANCHOR83
+	str	w1, [x2, #:lo12:.LANCHOR164]
+	adrp	x1, .LANCHOR85
 	and	w0, w0, 65535
 	strh	w0, [x19, 4]
-	ldr	x1, [x1, #:lo12:.LANCHOR83]
+	ldr	x1, [x1, #:lo12:.LANCHOR85]
 	strh	w0, [x1, x21]
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1647
+	cbz	w0, .L1704
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L1617
-.L1647:
-	mov	w2, 3281
-	adrp	x1, .LANCHOR204
+	cbnz	w0, .L1674
+.L1704:
+	mov	w2, 3642
+	adrp	x1, .LANCHOR212
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR204
+	add	x1, x1, :lo12:.LANCHOR212
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -11278,7 +11612,7 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1617:
+.L1674:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -11287,7 +11621,7 @@ allocate_data_superblock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1679:
+.L1736:
 	mov	w0, 0
 	ret
 	.size	allocate_data_superblock, .-allocate_data_superblock
@@ -11299,24 +11633,24 @@ FtlGcFreeBadSuperBlk:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR116
+	adrp	x21, .LANCHOR119
 	stp	x25, x26, [sp, 64]
 	and	w25, w0, 65535
-	ldrh	w0, [x21, #:lo12:.LANCHOR116]
+	ldrh	w0, [x21, #:lo12:.LANCHOR119]
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	str	x27, [sp, 80]
-	cbz	w0, .L1685
-	adrp	x23, .LANCHOR117
-	add	x24, x23, :lo12:.LANCHOR117
+	cbz	w0, .L1742
+	adrp	x23, .LANCHOR120
+	add	x24, x23, :lo12:.LANCHOR120
 	mov	w19, 0
-.L1686:
+.L1743:
 	adrp	x0, .LANCHOR38
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w0, w19
-	bhi	.L1692
+	bhi	.L1749
 	bl	FtlGcReFreshBadBlk
-.L1685:
+.L1742:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -11325,28 +11659,28 @@ FtlGcFreeBadSuperBlk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1692:
+.L1749:
 	adrp	x0, .LANCHOR47
 	add	x0, x0, :lo12:.LANCHOR47
 	mov	w1, w25
-	add	x22, x21, :lo12:.LANCHOR116
+	add	x22, x21, :lo12:.LANCHOR119
 	mov	w20, 0
 	ldrb	w0, [x0, w19, sxtw]
 	bl	V2P_block
 	and	w26, w0, 65535
-.L1687:
+.L1744:
 	ldrh	w0, [x22]
 	cmp	w0, w20
-	bhi	.L1691
+	bhi	.L1748
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1686
-.L1691:
-	add	x0, x23, :lo12:.LANCHOR117
+	b	.L1743
+.L1748:
+	add	x0, x23, :lo12:.LANCHOR120
 	add	w27, w20, 1
 	ldrh	w0, [x0, w20, sxtw 1]
 	cmp	w0, w26
-	bne	.L1688
+	bne	.L1745
 	mov	w0, w26
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
@@ -11354,22 +11688,22 @@ FtlGcFreeBadSuperBlk:
 	sxtw	x3, w27
 	and	x4, x20, 65535
 	mov	x0, 0
-.L1689:
+.L1746:
 	add	w2, w20, w0
 	cmp	w1, w2, uxth
-	bhi	.L1690
+	bhi	.L1747
 	sub	w1, w1, #1
 	strh	w1, [x22]
-.L1688:
+.L1745:
 	and	w20, w27, 65535
-	b	.L1687
-.L1690:
+	b	.L1744
+.L1747:
 	add	x2, x3, x0
 	ldrh	w5, [x24, x2, lsl 1]
 	add	x2, x4, x0
 	add	x0, x0, 1
 	strh	w5, [x24, x2, lsl 1]
-	b	.L1689
+	b	.L1746
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
 	.section	.text.update_vpc_list,"ax",@progbits
 	.align	2
@@ -11377,32 +11711,32 @@ FtlGcFreeBadSuperBlk:
 	.type	update_vpc_list, %function
 update_vpc_list:
 	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LANCHOR83
+	adrp	x1, .LANCHOR85
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w19, w0, 65535
-	ldr	x1, [x1, #:lo12:.LANCHOR83]
+	ldr	x1, [x1, #:lo12:.LANCHOR85]
 	ubfiz	x0, x19, 1, 16
 	ldrh	w0, [x1, x0]
-	cbnz	w0, .L1698
-	adrp	x0, .LANCHOR205
-	ldrh	w1, [x0, #:lo12:.LANCHOR205]
+	cbnz	w0, .L1755
+	adrp	x0, .LANCHOR213
+	ldrh	w1, [x0, #:lo12:.LANCHOR213]
 	cmp	w1, w19
-	bne	.L1699
+	bne	.L1756
 	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR205]
-.L1700:
-	adrp	x20, .LANCHOR85
+	strh	w1, [x0, #:lo12:.LANCHOR213]
+.L1757:
+	adrp	x20, .LANCHOR87
 	mov	w1, w19
-	adrp	x0, .LANCHOR82
-	add	x0, x0, :lo12:.LANCHOR82
+	adrp	x0, .LANCHOR84
+	add	x0, x0, :lo12:.LANCHOR84
 	bl	List_remove_node
-	ldrh	w0, [x20, #:lo12:.LANCHOR85]
-	cbnz	w0, .L1702
-	mov	w2, 3392
-	adrp	x1, .LANCHOR207
+	ldrh	w0, [x20, #:lo12:.LANCHOR87]
+	cbnz	w0, .L1759
+	mov	w2, 3767
+	adrp	x1, .LANCHOR215
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR207
+	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -11410,26 +11744,26 @@ update_vpc_list:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1702:
-	ldrh	w0, [x20, #:lo12:.LANCHOR85]
+.L1759:
+	ldrh	w0, [x20, #:lo12:.LANCHOR87]
 	sub	w0, w0, #1
-	strh	w0, [x20, #:lo12:.LANCHOR85]
+	strh	w0, [x20, #:lo12:.LANCHOR87]
 	mov	w0, w19
 	bl	free_data_superblock
 	mov	w0, w19
 	bl	FtlGcFreeBadSuperBlk
-	adrp	x0, .LANCHOR88
-	ldrh	w1, [x20, #:lo12:.LANCHOR85]
-	ldrh	w0, [x0, #:lo12:.LANCHOR88]
+	adrp	x0, .LANCHOR90
+	ldrh	w1, [x20, #:lo12:.LANCHOR87]
+	ldrh	w0, [x0, #:lo12:.LANCHOR90]
 	add	w0, w0, w1
 	adrp	x1, .LANCHOR40
 	ldrh	w1, [x1, #:lo12:.LANCHOR40]
 	cmp	w0, w1
-	ble	.L1706
-	mov	w2, 3395
-	adrp	x1, .LANCHOR207
+	ble	.L1763
+	mov	w2, 3770
+	adrp	x1, .LANCHOR215
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR207
+	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -11437,32 +11771,32 @@ update_vpc_list:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1706:
+.L1763:
 	mov	w0, 1
-	b	.L1697
-.L1699:
-	adrp	x0, .LANCHOR91
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
-	cmp	w0, w19
-	beq	.L1705
-	adrp	x0, .LANCHOR92
-	ldrh	w0, [x0, #:lo12:.LANCHOR92]
-	cmp	w0, w19
-	beq	.L1705
+	b	.L1754
+.L1756:
 	adrp	x0, .LANCHOR93
 	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w0, w19
-	bne	.L1700
-.L1705:
+	beq	.L1762
+	adrp	x0, .LANCHOR94
+	ldrh	w0, [x0, #:lo12:.LANCHOR94]
+	cmp	w0, w19
+	beq	.L1762
+	adrp	x0, .LANCHOR95
+	ldrh	w0, [x0, #:lo12:.LANCHOR95]
+	cmp	w0, w19
+	bne	.L1757
+.L1762:
 	mov	w0, 0
-.L1697:
+.L1754:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1698:
+.L1755:
 	mov	w0, w19
 	bl	List_update_data_list
-	b	.L1705
+	b	.L1762
 	.size	update_vpc_list, .-update_vpc_list
 	.section	.text.decrement_vpc_count,"ax",@progbits
 	.align	2
@@ -11476,24 +11810,24 @@ decrement_vpc_count:
 	stp	x21, x22, [sp, 32]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1709
-	adrp	x20, .LANCHOR83
+	beq	.L1766
+	adrp	x20, .LANCHOR85
 	ubfiz	x21, x19, 1, 16
-	ldr	x1, [x20, #:lo12:.LANCHOR83]
+	ldr	x1, [x20, #:lo12:.LANCHOR85]
 	ldrh	w0, [x1, x21]
-	cbnz	w0, .L1710
+	cbnz	w0, .L1767
 	mov	w2, 0
 	mov	w1, w19
-	adrp	x0, .LC36
-	add	x0, x0, :lo12:.LC36
+	adrp	x0, .LC38
+	add	x0, x0, :lo12:.LC38
 	bl	printf
-	ldr	x0, [x20, #:lo12:.LANCHOR83]
+	ldr	x0, [x20, #:lo12:.LANCHOR85]
 	ldrh	w0, [x0, x21]
-	cbnz	w0, .L1711
-	mov	w2, 3410
-	adrp	x1, .LANCHOR208
+	cbnz	w0, .L1768
+	mov	w2, 3786
+	adrp	x1, .LANCHOR216
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR208
+	add	x1, x1, :lo12:.LANCHOR216
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -11501,26 +11835,26 @@ decrement_vpc_count:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1711:
-	ldr	x0, [x20, #:lo12:.LANCHOR83]
-	adrp	x6, .LANCHOR87
-	add	x6, x6, :lo12:.LANCHOR87
+.L1768:
+	ldr	x0, [x20, #:lo12:.LANCHOR85]
+	adrp	x6, .LANCHOR89
+	add	x6, x6, :lo12:.LANCHOR89
 	mov	w1, 32
 	strh	w1, [x0, x21]
 	mov	w1, w19
 	mov	x0, x6
 	bl	test_node_in_list
-	cbz	w0, .L1712
-	adrp	x22, .LANCHOR88
+	cbz	w0, .L1769
+	adrp	x22, .LANCHOR90
 	mov	w1, w19
 	mov	x0, x6
 	bl	List_remove_node
-	ldrh	w0, [x22, #:lo12:.LANCHOR88]
-	cbnz	w0, .L1713
-	mov	w2, 3414
-	adrp	x1, .LANCHOR208
+	ldrh	w0, [x22, #:lo12:.LANCHOR90]
+	cbnz	w0, .L1770
+	mov	w2, 3792
+	adrp	x1, .LANCHOR216
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR208
+	add	x1, x1, :lo12:.LANCHOR216
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -11528,62 +11862,62 @@ decrement_vpc_count:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1713:
-	ldrh	w0, [x22, #:lo12:.LANCHOR88]
+.L1770:
+	ldrh	w0, [x22, #:lo12:.LANCHOR90]
 	sub	w0, w0, #1
-	strh	w0, [x22, #:lo12:.LANCHOR88]
+	strh	w0, [x22, #:lo12:.LANCHOR90]
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-	ldr	x0, [x20, #:lo12:.LANCHOR83]
+	ldr	x0, [x20, #:lo12:.LANCHOR85]
 	mov	w1, w19
 	ldrh	w2, [x0, x21]
-	adrp	x0, .LC37
-	add	x0, x0, :lo12:.LC37
+	adrp	x0, .LC39
+	add	x0, x0, :lo12:.LC39
 	bl	printf
-.L1712:
+.L1769:
 	mov	w0, w19
 	bl	FtlGcRefreshBlock
-.L1716:
+.L1773:
 	mov	w20, 0
-	b	.L1708
-.L1710:
+	b	.L1765
+.L1767:
 	sub	w0, w0, #1
 	strh	w0, [x1, x21]
-.L1709:
-	adrp	x21, .LANCHOR133
+.L1766:
+	adrp	x21, .LANCHOR136
 	mov	w1, 65535
-	ldrh	w0, [x21, #:lo12:.LANCHOR133]
+	ldrh	w0, [x21, #:lo12:.LANCHOR136]
 	cmp	w0, w1
-	bne	.L1715
-	strh	w19, [x21, #:lo12:.LANCHOR133]
-	b	.L1716
-.L1715:
+	bne	.L1772
+	strh	w19, [x21, #:lo12:.LANCHOR136]
+	b	.L1773
+.L1772:
 	cmp	w19, w0
-	beq	.L1716
+	beq	.L1773
 	bl	update_vpc_list
 	cmp	w0, 0
-	adrp	x1, .LANCHOR81
-	adrp	x0, .LANCHOR82
-	strh	w19, [x21, #:lo12:.LANCHOR133]
+	adrp	x1, .LANCHOR83
+	adrp	x0, .LANCHOR84
+	strh	w19, [x21, #:lo12:.LANCHOR136]
 	cset	w20, ne
-	ldr	x1, [x1, #:lo12:.LANCHOR81]
-	ldr	x0, [x0, #:lo12:.LANCHOR82]
+	ldr	x1, [x1, #:lo12:.LANCHOR83]
+	ldr	x0, [x0, #:lo12:.LANCHOR84]
 	sub	x0, x0, x1
 	mov	x1, -6148914691236517206
 	asr	x0, x0, 1
 	movk	x1, 0xaaab, lsl 0
 	mul	x0, x0, x1
-	adrp	x1, .LANCHOR83
-	ldr	x1, [x1, #:lo12:.LANCHOR83]
+	adrp	x1, .LANCHOR85
+	ldr	x1, [x1, #:lo12:.LANCHOR85]
 	and	x2, x0, 65535
 	ldrh	w1, [x1, x2, lsl 1]
-	cbnz	w1, .L1708
+	cbnz	w1, .L1765
 	cmp	w19, w0, uxth
-	beq	.L1708
-	mov	w2, 3435
-	adrp	x1, .LANCHOR208
+	beq	.L1765
+	mov	w2, 3816
+	adrp	x1, .LANCHOR216
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR208
+	add	x1, x1, :lo12:.LANCHOR216
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -11591,7 +11925,7 @@ decrement_vpc_count:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1708:
+.L1765:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11604,7 +11938,7 @@ decrement_vpc_count:
 	.type	FtlSlcSuperblockCheck, %function
 FtlSlcSuperblockCheck:
 	ldrh	w1, [x0, 4]
-	cbz	w1, .L1733
+	cbz	w1, .L1790
 	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
@@ -11613,46 +11947,46 @@ FtlSlcSuperblockCheck:
 	stp	x21, x22, [sp, 32]
 	str	x23, [sp, 48]
 	cmp	w1, w20
-	beq	.L1721
+	beq	.L1778
 	mov	x19, x0
 	ldrb	w0, [x0, 6]
-	adrp	x22, .LANCHOR15
-	adrp	x21, .LANCHOR120
+	adrp	x22, .LANCHOR16
+	adrp	x21, .LANCHOR123
 	add	x0, x0, 8
-	add	x23, x22, :lo12:.LANCHOR15
-	add	x21, x21, :lo12:.LANCHOR120
+	add	x23, x22, :lo12:.LANCHOR16
+	add	x21, x21, :lo12:.LANCHOR123
 	ldrh	w0, [x19, x0, lsl 1]
-.L1725:
+.L1782:
 	cmp	w0, w20
-	beq	.L1727
+	beq	.L1784
 	ldrb	w0, [x19, 8]
 	cmp	w0, 1
-	bne	.L1728
+	bne	.L1785
 	ldrb	w1, [x23]
-	cbnz	w1, .L1728
+	cbnz	w1, .L1785
 	ldrh	w1, [x19, 2]
 	ldrh	w1, [x21, x1, lsl 1]
 	cmp	w1, w20
-	bne	.L1728
+	bne	.L1785
 	ldrh	w0, [x19, 4]
 	sub	w0, w0, #1
 	strh	w0, [x19, 4]
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1727
+	cbnz	w0, .L1784
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
-.L1736:
+.L1793:
 	strh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
-.L1721:
+.L1778:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1727:
+.L1784:
 	ldrb	w0, [x19, 6]
 	adrp	x1, .LANCHOR38
 	add	w0, w0, 1
@@ -11660,30 +11994,30 @@ FtlSlcSuperblockCheck:
 	and	w0, w0, 255
 	strb	w0, [x19, 6]
 	cmp	w1, w0
-	bne	.L1726
+	bne	.L1783
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L1726:
+.L1783:
 	ldrb	w0, [x19, 6]
 	add	x0, x0, 8
 	ldrh	w0, [x19, x0, lsl 1]
-	b	.L1725
-.L1728:
-	ldrb	w1, [x22, #:lo12:.LANCHOR15]
-	cbz	w1, .L1721
+	b	.L1782
+.L1785:
+	ldrb	w1, [x22, #:lo12:.LANCHOR16]
+	cbz	w1, .L1778
 	cmp	w0, 1
-	bne	.L1721
+	bne	.L1778
 	adrp	x0, .LANCHOR53
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bcc	.L1721
+	bcc	.L1778
 	ldrh	w0, [x19]
-	adrp	x1, .LANCHOR83
+	adrp	x1, .LANCHOR85
 	ldrh	w3, [x19, 4]
-	ldr	x2, [x1, #:lo12:.LANCHOR83]
+	ldr	x2, [x1, #:lo12:.LANCHOR85]
 	lsl	x0, x0, 1
 	ldrh	w1, [x2, x0]
 	sub	w1, w1, w3
@@ -11691,8 +12025,8 @@ FtlSlcSuperblockCheck:
 	adrp	x0, .LANCHOR52
 	strh	wzr, [x19, 4]
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
-	b	.L1736
-.L1733:
+	b	.L1793
+.L1790:
 	ret
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
 	.section	.text.get_new_active_ppa,"ax",@progbits
@@ -11710,11 +12044,11 @@ get_new_active_ppa:
 	stp	x23, x24, [sp, 48]
 	cmp	w1, w0
 	str	x25, [sp, 64]
-	bne	.L1738
-	mov	w2, 3332
-	adrp	x1, .LANCHOR209
+	bne	.L1795
+	mov	w2, 3700
+	adrp	x1, .LANCHOR217
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR209
+	add	x1, x1, :lo12:.LANCHOR217
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -11722,16 +12056,16 @@ get_new_active_ppa:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1738:
+.L1795:
 	adrp	x20, .LANCHOR52
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bne	.L1739
-	mov	w2, 3333
-	adrp	x1, .LANCHOR209
+	bne	.L1796
+	mov	w2, 3701
+	adrp	x1, .LANCHOR217
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR209
+	add	x1, x1, :lo12:.LANCHOR217
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -11739,13 +12073,13 @@ get_new_active_ppa:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1739:
+.L1796:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1740
-	mov	w2, 3334
-	adrp	x1, .LANCHOR209
+	cbnz	w0, .L1797
+	mov	w2, 3702
+	adrp	x1, .LANCHOR217
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR209
+	add	x1, x1, :lo12:.LANCHOR217
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -11753,104 +12087,104 @@ get_new_active_ppa:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1740:
+.L1797:
 	ldrb	w0, [x19, 6]
 	adrp	x21, .LANCHOR38
 	strb	wzr, [x19, 10]
-	adrp	x23, .LANCHOR15
+	adrp	x23, .LANCHOR16
 	add	x0, x0, 8
-	adrp	x24, .LANCHOR120
-	add	x23, x23, :lo12:.LANCHOR15
-	add	x24, x24, :lo12:.LANCHOR120
+	adrp	x24, .LANCHOR123
+	add	x23, x23, :lo12:.LANCHOR16
+	add	x24, x24, :lo12:.LANCHOR123
 	add	x25, x21, :lo12:.LANCHOR38
 	ldrh	w22, [x19, x0, lsl 1]
-.L1741:
+.L1798:
 	mov	w2, 65535
 	cmp	w22, w2
-	beq	.L1742
+	beq	.L1799
 	ldrb	w0, [x19, 8]
 	ldrh	w1, [x19, 4]
 	cmp	w0, 1
 	ldrh	w0, [x19, 2]
-	bne	.L1744
+	bne	.L1801
 	ldrb	w3, [x23]
-	cbnz	w3, .L1744
+	cbnz	w3, .L1801
 	ldrh	w3, [x24, w0, sxtw 1]
 	cmp	w3, w2
-	bne	.L1744
+	bne	.L1801
 	ldrh	w0, [x19]
 	sub	w1, w1, #1
 	strh	w1, [x19, 4]
 	bl	decrement_vpc_count
-.L1742:
+.L1799:
 	ldrb	w0, [x19, 6]
 	ldrh	w1, [x25]
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x19, 6]
 	cmp	w1, w0
-	bne	.L1743
+	bne	.L1800
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L1743:
+.L1800:
 	ldrb	w0, [x19, 6]
 	add	x0, x0, 8
 	ldrh	w22, [x19, x0, lsl 1]
-	b	.L1741
-.L1744:
-	adrp	x23, .LANCHOR15
-	adrp	x24, .LANCHOR120
+	b	.L1798
+.L1801:
+	adrp	x23, .LANCHOR16
+	adrp	x24, .LANCHOR123
 	orr	w22, w0, w22, lsl 10
-	add	x23, x23, :lo12:.LANCHOR15
-	add	x24, x24, :lo12:.LANCHOR120
+	add	x23, x23, :lo12:.LANCHOR16
+	add	x24, x24, :lo12:.LANCHOR123
 	sub	w1, w1, #1
 	strh	w1, [x19, 4]
-.L1745:
+.L1802:
 	ldrb	w0, [x19, 6]
 	mov	w1, 65535
 	ldrh	w3, [x21, #:lo12:.LANCHOR38]
-.L1747:
+.L1804:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	cmp	w0, w3
-	bne	.L1746
+	bne	.L1803
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
 	mov	w0, 0
-.L1746:
+.L1803:
 	add	x2, x19, x0, sxtw 1
 	ldrh	w2, [x2, 16]
 	cmp	w2, w1
-	beq	.L1747
+	beq	.L1804
 	strb	w0, [x19, 6]
 	ldrb	w0, [x19, 8]
 	cmp	w0, 1
-	bne	.L1748
+	bne	.L1805
 	ldrb	w2, [x23]
 	ldrh	w0, [x19, 2]
-	cbnz	w2, .L1749
+	cbnz	w2, .L1806
 	ldrh	w0, [x24, w0, sxtw 1]
 	cmp	w0, w1
-	bne	.L1748
+	bne	.L1805
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1748
+	cbz	w0, .L1805
 	sub	w0, w0, #1
 	strh	w0, [x19, 4]
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-	b	.L1745
-.L1749:
+	b	.L1802
+.L1806:
 	adrp	x1, .LANCHOR53
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	cmp	w0, w1
-	bcc	.L1748
+	bcc	.L1805
 	ldrh	w0, [x19]
-	adrp	x1, .LANCHOR83
+	adrp	x1, .LANCHOR85
 	ldrh	w3, [x19, 4]
-	ldr	x2, [x1, #:lo12:.LANCHOR83]
+	ldr	x2, [x1, #:lo12:.LANCHOR85]
 	lsl	x0, x0, 1
 	ldrh	w1, [x2, x0]
 	sub	w1, w1, w3
@@ -11859,17 +12193,17 @@ get_new_active_ppa:
 	ldrh	w0, [x20, #:lo12:.LANCHOR52]
 	strh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
-.L1748:
+.L1805:
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bne	.L1737
+	bne	.L1794
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1737
-	mov	w2, 3378
-	adrp	x1, .LANCHOR209
+	cbz	w0, .L1794
+	mov	w2, 3752
+	adrp	x1, .LANCHOR217
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR209
+	add	x1, x1, :lo12:.LANCHOR217
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -11877,7 +12211,7 @@ get_new_active_ppa:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1737:
+.L1794:
 	mov	w0, w22
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -11892,50 +12226,50 @@ get_new_active_ppa:
 	.type	FtlVpcTblFlush, %function
 FtlVpcTblFlush:
 	stp	x29, x30, [sp, -128]!
-	adrp	x0, .LANCHOR76
+	adrp	x0, .LANCHOR78
 	add	x29, sp, 0
-	ldr	w1, [x0, #:lo12:.LANCHOR76]
+	ldr	w1, [x0, #:lo12:.LANCHOR78]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	str	x0, [x29, 112]
-	cbnz	w1, .L1762
-	adrp	x25, .LANCHOR188
-	adrp	x27, .LANCHOR210
-	adrp	x23, .LANCHOR183
-	adrp	x20, .LANCHOR203
-	ldr	x19, [x25, #:lo12:.LANCHOR188]
-	add	x22, x20, :lo12:.LANCHOR203
-	ldr	x0, [x23, #:lo12:.LANCHOR183]
-	add	x1, x27, :lo12:.LANCHOR210
-	ldrh	w2, [x27, #:lo12:.LANCHOR210]
+	cbnz	w1, .L1819
+	adrp	x25, .LANCHOR195
+	adrp	x27, .LANCHOR218
+	adrp	x23, .LANCHOR189
+	adrp	x20, .LANCHOR211
+	ldr	x19, [x25, #:lo12:.LANCHOR195]
+	add	x22, x20, :lo12:.LANCHOR211
+	ldr	x0, [x23, #:lo12:.LANCHOR189]
+	add	x1, x27, :lo12:.LANCHOR218
+	ldrh	w2, [x27, #:lo12:.LANCHOR218]
 	mov	w3, 19539
 	stp	x0, x19, [x22, 8]
 	movk	w3, 0x4654, lsl 16
 	strh	w2, [x19, 2]
 	mov	w2, -3932
 	strh	w2, [x19]
-	adrp	x24, .LANCHOR159
+	adrp	x24, .LANCHOR164
 	ldr	w2, [x1, 8]
 	adrp	x26, .LANCHOR57
 	ldrh	w1, [x1, 6]
 	stp	w2, wzr, [x19, 4]
-	adrp	x2, .LANCHOR80
-	add	x21, x2, :lo12:.LANCHOR80
+	adrp	x2, .LANCHOR82
+	add	x21, x2, :lo12:.LANCHOR82
 	str	wzr, [x19, 12]
-	str	w3, [x2, #:lo12:.LANCHOR80]
-	mov	w2, 87
+	str	w3, [x2, #:lo12:.LANCHOR82]
+	mov	w2, 99
 	movk	w2, 0x5000, lsl 16
 	strh	w1, [x21, 8]
 	adrp	x1, .LANCHOR45
 	str	w2, [x21, 4]
-	adrp	x2, .LANCHOR91
+	adrp	x2, .LANCHOR93
 	ldrh	w1, [x1, #:lo12:.LANCHOR45]
 	strb	w1, [x21, 10]
-	add	x1, x2, :lo12:.LANCHOR91
-	ldrh	w2, [x2, #:lo12:.LANCHOR91]
+	add	x1, x2, :lo12:.LANCHOR93
+	ldrh	w2, [x2, #:lo12:.LANCHOR93]
 	strh	w2, [x21, 14]
 	ldrb	w3, [x1, 6]
 	ldrh	w2, [x1, 2]
@@ -11943,9 +12277,9 @@ FtlVpcTblFlush:
 	strb	w1, [x21, 11]
 	orr	w2, w3, w2, lsl 6
 	strh	w2, [x21, 16]
-	adrp	x2, .LANCHOR92
-	add	x1, x2, :lo12:.LANCHOR92
-	ldrh	w2, [x2, #:lo12:.LANCHOR92]
+	adrp	x2, .LANCHOR94
+	add	x1, x2, :lo12:.LANCHOR94
+	ldrh	w2, [x2, #:lo12:.LANCHOR94]
 	ldrb	w3, [x1, 6]
 	strh	w2, [x21, 18]
 	ldrh	w2, [x1, 2]
@@ -11953,30 +12287,30 @@ FtlVpcTblFlush:
 	strb	w1, [x21, 12]
 	orr	w2, w3, w2, lsl 6
 	strh	w2, [x21, 20]
-	adrp	x2, .LANCHOR93
-	add	x1, x2, :lo12:.LANCHOR93
-	ldrh	w2, [x2, #:lo12:.LANCHOR93]
+	adrp	x2, .LANCHOR95
+	add	x1, x2, :lo12:.LANCHOR95
+	ldrh	w2, [x2, #:lo12:.LANCHOR95]
 	strh	w2, [x21, 22]
 	ldrb	w3, [x1, 6]
 	ldrh	w2, [x1, 2]
 	ldrb	w1, [x1, 8]
 	strb	w1, [x21, 13]
-	adrp	x1, .LANCHOR167
+	adrp	x1, .LANCHOR172
 	orr	w2, w3, w2, lsl 6
 	strh	w2, [x21, 24]
-	ldr	w1, [x1, #:lo12:.LANCHOR167]
+	ldr	w1, [x1, #:lo12:.LANCHOR172]
 	str	w1, [x21, 32]
-	ldr	w1, [x24, #:lo12:.LANCHOR159]
+	ldr	w1, [x24, #:lo12:.LANCHOR164]
 	str	w1, [x21, 40]
-	adrp	x1, .LANCHOR160
+	adrp	x1, .LANCHOR165
 	ldrh	w2, [x26, #:lo12:.LANCHOR57]
-	ldr	w1, [x1, #:lo12:.LANCHOR160]
+	ldr	w1, [x1, #:lo12:.LANCHOR165]
 	str	w1, [x21, 36]
-	adrp	x1, .LANCHOR112
-	ldrh	w1, [x1, #:lo12:.LANCHOR112]
+	adrp	x1, .LANCHOR115
+	ldrh	w1, [x1, #:lo12:.LANCHOR115]
 	strh	w1, [x21, 44]
-	adrp	x1, .LANCHOR113
-	ldrh	w1, [x1, #:lo12:.LANCHOR113]
+	adrp	x1, .LANCHOR116
+	ldrh	w1, [x1, #:lo12:.LANCHOR116]
 	strh	w1, [x21, 46]
 	mov	w1, 255
 	bl	ftl_memset
@@ -11985,10 +12319,10 @@ FtlVpcTblFlush:
 	mov	w2, 48
 	adrp	x21, .LANCHOR40
 	bl	ftl_memcpy
-	adrp	x1, .LANCHOR83
+	adrp	x1, .LANCHOR85
 	ldrh	w2, [x21, #:lo12:.LANCHOR40]
 	ldr	x0, [x22, 8]
-	ldr	x1, [x1, #:lo12:.LANCHOR83]
+	ldr	x1, [x1, #:lo12:.LANCHOR85]
 	lsl	w2, w2, 1
 	add	x0, x0, 48
 	bl	ftl_memcpy
@@ -11998,7 +12332,7 @@ FtlVpcTblFlush:
 	ldr	x1, [x1, #:lo12:.LANCHOR1]
 	lsr	w2, w0, 3
 	ubfiz	x0, x0, 1, 16
-	add	x0, x0, 48
+	add	x0, x0, 51
 	add	w2, w2, 4
 	and	x0, x0, -4
 	add	x0, x3, x0
@@ -12006,69 +12340,69 @@ FtlVpcTblFlush:
 	adrp	x0, .LANCHOR69
 	str	x26, [x29, 104]
 	ldrh	w0, [x0, #:lo12:.LANCHOR69]
-	cbz	w0, .L1763
+	cbz	w0, .L1820
 	ldrh	w0, [x21, #:lo12:.LANCHOR40]
 	adrp	x1, .LANCHOR66
 	ldr	x3, [x22, 8]
 	ldrh	w2, [x1, #:lo12:.LANCHOR66]
 	lsr	w1, w0, 3
 	add	w0, w1, w0, lsl 1
-	adrp	x1, .LANCHOR131
+	adrp	x1, .LANCHOR134
 	add	w0, w0, 52
 	lsl	w2, w2, 2
-	ldr	x1, [x1, #:lo12:.LANCHOR131]
+	ldr	x1, [x1, #:lo12:.LANCHOR134]
 	and	x0, x0, 65532
 	add	x0, x3, x0
 	bl	ftl_memcpy
-.L1763:
+.L1820:
 	mov	w0, 0
 	bl	FtlUpdateVaildLpn
 	adrp	x0, .LANCHOR2
-	add	x22, x20, :lo12:.LANCHOR203
+	add	x22, x20, :lo12:.LANCHOR211
 	add	x0, x0, :lo12:.LANCHOR2
-	add	x28, x27, :lo12:.LANCHOR210
+	add	x28, x27, :lo12:.LANCHOR218
 	str	x0, [x29, 120]
 	adrp	x27, .LANCHOR53
 	mov	w21, 0
 	add	x0, x27, :lo12:.LANCHOR53
 	mov	w26, 65535
 	str	x0, [x29, 96]
-.L1764:
+.L1821:
 	ldrh	w2, [x28, 2]
 	ldrh	w1, [x28]
-	ldr	x0, [x23, #:lo12:.LANCHOR183]
+	ldr	x0, [x23, #:lo12:.LANCHOR189]
 	str	x0, [x22, 8]
-	ldr	x0, [x25, #:lo12:.LANCHOR188]
+	ldr	x0, [x25, #:lo12:.LANCHOR195]
 	str	x0, [x22, 16]
 	orr	w0, w2, w1, lsl 10
 	str	w0, [x22, 4]
 	ldrh	w0, [x27, #:lo12:.LANCHOR53]
 	sub	w0, w0, #1
 	cmp	w2, w0
-	blt	.L1765
+	blt	.L1822
 	ldrh	w26, [x28, 4]
 	strh	wzr, [x28, 2]
 	strh	w1, [x28, 4]
 	bl	FtlFreeSysBlkQueueOut
-	ldr	w1, [x24, #:lo12:.LANCHOR159]
+	ldr	w1, [x24, #:lo12:.LANCHOR164]
 	str	w1, [x28, 8]
 	add	w2, w1, 1
-	str	w2, [x24, #:lo12:.LANCHOR159]
+	str	w2, [x24, #:lo12:.LANCHOR164]
 	ubfiz	w2, w0, 10, 16
 	str	w2, [x22, 4]
 	strh	w0, [x28]
 	strh	w0, [x19, 2]
 	str	w1, [x19, 4]
-.L1765:
+.L1822:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
-	cbz	w0, .L1766
+	cbz	w0, .L1823
 	ldr	x0, [x29, 104]
 	ldrh	w1, [x0, #:lo12:.LANCHOR57]
-	ldr	x0, [x23, #:lo12:.LANCHOR183]
+	ldr	x0, [x23, #:lo12:.LANCHOR189]
 	bl	js_hash
 	str	w0, [x19, 12]
-.L1766:
+.L1823:
 	mov	w3, 1
 	mov	x0, x22
 	mov	w1, w3
@@ -12080,13 +12414,13 @@ FtlVpcTblFlush:
 	and	w0, w0, 65535
 	strh	w0, [x28, 2]
 	cmn	w1, #1
-	bne	.L1767
+	bne	.L1824
 	cmp	w0, 1
-	bne	.L1768
-	mov	w2, 1219
-	adrp	x1, .LANCHOR211
+	bne	.L1825
+	mov	w2, 1375
+	adrp	x1, .LANCHOR219
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR211
+	add	x1, x1, :lo12:.LANCHOR219
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -12094,29 +12428,29 @@ FtlVpcTblFlush:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1768:
+.L1825:
 	ldrh	w0, [x28, 2]
 	cmp	w0, 1
-	bne	.L1769
+	bne	.L1826
 	ldr	x0, [x29, 96]
 	ldrh	w0, [x0]
 	sub	w0, w0, #1
 	strh	w0, [x28, 2]
-.L1769:
+.L1826:
 	add	w21, w21, 1
 	and	w21, w21, 65535
 	cmp	w21, 3
-	bls	.L1764
-	add	x20, x20, :lo12:.LANCHOR203
+	bls	.L1821
+	add	x20, x20, :lo12:.LANCHOR211
 	mov	w2, w21
-	adrp	x0, .LC38
-	add	x0, x0, :lo12:.LC38
+	adrp	x0, .LC40
+	add	x0, x0, :lo12:.LC40
 	ldr	w1, [x20, 4]
 	bl	printf
 	ldr	x1, [x29, 112]
 	mov	w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR76]
-.L1762:
+	str	w0, [x1, #:lo12:.LANCHOR78]
+.L1819:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -12125,18 +12459,18 @@ FtlVpcTblFlush:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1767:
+.L1824:
 	cmp	w0, 1
-	beq	.L1764
+	beq	.L1821
 	cmp	w1, 256
-	beq	.L1764
+	beq	.L1821
 	mov	w0, 65535
 	cmp	w26, w0
-	beq	.L1762
+	beq	.L1819
 	mov	w1, 1
 	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-	b	.L1762
+	b	.L1819
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
 	.section	.text.FtlSuperblockPowerLostFix,"ax",@progbits
 	.align	2
@@ -12144,34 +12478,34 @@ FtlVpcTblFlush:
 	.type	FtlSuperblockPowerLostFix, %function
 FtlSuperblockPowerLostFix:
 	stp	x29, x30, [sp, -128]!
-	adrp	x1, .LANCHOR76
+	adrp	x1, .LANCHOR78
 	add	x29, sp, 0
 	str	x23, [sp, 48]
-	ldr	w23, [x1, #:lo12:.LANCHOR76]
+	ldr	w23, [x1, #:lo12:.LANCHOR78]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	cbnz	w23, .L1785
-	adrp	x1, .LANCHOR15
-	ldrb	w1, [x1, #:lo12:.LANCHOR15]
-	cbz	w1, .L1796
+	cbnz	w23, .L1842
+	adrp	x1, .LANCHOR16
+	ldrb	w1, [x1, #:lo12:.LANCHOR16]
+	cbz	w1, .L1853
 	ldrb	w1, [x0, 8]
 	cmp	w1, 1
-	bne	.L1796
+	bne	.L1853
 	ldrh	w21, [x0, 4]
 	mov	w23, w1
-.L1787:
-	adrp	x1, .LANCHOR188
+.L1844:
+	adrp	x1, .LANCHOR195
 	mov	x19, x0
 	mov	w0, -1
 	str	w0, [x29, 96]
-	ldr	x20, [x1, #:lo12:.LANCHOR188]
-	adrp	x0, .LANCHOR183
+	ldr	x20, [x1, #:lo12:.LANCHOR195]
+	adrp	x0, .LANCHOR189
 	str	x20, [x29, 88]
 	mov	w1, -3
-	ldr	x0, [x0, #:lo12:.LANCHOR183]
-	adrp	x22, .LANCHOR160
+	ldr	x0, [x0, #:lo12:.LANCHOR189]
+	adrp	x22, .LANCHOR165
 	str	x0, [x29, 80]
-	add	x22, x22, :lo12:.LANCHOR160
+	add	x22, x22, :lo12:.LANCHOR165
 	str	w1, [x20, 8]
 	mov	w1, -2
 	str	w1, [x20, 12]
@@ -12183,17 +12517,17 @@ FtlSuperblockPowerLostFix:
 	mov	w1, 22136
 	movk	w1, 0x1234, lsl 16
 	str	w1, [x0, 4]
-.L1788:
+.L1845:
 	sub	w21, w21, #1
 	cmn	w21, #1
-	beq	.L1791
+	beq	.L1848
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1789
-.L1791:
+	cbnz	w0, .L1846
+.L1848:
 	ldrh	w0, [x19]
-	adrp	x1, .LANCHOR83
+	adrp	x1, .LANCHOR85
 	ldrh	w3, [x19, 4]
-	ldr	x2, [x1, #:lo12:.LANCHOR83]
+	ldr	x2, [x1, #:lo12:.LANCHOR85]
 	lsl	x0, x0, 1
 	ldrh	w1, [x2, x0]
 	sub	w1, w1, w3
@@ -12203,21 +12537,21 @@ FtlSuperblockPowerLostFix:
 	strh	wzr, [x19, 4]
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	strh	w0, [x19, 2]
-.L1785:
+.L1842:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1796:
+.L1853:
 	mov	w21, 12
-	b	.L1787
-.L1789:
+	b	.L1844
+.L1846:
 	mov	x0, x19
 	bl	get_new_active_ppa
 	str	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L1791
+	beq	.L1848
 	ldr	w0, [x22]
 	mov	w3, 0
 	str	w0, [x20, 4]
@@ -12231,7 +12565,7 @@ FtlSuperblockPowerLostFix:
 	bl	FlashProgPages
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-	b	.L1788
+	b	.L1845
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
 	.section	.text.FtlLoadFactoryBbt,"ax",@progbits
 	.align	2
@@ -12239,11 +12573,11 @@ FtlSuperblockPowerLostFix:
 	.type	FtlLoadFactoryBbt, %function
 FtlLoadFactoryBbt:
 	stp	x29, x30, [sp, -112]!
-	adrp	x2, .LANCHOR183
-	adrp	x0, .LANCHOR203
-	add	x1, x0, :lo12:.LANCHOR203
+	adrp	x2, .LANCHOR189
+	adrp	x0, .LANCHOR211
+	add	x1, x0, :lo12:.LANCHOR211
 	add	x29, sp, 0
-	ldr	x2, [x2, #:lo12:.LANCHOR183]
+	ldr	x2, [x2, #:lo12:.LANCHOR189]
 	stp	x21, x22, [sp, 32]
 	mov	x22, x0
 	stp	x25, x26, [sp, 64]
@@ -12251,22 +12585,22 @@ FtlLoadFactoryBbt:
 	stp	x27, x28, [sp, 80]
 	add	x28, x26, :lo12:.LANCHOR51
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR74
+	adrp	x20, .LANCHOR76
 	stp	x23, x24, [sp, 48]
-	add	x20, x20, :lo12:.LANCHOR74
+	add	x20, x20, :lo12:.LANCHOR76
 	str	x2, [x1, 8]
-	adrp	x2, .LANCHOR188
+	adrp	x2, .LANCHOR195
 	adrp	x23, .LANCHOR45
 	add	x20, x20, 12
-	ldr	x25, [x2, #:lo12:.LANCHOR188]
+	ldr	x25, [x2, #:lo12:.LANCHOR195]
 	add	x23, x23, :lo12:.LANCHOR45
 	mov	w21, 0
 	mov	w27, -1
 	str	x25, [x1, 16]
-.L1802:
+.L1859:
 	ldrh	w0, [x23]
 	cmp	w21, w0
-	bcc	.L1807
+	bcc	.L1864
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -12275,18 +12609,18 @@ FtlLoadFactoryBbt:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1807:
+.L1864:
 	ldrh	w19, [x26, #:lo12:.LANCHOR51]
-	add	x24, x22, :lo12:.LANCHOR203
+	add	x24, x22, :lo12:.LANCHOR211
 	strh	w27, [x20]
 	mov	w3, 61664
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L1803:
+.L1860:
 	ldrh	w0, [x28]
 	sub	w1, w0, #15
 	cmp	w1, w19
-	bgt	.L1805
+	bgt	.L1862
 	madd	w0, w0, w21, w19
 	mov	w2, 1
 	str	w3, [x29, 108]
@@ -12298,19 +12632,19 @@ FtlLoadFactoryBbt:
 	ldr	w0, [x24]
 	ldr	w3, [x29, 108]
 	cmn	w0, #1
-	beq	.L1804
+	beq	.L1861
 	ldrh	w0, [x25]
 	cmp	w0, w3
-	bne	.L1804
+	bne	.L1861
 	strh	w19, [x20]
-.L1805:
+.L1862:
 	add	w21, w21, 1
 	add	x20, x20, 2
-	b	.L1802
-.L1804:
+	b	.L1859
+.L1861:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L1803
+	b	.L1860
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
 	.section	.text.FtlGetLastWrittenPage,"ax",@progbits
 	.align	2
@@ -12324,10 +12658,10 @@ FtlGetLastWrittenPage:
 	mov	w23, w1
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	bne	.L1813
+	bne	.L1870
 	adrp	x1, .LANCHOR53
 	ldrh	w19, [x1, #:lo12:.LANCHOR53]
-.L1814:
+.L1871:
 	sub	w19, w19, #1
 	lsl	w21, w0, 10
 	sxth	w19, w19
@@ -12341,24 +12675,24 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 128]
 	cmn	w0, #1
-	bne	.L1815
+	bne	.L1872
 	mov	w22, 0
 	mov	w24, 2
-.L1816:
+.L1873:
 	cmp	w22, w19
-	ble	.L1819
-.L1815:
+	ble	.L1876
+.L1872:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 192
 	ret
-.L1813:
+.L1870:
 	adrp	x1, .LANCHOR52
 	ldrh	w19, [x1, #:lo12:.LANCHOR52]
-	b	.L1814
-.L1819:
+	b	.L1871
+.L1876:
 	add	w20, w22, w19
 	mov	w2, w23
 	mov	w1, 1
@@ -12370,20 +12704,20 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 128]
 	cmn	w0, #1
-	bne	.L1817
+	bne	.L1874
 	ldr	w0, [x29, 132]
 	cmn	w0, #1
-	bne	.L1817
+	bne	.L1874
 	ldr	w0, [x29, 72]
 	cmn	w0, #1
-	beq	.L1817
+	beq	.L1874
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L1816
-.L1817:
+	b	.L1873
+.L1874:
 	add	w20, w20, 1
 	sxth	w22, w20
-	b	.L1816
+	b	.L1873
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
 	.section	.text.FtlLoadBbt,"ax",@progbits
 	.align	2
@@ -12393,29 +12727,29 @@ FtlLoadBbt:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR183
+	adrp	x23, .LANCHOR189
 	stp	x19, x20, [sp, 16]
 	adrp	x24, .LANCHOR51
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR203
-	add	x20, x22, :lo12:.LANCHOR203
-	ldr	x0, [x23, #:lo12:.LANCHOR183]
+	adrp	x22, .LANCHOR211
+	add	x20, x22, :lo12:.LANCHOR211
+	ldr	x0, [x23, #:lo12:.LANCHOR189]
 	str	x25, [sp, 64]
 	mov	w25, 61649
 	str	x0, [x20, 8]
-	adrp	x0, .LANCHOR188
-	ldr	x21, [x0, #:lo12:.LANCHOR188]
+	adrp	x0, .LANCHOR195
+	ldr	x21, [x0, #:lo12:.LANCHOR195]
 	str	x21, [x20, 16]
 	bl	FtlBbtMemInit
 	ldrh	w19, [x24, #:lo12:.LANCHOR51]
 	add	x24, x24, :lo12:.LANCHOR51
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L1825:
+.L1882:
 	ldrh	w0, [x24]
 	sub	w0, w0, #47
 	cmp	w0, w19
-	bgt	.L1828
+	bgt	.L1885
 	lsl	w0, w19, 10
 	mov	w2, 1
 	str	w0, [x20, 4]
@@ -12424,7 +12758,7 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L1826
+	bne	.L1883
 	ldr	w0, [x20, 4]
 	mov	w2, 1
 	mov	w1, w2
@@ -12432,68 +12766,68 @@ FtlLoadBbt:
 	str	w0, [x20, 4]
 	mov	x0, x20
 	bl	FlashReadPages
-.L1826:
+.L1883:
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L1827
+	beq	.L1884
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	bne	.L1827
-	adrp	x1, .LANCHOR74
-	add	x0, x1, :lo12:.LANCHOR74
-	strh	w19, [x1, #:lo12:.LANCHOR74]
+	bne	.L1884
+	adrp	x1, .LANCHOR76
+	add	x0, x1, :lo12:.LANCHOR76
+	strh	w19, [x1, #:lo12:.LANCHOR76]
 	ldr	w1, [x21, 4]
 	str	w1, [x0, 8]
 	ldrh	w1, [x21, 8]
 	strh	w1, [x0, 4]
-.L1828:
-	adrp	x19, .LANCHOR74
+.L1885:
+	adrp	x19, .LANCHOR76
 	mov	w0, 65535
-	add	x20, x19, :lo12:.LANCHOR74
-	ldrh	w1, [x19, #:lo12:.LANCHOR74]
+	add	x20, x19, :lo12:.LANCHOR76
+	ldrh	w1, [x19, #:lo12:.LANCHOR76]
 	cmp	w1, w0
-	beq	.L1842
+	beq	.L1899
 	ldrh	w1, [x20, 4]
 	cmp	w1, w0
-	beq	.L1832
-	add	x0, x22, :lo12:.LANCHOR203
+	beq	.L1889
+	add	x0, x22, :lo12:.LANCHOR211
 	lsl	w1, w1, 10
 	mov	w2, 1
 	str	w1, [x0, 4]
 	mov	w1, w2
 	bl	FlashReadPages
-	ldr	w0, [x22, #:lo12:.LANCHOR203]
+	ldr	w0, [x22, #:lo12:.LANCHOR211]
 	cmn	w0, #1
-	beq	.L1832
+	beq	.L1889
 	ldrh	w1, [x21]
 	mov	w0, 61649
 	cmp	w1, w0
-	bne	.L1832
+	bne	.L1889
 	ldr	w1, [x20, 8]
 	ldr	w0, [x21, 4]
 	cmp	w0, w1
-	bls	.L1832
+	bls	.L1889
 	ldrh	w1, [x20, 4]
 	str	w0, [x20, 8]
 	ldrh	w0, [x21, 8]
-	strh	w1, [x19, #:lo12:.LANCHOR74]
+	strh	w1, [x19, #:lo12:.LANCHOR76]
 	strh	w0, [x20, 4]
-.L1832:
-	ldrh	w0, [x19, #:lo12:.LANCHOR74]
-	add	x24, x19, :lo12:.LANCHOR74
+.L1889:
+	ldrh	w0, [x19, #:lo12:.LANCHOR76]
+	add	x24, x19, :lo12:.LANCHOR76
 	mov	w1, 1
 	mov	w25, 61649
 	bl	FtlGetLastWrittenPage
 	sxth	w20, w0
 	add	w0, w0, 1
 	strh	w0, [x24, 2]
-	add	x24, x22, :lo12:.LANCHOR203
-.L1834:
-	tbz	w20, #31, .L1837
-	mov	w2, 334
-	adrp	x1, .LANCHOR212
+	add	x24, x22, :lo12:.LANCHOR211
+.L1891:
+	tbz	w20, #31, .L1894
+	mov	w2, 339
+	adrp	x1, .LANCHOR220
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR212
+	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -12501,72 +12835,72 @@ FtlLoadBbt:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1836:
-	add	x0, x19, :lo12:.LANCHOR74
+.L1893:
+	add	x0, x19, :lo12:.LANCHOR76
 	ldrh	w1, [x21, 10]
 	strh	w1, [x0, 6]
 	mov	w1, 65535
 	ldrh	w0, [x21, 12]
 	cmp	w0, w1
-	beq	.L1839
+	beq	.L1896
 	adrp	x1, .LANCHOR37
 	ldr	w2, [x1, #:lo12:.LANCHOR37]
 	cmp	w0, w2
-	beq	.L1839
+	beq	.L1896
 	adrp	x1, .LANCHOR41
 	ldrh	w1, [x1, #:lo12:.LANCHOR41]
 	lsr	w1, w1, 2
 	cmp	w2, w1
-	bcs	.L1839
+	bcs	.L1896
 	cmp	w0, w1
-	bcs	.L1839
+	bcs	.L1896
 	bl	FtlSysBlkNumInit
-.L1839:
-	add	x19, x19, :lo12:.LANCHOR74
+.L1896:
+	add	x19, x19, :lo12:.LANCHOR76
 	adrp	x21, .LANCHOR45
-	adrp	x23, .LANCHOR123
+	adrp	x23, .LANCHOR126
 	add	x19, x19, 32
 	add	x21, x21, :lo12:.LANCHOR45
-	add	x23, x23, :lo12:.LANCHOR123
-	add	x22, x22, :lo12:.LANCHOR203
+	add	x23, x23, :lo12:.LANCHOR126
+	add	x22, x22, :lo12:.LANCHOR211
 	mov	w20, 0
-.L1840:
+.L1897:
 	ldrh	w0, [x21]
 	cmp	w20, w0
-	bcc	.L1841
+	bcc	.L1898
 	mov	w0, 0
-.L1824:
+.L1881:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1827:
+.L1884:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L1825
-.L1837:
-	ldrh	w0, [x19, #:lo12:.LANCHOR74]
+	b	.L1882
+.L1894:
+	ldrh	w0, [x19, #:lo12:.LANCHOR76]
 	mov	w2, 1
 	mov	w1, w2
 	orr	w0, w20, w0, lsl 10
 	str	w0, [x24, 4]
-	ldr	x0, [x23, #:lo12:.LANCHOR183]
+	ldr	x0, [x23, #:lo12:.LANCHOR189]
 	str	x0, [x24, 8]
 	mov	x0, x24
 	bl	FlashReadPages
 	ldr	w0, [x24]
 	cmn	w0, #1
-	beq	.L1835
+	beq	.L1892
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	beq	.L1836
-.L1835:
+	beq	.L1893
+.L1892:
 	sub	w20, w20, #1
 	sxth	w20, w20
-	b	.L1834
-.L1841:
+	b	.L1891
+.L1898:
 	ldrh	w2, [x23]
 	ldr	x0, [x22, 8]
 	mul	w1, w2, w20
@@ -12575,10 +12909,10 @@ FtlLoadBbt:
 	add	x1, x0, x1, lsl 2
 	ldr	x0, [x19], 8
 	bl	ftl_memcpy
-	b	.L1840
-.L1842:
+	b	.L1897
+.L1899:
 	mov	w0, -1
-	b	.L1824
+	b	.L1881
 	.size	FtlLoadBbt, .-FtlLoadBbt
 	.section	.text.ftl_map_blk_gc,"ax",@progbits
 	.align	2
@@ -12601,12 +12935,12 @@ ftl_map_blk_gc:
 	ldrh	w2, [x19, 8]
 	sub	w1, w1, #4
 	cmp	w2, w1
-	blt	.L1855
+	blt	.L1912
 	ubfiz	x0, x0, 1, 16
 	ldrh	w21, [x20, x0]
-	cbz	w21, .L1855
+	cbz	w21, .L1912
 	ldr	w1, [x19, 52]
-	cbnz	w1, .L1855
+	cbnz	w1, .L1912
 	mov	w1, 1
 	str	w1, [x19, 52]
 	strh	wzr, [x20, x0]
@@ -12616,54 +12950,54 @@ ftl_map_blk_gc:
 	strh	w0, [x19, 8]
 	ldrh	w0, [x25, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bcc	.L1856
+	bcc	.L1913
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L1856:
-	adrp	x22, .LANCHOR203
-	adrp	x24, .LANCHOR213
+.L1913:
+	adrp	x22, .LANCHOR211
+	adrp	x24, .LANCHOR221
 	mov	x23, x22
-	add	x27, x22, :lo12:.LANCHOR203
-	add	x24, x24, :lo12:.LANCHOR213
+	add	x27, x22, :lo12:.LANCHOR211
+	add	x24, x24, :lo12:.LANCHOR221
 	mov	w20, 0
-.L1857:
+.L1914:
 	ldrh	w0, [x19, 6]
 	cmp	w0, w20
-	bhi	.L1863
+	bhi	.L1920
 	mov	w1, 1
 	mov	w0, w21
 	bl	FtlFreeSysBlkQueueIn
 	str	wzr, [x19, 52]
-.L1855:
+.L1912:
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x25, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bcc	.L1861
+	bcc	.L1918
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-	b	.L1861
-.L1863:
+	b	.L1918
+.L1920:
 	ubfiz	x0, x20, 2, 16
 	add	x1, x26, x0
 	str	x1, [x29, 104]
 	ldr	w1, [x26, x0]
 	cmp	w21, w1, lsr 10
-	bne	.L1858
-	adrp	x2, .LANCHOR184
-	add	x0, x22, :lo12:.LANCHOR203
-	ldr	x2, [x2, #:lo12:.LANCHOR184]
+	bne	.L1915
+	adrp	x2, .LANCHOR190
+	add	x0, x22, :lo12:.LANCHOR211
+	ldr	x2, [x2, #:lo12:.LANCHOR190]
 	str	x2, [x0, 8]
-	adrp	x2, .LANCHOR188
+	adrp	x2, .LANCHOR195
 	str	w1, [x0, 4]
-	ldr	x28, [x2, #:lo12:.LANCHOR188]
+	ldr	x28, [x2, #:lo12:.LANCHOR195]
 	mov	w2, 1
 	str	x28, [x0, 16]
 	mov	w1, w2
 	bl	FlashReadPages
 	ldrh	w0, [x28, 8]
 	cmp	w0, w20
-	beq	.L1859
-	mov	w2, 661
+	beq	.L1916
+	mov	w2, 752
 	mov	x1, x24
 	adrp	x0, .LC5
 	add	x0, x0, :lo12:.LC5
@@ -12673,23 +13007,23 @@ ftl_map_blk_gc:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1859:
+.L1916:
 	ldr	w0, [x27]
 	ldrh	w2, [x28, 8]
 	cmn	w0, #1
-	bne	.L1860
-.L1862:
+	bne	.L1917
+.L1919:
 	ldr	x0, [x29, 104]
-	add	x23, x23, :lo12:.LANCHOR203
+	add	x23, x23, :lo12:.LANCHOR211
 	str	wzr, [x0]
-	adrp	x0, .LC39
-	add	x0, x0, :lo12:.LC39
+	adrp	x0, .LC41
+	add	x0, x0, :lo12:.LC41
 	ldr	w1, [x23, 4]
 	bl	printf
-	adrp	x0, .LANCHOR76
+	adrp	x0, .LANCHOR78
 	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR76]
-.L1861:
+	str	w1, [x0, #:lo12:.LANCHOR78]
+.L1918:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -12698,30 +13032,30 @@ ftl_map_blk_gc:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1860:
+.L1917:
 	cmp	w2, w20
-	bne	.L1862
+	bne	.L1919
 	ldrh	w1, [x28]
 	ldrh	w0, [x19, 4]
 	cmp	w1, w0
-	bne	.L1862
+	bne	.L1919
 	ldr	x2, [x27, 8]
 	mov	w1, w20
 	mov	x0, x19
 	bl	FtlMapWritePage
-.L1858:
+.L1915:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L1857
+	b	.L1914
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
 	.section	.text.Ftl_write_map_blk_to_last_page,"ax",@progbits
 	.align	2
 	.global	Ftl_write_map_blk_to_last_page
 	.type	Ftl_write_map_blk_to_last_page, %function
 Ftl_write_map_blk_to_last_page:
-	adrp	x1, .LANCHOR76
-	ldr	w1, [x1, #:lo12:.LANCHOR76]
-	cbnz	w1, .L1883
+	adrp	x1, .LANCHOR78
+	ldr	w1, [x1, #:lo12:.LANCHOR78]
+	cbnz	w1, .L1940
 	stp	x29, x30, [sp, -64]!
 	mov	w1, 65535
 	add	x29, sp, 0
@@ -12732,13 +13066,13 @@ Ftl_write_map_blk_to_last_page:
 	stp	x23, x24, [sp, 48]
 	cmp	w0, w1
 	ldr	x20, [x19, 16]
-	bne	.L1870
+	bne	.L1927
 	ldrh	w0, [x19, 8]
-	cbz	w0, .L1871
-	mov	w2, 697
-	adrp	x1, .LANCHOR214
+	cbz	w0, .L1928
+	mov	w2, 793
+	adrp	x1, .LANCHOR222
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR214
+	add	x1, x1, :lo12:.LANCHOR222
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -12746,7 +13080,7 @@ Ftl_write_map_blk_to_last_page:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1871:
+.L1928:
 	ldrh	w0, [x19, 8]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
@@ -12757,27 +13091,27 @@ Ftl_write_map_blk_to_last_page:
 	add	w0, w0, 1
 	strh	wzr, [x19]
 	str	w0, [x19, 48]
-.L1869:
+.L1926:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1870:
+.L1927:
 	ubfiz	x0, x0, 1, 16
-	adrp	x2, .LANCHOR188
-	adrp	x21, .LANCHOR203
-	add	x1, x21, :lo12:.LANCHOR203
-	adrp	x24, .LANCHOR183
+	adrp	x2, .LANCHOR195
+	adrp	x21, .LANCHOR211
+	add	x1, x21, :lo12:.LANCHOR211
+	adrp	x24, .LANCHOR189
 	ldr	x23, [x19, 40]
 	ldrh	w22, [x20, x0]
 	ldrh	w0, [x19, 2]
-	ldr	x20, [x2, #:lo12:.LANCHOR188]
+	ldr	x20, [x2, #:lo12:.LANCHOR195]
 	str	x20, [x1, 16]
 	orr	w0, w0, w22, lsl 10
 	str	w0, [x1, 4]
-	ldr	x0, [x24, #:lo12:.LANCHOR183]
+	ldr	x0, [x24, #:lo12:.LANCHOR189]
 	str	x0, [x1, 8]
 	ldr	w1, [x19, 48]
 	str	w1, [x20, 4]
@@ -12793,36 +13127,36 @@ Ftl_write_map_blk_to_last_page:
 	bl	ftl_memset
 	ldrh	w4, [x19, 6]
 	mov	x1, 0
-	ldr	x3, [x24, #:lo12:.LANCHOR183]
+	ldr	x3, [x24, #:lo12:.LANCHOR189]
 	mov	w0, 0
-.L1872:
+.L1929:
 	cmp	w4, w1, uxth
-	bhi	.L1874
+	bhi	.L1931
 	adrp	x0, .LANCHOR2
 	ldrb	w0, [x0, #:lo12:.LANCHOR2]
-	cbz	w0, .L1875
-	add	x0, x21, :lo12:.LANCHOR203
+	cbz	w0, .L1932
+	add	x0, x21, :lo12:.LANCHOR211
 	adrp	x1, .LANCHOR57
 	ldrh	w1, [x1, #:lo12:.LANCHOR57]
 	ldr	x0, [x0, 8]
 	bl	js_hash
 	str	w0, [x20, 12]
-.L1875:
+.L1932:
 	mov	w2, 1
 	mov	w3, 0
 	mov	w1, w2
-	add	x0, x21, :lo12:.LANCHOR203
+	add	x0, x21, :lo12:.LANCHOR211
 	bl	FlashProgPages
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-	b	.L1869
-.L1874:
+	b	.L1926
+.L1931:
 	ldr	w2, [x23, x1, lsl 2]
 	cmp	w22, w2, lsr 10
-	bne	.L1873
+	bne	.L1930
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	ubfiz	x2, x0, 1, 16
@@ -12830,10 +13164,10 @@ Ftl_write_map_blk_to_last_page:
 	add	x2, x2, 1
 	ldr	w5, [x23, x1, lsl 2]
 	str	w5, [x3, x2, lsl 2]
-.L1873:
+.L1930:
 	add	x1, x1, 1
-	b	.L1872
-.L1883:
+	b	.L1929
+.L1940:
 	mov	w0, 0
 	ret
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
@@ -12852,41 +13186,41 @@ FtlMapWritePage:
 	mov	w25, w1
 	stp	x21, x22, [sp, 32]
 	mov	x27, x0
-	adrp	x22, .LANCHOR203
+	adrp	x22, .LANCHOR211
 	stp	x23, x24, [sp, 48]
 	mov	x20, x22
-	add	x23, x22, :lo12:.LANCHOR203
+	add	x23, x22, :lo12:.LANCHOR211
 	add	x28, x26, :lo12:.LANCHOR53
 	str	x2, [x29, 104]
-.L1887:
-	adrp	x1, .LANCHOR165
-	ldr	w0, [x1, #:lo12:.LANCHOR165]
+.L1944:
+	adrp	x1, .LANCHOR170
+	ldr	w0, [x1, #:lo12:.LANCHOR170]
 	add	w0, w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR165]
+	str	w0, [x1, #:lo12:.LANCHOR170]
 	ldrh	w0, [x26, #:lo12:.LANCHOR53]
 	ldrh	w1, [x27, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	bge	.L1888
+	bge	.L1945
 	ldrh	w1, [x27]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1889
-.L1888:
+	bne	.L1946
+.L1945:
 	mov	x0, x27
 	bl	Ftl_write_map_blk_to_last_page
-.L1889:
-	adrp	x21, .LANCHOR76
-	ldr	w0, [x21, #:lo12:.LANCHOR76]
-	cbnz	w0, .L1904
+.L1946:
+	adrp	x21, .LANCHOR78
+	ldr	w0, [x21, #:lo12:.LANCHOR78]
+	cbnz	w0, .L1961
 	ldrh	w1, [x27]
 	ldr	x0, [x27, 16]
 	ldrh	w0, [x0, x1, lsl 1]
-	cbnz	w0, .L1891
-	mov	w2, 759
-	adrp	x1, .LANCHOR215
+	cbnz	w0, .L1948
+	mov	w2, 865
+	adrp	x1, .LANCHOR223
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR215
+	add	x1, x1, :lo12:.LANCHOR223
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -12894,15 +13228,15 @@ FtlMapWritePage:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1891:
+.L1948:
 	ldrh	w1, [x27]
 	ldrh	w0, [x27, 10]
 	cmp	w1, w0
-	bcc	.L1892
-	mov	w2, 760
-	adrp	x1, .LANCHOR215
+	bcc	.L1949
+	mov	w2, 866
+	adrp	x1, .LANCHOR223
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR215
+	add	x1, x1, :lo12:.LANCHOR223
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -12910,9 +13244,9 @@ FtlMapWritePage:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1892:
+.L1949:
 	ldrh	w1, [x27]
-	add	x3, x22, :lo12:.LANCHOR203
+	add	x3, x22, :lo12:.LANCHOR211
 	ldr	x0, [x27, 16]
 	mov	w2, 16
 	str	x3, [x29, 96]
@@ -12923,8 +13257,8 @@ FtlMapWritePage:
 	str	w0, [x3, 4]
 	ldr	x0, [x29, 104]
 	str	x0, [x3, 8]
-	adrp	x0, .LANCHOR188
-	ldr	x0, [x0, #:lo12:.LANCHOR188]
+	adrp	x0, .LANCHOR195
+	ldr	x0, [x0, #:lo12:.LANCHOR195]
 	str	x0, [x3, 16]
 	bl	ftl_memset
 	ldr	x3, [x29, 96]
@@ -12937,13 +13271,13 @@ FtlMapWritePage:
 	strh	w25, [x6, 8]
 	strh	w24, [x6, 2]
 	ldrb	w0, [x0, #:lo12:.LANCHOR2]
-	cbz	w0, .L1893
+	cbz	w0, .L1950
 	adrp	x0, .LANCHOR57
 	ldrh	w1, [x0, #:lo12:.LANCHOR57]
 	ldr	x0, [x3, 8]
 	bl	js_hash
 	str	w0, [x6, 12]
-.L1893:
+.L1950:
 	mov	w3, 1
 	mov	x0, x23
 	mov	w1, w3
@@ -12955,31 +13289,31 @@ FtlMapWritePage:
 	and	w0, w0, 65535
 	strh	w0, [x27, 2]
 	cmn	w1, #1
-	bne	.L1894
+	bne	.L1951
 	ldr	w1, [x23, 4]
-	adrp	x0, .LC40
-	add	x0, x0, :lo12:.LC40
+	adrp	x0, .LC42
+	add	x0, x0, :lo12:.LC42
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	bl	printf
 	ldrh	w0, [x27, 2]
 	cmp	w0, 2
-	bhi	.L1895
+	bhi	.L1952
 	ldrh	w0, [x28]
 	sub	w0, w0, #1
 	strh	w0, [x27, 2]
-.L1895:
+.L1952:
 	cmp	w19, 3
-	bls	.L1887
-	add	x20, x20, :lo12:.LANCHOR203
+	bls	.L1944
+	add	x20, x20, :lo12:.LANCHOR211
 	mov	w2, w19
-	adrp	x0, .LC41
-	add	x0, x0, :lo12:.LC41
+	adrp	x0, .LC43
+	add	x0, x0, :lo12:.LC43
 	ldr	w1, [x20, 4]
 	bl	printf
 	mov	w0, 1
-	str	w0, [x21, #:lo12:.LANCHOR76]
-.L1904:
+	str	w0, [x21, #:lo12:.LANCHOR78]
+.L1961:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -12988,28 +13322,28 @@ FtlMapWritePage:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1894:
-	cbz	w1, .L1897
+.L1951:
+	cbz	w1, .L1954
 	strh	w24, [x27, 60]
 	cmp	w0, 1
-	bne	.L1898
-.L1899:
+	bne	.L1955
+.L1956:
 	str	wzr, [x27, 56]
-	b	.L1887
-.L1898:
+	b	.L1944
+.L1955:
 	cmp	w1, 256
-.L1912:
-	beq	.L1899
+.L1969:
+	beq	.L1956
 	ldr	w0, [x27, 56]
-	cbnz	w0, .L1899
-	add	x20, x20, :lo12:.LANCHOR203
+	cbnz	w0, .L1956
+	add	x20, x20, :lo12:.LANCHOR211
 	ldr	x0, [x27, 40]
 	ldr	w1, [x20, 4]
 	str	w1, [x0, w25, uxtw 2]
-	b	.L1904
-.L1897:
+	b	.L1961
+.L1954:
 	cmp	w0, 1
-	b	.L1912
+	b	.L1969
 	.size	FtlMapWritePage, .-FtlMapWritePage
 	.section	.text.flush_l2p_region,"ax",@progbits
 	.align	2
@@ -13019,16 +13353,16 @@ flush_l2p_region:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR96
+	adrp	x20, .LANCHOR98
 	ubfiz	x19, x0, 4, 16
-	ldr	x0, [x20, #:lo12:.LANCHOR96]
+	ldr	x0, [x20, #:lo12:.LANCHOR98]
 	add	x1, x0, x19
 	ldr	x2, [x1, 8]
 	ldrh	w1, [x0, x19]
-	adrp	x0, .LANCHOR127
-	add	x0, x0, :lo12:.LANCHOR127
+	adrp	x0, .LANCHOR130
+	add	x0, x0, :lo12:.LANCHOR130
 	bl	FtlMapWritePage
-	ldr	x0, [x20, #:lo12:.LANCHOR96]
+	ldr	x0, [x20, #:lo12:.LANCHOR98]
 	add	x0, x0, x19
 	ldp	x19, x20, [sp, 16]
 	ldr	w1, [x0, 4]
@@ -13050,28 +13384,28 @@ l2p_flush:
 	add	x20, x20, :lo12:.LANCHOR67
 	str	x21, [sp, 32]
 	mov	w19, 0
-	adrp	x21, .LANCHOR96
-.L1916:
+	adrp	x21, .LANCHOR98
+.L1973:
 	ldrh	w0, [x20]
 	cmp	w0, w19
-	bhi	.L1918
+	bhi	.L1975
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1918:
-	ldr	x1, [x21, #:lo12:.LANCHOR96]
+.L1975:
+	ldr	x1, [x21, #:lo12:.LANCHOR98]
 	ubfiz	x0, x19, 4, 16
 	add	x0, x1, x0
 	ldr	w0, [x0, 4]
-	tbz	w0, #31, .L1917
+	tbz	w0, #31, .L1974
 	mov	w0, w19
 	bl	flush_l2p_region
-.L1917:
+.L1974:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1916
+	b	.L1973
 	.size	l2p_flush, .-l2p_flush
 	.section	.text.FtlVendorPartWrite,"ax",@progbits
 	.align	2
@@ -13091,7 +13425,7 @@ FtlVendorPartWrite:
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	cmp	w1, w0
-	bhi	.L1928
+	bhi	.L1985
 	adrp	x0, .LANCHOR56
 	adrp	x26, .LANCHOR55
 	adrp	x27, .LANCHOR57
@@ -13101,9 +13435,9 @@ FtlVendorPartWrite:
 	add	x27, x27, :lo12:.LANCHOR57
 	mov	w24, 0
 	lsr	w21, w22, w21
-.L1922:
-	cbnz	w20, .L1927
-.L1920:
+.L1979:
+	cbnz	w20, .L1984
+.L1977:
 	mov	w0, w24
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -13112,11 +13446,11 @@ FtlVendorPartWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1927:
+.L1984:
 	ldrh	w1, [x26]
-	adrp	x0, .LANCHOR194
-	adrp	x28, .LANCHOR185
-	ldr	x0, [x0, #:lo12:.LANCHOR194]
+	adrp	x0, .LANCHOR202
+	adrp	x28, .LANCHOR191
+	ldr	x0, [x0, #:lo12:.LANCHOR202]
 	udiv	w23, w22, w1
 	ldr	w2, [x0, w21, uxtw 2]
 	and	w0, w20, 65535
@@ -13125,29 +13459,29 @@ FtlVendorPartWrite:
 	and	w19, w19, 65535
 	cmp	w20, w19
 	csel	w19, w0, w19, cc
-	cbz	w2, .L1924
+	cbz	w2, .L1981
 	cmp	w19, w1
-	beq	.L1924
-	ldr	x0, [x28, #:lo12:.LANCHOR185]
+	beq	.L1981
+	ldr	x0, [x28, #:lo12:.LANCHOR191]
 	str	w2, [x29, 124]
 	mov	w2, 1
 	stp	x0, xzr, [x29, 128]
 	mov	w1, w2
 	add	x0, x29, 120
 	bl	FlashReadPages
-.L1925:
+.L1982:
 	lsl	w3, w19, 9
-	ldr	x0, [x28, #:lo12:.LANCHOR185]
+	ldr	x0, [x28, #:lo12:.LANCHOR191]
 	lsl	w23, w23, 7
 	mov	w2, w3
 	mov	x1, x25
 	str	w3, [x29, 108]
 	add	x0, x0, x23, sxtw 2
 	bl	ftl_memcpy
-	ldr	x2, [x28, #:lo12:.LANCHOR185]
+	ldr	x2, [x28, #:lo12:.LANCHOR191]
 	mov	w1, w21
-	adrp	x0, .LANCHOR216
-	add	x0, x0, :lo12:.LANCHOR216
+	adrp	x0, .LANCHOR224
+	add	x0, x0, :lo12:.LANCHOR224
 	sub	w20, w20, w19
 	add	w22, w22, w19
 	add	w21, w21, 1
@@ -13156,78 +13490,78 @@ FtlVendorPartWrite:
 	ldr	w3, [x29, 108]
 	csinv	w24, w24, wzr, ne
 	add	x25, x25, x3, sxtw
-	b	.L1922
-.L1924:
+	b	.L1979
+.L1981:
 	ldrh	w2, [x27]
 	mov	w1, 0
-	ldr	x0, [x28, #:lo12:.LANCHOR185]
+	ldr	x0, [x28, #:lo12:.LANCHOR191]
 	bl	ftl_memset
-	b	.L1925
-.L1928:
+	b	.L1982
+.L1985:
 	mov	w24, -1
-	b	.L1920
+	b	.L1977
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.section	.text.Ftl_save_ext_data,"ax",@progbits
 	.align	2
 	.global	Ftl_save_ext_data
 	.type	Ftl_save_ext_data, %function
 Ftl_save_ext_data:
-	adrp	x0, .LANCHOR138
-	add	x2, x0, :lo12:.LANCHOR138
-	ldr	w1, [x0, #:lo12:.LANCHOR138]
+	adrp	x0, .LANCHOR141
+	add	x2, x0, :lo12:.LANCHOR141
+	ldr	w1, [x0, #:lo12:.LANCHOR141]
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1933
-	mov	w0, 87
+	bne	.L1990
+	mov	w0, 99
 	mov	w1, 1
 	movk	w0, 0x5000, lsl 16
 	str	w0, [x2, 4]
-	adrp	x0, .LANCHOR217
-	ldr	w0, [x0, #:lo12:.LANCHOR217]
+	adrp	x0, .LANCHOR225
+	ldr	w0, [x0, #:lo12:.LANCHOR225]
 	str	w0, [x2, 88]
-	adrp	x0, .LANCHOR218
-	ldr	w0, [x0, #:lo12:.LANCHOR218]
+	adrp	x0, .LANCHOR226
+	ldr	w0, [x0, #:lo12:.LANCHOR226]
 	str	w0, [x2, 92]
-	adrp	x0, .LANCHOR161
-	ldr	w0, [x0, #:lo12:.LANCHOR161]
-	str	w0, [x2, 8]
-	adrp	x0, .LANCHOR162
-	ldr	w0, [x0, #:lo12:.LANCHOR162]
-	str	w0, [x2, 12]
 	adrp	x0, .LANCHOR166
 	ldr	w0, [x0, #:lo12:.LANCHOR166]
+	str	w0, [x2, 8]
+	adrp	x0, .LANCHOR167
+	ldr	w0, [x0, #:lo12:.LANCHOR167]
+	str	w0, [x2, 12]
+	adrp	x0, .LANCHOR171
+	ldr	w0, [x0, #:lo12:.LANCHOR171]
 	str	w0, [x2, 16]
-	adrp	x0, .LANCHOR165
-	ldr	w0, [x0, #:lo12:.LANCHOR165]
+	adrp	x0, .LANCHOR170
+	ldr	w0, [x0, #:lo12:.LANCHOR170]
 	str	w0, [x2, 20]
-	adrp	x0, .LANCHOR168
-	ldr	w0, [x0, #:lo12:.LANCHOR168]
+	adrp	x0, .LANCHOR173
+	ldr	w0, [x0, #:lo12:.LANCHOR173]
 	str	w0, [x2, 28]
-	adrp	x0, .LANCHOR79
-	ldr	w0, [x0, #:lo12:.LANCHOR79]
+	adrp	x0, .LANCHOR81
+	ldr	w0, [x0, #:lo12:.LANCHOR81]
 	str	w0, [x2, 32]
-	adrp	x0, .LANCHOR163
-	ldr	w0, [x0, #:lo12:.LANCHOR163]
+	adrp	x0, .LANCHOR168
+	ldr	w0, [x0, #:lo12:.LANCHOR168]
 	str	w0, [x2, 36]
-	adrp	x0, .LANCHOR164
-	ldr	w0, [x0, #:lo12:.LANCHOR164]
-	str	w0, [x2, 40]
 	adrp	x0, .LANCHOR169
 	ldr	w0, [x0, #:lo12:.LANCHOR169]
+	str	w0, [x2, 40]
+	adrp	x0, .LANCHOR174
+	ldr	w0, [x0, #:lo12:.LANCHOR174]
 	str	w0, [x2, 44]
-	adrp	x0, .LANCHOR170
-	ldr	w0, [x0, #:lo12:.LANCHOR170]
+	adrp	x0, .LANCHOR175
+	ldr	w0, [x0, #:lo12:.LANCHOR175]
 	str	w0, [x2, 48]
-	adrp	x0, .LANCHOR158
-	ldr	w0, [x0, #:lo12:.LANCHOR158]
+	adrp	x0, .LANCHOR163
+	ldr	w0, [x0, #:lo12:.LANCHOR163]
 	str	w0, [x2, 60]
-	adrp	x0, .LANCHOR157
-	ldr	w0, [x0, #:lo12:.LANCHOR157]
+	adrp	x0, .LANCHOR162
+	ldr	w0, [x0, #:lo12:.LANCHOR162]
 	str	w0, [x2, 64]
 	mov	w0, 0
 	b	FtlVendorPartWrite
-.L1933:
+.L1990:
 	ret
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
 	.section	.text.FtlEctTblFlush,"ax",@progbits
@@ -13235,44 +13569,44 @@ Ftl_save_ext_data:
 	.global	FtlEctTblFlush
 	.type	FtlEctTblFlush, %function
 FtlEctTblFlush:
-	adrp	x1, .LANCHOR28
-	ldr	w1, [x1, #:lo12:.LANCHOR28]
-	cbz	w1, .L1940
-	adrp	x1, .LANCHOR170
+	adrp	x1, .LANCHOR104
+	ldr	w1, [x1, #:lo12:.LANCHOR104]
+	cbz	w1, .L1997
+	adrp	x1, .LANCHOR175
 	mov	w2, 4
-	ldr	w1, [x1, #:lo12:.LANCHOR170]
+	ldr	w1, [x1, #:lo12:.LANCHOR175]
 	cmp	w1, 39
 	mov	w1, 32
 	csel	w1, w1, w2, hi
-.L1936:
-	adrp	x3, .LANCHOR219
-	ldrh	w2, [x3, #:lo12:.LANCHOR219]
+.L1993:
+	adrp	x3, .LANCHOR227
+	ldrh	w2, [x3, #:lo12:.LANCHOR227]
 	cmp	w2, 31
-	bhi	.L1937
+	bhi	.L1994
 	add	w2, w2, 1
 	mov	w1, 1
-	strh	w2, [x3, #:lo12:.LANCHOR219]
-.L1937:
-	adrp	x2, .LANCHOR191
-	cbnz	w0, .L1938
-	ldr	x0, [x2, #:lo12:.LANCHOR191]
+	strh	w2, [x3, #:lo12:.LANCHOR227]
+.L1994:
+	adrp	x2, .LANCHOR199
+	cbnz	w0, .L1995
+	ldr	x0, [x2, #:lo12:.LANCHOR199]
 	ldr	w3, [x0, 20]
 	ldr	w0, [x0, 16]
 	add	w1, w1, w3
 	cmp	w0, w1
-	bcc	.L1943
-.L1938:
+	bcc	.L2000
+.L1995:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
-	ldr	x2, [x2, #:lo12:.LANCHOR191]
+	ldr	x2, [x2, #:lo12:.LANCHOR199]
 	ldr	w0, [x2, 16]
 	str	w0, [x2, 20]
 	mov	w0, 17221
 	str	wzr, [x2, 4]
 	movk	w0, 0x4254, lsl 16
 	str	w0, [x2]
-	adrp	x0, .LANCHOR190
-	ldrh	w1, [x0, #:lo12:.LANCHOR190]
+	adrp	x0, .LANCHOR198
+	ldrh	w1, [x0, #:lo12:.LANCHOR198]
 	lsl	w0, w1, 9
 	str	w0, [x2, 12]
 	ldr	w0, [x2, 8]
@@ -13284,10 +13618,10 @@ FtlEctTblFlush:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1940:
+.L1997:
 	mov	w1, 32
-	b	.L1936
-.L1943:
+	b	.L1993
+.L2000:
 	mov	w0, 0
 	ret
 	.size	FtlEctTblFlush, .-FtlEctTblFlush
@@ -13305,11 +13639,11 @@ allocate_new_data_superblock:
 	str	x21, [sp, 32]
 	ldrh	w0, [x0, #:lo12:.LANCHOR40]
 	cmp	w0, w20
-	bcs	.L1946
-	mov	w2, 3289
-	adrp	x1, .LANCHOR220
+	bcs	.L2003
+	mov	w2, 3650
+	adrp	x1, .LANCHOR228
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR220
+	add	x1, x1, :lo12:.LANCHOR228
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -13317,99 +13651,99 @@ allocate_new_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1946:
-	adrp	x0, .LANCHOR76
-	ldr	w0, [x0, #:lo12:.LANCHOR76]
-	cbnz	w0, .L1947
+.L2003:
+	adrp	x0, .LANCHOR78
+	ldr	w0, [x0, #:lo12:.LANCHOR78]
+	cbnz	w0, .L2004
 	mov	w0, 65535
 	cmp	w20, w0
-	beq	.L1948
-	adrp	x1, .LANCHOR83
+	beq	.L2005
+	adrp	x1, .LANCHOR85
 	ubfiz	x0, x20, 1, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR83]
+	ldr	x1, [x1, #:lo12:.LANCHOR85]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1949
+	cbz	w0, .L2006
 	mov	w0, w20
 	bl	INSERT_DATA_LIST
-.L1948:
+.L2005:
 	strb	wzr, [x19, 8]
-	adrp	x0, .LANCHOR92
-	add	x0, x0, :lo12:.LANCHOR92
+	adrp	x0, .LANCHOR94
+	add	x0, x0, :lo12:.LANCHOR94
 	cmp	x19, x0
-	beq	.L1950
+	beq	.L2007
 	adrp	x0, .LANCHOR44
 	ldrh	w1, [x0, #:lo12:.LANCHOR44]
 	cmp	w1, 1
-	beq	.L1950
-	adrp	x0, .LANCHOR15
-	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L1951
-.L1950:
+	beq	.L2007
+	adrp	x0, .LANCHOR16
+	ldrb	w0, [x0, #:lo12:.LANCHOR16]
+	cbz	w0, .L2008
+.L2007:
 	mov	w0, 1
 	strb	w0, [x19, 8]
-.L1952:
-	adrp	x1, .LANCHOR133
+.L2009:
+	adrp	x1, .LANCHOR136
 	mov	w2, 65535
 	mov	x21, x1
-	ldrh	w0, [x1, #:lo12:.LANCHOR133]
+	ldrh	w0, [x1, #:lo12:.LANCHOR136]
 	cmp	w0, w2
-	beq	.L1957
+	beq	.L2014
 	cmp	w20, w0
-	bne	.L1958
-	adrp	x2, .LANCHOR83
+	bne	.L2015
+	adrp	x2, .LANCHOR85
 	ubfiz	x1, x0, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR83]
+	ldr	x2, [x2, #:lo12:.LANCHOR85]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1959
-.L1958:
+	cbz	w1, .L2016
+.L2015:
 	bl	update_vpc_list
-.L1959:
+.L2016:
 	mov	w0, -1
-	strh	w0, [x21, #:lo12:.LANCHOR133]
-.L1957:
+	strh	w0, [x21, #:lo12:.LANCHOR136]
+.L2014:
 	mov	x0, x19
 	bl	allocate_data_superblock
 	bl	l2p_flush
 	mov	w0, 0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1947:
+.L2004:
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1949:
+.L2006:
 	mov	w0, w20
 	bl	INSERT_FREE_LIST
-	b	.L1948
-.L1951:
-	adrp	x0, .LANCHOR91
-	add	x2, x0, :lo12:.LANCHOR91
+	b	.L2005
+.L2008:
+	adrp	x0, .LANCHOR93
+	add	x2, x0, :lo12:.LANCHOR93
 	cmp	x19, x2
-	bne	.L1952
+	bne	.L2009
 	cmp	w1, 3
-	beq	.L1954
-	adrp	x1, .LANCHOR158
-	ldr	w1, [x1, #:lo12:.LANCHOR158]
+	beq	.L2011
+	adrp	x1, .LANCHOR163
+	ldr	w1, [x1, #:lo12:.LANCHOR163]
 	cmp	w1, 1
-	bne	.L1955
-.L1954:
-	add	x1, x0, :lo12:.LANCHOR91
+	bne	.L2012
+.L2011:
+	add	x1, x0, :lo12:.LANCHOR93
 	mov	w2, 1
 	strb	w2, [x1, 8]
-.L1955:
-	adrp	x1, .LANCHOR28
-	ldr	w1, [x1, #:lo12:.LANCHOR28]
-	cbz	w1, .L1952
-	adrp	x1, .LANCHOR170
-	ldr	w1, [x1, #:lo12:.LANCHOR170]
+.L2012:
+	adrp	x1, .LANCHOR104
+	ldr	w1, [x1, #:lo12:.LANCHOR104]
+	cbz	w1, .L2009
+	adrp	x1, .LANCHOR175
+	ldr	w1, [x1, #:lo12:.LANCHOR175]
 	cmp	w1, 39
-	bhi	.L1952
-	add	x0, x0, :lo12:.LANCHOR91
+	bhi	.L2009
+	add	x0, x0, :lo12:.LANCHOR93
 	mov	w1, 1
 	strb	w1, [x0, 8]
-	b	.L1952
+	b	.L2009
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
 	.section	.text.FtlVendorPartRead,"ax",@progbits
 	.align	2
@@ -13429,9 +13763,9 @@ FtlVendorPartRead:
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	cmp	w1, w0
-	bhi	.L1982
+	bhi	.L2039
 	adrp	x0, .LANCHOR56
-	adrp	x26, .LANCHOR185
+	adrp	x26, .LANCHOR191
 	mov	x25, x2
 	mov	x28, x26
 	ldrh	w20, [x0, #:lo12:.LANCHOR56]
@@ -13440,9 +13774,9 @@ FtlVendorPartRead:
 	add	x0, x0, :lo12:.LANCHOR55
 	str	x0, [x29, 104]
 	lsr	w20, w22, w20
-.L1975:
-	cbnz	w21, .L1981
-.L1973:
+.L2032:
+	cbnz	w21, .L2038
+.L2030:
 	mov	w0, w24
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -13451,9 +13785,9 @@ FtlVendorPartRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1981:
-	adrp	x0, .LANCHOR194
-	ldr	x0, [x0, #:lo12:.LANCHOR194]
+.L2038:
+	adrp	x0, .LANCHOR202
+	ldr	x0, [x0, #:lo12:.LANCHOR202]
 	ldr	w3, [x0, w20, uxtw 2]
 	ldr	x0, [x29, 104]
 	ldrh	w19, [x0]
@@ -13465,8 +13799,8 @@ FtlVendorPartRead:
 	cmp	w21, w19
 	csel	w19, w0, w19, cc
 	lsl	w27, w19, 9
-	cbz	w3, .L1977
-	ldr	x0, [x26, #:lo12:.LANCHOR185]
+	cbz	w3, .L2034
+	ldr	x0, [x26, #:lo12:.LANCHOR191]
 	mov	w2, 1
 	str	w3, [x29, 100]
 	mov	w1, w2
@@ -13477,43 +13811,43 @@ FtlVendorPartRead:
 	ldr	w0, [x29, 120]
 	ldr	w3, [x29, 100]
 	cmn	w0, #1
-	adrp	x0, .LANCHOR203
+	adrp	x0, .LANCHOR211
 	csinv	w24, w24, wzr, ne
-	ldr	w0, [x0, #:lo12:.LANCHOR203]
+	ldr	w0, [x0, #:lo12:.LANCHOR211]
 	cmp	w0, 256
-	bne	.L1979
+	bne	.L2036
 	mov	w2, w3
 	mov	w1, w20
-	adrp	x0, .LC42
-	add	x0, x0, :lo12:.LC42
+	adrp	x0, .LC44
+	add	x0, x0, :lo12:.LC44
 	bl	printf
-	ldr	x2, [x26, #:lo12:.LANCHOR185]
-	adrp	x0, .LANCHOR216
+	ldr	x2, [x26, #:lo12:.LANCHOR191]
+	adrp	x0, .LANCHOR224
 	mov	w1, w20
-	add	x0, x0, :lo12:.LANCHOR216
+	add	x0, x0, :lo12:.LANCHOR224
 	bl	FtlMapWritePage
-.L1979:
-	ldr	x1, [x28, #:lo12:.LANCHOR185]
+.L2036:
+	ldr	x1, [x28, #:lo12:.LANCHOR191]
 	lsl	w23, w23, 7
 	mov	w2, w27
 	mov	x0, x25
 	add	x1, x1, x23, sxtw 2
 	bl	ftl_memcpy
-.L1980:
+.L2037:
 	add	w20, w20, 1
 	sub	w21, w21, w19
 	add	w22, w22, w19
 	add	x25, x25, x27, sxtw
-	b	.L1975
-.L1977:
+	b	.L2032
+.L2034:
 	mov	w2, w27
 	mov	w1, 0
 	mov	x0, x25
 	bl	ftl_memset
-	b	.L1980
-.L1982:
+	b	.L2037
+.L2039:
 	mov	w24, -1
-	b	.L1973
+	b	.L2030
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
 	.section	.text.FtlLoadEctTbl,"ax",@progbits
 	.align	2
@@ -13524,28 +13858,28 @@ FtlLoadEctTbl:
 	mov	w0, 64
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR191
-	adrp	x20, .LANCHOR190
-	ldr	x2, [x19, #:lo12:.LANCHOR191]
-	ldrh	w1, [x20, #:lo12:.LANCHOR190]
+	adrp	x19, .LANCHOR199
+	adrp	x20, .LANCHOR198
+	ldr	x2, [x19, #:lo12:.LANCHOR199]
+	ldrh	w1, [x20, #:lo12:.LANCHOR198]
 	bl	FtlVendorPartRead
-	ldr	x0, [x19, #:lo12:.LANCHOR191]
+	ldr	x0, [x19, #:lo12:.LANCHOR199]
 	ldr	w1, [x0]
 	mov	w0, 17221
 	movk	w0, 0x4254, lsl 16
 	cmp	w1, w0
-	beq	.L1985
-	adrp	x1, .LC43
+	beq	.L2042
+	adrp	x1, .LC45
 	adrp	x0, .LC7
-	add	x1, x1, :lo12:.LC43
+	add	x1, x1, :lo12:.LC45
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR191]
+	ldr	x0, [x19, #:lo12:.LANCHOR199]
 	mov	w1, 0
-	ldrh	w2, [x20, #:lo12:.LANCHOR190]
+	ldrh	w2, [x20, #:lo12:.LANCHOR198]
 	lsl	w2, w2, 9
 	bl	ftl_memset
-.L1985:
+.L2042:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -13561,125 +13895,116 @@ Ftl_load_ext_data:
 	mov	w0, 0
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR138
+	adrp	x19, .LANCHOR141
 	str	x21, [sp, 32]
-	add	x21, x19, :lo12:.LANCHOR138
+	add	x21, x19, :lo12:.LANCHOR141
 	mov	x2, x21
 	bl	FtlVendorPartRead
-	ldr	w0, [x19, #:lo12:.LANCHOR138]
+	ldr	w0, [x19, #:lo12:.LANCHOR141]
 	mov	w20, 19539
 	movk	w20, 0x4654, lsl 16
 	cmp	w0, w20
-	beq	.L1988
+	beq	.L2045
 	mov	w2, 512
 	mov	w1, 0
 	mov	x0, x21
 	bl	ftl_memset
-	str	w20, [x19, #:lo12:.LANCHOR138]
-.L1988:
-	ldr	w1, [x19, #:lo12:.LANCHOR138]
-	add	x0, x19, :lo12:.LANCHOR138
+	str	w20, [x19, #:lo12:.LANCHOR141]
+.L2045:
+	ldr	w1, [x19, #:lo12:.LANCHOR141]
+	add	x0, x19, :lo12:.LANCHOR141
 	cmp	w1, w20
-	adrp	x20, .LANCHOR168
-	bne	.L1989
-	adrp	x1, .LANCHOR217
+	adrp	x20, .LANCHOR173
+	bne	.L2046
+	adrp	x1, .LANCHOR225
 	ldr	w2, [x0, 88]
-	str	w2, [x1, #:lo12:.LANCHOR217]
-	adrp	x1, .LANCHOR218
+	str	w2, [x1, #:lo12:.LANCHOR225]
+	adrp	x1, .LANCHOR226
 	ldr	w2, [x0, 92]
-	str	w2, [x1, #:lo12:.LANCHOR218]
-	adrp	x1, .LANCHOR161
+	str	w2, [x1, #:lo12:.LANCHOR226]
+	adrp	x1, .LANCHOR166
 	ldr	w2, [x0, 8]
-	str	w2, [x1, #:lo12:.LANCHOR161]
-	adrp	x1, .LANCHOR162
+	str	w2, [x1, #:lo12:.LANCHOR166]
+	adrp	x1, .LANCHOR167
 	ldr	w2, [x0, 12]
-	str	w2, [x1, #:lo12:.LANCHOR162]
-	adrp	x1, .LANCHOR166
+	str	w2, [x1, #:lo12:.LANCHOR167]
+	adrp	x1, .LANCHOR171
 	ldr	w2, [x0, 16]
-	str	w2, [x1, #:lo12:.LANCHOR166]
-	adrp	x1, .LANCHOR165
+	str	w2, [x1, #:lo12:.LANCHOR171]
+	adrp	x1, .LANCHOR170
 	ldr	w2, [x0, 20]
-	str	w2, [x1, #:lo12:.LANCHOR165]
+	str	w2, [x1, #:lo12:.LANCHOR170]
 	ldp	w1, w2, [x0, 28]
-	str	w1, [x20, #:lo12:.LANCHOR168]
-	adrp	x1, .LANCHOR79
-	str	w2, [x1, #:lo12:.LANCHOR79]
-	adrp	x1, .LANCHOR163
+	str	w1, [x20, #:lo12:.LANCHOR173]
+	adrp	x1, .LANCHOR81
+	str	w2, [x1, #:lo12:.LANCHOR81]
+	adrp	x1, .LANCHOR168
 	ldr	w2, [x0, 36]
-	str	w2, [x1, #:lo12:.LANCHOR163]
-	adrp	x1, .LANCHOR164
-	ldr	w2, [x0, 40]
-	str	w2, [x1, #:lo12:.LANCHOR164]
+	str	w2, [x1, #:lo12:.LANCHOR168]
 	adrp	x1, .LANCHOR169
-	ldr	w2, [x0, 44]
+	ldr	w2, [x0, 40]
 	str	w2, [x1, #:lo12:.LANCHOR169]
-	adrp	x1, .LANCHOR170
+	adrp	x1, .LANCHOR174
+	ldr	w2, [x0, 44]
+	str	w2, [x1, #:lo12:.LANCHOR174]
+	adrp	x1, .LANCHOR175
 	ldr	w2, [x0, 48]
-	str	w2, [x1, #:lo12:.LANCHOR170]
+	str	w2, [x1, #:lo12:.LANCHOR175]
 	ldr	w1, [x0, 60]
-	adrp	x0, .LANCHOR158
-	str	w1, [x0, #:lo12:.LANCHOR158]
-.L1989:
-	add	x19, x19, :lo12:.LANCHOR138
-	adrp	x0, .LANCHOR157
-	str	wzr, [x0, #:lo12:.LANCHOR157]
+	adrp	x0, .LANCHOR163
+	str	w1, [x0, #:lo12:.LANCHOR163]
+.L2046:
+	add	x19, x19, :lo12:.LANCHOR141
+	adrp	x0, .LANCHOR162
+	str	wzr, [x0, #:lo12:.LANCHOR162]
 	mov	w0, 34661
 	ldr	w1, [x19, 68]
 	movk	w0, 0x1234, lsl 16
 	cmp	w1, w0
-	bne	.L1990
-	adrp	x0, .LANCHOR28
-	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR28]
-	adrp	x1, .LC44
-	adrp	x0, .LC7
-	add	x1, x1, :lo12:.LC44
-	add	x0, x0, :lo12:.LC7
-	bl	printf
-.L1990:
-	adrp	x1, .LANCHOR167
+	bne	.L2047
+	adrp	x0, .LANCHOR16
+	ldrb	w0, [x0, #:lo12:.LANCHOR16]
+	cbz	w0, .L2048
+	str	wzr, [x19, 68]
+	bl	Ftl_save_ext_data
+.L2047:
+	adrp	x1, .LANCHOR172
 	adrp	x0, .LANCHOR48
 	ldr	x21, [sp, 32]
-	ldr	w2, [x1, #:lo12:.LANCHOR167]
+	ldr	w2, [x1, #:lo12:.LANCHOR172]
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
-	ldr	w1, [x20, #:lo12:.LANCHOR168]
+	ldr	w1, [x20, #:lo12:.LANCHOR173]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	madd	w0, w0, w2, w1
 	adrp	x1, .LANCHOR40
 	ldrh	w1, [x1, #:lo12:.LANCHOR40]
 	udiv	w0, w0, w1
-	adrp	x1, .LANCHOR206
-	str	w0, [x1, #:lo12:.LANCHOR206]
+	adrp	x1, .LANCHOR214
+	str	w0, [x1, #:lo12:.LANCHOR214]
 	ret
+.L2048:
+	adrp	x0, .LANCHOR104
+	mov	w1, 1
+	str	w1, [x0, #:lo12:.LANCHOR104]
+	adrp	x1, .LC46
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC46
+	add	x0, x0, :lo12:.LC7
+	bl	printf
+	b	.L2047
 	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
-	.section	.text.ftl_vendor_read,"ax",@progbits
-	.align	2
-	.global	ftl_vendor_read
-	.type	ftl_vendor_read, %function
-ftl_vendor_read:
-	add	w0, w0, 256
-	b	FtlVendorPartRead
-	.size	ftl_vendor_read, .-ftl_vendor_read
-	.section	.text.ftl_sys_read,"ax",@progbits
-	.align	2
-	.global	ftl_sys_read
-	.type	ftl_sys_read, %function
-ftl_sys_read:
-	add	w0, w0, 512
-	b	FtlVendorPartRead
-	.size	ftl_sys_read, .-ftl_sys_read
 	.section	.text.FtlMapBlkWriteDumpData,"ax",@progbits
 	.align	2
 	.global	FtlMapBlkWriteDumpData
 	.type	FtlMapBlkWriteDumpData, %function
 FtlMapBlkWriteDumpData:
 	ldr	w1, [x0, 56]
-	cbz	w1, .L2008
+	cbz	w1, .L2064
 	stp	x29, x30, [sp, -80]!
-	adrp	x1, .LANCHOR76
+	adrp	x1, .LANCHOR78
 	add	x29, sp, 0
-	ldr	w1, [x1, #:lo12:.LANCHOR76]
+	ldr	w1, [x1, #:lo12:.LANCHOR78]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
@@ -13687,28 +14012,28 @@ FtlMapBlkWriteDumpData:
 	str	x25, [sp, 64]
 	str	wzr, [x0, 56]
 	ldr	x25, [x0, 40]
-	cbnz	w1, .L1994
+	cbnz	w1, .L2050
 	mov	x19, x0
-	adrp	x0, .LANCHOR184
-	adrp	x23, .LANCHOR203
-	add	x21, x23, :lo12:.LANCHOR203
-	ldr	x0, [x0, #:lo12:.LANCHOR184]
+	adrp	x0, .LANCHOR190
+	adrp	x23, .LANCHOR211
+	add	x21, x23, :lo12:.LANCHOR211
+	ldr	x0, [x0, #:lo12:.LANCHOR190]
 	mov	x22, x23
 	str	x0, [x21, 8]
-	adrp	x0, .LANCHOR188
-	ldr	x24, [x0, #:lo12:.LANCHOR188]
+	adrp	x0, .LANCHOR195
+	ldr	x24, [x0, #:lo12:.LANCHOR195]
 	ldrh	w0, [x19, 2]
 	str	x24, [x21, 16]
-	cbz	w0, .L1998
+	cbz	w0, .L2054
 	adrp	x1, .LANCHOR53
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	sub	w1, w1, #1
 	cmp	w0, w1
-	bge	.L1998
+	bge	.L2054
 	ldrh	w1, [x19]
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L1998
+	beq	.L2054
 	ldr	x2, [x19, 16]
 	ubfiz	x1, x1, 1, 16
 	sub	w0, w0, #1
@@ -13719,18 +14044,18 @@ FtlMapBlkWriteDumpData:
 	str	w0, [x21, 4]
 	mov	x0, x21
 	bl	FlashReadPages
-	ldr	w0, [x23, #:lo12:.LANCHOR203]
+	ldr	w0, [x23, #:lo12:.LANCHOR211]
 	cmn	w0, #1
-	beq	.L1998
+	beq	.L2054
 	ldrh	w1, [x24, 8]
 	ldr	x2, [x19, 40]
 	ubfiz	x0, x1, 2, 16
 	ldr	w2, [x2, x0]
 	ldr	w0, [x21, 4]
 	cmp	w2, w0
-	bne	.L1998
+	bne	.L2054
 	ldr	x2, [x21, 8]
-.L2011:
+.L2067:
 	mov	x0, x19
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -13738,37 +14063,37 @@ FtlMapBlkWriteDumpData:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	b	FtlMapWritePage
-.L1998:
+.L2054:
 	sub	w20, w20, #1
 	and	w20, w20, 65535
 	ubfiz	x0, x20, 2, 16
 	ldr	w1, [x25, x0]
-	add	x0, x22, :lo12:.LANCHOR203
+	add	x0, x22, :lo12:.LANCHOR211
 	str	w1, [x0, 4]
-	cbz	w1, .L1999
+	cbz	w1, .L2055
 	mov	w2, 1
 	mov	w1, w2
 	bl	FlashReadPages
-.L2000:
-	add	x22, x22, :lo12:.LANCHOR203
+.L2056:
+	add	x22, x22, :lo12:.LANCHOR211
 	mov	w1, w20
 	ldr	x2, [x22, 8]
-	b	.L2011
-.L1999:
+	b	.L2067
+.L2055:
 	adrp	x1, .LANCHOR57
 	ldr	x0, [x0, 8]
 	ldrh	w2, [x1, #:lo12:.LANCHOR57]
 	mov	w1, 255
 	bl	ftl_memset
-	b	.L2000
-.L1994:
+	b	.L2056
+.L2050:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2008:
+.L2064:
 	ret
 	.size	FtlMapBlkWriteDumpData, .-FtlMapBlkWriteDumpData
 	.section	.text.FtlScanSysBlk,"ax",@progbits
@@ -13780,31 +14105,31 @@ FtlScanSysBlk:
 	mov	w1, 0
 	add	x29, sp, 0
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR130
+	adrp	x25, .LANCHOR133
 	stp	x21, x22, [sp, 32]
 	adrp	x21, .LANCHOR64
-	ldr	x0, [x25, #:lo12:.LANCHOR130]
-	adrp	x22, .LANCHOR193
+	ldr	x0, [x25, #:lo12:.LANCHOR133]
+	adrp	x22, .LANCHOR201
 	ldr	w2, [x21, #:lo12:.LANCHOR64]
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR128
+	adrp	x20, .LANCHOR131
 	stp	x23, x24, [sp, 48]
 	adrp	x23, .LANCHOR70
 	stp	x27, x28, [sp, 80]
-	adrp	x27, .LANCHOR129
+	adrp	x27, .LANCHOR132
 	lsl	w2, w2, 2
-	strh	wzr, [x20, #:lo12:.LANCHOR128]
+	strh	wzr, [x20, #:lo12:.LANCHOR131]
 	strh	wzr, [x23, #:lo12:.LANCHOR70]
 	bl	ftl_memset
-	ldr	x0, [x27, #:lo12:.LANCHOR129]
+	ldr	x0, [x27, #:lo12:.LANCHOR132]
 	mov	w1, 0
 	ldr	w2, [x21, #:lo12:.LANCHOR64]
 	adrp	x19, .LANCHOR61
 	adrp	x28, .LANCHOR71
-	adrp	x24, .LANCHOR210
+	adrp	x24, .LANCHOR218
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	ldr	x0, [x22, #:lo12:.LANCHOR193]
+	ldr	x0, [x22, #:lo12:.LANCHOR201]
 	mov	w1, 0
 	ldrh	w2, [x19, #:lo12:.LANCHOR61]
 	lsl	w2, w2, 2
@@ -13816,7 +14141,7 @@ FtlScanSysBlk:
 	bl	ftl_memset
 	mov	w2, 16
 	mov	w1, 255
-	add	x0, x24, :lo12:.LANCHOR210
+	add	x0, x24, :lo12:.LANCHOR218
 	bl	ftl_memset
 	adrp	x0, .LANCHOR40
 	stp	x22, x25, [x29, 144]
@@ -13826,38 +14151,38 @@ FtlScanSysBlk:
 	adrp	x0, .LANCHOR41
 	add	x0, x0, :lo12:.LANCHOR41
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR159
-	add	x0, x0, :lo12:.LANCHOR159
+	adrp	x0, .LANCHOR164
+	add	x0, x0, :lo12:.LANCHOR164
 	str	x0, [x29, 112]
-.L2013:
+.L2069:
 	ldr	x0, [x29, 120]
 	ldr	w1, [x29, 172]
 	ldrh	w0, [x0]
 	cmp	w0, w1
-	bls	.L2054
+	bls	.L2110
 	adrp	x0, .LANCHOR38
-	adrp	x25, .LANCHOR180
+	adrp	x25, .LANCHOR186
 	adrp	x6, .LANCHOR47
 	mov	x5, 0
 	ldrh	w13, [x0, #:lo12:.LANCHOR38]
-	adrp	x0, .LANCHOR104
-	ldr	x7, [x25, #:lo12:.LANCHOR180]
+	adrp	x0, .LANCHOR107
+	ldr	x7, [x25, #:lo12:.LANCHOR186]
 	mov	w22, 0
-	ldr	x12, [x0, #:lo12:.LANCHOR104]
-	adrp	x0, .LANCHOR105
+	ldr	x12, [x0, #:lo12:.LANCHOR107]
+	adrp	x0, .LANCHOR108
 	add	x6, x6, :lo12:.LANCHOR47
 	mov	w8, 56
-	ldr	x11, [x0, #:lo12:.LANCHOR105]
+	ldr	x11, [x0, #:lo12:.LANCHOR108]
 	adrp	x0, .LANCHOR58
 	ldrh	w10, [x0, #:lo12:.LANCHOR58]
-	b	.L2055
-.L2015:
+	b	.L2111
+.L2071:
 	ldrh	w1, [x29, 172]
 	ldrb	w0, [x6, x5]
 	bl	V2P_block
 	and	w4, w0, 65535
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L2014
+	cbnz	w0, .L2070
 	umaddl	x1, w22, w8, x7
 	lsl	w4, w4, 10
 	mul	w0, w22, w10
@@ -13867,19 +14192,19 @@ FtlScanSysBlk:
 	str	w4, [x1, 4]
 	add	x0, x11, x0, sxtw 2
 	stp	x12, x0, [x1, 8]
-.L2014:
+.L2070:
 	add	x5, x5, 1
-.L2055:
+.L2111:
 	cmp	w13, w5, uxth
-	bhi	.L2015
-	cbnz	w22, .L2016
-.L2053:
+	bhi	.L2071
+	cbnz	w22, .L2072
+.L2109:
 	ldr	w0, [x29, 172]
 	add	w26, w0, 1
 	and	w0, w26, 65535
 	str	w0, [x29, 172]
-	b	.L2013
-.L2016:
+	b	.L2069
+.L2072:
 	mov	w1, w22
 	mov	w2, 1
 	mov	x0, x7
@@ -13888,23 +14213,23 @@ FtlScanSysBlk:
 	umull	x0, w22, w0
 	mov	x22, 0
 	str	x0, [x29, 128]
-	adrp	x0, .LANCHOR221
-	add	x0, x0, :lo12:.LANCHOR221
+	adrp	x0, .LANCHOR229
+	add	x0, x0, :lo12:.LANCHOR229
 	str	x0, [x29, 136]
-.L2052:
-	ldr	x0, [x25, #:lo12:.LANCHOR180]
+.L2108:
+	ldr	x0, [x25, #:lo12:.LANCHOR186]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
 	ldr	w3, [x1, 4]
 	cmn	w0, #1
 	ldr	x27, [x1, 16]
 	ubfx	x26, x3, 10, 16
-	bne	.L2019
+	bne	.L2075
 	mov	w5, 16
 	mov	w7, 65535
-.L2021:
-	ldr	x0, [x25, #:lo12:.LANCHOR180]
-	add	x6, x25, :lo12:.LANCHOR180
+.L2077:
+	ldr	x0, [x25, #:lo12:.LANCHOR186]
+	add	x6, x25, :lo12:.LANCHOR186
 	mov	w2, 1
 	str	w7, [x29, 100]
 	add	x0, x0, x22
@@ -13920,71 +14245,71 @@ FtlScanSysBlk:
 	ldr	w5, [x29, 168]
 	cmp	w0, w7
 	ldr	x6, [x29, 104]
-	bne	.L2018
+	bne	.L2074
 	ldr	x0, [x6]
 	mov	w1, -1
 	str	w1, [x0, x22]
 	ldr	x0, [x6]
 	ldr	w0, [x0, x22]
 	cmp	w0, w1
-	beq	.L2091
-.L2019:
-	adrp	x0, .LANCHOR159
-	ldr	w1, [x0, #:lo12:.LANCHOR159]
+	beq	.L2147
+.L2075:
+	adrp	x0, .LANCHOR164
+	ldr	w1, [x0, #:lo12:.LANCHOR164]
 	ldr	w0, [x27, 4]
 	cmn	w1, #1
-	beq	.L2022
+	beq	.L2078
 	cmp	w1, w0
-	bhi	.L2023
-.L2022:
+	bhi	.L2079
+.L2078:
 	cmn	w0, #1
-	beq	.L2023
+	beq	.L2079
 	ldr	x2, [x29, 112]
 	add	w1, w0, 1
 	str	w1, [x2]
-.L2023:
+.L2079:
 	ldrh	w1, [x27]
 	mov	w2, 61604
 	cmp	w1, w2
-	beq	.L2025
-	bhi	.L2026
+	beq	.L2081
+	bhi	.L2082
 	mov	w0, 61574
 	cmp	w1, w0
-	beq	.L2027
-.L2024:
+	beq	.L2083
+.L2080:
 	ldr	x0, [x29, 128]
 	add	x22, x22, 56
 	cmp	x0, x22
-	bne	.L2052
-	b	.L2053
-.L2018:
-	ldr	x0, [x25, #:lo12:.LANCHOR180]
+	bne	.L2108
+	b	.L2109
+.L2074:
+	ldr	x0, [x25, #:lo12:.LANCHOR186]
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	bne	.L2019
+	bne	.L2075
 	sub	w5, w5, #1
 	ands	w5, w5, 65535
-	bne	.L2021
-.L2091:
+	bne	.L2077
+.L2147:
 	mov	w1, 0
 	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-	b	.L2024
-.L2026:
+	b	.L2080
+.L2082:
 	mov	w0, 61634
 	cmp	w1, w0
-	beq	.L2028
+	beq	.L2084
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L2091
-	b	.L2024
-.L2028:
-	ldrh	w1, [x20, #:lo12:.LANCHOR128]
+	beq	.L2147
+	b	.L2080
+.L2084:
+	ldrh	w1, [x20, #:lo12:.LANCHOR131]
 	ldr	w0, [x21, #:lo12:.LANCHOR64]
 	cmp	w1, w0
-	bls	.L2030
+	bls	.L2086
 	ldr	x1, [x29, 136]
-	mov	w2, 1307
+	mov	w2, 1469
 	adrp	x0, .LC5
 	add	x0, x0, :lo12:.LC5
 	bl	printf
@@ -13993,64 +14318,64 @@ FtlScanSysBlk:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2030:
+.L2086:
 	ldr	w6, [x21, #:lo12:.LANCHOR64]
 	ldr	x3, [x29, 152]
-	ldrh	w1, [x20, #:lo12:.LANCHOR128]
+	ldrh	w1, [x20, #:lo12:.LANCHOR131]
 	and	w2, w6, 65535
 	sub	w0, w2, #1
 	sub	w2, w2, w1
 	sxth	x0, w0
 	sub	w2, w2, #1
-	ldr	x5, [x3, #:lo12:.LANCHOR130]
+	ldr	x5, [x3, #:lo12:.LANCHOR133]
 	sxth	w2, w2
-.L2031:
+.L2087:
 	cmp	w0, w2
-	bgt	.L2037
-	tbz	w0, #31, .L2072
-	b	.L2024
-.L2037:
+	bgt	.L2093
+	tbz	w0, #31, .L2128
+	b	.L2080
+.L2093:
 	sxtw	x8, w0
 	ldr	w11, [x27, 4]
 	lsl	x7, x8, 2
 	add	x10, x5, x7
 	ldr	w7, [x5, x7]
 	cmp	w11, w7
-	bls	.L2032
+	bls	.L2088
 	ldr	w2, [x5]
-	cbnz	w2, .L2033
+	cbnz	w2, .L2089
 	cmp	w6, w1
-	beq	.L2033
+	beq	.L2089
 	add	w1, w1, 1
-	strh	w1, [x20, #:lo12:.LANCHOR128]
-.L2033:
+	strh	w1, [x20, #:lo12:.LANCHOR131]
+.L2089:
 	ldr	x1, [x29, 160]
-	ldr	x6, [x1, #:lo12:.LANCHOR129]
+	ldr	x6, [x1, #:lo12:.LANCHOR132]
 	mov	w1, 0
-.L2034:
+.L2090:
 	cmp	w1, w0
-	bne	.L2035
+	bne	.L2091
 	ldr	w1, [x27, 4]
 	str	w1, [x10]
 	strh	w26, [x6, x8, lsl 1]
-	tbnz	w0, #31, .L2024
-	ldrh	w1, [x20, #:lo12:.LANCHOR128]
+	tbnz	w0, #31, .L2080
+	ldrh	w1, [x20, #:lo12:.LANCHOR131]
 	ldr	w2, [x21, #:lo12:.LANCHOR64]
 	sub	w2, w2, w1
 	sub	w2, w2, #1
 	cmp	w0, w2, sxth
-	bgt	.L2024
-.L2072:
+	bgt	.L2080
+.L2128:
 	add	w1, w1, 1
-	strh	w1, [x20, #:lo12:.LANCHOR128]
+	strh	w1, [x20, #:lo12:.LANCHOR131]
 	ldr	w1, [x27, 4]
 	str	w1, [x5, x0, lsl 2]
 	ldr	x1, [x29, 160]
-	ldr	x1, [x1, #:lo12:.LANCHOR129]
-.L2090:
+	ldr	x1, [x1, #:lo12:.LANCHOR132]
+.L2146:
 	strh	w26, [x1, x0, lsl 1]
-	b	.L2024
-.L2035:
+	b	.L2080
+.L2091:
 	sxtw	x2, w1
 	add	w1, w1, 1
 	lsl	x7, x2, 2
@@ -14062,18 +14387,18 @@ FtlScanSysBlk:
 	add	x7, x6, x2
 	ldrh	w7, [x7, 2]
 	strh	w7, [x6, x2]
-	b	.L2034
-.L2032:
+	b	.L2090
+.L2088:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L2031
-.L2027:
+	b	.L2087
+.L2083:
 	ldrh	w1, [x23, #:lo12:.LANCHOR70]
 	ldrh	w0, [x19, #:lo12:.LANCHOR61]
 	cmp	w1, w0
-	bls	.L2040
+	bls	.L2096
 	ldr	x1, [x29, 136]
-	mov	w2, 1354
+	mov	w2, 1513
 	adrp	x0, .LC5
 	add	x0, x0, :lo12:.LC5
 	bl	printf
@@ -14082,54 +14407,54 @@ FtlScanSysBlk:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2040:
+.L2096:
 	ldrh	w6, [x19, #:lo12:.LANCHOR61]
 	ldrh	w2, [x23, #:lo12:.LANCHOR70]
 	sub	w1, w6, #1
 	sxth	x0, w1
 	sub	w5, w1, w2
 	ldr	x1, [x29, 144]
-	ldr	x1, [x1, #:lo12:.LANCHOR193]
-.L2041:
+	ldr	x1, [x1, #:lo12:.LANCHOR201]
+.L2097:
 	cmp	w0, w5
-	ble	.L2046
+	ble	.L2102
 	sxtw	x7, w0
 	ldr	w11, [x27, 4]
 	lsl	x8, x7, 2
 	add	x10, x1, x8
 	ldr	w8, [x1, x8]
 	cmp	w11, w8
-	bls	.L2042
+	bls	.L2098
 	ldr	w5, [x1]
-	cbnz	w5, .L2043
+	cbnz	w5, .L2099
 	cmp	w6, w2
-	beq	.L2043
+	beq	.L2099
 	add	w2, w2, 1
 	strh	w2, [x23, #:lo12:.LANCHOR70]
-.L2043:
+.L2099:
 	ldr	x6, [x28, #:lo12:.LANCHOR71]
 	mov	w2, 0
-.L2044:
+.L2100:
 	cmp	w2, w0
-	bne	.L2045
+	bne	.L2101
 	ldr	w2, [x27, 4]
 	str	w2, [x10]
 	strh	w26, [x6, x7, lsl 1]
-.L2046:
-	tbnz	w0, #31, .L2024
+.L2102:
+	tbnz	w0, #31, .L2080
 	ldrh	w2, [x19, #:lo12:.LANCHOR61]
 	ldrh	w5, [x23, #:lo12:.LANCHOR70]
 	sub	w2, w2, #1
 	sub	w2, w2, w5
 	cmp	w0, w2, sxth
-	bgt	.L2024
+	bgt	.L2080
 	add	w5, w5, 1
 	ldr	w2, [x27, 4]
 	strh	w5, [x23, #:lo12:.LANCHOR70]
 	str	w2, [x1, x0, lsl 2]
 	ldr	x1, [x28, #:lo12:.LANCHOR71]
-	b	.L2090
-.L2045:
+	b	.L2146
+.L2101:
 	sxtw	x5, w2
 	add	w2, w2, 1
 	lsl	x8, x5, 2
@@ -14141,58 +14466,58 @@ FtlScanSysBlk:
 	add	x8, x6, x5
 	ldrh	w8, [x8, 2]
 	strh	w8, [x6, x5]
-	b	.L2044
-.L2042:
+	b	.L2100
+.L2098:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L2041
-.L2025:
-	ldrh	w5, [x24, #:lo12:.LANCHOR210]
+	b	.L2097
+.L2081:
+	ldrh	w5, [x24, #:lo12:.LANCHOR218]
 	mov	w1, 65535
-	add	x2, x24, :lo12:.LANCHOR210
+	add	x2, x24, :lo12:.LANCHOR218
 	cmp	w5, w1
-	bne	.L2048
-	strh	w26, [x24, #:lo12:.LANCHOR210]
+	bne	.L2104
+	strh	w26, [x24, #:lo12:.LANCHOR218]
 	str	w0, [x2, 8]
-	b	.L2024
-.L2048:
+	b	.L2080
+.L2104:
 	ldrh	w0, [x2, 4]
 	cmp	w0, w1
-	beq	.L2049
+	beq	.L2105
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.L2049:
-	add	x0, x24, :lo12:.LANCHOR210
+.L2105:
+	add	x0, x24, :lo12:.LANCHOR218
 	ldr	w1, [x27, 4]
 	ldr	w2, [x0, 8]
 	cmp	w2, w1
-	bcs	.L2050
-	ldrh	w2, [x24, #:lo12:.LANCHOR210]
+	bcs	.L2106
+	ldrh	w2, [x24, #:lo12:.LANCHOR218]
 	strh	w2, [x0, 4]
-	strh	w26, [x24, #:lo12:.LANCHOR210]
+	strh	w26, [x24, #:lo12:.LANCHOR218]
 	str	w1, [x0, 8]
-	b	.L2024
-.L2050:
+	b	.L2080
+.L2106:
 	strh	w26, [x0, 4]
-	b	.L2024
-.L2054:
+	b	.L2080
+.L2110:
 	ldr	x0, [x29, 160]
-	ldr	x2, [x0, #:lo12:.LANCHOR129]
+	ldr	x2, [x0, #:lo12:.LANCHOR132]
 	ldrh	w0, [x2]
-	cbz	w0, .L2056
-.L2059:
+	cbz	w0, .L2112
+.L2115:
 	ldr	x1, [x28, #:lo12:.LANCHOR71]
 	ldrh	w0, [x1]
-	cbz	w0, .L2057
-.L2058:
-	ldrh	w1, [x20, #:lo12:.LANCHOR128]
+	cbz	w0, .L2113
+.L2114:
+	ldrh	w1, [x20, #:lo12:.LANCHOR131]
 	ldr	w0, [x21, #:lo12:.LANCHOR64]
 	cmp	w1, w0
-	bls	.L2088
-	mov	w2, 1488
-	adrp	x1, .LANCHOR221
+	bls	.L2144
+	mov	w2, 1631
+	adrp	x1, .LANCHOR229
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR221
+	add	x1, x1, :lo12:.LANCHOR229
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -14200,7 +14525,7 @@ FtlScanSysBlk:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2088:
+.L2144:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -14209,24 +14534,24 @@ FtlScanSysBlk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L2056:
-	ldrh	w0, [x20, #:lo12:.LANCHOR128]
-	cbz	w0, .L2059
+.L2112:
+	ldrh	w0, [x20, #:lo12:.LANCHOR131]
+	cbz	w0, .L2115
 	ldr	w1, [x21, #:lo12:.LANCHOR64]
 	mov	w0, 0
-.L2060:
+.L2116:
 	cmp	w0, w1
-	bcs	.L2059
+	bcs	.L2115
 	ldrh	w3, [x2, w0, sxtw 1]
-	cbz	w3, .L2061
+	cbz	w3, .L2117
 	ldr	x1, [x29, 152]
 	add	x7, x21, :lo12:.LANCHOR64
-	ldr	x4, [x1, #:lo12:.LANCHOR130]
+	ldr	x4, [x1, #:lo12:.LANCHOR133]
 	mov	w1, w0
-.L2062:
+.L2118:
 	ldr	w3, [x7]
 	cmp	w1, w3
-	bcs	.L2059
+	bcs	.L2115
 	sxtw	x6, w1
 	sub	w3, w1, w0
 	lsl	x5, x6, 1
@@ -14238,29 +14563,29 @@ FtlScanSysBlk:
 	strh	w8, [x2, x3, lsl 1]
 	str	w6, [x4, x3, lsl 2]
 	strh	wzr, [x2, x5]
-	b	.L2062
-.L2061:
+	b	.L2118
+.L2117:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L2060
-.L2057:
+	b	.L2116
+.L2113:
 	ldrh	w0, [x23, #:lo12:.LANCHOR70]
-	cbz	w0, .L2058
+	cbz	w0, .L2114
 	ldrh	w2, [x19, #:lo12:.LANCHOR61]
 	mov	w0, 0
-.L2067:
+.L2123:
 	mov	w6, w0
 	cmp	w0, w2
-	bge	.L2058
+	bge	.L2114
 	ldrh	w3, [x1, w0, sxtw 1]
-	cbz	w3, .L2068
+	cbz	w3, .L2124
 	ldr	x2, [x29, 144]
 	add	x19, x19, :lo12:.LANCHOR61
-	ldr	x3, [x2, #:lo12:.LANCHOR193]
-.L2069:
+	ldr	x3, [x2, #:lo12:.LANCHOR201]
+.L2125:
 	ldrh	w2, [x19]
 	cmp	w0, w2
-	bge	.L2058
+	bge	.L2114
 	sxtw	x5, w0
 	sub	w2, w0, w6
 	lsl	x4, x5, 1
@@ -14272,11 +14597,11 @@ FtlScanSysBlk:
 	strh	w7, [x1, x2, lsl 1]
 	str	w5, [x3, x2, lsl 2]
 	strh	wzr, [x1, x4]
-	b	.L2069
-.L2068:
+	b	.L2125
+.L2124:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L2067
+	b	.L2123
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
 	.section	.text.FtlLoadSysInfo,"ax",@progbits
 	.align	2
@@ -14287,33 +14612,33 @@ FtlLoadSysInfo:
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x23, x24, [sp, 64]
-	adrp	x23, .LANCHOR183
+	adrp	x23, .LANCHOR189
 	stp	x19, x20, [sp, 32]
-	adrp	x19, .LANCHOR203
-	add	x0, x19, :lo12:.LANCHOR203
+	adrp	x19, .LANCHOR211
+	add	x0, x19, :lo12:.LANCHOR211
 	stp	x25, x26, [sp, 80]
-	adrp	x25, .LANCHOR188
+	adrp	x25, .LANCHOR195
 	stp	x21, x22, [sp, 48]
 	stp	x27, x28, [sp, 96]
-	adrp	x24, .LANCHOR83
-	ldr	x1, [x23, #:lo12:.LANCHOR183]
+	adrp	x24, .LANCHOR85
+	ldr	x1, [x23, #:lo12:.LANCHOR189]
 	adrp	x22, .LANCHOR40
 	str	x1, [x0, 8]
-	adrp	x21, .LANCHOR210
-	ldr	x1, [x25, #:lo12:.LANCHOR188]
+	adrp	x21, .LANCHOR218
+	ldr	x1, [x25, #:lo12:.LANCHOR195]
 	str	x1, [x0, 16]
-	ldr	x0, [x24, #:lo12:.LANCHOR83]
+	ldr	x0, [x24, #:lo12:.LANCHOR85]
 	mov	w1, 0
 	ldrh	w2, [x22, #:lo12:.LANCHOR40]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	ldrh	w0, [x21, #:lo12:.LANCHOR210]
+	ldrh	w0, [x21, #:lo12:.LANCHOR218]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L2093
-.L2105:
+	bne	.L2149
+.L2161:
 	mov	w0, -1
-.L2092:
+.L2148:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -14322,11 +14647,11 @@ FtlLoadSysInfo:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 128
 	ret
-.L2093:
-	add	x26, x21, :lo12:.LANCHOR210
+.L2149:
+	add	x26, x21, :lo12:.LANCHOR218
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
-	ldrsh	w28, [x21, #:lo12:.LANCHOR210]
+	ldrsh	w28, [x21, #:lo12:.LANCHOR218]
 	sxth	w20, w0
 	adrp	x27, .LANCHOR57
 	add	w0, w0, 1
@@ -14335,12 +14660,12 @@ FtlLoadSysInfo:
 	adrp	x26, .LANCHOR2
 	add	x0, x26, :lo12:.LANCHOR2
 	str	x0, [x29, 104]
-.L2095:
-	tbz	w20, #31, .L2101
-	mov	w2, 1557
-	adrp	x1, .LANCHOR222
+.L2151:
+	tbz	w20, #31, .L2157
+	mov	w2, 1708
+	adrp	x1, .LANCHOR230
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR222
+	add	x1, x1, :lo12:.LANCHOR230
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -14348,41 +14673,41 @@ FtlLoadSysInfo:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-	b	.L2100
-.L2101:
-	add	x26, x19, :lo12:.LANCHOR203
+	b	.L2156
+.L2157:
+	add	x26, x19, :lo12:.LANCHOR211
 	orr	w0, w20, w28, lsl 10
 	mov	w2, 1
 	mov	w1, w2
 	str	w0, [x26, 4]
-	ldr	x0, [x23, #:lo12:.LANCHOR183]
+	ldr	x0, [x23, #:lo12:.LANCHOR189]
 	str	x0, [x26, 8]
 	mov	x0, x26
 	bl	FlashReadPages
 	ldr	x0, [x29, 104]
 	ldrb	w0, [x0]
-	cbz	w0, .L2096
+	cbz	w0, .L2152
 	ldr	x8, [x26, 16]
 	ldr	w7, [x8, 12]
-	cbz	w7, .L2096
+	cbz	w7, .L2152
 	ldr	x6, [x26, 8]
 	ldrh	w1, [x27]
 	mov	x0, x6
 	bl	js_hash
 	cmp	w7, w0
-	beq	.L2096
-	cbnz	w20, .L2097
-	add	x10, x21, :lo12:.LANCHOR210
+	beq	.L2152
+	cbnz	w20, .L2153
+	add	x10, x21, :lo12:.LANCHOR218
 	str	x10, [x29, 96]
 	ldrh	w0, [x10, 4]
 	cmp	w28, w0
-	beq	.L2097
+	beq	.L2153
 	ldr	w0, [x6]
 	str	w0, [sp]
-	ldrh	w1, [x21, #:lo12:.LANCHOR210]
-	adrp	x0, .LC45
-	ldr	w2, [x19, #:lo12:.LANCHOR203]
-	add	x0, x0, :lo12:.LC45
+	ldrh	w1, [x21, #:lo12:.LANCHOR218]
+	adrp	x0, .LC47
+	ldr	w2, [x19, #:lo12:.LANCHOR211]
+	add	x0, x0, :lo12:.LC47
 	ldp	w4, w5, [x8]
 	ldr	w6, [x8, 8]
 	ldr	w3, [x26, 4]
@@ -14391,39 +14716,39 @@ FtlLoadSysInfo:
 	adrp	x0, .LANCHOR53
 	ldrh	w20, [x0, #:lo12:.LANCHOR53]
 	ldrsh	w28, [x10, 4]
-.L2099:
+.L2155:
 	sub	w20, w20, #1
 	sxth	w20, w20
-	b	.L2095
-.L2097:
+	b	.L2151
+.L2153:
 	mov	w0, -1
-	str	w0, [x19, #:lo12:.LANCHOR203]
-.L2096:
-	ldr	w0, [x19, #:lo12:.LANCHOR203]
+	str	w0, [x19, #:lo12:.LANCHOR211]
+.L2152:
+	ldr	w0, [x19, #:lo12:.LANCHOR211]
 	cmn	w0, #1
-	beq	.L2099
-	ldr	x0, [x23, #:lo12:.LANCHOR183]
+	beq	.L2155
+	ldr	x0, [x23, #:lo12:.LANCHOR189]
 	mov	w1, 19539
 	movk	w1, 0x4654, lsl 16
 	ldr	w0, [x0]
 	cmp	w0, w1
-	bne	.L2099
-	ldr	x0, [x25, #:lo12:.LANCHOR188]
+	bne	.L2155
+	ldr	x0, [x25, #:lo12:.LANCHOR195]
 	ldrh	w1, [x0]
 	mov	w0, 61604
 	cmp	w1, w0
-	bne	.L2099
-.L2100:
+	bne	.L2155
+.L2156:
 	adrp	x1, .LANCHOR57
 	ldrh	w0, [x22, #:lo12:.LANCHOR40]
 	ldrh	w1, [x1, #:lo12:.LANCHOR57]
 	add	x0, x0, 24
 	cmp	x1, x0, lsl 1
-	bcs	.L2103
-	mov	w2, 1559
-	adrp	x1, .LANCHOR222
+	bcs	.L2159
+	mov	w2, 1710
+	adrp	x1, .LANCHOR230
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR222
+	add	x1, x1, :lo12:.LANCHOR230
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -14431,14 +14756,14 @@ FtlLoadSysInfo:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2103:
-	add	x19, x19, :lo12:.LANCHOR203
+.L2159:
+	add	x19, x19, :lo12:.LANCHOR211
 	mov	w2, 48
-	adrp	x20, .LANCHOR80
-	add	x0, x20, :lo12:.LANCHOR80
+	adrp	x20, .LANCHOR82
+	add	x0, x20, :lo12:.LANCHOR82
 	ldr	x1, [x19, 8]
 	bl	ftl_memcpy
-	ldr	x0, [x24, #:lo12:.LANCHOR83]
+	ldr	x0, [x24, #:lo12:.LANCHOR85]
 	ldrh	w2, [x22, #:lo12:.LANCHOR40]
 	ldr	x1, [x19, 8]
 	lsl	w2, w2, 1
@@ -14448,7 +14773,7 @@ FtlLoadSysInfo:
 	ldr	x0, [x19, 8]
 	lsr	w2, w1, 3
 	ubfiz	x1, x1, 1, 16
-	add	x1, x1, 48
+	add	x1, x1, 51
 	add	w2, w2, 4
 	and	x1, x1, -4
 	add	x1, x0, x1
@@ -14457,7 +14782,7 @@ FtlLoadSysInfo:
 	bl	ftl_memcpy
 	adrp	x0, .LANCHOR69
 	ldrh	w0, [x0, #:lo12:.LANCHOR69]
-	cbz	w0, .L2104
+	cbz	w0, .L2160
 	ldrh	w1, [x22, #:lo12:.LANCHOR40]
 	adrp	x0, .LANCHOR66
 	ldrh	w2, [x0, #:lo12:.LANCHOR66]
@@ -14468,33 +14793,33 @@ FtlLoadSysInfo:
 	lsl	w2, w2, 2
 	and	x1, x1, 65532
 	add	x1, x0, x1
-	adrp	x0, .LANCHOR195
-	ldr	x0, [x0, #:lo12:.LANCHOR195]
+	adrp	x0, .LANCHOR203
+	ldr	x0, [x0, #:lo12:.LANCHOR203]
 	bl	ftl_memcpy
-.L2104:
-	ldr	w2, [x20, #:lo12:.LANCHOR80]
+.L2160:
+	ldr	w2, [x20, #:lo12:.LANCHOR82]
 	mov	w1, 19539
 	movk	w1, 0x4654, lsl 16
-	add	x0, x20, :lo12:.LANCHOR80
+	add	x0, x20, :lo12:.LANCHOR82
 	cmp	w2, w1
-	bne	.L2105
-	add	x21, x21, :lo12:.LANCHOR210
+	bne	.L2161
+	add	x21, x21, :lo12:.LANCHOR218
 	ldrh	w1, [x0, 8]
 	ldrb	w2, [x0, 10]
 	adrp	x0, .LANCHOR45
 	strh	w1, [x21, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR45]
 	cmp	w2, w0
-	bne	.L2105
-	adrp	x0, .LANCHOR223
-	adrp	x2, .LANCHOR72
+	bne	.L2161
+	adrp	x0, .LANCHOR231
+	adrp	x2, .LANCHOR74
 	adrp	x3, .LANCHOR38
-	str	w1, [x0, #:lo12:.LANCHOR223]
+	str	w1, [x0, #:lo12:.LANCHOR231]
 	adrp	x0, .LANCHOR52
 	ldrh	w3, [x3, #:lo12:.LANCHOR38]
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	mul	w0, w0, w1
-	str	w0, [x2, #:lo12:.LANCHOR72]
+	str	w0, [x2, #:lo12:.LANCHOR74]
 	adrp	x2, .LANCHOR55
 	ldrh	w2, [x2, #:lo12:.LANCHOR55]
 	mul	w0, w2, w0
@@ -14502,19 +14827,19 @@ FtlLoadSysInfo:
 	str	w0, [x2, #:lo12:.LANCHOR68]
 	adrp	x0, .LANCHOR42
 	ldr	w2, [x0, #:lo12:.LANCHOR42]
-	adrp	x0, .LANCHOR74+6
-	ldrh	w0, [x0, #:lo12:.LANCHOR74+6]
+	adrp	x0, .LANCHOR76+6
+	ldrh	w0, [x0, #:lo12:.LANCHOR76+6]
 	cmp	w1, w2
 	sub	w0, w2, w0
 	sub	w0, w0, w1
 	udiv	w0, w0, w3
-	adrp	x3, .LANCHOR224
-	strh	w0, [x3, #:lo12:.LANCHOR224]
-	bls	.L2106
-	mov	w2, 1586
-	adrp	x1, .LANCHOR222
+	adrp	x3, .LANCHOR232
+	strh	w0, [x3, #:lo12:.LANCHOR232]
+	bls	.L2162
+	mov	w2, 1739
+	adrp	x1, .LANCHOR230
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR222
+	add	x1, x1, :lo12:.LANCHOR230
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -14522,31 +14847,31 @@ FtlLoadSysInfo:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2106:
-	add	x4, x20, :lo12:.LANCHOR80
-	adrp	x0, .LANCHOR91
-	add	x2, x0, :lo12:.LANCHOR91
-	adrp	x5, .LANCHOR205
-	adrp	x19, .LANCHOR92
+.L2162:
+	add	x4, x20, :lo12:.LANCHOR82
+	adrp	x0, .LANCHOR93
+	add	x2, x0, :lo12:.LANCHOR93
+	adrp	x5, .LANCHOR213
+	adrp	x19, .LANCHOR94
 	mov	x22, x5
 	ldrh	w1, [x4, 16]
 	ldrh	w6, [x4, 14]
-	strh	w6, [x0, #:lo12:.LANCHOR91]
+	strh	w6, [x0, #:lo12:.LANCHOR93]
 	lsr	w3, w1, 6
 	and	w1, w1, 63
 	strb	w1, [x2, 6]
 	ldrb	w1, [x4, 11]
 	strb	w1, [x2, 8]
-	add	x1, x5, :lo12:.LANCHOR205
+	add	x1, x5, :lo12:.LANCHOR213
 	strh	w3, [x2, 2]
 	mov	w2, -1
-	strh	w2, [x5, #:lo12:.LANCHOR205]
-	add	x2, x19, :lo12:.LANCHOR92
+	strh	w2, [x5, #:lo12:.LANCHOR213]
+	add	x2, x19, :lo12:.LANCHOR94
 	strh	wzr, [x1, 2]
 	strb	wzr, [x1, 6]
 	strb	wzr, [x1, 8]
 	ldrh	w1, [x4, 18]
-	strh	w1, [x19, #:lo12:.LANCHOR92]
+	strh	w1, [x19, #:lo12:.LANCHOR94]
 	ldrh	w1, [x4, 20]
 	lsr	w3, w1, 6
 	and	w1, w1, 63
@@ -14554,10 +14879,10 @@ FtlLoadSysInfo:
 	ldrb	w1, [x4, 12]
 	strh	w3, [x2, 2]
 	strb	w1, [x2, 8]
-	adrp	x2, .LANCHOR93
+	adrp	x2, .LANCHOR95
 	ldrh	w1, [x4, 22]
-	add	x3, x2, :lo12:.LANCHOR93
-	strh	w1, [x2, #:lo12:.LANCHOR93]
+	add	x3, x2, :lo12:.LANCHOR95
+	strh	w1, [x2, #:lo12:.LANCHOR95]
 	mov	x21, x2
 	ldrh	w1, [x4, 24]
 	lsr	w7, w1, 6
@@ -14565,68 +14890,68 @@ FtlLoadSysInfo:
 	strb	w1, [x3, 6]
 	ldrb	w1, [x4, 13]
 	strb	w1, [x3, 8]
-	adrp	x1, .LANCHOR161
+	adrp	x1, .LANCHOR166
 	strh	w7, [x3, 2]
 	ldr	w3, [x4, 32]
-	str	wzr, [x1, #:lo12:.LANCHOR161]
-	adrp	x1, .LANCHOR162
-	str	wzr, [x1, #:lo12:.LANCHOR162]
-	adrp	x1, .LANCHOR166
 	str	wzr, [x1, #:lo12:.LANCHOR166]
-	adrp	x1, .LANCHOR165
-	str	wzr, [x1, #:lo12:.LANCHOR165]
 	adrp	x1, .LANCHOR167
-	str	w3, [x1, #:lo12:.LANCHOR167]
-	adrp	x1, .LANCHOR168
-	str	wzr, [x1, #:lo12:.LANCHOR168]
+	str	wzr, [x1, #:lo12:.LANCHOR167]
+	adrp	x1, .LANCHOR171
+	str	wzr, [x1, #:lo12:.LANCHOR171]
+	adrp	x1, .LANCHOR170
+	str	wzr, [x1, #:lo12:.LANCHOR170]
+	adrp	x1, .LANCHOR172
+	str	w3, [x1, #:lo12:.LANCHOR172]
+	adrp	x1, .LANCHOR173
+	str	wzr, [x1, #:lo12:.LANCHOR173]
+	adrp	x1, .LANCHOR174
+	str	wzr, [x1, #:lo12:.LANCHOR174]
 	adrp	x1, .LANCHOR169
+	ldr	w3, [x4, 40]
 	str	wzr, [x1, #:lo12:.LANCHOR169]
 	adrp	x1, .LANCHOR164
-	ldr	w3, [x4, 40]
-	str	wzr, [x1, #:lo12:.LANCHOR164]
-	adrp	x1, .LANCHOR159
-	ldr	w4, [x1, #:lo12:.LANCHOR159]
+	ldr	w4, [x1, #:lo12:.LANCHOR164]
 	cmp	w3, w4
-	bls	.L2107
-	str	w3, [x1, #:lo12:.LANCHOR159]
-.L2107:
-	add	x20, x20, :lo12:.LANCHOR80
-	adrp	x1, .LANCHOR160
-	ldr	w3, [x1, #:lo12:.LANCHOR160]
+	bls	.L2163
+	str	w3, [x1, #:lo12:.LANCHOR164]
+.L2163:
+	add	x20, x20, :lo12:.LANCHOR82
+	adrp	x1, .LANCHOR165
+	ldr	w3, [x1, #:lo12:.LANCHOR165]
 	ldr	w2, [x20, 36]
 	cmp	w2, w3
-	bls	.L2108
-	str	w2, [x1, #:lo12:.LANCHOR160]
-.L2108:
+	bls	.L2164
+	str	w2, [x1, #:lo12:.LANCHOR165]
+.L2164:
 	mov	w1, 65535
 	cmp	w6, w1
-	beq	.L2109
-	add	x0, x0, :lo12:.LANCHOR91
+	beq	.L2165
+	add	x0, x0, :lo12:.LANCHOR93
 	bl	make_superblock
-.L2109:
-	ldrh	w2, [x19, #:lo12:.LANCHOR92]
+.L2165:
+	ldrh	w2, [x19, #:lo12:.LANCHOR94]
 	mov	w1, 65535
-	add	x0, x19, :lo12:.LANCHOR92
+	add	x0, x19, :lo12:.LANCHOR94
 	cmp	w2, w1
-	beq	.L2110
+	beq	.L2166
 	bl	make_superblock
-.L2110:
-	ldrh	w2, [x21, #:lo12:.LANCHOR93]
+.L2166:
+	ldrh	w2, [x21, #:lo12:.LANCHOR95]
 	mov	w1, 65535
-	add	x0, x21, :lo12:.LANCHOR93
+	add	x0, x21, :lo12:.LANCHOR95
 	cmp	w2, w1
-	beq	.L2111
+	beq	.L2167
 	bl	make_superblock
-.L2111:
-	ldrh	w2, [x22, #:lo12:.LANCHOR205]
+.L2167:
+	ldrh	w2, [x22, #:lo12:.LANCHOR213]
 	mov	w1, 65535
-	add	x0, x22, :lo12:.LANCHOR205
+	add	x0, x22, :lo12:.LANCHOR213
 	cmp	w2, w1
-	beq	.L2112
+	beq	.L2168
 	bl	make_superblock
-.L2112:
+.L2168:
 	mov	w0, 0
-	b	.L2092
+	b	.L2148
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
 	.section	.text.FtlDumpBlockInfo,"ax",@progbits
 	.align	2
@@ -14648,77 +14973,77 @@ FtlDumpBlockInfo:
 	bl	P2V_block_in_plane
 	ldrh	w25, [x19, #:lo12:.LANCHOR52]
 	and	w21, w0, 65535
-	adrp	x1, .LANCHOR225
-	adrp	x0, .LC46
-	add	x1, x1, :lo12:.LANCHOR225
-	add	x0, x0, :lo12:.LC46
+	adrp	x1, .LANCHOR233
+	adrp	x0, .LC48
+	add	x1, x1, :lo12:.LANCHOR233
+	add	x0, x0, :lo12:.LC48
 	bl	printf
-	adrp	x1, .LANCHOR83
+	adrp	x1, .LANCHOR85
 	ubfiz	x0, x21, 1, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR83]
+	ldr	x1, [x1, #:lo12:.LANCHOR85]
 	ldrh	w2, [x1, x0]
 	mov	w1, w21
-	adrp	x0, .LC47
-	add	x0, x0, :lo12:.LC47
+	adrp	x0, .LC49
+	add	x0, x0, :lo12:.LC49
 	bl	printf
 	strh	w21, [x23, -48]!
 	mov	x0, x23
 	bl	make_superblock
-	adrp	x0, .LANCHOR15
-	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L2137
-	cbnz	w22, .L2137
+	adrp	x0, .LANCHOR16
+	ldrb	w0, [x0, #:lo12:.LANCHOR16]
+	cbz	w0, .L2193
+	cbnz	w22, .L2193
 	mov	w0, w21
 	bl	ftl_get_blk_mode
 	mov	w21, w0
 	cmp	w0, 1
-	bne	.L2128
+	bne	.L2184
 	adrp	x0, .LANCHOR53
 	ldrh	w25, [x0, #:lo12:.LANCHOR53]
-.L2128:
+.L2184:
 	ldrh	w3, [x19, #:lo12:.LANCHOR52]
-	adrp	x26, .LC49
-	add	x26, x26, :lo12:.LC49
+	adrp	x26, .LC51
+	add	x26, x26, :lo12:.LC51
 	mov	w20, 0
 	mov	w27, 56
 	mov	w2, w25
 	mov	w1, w21
-	adrp	x0, .LC48
-	add	x0, x0, :lo12:.LC48
+	adrp	x0, .LC50
+	add	x0, x0, :lo12:.LC50
 	bl	printf
-.L2129:
-	adrp	x1, .LANCHOR104
+.L2185:
+	adrp	x1, .LANCHOR107
 	adrp	x0, .LANCHOR38
-	adrp	x24, .LANCHOR180
+	adrp	x24, .LANCHOR186
 	add	x3, x23, 16
-	ldr	x6, [x1, #:lo12:.LANCHOR104]
+	ldr	x6, [x1, #:lo12:.LANCHOR107]
 	adrp	x1, .LANCHOR57
 	ldrh	w5, [x0, #:lo12:.LANCHOR38]
 	mov	w19, 0
 	ldrh	w7, [x1, #:lo12:.LANCHOR57]
-	adrp	x1, .LANCHOR105
-	ldr	x0, [x24, #:lo12:.LANCHOR180]
+	adrp	x1, .LANCHOR108
+	ldr	x0, [x24, #:lo12:.LANCHOR186]
 	mov	w11, 65535
-	ldr	x8, [x1, #:lo12:.LANCHOR105]
+	ldr	x8, [x1, #:lo12:.LANCHOR108]
 	adrp	x1, .LANCHOR58
 	ldrh	w10, [x1, #:lo12:.LANCHOR58]
 	mov	w1, 0
-.L2130:
+.L2186:
 	cmp	w1, w5
-	bne	.L2132
+	bne	.L2188
 	mov	w1, w19
 	umull	x19, w19, w27
 	mov	x22, 0
 	mov	w2, w21
 	bl	FlashReadPages
-.L2133:
+.L2189:
 	cmp	x22, x19
-	bne	.L2134
+	bne	.L2190
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	cmp	w25, w20
-	bne	.L2129
-.L2135:
+	bne	.L2185
+.L2191:
 	ldp	x19, x20, [sp, 32]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 48]
@@ -14728,13 +15053,13 @@ FtlDumpBlockInfo:
 	ldr	x27, [sp, 96]
 	add	sp, sp, 160
 	ret
-.L2137:
+.L2193:
 	mov	w21, 0
-	b	.L2128
-.L2132:
+	b	.L2184
+.L2188:
 	ldrh	w2, [x3]
 	cmp	w2, w11
-	beq	.L2131
+	beq	.L2187
 	umaddl	x4, w19, w27, x0
 	orr	w2, w20, w2, lsl 10
 	str	w2, [x4, 4]
@@ -14748,13 +15073,13 @@ FtlDumpBlockInfo:
 	asr	w2, w2, 2
 	add	x2, x8, x2, sxtw 2
 	str	x2, [x4, 16]
-.L2131:
+.L2187:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	and	w1, w1, 65535
-	b	.L2130
-.L2134:
-	ldr	x8, [x24, #:lo12:.LANCHOR180]
+	b	.L2186
+.L2190:
+	ldr	x8, [x24, #:lo12:.LANCHOR186]
 	ldrh	w1, [x29, 96]
 	add	x2, x8, x22
 	ldp	x3, x0, [x2, 8]
@@ -14769,7 +15094,7 @@ FtlDumpBlockInfo:
 	ldr	w2, [x8, x22]
 	add	x22, x22, 56
 	bl	printf
-	b	.L2133
+	b	.L2189
 	.size	FtlDumpBlockInfo, .-FtlDumpBlockInfo
 	.section	.text.FtlScanAllBlock,"ax",@progbits
 	.align	2
@@ -14777,26 +15102,26 @@ FtlDumpBlockInfo:
 	.type	FtlScanAllBlock, %function
 FtlScanAllBlock:
 	sub	sp, sp, #144
-	adrp	x1, .LANCHOR226
-	adrp	x0, .LC46
-	add	x1, x1, :lo12:.LANCHOR226
-	add	x0, x0, :lo12:.LC46
+	adrp	x1, .LANCHOR234
+	adrp	x0, .LC48
+	add	x1, x1, :lo12:.LANCHOR234
+	add	x0, x0, :lo12:.LC48
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x23, x24, [sp, 64]
 	adrp	x23, .LANCHOR41
 	stp	x19, x20, [sp, 32]
-	adrp	x24, .LC51
+	adrp	x24, .LC53
 	stp	x21, x22, [sp, 48]
 	mov	w20, 0
 	add	x23, x23, :lo12:.LANCHOR41
-	add	x24, x24, :lo12:.LC51
+	add	x24, x24, :lo12:.LC53
 	str	x25, [sp, 80]
 	bl	printf
-.L2141:
+.L2197:
 	ldrh	w0, [x23]
 	cmp	w0, w20
-	bhi	.L2149
+	bhi	.L2205
 	ldp	x19, x20, [sp, 32]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 48]
@@ -14805,67 +15130,67 @@ FtlScanAllBlock:
 	ldr	x25, [sp, 80]
 	add	sp, sp, 144
 	ret
-.L2149:
+.L2205:
 	strh	w20, [x29, 80]
 	mov	w0, w20
 	bl	ftl_get_blk_mode
 	mov	w3, w0
-	adrp	x2, .LANCHOR83
+	adrp	x2, .LANCHOR85
 	ubfiz	x1, x20, 1, 16
-	adrp	x0, .LC50
-	add	x0, x0, :lo12:.LC50
-	ldr	x2, [x2, #:lo12:.LANCHOR83]
-	adrp	x22, .LANCHOR180
+	adrp	x0, .LC52
+	add	x0, x0, :lo12:.LC52
+	ldr	x2, [x2, #:lo12:.LANCHOR85]
+	adrp	x22, .LANCHOR186
 	mov	w19, 0
 	ldrh	w2, [x2, x1]
 	mov	w1, w20
 	bl	printf
 	add	x0, x29, 80
 	bl	make_superblock
-	adrp	x1, .LANCHOR104
+	adrp	x1, .LANCHOR107
 	adrp	x0, .LANCHOR38
 	add	x3, x29, 96
 	mov	w11, 65535
-	ldr	x6, [x1, #:lo12:.LANCHOR104]
+	ldr	x6, [x1, #:lo12:.LANCHOR107]
 	adrp	x1, .LANCHOR57
 	ldrh	w5, [x0, #:lo12:.LANCHOR38]
 	mov	w12, 56
 	ldrh	w7, [x1, #:lo12:.LANCHOR57]
-	adrp	x1, .LANCHOR105
-	ldr	x0, [x22, #:lo12:.LANCHOR180]
-	ldr	x8, [x1, #:lo12:.LANCHOR105]
+	adrp	x1, .LANCHOR108
+	ldr	x0, [x22, #:lo12:.LANCHOR186]
+	ldr	x8, [x1, #:lo12:.LANCHOR108]
 	adrp	x1, .LANCHOR58
 	ldrh	w10, [x1, #:lo12:.LANCHOR58]
 	mov	w1, 0
-.L2142:
+.L2198:
 	cmp	w1, w5
-	bne	.L2144
+	bne	.L2200
 	mov	w25, 56
 	mov	x21, 0
 	mov	w2, 0
 	mov	w1, w19
 	umull	x25, w19, w25
 	bl	FlashReadPages
-.L2145:
+.L2201:
 	cmp	x21, x25
-	bne	.L2146
-	ldr	x0, [x22, #:lo12:.LANCHOR180]
-	adrp	x25, .LC52
-	add	x25, x25, :lo12:.LC52
+	bne	.L2202
+	ldr	x0, [x22, #:lo12:.LANCHOR186]
+	adrp	x25, .LC54
+	add	x25, x25, :lo12:.LC54
 	mov	w1, w19
 	mov	x19, 0
 	mov	w2, 1
 	bl	FlashReadPages
-.L2147:
+.L2203:
 	cmp	x21, x19
-	bne	.L2148
+	bne	.L2204
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2141
-.L2144:
+	b	.L2197
+.L2200:
 	ldrh	w2, [x3]
 	cmp	w2, w11
-	beq	.L2143
+	beq	.L2199
 	umaddl	x4, w19, w12, x0
 	lsl	w2, w2, 10
 	str	w2, [x4, 4]
@@ -14879,13 +15204,13 @@ FtlScanAllBlock:
 	asr	w2, w2, 2
 	add	x2, x8, x2, sxtw 2
 	str	x2, [x4, 16]
-.L2143:
+.L2199:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	and	w1, w1, 65535
-	b	.L2142
-.L2146:
-	ldr	x8, [x22, #:lo12:.LANCHOR180]
+	b	.L2198
+.L2202:
+	ldr	x8, [x22, #:lo12:.LANCHOR186]
 	ldrh	w1, [x29, 80]
 	add	x2, x8, x21
 	ldp	x3, x0, [x2, 8]
@@ -14900,9 +15225,9 @@ FtlScanAllBlock:
 	ldr	w2, [x8, x21]
 	add	x21, x21, 56
 	bl	printf
-	b	.L2145
-.L2148:
-	ldr	x8, [x22, #:lo12:.LANCHOR180]
+	b	.L2201
+.L2204:
+	ldr	x8, [x22, #:lo12:.LANCHOR186]
 	ldrh	w1, [x29, 80]
 	add	x2, x8, x19
 	ldp	x3, x0, [x2, 8]
@@ -14917,7 +15242,7 @@ FtlScanAllBlock:
 	ldr	w2, [x8, x19]
 	add	x19, x19, 56
 	bl	printf
-	b	.L2147
+	b	.L2203
 	.size	FtlScanAllBlock, .-FtlScanAllBlock
 	.section	.text.FtlMapTblRecovery,"ax",@progbits
 	.align	2
@@ -14932,7 +15257,7 @@ FtlMapTblRecovery:
 	stp	x23, x24, [sp, 48]
 	ldrh	w24, [x0, 6]
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR183
+	adrp	x21, .LANCHOR189
 	ldr	x22, [x0, 40]
 	ldr	x23, [x0, 16]
 	lsl	w2, w24, 2
@@ -14947,15 +15272,15 @@ FtlMapTblRecovery:
 	mov	x0, x22
 	bl	ftl_memset
 	stp	wzr, wzr, [x28, 48]
-	adrp	x0, .LANCHOR203
-	add	x4, x0, :lo12:.LANCHOR203
-	ldr	x1, [x21, #:lo12:.LANCHOR183]
+	adrp	x0, .LANCHOR211
+	add	x4, x0, :lo12:.LANCHOR211
+	ldr	x1, [x21, #:lo12:.LANCHOR189]
 	mov	x27, x4
 	str	x0, [x29, 128]
 	str	x1, [x4, 8]
-	adrp	x1, .LANCHOR188
+	adrp	x1, .LANCHOR195
 	ldr	w0, [x29, 156]
-	ldr	x20, [x1, #:lo12:.LANCHOR188]
+	ldr	x20, [x1, #:lo12:.LANCHOR195]
 	mov	w1, -1
 	str	x20, [x4, 16]
 	sub	w0, w0, #1
@@ -14966,14 +15291,14 @@ FtlMapTblRecovery:
 	add	x0, x25, :lo12:.LANCHOR53
 	str	w1, [x28, 56]
 	str	x0, [x29, 104]
-.L2152:
+.L2208:
 	ldr	w0, [x29, 156]
 	cmp	w19, w0
-	bge	.L2171
+	bge	.L2227
 	ldr	w0, [x29, 116]
 	sxtw	x26, w19
 	cmp	w19, w0
-	bne	.L2153
+	bne	.L2209
 	lsl	x0, x26, 1
 	mov	w1, 1
 	add	x21, x23, x0
@@ -14992,21 +15317,21 @@ FtlMapTblRecovery:
 	str	w0, [x28, 48]
 	add	x26, x26, :lo12:.LANCHOR2
 	ldr	x0, [x29, 128]
-	add	x19, x0, :lo12:.LANCHOR203
-.L2154:
+	add	x19, x0, :lo12:.LANCHOR211
+.L2210:
 	cmp	w25, w23
-	ble	.L2157
-.L2171:
+	ble	.L2213
+.L2227:
 	mov	x0, x28
 	bl	ftl_free_no_use_map_blk
 	adrp	x0, .LANCHOR53
 	ldrh	w1, [x28, 2]
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L2159
+	bne	.L2215
 	mov	x0, x28
 	bl	ftl_map_blk_alloc_new_blk
-.L2159:
+.L2215:
 	mov	x0, x28
 	bl	ftl_map_blk_gc
 	mov	x0, x28
@@ -15019,7 +15344,7 @@ FtlMapTblRecovery:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L2157:
+.L2213:
 	ldrh	w0, [x21]
 	mov	w2, 1
 	mov	w1, w2
@@ -15028,41 +15353,41 @@ FtlMapTblRecovery:
 	mov	x0, x19
 	bl	FlashReadPages
 	ldrb	w0, [x26]
-	cbz	w0, .L2155
+	cbz	w0, .L2211
 	ldr	x0, [x19, 16]
 	ldr	w0, [x0, 12]
 	str	w0, [x29, 156]
 	uxtw	x0, w0
-	cbz	w0, .L2155
+	cbz	w0, .L2211
 	ldrh	w1, [x27]
 	ldr	x0, [x19, 8]
 	bl	js_hash
 	ldr	w1, [x29, 156]
 	cmp	w1, w0
-	beq	.L2155
+	beq	.L2211
 	mov	w0, -1
 	str	w0, [x19]
-.L2155:
+.L2211:
 	ldr	w0, [x19]
 	cmn	w0, #1
-	beq	.L2156
+	beq	.L2212
 	ldrh	w0, [x20, 8]
 	cmp	w24, w0
-	bls	.L2156
+	bls	.L2212
 	ldrh	w2, [x20]
 	ldrh	w1, [x28, 4]
 	cmp	w2, w1
-	bne	.L2156
+	bne	.L2212
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x19, 4]
 	str	w1, [x22, x0]
-.L2156:
+.L2212:
 	add	w25, w25, 1
 	sxth	w25, w25
-	b	.L2154
-.L2153:
+	b	.L2210
+.L2209:
 	lsl	x26, x26, 1
-	ldr	x0, [x21, #:lo12:.LANCHOR183]
+	ldr	x0, [x21, #:lo12:.LANCHOR189]
 	str	x0, [x27, 8]
 	add	x0, x23, x26
 	ldrh	w1, [x25, #:lo12:.LANCHOR53]
@@ -15077,27 +15402,27 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	w0, [x27]
 	cmn	w0, #1
-	beq	.L2173
+	beq	.L2229
 	ldrh	w1, [x20]
 	ldrh	w0, [x28, 4]
 	cmp	w1, w0
-	bne	.L2173
+	bne	.L2229
 	ldrh	w1, [x20, 8]
 	mov	w0, 64245
 	cmp	w1, w0
-	beq	.L2161
-.L2173:
+	beq	.L2217
+.L2229:
 	adrp	x26, .LANCHOR57
 	add	x26, x26, :lo12:.LANCHOR57
 	adrp	x0, .LANCHOR2
 	mov	w5, 0
 	add	x0, x0, :lo12:.LANCHOR2
 	str	x0, [x29, 120]
-.L2162:
+.L2218:
 	ldr	x0, [x29, 104]
 	ldrh	w0, [x0]
 	cmp	w5, w0
-	bge	.L2169
+	bge	.L2225
 	ldr	x0, [x29, 136]
 	mov	w2, 1
 	str	w5, [x29, 152]
@@ -15110,12 +15435,12 @@ FtlMapTblRecovery:
 	ldr	x0, [x29, 120]
 	ldr	w5, [x29, 152]
 	ldrb	w0, [x0]
-	cbz	w0, .L2166
+	cbz	w0, .L2222
 	ldr	x0, [x27, 16]
 	ldr	w0, [x0, 12]
 	str	w0, [x29, 152]
 	uxtw	x0, w0
-	cbz	w0, .L2166
+	cbz	w0, .L2222
 	ldrh	w1, [x26]
 	ldr	x0, [x27, 8]
 	str	w5, [x29, 112]
@@ -15123,54 +15448,54 @@ FtlMapTblRecovery:
 	ldr	w1, [x29, 152]
 	ldr	w5, [x29, 112]
 	cmp	w1, w0
-	beq	.L2166
+	beq	.L2222
 	mov	w0, -1
 	str	w0, [x27]
-.L2166:
+.L2222:
 	ldr	w0, [x27]
 	cmn	w0, #1
-	beq	.L2167
+	beq	.L2223
 	ldrh	w0, [x20, 8]
 	cmp	w24, w0
-	bls	.L2167
+	bls	.L2223
 	ldrh	w2, [x20]
 	ldrh	w1, [x28, 4]
 	cmp	w2, w1
-	bne	.L2167
+	bne	.L2223
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x27, 4]
 	str	w1, [x22, x0]
-.L2167:
+.L2223:
 	add	w5, w5, 1
 	sxth	w5, w5
-	b	.L2162
-.L2161:
+	b	.L2218
+.L2217:
 	ldrh	w5, [x25, #:lo12:.LANCHOR53]
 	mov	w0, 0
-	ldr	x6, [x21, #:lo12:.LANCHOR183]
+	ldr	x6, [x21, #:lo12:.LANCHOR189]
 	sub	w5, w5, #1
-.L2163:
+.L2219:
 	cmp	w0, w5
-	blt	.L2165
-.L2169:
+	blt	.L2221
+.L2225:
 	add	w19, w19, 1
 	sxth	w19, w19
-	b	.L2152
-.L2165:
+	b	.L2208
+.L2221:
 	lsl	w2, w0, 1
 	sxtw	x2, w2
 	lsl	x1, x2, 2
 	ldrh	w1, [x6, x1]
 	cmp	w24, w1
-	bls	.L2164
+	bls	.L2220
 	add	x2, x2, 1
 	ubfiz	x1, x1, 2, 16
 	ldr	w2, [x6, x2, lsl 2]
 	str	w2, [x22, x1]
-.L2164:
+.L2220:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L2163
+	b	.L2219
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
 	.section	.text.FtlLoadVonderInfo,"ax",@progbits
 	.align	2
@@ -15179,8 +15504,8 @@ FtlMapTblRecovery:
 FtlLoadVonderInfo:
 	stp	x29, x30, [sp, -16]!
 	adrp	x1, .LANCHOR61
-	adrp	x0, .LANCHOR216
-	add	x0, x0, :lo12:.LANCHOR216
+	adrp	x0, .LANCHOR224
+	add	x0, x0, :lo12:.LANCHOR224
 	add	x29, sp, 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR61]
 	strh	w1, [x0, 10]
@@ -15195,14 +15520,14 @@ FtlLoadVonderInfo:
 	adrp	x1, .LANCHOR71
 	ldr	x1, [x1, #:lo12:.LANCHOR71]
 	str	x1, [x0, 16]
-	adrp	x1, .LANCHOR193
-	ldr	x1, [x1, #:lo12:.LANCHOR193]
+	adrp	x1, .LANCHOR201
+	ldr	x1, [x1, #:lo12:.LANCHOR201]
 	str	x1, [x0, 24]
-	adrp	x1, .LANCHOR192
-	ldr	x1, [x1, #:lo12:.LANCHOR192]
+	adrp	x1, .LANCHOR200
+	ldr	x1, [x1, #:lo12:.LANCHOR200]
 	str	x1, [x0, 32]
-	adrp	x1, .LANCHOR194
-	ldr	x1, [x1, #:lo12:.LANCHOR194]
+	adrp	x1, .LANCHOR202
+	ldr	x1, [x1, #:lo12:.LANCHOR202]
 	str	x1, [x0, 40]
 	bl	FtlMapTblRecovery
 	mov	w0, 0
@@ -15217,8 +15542,8 @@ FtlLoadMapInfo:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	FtlL2PDataInit
-	adrp	x0, .LANCHOR127
-	add	x0, x0, :lo12:.LANCHOR127
+	adrp	x0, .LANCHOR130
+	add	x0, x0, :lo12:.LANCHOR130
 	bl	FtlMapTblRecovery
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
@@ -15229,74 +15554,115 @@ FtlLoadMapInfo:
 	.global	ftl_scan_all_ppa
 	.type	ftl_scan_all_ppa, %function
 ftl_scan_all_ppa:
-	sub	sp, sp, #96
-	adrp	x0, .LC53
-	add	x0, x0, :lo12:.LC53
+	sub	sp, sp, #112
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x21, x22, [sp, 48]
-	adrp	x22, .LANCHOR52
-	adrp	x21, .LANCHOR51
-	stp	x23, x24, [sp, 64]
-	ldrh	w2, [x22, #:lo12:.LANCHOR52]
-	adrp	x24, .LC54
-	ldrh	w1, [x21, #:lo12:.LANCHOR51]
-	add	x24, x24, :lo12:.LC54
+	adrp	x22, .LANCHOR51
 	stp	x19, x20, [sp, 32]
-	adrp	x19, .LANCHOR203
-	add	x19, x19, :lo12:.LANCHOR203
-	mov	w23, 0
+	adrp	x20, .LANCHOR211
+	ldrh	w19, [x22, #:lo12:.LANCHOR51]
+	add	x20, x20, :lo12:.LANCHOR211
 	stp	x25, x26, [sp, 80]
+	adrp	x26, .LANCHOR16
+	sub	w19, w19, #16
+	add	x26, x26, :lo12:.LANCHOR16
+	lsl	w25, w19, 10
+	stp	x23, x24, [sp, 64]
+	str	x27, [sp, 96]
+.L2254:
+	ldrh	w0, [x22, #:lo12:.LANCHOR51]
+	cmp	w19, w0
+	blt	.L2262
+	ldp	x19, x20, [sp, 32]
+	adrp	x1, .LANCHOR235
+	ldp	x21, x22, [sp, 48]
+	add	x1, x1, :lo12:.LANCHOR235
+	ldp	x23, x24, [sp, 64]
+	adrp	x0, .LC58
+	ldp	x25, x26, [sp, 80]
+	add	x0, x0, :lo12:.LC58
+	ldp	x29, x30, [sp, 16]
+	ldr	x27, [sp, 96]
+	add	sp, sp, 112
+	b	printf
+.L2262:
+	and	w24, w19, 65535
+	mov	w0, w24
+	bl	ftl_get_blk_mode
+	ldrb	w1, [x26]
+	cbz	w1, .L2255
+	adrp	x1, .LANCHOR40
+	ldrh	w1, [x1, #:lo12:.LANCHOR40]
+	cmp	w19, w1
+	bge	.L2256
+	adrp	x1, .LANCHOR59
+	ldrh	w1, [x1, #:lo12:.LANCHOR59]
+	cmp	w19, w1
+	blt	.L2256
+.L2255:
+	cmp	w0, 1
+	bne	.L2257
+.L2256:
+	adrp	x0, .LANCHOR53
+	mov	w21, -2147483648
+	ldrh	w23, [x0, #:lo12:.LANCHOR53]
+.L2258:
+	mov	w3, w21
+	mov	w2, w23
+	mov	w1, w19
+	adrp	x0, .LC55
+	add	x0, x0, :lo12:.LC55
 	bl	printf
-.L2198:
-	ldrh	w0, [x21, #:lo12:.LANCHOR51]
-	cmp	w23, w0
-	bcs	.L2200
-	lsl	w26, w23, 10
-	mov	w20, 0
-	add	x25, x22, :lo12:.LANCHOR52
-	b	.L2201
-.L2199:
-	add	w0, w20, w26
-	stp	wzr, w0, [x19]
-	adrp	x0, .LANCHOR183
+	mov	w0, w24
+	bl	FtlBbmIsBadBlock
+	cbz	w0, .L2259
+	adrp	x0, .LC56
+	mov	w3, w21
+	mov	w2, w23
+	mov	w1, w19
+	add	x0, x0, :lo12:.LC56
+	bl	printf
+.L2259:
+	adrp	x27, .LC57
+	add	w21, w21, w25
+	add	x27, x27, :lo12:.LC57
+	mov	w24, 0
+.L2260:
+	cmp	w24, w23
+	bne	.L2261
+	add	w19, w19, 1
+	add	w25, w25, 1024
+	b	.L2254
+.L2257:
+	adrp	x0, .LANCHOR52
+	mov	w21, 0
+	ldrh	w23, [x0, #:lo12:.LANCHOR52]
+	b	.L2258
+.L2261:
+	add	w0, w21, w24
+	stp	wzr, w0, [x20]
+	adrp	x0, .LANCHOR189
 	mov	w2, 0
 	mov	w1, 1
-	add	w20, w20, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR183]
-	str	x0, [x19, 8]
-	adrp	x0, .LANCHOR188
-	ldr	x0, [x0, #:lo12:.LANCHOR188]
-	str	x0, [x19, 16]
-	mov	x0, x19
+	add	w24, w24, 1
+	ldr	x0, [x0, #:lo12:.LANCHOR189]
+	str	x0, [x20, 8]
+	adrp	x0, .LANCHOR195
+	ldr	x0, [x0, #:lo12:.LANCHOR195]
+	str	x0, [x20, 16]
+	mov	x0, x20
 	bl	FlashReadPages
-	ldp	x1, x0, [x19, 8]
+	ldp	x1, x0, [x20, 8]
 	ldr	w2, [x1, 4]
 	str	w2, [sp]
 	ldp	w3, w4, [x0]
 	ldp	w5, w6, [x0, 8]
-	mov	x0, x24
+	mov	x0, x27
 	ldr	w7, [x1]
-	ldp	w2, w1, [x19]
+	ldp	w2, w1, [x20]
 	bl	printf
-.L2201:
-	ldrh	w0, [x25]
-	cmp	w20, w0
-	bcc	.L2199
-	add	w23, w23, 1
-	b	.L2198
-.L2200:
-	ldp	x19, x20, [sp, 32]
-	adrp	x1, .LANCHOR227
-	ldp	x21, x22, [sp, 48]
-	add	x1, x1, :lo12:.LANCHOR227
-	ldp	x23, x24, [sp, 64]
-	adrp	x0, .LC55
-	ldp	x25, x26, [sp, 80]
-	add	x0, x0, :lo12:.LC55
-	ldp	x29, x30, [sp, 16]
-	add	sp, sp, 96
-	b	printf
+	b	.L2260
 	.size	ftl_scan_all_ppa, .-ftl_scan_all_ppa
 	.section	.text.FlashReadFacBbtData,"ax",@progbits
 	.align	2
@@ -15307,12 +15673,12 @@ FlashReadFacBbtData:
 	add	x29, sp, 0
 	stp	x25, x26, [sp, 64]
 	mov	w25, w1
-	adrp	x1, .LANCHOR14
-	add	x1, x1, :lo12:.LANCHOR14
+	adrp	x1, .LANCHOR15
+	add	x1, x1, :lo12:.LANCHOR15
 	stp	x23, x24, [sp, 48]
 	mov	x23, x0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR147
+	adrp	x21, .LANCHOR154
 	ldrh	w0, [x1, 14]
 	mov	w24, w2
 	ldrh	w1, [x1, 12]
@@ -15320,22 +15686,22 @@ FlashReadFacBbtData:
 	str	x27, [sp, 80]
 	mov	w27, 61664
 	mul	w0, w0, w1
-	ldr	x1, [x21, #:lo12:.LANCHOR147]
+	ldr	x1, [x21, #:lo12:.LANCHOR154]
 	str	x1, [x29, 112]
 	and	w0, w0, 65535
-	adrp	x1, .LANCHOR197
+	adrp	x1, .LANCHOR205
 	sub	w20, w0, #1
 	sub	w19, w0, #15
-	ldr	x2, [x1, #:lo12:.LANCHOR197]
+	ldr	x2, [x1, #:lo12:.LANCHOR205]
 	and	w20, w20, 65535
 	mul	w26, w0, w25
 	mov	x22, x1
 	str	x2, [x29, 120]
-.L2204:
+.L2271:
 	cmp	w19, w20
-	ble	.L2211
+	ble	.L2278
 	mov	w0, -1
-.L2203:
+.L2270:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -15343,7 +15709,7 @@ FlashReadFacBbtData:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L2211:
+.L2278:
 	add	w0, w20, w26
 	mov	w2, 1
 	lsl	w0, w0, 10
@@ -15353,37 +15719,37 @@ FlashReadFacBbtData:
 	bl	FlashReadPages
 	ldr	w0, [x29, 104]
 	cmn	w0, #1
-	beq	.L2205
-	ldr	x0, [x22, #:lo12:.LANCHOR197]
+	beq	.L2272
+	ldr	x0, [x22, #:lo12:.LANCHOR205]
 	ldrh	w0, [x0]
 	cmp	w0, w27
-	bne	.L2205
-	cbz	x23, .L2212
-	cbz	w25, .L2207
-.L2210:
-	ldr	x1, [x21, #:lo12:.LANCHOR147]
+	bne	.L2272
+	cbz	x23, .L2279
+	cbz	w25, .L2274
+.L2277:
+	ldr	x1, [x21, #:lo12:.LANCHOR154]
 	mov	w2, w24
 	mov	x0, x23
 	bl	ftl_memcpy
 	mov	w3, 4
-	adrp	x0, .LC56
+	adrp	x0, .LC59
 	mov	w2, w3
 	mov	x1, x23
-	add	x0, x0, :lo12:.LC56
+	add	x0, x0, :lo12:.LC59
 	bl	rknand_print_hex
-.L2212:
+.L2279:
 	mov	w0, 0
-	b	.L2203
-.L2207:
-	ldr	x5, [x21, #:lo12:.LANCHOR147]
-	adrp	x2, .LANCHOR149
-	add	x2, x2, :lo12:.LANCHOR149
+	b	.L2270
+.L2274:
+	ldr	x5, [x21, #:lo12:.LANCHOR154]
+	adrp	x2, .LANCHOR156
+	add	x2, x2, :lo12:.LANCHOR156
 	mov	w0, 0
 	mov	w6, 1
-.L2208:
+.L2275:
 	ldr	w1, [x2]
 	cmp	w0, w1
-	bcs	.L2210
+	bcs	.L2277
 	ubfx	x1, x0, 5, 11
 	and	w3, w0, 31
 	lsl	x1, x1, 2
@@ -15393,11 +15759,11 @@ FlashReadFacBbtData:
 	ldr	w3, [x5, x1]
 	orr	w3, w3, w4
 	str	w3, [x5, x1]
-	b	.L2208
-.L2205:
+	b	.L2275
+.L2272:
 	sub	w20, w20, #1
 	and	w20, w20, 65535
-	b	.L2204
+	b	.L2271
 	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
 	.section	.text.FlashGetBadBlockList,"ax",@progbits
 	.align	2
@@ -15408,23 +15774,23 @@ FlashGetBadBlockList:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x20, x0
-	adrp	x0, .LANCHOR18
-	ldr	x0, [x0, #:lo12:.LANCHOR18]
+	adrp	x0, .LANCHOR7
+	ldr	x0, [x0, #:lo12:.LANCHOR7]
 	ldrh	w19, [x0, 14]
 	str	x21, [sp, 32]
-	adrp	x21, .LANCHOR153
+	adrp	x21, .LANCHOR152
 	ldrb	w2, [x0, 13]
-	ldr	x0, [x21, #:lo12:.LANCHOR153]
+	ldr	x0, [x21, #:lo12:.LANCHOR152]
 	mul	w19, w19, w2
 	and	w19, w19, 65535
 	add	w2, w19, 7
 	lsr	w2, w2, 3
 	bl	FlashReadFacBbtData
 	cmn	w0, #1
-	bne	.L2218
-.L2222:
+	bne	.L2285
+.L2289:
 	mov	w0, 0
-.L2219:
+.L2286:
 	ubfiz	x0, x0, 1, 16
 	mov	w1, -1
 	ldr	x21, [sp, 32]
@@ -15433,32 +15799,32 @@ FlashGetBadBlockList:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L2218:
-	ldr	x4, [x21, #:lo12:.LANCHOR153]
+.L2285:
+	ldr	x4, [x21, #:lo12:.LANCHOR152]
 	lsr	w5, w19, 4
 	sub	w19, w19, #1
 	mov	w1, 0
 	mov	w0, 0
 	mov	w6, 1
-.L2220:
+.L2287:
 	cmp	w1, w19
-	bge	.L2219
+	bge	.L2286
 	ubfx	x3, x1, 5, 11
 	and	w2, w1, 31
 	lsl	w2, w6, w2
 	ldr	w3, [x4, x3, lsl 2]
 	tst	w2, w3
-	beq	.L2221
+	beq	.L2288
 	add	w2, w0, 1
 	ubfiz	x0, x0, 1, 16
 	strh	w1, [x20, x0]
 	and	w0, w2, 65535
-.L2221:
+.L2288:
 	cmp	w0, w5
-	bcs	.L2222
+	bcs	.L2289
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L2220
+	b	.L2287
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
 	.section	.text.FtlMakeBbt,"ax",@progbits
 	.align	2
@@ -15466,74 +15832,74 @@ FlashGetBadBlockList:
 	.type	FtlMakeBbt, %function
 FtlMakeBbt:
 	stp	x29, x30, [sp, -128]!
-	adrp	x0, .LANCHOR76
+	adrp	x0, .LANCHOR78
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	ldr	w21, [x0, #:lo12:.LANCHOR76]
+	ldr	w21, [x0, #:lo12:.LANCHOR78]
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w21, .L2229
-	adrp	x20, .LANCHOR74
-	add	x22, x20, :lo12:.LANCHOR74
+	cbnz	w21, .L2296
+	adrp	x20, .LANCHOR76
+	add	x22, x20, :lo12:.LANCHOR76
 	bl	FtlBbtMemInit
 	add	x24, x22, 32
 	bl	FtlLoadFactoryBbt
-	adrp	x28, .LANCHOR203
+	adrp	x28, .LANCHOR211
 	add	x22, x22, 12
-	add	x25, x28, :lo12:.LANCHOR203
+	add	x25, x28, :lo12:.LANCHOR211
 	adrp	x0, .LANCHOR45
 	add	x0, x0, :lo12:.LANCHOR45
 	str	x0, [x29, 120]
-.L2230:
+.L2297:
 	ldr	x0, [x29, 120]
 	ldrh	w0, [x0]
 	cmp	w21, w0
-	bcc	.L2236
+	bcc	.L2303
 	adrp	x21, .LANCHOR59
 	add	x21, x21, :lo12:.LANCHOR59
 	mov	w19, 0
-.L2237:
+.L2304:
 	ldrh	w0, [x21]
 	cmp	w0, w19
-	bhi	.L2238
-	add	x21, x20, :lo12:.LANCHOR74
+	bhi	.L2305
+	add	x21, x20, :lo12:.LANCHOR76
 	mov	w22, 65535
 	ldrh	w19, [x21, 12]
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L2239:
+.L2306:
 	ldrh	w0, [x21, 12]
 	sub	w0, w0, #47
 	cmp	w0, w19
-	bgt	.L2243
+	bgt	.L2310
 	mov	w0, w19
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L2240
+	beq	.L2307
 	mov	w0, w19
 	bl	FlashTestBlk
-	cbz	w0, .L2241
+	cbz	w0, .L2308
 	mov	w0, w19
 	bl	FtlBbmMapBadBlock
-.L2240:
+.L2307:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L2239
-.L2236:
-	adrp	x2, .LANCHOR188
-	adrp	x0, .LANCHOR183
-	add	x19, x28, :lo12:.LANCHOR203
+	b	.L2306
+.L2303:
+	adrp	x2, .LANCHOR195
+	adrp	x0, .LANCHOR189
+	add	x19, x28, :lo12:.LANCHOR211
 	ldrh	w1, [x22]
-	ldr	x0, [x0, #:lo12:.LANCHOR183]
+	ldr	x0, [x0, #:lo12:.LANCHOR189]
 	mov	w3, 65535
-	ldr	x26, [x2, #:lo12:.LANCHOR188]
+	ldr	x26, [x2, #:lo12:.LANCHOR195]
 	cmp	w1, w3
 	stp	x0, x26, [x19, 8]
 	adrp	x23, .LANCHOR51
 	str	x2, [x29, 112]
-	beq	.L2231
+	beq	.L2298
 	ldrh	w4, [x23, #:lo12:.LANCHOR51]
 	mov	w2, 1
 	madd	w27, w4, w21, w1
@@ -15548,37 +15914,37 @@ FtlMakeBbt:
 	add	w2, w2, 7
 	lsr	w2, w2, 3
 	bl	ftl_memcpy
-.L2232:
+.L2299:
 	mov	w0, w27
 	add	w21, w21, 1
 	bl	FtlBbmMapBadBlock
 	add	x24, x24, 8
 	add	x22, x22, 2
-	b	.L2230
-.L2231:
+	b	.L2297
+.L2298:
 	mov	w1, w21
 	bl	FlashGetBadBlockList
 	ldr	x0, [x19, 8]
-	adrp	x27, .LANCHOR123
+	adrp	x27, .LANCHOR126
 	ldr	x1, [x24]
 	bl	FtlBbt2Bitmap
 	ldrh	w19, [x23, #:lo12:.LANCHOR51]
 	add	x23, x23, :lo12:.LANCHOR51
-	add	x0, x27, :lo12:.LANCHOR123
+	add	x0, x27, :lo12:.LANCHOR126
 	sub	w19, w19, #1
 	str	x0, [x29, 104]
 	and	w19, w19, 65535
-.L2233:
+.L2300:
 	ldrh	w0, [x23]
 	madd	w0, w21, w0, w19
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L2234
+	beq	.L2301
 	ldr	x0, [x29, 112]
 	mov	w2, 16
 	strh	w19, [x22]
 	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR188]
+	ldr	x0, [x0, #:lo12:.LANCHOR195]
 	bl	ftl_memset
 	mov	w0, -3872
 	strh	w0, [x26]
@@ -15606,34 +15972,34 @@ FtlMakeBbt:
 	bl	FlashProgPages
 	ldr	w0, [x25]
 	cmn	w0, #1
-	bne	.L2232
+	bne	.L2299
 	mov	w0, w27
 	bl	FtlBbmMapBadBlock
-	b	.L2233
-.L2234:
+	b	.L2300
+.L2301:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L2233
-.L2238:
+	b	.L2300
+.L2305:
 	mov	w0, w19
 	add	w19, w19, 1
 	bl	FtlBbmMapBadBlock
 	and	w19, w19, 65535
-	b	.L2237
-.L2241:
+	b	.L2304
+.L2308:
 	ldrh	w0, [x21]
 	cmp	w0, w22
-	bne	.L2242
+	bne	.L2309
 	strh	w19, [x21]
-	b	.L2240
-.L2242:
+	b	.L2307
+.L2309:
 	strh	w19, [x21, 4]
-.L2243:
-	adrp	x0, .LANCHOR77
-	add	x19, x20, :lo12:.LANCHOR74
-	ldrh	w1, [x20, #:lo12:.LANCHOR74]
+.L2310:
+	adrp	x0, .LANCHOR79
+	add	x19, x20, :lo12:.LANCHOR76
+	ldrh	w1, [x20, #:lo12:.LANCHOR76]
 	mov	w2, 2
-	ldr	x0, [x0, #:lo12:.LANCHOR77]
+	ldr	x0, [x0, #:lo12:.LANCHOR79]
 	str	wzr, [x19, 8]
 	lsl	w1, w1, 10
 	strh	wzr, [x19, 2]
@@ -15643,7 +16009,7 @@ FtlMakeBbt:
 	str	w1, [x0, 60]
 	mov	w1, 1
 	bl	FlashEraseBlocks
-	ldrh	w0, [x20, #:lo12:.LANCHOR74]
+	ldrh	w0, [x20, #:lo12:.LANCHOR76]
 	bl	FtlBbmMapBadBlock
 	ldrh	w0, [x19, 4]
 	bl	FtlBbmMapBadBlock
@@ -15653,11 +16019,11 @@ FtlMakeBbt:
 	ldrh	w1, [x19, 4]
 	add	w0, w0, 1
 	str	w0, [x19, 8]
-	ldrh	w0, [x20, #:lo12:.LANCHOR74]
+	ldrh	w0, [x20, #:lo12:.LANCHOR76]
 	strh	w0, [x19, 4]
-	strh	w1, [x20, #:lo12:.LANCHOR74]
+	strh	w1, [x20, #:lo12:.LANCHOR76]
 	bl	FtlBbmTblFlush
-.L2229:
+.L2296:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -15681,18 +16047,18 @@ log2phys:
 	stp	x19, x20, [sp, 16]
 	mov	x26, x1
 	ldrh	w24, [x0, #:lo12:.LANCHOR56]
-	adrp	x0, .LANCHOR72
+	adrp	x0, .LANCHOR74
 	stp	x21, x22, [sp, 32]
 	mov	x19, x0
-	ldr	w1, [x0, #:lo12:.LANCHOR72]
+	ldr	w1, [x0, #:lo12:.LANCHOR74]
 	stp	x27, x28, [sp, 80]
 	str	w2, [x29, 116]
 	cmp	w25, w1
-	bcc	.L2250
-	mov	w2, 884
-	adrp	x1, .LANCHOR228
+	bcc	.L2317
+	mov	w2, 1004
+	adrp	x1, .LANCHOR236
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR228
+	add	x1, x1, :lo12:.LANCHOR236
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -15700,44 +16066,44 @@ log2phys:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2250:
-	ldr	w0, [x19, #:lo12:.LANCHOR72]
+.L2317:
+	ldr	w0, [x19, #:lo12:.LANCHOR74]
 	cmp	w25, w0
-	bcs	.L2251
-	adrp	x19, .LANCHOR96
+	bcs	.L2318
+	adrp	x19, .LANCHOR98
 	add	w24, w24, 7
 	adrp	x0, .LANCHOR67
-	ldr	x2, [x19, #:lo12:.LANCHOR96]
+	ldr	x2, [x19, #:lo12:.LANCHOR98]
 	lsr	w23, w25, w24
 	and	w22, w23, 65535
 	ldrh	w1, [x0, #:lo12:.LANCHOR67]
 	mov	x0, 0
-.L2252:
+.L2319:
 	and	x20, x0, 65535
 	cmp	w20, w1
-	bcc	.L2257
+	bcc	.L2324
 	bl	select_l2p_ram_region
 	and	x20, x0, 65535
-	ldr	x1, [x19, #:lo12:.LANCHOR96]
+	ldr	x1, [x19, #:lo12:.LANCHOR98]
 	ubfiz	x21, x20, 4, 16
 	add	x2, x1, x21
 	ldrh	w3, [x1, x21]
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L2258
+	beq	.L2325
 	ldr	w1, [x2, 4]
-	tbz	w1, #31, .L2258
+	tbz	w1, #31, .L2325
 	bl	flush_l2p_region
-.L2258:
+.L2325:
 	adrp	x0, .LANCHOR66
 	str	x0, [x29, 104]
 	ldrh	w1, [x0, #:lo12:.LANCHOR66]
 	cmp	w1, w22
-	bcs	.L2259
-	mov	w2, 526
-	adrp	x1, .LANCHOR229
+	bcs	.L2326
+	mov	w2, 597
+	adrp	x1, .LANCHOR237
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR229
+	add	x1, x1, :lo12:.LANCHOR237
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -15745,30 +16111,30 @@ log2phys:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2259:
-	adrp	x27, .LANCHOR131
+.L2326:
+	adrp	x27, .LANCHOR134
 	ubfiz	x0, x22, 2, 16
-	ldr	x1, [x27, #:lo12:.LANCHOR131]
+	ldr	x1, [x27, #:lo12:.LANCHOR134]
 	ldr	w3, [x1, x0]
-	cbnz	w3, .L2260
-	ldr	x0, [x19, #:lo12:.LANCHOR96]
+	cbnz	w3, .L2327
+	ldr	x0, [x19, #:lo12:.LANCHOR98]
 	adrp	x1, .LANCHOR57
 	add	x0, x0, x21
 	ldrh	w2, [x1, #:lo12:.LANCHOR57]
 	mov	w1, 255
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR96]
+	ldr	x0, [x19, #:lo12:.LANCHOR98]
 	add	x1, x0, x21
 	strh	w22, [x0, x21]
 	str	wzr, [x1, 4]
-	b	.L2254
-.L2251:
+	b	.L2321
+.L2318:
 	ldr	w1, [x29, 116]
 	mov	w0, -1
-	cbnz	w1, .L2249
+	cbnz	w1, .L2316
 	str	w0, [x26]
-.L2249:
+.L2316:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -15776,38 +16142,38 @@ log2phys:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2257:
+.L2324:
 	add	x0, x0, 1
 	add	x3, x2, x0, lsl 4
 	ldrh	w3, [x3, -16]
 	cmp	w3, w22
-	bne	.L2252
-.L2254:
+	bne	.L2319
+.L2321:
 	mov	x0, 1
 	lsl	x24, x0, x24
 	ldr	w0, [x29, 116]
 	sub	w24, w24, #1
 	and	w25, w24, w25
 	and	x25, x25, 65535
-	cbnz	w0, .L2255
-	ldr	x0, [x19, #:lo12:.LANCHOR96]
+	cbnz	w0, .L2322
+	ldr	x0, [x19, #:lo12:.LANCHOR98]
 	add	x0, x0, x20, lsl 4
 	ldr	x0, [x0, 8]
 	ldr	w0, [x0, x25, lsl 2]
 	str	w0, [x26]
-.L2256:
-	ldr	x0, [x19, #:lo12:.LANCHOR96]
+.L2323:
+	ldr	x0, [x19, #:lo12:.LANCHOR98]
 	add	x20, x0, x20, lsl 4
 	ldr	w0, [x20, 4]
 	cmn	w0, #1
-	beq	.L2265
+	beq	.L2332
 	add	w0, w0, 1
 	str	w0, [x20, 4]
-.L2265:
+.L2332:
 	mov	w0, 0
-	b	.L2249
-.L2255:
-	ldr	x0, [x19, #:lo12:.LANCHOR96]
+	b	.L2316
+.L2322:
+	ldr	x0, [x19, #:lo12:.LANCHOR98]
 	ldr	w2, [x26]
 	add	x0, x0, x20, lsl 4
 	ldr	x1, [x0, 8]
@@ -15815,13 +16181,13 @@ log2phys:
 	ldr	w1, [x0, 4]
 	orr	w1, w1, -2147483648
 	str	w1, [x0, 4]
-	adrp	x0, .LANCHOR97
-	strh	w22, [x0, #:lo12:.LANCHOR97]
-	b	.L2256
-.L2260:
-	ldr	x0, [x19, #:lo12:.LANCHOR96]
-	adrp	x5, .LANCHOR203
-	add	x28, x5, :lo12:.LANCHOR203
+	adrp	x0, .LANCHOR99
+	strh	w22, [x0, #:lo12:.LANCHOR99]
+	b	.L2323
+.L2327:
+	ldr	x0, [x19, #:lo12:.LANCHOR98]
+	adrp	x5, .LANCHOR211
+	add	x28, x5, :lo12:.LANCHOR211
 	mov	w2, 1
 	add	x0, x0, x21
 	str	x5, [x29, 96]
@@ -15830,8 +16196,8 @@ log2phys:
 	str	w3, [x28, 4]
 	ldr	x0, [x0, 8]
 	str	x0, [x28, 8]
-	adrp	x0, .LANCHOR188
-	ldr	x0, [x0, #:lo12:.LANCHOR188]
+	adrp	x0, .LANCHOR195
+	ldr	x0, [x0, #:lo12:.LANCHOR195]
 	str	x0, [x28, 16]
 	mov	x0, x28
 	bl	FlashReadPages
@@ -15841,37 +16207,37 @@ log2phys:
 	ldr	x5, [x29, 96]
 	ldrh	w0, [x0, 8]
 	cmp	w0, w22
-	beq	.L2261
+	beq	.L2328
 	mov	w2, w3
 	and	w1, w23, 65535
-	adrp	x0, .LC57
-	add	x0, x0, :lo12:.LC57
+	adrp	x0, .LC60
+	add	x0, x0, :lo12:.LC60
 	bl	printf
 	ldr	x1, [x28, 16]
 	mov	w3, 4
-	adrp	x0, .LC27
+	adrp	x0, .LC28
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC27
+	add	x0, x0, :lo12:.LC28
 	bl	rknand_print_hex
 	ldr	x0, [x29, 104]
 	mov	w2, 4
-	ldr	x1, [x27, #:lo12:.LANCHOR131]
+	ldr	x1, [x27, #:lo12:.LANCHOR134]
 	ldrh	w3, [x0, #:lo12:.LANCHOR66]
-	adrp	x0, .LC58
-	add	x0, x0, :lo12:.LC58
+	adrp	x0, .LC61
+	add	x0, x0, :lo12:.LC61
 	bl	rknand_print_hex
-	adrp	x0, .LANCHOR76
+	adrp	x0, .LANCHOR78
 	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR76]
-.L2262:
+	str	w1, [x0, #:lo12:.LANCHOR78]
+.L2329:
 	ldr	x0, [x29, 120]
 	ldrh	w0, [x0, 8]
 	cmp	w0, w22
-	beq	.L2263
-	mov	w2, 552
-	adrp	x1, .LANCHOR229
+	beq	.L2330
+	mov	w2, 624
+	adrp	x1, .LANCHOR237
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR229
+	add	x1, x1, :lo12:.LANCHOR237
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -15879,177 +16245,105 @@ log2phys:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2263:
-	ldr	x0, [x19, #:lo12:.LANCHOR96]
+.L2330:
+	ldr	x0, [x19, #:lo12:.LANCHOR98]
 	add	x1, x0, x21
 	str	wzr, [x1, 4]
 	strh	w22, [x0, x21]
-	b	.L2254
-.L2261:
-	ldr	w0, [x5, #:lo12:.LANCHOR203]
+	b	.L2321
+.L2328:
+	ldr	w0, [x5, #:lo12:.LANCHOR211]
 	cmp	w0, 256
-	bne	.L2262
+	bne	.L2329
 	and	w23, w23, 65535
 	mov	w2, w3
 	mov	w1, w23
-	adrp	x0, .LC59
-	add	x0, x0, :lo12:.LC59
+	adrp	x0, .LC62
+	add	x0, x0, :lo12:.LC62
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR96]
+	ldr	x0, [x19, #:lo12:.LANCHOR98]
 	mov	w1, w23
 	add	x0, x0, x21
 	ldr	x2, [x0, 8]
-	adrp	x0, .LANCHOR127
-	add	x0, x0, :lo12:.LANCHOR127
+	adrp	x0, .LANCHOR130
+	add	x0, x0, :lo12:.LANCHOR130
 	bl	FtlMapWritePage
-	b	.L2262
+	b	.L2329
 	.size	log2phys, .-log2phys
-	.section	.text.FtlProgPages,"ax",@progbits
+	.section	.text.FtlCheckVpc,"ax",@progbits
 	.align	2
-	.global	FtlProgPages
-	.type	FtlProgPages, %function
-FtlProgPages:
-	stp	x29, x30, [sp, -96]!
+	.global	FtlCheckVpc
+	.type	FtlCheckVpc, %function
+FtlCheckVpc:
+	stp	x29, x30, [sp, -112]!
+	adrp	x0, .LC48
+	add	x0, x0, :lo12:.LC48
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR76
-	stp	x19, x20, [sp, 16]
-	ldr	w2, [x23, #:lo12:.LANCHOR76]
+	adrp	x23, .LANCHOR74
+	add	x23, x23, :lo12:.LANCHOR74
 	stp	x21, x22, [sp, 32]
-	stp	x25, x26, [sp, 64]
-	cbnz	w2, .L2268
-	adrp	x2, .LANCHOR15
-	ldrb	w2, [x2, #:lo12:.LANCHOR15]
-	cbz	w2, .L2283
-	ldrb	w2, [x3, 8]
-	cmp	w2, 1
-	cset	w22, eq
-.L2270:
-	mov	x20, x3
-	ldrb	w3, [x3, 9]
-	mov	w21, w1
-	mov	x19, x0
-	mov	w2, w22
-	adrp	x25, .LANCHOR52
-	adrp	x24, .LANCHOR138
-	add	x25, x25, :lo12:.LANCHOR52
-	bl	FlashProgPages
-	add	x24, x24, :lo12:.LANCHOR138
-	mov	w1, 56
-	umaddl	x21, w21, w1, x19
-.L2271:
-	cmp	x19, x21
-	beq	.L2280
-	adrp	x26, .LANCHOR83
-	b	.L2281
-.L2283:
 	mov	w22, 0
-	b	.L2270
-.L2274:
-	ldr	w0, [x19, 4]
-	lsr	w0, w0, 10
-	bl	P2V_block_in_plane
-	ldrh	w1, [x20]
-	cmp	w1, w0, uxth
-	bne	.L2272
-	ldr	x2, [x26, #:lo12:.LANCHOR83]
-	ubfiz	x1, x1, 1, 16
-	ldrh	w3, [x20, 4]
-	ldrh	w0, [x2, x1]
-	sub	w0, w0, w3
-	strh	w0, [x2, x1]
-	strb	wzr, [x20, 6]
-	ldrh	w0, [x25]
-	strh	w0, [x20, 2]
-	strh	wzr, [x20, 4]
-.L2272:
-	ldrh	w0, [x20, 4]
-	cbnz	w0, .L2273
-	mov	x0, x20
-	bl	allocate_new_data_superblock
-.L2273:
-	ldr	w0, [x24, 96]
-	add	w0, w0, 1
-	str	w0, [x24, 96]
-	ldr	w0, [x19, 4]
-	lsr	w0, w0, 10
-	bl	FtlGcMarkBadPhyBlk
-	mov	x0, x20
-	bl	get_new_active_ppa
-	str	w0, [x19, 4]
-	mov	w2, w22
-	str	w0, [x29, 92]
-	mov	w1, 1
-	ldrb	w3, [x20, 9]
-	mov	x0, x19
-	bl	FlashProgPages
-	ldr	w0, [x23, #:lo12:.LANCHOR76]
-	cbnz	w0, .L2268
-.L2281:
-	ldr	w0, [x19]
-	cmn	w0, #1
-	beq	.L2274
-	adrp	x0, .LANCHOR38
-	ldrb	w1, [x20, 6]
-	ldrh	w0, [x0, #:lo12:.LANCHOR38]
-	cmp	w1, w0
-	bcc	.L2275
-	mov	w2, 1588
-	adrp	x1, .LANCHOR230
-	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR230
-	add	x0, x0, :lo12:.LC5
-	bl	printf
-	adrp	x1, .LC6
-	adrp	x0, .LC7
-	add	x1, x1, :lo12:.LC6
-	add	x0, x0, :lo12:.LC7
+	stp	x19, x20, [sp, 16]
+	stp	x25, x26, [sp, 64]
+	adrp	x21, .LANCHOR238
+	stp	x27, x28, [sp, 80]
+	add	x1, x21, :lo12:.LANCHOR238
+	adrp	x20, check_valid_page_count_table
 	bl	printf
-.L2275:
-	ldr	w0, [x19, 4]
-	cbnz	w22, .L2276
-.L2288:
-	str	w0, [x29, 92]
-	add	x1, x29, 92
-	ldr	w0, [x19, 24]
-	mov	w2, 1
-	bl	log2phys
-	ldr	x0, [x19, 16]
-	ldr	w3, [x0, 12]
-	lsr	w0, w3, 10
-	bl	P2V_block_in_plane
-	and	w1, w0, 65535
-	mov	w26, w1
-	cmn	w3, #1
-	beq	.L2278
-	adrp	x2, .LANCHOR83
-	ubfiz	x0, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR83]
-	ldrh	w0, [x2, x0]
-	cbnz	w0, .L2279
-	adrp	x0, .LC60
-	mov	w2, 0
-	add	x0, x0, :lo12:.LC60
+	add	x19, x20, :lo12:check_valid_page_count_table
+	mov	x2, 8192
+	mov	w1, 0
+	mov	x0, x19
+	bl	memset
+.L2336:
+	ldr	w0, [x23]
+	cmp	w22, w0
+	bcc	.L2338
+	adrp	x23, .LANCHOR40
+	adrp	x24, .LC63
+	add	x23, x23, :lo12:.LANCHOR40
+	add	x26, x20, :lo12:check_valid_page_count_table
+	add	x24, x24, :lo12:.LC63
+	mov	w22, 0
+	mov	w19, 0
+	adrp	x25, .LANCHOR85
+.L2339:
+	ldrh	w0, [x23]
+	cmp	w0, w19
+	bhi	.L2341
+	adrp	x0, .LANCHOR89
+	ldr	x19, [x0, #:lo12:.LANCHOR89]
+	cbz	x19, .L2342
+	adrp	x0, .LANCHOR90
+	adrp	x25, .LC64
+	add	x20, x20, :lo12:check_valid_page_count_table
+	add	x25, x25, :lo12:.LC64
+	ldrh	w26, [x0, #:lo12:.LANCHOR90]
+	adrp	x0, .LANCHOR83
+	mov	x24, x0
+	mov	w23, 0
+	ldr	x1, [x0, #:lo12:.LANCHOR83]
+	adrp	x27, .LANCHOR85
+	mov	w28, 6
+	sub	x19, x19, x1
+	mov	x1, -6148914691236517206
+	asr	x19, x19, 1
+	movk	x1, 0xaaab, lsl 0
+	mul	x19, x19, x1
+	and	w19, w19, 65535
+.L2343:
+	cmp	w23, w26
+	bne	.L2345
+.L2342:
+	adrp	x0, .LC65
+	mov	w1, w22
+	add	x0, x0, :lo12:.LC65
 	bl	printf
-.L2279:
-	mov	w0, w26
-	bl	decrement_vpc_count
-.L2278:
-	add	x19, x19, 56
-	b	.L2271
-.L2276:
-	orr	w0, w0, -2147483648
-	b	.L2288
-.L2280:
-	adrp	x0, .LANCHOR38
-	ldrb	w1, [x20, 6]
-	ldrh	w0, [x0, #:lo12:.LANCHOR38]
-	cmp	w1, w0
-	bcc	.L2268
-	mov	w2, 1605
-	adrp	x1, .LANCHOR230
+	cbz	w22, .L2335
+	mov	w2, 1849
+	add	x1, x21, :lo12:.LANCHOR238
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR230
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -16057,416 +16351,156 @@ FtlProgPages:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2268:
+.L2335:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 96
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
 	ret
-	.size	FtlProgPages, .-FtlProgPages
-	.section	.text.FtlCacheWriteBack,"ax",@progbits
-	.align	2
-	.global	FtlCacheWriteBack
-	.type	FtlCacheWriteBack, %function
-FtlCacheWriteBack:
-	adrp	x0, .LANCHOR76
-	ldr	w0, [x0, #:lo12:.LANCHOR76]
-	cbnz	w0, .L2295
-	stp	x29, x30, [sp, -32]!
-	add	x29, sp, 0
-	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR132
-	ldr	x0, [x19, #:lo12:.LANCHOR132]
-	cbz	x0, .L2290
-	adrp	x1, .LANCHOR231
+.L2338:
 	mov	w2, 0
-	ldr	x3, [x1, #:lo12:.LANCHOR231]
-	mov	w1, 1
-	bl	FtlProgPages
-	str	xzr, [x19, #:lo12:.LANCHOR132]
-.L2290:
-	mov	w0, 0
-	ldr	x19, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	ret
-.L2295:
-	mov	w0, 0
-	ret
-	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
-	.section	.text.FtlSysFlush,"ax",@progbits
-	.align	2
-	.global	FtlSysFlush
-	.type	FtlSysFlush, %function
-FtlSysFlush:
-	adrp	x0, .LANCHOR76
-	ldr	w0, [x0, #:lo12:.LANCHOR76]
-	cbnz	w0, .L2301
-	stp	x29, x30, [sp, -16]!
-	add	x29, sp, 0
-	bl	FtlCacheWriteBack
-	bl	l2p_flush
-	mov	w0, 1
-	bl	FtlEctTblFlush
-	bl	FtlVpcTblFlush
-	mov	w0, 0
-	ldp	x29, x30, [sp], 16
-	ret
-.L2301:
-	mov	w0, 0
-	ret
-	.size	FtlSysFlush, .-FtlSysFlush
-	.section	.text.FtlDeInit,"ax",@progbits
-	.align	2
-	.global	FtlDeInit
-	.type	FtlDeInit, %function
-FtlDeInit:
-	adrp	x0, .LANCHOR232
-	ldr	w0, [x0, #:lo12:.LANCHOR232]
-	cmp	w0, 1
-	bne	.L2307
-	stp	x29, x30, [sp, -16]!
-	add	x29, sp, 0
-	bl	FtlSysFlush
-	mov	w0, 0
-	ldp	x29, x30, [sp], 16
-	ret
-.L2307:
-	mov	w0, 0
-	ret
-	.size	FtlDeInit, .-FtlDeInit
-	.section	.text.rk_ftl_de_init,"ax",@progbits
-	.align	2
-	.global	rk_ftl_de_init
-	.type	rk_ftl_de_init, %function
-rk_ftl_de_init:
-	stp	x29, x30, [sp, -16]!
-	add	x29, sp, 0
-	bl	FlashDeInit
-	bl	FtlDeInit
-	ldp	x29, x30, [sp], 16
-	b	FlashDeInit
-	.size	rk_ftl_de_init, .-rk_ftl_de_init
-	.section	.text.ftl_discard,"ax",@progbits
-	.align	2
-	.global	ftl_discard
-	.type	ftl_discard, %function
-ftl_discard:
-	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR68
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	w20, w1
-	ldr	w0, [x0, #:lo12:.LANCHOR68]
-	add	w1, w1, w2
-	stp	x21, x22, [sp, 32]
-	str	x23, [sp, 48]
-	cmp	w1, w0
-	bhi	.L2320
-	mov	w19, w2
-	cmp	w2, 31
-	bhi	.L2314
-.L2328:
-	mov	w0, 0
-.L2312:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldr	x23, [sp, 48]
-	ldp	x29, x30, [sp], 80
-	ret
-.L2314:
-	adrp	x0, .LANCHOR76
-	ldr	w0, [x0, #:lo12:.LANCHOR76]
-	cbnz	w0, .L2328
-	adrp	x22, .LANCHOR55
-	bl	FtlCacheWriteBack
-	ldrh	w0, [x22, #:lo12:.LANCHOR55]
-	udiv	w21, w20, w0
-	msub	w20, w0, w21, w20
-	ands	w20, w20, 65535
-	beq	.L2316
-	sub	w0, w0, w20
-	add	w21, w21, 1
-	cmp	w0, w19
-	csel	w0, w0, w19, ls
-	sub	w19, w19, w0, uxth
-.L2316:
-	adrp	x20, .LANCHOR233
-	adrp	x23, .LANCHOR163
-	add	x20, x20, :lo12:.LANCHOR233
-	add	x23, x23, :lo12:.LANCHOR163
-	mov	w0, -1
-	str	w0, [x29, 76]
-.L2317:
-	ldrh	w0, [x22, #:lo12:.LANCHOR55]
-	cmp	w19, w0
-	bcs	.L2319
-	adrp	x0, .LANCHOR233
-	ldr	w1, [x0, #:lo12:.LANCHOR233]
-	cmp	w1, 32
-	bls	.L2328
-	str	wzr, [x0, #:lo12:.LANCHOR233]
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
-	b	.L2328
-.L2319:
-	mov	w2, 0
-	add	x1, x29, 72
-	mov	w0, w21
-	bl	log2phys
-	ldr	w0, [x29, 72]
-	cmn	w0, #1
-	beq	.L2318
-	ldr	w0, [x20]
-	mov	w2, 1
-	add	x1, x29, 76
-	add	w0, w0, 1
-	str	w0, [x20]
-	ldr	w0, [x23]
-	add	w0, w0, 1
-	str	w0, [x23]
-	mov	w0, w21
-	bl	log2phys
-	ldr	w0, [x29, 72]
-	lsr	w0, w0, 10
-	bl	P2V_block_in_plane
-	bl	decrement_vpc_count
-.L2318:
-	ldrh	w0, [x22, #:lo12:.LANCHOR55]
-	add	w21, w21, 1
-	sub	w19, w19, w0
-	b	.L2317
-.L2320:
-	mov	w0, -1
-	b	.L2312
-	.size	ftl_discard, .-ftl_discard
-	.section	.text.FtlCheckVpc,"ax",@progbits
-	.align	2
-	.global	FtlCheckVpc
-	.type	FtlCheckVpc, %function
-FtlCheckVpc:
-	stp	x29, x30, [sp, -112]!
-	adrp	x0, .LC46
-	add	x0, x0, :lo12:.LC46
-	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR72
-	add	x23, x23, :lo12:.LANCHOR72
-	stp	x21, x22, [sp, 32]
-	mov	w22, 0
-	stp	x19, x20, [sp, 16]
-	stp	x25, x26, [sp, 64]
-	adrp	x21, .LANCHOR234
-	stp	x27, x28, [sp, 80]
-	add	x1, x21, :lo12:.LANCHOR234
-	adrp	x20, check_valid_page_count_table
-	bl	printf
-	add	x19, x20, :lo12:check_valid_page_count_table
-	mov	x2, 8192
-	mov	w1, 0
-	mov	x0, x19
-	bl	memset
-.L2330:
-	ldr	w0, [x23]
-	cmp	w22, w0
-	bcc	.L2332
-	adrp	x22, .LANCHOR40
-	adrp	x24, .LC61
-	add	x22, x22, :lo12:.LANCHOR40
-	add	x26, x20, :lo12:check_valid_page_count_table
-	add	x24, x24, :lo12:.LC61
-	mov	w23, 0
-	mov	w19, 0
-	adrp	x25, .LANCHOR83
-.L2333:
-	ldrh	w0, [x22]
-	cmp	w0, w19
-	bhi	.L2335
-	adrp	x0, .LANCHOR87
-	ldr	x19, [x0, #:lo12:.LANCHOR87]
-	cbz	x19, .L2336
-	adrp	x0, .LANCHOR88
-	adrp	x25, .LC62
-	add	x20, x20, :lo12:check_valid_page_count_table
-	add	x25, x25, :lo12:.LC62
-	ldrh	w26, [x0, #:lo12:.LANCHOR88]
-	adrp	x0, .LANCHOR81
-	mov	x24, x0
-	mov	w22, 0
-	ldr	x1, [x0, #:lo12:.LANCHOR81]
-	adrp	x27, .LANCHOR83
-	mov	w28, 6
-	sub	x19, x19, x1
-	mov	x1, -6148914691236517206
-	asr	x19, x19, 1
-	movk	x1, 0xaaab, lsl 0
-	mul	x19, x19, x1
-	and	w19, w19, 65535
-.L2337:
-	cmp	w22, w26
-	bne	.L2339
-.L2336:
-	cbz	w23, .L2329
-	mov	w2, 1688
-	add	x1, x21, :lo12:.LANCHOR234
-	adrp	x0, .LC5
-	add	x0, x0, :lo12:.LC5
-	bl	printf
-	adrp	x1, .LC6
-	adrp	x0, .LC7
-	add	x1, x1, :lo12:.LC6
-	add	x0, x0, :lo12:.LC7
-	bl	printf
-.L2329:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 112
-	ret
-.L2332:
-	mov	w2, 0
-	add	x1, x29, 108
-	mov	w0, w22
-	bl	log2phys
-	ldr	w0, [x29, 108]
-	cmn	w0, #1
-	beq	.L2331
-	lsr	w0, w0, 10
-	bl	P2V_block_in_plane
-	and	x0, x0, 65535
-	ldrh	w1, [x19, x0, lsl 1]
-	add	w1, w1, 1
-	strh	w1, [x19, x0, lsl 1]
-.L2331:
-	add	w22, w22, 1
-	b	.L2330
-.L2335:
-	ldr	x0, [x25, #:lo12:.LANCHOR83]
-	ubfiz	x28, x19, 1, 16
-	sxtw	x27, w19
-	ldrh	w2, [x0, x28]
-	ldrh	w3, [x26, x27, lsl 1]
-	cmp	w2, w3
-	beq	.L2334
-	mov	w1, w19
-	mov	x0, x24
-	bl	printf
-	ldr	x0, [x25, #:lo12:.LANCHOR83]
-	mov	w1, 65535
-	ldrh	w0, [x0, x28]
-	cmp	w0, w1
-	beq	.L2334
-	ldrh	w1, [x26, x27, lsl 1]
-	cmp	w1, w0
-	csinc	w23, w23, wzr, ls
-.L2334:
-	add	w19, w19, 1
-	and	w19, w19, 65535
-	b	.L2333
-.L2339:
-	ldr	x1, [x27, #:lo12:.LANCHOR83]
-	ubfiz	x0, x19, 1, 16
-	ldrh	w2, [x1, x0]
-	cbz	w2, .L2338
-	ldrh	w3, [x20, w19, sxtw 1]
-	mov	w23, 1
-	mov	w1, w19
-	mov	x0, x25
-	bl	printf
-.L2338:
-	ldr	x0, [x24, #:lo12:.LANCHOR81]
-	umull	x19, w19, w28
-	ldrh	w19, [x0, x19]
-	mov	w0, 65535
-	cmp	w19, w0
-	beq	.L2336
-	add	w22, w22, 1
-	and	w22, w22, 65535
-	b	.L2337
-	.size	FtlCheckVpc, .-FtlCheckVpc
-	.section	.text.Ftlscanalldata,"ax",@progbits
+	add	x1, x29, 108
+	mov	w0, w22
+	bl	log2phys
+	ldr	w0, [x29, 108]
+	cmn	w0, #1
+	beq	.L2337
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+	and	x0, x0, 65535
+	ldrh	w1, [x19, x0, lsl 1]
+	add	w1, w1, 1
+	strh	w1, [x19, x0, lsl 1]
+.L2337:
+	add	w22, w22, 1
+	b	.L2336
+.L2341:
+	ldr	x0, [x25, #:lo12:.LANCHOR85]
+	ubfiz	x28, x19, 1, 16
+	sxtw	x27, w19
+	ldrh	w2, [x0, x28]
+	ldrh	w3, [x26, x27, lsl 1]
+	cmp	w2, w3
+	beq	.L2340
+	mov	w1, w19
+	mov	x0, x24
+	bl	printf
+	ldr	x0, [x25, #:lo12:.LANCHOR85]
+	mov	w1, 65535
+	ldrh	w0, [x0, x28]
+	cmp	w0, w1
+	beq	.L2340
+	ldrh	w1, [x26, x27, lsl 1]
+	cmp	w1, w0
+	csinc	w22, w22, wzr, ls
+.L2340:
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L2339
+.L2345:
+	ldr	x1, [x27, #:lo12:.LANCHOR85]
+	ubfiz	x0, x19, 1, 16
+	ldrh	w2, [x1, x0]
+	cbz	w2, .L2344
+	ldrh	w3, [x20, w19, sxtw 1]
+	mov	w22, 1
+	mov	w1, w19
+	mov	x0, x25
+	bl	printf
+.L2344:
+	ldr	x0, [x24, #:lo12:.LANCHOR83]
+	umull	x19, w19, w28
+	ldrh	w19, [x0, x19]
+	mov	w0, 65535
+	cmp	w19, w0
+	beq	.L2342
+	add	w23, w23, 1
+	and	w23, w23, 65535
+	b	.L2343
+	.size	FtlCheckVpc, .-FtlCheckVpc
+	.section	.text.Ftlscanalldata,"ax",@progbits
 	.align	2
 	.global	Ftlscanalldata
 	.type	Ftlscanalldata, %function
 Ftlscanalldata:
 	sub	sp, sp, #96
-	adrp	x0, .LC63
+	adrp	x0, .LC66
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC63
+	add	x0, x0, :lo12:.LC66
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x19, x20, [sp, 32]
-	adrp	x20, .LANCHOR203
+	adrp	x20, .LANCHOR211
 	stp	x21, x22, [sp, 48]
 	mov	w19, 0
-	adrp	x21, .LANCHOR72
-	add	x22, x20, :lo12:.LANCHOR203
-	add	x21, x21, :lo12:.LANCHOR72
+	adrp	x21, .LANCHOR74
+	add	x22, x20, :lo12:.LANCHOR211
+	add	x21, x21, :lo12:.LANCHOR74
 	str	x23, [sp, 64]
 	bl	printf
-.L2355:
+.L2361:
 	ldr	w0, [x21]
 	cmp	w19, w0
-	bcc	.L2361
+	bcc	.L2367
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x29, x30, [sp, 16]
 	ldr	x23, [sp, 64]
 	add	sp, sp, 96
 	ret
-.L2361:
+.L2367:
 	mov	w2, 0
 	add	x1, x29, 76
 	mov	w0, w19
 	bl	log2phys
 	tst	x19, 2047
-	bne	.L2356
+	bne	.L2362
 	ldr	w2, [x29, 76]
-	adrp	x0, .LC64
+	adrp	x0, .LC67
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC64
+	add	x0, x0, :lo12:.LC67
 	bl	printf
-.L2356:
+.L2362:
 	ldr	w1, [x29, 76]
 	cmn	w1, #1
-	beq	.L2358
-	add	x0, x20, :lo12:.LANCHOR203
-	str	wzr, [x20, #:lo12:.LANCHOR203]
+	beq	.L2364
+	add	x0, x20, :lo12:.LANCHOR211
+	str	wzr, [x20, #:lo12:.LANCHOR211]
 	mov	w2, 0
 	str	w1, [x0, 4]
-	adrp	x1, .LANCHOR183
+	adrp	x1, .LANCHOR189
 	str	w19, [x0, 24]
-	ldr	x1, [x1, #:lo12:.LANCHOR183]
+	ldr	x1, [x1, #:lo12:.LANCHOR189]
 	str	x1, [x0, 8]
-	adrp	x1, .LANCHOR188
-	ldr	x23, [x1, #:lo12:.LANCHOR188]
+	adrp	x1, .LANCHOR195
+	ldr	x23, [x1, #:lo12:.LANCHOR195]
 	mov	w1, 1
 	str	x23, [x0, 16]
 	bl	FlashReadPages
-	ldr	w0, [x20, #:lo12:.LANCHOR203]
+	ldr	w0, [x20, #:lo12:.LANCHOR211]
 	cmp	w0, 256
 	ccmn	w0, #1, 4, ne
-	beq	.L2359
+	beq	.L2365
 	ldr	w0, [x23, 8]
 	cmp	w19, w0
-	beq	.L2358
-.L2359:
+	beq	.L2364
+.L2365:
 	ldp	x1, x0, [x22, 8]
 	ldr	w2, [x1, 4]
 	str	w2, [sp]
 	ldr	w2, [x22, 4]
 	ldp	w3, w4, [x0]
 	ldp	w5, w6, [x0, 8]
-	adrp	x0, .LC65
+	adrp	x0, .LC68
 	ldr	w7, [x1]
-	add	x0, x0, :lo12:.LC65
+	add	x0, x0, :lo12:.LC68
 	mov	w1, w19
 	bl	printf
-.L2358:
+.L2364:
 	add	w19, w19, 1
-	b	.L2355
+	b	.L2361
 	.size	Ftlscanalldata, .-Ftlscanalldata
 	.section	.text.FtlReUsePrevPpa,"ax",@progbits
 	.align	2
@@ -16476,47 +16510,47 @@ FtlReUsePrevPpa:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR83
+	adrp	x22, .LANCHOR85
 	stp	x19, x20, [sp, 16]
 	mov	w21, w0
 	str	w1, [x29, 76]
 	lsr	w0, w1, 10
 	str	x23, [sp, 48]
 	bl	P2V_block_in_plane
-	ldr	x2, [x22, #:lo12:.LANCHOR83]
+	ldr	x2, [x22, #:lo12:.LANCHOR85]
 	and	w3, w0, 65535
 	ubfiz	x20, x3, 1, 16
 	ldrh	w1, [x2, x20]
-	cbnz	w1, .L2364
-	adrp	x0, .LANCHOR87
-	ldr	x19, [x0, #:lo12:.LANCHOR87]
-	cbz	x19, .L2365
-	adrp	x2, .LANCHOR81
+	cbnz	w1, .L2370
+	adrp	x0, .LANCHOR89
+	ldr	x19, [x0, #:lo12:.LANCHOR89]
+	cbz	x19, .L2371
+	adrp	x2, .LANCHOR83
 	mov	x5, -6148914691236517206
 	movk	x5, 0xaaab, lsl 0
-	adrp	x23, .LANCHOR88
-	ldr	x2, [x2, #:lo12:.LANCHOR81]
+	adrp	x23, .LANCHOR90
+	ldr	x2, [x2, #:lo12:.LANCHOR83]
 	mov	w6, 65535
-	ldrh	w4, [x23, #:lo12:.LANCHOR88]
+	ldrh	w4, [x23, #:lo12:.LANCHOR90]
 	sub	x19, x19, x2
 	asr	x19, x19, 1
 	mul	x19, x19, x5
 	mov	w5, 6
 	and	w19, w19, 65535
-.L2366:
+.L2372:
 	cmp	w1, w4
-	beq	.L2365
+	beq	.L2371
 	cmp	w19, w3
-	bne	.L2367
+	bne	.L2373
 	mov	w1, w19
-	add	x0, x0, :lo12:.LANCHOR87
+	add	x0, x0, :lo12:.LANCHOR89
 	bl	List_remove_node
-	ldrh	w0, [x23, #:lo12:.LANCHOR88]
-	cbnz	w0, .L2368
-	mov	w2, 2099
-	adrp	x1, .LANCHOR235
+	ldrh	w0, [x23, #:lo12:.LANCHOR90]
+	cbnz	w0, .L2374
+	mov	w2, 2271
+	adrp	x1, .LANCHOR239
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR235
+	add	x1, x1, :lo12:.LANCHOR239
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -16524,17 +16558,17 @@ FtlReUsePrevPpa:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2368:
-	ldrh	w0, [x23, #:lo12:.LANCHOR88]
+.L2374:
+	ldrh	w0, [x23, #:lo12:.LANCHOR90]
 	sub	w0, w0, #1
-	strh	w0, [x23, #:lo12:.LANCHOR88]
+	strh	w0, [x23, #:lo12:.LANCHOR90]
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-	ldr	x1, [x22, #:lo12:.LANCHOR83]
+	ldr	x1, [x22, #:lo12:.LANCHOR85]
 	ldrh	w0, [x1, x20]
 	add	w0, w0, 1
 	strh	w0, [x1, x20]
-.L2365:
+.L2371:
 	add	x1, x29, 76
 	mov	w2, 1
 	mov	w0, w21
@@ -16544,18 +16578,18 @@ FtlReUsePrevPpa:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2367:
+.L2373:
 	umull	x19, w19, w5
 	ldrh	w19, [x2, x19]
 	cmp	w19, w6
-	beq	.L2365
+	beq	.L2371
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L2366
-.L2364:
+	b	.L2372
+.L2370:
 	add	w1, w1, 1
 	strh	w1, [x2, x20]
-	b	.L2365
+	b	.L2371
 	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
 	.section	.text.FtlRecoverySuperblock,"ax",@progbits
 	.align	2
@@ -16573,7 +16607,7 @@ FtlRecoverySuperblock:
 	stp	x25, x26, [sp, 64]
 	cmp	w0, w1
 	stp	x27, x28, [sp, 80]
-	beq	.L2536
+	beq	.L2542
 	ldrb	w0, [x19, 6]
 	str	w0, [x29, 180]
 	adrp	x0, .LANCHOR52
@@ -16581,11 +16615,11 @@ FtlRecoverySuperblock:
 	str	x0, [x29, 144]
 	ldrh	w2, [x0, #:lo12:.LANCHOR52]
 	cmp	w2, w26
-	bne	.L2377
+	bne	.L2383
 	strh	wzr, [x19, 4]
-.L2543:
+.L2549:
 	strb	wzr, [x19, 6]
-.L2536:
+.L2542:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -16594,33 +16628,33 @@ FtlRecoverySuperblock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 208
 	ret
-.L2377:
+.L2383:
 	ldrh	w0, [x19, 16]
 	mov	w21, 0
-.L2378:
+.L2384:
 	cmp	w0, w1
-	beq	.L2379
+	beq	.L2385
 	ldrb	w1, [x19, 8]
 	cmp	w1, 1
-	bne	.L2380
+	bne	.L2386
 	bl	FtlGetLastWrittenPage
 	mov	w20, w0
 	cmn	w0, #1
-	beq	.L2381
-	adrp	x0, .LANCHOR15
-	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbnz	w0, .L2458
+	beq	.L2387
 	adrp	x0, .LANCHOR16
-	add	x0, x0, :lo12:.LANCHOR16
+	ldrb	w0, [x0, #:lo12:.LANCHOR16]
+	cbnz	w0, .L2464
+	adrp	x0, .LANCHOR17
+	add	x0, x0, :lo12:.LANCHOR17
 	ldrh	w23, [x0, w20, sxtw 1]
-.L2382:
-	adrp	x1, .LANCHOR105
+.L2388:
+	adrp	x1, .LANCHOR108
 	adrp	x2, .LANCHOR38
-	adrp	x22, .LANCHOR180
+	adrp	x22, .LANCHOR186
 	add	x4, x19, 16
-	ldr	x6, [x1, #:lo12:.LANCHOR105]
+	ldr	x6, [x1, #:lo12:.LANCHOR108]
 	adrp	x1, .LANCHOR58
-	ldr	x0, [x22, #:lo12:.LANCHOR180]
+	ldr	x0, [x22, #:lo12:.LANCHOR186]
 	mov	w27, 0
 	ldrh	w7, [x1, #:lo12:.LANCHOR58]
 	add	x1, x19, 16
@@ -16631,96 +16665,96 @@ FtlRecoverySuperblock:
 	str	x2, [x29, 160]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.L2383:
+.L2389:
 	cmp	x1, x4
-	bne	.L2387
+	bne	.L2393
 	ldrb	w1, [x19, 8]
 	cmp	w1, 1
-	bne	.L2459
-	adrp	x1, .LANCHOR15
-	ldrb	w1, [x1, #:lo12:.LANCHOR15]
+	bne	.L2465
+	adrp	x1, .LANCHOR16
+	ldrb	w1, [x1, #:lo12:.LANCHOR16]
 	cmp	w1, 0
 	cset	w1, ne
 	str	w1, [x29, 176]
-.L2388:
+.L2394:
 	ldr	w2, [x29, 176]
 	mov	w1, w27
-	adrp	x24, .LC66
-	adrp	x25, .LANCHOR237
-	add	x24, x24, :lo12:.LC66
-	add	x25, x25, :lo12:.LANCHOR237
+	adrp	x24, .LC69
+	adrp	x25, .LANCHOR241
+	add	x24, x24, :lo12:.LC69
+	add	x25, x25, :lo12:.LANCHOR241
 	mov	x28, 0
 	bl	FlashReadPages
-	adrp	x0, .LANCHOR160
+	adrp	x0, .LANCHOR165
 	mov	w5, 65535
 	str	x0, [x29, 168]
-	ldr	w21, [x0, #:lo12:.LANCHOR160]
+	ldr	w21, [x0, #:lo12:.LANCHOR165]
 	sub	w21, w21, #1
-.L2389:
+.L2395:
 	and	w0, w28, 65535
 	cmp	w27, w0
-	bhi	.L2394
-	bne	.L2392
-	ldr	x0, [x22, #:lo12:.LANCHOR180]
+	bhi	.L2400
+	bne	.L2398
+	ldr	x0, [x22, #:lo12:.LANCHOR186]
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	ldr	w0, [x0, 4]
-.L2538:
+.L2544:
 	lsr	w0, w0, 10
 	bl	P2V_plane
 	ldrb	w1, [x19, 8]
 	and	w27, w0, 65535
 	cmp	w1, 1
-	bne	.L2396
-	adrp	x0, .LANCHOR15
-	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbnz	w0, .L2396
+	bne	.L2402
 	adrp	x0, .LANCHOR16
-	add	x0, x0, :lo12:.LANCHOR16
+	ldrb	w0, [x0, #:lo12:.LANCHOR16]
+	cbnz	w0, .L2402
+	adrp	x0, .LANCHOR17
+	add	x0, x0, :lo12:.LANCHOR17
 	ldrh	w20, [x0, w20, sxtw 1]
-.L2396:
+.L2402:
 	ldr	x0, [x29, 144]
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w20
-	bne	.L2397
+	bne	.L2403
 	strh	w20, [x19, 2]
 	strb	wzr, [x19, 6]
 	strh	wzr, [x19, 4]
-.L2397:
+.L2403:
 	ldr	w0, [x29, 180]
 	cmp	w20, w26
 	cset	w2, eq
 	cmp	w27, w0
 	cset	w0, eq
 	tst	w2, w0
-	beq	.L2398
-.L2544:
+	beq	.L2404
+.L2550:
 	mov	w2, w27
 	mov	w1, w20
 	mov	x0, x19
 	bl	ftl_sb_update_avl_pages
-	b	.L2536
-.L2379:
+	b	.L2542
+.L2385:
 	add	w21, w21, 1
 	and	w21, w21, 65535
 	add	x0, x19, x21, sxtw 1
 	ldrh	w0, [x0, 16]
-	b	.L2378
-.L2380:
+	b	.L2384
+.L2386:
 	mov	w1, 0
 	bl	FtlGetLastWrittenPage
 	mov	w20, w0
 	cmn	w0, #1
-	beq	.L2381
-.L2458:
+	beq	.L2387
+.L2464:
 	mov	w23, w20
-	b	.L2382
-.L2381:
-	cbz	w26, .L2384
-	mov	w2, 2170
-	adrp	x1, .LANCHOR236
+	b	.L2388
+.L2387:
+	cbz	w26, .L2390
+	mov	w2, 2350
+	adrp	x1, .LANCHOR240
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR236
+	add	x1, x1, :lo12:.LANCHOR240
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -16728,15 +16762,15 @@ FtlRecoverySuperblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2384:
+.L2390:
 	ldr	w0, [x29, 180]
 	cmp	w0, 0
 	ccmp	w21, w0, 4, ne
-	beq	.L2385
-	mov	w2, 2171
-	adrp	x1, .LANCHOR236
+	beq	.L2391
+	mov	w2, 2351
+	adrp	x1, .LANCHOR240
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR236
+	add	x1, x1, :lo12:.LANCHOR240
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -16744,13 +16778,13 @@ FtlRecoverySuperblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2385:
+.L2391:
 	strh	wzr, [x19, 2]
-	b	.L2543
-.L2387:
+	b	.L2549
+.L2393:
 	ldrh	w2, [x4]
 	cmp	w2, w8
-	beq	.L2386
+	beq	.L2392
 	umaddl	x5, w27, w10, x0
 	orr	w2, w23, w2, lsl 10
 	add	w3, w27, 1
@@ -16761,107 +16795,107 @@ FtlRecoverySuperblock:
 	asr	w2, w2, 2
 	add	x2, x6, x2, sxtw 2
 	str	x2, [x5, 16]
-.L2386:
+.L2392:
 	add	x4, x4, 2
-	b	.L2383
-.L2459:
+	b	.L2389
+.L2465:
 	str	wzr, [x29, 176]
-	b	.L2388
-.L2394:
+	b	.L2394
+.L2400:
 	mov	x0, 56
-	ldr	x2, [x22, #:lo12:.LANCHOR180]
+	ldr	x2, [x22, #:lo12:.LANCHOR186]
 	mul	x0, x28, x0
 	add	x1, x2, x0
 	ldr	w0, [x2, x0]
-	cbnz	w0, .L2390
+	cbnz	w0, .L2396
 	ldr	x6, [x1, 16]
 	ldr	w4, [x6, 4]
 	cmn	w4, #1
-	beq	.L2391
+	beq	.L2397
 	ldr	x0, [x29, 168]
-	ldr	w1, [x0, #:lo12:.LANCHOR160]
+	ldr	w1, [x0, #:lo12:.LANCHOR165]
 	mov	w0, w4
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2391
+	cbz	w0, .L2397
 	ldr	x0, [x29, 168]
 	add	w4, w4, 1
-	str	w4, [x0, #:lo12:.LANCHOR160]
-.L2391:
+	str	w4, [x0, #:lo12:.LANCHOR165]
+.L2397:
 	ldr	w0, [x6]
 	cmn	w0, #1
-	bne	.L2393
-.L2392:
-	ldr	x0, [x22, #:lo12:.LANCHOR180]
+	bne	.L2399
+.L2398:
+	ldr	x0, [x22, #:lo12:.LANCHOR186]
 	and	x28, x28, 65535
 	mov	x1, 56
 	and	w20, w20, 65535
 	madd	x28, x28, x1, x0
 	ldr	w0, [x28, 4]
-	b	.L2538
-.L2390:
+	b	.L2544
+.L2396:
 	ldr	w1, [x1, 4]
 	mov	x0, x24
 	bl	printf
 	ldrh	w0, [x19]
 	and	w5, w23, 65535
 	strh	w0, [x25]
-.L2393:
+.L2399:
 	add	x28, x28, 1
-	b	.L2389
-.L2398:
+	b	.L2395
+.L2404:
 	mov	w0, 65535
 	cmp	w5, w0
-	bne	.L2399
-	cbnz	w1, .L2400
-.L2399:
-	adrp	x24, .LANCHOR136
+	bne	.L2405
+	cbnz	w1, .L2406
+.L2405:
+	adrp	x24, .LANCHOR139
 	and	w6, w23, 65535
-	ldr	w0, [x24, #:lo12:.LANCHOR136]
+	ldr	w0, [x24, #:lo12:.LANCHOR139]
 	cmn	w0, #1
-	bne	.L2401
-	str	w21, [x24, #:lo12:.LANCHOR136]
-.L2401:
+	bne	.L2407
+	str	w21, [x24, #:lo12:.LANCHOR139]
+.L2407:
 	add	w0, w26, 7
-	ldr	w7, [x24, #:lo12:.LANCHOR136]
+	ldr	w7, [x24, #:lo12:.LANCHOR139]
 	cmp	w0, w23, uxth
-	bge	.L2460
+	bge	.L2466
 	sub	w23, w6, #7
 	and	w23, w23, 65535
-.L2402:
+.L2408:
 	mov	w3, -1
-	adrp	x5, .LANCHOR120
+	adrp	x5, .LANCHOR123
 	mov	w28, w3
-	add	x5, x5, :lo12:.LANCHOR120
+	add	x5, x5, :lo12:.LANCHOR123
 	mov	w4, 65535
-.L2403:
+.L2409:
 	cmp	w23, w6
-	bhi	.L2418
+	bhi	.L2424
 	ldr	x1, [x29, 160]
 	mov	w25, 0
-	ldr	x0, [x22, #:lo12:.LANCHOR180]
+	ldr	x0, [x22, #:lo12:.LANCHOR186]
 	mov	w10, 56
 	ldr	x2, [x29, 184]
 	ldrh	w1, [x1, #:lo12:.LANCHOR38]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-	b	.L2419
-.L2460:
+	b	.L2425
+.L2466:
 	mov	w23, w26
-	b	.L2402
-.L2405:
+	b	.L2408
+.L2411:
 	ldrh	w8, [x2]
 	cmp	w8, w4
-	beq	.L2404
+	beq	.L2410
 	umaddl	x11, w25, w10, x0
 	add	w25, w25, 1
 	and	w25, w25, 65535
 	orr	w8, w23, w8, lsl 10
 	str	w8, [x11, 4]
-.L2404:
+.L2410:
 	add	x2, x2, 2
-.L2419:
+.L2425:
 	cmp	x2, x1
-	bne	.L2405
+	bne	.L2411
 	ldr	w2, [x29, 176]
 	mov	w1, w25
 	str	x5, [x29, 112]
@@ -16870,13 +16904,13 @@ FtlRecoverySuperblock:
 	str	w6, [x29, 136]
 	str	w3, [x29, 152]
 	bl	FlashReadPages
-	adrp	x1, .LANCHOR15
+	adrp	x1, .LANCHOR16
 	mov	w2, 56
-	ldr	w0, [x24, #:lo12:.LANCHOR136]
+	ldr	w0, [x24, #:lo12:.LANCHOR139]
 	sxtw	x12, w23
-	ldrb	w10, [x1, #:lo12:.LANCHOR15]
+	ldrb	w10, [x1, #:lo12:.LANCHOR16]
 	mov	w11, 1
-	ldr	x1, [x22, #:lo12:.LANCHOR180]
+	ldr	x1, [x22, #:lo12:.LANCHOR186]
 	ldr	w4, [x29, 120]
 	ldr	w7, [x29, 128]
 	ldr	w6, [x29, 136]
@@ -16885,81 +16919,81 @@ FtlRecoverySuperblock:
 	umaddl	x25, w25, w2, x1
 	ldr	x5, [x29, 112]
 	mov	w2, 0
-.L2406:
+.L2412:
 	cmp	x25, x1
-	bne	.L2416
-	cbz	w2, .L2417
-	str	w0, [x24, #:lo12:.LANCHOR136]
-.L2417:
+	bne	.L2422
+	cbz	w2, .L2423
+	str	w0, [x24, #:lo12:.LANCHOR139]
+.L2423:
 	add	w23, w23, 1
 	and	w23, w23, 65535
-	b	.L2403
-.L2416:
+	b	.L2409
+.L2422:
 	ldr	w8, [x1]
-	cbnz	w8, .L2407
+	cbnz	w8, .L2413
 	ldr	x8, [x1, 16]
 	ldrh	w13, [x8]
 	cmp	w13, w4
-	beq	.L2462
+	beq	.L2468
 	ldr	w8, [x8, 4]
 	cmn	w8, #1
-	beq	.L2462
+	beq	.L2468
 	cmn	w3, #1
-	bne	.L2464
+	bne	.L2470
 	ldrh	w2, [x5, x12, lsl 1]
 	cmp	w2, w4
-	bne	.L2409
-	cbz	w10, .L2464
-.L2409:
+	bne	.L2415
+	cbz	w10, .L2470
+.L2415:
 	cmp	w21, w0
 	mov	w2, w11
 	csel	w3, w3, w0, eq
-.L2408:
+.L2414:
 	mov	w28, w0
 	add	x1, x1, 56
 	mov	w0, w8
-	b	.L2406
-.L2407:
-	cbz	w2, .L2410
-	str	w0, [x24, #:lo12:.LANCHOR136]
-.L2410:
-	adrp	x0, .LANCHOR237
+	b	.L2412
+.L2413:
+	cbz	w2, .L2416
+	str	w0, [x24, #:lo12:.LANCHOR139]
+.L2416:
+	adrp	x0, .LANCHOR241
 	ldrh	w1, [x19]
-	strh	w1, [x0, #:lo12:.LANCHOR237]
+	strh	w1, [x0, #:lo12:.LANCHOR241]
 	ldrb	w0, [x19, 8]
-	cbnz	w0, .L2400
-	adrp	x0, .LANCHOR120
-	add	x0, x0, :lo12:.LANCHOR120
+	cbnz	w0, .L2406
+	adrp	x0, .LANCHOR123
+	add	x0, x0, :lo12:.LANCHOR123
 	ldrh	w1, [x0, w23, sxtw 1]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2412
+	bne	.L2418
 	cmn	w3, #1
-	beq	.L2413
-	str	w3, [x24, #:lo12:.LANCHOR136]
-.L2400:
-	adrp	x0, .LANCHOR238
+	beq	.L2419
+	str	w3, [x24, #:lo12:.LANCHOR139]
+.L2406:
+	adrp	x0, .LANCHOR242
 	mov	w23, w26
 	mov	w1, 1
-	adrp	x28, .LANCHOR136
-	strh	w1, [x0, #:lo12:.LANCHOR238]
-	add	x0, x28, :lo12:.LANCHOR136
+	adrp	x28, .LANCHOR139
+	strh	w1, [x0, #:lo12:.LANCHOR242]
+	add	x0, x28, :lo12:.LANCHOR139
 	str	x0, [x29, 112]
-.L2420:
+.L2426:
 	ldr	x2, [x29, 160]
-	adrp	x1, .LANCHOR15
-	ldr	x0, [x22, #:lo12:.LANCHOR180]
+	adrp	x1, .LANCHOR16
+	ldr	x0, [x22, #:lo12:.LANCHOR186]
 	mov	w24, 0
-	ldrb	w5, [x1, #:lo12:.LANCHOR15]
+	ldrb	w5, [x1, #:lo12:.LANCHOR16]
 	mov	w6, 65535
 	ldr	x3, [x29, 184]
 	ldrh	w2, [x2, #:lo12:.LANCHOR38]
 	str	x1, [x29, 128]
 	add	x2, x2, 8
 	add	x2, x19, x2, lsl 1
-.L2421:
+.L2427:
 	cmp	x2, x3
-	bne	.L2424
+	bne	.L2430
 	ldr	w2, [x29, 176]
 	mov	w1, w24
 	mov	x25, 0
@@ -16967,104 +17001,104 @@ FtlRecoverySuperblock:
 	mov	w0, 56
 	umull	x0, w24, w0
 	str	x0, [x29, 136]
-	adrp	x0, .LANCHOR237
-	add	x0, x0, :lo12:.LANCHOR237
+	adrp	x0, .LANCHOR241
+	add	x0, x0, :lo12:.LANCHOR241
 	str	x0, [x29, 120]
-.L2425:
+.L2431:
 	ldr	x0, [x29, 136]
 	cmp	x25, x0
-	bne	.L2451
+	bne	.L2457
 	ldrb	w0, [x19, 8]
 	add	w23, w23, 1
 	and	w23, w23, 65535
 	cmp	w0, 1
-	bne	.L2452
+	bne	.L2458
 	ldr	x0, [x29, 128]
-	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L2452
+	ldrb	w0, [x0, #:lo12:.LANCHOR16]
+	cbz	w0, .L2458
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w23
-	bne	.L2452
+	bne	.L2458
 	cmp	w20, w23
-	beq	.L2427
-.L2452:
+	beq	.L2433
+.L2458:
 	ldr	x0, [x29, 144]
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w23
-	bne	.L2420
+	bne	.L2426
 	ldr	x0, [x29, 160]
 	mov	w2, 65535
 	strh	w23, [x19, 2]
 	strh	wzr, [x19, 4]
 	ldrh	w1, [x0, #:lo12:.LANCHOR38]
 	mov	w0, 0
-.L2453:
+.L2459:
 	cmp	w0, w1
-	beq	.L2536
+	beq	.L2542
 	ldr	x4, [x29, 184]
 	ldrh	w3, [x4], 2
 	str	x4, [x29, 184]
 	cmp	w3, w2
-	beq	.L2454
+	beq	.L2460
 	strb	w0, [x19, 6]
-	b	.L2536
-.L2413:
+	b	.L2542
+.L2419:
 	cmp	w21, w7
-	beq	.L2414
-	str	w7, [x24, #:lo12:.LANCHOR136]
-	b	.L2400
-.L2414:
-	ldr	w0, [x24, #:lo12:.LANCHOR136]
-.L2545:
+	beq	.L2420
+	str	w7, [x24, #:lo12:.LANCHOR139]
+	b	.L2406
+.L2420:
+	ldr	w0, [x24, #:lo12:.LANCHOR139]
+.L2551:
 	sub	w0, w0, #1
-.L2539:
-	str	w0, [x24, #:lo12:.LANCHOR136]
-	b	.L2400
-.L2412:
+.L2545:
+	str	w0, [x24, #:lo12:.LANCHOR139]
+	b	.L2406
+.L2418:
 	cmp	w28, w21
-	beq	.L2415
+	beq	.L2421
 	cmn	w28, #1
-	beq	.L2400
-	str	w28, [x24, #:lo12:.LANCHOR136]
-	b	.L2400
-.L2415:
-	ldr	w0, [x24, #:lo12:.LANCHOR136]
+	beq	.L2406
+	str	w28, [x24, #:lo12:.LANCHOR139]
+	b	.L2406
+.L2421:
+	ldr	w0, [x24, #:lo12:.LANCHOR139]
 	cmp	w21, w0
-	bne	.L2545
-	b	.L2400
-.L2462:
+	bne	.L2551
+	b	.L2406
+.L2468:
 	mov	w8, w0
 	mov	w0, w28
-	b	.L2408
-.L2464:
+	b	.L2414
+.L2470:
 	mov	w2, 1
-	b	.L2408
-.L2418:
-	mov	w0, -1
-	b	.L2539
+	b	.L2414
 .L2424:
+	mov	w0, -1
+	b	.L2545
+.L2430:
 	ldrh	w1, [x3]
 	cmp	w1, w6
-	beq	.L2422
+	beq	.L2428
 	mov	w4, 56
 	orr	w1, w23, w1, lsl 10
 	umaddl	x4, w24, w4, x0
 	str	w1, [x4, 4]
 	ldrb	w7, [x19, 8]
 	cmp	w7, 1
-	bne	.L2423
-	cbz	w5, .L2423
+	bne	.L2429
+	cbz	w5, .L2429
 	orr	w1, w1, -2147483648
 	str	w1, [x4, 4]
-.L2423:
+.L2429:
 	add	w24, w24, 1
 	and	w24, w24, 65535
-.L2422:
+.L2428:
 	add	x3, x3, 2
-	b	.L2421
-.L2451:
-	ldr	x4, [x22, #:lo12:.LANCHOR180]
+	b	.L2427
+.L2457:
+	ldr	x4, [x22, #:lo12:.LANCHOR186]
 	add	x4, x4, x25
 	ldr	w5, [x4, 4]
 	str	w5, [x29, 204]
@@ -17072,54 +17106,54 @@ FtlRecoverySuperblock:
 	bl	P2V_plane
 	and	w0, w0, 65535
 	cmp	w23, w26
-	bcc	.L2426
+	bcc	.L2432
 	ldr	w1, [x29, 180]
 	ccmp	w1, w0, 0, eq
-	bhi	.L2426
+	bhi	.L2432
 	cmp	w23, w20
 	ccmp	w27, w0, 0, eq
-	beq	.L2427
+	beq	.L2433
 	ldr	w0, [x4]
 	cmn	w0, #1
-	beq	.L2428
+	beq	.L2434
 	ldr	x3, [x4, 16]
 	mov	w0, 61589
 	ldrh	w1, [x3]
 	cmp	w1, w0
-	beq	.L2429
+	beq	.L2435
 	ldrh	w0, [x19]
-.L2541:
+.L2547:
 	bl	decrement_vpc_count
-	b	.L2426
-.L2429:
+	b	.L2432
+.L2435:
 	ldr	w21, [x3, 4]
 	cmn	w21, #1
-	beq	.L2430
+	beq	.L2436
 	ldr	x0, [x29, 168]
-	ldr	w1, [x0, #:lo12:.LANCHOR160]
+	ldr	w1, [x0, #:lo12:.LANCHOR165]
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2430
+	cbz	w0, .L2436
 	ldr	x1, [x29, 168]
 	add	w0, w21, 1
-	str	w0, [x1, #:lo12:.LANCHOR160]
-.L2430:
+	str	w0, [x1, #:lo12:.LANCHOR165]
+.L2436:
 	ldp	w24, w0, [x3, 8]
 	add	x1, x29, 200
 	str	w0, [x29, 196]
 	mov	w2, 0
 	mov	w0, w24
 	bl	log2phys
-	ldr	w1, [x28, #:lo12:.LANCHOR136]
+	ldr	w1, [x28, #:lo12:.LANCHOR139]
 	ldr	w3, [x29, 196]
 	cmn	w1, #1
-	beq	.L2431
+	beq	.L2437
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2431
+	cbz	w0, .L2437
 	cmn	w3, #1
-	beq	.L2432
-	ldr	x0, [x22, #:lo12:.LANCHOR180]
+	beq	.L2438
+	ldr	x0, [x22, #:lo12:.LANCHOR186]
 	mov	w2, 0
 	mov	w1, 1
 	add	x0, x0, x25
@@ -17127,20 +17161,20 @@ FtlRecoverySuperblock:
 	str	w3, [x0, 4]
 	str	x4, [x29, 152]
 	bl	FlashReadPages
-	ldr	x0, [x22, #:lo12:.LANCHOR180]
+	ldr	x0, [x22, #:lo12:.LANCHOR186]
 	ldr	x4, [x29, 152]
 	add	x3, x0, x25
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	bne	.L2433
-.L2434:
+	bne	.L2439
+.L2440:
 	mov	w0, -1
 	str	w0, [x29, 196]
-.L2441:
+.L2447:
 	ldr	w3, [x29, 196]
 	cmn	w3, #1
-	beq	.L2426
-.L2457:
+	beq	.L2432
+.L2463:
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
 	and	w24, w0, 65535
@@ -17148,11 +17182,11 @@ FtlRecoverySuperblock:
 	mov	w3, w24
 	ldrh	w0, [x0, #:lo12:.LANCHOR40]
 	cmp	w0, w24
-	bhi	.L2447
-	mov	w2, 2457
-	adrp	x1, .LANCHOR236
+	bhi	.L2453
+	mov	w2, 2683
+	adrp	x1, .LANCHOR240
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR236
+	add	x1, x1, :lo12:.LANCHOR240
 	add	x0, x0, :lo12:.LC5
 	str	w24, [x29, 152]
 	bl	printf
@@ -17162,50 +17196,50 @@ FtlRecoverySuperblock:
 	add	x0, x0, :lo12:.LC7
 	bl	printf
 	ldr	w3, [x29, 152]
-.L2447:
-	adrp	x1, .LANCHOR83
+.L2453:
+	adrp	x1, .LANCHOR85
 	ubfiz	x0, x24, 1, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR83]
+	ldr	x1, [x1, #:lo12:.LANCHOR85]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L2448
+	cbz	w0, .L2454
 	mov	w0, w3
-	b	.L2541
-.L2432:
+	b	.L2547
+.L2438:
 	ldp	w1, w0, [x29, 200]
 	cmp	w1, w0
-	bne	.L2426
+	bne	.L2432
 	mov	w2, 1
 	add	x1, x29, 196
 	mov	w0, w24
 	bl	log2phys
-.L2426:
+.L2432:
 	add	x25, x25, 56
-	b	.L2425
-.L2433:
+	b	.L2431
+.L2439:
 	ldr	w0, [x4, 8]
 	cmp	w24, w0
-	bne	.L2434
+	bne	.L2440
 	ldr	w0, [x4, 4]
 	str	w0, [x29, 152]
 	str	x4, [x29, 104]
 	uxtw	x1, w0
-	ldr	w0, [x28, #:lo12:.LANCHOR136]
+	ldr	w0, [x28, #:lo12:.LANCHOR139]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2434
+	cbz	w0, .L2440
 	ldp	w0, w1, [x29, 200]
 	ldr	x4, [x29, 104]
 	cmp	w0, w1
 	ldr	w1, [x29, 196]
-	bne	.L2436
-.L2540:
+	bne	.L2442
+.L2546:
 	mov	w0, w24
 	bl	FtlReUsePrevPpa
-	b	.L2434
-.L2436:
+	b	.L2440
+.L2442:
 	cmp	w0, w1
-	beq	.L2434
+	beq	.L2440
 	cmn	w0, #1
-	beq	.L2437
+	beq	.L2443
 	ldr	x4, [x3, 16]
 	mov	w2, 0
 	str	w0, [x3, 4]
@@ -17214,132 +17248,132 @@ FtlRecoverySuperblock:
 	mov	x0, x3
 	bl	FlashReadPages
 	ldr	x4, [x29, 104]
-.L2438:
-	ldr	x0, [x22, #:lo12:.LANCHOR180]
+.L2444:
+	ldr	x0, [x22, #:lo12:.LANCHOR186]
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	beq	.L2439
+	beq	.L2445
 	ldr	x0, [x29, 112]
 	ldr	w3, [x4, 4]
 	mov	w1, w3
 	ldr	w0, [x0]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2439
+	cbz	w0, .L2445
 	ldr	w0, [x29, 152]
 	mov	w1, w3
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2434
-.L2439:
+	cbz	w0, .L2440
+.L2445:
 	ldr	w1, [x29, 196]
-	b	.L2540
-.L2437:
+	b	.L2546
+.L2443:
 	str	w0, [x3]
-	b	.L2438
-.L2431:
+	b	.L2444
+.L2437:
 	ldp	w1, w0, [x29, 200]
 	cmp	w1, w0
-	beq	.L2441
+	beq	.L2447
 	cmn	w3, #1
-	beq	.L2443
+	beq	.L2449
 	adrp	x0, .LANCHOR43
 	ubfx	x3, x3, 10, 21
 	ldr	w0, [x0, #:lo12:.LANCHOR43]
 	cmp	w3, w0
-	bcs	.L2426
-.L2443:
+	bcs	.L2432
+.L2449:
 	mov	w2, 1
 	add	x1, x29, 204
 	mov	w0, w24
 	bl	log2phys
 	ldr	w3, [x29, 200]
 	cmn	w3, #1
-	beq	.L2441
+	beq	.L2447
 	ldr	w0, [x29, 196]
 	cmp	w3, w0
-	beq	.L2457
+	beq	.L2463
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
-	adrp	x1, .LANCHOR91
+	adrp	x1, .LANCHOR93
 	and	w0, w0, 65535
-	ldrh	w1, [x1, #:lo12:.LANCHOR91]
+	ldrh	w1, [x1, #:lo12:.LANCHOR93]
 	cmp	w1, w0
-	beq	.L2446
-	adrp	x1, .LANCHOR92
-	ldrh	w1, [x1, #:lo12:.LANCHOR92]
+	beq	.L2452
+	adrp	x1, .LANCHOR94
+	ldrh	w1, [x1, #:lo12:.LANCHOR94]
 	cmp	w1, w0
-	beq	.L2446
-	adrp	x1, .LANCHOR93
-	ldrh	w1, [x1, #:lo12:.LANCHOR93]
+	beq	.L2452
+	adrp	x1, .LANCHOR95
+	ldrh	w1, [x1, #:lo12:.LANCHOR95]
 	cmp	w1, w0
-	bne	.L2441
-.L2446:
-	ldr	x0, [x22, #:lo12:.LANCHOR180]
+	bne	.L2447
+.L2452:
+	ldr	x0, [x22, #:lo12:.LANCHOR186]
 	mov	w2, 0
 	mov	w1, 1
 	ldr	x4, [x0, 16]
 	str	w3, [x0, 4]
 	str	x4, [x29, 152]
 	bl	FlashReadPages
-	ldr	x0, [x22, #:lo12:.LANCHOR180]
+	ldr	x0, [x22, #:lo12:.LANCHOR186]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L2441
+	beq	.L2447
 	ldr	x4, [x29, 152]
 	mov	w0, w21
 	ldr	w1, [x4, 4]
 	bl	ftl_cmp_data_ver
-	cbnz	w0, .L2441
+	cbnz	w0, .L2447
 	mov	w2, 1
 	add	x1, x29, 200
 	mov	w0, w24
 	bl	log2phys
-	b	.L2441
-.L2448:
+	b	.L2447
+.L2454:
 	mov	w1, w24
-	adrp	x0, .LC67
-	add	x0, x0, :lo12:.LC67
+	adrp	x0, .LC70
+	add	x0, x0, :lo12:.LC70
 	bl	printf
-	b	.L2426
-.L2428:
+	b	.L2432
+.L2434:
 	ldr	x1, [x29, 120]
 	mov	w2, w21
 	ldrh	w0, [x19]
 	strh	w0, [x1]
 	mov	w1, w5
-	adrp	x0, .LC68
-	add	x0, x0, :lo12:.LC68
+	adrp	x0, .LC71
+	add	x0, x0, :lo12:.LC71
 	bl	printf
-	adrp	x2, .LANCHOR239
-	ldr	w0, [x2, #:lo12:.LANCHOR239]
+	adrp	x2, .LANCHOR243
+	ldr	w0, [x2, #:lo12:.LANCHOR243]
 	cmp	w0, 31
-	bhi	.L2449
-	adrp	x1, .LANCHOR240
-	add	x1, x1, :lo12:.LANCHOR240
+	bhi	.L2455
+	adrp	x1, .LANCHOR244
+	add	x1, x1, :lo12:.LANCHOR244
 	ldr	w3, [x29, 204]
 	str	w3, [x1, w0, uxtw 2]
 	add	w0, w0, 1
-	str	w0, [x2, #:lo12:.LANCHOR239]
-.L2449:
+	str	w0, [x2, #:lo12:.LANCHOR243]
+.L2455:
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-	ldr	w0, [x28, #:lo12:.LANCHOR136]
+	ldr	w0, [x28, #:lo12:.LANCHOR139]
 	cmn	w0, #1
-	bne	.L2450
-.L2542:
-	str	w21, [x28, #:lo12:.LANCHOR136]
-	b	.L2426
-.L2450:
+	bne	.L2456
+.L2548:
+	str	w21, [x28, #:lo12:.LANCHOR139]
+	b	.L2432
+.L2456:
 	cmp	w21, w0
-	bcs	.L2426
-	b	.L2542
-.L2454:
+	bcs	.L2432
+	b	.L2548
+.L2460:
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L2453
-.L2427:
+	b	.L2459
+.L2433:
 	strb	w27, [x19, 6]
 	strh	w20, [x19, 2]
-	b	.L2544
+	b	.L2550
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
 	.section	.text.FtlGcScanTempBlk,"ax",@progbits
 	.align	2
@@ -17347,102 +17381,88 @@ FtlRecoverySuperblock:
 	.type	FtlGcScanTempBlk, %function
 FtlGcScanTempBlk:
 	stp	x29, x30, [sp, -176]!
+	mov	w2, 65535
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR241
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	ldrh	w20, [x23, #:lo12:.LANCHOR241]
-	mov	w0, 65535
+	adrp	x0, .LANCHOR245
 	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	ldrh	w20, [x0, #:lo12:.LANCHOR245]
 	stp	x25, x26, [sp, 64]
-	cmp	w20, w0
 	stp	x27, x28, [sp, 80]
-	beq	.L2571
-	cbnz	w20, .L2547
-.L2548:
+	cmp	w20, w2
+	str	x0, [x29, 96]
+	beq	.L2580
+	cbnz	w20, .L2553
+.L2554:
 	bl	FtlGcPageVarInit
-	b	.L2549
-.L2571:
+	b	.L2555
+.L2580:
 	mov	w20, 0
-.L2547:
+.L2553:
 	adrp	x0, .LANCHOR52
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w1
-	beq	.L2548
-.L2549:
-	adrp	x24, .LANCHOR72
-	add	x24, x24, :lo12:.LANCHOR72
-	mov	w26, -1
-.L2550:
+	beq	.L2554
+.L2555:
+	adrp	x24, .LANCHOR74
+	add	x24, x24, :lo12:.LANCHOR74
+	mov	w27, -1
+.L2556:
 	ldrh	w1, [x19]
 	mov	w0, 65535
 	strb	wzr, [x19, 8]
 	cmp	w1, w0
-	beq	.L2551
-	mov	w27, 56
-.L2570:
-	adrp	x1, .LANCHOR104
-	adrp	x22, .LANCHOR180
+	beq	.L2581
+	mov	w28, 56
+.L2579:
+	adrp	x1, .LANCHOR107
+	adrp	x23, .LANCHOR186
 	add	x3, x19, 16
 	mov	w21, 0
-	ldr	x5, [x1, #:lo12:.LANCHOR104]
+	ldr	x5, [x1, #:lo12:.LANCHOR107]
 	adrp	x1, .LANCHOR57
-	ldr	x0, [x22, #:lo12:.LANCHOR180]
+	ldr	x0, [x23, #:lo12:.LANCHOR186]
 	mov	w10, 65535
 	ldrh	w6, [x1, #:lo12:.LANCHOR57]
-	adrp	x1, .LANCHOR105
-	ldr	x7, [x1, #:lo12:.LANCHOR105]
+	adrp	x1, .LANCHOR108
+	ldr	x7, [x1, #:lo12:.LANCHOR108]
 	adrp	x1, .LANCHOR58
 	ldrh	w8, [x1, #:lo12:.LANCHOR58]
 	adrp	x1, .LANCHOR38
 	ldrh	w1, [x1, #:lo12:.LANCHOR38]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.L2552:
+.L2558:
 	cmp	x3, x1
-	bne	.L2554
-	mov	w1, w21
+	bne	.L2560
 	mov	w2, 0
+	mov	w1, w21
 	bl	FlashReadPages
 	adrp	x25, .LANCHOR2
-	umull	x0, w21, w27
-	mov	x21, 0
+	umull	x0, w21, w28
+	add	x25, x25, :lo12:.LANCHOR2
+	mov	x22, 0
 	str	x0, [x29, 104]
-	add	x0, x25, :lo12:.LANCHOR2
-	str	x0, [x29, 96]
-.L2555:
+.L2561:
 	ldr	x0, [x29, 104]
-	cmp	x0, x21
-	bne	.L2569
+	cmp	x22, x0
+	bne	.L2578
 	adrp	x0, .LANCHOR52
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w20
-	bhi	.L2570
-.L2551:
-	strh	w20, [x19, 2]
-	mov	w0, -1
-	strb	wzr, [x19, 6]
-	mov	w1, w20
-	strh	w0, [x23, #:lo12:.LANCHOR241]
+	bhi	.L2579
+.L2581:
 	mov	w2, 0
-	mov	x0, x19
-	bl	ftl_sb_update_avl_pages
-	mov	w0, w26
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 176
-	ret
-.L2554:
+	b	.L2557
+.L2560:
 	ldrh	w2, [x3]
 	cmp	w2, w10
-	beq	.L2553
-	umaddl	x4, w21, w27, x0
+	beq	.L2559
+	umaddl	x4, w21, w28, x0
 	orr	w2, w20, w2, lsl 10
 	str	w2, [x4, 4]
 	mul	w2, w21, w6
@@ -17455,179 +17475,204 @@ FtlGcScanTempBlk:
 	asr	w2, w2, 2
 	add	x2, x7, x2, sxtw 2
 	str	x2, [x4, 16]
-.L2553:
+.L2559:
 	add	x3, x3, 2
-	b	.L2552
-.L2569:
-	ldr	x0, [x22, #:lo12:.LANCHOR180]
-	add	x1, x0, x21
-	ldr	w0, [x0, x21]
-	ldr	w28, [x1, 4]
-	ldr	x25, [x1, 16]
-	cbnz	w0, .L2556
-	ldrh	w1, [x25]
+	b	.L2558
+.L2578:
+	ldr	x4, [x23, #:lo12:.LANCHOR186]
+	add	x5, x4, x22
+	ldr	w26, [x5, 4]
+	lsr	w0, w26, 10
+	bl	P2V_plane
+	and	w2, w0, 65535
+	ldr	w0, [x4, x22]
+	ldr	x21, [x5, 16]
+	cbnz	w0, .L2562
+	ldrh	w1, [x21]
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L2585
+	bne	.L2563
+.L2566:
+	adrp	x0, .LANCHOR16
+	ldrb	w0, [x0, #:lo12:.LANCHOR16]
+	cbz	w0, .L2597
+	adrp	x0, .LANCHOR138
+	mov	w1, 1
+	str	w1, [x0, #:lo12:.LANCHOR138]
+.L2557:
+	ldr	x1, [x29, 96]
+	mov	w0, -1
+	strb	w2, [x19, 6]
+	strh	w20, [x19, 2]
+	strh	w0, [x1, #:lo12:.LANCHOR245]
+	mov	w1, w20
+	mov	x0, x19
+	bl	ftl_sb_update_avl_pages
+	mov	w0, w27
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 176
+	ret
+.L2563:
+	ldr	w0, [x21, 8]
 	ldr	w1, [x24]
-	ldr	w0, [x25, 8]
 	cmp	w0, w1
-	bls	.L2558
-.L2585:
-	adrp	x0, .LANCHOR83
-	ldrh	w1, [x19]
-	ldr	x0, [x0, #:lo12:.LANCHOR83]
-	strh	wzr, [x0, x1, lsl 1]
-	ldrh	w0, [x19]
-	bl	INSERT_FREE_LIST
-	adrp	x1, .LANCHOR205
-	mov	w0, -1
-	strh	w0, [x19]
-	strh	w0, [x1, #:lo12:.LANCHOR205]
-.L2584:
-	bl	FtlGcPageVarInit
-	mov	w20, 0
-	b	.L2550
-.L2558:
-	ldr	x1, [x29, 96]
-	ldrb	w1, [x1]
-	cbnz	w1, .L2560
-.L2561:
-	ldp	w2, w0, [x25, 8]
-	mov	w1, w28
-	add	x21, x21, 56
+	bhi	.L2566
+	ldrb	w1, [x25]
+	cbnz	w1, .L2569
+.L2570:
+	ldp	w2, w0, [x21, 8]
+	mov	w1, w26
+	add	x22, x22, 56
 	bl	FtlGcUpdatePage
-	b	.L2555
-.L2560:
+	b	.L2561
+.L2569:
 	add	x1, x29, 116
 	mov	w2, 0
 	bl	log2phys
-	ldr	w0, [x25, 12]
+	ldr	w0, [x21, 12]
 	ldr	w1, [x29, 116]
 	cmp	w0, w1
-	bne	.L2561
+	bne	.L2570
 	cmn	w0, #1
-	beq	.L2561
+	beq	.L2570
 	str	w0, [x29, 124]
-	adrp	x0, .LANCHOR187
+	adrp	x0, .LANCHOR194
 	mov	w2, 0
 	mov	w1, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR187]
+	ldr	x0, [x0, #:lo12:.LANCHOR194]
 	str	x0, [x29, 128]
-	adrp	x0, .LANCHOR189
-	ldr	x0, [x0, #:lo12:.LANCHOR189]
+	adrp	x0, .LANCHOR196
+	ldr	x0, [x0, #:lo12:.LANCHOR196]
 	str	x0, [x29, 136]
 	add	x0, x29, 120
 	bl	FlashReadPages
 	adrp	x0, .LANCHOR55
-	ldr	x2, [x22, #:lo12:.LANCHOR180]
-	ldr	x5, [x29, 128]
+	ldr	x2, [x23, #:lo12:.LANCHOR186]
+	ldr	x4, [x29, 128]
 	ldrh	w1, [x0, #:lo12:.LANCHOR55]
-	add	x2, x2, x21
+	add	x2, x2, x22
 	mov	x0, 0
 	ubfiz	x1, x1, 9, 16
-.L2562:
+.L2571:
 	cmp	x0, x1
-	beq	.L2561
-	ldr	x6, [x2, 8]
-	ldr	w7, [x6, x0]
+	beq	.L2570
+	ldr	x5, [x2, 8]
+	ldr	w6, [x5, x0]
 	add	x0, x0, 4
-	add	x6, x5, x0
-	ldr	w6, [x6, -4]
-	cmp	w7, w6
-	beq	.L2562
+	add	x5, x4, x0
+	ldr	w5, [x5, -4]
+	cmp	w6, w5
+	beq	.L2571
 	ldrh	w1, [x19]
-	adrp	x0, .LC69
+	adrp	x0, .LC72
 	ldr	w2, [x29, 124]
-	add	x0, x0, :lo12:.LC69
+	add	x0, x0, :lo12:.LC72
 	bl	printf
-	b	.L2585
-.L2556:
+.L2597:
+	adrp	x0, .LANCHOR85
 	ldrh	w1, [x19]
-	mov	w2, w28
-	adrp	x0, .LC70
-	add	x0, x0, :lo12:.LC70
+	ldr	x0, [x0, #:lo12:.LANCHOR85]
+	strh	wzr, [x0, x1, lsl 1]
+	ldrh	w0, [x19]
+	bl	INSERT_FREE_LIST
+	adrp	x1, .LANCHOR213
+	mov	w0, -1
+	strh	w0, [x19]
+	strh	w0, [x1, #:lo12:.LANCHOR213]
+.L2596:
+	bl	FtlGcPageVarInit
+	mov	w20, 0
+	b	.L2556
+.L2562:
+	ldrh	w1, [x19]
+	mov	w2, w26
+	adrp	x0, .LC73
+	add	x0, x0, :lo12:.LC73
 	bl	printf
-	adrp	x0, .LANCHOR28
-	ldr	w1, [x0, #:lo12:.LANCHOR28]
+	adrp	x0, .LANCHOR104
+	ldr	w1, [x0, #:lo12:.LANCHOR104]
 	ldrh	w0, [x19]
-	cbnz	w1, .L2565
-	adrp	x1, .LANCHOR15
-	ldrb	w1, [x1, #:lo12:.LANCHOR15]
-	cbz	w1, .L2566
-.L2565:
-	adrp	x2, .LANCHOR78
+	cbnz	w1, .L2574
+	adrp	x1, .LANCHOR16
+	ldrb	w1, [x1, #:lo12:.LANCHOR16]
+	cbz	w1, .L2575
+.L2574:
+	adrp	x2, .LANCHOR80
 	ubfiz	x1, x0, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR78]
+	ldr	x2, [x2, #:lo12:.LANCHOR80]
 	ldrh	w1, [x2, x1]
 	cmp	w1, 159
-	bls	.L2567
-.L2566:
-	ldr	x1, [x22, #:lo12:.LANCHOR180]
-	ldr	w1, [x1, x21]
+	bls	.L2576
+.L2575:
+	ldr	x1, [x23, #:lo12:.LANCHOR186]
+	ldr	w1, [x1, x22]
 	cmn	w1, #1
-	bne	.L2568
-.L2567:
-	ldr	x1, [x22, #:lo12:.LANCHOR180]
-	add	x3, x1, x21
-	ldr	w26, [x3, 4]
-.L2568:
-	adrp	x1, .LANCHOR83
+	bne	.L2577
+.L2576:
+	ldr	x1, [x23, #:lo12:.LANCHOR186]
+	add	x22, x1, x22
+	ldr	w27, [x22, 4]
+.L2577:
+	adrp	x1, .LANCHOR85
 	ubfiz	x0, x0, 1, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR83]
+	ldr	x1, [x1, #:lo12:.LANCHOR85]
 	strh	wzr, [x1, x0]
 	ldrh	w0, [x19]
 	bl	INSERT_FREE_LIST
 	mov	w0, -1
 	strh	w0, [x19]
-	b	.L2584
+	b	.L2596
 	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
 	.section	.text.FtlGcFreeTempBlock,"ax",@progbits
 	.align	2
 	.global	FtlGcFreeTempBlock
 	.type	FtlGcFreeTempBlock, %function
 FtlGcFreeTempBlock:
-	adrp	x0, .LANCHOR76
-	ldr	w0, [x0, #:lo12:.LANCHOR76]
-	cbz	w0, .L2587
+	adrp	x0, .LANCHOR78
+	ldr	w0, [x0, #:lo12:.LANCHOR78]
+	cbz	w0, .L2599
 	mov	w0, 0
 	ret
-.L2587:
+.L2599:
 	stp	x29, x30, [sp, -112]!
 	mov	w1, 65535
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR93
+	adrp	x19, .LANCHOR95
 	stp	x21, x22, [sp, 32]
-	add	x0, x19, :lo12:.LANCHOR93
-	ldrh	w20, [x19, #:lo12:.LANCHOR93]
-	adrp	x21, .LANCHOR135
+	add	x0, x19, :lo12:.LANCHOR95
+	ldrh	w20, [x19, #:lo12:.LANCHOR95]
+	adrp	x21, .LANCHOR138
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w20, w1
 	stp	x27, x28, [sp, 80]
-	beq	.L2589
+	beq	.L2601
 	adrp	x1, .LANCHOR52
 	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	bl	FtlGcScanTempBlk
 	str	w0, [x29, 108]
 	cmn	w0, #1
-	beq	.L2589
-	adrp	x0, .LANCHOR78
+	beq	.L2601
+	adrp	x0, .LANCHOR80
 	ubfiz	x20, x20, 1, 16
-	ldr	x1, [x0, #:lo12:.LANCHOR78]
+	ldr	x1, [x0, #:lo12:.LANCHOR80]
 	ldrh	w0, [x1, x20]
 	cmp	w0, 4
-	bls	.L2590
+	bls	.L2602
 	sub	w0, w0, #5
 	strh	w0, [x1, x20]
 	mov	w0, 1
 	bl	FtlEctTblFlush
-.L2590:
-	ldr	w0, [x21, #:lo12:.LANCHOR135]
-	cbnz	w0, .L2591
-	adrp	x0, .LANCHOR138
-	add	x0, x0, :lo12:.LANCHOR138
+.L2602:
+	ldr	w0, [x21, #:lo12:.LANCHOR138]
+	cbnz	w0, .L2603
+	adrp	x0, .LANCHOR141
+	add	x0, x0, :lo12:.LANCHOR141
 	ldr	w1, [x0, 96]
 	add	w1, w1, 1
 	str	w1, [x0, 96]
@@ -17635,10 +17680,10 @@ FtlGcFreeTempBlock:
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
-.L2591:
-	str	wzr, [x21, #:lo12:.LANCHOR135]
+.L2603:
+	str	wzr, [x21, #:lo12:.LANCHOR138]
 	mov	w0, 1
-.L2586:
+.L2598:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -17646,27 +17691,27 @@ FtlGcFreeTempBlock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2589:
-	str	wzr, [x21, #:lo12:.LANCHOR135]
+.L2601:
+	str	wzr, [x21, #:lo12:.LANCHOR138]
 	mov	w0, 65535
-	ldrh	w1, [x19, #:lo12:.LANCHOR93]
-	add	x21, x19, :lo12:.LANCHOR93
+	ldrh	w1, [x19, #:lo12:.LANCHOR95]
+	add	x21, x19, :lo12:.LANCHOR95
 	cmp	w1, w0
-	beq	.L2613
+	beq	.L2625
 	bl	FtlCacheWriteBack
-	adrp	x20, .LANCHOR110
+	adrp	x20, .LANCHOR113
 	adrp	x0, .LANCHOR52
 	ldrb	w1, [x21, 7]
-	ldrh	w2, [x20, #:lo12:.LANCHOR110]
+	ldrh	w2, [x20, #:lo12:.LANCHOR113]
 	mov	x21, x0
 	ldrh	w3, [x0, #:lo12:.LANCHOR52]
 	mul	w1, w1, w3
 	cmp	w2, w1
-	beq	.L2593
-	mov	w2, 163
-	adrp	x1, .LANCHOR242
+	beq	.L2605
+	mov	w2, 193
+	adrp	x1, .LANCHOR246
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR242
+	add	x1, x1, :lo12:.LANCHOR246
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -17674,88 +17719,88 @@ FtlGcFreeTempBlock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2593:
-	add	x0, x19, :lo12:.LANCHOR93
-	adrp	x22, .LANCHOR83
+.L2605:
+	add	x0, x19, :lo12:.LANCHOR95
+	adrp	x22, .LANCHOR85
 	ldrh	w3, [x21, #:lo12:.LANCHOR52]
-	adrp	x25, .LANCHOR72
-	ldrh	w2, [x19, #:lo12:.LANCHOR93]
-	add	x26, x20, :lo12:.LANCHOR110
+	adrp	x25, .LANCHOR74
+	ldrh	w2, [x19, #:lo12:.LANCHOR95]
+	add	x26, x20, :lo12:.LANCHOR113
 	ldrb	w0, [x0, 7]
-	add	x25, x25, :lo12:.LANCHOR72
-	ldr	x1, [x22, #:lo12:.LANCHOR83]
+	add	x25, x25, :lo12:.LANCHOR74
+	ldr	x1, [x22, #:lo12:.LANCHOR85]
 	mov	w21, 0
-	adrp	x27, .LANCHOR111
+	adrp	x27, .LANCHOR114
 	mul	w0, w0, w3
 	strh	w0, [x1, x2, lsl 1]
-	adrp	x1, .LANCHOR161
-	ldrh	w0, [x20, #:lo12:.LANCHOR110]
-	ldr	w2, [x1, #:lo12:.LANCHOR161]
+	adrp	x1, .LANCHOR166
+	ldrh	w0, [x20, #:lo12:.LANCHOR113]
+	ldr	w2, [x1, #:lo12:.LANCHOR166]
 	add	w0, w0, w2
-	str	w0, [x1, #:lo12:.LANCHOR161]
-.L2594:
+	str	w0, [x1, #:lo12:.LANCHOR166]
+.L2606:
 	ldrh	w0, [x26]
 	cmp	w0, w21
-	bhi	.L2598
+	bhi	.L2610
 	mov	w0, -1
 	bl	decrement_vpc_count
-	adrp	x0, .LANCHOR15
-	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L2599
-	ldrh	w1, [x19, #:lo12:.LANCHOR93]
-	adrp	x0, .LC71
-	add	x0, x0, :lo12:.LC71
+	adrp	x0, .LANCHOR16
+	ldrb	w0, [x0, #:lo12:.LANCHOR16]
+	cbz	w0, .L2611
+	ldrh	w1, [x19, #:lo12:.LANCHOR95]
+	adrp	x0, .LC74
+	add	x0, x0, :lo12:.LC74
 	bl	printf
-.L2599:
-	ldrh	w0, [x19, #:lo12:.LANCHOR93]
-	ldr	x2, [x22, #:lo12:.LANCHOR83]
+.L2611:
+	ldrh	w0, [x19, #:lo12:.LANCHOR95]
+	ldr	x2, [x22, #:lo12:.LANCHOR85]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L2600
+	cbz	w1, .L2612
 	bl	INSERT_DATA_LIST
-.L2601:
-	adrp	x0, .LANCHOR108
+.L2613:
+	adrp	x0, .LANCHOR111
 	mov	w21, -1
-	strh	wzr, [x20, #:lo12:.LANCHOR110]
-	strh	w21, [x19, #:lo12:.LANCHOR93]
-	strh	wzr, [x0, #:lo12:.LANCHOR108]
+	strh	wzr, [x20, #:lo12:.LANCHOR113]
+	strh	w21, [x19, #:lo12:.LANCHOR95]
+	strh	wzr, [x0, #:lo12:.LANCHOR111]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	adrp	x0, .LANCHOR205
-	strh	w21, [x0, #:lo12:.LANCHOR205]
-	adrp	x0, .LANCHOR88
-	ldrh	w1, [x0, #:lo12:.LANCHOR88]
-	adrp	x0, .LANCHOR224
-	ldrh	w0, [x0, #:lo12:.LANCHOR224]
+	adrp	x0, .LANCHOR213
+	strh	w21, [x0, #:lo12:.LANCHOR213]
+	adrp	x0, .LANCHOR90
+	ldrh	w1, [x0, #:lo12:.LANCHOR90]
+	adrp	x0, .LANCHOR232
+	ldrh	w0, [x0, #:lo12:.LANCHOR232]
 	add	w0, w0, w0, lsl 1
 	cmp	w1, w0, lsr 2
-	ble	.L2613
-	adrp	x0, .LANCHOR176
+	ble	.L2625
+	adrp	x0, .LANCHOR181
 	mov	w1, 20
-	strh	w1, [x0, #:lo12:.LANCHOR176]
-.L2613:
+	strh	w1, [x0, #:lo12:.LANCHOR181]
+.L2625:
 	mov	w0, 0
-	b	.L2586
-.L2598:
+	b	.L2598
+.L2610:
 	mov	w24, 12
-	ldr	x28, [x27, #:lo12:.LANCHOR111]
+	ldr	x28, [x27, #:lo12:.LANCHOR114]
 	ldr	w1, [x25]
 	umull	x24, w21, w24
 	add	x23, x28, x24
 	ldr	w0, [x23, 8]
 	cmp	w0, w1
-	bcc	.L2595
-.L2611:
-	ldrh	w0, [x19, #:lo12:.LANCHOR93]
-	b	.L2612
-.L2595:
+	bcc	.L2607
+.L2623:
+	ldrh	w0, [x19, #:lo12:.LANCHOR95]
+	b	.L2624
+.L2607:
 	add	x1, x29, 108
 	mov	w2, 0
 	bl	log2phys
 	ldr	w0, [x28, x24]
 	ldr	w1, [x29, 108]
 	cmp	w0, w1
-	bne	.L2597
+	bne	.L2609
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	mov	w24, w0
@@ -17764,146 +17809,21 @@ FtlGcFreeTempBlock:
 	add	x1, x23, 4
 	bl	log2phys
 	mov	w0, w24
-.L2612:
+.L2624:
 	bl	decrement_vpc_count
-	b	.L2596
-.L2597:
+	b	.L2608
+.L2609:
 	ldr	w0, [x23, 4]
 	cmp	w1, w0
-	bne	.L2611
-.L2596:
+	bne	.L2623
+.L2608:
 	add	w21, w21, 1
 	and	w21, w21, 65535
-	b	.L2594
-.L2600:
+	b	.L2606
+.L2612:
 	bl	INSERT_FREE_LIST
-	b	.L2601
+	b	.L2613
 	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
-	.section	.text.Ftl_get_new_temp_ppa,"ax",@progbits
-	.align	2
-	.global	Ftl_get_new_temp_ppa
-	.type	Ftl_get_new_temp_ppa, %function
-Ftl_get_new_temp_ppa:
-	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR93
-	mov	w2, 65535
-	add	x29, sp, 0
-	str	x19, [sp, 16]
-	mov	x19, x0
-	ldrh	w3, [x0, #:lo12:.LANCHOR93]
-	cmp	w3, w2
-	beq	.L2615
-	add	x1, x0, :lo12:.LANCHOR93
-	ldrh	w0, [x1, 4]
-	cbnz	w0, .L2616
-.L2615:
-	bl	FtlCacheWriteBack
-	mov	w0, 0
-	bl	FtlGcFreeTempBlock
-	add	x0, x19, :lo12:.LANCHOR93
-	strb	wzr, [x0, 8]
-	bl	allocate_data_superblock
-	adrp	x0, .LANCHOR108
-	strh	wzr, [x0, #:lo12:.LANCHOR108]
-	adrp	x0, .LANCHOR110
-	strh	wzr, [x0, #:lo12:.LANCHOR110]
-	bl	l2p_flush
-	mov	w0, 0
-	bl	FtlEctTblFlush
-	bl	FtlVpcTblFlush
-.L2616:
-	add	x0, x19, :lo12:.LANCHOR93
-	ldr	x19, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	b	get_new_active_ppa
-	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
-	.section	.text.Ftl_gc_temp_data_write_back,"ax",@progbits
-	.align	2
-	.global	Ftl_gc_temp_data_write_back
-	.type	Ftl_gc_temp_data_write_back, %function
-Ftl_gc_temp_data_write_back:
-	adrp	x0, .LANCHOR76
-	ldr	w0, [x0, #:lo12:.LANCHOR76]
-	cbz	w0, .L2619
-	mov	w0, 0
-	ret
-.L2622:
-	mov	w0, 0
-.L2618:
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	ret
-.L2619:
-	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR15
-	add	x29, sp, 0
-	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR102
-	cbz	w0, .L2621
-	ldr	w0, [x19, #:lo12:.LANCHOR102]
-	tbz	x0, 0, .L2621
-	adrp	x0, .LANCHOR93+4
-	ldrh	w0, [x0, #:lo12:.LANCHOR93+4]
-	cbnz	w0, .L2622
-.L2621:
-	adrp	x20, .LANCHOR181
-	ldr	w1, [x19, #:lo12:.LANCHOR102]
-	mov	w3, 0
-	mov	w2, 0
-	ldr	x0, [x20, #:lo12:.LANCHOR181]
-	add	x19, x19, :lo12:.LANCHOR102
-	bl	FlashProgPages
-	mov	w11, 0
-	mov	w12, 56
-.L2623:
-	ldr	w1, [x19]
-	cmp	w11, w1
-	bcc	.L2625
-	ldr	x0, [x20, #:lo12:.LANCHOR181]
-	bl	FtlGcBufFree
-	str	wzr, [x19]
-	adrp	x0, .LANCHOR93+4
-	ldrh	w0, [x0, #:lo12:.LANCHOR93+4]
-	cbnz	w0, .L2622
-	mov	w0, 1
-	bl	FtlGcFreeTempBlock
-	b	.L2635
-.L2625:
-	umull	x0, w11, w12
-	ldr	x2, [x20, #:lo12:.LANCHOR181]
-	add	x1, x2, x0
-	ldr	w2, [x2, x0]
-	ldr	x3, [x1, 16]
-	cmn	w2, #1
-	bne	.L2624
-	adrp	x0, .LANCHOR93
-	adrp	x3, .LANCHOR83
-	ldrh	w4, [x0, #:lo12:.LANCHOR93]
-	ldr	x3, [x3, #:lo12:.LANCHOR83]
-	strh	wzr, [x3, x4, lsl 1]
-	strh	w2, [x0, #:lo12:.LANCHOR93]
-	adrp	x0, .LANCHOR138
-	add	x0, x0, :lo12:.LANCHOR138
-	ldr	w2, [x0, 96]
-	add	w2, w2, 1
-	str	w2, [x0, 96]
-	ldr	w0, [x1, 4]
-	lsr	w0, w0, 10
-	bl	FtlBbmMapBadBlock
-	bl	FtlBbmTblFlush
-	bl	FtlGcPageVarInit
-.L2635:
-	mov	w0, 1
-	b	.L2618
-.L2624:
-	ldr	w1, [x1, 4]
-	ldp	w2, w0, [x3, 8]
-	bl	FtlGcUpdatePage
-	add	w11, w11, 1
-	and	w11, w11, 65535
-	b	.L2623
-	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
 	.section	.text.FtlGcPageRecovery,"ax",@progbits
 	.align	2
 	.global	FtlGcPageRecovery
@@ -17913,23 +17833,23 @@ FtlGcPageRecovery:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x20, .LANCHOR52
-	adrp	x19, .LANCHOR93
-	add	x19, x19, :lo12:.LANCHOR93
+	adrp	x19, .LANCHOR95
+	add	x19, x19, :lo12:.LANCHOR95
 	ldrh	w1, [x20, #:lo12:.LANCHOR52]
 	mov	x0, x19
 	bl	FtlGcScanTempBlk
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bcc	.L2636
-	adrp	x0, .LANCHOR127
-	add	x0, x0, :lo12:.LANCHOR127
+	bcc	.L2626
+	adrp	x0, .LANCHOR130
+	add	x0, x0, :lo12:.LANCHOR130
 	bl	FtlMapBlkWriteDumpData
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
-	adrp	x0, .LANCHOR135
-	str	wzr, [x0, #:lo12:.LANCHOR135]
-.L2636:
+	adrp	x0, .LANCHOR138
+	str	wzr, [x0, #:lo12:.LANCHOR138]
+.L2626:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -17940,18 +17860,18 @@ FtlGcPageRecovery:
 	.type	FtlPowerLostRecovery, %function
 FtlPowerLostRecovery:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR239
+	adrp	x0, .LANCHOR243
 	add	x29, sp, 0
 	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR91
-	add	x19, x19, :lo12:.LANCHOR91
-	str	wzr, [x0, #:lo12:.LANCHOR239]
+	adrp	x19, .LANCHOR93
+	add	x19, x19, :lo12:.LANCHOR93
+	str	wzr, [x0, #:lo12:.LANCHOR243]
 	mov	x0, x19
 	bl	FtlRecoverySuperblock
 	mov	x0, x19
-	adrp	x19, .LANCHOR92
+	adrp	x19, .LANCHOR94
 	bl	FtlSlcSuperblockCheck
-	add	x19, x19, :lo12:.LANCHOR92
+	add	x19, x19, :lo12:.LANCHOR94
 	mov	x0, x19
 	bl	FtlRecoverySuperblock
 	mov	x0, x19
@@ -17970,33 +17890,33 @@ FtlPowerLostRecovery:
 	.type	FtlSysBlkInit, %function
 FtlSysBlkInit:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR237
+	adrp	x0, .LANCHOR241
 	mov	w1, -1
 	add	x29, sp, 0
-	strh	w1, [x0, #:lo12:.LANCHOR237]
+	strh	w1, [x0, #:lo12:.LANCHOR241]
 	adrp	x0, .LANCHOR39
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR238
+	adrp	x20, .LANCHOR242
 	ldrh	w0, [x0, #:lo12:.LANCHOR39]
-	strh	wzr, [x20, #:lo12:.LANCHOR238]
+	strh	wzr, [x20, #:lo12:.LANCHOR242]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlScanSysBlk
-	adrp	x0, .LANCHOR210
-	ldrh	w1, [x0, #:lo12:.LANCHOR210]
+	adrp	x0, .LANCHOR218
+	ldrh	w1, [x0, #:lo12:.LANCHOR218]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2642
-.L2644:
+	bne	.L2632
+.L2634:
 	mov	w19, -1
-.L2641:
+.L2631:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2642:
+.L2632:
 	bl	FtlLoadSysInfo
 	mov	w19, w0
-	cbnz	w0, .L2644
+	cbnz	w0, .L2634
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -18008,28 +17928,28 @@ FtlSysBlkInit:
 	bl	FtlUpdateVaildLpn
 	adrp	x0, .LANCHOR67
 	ldrh	w2, [x0, #:lo12:.LANCHOR67]
-	adrp	x0, .LANCHOR96
-	ldr	x1, [x0, #:lo12:.LANCHOR96]
+	adrp	x0, .LANCHOR98
+	ldr	x1, [x0, #:lo12:.LANCHOR98]
 	mov	w0, 0
 	add	x1, x1, 4
-.L2645:
+.L2635:
 	cmp	w0, w2
-	bge	.L2650
+	bge	.L2640
 	ldr	w3, [x1], 16
-	tbz	w3, #31, .L2646
-.L2650:
-	adrp	x3, .LANCHOR160
+	tbz	w3, #31, .L2636
+.L2640:
+	adrp	x3, .LANCHOR165
 	cmp	w0, w2
-	ldr	w1, [x3, #:lo12:.LANCHOR160]
+	ldr	w1, [x3, #:lo12:.LANCHOR165]
 	add	w1, w1, 32
-	str	w1, [x3, #:lo12:.LANCHOR160]
-	bge	.L2652
-.L2647:
-	adrp	x0, .LANCHOR83
-	adrp	x1, .LANCHOR91
-	ldr	x2, [x0, #:lo12:.LANCHOR83]
-	add	x0, x1, :lo12:.LANCHOR91
-	ldrh	w1, [x1, #:lo12:.LANCHOR91]
+	str	w1, [x3, #:lo12:.LANCHOR165]
+	bge	.L2642
+.L2637:
+	adrp	x0, .LANCHOR85
+	adrp	x1, .LANCHOR93
+	ldr	x2, [x0, #:lo12:.LANCHOR85]
+	add	x0, x1, :lo12:.LANCHOR93
+	ldrh	w1, [x1, #:lo12:.LANCHOR93]
 	ldrh	w4, [x0, 4]
 	lsl	x1, x1, 1
 	ldrh	w3, [x2, x1]
@@ -18039,10 +17959,10 @@ FtlSysBlkInit:
 	strh	wzr, [x0, 4]
 	ldrh	w1, [x4, #:lo12:.LANCHOR52]
 	strh	w1, [x0, 2]
-	adrp	x1, .LANCHOR92
+	adrp	x1, .LANCHOR94
 	strb	wzr, [x0, 6]
-	add	x0, x1, :lo12:.LANCHOR92
-	ldrh	w1, [x1, #:lo12:.LANCHOR92]
+	add	x0, x1, :lo12:.LANCHOR94
+	ldrh	w1, [x1, #:lo12:.LANCHOR94]
 	ldrh	w5, [x0, 4]
 	lsl	x1, x1, 1
 	ldrh	w3, [x2, x1]
@@ -18052,191 +17972,219 @@ FtlSysBlkInit:
 	ldrh	w1, [x4, #:lo12:.LANCHOR52]
 	strh	w1, [x0, 2]
 	strh	wzr, [x0, 4]
-	adrp	x0, .LANCHOR80
-	add	x0, x0, :lo12:.LANCHOR80
+	adrp	x0, .LANCHOR82
+	add	x0, x0, :lo12:.LANCHOR82
 	ldrh	w1, [x0, 30]
 	add	w1, w1, 1
 	strh	w1, [x0, 30]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L2654:
+.L2644:
 	bl	FtlVpcTblFlush
-	b	.L2641
-.L2646:
+	b	.L2631
+.L2636:
 	add	w0, w0, 1
-	b	.L2645
-.L2652:
-	ldrh	w0, [x20, #:lo12:.LANCHOR238]
-	cbnz	w0, .L2647
+	b	.L2635
+.L2642:
+	ldrh	w0, [x20, #:lo12:.LANCHOR242]
+	cbnz	w0, .L2637
 	bl	l2p_flush
-	b	.L2654
+	b	.L2644
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.section	.text.FtlLowFormat,"ax",@progbits
 	.align	2
 	.global	FtlLowFormat
 	.type	FtlLowFormat, %function
 FtlLowFormat:
-	adrp	x0, .LANCHOR76
-	ldr	w0, [x0, #:lo12:.LANCHOR76]
-	cbnz	w0, .L2687
-	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR195
+	adrp	x0, .LANCHOR78
+	ldr	w0, [x0, #:lo12:.LANCHOR78]
+	cbnz	w0, .L2677
+	stp	x29, x30, [sp, -96]!
+	adrp	x0, .LANCHOR203
 	mov	w1, 0
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR66
-	ldr	x0, [x0, #:lo12:.LANCHOR195]
-	adrp	x20, .LANCHOR159
+	ldr	x0, [x0, #:lo12:.LANCHOR203]
+	adrp	x20, .LANCHOR164
 	ldrh	w2, [x19, #:lo12:.LANCHOR66]
-	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR39
-	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
+	adrp	x24, .LANCHOR39
+	stp	x21, x22, [sp, 32]
+	stp	x25, x26, [sp, 64]
 	lsl	w2, w2, 2
+	str	x27, [sp, 80]
 	bl	ftl_memset
-	adrp	x0, .LANCHOR131
+	adrp	x0, .LANCHOR134
 	ldrh	w2, [x19, #:lo12:.LANCHOR66]
 	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR131]
+	ldr	x0, [x0, #:lo12:.LANCHOR134]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	str	wzr, [x20, #:lo12:.LANCHOR159]
-	adrp	x0, .LANCHOR160
-	str	wzr, [x0, #:lo12:.LANCHOR160]
-	ldrh	w0, [x25, #:lo12:.LANCHOR39]
+	str	wzr, [x20, #:lo12:.LANCHOR164]
+	adrp	x0, .LANCHOR165
+	str	wzr, [x0, #:lo12:.LANCHOR165]
+	ldrh	w0, [x24, #:lo12:.LANCHOR39]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	w0, .L2658
+	cbz	w0, .L2648
 	bl	FtlMakeBbt
-.L2658:
-	adrp	x22, .LANCHOR55
-	adrp	x0, .LANCHOR186
+.L2648:
+	adrp	x23, .LANCHOR55
+	adrp	x0, .LANCHOR193
 	mov	w6, 23752
-	ldrh	w1, [x22, #:lo12:.LANCHOR55]
+	ldrh	w1, [x23, #:lo12:.LANCHOR55]
 	movk	w6, 0xa0f, lsl 16
-	ldr	x4, [x0, #:lo12:.LANCHOR186]
-	adrp	x0, .LANCHOR187
+	ldr	x4, [x0, #:lo12:.LANCHOR193]
+	adrp	x0, .LANCHOR194
 	lsl	w1, w1, 7
-	ldr	x5, [x0, #:lo12:.LANCHOR187]
+	ldr	x5, [x0, #:lo12:.LANCHOR194]
 	mov	w0, 0
-.L2659:
+.L2649:
 	cmp	w0, w1
-	blt	.L2660
+	blt	.L2650
 	adrp	x21, .LANCHOR40
-	adrp	x19, .LANCHOR41
-	add	x26, x19, :lo12:.LANCHOR41
-	mov	w23, 0
-	ldrh	w24, [x21, #:lo12:.LANCHOR40]
-.L2661:
+	adrp	x22, .LANCHOR41
+	add	x26, x22, :lo12:.LANCHOR41
+	mov	w19, 0
+	ldrh	w25, [x21, #:lo12:.LANCHOR40]
+.L2651:
 	ldrh	w0, [x26]
-	cmp	w0, w24
-	bhi	.L2662
-	adrp	x24, .LANCHOR38
-	sub	w1, w23, #2
-	ldrh	w0, [x24, #:lo12:.LANCHOR38]
+	cmp	w0, w25
+	bhi	.L2652
+	adrp	x26, .LANCHOR38
+	sub	w1, w19, #2
+	ldrh	w0, [x26, #:lo12:.LANCHOR38]
 	cmp	w1, w0, lsl 1
-	bgt	.L2663
-.L2667:
-	add	x26, x21, :lo12:.LANCHOR40
-	mov	w23, 0
+	ble	.L2653
+	adrp	x1, .LANCHOR65
+	add	x25, x22, :lo12:.LANCHOR41
+	udiv	w0, w19, w0
+	ldr	w19, [x1, #:lo12:.LANCHOR65]
+	add	w0, w0, w19
+	bl	FtlSysBlkNumInit
+	ldrh	w0, [x24, #:lo12:.LANCHOR39]
+	mov	w19, 0
+	bl	FtlFreeSysBlkQueueInit
+	ldrh	w24, [x21, #:lo12:.LANCHOR40]
+.L2654:
+	ldrh	w0, [x25]
+	cmp	w0, w24
+	bhi	.L2655
+.L2653:
+	add	x27, x21, :lo12:.LANCHOR40
+	mov	w24, 0
 	mov	w25, 0
-.L2664:
-	ldrh	w0, [x26]
+.L2656:
+	ldrh	w0, [x27]
 	cmp	w0, w25
-	bhi	.L2668
-	adrp	x0, .LANCHOR73
-	ldrh	w1, [x19, #:lo12:.LANCHOR41]
-	ldrh	w3, [x24, #:lo12:.LANCHOR38]
-	str	w1, [x0, #:lo12:.LANCHOR73]
+	bhi	.L2657
+	adrp	x0, .LANCHOR75
+	ldrh	w1, [x22, #:lo12:.LANCHOR41]
+	adrp	x2, .LANCHOR232
+	str	w1, [x0, #:lo12:.LANCHOR75]
 	adrp	x0, .LANCHOR42
-	adrp	x1, .LANCHOR224
-	ldr	w2, [x0, #:lo12:.LANCHOR42]
-	adrp	x0, .LANCHOR72
-	udiv	w6, w2, w3
+	ldrh	w1, [x26, #:lo12:.LANCHOR38]
+	ldr	w3, [x0, #:lo12:.LANCHOR42]
+	adrp	x0, .LANCHOR74
+	udiv	w6, w3, w1
 	ubfx	x5, x6, 5, 16
-	str	w6, [x0, #:lo12:.LANCHOR72]
+	str	w6, [x0, #:lo12:.LANCHOR74]
 	add	w4, w5, 36
-	strh	w4, [x1, #:lo12:.LANCHOR224]
+	strh	w4, [x2, #:lo12:.LANCHOR232]
 	mov	w4, 24
-	mul	w4, w3, w4
-	cmp	w23, w4
-	ble	.L2669
-	sub	w2, w2, w23
-	udiv	w2, w2, w3
-	str	w2, [x0, #:lo12:.LANCHOR72]
-	lsr	w2, w2, 5
-	add	w2, w2, 24
-	strh	w2, [x1, #:lo12:.LANCHOR224]
-.L2669:
-	adrp	x2, .LANCHOR28
-	ldr	w2, [x2, #:lo12:.LANCHOR28]
-	cmp	w2, 1
-	bne	.L2670
-	udiv	w4, w23, w3
-	ldrh	w2, [x1, #:lo12:.LANCHOR224]
-	add	w4, w4, w2
-	add	w4, w2, w4, asr 2
-	strh	w4, [x1, #:lo12:.LANCHOR224]
-.L2670:
-	adrp	x2, .LANCHOR15
-	ldrb	w2, [x2, #:lo12:.LANCHOR15]
-	cbz	w2, .L2671
-	udiv	w4, w23, w3
-	ldrh	w2, [x1, #:lo12:.LANCHOR224]
-	add	w4, w4, w2
-	add	w4, w2, w4, asr 2
-	strh	w4, [x1, #:lo12:.LANCHOR224]
-.L2671:
-	adrp	x2, .LANCHOR49
-	ldrh	w2, [x2, #:lo12:.LANCHOR49]
-	cbz	w2, .L2673
-	ldrh	w4, [x1, #:lo12:.LANCHOR224]
-	add	w4, w4, w2, lsr 1
-	strh	w4, [x1, #:lo12:.LANCHOR224]
-	mul	w4, w2, w3
-	cmp	w23, w4
-	bge	.L2673
-	add	w2, w2, 32
-	str	w6, [x0, #:lo12:.LANCHOR72]
-	add	w2, w5, w2
-	strh	w2, [x1, #:lo12:.LANCHOR224]
-.L2673:
-	ldrh	w2, [x1, #:lo12:.LANCHOR224]
-	adrp	x25, .LANCHOR223
-	ldr	w1, [x0, #:lo12:.LANCHOR72]
-	adrp	x24, .LANCHOR83
-	mov	w23, -1
-	sub	w1, w1, w2
-	mul	w3, w1, w3
-	adrp	x1, .LANCHOR52
-	str	w3, [x25, #:lo12:.LANCHOR223]
-	ldrh	w1, [x1, #:lo12:.LANCHOR52]
-	mul	w3, w1, w3
-	str	w3, [x0, #:lo12:.LANCHOR72]
-	ldrh	w0, [x22, #:lo12:.LANCHOR55]
-	mul	w3, w0, w3
+	mul	w4, w1, w4
+	cmp	w24, w4
+	ble	.L2658
+	sub	w3, w3, w24
+	udiv	w3, w3, w1
+	str	w3, [x0, #:lo12:.LANCHOR74]
+	lsr	w3, w3, 5
+	add	w3, w3, 24
+	strh	w3, [x2, #:lo12:.LANCHOR232]
+.L2658:
+	adrp	x3, .LANCHOR104
+	ldr	w3, [x3, #:lo12:.LANCHOR104]
+	cmp	w3, 1
+	bne	.L2659
+	udiv	w4, w24, w1
+	ldrh	w3, [x2, #:lo12:.LANCHOR232]
+	add	w4, w4, w3
+	add	w4, w3, w4, asr 2
+	strh	w4, [x2, #:lo12:.LANCHOR232]
+.L2659:
+	adrp	x3, .LANCHOR16
+	ldrb	w3, [x3, #:lo12:.LANCHOR16]
+	cbz	w3, .L2660
+	udiv	w4, w24, w1
+	ldrh	w3, [x2, #:lo12:.LANCHOR232]
+	add	w4, w4, w3
+	add	w4, w3, w4, asr 2
+	strh	w4, [x2, #:lo12:.LANCHOR232]
+.L2660:
+	adrp	x3, .LANCHOR49
+	ldrh	w3, [x3, #:lo12:.LANCHOR49]
+	cbz	w3, .L2662
+	ldrh	w4, [x2, #:lo12:.LANCHOR232]
+	add	w4, w4, w3, lsr 1
+	strh	w4, [x2, #:lo12:.LANCHOR232]
+	mul	w4, w3, w1
+	cmp	w24, w4
+	bge	.L2662
+	add	w3, w3, 32
+	str	w6, [x0, #:lo12:.LANCHOR74]
+	add	w3, w5, w3
+	strh	w3, [x2, #:lo12:.LANCHOR232]
+.L2662:
+	ldrh	w3, [x2, #:lo12:.LANCHOR232]
+	adrp	x25, .LANCHOR231
+	ldr	w2, [x0, #:lo12:.LANCHOR74]
+	sub	w2, w2, w3
+	mul	w1, w2, w1
+	adrp	x2, .LANCHOR52
+	str	w1, [x25, #:lo12:.LANCHOR231]
+	ldrh	w2, [x2, #:lo12:.LANCHOR52]
+	mul	w1, w2, w1
+	str	w1, [x0, #:lo12:.LANCHOR74]
+	ldrh	w0, [x23, #:lo12:.LANCHOR55]
+	mul	w1, w0, w1
 	adrp	x0, .LANCHOR68
-	str	w3, [x0, #:lo12:.LANCHOR68]
+	str	w1, [x0, #:lo12:.LANCHOR68]
 	bl	FtlBbmTblFlush
-	ldr	x0, [x24, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR43
+	add	w1, w19, w24
+	ldr	w2, [x0, #:lo12:.LANCHOR43]
+	adrp	x0, .LANCHOR59
+	ldrh	w0, [x0, #:lo12:.LANCHOR59]
+	add	w0, w0, w2, lsr 3
+	cmp	w1, w0
+	bls	.L2664
+	adrp	x0, .LC75
+	lsr	w2, w2, 5
+	add	x0, x0, :lo12:.LC75
+	bl	printf
+.L2664:
+	adrp	x24, .LANCHOR85
+	ldrh	w2, [x22, #:lo12:.LANCHOR41]
 	mov	w1, 0
-	ldrh	w2, [x19, #:lo12:.LANCHOR41]
+	mov	w22, -1
+	ldr	x0, [x24, #:lo12:.LANCHOR85]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	adrp	x0, .LANCHOR100
-	adrp	x1, .LANCHOR205
+	adrp	x0, .LANCHOR102
+	adrp	x1, .LANCHOR213
 	ldrh	w2, [x21, #:lo12:.LANCHOR40]
-	str	wzr, [x0, #:lo12:.LANCHOR100]
-	add	x0, x1, :lo12:.LANCHOR205
-	strh	w23, [x1, #:lo12:.LANCHOR205]
+	str	wzr, [x0, #:lo12:.LANCHOR102]
+	add	x0, x1, :lo12:.LANCHOR213
+	strh	w22, [x1, #:lo12:.LANCHOR213]
 	mov	w1, 255
 	lsr	w2, w2, 3
 	strh	wzr, [x0, 2]
 	strb	wzr, [x0, 6]
 	strb	wzr, [x0, 8]
-	adrp	x0, .LANCHOR91
-	add	x19, x0, :lo12:.LANCHOR91
-	strh	wzr, [x0, #:lo12:.LANCHOR91]
+	adrp	x0, .LANCHOR93
+	add	x19, x0, :lo12:.LANCHOR93
+	strh	wzr, [x0, #:lo12:.LANCHOR93]
 	mov	w0, 1
 	strb	w0, [x19, 8]
 	adrp	x0, .LANCHOR1
@@ -18244,20 +18192,20 @@ FtlLowFormat:
 	ldr	x0, [x0, #:lo12:.LANCHOR1]
 	strb	wzr, [x19, 6]
 	bl	ftl_memset
-.L2675:
+.L2665:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L2676
-	ldr	x1, [x24, #:lo12:.LANCHOR83]
+	cbnz	w1, .L2666
+	ldr	x1, [x24, #:lo12:.LANCHOR85]
 	ubfiz	x0, x0, 1, 16
-	strh	w23, [x1, x0]
+	strh	w22, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L2675
-.L2660:
+	b	.L2665
+.L2650:
 	ubfiz	x3, x0, 2, 16
 	mvn	w2, w0
 	orr	w2, w0, w2, lsl 16
@@ -18265,210 +18213,329 @@ FtlLowFormat:
 	and	w0, w0, 65535
 	str	w2, [x4, x3]
 	str	w6, [x5, x3]
-	b	.L2659
-.L2662:
+	b	.L2649
+.L2652:
+	mov	w0, w25
+	mov	w1, 1
+	add	w25, w25, 1
+	bl	FtlLowFormatEraseBlock
+	add	w19, w19, w0
+	and	w25, w25, 65535
+	and	w19, w19, 65535
+	b	.L2651
+.L2655:
 	mov	w0, w24
 	mov	w1, 1
 	add	w24, w24, 1
 	bl	FtlLowFormatEraseBlock
-	add	w23, w23, w0
+	add	w19, w19, w0
 	and	w24, w24, 65535
-	and	w23, w23, 65535
-	b	.L2661
-.L2663:
-	udiv	w0, w23, w0
-	adrp	x1, .LANCHOR65
-	ldr	w23, [x1, #:lo12:.LANCHOR65]
-	add	w0, w0, w23
-	bl	FtlSysBlkNumInit
-	ldrh	w0, [x25, #:lo12:.LANCHOR39]
-	add	x25, x19, :lo12:.LANCHOR41
-	bl	FtlFreeSysBlkQueueInit
-	ldrh	w23, [x21, #:lo12:.LANCHOR40]
-.L2665:
-	ldrh	w0, [x25]
-	cmp	w0, w23
-	bls	.L2667
-	mov	w0, w23
-	add	w23, w23, 1
-	mov	w1, 1
-	and	w23, w23, 65535
-	bl	FtlLowFormatEraseBlock
-	b	.L2665
-.L2668:
+	and	w19, w19, 65535
+	b	.L2654
+.L2657:
 	mov	w0, w25
 	mov	w1, 0
 	add	w25, w25, 1
 	bl	FtlLowFormatEraseBlock
-	add	w23, w23, w0
+	add	w24, w24, w0
 	and	w25, w25, 65535
-	and	w23, w23, 65535
-	b	.L2664
-.L2676:
-	ldr	w1, [x20, #:lo12:.LANCHOR159]
+	and	w24, w24, 65535
+	b	.L2656
+.L2666:
+	ldr	w1, [x20, #:lo12:.LANCHOR164]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
-	mov	w23, -1
+	mov	w22, -1
 	add	w1, w1, 1
-	str	w1, [x20, #:lo12:.LANCHOR159]
-	ldr	x1, [x24, #:lo12:.LANCHOR83]
+	str	w1, [x20, #:lo12:.LANCHOR164]
+	ldr	x1, [x24, #:lo12:.LANCHOR85]
 	ldrh	w2, [x19, 4]
 	strh	w2, [x1, x0]
-	adrp	x2, .LANCHOR92
-	add	x0, x2, :lo12:.LANCHOR92
+	adrp	x2, .LANCHOR94
+	add	x0, x2, :lo12:.LANCHOR94
 	ldrh	w1, [x19]
 	mov	x19, x0
 	add	w1, w1, 1
 	strh	wzr, [x0, 2]
-	strh	w1, [x2, #:lo12:.LANCHOR92]
+	strh	w1, [x2, #:lo12:.LANCHOR94]
 	mov	w1, 1
 	strb	wzr, [x0, 6]
 	strb	w1, [x0, 8]
-.L2677:
+.L2667:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L2678
-	ldr	x1, [x24, #:lo12:.LANCHOR83]
+	cbnz	w1, .L2668
+	ldr	x1, [x24, #:lo12:.LANCHOR85]
 	ubfiz	x0, x0, 1, 16
-	strh	w23, [x1, x0]
+	strh	w22, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L2677
-.L2678:
-	ldr	w1, [x20, #:lo12:.LANCHOR159]
+	b	.L2667
+.L2668:
+	ldr	w1, [x20, #:lo12:.LANCHOR164]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
 	add	w1, w1, 1
-	str	w1, [x20, #:lo12:.LANCHOR159]
-	ldr	x1, [x24, #:lo12:.LANCHOR83]
+	str	w1, [x20, #:lo12:.LANCHOR164]
+	ldr	x1, [x24, #:lo12:.LANCHOR85]
 	ldrh	w2, [x19, 4]
 	mov	w19, -1
 	strh	w2, [x1, x0]
-	adrp	x0, .LANCHOR93
-	strh	w19, [x0, #:lo12:.LANCHOR93]
+	adrp	x0, .LANCHOR95
+	strh	w19, [x0, #:lo12:.LANCHOR95]
 	bl	FtlFreeSysBlkQueueOut
-	adrp	x2, .LANCHOR210
-	add	x1, x2, :lo12:.LANCHOR210
-	strh	w0, [x2, #:lo12:.LANCHOR210]
-	ldr	w0, [x25, #:lo12:.LANCHOR223]
+	adrp	x2, .LANCHOR218
+	add	x1, x2, :lo12:.LANCHOR218
+	strh	w0, [x2, #:lo12:.LANCHOR218]
+	ldr	w0, [x25, #:lo12:.LANCHOR231]
 	strh	w0, [x1, 6]
-	ldr	w0, [x20, #:lo12:.LANCHOR159]
+	ldr	w0, [x20, #:lo12:.LANCHOR164]
 	str	w0, [x1, 8]
 	add	w0, w0, 1
 	strh	wzr, [x1, 2]
 	strh	w19, [x1, 4]
-	str	w0, [x20, #:lo12:.LANCHOR159]
+	str	w0, [x20, #:lo12:.LANCHOR164]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	w0, .L2657
-	adrp	x0, .LANCHOR232
+	cbnz	w0, .L2647
+	adrp	x0, .LANCHOR247
 	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR232]
-.L2657:
+	str	w1, [x0, #:lo12:.LANCHOR247]
+.L2647:
 	mov	w0, 0
+	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
+	ldp	x29, x30, [sp], 96
 	ret
-.L2687:
+.L2677:
 	mov	w0, 0
 	ret
 	.size	FtlLowFormat, .-FtlLowFormat
-	.section	.text.rk_ftl_garbage_collect,"ax",@progbits
+	.section	.text.Ftl_gc_temp_data_write_back,"ax",@progbits
 	.align	2
-	.global	rk_ftl_garbage_collect
-	.type	rk_ftl_garbage_collect, %function
-rk_ftl_garbage_collect:
-	adrp	x1, .LANCHOR76
-	ldr	w1, [x1, #:lo12:.LANCHOR76]
-	cbnz	w1, .L2749
+	.global	Ftl_gc_temp_data_write_back
+	.type	Ftl_gc_temp_data_write_back, %function
+Ftl_gc_temp_data_write_back:
+	adrp	x0, .LANCHOR78
+	ldr	w0, [x0, #:lo12:.LANCHOR78]
+	cbz	w0, .L2681
+	mov	w0, 0
+	ret
+.L2684:
+	mov	w0, 0
+.L2680:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L2681:
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR16
+	add	x29, sp, 0
+	ldrb	w0, [x0, #:lo12:.LANCHOR16]
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR105
+	cbz	w0, .L2683
+	ldr	w0, [x19, #:lo12:.LANCHOR105]
+	tbz	x0, 0, .L2683
+	adrp	x0, .LANCHOR95+4
+	ldrh	w0, [x0, #:lo12:.LANCHOR95+4]
+	cbnz	w0, .L2684
+.L2683:
+	adrp	x20, .LANCHOR187
+	ldr	w1, [x19, #:lo12:.LANCHOR105]
+	mov	w3, 0
+	mov	w2, 0
+	ldr	x0, [x20, #:lo12:.LANCHOR187]
+	add	x19, x19, :lo12:.LANCHOR105
+	bl	FlashProgPages
+	mov	w11, 0
+	mov	w12, 56
+.L2685:
+	ldr	w1, [x19]
+	cmp	w11, w1
+	bcc	.L2687
+	ldr	x0, [x20, #:lo12:.LANCHOR187]
+	bl	FtlGcBufFree
+	str	wzr, [x19]
+	adrp	x0, .LANCHOR95+4
+	ldrh	w0, [x0, #:lo12:.LANCHOR95+4]
+	cbnz	w0, .L2684
+	mov	w0, 1
+	bl	FtlGcFreeTempBlock
+	b	.L2697
+.L2687:
+	umull	x0, w11, w12
+	ldr	x2, [x20, #:lo12:.LANCHOR187]
+	add	x1, x2, x0
+	ldr	w2, [x2, x0]
+	ldr	x3, [x1, 16]
+	cmn	w2, #1
+	bne	.L2686
+	adrp	x0, .LANCHOR95
+	adrp	x3, .LANCHOR85
+	ldrh	w4, [x0, #:lo12:.LANCHOR95]
+	ldr	x3, [x3, #:lo12:.LANCHOR85]
+	strh	wzr, [x3, x4, lsl 1]
+	strh	w2, [x0, #:lo12:.LANCHOR95]
+	adrp	x0, .LANCHOR141
+	add	x0, x0, :lo12:.LANCHOR141
+	ldr	w2, [x0, 96]
+	add	w2, w2, 1
+	str	w2, [x0, 96]
+	ldr	w0, [x1, 4]
+	lsr	w0, w0, 10
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	bl	FtlGcPageVarInit
+.L2697:
+	mov	w0, 1
+	b	.L2680
+.L2686:
+	ldr	w1, [x1, 4]
+	ldp	w2, w0, [x3, 8]
+	bl	FtlGcUpdatePage
+	add	w11, w11, 1
+	and	w11, w11, 65535
+	b	.L2685
+	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
+	.section	.text.Ftl_get_new_temp_ppa,"ax",@progbits
+	.align	2
+	.global	Ftl_get_new_temp_ppa
+	.type	Ftl_get_new_temp_ppa, %function
+Ftl_get_new_temp_ppa:
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR95
+	mov	w2, 65535
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	mov	x19, x0
+	ldrh	w3, [x0, #:lo12:.LANCHOR95]
+	cmp	w3, w2
+	beq	.L2699
+	add	x1, x0, :lo12:.LANCHOR95
+	ldrh	w0, [x1, 4]
+	cbnz	w0, .L2700
+.L2699:
+	bl	FtlCacheWriteBack
+	mov	w0, 0
+	bl	FtlGcFreeTempBlock
+	add	x0, x19, :lo12:.LANCHOR95
+	strb	wzr, [x0, 8]
+	bl	allocate_data_superblock
+	adrp	x0, .LANCHOR111
+	strh	wzr, [x0, #:lo12:.LANCHOR111]
+	adrp	x0, .LANCHOR113
+	strh	wzr, [x0, #:lo12:.LANCHOR113]
+	bl	l2p_flush
+	mov	w0, 0
+	bl	FtlEctTblFlush
+	bl	FtlVpcTblFlush
+.L2700:
+	add	x0, x19, :lo12:.LANCHOR95
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	b	get_new_active_ppa
+	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
+	.section	.text.ftl_do_gc,"ax",@progbits
+	.align	2
+	.global	ftl_do_gc
+	.type	ftl_do_gc, %function
+ftl_do_gc:
+	adrp	x1, .LANCHOR78
+	ldr	w1, [x1, #:lo12:.LANCHOR78]
+	cbnz	w1, .L2762
+	adrp	x1, .LANCHOR247
+	ldr	w1, [x1, #:lo12:.LANCHOR247]
+	cmp	w1, 1
+	bne	.L2762
 	stp	x29, x30, [sp, -176]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR171
+	adrp	x21, .LANCHOR176
 	stp	x19, x20, [sp, 16]
-	ldr	w1, [x21, #:lo12:.LANCHOR171]
+	ldr	w1, [x21, #:lo12:.LANCHOR176]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w1, .L2751
-	adrp	x1, .LANCHOR85
-	ldrh	w1, [x1, #:lo12:.LANCHOR85]
+	cbnz	w1, .L2764
+	adrp	x1, .LANCHOR87
+	ldrh	w1, [x1, #:lo12:.LANCHOR87]
 	cmp	w1, 47
-	bls	.L2751
-	adrp	x5, .LANCHOR113
+	bls	.L2764
+	adrp	x5, .LANCHOR116
 	mov	w2, 65535
-	ldrh	w8, [x5, #:lo12:.LANCHOR113]
+	ldrh	w8, [x5, #:lo12:.LANCHOR116]
 	cmp	w8, w2
-	beq	.L2692
-	adrp	x7, .LANCHOR112
-	ldrh	w1, [x7, #:lo12:.LANCHOR112]
+	beq	.L2704
+	adrp	x7, .LANCHOR115
+	ldrh	w1, [x7, #:lo12:.LANCHOR115]
 	cmp	w1, w2
-	bne	.L2692
-	adrp	x3, .LANCHOR114
-	ldrh	w6, [x3, #:lo12:.LANCHOR114]
+	bne	.L2704
+	adrp	x3, .LANCHOR117
+	ldrh	w6, [x3, #:lo12:.LANCHOR117]
 	cmp	w6, w1
-	beq	.L2692
-	adrp	x2, .LANCHOR115
-	ldrh	w4, [x2, #:lo12:.LANCHOR115]
+	beq	.L2704
+	adrp	x2, .LANCHOR118
+	ldrh	w4, [x2, #:lo12:.LANCHOR118]
 	cmp	w4, w1
-	beq	.L2692
+	beq	.L2704
 	mov	w1, -1
-	strh	w8, [x7, #:lo12:.LANCHOR112]
-	strh	w6, [x5, #:lo12:.LANCHOR113]
-	strh	w4, [x3, #:lo12:.LANCHOR114]
-	strh	w1, [x2, #:lo12:.LANCHOR115]
-.L2692:
-	cbnz	w0, .L2752
-	adrp	x0, .LANCHOR88
-	ldrh	w0, [x0, #:lo12:.LANCHOR88]
+	strh	w8, [x7, #:lo12:.LANCHOR115]
+	strh	w6, [x5, #:lo12:.LANCHOR116]
+	strh	w4, [x3, #:lo12:.LANCHOR117]
+	strh	w1, [x2, #:lo12:.LANCHOR118]
+.L2704:
+	cbnz	w0, .L2765
+	adrp	x0, .LANCHOR90
+	ldrh	w0, [x0, #:lo12:.LANCHOR90]
 	cmp	w0, 24
-	bhi	.L2753
+	bhi	.L2766
 	adrp	x1, .LANCHOR52
 	cmp	w0, 16
 	ldrh	w20, [x1, #:lo12:.LANCHOR52]
-	bls	.L2695
+	bls	.L2707
 	lsr	w20, w20, 5
-.L2694:
-	adrp	x2, .LANCHOR176
+.L2706:
+	adrp	x2, .LANCHOR181
 	mov	x3, x2
-	ldrh	w1, [x2, #:lo12:.LANCHOR176]
+	ldrh	w1, [x2, #:lo12:.LANCHOR181]
 	cmp	w1, w0
-	bcs	.L2698
-	adrp	x0, .LANCHOR93
+	bcs	.L2710
+	adrp	x0, .LANCHOR95
 	mov	w1, 65535
-	ldrh	w0, [x0, #:lo12:.LANCHOR93]
+	ldrh	w0, [x0, #:lo12:.LANCHOR95]
 	cmp	w0, w1
-	bne	.L2699
-	adrp	x1, .LANCHOR112
-	ldrh	w1, [x1, #:lo12:.LANCHOR112]
+	bne	.L2711
+	adrp	x1, .LANCHOR115
+	ldrh	w1, [x1, #:lo12:.LANCHOR115]
 	cmp	w1, w0
-	bne	.L2699
-	adrp	x0, .LANCHOR243
-	ldrh	w0, [x0, #:lo12:.LANCHOR243]
-	cbnz	w0, .L2700
-	adrp	x1, .LANCHOR72
-	adrp	x4, .LANCHOR100
-	ldr	w1, [x1, #:lo12:.LANCHOR72]
-	ldr	w4, [x4, #:lo12:.LANCHOR100]
+	bne	.L2711
+	adrp	x0, .LANCHOR248
+	ldrh	w0, [x0, #:lo12:.LANCHOR248]
+	cbnz	w0, .L2712
+	adrp	x1, .LANCHOR74
+	adrp	x4, .LANCHOR102
+	ldr	w1, [x1, #:lo12:.LANCHOR74]
+	ldr	w4, [x4, #:lo12:.LANCHOR102]
 	add	w1, w1, w1, lsl 1
 	cmp	w4, w1, lsr 2
-	bcs	.L2701
-.L2700:
-	adrp	x1, .LANCHOR224
-	ldrh	w1, [x1, #:lo12:.LANCHOR224]
+	bcs	.L2713
+.L2712:
+	adrp	x1, .LANCHOR232
+	ldrh	w1, [x1, #:lo12:.LANCHOR232]
 	add	w1, w1, w1, lsl 1
 	asr	w1, w1, 2
-	strh	w1, [x3, #:lo12:.LANCHOR176]
+	strh	w1, [x3, #:lo12:.LANCHOR181]
+.L2714:
+	adrp	x1, .LANCHOR177
+	str	wzr, [x1, #:lo12:.LANCHOR177]
 .L2702:
-	adrp	x1, .LANCHOR172
-	str	wzr, [x1, #:lo12:.LANCHOR172]
-.L2690:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -18476,210 +18543,210 @@ rk_ftl_garbage_collect:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L2695:
+.L2707:
 	cmp	w0, 12
-	bls	.L2696
+	bls	.L2708
 	lsr	w20, w20, 4
-	b	.L2694
-.L2696:
+	b	.L2706
+.L2708:
 	cmp	w0, 8
-	bls	.L2694
+	bls	.L2706
 	lsr	w20, w20, 2
-	b	.L2694
-.L2753:
+	b	.L2706
+.L2766:
 	mov	w20, 1
-	b	.L2694
-.L2701:
+	b	.L2706
+.L2713:
 	mov	w1, 18
-	strh	w1, [x2, #:lo12:.LANCHOR176]
-	b	.L2702
-.L2699:
-	adrp	x0, .LANCHOR224
-	ldrh	w0, [x0, #:lo12:.LANCHOR224]
+	strh	w1, [x2, #:lo12:.LANCHOR181]
+	b	.L2714
+.L2711:
+	adrp	x0, .LANCHOR232
+	ldrh	w0, [x0, #:lo12:.LANCHOR232]
 	add	w0, w0, w0, lsl 1
 	asr	w0, w0, 2
-	strh	w0, [x3, #:lo12:.LANCHOR176]
-.L2698:
-	adrp	x0, .LANCHOR116
-	ldrh	w0, [x0, #:lo12:.LANCHOR116]
-	cbz	w0, .L2693
+	strh	w0, [x3, #:lo12:.LANCHOR181]
+.L2710:
+	adrp	x0, .LANCHOR119
+	ldrh	w0, [x0, #:lo12:.LANCHOR119]
+	cbz	w0, .L2705
 	add	w20, w20, 32
 	and	w20, w20, 65535
-.L2693:
-	adrp	x19, .LANCHOR205
+.L2705:
+	adrp	x19, .LANCHOR213
 	mov	w0, 65535
-	ldrh	w2, [x19, #:lo12:.LANCHOR205]
+	ldrh	w2, [x19, #:lo12:.LANCHOR213]
 	cmp	w2, w0
-	bne	.L2705
-	adrp	x0, .LANCHOR112
-	ldrh	w1, [x0, #:lo12:.LANCHOR112]
+	bne	.L2717
+	adrp	x0, .LANCHOR115
+	ldrh	w1, [x0, #:lo12:.LANCHOR115]
 	cmp	w1, w2
-	beq	.L2706
-	adrp	x2, .LANCHOR83
+	beq	.L2718
+	adrp	x2, .LANCHOR85
 	ubfiz	x1, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR83]
+	ldr	x2, [x2, #:lo12:.LANCHOR85]
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L2707
+	cbnz	w1, .L2719
 	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR112]
-.L2707:
-	ldrh	w1, [x0, #:lo12:.LANCHOR112]
-	strh	w1, [x19, #:lo12:.LANCHOR205]
+	strh	w1, [x0, #:lo12:.LANCHOR115]
+.L2719:
+	ldrh	w1, [x0, #:lo12:.LANCHOR115]
+	strh	w1, [x19, #:lo12:.LANCHOR213]
 	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR112]
-.L2706:
-	add	x0, x19, :lo12:.LANCHOR205
+	strh	w1, [x0, #:lo12:.LANCHOR115]
+.L2718:
+	add	x0, x19, :lo12:.LANCHOR213
 	mov	w1, 65535
 	strb	wzr, [x0, 8]
-	ldrh	w0, [x19, #:lo12:.LANCHOR205]
+	ldrh	w0, [x19, #:lo12:.LANCHOR213]
 	cmp	w0, w1
-	beq	.L2705
+	beq	.L2717
 	bl	IsBlkInGcList
-	cbz	w0, .L2709
+	cbz	w0, .L2721
 	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR205]
-.L2709:
-	adrp	x0, .LANCHOR15
-	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L2710
-	ldrh	w0, [x19, #:lo12:.LANCHOR205]
-	add	x3, x19, :lo12:.LANCHOR205
+	strh	w0, [x19, #:lo12:.LANCHOR213]
+.L2721:
+	adrp	x0, .LANCHOR16
+	ldrb	w0, [x0, #:lo12:.LANCHOR16]
+	cbz	w0, .L2722
+	ldrh	w0, [x19, #:lo12:.LANCHOR213]
+	add	x3, x19, :lo12:.LANCHOR213
 	bl	ftl_get_blk_mode
 	strb	w0, [x3, 8]
-.L2710:
-	ldrh	w1, [x19, #:lo12:.LANCHOR205]
+.L2722:
+	ldrh	w1, [x19, #:lo12:.LANCHOR213]
 	mov	w0, 65535
-	add	x22, x19, :lo12:.LANCHOR205
+	add	x22, x19, :lo12:.LANCHOR213
 	cmp	w1, w0
-	beq	.L2705
+	beq	.L2717
 	mov	x0, x22
 	bl	make_superblock
-	adrp	x0, .LANCHOR244
-	ldrh	w1, [x19, #:lo12:.LANCHOR205]
+	adrp	x0, .LANCHOR249
+	ldrh	w1, [x19, #:lo12:.LANCHOR213]
 	strh	wzr, [x22, 2]
-	strh	wzr, [x0, #:lo12:.LANCHOR244]
-	adrp	x0, .LANCHOR83
+	strh	wzr, [x0, #:lo12:.LANCHOR249]
+	adrp	x0, .LANCHOR85
 	strb	wzr, [x22, 6]
-	ldr	x0, [x0, #:lo12:.LANCHOR83]
+	ldr	x0, [x0, #:lo12:.LANCHOR85]
 	ldrh	w1, [x0, x1, lsl 1]
-	adrp	x0, .LANCHOR245
-	strh	w1, [x0, #:lo12:.LANCHOR245]
-.L2705:
-	adrp	x1, .LANCHOR91
-	ldrh	w0, [x19, #:lo12:.LANCHOR205]
+	adrp	x0, .LANCHOR250
+	strh	w1, [x0, #:lo12:.LANCHOR250]
+.L2717:
+	adrp	x1, .LANCHOR93
+	ldrh	w0, [x19, #:lo12:.LANCHOR213]
 	str	x1, [x29, 128]
-	ldrh	w2, [x1, #:lo12:.LANCHOR91]
+	ldrh	w2, [x1, #:lo12:.LANCHOR93]
 	cmp	w2, w0
-	beq	.L2711
-	adrp	x1, .LANCHOR92
-	ldrh	w1, [x1, #:lo12:.LANCHOR92]
+	beq	.L2723
+	adrp	x1, .LANCHOR94
+	ldrh	w1, [x1, #:lo12:.LANCHOR94]
 	cmp	w1, w0
-	beq	.L2711
-	adrp	x1, .LANCHOR93
-	ldrh	w1, [x1, #:lo12:.LANCHOR93]
+	beq	.L2723
+	adrp	x1, .LANCHOR95
+	ldrh	w1, [x1, #:lo12:.LANCHOR95]
 	cmp	w1, w0
-	bne	.L2712
-.L2711:
+	bne	.L2724
+.L2723:
 	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR205]
-.L2712:
-	adrp	x25, .LANCHOR178
-	add	x26, x25, :lo12:.LANCHOR178
-.L2748:
-	ldrh	w1, [x19, #:lo12:.LANCHOR205]
+	strh	w0, [x19, #:lo12:.LANCHOR213]
+.L2724:
+	adrp	x25, .LANCHOR183
+	add	x26, x25, :lo12:.LANCHOR183
+.L2760:
+	ldrh	w1, [x19, #:lo12:.LANCHOR213]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2713
-	adrp	x0, .LANCHOR172
+	bne	.L2725
+	adrp	x0, .LANCHOR177
 	adrp	x22, .LANCHOR52
 	add	x22, x22, :lo12:.LANCHOR52
-	str	wzr, [x0, #:lo12:.LANCHOR172]
-.L2714:
-	ldrh	w5, [x25, #:lo12:.LANCHOR178]
-	add	x7, x25, :lo12:.LANCHOR178
+	str	wzr, [x0, #:lo12:.LANCHOR177]
+.L2726:
+	ldrh	w5, [x25, #:lo12:.LANCHOR183]
+	add	x7, x25, :lo12:.LANCHOR183
 	mov	w0, w5
 	bl	List_get_gc_head_node
 	and	w6, w0, 65535
-	strh	w6, [x19, #:lo12:.LANCHOR205]
+	strh	w6, [x19, #:lo12:.LANCHOR213]
 	mov	w0, 65535
 	cmp	w6, w0
-	bne	.L2715
+	bne	.L2727
 	strh	wzr, [x7]
 	mov	w0, 8
-	b	.L2690
-.L2752:
+	b	.L2702
+.L2765:
 	mov	w20, 1
-	b	.L2693
-.L2715:
+	b	.L2705
+.L2727:
 	mov	w0, w6
 	bl	IsBlkInGcList
 	add	w5, w5, 1
-	cbz	w0, .L2716
-	strh	w5, [x25, #:lo12:.LANCHOR178]
-	b	.L2714
-.L2716:
-	adrp	x23, .LANCHOR83
+	cbz	w0, .L2728
+	strh	w5, [x25, #:lo12:.LANCHOR183]
+	b	.L2726
+.L2728:
+	adrp	x23, .LANCHOR85
 	adrp	x4, .LANCHOR38
 	ldrh	w0, [x22]
 	ubfiz	x1, x6, 1, 16
-	ldr	x2, [x23, #:lo12:.LANCHOR83]
+	ldr	x2, [x23, #:lo12:.LANCHOR85]
 	and	w5, w5, 65535
 	ldrh	w4, [x4, #:lo12:.LANCHOR38]
-	strh	w5, [x25, #:lo12:.LANCHOR178]
+	strh	w5, [x25, #:lo12:.LANCHOR183]
 	ldrh	w3, [x2, x1]
 	mul	w0, w0, w4
 	cmp	w3, w0, asr 1
-	bgt	.L2718
+	bgt	.L2730
 	cmp	w5, 48
-	bls	.L2719
+	bls	.L2731
 	cmp	w3, 8
-	bls	.L2719
-	adrp	x3, .LANCHOR108
-	ldrh	w3, [x3, #:lo12:.LANCHOR108]
+	bls	.L2731
+	adrp	x3, .LANCHOR111
+	ldrh	w3, [x3, #:lo12:.LANCHOR111]
 	cmp	w3, 35
-	bhi	.L2719
-.L2718:
+	bhi	.L2731
+.L2730:
 	strh	wzr, [x26]
-.L2719:
+.L2731:
 	ldrh	w1, [x2, x1]
 	cmp	w0, w1
-	bgt	.L2720
+	bgt	.L2732
 	ldrh	w0, [x26]
 	cmp	w0, 3
-	bhi	.L2720
+	bhi	.L2732
 	mov	w0, -1
 	strh	wzr, [x26]
-	strh	w0, [x19, #:lo12:.LANCHOR205]
-.L2791:
-	adrp	x0, .LANCHOR243
-	ldrh	w0, [x0, #:lo12:.LANCHOR243]
-	b	.L2690
-.L2720:
-	cbnz	w1, .L2721
+	strh	w0, [x19, #:lo12:.LANCHOR213]
+.L2804:
+	adrp	x0, .LANCHOR248
+	ldrh	w0, [x0, #:lo12:.LANCHOR248]
+	b	.L2702
+.L2732:
+	cbnz	w1, .L2733
 	mov	w0, -1
 	bl	decrement_vpc_count
 	ldrh	w0, [x26]
 	add	w0, w0, 1
 	strh	w0, [x26]
-	b	.L2714
-.L2721:
-	adrp	x0, .LANCHOR15
-	add	x3, x19, :lo12:.LANCHOR205
-	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	b	.L2726
+.L2733:
+	adrp	x0, .LANCHOR16
+	add	x3, x19, :lo12:.LANCHOR213
+	ldrb	w0, [x0, #:lo12:.LANCHOR16]
 	strb	wzr, [x3, 8]
-	cbz	w0, .L2722
+	cbz	w0, .L2734
 	mov	w0, w6
 	bl	ftl_get_blk_mode
 	strb	w0, [x3, 8]
-.L2722:
+.L2734:
 	ldr	x0, [x29, 128]
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w0, w6
-	bne	.L2723
-	mov	w2, 902
-	adrp	x1, .LANCHOR246
+	bne	.L2735
+	mov	w2, 1069
+	adrp	x1, .LANCHOR251
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR246
+	add	x1, x1, :lo12:.LANCHOR251
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -18687,16 +18754,16 @@ rk_ftl_garbage_collect:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2723:
-	adrp	x0, .LANCHOR92
-	ldrh	w1, [x19, #:lo12:.LANCHOR205]
-	ldrh	w0, [x0, #:lo12:.LANCHOR92]
+.L2735:
+	adrp	x0, .LANCHOR94
+	ldrh	w1, [x19, #:lo12:.LANCHOR213]
+	ldrh	w0, [x0, #:lo12:.LANCHOR94]
 	cmp	w1, w0
-	bne	.L2724
-	mov	w2, 903
-	adrp	x1, .LANCHOR246
+	bne	.L2736
+	mov	w2, 1070
+	adrp	x1, .LANCHOR251
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR246
+	add	x1, x1, :lo12:.LANCHOR251
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -18704,16 +18771,16 @@ rk_ftl_garbage_collect:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2724:
-	adrp	x0, .LANCHOR93
-	ldrh	w1, [x19, #:lo12:.LANCHOR205]
-	ldrh	w0, [x0, #:lo12:.LANCHOR93]
+.L2736:
+	adrp	x0, .LANCHOR95
+	ldrh	w1, [x19, #:lo12:.LANCHOR213]
+	ldrh	w0, [x0, #:lo12:.LANCHOR95]
 	cmp	w1, w0
-	bne	.L2725
-	mov	w2, 904
-	adrp	x1, .LANCHOR246
+	bne	.L2737
+	mov	w2, 1071
+	adrp	x1, .LANCHOR251
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR246
+	add	x1, x1, :lo12:.LANCHOR251
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -18721,86 +18788,86 @@ rk_ftl_garbage_collect:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2725:
-	add	x22, x19, :lo12:.LANCHOR205
+.L2737:
+	add	x22, x19, :lo12:.LANCHOR213
 	mov	x0, x22
 	bl	make_superblock
-	adrp	x0, .LANCHOR244
-	ldrh	w1, [x19, #:lo12:.LANCHOR205]
-	strh	wzr, [x0, #:lo12:.LANCHOR244]
-	ldr	x0, [x23, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR249
+	ldrh	w1, [x19, #:lo12:.LANCHOR213]
+	strh	wzr, [x0, #:lo12:.LANCHOR249]
+	ldr	x0, [x23, #:lo12:.LANCHOR85]
 	ldrh	w1, [x0, x1, lsl 1]
-	adrp	x0, .LANCHOR245
+	adrp	x0, .LANCHOR250
 	strh	wzr, [x22, 2]
-	strh	w1, [x0, #:lo12:.LANCHOR245]
+	strh	w1, [x0, #:lo12:.LANCHOR250]
 	strb	wzr, [x22, 6]
-.L2713:
+.L2725:
 	adrp	x1, .LANCHOR52
 	mov	w0, 1
-	str	w0, [x21, #:lo12:.LANCHOR171]
+	str	w0, [x21, #:lo12:.LANCHOR176]
 	ldrh	w0, [x1, #:lo12:.LANCHOR52]
 	str	w0, [x29, 156]
-	adrp	x0, .LANCHOR15
+	adrp	x0, .LANCHOR16
 	str	x1, [x29, 120]
 	str	x0, [x29, 112]
-	ldrb	w2, [x0, #:lo12:.LANCHOR15]
-	cbz	w2, .L2726
-	add	x0, x19, :lo12:.LANCHOR205
+	ldrb	w2, [x0, #:lo12:.LANCHOR16]
+	cbz	w2, .L2738
+	add	x0, x19, :lo12:.LANCHOR213
 	ldrb	w0, [x0, 8]
 	cmp	w0, 1
-	bne	.L2726
+	bne	.L2738
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	str	w0, [x29, 156]
-.L2726:
-	add	x0, x19, :lo12:.LANCHOR205
+.L2738:
+	add	x0, x19, :lo12:.LANCHOR213
 	ldr	w2, [x29, 156]
 	ldrh	w0, [x0, 2]
 	add	w1, w0, w20
 	cmp	w1, w2
-	ble	.L2727
+	ble	.L2739
 	sub	w20, w2, w0
 	and	w20, w20, 65535
-.L2727:
-	adrp	x0, .LANCHOR244
+.L2739:
+	adrp	x0, .LANCHOR249
 	mov	w28, 0
-	add	x0, x0, :lo12:.LANCHOR244
+	add	x0, x0, :lo12:.LANCHOR249
 	str	x0, [x29, 144]
-.L2728:
+.L2740:
 	cmp	w20, w28, uxth
-	bls	.L2736
-	add	x1, x19, :lo12:.LANCHOR205
+	bls	.L2748
+	add	x1, x19, :lo12:.LANCHOR213
 	adrp	x0, .LANCHOR38
-	adrp	x23, .LANCHOR106
+	adrp	x23, .LANCHOR109
 	add	x1, x1, 16
 	ldrh	w7, [x0, #:lo12:.LANCHOR38]
 	mov	w22, 0
 	ldrh	w4, [x1, -14]
 	mov	w2, 0
-	ldr	x0, [x23, #:lo12:.LANCHOR106]
+	ldr	x0, [x23, #:lo12:.LANCHOR109]
 	mov	w6, 65535
 	add	w4, w4, w28
 	mov	w5, 56
-	b	.L2737
-.L2730:
+	b	.L2749
+.L2742:
 	ldrh	w3, [x1]
 	cmp	w3, w6
-	beq	.L2729
+	beq	.L2741
 	umaddl	x8, w22, w5, x0
 	add	w22, w22, 1
 	and	w22, w22, 65535
 	orr	w3, w4, w3, lsl 10
 	str	w3, [x8, 4]
-.L2729:
+.L2741:
 	add	w2, w2, 1
 	add	x1, x1, 2
 	and	w2, w2, 65535
-.L2737:
+.L2749:
 	cmp	w2, w7
-	bne	.L2730
-	add	x1, x19, :lo12:.LANCHOR205
-	adrp	x24, .LANCHOR102
-	add	x24, x24, :lo12:.LANCHOR102
+	bne	.L2742
+	add	x1, x19, :lo12:.LANCHOR213
+	adrp	x24, .LANCHOR105
+	add	x24, x24, :lo12:.LANCHOR105
 	ldrb	w2, [x1, 8]
 	mov	w1, w22
 	bl	FlashReadPages
@@ -18808,31 +18875,31 @@ rk_ftl_garbage_collect:
 	umull	x0, w22, w0
 	mov	x22, 0
 	str	x0, [x29, 136]
-.L2731:
+.L2743:
 	ldr	x0, [x29, 136]
 	cmp	x0, x22
-	bne	.L2735
+	bne	.L2747
 	add	w28, w28, 1
-	b	.L2728
-.L2735:
-	ldr	x0, [x23, #:lo12:.LANCHOR106]
+	b	.L2740
+.L2747:
+	ldr	x0, [x23, #:lo12:.LANCHOR109]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	beq	.L2732
+	beq	.L2744
 	ldr	x27, [x1, 16]
 	mov	w0, 61589
 	ldrh	w1, [x27]
 	cmp	w1, w0
-	bne	.L2732
+	bne	.L2744
 	ldr	w4, [x27, 8]
 	cmn	w4, #1
-	bne	.L2733
-	mov	w2, 943
+	bne	.L2745
+	mov	w2, 1119
 	str	w4, [x29, 104]
-	adrp	x1, .LANCHOR246
+	adrp	x1, .LANCHOR251
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR246
+	add	x1, x1, :lo12:.LANCHOR251
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -18841,22 +18908,22 @@ rk_ftl_garbage_collect:
 	add	x0, x0, :lo12:.LC7
 	bl	printf
 	ldr	w4, [x29, 104]
-.L2733:
+.L2745:
 	mov	w2, 0
 	add	x1, x29, 168
 	mov	w0, w4
 	bl	log2phys
-	ldr	x0, [x23, #:lo12:.LANCHOR106]
+	ldr	x0, [x23, #:lo12:.LANCHOR109]
 	ldr	w1, [x29, 168]
 	add	x0, x0, x22
 	and	w1, w1, 2147483647
 	ldr	w2, [x0, 4]
 	cmp	w1, w2
-	bne	.L2732
+	bne	.L2744
 	ldr	x1, [x29, 144]
-	adrp	x4, .LANCHOR181
+	adrp	x4, .LANCHOR187
 	ldr	x2, [x29, 144]
-	ldr	x5, [x4, #:lo12:.LANCHOR181]
+	ldr	x5, [x4, #:lo12:.LANCHOR187]
 	ldr	w0, [x0, 24]
 	ldrh	w1, [x1]
 	add	w1, w1, 1
@@ -18872,10 +18939,10 @@ rk_ftl_garbage_collect:
 	ldp	x4, x2, [x29, 96]
 	ldr	w1, [x29, 152]
 	str	w0, [x2, 4]
-	ldr	x0, [x4, #:lo12:.LANCHOR181]
+	ldr	x0, [x4, #:lo12:.LANCHOR187]
 	ldr	w2, [x24]
 	umaddl	x1, w2, w1, x0
-	ldr	x0, [x23, #:lo12:.LANCHOR106]
+	ldr	x0, [x23, #:lo12:.LANCHOR109]
 	add	w2, w2, 1
 	add	x0, x0, x22
 	ldr	x4, [x0, 8]
@@ -18884,370 +18951,549 @@ rk_ftl_garbage_collect:
 	str	x4, [x1, 16]
 	ldr	w1, [x29, 168]
 	str	w1, [x27, 12]
-	adrp	x1, .LANCHOR93
-	add	x12, x1, :lo12:.LANCHOR93
-	ldrh	w1, [x1, #:lo12:.LANCHOR93]
+	adrp	x1, .LANCHOR95
+	add	x12, x1, :lo12:.LANCHOR95
+	ldrh	w1, [x1, #:lo12:.LANCHOR95]
 	strh	w1, [x27, 2]
-	adrp	x1, .LANCHOR160
+	adrp	x1, .LANCHOR165
 	str	w2, [x24]
-	ldr	w1, [x1, #:lo12:.LANCHOR160]
+	ldr	w1, [x1, #:lo12:.LANCHOR165]
 	str	w1, [x27, 4]
 	mov	w1, 1
 	bl	FtlGcBufAlloc
 	ldr	x0, [x29, 112]
-	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbnz	w0, .L2734
+	ldrb	w0, [x0, #:lo12:.LANCHOR16]
+	cbnz	w0, .L2746
 	ldrb	w1, [x12, 7]
 	ldr	w0, [x24]
 	cmp	w1, w0
-	beq	.L2734
+	beq	.L2746
 	ldrh	w0, [x12, 4]
-	cbnz	w0, .L2732
-.L2734:
+	cbnz	w0, .L2744
+.L2746:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	w0, .L2732
-	add	x0, x19, :lo12:.LANCHOR205
+	cbz	w0, .L2744
+	add	x0, x19, :lo12:.LANCHOR213
 	mov	w1, -1
-	str	wzr, [x21, #:lo12:.LANCHOR171]
-	strh	w1, [x19, #:lo12:.LANCHOR205]
+	str	wzr, [x21, #:lo12:.LANCHOR176]
+	strh	w1, [x19, #:lo12:.LANCHOR213]
 	strh	wzr, [x0, 2]
-	b	.L2791
-.L2732:
+	b	.L2804
+.L2744:
 	add	x22, x22, 56
-	b	.L2731
-.L2736:
-	add	x1, x19, :lo12:.LANCHOR205
+	b	.L2743
+.L2748:
+	add	x1, x19, :lo12:.LANCHOR213
 	ldrh	w0, [x1, 2]
 	add	w20, w20, w0
 	ldr	w0, [x29, 156]
 	and	w20, w20, 65535
 	strh	w20, [x1, 2]
 	cmp	w0, w20
-	bhi	.L2738
-	adrp	x0, .LANCHOR102
-	ldr	w0, [x0, #:lo12:.LANCHOR102]
-	cbz	w0, .L2739
+	bhi	.L2750
+	adrp	x0, .LANCHOR105
+	ldr	w0, [x0, #:lo12:.LANCHOR105]
+	cbz	w0, .L2751
 	bl	Ftl_gc_temp_data_write_back
-	cbz	w0, .L2739
-	str	wzr, [x21, #:lo12:.LANCHOR171]
-	b	.L2791
-.L2739:
-	adrp	x0, .LANCHOR244
-	ldrh	w0, [x0, #:lo12:.LANCHOR244]
-	cbnz	w0, .L2740
-	adrp	x22, .LANCHOR83
-	ldrh	w1, [x19, #:lo12:.LANCHOR205]
-	ldr	x0, [x22, #:lo12:.LANCHOR83]
+	cbz	w0, .L2751
+	str	wzr, [x21, #:lo12:.LANCHOR176]
+	b	.L2804
+.L2751:
+	adrp	x0, .LANCHOR249
+	ldrh	w0, [x0, #:lo12:.LANCHOR249]
+	cbnz	w0, .L2752
+	adrp	x22, .LANCHOR85
+	ldrh	w1, [x19, #:lo12:.LANCHOR213]
+	ldr	x0, [x22, #:lo12:.LANCHOR85]
 	ldrh	w0, [x0, x1, lsl 1]
-	cbz	w0, .L2740
-	adrp	x23, .LANCHOR72
-	add	x24, x23, :lo12:.LANCHOR72
+	cbz	w0, .L2752
+	adrp	x23, .LANCHOR74
+	add	x24, x23, :lo12:.LANCHOR74
 	mov	w20, 0
-.L2741:
+.L2753:
 	ldr	w0, [x24]
 	cmp	w20, w0
-	bcs	.L2746
+	bcs	.L2758
 	mov	w2, 0
 	add	x1, x29, 172
 	mov	w0, w20
 	bl	log2phys
 	ldr	w0, [x29, 172]
 	cmn	w0, #1
-	beq	.L2742
+	beq	.L2754
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-	ldrh	w1, [x19, #:lo12:.LANCHOR205]
+	ldrh	w1, [x19, #:lo12:.LANCHOR213]
 	cmp	w1, w0, uxth
-	bne	.L2742
-.L2746:
-	ldr	w0, [x23, #:lo12:.LANCHOR72]
+	bne	.L2754
+.L2758:
+	ldr	w0, [x23, #:lo12:.LANCHOR74]
 	cmp	w20, w0
-	bcc	.L2740
-	ldrh	w1, [x19, #:lo12:.LANCHOR205]
-	ldr	x0, [x22, #:lo12:.LANCHOR83]
+	bcc	.L2752
+	ldrh	w1, [x19, #:lo12:.LANCHOR213]
+	ldr	x0, [x22, #:lo12:.LANCHOR85]
 	strh	wzr, [x0, x1, lsl 1]
-	ldrh	w0, [x19, #:lo12:.LANCHOR205]
+	ldrh	w0, [x19, #:lo12:.LANCHOR213]
 	bl	update_vpc_list
 	bl	FtlCacheWriteBack
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L2740:
+.L2752:
 	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR205]
-.L2738:
-	adrp	x0, .LANCHOR88
-	ldrh	w0, [x0, #:lo12:.LANCHOR88]
+	strh	w0, [x19, #:lo12:.LANCHOR213]
+.L2750:
+	adrp	x0, .LANCHOR90
+	ldrh	w0, [x0, #:lo12:.LANCHOR90]
 	cmp	w0, 2
-	bhi	.L2747
+	bhi	.L2759
 	ldr	x0, [x29, 120]
 	ldrh	w20, [x0, #:lo12:.LANCHOR52]
-	b	.L2748
-.L2742:
+	b	.L2760
+.L2754:
 	add	w20, w20, 1
-	b	.L2741
-.L2747:
-	str	wzr, [x21, #:lo12:.LANCHOR171]
+	b	.L2753
+.L2759:
+	str	wzr, [x21, #:lo12:.LANCHOR176]
 	add	w0, w0, 1
-	b	.L2690
-.L2749:
+	b	.L2702
+.L2762:
 	mov	w0, 0
 	ret
-.L2751:
+.L2764:
 	mov	w0, 0
-	b	.L2690
-	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
-	.section	.text.FtlInit,"ax",@progbits
+	b	.L2702
+	.size	ftl_do_gc, .-ftl_do_gc
+	.section	.text.FtlCacheWriteBack,"ax",@progbits
 	.align	2
-	.global	FtlInit
-	.type	FtlInit, %function
-FtlInit:
-	stp	x29, x30, [sp, -64]!
-	adrp	x1, .LC72
-	add	x1, x1, :lo12:.LC72
+	.global	FtlCacheWriteBack
+	.type	FtlCacheWriteBack, %function
+FtlCacheWriteBack:
+	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
+	stp	x25, x26, [sp, 64]
+	adrp	x25, .LANCHOR78
+	stp	x23, x24, [sp, 48]
+	ldr	w23, [x25, #:lo12:.LANCHOR78]
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR232
-	mov	x20, x0
-	mov	w0, -1
-	str	w0, [x19, #:lo12:.LANCHOR232]
-	adrp	x0, .LANCHOR247
 	stp	x21, x22, [sp, 32]
-	str	wzr, [x0, #:lo12:.LANCHOR247]
-	adrp	x0, .LANCHOR76
-	stp	x23, x24, [sp, 48]
-	str	wzr, [x0, #:lo12:.LANCHOR76]
-	adrp	x0, .LC7
-	add	x0, x0, :lo12:.LC7
-	bl	printf
-	mov	x0, x20
-	bl	FtlConstantsInit
-	bl	FtlMemInit
-	bl	FtlVariablesInit
-	adrp	x0, .LANCHOR39
-	ldrh	w0, [x0, #:lo12:.LANCHOR39]
-	bl	FtlFreeSysBlkQueueInit
-	bl	FtlLoadBbt
-	cbz	w0, .L2793
-	adrp	x1, .LANCHOR248
-	adrp	x0, .LC73
-	add	x1, x1, :lo12:.LANCHOR248
-	add	x0, x0, :lo12:.LC73
-.L2802:
-	bl	printf
-.L2794:
-	mov	w0, 0
+	stp	x27, x28, [sp, 80]
+	cbnz	w23, .L2807
+	adrp	x22, .LANCHOR72
+	ldr	w1, [x22, #:lo12:.LANCHOR72]
+	cbz	w1, .L2807
+	adrp	x0, .LANCHOR252
+	ldr	x19, [x0, #:lo12:.LANCHOR252]
+	adrp	x0, .LANCHOR16
+	ldrb	w0, [x0, #:lo12:.LANCHOR16]
+	cbz	w0, .L2832
+	ldrb	w0, [x19, 8]
+	cmp	w0, 1
+	cset	w24, eq
+.L2809:
+	adrp	x20, .LANCHOR73
+	ldrb	w3, [x19, 9]
+	adrp	x26, .LC76
+	add	x27, x22, :lo12:.LANCHOR72
+	ldr	x0, [x20, #:lo12:.LANCHOR73]
+	add	x26, x26, :lo12:.LC76
+	mov	w21, 0
+	mov	w28, 56
+	mov	w2, w24
+	bl	FlashProgPages
+.L2810:
+	ldr	w0, [x27]
+	cmp	w21, w0
+	bcc	.L2817
+.L2829:
+	str	wzr, [x22, #:lo12:.LANCHOR72]
+.L2807:
 	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 64
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
 	ret
-.L2793:
-	bl	FtlSysBlkInit
-	cbz	w0, .L2795
-	adrp	x1, .LANCHOR248
-	adrp	x0, .LC74
-	add	x1, x1, :lo12:.LANCHOR248
-	add	x0, x0, :lo12:.LC74
-	b	.L2802
-.L2795:
-	mov	w1, 1
-	str	w1, [x19, #:lo12:.LANCHOR232]
-	bl	rk_ftl_garbage_collect
-	adrp	x0, .LANCHOR88
-	mov	x22, x0
-	ldrh	w23, [x0, #:lo12:.LANCHOR88]
-	cmp	w23, 15
-	bhi	.L2794
-	adrp	x20, .LANCHOR112
-	add	x20, x20, :lo12:.LANCHOR112
-	mov	w19, 0
-	adrp	x24, .LANCHOR205
-	mov	w21, 65535
-.L2799:
-	ldrh	w0, [x24, #:lo12:.LANCHOR205]
-	cmp	w0, w21
-	bne	.L2797
-	ldrh	w0, [x20]
-	cmp	w0, w21
-	bne	.L2797
-	and	w0, w19, 7
-	bl	List_get_gc_head_node
-	bl	FtlGcRefreshBlock
-.L2797:
+.L2832:
+	mov	w24, 0
+	b	.L2809
+.L2817:
+	umull	x3, w21, w28
+	ldr	x0, [x20, #:lo12:.LANCHOR73]
+	add	x4, x0, x3
+	ldr	w0, [x0, x3]
+	cmn	w0, #1
+	bne	.L2811
+	adrp	x27, .LANCHOR52
+	adrp	x26, .LANCHOR141
+	add	x27, x27, :lo12:.LANCHOR52
+	add	x26, x26, :lo12:.LANCHOR141
+.L2812:
+	ldr	w0, [x22, #:lo12:.LANCHOR72]
+	cmp	w23, w0
+	bcc	.L2827
+	adrp	x19, .LANCHOR119
+	add	x19, x19, :lo12:.LANCHOR119
+	mov	w20, 16386
+.L2830:
+	ldrh	w0, [x19]
+	cbz	w0, .L2829
 	mov	w1, 1
 	mov	w0, w1
-	bl	rk_ftl_garbage_collect
-	ldrh	w1, [x22, #:lo12:.LANCHOR88]
-	add	w0, w23, 2
-	cmp	w1, w0
-	bhi	.L2794
-	add	w19, w19, 1
-	cmp	w19, 1024
-	bne	.L2799
-	b	.L2794
-	.size	FtlInit, .-FtlInit
-	.section	.text.rk_ftl_init,"ax",@progbits
-	.align	2
-	.global	rk_ftl_init
-	.type	rk_ftl_init, %function
-rk_ftl_init:
-	stp	x29, x30, [sp, -32]!
-	add	x29, sp, 0
-	str	x19, [sp, 16]
-	bl	FlashInit
-	mov	w19, w0
-	cbnz	w0, .L2804
-	adrp	x0, .LANCHOR14
-	add	x0, x0, :lo12:.LANCHOR14
-	bl	FtlInit
-.L2804:
-	bl	idb_init
-	mov	w1, w19
-	adrp	x0, .LC75
-	add	x0, x0, :lo12:.LC75
-	bl	printf
-	mov	w0, w19
-	ldr	x19, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	ret
-	.size	rk_ftl_init, .-rk_ftl_init
-	.section	.text.ftl_fix_nand_power_lost_error,"ax",@progbits
-	.align	2
-	.global	ftl_fix_nand_power_lost_error
-	.type	ftl_fix_nand_power_lost_error, %function
-ftl_fix_nand_power_lost_error:
-	adrp	x0, .LANCHOR15
-	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L2821
-	stp	x29, x30, [sp, -128]!
-	add	x29, sp, 0
-	str	x25, [sp, 64]
-	adrp	x25, .LANCHOR237
-	stp	x23, x24, [sp, 48]
-	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR83
-	ldrh	w23, [x25, #:lo12:.LANCHOR237]
-	ldr	x0, [x21, #:lo12:.LANCHOR83]
-	mov	w1, w23
-	stp	x19, x20, [sp, 16]
-	ubfiz	x24, x23, 1, 16
-	adrp	x19, .LC76
-	ldrh	w2, [x0, x24]
-	add	x0, x19, :lo12:.LC76
-	bl	printf
-	adrp	x0, .LANCHOR91
-	add	x11, x0, :lo12:.LANCHOR91
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
-	bl	FtlGcRefreshOpenBlock
-	adrp	x0, .LANCHOR92
-	add	x20, x0, :lo12:.LANCHOR92
-	ldrh	w0, [x0, #:lo12:.LANCHOR92]
-	bl	FtlGcRefreshOpenBlock
-	mov	x0, x11
-	bl	allocate_new_data_superblock
-	mov	x0, x20
-	mov	w20, 4097
-	bl	allocate_new_data_superblock
-.L2808:
+	bl	ftl_do_gc
 	subs	w20, w20, #1
-	beq	.L2812
-	mov	w1, 1
-	mov	w0, w1
-	bl	rk_ftl_garbage_collect
-	ldr	x0, [x21, #:lo12:.LANCHOR83]
-	ldrh	w0, [x0, x24]
-	cbnz	w0, .L2808
-.L2812:
-	ldr	x0, [x21, #:lo12:.LANCHOR83]
-	mov	w1, w23
-	ldrh	w2, [x0, x24]
-	add	x0, x19, :lo12:.LC76
+	bne	.L2830
+	b	.L2829
+.L2811:
+	ldr	w0, [x4, 4]
+	cbnz	w24, .L2813
+.L2846:
+	str	w0, [x29, 124]
+	mov	w2, 1
+	ldr	w0, [x4, 24]
+	add	x1, x29, 124
+	str	x3, [x29, 104]
+	bl	log2phys
+	ldr	x0, [x20, #:lo12:.LANCHOR73]
+	ldr	x3, [x29, 104]
+	add	x0, x0, x3
+	ldr	x0, [x0, 16]
+	ldr	w0, [x0, 12]
+	cmn	w0, #1
+	beq	.L2815
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+	adrp	x2, .LANCHOR85
+	and	w1, w0, 65535
+	ubfiz	x0, x1, 1, 16
+	mov	w3, w1
+	ldr	x2, [x2, #:lo12:.LANCHOR85]
+	ldrh	w0, [x2, x0]
+	cbnz	w0, .L2816
+	mov	w2, 0
+	mov	x0, x26
+	str	w1, [x29, 104]
 	bl	printf
-	ldr	x0, [x21, #:lo12:.LANCHOR83]
-	ldrh	w19, [x0, x24]
-	cbnz	w19, .L2810
-	add	x20, x29, 128
-	adrp	x22, .LANCHOR77
-	strh	w23, [x20, -48]!
-	mov	x0, x20
-	bl	make_superblock
-	adrp	x0, .LANCHOR38
-	ldr	x4, [x22, #:lo12:.LANCHOR77]
-	add	x20, x20, 16
-	mov	w5, 65535
-	ldrh	w3, [x0, #:lo12:.LANCHOR38]
-	mov	w6, 56
-	mov	w0, 0
+	ldr	w3, [x29, 104]
+.L2816:
+	mov	w0, w3
+	bl	decrement_vpc_count
+.L2815:
+	add	w21, w21, 1
+	b	.L2810
 .L2813:
-	cmp	w0, w3
-	bne	.L2815
-	ldr	x0, [x21, #:lo12:.LANCHOR83]
-	mov	w1, w23
-	ldrh	w2, [x0, x24]
-	adrp	x0, .LC77
-	add	x0, x0, :lo12:.LC77
+	orr	w0, w0, -2147483648
+	b	.L2846
+.L2827:
+	mov	w21, 56
+	ldr	x0, [x20, #:lo12:.LANCHOR73]
+	mov	w1, -1
+	adrp	x28, .LANCHOR85
+	umull	x21, w23, w21
+	str	w1, [x0, x21]
+.L2818:
+	ldr	x0, [x20, #:lo12:.LANCHOR73]
+	add	x3, x0, x21
+	ldr	w0, [x0, x21]
+	cmn	w0, #1
+	ldr	w0, [x3, 4]
+	beq	.L2822
+	cbnz	w24, .L2823
+.L2847:
+	str	w0, [x29, 124]
+	mov	w2, 1
+	ldr	w0, [x3, 24]
+	add	x1, x29, 124
+	bl	log2phys
+	ldr	x0, [x20, #:lo12:.LANCHOR73]
+	add	x21, x0, x21
+	ldr	x0, [x21, 16]
+	ldr	w0, [x0, 12]
+	cmn	w0, #1
+	beq	.L2825
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+	adrp	x2, .LANCHOR85
+	and	w1, w0, 65535
+	ubfiz	x0, x1, 1, 16
+	mov	w21, w1
+	ldr	x2, [x2, #:lo12:.LANCHOR85]
+	ldrh	w0, [x2, x0]
+	cbnz	w0, .L2826
+	adrp	x0, .LC76
+	mov	w2, 0
+	add	x0, x0, :lo12:.LC76
 	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR77]
-	mov	w2, w19
-	mov	w1, 0
-	bl	FlashEraseBlocks
-	ldr	x0, [x22, #:lo12:.LANCHOR77]
-	mov	w2, w19
+.L2826:
+	mov	w0, w21
+	bl	decrement_vpc_count
+.L2825:
+	add	w23, w23, 1
+	b	.L2812
+.L2822:
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+	ldrh	w1, [x19]
+	cmp	w1, w0, uxth
+	bne	.L2819
+	ldr	x2, [x28, #:lo12:.LANCHOR85]
+	ubfiz	x1, x1, 1, 16
+	ldrh	w3, [x19, 4]
+	ldrh	w0, [x2, x1]
+	sub	w0, w0, w3
+	strh	w0, [x2, x1]
+	strb	wzr, [x19, 6]
+	ldrh	w0, [x27]
+	strh	w0, [x19, 2]
+	strh	wzr, [x19, 4]
+.L2819:
+	ldrh	w0, [x19, 4]
+	cbnz	w0, .L2820
+	mov	x0, x19
+	bl	allocate_new_data_superblock
+.L2820:
+	ldr	w0, [x26, 96]
+	add	w0, w0, 1
+	str	w0, [x26, 96]
+	ldr	x0, [x20, #:lo12:.LANCHOR73]
+	add	x0, x0, x21
+	ldr	w0, [x0, 4]
+	lsr	w0, w0, 10
+	bl	FtlGcMarkBadPhyBlk
+	mov	x0, x19
+	bl	get_new_active_ppa
+	ldr	x1, [x20, #:lo12:.LANCHOR73]
+	mov	w2, w0
+	str	w2, [x29, 124]
+	add	x0, x1, x21
 	mov	w1, 1
-	bl	FlashEraseBlocks
-.L2810:
-	mov	w0, -1
-	strh	w0, [x25, #:lo12:.LANCHOR237]
+	str	w2, [x0, 4]
+	mov	w2, w24
+	ldrb	w3, [x19, 9]
+	bl	FlashProgPages
+	ldr	x0, [x20, #:lo12:.LANCHOR73]
+	ldr	w0, [x0, x21]
+	cmn	w0, #1
+	bne	.L2821
+	mov	w0, 1
+	str	w0, [x25, #:lo12:.LANCHOR78]
+.L2821:
+	ldr	w0, [x25, #:lo12:.LANCHOR78]
+	cbz	w0, .L2818
+	b	.L2807
+.L2823:
+	orr	w0, w0, -2147483648
+	b	.L2847
+	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
+	.section	.text.FtlSysFlush,"ax",@progbits
+	.align	2
+	.global	FtlSysFlush
+	.type	FtlSysFlush, %function
+FtlSysFlush:
+	adrp	x0, .LANCHOR78
+	ldr	w0, [x0, #:lo12:.LANCHOR78]
+	cbnz	w0, .L2851
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR247
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	ldr	w19, [x0, #:lo12:.LANCHOR247]
+	cmp	w19, 1
+	bne	.L2849
+	bl	FtlCacheWriteBack
+	bl	l2p_flush
+	mov	w0, w19
+	bl	FtlEctTblFlush
+	bl	FtlVpcTblFlush
+.L2849:
+	mov	w0, 0
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L2851:
+	mov	w0, 0
+	ret
+	.size	FtlSysFlush, .-FtlSysFlush
+	.section	.text.FtlDeInit,"ax",@progbits
+	.align	2
+	.global	FtlDeInit
+	.type	FtlDeInit, %function
+FtlDeInit:
+	adrp	x0, .LANCHOR247
+	ldr	w0, [x0, #:lo12:.LANCHOR247]
+	cmp	w0, 1
+	bne	.L2857
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	bl	FtlSysFlush
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+.L2857:
+	mov	w0, 0
+	ret
+	.size	FtlDeInit, .-FtlDeInit
+	.section	.text.ftl_deinit,"ax",@progbits
+	.align	2
+	.global	ftl_deinit
+	.type	ftl_deinit, %function
+ftl_deinit:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	bl	ftl_flash_de_init
+	bl	FtlDeInit
+	ldp	x29, x30, [sp], 16
+	b	ftl_flash_de_init
+	.size	ftl_deinit, .-ftl_deinit
+	.section	.text.rk_ftl_de_init,"ax",@progbits
+	.align	2
+	.global	rk_ftl_de_init
+	.type	rk_ftl_de_init, %function
+rk_ftl_de_init:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	bl	FlashDeInit
+	bl	FtlDeInit
+	ldp	x29, x30, [sp], 16
+	b	FlashDeInit
+	.size	rk_ftl_de_init, .-rk_ftl_de_init
+	.section	.text.ftl_cache_flush,"ax",@progbits
+	.align	2
+	.global	ftl_cache_flush
+	.type	ftl_cache_flush, %function
+ftl_cache_flush:
+	b	FtlCacheWriteBack
+	.size	ftl_cache_flush, .-ftl_cache_flush
+	.section	.text.ftl_discard,"ax",@progbits
+	.align	2
+	.global	ftl_discard
+	.type	ftl_discard, %function
+ftl_discard:
+	adrp	x0, .LANCHOR68
+	ldr	w0, [x0, #:lo12:.LANCHOR68]
+	cmp	w0, w1
+	bls	.L2873
+	stp	x29, x30, [sp, -80]!
+	cmp	w0, w2
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w19, w2
+	stp	x21, x22, [sp, 32]
+	str	x23, [sp, 48]
+	bcc	.L2875
+	mov	w20, w1
+	add	w1, w1, w2
+	cmp	w0, w1
+	bcc	.L2875
+	cmp	w2, 31
+	bhi	.L2867
+.L2886:
+	mov	w0, 0
+.L2865:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldr	x25, [sp, 64]
-	ldp	x29, x30, [sp], 128
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 80
 	ret
-.L2815:
-	ldrh	w1, [x20]
-	cmp	w1, w5
-	beq	.L2814
-	umaddl	x2, w19, w6, x4
-	add	w19, w19, 1
-	and	w19, w19, 65535
-	lsl	w1, w1, 10
-	stp	xzr, xzr, [x2, 8]
-	str	w1, [x2, 4]
-.L2814:
+.L2867:
+	adrp	x0, .LANCHOR78
+	ldr	w0, [x0, #:lo12:.LANCHOR78]
+	cbnz	w0, .L2886
+	adrp	x22, .LANCHOR55
+	bl	FtlCacheWriteBack
+	ldrh	w0, [x22, #:lo12:.LANCHOR55]
+	udiv	w21, w20, w0
+	msub	w20, w0, w21, w20
+	ands	w20, w20, 65535
+	beq	.L2869
+	sub	w20, w0, w20
+	add	w21, w21, 1
+	cmp	w20, w19
+	csel	w20, w20, w19, ls
+	sub	w19, w19, w20, uxth
+.L2869:
+	adrp	x20, .LANCHOR253
+	adrp	x23, .LANCHOR168
+	add	x20, x20, :lo12:.LANCHOR253
+	add	x23, x23, :lo12:.LANCHOR168
+	mov	w0, -1
+	str	w0, [x29, 76]
+.L2870:
+	ldrh	w0, [x22, #:lo12:.LANCHOR55]
+	cmp	w19, w0
+	bcs	.L2872
+	adrp	x0, .LANCHOR253
+	ldr	w1, [x0, #:lo12:.LANCHOR253]
+	cmp	w1, 32
+	bls	.L2886
+	str	wzr, [x0, #:lo12:.LANCHOR253]
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	b	.L2886
+.L2872:
+	mov	w2, 0
+	add	x1, x29, 72
+	mov	w0, w21
+	bl	log2phys
+	ldr	w0, [x29, 72]
+	cmn	w0, #1
+	beq	.L2871
+	ldr	w0, [x20]
+	mov	w2, 1
+	add	x1, x29, 76
 	add	w0, w0, 1
-	add	x20, x20, 2
-	and	w0, w0, 65535
-	b	.L2813
-.L2821:
+	str	w0, [x20]
+	ldr	w0, [x23]
+	add	w0, w0, 1
+	str	w0, [x23]
+	mov	w0, w21
+	bl	log2phys
+	ldr	w0, [x29, 72]
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+	bl	decrement_vpc_count
+.L2871:
+	ldrh	w0, [x22, #:lo12:.LANCHOR55]
+	add	w21, w21, 1
+	sub	w19, w19, w0
+	b	.L2870
+.L2873:
+	mov	w0, -1
 	ret
-	.size	ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error
-	.section	.text.ftl_read,"ax",@progbits
+.L2875:
+	mov	w0, -1
+	b	.L2865
+	.size	ftl_discard, .-ftl_discard
+	.section	.text.FtlRead,"ax",@progbits
 	.align	2
-	.global	ftl_read
-	.type	ftl_read, %function
-ftl_read:
+	.global	FtlRead
+	.type	FtlRead, %function
+FtlRead:
 	sub	sp, sp, #208
-	and	w0, w0, 255
-	cmp	w0, 16
+	adrp	x4, .LANCHOR247
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
+	ldr	w4, [x4, #:lo12:.LANCHOR247]
 	stp	x19, x20, [sp, 32]
-	mov	w19, w1
+	stp	x21, x22, [sp, 48]
+	cmp	w4, 1
 	stp	x23, x24, [sp, 64]
-	mov	x23, x3
+	stp	x25, x26, [sp, 80]
 	stp	x27, x28, [sp, 96]
-	mov	w27, w2
-	stp	x21, x22, [sp, 48]
-	stp	x25, x26, [sp, 80]
-	bne	.L2825
+	bne	.L2914
+	mov	x21, x3
+	mov	w23, w2
+	mov	w19, w1
+	cmp	w0, 16
+	bne	.L2889
 	mov	x2, x3
-	mov	w1, w27
+	mov	w1, w23
 	add	w0, w19, 256
 	bl	FtlVendorPartRead
-	mov	w21, w0
-.L2824:
-	mov	w0, w21
+	mov	w25, w0
+.L2887:
+	mov	w0, w25
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -19256,397 +19502,780 @@ ftl_read:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 208
 	ret
-.L2825:
-	add	w0, w1, w2
-	str	w0, [x29, 148]
+.L2889:
 	adrp	x0, .LANCHOR68
-	add	w1, w1, w2
 	ldr	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w1, w0
-	bhi	.L2848
-	adrp	x0, .LANCHOR232
-	ldr	w21, [x0, #:lo12:.LANCHOR232]
-	cmn	w21, #1
-	beq	.L2824
+	bcs	.L2914
+	cmp	w2, w0
+	bhi	.L2914
+	add	w1, w1, w2
+	str	w1, [x29, 148]
+	cmp	w0, w1
+	bcc	.L2914
 	adrp	x22, .LANCHOR55
-	bl	FtlCacheWriteBack
-	adrp	x25, .LANCHOR138
-	add	x25, x25, :lo12:.LANCHOR138
 	ldrh	w0, [x22, #:lo12:.LANCHOR55]
-	mov	w24, 0
-	mov	w21, 0
-	adrp	x26, .LANCHOR180
-	stp	wzr, wzr, [x29, 156]
 	udiv	w1, w19, w0
-	str	w1, [x29, 168]
-	add	w1, w19, w27
+	str	w1, [x29, 172]
+	add	w1, w19, w2
 	sub	w1, w1, #1
-	ldr	w20, [x29, 168]
 	udiv	w0, w1, w0
-	ldr	w1, [x29, 168]
+	adrp	x1, .LANCHOR226
+	str	w0, [x29, 168]
+	ldr	w0, [x29, 172]
+	sub	w4, w4, w0
+	ldr	w0, [x29, 168]
+	add	w0, w4, w0
 	str	w0, [x29, 164]
-	sub	w0, w0, w1
-	add	w0, w0, 1
-	adrp	x1, .LANCHOR166
-	str	w0, [x29, 172]
-	ldr	w0, [x1, #:lo12:.LANCHOR166]
-	ldr	w2, [x29, 172]
+	ldr	w0, [x1, #:lo12:.LANCHOR226]
 	add	w0, w0, w2
-	str	w0, [x1, #:lo12:.LANCHOR166]
-.L2827:
-	ldr	w0, [x29, 172]
-	cbnz	w0, .L2847
-	adrp	x0, .LANCHOR116
-	ldrh	w0, [x0, #:lo12:.LANCHOR116]
-	cbz	w0, .L2824
+	str	w0, [x1, #:lo12:.LANCHOR226]
+	adrp	x1, .LANCHOR171
+	ldr	w2, [x29, 164]
+	ldr	w0, [x1, #:lo12:.LANCHOR171]
+	add	w0, w0, w2
+	str	w0, [x1, #:lo12:.LANCHOR171]
+	ldp	w1, w0, [x29, 168]
+	bl	FtlCacheMetchLpa
+	cbz	w0, .L2890
+	bl	FtlCacheWriteBack
+.L2890:
+	ldr	w20, [x29, 172]
+	adrp	x26, .LANCHOR141
+	add	x26, x26, :lo12:.LANCHOR141
+	mov	w24, 0
+	mov	w25, 0
+	adrp	x27, .LANCHOR186
+	stp	wzr, wzr, [x29, 156]
+.L2891:
+	ldr	w0, [x29, 164]
+	cbnz	w0, .L2910
+	adrp	x0, .LANCHOR119
+	ldrh	w0, [x0, #:lo12:.LANCHOR119]
+	cbz	w0, .L2887
 	mov	w1, 1
 	mov	w0, 0
-	bl	rk_ftl_garbage_collect
-	b	.L2824
-.L2847:
+	bl	ftl_do_gc
+	b	.L2887
+.L2910:
 	add	x1, x29, 188
 	mov	w2, 0
 	mov	w0, w20
 	bl	log2phys
 	ldr	w1, [x29, 188]
 	cmn	w1, #1
-	bne	.L2828
+	bne	.L2892
 	add	x3, x22, :lo12:.LANCHOR55
 	mov	w28, 0
-.L2829:
+.L2893:
 	ldrh	w0, [x3]
 	cmp	w28, w0
-	bcc	.L2831
-.L2832:
-	ldr	w0, [x29, 172]
+	bcc	.L2895
+.L2896:
+	ldr	w0, [x29, 164]
 	add	w20, w20, 1
 	subs	w0, w0, #1
-	str	w0, [x29, 172]
-	beq	.L2836
+	str	w0, [x29, 164]
+	beq	.L2900
+	adrp	x0, .LANCHOR38
+	ldrh	w0, [x0, #:lo12:.LANCHOR38]
+	cmp	w24, w0, lsl 2
+	bne	.L2891
+.L2900:
+	cbz	w24, .L2891
+	ldr	x0, [x27, #:lo12:.LANCHOR186]
+	mov	w1, w24
+	mov	w2, 0
+	adrp	x28, .LANCHOR194
+	bl	FlashReadPages
+	ldr	w0, [x29, 156]
+	lsl	w0, w0, 9
+	str	w0, [x29, 132]
+	ldr	w0, [x29, 152]
+	lsl	w0, w0, 9
+	str	x0, [x29, 136]
+	ldr	w0, [x29, 160]
+	lsl	w0, w0, 9
+	str	w0, [x29, 144]
+	mov	w0, 56
+	umull	x0, w24, w0
+	mov	x24, 0
+	str	x0, [x29, 120]
+	adrp	x0, .LC68
+	add	x0, x0, :lo12:.LC68
+	str	x0, [x29, 112]
+.L2909:
+	ldr	x0, [x27, #:lo12:.LANCHOR186]
+	ldr	w2, [x29, 172]
+	add	x0, x0, x24
+	ldr	w1, [x0, 24]
+	cmp	w2, w1
+	bne	.L2902
+	ldr	x1, [x0, 8]
+	adrp	x0, .LANCHOR193
+	ldr	x0, [x0, #:lo12:.LANCHOR193]
+	cmp	x1, x0
+	bne	.L2903
+	ldr	x0, [x29, 136]
+	ldr	w2, [x29, 144]
+	add	x1, x1, x0
+	mov	x0, x21
+.L2931:
+	bl	ftl_memcpy
+.L2903:
+	ldr	x0, [x27, #:lo12:.LANCHOR186]
+	add	x2, x0, x24
+	ldr	w1, [x0, x24]
+	cmn	w1, #1
+	bne	.L2904
+	ldr	w0, [x26, 72]
+	mov	w25, w1
+	add	w0, w0, 1
+	str	w0, [x26, 72]
+.L2904:
+	ldr	x0, [x2, 16]
+	ldr	w1, [x2, 24]
+	ldr	w3, [x0, 8]
+	cmp	w1, w3
+	beq	.L2905
+	ldr	w3, [x26, 72]
+	add	w3, w3, 1
+	str	w3, [x26, 72]
+	ldr	x3, [x2, 8]
+	ldr	w4, [x3, 4]
+	str	w4, [sp]
+	ldp	w4, w5, [x0, 4]
+	ldr	w6, [x0, 12]
+	ldr	w7, [x3]
+	ldr	w2, [x2, 4]
+	ldr	w3, [x0]
+	ldr	x0, [x29, 112]
+	bl	printf
+.L2905:
+	ldr	x0, [x27, #:lo12:.LANCHOR186]
+	add	x1, x0, x24
+	ldr	w0, [x0, x24]
+	cmp	w0, 256
+	bne	.L2906
+	ldr	w0, [x1, 4]
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+	and	w1, w0, 65535
+	str	w1, [x29, 128]
+	bl	FtlGcRefreshBlock
+	adrp	x2, .LANCHOR78
+	add	x2, x2, :lo12:.LANCHOR78
+	adrp	x3, .LANCHOR213
+.L2908:
+	mov	w1, 1
+	stp	x3, x2, [x29, 96]
+	mov	w0, w1
+	bl	ftl_do_gc
+	ldr	x2, [x29, 104]
+	ldr	w0, [x2]
+	cbnz	w0, .L2907
+	ldr	x3, [x29, 96]
+	ldr	w1, [x29, 128]
+	ldrh	w0, [x3, #:lo12:.LANCHOR213]
+	cmp	w0, w1
+	beq	.L2908
+.L2907:
+	bl	FtlSysFlush
+.L2906:
+	ldr	x0, [x29, 120]
+	add	x24, x24, 56
+	cmp	x0, x24
+	bne	.L2909
+	mov	w24, 0
+	b	.L2891
+.L2895:
+	madd	w0, w20, w0, w28
+	cmp	w19, w0
+	bhi	.L2894
+	ldr	w1, [x29, 148]
+	cmp	w1, w0
+	bls	.L2894
+	sub	w0, w0, w19
+	str	x3, [x29, 136]
+	lsl	w0, w0, 9
+	mov	w2, 512
+	mov	w1, 0
+	add	x0, x21, x0
+	bl	ftl_memset
+	ldr	x3, [x29, 136]
+.L2894:
+	add	w28, w28, 1
+	b	.L2893
+.L2892:
+	ldr	x0, [x27, #:lo12:.LANCHOR186]
+	mov	w2, 56
+	umaddl	x0, w24, w2, x0
+	str	w1, [x0, 4]
+	ldr	w1, [x29, 172]
+	cmp	w20, w1
+	bne	.L2897
+	adrp	x1, .LANCHOR193
+	ldr	x1, [x1, #:lo12:.LANCHOR193]
+	str	x1, [x0, 8]
+	ldrh	w1, [x22, #:lo12:.LANCHOR55]
+	udiv	w2, w19, w1
+	msub	w2, w2, w1, w19
+	str	w2, [x29, 152]
+	sub	w2, w1, w2
+	cmp	w23, w2
+	csel	w2, w23, w2, ls
+	str	w2, [x29, 160]
+	cmp	w2, w1
+	bne	.L2898
+	str	x21, [x0, 8]
+.L2898:
+	adrp	x1, .LANCHOR58
+	adrp	x2, .LANCHOR196
+	str	w20, [x0, 24]
+	ldrh	w1, [x1, #:lo12:.LANCHOR58]
+	ldr	x2, [x2, #:lo12:.LANCHOR196]
+	mul	w1, w1, w24
+	add	w24, w24, 1
+	and	x1, x1, 4294967292
+	add	x1, x2, x1
+	str	x1, [x0, 16]
+	b	.L2896
+.L2897:
+	ldr	w1, [x29, 168]
+	cmp	w20, w1
+	bne	.L2899
+	ldrh	w2, [x22, #:lo12:.LANCHOR55]
+	adrp	x1, .LANCHOR194
+	ldr	w3, [x29, 148]
+	ldr	x1, [x1, #:lo12:.LANCHOR194]
+	str	x1, [x0, 8]
+	mul	w1, w20, w2
+	sub	w3, w3, w1
+	str	w3, [x29, 156]
+	cmp	w2, w3
+	bne	.L2898
+.L2930:
+	sub	w1, w1, w19
+	lsl	w1, w1, 9
+	add	x1, x21, x1
+	str	x1, [x0, 8]
+	b	.L2898
+.L2899:
+	ldrh	w1, [x22, #:lo12:.LANCHOR55]
+	mul	w1, w1, w20
+	b	.L2930
+.L2902:
+	ldr	w2, [x29, 168]
+	cmp	w2, w1
+	bne	.L2903
+	ldr	x1, [x0, 8]
+	ldr	x0, [x28, #:lo12:.LANCHOR194]
+	cmp	x1, x0
+	bne	.L2903
+	ldrh	w0, [x22, #:lo12:.LANCHOR55]
+	mul	w0, w0, w2
+	ldr	w2, [x29, 132]
+	sub	w0, w0, w19
+	lsl	w0, w0, 9
+	add	x0, x21, x0
+	b	.L2931
+.L2914:
+	mov	w25, -1
+	b	.L2887
+	.size	FtlRead, .-FtlRead
+	.section	.text.ftl_vendor_read,"ax",@progbits
+	.align	2
+	.global	ftl_vendor_read
+	.type	ftl_vendor_read, %function
+ftl_vendor_read:
+	mov	x3, x2
+	mov	w2, w1
+	mov	w1, w0
+	mov	w0, 16
+	b	FtlRead
+	.size	ftl_vendor_read, .-ftl_vendor_read
+	.section	.text.ftl_sys_read,"ax",@progbits
+	.align	2
+	.global	ftl_sys_read
+	.type	ftl_sys_read, %function
+ftl_sys_read:
+	mov	x3, x2
+	mov	w2, w1
+	add	w1, w0, 256
+	mov	w0, 16
+	b	FtlRead
+	.size	ftl_sys_read, .-ftl_sys_read
+	.section	.text.StorageSysDataLoad,"ax",@progbits
+	.align	2
+	.global	StorageSysDataLoad
+	.type	StorageSysDataLoad, %function
+StorageSysDataLoad:
+	stp	x29, x30, [sp, -32]!
+	mov	x2, 512
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x1
+	mov	w20, w0
+	mov	w1, 0
+	mov	x0, x19
+	bl	memset
+	mov	x3, x19
+	add	w1, w20, 256
+	ldp	x19, x20, [sp, 16]
+	mov	w2, 1
+	ldp	x29, x30, [sp], 32
+	mov	w0, 16
+	b	FtlRead
+	.size	StorageSysDataLoad, .-StorageSysDataLoad
+	.section	.text.FlashBootVendorRead,"ax",@progbits
+	.align	2
+	.global	FlashBootVendorRead
+	.type	FlashBootVendorRead, %function
+FlashBootVendorRead:
+	mov	x3, x2
+	mov	w1, w0
+	mov	w2, 1
+	mov	w0, 16
+	b	FtlRead
+	.size	FlashBootVendorRead, .-FlashBootVendorRead
+	.section	.text.ftl_read,"ax",@progbits
+	.align	2
+	.global	ftl_read
+	.type	ftl_read, %function
+ftl_read:
+	and	w0, w0, 255
+	b	FtlRead
+	.size	ftl_read, .-ftl_read
+	.section	.text.FtlInit,"ax",@progbits
+	.align	2
+	.global	FtlInit
+	.type	FtlInit, %function
+FtlInit:
+	stp	x29, x30, [sp, -64]!
+	mov	w0, -1
+	adrp	x1, .LC77
+	add	x1, x1, :lo12:.LC77
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR247
+	stp	x21, x22, [sp, 32]
+	str	w0, [x19, #:lo12:.LANCHOR247]
+	adrp	x0, .LANCHOR254
+	stp	x23, x24, [sp, 48]
+	str	wzr, [x0, #:lo12:.LANCHOR254]
+	adrp	x0, .LANCHOR78
+	str	wzr, [x0, #:lo12:.LANCHOR78]
+	adrp	x0, .LC7
+	add	x0, x0, :lo12:.LC7
+	bl	printf
+	adrp	x0, .LANCHOR15
+	add	x0, x0, :lo12:.LANCHOR15
+	bl	FtlConstantsInit
+	bl	FtlMemInit
+	bl	FtlVariablesInit
+	adrp	x0, .LANCHOR39
+	ldrh	w0, [x0, #:lo12:.LANCHOR39]
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlLoadBbt
+	cbz	w0, .L2939
+	adrp	x1, .LANCHOR255
+	adrp	x0, .LC78
+	add	x1, x1, :lo12:.LANCHOR255
+	add	x0, x0, :lo12:.LC78
+.L2948:
+	bl	printf
+.L2940:
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	ret
+.L2939:
+	bl	FtlSysBlkInit
+	cbz	w0, .L2941
+	adrp	x1, .LANCHOR255
+	adrp	x0, .LC79
+	add	x1, x1, :lo12:.LANCHOR255
+	add	x0, x0, :lo12:.LC79
+	b	.L2948
+.L2941:
+	mov	w1, 1
+	str	w1, [x19, #:lo12:.LANCHOR247]
+	bl	ftl_do_gc
+	adrp	x0, .LANCHOR90
+	mov	x22, x0
+	ldrh	w23, [x0, #:lo12:.LANCHOR90]
+	cmp	w23, 15
+	bhi	.L2940
+	adrp	x20, .LANCHOR115
+	add	x20, x20, :lo12:.LANCHOR115
+	mov	w19, 0
+	adrp	x24, .LANCHOR213
+	mov	w21, 65535
+.L2945:
+	ldrh	w0, [x24, #:lo12:.LANCHOR213]
+	cmp	w0, w21
+	bne	.L2943
+	ldrh	w0, [x20]
+	cmp	w0, w21
+	bne	.L2943
+	and	w0, w19, 63
+	bl	List_get_gc_head_node
+	bl	FtlGcRefreshBlock
+.L2943:
+	mov	w1, 1
+	mov	w0, w1
+	bl	ftl_do_gc
+	mov	w1, 1
+	mov	w0, 0
+	bl	ftl_do_gc
+	ldrh	w1, [x22, #:lo12:.LANCHOR90]
+	add	w0, w23, 2
+	cmp	w1, w0
+	bhi	.L2940
+	add	w19, w19, 1
+	cmp	w19, 4096
+	bne	.L2945
+	b	.L2940
+	.size	FtlInit, .-FtlInit
+	.section	.text.rk_ftl_init,"ax",@progbits
+	.align	2
+	.global	rk_ftl_init
+	.type	rk_ftl_init, %function
+rk_ftl_init:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	bl	FlashInit
+	mov	w19, w0
+	cbnz	w0, .L2950
+	bl	FtlInit
+.L2950:
+	bl	idb_init
+	mov	w1, w19
+	adrp	x0, .LC80
+	add	x0, x0, :lo12:.LC80
+	bl	printf
+	mov	w0, w19
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	rk_ftl_init, .-rk_ftl_init
+	.section	.text.ftl_fix_nand_power_lost_error,"ax",@progbits
+	.align	2
+	.global	ftl_fix_nand_power_lost_error
+	.type	ftl_fix_nand_power_lost_error, %function
+ftl_fix_nand_power_lost_error:
+	adrp	x0, .LANCHOR16
+	ldrb	w0, [x0, #:lo12:.LANCHOR16]
+	cbz	w0, .L2967
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	str	x25, [sp, 64]
+	adrp	x25, .LANCHOR241
+	stp	x23, x24, [sp, 48]
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR85
+	ldrh	w23, [x25, #:lo12:.LANCHOR241]
+	ldr	x0, [x21, #:lo12:.LANCHOR85]
+	mov	w1, w23
+	stp	x19, x20, [sp, 16]
+	ubfiz	x24, x23, 1, 16
+	adrp	x19, .LC81
+	ldrh	w2, [x0, x24]
+	add	x0, x19, :lo12:.LC81
+	bl	printf
+	adrp	x0, .LANCHOR93
+	add	x11, x0, :lo12:.LANCHOR93
+	ldrh	w0, [x0, #:lo12:.LANCHOR93]
+	bl	FtlGcRefreshOpenBlock
+	adrp	x0, .LANCHOR94
+	add	x20, x0, :lo12:.LANCHOR94
+	ldrh	w0, [x0, #:lo12:.LANCHOR94]
+	bl	FtlGcRefreshOpenBlock
+	mov	x0, x11
+	bl	allocate_new_data_superblock
+	mov	x0, x20
+	mov	w20, 4097
+	bl	allocate_new_data_superblock
+.L2954:
+	subs	w20, w20, #1
+	beq	.L2958
+	mov	w1, 1
+	mov	w0, w1
+	bl	ftl_do_gc
+	ldr	x0, [x21, #:lo12:.LANCHOR85]
+	ldrh	w0, [x0, x24]
+	cbnz	w0, .L2954
+.L2958:
+	ldr	x0, [x21, #:lo12:.LANCHOR85]
+	mov	w1, w23
+	ldrh	w2, [x0, x24]
+	add	x0, x19, :lo12:.LC81
+	bl	printf
+	ldr	x0, [x21, #:lo12:.LANCHOR85]
+	ldrh	w19, [x0, x24]
+	cbnz	w19, .L2956
+	add	x20, x29, 128
+	adrp	x22, .LANCHOR79
+	strh	w23, [x20, -48]!
+	mov	x0, x20
+	bl	make_superblock
 	adrp	x0, .LANCHOR38
-	ldrh	w0, [x0, #:lo12:.LANCHOR38]
-	cmp	w24, w0, lsl 2
-	bne	.L2827
-.L2836:
-	cbz	w24, .L2827
-	ldr	x0, [x26, #:lo12:.LANCHOR180]
-	mov	w1, w24
-	mov	w2, 0
-	adrp	x28, .LANCHOR187
-	bl	FlashReadPages
-	ldr	w0, [x29, 156]
-	lsl	w0, w0, 9
-	str	w0, [x29, 132]
-	ldr	w0, [x29, 152]
-	lsl	w0, w0, 9
-	str	x0, [x29, 136]
-	ldr	w0, [x29, 160]
-	lsl	w0, w0, 9
-	str	w0, [x29, 144]
-	mov	w0, 56
-	umull	x0, w24, w0
-	mov	x24, 0
-	str	x0, [x29, 120]
-	adrp	x0, .LC65
-	add	x0, x0, :lo12:.LC65
-	str	x0, [x29, 112]
-.L2846:
-	ldr	x0, [x26, #:lo12:.LANCHOR180]
-	ldr	w2, [x29, 168]
-	add	x0, x0, x24
-	ldr	w1, [x0, 24]
-	cmp	w2, w1
-	bne	.L2838
-	ldr	x1, [x0, 8]
-	adrp	x0, .LANCHOR186
-	ldr	x0, [x0, #:lo12:.LANCHOR186]
-	cmp	x1, x0
-	bne	.L2839
-	ldr	x0, [x29, 136]
-	ldr	w2, [x29, 144]
-	add	x1, x1, x0
-	mov	x0, x23
-.L2863:
-	bl	ftl_memcpy
-.L2839:
-	ldr	x0, [x26, #:lo12:.LANCHOR180]
-	add	x0, x0, x24
-	ldr	x2, [x0, 16]
-	ldr	w1, [x0, 24]
-	ldr	w3, [x2, 8]
-	cmp	w1, w3
-	beq	.L2840
-	ldr	w3, [x25, 72]
-	add	w3, w3, 1
-	str	w3, [x25, 72]
-	ldr	x3, [x0, 8]
-	ldr	w4, [x3, 4]
-	str	w4, [sp]
-	ldp	w4, w5, [x2, 4]
-	ldr	w6, [x2, 12]
-	ldr	w7, [x3]
-	ldr	w3, [x2]
-	ldr	w2, [x0, 4]
-	ldr	x0, [x29, 112]
+	ldr	x4, [x22, #:lo12:.LANCHOR79]
+	add	x20, x20, 16
+	mov	w5, 65535
+	ldrh	w3, [x0, #:lo12:.LANCHOR38]
+	mov	w6, 56
+	mov	w0, 0
+.L2959:
+	cmp	w0, w3
+	bne	.L2961
+	ldr	x0, [x21, #:lo12:.LANCHOR85]
+	mov	w1, w23
+	ldrh	w2, [x0, x24]
+	adrp	x0, .LC82
+	add	x0, x0, :lo12:.LC82
 	bl	printf
-.L2840:
-	ldr	x0, [x26, #:lo12:.LANCHOR180]
-	add	x1, x0, x24
-	ldr	w0, [x0, x24]
-	cmn	w0, #1
-	bne	.L2841
-	ldr	w1, [x25, 72]
-	mov	w21, w0
-	add	w1, w1, 1
-	str	w1, [x25, 72]
-.L2842:
-	ldr	x0, [x29, 120]
-	add	x24, x24, 56
-	cmp	x0, x24
-	bne	.L2846
-	mov	w24, 0
-	b	.L2827
-.L2831:
-	madd	w0, w20, w0, w28
-	cmp	w19, w0
-	bhi	.L2830
-	ldr	w1, [x29, 148]
-	cmp	w1, w0
-	bls	.L2830
-	sub	w0, w0, w19
-	str	x3, [x29, 136]
-	lsl	w0, w0, 9
-	mov	w2, 512
+	ldr	x0, [x22, #:lo12:.LANCHOR79]
+	mov	w2, w19
 	mov	w1, 0
-	add	x0, x23, x0
-	bl	ftl_memset
-	ldr	x3, [x29, 136]
-.L2830:
-	add	w28, w28, 1
-	b	.L2829
-.L2828:
-	ldr	x0, [x26, #:lo12:.LANCHOR180]
-	mov	w2, 56
-	umaddl	x0, w24, w2, x0
-	str	w1, [x0, 4]
-	ldr	w1, [x29, 168]
-	cmp	w20, w1
-	bne	.L2833
-	adrp	x1, .LANCHOR186
-	ldr	x1, [x1, #:lo12:.LANCHOR186]
-	str	x1, [x0, 8]
-	ldrh	w1, [x22, #:lo12:.LANCHOR55]
-	udiv	w2, w19, w1
-	msub	w2, w2, w1, w19
-	str	w2, [x29, 152]
-	sub	w2, w1, w2
-	cmp	w27, w2
-	csel	w2, w27, w2, ls
-	str	w2, [x29, 160]
-	cmp	w1, w2
-	bne	.L2834
-	str	x23, [x0, 8]
-.L2834:
-	adrp	x1, .LANCHOR58
-	adrp	x2, .LANCHOR189
-	str	w20, [x0, 24]
-	ldrh	w1, [x1, #:lo12:.LANCHOR58]
-	ldr	x2, [x2, #:lo12:.LANCHOR189]
-	mul	w1, w1, w24
-	add	w24, w24, 1
-	and	x1, x1, 4294967292
-	add	x1, x2, x1
-	str	x1, [x0, 16]
-	b	.L2832
-.L2833:
-	ldr	w1, [x29, 164]
-	cmp	w20, w1
-	bne	.L2835
-	ldrh	w2, [x22, #:lo12:.LANCHOR55]
-	adrp	x1, .LANCHOR187
-	ldr	w3, [x29, 148]
-	ldr	x1, [x1, #:lo12:.LANCHOR187]
-	str	x1, [x0, 8]
-	mul	w1, w20, w2
-	sub	w3, w3, w1
-	str	w3, [x29, 156]
-	cmp	w2, w3
-	bne	.L2834
-.L2862:
-	sub	w1, w1, w19
-	lsl	w1, w1, 9
-	add	x1, x23, x1
-	str	x1, [x0, 8]
-	b	.L2834
-.L2835:
-	ldrh	w1, [x22, #:lo12:.LANCHOR55]
-	mul	w1, w1, w20
-	b	.L2862
-.L2838:
-	ldr	w2, [x29, 164]
-	cmp	w2, w1
-	bne	.L2839
-	ldr	x1, [x0, 8]
-	ldr	x0, [x28, #:lo12:.LANCHOR187]
-	cmp	x1, x0
-	bne	.L2839
-	ldrh	w0, [x22, #:lo12:.LANCHOR55]
-	mul	w0, w0, w2
-	ldr	w2, [x29, 132]
-	sub	w0, w0, w19
-	lsl	w0, w0, 9
-	add	x0, x23, x0
-	b	.L2863
-.L2841:
-	cmp	w0, 256
-	bne	.L2842
-	ldr	w0, [x1, 4]
-	lsr	w0, w0, 10
-	bl	P2V_block_in_plane
-	and	w1, w0, 65535
-	str	w1, [x29, 128]
-	bl	FtlGcRefreshBlock
-	mov	w2, 2049
-	adrp	x3, .LANCHOR205
-.L2844:
-	subs	w2, w2, #1
-	bne	.L2843
-.L2845:
-	bl	FtlSysFlush
-	b	.L2842
-.L2843:
+	bl	FlashEraseBlocks
+	ldr	x0, [x22, #:lo12:.LANCHOR79]
+	mov	w2, w19
 	mov	w1, 1
-	str	x3, [x29, 96]
-	mov	w0, w1
-	str	w2, [x29, 108]
-	bl	rk_ftl_garbage_collect
-	ldr	x3, [x29, 96]
-	ldr	w1, [x29, 128]
-	ldr	w2, [x29, 108]
-	ldrh	w0, [x3, #:lo12:.LANCHOR205]
-	cmp	w0, w1
-	beq	.L2844
-	b	.L2845
-.L2848:
-	mov	w21, -1
-	b	.L2824
-	.size	ftl_read, .-ftl_read
+	bl	FlashEraseBlocks
+.L2956:
+	mov	w0, -1
+	strh	w0, [x25, #:lo12:.LANCHOR241]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 128
+	ret
+.L2961:
+	ldrh	w1, [x20]
+	cmp	w1, w5
+	beq	.L2960
+	umaddl	x2, w19, w6, x4
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	lsl	w1, w1, 10
+	stp	xzr, xzr, [x2, 8]
+	str	w1, [x2, 4]
+.L2960:
+	add	w0, w0, 1
+	add	x20, x20, 2
+	and	w0, w0, 65535
+	b	.L2959
+.L2967:
+	ret
+	.size	ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error
 	.section	.text.FtlWrite,"ax",@progbits
 	.align	2
 	.global	FtlWrite
 	.type	FtlWrite, %function
 FtlWrite:
-	stp	x29, x30, [sp, -240]!
+	stp	x29, x30, [sp, -256]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	mov	w21, w1
-	adrp	x1, .LANCHOR76
+	mov	w22, w1
+	adrp	x1, .LANCHOR78
+	stp	x25, x26, [sp, 64]
+	mov	w25, w2
 	stp	x19, x20, [sp, 16]
+	ldr	w2, [x1, #:lo12:.LANCHOR78]
 	stp	x23, x24, [sp, 48]
-	ldr	w1, [x1, #:lo12:.LANCHOR76]
-	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w1, .L2896
-	and	w0, w0, 255
-	mov	w23, w2
-	mov	x24, x3
+	str	x1, [x29, 120]
+	cbnz	w2, .L3013
+	adrp	x1, .LANCHOR247
+	ldr	w1, [x1, #:lo12:.LANCHOR247]
+	cmp	w1, 1
+	bne	.L3013
+	mov	x23, x3
 	cmp	w0, 16
-	bne	.L2866
+	bne	.L2972
 	mov	x2, x3
-	mov	w1, w23
-	add	w0, w21, 256
+	mov	w1, w25
+	add	w0, w22, 256
 	bl	FtlVendorPartWrite
-.L2864:
+.L2970:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 240
+	ldp	x29, x30, [sp], 256
 	ret
-.L2866:
+.L2972:
 	adrp	x0, .LANCHOR68
-	add	w2, w21, w2
-	ldr	w0, [x0, #:lo12:.LANCHOR68]
-	cmp	w2, w0
-	bhi	.L2897
-	adrp	x0, .LANCHOR232
-	ldr	w0, [x0, #:lo12:.LANCHOR232]
-	cmn	w0, #1
-	beq	.L2864
-	adrp	x0, .LANCHOR249
-	adrp	x26, .LANCHOR55
-	mov	w1, 2048
-	sub	w2, w2, #1
-	str	w1, [x0, #:lo12:.LANCHOR249]
-	ldrh	w1, [x26, #:lo12:.LANCHOR55]
-	str	x26, [x29, 160]
-	udiv	w0, w2, w1
-	adrp	x2, .LANCHOR162
-	udiv	w20, w21, w1
-	str	w0, [x29, 152]
-	sub	w27, w0, w20
-	ldr	w0, [x2, #:lo12:.LANCHOR162]
-	add	w25, w27, 1
+	ldr	w1, [x0, #:lo12:.LANCHOR68]
+	cmp	w22, w1
+	bcs	.L3016
+	cmp	w25, w1
+	bhi	.L3016
+	add	w0, w22, w25
+	cmp	w1, w0
+	bcc	.L3016
+	adrp	x1, .LANCHOR256
+	adrp	x3, .LANCHOR55
+	mov	w2, 2048
+	sub	w0, w0, #1
+	str	w2, [x1, #:lo12:.LANCHOR256]
+	adrp	x2, .LANCHOR167
+	ldrh	w1, [x3, #:lo12:.LANCHOR55]
+	adrp	x21, .LANCHOR72
+	str	x3, [x29, 184]
+	cmp	w25, w1, lsl 1
+	udiv	w0, w0, w1
+	udiv	w26, w22, w1
+	str	w0, [x29, 172]
+	sub	w27, w0, w26
+	ldr	w0, [x2, #:lo12:.LANCHOR167]
+	add	w24, w27, 1
+	add	w0, w0, w24
+	str	w0, [x2, #:lo12:.LANCHOR167]
+	adrp	x2, .LANCHOR225
+	ldr	w0, [x2, #:lo12:.LANCHOR225]
 	add	w0, w0, w25
-	str	w0, [x2, #:lo12:.LANCHOR162]
-	adrp	x0, .LANCHOR132
-	ldr	x2, [x0, #:lo12:.LANCHOR132]
-	cbz	x2, .L2868
+	str	w0, [x2, #:lo12:.LANCHOR225]
+	ldr	w2, [x21, #:lo12:.LANCHOR72]
+	cset	w0, cs
+	str	w0, [x29, 176]
+	cbz	w2, .L2974
+	adrp	x0, .LANCHOR73
+	sub	w2, w2, #1
+	mov	w3, 56
+	adrp	x20, .LANCHOR257
+	ldr	x0, [x0, #:lo12:.LANCHOR73]
+	umaddl	x2, w2, w3, x0
 	ldr	w0, [x2, 24]
-	cmp	w20, w0
-	beq	.L2869
-	bl	FtlCacheWriteBack
-.L2868:
-	adrp	x0, .LANCHOR91
-	mov	w19, w20
-	add	x22, x0, :lo12:.LANCHOR91
-.L2870:
-	cbnz	w25, .L2895
-	ldr	w0, [x29, 152]
-	sub	w1, w0, w20
-	mov	w0, 0
-	bl	rk_ftl_garbage_collect
-.L2896:
-	mov	w0, 0
-	b	.L2864
-.L2869:
-	adrp	x3, .LANCHOR164
-	ldr	w0, [x3, #:lo12:.LANCHOR164]
+	cmp	w26, w0
+	bne	.L2975
+	adrp	x3, .LANCHOR169
+	ldr	w0, [x3, #:lo12:.LANCHOR169]
 	add	w0, w0, 1
-	str	w0, [x3, #:lo12:.LANCHOR164]
-	msub	w0, w20, w1, w21
+	str	w0, [x3, #:lo12:.LANCHOR169]
+	ldr	w0, [x20, #:lo12:.LANCHOR257]
 	ldr	x3, [x2, 8]
+	add	w0, w0, 1
+	str	w0, [x20, #:lo12:.LANCHOR257]
+	msub	w0, w26, w1, w22
 	sub	w1, w1, w0
-	cmp	w23, w1
+	cmp	w25, w1
 	lsl	w0, w0, 9
-	csel	w19, w23, w1, ls
+	csel	w19, w25, w1, ls
 	add	x0, x3, x0
-	lsl	w22, w19, 9
-	mov	x1, x24
-	mov	w2, w22
+	lsl	w24, w19, 9
+	mov	x1, x23
+	mov	w2, w24
 	bl	ftl_memcpy
-	cbz	w27, .L2896
-	sub	w23, w23, w19
-	add	w21, w21, w19
-	add	x24, x24, x22
-	add	w20, w20, 1
+	cbnz	w27, .L2976
+	ldr	w0, [x20, #:lo12:.LANCHOR257]
+	cmp	w0, 2
+	bgt	.L2976
+.L3013:
+	mov	w0, 0
+	b	.L2970
+.L2976:
+	add	x23, x23, x24
+	sub	w25, w25, w19
+	add	w22, w22, w19
+	add	w26, w26, 1
+	mov	w24, w27
+.L2975:
+	str	wzr, [x20, #:lo12:.LANCHOR257]
+.L2974:
+	ldr	w1, [x29, 172]
+	mov	w0, w26
+	bl	FtlCacheMetchLpa
+	cbz	w0, .L2977
 	bl	FtlCacheWriteBack
-	mov	w25, w27
-	b	.L2868
-.L2895:
-	adrp	x0, .LANCHOR91
-	add	x0, x0, :lo12:.LANCHOR91
+.L2977:
+	adrp	x0, .LANCHOR252
+	mov	w20, w26
+	adrp	x27, .LANCHOR93
+	str	x0, [x29, 112]
+	add	x1, x27, :lo12:.LANCHOR93
+	str	x1, [x0, #:lo12:.LANCHOR252]
+	adrp	x0, .LANCHOR57
+	add	x0, x0, :lo12:.LANCHOR57
+	str	x0, [x29, 136]
+.L2978:
+	cbnz	w24, .L3007
+	bl	FtlCacheWriteBack
+	ldr	w0, [x29, 172]
+	sub	w1, w0, w26
+	mov	w0, 0
+	bl	ftl_do_gc
+	adrp	x1, .LANCHOR90
+	mov	x22, x1
+	ldrh	w0, [x1, #:lo12:.LANCHOR90]
+	cmp	w0, 5
+	bls	.L3008
+	cmp	w0, 31
+	bhi	.L3013
+	adrp	x0, .LANCHOR2
+	ldrb	w0, [x0, #:lo12:.LANCHOR2]
+	cbnz	w0, .L3013
+.L3008:
+	adrp	x20, .LANCHOR115
+	adrp	x21, .LANCHOR116
+	adrp	x19, .LANCHOR182
+	add	x20, x20, :lo12:.LANCHOR115
+	add	x21, x21, :lo12:.LANCHOR116
+	add	x19, x19, :lo12:.LANCHOR182
+.L3011:
+	adrp	x0, .LANCHOR213
+	ldrh	w1, [x0, #:lo12:.LANCHOR213]
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L3010
+	ldrh	w0, [x20]
+	cmp	w0, w1
+	bne	.L3010
+	ldrh	w1, [x21]
+	cmp	w1, w0
+	bne	.L3010
+	and	w0, w24, 7
+	bl	List_get_gc_head_node
+	bl	FtlGcRefreshBlock
+.L3010:
+	adrp	x1, .LANCHOR181
+	mov	w0, 128
+	strh	w0, [x19]
+	strh	w0, [x1, #:lo12:.LANCHOR181]
+	mov	w1, 1
+	mov	w0, w1
+	bl	ftl_do_gc
+	mov	w1, 1
+	mov	w0, 0
+	bl	ftl_do_gc
+	ldr	x0, [x29, 120]
+	ldr	w0, [x0, #:lo12:.LANCHOR78]
+	cbnz	w0, .L3013
+	ldrh	w0, [x22, #:lo12:.LANCHOR90]
+	cmp	w0, 2
+	bhi	.L3013
+	add	w24, w24, 1
+	cmp	w24, 256
+	bne	.L3011
+	b	.L3013
+.L3007:
+	add	x0, x27, :lo12:.LANCHOR93
 	adrp	x1, .LANCHOR38
-	str	x1, [x29, 120]
+	str	x1, [x29, 144]
 	ldrb	w2, [x0, 6]
 	ldrh	w0, [x1, #:lo12:.LANCHOR38]
 	cmp	w2, w0
-	bcc	.L2871
-	mov	w2, 1673
-	adrp	x1, .LANCHOR250
+	bcc	.L2979
+	mov	w2, 1472
+	adrp	x1, .LANCHOR258
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR250
+	add	x1, x1, :lo12:.LANCHOR258
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -19654,30 +20283,36 @@ FtlWrite:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2871:
-	ldrh	w0, [x22, 4]
-	cbnz	w0, .L2872
-	bl	FtlCacheWriteBack
-	mov	x0, x22
+.L2979:
+	add	x19, x27, :lo12:.LANCHOR93
+	ldrh	w0, [x19, 4]
+	cbnz	w0, .L2980
+	mov	x0, x19
 	bl	allocate_new_data_superblock
-.L2872:
-	ldrb	w0, [x22, 7]
-	ldrh	w1, [x22, 4]
-	lsl	w0, w0, 2
-	cmp	w0, w1
-	csel	w0, w0, w1, ls
-	ldrb	w1, [x22, 6]
-	cmp	w0, w25
-	csel	w0, w0, w25, ls
-	str	w0, [x29, 144]
-	ldr	x0, [x29, 120]
+	ldr	x0, [x29, 112]
+	str	x19, [x0, #:lo12:.LANCHOR252]
+.L2980:
+	adrp	x1, .LANCHOR185
+	ldr	w2, [x21, #:lo12:.LANCHOR72]
+	str	x1, [x29, 104]
+	ldr	w0, [x1, #:lo12:.LANCHOR185]
+	sub	w0, w0, w2
+	add	x2, x27, :lo12:.LANCHOR93
+	ldrh	w3, [x2, 4]
+	ldrb	w2, [x2, 6]
+	cmp	w0, w3
+	csel	w0, w0, w3, ls
+	cmp	w0, w24
+	csel	w0, w0, w24, ls
+	str	w0, [x29, 132]
+	ldr	x0, [x29, 144]
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
-	cmp	w1, w0
-	bcc	.L2873
-	mov	w2, 1706
-	adrp	x1, .LANCHOR250
+	cmp	w2, w0
+	bcc	.L2981
+	mov	w2, 1515
+	adrp	x1, .LANCHOR258
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR250
+	add	x1, x1, :lo12:.LANCHOR258
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -19685,33 +20320,21 @@ FtlWrite:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2873:
-	adrp	x0, .LANCHOR58
-	add	x0, x0, :lo12:.LANCHOR58
-	str	xzr, [x29, 168]
-	str	x0, [x29, 112]
-	adrp	x0, .LANCHOR57
-	add	x0, x0, :lo12:.LANCHOR57
-	str	x0, [x29, 104]
-.L2874:
-	ldr	w1, [x29, 144]
-	adrp	x28, .LANCHOR182
-	ldr	w27, [x29, 168]
-	cmp	w27, w1
-	bcc	.L2893
-	mov	x27, x1
-.L2875:
-	ldr	x0, [x28, #:lo12:.LANCHOR182]
-	mov	x3, x22
-	mov	w2, 0
-	mov	w1, w27
-	bl	FtlProgPages
-	cmp	w25, w27
-	bcs	.L2894
-	mov	w2, 1795
-	adrp	x1, .LANCHOR250
+.L2981:
+	str	wzr, [x29, 180]
+.L2982:
+	ldr	w1, [x29, 132]
+	ldr	w0, [x29, 180]
+	cmp	w0, w1
+	bne	.L3002
+.L2983:
+	ldr	w0, [x29, 180]
+	cmp	w24, w0
+	bcs	.L3003
+	mov	w2, 1609
+	adrp	x1, .LANCHOR258
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR250
+	add	x1, x1, :lo12:.LANCHOR258
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -19719,75 +20342,125 @@ FtlWrite:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2894:
-	sub	w25, w25, w27
-	b	.L2870
-.L2893:
-	ldrh	w0, [x22, 4]
-	cbz	w0, .L2875
-	add	x1, x29, 180
+.L3003:
+	ldr	w0, [x29, 180]
+	ldr	w1, [x21, #:lo12:.LANCHOR72]
+	sub	w24, w24, w0
+	ldr	x0, [x29, 104]
+	ldr	w0, [x0, #:lo12:.LANCHOR185]
+	cmp	w1, w0
+	bcs	.L3004
+	ldr	w0, [x29, 176]
+	cbnz	w0, .L3004
+	add	x0, x27, :lo12:.LANCHOR93
+	ldrh	w0, [x0, 4]
+	cbz	w0, .L3004
+.L3006:
+	str	wzr, [x29, 176]
+	b	.L2978
+.L3002:
+	add	x0, x27, :lo12:.LANCHOR93
+	ldrh	w0, [x0, 4]
+	cbz	w0, .L2983
+	ldr	w0, [x29, 172]
+	cmp	w0, w20
+	ldr	w0, [x29, 176]
+	cset	w3, eq
+	tst	w3, w0
+	beq	.L2984
+	ldr	w0, [x29, 180]
+	cbz	w0, .L2984
+	ldr	x0, [x29, 184]
+	ldrh	w1, [x0, #:lo12:.LANCHOR55]
+	add	w0, w22, w25
+	msub	w0, w20, w1, w0
+	cmp	w1, w0
+	bne	.L2983
+.L2984:
+	add	x1, x29, 196
 	mov	w2, 0
-	mov	w0, w19
+	str	w3, [x29, 96]
+	adrp	x19, .LANCHOR73
+	mov	w0, w20
 	bl	log2phys
-	mov	x0, x22
+	add	x0, x27, :lo12:.LANCHOR93
 	bl	get_new_active_ppa
-	ldr	x1, [x29, 168]
-	mov	x3, 56
-	mul	x26, x1, x3
-	ldr	x1, [x28, #:lo12:.LANCHOR182]
-	add	x1, x1, x26
+	ldr	w5, [x21, #:lo12:.LANCHOR72]
+	mov	w4, 56
+	ldr	x1, [x19, #:lo12:.LANCHOR73]
+	str	w4, [x29, 168]
+	nop // between mem op and mult-accumulate
+	umaddl	x1, w5, w4, x1
 	str	w0, [x1, 4]
-	ldr	x0, [x29, 112]
-	str	w19, [x1, 24]
-	ldrh	w2, [x0]
-	mul	w27, w27, w2
-	and	x0, x27, 4294967292
-	str	x0, [x29, 136]
-	adrp	x0, .LANCHOR189
-	ldr	x3, [x29, 136]
-	ldr	x0, [x0, #:lo12:.LANCHOR189]
-	str	x0, [x29, 128]
-	add	x27, x0, x3
-	str	x27, [x1, 16]
-	mov	x0, x27
+	adrp	x0, .LANCHOR58
+	str	w20, [x1, 24]
+	ldrh	w2, [x0, #:lo12:.LANCHOR58]
+	mul	w0, w5, w2
+	and	x0, x0, 4294967292
+	str	x0, [x29, 160]
+	adrp	x0, .LANCHOR197
+	ldr	x3, [x29, 160]
+	ldr	x0, [x0, #:lo12:.LANCHOR197]
+	str	x0, [x29, 152]
+	add	x28, x0, x3
+	adrp	x0, .LANCHOR57
+	str	x28, [x1, 16]
+	ldrh	w0, [x0, #:lo12:.LANCHOR57]
+	mul	w0, w0, w5
+	adrp	x5, .LANCHOR192
+	ldr	x5, [x5, #:lo12:.LANCHOR192]
+	and	x0, x0, 4294967292
+	add	x0, x5, x0
+	str	x0, [x1, 8]
 	mov	w1, 0
+	mov	x0, x28
 	bl	ftl_memset
-	ldr	w0, [x29, 152]
-	cmp	w19, w20
-	ccmp	w0, w19, 4, ne
-	bne	.L2876
-	cmp	w19, w20
-	bne	.L2877
-	ldr	x0, [x29, 160]
-	ldrh	w2, [x0, #:lo12:.LANCHOR55]
-	udiv	w0, w21, w2
-	msub	w0, w0, w2, w21
-	str	w0, [x29, 148]
-	sub	w2, w2, w0
-	cmp	w2, w23
-	csel	w0, w2, w23, ls
-	str	w0, [x29, 156]
-.L2878:
-	ldr	x0, [x29, 160]
-	ldr	w1, [x29, 156]
+	ldr	w3, [x29, 96]
+	cmp	w26, w20
+	cset	w0, eq
+	ldr	w4, [x29, 168]
+	orr	w0, w3, w0
+	mov	x3, x19
+	cbz	w0, .L2985
+	bne	.L2986
+	ldr	x0, [x29, 184]
+	ldrh	w19, [x0, #:lo12:.LANCHOR55]
+	udiv	w0, w22, w19
+	msub	w0, w0, w19, w22
+	str	w0, [x29, 168]
+	sub	w19, w19, w0
+	cmp	w19, w25
+	csel	w19, w19, w25, ls
+.L2987:
+	ldr	x0, [x29, 184]
 	ldrh	w0, [x0, #:lo12:.LANCHOR55]
-	cmp	w0, w1
-	ldr	x0, [x28, #:lo12:.LANCHOR182]
-	bne	.L2879
-	add	x3, x0, x26
-	cmp	w19, w20
-	bne	.L2880
-	str	x24, [x3, 8]
-.L2881:
-	ldr	x0, [x29, 120]
-	ldrb	w1, [x22, 6]
+	cmp	w0, w19
+	bne	.L2988
+	cmp	w26, w20
+	beq	.L3019
+	mul	w1, w20, w19
+	sub	w1, w1, w22
+	lsl	w1, w1, 9
+	add	x1, x23, x1
+.L2989:
+	ldr	w0, [x29, 176]
+	cbz	w0, .L2990
+	ldr	x2, [x3, #:lo12:.LANCHOR73]
+	mov	w3, 56
+	ldr	w0, [x21, #:lo12:.LANCHOR72]
+	umaddl	x0, w0, w3, x2
+	str	x1, [x0, 8]
+.L2991:
+	add	x0, x27, :lo12:.LANCHOR93
+	ldrb	w1, [x0, 6]
+	ldr	x0, [x29, 144]
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w1, w0
-	bcc	.L2890
-	mov	w2, 1780
-	adrp	x1, .LANCHOR250
+	bcc	.L2999
+	mov	w2, 1599
+	adrp	x1, .LANCHOR258
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR250
+	add	x1, x1, :lo12:.LANCHOR258
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -19795,150 +20468,189 @@ FtlWrite:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2890:
-	ldp	x1, x2, [x29, 128]
+.L2999:
+	ldp	x1, x2, [x29, 152]
 	mov	w0, -3947
 	strh	w0, [x1, x2]
-	adrp	x1, .LANCHOR160
-	ldr	w0, [x1, #:lo12:.LANCHOR160]
-	stp	w0, w19, [x27, 4]
-	add	w19, w19, 1
+	adrp	x1, .LANCHOR165
+	ldr	w0, [x1, #:lo12:.LANCHOR165]
+	stp	w0, w20, [x28, 4]
+	add	w20, w20, 1
 	add	w0, w0, 1
 	cmn	w0, #1
 	csel	w0, w0, wzr, ne
-	str	w0, [x1, #:lo12:.LANCHOR160]
+	str	w0, [x1, #:lo12:.LANCHOR165]
+	ldr	w0, [x29, 196]
+	str	w0, [x28, 12]
+	ldrh	w0, [x27, #:lo12:.LANCHOR93]
+	strh	w0, [x28, 2]
+	ldr	w0, [x21, #:lo12:.LANCHOR72]
+	add	w0, w0, 1
+	str	w0, [x21, #:lo12:.LANCHOR72]
 	ldr	w0, [x29, 180]
-	str	w0, [x27, 12]
-	ldrh	w0, [x22]
-	strh	w0, [x27, 2]
-	ldr	x0, [x29, 168]
-	add	x0, x0, 1
-	str	x0, [x29, 168]
-	b	.L2874
-.L2877:
-	ldr	x0, [x29, 160]
-	add	w2, w21, w23
-	str	wzr, [x29, 148]
+	add	w0, w0, 1
+	str	w0, [x29, 180]
+	b	.L2982
+.L2986:
+	ldr	x0, [x29, 184]
+	add	w19, w22, w25
+	str	wzr, [x29, 168]
 	ldrh	w0, [x0, #:lo12:.LANCHOR55]
-	msub	w2, w19, w0, w2
-	and	w0, w2, 65535
-	str	w0, [x29, 156]
-	b	.L2878
-.L2880:
-	ldr	w0, [x29, 156]
-.L2908:
-	mul	w0, w0, w19
-	sub	w0, w0, w21
-	lsl	w0, w0, 9
-	add	x0, x24, x0
-	str	x0, [x3, 8]
-	b	.L2881
-.L2879:
-	add	x0, x0, x26
-	cmp	w19, w20
-	bne	.L2882
-	adrp	x1, .LANCHOR186
-	ldr	x1, [x1, #:lo12:.LANCHOR186]
-.L2907:
-	str	x1, [x0, 8]
-	ldr	w0, [x29, 180]
+	msub	w19, w20, w0, w19
+	and	w19, w19, 65535
+	b	.L2987
+.L3019:
+	mov	x1, x23
+	b	.L2989
+.L2990:
+	ldr	x2, [x3, #:lo12:.LANCHOR73]
+	mov	w3, 56
+	ldr	w0, [x21, #:lo12:.LANCHOR72]
+	umaddl	x0, w0, w3, x2
+	ldr	x2, [x29, 136]
+	ldrh	w2, [x2]
+.L3039:
+	ldr	x0, [x0, 8]
+	b	.L3038
+.L2988:
+	ldr	w0, [x29, 196]
 	cmn	w0, #1
-	beq	.L2884
-	str	w0, [x29, 188]
+	beq	.L2992
+	ldr	x1, [x3, #:lo12:.LANCHOR73]
+	mov	w2, 56
+	str	w0, [x29, 204]
+	ldr	w0, [x21, #:lo12:.LANCHOR72]
+	str	x3, [x29, 96]
+	str	w20, [x29, 224]
+	nop // between mem op and mult-accumulate
+	umaddl	x0, w0, w2, x1
 	mov	w2, 0
-	ldr	x0, [x28, #:lo12:.LANCHOR182]
-	str	w19, [x29, 208]
-	add	x0, x0, x26
 	ldp	x1, x0, [x0, 8]
-	stp	x1, x0, [x29, 192]
+	stp	x1, x0, [x29, 208]
 	mov	w1, 1
-	add	x0, x29, 184
+	add	x0, x29, 200
 	bl	FlashReadPages
-	ldr	w0, [x29, 184]
+	ldr	w0, [x29, 200]
+	ldr	x3, [x29, 96]
 	cmn	w0, #1
-	bne	.L2885
-	adrp	x0, .LANCHOR138
-	add	x0, x0, :lo12:.LANCHOR138
+	bne	.L2993
+	adrp	x0, .LANCHOR141
+	add	x0, x0, :lo12:.LANCHOR141
 	ldr	w1, [x0, 72]
 	add	w1, w1, 1
 	str	w1, [x0, 72]
-.L2888:
-	ldr	w0, [x29, 156]
-	cmp	w19, w20
-	lsl	w2, w0, 9
-	bne	.L2889
-	ldr	x0, [x28, #:lo12:.LANCHOR182]
-	mov	x1, x24
-	add	x3, x0, x26
-	ldr	w0, [x29, 148]
-	ldr	x3, [x3, 8]
+.L2996:
+	cmp	w26, w20
+	lsl	w2, w19, 9
+	bne	.L2997
+	ldr	x0, [x3, #:lo12:.LANCHOR73]
+	mov	w3, 56
+	ldr	w1, [x21, #:lo12:.LANCHOR72]
+	umaddl	x1, w1, w3, x0
+	ldr	w0, [x29, 168]
 	lsl	w0, w0, 9
+	ldr	x3, [x1, 8]
+	mov	x1, x23
 	add	x0, x3, x0
-.L2909:
+.L3038:
 	bl	ftl_memcpy
-	b	.L2881
-.L2882:
-	adrp	x1, .LANCHOR187
-	ldr	x1, [x1, #:lo12:.LANCHOR187]
-	b	.L2907
-.L2885:
-	ldr	w1, [x27, 8]
-	cmp	w19, w1
-	beq	.L2887
-	adrp	x0, .LANCHOR138
-	add	x0, x0, :lo12:.LANCHOR138
+	b	.L2991
+.L2993:
+	ldr	w1, [x28, 8]
+	cmp	w20, w1
+	beq	.L2995
+	adrp	x0, .LANCHOR141
+	add	x0, x0, :lo12:.LANCHOR141
+	str	x3, [x29, 96]
 	ldr	w2, [x0, 72]
 	add	w2, w2, 1
 	str	w2, [x0, 72]
-	adrp	x0, .LC78
-	mov	w2, w19
-	add	x0, x0, :lo12:.LC78
+	mov	w2, w20
+	adrp	x0, .LC83
+	add	x0, x0, :lo12:.LC83
 	bl	printf
-.L2887:
-	ldr	w0, [x27, 8]
-	cmp	w19, w0
-	beq	.L2888
-	mov	w2, 1759
-	adrp	x1, .LANCHOR250
+	ldr	x3, [x29, 96]
+.L2995:
+	ldr	w0, [x28, 8]
+	cmp	w20, w0
+	beq	.L2996
+	mov	w2, 1581
+	adrp	x1, .LANCHOR258
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR250
+	add	x1, x1, :lo12:.LANCHOR258
 	add	x0, x0, :lo12:.LC5
+	str	x3, [x29, 96]
 	bl	printf
 	adrp	x1, .LC6
 	adrp	x0, .LC7
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-	b	.L2888
-.L2884:
-	ldr	x0, [x28, #:lo12:.LANCHOR182]
-	ldr	x1, [x29, 104]
-	add	x0, x0, x26
+.L3037:
+	ldr	x3, [x29, 96]
+	b	.L2996
+.L2992:
+	ldr	x1, [x3, #:lo12:.LANCHOR73]
+	mov	w2, 56
+	ldr	w0, [x21, #:lo12:.LANCHOR72]
+	str	x3, [x29, 96]
+	nop // between mem op and mult-accumulate
+	umaddl	x0, w0, w2, x1
+	ldr	x1, [x29, 136]
+	ldr	x0, [x0, 8]
 	ldrh	w2, [x1]
 	mov	w1, 0
-	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	b	.L2888
-.L2889:
-	ldr	x0, [x29, 160]
+	b	.L3037
+.L2997:
+	ldr	x0, [x29, 184]
+	mov	w4, 56
+	ldr	x3, [x3, #:lo12:.LANCHOR73]
 	ldrh	w1, [x0, #:lo12:.LANCHOR55]
-	ldr	x0, [x28, #:lo12:.LANCHOR182]
-	add	x3, x0, x26
-	mul	w1, w1, w19
-	sub	w1, w1, w21
-	ldr	x0, [x3, 8]
+	ldr	w0, [x21, #:lo12:.LANCHOR72]
+	mul	w1, w1, w20
+	umaddl	x0, w0, w4, x3
+	sub	w1, w1, w22
 	lsl	w1, w1, 9
-	add	x1, x24, x1
-	b	.L2909
-.L2876:
-	ldr	x0, [x28, #:lo12:.LANCHOR182]
-	add	x3, x0, x26
-	ldr	x0, [x29, 160]
+	add	x1, x23, x1
+	b	.L3039
+.L2985:
+	ldr	w0, [x29, 176]
+	cbz	w0, .L2998
+	ldr	w0, [x21, #:lo12:.LANCHOR72]
+	ldr	x1, [x19, #:lo12:.LANCHOR73]
+	umaddl	x4, w0, w4, x1
+	ldr	x0, [x29, 184]
 	ldrh	w0, [x0, #:lo12:.LANCHOR55]
-	b	.L2908
-.L2897:
+	mul	w0, w0, w20
+	sub	w0, w0, w22
+	lsl	w0, w0, 9
+	add	x0, x23, x0
+	str	x0, [x4, 8]
+	b	.L2991
+.L2998:
+	ldr	x0, [x29, 184]
+	ldr	x2, [x19, #:lo12:.LANCHOR73]
+	ldrh	w1, [x0, #:lo12:.LANCHOR55]
+	ldr	w0, [x21, #:lo12:.LANCHOR72]
+	mul	w1, w1, w20
+	umaddl	x4, w0, w4, x2
+	adrp	x0, .LANCHOR57
+	sub	w1, w1, w22
+	lsl	w1, w1, 9
+	ldrh	w2, [x0, #:lo12:.LANCHOR57]
+	add	x1, x23, x1
+	ldr	x0, [x4, 8]
+	b	.L3038
+.L3004:
+	bl	FtlCacheWriteBack
+	str	wzr, [x21, #:lo12:.LANCHOR72]
+	cmp	w24, 1
+	bhi	.L2978
+	b	.L3006
+.L3016:
 	mov	w0, -1
-	b	.L2864
+	b	.L2970
 	.size	FtlWrite, .-FtlWrite
 	.section	.text.ftl_vendor_write,"ax",@progbits
 	.align	2
@@ -19997,12 +20709,12 @@ ftl_write:
 	mov	x20, x3
 	mov	w22, w1
 	ands	w21, w0, 255
-	bne	.L2915
+	bne	.L3045
 	mov	w3, w2
 	mov	w0, 0
 	mov	x2, x20
 	bl	idb_write_data
-.L2915:
+.L3045:
 	mov	x3, x20
 	mov	w2, w19
 	mov	w1, w22
@@ -20022,31 +20734,31 @@ FtlDumpSysBlock:
 	add	x29, sp, 16
 	stp	x25, x26, [sp, 80]
 	and	w25, w0, 65535
-	adrp	x0, .LANCHOR183
+	adrp	x0, .LANCHOR189
 	stp	x21, x22, [sp, 48]
-	adrp	x21, .LANCHOR203
-	add	x1, x21, :lo12:.LANCHOR203
-	ldr	x2, [x0, #:lo12:.LANCHOR183]
+	adrp	x21, .LANCHOR211
+	add	x1, x21, :lo12:.LANCHOR211
+	ldr	x2, [x0, #:lo12:.LANCHOR189]
 	adrp	x22, .LANCHOR53
 	stp	x23, x24, [sp, 64]
 	lsl	w26, w25, 10
 	stp	x19, x20, [sp, 32]
-	adrp	x23, .LC79
+	adrp	x23, .LC84
 	str	x27, [sp, 96]
-	adrp	x24, .LC80
+	adrp	x24, .LC85
 	str	x2, [x1, 8]
-	adrp	x2, .LANCHOR188
+	adrp	x2, .LANCHOR195
 	add	x22, x22, :lo12:.LANCHOR53
-	add	x23, x23, :lo12:.LC79
-	ldr	x2, [x2, #:lo12:.LANCHOR188]
-	add	x24, x24, :lo12:.LC80
+	add	x23, x23, :lo12:.LC84
+	ldr	x2, [x2, #:lo12:.LANCHOR195]
+	add	x24, x24, :lo12:.LC85
 	mov	x27, x0
 	mov	w19, 0
 	str	x2, [x1, 16]
-.L2918:
+.L3048:
 	ldrh	w0, [x22]
 	cmp	w19, w0
-	blt	.L2920
+	blt	.L3050
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -20055,8 +20767,8 @@ FtlDumpSysBlock:
 	ldr	x27, [sp, 96]
 	add	sp, sp, 112
 	ret
-.L2920:
-	add	x20, x21, :lo12:.LANCHOR203
+.L3050:
+	add	x20, x21, :lo12:.LANCHOR211
 	orr	w0, w19, w26
 	mov	w2, 1
 	mov	w1, w2
@@ -20064,7 +20776,7 @@ FtlDumpSysBlock:
 	mov	x0, x20
 	bl	FlashReadPages
 	ldp	x1, x0, [x20, 8]
-	ldr	w2, [x21, #:lo12:.LANCHOR203]
+	ldr	w2, [x21, #:lo12:.LANCHOR211]
 	ldr	w3, [x20, 4]
 	ldr	w1, [x1]
 	str	w1, [sp]
@@ -20076,16 +20788,16 @@ FtlDumpSysBlock:
 	ldr	x0, [x20, 16]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L2919
-	ldr	x1, [x27, #:lo12:.LANCHOR183]
+	beq	.L3049
+	ldr	x1, [x27, #:lo12:.LANCHOR189]
 	mov	w3, 768
 	mov	w2, 4
 	mov	x0, x24
 	bl	rknand_print_hex
-.L2919:
+.L3049:
 	add	w19, w19, 1
 	sxth	w19, w19
-	b	.L2918
+	b	.L3048
 	.size	FtlDumpSysBlock, .-FtlDumpSysBlock
 	.section	.text.dump_map_info,"ax",@progbits
 	.align	2
@@ -20106,33 +20818,33 @@ dump_map_info:
 	add	x22, x22, :lo12:.LANCHOR41
 	stp	x25, x26, [sp, 80]
 	adrp	x24, .LANCHOR38
-.L2926:
+.L3056:
 	ldrh	w0, [x22]
 	cmp	w0, w20
-	bhi	.L2932
-	adrp	x25, .LANCHOR128
-	adrp	x19, .LANCHOR203
-	add	x25, x25, :lo12:.LANCHOR128
-	add	x19, x19, :lo12:.LANCHOR203
+	bhi	.L3062
+	adrp	x25, .LANCHOR131
+	adrp	x19, .LANCHOR211
+	add	x25, x25, :lo12:.LANCHOR131
+	add	x19, x19, :lo12:.LANCHOR211
 	mov	w26, 0
-.L2933:
+.L3063:
 	ldrh	w0, [x25]
 	cmp	w26, w0
-	bge	.L2936
+	bge	.L3066
 	adrp	x21, .LANCHOR53
-	adrp	x0, .LC49
+	adrp	x0, .LC51
 	sbfiz	x23, x26, 1, 32
 	mov	w20, 0
 	add	x21, x21, :lo12:.LANCHOR53
-	add	x24, x0, :lo12:.LC49
-	b	.L2937
-.L2928:
+	add	x24, x0, :lo12:.LC51
+	b	.L3067
+.L3058:
 	ldrb	w0, [x23, x5]
 	mov	w1, w20
 	bl	V2P_block
 	and	w4, w0, 65535
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L2927
+	cbnz	w0, .L3057
 	umaddl	x1, w19, w7, x6
 	lsl	w4, w4, 10
 	mul	w0, w19, w8
@@ -20142,28 +20854,28 @@ dump_map_info:
 	str	w4, [x1, 4]
 	add	x0, x10, x0, sxtw 2
 	stp	x11, x0, [x1, 8]
-.L2927:
+.L3057:
 	add	x5, x5, 1
-.L2934:
+.L3064:
 	cmp	w12, w5, uxth
-	bhi	.L2928
-	cbnz	w19, .L2929
-.L2931:
+	bhi	.L3058
+	cbnz	w19, .L3059
+.L3061:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2926
-.L2929:
+	b	.L3056
+.L3059:
 	mov	w1, w19
 	mov	w2, 1
 	mov	x0, x6
 	bl	FlashReadPages
 	mov	w0, 56
-	adrp	x26, .LC81
-	add	x26, x26, :lo12:.LC81
+	adrp	x26, .LC86
+	add	x26, x26, :lo12:.LC86
 	mov	x25, 0
 	umull	x19, w19, w0
-.L2930:
-	ldr	x0, [x21, #:lo12:.LANCHOR180]
+.L3060:
+	ldr	x0, [x21, #:lo12:.LANCHOR186]
 	add	x0, x0, x25
 	add	x25, x25, 56
 	ldr	x1, [x0, 16]
@@ -20178,27 +20890,27 @@ dump_map_info:
 	ubfx	x1, x2, 10, 16
 	bl	printf
 	cmp	x25, x19
-	bne	.L2930
-	b	.L2931
-.L2932:
-	adrp	x0, .LANCHOR104
-	adrp	x21, .LANCHOR180
+	bne	.L3060
+	b	.L3061
+.L3062:
+	adrp	x0, .LANCHOR107
+	adrp	x21, .LANCHOR186
 	ldrh	w12, [x24, #:lo12:.LANCHOR38]
 	mov	x5, 0
-	ldr	x11, [x0, #:lo12:.LANCHOR104]
-	adrp	x0, .LANCHOR105
-	ldr	x6, [x21, #:lo12:.LANCHOR180]
+	ldr	x11, [x0, #:lo12:.LANCHOR107]
+	adrp	x0, .LANCHOR108
+	ldr	x6, [x21, #:lo12:.LANCHOR186]
 	mov	w19, 0
-	ldr	x10, [x0, #:lo12:.LANCHOR105]
+	ldr	x10, [x0, #:lo12:.LANCHOR108]
 	adrp	x0, .LANCHOR58
 	mov	w7, 56
 	ldrh	w8, [x0, #:lo12:.LANCHOR58]
-	b	.L2934
-.L2935:
-	adrp	x22, .LANCHOR129
+	b	.L3064
+.L3065:
+	adrp	x22, .LANCHOR132
 	mov	w2, 1
 	mov	w1, w2
-	ldr	x0, [x22, #:lo12:.LANCHOR129]
+	ldr	x0, [x22, #:lo12:.LANCHOR132]
 	ldrh	w0, [x0, x23]
 	orr	w0, w20, w0, lsl 10
 	str	w0, [x19, 4]
@@ -20206,7 +20918,7 @@ dump_map_info:
 	bl	FlashReadPages
 	ldp	x2, x0, [x19, 8]
 	add	w20, w20, 1
-	ldr	x1, [x22, #:lo12:.LANCHOR129]
+	ldr	x1, [x22, #:lo12:.LANCHOR132]
 	sxth	w20, w20
 	ldr	w3, [x2, 4]
 	ldrh	w1, [x1, x23]
@@ -20218,38 +20930,38 @@ dump_map_info:
 	mov	x0, x24
 	ldp	w2, w3, [x19]
 	bl	printf
-.L2937:
+.L3067:
 	ldrh	w0, [x21]
 	cmp	w20, w0
-	blt	.L2935
+	blt	.L3065
 	add	w0, w26, 1
 	sxth	w26, w0
-	b	.L2933
-.L2936:
+	b	.L3063
+.L3066:
 	adrp	x0, .LANCHOR64
 	mov	w2, 2
 	adrp	x19, .LANCHOR66
 	ldr	w3, [x0, #:lo12:.LANCHOR64]
-	adrp	x0, .LANCHOR129
-	ldr	x1, [x0, #:lo12:.LANCHOR129]
-	adrp	x0, .LC82
-	add	x0, x0, :lo12:.LC82
+	adrp	x0, .LANCHOR132
+	ldr	x1, [x0, #:lo12:.LANCHOR132]
+	adrp	x0, .LC87
+	add	x0, x0, :lo12:.LC87
 	bl	rknand_print_hex
-	adrp	x0, .LANCHOR131
+	adrp	x0, .LANCHOR134
 	ldrh	w3, [x19, #:lo12:.LANCHOR66]
 	mov	w2, 4
-	ldr	x1, [x0, #:lo12:.LANCHOR131]
-	adrp	x0, .LC83
-	add	x0, x0, :lo12:.LC83
+	ldr	x1, [x0, #:lo12:.LANCHOR134]
+	adrp	x0, .LC88
+	add	x0, x0, :lo12:.LC88
 	bl	rknand_print_hex
-	adrp	x0, .LANCHOR195
+	adrp	x0, .LANCHOR203
 	ldrh	w3, [x19, #:lo12:.LANCHOR66]
 	ldp	x21, x22, [sp, 48]
 	mov	w2, 4
-	ldr	x1, [x0, #:lo12:.LANCHOR195]
-	adrp	x0, .LC84
+	ldr	x1, [x0, #:lo12:.LANCHOR203]
+	adrp	x0, .LC89
 	ldp	x19, x20, [sp, 32]
-	add	x0, x0, :lo12:.LC84
+	add	x0, x0, :lo12:.LC89
 	ldp	x23, x24, [sp, 64]
 	ldp	x25, x26, [sp, 80]
 	ldp	x29, x30, [sp, 16]
@@ -20263,6 +20975,7 @@ dump_map_info:
 	.global	check_valid_page_count_table
 	.global	FtlUpdateVaildLpnCount
 	.global	g_ect_tbl_power_up_flush
+	.global	last_cache_match_count
 	.global	power_up_flag
 	.global	g_LowFormat
 	.global	gFtlInitStatus
@@ -20352,7 +21065,6 @@ dump_map_info:
 	.global	p_map_block_valid_page_count
 	.global	p_map_block_table
 	.global	p_blk_mode_table
-	.global	p_valid_page_count_check_table
 	.global	p_valid_page_count_table
 	.global	g_totle_swl_count
 	.global	p_swl_mul_table
@@ -20371,6 +21083,11 @@ dump_map_info:
 	.global	p_vendor_data_buf
 	.global	p_sys_data_buf_1
 	.global	p_sys_data_buf
+	.global	g_wr_page_num
+	.global	req_wr_io
+	.global	c_wr_page_buf_num
+	.global	p_wr_io_data_buf
+	.global	p_wr_io_spare_buf
 	.global	p_plane_order_table
 	.global	g_req_cache
 	.global	req_gc_dst
@@ -20468,6 +21185,7 @@ dump_map_info:
 	.global	gNandMaxChip
 	.global	gNandMaxDie
 	.global	gFlashInterfaceMode
+	.global	gFlashCurMode
 	.global	gFlashSlcMode
 	.global	gFlashOnfiModeEn
 	.global	gFlashToggleModeEn
@@ -20491,21 +21209,21 @@ DeviceCapacity:
 	.zero	4
 	.section	.bss.DieAddrs,"aw",@nobits
 	.align	2
-	.set	.LANCHOR17,. + 0
+	.set	.LANCHOR18,. + 0
 	.type	DieAddrs, %object
 	.size	DieAddrs, 32
 DieAddrs:
 	.zero	32
 	.section	.bss.DieCsIndex,"aw",@nobits
 	.align	2
-	.set	.LANCHOR26,. + 0
+	.set	.LANCHOR27,. + 0
 	.type	DieCsIndex, %object
 	.size	DieCsIndex, 8
 DieCsIndex:
 	.zero	8
 	.section	.bss.FlashDdrTunningReadCount,"aw",@nobits
 	.align	2
-	.set	.LANCHOR144,. + 0
+	.set	.LANCHOR147,. + 0
 	.type	FlashDdrTunningReadCount, %object
 	.size	FlashDdrTunningReadCount, 4
 FlashDdrTunningReadCount:
@@ -20524,7 +21242,7 @@ FtlMallocBuffer:
 	.zero	1310720
 	.section	.bss.FtlUpdateVaildLpnCount,"aw",@nobits
 	.align	1
-	.set	.LANCHOR99,. + 0
+	.set	.LANCHOR101,. + 0
 	.type	FtlUpdateVaildLpnCount, %object
 	.size	FtlUpdateVaildLpnCount, 2
 FtlUpdateVaildLpnCount:
@@ -20538,7 +21256,7 @@ IDByte:
 	.zero	32
 	.section	.bss.c_ftl_nand_bbm_buf_size,"aw",@nobits
 	.align	1
-	.set	.LANCHOR123,. + 0
+	.set	.LANCHOR126,. + 0
 	.type	c_ftl_nand_bbm_buf_size, %object
 	.size	c_ftl_nand_bbm_buf_size, 2
 c_ftl_nand_bbm_buf_size:
@@ -20580,7 +21298,7 @@ c_ftl_nand_data_blks_per_plane:
 	.zero	2
 	.section	.bss.c_ftl_nand_data_op_blks_per_plane,"aw",@nobits
 	.align	1
-	.set	.LANCHOR224,. + 0
+	.set	.LANCHOR232,. + 0
 	.type	c_ftl_nand_data_op_blks_per_plane, %object
 	.size	c_ftl_nand_data_op_blks_per_plane, 2
 c_ftl_nand_data_op_blks_per_plane:
@@ -20748,7 +21466,7 @@ c_ftl_vendor_part_size:
 	.zero	2
 	.section	.bss.c_gc_page_buf_num,"aw",@nobits
 	.align	2
-	.set	.LANCHOR107,. + 0
+	.set	.LANCHOR110,. + 0
 	.type	c_gc_page_buf_num, %object
 	.size	c_gc_page_buf_num, 4
 c_gc_page_buf_num:
@@ -20760,6 +21478,13 @@ c_gc_page_buf_num:
 	.size	c_mlc_erase_count_value, 2
 c_mlc_erase_count_value:
 	.zero	2
+	.section	.bss.c_wr_page_buf_num,"aw",@nobits
+	.align	2
+	.set	.LANCHOR185,. + 0
+	.type	c_wr_page_buf_num, %object
+	.size	c_wr_page_buf_num, 4
+c_wr_page_buf_num:
+	.zero	4
 	.section	.bss.check_valid_page_count_table,"aw",@nobits
 	.align	3
 	.type	check_valid_page_count_table, %object
@@ -20768,14 +21493,14 @@ check_valid_page_count_table:
 	.zero	8192
 	.section	.bss.ftl_gc_temp_power_lost_recovery_flag,"aw",@nobits
 	.align	2
-	.set	.LANCHOR135,. + 0
+	.set	.LANCHOR138,. + 0
 	.type	ftl_gc_temp_power_lost_recovery_flag, %object
 	.size	ftl_gc_temp_power_lost_recovery_flag, 4
 ftl_gc_temp_power_lost_recovery_flag:
 	.zero	4
 	.section	.bss.gBbtInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR74,. + 0
+	.set	.LANCHOR76,. + 0
 	.type	gBbtInfo, %object
 	.size	gBbtInfo, 96
 gBbtInfo:
@@ -20789,7 +21514,7 @@ gBlockPageAlignSize:
 	.zero	4
 	.section	.bss.gBootDdrMode,"aw",@nobits
 	.align	2
-	.set	.LANCHOR155,. + 0
+	.set	.LANCHOR160,. + 0
 	.type	gBootDdrMode, %object
 	.size	gBootDdrMode, 4
 gBootDdrMode:
@@ -20801,8 +21526,14 @@ gBootDdrMode:
 	.size	gDieOp, 192
 gDieOp:
 	.zero	192
-	.section	.bss.gFlashInterfaceMode,"aw",@nobits
+	.section	.bss.gFlashCurMode,"aw",@nobits
 	.set	.LANCHOR24,. + 0
+	.type	gFlashCurMode, %object
+	.size	gFlashCurMode, 1
+gFlashCurMode:
+	.zero	1
+	.section	.bss.gFlashInterfaceMode,"aw",@nobits
+	.set	.LANCHOR25,. + 0
 	.type	gFlashInterfaceMode, %object
 	.size	gFlashInterfaceMode, 1
 gFlashInterfaceMode:
@@ -20814,28 +21545,28 @@ gFlashOnfiModeEn:
 	.zero	1
 	.section	.bss.gFlashPageBuffer0,"aw",@nobits
 	.align	3
-	.set	.LANCHOR147,. + 0
+	.set	.LANCHOR154,. + 0
 	.type	gFlashPageBuffer0, %object
 	.size	gFlashPageBuffer0, 8
 gFlashPageBuffer0:
 	.zero	8
 	.section	.bss.gFlashPageBuffer1,"aw",@nobits
 	.align	3
-	.set	.LANCHOR153,. + 0
+	.set	.LANCHOR152,. + 0
 	.type	gFlashPageBuffer1, %object
 	.size	gFlashPageBuffer1, 8
 gFlashPageBuffer1:
 	.zero	8
 	.section	.bss.gFlashProgCheckBuffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR198,. + 0
+	.set	.LANCHOR206,. + 0
 	.type	gFlashProgCheckBuffer, %object
 	.size	gFlashProgCheckBuffer, 8
 gFlashProgCheckBuffer:
 	.zero	8
 	.section	.bss.gFlashProgCheckSpareBuffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR199,. + 0
+	.set	.LANCHOR207,. + 0
 	.type	gFlashProgCheckSpareBuffer, %object
 	.size	gFlashProgCheckSpareBuffer, 8
 gFlashProgCheckSpareBuffer:
@@ -20846,14 +21577,14 @@ gFlashProgCheckSpareBuffer:
 gFlashSdrModeEn:
 	.zero	1
 	.section	.bss.gFlashSlcMode,"aw",@nobits
-	.set	.LANCHOR15,. + 0
+	.set	.LANCHOR16,. + 0
 	.type	gFlashSlcMode, %object
 	.size	gFlashSlcMode, 1
 gFlashSlcMode:
 	.zero	1
 	.section	.bss.gFlashSpareBuffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR197,. + 0
+	.set	.LANCHOR205,. + 0
 	.type	gFlashSpareBuffer, %object
 	.size	gFlashSpareBuffer, 8
 gFlashSpareBuffer:
@@ -20866,7 +21597,7 @@ gFlashToggleModeEn:
 	.zero	1
 	.section	.bss.gL2pMapInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR127,. + 0
+	.set	.LANCHOR130,. + 0
 	.type	gL2pMapInfo, %object
 	.size	gL2pMapInfo, 64
 gL2pMapInfo:
@@ -20880,19 +21611,19 @@ gMasterInfo:
 	.zero	48
 	.section	.bss.gMasterTempBuf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR156,. + 0
+	.set	.LANCHOR161,. + 0
 	.type	gMasterTempBuf, %object
 	.size	gMasterTempBuf, 8
 gMasterTempBuf:
 	.zero	8
 	.section	.bss.gMultiPageProgEn,"aw",@nobits
-	.set	.LANCHOR27,. + 0
+	.set	.LANCHOR28,. + 0
 	.type	gMultiPageProgEn, %object
 	.size	gMultiPageProgEn, 1
 gMultiPageProgEn:
 	.zero	1
 	.section	.bss.gMultiPageReadEn,"aw",@nobits
-	.set	.LANCHOR202,. + 0
+	.set	.LANCHOR210,. + 0
 	.type	gMultiPageReadEn, %object
 	.size	gMultiPageReadEn, 1
 gMultiPageReadEn:
@@ -20911,21 +21642,21 @@ gNandChipMap:
 gNandFlashEccBits:
 	.zero	1
 	.section	.bss.gNandFlashIDBEccBits,"aw",@nobits
-	.set	.LANCHOR152,. + 0
+	.set	.LANCHOR158,. + 0
 	.type	gNandFlashIDBEccBits, %object
 	.size	gNandFlashIDBEccBits, 1
 gNandFlashIDBEccBits:
 	.zero	1
 	.section	.bss.gNandFlashIdbBlockAddr,"aw",@nobits
 	.align	2
-	.set	.LANCHOR149,. + 0
+	.set	.LANCHOR156,. + 0
 	.type	gNandFlashIdbBlockAddr, %object
 	.size	gNandFlashIdbBlockAddr, 4
 gNandFlashIdbBlockAddr:
 	.zero	4
 	.section	.bss.gNandFlashInfoBlockAddr,"aw",@nobits
 	.align	2
-	.set	.LANCHOR148,. + 0
+	.set	.LANCHOR155,. + 0
 	.type	gNandFlashInfoBlockAddr, %object
 	.size	gNandFlashInfoBlockAddr, 4
 gNandFlashInfoBlockAddr:
@@ -20948,40 +21679,40 @@ gNandFlashResEndPageAddr:
 gNandIDBResBlkNum:
 	.zero	1
 	.section	.bss.gNandIDBResBlkNumSaveInFlash,"aw",@nobits
-	.set	.LANCHOR150,. + 0
+	.set	.LANCHOR157,. + 0
 	.type	gNandIDBResBlkNumSaveInFlash, %object
 	.size	gNandIDBResBlkNumSaveInFlash, 1
 gNandIDBResBlkNumSaveInFlash:
 	.zero	1
 	.section	.bss.gNandIDataBuf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR141,. + 0
+	.set	.LANCHOR144,. + 0
 	.type	gNandIDataBuf, %object
 	.size	gNandIDataBuf, 2048
 gNandIDataBuf:
 	.zero	2048
 	.section	.bss.gNandMaxChip,"aw",@nobits
-	.set	.LANCHOR121,. + 0
+	.set	.LANCHOR124,. + 0
 	.type	gNandMaxChip, %object
 	.size	gNandMaxChip, 1
 gNandMaxChip:
 	.zero	1
 	.section	.bss.gNandMaxDie,"aw",@nobits
-	.set	.LANCHOR25,. + 0
+	.set	.LANCHOR26,. + 0
 	.type	gNandMaxDie, %object
 	.size	gNandMaxDie, 1
 gNandMaxDie:
 	.zero	1
 	.section	.bss.gNandOptPara,"aw",@nobits
 	.align	3
-	.set	.LANCHOR7,. + 0
+	.set	.LANCHOR8,. + 0
 	.type	gNandOptPara, %object
 	.size	gNandOptPara, 32
 gNandOptPara:
 	.zero	32
 	.section	.bss.gNandPhyInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR14,. + 0
+	.set	.LANCHOR15,. + 0
 	.type	gNandPhyInfo, %object
 	.size	gNandPhyInfo, 28
 gNandPhyInfo:
@@ -21022,14 +21753,14 @@ gReadRetryInfo:
 	.zero	852
 	.section	.bss.gSysFreeQueue,"aw",@nobits
 	.align	3
-	.set	.LANCHOR75,. + 0
+	.set	.LANCHOR77,. + 0
 	.type	gSysFreeQueue, %object
 	.size	gSysFreeQueue, 2056
 gSysFreeQueue:
 	.zero	2056
 	.section	.bss.gSysInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR210,. + 0
+	.set	.LANCHOR218,. + 0
 	.type	gSysInfo, %object
 	.size	gSysInfo, 16
 gSysInfo:
@@ -21042,35 +21773,35 @@ gToggleModeClkDiv:
 	.zero	4
 	.section	.bss.gTotleBlock,"aw",@nobits
 	.align	1
-	.set	.LANCHOR122,. + 0
+	.set	.LANCHOR125,. + 0
 	.type	gTotleBlock, %object
 	.size	gTotleBlock, 2
 gTotleBlock:
 	.zero	2
 	.section	.bss.gVendorBlkInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR216,. + 0
+	.set	.LANCHOR224,. + 0
 	.type	gVendorBlkInfo, %object
 	.size	gVendorBlkInfo, 64
 gVendorBlkInfo:
 	.zero	64
 	.section	.bss.g_GlobalDataVersion,"aw",@nobits
 	.align	2
-	.set	.LANCHOR160,. + 0
+	.set	.LANCHOR165,. + 0
 	.type	g_GlobalDataVersion, %object
 	.size	g_GlobalDataVersion, 4
 g_GlobalDataVersion:
 	.zero	4
 	.section	.bss.g_GlobalSysVersion,"aw",@nobits
 	.align	2
-	.set	.LANCHOR159,. + 0
+	.set	.LANCHOR164,. + 0
 	.type	g_GlobalSysVersion, %object
 	.size	g_GlobalSysVersion, 4
 g_GlobalSysVersion:
 	.zero	4
 	.section	.bss.g_LowFormat,"aw",@nobits
 	.align	2
-	.set	.LANCHOR247,. + 0
+	.set	.LANCHOR254,. + 0
 	.type	g_LowFormat, %object
 	.size	g_LowFormat, 4
 g_LowFormat:
@@ -21084,217 +21815,217 @@ g_MaxLbaSector:
 	.zero	4
 	.section	.bss.g_MaxLbn,"aw",@nobits
 	.align	2
-	.set	.LANCHOR223,. + 0
+	.set	.LANCHOR231,. + 0
 	.type	g_MaxLbn, %object
 	.size	g_MaxLbn, 4
 g_MaxLbn:
 	.zero	4
 	.section	.bss.g_MaxLpn,"aw",@nobits
 	.align	2
-	.set	.LANCHOR72,. + 0
+	.set	.LANCHOR74,. + 0
 	.type	g_MaxLpn, %object
 	.size	g_MaxLpn, 4
 g_MaxLpn:
 	.zero	4
 	.section	.bss.g_SlcPartLbaEndSector,"aw",@nobits
 	.align	2
-	.set	.LANCHOR157,. + 0
+	.set	.LANCHOR162,. + 0
 	.type	g_SlcPartLbaEndSector, %object
 	.size	g_SlcPartLbaEndSector, 4
 g_SlcPartLbaEndSector:
 	.zero	4
 	.section	.bss.g_VaildLpn,"aw",@nobits
 	.align	2
-	.set	.LANCHOR100,. + 0
+	.set	.LANCHOR102,. + 0
 	.type	g_VaildLpn, %object
 	.size	g_VaildLpn, 4
 g_VaildLpn:
 	.zero	4
 	.section	.bss.g_active_superblock,"aw",@nobits
 	.align	3
-	.set	.LANCHOR91,. + 0
+	.set	.LANCHOR93,. + 0
 	.type	g_active_superblock, %object
 	.size	g_active_superblock, 48
 g_active_superblock:
 	.zero	48
 	.section	.bss.g_all_blk_used_slc_mode,"aw",@nobits
 	.align	2
-	.set	.LANCHOR158,. + 0
+	.set	.LANCHOR163,. + 0
 	.type	g_all_blk_used_slc_mode, %object
 	.size	g_all_blk_used_slc_mode, 4
 g_all_blk_used_slc_mode:
 	.zero	4
 	.section	.bss.g_buffer_superblock,"aw",@nobits
 	.align	3
-	.set	.LANCHOR92,. + 0
+	.set	.LANCHOR94,. + 0
 	.type	g_buffer_superblock, %object
 	.size	g_buffer_superblock, 48
 g_buffer_superblock:
 	.zero	48
 	.section	.bss.g_cur_erase_blk,"aw",@nobits
 	.align	2
-	.set	.LANCHOR73,. + 0
+	.set	.LANCHOR75,. + 0
 	.type	g_cur_erase_blk, %object
 	.size	g_cur_erase_blk, 4
 g_cur_erase_blk:
 	.zero	4
 	.section	.bss.g_ect_tbl_info_size,"aw",@nobits
 	.align	1
-	.set	.LANCHOR190,. + 0
+	.set	.LANCHOR198,. + 0
 	.type	g_ect_tbl_info_size, %object
 	.size	g_ect_tbl_info_size, 2
 g_ect_tbl_info_size:
 	.zero	2
 	.section	.bss.g_ect_tbl_power_up_flush,"aw",@nobits
 	.align	1
-	.set	.LANCHOR219,. + 0
+	.set	.LANCHOR227,. + 0
 	.type	g_ect_tbl_power_up_flush, %object
 	.size	g_ect_tbl_power_up_flush, 2
 g_ect_tbl_power_up_flush:
 	.zero	2
 	.section	.bss.g_flash_read_only_en,"aw",@nobits
 	.align	2
-	.set	.LANCHOR76,. + 0
+	.set	.LANCHOR78,. + 0
 	.type	g_flash_read_only_en, %object
 	.size	g_flash_read_only_en, 4
 g_flash_read_only_en:
 	.zero	4
 	.section	.bss.g_free_slc_blk_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR139,. + 0
+	.set	.LANCHOR142,. + 0
 	.type	g_free_slc_blk_num, %object
 	.size	g_free_slc_blk_num, 2
 g_free_slc_blk_num:
 	.zero	2
 	.section	.bss.g_ftl_nand_free_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR249,. + 0
+	.set	.LANCHOR256,. + 0
 	.type	g_ftl_nand_free_count, %object
 	.size	g_ftl_nand_free_count, 4
 g_ftl_nand_free_count:
 	.zero	4
 	.section	.bss.g_gc_bad_block_gc_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR118,. + 0
+	.set	.LANCHOR121,. + 0
 	.type	g_gc_bad_block_gc_index, %object
 	.size	g_gc_bad_block_gc_index, 2
 g_gc_bad_block_gc_index:
 	.zero	2
 	.section	.bss.g_gc_bad_block_temp_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR116,. + 0
+	.set	.LANCHOR119,. + 0
 	.type	g_gc_bad_block_temp_num, %object
 	.size	g_gc_bad_block_temp_num, 2
 g_gc_bad_block_temp_num:
 	.zero	2
 	.section	.bss.g_gc_bad_block_temp_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR117,. + 0
+	.set	.LANCHOR120,. + 0
 	.type	g_gc_bad_block_temp_tbl, %object
 	.size	g_gc_bad_block_temp_tbl, 34
 g_gc_bad_block_temp_tbl:
 	.zero	34
 	.section	.bss.g_gc_blk_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR178,. + 0
+	.set	.LANCHOR183,. + 0
 	.type	g_gc_blk_index, %object
 	.size	g_gc_blk_index, 2
 g_gc_blk_index:
 	.zero	2
 	.section	.bss.g_gc_blk_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR108,. + 0
+	.set	.LANCHOR111,. + 0
 	.type	g_gc_blk_num, %object
 	.size	g_gc_blk_num, 2
 g_gc_blk_num:
 	.zero	2
 	.section	.bss.g_gc_cur_blk_max_valid_pages,"aw",@nobits
 	.align	1
-	.set	.LANCHOR245,. + 0
+	.set	.LANCHOR250,. + 0
 	.type	g_gc_cur_blk_max_valid_pages, %object
 	.size	g_gc_cur_blk_max_valid_pages, 2
 g_gc_cur_blk_max_valid_pages:
 	.zero	2
 	.section	.bss.g_gc_cur_blk_valid_pages,"aw",@nobits
 	.align	1
-	.set	.LANCHOR244,. + 0
+	.set	.LANCHOR249,. + 0
 	.type	g_gc_cur_blk_valid_pages, %object
 	.size	g_gc_cur_blk_valid_pages, 2
 g_gc_cur_blk_valid_pages:
 	.zero	2
 	.section	.bss.g_gc_free_blk_threshold,"aw",@nobits
 	.align	1
-	.set	.LANCHOR176,. + 0
+	.set	.LANCHOR181,. + 0
 	.type	g_gc_free_blk_threshold, %object
 	.size	g_gc_free_blk_threshold, 2
 g_gc_free_blk_threshold:
 	.zero	2
 	.section	.bss.g_gc_head_data_block,"aw",@nobits
 	.align	2
-	.set	.LANCHOR173,. + 0
+	.set	.LANCHOR178,. + 0
 	.type	g_gc_head_data_block, %object
 	.size	g_gc_head_data_block, 4
 g_gc_head_data_block:
 	.zero	4
 	.section	.bss.g_gc_head_data_block_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR174,. + 0
+	.set	.LANCHOR179,. + 0
 	.type	g_gc_head_data_block_count, %object
 	.size	g_gc_head_data_block_count, 4
 g_gc_head_data_block_count:
 	.zero	4
 	.section	.bss.g_gc_merge_free_blk_threshold,"aw",@nobits
 	.align	1
-	.set	.LANCHOR177,. + 0
+	.set	.LANCHOR182,. + 0
 	.type	g_gc_merge_free_blk_threshold, %object
 	.size	g_gc_merge_free_blk_threshold, 2
 g_gc_merge_free_blk_threshold:
 	.zero	2
 	.section	.bss.g_gc_next_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR112,. + 0
+	.set	.LANCHOR115,. + 0
 	.type	g_gc_next_blk, %object
 	.size	g_gc_next_blk, 2
 g_gc_next_blk:
 	.zero	2
 	.section	.bss.g_gc_next_blk_1,"aw",@nobits
 	.align	1
-	.set	.LANCHOR113,. + 0
+	.set	.LANCHOR116,. + 0
 	.type	g_gc_next_blk_1, %object
 	.size	g_gc_next_blk_1, 2
 g_gc_next_blk_1:
 	.zero	2
 	.section	.bss.g_gc_next_blk_2,"aw",@nobits
 	.align	1
-	.set	.LANCHOR114,. + 0
+	.set	.LANCHOR117,. + 0
 	.type	g_gc_next_blk_2, %object
 	.size	g_gc_next_blk_2, 2
 g_gc_next_blk_2:
 	.zero	2
 	.section	.bss.g_gc_next_blk_3,"aw",@nobits
 	.align	1
-	.set	.LANCHOR115,. + 0
+	.set	.LANCHOR118,. + 0
 	.type	g_gc_next_blk_3, %object
 	.size	g_gc_next_blk_3, 2
 g_gc_next_blk_3:
 	.zero	2
 	.section	.bss.g_gc_num_req,"aw",@nobits
 	.align	2
-	.set	.LANCHOR102,. + 0
+	.set	.LANCHOR105,. + 0
 	.type	g_gc_num_req, %object
 	.size	g_gc_num_req, 4
 g_gc_num_req:
 	.zero	4
 	.section	.bss.g_gc_page_offset,"aw",@nobits
 	.align	1
-	.set	.LANCHOR110,. + 0
+	.set	.LANCHOR113,. + 0
 	.type	g_gc_page_offset, %object
 	.size	g_gc_page_offset, 2
 g_gc_page_offset:
 	.zero	2
 	.section	.bss.g_gc_refresh_block_temp_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR179,. + 0
+	.set	.LANCHOR184,. + 0
 	.type	g_gc_refresh_block_temp_num, %object
 	.size	g_gc_refresh_block_temp_num, 2
 g_gc_refresh_block_temp_num:
@@ -21307,102 +22038,102 @@ g_gc_refresh_block_temp_tbl:
 	.zero	34
 	.section	.bss.g_gc_skip_write_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR175,. + 0
+	.set	.LANCHOR180,. + 0
 	.type	g_gc_skip_write_count, %object
 	.size	g_gc_skip_write_count, 4
 g_gc_skip_write_count:
 	.zero	4
 	.section	.bss.g_gc_superblock,"aw",@nobits
 	.align	3
-	.set	.LANCHOR205,. + 0
+	.set	.LANCHOR213,. + 0
 	.type	g_gc_superblock, %object
 	.size	g_gc_superblock, 48
 g_gc_superblock:
 	.zero	48
 	.section	.bss.g_gc_temp_superblock,"aw",@nobits
 	.align	3
-	.set	.LANCHOR93,. + 0
+	.set	.LANCHOR95,. + 0
 	.type	g_gc_temp_superblock, %object
 	.size	g_gc_temp_superblock, 48
 g_gc_temp_superblock:
 	.zero	48
 	.section	.bss.g_in_gc_progress,"aw",@nobits
 	.align	2
-	.set	.LANCHOR171,. + 0
+	.set	.LANCHOR176,. + 0
 	.type	g_in_gc_progress, %object
 	.size	g_in_gc_progress, 4
 g_in_gc_progress:
 	.zero	4
 	.section	.bss.g_in_swl_replace,"aw",@nobits
 	.align	2
-	.set	.LANCHOR172,. + 0
+	.set	.LANCHOR177,. + 0
 	.type	g_in_swl_replace, %object
 	.size	g_in_swl_replace, 4
 g_in_swl_replace:
 	.zero	4
 	.section	.bss.g_inkDie_check_enable,"aw",@nobits
 	.align	2
-	.set	.LANCHOR28,. + 0
+	.set	.LANCHOR104,. + 0
 	.type	g_inkDie_check_enable, %object
 	.size	g_inkDie_check_enable, 4
 g_inkDie_check_enable:
 	.zero	4
 	.section	.bss.g_l2p_last_update_region_id,"aw",@nobits
 	.align	1
-	.set	.LANCHOR97,. + 0
+	.set	.LANCHOR99,. + 0
 	.type	g_l2p_last_update_region_id, %object
 	.size	g_l2p_last_update_region_id, 2
 g_l2p_last_update_region_id:
 	.zero	2
 	.section	.bss.g_maxRegNum,"aw",@nobits
-	.set	.LANCHOR12,. + 0
+	.set	.LANCHOR13,. + 0
 	.type	g_maxRegNum, %object
 	.size	g_maxRegNum, 1
 g_maxRegNum:
 	.zero	1
 	.section	.bss.g_maxRetryCount,"aw",@nobits
-	.set	.LANCHOR151,. + 0
+	.set	.LANCHOR149,. + 0
 	.type	g_maxRetryCount, %object
 	.size	g_maxRetryCount, 1
 g_maxRetryCount:
 	.zero	1
 	.section	.bss.g_max_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR169,. + 0
+	.set	.LANCHOR174,. + 0
 	.type	g_max_erase_count, %object
 	.size	g_max_erase_count, 4
 g_max_erase_count:
 	.zero	4
 	.section	.bss.g_min_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR170,. + 0
+	.set	.LANCHOR175,. + 0
 	.type	g_min_erase_count, %object
 	.size	g_min_erase_count, 4
 g_min_erase_count:
 	.zero	4
 	.section	.bss.g_nand_ecc_en,"aw",@nobits
-	.set	.LANCHOR200,. + 0
+	.set	.LANCHOR208,. + 0
 	.type	g_nand_ecc_en, %object
 	.size	g_nand_ecc_en, 1
 g_nand_ecc_en:
 	.zero	1
 	.section	.bss.g_nandc_version_data,"aw",@nobits
 	.align	2
-	.set	.LANCHOR119,. + 0
+	.set	.LANCHOR122,. + 0
 	.type	g_nandc_version_data, %object
 	.size	g_nandc_version_data, 4
 g_nandc_version_data:
 	.zero	4
 	.section	.bss.g_num_data_superblocks,"aw",@nobits
 	.align	1
-	.set	.LANCHOR85,. + 0
+	.set	.LANCHOR87,. + 0
 	.type	g_num_data_superblocks, %object
 	.size	g_num_data_superblocks, 2
 g_num_data_superblocks:
 	.zero	2
 	.section	.bss.g_num_free_superblocks,"aw",@nobits
 	.align	1
-	.set	.LANCHOR88,. + 0
+	.set	.LANCHOR90,. + 0
 	.type	g_num_free_superblocks, %object
 	.size	g_num_free_superblocks, 2
 g_num_free_superblocks:
@@ -21416,48 +22147,48 @@ g_page_map_check_enable:
 	.zero	2
 	.section	.bss.g_power_lost_ecc_error_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR237,. + 0
+	.set	.LANCHOR241,. + 0
 	.type	g_power_lost_ecc_error_blk, %object
 	.size	g_power_lost_ecc_error_blk, 2
 g_power_lost_ecc_error_blk:
 	.zero	2
 	.section	.bss.g_power_lost_recovery_flag,"aw",@nobits
 	.align	1
-	.set	.LANCHOR238,. + 0
+	.set	.LANCHOR242,. + 0
 	.type	g_power_lost_recovery_flag, %object
 	.size	g_power_lost_recovery_flag, 2
 g_power_lost_recovery_flag:
 	.zero	2
 	.section	.bss.g_recovery_page_min_ver,"aw",@nobits
 	.align	2
-	.set	.LANCHOR136,. + 0
+	.set	.LANCHOR139,. + 0
 	.type	g_recovery_page_min_ver, %object
 	.size	g_recovery_page_min_ver, 4
 g_recovery_page_min_ver:
 	.zero	4
 	.section	.bss.g_recovery_page_num,"aw",@nobits
 	.align	2
-	.set	.LANCHOR239,. + 0
+	.set	.LANCHOR243,. + 0
 	.type	g_recovery_page_num, %object
 	.size	g_recovery_page_num, 4
 g_recovery_page_num:
 	.zero	4
 	.section	.bss.g_recovery_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR240,. + 0
+	.set	.LANCHOR244,. + 0
 	.type	g_recovery_ppa_tbl, %object
 	.size	g_recovery_ppa_tbl, 128
 g_recovery_ppa_tbl:
 	.zero	128
 	.section	.bss.g_req_cache,"aw",@nobits
 	.align	3
-	.set	.LANCHOR132,. + 0
+	.set	.LANCHOR135,. + 0
 	.type	g_req_cache, %object
 	.size	g_req_cache, 8
 g_req_cache:
 	.zero	8
 	.section	.bss.g_retryMode,"aw",@nobits
-	.set	.LANCHOR10,. + 0
+	.set	.LANCHOR11,. + 0
 	.type	g_retryMode, %object
 	.size	g_retryMode, 1
 g_retryMode:
@@ -21470,105 +22201,105 @@ g_slc2KBNand:
 	.zero	1
 	.section	.bss.g_sys_ext_data,"aw",@nobits
 	.align	3
-	.set	.LANCHOR138,. + 0
+	.set	.LANCHOR141,. + 0
 	.type	g_sys_ext_data, %object
 	.size	g_sys_ext_data, 512
 g_sys_ext_data:
 	.zero	512
 	.section	.bss.g_sys_save_data,"aw",@nobits
 	.align	3
-	.set	.LANCHOR80,. + 0
+	.set	.LANCHOR82,. + 0
 	.type	g_sys_save_data, %object
 	.size	g_sys_save_data, 48
 g_sys_save_data:
 	.zero	48
 	.section	.bss.g_tmp_data_superblock_id,"aw",@nobits
 	.align	1
-	.set	.LANCHOR133,. + 0
+	.set	.LANCHOR136,. + 0
 	.type	g_tmp_data_superblock_id, %object
 	.size	g_tmp_data_superblock_id, 2
 g_tmp_data_superblock_id:
 	.zero	2
 	.section	.bss.g_totle_avg_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR206,. + 0
+	.set	.LANCHOR214,. + 0
 	.type	g_totle_avg_erase_count, %object
 	.size	g_totle_avg_erase_count, 4
 g_totle_avg_erase_count:
 	.zero	4
 	.section	.bss.g_totle_cache_write_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR164,. + 0
+	.set	.LANCHOR169,. + 0
 	.type	g_totle_cache_write_count, %object
 	.size	g_totle_cache_write_count, 4
 g_totle_cache_write_count:
 	.zero	4
 	.section	.bss.g_totle_discard_page_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR163,. + 0
+	.set	.LANCHOR168,. + 0
 	.type	g_totle_discard_page_count, %object
 	.size	g_totle_discard_page_count, 4
 g_totle_discard_page_count:
 	.zero	4
 	.section	.bss.g_totle_gc_page_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR161,. + 0
+	.set	.LANCHOR166,. + 0
 	.type	g_totle_gc_page_count, %object
 	.size	g_totle_gc_page_count, 4
 g_totle_gc_page_count:
 	.zero	4
 	.section	.bss.g_totle_l2p_write_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR165,. + 0
+	.set	.LANCHOR170,. + 0
 	.type	g_totle_l2p_write_count, %object
 	.size	g_totle_l2p_write_count, 4
 g_totle_l2p_write_count:
 	.zero	4
 	.section	.bss.g_totle_map_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR128,. + 0
+	.set	.LANCHOR131,. + 0
 	.type	g_totle_map_block, %object
 	.size	g_totle_map_block, 2
 g_totle_map_block:
 	.zero	2
 	.section	.bss.g_totle_mlc_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR167,. + 0
+	.set	.LANCHOR172,. + 0
 	.type	g_totle_mlc_erase_count, %object
 	.size	g_totle_mlc_erase_count, 4
 g_totle_mlc_erase_count:
 	.zero	4
 	.section	.bss.g_totle_read_page_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR166,. + 0
+	.set	.LANCHOR171,. + 0
 	.type	g_totle_read_page_count, %object
 	.size	g_totle_read_page_count, 4
 g_totle_read_page_count:
 	.zero	4
 	.section	.bss.g_totle_read_sector,"aw",@nobits
 	.align	2
-	.set	.LANCHOR218,. + 0
+	.set	.LANCHOR226,. + 0
 	.type	g_totle_read_sector, %object
 	.size	g_totle_read_sector, 4
 g_totle_read_sector:
 	.zero	4
 	.section	.bss.g_totle_slc_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR168,. + 0
+	.set	.LANCHOR173,. + 0
 	.type	g_totle_slc_erase_count, %object
 	.size	g_totle_slc_erase_count, 4
 g_totle_slc_erase_count:
 	.zero	4
 	.section	.bss.g_totle_swl_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR134,. + 0
+	.set	.LANCHOR137,. + 0
 	.type	g_totle_swl_count, %object
 	.size	g_totle_swl_count, 4
 g_totle_swl_count:
 	.zero	4
 	.section	.bss.g_totle_sys_slc_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR79,. + 0
+	.set	.LANCHOR81,. + 0
 	.type	g_totle_sys_slc_erase_count, %object
 	.size	g_totle_sys_slc_erase_count, 4
 g_totle_sys_slc_erase_count:
@@ -21582,42 +22313,49 @@ g_totle_vendor_block:
 	.zero	2
 	.section	.bss.g_totle_write_page_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR162,. + 0
+	.set	.LANCHOR167,. + 0
 	.type	g_totle_write_page_count, %object
 	.size	g_totle_write_page_count, 4
 g_totle_write_page_count:
 	.zero	4
 	.section	.bss.g_totle_write_sector,"aw",@nobits
 	.align	2
-	.set	.LANCHOR217,. + 0
+	.set	.LANCHOR225,. + 0
 	.type	g_totle_write_sector, %object
 	.size	g_totle_write_sector, 4
 g_totle_write_sector:
+	.zero	4
+	.section	.bss.g_wr_page_num,"aw",@nobits
+	.align	2
+	.set	.LANCHOR72,. + 0
+	.type	g_wr_page_num, %object
+	.size	g_wr_page_num, 4
+g_wr_page_num:
 	.zero	4
 	.section	.bss.gc_discard_updated,"aw",@nobits
 	.align	2
-	.set	.LANCHOR233,. + 0
+	.set	.LANCHOR253,. + 0
 	.type	gc_discard_updated, %object
 	.size	gc_discard_updated, 4
 gc_discard_updated:
 	.zero	4
 	.section	.bss.gc_ink_free_return_value,"aw",@nobits
 	.align	1
-	.set	.LANCHOR243,. + 0
+	.set	.LANCHOR248,. + 0
 	.type	gc_ink_free_return_value, %object
 	.size	gc_ink_free_return_value, 2
 gc_ink_free_return_value:
 	.zero	2
 	.section	.bss.gpFlashSaveInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR146,. + 0
+	.set	.LANCHOR153,. + 0
 	.type	gpFlashSaveInfo, %object
 	.size	gpFlashSaveInfo, 8
 gpFlashSaveInfo:
 	.zero	8
 	.section	.bss.gpNandParaInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR18,. + 0
+	.set	.LANCHOR7,. + 0
 	.type	gpNandParaInfo, %object
 	.size	gpNandParaInfo, 8
 gpNandParaInfo:
@@ -21637,14 +22375,14 @@ gpNandc1:
 	.zero	8
 	.section	.bss.gpReadRetrial,"aw",@nobits
 	.align	3
-	.set	.LANCHOR145,. + 0
+	.set	.LANCHOR148,. + 0
 	.type	gpReadRetrial, %object
 	.size	gpReadRetrial, 8
 gpReadRetrial:
 	.zero	8
 	.section	.bss.gp_ect_tbl_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR191,. + 0
+	.set	.LANCHOR199,. + 0
 	.type	gp_ect_tbl_info, %object
 	.size	gp_ect_tbl_info, 8
 gp_ect_tbl_info:
@@ -21657,14 +22395,14 @@ gp_flash_check_buf:
 	.zero	262144
 	.section	.bss.gp_gc_page_buf_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR103,. + 0
+	.set	.LANCHOR106,. + 0
 	.type	gp_gc_page_buf_info, %object
 	.size	gp_gc_page_buf_info, 8
 gp_gc_page_buf_info:
 	.zero	8
 	.section	.bss.gp_last_act_superblock,"aw",@nobits
 	.align	3
-	.set	.LANCHOR231,. + 0
+	.set	.LANCHOR252,. + 0
 	.type	gp_last_act_superblock, %object
 	.size	gp_last_act_superblock, 8
 gp_last_act_superblock:
@@ -21684,18 +22422,25 @@ idb_flash_slc_mode:
 	.zero	4
 	.section	.bss.idb_need_write_back,"aw",@nobits
 	.align	2
-	.set	.LANCHOR154,. + 0
+	.set	.LANCHOR159,. + 0
 	.type	idb_need_write_back, %object
 	.size	idb_need_write_back, 4
 idb_need_write_back:
+	.zero	4
+	.section	.bss.last_cache_match_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR257,. + 0
+	.type	last_cache_match_count, %object
+	.size	last_cache_match_count, 4
+last_cache_match_count:
 	.zero	4
 	.section	.bss.mlcPageToSlcPageTbl,"aw",@nobits
 	.align	2
-	.set	.LANCHOR120,. + 0
+	.set	.LANCHOR123,. + 0
 	.type	mlcPageToSlcPageTbl, %object
-	.size	mlcPageToSlcPageTbl, 1024
+	.size	mlcPageToSlcPageTbl, 2048
 mlcPageToSlcPageTbl:
-	.zero	1024
+	.zero	2048
 	.section	.bss.p_blk_mode_table,"aw",@nobits
 	.align	3
 	.set	.LANCHOR1,. + 0
@@ -21705,133 +22450,133 @@ p_blk_mode_table:
 	.zero	8
 	.section	.bss.p_data_block_list_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR82,. + 0
+	.set	.LANCHOR84,. + 0
 	.type	p_data_block_list_head, %object
 	.size	p_data_block_list_head, 8
 p_data_block_list_head:
 	.zero	8
 	.section	.bss.p_data_block_list_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR81,. + 0
+	.set	.LANCHOR83,. + 0
 	.type	p_data_block_list_table, %object
 	.size	p_data_block_list_table, 8
 p_data_block_list_table:
 	.zero	8
 	.section	.bss.p_data_block_list_tail,"aw",@nobits
 	.align	3
-	.set	.LANCHOR84,. + 0
+	.set	.LANCHOR86,. + 0
 	.type	p_data_block_list_tail, %object
 	.size	p_data_block_list_tail, 8
 p_data_block_list_tail:
 	.zero	8
 	.section	.bss.p_erase_count_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR78,. + 0
+	.set	.LANCHOR80,. + 0
 	.type	p_erase_count_table, %object
 	.size	p_erase_count_table, 8
 p_erase_count_table:
 	.zero	8
 	.section	.bss.p_free_data_block_list_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR87,. + 0
+	.set	.LANCHOR89,. + 0
 	.type	p_free_data_block_list_head, %object
 	.size	p_free_data_block_list_head, 8
 p_free_data_block_list_head:
 	.zero	8
 	.section	.bss.p_gc_blk_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR109,. + 0
+	.set	.LANCHOR112,. + 0
 	.type	p_gc_blk_tbl, %object
 	.size	p_gc_blk_tbl, 8
 p_gc_blk_tbl:
 	.zero	8
 	.section	.bss.p_gc_data_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR104,. + 0
+	.set	.LANCHOR107,. + 0
 	.type	p_gc_data_buf, %object
 	.size	p_gc_data_buf, 8
 p_gc_data_buf:
 	.zero	8
 	.section	.bss.p_gc_page_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR111,. + 0
+	.set	.LANCHOR114,. + 0
 	.type	p_gc_page_info, %object
 	.size	p_gc_page_info, 8
 p_gc_page_info:
 	.zero	8
 	.section	.bss.p_gc_spare_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR105,. + 0
+	.set	.LANCHOR108,. + 0
 	.type	p_gc_spare_buf, %object
 	.size	p_gc_spare_buf, 8
 p_gc_spare_buf:
 	.zero	8
 	.section	.bss.p_io_data_buf_0,"aw",@nobits
 	.align	3
-	.set	.LANCHOR186,. + 0
+	.set	.LANCHOR193,. + 0
 	.type	p_io_data_buf_0, %object
 	.size	p_io_data_buf_0, 8
 p_io_data_buf_0:
 	.zero	8
 	.section	.bss.p_io_data_buf_1,"aw",@nobits
 	.align	3
-	.set	.LANCHOR187,. + 0
+	.set	.LANCHOR194,. + 0
 	.type	p_io_data_buf_1, %object
 	.size	p_io_data_buf_1, 8
 p_io_data_buf_1:
 	.zero	8
 	.section	.bss.p_io_spare_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR189,. + 0
+	.set	.LANCHOR196,. + 0
 	.type	p_io_spare_buf, %object
 	.size	p_io_spare_buf, 8
 p_io_spare_buf:
 	.zero	8
 	.section	.bss.p_l2p_map_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR126,. + 0
+	.set	.LANCHOR129,. + 0
 	.type	p_l2p_map_buf, %object
 	.size	p_l2p_map_buf, 8
 p_l2p_map_buf:
 	.zero	8
 	.section	.bss.p_l2p_ram_map,"aw",@nobits
 	.align	3
-	.set	.LANCHOR96,. + 0
+	.set	.LANCHOR98,. + 0
 	.type	p_l2p_ram_map, %object
 	.size	p_l2p_ram_map, 8
 p_l2p_ram_map:
 	.zero	8
 	.section	.bss.p_map_block_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR129,. + 0
+	.set	.LANCHOR132,. + 0
 	.type	p_map_block_table, %object
 	.size	p_map_block_table, 8
 p_map_block_table:
 	.zero	8
 	.section	.bss.p_map_block_valid_page_count,"aw",@nobits
 	.align	3
-	.set	.LANCHOR125,. + 0
+	.set	.LANCHOR128,. + 0
 	.type	p_map_block_valid_page_count, %object
 	.size	p_map_block_valid_page_count, 8
 p_map_block_valid_page_count:
 	.zero	8
 	.section	.bss.p_map_block_ver_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR130,. + 0
+	.set	.LANCHOR133,. + 0
 	.type	p_map_block_ver_table, %object
 	.size	p_map_block_ver_table, 8
 p_map_block_ver_table:
 	.zero	8
 	.section	.bss.p_map_region_ppn_check_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR195,. + 0
+	.set	.LANCHOR203,. + 0
 	.type	p_map_region_ppn_check_table, %object
 	.size	p_map_region_ppn_check_table, 8
 p_map_region_ppn_check_table:
 	.zero	8
 	.section	.bss.p_map_region_ppn_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR131,. + 0
+	.set	.LANCHOR134,. + 0
 	.type	p_map_region_ppn_table, %object
 	.size	p_map_region_ppn_table, 8
 p_map_region_ppn_table:
@@ -21845,41 +22590,35 @@ p_plane_order_table:
 	.zero	32
 	.section	.bss.p_swl_mul_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR137,. + 0
+	.set	.LANCHOR140,. + 0
 	.type	p_swl_mul_table, %object
 	.size	p_swl_mul_table, 8
 p_swl_mul_table:
 	.zero	8
 	.section	.bss.p_sys_data_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR183,. + 0
+	.set	.LANCHOR189,. + 0
 	.type	p_sys_data_buf, %object
 	.size	p_sys_data_buf, 8
 p_sys_data_buf:
 	.zero	8
 	.section	.bss.p_sys_data_buf_1,"aw",@nobits
 	.align	3
-	.set	.LANCHOR184,. + 0
+	.set	.LANCHOR190,. + 0
 	.type	p_sys_data_buf_1, %object
 	.size	p_sys_data_buf_1, 8
 p_sys_data_buf_1:
 	.zero	8
 	.section	.bss.p_sys_spare_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR188,. + 0
+	.set	.LANCHOR195,. + 0
 	.type	p_sys_spare_buf, %object
 	.size	p_sys_spare_buf, 8
 p_sys_spare_buf:
-	.zero	8
-	.section	.bss.p_valid_page_count_check_table,"aw",@nobits
-	.align	3
-	.type	p_valid_page_count_check_table, %object
-	.size	p_valid_page_count_check_table, 8
-p_valid_page_count_check_table:
 	.zero	8
 	.section	.bss.p_valid_page_count_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR83,. + 0
+	.set	.LANCHOR85,. + 0
 	.type	p_valid_page_count_table, %object
 	.size	p_valid_page_count_table, 8
 p_valid_page_count_table:
@@ -21893,31 +22632,45 @@ p_vendor_block_table:
 	.zero	8
 	.section	.bss.p_vendor_block_valid_page_count,"aw",@nobits
 	.align	3
-	.set	.LANCHOR192,. + 0
+	.set	.LANCHOR200,. + 0
 	.type	p_vendor_block_valid_page_count, %object
 	.size	p_vendor_block_valid_page_count, 8
 p_vendor_block_valid_page_count:
 	.zero	8
 	.section	.bss.p_vendor_block_ver_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR193,. + 0
+	.set	.LANCHOR201,. + 0
 	.type	p_vendor_block_ver_table, %object
 	.size	p_vendor_block_ver_table, 8
 p_vendor_block_ver_table:
 	.zero	8
 	.section	.bss.p_vendor_data_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR185,. + 0
+	.set	.LANCHOR191,. + 0
 	.type	p_vendor_data_buf, %object
 	.size	p_vendor_data_buf, 8
 p_vendor_data_buf:
 	.zero	8
 	.section	.bss.p_vendor_region_ppn_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR194,. + 0
+	.set	.LANCHOR202,. + 0
 	.type	p_vendor_region_ppn_table, %object
 	.size	p_vendor_region_ppn_table, 8
 p_vendor_region_ppn_table:
+	.zero	8
+	.section	.bss.p_wr_io_data_buf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR192,. + 0
+	.type	p_wr_io_data_buf, %object
+	.size	p_wr_io_data_buf, 8
+p_wr_io_data_buf:
+	.zero	8
+	.section	.bss.p_wr_io_spare_buf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR197,. + 0
+	.type	p_wr_io_spare_buf, %object
+	.size	p_wr_io_spare_buf, 8
+p_wr_io_spare_buf:
 	.zero	8
 	.section	.bss.read_retry_cur_offset,"aw",@nobits
 	.align	3
@@ -21928,53 +22681,60 @@ read_retry_cur_offset:
 	.zero	4
 	.section	.bss.req_erase,"aw",@nobits
 	.align	3
-	.set	.LANCHOR77,. + 0
+	.set	.LANCHOR79,. + 0
 	.type	req_erase, %object
 	.size	req_erase, 8
 req_erase:
 	.zero	8
 	.section	.bss.req_gc,"aw",@nobits
 	.align	3
-	.set	.LANCHOR106,. + 0
+	.set	.LANCHOR109,. + 0
 	.type	req_gc, %object
 	.size	req_gc, 8
 req_gc:
 	.zero	8
 	.section	.bss.req_gc_dst,"aw",@nobits
 	.align	3
-	.set	.LANCHOR181,. + 0
+	.set	.LANCHOR187,. + 0
 	.type	req_gc_dst, %object
 	.size	req_gc_dst, 8
 req_gc_dst:
 	.zero	8
 	.section	.bss.req_prgm,"aw",@nobits
 	.align	3
-	.set	.LANCHOR182,. + 0
+	.set	.LANCHOR188,. + 0
 	.type	req_prgm, %object
 	.size	req_prgm, 8
 req_prgm:
 	.zero	8
 	.section	.bss.req_read,"aw",@nobits
 	.align	3
-	.set	.LANCHOR180,. + 0
+	.set	.LANCHOR186,. + 0
 	.type	req_read, %object
 	.size	req_read, 8
 req_read:
 	.zero	8
 	.section	.bss.req_sys,"aw",@nobits
 	.align	3
-	.set	.LANCHOR203,. + 0
+	.set	.LANCHOR211,. + 0
 	.type	req_sys, %object
 	.size	req_sys, 56
 req_sys:
 	.zero	56
+	.section	.bss.req_wr_io,"aw",@nobits
+	.align	3
+	.set	.LANCHOR73,. + 0
+	.type	req_wr_io, %object
+	.size	req_wr_io, 8
+req_wr_io:
+	.zero	8
 	.section	.bss.slcPageToMlcPageTbl,"aw",@nobits
 	.align	2
-	.set	.LANCHOR16,. + 0
+	.set	.LANCHOR17,. + 0
 	.type	slcPageToMlcPageTbl, %object
-	.size	slcPageToMlcPageTbl, 512
+	.size	slcPageToMlcPageTbl, 1024
 slcPageToMlcPageTbl:
-	.zero	512
+	.zero	1024
 	.section	.data.FtlMallocOffset,"aw",@progbits
 	.align	2
 	.type	FtlMallocOffset, %object
@@ -21989,9 +22749,9 @@ LastWritenPbaAddr:
 	.word	-1
 	.section	.data.NandFlashParaTbl,"aw",@progbits
 	.align	3
-	.set	.LANCHOR142,. + 0
+	.set	.LANCHOR145,. + 0
 	.type	NandFlashParaTbl, %object
-	.size	NandFlashParaTbl, 2592
+	.size	NandFlashParaTbl, 2752
 NandFlashParaTbl:
 	.byte	6
 	.byte	44
@@ -22696,6 +23456,32 @@ NandFlashParaTbl:
 	.byte	0
 	.zero	4
 	.byte	6
+	.byte	44
+	.byte	-92
+	.byte	100
+	.byte	50
+	.byte	-86
+	.byte	4
+	.byte	4
+	.byte	1
+	.byte	32
+	.hword	1024
+	.byte	2
+	.byte	1
+	.hword	2192
+	.hword	1479
+	.byte	10
+	.byte	19
+	.byte	60
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	4
+	.byte	0
+	.byte	1
+	.byte	0
+	.zero	4
+	.byte	6
 	.byte	-83
 	.byte	-34
 	.byte	-108
@@ -23267,6 +24053,58 @@ NandFlashParaTbl:
 	.byte	0
 	.byte	0
 	.zero	4
+	.byte	5
+	.byte	-119
+	.byte	-124
+	.byte	100
+	.byte	60
+	.byte	-91
+	.byte	0
+	.byte	7
+	.byte	1
+	.byte	32
+	.hword	512
+	.byte	2
+	.byte	2
+	.hword	1024
+	.hword	455
+	.byte	4
+	.byte	17
+	.byte	40
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.zero	4
+	.byte	6
+	.byte	-119
+	.byte	-120
+	.byte	36
+	.byte	59
+	.byte	-87
+	.byte	0
+	.byte	7
+	.byte	1
+	.byte	16
+	.hword	192
+	.byte	2
+	.byte	2
+	.hword	2048
+	.hword	279
+	.byte	12
+	.byte	0
+	.byte	24
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.zero	4
 	.byte	6
 	.byte	-104
 	.byte	-41
@@ -23632,6 +24470,32 @@ NandFlashParaTbl:
 	.byte	0
 	.zero	4
 	.byte	6
+	.byte	-104
+	.byte	-34
+	.byte	-108
+	.byte	-109
+	.byte	118
+	.byte	-47
+	.byte	1
+	.byte	1
+	.byte	32
+	.hword	256
+	.byte	2
+	.byte	2
+	.hword	1074
+	.hword	1497
+	.byte	2
+	.byte	35
+	.byte	40
+	.byte	32
+	.byte	3
+	.byte	1
+	.byte	4
+	.byte	0
+	.byte	0
+	.byte	0
+	.zero	4
+	.byte	6
 	.byte	69
 	.byte	-34
 	.byte	-108
@@ -23943,7 +24807,7 @@ NandFlashParaTbl:
 	.byte	0
 	.byte	0
 	.zero	4
-	.byte	6
+	.byte	5
 	.byte	-20
 	.byte	-41
 	.byte	-108
@@ -24099,9 +24963,35 @@ NandFlashParaTbl:
 	.byte	0
 	.byte	0
 	.zero	4
+	.byte	6
+	.byte	-20
+	.byte	-34
+	.byte	-108
+	.byte	-61
+	.byte	-92
+	.byte	-54
+	.byte	0
+	.byte	1
+	.byte	32
+	.hword	792
+	.byte	2
+	.byte	1
+	.hword	688
+	.hword	1217
+	.byte	11
+	.byte	50
+	.byte	40
+	.byte	32
+	.byte	3
+	.byte	1
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.zero	4
 	.section	.data.NandOptPara,"aw",@progbits
 	.align	3
-	.set	.LANCHOR143,. + 0
+	.set	.LANCHOR146,. + 0
 	.type	NandOptPara, %object
 	.size	NandOptPara, 128
 NandOptPara:
@@ -24183,7 +25073,7 @@ NandOptPara:
 	.zero	14
 	.section	.data.SamsungRefValue,"aw",@progbits
 	.align	3
-	.set	.LANCHOR13,. + 0
+	.set	.LANCHOR14,. + 0
 	.type	SamsungRefValue, %object
 	.size	SamsungRefValue, 64
 SamsungRefValue:
@@ -24253,7 +25143,7 @@ SamsungRefValue:
 	.byte	0
 	.section	.data.Toshiba15RefValue,"aw",@progbits
 	.align	3
-	.set	.LANCHOR8,. + 0
+	.set	.LANCHOR9,. + 0
 	.type	Toshiba15RefValue, %object
 	.size	Toshiba15RefValue, 95
 Toshiba15RefValue:
@@ -24354,7 +25244,7 @@ Toshiba15RefValue:
 	.byte	0
 	.section	.data.ToshibaA19RefValue,"aw",@progbits
 	.align	3
-	.set	.LANCHOR9,. + 0
+	.set	.LANCHOR10,. + 0
 	.type	ToshibaA19RefValue, %object
 	.size	ToshibaA19RefValue, 45
 ToshibaA19RefValue:
@@ -24405,7 +25295,7 @@ ToshibaA19RefValue:
 	.byte	0
 	.section	.data.ToshibaRefValue,"aw",@progbits
 	.align	3
-	.set	.LANCHOR11,. + 0
+	.set	.LANCHOR12,. + 0
 	.type	ToshibaRefValue, %object
 	.size	ToshibaRefValue, 8
 ToshibaRefValue:
@@ -24419,14 +25309,14 @@ ToshibaRefValue:
 	.byte	112
 	.section	.data.ftl_gc_temp_block_bops_scan_page_addr,"aw",@progbits
 	.align	1
-	.set	.LANCHOR241,. + 0
+	.set	.LANCHOR245,. + 0
 	.type	ftl_gc_temp_block_bops_scan_page_addr, %object
 	.size	ftl_gc_temp_block_bops_scan_page_addr, 2
 ftl_gc_temp_block_bops_scan_page_addr:
 	.hword	-1
 	.section	.data.gFtlInitStatus,"aw",@progbits
 	.align	2
-	.set	.LANCHOR232,. + 0
+	.set	.LANCHOR247,. + 0
 	.type	gFtlInitStatus, %object
 	.size	gFtlInitStatus, 4
 gFtlInitStatus:
@@ -24461,7 +25351,7 @@ gNandParaInfo:
 	.zero	4
 	.section	.data.gSlcNandParaInfo,"aw",@progbits
 	.align	3
-	.set	.LANCHOR201,. + 0
+	.set	.LANCHOR209,. + 0
 	.type	gSlcNandParaInfo, %object
 	.size	gSlcNandParaInfo, 32
 gSlcNandParaInfo:
@@ -24633,7 +25523,7 @@ random_seed:
 	.hword	28087
 	.section	.data.refValueDefault,"aw",@progbits
 	.align	3
-	.set	.LANCHOR196,. + 0
+	.set	.LANCHOR204,. + 0
 	.type	refValueDefault, %object
 	.size	refValueDefault, 28
 refValueDefault:
@@ -24676,66 +25566,73 @@ refValueDefault:
 .LC1:
 	.string	"FlashEraseBlocks pageAddr error %x\n"
 	.section	.rodata.FlashInit.str1.1,"aMS",@progbits,1
-.LC23:
-	.string	"No.%d FLASH ID:%x %x %x %x %x %x\n"
 .LC24:
+	.string	"No.%d FLASH ID:%x %x %x %x %x %x\n"
+.LC25:
 	.string	"FlashLoadPhyInfo fail %x!!\n"
 	.section	.rodata.FlashProgSlc2KPages.str1.1,"aMS",@progbits,1
-.LC29:
-	.string	"prog error: = %x\n"
 .LC30:
-	.string	"prog read error: = %x\n"
+	.string	"prog error: = %x\n"
 .LC31:
-	.string	"prog read s error: = %x %x %x\n"
+	.string	"prog read error: = %x\n"
 .LC32:
+	.string	"prog read REFRESH: = %x\n"
+.LC33:
+	.string	"prog read s error: = %x %x %x\n"
+.LC34:
 	.string	"prog read d error: = %x %x %x\n"
 	.section	.rodata.FlashReadFacBbtData.str1.1,"aMS",@progbits,1
-.LC56:
+.LC59:
 	.string	"BBT:"
 	.section	.rodata.FlashReadIdbDataRaw.str1.1,"aMS",@progbits,1
-.LC14:
+.LC15:
 	.string	"ECC:%d\n"
 	.section	.rodata.FlashReadPage.str1.1,"aMS",@progbits,1
 .LC12:
 	.string	"read retry status %x %x %x\n"
 	.section	.rodata.FlashReadPages.str1.1,"aMS",@progbits,1
-.LC28:
+.LC29:
 	.string	"ReadRetry pageadd=%x ecc=%x err=%x\n"
 	.section	.rodata.FlashReadSlc2KPages.str1.1,"aMS",@progbits,1
-.LC25:
-	.string	"Read pageadd=%x  ecc=%x err=%x\n"
 .LC26:
-	.string	"data:"
+	.string	"Read pageadd=%x  ecc=%x err=%x\n"
 .LC27:
+	.string	"data:"
+.LC28:
 	.string	"spare:"
 	.section	.rodata.FtlBbmMapBadBlock.str1.1,"aMS",@progbits,1
 .LC2:
 	.string	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\n"
 	.section	.rodata.FtlBbmTblFlush.str1.1,"aMS",@progbits,1
-.LC33:
+.LC35:
 	.string	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\n"
-.LC34:
+.LC36:
 	.string	"FtlBbmTblFlush error:%x\n"
-.LC35:
+.LC37:
 	.string	"FtlBbmTblFlush error = %x error count = %d\n"
+	.section	.rodata.FtlCacheWriteBack.str1.1,"aMS",@progbits,1
+.LC76:
+	.string	"Ftlwrite decrement_vpc_count %x = %d\n"
 	.section	.rodata.FtlCheckVpc.str1.1,"aMS",@progbits,1
-.LC61:
+.LC63:
 	.string	"FtlCheckVpc2 %x = %x  %x\n"
-.LC62:
+.LC64:
 	.string	"free blk vpc error %x = %x  %x\n"
+.LC65:
+	.string	"error_flag %x\n"
 	.section	.rodata.FtlDumpBlockInfo.str1.1,"aMS",@progbits,1
-.LC46:
+.LC48:
 	.string	"...%s enter...\n"
-.LC47:
+.LC49:
 	.string	"superBlkID = %x vpc=%x\n"
-.LC48:
+.LC50:
 	.string	"flashmode = %x pagenum = %x %x\n"
-.LC49:
+.LC51:
 	.string	"id = %x,%x addr= %x,spare= %x %x %x %x data=%x %x\n"
 	.section	.rodata.FtlDumpSysBlock.str1.1,"aMS",@progbits,1
-.LC79:
+.LC84:
 	.string	"id = %x,%x addr= %x,spare= %x %x %x %x data = %x\n"
-.LC80:
+.LC85:
 	.string	":"
 	.section	.rodata.FtlFreeSysBlkQueueOut.str1.1,"aMS",@progbits,1
 .LC3:
@@ -24743,71 +25640,71 @@ refValueDefault:
 .LC4:
 	.string	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\n"
 	.section	.rodata.FtlGcFreeTempBlock.str1.1,"aMS",@progbits,1
-.LC71:
+.LC74:
 	.string	"GC des block %x done\n"
 	.section	.rodata.FtlGcScanTempBlk.str1.1,"aMS",@progbits,1
-.LC69:
+.LC72:
 	.string	"FtlGcScanTempBlk Error ID %x %x!!!!!!! \n"
-.LC70:
+.LC73:
 	.string	"FtlGcScanTempBlkError ID %x %x!!!!!!!\n"
 	.section	.rodata.FtlInit.str1.1,"aMS",@progbits,1
-.LC72:
-	.string	"FTL version: 5.0.57 20190828"
-.LC73:
+.LC77:
+	.string	"FTL version: 5.0.63 20200923"
+.LC78:
 	.string	"...%s: no bad block mapping table, format device\n"
-.LC74:
+.LC79:
 	.string	"...%s FtlSysBlkInit error ,format device!\n"
 	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",@progbits,1
-.LC43:
+.LC45:
 	.string	"no ect"
 	.section	.rodata.FtlLoadSysInfo.str1.1,"aMS",@progbits,1
-.LC45:
+.LC47:
 	.string	"id = %x,%x addr= %x,spare= %x %x %x %x data= %x\n"
+	.section	.rodata.FtlLowFormat.str1.1,"aMS",@progbits,1
+.LC75:
+	.string	"too many bad block  = %d %d\n"
 	.section	.rodata.FtlMapWritePage.str1.1,"aMS",@progbits,1
-.LC40:
+.LC42:
 	.string	"FtlMapWritePage error = %x\n"
-.LC41:
+.LC43:
 	.string	"FtlMapWritePage error = %x error count = %d\n"
-	.section	.rodata.FtlProgPages.str1.1,"aMS",@progbits,1
-.LC60:
-	.string	"Ftlwrite decrement_vpc_count %x = %d\n"
 	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",@progbits,1
-.LC66:
+.LC69:
 	.string	"RSB refresh addr %x\n"
-.LC67:
+.LC70:
 	.string	"spuer block %x vpn is 0\n "
-.LC68:
+.LC71:
 	.string	"g_recovery_ppa %x ver %x\n "
 	.section	.rodata.FtlScanAllBlock.str1.1,"aMS",@progbits,1
-.LC50:
+.LC52:
 	.string	"blk = %x vpc=%x mode = %x\n"
-.LC51:
+.LC53:
 	.string	"mlc id = %x,%x addr= %x,spare= %x %x %x %x data=%x %x\n"
-.LC52:
+.LC54:
 	.string	"slc id = %x,%x addr= %x,spare= %x %x %x %x data=%x %x\n"
 	.section	.rodata.FtlVendorPartRead.str1.1,"aMS",@progbits,1
-.LC42:
+.LC44:
 	.string	"FtlVendorPartRead refresh = %x phyAddr = %x\n"
 	.section	.rodata.FtlVpcTblFlush.str1.1,"aMS",@progbits,1
-.LC38:
+.LC40:
 	.string	"FtlVpcTblFlush error = %x error count = %d\n"
 	.section	.rodata.FtlWrite.str1.1,"aMS",@progbits,1
-.LC78:
+.LC83:
 	.string	"FtlWrite: lpa error:%x %x\n"
 	.section	.rodata.Ftl_load_ext_data.str1.1,"aMS",@progbits,1
-.LC44:
+.LC46:
 	.string	"slc mode"
 	.section	.rodata.Ftlscanalldata.str1.1,"aMS",@progbits,1
-.LC63:
+.LC66:
 	.string	"Ftlscanalldata = %x\n"
-.LC64:
+.LC67:
 	.string	"scan lpa = %x ppa= %x\n"
-.LC65:
+.LC68:
 	.string	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\n"
 	.section	.rodata.HynixGetReadRetryDefault.str1.1,"aMS",@progbits,1
-.LC21:
-	.string	"otp error! %d"
 .LC22:
+	.string	"otp error! %d"
+.LC23:
 	.string	"rr"
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",@progbits,1
 .LC5:
@@ -24819,298 +25716,438 @@ refValueDefault:
 	.section	.rodata.MicronReadRetrial.str1.1,"aMS",@progbits,1
 .LC13:
 	.string	"micron RR %d row=%x,count %d,status=%d\n"
-	.section	.rodata.__func__.10021,"a",@progbits
+	.section	.rodata.__func__.10027,"a",@progbits
+	.align	3
+	.set	.LANCHOR96,. + 0
+	.type	__func__.10027, %object
+	.size	__func__.10027, 22
+__func__.10027:
+	.string	"List_update_data_list"
+	.section	.rodata.__func__.10034,"a",@progbits
+	.align	3
+	.set	.LANCHOR237,. + 0
+	.type	__func__.10034, %object
+	.size	__func__.10034, 20
+__func__.10034:
+	.string	"ftl_load_l2p_region"
+	.section	.rodata.__func__.10065,"a",@progbits
+	.align	3
+	.set	.LANCHOR97,. + 0
+	.type	__func__.10065, %object
+	.size	__func__.10065, 26
+__func__.10065:
+	.string	"ftl_map_blk_alloc_new_blk"
+	.section	.rodata.__func__.10075,"a",@progbits
+	.align	3
+	.set	.LANCHOR221,. + 0
+	.type	__func__.10075, %object
+	.size	__func__.10075, 15
+__func__.10075:
+	.string	"ftl_map_blk_gc"
+	.section	.rodata.__func__.10088,"a",@progbits
 	.align	3
 	.set	.LANCHOR222,. + 0
-	.type	__func__.10021, %object
-	.size	__func__.10021, 15
-__func__.10021:
+	.type	__func__.10088, %object
+	.size	__func__.10088, 31
+__func__.10088:
+	.string	"Ftl_write_map_blk_to_last_page"
+	.section	.rodata.__func__.10101,"a",@progbits
+	.align	3
+	.set	.LANCHOR223,. + 0
+	.type	__func__.10101, %object
+	.size	__func__.10101, 16
+__func__.10101:
+	.string	"FtlMapWritePage"
+	.section	.rodata.__func__.10121,"a",@progbits
+	.align	3
+	.set	.LANCHOR100,. + 0
+	.type	__func__.10121, %object
+	.size	__func__.10121, 22
+__func__.10121:
+	.string	"select_l2p_ram_region"
+	.section	.rodata.__func__.10137,"a",@progbits
+	.align	3
+	.set	.LANCHOR236,. + 0
+	.type	__func__.10137, %object
+	.size	__func__.10137, 9
+__func__.10137:
+	.string	"log2phys"
+	.section	.rodata.__func__.10199,"a",@progbits
+	.align	3
+	.set	.LANCHOR219,. + 0
+	.type	__func__.10199, %object
+	.size	__func__.10199, 15
+__func__.10199:
+	.string	"FtlVpcTblFlush"
+	.section	.rodata.__func__.10218,"a",@progbits
+	.align	3
+	.set	.LANCHOR229,. + 0
+	.type	__func__.10218, %object
+	.size	__func__.10218, 14
+__func__.10218:
+	.string	"FtlScanSysBlk"
+	.section	.rodata.__func__.10273,"a",@progbits
+	.align	3
+	.set	.LANCHOR230,. + 0
+	.type	__func__.10273, %object
+	.size	__func__.10273, 15
+__func__.10273:
 	.string	"FtlLoadSysInfo"
-	.section	.rodata.__func__.10032,"a",@progbits
+	.section	.rodata.__func__.10284,"a",@progbits
 	.align	3
-	.set	.LANCHOR234,. + 0
-	.type	__func__.10032, %object
-	.size	__func__.10032, 12
-__func__.10032:
+	.set	.LANCHOR238,. + 0
+	.type	__func__.10284, %object
+	.size	__func__.10284, 12
+__func__.10284:
 	.string	"FtlCheckVpc"
-	.section	.rodata.__func__.10064,"a",@progbits
+	.section	.rodata.__func__.10316,"a",@progbits
 	.align	3
-	.set	.LANCHOR225,. + 0
-	.type	__func__.10064, %object
-	.size	__func__.10064, 17
-__func__.10064:
+	.set	.LANCHOR233,. + 0
+	.type	__func__.10316, %object
+	.size	__func__.10316, 17
+__func__.10316:
 	.string	"FtlDumpBlockInfo"
-	.section	.rodata.__func__.10083,"a",@progbits
+	.section	.rodata.__func__.10335,"a",@progbits
 	.align	3
-	.set	.LANCHOR226,. + 0
-	.type	__func__.10083, %object
-	.size	__func__.10083, 16
-__func__.10083:
+	.set	.LANCHOR234,. + 0
+	.type	__func__.10335, %object
+	.size	__func__.10335, 16
+__func__.10335:
 	.string	"FtlScanAllBlock"
-	.section	.rodata.__func__.10188,"a",@progbits
+	.section	.rodata.__func__.10440,"a",@progbits
 	.align	3
-	.set	.LANCHOR235,. + 0
-	.type	__func__.10188, %object
-	.size	__func__.10188, 16
-__func__.10188:
+	.set	.LANCHOR239,. + 0
+	.type	__func__.10440, %object
+	.size	__func__.10440, 16
+__func__.10440:
 	.string	"FtlReUsePrevPpa"
-	.section	.rodata.__func__.10221,"a",@progbits
+	.section	.rodata.__func__.10473,"a",@progbits
 	.align	3
-	.set	.LANCHOR236,. + 0
-	.type	__func__.10221, %object
-	.size	__func__.10221, 22
-__func__.10221:
+	.set	.LANCHOR240,. + 0
+	.type	__func__.10473, %object
+	.size	__func__.10473, 22
+__func__.10473:
 	.string	"FtlRecoverySuperblock"
-	.section	.rodata.__func__.10275,"a",@progbits
+	.section	.rodata.__func__.10527,"a",@progbits
 	.align	3
-	.set	.LANCHOR101,. + 0
-	.type	__func__.10275, %object
-	.size	__func__.10275, 16
-__func__.10275:
+	.set	.LANCHOR103,. + 0
+	.type	__func__.10527, %object
+	.size	__func__.10527, 16
+__func__.10527:
 	.string	"make_superblock"
-	.section	.rodata.__func__.10295,"a",@progbits
+	.section	.rodata.__func__.10547,"a",@progbits
 	.align	3
-	.set	.LANCHOR140,. + 0
-	.type	__func__.10295, %object
-	.size	__func__.10295, 18
-__func__.10295:
+	.set	.LANCHOR143,. + 0
+	.type	__func__.10547, %object
+	.size	__func__.10547, 18
+__func__.10547:
 	.string	"SupperBlkListInit"
-	.section	.rodata.__func__.10339,"a",@progbits
+	.section	.rodata.__func__.10593,"a",@progbits
 	.align	3
-	.set	.LANCHOR227,. + 0
-	.type	__func__.10339, %object
-	.size	__func__.10339, 17
-__func__.10339:
+	.set	.LANCHOR235,. + 0
+	.type	__func__.10593, %object
+	.size	__func__.10593, 17
+__func__.10593:
 	.string	"ftl_scan_all_ppa"
-	.section	.rodata.__func__.10384,"a",@progbits
+	.section	.rodata.__func__.10638,"a",@progbits
 	.align	3
-	.set	.LANCHOR204,. + 0
-	.type	__func__.10384, %object
-	.size	__func__.10384, 25
-__func__.10384:
+	.set	.LANCHOR212,. + 0
+	.type	__func__.10638, %object
+	.size	__func__.10638, 25
+__func__.10638:
 	.string	"allocate_data_superblock"
-	.section	.rodata.__func__.10398,"a",@progbits
+	.section	.rodata.__func__.10652,"a",@progbits
 	.align	3
-	.set	.LANCHOR220,. + 0
-	.type	__func__.10398, %object
-	.size	__func__.10398, 29
-__func__.10398:
+	.set	.LANCHOR228,. + 0
+	.type	__func__.10652, %object
+	.size	__func__.10652, 29
+__func__.10652:
 	.string	"allocate_new_data_superblock"
-	.section	.rodata.__func__.10404,"a",@progbits
+	.section	.rodata.__func__.10658,"a",@progbits
 	.align	3
-	.set	.LANCHOR209,. + 0
-	.type	__func__.10404, %object
-	.size	__func__.10404, 19
-__func__.10404:
+	.set	.LANCHOR217,. + 0
+	.type	__func__.10658, %object
+	.size	__func__.10658, 19
+__func__.10658:
 	.string	"get_new_active_ppa"
-	.section	.rodata.__func__.10415,"a",@progbits
+	.section	.rodata.__func__.10669,"a",@progbits
 	.align	3
-	.set	.LANCHOR207,. + 0
-	.type	__func__.10415, %object
-	.size	__func__.10415, 16
-__func__.10415:
+	.set	.LANCHOR215,. + 0
+	.type	__func__.10669, %object
+	.size	__func__.10669, 16
+__func__.10669:
 	.string	"update_vpc_list"
-	.section	.rodata.__func__.10420,"a",@progbits
+	.section	.rodata.__func__.10674,"a",@progbits
 	.align	3
-	.set	.LANCHOR208,. + 0
-	.type	__func__.10420, %object
-	.size	__func__.10420, 20
-__func__.10420:
+	.set	.LANCHOR216,. + 0
+	.type	__func__.10674, %object
+	.size	__func__.10674, 20
+__func__.10674:
 	.string	"decrement_vpc_count"
-	.section	.rodata.__func__.10488,"a",@progbits
+	.section	.rodata.__func__.10742,"a",@progbits
 	.align	3
-	.set	.LANCHOR242,. + 0
-	.type	__func__.10488, %object
-	.size	__func__.10488, 19
-__func__.10488:
+	.set	.LANCHOR246,. + 0
+	.type	__func__.10742, %object
+	.size	__func__.10742, 19
+__func__.10742:
 	.string	"FtlGcFreeTempBlock"
-	.section	.rodata.__func__.10588,"a",@progbits
+	.section	.rodata.__func__.10843,"a",@progbits
 	.align	3
-	.set	.LANCHOR246,. + 0
-	.type	__func__.10588, %object
-	.size	__func__.10588, 23
-__func__.10588:
-	.string	"rk_ftl_garbage_collect"
-	.section	.rodata.__func__.9395,"a",@progbits
+	.set	.LANCHOR251,. + 0
+	.type	__func__.10843, %object
+	.size	__func__.10843, 10
+__func__.10843:
+	.string	"ftl_do_gc"
+	.section	.rodata.__func__.9622,"a",@progbits
 	.align	3
-	.set	.LANCHOR248,. + 0
-	.type	__func__.9395, %object
-	.size	__func__.9395, 8
-__func__.9395:
+	.set	.LANCHOR255,. + 0
+	.type	__func__.9622, %object
+	.size	__func__.9622, 8
+__func__.9622:
 	.string	"FtlInit"
-	.section	.rodata.__func__.9456,"a",@progbits
-	.align	3
-	.set	.LANCHOR230,. + 0
-	.type	__func__.9456, %object
-	.size	__func__.9456, 13
-__func__.9456:
-	.string	"FtlProgPages"
-	.section	.rodata.__func__.9482,"a",@progbits
+	.section	.rodata.__func__.9726,"a",@progbits
 	.align	3
-	.set	.LANCHOR250,. + 0
-	.type	__func__.9482, %object
-	.size	__func__.9482, 9
-__func__.9482:
+	.set	.LANCHOR258,. + 0
+	.type	__func__.9726, %object
+	.size	__func__.9726, 9
+__func__.9726:
 	.string	"FtlWrite"
-	.section	.rodata.__func__.9565,"a",@progbits
+	.section	.rodata.__func__.9816,"a",@progbits
 	.align	3
-	.set	.LANCHOR124,. + 0
-	.type	__func__.9565, %object
-	.size	__func__.9565, 14
-__func__.9565:
+	.set	.LANCHOR127,. + 0
+	.type	__func__.9816, %object
+	.size	__func__.9816, 14
+__func__.9816:
 	.string	"FtlBbt2Bitmap"
-	.section	.rodata.__func__.9611,"a",@progbits
+	.section	.rodata.__func__.9862,"a",@progbits
 	.align	3
-	.set	.LANCHOR212,. + 0
-	.type	__func__.9611, %object
-	.size	__func__.9611, 11
-__func__.9611:
+	.set	.LANCHOR220,. + 0
+	.type	__func__.9862, %object
+	.size	__func__.9862, 11
+__func__.9862:
 	.string	"FtlLoadBbt"
-	.section	.rodata.__func__.9704,"a",@progbits
+	.section	.rodata.__func__.9955,"a",@progbits
 	.align	3
-	.set	.LANCHOR89,. + 0
-	.type	__func__.9704, %object
-	.size	__func__.9704, 17
-__func__.9704:
+	.set	.LANCHOR91,. + 0
+	.type	__func__.9955, %object
+	.size	__func__.9955, 17
+__func__.9955:
 	.string	"INSERT_FREE_LIST"
-	.section	.rodata.__func__.9708,"a",@progbits
+	.section	.rodata.__func__.9959,"a",@progbits
 	.align	3
-	.set	.LANCHOR86,. + 0
-	.type	__func__.9708, %object
-	.size	__func__.9708, 17
-__func__.9708:
+	.set	.LANCHOR88,. + 0
+	.type	__func__.9959, %object
+	.size	__func__.9959, 17
+__func__.9959:
 	.string	"INSERT_DATA_LIST"
-	.section	.rodata.__func__.9745,"a",@progbits
+	.section	.rodata.__func__.9997,"a",@progbits
 	.align	3
-	.set	.LANCHOR90,. + 0
-	.type	__func__.9745, %object
-	.size	__func__.9745, 17
-__func__.9745:
+	.set	.LANCHOR92,. + 0
+	.type	__func__.9997, %object
+	.size	__func__.9997, 17
+__func__.9997:
 	.string	"List_remove_node"
-	.section	.rodata.__func__.9775,"a",@progbits
-	.align	3
-	.set	.LANCHOR94,. + 0
-	.type	__func__.9775, %object
-	.size	__func__.9775, 22
-__func__.9775:
-	.string	"List_update_data_list"
-	.section	.rodata.__func__.9782,"a",@progbits
-	.align	3
-	.set	.LANCHOR229,. + 0
-	.type	__func__.9782, %object
-	.size	__func__.9782, 20
-__func__.9782:
-	.string	"ftl_load_l2p_region"
-	.section	.rodata.__func__.9813,"a",@progbits
-	.align	3
-	.set	.LANCHOR95,. + 0
-	.type	__func__.9813, %object
-	.size	__func__.9813, 26
-__func__.9813:
-	.string	"ftl_map_blk_alloc_new_blk"
-	.section	.rodata.__func__.9823,"a",@progbits
-	.align	3
-	.set	.LANCHOR213,. + 0
-	.type	__func__.9823, %object
-	.size	__func__.9823, 15
-__func__.9823:
-	.string	"ftl_map_blk_gc"
-	.section	.rodata.__func__.9836,"a",@progbits
-	.align	3
-	.set	.LANCHOR214,. + 0
-	.type	__func__.9836, %object
-	.size	__func__.9836, 31
-__func__.9836:
-	.string	"Ftl_write_map_blk_to_last_page"
-	.section	.rodata.__func__.9849,"a",@progbits
-	.align	3
-	.set	.LANCHOR215,. + 0
-	.type	__func__.9849, %object
-	.size	__func__.9849, 16
-__func__.9849:
-	.string	"FtlMapWritePage"
-	.section	.rodata.__func__.9869,"a",@progbits
-	.align	3
-	.set	.LANCHOR98,. + 0
-	.type	__func__.9869, %object
-	.size	__func__.9869, 22
-__func__.9869:
-	.string	"select_l2p_ram_region"
-	.section	.rodata.__func__.9885,"a",@progbits
-	.align	3
-	.set	.LANCHOR228,. + 0
-	.type	__func__.9885, %object
-	.size	__func__.9885, 9
-__func__.9885:
-	.string	"log2phys"
-	.section	.rodata.__func__.9947,"a",@progbits
-	.align	3
-	.set	.LANCHOR211,. + 0
-	.type	__func__.9947, %object
-	.size	__func__.9947, 15
-__func__.9947:
-	.string	"FtlVpcTblFlush"
-	.section	.rodata.__func__.9966,"a",@progbits
-	.align	3
-	.set	.LANCHOR221,. + 0
-	.type	__func__.9966, %object
-	.size	__func__.9966, 14
-__func__.9966:
-	.string	"FtlScanSysBlk"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",@progbits,1
-.LC36:
+.LC38:
 	.string	"decrement_vpc_count %x = %d\n"
-.LC37:
+.LC39:
 	.string	"decrement_vpc_count %x = %d in free list\n"
 	.section	.rodata.dump_map_info.str1.1,"aMS",@progbits,1
-.LC81:
+.LC86:
 	.string	"phyBlk = %x,addr= %x,spare= %x %x %x %x data=%x %x\n"
-.LC82:
+.LC87:
 	.string	"Mblk:"
-.LC83:
+.LC88:
 	.string	"L2P:"
-.LC84:
+.LC89:
 	.string	"L2PC:"
 	.section	.rodata.ftl_fix_nand_power_lost_error.str1.1,"aMS",@progbits,1
-.LC76:
+.LC81:
 	.string	"fix power lost blk = %x vpc=%x\n"
-.LC77:
+.LC82:
 	.string	"erase power lost blk = %x vpc=%x\n"
 	.section	.rodata.ftl_map_blk_alloc_new_blk.str1.1,"aMS",@progbits,1
 .LC8:
 	.string	"FtlFreeSysBlkQueueOut = %x, free count = %d\n"
 	.section	.rodata.ftl_map_blk_gc.str1.1,"aMS",@progbits,1
-.LC39:
+.LC41:
 	.string	"page map lost: %x %x\n"
 	.section	.rodata.ftl_scan_all_ppa.str1.1,"aMS",@progbits,1
-.LC53:
-	.string	"ftl_scan_all_ppa blk %x page %x\n"
-.LC54:
-	.string	"addr= %x, status= %d,spare= %x %x %x %x data=%x %x\n"
 .LC55:
+	.string	"ftl_scan_all_ppa blk %x page %x flag: %x\n"
+.LC56:
+	.string	"ftl_scan_all_ppa blk %x page %x flag: %x ............... is bad block\n"
+.LC57:
+	.string	"addr= %x, status= %d,spare= %x %x %x %x data=%x %x\n"
+.LC58:
 	.string	"%s finished\n"
 	.section	.rodata.idb_write_data.str1.1,"aMS",@progbits,1
-.LC15:
-	.string	"1 write_idblock fix data %x %x %x\n"
 .LC16:
-	.string	"write_idblock fail! %x %x %x %x\n"
+	.string	"1 write_idblock fix data %x %x %x\n"
 .LC17:
+	.string	"write_idblock fail! %x %x %x %x\n"
+.LC18:
 	.string	"write_idblock fail! %x\n"
 	.section	.rodata.log2phys.str1.1,"aMS",@progbits,1
-.LC57:
+.LC60:
 	.string	"region_id = %x phyAddr = %x\n"
-.LC58:
+.LC61:
 	.string	"map_ppn:"
-.LC59:
+.LC62:
 	.string	"load_l2p_region refresh = %x phyAddr = %x\n"
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",@progbits,1
-.LC75:
+.LC80:
 	.string	"FtlInit %x\n"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
-.LC18:
-	.string	"%s 0x%x:"
 .LC19:
-	.string	"%x "
+	.string	"%s 0x%x:"
 .LC20:
+	.string	"%x "
+.LC21:
 	.string	""
+	.section	.rodata.samsung_14nm_mlc_rr,"a",@progbits
+	.align	3
+	.set	.LANCHOR151,. + 0
+	.type	samsung_14nm_mlc_rr, %object
+	.size	samsung_14nm_mlc_rr, 104
+samsung_14nm_mlc_rr:
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	-4
+	.byte	3
+	.byte	-4
+	.byte	-6
+	.byte	6
+	.byte	0
+	.byte	6
+	.byte	-10
+	.byte	-10
+	.byte	4
+	.byte	-10
+	.byte	16
+	.byte	12
+	.byte	-4
+	.byte	12
+	.byte	8
+	.byte	-16
+	.byte	10
+	.byte	-16
+	.byte	24
+	.byte	18
+	.byte	-14
+	.byte	18
+	.byte	-4
+	.byte	-22
+	.byte	-16
+	.byte	-22
+	.byte	-8
+	.byte	24
+	.byte	-9
+	.byte	24
+	.byte	8
+	.byte	-28
+	.byte	-4
+	.byte	-28
+	.byte	16
+	.byte	30
+	.byte	10
+	.byte	30
+	.byte	10
+	.byte	-34
+	.byte	6
+	.byte	-34
+	.byte	0
+	.byte	36
+	.byte	-8
+	.byte	36
+	.byte	-8
+	.byte	-40
+	.byte	-2
+	.byte	-40
+	.byte	-20
+	.byte	-46
+	.byte	-4
+	.byte	-46
+	.byte	-30
+	.byte	3
+	.byte	0
+	.byte	3
+	.byte	-3
+	.byte	-2
+	.byte	-4
+	.byte	-2
+	.byte	-6
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-10
+	.byte	-6
+	.byte	-8
+	.byte	-6
+	.byte	-14
+	.byte	-9
+	.byte	-8
+	.byte	-9
+	.byte	-18
+	.byte	-52
+	.byte	22
+	.byte	-52
+	.byte	10
+	.byte	42
+	.byte	4
+	.byte	42
+	.byte	4
+	.byte	48
+	.byte	-9
+	.byte	48
+	.byte	4
+	.byte	-58
+	.byte	12
+	.byte	-58
+	.byte	0
+	.byte	-64
+	.byte	-24
+	.byte	-64
+	.byte	-6
+	.byte	9
+	.byte	18
+	.byte	9
+	.byte	8
+	.section	.rodata.samsung_14nm_slc_rr,"a",@progbits
+	.align	3
+	.set	.LANCHOR150,. + 0
+	.type	samsung_14nm_slc_rr, %object
+	.size	samsung_14nm_slc_rr, 26
+samsung_14nm_slc_rr:
+	.byte	0
+	.byte	10
+	.byte	-10
+	.byte	20
+	.byte	-20
+	.byte	30
+	.byte	-30
+	.byte	40
+	.byte	-40
+	.byte	50
+	.byte	-50
+	.byte	60
+	.byte	-60
+	.byte	-70
+	.byte	-80
+	.byte	-90
+	.byte	-100
+	.byte	-110
+	.byte	-120
+	.byte	-9
+	.byte	70
+	.byte	80
+	.byte	90
+	.byte	-125
+	.byte	-115
+	.byte	100
+	.section	.rodata.samsung_read_retrial.str1.1,"aMS",@progbits,1
+.LC14:
+	.string	"samsung RR %d row=%x,count %d,status=%d\n"
 	.hidden	free
diff --git a/drivers/rknand/rk_zftl_arm_v7.S b/drivers/rknand/rk_zftl_arm_v7.S
index 9aec483f1e..ff0bc33715 100644
--- a/drivers/rknand/rk_zftl_arm_v7.S
+++ b/drivers/rknand/rk_zftl_arm_v7.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2019-09-18
+ * date: 2020-11-30
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -127,7 +127,7 @@ _list_remove_node:
 	bne	.L21
 	cmp	r4, r3
 	beq	.L21
-	movs	r2, #188
+	movs	r2, #202
 	ldr	r1, .L26+4
 	ldr	r0, .L26+8
 	bl	printf
@@ -561,7 +561,7 @@ _list_update_data_list:
 	ldrh	r2, [fp, r5]
 	cmp	r2, r3
 	bne	.L84
-	movs	r2, #255
+	movw	r2, #273
 	ldr	r1, .L90+8
 	ldr	r0, .L90+12
 	bl	printf
@@ -642,14 +642,14 @@ zftl_get_gc_node.part.9:
 .L93:
 	.word	.LANCHOR12
 	.size	zftl_get_gc_node.part.9, .-zftl_get_gc_node.part.9
-	.section	.text.nandc_de_cs.constprop.30,"ax",%progbits
+	.section	.text.nandc_de_cs.constprop.33,"ax",%progbits
 	.align	1
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	nandc_de_cs.constprop.30, %function
-nandc_de_cs.constprop.30:
+	.type	nandc_de_cs.constprop.33, %function
+nandc_de_cs.constprop.33:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
@@ -664,7 +664,7 @@ nandc_de_cs.constprop.30:
 	.align	2
 .L96:
 	.word	.LANCHOR13
-	.size	nandc_de_cs.constprop.30, .-nandc_de_cs.constprop.30
+	.size	nandc_de_cs.constprop.33, .-nandc_de_cs.constprop.33
 	.section	.text.nand_flash_print_info,"ax",%progbits
 	.align	1
 	.global	nand_flash_print_info
@@ -678,18 +678,18 @@ nand_flash_print_info:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, lr}
 	sub	sp, sp, #20
-	ldr	r4, .L220
+	ldr	r4, .L216
 	ldr	r3, [r4]
-	lsls	r3, r3, #19
+	lsls	r5, r3, #19
 	bpl	.L99
-	ldr	r1, .L220+4
-	ldr	r0, .L220+8
+	ldr	r1, .L216+4
+	ldr	r0, .L216+8
 	bl	printf
 .L99:
 	ldr	r3, [r4]
-	lsls	r5, r3, #19
+	lsls	r0, r3, #19
 	bpl	.L100
-	ldr	r3, .L220+12
+	ldr	r3, .L216+12
 	ldr	r0, [r3]
 	ldrb	r5, [r0, #6]	@ zero_extendqisi2
 	ldrb	r3, [r0, #3]	@ zero_extendqisi2
@@ -700,271 +700,270 @@ nand_flash_print_info:
 	str	r5, [sp, #4]
 	ldrb	r0, [r0, #4]	@ zero_extendqisi2
 	str	r0, [sp]
-	ldr	r0, .L220+16
+	ldr	r0, .L216+16
 	bl	printf
 .L100:
 	ldr	r3, [r4]
-	lsls	r0, r3, #19
+	lsls	r1, r3, #19
 	bpl	.L101
-	ldr	r3, .L220+12
-	ldr	r0, .L220+20
+	ldr	r3, .L216+12
+	ldr	r0, .L216+20
 	ldr	r3, [r3]
 	ldrb	r1, [r3, #8]	@ zero_extendqisi2
 	bl	printf
 .L101:
 	ldr	r3, [r4]
-	lsls	r1, r3, #19
+	lsls	r2, r3, #19
 	bpl	.L102
-	ldr	r3, .L220+12
-	ldr	r0, .L220+24
+	ldr	r3, .L216+12
+	ldr	r0, .L216+24
 	ldr	r3, [r3]
 	ldrb	r1, [r3, #9]	@ zero_extendqisi2
 	bl	printf
 .L102:
 	ldr	r3, [r4]
-	lsls	r2, r3, #19
+	lsls	r3, r3, #19
 	bpl	.L103
-	ldr	r3, .L220+12
-	ldr	r0, .L220+28
+	ldr	r3, .L216+12
+	ldr	r0, .L216+28
 	ldr	r3, [r3]
 	ldrh	r1, [r3, #10]
 	bl	printf
 .L103:
 	ldr	r3, [r4]
-	lsls	r3, r3, #19
+	lsls	r5, r3, #19
 	bpl	.L104
-	ldr	r3, .L220+12
-	ldr	r0, .L220+32
+	ldr	r3, .L216+12
+	ldr	r0, .L216+32
 	ldr	r3, [r3]
 	ldrb	r1, [r3, #12]	@ zero_extendqisi2
 	bl	printf
 .L104:
 	ldr	r3, [r4]
-	lsls	r5, r3, #19
+	lsls	r0, r3, #19
 	bpl	.L105
-	ldr	r3, .L220+12
-	ldr	r0, .L220+36
+	ldr	r3, .L216+12
+	ldr	r0, .L216+36
 	ldr	r3, [r3]
 	ldrb	r1, [r3, #13]	@ zero_extendqisi2
 	bl	printf
 .L105:
 	ldr	r3, [r4]
-	lsls	r0, r3, #19
+	lsls	r1, r3, #19
 	bpl	.L106
-	ldr	r3, .L220+12
-	ldr	r0, .L220+40
+	ldr	r3, .L216+12
+	ldr	r0, .L216+40
 	ldr	r3, [r3]
 	ldrh	r1, [r3, #14]
 	bl	printf
 .L106:
 	ldr	r3, [r4]
-	lsls	r1, r3, #19
+	lsls	r2, r3, #19
 	bpl	.L107
-	ldr	r3, .L220+12
-	ldr	r0, .L220+44
+	ldr	r3, .L216+12
+	ldr	r0, .L216+44
 	ldr	r3, [r3]
 	ldrb	r1, [r3, #23]	@ zero_extendqisi2
 	bl	printf
 .L107:
 	ldr	r3, [r4]
-	lsls	r2, r3, #19
+	lsls	r3, r3, #19
 	bpl	.L108
-	ldr	r3, .L220+12
-	ldr	r0, .L220+48
+	ldr	r3, .L216+12
+	ldr	r0, .L216+48
 	ldr	r3, [r3]
 	ldrb	r1, [r3, #18]	@ zero_extendqisi2
 	bl	printf
 .L108:
 	ldr	r3, [r4]
-	lsls	r3, r3, #19
+	lsls	r5, r3, #19
 	bpl	.L109
-	ldr	r3, .L220+12
-	ldr	r0, .L220+52
+	ldr	r3, .L216+12
+	ldr	r0, .L216+52
 	ldr	r3, [r3]
 	ldrb	r1, [r3, #19]	@ zero_extendqisi2
 	bl	printf
 .L109:
 	ldr	r3, [r4]
-	lsls	r5, r3, #19
+	lsls	r0, r3, #19
 	bpl	.L110
-	ldr	r3, .L220+12
-	ldr	r0, .L220+56
+	ldr	r3, .L216+12
+	ldr	r0, .L216+56
 	ldr	r3, [r3]
 	ldrb	r1, [r3, #20]	@ zero_extendqisi2
 	bl	printf
 .L110:
 	ldr	r3, [r4]
-	lsls	r0, r3, #19
+	lsls	r1, r3, #19
 	bpl	.L111
-	ldr	r3, .L220+60
-	ldr	r0, .L220+64
+	ldr	r3, .L216+60
+	ldr	r0, .L216+64
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	bl	printf
 .L111:
-	ldr	r3, [r4]
-	lsls	r1, r3, #19
-	bpl	.L112
-	ldr	r3, .L220+68
-	ldr	r0, .L220+72
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	bl	printf
-.L112:
 	ldr	r3, [r4]
 	lsls	r2, r3, #19
-	bpl	.L113
-	ldr	r3, .L220+12
-	ldr	r0, .L220+76
+	bpl	.L112
+	ldr	r3, .L216+12
+	ldr	r0, .L216+68
 	ldr	r3, [r3]
 	ldrb	r1, [r3, #22]	@ zero_extendqisi2
 	bl	printf
-.L113:
+.L112:
 	ldr	r3, [r4]
 	lsls	r3, r3, #19
-	bpl	.L114
-	ldr	r3, .L220+80
-	ldr	r0, .L220+84
+	bpl	.L113
+	ldr	r3, .L216+72
+	ldr	r0, .L216+76
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	bl	printf
-.L114:
+.L113:
 	ldr	r3, [r4]
 	lsls	r5, r3, #19
-	bpl	.L115
-	ldr	r3, .L220+12
-	ldr	r0, .L220+88
+	bpl	.L114
+	ldr	r3, .L216+12
+	ldr	r0, .L216+80
 	ldr	r3, [r3]
 	ldrb	r1, [r3, #16]	@ zero_extendqisi2
 	and	r1, r1, #1
 	bl	printf
-.L115:
+.L114:
 	ldr	r3, [r4]
 	lsls	r0, r3, #19
-	bpl	.L116
-	ldr	r3, .L220+12
-	ldr	r0, .L220+92
+	bpl	.L115
+	ldr	r3, .L216+12
+	ldr	r0, .L216+84
 	ldr	r3, [r3]
 	ldrh	r1, [r3, #16]
 	ubfx	r1, r1, #1, #1
 	bl	printf
-.L116:
+.L115:
 	ldr	r3, [r4]
 	lsls	r1, r3, #19
-	bpl	.L117
-	ldr	r3, .L220+12
-	ldr	r0, .L220+96
+	bpl	.L116
+	ldr	r3, .L216+12
+	ldr	r0, .L216+88
 	ldr	r3, [r3]
 	ldrh	r1, [r3, #16]
 	ubfx	r1, r1, #2, #1
 	bl	printf
-.L117:
+.L116:
 	ldr	r3, [r4]
 	lsls	r2, r3, #19
-	bpl	.L118
-	ldr	r3, .L220+12
-	ldr	r0, .L220+100
+	bpl	.L117
+	ldr	r3, .L216+12
+	ldr	r0, .L216+92
 	ldr	r3, [r3]
 	ldrh	r1, [r3, #16]
 	ubfx	r1, r1, #3, #1
 	bl	printf
-.L118:
+.L117:
 	ldr	r3, [r4]
 	lsls	r3, r3, #19
-	bpl	.L119
-	ldr	r3, .L220+12
-	ldr	r0, .L220+104
+	bpl	.L118
+	ldr	r3, .L216+12
+	ldr	r0, .L216+96
 	ldr	r3, [r3]
 	ldrh	r1, [r3, #16]
 	ubfx	r1, r1, #4, #1
 	bl	printf
-.L119:
+.L118:
 	ldr	r3, [r4]
 	lsls	r5, r3, #19
-	bpl	.L120
-	ldr	r3, .L220+12
-	ldr	r0, .L220+108
+	bpl	.L119
+	ldr	r3, .L216+12
+	ldr	r0, .L216+100
 	ldr	r3, [r3]
 	ldrh	r1, [r3, #16]
 	ubfx	r1, r1, #5, #1
 	bl	printf
-.L120:
+.L119:
 	ldr	r3, [r4]
 	lsls	r0, r3, #19
-	bpl	.L121
-	ldr	r3, .L220+12
-	ldr	r0, .L220+112
+	bpl	.L120
+	ldr	r3, .L216+12
+	ldr	r0, .L216+104
 	ldr	r3, [r3]
 	ldrh	r1, [r3, #16]
 	ubfx	r1, r1, #6, #1
 	bl	printf
-.L121:
+.L120:
 	ldr	r3, [r4]
 	lsls	r1, r3, #19
-	bpl	.L122
-	ldr	r3, .L220+12
-	ldr	r0, .L220+116
+	bpl	.L121
+	ldr	r3, .L216+12
+	ldr	r0, .L216+108
 	ldr	r3, [r3]
 	ldrh	r1, [r3, #16]
 	ubfx	r1, r1, #7, #1
 	bl	printf
-.L122:
+.L121:
 	ldr	r3, [r4]
 	lsls	r2, r3, #19
-	bpl	.L123
-	ldr	r3, .L220+12
-	ldr	r0, .L220+120
+	bpl	.L122
+	ldr	r3, .L216+12
+	ldr	r0, .L216+112
 	ldr	r3, [r3]
 	ldrh	r1, [r3, #16]
 	ubfx	r1, r1, #8, #1
 	bl	printf
-.L123:
+.L122:
 	ldr	r3, [r4]
 	lsls	r3, r3, #19
-	bpl	.L124
-	ldr	r3, .L220+12
-	ldr	r0, .L220+124
+	bpl	.L123
+	ldr	r3, .L216+12
+	ldr	r0, .L216+116
 	ldr	r3, [r3]
 	ldrh	r1, [r3, #16]
 	ubfx	r1, r1, #9, #1
 	bl	printf
-.L124:
+.L123:
 	ldr	r3, [r4]
 	lsls	r5, r3, #19
-	bpl	.L125
-	ldr	r3, .L220+12
-	ldr	r0, .L220+128
+	bpl	.L124
+	ldr	r3, .L216+12
+	ldr	r0, .L216+120
 	ldr	r3, [r3]
 	ldrh	r1, [r3, #16]
 	ubfx	r1, r1, #10, #1
 	bl	printf
-.L125:
+.L124:
 	ldr	r3, [r4]
 	lsls	r0, r3, #19
-	bpl	.L126
-	ldr	r3, .L220+132
-	ldr	r0, .L220+136
+	bpl	.L125
+	ldr	r3, .L216+124
+	ldr	r0, .L216+128
 	ldrb	r2, [r3]	@ zero_extendqisi2
-	ldr	r3, .L220+68
+	ldr	r3, .L216+132
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	bl	printf
-.L126:
+.L125:
 	ldr	r3, [r4]
 	lsls	r1, r3, #19
-	bpl	.L127
-	ldr	r3, .L220+140
-	ldr	r0, .L220+144
+	bpl	.L126
+	ldr	r3, .L216+136
+	ldr	r0, .L216+140
 	ldrb	r2, [r3, #11]	@ zero_extendqisi2
 	ldrb	r1, [r3, #10]	@ zero_extendqisi2
 	bl	printf
-.L127:
+.L126:
 	ldr	r3, [r4]
 	lsls	r2, r3, #19
-	bpl	.L128
-	ldr	r3, .L220+140
-	ldr	r0, .L220+148
+	bpl	.L127
+	ldr	r3, .L216+136
+	ldr	r0, .L216+144
 	ldrb	r2, [r3, #9]	@ zero_extendqisi2
-	b	.L221
-.L222:
+	ldrb	r1, [r3, #8]	@ zero_extendqisi2
+	bl	printf
+.L127:
+	ldr	r3, [r4]
+	lsls	r3, r3, #19
+	bpl	.L98
+	ldr	r3, .L216+148
+	b	.L217
+.L218:
 	.align	2
-.L220:
+.L216:
 	.word	.LANCHOR14
 	.word	.LANCHOR15
 	.word	.LC1
@@ -982,10 +981,9 @@ nand_flash_print_info:
 	.word	.LC12
 	.word	.LANCHOR17
 	.word	.LC13
-	.word	.LANCHOR0
 	.word	.LC14
-	.word	.LC15
 	.word	.LANCHOR18
+	.word	.LC15
 	.word	.LC16
 	.word	.LC17
 	.word	.LC18
@@ -997,21 +995,15 @@ nand_flash_print_info:
 	.word	.LC24
 	.word	.LC25
 	.word	.LC26
-	.word	.LC27
 	.word	.LANCHOR19
-	.word	.LC28
+	.word	.LC27
+	.word	.LANCHOR0
 	.word	.LANCHOR20
+	.word	.LC28
 	.word	.LC29
-	.word	.LC30
-.L221:
-	ldrb	r1, [r3, #8]	@ zero_extendqisi2
-	bl	printf
-.L128:
-	ldr	r3, [r4]
-	lsls	r3, r3, #19
-	bpl	.L98
-	ldr	r3, .L223
-	ldr	r0, .L223+4
+	.word	.LANCHOR21
+.L217:
+	ldr	r0, .L219
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	add	sp, sp, #20
 	@ sp needed
@@ -1021,11 +1013,10 @@ nand_flash_print_info:
 	add	sp, sp, #20
 	@ sp needed
 	pop	{r4, r5, pc}
-.L224:
+.L220:
 	.align	2
-.L223:
-	.word	.LANCHOR21
-	.word	.LC31
+.L219:
+	.word	.LC30
 	.size	nand_flash_print_info, .-nand_flash_print_info
 	.section	.text.timer_delay_ns,"ax",%progbits
 	.align	1
@@ -1042,12 +1033,12 @@ timer_delay_ns:
 	lsrs	r0, r0, #4
 	sub	sp, sp, #8
 	str	r0, [sp, #4]
-.L226:
+.L222:
 	ldr	r3, [sp, #4]
 	subs	r2, r3, #1
 	str	r2, [sp, #4]
 	cmp	r3, #0
-	bne	.L226
+	bne	.L222
 	add	sp, sp, #8
 	@ sp needed
 	bx	lr
@@ -1086,48 +1077,48 @@ toshiba_set_rr_para:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	add	r6, r1, r1, lsl #2
-	ldr	r8, .L237+16
+	ldr	r8, .L233+16
 	mov	r5, r0
 	movs	r4, #0
-	ldr	r7, .L237
-.L230:
+	ldr	r7, .L233
+.L226:
 	ldrb	r3, [r8]	@ zero_extendqisi2
 	cmp	r4, r3
-	bcc	.L234
+	bcc	.L230
 	pop	{r4, r5, r6, r7, r8, pc}
-.L234:
+.L230:
 	movs	r3, #85
 	movs	r0, #200
 	str	r3, [r5, #8]
 	ldrsb	r3, [r4, r7]
 	str	r3, [r5, #4]
 	bl	timer_delay_ns
-	ldr	r3, .L237+4
+	ldr	r3, .L233+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #34
-	bne	.L231
+	bne	.L227
 	adds	r3, r4, r6
 	add	r3, r3, r7
-.L236:
+.L232:
 	ldrsb	r3, [r3, #5]
-.L235:
+.L231:
 	str	r3, [r5]
 	adds	r4, r4, #1
-	b	.L230
-.L231:
+	b	.L226
+.L227:
 	cmp	r3, #35
-	bne	.L233
-	ldr	r3, .L237+8
+	bne	.L229
+	ldr	r3, .L233+8
 	adds	r2, r4, r6
 	add	r3, r3, r2
-	b	.L236
-.L233:
-	ldr	r3, .L237+12
+	b	.L232
+.L229:
+	ldr	r3, .L233+12
 	ldrsb	r3, [r3, r1]
-	b	.L235
-.L238:
+	b	.L231
+.L234:
 	.align	2
-.L237:
+.L233:
 	.word	.LANCHOR22
 	.word	.LANCHOR23
 	.word	.LANCHOR24
@@ -1144,10 +1135,10 @@ toshiba_set_rr_para:
 hynix_set_rr_para:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L244
+	ldr	r3, .L240
 	push	{r4, r5, r6, r7, r8, lr}
 	lsls	r6, r0, #8
-	ldr	r4, .L244+4
+	ldr	r4, .L240+4
 	ldr	r3, [r3]
 	ldr	r7, [r4]
 	ldrb	r2, [r3, #113]	@ zero_extendqisi2
@@ -1169,24 +1160,24 @@ hynix_set_rr_para:
 	adds	r4, r7, r6
 	subs	r1, r1, #1
 	str	r0, [r4, #2056]
-.L242:
+.L238:
 	cmp	r5, r8
-	bne	.L243
+	bne	.L239
 	add	r6, r6, r7
 	movs	r3, #22
 	str	r3, [r6, #2056]
 	pop	{r4, r5, r6, r7, r8, pc}
-.L243:
+.L239:
 	ldrb	r3, [r5, #1]!	@ zero_extendqisi2
 	movs	r0, #120
 	str	r3, [r4, #2052]
 	bl	timer_delay_ns
 	ldrsb	r3, [r1, #1]!
 	str	r3, [r4, #2048]
-	b	.L242
-.L245:
+	b	.L238
+.L241:
 	.align	2
-.L244:
+.L240:
 	.word	.LANCHOR27
 	.word	.LANCHOR13
 	.size	hynix_set_rr_para, .-hynix_set_rr_para
@@ -1203,27 +1194,27 @@ hynix_reconfig_rr_para:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	mov	r4, r0
-	ldr	r3, .L251
+	ldr	r3, .L247
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	cmp	r3, #7
-	bhi	.L246
-	ldr	r5, .L251+4
+	bhi	.L242
+	ldr	r5, .L247+4
 	ldr	r3, [r5]
 	add	r3, r3, r0
 	ldrb	r3, [r3, #120]	@ zero_extendqisi2
-	cbz	r3, .L246
+	cbz	r3, .L242
 	movs	r1, #0
 	bl	hynix_set_rr_para
 	ldr	r0, [r5]
 	movs	r3, #0
 	add	r0, r0, r4
 	strb	r3, [r0, #120]
-.L246:
+.L242:
 	pop	{r3, r4, r5, pc}
-.L252:
+.L248:
 	.align	2
-.L251:
+.L247:
 	.word	.LANCHOR23
 	.word	.LANCHOR27
 	.size	hynix_reconfig_rr_para, .-hynix_reconfig_rr_para
@@ -1239,8 +1230,8 @@ nandc_set_ddr_para:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L256
-	ldr	r2, .L256+4
+	ldr	r3, .L252
+	ldr	r2, .L252+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	ldr	r2, [r2]
 	cmp	r3, #9
@@ -1252,9 +1243,9 @@ nandc_set_ddr_para:
 	streq	r3, [r2, #80]
 	strne	r3, [r2, #304]
 	bx	lr
-.L257:
+.L253:
 	.align	2
-.L256:
+.L252:
 	.word	.LANCHOR28
 	.word	.LANCHOR13
 	.size	nandc_set_ddr_para, .-nandc_set_ddr_para
@@ -1270,19 +1261,19 @@ nandc_get_ddr_para:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L262
+	ldr	r3, .L258
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #9
-	ldr	r3, .L262+4
+	ldr	r3, .L258+4
 	ldr	r3, [r3]
 	ite	eq
 	ldreq	r0, [r3, #80]
 	ldrne	r0, [r3, #304]
 	ubfx	r0, r0, #8, #8
 	bx	lr
-.L263:
+.L259:
 	.align	2
-.L262:
+.L258:
 	.word	.LANCHOR28
 	.word	.LANCHOR13
 	.size	nandc_get_ddr_para, .-nandc_get_ddr_para
@@ -1298,13 +1289,13 @@ nandc_set_if_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L272
+	ldr	r3, .L268
 	ands	r1, r0, #6
 	ldr	r3, [r3]
 	ldr	r2, [r3]
-	beq	.L265
+	beq	.L261
 	lsls	r1, r0, #29
-	ldr	r1, .L272+4
+	ldr	r1, .L268+4
 	orr	r2, r2, #24576
 	bfc	r2, #15, #1
 	ldrb	r1, [r1]	@ zero_extendqisi2
@@ -1312,8 +1303,8 @@ nandc_set_if_mode:
 	it	mi
 	orrmi	r2, r2, #32768
 	cmp	r1, #9
-	ldr	r1, .L272+8
-	bne	.L267
+	ldr	r1, .L268+8
+	bne	.L263
 	movw	r0, #8321
 	str	r0, [r3, #8]
 	str	r1, [r3, #80]
@@ -1321,10 +1312,10 @@ nandc_set_if_mode:
 	str	r1, [r3, #84]
 	movs	r1, #39
 	str	r1, [r3, #84]
-.L268:
+.L264:
 	str	r2, [r3]
 	bx	lr
-.L267:
+.L263:
 	movw	r0, #8322
 	str	r0, [r3, #344]
 	str	r1, [r3, #304]
@@ -1332,13 +1323,13 @@ nandc_set_if_mode:
 	str	r1, [r3, #308]
 	movs	r1, #39
 	str	r1, [r3, #308]
-	b	.L268
-.L265:
+	b	.L264
+.L261:
 	bfi	r2, r1, #13, #1
-	b	.L268
-.L273:
+	b	.L264
+.L269:
 	.align	2
-.L272:
+.L268:
 	.word	.LANCHOR13
 	.word	.LANCHOR28
 	.word	1052675
@@ -1355,7 +1346,7 @@ nandc_cs:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L275
+	ldr	r3, .L271
 	movs	r2, #1
 	lsl	r0, r2, r0
 	ldr	r1, [r3]
@@ -1363,9 +1354,9 @@ nandc_cs:
 	bfi	r3, r0, #0, #8
 	str	r3, [r1]
 	bx	lr
-.L276:
+.L272:
 	.align	2
-.L275:
+.L271:
 	.word	.LANCHOR13
 	.size	nandc_cs, .-nandc_cs
 	.section	.text.flash_wait_device_ready_raw,"ax",%progbits
@@ -1380,43 +1371,50 @@ flash_wait_device_ready_raw:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	ldr	r3, .L283
-	push	{r4, r5, r6, r7, r8, lr}
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	mov	r5, r1
-	mov	r6, r2
+	mov	fp, r2
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r0
-	bhi	.L278
-	movw	r2, #691
+	bhi	.L274
+	movw	r2, #805
 	ldr	r1, .L283+4
 	ldr	r0, .L283+8
 	bl	printf
-.L278:
+.L274:
 	ldr	r3, .L283+12
-	lsrs	r7, r5, #16
-	ldrb	r8, [r3, r4]	@ zero_extendqisi2
+	lsrs	r7, r5, #8
+	lsr	r8, r5, #16
+	lsr	r10, r5, #24
+	ldrb	r6, [r3, r4]	@ zero_extendqisi2
 	ldr	r3, .L283+16
-	mov	r0, r8
 	ldr	r4, [r3]
+	add	r4, r4, r6, lsl #8
+.L280:
+	mov	r0, r6
 	bl	nandc_cs
-	lsrs	r1, r5, #8
-	uxtb	r5, r5
-	add	r4, r4, r8, lsl #8
-.L281:
-	movs	r0, #120
-	str	r0, [r4, #2056]
-	str	r5, [r4, #2052]
-	str	r1, [r4, #2052]
+	movs	r3, #120
+	str	r3, [r4, #2056]
+	uxtb	r3, r5
+	str	r3, [r4, #2052]
+	ldr	r3, .L283+20
 	str	r7, [r4, #2052]
+	str	r8, [r4, #2052]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L275
+	str	r10, [r4, #2052]
+.L275:
+	movs	r0, #120
 	bl	timer_delay_ns
 	ldr	r0, [r4, #2048]
 	uxtb	r0, r0
-	bics	r3, r6, r0
-	bne	.L281
+	bl	nandc_de_cs.constprop.33
+	bics	r3, fp, r0
+	bne	.L280
 	cmp	r0, #255
-	beq	.L281
-	bl	nandc_de_cs.constprop.30
-	pop	{r4, r5, r6, r7, r8, pc}
+	beq	.L280
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
 .L284:
 	.align	2
 .L283:
@@ -1425,6 +1423,7 @@ flash_wait_device_ready_raw:
 	.word	.LC0
 	.word	.LANCHOR30
 	.word	.LANCHOR13
+	.word	.LANCHOR31
 	.size	flash_wait_device_ready_raw, .-flash_wait_device_ready_raw
 	.section	.text.flash_wait_device_ready,"ax",%progbits
 	.align	1
@@ -1486,7 +1485,7 @@ flash_wait_device_ready:
 .L296:
 	.align	2
 .L295:
-	.word	.LANCHOR31
+	.word	.LANCHOR32
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.word	.LANCHOR3
@@ -1566,45 +1565,56 @@ nandc_wait_flash_ready_no_delay:
 zftl_flash_enter_slc_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L328
-	push	{r4, lr}
+	ldr	r3, .L327
+	push	{r4, r5, r6, lr}
+	mov	r6, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #0
-	beq	.L307
-	ldr	r2, .L328+4
+	cbz	r3, .L307
+	ldr	r2, .L327+4
 	cmp	r3, #1
 	ldr	r4, [r2]
 	bne	.L310
-.L327:
-	ldr	r3, .L328+8
+	ldr	r3, .L327+8
 	ldrb	r3, [r3, #29]	@ zero_extendqisi2
 	cbz	r3, .L307
-	add	r4, r4, r0, lsl #8
+.L326:
+	add	r4, r4, r6, lsl #8
+.L325:
 	str	r3, [r4, #2056]
-	pop	{r4, pc}
+.L307:
+	pop	{r4, r5, r6, pc}
 .L310:
 	cmp	r3, #2
 	bne	.L312
-	ldr	r3, .L328+12
+	ldr	r3, .L327+12
 	ldrb	r2, [r3, r0]	@ zero_extendqisi2
-	cbz	r2, .L307
+	cmp	r2, #0
+	beq	.L307
+	ldr	r5, .L327+8
 	movs	r2, #0
 	strb	r2, [r3, r0]
-	b	.L327
+	ldrb	r3, [r5, #29]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L307
+	bl	nandc_wait_flash_ready_no_delay
+	ldrb	r3, [r5, #29]	@ zero_extendqisi2
+	b	.L326
 .L312:
 	cmp	r3, #3
 	bne	.L307
-	ldr	r3, .L328+12
-	ldrb	r2, [r3, r0]	@ zero_extendqisi2
-	cbz	r2, .L307
-	add	r4, r4, r0, lsl #8
-	movs	r1, #0
-	strb	r1, [r3, r0]
+	ldr	r5, .L327+12
+	ldrb	r3, [r5, r0]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L307
+	add	r4, r4, r6, lsl #8
+	bl	nandc_wait_flash_ready_no_delay
 	movs	r3, #239
+	movs	r1, #0
 	str	r3, [r4, #2056]
 	movs	r3, #145
 	str	r3, [r4, #2052]
-	movs	r0, #50
+	movs	r0, #100
+	strb	r1, [r5, r6]
 	bl	timer_delay_ns
 	movs	r3, #1
 	str	r1, [r4, #2048]
@@ -1615,20 +1625,14 @@ zftl_flash_enter_slc_mode:
 	bl	timer_delay_ns
 	bl	nandc_wait_flash_ready_no_delay
 	movs	r3, #218
-	movs	r0, #150
-	str	r3, [r4, #2056]
-	bl	timer_delay_ns
-	pop	{r4, lr}
-	b	nandc_wait_flash_ready_no_delay
-.L307:
-	pop	{r4, pc}
-.L329:
-	.align	2
+	b	.L325
 .L328:
+	.align	2
+.L327:
 	.word	.LANCHOR0
 	.word	.LANCHOR13
-	.word	.LANCHOR32
 	.word	.LANCHOR33
+	.word	.LANCHOR34
 	.size	zftl_flash_enter_slc_mode, .-zftl_flash_enter_slc_mode
 	.section	.text.zftl_flash_exit_slc_mode,"ax",%progbits
 	.align	1
@@ -1641,89 +1645,89 @@ zftl_flash_enter_slc_mode:
 zftl_flash_exit_slc_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L353
-	mov	r1, r0
+	ldr	r3, .L350
 	push	{r4, r5, r6, r7, r8, lr}
+	mov	r4, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L330
-	ldr	r2, .L353+4
+	beq	.L329
+	ldr	r2, .L350+4
 	cmp	r3, #1
 	ldr	r5, [r2]
-	bne	.L333
-	ldr	r3, .L353+8
+	bne	.L332
+	ldr	r3, .L350+8
 	ldrb	r3, [r3, #30]	@ zero_extendqisi2
-.L352:
 	cmp	r3, #0
-	beq	.L330
-	add	r1, r5, r1, lsl #8
-	str	r3, [r1, #2056]
+	beq	.L329
+.L349:
+	add	r4, r5, r4, lsl #8
+	str	r3, [r4, #2056]
 	pop	{r4, r5, r6, r7, r8, pc}
-.L333:
+.L332:
 	cmp	r3, #2
-	bne	.L335
-	ldr	r0, .L353+12
-	ldrb	r3, [r0, r1]	@ zero_extendqisi2
+	bne	.L334
+	ldr	r2, .L350+12
+	ldrb	r3, [r2, r0]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L330
-	ldr	r2, .L353+8
-	ldrb	r3, [r2, #12]	@ zero_extendqisi2
+	bne	.L329
+	ldr	r6, .L350+8
+	ldrb	r3, [r6, #12]	@ zero_extendqisi2
 	cmp	r3, #2
 	it	ne
 	movne	r3, #4
-	strb	r3, [r0, r1]
-	ldrb	r3, [r2, #30]	@ zero_extendqisi2
-	b	.L352
-.L335:
+	strb	r3, [r2, r0]
+	ldrb	r3, [r6, #30]	@ zero_extendqisi2
+	cbz	r3, .L329
+	bl	nandc_wait_flash_ready_no_delay
+	ldrb	r3, [r6, #30]	@ zero_extendqisi2
+	b	.L349
+.L334:
 	cmp	r3, #3
-	bne	.L330
-	ldr	r6, .L353+12
+	bne	.L329
+	ldr	r6, .L350+12
 	ldrb	r3, [r6, r0]	@ zero_extendqisi2
-	cbnz	r3, .L330
-	ldr	r8, .L353+8
-	lsls	r7, r0, #8
-	adds	r4, r5, r7
-	add	r5, r5, r7
+	cbnz	r3, .L329
+	ldr	r8, .L350+8
+	lsls	r7, r4, #8
+	bl	nandc_wait_flash_ready_no_delay
 	ldrb	r3, [r8, #12]	@ zero_extendqisi2
+	adds	r1, r5, r7
+	movs	r0, #100
+	add	r5, r5, r7
 	cmp	r3, #2
 	it	ne
 	movne	r3, #4
-	strb	r3, [r6, r0]
+	strb	r3, [r6, r4]
 	movs	r3, #239
-	str	r3, [r4, #2056]
+	str	r3, [r1, #2056]
 	movs	r3, #145
-	str	r3, [r4, #2052]
-	movs	r0, #50
+	str	r3, [r1, #2052]
 	bl	timer_delay_ns
 	ldrb	r3, [r8, #7]	@ zero_extendqisi2
 	movs	r0, #150
 	cmp	r3, #9
 	mov	r3, #1
 	itet	ne
-	ldrbne	r2, [r6, r1]	@ zero_extendqisi2
-	streq	r3, [r4, #2048]
-	strne	r2, [r4, #2048]
-	str	r3, [r4, #2048]
+	ldrbne	r2, [r6, r4]	@ zero_extendqisi2
+	streq	r3, [r1, #2048]
+	strne	r2, [r1, #2048]
+	str	r3, [r1, #2048]
 	movs	r3, #0
-	str	r3, [r4, #2048]
-	str	r3, [r4, #2048]
+	str	r3, [r1, #2048]
+	str	r3, [r1, #2048]
 	bl	timer_delay_ns
 	bl	nandc_wait_flash_ready_no_delay
 	movs	r3, #223
-	movs	r0, #150
 	str	r3, [r5, #2056]
-	bl	timer_delay_ns
-	pop	{r4, r5, r6, r7, r8, lr}
-	b	nandc_wait_flash_ready_no_delay
-.L330:
+.L329:
 	pop	{r4, r5, r6, r7, r8, pc}
-.L354:
+.L351:
 	.align	2
-.L353:
+.L350:
 	.word	.LANCHOR0
 	.word	.LANCHOR13
-	.word	.LANCHOR32
 	.word	.LANCHOR33
+	.word	.LANCHOR34
 	.size	zftl_flash_exit_slc_mode, .-zftl_flash_exit_slc_mode
 	.section	.text.flash_start_page_read,"ax",%progbits
 	.align	1
@@ -1736,11 +1740,11 @@ zftl_flash_exit_slc_mode:
 flash_start_page_read:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	mov	r6, r0
-	ldr	r3, .L364
-	mov	r10, r1
-	ldr	r4, .L364+4
+	ldr	r3, .L366
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r5, r0
+	ldr	r4, .L366+4
+	mov	fp, r1
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	movs	r3, #1
 	rsb	r7, r2, #24
@@ -1751,82 +1755,103 @@ flash_start_page_read:
 	ldrb	r2, [r4]	@ zero_extendqisi2
 	uxtb	r8, r3
 	cmp	r2, r8
-	bhi	.L356
-	movw	r2, #866
-	ldr	r1, .L364+8
-	ldr	r0, .L364+12
+	bhi	.L353
+	movw	r2, #1001
+	ldr	r1, .L366+8
+	ldr	r0, .L366+12
 	bl	printf
-.L356:
+.L353:
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	cmp	r3, r8
-	bls	.L355
-	ldr	r3, .L364+16
+	bls	.L352
+	ldr	r3, .L366+16
 	movs	r4, #1
 	lsls	r4, r4, r7
-	ldrb	r7, [r3, r8]	@ zero_extendqisi2
+	ldr	r6, .L366+20
+	ldrb	r10, [r3, r8]	@ zero_extendqisi2
 	subs	r4, r4, #1
-	ldr	r3, .L364+20
-	and	r4, r4, r10
-	ubfx	r10, r10, #24, #2
-	mov	r0, r7
-	ldr	r5, [r3]
-	lsl	r8, r7, #8
+	ldr	r3, .L366+24
+	and	r4, r4, fp
+	ubfx	fp, fp, #24, #2
+	mov	r0, r10
+	ldr	r7, [r3]
+	lsl	r8, r10, #8
 	bl	nandc_cs
-	cmp	r10, #0
-	bne	.L358
+	cmp	fp, #0
+	bne	.L355
 	mov	r0, r4
 	bl	slc_phy_page_address_calc
-	ldr	r3, .L364+24
+	ldr	r3, .L366+28
 	mov	r4, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L359
-	mov	r0, r7
+	cbz	r3, .L356
+	mov	r0, r10
 	bl	zftl_flash_enter_slc_mode
-.L359:
-	add	r3, r5, r8
-	movs	r2, #0
-	str	r2, [r3, #2056]
-	str	r2, [r3, #2052]
-	str	r2, [r3, #2052]
-	uxtb	r2, r4
-	str	r2, [r3, #2052]
-	lsrs	r2, r4, #8
-	lsrs	r4, r4, #16
+.L356:
+	ldr	r3, [r6]
+	ldrb	r2, [r3, #7]	@ zero_extendqisi2
+	cmp	r2, #1
+	bne	.L358
+	ldrb	r3, [r3, #12]	@ zero_extendqisi2
+	cmp	r3, #2
+	ittt	eq
+	addeq	r3, r7, r8
+	moveq	r2, #38
+	streq	r2, [r3, #2056]
+.L358:
+	add	r3, r7, r8
+	movs	r2, #0
+	str	r2, [r3, #2056]
+	str	r2, [r3, #2052]
+	str	r2, [r3, #2052]
+	uxtb	r2, r4
+	str	r2, [r3, #2052]
+	lsrs	r2, r4, #8
 	str	r2, [r3, #2052]
+	lsrs	r2, r4, #16
+	str	r2, [r3, #2052]
+	ldr	r2, .L366+32
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbz	r2, .L359
+	lsrs	r4, r4, #24
 	str	r4, [r3, #2052]
-	str	r6, [r3, #2056]
-	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
-	b	nandc_de_cs.constprop.30
-.L358:
-	ldr	r3, .L364+28
-	ldr	r3, [r3]
+.L359:
+	add	r3, r7, r8
+	str	r5, [r3, #2056]
+.L352:
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L355:
+	ldr	r3, [r6]
 	ldrb	r3, [r3, #12]	@ zero_extendqisi2
 	cmp	r3, #3
-	bne	.L360
-	ldr	r3, .L364+32
+	bne	.L357
+	ldr	r3, .L366+36
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L360
-	add	r3, r5, r8
-	str	r10, [r3, #2056]
-	b	.L359
-.L360:
-	mov	r0, r7
+	cbnz	r3, .L357
+	ldr	r3, .L366+40
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L357
+	add	r3, r7, r8
+	str	fp, [r3, #2056]
+	b	.L356
+.L357:
+	mov	r0, r10
 	bl	zftl_flash_exit_slc_mode
-	b	.L359
-.L355:
-	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L365:
+	b	.L356
+.L367:
 	.align	2
-.L364:
-	.word	.LANCHOR31
+.L366:
+	.word	.LANCHOR32
 	.word	.LANCHOR18
-	.word	.LANCHOR34
+	.word	.LANCHOR35
 	.word	.LC0
 	.word	.LANCHOR30
+	.word	.LANCHOR16
 	.word	.LANCHOR13
 	.word	.LANCHOR0
-	.word	.LANCHOR16
-	.word	.LANCHOR35
+	.word	.LANCHOR31
+	.word	.LANCHOR36
+	.word	.LANCHOR37
 	.size	flash_start_page_read, .-flash_start_page_read
 	.section	.text.nandc_wait_flash_ready,"ax",%progbits
 	.align	1
@@ -1842,30 +1867,30 @@ nandc_wait_flash_ready:
 	push	{r0, r1, r4, lr}
 	movs	r0, #150
 	bl	timer_delay_ns
-	ldr	r4, .L371
-	ldr	r1, .L371+4
-.L368:
+	ldr	r4, .L373
+	ldr	r1, .L373+4
+.L370:
 	ldr	r3, [r4]
 	ldr	r3, [r3]
 	str	r3, [sp, #4]
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #22
-	bmi	.L369
+	bmi	.L371
 	movs	r0, #10
 	bl	timer_delay_ns
 	subs	r1, r1, #1
-	bne	.L368
+	bne	.L370
 	mov	r0, #-1
-.L366:
+.L368:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, pc}
-.L369:
+.L371:
 	movs	r0, #0
-	b	.L366
-.L372:
+	b	.L368
+.L374:
 	.align	2
-.L371:
+.L373:
 	.word	.LANCHOR13
 	.word	100000
 	.size	nandc_wait_flash_ready, .-nandc_wait_flash_ready
@@ -1888,20 +1913,20 @@ sandisk_set_rr_para:
 	str	r3, [r0, #4]
 	movs	r0, #200
 	bl	timer_delay_ns
-	ldr	r3, .L379
+	ldr	r3, .L381
 	add	r1, r1, r1, lsl #2
-	ldr	r6, .L379+4
+	ldr	r6, .L381+4
 	movs	r2, #0
-	ldr	r7, .L379+8
+	ldr	r7, .L381+8
 	ldrb	r0, [r3]	@ zero_extendqisi2
-	ldr	r3, .L379+12
+	ldr	r3, .L381+12
 	ldrb	r5, [r3]	@ zero_extendqisi2
-.L374:
+.L376:
 	cmp	r2, r0
-	bcc	.L377
+	bcc	.L379
 	pop	{r3, r4, r5, r6, r7, lr}
 	b	nandc_wait_flash_ready
-.L377:
+.L379:
 	adds	r3, r2, r1
 	cmp	r5, #67
 	ite	eq
@@ -1910,10 +1935,10 @@ sandisk_set_rr_para:
 	ldrsb	r3, [r3, #5]
 	adds	r2, r2, #1
 	str	r3, [r4]
-	b	.L374
-.L380:
+	b	.L376
+.L382:
 	.align	2
-.L379:
+.L381:
 	.word	.LANCHOR26
 	.word	.LANCHOR24
 	.word	.LANCHOR22
@@ -1940,7 +1965,7 @@ toshiba_3d_set_tlc_rr_para:
 	rsb	r1, r1, r1, lsl #3
 	str	r6, [r0, #4]
 	str	r3, [r0, #4]
-	ldr	r3, .L382
+	ldr	r3, .L384
 	adds	r5, r3, r1
 	ldrsb	r3, [r3, r1]
 	str	r3, [r0]
@@ -1964,10 +1989,10 @@ toshiba_3d_set_tlc_rr_para:
 	str	r6, [r4]
 	pop	{r3, r4, r5, r6, r7, lr}
 	b	nandc_wait_flash_ready
-.L383:
+.L385:
 	.align	2
-.L382:
-	.word	.LANCHOR36
+.L384:
+	.word	.LANCHOR38
 	.size	toshiba_3d_set_tlc_rr_para, .-toshiba_3d_set_tlc_rr_para
 	.section	.text.toshiba_3d_set_slc_rr_para,"ax",%progbits
 	.align	1
@@ -1987,7 +2012,7 @@ toshiba_3d_set_slc_rr_para:
 	movs	r3, #0
 	str	r3, [r0, #4]
 	str	r2, [r0, #4]
-	ldr	r2, .L385
+	ldr	r2, .L387
 	add	r1, r1, r2
 	ldrsb	r2, [r1, #1]
 	str	r2, [r0]
@@ -1995,10 +2020,10 @@ toshiba_3d_set_slc_rr_para:
 	str	r3, [r0]
 	str	r3, [r0]
 	b	nandc_wait_flash_ready
-.L386:
+.L388:
 	.align	2
-.L385:
-	.word	.LANCHOR37
+.L387:
+	.word	.LANCHOR39
 	.size	toshiba_3d_set_slc_rr_para, .-toshiba_3d_set_slc_rr_para
 	.section	.text.toshiba_tlc_set_rr_para,"ax",%progbits
 	.align	1
@@ -2015,11 +2040,11 @@ toshiba_tlc_set_rr_para:
 	movs	r6, #239
 	mov	r4, r0
 	str	r6, [r0, #8]
-	cbz	r2, .L388
+	cbz	r2, .L390
 	movs	r3, #18
 	rsb	r1, r1, r1, lsl #3
 	str	r3, [r0, #4]
-	ldr	r3, .L390
+	ldr	r3, .L392
 	adds	r5, r3, r1
 	ldrb	r3, [r3, r1]	@ zero_extendqisi2
 	str	r3, [r0]
@@ -2041,25 +2066,109 @@ toshiba_tlc_set_rr_para:
 	str	r3, [r4]
 	movs	r3, #0
 	str	r3, [r4]
-.L389:
+.L391:
 	pop	{r4, r5, r6, lr}
 	b	nandc_wait_flash_ready
-.L388:
+.L390:
 	movs	r3, #20
 	str	r3, [r0, #4]
-	ldr	r3, .L390+4
+	ldr	r3, .L392+4
 	ldrb	r3, [r3, r1]	@ zero_extendqisi2
 	str	r3, [r0]
 	str	r2, [r0]
 	str	r2, [r0]
 	str	r2, [r0]
-	b	.L389
-.L391:
+	b	.L391
+.L393:
 	.align	2
-.L390:
-	.word	.LANCHOR38
-	.word	.LANCHOR39
+.L392:
+	.word	.LANCHOR40
+	.word	.LANCHOR41
 	.size	toshiba_tlc_set_rr_para, .-toshiba_tlc_set_rr_para
+	.section	.text.ymtc_3d_set_tlc_rr_para,"ax",%progbits
+	.align	1
+	.global	ymtc_3d_set_tlc_rr_para
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ymtc_3d_set_tlc_rr_para, %function
+ymtc_3d_set_tlc_rr_para:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	movs	r7, #239
+	movs	r3, #160
+	str	r7, [r0, #8]
+	rsb	r1, r1, r1, lsl #3
+	movs	r6, #0
+	str	r3, [r0, #4]
+	mov	r4, r0
+	ldr	r3, .L395
+	adds	r5, r3, r1
+	ldrsb	r3, [r3, r1]
+	str	r3, [r0]
+	ldrsb	r3, [r5, #4]
+	str	r3, [r0]
+	str	r6, [r0]
+	str	r6, [r0]
+	bl	nandc_wait_flash_ready
+	movs	r3, #161
+	str	r7, [r4, #8]
+	str	r3, [r4, #4]
+	ldrsb	r3, [r5, #1]
+	str	r3, [r4]
+	ldrsb	r3, [r5, #3]
+	str	r3, [r4]
+	ldrsb	r3, [r5, #5]
+	str	r3, [r4]
+	str	r6, [r4]
+	bl	nandc_wait_flash_ready
+	movs	r3, #162
+	str	r7, [r4, #8]
+	str	r3, [r4, #4]
+	ldrsb	r3, [r5, #2]
+	str	r3, [r4]
+	ldrsb	r3, [r5, #6]
+	str	r3, [r4]
+	str	r6, [r4]
+	str	r6, [r4]
+	pop	{r3, r4, r5, r6, r7, lr}
+	b	nandc_wait_flash_ready
+.L396:
+	.align	2
+.L395:
+	.word	.LANCHOR42
+	.size	ymtc_3d_set_tlc_rr_para, .-ymtc_3d_set_tlc_rr_para
+	.section	.text.ymtc_3d_set_slc_rr_para,"ax",%progbits
+	.align	1
+	.global	ymtc_3d_set_slc_rr_para
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ymtc_3d_set_slc_rr_para, %function
+ymtc_3d_set_slc_rr_para:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	movs	r3, #239
+	str	r3, [r0, #8]
+	movs	r3, #163
+	str	r3, [r0, #4]
+	ldr	r3, .L398
+	ldrsb	r3, [r3, r1]
+	str	r3, [r0]
+	movs	r3, #0
+	str	r3, [r0]
+	str	r3, [r0]
+	str	r3, [r0]
+	b	nandc_wait_flash_ready
+.L399:
+	.align	2
+.L398:
+	.word	.LANCHOR43
+	.size	ymtc_3d_set_slc_rr_para, .-ymtc_3d_set_slc_rr_para
 	.section	.text.flash_erase_duplane_block,"ax",%progbits
 	.align	1
 	.global	flash_erase_duplane_block
@@ -2069,52 +2178,52 @@ toshiba_tlc_set_rr_para:
 	.fpu softvfp
 	.type	flash_erase_duplane_block, %function
 flash_erase_duplane_block:
-	@ args = 0, pretend = 0, frame = 0
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r5, r2
-	ldr	r4, .L408
+	ldr	r4, .L424
 	mov	r7, r0
 	mov	r6, r1
-	mov	r8, r3
+	mov	r10, r3
 	ldrb	r2, [r4]	@ zero_extendqisi2
 	cmp	r2, r0
-	bhi	.L393
-	movw	r2, #598
-	ldr	r1, .L408+4
-	ldr	r0, .L408+8
+	bhi	.L401
+	mov	r2, #688
+	ldr	r1, .L424+4
+	ldr	r0, .L424+8
 	bl	printf
-.L393:
+.L401:
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	cmp	r3, r7
-	bls	.L400
-	ldr	r3, .L408+12
+	bls	.L410
+	ldr	r3, .L424+12
 	ldrb	r4, [r3, r7]	@ zero_extendqisi2
-	ldr	r3, .L408+16
+	ldr	r3, .L424+16
 	add	r7, r4, #8
-	ldr	r10, [r3]
-	ldr	r3, .L408+20
+	ldr	r8, [r3]
+	ldr	r3, .L424+20
 	ldr	r3, [r3]
-	add	r7, r10, r7, lsl #8
+	add	r7, r8, r7, lsl #8
 	lsls	r3, r3, #27
-	bpl	.L395
-	mov	r3, r8
+	bpl	.L403
+	mov	r3, r10
 	mov	r2, r5
 	mov	r1, r4
-	ldr	r0, .L408+24
+	ldr	r0, .L424+24
 	bl	printf
-.L395:
+.L403:
 	bl	nandc_wait_flash_ready
 	mov	r0, r4
 	bl	nandc_cs
 	mov	r0, r4
 	cmp	r6, #0
-	bne	.L396
+	bne	.L404
 	bl	zftl_flash_enter_slc_mode
-.L397:
+.L405:
 	lsls	r4, r4, #8
 	movs	r3, #96
-	add	r6, r10, r4
+	add	r6, r8, r4
 	str	r3, [r6, #2056]
 	uxtb	r3, r5
 	str	r3, [r6, #2052]
@@ -2122,62 +2231,82 @@ flash_erase_duplane_block:
 	str	r3, [r6, #2052]
 	lsrs	r3, r5, #16
 	str	r3, [r6, #2052]
-	ldr	r3, .L408+28
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L401
-	movs	r3, #208
-	str	r3, [r6, #2056]
+	ldr	r3, .L424+28
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	cbz	r2, .L406
+	lsrs	r2, r5, #24
+	str	r2, [r6, #2052]
+.L406:
+	ldr	r2, .L424+32
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r2, #0
+	bne	.L411
+	add	r2, r8, r4
+	movs	r1, #208
+	str	r1, [r2, #2056]
+	str	r3, [sp, #4]
 	bl	nandc_wait_flash_ready
 	mov	r0, r7
 	bl	flash_read_status
+	ldr	r3, [sp, #4]
 	and	fp, r0, #5
-.L398:
-	add	r0, r10, r4
-	movs	r3, #96
-	str	r3, [r0, #2056]
-	uxtb	r3, r8
-	lsr	r2, r8, #16
-	str	r3, [r6, #2052]
-	lsr	r3, r8, #8
-	str	r3, [r6, #2052]
-	movs	r3, #208
+.L407:
+	add	r2, r8, r4
+	movs	r1, #96
+	str	r1, [r2, #2056]
+	uxtb	r2, r10
+	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r2, [r6, #2052]
+	lsr	r2, r10, #8
+	str	r2, [r6, #2052]
+	lsr	r2, r10, #16
+	str	r2, [r6, #2052]
+	cbz	r3, .L408
+	lsr	r2, r10, #24
+	str	r2, [r6, #2052]
+.L408:
+	movs	r3, #208
+	add	r0, r8, r4
 	str	r3, [r0, #2056]
 	bl	nandc_wait_flash_ready
 	mov	r0, r7
 	bl	flash_read_status
-	bl	nandc_de_cs.constprop.30
+	bl	nandc_de_cs.constprop.33
 	and	r3, r0, #5
 	orrs	fp, r3, fp
-	beq	.L399
+	beq	.L409
 	mov	r2, r0
 	mov	r1, r5
-	ldr	r0, .L408+32
+	ldr	r0, .L424+36
 	bl	printf
-.L399:
+.L409:
 	mov	r0, fp
+.L400:
+	add	sp, sp, #8
+	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L396:
+.L404:
 	bl	zftl_flash_exit_slc_mode
-	b	.L397
-.L401:
+	b	.L405
+.L411:
 	mov	fp, #0
-	b	.L398
-.L400:
+	b	.L407
+.L410:
 	mov	r0, #-1
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L409:
+	b	.L400
+.L425:
 	.align	2
-.L408:
+.L424:
 	.word	.LANCHOR18
-	.word	.LANCHOR40
+	.word	.LANCHOR44
 	.word	.LC0
 	.word	.LANCHOR30
 	.word	.LANCHOR13
 	.word	.LANCHOR14
+	.word	.LC31
+	.word	.LANCHOR31
+	.word	.LANCHOR45
 	.word	.LC32
-	.word	.LANCHOR41
-	.word	.LC33
 	.size	flash_erase_duplane_block, .-flash_erase_duplane_block
 	.section	.text.flash_erase_block_en,"ax",%progbits
 	.align	1
@@ -2190,10 +2319,10 @@ flash_erase_duplane_block:
 flash_erase_block_en:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L424
+	ldr	r3, .L444
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r7, r2
-	ldr	r5, .L424+4
+	ldr	r5, .L444+4
 	mov	r6, r0
 	mov	fp, r1
 	ldrb	r4, [r3]	@ zero_extendqisi2
@@ -2204,87 +2333,97 @@ flash_erase_block_en:
 	ands	r4, r4, r2
 	ldrb	r2, [r5]	@ zero_extendqisi2
 	cmp	r2, r0
-	bhi	.L411
-	movw	r2, #645
-	ldr	r1, .L424+8
-	ldr	r0, .L424+12
+	bhi	.L427
+	movw	r2, #750
+	ldr	r1, .L444+8
+	ldr	r0, .L444+12
 	bl	printf
-.L411:
+.L427:
 	ldrb	r3, [r5]	@ zero_extendqisi2
 	cmp	r3, r6
-	bls	.L417
-	ldr	r3, .L424+16
-	ldrb	r8, [r3, r6]	@ zero_extendqisi2
-	ldr	r3, .L424+20
-	add	r10, r8, #8
-	ldr	r5, [r3]
-	ldr	r3, .L424+24
+	bls	.L434
+	ldr	r3, .L444+16
+	ldrb	r5, [r3, r6]	@ zero_extendqisi2
+	ldr	r3, .L444+20
+	add	r10, r5, #8
+	ldr	r8, [r3]
+	ldr	r3, .L444+24
 	ldr	r3, [r3]
-	add	r10, r5, r10, lsl #8
+	add	r10, r8, r10, lsl #8
 	lsls	r3, r3, #27
-	bpl	.L413
+	bpl	.L429
 	mov	r3, fp
 	mov	r2, r7
-	mov	r1, r8
-	ldr	r0, .L424+28
+	mov	r1, r5
+	ldr	r0, .L444+28
 	bl	printf
-.L413:
+.L429:
 	bl	nandc_wait_flash_ready
-	mov	r0, r8
+	mov	r0, r5
 	bl	nandc_cs
-	mov	r0, r8
+	mov	r0, r5
 	cmp	fp, #0
-	bne	.L414
+	bne	.L430
 	bl	zftl_flash_enter_slc_mode
-.L415:
-	add	r0, r5, r8, lsl #8
-	movs	r3, #96
-	str	r3, [r0, #2056]
-	uxtb	r3, r4
-	str	r3, [r0, #2052]
-	lsrs	r3, r4, #8
-	lsrs	r4, r4, #16
-	str	r3, [r0, #2052]
+.L431:
+	lsls	r5, r5, #8
+	movs	r2, #96
+	add	r3, r8, r5
+	str	r2, [r3, #2056]
+	uxtb	r2, r4
+	str	r2, [r3, #2052]
+	lsrs	r2, r4, #8
+	str	r2, [r3, #2052]
+	lsrs	r2, r4, #16
+	str	r2, [r3, #2052]
+	ldr	r2, .L444+32
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbz	r2, .L432
+	lsrs	r4, r4, #24
+	str	r4, [r3, #2052]
+.L432:
 	movs	r3, #208
-	str	r4, [r0, #2052]
-	str	r3, [r0, #2056]
+	add	r5, r5, r8
+	str	r3, [r5, #2056]
 	bl	nandc_wait_flash_ready
 	mov	r0, r10
 	bl	flash_read_status
-	bl	nandc_de_cs.constprop.30
+	bl	nandc_de_cs.constprop.33
 	ands	r4, r0, #5
-	beq	.L416
-	ldr	r3, .L424+32
+	beq	.L433
+	ldr	r3, .L444+36
 	mov	r0, r7
 	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
 	mov	r3, r4
+	mov	r4, #-1
 	mov	r2, r0
 	mov	r1, r6
-	ldr	r0, .L424+36
+	ldr	r0, .L444+40
 	bl	printf
-.L416:
+.L433:
 	mov	r0, r4
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L414:
+.L430:
 	bl	zftl_flash_exit_slc_mode
-	b	.L415
-.L417:
+	b	.L431
+.L434:
 	mov	r0, #-1
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L425:
+.L445:
 	.align	2
-.L424:
-	.word	.LANCHOR31
+.L444:
+	.word	.LANCHOR32
 	.word	.LANCHOR18
-	.word	.LANCHOR42
+	.word	.LANCHOR46
 	.word	.LC0
 	.word	.LANCHOR30
 	.word	.LANCHOR13
 	.word	.LANCHOR14
-	.word	.LC34
+	.word	.LC33
+	.word	.LANCHOR31
 	.word	.LANCHOR2
-	.word	.LC35
+	.word	.LC34
 	.size	flash_erase_block_en, .-flash_erase_block_en
 	.section	.text.flash_erase_block,"ax",%progbits
 	.align	1
@@ -2313,49 +2452,49 @@ flash_erase_block:
 flash_erase_all:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L432
+	ldr	r3, .L452
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r5, #0
-	ldr	r7, .L432+4
+	ldr	r7, .L452+4
 	ldrb	r4, [r3, #13]	@ zero_extendqisi2
 	ldrh	r3, [r3, #14]
 	smulbb	r4, r4, r3
 	uxth	r4, r4
-.L428:
-	ldr	r3, .L432+8
+.L448:
+	ldr	r3, .L452+8
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	uxth	r3, r5
 	cmp	r2, r3
-	bhi	.L431
+	bhi	.L451
 	movs	r1, #0
-	ldr	r0, .L432+12
+	ldr	r0, .L452+12
 	pop	{r4, r5, r6, r7, r8, lr}
 	b	printf
-.L431:
-	ldr	r2, .L432+16
+.L451:
+	ldr	r2, .L452+16
 	uxth	r3, r5
 	movs	r6, #0
 	ldrb	r8, [r2, r3]	@ zero_extendqisi2
-.L429:
+.L449:
 	uxth	r3, r6
 	cmp	r4, r3
-	bhi	.L430
+	bhi	.L450
 	adds	r5, r5, #1
-	b	.L428
-.L430:
+	b	.L448
+.L450:
 	ldrh	r1, [r7]
 	mov	r0, r8
 	muls	r1, r6, r1
 	adds	r6, r6, #1
 	bl	flash_erase_block
-	b	.L429
-.L433:
+	b	.L449
+.L453:
 	.align	2
-.L432:
-	.word	.LANCHOR32
+.L452:
+	.word	.LANCHOR33
 	.word	.LANCHOR2
 	.word	.LANCHOR18
-	.word	.LC36
+	.word	.LC35
 	.word	.LANCHOR30
 	.size	flash_erase_all, .-flash_erase_all
 	.section	.text.flash_start_plane_read,"ax",%progbits
@@ -2367,149 +2506,182 @@ flash_erase_all:
 	.fpu softvfp
 	.type	flash_start_plane_read, %function
 flash_start_plane_read:
-	@ args = 0, pretend = 0, frame = 0
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L453
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	ubfx	r7, r0, #24, #2
+	ldr	r3, .L482
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	ubfx	r10, r0, #24, #2
 	ldrb	r5, [r3]	@ zero_extendqisi2
 	movs	r3, #1
 	rsb	r2, r5, #24
 	lsl	r4, r3, r2
 	lsl	r5, r3, r5
-	ldr	r3, .L453+4
+	ldr	r3, .L482+4
 	lsr	r2, r0, r2
 	subs	r5, r5, #1
 	ands	r5, r5, r2
 	subs	r4, r4, #1
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	uxtb	r5, r5
-	and	r6, r4, r0
+	and	r7, r4, r0
 	ands	r4, r4, r1
 	cmp	r3, r5
-	bhi	.L435
-	movw	r2, #965
-	ldr	r1, .L453+8
-	ldr	r0, .L453+12
-	bl	printf
-.L435:
-	ldr	r3, .L453+16
-	ldr	fp, .L453+36
+	bhi	.L455
+	mov	r2, #1128
+	ldr	r1, .L482+8
+	ldr	r0, .L482+12
+	bl	printf
+.L455:
+	ldr	r3, .L482+16
+	ldr	fp, .L482+44
 	ldrb	r5, [r3, r5]	@ zero_extendqisi2
-	ldr	r3, .L453+20
+	ldr	r3, .L482+20
 	mov	r0, r5
-	ldr	r8, [r3]
-	lsl	r10, r5, #8
+	ldr	r6, [r3]
+	lsl	r8, r5, #8
 	bl	nandc_cs
-	cmp	r7, #0
-	bne	.L436
-	mov	r0, r6
+	cmp	r10, #0
+	bne	.L456
+	mov	r0, r7
 	bl	slc_phy_page_address_calc
-	mov	r6, r0
+	mov	r7, r0
 	mov	r0, r4
 	bl	slc_phy_page_address_calc
-	ldr	r3, .L453+24
+	ldr	r3, .L482+24
 	mov	r4, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L437
+	cbz	r3, .L457
 	mov	r0, r5
 	bl	zftl_flash_enter_slc_mode
-.L437:
-	ldr	r3, .L453+28
-	ldrb	r2, [r3, #16]	@ zero_extendqisi2
-	mov	r0, r3
-	ldrb	r1, [r3, #8]	@ zero_extendqisi2
-	cmp	r2, #1
-	uxtb	r2, r6
-	bne	.L439
-	add	r5, r8, r10
-	ldrb	r3, [r3, #9]	@ zero_extendqisi2
-	str	r1, [r5, #2056]
-	movs	r1, #0
-	str	r1, [r5, #2052]
-	str	r1, [r5, #2052]
-	str	r2, [r5, #2052]
-	lsrs	r2, r6, #8
-	lsrs	r6, r6, #16
-	str	r2, [r5, #2052]
-	str	r6, [r5, #2052]
+.L457:
+	ldr	r2, .L482+28
+	uxtb	ip, r7
+	lsrs	r0, r7, #8
+	ldrb	r3, [r2, #16]	@ zero_extendqisi2
+	cmp	r3, #1
+	bne	.L459
+	ldrb	r3, [r2, #8]	@ zero_extendqisi2
+	add	r5, r6, r8
 	str	r3, [r5, #2056]
-	bl	nandc_wait_flash_ready
-	ldr	r3, [fp]
-	ldrb	r3, [r3, #12]	@ zero_extendqisi2
-	cmp	r3, #3
-	bne	.L440
-	cbz	r7, .L440
-	str	r7, [r5, #2056]
-.L440:
 	movs	r3, #0
-	add	r8, r8, r10
-	str	r3, [r8, #2056]
 	str	r3, [r5, #2052]
 	str	r3, [r5, #2052]
-	uxtb	r3, r4
-	str	r3, [r5, #2052]
-	lsrs	r3, r4, #8
-	lsrs	r4, r4, #16
+	lsrs	r3, r7, #16
+	str	ip, [r5, #2052]
+	str	r0, [r5, #2052]
 	str	r3, [r5, #2052]
+	ldr	r3, .L482+32
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	cbz	r1, .L460
+	lsrs	r7, r7, #24
+	str	r7, [r5, #2052]
+.L460:
+	ldrb	r2, [r2, #9]	@ zero_extendqisi2
+	add	r7, r6, r8
+	str	r3, [sp, #4]
+	str	r2, [r7, #2056]
+	bl	nandc_wait_flash_ready
+	ldr	r2, [fp]
+	ldr	r3, [sp, #4]
+	ldrb	r2, [r2, #12]	@ zero_extendqisi2
+	cmp	r2, #3
+	bne	.L461
+	cmp	r10, #0
+	beq	.L461
+	str	r10, [r7, #2056]
+.L461:
+	movs	r2, #0
+	add	r1, r6, r8
+	str	r2, [r1, #2056]
+	str	r2, [r5, #2052]
+	str	r2, [r5, #2052]
+	uxtb	r2, r4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r2, [r5, #2052]
+	lsrs	r2, r4, #8
+	str	r2, [r5, #2052]
+	lsrs	r2, r4, #16
+	str	r2, [r5, #2052]
+	cbz	r3, .L462
+	lsrs	r4, r4, #24
 	str	r4, [r5, #2052]
-.L452:
+.L462:
+	add	r6, r6, r8
+.L481:
 	movs	r3, #48
-	str	r3, [r8, #2056]
+	str	r3, [r6, #2056]
+	add	sp, sp, #8
+	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
-	b	nandc_de_cs.constprop.30
-.L436:
+	b	nandc_de_cs.constprop.33
+.L456:
 	ldr	r3, [fp]
 	ldrb	r3, [r3, #12]	@ zero_extendqisi2
 	cmp	r3, #3
-	bne	.L438
-	ldr	r3, .L453+32
+	bne	.L458
+	ldr	r3, .L482+36
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L438
-	add	r3, r8, r10
-	str	r7, [r3, #2056]
-	b	.L437
-.L438:
+	cbnz	r3, .L458
+	ldr	r3, .L482+40
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L458
+	add	r3, r6, r8
+	str	r10, [r3, #2056]
+	b	.L457
+.L458:
 	mov	r0, r5
 	bl	zftl_flash_exit_slc_mode
-	b	.L437
-.L439:
-	add	r3, r8, r10
-	str	r1, [r3, #2056]
-	str	r2, [r3, #2052]
-	lsrs	r2, r6, #8
-	lsrs	r6, r6, #16
-	str	r2, [r3, #2052]
-	ldr	r2, [fp]
-	str	r6, [r3, #2052]
-	ldrb	r2, [r2, #12]	@ zero_extendqisi2
-	cmp	r2, #3
-	bne	.L442
-	cbz	r7, .L442
-	str	r7, [r3, #2056]
-.L442:
-	ldrb	r2, [r0, #9]	@ zero_extendqisi2
-	add	r8, r8, r10
-	str	r2, [r8, #2056]
+	b	.L457
+.L459:
+	ldr	r1, [fp]
+	ldrb	r3, [r1, #7]	@ zero_extendqisi2
+	cmp	r3, #1
+	bne	.L464
+	ldrb	r3, [r1, #12]	@ zero_extendqisi2
+	cmp	r3, #2
+	ittt	eq
+	addeq	r3, r6, r8
+	moveq	r5, #38
+	streq	r5, [r3, #2056]
+.L464:
+	ldrb	r5, [r2, #8]	@ zero_extendqisi2
+	lsrs	r7, r7, #16
+	add	r3, r6, r8
+	str	r5, [r3, #2056]
+	str	ip, [r3, #2052]
+	str	r0, [r3, #2052]
+	str	r7, [r3, #2052]
+	ldrb	r1, [r1, #12]	@ zero_extendqisi2
+	cmp	r1, #3
+	bne	.L465
+	cmp	r10, #0
+	beq	.L465
+	str	r10, [r3, #2056]
+.L465:
+	ldrb	r2, [r2, #9]	@ zero_extendqisi2
+	add	r6, r6, r8
+	str	r2, [r6, #2056]
 	uxtb	r2, r4
 	str	r2, [r3, #2052]
 	lsrs	r2, r4, #8
 	lsrs	r4, r4, #16
 	str	r2, [r3, #2052]
 	str	r4, [r3, #2052]
-	b	.L452
-.L454:
+	b	.L481
+.L483:
 	.align	2
-.L453:
-	.word	.LANCHOR31
+.L482:
+	.word	.LANCHOR32
 	.word	.LANCHOR18
-	.word	.LANCHOR43
+	.word	.LANCHOR47
 	.word	.LC0
 	.word	.LANCHOR30
 	.word	.LANCHOR13
 	.word	.LANCHOR0
 	.word	.LANCHOR20
-	.word	.LANCHOR35
+	.word	.LANCHOR31
+	.word	.LANCHOR36
+	.word	.LANCHOR37
 	.word	.LANCHOR16
 	.size	flash_start_plane_read, .-flash_start_plane_read
 	.section	.text.flash_set_interface_mode,"ax",%progbits
@@ -2525,105 +2697,102 @@ flash_set_interface_mode:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
 	mov	r6, r0
-	ldr	r7, .L498
+	ldr	r7, .L528
 	mov	r10, #0
-	ldr	r8, .L498+24
-.L469:
+	ldr	r8, .L528+24
+.L498:
 	ldrb	r5, [r7, r10, lsl #3]	@ zero_extendqisi2
 	cmp	r5, #69
-	beq	.L456
+	beq	.L485
 	cmp	r5, #44
-	beq	.L456
+	beq	.L485
 	add	r3, r5, #119
 	uxtb	r3, r3
 	cmp	r3, #18
-	bhi	.L457
-	ldr	r2, .L498+4
+	bhi	.L486
+	ldr	r2, .L528+4
 	lsr	r3, r2, r3
 	lsls	r2, r3, #31
-	bpl	.L457
-.L456:
-	ldr	r3, .L498+8
+	bpl	.L486
+.L485:
+	ldr	r3, .L528+8
 	cmp	r6, #1
 	ldr	r4, [r8]
 	ldrb	r1, [r3]	@ zero_extendqisi2
-	bne	.L458
+	bne	.L487
 	lsls	r3, r1, #31
-	bpl	.L457
-	ldr	r3, .L498+12
+	bpl	.L486
+	ldr	r3, .L528+12
 	ldr	r3, [r3]
 	lsls	r0, r3, #19
-	bpl	.L459
-	ldr	r0, .L498+16
+	bpl	.L488
+	ldr	r0, .L528+16
 	bl	printf
-.L459:
+.L488:
 	lsl	r3, r10, #8
 	cmp	r5, #44
 	mov	r1, #239
 	add	r2, r4, r3
 	str	r1, [r2, #2056]
-	beq	.L460
+	beq	.L489
 	cmp	r5, #137
-	bne	.L461
-.L460:
-	movs	r1, #1
+	bne	.L490
+.L489:
 	adds	r2, r4, r3
+.L527:
+	movs	r1, #1
 	str	r1, [r2, #2052]
 	movs	r1, #5
-.L495:
+.L524:
 	add	r4, r4, r3
 	str	r1, [r2, #2048]
-.L497:
+.L526:
 	movs	r3, #0
 	str	r3, [r4, #2048]
 	str	r3, [r4, #2048]
 	str	r3, [r4, #2048]
-.L457:
+.L486:
 	add	r10, r10, #1
 	cmp	r10, #4
-	bne	.L469
+	bne	.L498
 	bl	nandc_wait_flash_ready
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L461:
+.L490:
 	cmp	r5, #155
-	itett	eq
-	moveq	r1, #1
-	movne	r1, #128
-	streq	r1, [r2, #2052]
-	moveq	r1, #3
-	itt	ne
-	strne	r1, [r2, #2052]
-	movne	r1, #1
-	b	.L495
-.L458:
+	beq	.L527
+	movs	r1, #128
+	str	r1, [r2, #2052]
+	movs	r1, #1
+	b	.L524
+.L487:
 	lsls	r2, r1, #29
-	bpl	.L457
-	ldr	r3, .L498+12
+	bpl	.L486
+	ldr	r3, .L528+12
 	ldr	r3, [r3]
 	lsls	r3, r3, #19
-	bpl	.L464
-	ldr	r0, .L498+20
+	bpl	.L493
+	ldr	r0, .L528+20
 	bl	printf
-.L464:
+.L493:
 	lsl	r2, r10, #8
 	cmp	r5, #44
 	mov	r1, #239
 	add	r3, r4, r2
 	str	r1, [r3, #2056]
-	beq	.L465
+	beq	.L494
 	cmp	r5, #137
-	bne	.L466
-.L465:
+	bne	.L495
+.L494:
 	movs	r1, #1
 	adds	r3, r4, r2
 	str	r1, [r3, #2052]
 	movs	r1, #35
-.L496:
+.L525:
 	str	r1, [r3, #2048]
 	add	r4, r4, r2
-	b	.L497
-.L466:
+	b	.L526
+.L495:
 	cmp	r5, #155
 	itett	eq
 	moveq	r1, #1
@@ -2633,16 +2802,16 @@ flash_set_interface_mode:
 	itt	ne
 	strne	r1, [r3, #2052]
 	movne	r1, #0
-	b	.L496
-.L499:
+	b	.L525
+.L529:
 	.align	2
-.L498:
-	.word	.LANCHOR44
+.L528:
+	.word	.LANCHOR48
 	.word	294913
-	.word	.LANCHOR45
+	.word	.LANCHOR49
 	.word	.LANCHOR14
+	.word	.LC36
 	.word	.LC37
-	.word	.LC38
 	.word	.LANCHOR13
 	.size	flash_set_interface_mode, .-flash_set_interface_mode
 	.section	.text.mt_auto_read_calibration_config,"ax",%progbits
@@ -2659,7 +2828,7 @@ mt_auto_read_calibration_config:
 	mov	r5, r1
 	mov	r6, r0
 	bl	nandc_wait_flash_ready
-	ldr	r3, .L501
+	ldr	r3, .L531
 	movs	r0, #200
 	ldr	r4, [r3]
 	movs	r3, #239
@@ -2674,9 +2843,9 @@ mt_auto_read_calibration_config:
 	str	r3, [r4, #2048]
 	str	r3, [r4, #2048]
 	pop	{r4, r5, r6, pc}
-.L502:
+.L532:
 	.align	2
-.L501:
+.L531:
 	.word	.LANCHOR13
 	.size	mt_auto_read_calibration_config, .-mt_auto_read_calibration_config
 	.section	.text.flash_reset,"ax",%progbits
@@ -2691,15 +2860,15 @@ flash_reset:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L504
+	ldr	r3, .L534
 	ldr	r3, [r3]
 	add	r0, r3, r0, lsl #8
 	movs	r3, #255
 	str	r3, [r0, #2056]
 	b	nandc_wait_flash_ready
-.L505:
+.L535:
 	.align	2
-.L504:
+.L534:
 	.word	.LANCHOR13
 	.size	flash_reset, .-flash_reset
 	.section	.text.flash_read_id,"ax",%progbits
@@ -2715,7 +2884,7 @@ flash_read_id:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, lr}
 	mov	r5, r0
-	ldr	r3, .L508
+	ldr	r3, .L538
 	mov	r4, r1
 	ldr	r6, [r3]
 	bl	flash_reset
@@ -2744,15 +2913,15 @@ flash_read_id:
 	strb	r3, [r4, #6]
 	ldr	r3, [r6, #2048]
 	strb	r3, [r4, #7]
-	bl	nandc_de_cs.constprop.30
+	bl	nandc_de_cs.constprop.33
 	ldrb	r2, [r4]	@ zero_extendqisi2
 	subs	r3, r2, #1
 	uxtb	r3, r3
 	cmp	r3, #253
-	bhi	.L506
+	bhi	.L536
 	ldrb	r1, [r4, #5]	@ zero_extendqisi2
 	ldrb	r3, [r4, #1]	@ zero_extendqisi2
-	ldr	r0, .L508+4
+	ldr	r0, .L538+4
 	str	r1, [sp, #12]
 	ldrb	r1, [r4, #4]	@ zero_extendqisi2
 	str	r1, [sp, #8]
@@ -2762,15 +2931,15 @@ flash_read_id:
 	str	r1, [sp]
 	adds	r1, r5, #1
 	bl	printf
-.L506:
+.L536:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, pc}
-.L509:
+.L539:
 	.align	2
-.L508:
+.L538:
 	.word	.LANCHOR13
-	.word	.LC39
+	.word	.LC38
 	.size	flash_read_id, .-flash_read_id
 	.section	.text.flash_read_spare,"ax",%progbits
 	.align	1
@@ -2785,8 +2954,8 @@ flash_read_spare:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	mov	r5, r2
-	ldr	r3, .L511
-	ldr	r2, .L511+4
+	ldr	r3, .L541
+	ldr	r2, .L541+4
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
 	ldr	r4, [r2]
 	movs	r2, #0
@@ -2808,10 +2977,10 @@ flash_read_spare:
 	ldr	r3, [r4, #2048]
 	strb	r3, [r5]
 	pop	{r3, r4, r5, pc}
-.L512:
+.L542:
 	.align	2
-.L511:
-	.word	.LANCHOR32
+.L541:
+	.word	.LANCHOR33
 	.word	.LANCHOR13
 	.size	flash_read_spare, .-flash_read_spare
 	.section	.text.flash_read_otp_data,"ax",%progbits
@@ -2825,7 +2994,7 @@ flash_read_spare:
 flash_read_otp_data:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L516
+	ldr	r3, .L546
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r8, r0
 	lsl	r8, r8, #8
@@ -2848,7 +3017,7 @@ flash_read_otp_data:
 	str	r10, [r4, #2048]
 	bl	nandc_wait_flash_ready
 	movs	r3, #238
-	ldr	r0, .L516+4
+	ldr	r0, .L546+4
 	str	r3, [r4, #2056]
 	str	fp, [r4, #2052]
 	ldr	r2, [r4, #2048]
@@ -2872,11 +3041,11 @@ flash_read_otp_data:
 	bl	nandc_wait_flash_ready
 	add	r3, r5, #16384
 	mov	r2, r5
-.L514:
+.L544:
 	ldr	r1, [r4, #2048]
 	strb	r1, [r2], #1
 	cmp	r2, r3
-	bne	.L514
+	bne	.L544
 	add	r7, r7, r8
 	movs	r3, #239
 	str	r3, [r7, #2056]
@@ -2892,12 +3061,12 @@ flash_read_otp_data:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
-	b	nandc_de_cs.constprop.30
-.L517:
+	b	nandc_de_cs.constprop.33
+.L547:
 	.align	2
-.L516:
+.L546:
 	.word	.LANCHOR13
-	.word	.LC40
+	.word	.LC39
 	.size	flash_read_otp_data, .-flash_read_otp_data
 	.section	.text.sandisk_prog_test_bad_block,"ax",%progbits
 	.align	1
@@ -2910,28 +3079,28 @@ flash_read_otp_data:
 sandisk_prog_test_bad_block:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	lsls	r0, r0, #8
-	ldr	r3, .L528
-	mov	r5, r1
-	ldr	r4, [r3]
-	ldr	r3, .L528+4
-	ldrb	r3, [r3, #29]	@ zero_extendqisi2
-	cbz	r3, .L519
-	adds	r2, r4, r0
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r8, r1
+	ldr	r3, .L562
+	lsls	r6, r0, #8
+	ldr	r7, .L562+4
+	ldr	r5, [r3]
+	ldrb	r3, [r7, #29]	@ zero_extendqisi2
+	cbz	r3, .L549
+	adds	r2, r5, r6
 	str	r3, [r2, #2056]
-.L520:
-	add	r4, r4, r0
+.L550:
+	adds	r4, r5, r6
 	movs	r3, #128
 	str	r3, [r4, #2056]
 	movs	r3, #0
 	str	r3, [r4, #2052]
 	str	r3, [r4, #2052]
-	uxtb	r3, r5
+	uxtb	r3, r8
 	str	r3, [r4, #2052]
-	lsrs	r3, r5, #8
+	lsr	r3, r8, #8
 	str	r3, [r4, #2052]
-	lsrs	r3, r5, #16
+	lsr	r3, r8, #16
 	str	r3, [r4, #2052]
 	movs	r3, #16
 	str	r3, [r4, #2056]
@@ -2942,29 +3111,34 @@ sandisk_prog_test_bad_block:
 	bl	timer_delay_ns
 	ldr	r2, [r4, #2048]
 	ands	r4, r2, #5
-	beq	.L518
-	ldr	r3, .L528+8
+	beq	.L551
+	ldr	r3, .L562+8
 	ldr	r3, [r3]
 	lsls	r3, r3, #19
-	bpl	.L518
-	mov	r1, r5
-	ldr	r0, .L528+12
+	bpl	.L551
+	mov	r1, r8
+	ldr	r0, .L562+12
 	bl	printf
-.L518:
+.L551:
+	ldrb	r3, [r7, #30]	@ zero_extendqisi2
+	cbz	r3, .L548
+	add	r5, r5, r6
+	str	r3, [r5, #2056]
+.L548:
 	mov	r0, r4
-	pop	{r3, r4, r5, pc}
-.L519:
-	adds	r3, r4, r0
+	pop	{r4, r5, r6, r7, r8, pc}
+.L549:
+	adds	r3, r5, r6
 	movs	r2, #162
 	str	r2, [r3, #2056]
-	b	.L520
-.L529:
+	b	.L550
+.L563:
 	.align	2
-.L528:
+.L562:
 	.word	.LANCHOR13
-	.word	.LANCHOR32
+	.word	.LANCHOR33
 	.word	.LANCHOR14
-	.word	.LC41
+	.word	.LC40
 	.size	sandisk_prog_test_bad_block, .-sandisk_prog_test_bad_block
 	.section	.text.nandc_rdy_status,"ax",%progbits
 	.align	1
@@ -2978,7 +3152,7 @@ nandc_rdy_status:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L531
+	ldr	r3, .L565
 	sub	sp, sp, #8
 	ldr	r3, [r3]
 	ldr	r3, [r3]
@@ -2988,9 +3162,9 @@ nandc_rdy_status:
 	add	sp, sp, #8
 	@ sp needed
 	bx	lr
-.L532:
+.L566:
 	.align	2
-.L531:
+.L565:
 	.word	.LANCHOR13
 	.size	nandc_rdy_status, .-nandc_rdy_status
 	.section	.text.nandc_bch_sel,"ax",%progbits
@@ -3010,25 +3184,25 @@ nandc_bch_sel:
 	ldr	r2, [sp, #4]
 	orr	r2, r2, #1
 	str	r2, [sp, #4]
-	ldr	r2, .L544
+	ldr	r2, .L578
 	strb	r0, [r2]
-	ldr	r2, .L544+4
+	ldr	r2, .L578+4
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, #9
-	ldr	r2, .L544+8
-	bne	.L534
+	ldr	r2, .L578+8
+	bne	.L568
 	ldr	r2, [r2]
 	cmp	r0, #70
 	ldr	r1, [sp, #4]
 	str	r1, [r2, #16]
-	beq	.L535
+	beq	.L569
 	cmp	r0, #60
-	beq	.L541
+	beq	.L575
 	cmp	r0, #40
 	ite	eq
 	moveq	r3, #2
 	movne	r3, #1
-.L535:
+.L569:
 	movs	r1, #0
 	str	r1, [sp]
 	ldr	r1, [sp]
@@ -3039,14 +3213,14 @@ nandc_bch_sel:
 	str	r3, [sp]
 	ldr	r3, [sp]
 	str	r3, [r2, #32]
-.L533:
+.L567:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, pc}
-.L541:
+.L575:
 	movs	r3, #3
-	b	.L535
-.L534:
+	b	.L569
+.L568:
 	ldr	r1, [r2]
 	movs	r4, #16
 	ldr	r2, [sp, #4]
@@ -3059,26 +3233,26 @@ nandc_bch_sel:
 	ldr	r2, [sp]
 	bfi	r2, r3, #18, #1
 	str	r2, [sp]
-	bne	.L537
-.L543:
+	bne	.L571
+.L577:
 	ldr	r2, [sp]
 	bfi	r2, r3, #4, #1
 	str	r2, [sp]
-	b	.L538
-.L537:
+	b	.L572
+.L571:
 	cmp	r0, #24
-	bne	.L539
+	bne	.L573
 	ldr	r3, [sp]
 	orr	r3, r3, #16
 	str	r3, [sp]
-.L538:
+.L572:
 	ldr	r3, [sp]
 	orr	r3, r3, #1
 	str	r3, [sp]
 	ldr	r3, [sp]
 	str	r3, [r1, #12]
-	b	.L533
-.L539:
+	b	.L567
+.L573:
 	ldr	r2, [sp]
 	cmp	r0, #40
 	orr	r2, r2, #262144
@@ -3086,12 +3260,12 @@ nandc_bch_sel:
 	ldr	r2, [sp]
 	orr	r2, r2, #16
 	str	r2, [sp]
-	bne	.L538
-	b	.L543
-.L545:
+	bne	.L572
+	b	.L577
+.L579:
 	.align	2
-.L544:
-	.word	.LANCHOR46
+.L578:
+	.word	.LANCHOR50
 	.word	.LANCHOR28
 	.word	.LANCHOR13
 	.size	nandc_bch_sel, .-nandc_bch_sel
@@ -3107,16 +3281,16 @@ zftl_nandc_get_irq_status:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L549
+	ldr	r3, .L583
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #9
 	ite	eq
 	ldreq	r0, [r0, #296]
 	ldrne	r0, [r0, #372]
 	bx	lr
-.L550:
+.L584:
 	.align	2
-.L549:
+.L583:
 	.word	.LANCHOR28
 	.size	zftl_nandc_get_irq_status, .-zftl_nandc_get_irq_status
 	.section	.text.rk_nandc_flash_ready,"ax",%progbits
@@ -3174,14 +3348,14 @@ nandc_xfer_start:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r5, r0
-	ldr	r0, .L570
+	ldr	r0, .L604
 	and	lr, r5, #1
-	ldr	r4, .L570+4
+	ldr	r4, .L604+4
 	ldrb	r0, [r0]	@ zero_extendqisi2
-	ldr	r7, .L570+8
+	ldr	r7, .L604+8
 	cmp	r0, #9
 	add	r0, r1, #1
-	bne	.L555
+	bne	.L589
 	movs	r6, #0
 	mov	ip, #1
 	str	r6, [sp, #4]
@@ -3210,16 +3384,16 @@ nandc_xfer_start:
 	ldr	r1, [sp, #4]
 	orr	r1, r1, #128
 	str	r1, [sp, #4]
-	ldr	r1, .L570+12
+	ldr	r1, .L604+12
 	ldrb	r1, [r1]	@ zero_extendqisi2
-	cbz	r1, .L556
-	ldr	r1, .L570+16
+	cbz	r1, .L590
+	ldr	r1, .L604+16
 	ldrb	r1, [r1]	@ zero_extendqisi2
-	cbz	r1, .L556
+	cbz	r1, .L590
 	ldr	r1, [sp, #4]
 	orr	r1, r1, #512
 	str	r1, [sp, #4]
-.L556:
+.L590:
 	ldr	r1, [sp, #4]
 	bic	r0, r2, #63
 	str	r3, [r4, #8]
@@ -3268,7 +3442,7 @@ nandc_xfer_start:
 	ldr	r2, [sp, #8]
 	orr	r2, r2, #1
 	str	r2, [sp, #8]
-	ldr	r2, .L570+20
+	ldr	r2, .L604+20
 	ldrh	r1, [r2]
 	ldr	r2, [sp, #8]
 	bfi	r2, r1, #16, #11
@@ -3282,11 +3456,11 @@ nandc_xfer_start:
 	str	r2, [sp, #4]
 	ldr	r2, [sp, #4]
 	str	r2, [r3, #16]
-.L554:
+.L588:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L555:
+.L589:
 	ldr	r6, [r7]
 	mov	ip, #16
 	ubfx	r0, r0, #1, #6
@@ -3326,8 +3500,8 @@ nandc_xfer_start:
 	bfi	ip, r0, #22, #6
 	str	ip, [sp, #4]
 	cmp	r5, #0
-	beq	.L558
-	ldr	r0, .L570+24
+	beq	.L592
+	ldr	r0, .L604+24
 	lsrs	r1, r1, #1
 	ldr	r8, [r4]
 	ldrb	r0, [r0]	@ zero_extendqisi2
@@ -3336,12 +3510,12 @@ nandc_xfer_start:
 	ite	cc
 	movcc	lr, #64
 	movcs	lr, #128
-.L560:
+.L594:
 	cmp	r0, r1
 	add	fp, r3, r0, lsl #2
 	add	r10, lr, r6
-	blt	.L561
-.L562:
+	blt	.L595
+.L596:
 	ldr	r3, [r4]
 	bic	r0, r2, #63
 	ldr	r1, [sp, #4]
@@ -3404,8 +3578,8 @@ nandc_xfer_start:
 	str	r2, [sp, #4]
 	ldr	r2, [sp, #4]
 	str	r2, [r3, #8]
-	b	.L554
-.L561:
+	b	.L588
+.L595:
 	ldrh	ip, [r3, r0, lsl #2]
 	bic	r6, r6, #3
 	ldrh	fp, [fp, #2]
@@ -3413,21 +3587,21 @@ nandc_xfer_start:
 	orr	ip, ip, fp, lsl #16
 	str	ip, [r8, r6]
 	mov	r6, r10
-	b	.L560
-.L558:
+	b	.L594
+.L592:
 	ldr	r3, [r4]
 	str	lr, [r3]
-	b	.L562
-.L571:
+	b	.L596
+.L605:
 	.align	2
-.L570:
+.L604:
 	.word	.LANCHOR28
-	.word	.LANCHOR49
+	.word	.LANCHOR53
 	.word	.LANCHOR13
-	.word	.LANCHOR47
-	.word	.LANCHOR48
+	.word	.LANCHOR51
+	.word	.LANCHOR52
+	.word	.LANCHOR54
 	.word	.LANCHOR50
-	.word	.LANCHOR46
 	.size	nandc_xfer_start, .-nandc_xfer_start
 	.section	.text.nandc_set_seed,"ax",%progbits
 	.align	1
@@ -3441,28 +3615,28 @@ nandc_set_seed:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L579
+	ldr	r2, .L613
 	and	r0, r0, #127
-	ldr	r3, .L579+4
+	ldr	r3, .L613+4
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r2, .L573
+	cbz	r2, .L607
 	orr	r3, r3, #-1073741824
-.L573:
-	ldr	r2, .L579+8
+.L607:
+	ldr	r2, .L613+8
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, #9
-	ldr	r2, .L579+12
+	ldr	r2, .L613+12
 	ldr	r2, [r2]
 	ite	eq
 	streq	r3, [r2, #520]
 	strne	r3, [r2, #336]
 	bx	lr
-.L580:
+.L614:
 	.align	2
-.L579:
-	.word	.LANCHOR48
-	.word	.LANCHOR51
+.L613:
+	.word	.LANCHOR52
+	.word	.LANCHOR55
 	.word	.LANCHOR28
 	.word	.LANCHOR13
 	.size	nandc_set_seed, .-nandc_set_seed
@@ -3479,54 +3653,54 @@ zftl_flash_de_init:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
 	bl	nandc_wait_flash_ready
-	ldr	r3, .L600
+	ldr	r3, .L634
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L582
-	ldr	r3, .L600+4
+	cbz	r3, .L616
+	ldr	r3, .L634+4
 	ldrb	r0, [r3]	@ zero_extendqisi2
-	cbnz	r0, .L582
-	ldr	r3, .L600+8
+	cbnz	r0, .L616
+	ldr	r3, .L634+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #9
-	beq	.L582
+	beq	.L616
 	bl	zftl_flash_exit_slc_mode
-.L582:
-	ldr	r4, .L600+12
+.L616:
+	ldr	r4, .L634+12
 	movs	r0, #0
 	bl	hynix_reconfig_rr_para
 	ldrb	r3, [r4]	@ zero_extendqisi2
-	cbz	r3, .L583
-	ldr	r3, .L600+16
+	cbz	r3, .L617
+	ldr	r3, .L634+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	lsls	r3, r3, #31
-	bpl	.L583
+	bpl	.L617
 	movs	r0, #1
 	bl	flash_set_interface_mode
 	movs	r0, #1
 	bl	nandc_set_if_mode
 	movs	r3, #0
 	strb	r3, [r4]
-.L583:
-	ldr	r1, .L600+20
+.L617:
+	ldr	r1, .L634+20
 	ldrb	r3, [r1]	@ zero_extendqisi2
-	cbz	r3, .L584
+	cbz	r3, .L618
 	movs	r0, #0
 	strb	r0, [r1]
 	bl	nandc_set_seed
 	movs	r3, #1
 	strb	r3, [r1]
-.L584:
+.L618:
 	movs	r0, #0
 	pop	{r4, pc}
-.L601:
+.L635:
 	.align	2
-.L600:
+.L634:
 	.word	.LANCHOR0
 	.word	.LANCHOR19
 	.word	.LANCHOR28
 	.word	.LANCHOR21
-	.word	.LANCHOR45
-	.word	.LANCHOR48
+	.word	.LANCHOR49
+	.word	.LANCHOR52
 	.size	zftl_flash_de_init, .-zftl_flash_de_init
 	.section	.text.nandc_randomizer_enable,"ax",%progbits
 	.align	1
@@ -3540,13 +3714,13 @@ nandc_randomizer_enable:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L603
+	ldr	r3, .L637
 	strb	r0, [r3]
 	bx	lr
-.L604:
+.L638:
 	.align	2
-.L603:
-	.word	.LANCHOR48
+.L637:
+	.word	.LANCHOR52
 	.size	nandc_randomizer_enable, .-nandc_randomizer_enable
 	.section	.text.nandc_get_chip_if,"ax",%progbits
 	.align	1
@@ -3560,14 +3734,14 @@ nandc_get_chip_if:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L606
+	ldr	r3, .L640
 	adds	r0, r0, #8
 	ldr	r3, [r3]
 	add	r0, r3, r0, lsl #8
 	bx	lr
-.L607:
+.L641:
 	.align	2
-.L606:
+.L640:
 	.word	.LANCHOR13
 	.size	nandc_get_chip_if, .-nandc_get_chip_if
 	.section	.text.buf_reinit,"ax",%progbits
@@ -3581,12 +3755,12 @@ nandc_get_chip_if:
 buf_reinit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L611
+	ldr	r3, .L645
 	movs	r2, #0
 	push	{r4, r5, lr}
 	mov	r1, r2
 	mov	r4, r3
-.L609:
+.L643:
 	uxtb	r0, r2
 	adds	r2, r2, #1
 	cmp	r2, #32
@@ -3596,20 +3770,20 @@ buf_reinit:
 	strb	r5, [r3]
 	add	r3, r3, #48
 	str	r1, [r3, #-40]
-	bne	.L609
+	bne	.L643
 	movs	r3, #255
 	strb	r3, [r4, #1488]
-	ldr	r3, .L611+4
+	ldr	r3, .L645+4
 	strb	r1, [r3]
-	ldr	r3, .L611+8
+	ldr	r3, .L645+8
 	strb	r2, [r3]
 	pop	{r4, r5, pc}
-.L612:
+.L646:
 	.align	2
-.L611:
-	.word	.LANCHOR52
-	.word	.LANCHOR53
-	.word	.LANCHOR54
+.L645:
+	.word	.LANCHOR56
+	.word	.LANCHOR57
+	.word	.LANCHOR58
 	.size	buf_reinit, .-buf_reinit
 	.section	.text.buf_add_tail,"ax",%progbits
 	.align	1
@@ -3629,47 +3803,47 @@ buf_add_tail:
 	mov	r4, r1
 	ldrb	r3, [r0]	@ zero_extendqisi2
 	cmp	r3, #255
-	bne	.L614
+	bne	.L648
 	ldrb	r3, [r1, #1]	@ zero_extendqisi2
 	cmp	r3, #255
-	bne	.L615
+	bne	.L649
 	movs	r2, #74
-	ldr	r1, .L620
-	ldr	r0, .L620+4
+	ldr	r1, .L654
+	ldr	r0, .L654+4
 	bl	printf
-.L615:
+.L649:
 	ldrb	r3, [r4, #1]	@ zero_extendqisi2
 	strb	r3, [r5]
 	pop	{r4, r5, r6, pc}
-.L614:
-	ldr	r2, .L620+8
+.L648:
+	ldr	r2, .L654+8
 	movs	r1, #48
 	mov	r6, r2
-.L619:
+.L653:
 	mov	r5, r3
 	muls	r3, r1, r3
 	ldrb	r3, [r2, r3]	@ zero_extendqisi2
 	cmp	r3, #255
-	bne	.L619
+	bne	.L653
 	ldrb	r3, [r4, #1]	@ zero_extendqisi2
 	cmp	r3, #255
-	bne	.L617
+	bne	.L651
 	movs	r2, #81
-	ldr	r1, .L620
-	ldr	r0, .L620+4
+	ldr	r1, .L654
+	ldr	r0, .L654+4
 	bl	printf
-.L617:
+.L651:
 	movs	r3, #48
 	ldrb	r2, [r4, #1]	@ zero_extendqisi2
 	muls	r3, r5, r3
 	strb	r2, [r6, r3]
 	pop	{r4, r5, r6, pc}
-.L621:
+.L655:
 	.align	2
-.L620:
-	.word	.LANCHOR55
+.L654:
+	.word	.LANCHOR59
 	.word	.LC0
-	.word	.LANCHOR52
+	.word	.LANCHOR56
 	.size	buf_add_tail, .-buf_add_tail
 	.section	.text.queue_read_cmd,"ax",%progbits
 	.align	1
@@ -3693,13 +3867,13 @@ queue_read_cmd:
 	strb	r3, [r4, #43]
 	movs	r3, #255
 	strb	r3, [r4]
-	ldr	r0, .L623
+	ldr	r0, .L657
 	pop	{r4, lr}
 	b	buf_add_tail
-.L624:
+.L658:
 	.align	2
-.L623:
-	.word	.LANCHOR56
+.L657:
+	.word	.LANCHOR60
 	.size	queue_read_cmd, .-queue_read_cmd
 	.section	.text.zbuf_free,"ax",%progbits
 	.align	1
@@ -3717,30 +3891,30 @@ zbuf_free:
 	ldrb	r3, [r0, #2]	@ zero_extendqisi2
 	and	r3, r3, #8
 	strb	r3, [r0, #2]
-	cbz	r3, .L626
+	cbz	r3, .L660
 	ldr	r3, [r0, #20]
 	adds	r3, r3, #1
-	beq	.L626
-	ldr	r0, .L634
+	beq	.L660
+	ldr	r0, .L668
 	bl	buf_add_tail
-.L627:
-	ldr	r2, .L634+4
+.L661:
+	ldr	r2, .L668+4
 	ldrb	r3, [r2]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	strb	r3, [r2]
 	pop	{r3, pc}
-.L626:
-	ldr	r3, .L634
+.L660:
+	ldr	r3, .L668
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	strb	r2, [r1]
 	ldrb	r2, [r1, #1]	@ zero_extendqisi2
 	strb	r2, [r3]
-	b	.L627
-.L635:
+	b	.L661
+.L669:
 	.align	2
-.L634:
-	.word	.LANCHOR53
-	.word	.LANCHOR54
+.L668:
+	.word	.LANCHOR57
+	.word	.LANCHOR58
 	.size	zbuf_free, .-zbuf_free
 	.section	.text.buf_alloc,"ax",%progbits
 	.align	1
@@ -3755,17 +3929,17 @@ buf_alloc:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r7, r0
-	ldr	r4, .L646
+	ldr	r4, .L680
 	ldrb	r3, [r4]	@ zero_extendqisi2
-	cbz	r3, .L637
-.L640:
-	ldr	r5, .L646+4
-	ldr	r2, .L646+8
+	cbz	r3, .L671
+.L674:
+	ldr	r5, .L680+4
+	ldr	r2, .L680+8
 	ldrb	r6, [r5]	@ zero_extendqisi2
 	add	r0, r6, r6, lsl #1
 	add	r0, r2, r0, lsl #4
-	cbz	r7, .L638
-.L639:
+	cbz	r7, .L672
+.L673:
 	movs	r1, #48
 	muls	r1, r6, r1
 	ldrb	r6, [r2, r1]	@ zero_extendqisi2
@@ -3786,29 +3960,29 @@ buf_alloc:
 	strb	r2, [r3, #40]
 	strb	r2, [r3, #41]
 	pop	{r3, r4, r5, r6, r7, pc}
-.L637:
+.L671:
 	movs	r2, #121
-	ldr	r1, .L646+12
-	ldr	r0, .L646+16
+	ldr	r1, .L680+12
+	ldr	r0, .L680+16
 	bl	printf
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L640
-.L642:
+	bne	.L674
+.L676:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L638:
+.L672:
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L639
-	b	.L642
-.L647:
+	bne	.L673
+	b	.L676
+.L681:
 	.align	2
-.L646:
-	.word	.LANCHOR54
-	.word	.LANCHOR53
-	.word	.LANCHOR52
+.L680:
+	.word	.LANCHOR58
 	.word	.LANCHOR57
+	.word	.LANCHOR56
+	.word	.LANCHOR61
 	.word	.LC0
 	.size	buf_alloc, .-buf_alloc
 	.section	.text.buf_remove_buf,"ax",%progbits
@@ -3826,36 +4000,36 @@ buf_remove_buf:
 	ldrb	r4, [r1, #1]	@ zero_extendqisi2
 	ldrb	r3, [r0]	@ zero_extendqisi2
 	cmp	r4, r3
-	bne	.L649
+	bne	.L683
 	ldrb	r3, [r1]	@ zero_extendqisi2
 	strb	r3, [r0]
-.L654:
+.L688:
 	movs	r0, #1
 	pop	{r4, r5, pc}
-.L652:
+.L686:
 	mov	r5, r3
 	muls	r3, r2, r3
 	ldrb	r3, [r0, r3]	@ zero_extendqisi2
 	cmp	r4, r3
-	bne	.L651
+	bne	.L685
 	muls	r2, r5, r2
 	ldrb	r3, [r1]	@ zero_extendqisi2
 	strb	r3, [r0, r2]
 	movs	r3, #255
 	strb	r3, [r1]
-	b	.L654
-.L649:
-	ldr	r0, .L655
+	b	.L688
+.L683:
+	ldr	r0, .L689
 	movs	r2, #48
-.L651:
+.L685:
 	cmp	r3, #255
-	bne	.L652
+	bne	.L686
 	movs	r0, #0
 	pop	{r4, r5, pc}
-.L656:
+.L690:
 	.align	2
-.L655:
-	.word	.LANCHOR52
+.L689:
+	.word	.LANCHOR56
 	.size	buf_remove_buf, .-buf_remove_buf
 	.section	.text.buf_remove_free,"ax",%progbits
 	.align	1
@@ -3870,37 +4044,117 @@ buf_remove_free:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	mov	r5, r0
-	ldr	r4, .L662
+	ldr	r4, .L696
 	ldrb	r3, [r4]	@ zero_extendqisi2
-	cbnz	r3, .L658
+	cbnz	r3, .L692
 	movs	r2, #172
-	ldr	r1, .L662+4
-	ldr	r0, .L662+8
+	ldr	r1, .L696+4
+	ldr	r0, .L696+8
 	bl	printf
-.L658:
+.L692:
 	ldrb	r3, [r4]	@ zero_extendqisi2
-	cbz	r3, .L657
+	cbz	r3, .L691
 	mov	r1, r5
-	ldr	r0, .L662+12
+	ldr	r0, .L696+12
 	bl	buf_remove_buf
 	cmp	r0, #1
-	bne	.L657
+	bne	.L691
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	strb	r3, [r4]
 	ldrb	r3, [r5, #2]	@ zero_extendqisi2
 	orr	r3, r3, #1
 	strb	r3, [r5, #2]
-.L657:
+.L691:
 	pop	{r3, r4, r5, pc}
-.L663:
+.L697:
 	.align	2
-.L662:
-	.word	.LANCHOR54
+.L696:
 	.word	.LANCHOR58
+	.word	.LANCHOR62
 	.word	.LC0
-	.word	.LANCHOR53
+	.word	.LANCHOR57
 	.size	buf_remove_free, .-buf_remove_free
+	.section	.text.dump_buf_info,"ax",%progbits
+	.align	1
+	.global	dump_buf_info
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	dump_buf_info, %function
+dump_buf_info:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L701
+	push	{r4, r5, r6, lr}
+	sub	sp, sp, #24
+	ldr	r0, .L701+4
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	bl	printf
+	ldr	r3, .L701+8
+	ldr	r0, .L701+12
+	ldr	r4, .L701+16
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	bl	printf
+	ldr	r3, .L701+20
+	add	r5, r4, #1536
+	ldr	r0, .L701+24
+	ldr	r6, .L701+28
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	bl	printf
+	ldr	r3, .L701+32
+	ldr	r0, .L701+36
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	bl	printf
+	ldr	r3, .L701+40
+	ldr	r0, .L701+44
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	bl	printf
+	ldr	r3, .L701+48
+	ldr	r0, .L701+52
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	bl	printf
+.L699:
+	ldr	r0, [r4, #24]
+	adds	r4, r4, #48
+	ldrb	r3, [r4, #-46]	@ zero_extendqisi2
+	ldrb	r2, [r4, #-48]	@ zero_extendqisi2
+	str	r0, [sp, #16]
+	ldr	r0, [r4, #-28]
+	ldrb	r1, [r4, #-47]	@ zero_extendqisi2
+	str	r0, [sp, #12]
+	ldr	r0, [r4, #-12]
+	str	r0, [sp, #8]
+	ldrb	r0, [r4, #-6]	@ zero_extendqisi2
+	str	r0, [sp, #4]
+	ldrh	r0, [r4, #-14]
+	str	r0, [sp]
+	mov	r0, r6
+	bl	printf
+	cmp	r4, r5
+	bne	.L699
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, pc}
+.L702:
+	.align	2
+.L701:
+	.word	.LANCHOR60
+	.word	.LC41
+	.word	.LANCHOR63
+	.word	.LC42
+	.word	.LANCHOR56
+	.word	.LANCHOR64
+	.word	.LC43
+	.word	.LC47
+	.word	.LANCHOR65
+	.word	.LC44
+	.word	.LANCHOR57
+	.word	.LC45
+	.word	.LANCHOR58
+	.word	.LC46
+	.size	dump_buf_info, .-dump_buf_info
 	.section	.text.flash_check_bad_block,"ax",%progbits
 	.align	1
 	.global	flash_check_bad_block
@@ -3912,14 +4166,14 @@ buf_remove_free:
 flash_check_bad_block:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L665
+	ldr	r2, .L704
 	push	{r4, lr}
 	lsrs	r4, r1, #5
 	and	r1, r1, #31
 	ldrb	r3, [r2, #13]	@ zero_extendqisi2
 	ldrh	r2, [r2, #14]
 	smulbb	r3, r3, r2
-	ldr	r2, .L665+4
+	ldr	r2, .L704+4
 	uxth	r3, r3
 	ldr	r2, [r2]
 	adds	r3, r3, #31
@@ -3932,10 +4186,10 @@ flash_check_bad_block:
 	lsrs	r0, r0, r1
 	and	r0, r0, #1
 	pop	{r4, pc}
-.L666:
+.L705:
 	.align	2
-.L665:
-	.word	.LANCHOR32
+.L704:
+	.word	.LANCHOR33
 	.word	.LANCHOR27
 	.size	flash_check_bad_block, .-flash_check_bad_block
 	.section	.text.flash_mask_bad_block,"ax",%progbits
@@ -3949,7 +4203,7 @@ flash_check_bad_block:
 flash_mask_bad_block:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L668
+	ldr	r3, .L707
 	mov	r2, r1
 	push	{r4, r5, r6, lr}
 	mov	r5, r0
@@ -3957,11 +4211,11 @@ flash_mask_bad_block:
 	mov	r1, r0
 	ldrb	r4, [r3, #13]	@ zero_extendqisi2
 	ldrh	r3, [r3, #14]
-	ldr	r0, .L668+4
+	ldr	r0, .L707+4
 	smulbb	r4, r4, r3
 	bl	printf
 	uxth	r4, r4
-	ldr	r3, .L668+8
+	ldr	r3, .L707+8
 	add	r0, r4, #31
 	asrs	r0, r0, #5
 	ldr	r2, [r3]
@@ -3978,11 +4232,11 @@ flash_mask_bad_block:
 	orrs	r3, r3, r6
 	str	r3, [r2, r0]
 	pop	{r4, r5, r6, pc}
-.L669:
+.L708:
 	.align	2
-.L668:
-	.word	.LANCHOR32
-	.word	.LC42
+.L707:
+	.word	.LANCHOR33
+	.word	.LC48
 	.word	.LANCHOR27
 	.size	flash_mask_bad_block, .-flash_mask_bad_block
 	.section	.text.ftl_gc_write_buf,"ax",%progbits
@@ -4001,19 +4255,19 @@ ftl_gc_write_buf:
 	ldrb	r3, [r0, #2]	@ zero_extendqisi2
 	orr	r3, r3, #2
 	strb	r3, [r0, #2]
-	ldr	r0, .L671
+	ldr	r0, .L710
 	bl	buf_add_tail
-	ldr	r3, .L671+4
+	ldr	r3, .L710+4
 	ldrb	r0, [r3]	@ zero_extendqisi2
 	adds	r0, r0, #1
 	uxtb	r0, r0
 	strb	r0, [r3]
 	pop	{r3, pc}
-.L672:
+.L711:
 	.align	2
-.L671:
-	.word	.LANCHOR59
-	.word	.LANCHOR60
+.L710:
+	.word	.LANCHOR66
+	.word	.LANCHOR67
 	.size	ftl_gc_write_buf, .-ftl_gc_write_buf
 	.section	.text.zftl_cache_flush,"ax",%progbits
 	.align	1
@@ -4041,20 +4295,20 @@ zftl_get_density:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	cbnz	r0, .L675
-	ldr	r3, .L678
+	cbnz	r0, .L714
+	ldr	r3, .L717
 	ldr	r0, [r3]
 	bx	lr
-.L675:
+.L714:
 	cmp	r0, #4
 	ite	cc
 	movcc	r0, #8192
 	movcs	r0, #0
 	bx	lr
-.L679:
+.L718:
 	.align	2
-.L678:
-	.word	.LANCHOR61
+.L717:
+	.word	.LANCHOR68
 	.size	zftl_get_density, .-zftl_get_density
 	.section	.text.gc_hook,"ax",%progbits
 	.align	1
@@ -4084,6 +4338,20 @@ vpn_check:
 	@ link register save eliminated.
 	bx	lr
 	.size	vpn_check, .-vpn_check
+	.section	.text.ftl_scan_all_data,"ax",%progbits
+	.align	1
+	.global	ftl_scan_all_data
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_scan_all_data, %function
+ftl_scan_all_data:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	ftl_scan_all_data, .-ftl_scan_all_data
 	.section	.text.FtlGetCurEraseBlock,"ax",%progbits
 	.align	1
 	.global	FtlGetCurEraseBlock
@@ -4096,13 +4364,13 @@ FtlGetCurEraseBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L683
+	ldr	r3, .L723
 	ldrh	r0, [r3]
 	bx	lr
-.L684:
+.L724:
 	.align	2
-.L683:
-	.word	.LANCHOR62
+.L723:
+	.word	.LANCHOR69
 	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
 	.section	.text.FtlGetAllBlockNum,"ax",%progbits
 	.align	1
@@ -4116,12 +4384,12 @@ FtlGetAllBlockNum:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L686
+	ldr	r3, .L726
 	ldrh	r0, [r3]
 	bx	lr
-.L687:
+.L727:
 	.align	2
-.L686:
+.L726:
 	.word	.LANCHOR6
 	.size	FtlGetAllBlockNum, .-FtlGetAllBlockNum
 	.section	.text.FtlLowFormat,"ax",%progbits
@@ -4152,135 +4420,135 @@ gc_add_sblk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r8, r2
-	ldr	r3, .L724
+	ldr	r3, .L764
 	mov	r5, r0
 	mov	r4, r1
 	ldr	r2, [r3]
 	mov	r10, r3
 	tst	r2, #256
-	beq	.L690
-	ldr	r3, .L724+4
+	beq	.L730
+	ldr	r3, .L764+4
 	mov	r2, r1
 	mov	r1, r0
 	ldrh	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L724+8
+	ldr	r3, .L764+8
 	ldrh	r3, [r3, #52]
 	str	r3, [sp, #8]
-	ldr	r3, .L724+12
+	ldr	r3, .L764+12
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	str	r3, [sp, #4]
-	ldr	r3, .L724+16
+	ldr	r3, .L764+16
 	ldr	r3, [r3]
 	add	r3, r3, r0, lsl #2
-	ldr	r0, .L724+20
+	ldr	r0, .L764+20
 	ldrb	r3, [r3, #2]	@ zero_extendqisi2
 	lsrs	r3, r3, #5
 	str	r3, [sp]
 	mov	r3, r8
 	bl	printf
-.L690:
-	ldr	r6, .L724+24
+.L730:
+	ldr	r6, .L764+24
 	ldrh	r2, [r6]
 	cmp	r2, r5
-	bhi	.L691
-	mov	r2, #454
-	ldr	r1, .L724+28
-	ldr	r0, .L724+32
+	bhi	.L731
+	movw	r2, #543
+	ldr	r1, .L764+28
+	ldr	r0, .L764+32
 	bl	printf
-.L691:
+.L731:
 	ldrh	r3, [r6]
 	cmp	r3, r5
-	bhi	.L692
+	bhi	.L732
 	ldr	r0, [r10]
 	ands	r0, r0, #1024
-	beq	.L689
+	beq	.L729
 	mov	r3, r8
 	mov	r2, r4
 	mov	r1, r5
-	ldr	r0, .L724+36
+	ldr	r0, .L764+36
 	bl	printf
-.L712:
+.L752:
 	movs	r0, #0
-	b	.L689
-.L692:
-	ldr	r2, .L724+16
-	ldr	r3, .L724+12
+	b	.L729
+.L732:
+	ldr	r2, .L764+16
+	ldr	r3, .L764+12
 	ldr	r2, [r2]
 	ldr	r3, [r3]
 	add	r2, r2, r5, lsl #2
 	ldrh	r3, [r3, r5, lsl #1]
 	ldrb	r2, [r2, #2]	@ zero_extendqisi2
 	ands	r6, r2, #224
-	bne	.L694
+	bne	.L734
 	cmp	r3, #0
-	beq	.L712
-	movw	r2, #461
-	ldr	r1, .L724+28
-	ldr	r0, .L724+32
-	bl	printf
-	b	.L712
-.L694:
-	ldr	r6, .L724+8
+	beq	.L752
+	movw	r2, #553
+	ldr	r1, .L764+28
+	ldr	r0, .L764+32
+	bl	printf
+	b	.L752
+.L734:
+	ldr	r6, .L764+8
 	ldrh	r1, [r6]
 	cmp	r1, r5
-	beq	.L712
-	ldr	r7, .L724+40
+	beq	.L752
+	ldr	r7, .L764+40
 	ldr	r1, [r7]
 	ldrh	r0, [r1, #48]
 	cmp	r0, r5
-	beq	.L712
+	beq	.L752
 	ldrh	r0, [r1, #16]
 	cmp	r0, r5
-	beq	.L712
+	beq	.L752
 	ldrh	r0, [r1, #80]
 	cmp	r0, r5
-	beq	.L712
+	beq	.L752
 	ldrh	ip, [r6, #52]!
 	movs	r0, #0
-.L695:
+.L735:
 	cmp	r0, ip
-	bcc	.L696
+	bcc	.L736
 	cmp	r4, #0
-	bne	.L700
-	ldr	r0, .L724+44
+	bne	.L740
+	ldr	r0, .L764+44
 	ldrh	r6, [r0]
 	mov	r0, r4
 	cmp	r5, r6
-	beq	.L689
-	ldr	lr, .L724+56
-.L699:
+	beq	.L729
+	ldr	lr, .L764+56
+.L739:
 	ldrh	fp, [lr, r0, lsl #1]
 	cmp	r5, fp
-	bne	.L698
+	bne	.L738
 	ldr	r0, [r10]
 	ands	r0, r0, #256
-	beq	.L689
+	beq	.L729
 	stm	sp, {r5, r6}
 	lsrs	r2, r2, #5
 	mov	r1, r5
-	ldr	r0, .L724+48
+	ldr	r0, .L764+48
 	bl	printf
-	b	.L712
-.L696:
+	b	.L752
+.L736:
 	ldrh	lr, [r6, #2]!
 	cmp	lr, r5
-	beq	.L712
+	beq	.L752
 	adds	r0, r0, #1
-	b	.L695
-.L698:
+	b	.L735
+.L738:
 	adds	r0, r0, #1
 	cmp	r0, #8
-	bne	.L699
+	bne	.L739
 	add	r1, r1, r8, lsl #7
 	add	r6, r1, #136
-.L701:
+.L741:
 	ldr	r1, [r10]
 	lsls	r1, r1, #23
-	bpl	.L702
-	ldr	r1, .L724+4
-	ldr	r0, .L724+52
+	bpl	.L742
+	ldr	r1, .L764+4
+	ldr	r0, .L764+52
 	ldrh	r1, [r1]
 	stm	sp, {r3, ip}
 	lsrs	r3, r2, #5
@@ -4288,60 +4556,60 @@ gc_add_sblk:
 	str	r1, [sp, #8]
 	mov	r1, r5
 	bl	printf
-.L702:
+.L742:
 	mov	r3, r6
 	add	r1, r6, #128
 	movw	r0, #65535
-.L705:
+.L745:
 	mov	r2, r3
 	adds	r3, r3, #2
 	ldrh	r6, [r2]
 	cmp	r6, r0
-	bne	.L703
+	bne	.L743
 	strh	r5, [r2]	@ movhi
-	cbz	r4, .L704
+	cbz	r4, .L744
 	ldr	r2, [r7]
 	ldrh	r3, [r2, #124]
 	adds	r3, r3, #1
 	strh	r3, [r2, #124]	@ movhi
-.L723:
+.L763:
 	movs	r0, #1
-.L689:
+.L729:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L700:
+.L740:
 	add	r6, r1, #392
-	b	.L701
-.L704:
+	b	.L741
+.L744:
 	ldr	r3, [r7]
 	add	r8, r3, r8, lsl #1
 	ldrh	r3, [r8, #120]
 	adds	r3, r3, #1
 	strh	r3, [r8, #120]	@ movhi
-	b	.L723
-.L703:
+	b	.L763
+.L743:
 	cmp	r3, r1
-	bne	.L705
-	b	.L723
-.L725:
+	bne	.L745
+	b	.L763
+.L765:
 	.align	2
-.L724:
+.L764:
 	.word	.LANCHOR14
-	.word	.LANCHOR63
-	.word	.LANCHOR64
+	.word	.LANCHOR70
+	.word	.LANCHOR71
 	.word	.LANCHOR9
 	.word	.LANCHOR7
-	.word	.LC43
+	.word	.LC49
 	.word	.LANCHOR6
-	.word	.LANCHOR65
+	.word	.LANCHOR72
 	.word	.LC0
-	.word	.LC44
+	.word	.LC50
 	.word	.LANCHOR10
-	.word	.LANCHOR66
-	.word	.LC45
-	.word	.LC46
-	.word	.LANCHOR67
+	.word	.LANCHOR73
+	.word	.LC51
+	.word	.LC52
+	.word	.LANCHOR74
 	.size	gc_add_sblk, .-gc_add_sblk
 	.section	.text.gc_mark_bad_ppa,"ax",%progbits
 	.align	1
@@ -4356,17 +4624,17 @@ gc_mark_bad_ppa:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
 	mov	r7, r0
-	ldr	r3, .L730
+	ldr	r3, .L770
 	movs	r6, #1
-	ldr	r2, .L730+4
+	ldr	r2, .L770+4
 	ldrh	r3, [r3]
-	ldr	r8, .L730+16
+	ldr	r8, .L770+16
 	lsr	r4, r0, r3
 	ldrb	r0, [r2]	@ zero_extendqisi2
 	uxth	r5, r4
 	rsb	r0, r0, #24
 	subs	r0, r0, r3
-	ldr	r3, .L730+8
+	ldr	r3, .L770+8
 	lsl	r0, r6, r0
 	subs	r0, r0, #1
 	ldrb	r1, [r3]	@ zero_extendqisi2
@@ -4375,43 +4643,43 @@ gc_mark_bad_ppa:
 	uxth	r10, r0
 	mov	r3, r7
 	mov	r2, r5
-	ldr	r1, [r8, #580]
-	ldr	r0, .L730+12
+	ldr	r1, [r8, #2116]
+	ldr	r0, .L770+12
 	bl	printf
 	mov	r1, r6
 	movs	r2, #0
 	mov	r0, r10
 	bl	gc_add_sblk
-	ldr	r3, [r8, #580]
+	ldr	r3, [r8, #2116]
 	movs	r1, #0
-.L727:
+.L767:
 	uxth	r2, r1
 	cmp	r3, r2
-	bhi	.L729
+	bhi	.L769
 	cmp	r3, #5
 	itttt	ls
 	addls	r2, r3, #1
-	addls	r3, r3, #292
-	strls	r2, [r8, #580]
+	addwls	r3, r3, #1060
+	strls	r2, [r8, #2116]
 	strhls	r5, [r8, r3, lsl #1]	@ movhi
-	b	.L728
-.L729:
-	add	r2, r2, #292
+	b	.L768
+.L769:
+	addw	r2, r2, #1060
 	adds	r1, r1, #1
 	ldrh	r2, [r8, r2, lsl #1]
 	cmp	r5, r2
-	bne	.L727
-.L728:
+	bne	.L767
+.L768:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L731:
+.L771:
 	.align	2
-.L730:
-	.word	.LANCHOR68
-	.word	.LANCHOR31
-	.word	.LANCHOR69
-	.word	.LC47
-	.word	.LANCHOR64
+.L770:
+	.word	.LANCHOR75
+	.word	.LANCHOR32
+	.word	.LANCHOR76
+	.word	.LC53
+	.word	.LANCHOR71
 	.size	gc_mark_bad_ppa, .-gc_mark_bad_ppa
 	.section	.text.gc_get_src_ppa_from_index,"ax",%progbits
 	.align	1
@@ -4425,14 +4693,14 @@ gc_get_src_ppa_from_index:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L733
+	ldr	r3, .L773
 	ldr	r3, [r3]
 	ldr	r0, [r3, r0, lsl #2]
 	bx	lr
-.L734:
+.L774:
 	.align	2
-.L733:
-	.word	.LANCHOR70
+.L773:
+	.word	.LANCHOR77
 	.size	gc_get_src_ppa_from_index, .-gc_get_src_ppa_from_index
 	.section	.text.gc_write_completed,"ax",%progbits
 	.align	1
@@ -4445,172 +4713,175 @@ gc_get_src_ppa_from_index:
 gc_write_completed:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r4, .L764
-.L736:
-	ldr	r1, .L764+4
-	ldrb	r7, [r1]	@ zero_extendqisi2
-	cmp	r7, #255
-	bne	.L749
-	add	sp, sp, #16
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r5, .L802
+.L776:
+	ldr	r1, .L802+4
+	ldrb	r8, [r1]	@ zero_extendqisi2
+	cmp	r8, #255
+	bne	.L789
+	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L749:
+.L789:
 	movs	r3, #48
-	muls	r3, r7, r3
-	adds	r2, r4, r3
-	ldrb	r3, [r4, r3]	@ zero_extendqisi2
+	mul	r3, r3, r8
+	adds	r2, r5, r3
+	ldrb	r3, [r5, r3]	@ zero_extendqisi2
 	ldrh	r6, [r2, #32]
 	strb	r3, [r1]
 	ldr	r1, [r2, #36]
-	cbz	r1, .L737
-	ldr	r3, .L764+8
+	cbz	r1, .L777
+	ldr	r3, .L802+8
 	movs	r0, #1
 	ldr	r2, [r2, #24]
-	strh	r0, [r3, #572]	@ movhi
-	ldr	r0, .L764+12
-	str	r2, [r3, #576]
+	strh	r0, [r3, #2108]	@ movhi
+	ldr	r0, .L802+12
+	str	r2, [r3, #2112]
 	bl	printf
-	mov	r2, #804
-	ldr	r1, .L764+16
-	ldr	r0, .L764+20
+	mov	r2, #956
+	ldr	r1, .L802+16
+	ldr	r0, .L802+20
 	bl	printf
-.L737:
-	ldr	fp, .L764+52
-	ldrb	r3, [fp]	@ zero_extendqisi2
+.L777:
+	ldr	r10, .L802+56
+	ldrb	r3, [r10]	@ zero_extendqisi2
 	cmp	r3, #3
-	bne	.L738
-	ldr	r3, .L764+24
+	bne	.L778
+	ldr	r3, .L802+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L738
-	ldr	r3, .L764+28
-	ldr	r3, [r3]
-	ldrb	r5, [r3, #89]	@ zero_extendqisi2
-	add	r5, r5, r5, lsl #1
-.L739:
-	ldr	r3, .L764+32
-	ldr	r10, .L764+56
+	bne	.L778
+	ldr	r3, .L802+28
 	ldr	r3, [r3]
-	tst	r3, #256
-	beq	.L740
-	ldr	r1, [r10]
+	ldrb	r4, [r3, #89]	@ zero_extendqisi2
+	ldr	r3, .L802+32
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r4
+	bhi	.L790
+	cmp	r4, #2
+	it	cs
+	movcs	r4, #2
+.L779:
+	add	r4, r4, r4, lsl #1
+.L780:
+	ldr	r3, .L802+36
 	movs	r2, #48
-	mla	r2, r2, r7, r4
-	ldr	r0, .L764+36
-	ldrb	r1, [r1, r6]	@ zero_extendqisi2
-	ldrh	r3, [r2, #32]
+	mla	r2, r2, r8, r5
+	ldr	r1, [r3]
+	mov	r7, r6
+	mov	fp, r3
 	ldrb	r2, [r2, #1]	@ zero_extendqisi2
-	str	r1, [sp]
-	mov	r1, r6
-	bl	printf
-.L740:
-	movs	r3, #48
-	ldr	r2, [r10]
-	mla	r3, r3, r7, r4
-	ldrb	r2, [r2, r6]	@ zero_extendqisi2
-	mov	r8, r6
-	ldrb	r3, [r3, #1]	@ zero_extendqisi2
-	cmp	r2, r3
-	beq	.L741
-	movw	r2, #813
-	ldr	r1, .L764+16
-	ldr	r0, .L764+20
+	ldrb	r1, [r1, r6]	@ zero_extendqisi2
+	cmp	r1, r2
+	beq	.L781
+	mov	r2, #976
+	ldr	r1, .L802+16
+	ldr	r0, .L802+20
+	str	r3, [sp, #4]
 	bl	printf
-.L741:
-	movs	r3, #48
-	mla	r7, r3, r7, r4
-	ldrb	r3, [r7, #45]	@ zero_extendqisi2
-	cmp	r3, #3
-	beq	.L742
-	ldrb	r3, [fp]	@ zero_extendqisi2
-	cmp	r3, #3
-	bne	.L742
-	ldr	r3, .L764+40
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L742
-	ldr	r3, .L764+24
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L742
-	ldr	r3, .L764+44
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L743
-	ldr	r3, .L764+48
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L742
-.L743:
-	ldr	r2, [r10]
+	ldr	r3, [sp, #4]
+.L781:
+	movs	r2, #48
+	mla	r8, r2, r8, r5
+	ldrb	r2, [r8, #45]	@ zero_extendqisi2
+	cmp	r2, #3
+	beq	.L782
+	ldrb	r2, [r10]	@ zero_extendqisi2
+	cmp	r2, #3
+	bne	.L782
+	ldr	r2, .L802+40
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbnz	r2, .L782
+	ldr	r2, .L802+24
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbnz	r2, .L782
+	ldr	r2, .L802+44
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbnz	r2, .L782
+	ldr	r2, .L802+48
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbz	r2, .L783
+	ldr	r2, .L802+52
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbnz	r2, .L782
+.L783:
+	ldr	r2, [r3]
 	movs	r3, #0
 	movs	r1, #48
 	mov	r0, r3
 	add	r6, r6, r2
-.L744:
+.L784:
 	uxth	r2, r3
-	cmp	r5, r2
-	bls	.L736
+	cmp	r4, r2
+	bls	.L776
 	ldrb	r2, [r6, r3]	@ zero_extendqisi2
 	adds	r3, r3, #1
-	mla	r2, r1, r2, r4
+	mla	r2, r1, r2, r5
 	strb	r0, [r2, #45]
-	b	.L744
-.L738:
-	ldr	r3, .L764+44
+	b	.L784
+.L790:
+	movs	r4, #1
+	b	.L779
+.L778:
+	ldr	r3, .L802+48
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L750
-	ldr	r3, .L764+48
+	cbz	r3, .L791
+	ldr	r3, .L802+52
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
 	ite	eq
-	moveq	r5, #1
-	movne	r5, #2
-	b	.L739
-.L750:
-	movs	r5, #1
-	b	.L739
-.L742:
-	ldr	r7, .L764+8
-	mov	fp, #255
+	moveq	r4, #1
+	movne	r4, #2
+	b	.L780
+.L791:
+	movs	r4, #1
+	b	.L780
+.L782:
+	ldr	r3, .L802+8
+	mov	r10, #255
+	strh	r6, [r3, #2104]	@ movhi
+	mov	r8, r3
 	movs	r3, #48
-	strh	r6, [r7, #568]	@ movhi
-.L745:
-	sub	r2, r8, r6
+.L785:
+	subs	r2, r7, r6
 	uxth	r2, r2
-	cmp	r5, r2
-	bls	.L736
-	ldr	r2, [r10]
+	cmp	r4, r2
+	bls	.L776
+	ldr	r2, [fp]
 	movs	r1, #0
-	str	r3, [sp, #12]
-	ldrb	r0, [r2, r8]	@ zero_extendqisi2
-	strb	fp, [r2, r8]
-	add	r8, r8, #1
-	mla	r2, r3, r0, r4
+	str	r3, [sp, #4]
+	ldrb	r0, [r2, r7]	@ zero_extendqisi2
+	strb	r10, [r2, r7]
+	adds	r7, r7, #1
+	mla	r2, r3, r0, r5
 	add	r0, r0, r0, lsl #1
 	strb	r1, [r2, #45]
-	add	r0, r4, r0, lsl #4
+	add	r0, r5, r0, lsl #4
 	bl	zbuf_free
-	ldrb	r2, [r7, #7]	@ zero_extendqisi2
-	ldr	r3, [sp, #12]
+	ldrb	r2, [r8, #7]	@ zero_extendqisi2
+	ldr	r3, [sp, #4]
 	subs	r2, r2, #1
-	strb	r2, [r7, #7]
-	b	.L745
-.L765:
+	strb	r2, [r8, #7]
+	b	.L785
+.L803:
 	.align	2
-.L764:
-	.word	.LANCHOR52
-	.word	.LANCHOR71
+.L802:
+	.word	.LANCHOR56
 	.word	.LANCHOR64
-	.word	.LC48
-	.word	.LANCHOR72
+	.word	.LANCHOR71
+	.word	.LC54
+	.word	.LANCHOR78
 	.word	.LC0
-	.word	.LANCHOR35
+	.word	.LANCHOR36
 	.word	.LANCHOR10
-	.word	.LANCHOR14
-	.word	.LC49
-	.word	.LANCHOR77
-	.word	.LANCHOR74
-	.word	.LANCHOR75
-	.word	.LANCHOR73
-	.word	.LANCHOR76
+	.word	.LANCHOR80
+	.word	.LANCHOR83
+	.word	.LANCHOR84
+	.word	.LANCHOR37
+	.word	.LANCHOR81
+	.word	.LANCHOR82
+	.word	.LANCHOR79
 	.size	gc_write_completed, .-gc_write_completed
 	.section	.text.gc_get_src_blk,"ax",%progbits
 	.align	1
@@ -4623,54 +4894,54 @@ gc_write_completed:
 gc_get_src_blk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L775
+	ldr	r3, .L813
 	push	{r4, r5, r6, r7, lr}
 	ldr	r2, [r3]
-	ldr	r3, .L775+4
+	ldr	r3, .L813+4
 	ldrh	r4, [r2, #124]
 	ldrb	r1, [r3]	@ zero_extendqisi2
-	cbz	r4, .L767
+	cbz	r4, .L805
 	add	r3, r2, #392
 	movs	r4, #1
-.L768:
+.L806:
 	add	r6, r3, #128
 	movw	r5, #65535
-.L772:
+.L810:
 	mov	r7, r3
 	ldrh	r0, [r3], #2
 	cmp	r0, r5
-	beq	.L770
+	beq	.L808
 	strh	r5, [r7]	@ movhi
-	cbz	r4, .L771
+	cbz	r4, .L809
 	ldrh	r3, [r2, #124]
 	subs	r3, r3, #1
 	strh	r3, [r2, #124]	@ movhi
 	pop	{r4, r5, r6, r7, pc}
-.L767:
+.L805:
 	add	r3, r1, #60
 	ldrh	r3, [r2, r3, lsl #1]
-	cbz	r3, .L773
+	cbz	r3, .L811
 	add	r3, r2, r1, lsl #7
 	adds	r3, r3, #136
-	b	.L768
-.L771:
+	b	.L806
+.L809:
 	add	r2, r2, r1, lsl #1
 	ldrh	r3, [r2, #120]
 	subs	r3, r3, #1
 	strh	r3, [r2, #120]	@ movhi
 	pop	{r4, r5, r6, r7, pc}
-.L770:
+.L808:
 	cmp	r3, r6
-	bne	.L772
+	bne	.L810
 	pop	{r4, r5, r6, r7, pc}
-.L773:
+.L811:
 	movw	r0, #65535
 	pop	{r4, r5, r6, r7, pc}
-.L776:
+.L814:
 	.align	2
-.L775:
+.L813:
 	.word	.LANCHOR10
-	.word	.LANCHOR78
+	.word	.LANCHOR85
 	.size	gc_get_src_blk, .-gc_get_src_blk
 	.section	.text.gc_free_temp_buf,"ax",%progbits
 	.align	1
@@ -4684,55 +4955,55 @@ gc_free_temp_buf:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
-	ldr	r5, .L791
+	ldr	r5, .L829
 	ldrb	r0, [r5, #7]	@ zero_extendqisi2
-	cbz	r0, .L777
-	ldr	r3, .L791+4
+	cbz	r0, .L815
+	ldr	r3, .L829+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #1
-	bhi	.L784
-	ldr	r3, .L791+8
+	bhi	.L822
+	ldr	r3, .L829+8
 	movs	r7, #48
-	ldrh	r4, [r5, #568]
-	ldr	r6, .L791+12
+	ldrh	r4, [r5, #2104]
+	ldr	r6, .L829+12
 	ldrh	r2, [r3]
-	ldr	r3, .L791+16
+	ldr	r3, .L829+16
 	add	r1, r4, #24
-	ldr	r0, .L791+20
+	ldr	r0, .L829+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	muls	r2, r3, r2
 	cmp	r2, r1
 	it	cs
 	movcs	r2, r1
 	ldr	r1, [r6]
-.L779:
+.L817:
 	cmp	r4, r2
-	bcc	.L782
-.L784:
+	bcc	.L820
+.L822:
 	movs	r0, #0
-.L777:
+.L815:
 	pop	{r3, r4, r5, r6, r7, pc}
-.L782:
+.L820:
 	ldrb	r3, [r1, r4]	@ zero_extendqisi2
 	cmp	r3, #255
-	beq	.L780
+	beq	.L818
 	mla	ip, r7, r3, r0
 	ldrb	ip, [ip, #45]	@ zero_extendqisi2
 	cmp	ip, #0
-	bne	.L780
+	bne	.L818
 	add	r3, r3, r3, lsl #1
 	add	r0, r0, r3, lsl #4
 	bl	zbuf_free
-	ldr	r3, .L791+24
+	ldr	r3, .L829+24
 	ldr	r3, [r3]
 	lsls	r3, r3, #23
-	bpl	.L781
+	bpl	.L819
 	ldr	r3, [r6]
 	mov	r1, r4
-	ldr	r0, .L791+28
+	ldr	r0, .L829+28
 	ldrb	r2, [r3, r4]	@ zero_extendqisi2
 	bl	printf
-.L781:
+.L819:
 	ldr	r3, [r6]
 	movs	r2, #255
 	movs	r0, #1
@@ -4741,20 +5012,20 @@ gc_free_temp_buf:
 	subs	r3, r3, #1
 	strb	r3, [r5, #7]
 	pop	{r3, r4, r5, r6, r7, pc}
-.L780:
+.L818:
 	adds	r4, r4, #1
-	b	.L779
-.L792:
+	b	.L817
+.L830:
 	.align	2
-.L791:
-	.word	.LANCHOR64
-	.word	.LANCHOR54
-	.word	.LANCHOR79
-	.word	.LANCHOR76
+.L829:
+	.word	.LANCHOR71
+	.word	.LANCHOR58
+	.word	.LANCHOR86
+	.word	.LANCHOR83
 	.word	.LANCHOR80
-	.word	.LANCHOR52
+	.word	.LANCHOR56
 	.word	.LANCHOR14
-	.word	.LC50
+	.word	.LC55
 	.size	gc_free_temp_buf, .-gc_free_temp_buf
 	.section	.text.print_gc_debug_info,"ax",%progbits
 	.align	1
@@ -4768,30 +5039,30 @@ print_gc_debug_info:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, lr}
-	ldr	r4, .L794
-	ldr	r0, .L794+4
+	ldr	r4, .L832
+	ldr	r0, .L832+4
 	ldrh	r4, [r4]
-	ldrh	r3, [r0, #566]
+	ldrh	r3, [r0, #2102]
 	ldrh	r2, [r0, #2]
 	ldrh	r1, [r0]
 	str	r4, [sp, #8]
 	ldrb	r0, [r0, #7]	@ zero_extendqisi2
 	str	r0, [sp, #4]
-	ldr	r0, .L794+8
+	ldr	r0, .L832+8
 	ldrb	r0, [r0]	@ zero_extendqisi2
 	str	r0, [sp]
-	ldr	r0, .L794+12
+	ldr	r0, .L832+12
 	bl	printf
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, pc}
-.L795:
+.L833:
 	.align	2
-.L794:
-	.word	.LANCHOR81
-	.word	.LANCHOR64
-	.word	.LANCHOR54
-	.word	.LC51
+.L832:
+	.word	.LANCHOR87
+	.word	.LANCHOR71
+	.word	.LANCHOR58
+	.word	.LC56
 	.size	print_gc_debug_info, .-print_gc_debug_info
 	.section	.text.zftl_get_gc_node,"ax",%progbits
 	.align	1
@@ -4806,25 +5077,25 @@ zftl_get_gc_node:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	cmp	r1, #5
-	bne	.L797
-	ldr	r3, .L800
+	bne	.L835
+	ldr	r3, .L838
 	mov	r1, r0
-.L799:
+.L837:
 	ldr	r0, [r3]
 	b	_list_get_gc_head_node.isra.2
-.L797:
+.L835:
 	cmp	r1, #2
-	bne	.L798
+	bne	.L836
 	b	zftl_get_gc_node.part.9
-.L798:
+.L836:
 	mov	r1, r0
-	ldr	r3, .L800+4
-	b	.L799
-.L801:
+	ldr	r3, .L838+4
+	b	.L837
+.L839:
 	.align	2
-.L800:
-	.word	.LANCHOR82
-	.word	.LANCHOR83
+.L838:
+	.word	.LANCHOR88
+	.word	.LANCHOR89
 	.size	zftl_get_gc_node, .-zftl_get_gc_node
 	.section	.text.gc_search_src_blk,"ax",%progbits
 	.align	1
@@ -4837,545 +5108,678 @@ zftl_get_gc_node:
 gc_search_src_blk:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L901
+	ldr	r3, .L951
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #32
-	str	r2, [sp, #12]
-	add	r2, r0, #60
-	mov	fp, r0
-	ldr	r3, [r3]
-	str	r1, [sp, #16]
-	ldrh	r5, [r3, r2, lsl #1]
-	cbz	r5, .L803
-	mov	r0, r5
-.L802:
+	str	r0, [sp, #8]
+	mov	r6, r2
+	ldr	r0, [r3]
+	ldr	r3, [sp, #8]
+	str	r1, [sp, #20]
+	adds	r3, r3, #60
+	ldrh	r3, [r0, r3, lsl #1]
+	str	r3, [sp, #16]
+	cbz	r3, .L841
+	mov	r0, r3
+.L840:
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L803:
-	cmp	r0, #0
-	bne	.L805
-	ldr	r10, .L901+28
-	mov	r4, r0
-	ldr	r6, .L901+4
-	mov	r8, r0
-	strh	r0, [r6]	@ movhi
-.L806:
-	ldrh	r5, [sp, #12]
+.L841:
+	ldr	r3, .L951+4
+	ldrh	r2, [r3, #52]
+	cmp	r2, #1
+	bhi	.L843
+	ldrh	r4, [sp, #16]
+	ldr	r1, .L951+8
+	strh	r4, [r1]	@ movhi
+	ldr	r1, .L951+12
+	strh	r4, [r1]	@ movhi
+	ldr	r1, .L951+16
+	strh	r4, [r1]	@ movhi
+.L843:
+	ldr	r1, [sp, #8]
+	cmp	r1, #0
+	bne	.L844
+	ldr	r7, .L951+12
+	mov	r8, r1
+	mov	r4, r1
+.L845:
 	uxth	r3, r8
-	cmp	r3, r5
-	bcs	.L811
-	ldrh	r2, [r6]
+	cmp	r6, r3
+	blt	.L850
+	ldrh	r10, [r7]
 	movs	r1, #3
-	mov	r0, r2
-	str	r2, [sp, #20]
+	mov	r0, r10
 	bl	zftl_get_gc_node
-	ldr	r2, [sp, #20]
+	add	r2, r10, #1
 	movw	r3, #65535
-	cmp	r0, r3
-	mov	r7, r0
-	add	r2, r2, #1
 	uxth	r2, r2
-	strh	r2, [r6]	@ movhi
-	beq	.L807
-	ldr	r3, .L901+8
+	cmp	r0, r3
+	mov	r5, r0
+	strh	r2, [r7]	@ movhi
+	beq	.L846
+	ldr	r3, .L951+20
+	ldr	r10, .L951+40
 	ldr	r3, [r3]
-	lsls	r3, r3, #23
-	bpl	.L808
+	tst	r3, #256
+	beq	.L847
 	ldr	r3, [r10]
 	mov	r1, r0
 	ldrh	r3, [r3, r0, lsl #1]
-	ldr	r0, .L901+12
+	ldr	r0, .L951+24
 	bl	printf
-.L808:
+.L847:
 	ldr	r3, [r10]
-	ldrh	r2, [r3, r7, lsl #1]
-	ldr	r3, .L901+16
+	ldrh	r2, [r3, r5, lsl #1]
+	ldr	r3, .L951+28
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcs	.L807
+	bcs	.L846
 	movs	r2, #0
-	mov	r0, r7
+	mov	r0, r5
 	mov	r1, r2
 	bl	gc_add_sblk
 	cmp	r0, #0
-	beq	.L810
+	beq	.L849
 	adds	r4, r4, #1
 	uxth	r4, r4
-	cmp	r5, r4
-	bcs	.L810
-.L811:
-	ldr	r3, [sp, #16]
+	cmp	r4, r6
+	bcc	.L849
+.L850:
+	ldr	r3, [sp, #20]
 	lsls	r0, r3, #30
-	bpl	.L813
-	ldr	r6, .L901+20
-	mov	r8, #0
-	ldr	r7, .L901+24
-.L814:
-	uxth	r3, r8
-	cmp	r5, r3
-	bls	.L818
-	ldrh	r10, [r7]
+	bpl	.L852
+	ldr	r3, .L951+32
+	ldrh	r3, [r3]
+	cmp	r3, #32
+	bls	.L852
+	ldr	r5, .L951+36
+	mov	r10, #0
+	ldr	r7, .L951+16
+.L853:
+	uxth	r3, r10
+	cmp	r6, r3
+	blt	.L857
+	ldrh	r8, [r7]
 	movs	r1, #5
-	mov	r0, r10
-	add	r10, r10, #1
+	mov	r0, r8
+	add	r8, r8, #1
 	bl	zftl_get_gc_node
 	movw	r2, #65535
-	strh	r10, [r7]	@ movhi
+	strh	r8, [r7]	@ movhi
 	cmp	r0, r2
-	beq	.L815
-	ldr	r2, .L901+28
-	ldrh	r3, [r6]
+	beq	.L854
+	ldr	r2, .L951+40
+	ldrh	r3, [r5]
 	ldr	r2, [r2]
 	ldrh	r2, [r2, r0, lsl #1]
 	cmp	r2, r3
-	bcs	.L815
+	bcs	.L854
 	movs	r2, #0
 	mov	r1, r2
 	bl	gc_add_sblk
 	cmp	r0, #0
-	beq	.L817
+	beq	.L856
 	adds	r4, r4, #1
 	uxth	r4, r4
-	cmp	r5, r4
-	bcs	.L817
-.L818:
-	cmp	r4, r5
-	ldr	r1, .L901+32
-	bcs	.L820
-	ldr	r3, .L901+36
+	cmp	r4, r6
+	bcc	.L856
+.L857:
+	cmp	r4, r6
+	ldr	r1, .L951+44
+	bcs	.L859
+	ldr	r3, .L951+48
 	ldrh	r1, [r1]
-	ldrh	r2, [r6]
+	ldrh	r2, [r5]
 	ldrh	r0, [r3]
-	ldr	r3, .L901+40
+	ldr	r3, .L951+52
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	muls	r3, r0, r3
 	sub	r3, r3, r1, lsr #2
 	cmp	r2, r3
-	bge	.L813
+	bge	.L852
 	add	r2, r2, r1, lsr #3
-	strh	r2, [r6]	@ movhi
-.L813:
-	ldr	r3, [sp, #16]
+	strh	r2, [r5]	@ movhi
+.L852:
+	ldr	r3, [sp, #20]
 	lsls	r1, r3, #31
-	bpl	.L821
+	bpl	.L860
+	uxth	r5, r6
 	cmp	r4, r5
-	bcs	.L821
-	ldr	r8, .L901+48
-	movs	r6, #0
-	movw	r7, #65535
-.L826:
-	ldrh	r10, [r8]
-	mov	r0, r10
-	add	r10, r10, #1
+	bcs	.L860
+	ldr	r10, .L951+8
+	movs	r7, #0
+	movw	r8, #65535
+.L865:
+	ldrh	fp, [r10]
+	mov	r0, fp
+	add	fp, fp, #1
 	bl	zftl_get_gc_node.part.9
-	cmp	r0, r7
-	strh	r10, [r8]	@ movhi
-	beq	.L822
+	cmp	r0, r8
+	strh	fp, [r10]	@ movhi
+	beq	.L861
 	movs	r2, #0
 	mov	r1, r2
 	bl	gc_add_sblk
 	cmp	r0, #0
-	beq	.L823
+	beq	.L862
 	adds	r4, r4, #1
 	uxth	r4, r4
 	cmp	r5, r4
-	bhi	.L823
-.L824:
-	ldr	r3, .L901+32
-	ldr	r2, .L901+16
+	bhi	.L862
+.L863:
+	ldr	r3, .L951+44
+	ldr	r2, .L951+28
 	ldrh	r1, [r3]
 	ldrh	r3, [r2]
 	cmp	r3, r1, lsr #1
-	bls	.L821
+	bls	.L860
 	sub	r3, r3, r1, lsr #3
-	b	.L900
-.L807:
+	b	.L950
+.L846:
 	movs	r3, #0
-	strh	r3, [r6]	@ movhi
-	b	.L811
-.L810:
+	strh	r3, [r7]	@ movhi
+	b	.L850
+.L849:
 	add	r8, r8, #1
-	b	.L806
-.L815:
+	b	.L845
+.L854:
 	movs	r3, #0
 	strh	r3, [r7]	@ movhi
-	b	.L818
-.L817:
-	add	r8, r8, #1
-	b	.L814
-.L820:
-	ldrh	r3, [r6]
+	b	.L857
+.L856:
+	add	r10, r10, #1
+	b	.L853
+.L859:
+	ldrh	r3, [r5]
 	ldrh	r2, [r1]
 	cmp	r3, r2
 	itt	hi
 	subhi	r3, r3, r2, lsr #3
-	strhhi	r3, [r6]	@ movhi
-	b	.L813
-.L822:
+	strhhi	r3, [r5]	@ movhi
+	b	.L852
+.L861:
 	movs	r3, #0
-	strh	r3, [r8]	@ movhi
-.L825:
+	strh	r3, [r10]	@ movhi
+.L864:
 	cmp	r4, r5
-	bcs	.L824
-	ldr	r2, .L901+16
-	ldr	r1, .L901+32
+	bcs	.L863
+	ldr	r2, .L951+28
+	ldr	r1, .L951+44
 	ldrh	r3, [r2]
 	ldrh	r1, [r1]
 	cmp	r3, r1
-	bcs	.L821
+	bcs	.L860
 	add	r3, r3, r1, lsr #3
-.L900:
+.L950:
 	strh	r3, [r2]	@ movhi
-.L821:
-	ldr	r3, .L901+8
+.L860:
+	ldr	r3, .L951+20
 	ldr	r3, [r3]
 	lsls	r3, r3, #23
-	bpl	.L848
-	ldr	r3, [sp, #12]
-	mov	r1, fp
-	ldr	r2, [sp, #16]
-	ldr	r0, .L901+44
-	str	r3, [sp]
+	bpl	.L896
+	str	r6, [sp]
 	mov	r3, r4
+	ldr	r2, [sp, #20]
+	ldr	r1, [sp, #8]
+	ldr	r0, .L951+56
 	bl	printf
-.L848:
+.L896:
 	mov	r0, r4
-	b	.L802
-.L823:
-	adds	r6, r6, #1
-	uxth	r3, r6
+	b	.L840
+.L862:
+	adds	r7, r7, #1
+	uxth	r3, r7
 	cmp	r5, r3
-	bhi	.L826
-	b	.L825
-.L902:
+	bhi	.L865
+	b	.L864
+.L952:
 	.align	2
-.L901:
+.L951:
 	.word	.LANCHOR10
-	.word	.LANCHOR84
+	.word	.LANCHOR71
+	.word	.LANCHOR90
+	.word	.LANCHOR91
+	.word	.LANCHOR92
 	.word	.LANCHOR14
-	.word	.LC52
-	.word	.LANCHOR63
-	.word	.LANCHOR86
-	.word	.LANCHOR85
+	.word	.LC57
+	.word	.LANCHOR70
+	.word	.LANCHOR93
+	.word	.LANCHOR94
 	.word	.LANCHOR9
-	.word	.LANCHOR87
-	.word	.LANCHOR79
+	.word	.LANCHOR95
+	.word	.LANCHOR86
 	.word	.LANCHOR80
-	.word	.LC53
-	.word	.LANCHOR88
-.L805:
-	ldr	r3, .L903
-	strh	r5, [r3, #570]	@ movhi
-	ldr	r3, .L903+4
+	.word	.LC58
+.L844:
+	ldr	r1, .L953
+	cmp	r6, #1
+	ldr	r4, .L953+4
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	ldrh	r4, [r4]
+	smulbb	r1, r1, r4
+	uxth	r1, r1
+	str	r1, [sp, #12]
+	bne	.L866
+	cbz	r2, .L866
+	ldrh	r0, [r0, #80]
+	movw	r1, #65535
+	cmp	r0, r1
+	beq	.L899
+	ldr	r0, [sp, #12]
+	ldrh	r1, [r3, #2102]
+	subs	r1, r0, r1
+	uxth	r1, r1
+	str	r1, [sp, #12]
+.L899:
+	movs	r6, #8
+.L866:
+	movs	r5, #0
+	strh	r5, [r3, #2106]	@ movhi
+	ldr	r3, .L953+8
 	strh	r5, [r3]	@ movhi
-	ldr	r3, [sp, #16]
+	ldr	r3, [sp, #20]
 	ands	r3, r3, #1
-	str	r3, [sp, #20]
-	beq	.L851
-	ldr	r1, .L903+8
-	ldr	r2, .L903+12
-	ldr	r6, .L903+16
-	ldrh	r3, [r1]
-	mov	r10, r1
-	ldrh	r0, [r2]
-	str	r2, [sp, #24]
-	cmp	r3, r0, lsr #2
-	bcc	.L828
-	ldrh	r2, [r6]
-	cmp	r2, r3
-	bls	.L852
-.L828:
-	ldrh	r3, [r6]
-	movs	r0, #0
-	ldr	r4, .L903+20
-	lsrs	r3, r3, #2
-	strh	r3, [r4]	@ movhi
+	str	r3, [sp, #24]
+	beq	.L900
+	ldr	r3, .L953+12
+	ldr	r1, .L953+16
+	ldrh	r3, [r3]
+	ldrh	r1, [r1]
+	cmp	r3, r1, lsr #2
+	bhi	.L868
+	ldr	r1, .L953+20
+	ldrh	r1, [r1]
+	cmp	r1, r3
+	bcs	.L901
+.L868:
+	cmp	r2, #1
+	bls	.L870
+.L872:
+	movs	r4, #0
+.L871:
+	ldr	r8, .L953+52
+	movs	r5, #0
+	ldr	r10, .L953+48
+	movs	r7, #64
+.L875:
+	ldrh	r3, [r8]
+	mov	r0, r3
+	str	r3, [sp, #28]
 	bl	zftl_get_gc_node.part.9
 	movw	r2, #65535
+	mov	fp, r0
 	cmp	r0, r2
-	beq	.L853
-	ldr	r2, .L903+24
-	ldr	r1, [r2]
-	ldr	r2, .L903+28
-	ldrh	r3, [r1, r0, lsl #1]
-	movs	r1, #0
-	ldrh	r2, [r2]
-	cmp	r3, r2, lsr #2
-	bcs	.L854
-	mov	r2, fp
-	strh	r1, [r4]	@ movhi
-	bl	gc_add_sblk
-	adds	r4, r0, #0
-	it	ne
-	movne	r4, #1
-.L830:
-	ldr	r7, .L903+20
-	mov	r8, #64
-.L832:
-	ldrh	r2, [r7]
-	mov	r0, r2
-	str	r2, [sp, #28]
-	bl	zftl_get_gc_node.part.9
-	ldr	r2, [sp, #28]
-	movw	r3, #65535
-	cmp	r0, r3
-	add	r2, r2, #1
-	strh	r2, [r7]	@ movhi
-	beq	.L829
-	mov	r2, fp
+	beq	.L873
+	ldr	r3, [sp, #28]
 	movs	r1, #0
+	ldr	r2, [sp, #8]
+	adds	r3, r3, #1
+	strh	r3, [r8]	@ movhi
 	bl	gc_add_sblk
-	cbz	r0, .L831
+	cmp	r0, #0
+	beq	.L874
+	ldr	r3, [r10]
 	adds	r4, r4, #1
-	ldr	r3, [sp, #12]
 	uxth	r4, r4
-	cmp	r4, r3
-	bcs	.L829
-.L831:
-	add	r3, r8, #-1
-	uxth	r8, r3
-	cmp	r8, #0
-	bne	.L832
-.L829:
-	ldr	r3, [sp, #24]
-	ldrh	r2, [r10]
+	ldrh	r3, [r3, fp, lsl #1]
+	cmp	r4, r6
+	add	r5, r5, r3
+	uxth	r5, r5
+	bcs	.L869
+	ldr	r3, [sp, #12]
+	cmp	r3, r5
+	bcc	.L869
+	ldr	r3, .L953+20
+	ldr	r2, .L953+12
+	ldrh	r3, [r3]
+	ldrh	r2, [r2]
+	cmp	r3, r2, lsl #1
+	ble	.L874
+.L869:
+	ldr	r3, .L953+20
+	ldrh	r2, [r3]
+	ldr	r3, .L953+16
+	ldrh	r3, [r3]
+	cmp	r2, r3, lsr #2
+	bhi	.L897
+	ldr	r3, .L953+12
 	ldrh	r3, [r3]
-	cmp	r2, r3, lsr #3
-	bhi	.L849
-	ldrh	r3, [r6]
 	adds	r3, r3, #8
 	cmp	r2, r3
-	ble	.L827
-.L849:
-	ldr	r6, .L903+32
-	mov	r8, #64
-	movw	r7, #65535
-	movs	r3, #0
-	strh	r3, [r6]	@ movhi
-.L834:
-	ldrh	r10, [r6]
+	ble	.L867
+.L897:
+	ldr	r3, [sp, #12]
+	cmp	r3, r5
+	bls	.L867
+	ldr	r8, .L953+40
+	movs	r7, #64
+	ldr	r10, .L953+48
+.L878:
+	ldrh	r3, [r8]
 	movs	r1, #3
-	mov	r0, r10
-	add	r10, r10, #1
+	mov	r0, r3
+	str	r3, [sp, #28]
 	bl	zftl_get_gc_node
-	cmp	r0, r7
-	strh	r10, [r6]	@ movhi
-	beq	.L827
-	mov	r2, fp
+	movw	r2, #65535
+	mov	fp, r0
+	cmp	r0, r2
+	ldr	r3, [sp, #28]
+	beq	.L876
+	adds	r3, r3, #1
+	ldr	r2, [sp, #8]
 	movs	r1, #0
+	strh	r3, [r8]	@ movhi
 	bl	gc_add_sblk
-	cbz	r0, .L833
+	cmp	r0, #0
+	beq	.L877
+	ldr	r3, [r10]
 	adds	r4, r4, #1
-	ldr	r3, [sp, #12]
 	uxth	r4, r4
-	cmp	r4, r3
-	bcs	.L827
-.L833:
-	add	r8, r8, #-1
-	uxth	r8, r8
-	cmp	r8, #0
-	bne	.L834
-.L827:
-	ldr	r3, [sp, #16]
+	ldrh	r3, [r3, fp, lsl #1]
+	cmp	r4, r6
+	add	r5, r5, r3
+	uxth	r5, r5
+	bcs	.L867
+	ldr	r3, [sp, #12]
+	cmp	r3, r5
+	bcs	.L877
+.L867:
+	ldr	r3, [sp, #20]
 	lsls	r2, r3, #30
-	bpl	.L835
-	ldr	r6, .L903+36
-	mov	r10, #64
-	ldr	r7, .L903+40
-	movs	r3, #0
-	strh	r3, [r7]	@ movhi
-.L840:
-	ldrh	r8, [r7]
+	bpl	.L879
+	ldr	r3, .L953+24
+	ldrh	r3, [r3]
+	cmp	r3, #32
+	bls	.L879
+	ldr	r3, [sp, #12]
+	cmp	r5, r3
+	bcs	.L879
+	ldr	r8, .L953+56
+	mov	fp, #64
+.L885:
+	ldrh	r10, [r8]
 	movs	r1, #5
-	mov	r0, r8
+	mov	r0, r10
 	bl	zftl_get_gc_node
-	add	r3, r8, #1
-	strh	r3, [r7]	@ movhi
 	movw	r3, #65535
+	mov	r7, r0
 	cmp	r0, r3
-	beq	.L836
-	ldr	r3, [sp, #12]
-	cmp	r3, #1
-	bne	.L837
-	ldr	r3, .L903+44
-	ldr	r2, .L903+48
+	beq	.L880
+	cmp	r6, #1
+	add	r0, r10, #1
+	strh	r0, [r8]	@ movhi
+	bne	.L881
+	ldr	r3, .L953
+	ldr	r2, .L953+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	ldrh	r2, [r2]
 	smulbb	r3, r3, r2
-	ldr	r2, .L903+28
+	ldr	r2, .L953+28
 	ldrh	r2, [r2]
 	sub	r3, r3, r2, lsr #3
-	strh	r3, [r6]	@ movhi
-.L837:
-	ldr	r3, .L903+24
-	ldr	r3, [r3]
-	ldrh	r2, [r3, r0, lsl #1]
-	ldrh	r3, [r6]
+	ldr	r2, .L953+32
+	strh	r3, [r2]	@ movhi
+.L881:
+	ldr	r10, .L953+48
+	ldr	r3, [r10]
+	ldrh	r2, [r3, r7, lsl #1]
+	ldr	r3, .L953+32
+	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcs	.L838
-	mov	r2, fp
+	bcs	.L882
+	ldr	r2, [sp, #8]
 	movs	r1, #0
+	mov	r0, r7
 	bl	gc_add_sblk
 	cmp	r0, #0
-	beq	.L839
+	beq	.L883
+	ldr	r0, [sp, #16]
 	adds	r4, r4, #1
-	ldr	r3, [sp, #12]
 	uxth	r4, r4
-	adds	r5, r5, #1
+	adds	r0, r0, #1
+	cmp	r4, r6
+	uxth	r3, r0
+	str	r3, [sp, #16]
+	ldr	r3, [r10]
+	ldrh	r3, [r3, r7, lsl #1]
+	add	r5, r5, r3
 	uxth	r5, r5
-	cmp	r4, r3
-	bcc	.L839
-.L836:
+	bcs	.L884
 	ldr	r3, [sp, #12]
-	ldr	r1, .L903+28
-	ldr	r0, .L903+44
-	cmp	r4, r3
-	bcc	.L841
-	cmp	r5, #0
-	bne	.L842
-	ldr	r3, .L903+52
-	ldrh	r2, [r3]
-	ldr	r3, .L903+56
+	cmp	r3, r5
+	bcs	.L883
+.L884:
+	cmp	r4, r6
+	ldr	r0, .L953+28
+	ldr	r2, .L953+32
+	bcc	.L886
+	ldr	r3, [sp, #16]
+	cmp	r3, #0
+	bne	.L887
+	ldr	r3, .L953+24
+	ldrh	r1, [r3]
+	ldr	r3, .L953+36
 	ldrh	r3, [r3]
-	cmp	r2, r3
-	bls	.L842
-.L841:
-	ldr	r3, .L903+48
-	ldrh	r1, [r1]
-	ldrh	r2, [r6]
-	ldrh	r5, [r3]
-	ldrb	r3, [r0]	@ zero_extendqisi2
-	lsrs	r1, r1, #3
-	muls	r3, r5, r3
-	subs	r3, r3, r1
-	cmp	r2, r3
-	bge	.L835
-	add	r2, r2, r1
-	strh	r2, [r6]	@ movhi
-.L835:
-	ldr	r3, [sp, #20]
+	cmp	r1, r3
+	bls	.L887
+.L886:
+	ldrh	r3, [r0]
+	ldrh	r1, [r2]
+	lsrs	r0, r3, #3
+	ldr	r3, .L953+4
+	ldrh	r7, [r3]
+	ldr	r3, .L953
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	muls	r3, r7, r3
+	subs	r3, r3, r0
+	cmp	r1, r3
+	bge	.L879
+	adds	r3, r1, r0
+	strh	r3, [r2]	@ movhi
+.L879:
+	ldr	r3, [sp, #24]
 	cmp	r3, #0
-	beq	.L821
-	ldr	r5, .L903+60
+	beq	.L860
+	uxth	fp, r6
+	cmp	r4, fp
+	bcs	.L860
+	ldr	r3, [sp, #12]
+	cmp	r5, r3
+	bcs	.L860
+	ldr	r3, .L953+40
 	mov	r8, #64
-	ldr	r7, .L903+24
-	movs	r3, #0
-	ldr	r6, .L903+32
-	strh	r3, [r6]	@ movhi
-.L846:
-	ldrh	r10, [r6]
+	ldr	r7, .L953+44
+.L895:
+	ldrh	r2, [r3]
 	movs	r1, #3
-	mov	r0, r10
-	add	r10, r10, #1
+	str	r3, [sp, #24]
+	mov	r0, r2
+	str	r2, [sp, #16]
 	bl	zftl_get_gc_node
-	movw	r3, #65535
-	strh	r10, [r6]	@ movhi
-	cmp	r0, r3
-	beq	.L843
-	ldr	r3, [r7]
-	ldrh	r2, [r5]
-	ldrh	r3, [r3, r0, lsl #1]
-	cmp	r2, r3
-	bls	.L844
-	cmp	r3, #2
-	bls	.L844
-	ldr	r3, .L903+12
-	ldrh	r2, [r3]
-	ldr	r3, .L903+8
-	ldrh	r3, [r3]
-	cmp	r3, r2, lsr #1
-	bls	.L843
-.L844:
-	mov	r2, fp
+	movw	r1, #65535
+	mov	r10, r0
+	cmp	r0, r1
+	ldr	r2, [sp, #16]
+	ldr	r3, [sp, #24]
+	beq	.L889
+	adds	r2, r2, #1
+	strh	r2, [r3]	@ movhi
+	ldr	r2, .L953+48
+	ldr	r2, [r2]
+	ldrh	r1, [r2, r0, lsl #1]
+	ldrh	r2, [r7]
+	cmp	r1, r2
+	bcs	.L890
+	ldr	r2, .L953+16
+	ldrh	r1, [r2]
+	ldr	r2, .L953+20
+	ldrh	r2, [r2]
+	cmp	r2, r1, lsr #1
+	bls	.L891
+.L890:
+	ldr	r2, [sp, #8]
 	movs	r1, #0
-	bl	gc_add_sblk
-	cbz	r0, .L845
+	mov	r0, r10
+	str	r3, [sp, #16]
+	bl	gc_add_sblk
+	ldr	r3, [sp, #16]
+	cmp	r0, #0
+	beq	.L892
+	ldr	r2, .L953+48
 	adds	r4, r4, #1
-	ldr	r3, [sp, #12]
 	uxth	r4, r4
-	cmp	r4, r3
-	bcs	.L843
-.L845:
-	add	r8, r8, #-1
-	uxth	r8, r8
-	cmp	r8, #0
-	bne	.L846
-.L843:
-	ldr	r3, [sp, #12]
-	cmp	r4, r3
-	ldr	r3, .L903+28
-	bcs	.L847
+	ldr	r2, [r2]
+	cmp	fp, r4
+	ldrh	r2, [r2, r10, lsl #1]
+	add	r5, r5, r2
+	uxth	r5, r5
+	bls	.L893
+	ldr	r2, [sp, #12]
+	cmp	r2, r5
+	bcs	.L892
+.L894:
+	ldr	r3, .L953+28
 	ldrh	r2, [r3]
-	ldrh	r3, [r5]
+	ldrh	r3, [r7]
 	cmp	r3, r2, lsr #1
-	bls	.L821
+	bls	.L860
 	sub	r3, r3, r2, lsr #3
-	strh	r3, [r5]	@ movhi
-	b	.L821
-.L853:
-	movs	r4, #0
-	b	.L830
-.L854:
-	mov	r4, r1
-	b	.L830
-.L851:
-	ldr	r4, [sp, #20]
-	b	.L827
-.L838:
-	movs	r3, #0
 	strh	r3, [r7]	@ movhi
-	b	.L836
-.L839:
-	add	r10, r10, #-1
-	uxth	r10, r10
-	cmp	r10, #0
-	bne	.L840
-	b	.L836
-.L842:
-	ldrh	r1, [r1]
-	ldrb	r2, [r0]	@ zero_extendqisi2
-	ldrh	r3, [r6]
-	muls	r2, r1, r2
-	cmp	r3, r2
-	itt	gt
-	subgt	r3, r3, r1, lsr #3
-	strhgt	r3, [r6]	@ movhi
-	b	.L835
-.L847:
+	b	.L860
+.L954:
+	.align	2
+.L953:
+	.word	.LANCHOR80
+	.word	.LANCHOR86
+	.word	.LANCHOR96
+	.word	.LANCHOR97
+	.word	.LANCHOR98
+	.word	.LANCHOR99
+	.word	.LANCHOR93
+	.word	.LANCHOR95
+	.word	.LANCHOR100
+	.word	.LANCHOR101
+	.word	.LANCHOR91
+	.word	.LANCHOR102
+	.word	.LANCHOR9
+	.word	.LANCHOR90
+	.word	.LANCHOR92
+.L870:
+	ldr	r4, .L955
+	lsrs	r3, r3, #2
+	movs	r0, #0
+	strh	r3, [r4]	@ movhi
+	bl	zftl_get_gc_node.part.9
+	movw	r2, #65535
+	cmp	r0, r2
+	beq	.L872
+	ldr	r2, .L955+4
+	ldr	r1, [r2]
+	ldr	r2, .L955+8
+	ldrh	r3, [r1, r0, lsl #1]
+	ldrh	r2, [r2]
+	cmp	r3, r2, lsr #2
+	bcs	.L872
+	movs	r3, #1
+	ldr	r2, [sp, #8]
+	movs	r1, #0
+	strh	r3, [r4]	@ movhi
+	bl	gc_add_sblk
+	adds	r4, r0, #0
+	it	ne
+	movne	r4, #1
+	b	.L871
+.L873:
+	movs	r3, #0
+	strh	r3, [r8]	@ movhi
+	b	.L869
+.L874:
+	subs	r7, r7, #1
+	uxth	r7, r7
+	cmp	r7, #0
+	bne	.L875
+	b	.L869
+.L876:
+	cmp	r3, #64
+	bls	.L867
+	movs	r3, #0
+	strh	r3, [r8]	@ movhi
+	b	.L867
+.L877:
+	subs	r7, r7, #1
+	uxth	r7, r7
+	cmp	r7, #0
+	bne	.L878
+	b	.L867
+.L900:
+	ldr	r5, [sp, #24]
+	mov	r4, r5
+	b	.L867
+.L882:
+	ldr	r3, .L955+12
+	movs	r2, #0
+	strh	r2, [r3]	@ movhi
+	b	.L884
+.L880:
+	movs	r3, #0
+	strh	r3, [r8]	@ movhi
+	b	.L884
+.L883:
+	add	fp, fp, #-1
+	uxth	fp, fp
+	cmp	fp, #0
+	bne	.L885
+	b	.L884
+.L887:
+	ldr	r1, .L955+16
+	ldrh	r0, [r0]
+	ldrh	r3, [r2]
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	muls	r1, r0, r1
+	cmp	r3, r1
+	ble	.L860
+	sub	r3, r3, r0, lsr #3
+	b	.L950
+.L889:
+	cmp	r2, #64
+	bls	.L891
+	movs	r2, #0
+	strh	r2, [r3]	@ movhi
+.L891:
+	cmp	r4, fp
+	bcc	.L894
+.L893:
+	ldr	r3, .L955+8
+	ldrh	r2, [r7]
 	ldrh	r1, [r3]
-	ldr	r3, .L903+44
-	ldrh	r2, [r5]
+	ldr	r3, .L955+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	muls	r3, r1, r3
 	subs	r3, r3, #32
 	cmp	r2, r3
 	itt	lt
 	addlt	r2, r2, r1, lsr #3
-	strhlt	r2, [r5]	@ movhi
-	b	.L821
-.L852:
+	strhlt	r2, [r7]	@ movhi
+	b	.L860
+.L892:
+	add	r8, r8, #-1
+	uxth	r8, r8
+	cmp	r8, #0
+	bne	.L895
+	b	.L891
+.L901:
 	mov	r4, r5
-	b	.L829
-.L904:
+	b	.L869
+.L956:
 	.align	2
-.L903:
-	.word	.LANCHOR64
-	.word	.LANCHOR89
+.L955:
 	.word	.LANCHOR90
-	.word	.LANCHOR91
-	.word	.LANCHOR92
-	.word	.LANCHOR88
 	.word	.LANCHOR9
-	.word	.LANCHOR87
-	.word	.LANCHOR84
-	.word	.LANCHOR93
-	.word	.LANCHOR85
-	.word	.LANCHOR80
-	.word	.LANCHOR79
-	.word	.LANCHOR94
 	.word	.LANCHOR95
-	.word	.LANCHOR96
+	.word	.LANCHOR92
+	.word	.LANCHOR80
 	.size	gc_search_src_blk, .-gc_search_src_blk
 	.section	.text.zftl_insert_free_list,"ax",%progbits
 	.align	1
@@ -5389,35 +5793,35 @@ zftl_insert_free_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L909
+	ldr	r3, .L961
 	mov	r1, r0
 	ldr	r3, [r3]
 	add	r3, r3, r0, lsl #2
 	ldrb	r3, [r3, #2]	@ zero_extendqisi2
 	ands	r3, r3, #24
-	bne	.L906
-	ldr	r2, .L909+4
-	ldr	r0, .L909+8
-.L908:
+	bne	.L958
+	ldr	r2, .L961+4
+	ldr	r0, .L961+8
+.L960:
 	b	_insert_free_list
-.L906:
+.L958:
 	cmp	r3, #16
 	ittee	eq
-	ldreq	r2, .L909+12
-	ldreq	r0, .L909+16
-	ldrne	r2, .L909+20
-	ldrne	r0, .L909+24
-	b	.L908
-.L910:
-	.align	2
-.L909:
+	ldreq	r2, .L961+12
+	ldreq	r0, .L961+16
+	ldrne	r2, .L961+20
+	ldrne	r0, .L961+24
+	b	.L960
+.L962:
+	.align	2
+.L961:
 	.word	.LANCHOR7
-	.word	.LANCHOR97
-	.word	.LANCHOR98
-	.word	.LANCHOR99
-	.word	.LANCHOR100
-	.word	.LANCHOR101
-	.word	.LANCHOR102
+	.word	.LANCHOR103
+	.word	.LANCHOR104
+	.word	.LANCHOR105
+	.word	.LANCHOR106
+	.word	.LANCHOR107
+	.word	.LANCHOR108
 	.size	zftl_insert_free_list, .-zftl_insert_free_list
 	.section	.text.zftl_insert_data_list,"ax",%progbits
 	.align	1
@@ -5431,42 +5835,42 @@ zftl_insert_data_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L916
+	ldr	r3, .L968
 	mov	r1, r0
 	ldr	r3, [r3]
 	add	r3, r3, r0, lsl #2
 	ldrb	r3, [r3, #2]	@ zero_extendqisi2
 	and	r3, r3, #224
 	cmp	r3, #64
-	bne	.L912
-	ldr	r2, .L916+4
-	ldr	r0, .L916+8
-.L915:
+	bne	.L964
+	ldr	r2, .L968+4
+	ldr	r0, .L968+8
+.L967:
 	b	_insert_data_list
-.L912:
+.L964:
 	cmp	r3, #96
-	bne	.L913
-	ldr	r2, .L916+12
-	ldr	r0, .L916+16
-	b	.L915
-.L913:
+	bne	.L965
+	ldr	r2, .L968+12
+	ldr	r0, .L968+16
+	b	.L967
+.L965:
 	cmp	r3, #160
-	bne	.L911
-	ldr	r2, .L916+20
-	ldr	r0, .L916+24
-	b	.L915
-.L911:
+	bne	.L963
+	ldr	r2, .L968+20
+	ldr	r0, .L968+24
+	b	.L967
+.L963:
 	bx	lr
-.L917:
+.L969:
 	.align	2
-.L916:
+.L968:
 	.word	.LANCHOR7
-	.word	.LANCHOR92
+	.word	.LANCHOR97
 	.word	.LANCHOR12
-	.word	.LANCHOR90
-	.word	.LANCHOR83
-	.word	.LANCHOR94
-	.word	.LANCHOR82
+	.word	.LANCHOR99
+	.word	.LANCHOR89
+	.word	.LANCHOR93
+	.word	.LANCHOR88
 	.size	zftl_insert_data_list, .-zftl_insert_data_list
 	.section	.text.zftl_gc_get_free_sblk,"ax",%progbits
 	.align	1
@@ -5480,111 +5884,118 @@ zftl_gc_get_free_sblk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, lr}
-	movw	r6, #65535
-	ldr	r8, .L935+48
-	mov	r5, r0
-	mov	r7, r1
+	movw	r5, #65535
+	ldr	r8, .L991+48
+	mov	r4, r0
+	mov	r6, r1
 	ldr	r3, [r8]
-	ldrh	r4, [r3, #588]
-	cmp	r4, r6
-	beq	.L919
-	cbnz	r0, .L919
-	mov	r1, r4
-	ldr	r0, .L935
+	ldrh	r7, [r3, #588]
+	cmp	r7, r5
+	beq	.L971
+	cbnz	r0, .L971
+	mov	r1, r7
+	ldr	r0, .L991
 	bl	printf
 	ldr	r3, [r8]
-	strh	r6, [r3, #588]	@ movhi
-.L920:
-	mov	r0, r4
+	strh	r5, [r3, #588]	@ movhi
+.L972:
+	mov	r0, r7
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L919:
-	ldr	r3, .L935+4
-	ldr	r6, .L935+8
+.L971:
+	ldr	r3, .L991+4
+	ldr	r5, .L991+8
 	ldrh	r1, [r3]
-	ldrh	r3, [r6]
+	ldrh	r3, [r5]
 	cmp	r1, r3
-	bls	.L921
-	cmp	r5, #0
-	beq	.L927
-	lsrs	r1, r1, #3
-.L922:
-	ldr	r2, .L935+4
-	ldr	r0, .L935+12
-.L934:
+	bcc	.L973
+	ldr	r2, .L991+12
+	ldrh	r2, [r2]
+	cmp	r2, r1
+	bls	.L974
+	cmp	r3, #0
+	beq	.L974
+.L973:
+	cmp	r4, #0
+	bne	.L975
+	lsrs	r1, r3, #2
+.L976:
+	ldr	r2, .L991+8
+	ldr	r0, .L991+16
+.L990:
 	bl	_list_pop_index_node
-	uxth	r4, r0
+	uxth	r7, r0
 	movw	r3, #65535
-	cmp	r4, r3
-	bne	.L926
-	ldrh	r3, [r6]
-	mov	r2, r7
-	mov	r1, r4
-	ldr	r0, .L935+16
+	cmp	r7, r3
+	bne	.L979
+	ldrh	r3, [r5]
+	mov	r2, r6
+	mov	r1, r7
+	ldr	r0, .L991+20
 	str	r3, [sp, #4]
-	ldr	r3, .L935+20
+	ldr	r3, .L991+12
 	ldrh	r3, [r3]
 	str	r3, [sp]
-	ldr	r3, .L935+24
+	ldr	r3, .L991+24
 	ldr	r3, [r3]
 	bl	printf
-.L926:
-	cmp	r5, #0
-	beq	.L920
-	ldr	r3, .L935+28
+.L979:
+	cmp	r4, #0
+	beq	.L972
+	ldr	r3, .L991+28
 	ldr	r3, [r3]
 	lsls	r3, r3, #23
-	bpl	.L920
-	ldr	r3, .L935+32
-	ldr	r1, .L935+36
-	ldr	r0, .L935+40
+	bpl	.L972
+	ldr	r3, .L991+32
+	ldr	r1, .L991+36
+	ldr	r0, .L991+40
 	ldr	r3, [r3]
 	ldr	r1, [r1]
-	ldrh	r1, [r1, r4, lsl #1]
-	add	r2, r3, r4, lsl #2
+	ldrh	r1, [r1, r7, lsl #1]
+	add	r2, r3, r7, lsl #2
 	ldrb	r2, [r2, #2]	@ zero_extendqisi2
 	str	r1, [sp, #8]
-	ldrh	r1, [r3, r4, lsl #2]
+	ldrh	r1, [r3, r7, lsl #2]
 	ubfx	r1, r1, #0, #11
 	str	r1, [sp, #4]
-	mov	r1, r4
-	ldr	r3, [r3, r4, lsl #2]
+	mov	r1, r7
+	ldr	r3, [r3, r7, lsl #2]
 	ubfx	r3, r3, #11, #8
 	str	r3, [sp]
 	ubfx	r3, r2, #3, #2
 	lsrs	r2, r2, #5
 	bl	printf
-	b	.L920
-.L927:
-	mov	r1, r5
-	b	.L922
-.L921:
-	cbnz	r5, .L924
-	lsrs	r1, r3, #2
-.L925:
-	ldr	r2, .L935+8
-	ldr	r0, .L935+44
-	b	.L934
-.L924:
+	b	.L972
+.L975:
 	rsb	r1, r1, r1, lsl #3
 	ubfx	r1, r1, #3, #16
-	b	.L925
-.L936:
+	b	.L976
+.L974:
+	cbz	r4, .L980
+	lsrs	r1, r1, #3
+.L978:
+	ldr	r2, .L991+4
+	ldr	r0, .L991+44
+	b	.L990
+.L980:
+	mov	r1, r4
+	b	.L978
+.L992:
 	.align	2
-.L935:
-	.word	.LC54
-	.word	.LANCHOR99
-	.word	.LANCHOR101
-	.word	.LANCHOR100
-	.word	.LC55
-	.word	.LANCHOR97
-	.word	.LANCHOR98
+.L991:
+	.word	.LC59
+	.word	.LANCHOR105
+	.word	.LANCHOR107
+	.word	.LANCHOR103
+	.word	.LANCHOR108
+	.word	.LC60
+	.word	.LANCHOR104
 	.word	.LANCHOR14
 	.word	.LANCHOR7
 	.word	.LANCHOR9
-	.word	.LC56
-	.word	.LANCHOR102
+	.word	.LC61
+	.word	.LANCHOR106
 	.word	.LANCHOR10
 	.size	zftl_gc_get_free_sblk, .-zftl_gc_get_free_sblk
 	.section	.text.zftl_get_free_sblk,"ax",%progbits
@@ -5601,105 +6012,105 @@ zftl_get_free_sblk:
 	cmp	r1, #5
 	push	{r0, r1, r2, r4, r5, r6, r7, lr}
 	mov	r5, r1
-	bne	.L938
-	ldr	r3, .L959
-	ldr	r2, .L959+4
+	bne	.L994
+	ldr	r3, .L1015
+	ldr	r2, .L1015+4
 	ldrh	r3, [r3]
 	ldrh	r1, [r2]
 	cmp	r3, r1
-	bcc	.L939
-	ldr	r2, .L959+8
+	bcc	.L995
+	ldr	r2, .L1015+8
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bls	.L940
-	cbz	r1, .L940
-.L939:
-	ldr	r2, .L959+4
+	bls	.L996
+	cbz	r1, .L996
+.L995:
+	ldr	r2, .L1015+4
 	lsrs	r1, r1, #1
-.L958:
-	ldr	r0, .L959+12
-	b	.L957
-.L940:
-	ldr	r2, .L959
+.L1014:
+	ldr	r0, .L1015+12
+	b	.L1013
+.L996:
+	ldr	r2, .L1015
 	movs	r1, #0
-	ldr	r0, .L959+16
-.L957:
+	ldr	r0, .L1015+16
+.L1013:
 	bl	_list_pop_index_node
 	uxth	r4, r0
 	movw	r3, #65535
 	cmp	r4, r3
-	bne	.L943
-	ldr	r3, .L959+4
+	bne	.L999
+	ldr	r3, .L1015+4
 	mov	r2, r5
 	mov	r1, r4
-	ldr	r0, .L959+20
+	ldr	r0, .L1015+20
 	ldrh	r3, [r3]
 	str	r3, [sp, #4]
-	ldr	r3, .L959+8
+	ldr	r3, .L1015+8
 	ldrh	r3, [r3]
 	str	r3, [sp]
-	ldr	r3, .L959+24
+	ldr	r3, .L1015+24
 	ldr	r3, [r3]
 	bl	printf
-	b	.L943
-.L938:
-	ldr	r7, .L959+28
+	b	.L999
+.L994:
+	ldr	r7, .L1015+28
 	movw	r6, #65535
 	ldr	r3, [r7]
 	ldrh	r4, [r3, #590]
 	cmp	r4, r6
-	beq	.L942
+	beq	.L998
 	cmp	r1, #1
-	beq	.L942
+	beq	.L998
 	mov	r1, r4
-	ldr	r0, .L959+32
+	ldr	r0, .L1015+32
 	bl	printf
 	ldr	r3, [r7]
 	strh	r6, [r3, #590]	@ movhi
-.L943:
+.L999:
 	mov	r0, r4
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, pc}
-.L942:
-	ldr	r3, .L959+8
-	ldr	r2, .L959+4
+.L998:
+	ldr	r3, .L1015+8
+	ldr	r2, .L1015+4
 	ldrh	r3, [r3]
 	ldrh	r2, [r2]
 	cmp	r3, r2
-	bcc	.L944
-	ldr	r1, .L959
+	bcc	.L1000
+	ldr	r1, .L1015
 	ldrh	r1, [r1]
 	cmp	r1, r3
-	bls	.L945
-	cbz	r2, .L945
-.L944:
+	bls	.L1001
+	cbz	r2, .L1001
+.L1000:
 	cmp	r5, #1
 	it	eq
 	lsreq	r0, r2, #1
-	ldr	r2, .L959+4
+	ldr	r2, .L1015+4
 	mov	r1, r0
-	b	.L958
-.L945:
+	b	.L1014
+.L1001:
 	cmp	r5, #1
-	ldr	r2, .L959+8
+	ldr	r2, .L1015+8
 	it	eq
 	lsreq	r0, r3, #1
 	mov	r1, r0
-	ldr	r0, .L959+24
-	b	.L957
-.L960:
+	ldr	r0, .L1015+24
+	b	.L1013
+.L1016:
 	.align	2
-.L959:
-	.word	.LANCHOR99
-	.word	.LANCHOR101
-	.word	.LANCHOR97
-	.word	.LANCHOR102
-	.word	.LANCHOR100
-	.word	.LC55
-	.word	.LANCHOR98
+.L1015:
+	.word	.LANCHOR105
+	.word	.LANCHOR107
+	.word	.LANCHOR103
+	.word	.LANCHOR108
+	.word	.LANCHOR106
+	.word	.LC60
+	.word	.LANCHOR104
 	.word	.LANCHOR10
-	.word	.LC57
+	.word	.LC62
 	.size	zftl_get_free_sblk, .-zftl_get_free_sblk
 	.section	.text.zftl_remove_data_node,"ax",%progbits
 	.align	1
@@ -5713,42 +6124,42 @@ zftl_remove_data_node:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L966
+	ldr	r3, .L1022
 	mov	r1, r0
 	ldr	r3, [r3]
 	add	r3, r3, r0, lsl #2
 	ldrb	r3, [r3, #2]	@ zero_extendqisi2
 	and	r3, r3, #224
 	cmp	r3, #64
-	bne	.L962
-	ldr	r2, .L966+4
-	ldr	r0, .L966+8
-.L965:
+	bne	.L1018
+	ldr	r2, .L1022+4
+	ldr	r0, .L1022+8
+.L1021:
 	b	_list_remove_node
-.L962:
+.L1018:
 	cmp	r3, #96
-	bne	.L963
-	ldr	r2, .L966+12
-	ldr	r0, .L966+16
-	b	.L965
-.L963:
+	bne	.L1019
+	ldr	r2, .L1022+12
+	ldr	r0, .L1022+16
+	b	.L1021
+.L1019:
 	cmp	r3, #160
-	bne	.L961
-	ldr	r2, .L966+20
-	ldr	r0, .L966+24
-	b	.L965
-.L961:
+	bne	.L1017
+	ldr	r2, .L1022+20
+	ldr	r0, .L1022+24
+	b	.L1021
+.L1017:
 	bx	lr
-.L967:
+.L1023:
 	.align	2
-.L966:
+.L1022:
 	.word	.LANCHOR7
-	.word	.LANCHOR92
+	.word	.LANCHOR97
 	.word	.LANCHOR12
-	.word	.LANCHOR90
-	.word	.LANCHOR83
-	.word	.LANCHOR94
-	.word	.LANCHOR82
+	.word	.LANCHOR99
+	.word	.LANCHOR89
+	.word	.LANCHOR93
+	.word	.LANCHOR88
 	.size	zftl_remove_data_node, .-zftl_remove_data_node
 	.section	.text.zftl_remove_free_node,"ax",%progbits
 	.align	1
@@ -5762,35 +6173,35 @@ zftl_remove_free_node:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L972
+	ldr	r3, .L1028
 	mov	r1, r0
 	ldr	r3, [r3]
 	add	r3, r3, r0, lsl #2
 	ldrb	r3, [r3, #2]	@ zero_extendqisi2
 	ands	r3, r3, #24
-	bne	.L969
-	ldr	r2, .L972+4
-	ldr	r0, .L972+8
-.L971:
+	bne	.L1025
+	ldr	r2, .L1028+4
+	ldr	r0, .L1028+8
+.L1027:
 	b	_list_remove_node
-.L969:
+.L1025:
 	cmp	r3, #16
 	ittee	eq
-	ldreq	r2, .L972+12
-	ldreq	r0, .L972+16
-	ldrne	r2, .L972+20
-	ldrne	r0, .L972+24
-	b	.L971
-.L973:
+	ldreq	r2, .L1028+12
+	ldreq	r0, .L1028+16
+	ldrne	r2, .L1028+20
+	ldrne	r0, .L1028+24
+	b	.L1027
+.L1029:
 	.align	2
-.L972:
+.L1028:
 	.word	.LANCHOR7
-	.word	.LANCHOR97
-	.word	.LANCHOR98
-	.word	.LANCHOR99
-	.word	.LANCHOR100
-	.word	.LANCHOR101
-	.word	.LANCHOR102
+	.word	.LANCHOR103
+	.word	.LANCHOR104
+	.word	.LANCHOR105
+	.word	.LANCHOR106
+	.word	.LANCHOR107
+	.word	.LANCHOR108
 	.size	zftl_remove_free_node, .-zftl_remove_free_node
 	.section	.text.zftl_list_update_data_list,"ax",%progbits
 	.align	1
@@ -5804,42 +6215,42 @@ zftl_list_update_data_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L979
+	ldr	r3, .L1035
 	mov	r1, r0
 	ldr	r3, [r3]
 	add	r3, r3, r0, lsl #2
 	ldrb	r3, [r3, #2]	@ zero_extendqisi2
 	and	r3, r3, #224
 	cmp	r3, #64
-	bne	.L975
-	ldr	r2, .L979+4
-	ldr	r0, .L979+8
-.L978:
+	bne	.L1031
+	ldr	r2, .L1035+4
+	ldr	r0, .L1035+8
+.L1034:
 	b	_list_update_data_list
-.L975:
+.L1031:
 	cmp	r3, #96
-	bne	.L976
-	ldr	r2, .L979+12
-	ldr	r0, .L979+16
-	b	.L978
-.L976:
+	bne	.L1032
+	ldr	r2, .L1035+12
+	ldr	r0, .L1035+16
+	b	.L1034
+.L1032:
 	cmp	r3, #160
-	bne	.L974
-	ldr	r2, .L979+20
-	ldr	r0, .L979+24
-	b	.L978
-.L974:
+	bne	.L1030
+	ldr	r2, .L1035+20
+	ldr	r0, .L1035+24
+	b	.L1034
+.L1030:
 	bx	lr
-.L980:
+.L1036:
 	.align	2
-.L979:
+.L1035:
 	.word	.LANCHOR7
-	.word	.LANCHOR92
+	.word	.LANCHOR97
 	.word	.LANCHOR12
-	.word	.LANCHOR90
-	.word	.LANCHOR83
-	.word	.LANCHOR94
-	.word	.LANCHOR82
+	.word	.LANCHOR99
+	.word	.LANCHOR89
+	.word	.LANCHOR93
+	.word	.LANCHOR88
 	.size	zftl_list_update_data_list, .-zftl_list_update_data_list
 	.section	.text.print_list_info,"ax",%progbits
 	.align	1
@@ -5857,18 +6268,18 @@ print_list_info:
 	ldrh	r2, [r1]
 	sub	sp, sp, #36
 	ldr	r1, [r0]
-	ldr	r0, .L985
+	ldr	r0, .L1041
 	bl	printf
 	ldr	r4, [r4]
 	cmp	r4, #0
-	beq	.L981
-	ldr	r6, .L985+4
+	beq	.L1037
+	ldr	r6, .L1041+4
 	movs	r5, #0
-	ldr	r7, .L985+8
-.L984:
+	ldr	r7, .L1041+8
+.L1040:
 	ldr	r2, [r6]
-	ldr	r0, .L985+12
-	ldr	r3, .L985+16
+	ldr	r0, .L1041+12
+	ldr	r3, .L1041+16
 	subs	r2, r4, r2
 	asrs	r2, r2, #1
 	ldr	r0, [r0]
@@ -5883,7 +6294,7 @@ print_list_info:
 	ubfx	r0, r0, #0, #11
 	str	r0, [sp, #20]
 	ldr	r1, [r1, r2, lsl #2]
-	ldr	r0, .L985+20
+	ldr	r0, .L1041+20
 	ubfx	r1, r1, #11, #8
 	str	r1, [sp, #16]
 	ldrb	r1, [ip, #2]	@ zero_extendqisi2
@@ -5901,30 +6312,30 @@ print_list_info:
 	ldrh	r4, [r4]
 	movw	r3, #65535
 	cmp	r4, r3
-	beq	.L981
+	beq	.L1037
 	ldr	r3, [r6]
 	movs	r2, #6
 	adds	r5, r5, #1
 	uxth	r5, r5
 	mla	r4, r2, r4, r3
-	ldr	r3, .L985+24
+	ldr	r3, .L1041+24
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	bcs	.L984
-.L981:
+	bcs	.L1040
+.L1037:
 	add	sp, sp, #36
 	@ sp needed
 	pop	{r4, r5, r6, r7, pc}
-.L986:
+.L1042:
 	.align	2
-.L985:
-	.word	.LC58
+.L1041:
+	.word	.LC63
 	.word	.LANCHOR4
 	.word	-1431655765
 	.word	.LANCHOR9
 	.word	.LANCHOR7
-	.word	.LC59
-	.word	.LANCHOR103
+	.word	.LC64
+	.word	.LANCHOR109
 	.size	print_list_info, .-print_list_info
 	.section	.text.dump_all_list_info,"ax",%progbits
 	.align	1
@@ -5938,40 +6349,40 @@ dump_all_list_info:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r1, .L988
-	ldr	r0, .L988+4
+	ldr	r1, .L1044
+	ldr	r0, .L1044+4
 	bl	print_list_info
-	ldr	r1, .L988+8
-	ldr	r0, .L988+12
+	ldr	r1, .L1044+8
+	ldr	r0, .L1044+12
 	bl	print_list_info
-	ldr	r1, .L988+16
-	ldr	r0, .L988+20
+	ldr	r1, .L1044+16
+	ldr	r0, .L1044+20
 	bl	print_list_info
-	ldr	r1, .L988+24
-	ldr	r0, .L988+28
+	ldr	r1, .L1044+24
+	ldr	r0, .L1044+28
 	bl	print_list_info
-	ldr	r1, .L988+32
-	ldr	r0, .L988+36
+	ldr	r1, .L1044+32
+	ldr	r0, .L1044+36
 	bl	print_list_info
-	ldr	r1, .L988+40
-	ldr	r0, .L988+44
+	ldr	r1, .L1044+40
+	ldr	r0, .L1044+44
 	pop	{r3, lr}
 	b	print_list_info
-.L989:
+.L1045:
 	.align	2
-.L988:
+.L1044:
+	.word	.LANCHOR103
+	.word	.LANCHOR104
+	.word	.LANCHOR105
+	.word	.LANCHOR106
+	.word	.LANCHOR107
+	.word	.LANCHOR108
 	.word	.LANCHOR97
-	.word	.LANCHOR98
-	.word	.LANCHOR99
-	.word	.LANCHOR100
-	.word	.LANCHOR101
-	.word	.LANCHOR102
-	.word	.LANCHOR92
 	.word	.LANCHOR12
-	.word	.LANCHOR90
-	.word	.LANCHOR83
-	.word	.LANCHOR94
-	.word	.LANCHOR82
+	.word	.LANCHOR99
+	.word	.LANCHOR89
+	.word	.LANCHOR93
+	.word	.LANCHOR88
 	.size	dump_all_list_info, .-dump_all_list_info
 	.section	.text.ftl_tmp_into_update,"ax",%progbits
 	.align	1
@@ -5985,49 +6396,49 @@ ftl_tmp_into_update:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L995
+	ldr	r3, .L1051
 	ldr	r3, [r3]
 	ldr	r2, [r3, #16]
 	cmp	r2, #2048
-	bls	.L991
+	bls	.L1047
 	ldr	r1, [r3, #20]
 	add	r1, r1, r2, lsr #11
 	ubfx	r2, r2, #0, #11
 	str	r2, [r3, #16]
 	str	r1, [r3, #20]
-.L991:
+.L1047:
 	ldr	r2, [r3, #24]
 	cmp	r2, #2048
-	bls	.L992
+	bls	.L1048
 	ldr	r1, [r3, #28]
 	add	r1, r1, r2, lsr #11
 	ubfx	r2, r2, #0, #11
 	str	r2, [r3, #24]
 	str	r1, [r3, #28]
-.L992:
+.L1048:
 	ldr	r2, [r3, #32]
 	cmp	r2, #1024
-	bls	.L993
+	bls	.L1049
 	ldr	r1, [r3, #36]
 	add	r1, r1, r2, lsr #10
 	ubfx	r2, r2, #0, #10
 	str	r2, [r3, #32]
 	str	r1, [r3, #36]
-.L993:
+.L1049:
 	ldr	r2, [r3, #40]
 	cmp	r2, #1024
-	bls	.L990
+	bls	.L1046
 	ldr	r1, [r3, #44]
 	add	r1, r1, r2, lsr #10
 	ubfx	r2, r2, #0, #10
 	str	r2, [r3, #40]
 	str	r1, [r3, #44]
-.L990:
+.L1046:
 	bx	lr
-.L996:
+.L1052:
 	.align	2
-.L995:
-	.word	.LANCHOR104
+.L1051:
+	.word	.LANCHOR110
 	.size	ftl_tmp_into_update, .-ftl_tmp_into_update
 	.global	__aeabi_idiv
 	.section	.text.ftl_get_blk_list_in_sblk,"ax",%progbits
@@ -6043,43 +6454,43 @@ ftl_get_blk_list_in_sblk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r3, .L1006
+	ldr	r3, .L1062
 	mov	r8, r1
 	mov	r5, r4
-	ldr	r2, .L1006+4
+	ldr	r2, .L1062+4
 	ldr	r3, [r3]
 	ldrb	r10, [r2]	@ zero_extendqisi2
-	ldr	r2, .L1006+8
+	ldr	r2, .L1062+8
 	add	r3, r3, r0, lsl #2
 	ldrb	r3, [r3, #3]	@ zero_extendqisi2
 	uxth	r7, r10
 	ldrb	fp, [r2]	@ zero_extendqisi2
 	smulbb	r0, r0, r7
-	ldr	r2, .L1006+12
+	ldr	r2, .L1062+12
 	str	r3, [sp, #4]
 	subs	r7, r7, #1
-	ldr	r3, .L1006+16
+	ldr	r3, .L1062+16
 	sxth	r7, r7
 	uxth	r6, r0
 	rsb	fp, fp, #24
 	ldrb	r3, [r3]	@ zero_extendqisi2
-.L998:
+.L1054:
 	cmp	r5, r3
-	blt	.L1002
+	blt	.L1058
 	mov	r2, r4
 	movw	r1, #65535
-.L1003:
+.L1059:
 	cmp	r2, r3
-	blt	.L1004
+	blt	.L1060
 	mov	r0, r4
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1002:
+.L1058:
 	ldr	r1, [sp, #4]
 	asrs	r1, r1, r5
 	lsls	r1, r1, #31
-	bmi	.L999
+	bmi	.L1055
 	mov	r1, r10
 	mov	r0, r5
 	str	r2, [sp, #12]
@@ -6099,20 +6510,20 @@ ftl_get_blk_list_in_sblk:
 	addhi	r0, r0, r1
 	strh	r0, [r8, r4, lsl #1]	@ movhi
 	adds	r4, r4, #1
-.L999:
+.L1055:
 	adds	r5, r5, #1
-	b	.L998
-.L1004:
+	b	.L1054
+.L1060:
 	strh	r1, [r8, r2, lsl #1]	@ movhi
 	adds	r2, r2, #1
-	b	.L1003
-.L1007:
+	b	.L1059
+.L1063:
 	.align	2
-.L1006:
+.L1062:
 	.word	.LANCHOR7
-	.word	.LANCHOR69
-	.word	.LANCHOR31
-	.word	.LANCHOR68
+	.word	.LANCHOR76
+	.word	.LANCHOR32
+	.word	.LANCHOR75
 	.word	.LANCHOR80
 	.size	ftl_get_blk_list_in_sblk, .-ftl_get_blk_list_in_sblk
 	.section	.text.ftl_erase_phy_blk,"ax",%progbits
@@ -6128,47 +6539,47 @@ ftl_erase_phy_blk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r5, r1
-	ldr	r3, .L1013
-	ldr	r7, .L1013+4
+	ldr	r3, .L1069
+	ldr	r7, .L1069+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	rsb	r4, r3, #24
-	ldr	r3, .L1013+8
+	ldr	r3, .L1069+8
 	ldrh	r3, [r3]
 	subs	r3, r4, r3
 	movs	r4, #1
 	asr	r6, r0, r3
 	lsls	r4, r4, r3
-	ldr	r3, .L1013+12
+	ldr	r3, .L1069+12
 	subs	r4, r4, #1
 	uxtb	r6, r6
 	ands	r4, r4, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	sxth	r4, r4
-	cbz	r3, .L1009
-	ldr	r3, .L1013+16
+	cbz	r3, .L1065
+	ldr	r3, .L1069+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L1009
+	cbnz	r3, .L1065
 	ldrh	r2, [r7]
 	clz	r1, r1
 	lsrs	r1, r1, #5
 	mov	r0, r6
 	muls	r2, r4, r2
 	bl	flash_erase_block_en
-.L1009:
+.L1065:
 	ldrh	r2, [r7]
 	uxtb	r1, r5
 	mov	r0, r6
 	muls	r2, r4, r2
 	pop	{r3, r4, r5, r6, r7, lr}
 	b	flash_erase_block_en
-.L1014:
+.L1070:
 	.align	2
-.L1013:
-	.word	.LANCHOR31
-	.word	.LANCHOR105
-	.word	.LANCHOR68
-	.word	.LANCHOR74
+.L1069:
+	.word	.LANCHOR32
+	.word	.LANCHOR111
 	.word	.LANCHOR75
+	.word	.LANCHOR81
+	.word	.LANCHOR82
 	.size	ftl_erase_phy_blk, .-ftl_erase_phy_blk
 	.section	.text.ftl_erase_sblk,"ax",%progbits
 	.align	1
@@ -6181,7 +6592,7 @@ ftl_erase_phy_blk:
 ftl_erase_sblk:
 	@ args = 0, pretend = 0, frame = 72
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L1039
+	ldr	r2, .L1095
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r6, r0
 	mov	r7, r1
@@ -6192,27 +6603,27 @@ ftl_erase_sblk:
 	add	r3, r3, r0, lsl #2
 	ldrb	r3, [r3, #3]	@ zero_extendqisi2
 	str	r3, [sp, #4]
-.L1016:
-	ldr	r3, .L1039+4
+.L1072:
+	ldr	r3, .L1095+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r5, r3
-	bge	.L1027
-	ldr	r3, .L1039+8
+	bge	.L1083
+	ldr	r3, .L1095+8
 	movs	r4, #0
 	ldrb	r2, [r3]	@ zero_extendqisi2
-	ldr	r3, .L1039+12
+	ldr	r3, .L1095+12
 	add	ip, r2, #-1
 	ldrh	r0, [r3]
 	mul	r10, r2, r5
 	mov	r3, r4
 	mul	lr, r2, r6
-	b	.L1028
-.L1018:
+	b	.L1084
+.L1074:
 	ldr	r1, [sp, #4]
 	add	fp, r3, r10
 	asr	r1, r1, fp
 	lsls	r1, r1, #31
-	bmi	.L1017
+	bmi	.L1073
 	add	r1, sp, #72
 	add	fp, r1, r4, lsl #2
 	and	r1, r3, ip
@@ -6220,77 +6631,77 @@ ftl_erase_sblk:
 	muls	r1, r0, r1
 	adds	r4, r4, #1
 	str	r1, [fp, #-64]
-.L1017:
+.L1073:
 	adds	r3, r3, #1
-.L1028:
+.L1084:
 	cmp	r3, r2
-	blt	.L1018
+	blt	.L1074
 	cmp	r2, #4
-	bne	.L1019
+	bne	.L1075
 	uxtb	fp, r7
 	mov	r10, #0
-.L1020:
+.L1076:
 	cmp	r10, r4
-	bne	.L1021
-.L1022:
+	bne	.L1077
+.L1078:
 	adds	r5, r5, #1
-	b	.L1016
-.L1021:
+	b	.L1072
+.L1077:
 	add	r3, sp, #8
 	mov	r1, fp
 	ldr	r2, [r3, r10, lsl #2]
 	uxtb	r0, r5
 	add	r10, r10, #1
 	bl	flash_erase_block_en
-	b	.L1020
-.L1019:
+	b	.L1076
+.L1075:
 	cmp	r4, #2
-	bne	.L1023
-	ldr	r3, .L1039+16
+	bne	.L1079
+	ldr	r3, .L1095+16
 	uxtb	r4, r5
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1024
-	ldr	r3, .L1039+20
+	cbz	r3, .L1080
+	ldr	r3, .L1095+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L1024
+	cbnz	r3, .L1080
 	clz	r1, r7
 	ldr	r3, [sp, #12]
 	ldr	r2, [sp, #8]
 	lsrs	r1, r1, #5
 	mov	r0, r4
 	bl	flash_erase_duplane_block
-.L1024:
+.L1080:
 	ldr	r3, [sp, #12]
 	uxtb	r1, r7
 	ldr	r2, [sp, #8]
 	mov	r0, r4
 	bl	flash_erase_duplane_block
-	b	.L1022
-.L1023:
+	b	.L1078
+.L1079:
 	cmp	r4, #1
-	bne	.L1022
-	ldr	r3, .L1039+16
+	bne	.L1078
+	ldr	r3, .L1095+16
 	uxtb	r4, r5
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1026
-	ldr	r3, .L1039+20
+	cbz	r3, .L1082
+	ldr	r3, .L1095+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L1026
+	cbnz	r3, .L1082
 	clz	r1, r7
 	ldr	r2, [sp, #8]
 	lsrs	r1, r1, #5
 	mov	r0, r4
 	bl	flash_erase_block_en
-.L1026:
+.L1082:
 	ldr	r2, [sp, #8]
 	uxtb	r1, r7
 	mov	r0, r4
 	bl	flash_erase_block_en
-	b	.L1022
-.L1027:
-	ldr	r1, .L1039+24
+	b	.L1078
+.L1083:
+	ldr	r1, .L1095+24
 	ldr	r0, [r8]
-	cbnz	r7, .L1029
+	cbnz	r7, .L1085
 	ldrh	r2, [r0, r6, lsl #2]
 	adds	r3, r2, #1
 	ubfx	r3, r3, #0, #11
@@ -6302,14 +6713,14 @@ ftl_erase_sblk:
 	str	r1, [r2, #84]
 	ldrh	r1, [r2, #96]
 	cmp	r1, r3
-	bge	.L1031
+	bge	.L1087
 	strh	r3, [r2, #96]	@ movhi
-.L1031:
+.L1087:
 	movs	r0, #0
 	add	sp, sp, #72
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1029:
+.L1085:
 	ldr	r2, [r0, r6, lsl #2]
 	ubfx	r3, r2, #11, #8
 	adds	r3, r3, #1
@@ -6325,17 +6736,17 @@ ftl_erase_sblk:
 	cmp	r1, r3
 	it	cc
 	strhcc	r3, [r2, #98]	@ movhi
-	b	.L1031
-.L1040:
+	b	.L1087
+.L1096:
 	.align	2
-.L1039:
+.L1095:
 	.word	.LANCHOR7
-	.word	.LANCHOR106
-	.word	.LANCHOR69
-	.word	.LANCHOR105
-	.word	.LANCHOR74
-	.word	.LANCHOR75
-	.word	.LANCHOR104
+	.word	.LANCHOR112
+	.word	.LANCHOR76
+	.word	.LANCHOR111
+	.word	.LANCHOR81
+	.word	.LANCHOR82
+	.word	.LANCHOR110
 	.size	ftl_erase_sblk, .-ftl_erase_sblk
 	.section	.text.ftl_alloc_sys_blk,"ax",%progbits
 	.align	1
@@ -6349,7 +6760,7 @@ ftl_alloc_sys_blk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
-	ldr	r4, .L1050
+	ldr	r4, .L1106
 	ldr	r2, [r4]
 	ldrh	r1, [r2, #136]
 	cmp	r1, #63
@@ -6357,32 +6768,32 @@ ftl_alloc_sys_blk:
 	movhi	r3, #0
 	strhhi	r3, [r2, #136]	@ movhi
 	ldrh	r3, [r2, #112]
-	cbnz	r3, .L1043
-	movw	r2, #1140
-	ldr	r1, .L1050+4
-	ldr	r0, .L1050+8
+	cbnz	r3, .L1099
+	movw	r2, #1283
+	ldr	r1, .L1106+4
+	ldr	r0, .L1106+8
 	bl	printf
-.L1043:
+.L1099:
 	ldr	r3, [r4]
 	movw	r4, #65535
 	mov	r6, r4
 	movs	r5, #0
-.L1047:
+.L1103:
 	ldrh	r2, [r3, #136]
 	add	r1, r3, r2, lsl #1
 	adds	r1, r1, #158
-.L1044:
+.L1100:
 	cmp	r2, #63
-	ble	.L1046
+	ble	.L1102
 	strh	r5, [r3, #136]	@ movhi
-	b	.L1047
-.L1046:
+	b	.L1103
+.L1102:
 	ldrh	r0, [r1, #2]!
 	cmp	r0, r4
-	bne	.L1049
+	bne	.L1105
 	adds	r2, r2, #1
-	b	.L1044
-.L1049:
+	b	.L1100
+.L1105:
 	add	r1, r2, #80
 	strh	r6, [r3, r1, lsl #1]	@ movhi
 	strh	r2, [r3, #136]	@ movhi
@@ -6390,11 +6801,11 @@ ftl_alloc_sys_blk:
 	subs	r2, r2, #1
 	strh	r2, [r3, #112]	@ movhi
 	pop	{r4, r5, r6, pc}
-.L1051:
+.L1107:
 	.align	2
-.L1050:
-	.word	.LANCHOR104
-	.word	.LANCHOR107
+.L1106:
+	.word	.LANCHOR110
+	.word	.LANCHOR113
 	.word	.LC0
 	.size	ftl_alloc_sys_blk, .-ftl_alloc_sys_blk
 	.section	.text.ftl_free_sys_blk,"ax",%progbits
@@ -6410,7 +6821,7 @@ ftl_free_sys_blk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
 	mov	r5, r0
-	ldr	r4, .L1060
+	ldr	r4, .L1116
 	ldr	r2, [r4]
 	ldrh	r1, [r2, #138]
 	cmp	r1, #63
@@ -6419,28 +6830,28 @@ ftl_free_sys_blk:
 	strhhi	r3, [r2, #138]	@ movhi
 	ldrh	r3, [r2, #112]
 	cmp	r3, #63
-	bls	.L1054
-	movw	r2, #1164
-	ldr	r1, .L1060+4
-	ldr	r0, .L1060+8
+	bls	.L1110
+	movw	r2, #1310
+	ldr	r1, .L1116+4
+	ldr	r0, .L1116+8
 	bl	printf
-.L1054:
+.L1110:
 	ldr	r3, [r4]
 	movs	r0, #0
 	movw	r4, #65535
-.L1058:
+.L1114:
 	ldrh	r2, [r3, #138]
 	add	r1, r3, r2, lsl #1
 	adds	r1, r1, #158
-.L1055:
+.L1111:
 	cmp	r2, #63
-	ble	.L1057
+	ble	.L1113
 	strh	r0, [r3, #138]	@ movhi
-	b	.L1058
-.L1057:
+	b	.L1114
+.L1113:
 	ldrh	r6, [r1, #2]!
 	cmp	r6, r4
-	bne	.L1056
+	bne	.L1112
 	add	r1, r2, #80
 	strh	r5, [r3, r1, lsl #1]	@ movhi
 	strh	r2, [r3, #138]	@ movhi
@@ -6448,14 +6859,14 @@ ftl_free_sys_blk:
 	adds	r2, r2, #1
 	strh	r2, [r3, #112]	@ movhi
 	pop	{r4, r5, r6, pc}
-.L1056:
+.L1112:
 	adds	r2, r2, #1
-	b	.L1055
-.L1061:
+	b	.L1111
+.L1117:
 	.align	2
-.L1060:
-	.word	.LANCHOR104
-	.word	.LANCHOR108
+.L1116:
+	.word	.LANCHOR110
+	.word	.LANCHOR114
 	.word	.LC0
 	.size	ftl_free_sys_blk, .-ftl_free_sys_blk
 	.section	.text.ftl_info_data_recovery,"ax",%progbits
@@ -6473,30 +6884,30 @@ ftl_info_data_recovery:
 	movw	r3, #65535
 	ldrh	r4, [r0]
 	cmp	r4, r3
-	beq	.L1062
-	ldr	r3, .L1071
+	beq	.L1118
+	ldr	r3, .L1127
 	ldr	r5, [r3]
 	add	r6, r5, r4, lsl #2
 	ldrb	r3, [r6, #2]	@ zero_extendqisi2
 	tst	r3, #224
-	bne	.L1062
+	bne	.L1118
 	ldrb	r2, [r0, #4]	@ zero_extendqisi2
 	mov	r0, r4
 	bfi	r3, r2, #5, #3
 	strb	r3, [r6, #2]
 	bl	zftl_remove_free_node
 	ldrb	r3, [r6, #2]	@ zero_extendqisi2
-	ldr	r2, .L1071+4
+	ldr	r2, .L1127+4
 	tst	r3, #8
 	ldr	r0, [r2]
-	beq	.L1066
+	beq	.L1122
 	ldrh	r1, [r0, #116]
 	subs	r1, r1, #1
 	strh	r1, [r0, #116]	@ movhi
-.L1067:
+.L1123:
 	and	r3, r3, #224
 	cmp	r3, #160
-	bne	.L1069
+	bne	.L1125
 	ldr	r3, [r5, r4, lsl #2]
 	ldr	r2, [r2]
 	ubfx	r1, r3, #11, #8
@@ -6507,7 +6918,7 @@ ftl_info_data_recovery:
 	subs	r3, r3, #1
 	strh	r3, [r2, #120]	@ movhi
 	pop	{r4, r5, r6, pc}
-.L1066:
+.L1122:
 	tst	r3, #24
 	itete	eq
 	ldrheq	r1, [r0, #114]
@@ -6517,33 +6928,33 @@ ftl_info_data_recovery:
 	ite	eq
 	strheq	r1, [r0, #114]	@ movhi
 	strhne	r1, [r0, #118]	@ movhi
-	b	.L1067
-.L1069:
+	b	.L1123
+.L1125:
 	ldrh	r1, [r5, r4, lsl #2]
 	cmp	r3, #64
 	add	r0, r1, #1
 	bfi	r1, r0, #0, #11
 	strh	r1, [r5, r4, lsl #2]	@ movhi
-	bne	.L1070
+	bne	.L1126
 	ldr	r2, [r2]
 	ldrh	r3, [r2, #122]
 	subs	r3, r3, #1
 	strh	r3, [r2, #122]	@ movhi
 	pop	{r4, r5, r6, pc}
-.L1070:
+.L1126:
 	cmp	r3, #96
 	itttt	eq
 	ldreq	r2, [r2]
 	ldrheq	r3, [r2, #124]
 	addeq	r3, r3, #-1
 	strheq	r3, [r2, #124]	@ movhi
-.L1062:
+.L1118:
 	pop	{r4, r5, r6, pc}
-.L1072:
+.L1128:
 	.align	2
-.L1071:
+.L1127:
 	.word	.LANCHOR7
-	.word	.LANCHOR104
+	.word	.LANCHOR110
 	.size	ftl_info_data_recovery, .-ftl_info_data_recovery
 	.section	.text.ftl_get_ppa_from_index,"ax",%progbits
 	.align	1
@@ -6558,11 +6969,11 @@ ftl_get_ppa_from_index:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r4, r0
-	ldr	r3, .L1077
+	ldr	r3, .L1133
 	ldr	r5, [r3]
-	ldr	r3, .L1077+4
+	ldr	r3, .L1133+4
 	ldrh	r2, [r3]
-	ldr	r3, .L1077+8
+	ldr	r3, .L1133+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	mul	r1, r3, r2
 	cmp	r0, r1
@@ -6585,25 +6996,25 @@ ftl_get_ppa_from_index:
 	adds	r4, r4, #8
 	ldrh	r4, [r5, r4, lsl #1]
 	cmp	r4, r3
-	bne	.L1076
-	movw	r2, #1686
-	ldr	r1, .L1077+12
-	ldr	r0, .L1077+16
+	bne	.L1132
+	movw	r2, #1937
+	ldr	r1, .L1133+12
+	ldr	r0, .L1133+16
 	bl	printf
-.L1076:
-	ldr	r3, .L1077+20
+.L1132:
+	ldr	r3, .L1133+20
 	ldrh	r0, [r3]
 	mla	r0, r4, r0, r7
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1078:
+.L1134:
 	.align	2
-.L1077:
+.L1133:
 	.word	.LANCHOR10
-	.word	.LANCHOR87
+	.word	.LANCHOR95
 	.word	.LANCHOR80
-	.word	.LANCHOR109
+	.word	.LANCHOR115
 	.word	.LC0
-	.word	.LANCHOR105
+	.word	.LANCHOR111
 	.size	ftl_get_ppa_from_index, .-ftl_get_ppa_from_index
 	.section	.text.lpa_hash_get_ppa,"ax",%progbits
 	.align	1
@@ -6617,37 +7028,37 @@ lpa_hash_get_ppa:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L1083
+	ldr	r3, .L1139
 	uxtb	r2, r0
 	push	{r4, r5}
 	ldrh	r3, [r3, r2, lsl #1]
-	ldr	r2, .L1083+4
+	ldr	r2, .L1139+4
 	ldr	r1, [r2]
-	ldr	r2, .L1083+8
+	ldr	r2, .L1139+8
 	ldr	r4, [r2]
 	movw	r2, #65535
-.L1080:
+.L1136:
 	cmp	r3, r2
-	bne	.L1082
+	bne	.L1138
 	mov	r0, #-1
 	pop	{r4, r5}
 	bx	lr
-.L1082:
+.L1138:
 	ldr	r5, [r1, r3, lsl #2]
 	cmp	r0, r5
-	bne	.L1081
+	bne	.L1137
 	mov	r0, r3
 	pop	{r4, r5}
 	b	ftl_get_ppa_from_index
-.L1081:
+.L1137:
 	ldrh	r3, [r4, r3, lsl #1]
-	b	.L1080
-.L1084:
+	b	.L1136
+.L1140:
 	.align	2
-.L1083:
-	.word	.LANCHOR110
-	.word	.LANCHOR111
-	.word	.LANCHOR112
+.L1139:
+	.word	.LANCHOR116
+	.word	.LANCHOR117
+	.word	.LANCHOR118
 	.size	lpa_hash_get_ppa, .-lpa_hash_get_ppa
 	.section	.text.ftl_get_new_free_page,"ax",%progbits
 	.align	1
@@ -6665,41 +7076,41 @@ ftl_get_new_free_page:
 	movw	r3, #65535
 	mov	r4, r0
 	cmp	r2, r3
-	bne	.L1086
-	movw	r2, #1809
-	ldr	r1, .L1093
-	ldr	r0, .L1093+4
+	bne	.L1142
+	mov	r2, #2080
+	ldr	r1, .L1149
+	ldr	r0, .L1149+4
 	bl	printf
-.L1086:
-	ldr	r3, .L1093+8
+.L1142:
+	ldr	r3, .L1149+8
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1087
-	movw	r2, #1810
-	ldr	r1, .L1093
-	ldr	r0, .L1093+4
+	bne	.L1143
+	movw	r2, #2081
+	ldr	r1, .L1149
+	ldr	r0, .L1149+4
 	bl	printf
-.L1087:
+.L1143:
 	ldrh	r3, [r4, #6]
-	cbnz	r3, .L1088
-	movw	r2, #1811
-	ldr	r1, .L1093
-	ldr	r0, .L1093+4
+	cbnz	r3, .L1144
+	movw	r2, #2082
+	ldr	r1, .L1149
+	ldr	r0, .L1149+4
 	bl	printf
-.L1088:
+.L1144:
 	ldrb	r3, [r4, #5]	@ zero_extendqisi2
 	movw	r2, #65535
 	movs	r1, #0
 	adds	r3, r3, #8
 	ldrh	r0, [r4, r3, lsl #1]
-	ldr	r3, .L1093+12
+	ldr	r3, .L1149+12
 	ldrb	r5, [r3]	@ zero_extendqisi2
-.L1089:
+.L1145:
 	cmp	r0, r2
 	ldrb	r3, [r4, #5]	@ zero_extendqisi2
-	beq	.L1091
-	ldr	r1, .L1093+16
+	beq	.L1147
+	ldr	r1, .L1149+16
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	ldrh	r2, [r4, #2]
@@ -6720,7 +7131,7 @@ ftl_get_new_free_page:
 	adds	r1, r1, #1
 	strh	r1, [r4, #10]	@ movhi
 	pop	{r3, r4, r5, pc}
-.L1091:
+.L1147:
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, r5
@@ -6733,15 +7144,15 @@ ftl_get_new_free_page:
 	ldrb	r3, [r4, #5]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r0, [r4, r3, lsl #1]
-	b	.L1089
-.L1094:
+	b	.L1145
+.L1150:
 	.align	2
-.L1093:
-	.word	.LANCHOR113
+.L1149:
+	.word	.LANCHOR119
 	.word	.LC0
-	.word	.LANCHOR87
+	.word	.LANCHOR95
 	.word	.LANCHOR80
-	.word	.LANCHOR105
+	.word	.LANCHOR111
 	.size	ftl_get_new_free_page, .-ftl_get_new_free_page
 	.section	.text.ftl_ext_alloc_new_blk,"ax",%progbits
 	.align	1
@@ -6761,13 +7172,13 @@ ftl_ext_alloc_new_blk:
 	uxth	r3, r3
 	mov	r4, r0
 	cmp	r3, r2
-	bls	.L1096
-	movw	r2, #1842
-	ldr	r1, .L1097
-	ldr	r0, .L1097+4
+	bls	.L1152
+	movw	r2, #2117
+	ldr	r1, .L1153
+	ldr	r0, .L1153+4
 	bl	printf
-.L1096:
-	ldr	r5, .L1097+8
+.L1152:
+	ldr	r5, .L1153+8
 	movs	r1, #0
 	mov	r0, r4
 	bl	ftl_erase_phy_blk
@@ -6779,12 +7190,12 @@ ftl_ext_alloc_new_blk:
 	strh	r4, [r3, #130]	@ movhi
 	strh	r0, [r3, #140]	@ movhi
 	pop	{r3, r4, r5, pc}
-.L1098:
+.L1154:
 	.align	2
-.L1097:
-	.word	.LANCHOR114
+.L1153:
+	.word	.LANCHOR120
 	.word	.LC0
-	.word	.LANCHOR104
+	.word	.LANCHOR110
 	.size	ftl_ext_alloc_new_blk, .-ftl_ext_alloc_new_blk
 	.section	.text.ftl_total_vpn_update,"ax",%progbits
 	.align	1
@@ -6797,48 +7208,48 @@ ftl_ext_alloc_new_blk:
 ftl_total_vpn_update:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L1110
+	ldr	r2, .L1166
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r1, r2
 	ldrh	r3, [r2]
 	cmp	r3, #4
-	bhi	.L1100
-	cbnz	r0, .L1100
+	bhi	.L1156
+	cbnz	r0, .L1156
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1100:
-	ldr	r2, .L1110+4
+.L1156:
+	ldr	r2, .L1166+4
 	movs	r3, #0
 	mov	r0, r3
 	movw	ip, #65535
 	strh	r3, [r1]	@ movhi
 	ldrh	r5, [r2]
-	ldr	r2, .L1110+8
+	ldr	r2, .L1166+8
 	ldr	r6, [r2]
-	ldr	r2, .L1110+12
+	ldr	r2, .L1166+12
 	ldr	r7, [r2]
 	mov	r2, r3
-.L1102:
+.L1158:
 	uxth	r1, r3
 	cmp	r5, r1
-	bhi	.L1105
-	ldr	r3, .L1110+16
+	bhi	.L1161
+	ldr	r3, .L1166+16
 	ldr	r4, [r3]
-	ldr	r3, .L1110+20
+	ldr	r3, .L1166+20
 	str	r2, [r4, #524]
 	ldr	r3, [r3]
 	str	r0, [r4, #528]
 	ldrh	r1, [r3, #120]
-	cbz	r1, .L1099
+	cbz	r1, .L1155
 	bl	__aeabi_uidiv
 	str	r0, [r4, #532]
-.L1099:
+.L1155:
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1105:
+.L1161:
 	ldrh	r1, [r6, r3, lsl #1]
 	cmp	r1, ip
-	beq	.L1103
+	beq	.L1159
 	add	r4, r7, r3, lsl #2
 	ldrb	r4, [r4, #2]	@ zero_extendqisi2
 	and	r4, r4, #224
@@ -6846,37 +7257,22 @@ ftl_total_vpn_update:
 	ite	eq
 	addeq	r0, r0, r1
 	addne	r2, r2, r1
-.L1103:
+.L1159:
 	adds	r3, r3, #1
-	b	.L1102
-.L1111:
+	b	.L1158
+.L1167:
 	.align	2
-.L1110:
-	.word	.LANCHOR115
+.L1166:
+	.word	.LANCHOR121
 	.word	.LANCHOR6
 	.word	.LANCHOR9
 	.word	.LANCHOR7
 	.word	.LANCHOR10
-	.word	.LANCHOR104
+	.word	.LANCHOR110
 	.size	ftl_total_vpn_update, .-ftl_total_vpn_update
-	.section	.text.ftl_debug_info_fill,"ax",%progbits
+	.section	.text.ftl_vpn_update,"ax",%progbits
 	.align	1
-	.global	ftl_debug_info_fill
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_debug_info_fill, %function
-ftl_debug_info_fill:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	movs	r0, #0
-	bx	lr
-	.size	ftl_debug_info_fill, .-ftl_debug_info_fill
-	.section	.text.ftl_vpn_update,"ax",%progbits
-	.align	1
-	.global	ftl_vpn_update
+	.global	ftl_vpn_update
 	.syntax unified
 	.thumb
 	.thumb_func
@@ -6888,22 +7284,22 @@ ftl_vpn_update:
 	push	{r4, lr}
 	mov	r4, r0
 	bl	zftl_list_update_data_list
-	ldr	r3, .L1116
+	ldr	r3, .L1171
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
-	cbnz	r3, .L1115
-	ldr	r3, .L1116+4
+	cbnz	r3, .L1170
+	ldr	r3, .L1171+4
 	movs	r0, #1
 	str	r0, [r3]
 	pop	{r4, pc}
-.L1115:
+.L1170:
 	movs	r0, #0
 	pop	{r4, pc}
-.L1117:
+.L1172:
 	.align	2
-.L1116:
+.L1171:
 	.word	.LANCHOR9
-	.word	.LANCHOR116
+	.word	.LANCHOR122
 	.size	ftl_vpn_update, .-ftl_vpn_update
 	.section	.text.ftl_vpn_decrement,"ax",%progbits
 	.align	1
@@ -6920,40 +7316,40 @@ ftl_vpn_decrement:
 	movw	r3, #65535
 	cmp	r0, r3
 	mov	r5, r0
-	beq	.L1119
-	ldr	r3, .L1127
+	beq	.L1174
+	ldr	r3, .L1182
 	ldr	r3, [r3]
 	ldrh	r4, [r3, r0, lsl #1]
-	cbnz	r4, .L1120
-	ldr	r3, .L1127+4
+	cbnz	r4, .L1175
+	ldr	r3, .L1182+4
 	mov	r1, r0
 	mov	r2, r4
 	ldr	r3, [r3]
 	add	r3, r3, r0, lsl #2
-	ldr	r0, .L1127+8
+	ldr	r0, .L1182+8
 	ldrb	r3, [r3, #2]	@ zero_extendqisi2
 	lsrs	r3, r3, #5
 	bl	printf
-.L1125:
+.L1180:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L1120:
+.L1175:
 	subs	r4, r4, #1
 	strh	r4, [r3, r0, lsl #1]	@ movhi
-.L1119:
-	ldr	r3, .L1127+12
+.L1174:
+	ldr	r3, .L1182+12
 	ldrh	r0, [r3]
 	mov	r4, r3
 	cmp	r5, r0
-	beq	.L1125
+	beq	.L1180
 	movw	r2, #65535
 	cmp	r0, r2
-	bne	.L1122
+	bne	.L1177
 	strh	r5, [r3]	@ movhi
-	b	.L1125
-.L1122:
+	b	.L1180
+.L1177:
 	bl	ftl_vpn_update
-	ldr	r3, .L1127+16
+	ldr	r3, .L1182+16
 	adds	r0, r0, #0
 	it	ne
 	movne	r0, #1
@@ -6967,18 +7363,18 @@ ftl_vpn_decrement:
 	movhi	r2, #0
 	strh	r2, [r3]	@ movhi
 	ldrh	r2, [r3]
-	ldr	r3, .L1127+20
+	ldr	r3, .L1182+20
 	strh	r1, [r3, r2, lsl #1]	@ movhi
 	pop	{r3, r4, r5, pc}
-.L1128:
+.L1183:
 	.align	2
-.L1127:
+.L1182:
 	.word	.LANCHOR9
 	.word	.LANCHOR7
-	.word	.LC60
-	.word	.LANCHOR66
-	.word	.LANCHOR117
-	.word	.LANCHOR67
+	.word	.LC65
+	.word	.LANCHOR73
+	.word	.LANCHOR123
+	.word	.LANCHOR74
 	.size	ftl_vpn_decrement, .-ftl_vpn_decrement
 	.section	.text.lpa_hash_update_ppa,"ax",%progbits
 	.align	1
@@ -6993,21 +7389,21 @@ lpa_hash_update_ppa:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	uxtb	ip, r0
-	ldr	r4, .L1140
+	ldr	r4, .L1195
 	movw	r6, #65535
 	mov	fp, r6
-	ldr	r5, .L1140+4
+	ldr	r5, .L1195+4
 	ldr	lr, [r4]
-	ldr	r4, .L1140+8
+	ldr	r4, .L1195+8
 	ldrh	r3, [r5, ip, lsl #1]
 	ldr	r4, [r4]
-.L1130:
+.L1185:
 	cmp	r3, fp
-	beq	.L1134
+	beq	.L1189
 	ldr	r7, [lr, r3, lsl #2]
 	add	r8, lr, r3, lsl #2
 	cmp	r0, r7
-	bne	.L1131
+	bne	.L1186
 	cmp	r6, fp
 	mov	r10, #-1
 	ite	eq
@@ -7019,45 +7415,45 @@ lpa_hash_update_ppa:
 	strhne	r7, [r4, r6, lsl #1]	@ movhi
 	movw	r6, #65535
 	strh	r6, [r4, r3, lsl #1]	@ movhi
-.L1134:
+.L1189:
 	ldrh	r3, [r5, ip, lsl #1]
 	str	r0, [lr, r2, lsl #2]
 	strh	r2, [r5, ip, lsl #1]	@ movhi
 	strh	r3, [r4, r2, lsl #1]	@ movhi
 	adds	r3, r1, #1
-	beq	.L1136
-	ldr	r3, .L1140+12
+	beq	.L1191
+	ldr	r3, .L1195+12
 	ldrh	r2, [r3]
-	ldr	r3, .L1140+16
+	ldr	r3, .L1195+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	rsb	r3, r3, #24
 	subs	r0, r3, r2
 	movs	r3, #1
 	lsls	r3, r3, r0
 	lsr	r0, r1, r2
-	ldr	r2, .L1140+20
+	ldr	r2, .L1195+20
 	subs	r3, r3, #1
 	ands	r0, r0, r3
 	ldrb	r1, [r2]	@ zero_extendqisi2
 	bl	__aeabi_uidiv
 	uxth	r0, r0
 	bl	ftl_vpn_decrement
-.L1136:
+.L1191:
 	mov	r0, #-1
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1131:
+.L1186:
 	mov	r6, r3
 	ldrh	r3, [r4, r3, lsl #1]
-	b	.L1130
-.L1141:
+	b	.L1185
+.L1196:
 	.align	2
-.L1140:
-	.word	.LANCHOR111
-	.word	.LANCHOR110
-	.word	.LANCHOR112
-	.word	.LANCHOR68
-	.word	.LANCHOR31
-	.word	.LANCHOR69
+.L1195:
+	.word	.LANCHOR117
+	.word	.LANCHOR116
+	.word	.LANCHOR118
+	.word	.LANCHOR75
+	.word	.LANCHOR32
+	.word	.LANCHOR76
 	.size	lpa_hash_update_ppa, .-lpa_hash_update_ppa
 	.section	.text.ftl_mask_bad_block,"ax",%progbits
 	.align	1
@@ -7070,7 +7466,7 @@ lpa_hash_update_ppa:
 ftl_mask_bad_block:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1149
+	ldr	r3, .L1204
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
 	ldrb	r4, [r3]	@ zero_extendqisi2
 	movs	r3, #1
@@ -7079,12 +7475,12 @@ ftl_mask_bad_block:
 	lsr	r2, r0, r1
 	subs	r4, r4, #1
 	ands	r4, r4, r2
-	ldr	r2, .L1149+4
+	ldr	r2, .L1204+4
 	uxtb	r4, r4
 	ldrb	r5, [r2]	@ zero_extendqisi2
 	smulbb	r2, r4, r5
 	uxtb	r8, r2
-	ldr	r2, .L1149+8
+	ldr	r2, .L1204+8
 	ldrh	r6, [r2]
 	lsr	r2, r0, r6
 	subs	r0, r1, r6
@@ -7094,7 +7490,7 @@ ftl_mask_bad_block:
 	ands	r0, r0, r2
 	uxth	r10, r0
 	bl	__aeabi_uidiv
-	ldr	r3, .L1149+12
+	ldr	r3, .L1204+12
 	cmp	r5, #1
 	it	hi
 	addhi	r2, r5, #-1
@@ -7107,19 +7503,19 @@ ftl_mask_bad_block:
 	addhi	r2, r2, r8
 	uxtbhi	r8, r2
 	lsls	r3, r3, #17
-	bpl	.L1144
+	bpl	.L1199
 	uxth	r3, r0
 	str	r10, [sp]
 	mov	r2, r8
-	ldr	r0, .L1149+16
+	ldr	r0, .L1204+16
 	mov	r1, r4
 	bl	printf
-.L1144:
-	ldr	r3, .L1149+20
+.L1199:
+	ldr	r3, .L1204+20
 	ldrh	r3, [r3]
 	cmp	r3, r7
-	bls	.L1142
-	ldr	r3, .L1149+24
+	bls	.L1197
+	ldr	r3, .L1204+24
 	uxth	r6, r6
 	movs	r2, #1
 	lsl	r8, r2, r8
@@ -7128,18 +7524,18 @@ ftl_mask_bad_block:
 	ldrb	r2, [r6, #3]	@ zero_extendqisi2
 	orr	r2, r2, r8
 	strb	r2, [r6, #3]
-.L1142:
+.L1197:
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L1150:
+.L1205:
 	.align	2
-.L1149:
-	.word	.LANCHOR31
-	.word	.LANCHOR69
-	.word	.LANCHOR68
+.L1204:
+	.word	.LANCHOR32
+	.word	.LANCHOR76
+	.word	.LANCHOR75
 	.word	.LANCHOR14
-	.word	.LC61
+	.word	.LC66
 	.word	.LANCHOR6
 	.word	.LANCHOR7
 	.size	ftl_mask_bad_block, .-ftl_mask_bad_block
@@ -7152,98 +7548,113 @@ ftl_mask_bad_block:
 	.fpu softvfp
 	.type	gc_free_bad_sblk, %function
 gc_free_bad_sblk:
-	@ args = 0, pretend = 0, frame = 8
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r8, r0
-	ldr	r4, .L1165
-	ldr	r3, [r4, #580]
-	cbz	r3, .L1163
-	ldr	r7, .L1165+4
-	mov	r10, #0
-.L1153:
-	ldr	r3, .L1165+8
+	ldr	r4, .L1226
+	ldr	r3, [r4, #2116]
+	cbz	r3, .L1223
+	mov	fp, #0
+.L1208:
+	ldr	r3, .L1226+4
 	ldrb	r2, [r3]	@ zero_extendqisi2
-	uxth	r3, r10
+	uxth	r3, fp
 	cmp	r2, r3
-	bhi	.L1160
-.L1163:
+	bhi	.L1218
+.L1223:
 	movs	r0, #0
-	add	sp, sp, #8
-	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1160:
-	ldr	r3, .L1165+12
-	uxth	r0, r10
-	ldrb	fp, [r3]	@ zero_extendqisi2
-	mov	r1, fp
+.L1218:
+	ldr	r3, .L1226+8
+	uxth	r0, fp
+	mov	r10, #0
+	ldrb	r7, [r3]	@ zero_extendqisi2
+	mov	r1, r7
 	bl	__aeabi_idiv
-	ldr	r3, .L1165+16
-	uxth	r6, fp
-	cmp	fp, #1
-	ldr	r2, .L1165+20
-	mov	fp, #0
+	ldr	r3, .L1226+12
+	uxth	r6, r7
+	cmp	r7, #1
 	ldrb	r5, [r3]	@ zero_extendqisi2
-	ldrh	r3, [r7]
+	ldr	r3, .L1226+16
 	rsb	r5, r5, #24
-	sub	r5, r5, r3
+	ldrh	r2, [r3]
+	mov	r7, r3
+	sub	r5, r5, r2
 	lsl	r0, r0, r5
 	smulbb	r5, r8, r6
 	itt	hi
 	addhi	r6, r6, #-1
-	andhi	r6, r6, r10
+	andhi	r6, r6, fp
 	add	r5, r5, r0
 	uxth	r5, r5
 	itt	hi
 	addhi	r5, r5, r6
 	uxthhi	r5, r5
-.L1155:
-	ldr	r1, [r4, #580]
-	uxth	r6, fp
-	mov	r3, r6
-	cmp	r1, r6
-	bhi	.L1159
-	add	r10, r10, #1
-	b	.L1153
-.L1159:
-	add	r3, r3, #292
-	ldrh	r3, [r4, r3, lsl #1]
-	cmp	r3, r5
-	bne	.L1156
-	mov	r0, r2
+.L1210:
+	ldr	r0, [r4, #2116]
+	uxth	r6, r10
+	mov	r1, r6
+	cmp	r0, r6
+	bhi	.L1217
+	add	fp, fp, #1
+	b	.L1208
+.L1217:
+	addw	r1, r1, #1060
+	ldrh	r1, [r4, r1, lsl #1]
+	cmp	r1, r5
+	bne	.L1211
 	mov	r1, r5
-	str	r2, [sp, #4]
+	ldr	r0, .L1226+20
 	bl	printf
+	ldr	r1, .L1226+24
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	cbnz	r1, .L1212
+	ldr	r1, .L1226+28
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	cbz	r1, .L1213
+.L1212:
+	ldr	r1, .L1226+32
+	ldr	r3, .L1226+36
+	ldr	r1, [r1]
+	ldr	r1, [r1, #156]
+	cmp	r1, r3
+	beq	.L1214
+.L1213:
 	ldrh	r0, [r7]
 	lsl	r0, r5, r0
 	bl	ftl_mask_bad_block
-	ldr	r3, [r4, #580]
-	ldr	r2, [sp, #4]
-.L1157:
-	cmp	r6, r3
-	bcc	.L1158
-	subs	r3, r3, #1
-	str	r3, [r4, #580]
-.L1156:
-	add	fp, fp, #1
-	b	.L1155
-.L1158:
-	addw	r1, r6, #293
-	ldrh	r0, [r4, r1, lsl #1]
-	add	r1, r6, #292
-	adds	r6, r6, #1
-	uxth	r6, r6
-	strh	r0, [r4, r1, lsl #1]	@ movhi
-	b	.L1157
-.L1166:
+.L1214:
+	ldr	r1, [r4, #2116]
+.L1215:
+	cmp	r6, r1
+	bcc	.L1216
+	subs	r1, r1, #1
+	str	r1, [r4, #2116]
+.L1211:
+	add	r10, r10, #1
+	b	.L1210
+.L1216:
+	addw	r0, r6, #1061
+	adds	r3, r6, #1
+	ldrh	ip, [r4, r0, lsl #1]
+	addw	r0, r6, #1060
+	uxth	r6, r3
+	strh	ip, [r4, r0, lsl #1]	@ movhi
+	b	.L1215
+.L1227:
 	.align	2
-.L1165:
-	.word	.LANCHOR64
-	.word	.LANCHOR68
+.L1226:
+	.word	.LANCHOR71
 	.word	.LANCHOR80
-	.word	.LANCHOR69
-	.word	.LANCHOR31
-	.word	.LC62
+	.word	.LANCHOR76
+	.word	.LANCHOR32
+	.word	.LANCHOR75
+	.word	.LC67
+	.word	.LANCHOR124
+	.word	.LANCHOR81
+	.word	.LANCHOR110
+	.word	1145785929
 	.size	gc_free_bad_sblk, .-gc_free_bad_sblk
 	.section	.text.ftl_free_sblk,"ax",%progbits
 	.align	1
@@ -7258,26 +7669,26 @@ ftl_free_sblk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r5, r0
-	ldr	r3, .L1186
-	ldr	r8, [r3]
+	ldr	r3, .L1249
+	ldr	r6, [r3]
 	lsls	r3, r0, #2
-	add	r7, r8, r3
+	adds	r7, r6, r3
 	ldrb	r4, [r7, #2]	@ zero_extendqisi2
 	lsls	r2, r4, #28
 	lsr	r3, r4, #5
 	str	r3, [sp, #4]
-	bpl	.L1169
-	ldr	r3, .L1186+4
-	ldrh	fp, [r8, r0, lsl #2]
-	ldr	r1, .L1186+8
+	bpl	.L1229
+	ldr	r3, .L1249+4
+	ldrh	fp, [r6, r0, lsl #2]
+	ldr	r1, .L1249+8
 	ldr	r3, [r3]
-	ldr	r0, [r8, r0, lsl #2]
+	ldr	r0, [r6, r0, lsl #2]
 	ubfx	fp, fp, #0, #11
-	ldrh	r6, [r1]
+	ldrh	r8, [r1]
 	ldrh	r2, [r3, #74]
 	ldrh	r3, [r3, #72]
 	ubfx	r10, r0, #11, #8
-	mov	r1, r6
+	mov	r1, r8
 	add	r2, r2, fp
 	uxth	r2, r2
 	add	r3, r3, r10
@@ -7287,62 +7698,62 @@ ftl_free_sblk:
 	str	r3, [sp, #12]
 	bl	__aeabi_uidiv
 	ldr	r3, [sp, #12]
-	ldr	r1, .L1186+12
+	ldr	r1, .L1249+12
 	ldr	r2, [sp, #8]
 	ldrh	r1, [r1]
 	uxtah	r0, r3, r0
 	cmp	r0, r1
-	ble	.L1170
-	ldr	r3, .L1186+16
-	ldr	r1, .L1186+20
+	ble	.L1230
+	ldr	r3, .L1249+16
+	ldr	r1, .L1249+20
 	ldrh	r2, [r3]
-	ldr	r3, .L1186+24
+	ldr	r3, .L1249+24
 	ldrh	r1, [r1]
 	adds	r2, r2, #7
 	ldrh	r3, [r3]
 	add	r3, r3, r1
 	cmp	r2, r3
-	blt	.L1171
-.L1176:
+	blt	.L1231
+.L1236:
 	movs	r3, #2
 	bfi	r4, r3, #3, #2
-	b	.L1184
-.L1171:
-	ldr	r3, .L1186+28
-	ldr	r1, .L1186+32
+	b	.L1246
+.L1231:
+	ldr	r3, .L1249+28
+	ldr	r1, .L1249+32
 	ldrh	r2, [r3]
-	ldr	r3, .L1186+36
+	ldr	r3, .L1249+36
 	ldrh	r1, [r1]
 	adds	r2, r2, #7
 	ldrh	r3, [r3]
 	add	r3, r3, r1
-	ldr	r1, .L1186+40
+	ldr	r1, .L1249+40
 	ldrh	r1, [r1]
 	add	r3, r3, r1
 	cmp	r2, r3
-	blt	.L1176
-.L1185:
+	blt	.L1236
+.L1248:
 	bfc	r4, #3, #2
-.L1184:
+.L1246:
 	strb	r4, [r7, #2]
-.L1172:
+.L1232:
 	ldrb	r3, [r7, #2]	@ zero_extendqisi2
 	ands	r3, r3, #24
-	bne	.L1177
-	mul	r6, r6, r10
-	ldrh	r3, [r8, r5, lsl #2]
+	bne	.L1237
+	mul	r8, r8, r10
+	ldrh	r3, [r6, r5, lsl #2]
 	lsr	r10, r10, #3
-	add	r6, r6, r6, lsl #1
-	add	fp, fp, r6, asr #2
+	add	r8, r8, r8, lsl #1
+	add	fp, fp, r8, asr #2
 	bfi	r3, fp, #0, #11
-	strh	r3, [r8, r5, lsl #2]	@ movhi
-	ldr	r3, [r8, r5, lsl #2]
+	strh	r3, [r6, r5, lsl #2]	@ movhi
+	ldr	r3, [r6, r5, lsl #2]
 	bfi	r3, r10, #11, #8
-	str	r3, [r8, r5, lsl #2]
-.L1169:
+	str	r3, [r6, r5, lsl #2]
+.L1238:
 	mov	r0, r5
 	bl	zftl_remove_data_node
-	ldr	r3, .L1186
+	ldr	r3, .L1249
 	lsls	r2, r5, #2
 	ldr	r3, [r3]
 	add	r3, r3, r2
@@ -7350,109 +7761,161 @@ ftl_free_sblk:
 	bfc	r2, #5, #3
 	strb	r2, [r3, #2]
 	movs	r2, #0
-	ldr	r3, .L1186+44
+	ldr	r3, .L1249+44
 	ldr	r3, [r3]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #6
 	and	r3, r3, #7
 	cmp	r3, #4
-	bhi	.L1179
+	bhi	.L1241
 	mov	r0, r5
 	bl	gc_free_bad_sblk
-.L1179:
+.L1241:
 	ldrb	r3, [r7, #2]	@ zero_extendqisi2
 	lsls	r3, r3, #28
-	bpl	.L1180
-	ldr	r3, .L1186+48
+	bpl	.L1242
+	ldr	r3, .L1249+48
 	ldr	r3, [r3]
 	ldrh	r2, [r3, #586]
 	cmp	r2, r5
-	bne	.L1180
+	bne	.L1242
 	ldrh	r1, [r3, #590]
 	movw	r2, #65535
 	strh	r2, [r3, #586]	@ movhi
 	cmp	r1, r2
-	bne	.L1180
+	bne	.L1242
 	strh	r5, [r3, #590]	@ movhi
 	mov	r1, r5
-	ldr	r0, .L1186+52
+	ldr	r0, .L1249+52
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
 	b	printf
-.L1170:
-	mla	r3, r3, r6, r2
-	ldr	r2, .L1186+56
+.L1230:
+	mla	r3, r3, r8, r2
+	ldr	r2, .L1249+56
 	ldrh	r2, [r2]
 	cmp	r3, r2
-	ble	.L1172
-	ldr	r3, .L1186+28
-	ldr	r1, .L1186+32
+	ble	.L1232
+	ldr	r3, .L1249+28
+	ldr	r1, .L1249+32
 	ldrh	r2, [r3]
-	ldr	r3, .L1186+36
+	ldr	r3, .L1249+36
 	ldrh	r1, [r1]
 	ldrh	r3, [r3]
 	add	r3, r3, r1
-	ldr	r1, .L1186+40
+	ldr	r1, .L1249+40
 	ldrh	r1, [r1]
 	add	r3, r3, r1
 	adds	r1, r2, #7
 	cmp	r1, r3
-	bge	.L1185
-	ldr	r1, .L1186+16
-	ldr	ip, .L1186+20
+	bge	.L1248
+	ldr	r1, .L1249+16
+	ldr	ip, .L1249+20
 	ldrh	r0, [r1]
-	ldr	r1, .L1186+24
+	ldr	r1, .L1249+24
 	ldrh	ip, [ip]
 	adds	r0, r0, #7
 	ldrh	r1, [r1]
 	add	r1, r1, ip
 	cmp	r0, r1
-	bge	.L1176
+	bge	.L1236
 	adds	r2, r2, #23
 	cmp	r3, r2
-	bgt	.L1176
-	b	.L1185
-.L1177:
+	bgt	.L1236
+	b	.L1248
+.L1237:
 	cmp	r3, #16
-	bne	.L1169
+	bne	.L1238
 	mov	r0, fp
-	mov	r1, r6
+	mov	r1, r8
 	bl	__aeabi_idiv
 	add	r0, r0, r0, lsl #1
-	ldr	r3, [r8, r5, lsl #2]
+	ldr	r3, [r6, r5, lsl #2]
 	asr	fp, fp, #5
 	add	r10, r10, r0, asr #2
 	bfi	r3, r10, #11, #8
-	str	r3, [r8, r5, lsl #2]
+	str	r3, [r6, r5, lsl #2]
 	bfi	r3, fp, #0, #11
-	strh	r3, [r8, r5, lsl #2]	@ movhi
-	b	.L1169
-.L1180:
+.L1247:
+	strh	r3, [r6, r5, lsl #2]	@ movhi
+	b	.L1238
+.L1229:
+	tst	r4, #24
+	bne	.L1238
+	ldr	r3, .L1249+60
+	ldrh	r3, [r3]
+	cmp	r3, #0
+	bne	.L1238
+	ldr	r3, .L1249+20
+	ldrh	r1, [r3]
+	cmp	r1, #15
+	bhi	.L1238
+	ldr	r3, .L1249+36
+	ldr	r2, .L1249+32
+	ldrh	r3, [r3]
+	ldrh	r2, [r2]
+	add	r3, r3, r2
+	ldr	r2, .L1249+40
+	ldrh	r2, [r2]
+	add	r3, r3, r2
+	ldr	r2, .L1249+28
+	ldrh	r2, [r2]
+	adds	r2, r2, #16
+	cmp	r3, r2
+	ble	.L1238
+	ldr	r3, .L1249+16
+	ldrh	r2, [r3]
+	ldr	r3, .L1249+24
+	adds	r2, r2, #7
+	ldrh	r3, [r3]
+	add	r3, r3, r1
+	cmp	r2, r3
+	blt	.L1238
+	movs	r3, #2
+	bfi	r4, r3, #3, #2
+	ldr	r3, .L1249+8
+	strb	r4, [r7, #2]
+	ldrh	r4, [r6, r0, lsl #2]
+	ldrh	r1, [r3]
+	ubfx	r4, r4, #0, #11
+	mov	r0, r4
+	asrs	r4, r4, #5
+	bl	__aeabi_idiv
+	ldr	r3, [r6, r5, lsl #2]
+	add	r0, r0, r0, lsl #1
+	ubfx	r2, r3, #11, #8
+	add	r0, r2, r0, asr #2
+	bfi	r3, r0, #11, #8
+	str	r3, [r6, r5, lsl #2]
+	bfi	r3, r4, #0, #11
+	b	.L1247
+.L1242:
 	mov	r0, r5
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
 	b	zftl_insert_free_list
-.L1187:
+.L1250:
 	.align	2
-.L1186:
+.L1249:
 	.word	.LANCHOR7
-	.word	.LANCHOR104
+	.word	.LANCHOR110
 	.word	.LANCHOR8
-	.word	.LANCHOR118
-	.word	.LANCHOR95
-	.word	.LANCHOR99
-	.word	.LANCHOR94
-	.word	.LANCHOR119
+	.word	.LANCHOR125
+	.word	.LANCHOR101
+	.word	.LANCHOR105
+	.word	.LANCHOR93
+	.word	.LANCHOR98
+	.word	.LANCHOR103
 	.word	.LANCHOR97
-	.word	.LANCHOR92
-	.word	.LANCHOR90
+	.word	.LANCHOR99
 	.word	.LANCHOR9
 	.word	.LANCHOR10
-	.word	.LC63
-	.word	.LANCHOR120
+	.word	.LC68
+	.word	.LANCHOR126
+	.word	.LANCHOR107
 	.size	ftl_free_sblk, .-ftl_free_sblk
 	.section	.text.gc_free_src_blk,"ax",%progbits
 	.align	1
@@ -7467,128 +7930,128 @@ gc_free_src_blk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r5, #0
-	ldr	r6, .L1225
-.L1189:
+	ldr	r6, .L1288
+.L1252:
 	uxth	r2, r5
-	ldr	r3, .L1225+4
+	ldr	r3, .L1288+4
 	ldrh	r1, [r3, #52]
 	cmp	r1, r2
-	bhi	.L1203
+	bhi	.L1266
 	movs	r2, #0
 	strh	r2, [r3, #52]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1203:
+.L1266:
 	uxth	r2, r5
 	add	r3, r3, r2, lsl #1
 	ldrh	r4, [r3, #54]
 	ldr	r3, [r6]
 	ldrh	r2, [r3, r4, lsl #1]
-	cbz	r2, .L1190
+	cbz	r2, .L1253
 	mov	r1, r4
-	ldr	r0, .L1225+8
+	ldr	r0, .L1288+8
 	bl	printf
-.L1190:
+.L1253:
 	ldr	r3, [r6]
 	movs	r2, #0
 	strh	r2, [r3, r4, lsl #1]	@ movhi
-	ldr	r3, .L1225+12
+	ldr	r3, .L1288+12
 	ldr	r7, [r3]
-	ldr	r3, .L1225+16
+	ldr	r3, .L1288+16
 	ldr	r3, [r3]
 	add	r7, r7, r4, lsl #2
 	lsls	r3, r3, #23
-	bpl	.L1191
+	bpl	.L1254
 	ldrb	r2, [r7, #2]	@ zero_extendqisi2
 	mov	r1, r4
-	ldr	r0, .L1225+20
+	ldr	r0, .L1288+20
 	lsrs	r2, r2, #5
 	bl	printf
-.L1191:
+.L1254:
 	ldrb	r3, [r7, #2]	@ zero_extendqisi2
 	and	r2, r3, #224
 	cmp	r2, #224
-	beq	.L1192
+	beq	.L1255
 	tst	r3, #192
-	bne	.L1193
-.L1192:
-	movw	r2, #1114
-	ldr	r1, .L1225+24
-	ldr	r0, .L1225+28
+	bne	.L1256
+.L1255:
+	movw	r2, #1362
+	ldr	r1, .L1288+24
+	ldr	r0, .L1288+28
 	bl	printf
-.L1193:
+.L1256:
 	mov	r0, r4
 	bl	ftl_free_sblk
-	ldr	r3, .L1225+32
+	ldr	r3, .L1288+32
 	ldr	r3, [r3]
 	ldrh	r1, [r3, #124]
-	cbz	r1, .L1194
+	cbz	r1, .L1257
 	add	r0, r3, #392
 	movs	r2, #0
-.L1196:
+.L1259:
 	ldrh	r7, [r0], #2
 	cmp	r4, r7
-	bne	.L1195
+	bne	.L1258
 	adds	r2, r2, #196
 	movw	r0, #65535
 	subs	r1, r1, #1
 	strh	r0, [r3, r2, lsl #1]	@ movhi
 	strh	r1, [r3, #124]	@ movhi
-.L1194:
+.L1257:
 	ldrh	r1, [r3, #120]
-	cbz	r1, .L1197
+	cbz	r1, .L1260
 	add	r0, r3, #136
 	movs	r2, #0
-.L1199:
+.L1262:
 	ldrh	r7, [r0], #2
 	cmp	r4, r7
-	bne	.L1198
+	bne	.L1261
 	adds	r2, r2, #68
 	movw	r0, #65535
 	subs	r1, r1, #1
 	strh	r0, [r3, r2, lsl #1]	@ movhi
 	strh	r1, [r3, #120]	@ movhi
-.L1197:
+.L1260:
 	ldrh	r1, [r3, #122]
-	cbz	r1, .L1200
+	cbz	r1, .L1263
 	add	r0, r3, #264
 	movs	r2, #0
-.L1202:
+.L1265:
 	ldrh	r7, [r0], #2
 	cmp	r4, r7
-	bne	.L1201
+	bne	.L1264
 	adds	r2, r2, #132
 	movw	r0, #65535
 	subs	r1, r1, #1
 	strh	r0, [r3, r2, lsl #1]	@ movhi
 	strh	r1, [r3, #122]	@ movhi
-.L1200:
+.L1263:
 	adds	r5, r5, #1
-	b	.L1189
-.L1195:
+	b	.L1252
+.L1258:
 	adds	r2, r2, #1
 	cmp	r2, #64
-	bne	.L1196
-	b	.L1194
-.L1198:
+	bne	.L1259
+	b	.L1257
+.L1261:
 	adds	r2, r2, #1
 	cmp	r2, #64
-	bne	.L1199
-	b	.L1197
-.L1201:
+	bne	.L1262
+	b	.L1260
+.L1264:
 	adds	r2, r2, #1
 	cmp	r2, #64
-	bne	.L1202
-	b	.L1200
-.L1226:
+	bne	.L1265
+	b	.L1263
+.L1289:
 	.align	2
-.L1225:
+.L1288:
 	.word	.LANCHOR9
-	.word	.LANCHOR64
-	.word	.LC64
+	.word	.LANCHOR71
+	.word	.LC69
 	.word	.LANCHOR7
 	.word	.LANCHOR14
-	.word	.LC65
-	.word	.LANCHOR121
+	.word	.LC70
+	.word	.LANCHOR127
 	.word	.LC0
 	.word	.LANCHOR10
 	.size	gc_free_src_blk, .-gc_free_src_blk
@@ -7605,13 +8068,13 @@ print_ftl_debug_info:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
 	sub	sp, sp, #32
-	ldr	r4, .L1228
-	ldr	r5, .L1228+4
-	ldr	r6, .L1228+8
+	ldr	r4, .L1291
+	ldr	r5, .L1291+4
+	ldr	r6, .L1291+8
 	ldr	r1, [r4]
 	ldr	r0, [r5]
 	ldr	r6, [r6]
-	ldr	r3, .L1228+12
+	ldr	r3, .L1291+12
 	ldrh	r2, [r1, #146]
 	ldrh	r1, [r1, #148]
 	ldrh	r3, [r3]
@@ -7620,26 +8083,26 @@ print_ftl_debug_info:
 	str	r6, [sp, #24]
 	ldr	r0, [r0, #524]
 	str	r0, [sp, #20]
-	ldr	r0, .L1228+16
+	ldr	r0, .L1291+16
 	ldrh	r0, [r0]
 	str	r0, [sp, #16]
-	ldr	r0, .L1228+20
+	ldr	r0, .L1291+20
 	ldrh	r0, [r0]
 	str	r0, [sp, #12]
-	ldr	r0, .L1228+24
+	ldr	r0, .L1291+24
 	ldrh	r0, [r0]
 	str	r0, [sp, #8]
-	ldr	r0, .L1228+28
+	ldr	r0, .L1291+28
 	ldrh	r0, [r0]
 	str	r0, [sp, #4]
-	ldr	r0, .L1228+32
+	ldr	r0, .L1291+32
 	ldrh	r0, [r0]
 	str	r0, [sp]
-	ldr	r0, .L1228+36
+	ldr	r0, .L1291+36
 	bl	printf
 	ldr	r1, [r4]
-	ldr	r3, .L1228+40
-	ldr	r0, .L1228+44
+	ldr	r3, .L1291+40
+	ldr	r0, .L1291+44
 	ldr	r2, [r1, #64]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r2, [sp, #4]
@@ -7649,7 +8112,7 @@ print_ftl_debug_info:
 	ldr	r1, [r1, #20]
 	bl	printf
 	ldr	r1, [r4]
-	ldr	r0, .L1228+48
+	ldr	r0, .L1291+48
 	ldr	r3, [r1, #16]
 	ldr	r2, [r1, #60]
 	ldr	r1, [r1, #52]
@@ -7672,22 +8135,22 @@ print_ftl_debug_info:
 	str	r0, [sp, #4]
 	ldrh	r0, [r2, #92]
 	str	r0, [sp]
-	ldr	r0, .L1228+52
+	ldr	r0, .L1291+52
 	ldr	r2, [r2, #84]
 	bl	printf
-	ldr	r0, .L1228+56
-	ldr	r3, .L1228+60
-	ldr	r2, .L1228+64
+	ldr	r0, .L1291+56
+	ldr	r3, .L1291+60
+	ldr	r2, .L1291+64
 	ldrh	r0, [r0]
-	ldr	r1, .L1228+68
+	ldr	r1, .L1291+68
 	ldrh	r3, [r3]
 	ldrh	r2, [r2]
 	ldrh	r1, [r1]
 	str	r0, [sp, #4]
-	ldr	r0, .L1228+72
+	ldr	r0, .L1291+72
 	ldrh	r0, [r0]
 	str	r0, [sp]
-	ldr	r0, .L1228+76
+	ldr	r0, .L1291+76
 	bl	printf
 	ldr	r4, [r4]
 	ldr	r0, [r5]
@@ -7700,35 +8163,35 @@ print_ftl_debug_info:
 	str	r4, [sp, #4]
 	ldrh	r0, [r0, #590]
 	str	r0, [sp]
-	ldr	r0, .L1228+80
+	ldr	r0, .L1291+80
 	bl	printf
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, pc}
-.L1229:
+.L1292:
 	.align	2
-.L1228:
-	.word	.LANCHOR104
+.L1291:
+	.word	.LANCHOR110
 	.word	.LANCHOR10
-	.word	.LANCHOR122
-	.word	.LANCHOR97
-	.word	.LANCHOR94
-	.word	.LANCHOR90
-	.word	.LANCHOR92
-	.word	.LANCHOR101
+	.word	.LANCHOR128
+	.word	.LANCHOR103
+	.word	.LANCHOR93
 	.word	.LANCHOR99
-	.word	.LC66
-	.word	.LANCHOR123
-	.word	.LC67
-	.word	.LC68
-	.word	.LC69
-	.word	.LANCHOR81
-	.word	.LANCHOR63
-	.word	.LANCHOR96
-	.word	.LANCHOR93
-	.word	.LANCHOR86
-	.word	.LC70
+	.word	.LANCHOR97
+	.word	.LANCHOR107
+	.word	.LANCHOR105
 	.word	.LC71
+	.word	.LANCHOR129
+	.word	.LC72
+	.word	.LC73
+	.word	.LC74
+	.word	.LANCHOR87
+	.word	.LANCHOR70
+	.word	.LANCHOR102
+	.word	.LANCHOR100
+	.word	.LANCHOR94
+	.word	.LC75
+	.word	.LC76
 	.size	print_ftl_debug_info, .-print_ftl_debug_info
 	.section	.text.ftl_write_buf,"ax",%progbits
 	.align	1
@@ -7743,19 +8206,19 @@ ftl_write_buf:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
 	mov	r4, r0
-	cbnz	r0, .L1231
-	mov	r2, #676
-	ldr	r1, .L1240
-	ldr	r0, .L1240+4
+	cbnz	r0, .L1294
+	movw	r2, #803
+	ldr	r1, .L1303
+	ldr	r0, .L1303+4
 	bl	printf
 	bl	print_ftl_debug_info
 	mov	r0, #-1
 	pop	{r4, r5, r6, pc}
-.L1234:
+.L1297:
 	mov	r1, r4
-	ldr	r0, .L1240+8
+	ldr	r0, .L1303+8
 	bl	buf_add_tail
-	ldr	r3, .L1240+12
+	ldr	r3, .L1303+12
 	ldrb	r1, [r4, #40]	@ zero_extendqisi2
 	ldrb	r0, [r6]	@ zero_extendqisi2
 	ldr	r3, [r3]
@@ -7769,37 +8232,37 @@ ftl_write_buf:
 	adds	r2, r2, #1
 	str	r2, [r3, #32]
 	pop	{r4, r5, r6, pc}
-.L1231:
-	ldr	r5, .L1240+16
+.L1294:
+	ldr	r5, .L1303+16
 	ldrb	r1, [r0, #40]	@ zero_extendqisi2
 	ldrb	r2, [r5]	@ zero_extendqisi2
 	cmp	r1, r2
-	bls	.L1236
-	movw	r2, #681
-	ldr	r1, .L1240
-	ldr	r0, .L1240+4
+	bls	.L1299
+	movw	r2, #810
+	ldr	r1, .L1303
+	ldr	r0, .L1303+4
 	bl	printf
-.L1236:
+.L1299:
 	ldrb	r3, [r4, #40]	@ zero_extendqisi2
-	ldr	r6, .L1240+20
-	cbz	r3, .L1233
+	ldr	r6, .L1303+20
+	cbz	r3, .L1296
 	ldrb	r2, [r5]	@ zero_extendqisi2
 	cmp	r2, r3
-	bcs	.L1234
-.L1233:
+	bcs	.L1297
+.L1296:
 	mov	r0, r4
 	bl	zbuf_free
 	ldrb	r0, [r6]	@ zero_extendqisi2
 	pop	{r4, r5, r6, pc}
-.L1241:
+.L1304:
 	.align	2
-.L1240:
-	.word	.LANCHOR124
+.L1303:
+	.word	.LANCHOR130
 	.word	.LC0
-	.word	.LANCHOR59
-	.word	.LANCHOR104
-	.word	.LANCHOR125
-	.word	.LANCHOR60
+	.word	.LANCHOR66
+	.word	.LANCHOR110
+	.word	.LANCHOR131
+	.word	.LANCHOR67
 	.size	ftl_write_buf, .-ftl_write_buf
 	.section	.text.ftl_write_completed,"ax",%progbits
 	.align	1
@@ -7810,115 +8273,139 @@ ftl_write_buf:
 	.fpu softvfp
 	.type	ftl_write_completed, %function
 ftl_write_completed:
-	@ args = 0, pretend = 0, frame = 0
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	mov	r8, #0
-	ldr	r7, .L1252
-.L1243:
-	ldr	r2, .L1252+4
-	ldrb	r5, [r2]	@ zero_extendqisi2
-	cmp	r5, #255
-	bne	.L1251
-	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L1251:
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	fp, #0
+	ldr	r8, .L1321+36
+	ldr	r10, .L1321+40
+.L1306:
+	ldrb	r6, [r8]	@ zero_extendqisi2
+	cmp	r6, #255
+	bne	.L1317
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1317:
 	movs	r3, #48
-	add	r6, r5, r5, lsl #1
-	muls	r3, r5, r3
-	add	r6, r7, r6, lsl #4
-	adds	r4, r7, r3
-	ldrb	r3, [r7, r3]	@ zero_extendqisi2
-	strb	r3, [r2]
+	ldr	r5, .L1321
+	muls	r3, r6, r3
+	add	r7, r6, r6, lsl #1
+	add	r7, r5, r7, lsl #4
+	adds	r4, r5, r3
+	ldrb	r3, [r5, r3]	@ zero_extendqisi2
+	strb	r3, [r8]
 	ldr	r3, [r4, #36]
 	adds	r3, r3, #1
-	bne	.L1244
-	ldr	r2, .L1252+8
-	ldr	r3, .L1252+12
-	ldr	r10, [r4, #24]
+	bne	.L1307
+	ldr	r3, .L1321+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L1308
+	ldr	r3, .L1321+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L1309
+.L1308:
+	ldr	r3, .L1321+12
+	ldr	r3, [r3]
+	ldr	r3, [r3, #156]
+	cmp	r3, r10
+	beq	.L1310
+.L1309:
+	ldr	r2, .L1321+16
+	movs	r3, #48
+	mla	r3, r3, r6, r5
+	ldr	fp, .L1321+44
+	ldrh	r1, [r2]
+	ldr	r2, .L1321+20
+	ldr	r3, [r3, #24]
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	ldrh	r3, [r3]
-	ldr	r8, .L1252+28
+	str	r3, [sp, #4]
 	rsb	r2, r2, #24
-	subs	r0, r2, r3
+	subs	r0, r2, r1
 	movs	r2, #1
 	lsls	r2, r2, r0
-	lsr	r0, r10, r3
-	ldr	r3, .L1252+16
+	lsr	r0, r3, r1
+	ldr	r1, .L1321+24
 	subs	r2, r2, #1
 	ands	r0, r0, r2
-	ldrb	r1, [r3]	@ zero_extendqisi2
+	ldrb	r1, [r1]	@ zero_extendqisi2
 	bl	__aeabi_uidiv
-	ldr	r2, [r8]
+	ldr	r2, [fp]
 	movw	r1, #65535
 	uxth	r4, r0
-	ldr	r0, .L1252+20
+	ldr	r0, .L1321+28
 	ldr	r3, [r2, #560]
 	cmp	r3, r1
-	mov	r3, #48
-	mla	r5, r3, r5, r7
-	itt	eq
+	ldr	r3, [sp, #4]
+	it	eq
 	streq	r4, [r2, #560]
-	streq	r10, [r2, #564]
-	mov	r3, r10
 	mov	r1, r4
+	it	eq
+	streq	r3, [r2, #564]
+	movs	r2, #48
+	mla	r5, r2, r6, r5
 	ldr	r2, [r5, #20]
 	bl	printf
-	ldr	r3, [r8]
+	ldr	r3, [fp]
 	ldr	r2, [r3, #556]
 	adds	r2, r2, #1
 	str	r2, [r3, #556]
 	ldrh	r2, [r3, #16]
 	cmp	r2, r4
-	bne	.L1246
+	bne	.L1312
 	movs	r2, #0
 	strh	r2, [r3, #22]	@ movhi
-.L1247:
-	mov	r0, r6
-	mov	r8, #1
+.L1310:
+	mov	r0, r7
+	mov	fp, #1
 	bl	ftl_write_buf
-	b	.L1243
-.L1246:
+	b	.L1306
+.L1312:
 	ldrh	r2, [r3, #48]
 	cmp	r2, r4
 	itt	eq
 	moveq	r2, #0
 	strheq	r2, [r3, #54]	@ movhi
-	b	.L1247
-.L1244:
-	cmp	r8, #0
-	beq	.L1249
+	b	.L1310
+.L1307:
+	cmp	fp, #0
+	beq	.L1315
 	ldr	r2, [r4, #24]
 	ldr	r1, [r4, #20]
-	ldr	r0, .L1252+24
+	ldr	r0, .L1321+32
 	bl	printf
-	mov	r0, r6
+	mov	r0, r7
 	bl	ftl_write_buf
-	b	.L1243
-.L1249:
+	b	.L1306
+.L1315:
 	ldrh	r2, [r4, #32]
 	ldr	r1, [r4, #28]
 	ldr	r0, [r4, #20]
 	bl	lpa_hash_update_ppa
 	ldrb	r3, [r4, #2]	@ zero_extendqisi2
 	lsls	r2, r3, #29
-	bpl	.L1250
+	bpl	.L1316
 	bic	r3, r3, #2
 	strb	r3, [r4, #2]
-	b	.L1243
-.L1250:
-	mov	r0, r6
+	b	.L1306
+.L1316:
+	mov	r0, r7
 	bl	zbuf_free
-	b	.L1243
-.L1253:
+	b	.L1306
+.L1322:
 	.align	2
-.L1252:
-	.word	.LANCHOR52
-	.word	.LANCHOR126
-	.word	.LANCHOR31
-	.word	.LANCHOR68
-	.word	.LANCHOR69
-	.word	.LC72
-	.word	.LC73
+.L1321:
+	.word	.LANCHOR56
+	.word	.LANCHOR124
+	.word	.LANCHOR81
+	.word	.LANCHOR110
+	.word	.LANCHOR75
+	.word	.LANCHOR32
+	.word	.LANCHOR76
+	.word	.LC77
+	.word	.LC78
+	.word	.LANCHOR65
+	.word	1145785929
 	.word	.LANCHOR10
 	.size	ftl_write_completed, .-ftl_write_completed
 	.section	.text.zftl_add_read_buf,"ax",%progbits
@@ -7934,40 +8421,40 @@ zftl_add_read_buf:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
 	mov	r4, r0
-	cbnz	r0, .L1255
-	mov	r2, #972
-	ldr	r1, .L1259
-	ldr	r0, .L1259+4
+	cbnz	r0, .L1324
+	movw	r2, #1143
+	ldr	r1, .L1328
+	ldr	r0, .L1328+4
 	bl	printf
 	pop	{r4, lr}
 	b	print_ftl_debug_info
-.L1255:
-	ldr	r3, .L1259+8
+.L1324:
+	ldr	r3, .L1328+8
 	ldrb	r2, [r0, #40]	@ zero_extendqisi2
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r2, r3
-	bls	.L1257
-	movw	r2, #977
-	ldr	r1, .L1259
-	ldr	r0, .L1259+4
+	bls	.L1326
+	movw	r2, #1150
+	ldr	r1, .L1328
+	ldr	r0, .L1328+4
 	bl	printf
-.L1257:
+.L1326:
 	mov	r1, r4
-	ldr	r0, .L1259+12
+	ldr	r0, .L1328+12
 	bl	buf_add_tail
-	ldr	r2, .L1259+16
+	ldr	r2, .L1328+16
 	ldrb	r3, [r2]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	strb	r3, [r2]
 	pop	{r4, pc}
-.L1260:
+.L1329:
 	.align	2
-.L1259:
-	.word	.LANCHOR127
+.L1328:
+	.word	.LANCHOR132
 	.word	.LC0
-	.word	.LANCHOR125
-	.word	.LANCHOR128
-	.word	.LANCHOR129
+	.word	.LANCHOR131
+	.word	.LANCHOR133
+	.word	.LANCHOR134
 	.size	zftl_add_read_buf, .-zftl_add_read_buf
 	.section	.text.ftl_alloc_sblk,"ax",%progbits
 	.align	1
@@ -7981,67 +8468,75 @@ ftl_alloc_sblk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
-	uxth	r6, r0
+	uxth	r5, r0
 	cmp	r0, #5
-	mov	r5, r0
-	mov	r1, r6
+	mov	r7, r0
+	mov	r1, r5
 	mov	r0, #0
 	ite	ne
-	movne	r7, #0
-	moveq	r7, #2
+	movne	r6, #0
+	moveq	r6, #2
 	bl	zftl_get_free_sblk
 	movw	r3, #65535
 	mov	r4, r0
 	cmp	r0, r3
-	beq	.L1263
-	ldr	r3, .L1270
-	ldr	r6, [r3]
-	add	r6, r6, r0, lsl #2
-	ldrb	r3, [r6, #2]	@ zero_extendqisi2
+	beq	.L1332
+	ldr	r3, .L1339
+	ldr	r5, [r3]
+	add	r5, r5, r0, lsl #2
+	ldrb	r3, [r5, #2]	@ zero_extendqisi2
 	tst	r3, #224
-	beq	.L1264
-	mov	r2, #836
-	ldr	r1, .L1270+4
-	ldr	r0, .L1270+8
+	beq	.L1333
+	movw	r2, #939
+	ldr	r1, .L1339+4
+	ldr	r0, .L1339+8
 	bl	printf
-.L1264:
-	ldrb	r3, [r6, #2]	@ zero_extendqisi2
-	bfi	r3, r5, #5, #3
+.L1333:
+	ldrb	r3, [r5, #2]	@ zero_extendqisi2
+	bfi	r3, r7, #5, #3
 	uxtb	r3, r3
 	ubfx	r2, r3, #3, #2
-	orrs	r7, r7, r2
-	bfi	r3, r7, #3, #2
-	strb	r3, [r6, #2]
-.L1265:
+	orrs	r2, r2, r6
+	bfi	r3, r2, #3, #2
+	strb	r3, [r5, #2]
+	uxtb	r3, r3
+	and	r2, r3, #24
+	cmp	r2, #24
+	bne	.L1334
+	cbnz	r6, .L1334
+	movs	r2, #1
+	bfi	r3, r2, #3, #2
+	strb	r3, [r5, #2]
+.L1334:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1263:
+.L1332:
 	bl	print_ftl_debug_info
-	mov	r2, r5
+	mov	r2, r7
 	mov	r1, r4
-	ldr	r0, .L1270+12
+	ldr	r0, .L1339+12
 	bl	printf
-	mov	r1, r6
+	mov	r1, r5
 	movs	r0, #0
 	bl	zftl_get_free_sblk
-	mov	r2, r5
+	mov	r2, r7
 	mov	r1, r0
 	mov	r4, r0
-	ldr	r0, .L1270+12
+	ldr	r0, .L1339+12
 	bl	printf
 	bl	dump_all_list_info
-	movw	r2, #846
-	ldr	r1, .L1270+4
-	ldr	r0, .L1270+8
+	movw	r2, #955
+	ldr	r1, .L1339+4
+	ldr	r0, .L1339+8
 	bl	printf
-	b	.L1265
-.L1271:
+	b	.L1334
+.L1340:
 	.align	2
-.L1270:
+.L1339:
 	.word	.LANCHOR7
-	.word	.LANCHOR130
+	.word	.LANCHOR135
 	.word	.LC0
-	.word	.LC74
+	.word	.LC79
 	.size	ftl_alloc_sblk, .-ftl_alloc_sblk
 	.section	.text.sblk_init,"ax",%progbits
 	.align	1
@@ -8055,24 +8550,24 @@ sblk_init:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L1273
+	ldr	r2, .L1342
 	movs	r3, #255
 	movs	r0, #0
 	strb	r3, [r2]
-	ldr	r2, .L1273+4
+	ldr	r2, .L1342+4
 	strb	r3, [r2]
-	ldr	r2, .L1273+8
+	ldr	r2, .L1342+8
 	strb	r3, [r2]
-	ldr	r2, .L1273+12
+	ldr	r2, .L1342+12
 	strb	r3, [r2]
 	bx	lr
-.L1274:
+.L1343:
 	.align	2
-.L1273:
-	.word	.LANCHOR56
-	.word	.LANCHOR126
-	.word	.LANCHOR131
-	.word	.LANCHOR71
+.L1342:
+	.word	.LANCHOR60
+	.word	.LANCHOR65
+	.word	.LANCHOR63
+	.word	.LANCHOR64
 	.size	sblk_init, .-sblk_init
 	.section	.text.dump_sblk_queue,"ax",%progbits
 	.align	1
@@ -8086,18 +8581,18 @@ dump_sblk_queue:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
-	ldr	r4, .L1284
-	ldr	r0, .L1284+4
+	ldr	r4, .L1353
+	ldr	r0, .L1353+4
 	ldrb	r1, [r4]	@ zero_extendqisi2
 	bl	printf
 	ldrb	r4, [r4]	@ zero_extendqisi2
 	cmp	r4, #255
-	beq	.L1275
-	ldr	r5, .L1284+8
+	beq	.L1344
+	ldr	r5, .L1353+8
 	add	r4, r4, r4, lsl #1
-	ldr	r6, .L1284+12
+	ldr	r6, .L1353+12
 	add	r4, r5, r4, lsl #4
-.L1277:
+.L1346:
 	ldr	r3, [r4, #24]
 	mov	r0, r6
 	ldrb	r2, [r4, #42]	@ zero_extendqisi2
@@ -8105,19 +8600,19 @@ dump_sblk_queue:
 	bl	printf
 	ldrb	r4, [r4]	@ zero_extendqisi2
 	cmp	r4, #255
-	beq	.L1275
+	beq	.L1344
 	add	r4, r4, r4, lsl #1
 	add	r4, r5, r4, lsl #4
-	b	.L1277
-.L1275:
+	b	.L1346
+.L1344:
 	pop	{r4, r5, r6, pc}
-.L1285:
+.L1354:
 	.align	2
-.L1284:
+.L1353:
+	.word	.LANCHOR60
+	.word	.LC80
 	.word	.LANCHOR56
-	.word	.LC75
-	.word	.LANCHOR52
-	.word	.LC76
+	.word	.LC81
 	.size	dump_sblk_queue, .-dump_sblk_queue
 	.section	.text.queue_lun_state,"ax",%progbits
 	.align	1
@@ -8130,14 +8625,14 @@ dump_sblk_queue:
 queue_lun_state:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1305
+	ldr	r3, .L1374
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	ldrb	r6, [r3]	@ zero_extendqisi2
 	cmp	r6, #255
-	beq	.L1294
-	ldr	r3, .L1305+4
+	beq	.L1363
+	ldr	r3, .L1374+4
 	movs	r2, #1
-	ldr	r10, .L1305+16
+	ldr	r10, .L1374+16
 	mov	r8, #48
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	rsb	ip, r3, #24
@@ -8147,11 +8642,11 @@ queue_lun_state:
 	uxth	r3, r3
 	ands	r4, r4, r3
 	str	r4, [sp]
-	ldr	r4, .L1305+8
+	ldr	r4, .L1374+8
 	ldrh	lr, [r4]
 	sub	r4, ip, lr
 	lsls	r2, r2, r4
-	ldr	r4, .L1305+12
+	ldr	r4, .L1374+12
 	subs	r2, r2, #1
 	ldrb	r7, [r4]	@ zero_extendqisi2
 	asr	r4, r0, lr
@@ -8161,7 +8656,7 @@ queue_lun_state:
 	ands	r4, r4, r7
 	and	r0, r4, r2
 	str	r0, [sp, #4]
-.L1293:
+.L1362:
 	mla	fp, r8, r6, r10
 	ldr	r5, [fp, #24]
 	lsr	r0, r5, ip
@@ -8169,57 +8664,57 @@ queue_lun_state:
 	mov	r4, r0
 	ldr	r0, [sp]
 	cmp	r0, r4
-	bne	.L1288
+	bne	.L1357
 	lsr	r5, r5, lr
 	ldr	r4, [sp, #4]
 	ldrb	r0, [fp, #42]	@ zero_extendqisi2
 	ands	r5, r5, r7
 	ands	r5, r5, r2
 	cmp	r4, r5
-	bne	.L1289
+	bne	.L1358
 	cmp	r1, #1
-	bne	.L1286
-.L1291:
+	bne	.L1355
+.L1360:
 	cmp	r0, #7
-	beq	.L1288
+	beq	.L1357
 	cmp	r0, #9
-.L1302:
-	bne	.L1286
-.L1288:
+.L1371:
+	bne	.L1355
+.L1357:
 	mul	r6, r8, r6
-	ldr	r0, .L1305+16
+	ldr	r0, .L1374+16
 	ldrb	r6, [r0, r6]	@ zero_extendqisi2
 	cmp	r6, #255
-	bne	.L1293
-.L1294:
+	bne	.L1362
+.L1363:
 	movs	r0, #0
-.L1286:
+.L1355:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1289:
+.L1358:
 	cmp	r1, #3
-	bhi	.L1288
-	adr	r5, .L1290
+	bhi	.L1357
+	adr	r5, .L1359
 	ldr	pc, [r5, r1, lsl #2]
 	.p2align 2
-.L1290:
-	.word	.L1286+1
-	.word	.L1291+1
-	.word	.L1292+1
-	.word	.L1286+1
+.L1359:
+	.word	.L1355+1
+	.word	.L1360+1
+	.word	.L1361+1
+	.word	.L1355+1
 	.p2align 1
-.L1292:
+.L1361:
 	cmp	r0, #11
-	b	.L1302
-.L1306:
+	b	.L1371
+.L1375:
 	.align	2
-.L1305:
+.L1374:
+	.word	.LANCHOR60
+	.word	.LANCHOR32
+	.word	.LANCHOR75
+	.word	.LANCHOR76
 	.word	.LANCHOR56
-	.word	.LANCHOR31
-	.word	.LANCHOR68
-	.word	.LANCHOR69
-	.word	.LANCHOR52
 	.size	queue_lun_state, .-queue_lun_state
 	.section	.text.queue_remove_completed_req,"ax",%progbits
 	.align	1
@@ -8234,93 +8729,93 @@ queue_remove_completed_req:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	ip, #0
-	ldr	r5, .L1332
+	ldr	r5, .L1401
 	movs	r4, #48
 	mov	fp, #255
-	ldr	r6, .L1332+4
+	ldr	r6, .L1401+4
 	ldrb	r3, [r5]	@ zero_extendqisi2
-	ldr	r1, .L1332+8
-	ldr	r7, .L1332+12
+	ldr	r1, .L1401+8
+	ldr	r7, .L1401+12
 	str	r3, [sp, #4]
 	ldrb	r3, [r6]	@ zero_extendqisi2
 	ldrb	r2, [r1]	@ zero_extendqisi2
 	ldrb	r10, [r7]	@ zero_extendqisi2
 	str	r3, [sp]
-	ldr	r3, .L1332+16
-.L1308:
+	ldr	r3, .L1401+16
+.L1377:
 	cmp	r2, #255
-	beq	.L1309
+	beq	.L1378
 	mul	r8, r4, r2
 	mov	r0, r2
 	add	lr, r3, r8
 	ldrb	lr, [lr, #42]	@ zero_extendqisi2
 	sub	lr, lr, #12
 	cmp	lr, #1
-	bls	.L1310
-.L1309:
+	bls	.L1379
+.L1378:
 	cmp	ip, #0
-	beq	.L1307
+	beq	.L1376
 	strb	r2, [r1]
-	b	.L1307
-.L1310:
+	b	.L1376
+.L1379:
 	mul	lr, r4, r0
 	ldrb	r2, [r3, r8]	@ zero_extendqisi2
 	add	ip, r3, lr
 	strb	fp, [r3, lr]
 	ldrb	lr, [ip, #43]	@ zero_extendqisi2
 	cmp	lr, #1
-	bne	.L1313
+	bne	.L1382
 	ldrh	ip, [ip, #34]
 	cmp	ip, #0
-	bne	.L1321
+	bne	.L1390
 	mov	ip, r10
 	mov	lr, r7
-.L1314:
+.L1383:
 	cmp	ip, #255
-	bne	.L1319
+	bne	.L1388
 	strb	r2, [r1]
 	movs	r2, #48
 	mla	r3, r2, r0, r3
 	ldrb	r3, [r3, #1]	@ zero_extendqisi2
 	strb	r3, [lr]
-.L1307:
+.L1376:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1313:
+.L1382:
 	cmp	lr, #0
-	bne	.L1315
+	bne	.L1384
 	ldr	ip, [ip, #20]
 	cmp	ip, #-1
-	beq	.L1315
+	beq	.L1384
 	ldr	ip, [sp, #4]
 	mov	lr, r5
-	b	.L1314
-.L1321:
+	b	.L1383
+.L1390:
 	ldr	ip, [sp]
 	mov	lr, r6
-	b	.L1314
-.L1319:
+	b	.L1383
+.L1388:
 	mov	lr, ip
 	mul	ip, r4, ip
 	ldrb	ip, [r3, ip]	@ zero_extendqisi2
 	cmp	ip, #255
-	bne	.L1319
+	bne	.L1388
 	mla	r0, r4, r0, r3
 	mul	lr, r4, lr
 	ldrb	r0, [r0, #1]	@ zero_extendqisi2
 	strb	r0, [r3, lr]
-.L1315:
+.L1384:
 	mov	ip, #1
-	b	.L1308
-.L1333:
+	b	.L1377
+.L1402:
 	.align	2
-.L1332:
-	.word	.LANCHOR131
-	.word	.LANCHOR71
+.L1401:
+	.word	.LANCHOR63
+	.word	.LANCHOR64
+	.word	.LANCHOR60
+	.word	.LANCHOR65
 	.word	.LANCHOR56
-	.word	.LANCHOR126
-	.word	.LANCHOR52
 	.size	queue_remove_completed_req, .-queue_remove_completed_req
 	.section	.text.pm_alloc_new_blk,"ax",%progbits
 	.align	1
@@ -8333,9 +8828,9 @@ queue_remove_completed_req:
 pm_alloc_new_blk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r4, r5, r6, r7, lr}
-	ldr	r5, .L1350
-	ldr	r1, .L1350+4
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	ldr	r5, .L1421
+	ldr	r1, .L1421+4
 	ldr	r2, [r5]
 	ldrb	r1, [r1]	@ zero_extendqisi2
 	ldrh	r3, [r2, #690]
@@ -8343,27 +8838,31 @@ pm_alloc_new_blk:
 	uxth	r3, r3
 	cmp	r1, r3
 	strh	r3, [r2, #690]	@ movhi
-	bls	.L1335
+	bls	.L1404
 	add	r3, r3, #336
 	ldrh	r2, [r2, r3, lsl #1]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1336
-.L1335:
-	ldr	r7, .L1350+8
-	ldr	r4, .L1350+12
-.L1348:
+	bne	.L1405
+.L1404:
+	ldr	r7, .L1421+8
+	ldr	r4, .L1421+12
+.L1419:
+	movw	r8, #65535
+.L1406:
 	movs	r0, #1
 	bl	ftl_alloc_sblk
-	movs	r1, #0
+	cmp	r0, r8
 	mov	r6, r0
+	beq	.L1406
+	movs	r1, #0
 	bl	ftl_erase_sblk
 	ldr	r1, [r5]
 	mov	r0, r6
 	add	r1, r1, #672
 	bl	ftl_get_blk_list_in_sblk
 	uxth	r0, r0
-	cbnz	r0, .L1337
+	cbnz	r0, .L1407
 	mov	r1, r6
 	mov	r0, r7
 	bl	printf
@@ -8372,37 +8871,37 @@ pm_alloc_new_blk:
 	ldrb	r3, [r6, #2]	@ zero_extendqisi2
 	orr	r3, r3, #224
 	strb	r3, [r6, #2]
-	b	.L1348
-.L1337:
+	b	.L1419
+.L1407:
 	ldr	r3, [r5]
 	movs	r1, #1
-	ldr	r2, .L1350+16
+	ldr	r2, .L1421+16
 	movs	r4, #0
 	strh	r4, [r3, #690]	@ movhi
 	add	r3, r3, #416
 	str	r1, [r2]
 	movw	r1, #65535
-.L1339:
+.L1409:
 	ldrh	r0, [r3], #2
 	uxth	r2, r4
 	cmp	r0, r1
-	beq	.L1338
+	beq	.L1408
 	adds	r4, r4, #1
 	cmp	r4, #128
-	bne	.L1339
-	movs	r2, #227
-	ldr	r1, .L1350+20
-	ldr	r0, .L1350+24
+	bne	.L1409
+	mov	r2, #264
+	ldr	r1, .L1421+20
+	ldr	r0, .L1421+24
 	bl	printf
 	mov	r2, r4
-.L1338:
+.L1408:
 	ldr	r3, [r5]
 	adds	r2, r2, #208
 	strh	r6, [r3, r2, lsl #1]	@ movhi
 	ldrh	r2, [r3, #688]
 	adds	r2, r2, #1
 	strh	r2, [r3, #688]	@ movhi
-.L1336:
+.L1405:
 	ldr	r2, [r5]
 	ldrh	r3, [r2, #690]
 	add	r3, r3, #336
@@ -8411,56 +8910,56 @@ pm_alloc_new_blk:
 	subs	r3, r4, #1
 	uxth	r3, r3
 	cmp	r3, r2
-	bls	.L1341
-	movs	r2, #232
-	ldr	r1, .L1350+20
-	ldr	r0, .L1350+24
+	bls	.L1411
+	mov	r2, #270
+	ldr	r1, .L1421+20
+	ldr	r0, .L1421+24
 	bl	printf
-.L1341:
+.L1411:
 	ldr	r1, [r5]
 	movs	r3, #0
 	strh	r3, [r1, #696]	@ movhi
-	ldr	r3, .L1350+28
+	ldr	r3, .L1421+28
 	strh	r4, [r1, #692]	@ movhi
 	ldrb	r2, [r3]	@ zero_extendqisi2
-	ldr	r3, .L1350+32
+	ldr	r3, .L1421+32
 	rsb	r2, r2, #24
 	ldrh	r3, [r3]
 	subs	r2, r2, r3
 	asr	r3, r4, r2
 	strh	r3, [r1, #694]	@ movhi
-	ldr	r1, .L1350+36
+	ldr	r1, .L1421+36
 	ldr	r1, [r1]
 	lsls	r1, r1, #19
-	bpl	.L1345
+	bpl	.L1415
 	movs	r1, #1
 	uxth	r3, r3
 	lsl	r2, r1, r2
-	ldr	r0, .L1350+40
+	ldr	r0, .L1421+40
 	str	r3, [sp]
 	mov	r1, r4
 	mov	r3, r4
 	subs	r2, r2, #1
 	bl	printf
-.L1345:
+.L1415:
 	movs	r0, #0
-	add	sp, sp, #12
+	add	sp, sp, #8
 	@ sp needed
-	pop	{r4, r5, r6, r7, pc}
-.L1351:
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1422:
 	.align	2
-.L1350:
-	.word	.LANCHOR104
+.L1421:
+	.word	.LANCHOR110
 	.word	.LANCHOR80
-	.word	.LC77
+	.word	.LC82
 	.word	.LANCHOR7
-	.word	.LANCHOR132
-	.word	.LANCHOR133
+	.word	.LANCHOR136
+	.word	.LANCHOR137
 	.word	.LC0
-	.word	.LANCHOR31
-	.word	.LANCHOR68
-	.word	.LANCHOR14
-	.word	.LC78
+	.word	.LANCHOR32
+	.word	.LANCHOR75
+	.word	.LANCHOR14
+	.word	.LC83
 	.size	pm_alloc_new_blk, .-pm_alloc_new_blk
 	.section	.text.pm_select_ram_region,"ax",%progbits
 	.align	1
@@ -8473,72 +8972,72 @@ pm_alloc_new_blk:
 pm_select_ram_region:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L1362
+	ldr	r2, .L1433
 	movw	r0, #65535
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r3, #0
 	mov	r1, r2
-.L1354:
+.L1425:
 	ldrh	r5, [r2, r3, lsl #3]
 	uxth	r4, r3
 	cmp	r5, r0
-	beq	.L1353
+	beq	.L1424
 	adds	r3, r3, #1
 	cmp	r3, #32
-	bne	.L1354
+	bne	.L1425
 	movs	r2, #0
 	mov	r4, r3
 	mov	r0, #32768
-.L1356:
+.L1427:
 	add	r3, r1, r2, lsl #3
 	uxth	r5, r2
 	ldrh	r3, [r3, #2]
 	lsls	r6, r3, #16
-	bmi	.L1355
+	bmi	.L1426
 	cmp	r3, r0
 	itt	cc
 	movcc	r0, r3
 	movcc	r4, r5
-.L1355:
+.L1426:
 	adds	r2, r2, #1
 	cmp	r2, #32
-	bne	.L1356
+	bne	.L1427
 	cmp	r4, #32
-	bne	.L1353
-	ldr	r3, .L1362+4
+	bne	.L1424
+	ldr	r3, .L1433+4
 	mov	r2, #-1
 	ldrb	r5, [r3]	@ zero_extendqisi2
 	movs	r3, #0
-.L1358:
+.L1429:
 	add	r0, r1, r3, lsl #3
 	uxth	r6, r3
 	ldrh	r0, [r0, #2]
 	cmp	r0, r2
-	bcs	.L1357
+	bcs	.L1428
 	ldrh	r7, [r1, r3, lsl #3]
 	cmp	r7, r5
 	itt	ne
 	movne	r2, r0
 	movne	r4, r6
-.L1357:
+.L1428:
 	adds	r3, r3, #1
 	cmp	r3, #32
-	bne	.L1358
+	bne	.L1429
 	cmp	r4, #32
-	bne	.L1353
-	movw	r2, #331
-	ldr	r1, .L1362+8
-	ldr	r0, .L1362+12
+	bne	.L1424
+	movw	r2, #377
+	ldr	r1, .L1433+8
+	ldr	r0, .L1433+12
 	bl	printf
-.L1353:
+.L1424:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1363:
+.L1434:
 	.align	2
-.L1362:
-	.word	.LANCHOR134
-	.word	.LANCHOR135
-	.word	.LANCHOR136
+.L1433:
+	.word	.LANCHOR138
+	.word	.LANCHOR139
+	.word	.LANCHOR140
 	.word	.LC0
 	.size	pm_select_ram_region, .-pm_select_ram_region
 	.section	.text.idb_init,"ax",%progbits
@@ -8553,20 +9052,23 @@ idb_init:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L1365
+	ldr	r3, .L1436
 	movs	r0, #0
 	str	r0, [r3]
-	ldr	r3, .L1365+4
+	ldr	r3, .L1436+4
 	str	r0, [r3]
-	ldr	r3, .L1365+8
+	ldr	r3, .L1436+8
+	strb	r0, [r3]
+	ldr	r3, .L1436+12
 	str	r0, [r3]
 	bx	lr
-.L1366:
+.L1437:
 	.align	2
-.L1365:
-	.word	.LANCHOR137
-	.word	.LANCHOR138
-	.word	.LANCHOR139
+.L1436:
+	.word	.LANCHOR141
+	.word	.LANCHOR142
+	.word	.LANCHOR143
+	.word	.LANCHOR144
 	.size	idb_init, .-idb_init
 	.section	.text.ftl_memset,"ax",%progbits
 	.align	1
@@ -8593,104 +9095,116 @@ ftl_memset:
 flash_lsb_page_tbl_build:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, lr}
-	ldr	r4, .L1406
-	cbnz	r0, .L1369
-.L1370:
-	strh	r0, [r4, r0, lsl #1]	@ movhi
-	adds	r0, r0, #1
-	cmp	r0, #256
-	bne	.L1370
-.L1376:
+	push	{r3, r4, r5, lr}
+	mov	r5, r0
+	ldr	r3, .L1492
+	mov	r0, #1024
+	ldr	r3, [r3]
+	ldrb	r1, [r3, #12]	@ zero_extendqisi2
+	bl	__aeabi_idiv
+	uxth	r4, r0
+	cbnz	r5, .L1440
+	ldr	r3, .L1492+4
+.L1441:
+	strh	r5, [r3, r5, lsl #1]	@ movhi
+	adds	r5, r5, #1
+	cmp	r5, #512
+	bne	.L1441
+.L1447:
 	movs	r1, #255
-	mov	r2, #1024
-	ldr	r0, .L1406+4
+	mov	r2, #2048
+	ldr	r0, .L1492+8
 	bl	ftl_memset
-	ldr	r1, .L1406+4
+	ldr	r0, .L1492+4
 	movs	r3, #0
-.L1371:
-	ldrh	r2, [r4, r3, lsl #1]
+	ldr	r1, .L1492+8
+.L1442:
+	ldrh	r2, [r0, r3, lsl #1]
 	adds	r3, r3, #1
-	cmp	r3, #256
 	strh	r2, [r1, r2, lsl #1]	@ movhi
-	bne	.L1371
-	pop	{r4, pc}
-.L1369:
-	cmp	r0, #1
-	bne	.L1372
+	uxth	r2, r3
+	cmp	r2, r4
+	bcc	.L1442
+	pop	{r3, r4, r5, pc}
+.L1440:
+	cmp	r5, #1
+	bne	.L1443
+	ldr	r1, .L1492+4
 	movs	r3, #0
-.L1375:
+.L1446:
 	cmp	r3, #3
 	uxth	r2, r3
-	bls	.L1373
+	bls	.L1444
 	tst	r2, #1
 	ite	ne
-	movne	r1, #3
-	moveq	r1, #2
-	rsb	r2, r1, r2, lsl #1
+	movne	r0, #3
+	moveq	r0, #2
+	rsb	r2, r0, r2, lsl #1
 	uxth	r2, r2
-.L1373:
-	strh	r2, [r4, r3, lsl #1]	@ movhi
+.L1444:
+	strh	r2, [r1, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
-	cmp	r3, #256
-	bne	.L1375
-	b	.L1376
-.L1372:
-	cmp	r0, #2
-	bne	.L1377
+	cmp	r3, #512
+	bne	.L1446
+	b	.L1447
+.L1443:
+	cmp	r5, #2
+	bne	.L1448
+	ldr	r1, .L1492+4
 	movs	r2, #0
-.L1379:
+.L1450:
 	uxth	r3, r2
 	cmp	r2, #1
 	ittt	hi
 	lslhi	r3, r3, #1
 	addhi	r3, r3, #-1
 	uxthhi	r3, r3
-	strh	r3, [r4, r2, lsl #1]	@ movhi
+	strh	r3, [r1, r2, lsl #1]	@ movhi
 	adds	r2, r2, #1
-	cmp	r2, #256
-	bne	.L1379
-	b	.L1376
-.L1377:
-	cmp	r0, #3
-	bne	.L1380
+	cmp	r2, #512
+	bne	.L1450
+	b	.L1447
+.L1448:
+	cmp	r5, #3
+	bne	.L1451
+	ldr	r1, .L1492+4
 	movs	r3, #0
-.L1383:
+.L1454:
 	cmp	r3, #5
 	uxth	r2, r3
-	bls	.L1381
+	bls	.L1452
 	tst	r2, #1
 	ite	ne
-	movne	r1, #5
-	moveq	r1, #4
-	rsb	r2, r1, r2, lsl #1
+	movne	r0, #5
+	moveq	r0, #4
+	rsb	r2, r0, r2, lsl #1
 	uxth	r2, r2
-.L1381:
-	strh	r2, [r4, r3, lsl #1]	@ movhi
+.L1452:
+	strh	r2, [r1, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
-	cmp	r3, #256
-	bne	.L1383
-	b	.L1376
-.L1380:
-	cmp	r0, #4
+	cmp	r3, #512
+	bne	.L1454
+	b	.L1447
+.L1451:
+	cmp	r5, #4
 	mov	r3, #0
-	bne	.L1384
-	strh	r3, [r4]	@ movhi
+	bne	.L1455
+	ldr	r2, .L1492+4
+	strh	r3, [r2]	@ movhi
 	movs	r3, #1
-	strh	r3, [r4, #2]	@ movhi
+	strh	r3, [r2, #2]	@ movhi
 	movs	r3, #2
-	strh	r3, [r4, #4]	@ movhi
+	strh	r3, [r2, #4]	@ movhi
 	movs	r3, #3
-	strh	r3, [r4, #6]	@ movhi
+	strh	r3, [r2, #6]	@ movhi
 	movs	r3, #5
-	strh	r3, [r4, #10]	@ movhi
+	strh	r3, [r2, #10]	@ movhi
 	movs	r3, #7
-	strh	r3, [r4, #12]	@ movhi
-	mov	r2, r4
+	strh	r3, [r2, #12]	@ movhi
 	movs	r3, #8
-	strh	r0, [r4, #8]	@ movhi
+	strh	r5, [r2, #8]	@ movhi
 	strh	r3, [r2, #14]!	@ movhi
-.L1386:
+.L1457:
 	tst	r3, #1
 	ite	ne
 	movne	r1, #7
@@ -8699,58 +9213,118 @@ flash_lsb_page_tbl_build:
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r1, [r2, #2]!	@ movhi
-	cmp	r3, #256
-	bne	.L1386
-	b	.L1376
-.L1384:
-	cmp	r0, #5
-	bne	.L1387
-.L1388:
-	strh	r3, [r4, r3, lsl #1]	@ movhi
+	cmp	r3, #512
+	bne	.L1457
+	b	.L1447
+.L1455:
+	cmp	r5, #5
+	bne	.L1458
+	ldr	r2, .L1492+4
+.L1459:
+	strh	r3, [r2, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	cmp	r3, #16
-	bne	.L1388
-	ldr	r2, .L1406+8
-.L1389:
+	bne	.L1459
+	ldr	r2, .L1492+12
+.L1460:
 	strh	r3, [r2, #2]!	@ movhi
 	adds	r3, r3, #2
 	uxth	r3, r3
-	cmp	r3, #496
-	bne	.L1389
-	b	.L1376
-.L1387:
-	cmp	r0, #8
-	bne	.L1390
-.L1391:
-	strh	r3, [r4, r3]	@ movhi
+	cmp	r3, #1008
+	bne	.L1460
+	b	.L1447
+.L1458:
+	cmp	r5, #8
+	bne	.L1461
+	ldr	r2, .L1492+4
+.L1462:
+	strh	r3, [r3, r2]	@ movhi
 	adds	r3, r3, #2
-	cmp	r3, #512
-	bne	.L1391
-	b	.L1376
-.L1390:
-	cmp	r0, #9
-	bne	.L1376
-	strh	r3, [r4]	@ movhi
+	cmp	r3, #1024
+	bne	.L1462
+	b	.L1447
+.L1461:
+	cmp	r5, #9
+	bne	.L1463
+	ldr	r2, .L1492+4
+	movw	r1, #1021
+	strh	r3, [r2]	@ movhi
 	movs	r3, #1
-	strh	r3, [r4, #2]	@ movhi
-	mov	r2, r4
-	movs	r3, #2
-	movw	r1, #509
-	strh	r3, [r2, #4]!	@ movhi
-	movs	r3, #3
-.L1392:
+	strh	r3, [r2, #2]	@ movhi
+	mov	r3, r2
+	movs	r2, #2
+	strh	r2, [r3, #4]!	@ movhi
+	movs	r2, #3
+.L1464:
+	strh	r2, [r3, #2]!	@ movhi
+	adds	r2, r2, #2
+	uxth	r2, r2
+	cmp	r2, r1
+	bne	.L1464
+	b	.L1447
+.L1463:
+	cmp	r5, #10
+	bne	.L1465
+	ldr	r2, .L1492+4
+.L1466:
+	strh	r3, [r2, r3, lsl #1]	@ movhi
+	adds	r3, r3, #1
+	cmp	r3, #63
+	bne	.L1466
+	ldr	r2, .L1492+16
+	movw	r1, #961
+.L1467:
 	strh	r3, [r2, #2]!	@ movhi
 	adds	r3, r3, #2
 	uxth	r3, r3
 	cmp	r3, r1
-	bne	.L1392
-	b	.L1376
-.L1407:
+	bne	.L1467
+	b	.L1447
+.L1465:
+	cmp	r5, #11
+	bne	.L1468
+	ldr	r2, .L1492+4
+	movs	r3, #0
+.L1469:
+	strh	r3, [r2, r3, lsl #1]	@ movhi
+	adds	r3, r3, #1
+	cmp	r3, #8
+	bne	.L1469
+	ldr	r1, .L1492+20
+.L1471:
+	tst	r3, #1
+	ite	ne
+	movne	r2, #7
+	moveq	r2, #6
+	rsb	r2, r2, r3, lsl #1
+	adds	r3, r3, #1
+	uxth	r3, r3
+	strh	r2, [r1, #2]!	@ movhi
+	cmp	r3, #512
+	bne	.L1471
+	b	.L1447
+.L1468:
+	cmp	r5, #13
+	bne	.L1447
+	ldr	r2, .L1492+24
+	movs	r3, #0
+.L1472:
+	strh	r3, [r2, #2]!	@ movhi
+	adds	r3, r3, #3
+	uxth	r3, r3
+	cmp	r3, #1536
+	bne	.L1472
+	b	.L1447
+.L1493:
 	.align	2
-.L1406:
+.L1492:
+	.word	.LANCHOR16
 	.word	.LANCHOR3
-	.word	.LANCHOR140
+	.word	.LANCHOR145
 	.word	.LANCHOR3+30
+	.word	.LANCHOR3+124
+	.word	.LANCHOR3+14
+	.word	.LANCHOR3-2
 	.size	flash_lsb_page_tbl_build, .-flash_lsb_page_tbl_build
 	.section	.text.flash_die_info_init,"ax",%progbits
 	.align	1
@@ -8763,74 +9337,74 @@ flash_lsb_page_tbl_build:
 flash_die_info_init:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1425
+	ldr	r3, .L1511
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	ldr	r3, [r3]
 	lsls	r3, r3, #19
-	bpl	.L1409
-	ldr	r1, .L1425+4
-	ldr	r0, .L1425+8
+	bpl	.L1495
+	ldr	r1, .L1511+4
+	ldr	r0, .L1511+8
 	bl	printf
-.L1409:
-	ldr	r4, .L1425+12
+.L1495:
+	ldr	r4, .L1511+12
 	movs	r6, #0
-	ldr	r5, .L1425+16
-	ldr	r7, .L1425+20
+	ldr	r5, .L1511+16
+	ldr	r7, .L1511+20
 	ldrh	r3, [r4, #26]
 	ldrb	r1, [r4, #12]	@ zero_extendqisi2
 	ldrh	r0, [r4, #10]
 	strh	r3, [r7]	@ movhi
 	strb	r6, [r5]
 	bl	__aeabi_idiv
-	ldr	r10, .L1425+48
+	ldr	r10, .L1511+48
 	movs	r2, #8
-	ldr	r3, .L1425+24
+	ldr	r3, .L1511+24
 	mov	r1, r6
 	mov	r8, r10
 	strh	r0, [r3]	@ movhi
-	ldr	r0, .L1425+28
+	ldr	r0, .L1511+28
 	bl	ftl_memset
 	movs	r2, #32
 	mov	r1, r6
-	ldr	r0, .L1425+32
+	ldr	r0, .L1511+32
 	bl	ftl_memset
-.L1411:
-	ldr	r3, .L1425+36
+.L1497:
+	ldr	r3, .L1511+36
 	movs	r2, #2
 	add	r1, r10, r6, lsl #3
-	ldr	r0, .L1425+40
+	ldr	r0, .L1511+40
 	strb	r2, [r6, r3]
 	ldrb	r2, [r4]	@ zero_extendqisi2
 	bl	flash_mem_cmp8
-	cbnz	r0, .L1410
+	cbnz	r0, .L1496
 	ldrb	r3, [r5]	@ zero_extendqisi2
-	ldr	r2, .L1425+32
+	ldr	r2, .L1511+32
 	str	r0, [r2, r3, lsl #2]
 	adds	r2, r3, #1
 	strb	r2, [r5]
 	uxtb	r0, r6
-	ldr	r2, .L1425+28
+	ldr	r2, .L1511+28
 	strb	r0, [r2, r3]
 	bl	zftl_flash_enter_slc_mode
-.L1410:
+.L1496:
 	adds	r6, r6, #1
 	cmp	r6, #4
-	bne	.L1411
+	bne	.L1497
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #2
-	beq	.L1412
-.L1416:
+	beq	.L1498
+.L1502:
 	ldrb	r2, [r4, #13]	@ zero_extendqisi2
 	ldrb	r3, [r5]	@ zero_extendqisi2
 	smulbb	r3, r3, r2
 	ldrh	r2, [r4, #14]
 	smulbb	r3, r3, r2
-	ldr	r2, .L1425+44
+	ldr	r2, .L1511+44
 	strh	r3, [r2]	@ movhi
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1412:
+.L1498:
 	ldrh	r6, [r7]
 	movs	r7, #0
 	ldrb	r3, [r4, #13]	@ zero_extendqisi2
@@ -8842,18 +9416,18 @@ flash_die_info_init:
 	muls	r6, r3, r6
 	lsls	r3, r6, #1
 	str	r3, [sp]
-	ldr	r3, .L1425+28
-.L1415:
+	ldr	r3, .L1511+28
+.L1501:
 	mov	r2, r10
 	add	r1, r8, r7, lsl #3
-	ldr	r0, .L1425+40
+	ldr	r0, .L1511+40
 	str	r3, [sp, #4]
 	bl	flash_mem_cmp8
 	ldr	r3, [sp, #4]
-	cbnz	r0, .L1413
+	cbnz	r0, .L1499
 	ldr	r1, [sp]
 	ldrb	r2, [r5]	@ zero_extendqisi2
-	ldr	r0, .L1425+32
+	ldr	r0, .L1511+32
 	cmp	fp, #0
 	it	eq
 	moveq	r1, r6
@@ -8861,27 +9435,27 @@ flash_die_info_init:
 	str	r1, [r0, r2, lsl #2]
 	adds	r1, r2, #1
 	strb	r1, [r5]
-.L1413:
+.L1499:
 	adds	r7, r7, #1
 	cmp	r7, #4
-	bne	.L1415
-	b	.L1416
-.L1426:
+	bne	.L1501
+	b	.L1502
+.L1512:
 	.align	2
-.L1425:
+.L1511:
 	.word	.LANCHOR14
-	.word	.LANCHOR141
+	.word	.LANCHOR146
 	.word	.LC1
-	.word	.LANCHOR32
+	.word	.LANCHOR33
 	.word	.LANCHOR18
 	.word	.LANCHOR2
-	.word	.LANCHOR142
+	.word	.LANCHOR147
 	.word	.LANCHOR30
-	.word	.LANCHOR143
-	.word	.LANCHOR33
-	.word	.LANCHOR32+1
-	.word	.LANCHOR144
-	.word	.LANCHOR44
+	.word	.LANCHOR148
+	.word	.LANCHOR34
+	.word	.LANCHOR33+1
+	.word	.LANCHOR149
+	.word	.LANCHOR48
 	.size	flash_die_info_init, .-flash_die_info_init
 	.section	.text.lpa_hash_init,"ax",%progbits
 	.align	1
@@ -8897,26 +9471,26 @@ lpa_hash_init:
 	push	{r3, lr}
 	mov	r2, #512
 	movs	r1, #255
-	ldr	r0, .L1428
+	ldr	r0, .L1514
 	bl	ftl_memset
-	ldr	r3, .L1428+4
+	ldr	r3, .L1514+4
 	movs	r1, #255
-	ldr	r2, .L1428+8
+	ldr	r2, .L1514+8
 	ldrh	r3, [r3]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	muls	r2, r3, r2
-	ldr	r3, .L1428+12
+	ldr	r3, .L1514+12
 	ldr	r0, [r3]
 	lsls	r2, r2, #2
 	pop	{r3, lr}
 	b	ftl_memset
-.L1429:
+.L1515:
 	.align	2
-.L1428:
-	.word	.LANCHOR110
-	.word	.LANCHOR87
+.L1514:
+	.word	.LANCHOR116
+	.word	.LANCHOR95
 	.word	.LANCHOR80
-	.word	.LANCHOR112
+	.word	.LANCHOR118
 	.size	lpa_hash_init, .-lpa_hash_init
 	.section	.text.lpa_rebuild_hash,"ax",%progbits
 	.align	1
@@ -8930,45 +9504,45 @@ lpa_rebuild_hash:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
-	ldr	r3, .L1441
+	ldr	r3, .L1527
 	ldr	r3, [r3]
 	lsls	r3, r3, #19
-	bpl	.L1431
+	bpl	.L1517
 	movs	r3, #0
-	movs	r2, #225
-	ldr	r1, .L1441+4
-	ldr	r0, .L1441+8
+	movs	r2, #239
+	ldr	r1, .L1527+4
+	ldr	r0, .L1527+8
 	bl	printf
-.L1431:
-	ldr	r6, .L1441+12
+.L1517:
+	ldr	r6, .L1527+12
 	mov	r2, #512
-	ldr	r4, .L1441+16
+	ldr	r4, .L1527+16
 	movs	r1, #255
-	ldr	r0, .L1441+20
+	ldr	r0, .L1527+20
 	bl	ftl_memset
 	ldrh	r3, [r4]
 	movs	r1, #255
 	ldrb	r2, [r6]	@ zero_extendqisi2
-	ldr	r5, .L1441+24
+	ldr	r5, .L1527+24
 	muls	r2, r3, r2
 	ldr	r0, [r5]
 	lsls	r2, r2, #2
 	bl	ftl_memset
-	ldr	r3, .L1441+28
+	ldr	r3, .L1527+28
 	movs	r2, #0
 	ldrb	r6, [r6]	@ zero_extendqisi2
 	ldr	ip, [r5]
 	ldr	r7, [r3]
-	ldr	r0, .L1441+20
-.L1432:
+	ldr	r0, .L1527+20
+.L1518:
 	ldrh	r3, [r4]
 	uxth	r5, r2
 	mov	r1, r5
 	muls	r3, r6, r3
 	cmp	r5, r3, lsl #1
-	blt	.L1434
+	blt	.L1520
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1434:
+.L1520:
 	ldr	r3, [r7, r1, lsl #2]
 	adds	r2, r2, #1
 	cmp	r3, #-1
@@ -8977,18 +9551,18 @@ lpa_rebuild_hash:
 	ldrhne	lr, [r0, r3, lsl #1]
 	strhne	r5, [r0, r3, lsl #1]	@ movhi
 	strhne	lr, [ip, r1, lsl #1]	@ movhi
-	b	.L1432
-.L1442:
+	b	.L1518
+.L1528:
 	.align	2
-.L1441:
+.L1527:
 	.word	.LANCHOR14
-	.word	.LANCHOR145
-	.word	.LC79
+	.word	.LANCHOR150
+	.word	.LC84
 	.word	.LANCHOR80
-	.word	.LANCHOR87
-	.word	.LANCHOR110
-	.word	.LANCHOR112
-	.word	.LANCHOR111
+	.word	.LANCHOR95
+	.word	.LANCHOR116
+	.word	.LANCHOR118
+	.word	.LANCHOR117
 	.size	lpa_rebuild_hash, .-lpa_rebuild_hash
 	.section	.text.zftl_read_flash_info,"ax",%progbits
 	.align	1
@@ -9006,9 +9580,9 @@ zftl_read_flash_info:
 	movs	r1, #0
 	mov	r4, r0
 	bl	ftl_memset
-	ldr	r1, .L1446
+	ldr	r1, .L1532
 	movs	r2, #0
-	ldr	r3, .L1446+4
+	ldr	r3, .L1532+4
 	strb	r2, [r4, #10]
 	ldrb	r0, [r1, #9]	@ zero_extendqisi2
 	ldrh	r3, [r3]
@@ -9017,10 +9591,10 @@ zftl_read_flash_info:
 	strb	r3, [r4, #4]
 	lsrs	r3, r3, #8
 	strb	r3, [r4, #5]
-	ldr	r3, .L1446+8
+	ldr	r3, .L1532+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	strb	r3, [r4, #7]
-	ldr	r3, .L1446+12
+	ldr	r3, .L1532+12
 	ldrb	r5, [r3]	@ zero_extendqisi2
 	strb	r5, [r4]
 	ldrb	r5, [r3, #1]	@ zero_extendqisi2
@@ -9034,31 +9608,31 @@ zftl_read_flash_info:
 	movs	r3, #32
 	strb	r3, [r4, #8]
 	ldrb	r3, [r1, #7]	@ zero_extendqisi2
-	ldr	r0, .L1446+16
+	ldr	r0, .L1532+16
 	strb	r3, [r4, #9]
-	ldr	r3, .L1446+20
+	ldr	r3, .L1532+20
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	mov	r3, r2
-.L1444:
+.L1530:
 	uxtb	r2, r3
 	cmp	r1, r2
-	bhi	.L1445
+	bhi	.L1531
 	pop	{r4, r5, r6, pc}
-.L1445:
+.L1531:
 	ldrb	r2, [r3, r0]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	ldrb	r6, [r4, #10]	@ zero_extendqisi2
 	lsl	r2, r5, r2
 	orrs	r2, r2, r6
 	strb	r2, [r4, #10]
-	b	.L1444
-.L1447:
+	b	.L1530
+.L1533:
 	.align	2
-.L1446:
-	.word	.LANCHOR32
+.L1532:
+	.word	.LANCHOR33
 	.word	.LANCHOR2
-	.word	.LANCHOR46
-	.word	.LANCHOR61
+	.word	.LANCHOR50
+	.word	.LANCHOR68
 	.word	.LANCHOR30
 	.word	.LANCHOR18
 	.size	zftl_read_flash_info, .-zftl_read_flash_info
@@ -9071,326 +9645,363 @@ zftl_read_flash_info:
 	.fpu softvfp
 	.type	gc_static_wearleveling, %function
 gc_static_wearleveling:
-	@ args = 0, pretend = 0, frame = 24
+	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r0, .L1565
+	ldr	r0, .L1653
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #40
+	sub	sp, sp, #48
 	ldr	r3, [r0]
 	ldr	r3, [r3, #32]
 	cmp	r3, #10240
-	bls	.L1449
+	bls	.L1535
 	bl	ftl_tmp_into_update
-.L1449:
-	ldr	r3, .L1565+4
+.L1535:
+	ldr	r3, .L1653+4
 	ldr	r3, [r3]
 	ldr	r2, [r3, #568]
 	ldr	r1, [r3, #12]
+	add	r4, r2, #35840
+	adds	r4, r4, #160
+	cmp	r1, r4
+	bcs	.L1536
+	ldr	r5, [r0]
+	ldr	r4, [r3, #572]
+	ldr	r5, [r5, #36]
+	add	r4, r4, #256
+	cmp	r5, r4
+	bcc	.L1590
+.L1536:
 	add	r2, r2, #860160
 	add	r2, r2, #3840
 	cmp	r1, r2
-	bhi	.L1450
+	bhi	.L1538
 	ldr	r4, [r0]
 	ldr	r2, [r3, #572]
 	ldr	r4, [r4, #36]
 	adds	r2, r2, #32
 	cmp	r4, r2
-	bls	.L1502
-.L1450:
+	bls	.L1591
+.L1538:
 	ldr	r2, [r0]
-	movs	r5, #0
 	movw	r4, #65535
-	mov	r8, r5
+	ldr	r10, .L1653+12
 	mov	fp, r4
-	str	r5, [sp, #20]
-	ldrh	r6, [r2, #134]
+	movs	r5, #0
+	ldrh	r7, [r2, #134]
 	ldr	r0, [r2, #36]
-	str	r5, [sp, #32]
+	str	r5, [sp, #24]
 	str	r1, [r3, #568]
 	str	r0, [r3, #572]
+	str	r5, [sp, #40]
+	str	r5, [sp, #44]
 	str	r5, [sp, #36]
+	str	r5, [sp, #32]
+	str	r5, [sp, #20]
 	str	r5, [sp, #28]
-	str	r5, [sp, #24]
-	str	r5, [sp, #16]
-.L1452:
-	ldr	r3, .L1565+8
+.L1540:
+	ldr	r3, .L1653+8
 	ldrh	r3, [r3]
-	cmp	r3, r6
-	bhi	.L1463
-	ldr	r6, .L1565+4
+	cmp	r3, r7
+	bhi	.L1551
+	ldr	r7, .L1653+4
 	movs	r3, #0
-	movs	r2, #128
 	movs	r1, #255
-	ldr	r0, [r6]
+	movs	r2, #128
+	ldr	r0, [r7]
 	strh	r3, [r0, #122]	@ movhi
 	add	r0, r0, #264
 	bl	ftl_memset
-	ldr	r3, [r6]
-	ldrh	r1, [r3, #586]
-	ldr	r3, .L1565+12
-	ldr	r2, [r3]
-	ldr	r3, .L1565+16
+	ldr	r3, [r7]
+	ldrh	r7, [r3, #586]
+	ldr	r3, .L1653+12
+	ldr	r8, [r3]
+	ldr	r3, .L1653+16
 	ldr	r3, [r3]
-	add	r6, r2, r1, lsl #2
-	lsls	r0, r3, #21
-	bpl	.L1464
-	ldr	r0, .L1565+20
-	ldr	r3, [r2, r1, lsl #2]
-	ldrh	r2, [r2, r1, lsl #2]
-	ldr	r0, [r0]
+	add	r10, r8, r7, lsl #2
+	lsls	r1, r3, #21
+	bpl	.L1552
+	ldr	r1, .L1653+20
+	ldr	r3, [r8, r7, lsl #2]
+	ldrh	r2, [r8, r7, lsl #2]
+	ldr	r1, [r1]
 	ubfx	r3, r3, #11, #8
+	ldr	r0, .L1653+24
 	ubfx	r2, r2, #0, #11
-	ldrh	r0, [r0, r1, lsl #1]
-	str	r0, [sp, #12]
-	ldrb	r0, [r6, #3]	@ zero_extendqisi2
-	str	r0, [sp, #8]
-	ldrb	r0, [r6, #2]	@ zero_extendqisi2
-	lsrs	r0, r0, #5
-	str	r0, [sp, #4]
-	ldrb	r0, [r6, #2]	@ zero_extendqisi2
-	ubfx	r0, r0, #3, #2
-	str	r0, [sp]
-	ldr	r0, .L1565+24
+	ldrh	r1, [r1, r7, lsl #1]
+	str	r1, [sp, #12]
+	ldrb	r1, [r10, #3]	@ zero_extendqisi2
+	str	r1, [sp, #8]
+	ldrb	r1, [r10, #2]	@ zero_extendqisi2
+	lsrs	r1, r1, #5
+	str	r1, [sp, #4]
+	ldrb	r1, [r10, #2]	@ zero_extendqisi2
+	ubfx	r1, r1, #3, #2
+	str	r1, [sp]
+	mov	r1, r7
 	bl	printf
-.L1464:
-	ldrb	r3, [r6, #2]	@ zero_extendqisi2
-	and	r2, r3, #224
-	cmp	r2, #32
-	bne	.L1465
-	ldr	r1, .L1565
-	ldr	r1, [r1]
-	ldrh	r1, [r1, #688]
-	cmp	r1, #2
+.L1552:
+	ldrb	r3, [r10, #2]	@ zero_extendqisi2
+	and	r1, r3, #224
+	cmp	r1, #32
+	bne	.L1553
+	ldr	r2, .L1653
+	ldr	r2, [r2]
+	ldrh	r2, [r2, #688]
+	cmp	r2, #2
 	ittt	hi
-	ldrhi	r1, .L1565+28
+	ldrhi	r2, .L1653+28
 	movhi	r0, #1
-	strhi	r0, [r1]
-.L1465:
-	lsls	r1, r3, #28
-	bpl	.L1466
+	strhi	r0, [r2]
+.L1553:
+	lsls	r2, r3, #28
+	bpl	.L1554
+	ldr	r2, .L1653
+	ldr	r2, [r2]
+	ldrh	r0, [r2, #96]
+	ldr	r2, .L1653+32
+	ldrh	ip, [r2]
+	ldrh	r2, [r8, r7, lsl #2]
+	ubfx	r2, r2, #0, #11
+	add	r2, r2, ip, lsr #2
+	cmp	r0, r2
+	ble	.L1554
 	and	r3, r3, #192
-	ldr	r6, .L1565+4
+	ldr	r7, .L1653+4
 	cmp	r3, #64
-	bne	.L1467
-	ldr	r3, [r6]
+	bne	.L1555
+	ldr	r3, [r7]
 	movs	r2, #1
 	movs	r1, #0
 	ldrh	r0, [r3, #586]
 	bl	gc_add_sblk
-	ldr	r3, .L1565+32
+	ldr	r3, .L1653+36
 	movs	r2, #1
-	strh	r2, [r3, #570]	@ movhi
-.L1466:
-	ldr	r3, .L1565+4
+	strh	r2, [r3, #2106]	@ movhi
+.L1554:
+	ldr	r3, .L1653+4
 	ldr	r3, [r3]
-	ldrh	r1, [r3, #584]
-	ldr	r3, .L1565+12
-	ldr	r2, [r3]
-	ldr	r3, .L1565+16
+	ldrh	r7, [r3, #584]
+	ldr	r3, .L1653+12
+	ldr	r8, [r3]
+	ldr	r3, .L1653+16
 	ldr	r3, [r3]
-	add	r6, r2, r1, lsl #2
-	lsls	r7, r3, #21
-	bpl	.L1468
-	ldr	r0, .L1565+20
-	ldr	r3, [r2, r1, lsl #2]
-	ldrh	r2, [r2, r1, lsl #2]
-	ldr	r0, [r0]
+	add	r10, r8, r7, lsl #2
+	lsls	r6, r3, #21
+	bpl	.L1556
+	ldr	r1, .L1653+20
+	ldr	r3, [r8, r7, lsl #2]
+	ldrh	r2, [r8, r7, lsl #2]
+	ldr	r1, [r1]
 	ubfx	r3, r3, #11, #8
+	ldr	r0, .L1653+40
 	ubfx	r2, r2, #0, #11
-	ldrh	r0, [r0, r1, lsl #1]
-	str	r0, [sp, #12]
-	ldrb	r0, [r6, #3]	@ zero_extendqisi2
-	str	r0, [sp, #8]
-	ldrb	r0, [r6, #2]	@ zero_extendqisi2
-	lsrs	r0, r0, #5
-	str	r0, [sp, #4]
-	ldrb	r0, [r6, #2]	@ zero_extendqisi2
-	ubfx	r0, r0, #3, #2
-	str	r0, [sp]
-	ldr	r0, .L1565+36
+	ldrh	r1, [r1, r7, lsl #1]
+	str	r1, [sp, #12]
+	ldrb	r1, [r10, #3]	@ zero_extendqisi2
+	str	r1, [sp, #8]
+	ldrb	r1, [r10, #2]	@ zero_extendqisi2
+	lsrs	r1, r1, #5
+	str	r1, [sp, #4]
+	ldrb	r1, [r10, #2]	@ zero_extendqisi2
+	ubfx	r1, r1, #3, #2
+	str	r1, [sp]
+	mov	r1, r7
 	bl	printf
-.L1468:
-	ldrb	r3, [r6, #2]	@ zero_extendqisi2
+.L1556:
+	ldrb	r3, [r10, #2]	@ zero_extendqisi2
 	lsls	r0, r3, #28
-	bpl	.L1469
+	bpl	.L1557
+	ldr	r2, .L1653
+	ldr	r2, [r2]
+	ldrh	r1, [r2, #98]
+	ldr	r2, .L1653+44
+	ldrh	r0, [r2]
+	ldr	r2, [r8, r7, lsl #2]
+	ubfx	r2, r2, #11, #8
+	add	r2, r2, r0, lsr #2
+	cmp	r1, r2
+	ble	.L1557
 	and	r2, r3, #192
 	cmp	r2, #64
-	bne	.L1470
-	ldr	r3, .L1565+4
+	bne	.L1558
+	ldr	r3, .L1653+4
 	movs	r2, #1
 	movs	r1, #0
 	ldr	r3, [r3]
 	ldrh	r0, [r3, #584]
 	bl	gc_add_sblk
-	ldr	r3, .L1565+32
+	ldr	r3, .L1653+36
 	movs	r2, #1
-	strh	r2, [r3, #570]	@ movhi
-.L1469:
-	ldr	r3, .L1565+16
+	strh	r2, [r3, #2106]	@ movhi
+.L1557:
+	ldr	r3, .L1653+16
 	ldr	r3, [r3]
 	lsls	r1, r3, #21
-	bpl	.L1471
-	ldr	r3, .L1565+12
-	ldr	r0, .L1565+20
+	bpl	.L1559
+	ldr	r3, .L1653+12
+	ldr	r1, .L1653+20
 	ldr	r2, [r3]
-	ldr	r0, [r0]
+	ldr	r1, [r1]
 	ldr	r3, [r2, r5, lsl #2]
-	ldrh	r0, [r0, r5, lsl #1]
-	add	r1, r2, r5, lsl #2
+	ldrh	r1, [r1, r5, lsl #1]
+	add	r0, r2, r5, lsl #2
 	ldrh	r2, [r2, r5, lsl #2]
 	ubfx	r3, r3, #11, #8
-	str	r0, [sp, #12]
-	ldrb	r0, [r1, #3]	@ zero_extendqisi2
+	str	r1, [sp, #12]
+	ldrb	r1, [r0, #3]	@ zero_extendqisi2
 	ubfx	r2, r2, #0, #11
-	str	r0, [sp, #8]
-	ldrb	r0, [r1, #2]	@ zero_extendqisi2
-	lsrs	r0, r0, #5
-	str	r0, [sp, #4]
-	ldrb	r1, [r1, #2]	@ zero_extendqisi2
-	ldr	r0, .L1565+40
+	str	r1, [sp, #8]
+	ldrb	r1, [r0, #2]	@ zero_extendqisi2
+	lsrs	r1, r1, #5
+	str	r1, [sp, #4]
+	ldrb	r1, [r0, #2]	@ zero_extendqisi2
+	ldr	r0, .L1653+48
 	ubfx	r1, r1, #3, #2
 	str	r1, [sp]
 	mov	r1, r5
 	bl	printf
-.L1471:
-	ldr	r3, .L1565+16
+.L1559:
+	ldr	r3, .L1653+16
 	ldr	r3, [r3]
 	lsls	r2, r3, #21
-	bpl	.L1472
-	ldr	r3, .L1565+12
-	ldr	r0, [sp, #20]
-	ldr	r5, [sp, #20]
+	bpl	.L1560
+	ldr	r3, .L1653+12
+	ldr	r1, [sp, #24]
+	ldr	r5, [sp, #24]
 	ldr	r2, [r3]
-	ldr	r3, [sp, #20]
-	add	r1, r2, r3, lsl #2
+	ldr	r3, [sp, #24]
+	add	r0, r2, r3, lsl #2
 	ldr	r3, [r2, r3, lsl #2]
-	ldrh	r2, [r2, r0, lsl #2]
-	ldr	r0, .L1565+20
+	ldrh	r2, [r2, r1, lsl #2]
+	ldr	r1, .L1653+20
 	ubfx	r3, r3, #11, #8
 	ubfx	r2, r2, #0, #11
-	ldr	r0, [r0]
-	ldrh	r0, [r0, r5, lsl #1]
-	str	r0, [sp, #12]
-	ldrb	r0, [r1, #3]	@ zero_extendqisi2
-	str	r0, [sp, #8]
-	ldrb	r0, [r1, #2]	@ zero_extendqisi2
-	lsrs	r0, r0, #5
-	str	r0, [sp, #4]
-	ldrb	r1, [r1, #2]	@ zero_extendqisi2
-	ldr	r0, .L1565+44
+	ldr	r1, [r1]
+	ldrh	r1, [r1, r5, lsl #1]
+	str	r1, [sp, #12]
+	ldrb	r1, [r0, #3]	@ zero_extendqisi2
+	str	r1, [sp, #8]
+	ldrb	r1, [r0, #2]	@ zero_extendqisi2
+	lsrs	r1, r1, #5
+	str	r1, [sp, #4]
+	ldrb	r1, [r0, #2]	@ zero_extendqisi2
+	ldr	r0, .L1653+52
 	ubfx	r1, r1, #3, #2
 	str	r1, [sp]
 	mov	r1, r5
 	bl	printf
-.L1472:
-	ldr	r6, .L1565
-	ldrh	r3, [sp, #16]
-	ldr	r1, [sp, #24]
+.L1560:
+	ldr	r6, .L1653
+	ldrh	r3, [sp, #20]
+	ldr	r1, [sp, #32]
 	ldr	r5, [r6]
-	ldr	r0, [sp, #32]
+	ldr	r0, [sp, #40]
 	strh	r3, [r5, #96]	@ movhi
-	strh	r8, [r5, #98]	@ movhi
+	ldrh	r3, [sp, #28]
 	strh	r4, [r5, #92]	@ movhi
 	strh	fp, [r5, #94]	@ movhi
+	strh	r3, [r5, #98]	@ movhi
 	bl	__aeabi_uidiv
-	ldr	r1, [sp, #28]
+	ldr	r1, [sp, #36]
 	mov	r7, r0
 	strh	r0, [r5, #88]	@ movhi
-	ldr	r0, [sp, #36]
+	ldr	r0, [sp, #44]
 	bl	__aeabi_uidiv
 	strh	r0, [r5, #90]	@ movhi
-	ldr	r5, .L1565+16
+	ldr	r5, .L1653+16
 	ldr	r3, [r5]
 	lsls	r3, r3, #21
-	bpl	.L1473
+	bpl	.L1561
 	uxth	r0, r0
 	uxth	r3, r7
-	ldr	r2, [sp, #28]
+	ldr	r2, [sp, #36]
 	str	r0, [sp]
-	ldr	r1, [sp, #24]
-	ldr	r0, .L1565+48
+	ldr	r1, [sp, #32]
+	ldr	r0, .L1653+56
 	bl	printf
-.L1473:
+.L1561:
 	ldr	r3, [r5]
-	ldr	r5, .L1565+52
+	ldr	r5, .L1653+44
 	tst	r3, #1024
-	beq	.L1474
+	beq	.L1562
 	ldrh	r3, [r5]
 	mov	r2, fp
 	mov	r1, r4
-	ldr	r0, .L1565+56
+	ldr	r0, .L1653+60
 	str	r3, [sp, #8]
-	ldr	r3, .L1565+60
+	b	.L1654
+.L1655:
+	.align	2
+.L1653:
+	.word	.LANCHOR110
+	.word	.LANCHOR10
+	.word	.LANCHOR6
+	.word	.LANCHOR7
+	.word	.LANCHOR14
+	.word	.LANCHOR9
+	.word	.LC86
+	.word	.LANCHOR151
+	.word	.LANCHOR152
+	.word	.LANCHOR71
+	.word	.LC87
+	.word	.LANCHOR153
+	.word	.LC88
+	.word	.LC89
+	.word	.LC90
+	.word	.LC91
+.L1654:
+	ldr	r3, .L1656
 	ldrh	r3, [r3]
-	str	r8, [sp]
 	str	r3, [sp, #4]
-	ldr	r3, [sp, #16]
+	ldr	r3, [sp, #28]
+	str	r3, [sp]
+	ldr	r3, [sp, #20]
 	bl	printf
-.L1474:
-	sub	r3, r8, fp
-	str	r3, [sp, #20]
-	ldr	r2, [sp, #20]
+.L1562:
+	ldr	r3, [sp, #28]
+	sub	r3, r3, fp
+	str	r3, [sp, #24]
+	ldr	r2, [sp, #24]
 	ldrh	r3, [r5]
 	cmp	r2, r3
-	bgt	.L1475
-	ldr	r2, .L1565+60
-	ldr	r3, [sp, #16]
+	bgt	.L1563
+	ldr	r2, .L1656
+	ldr	r3, [sp, #20]
 	ldrh	r2, [r2]
 	subs	r3, r3, r4
 	cmp	r3, r2
-	ble	.L1503
-.L1475:
-	ldr	r3, .L1565+4
+	ble	.L1592
+.L1563:
+	ldr	r3, .L1656+4
 	mov	r8, #0
-	mov	r7, r8
 	ldr	r3, [r3]
 	ldrh	r5, [r3, #580]
 	ldr	r3, [r6]
+	mov	r6, r8
 	ldrh	r10, [r3, #134]
-.L1477:
-	ldr	r3, .L1565+8
+.L1565:
+	ldr	r3, .L1656+8
 	ldrh	r3, [r3]
 	cmp	r10, r3
-	bcc	.L1487
-.L1486:
-	ldr	r3, .L1565+4
+	bcc	.L1575
+.L1574:
+	ldr	r3, .L1656+4
 	ldr	r3, [r3]
 	str	r5, [r3, #580]
-	b	.L1566
-.L1567:
-	.align	2
-.L1565:
-	.word	.LANCHOR104
-	.word	.LANCHOR10
-	.word	.LANCHOR6
-	.word	.LANCHOR7
-	.word	.LANCHOR14
-	.word	.LANCHOR9
-	.word	.LC81
-	.word	.LANCHOR146
-	.word	.LANCHOR64
-	.word	.LC82
-	.word	.LC83
-	.word	.LC84
-	.word	.LC85
-	.word	.LANCHOR147
-	.word	.LC86
-	.word	.LANCHOR148
-.L1566:
-.L1476:
+.L1564:
 	cmp	fp, #0
-	beq	.L1489
-	ldr	r3, .L1568
+	beq	.L1577
+	ldr	r3, .L1656+12
 	ldr	r1, [r3]
-	ldr	r3, .L1568+4
+	ldr	r3, .L1656+8
 	ldrh	r2, [r1, #134]
-	ldrh	r6, [r3]
-	ldr	r3, .L1568+8
+	ldrh	r7, [r3]
+	ldr	r3, .L1656+16
 	ldr	r3, [r3]
 	add	r3, r3, r2, lsl #2
-.L1490:
-	cmp	r2, r6
-	bcc	.L1492
+.L1578:
+	cmp	r2, r7
+	bcc	.L1580
 	ldrh	r3, [r1, #72]
 	add	r3, r3, fp
 	strh	r3, [r1, #72]	@ movhi
@@ -9399,19 +10010,19 @@ gc_static_wearleveling:
 	itt	cc
 	subcc	r3, r3, fp
 	strhcc	r3, [r1, #98]	@ movhi
-.L1489:
-	cbz	r4, .L1495
-	ldr	r3, .L1568
+.L1577:
+	cbz	r4, .L1583
+	ldr	r3, .L1656+12
 	ldr	r1, [r3]
-	ldr	r3, .L1568+4
+	ldr	r3, .L1656+8
 	ldrh	r2, [r1, #134]
 	ldrh	ip, [r3]
-	ldr	r3, .L1568+8
+	ldr	r3, .L1656+16
 	ldr	r3, [r3]
 	add	r3, r3, r2, lsl #2
-.L1496:
+.L1584:
 	cmp	r2, ip
-	bcc	.L1498
+	bcc	.L1586
 	ldrh	r3, [r1, #74]
 	add	r3, r3, r4
 	strh	r3, [r1, #74]	@ movhi
@@ -9420,122 +10031,123 @@ gc_static_wearleveling:
 	itt	cc
 	subcc	r4, r3, r4
 	strhcc	r4, [r1, #96]	@ movhi
-.L1495:
+.L1583:
 	movs	r1, #5
 	movs	r0, #0
 	bl	zftl_get_gc_node
 	movw	r2, #65535
 	cmp	r0, r2
-	beq	.L1451
-	ldr	r2, .L1568+12
-	ldr	r3, .L1568+16
-	ldr	r2, [r2]
-	ldrh	r3, [r3]
-	ldrh	r2, [r2, r0, lsl #1]
-	cmp	r2, r3
-	bhi	.L1451
-	adds	r7, r7, #1
+	beq	.L1539
+	ldr	r2, .L1656+20
+	ldr	r1, [r2]
+	ldr	r2, .L1656+24
+	ldrh	r3, [r1, r0, lsl #1]
+	ldrh	r2, [r2]
+	cmp	r3, r2, lsr #1
+	bhi	.L1539
+	adds	r6, r6, #1
 	movs	r2, #1
 	movs	r1, #0
 	bl	gc_add_sblk
-.L1451:
-	add	r0, r7, r8
-	add	sp, sp, #40
+.L1539:
+	add	r0, r6, r8
+.L1534:
+	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1463:
-	ldr	r3, .L1568+8
-	lsls	r1, r6, #2
-	ldr	r0, [r3]
+.L1551:
+	ldr	r0, [r10]
+	lsls	r1, r7, #2
 	add	ip, r0, r1
 	ldrb	r3, [ip, #2]	@ zero_extendqisi2
 	and	r2, r3, #224
 	cmp	r2, #224
-	beq	.L1453
+	beq	.L1541
 	ubfx	lr, r3, #3, #2
 	tst	lr, #1
-	beq	.L1454
+	beq	.L1542
 	ldrh	r3, [r0, r1]
 	ldr	r2, [r0, r1]
 	ubfx	r3, r3, #0, #11
 	ubfx	r2, r2, #11, #8
-.L1455:
-	ldr	r7, [sp, #24]
+.L1543:
+	ldr	r6, [sp, #32]
 	cmp	r4, r3
-	add	r10, r7, #1
-	uxth	r7, r10
-	str	r7, [sp, #24]
-	ldr	r7, [sp, #32]
-	add	r7, r7, r3
-	str	r7, [sp, #32]
-	bls	.L1501
-	ldr	r4, .L1568+20
+	add	r8, r6, #1
+	uxth	r6, r8
+	str	r6, [sp, #32]
+	ldr	r6, [sp, #40]
+	add	r6, r6, r3
+	str	r6, [sp, #40]
+	bls	.L1589
+	ldr	r4, .L1656+4
 	ldr	r4, [r4]
-	strh	r6, [r4, #586]	@ movhi
+	strh	r7, [r4, #586]	@ movhi
 	mov	r4, r3
-.L1501:
-	ldr	r7, [sp, #16]
-	movw	r10, #65535
-	cmp	r7, r3
+.L1589:
+	ldr	r6, [sp, #20]
+	movw	r8, #65535
+	cmp	r6, r3
 	itt	cc
-	movcc	r5, r6
-	strcc	r3, [sp, #16]
-	cmp	r2, r10
-	bne	.L1457
-.L1459:
+	movcc	r5, r7
+	strcc	r3, [sp, #20]
+	cmp	r2, r8
+	bne	.L1545
+.L1547:
 	cmp	r3, #9
-	bls	.L1462
-.L1453:
-	adds	r6, r6, #1
-	uxth	r6, r6
-	b	.L1452
-.L1454:
+	bls	.L1550
+.L1541:
+	adds	r7, r7, #1
+	uxth	r7, r7
+	b	.L1540
+.L1542:
 	tst	r3, #24
-	bne	.L1456
+	bne	.L1544
 	ldrh	r3, [r0, r1]
 	movw	r2, #65535
 	ubfx	r3, r3, #0, #11
-	b	.L1455
-.L1456:
+	b	.L1543
+.L1544:
 	ldr	r3, [r0, r1]
 	ubfx	r2, r3, #11, #8
 	movw	r3, #65535
-.L1457:
-	ldr	r7, [sp, #28]
+.L1545:
+	ldr	r6, [sp, #36]
 	cmp	fp, r2
 	it	hi
 	movhi	fp, r2
-	add	r10, r7, #1
-	uxth	r7, r10
+	add	r8, r6, #1
+	uxth	r6, r8
 	it	hi
-	ldrhi	r10, .L1568+20
-	str	r7, [sp, #28]
+	ldrhi	r8, .L1656+4
+	str	r6, [sp, #36]
+	ldr	r6, [sp, #44]
 	it	hi
-	ldrhi	r10, [r10]
-	ldr	r7, [sp, #36]
+	ldrhi	r8, [r8]
+	add	r6, r6, r2
+	str	r6, [sp, #44]
+	ldr	r6, [sp, #28]
 	it	hi
-	strhhi	r6, [r10, #584]	@ movhi
-	cmp	r8, r2
+	strhhi	r7, [r8, #584]	@ movhi
+	cmp	r6, r2
 	itt	cc
-	strcc	r6, [sp, #20]
-	movcc	r8, r2
+	strcc	r7, [sp, #24]
+	strcc	r2, [sp, #28]
 	cmp	r2, #9
-	add	r7, r7, r2
-	str	r7, [sp, #36]
-	bhi	.L1459
-.L1462:
-	ldr	r3, .L1568+24
+	bhi	.L1547
+.L1550:
+	ldr	r3, .L1656+28
 	ldr	r3, [r3]
-	lsls	r7, r3, #23
-	bpl	.L1453
+	lsls	r6, r3, #23
+	bpl	.L1541
 	ldr	r3, [r0, r1]
 	ldrh	r2, [r0, r1]
-	ldr	r1, .L1568+12
+	ldr	r1, .L1656+20
 	ubfx	r3, r3, #11, #8
-	ldr	r0, .L1568+28
+	ldr	r0, .L1656+32
 	ubfx	r2, r2, #0, #11
 	ldr	r1, [r1]
-	ldrh	r1, [r1, r6, lsl #1]
+	ldrh	r1, [r1, r7, lsl #1]
 	str	r1, [sp, #12]
 	ldrb	r1, [ip, #3]	@ zero_extendqisi2
 	str	r1, [sp, #8]
@@ -9543,249 +10155,252 @@ gc_static_wearleveling:
 	str	lr, [sp]
 	lsrs	r1, r1, #5
 	str	r1, [sp, #4]
-	mov	r1, r6
+	mov	r1, r7
 	bl	printf
-	b	.L1453
-.L1467:
-	cmp	r2, #0
-	bne	.L1466
-	ldr	r3, [r6]
+	b	.L1541
+.L1555:
+	cmp	r1, #0
+	bne	.L1554
+	ldr	r3, [r7]
 	movw	r2, #65535
-	ldrh	r10, [r3, #590]
-	cmp	r10, r2
-	bne	.L1466
+	ldrh	r8, [r3, #590]
+	cmp	r8, r2
+	bne	.L1554
 	ldrh	r0, [r3, #586]
 	ldrh	r3, [r3, #588]
 	cmp	r3, r0
-	beq	.L1466
+	beq	.L1554
 	bl	zftl_remove_free_node
-	ldr	r3, [r6]
+	ldr	r3, [r7]
 	ldrh	r2, [r3, #586]
-	strh	r10, [r3, #586]	@ movhi
+	strh	r8, [r3, #586]	@ movhi
 	strh	r2, [r3, #590]	@ movhi
-	b	.L1466
-.L1470:
+	b	.L1554
+.L1558:
 	and	r3, r3, #248
 	cmp	r3, #16
-	bne	.L1469
-	ldr	r10, .L1568+20
+	bne	.L1557
+	ldr	r8, .L1656+4
 	movw	r2, #65535
-	ldr	r3, [r10]
-	ldrh	r6, [r3, #588]
-	cmp	r6, r2
-	bne	.L1469
+	ldr	r3, [r8]
+	ldrh	r7, [r3, #588]
+	cmp	r7, r2
+	bne	.L1557
 	ldrh	r0, [r3, #584]
 	ldrh	r3, [r3, #590]
 	cmp	r3, r0
-	beq	.L1469
+	beq	.L1557
 	bl	zftl_remove_free_node
-	ldr	r3, [r10]
+	ldr	r3, [r8]
 	ldrh	r2, [r3, #584]
-	strh	r6, [r3, #584]	@ movhi
+	strh	r7, [r3, #584]	@ movhi
 	strh	r2, [r3, #588]	@ movhi
-	b	.L1469
-.L1487:
+	b	.L1557
+.L1657:
+	.align	2
+.L1656:
+	.word	.LANCHOR152
+	.word	.LANCHOR10
+	.word	.LANCHOR6
+	.word	.LANCHOR110
+	.word	.LANCHOR7
+	.word	.LANCHOR9
+	.word	.LANCHOR95
+	.word	.LANCHOR14
+	.word	.LC85
+.L1575:
 	adds	r5, r5, #1
 	uxth	r5, r5
 	cmp	r3, r5
 	it	ls
 	movls	r5, #0
-	ldr	r3, .L1568+8
-	lsls	r6, r5, #2
+	ldr	r3, .L1658
+	lsls	r7, r5, #2
 	ldr	r3, [r3]
-	adds	r2, r3, r6
+	adds	r2, r3, r7
 	ldrb	r2, [r2, #2]	@ zero_extendqisi2
 	tst	r2, #192
-	beq	.L1479
+	beq	.L1567
 	and	r0, r2, #224
 	cmp	r0, #224
-	beq	.L1479
+	beq	.L1567
 	ubfx	r2, r2, #3, #2
 	ands	r1, r2, #1
-	beq	.L1480
+	beq	.L1568
 	cmp	r0, #160
-.L1563:
-	bne	.L1482
-	ldr	r2, .L1568+32
-	ldr	r0, [sp, #20]
+.L1651:
+	bne	.L1570
+	ldr	r2, .L1658+4
+	ldr	r0, [sp, #24]
 	ldrh	r2, [r2]
 	cmp	r0, r2
-	ble	.L1483
-	ldr	r2, [r3, r6]
+	ble	.L1571
+	ldr	r2, [r3, r7]
 	ubfx	r2, r2, #11, #8
 	cmp	r2, fp
-	bls	.L1484
-	cbz	r1, .L1483
-	ldrh	r2, [r3, r6]
+	bls	.L1572
+	cbz	r1, .L1571
+	ldrh	r2, [r3, r7]
 	ubfx	r2, r2, #0, #11
 	cmp	r2, r4
-	bgt	.L1483
-.L1484:
+	bgt	.L1571
+.L1572:
 	movs	r2, #1
 	movs	r1, #0
 	mov	r0, r5
-	str	r3, [sp, #24]
+	str	r3, [sp, #28]
 	bl	gc_add_sblk
-	ldr	r0, .L1568+36
+	ldr	r0, .L1658+8
 	movs	r2, #1
-	add	r7, r7, r2
-	ldr	r3, [sp, #24]
-	strh	r2, [r0, #570]	@ movhi
-	ldr	r2, .L1568+24
+	add	r6, r6, r2
+	ldr	r3, [sp, #28]
+	strh	r2, [r0, #2106]	@ movhi
+	ldr	r2, .L1658+12
 	ldr	r2, [r2]
 	tst	r2, #1024
-	beq	.L1483
-	ldr	r2, .L1568+12
-	ldr	r1, [r3, r6]
+	beq	.L1571
+	ldr	r2, .L1658+16
+	ldr	r1, [r3, r7]
 	ldr	r2, [r2]
 	ubfx	r1, r1, #11, #8
 	ldrh	ip, [r2, r5, lsl #1]
-	ldr	r2, .L1568+8
+	ldr	r2, .L1658
 	ldr	r2, [r2]
-	add	r2, r2, r6
+	add	r2, r2, r7
 	ldrb	r2, [r2, #2]	@ zero_extendqisi2
 	str	r1, [sp, #8]
-	ldrh	r1, [r3, r6]
+	ldrh	r1, [r3, r7]
 	lsrs	r2, r2, #5
 	ubfx	r1, r1, #0, #11
 	str	r1, [sp, #4]
 	mov	r1, r5
 	ldrh	r3, [r0, #52]
-	ldr	r0, .L1568+40
+	ldr	r0, .L1658+20
 	str	r3, [sp]
 	mov	r3, ip
-.L1564:
+.L1652:
 	bl	printf
-.L1483:
-	cmp	r7, #4
-	bhi	.L1486
+.L1571:
+	cmp	r6, #4
+	bhi	.L1574
 	cmp	r8, #4
-	bhi	.L1486
-.L1479:
+	bhi	.L1574
+.L1567:
 	add	r10, r10, #1
 	uxth	r10, r10
-	b	.L1477
-.L1480:
-	cmp	r2, #2
-	b	.L1563
-.L1569:
-	.align	2
+	b	.L1565
 .L1568:
-	.word	.LANCHOR104
-	.word	.LANCHOR6
-	.word	.LANCHOR7
-	.word	.LANCHOR9
-	.word	.LANCHOR87
-	.word	.LANCHOR10
-	.word	.LANCHOR14
-	.word	.LC80
-	.word	.LANCHOR147
-	.word	.LANCHOR64
-	.word	.LC87
-.L1482:
-	ldr	r0, .L1570
-	ldr	r2, [sp, #16]
+	cmp	r2, #2
+	b	.L1651
+.L1570:
+	ldr	r0, .L1658+24
+	ldr	r2, [sp, #20]
 	ldrh	r0, [r0]
 	subs	r2, r2, r4
 	cmp	r2, r0
-	ble	.L1483
-	ldrh	r2, [r3, r6]
+	ble	.L1571
+	ldrh	r2, [r3, r7]
 	add	r0, r4, #8
 	ubfx	r2, r2, #0, #11
 	cmp	r2, r0
-	ble	.L1485
+	ble	.L1573
 	cmp	r1, #0
-	beq	.L1483
-	ldr	r2, [r3, r6]
+	beq	.L1571
+	ldr	r2, [r3, r7]
 	add	r1, fp, #4
 	ubfx	r2, r2, #11, #8
 	cmp	r2, r1
-	bgt	.L1483
-.L1485:
+	bgt	.L1571
+.L1573:
 	movs	r2, #1
 	movs	r1, #0
 	mov	r0, r5
-	str	r3, [sp, #24]
+	str	r3, [sp, #28]
 	bl	gc_add_sblk
-	ldr	r0, .L1570+4
+	ldr	r0, .L1658+8
 	movs	r2, #1
 	add	r8, r8, r2
-	ldr	r3, [sp, #24]
-	strh	r2, [r0, #570]	@ movhi
-	ldr	r2, .L1570+8
+	ldr	r3, [sp, #28]
+	strh	r2, [r0, #2106]	@ movhi
+	ldr	r2, .L1658+12
 	ldr	r2, [r2]
 	tst	r2, #1024
-	beq	.L1483
-	ldr	r2, .L1570+12
-	ldr	r1, [r3, r6]
+	beq	.L1571
+	ldr	r2, .L1658+16
+	ldr	r1, [r3, r7]
 	ldr	r2, [r2]
 	ubfx	r1, r1, #11, #8
 	ldrh	ip, [r2, r5, lsl #1]
-	ldr	r2, .L1570+16
+	ldr	r2, .L1658
 	ldr	r2, [r2]
-	add	r2, r2, r6
+	add	r2, r2, r7
 	ldrb	r2, [r2, #2]	@ zero_extendqisi2
 	str	r1, [sp, #8]
-	ldrh	r1, [r3, r6]
+	ldrh	r1, [r3, r7]
 	lsrs	r2, r2, #5
 	ubfx	r1, r1, #0, #11
 	str	r1, [sp, #4]
 	mov	r1, r5
 	ldrh	r3, [r0, #52]
-	ldr	r0, .L1570+20
+	ldr	r0, .L1658+28
 	str	r3, [sp]
 	mov	r3, ip
-	b	.L1564
-.L1503:
+	b	.L1652
+.L1592:
 	mov	r8, #0
-	mov	r7, r8
-	b	.L1476
-.L1492:
+	mov	r6, r8
+	b	.L1564
+.L1580:
 	ldr	r0, [r3]
 	ubfx	r5, r0, #11, #8
 	cmp	fp, r5
-	bhi	.L1491
+	bhi	.L1579
 	ldrb	ip, [r3, #2]	@ zero_extendqisi2
 	tst	ip, #24
 	ittt	ne
 	subne	r5, r5, fp
 	bfine	r0, r5, #11, #8
 	strne	r0, [r3]
-.L1491:
+.L1579:
 	adds	r2, r2, #1
 	adds	r3, r3, #4
 	uxth	r2, r2
-	b	.L1490
-.L1498:
+	b	.L1578
+.L1586:
 	ldrh	r0, [r3]
 	ubfx	r5, r0, #0, #11
 	cmp	r5, r4
-	blt	.L1497
-	ldrb	r6, [r3, #2]	@ zero_extendqisi2
-	and	r6, r6, #24
-	cmp	r6, #16
+	blt	.L1585
+	ldrb	r7, [r3, #2]	@ zero_extendqisi2
+	and	r7, r7, #24
+	cmp	r7, #16
 	ittt	ne
 	subne	r5, r5, r4
 	bfine	r0, r5, #0, #11
 	strhne	r0, [r3]	@ movhi
-.L1497:
+.L1585:
 	adds	r2, r2, #1
 	adds	r3, r3, #4
 	uxth	r2, r2
-	b	.L1496
-.L1502:
+	b	.L1584
+.L1591:
 	mov	r8, #0
-	mov	r7, r8
-	b	.L1451
-.L1571:
+	mov	r6, r8
+	b	.L1539
+.L1590:
+	movs	r0, #0
+	b	.L1534
+.L1659:
 	.align	2
-.L1570:
-	.word	.LANCHOR148
-	.word	.LANCHOR64
+.L1658:
+	.word	.LANCHOR7
+	.word	.LANCHOR153
+	.word	.LANCHOR71
 	.word	.LANCHOR14
 	.word	.LANCHOR9
-	.word	.LANCHOR7
-	.word	.LC88
+	.word	.LC92
+	.word	.LANCHOR152
+	.word	.LC93
 	.size	gc_static_wearleveling, .-gc_static_wearleveling
 	.section	.text.zftl_sblk_list_init,"ax",%progbits
 	.align	1
@@ -9800,151 +10415,152 @@ zftl_sblk_list_init:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r2, #6
-	ldr	r8, .L1600+76
+	ldr	r8, .L1692+84
 	sub	sp, sp, #24
 	movs	r1, #0
 	movs	r4, #0
-	ldr	fp, .L1600+80
+	ldr	fp, .L1692+88
 	ldrh	r3, [r8]
-	ldr	r5, .L1600
+	ldr	r6, .L1692
 	ldr	r0, [fp]
-	ldr	r10, .L1600+64
+	ldr	r10, .L1692+80
 	muls	r2, r3, r2
-	ldr	r7, .L1600+4
-	ldr	r6, .L1600+8
+	ldr	r7, .L1692+4
 	bl	ftl_memset
-	ldr	r3, .L1600+12
-	movs	r2, #16
-	ldr	r1, .L1600+16
+	ldr	r3, .L1692+8
+	movs	r2, #32
+	ldr	r1, .L1692+12
 	mov	r0, #32768
 	strh	r4, [r10]	@ movhi
 	str	r4, [r3]
-	ldr	r3, .L1600+20
+	ldr	r3, .L1692+16
 	ldrh	r1, [r1]
 	strh	r4, [r7]	@ movhi
 	str	r4, [r3]
-	ldr	r3, .L1600+24
-	strh	r4, [r6]	@ movhi
+	ldr	r3, .L1692+20
 	str	r4, [r3]
-	ldr	r3, .L1600+28
+	ldr	r3, .L1692+24
 	str	r4, [r3]
-	ldr	r3, .L1600+32
+	ldr	r3, .L1692+28
 	str	r4, [r3]
-	ldr	r3, .L1600+36
+	ldr	r3, .L1692+32
 	str	r4, [r3]
-	ldr	r3, .L1600+40
+	ldr	r3, .L1692+36
 	strh	r2, [r3]	@ movhi
-	ldr	r2, .L1600+44
-	ldr	r3, .L1600+48
+	ldr	r2, .L1692+40
+	ldr	r3, .L1692+44
 	strh	r4, [r2]	@ movhi
-	ldr	r2, .L1600+52
+	ldr	r2, .L1692+48
 	strh	r4, [r3]	@ movhi
 	str	r3, [sp, #4]
 	strh	r4, [r2]	@ movhi
-	ldrb	r2, [r5]	@ zero_extendqisi2
+	ldr	r2, .L1692+52
+	strh	r4, [r2]	@ movhi
+	ldrb	r2, [r6]	@ zero_extendqisi2
 	muls	r1, r2, r1
 	bl	__aeabi_idiv
-	ldr	r2, .L1600+56
+	ldr	r2, .L1692+56
 	sxth	r3, r0
 	str	fp, [sp, #12]
 	mov	fp, r10
 	str	r3, [sp]
 	ldr	r1, [r2]
 	ldr	r3, [sp, #4]
-	ldr	r10, .L1600+84
-	strh	r4, [r1, #146]	@ movhi
-	ldrsh	r4, [r1, #134]
+	ldr	r10, .L1692+92
+	ldrsh	r5, [r1, #134]
 	str	r8, [sp, #8]
 	mov	r8, r3
+	strh	r4, [r1, #146]	@ movhi
 	str	r2, [sp, #16]
-	str	r5, [sp, #20]
-.L1573:
+	str	r6, [sp, #20]
+.L1661:
 	ldr	r3, [sp, #8]
 	ldrh	r3, [r3]
-	cmp	r4, r3
-	blt	.L1589
+	cmp	r5, r3
+	blt	.L1678
 	ldr	r3, [sp, #16]
 	ldrh	r2, [r8]
 	ldr	r3, [r3]
 	strh	r2, [r3, #114]	@ movhi
 	ldrh	r2, [r7]
 	strh	r2, [r3, #118]	@ movhi
-	ldrh	r2, [r6]
-	strh	r2, [r3, #116]	@ movhi
 	ldrh	r2, [fp]
+	strh	r2, [r3, #116]	@ movhi
+	ldr	r2, .L1692+40
+	ldrh	r2, [r2]
 	strh	r2, [r3, #122]	@ movhi
-	ldr	r2, .L1600+44
+	ldr	r2, .L1692+48
 	ldrh	r2, [r2]
 	strh	r2, [r3, #120]	@ movhi
-	ldr	r2, .L1600+52
+	ldr	r2, .L1692+52
 	ldrh	r2, [r2]
 	strh	r2, [r3, #124]	@ movhi
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1589:
-	ldr	r5, [r10]
-	add	r5, r5, r4, lsl #2
-	ldrb	r0, [r5, #3]	@ zero_extendqisi2
+.L1678:
+	ldr	r6, [r10]
+	add	r6, r6, r5, lsl #2
+	ldrb	r0, [r6, #3]	@ zero_extendqisi2
 	cmp	r0, #0
-	beq	.L1590
+	beq	.L1679
 	ldr	r3, [sp, #20]
 	ldrb	lr, [r3]	@ zero_extendqisi2
-	ldr	r3, .L1600+56
+	ldr	r3, .L1692+56
 	ldr	ip, [r3]
-	ldr	r3, .L1600+16
+	ldr	r3, .L1692+12
 	ldrh	r3, [r3]
 	str	r3, [sp, #4]
 	movs	r3, #0
 	mov	r1, r3
-.L1575:
+.L1663:
 	cmp	r3, lr
-	blt	.L1578
+	blt	.L1666
 	cmp	r1, #0
-	beq	.L1579
+	beq	.L1667
 	mov	r0, #32768
 	bl	__aeabi_idiv
 	adds	r1, r0, #1
 	sxth	r1, r1
-.L1574:
+.L1662:
 	ldr	r3, [sp, #12]
-	lsls	r0, r4, #1
-	adds	r2, r0, r4
+	lsls	r0, r5, #1
+	adds	r2, r0, r5
 	ldr	r3, [r3]
 	add	ip, r3, r2, lsl #1
 	strh	r1, [ip, #4]	@ movhi
 	movw	r1, #65535
 	strh	r1, [ip, #2]	@ movhi
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldrb	r1, [r5, #2]	@ zero_extendqisi2
-	and	r3, r1, #224
+	ldrb	r3, [r6, #2]	@ zero_extendqisi2
+	and	r3, r3, #224
 	cmp	r3, #32
-	beq	.L1580
+	beq	.L1668
 	cmp	r3, #224
-	beq	.L1580
-	ldr	r2, .L1600+60
+	beq	.L1668
+	ldr	r2, .L1692+60
 	ldr	r2, [r2]
-	ldrh	ip, [r2, #16]
-	cmp	r4, ip
-	beq	.L1580
-	ldrh	ip, [r2, #48]
-	cmp	r4, ip
-	beq	.L1580
+	ldrh	r1, [r2, #16]
+	cmp	r5, r1
+	beq	.L1668
+	ldrh	r1, [r2, #48]
+	cmp	r5, r1
+	beq	.L1668
 	ldrh	r2, [r2, #80]
-	cmp	r4, r2
-	beq	.L1580
+	cmp	r5, r2
+	beq	.L1668
 	cmp	r3, #64
-	bne	.L1581
-	ldr	r2, .L1600+64
-	uxth	r1, r4
-	ldr	r0, .L1600+32
-.L1598:
+	bne	.L1669
+	ldr	r2, .L1692+40
+	uxth	r1, r5
+	ldr	r0, .L1692+28
+.L1690:
 	bl	_insert_data_list
-.L1580:
-	adds	r4, r4, #1
-	sxth	r4, r4
-	b	.L1573
-.L1578:
+.L1668:
+	adds	r5, r5, #1
+	sxth	r5, r5
+	b	.L1661
+.L1666:
 	asr	r2, r0, r3
 	adds	r3, r3, #1
 	lsls	r2, r2, #31
@@ -9956,98 +10572,193 @@ zftl_sblk_list_init:
 	ite	mi
 	strhmi	r2, [ip, #146]	@ movhi
 	sxthpl	r1, r1
-	b	.L1575
-.L1579:
-	ldrb	r3, [r5, #2]	@ zero_extendqisi2
+	b	.L1663
+.L1667:
+	ldrb	r3, [r6, #2]	@ zero_extendqisi2
 	movw	r2, #65535
 	orr	r3, r3, #224
-	strb	r3, [r5, #2]
-	ldr	r3, .L1600+68
+	strb	r3, [r6, #2]
+	ldr	r3, .L1692+64
 	ldr	r3, [r3]
-	strh	r2, [r3, r4, lsl #1]	@ movhi
-	b	.L1574
-.L1590:
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	b	.L1662
+.L1679:
 	ldr	r1, [sp]
-	b	.L1574
-.L1581:
+	b	.L1662
+.L1669:
 	cmp	r3, #96
-	bne	.L1582
-	ldr	r2, .L1600+52
-	uxth	r1, r4
-	ldr	r0, .L1600+28
-	b	.L1598
-.L1582:
+	bne	.L1670
+	ldr	r2, .L1692+52
+	uxth	r1, r5
+	ldr	r0, .L1692+24
+	b	.L1690
+.L1670:
 	cmp	r3, #160
-	bne	.L1583
-	ldr	r2, .L1600+44
-	uxth	r1, r4
-	ldr	r0, .L1600+36
-	b	.L1598
-.L1583:
+	bne	.L1671
+	ldr	r2, .L1692+48
+	uxth	r1, r5
+	ldr	r0, .L1692+32
+	b	.L1690
+.L1671:
 	cmp	r3, #0
-	bne	.L1580
-	ldr	r3, .L1600+68
+	bne	.L1668
+	ldr	r3, .L1692+64
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r0]
-	cbz	r2, .L1584
-	mov	r1, r4
-	ldr	r0, .L1600+72
+	cbz	r2, .L1672
+	cmp	r4, #2
+	bgt	.L1673
+	mov	r1, r5
+	ldr	r0, .L1692+68
 	bl	printf
-	ldrb	r3, [r5, #2]	@ zero_extendqisi2
+	ldrb	r3, [r6, #2]	@ zero_extendqisi2
+	adds	r4, r4, #1
 	movs	r1, #1
-	uxth	r0, r4
+	uxth	r0, r5
+	sxth	r4, r4
 	lsls	r2, r3, #27
 	ite	mi
 	movmi	r2, #5
 	movpl	r2, #2
 	bfi	r3, r2, #5, #3
 	movs	r2, #0
-	strb	r3, [r5, #2]
+	strb	r3, [r6, #2]
 	bl	gc_add_sblk
-	b	.L1580
-.L1584:
-	ands	r3, r1, #24
-	uxth	r1, r4
-	bne	.L1587
-	ldr	r2, .L1600+48
-	ldr	r0, .L1600+12
-.L1599:
+	b	.L1668
+.L1673:
+	movw	r2, #651
+	ldr	r1, .L1692+72
+	ldr	r0, .L1692+76
+	bl	printf
+.L1672:
+	ldrb	r3, [r6, #2]	@ zero_extendqisi2
+	uxth	r1, r5
+	ands	r3, r3, #24
+	bne	.L1676
+	ldr	r2, .L1692+44
+	ldr	r0, .L1692+8
+.L1691:
 	bl	_insert_free_list
-	b	.L1580
-.L1587:
+	b	.L1668
+.L1676:
 	cmp	r3, #16
 	ittee	eq
-	ldreq	r2, .L1600+4
-	ldreq	r0, .L1600+20
-	ldrne	r2, .L1600+8
-	ldrne	r0, .L1600+24
-	b	.L1599
-.L1601:
-	.align	2
-.L1600:
+	ldreq	r2, .L1692+4
+	ldreq	r0, .L1692+16
+	ldrne	r2, .L1692+80
+	ldrne	r0, .L1692+20
+	b	.L1691
+.L1693:
+	.align	2
+.L1692:
 	.word	.LANCHOR80
-	.word	.LANCHOR99
-	.word	.LANCHOR101
-	.word	.LANCHOR98
-	.word	.LANCHOR79
-	.word	.LANCHOR100
-	.word	.LANCHOR102
-	.word	.LANCHOR83
+	.word	.LANCHOR105
+	.word	.LANCHOR104
+	.word	.LANCHOR86
+	.word	.LANCHOR106
+	.word	.LANCHOR108
+	.word	.LANCHOR89
 	.word	.LANCHOR12
-	.word	.LANCHOR82
-	.word	.LANCHOR103
-	.word	.LANCHOR94
+	.word	.LANCHOR88
+	.word	.LANCHOR109
 	.word	.LANCHOR97
-	.word	.LANCHOR90
-	.word	.LANCHOR104
+	.word	.LANCHOR103
+	.word	.LANCHOR93
+	.word	.LANCHOR99
+	.word	.LANCHOR110
 	.word	.LANCHOR10
-	.word	.LANCHOR92
 	.word	.LANCHOR9
-	.word	.LC89
+	.word	.LC94
+	.word	.LANCHOR154
+	.word	.LC0
+	.word	.LANCHOR107
 	.word	.LANCHOR6
 	.word	.LANCHOR4
 	.word	.LANCHOR7
 	.size	zftl_sblk_list_init, .-zftl_sblk_list_init
+	.section	.text.ftl_open_sblk_init,"ax",%progbits
+	.align	1
+	.global	ftl_open_sblk_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_open_sblk_init, %function
+ftl_open_sblk_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	mov	r4, r0
+	ldr	r8, .L1701+12
+	mov	r6, r1
+	movs	r7, #0
+.L1695:
+	movw	r10, #65535
+.L1696:
+	mov	r0, r6
+	bl	ftl_alloc_sblk
+	cmp	r0, r10
+	mov	r5, r0
+	beq	.L1696
+	movs	r1, #0
+	ldr	r10, .L1701+16
+	bl	ftl_erase_sblk
+	add	r1, r4, #16
+	mov	r0, r5
+	bl	ftl_get_blk_list_in_sblk
+	ldr	r1, .L1701
+	cmp	r6, #2
+	ldrh	r2, [r8]
+	uxtb	r0, r0
+	strh	r5, [r4]	@ movhi
+	ite	eq
+	moveq	r3, #0
+	ldrbne	r3, [r1]	@ zero_extendqisi2
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	strb	r0, [r4, #9]
+	smulbb	r0, r0, r2
+	strh	r7, [r4, #2]	@ movhi
+	it	ne
+	smulbbne	r3, r3, r2
+	strb	r7, [r4, #5]
+	mul	r2, r2, r1
+	ldr	r1, .L1701+4
+	strh	r0, [r4, #6]	@ movhi
+	it	ne
+	uxthne	r3, r3
+	strh	r7, [r4, #10]	@ movhi
+	ldr	r0, [r1]
+	movs	r1, #255
+	strh	r3, [r4, #12]	@ movhi
+	lsls	r2, r2, #2
+	strb	r6, [r4, #4]
+	add	r0, r0, r3, lsl #2
+	bl	ftl_memset
+	ldr	r3, [r10]
+	ldrh	r2, [r4, #6]
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	cbnz	r3, .L1694
+	mov	r1, r5
+	ldr	r0, .L1701+8
+	bl	printf
+	ldr	r3, [r10]
+	movw	r2, #65535
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	movs	r3, #7
+	strb	r3, [r4, #4]
+	b	.L1695
+.L1694:
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L1702:
+	.align	2
+.L1701:
+	.word	.LANCHOR80
+	.word	.LANCHOR117
+	.word	.LC82
+	.word	.LANCHOR95
+	.word	.LANCHOR9
+	.size	ftl_open_sblk_init, .-ftl_open_sblk_init
 	.section	.text.pm_free_sblk,"ax",%progbits
 	.align	1
 	.global	pm_free_sblk
@@ -10061,16 +10772,16 @@ pm_free_sblk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #280
-	ldr	r5, .L1627
+	ldr	r5, .L1728
 	ldrh	r2, [r5]
 	cmp	r2, #128
-	bls	.L1603
-	movs	r2, #84
-	ldr	r1, .L1627+4
-	ldr	r0, .L1627+8
+	bls	.L1704
+	movs	r2, #94
+	ldr	r1, .L1728+4
+	ldr	r0, .L1728+8
 	bl	printf
-.L1603:
-	ldr	r4, .L1627+12
+.L1704:
+	ldr	r4, .L1728+12
 	movs	r2, #0
 	ldrh	r5, [r5]
 	mov	r3, r2
@@ -10078,21 +10789,21 @@ pm_free_sblk:
 	ldr	r1, [r4]
 	ldrh	r0, [r1, #688]
 	add	r1, r1, #416
-.L1606:
+.L1707:
 	ldrh	r7, [r1], #2
 	cmp	r7, r6
 	itt	ne
 	addne	r2, r2, #1
 	uxthne	r2, r2
 	cmp	r2, r0
-	bcs	.L1605
+	bcs	.L1706
 	cmp	r2, r5
-	bcs	.L1605
+	bcs	.L1706
 	adds	r3, r3, #1
 	uxth	r3, r3
 	cmp	r3, #128
-	bne	.L1606
-.L1605:
+	bne	.L1707
+.L1706:
 	adds	r3, r3, #1
 	mov	r2, #256
 	uxth	r3, r3
@@ -10106,26 +10817,26 @@ pm_free_sblk:
 	str	r3, [sp, #8]
 	add	fp, sp, #24
 	bl	ftl_memset
-	ldr	r2, .L1627+16
+	ldr	r2, .L1728+16
 	ldr	r7, [r4]
 	ldrh	r8, [r2]
-	ldr	r2, .L1627+20
+	ldr	r2, .L1728+20
 	add	r10, r7, #704
 	ldrh	r3, [r7, #698]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	rsb	r2, r2, #24
 	sub	r2, r2, r8
 	lsls	r5, r5, r2
-	ldr	r2, .L1627+24
+	ldr	r2, .L1728+24
 	subs	r5, r5, #1
 	ldrb	r2, [r2]	@ zero_extendqisi2
-.L1608:
+.L1709:
 	uxth	r1, r6
 	cmp	r3, r1
-	bhi	.L1611
-	ldr	r3, .L1627+28
+	bhi	.L1712
+	ldr	r3, .L1728+28
 	movs	r5, #0
-	ldr	r2, .L1627+32
+	ldr	r2, .L1728+32
 	movw	r10, #65535
 	mov	r8, r5
 	ldrb	r6, [r3]	@ zero_extendqisi2
@@ -10133,7 +10844,7 @@ pm_free_sblk:
 	str	r3, [sp, #12]
 	smulbb	r6, r6, r2
 	uxth	r6, r6
-.L1617:
+.L1718:
 	ldr	r2, [r4]
 	add	r7, r5, #208
 	uxth	fp, r5
@@ -10141,69 +10852,69 @@ pm_free_sblk:
 	ldrh	r0, [r2, #692]
 	str	r2, [sp, #16]
 	str	r3, [sp, #20]
-	ldr	r3, .L1627+24
+	ldr	r3, .L1728+24
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	bl	__aeabi_idiv
 	ldr	r3, [sp, #20]
 	ldr	r2, [sp, #16]
 	cmp	r0, r3
-	bne	.L1612
+	bne	.L1713
 	ldr	r1, [sp, #12]
-	ldr	r0, .L1627+32
+	ldr	r0, .L1728+32
 	ldrb	r1, [r1]	@ zero_extendqisi2
 	ldrh	r0, [r0]
 	smulbb	r1, r1, r0
 	add	r0, sp, #24
 	strh	r1, [r0, r5, lsl #1]	@ movhi
-.L1612:
+.L1713:
 	add	r1, sp, #24
 	ldrh	r1, [r1, r5, lsl #1]
 	cmp	r1, r6
-	bcs	.L1613
+	bcs	.L1714
 	cmp	r1, #0
 	itt	ne
 	movne	r8, fp
 	movne	r6, r1
-.L1613:
+.L1714:
 	ldrh	r0, [r2, #74]
 	cmp	r0, #2
-	bls	.L1614
+	bls	.L1715
 	movw	r0, #65535
 	cmp	r3, r0
-	beq	.L1614
-	ldr	r0, .L1627+36
+	beq	.L1715
+	ldr	r0, .L1728+36
 	ldrh	r2, [r2, #92]
 	ldr	r0, [r0]
 	adds	r2, r2, #4
 	ldrh	r0, [r0, r3, lsl #2]
 	ubfx	r0, r0, #0, #11
 	cmp	r0, r2
-	bgt	.L1614
+	bgt	.L1715
 	mov	r10, fp
 	str	r0, [sp]
 	mov	r2, r1
-	ldr	r0, .L1627+40
+	ldr	r0, .L1728+40
 	mov	r1, r5
 	bl	printf
-.L1614:
+.L1715:
 	add	r3, sp, #24
 	ldrh	r2, [r3, r5, lsl #1]
-	cbnz	r2, .L1615
+	cbnz	r2, .L1716
 	ldr	r1, [r4]
 	movw	r0, #65535
 	ldrh	r3, [r1, r7, lsl #1]
 	cmp	r3, r0
-	beq	.L1615
-	ldr	r0, .L1627+44
+	beq	.L1716
+	ldr	r0, .L1728+44
 	ldr	r0, [r0]
 	lsls	r0, r0, #19
-	bpl	.L1616
+	bpl	.L1717
 	ldrh	r1, [r1, #688]
-	ldr	r0, .L1627+48
+	ldr	r0, .L1728+48
 	str	r1, [sp]
 	mov	r1, r5
 	bl	printf
-.L1616:
+.L1717:
 	ldr	r3, [r4]
 	ldrh	r0, [r3, r7, lsl #1]
 	bl	ftl_free_sblk
@@ -10213,12 +10924,12 @@ pm_free_sblk:
 	ldrh	r2, [r3, #688]
 	subs	r2, r2, #1
 	strh	r2, [r3, #688]	@ movhi
-.L1615:
+.L1716:
 	adds	r5, r5, #1
 	ldr	r2, [sp, #8]
 	uxth	r3, r5
 	cmp	r3, r2
-	bcc	.L1617
+	bcc	.L1718
 	movw	r0, #65535
 	cmp	r10, r0
 	ite	ne
@@ -10227,7 +10938,7 @@ pm_free_sblk:
 	add	sp, sp, #280
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1611:
+.L1712:
 	ldr	r0, [r10], #4
 	mov	r1, r2
 	str	r3, [sp, #20]
@@ -10241,7 +10952,7 @@ pm_free_sblk:
 	str	r3, [sp, #12]
 	movs	r1, #0
 	ldr	r3, [sp, #20]
-.L1610:
+.L1711:
 	ldrh	ip, [lr], #2
 	ldr	r0, [sp, #12]
 	cmp	r0, ip
@@ -10253,25 +10964,25 @@ pm_free_sblk:
 	adds	r1, r1, #1
 	uxth	ip, r1
 	cmp	r0, ip
-	bhi	.L1610
+	bhi	.L1711
 	adds	r6, r6, #1
-	b	.L1608
-.L1628:
+	b	.L1709
+.L1729:
 	.align	2
-.L1627:
-	.word	.LANCHOR149
-	.word	.LANCHOR150
+.L1728:
+	.word	.LANCHOR155
+	.word	.LANCHOR156
 	.word	.LC0
-	.word	.LANCHOR104
-	.word	.LANCHOR68
-	.word	.LANCHOR31
-	.word	.LANCHOR69
+	.word	.LANCHOR110
+	.word	.LANCHOR75
+	.word	.LANCHOR32
+	.word	.LANCHOR76
 	.word	.LANCHOR80
-	.word	.LANCHOR87
+	.word	.LANCHOR95
 	.word	.LANCHOR7
-	.word	.LC90
+	.word	.LC95
 	.word	.LANCHOR14
-	.word	.LC91
+	.word	.LC96
 	.size	pm_free_sblk, .-pm_free_sblk
 	.section	.text.ftl_memcpy,"ax",%progbits
 	.align	1
@@ -10298,25 +11009,25 @@ ftl_memcpy:
 flash_info_data_init:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1635
+	ldr	r3, .L1736
 	push	{r4, lr}
 	ldr	r3, [r3]
 	lsls	r3, r3, #19
-	bpl	.L1631
-	ldr	r2, .L1635+4
-	movs	r1, #105
-	ldr	r0, .L1635+8
+	bpl	.L1732
+	ldr	r2, .L1736+4
+	movs	r1, #119
+	ldr	r0, .L1736+8
 	bl	printf
-.L1631:
-	ldr	r4, .L1635+12
+.L1732:
+	ldr	r4, .L1736+12
 	mov	r2, #2048
 	movs	r1, #0
 	ldr	r0, [r4]
 	bl	ftl_memset
 	ldr	r0, [r4]
 	movs	r2, #32
-	ldr	r3, .L1635+16
-	ldr	r1, .L1635+20
+	ldr	r3, .L1736+16
+	ldr	r1, .L1736+20
 	adds	r0, r0, #80
 	str	r3, [r0, #-80]
 	mov	r3, #2032
@@ -10326,20 +11037,20 @@ flash_info_data_init:
 	bl	ftl_memcpy
 	ldr	r0, [r4]
 	movs	r2, #32
-	ldr	r1, .L1635+24
+	ldr	r1, .L1736+24
 	pop	{r4, lr}
 	adds	r0, r0, #48
 	b	ftl_memcpy
-.L1636:
+.L1737:
 	.align	2
-.L1635:
+.L1736:
 	.word	.LANCHOR14
-	.word	.LANCHOR151
-	.word	.LC92
+	.word	.LANCHOR157
+	.word	.LC97
 	.word	.LANCHOR27
 	.word	1398362953
 	.word	.LANCHOR20
-	.word	.LANCHOR32
+	.word	.LANCHOR33
 	.size	flash_info_data_init, .-flash_info_data_init
 	.section	.text.ftl_memcpy32,"ax",%progbits
 	.align	1
@@ -10354,15 +11065,15 @@ ftl_memcpy32:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	movs	r3, #0
 	push	{r4, lr}
-.L1638:
+.L1739:
 	cmp	r3, r2
-	bne	.L1639
+	bne	.L1740
 	pop	{r4, pc}
-.L1639:
+.L1740:
 	ldr	r4, [r1, r3, lsl #2]
 	str	r4, [r0, r3, lsl #2]
 	adds	r3, r3, #1
-	b	.L1638
+	b	.L1739
 	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.ftl_memcmp,"ax",%progbits
 	.align	1
@@ -10390,11 +11101,11 @@ rknand_get_clk_rate:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r0, .L1642
+	ldr	r0, .L1743
 	bx	lr
-.L1643:
+.L1744:
 	.align	2
-.L1642:
+.L1743:
 	.word	148000000
 	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
 	.section	.text.ftl_malloc,"ax",%progbits
@@ -10425,40 +11136,40 @@ nandc_init:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, lr}
 	movs	r3, #0
-	ldr	r6, .L1664
+	ldr	r6, .L1765
 	sub	sp, sp, #20
 	mov	r4, r0
 	str	r3, [sp, #12]
 	ldr	r3, [r6]
 	lsls	r0, r3, #19
-	bpl	.L1646
+	bpl	.L1747
 	mov	r2, r4
-	ldr	r1, .L1664+4
-	ldr	r0, .L1664+8
+	ldr	r1, .L1765+4
+	ldr	r0, .L1765+8
 	bl	printf
-.L1646:
+.L1747:
 	ldr	r1, [r4, #352]
 	movs	r3, #6
-	ldr	r2, .L1664+12
-	ldr	r5, .L1664+16
-	ldr	r7, .L1664+20
+	ldr	r2, .L1765+12
+	ldr	r5, .L1765+16
+	ldr	r7, .L1765+20
 	cmp	r1, r2
 	ldr	r2, [r4, #128]
 	strb	r3, [r5]
 	itt	eq
 	moveq	r3, #8
 	strbeq	r3, [r5]
-	ldr	r3, .L1664+24
+	ldr	r3, .L1765+24
 	str	r4, [r7]
 	cmp	r2, r3
-	ldr	r2, .L1664+28
+	ldr	r2, .L1765+28
 	itt	eq
 	moveq	r3, #9
 	strbeq	r3, [r5]
 	ldrb	r3, [r5]	@ zero_extendqisi2
 	cmp	r3, #9
-	ldr	r3, .L1664+32
-	bne	.L1649
+	ldr	r3, .L1765+32
+	bne	.L1750
 	movs	r1, #1
 	strb	r1, [r3]
 	movs	r1, #2
@@ -10483,36 +11194,36 @@ nandc_init:
 	str	r3, [r4, #84]
 	ldr	r3, [r6]
 	lsls	r1, r3, #19
-	bpl	.L1651
+	bpl	.L1752
 	ldr	r1, [r4]
 	ldr	r2, [r4, #8]
 	ldr	r3, [r4, #80]
 	ldr	r0, [r4, #84]
 	ldr	r4, [r4, #88]
 	stm	sp, {r0, r4}
-.L1663:
-	ldr	r0, .L1664+36
+.L1764:
+	ldr	r0, .L1765+36
 	bl	printf
-.L1651:
-	ldr	r3, .L1664+40
+.L1752:
+	ldr	r3, .L1765+40
 	movs	r2, #1
 	strb	r2, [r3]
 	movs	r3, #0
-	ldr	r2, .L1664+44
+	ldr	r2, .L1765+44
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L1664+48
+	ldr	r2, .L1765+48
 	strb	r3, [r2]
 	ldr	r3, [r6]
 	lsls	r3, r3, #19
-	bpl	.L1645
+	bpl	.L1746
 	ldrb	r1, [r5]	@ zero_extendqisi2
-	ldr	r0, .L1664+52
+	ldr	r0, .L1765+52
 	bl	printf
-.L1645:
+.L1746:
 	add	sp, sp, #20
 	@ sp needed
 	pop	{r4, r5, r6, r7, pc}
-.L1649:
+.L1750:
 	movs	r1, #0
 	movs	r0, #1
 	strb	r1, [r3]
@@ -10536,11 +11247,11 @@ nandc_init:
 	movs	r3, #39
 	str	r3, [r4, #308]
 	bl	ftl_malloc
-	ldr	r3, .L1664+56
+	ldr	r3, .L1765+56
 	str	r0, [r3]
 	ldr	r3, [r6]
 	lsls	r2, r3, #19
-	bpl	.L1651
+	bpl	.L1752
 	ldr	r0, [r7]
 	ldr	r1, [r0]
 	ldr	r2, [r0, #344]
@@ -10549,25 +11260,25 @@ nandc_init:
 	ldr	r0, [r0, #312]
 	str	r4, [sp]
 	str	r0, [sp, #4]
-	b	.L1663
-.L1665:
+	b	.L1764
+.L1766:
 	.align	2
-.L1664:
+.L1765:
 	.word	.LANCHOR14
-	.word	.LANCHOR152
-	.word	.LC93
+	.word	.LANCHOR158
+	.word	.LC98
 	.word	1446522928
 	.word	.LANCHOR28
 	.word	.LANCHOR13
 	.word	1446588464
 	.word	1052675
-	.word	.LANCHOR47
-	.word	.LC94
-	.word	.LANCHOR48
+	.word	.LANCHOR51
+	.word	.LC99
+	.word	.LANCHOR52
+	.word	.LANCHOR54
 	.word	.LANCHOR50
-	.word	.LANCHOR46
-	.word	.LC95
-	.word	.LANCHOR49
+	.word	.LC100
+	.word	.LANCHOR53
 	.size	nandc_init, .-nandc_init
 	.section	.text.zbuf_init,"ax",%progbits
 	.align	1
@@ -10582,11 +11293,11 @@ zbuf_init:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r5, #0
-	ldr	r4, .L1669
+	ldr	r4, .L1770
 	mov	r6, r5
-	ldr	r8, .L1669+12
+	ldr	r8, .L1770+12
 	mov	r7, r4
-.L1667:
+.L1768:
 	ldrb	r0, [r8]	@ zero_extendqisi2
 	uxtb	r3, r5
 	strb	r6, [r4, #2]
@@ -10603,21 +11314,21 @@ zbuf_init:
 	bl	ftl_malloc
 	cmp	r5, #32
 	str	r0, [r4, #-36]
-	bne	.L1667
+	bne	.L1768
 	movs	r3, #255
 	strb	r3, [r7, #1488]
-	ldr	r3, .L1669+4
+	ldr	r3, .L1770+4
 	strb	r6, [r3]
-	ldr	r3, .L1669+8
+	ldr	r3, .L1770+8
 	strb	r5, [r3]
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1670:
+.L1771:
 	.align	2
-.L1669:
-	.word	.LANCHOR52
-	.word	.LANCHOR53
-	.word	.LANCHOR54
-	.word	.LANCHOR125
+.L1770:
+	.word	.LANCHOR56
+	.word	.LANCHOR57
+	.word	.LANCHOR58
+	.word	.LANCHOR131
 	.size	zbuf_init, .-zbuf_init
 	.section	.text.gc_init,"ax",%progbits
 	.align	1
@@ -10630,114 +11341,118 @@ zbuf_init:
 gc_init:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1672
-	mov	r2, #596
+	ldr	r3, .L1773
+	movw	r2, #2132
 	push	{r4, r5, r6, lr}
 	movs	r4, #0
-	ldr	r5, .L1672+4
+	ldr	r5, .L1773+4
 	mov	r1, r4
 	strb	r4, [r3]
-	ldr	r3, .L1672+8
+	ldr	r3, .L1773+8
 	mov	r0, r5
 	strb	r4, [r3]
-	ldr	r3, .L1672+12
+	ldr	r3, .L1773+12
 	str	r4, [r3]
-	ldr	r3, .L1672+16
+	ldr	r3, .L1773+16
 	strh	r4, [r3]	@ movhi
 	bl	ftl_memset
 	movw	r3, #65535
 	str	r4, [r5, #8]
 	strh	r3, [r5]	@ movhi
-	ldr	r3, .L1672+20
+	ldr	r3, .L1773+20
 	ldrh	r3, [r3]
 	lsrs	r2, r3, #1
 	lsrs	r1, r3, #2
 	strh	r2, [r5, #34]	@ movhi
-	ldr	r2, .L1672+24
+	ldr	r2, .L1773+24
 	strh	r1, [r5, #32]	@ movhi
-	ldr	r5, .L1672+28
+	ldr	r5, .L1773+28
 	strh	r4, [r2]	@ movhi
-	ldr	r2, .L1672+32
+	ldr	r2, .L1773+32
 	strh	r4, [r2]	@ movhi
-	ldr	r2, .L1672+36
+	ldr	r2, .L1773+36
 	strh	r4, [r2]	@ movhi
-	ldr	r4, .L1672+40
+	ldr	r4, .L1773+40
 	ldrb	r0, [r4]	@ zero_extendqisi2
 	smulbb	r2, r0, r3
 	uxth	r2, r2
 	sub	r6, r2, #32
 	strh	r6, [r5]	@ movhi
-	ldr	r5, .L1672+44
+	ldr	r5, .L1773+44
 	strh	r2, [r5]	@ movhi
-	ldr	r2, .L1672+48
-	ldr	r5, .L1672+52
+	ldr	r2, .L1773+48
+	ldr	r5, .L1773+52
 	strh	r3, [r2]	@ movhi
-	ldr	r3, .L1672+56
+	movs	r2, #4
+	ldr	r3, .L1773+56
+	strh	r2, [r3]	@ movhi
+	ldr	r3, .L1773+60
 	strh	r1, [r3]	@ movhi
 	ldrh	r3, [r5]
 	muls	r0, r3, r0
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L1672+60
+	ldr	r3, .L1773+64
 	str	r0, [r3]
 	ldrh	r3, [r5]
 	ldrb	r0, [r4]	@ zero_extendqisi2
 	muls	r0, r3, r0
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L1672+64
+	ldr	r3, .L1773+68
 	str	r0, [r3]
 	ldrh	r3, [r5]
 	ldrb	r0, [r4]	@ zero_extendqisi2
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L1672+68
+	ldr	r3, .L1773+72
 	str	r0, [r3]
 	ldrh	r3, [r5]
 	ldrb	r0, [r4]	@ zero_extendqisi2
 	muls	r0, r3, r0
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L1672+72
+	ldr	r3, .L1773+76
 	str	r0, [r3]
 	ldrh	r3, [r5]
 	ldrb	r0, [r4]	@ zero_extendqisi2
 	muls	r0, r3, r0
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L1672+76
-	ldr	r2, .L1672+80
+	ldr	r3, .L1773+80
+	ldr	r2, .L1773+84
 	str	r0, [r3]
-	ldr	r3, .L1672+84
+	ldr	r3, .L1773+88
 	ldrh	r3, [r3]
 	lsrs	r3, r3, #2
 	strh	r3, [r2]	@ movhi
 	pop	{r4, r5, r6, pc}
-.L1673:
+.L1774:
 	.align	2
-.L1672:
-	.word	.LANCHOR78
-	.word	.LANCHOR64
-	.word	.LANCHOR153
-	.word	.LANCHOR154
-	.word	.LANCHOR89
-	.word	.LANCHOR87
-	.word	.LANCHOR88
-	.word	.LANCHOR96
-	.word	.LANCHOR84
+.L1773:
 	.word	.LANCHOR85
+	.word	.LANCHOR71
+	.word	.LANCHOR159
+	.word	.LANCHOR160
+	.word	.LANCHOR96
+	.word	.LANCHOR95
+	.word	.LANCHOR90
+	.word	.LANCHOR102
+	.word	.LANCHOR91
+	.word	.LANCHOR92
 	.word	.LANCHOR80
-	.word	.LANCHOR93
+	.word	.LANCHOR100
+	.word	.LANCHOR94
 	.word	.LANCHOR86
-	.word	.LANCHOR79
-	.word	.LANCHOR63
-	.word	.LANCHOR155
-	.word	.LANCHOR156
-	.word	.LANCHOR76
+	.word	.LANCHOR161
 	.word	.LANCHOR70
-	.word	.LANCHOR157
-	.word	.LANCHOR81
-	.word	.LANCHOR91
+	.word	.LANCHOR162
+	.word	.LANCHOR163
+	.word	.LANCHOR83
+	.word	.LANCHOR77
+	.word	.LANCHOR164
+	.word	.LANCHOR87
+	.word	.LANCHOR98
 	.size	gc_init, .-gc_init
 	.section	.text.ftl_free,"ax",%progbits
 	.align	1
@@ -10764,26 +11479,66 @@ ftl_free:
 js_hash:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1678
+	ldr	r3, .L1779
 	add	r1, r1, r0
 	push	{r4, lr}
-.L1676:
+.L1777:
 	cmp	r0, r1
-	bne	.L1677
+	bne	.L1778
 	mov	r0, r3
 	pop	{r4, pc}
-.L1677:
+.L1778:
 	lsrs	r2, r3, #2
 	ldrb	r4, [r0], #1	@ zero_extendqisi2
 	add	r2, r2, r3, lsl #5
 	add	r2, r2, r4
 	eors	r3, r3, r2
-	b	.L1676
-.L1679:
+	b	.L1777
+.L1780:
 	.align	2
-.L1678:
+.L1779:
 	.word	1204201446
 	.size	js_hash, .-js_hash
+	.section	.text.ftl_debug_info_fill,"ax",%progbits
+	.align	1
+	.global	ftl_debug_info_fill
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_debug_info_fill, %function
+ftl_debug_info_fill:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1787
+	push	{r4, lr}
+	mov	r4, r1
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #8
+	bls	.L1782
+	cmp	r0, #2
+	bne	.L1783
+	cbz	r2, .L1783
+	ldr	r3, .L1787+4
+	mov	r0, r2
+	str	r3, [r1]
+	mov	r1, #1024
+	bl	js_hash
+	str	r0, [r4, #4]
+.L1782:
+	movs	r0, #0
+	pop	{r4, pc}
+.L1783:
+	movs	r3, #0
+	str	r3, [r4]
+	str	r3, [r4, #4]
+	b	.L1782
+.L1788:
+	.align	2
+.L1787:
+	.word	.LANCHOR131
+	.word	1212240712
+	.size	ftl_debug_info_fill, .-ftl_debug_info_fill
 	.section	.text.timer_get_time,"ax",%progbits
 	.align	1
 	.global	timer_get_time
@@ -10853,13 +11608,13 @@ ftl_get_capacity:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L1685
+	ldr	r3, .L1794
 	ldr	r0, [r3]
 	bx	lr
-.L1686:
+.L1795:
 	.align	2
-.L1685:
-	.word	.LANCHOR61
+.L1794:
+	.word	.LANCHOR68
 	.size	ftl_get_capacity, .-ftl_get_capacity
 	.section	.text.rknand_print_hex,"ax",%progbits
 	.align	1
@@ -10870,59 +11625,64 @@ ftl_get_capacity:
 	.fpu softvfp
 	.type	rknand_print_hex, %function
 rknand_print_hex:
-	@ args = 0, pretend = 0, frame = 0
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r5, #0
-	ldr	r7, .L1696
-	mov	fp, r0
-	mov	r6, r1
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r6, #0
+	ldr	r10, .L1805+12
+	mov	r7, r1
 	mov	r8, r2
-	mov	r10, r3
-	mov	r4, r5
-.L1688:
-	cmp	r4, r10
-	bne	.L1694
-	ldr	r1, .L1696+4
-	ldr	r0, .L1696+8
+	mov	fp, r3
+	mov	r5, r6
+	mov	r4, r6
+	str	r0, [sp, #4]
+.L1797:
+	cmp	r4, fp
+	bne	.L1803
+	ldr	r1, .L1805
+	ldr	r0, .L1805+4
+	add	sp, sp, #8
+	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
 	b	printf
-.L1694:
-	cbnz	r5, .L1689
-	mov	r2, r4
-	mov	r1, fp
-	ldr	r0, .L1696+12
+.L1803:
+	cbnz	r5, .L1798
+	mov	r3, r6
+	mov	r2, r7
+	ldr	r1, [sp, #4]
+	ldr	r0, .L1805+8
 	bl	printf
-.L1689:
+.L1798:
 	cmp	r8, #4
-	bne	.L1690
-	ldr	r1, [r6, r4, lsl #2]
-.L1695:
-	mov	r0, r7
+	bne	.L1799
+	ldr	r1, [r7, r4, lsl #2]
+.L1804:
+	mov	r0, r10
 	adds	r5, r5, #1
 	bl	printf
 	cmp	r5, #15
-	bls	.L1693
+	bls	.L1802
 	movs	r5, #0
-	ldr	r1, .L1696+4
-	ldr	r0, .L1696+8
+	ldr	r1, .L1805
+	ldr	r0, .L1805+4
 	bl	printf
-.L1693:
+.L1802:
 	adds	r4, r4, #1
-	b	.L1688
-.L1690:
+	add	r6, r6, r8
+	b	.L1797
+.L1799:
 	cmp	r8, #2
 	ite	eq
-	ldrsheq	r1, [r6, r4, lsl #1]
-	ldrbne	r1, [r6, r4]	@ zero_extendqisi2
-	b	.L1695
-.L1697:
+	ldrsheq	r1, [r7, r4, lsl #1]
+	ldrbne	r1, [r7, r4]	@ zero_extendqisi2
+	b	.L1804
+.L1806:
 	.align	2
-.L1696:
-	.word	.LC97
-	.word	.LC98
-	.word	.LC99
-	.word	.LC96
+.L1805:
+	.word	.LC103
+	.word	.LC104
+	.word	.LC101
+	.word	.LC102
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.hynix_get_read_retry_default,"ax",%progbits
 	.align	1
@@ -10935,7 +11695,7 @@ rknand_print_hex:
 hynix_get_read_retry_default:
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1809
+	ldr	r3, .L1918
 	cmp	r0, #2
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #56
@@ -10952,50 +11712,50 @@ hynix_get_read_retry_default:
 	strb	r1, [fp, #129]
 	strb	r2, [fp, #130]
 	strb	r3, [fp, #131]
-	bne	.L1699
+	bne	.L1808
 	movs	r3, #167
 	mov	r8, #7
 	strb	r3, [fp, #128]
 	movs	r2, #247
-	ldr	r3, .L1809+4
+	ldr	r3, .L1918+4
 	strb	r2, [r3, #17]
-.L1803:
+.L1912:
 	mov	r10, #4
-	b	.L1700
-.L1699:
+	b	.L1809
+.L1808:
 	cmp	r0, #3
-	bne	.L1701
+	bne	.L1810
 	add	r2, fp, #127
 	movs	r3, #176
-.L1702:
+.L1811:
 	strb	r3, [r2, #1]!
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, #184
-	bne	.L1702
-.L1804:
+	bne	.L1811
+.L1913:
 	mov	r8, #8
 	mov	r10, r8
-.L1700:
+.L1809:
 	subs	r3, r4, #1
 	cmp	r3, #1
-	bhi	.L1708
+	bhi	.L1817
 	movs	r5, #0
-.L1709:
-	ldr	r3, .L1809+8
+.L1818:
+	ldr	r3, .L1918+8
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	uxtb	r3, r5
 	cmp	r2, r3
-	bhi	.L1714
-.L1715:
+	bhi	.L1823
+.L1824:
 	strb	r10, [fp, #113]
 	strb	r8, [fp, #114]
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1701:
+.L1810:
 	cmp	r0, #4
-	bne	.L1703
+	bne	.L1812
 	movs	r0, #204
 	strb	r1, [fp, #133]
 	strb	r0, [fp, #128]
@@ -11009,10 +11769,10 @@ hynix_get_read_retry_default:
 	strb	r0, [fp, #132]
 	strb	r2, [fp, #134]
 	strb	r3, [fp, #135]
-	b	.L1804
-.L1703:
+	b	.L1913
+.L1812:
 	cmp	r0, #5
-	bne	.L1704
+	bne	.L1813
 	movs	r3, #56
 	mov	r8, #8
 	strb	r3, [fp, #128]
@@ -11022,10 +11782,10 @@ hynix_get_read_retry_default:
 	strb	r3, [fp, #130]
 	movs	r3, #59
 	strb	r3, [fp, #131]
-	b	.L1803
-.L1704:
+	b	.L1912
+.L1813:
 	cmp	r0, #6
-	bne	.L1705
+	bne	.L1814
 	movs	r3, #14
 	mov	r8, #12
 	strb	r3, [fp, #128]
@@ -11035,29 +11795,29 @@ hynix_get_read_retry_default:
 	strb	r3, [fp, #130]
 	movs	r3, #17
 	strb	r3, [fp, #131]
-	b	.L1803
-.L1705:
+	b	.L1912
+.L1814:
 	cmp	r0, #7
-	bne	.L1706
+	bne	.L1815
 	add	r2, fp, #127
 	movs	r3, #176
-.L1707:
+.L1816:
 	strb	r3, [r2, #1]!
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, #184
-	bne	.L1707
+	bne	.L1816
 	movs	r3, #212
 	mov	r8, #12
 	strb	r3, [fp, #136]
 	movs	r3, #213
 	strb	r3, [fp, #137]
 	mov	r10, #10
-	b	.L1700
-.L1706:
+	b	.L1809
+.L1815:
 	cmp	r0, #8
 	mov	r3, #7
-	bne	.L1762
+	bne	.L1871
 	strb	r3, [fp, #129]
 	movs	r3, #9
 	movs	r2, #6
@@ -11068,18 +11828,18 @@ hynix_get_read_retry_default:
 	mov	r8, #50
 	strb	r3, [fp, #132]
 	mov	r10, #5
-	b	.L1700
-.L1762:
+	b	.L1809
+.L1871:
 	mov	r8, r3
-	b	.L1803
-.L1714:
-	ldr	r2, .L1809+12
+	b	.L1912
+.L1823:
+	ldr	r2, .L1918+12
 	movs	r1, #160
 	ldr	r0, [sp]
 	add	r7, r10, #-1
 	add	r6, fp, #127
 	ldrb	r3, [r2, r3]	@ zero_extendqisi2
-	ldr	r2, .L1809+16
+	ldr	r2, .L1918+16
 	uxtab	r7, r0, r7
 	ldr	r4, [r2]
 	mla	r1, r1, r3, fp
@@ -11087,7 +11847,7 @@ hynix_get_read_retry_default:
 	adds	r1, r1, #144
 	subs	r2, r1, #1
 	addw	r3, r4, #2056
-.L1710:
+.L1819:
 	str	r2, [sp, #8]
 	movs	r2, #55
 	str	r2, [r3]
@@ -11101,25 +11861,25 @@ hynix_get_read_retry_default:
 	ldr	r2, [sp, #8]
 	ldr	r3, [sp, #4]
 	strb	r0, [r2, #1]!
-	bne	.L1710
-	ldr	r7, .L1809+4
+	bne	.L1819
+	ldr	r7, .L1918+4
 	mov	r0, r1
 	movs	r2, #0
-.L1711:
+.L1820:
 	movs	r3, #1
 	adds	r6, r7, r2
-.L1712:
+.L1821:
 	ldrb	r4, [r6, r3, lsl #2]	@ zero_extendqisi2
 	ldrb	ip, [r0]	@ zero_extendqisi2
 	add	r4, r4, ip
 	strb	r4, [r0, r3, lsl #3]
 	adds	r3, r3, #1
 	cmp	r3, #7
-	bne	.L1712
+	bne	.L1821
 	adds	r2, r2, #1
 	adds	r0, r0, #1
 	cmp	r2, #4
-	bne	.L1711
+	bne	.L1820
 	movs	r3, #0
 	adds	r5, r5, #1
 	strb	r3, [r1, #16]
@@ -11129,11 +11889,11 @@ hynix_get_read_retry_default:
 	strb	r3, [r1, #48]
 	strb	r3, [r1, #41]
 	strb	r3, [r1, #49]
-	b	.L1709
-.L1708:
+	b	.L1818
+.L1817:
 	subs	r3, r4, #3
 	cmp	r3, #5
-	bhi	.L1715
+	bhi	.L1824
 	smulbb	r3, r8, r10
 	asrs	r2, r3, #1
 	lsls	r3, r3, #4
@@ -11144,14 +11904,14 @@ hynix_get_read_retry_default:
 	lsls	r3, r2, #1
 	str	r3, [sp, #24]
 	movs	r3, #0
-.L1808:
+.L1917:
 	str	r3, [sp, #20]
-	ldr	r3, .L1809+8
+	ldr	r3, .L1918+8
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	ldrb	r3, [sp, #20]	@ zero_extendqisi2
 	cmp	r2, r3
-	bls	.L1715
-	ldr	r2, .L1809+12
+	bls	.L1824
+	ldr	r2, .L1918+12
 	movs	r6, #255
 	ldrb	r3, [r2, r3]	@ zero_extendqisi2
 	mov	r0, r3
@@ -11163,14 +11923,14 @@ hynix_get_read_retry_default:
 	mla	r1, r1, r3, fp
 	add	r3, r1, #144
 	str	r3, [sp, #40]
-	ldr	r3, .L1809+16
+	ldr	r3, .L1918+16
 	ldr	r3, [r3]
 	str	r3, [sp, #4]
 	add	r5, r3, r2, lsl #8
 	str	r6, [r5, #2056]
 	bl	nandc_wait_flash_ready
 	cmp	r4, #8
-	bne	.L1717
+	bne	.L1826
 	add	r3, fp, #144
 	movs	r2, #23
 	str	r3, [sp, #40]
@@ -11194,7 +11954,7 @@ hynix_get_read_retry_default:
 	str	r1, [r5, #2052]
 	str	r2, [r5, #2052]
 	str	r3, [r5, #2052]
-.L1718:
+.L1827:
 	ldm	sp, {r2, r3}
 	add	r3, r3, r2, lsl #8
 	movs	r2, #48
@@ -11203,15 +11963,15 @@ hynix_get_read_retry_default:
 	subs	r3, r4, #5
 	cmp	r3, #1
 	str	r3, [sp, #28]
-	bls	.L1764
+	bls	.L1873
 	cmp	r4, #8
-	beq	.L1764
+	beq	.L1873
 	cmp	r4, #7
 	ite	ne
 	movne	r2, #2
 	moveq	r2, #32
-.L1724:
-	ldr	r3, .L1809+20
+.L1833:
+	ldr	r3, .L1918+20
 	subs	r2, r2, #1
 	ldr	r5, [sp, #4]
 	ldr	r6, [sp]
@@ -11220,65 +11980,65 @@ hynix_get_read_retry_default:
 	subs	r1, r3, #1
 	uxtab	r2, r3, r2
 	mov	r0, r1
-.L1725:
+.L1834:
 	ldr	r5, [r7, #2048]
 	strb	r5, [r0, #1]!
 	cmp	r2, r0
-	bne	.L1725
+	bne	.L1834
 	cmp	r4, #8
-	bne	.L1726
+	bne	.L1835
 	movs	r2, #0
-.L1728:
+.L1837:
 	ldrb	r0, [r3, r2, lsl #2]	@ zero_extendqisi2
 	uxtb	r1, r2
 	cmp	r0, #50
-	beq	.L1727
+	beq	.L1836
 	add	r0, r3, r2, lsl #2
 	ldrb	r0, [r0, #1]	@ zero_extendqisi2
 	cmp	r0, #5
-	beq	.L1727
+	beq	.L1836
 	adds	r2, r2, #1
 	cmp	r2, #8
-	bne	.L1728
-.L1729:
+	bne	.L1837
+.L1838:
 	movs	r1, #0
-	ldr	r0, .L1809+24
+	ldr	r0, .L1918+24
 	bl	printf
-.L1731:
-	b	.L1731
-.L1717:
+.L1840:
+	b	.L1840
+.L1826:
 	cmp	r4, #4
 	mov	r3, #54
 	str	r3, [r5, #2056]
-	bne	.L1719
+	bne	.L1828
 	movs	r3, #64
 	str	r6, [r5, #2052]
 	str	r3, [r5, #2048]
 	movs	r3, #204
-.L1805:
+.L1914:
 	str	r3, [r5, #2052]
 	movs	r3, #77
-	b	.L1806
-.L1810:
+	b	.L1915
+.L1919:
 	.align	2
-.L1809:
+.L1918:
 	.word	.LANCHOR27
-	.word	.LANCHOR158
+	.word	.LANCHOR165
 	.word	.LANCHOR18
 	.word	.LANCHOR30
 	.word	.LANCHOR13
-	.word	.LANCHOR159
-	.word	.LC100
-.L1719:
+	.word	.LANCHOR166
+	.word	.LC105
+.L1828:
 	subs	r3, r4, #5
 	cmp	r3, #1
-	bhi	.L1721
+	bhi	.L1830
 	ldrb	r3, [fp, #128]	@ zero_extendqisi2
 	str	r3, [r5, #2052]
 	movs	r3, #82
-.L1806:
+.L1915:
 	str	r3, [r5, #2048]
-.L1720:
+.L1829:
 	ldm	sp, {r2, r3}
 	cmp	r4, #6
 	add	r3, r3, r2, lsl #8
@@ -11301,57 +12061,57 @@ hynix_get_read_retry_default:
 	str	r2, [r3, #2052]
 	movs	r2, #0
 	str	r2, [r3, #2052]
-	b	.L1718
-.L1721:
+	b	.L1827
+.L1830:
 	cmp	r4, #7
-	bne	.L1720
+	bne	.L1829
 	movs	r3, #174
 	str	r3, [r5, #2052]
 	movs	r3, #0
 	str	r3, [r5, #2048]
 	movs	r3, #176
-	b	.L1805
-.L1764:
+	b	.L1914
+.L1873:
 	movs	r2, #16
-	b	.L1724
-.L1727:
+	b	.L1833
+.L1836:
 	cmp	r1, #6
-	bhi	.L1729
-.L1730:
-	ldr	r3, .L1811
+	bhi	.L1838
+.L1839:
+	ldr	r3, .L1920
 	ldr	ip, [r3]
 	mov	r3, ip
-.L1740:
+.L1849:
 	ldr	r1, [sp, #48]
 	sub	r2, r3, ip
 	cmp	r1, r2
-	bgt	.L1741
-	ldr	r3, .L1811
+	bgt	.L1850
+	ldr	r3, .L1920
 	ldr	r1, [r3]
 	ldr	r3, [sp, #24]
 	adds	r2, r1, r3
 	movs	r3, #8
-.L1743:
+.L1852:
 	mov	r5, r2
 	movs	r0, #0
-.L1742:
+.L1851:
 	ldrh	r6, [r5]
 	adds	r0, r0, #1
 	mvns	r6, r6
 	strh	r6, [r5], #2	@ movhi
 	ldr	r6, [sp, #8]
 	cmp	r6, r0
-	bgt	.L1742
+	bgt	.L1851
 	ldr	r0, [sp, #44]
 	subs	r3, r3, #1
 	add	r2, r2, r0
-	bne	.L1743
+	bne	.L1852
 	mov	r6, r1
 	str	r3, [sp, #16]
-.L1744:
+.L1853:
 	movs	r0, #0
 	mov	r2, r0
-.L1748:
+.L1857:
 	movs	r3, #1
 	mov	lr, r6
 	lsl	r5, r3, r2
@@ -11360,7 +12120,7 @@ hynix_get_read_retry_default:
 	str	r5, [sp, #32]
 	movs	r5, #16
 	str	r5, [sp, #36]
-.L1746:
+.L1855:
 	ldrh	r3, [lr]
 	str	r3, [sp, #52]
 	ldr	r3, [sp, #32]
@@ -11376,7 +12136,7 @@ hynix_get_read_retry_default:
 	ldr	r3, [sp, #36]
 	subs	r3, r3, #1
 	str	r3, [sp, #36]
-	bne	.L1746
+	bne	.L1855
 	ldr	r3, [sp, #12]
 	adds	r2, r2, #1
 	cmp	r3, #8
@@ -11385,7 +12145,7 @@ hynix_get_read_retry_default:
 	orrhi	r0, r0, r3
 	uxthhi	r0, r0
 	cmp	r2, #16
-	bne	.L1748
+	bne	.L1857
 	ldr	r3, [sp, #16]
 	strh	r0, [r6], #2	@ movhi
 	adds	r3, r3, #1
@@ -11393,106 +12153,106 @@ hynix_get_read_retry_default:
 	ldr	r2, [sp, #16]
 	ldr	r3, [sp, #8]
 	cmp	r3, r2
-	bgt	.L1744
+	bgt	.L1853
 	subs	r2, r1, #4
 	add	r0, r1, #28
 	movs	r3, #0
-.L1751:
+.L1860:
 	ldr	r5, [r2, #4]!
-	cbnz	r5, .L1750
+	cbnz	r5, .L1859
 	adds	r3, r3, #1
-.L1750:
+.L1859:
 	cmp	r0, r2
-	bne	.L1751
+	bne	.L1860
 	cmp	r3, #7
-	ble	.L1752
-	ldr	r0, .L1811+4
+	ble	.L1861
+	ldr	r0, .L1920+4
 	mov	r3, #1024
 	movs	r2, #1
 	bl	rknand_print_hex
 	movs	r1, #0
-	ldr	r0, .L1811+8
+	ldr	r0, .L1920+8
 	bl	printf
-.L1753:
-	b	.L1753
-.L1726:
+.L1862:
+	b	.L1862
+.L1835:
 	cmp	r4, #7
-	bne	.L1732
+	bne	.L1841
 	movs	r2, #0
-.L1734:
+.L1843:
 	ldrb	r0, [r3, r2, lsl #2]	@ zero_extendqisi2
 	uxtb	r1, r2
 	cmp	r0, #12
-	beq	.L1733
+	beq	.L1842
 	add	r0, r3, r2, lsl #2
 	ldrb	r0, [r0, #1]	@ zero_extendqisi2
 	cmp	r0, #10
-	beq	.L1733
+	beq	.L1842
 	adds	r2, r2, #1
 	cmp	r2, #8
-	bne	.L1734
-.L1735:
+	bne	.L1843
+.L1844:
 	movs	r1, #0
-	ldr	r0, .L1811+8
+	ldr	r0, .L1920+8
 	bl	printf
-.L1736:
-	b	.L1736
-.L1733:
+.L1845:
+	b	.L1845
+.L1842:
 	cmp	r1, #6
-	bls	.L1730
-	b	.L1735
-.L1732:
+	bls	.L1839
+	b	.L1844
+.L1841:
 	cmp	r4, #6
-	bne	.L1730
+	bne	.L1839
 	adds	r3, r3, #7
-.L1737:
+.L1846:
 	ldrb	r2, [r1, #1]!	@ zero_extendqisi2
 	cmp	r2, #12
-	beq	.L1730
+	beq	.L1839
 	ldrb	r2, [r1, #8]	@ zero_extendqisi2
 	cmp	r2, #4
-	beq	.L1730
+	beq	.L1839
 	cmp	r3, r1
-	bne	.L1737
+	bne	.L1846
 	movs	r1, #0
-	ldr	r0, .L1811+8
+	ldr	r0, .L1920+8
 	bl	printf
-.L1739:
-	b	.L1739
-.L1741:
+.L1848:
+	b	.L1848
+.L1850:
 	ldr	r2, [r7, #2048]
 	strb	r2, [r3], #1
-	b	.L1740
-.L1752:
+	b	.L1849
+.L1861:
 	cmp	r4, #6
-	beq	.L1766
+	beq	.L1875
 	cmp	r4, #7
-	beq	.L1767
+	beq	.L1876
 	cmp	r4, #8
 	ite	ne
 	movne	r0, #8
 	moveq	r0, #5
-.L1754:
+.L1863:
 	add	r3, r10, #-1
 	ldr	r1, [sp, #40]
 	uxtb	r3, r3
 	movs	r5, #0
 	adds	r3, r3, #1
-.L1755:
+.L1864:
 	mov	lr, r1
 	mov	r2, ip
-.L1756:
+.L1865:
 	ldrb	r6, [r2], #1	@ zero_extendqisi2
 	strb	r6, [lr], #1
 	sub	r6, r2, ip
 	uxtb	r6, r6
 	cmp	r10, r6
-	bhi	.L1756
+	bhi	.L1865
 	adds	r5, r5, #1
 	add	ip, ip, r3
 	cmp	r8, r5
 	add	r1, r1, r0
-	bgt	.L1755
+	bgt	.L1864
 	ldm	sp, {r2, r3}
 	movs	r6, #255
 	add	r5, r3, r2, lsl #8
@@ -11500,7 +12260,7 @@ hynix_get_read_retry_default:
 	bl	nandc_wait_flash_ready
 	ldr	r3, [sp, #28]
 	cmp	r3, #1
-	bhi	.L1758
+	bhi	.L1867
 	movs	r3, #54
 	movs	r2, #22
 	str	r3, [r5, #2056]
@@ -11516,30 +12276,30 @@ hynix_get_read_retry_default:
 	str	r6, [r7, #2052]
 	str	r6, [r7, #2052]
 	str	r6, [r7, #2052]
-.L1807:
+.L1916:
 	str	r3, [r5, #2056]
 	bl	nandc_wait_flash_ready
 	ldr	r3, [sp, #20]
 	adds	r3, r3, #1
-	b	.L1808
-.L1766:
+	b	.L1917
+.L1875:
 	movs	r0, #4
-	b	.L1754
-.L1767:
+	b	.L1863
+.L1876:
 	movs	r0, #10
-	b	.L1754
-.L1758:
+	b	.L1863
+.L1867:
 	cmp	r4, #8
 	ite	eq
 	moveq	r3, #190
 	movne	r3, #56
-	b	.L1807
-.L1812:
+	b	.L1916
+.L1921:
 	.align	2
-.L1811:
-	.word	.LANCHOR159
-	.word	.LC101
-	.word	.LC100
+.L1920:
+	.word	.LANCHOR166
+	.word	.LC106
+	.word	.LC105
 	.size	hynix_get_read_retry_default, .-hynix_get_read_retry_default
 	.section	.text.flash_get_read_retry_tbl,"ax",%progbits
 	.align	1
@@ -11553,18 +12313,18 @@ flash_get_read_retry_tbl:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L1815
+	ldr	r3, .L1924
 	ldrb	r0, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r0, #1
 	cmp	r3, #7
-	bhi	.L1813
+	bhi	.L1922
 	b	hynix_get_read_retry_default
-.L1813:
+.L1922:
 	bx	lr
-.L1816:
+.L1925:
 	.align	2
-.L1815:
-	.word	.LANCHOR32
+.L1924:
+	.word	.LANCHOR33
 	.size	flash_get_read_retry_tbl, .-flash_get_read_retry_tbl
 	.section	.text.nandc_xfer_done,"ax",%progbits
 	.align	1
@@ -11577,34 +12337,35 @@ flash_get_read_retry_tbl:
 nandc_xfer_done:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1855
-	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
-	movs	r4, #0
-	ldr	r7, .L1855+4
+	ldr	r3, .L1961
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	movs	r1, #0
+	ldr	r4, .L1961+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	ldr	r5, .L1855+8
-	strb	r4, [r7]
+	ldr	r5, .L1961+8
+	strb	r1, [r4]
 	cmp	r3, #9
 	ldr	r6, [r5]
-	bne	.L1818
+	bne	.L1927
 	ldr	r3, [r6, #16]
 	str	r3, [sp]
 	ldr	r3, [r6, #48]
 	ubfx	r3, r3, #1, #1
-	cbnz	r3, .L1819
-	ldr	r7, .L1855+12
+	cmp	r3, #0
+	bne	.L1932
+	ldr	r7, .L1961+12
 	mov	r4, r3
-	ldr	r8, .L1855+32
-.L1820:
+	ldr	r8, .L1961+32
+.L1929:
 	ldr	r3, [sp]
 	lsls	r0, r3, #11
-	bmi	.L1823
+	bmi	.L1931
 	ldr	r3, [r5]
 	adds	r4, r4, #1
 	ldr	r3, [r3, #16]
 	str	r3, [sp]
 	bics	r3, r4, #-16777216
-	bne	.L1820
+	bne	.L1929
 	ldr	r2, [sp]
 	mov	r1, r4
 	ldr	r3, [r6, #64]
@@ -11616,81 +12377,68 @@ nandc_xfer_done:
 	ldr	r1, [r5]
 	mov	r0, r8
 	bl	rknand_print_hex
-	b	.L1820
-.L1819:
-	ldr	r8, .L1855+24
-	ldr	r10, .L1855+32
-.L1821:
+	b	.L1929
+.L1930:
+	ldr	r3, [sp]
+	adds	r1, r1, #1
+	ubfx	r3, r3, #22, #6
+	cmp	r1, r3, lsl #12
+	bne	.L1932
 	ldr	r2, [r6, #64]
 	ldr	r3, [sp]
-	ubfx	r2, r2, #16, #6
+	ldr	r0, .L1961+16
+	ubfx	r2, r2, #16, #5
+	ubfx	r3, r3, #22, #6
+	bl	printf
+	ldr	r3, [sp, #4]
+	movs	r3, #1
+	strb	r3, [r4]
+.L1931:
+	ldr	r3, .L1961+20
+	movs	r2, #0
+	str	r2, [r3, #20]
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1932:
+	ldr	r2, [r6, #64]
+	ldr	r3, [sp]
+	ubfx	r2, r2, #16, #6
 	ubfx	r3, r3, #22, #6
 	cmp	r2, r3
-	bge	.L1823
-	ldr	r3, [r5]
-	ldr	r3, [r3]
+	bge	.L1931
+	ldr	r3, [r6]
 	str	r3, [sp, #4]
 	ldr	r3, [sp, #4]
-	lsls	r1, r3, #18
-	bpl	.L1822
+	lsls	r7, r3, #18
+	bpl	.L1930
 	ldr	r3, [sp, #4]
-	lsls	r2, r3, #14
-	bpl	.L1822
+	lsls	r5, r3, #14
+	bpl	.L1930
 	ldr	r1, [sp, #4]
-	ldr	r0, .L1855+16
+	ldr	r0, .L1961+24
 	ubfx	r1, r1, #17, #1
-.L1854:
-	bl	printf
-	b	.L1823
-.L1822:
-	ldr	r3, [sp]
-	adds	r4, r4, #1
-	ubfx	r3, r3, #22, #6
-	cmp	r4, r3, lsl #12
-	bne	.L1821
-	ldr	r2, [r6, #64]
-	mov	r1, r4
-	ldr	r3, [sp]
-	mov	r0, r8
-	ubfx	r2, r2, #16, #5
-	ubfx	r3, r3, #22, #6
+.L1960:
 	bl	printf
-	movs	r3, #64
-	movs	r2, #4
-	ldr	r1, [r5]
-	mov	r0, r10
-	bl	rknand_print_hex
-	ldr	r3, [sp, #4]
-	lsls	r3, r3, #18
-	bpl	.L1821
-	movs	r3, #1
-	strb	r3, [r7]
-.L1823:
-	ldr	r3, .L1855+20
-	movs	r2, #0
-	str	r2, [r3, #20]
-	add	sp, sp, #12
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L1818:
+	b	.L1931
+.L1927:
 	ldr	r3, [r6, #8]
 	str	r3, [sp]
-	ldr	r3, [r6, #16]
-	ubfx	r3, r3, #1, #1
-	cbnz	r3, .L1829
-	ldr	r7, .L1855+12
-	mov	r4, r3
-	ldr	r8, .L1855+32
-.L1830:
+	ldr	r4, [r6, #16]
+	ubfx	r4, r4, #1, #1
+	cbnz	r4, .L1937
+	ldr	r7, .L1961+12
+	ldr	r8, .L1961+32
+.L1938:
 	ldr	r3, [sp]
 	lsls	r3, r3, #11
-	bmi	.L1823
+	bmi	.L1931
 	ldr	r3, [r5]
 	adds	r4, r4, #1
 	ldr	r3, [r3, #8]
 	str	r3, [sp]
 	bics	r3, r4, #-16777216
-	bne	.L1830
+	bne	.L1938
 	ldr	r2, [sp]
 	mov	r1, r4
 	ldr	r3, [r6, #28]
@@ -11702,33 +12450,34 @@ nandc_xfer_done:
 	ldr	r1, [r5]
 	mov	r0, r8
 	bl	rknand_print_hex
-	b	.L1830
-.L1829:
-	ldr	r7, .L1855+24
-	ldr	r8, .L1855+32
-.L1831:
+	b	.L1938
+.L1937:
+	ldr	r7, .L1961+16
+	mov	r4, r1
+	ldr	r8, .L1961+32
+.L1939:
 	ldr	r2, [r6, #28]
 	ldr	r3, [sp]
 	ubfx	r2, r2, #16, #5
 	ubfx	r3, r3, #22, #6
 	cmp	r2, r3
-	bge	.L1823
+	bge	.L1931
 	ldr	r3, [r5]
 	ldr	r3, [r3]
 	str	r3, [sp, #4]
 	ldr	r3, [sp, #4]
 	lsls	r1, r3, #18
-	bpl	.L1832
+	bpl	.L1940
 	ldr	r3, [sp, #4]
 	lsls	r2, r3, #14
-	bpl	.L1832
+	bpl	.L1940
 	ldr	r1, [sp, #4]
-	ldr	r0, .L1855+28
-	b	.L1854
-.L1832:
+	ldr	r0, .L1961+28
+	b	.L1960
+.L1940:
 	adds	r4, r4, #1
 	bics	r3, r4, #-16777216
-	bne	.L1831
+	bne	.L1939
 	ldr	r2, [r6, #28]
 	mov	r1, r4
 	ldr	r3, [sp]
@@ -11741,19 +12490,19 @@ nandc_xfer_done:
 	ldr	r1, [r5]
 	mov	r0, r8
 	bl	rknand_print_hex
-	b	.L1831
-.L1856:
+	b	.L1939
+.L1962:
 	.align	2
-.L1855:
+.L1961:
 	.word	.LANCHOR28
-	.word	.LANCHOR160
+	.word	.LANCHOR167
 	.word	.LANCHOR13
-	.word	.LC105
-	.word	.LC102
-	.word	.LANCHOR49
-	.word	.LC103
-	.word	.LC106
-	.word	.LC104
+	.word	.LC109
+	.word	.LC108
+	.word	.LANCHOR53
+	.word	.LC107
+	.word	.LC111
+	.word	.LC110
 	.size	nandc_xfer_done, .-nandc_xfer_done
 	.section	.text.nandc_xfer,"ax",%progbits
 	.align	1
@@ -11767,84 +12516,85 @@ nandc_xfer:
 	@ args = 4, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	mov	r8, r1
+	mov	r4, r1
 	ldr	r5, [sp, #32]
-	mov	r4, r2
+	mov	r7, r2
 	mov	r6, r3
-	mov	r1, r4
+	mov	r0, r4
 	mov	r2, r6
-	mov	r0, r8
+	mov	r1, r7
 	mov	r3, r5
 	bl	nandc_xfer_start
+	mov	r0, r4
 	bl	nandc_xfer_done
-	cmp	r8, #0
-	bne	.L1876
-	ldr	r3, .L1895
+	cmp	r4, #0
+	bne	.L1982
+	ldr	r3, .L2001
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #9
-	bne	.L1859
-	ldr	r7, .L1895+4
-	lsr	ip, r4, #2
+	bne	.L1965
+	ldr	r3, .L2001+4
+	lsrs	r7, r7, #2
 	movs	r2, #1
-	mov	r1, r8
-	mov	r0, r8
-	ldr	r4, [r7]
-.L1860:
-	cmp	r1, ip
-	bcc	.L1864
-	ldr	r4, [r4]
+	mov	r0, r4
+	ldr	r1, [r3]
+	mov	r8, r3
+.L1966:
+	cmp	r4, r7
+	bcc	.L1970
+	ldr	r4, [r1]
 	cmp	r2, #0
 	it	ne
 	movne	r0, #512
 	and	r3, r4, #139264
 	cmp	r3, #139264
-	bne	.L1866
+	bne	.L1972
 	mov	r1, r4
-	ldr	r0, .L1895+8
+	ldr	r0, .L2001+8
 	bl	printf
-	ldr	r3, [r7]
+	ldr	r3, [r8]
 	mov	r0, #-1
 	orr	r4, r4, #131072
 	str	r4, [r3]
-.L1866:
+.L1972:
 	lsls	r2, r4, #18
-	bpl	.L1867
-	ldr	r3, .L1895+12
+	bpl	.L1973
+	ldr	r3, .L2001+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1867
+	beq	.L1973
 	mov	r1, r4
-	ldr	r0, .L1895+16
+	ldr	r0, .L2001+16
 	bl	printf
-	ldr	r3, [r7]
+	ldr	r3, [r8]
 	movs	r2, #1
 	str	r2, [r3, #16]
-.L1894:
+.L2000:
 	mov	r0, #-1
-.L1858:
+.L1964:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1864:
-	add	r3, r1, #84
-	ldr	r3, [r4, r3, lsl #2]
+.L1970:
+	add	r3, r4, #84
+	ldr	r3, [r1, r3, lsl #2]
 	str	r3, [sp, #4]
-	ldr	lr, [sp, #4]
+	ldr	ip, [sp, #4]
 	ldr	r3, [sp, #4]
 	ubfx	r3, r3, #26, #1
-	and	r3, r3, lr, lsr #10
+	and	r3, r3, ip, lsr #10
 	ands	r2, r2, r3
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #29
-	bmi	.L1878
+	bmi	.L1984
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #13
-	bmi	.L1878
+	bmi	.L1984
 	ldr	r3, [sp, #4]
-	ubfx	lr, r3, #3, #7
+	ubfx	ip, r3, #3, #7
 	ldr	r3, [sp, #4]
 	ubfx	r3, r3, #19, #7
-	cmp	lr, r3
+	cmp	ip, r3
 	ldr	r3, [sp, #4]
 	ite	gt
 	ubfxgt	r3, r3, #3, #7
@@ -11852,74 +12602,73 @@ nandc_xfer:
 	cmp	r0, r3
 	it	cc
 	movcc	r0, r3
-.L1861:
-	adds	r1, r1, #1
-	b	.L1860
-.L1878:
+.L1967:
+	adds	r4, r4, #1
+	b	.L1966
+.L1984:
 	mov	r0, #-1
-	b	.L1861
-.L1859:
-	ldr	r3, .L1895+20
-	mov	r1, r8
-	mov	r0, r8
-	ldr	r8, .L1895+28
-	lsrs	r7, r4, #1
+	b	.L1967
+.L1965:
+	ldr	r3, .L2001+20
+	lsrs	r0, r7, #1
+	ldr	r8, .L2001+28
+	mov	r1, r4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #25
 	mov	r3, r5
 	ite	cc
 	movcc	lr, #64
 	movcs	lr, #128
-.L1869:
-	cmp	r0, r7
-	add	ip, lr, r1
+.L1975:
+	cmp	r1, r0
+	add	ip, lr, r4
 	add	r3, r3, #4
-	bcc	.L1870
-	ldr	r7, .L1895+4
+	bcc	.L1976
+	lsrs	r4, r7, #2
+	ldr	r7, .L2001+4
 	movs	r2, #0
-	lsrs	r4, r4, #2
 	mov	r0, r2
 	ldr	r1, [r7]
-.L1871:
+.L1977:
 	cmp	r2, r4
-	bcc	.L1875
+	bcc	.L1981
 	movs	r3, #0
 	str	r3, [r1, #16]
 	ldr	r4, [r1]
 	and	r3, r4, #139264
 	cmp	r3, #139264
-	bne	.L1867
+	bne	.L1973
 	mov	r1, r4
-	ldr	r0, .L1895+24
+	ldr	r0, .L2001+24
 	bl	printf
 	ldr	r3, [r7]
 	orr	r4, r4, #131072
 	str	r4, [r3]
-	b	.L1894
-.L1870:
+	b	.L2000
+.L1976:
 	ldr	r2, [r8]
-	bic	r1, r1, #3
-	adds	r0, r0, #1
-	ldr	r2, [r2, r1]
+	bic	r4, r4, #3
+	adds	r1, r1, #1
+	ldr	r2, [r2, r4]
 	strb	r2, [r3, #-4]
-	lsrs	r1, r2, #8
-	strb	r1, [r3, #-3]
-	lsrs	r1, r2, #16
+	lsrs	r4, r2, #8
+	strb	r4, [r3, #-3]
+	lsrs	r4, r2, #16
 	lsrs	r2, r2, #24
-	strb	r1, [r3, #-2]
-	mov	r1, ip
+	strb	r4, [r3, #-2]
+	mov	r4, ip
 	strb	r2, [r3, #-1]
-	b	.L1869
-.L1875:
+	b	.L1975
+.L1981:
 	add	r3, r2, #8
 	ldr	r3, [r1, r3, lsl #2]
 	str	r3, [sp, #4]
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #29
-	bmi	.L1881
+	bmi	.L1987
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #16
-	bmi	.L1881
+	bmi	.L1987
 	ldr	r3, [sp, #4]
 	ubfx	ip, r3, #3, #5
 	ldr	r3, [sp, #4]
@@ -11944,40 +12693,40 @@ nandc_xfer:
 	cmp	r0, r3
 	it	cc
 	movcc	r0, r3
-.L1872:
+.L1978:
 	adds	r2, r2, #1
-	b	.L1871
-.L1881:
+	b	.L1977
+.L1987:
 	mov	r0, #-1
-	b	.L1872
-.L1867:
+	b	.L1978
+.L1973:
 	adds	r3, r0, #1
-	beq	.L1858
+	beq	.L1964
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	bne	.L1858
+	bne	.L1964
 	ldr	r3, [r5, #4]
 	adds	r3, r3, #1
-	bne	.L1858
+	bne	.L1964
 	ldr	r3, [r6]
 	adds	r3, r3, #1
 	it	eq
 	moveq	r0, #512
-	b	.L1858
-.L1876:
+	b	.L1964
+.L1982:
 	movs	r0, #0
-	b	.L1858
-.L1896:
+	b	.L1964
+.L2002:
 	.align	2
-.L1895:
+.L2001:
 	.word	.LANCHOR28
 	.word	.LANCHOR13
-	.word	.LC107
-	.word	.LANCHOR160
-	.word	.LC108
-	.word	.LANCHOR46
-	.word	.LC109
-	.word	.LANCHOR49
+	.word	.LC112
+	.word	.LANCHOR167
+	.word	.LC113
+	.word	.LANCHOR50
+	.word	.LC114
+	.word	.LANCHOR53
 	.size	nandc_xfer, .-nandc_xfer
 	.section	.text.flash_read_page,"ax",%progbits
 	.align	1
@@ -11991,111 +12740,125 @@ flash_read_page:
 	@ args = 4, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r7, r3
+	ldr	r3, .L2018
 	mov	r5, r0
-	str	r3, [sp, #12]
-	ubfx	r7, r1, #24, #2
-	ldr	r3, .L1911
-	str	r2, [sp, #8]
-	ldr	r6, [r3]
-	ldr	r3, .L1911+4
+	ubfx	r10, r1, #24, #2
+	lsl	fp, r5, #8
+	str	r2, [sp, #12]
+	ldr	r8, [r3]
+	ldr	r3, .L2018+4
+	ldr	r6, .L2018+8
 	ldrb	r4, [r3]	@ zero_extendqisi2
 	rsb	r3, r4, #24
 	movs	r4, #1
 	lsls	r4, r4, r3
-	ldr	r3, .L1911+8
 	subs	r4, r4, #1
-	ldr	r3, [r3]
 	ands	r4, r4, r1
-	lsls	r3, r3, #27
-	bpl	.L1898
-	mov	r3, r1
-	mov	r2, r7
-	mov	r1, r0
-	ldr	r0, .L1911+12
-	bl	printf
-.L1898:
 	bl	nandc_wait_flash_ready
 	mov	r0, r5
-	ldr	r10, .L1911+20
 	bl	nandc_cs
-	lsl	r8, r5, #8
-	cmp	r7, #0
-	bne	.L1899
+	cmp	r10, #0
+	bne	.L2004
 	mov	r0, r5
 	bl	zftl_flash_enter_slc_mode
-.L1900:
-	add	fp, r6, r8
-	movs	r2, #0
-	str	r2, [fp, #2056]
-	str	r2, [fp, #2052]
-	str	r2, [fp, #2052]
-	uxtb	r2, r4
-	str	r2, [fp, #2052]
-	lsrs	r2, r4, #8
-	str	r2, [fp, #2052]
-	lsrs	r2, r4, #16
-	str	r2, [fp, #2052]
-	movs	r2, #48
-	str	r2, [fp, #2056]
-	ldr	r2, [r10]
-	ldrb	r2, [r2, #12]	@ zero_extendqisi2
-	cmp	r2, #3
-	bne	.L1902
-	cbz	r7, .L1902
-	ldr	r2, .L1911+16
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbnz	r2, .L1902
+.L2005:
+	ldr	r3, [r6]
+	ldrb	r2, [r3, #7]	@ zero_extendqisi2
+	cmp	r2, #1
+	bne	.L2007
+	ldrb	r2, [r3, #12]	@ zero_extendqisi2
+	cmp	r2, #2
+	ittt	eq
+	addeq	r2, r8, fp
+	moveq	r1, #38
+	streq	r1, [r2, #2056]
+.L2007:
+	add	r6, r8, fp
+	movs	r1, #0
+	str	r1, [r6, #2056]
+	str	r1, [r6, #2052]
+	str	r1, [r6, #2052]
+	uxtb	r1, r4
+	str	r1, [r6, #2052]
+	lsrs	r1, r4, #8
+	str	r1, [r6, #2052]
+	lsrs	r1, r4, #16
+	str	r1, [r6, #2052]
+	ldr	r1, .L2018+12
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	cbz	r1, .L2008
+	lsrs	r1, r4, #24
+	str	r1, [r6, #2052]
+.L2008:
+	add	r1, r8, fp
+	movs	r0, #48
+	str	r0, [r1, #2056]
+	ldrb	r3, [r3, #12]	@ zero_extendqisi2
+	cmp	r3, #3
+	bne	.L2009
+	cmp	r10, #0
+	beq	.L2009
+	ldr	r3, .L2018+16
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L2009
+	ldr	r3, .L2018+20
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L2009
 	add	r4, r4, r4, lsl #1
 	subs	r0, r4, #1
-	add	r0, r0, r7
-.L1910:
+	add	r0, r0, r10
+.L2017:
 	bl	nandc_set_seed
 	bl	nandc_wait_flash_ready
-	add	r6, r6, r8
+	add	r3, r8, fp
+	movs	r1, #5
+	str	r1, [r3, #2056]
+	movs	r2, #224
 	movs	r1, #0
-	movs	r2, #5
-	movs	r3, #224
-	str	r2, [r6, #2056]
 	mov	r0, r5
-	str	r1, [fp, #2052]
-	str	r1, [fp, #2052]
-	str	r3, [r6, #2056]
+	str	r1, [r6, #2052]
+	str	r1, [r6, #2052]
+	str	r2, [r3, #2056]
 	ldr	r3, [sp, #12]
 	ldrb	r2, [sp, #48]	@ zero_extendqisi2
-	str	r3, [sp]
-	ldr	r3, [sp, #8]
+	str	r7, [sp]
 	bl	nandc_xfer
-	bl	nandc_de_cs.constprop.30
+	bl	nandc_de_cs.constprop.33
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1899:
-	ldr	r3, [r10]
-	ldrb	r3, [r3, #12]	@ zero_extendqisi2
-	cmp	r3, #3
-	bne	.L1901
-	ldr	r3, .L1911+16
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L1901
-	add	r3, r6, r8
-	str	r7, [r3, #2056]
-	b	.L1900
-.L1901:
+.L2004:
+	ldr	r2, [r6]
+	ldrb	r2, [r2, #12]	@ zero_extendqisi2
+	cmp	r2, #3
+	bne	.L2006
+	ldr	r2, .L2018+16
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbnz	r2, .L2006
+	ldr	r2, .L2018+20
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbnz	r2, .L2006
+	add	r2, r8, fp
+	str	r10, [r2, #2056]
+	b	.L2005
+.L2006:
 	mov	r0, r5
 	bl	zftl_flash_exit_slc_mode
-	b	.L1900
-.L1902:
+	b	.L2005
+.L2009:
 	mov	r0, r4
-	b	.L1910
-.L1912:
+	b	.L2017
+.L2019:
 	.align	2
-.L1911:
+.L2018:
 	.word	.LANCHOR13
-	.word	.LANCHOR31
-	.word	.LANCHOR14
-	.word	.LC110
-	.word	.LANCHOR35
+	.word	.LANCHOR32
 	.word	.LANCHOR16
+	.word	.LANCHOR31
+	.word	.LANCHOR36
+	.word	.LANCHOR37
 	.size	flash_read_page, .-flash_read_page
 	.section	.text.micron_read_retrial,"ax",%progbits
 	.align	1
@@ -12111,42 +12874,46 @@ micron_read_retrial:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #24
 	str	r3, [sp, #20]
-	mov	r7, r0
+	mov	r6, r0
 	mov	fp, r1
 	mov	r10, #0
-	ldr	r3, .L1937
+	ldr	r3, .L2044
 	str	r2, [sp, #16]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	str	r3, [sp, #8]
 	bl	nandc_wait_flash_ready
-	ldr	r3, .L1937+4
+	mov	r0, r6
+	bl	zftl_flash_enter_slc_mode
+	mov	r0, r6
+	bl	zftl_flash_exit_slc_mode
+	ldr	r3, .L2044+4
 	ldr	r5, [r3]
-	add	r5, r5, r7, lsl #8
-.L1914:
+	add	r5, r5, r6, lsl #8
+.L2021:
 	mov	r8, #0
 	mov	r4, #-1
-.L1915:
-	ldr	r3, .L1937+8
+.L2022:
+	ldr	r3, .L2044+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r8, r3
-	bcc	.L1920
-.L1919:
+	bcc	.L2027
+.L2026:
 	movs	r3, #239
 	movs	r0, #200
 	str	r3, [r5, #2056]
 	movs	r3, #137
 	str	r3, [r5, #2052]
-	movs	r6, #0
+	movs	r7, #0
 	bl	timer_delay_ns
 	ldr	r3, [sp, #8]
-	str	r6, [r5, #2048]
-	str	r6, [r5, #2048]
+	str	r7, [r5, #2048]
+	str	r7, [r5, #2048]
 	cmp	r4, r3
-	str	r6, [r5, #2048]
-	str	r6, [r5, #2048]
-	bcc	.L1921
+	str	r7, [r5, #2048]
+	str	r7, [r5, #2048]
+	bcc	.L2028
 	adds	r1, r4, #1
 	mov	r3, r8
 	it	ne
@@ -12154,18 +12921,18 @@ micron_read_retrial:
 	mov	r2, fp
 	str	r4, [sp]
 	mov	r1, r8
-	ldr	r0, .L1937+12
+	ldr	r0, .L2044+12
 	bl	printf
 	cmp	r10, #0
-	bne	.L1923
+	bne	.L2030
 	adds	r2, r4, #1
-	bne	.L1924
+	bne	.L2031
 	movs	r1, #3
-	mov	r0, r7
+	mov	r0, r6
 	bl	mt_auto_read_calibration_config
 	mov	r10, #1
-	b	.L1914
-.L1920:
+	b	.L2021
+.L2027:
 	movs	r3, #239
 	movs	r0, #200
 	str	r3, [r5, #2056]
@@ -12179,77 +12946,77 @@ micron_read_retrial:
 	str	r3, [sp, #12]
 	movs	r3, #0
 	str	r3, [r5, #2048]
-	mov	r0, r7
+	mov	r0, r6
 	str	r3, [r5, #2048]
 	str	r3, [r5, #2048]
 	ldr	r3, [sp, #56]
 	str	r3, [sp]
 	ldr	r3, [sp, #20]
 	bl	flash_read_page
-	ldr	r3, .L1937+16
-	mov	r6, r0
+	ldr	r3, .L2044+16
+	mov	r7, r0
 	ldr	r3, [r3]
 	lsls	r3, r3, #19
-	bpl	.L1916
+	bpl	.L2023
 	str	r0, [sp]
 	mov	r3, r4
 	mov	r2, fp
 	mov	r1, r8
-	ldr	r0, .L1937+20
+	ldr	r0, .L2044+20
 	bl	printf
-.L1916:
-	adds	r0, r6, #1
-	beq	.L1917
-	ldr	r3, .L1937+24
+.L2023:
+	adds	r0, r7, #1
+	beq	.L2024
+	ldr	r3, .L2044+24
 	cmp	r4, #-1
 	it	eq
-	moveq	r4, r6
+	moveq	r4, r7
 	ldr	r3, [r3]
 	str	r3, [sp, #16]
-	ldr	r3, .L1937+28
+	ldr	r3, .L2044+28
 	ldr	r3, [r3]
 	str	r3, [sp, #20]
 	ldr	r3, [sp, #8]
-	cmp	r6, r3
-	bcc	.L1926
-.L1917:
+	cmp	r7, r3
+	bcc	.L2033
+.L2024:
 	ldr	r8, [sp, #12]
-	b	.L1915
-.L1926:
-	mov	r4, r6
-	b	.L1919
-.L1923:
-	mov	r1, r6
-	mov	r0, r7
+	b	.L2022
+.L2033:
+	mov	r4, r7
+	b	.L2026
+.L2030:
+	mov	r1, r7
+	mov	r0, r6
 	bl	mt_auto_read_calibration_config
 	adds	r3, r4, #1
 	it	ne
 	movne	r4, #256
-.L1924:
+.L2031:
 	bl	nandc_wait_flash_ready
 	mov	r0, r4
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1921:
+.L2028:
 	cmp	r10, #0
-	beq	.L1924
-	mov	r1, r6
-	mov	r0, r7
+	beq	.L2031
+	mov	r1, r7
+	mov	r0, r6
 	bl	mt_auto_read_calibration_config
 	mov	r4, #256
-	b	.L1924
-.L1938:
+	b	.L2031
+.L2045:
 	.align	2
-.L1937:
-	.word	.LANCHOR46
+.L2044:
+	.word	.LANCHOR50
 	.word	.LANCHOR13
-	.word	.LANCHOR162
-	.word	.LC112
-	.word	.LANCHOR14
-	.word	.LC111
-	.word	.LANCHOR159
-	.word	.LANCHOR161
+	.word	.LANCHOR169
+	.word	.LC116
+	.word	.LANCHOR14
+	.word	.LC115
+	.word	.LANCHOR166
+	.word	.LANCHOR168
 	.size	micron_read_retrial, .-micron_read_retrial
 	.section	.text.toshiba_3d_read_retrial,"ax",%progbits
 	.align	1
@@ -12271,9 +13038,9 @@ toshiba_3d_read_retrial:
 	str	r3, [sp, #12]
 	add	r6, r7, #8
 	bl	nandc_wait_flash_ready
-	ldr	r3, .L1982
+	ldr	r3, .L2089
 	ldr	fp, [r3]
-	ldr	r3, .L1982+4
+	ldr	r3, .L2089+4
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	add	r6, fp, r6, lsl #8
 	cmp	r2, #36
@@ -12286,15 +13053,15 @@ toshiba_3d_read_retrial:
 	moveq	r2, #26
 	str	r2, [sp, #16]
 	cmp	r4, #0
-	bne	.L1941
+	bne	.L2048
 	mov	r4, #-1
 	movs	r5, #1
 	str	r3, [sp, #20]
-.L1948:
+.L2055:
 	ldr	r3, [sp, #20]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #36
-	bne	.L1942
+	bne	.L2049
 	movs	r2, #0
 	mov	r1, r5
 	mov	r0, r6
@@ -12302,7 +13069,7 @@ toshiba_3d_read_retrial:
 	add	r3, fp, r7, lsl #8
 	movs	r2, #93
 	str	r2, [r3, #2056]
-.L1943:
+.L2050:
 	ldr	r3, [sp, #56]
 	mov	r1, r8
 	ldr	r2, [sp, #8]
@@ -12310,66 +13077,66 @@ toshiba_3d_read_retrial:
 	str	r3, [sp]
 	ldr	r3, [sp, #12]
 	bl	flash_read_page
-	ldr	r3, .L1982+8
+	ldr	r3, .L2089+8
 	mov	r10, r0
 	ldr	r3, [r3]
 	lsls	r1, r3, #27
-	bpl	.L1944
+	bpl	.L2051
 	mov	r3, r0
 	mov	r2, r8
 	mov	r1, r5
-	ldr	r0, .L1982+12
+	ldr	r0, .L2089+12
 	bl	printf
-.L1944:
+.L2051:
 	cmp	r10, #-1
-	beq	.L1945
-	ldr	r3, .L1982+16
+	beq	.L2052
+	ldr	r3, .L2089+16
 	cmp	r4, #-1
 	it	eq
 	moveq	r4, r10
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
-	ldr	r3, .L1982+20
+	ldr	r3, .L2089+20
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L1982+24
+	ldr	r3, .L2089+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r10, r3, asr #2
-	bcc	.L1963
-.L1945:
+	bcc	.L2070
+.L2052:
 	ldr	r3, [sp, #16]
 	adds	r5, r5, #1
 	cmp	r3, r5
-	bne	.L1948
-.L1947:
-	ldr	r3, .L1982+4
+	bne	.L2055
+.L2054:
+	ldr	r3, .L2089+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #36
-	bne	.L1949
+	bne	.L2056
 	movs	r2, #0
-.L1981:
+.L2088:
 	movs	r1, #0
 	mov	r0, r6
 	bl	toshiba_tlc_set_rr_para
-	b	.L1950
-.L1942:
+	b	.L2057
+.L2049:
 	uxtb	r1, r5
 	mov	r0, r6
 	bl	toshiba_3d_set_slc_rr_para
-	b	.L1943
-.L1963:
+	b	.L2050
+.L2070:
 	mov	r4, r10
-	b	.L1947
-.L1949:
+	b	.L2054
+.L2056:
 	movs	r1, #0
 	mov	r0, r6
 	bl	toshiba_3d_set_slc_rr_para
-.L1950:
-	ldr	r3, .L1982+4
+.L2057:
+	ldr	r3, .L2089+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #36
-	bne	.L1959
+	bne	.L2066
 	add	r7, fp, r7, lsl #8
 	movs	r3, #85
 	str	r3, [r7, #2056]
@@ -12378,12 +13145,12 @@ toshiba_3d_read_retrial:
 	str	r3, [r7, #2048]
 	movs	r3, #255
 	str	r3, [r7, #2056]
-.L1959:
-	ldr	r3, .L1982+24
+.L2066:
+	ldr	r3, .L2089+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, asr #2
-	bcc	.L1960
+	bcc	.L2067
 	adds	r3, r4, #1
 	mov	r2, r8
 	it	ne
@@ -12391,30 +13158,30 @@ toshiba_3d_read_retrial:
 	mov	r3, r5
 	str	r4, [sp]
 	mov	r1, r5
-	ldr	r0, .L1982+28
+	ldr	r0, .L2089+28
 	bl	printf
-.L1960:
+.L2067:
 	bl	nandc_wait_flash_ready
 	mov	r0, r4
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1941:
+.L2048:
 	mov	r4, #-1
 	movs	r5, #1
 	str	r3, [sp, #16]
-.L1957:
+.L2064:
 	ldr	r3, [sp, #16]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #36
-	bne	.L1951
+	bne	.L2058
 	movs	r2, #1
 	mov	r1, r5
 	mov	r0, r6
 	bl	toshiba_tlc_set_rr_para
 	add	r3, fp, r7, lsl #8
 	movs	r2, #93
-.L1980:
+.L2087:
 	str	r2, [r3, #2056]
 	mov	r1, r8
 	ldr	r3, [sp, #56]
@@ -12423,72 +13190,72 @@ toshiba_3d_read_retrial:
 	str	r3, [sp]
 	ldr	r3, [sp, #12]
 	bl	flash_read_page
-	ldr	r3, .L1982+8
+	ldr	r3, .L2089+8
 	mov	r10, r0
 	ldr	r3, [r3]
 	lsls	r2, r3, #27
-	bpl	.L1953
+	bpl	.L2060
 	mov	r3, r0
 	mov	r2, r8
 	mov	r1, r5
-	ldr	r0, .L1982+32
+	ldr	r0, .L2089+32
 	bl	printf
-.L1953:
+.L2060:
 	cmp	r10, #-1
-	beq	.L1954
-	ldr	r3, .L1982+16
+	beq	.L2061
+	ldr	r3, .L2089+16
 	cmp	r4, #-1
 	it	eq
 	moveq	r4, r10
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
-	ldr	r3, .L1982+20
+	ldr	r3, .L2089+20
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L1982+24
+	ldr	r3, .L2089+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r10, r3, asr #2
-	bcc	.L1964
-.L1954:
+	bcc	.L2071
+.L2061:
 	ldr	r3, [sp, #20]
 	adds	r5, r5, #1
 	cmp	r3, r5
-	bne	.L1957
-.L1956:
-	ldr	r3, .L1982+4
+	bne	.L2064
+.L2063:
+	ldr	r3, .L2089+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #36
-	bne	.L1958
+	bne	.L2065
 	movs	r2, #1
-	b	.L1981
-.L1951:
+	b	.L2088
+.L2058:
 	uxtb	r1, r5
 	mov	r0, r6
 	bl	toshiba_3d_set_tlc_rr_para
 	add	r3, fp, r7, lsl #8
 	movs	r2, #38
-	b	.L1980
-.L1964:
+	b	.L2087
+.L2071:
 	mov	r4, r10
-	b	.L1956
-.L1958:
+	b	.L2063
+.L2065:
 	movs	r1, #0
 	mov	r0, r6
 	bl	toshiba_3d_set_tlc_rr_para
-	b	.L1950
-.L1983:
+	b	.L2057
+.L2090:
 	.align	2
-.L1982:
+.L2089:
 	.word	.LANCHOR13
 	.word	.LANCHOR23
 	.word	.LANCHOR14
-	.word	.LC113
-	.word	.LANCHOR159
-	.word	.LANCHOR161
-	.word	.LANCHOR46
-	.word	.LC115
-	.word	.LC114
+	.word	.LC117
+	.word	.LANCHOR166
+	.word	.LANCHOR168
+	.word	.LANCHOR50
+	.word	.LC119
+	.word	.LC118
 	.size	toshiba_3d_read_retrial, .-toshiba_3d_read_retrial
 	.section	.text.toshiba_read_retrial,"ax",%progbits
 	.align	1
@@ -12502,62 +13269,66 @@ toshiba_read_retrial:
 	@ args = 4, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r5, r0
 	sub	sp, sp, #24
-	mov	r7, r0
+	add	r10, r5, #8
 	str	r2, [sp, #12]
-	add	r10, r7, #8
 	str	r3, [sp, #16]
 	str	r1, [sp, #8]
 	bl	nandc_wait_flash_ready
-	ldr	r3, .L2011
-	ldr	r2, .L2011+4
-	ldr	r6, [r3]
+	mov	r0, r5
+	bl	zftl_flash_enter_slc_mode
+	mov	r0, r5
+	bl	zftl_flash_exit_slc_mode
+	ldr	r3, .L2118
+	ldr	r2, .L2118+4
+	ldr	r7, [r3]
 	ldrb	r3, [r2]	@ zero_extendqisi2
 	str	r2, [sp, #20]
 	subs	r3, r3, #67
-	add	r10, r6, r10, lsl #8
+	add	r10, r7, r10, lsl #8
 	cmp	r3, #1
-	bls	.L2002
-	ldr	r3, .L2011+8
-	ldrb	r5, [r3]	@ zero_extendqisi2
-	cbz	r5, .L1986
-	movs	r5, #1
+	bls	.L2109
+	ldr	r3, .L2118+8
+	ldrb	r6, [r3]	@ zero_extendqisi2
+	cbz	r6, .L2093
+	movs	r6, #1
 	movs	r0, #1
 	bl	nandc_set_if_mode
-.L1986:
-	add	r3, r6, r7, lsl #8
+.L2093:
+	add	r3, r7, r5, lsl #8
 	movs	r2, #92
 	str	r2, [r3, #2056]
 	movs	r2, #197
 	str	r2, [r3, #2056]
-.L1985:
+.L2092:
 	mov	r8, #1
 	mov	fp, #-1
-.L1987:
-	ldr	r3, .L2011+12
+.L2094:
+	ldr	r3, .L2118+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	cmp	r8, r3
-	bcc	.L1996
+	bcc	.L2103
 	mov	r4, fp
-.L1995:
-	ldr	r3, .L2011+4
+.L2102:
+	ldr	r3, .L2118+4
 	movs	r1, #0
 	mov	r0, r10
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	subs	r3, r3, #67
 	cmp	r3, #1
-	bhi	.L1997
+	bhi	.L2104
 	bl	sandisk_set_rr_para
-.L1998:
-	add	r6, r6, r7, lsl #8
+.L2105:
+	add	r5, r7, r5, lsl #8
 	movs	r3, #255
-	str	r3, [r6, #2056]
-	ldr	r3, .L2011+16
+	str	r3, [r5, #2056]
+	ldr	r3, .L2118+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, asr #2
-	bcc	.L1999
+	bcc	.L2106
 	adds	r3, r4, #1
 	ldr	r2, [sp, #8]
 	it	ne
@@ -12565,284 +13336,632 @@ toshiba_read_retrial:
 	mov	r3, r8
 	str	r4, [sp]
 	mov	r1, r8
-	ldr	r0, .L2011+20
+	ldr	r0, .L2118+20
 	bl	printf
-.L1999:
+.L2106:
 	bl	nandc_wait_flash_ready
-	cbz	r5, .L1984
+	cbz	r6, .L2091
 	movs	r0, #4
 	bl	nandc_set_if_mode
-.L1984:
+.L2091:
 	mov	r0, r4
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2002:
-	movs	r5, #0
-	b	.L1985
-.L1996:
+.L2109:
+	movs	r6, #0
+	b	.L2092
+.L2103:
 	ldr	r3, [sp, #20]
 	mov	r0, r10
 	uxtb	r1, r8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	subs	r3, r3, #67
 	cmp	r3, #1
-	bhi	.L1988
+	bhi	.L2095
 	bl	sandisk_set_rr_para
-.L1989:
-	ldr	r3, .L2011+4
+.L2096:
+	ldr	r3, .L2118+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #34
-	bne	.L1990
-	ldr	r3, .L2011+12
+	bne	.L2097
+	ldr	r3, .L2118+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	subs	r3, r3, #3
 	cmp	r8, r3
 	ittt	eq
-	addeq	r3, r6, r7, lsl #8
+	addeq	r3, r7, r5, lsl #8
 	moveq	r2, #179
 	streq	r2, [r3, #2056]
-.L1990:
-	add	r3, r6, r7, lsl #8
+.L2097:
+	add	r3, r7, r5, lsl #8
 	movs	r2, #38
 	add	r1, sp, #8
 	str	r2, [r3, #2056]
 	movs	r2, #93
 	str	r2, [r3, #2056]
-	mov	r0, r7
+	mov	r0, r5
 	ldr	r3, [sp, #56]
 	str	r3, [sp]
 	ldm	r1, {r1, r2, r3}
 	bl	flash_read_page
 	adds	r2, r0, #1
 	mov	r4, r0
-	beq	.L1993
-	ldr	r3, .L2011+24
+	beq	.L2100
+	ldr	r3, .L2118+24
 	cmp	fp, #-1
 	it	eq
 	moveq	fp, r0
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L2011+28
+	ldr	r3, .L2118+28
 	ldr	r3, [r3]
 	str	r3, [sp, #16]
-	ldr	r3, .L2011+16
+	ldr	r3, .L2118+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r0, r3, asr #2
-	bcc	.L1995
-.L1993:
+	bcc	.L2102
+.L2100:
 	add	r8, r8, #1
-	b	.L1987
-.L1988:
+	b	.L2094
+.L2095:
 	bl	toshiba_set_rr_para
-	b	.L1989
-.L1997:
+	b	.L2096
+.L2104:
 	bl	toshiba_set_rr_para
-	b	.L1998
-.L2012:
+	b	.L2105
+.L2119:
 	.align	2
-.L2011:
+.L2118:
 	.word	.LANCHOR13
 	.word	.LANCHOR23
 	.word	.LANCHOR21
-	.word	.LANCHOR162
-	.word	.LANCHOR46
-	.word	.LC115
-	.word	.LANCHOR159
-	.word	.LANCHOR161
+	.word	.LANCHOR169
+	.word	.LANCHOR50
+	.word	.LC119
+	.word	.LANCHOR166
+	.word	.LANCHOR168
 	.size	toshiba_read_retrial, .-toshiba_read_retrial
-	.section	.text.hynix_read_retrial,"ax",%progbits
+	.section	.text.ymtc_3d_read_retrial,"ax",%progbits
 	.align	1
-	.global	hynix_read_retrial
+	.global	ymtc_3d_read_retrial
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	hynix_read_retrial, %function
-hynix_read_retrial:
-	@ args = 4, pretend = 0, frame = 8
+	.type	ymtc_3d_read_retrial, %function
+ymtc_3d_read_retrial:
+	@ args = 4, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r6, #0
-	str	r3, [sp, #12]
-	mov	r4, #-1
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r7, r0
 	mov	r8, r1
-	ldr	r3, .L2027
-	str	r2, [sp, #8]
-	ldr	r3, [r3]
-	add	r10, r3, r0
-	ldrb	fp, [r3, #114]	@ zero_extendqisi2
-	ldrb	r5, [r10, #120]	@ zero_extendqisi2
+	mov	r10, r2
+	mov	fp, r3
+	mov	r4, #-1
 	bl	nandc_wait_flash_ready
-.L2014:
-	cmp	r6, fp
-	bcc	.L2019
-.L2018:
-	ldr	r3, .L2027+4
-	strb	r5, [r10, #120]
+	mov	r0, r7
+	movs	r5, #1
+	bl	zftl_flash_enter_slc_mode
+	mov	r0, r7
+	bl	zftl_flash_exit_slc_mode
+	ldr	r2, .L2144
+	tst	r8, #50331648
+	add	r3, r7, #8
+	ldr	r6, [r2]
+	add	r6, r6, r3, lsl #8
+	bne	.L2130
+.L2125:
+	uxtb	r1, r5
+	mov	r0, r6
+	bl	ymtc_3d_set_slc_rr_para
+	ldr	r3, [sp, #40]
+	mov	r1, r8
+	mov	r2, r10
+	mov	r0, r7
+	str	r3, [sp]
+	mov	r3, fp
+	bl	flash_read_page
+	adds	r1, r0, #1
+	beq	.L2122
+	ldr	r3, .L2144+4
+	cmp	r4, #-1
+	it	eq
+	moveq	r4, r0
+	ldr	r10, [r3]
+	ldr	r3, .L2144+8
+	ldr	fp, [r3]
+	ldr	r3, .L2144+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r0, r3, asr #2
+	bcc	.L2133
+.L2122:
+	adds	r5, r5, #1
+	cmp	r5, #10
+	bne	.L2125
+.L2124:
+	movs	r1, #0
+	mov	r0, r6
+	bl	ymtc_3d_set_slc_rr_para
+.L2126:
+	ldr	r3, .L2144+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, asr #2
-	bcc	.L2020
+	bcc	.L2131
 	adds	r3, r4, #1
 	mov	r2, r8
 	it	ne
 	movne	r4, #256
-	mov	r3, r6
+	mov	r3, r5
 	str	r4, [sp]
-	mov	r1, r6
-	ldr	r0, .L2027+8
+	mov	r1, r5
+	ldr	r0, .L2144+16
 	bl	printf
-.L2020:
+.L2131:
 	bl	nandc_wait_flash_ready
 	mov	r0, r4
-	add	sp, sp, #16
+	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2019:
-	adds	r5, r5, #1
-	mov	r0, r7
-	uxtb	r5, r5
-	cmp	fp, r5
-	it	ls
-	movls	r5, #0
-	mov	r1, r5
-	bl	hynix_set_rr_para
-	ldr	r3, [sp, #48]
+.L2133:
+	mov	r4, r0
+	b	.L2124
+.L2130:
+	uxtb	r1, r5
+	mov	r0, r6
+	bl	ymtc_3d_set_tlc_rr_para
+	ldr	r3, [sp, #40]
+	mov	r2, r10
 	mov	r1, r8
-	ldr	r2, [sp, #8]
 	mov	r0, r7
 	str	r3, [sp]
-	ldr	r3, [sp, #12]
+	mov	r3, fp
 	bl	flash_read_page
 	adds	r2, r0, #1
-	beq	.L2016
-	ldr	r3, .L2027+12
+	beq	.L2127
+	ldr	r3, .L2144+4
 	cmp	r4, #-1
 	it	eq
 	moveq	r4, r0
-	ldr	r3, [r3]
-	str	r3, [sp, #8]
-	ldr	r3, .L2027+16
-	ldr	r3, [r3]
-	str	r3, [sp, #12]
-	ldr	r3, .L2027+4
+	ldr	r10, [r3]
+	ldr	r3, .L2144+8
+	ldr	fp, [r3]
+	ldr	r3, .L2144+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r0, r3, asr #2
-	bcc	.L2022
-.L2016:
-	adds	r6, r6, #1
-	b	.L2014
-.L2022:
+	bcc	.L2134
+.L2127:
+	adds	r5, r5, #1
+	cmp	r5, #51
+	bne	.L2130
+.L2129:
+	movs	r1, #0
+	mov	r0, r6
+	bl	ymtc_3d_set_tlc_rr_para
+	b	.L2126
+.L2134:
 	mov	r4, r0
-	b	.L2018
-.L2028:
+	b	.L2129
+.L2145:
 	.align	2
-.L2027:
-	.word	.LANCHOR27
-	.word	.LANCHOR46
-	.word	.LC116
-	.word	.LANCHOR159
-	.word	.LANCHOR161
-	.size	hynix_read_retrial, .-hynix_read_retrial
-	.section	.text.flash_ddr_tuning_read,"ax",%progbits
+.L2144:
+	.word	.LANCHOR13
+	.word	.LANCHOR166
+	.word	.LANCHOR168
+	.word	.LANCHOR50
+	.word	.LC120
+	.size	ymtc_3d_read_retrial, .-ymtc_3d_read_retrial
+	.section	.text.samsung_read_retrial,"ax",%progbits
 	.align	1
-	.global	flash_ddr_tuning_read
+	.global	samsung_read_retrial
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_ddr_tuning_read, %function
-flash_ddr_tuning_read:
-	@ args = 4, pretend = 0, frame = 24
+	.type	samsung_read_retrial, %function
+samsung_read_retrial:
+	@ args = 4, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r4, #0
-	sub	sp, sp, #32
-	mov	r5, r4
-	mov	r6, #1024
-	movs	r7, #6
-	str	r3, [sp, #20]
-	mov	r8, r0
-	mov	fp, r1
-	str	r2, [sp, #16]
-	bl	nandc_get_ddr_para
-	mov	r3, #-1
-	str	r0, [sp, #28]
-	str	r4, [sp, #24]
-	str	r4, [sp, #12]
+	mov	r7, r0
+	sub	sp, sp, #24
+	mov	r8, r1
+	str	r3, [sp, #16]
+	str	r2, [sp, #12]
+	bl	nandc_wait_flash_ready
+	mov	r0, r7
+	bl	zftl_flash_enter_slc_mode
+	mov	r0, r7
+	bl	zftl_flash_exit_slc_mode
+	ldr	r3, .L2179
+	tst	r8, #50331648
+	ldr	r3, [r3]
 	str	r3, [sp, #8]
-.L2035:
-	uxtb	r0, r7
-	bl	nandc_set_ddr_para
-	ldr	r3, [sp, #64]
-	mov	r1, fp
-	ldr	r2, [sp, #16]
-	mov	r0, r8
+	bne	.L2147
+	lsl	fp, r7, #8
+	mov	r4, #-1
+	movs	r5, #1
+	add	r6, r3, fp
+.L2152:
+	movs	r3, #239
+	str	r3, [r6, #2056]
+	movs	r3, #141
+	str	r3, [r6, #2052]
+	ldr	r3, .L2179+4
+	ldrsb	r3, [r5, r3]
+	str	r3, [r6, #2048]
+	movs	r3, #0
+	str	r3, [r6, #2048]
+	str	r3, [r6, #2048]
+	str	r3, [r6, #2048]
+	bl	nandc_wait_flash_ready
+	ldr	r3, [sp, #56]
+	mov	r1, r8
+	ldr	r2, [sp, #12]
+	mov	r0, r7
 	str	r3, [sp]
-	ldr	r3, [sp, #20]
+	ldr	r3, [sp, #16]
 	bl	flash_read_page
-	ldr	r3, .L2052
+	ldr	r3, .L2179+8
 	mov	r10, r0
 	ldr	r3, [r3]
-	lsls	r3, r3, #27
-	bpl	.L2030
+	lsls	r1, r3, #27
+	bpl	.L2148
 	mov	r3, r0
-	mov	r2, fp
-	mov	r1, r7
-	ldr	r0, .L2052+4
+	mov	r2, r8
+	mov	r1, r5
+	ldr	r0, .L2179+12
 	bl	printf
-.L2030:
-	adds	r3, r6, #1
-	cmp	r10, r3
-	bhi	.L2031
-	ldr	r3, .L2052+8
+.L2148:
+	cmp	r10, #-1
+	beq	.L2149
+	ldr	r3, .L2179+16
+	cmp	r4, #-1
+	it	eq
+	moveq	r4, r10
 	ldr	r3, [r3]
-	str	r3, [sp, #16]
-	ldr	r3, .L2052+12
+	str	r3, [sp, #12]
+	ldr	r3, .L2179+20
+	ldr	r3, [r3]
+	str	r3, [sp, #16]
+	ldr	r3, .L2179+24
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r10, r3, asr #2
+	bcc	.L2161
+.L2149:
+	adds	r5, r5, #1
+	cmp	r5, #26
+	bne	.L2152
+.L2151:
+	ldr	r3, [sp, #8]
+	add	r3, r3, fp
+	mov	fp, r3
+	movs	r3, #239
+	str	r3, [fp, #2056]
+	movs	r3, #141
+.L2178:
+	str	r3, [r6, #2052]
+	movs	r3, #0
+	str	r3, [r6, #2048]
+	str	r3, [r6, #2048]
+	str	r3, [r6, #2048]
+	str	r3, [r6, #2048]
+	bl	nandc_wait_flash_ready
+	ldr	r3, .L2179+24
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r4, r3, asr #2
+	bcc	.L2159
+	adds	r3, r4, #1
+	mov	r2, r8
+	it	ne
+	movne	r4, #256
+	mov	r3, r5
+	str	r4, [sp]
+	mov	r1, r5
+	ldr	r0, .L2179+28
+	bl	printf
+.L2159:
+	bl	nandc_wait_flash_ready
+	mov	r0, r4
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2161:
+	mov	r4, r10
+	b	.L2151
+.L2147:
+	ldr	r3, [sp, #8]
+	mov	r4, #-1
+	ldr	r10, .L2179+36
+	movs	r5, #1
+	add	r6, r3, r7, lsl #8
+	addw	r3, r6, #2056
+	str	r3, [sp, #20]
+.L2158:
+	ldr	r3, [sp, #20]
+	mov	r2, r3
+	movs	r3, #239
+	str	r3, [r2]
+	movs	r3, #137
+	str	r3, [r6, #2052]
+	ldrb	r3, [r10, #4]	@ zero_extendqisi2
+	str	r3, [r6, #2048]
+	ldrb	r3, [r10, #5]	@ zero_extendqisi2
+	str	r3, [r6, #2048]
+	ldrb	r3, [r10, #6]	@ zero_extendqisi2
+	str	r3, [r6, #2048]
+	ldrb	r3, [r10, #7]	@ zero_extendqisi2
+	str	r3, [r6, #2048]
+	bl	nandc_wait_flash_ready
+	ldr	r3, [sp, #56]
+	mov	r1, r8
+	ldr	r2, [sp, #12]
+	mov	r0, r7
+	str	r3, [sp]
+	ldr	r3, [sp, #16]
+	bl	flash_read_page
+	ldr	r3, .L2179+8
+	mov	fp, r0
+	ldr	r3, [r3]
+	lsls	r2, r3, #27
+	bpl	.L2154
+	mov	r3, r0
+	mov	r2, r8
+	mov	r1, r5
+	ldr	r0, .L2179+32
+	bl	printf
+.L2154:
+	cmp	fp, #-1
+	beq	.L2155
+	ldr	r3, .L2179+16
+	cmp	r4, #-1
+	it	eq
+	moveq	r4, fp
+	ldr	r3, [r3]
+	str	r3, [sp, #12]
+	ldr	r3, .L2179+20
+	ldr	r3, [r3]
+	str	r3, [sp, #16]
+	ldr	r3, .L2179+24
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	fp, r3, asr #2
+	bcc	.L2162
+.L2155:
+	adds	r5, r5, #1
+	add	r10, r10, #4
+	cmp	r5, #26
+	bne	.L2158
+.L2157:
+	ldr	r3, [sp, #8]
+	add	r7, r3, r7, lsl #8
+	movs	r3, #239
+	str	r3, [r7, #2056]
+	movs	r3, #137
+	b	.L2178
+.L2162:
+	mov	r4, fp
+	b	.L2157
+.L2180:
+	.align	2
+.L2179:
+	.word	.LANCHOR13
+	.word	.LANCHOR170
+	.word	.LANCHOR14
+	.word	.LC121
+	.word	.LANCHOR166
+	.word	.LANCHOR168
+	.word	.LANCHOR50
+	.word	.LC123
+	.word	.LC122
+	.word	.LANCHOR171
+	.size	samsung_read_retrial, .-samsung_read_retrial
+	.section	.text.hynix_read_retrial,"ax",%progbits
+	.align	1
+	.global	hynix_read_retrial
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	hynix_read_retrial, %function
+hynix_read_retrial:
+	@ args = 4, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r6, r0
+	str	r3, [sp, #12]
+	mov	r8, r1
+	movs	r7, #0
+	mov	r4, #-1
+	ldr	r3, .L2195
+	str	r2, [sp, #8]
+	ldr	r3, [r3]
+	add	r10, r3, r0
+	ldrb	fp, [r3, #114]	@ zero_extendqisi2
+	ldrb	r5, [r10, #120]	@ zero_extendqisi2
+	bl	nandc_wait_flash_ready
+	mov	r0, r6
+	bl	zftl_flash_enter_slc_mode
+	mov	r0, r6
+	bl	zftl_flash_exit_slc_mode
+.L2182:
+	cmp	r7, fp
+	bcc	.L2187
+.L2186:
+	ldr	r3, .L2195+4
+	strb	r5, [r10, #120]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r4, r3, asr #2
+	bcc	.L2188
+	adds	r3, r4, #1
+	mov	r2, r8
+	it	ne
+	movne	r4, #256
+	mov	r3, r7
+	str	r4, [sp]
+	mov	r1, r7
+	ldr	r0, .L2195+8
+	bl	printf
+.L2188:
+	bl	nandc_wait_flash_ready
+	mov	r0, r4
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2187:
+	adds	r5, r5, #1
+	mov	r0, r6
+	uxtb	r5, r5
+	cmp	fp, r5
+	it	ls
+	movls	r5, #0
+	mov	r1, r5
+	bl	hynix_set_rr_para
+	ldr	r3, [sp, #48]
+	mov	r1, r8
+	ldr	r2, [sp, #8]
+	mov	r0, r6
+	str	r3, [sp]
+	ldr	r3, [sp, #12]
+	bl	flash_read_page
+	adds	r2, r0, #1
+	beq	.L2184
+	ldr	r3, .L2195+12
+	cmp	r4, #-1
+	it	eq
+	moveq	r4, r0
+	ldr	r3, [r3]
+	str	r3, [sp, #8]
+	ldr	r3, .L2195+16
+	ldr	r3, [r3]
+	str	r3, [sp, #12]
+	ldr	r3, .L2195+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r0, r3, asr #2
+	bcc	.L2190
+.L2184:
+	adds	r7, r7, #1
+	b	.L2182
+.L2190:
+	mov	r4, r0
+	b	.L2186
+.L2196:
+	.align	2
+.L2195:
+	.word	.LANCHOR27
+	.word	.LANCHOR50
+	.word	.LC124
+	.word	.LANCHOR166
+	.word	.LANCHOR168
+	.size	hynix_read_retrial, .-hynix_read_retrial
+	.section	.text.flash_ddr_tuning_read,"ax",%progbits
+	.align	1
+	.global	flash_ddr_tuning_read
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_ddr_tuning_read, %function
+flash_ddr_tuning_read:
+	@ args = 4, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #0
+	sub	sp, sp, #32
+	mov	r5, r4
+	mov	r6, #1024
+	movs	r7, #6
+	str	r3, [sp, #20]
+	mov	r8, r0
+	mov	fp, r1
+	str	r2, [sp, #16]
+	bl	nandc_get_ddr_para
+	mov	r3, #-1
+	str	r0, [sp, #28]
+	str	r4, [sp, #24]
+	str	r4, [sp, #12]
+	str	r3, [sp, #8]
+.L2203:
+	uxtb	r0, r7
+	bl	nandc_set_ddr_para
+	ldr	r3, [sp, #64]
+	mov	r1, fp
+	ldr	r2, [sp, #16]
+	mov	r0, r8
+	str	r3, [sp]
+	ldr	r3, [sp, #20]
+	bl	flash_read_page
+	ldr	r3, .L2223
+	mov	r10, r0
+	ldr	r3, [r3]
+	lsls	r2, r3, #27
+	bpl	.L2198
+	mov	r3, r0
+	mov	r2, fp
+	mov	r1, r7
+	ldr	r0, .L2223+4
+	bl	printf
+.L2198:
+	adds	r3, r6, #1
+	cmp	r10, r3
+	bhi	.L2199
+	ldr	r3, .L2223+8
+	ldr	r3, [r3]
+	str	r3, [sp, #16]
+	ldr	r3, .L2223+12
 	ldr	r3, [r3]
 	str	r3, [sp, #20]
-	ldr	r3, .L2052+16
+	ldr	r3, .L2223+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r10, r3, lsr #2
-	bcs	.L2041
+	bcs	.L2209
 	adds	r5, r5, #1
 	cmp	r5, #7
-	bls	.L2041
+	bls	.L2209
 	subs	r4, r7, r5
 	mov	r6, r10
 	movs	r3, #0
 	str	r3, [sp, #8]
-.L2033:
+.L2201:
 	ldr	r3, [sp, #24]
 	ldr	r2, [sp, #12]
 	cmp	r5, r2
 	it	cc
 	movcc	r4, r3
-.L2034:
+.L2202:
 	cmp	r4, #0
-	beq	.L2036
-	ldr	r3, .L2052+16
+	beq	.L2204
+	ldr	r3, .L2223+16
 	ldrb	r2, [r3]	@ zero_extendqisi2
-	ldr	r3, .L2052+20
+	ldr	r3, .L2223+20
 	umull	r2, r3, r2, r3
 	ubfx	r3, r3, #1, #8
 	cmp	r3, r6
-	bls	.L2036
+	bls	.L2204
 	mov	r1, r4
-	ldr	r0, .L2052+24
+	ldr	r0, .L2223+24
 	bl	printf
 	uxtb	r0, r4
-.L2051:
+.L2222:
 	bl	nandc_set_ddr_para
 	ldr	r3, [sp, #8]
-	cbz	r3, .L2029
+	cmp	r3, #0
+	beq	.L2197
+	ldr	r4, .L2223+28
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	lsls	r3, r3, #31
+	bpl	.L2197
 	mov	r1, r8
 	mov	r2, fp
-	ldr	r0, .L2052+28
+	ldr	r0, .L2223+32
 	bl	printf
 	mov	r0, r8
 	bl	flash_reset
@@ -12850,7 +13969,7 @@ flash_ddr_tuning_read:
 	bl	flash_set_interface_mode
 	movs	r0, #1
 	bl	nandc_set_if_mode
-	ldr	r3, .L2052+32
+	ldr	r3, .L2223+36
 	movs	r2, #2
 	mov	r0, r8
 	strb	r2, [r3, r8]
@@ -12866,76 +13985,75 @@ flash_ddr_tuning_read:
 	mov	r3, r0
 	mov	r6, r0
 	mov	r1, r8
-	ldr	r0, .L2052+36
+	ldr	r0, .L2223+40
 	bl	printf
-	ldr	r3, .L2052+16
+	ldr	r3, .L2223+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r6, r3
-	bhi	.L2043
-	ldr	r2, .L2052+40
+	bhi	.L2211
+	ldr	r2, .L2223+44
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	cmp	r3, #100
 	str	r3, [r2]
-	bls	.L2039
-	ldr	r3, .L2052+44
+	bls	.L2207
+	ldr	r3, .L2223+48
 	movs	r2, #0
 	strb	r2, [r3]
-.L2029:
+.L2197:
 	mov	r0, r6
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2031:
+.L2199:
 	ldr	r3, [sp, #12]
 	cmp	r5, r3
-	bls	.L2042
+	bls	.L2210
 	cmp	r5, #7
 	sub	r3, r4, r5
 	str	r3, [sp, #24]
-	bhi	.L2034
+	bhi	.L2202
 	str	r5, [sp, #12]
-.L2042:
+.L2210:
 	movs	r5, #0
-	b	.L2032
-.L2041:
+	b	.L2200
+.L2209:
 	mov	r4, r7
 	mov	r6, r10
 	movs	r3, #0
 	str	r3, [sp, #8]
-.L2032:
+.L2200:
 	adds	r7, r7, #2
 	cmp	r7, #50
-	bne	.L2035
-	b	.L2033
-.L2036:
+	bne	.L2203
+	b	.L2201
+.L2204:
 	ldrb	r0, [sp, #28]	@ zero_extendqisi2
-	b	.L2051
-.L2043:
+	b	.L2222
+.L2211:
 	ldr	r6, [sp, #8]
-.L2039:
-	ldr	r4, .L2052+48
+.L2207:
 	ldrb	r0, [r4]	@ zero_extendqisi2
 	bl	flash_set_interface_mode
 	ldrb	r0, [r4]	@ zero_extendqisi2
 	bl	nandc_set_if_mode
-	b	.L2029
-.L2053:
+	b	.L2197
+.L2224:
 	.align	2
-.L2052:
+.L2223:
 	.word	.LANCHOR14
-	.word	.LC117
-	.word	.LANCHOR159
-	.word	.LANCHOR161
-	.word	.LANCHOR46
+	.word	.LC125
+	.word	.LANCHOR166
+	.word	.LANCHOR168
+	.word	.LANCHOR50
 	.word	-1431655765
-	.word	.LC118
-	.word	.LC119
-	.word	.LANCHOR33
-	.word	.LC120
-	.word	.LANCHOR163
+	.word	.LC126
+	.word	.LANCHOR49
+	.word	.LC127
+	.word	.LANCHOR34
+	.word	.LC128
+	.word	.LANCHOR172
 	.word	.LANCHOR21
-	.word	.LANCHOR45
 	.size	flash_ddr_tuning_read, .-flash_ddr_tuning_read
 	.section	.text.flash_read_page_en,"ax",%progbits
 	.align	1
@@ -12950,7 +14068,7 @@ flash_read_page_en:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r8, r3
-	ldr	r3, .L2081
+	ldr	r3, .L2252
 	mov	r7, r2
 	mov	r5, r0
 	mov	r4, r1
@@ -12958,45 +14076,46 @@ flash_read_page_en:
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	mov	fp, r3
 	cmp	r2, r0
-	bhi	.L2055
-	mov	r2, #404
-	ldr	r1, .L2081+4
-	ldr	r0, .L2081+8
+	bhi	.L2226
+	mov	r2, #428
+	ldr	r1, .L2252+4
+	ldr	r0, .L2252+8
 	bl	printf
-.L2055:
-	ldr	r3, .L2081+12
+.L2226:
+	ldr	r3, .L2252+12
 	ldrb	r6, [r3, r5]	@ zero_extendqisi2
 	ldrb	r3, [fp]	@ zero_extendqisi2
-	cmp	r3, r5
-	bcs	.L2056
-	ldr	r3, .L2081+16
-	ldr	r3, [r3]
-	lsls	r0, r3, #25
-	bmi	.L2057
-.L2080:
+	cmp	r5, r3
+	bcc	.L2227
+	ldr	r2, .L2252+16
+	ldr	r2, [r2]
+	lsls	r0, r2, #25
+	bmi	.L2228
+.L2251:
 	mov	r0, #-1
-.L2054:
+.L2225:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2057:
-	mov	r3, r4
+.L2228:
+	str	r3, [sp]
 	mov	r2, r5
+	mov	r3, r4
 	mov	r1, r6
-	ldr	r0, .L2081+20
+	ldr	r0, .L2252+20
 	bl	printf
-	b	.L2080
-.L2056:
+	b	.L2251
+.L2227:
 	tst	r4, #50331648
-	bne	.L2059
-	ldr	r3, .L2081+24
+	bne	.L2230
+	ldr	r3, .L2252+24
 	ldrb	r2, [r3]	@ zero_extendqisi2
-	ldr	r3, .L2081+28
-	cbz	r2, .L2060
+	ldr	r3, .L2252+28
+	cbz	r2, .L2231
 	ldrb	r2, [r3]	@ zero_extendqisi2
-	cbz	r2, .L2059
-.L2060:
-	ldr	r2, .L2081+32
+	cbz	r2, .L2230
+.L2231:
+	ldr	r2, .L2252+32
 	mov	r0, r4
 	str	r3, [sp, #12]
 	ldrh	r5, [r2]
@@ -13008,9 +14127,9 @@ flash_read_page_en:
 	bl	__aeabi_uidivmod
 	ldr	r3, [sp, #12]
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2061
+	cbz	r3, .L2232
 	add	r4, fp, r1, lsl #1
-.L2059:
+.L2230:
 	mov	r1, r4
 	str	r10, [sp]
 	mov	r3, r8
@@ -13018,28 +14137,28 @@ flash_read_page_en:
 	mov	r0, r6
 	bl	flash_read_page
 	adds	r1, r0, #1
-	bne	.L2054
-	ldr	r5, .L2081+36
+	bne	.L2225
+	ldr	r5, .L2252+36
 	ldrb	fp, [r5]	@ zero_extendqisi2
 	cmp	fp, #0
-	bne	.L2062
-.L2065:
-	ldr	r3, .L2081+40
+	bne	.L2233
+.L2236:
+	ldr	r3, .L2252+40
 	ldr	fp, [r3]
 	cmp	fp, #0
-	bne	.L2063
-.L2064:
+	bne	.L2234
+.L2235:
 	ldrb	r3, [r5]	@ zero_extendqisi2
 	mov	r2, r4
 	movs	r1, #0
-	ldr	r0, .L2081+44
+	ldr	r0, .L2252+44
 	str	r3, [sp]
 	mov	r3, #-1
 	bl	printf
-	ldr	r3, .L2081+48
+	ldr	r3, .L2252+48
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L2080
+	beq	.L2251
 	str	r10, [sp, #48]
 	mov	r3, r8
 	mov	r2, r7
@@ -13049,12 +14168,12 @@ flash_read_page_en:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
 	b	flash_ddr_tuning_read
-.L2061:
-	ldr	r3, .L2081+52
+.L2232:
+	ldr	r3, .L2252+52
 	ldrh	r4, [r3, r1, lsl #1]
 	add	r4, r4, fp
-	b	.L2059
-.L2062:
+	b	.L2230
+.L2233:
 	movs	r3, #0
 	mov	r2, r7
 	strb	r3, [r5]
@@ -13065,9 +14184,9 @@ flash_read_page_en:
 	bl	flash_read_page
 	adds	r2, r0, #1
 	strb	fp, [r5]
-	beq	.L2065
-	b	.L2054
-.L2063:
+	beq	.L2236
+	b	.L2225
+.L2234:
 	mov	r3, r8
 	str	r10, [sp]
 	mov	r2, r7
@@ -13075,23 +14194,23 @@ flash_read_page_en:
 	mov	r0, r6
 	blx	fp
 	adds	r3, r0, #1
-	beq	.L2064
-	b	.L2054
-.L2082:
+	beq	.L2235
+	b	.L2225
+.L2253:
 	.align	2
-.L2081:
+.L2252:
 	.word	.LANCHOR18
-	.word	.LANCHOR164
+	.word	.LANCHOR173
 	.word	.LC0
 	.word	.LANCHOR30
 	.word	.LANCHOR14
-	.word	.LC121
+	.word	.LC129
 	.word	.LANCHOR0
 	.word	.LANCHOR1
 	.word	.LANCHOR2
-	.word	.LANCHOR48
-	.word	.LANCHOR165
-	.word	.LC122
+	.word	.LANCHOR52
+	.word	.LANCHOR174
+	.word	.LC130
 	.word	.LANCHOR21
 	.word	.LANCHOR3
 	.size	flash_read_page_en, .-flash_read_page_en
@@ -13108,12 +14227,12 @@ flash_get_last_written_page:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r8, r1
-	ldr	r1, .L2093
+	ldr	r1, .L2264
 	mov	fp, r2
 	mov	r10, r3
 	str	r0, [sp, #12]
 	ldrh	r4, [r1]
-	ldr	r1, .L2093+4
+	ldr	r1, .L2264+4
 	subs	r4, r4, #1
 	ldrh	r6, [r1, #26]
 	sxth	r4, r4
@@ -13123,27 +14242,27 @@ flash_get_last_written_page:
 	adds	r1, r4, r6
 	bl	flash_read_page_en
 	cmp	r0, #512
-	bne	.L2084
+	bne	.L2255
 	movs	r7, #0
-.L2085:
+.L2256:
 	cmp	r7, r4
-	ble	.L2088
-.L2084:
-	ldr	r3, .L2093+8
+	ble	.L2259
+.L2255:
+	ldr	r3, .L2264+8
 	ldr	r3, [r3]
 	lsls	r3, r3, #19
-	bpl	.L2089
+	bpl	.L2260
 	ldr	r3, [r10]
 	mov	r2, r4
 	mov	r1, r8
-	ldr	r0, .L2093+12
+	ldr	r0, .L2264+12
 	bl	printf
-.L2089:
+.L2260:
 	mov	r0, r4
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2088:
+.L2259:
 	adds	r5, r7, r4
 	ldr	r3, [sp, #48]
 	add	r5, r5, r5, lsr #31
@@ -13160,14 +14279,14 @@ flash_get_last_written_page:
 	addne	r5, r5, #1
 	sxtheq	r4, r4
 	sxthne	r7, r5
-	b	.L2085
-.L2094:
+	b	.L2256
+.L2265:
 	.align	2
-.L2093:
-	.word	.LANCHOR142
-	.word	.LANCHOR32
+.L2264:
+	.word	.LANCHOR147
+	.word	.LANCHOR33
 	.word	.LANCHOR14
-	.word	.LC123
+	.word	.LC131
 	.size	flash_get_last_written_page, .-flash_get_last_written_page
 	.section	.text.flash_get_last_written_page_ext,"ax",%progbits
 	.align	1
@@ -13181,8 +14300,8 @@ flash_get_last_written_page_ext:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r4, r5, lr}
-	ldr	r4, .L2096
-	ldr	r5, .L2096+4
+	ldr	r4, .L2267
+	ldr	r5, .L2267+4
 	ldrb	r4, [r4]	@ zero_extendqisi2
 	ldrh	r5, [r5]
 	rsb	r4, r4, #24
@@ -13200,11 +14319,11 @@ flash_get_last_written_page_ext:
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, pc}
-.L2097:
+.L2268:
 	.align	2
-.L2096:
-	.word	.LANCHOR31
-	.word	.LANCHOR68
+.L2267:
+	.word	.LANCHOR32
+	.word	.LANCHOR75
 	.size	flash_get_last_written_page_ext, .-flash_get_last_written_page_ext
 	.section	.text.flash_ddr_para_scan,"ax",%progbits
 	.align	1
@@ -13219,12 +14338,12 @@ flash_ddr_para_scan:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r7, r0
-	ldr	r6, .L2104
+	ldr	r6, .L2275
 	movs	r5, #1
 	mov	r8, r1
-	ldr	r4, .L2104+4
-	ldr	fp, .L2104+8
-	ldr	r10, .L2104+12
+	ldr	r4, .L2275+4
+	ldr	fp, .L2275+8
+	ldr	r10, .L2275+12
 	ldrb	r0, [r6]	@ zero_extendqisi2
 	strb	r5, [r4]
 	bl	flash_set_interface_mode
@@ -13246,1192 +14365,1397 @@ flash_ddr_para_scan:
 	bl	flash_read_page
 	adds	r0, r0, #1
 	mov	r3, r4
-	bne	.L2099
+	bne	.L2270
 	ldrb	r2, [r6]	@ zero_extendqisi2
 	lsls	r2, r2, #31
-	bpl	.L2099
+	bpl	.L2270
 	mov	r0, r5
 	bl	flash_set_interface_mode
 	mov	r0, r5
 	bl	nandc_set_if_mode
 	movs	r3, #0
 	strb	r3, [r4]
-.L2100:
+.L2271:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2099:
+.L2270:
 	movs	r2, #1
 	strb	r2, [r3]
-	b	.L2100
-.L2105:
+	b	.L2271
+.L2276:
 	.align	2
-.L2104:
-	.word	.LANCHOR45
+.L2275:
+	.word	.LANCHOR49
 	.word	.LANCHOR21
-	.word	.LANCHOR166
-	.word	.LANCHOR167
+	.word	.LANCHOR175
+	.word	.LANCHOR176
 	.size	flash_ddr_para_scan, .-flash_ddr_para_scan
-	.section	.text.flash_complete_plane_page_read,"ax",%progbits
+	.section	.text.flash_prog_page,"ax",%progbits
 	.align	1
-	.global	flash_complete_plane_page_read
+	.global	flash_prog_page
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_complete_plane_page_read, %function
-flash_complete_plane_page_read:
-	@ args = 0, pretend = 0, frame = 0
+	.type	flash_prog_page, %function
+flash_prog_page:
+	@ args = 4, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2122
-	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
-	movs	r5, #1
-	ldr	r6, .L2122+4
-	mov	r8, r2
-	mov	r10, r0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r5, r0
+	str	r3, [sp, #12]
 	mov	r7, r1
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	ldrb	r2, [r6]	@ zero_extendqisi2
-	rsb	r4, r3, #24
-	lsls	r5, r5, r3
-	lsr	r3, r0, r4
-	subs	r5, r5, #1
-	ands	r5, r5, r3
-	uxtb	r5, r5
-	cmp	r2, r5
-	bhi	.L2107
-	movw	r2, #909
-	ldr	r1, .L2122+8
-	ldr	r0, .L2122+12
-	bl	printf
-.L2107:
-	ldrb	r3, [r6]	@ zero_extendqisi2
-	cmp	r3, r5
-	bls	.L2115
-	ldr	r3, .L2122+16
-	movs	r0, #1
-	lsl	r4, r0, r4
-	ldrb	r6, [r3, r5]	@ zero_extendqisi2
+	mov	r10, r2
+	ubfx	r8, r1, #24, #2
+	ldr	r3, .L2292
+	ldr	r6, [r3]
+	add	r3, r0, #8
+	add	fp, r6, r3, lsl #8
+	ldr	r3, .L2292+4
+	ldrb	r4, [r3]	@ zero_extendqisi2
+	rsb	r3, r4, #24
+	movs	r4, #1
+	lsls	r4, r4, r3
+	ldr	r3, .L2292+8
 	subs	r4, r4, #1
-	ldr	r3, .L2122+20
-	and	r4, r4, r10
-	ubfx	r10, r10, #24, #2
-	mov	r0, r6
-	ldr	r5, [r3]
+	ldr	r3, [r3]
+	ands	r4, r4, r1
+	lsls	r3, r3, #27
+	bpl	.L2278
+	ldr	r3, [sp, #48]
+	mov	r2, r8
+	ldr	r0, .L2292+12
+	bl	printf
+.L2278:
+	bl	nandc_wait_flash_ready
+	mov	r0, r5
+	bl	hynix_reconfig_rr_para
+	mov	r0, r5
 	bl	nandc_cs
-	cmp	r10, #0
-	bne	.L2109
-	mov	r0, r4
-	bl	slc_phy_page_address_calc
-	mov	r4, r0
-.L2109:
-	ldr	r3, .L2122+24
-	uxtb	ip, r4
-	lsrs	r0, r4, #8
+	mov	r0, r5
+	cmp	r8, #0
+	bne	.L2279
+	bl	zftl_flash_enter_slc_mode
+.L2280:
+	lsl	r8, r5, #8
+	movs	r2, #128
+	add	r3, r6, r8
+	str	r2, [r3, #2056]
+	movs	r2, #0
+	str	r2, [r3, #2052]
+	str	r2, [r3, #2052]
+	uxtb	r2, r4
+	str	r2, [r3, #2052]
+	lsrs	r2, r4, #8
+	str	r2, [r3, #2052]
 	lsrs	r2, r4, #16
-	ldr	lr, .L2122+36
-	ldrb	r3, [r3, #16]	@ zero_extendqisi2
-	cmp	r3, #1
-	lsl	r3, r6, #8
-	bne	.L2110
-	add	r3, r3, r5
-	movs	r1, #6
-.L2121:
-	str	r1, [r3, #2056]
-	movs	r1, #0
-	str	r1, [r3, #2052]
-	str	r1, [r3, #2052]
-	str	ip, [r3, #2052]
-	str	r0, [r3, #2052]
 	str	r2, [r3, #2052]
-.L2119:
-	movs	r2, #224
-	str	r2, [r3, #2056]
-	ldr	r3, [lr]
-	ldrb	r3, [r3, #12]	@ zero_extendqisi2
-	cmp	r3, #3
-	bne	.L2113
-	cmp	r10, #0
-	beq	.L2113
-	ldr	r3, .L2122+28
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L2113
-	add	r4, r4, r4, lsl #1
-	add	r10, r10, #-1
-	add	r0, r4, r10
-.L2120:
+	ldr	r2, .L2292+16
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbz	r2, .L2281
+	lsrs	r2, r4, #24
+	str	r2, [r3, #2052]
+.L2281:
+	mov	r0, r4
+	add	r6, r6, r8
 	bl	nandc_set_seed
-	ldr	r3, .L2122+32
-	movs	r1, #0
-	mov	r0, r6
+	ldr	r3, .L2292+20
+	movs	r1, #1
+	mov	r0, r5
 	ldrb	r2, [r3, #9]	@ zero_extendqisi2
-	mov	r3, r7
-	str	r8, [sp]
+	ldr	r3, [sp, #12]
+	str	r3, [sp]
+	mov	r3, r10
 	bl	nandc_xfer
-	bl	nandc_de_cs.constprop.30
-.L2106:
-	add	sp, sp, #12
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L2110:
-	ldr	r1, [lr]
-	add	r3, r3, r5
-	ldrb	r1, [r1, #12]	@ zero_extendqisi2
-	cmp	r1, #3
-	bne	.L2112
-	movs	r1, #5
-	b	.L2121
-.L2112:
-	movs	r1, #0
-	str	r1, [r3, #2056]
-	str	r1, [r3, #2052]
-	str	r1, [r3, #2052]
-	str	ip, [r3, #2052]
-	str	r0, [r3, #2052]
-	str	r2, [r3, #2052]
-	movs	r2, #5
-	str	r2, [r3, #2056]
-	str	r1, [r3, #2052]
-	str	r1, [r3, #2052]
-	b	.L2119
-.L2113:
-	mov	r0, r4
-	b	.L2120
-.L2115:
+	movs	r3, #16
+	str	r3, [r6, #2056]
+	bl	nandc_wait_flash_ready
+	mov	r0, fp
+	bl	flash_read_status
+	bl	nandc_de_cs.constprop.33
+	ands	r0, r0, #4
+	beq	.L2277
+	mov	r2, r0
+	mov	r1, r7
+	ldr	r0, .L2292+24
+	bl	printf
 	mov	r0, #-1
-	b	.L2106
-.L2123:
+.L2277:
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2279:
+	bl	zftl_flash_exit_slc_mode
+	b	.L2280
+.L2293:
 	.align	2
-.L2122:
-	.word	.LANCHOR31
-	.word	.LANCHOR18
-	.word	.LANCHOR168
-	.word	.LC0
-	.word	.LANCHOR30
+.L2292:
 	.word	.LANCHOR13
-	.word	.LANCHOR20
-	.word	.LANCHOR35
 	.word	.LANCHOR32
-	.word	.LANCHOR16
-	.size	flash_complete_plane_page_read, .-flash_complete_plane_page_read
-	.section	.text.flash_complete_page_read,"ax",%progbits
+	.word	.LANCHOR14
+	.word	.LC132
+	.word	.LANCHOR31
+	.word	.LANCHOR33
+	.word	.LC133
+	.size	flash_prog_page, .-flash_prog_page
+	.section	.text.flash_test_blk,"ax",%progbits
 	.align	1
-	.global	flash_complete_page_read
+	.global	flash_test_blk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_complete_page_read, %function
-flash_complete_page_read:
-	@ args = 0, pretend = 0, frame = 8
+	.type	flash_test_blk, %function
+flash_test_blk:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r7, r0
-	ldr	r3, .L2154
-	mov	r8, r1
-	ubfx	r5, r0, #24, #2
-	str	r2, [sp, #8]
-	ldrb	r6, [r3]	@ zero_extendqisi2
-	movs	r3, #1
-	rsb	r2, r6, #24
-	lsl	r4, r3, r2
-	lsl	r6, r3, r6
-	ldr	r3, .L2154+4
-	lsr	r2, r0, r2
-	subs	r6, r6, #1
-	ands	r6, r6, r2
-	subs	r4, r4, #1
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	uxtb	r6, r6
-	ands	r4, r4, r0
-	cmp	r3, r6
-	bhi	.L2125
-	movw	r2, #1033
-	ldr	r1, .L2154+8
-	ldr	r0, .L2154+12
-	bl	printf
-.L2125:
-	ldr	r3, .L2154+16
-	ldrb	r6, [r3, r6]	@ zero_extendqisi2
-	ldr	r3, .L2154+20
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	movs	r2, #32
+	ldr	r7, .L2304
+	mov	r6, r0
+	mov	r4, r1
+	movs	r1, #165
+	ldr	r5, .L2304+4
+	ldr	r0, [r7]
+	bl	ftl_memset
+	movs	r2, #8
+	movs	r1, #90
+	ldr	r0, [r5]
+	bl	ftl_memset
+	ldr	r3, .L2304+8
 	mov	r0, r6
-	ldr	fp, [r3]
+	ldrh	r3, [r3]
+	muls	r4, r3, r4
+	mov	r1, r4
+	bl	flash_erase_block
+	adds	r0, r0, #1
+	bne	.L2295
+.L2297:
+	mov	r5, #-1
+.L2296:
+	mov	r1, r4
+	mov	r0, r6
+	bl	flash_erase_block
+	mov	r0, r5
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L2295:
+	ldr	r8, .L2304+12
+	mov	r1, r4
+	mov	r0, r6
+	ldrb	r3, [r8, #9]	@ zero_extendqisi2
+	str	r3, [sp]
+	ldr	r2, [r7]
+	ldr	r3, [r5]
+	bl	flash_prog_page
+	adds	r0, r0, #1
+	beq	.L2297
+	ldrb	r3, [r8, #9]	@ zero_extendqisi2
+	mov	r1, r4
+	mov	r0, r6
+	str	r3, [sp]
+	ldr	r2, [r7]
+	ldr	r3, [r5]
+	bl	flash_read_page_en
+	adds	r0, r0, #1
+	beq	.L2297
+	ldr	r3, [r7]
+	ldr	r3, [r3]
+	cmp	r3, #-1515870811
+	bne	.L2297
+	ldr	r3, [r5]
+	ldr	r5, [r3]
+	subs	r5, r5, #1515870810
+	it	ne
+	movne	r5, #-1
+	b	.L2296
+.L2305:
+	.align	2
+.L2304:
+	.word	.LANCHOR166
+	.word	.LANCHOR168
+	.word	.LANCHOR2
+	.word	.LANCHOR33
+	.size	flash_test_blk, .-flash_test_blk
+	.section	.text.id_block_prog_msb_ff_data,"ax",%progbits
+	.align	1
+	.global	id_block_prog_msb_ff_data
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	id_block_prog_msb_ff_data, %function
+id_block_prog_msb_ff_data:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2313
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
+	mov	r6, r0
+	mov	r7, r1
+	mov	r4, r2
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L2306
+	ldr	r5, .L2313+4
+	ldrb	r2, [r5, #19]	@ zero_extendqisi2
+	subs	r3, r2, #5
+	uxtb	r3, r3
+	cmp	r3, #30
+	bhi	.L2308
+	ldr	r2, .L2313+8
+	lsr	r3, r2, r3
+	lsls	r3, r3, #31
+	bmi	.L2310
+.L2306:
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.L2311:
+	ldrh	r2, [r10, r4, lsl #1]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L2306
+	mov	r2, #16384
+	movs	r1, #255
+	ldr	r0, [r8]
+	bl	ftl_memset
+	ldrb	r3, [r5, #9]	@ zero_extendqisi2
+	adds	r1, r4, r7
+	adds	r4, r4, #1
+	mov	r0, r6
+	uxth	r4, r4
+	str	r3, [sp]
+	ldr	r3, [r8]
+	mov	r2, r3
+	bl	flash_prog_page
+.L2312:
+	ldrh	r3, [r5, #10]
+	cmp	r3, r4
+	bhi	.L2311
+	b	.L2306
+.L2308:
+	cmp	r2, #68
+	bne	.L2306
+.L2310:
+	ldr	r10, .L2313+12
+	ldr	r8, .L2313+16
+	b	.L2312
+.L2314:
+	.align	2
+.L2313:
+	.word	.LANCHOR19
+	.word	.LANCHOR33
+	.word	1073758215
+	.word	.LANCHOR145
+	.word	.LANCHOR166
+	.size	id_block_prog_msb_ff_data, .-id_block_prog_msb_ff_data
+	.section	.text.flash_start_one_pass_page_prog,"ax",%progbits
+	.align	1
+	.global	flash_start_one_pass_page_prog
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_start_one_pass_page_prog, %function
+flash_start_one_pass_page_prog:
+	@ args = 12, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
+	mov	r7, r3
+	ldr	r3, .L2324
+	mov	r10, r0
+	mov	r0, r7
+	mov	r8, r2
+	ldr	r5, [sp, #40]
+	lsls	r6, r7, #8
+	ldr	r4, [r3]
 	bl	nandc_cs
-	cbnz	r5, .L2126
-	mov	r0, r4
-	bl	slc_phy_page_address_calc
-	mov	r4, r0
-.L2126:
-	add	r3, fp, r6, lsl #8
-	movs	r2, #5
+	cmp	r10, #0
+	beq	.L2316
+	adds	r3, r4, r6
+	str	r10, [r3, #2056]
+.L2316:
+	adds	r3, r4, r6
+	movs	r2, #128
 	str	r2, [r3, #2056]
 	movs	r2, #0
 	str	r2, [r3, #2052]
 	str	r2, [r3, #2052]
-	uxtb	r2, r4
+	uxtb	r2, r5
 	str	r2, [r3, #2052]
-	lsrs	r2, r4, #8
+	lsrs	r2, r5, #8
 	str	r2, [r3, #2052]
-	lsrs	r2, r4, #16
+	lsrs	r2, r5, #16
 	str	r2, [r3, #2052]
-	movs	r2, #224
-	str	r2, [r3, #2056]
-	ldr	r3, .L2154+24
-	ldr	r3, [r3]
-	ldrb	r3, [r3, #12]	@ zero_extendqisi2
-	cmp	r3, #3
-	bne	.L2127
-	cmp	r5, #0
-	beq	.L2127
-	ldr	r3, .L2154+28
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #0
-	bne	.L2127
-	add	r3, r4, r4, lsl #1
-	subs	r0, r5, #1
-	add	r0, r0, r3
-.L2153:
+	ldr	r2, .L2324+4
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbz	r2, .L2317
+	lsrs	r2, r5, #24
+	str	r2, [r3, #2052]
+.L2317:
+	mov	r0, r5
+	add	r4, r4, r6
 	bl	nandc_set_seed
-	ldr	r10, .L2154+56
-	movs	r1, #0
-	ldr	r3, [sp, #8]
-	mov	r0, r6
-	ldrb	r2, [r10, #9]	@ zero_extendqisi2
+	ldr	r3, .L2324+8
+	movs	r1, #1
+	mov	r0, r7
+	ldrb	r2, [r3, #9]	@ zero_extendqisi2
+	ldr	r3, [sp, #48]
 	str	r3, [sp]
-	mov	r3, r8
+	ldr	r3, [sp, #44]
 	bl	nandc_xfer
-	adds	r1, r0, #1
-	bne	.L2129
-	ldr	fp, .L2154+44
-	ldrb	r3, [fp]	@ zero_extendqisi2
-	str	r3, [sp, #12]
-	cmp	r3, #0
-	beq	.L2130
-	movs	r3, #0
-	mov	r2, r8
-	strb	r3, [fp]
-	orr	r1, r4, r5, lsl #24
-	ldrb	r3, [r10, #9]	@ zero_extendqisi2
-	mov	r0, r6
-	str	r3, [sp]
-	ldr	r3, [sp, #8]
-	bl	flash_read_page
-	ldrb	r3, [sp, #12]	@ zero_extendqisi2
-	strb	r3, [fp]
-	cbnz	r5, .L2131
-.L2136:
-	ldr	r3, .L2154+32
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2131
-	ldr	r3, .L2154+36
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	r0, r3, asr #2
-	blt	.L2131
-	ldrb	r3, [r10, #19]	@ zero_extendqisi2
-	subs	r3, r3, #4
-	cmp	r3, #4
-	it	ls
-	movls	r0, #256
-.L2124:
-	add	sp, sp, #16
+	str	r8, [r4, #2056]
+	add	sp, sp, #12
 	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2127:
-	mov	r0, r4
-	b	.L2153
-.L2131:
-	adds	r2, r0, #1
-	bne	.L2124
-.L2137:
-	ldr	r3, .L2154+40
-	ldr	fp, [r3]
-	cmp	fp, #0
-	bne	.L2133
-.L2135:
-	ldr	r3, .L2154+44
-	mov	r2, r7
-	movs	r1, #0
-	ldr	r0, .L2154+48
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	str	r3, [sp]
-	mov	r3, #-1
-	bl	printf
-	ldr	r3, .L2154+52
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L2134
-	mov	r0, #-1
-	b	.L2124
-.L2133:
-	ldrb	r3, [r10, #9]	@ zero_extendqisi2
-	mov	r2, r8
-	orr	r1, r4, r5, lsl #24
-	mov	r0, r6
-	str	r3, [sp]
-	ldr	r3, [sp, #8]
-	blx	fp
-	adds	r3, r0, #1
-	beq	.L2135
-	b	.L2124
-.L2134:
-	ldrb	r3, [r10, #9]	@ zero_extendqisi2
-	mov	r2, r8
-	orr	r1, r4, r5, lsl #24
-	mov	r0, r6
-	str	r3, [sp]
-	ldr	r3, [sp, #8]
-	bl	flash_ddr_tuning_read
-	b	.L2124
-.L2129:
-	cmp	r5, #0
-	beq	.L2136
-	b	.L2124
-.L2130:
-	cmp	r5, #0
-	bne	.L2137
-	b	.L2136
-.L2155:
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.L2325:
 	.align	2
-.L2154:
-	.word	.LANCHOR31
-	.word	.LANCHOR18
-	.word	.LANCHOR169
-	.word	.LC0
-	.word	.LANCHOR30
+.L2324:
 	.word	.LANCHOR13
-	.word	.LANCHOR16
-	.word	.LANCHOR35
-	.word	.LANCHOR0
-	.word	.LANCHOR46
-	.word	.LANCHOR165
-	.word	.LANCHOR48
-	.word	.LC124
-	.word	.LANCHOR21
-	.word	.LANCHOR32
-	.size	flash_complete_page_read, .-flash_complete_page_read
-	.section	.text.queue_wait_first_req_completed,"ax",%progbits
+	.word	.LANCHOR31
+	.word	.LANCHOR33
+	.size	flash_start_one_pass_page_prog, .-flash_start_one_pass_page_prog
+	.section	.text.flash_dual_page_prog,"ax",%progbits
 	.align	1
+	.global	flash_dual_page_prog
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	queue_wait_first_req_completed, %function
-queue_wait_first_req_completed:
-	@ args = 0, pretend = 0, frame = 8
+	.type	flash_dual_page_prog, %function
+flash_dual_page_prog:
+	@ args = 12, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L2255
-	ldrb	r5, [r3]	@ zero_extendqisi2
-	cmp	r5, #255
-	bne	.L2157
-.L2190:
-	movs	r6, #0
-	b	.L2156
-.L2157:
-	ldr	r4, .L2255+4
-	movs	r3, #48
-	mla	r3, r3, r5, r4
-	ldrb	r2, [r3, #42]	@ zero_extendqisi2
-	ldr	r6, [r3, #24]
-	subs	r3, r2, #1
-	cmp	r3, #10
-	bhi	.L2190
-	tbh	[pc, r3, lsl #1]
-.L2160:
-	.2byte	(.L2159-.L2160)/2
-	.2byte	(.L2161-.L2160)/2
-	.2byte	(.L2162-.L2160)/2
-	.2byte	(.L2162-.L2160)/2
-	.2byte	(.L2162-.L2160)/2
-	.2byte	(.L2162-.L2160)/2
-	.2byte	(.L2163-.L2160)/2
-	.2byte	(.L2164-.L2160)/2
-	.2byte	(.L2165-.L2160)/2
-	.2byte	(.L2162-.L2160)/2
-	.2byte	(.L2165-.L2160)/2
-	.p2align 1
-.L2159:
-	movs	r1, #64
-	mov	r0, r6
-	bl	flash_wait_device_ready
-	lsls	r0, r0, #25
-	bpl	.L2190
-	movs	r3, #48
-	mla	r3, r3, r5, r4
-	ldr	r2, [r3, #8]
-	ldr	r1, [r3, #4]
-	cbz	r2, .L2167
-	ldrb	r0, [r3, #40]	@ zero_extendqisi2
-	ldr	r3, .L2255+8
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r0, r3
-	it	eq
-	moveq	r1, r2
-.L2167:
-	movs	r3, #48
-	mov	r0, r6
-	mla	r4, r3, r5, r4
-	ldr	r2, [r4, #12]
-	bl	flash_complete_page_read
-	str	r0, [r4, #36]
-.L2254:
-	movs	r3, #13
-	strb	r3, [r4, #42]
-	ldrb	r3, [r4, #2]	@ zero_extendqisi2
-	orr	r3, r3, #8
-	strb	r3, [r4, #2]
-	b	.L2190
-.L2161:
-	movs	r1, #64
-	mov	r0, r6
-	bl	flash_wait_device_ready
-	lsls	r1, r0, #25
-	bpl	.L2190
-	movs	r3, #48
-	mul	r1, r3, r5
-	ldrb	r6, [r4, r1]	@ zero_extendqisi2
-	adds	r2, r4, r1
-	ldr	fp, [r2, #4]
-	mla	r3, r3, r6, r4
-	ldr	r10, [r3, #4]
-	ldr	r3, [r2, #8]
-	cbz	r3, .L2168
-	ldrb	r1, [r2, #40]	@ zero_extendqisi2
-	ldr	r2, .L2255+8
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cmp	r1, r2
-	it	eq
-	moveq	fp, r3
-.L2168:
-	movs	r3, #48
-	mla	r3, r3, r6, r4
-	ldr	r2, [r3, #8]
-	cbz	r2, .L2169
-	ldrb	r1, [r3, #40]	@ zero_extendqisi2
-	ldr	r3, .L2255+8
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r1, r3
-	it	eq
-	moveq	r10, r2
-.L2169:
-	movs	r3, #48
-	mov	r1, fp
-	mla	r7, r3, r5, r4
-	str	r3, [sp, #12]
-	ldr	r2, [r7, #12]
-	ldr	r0, [r7, #24]
-	bl	flash_complete_plane_page_read
-	ldr	r3, [sp, #12]
-	mov	r8, r0
-	mov	r1, r10
-	mla	r3, r3, r6, r4
-	ldr	r2, [r3, #12]
-	ldr	r0, [r3, #24]
-	bl	flash_complete_plane_page_read
-	cmp	r8, #-1
-	str	r0, [sp, #12]
-	beq	.L2170
-	ldr	r3, [r7, #20]
-	adds	r2, r3, #1
-	beq	.L2171
-	ldr	r2, [r7, #12]
-	ldr	r2, [r2, #4]
-	cmp	r3, r2
-	beq	.L2171
-.L2170:
-	movs	r7, #48
-	ldr	r3, .L2255+12
-	mla	r7, r7, r5, r4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	movs	r0, #1
-	ldr	r1, [r7, #24]
-	rsb	r2, r3, #24
-	lsls	r0, r0, r3
-	subs	r3, r0, #1
-	lsr	r0, r1, r2
-	lsl	ip, r3, r2
-	mov	r2, fp
-	ands	r0, r0, r3
-	ldr	r3, .L2255+8
-	bic	r1, r1, ip
-	uxtb	r0, r0
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	str	r3, [sp]
-	ldr	r3, [r7, #12]
-	bl	flash_read_page_en
-	ldr	r2, [r7, #20]
-	mov	r8, r0
-	adds	r3, r2, #1
-	beq	.L2172
-	ldr	r3, [r7, #12]
-	ldr	r1, [r3, #4]
-	cmp	r2, r1
-	beq	.L2172
-	ldr	r0, .L2255+16
-	ldr	r0, [r0]
-	lsls	r0, r0, #25
-	bpl	.L2172
-	str	r1, [sp]
-	ldr	r1, [r7, #24]
-	ldr	r3, [r3]
-	ldr	r0, .L2255+20
-	bl	printf
-.L2172:
-	movs	r3, #48
-	mla	r3, r3, r5, r4
-	ldr	r2, [r3, #20]
-	adds	r0, r2, #1
-	beq	.L2171
-	ldr	r3, [r3, #12]
-	ldr	r3, [r3, #4]
-	cmp	r2, r3
-	beq	.L2171
-	mov	r2, #360
-	ldr	r1, .L2255+24
-	ldr	r0, .L2255+28
-	bl	printf
-.L2171:
-	movs	r3, #48
-	movs	r2, #13
-	mla	r5, r3, r5, r4
-	strb	r2, [r5, #42]
-	ldrb	r2, [r5, #2]	@ zero_extendqisi2
-	str	r8, [r5, #36]
-	orr	r2, r2, #8
-	strb	r2, [r5, #2]
-	ldr	r2, [sp, #12]
-	adds	r2, r2, #1
-	beq	.L2173
-	mla	r3, r3, r6, r4
-	ldr	r2, [r3, #20]
-	adds	r1, r2, #1
-	beq	.L2175
-	ldr	r3, [r3, #12]
-	ldr	r3, [r3, #4]
-	cmp	r2, r3
-	beq	.L2175
-.L2173:
-	ldr	r3, .L2255+12
-	movs	r5, #48
-	mla	r5, r5, r6, r4
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	movs	r0, #1
-	ldr	r1, [r5, #24]
-	rsb	r3, r2, #24
-	lsls	r0, r0, r2
-	mov	r2, r10
-	subs	r0, r0, #1
-	lsl	r7, r0, r3
-	lsr	r3, r1, r3
-	ands	r0, r0, r3
-	ldr	r3, .L2255+8
-	bic	r1, r1, r7
-	uxtb	r0, r0
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	str	r3, [sp]
-	ldr	r3, [r5, #12]
-	bl	flash_read_page_en
-	ldr	r2, [r5, #20]
-	adds	r3, r2, #1
-	beq	.L2177
-	ldr	r3, [r5, #12]
-	ldr	r1, [r3, #4]
-	cmp	r2, r1
-	beq	.L2177
-	ldr	r0, .L2255+16
-	ldr	r0, [r0]
-	lsls	r7, r0, #25
-	bpl	.L2177
-	str	r1, [sp]
-	ldr	r0, .L2255+20
-	ldr	r3, [r3]
-	ldr	r1, [r5, #24]
-	bl	printf
-.L2177:
-	movs	r3, #48
-	mla	r3, r3, r6, r4
-	ldr	r2, [r3, #20]
-	adds	r0, r2, #1
-	beq	.L2175
-	ldr	r3, [r3, #12]
-	ldr	r3, [r3, #4]
-	cmp	r2, r3
-	beq	.L2175
-	movw	r2, #375
-	ldr	r1, .L2255+24
-	ldr	r0, .L2255+28
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #24
+	str	r2, [sp, #20]
+	mov	fp, r3
+	add	r3, r0, #8
+	mov	r5, r0
+	ldr	r2, .L2338
+	mov	r6, r1
+	ubfx	r8, r1, #24, #2
+	ldr	r7, [r2]
+	add	r7, r7, r3, lsl #8
+	ldr	r3, .L2338+4
+	ldrb	r4, [r3]	@ zero_extendqisi2
+	rsb	r3, r4, #24
+	movs	r4, #1
+	lsls	r4, r4, r3
+	ldr	r3, .L2338+8
+	subs	r4, r4, #1
+	ldr	r2, [r3]
+	ands	r4, r4, r1
+	mov	r10, r3
+	tst	r2, #16
+	beq	.L2327
+	ldr	r3, [sp, #64]
+	mov	r2, r8
+	ldr	r0, .L2338+12
 	bl	printf
-.L2175:
-	movs	r3, #48
-	mla	r4, r3, r6, r4
-	str	r8, [r4, #36]
-	b	.L2254
-.L2162:
-	movs	r1, #64
-	mov	r0, r6
-	bl	flash_wait_device_ready
-	lsls	r1, r0, #25
-	mov	r6, r0
-	bpl	.L2190
-	ands	r2, r0, #5
-	mov	r3, #48
-	beq	.L2178
-	mla	r4, r3, r5, r4
-	movs	r3, #12
+.L2327:
+	bl	nandc_wait_flash_ready
+	mov	r0, r5
+	bl	nandc_cs
+	mov	r0, r5
+	cmp	r8, #0
+	bne	.L2328
+	bl	zftl_flash_enter_slc_mode
+.L2329:
+	ldr	r3, [sp, #20]
+	movs	r1, #0
+	movs	r2, #16
+	mov	r0, r1
+	str	r4, [sp]
+	adds	r4, r4, #1
+	str	r3, [sp, #4]
+	mov	r3, r5
+	str	fp, [sp, #8]
+	bl	flash_start_one_pass_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	r3, [sp, #60]
+	movs	r1, #0
+	movs	r2, #16
+	mov	r0, r1
+	str	r4, [sp]
+	str	r3, [sp, #8]
+	ldr	r3, [sp, #56]
+	str	r3, [sp, #4]
+	mov	r3, r5
+	bl	flash_start_one_pass_page_prog
+	bl	nandc_wait_flash_ready
+	mov	r0, r7
+	bl	flash_read_status
+	bl	nandc_de_cs.constprop.33
+	ands	r0, r0, #4
+	beq	.L2326
+	ldr	r3, [r10]
+	lsls	r3, r3, #19
+	bpl	.L2331
 	mov	r2, r0
-	ldr	r0, .L2255+32
-	strb	r3, [r4, #42]
-	ldrb	r1, [r4, #1]	@ zero_extendqisi2
-	str	r3, [sp]
-	ldr	r3, [r4, #24]
+	mov	r1, r6
+	ldr	r0, .L2338+16
 	bl	printf
-.L2253:
-	mov	r3, #-1
-	str	r3, [r4, #36]
-	b	.L2156
-.L2256:
+.L2331:
+	mov	r0, #-1
+.L2326:
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2328:
+	bl	zftl_flash_exit_slc_mode
+	b	.L2329
+.L2339:
 	.align	2
-.L2255:
-	.word	.LANCHOR56
-	.word	.LANCHOR52
-	.word	.LANCHOR125
-	.word	.LANCHOR31
+.L2338:
+	.word	.LANCHOR13
+	.word	.LANCHOR32
 	.word	.LANCHOR14
-	.word	.LC125
-	.word	.LANCHOR170
-	.word	.LC0
-	.word	.LC126
-.L2178:
-	mla	r6, r3, r5, r4
-	movs	r3, #13
-	strb	r3, [r6, #42]
-	ldr	r3, .L2257
-	str	r2, [r6, #36]
-	ldr	r3, [r3]
-	ldr	r2, [r3, #156]
-	ldr	r3, .L2257+4
-	cmp	r2, r3
-	bne	.L2190
-	ldrh	r3, [r6, #34]
-	cmp	r3, #0
-	bne	.L2190
-	ldr	r3, .L2257+8
-	movs	r0, #1
-	ldr	r1, [r6, #24]
-	ldr	r7, .L2257+12
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	rsb	r3, r2, #24
-	lsls	r0, r0, r2
-	ldr	r2, .L2257+16
-	subs	r0, r0, #1
-	lsl	ip, r0, r3
-	lsr	r3, r1, r3
-	ands	r0, r0, r3
-	ldr	r3, .L2257+20
-	bic	r1, r1, ip
-	uxtb	r0, r0
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	str	r3, [sp]
-	ldr	r3, [r7]
-	ldr	r2, [r2]
-	bl	flash_read_page_en
-	adds	r2, r0, #1
-	mov	r3, r0
-	beq	.L2179
-	ldr	r1, [r6, #12]
-	ldr	r2, [r7]
-	ldr	r1, [r1]
-	ldr	r2, [r2]
-	cmp	r1, r2
-	beq	.L2190
-.L2179:
-	movs	r2, #48
-	ldr	r0, .L2257+24
-	mla	r4, r2, r5, r4
-	ldr	r2, .L2257+28
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	ldrb	r1, [r4, #1]	@ zero_extendqisi2
-	str	r2, [sp]
-	ldr	r2, [r4, #24]
-	bl	printf
-	mov	r3, #-1
-	str	r3, [r4, #36]
-	b	.L2190
-.L2165:
-	ldr	r7, .L2257+8
-	movs	r3, #1
-	cmp	r2, #11
-	add	r2, r5, r5, lsl #1
-	it	eq
-	moveq	r0, #10
-	ldrb	ip, [r7]	@ zero_extendqisi2
-	add	r2, r4, r2, lsl #4
-	mov	r10, r7
-	it	ne
-	movne	r0, #3
-	movs	r7, #48
-	rsb	r1, ip, #24
-	lsl	r3, r3, ip
-	lsr	ip, r6, r1
-	subs	r3, r3, #1
-	and	ip, ip, r3
-	uxth	ip, ip
-.L2181:
-	ldrb	r8, [r2]	@ zero_extendqisi2
-	cmp	r8, #255
-	bne	.L2188
-	mov	r6, #-1
-	b	.L2156
-.L2188:
-	mla	lr, r7, r8, r4
-	add	r2, r8, r8, lsl #1
-	ldrb	fp, [lr, #42]	@ zero_extendqisi2
-	add	r2, r4, r2, lsl #4
-	cmp	fp, r0
-	bne	.L2181
-	ldr	lr, [lr, #24]
-	lsr	lr, lr, r1
-	and	lr, lr, r3
-	cmp	ip, lr
-	bne	.L2181
-	mov	r0, r6
-	movs	r1, #64
-	bl	flash_wait_device_ready
-	mov	r6, r0
-	lsls	r0, r6, #25
-	bmi	.L2183
-.L2252:
-	movs	r6, #0
-	b	.L2184
-.L2183:
-	ands	r3, r6, #15
-	mul	r7, r7, r5
-	beq	.L2185
-	add	r7, r7, r4
-	mov	r10, #12
-	ldrb	r1, [r7, #1]	@ zero_extendqisi2
-	mov	r2, r6
-	str	r10, [sp]
-	ldr	r3, [r7, #24]
-	ldr	r0, .L2257+32
-	bl	printf
-	mov	r3, #-1
-	strb	r10, [r7, #42]
-	str	r3, [r7, #36]
-.L2184:
-	movs	r3, #48
-	mla	r5, r3, r5, r4
-	mla	r8, r3, r8, r4
-	ldrb	r2, [r5, #42]	@ zero_extendqisi2
-	ldr	r3, [r5, #36]
-	strb	r2, [r8, #42]
-	str	r3, [r8, #36]
-.L2156:
-	mov	r0, r6
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2185:
-	adds	r6, r4, r7
-	movs	r2, #13
-	str	r3, [r6, #36]
-	ldr	r3, .L2257
-	strb	r2, [r6, #42]
-	ldr	r3, [r3]
-	ldr	r2, [r3, #156]
-	ldr	r3, .L2257+4
-	cmp	r2, r3
-	bne	.L2252
-	ldrh	r3, [r6, #34]
-	cmp	r3, #0
-	bne	.L2252
-	ldrb	r2, [r10]	@ zero_extendqisi2
-	movs	r0, #1
-	ldr	r1, [r6, #24]
-	ldr	r7, .L2257+12
-	rsb	r3, r2, #24
-	lsls	r0, r0, r2
-	ldr	r2, .L2257+16
-	subs	r0, r0, #1
-	lsl	ip, r0, r3
-	lsr	r3, r1, r3
-	ands	r0, r0, r3
-	ldr	r3, .L2257+20
-	bic	r1, r1, ip
-	uxtb	r0, r0
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	str	r3, [sp]
-	ldr	r3, [r7]
-	ldr	r2, [r2]
-	bl	flash_read_page_en
-	adds	r1, r0, #1
-	mov	r3, r0
-	beq	.L2187
-	ldr	r1, [r6, #12]
-	ldr	r2, [r7]
-	ldr	r1, [r1]
-	ldr	r2, [r2]
-	cmp	r1, r2
-	beq	.L2252
-.L2187:
-	ldr	r2, .L2257+28
-	movs	r6, #48
-	mla	r6, r6, r5, r4
-	ldr	r0, .L2257+36
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	ldrb	r1, [r6, #1]	@ zero_extendqisi2
-	str	r2, [sp]
-	ldr	r2, [r6, #24]
-	bl	printf
-	mov	r3, #-1
-	str	r3, [r6, #36]
-	b	.L2252
-.L2163:
-	mov	r0, r6
-	movs	r1, #32
-	bl	flash_wait_device_ready
-	lsls	r2, r0, #26
-	mov	r6, r0
-	bpl	.L2190
-	ands	r2, r0, #15
-	mov	r3, #48
-	mla	r4, r3, r5, r4
-	beq	.L2189
-	movs	r3, #12
-	strb	r3, [r4, #42]
-	b	.L2253
-.L2189:
-	movs	r3, #13
-	str	r2, [r4, #36]
-	strb	r3, [r4, #42]
-	b	.L2190
-.L2164:
-	movs	r1, #64
-	mov	r0, r6
-	bl	flash_wait_device_ready
-	lsls	r3, r0, #25
-	bpl	.L2190
-	movs	r3, #48
-	mla	r4, r3, r5, r4
-	movs	r3, #7
-	str	r0, [r4, #36]
-	strb	r3, [r4, #42]
-	b	.L2190
-.L2258:
-	.align	2
-.L2257:
-	.word	.LANCHOR104
-	.word	1145785929
-	.word	.LANCHOR31
-	.word	.LANCHOR166
-	.word	.LANCHOR167
-	.word	.LANCHOR125
-	.word	.LC127
-	.word	.LANCHOR48
-	.word	.LC128
-	.word	.LC129
-	.size	queue_wait_first_req_completed, .-queue_wait_first_req_completed
-	.section	.text.sblk_wait_write_queue_completed,"ax",%progbits
+	.word	.LC132
+	.word	.LC133
+	.size	flash_dual_page_prog, .-flash_dual_page_prog
+	.section	.text.ymtc_flash_tlc_page_prog,"ax",%progbits
 	.align	1
-	.global	sblk_wait_write_queue_completed
+	.global	ymtc_flash_tlc_page_prog
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	sblk_wait_write_queue_completed, %function
-sblk_wait_write_queue_completed:
+	.type	ymtc_flash_tlc_page_prog, %function
+ymtc_flash_tlc_page_prog:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, lr}
-	ldr	r4, .L2262
-.L2260:
-	ldrb	r3, [r4]	@ zero_extendqisi2
-	cmp	r3, #255
-	bne	.L2261
-	pop	{r4, pc}
-.L2261:
-	bl	queue_wait_first_req_completed
-	bl	queue_remove_completed_req
-	b	.L2260
-.L2263:
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r10, r2
+	ldr	r2, .L2346
+	mov	fp, r3
+	add	r3, r0, #8
+	movs	r6, #1
+	mov	r5, r0
+	mov	r8, r1
+	ldr	r7, [r2]
+	add	r7, r7, r3, lsl #8
+	ldr	r3, .L2346+4
+	ldrb	r4, [r3]	@ zero_extendqisi2
+	rsb	r4, r4, #24
+	lsl	r4, r6, r4
+	subs	r4, r4, #1
+	ands	r4, r4, r1
+	bl	nandc_wait_flash_ready
+	mov	r0, r5
+	bl	nandc_cs
+	mov	r0, r5
+	bl	zftl_flash_exit_slc_mode
+	mov	r3, r5
+	movs	r2, #26
+	mov	r1, r6
+	stm	sp, {r4, r10, fp}
+	movs	r0, #0
+	bl	flash_start_one_pass_page_prog
+	bl	nandc_wait_flash_ready
+	adds	r3, r4, r6
+	movs	r2, #26
+	mov	r1, r6
+	str	r3, [sp]
+	movs	r0, #0
+	mov	r3, r5
+	str	fp, [sp, #8]
+	adds	r4, r4, #2
+	str	r10, [sp, #4]
+	bl	flash_start_one_pass_page_prog
+	bl	nandc_wait_flash_ready
+	mov	r3, r5
+	movs	r2, #16
+	mov	r1, r6
+	movs	r0, #0
+	str	fp, [sp, #8]
+	str	r10, [sp, #4]
+	str	r4, [sp]
+	bl	flash_start_one_pass_page_prog
+	bl	nandc_wait_flash_ready
+	mov	r0, r7
+	bl	flash_read_status
+	bl	nandc_de_cs.constprop.33
+	ands	r0, r0, #4
+	beq	.L2340
+	ldr	r3, .L2346+8
+	ldr	r3, [r3]
+	lsls	r3, r3, #19
+	bpl	.L2342
+	mov	r2, r0
+	mov	r1, r8
+	ldr	r0, .L2346+12
+	bl	printf
+.L2342:
+	mov	r0, #-1
+.L2340:
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2347:
 	.align	2
-.L2262:
-	.word	.LANCHOR56
-	.size	sblk_wait_write_queue_completed, .-sblk_wait_write_queue_completed
-	.section	.text.ftl_read_page,"ax",%progbits
+.L2346:
+	.word	.LANCHOR13
+	.word	.LANCHOR32
+	.word	.LANCHOR14
+	.word	.LC134
+	.size	ymtc_flash_tlc_page_prog, .-ymtc_flash_tlc_page_prog
+	.section	.text.fw_flash_page_prog.constprop.30,"ax",%progbits
 	.align	1
-	.global	ftl_read_page
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_read_page, %function
-ftl_read_page:
-	@ args = 4, pretend = 0, frame = 0
+	.type	fw_flash_page_prog.constprop.30, %function
+fw_flash_page_prog.constprop.30:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, lr}
-	mov	r4, r0
-	ldr	r8, [sp, #24]
+	push	{r4, r5, r6, r7, r8, r10, lr}
 	mov	r5, r1
+	ldr	r8, .L2353+12
+	sub	sp, sp, #20
 	mov	r6, r2
-	mov	r7, r3
-	bl	sblk_wait_write_queue_completed
-	str	r8, [sp, #24]
-	mov	r3, r7
-	mov	r2, r6
-	mov	r1, r5
-	mov	r0, r4
-	pop	{r4, r5, r6, r7, r8, lr}
-	b	flash_read_page_en
-	.size	ftl_read_page, .-ftl_read_page
-	.section	.text.ftl_read_ppa_page,"ax",%progbits
-	.align	1
-	.global	ftl_read_ppa_page
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_read_ppa_page, %function
-ftl_read_ppa_page:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
-	mov	r10, r3
-	ldr	r3, .L2266
-	mov	r6, r0
-	movs	r5, #1
-	mov	r7, r1
-	mov	r8, r2
+	ldrb	r1, [r8, #9]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	ldr	r3, .L2353
+	mov	r4, r0
+	ldrb	r10, [r3]	@ zero_extendqisi2
+	ldr	r3, .L2353+4
 	ldrb	r0, [r3]	@ zero_extendqisi2
-	rsb	r4, r0, #24
-	lsls	r5, r5, r0
-	lsr	r4, r6, r4
-	subs	r5, r5, #1
-	ands	r4, r4, r5
-	uxtb	r4, r4
-	bl	sblk_wait_write_queue_completed
-	str	r10, [sp]
-	mov	r3, r8
-	mov	r2, r7
-	mov	r1, r6
+	bl	nandc_bch_sel
+	ldrb	r3, [r8, #7]	@ zero_extendqisi2
+	cmp	r3, #9
+	bne	.L2349
+	ldr	r3, .L2353+8
+	ldrb	r7, [r3]	@ zero_extendqisi2
+	cbnz	r7, .L2349
+	ldrb	r3, [r8, #12]	@ zero_extendqisi2
+	cmp	r3, #3
+	bne	.L2350
+	mov	r3, r6
+	mov	r2, r5
+	mov	r1, r4
+	mov	r0, r7
+	bl	ymtc_flash_tlc_page_prog
+.L2352:
+	mov	r4, r0
+	mov	r0, r10
+	bl	nandc_bch_sel
 	mov	r0, r4
-	bl	flash_read_page_en
-	add	sp, sp, #12
+	add	sp, sp, #20
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L2267:
+.L2350:
+	ldr	r8, .L2353+16
+	mov	r2, #16384
+	movs	r1, #255
+	ldr	r0, [r8]
+	bl	ftl_memset
+	ldr	r3, [r8]
+	movs	r2, #4
+	str	r2, [sp, #8]
+	mov	r1, r4
+	mov	r2, r5
+	mov	r0, r7
+	str	r3, [sp, #4]
+	str	r3, [sp]
+	mov	r3, r6
+	bl	flash_dual_page_prog
+	b	.L2352
+.L2349:
+	movs	r3, #4
+	mov	r2, r5
+	str	r3, [sp]
+	mov	r1, r4
+	mov	r3, r6
+	movs	r0, #0
+	bl	flash_prog_page
+	b	.L2352
+.L2354:
 	.align	2
-.L2266:
-	.word	.LANCHOR31
-	.size	ftl_read_ppa_page, .-ftl_read_ppa_page
-	.section	.text.sblk_read_page,"ax",%progbits
+.L2353:
+	.word	.LANCHOR50
+	.word	.LANCHOR17
+	.word	.LANCHOR19
+	.word	.LANCHOR33
+	.word	.LANCHOR166
+	.size	fw_flash_page_prog.constprop.30, .-fw_flash_page_prog.constprop.30
+	.section	.text.idb_write_data,"ax",%progbits
 	.align	1
-	.global	sblk_read_page
+	.global	idb_write_data
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	sblk_read_page, %function
-sblk_read_page:
-	@ args = 0, pretend = 0, frame = 24
+	.type	idb_write_data, %function
+idb_write_data:
+	@ args = 0, pretend = 0, frame = 144
 	@ frame_needed = 0, uses_anonymous_args = 0
+	cmp	r1, #64
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r7, r0
-	sub	sp, sp, #24
-	mov	r6, r1
-	mov	r4, r0
-	mov	r5, r1
-.L2269:
-	cbnz	r5, .L2279
-.L2292:
-	ldr	r4, .L2293
-.L2280:
-	cmp	r6, #0
-	bne	.L2282
-	mov	r0, r6
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2279:
-	ldr	fp, [r4, #24]
-	ldrb	r3, [r4]	@ zero_extendqisi2
-	str	r3, [sp, #8]
-.L2270:
-	movs	r1, #0
-	mov	r0, fp
-	bl	queue_lun_state
-	cbnz	r0, .L2271
-	cmp	r5, #1
-	beq	.L2276
-	ldr	r3, .L2293+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L2273
-.L2276:
-	mov	r0, r4
-	bl	queue_read_cmd
-	b	.L2274
-.L2271:
-	bl	queue_wait_first_req_completed
-	bl	queue_remove_completed_req
-	b	.L2270
-.L2273:
-	ldr	r3, .L2293+8
+	mov	r4, r1
+	sub	sp, sp, #152
+	mov	r7, r2
+	mov	r5, r3
+	ldr	r6, .L2484
+	bne	.L2356
+	ldr	r3, [r2]
+	ldr	r2, .L2484+4
+	cmp	r3, r2
+	beq	.L2357
+	ldr	r2, .L2484+8
+	cmp	r3, r2
+	beq	.L2357
+	add	r2, r2, #327680
+	cmp	r3, r2
+	bne	.L2356
+.L2357:
+	ldr	r8, .L2484+16
 	movs	r2, #1
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	rsb	r3, r1, #24
-	lsls	r2, r2, r1
-	lsr	r3, fp, r3
+	strb	r2, [r6]
+	ldr	r3, [r8]
+	cbnz	r3, .L2358
+	mov	r0, #262144
+	bl	ftl_malloc
+	str	r0, [r8]
+.L2358:
+	ldr	r3, .L2484+12
+	movs	r2, #64
+	str	r2, [r3]
+.L2356:
+	ldrb	r0, [r6]	@ zero_extendqisi2
+	cmp	r0, #0
+	beq	.L2355
+	ldr	r3, .L2484+16
+	ldr	r10, [r3]
+	mov	r8, r3
+	cmp	r10, #0
+	beq	.L2483
+	adds	r3, r4, r5
+	cmp	r3, #63
+	str	r3, [sp, #72]
+	bls	.L2360
+	cmp	r4, #576
+	bcs	.L2361
+	ldr	r10, .L2484+24
+	ldr	r3, [r10]
+	cbz	r3, .L2362
+.L2365:
+	ldr	r3, .L2484+20
+	cmp	r4, #64
+	mov	r2, #1
+	ldr	r0, [r8]
+	str	r2, [r3]
+	bhi	.L2478
+	rsb	r1, r4, #64
+	subs	r2, r5, r1
+	add	r1, r7, r1, lsl #9
+	lsls	r2, r2, #9
+.L2482:
+	bl	ftl_memcpy
+.L2366:
+	ldr	r3, .L2484+12
+	ldr	r3, [r3]
+	cmp	r4, r3
+	itt	ne
+	movne	r3, #0
+	strbne	r3, [r6]
+	b	.L2423
+.L2362:
+	mov	r0, #262144
+	bl	ftl_malloc
+	str	r0, [r10]
+	cmp	r0, #0
+	bne	.L2365
+	mov	r0, #-1
+	b	.L2355
+.L2478:
+	rsb	r2, r4, #576
+	sub	r3, r4, #64
+	cmp	r2, r5
+	mov	r1, r7
+	it	cs
+	movcs	r2, r5
+	add	r0, r0, r3, lsl #9
+	lsls	r2, r2, #9
+	b	.L2482
+.L2485:
+	.align	2
+.L2484:
+	.word	.LANCHOR143
+	.word	-52655045
+	.word	1397640018
+	.word	.LANCHOR177
+	.word	.LANCHOR141
+	.word	.LANCHOR142
+	.word	.LANCHOR144
+.L2360:
+	cmp	r4, #576
+	bcc	.L2366
+.L2361:
+	ldr	r3, .L2486
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L2366
+	ldr	r3, [r10]
+	ldr	r2, .L2486+4
+	cmp	r3, r2
+	beq	.L2367
+	ldr	r2, .L2486+8
+	cmp	r3, r2
+	beq	.L2367
+	add	r2, r2, #327680
+	cmp	r3, r2
+	bne	.L2368
+.L2367:
+	ldr	r7, .L2486+12
+	ldrb	r3, [r7]	@ zero_extendqisi2
+	str	r3, [sp, #24]
+	ldr	r3, .L2486+16
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	mov	r8, r3
+	ldr	r3, [sp, #24]
+	str	r2, [sp, #12]
+	cmp	r3, #0
+	beq	.L2369
+	clz	fp, r2
+	ldrh	r3, [sp, #24]
+	lsr	fp, fp, #5
+	str	r3, [sp, #36]
+.L2370:
+	ldr	r6, .L2486+20
+	movs	r0, #0
+	ldrb	r5, [r6, #9]	@ zero_extendqisi2
+	ldrh	r4, [r6, #26]
+	bl	zftl_flash_exit_slc_mode
+	ldrh	r0, [r6, #10]
+	ldrb	r3, [r8]	@ zero_extendqisi2
+	ldrb	r1, [r6, #12]	@ zero_extendqisi2
+	movw	r6, #4098
+	strb	r3, [r7]
+	lsls	r0, r0, #2
+	ldr	r7, .L2486+24
+	bl	__aeabi_idiv
+	cmp	r0, #512
+	mov	r3, r0
+	it	ge
+	movge	r3, #512
+	add	r1, r10, #260096
+	str	r3, [sp, #32]
+	movw	r2, #65023
+	movs	r3, #0
+.L2376:
+	ldr	r0, [r1, #-4]!
+	cbnz	r0, .L2372
+	cmp	r3, #0
+	bne	.L2373
+	str	r7, [r1, #2048]
+.L2374:
+	adds	r3, r3, #1
 	subs	r2, r2, #1
-	ands	r3, r3, r2
-	ldrb	r2, [r4]	@ zero_extendqisi2
-	uxth	r3, r3
-	cmp	r2, #255
-	bne	.L2275
-	movw	r2, #661
-	ldr	r1, .L2293+12
-	ldr	r0, .L2293+16
-	str	r3, [sp, #4]
+	cmp	r3, r6
+	it	hi
+	movhi	r3, #0
+	cmp	r2, #4096
+	bne	.L2376
+.L2372:
+	ldr	r3, [sp, #32]
+	ldr	r1, [r10, r2, lsl #2]
+	ldr	r0, .L2486+28
 	bl	printf
-	ldr	r3, [sp, #4]
-.L2275:
-	ldrb	r2, [r4]	@ zero_extendqisi2
-	movs	r0, #1
-	ldr	r8, .L2293
-	str	r2, [sp, #12]
-	movs	r2, #48
-	ldr	r1, [sp, #12]
-	muls	r2, r1, r2
-	add	r10, r8, r2
-	str	r2, [sp, #4]
-	ldr	r2, .L2293+8
-	ldr	r1, [r10, #24]
-	ldrb	ip, [r2]	@ zero_extendqisi2
-	rsb	r2, ip, #24
-	lsl	r0, r0, ip
-	lsr	r2, r1, r2
-	subs	r0, r0, #1
-	ands	r2, r2, r0
-	uxth	r2, r2
-	cmp	r3, r2
-	bne	.L2276
-	ldr	r3, .L2293+20
-	ldrh	r3, [r3]
-	add	fp, fp, r3
-	cmp	r1, fp
-	bne	.L2276
-	ldr	r3, [sp, #4]
-	mov	fp, #255
-	ldr	r0, [r4, #24]
-	subs	r5, r5, #1
-	ldrb	r3, [r8, r3]	@ zero_extendqisi2
-	str	r3, [sp, #8]
-	bl	flash_start_plane_read
-	movs	r2, #2
+	mul	r3, r5, r4
+	str	r3, [sp, #84]
 	movs	r3, #0
-	strb	r2, [r4, #42]
-	mov	r1, r4
-	strb	r3, [r4, #43]
-	ldr	r0, .L2293+24
-	strb	fp, [r4]
-	str	r2, [sp, #20]
 	str	r3, [sp, #16]
-	bl	buf_add_tail
+	str	r3, [sp, #28]
+.L2418:
+	ldr	r3, .L2486+32
+	mov	r2, #512
+	movs	r1, #0
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldr	r3, .L2486+36
+	ldr	r2, [sp, #28]
+	ldr	r3, [r3]
+	add	r3, r3, r2
+	ldrb	r3, [r3, #32]	@ zero_extendqisi2
+	cmp	r3, #255
+	beq	.L2377
+	ldr	r2, [sp, #84]
+	muls	r3, r2, r3
+	str	r3, [sp, #8]
+	cmp	fp, #0
+	beq	.L2378
+	ldr	r3, [sp, #28]
+	ldr	r5, .L2486+12
+	ldr	r4, .L2486+16
+	bic	r3, r3, #2
+	cmp	r3, #1
+	beq	.L2379
+	cmp	fp, #3
+	bne	.L2380
+.L2379:
+	ldrb	r3, [sp, #36]	@ zero_extendqisi2
+.L2480:
+	strb	r3, [r5]
+	strb	r3, [r4]
+.L2378:
+	ldr	r7, .L2486+20
+	movs	r5, #0
+	ldr	r3, .L2486+40
+	ldr	r0, [sp, #8]
+	ldrb	r6, [r7, #9]	@ zero_extendqisi2
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	ldrh	r4, [r7, #26]
+	mov	r1, r6
+	str	r3, [sp, #76]
+	ldr	r3, .L2486+40
+	muls	r4, r6, r4
+	strb	r5, [r3]
+	bl	__aeabi_uidiv
+	mov	r1, r0
+	mov	r0, r5
+	bl	flash_erase_block
+	mov	r1, r4
+	ldr	r0, [sp, #8]
+	bl	__aeabi_uidivmod
+	ldrh	r0, [r7, #10]
+	ldr	r3, [sp, #8]
+	str	r1, [sp, #44]
+	subs	r3, r3, r1
+	lsls	r0, r0, #2
+	ldrb	r1, [r7, #12]	@ zero_extendqisi2
+	str	r3, [sp, #40]
+	bl	__aeabi_idiv
+	ldr	r3, [sp, #8]
+	ldr	r2, [sp, #40]
+	str	r0, [sp, #48]
+	cmp	r3, r2
+	bne	.L2433
+	ldr	r3, .L2486+44
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #9
+	bne	.L2433
+	ldr	r3, .L2486+32
+	mov	r2, #1024
+	mov	r1, r5
+	ldr	r4, [r3]
+	mov	r0, r4
+	bl	ftl_memset
+	ldr	r2, .L2486+48
+	movs	r3, #12
+	str	r5, [r4, #12]
+	strb	r5, [r4, #16]
+	stm	r4, {r2, r3}
+	ldr	r3, .L2486+16
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2382
+	ldrb	r3, [r7, #29]	@ zero_extendqisi2
+	strb	r3, [r4, #16]
+.L2382:
+	movs	r3, #4
+	strb	r3, [r4, #17]
+	ldr	r3, .L2486+20
+	ldrb	r1, [r3, #12]	@ zero_extendqisi2
+	ldrh	r0, [r3, #10]
+	bl	__aeabi_idiv
+	cmp	r6, #8
+	mov	r3, #0
+	ite	hi
+	movhi	r2, #70
+	movls	r2, #16
+	movs	r1, #12
+	strh	r0, [r4, #18]	@ movhi
+	strb	r3, [r4, #20]
+	adds	r0, r4, r1
+	strh	r3, [r4, #22]	@ movhi
+	strb	r2, [r4, #21]
+	bl	js_hash
+	ldr	r3, [sp, #32]
+	str	r0, [r4, #8]
+	subs	r3, r3, #4
+	str	r3, [sp, #20]
+.L2381:
+	mov	r8, r10
+	movs	r7, #0
+.L2384:
+	ldr	r3, [sp, #48]
+	cmp	r3, r7
+	bhi	.L2395
+	ldr	r3, .L2486+32
+	movs	r4, #0
+	ldr	r0, [sp, #8]
+	movs	r6, #4
+	ldr	r5, [r3]
+	ldr	r3, .L2486+20
+	ldrb	r2, [r3, #9]	@ zero_extendqisi2
+	ldrh	r1, [r3, #26]
+	ldr	r3, .L2486+40
+	str	r2, [sp, #64]
+	strb	r4, [r3]
+	muls	r1, r2, r1
+	bl	__aeabi_uidivmod
+	ldr	r3, [sp, #8]
+	str	r1, [sp, #44]
+	str	r4, [sp, #56]
+	subs	r3, r3, r1
+	str	r3, [sp, #68]
+	and	r3, r1, #3
+	str	r3, [sp, #48]
+	ldr	r3, [sp, #20]
+	str	r3, [sp, #60]
+.L2396:
+	ldr	r3, [sp, #60]
+	cmp	r4, r3
+	bcc	.L2412
+	ldr	r3, .L2486+40
+	ldrb	r2, [sp, #76]	@ zero_extendqisi2
+	strb	r2, [r3]
+	cmp	fp, #0
+	beq	.L2413
+	movs	r0, #0
+	bl	zftl_flash_exit_slc_mode
+	ldr	r2, .L2486+12
+	movs	r3, #0
+	strb	r3, [r2]
+	ldr	r2, .L2486+16
+	strb	r3, [r2]
+.L2413:
+	ldr	r3, [sp, #20]
+	movs	r4, #0
+	lsls	r1, r3, #7
+	ldr	r3, .L2486+32
+	ldr	r0, [r3]
+.L2414:
+	cmp	r4, r1
+	bne	.L2416
 	ldr	r3, [sp, #16]
-	ldr	r2, [sp, #20]
-	ldr	r0, .L2293+24
-	strb	r3, [r10, #43]
-	ldr	r3, [sp, #4]
-	strb	r2, [r10, #42]
-	strb	fp, [r8, r3]
+	adds	r3, r3, #1
+	cmp	r3, #5
+	str	r3, [sp, #16]
+	bls	.L2377
+	b	.L2425
+.L2369:
 	ldr	r3, [sp, #12]
-	add	r1, r3, r3, lsl #1
-	add	r1, r8, r1, lsl #4
-	bl	buf_add_tail
-.L2274:
-	subs	r5, r5, #1
-	beq	.L2292
-	ldr	r3, [sp, #8]
-	add	r4, r3, r3, lsl #1
-	ldr	r3, .L2293
-	add	r4, r3, r4, lsl #4
-	b	.L2269
-.L2282:
-	ldrb	r3, [r7, #42]	@ zero_extendqisi2
-	cmp	r3, #13
-	bne	.L2281
-	ldrb	r3, [r7]	@ zero_extendqisi2
-	subs	r6, r6, #1
-	cmp	r3, #255
-	itt	ne
-	addne	r3, r3, r3, lsl #1
-	addne	r7, r4, r3, lsl #4
-.L2281:
-	bl	queue_wait_first_req_completed
-	bl	queue_remove_completed_req
-	b	.L2280
-.L2294:
+	cmp	r3, #3
+	beq	.L2429
+	cmp	r3, #2
+	bne	.L2430
+	str	r3, [sp, #36]
+	mov	fp, #3
+	b	.L2370
+.L2429:
+	ldr	r3, [sp, #12]
+	mov	fp, #2
+	str	r3, [sp, #36]
+	b	.L2370
+.L2430:
+	ldr	r3, [sp, #24]
+	str	r3, [sp, #36]
+	mov	fp, r3
+	b	.L2370
+.L2373:
+	ldr	r0, [r10, r3, lsl #2]
+	str	r0, [r1, #2048]
+	b	.L2374
+.L2380:
+	movs	r0, #0
+	bl	zftl_flash_exit_slc_mode
+	movs	r3, #0
+	b	.L2480
+.L2433:
+	ldr	r3, [sp, #32]
+	mov	r4, r5
+	str	r3, [sp, #20]
+	b	.L2381
+.L2487:
 	.align	2
-.L2293:
+.L2486:
+	.word	.LANCHOR142
+	.word	-52655045
+	.word	1397640018
+	.word	.LANCHOR0
+	.word	.LANCHOR19
+	.word	.LANCHOR33
+	.word	1330594389
+	.word	.LC135
+	.word	.LANCHOR144
+	.word	.LANCHOR27
 	.word	.LANCHOR52
-	.word	.LANCHOR171
-	.word	.LANCHOR31
-	.word	.LANCHOR172
-	.word	.LC0
-	.word	.LANCHOR105
-	.word	.LANCHOR56
-	.size	sblk_read_page, .-sblk_read_page
-	.section	.text.flash_prog_page,"ax",%progbits
-	.align	1
-	.global	flash_prog_page
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	flash_prog_page, %function
-flash_prog_page:
-	@ args = 4, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	fp, r3
-	ldr	r3, .L2306
-	mov	r6, r0
-	mov	r7, r1
-	mov	r10, r2
-	ubfx	r8, r1, #24, #2
-	ldr	r4, [r3]
-	add	r3, r0, #8
-	add	r3, r4, r3, lsl #8
-	str	r3, [sp, #4]
-	ldr	r3, .L2306+4
-	ldrb	r5, [r3]	@ zero_extendqisi2
-	rsb	r3, r5, #24
-	movs	r5, #1
-	lsls	r5, r5, r3
-	ldr	r3, .L2306+8
-	subs	r5, r5, #1
-	ldr	r3, [r3]
-	ands	r5, r5, r1
-	lsls	r3, r3, #27
-	bpl	.L2296
+	.word	.LANCHOR28
+	.word	1179535694
+.L2395:
+	ldr	r3, [sp, #44]
+	adds	r5, r3, r7
+	ldr	r3, .L2488
+	ubfx	r5, r5, #2, #16
+	adds	r2, r5, #1
+	ldrh	r0, [r3, r2, lsl #1]
+	ldr	r3, .L2488+4
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	cmp	r1, #0
+	bne	.L2385
+	mov	r2, r0
+.L2386:
+	ldr	r0, .L2488+8
+	ldr	r3, .L2488
+	ldrb	r0, [r0]	@ zero_extendqisi2
+	cmp	r0, #9
+	itt	ne
+	addne	r2, r2, #-1
+	lslne	r2, r2, #2
+	str	r2, [sp, #88]
+	movw	r2, #61424
+	str	r2, [sp, #92]
+	ldrh	r2, [r3, r5, lsl #1]
+	cbnz	r1, .L2390
+	mov	r5, r2
+.L2391:
+	mul	r0, r5, r6
+	add	r2, sp, #88
+	cbnz	r4, .L2392
 	ldr	r3, [sp, #40]
-	mov	r2, r8
-	ldr	r0, .L2306+12
-	bl	printf
-.L2296:
-	bl	nandc_wait_flash_ready
-	mov	r0, r6
-	bl	hynix_reconfig_rr_para
+	mov	r1, r8
+	add	r0, r0, r3
+	bl	fw_flash_page_prog.constprop.30
+	ldr	r3, .L2488+4
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	cbnz	r2, .L2393
+	adds	r5, r5, #1
+	mov	r1, r6
+	uxth	r5, r5
+	ldr	r0, [sp, #40]
+	bl	__aeabi_uidiv
+	mov	r2, r5
+	mov	r1, r0
+	mov	r0, r4
+	bl	id_block_prog_msb_ff_data
+.L2393:
+	ldr	r3, [sp, #20]
+	add	r8, r8, #2048
+	add	r2, r3, #16
+	cmp	r7, r2
+	bcc	.L2394
+	add	r2, r3, #20
+	cmp	r7, r2
+	bcs	.L2394
+	add	r8, r10, #2048
+.L2394:
+	adds	r3, r7, #4
+	movs	r4, #0
+	uxth	r7, r3
+	b	.L2384
+.L2385:
+	ldr	r0, .L2488+12
+	ldrb	r0, [r0]	@ zero_extendqisi2
+	cmp	r0, #0
+	beq	.L2386
+	lsls	r2, r2, #1
+	b	.L2386
+.L2390:
+	ldr	r2, .L2488+12
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r2, #0
+	beq	.L2391
+	lsls	r5, r5, #1
+	b	.L2391
+.L2392:
+	ldr	r3, [sp, #40]
+	mov	r1, r4
+	add	r0, r0, r3
+	bl	fw_flash_page_prog.constprop.30
+	b	.L2394
+.L2412:
+	ldr	r3, [sp, #48]
+	mov	r1, r6
+	subs	r3, r6, r3
+	uxth	r3, r3
+	str	r3, [sp, #52]
+	ldr	r3, [sp, #44]
+	adds	r0, r3, r4
+	bl	__aeabi_uidiv
+	ldr	r2, .L2488+4
+	uxth	r0, r0
+	ldr	r3, .L2488
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	ldrh	r3, [r3, r0, lsl #1]
+	cmp	r2, #0
+	bne	.L2397
+	mov	r0, r3
+.L2398:
+	ldr	r3, .L2488+16
+	ldr	r2, [sp, #68]
+	ldrb	r8, [r3]	@ zero_extendqisi2
+	ldr	r3, [sp, #48]
+	add	r3, r3, r2
+	ldr	r2, .L2488+20
+	ldrb	r1, [r2, #9]	@ zero_extendqisi2
+	ldr	r2, [sp, #64]
+	mla	r0, r0, r2, r3
+	bl	__aeabi_uidiv
+	ldr	r3, .L2488+24
+	str	r0, [sp, #40]
+	mov	r0, r8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r3, [sp, #80]
+	bl	nandc_bch_sel
+.L2399:
+	str	r6, [sp]
+	add	r3, sp, #88
+	mov	r2, r5
+	ldr	r1, [sp, #40]
+	movs	r0, #0
+	bl	flash_read_page
+	adds	r0, r0, #1
+	bne	.L2400
+	ldr	r3, .L2488+28
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	mov	r7, r3
+	cmp	r3, #0
+	bne	.L2401
+.L2404:
+	ldr	r3, .L2488+32
+	ldr	r3, [r3]
+	mov	r7, r3
+	cmp	r3, #0
+	bne	.L2402
+.L2403:
+	ldr	r3, .L2488+36
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2406
+	str	r6, [sp]
+	add	r3, sp, #88
+	mov	r2, r5
+	ldr	r1, [sp, #40]
+	movs	r0, #0
+	bl	flash_ddr_tuning_read
+	adds	r0, r0, #1
+	bne	.L2400
+.L2406:
+	cmp	r8, #16
+	bne	.L2407
+	mov	r7, #-1
+.L2408:
+	ldr	r0, [sp, #80]
+	bl	nandc_bch_sel
+	ldr	r3, [sp, #56]
+	cmp	r7, #0
+	it	ne
+	movne	r3, #-1
+	ldr	r2, [sp, #68]
+	str	r3, [sp, #56]
+	ldr	r3, [sp, #8]
+	cmp	r3, r2
+	bne	.L2410
+	cmp	r4, #0
+	bne	.L2410
+	ldr	r3, [sp, #56]
+	cmp	r3, #0
+	bne	.L2410
+	ldr	r2, [r5]
+	ldr	r3, .L2488+40
+	cmp	r2, r3
+	bne	.L2410
+	ldr	r3, [sp, #60]
+	ldr	r2, [sp, #52]
+	ldrb	r6, [r5, #17]	@ zero_extendqisi2
+	add	r3, r3, r2
+	str	r3, [sp, #60]
+.L2411:
+	ldr	r3, [sp, #52]
+	add	r3, r3, r4
+	uxth	r4, r3
+	b	.L2396
+.L2397:
+	ldr	r3, .L2488+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L2398
+	lsls	r0, r0, #1
+	b	.L2398
+.L2401:
+	ldr	r3, .L2488+28
+	movs	r0, #0
+	mov	r2, r5
+	ldr	r1, [sp, #40]
+	strb	r0, [r3]
+	add	r3, sp, #88
+	str	r6, [sp]
+	bl	flash_read_page
+	ldr	r3, .L2488+28
+	adds	r0, r0, #1
+	strb	r7, [r3]
+	beq	.L2404
+.L2400:
+	movs	r7, #0
+	b	.L2408
+.L2402:
+	str	r6, [sp]
+	add	r3, sp, #88
+	mov	r2, r5
+	ldr	r1, [sp, #40]
+	movs	r0, #0
+	blx	r7
+	adds	r0, r0, #1
+	beq	.L2403
+	b	.L2400
+.L2407:
+	movs	r0, #16
+	mov	r8, #16
+	bl	nandc_bch_sel
+	b	.L2399
+.L2410:
+	ldr	r3, [sp, #52]
+	add	r5, r5, r3, lsl #9
+	movs	r3, #0
+	str	r3, [sp, #48]
+	b	.L2411
+.L2416:
+	ldr	r2, [r0, r4, lsl #2]
+	ldr	r3, [r10, r4, lsl #2]
+	cmp	r2, r3
+	beq	.L2415
+	mov	r2, #512
+	movs	r1, #0
+	bl	ftl_memset
+	mov	r1, r4
+	ldr	r0, .L2488+44
+	bl	printf
+	ldr	r1, [sp, #8]
+	movs	r0, #0
+	bl	flash_erase_block
+.L2377:
+	ldr	r3, [sp, #28]
+	adds	r3, r3, #1
+	cmp	r3, #4
+	str	r3, [sp, #28]
+	bne	.L2418
+.L2425:
+	movs	r0, #0
+	bl	zftl_flash_exit_slc_mode
+	ldr	r3, .L2488+48
+	ldrb	r2, [sp, #24]	@ zero_extendqisi2
+	strb	r2, [r3]
+	cmp	fp, #0
+	beq	.L2419
+	ldr	r3, .L2488+4
+	ldrb	r2, [sp, #12]	@ zero_extendqisi2
+	strb	r2, [r3]
+.L2419:
+	ldr	r3, .L2488+52
+	movs	r2, #2
+	movs	r0, #0
+	strb	r2, [r3]
+	bl	zftl_flash_enter_slc_mode
+	ldr	r3, [sp, #16]
+	cbnz	r3, .L2368
+	mov	r1, r3
+	ldr	r0, .L2488+56
+	bl	printf
+.L2368:
+	ldr	r5, .L2488+60
+	movs	r4, #0
+	ldr	r3, .L2488+64
+	ldr	r0, [r5]
+	str	r4, [r3]
+	ldr	r3, .L2488+68
+	strb	r4, [r3]
+	cbz	r0, .L2421
+	bl	free
+	str	r4, [r5]
+.L2421:
+	ldr	r4, .L2488+72
+	ldr	r0, [r4]
+	cbz	r0, .L2423
+	bl	free
+	movs	r3, #0
+	str	r3, [r4]
+.L2423:
+	ldr	r3, .L2488+76
+	ldr	r2, [sp, #72]
+	str	r2, [r3]
+.L2483:
+	movs	r0, #0
+.L2355:
+	add	sp, sp, #152
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2415:
+	adds	r4, r4, #1
+	b	.L2414
+.L2489:
+	.align	2
+.L2488:
+	.word	.LANCHOR3
+	.word	.LANCHOR19
+	.word	.LANCHOR28
+	.word	.LANCHOR1
+	.word	.LANCHOR17
+	.word	.LANCHOR33
+	.word	.LANCHOR50
+	.word	.LANCHOR52
+	.word	.LANCHOR174
+	.word	.LANCHOR21
+	.word	1179535694
+	.word	.LC136
+	.word	.LANCHOR0
+	.word	.LANCHOR34
+	.word	.LC137
+	.word	.LANCHOR141
+	.word	.LANCHOR142
+	.word	.LANCHOR143
+	.word	.LANCHOR144
+	.word	.LANCHOR177
+	.size	idb_write_data, .-idb_write_data
+	.section	.text.flash_start_tlc_page_prog,"ax",%progbits
+	.align	1
+	.global	flash_start_tlc_page_prog
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_start_tlc_page_prog, %function
+flash_start_tlc_page_prog:
+	@ args = 12, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r6, r3
+	mov	r8, r2
+	ldr	r3, [sp, #56]
+	mov	r4, r0
+	mov	r7, r1
+	ldr	r2, .L2497
+	str	r3, [sp, #12]
+	ldr	r5, [sp, #48]
+	ldrb	r3, [r2]	@ zero_extendqisi2
+	mov	fp, r2
+	ldr	r10, [sp, #52]
+	cmp	r3, r6
+	bhi	.L2491
+	movw	r2, #859
+	ldr	r1, .L2497+4
+	ldr	r0, .L2497+8
+	bl	printf
+.L2491:
+	ldrb	r3, [fp]	@ zero_extendqisi2
+	cmp	r3, r6
+	bls	.L2490
+	ldr	r3, .L2497+12
+	ldrb	r6, [r3, r6]	@ zero_extendqisi2
+	ldr	r3, .L2497+16
 	mov	r0, r6
+	ldr	fp, [r3]
 	bl	nandc_cs
-	mov	r0, r6
-	cmp	r8, #0
-	bne	.L2297
-	bl	zftl_flash_enter_slc_mode
-.L2298:
-	add	r4, r4, r6, lsl #8
+	lsls	r3, r6, #8
+	cbz	r4, .L2493
+	add	r1, fp, r3
+	str	r4, [r1, #2056]
+.L2493:
+	add	r4, fp, r3
 	movs	r3, #128
-	mov	r0, r5
+	str	r7, [r4, #2056]
 	str	r3, [r4, #2056]
 	movs	r3, #0
 	str	r3, [r4, #2052]
@@ -14441,5052 +15765,4757 @@ flash_prog_page:
 	lsrs	r3, r5, #8
 	str	r3, [r4, #2052]
 	lsrs	r3, r5, #16
+	add	r5, r5, r5, lsl #1
 	str	r3, [r4, #2052]
+	subs	r0, r5, #1
+	add	r0, r0, r7
 	bl	nandc_set_seed
-	ldr	r1, .L2306+16
-	mov	r2, r10
-	mov	r3, fp
-	movs	r0, #1
-	ldrb	r1, [r1, #9]	@ zero_extendqisi2
-	bl	nandc_xfer_start
-	bl	nandc_xfer_done
-	movs	r0, #200
-	bl	udelay
-	movs	r3, #16
-	str	r3, [r4, #2056]
-	bl	nandc_wait_flash_ready
-	ldr	r0, [sp, #4]
-	bl	flash_read_status
-	bl	nandc_de_cs.constprop.30
-	ands	r4, r0, #4
-	beq	.L2295
-	mov	r2, r4
-	mov	r1, r7
-	ldr	r0, .L2306+20
-	bl	printf
-.L2295:
-	mov	r0, r4
-	add	sp, sp, #8
+	ldr	r3, .L2497+20
+	movs	r1, #1
+	mov	r0, r6
+	ldrb	r2, [r3, #9]	@ zero_extendqisi2
+	ldr	r3, [sp, #12]
+	str	r3, [sp]
+	mov	r3, r10
+	bl	nandc_xfer
+	str	r8, [r4, #2056]
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	nandc_de_cs.constprop.33
+.L2490:
+	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2297:
-	bl	zftl_flash_exit_slc_mode
-	b	.L2298
-.L2307:
+.L2498:
 	.align	2
-.L2306:
+.L2497:
+	.word	.LANCHOR18
+	.word	.LANCHOR178
+	.word	.LC0
+	.word	.LANCHOR30
 	.word	.LANCHOR13
-	.word	.LANCHOR31
-	.word	.LANCHOR14
-	.word	.LC130
-	.word	.LANCHOR32
-	.word	.LC131
-	.size	flash_prog_page, .-flash_prog_page
-	.section	.text.flash_test_blk,"ax",%progbits
+	.word	.LANCHOR33
+	.size	flash_start_tlc_page_prog, .-flash_start_tlc_page_prog
+	.section	.text.queue_tlc_prog_cmd,"ax",%progbits
 	.align	1
-	.global	flash_test_blk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_test_blk, %function
-flash_test_blk:
+	.type	queue_tlc_prog_cmd, %function
+queue_tlc_prog_cmd:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	movs	r2, #32
-	ldr	r7, .L2318
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, lr}
+	movs	r7, #1
+	ldr	r3, .L2503
 	mov	r6, r0
-	mov	r4, r1
-	movs	r1, #165
-	ldr	r5, .L2318+4
-	ldr	r0, [r7]
-	bl	ftl_memset
-	movs	r2, #8
-	movs	r1, #90
-	ldr	r0, [r5]
-	bl	ftl_memset
-	ldr	r3, .L2318+8
-	mov	r0, r6
-	ldrh	r3, [r3]
-	muls	r4, r3, r4
-	mov	r1, r4
-	bl	flash_erase_block
-	adds	r0, r0, #1
-	bne	.L2309
-.L2311:
-	mov	r5, #-1
-.L2310:
-	mov	r1, r4
-	mov	r0, r6
-	bl	flash_erase_block
-	mov	r0, r5
-	add	sp, sp, #8
+	mov	r8, r1
+	ldr	r2, [r0]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	ldr	r1, [r2, #24]
+	rsb	r0, r3, #24
+	lsl	r4, r7, r3
+	ldr	r3, .L2503+4
+	lsl	r5, r7, r0
+	subs	r4, r4, #1
+	subs	r5, r5, #1
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	ands	r5, r5, r1
+	lsrs	r1, r1, r0
+	ands	r4, r4, r1
+	uxtb	r4, r4
+	cmp	r3, #0
+	beq	.L2500
+	mov	r0, r4
+	bl	zftl_flash_exit_slc_mode
+	ldr	r3, [r6]
+	mov	r1, r7
+	movs	r0, #0
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	movs	r2, #26
+	ldr	r3, [r3, #4]
+	str	r5, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r4
+	bl	flash_start_one_pass_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r6, #4]
+	mov	r1, r7
+	movs	r0, #0
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	movs	r2, #26
+	ldr	r3, [r3, #4]
+	str	r3, [sp, #4]
+	adds	r3, r5, r7
+	str	r3, [sp]
+	mov	r3, r4
+	bl	flash_start_one_pass_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r6, #8]
+	adds	r5, r5, #2
+	mov	r1, r7
+	movs	r0, #0
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	movs	r2, #16
+	ldr	r3, [r3, #4]
+	str	r5, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r4
+	bl	flash_start_one_pass_page_prog
+.L2501:
+	cmp	r8, #0
+	beq	.L2499
+	ldr	r1, [r6]
+	movs	r3, #4
+	ldr	r0, .L2503+8
+	strb	r3, [r1, #42]
+	movs	r3, #1
+	strb	r3, [r1, #43]
+	movs	r3, #255
+	strb	r3, [r1]
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, lr}
+	b	buf_add_tail
+.L2500:
+	ldr	r3, [r2, #12]
+	mov	r1, r7
+	ldrb	r0, [r2, #44]	@ zero_extendqisi2
+	str	r3, [sp, #8]
+	ldr	r3, [r2, #4]
+	movs	r2, #26
+	str	r5, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r4
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldm	r6, {r2, r3}
+	movs	r1, #2
+	ldrb	r0, [r2, #44]	@ zero_extendqisi2
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	movs	r2, #26
+	ldr	r3, [r3, #4]
+	str	r5, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r4
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r6, #8]
+	movs	r1, #3
+	ldr	r2, [r6]
+	ldrb	r0, [r2, #44]	@ zero_extendqisi2
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	movs	r2, #16
+	ldr	r3, [r3, #4]
+	str	r5, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r4
+	bl	flash_start_tlc_page_prog
+	b	.L2501
+.L2499:
+	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L2309:
-	ldr	r8, .L2318+12
-	mov	r1, r4
-	mov	r0, r6
-	ldrb	r3, [r8, #9]	@ zero_extendqisi2
-	str	r3, [sp]
-	ldr	r2, [r7]
-	ldr	r3, [r5]
-	bl	flash_prog_page
-	adds	r0, r0, #1
-	beq	.L2311
-	ldrb	r3, [r8, #9]	@ zero_extendqisi2
-	mov	r1, r4
-	mov	r0, r6
-	str	r3, [sp]
-	ldr	r2, [r7]
-	ldr	r3, [r5]
-	bl	flash_read_page
-	adds	r0, r0, #1
-	beq	.L2311
-	ldr	r3, [r7]
-	ldr	r3, [r3]
-	cmp	r3, #-1515870811
-	bne	.L2311
-	ldr	r3, [r5]
-	ldr	r5, [r3]
-	subs	r5, r5, #1515870810
-	it	ne
-	movne	r5, #-1
-	b	.L2310
-.L2319:
+.L2504:
 	.align	2
-.L2318:
-	.word	.LANCHOR159
-	.word	.LANCHOR161
-	.word	.LANCHOR2
+.L2503:
 	.word	.LANCHOR32
-	.size	flash_test_blk, .-flash_test_blk
-	.section	.text.id_block_prog_msb_ff_data,"ax",%progbits
+	.word	.LANCHOR37
+	.word	.LANCHOR60
+	.size	queue_tlc_prog_cmd, .-queue_tlc_prog_cmd
+	.section	.text.sblk_3d_tlc_dump_prog,"ax",%progbits
 	.align	1
-	.global	id_block_prog_msb_ff_data
+	.global	sblk_3d_tlc_dump_prog
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	id_block_prog_msb_ff_data, %function
-id_block_prog_msb_ff_data:
+	.type	sblk_3d_tlc_dump_prog, %function
+sblk_3d_tlc_dump_prog:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2327
-	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
-	mov	r6, r0
-	mov	r7, r1
-	mov	r4, r2
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, lr}
+	movs	r7, #1
+	ldr	r3, .L2508
+	mov	r5, r0
+	ldr	r2, [r0, #24]
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L2320
-	ldr	r5, .L2327+4
-	ldrb	r2, [r5, #19]	@ zero_extendqisi2
-	subs	r3, r2, #5
-	uxtb	r3, r3
-	cmp	r3, #30
-	bhi	.L2322
-	ldr	r2, .L2327+8
-	lsr	r3, r2, r3
-	lsls	r3, r3, #31
-	bmi	.L2324
-.L2320:
-	add	sp, sp, #12
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L2325:
-	ldrh	r2, [r10, r4, lsl #1]
-	movw	r3, #65535
-	cmp	r2, r3
-	bne	.L2320
-	mov	r2, #16384
-	movs	r1, #255
-	ldr	r0, [r8]
-	bl	ftl_memset
-	ldrb	r3, [r5, #9]	@ zero_extendqisi2
-	adds	r1, r4, r7
-	adds	r4, r4, #1
-	mov	r0, r6
-	uxth	r4, r4
-	str	r3, [sp]
-	ldr	r3, [r8]
-	mov	r2, r3
-	bl	flash_prog_page
-.L2326:
-	ldrh	r3, [r5, #10]
-	cmp	r3, r4
-	bhi	.L2325
-	b	.L2320
-.L2322:
-	cmp	r2, #68
-	bne	.L2320
-.L2324:
-	ldr	r10, .L2327+12
-	ldr	r8, .L2327+16
-	b	.L2326
-.L2328:
-	.align	2
-.L2327:
-	.word	.LANCHOR19
+	rsb	r1, r3, #24
+	lsl	r4, r7, r3
+	lsl	r6, r7, r1
+	ldr	r3, .L2508+4
+	subs	r6, r6, #1
+	subs	r4, r4, #1
+	ands	r6, r6, r2
+	lsrs	r2, r2, r1
+	ldrb	r8, [r3]	@ zero_extendqisi2
+	ands	r4, r4, r2
+	uxtb	r4, r4
+	cmp	r8, #0
+	beq	.L2506
+	mov	r0, r4
+	bl	zftl_flash_exit_slc_mode
+	ldr	r3, [r5, #12]
+	movs	r2, #26
+	mov	r1, r7
+	str	r6, [sp]
+	movs	r0, #0
+	str	r3, [sp, #8]
+	ldr	r3, [r5, #4]
+	str	r3, [sp, #4]
+	mov	r3, r4
+	bl	flash_start_one_pass_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r5, #12]
+	movs	r2, #26
+	mov	r1, r7
+	movs	r0, #0
+	str	r3, [sp, #8]
+	ldr	r3, [r5, #4]
+	str	r3, [sp, #4]
+	adds	r3, r6, r7
+	str	r3, [sp]
+	mov	r3, r4
+	bl	flash_start_one_pass_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r5, #12]
+	adds	r6, r6, #2
+	str	r6, [sp]
+	movs	r2, #16
+	mov	r1, r7
+	movs	r0, #0
+	str	r3, [sp, #8]
+	ldr	r3, [r5, #4]
+	str	r3, [sp, #4]
+	mov	r3, r4
+	bl	flash_start_one_pass_page_prog
+.L2507:
+	bl	nandc_wait_flash_ready
+	movs	r1, #64
+	ldr	r0, [r5, #24]
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, lr}
+	b	flash_wait_device_ready
+.L2506:
+	ldr	r3, [r0, #12]
+	mov	r1, r7
+	movs	r2, #26
+	str	r3, [sp, #8]
+	ldr	r3, [r0, #4]
+	mov	r0, r8
+	str	r6, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r4
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r5, #12]
+	movs	r2, #26
+	movs	r1, #2
+	mov	r0, r8
+	str	r6, [sp]
+	str	r3, [sp, #8]
+	ldr	r3, [r5, #4]
+	str	r3, [sp, #4]
+	mov	r3, r4
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r5, #12]
+	movs	r2, #16
+	str	r6, [sp]
+	movs	r1, #3
+	mov	r0, r8
+	str	r3, [sp, #8]
+	ldr	r3, [r5, #4]
+	str	r3, [sp, #4]
+	mov	r3, r4
+	bl	flash_start_tlc_page_prog
+	b	.L2507
+.L2509:
+	.align	2
+.L2508:
 	.word	.LANCHOR32
-	.word	1073758215
-	.word	.LANCHOR140
-	.word	.LANCHOR159
-	.size	id_block_prog_msb_ff_data, .-id_block_prog_msb_ff_data
-	.section	.text.flash_dual_page_prog,"ax",%progbits
+	.word	.LANCHOR37
+	.size	sblk_3d_tlc_dump_prog, .-sblk_3d_tlc_dump_prog
+	.section	.text.flash_start_3d_mlc_page_prog,"ax",%progbits
 	.align	1
-	.global	flash_dual_page_prog
+	.global	flash_start_3d_mlc_page_prog
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_dual_page_prog, %function
-flash_dual_page_prog:
-	@ args = 12, pretend = 0, frame = 16
+	.type	flash_start_3d_mlc_page_prog, %function
+flash_start_3d_mlc_page_prog:
+	@ args = 4, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	fp, r3
-	ldr	r3, .L2343
-	mov	r4, r0
-	mov	r7, r1
-	ubfx	r8, r1, #24, #2
-	str	r2, [sp, #8]
-	ldr	r6, [r3]
-	add	r3, r0, #8
-	add	r3, r6, r3, lsl #8
-	str	r3, [sp, #4]
-	ldr	r3, .L2343+4
-	ldrb	r5, [r3]	@ zero_extendqisi2
-	ldr	r3, .L2343+8
-	rsb	r0, r5, #24
-	movs	r5, #1
-	ldr	r2, [r3]
-	lsls	r5, r5, r0
-	str	r3, [sp, #12]
-	subs	r5, r5, #1
-	tst	r2, #16
-	and	r5, r5, r1
-	beq	.L2330
-	ldr	r3, [sp, #56]
-	mov	r2, r8
-	ldr	r0, .L2343+12
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	mov	r5, r2
+	ldr	r4, .L2513
+	mov	r7, r0
+	mov	r6, r1
+	mov	r8, r3
+	ldrb	r2, [r4]	@ zero_extendqisi2
+	cmp	r2, r1
+	bhi	.L2511
+	mov	r2, #892
+	ldr	r1, .L2513+4
+	ldr	r0, .L2513+8
 	bl	printf
-.L2330:
-	bl	nandc_wait_flash_ready
-	mov	r0, r4
+.L2511:
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	cmp	r3, r6
+	bls	.L2510
+	ldr	r3, .L2513+12
+	ldrb	r6, [r3, r6]	@ zero_extendqisi2
+	ldr	r3, .L2513+16
+	mov	r0, r6
+	ldr	r4, [r3]
 	bl	nandc_cs
-	mov	r0, r4
-	cmp	r8, #0
-	bne	.L2331
-	bl	zftl_flash_enter_slc_mode
-.L2332:
-	add	r4, r6, r4, lsl #8
-	uxtb	r3, r5
-	ldr	r8, .L2343+20
-	movs	r6, #0
-	mov	r10, #128
-	str	r10, [r4, #2056]
+	movs	r3, #128
 	mov	r0, r5
-	str	r6, [r4, #2052]
-	str	r6, [r4, #2052]
-	str	r3, [r4, #2052]
-	lsrs	r3, r5, #8
+	add	r4, r4, r6, lsl #8
+	str	r3, [r4, #2056]
+	movs	r3, #0
 	str	r3, [r4, #2052]
-	lsrs	r3, r5, #16
 	str	r3, [r4, #2052]
-	bl	nandc_set_seed
-	mov	r3, fp
-	ldr	r2, [sp, #8]
-	ldrb	r1, [r8, #9]	@ zero_extendqisi2
-	movs	r0, #1
-	bl	nandc_xfer_start
-	mov	fp, #16
-	bl	nandc_xfer_done
-	str	fp, [r4, #2056]
-	bl	nandc_wait_flash_ready
-	adds	r0, r5, #1
-	str	r10, [r4, #2056]
-	uxtb	r3, r0
-	str	r6, [r4, #2052]
-	str	r6, [r4, #2052]
+	uxtb	r3, r5
 	str	r3, [r4, #2052]
-	lsrs	r3, r0, #8
+	lsrs	r3, r5, #8
 	str	r3, [r4, #2052]
-	lsr	r3, r0, fp
+	lsrs	r3, r5, #16
 	str	r3, [r4, #2052]
 	bl	nandc_set_seed
-	ldr	r3, [sp, #52]
-	movs	r0, #1
-	ldr	r2, [sp, #48]
-	ldrb	r1, [r8, #9]	@ zero_extendqisi2
-	bl	nandc_xfer_start
-	bl	nandc_xfer_done
-	str	fp, [r4, #2056]
-	bl	nandc_wait_flash_ready
-	ldr	r0, [sp, #4]
-	bl	flash_read_status
-	bl	nandc_de_cs.constprop.30
-	ands	r4, r0, #4
-	beq	.L2329
-	ldr	r3, [sp, #12]
-	ldr	r3, [r3]
-	lsls	r3, r3, #19
-	bpl	.L2329
-	mov	r2, r4
-	mov	r1, r7
-	ldr	r0, .L2343+16
-	bl	printf
-.L2329:
-	mov	r0, r4
-	add	sp, sp, #16
+	ldr	r3, .L2513+20
+	movs	r1, #1
+	mov	r0, r6
+	ldrb	r2, [r3, #9]	@ zero_extendqisi2
+	ldr	r3, [sp, #32]
+	str	r3, [sp]
+	mov	r3, r8
+	bl	nandc_xfer
+	str	r7, [r4, #2056]
+.L2510:
+	add	sp, sp, #8
 	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2331:
-	bl	zftl_flash_exit_slc_mode
-	b	.L2332
-.L2344:
+	pop	{r4, r5, r6, r7, r8, pc}
+.L2514:
 	.align	2
-.L2343:
+.L2513:
+	.word	.LANCHOR18
+	.word	.LANCHOR179
+	.word	.LC0
+	.word	.LANCHOR30
 	.word	.LANCHOR13
-	.word	.LANCHOR31
-	.word	.LANCHOR14
-	.word	.LC130
-	.word	.LC131
-	.word	.LANCHOR32
-	.size	flash_dual_page_prog, .-flash_dual_page_prog
-	.section	.text.fw_flash_page_prog.constprop.27,"ax",%progbits
+	.word	.LANCHOR33
+	.size	flash_start_3d_mlc_page_prog, .-flash_start_3d_mlc_page_prog
+	.section	.text.sblk_mlc_dump_prog,"ax",%progbits
 	.align	1
+	.global	sblk_mlc_dump_prog
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	fw_flash_page_prog.constprop.27, %function
-fw_flash_page_prog.constprop.27:
+	.type	sblk_mlc_dump_prog, %function
+sblk_mlc_dump_prog:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, lr}
-	mov	r5, r1
-	ldr	r7, .L2349
-	mov	r6, r2
-	ldrb	r1, [r7, #9]	@ zero_extendqisi2
-	bl	__aeabi_uidiv
-	ldr	r3, .L2349+4
-	mov	r4, r0
-	ldrb	r8, [r3]	@ zero_extendqisi2
-	ldr	r3, .L2349+8
-	ldrb	r0, [r3]	@ zero_extendqisi2
-	bl	nandc_bch_sel
-	ldrb	r3, [r7, #7]	@ zero_extendqisi2
-	cmp	r3, #9
-	bne	.L2346
-	ldr	r7, .L2349+12
-	mov	r2, #16384
-	movs	r1, #255
-	ldr	r0, [r7]
-	bl	ftl_memset
-	ldr	r3, [r7]
-	movs	r2, #4
-	str	r2, [sp, #8]
+	ldr	r3, .L2520
+	push	{r0, r1, r4, r5, r6, lr}
+	mov	r5, r0
+	ldr	r2, [r0, #24]
+	ldrb	r4, [r3]	@ zero_extendqisi2
+	movs	r3, #1
+	rsb	r1, r4, #24
+	lsl	r6, r3, r1
+	lsl	r4, r3, r4
+	subs	r6, r6, #1
+	subs	r4, r4, #1
+	ands	r6, r6, r2
+	lsrs	r2, r2, r1
+	ands	r4, r4, r2
+	uxtb	r4, r4
+	mov	r0, r4
+	bl	zftl_flash_exit_slc_mode
+	ldr	r3, .L2520+4
+	ldr	r3, [r3]
+	lsls	r3, r3, #19
+	bpl	.L2516
+	ldr	r2, [r5, #24]
+	mov	r1, r6
+	ldr	r0, .L2520+8
+	adds	r3, r2, #1
+	bl	printf
+.L2516:
+	ldr	r3, [r5, #12]
+	mov	r2, r6
 	mov	r1, r4
-	mov	r2, r5
-	movs	r0, #0
-	str	r3, [sp, #4]
-	str	r3, [sp]
-	mov	r3, r6
-	bl	flash_dual_page_prog
-.L2348:
-	mov	r4, r0
-	mov	r0, r8
-	bl	nandc_bch_sel
-	mov	r0, r4
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, pc}
-.L2346:
-	movs	r3, #4
-	mov	r2, r5
+	movs	r0, #16
 	str	r3, [sp]
+	ldr	r3, [r5, #4]
+	bl	flash_start_3d_mlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r5, #12]
+	adds	r2, r6, #1
 	mov	r1, r4
-	mov	r3, r6
-	movs	r0, #0
-	bl	flash_prog_page
-	b	.L2348
-.L2350:
+	movs	r0, #16
+	str	r3, [sp]
+	ldr	r3, [r5, #4]
+	bl	flash_start_3d_mlc_page_prog
+	bl	nandc_wait_flash_ready
+	movs	r1, #64
+	ldr	r0, [r5, #24]
+	bl	flash_wait_device_ready
+	bl	nandc_de_cs.constprop.33
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, pc}
+.L2521:
 	.align	2
-.L2349:
+.L2520:
 	.word	.LANCHOR32
-	.word	.LANCHOR46
-	.word	.LANCHOR17
-	.word	.LANCHOR159
-	.size	fw_flash_page_prog.constprop.27, .-fw_flash_page_prog.constprop.27
-	.section	.text.idb_write_data,"ax",%progbits
+	.word	.LANCHOR14
+	.word	.LC138
+	.size	sblk_mlc_dump_prog, .-sblk_mlc_dump_prog
+	.section	.text.flash_start_page_prog,"ax",%progbits
 	.align	1
-	.global	idb_write_data
+	.global	flash_start_page_prog
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	idb_write_data, %function
-idb_write_data:
-	@ args = 0, pretend = 0, frame = 144
+	.type	flash_start_page_prog, %function
+flash_start_page_prog:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r8, r3
-	ldr	r5, .L2473
-	adds	r3, r1, r3
-	cmp	r3, #63
-	sub	sp, sp, #152
-	mov	r4, r1
-	mov	r7, r2
-	ldr	r6, [r5]
-	bls	.L2352
-	cmp	r1, #576
-	bcs	.L2353
-	cbnz	r6, .L2354
-	mov	r0, #262144
-	bl	ftl_malloc
-	str	r0, [r5]
-	cbnz	r0, .L2355
-.L2360:
-	mov	r0, #-1
-.L2351:
-	add	sp, sp, #152
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2355:
-	mov	r2, #262144
-	mov	r1, r6
-	bl	ftl_memset
-.L2354:
-	ldr	r6, .L2473+4
-	ldr	r3, [r6]
-	cbz	r3, .L2357
-.L2361:
-	ldr	r3, .L2473+8
-	cmp	r4, #64
-	mov	r2, #1
-	ldr	r0, [r5]
-	str	r2, [r3]
-	bhi	.L2467
-	rsb	r1, r4, #64
-	sub	r2, r8, r1
-	add	r1, r7, r1, lsl #9
-	lsls	r2, r2, #9
-.L2472:
-	bl	ftl_memcpy
-.L2362:
-	movs	r0, #0
-	b	.L2351
-.L2357:
-	mov	r0, #262144
-	bl	ftl_malloc
-	str	r0, [r6]
-	cmp	r0, #0
-	bne	.L2361
-	b	.L2360
-.L2467:
-	rsb	r2, r4, #576
-	subs	r4, r4, #64
-	cmp	r2, r8
-	mov	r1, r7
-	it	cs
-	movcs	r2, r8
-	add	r0, r0, r4, lsl #9
-	lsls	r2, r2, #9
-	b	.L2472
-.L2352:
-	cmp	r1, #576
-	bcc	.L2362
-.L2353:
-	ldr	r3, .L2473+8
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L2362
-	ldr	r2, .L2473+12
-	ldr	r7, .L2473+16
-	ldrb	r3, [r2]	@ zero_extendqisi2
-	mov	r8, r2
-	ldrb	r4, [r7, #9]	@ zero_extendqisi2
-	ldrh	r5, [r7, #26]
-	str	r3, [sp, #24]
-	ldr	r3, .L2473+20
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	mov	r10, r3
-	ldr	r3, [sp, #24]
-	str	r1, [sp, #32]
-	cmp	r3, #0
-	beq	.L2363
-	ldrh	r3, [sp, #24]
-	str	r3, [sp, #44]
-	clz	r3, r1
-	lsrs	r3, r3, #5
-.L2469:
-	movs	r0, #0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	fp, r2
 	str	r3, [sp, #12]
-	bl	zftl_flash_exit_slc_mode
-	ldrb	r3, [r10]	@ zero_extendqisi2
-	strb	r3, [r8]
-	ldr	r3, .L2473+24
-	ldr	r2, [r6]
-	cmp	r2, r3
-	bne	.L2366
-	ldrh	r0, [r7, #10]
-	ldrb	r1, [r7, #12]	@ zero_extendqisi2
-	lsls	r0, r0, #2
-	bl	__aeabi_idiv
-	cmp	r0, #512
-	mov	r3, r0
-	it	ge
-	movge	r3, #512
-	add	r1, r6, #260096
-	str	r3, [sp, #36]
-	movw	r2, #65023
-	movs	r3, #0
-.L2370:
-	ldr	r0, [r1, #-4]!
-	cbnz	r0, .L2368
-	ldr	r0, [r6, r3, lsl #2]
-	adds	r3, r3, #1
-	cmp	r3, #4096
-	add	r2, r2, #-1
-	it	hi
-	movhi	r3, #0
-	cmp	r2, #4096
-	str	r0, [r1, #2048]
-	bne	.L2370
-.L2368:
-	smulbb	r4, r4, r5
-	ldr	r3, [sp, #36]
-	ldr	r1, [r6, r2, lsl #2]
-	ldr	r0, .L2473+28
+	mov	r8, r1
+	ldr	r3, .L2536
+	ldr	r6, .L2536+4
+	str	r0, [sp, #8]
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	movs	r3, #1
+	rsb	r4, r2, #24
+	lsls	r3, r3, r2
+	lsr	r2, r1, r4
+	subs	r3, r3, #1
+	ands	r3, r3, r2
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	uxtb	r10, r3
+	cmp	r2, r10
+	bhi	.L2523
+	movw	r2, #945
+	ldr	r1, .L2536+8
+	ldr	r0, .L2536+12
 	bl	printf
-	uxth	r3, r4
-	str	r3, [sp, #76]
-	movs	r3, #0
-	str	r3, [sp, #16]
-	str	r3, [sp, #28]
-.L2411:
-	ldr	r3, .L2473+4
-	mov	r2, #512
-	movs	r1, #0
-	ldr	r0, [r3]
-	bl	ftl_memset
-	ldr	r3, .L2473+32
-	ldr	r2, [sp, #28]
-	ldr	r3, [r3]
-	add	r3, r3, r2
-	ldrb	r3, [r3, #32]	@ zero_extendqisi2
-	cmp	r3, #255
-	beq	.L2371
-	ldr	r2, [sp, #76]
-	mul	r10, r2, r3
-	ldr	r3, [sp, #12]
-	cbz	r3, .L2372
-	ldr	r3, [sp, #28]
-	ldr	r5, .L2473+12
-	ldr	r4, .L2473+20
-	bic	r3, r3, #2
-	cmp	r3, #1
-	bne	.L2373
-	ldrb	r3, [sp, #44]	@ zero_extendqisi2
-.L2470:
-	strb	r3, [r5]
-	strb	r3, [r4]
-.L2372:
-	ldr	r8, .L2473+16
-	movs	r5, #0
-	ldr	r3, .L2473+36
-	mov	r0, r10
-	ldrb	r7, [r8, #9]	@ zero_extendqisi2
-	ldrh	r4, [r8, #26]
+.L2523:
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	cmp	r2, r10
+	bls	.L2522
+	movs	r2, #1
+	lsl	r4, r2, r4
+	ldr	r2, .L2536+16
+	subs	r4, r4, #1
+	ldrb	r5, [r2, r10]	@ zero_extendqisi2
+	and	r4, r4, r8
+	ldr	r2, .L2536+20
+	ldr	r7, [r2]
+	bl	nandc_rdy_status
+	cbnz	r0, .L2525
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	cmp	r2, #1
+	bne	.L2526
+	bl	nandc_wait_flash_ready
+.L2525:
+	mov	r0, r5
+	bl	hynix_reconfig_rr_para
+	mov	r0, r5
+	bl	nandc_cs
+	tst	r8, #50331648
+	bne	.L2527
+	mov	r0, r4
+	bl	slc_phy_page_address_calc
+	ldr	r3, .L2536+24
+	mov	r4, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	mov	r1, r7
-	str	r3, [sp, #80]
-	smulbb	r4, r4, r7
-	ldr	r3, .L2473+36
-	uxth	r4, r4
-	strb	r5, [r3]
-	bl	__aeabi_uidiv
-	mov	r1, r0
+	cbz	r3, .L2528
 	mov	r0, r5
-	bl	flash_erase_block
+	bl	zftl_flash_enter_slc_mode
+.L2528:
+	lsls	r6, r5, #8
+	movs	r2, #128
+	adds	r3, r7, r6
+	str	r2, [r3, #2056]
+	movs	r2, #0
+	str	r2, [r3, #2052]
+	str	r2, [r3, #2052]
+	uxtb	r2, r4
+	str	r2, [r3, #2052]
+	lsrs	r2, r4, #8
+	str	r2, [r3, #2052]
+	lsrs	r2, r4, #16
+	str	r2, [r3, #2052]
+	ldr	r2, .L2536+28
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbz	r2, .L2529
+	lsrs	r2, r4, #24
+	str	r2, [r3, #2052]
+.L2529:
+	mov	r0, r4
+	add	r7, r7, r6
+	bl	nandc_set_seed
+	ldr	r3, .L2536+32
+	movs	r1, #1
+	mov	r0, r5
+	ldrb	r2, [r3, #9]	@ zero_extendqisi2
+	ldr	r3, [sp, #12]
+	str	r3, [sp]
+	mov	r3, fp
+	bl	nandc_xfer
+	ldr	r3, [sp, #8]
+	str	r3, [r7, #2056]
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	nandc_de_cs.constprop.33
+.L2526:
+	movs	r2, #64
 	mov	r1, r4
 	mov	r0, r10
-	bl	__aeabi_uidivmod
-	ldrh	r0, [r8, #10]
-	sub	r3, r10, r1
-	str	r1, [sp, #48]
-	ldrb	r1, [r8, #12]	@ zero_extendqisi2
-	str	r3, [sp, #40]
-	lsls	r0, r0, #2
-	bl	__aeabi_idiv
-	ldr	r3, [sp, #40]
-	str	r0, [sp, #52]
-	cmp	r10, r3
-	bne	.L2419
-	ldr	r3, .L2473+40
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #9
-	bne	.L2419
-	ldr	r3, .L2473+4
-	mov	r2, #1024
-	mov	r1, r5
-	ldr	r4, [r3]
-	mov	r0, r4
-	bl	ftl_memset
-	ldr	r2, .L2473+44
-	movs	r3, #12
-	str	r5, [r4, #12]
-	strb	r5, [r4, #16]
-	stm	r4, {r2, r3}
-	ldr	r3, .L2473+20
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2375
-	ldrb	r3, [r8, #29]	@ zero_extendqisi2
-	strb	r3, [r4, #16]
-.L2375:
-	movs	r3, #4
-	strb	r3, [r4, #17]
-	ldr	r3, .L2473+16
-	ldrb	r1, [r3, #12]	@ zero_extendqisi2
-	ldrh	r0, [r3, #10]
-	bl	__aeabi_idiv
-	cmp	r7, #8
-	mov	r3, #0
-	ite	hi
-	movhi	r2, #70
-	movls	r2, #16
-	movs	r1, #12
-	strh	r0, [r4, #18]	@ movhi
-	strb	r3, [r4, #20]
-	adds	r0, r4, r1
-	strh	r3, [r4, #22]	@ movhi
-	strb	r2, [r4, #21]
-	bl	js_hash
-	ldr	r3, [sp, #36]
-	str	r0, [r4, #8]
-	subs	r3, r3, #4
-	str	r3, [sp, #20]
-.L2374:
-	mov	r8, r6
-	mov	fp, #0
-.L2377:
-	ldr	r3, [sp, #52]
-	cmp	r3, fp
-	bhi	.L2388
-	ldr	r3, .L2473+4
-	movs	r4, #0
-	mov	r0, r10
-	movs	r7, #4
-	ldr	r5, [r3]
-	ldr	r3, .L2473+16
-	ldrb	r2, [r3, #9]	@ zero_extendqisi2
-	ldrh	r1, [r3, #26]
-	str	r2, [sp, #68]
-	ldrh	r3, [sp, #68]
-	smulbb	r1, r1, r3
-	ldr	r3, .L2473+36
-	uxth	r1, r1
-	strb	r4, [r3]
-	bl	__aeabi_uidivmod
-	sub	r3, r10, r1
-	str	r1, [sp, #40]
-	str	r3, [sp, #72]
-	and	r3, r1, #3
-	str	r3, [sp, #48]
-	ldr	r3, [sp, #20]
-	str	r4, [sp, #56]
-	str	r3, [sp, #60]
-.L2389:
-	ldr	r3, [sp, #60]
-	cmp	r4, r3
-	bcc	.L2405
-	ldr	r3, .L2473+36
-	ldrb	r2, [sp, #80]	@ zero_extendqisi2
-	strb	r2, [r3]
-	ldr	r3, [sp, #12]
-	cbz	r3, .L2406
-	movs	r0, #0
-	bl	zftl_flash_exit_slc_mode
-	ldr	r2, .L2473+12
-	movs	r3, #0
-	strb	r3, [r2]
-	ldr	r2, .L2473+20
-	strb	r3, [r2]
-.L2406:
-	ldr	r3, [sp, #20]
-	movs	r4, #0
-	lsls	r1, r3, #7
-	ldr	r3, .L2473+4
-	ldr	r0, [r3]
-.L2407:
-	cmp	r4, r1
-	bne	.L2409
-	ldr	r3, [sp, #16]
-	adds	r3, r3, #1
-	cmp	r3, #5
-	str	r3, [sp, #16]
-	bls	.L2371
-	b	.L2415
-.L2363:
-	ldr	r3, [sp, #32]
-	cmp	r3, #3
-	iteet	ne
-	ldrne	r3, [sp, #24]
-	streq	r3, [sp, #44]
-	moveq	r3, #2
-	strne	r3, [sp, #44]
-	b	.L2469
-.L2373:
-	movs	r0, #0
+	bl	flash_wait_device_ready_raw
+	b	.L2525
+.L2527:
+	mov	r0, r5
 	bl	zftl_flash_exit_slc_mode
-	movs	r3, #0
-	b	.L2470
-.L2474:
+	b	.L2528
+.L2522:
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2537:
 	.align	2
-.L2473:
-	.word	.LANCHOR137
-	.word	.LANCHOR139
-	.word	.LANCHOR138
-	.word	.LANCHOR0
+.L2536:
 	.word	.LANCHOR32
-	.word	.LANCHOR19
-	.word	-52655045
-	.word	.LC132
-	.word	.LANCHOR27
-	.word	.LANCHOR48
-	.word	.LANCHOR28
-	.word	1179535694
-.L2419:
-	ldr	r3, [sp, #36]
-	mov	r4, r5
-	str	r3, [sp, #20]
-	b	.L2374
-.L2388:
-	ldr	r3, [sp, #48]
-	add	r5, r3, fp
-	ldr	r3, .L2475
-	lsrs	r5, r5, #2
-	adds	r2, r5, #1
-	ldrh	r0, [r3, r2, lsl #1]
-	ldr	r3, .L2475+4
+	.word	.LANCHOR18
+	.word	.LANCHOR180
+	.word	.LC0
+	.word	.LANCHOR30
+	.word	.LANCHOR13
+	.word	.LANCHOR0
+	.word	.LANCHOR31
+	.word	.LANCHOR33
+	.size	flash_start_page_prog, .-flash_start_page_prog
+	.section	.text.queue_prog_cmd,"ax",%progbits
+	.align	1
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	queue_prog_cmd, %function
+queue_prog_cmd:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r4, r0
+	ldr	r3, [r0, #12]
+	ldr	r2, [r0, #4]
+	ldr	r1, [r0, #24]
+	movs	r0, #16
+	bl	flash_start_page_prog
+	ldr	r3, .L2546
+	ldr	r2, [r4, #24]
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	cmp	r0, #255
+	beq	.L2539
+	ldr	r3, .L2546+4
+	movs	r7, #48
+	ldr	ip, .L2546+8
 	ldrb	r1, [r3]	@ zero_extendqisi2
-	cmp	r1, #0
-	bne	.L2378
-	mov	r2, r0
-.L2379:
-	ldr	r0, .L2475+8
-	ldr	r3, .L2475
-	ldrb	r0, [r0]	@ zero_extendqisi2
-	cmp	r0, #9
-	itt	ne
-	addne	r2, r2, #-1
-	lslne	r2, r2, #2
-	str	r2, [sp, #88]
-	movw	r2, #61424
-	str	r2, [sp, #92]
-	ldrh	r2, [r3, r5, lsl #1]
-	cbnz	r1, .L2383
-	mov	r5, r2
-.L2384:
-	mul	r0, r5, r7
-	add	r2, sp, #88
-	cbnz	r4, .L2385
-	ldr	r3, [sp, #40]
-	mov	r1, r8
-	add	r0, r0, r3
-	bl	fw_flash_page_prog.constprop.27
-	ldr	r3, .L2475+4
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	cbnz	r2, .L2386
-	adds	r5, r5, #1
-	mov	r1, r7
-	uxth	r5, r5
-	ldr	r0, [sp, #40]
-	bl	__aeabi_uidiv
-	mov	r2, r5
-	mov	r1, r0
-	mov	r0, r4
-	bl	id_block_prog_msb_ff_data
-.L2386:
-	ldr	r3, [sp, #20]
-	add	r8, r8, #2048
-	add	r2, r3, #16
-	cmp	fp, r2
-	bcc	.L2387
-	add	r2, r3, #20
-	cmp	fp, r2
-	bcs	.L2387
-	add	r8, r6, #2048
-.L2387:
-	add	r3, fp, #4
-	movs	r4, #0
-	uxth	fp, r3
-	b	.L2377
-.L2378:
-	ldr	r0, .L2475+12
-	ldrb	r0, [r0]	@ zero_extendqisi2
-	cmp	r0, #0
-	beq	.L2379
-	lsls	r2, r2, #1
-	b	.L2379
-.L2383:
-	ldr	r2, .L2475+12
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cmp	r2, #0
-	beq	.L2384
-	lsls	r5, r5, #1
-	b	.L2384
-.L2385:
-	ldr	r3, [sp, #40]
-	mov	r1, r4
-	add	r0, r0, r3
-	bl	fw_flash_page_prog.constprop.27
-	b	.L2387
-.L2405:
-	ldr	r3, [sp, #48]
-	mov	r1, r7
-	subs	r3, r7, r3
+	movs	r3, #1
+	mov	lr, ip
+	rsb	r6, r1, #24
+	lsls	r3, r3, r1
+	asrs	r2, r2, r6
+	subs	r3, r3, #1
 	uxth	r3, r3
-	str	r3, [sp, #52]
-	ldr	r3, [sp, #40]
-	adds	r0, r3, r4
-	bl	__aeabi_uidiv
-	ldr	r2, .L2475+4
-	uxth	r0, r0
-	ldr	r3, .L2475
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	ldrh	r3, [r3, r0, lsl #1]
-	cmp	r2, #0
-	bne	.L2390
-	mov	r0, r3
-.L2391:
-	ldr	r3, .L2475+16
-	ldr	r2, [sp, #72]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	str	r3, [sp, #64]
-	ldr	r3, [sp, #48]
-	add	r3, r3, r2
-	ldr	r2, .L2475+20
-	ldrb	r1, [r2, #9]	@ zero_extendqisi2
-	ldr	r2, [sp, #68]
-	mla	r0, r0, r2, r3
-	bl	__aeabi_uidiv
-	ldr	r3, .L2475+24
-	mov	r8, r0
-	ldr	r0, [sp, #64]
+	ands	r2, r2, r3
+.L2541:
+	mla	r5, r7, r0, ip
+	ldr	r1, [r5, #24]
+	lsrs	r1, r1, r6
+	ands	r1, r1, r3
+	cmp	r2, r1
+	bne	.L2540
+	add	r1, r5, #42
+	ldrb	r5, [r5, #42]	@ zero_extendqisi2
+	cmp	r5, #7
+	bne	.L2540
+	movs	r3, #3
+	strb	r3, [r1]
+.L2539:
+	movs	r3, #3
+	mov	r1, r4
+	strb	r3, [r4, #42]
+	movs	r3, #1
+	strb	r3, [r4, #43]
+	movs	r3, #255
+	strb	r3, [r4]
+	ldr	r0, .L2546
+	pop	{r3, r4, r5, r6, r7, lr}
+	b	buf_add_tail
+.L2540:
+	muls	r0, r7, r0
+	ldrb	r0, [lr, r0]	@ zero_extendqisi2
+	cmp	r0, #255
+	bne	.L2541
+	b	.L2539
+.L2547:
+	.align	2
+.L2546:
+	.word	.LANCHOR60
+	.word	.LANCHOR32
+	.word	.LANCHOR56
+	.size	queue_prog_cmd, .-queue_prog_cmd
+	.section	.text.flash_complete_plane_page_read,"ax",%progbits
+	.align	1
+	.global	flash_complete_plane_page_read
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_complete_plane_page_read, %function
+flash_complete_plane_page_read:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2578
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
+	movs	r5, #1
+	mov	r8, r2
+	mov	r6, r0
+	mov	r7, r1
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	str	r3, [sp, #84]
-	bl	nandc_bch_sel
-.L2392:
-	str	r7, [sp]
-	add	r3, sp, #88
-	mov	r2, r5
-	mov	r1, r8
-	movs	r0, #0
-	bl	flash_read_page
-	adds	r0, r0, #1
-	bne	.L2393
-	ldr	r3, .L2475+28
-	ldrb	fp, [r3]	@ zero_extendqisi2
-	cmp	fp, #0
-	bne	.L2394
-.L2397:
-	ldr	r3, .L2475+32
-	ldr	fp, [r3]
-	cmp	fp, #0
-	bne	.L2395
-.L2396:
-	ldr	r3, .L2475+36
+	rsb	r4, r3, #24
+	lsls	r5, r5, r3
+	lsr	r3, r0, r4
+	subs	r5, r5, #1
+	ands	r5, r5, r3
+	ldr	r3, .L2578+4
+	uxtb	r5, r5
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	mov	r10, r3
+	cmp	r2, r5
+	bhi	.L2549
+	movw	r2, #1055
+	ldr	r1, .L2578+8
+	ldr	r0, .L2578+12
+	bl	printf
+.L2549:
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	cmp	r3, r5
+	bls	.L2560
+	ldr	r3, .L2578+16
+	movs	r0, #1
+	lsl	r4, r0, r4
+	ldrb	r10, [r3, r5]	@ zero_extendqisi2
+	subs	r4, r4, #1
+	ldr	r3, .L2578+20
+	ands	r4, r4, r6
+	ubfx	r6, r6, #24, #2
+	mov	r0, r10
+	ldr	r5, [r3]
+	bl	nandc_cs
+	cbnz	r6, .L2551
+	mov	r0, r4
+	bl	slc_phy_page_address_calc
+	mov	r4, r0
+.L2551:
+	ldr	r3, .L2578+24
+	uxtb	ip, r4
+	lsrs	r0, r4, #8
+	lsrs	r1, r4, #16
+	ldrb	r3, [r3, #16]	@ zero_extendqisi2
+	cmp	r3, #1
+	lsl	r3, r10, #8
+	bne	.L2552
+	adds	r2, r5, r3
+	mov	lr, #6
+.L2577:
+	str	lr, [r2, #2056]
+	mov	lr, #0
+	str	lr, [r2, #2052]
+	str	lr, [r2, #2052]
+	str	ip, [r2, #2052]
+	str	r0, [r2, #2052]
+	str	r1, [r2, #2052]
+	ldr	r1, .L2578+28
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	cbz	r1, .L2556
+	lsrs	r1, r4, #24
+	str	r1, [r2, #2052]
+.L2556:
+	add	r3, r3, r5
+.L2573:
+	movs	r2, #224
+	str	r2, [r3, #2056]
+	ldr	r3, .L2578+32
+	ldr	r3, [r3]
+	ldrb	r3, [r3, #12]	@ zero_extendqisi2
+	cmp	r3, #3
+	bne	.L2558
+	cmp	r6, #0
+	beq	.L2558
+	ldr	r3, .L2578+36
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2399
-	str	r7, [sp]
-	add	r3, sp, #88
-	mov	r2, r5
-	mov	r1, r8
-	movs	r0, #0
-	bl	flash_ddr_tuning_read
-	adds	r0, r0, #1
-	bne	.L2393
-.L2399:
-	ldr	r3, [sp, #64]
-	cmp	r3, #16
-	bne	.L2400
-	mov	r8, #-1
-.L2401:
-	ldr	r0, [sp, #84]
-	bl	nandc_bch_sel
-	ldr	r3, [sp, #56]
-	cmp	r8, #0
-	it	ne
-	movne	r3, #-1
-	str	r3, [sp, #56]
-	ldr	r3, [sp, #72]
-	cmp	r10, r3
-	bne	.L2403
-	cmp	r4, #0
-	bne	.L2403
-	ldr	r3, [sp, #56]
 	cmp	r3, #0
-	bne	.L2403
-	ldr	r2, [r5]
-	ldr	r3, .L2475+40
-	cmp	r2, r3
-	bne	.L2403
-	ldr	r3, [sp, #60]
-	ldr	r2, [sp, #52]
-	ldrb	r7, [r5, #17]	@ zero_extendqisi2
-	add	r3, r3, r2
-	str	r3, [sp, #60]
-.L2404:
-	ldr	r3, [sp, #52]
-	add	r3, r3, r4
-	uxth	r4, r3
-	b	.L2389
-.L2390:
-	ldr	r3, .L2475+12
+	bne	.L2558
+	ldr	r3, .L2578+40
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L2391
-	lsls	r0, r0, #1
-	b	.L2391
-.L2394:
-	ldr	r3, .L2475+28
-	movs	r0, #0
-	mov	r2, r5
-	mov	r1, r8
-	strb	r0, [r3]
-	add	r3, sp, #88
-	str	r7, [sp]
-	bl	flash_read_page
-	ldr	r3, .L2475+28
-	adds	r0, r0, #1
-	strb	fp, [r3]
-	beq	.L2397
-.L2393:
-	mov	r8, #0
-	b	.L2401
-.L2395:
-	str	r7, [sp]
-	add	r3, sp, #88
-	mov	r2, r5
-	mov	r1, r8
-	movs	r0, #0
-	blx	fp
-	adds	r0, r0, #1
-	beq	.L2396
-	b	.L2393
-.L2400:
-	movs	r0, #16
-	bl	nandc_bch_sel
-	movs	r3, #16
-	str	r3, [sp, #64]
-	b	.L2392
-.L2403:
-	ldr	r3, [sp, #52]
-	add	r5, r5, r3, lsl #9
-	movs	r3, #0
-	str	r3, [sp, #48]
-	b	.L2404
-.L2409:
-	ldr	r2, [r0, r4, lsl #2]
-	ldr	r3, [r6, r4, lsl #2]
-	cmp	r2, r3
-	beq	.L2408
-	mov	r2, #512
+	bne	.L2558
+	add	r4, r4, r4, lsl #1
+	subs	r6, r6, #1
+	adds	r0, r4, r6
+.L2574:
+	bl	nandc_set_seed
+	ldr	r3, .L2578+44
 	movs	r1, #0
-	bl	ftl_memset
-	mov	r1, r4
-	ldr	r0, .L2475+44
-	bl	printf
-	mov	r1, r10
-	movs	r0, #0
-	bl	flash_erase_block
-.L2371:
-	ldr	r3, [sp, #28]
-	adds	r3, r3, #1
-	cmp	r3, #4
-	str	r3, [sp, #28]
-	bne	.L2411
-.L2415:
-	movs	r0, #0
-	bl	zftl_flash_exit_slc_mode
-	ldr	r3, .L2475+48
-	ldrb	r2, [sp, #24]	@ zero_extendqisi2
-	strb	r2, [r3]
-	ldr	r3, [sp, #12]
-	cbz	r3, .L2412
-	ldr	r3, .L2475+4
-	ldrb	r2, [sp, #32]	@ zero_extendqisi2
-	strb	r2, [r3]
-.L2412:
-	ldr	r3, .L2475+52
-	movs	r2, #2
-	movs	r0, #0
-	strb	r2, [r3]
-	bl	zftl_flash_enter_slc_mode
-	ldr	r3, [sp, #16]
-	cbnz	r3, .L2366
-	mov	r1, r3
-	ldr	r0, .L2475+56
-	bl	printf
-.L2366:
-	ldr	r4, .L2475+60
-	movs	r5, #0
-	ldr	r3, .L2475+64
-	ldr	r0, [r4]
-	str	r5, [r3]
-	cbz	r0, .L2414
-	bl	free
-	str	r5, [r4]
-.L2414:
-	ldr	r4, .L2475+68
-	ldr	r0, [r4]
-	cmp	r0, #0
-	beq	.L2362
-	bl	free
-	movs	r0, #0
-	str	r0, [r4]
-	b	.L2351
-.L2408:
-	adds	r4, r4, #1
-	b	.L2407
-.L2476:
+	mov	r0, r10
+	ldrb	r2, [r3, #9]	@ zero_extendqisi2
+	mov	r3, r7
+	str	r8, [sp]
+	bl	nandc_xfer
+	bl	nandc_de_cs.constprop.33
+.L2548:
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.L2552:
+	ldr	r2, .L2578+32
+	ldr	r2, [r2]
+	ldrb	r2, [r2, #12]	@ zero_extendqisi2
+	cmp	r2, #3
+	add	r2, r5, r3
+	bne	.L2555
+	mov	lr, #5
+	b	.L2577
+.L2555:
+	mov	lr, #0
+	str	lr, [r2, #2056]
+	str	lr, [r2, #2052]
+	str	lr, [r2, #2052]
+	str	ip, [r2, #2052]
+	str	r0, [r2, #2052]
+	str	r1, [r2, #2052]
+	ldr	r1, .L2578+28
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	cbz	r1, .L2557
+	lsrs	r1, r4, #24
+	str	r1, [r2, #2052]
+.L2557:
+	movs	r1, #5
+	add	r3, r3, r5
+	str	r1, [r3, #2056]
+	movs	r1, #0
+	str	r1, [r2, #2052]
+	str	r1, [r2, #2052]
+	b	.L2573
+.L2558:
+	mov	r0, r4
+	b	.L2574
+.L2560:
+	mov	r0, #-1
+	b	.L2548
+.L2579:
 	.align	2
-.L2475:
-	.word	.LANCHOR3
-	.word	.LANCHOR19
-	.word	.LANCHOR28
-	.word	.LANCHOR1
-	.word	.LANCHOR17
+.L2578:
 	.word	.LANCHOR32
-	.word	.LANCHOR46
-	.word	.LANCHOR48
-	.word	.LANCHOR165
-	.word	.LANCHOR21
-	.word	1179535694
-	.word	.LC133
-	.word	.LANCHOR0
+	.word	.LANCHOR18
+	.word	.LANCHOR181
+	.word	.LC0
+	.word	.LANCHOR30
+	.word	.LANCHOR13
+	.word	.LANCHOR20
+	.word	.LANCHOR31
+	.word	.LANCHOR16
+	.word	.LANCHOR36
+	.word	.LANCHOR37
 	.word	.LANCHOR33
-	.word	.LC134
-	.word	.LANCHOR137
-	.word	.LANCHOR138
-	.word	.LANCHOR139
-	.size	idb_write_data, .-idb_write_data
-	.section	.text.flash_start_tlc_page_prog,"ax",%progbits
+	.size	flash_complete_plane_page_read, .-flash_complete_plane_page_read
+	.section	.text.flash_complete_page_read,"ax",%progbits
 	.align	1
-	.global	flash_start_tlc_page_prog
+	.global	flash_complete_page_read
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_start_tlc_page_prog, %function
-flash_start_tlc_page_prog:
-	@ args = 12, pretend = 0, frame = 8
+	.type	flash_complete_page_read, %function
+flash_complete_page_read:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	fp, r3
-	mov	r7, r2
-	ldr	r3, [sp, #44]
-	mov	r4, r0
-	mov	r6, r1
-	ldr	r2, .L2484
-	str	r3, [sp]
-	ldr	r5, [sp, #40]
-	ldrb	r3, [r2]	@ zero_extendqisi2
-	mov	r8, r2
-	ldr	r10, [sp, #48]
-	cmp	r3, fp
-	bhi	.L2478
-	mov	r2, #740
-	ldr	r1, .L2484+4
-	ldr	r0, .L2484+8
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r10, r0
+	ldr	r3, .L2611
+	mov	r8, r1
+	ubfx	r5, r0, #24, #2
+	str	r2, [sp, #8]
+	ldrb	r6, [r3]	@ zero_extendqisi2
+	movs	r3, #1
+	rsb	r2, r6, #24
+	lsl	r4, r3, r2
+	lsl	r6, r3, r6
+	ldr	r3, .L2611+4
+	lsr	r2, r0, r2
+	subs	r6, r6, #1
+	ands	r6, r6, r2
+	subs	r4, r4, #1
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	uxtb	r6, r6
+	ands	r4, r4, r0
+	cmp	r3, r6
+	bhi	.L2581
+	movw	r2, #1212
+	ldr	r1, .L2611+8
+	ldr	r0, .L2611+12
 	bl	printf
-.L2478:
-	ldrb	r3, [r8]	@ zero_extendqisi2
-	cmp	r3, fp
-	bls	.L2477
-	ldr	r3, .L2484+12
-	ldrb	fp, [r3, fp]	@ zero_extendqisi2
-	ldr	r3, .L2484+16
-	mov	r0, fp
-	ldr	r3, [r3]
-	lsl	fp, fp, #8
-	str	r3, [sp, #4]
+.L2581:
+	ldr	r3, .L2611+16
+	ldrb	r7, [r3, r6]	@ zero_extendqisi2
+	ldr	r3, .L2611+20
+	mov	r0, r7
+	ldr	fp, [r3]
 	bl	nandc_cs
-	ldr	r3, [sp, #4]
-	cbz	r4, .L2480
-	add	r2, r3, fp
-	str	r4, [r2, #2056]
-.L2480:
-	add	fp, fp, r3
-	movs	r3, #128
-	str	r6, [fp, #2056]
+	cbnz	r5, .L2582
+	mov	r0, r4
+	bl	slc_phy_page_address_calc
+	mov	r4, r0
+.L2582:
+	lsls	r2, r7, #8
+	ldr	r6, .L2611+24
+	movs	r1, #5
+	add	r3, fp, r2
+	str	r1, [r3, #2056]
+	movs	r1, #0
+	str	r1, [r3, #2052]
+	str	r1, [r3, #2052]
+	ldrb	r1, [r6, #12]	@ zero_extendqisi2
+	cmp	r1, #3
+	bne	.L2583
+	uxtb	r1, r4
+	str	r1, [r3, #2052]
+	lsrs	r1, r4, #8
+	str	r1, [r3, #2052]
+	lsrs	r1, r4, #16
+	str	r1, [r3, #2052]
+.L2583:
+	movs	r3, #224
+	add	fp, fp, r2
 	str	r3, [fp, #2056]
-	movs	r3, #0
-	str	r3, [fp, #2052]
-	str	r3, [fp, #2052]
-	uxtb	r3, r5
-	str	r3, [fp, #2052]
-	lsrs	r3, r5, #8
-	str	r3, [fp, #2052]
-	lsrs	r3, r5, #16
-	add	r5, r5, r5, lsl #1
-	str	r3, [fp, #2052]
+	ldr	r3, .L2611+28
+	ldr	r3, [r3]
+	ldrb	r3, [r3, #12]	@ zero_extendqisi2
+	cmp	r3, #3
+	bne	.L2584
+	cmp	r5, #0
+	beq	.L2584
+	ldr	r3, .L2611+32
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L2584
+	ldr	r3, .L2611+36
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L2584
+	add	r3, r4, r4, lsl #1
 	subs	r0, r5, #1
-	add	r0, r0, r6
+	add	r0, r0, r3
+.L2610:
 	bl	nandc_set_seed
-	ldr	r1, .L2484+20
-	mov	r3, r10
-	ldr	r2, [sp]
-	movs	r0, #1
-	ldrb	r1, [r1, #9]	@ zero_extendqisi2
-	bl	nandc_xfer_start
-	bl	nandc_xfer_done
-	str	r7, [fp, #2056]
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
-	b	nandc_de_cs.constprop.30
-.L2477:
-	add	sp, sp, #8
+	ldr	r3, [sp, #8]
+	movs	r1, #0
+	ldrb	r2, [r6, #9]	@ zero_extendqisi2
+	mov	r0, r7
+	str	r3, [sp]
+	mov	r3, r8
+	bl	nandc_xfer
+	adds	r1, r0, #1
+	bne	.L2586
+	ldr	fp, .L2611+52
+	ldrb	r3, [fp]	@ zero_extendqisi2
+	str	r3, [sp, #12]
+	cmp	r3, #0
+	beq	.L2587
+	movs	r3, #0
+	mov	r2, r8
+	strb	r3, [fp]
+	orr	r1, r4, r5, lsl #24
+	ldrb	r3, [r6, #9]	@ zero_extendqisi2
+	mov	r0, r7
+	str	r3, [sp]
+	ldr	r3, [sp, #8]
+	bl	flash_read_page
+	ldrb	r3, [sp, #12]	@ zero_extendqisi2
+	strb	r3, [fp]
+	cbnz	r5, .L2588
+.L2593:
+	ldr	r3, .L2611+40
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2588
+	ldr	r3, .L2611+44
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r0, r3, asr #2
+	blt	.L2588
+	ldrb	r3, [r6, #19]	@ zero_extendqisi2
+	subs	r3, r3, #4
+	cmp	r3, #4
+	it	ls
+	movls	r0, #256
+.L2580:
+	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2485:
+.L2584:
+	mov	r0, r4
+	b	.L2610
+.L2588:
+	adds	r2, r0, #1
+	bne	.L2580
+.L2594:
+	ldr	r3, .L2611+48
+	ldr	fp, [r3]
+	cmp	fp, #0
+	bne	.L2590
+.L2592:
+	ldr	r3, .L2611+52
+	mov	r2, r10
+	movs	r1, #0
+	ldr	r0, .L2611+56
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r3, [sp]
+	mov	r3, #-1
+	bl	printf
+	ldr	r3, .L2611+60
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L2591
+	mov	r0, #-1
+	b	.L2580
+.L2590:
+	ldrb	r3, [r6, #9]	@ zero_extendqisi2
+	mov	r2, r8
+	orr	r1, r4, r5, lsl #24
+	mov	r0, r7
+	str	r3, [sp]
+	ldr	r3, [sp, #8]
+	blx	fp
+	adds	r3, r0, #1
+	beq	.L2592
+	b	.L2580
+.L2591:
+	ldrb	r3, [r6, #9]	@ zero_extendqisi2
+	mov	r2, r8
+	orr	r1, r4, r5, lsl #24
+	mov	r0, r7
+	str	r3, [sp]
+	ldr	r3, [sp, #8]
+	bl	flash_ddr_tuning_read
+	b	.L2580
+.L2587:
+	cmp	r5, #0
+	beq	.L2593
+	b	.L2594
+.L2586:
+	cmp	r5, #0
+	bne	.L2580
+	b	.L2593
+.L2612:
 	.align	2
-.L2484:
+.L2611:
+	.word	.LANCHOR32
 	.word	.LANCHOR18
-	.word	.LANCHOR173
+	.word	.LANCHOR182
 	.word	.LC0
 	.word	.LANCHOR30
 	.word	.LANCHOR13
-	.word	.LANCHOR32
-	.size	flash_start_tlc_page_prog, .-flash_start_tlc_page_prog
-	.section	.text.queue_tlc_prog_cmd,"ax",%progbits
-	.align	1
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	queue_tlc_prog_cmd, %function
-queue_tlc_prog_cmd:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2487
-	push	{r4, r5, r6, r7, lr}
-	mov	r6, r0
-	ldr	r2, [r0]
-	movs	r7, #1
-	sub	sp, sp, #20
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	ldr	r1, [r2, #24]
-	rsb	r0, r3, #24
-	lsl	r5, r7, r0
-	lsl	r4, r7, r3
-	ldr	r3, [r2, #12]
-	subs	r5, r5, #1
-	subs	r4, r4, #1
-	ands	r5, r5, r1
-	lsrs	r1, r1, r0
-	ldrb	r0, [r2, #44]	@ zero_extendqisi2
-	ands	r4, r4, r1
-	str	r3, [sp, #8]
-	ldr	r3, [r2, #4]
-	uxtb	r4, r4
-	mov	r1, r7
-	str	r5, [sp]
-	movs	r2, #26
-	str	r3, [sp, #4]
-	mov	r3, r4
-	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldm	r6, {r2, r3}
-	movs	r1, #2
-	ldrb	r0, [r2, #44]	@ zero_extendqisi2
-	ldr	r2, [r3, #12]
-	str	r2, [sp, #8]
-	movs	r2, #26
-	ldr	r3, [r3, #4]
-	str	r5, [sp]
-	str	r3, [sp, #4]
-	mov	r3, r4
-	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldr	r3, [r6, #8]
-	movs	r1, #3
-	ldr	r2, [r6]
-	ldrb	r0, [r2, #44]	@ zero_extendqisi2
-	ldr	r2, [r3, #12]
-	str	r2, [sp, #8]
-	movs	r2, #16
-	ldr	r3, [r3, #4]
-	str	r5, [sp]
-	str	r3, [sp, #4]
-	mov	r3, r4
-	bl	flash_start_tlc_page_prog
-	ldr	r1, [r6]
-	movs	r3, #4
-	ldr	r0, .L2487+4
-	strb	r3, [r1, #42]
-	movs	r3, #255
-	strb	r7, [r1, #43]
-	strb	r3, [r1]
-	add	sp, sp, #20
-	@ sp needed
-	pop	{r4, r5, r6, r7, lr}
-	b	buf_add_tail
-.L2488:
-	.align	2
-.L2487:
-	.word	.LANCHOR31
-	.word	.LANCHOR56
-	.size	queue_tlc_prog_cmd, .-queue_tlc_prog_cmd
-	.section	.text.sblk_tlc_prog_one_page,"ax",%progbits
+	.word	.LANCHOR33
+	.word	.LANCHOR16
+	.word	.LANCHOR36
+	.word	.LANCHOR37
+	.word	.LANCHOR0
+	.word	.LANCHOR50
+	.word	.LANCHOR174
+	.word	.LANCHOR52
+	.word	.LC139
+	.word	.LANCHOR21
+	.size	flash_complete_page_read, .-flash_complete_page_read
+	.section	.text.queue_wait_first_req_completed,"ax",%progbits
 	.align	1
-	.global	sblk_tlc_prog_one_page
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	sblk_tlc_prog_one_page, %function
-sblk_tlc_prog_one_page:
-	@ args = 0, pretend = 0, frame = 0
+	.type	queue_wait_first_req_completed, %function
+queue_wait_first_req_completed:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, [r0]
-	push	{r4, r5, r6, lr}
-	mov	r5, r0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r3, .L2712
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	cmp	r5, #255
+	bne	.L2614
+.L2647:
+	movs	r6, #0
+	b	.L2613
+.L2614:
+	ldr	r4, .L2712+4
+	movs	r3, #48
+	mla	r3, r3, r5, r4
+	ldrb	r2, [r3, #42]	@ zero_extendqisi2
 	ldr	r6, [r3, #24]
-.L2490:
-	movs	r1, #1
+	subs	r3, r2, #1
+	cmp	r3, #10
+	bhi	.L2647
+	tbh	[pc, r3, lsl #1]
+.L2617:
+	.2byte	(.L2616-.L2617)/2
+	.2byte	(.L2618-.L2617)/2
+	.2byte	(.L2619-.L2617)/2
+	.2byte	(.L2619-.L2617)/2
+	.2byte	(.L2619-.L2617)/2
+	.2byte	(.L2619-.L2617)/2
+	.2byte	(.L2620-.L2617)/2
+	.2byte	(.L2621-.L2617)/2
+	.2byte	(.L2622-.L2617)/2
+	.2byte	(.L2619-.L2617)/2
+	.2byte	(.L2622-.L2617)/2
+	.p2align 1
+.L2616:
+	movs	r1, #64
 	mov	r0, r6
-	bl	queue_lun_state
-	mov	r4, r0
-	cbnz	r0, .L2491
-	mov	r0, r5
-	bl	queue_tlc_prog_cmd
-	mov	r0, r4
-	pop	{r4, r5, r6, pc}
-.L2491:
-	bl	queue_wait_first_req_completed
-	bl	queue_remove_completed_req
-	b	.L2490
-	.size	sblk_tlc_prog_one_page, .-sblk_tlc_prog_one_page
-	.section	.text.sblk_xlc_prog_pages,"ax",%progbits
-	.align	1
-	.global	sblk_xlc_prog_pages
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	sblk_xlc_prog_pages, %function
-sblk_xlc_prog_pages:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r5, r0
-	ldr	r3, [r0]
-	mov	r8, r1
-	mov	fp, r2
-	ldr	r4, [r3, #24]
-.L2493:
-	movs	r1, #1
-	mov	r0, r4
-	bl	queue_lun_state
-	cmp	r0, #0
-	bne	.L2494
-	cmp	fp, #2
-	bne	.L2495
-	ldr	r3, .L2497
-	movs	r7, #1
-	ldr	r2, [r5]
-	ldr	r0, [r8]
+	bl	flash_wait_device_ready
+	lsls	r0, r0, #25
+	bpl	.L2647
+	movs	r3, #48
+	mla	r3, r3, r5, r4
+	ldr	r2, [r3, #8]
+	ldr	r1, [r3, #4]
+	cbz	r2, .L2624
+	ldrb	r0, [r3, #40]	@ zero_extendqisi2
+	ldr	r3, .L2712+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	ldr	r1, [r2, #24]
-	ldr	r0, [r0, #24]
-	rsb	ip, r3, #24
-	lsl	r6, r7, ip
-	lsl	r4, r7, r3
-	ldr	r3, [r2, #12]
-	subs	r6, r6, #1
-	subs	r4, r4, #1
-	and	r10, r1, r6
-	lsr	r1, r1, ip
-	ands	r6, r6, r0
-	ldrb	r0, [r2, #44]	@ zero_extendqisi2
-	ands	r4, r4, r1
-	str	r3, [sp, #8]
-	ldr	r3, [r2, #4]
-	uxtb	r4, r4
-	movs	r2, #17
-	str	r10, [sp]
-	mov	r1, r7
-	str	r3, [sp, #4]
-	mov	r3, r4
-	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldr	r3, [r8]
-	mov	r1, r7
-	ldr	r2, [r5]
-	ldrb	r0, [r2, #44]	@ zero_extendqisi2
-	ldr	r2, [r3, #12]
-	str	r2, [sp, #8]
-	movs	r2, #26
-	ldr	r3, [r3, #4]
-	str	r6, [sp]
-	str	r3, [sp, #4]
-	mov	r3, r4
-	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldm	r5, {r2, r3}
-	mov	r1, fp
-	ldrb	r0, [r2, #44]	@ zero_extendqisi2
-	ldr	r2, [r3, #12]
-	str	r2, [sp, #8]
-	movs	r2, #17
-	ldr	r3, [r3, #4]
-	str	r10, [sp]
-	str	r3, [sp, #4]
-	mov	r3, r4
-	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldr	r3, [r8, #4]
+	cmp	r0, r3
+	it	eq
+	moveq	r1, r2
+.L2624:
+	movs	r3, #48
+	mov	r0, r6
+	mla	r4, r3, r5, r4
+	ldr	r2, [r4, #12]
+	bl	flash_complete_page_read
+	str	r0, [r4, #36]
+.L2711:
+	movs	r3, #13
+	strb	r3, [r4, #42]
+	ldrb	r3, [r4, #2]	@ zero_extendqisi2
+	orr	r3, r3, #8
+	strb	r3, [r4, #2]
+	b	.L2647
+.L2618:
+	movs	r1, #64
+	mov	r0, r6
+	bl	flash_wait_device_ready
+	lsls	r1, r0, #25
+	bpl	.L2647
+	movs	r3, #48
+	mul	r1, r3, r5
+	ldrb	r6, [r4, r1]	@ zero_extendqisi2
+	adds	r2, r4, r1
+	ldr	fp, [r2, #4]
+	mla	r3, r3, r6, r4
+	ldr	r10, [r3, #4]
+	ldr	r3, [r2, #8]
+	cbz	r3, .L2625
+	ldrb	r1, [r2, #40]	@ zero_extendqisi2
+	ldr	r2, .L2712+8
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r1, r2
+	it	eq
+	moveq	fp, r3
+.L2625:
+	movs	r3, #48
+	mla	r3, r3, r6, r4
+	ldr	r2, [r3, #8]
+	cbz	r2, .L2626
+	ldrb	r1, [r3, #40]	@ zero_extendqisi2
+	ldr	r3, .L2712+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r1, r3
+	it	eq
+	moveq	r10, r2
+.L2626:
+	movs	r3, #48
 	mov	r1, fp
-	ldr	r2, [r5]
-	ldrb	r0, [r2, #44]	@ zero_extendqisi2
+	mla	r7, r3, r5, r4
+	str	r3, [sp, #12]
+	ldr	r2, [r7, #12]
+	ldr	r0, [r7, #24]
+	bl	flash_complete_plane_page_read
+	ldr	r3, [sp, #12]
+	mov	r8, r0
+	mov	r1, r10
+	mla	r3, r3, r6, r4
 	ldr	r2, [r3, #12]
-	str	r2, [sp, #8]
-	movs	r2, #26
+	ldr	r0, [r3, #24]
+	bl	flash_complete_plane_page_read
+	cmp	r8, #-1
+	str	r0, [sp, #12]
+	beq	.L2627
+	ldr	r3, [r7, #20]
+	adds	r2, r3, #1
+	beq	.L2628
+	ldr	r2, [r7, #12]
+	ldr	r2, [r2, #4]
+	cmp	r3, r2
+	beq	.L2628
+.L2627:
+	movs	r7, #48
+	ldr	r3, .L2712+12
+	mla	r7, r7, r5, r4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	movs	r0, #1
+	ldr	r1, [r7, #24]
+	rsb	r2, r3, #24
+	lsls	r0, r0, r3
+	subs	r3, r0, #1
+	lsr	r0, r1, r2
+	lsl	ip, r3, r2
+	mov	r2, fp
+	ands	r0, r0, r3
+	ldr	r3, .L2712+8
+	bic	r1, r1, ip
+	uxtb	r0, r0
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r3, [sp]
+	ldr	r3, [r7, #12]
+	bl	flash_read_page_en
+	ldr	r2, [r7, #20]
+	mov	r8, r0
+	adds	r3, r2, #1
+	beq	.L2629
+	ldr	r3, [r7, #12]
+	ldr	r1, [r3, #4]
+	cmp	r2, r1
+	beq	.L2629
+	ldr	r0, .L2712+16
+	ldr	r0, [r0]
+	lsls	r0, r0, #25
+	bpl	.L2629
+	str	r1, [sp]
+	ldr	r1, [r7, #24]
+	ldr	r3, [r3]
+	ldr	r0, .L2712+20
+	bl	printf
+.L2629:
+	movs	r3, #48
+	mla	r3, r3, r5, r4
+	ldr	r2, [r3, #20]
+	adds	r0, r2, #1
+	beq	.L2628
+	ldr	r3, [r3, #12]
 	ldr	r3, [r3, #4]
-	str	r6, [sp]
-	str	r3, [sp, #4]
-	mov	r3, r4
-	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldr	r3, [r5, #8]
-	movs	r1, #3
-	ldr	r2, [r5]
-	ldrb	r0, [r2, #44]	@ zero_extendqisi2
-	ldr	r2, [r3, #12]
-	str	r2, [sp, #8]
-	movs	r2, #17
+	cmp	r2, r3
+	beq	.L2628
+	mov	r2, #430
+	ldr	r1, .L2712+24
+	ldr	r0, .L2712+28
+	bl	printf
+.L2628:
+	movs	r3, #48
+	movs	r2, #13
+	mla	r5, r3, r5, r4
+	strb	r2, [r5, #42]
+	ldrb	r2, [r5, #2]	@ zero_extendqisi2
+	str	r8, [r5, #36]
+	orr	r2, r2, #8
+	strb	r2, [r5, #2]
+	ldr	r2, [sp, #12]
+	adds	r2, r2, #1
+	beq	.L2630
+	mla	r3, r3, r6, r4
+	ldr	r2, [r3, #20]
+	adds	r1, r2, #1
+	beq	.L2632
+	ldr	r3, [r3, #12]
 	ldr	r3, [r3, #4]
-	str	r10, [sp]
-	str	r3, [sp, #4]
-	mov	r3, r4
-	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldr	r3, [r8, #8]
-	movs	r1, #3
-	ldr	r2, [r5]
-	ldrb	r0, [r2, #44]	@ zero_extendqisi2
-	ldr	r2, [r3, #12]
-	str	r2, [sp, #8]
-	movs	r2, #16
+	cmp	r2, r3
+	beq	.L2632
+.L2630:
+	ldr	r3, .L2712+12
+	movs	r5, #48
+	mla	r5, r5, r6, r4
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	movs	r0, #1
+	ldr	r1, [r5, #24]
+	rsb	r3, r2, #24
+	lsls	r0, r0, r2
+	mov	r2, r10
+	subs	r0, r0, #1
+	lsl	r7, r0, r3
+	lsr	r3, r1, r3
+	ands	r0, r0, r3
+	ldr	r3, .L2712+8
+	bic	r1, r1, r7
+	uxtb	r0, r0
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r3, [sp]
+	ldr	r3, [r5, #12]
+	bl	flash_read_page_en
+	ldr	r2, [r5, #20]
+	adds	r3, r2, #1
+	beq	.L2634
+	ldr	r3, [r5, #12]
+	ldr	r1, [r3, #4]
+	cmp	r2, r1
+	beq	.L2634
+	ldr	r0, .L2712+16
+	ldr	r0, [r0]
+	lsls	r7, r0, #25
+	bpl	.L2634
+	str	r1, [sp]
+	ldr	r0, .L2712+20
+	ldr	r3, [r3]
+	ldr	r1, [r5, #24]
+	bl	printf
+.L2634:
+	movs	r3, #48
+	mla	r3, r3, r6, r4
+	ldr	r2, [r3, #20]
+	adds	r0, r2, #1
+	beq	.L2632
+	ldr	r3, [r3, #12]
 	ldr	r3, [r3, #4]
-	str	r6, [sp]
-	str	r3, [sp, #4]
-	mov	r3, r4
-	bl	flash_start_tlc_page_prog
-	ldr	r1, [r5]
-	movs	r3, #5
-	ldr	r0, .L2497+4
-	strb	r3, [r1, #42]
-	movs	r3, #255
-	strb	r7, [r1, #43]
-	strb	r3, [r1]
-	bl	buf_add_tail
-.L2496:
-	movs	r0, #0
-	add	sp, sp, #16
+	cmp	r2, r3
+	beq	.L2632
+	movw	r2, #449
+	ldr	r1, .L2712+24
+	ldr	r0, .L2712+28
+	bl	printf
+.L2632:
+	movs	r3, #48
+	mla	r4, r3, r6, r4
+	str	r8, [r4, #36]
+	b	.L2711
+.L2619:
+	movs	r1, #64
+	mov	r0, r6
+	bl	flash_wait_device_ready
+	lsls	r1, r0, #25
+	mov	r6, r0
+	bpl	.L2647
+	ands	r2, r0, #5
+	mov	r3, #48
+	beq	.L2635
+	mla	r4, r3, r5, r4
+	movs	r3, #12
+	mov	r2, r0
+	ldr	r0, .L2712+32
+	strb	r3, [r4, #42]
+	ldrb	r1, [r4, #1]	@ zero_extendqisi2
+	str	r3, [sp]
+	ldr	r3, [r4, #24]
+	bl	printf
+.L2710:
+	mov	r3, #-1
+	str	r3, [r4, #36]
+	b	.L2613
+.L2713:
+	.align	2
+.L2712:
+	.word	.LANCHOR60
+	.word	.LANCHOR56
+	.word	.LANCHOR131
+	.word	.LANCHOR32
+	.word	.LANCHOR14
+	.word	.LC140
+	.word	.LANCHOR183
+	.word	.LC0
+	.word	.LC141
+.L2635:
+	mla	r6, r3, r5, r4
+	movs	r3, #13
+	strb	r3, [r6, #42]
+	ldr	r3, .L2714
+	str	r2, [r6, #36]
+	ldr	r3, [r3]
+	ldr	r2, [r3, #156]
+	ldr	r3, .L2714+4
+	cmp	r2, r3
+	bne	.L2647
+	ldrh	r3, [r6, #34]
+	cmp	r3, #0
+	bne	.L2647
+	ldr	r3, .L2714+8
+	movs	r0, #1
+	ldr	r1, [r6, #24]
+	ldr	r7, .L2714+12
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	rsb	r3, r2, #24
+	lsls	r0, r0, r2
+	ldr	r2, .L2714+16
+	subs	r0, r0, #1
+	lsl	ip, r0, r3
+	lsr	r3, r1, r3
+	ands	r0, r0, r3
+	ldr	r3, .L2714+20
+	bic	r1, r1, ip
+	uxtb	r0, r0
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r3, [sp]
+	ldr	r3, [r7]
+	ldr	r2, [r2]
+	bl	flash_read_page_en
+	adds	r2, r0, #1
+	mov	r3, r0
+	beq	.L2636
+	ldr	r1, [r6, #12]
+	ldr	r2, [r7]
+	ldr	r1, [r1]
+	ldr	r2, [r2]
+	cmp	r1, r2
+	beq	.L2647
+.L2636:
+	movs	r2, #48
+	ldr	r0, .L2714+24
+	mla	r4, r2, r5, r4
+	ldr	r2, .L2714+28
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	ldrb	r1, [r4, #1]	@ zero_extendqisi2
+	str	r2, [sp]
+	ldr	r2, [r4, #24]
+	bl	printf
+	mov	r3, #-1
+	str	r3, [r4, #36]
+	b	.L2647
+.L2622:
+	ldr	r7, .L2714+8
+	movs	r3, #1
+	cmp	r2, #11
+	add	r2, r5, r5, lsl #1
+	it	eq
+	moveq	r0, #10
+	ldrb	ip, [r7]	@ zero_extendqisi2
+	add	r2, r4, r2, lsl #4
+	mov	r10, r7
+	it	ne
+	movne	r0, #3
+	movs	r7, #48
+	rsb	r1, ip, #24
+	lsl	r3, r3, ip
+	lsr	ip, r6, r1
+	subs	r3, r3, #1
+	and	ip, ip, r3
+	uxth	ip, ip
+.L2638:
+	ldrb	r8, [r2]	@ zero_extendqisi2
+	cmp	r8, #255
+	bne	.L2645
+	mov	r6, #-1
+	b	.L2613
+.L2645:
+	mla	lr, r7, r8, r4
+	add	r2, r8, r8, lsl #1
+	ldrb	fp, [lr, #42]	@ zero_extendqisi2
+	add	r2, r4, r2, lsl #4
+	cmp	fp, r0
+	bne	.L2638
+	ldr	lr, [lr, #24]
+	lsr	lr, lr, r1
+	and	lr, lr, r3
+	cmp	ip, lr
+	bne	.L2638
+	mov	r0, r6
+	movs	r1, #64
+	bl	flash_wait_device_ready
+	mov	r6, r0
+	lsls	r0, r6, #25
+	bmi	.L2640
+.L2709:
+	movs	r6, #0
+	b	.L2641
+.L2640:
+	ands	r3, r6, #15
+	mul	r7, r7, r5
+	beq	.L2642
+	add	r7, r7, r4
+	mov	r10, #12
+	ldrb	r1, [r7, #1]	@ zero_extendqisi2
+	mov	r2, r6
+	str	r10, [sp]
+	ldr	r3, [r7, #24]
+	ldr	r0, .L2714+32
+	bl	printf
+	mov	r3, #-1
+	strb	r10, [r7, #42]
+	str	r3, [r7, #36]
+.L2641:
+	movs	r3, #48
+	mla	r5, r3, r5, r4
+	mla	r8, r3, r8, r4
+	ldrb	r2, [r5, #42]	@ zero_extendqisi2
+	ldr	r3, [r5, #36]
+	strb	r2, [r8, #42]
+	str	r3, [r8, #36]
+.L2613:
+	mov	r0, r6
+	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2494:
-	bl	queue_wait_first_req_completed
-	bl	queue_remove_completed_req
-	b	.L2493
-.L2495:
-	mov	r0, r5
-	bl	queue_tlc_prog_cmd
-	b	.L2496
-.L2498:
+.L2642:
+	adds	r6, r4, r7
+	movs	r2, #13
+	str	r3, [r6, #36]
+	ldr	r3, .L2714
+	strb	r2, [r6, #42]
+	ldr	r3, [r3]
+	ldr	r2, [r3, #156]
+	ldr	r3, .L2714+4
+	cmp	r2, r3
+	bne	.L2709
+	ldrh	r3, [r6, #34]
+	cmp	r3, #0
+	bne	.L2709
+	ldrb	r2, [r10]	@ zero_extendqisi2
+	movs	r0, #1
+	ldr	r1, [r6, #24]
+	ldr	r7, .L2714+12
+	rsb	r3, r2, #24
+	lsls	r0, r0, r2
+	ldr	r2, .L2714+16
+	subs	r0, r0, #1
+	lsl	ip, r0, r3
+	lsr	r3, r1, r3
+	ands	r0, r0, r3
+	ldr	r3, .L2714+20
+	bic	r1, r1, ip
+	uxtb	r0, r0
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r3, [sp]
+	ldr	r3, [r7]
+	ldr	r2, [r2]
+	bl	flash_read_page_en
+	adds	r1, r0, #1
+	mov	r3, r0
+	beq	.L2644
+	ldr	r1, [r6, #12]
+	ldr	r2, [r7]
+	ldr	r1, [r1]
+	ldr	r2, [r2]
+	cmp	r1, r2
+	beq	.L2709
+.L2644:
+	ldr	r2, .L2714+28
+	movs	r6, #48
+	mla	r6, r6, r5, r4
+	ldr	r0, .L2714+36
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	ldrb	r1, [r6, #1]	@ zero_extendqisi2
+	str	r2, [sp]
+	ldr	r2, [r6, #24]
+	bl	printf
+	mov	r3, #-1
+	str	r3, [r6, #36]
+	b	.L2709
+.L2620:
+	mov	r0, r6
+	movs	r1, #32
+	bl	flash_wait_device_ready
+	lsls	r2, r0, #26
+	mov	r6, r0
+	bpl	.L2647
+	ands	r2, r0, #15
+	mov	r3, #48
+	mla	r4, r3, r5, r4
+	beq	.L2646
+	movs	r3, #12
+	strb	r3, [r4, #42]
+	b	.L2710
+.L2646:
+	movs	r3, #13
+	str	r2, [r4, #36]
+	strb	r3, [r4, #42]
+	b	.L2647
+.L2621:
+	movs	r1, #64
+	mov	r0, r6
+	bl	flash_wait_device_ready
+	lsls	r3, r0, #25
+	bpl	.L2647
+	movs	r3, #48
+	mla	r4, r3, r5, r4
+	movs	r3, #7
+	str	r0, [r4, #36]
+	strb	r3, [r4, #42]
+	b	.L2647
+.L2715:
 	.align	2
-.L2497:
-	.word	.LANCHOR31
-	.word	.LANCHOR56
-	.size	sblk_xlc_prog_pages, .-sblk_xlc_prog_pages
-	.section	.text.sblk_3d_tlc_dump_prog,"ax",%progbits
+.L2714:
+	.word	.LANCHOR110
+	.word	1145785929
+	.word	.LANCHOR32
+	.word	.LANCHOR175
+	.word	.LANCHOR176
+	.word	.LANCHOR131
+	.word	.LC142
+	.word	.LANCHOR52
+	.word	.LC143
+	.word	.LC144
+	.size	queue_wait_first_req_completed, .-queue_wait_first_req_completed
+	.section	.text.sblk_prog_page,"ax",%progbits
 	.align	1
-	.global	sblk_3d_tlc_dump_prog
+	.global	sblk_prog_page
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	sblk_3d_tlc_dump_prog, %function
-sblk_3d_tlc_dump_prog:
-	@ args = 0, pretend = 0, frame = 0
+	.type	sblk_prog_page, %function
+sblk_prog_page:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L2500
-	push	{r4, r5, r6, r7, lr}
-	movs	r7, #1
-	ldr	r3, [r0, #24]
-	sub	sp, sp, #20
-	mov	r5, r0
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	ldr	r0, .L2500+4
-	rsb	r1, r2, #24
-	lsl	r6, r7, r1
-	lsl	r4, r7, r2
-	lsr	r1, r3, r1
-	subs	r6, r6, #1
-	ands	r6, r6, r3
-	subs	r4, r4, #1
-	mov	r2, r3
-	ands	r4, r4, r1
-	mov	r1, r6
-	uxtb	r4, r4
-	bl	printf
-	ldr	r3, [r5, #12]
-	mov	r1, r7
-	movs	r2, #26
-	str	r6, [sp]
-	movs	r0, #0
-	str	r3, [sp, #8]
-	ldr	r3, [r5, #4]
-	str	r3, [sp, #4]
-	mov	r3, r4
-	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldr	r3, [r5, #12]
-	movs	r2, #26
-	movs	r1, #2
-	str	r6, [sp]
-	movs	r0, #0
-	str	r3, [sp, #8]
-	ldr	r3, [r5, #4]
-	str	r3, [sp, #4]
-	mov	r3, r4
-	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldr	r3, [r5, #12]
-	movs	r2, #16
-	movs	r1, #3
-	str	r6, [sp]
+	ldrh	r3, [r0, #34]
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r0
+	mov	r5, r1
+	cbz	r3, .L2717
+	ldr	r3, .L2746
+	ldr	r3, [r3]
+	lsls	r3, r3, #23
+	bpl	.L2717
+	mov	r2, r1
+	ldr	r1, [r0, #24]
+	ldr	r0, .L2746+4
+	bl	printf
+.L2717:
+	ldr	fp, .L2746+40
+	movs	r7, #0
+.L2718:
+	cbnz	r5, .L2729
+.L2745:
 	movs	r0, #0
-	str	r3, [sp, #8]
-	ldr	r3, [r5, #4]
-	str	r3, [sp, #4]
-	mov	r3, r4
-	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	movs	r1, #64
-	ldr	r0, [r5, #24]
-	add	sp, sp, #20
+	add	sp, sp, #8
 	@ sp needed
-	pop	{r4, r5, r6, r7, lr}
-	b	flash_wait_device_ready
-.L2501:
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2729:
+	ldrb	r8, [r4]	@ zero_extendqisi2
+	ldr	r6, [r4, #24]
+.L2719:
+	movs	r1, #1
+	mov	r0, r6
+	bl	queue_lun_state
+	cbnz	r0, .L2720
+	cmp	r5, #1
+	beq	.L2721
+	ldr	r3, .L2746+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2721
+	ldr	r3, .L2746+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2722
+.L2721:
+	mov	r0, r4
+	bl	queue_prog_cmd
+.L2723:
+	subs	r5, r5, #1
+	beq	.L2745
+	ldr	r4, .L2746+16
+	add	r8, r8, r8, lsl #1
+	add	r4, r4, r8, lsl #4
+	b	.L2718
+.L2720:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L2719
+.L2722:
+	ldrb	r1, [fp]	@ zero_extendqisi2
+	movs	r2, #1
+	rsb	r3, r1, #24
+	lsls	r2, r2, r1
+	lsr	r3, r6, r3
+	subs	r2, r2, #1
+	ands	r3, r3, r2
+	uxth	r3, r3
+	str	r3, [sp, #4]
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	cmp	r3, #255
+	bne	.L2724
+	mov	r2, #696
+	ldr	r1, .L2746+20
+	ldr	r0, .L2746+24
+	bl	printf
+.L2724:
+	ldr	r2, .L2746+16
+	movs	r1, #48
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	mov	r10, #1
+	mla	r3, r1, r3, r2
+	ldr	r1, [r3, #24]
+	ldrb	r3, [fp]	@ zero_extendqisi2
+	rsb	r2, r3, #24
+	lsl	r3, r10, r3
+	lsr	r0, r1, r2
+	subs	r3, r3, #1
+	ands	r3, r3, r0
+	ldr	r0, [sp, #4]
+	uxth	r3, r3
+	cmp	r0, r3
+	bne	.L2725
+	ldr	r3, .L2746+28
+	ldrh	r0, [r3]
+	ldr	r3, .L2746+32
+	ldrb	ip, [r3]	@ zero_extendqisi2
+	subs	r3, r2, r0
+	lsl	r2, r10, r0
+	lsl	r3, r10, r3
+	subs	r2, r2, #1
+	subs	r3, r3, #1
+	uxth	r2, r2
+	add	ip, ip, #-1
+	and	r3, r3, ip
+	uxth	r3, r3
+	and	lr, r2, r6
+	ands	r2, r2, r1
+	lsrs	r6, r6, r0
+	lsrs	r1, r1, r0
+	ands	r6, r6, r3
+	ands	r1, r1, r3
+	cmp	r6, r1
+	beq	.L2725
+	cmp	lr, r2
+	bne	.L2725
+	cmp	r7, ip
+	beq	.L2725
+	ldr	r3, [r4, #12]
+	movs	r0, #17
+	ldr	r2, [r4, #4]
+	add	r7, r7, r10
+	ldr	r1, [r4, #24]
+	bl	flash_start_page_prog
+	movs	r3, #9
+	strb	r10, [r4, #43]
+	strb	r3, [r4, #42]
+	movs	r3, #255
+	strb	r3, [r4]
+	mov	r1, r4
+	ldr	r0, .L2746+36
+	bl	buf_add_tail
+	b	.L2723
+.L2725:
+	mov	r0, r4
+	movs	r7, #0
+	bl	queue_prog_cmd
+	b	.L2723
+.L2747:
 	.align	2
-.L2500:
-	.word	.LANCHOR31
-	.word	.LC135
-	.size	sblk_3d_tlc_dump_prog, .-sblk_3d_tlc_dump_prog
-	.section	.text.flash_start_3d_mlc_page_prog,"ax",%progbits
+.L2746:
+	.word	.LANCHOR14
+	.word	.LC145
+	.word	.LANCHOR45
+	.word	.LANCHOR37
+	.word	.LANCHOR56
+	.word	.LANCHOR184
+	.word	.LC0
+	.word	.LANCHOR75
+	.word	.LANCHOR76
+	.word	.LANCHOR60
+	.word	.LANCHOR32
+	.size	sblk_prog_page, .-sblk_prog_page
+	.section	.text.sblk_wait_write_queue_completed,"ax",%progbits
 	.align	1
-	.global	flash_start_3d_mlc_page_prog
+	.global	sblk_wait_write_queue_completed
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_start_3d_mlc_page_prog, %function
-flash_start_3d_mlc_page_prog:
-	@ args = 4, pretend = 0, frame = 0
+	.type	sblk_wait_write_queue_completed, %function
+sblk_wait_write_queue_completed:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, lr}
-	mov	r5, r2
-	ldr	r4, .L2505
-	mov	r7, r0
-	mov	r6, r1
-	mov	r8, r3
-	ldrb	r2, [r4]	@ zero_extendqisi2
-	cmp	r2, r1
-	bhi	.L2503
-	mov	r2, #772
-	ldr	r1, .L2505+4
-	ldr	r0, .L2505+8
-	bl	printf
-.L2503:
+	push	{r4, lr}
+	ldr	r4, .L2751
+.L2749:
 	ldrb	r3, [r4]	@ zero_extendqisi2
-	cmp	r3, r6
-	bls	.L2502
-	ldr	r3, .L2505+12
-	ldrb	r4, [r3, r6]	@ zero_extendqisi2
-	ldr	r3, .L2505+16
-	mov	r0, r4
-	ldr	r6, [r3]
-	bl	nandc_cs
-	movs	r3, #128
-	mov	r0, r5
-	add	r4, r6, r4, lsl #8
-	str	r3, [r4, #2056]
-	movs	r3, #0
-	str	r3, [r4, #2052]
-	str	r3, [r4, #2052]
-	uxtb	r3, r5
-	str	r3, [r4, #2052]
-	lsrs	r3, r5, #8
-	str	r3, [r4, #2052]
-	lsrs	r3, r5, #16
-	str	r3, [r4, #2052]
-	bl	nandc_set_seed
-	ldr	r1, .L2505+20
-	mov	r2, r8
-	ldr	r3, [sp, #24]
-	movs	r0, #1
-	ldrb	r1, [r1, #9]	@ zero_extendqisi2
-	bl	nandc_xfer_start
-	bl	nandc_xfer_done
-	str	r7, [r4, #2056]
-.L2502:
-	pop	{r4, r5, r6, r7, r8, pc}
-.L2506:
+	cmp	r3, #255
+	bne	.L2750
+	pop	{r4, pc}
+.L2750:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L2749
+.L2752:
 	.align	2
-.L2505:
-	.word	.LANCHOR18
-	.word	.LANCHOR174
-	.word	.LC0
-	.word	.LANCHOR30
-	.word	.LANCHOR13
-	.word	.LANCHOR32
-	.size	flash_start_3d_mlc_page_prog, .-flash_start_3d_mlc_page_prog
-	.section	.text.sblk_3d_mlc_prog_pages,"ax",%progbits
+.L2751:
+	.word	.LANCHOR60
+	.size	sblk_wait_write_queue_completed, .-sblk_wait_write_queue_completed
+	.section	.text.ftl_flush,"ax",%progbits
 	.align	1
-	.global	sblk_3d_mlc_prog_pages
+	.global	ftl_flush
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	sblk_3d_mlc_prog_pages, %function
-sblk_3d_mlc_prog_pages:
+	.type	ftl_flush, %function
+ftl_flush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r7, r1
-	ldr	r10, .L2512
-	add	r5, r0, #8
-	ldr	fp, .L2512+4
-.L2508:
-	cbnz	r7, .L2511
-	mov	r0, r7
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2511:
-	ldr	r3, [r5, #-8]
-	ldr	r4, [r3, #24]
-.L2509:
-	movs	r1, #1
-	mov	r0, r4
-	bl	queue_lun_state
-	cmp	r0, #0
-	bne	.L2510
-	ldr	r3, [r5, #-8]
-	mov	r8, #1
-	subs	r7, r7, #1
-	adds	r5, r5, #8
-	ldr	r2, [r3, #24]
-	ldrb	r3, [r10]	@ zero_extendqisi2
-	rsb	r1, r3, #24
-	lsl	r6, r8, r1
-	lsl	r4, r8, r3
-	subs	r6, r6, #1
-	subs	r4, r4, #1
-	ands	r6, r6, r2
-	lsrs	r2, r2, r1
-	ands	r4, r4, r2
-	uxtb	r4, r4
-	mov	r0, r4
-	bl	zftl_flash_exit_slc_mode
-	ldr	r3, [r5, #-16]
-	mov	r1, r4
-	movs	r0, #16
-	ldr	r2, [r3, #12]
-	str	r2, [sp]
-	mov	r2, r6
-	ldr	r3, [r3, #4]
-	bl	flash_start_3d_mlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldr	r3, [r5, #-12]
-	mov	r1, r4
-	movs	r0, #16
-	ldr	r2, [r3, #12]
-	str	r2, [sp]
-	add	r2, r6, r8
-	ldr	r3, [r3, #4]
-	bl	flash_start_3d_mlc_page_prog
-	bl	nandc_de_cs.constprop.30
-	ldr	r1, [r5, #-16]
-	movs	r3, #4
-	mov	r0, fp
-	strb	r3, [r1, #42]
+	push	{r3, r4, r5, lr}
+	ldr	r4, .L2758
+	ldr	r5, .L2758+4
+	ldrb	r1, [r4]	@ zero_extendqisi2
+	cbz	r1, .L2754
+	ldrb	r0, [r5]	@ zero_extendqisi2
+	ldr	r3, .L2758+8
+	add	r0, r0, r0, lsl #1
+	add	r0, r3, r0, lsl #4
+	bl	sblk_prog_page
+.L2754:
 	movs	r3, #255
-	strb	r8, [r1, #43]
-	strb	r3, [r1]
-	bl	buf_add_tail
-	b	.L2508
-.L2510:
-	bl	queue_wait_first_req_completed
-	bl	queue_remove_completed_req
-	b	.L2509
-.L2513:
+	strb	r3, [r5]
+	movs	r3, #0
+	strb	r3, [r4]
+	bl	sblk_wait_write_queue_completed
+	bl	ftl_write_completed
+	movw	r0, #65535
+	pop	{r3, r4, r5, lr}
+	b	ftl_vpn_decrement
+.L2759:
 	.align	2
-.L2512:
-	.word	.LANCHOR31
+.L2758:
+	.word	.LANCHOR129
+	.word	.LANCHOR185
 	.word	.LANCHOR56
-	.size	sblk_3d_mlc_prog_pages, .-sblk_3d_mlc_prog_pages
-	.section	.text.sblk_mlc_dump_prog,"ax",%progbits
+	.size	ftl_flush, .-ftl_flush
+	.section	.text.ftl_read_page,"ax",%progbits
 	.align	1
-	.global	sblk_mlc_dump_prog
+	.global	ftl_read_page
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	sblk_mlc_dump_prog, %function
-sblk_mlc_dump_prog:
-	@ args = 0, pretend = 0, frame = 0
+	.type	ftl_read_page, %function
+ftl_read_page:
+	@ args = 4, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2515
-	push	{r0, r1, r4, r5, r6, lr}
-	mov	r5, r0
-	ldr	r2, [r0, #24]
-	ldrb	r4, [r3]	@ zero_extendqisi2
-	movs	r3, #1
-	rsb	r1, r4, #24
-	lsl	r6, r3, r1
-	lsl	r4, r3, r4
-	subs	r6, r6, #1
-	subs	r4, r4, #1
-	ands	r6, r6, r2
-	lsrs	r2, r2, r1
-	ands	r4, r4, r2
-	uxtb	r4, r4
-	mov	r0, r4
-	bl	zftl_flash_exit_slc_mode
-	ldr	r2, [r5, #24]
-	mov	r1, r6
-	ldr	r0, .L2515+4
-	adds	r3, r2, #1
-	bl	printf
-	ldr	r3, [r5, #12]
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r4, r0
+	ldr	r8, [sp, #24]
+	mov	r5, r1
+	mov	r6, r2
+	mov	r7, r3
+	bl	sblk_wait_write_queue_completed
+	str	r8, [sp, #24]
+	mov	r3, r7
 	mov	r2, r6
-	mov	r1, r4
-	movs	r0, #16
-	str	r3, [sp]
-	ldr	r3, [r5, #4]
-	bl	flash_start_3d_mlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldr	r3, [r5, #12]
-	adds	r2, r6, #1
-	mov	r1, r4
-	movs	r0, #16
-	str	r3, [sp]
-	ldr	r3, [r5, #4]
-	bl	flash_start_3d_mlc_page_prog
-	bl	nandc_wait_flash_ready
-	movs	r1, #64
-	ldr	r0, [r5, #24]
-	bl	flash_wait_device_ready
-	bl	nandc_de_cs.constprop.30
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, pc}
-.L2516:
-	.align	2
-.L2515:
-	.word	.LANCHOR31
-	.word	.LC136
-	.size	sblk_mlc_dump_prog, .-sblk_mlc_dump_prog
-	.section	.text.flash_start_page_prog,"ax",%progbits
+	mov	r1, r5
+	mov	r0, r4
+	pop	{r4, r5, r6, r7, r8, lr}
+	b	flash_read_page_en
+	.size	ftl_read_page, .-ftl_read_page
+	.section	.text.ftl_read_ppa_page,"ax",%progbits
 	.align	1
-	.global	flash_start_page_prog
+	.global	ftl_read_ppa_page
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_start_page_prog, %function
-flash_start_page_prog:
-	@ args = 0, pretend = 0, frame = 8
+	.type	ftl_read_ppa_page, %function
+ftl_read_ppa_page:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	fp, r2
-	str	r3, [sp, #4]
-	mov	r8, r1
-	ldr	r3, .L2527
-	ldr	r7, .L2527+4
-	str	r0, [sp]
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	movs	r3, #1
-	rsb	r4, r2, #24
-	lsls	r3, r3, r2
-	lsr	r2, r1, r4
-	subs	r3, r3, #1
-	ands	r3, r3, r2
-	ldrb	r2, [r7]	@ zero_extendqisi2
-	uxtb	r10, r3
-	cmp	r2, r10
-	bhi	.L2518
-	movw	r2, #821
-	ldr	r1, .L2527+8
-	ldr	r0, .L2527+12
-	bl	printf
-.L2518:
-	ldrb	r2, [r7]	@ zero_extendqisi2
-	cmp	r2, r10
-	bls	.L2517
-	movs	r2, #1
-	lsl	r4, r2, r4
-	ldr	r2, .L2527+16
-	subs	r4, r4, #1
-	ldrb	r6, [r2, r10]	@ zero_extendqisi2
-	and	r4, r4, r8
-	ldr	r2, .L2527+20
-	ldr	r5, [r2]
-	bl	nandc_rdy_status
-	cbnz	r0, .L2520
-	ldrb	r2, [r7]	@ zero_extendqisi2
-	cmp	r2, #1
-	bne	.L2521
-	bl	nandc_wait_flash_ready
-.L2520:
-	mov	r0, r6
-	bl	hynix_reconfig_rr_para
-	mov	r0, r6
-	bl	nandc_cs
-	tst	r8, #50331648
-	bne	.L2522
-	mov	r0, r4
-	bl	slc_phy_page_address_calc
-	ldr	r3, .L2527+24
-	mov	r4, r0
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2523
-	mov	r0, r6
-	bl	zftl_flash_enter_slc_mode
-.L2523:
-	add	r5, r5, r6, lsl #8
-	movs	r3, #128
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
+	mov	r10, r3
+	ldr	r3, .L2762
+	mov	r6, r0
+	movs	r5, #1
+	mov	r7, r1
+	mov	r8, r2
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	rsb	r4, r0, #24
+	lsls	r5, r5, r0
+	lsr	r4, r6, r4
+	subs	r5, r5, #1
+	ands	r4, r4, r5
+	uxtb	r4, r4
+	bl	sblk_wait_write_queue_completed
+	str	r10, [sp]
+	mov	r3, r8
+	mov	r2, r7
+	mov	r1, r6
 	mov	r0, r4
-	str	r3, [r5, #2056]
-	movs	r3, #0
-	str	r3, [r5, #2052]
-	str	r3, [r5, #2052]
-	uxtb	r3, r4
-	str	r3, [r5, #2052]
-	lsrs	r3, r4, #8
-	str	r3, [r5, #2052]
-	lsrs	r3, r4, #16
-	str	r3, [r5, #2052]
-	bl	nandc_set_seed
-	ldr	r1, .L2527+28
-	mov	r2, fp
-	ldr	r3, [sp, #4]
-	movs	r0, #1
-	ldrb	r1, [r1, #9]	@ zero_extendqisi2
-	bl	nandc_xfer_start
-	bl	nandc_xfer_done
-	movs	r0, #200
-	bl	udelay
-	ldr	r3, [sp]
-	str	r3, [r5, #2056]
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
-	b	nandc_de_cs.constprop.30
-.L2521:
-	movs	r2, #64
-	mov	r1, r4
-	mov	r0, r10
-	bl	flash_wait_device_ready_raw
-	b	.L2520
-.L2522:
-	mov	r0, r6
-	bl	zftl_flash_exit_slc_mode
-	b	.L2523
-.L2517:
-	add	sp, sp, #8
+	bl	flash_read_page_en
+	add	sp, sp, #12
 	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2528:
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.L2763:
 	.align	2
-.L2527:
-	.word	.LANCHOR31
-	.word	.LANCHOR18
-	.word	.LANCHOR175
-	.word	.LC0
-	.word	.LANCHOR30
-	.word	.LANCHOR13
-	.word	.LANCHOR0
+.L2762:
 	.word	.LANCHOR32
-	.size	flash_start_page_prog, .-flash_start_page_prog
-	.section	.text.queue_prog_cmd,"ax",%progbits
+	.size	ftl_read_ppa_page, .-ftl_read_ppa_page
+	.section	.text.sblk_read_page,"ax",%progbits
 	.align	1
+	.global	sblk_read_page
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	queue_prog_cmd, %function
-queue_prog_cmd:
-	@ args = 0, pretend = 0, frame = 0
+	.type	sblk_read_page, %function
+sblk_read_page:
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	mov	r4, r0
-	ldr	r3, [r0, #12]
-	ldr	r2, [r0, #4]
-	ldr	r1, [r0, #24]
-	movs	r0, #16
-	bl	flash_start_page_prog
-	ldr	r3, .L2537
-	ldr	r2, [r4, #24]
-	ldrb	r0, [r3]	@ zero_extendqisi2
-	cmp	r0, #255
-	beq	.L2530
-	ldr	r3, .L2537+4
-	movs	r7, #48
-	ldr	ip, .L2537+8
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	movs	r3, #1
-	mov	lr, ip
-	rsb	r6, r1, #24
-	lsls	r3, r3, r1
-	asrs	r2, r2, r6
-	subs	r3, r3, #1
-	uxth	r3, r3
-	ands	r2, r2, r3
-.L2532:
-	mla	r5, r7, r0, ip
-	ldr	r1, [r5, #24]
-	lsrs	r1, r1, r6
-	ands	r1, r1, r3
-	cmp	r2, r1
-	bne	.L2531
-	add	r1, r5, #42
-	ldrb	r5, [r5, #42]	@ zero_extendqisi2
-	cmp	r5, #7
-	bne	.L2531
-	movs	r3, #3
-	strb	r3, [r1]
-.L2530:
-	movs	r3, #3
-	mov	r1, r4
-	strb	r3, [r4, #42]
-	movs	r3, #1
-	strb	r3, [r4, #43]
-	movs	r3, #255
-	strb	r3, [r4]
-	ldr	r0, .L2537
-	pop	{r3, r4, r5, r6, r7, lr}
-	b	buf_add_tail
-.L2531:
-	muls	r0, r7, r0
-	ldrb	r0, [lr, r0]	@ zero_extendqisi2
-	cmp	r0, #255
-	bne	.L2532
-	b	.L2530
-.L2538:
-	.align	2
-.L2537:
-	.word	.LANCHOR56
-	.word	.LANCHOR31
-	.word	.LANCHOR52
-	.size	queue_prog_cmd, .-queue_prog_cmd
-	.section	.text.sblk_prog_page,"ax",%progbits
-	.align	1
-	.global	sblk_prog_page
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	sblk_prog_page, %function
-sblk_prog_page:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldrh	r3, [r0, #34]
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r7, r0
+	sub	sp, sp, #24
+	mov	r6, r1
 	mov	r4, r0
 	mov	r5, r1
-	cbz	r3, .L2540
-	ldr	r3, .L2566
-	ldr	r3, [r3]
-	lsls	r3, r3, #23
-	bpl	.L2540
-	mov	r2, r1
-	ldr	r1, [r0, #24]
-	ldr	r0, .L2566+4
-	bl	printf
-.L2540:
-	ldr	fp, .L2566+36
-	movs	r7, #0
-.L2541:
-	cbnz	r5, .L2552
-.L2565:
-	movs	r0, #0
-	add	sp, sp, #8
+.L2765:
+	cbnz	r5, .L2775
+.L2788:
+	ldr	r4, .L2789
+.L2776:
+	cmp	r6, #0
+	bne	.L2778
+	mov	r0, r6
+	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2552:
-	ldrb	r8, [r4]	@ zero_extendqisi2
-	ldr	r6, [r4, #24]
-.L2542:
-	movs	r1, #1
-	mov	r0, r6
+.L2775:
+	ldr	fp, [r4, #24]
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	str	r3, [sp, #8]
+.L2766:
+	movs	r1, #0
+	mov	r0, fp
 	bl	queue_lun_state
-	cbnz	r0, .L2543
+	cbnz	r0, .L2767
 	cmp	r5, #1
-	beq	.L2544
-	ldr	r3, .L2566+8
+	beq	.L2772
+	ldr	r3, .L2789+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L2545
-.L2544:
+	cbnz	r3, .L2769
+.L2772:
 	mov	r0, r4
-	bl	queue_prog_cmd
-.L2546:
-	subs	r5, r5, #1
-	beq	.L2565
-	ldr	r4, .L2566+12
-	add	r8, r8, r8, lsl #1
-	add	r4, r4, r8, lsl #4
-	b	.L2541
-.L2543:
+	bl	queue_read_cmd
+	b	.L2770
+.L2767:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2542
-.L2545:
-	ldrb	r1, [fp]	@ zero_extendqisi2
+	b	.L2766
+.L2769:
+	ldr	r3, .L2789+8
 	movs	r2, #1
+	ldrb	r1, [r3]	@ zero_extendqisi2
 	rsb	r3, r1, #24
 	lsls	r2, r2, r1
-	lsr	r3, r6, r3
+	lsr	r3, fp, r3
 	subs	r2, r2, #1
 	ands	r3, r3, r2
+	ldrb	r2, [r4]	@ zero_extendqisi2
 	uxth	r3, r3
+	cmp	r2, #255
+	bne	.L2771
+	movw	r2, #781
+	ldr	r1, .L2789+12
+	ldr	r0, .L2789+16
 	str	r3, [sp, #4]
-	ldrb	r3, [r4]	@ zero_extendqisi2
-	cmp	r3, #255
-	bne	.L2547
-	movw	r2, #583
-	ldr	r1, .L2566+16
-	ldr	r0, .L2566+20
 	bl	printf
-.L2547:
-	ldr	r2, .L2566+12
-	movs	r1, #48
-	ldrb	r3, [r4]	@ zero_extendqisi2
-	mov	r10, #1
-	mla	r3, r1, r3, r2
-	ldr	r1, [r3, #24]
-	ldrb	r3, [fp]	@ zero_extendqisi2
-	rsb	r2, r3, #24
-	lsl	r3, r10, r3
-	lsr	r0, r1, r2
-	subs	r3, r3, #1
-	ands	r3, r3, r0
-	ldr	r0, [sp, #4]
-	uxth	r3, r3
-	cmp	r0, r3
-	bne	.L2548
-	ldr	r3, .L2566+24
-	ldrh	r0, [r3]
-	ldr	r3, .L2566+28
-	ldrb	ip, [r3]	@ zero_extendqisi2
-	subs	r3, r2, r0
-	lsl	r2, r10, r0
-	lsl	r3, r10, r3
-	subs	r2, r2, #1
-	subs	r3, r3, #1
+	ldr	r3, [sp, #4]
+.L2771:
+	ldrb	r2, [r4]	@ zero_extendqisi2
+	movs	r0, #1
+	ldr	r8, .L2789
+	str	r2, [sp, #12]
+	movs	r2, #48
+	ldr	r1, [sp, #12]
+	muls	r2, r1, r2
+	add	r10, r8, r2
+	str	r2, [sp, #4]
+	ldr	r2, .L2789+8
+	ldr	r1, [r10, #24]
+	ldrb	ip, [r2]	@ zero_extendqisi2
+	rsb	r2, ip, #24
+	lsl	r0, r0, ip
+	lsr	r2, r1, r2
+	subs	r0, r0, #1
+	ands	r2, r2, r0
 	uxth	r2, r2
-	add	ip, ip, #-1
-	and	r3, r3, ip
-	uxth	r3, r3
-	and	lr, r2, r6
-	ands	r2, r2, r1
-	lsrs	r6, r6, r0
-	lsrs	r1, r1, r0
-	ands	r6, r6, r3
-	ands	r1, r1, r3
-	cmp	r6, r1
-	beq	.L2548
-	cmp	lr, r2
-	bne	.L2548
-	cmp	r7, ip
-	beq	.L2548
-	ldr	r3, [r4, #12]
-	movs	r0, #17
-	ldr	r2, [r4, #4]
-	add	r7, r7, r10
-	ldr	r1, [r4, #24]
-	bl	flash_start_page_prog
-	movs	r3, #9
-	strb	r10, [r4, #43]
-	strb	r3, [r4, #42]
-	movs	r3, #255
-	strb	r3, [r4]
+	cmp	r3, r2
+	bne	.L2772
+	ldr	r3, .L2789+20
+	ldrh	r3, [r3]
+	add	fp, fp, r3
+	cmp	r1, fp
+	bne	.L2772
+	ldr	r3, [sp, #4]
+	mov	fp, #255
+	ldr	r0, [r4, #24]
+	subs	r5, r5, #1
+	ldrb	r3, [r8, r3]	@ zero_extendqisi2
+	str	r3, [sp, #8]
+	bl	flash_start_plane_read
+	movs	r2, #2
+	movs	r3, #0
+	strb	r2, [r4, #42]
 	mov	r1, r4
-	ldr	r0, .L2566+32
+	strb	r3, [r4, #43]
+	ldr	r0, .L2789+24
+	strb	fp, [r4]
+	str	r2, [sp, #20]
+	str	r3, [sp, #16]
 	bl	buf_add_tail
-	b	.L2546
-.L2548:
-	mov	r0, r4
-	movs	r7, #0
-	bl	queue_prog_cmd
-	b	.L2546
-.L2567:
+	ldr	r3, [sp, #16]
+	ldr	r2, [sp, #20]
+	ldr	r0, .L2789+24
+	strb	r3, [r10, #43]
+	ldr	r3, [sp, #4]
+	strb	r2, [r10, #42]
+	strb	fp, [r8, r3]
+	ldr	r3, [sp, #12]
+	add	r1, r3, r3, lsl #1
+	add	r1, r8, r1, lsl #4
+	bl	buf_add_tail
+.L2770:
+	subs	r5, r5, #1
+	beq	.L2788
+	ldr	r3, [sp, #8]
+	add	r4, r3, r3, lsl #1
+	ldr	r3, .L2789
+	add	r4, r3, r4, lsl #4
+	b	.L2765
+.L2778:
+	ldrb	r3, [r7, #42]	@ zero_extendqisi2
+	cmp	r3, #13
+	bne	.L2777
+	ldrb	r3, [r7]	@ zero_extendqisi2
+	subs	r6, r6, #1
+	cmp	r3, #255
+	itt	ne
+	addne	r3, r3, r3, lsl #1
+	addne	r7, r4, r3, lsl #4
+.L2777:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L2776
+.L2790:
 	.align	2
-.L2566:
-	.word	.LANCHOR14
-	.word	.LC137
-	.word	.LANCHOR41
-	.word	.LANCHOR52
-	.word	.LANCHOR176
-	.word	.LC0
-	.word	.LANCHOR68
-	.word	.LANCHOR69
+.L2789:
 	.word	.LANCHOR56
-	.word	.LANCHOR31
-	.size	sblk_prog_page, .-sblk_prog_page
-	.section	.text.ftl_flush,"ax",%progbits
+	.word	.LANCHOR186
+	.word	.LANCHOR32
+	.word	.LANCHOR187
+	.word	.LC0
+	.word	.LANCHOR111
+	.word	.LANCHOR60
+	.size	sblk_read_page, .-sblk_read_page
+	.section	.text.gc_check_data_one_wl,"ax",%progbits
 	.align	1
-	.global	ftl_flush
+	.global	gc_check_data_one_wl
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_flush, %function
-ftl_flush:
+	.type	gc_check_data_one_wl, %function
+gc_check_data_one_wl:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	ldr	r4, .L2573
-	ldr	r5, .L2573+4
-	ldrb	r1, [r4]	@ zero_extendqisi2
-	cbz	r1, .L2569
-	ldrb	r0, [r5]	@ zero_extendqisi2
-	ldr	r3, .L2573+8
-	add	r0, r0, r0, lsl #1
-	add	r0, r3, r0, lsl #4
-	bl	sblk_prog_page
-.L2569:
-	movs	r3, #255
-	strb	r3, [r5]
-	movs	r3, #0
-	strb	r3, [r4]
-	bl	sblk_wait_write_queue_completed
-	bl	ftl_write_completed
-	movw	r0, #65535
-	pop	{r3, r4, r5, lr}
-	b	ftl_vpn_decrement
-.L2574:
-	.align	2
-.L2573:
-	.word	.LANCHOR123
-	.word	.LANCHOR177
-	.word	.LANCHOR52
-	.size	ftl_flush, .-ftl_flush
-	.section	.text.flash_prog_page_en,"ax",%progbits
-	.align	1
-	.global	flash_prog_page_en
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	flash_prog_page_en, %function
-flash_prog_page_en:
-	@ args = 8, pretend = 0, frame = 16
-	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r8, r2
-	ldr	r7, .L2610
 	sub	sp, sp, #24
+	ldr	r4, .L2824
+	ldr	r3, .L2824+4
+	ldr	r2, [r4, #8]
+	ldr	r8, [r3]
 	mov	fp, r3
-	mov	r6, r0
-	ldrb	r3, [sp, #60]	@ zero_extendqisi2
-	mov	r4, r1
-	ldrb	r2, [r7]	@ zero_extendqisi2
-	ubfx	r5, r1, #24, #2
-	str	r3, [sp, #20]
-	cmp	r2, r0
-	bhi	.L2576
-	movw	r2, #554
-	ldr	r1, .L2610+4
-	ldr	r0, .L2610+8
+	cbnz	r2, .L2792
+	movs	r0, #1
+	bl	buf_alloc
+	str	r0, [r4, #8]
+.L2792:
+	ldr	r5, [r4, #8]
+	cbnz	r5, .L2793
+	movw	r2, #729
+	ldr	r1, .L2824+8
+	ldr	r0, .L2824+12
 	bl	printf
-.L2576:
-	ldrb	r3, [r7]	@ zero_extendqisi2
-	cmp	r3, r6
-	bls	.L2587
-	ldr	r3, .L2610+12
-	ldrb	r3, [r3, r6]	@ zero_extendqisi2
-	str	r3, [sp, #12]
-	cmp	r5, #0
-	bne	.L2589
-	ldr	r3, .L2610+16
-	ldr	r10, .L2610+64
+.L2793:
+	add	r10, r8, #96
+	movs	r7, #0
+.L2794:
+	ldrb	r3, [r8, #89]	@ zero_extendqisi2
+	cmp	r7, r3
+	bge	.L2805
+	movs	r6, #1
+	b	.L2806
+.L2804:
+	ldr	r2, .L2824+16
+	ldrh	r3, [r10]
+	ldrh	r2, [r2]
+	muls	r2, r3, r2
+	ldr	r3, .L2824+20
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	cmp	r1, #2
+	beq	.L2795
+	ldr	r3, .L2824+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2579
-	ldrb	r3, [r10]	@ zero_extendqisi2
-	cmp	r3, #0
-	beq	.L2589
-.L2579:
-	ldr	r3, .L2610+20
-	mov	r0, r4
-	ldrh	r7, [r3]
-	mov	r1, r7
-	bl	__aeabi_uidiv
-	mov	r1, r7
-	mul	r5, r7, r0
-	mov	r0, r4
-	bl	__aeabi_uidivmod
-	ldrb	r3, [r10]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L2580
-	add	r5, r5, r1, lsl #1
-.L2584:
-	ldr	r3, .L2610+24
+	beq	.L2796
+.L2795:
+	ldrh	r3, [r4, #12]
+	subs	r3, r3, #1
+	add	r3, r3, r2
+	add	r3, r3, r6
+	orr	r3, r3, r1, lsl #24
+.L2823:
+	movs	r1, #1
+	str	r3, [r5, #24]
+	mov	r0, r5
+	bl	sblk_read_page
+	ldr	r2, [r5, #36]
+	ldr	r1, .L2824+28
+	adds	r0, r2, #1
+	beq	.L2800
+	ldr	r3, [r1]
+	ldrh	ip, [r4, #18]
+	ldr	r0, [r5, #12]
+	ldr	lr, [r3, ip, lsl #2]
+	ldr	r3, [r0, #4]
+	cmp	lr, r3
+	bne	.L2800
+	ldr	r3, .L2824+32
+	ldr	r0, [r0, #8]
 	ldr	r3, [r3]
-	lsls	r1, r3, #27
-	bpl	.L2581
-	mov	r3, r5
-	mov	r2, r4
-	ldr	r1, [sp, #12]
-	ldr	r0, .L2610+28
+	ldr	r3, [r3, ip, lsl #2]
+	cmp	r3, r0
+	beq	.L2801
+.L2800:
+	ldrh	r3, [r4, #18]
+	ldr	r1, [r1]
+	lsls	r0, r3, #2
+	ldr	r3, [r1, r3, lsl #2]
+	adds	r1, r3, #1
+	beq	.L2801
+	ldr	r1, .L2824+36
+	ldr	r1, [r1]
+	lsls	r1, r1, #21
+	bpl	.L2802
+	ldr	r1, [r5, #12]
+	ldr	r4, [r1, #12]
+	str	r4, [sp, #16]
+	ldr	r4, [r1, #8]
+	str	r4, [sp, #12]
+	ldr	r4, [r1, #4]
+	str	r4, [sp, #8]
+	ldr	r1, [r1]
+	str	r1, [sp, #4]
+	ldr	r1, .L2824+32
+	ldr	r1, [r1]
+	ldr	r1, [r1, r0]
+	ldr	r0, .L2824+40
+	str	r1, [sp]
+	ldr	r1, [r5, #24]
 	bl	printf
-.L2581:
-	ldr	r3, [sp, #56]
-	mov	r2, r8
-	mov	r1, r5
-	ldr	r0, [sp, #12]
-	str	r3, [sp]
-	mov	r3, fp
-	bl	flash_prog_page
-	ldr	r3, [sp, #20]
-	str	r0, [sp, #16]
-	cmp	r3, #0
-	beq	.L2582
-	ldr	r3, [sp, #56]
-	mov	r1, r4
-	ldr	r10, .L2610+44
-	mov	r0, r6
-	ldr	r2, .L2610+32
-	str	r3, [sp]
-	ldr	r3, [r10]
-	ldr	r2, [r2]
-	bl	flash_read_page_en
-	adds	r2, r0, #1
-	mov	r7, r0
-	beq	.L2583
-	cmp	r0, #512
-	beq	.L2583
-	ldr	r3, .L2610+32
-	ldr	r2, [r8]
-	ldr	r3, [r3]
+.L2802:
+	ldr	r3, .L2824+44
+	movs	r0, #0
+	ldrh	r2, [r8, #80]
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	ldr	r3, .L2824+48
 	ldr	r3, [r3]
-	cmp	r2, r3
-	bne	.L2583
-	ldr	r3, [r10]
+	strh	r0, [r3, r2, lsl #1]	@ movhi
 	ldr	r2, [fp]
+	ldr	r3, [r2, #556]
+	adds	r3, r3, #1
+	str	r3, [r2, #556]
+	ldr	r3, .L2824+52
 	ldr	r3, [r3]
+	ldr	r2, [r3, #156]
+	ldr	r3, .L2824+56
 	cmp	r2, r3
-	beq	.L2582
-.L2583:
-	movs	r3, #4
-	mov	r1, r8
-	mov	r2, r3
-	ldr	r0, .L2610+36
-	bl	rknand_print_hex
-	movs	r3, #4
-	mov	r1, fp
-	mov	r2, r3
-	ldr	r0, .L2610+40
-	bl	rknand_print_hex
-	ldr	r1, .L2610+44
-	movs	r3, #4
-	mov	r2, r3
-	ldr	r0, .L2610+48
-	ldr	r1, [r1]
-	bl	rknand_print_hex
-	ldr	r1, .L2610+32
-	movs	r3, #4
-	mov	r2, r3
-	ldr	r0, .L2610+52
-	ldr	r1, [r1]
-	bl	rknand_print_hex
-	cmp	r7, #512
-	beq	.L2584
-.L2586:
-	mov	r1, r4
-	ldr	r0, .L2610+56
-	bl	printf
-	movw	r2, #587
-	ldr	r1, .L2610+4
-	ldr	r0, .L2610+8
-	bl	printf
-.L2587:
+	bne	.L2809
+	cbnz	r1, .L2809
+	ldr	r3, .L2824+60
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L2809
+	ldr	r0, [r5, #24]
+	bl	ftl_mask_bad_block
+.L2809:
 	mov	r0, #-1
-	b	.L2575
-.L2580:
-	ldr	r3, .L2610+60
-	ldrh	r1, [r3, r1, lsl #1]
-	add	r5, r5, r1
-	b	.L2584
-.L2589:
-.L2578:
-	mov	r5, r4
-	b	.L2584
-.L2582:
-	ldr	r0, [sp, #16]
-	adds	r3, r0, #1
-	beq	.L2586
-.L2575:
+	b	.L2791
+.L2796:
+	cmp	r1, #3
+	ldrh	r3, [r4, #12]
+	bne	.L2798
+	ldr	r1, .L2824+64
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	cbz	r1, .L2799
+	add	r3, r3, r3, lsl #1
+	subs	r3, r3, #1
+	add	r3, r3, r2
+	add	r3, r3, r6
+	orr	r3, r3, #50331648
+	b	.L2823
+.L2799:
+	add	r3, r3, r2
+	orr	r3, r3, r6, lsl #24
+	b	.L2823
+.L2798:
+	add	r3, r3, r2
+	b	.L2823
+.L2801:
+	ldrh	r3, [r4, #18]
+	adds	r6, r6, #1
+	adds	r3, r3, #1
+	strh	r3, [r4, #18]	@ movhi
+.L2806:
+	ldrh	r3, [r4, #16]
+	cmp	r6, r3
+	ble	.L2804
+	adds	r7, r7, #1
+	add	r10, r10, #2
+	b	.L2794
+.L2805:
+	ldrh	r3, [r4, #12]
+	adds	r2, r3, #1
+	strh	r2, [r4, #12]	@ movhi
+	ldr	r2, .L2824+60
+	ldrb	r0, [r2]	@ zero_extendqisi2
+	cbz	r0, .L2791
+	movs	r0, #0
+	adds	r3, r3, #2
+	strh	r3, [r4, #12]	@ movhi
+.L2803:
+.L2791:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2611:
+.L2825:
 	.align	2
-.L2610:
-	.word	.LANCHOR18
-	.word	.LANCHOR178
+.L2824:
+	.word	.LANCHOR71
+	.word	.LANCHOR10
+	.word	.LANCHOR188
 	.word	.LC0
-	.word	.LANCHOR30
-	.word	.LANCHOR0
-	.word	.LANCHOR2
+	.word	.LANCHOR111
+	.word	.LANCHOR79
+	.word	.LANCHOR36
+	.word	.LANCHOR162
+	.word	.LANCHOR163
 	.word	.LANCHOR14
-	.word	.LC138
-	.word	.LANCHOR167
-	.word	.LC139
-	.word	.LC140
-	.word	.LANCHOR166
-	.word	.LC141
-	.word	.LC142
-	.word	.LC143
-	.word	.LANCHOR3
-	.word	.LANCHOR1
-	.size	flash_prog_page_en, .-flash_prog_page_en
-	.section	.text.ftl_test_block,"ax",%progbits
+	.word	.LC146
+	.word	.LANCHOR124
+	.word	.LANCHOR9
+	.word	.LANCHOR110
+	.word	1145785929
+	.word	.LANCHOR81
+	.word	.LANCHOR37
+	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
+	.section	.text.sblk_tlc_prog_one_page,"ax",%progbits
 	.align	1
-	.global	ftl_test_block
+	.global	sblk_tlc_prog_one_page
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_test_block, %function
-ftl_test_block:
-	@ args = 0, pretend = 0, frame = 8
+	.type	sblk_tlc_prog_one_page, %function
+sblk_tlc_prog_one_page:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r5, #0
-	ldr	r3, .L2639
-	mov	r10, r0
-	mov	r8, r5
-	str	r5, [r3]
-	ldr	r3, .L2639+4
-	str	r5, [r3]
-.L2613:
-	uxth	r3, r5
-	str	r3, [sp, #12]
-	ldr	r3, .L2639+8
-	ldr	r2, [sp, #12]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, r2
-	bls	.L2623
-	mov	fp, #0
-	b	.L2624
-.L2622:
-	ldr	r3, .L2639+12
-	ldr	r3, [r3]
-	lsls	r3, r3, #19
-	bpl	.L2614
-	mov	r1, r10
-	ldr	r0, .L2639+16
-	bl	printf
-.L2614:
-	ldr	r3, .L2639+20
-	ldrb	r4, [r3]	@ zero_extendqisi2
-	ldr	r3, [sp, #12]
-	smulbb	r4, r4, r10
-	add	r4, r4, r6
-	uxth	r4, r4
-	cbnz	r3, .L2615
-	ldr	r3, .L2639+24
-	ldr	r3, [r3]
-	ldrb	r3, [r3, #47]	@ zero_extendqisi2
-	cmp	r3, r4
-	bcs	.L2616
-.L2615:
-	uxtb	r6, r5
-	mov	r1, r4
+	ldr	r3, [r0]
+	push	{r4, r5, r6, lr}
+	mov	r5, r0
+	ldr	r6, [r3, #24]
+.L2827:
+	movs	r1, #1
 	mov	r0, r6
-	bl	flash_check_bad_block
-	cbnz	r0, .L2616
-	ldr	r3, .L2639+28
-	mov	r1, r8
-	mov	r0, r6
-	ldrh	r7, [r3]
-	muls	r7, r4, r7
-	mov	r2, r7
-	bl	flash_erase_block_en
-	cbz	r0, .L2617
-	ldr	r3, .L2639+32
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #2
-	bne	.L2638
-	ldr	r3, .L2639+36
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2638
-	mov	r2, r7
-	movs	r1, #1
-	mov	r0, r6
-	bl	flash_erase_block_en
-	cbnz	r0, .L2638
-.L2621:
-	ldr	r3, .L2639+32
-	mov	r8, #1
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	add	r7, r7, r3, lsl #24
-.L2620:
-	movs	r3, #1
-	ldr	r2, .L2639
-	str	r3, [sp, #4]
-	mov	r1, r7
-	ldr	r3, .L2639+40
-	mov	r0, r6
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	str	r3, [sp]
-	ldr	r3, .L2639+4
-	bl	flash_prog_page_en
-	cbz	r0, .L2616
-.L2638:
-	mov	r1, r4
-	mov	r0, r6
-	bl	flash_mask_bad_block
-.L2616:
-	add	fp, fp, #1
-.L2624:
-	ldr	r3, .L2639+20
-	uxth	r6, fp
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, r6
-	bhi	.L2622
-	adds	r5, r5, #1
-	b	.L2613
-.L2617:
-	cmp	r8, #0
-	beq	.L2620
-	b	.L2621
-.L2623:
-	cmp	r8, #0
-	beq	.L2625
-	ldr	r3, .L2639+44
-	movs	r2, #2
-	ldr	r3, [r3]
-	add	r10, r3, r10, lsl #2
-	ldrb	r3, [r10, #2]	@ zero_extendqisi2
-	bfi	r3, r2, #3, #2
-	strb	r3, [r10, #2]
-.L2625:
-	movs	r0, #0
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2640:
-	.align	2
-.L2639:
-	.word	ftl_tmp_buffer
-	.word	.LANCHOR179
-	.word	.LANCHOR106
-	.word	.LANCHOR14
-	.word	.LC144
-	.word	.LANCHOR69
-	.word	.LANCHOR27
-	.word	.LANCHOR105
-	.word	.LANCHOR73
-	.word	.LANCHOR0
-	.word	.LANCHOR125
-	.word	.LANCHOR7
-	.size	ftl_test_block, .-ftl_test_block
-	.section	.text.ftl_prog_page,"ax",%progbits
-	.align	1
-	.global	ftl_prog_page
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_prog_page, %function
-ftl_prog_page:
-	@ args = 4, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r4, r5, r6, r7, lr}
-	mov	r4, r0
-	mov	r7, r3
-	mov	r5, r1
-	mov	r6, r2
-	bl	sblk_wait_write_queue_completed
-	movs	r3, #1
-	mov	r0, r4
-	str	r3, [sp, #4]
-	mov	r2, r6
-	ldr	r3, [sp, #32]
-	mov	r1, r5
-	str	r3, [sp]
-	mov	r3, r7
-	bl	flash_prog_page_en
-	adds	r3, r0, #1
+	bl	queue_lun_state
 	mov	r4, r0
-	bne	.L2641
-	ldr	r1, .L2643
-	movw	r2, #2324
-	ldr	r0, .L2643+4
-	bl	printf
-	mov	r1, r5
-	ldr	r0, .L2643+8
-	bl	printf
-.L2641:
+	cbnz	r0, .L2828
+	mov	r0, r5
+	movs	r1, #1
+	bl	queue_tlc_prog_cmd
 	mov	r0, r4
-	add	sp, sp, #12
-	@ sp needed
-	pop	{r4, r5, r6, r7, pc}
-.L2644:
-	.align	2
-.L2643:
-	.word	.LANCHOR180
-	.word	.LC0
-	.word	.LC143
-	.size	ftl_prog_page, .-ftl_prog_page
-	.section	.text.ftl_info_flush,"ax",%progbits
+	pop	{r4, r5, r6, pc}
+.L2828:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L2827
+	.size	sblk_tlc_prog_one_page, .-sblk_tlc_prog_one_page
+	.section	.text.sblk_xlc_prog_pages,"ax",%progbits
 	.align	1
-	.global	ftl_info_flush
+	.global	sblk_xlc_prog_pages
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_info_flush, %function
-ftl_info_flush:
-	@ args = 0, pretend = 0, frame = 16
+	.type	sblk_xlc_prog_pages, %function
+sblk_xlc_prog_pages:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, [r0]
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r5, r0
+	mov	r6, r1
 	sub	sp, sp, #24
-	ldr	r4, .L2682
-	movs	r1, #0
-	ldr	r5, .L2682+4
-	ldrb	r2, [r4]	@ zero_extendqisi2
-	str	r0, [sp, #20]
-	ldr	r0, .L2682+8
-	lsls	r2, r2, #1
-	bl	ftl_memset
-	ldr	r3, [r5]
-	str	r4, [sp, #12]
-	ldrh	r2, [r3, #74]
-	cbz	r2, .L2646
-	movs	r2, #0
-	strh	r2, [r3, #150]	@ movhi
-.L2646:
-	ldr	r6, .L2682+12
-	mov	r8, #0
-	mov	r4, r6
-.L2656:
-	ldr	r7, .L2682+16
+	ldr	r4, [r3, #24]
+	str	r2, [sp, #20]
+.L2830:
+	movs	r1, #1
+	mov	r0, r4
+	bl	queue_lun_state
+	mov	r8, r0
+	cmp	r0, #0
+	bne	.L2831
+	ldr	r3, [sp, #20]
+	cmp	r3, #2
+	bne	.L2832
+	ldr	r3, .L2841
+	ldr	ip, [r6]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L2833
+	ldr	r3, .L2841+4
+	mov	r10, #1
 	ldr	r2, [r5]
-	ldr	r1, [sp, #20]
-	ldrh	r3, [r7]
-	ldrb	fp, [r6]	@ zero_extendqisi2
-	ldrh	r10, [r6, #2]
-	str	r3, [sp, #16]
-	ldr	r3, [r2, #4]
-	adds	r3, r3, #1
-	str	r3, [r2, #4]
-	ldr	r2, .L2682+8
-	stm	r2, {r1, r3}
-	ldr	r2, .L2682+20
-	ldr	r2, [r2]
-	lsls	r2, r2, #19
-	bpl	.L2647
-	mov	r2, r10
-	mov	r1, fp
-	ldr	r0, .L2682+24
-	bl	printf
-.L2647:
-	ldr	r3, .L2682+28
-	ldrh	r0, [r4, #2]
-	ldrh	r3, [r3]
-	cmp	r3, r0
-	bhi	.L2648
-	ldr	r10, .L2682+48
-	ldr	fp, .L2682+44
-.L2652:
-	ldrb	r3, [r4, #1]	@ zero_extendqisi2
-	adds	r3, r3, #1
-	uxtb	r3, r3
-	cmp	r3, #7
-	strb	r3, [r4, #1]
-	bls	.L2649
-	ldr	r2, [r10]
-	movs	r3, #0
-	adds	r2, r2, #40
-.L2665:
-	ldrb	r1, [r2], #1	@ zero_extendqisi2
-	uxth	r8, r3
-	cmp	r1, #128
-	bls	.L2650
-	cmp	r1, #255
-	beq	.L2651
-	movw	r2, #751
-	mov	r1, fp
-	ldr	r0, .L2682+32
-	bl	printf
-.L2650:
-	strb	r8, [r4, #1]
-	mov	r8, #1
-.L2649:
-	ldr	r3, [r10]
-	ldrb	r2, [r4, #1]	@ zero_extendqisi2
-	add	r3, r3, r2
-	ldrb	r3, [r3, #40]	@ zero_extendqisi2
-	cmp	r3, #255
-	strb	r3, [r4]
-	beq	.L2652
-	ldrh	r10, [r7]
-	movs	r0, #0
-	mul	r10, r3, r10
-	mov	r1, r10
-	bl	flash_erase_block
-	ldr	r3, [sp, #12]
-	mov	r1, r10
-	ldr	r2, .L2682+36
-	movs	r0, #0
+	ldr	fp, [ip, #24]
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	str	r3, [sp]
-	ldr	r3, .L2682+8
-	bl	ftl_prog_page
-	movs	r3, #1
-	add	r10, r10, r3
-	strh	r3, [r4, #2]	@ movhi
-.L2653:
-	ldr	r3, [sp, #12]
-	mov	r1, r10
-	ldr	r2, .L2682+36
-	movs	r0, #0
+	ldr	r1, [r2, #24]
+	rsb	r0, r3, #24
+	lsl	r4, r10, r0
+	subs	r4, r4, #1
+	and	r7, r1, r4
+	and	fp, r4, fp
+	lsl	r4, r10, r3
+	ldr	r3, .L2841+8
+	lsrs	r1, r1, r0
+	subs	r4, r4, #1
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	str	r3, [sp]
-	ldr	r3, .L2682+8
-	bl	ftl_prog_page
-	ldrh	r3, [r4, #2]
-	adds	r0, r0, #1
-	add	r3, r3, #1
-	strh	r3, [r4, #2]	@ movhi
-	ldr	r3, .L2682+40
-	beq	.L2654
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	cbz	r2, .L2655
-.L2654:
-	movs	r2, #0
-	strb	r2, [r3]
-	b	.L2656
-.L2648:
-	ldr	r3, [sp, #16]
-	mla	r10, fp, r3, r10
-	cmp	r0, #0
-	bne	.L2653
+	ands	r4, r4, r1
+	uxtb	r4, r4
+	cmp	r3, #0
+	beq	.L2834
+	mov	r0, r4
+	bl	zftl_flash_exit_slc_mode
+	ldr	r3, [r5]
 	mov	r1, r10
-	bl	flash_erase_block
-	b	.L2653
-.L2655:
-	cmp	r8, #0
-	bne	.L2657
-.L2664:
-	ldrb	r3, [r4]	@ zero_extendqisi2
-	cmp	r3, #255
-	bne	.L2681
-	movw	r2, #787
-	ldr	r1, .L2682+44
-	ldr	r0, .L2682+32
-	bl	printf
-.L2681:
-	movs	r0, #0
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2657:
-	ldrb	r5, [r4, #1]	@ zero_extendqisi2
-	ldr	r6, .L2682+48
-	ldr	r7, .L2682+44
-	adds	r5, r5, #1
-.L2660:
-	cmp	r5, #7
-	bhi	.L2664
+	mov	r0, r8
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	movs	r2, #17
+	ldr	r3, [r3, #4]
+	str	r7, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r4
+	bl	flash_start_one_pass_page_prog
+	bl	nandc_wait_flash_ready
 	ldr	r3, [r6]
-	add	r3, r3, r5
-	ldrb	r8, [r3, #40]	@ zero_extendqisi2
-	uxth	r3, r8
-	cmp	r3, #128
-	bls	.L2661
-	cmp	r3, #255
-	beq	.L2662
-	mov	r2, #780
-	mov	r1, r7
-	ldr	r0, .L2682+32
-	bl	printf
-.L2661:
-	ldr	r3, .L2682+16
+	mov	r1, r10
+	mov	r0, r8
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	movs	r2, #26
+	ldr	r3, [r3, #4]
+	str	fp, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r4
+	bl	flash_start_one_pass_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r5, #4]
+	mov	r0, r8
+	ldr	r1, [sp, #20]
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	movs	r2, #17
+	ldr	r3, [r3, #4]
+	str	r3, [sp, #4]
+	add	r3, r7, r10
+	str	r3, [sp]
+	mov	r3, r4
+	bl	flash_start_one_pass_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r6, #4]
+	mov	r0, r8
+	ldr	r1, [sp, #20]
+	adds	r7, r7, #2
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	movs	r2, #26
+	ldr	r3, [r3, #4]
+	str	r3, [sp, #4]
+	add	r3, fp, r10
+	str	r3, [sp]
+	mov	r3, r4
+	bl	flash_start_one_pass_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r5, #8]
+	movs	r1, #3
+	mov	r0, r8
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	movs	r2, #17
+	ldr	r3, [r3, #4]
+	str	r7, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r4
+	bl	flash_start_one_pass_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r6, #8]
+	movs	r1, #3
+	mov	r0, r8
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	movs	r2, #16
+	ldr	r3, [r3, #4]
+	str	r3, [sp, #4]
+	add	r3, fp, #2
+	str	r3, [sp]
+	mov	r3, r4
+	bl	flash_start_one_pass_page_prog
+.L2835:
+	ldr	r1, [r5]
+	movs	r3, #5
+	ldr	r0, .L2841+12
+	strb	r3, [r1, #42]
+	movs	r3, #1
+	strb	r3, [r1, #43]
+	movs	r3, #255
+	strb	r3, [r1]
+	bl	buf_add_tail
+.L2836:
 	movs	r0, #0
-	ldrh	r1, [r3]
-	mul	r1, r8, r1
-	bl	flash_erase_block
-.L2662:
-	adds	r5, r5, #1
-	uxth	r5, r5
-	b	.L2660
-.L2651:
-	adds	r3, r3, #1
-	cmp	r3, #8
-	bne	.L2665
-	mov	r8, r3
-	b	.L2650
-.L2683:
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2831:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L2830
+.L2834:
+	ldr	r3, [r2, #12]
+	mov	r1, r10
+	ldrb	r0, [r2, #44]	@ zero_extendqisi2
+	str	r3, [sp, #8]
+	ldr	r3, [r2, #4]
+	movs	r2, #17
+	str	r7, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r4
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r6]
+	mov	r1, r10
+	ldr	r2, [r5]
+	ldrb	r0, [r2, #44]	@ zero_extendqisi2
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	movs	r2, #26
+	ldr	r3, [r3, #4]
+	str	fp, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r4
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldm	r5, {r2, r3}
+	ldr	r1, [sp, #20]
+	ldrb	r0, [r2, #44]	@ zero_extendqisi2
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	movs	r2, #17
+	ldr	r3, [r3, #4]
+	str	r7, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r4
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r6, #4]
+	ldr	r2, [r5]
+	ldr	r1, [sp, #20]
+	ldrb	r0, [r2, #44]	@ zero_extendqisi2
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	movs	r2, #26
+	ldr	r3, [r3, #4]
+	str	fp, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r4
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r5, #8]
+	movs	r1, #3
+	ldr	r2, [r5]
+	ldrb	r0, [r2, #44]	@ zero_extendqisi2
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	movs	r2, #17
+	ldr	r3, [r3, #4]
+	str	r7, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r4
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r6, #8]
+	movs	r1, #3
+	ldr	r2, [r5]
+	ldrb	r0, [r2, #44]	@ zero_extendqisi2
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	movs	r2, #16
+	ldr	r3, [r3, #4]
+	str	fp, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r4
+	bl	flash_start_tlc_page_prog
+	b	.L2835
+.L2833:
+	ldr	r4, [ip, #24]
+.L2837:
+	movs	r1, #1
+	mov	r0, r4
+	bl	queue_lun_state
+	mov	r7, r0
+	cbnz	r0, .L2838
+	movs	r1, #1
+	mov	r0, r5
+	bl	queue_tlc_prog_cmd
+	mov	r1, r7
+	mov	r0, r6
+	bl	queue_tlc_prog_cmd
+.L2839:
+	movs	r1, #1
+	mov	r0, r4
+	bl	queue_lun_state
+	cmp	r0, #0
+	beq	.L2836
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L2839
+.L2838:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L2837
+.L2832:
+	movs	r1, #1
+	mov	r0, r5
+	bl	queue_tlc_prog_cmd
+	b	.L2836
+.L2842:
 	.align	2
-.L2682:
-	.word	.LANCHOR125
-	.word	.LANCHOR104
-	.word	.LANCHOR181
-	.word	.LANCHOR182
-	.word	.LANCHOR105
-	.word	.LANCHOR14
-	.word	.LC145
-	.word	.LANCHOR87
-	.word	.LC0
-	.word	ftl_info_data_buffer
-	.word	.LANCHOR184
-	.word	.LANCHOR183
-	.word	.LANCHOR27
-	.size	ftl_info_flush, .-ftl_info_flush
-	.section	.text.ftl_info_blk_init,"ax",%progbits
+.L2841:
+	.word	.LANCHOR45
+	.word	.LANCHOR32
+	.word	.LANCHOR37
+	.word	.LANCHOR60
+	.size	sblk_xlc_prog_pages, .-sblk_xlc_prog_pages
+	.section	.text.sblk_3d_mlc_prog_pages,"ax",%progbits
 	.align	1
-	.global	ftl_info_blk_init
+	.global	sblk_3d_mlc_prog_pages
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_info_blk_init, %function
-ftl_info_blk_init:
-	@ args = 0, pretend = 0, frame = 8
+	.type	sblk_3d_mlc_prog_pages, %function
+sblk_3d_mlc_prog_pages:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r4, #0
-	ldr	r3, .L2712
-	mov	r1, r4
-	ldr	r2, .L2712+4
-	strb	r4, [r3]
-	movs	r3, #1
-	ldr	r0, .L2712+8
-	strb	r3, [r2]
-	ldr	r2, .L2712+12
-	ldr	r5, .L2712+16
-	ldr	r6, .L2712+20
-	strb	r3, [r2]
-	mov	r2, #16384
-	ldr	r3, .L2712+24
-	str	r0, [r3]
-	ldr	r3, .L2712+28
-	ldrh	r3, [r3]
-	add	r3, r0, r3, lsl #2
-	str	r3, [r5]
-	bl	ftl_memset
-	mov	r2, #16384
-	mov	r1, r4
-	ldr	r0, .L2712+32
-	bl	ftl_memset
-	ldr	r2, [r6]
-	ldr	r3, .L2712+36
-	ldrb	r2, [r2, #40]	@ zero_extendqisi2
-	strb	r4, [r3, #1]
-	strh	r4, [r3, #2]	@ movhi
-	movs	r4, #7
-	strb	r2, [r3]
-	str	r3, [sp, #12]
-.L2686:
-	ldr	r3, [r6]
-	sxth	r8, r4
-	add	r3, r3, r4
-	ldrb	r7, [r3, #40]	@ zero_extendqisi2
-	cmp	r7, #255
-	bne	.L2685
-.L2690:
-	adds	r4, r4, #-1
-	bcs	.L2686
-	mov	r8, #0
-.L2687:
-	ldr	r3, .L2712+40
-	ldr	r2, [r3]
-	mov	r10, r3
-	tst	r2, #4096
-	beq	.L2691
-	ldr	r3, [r5]
-	mov	r2, #4800
-	mov	r1, r4
-	ldr	r0, .L2712+44
-	ldr	r3, [r3]
-	bl	printf
-.L2691:
-	adds	r2, r4, #1
-	bne	.L2692
-	mov	r2, #16384
-	movs	r1, #0
-	ldr	r0, .L2712+8
-	bl	ftl_memset
-	ldr	r3, [r5]
-	ldr	r2, .L2712+48
-	str	r2, [r3]
-	ldr	r2, .L2712+52
-	str	r2, [r3, #12]
-.L2684:
-	mov	r0, r4
-	add	sp, sp, #16
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r7, r1
+	ldr	r10, .L2848
+	add	r5, r0, #8
+	ldr	fp, .L2848+4
+.L2844:
+	cbnz	r7, .L2847
+	mov	r0, r7
+	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2685:
-	ldr	r3, .L2712+56
-	movs	r0, #0
-	ldr	fp, .L2712+68
-	ldr	r2, .L2712+8
-	ldrh	r3, [r3]
-	muls	r7, r3, r7
-	ldrb	r3, [fp]	@ zero_extendqisi2
-	str	r3, [sp]
-	mov	r1, r7
-	ldr	r3, .L2712+60
-	bl	ftl_read_page
-	cmp	r0, #-1
-	mov	r10, r0
-	bne	.L2688
-	ldrb	r3, [fp]	@ zero_extendqisi2
-	adds	r1, r7, #1
-	ldr	r2, .L2712+8
-	movs	r0, #0
-	str	r3, [sp]
-	ldr	r3, .L2712+60
-	bl	ftl_read_page
-	mov	r10, r0
-.L2688:
-	ldr	r3, .L2712+40
-	ldr	r3, [r3]
-	lsls	r1, r3, #19
-	bpl	.L2689
-	ldr	r3, [r5]
-	mov	r2, r10
+.L2847:
+	ldr	r3, [r5, #-8]
+	ldr	r4, [r3, #24]
+.L2845:
+	movs	r1, #1
+	mov	r0, r4
+	bl	queue_lun_state
+	cmp	r0, #0
+	bne	.L2846
+	ldr	r3, [r5, #-8]
+	mov	r8, #1
+	subs	r7, r7, #1
+	adds	r5, r5, #8
+	ldr	r2, [r3, #24]
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	rsb	r1, r3, #24
+	lsl	r6, r8, r1
+	lsl	r4, r8, r3
+	subs	r6, r6, #1
+	subs	r4, r4, #1
+	ands	r6, r6, r2
+	lsrs	r2, r2, r1
+	ands	r4, r4, r2
+	uxtb	r4, r4
+	mov	r0, r4
+	bl	zftl_flash_exit_slc_mode
+	ldr	r3, [r5, #-16]
 	mov	r1, r4
-	ldr	r0, .L2712+64
-	ldr	r3, [r3]
-	str	r3, [sp]
-	mov	r3, #672
+	movs	r0, #16
+	ldr	r2, [r3, #12]
+	str	r2, [sp]
+	mov	r2, r6
+	ldr	r3, [r3, #4]
+	bl	flash_start_3d_mlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r5, #-12]
+	mov	r1, r4
+	movs	r0, #16
+	ldr	r2, [r3, #12]
+	str	r2, [sp]
+	add	r2, r6, r8
+	ldr	r3, [r3, #4]
+	bl	flash_start_3d_mlc_page_prog
+	bl	nandc_de_cs.constprop.33
+	ldr	r1, [r5, #-16]
+	movs	r3, #4
+	mov	r0, fp
+	strb	r3, [r1, #42]
+	movs	r3, #255
+	strb	r8, [r1, #43]
+	strb	r3, [r1]
+	bl	buf_add_tail
+	b	.L2844
+.L2846:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L2845
+.L2849:
+	.align	2
+.L2848:
+	.word	.LANCHOR32
+	.word	.LANCHOR60
+	.size	sblk_3d_mlc_prog_pages, .-sblk_3d_mlc_prog_pages
+	.section	.text.flash_prog_page_en,"ax",%progbits
+	.align	1
+	.global	flash_prog_page_en
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_prog_page_en, %function
+flash_prog_page_en:
+	@ args = 8, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r8, r2
+	ldr	r7, .L2885
+	sub	sp, sp, #24
+	mov	fp, r3
+	mov	r6, r0
+	ldrb	r3, [sp, #60]	@ zero_extendqisi2
+	mov	r4, r1
+	ldrb	r2, [r7]	@ zero_extendqisi2
+	ubfx	r5, r1, #24, #2
+	str	r3, [sp, #20]
+	cmp	r2, r0
+	bhi	.L2851
+	movw	r2, #635
+	ldr	r1, .L2885+4
+	ldr	r0, .L2885+8
 	bl	printf
-.L2689:
-	cmp	r10, #-1
-	beq	.L2690
-	ldr	r3, [r5]
-	ldr	r2, .L2712+48
+.L2851:
+	ldrb	r3, [r7]	@ zero_extendqisi2
+	cmp	r3, r6
+	bls	.L2862
+	ldr	r3, .L2885+12
+	ldrb	r3, [r3, r6]	@ zero_extendqisi2
+	str	r3, [sp, #12]
+	cmp	r5, #0
+	bne	.L2864
+	ldr	r3, .L2885+16
+	ldr	r10, .L2885+64
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2854
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L2864
+.L2854:
+	ldr	r3, .L2885+20
+	mov	r0, r4
+	ldrh	r7, [r3]
+	mov	r1, r7
+	bl	__aeabi_uidiv
+	mov	r1, r7
+	mul	r5, r7, r0
+	mov	r0, r4
+	bl	__aeabi_uidivmod
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L2855
+	add	r5, r5, r1, lsl #1
+.L2859:
+	ldr	r3, .L2885+24
 	ldr	r3, [r3]
-	cmp	r3, r2
-	bne	.L2690
-	mov	r4, r8
-	b	.L2687
-.L2692:
-	ldr	r3, [r6]
-	movs	r0, #0
-	ldr	r2, .L2712+8
-	movs	r4, #0
-	add	r3, r3, r8
-	ldrb	r1, [r3, #40]	@ zero_extendqisi2
-	ldr	r3, [sp, #12]
-	strb	r8, [r3, #1]
-	strb	r1, [r3]
-	movs	r3, #4
+	lsls	r1, r3, #27
+	bpl	.L2856
+	mov	r3, r5
+	mov	r2, r4
+	ldr	r1, [sp, #12]
+	ldr	r0, .L2885+28
+	bl	printf
+.L2856:
+	ldr	r3, [sp, #56]
+	mov	r2, r8
+	mov	r1, r5
+	ldr	r0, [sp, #12]
 	str	r3, [sp]
-	ldr	r3, .L2712+60
-	bl	flash_get_last_written_page
-	uxth	r6, r0
-	mov	r7, r0
-	adds	r3, r6, #1
-	uxth	r8, r3
-	ldr	r3, [sp, #12]
-	ldrb	fp, [r3]	@ zero_extendqisi2
-	ldr	r3, .L2712+56
-	ldrh	r3, [r3]
-	mul	fp, r3, fp
-.L2694:
-	subs	r3, r6, r4
-	lsls	r3, r3, #16
-	bmi	.L2698
-	ldr	r3, .L2712+68
-	add	r1, r7, fp
-	ldr	r2, .L2712+8
-	subs	r1, r1, r4
-	movs	r0, #0
-	ldrb	r3, [r3]	@ zero_extendqisi2
+	mov	r3, fp
+	bl	flash_prog_page
+	ldr	r3, [sp, #20]
+	str	r0, [sp, #16]
+	cmp	r3, #0
+	beq	.L2857
+	ldr	r3, [sp, #56]
+	mov	r1, r4
+	ldr	r10, .L2885+44
+	mov	r0, r6
+	ldr	r2, .L2885+32
 	str	r3, [sp]
-	ldr	r3, .L2712+60
-	bl	ftl_read_page
-	adds	r0, r0, #1
-	beq	.L2695
-	ldr	r3, [r5]
-	ldr	r2, .L2712+48
+	ldr	r3, [r10]
+	ldr	r2, [r2]
+	bl	flash_read_page_en
+	adds	r2, r0, #1
+	mov	r7, r0
+	beq	.L2858
+	cmp	r0, #512
+	beq	.L2858
+	ldr	r3, .L2885+32
+	ldr	r2, [r8]
 	ldr	r3, [r3]
-	cmp	r3, r2
-	bne	.L2695
-.L2698:
-	ldr	r3, [sp, #12]
-	strh	r8, [r3, #2]	@ movhi
-	bl	ftl_tmp_into_update
-	ldr	r2, [r5]
-	movs	r0, #0
-	ldr	r3, [r2, #64]
-	adds	r3, r3, #1
-	str	r3, [r2, #64]
-	bl	ftl_info_flush
-	movs	r0, #0
-	bl	ftl_info_flush
-	ldr	r4, [r10]
-	ands	r4, r4, #16384
-	beq	.L2684
-	ldr	r3, [r5]
-	movs	r4, #0
-	ldr	r0, .L2712+72
-	ldr	r1, [r3, #156]
+	ldr	r3, [r3]
+	cmp	r2, r3
+	bne	.L2858
+	ldr	r3, [r10]
+	ldr	r2, [fp]
+	ldr	r3, [r3]
+	cmp	r2, r3
+	beq	.L2857
+.L2858:
+	movs	r3, #4
+	mov	r1, r8
+	mov	r2, r3
+	ldr	r0, .L2885+36
+	bl	rknand_print_hex
+	movs	r3, #4
+	mov	r1, fp
+	mov	r2, r3
+	ldr	r0, .L2885+40
+	bl	rknand_print_hex
+	ldr	r1, .L2885+44
+	movs	r3, #4
+	mov	r2, r3
+	ldr	r0, .L2885+48
+	ldr	r1, [r1]
+	bl	rknand_print_hex
+	ldr	r1, .L2885+32
+	movs	r3, #4
+	mov	r2, r3
+	ldr	r0, .L2885+52
+	ldr	r1, [r1]
+	bl	rknand_print_hex
+	cmp	r7, #512
+	beq	.L2859
+.L2861:
+	mov	r1, r4
+	ldr	r0, .L2885+56
 	bl	printf
-	b	.L2684
-.L2695:
-	adds	r4, r4, #1
-	b	.L2694
-.L2713:
+	movw	r2, #678
+	ldr	r1, .L2885+4
+	ldr	r0, .L2885+8
+	bl	printf
+.L2862:
+	mov	r0, #-1
+	b	.L2850
+.L2855:
+	ldr	r3, .L2885+60
+	ldrh	r1, [r3, r1, lsl #1]
+	add	r5, r5, r1
+	b	.L2859
+.L2864:
+.L2853:
+	mov	r5, r4
+	b	.L2859
+.L2857:
+	ldr	r0, [sp, #16]
+	adds	r3, r0, #1
+	beq	.L2861
+.L2850:
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2886:
 	.align	2
-.L2712:
-	.word	.LANCHOR185
-	.word	.LANCHOR184
-	.word	ftl_info_data_buffer
-	.word	.LANCHOR186
-	.word	.LANCHOR104
-	.word	.LANCHOR27
-	.word	.LANCHOR7
-	.word	.LANCHOR6
-	.word	ftl_ext_info_data_buffer
-	.word	.LANCHOR182
+.L2885:
+	.word	.LANCHOR18
+	.word	.LANCHOR189
+	.word	.LC0
+	.word	.LANCHOR30
+	.word	.LANCHOR0
+	.word	.LANCHOR2
 	.word	.LANCHOR14
 	.word	.LC147
-	.word	1229739078
-	.word	393240
-	.word	.LANCHOR105
-	.word	.LANCHOR181
-	.word	.LC146
-	.word	.LANCHOR125
+	.word	.LANCHOR176
 	.word	.LC148
-	.size	ftl_info_blk_init, .-ftl_info_blk_init
-	.section	.text.ftl_ext_info_flush,"ax",%progbits
+	.word	.LC149
+	.word	.LANCHOR175
+	.word	.LC150
+	.word	.LC151
+	.word	.LC152
+	.word	.LANCHOR3
+	.word	.LANCHOR1
+	.size	flash_prog_page_en, .-flash_prog_page_en
+	.section	.text.ftl_test_block,"ax",%progbits
 	.align	1
-	.global	ftl_ext_info_flush
+	.global	ftl_test_block
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_ext_info_flush, %function
-ftl_ext_info_flush:
-	@ args = 0, pretend = 0, frame = 0
+	.type	ftl_test_block, %function
+ftl_test_block:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2730
-	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r5, #0
+	ldr	r3, .L2914
+	mov	r10, r0
+	mov	r8, r5
+	ldr	r2, [r3]
+	str	r3, [sp, #12]
+	str	r5, [r2]
+	ldr	r2, .L2914+4
+	str	r5, [r2]
+.L2888:
+	uxth	r3, r5
+	str	r3, [sp, #8]
+	ldr	r3, .L2914+8
+	ldr	r2, [sp, #8]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r2
+	bls	.L2898
+	mov	fp, #0
+	b	.L2899
+.L2897:
+	ldr	r3, .L2914+12
 	ldr	r3, [r3]
-	ldr	r2, [r3, #520]
-	cbz	r2, .L2715
-	movs	r2, #0
-	str	r2, [r3, #520]
-.L2715:
-	ldr	r6, .L2730+4
-	movs	r0, #0
-	bl	ftl_total_vpn_update
-	mov	r5, r6
-.L2719:
-	ldr	r3, [r6]
-	ldr	r2, [r3, #56]
-	adds	r2, r2, #1
-	str	r2, [r3, #56]
-	ldrh	r2, [r3, #140]
-	ldr	r3, .L2730+8
-	ldrh	r3, [r3]
-	cmp	r2, r3
-	bcc	.L2717
-	bl	ftl_ext_alloc_new_blk
-.L2717:
-	ldr	r3, [r5]
-	ldrh	r2, [r3, #130]
-	movw	r3, #65535
-	cmp	r2, r3
-	bne	.L2718
-	mov	r2, #1912
-	ldr	r1, .L2730+12
-	ldr	r0, .L2730+16
+	lsls	r3, r3, #19
+	bpl	.L2889
+	mov	r1, r10
+	ldr	r0, .L2914+16
 	bl	printf
-.L2718:
-	ldr	r3, .L2730+20
-	ldr	r2, [r5]
-	ldr	r10, .L2730+40
+.L2889:
+	ldr	r3, .L2914+20
+	ldrb	r4, [r3]	@ zero_extendqisi2
+	ldr	r3, [sp, #8]
+	smulbb	r4, r4, r10
+	add	r4, r4, r6
+	uxth	r4, r4
+	cbnz	r3, .L2890
+	ldr	r3, .L2914+24
+	ldr	r3, [r3]
+	ldrb	r3, [r3, #47]	@ zero_extendqisi2
+	cmp	r3, r4
+	bcs	.L2891
+.L2890:
+	uxtb	r6, r5
+	mov	r1, r4
+	mov	r0, r6
+	bl	flash_check_bad_block
+	cbnz	r0, .L2891
+	ldr	r3, .L2914+28
+	mov	r1, r8
+	mov	r0, r6
+	ldrh	r7, [r3]
+	muls	r7, r4, r7
+	mov	r2, r7
+	bl	flash_erase_block_en
+	cbz	r0, .L2892
+	ldr	r3, .L2914+32
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	ldrh	r1, [r2, #130]
-	ldr	r8, .L2730+44
-	rsb	r4, r3, #24
-	ldr	r3, .L2730+24
-	mov	r0, r8
-	ldrh	r3, [r3]
-	subs	r3, r4, r3
-	movs	r4, #1
-	asr	r7, r1, r3
-	lsls	r4, r4, r3
-	ldr	r3, .L2730+28
-	subs	r4, r4, #1
-	ands	r4, r4, r1
-	ldrh	r1, [r3]
-	sxth	r4, r4
-	ldrh	r3, [r2, #140]
-	ldrb	r2, [r10]	@ zero_extendqisi2
-	mla	r4, r1, r4, r3
-	lsls	r2, r2, #1
-	movs	r1, #0
-	bl	ftl_memset
-	movs	r3, #0
-	ldr	r2, .L2730+32
-	str	r3, [r8]
+	cmp	r3, #2
+	bne	.L2913
+	ldr	r3, .L2914+36
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2913
+	mov	r2, r7
+	movs	r1, #1
+	mov	r0, r6
+	bl	flash_erase_block_en
+	cbnz	r0, .L2913
+.L2896:
+	ldr	r3, .L2914+32
+	mov	r8, #1
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r7, r7, r3, lsl #24
+.L2895:
+	movs	r3, #1
+	ldr	r2, [sp, #12]
+	str	r3, [sp, #4]
+	mov	r1, r7
+	ldr	r3, .L2914+40
+	mov	r0, r6
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r3, [sp]
+	ldr	r3, .L2914+4
+	ldr	r2, [r2]
+	bl	flash_prog_page_en
+	cbz	r0, .L2891
+.L2913:
 	mov	r1, r4
-	ldr	r3, [r5]
-	uxtb	r0, r7
-	ldr	r3, [r3, #56]
-	str	r3, [r8, #4]
-	ldrb	r3, [r10]	@ zero_extendqisi2
+	mov	r0, r6
+	bl	flash_mask_bad_block
+.L2891:
+	add	fp, fp, #1
+.L2899:
+	ldr	r3, .L2914+20
+	uxth	r6, fp
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r6
+	bhi	.L2897
+	adds	r5, r5, #1
+	b	.L2888
+.L2892:
+	cmp	r8, #0
+	beq	.L2895
+	b	.L2896
+.L2898:
+	cmp	r8, #0
+	beq	.L2900
+	ldr	r3, .L2914+44
+	movs	r2, #2
+	ldr	r3, [r3]
+	add	r10, r3, r10, lsl #2
+	ldrb	r3, [r10, #2]	@ zero_extendqisi2
+	bfi	r3, r2, #3, #2
+	strb	r3, [r10, #2]
+.L2900:
+	movs	r0, #0
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2915:
+	.align	2
+.L2914:
+	.word	.LANCHOR190
+	.word	.LANCHOR191
+	.word	.LANCHOR112
+	.word	.LANCHOR14
+	.word	.LC153
+	.word	.LANCHOR76
+	.word	.LANCHOR27
+	.word	.LANCHOR111
+	.word	.LANCHOR79
+	.word	.LANCHOR0
+	.word	.LANCHOR131
+	.word	.LANCHOR7
+	.size	ftl_test_block, .-ftl_test_block
+	.section	.text.ftl_prog_page,"ax",%progbits
+	.align	1
+	.global	ftl_prog_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_prog_page, %function
+ftl_prog_page:
+	@ args = 4, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r4, r5, r6, r7, lr}
+	mov	r4, r0
+	mov	r7, r3
+	mov	r5, r1
+	mov	r6, r2
+	bl	sblk_wait_write_queue_completed
+	movs	r3, #1
+	mov	r0, r4
+	str	r3, [sp, #4]
+	mov	r2, r6
+	ldr	r3, [sp, #32]
+	mov	r1, r5
 	str	r3, [sp]
-	mov	r3, r8
-	bl	ftl_prog_page
-	ldr	r2, [r5]
-	ldrh	r3, [r2, #140]
-	adds	r3, r3, #1
-	uxth	r3, r3
-	cmp	r3, #1
-	strh	r3, [r2, #140]	@ movhi
-	beq	.L2719
-	adds	r0, r0, #1
-	ldr	r3, .L2730+36
-	beq	.L2720
-	ldrb	r0, [r3]	@ zero_extendqisi2
-	cbz	r0, .L2721
-.L2720:
-.L2716:
-	movs	r2, #0
-	strb	r2, [r3]
-	b	.L2719
-.L2721:
+	mov	r3, r7
+	bl	flash_prog_page_en
+	adds	r3, r0, #1
+	mov	r4, r0
+	bne	.L2916
+	ldr	r1, .L2918
+	movw	r2, #2670
+	ldr	r0, .L2918+4
+	bl	printf
+	mov	r1, r5
+	ldr	r0, .L2918+8
+	bl	printf
+.L2916:
+	mov	r0, r4
 	add	sp, sp, #12
 	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L2731:
+	pop	{r4, r5, r6, r7, pc}
+.L2919:
 	.align	2
-.L2730:
-	.word	.LANCHOR10
-	.word	.LANCHOR104
-	.word	.LANCHOR87
-	.word	.LANCHOR187
+.L2918:
+	.word	.LANCHOR192
 	.word	.LC0
-	.word	.LANCHOR31
-	.word	.LANCHOR68
-	.word	.LANCHOR105
-	.word	ftl_ext_info_data_buffer
-	.word	.LANCHOR186
-	.word	.LANCHOR125
-	.word	.LANCHOR181
-	.size	ftl_ext_info_flush, .-ftl_ext_info_flush
-	.section	.text.ftl_ext_info_init,"ax",%progbits
+	.word	.LC152
+	.size	ftl_prog_page, .-ftl_prog_page
+	.section	.text.ftl_info_flush,"ax",%progbits
 	.align	1
-	.global	ftl_ext_info_init
+	.global	ftl_info_flush
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_ext_info_init, %function
-ftl_ext_info_init:
-	@ args = 0, pretend = 0, frame = 0
+	.type	ftl_info_flush, %function
+ftl_info_flush:
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #32
+	ldr	r5, .L2957
+	movs	r1, #0
+	str	r0, [sp, #16]
+	ldrb	r2, [r5]	@ zero_extendqisi2
+	ldr	r0, .L2957+4
+	lsls	r2, r2, #1
+	bl	ftl_memset
+	ldr	r2, .L2957+8
+	ldr	r3, [r2]
+	str	r2, [sp, #20]
+	ldrh	r1, [r3, #74]
+	cbz	r1, .L2921
 	movs	r2, #0
-	ldr	r3, .L2753
-	ldr	r5, .L2753+4
-	strh	r2, [r3]	@ movhi
-	ldr	r1, .L2753+8
-	ldr	r3, [r5]
-	ldrh	r4, [r1]
-	ldrh	r2, [r3, #130]
-	ldr	r3, .L2753+12
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	rsb	r3, r3, #24
-	subs	r3, r3, r4
-	movs	r4, #1
-	asr	r6, r2, r3
-	lsls	r4, r4, r3
-	uxtb	r10, r6
-	subs	r4, r4, #1
-	ands	r4, r4, r2
-	ldr	r2, .L2753+16
-	movs	r3, #4
-	mov	r1, r4
-	str	r3, [sp]
-	mov	r0, r10
-	ldr	r3, .L2753+20
-	bl	flash_get_last_written_page
-	ldr	r3, .L2753+24
-	mov	r7, r0
-	ldr	r2, [r3]
-	mov	fp, r3
-	tst	r2, #4096
-	beq	.L2733
-	ldr	r3, [r5]
-	uxth	r6, r6
-	movw	r2, #1956
-	ldr	r1, .L2753+28
-	ldrh	r3, [r3, #130]
-	str	r6, [sp]
-	str	r3, [sp, #4]
-	mov	r3, r0
-	ldr	r0, .L2753+32
-	bl	printf
-.L2733:
+	strh	r2, [r3, #150]	@ movhi
+.L2921:
+	ldr	r4, .L2957+12
 	mov	r8, #0
-.L2734:
-	uxth	r6, r7
-	sub	r3, r6, r8
-	lsls	r0, r3, #16
-	bmi	.L2739
-	ldr	r3, .L2753+36
-	sub	r1, r7, r8
-	ldr	r2, .L2753+16
-	ldrh	r0, [r3]
-	ldr	r3, .L2753+40
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	mla	r1, r4, r0, r1
-	mov	r0, r10
+.L2931:
+	ldr	r3, .L2957+12
+	ldr	r6, .L2957+16
+	ldr	r1, [sp, #16]
+	ldrb	fp, [r3]	@ zero_extendqisi2
+	ldrh	r3, [r6]
+	ldr	r7, .L2957+20
+	str	r3, [sp, #12]
+	ldr	r3, .L2957+12
+	ldr	r0, [r7]
+	ldrh	r10, [r3, #2]
+	ldr	r3, [sp, #20]
+	ldr	r2, [r3]
+	ldr	r3, [r2, #4]
+	adds	r3, r3, #1
+	str	r3, [r2, #4]
+	ldr	r2, .L2957+4
+	str	r3, [sp, #28]
+	stm	r2, {r1, r3}
+	ldrb	r1, [r5]	@ zero_extendqisi2
+	str	r2, [sp, #24]
+	lsls	r1, r1, #9
+	bl	js_hash
+	ldr	r2, [sp, #24]
+	ldr	r3, [sp, #28]
+	str	r0, [r2, #8]
+	ldr	r2, .L2957+24
+	ldr	r2, [r2]
+	tst	r2, #4096
+	beq	.L2922
+	mov	r2, r10
+	mov	r1, fp
+	ldr	r0, .L2957+28
+	bl	printf
+.L2922:
+	ldr	r3, .L2957+32
+	ldrh	r0, [r4, #2]
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bhi	.L2923
+	ldr	r10, .L2957+48
+	ldr	fp, .L2957+44
+.L2927:
+	ldrb	r3, [r4, #1]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	cmp	r3, #7
+	strb	r3, [r4, #1]
+	bls	.L2924
+	ldr	r2, [r10]
+	movs	r3, #0
+	adds	r2, r2, #40
+.L2940:
+	ldrb	r1, [r2], #1	@ zero_extendqisi2
+	uxth	r8, r3
+	cmp	r1, #128
+	bls	.L2925
+	cmp	r1, #255
+	beq	.L2926
+	movw	r2, #841
+	mov	r1, fp
+	ldr	r0, .L2957+36
+	bl	printf
+.L2925:
+	strb	r8, [r4, #1]
+	mov	r8, #1
+.L2924:
+	ldr	r3, [r10]
+	ldrb	r2, [r4, #1]	@ zero_extendqisi2
+	add	r3, r3, r2
+	ldrb	r3, [r3, #40]	@ zero_extendqisi2
+	cmp	r3, #255
+	strb	r3, [r4]
+	beq	.L2927
+	ldrh	r10, [r6]
+	movs	r0, #0
+	mul	r10, r3, r10
+	mov	r1, r10
+	bl	flash_erase_block
+	ldrb	r3, [r5]	@ zero_extendqisi2
+	mov	r1, r10
+	movs	r0, #0
 	str	r3, [sp]
-	ldr	r3, .L2753+20
-	bl	flash_read_page_en
-	adds	r3, r0, #1
-	beq	.L2735
-	cmp	r0, #512
-	beq	.L2735
-	ldr	r3, .L2753+44
-	ldr	r2, .L2753+48
-	ldr	r3, [r3]
-	ldr	r3, [r3]
-	cmp	r3, r2
-	bne	.L2735
-.L2739:
-	bl	zftl_sblk_list_init
-	ldr	r3, [r5]
-	ldrh	r2, [r3, #140]
-	cmp	r2, r7
-	bgt	.L2737
-	adds	r6, r6, #1
-	strh	r6, [r3, #140]	@ movhi
-	bl	ftl_ext_info_flush
-.L2737:
-	ldr	r3, .L2753+44
-	movw	r1, #65535
+	ldr	r2, [r7]
+	ldr	r3, .L2957+4
+	bl	ftl_prog_page
+	movs	r3, #1
+	add	r10, r10, r3
+	strh	r3, [r4, #2]	@ movhi
+.L2928:
+	ldrb	r3, [r5]	@ zero_extendqisi2
+	mov	r1, r10
+	movs	r0, #0
+	str	r3, [sp]
+	ldr	r2, [r7]
+	ldr	r3, .L2957+4
+	bl	ftl_prog_page
+	ldrh	r3, [r4, #2]
+	adds	r0, r0, #1
+	add	r3, r3, #1
+	strh	r3, [r4, #2]	@ movhi
+	ldr	r3, .L2957+40
+	beq	.L2929
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	cbz	r2, .L2930
+.L2929:
 	movs	r2, #0
-	ldr	r3, [r3]
-	strh	r1, [r3, #584]	@ movhi
-	strh	r1, [r3, #586]	@ movhi
-	strh	r1, [r3, #588]	@ movhi
-	strh	r1, [r3, #590]	@ movhi
-	str	r1, [r3, #560]
-	mov	r1, #-1
-	str	r1, [r3, #564]
-	ldr	r1, [fp]
-	str	r2, [r3, #520]
-	str	r2, [r3, #604]
-	lsls	r1, r1, #19
-	str	r2, [r3, #608]
-	bpl	.L2740
-	str	r2, [sp]
-	ldr	r1, .L2753+28
-	ldr	r3, [r3, #12]
-	ldr	r0, .L2753+52
+	strb	r2, [r3]
+	b	.L2931
+.L2923:
+	ldr	r3, [sp, #12]
+	mla	r10, fp, r3, r10
+	cmp	r0, #0
+	bne	.L2928
+	mov	r1, r10
+	bl	flash_erase_block
+	b	.L2928
+.L2930:
+	cmp	r8, #0
+	bne	.L2932
+.L2939:
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	cmp	r3, #255
+	bne	.L2956
+	movw	r2, #885
+	ldr	r1, .L2957+44
+	ldr	r0, .L2957+36
 	bl	printf
-.L2740:
-	ldr	r3, .L2753+56
-	movw	r2, #65535
+.L2956:
 	movs	r0, #0
-	strh	r2, [r3]	@ movhi
-	add	sp, sp, #8
+	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2735:
-	add	r8, r8, #1
-	b	.L2734
-.L2754:
+.L2932:
+	ldrb	r5, [r4, #1]	@ zero_extendqisi2
+	ldr	r6, .L2957+48
+	ldr	r7, .L2957+44
+	adds	r5, r5, #1
+.L2935:
+	cmp	r5, #7
+	bhi	.L2939
+	ldr	r3, [r6]
+	add	r3, r3, r5
+	ldrb	r8, [r3, #40]	@ zero_extendqisi2
+	uxth	r3, r8
+	cmp	r3, #128
+	bls	.L2936
+	cmp	r3, #255
+	beq	.L2937
+	mov	r2, #876
+	mov	r1, r7
+	ldr	r0, .L2957+36
+	bl	printf
+.L2936:
+	ldr	r3, .L2957+16
+	movs	r0, #0
+	ldrh	r1, [r3]
+	mul	r1, r8, r1
+	bl	flash_erase_block
+.L2937:
+	adds	r5, r5, #1
+	uxth	r5, r5
+	b	.L2935
+.L2926:
+	adds	r3, r3, #1
+	cmp	r3, #8
+	bne	.L2940
+	mov	r8, r3
+	b	.L2925
+.L2958:
 	.align	2
-.L2753:
-	.word	.LANCHOR115
-	.word	.LANCHOR104
-	.word	.LANCHOR68
-	.word	.LANCHOR31
-	.word	ftl_ext_info_data_buffer
-	.word	.LANCHOR181
+.L2957:
+	.word	.LANCHOR131
+	.word	.LANCHOR193
+	.word	.LANCHOR110
+	.word	.LANCHOR194
+	.word	.LANCHOR111
+	.word	.LANCHOR195
 	.word	.LANCHOR14
-	.word	.LANCHOR188
-	.word	.LC149
-	.word	.LANCHOR105
-	.word	.LANCHOR125
-	.word	.LANCHOR10
-	.word	1162432070
-	.word	.LC150
-	.word	.LANCHOR66
-	.size	ftl_ext_info_init, .-ftl_ext_info_init
-	.section	.text.ftl_prog_ppa_page,"ax",%progbits
-	.align	1
-	.global	ftl_prog_ppa_page
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_prog_ppa_page, %function
-ftl_prog_ppa_page:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r4, r5, r6, r7, lr}
-	ldr	r4, .L2756
-	ldrb	r7, [r4]	@ zero_extendqisi2
-	movs	r4, #1
-	str	r3, [sp]
-	mov	r3, r2
-	mov	r2, r1
-	rsb	r5, r7, #24
-	lsl	r6, r4, r5
-	lsls	r4, r4, r7
-	lsr	r5, r0, r5
-	subs	r4, r4, #1
-	subs	r6, r6, #1
-	ands	r4, r4, r5
-	and	r1, r6, r0
-	uxtb	r0, r4
-	bl	ftl_prog_page
-	add	sp, sp, #12
-	@ sp needed
-	pop	{r4, r5, r6, r7, pc}
-.L2757:
-	.align	2
-.L2756:
-	.word	.LANCHOR31
-	.size	ftl_prog_ppa_page, .-ftl_prog_ppa_page
-	.section	.text.ftl_write_last_log_page,"ax",%progbits
+	.word	.LC154
+	.word	.LANCHOR95
+	.word	.LC0
+	.word	.LANCHOR197
+	.word	.LANCHOR196
+	.word	.LANCHOR27
+	.size	ftl_info_flush, .-ftl_info_flush
+	.section	.text.ftl_info_blk_init,"ax",%progbits
 	.align	1
-	.global	ftl_write_last_log_page
+	.global	ftl_info_blk_init
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_write_last_log_page, %function
-ftl_write_last_log_page:
-	@ args = 0, pretend = 0, frame = 0
+	.type	ftl_info_blk_init, %function
+ftl_info_blk_init:
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	mov	r4, r0
-	ldrh	r3, [r0, #6]
-	cmp	r3, #1
-	bne	.L2760
-	ldr	r3, .L2762
-	ldrh	r5, [r0, #12]
-	ldr	r6, [r3]
-	bl	ftl_get_new_free_page
-	adds	r3, r0, #1
-	mov	r7, r0
-	beq	.L2761
-	ldrh	r0, [r4]
-	add	r6, r6, r5, lsl #2
-	ldr	r5, .L2762+4
+	ldr	r3, .L2988
+	ldr	r2, .L2988+4
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	bl	ftl_vpn_decrement
-	ldr	r3, .L2762+8
-	mov	r0, r6
-	ldr	r2, .L2762+12
-	str	r3, [r5]
-	ldr	r3, .L2762+16
-	ldrb	r1, [r2]	@ zero_extendqisi2
+	strb	r4, [r3]
+	movs	r3, #1
+	sub	sp, sp, #24
+	mov	r1, r4
+	strb	r3, [r2]
+	ldr	r7, .L2988+8
+	ldr	r2, .L2988+12
+	ldr	r5, .L2988+16
+	ldr	r0, [r7]
+	mov	fp, r7
+	strb	r3, [r2]
+	mov	r2, #16384
+	ldr	r3, .L2988+20
+	ldr	r6, .L2988+24
+	str	r0, [r3]
+	ldr	r3, .L2988+28
 	ldrh	r3, [r3]
-	muls	r1, r3, r1
-	lsls	r1, r1, #2
-	bl	js_hash
-	ldr	r3, .L2762+20
-	mov	r2, r5
-	str	r0, [r5, #4]
-	mov	r1, r6
-	mov	r0, r7
-	str	r4, [r5, #8]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	str	r4, [r5, #12]
-	bl	ftl_prog_ppa_page
-.L2761:
+	add	r3, r0, r3, lsl #2
+	str	r3, [r5]
+	bl	ftl_memset
+	ldr	r3, .L2988+32
+	mov	r2, #16384
+	mov	r1, r4
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldr	r2, [r6]
+	ldr	r3, .L2988+36
+	ldrb	r2, [r2, #40]	@ zero_extendqisi2
+	strb	r4, [r3, #1]
+	strh	r4, [r3, #2]	@ movhi
+	movs	r4, #7
+	strb	r2, [r3]
+	str	r3, [sp, #12]
+.L2961:
+	ldr	r3, [r6]
+	sxth	r8, r4
+	add	r3, r3, r4
+	ldrb	r7, [r3, #40]	@ zero_extendqisi2
+	cmp	r7, #255
+	bne	.L2960
+.L2965:
+	adds	r4, r4, #-1
+	bcs	.L2961
+	mov	r8, #0
+.L2962:
+	ldr	r3, .L2988+40
+	ldr	r3, [r3]
+	lsls	r1, r3, #19
+	bpl	.L2966
+	ldr	r3, [r5]
+	mov	r2, #4800
+	mov	r1, r4
+	ldr	r0, .L2988+44
+	ldr	r3, [r3]
+	bl	printf
+.L2966:
+	adds	r2, r4, #1
+	bne	.L2967
+	mov	r2, #16384
+	movs	r1, #0
+	ldr	r0, [fp]
+	bl	ftl_memset
+	ldr	r3, [r5]
+	ldr	r2, .L2988+48
+	str	r2, [r3]
+	ldr	r2, .L2988+52
+	str	r2, [r3, #12]
+.L2959:
+	mov	r0, r4
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2960:
+	ldr	r3, .L2988+56
 	movs	r0, #0
-	pop	{r3, r4, r5, r6, r7, pc}
-.L2760:
-	mov	r0, #-1
-	pop	{r3, r4, r5, r6, r7, pc}
-.L2763:
+	ldrh	r3, [r3]
+	muls	r7, r3, r7
+	ldr	r3, .L2988+60
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	mov	r1, r7
+	str	r3, [sp]
+	ldr	r3, .L2988+64
+	ldr	r2, [fp]
+	bl	ftl_read_page
+	cmp	r0, #-1
+	mov	r10, r0
+	bne	.L2963
+	ldr	r3, .L2988+60
+	adds	r1, r7, #1
+	movs	r0, #0
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r3, [sp]
+	ldr	r3, .L2988+64
+	ldr	r2, [fp]
+	bl	ftl_read_page
+	mov	r10, r0
+.L2963:
+	ldr	r3, .L2988+40
+	ldr	r3, [r3]
+	lsls	r0, r3, #19
+	bpl	.L2964
+	ldr	r3, [r5]
+	mov	r2, r10
+	mov	r1, r4
+	ldr	r0, .L2988+68
+	ldr	r3, [r3]
+	str	r3, [sp]
+	mov	r3, #744
+	bl	printf
+.L2964:
+	cmp	r10, #-1
+	beq	.L2965
+	ldr	r3, [r5]
+	ldr	r2, .L2988+48
+	ldr	r3, [r3]
+	cmp	r3, r2
+	bne	.L2965
+	mov	r4, r8
+	b	.L2962
+.L2967:
+	ldr	r3, [r6]
+	movs	r0, #0
+	movs	r4, #0
+	add	r3, r3, r8
+	ldrb	r1, [r3, #40]	@ zero_extendqisi2
+	ldr	r3, [sp, #12]
+	strb	r1, [r3]
+	strb	r8, [r3, #1]
+	movs	r3, #4
+	str	r3, [sp]
+	ldr	r3, .L2988+64
+	ldr	r2, [fp]
+	bl	flash_get_last_written_page
+	uxth	r6, r0
+	ldr	r2, .L2988+56
+	mov	r7, r0
+	adds	r3, r6, #1
+	uxth	r10, r3
+	ldr	r3, [sp, #12]
+	ldrh	r2, [r2]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	muls	r3, r2, r3
+	str	r3, [sp, #16]
+.L2969:
+	subs	r3, r6, r4
+	lsls	r3, r3, #16
+	bmi	.L2973
+	ldr	r3, [sp, #16]
+	movs	r0, #0
+	ldr	r8, .L2988+60
+	adds	r1, r7, r3
+	ldrb	r3, [r8]	@ zero_extendqisi2
+	subs	r1, r1, r4
+	str	r3, [sp]
+	ldr	r3, .L2988+64
+	ldr	r2, [fp]
+	bl	ftl_read_page
+	adds	r0, r0, #1
+	beq	.L2970
+	ldr	r3, .L2988+16
+	ldr	r2, .L2988+48
+	ldr	r3, [r3]
+	ldr	r3, [r3]
+	cmp	r3, r2
+	bne	.L2970
+	ldr	r3, .L2988+64
+	ldr	r3, [r3, #8]
+	cbnz	r3, .L2971
+.L2973:
+	ldr	r3, [sp, #12]
+	strh	r10, [r3, #2]	@ movhi
+	bl	ftl_tmp_into_update
+	ldr	r2, [r5]
+	movs	r0, #0
+	ldr	r3, [r2, #64]
+	adds	r3, r3, #1
+	str	r3, [r2, #64]
+	bl	ftl_info_flush
+	movs	r0, #0
+	bl	ftl_info_flush
+	ldr	r3, .L2988+40
+	ldr	r4, [r3]
+	ands	r4, r4, #16384
+	beq	.L2959
+	ldr	r3, [r5]
+	movs	r4, #0
+	ldr	r0, .L2988+72
+	ldr	r1, [r3, #156]
+	bl	printf
+	b	.L2959
+.L2971:
+	ldrb	r1, [r8]	@ zero_extendqisi2
+	ldr	r0, [fp]
+	str	r3, [sp, #20]
+	lsls	r1, r1, #9
+	bl	js_hash
+	ldr	r3, [sp, #20]
+	cmp	r3, r0
+	beq	.L2973
+	mov	r1, r3
+	ldr	r0, .L2988+76
+	bl	printf
+.L2970:
+	adds	r4, r4, #1
+	b	.L2969
+.L2989:
 	.align	2
-.L2762:
+.L2988:
+	.word	.LANCHOR198
+	.word	.LANCHOR197
+	.word	.LANCHOR195
+	.word	.LANCHOR199
+	.word	.LANCHOR110
+	.word	.LANCHOR7
+	.word	.LANCHOR27
+	.word	.LANCHOR6
+	.word	.LANCHOR200
+	.word	.LANCHOR194
+	.word	.LANCHOR14
+	.word	.LC156
+	.word	1229739078
+	.word	393251
 	.word	.LANCHOR111
-	.word	.LANCHOR179
-	.word	-178307901
-	.word	.LANCHOR80
-	.word	.LANCHOR87
-	.word	.LANCHOR125
-	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
-	.section	.text.ftl_open_sblk_recovery,"ax",%progbits
+	.word	.LANCHOR131
+	.word	.LANCHOR193
+	.word	.LC155
+	.word	.LC158
+	.word	.LC157
+	.size	ftl_info_blk_init, .-ftl_info_blk_init
+	.section	.text.ftl_ext_info_flush,"ax",%progbits
 	.align	1
-	.global	ftl_open_sblk_recovery
+	.global	ftl_ext_info_flush
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_open_sblk_recovery, %function
-ftl_open_sblk_recovery:
-	@ args = 0, pretend = 0, frame = 216
+	.type	ftl_ext_info_flush, %function
+ftl_ext_info_flush:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #224
-	ldr	r5, .L2891
-	mov	r4, r0
-	str	r1, [sp, #20]
-	ldr	r3, [r5]
-	lsls	r3, r3, #19
-	bpl	.L2765
-	ldrh	r1, [r0, #2]
-	ldr	r0, .L2891+4
-	bl	printf
-.L2765:
-	ldr	r3, [r5]
-	lsls	r7, r3, #19
-	bpl	.L2766
-	ldrb	r1, [r4, #5]	@ zero_extendqisi2
-	ldr	r0, .L2891+8
-	bl	printf
-.L2766:
-	ldr	r3, [r5]
-	lsls	r6, r3, #19
-	bpl	.L2767
-	ldrh	r1, [r4]
-	ldr	r0, .L2891+12
-	bl	printf
-.L2767:
-	ldr	r3, [r5]
-	lsls	r0, r3, #19
-	bpl	.L2768
-	ldrh	r2, [r4, #18]
-	ldrh	r1, [r4, #16]
-	ldr	r0, .L2891+16
-	bl	printf
-.L2768:
-	ldr	r3, [r5]
-	lsls	r1, r3, #19
-	bpl	.L2769
-	ldrb	r1, [r4, #9]	@ zero_extendqisi2
-	ldr	r0, .L2891+20
-	bl	printf
-.L2769:
-	ldrh	r3, [r4, #10]
-	ldrh	r2, [r4]
-	strh	r3, [r4, #14]	@ movhi
-	ldr	r3, .L2891+24
+	ldr	r3, .L3006
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r3, [r3]
+	ldr	r2, [r3, #520]
+	cbz	r2, .L2991
+	movs	r2, #0
+	str	r2, [r3, #520]
+.L2991:
+	ldr	r6, .L3006+4
+	movs	r0, #0
+	bl	ftl_total_vpn_update
+	mov	r5, r6
+.L2995:
+	ldr	r3, [r6]
+	ldr	r2, [r3, #56]
+	adds	r2, r2, #1
+	str	r2, [r3, #56]
+	ldrh	r2, [r3, #140]
+	ldr	r3, .L3006+8
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcs	.L2764
-	movs	r0, #1
-	bl	buf_alloc
-	movs	r2, #64
-	movs	r1, #255
-	mov	r5, r0
-	add	r0, sp, #32
-	bl	ftl_memset
-	movs	r2, #64
-	movs	r1, #255
-	add	r0, sp, #96
-	bl	ftl_memset
-	movs	r2, #64
-	movs	r1, #255
-	add	r0, sp, #160
-	bl	ftl_memset
-	ldrb	r6, [r4, #5]	@ zero_extendqisi2
-	movs	r3, #2
-	ldrh	r7, [r4, #2]
-	str	r3, [sp, #8]
-	movs	r3, #0
-	str	r3, [sp, #12]
-.L2771:
-	ldr	r3, .L2891+28
-	ldrh	r3, [r3]
-	cmp	r3, r7
-	bhi	.L2784
-.L2774:
-	ldrh	r3, [r4, #10]
-	ldr	r1, .L2891+28
-	ldrh	r2, [r4, #6]
-	ldrb	r0, [r4, #9]	@ zero_extendqisi2
-	strh	r7, [r4, #2]	@ movhi
-	add	r2, r2, r3
-	ldrh	r3, [r1]
-	strb	r6, [r4, #5]
-	str	r1, [sp, #16]
-	muls	r3, r0, r3
+	bcc	.L2993
+	bl	ftl_ext_alloc_new_blk
+.L2993:
+	ldr	r3, [r5]
+	ldrh	r2, [r3, #130]
+	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2785
-	movw	r2, #1569
-	ldr	r1, .L2891+32
-	ldr	r0, .L2891+36
+	bne	.L2994
+	movw	r2, #2203
+	ldr	r1, .L3006+12
+	ldr	r0, .L3006+16
 	bl	printf
-.L2785:
-	ldr	r3, .L2891+40
-	movs	r6, #0
-	ldrh	r0, [r4, #10]
-	mov	r2, r6
-	ldr	r7, [r3]
-	str	r3, [sp, #20]
-.L2786:
-	cmp	r2, r0
-	bcc	.L2788
-	ldr	r2, [sp, #16]
-	ldrb	r3, [r4, #9]	@ zero_extendqisi2
-	ldr	r7, .L2891
-	ldrh	r2, [r2]
-	ldr	r8, .L2891+60
-	smulbb	r3, r3, r2
-	subs	r3, r3, r0
-	add	r6, r6, r3
-	ldr	r3, [r7]
-	uxth	r6, r6
-	tst	r3, #4096
-	beq	.L2789
-	ldrh	r1, [r4]
-	mov	r2, r6
-	ldr	r3, [r8]
-	ldr	r0, .L2891+44
-	ldrh	r3, [r3, r1, lsl #1]
-	bl	printf
-.L2789:
-	ldr	r3, [r8]
-	ldrh	r2, [r4]
-	strh	r6, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, [r7]
-	lsls	r7, r3, #17
-	bpl	.L2790
-	ldr	r3, [sp, #44]
-	add	r1, sp, #32
-	ldr	r0, .L2891+48
-	str	r3, [sp]
-	ldm	r1, {r1, r2, r3}
-	bl	printf
-.L2790:
-	ldr	r6, .L2891+52
-	movs	r7, #0
-	ldr	fp, .L2891+56
-	movs	r1, #0
-	ldr	r0, [r5, #4]
-	ldrb	r2, [r6]	@ zero_extendqisi2
-	lsls	r2, r2, #9
-	bl	ftl_memset
-	str	r6, [sp, #24]
-.L2791:
-	ldrb	r3, [fp]	@ zero_extendqisi2
-	ldr	r2, [sp, #8]
-	muls	r3, r2, r3
-	cmp	r7, r3
-	bcc	.L2803
-	ldr	r8, .L2891+52
-	movs	r6, #0
-.L2804:
-	ldr	r3, .L2891+56
-	ldr	r2, [sp, #8]
+.L2994:
+	ldr	r3, .L3006+20
+	ldr	r2, [r5]
+	ldr	fp, .L3006+40
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	muls	r3, r2, r3
-	cmp	r6, r3
-	bcc	.L2811
-	mov	r0, r5
-	bl	zbuf_free
-	ldr	r3, [sp, #16]
-	ldrh	r2, [r4, #12]
-	ldrb	r1, [r4, #9]	@ zero_extendqisi2
+	ldrh	r1, [r2, #130]
+	ldr	r8, .L3006+44
+	rsb	r4, r3, #24
+	ldr	r3, .L3006+24
+	mov	r0, r8
 	ldrh	r3, [r3]
-	mla	r3, r1, r3, r2
-	ldr	r2, [sp, #20]
-	ldr	r2, [r2]
-	add	r3, r3, #1073741824
-	subs	r3, r3, #1
-	ldr	r3, [r2, r3, lsl #2]
+	subs	r3, r4, r3
+	movs	r4, #1
+	asr	r7, r1, r3
+	lsls	r4, r4, r3
+	ldr	r3, .L3006+28
+	subs	r4, r4, #1
+	ands	r4, r4, r1
+	ldrh	r1, [r3]
+	sxth	r4, r4
+	ldrh	r3, [r2, #140]
+	ldrb	r2, [fp]	@ zero_extendqisi2
+	mla	r4, r1, r4, r3
+	lsls	r2, r2, #1
+	movs	r1, #0
+	bl	ftl_memset
+	movs	r3, #0
+	ldrb	fp, [fp]	@ zero_extendqisi2
+	str	r3, [r8]
+	ldr	r3, [r5]
+	lsl	r1, fp, #9
+	ldr	r3, [r3, #56]
+	str	r3, [r8, #4]
+	ldr	r3, .L3006+32
+	ldr	r10, [r3]
+	mov	r0, r10
+	bl	js_hash
+	mov	r3, r8
+	str	r0, [r8, #8]
+	mov	r2, r10
+	str	fp, [sp]
+	mov	r1, r4
+	uxtb	r0, r7
+	bl	ftl_prog_page
+	ldr	r2, [r5]
+	ldrh	r3, [r2, #140]
 	adds	r3, r3, #1
-	beq	.L2812
-	movw	r2, #1660
-	ldr	r1, .L2891+32
-	ldr	r0, .L2891+36
-	bl	printf
-.L2812:
-	ldrh	r3, [r4, #6]
+	uxth	r3, r3
 	cmp	r3, #1
-	bne	.L2764
-	mov	r0, r4
-	bl	ftl_write_last_log_page
-.L2764:
-	add	sp, sp, #224
+	strh	r3, [r2, #140]	@ movhi
+	beq	.L2995
+	adds	r0, r0, #1
+	ldr	r3, .L3006+36
+	beq	.L2996
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	cbz	r0, .L2997
+.L2996:
+.L2992:
+	movs	r2, #0
+	strb	r2, [r3]
+	b	.L2995
+.L2997:
+	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2784:
-	ldrb	r6, [r4, #5]	@ zero_extendqisi2
-.L2772:
-	ldrb	r3, [r4, #9]	@ zero_extendqisi2
-	cmp	r3, r6
-	bhi	.L2783
-	movs	r3, #0
-	adds	r7, r7, #1
-	strb	r3, [r4, #5]
-	uxth	r7, r7
-	b	.L2771
-.L2892:
+.L3007:
 	.align	2
-.L2891:
-	.word	.LANCHOR14
-	.word	.LC151
-	.word	.LC152
-	.word	.LC153
-	.word	.LC154
-	.word	.LC155
-	.word	.LANCHOR6
-	.word	.LANCHOR87
-	.word	.LANCHOR189
+.L3006:
+	.word	.LANCHOR10
+	.word	.LANCHOR110
+	.word	.LANCHOR95
+	.word	.LANCHOR201
 	.word	.LC0
+	.word	.LANCHOR32
+	.word	.LANCHOR75
 	.word	.LANCHOR111
-	.word	.LC156
-	.word	.LC157
-	.word	.LANCHOR125
-	.word	.LANCHOR80
-	.word	.LANCHOR9
-.L2783:
-	add	r3, r6, #8
-	movw	r2, #65535
-	ldrh	r3, [r4, r3, lsl #1]
-	cmp	r3, r2
-	beq	.L2773
-	ldr	r2, .L2893
-	ldr	r1, [r5, #4]
-	ldrh	r2, [r2]
-	mla	r3, r3, r2, r7
-	ldr	r2, [r5, #12]
-	str	r3, [sp, #16]
-	ldr	r3, .L2893+4
-	ldr	r0, [sp, #16]
+	.word	.LANCHOR200
+	.word	.LANCHOR199
+	.word	.LANCHOR131
+	.word	.LANCHOR193
+	.size	ftl_ext_info_flush, .-ftl_ext_info_flush
+	.section	.text.ftl_ext_info_init,"ax",%progbits
+	.align	1
+	.global	ftl_ext_info_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_ext_info_init, %function
+ftl_ext_info_init:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r2, #0
+	ldr	r3, .L3030
+	ldr	r5, .L3030+4
+	strh	r2, [r3]	@ movhi
+	ldr	r1, .L3030+8
+	ldr	r3, [r5]
+	ldrh	r4, [r1]
+	ldrh	r2, [r3, #130]
+	ldr	r3, .L3030+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	bl	ftl_read_ppa_page
-	cmp	r0, #512
-	mov	r8, r0
-	beq	.L2774
-	cmp	r0, #-1
-	beq	.L2775
-	ldr	r3, [r5, #12]
-	ldr	r2, [r3]
-	adds	r2, r2, #1
-	bne	.L2775
-	ldr	r3, [r3, #4]
-	adds	r3, r3, #1
-	bne	.L2775
-	ldr	r3, [r5, #4]
+	rsb	r3, r3, #24
+	subs	r3, r3, r4
+	movs	r4, #1
+	lsls	r4, r4, r3
+	asr	r7, r2, r3
+	subs	r4, r4, #1
+	uxtb	r8, r7
+	ands	r4, r4, r2
+	ldr	r2, .L3030+16
+	movs	r3, #4
+	mov	r1, r4
+	str	r3, [sp]
+	mov	r0, r8
+	ldr	r3, .L3030+20
+	ldr	r2, [r2]
+	bl	flash_get_last_written_page
+	ldr	r3, .L3030+24
+	mov	r6, r0
 	ldr	r3, [r3]
-	adds	r3, r3, #1
-	beq	.L2774
-.L2775:
-	ldr	r3, .L2893+8
-	movs	r2, #1
-	strb	r2, [r3]
-	ldrb	r3, [r4, #9]	@ zero_extendqisi2
-	ldrh	r2, [r4, #10]
-	mla	r3, r7, r3, r6
-	cmp	r2, r3
-	beq	.L2776
-	mov	r2, #1488
-	ldr	r1, .L2893+12
-	ldr	r0, .L2893+16
-	bl	printf
-.L2776:
-	ldrh	r3, [r4, #10]
-	ldrh	r2, [r4, #6]
-	add	r2, r2, r3
-	ldr	r3, .L2893+20
-	ldrh	r1, [r3]
-	ldrb	r3, [r4, #9]	@ zero_extendqisi2
-	muls	r3, r1, r3
-	cmp	r2, r3
-	beq	.L2777
-	movw	r2, #1489
-	ldr	r1, .L2893+12
-	ldr	r0, .L2893+16
+	lsls	r2, r3, #19
+	bpl	.L3009
+	ldr	r3, [r5]
+	uxth	r7, r7
+	movw	r2, #2248
+	ldr	r1, .L3030+28
+	ldrh	r3, [r3, #130]
+	str	r7, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r0
+	ldr	r0, .L3030+32
 	bl	printf
-.L2777:
-	cmp	r8, #-1
-	beq	.L2779
-	ldr	r3, [r5, #12]
-	ldr	r0, [r3, #4]
-	adds	r2, r0, #1
-	beq	.L2779
-	bl	lpa_hash_get_ppa
-	ldr	r3, [sp, #20]
-	mov	r8, r0
-	cmp	r3, #0
-	beq	.L2781
-	ldr	r10, [r5, #12]
-	ldr	r3, [r10, #8]
-	cmp	r0, r3
-	beq	.L2781
-	cmp	r0, #-1
-	beq	.L2781
-	ldr	r3, .L2893+24
-	mov	fp, #1
-	ldr	r2, .L2893+28
+.L3009:
+	movs	r7, #0
+.L3010:
+	uxth	r10, r6
+	sub	r3, r10, r7
+	lsls	r0, r3, #16
+	bmi	.L3015
+	ldr	r3, .L3030+36
+	subs	r1, r6, r7
+	ldr	fp, .L3030+60
+	ldr	r2, .L3030+16
 	ldrh	r0, [r3]
-	ldr	r3, .L2893+32
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	rsb	r3, r3, #24
-	subs	r3, r3, r0
-	lsr	r0, r8, r0
-	lsl	r3, fp, r3
-	subs	r3, r3, #1
-	ands	r0, r0, r3
-	bl	__aeabi_uidiv
-	ldr	r3, [sp, #20]
-	uxth	r0, r0
-	ldrh	r3, [r3]
-	cmp	r3, r0
-	bne	.L2781
-	ldr	r3, [r10]
+	ldrb	r3, [fp]	@ zero_extendqisi2
+	mla	r1, r4, r0, r1
+	str	r3, [sp]
+	ldr	r3, .L3030+20
+	ldr	r2, [r2]
 	mov	r0, r8
-	ldr	r10, .L2893+52
-	ldr	r1, [r5, #4]
-	str	r3, [sp, #8]
-	ldr	r3, .L2893+4
-	mov	r2, r10
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	bl	ftl_read_ppa_page
-	ldr	r3, [r10]
-	ldr	r2, [sp, #8]
-	cmp	r2, r3
-	bhi	.L2781
-	ldr	r3, [r5, #12]
-	ldr	r0, [r3, #8]
+	bl	flash_read_page_en
 	adds	r3, r0, #1
-	beq	.L2779
-	ldr	r3, .L2893+24
-	ldrh	r2, [r3]
-	ldr	r3, .L2893+32
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	lsrs	r0, r0, r2
-	rsb	r3, r3, #24
-	subs	r3, r3, r2
-	ldr	r2, .L2893+28
-	lsl	r3, fp, r3
-	subs	r3, r3, #1
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	ands	r0, r0, r3
-	bl	__aeabi_uidiv
-	uxth	r0, r0
-	bl	ftl_vpn_decrement
-.L2779:
-	ldrh	r3, [r4, #6]
-	subs	r3, r3, #1
-	strh	r3, [r4, #6]	@ movhi
-	ldrh	r3, [r4, #10]
-	adds	r3, r3, #1
-	strh	r3, [r4, #10]	@ movhi
-	movs	r3, #4
-	str	r3, [sp, #8]
-	movs	r3, #1
-	str	r3, [sp, #12]
-.L2773:
-	adds	r6, r6, #1
-	uxth	r6, r6
-	b	.L2772
-.L2788:
-	ldrh	r1, [r4, #12]
-	add	r1, r1, r2
-	adds	r2, r2, #1
-	ldr	r3, [r7, r1, lsl #2]
-	adds	r3, r3, #1
-	itt	ne
-	addne	r6, r6, #1
-	uxthne	r6, r6
-	b	.L2786
-.L2803:
-	add	r10, sp, #32
-	ldr	r0, [r10, r7, lsl #2]
-	adds	r6, r0, #1
-	bne	.L2792
-.L2796:
-	ldr	r2, .L2893+36
-	mov	r6, #-1
-	ldr	r3, [r5, #12]
-	ldr	r2, [r2]
-	ldr	r2, [r2, #8]
-	str	r6, [r3, #4]
-	str	r6, [r3, #8]
-	str	r2, [r3]
+	beq	.L3011
+	cmp	r0, #512
+	beq	.L3011
+	ldr	r3, .L3030+40
+	ldr	r2, .L3030+44
+	ldr	r3, [r3]
+	ldr	r3, [r3]
+	cmp	r3, r2
+	bne	.L3011
+	ldr	r3, .L3030+20
+	ldr	r3, [r3, #8]
+	cmp	r3, #0
+	bne	.L3012
+.L3015:
+	bl	zftl_sblk_list_init
+	ldr	r2, [r5]
+	ldrh	r3, [r2, #140]
+	cmp	r3, r6
+	bgt	.L3014
+	add	r3, r10, #1
+	strh	r3, [r2, #140]	@ movhi
+	bl	ftl_ext_info_flush
+.L3014:
+	ldr	r3, .L3030+40
+	movw	r1, #65535
 	movs	r2, #0
-	str	r2, [r3, #12]
-	ldr	r3, [r5, #4]
-	str	r2, [r3]
-.L2793:
+	ldr	r3, [r3]
+	strh	r1, [r3, #584]	@ movhi
+	strh	r1, [r3, #586]	@ movhi
+	strh	r1, [r3, #588]	@ movhi
+	strh	r1, [r3, #590]	@ movhi
+	str	r1, [r3, #560]
+	mov	r1, #-1
+	str	r1, [r3, #564]
+	ldr	r1, .L3030+24
+	str	r2, [r3, #520]
+	str	r2, [r3, #604]
+	ldr	r1, [r1]
+	str	r2, [r3, #608]
+	lsls	r1, r1, #19
+	bpl	.L3017
+	str	r2, [sp]
+	ldr	r1, .L3030+28
+	ldr	r3, [r3, #12]
+	ldr	r0, .L3030+48
+	bl	printf
+.L3017:
+	ldr	r3, .L3030+52
+	movw	r2, #65535
+	movs	r0, #0
+	strh	r2, [r3]	@ movhi
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3012:
+	ldrb	r1, [fp]	@ zero_extendqisi2
+	str	r3, [sp, #12]
+	ldr	r3, .L3030+16
+	lsls	r1, r1, #9
+	ldr	r0, [r3]
+	bl	js_hash
 	ldr	r3, [sp, #12]
-	cmp	r3, #0
-	beq	.L2798
-	ldrh	r3, [r4, #6]
-	cmp	r3, #1
-	bls	.L2798
-	ldr	r10, .L2893+44
-.L2864:
-	mov	r0, r4
-	bl	ftl_get_new_free_page
-	ldr	r3, [r10]
-	mov	r8, r0
-	lsls	r3, r3, #17
-	bpl	.L2800
-	ldrh	r2, [r4, #12]
-	mov	r1, r0
-	ldrh	r3, [r4, #10]
-	ldr	r0, .L2893+40
-	add	r3, r3, r2
-	ldr	r2, [r5, #12]
-	subs	r3, r3, #1
-	ldr	r2, [r2, #4]
+	cmp	r3, r0
+	beq	.L3015
+	mov	r1, r3
+	ldr	r0, .L3030+56
 	bl	printf
-.L2800:
-	ldrb	r3, [fp]	@ zero_extendqisi2
-	ldr	r1, [sp, #8]
-	ldrh	r2, [r4, #6]
-	muls	r3, r1, r3
-	adds	r3, r3, #1
-	subs	r3, r3, r7
-	cmp	r2, r3
-	bls	.L2798
-	ldr	r3, .L2893+4
-	mov	r0, r8
-	ldr	r2, [r5, #12]
-	ldr	r1, [r5, #4]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	bl	ftl_prog_ppa_page
-	str	r0, [sp, #28]
-	ldrh	r0, [r4]
-	bl	ftl_vpn_decrement
-	adds	r0, r6, #1
-	beq	.L2801
-	ldr	r3, [sp, #28]
-	adds	r3, r3, #1
-	beq	.L2801
-	add	r3, sp, #96
-	ldrh	r2, [r4, #12]
-	str	r8, [r3, r7, lsl #2]
-	ldrh	r3, [r4, #10]
-	add	r3, r3, r2
-	add	r2, sp, #160
-	subs	r3, r3, #1
-	str	r3, [r2, r7, lsl #2]
-.L2798:
+.L3011:
 	adds	r7, r7, #1
-	b	.L2791
-.L2792:
-	ldr	r3, [sp, #24]
-	ldr	r1, [r5, #4]
-	ldr	r2, [r5, #12]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	bl	ftl_read_ppa_page
-	ldr	r3, [r5, #12]
-	mov	r6, r0
-	ldr	r0, [r3, #4]
-	bl	lpa_hash_get_ppa
-	ldr	r3, .L2893+44
-	mov	r8, r0
-	ldr	r3, [r3]
-	lsls	r1, r3, #17
-	bpl	.L2794
-	ldr	r3, [r5, #12]
-	mov	r1, r0
-	ldr	r2, [r10, r7, lsl #2]
-	ldr	r0, .L2893+48
-	ldr	r3, [r3, #4]
-	bl	printf
-.L2794:
-	add	r3, sp, #32
-	movs	r2, #1
-	ldr	r3, [r3, r7, lsl #2]
-	cmp	r8, r3
-	it	ne
-	movne	r6, #-1
-	ldr	r3, [r5, #12]
-	str	r2, [r3, #12]
-	adds	r2, r6, #1
-	str	r8, [r3, #8]
-	bne	.L2793
-	b	.L2796
-.L2801:
-	ldrh	r3, [r4, #6]
-	cmp	r3, #1
-	bls	.L2798
-	adds	r1, r6, #1
-	bne	.L2864
-	b	.L2798
-.L2894:
+	b	.L3010
+.L3031:
 	.align	2
-.L2893:
-	.word	.LANCHOR105
-	.word	.LANCHOR125
-	.word	.LANCHOR185
-	.word	.LANCHOR189
-	.word	.LC0
-	.word	.LANCHOR87
-	.word	.LANCHOR68
-	.word	.LANCHOR69
-	.word	.LANCHOR31
-	.word	.LANCHOR104
-	.word	.LC159
+.L3030:
+	.word	.LANCHOR121
+	.word	.LANCHOR110
+	.word	.LANCHOR75
+	.word	.LANCHOR32
+	.word	.LANCHOR200
+	.word	.LANCHOR193
 	.word	.LANCHOR14
-	.word	.LC158
-	.word	.LANCHOR181
-.L2811:
-	add	r10, sp, #96
-	ldr	r3, [r10, r6, lsl #2]
-	adds	r3, r3, #1
-	beq	.L2806
-	add	r7, sp, #32
-	ldr	r2, [r5, #12]
-	ldrb	r3, [r8]	@ zero_extendqisi2
-	ldr	r1, [r5, #4]
-	ldr	r0, [r7, r6, lsl #2]
-	bl	ftl_read_ppa_page
-	adds	r2, r0, #1
-	beq	.L2807
-	cmp	r0, #256
-	bne	.L2806
-.L2807:
-	ldr	r0, [r10, r6, lsl #2]
-	ldr	r10, .L2895+20
-	ldrb	r3, [r8]	@ zero_extendqisi2
-	ldr	r2, [r5, #12]
-	ldr	r1, [r5, #4]
-	bl	ftl_read_ppa_page
-	ldr	r3, [r10]
-	mov	fp, r0
-	lsls	r3, r3, #17
-	bpl	.L2809
-	ldr	r2, [r5, #12]
-	mov	r1, r0
-	ldr	r3, [r7, r6, lsl #2]
-	ldr	r0, .L2895
-	ldr	r2, [r2, #8]
-	bl	printf
-.L2809:
-	cmp	fp, #-1
-	beq	.L2806
-	ldr	r1, [r5, #12]
-	ldr	r2, [r7, r6, lsl #2]
-	ldr	r3, [r1, #8]
-	cmp	r2, r3
-	bne	.L2806
-	ldr	r3, [r10]
-	add	r7, sp, #160
-	tst	r3, #16384
-	beq	.L2810
-	ldr	r3, [r7, r6, lsl #2]
-	ldr	r1, [r1, #4]
-	ldr	r0, .L2895+4
-	bl	printf
-.L2810:
-	ldr	r3, [r5, #12]
-	ldrh	r2, [r7, r6, lsl #2]
-	ldr	r1, [r3, #8]
-	ldr	r0, [r3, #4]
-	bl	lpa_hash_update_ppa
-.L2806:
-	adds	r6, r6, #1
-	b	.L2804
-.L2781:
-	ldr	r0, [r5, #12]
-	ldr	r3, .L2895+8
-	ldr	r2, [r0, #4]
-	ldr	r3, [r3]
-	cmp	r2, r3
-	bcs	.L2779
-	ldr	r3, .L2895+12
-	ldrb	r1, [r4, #9]	@ zero_extendqisi2
-	ldrh	ip, [r4, #10]
-	ldrh	r3, [r3]
-	muls	r3, r1, r3
-	subs	r3, r3, #1
-	cmp	ip, r3
-	bge	.L2779
-	ldr	r3, .L2895+16
-	ldr	r1, [r0]
-	ldr	r3, [r3]
-	ldr	r2, [r3, #8]
-	cmp	r1, r2
-	it	hi
-	strhi	r1, [r3, #8]
-	ldrh	r3, [r4, #12]
-	ldr	r1, [r0, #8]
-	ldr	r0, [r0, #4]
-	add	r2, ip, r3
-	uxth	r2, r2
-	bl	lpa_hash_update_ppa
-	ldr	r3, [sp, #36]
-	str	r3, [sp, #32]
-	ldr	r3, [sp, #40]
-	str	r3, [sp, #36]
-	ldr	r3, [sp, #44]
-	str	r3, [sp, #40]
-	ldr	r3, [sp, #16]
-	str	r3, [sp, #44]
-	b	.L2779
-.L2896:
-	.align	2
-.L2895:
+	.word	.LANCHOR202
 	.word	.LC159
-	.word	.LC160
-	.word	.LANCHOR122
-	.word	.LANCHOR87
-	.word	.LANCHOR104
-	.word	.LANCHOR14
-	.size	ftl_open_sblk_recovery, .-ftl_open_sblk_recovery
-	.section	.text.pm_write_page,"ax",%progbits
+	.word	.LANCHOR111
+	.word	.LANCHOR10
+	.word	1162432070
+	.word	.LC161
+	.word	.LANCHOR73
+	.word	.LC160
+	.word	.LANCHOR131
+	.size	ftl_ext_info_init, .-ftl_ext_info_init
+	.section	.text.ftl_low_format_data_init,"ax",%progbits
 	.align	1
-	.global	pm_write_page
+	.global	ftl_low_format_data_init
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	pm_write_page, %function
-pm_write_page:
+	.type	ftl_low_format_data_init, %function
+ftl_low_format_data_init:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
-	mov	r4, r0
-	ldr	r7, .L2910
-	mov	r8, r1
-	mov	r6, r7
-.L2898:
-	ldr	r3, [r7]
-	ldr	r2, [r3, #48]
-	ldrh	r1, [r3, #696]
-	adds	r2, r2, #1
-	str	r2, [r3, #48]
-	ldr	r2, .L2910+4
-	ldrh	r2, [r2]
-	cmp	r1, r2
-	bcs	.L2899
-	ldrh	r2, [r3, #692]
-	movw	r3, #65535
-	cmp	r2, r3
-	bne	.L2900
-.L2899:
-	bl	pm_alloc_new_blk
-	movs	r0, #0
-	bl	ftl_info_flush
-.L2900:
-	ldr	r3, [r6]
-	ldrh	r2, [r3, #692]
-	movw	r3, #65535
-	cmp	r2, r3
-	bne	.L2901
-	movw	r2, #263
-	ldr	r1, .L2910+8
-	ldr	r0, .L2910+12
-	bl	printf
-.L2901:
-	ldr	r3, [r6]
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r2, #16384
+	ldr	r3, .L3034
 	movs	r1, #0
-	ldr	r2, .L2910+16
-	ldr	r10, .L2910+32
-	ldrh	r5, [r3, #692]
-	ldrh	r2, [r2]
-	ldrh	r3, [r3, #696]
-	ldr	r0, [r10]
-	mla	r5, r2, r5, r3
-	movs	r2, #64
+	ldr	r5, .L3034+4
+	ldr	r0, [r3]
 	bl	ftl_memset
-	ldr	r2, [r6]
-	ldr	r3, [r10]
-	ldrb	r0, [r2, #694]	@ zero_extendqisi2
-	str	r4, [r3]
-	ldr	r1, [r2, #48]
-	ldr	r2, .L2910+20
-	str	r1, [r3, #4]
-	mov	r1, r5
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	str	r2, [sp]
-	mov	r2, r8
-	bl	ftl_prog_page
-	ldr	r2, [r6]
-	ldrh	r3, [r2, #696]
-	adds	r3, r3, #1
-	uxth	r3, r3
-	cmp	r3, #1
-	strh	r3, [r2, #696]	@ movhi
-	ldr	r3, .L2910+24
-	beq	.L2902
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	cbz	r1, .L2903
-.L2902:
+	bl	zftl_sblk_list_init
+	movs	r0, #1
+	bl	ftl_alloc_sblk
+	movs	r1, #0
+	mov	r6, r0
+	bl	ftl_erase_sblk
+	ldr	r1, [r5]
+	mov	r0, r6
+	add	r1, r1, #672
+	bl	ftl_get_blk_list_in_sblk
+	ldr	r3, [r5]
 	movs	r2, #0
-	strb	r2, [r3]
-	b	.L2898
-.L2903:
-	adds	r0, r0, #1
-	bne	.L2905
-	mov	r1, r5
-	ldr	r0, .L2910+28
+	ldrh	r7, [r3, #672]
+	strh	r2, [r3, #690]	@ movhi
+	movw	r2, #65533
+	subs	r3, r7, #1
+	uxth	r3, r3
+	cmp	r3, r2
+	bls	.L3033
+	movw	r2, #2476
+	ldr	r1, .L3034+8
+	ldr	r0, .L3034+12
 	bl	printf
-	b	.L2898
-.L2905:
-	ldrh	r3, [r2, #698]
-	movs	r0, #0
-	cmp	r4, r3
-	itt	cc
-	addcc	r4, r4, #176
-	strcc	r5, [r2, r4, lsl #2]
-	add	sp, sp, #12
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L2911:
+.L3033:
+	ldr	r0, [r5]
+	movs	r4, #0
+	mov	r2, #256
+	movs	r1, #255
+	strh	r4, [r0, #696]	@ movhi
+	add	r0, r0, #416
+	bl	ftl_memset
+	ldr	r0, [r5]
+	mov	r1, r4
+	mov	r2, #4096
+	add	r0, r0, #704
+	bl	ftl_memset
+	ldr	r3, .L3034+16
+	ldr	r1, .L3034+20
+	ldr	r2, [r5]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	ldrh	r1, [r1]
+	strh	r7, [r2, #692]	@ movhi
+	rsb	r3, r3, #24
+	strh	r6, [r2, #416]	@ movhi
+	subs	r3, r3, r1
+	asr	r3, r7, r3
+	ldr	r7, .L3034+24
+	strh	r3, [r2, #694]	@ movhi
+	movs	r3, #1
+	strh	r3, [r2, #688]	@ movhi
+	ldr	r3, .L3034+28
+	ldrh	r3, [r3]
+	strh	r3, [r2, #698]	@ movhi
+	ldr	r2, .L3034+32
+	ldr	r3, [r7]
+	str	r2, [r3]
+	bl	ftl_alloc_sys_blk
+	mov	r1, r4
+	mov	r6, r0
+	bl	ftl_erase_phy_blk
+	ldr	r3, [r5]
+	movs	r1, #2
+	ldr	r0, [r7]
+	strh	r6, [r3, #130]	@ movhi
+	movw	r6, #65535
+	strh	r4, [r3, #140]	@ movhi
+	adds	r0, r0, #16
+	strh	r6, [r0, #568]	@ movhi
+	strh	r6, [r0, #570]	@ movhi
+	strh	r6, [r0, #572]	@ movhi
+	strh	r6, [r0, #574]	@ movhi
+	bl	ftl_open_sblk_init
+	ldr	r0, [r7]
+	movs	r1, #3
+	adds	r0, r0, #48
+	bl	ftl_open_sblk_init
+	ldr	r3, [r5]
+	movs	r1, #255
+	ldr	r0, [r7]
+	ldrh	r2, [r3, #134]
+	adds	r0, r0, #136
+	strh	r4, [r0, #-12]	@ movhi
+	strh	r4, [r0, #-16]	@ movhi
+	strh	r2, [r0, #-10]	@ movhi
+	mov	r2, #-1
+	strh	r4, [r0, #-14]	@ movhi
+	strh	r6, [r0, #-56]	@ movhi
+	strh	r6, [r0, #-6]	@ movhi
+	str	r2, [r0, #408]
+	strh	r2, [r3, #126]	@ movhi
+	mov	r2, #256
+	str	r4, [r0, #384]
+	str	r4, [r0, #388]
+	str	r4, [r0, #392]
+	bl	ftl_memset
+	ldr	r0, [r7]
+	movs	r2, #128
+	movs	r1, #255
+	add	r0, r0, #392
+	bl	ftl_memset
+	bl	ftl_ext_info_flush
+	mov	r0, r4
+	bl	ftl_info_flush
+	bl	ftl_info_blk_init
+	mov	r0, r4
+	pop	{r3, r4, r5, r6, r7, pc}
+.L3035:
 	.align	2
-.L2910:
-	.word	.LANCHOR104
-	.word	.LANCHOR87
-	.word	.LANCHOR190
+.L3034:
+	.word	.LANCHOR200
+	.word	.LANCHOR110
+	.word	.LANCHOR203
 	.word	.LC0
-	.word	.LANCHOR105
-	.word	.LANCHOR125
-	.word	.LANCHOR192
-	.word	.LC161
-	.word	.LANCHOR191
-	.size	pm_write_page, .-pm_write_page
-	.section	.text.ftl_dump_write_open_sblk,"ax",%progbits
+	.word	.LANCHOR32
+	.word	.LANCHOR75
+	.word	.LANCHOR10
+	.word	.LANCHOR204
+	.word	1162432070
+	.size	ftl_low_format_data_init, .-ftl_low_format_data_init
+	.section	.text.ftl_low_format,"ax",%progbits
 	.align	1
-	.global	ftl_dump_write_open_sblk
+	.global	ftl_low_format
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_dump_write_open_sblk, %function
-ftl_dump_write_open_sblk:
-	@ args = 0, pretend = 0, frame = 64
+	.type	ftl_low_format, %function
+ftl_low_format:
+	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2941
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r5, r0
-	sub	sp, sp, #104
-	ldrh	r3, [r3]
-	cmp	r3, r0
-	bls	.L2912
-	ldr	r3, .L2941+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L2914
-	ldr	r3, .L2941+8
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #0
-	beq	.L2912
-.L2914:
-	ldr	r7, .L2941+12
-	lsls	r4, r5, #2
-	add	r1, sp, #88
-	strh	r5, [sp, #72]	@ movhi
-	mov	r0, r5
-	movs	r6, #0
-	ldr	r3, [r7]
+	movs	r4, #8
+	ldr	r6, .L3073
+	sub	sp, sp, #40
+	movs	r1, #0
+	ldr	r0, .L3073+4
+	bl	printf
+.L3039:
+	ldr	r3, [r6]
 	add	r3, r3, r4
-	ldrb	r3, [r3, #2]	@ zero_extendqisi2
-	and	r3, r3, #224
-	cmp	r3, #160
-	itet	eq
-	ldreq	r3, .L2941+16
-	movne	r8, #1
-	ldrbeq	r8, [r3]	@ zero_extendqisi2
-	bl	ftl_get_blk_list_in_sblk
-	ldr	r3, .L2941+20
-	uxtb	r0, r0
-	strb	r6, [sp, #77]
-	strb	r0, [sp, #81]
-	ldrh	r3, [r3]
-	strh	r6, [sp, #74]	@ movhi
-	strh	r6, [sp, #82]	@ movhi
-	smulbb	r0, r3, r0
-	ldr	r3, [r7]
-	mov	r7, r6
-	ldr	r1, [r3, r5, lsl #2]
-	add	r4, r4, r3
-	ldrb	r2, [r4, #2]	@ zero_extendqisi2
-	strh	r0, [sp, #78]	@ movhi
-	ubfx	r1, r1, #11, #8
-	ldr	r0, .L2941+24
-	str	r1, [sp, #4]
-	mov	r1, r5
-	ldrh	r3, [r3, r5, lsl #2]
-	ubfx	r3, r3, #0, #11
-	str	r3, [sp]
-	ubfx	r3, r2, #3, #2
-	lsrs	r2, r2, #5
+	ldrb	r5, [r3, #32]	@ zero_extendqisi2
+	cmp	r5, #128
+	ble	.L3037
+	cmp	r5, #255
+	beq	.L3038
+	movw	r2, #2531
+	ldr	r1, .L3073+8
+	ldr	r0, .L3073+12
 	bl	printf
-	movs	r0, #1
-	bl	buf_alloc
-	mov	r4, r0
-	str	r6, [sp, #44]
-.L2916:
-	ldr	r3, .L2941+20
-	uxth	r10, r6
-	ldrh	r3, [r3]
-	cmp	r3, r10
-	bls	.L2922
-	mov	r3, r10
-	str	r10, [sp, #52]
-	lsls	r3, r3, #1
-	mov	fp, #0
-	subs	r3, r3, #1
-	str	r3, [sp, #60]
-	b	.L2926
-.L2924:
-	ldr	r3, [sp, #64]
-	add	r2, sp, #104
-	add	r3, r2, r3, lsl #1
-	ldrh	r3, [r3, #-32]
-	str	r3, [sp, #48]
-	movw	r3, #65535
-	ldr	r2, [sp, #48]
-	cmp	r2, r3
-	bne	.L2917
-.L2923:
-	adds	r7, r7, #1
-	uxth	r7, r7
-.L2918:
-	cmp	r8, r7
-	bcs	.L2924
-	add	fp, fp, #1
-.L2926:
-	uxth	r3, fp
-	str	r3, [sp, #44]
-	ldr	r2, [sp, #44]
-	ldrb	r3, [sp, #81]	@ zero_extendqisi2
-	cmp	r3, r2
-	bls	.L2925
-	mov	r3, r2
-	movs	r7, #1
-	adds	r3, r3, #8
-	str	r3, [sp, #64]
-	b	.L2918
-.L2917:
-	ldr	r3, .L2941+28
-	cmp	r8, #3
-	ldr	r2, [sp, #48]
-	ldrh	r3, [r3]
-	mul	r3, r2, r3
-	bne	.L2919
-	uxtah	r3, r3, r6
-	orr	r3, r3, r7, lsl #24
-.L2920:
-	str	r3, [r4, #24]
-	movs	r1, #1
-	mov	r0, r4
-	str	r3, [sp, #68]
-	bl	sblk_read_page
-	ldr	r1, [r4, #12]
-	ldr	r2, [r4, #4]
-	ldr	r3, [r4, #36]
-	ldr	r0, [r1, #12]
-	str	r3, [sp, #56]
-	str	r0, [sp, #32]
-	ldr	r0, [r1, #8]
-	str	r0, [sp, #28]
-	ldr	r0, [r1, #4]
-	str	r0, [sp, #24]
-	ldr	r1, [r1]
-	ldr	r0, .L2941+32
-	str	r1, [sp, #20]
-	ldr	r1, [r2, #12]
-	str	r1, [sp, #16]
-	ldr	r1, [r2, #8]
-	str	r1, [sp, #12]
-	ldr	r1, [r2, #4]
-	str	r1, [sp, #8]
-	ldr	r2, [r2]
-	ldr	r1, [sp, #48]
-	str	r3, [sp]
-	str	r2, [sp, #4]
-	ldr	r3, [sp, #68]
-	ldr	r2, [sp, #52]
-	bl	printf
-	ldr	r3, [sp, #56]
-	cmp	r3, #512
-	bne	.L2923
-.L2922:
-	uxth	r2, r6
-	ldr	r6, .L2941+36
-	ldr	r3, [sp, #44]
-	mov	r1, r5
-	str	r7, [sp]
-	ldr	r0, .L2941+40
-	bl	printf
-	ldrb	r2, [r6]	@ zero_extendqisi2
-	movs	r1, #0
-	ldr	r0, [r4, #4]
-	ldr	fp, .L2941+4
-	lsls	r2, r2, #9
-	bl	ftl_memset
-	ldrb	r2, [r6]	@ zero_extendqisi2
+.L3037:
+	ldr	r3, .L3073+16
+	movs	r0, #0
+	ldrh	r1, [r3]
+	muls	r1, r5, r1
+	bl	flash_erase_block
+.L3038:
+	adds	r4, r4, #1
+	cmp	r4, #16
+	bne	.L3039
+	bl	sblk_init
+	bl	ftl_info_blk_init
+	ldr	r3, .L3073+20
+	mov	r2, #16384
 	movs	r1, #0
-	ldr	r0, [r4, #12]
-	lsls	r2, r2, #1
+	ldr	r0, [r3]
 	bl	ftl_memset
-.L2927:
-	ldr	r3, .L2941+20
+	ldr	r2, .L3073+24
+	movs	r0, #1
+	ldr	r1, .L3073+28
+	ldr	r3, [r2]
+	ldrh	r1, [r1]
+	str	r2, [sp, #24]
+	add	r1, r3, r1, lsl #2
+.L3040:
+	cmp	r3, r1
+	bne	.L3041
+	ldr	r7, .L3073+32
+	movs	r4, #0
+	ldr	r2, .L3073+36
+	ldr	r3, [r7]
+	str	r2, [r3]
+	strh	r4, [r3, #148]	@ movhi
+.L3042:
+	ldr	r3, .L3073+28
+	uxth	r0, r4
 	ldrh	r3, [r3]
-	cmp	r3, r10
-	bls	.L2932
-	lsl	r3, r10, #1
-	movs	r7, #0
-	str	r3, [sp, #44]
-	b	.L2933
-.L2919:
-	cmp	r8, #2
-	itett	eq
-	ldreq	r2, [sp, #60]
-	uxtahne	r3, r3, r6
-	addeq	r3, r3, r2
-	ldreq	r2, .L2941+16
-	ittt	eq
-	addeq	r3, r3, r7
-	ldrbeq	r2, [r2]	@ zero_extendqisi2
-	orreq	r3, r3, r2, lsl #24
-	b	.L2920
-.L2925:
-	adds	r6, r6, #1
-	b	.L2916
-.L2931:
-	uxth	r8, r7
-	mov	r1, r10
-	ldr	r0, .L2941+44
-	mov	r2, r8
+	cmp	r3, r0
+	bhi	.L3050
+	ldr	r3, .L3073+40
+	mov	fp, #15
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	ldr	r3, .L3073
+	mov	r1, r5
+	ldr	r3, [r3]
+	ldrb	r0, [r3, #47]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	ldr	r3, .L3073+24
+	uxtb	r0, r0
+	cmp	r5, #1
+	uxth	lr, r5
+	add	r4, r0, #1
+	ldr	r10, [r3]
+	it	eq
+	moveq	r8, #1
+	ldr	r3, .L3073+32
+	it	ne
+	movne	r8, #3
+	movs	r2, #0
+	ldr	r6, [r3]
+	ldrh	r3, [r6, #148]
+.L3053:
+	add	r1, r10, r2, lsl #2
+	cmp	r5, #4
+	add	r2, r2, #1
+	ldrb	ip, [r1, #2]	@ zero_extendqisi2
+	ite	ne
+	strbne	r8, [r1, #3]
+	strbeq	fp, [r1, #3]
+	orr	ip, ip, #224
+	strb	ip, [r1, #2]
+	uxth	r1, r2
+	cmp	r4, r1
+	bhi	.L3053
+	smulbb	r0, r0, lr
+	add	r3, r3, lr
+	mov	r1, r5
+	uxtah	r0, r0, r3
+	strh	r0, [r6, #148]	@ movhi
+	movs	r0, #16
+	bl	__aeabi_idiv
+	ldr	r3, .L3073+44
+	add	r0, r0, r4
+	uxth	r0, r0
+	ldr	r3, [r3]
+	strh	r0, [r6, #134]	@ movhi
+	lsls	r3, r3, #19
+	bpl	.L3054
+	str	r0, [sp]
+	mov	r3, r4
+	movs	r2, #128
+	movw	r1, #2590
+	ldr	r0, .L3073+48
 	bl	printf
-	ldrb	ip, [fp]	@ zero_extendqisi2
-	add	r2, r8, #8
-	ldr	r0, .L2941+28
-	cmp	ip, #0
-	beq	.L2928
-	add	r3, sp, #104
-	add	r2, r3, r2, lsl #1
-	ldrh	r3, [r0]
-	mov	r0, r4
-	ldrh	r2, [r2, #-32]
-	muls	r3, r2, r3
-	orr	r3, r3, r10
-	str	r3, [r4, #24]
-	bl	sblk_3d_tlc_dump_prog
-.L2929:
-	adds	r7, r7, #1
-.L2933:
-	ldrb	r2, [sp, #81]	@ zero_extendqisi2
-	uxth	r3, r7
-	cmp	r2, r3
-	bhi	.L2931
-	add	r3, r10, #1
-	uxth	r10, r3
-	b	.L2927
-.L2928:
-	ldr	r3, .L2941+16
+.L3054:
+	ldr	r0, [r7]
+	movs	r2, #128
+	movs	r1, #255
+	movs	r5, #0
+	adds	r0, r0, #160
+	bl	ftl_memset
+	ldr	r3, [sp, #24]
+	ldr	r0, .L3073+52
+	ldr	r1, [r7]
+	ldr	r3, [r3]
+	ldrh	r0, [r0]
+	ldrh	fp, [r1, #134]
+	str	r3, [sp, #24]
+	ldr	r3, .L3073+56
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #2
-	add	r3, sp, #104
-	add	r2, r3, r2, lsl #1
-	bne	.L2930
-	ldrh	r2, [r2, #-32]
-	ldrh	r3, [r0]
-	mov	r0, r4
-	muls	r3, r2, r3
-	ldr	r2, [sp, #44]
-	orrs	r3, r3, r2
-	orr	r3, r3, #33554432
-	str	r3, [r4, #24]
-	bl	sblk_mlc_dump_prog
-	b	.L2929
-.L2930:
-	ldrh	r3, [r2, #-32]
-	ldrh	r1, [r0]
-	movs	r0, #1
-	muls	r1, r3, r1
-	ldr	r3, .L2941+48
+	str	r3, [sp, #28]
+	ldr	r3, .L3073+40
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	orr	r1, r1, r10
-	str	r1, [r4, #24]
-	rsb	r2, r3, #24
-	str	ip, [sp, #4]
-	lsls	r0, r0, r3
-	subs	r3, r0, #1
-	lsr	r0, r1, r2
-	lsl	lr, r3, r2
-	ands	r0, r0, r3
-	ldrb	r3, [r6]	@ zero_extendqisi2
-	bic	r1, r1, lr
-	uxtb	r0, r0
-	str	r3, [sp]
-	ldr	r3, [r4, #12]
-	ldr	r2, [r4, #4]
-	bl	flash_prog_page_en
-	b	.L2929
-.L2932:
+	str	r3, [sp, #12]
+	ldr	r3, .L3073+60
+	ldrh	r7, [sp, #12]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	smulbb	r2, r4, r7
+	rsb	r3, r3, #24
+	subs	r3, r3, r0
+	movs	r0, #1
+	lsl	r3, r0, r3
+	uxth	r2, r2
+	uxth	r3, r3
+	str	r3, [sp, #20]
+.L3055:
+	cmp	r4, fp
+	bcc	.L3061
+	ldr	r3, .L3073+28
+	movs	r4, #0
+	strh	r5, [r1, #112]	@ movhi
+	strh	r4, [r1, #114]	@ movhi
+	ldrh	r3, [r3]
+	strh	r4, [r1, #118]	@ movhi
+	strh	fp, [r1, #132]	@ movhi
+	sub	r3, r3, fp
+	strh	r3, [r1, #116]	@ movhi
+	bl	ftl_low_format_data_init
 	mov	r0, r4
-	bl	zbuf_free
-	mov	r1, r5
-	ldr	r0, .L2941+52
-	bl	printf
-.L2912:
-	add	sp, sp, #104
+	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2942:
+.L3041:
+	ldrb	r2, [r3, #2]	@ zero_extendqisi2
+	adds	r3, r3, #4
+	and	r2, r2, #31
+	bfi	r2, r0, #3, #2
+	strb	r2, [r3, #-2]
+	b	.L3040
+.L3050:
+	ldr	r3, .L3073+64
+	strh	r0, [r3]	@ movhi
+	ldr	r3, .L3073+68
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L3043
+	bl	ftl_test_block
+.L3043:
+	ldr	r3, .L3073+56
+	uxth	r1, r4
+	ldr	r0, .L3073+24
+	movs	r6, #0
+	mov	fp, r6
+	mov	r8, r6
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	ldr	r5, [r0]
+	str	r3, [sp, #16]
+	ldr	r3, .L3073+40
+	add	r5, r5, r1, lsl #2
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	uxth	r2, r3
+	str	r2, [sp, #20]
+	mul	r2, r3, r1
+	ldr	r1, .L3073+32
+	ldr	r1, [r1]
+	str	r1, [sp, #12]
+.L3044:
+	ldr	r0, [sp, #16]
+	uxth	r1, fp
+	cmp	r0, r1
+	bhi	.L3062
+	cmp	r8, #0
+	bne	.L3049
+	ldrb	r3, [r5, #2]	@ zero_extendqisi2
+	orr	r3, r3, #224
+	strb	r3, [r5, #2]
+.L3049:
+	adds	r4, r4, #1
+	b	.L3042
+.L3047:
+	add	r1, r10, r2
+	ldr	r0, [sp, #28]
+	str	r3, [sp, #36]
+	str	r2, [sp, #32]
+	bl	flash_check_bad_block
+	ldr	r2, [sp, #32]
+	ldr	r3, [sp, #36]
+	cbz	r0, .L3045
+	ldrb	r0, [r5, #3]	@ zero_extendqisi2
+	movs	r1, #1
+	lsl	r1, r1, r10
+	orrs	r1, r1, r0
+	ldr	r0, [sp, #12]
+	strb	r1, [r5, #3]
+	ldr	r1, [sp, #12]
+	ldrh	r1, [r1, #148]
+	adds	r1, r1, #1
+	strh	r1, [r0, #148]	@ movhi
+.L3046:
+	add	r10, r10, #1
+.L3048:
+	sub	r1, r10, r6
+	ldr	r0, [sp, #20]
+	uxth	r1, r1
+	cmp	r0, r1
+	bhi	.L3047
+	add	fp, fp, #1
+	add	r6, r6, r3
+	subs	r2, r2, r3
+	b	.L3044
+.L3045:
+	add	r8, r8, #1
+	uxth	r8, r8
+	b	.L3046
+.L3062:
+	uxtb	r1, fp
+	mov	r10, r6
+	str	r1, [sp, #28]
+	b	.L3048
+.L3061:
+	ldr	r3, [sp, #24]
+	movs	r0, #0
+	mov	lr, r0
+	mov	ip, r0
+	add	r8, r3, r4, lsl #2
+	ldrb	r3, [r8, #2]	@ zero_extendqisi2
+	orr	r3, r3, #224
+	strb	r3, [r8, #2]
+.L3056:
+	ldr	r6, [sp, #28]
+	uxth	r3, ip
+	cmp	r3, r6
+	bcc	.L3064
+	adds	r4, r4, #1
+	add	r2, r2, r7
+	uxth	r4, r4
+	uxth	r2, r2
+	b	.L3055
+.L3059:
+	ldrb	r10, [r8, #3]	@ zero_extendqisi2
+	add	r3, lr, r6
+	asr	r10, r10, r3
+	tst	r10, #1
+	bne	.L3057
+	ldr	r3, [sp, #12]
+	add	r10, r5, #80
+	adds	r5, r5, #1
+	uxth	r5, r5
+	cmp	r3, #1
+	itett	hi
+	ldrhi	r3, [sp, #16]
+	movls	r3, r2
+	andhi	r3, r3, #1
+	addhi	r3, r3, r2
+	it	hi
+	uxthhi	r3, r3
+	add	r3, r3, r0
+	strh	r3, [r1, r10, lsl #1]	@ movhi
+.L3057:
+	adds	r6, r6, #1
+.L3060:
+	uxth	r3, r6
+	cmp	r3, r7
+	str	r3, [sp, #16]
+	bcc	.L3059
+	ldr	r3, [sp, #12]
+	add	ip, ip, #1
+	add	lr, lr, r3
+	ldr	r3, [sp, #20]
+	add	r0, r0, r3
+	uxth	r0, r0
+	b	.L3056
+.L3064:
+	movs	r6, #0
+	b	.L3060
+.L3074:
 	.align	2
-.L2941:
-	.word	.LANCHOR6
-	.word	.LANCHOR77
-	.word	.LANCHOR74
-	.word	.LANCHOR7
-	.word	.LANCHOR73
-	.word	.LANCHOR87
+.L3073:
+	.word	.LANCHOR27
 	.word	.LC162
-	.word	.LANCHOR105
+	.word	.LANCHOR205
+	.word	.LC0
+	.word	.LANCHOR111
+	.word	.LANCHOR195
+	.word	.LANCHOR7
+	.word	.LANCHOR6
+	.word	.LANCHOR110
+	.word	1229739078
+	.word	.LANCHOR76
+	.word	.LANCHOR14
 	.word	.LC163
-	.word	.LANCHOR125
-	.word	.LC164
-	.word	.LC165
-	.word	.LANCHOR31
-	.word	.LC166
-	.size	ftl_dump_write_open_sblk, .-ftl_dump_write_open_sblk
-	.section	.text.ftl_ink_check_sblk,"ax",%progbits
+	.word	.LANCHOR75
+	.word	.LANCHOR112
+	.word	.LANCHOR32
+	.word	.LANCHOR69
+	.word	.LANCHOR82
+	.size	ftl_low_format, .-ftl_low_format
+	.section	.text.ftl_re_low_format,"ax",%progbits
 	.align	1
-	.global	ftl_ink_check_sblk
+	.global	ftl_re_low_format
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_ink_check_sblk, %function
-ftl_ink_check_sblk:
-	@ args = 0, pretend = 0, frame = 40
+	.type	ftl_re_low_format, %function
+ftl_re_low_format:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r1, r0
-	ldr	r5, .L2961
-	sub	sp, sp, #48
-	mov	r4, r0
-	ldr	r2, [r5]
-	ldr	r3, [r2, r0, lsl #2]
-	ldrh	r2, [r2, r0, lsl #2]
-	ldr	r0, .L2961+4
-	ubfx	r3, r3, #11, #8
-	ubfx	r2, r2, #0, #11
+	push	{r3, r4, r5, r6, r7, lr}
+	movs	r1, #1
+	ldr	r0, .L3081
 	bl	printf
-	movw	r3, #65535
-	str	r5, [sp, #8]
-	cmp	r4, r3
-	beq	.L2943
-	ldr	r3, .L2961+8
-	ldrh	r3, [r3]
-	cmp	r3, r4
-	bls	.L2943
-	movs	r1, #0
-	mov	r0, r4
-	bl	ftl_erase_sblk
-	add	r1, sp, #32
-	mov	r0, r4
-	strh	r4, [sp, #16]	@ movhi
-	movs	r6, #0
-	bl	ftl_get_blk_list_in_sblk
-	strb	r0, [sp, #25]
-	movs	r0, #1
-	bl	buf_alloc
-	ldr	r3, [sp, #8]
-	mov	r5, r0
-	ldr	r7, .L2961+12
-	ldr	r0, [r0, #4]
+	bl	sblk_init
+	bl	ftl_info_blk_init
+	bl	ftl_ext_info_init
+	ldr	r2, .L3081+4
+	ldr	r3, .L3081+8
+	ldrh	r7, [r2]
 	ldr	r3, [r3]
-	ldrb	r2, [r7]	@ zero_extendqisi2
-	ldrh	r3, [r3, r4, lsl #2]
-	lsls	r2, r2, #9
-	ubfx	r3, r3, #0, #11
-	cmp	r3, #1
-	ite	le
-	movle	r1, #85
-	movgt	r1, #170
-	bl	ftl_memset
-	bl	sblk_wait_write_queue_completed
-.L2947:
-	ldr	r3, .L2961+16
-	uxth	r2, r6
-	mov	r8, #0
-	ldrh	r1, [r3]
-	str	r3, [sp, #12]
-	cmp	r1, r2
-	bhi	.L2951
-.L2952:
-	ldr	r3, [sp, #12]
-	ldrh	r1, [r3]
-	uxth	r3, r8
-	cmp	r1, r3
-	bls	.L2957
-	mov	fp, #0
-	movw	r10, #65535
-	b	.L2958
-.L2949:
-	uxth	r3, r8
-	add	r2, sp, #48
-	add	r3, r2, r3, lsl #1
-	movw	r2, #65535
-	ldrh	r3, [r3, #-16]
-	cmp	r3, r2
-	beq	.L2948
-	ldr	r2, .L2961+20
-	uxth	r1, r6
-	ldr	r0, .L2961+24
-	mov	r10, #0
-	ldrh	r2, [r2]
-	mla	r1, r3, r2, r1
-	ldr	r2, [r5, #4]
-	ldr	r3, .L2961+28
-	str	r3, [r2, #4]
-	ldr	r3, [r5, #12]
-	str	r1, [r2]
-	str	r10, [r3]
-	ldrb	ip, [r0]	@ zero_extendqisi2
-	movs	r0, #1
-	str	r10, [sp, #4]
-	rsb	fp, ip, #24
-	lsl	r0, r0, ip
-	add	ip, r0, #-1
-	lsr	r0, r1, fp
-	lsl	lr, ip, fp
-	and	r0, r0, ip
-	ldrb	ip, [r7]	@ zero_extendqisi2
-	bic	r1, r1, lr
-	uxtb	r0, r0
-	str	ip, [sp]
-	bl	flash_prog_page_en
-.L2948:
-	add	r8, r8, #1
-.L2951:
-	ldrb	r2, [sp, #25]	@ zero_extendqisi2
-	uxth	r3, r8
-	cmp	r2, r3
-	bhi	.L2949
+	ldr	r2, .L3081+12
+	ldrh	r1, [r3, #134]
+	ldr	r0, [r2]
+	movs	r2, #0
+	mov	r5, r2
+	mov	r6, r2
+	add	r0, r0, r1, lsl #2
+.L3076:
+	cmp	r1, r7
+	bcc	.L3080
+	movs	r4, #0
+	strh	r6, [r3, #114]	@ movhi
+	strh	r5, [r3, #118]	@ movhi
+	strh	r2, [r3, #116]	@ movhi
+	strh	r4, [r3, #122]	@ movhi
+	strh	r4, [r3, #120]	@ movhi
+	strh	r4, [r3, #124]	@ movhi
+	bl	ftl_low_format_data_init
+	mov	r0, r4
+	pop	{r3, r4, r5, r6, r7, pc}
+.L3080:
+	ldrb	r4, [r0, #2]	@ zero_extendqisi2
+	bfc	r4, #5, #3
+	strb	r4, [r0, #2]
+	ands	r4, r4, #24
+	bne	.L3077
 	adds	r6, r6, #1
-	b	.L2947
-.L2956:
-	uxth	r6, fp
-	add	r3, sp, #48
-	adds	r6, r6, #8
-	add	r6, r3, r6, lsl #1
-	ldrh	r1, [r6, #-32]
-	cmp	r1, r10
-	beq	.L2954
-	ldr	r3, .L2961+20
-	uxth	r0, r8
-	ldrh	r7, [r3]
-	mla	r7, r1, r7, r0
-	movs	r1, #1
-	mov	r0, r5
-	str	r7, [r5, #24]
-	bl	sblk_read_page
-	ldr	r1, [r5, #4]
-	ldr	r1, [r1]
-	cmp	r7, r1
-	beq	.L2954
-	mov	r0, r7
-	bl	ftl_mask_bad_block
-	strh	r10, [r6, #-32]	@ movhi
-.L2954:
-	add	fp, fp, #1
-.L2958:
-	ldrb	r0, [sp, #25]	@ zero_extendqisi2
-	uxth	r1, fp
-	cmp	r0, r1
-	bhi	.L2956
-	add	r8, r8, #1
-	b	.L2952
-.L2957:
-	mov	r0, r5
-	bl	zbuf_free
-	ldr	r3, [sp, #8]
-	mov	r1, r4
-	ldr	r0, .L2961+32
-	ldr	r2, [r3]
-	ldr	r3, [r2, r4, lsl #2]
-	ldrh	r2, [r2, r4, lsl #2]
-	ubfx	r3, r3, #11, #8
-	ubfx	r2, r2, #0, #11
-	bl	printf
-.L2943:
-	add	sp, sp, #48
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2962:
+	uxth	r6, r6
+.L3078:
+	adds	r1, r1, #1
+	uxth	r1, r1
+	adds	r0, r0, #4
+	b	.L3076
+.L3077:
+	cmp	r4, #16
+	itete	eq
+	addeq	r5, r5, #1
+	addne	r2, r2, #1
+	uxtheq	r5, r5
+	uxthne	r2, r2
+	b	.L3078
+.L3082:
 	.align	2
-.L2961:
-	.word	.LANCHOR7
-	.word	.LC167
+.L3081:
+	.word	.LC164
 	.word	.LANCHOR6
-	.word	.LANCHOR125
-	.word	.LANCHOR87
-	.word	.LANCHOR105
-	.word	.LANCHOR31
-	.word	1437269760
-	.word	.LC168
-	.size	ftl_ink_check_sblk, .-ftl_ink_check_sblk
-	.section	.text.ftl_open_sblk_init,"ax",%progbits
+	.word	.LANCHOR110
+	.word	.LANCHOR7
+	.size	ftl_re_low_format, .-ftl_re_low_format
+	.section	.text.ftl_prog_ppa_page,"ax",%progbits
 	.align	1
-	.global	ftl_open_sblk_init
+	.global	ftl_prog_ppa_page
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_open_sblk_init, %function
-ftl_open_sblk_init:
+	.type	ftl_prog_ppa_page, %function
+ftl_prog_ppa_page:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	push	{r0, r1, r2, r4, r5, r6, r7, lr}
+	ldr	r4, .L3084
+	ldrb	r7, [r4]	@ zero_extendqisi2
+	movs	r4, #1
+	str	r3, [sp]
+	mov	r3, r2
+	mov	r2, r1
+	rsb	r5, r7, #24
+	lsl	r6, r4, r5
+	lsls	r4, r4, r7
+	lsr	r5, r0, r5
+	subs	r4, r4, #1
+	subs	r6, r6, #1
+	ands	r4, r4, r5
+	and	r1, r6, r0
+	uxtb	r0, r4
+	bl	ftl_prog_page
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, r6, r7, pc}
+.L3085:
+	.align	2
+.L3084:
+	.word	.LANCHOR32
+	.size	ftl_prog_ppa_page, .-ftl_prog_ppa_page
+	.section	.text.ftl_write_last_log_page,"ax",%progbits
+	.align	1
+	.global	ftl_write_last_log_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_write_last_log_page, %function
+ftl_write_last_log_page:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
 	mov	r4, r0
-	ldr	r7, .L2973
-	mov	r6, r1
-	ldr	r8, .L2973+20
-.L2964:
-.L2968:
-	mov	r0, r6
-	bl	ftl_alloc_sblk
-	ldr	r3, [r7]
-	mov	r5, r0
-	ldrh	r3, [r3, #150]
-	cbz	r3, .L2965
-	ldr	r3, [r8]
-	ldrh	r3, [r3, r0, lsl #2]
-	ubfx	r3, r3, #0, #11
-	cmp	r3, #2
-	bgt	.L2965
-	bl	ftl_ink_check_sblk
-.L2965:
-	movs	r1, #0
-	mov	r0, r5
-	bl	ftl_erase_sblk
-	add	r1, r4, #16
+	ldrh	r3, [r0, #6]
+	cmp	r3, #1
+	bne	.L3089
+	ldr	r3, .L3091
+	ldrh	r7, [r0, #12]
+	ldr	r5, [r3]
+	bl	ftl_get_new_free_page
+	adds	r3, r0, #1
+	mov	r6, r0
+	beq	.L3090
+	ldrh	r0, [r4]
+	add	r5, r5, r7, lsl #2
+	ldr	r4, .L3091+4
+	bl	ftl_vpn_decrement
+	ldr	r3, .L3091+8
 	mov	r0, r5
-	bl	ftl_get_blk_list_in_sblk
-	ldr	r2, .L2973+4
-	uxtb	r3, r0
-	cmp	r6, #2
-	strh	r5, [r4]	@ movhi
-	strb	r3, [r4, #9]
-	mov	r0, #0
-	ldrh	r2, [r2]
-	mov	r1, #255
-	strh	r0, [r4, #2]	@ movhi
-	strb	r0, [r4, #5]
-	strh	r0, [r4, #10]	@ movhi
-	smulbb	r3, r3, r2
-	ldr	r10, .L2973+24
-	strb	r6, [r4, #4]
-	strh	r3, [r4, #6]	@ movhi
-	ldr	r3, .L2973+8
-	it	ne
-	ldrbne	r0, [r3]	@ zero_extendqisi2
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	it	ne
-	smulbbne	r0, r0, r2
-	mul	r2, r2, r3
-	ldr	r3, .L2973+12
-	it	ne
-	uxthne	r0, r0
-	ldr	r3, [r3]
-	strh	r0, [r4, #12]	@ movhi
-	lsls	r2, r2, #2
-	add	r0, r3, r0, lsl #2
-	bl	ftl_memset
-	ldr	r3, [r10]
-	ldrh	r2, [r4, #6]
-	strh	r2, [r3, r5, lsl #1]	@ movhi
-	ldrb	r3, [r4, #9]	@ zero_extendqisi2
-	cbnz	r3, .L2963
+	ldr	r2, .L3091+12
+	str	r3, [r4]
+	ldr	r3, .L3091+16
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	muls	r1, r3, r1
+	lsls	r1, r1, #2
+	bl	js_hash
+	ldr	r3, .L3091+20
+	movs	r2, #0
+	str	r0, [r4, #4]
 	mov	r1, r5
-	ldr	r0, .L2973+16
-	bl	printf
-	ldr	r3, [r10]
-	movw	r2, #65535
-	strh	r2, [r3, r5, lsl #1]	@ movhi
-	movs	r3, #7
-	strb	r3, [r4, #4]
-	b	.L2968
-.L2963:
-	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L2974:
+	str	r2, [r4, #8]
+	mov	r0, r6
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r2, [r4, #12]
+	str	r2, [r4, #16]
+	cmp	r3, #8
+	it	hi
+	strhi	r2, [r4, #20]
+	ldr	r2, .L3091+4
+	bl	ftl_prog_ppa_page
+.L3090:
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, pc}
+.L3089:
+	mov	r0, #-1
+	pop	{r3, r4, r5, r6, r7, pc}
+.L3092:
 	.align	2
-.L2973:
-	.word	.LANCHOR104
-	.word	.LANCHOR87
+.L3091:
+	.word	.LANCHOR117
+	.word	.LANCHOR191
+	.word	-178307901
 	.word	.LANCHOR80
-	.word	.LANCHOR111
-	.word	.LC77
-	.word	.LANCHOR7
-	.word	.LANCHOR9
-	.size	ftl_open_sblk_init, .-ftl_open_sblk_init
-	.section	.text.ftl_low_format_data_init,"ax",%progbits
+	.word	.LANCHOR95
+	.word	.LANCHOR131
+	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
+	.section	.text.pm_write_page,"ax",%progbits
 	.align	1
-	.global	ftl_low_format_data_init
+	.global	pm_write_page
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_low_format_data_init, %function
-ftl_low_format_data_init:
-	@ args = 0, pretend = 0, frame = 0
+	.type	pm_write_page, %function
+pm_write_page:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	mov	r2, #16384
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r0
+	ldr	r8, .L3106+28
+	mov	r7, r1
+	mov	r6, r8
+.L3094:
+	ldr	r3, [r8]
+	ldr	r2, [r3, #48]
+	ldrh	r1, [r3, #696]
+	adds	r2, r2, #1
+	str	r2, [r3, #48]
+	ldr	r2, .L3106
+	ldrh	r2, [r2]
+	cmp	r1, r2
+	bcs	.L3095
+	ldrh	r2, [r3, #692]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L3096
+.L3095:
+	bl	pm_alloc_new_blk
+	movs	r0, #0
+	bl	ftl_info_flush
+.L3096:
+	ldr	r3, [r6]
+	ldrh	r2, [r3, #692]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L3097
+	movw	r2, #303
+	ldr	r1, .L3106+4
+	ldr	r0, .L3106+8
+	bl	printf
+.L3097:
+	ldr	r3, [r6]
 	movs	r1, #0
-	ldr	r0, .L2977
+	ldr	r2, .L3106+12
+	ldr	r10, .L3106+32
+	ldrh	r5, [r3, #692]
+	ldrh	r2, [r2]
+	ldrh	r3, [r3, #696]
+	ldr	r0, [r10]
+	mla	r5, r2, r5, r3
+	movs	r2, #64
 	bl	ftl_memset
-	ldr	r5, .L2977+4
-	bl	zftl_sblk_list_init
-	movs	r0, #1
-	bl	ftl_alloc_sblk
-	movs	r1, #0
-	mov	r6, r0
-	bl	ftl_erase_sblk
-	ldr	r1, [r5]
-	mov	r0, r6
-	add	r1, r1, #672
-	bl	ftl_get_blk_list_in_sblk
-	ldr	r3, [r5]
-	movs	r2, #0
-	ldrh	r7, [r3, #672]
-	strh	r2, [r3, #690]	@ movhi
-	movw	r2, #65533
-	subs	r3, r7, #1
+	ldr	r10, [r10]
+	mov	r0, r7
+	ldr	r3, [r6]
+	str	r4, [r10]
+	ldr	r2, [r3, #48]
+	str	r3, [sp, #12]
+	str	r2, [r10, #4]
+	ldr	r2, .L3106+16
+	ldrb	fp, [r2]	@ zero_extendqisi2
+	lsl	r1, fp, #9
+	bl	js_hash
+	ldr	r3, [sp, #12]
+	mov	r2, r7
+	str	r0, [r10, #8]
+	mov	r1, r5
+	ldrb	r0, [r3, #694]	@ zero_extendqisi2
+	mov	r3, r10
+	str	fp, [sp]
+	bl	ftl_prog_page
+	ldr	r2, [r6]
+	ldrh	r3, [r2, #696]
+	adds	r3, r3, #1
 	uxth	r3, r3
-	cmp	r3, r2
-	bls	.L2976
-	movw	r2, #2146
-	ldr	r1, .L2977+8
-	ldr	r0, .L2977+12
+	cmp	r3, #1
+	strh	r3, [r2, #696]	@ movhi
+	ldr	r3, .L3106+20
+	beq	.L3098
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	cbz	r1, .L3099
+.L3098:
+	movs	r2, #0
+	strb	r2, [r3]
+	b	.L3094
+.L3099:
+	adds	r0, r0, #1
+	bne	.L3101
+	mov	r1, r5
+	ldr	r0, .L3106+24
 	bl	printf
-.L2976:
-	ldr	r0, [r5]
-	movs	r4, #0
-	mov	r2, #256
-	movs	r1, #255
-	strh	r4, [r0, #696]	@ movhi
-	add	r0, r0, #416
-	bl	ftl_memset
-	ldr	r0, [r5]
-	mov	r1, r4
-	mov	r2, #4096
-	add	r0, r0, #704
-	bl	ftl_memset
-	ldr	r3, .L2977+16
-	ldr	r1, .L2977+20
-	ldr	r2, [r5]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	ldrh	r1, [r1]
-	strh	r7, [r2, #692]	@ movhi
-	rsb	r3, r3, #24
-	strh	r6, [r2, #416]	@ movhi
-	subs	r3, r3, r1
-	asr	r3, r7, r3
-	ldr	r7, .L2977+24
-	strh	r3, [r2, #694]	@ movhi
-	movs	r3, #1
-	strh	r3, [r2, #688]	@ movhi
-	ldr	r3, .L2977+28
-	ldrh	r3, [r3]
-	strh	r3, [r2, #698]	@ movhi
-	ldr	r2, .L2977+32
-	ldr	r3, [r7]
-	str	r2, [r3]
-	bl	ftl_alloc_sys_blk
-	mov	r1, r4
-	mov	r6, r0
-	bl	ftl_erase_phy_blk
-	ldr	r3, [r5]
-	movs	r1, #2
-	ldr	r0, [r7]
-	strh	r6, [r3, #130]	@ movhi
-	movw	r6, #65535
-	strh	r4, [r3, #140]	@ movhi
-	adds	r0, r0, #16
-	strh	r6, [r0, #568]	@ movhi
-	strh	r6, [r0, #570]	@ movhi
-	strh	r6, [r0, #572]	@ movhi
-	strh	r6, [r0, #574]	@ movhi
-	bl	ftl_open_sblk_init
-	ldr	r0, [r7]
-	movs	r1, #3
-	adds	r0, r0, #48
-	bl	ftl_open_sblk_init
-	ldr	r3, [r5]
-	movs	r1, #255
-	ldr	r0, [r7]
-	ldrh	r2, [r3, #134]
-	adds	r0, r0, #136
-	strh	r4, [r0, #-12]	@ movhi
-	strh	r4, [r0, #-16]	@ movhi
-	strh	r2, [r0, #-10]	@ movhi
-	mov	r2, #-1
-	strh	r4, [r0, #-14]	@ movhi
-	strh	r6, [r0, #-56]	@ movhi
-	strh	r6, [r0, #-6]	@ movhi
-	str	r2, [r0, #408]
-	strh	r2, [r3, #126]	@ movhi
-	mov	r2, #256
-	str	r4, [r0, #384]
-	str	r4, [r0, #388]
-	str	r4, [r0, #392]
-	bl	ftl_memset
-	ldr	r0, [r7]
-	movs	r2, #128
-	movs	r1, #255
-	add	r0, r0, #392
-	bl	ftl_memset
-	bl	ftl_ext_info_flush
-	mov	r0, r4
-	bl	ftl_info_flush
-	bl	ftl_info_blk_init
-	mov	r0, r4
-	pop	{r3, r4, r5, r6, r7, pc}
-.L2978:
+	b	.L3094
+.L3101:
+	ldrh	r3, [r2, #698]
+	movs	r0, #0
+	cmp	r4, r3
+	itt	cc
+	addcc	r4, r4, #176
+	strcc	r5, [r2, r4, lsl #2]
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3107:
 	.align	2
-.L2977:
-	.word	ftl_ext_info_data_buffer
-	.word	.LANCHOR104
-	.word	.LANCHOR193
+.L3106:
+	.word	.LANCHOR95
+	.word	.LANCHOR206
 	.word	.LC0
-	.word	.LANCHOR31
-	.word	.LANCHOR68
-	.word	.LANCHOR10
-	.word	.LANCHOR194
-	.word	1162432070
-	.size	ftl_low_format_data_init, .-ftl_low_format_data_init
-	.section	.text.ftl_low_format,"ax",%progbits
+	.word	.LANCHOR111
+	.word	.LANCHOR131
+	.word	.LANCHOR208
+	.word	.LC165
+	.word	.LANCHOR110
+	.word	.LANCHOR207
+	.size	pm_write_page, .-pm_write_page
+	.section	.text.ftl_dump_write_open_sblk,"ax",%progbits
 	.align	1
-	.global	ftl_low_format
+	.global	ftl_dump_write_open_sblk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_low_format, %function
-ftl_low_format:
-	@ args = 0, pretend = 0, frame = 32
+	.type	ftl_dump_write_open_sblk, %function
+ftl_dump_write_open_sblk:
+	@ args = 0, pretend = 0, frame = 64
 	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L3147
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r4, #8
-	ldr	r6, .L3016
-	sub	sp, sp, #40
-	movs	r1, #0
-	ldr	r0, .L3016+4
-	bl	printf
-.L2982:
-	ldr	r3, [r6]
-	add	r3, r3, r4
-	ldrb	r5, [r3, #32]	@ zero_extendqisi2
-	cmp	r5, #128
-	ble	.L2980
-	cmp	r5, #255
-	beq	.L2981
-	movw	r2, #2200
-	ldr	r1, .L3016+8
-	ldr	r0, .L3016+12
-	bl	printf
-.L2980:
-	ldr	r3, .L3016+16
-	movs	r0, #0
-	ldrh	r1, [r3]
-	muls	r1, r5, r1
-	bl	flash_erase_block
-.L2981:
-	adds	r4, r4, #1
-	cmp	r4, #16
-	bne	.L2982
-	bl	sblk_init
-	bl	ftl_info_blk_init
-	mov	r2, #16384
-	movs	r1, #0
-	ldr	r0, .L3016+20
-	bl	ftl_memset
-	ldr	r2, .L3016+24
-	movs	r0, #1
-	ldr	r1, .L3016+28
-	ldr	r3, [r2]
-	ldrh	r1, [r1]
-	str	r2, [sp, #24]
-	add	r1, r3, r1, lsl #2
-.L2983:
-	cmp	r3, r1
-	bne	.L2984
-	ldr	r7, .L3016+32
-	movs	r4, #0
-	ldr	r2, .L3016+36
-	ldr	r3, [r7]
-	str	r2, [r3]
-	strh	r4, [r3, #148]	@ movhi
-.L2985:
-	ldr	r3, .L3016+28
-	uxth	r0, r4
+	mov	r5, r0
+	sub	sp, sp, #104
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bhi	.L2993
-	ldr	r3, .L3016+40
-	mov	fp, #15
-	ldrb	r5, [r3]	@ zero_extendqisi2
-	ldr	r3, .L3016
-	mov	r1, r5
-	ldr	r3, [r3]
-	ldrb	r0, [r3, #47]	@ zero_extendqisi2
-	bl	__aeabi_uidiv
-	ldr	r3, .L3016+24
-	uxtb	r0, r0
-	cmp	r5, #1
-	uxth	lr, r5
-	add	r4, r0, #1
-	ldr	r10, [r3]
-	it	eq
-	moveq	r8, #1
-	ldr	r3, .L3016+32
-	it	ne
-	movne	r8, #3
-	movs	r2, #0
-	ldr	r6, [r3]
-	ldrh	r3, [r6, #148]
-.L2996:
-	add	r1, r10, r2, lsl #2
-	cmp	r5, #4
-	add	r2, r2, #1
-	ldrb	ip, [r1, #2]	@ zero_extendqisi2
-	ite	ne
-	strbne	r8, [r1, #3]
-	strbeq	fp, [r1, #3]
-	orr	ip, ip, #224
-	strb	ip, [r1, #2]
-	uxth	r1, r2
-	cmp	r4, r1
-	bhi	.L2996
-	smulbb	r0, r0, lr
-	add	r3, r3, lr
-	mov	r1, r5
-	uxtah	r0, r0, r3
-	strh	r0, [r6, #148]	@ movhi
-	movs	r0, #16
-	bl	__aeabi_idiv
-	ldr	r3, .L3016+44
-	add	r0, r0, r4
-	uxth	r0, r0
-	ldr	r3, [r3]
-	strh	r0, [r6, #134]	@ movhi
-	lsls	r3, r3, #19
-	bpl	.L2997
-	str	r0, [sp]
-	mov	r3, r4
-	movs	r2, #128
-	movw	r1, #2247
-	ldr	r0, .L3016+48
-	bl	printf
-.L2997:
-	ldr	r0, [r7]
-	movs	r2, #128
-	movs	r1, #255
-	movs	r5, #0
-	adds	r0, r0, #160
-	bl	ftl_memset
-	ldr	r3, [sp, #24]
-	ldr	r0, .L3016+52
-	ldr	r1, [r7]
-	ldr	r3, [r3]
-	ldrh	r0, [r0]
-	ldrh	fp, [r1, #134]
-	str	r3, [sp, #24]
-	ldr	r3, .L3016+56
+	bls	.L3108
+	ldr	r3, .L3147+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	str	r3, [sp, #28]
-	ldr	r3, .L3016+40
+	cbnz	r3, .L3110
+	ldr	r3, .L3147+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	str	r3, [sp, #12]
-	ldr	r3, .L3016+60
-	ldrh	r7, [sp, #12]
+	cmp	r3, #0
+	beq	.L3108
+.L3110:
+	ldr	r3, .L3147+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	smulbb	r2, r4, r7
-	rsb	r3, r3, #24
-	subs	r3, r3, r0
-	movs	r0, #1
-	lsl	r3, r0, r3
-	uxth	r2, r2
-	uxth	r3, r3
-	str	r3, [sp, #20]
-.L2998:
-	cmp	r4, fp
-	bcc	.L3004
-	ldr	r3, .L3016+28
-	movs	r4, #0
-	strh	r5, [r1, #112]	@ movhi
-	strh	r4, [r1, #114]	@ movhi
+	cmp	r3, #0
+	bne	.L3108
+	ldr	r7, .L3147+16
+	lsls	r4, r5, #2
+	add	r1, sp, #88
+	strh	r5, [sp, #72]	@ movhi
+	mov	r0, r5
+	movs	r6, #0
+	ldr	r3, [r7]
+	add	r3, r3, r4
+	ldrb	r3, [r3, #2]	@ zero_extendqisi2
+	and	r3, r3, #224
+	cmp	r3, #160
+	itet	eq
+	ldreq	r3, .L3147+20
+	movne	fp, #1
+	ldrbeq	fp, [r3]	@ zero_extendqisi2
+	bl	ftl_get_blk_list_in_sblk
+	ldr	r3, .L3147+24
+	uxtb	r0, r0
+	strb	r6, [sp, #77]
+	strb	r0, [sp, #81]
 	ldrh	r3, [r3]
-	strh	r4, [r1, #118]	@ movhi
-	strh	fp, [r1, #132]	@ movhi
-	sub	r3, r3, fp
-	strh	r3, [r1, #116]	@ movhi
-	bl	ftl_low_format_data_init
+	strh	r6, [sp, #74]	@ movhi
+	strh	r6, [sp, #82]	@ movhi
+	smulbb	r0, r3, r0
+	ldr	r3, [r7]
+	mov	r7, r6
+	ldr	r1, [r3, r5, lsl #2]
+	add	r4, r4, r3
+	ldrb	r2, [r4, #2]	@ zero_extendqisi2
+	strh	r0, [sp, #78]	@ movhi
+	ubfx	r1, r1, #11, #8
+	ldr	r0, .L3147+28
+	str	r1, [sp, #4]
+	mov	r1, r5
+	ldrh	r3, [r3, r5, lsl #2]
+	ubfx	r3, r3, #0, #11
+	str	r3, [sp]
+	ubfx	r3, r2, #3, #2
+	lsrs	r2, r2, #5
+	bl	printf
+	movs	r0, #1
+	bl	buf_alloc
+	mov	r4, r0
+	str	r6, [sp, #44]
+.L3112:
+	ldr	r3, .L3147+24
+	uxth	r10, r6
+	ldrh	r3, [r3]
+	cmp	r3, r10
+	bls	.L3121
+	mov	r3, r10
+	str	r10, [sp, #52]
+	lsls	r3, r3, #1
+	mov	r8, #0
+	subs	r2, r3, #1
+	add	r3, r3, r10
+	subs	r3, r3, #1
+	str	r2, [sp, #56]
+	str	r3, [sp, #60]
+	b	.L3124
+.L3122:
+	ldr	r3, [sp, #64]
+	add	r2, sp, #104
+	add	r3, r2, r3, lsl #1
+	ldrh	r3, [r3, #-32]
+	str	r3, [sp, #48]
+	movw	r3, #65535
+	ldr	r2, [sp, #48]
+	cmp	r2, r3
+	bne	.L3113
+.L3120:
+	adds	r7, r7, #1
+	uxth	r7, r7
+.L3114:
+	cmp	fp, r7
+	bcs	.L3122
+	add	r8, r8, #1
+.L3124:
+	uxth	r3, r8
+	str	r3, [sp, #44]
+	ldr	r2, [sp, #44]
+	ldrb	r3, [sp, #81]	@ zero_extendqisi2
+	cmp	r3, r2
+	bls	.L3123
+	mov	r3, r2
+	movs	r7, #1
+	adds	r3, r3, #8
+	str	r3, [sp, #64]
+	b	.L3114
+.L3113:
+	ldr	r3, .L3147+32
+	cmp	fp, #3
+	ldr	r2, [sp, #48]
+	ldrh	r3, [r3]
+	mul	r3, r2, r3
+	bne	.L3115
+	ldr	r2, .L3147+36
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbz	r2, .L3116
+	ldr	r2, [sp, #60]
+.L3146:
+	add	r3, r3, r2
+	ldr	r2, .L3147+20
+	add	r3, r3, r7
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	orr	r3, r3, r2, lsl #24
+	b	.L3117
+.L3116:
+	uxtah	r3, r3, r6
+	orr	r3, r3, r7, lsl #24
+.L3117:
+	str	r3, [r4, #24]
+	movs	r1, #1
 	mov	r0, r4
-	add	sp, sp, #40
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2984:
-	ldrb	r2, [r3, #2]	@ zero_extendqisi2
-	adds	r3, r3, #4
-	and	r2, r2, #31
-	bfi	r2, r0, #3, #2
-	strb	r2, [r3, #-2]
-	b	.L2983
-.L2993:
-	ldr	r3, .L3016+64
-	strh	r0, [r3]	@ movhi
-	ldr	r3, .L3016+68
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L2986
-	bl	ftl_test_block
-.L2986:
-	ldr	r3, .L3016+56
-	uxth	r1, r4
-	ldr	r0, .L3016+24
-	movs	r6, #0
-	mov	fp, r6
-	mov	r8, r6
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	ldr	r5, [r0]
-	str	r3, [sp, #16]
-	ldr	r3, .L3016+40
-	add	r5, r5, r1, lsl #2
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	uxth	r2, r3
-	str	r2, [sp, #20]
-	mul	r2, r3, r1
-	ldr	r1, .L3016+32
+	str	r3, [sp, #68]
+	bl	sblk_read_page
+	ldr	r3, [r4, #36]
+	cmp	r3, #512
+	str	r3, [sp, #40]
+	ldr	r3, [sp, #68]
+	beq	.L3119
+	ldr	r2, [sp, #40]
+	adds	r2, r2, #1
+	bne	.L3120
+.L3119:
+	ldr	r1, [r4, #12]
+	ldr	r2, [r4, #4]
+	ldr	r0, [r1, #12]
+	str	r0, [sp, #32]
+	ldr	r0, [r1, #8]
+	str	r0, [sp, #28]
+	ldr	r0, [r1, #4]
+	str	r0, [sp, #24]
 	ldr	r1, [r1]
+	ldr	r0, .L3147+40
+	str	r1, [sp, #20]
+	ldr	r1, [r2, #12]
+	str	r1, [sp, #16]
+	ldr	r1, [r2, #8]
 	str	r1, [sp, #12]
-.L2987:
-	ldr	r0, [sp, #16]
-	uxth	r1, fp
-	cmp	r0, r1
-	bhi	.L3005
-	cmp	r8, #0
-	bne	.L2992
-	ldrb	r3, [r5, #2]	@ zero_extendqisi2
-	orr	r3, r3, #224
-	strb	r3, [r5, #2]
-.L2992:
-	adds	r4, r4, #1
-	b	.L2985
-.L2990:
-	add	r1, r10, r2
-	ldr	r0, [sp, #28]
-	str	r3, [sp, #36]
-	str	r2, [sp, #32]
-	bl	flash_check_bad_block
-	ldr	r2, [sp, #32]
-	ldr	r3, [sp, #36]
-	cbz	r0, .L2988
-	ldrb	r0, [r5, #3]	@ zero_extendqisi2
-	movs	r1, #1
-	lsl	r1, r1, r10
-	orrs	r1, r1, r0
-	ldr	r0, [sp, #12]
-	strb	r1, [r5, #3]
-	ldr	r1, [sp, #12]
-	ldrh	r1, [r1, #148]
-	adds	r1, r1, #1
-	strh	r1, [r0, #148]	@ movhi
-.L2989:
-	add	r10, r10, #1
-.L2991:
-	sub	r1, r10, r6
-	ldr	r0, [sp, #20]
-	uxth	r1, r1
-	cmp	r0, r1
-	bhi	.L2990
-	add	fp, fp, #1
-	add	r6, r6, r3
-	subs	r2, r2, r3
-	b	.L2987
-.L2988:
-	add	r8, r8, #1
-	uxth	r8, r8
-	b	.L2989
-.L3005:
-	uxtb	r1, fp
-	mov	r10, r6
-	str	r1, [sp, #28]
-	b	.L2991
-.L3004:
-	ldr	r3, [sp, #24]
-	movs	r0, #0
-	mov	lr, r0
-	mov	ip, r0
-	add	r8, r3, r4, lsl #2
-	ldrb	r3, [r8, #2]	@ zero_extendqisi2
-	orr	r3, r3, #224
-	strb	r3, [r8, #2]
-.L2999:
-	ldr	r6, [sp, #28]
-	uxth	r3, ip
-	cmp	r3, r6
-	bcc	.L3007
-	adds	r4, r4, #1
-	add	r2, r2, r7
-	uxth	r4, r4
-	uxth	r2, r2
-	b	.L2998
-.L3002:
-	ldrb	r10, [r8, #3]	@ zero_extendqisi2
-	add	r3, lr, r6
-	asr	r10, r10, r3
-	tst	r10, #1
-	bne	.L3000
-	ldr	r3, [sp, #12]
-	add	r10, r5, #80
-	adds	r5, r5, #1
-	uxth	r5, r5
-	cmp	r3, #1
-	itett	hi
-	ldrhi	r3, [sp, #16]
-	movls	r3, r2
-	andhi	r3, r3, #1
-	addhi	r3, r3, r2
-	it	hi
-	uxthhi	r3, r3
-	add	r3, r3, r0
-	strh	r3, [r1, r10, lsl #1]	@ movhi
-.L3000:
-	adds	r6, r6, #1
-.L3003:
-	uxth	r3, r6
-	cmp	r3, r7
-	str	r3, [sp, #16]
-	bcc	.L3002
-	ldr	r3, [sp, #12]
-	add	ip, ip, #1
-	add	lr, lr, r3
-	ldr	r3, [sp, #20]
-	add	r0, r0, r3
-	uxth	r0, r0
-	b	.L2999
-.L3007:
-	movs	r6, #0
-	b	.L3003
-.L3017:
-	.align	2
-.L3016:
-	.word	.LANCHOR27
-	.word	.LC169
-	.word	.LANCHOR195
-	.word	.LC0
-	.word	.LANCHOR105
-	.word	ftl_info_data_buffer
-	.word	.LANCHOR7
-	.word	.LANCHOR6
-	.word	.LANCHOR104
-	.word	1229739078
-	.word	.LANCHOR69
-	.word	.LANCHOR14
-	.word	.LC170
-	.word	.LANCHOR68
-	.word	.LANCHOR106
-	.word	.LANCHOR31
-	.word	.LANCHOR62
-	.word	.LANCHOR75
-	.size	ftl_low_format, .-ftl_low_format
-	.section	.text.ftl_re_low_format,"ax",%progbits
-	.align	1
-	.global	ftl_re_low_format
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_re_low_format, %function
-ftl_re_low_format:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	movs	r1, #1
-	ldr	r0, .L3024
+	ldr	r1, [r2, #4]
+	str	r1, [sp, #8]
+	ldr	r2, [r2]
+	ldr	r1, [sp, #48]
+	str	r2, [sp, #4]
+	ldr	r2, [sp, #40]
+	str	r2, [sp]
+	ldr	r2, [sp, #52]
 	bl	printf
-	bl	sblk_init
-	bl	ftl_info_blk_init
-	bl	ftl_ext_info_init
-	ldr	r2, .L3024+4
-	ldr	r3, .L3024+8
-	ldrh	r7, [r2]
-	ldr	r3, [r3]
-	ldr	r2, .L3024+12
-	ldrh	r1, [r3, #134]
-	ldr	r0, [r2]
-	movs	r2, #0
-	mov	r5, r2
-	mov	r6, r2
-	add	r0, r0, r1, lsl #2
-.L3019:
-	cmp	r1, r7
-	bcc	.L3023
-	movs	r4, #0
-	strh	r6, [r3, #114]	@ movhi
-	strh	r5, [r3, #118]	@ movhi
-	strh	r2, [r3, #116]	@ movhi
-	strh	r4, [r3, #122]	@ movhi
-	strh	r4, [r3, #120]	@ movhi
-	strh	r4, [r3, #124]	@ movhi
-	bl	ftl_low_format_data_init
-	mov	r0, r4
-	pop	{r3, r4, r5, r6, r7, pc}
-.L3023:
-	ldrb	r4, [r0, #2]	@ zero_extendqisi2
-	bfc	r4, #5, #3
-	strb	r4, [r0, #2]
-	ands	r4, r4, #24
-	bne	.L3020
+	ldr	r3, [sp, #40]
+	cmp	r3, #512
+	bne	.L3120
+.L3121:
+	uxth	r2, r6
+	ldr	r6, .L3147+44
+	ldr	r3, [sp, #44]
+	mov	r1, r5
+	str	r7, [sp]
+	ldr	r0, .L3147+48
+	bl	printf
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	movs	r1, #0
+	ldr	r0, [r4, #4]
+	ldr	fp, .L3147+64
+	lsls	r2, r2, #9
+	bl	ftl_memset
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	movs	r1, #0
+	ldr	r0, [r4, #12]
+	lsls	r2, r2, #1
+	bl	ftl_memset
+.L3125:
+	ldr	r3, .L3147+24
+	ldrh	r3, [r3]
+	cmp	r3, r10
+	bls	.L3131
+	lsl	r3, r10, #1
+	movs	r7, #0
+	str	r3, [sp, #40]
+	b	.L3132
+.L3115:
+	cmp	fp, #2
+	bne	.L3118
+	ldr	r2, [sp, #56]
+	b	.L3146
+.L3118:
+	uxtah	r3, r3, r6
+	b	.L3117
+.L3123:
 	adds	r6, r6, #1
-	uxth	r6, r6
-.L3021:
-	adds	r1, r1, #1
-	uxth	r1, r1
-	adds	r0, r0, #4
-	b	.L3019
-.L3020:
-	cmp	r4, #16
-	itete	eq
-	addeq	r5, r5, #1
-	addne	r2, r2, #1
-	uxtheq	r5, r5
-	uxthne	r2, r2
-	b	.L3021
-.L3025:
+	b	.L3112
+.L3130:
+	ldr	r3, [fp]
+	uxth	r8, r7
+	tst	r3, #4096
+	beq	.L3126
+	mov	r2, r8
+	mov	r1, r10
+	ldr	r0, .L3147+52
+	bl	printf
+.L3126:
+	ldr	r2, .L3147+4
+	ldr	r0, .L3147+32
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbz	r2, .L3127
+	add	r3, sp, #104
+	add	r3, r3, r8, lsl #1
+	ldrh	r2, [r3, #-16]
+	ldrh	r3, [r0]
+	mov	r0, r4
+	muls	r3, r2, r3
+	orr	r3, r3, r10
+	str	r3, [r4, #24]
+	bl	sblk_3d_tlc_dump_prog
+.L3128:
+	adds	r7, r7, #1
+.L3132:
+	ldrb	r2, [sp, #81]	@ zero_extendqisi2
+	uxth	r3, r7
+	cmp	r2, r3
+	bhi	.L3130
+	add	r3, r10, #1
+	uxth	r10, r3
+	b	.L3125
+.L3127:
+	ldr	r1, .L3147+20
+	add	r3, sp, #104
+	add	r3, r3, r8, lsl #1
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	cmp	r1, #2
+	bne	.L3129
+	ldrh	r2, [r3, #-16]
+	ldrh	r3, [r0]
+	mov	r0, r4
+	muls	r3, r2, r3
+	ldr	r2, [sp, #40]
+	orrs	r3, r3, r2
+	orr	r3, r3, #33554432
+	str	r3, [r4, #24]
+	bl	sblk_mlc_dump_prog
+	b	.L3128
+.L3129:
+	ldrh	r3, [r3, #-16]
+	ldrh	r1, [r0]
+	movs	r0, #1
+	muls	r1, r3, r1
+	ldr	r3, .L3147+56
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	orr	r1, r1, r10
+	str	r1, [r4, #24]
+	rsb	lr, r3, #24
+	str	r2, [sp, #4]
+	lsls	r0, r0, r3
+	subs	r3, r0, #1
+	lsr	r0, r1, lr
+	lsl	ip, r3, lr
+	ands	r0, r0, r3
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	bic	r1, r1, ip
+	uxtb	r0, r0
+	str	r3, [sp]
+	ldr	r3, [r4, #12]
+	ldr	r2, [r4, #4]
+	bl	flash_prog_page_en
+	b	.L3128
+.L3131:
+	mov	r0, r4
+	bl	zbuf_free
+	mov	r1, r5
+	ldr	r0, .L3147+60
+	bl	printf
+.L3108:
+	add	sp, sp, #104
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3148:
 	.align	2
-.L3024:
-	.word	.LC171
+.L3147:
 	.word	.LANCHOR6
-	.word	.LANCHOR104
+	.word	.LANCHOR84
+	.word	.LANCHOR81
+	.word	.LANCHOR36
 	.word	.LANCHOR7
-	.size	ftl_re_low_format, .-ftl_re_low_format
+	.word	.LANCHOR79
+	.word	.LANCHOR95
+	.word	.LC166
+	.word	.LANCHOR111
+	.word	.LANCHOR37
+	.word	.LC167
+	.word	.LANCHOR131
+	.word	.LC168
+	.word	.LC169
+	.word	.LANCHOR32
+	.word	.LC170
+	.word	.LANCHOR14
+	.size	ftl_dump_write_open_sblk, .-ftl_dump_write_open_sblk
 	.section	.text.flash_info_flush,"ax",%progbits
 	.align	1
 	.global	flash_info_flush
@@ -19499,18 +20528,18 @@ flash_info_flush:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L3038
+	ldr	r3, .L3161
 	ldr	r3, [r3]
 	lsls	r3, r3, #19
-	bpl	.L3027
-	ldr	r2, .L3038+4
-	mov	r1, #324
-	ldr	r0, .L3038+8
+	bpl	.L3150
+	ldr	r2, .L3161+4
+	mov	r1, #364
+	ldr	r0, .L3161+8
 	bl	printf
-.L3027:
-	ldr	r5, .L3038+12
+.L3150:
+	ldr	r5, .L3161+12
 	movs	r2, #64
-	ldr	r6, .L3038+16
+	ldr	r6, .L3161+16
 	movs	r1, #0
 	movs	r7, #0
 	ldr	r0, [r5]
@@ -19518,33 +20547,33 @@ flash_info_flush:
 	movs	r3, #16
 	movs	r2, #4
 	ldr	r1, [r6]
-	ldr	r0, .L3038+20
+	ldr	r0, .L3161+20
 	bl	rknand_print_hex
 	ldr	r4, [r6]
 	ldr	r1, [r4, #8]
 	add	r0, r4, #16
 	bl	js_hash
 	str	r5, [sp, #8]
-	ldr	r5, .L3038+24
+	ldr	r5, .L3161+24
 	str	r0, [r4, #12]
 	mov	r8, r5
-.L3028:
-	ldr	fp, .L3038+44
+.L3151:
+	ldr	fp, .L3161+44
 	ldrb	r10, [r5]	@ zero_extendqisi2
 	ldrh	r4, [r5, #2]
 	ldrh	r3, [fp]
 	mov	r1, r10
-	ldr	r0, .L3038+28
+	ldr	r0, .L3161+28
 	mov	r2, r4
 	str	r3, [sp, #12]
 	bl	printf
-	ldr	r2, .L3038+32
+	ldr	r2, .L3161+32
 	ldrh	r0, [r5, #2]
 	ldr	r3, [sp, #12]
 	ldrh	r2, [r2]
 	subs	r2, r2, #1
 	cmp	r0, r2
-	blt	.L3029
+	blt	.L3152
 	ldr	r4, [r6]
 	mov	r10, #0
 	ldrb	r2, [r5]	@ zero_extendqisi2
@@ -19568,9 +20597,9 @@ flash_info_flush:
 	ldrh	r4, [fp]
 	muls	r4, r3, r4
 	mov	r1, r4
-.L3037:
+.L3160:
 	bl	flash_erase_block
-.L3030:
+.L3153:
 	ldr	r2, [r6]
 	mov	r10, #1
 	ldr	r3, [sp, #8]
@@ -19578,7 +20607,7 @@ flash_info_flush:
 	ldr	r1, [r2, #4]
 	ldr	r3, [r3]
 	str	r1, [r3]
-	ldr	r1, .L3038+36
+	ldr	r1, .L3161+36
 	str	r1, [r3, #4]
 	movs	r1, #4
 	stm	sp, {r1, r10}
@@ -19588,41 +20617,41 @@ flash_info_flush:
 	adds	r0, r0, #1
 	add	r3, r3, r10
 	strh	r3, [r8, #2]	@ movhi
-	bne	.L3031
+	bne	.L3154
 	mov	r1, r4
-	ldr	r0, .L3038+40
+	ldr	r0, .L3161+40
 	bl	printf
-	b	.L3028
-.L3033:
+	b	.L3151
+.L3156:
 	mov	r7, r10
-	b	.L3028
-.L3029:
+	b	.L3151
+.L3152:
 	mla	r4, r10, r3, r4
 	cmp	r0, #0
-	bne	.L3030
+	bne	.L3153
 	mov	r1, r4
-	b	.L3037
-.L3031:
+	b	.L3160
+.L3154:
 	cmp	r7, #0
-	beq	.L3033
+	beq	.L3156
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3039:
+.L3162:
 	.align	2
-.L3038:
+.L3161:
 	.word	.LANCHOR14
-	.word	.LANCHOR196
-	.word	.LC92
-	.word	.LANCHOR197
+	.word	.LANCHOR209
+	.word	.LC97
+	.word	.LANCHOR210
 	.word	.LANCHOR27
+	.word	.LC171
+	.word	.LANCHOR211
 	.word	.LC172
-	.word	.LANCHOR198
-	.word	.LC173
-	.word	.LANCHOR142
+	.word	.LANCHOR147
 	.word	1398362953
-	.word	.LC174
+	.word	.LC173
 	.word	.LANCHOR2
 	.size	flash_info_flush, .-flash_info_flush
 	.section	.text.flash_info_blk_init,"ax",%progbits
@@ -19637,55 +20666,60 @@ flash_info_blk_init:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L3069
-	ldr	r4, .L3069+4
+	ldr	r3, .L3194
+	ldr	r4, .L3194+4
 	ldr	r3, [r3]
 	tst	r3, #4096
-	beq	.L3041
+	beq	.L3164
 	ldr	r3, [r4]
-	movs	r1, #50
-	ldr	r2, .L3069+8
-	ldr	r0, .L3069+12
+	movs	r1, #49
+	ldr	r2, .L3194+8
+	ldr	r0, .L3194+12
 	str	r3, [sp]
 	mov	r3, #2048
 	bl	printf
-.L3041:
-	ldr	r7, .L3069+16
-	movs	r6, #4
-.L3044:
-	ldr	r10, .L3069+32
+.L3164:
+	ldr	r7, .L3194+16
 	mov	r8, #4
-	ldr	r5, .L3069+20
+.L3168:
+	movs	r6, #0
+.L3167:
+	ldr	r10, .L3194+32
+	mov	fp, #4
+	ldr	r5, .L3194+20
 	movs	r0, #0
 	ldr	r2, [r4]
 	ldrh	r1, [r10]
 	ldr	r3, [r5]
-	str	r8, [sp]
-	muls	r1, r6, r1
+	str	fp, [sp]
+	mla	r1, r8, r1, r6
 	bl	flash_read_page_en
 	adds	r0, r0, #1
-	beq	.L3042
+	beq	.L3165
 	ldr	r2, [r4]
 	ldr	r3, [r2]
 	cmp	r3, r7
-	beq	.L3043
-.L3042:
+	beq	.L3166
+.L3165:
 	adds	r6, r6, #1
-	cmp	r6, #16
-	bne	.L3044
-.L3068:
+	cmp	r6, #4
+	bne	.L3167
+	add	r8, r8, #1
+	cmp	r8, #16
+	bne	.L3168
+.L3193:
 	mov	r0, #-1
-.L3040:
+.L3163:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3052:
+.L3176:
 	ldr	r3, [r4]
 	ldr	r2, [r3]
 	cmp	r2, r7
-	bne	.L3053
+	bne	.L3177
 	ldr	r8, [r3, #4]
-.L3046:
+.L3170:
 	ldrh	r0, [r10]
 	movs	r3, #4
 	ldrb	r1, [r6, #1]	@ zero_extendqisi2
@@ -19696,11 +20730,11 @@ flash_info_blk_init:
 	movs	r0, #0
 	bl	flash_read_page_en
 	adds	r0, r0, #1
-	beq	.L3047
+	beq	.L3171
 	ldr	r3, [r4]
 	ldr	r2, [r3]
 	cmp	r2, r7
-	bne	.L3047
+	bne	.L3171
 	ldr	r2, [r3, #4]
 	cmp	r8, r2
 	itttt	cc
@@ -19708,7 +20742,7 @@ flash_info_blk_init:
 	ldrbcc	r3, [r3, #36]	@ zero_extendqisi2
 	strbcc	r2, [r6]
 	strbcc	r3, [r6, #1]
-.L3047:
+.L3171:
 	mov	r8, #4
 	ldrb	r1, [r6]	@ zero_extendqisi2
 	ldr	r3, [r5]
@@ -19723,20 +20757,20 @@ flash_info_blk_init:
 	ldrb	r3, [r6]	@ zero_extendqisi2
 	movs	r6, #0
 	mla	r10, r10, r3, r0
-.L3048:
+.L3172:
 	sub	r0, fp, r6
 	sxth	r3, r0
 	cmp	r3, #0
-	bge	.L3051
+	bge	.L3175
 	adds	r2, r3, #1
-	bne	.L3050
+	bne	.L3174
 	ldr	r2, [r4]
-	ldr	r0, .L3069+24
+	ldr	r0, .L3194+24
 	str	r3, [sp, #12]
 	ldr	r1, [r2]
 	bl	printf
-	b	.L3068
-.L3051:
+	b	.L3193
+.L3175:
 	str	r8, [sp]
 	sub	r1, r10, r6
 	ldr	r3, [r5]
@@ -19744,49 +20778,49 @@ flash_info_blk_init:
 	ldr	r2, [r4]
 	bl	flash_read_page_en
 	adds	r0, r0, #1
-	beq	.L3049
+	beq	.L3173
 	ldr	r3, [r4]
 	ldr	r3, [r3]
 	cmp	r3, r7
-	beq	.L3050
-.L3049:
+	beq	.L3174
+.L3173:
 	adds	r6, r6, #1
-	b	.L3048
-.L3050:
+	b	.L3172
+.L3174:
 	cmp	r6, #1
-	bls	.L3054
+	bls	.L3178
 	bl	flash_info_flush
-.L3054:
+.L3178:
 	movs	r0, #0
-	b	.L3040
-.L3043:
+	b	.L3163
+.L3166:
 	ldrb	r1, [r2, #36]	@ zero_extendqisi2
 	ldrh	r0, [r10]
 	ldrb	r3, [r2, #37]	@ zero_extendqisi2
-	ldr	r6, .L3069+28
+	ldr	r6, .L3194+28
 	strb	r1, [r6]
 	muls	r1, r0, r1
 	strb	r3, [r6, #1]
 	movs	r0, #0
-	str	r8, [sp]
+	str	fp, [sp]
 	ldr	r3, [r5]
 	bl	flash_read_page_en
 	adds	r0, r0, #1
-	bne	.L3052
-.L3053:
+	bne	.L3176
+.L3177:
 	mov	r8, #0
-	b	.L3046
-.L3070:
+	b	.L3170
+.L3195:
 	.align	2
-.L3069:
+.L3194:
 	.word	.LANCHOR14
 	.word	.LANCHOR27
-	.word	.LANCHOR199
-	.word	.LC175
+	.word	.LANCHOR212
+	.word	.LC174
 	.word	1398362953
-	.word	.LANCHOR197
-	.word	.LC176
-	.word	.LANCHOR198
+	.word	.LANCHOR210
+	.word	.LC175
+	.word	.LANCHOR211
 	.word	.LANCHOR2
 	.size	flash_info_blk_init, .-flash_info_blk_init
 	.section	.text.nand_flash_init,"ax",%progbits
@@ -19800,459 +20834,504 @@ flash_info_blk_init:
 nand_flash_init:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L3289
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-	ldr	r5, .L3155
-	ldr	r3, [r5]
-	lsls	r0, r3, #19
-	bpl	.L3072
-	ldr	r2, .L3155+4
-	movw	r1, #2578
-	ldr	r0, .L3155+8
+	mov	r8, r3
+	ldr	r2, [r3]
+	tst	r2, #4096
+	beq	.L3197
+	ldr	r2, .L3289+4
+	movw	r1, #3429
+	ldr	r0, .L3289+8
 	bl	printf
-.L3072:
-	ldr	r3, .L3155+12
-	movs	r7, #0
+.L3197:
+	ldr	r3, .L3289+12
+	movs	r6, #0
 	mov	r0, r4
-	ldr	r8, .L3155+168
-	ldr	r6, .L3155+16
-	str	r7, [r3]
+	ldr	r7, .L3289+16
+	ldr	r5, .L3289+20
+	str	r6, [r3]
 	bl	nandc_init
-	ldr	r3, .L3155+20
+	ldr	r3, .L3289+24
 	movs	r2, #1
-	ldr	r4, .L3155+24
-	mov	r1, r7
-	ldr	r0, .L3155+28
+	ldr	r4, .L3289+28
+	mov	r1, r6
+	ldr	r0, .L3289+32
 	strb	r2, [r3]
 	movs	r3, #3
 	movs	r2, #8
-	strb	r3, [r8]
-	str	r4, [r6]
+	strb	r3, [r7]
+	str	r4, [r5]
 	bl	ftl_memset
 	movs	r2, #32
-	mov	r1, r7
-	ldr	r0, .L3155+32
+	mov	r1, r6
+	ldr	r0, .L3289+36
 	bl	ftl_memset
-	str	r8, [sp]
-	ldr	r8, .L3155+36
-	mov	r10, r8
-.L3078:
-	lsl	fp, r7, #3
-	uxtb	r0, r7
-	add	r1, r8, fp
+	str	r7, [sp]
+	ldr	r7, .L3289+40
+	mov	fp, r7
+.L3203:
+	lsl	r10, r6, #3
+	uxtb	r0, r6
+	add	r1, r7, r10
 	bl	flash_read_id
-	cbnz	r7, .L3073
-	ldrb	r3, [r8]	@ zero_extendqisi2
+	cbnz	r6, .L3198
+	ldrb	r3, [r7]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, #253
-	bls	.L3074
-.L3076:
+	bls	.L3199
+.L3201:
 	mvn	fp, #1
-.L3071:
+.L3196:
 	mov	r0, fp
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3074:
-	ldrb	r3, [r8, #1]	@ zero_extendqisi2
+.L3199:
+	ldrb	r3, [r7, #1]	@ zero_extendqisi2
 	cmp	r3, #255
-	beq	.L3076
-.L3073:
-	ldrb	r3, [r10, fp]	@ zero_extendqisi2
-	adds	r7, r7, #1
+	beq	.L3201
+.L3198:
+	ldrb	r3, [fp, r10]	@ zero_extendqisi2
+	adds	r6, r6, #1
 	cmp	r3, #181
 	itt	eq
 	moveq	r3, #44
-	strbeq	r3, [r10, fp]
-	cmp	r7, #4
-	bne	.L3078
-	ldr	r8, .L3155+172
-	movs	r7, #0
-	ldr	r3, .L3155+36
-.L3081:
+	strbeq	r3, [fp, r10]
+	cmp	r6, #4
+	bne	.L3203
+	ldr	r7, .L3289+44
+	movs	r6, #0
+	ldr	r3, .L3289+40
+.L3206:
 	mov	r1, r3
-	ldrb	r2, [r8, #-1]	@ zero_extendqisi2
-	mov	r0, r8
+	ldrb	r2, [r7, #-1]	@ zero_extendqisi2
+	mov	r0, r7
 	str	r3, [sp, #4]
-	lsl	fp, r7, #5
+	lsl	r10, r6, #5
 	bl	flash_mem_cmp8
 	ldr	r3, [sp, #4]
 	cmp	r0, #0
-	bne	.L3079
-	ldr	r7, .L3155+40
-	ldr	r3, .L3155+44
-	add	r7, r7, fp
-	ldrb	r2, [r7, #22]	@ zero_extendqisi2
+	bne	.L3204
+	ldr	r6, .L3289+48
+	ldr	r3, .L3289+52
+	add	r6, r6, r10
+	ldrb	r2, [r6, #22]	@ zero_extendqisi2
 	mov	r1, r3
-.L3080:
-	lsl	ip, r0, #5
-	ldrb	ip, [ip, r3]	@ zero_extendqisi2
-	cmp	ip, r2
-	beq	.L3082
+.L3205:
+	lsls	r7, r0, #5
+	ldrb	r7, [r7, r3]	@ zero_extendqisi2
+	cmp	r7, r2
+	beq	.L3207
 	adds	r0, r0, #1
 	cmp	r0, #4
-	bne	.L3080
-.L3082:
+	bne	.L3205
+.L3207:
+	ldr	r7, .L3289+56
 	add	r1, r1, r0, lsl #5
 	movs	r2, #32
-	ldr	r0, .L3155+48
+	ldr	r0, .L3289+60
 	bl	ftl_memcpy
 	movs	r2, #32
-	mov	r1, r7
-	ldr	r0, .L3155+24
+	mov	r1, r6
+	ldr	r0, .L3289+28
 	bl	ftl_memcpy
-	ldr	r3, .L3155+52
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	mov	fp, r3
-	cmp	r2, #8
-	bhi	.L3083
+	ldrb	r3, [r7]	@ zero_extendqisi2
+	cmp	r3, #8
+	bhi	.L3208
 	ldrb	r3, [r4, #20]	@ zero_extendqisi2
 	cmp	r3, #60
-	bls	.L3083
+	bls	.L3208
 	movs	r3, #60
 	strb	r3, [r4, #20]
-.L3083:
-	ldr	r3, [r5]
+.L3208:
+	ldr	r3, [r8]
 	lsls	r3, r3, #19
-	bpl	.L3114
-	ldr	r2, .L3155+4
-	movw	r1, #2600
-	ldr	r0, .L3155+8
+	bpl	.L3242
+	ldr	r2, .L3289+4
+	mov	r1, #3456
+	ldr	r0, .L3289+8
 	bl	printf
-.L3114:
-	ldr	r3, [r6]
+.L3242:
+	ldr	r3, [r5]
 	mov	r0, #16384
-	ldr	r7, .L3155+56
-	mov	r8, #0
+	ldr	r6, .L3289+64
+	mov	r10, #0
 	ldrh	r3, [r3, #10]
-	cmp	r3, #2304
-	ittt	eq
-	ldreq	r2, [sp]
-	moveq	r3, #2
-	strbeq	r3, [r2]
+	cmp	r3, #1024
+	ittt	cs
+	ldrcs	r2, [sp]
+	movcs	r3, #2
+	strbcs	r3, [r2]
 	bl	ftl_malloc
-	ldr	r3, .L3155+60
+	ldr	r3, .L3289+68
 	str	r0, [r3]
 	mov	r0, #16384
 	bl	ftl_malloc
-	ldr	r3, .L3155+64
+	ldr	r3, .L3289+72
 	str	r0, [r3]
 	mov	r0, #2048
 	bl	ftl_malloc
-	str	r0, [r7]
+	str	r0, [r6]
 	movs	r0, #64
 	bl	ftl_malloc
-	ldr	r3, .L3155+68
+	ldr	r3, .L3289+76
 	str	r0, [r3]
 	movs	r0, #64
 	bl	ftl_malloc
-	ldr	r3, .L3155+72
+	ldr	r3, .L3289+80
 	str	r0, [r3]
 	movs	r0, #64
 	bl	ftl_malloc
-	ldr	r3, .L3155+76
+	ldr	r3, .L3289+84
 	str	r0, [r3]
-	ldr	r3, .L3155+80
-	strb	r8, [r3]
+	ldr	r3, .L3289+88
+	strb	r10, [r3]
 	bl	flash_die_info_init
 	ldrb	r0, [r4, #18]	@ zero_extendqisi2
 	bl	flash_lsb_page_tbl_build
 	ldrb	r0, [r4, #20]	@ zero_extendqisi2
 	bl	nandc_bch_sel
-	ldr	r1, [r6]
-	ldr	r0, .L3155+84
+	ldr	r1, [r5]
+	ldr	r0, .L3289+92
 	ldrh	r3, [r1, #16]
 	ubfx	r2, r3, #8, #3
-	ubfx	r6, r3, #3, #1
+	ubfx	r5, r3, #3, #1
 	strb	r2, [r0]
-	ldr	r2, .L3155+88
-	strb	r6, [r2]
-	ubfx	r6, r3, #4, #1
-	ldr	r2, .L3155+92
-	strb	r6, [r2]
-	ubfx	r6, r3, #12, #1
-	ldr	r2, .L3155+96
-	strb	r6, [r2]
-	ubfx	r6, r3, #13, #1
-	ldr	r2, .L3155+100
-	strb	r6, [r2]
-	ubfx	r6, r3, #11, #1
-	ldr	r2, .L3155+104
-	strb	r6, [r2]
+	ldr	r2, .L3289+96
+	strb	r5, [r2]
+	ubfx	r5, r3, #4, #1
+	ldr	r2, .L3289+100
+	strb	r5, [r2]
+	ubfx	r5, r3, #12, #1
+	ldr	r2, .L3289+104
+	strb	r5, [r2]
+	ubfx	r5, r3, #13, #1
+	ldr	r2, .L3289+108
+	strb	r5, [r2]
+	ubfx	r5, r3, #11, #1
+	ldr	r2, .L3289+112
+	strb	r5, [r2]
 	ldrb	r2, [r1, #31]	@ zero_extendqisi2
-	ldr	r6, .L3155+108
-	ldrb	r1, [r1, #28]	@ zero_extendqisi2
+	ldr	r5, .L3289+116
 	ubfx	ip, r2, #1, #1
-	ubfx	r2, r2, #2, #1
-	strb	ip, [r6]
-	ldr	r6, .L3155+112
-	strb	r2, [r6]
-	ubfx	r6, r3, #14, #1
-	ldr	r2, .L3155+116
+	strb	ip, [r5]
+	ubfx	ip, r2, #2, #1
+	ldr	r5, .L3289+120
+	strb	ip, [r5]
+	ubfx	ip, r3, #14, #1
+	ldr	r5, .L3289+124
 	lsrs	r3, r3, #15
-	strb	r6, [r2]
-	ldr	r2, .L3155+120
-	ldr	r6, .L3155+124
-	strb	r3, [r2]
+	strb	ip, [r5]
+	ldr	r5, .L3289+128
+	strb	r3, [r5]
+	ubfx	r5, r2, #3, #1
+	ldrb	r3, [r1, #28]	@ zero_extendqisi2
+	ubfx	r2, r2, #4, #1
+	ldr	r1, .L3289+132
+	strb	r3, [r1]
+	ldr	r1, .L3289+136
+	strb	r5, [r1]
+	ldr	r1, .L3289+140
+	ldr	r5, .L3289+144
+	strb	r2, [r1]
 	movs	r2, #60
-	ldr	r3, .L3155+128
-	str	r8, [r6]
-	mov	r8, r0
-	strb	r1, [r3]
-	ldr	r3, .L3155+132
-	strb	r2, [r3]
-	ldrb	r2, [fp]	@ zero_extendqisi2
+	ldr	r1, .L3289+148
+	str	r10, [r5]
+	mov	r10, r0
+	strb	r2, [r1]
+	ldrb	r2, [r7]	@ zero_extendqisi2
+	ldr	r7, .L3289+152
 	cmp	r2, #9
-	itt	eq
+	strb	r3, [r7]
+	it	eq
 	moveq	r0, #70
-	strbeq	r0, [r3]
-	ldr	r3, .L3155+136
-	strb	r1, [r3]
-	ldrb	r1, [r4, #7]	@ zero_extendqisi2
-	cmp	r1, #9
-	itt	eq
-	moveq	r1, #0
-	strbeq	r1, [r3]
-	ldrb	r1, [r4, #31]	@ zero_extendqisi2
-	lsls	r1, r1, #31
-	itt	mi
-	movmi	r1, #3
-	strbmi	r1, [r3]
+	ldrb	r3, [r4, #31]	@ zero_extendqisi2
+	it	eq
+	strbeq	r0, [r1]
+	lsls	r3, r3, #31
+	bpl	.L3211
+	ldrb	r3, [r4, #29]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L3212
+	movs	r3, #2
+.L3282:
+	strb	r3, [r7]
+.L3211:
 	cmp	r2, #8
-	bne	.L3088
-	ldrb	r2, [r10]	@ zero_extendqisi2
-	cmp	r2, #44
-	beq	.L3089
-	cmp	r2, #137
-	bne	.L3088
-.L3089:
-	ldrb	r2, [r4, #28]	@ zero_extendqisi2
-	cmp	r2, #3
+	bne	.L3213
+	ldrb	r3, [fp]	@ zero_extendqisi2
+	cmp	r3, #44
+	beq	.L3214
+	cmp	r3, #137
+	bne	.L3213
+.L3214:
+	ldrb	r3, [r4, #28]	@ zero_extendqisi2
+	cmp	r3, #3
 	itt	eq
-	moveq	r2, #0
-	strbeq	r2, [r3]
-.L3088:
+	moveq	r3, #0
+	strbeq	r3, [r7]
+.L3213:
 	ldrh	r1, [r4, #16]
+	ldr	r2, .L3289+156
 	ldrb	r3, [r4, #19]	@ zero_extendqisi2
-	ldr	r2, .L3155+140
 	tst	r1, #64
+	str	r2, [sp]
 	strb	r3, [r2]
-	mov	r4, r2
-	beq	.L3091
+	beq	.L3216
 	sub	r2, r3, #17
 	cmp	r2, #2
-	bls	.L3092
+	bls	.L3217
 	cmp	r3, #21
-	bne	.L3093
-.L3092:
-	ldr	r2, .L3155+144
+	bne	.L3218
+.L3217:
+	ldr	r2, .L3289+160
 	cmp	r3, #21
-	ldr	r3, .L3155+148
-	str	r2, [r6]
-	beq	.L3154
+	ldr	r3, .L3289+164
+	str	r2, [r5]
+	beq	.L3286
 	movs	r2, #15
-.L3152:
+.L3284:
 	strb	r2, [r3]
-.L3091:
-	ldr	r3, [r5]
-	lsls	r3, r3, #19
-	bpl	.L3103
-	ldr	r2, .L3155+4
-	movw	r1, #2671
-	ldr	r0, .L3155+8
+.L3216:
+	ldr	r3, [r8]
+	lsls	r0, r3, #19
+	bpl	.L3230
+	ldr	r2, .L3289+4
+	movw	r1, #3549
+	ldr	r0, .L3289+8
 	bl	printf
-.L3103:
-	ldr	r3, .L3155+152
+.L3230:
+	ldr	r3, .L3289+168
 	movs	r2, #0
-	movs	r0, #4
 	strb	r2, [r3]
-	mov	r10, r3
-	ldrb	r2, [r8]	@ zero_extendqisi2
+	ldrb	r2, [r10]	@ zero_extendqisi2
+	str	r3, [sp, #4]
 	tst	r2, #1
-	beq	.L3104
+	beq	.L3231
+	ldrb	r3, [fp]	@ zero_extendqisi2
+	cmp	r3, #155
+	beq	.L3232
+	movs	r0, #4
+	bl	flash_set_interface_mode
+	movs	r0, #4
 	bl	nandc_set_if_mode
+.L3232:
 	movs	r0, #1
 	bl	flash_set_interface_mode
 	movs	r0, #1
-.L3104:
+.L3285:
 	bl	nandc_set_if_mode
 	bl	flash_info_blk_init
 	cmp	r0, #-1
 	mov	fp, r0
-	bne	.L3106
-	ldr	r3, [r5]
-	lsls	r0, r3, #19
-	bpl	.L3107
-	ldr	r2, .L3155+4
-	mov	r1, #2688
-	ldr	r0, .L3155+8
-	bl	printf
-.L3107:
-	ldr	r3, [r7]
+	bne	.L3234
+	ldr	r3, [r6]
 	movs	r2, #17
 	movs	r0, #0
 	strb	r2, [r3, #32]
-	ldr	r3, .L3155+156
+	ldr	r3, .L3289+172
 	strb	r0, [r3]
 	bl	zftl_flash_exit_slc_mode
-	b	.L3071
-.L3079:
-	adds	r7, r7, #1
-	add	r8, r8, #32
-	cmp	r7, #44
-	bne	.L3081
-	b	.L3076
-.L3093:
-	cmp	r3, #33
-	beq	.L3096
-	sub	r2, r3, #65
-	cmp	r2, #1
-	bhi	.L3097
-.L3096:
-	ldr	r3, .L3155+160
-	movs	r2, #4
-	str	r3, [r6]
-	ldr	r3, .L3155+164
-	strb	r2, [r3]
-.L3153:
-	movs	r2, #7
-	ldr	r3, .L3155+148
-	b	.L3152
-.L3156:
+	b	.L3196
+.L3204:
+	adds	r6, r6, #1
+	adds	r7, r7, #32
+	cmp	r6, #49
+	bne	.L3206
+	b	.L3201
+.L3212:
+	movs	r3, #3
+	b	.L3282
+.L3290:
 	.align	2
-.L3155:
+.L3289:
 	.word	.LANCHOR14
-	.word	.LANCHOR200
-	.word	.LC92
-	.word	.LANCHOR163
+	.word	.LANCHOR213
+	.word	.LC97
+	.word	.LANCHOR172
+	.word	.LANCHOR32
 	.word	.LANCHOR16
 	.word	.LANCHOR18
-	.word	.LANCHOR32
+	.word	.LANCHOR33
 	.word	.LANCHOR30
-	.word	.LANCHOR143
-	.word	.LANCHOR44
-	.word	.LANCHOR201
-	.word	.LANCHOR202
-	.word	.LANCHOR20
+	.word	.LANCHOR148
+	.word	.LANCHOR48
+	.word	.LANCHOR214+1
+	.word	.LANCHOR214
+	.word	.LANCHOR215
 	.word	.LANCHOR28
+	.word	.LANCHOR20
 	.word	.LANCHOR27
-	.word	.LANCHOR167
-	.word	.LANCHOR159
+	.word	.LANCHOR176
 	.word	.LANCHOR166
-	.word	.LANCHOR161
-	.word	.LANCHOR197
-	.word	.LANCHOR203
+	.word	.LANCHOR175
+	.word	.LANCHOR168
+	.word	.LANCHOR210
+	.word	.LANCHOR216
+	.word	.LANCHOR49
+	.word	.LANCHOR186
 	.word	.LANCHOR45
-	.word	.LANCHOR171
-	.word	.LANCHOR41
-	.word	.LANCHOR77
-	.word	.LANCHOR74
-	.word	.LANCHOR35
-	.word	.LANCHOR204
-	.word	.LANCHOR205
+	.word	.LANCHOR84
+	.word	.LANCHOR81
+	.word	.LANCHOR36
+	.word	.LANCHOR124
+	.word	.LANCHOR217
 	.word	.LANCHOR1
-	.word	.LANCHOR75
-	.word	.LANCHOR165
+	.word	.LANCHOR82
 	.word	.LANCHOR0
+	.word	.LANCHOR31
+	.word	.LANCHOR37
+	.word	.LANCHOR174
 	.word	.LANCHOR17
 	.word	.LANCHOR19
 	.word	.LANCHOR23
 	.word	micron_read_retrial
-	.word	.LANCHOR162
+	.word	.LANCHOR169
 	.word	.LANCHOR21
-	.word	.LANCHOR33
-	.word	toshiba_read_retrial
-	.word	.LANCHOR26
-	.word	.LANCHOR31
-	.word	.LANCHOR201+1
-.L3097:
+	.word	.LANCHOR34
+.L3218:
+	cmp	r3, #33
+	beq	.L3221
+	sub	r2, r3, #65
+	cmp	r2, #1
+	bhi	.L3222
+.L3221:
+	ldr	r3, .L3291
+	movs	r2, #4
+	str	r3, [r5]
+	ldr	r3, .L3291+4
+	strb	r2, [r3]
+.L3288:
+	movs	r2, #7
+.L3287:
+	ldr	r3, .L3291+8
+	b	.L3284
+.L3222:
 	sub	r2, r3, #67
 	uxtb	r2, r2
 	cmp	r2, #1
-	bls	.L3098
+	bls	.L3223
 	sub	r1, r3, #34
 	cmp	r1, #1
-	bhi	.L3099
-.L3098:
-	ldr	r1, .L3157
+	bhi	.L3224
+.L3223:
+	ldr	r1, .L3291
 	cmp	r3, #35
-	str	r1, [r6]
-	ldr	r1, .L3157+4
-	beq	.L3100
+	str	r1, [r5]
+	ldr	r1, .L3291+8
+	beq	.L3225
 	cmp	r3, #68
-	beq	.L3100
+	beq	.L3225
 	movs	r3, #7
-.L3151:
+.L3283:
 	cmp	r2, #1
 	strb	r3, [r1]
-	ldr	r3, .L3157+8
-	bhi	.L3102
-.L3154:
+	ldr	r3, .L3291+4
+	bhi	.L3227
+.L3286:
 	movs	r2, #4
-	b	.L3152
-.L3100:
+	b	.L3284
+.L3225:
 	movs	r3, #17
-	b	.L3151
-.L3102:
+	b	.L3283
+.L3227:
 	movs	r2, #5
-	b	.L3152
-.L3099:
-	subs	r3, r3, #36
+	b	.L3284
+.L3224:
+	sub	r2, r3, #36
+	cmp	r2, #1
+	bhi	.L3228
+	ldr	r3, .L3291+12
+	str	r3, [r5]
+	b	.L3288
+.L3228:
+	cmp	r3, #50
+	bne	.L3229
+	ldr	r3, .L3291+16
+	movs	r2, #25
+	str	r3, [r5]
+	b	.L3287
+.L3229:
+	cmp	r3, #81
+	bne	.L3216
+	ldr	r3, .L3291+20
+	movs	r2, #7
+	str	r3, [r5]
+	ldr	r3, .L3291+8
+	strb	r2, [r3]
+	movs	r2, #0
+	ldr	r3, .L3291+24
+	b	.L3284
+.L3231:
+	movs	r0, #4
+	b	.L3285
+.L3234:
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	cmp	r3, #9
+	bne	.L3235
+	ldr	r3, [r6]
+	ldrb	r3, [r3, #20]	@ zero_extendqisi2
 	cmp	r3, #1
-	bhi	.L3091
-	ldr	r3, .L3157+12
-	str	r3, [r6]
-	b	.L3153
-.L3106:
-	ldrb	r3, [r4]	@ zero_extendqisi2
+	itt	ne
+	movne	r3, #0
+	strbne	r3, [r7]
+.L3235:
+	ldr	r3, [sp]
+	ldrb	r3, [r3]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	cmp	r3, #7
 	itt	ls
-	ldrls	r3, .L3157+16
-	strls	r3, [r6]
-	ldrb	r3, [r8]	@ zero_extendqisi2
+	ldrls	r3, .L3291+28
+	strls	r3, [r5]
+	ldrb	r3, [r10]	@ zero_extendqisi2
 	lsls	r1, r3, #29
-	bpl	.L3110
-	ldr	r3, [r7]
+	bpl	.L3238
+	ldr	r3, [r6]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
-	cbz	r3, .L3110
-	ldr	r2, .L3157+20
+	cbz	r3, .L3238
+	ldr	r2, .L3291+32
 	movs	r0, #0
-	ldr	r3, .L3157+24
+	ldr	r3, .L3291+36
 	ldrh	r1, [r2]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	muls	r1, r3, r1
 	bl	flash_ddr_para_scan
-	ldrb	r3, [r10]	@ zero_extendqisi2
-	cbnz	r3, .L3110
-	ldr	r2, [r7]
+	ldr	r3, [sp, #4]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L3238
+	ldr	r2, [r6]
 	strb	r3, [r2, #19]
 	bl	flash_info_flush
-.L3110:
-	ldr	r3, [r5]
+.L3238:
+	ldr	r3, [r8]
 	lsls	r2, r3, #19
-	bpl	.L3112
-	ldr	r2, .L3157+28
-	movw	r1, #2740
-	ldr	r0, .L3157+32
+	bpl	.L3240
+	ldr	r2, .L3291+40
+	movw	r1, #3647
+	ldr	r0, .L3291+44
 	bl	printf
-.L3112:
+.L3240:
 	bl	nand_flash_print_info
 	mov	fp, #0
-	b	.L3071
-.L3158:
+	b	.L3196
+.L3292:
 	.align	2
-.L3157:
+.L3291:
 	.word	toshiba_read_retrial
-	.word	.LANCHOR162
 	.word	.LANCHOR26
+	.word	.LANCHOR169
 	.word	toshiba_3d_read_retrial
+	.word	samsung_read_retrial
+	.word	ymtc_3d_read_retrial
+	.word	.LANCHOR51
 	.word	hynix_read_retrial
 	.word	.LANCHOR2
-	.word	.LANCHOR198
-	.word	.LANCHOR200
-	.word	.LC92
+	.word	.LANCHOR211
+	.word	.LANCHOR213
+	.word	.LC97
 	.size	nand_flash_init, .-nand_flash_init
 	.section	.text.ftl_sysblk_dump,"ax",%progbits
 	.align	1
@@ -20275,37 +21354,37 @@ ftl_sysblk_dump:
 	mov	r4, r0
 	mov	r5, r6
 	str	r3, [sp, #44]
-.L3160:
-	ldr	r3, .L3169
+.L3294:
+	ldr	r3, .L3303
 	ldrh	r2, [r3]
 	uxth	r3, r6
 	cmp	r2, r3
-	bhi	.L3162
+	bhi	.L3296
 	ldr	r1, [sp, #44]
 	movs	r3, #32
-	ldr	r0, .L3169+4
+	ldr	r0, .L3303+4
 	movs	r2, #4
 	add	r1, r1, #704
 	bl	rknand_print_hex
 	mov	r0, r4
 	bl	zbuf_free
-	cbz	r5, .L3163
-	movw	r2, #1422
-	ldr	r1, .L3169+8
-	ldr	r0, .L3169+12
+	cbz	r5, .L3297
+	movw	r2, #1611
+	ldr	r1, .L3303+8
+	ldr	r0, .L3303+12
 	bl	printf
-.L3163:
+.L3297:
 	mov	r0, r5
 	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3162:
-	ldr	r3, .L3169+16
+.L3296:
+	ldr	r3, .L3303+16
 	uxth	r7, r6
 	ldr	r2, [r4, #12]
 	ldr	r1, [r4, #4]
 	ldrh	r8, [r3]
-	ldr	r3, .L3169+20
+	ldr	r3, .L3303+20
 	mla	r8, fp, r8, r7
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	mov	r0, r8
@@ -20331,7174 +21410,8363 @@ ftl_sysblk_dump:
 	mov	r2, r7
 	ldr	r3, [r3]
 	str	r0, [sp]
-	ldr	r0, .L3169+24
+	ldr	r0, .L3303+24
 	str	r3, [sp, #4]
 	mov	r3, r8
 	bl	printf
 	cmp	r10, #-1
-	beq	.L3164
+	beq	.L3298
 	cmp	r10, #512
 	it	eq
 	moveq	r5, #1
-.L3161:
+.L3295:
 	adds	r6, r6, #1
-	b	.L3160
-.L3164:
+	b	.L3294
+.L3298:
 	movs	r5, #1
-	b	.L3161
-.L3170:
+	b	.L3295
+.L3304:
 	.align	2
-.L3169:
-	.word	.LANCHOR87
-	.word	.LC177
-	.word	.LANCHOR206
+.L3303:
+	.word	.LANCHOR95
+	.word	.LC176
+	.word	.LANCHOR218
 	.word	.LC0
-	.word	.LANCHOR105
-	.word	.LANCHOR125
-	.word	.LC163
+	.word	.LANCHOR111
+	.word	.LANCHOR131
+	.word	.LC167
 	.size	ftl_sysblk_dump, .-ftl_sysblk_dump
-	.section	.text.dump_ftl_info,"ax",%progbits
+	.section	.text.ftl_open_sblk_recovery,"ax",%progbits
 	.align	1
-	.global	dump_ftl_info
+	.global	ftl_open_sblk_recovery
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	dump_ftl_info, %function
-dump_ftl_info:
-	@ args = 0, pretend = 0, frame = 0
+	.type	ftl_open_sblk_recovery, %function
+ftl_open_sblk_recovery:
+	@ args = 0, pretend = 0, frame = 216
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L3172
-	push	{r0, r1, r2, r4, r5, r6, r7, lr}
-	ldr	r0, .L3172+4
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	bl	printf
-	ldr	r1, .L3172+8
-	ldr	r5, .L3172+12
-	ldr	r0, .L3172+16
-	ldrh	r3, [r1, #2]
-	ldrb	r2, [r1, #1]	@ zero_extendqisi2
-	ldrb	r1, [r1]	@ zero_extendqisi2
-	bl	printf
-	ldr	r3, [r5]
-	ldr	r4, .L3172+20
-	ldr	r0, .L3172+24
-	ldrh	r2, [r3, #140]
-	ldrh	r1, [r3, #130]
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r0
+	ldr	r5, .L3442
+	sub	sp, sp, #224
+	str	r1, [sp, #28]
+	ldr	r3, [r5]
+	lsls	r0, r3, #19
+	bpl	.L3306
+	ldrh	r1, [r4, #2]
+	ldr	r0, .L3442+4
 	bl	printf
-	ldr	r0, [r4]
-	ldr	r7, .L3172+28
-	ldrh	r6, [r0, #26]
-	ldrb	r3, [r0, #21]	@ zero_extendqisi2
-	ldrh	r2, [r0, #18]
-	ldrh	r1, [r0, #16]
-	str	r6, [sp, #4]
-	ldrh	r0, [r0, #22]
-	str	r0, [sp]
-	ldr	r0, .L3172+32
+.L3306:
+	ldr	r3, [r5]
+	lsls	r1, r3, #19
+	bpl	.L3307
+	ldrb	r1, [r4, #5]	@ zero_extendqisi2
+	ldr	r0, .L3442+8
 	bl	printf
-	ldr	r0, [r4]
-	ldrh	r6, [r0, #58]
-	ldrb	r3, [r0, #53]	@ zero_extendqisi2
-	ldrh	r2, [r0, #50]
-	ldrh	r1, [r0, #48]
-	str	r6, [sp, #4]
-	ldrh	r0, [r0, #54]
-	ldr	r6, .L3172+36
-	str	r0, [sp]
-	ldr	r0, .L3172+40
+.L3307:
+	ldr	r3, [r5]
+	lsls	r2, r3, #19
+	bpl	.L3308
+	ldrh	r1, [r4]
+	ldr	r0, .L3442+12
 	bl	printf
-	ldr	r0, [r4]
-	ldrh	r4, [r0, #90]
-	ldrb	r3, [r0, #85]	@ zero_extendqisi2
-	ldrh	r2, [r0, #82]
-	ldrh	r1, [r0, #80]
-	str	r4, [sp, #4]
-	ldrh	r0, [r0, #86]
-	ldr	r4, .L3172+44
-	str	r0, [sp]
-	ldr	r0, .L3172+48
+.L3308:
+	ldr	r3, [r5]
+	lsls	r3, r3, #19
+	bpl	.L3309
+	ldrh	r2, [r4, #18]
+	ldrh	r1, [r4, #16]
+	ldr	r0, .L3442+16
 	bl	printf
-	ldrh	r2, [r6]
-	ldrb	r3, [r4]	@ zero_extendqisi2
-	ldr	r1, .L3172+52
-	ldr	r0, .L3172+56
+.L3309:
+	ldr	r3, [r5]
+	lsls	r7, r3, #19
+	bpl	.L3310
+	ldrb	r1, [r4, #9]	@ zero_extendqisi2
+	ldr	r0, .L3442+20
+	bl	printf
+.L3310:
+	ldrh	r3, [r4, #10]
+	ldrh	r2, [r4]
+	strh	r3, [r4, #14]	@ movhi
+	ldr	r3, .L3442+24
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcs	.L3305
+	movs	r0, #1
+	bl	buf_alloc
+	ldr	r3, .L3442+28
+	movs	r1, #255
+	ldr	r2, [r0, #4]
+	mov	r5, r0
+	add	r0, sp, #32
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	subs	r3, r3, #2
+	add	r3, r2, r3, lsl #9
+	movs	r2, #64
+	str	r3, [sp, #24]
+	bl	ftl_memset
+	movs	r2, #64
+	movs	r1, #255
+	add	r0, sp, #96
+	bl	ftl_memset
+	movs	r2, #64
+	movs	r1, #255
+	add	r0, sp, #160
+	bl	ftl_memset
+	ldrh	r3, [r4, #2]
+	ldrb	fp, [r4, #5]	@ zero_extendqisi2
+	str	r3, [sp, #8]
+	movs	r3, #2
+	str	r3, [sp, #12]
+	movs	r3, #0
+	str	r3, [sp, #20]
+.L3312:
+	ldr	r3, .L3442+32
+	ldr	r2, [sp, #8]
+	ldrh	r3, [r3]
+	cmp	r3, r2
+	bhi	.L3327
+.L3315:
+	ldrh	r3, [sp, #8]
+	ldr	r1, .L3442+32
+	ldrh	r2, [r4, #6]
+	strh	r3, [r4, #2]	@ movhi
+	ldrh	r3, [r4, #10]
+	ldrb	r0, [r4, #9]	@ zero_extendqisi2
+	strb	fp, [r4, #5]
+	add	r2, r2, r3
+	ldrh	r3, [r1]
+	str	r1, [sp, #8]
+	muls	r3, r0, r3
+	cmp	r2, r3
+	beq	.L3328
+	movw	r2, #1794
+	ldr	r1, .L3442+36
+	ldr	r0, .L3442+40
+	bl	printf
+.L3328:
+	ldr	r3, .L3442+44
+	movs	r6, #0
+	ldrh	r0, [r4, #10]
+	mov	r2, r6
+	ldr	r7, [r3]
+	str	r3, [sp, #16]
+.L3329:
+	cmp	r2, r0
+	bcc	.L3331
+	ldr	r2, [sp, #8]
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	ldr	r7, .L3442
+	ldrh	r2, [r2]
+	ldr	r8, .L3442+60
+	smulbb	r3, r3, r2
+	subs	r3, r3, r0
+	add	r6, r6, r3
+	ldr	r3, [r7]
+	uxth	r6, r6
+	tst	r3, #4096
+	beq	.L3332
+	ldrh	r1, [r4]
+	mov	r2, r6
+	ldr	r3, [r8]
+	ldr	r0, .L3442+48
+	ldrh	r3, [r3, r1, lsl #1]
+	bl	printf
+.L3332:
+	ldr	r3, [r8]
+	ldrh	r2, [r4]
+	strh	r6, [r3, r2, lsl #1]	@ movhi
+	ldr	r3, [r7]
+	lsls	r7, r3, #17
+	bpl	.L3333
+	ldr	r3, [sp, #44]
+	add	r1, sp, #32
+	ldr	r0, .L3442+52
+	str	r3, [sp]
+	ldm	r1, {r1, r2, r3}
+	bl	printf
+.L3333:
+	ldr	r6, .L3442+28
+	movs	r7, #0
+	ldr	r8, .L3442+56
+	movs	r1, #0
+	ldr	r0, [r5, #4]
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	lsls	r2, r2, #9
+	bl	ftl_memset
+	str	r6, [sp, #24]
+.L3334:
+	ldrb	r3, [r8]	@ zero_extendqisi2
+	ldr	r2, [sp, #12]
 	muls	r3, r2, r3
-	ldr	r1, [r1]
-	movs	r2, #4
-	lsls	r3, r3, #1
-	bl	rknand_print_hex
-	ldr	r1, .L3172+60
-	movs	r2, #2
-	ldrh	r3, [r7]
-	ldr	r0, .L3172+64
-	ldr	r1, [r1]
-	bl	rknand_print_hex
-	ldr	r1, [r5]
-	movs	r2, #4
-	ldr	r0, .L3172+68
-	ldrh	r3, [r1, #698]
-	add	r1, r1, #704
-	bl	rknand_print_hex
-	ldr	r1, .L3172+72
-	movs	r2, #4
-	ldrh	r3, [r7]
-	ldr	r0, .L3172+76
-	ldr	r1, [r1]
-	bl	rknand_print_hex
-	mov	r3, #256
-	movs	r2, #2
-	ldr	r1, .L3172+80
-	ldr	r0, .L3172+84
-	bl	rknand_print_hex
-	ldrh	r2, [r6]
-	ldrb	r3, [r4]	@ zero_extendqisi2
-	ldr	r1, .L3172+88
-	ldr	r0, .L3172+92
+	cmp	r7, r3
+	bcc	.L3348
+	ldr	r7, .L3442+28
+	movs	r6, #0
+.L3349:
+	ldr	r3, .L3442+56
+	ldr	r2, [sp, #12]
+	ldrb	r3, [r3]	@ zero_extendqisi2
 	muls	r3, r2, r3
-	ldr	r1, [r1]
-	movs	r2, #2
-	lsls	r3, r3, #1
-	add	sp, sp, #12
+	cmp	r6, r3
+	bcc	.L3356
+	mov	r0, r5
+	bl	zbuf_free
+	ldr	r3, [sp, #8]
+	ldrh	r2, [r4, #12]
+	ldrb	r1, [r4, #9]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	mla	r3, r1, r3, r2
+	ldr	r2, [sp, #16]
+	ldr	r2, [r2]
+	add	r3, r3, #1073741824
+	subs	r3, r3, #1
+	ldr	r3, [r2, r3, lsl #2]
+	adds	r3, r3, #1
+	beq	.L3357
+	movw	r2, #1909
+	ldr	r1, .L3442+36
+	ldr	r0, .L3442+40
+	bl	printf
+.L3357:
+	ldrh	r3, [r4, #6]
+	cmp	r3, #1
+	bne	.L3305
+	mov	r0, r4
+	bl	ftl_write_last_log_page
+.L3305:
+	add	sp, sp, #224
 	@ sp needed
-	pop	{r4, r5, r6, r7, lr}
-	b	rknand_print_hex
-.L3173:
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3327:
+	ldrb	fp, [r4, #5]	@ zero_extendqisi2
+.L3313:
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	cmp	r3, fp
+	bhi	.L3326
+	movs	r3, #0
+	strb	r3, [r4, #5]
+	ldr	r3, [sp, #8]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	str	r3, [sp, #8]
+	b	.L3312
+.L3443:
 	.align	2
-.L3172:
-	.word	.LANCHOR54
+.L3442:
+	.word	.LANCHOR14
+	.word	.LC177
 	.word	.LC178
-	.word	.LANCHOR182
-	.word	.LANCHOR104
 	.word	.LC179
-	.word	.LANCHOR10
 	.word	.LC180
-	.word	.LANCHOR6
 	.word	.LC181
-	.word	.LANCHOR87
-	.word	.LC182
-	.word	.LANCHOR80
-	.word	.LC183
-	.word	.LANCHOR111
+	.word	.LANCHOR6
+	.word	.LANCHOR131
+	.word	.LANCHOR95
+	.word	.LANCHOR219
+	.word	.LC0
+	.word	.LANCHOR117
 	.word	.LC184
-	.word	.LANCHOR9
 	.word	.LC185
-	.word	.LC177
-	.word	.LANCHOR7
-	.word	.LC186
-	.word	.LANCHOR110
-	.word	.LC187
-	.word	.LANCHOR112
-	.word	.LC188
-	.size	dump_ftl_info, .-dump_ftl_info
-	.section	.text.pm_ppa_update_check,"ax",%progbits
-	.align	1
-	.global	pm_ppa_update_check
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	pm_ppa_update_check, %function
-pm_ppa_update_check:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	mov	r7, r2
-	ldr	r2, .L3181
-	mov	r5, r0
-	mov	r6, r1
-	ldr	r3, .L3181+4
-	ldrb	r4, [r2]	@ zero_extendqisi2
+	.word	.LANCHOR80
+	.word	.LANCHOR9
+.L3326:
+	add	r3, fp, #8
+	ldrh	r7, [r4, r3, lsl #1]
+	movw	r3, #65535
+	cmp	r7, r3
+	beq	.L3314
+	ldr	r3, .L3444
+	ldr	r2, [sp, #8]
+	ldr	r6, .L3444+4
 	ldrh	r3, [r3]
-	rsb	r4, r4, #24
-	subs	r0, r4, r3
-	movs	r4, #1
-	lsls	r4, r4, r0
-	lsr	r0, r7, r3
-	ldr	r3, .L3181+8
-	subs	r4, r4, #1
-	ands	r0, r0, r4
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	bl	__aeabi_uidiv
-	ldr	r3, .L3181+12
-	uxth	r0, r0
-	ldr	r3, [r3]
-	add	r0, r3, r0, lsl #2
-	ldrb	r3, [r0, #2]	@ zero_extendqisi2
-	lsrs	r3, r3, #5
-	cmp	r3, #1
-	beq	.L3175
-	cmp	r3, #7
-	bne	.L3177
-.L3175:
-	mov	r3, r7
-	mov	r2, r6
-	mov	r1, r5
-	ldr	r0, .L3181+16
-	bl	printf
-	bl	dump_ftl_info
-	mov	r0, #-1
-	pop	{r3, r4, r5, r6, r7, pc}
-.L3177:
-	movs	r0, #0
-	pop	{r3, r4, r5, r6, r7, pc}
-.L3182:
-	.align	2
-.L3181:
-	.word	.LANCHOR31
-	.word	.LANCHOR68
-	.word	.LANCHOR69
-	.word	.LANCHOR7
-	.word	.LC189
-	.size	pm_ppa_update_check, .-pm_ppa_update_check
-	.section	.text.load_l2p_region,"ax",%progbits
-	.align	1
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	load_l2p_region, %function
-load_l2p_region:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	cmp	r1, #31
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r5, r0
-	mov	r7, r1
-	bls	.L3184
-	movs	r2, #32
-	ldr	r1, .L3204
-	ldr	r0, .L3204+4
-	bl	printf
-.L3184:
-	ldr	r6, .L3204+8
-	ldr	r3, [r6]
-	mov	fp, r6
-	ldrh	r2, [r3, #698]
-	cmp	r2, r5
-	bcs	.L3185
-	mov	r1, r5
-	ldr	r0, .L3204+12
-	bl	printf
-	ldr	r3, .L3204+16
-	movs	r4, #0
-	movs	r1, #255
-	ldr	r0, [r4, #4]
-	ldrh	r2, [r3]
-	bl	ftl_memset
-	ldr	r3, [r6]
-	ldrh	r3, [r3, #698]
-	cmp	r3, r5
-	bcc	.L3186
-.L3202:
-	movs	r0, #0
-.L3183:
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3186:
-	movs	r2, #36
-.L3203:
-	ldr	r1, .L3204
-	ldr	r0, .L3204+4
-	bl	printf
-	b	.L3202
-.L3185:
-	add	r2, r5, #176
-	ldr	r4, [r3, r2, lsl #2]
-	movs	r2, #0
-	ldr	r3, .L3204+20
-	strh	r5, [r3, r7, lsl #3]	@ movhi
-	lsls	r7, r7, #3
-	str	r3, [sp, #12]
-	add	r10, r3, r7
-	strh	r2, [r10, #2]	@ movhi
-	cbnz	r4, .L3188
-	mov	r2, r4
-	mov	r1, r5
-	ldr	r0, .L3204+24
-	bl	printf
-	ldr	r3, .L3204+16
-	movs	r1, #255
-	ldr	r0, [r10, #4]
-	ldrh	r2, [r3]
-	bl	ftl_memset
-	b	.L3202
-.L3188:
-	ldr	r6, .L3204+28
-	mov	r0, r4
-	ldr	r8, .L3204+48
-	ldr	r1, [r10, #4]
-	ldr	r2, [r6]
-	ldrb	r3, [r8]	@ zero_extendqisi2
+	ldr	r1, [r5, #4]
+	mla	r3, r7, r3, r2
+	ldr	r2, [r5, #12]
+	str	r3, [sp, #16]
+	ldr	r0, [sp, #16]
+	ldrb	r3, [r6]	@ zero_extendqisi2
 	bl	ftl_read_ppa_page
-	ldr	r2, [r6]
-	mov	r3, r0
-	ldr	r2, [r2]
-	cmp	r2, r5
-	bne	.L3189
-	adds	r1, r0, #1
-	beq	.L3189
 	cmp	r0, #512
-	beq	.L3189
-.L3192:
-	ldr	r3, [r6]
+	mov	r8, r0
+	beq	.L3315
+	cmp	r0, #-1
+	beq	.L3316
+	ldr	r3, [r5, #12]
+	ldr	r2, [r3]
+	adds	r2, r2, #1
+	bne	.L3316
+	ldr	r3, [r3, #4]
+	adds	r3, r3, #1
+	bne	.L3316
+	ldr	r3, [r5, #4]
 	ldr	r3, [r3]
-	cmp	r5, r3
-	beq	.L3202
-	movs	r2, #63
-	b	.L3203
-.L3189:
-	mov	r1, r5
-	str	r4, [sp]
-	ldr	r0, .L3204+32
+	adds	r3, r3, #1
+	beq	.L3315
+.L3316:
+	ldr	r3, .L3444+8
+	movs	r2, #1
+	ldr	r1, [sp, #8]
+	strb	r2, [r3]
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	ldrh	r2, [r4, #10]
+	mla	r3, r1, r3, fp
+	cmp	r2, r3
+	beq	.L3317
+	movw	r2, #1686
+	ldr	r1, .L3444+12
+	ldr	r0, .L3444+16
 	bl	printf
-	ldr	r1, [fp]
-	movs	r2, #4
-	ldr	r0, .L3204+36
-	ldrh	r3, [r1, #698]
-	add	r1, r1, #704
-	bl	rknand_print_hex
-	ldr	r2, [sp, #12]
-	ldrb	r3, [r8]	@ zero_extendqisi2
-	ldr	r0, .L3204+40
-	add	r2, r2, r7
-	mov	r7, r2
+.L3317:
+	ldrh	r3, [r4, #10]
+	ldrh	r2, [r4, #6]
+	add	r2, r2, r3
+	ldr	r3, .L3444+20
+	ldrh	r1, [r3]
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	muls	r3, r1, r3
+	cmp	r2, r3
+	beq	.L3318
+	movw	r2, #1687
+	ldr	r1, .L3444+12
+	ldr	r0, .L3444+16
+	bl	printf
+.L3318:
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	cmp	r3, #8
+	bls	.L3319
+	ldr	r10, [r5, #12]
+	ldr	r2, .L3444+24
+	ldr	r3, [r10]
+	cmp	r3, r2
+	beq	.L3319
+	cmp	r8, #-1
+	beq	.L3321
+	ldr	r3, [r10, #4]
+	adds	r3, r3, #1
+	beq	.L3322
+	ldr	r3, [r10, #16]
+	add	r2, r2, #1392508928
+	sub	r2, r2, #1957888
+	subw	r2, r2, #2427
+	cmp	r3, r2
+	bne	.L3322
+	mov	r1, #1024
+	ldr	r0, [sp, #24]
+	bl	js_hash
+	ldr	r3, [r10, #20]
+	cmp	r3, r0
+	beq	.L3322
+	str	r0, [sp, #4]
+	mov	r1, r7
+	ldr	r3, [sp, #16]
+	ldr	r2, [sp, #8]
+	str	r8, [sp]
+	ldr	r0, .L3444+28
+	bl	printf
+	movs	r3, #16
 	movs	r2, #4
-	lsls	r3, r3, #7
-	ldr	r1, [r7, #4]
+	ldr	r1, [sp, #24]
+	ldr	r0, .L3444+32
 	bl	rknand_print_hex
-	movs	r3, #16
+	ldrb	r3, [r6]	@ zero_extendqisi2
 	movs	r2, #4
-	ldr	r1, [r6]
-	ldr	r0, .L3204+44
+	ldr	r1, [r5, #12]
+	ldr	r0, .L3444+36
+	lsrs	r3, r3, #1
 	bl	rknand_print_hex
-	ldrb	r3, [r8]	@ zero_extendqisi2
-	mov	r0, r4
-	ldr	r2, [r6]
-	ldr	r1, [r7, #4]
-	bl	ftl_read_ppa_page
-	ldr	r3, [r6]
+.L3321:
+	ldrh	r3, [r4, #6]
+	subs	r3, r3, #1
+	strh	r3, [r4, #6]	@ movhi
+	ldrh	r3, [r4, #10]
+	adds	r3, r3, #1
+	strh	r3, [r4, #10]	@ movhi
+	movs	r3, #4
+	str	r3, [sp, #12]
+	movs	r3, #1
+	str	r3, [sp, #20]
+.L3314:
+	add	r3, fp, #1
+	uxth	fp, r3
+	b	.L3313
+.L3319:
+	cmp	r8, #-1
+	beq	.L3321
+.L3322:
+	ldr	r3, [r5, #12]
+	ldr	r0, [r3, #4]
+	adds	r6, r0, #1
+	beq	.L3321
 	ldr	r3, [r3]
-	cmp	r5, r3
-	bne	.L3195
-	adds	r3, r0, #1
-	beq	.L3183
-	cmp	r0, #512
-	bne	.L3192
-.L3195:
-	mov	r0, #-1
-	b	.L3183
-.L3205:
-	.align	2
-.L3204:
-	.word	.LANCHOR207
-	.word	.LC0
-	.word	.LANCHOR104
-	.word	.LC190
-	.word	.LANCHOR208
-	.word	.LANCHOR134
-	.word	.LC191
-	.word	.LANCHOR191
-	.word	.LC192
-	.word	.LC193
-	.word	.LC194
-	.word	.LC195
-	.word	.LANCHOR125
-	.size	load_l2p_region, .-load_l2p_region
-	.section	.text.pm_gc,"ax",%progbits
-	.align	1
-	.global	pm_gc
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	pm_gc, %function
-pm_gc:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r4, .L3223
-	ldr	r5, .L3223+4
-	ldr	r3, [r4]
-	ldr	r6, .L3223+8
-	ldrh	r2, [r5]
-	ldrh	r1, [r3, #688]
-	subs	r2, r2, #1
-	cmp	r1, r2
-	bge	.L3207
-	ldr	r3, [r6]
+	ldr	r2, .L3444+24
+	cmp	r3, r2
+	beq	.L3321
+	bl	lpa_hash_get_ppa
+	ldr	r3, [sp, #28]
+	mov	r7, r0
 	cmp	r3, #0
-	beq	.L3208
-.L3207:
-	bl	pm_free_sblk
-	ldr	r2, [r4]
-	ldrh	r3, [r5]
-	ldrh	r1, [r2, #688]
+	beq	.L3324
+	ldr	r10, [r5, #12]
+	ldr	r3, [r10, #8]
+	cmp	r0, r3
+	beq	.L3324
+	adds	r1, r0, #1
+	beq	.L3324
+	ldr	r3, .L3444+40
+	movs	r6, #1
+	ldr	r8, .L3444+60
+	ldrh	r0, [r3]
+	ldr	r3, .L3444+44
+	ldrb	r1, [r8]	@ zero_extendqisi2
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	rsb	r3, r3, #24
+	subs	r3, r3, r0
+	lsr	r0, r7, r0
+	lsl	r3, r6, r3
 	subs	r3, r3, #1
-	cmp	r1, r3
-	bge	.L3209
-	ldr	r3, [r6]
-	cmp	r3, #0
-	beq	.L3208
-.L3209:
+	ands	r0, r0, r3
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #28]
 	uxth	r0, r0
-	movw	r5, #65535
-	movs	r3, #0
-	adds	r0, r0, #208
-	str	r3, [r6]
-	ldrh	r8, [r2, r0, lsl #1]
-	cmp	r8, r5
-	bne	.L3211
-	movs	r2, #162
-	ldr	r1, .L3223+12
-	ldr	r0, .L3223+16
-	bl	printf
-	bl	pm_free_sblk
-	ldr	r3, [r4]
-	uxth	r0, r0
-	adds	r0, r0, #208
-	ldrh	r8, [r3, r0, lsl #1]
-	cmp	r8, r5
-	beq	.L3208
-.L3211:
-	ldr	r5, .L3223+20
-	bl	pm_select_ram_region
-	mov	r6, r0
-	movw	r3, #65535
-	ldrh	r0, [r5, r0, lsl #3]
-	cmp	r0, r3
-	beq	.L3212
-	add	r7, r5, r6, lsl #3
-	ldr	r1, [r7, #4]
-	cbz	r1, .L3212
-	ldrsh	r3, [r7, #2]
-	cmp	r3, #0
-	bge	.L3212
-	bl	pm_write_page
-	ldrh	r3, [r7, #2]
-	ubfx	r3, r3, #0, #15
-	strh	r3, [r7, #2]	@ movhi
-.L3212:
-	movs	r7, #0
-.L3213:
-	ldr	r1, [r4]
-	uxth	fp, r7
-	ldrh	r3, [r1, #698]
-	cmp	r3, fp
-	bhi	.L3216
-	bl	pm_free_sblk
-.L3208:
-	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3216:
-	ldr	r3, .L3223+24
-	uxth	r10, r7
-	mov	ip, #1
-	ldrh	r0, [r3]
-	ldr	r3, .L3223+28
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bne	.L3324
+	ldr	r3, [r10]
+	mov	r0, r7
+	ldr	r10, .L3444+64
+	ldr	r1, [r5, #4]
+	str	r3, [sp, #12]
+	ldr	r3, .L3444+4
+	mov	r2, r10
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	rsb	r3, r3, #24
-	subs	r3, r3, r0
-	lsl	r3, ip, r3
-	add	ip, r10, #176
-	ldr	r1, [r1, ip, lsl #2]
-	subs	r3, r3, #1
-	lsr	r0, r1, r0
-	ldr	r1, .L3223+32
-	ands	r0, r0, r3
-	ldrb	r1, [r1]	@ zero_extendqisi2
+	bl	ftl_read_ppa_page
+	ldr	r3, [r10]
+	ldr	r2, [sp, #12]
+	cmp	r2, r3
+	bhi	.L3324
+	ldr	r3, [r5, #12]
+	ldr	r3, [r3, #8]
+	adds	r2, r3, #1
+	beq	.L3321
+	ldr	r1, .L3444+44
+	ldr	r2, .L3444+40
+	ldrb	r0, [r1]	@ zero_extendqisi2
+	ldrh	r2, [r2]
+	ldrb	r1, [r8]	@ zero_extendqisi2
+	rsb	r0, r0, #24
+	subs	r0, r0, r2
+	lsls	r6, r6, r0
+	lsr	r0, r3, r2
+	subs	r6, r6, #1
+	ands	r0, r0, r6
 	bl	__aeabi_uidiv
 	uxth	r0, r0
-	cmp	r8, r0
-	bne	.L3214
-	mov	r1, r6
-	mov	r0, fp
-	bl	load_l2p_region
-	cbnz	r0, .L3215
-	add	r3, r5, r6, lsl #3
+	bl	ftl_vpn_decrement
+	b	.L3321
+.L3331:
+	ldrh	r1, [r4, #12]
+	add	r1, r1, r2
+	adds	r2, r2, #1
+	ldr	r3, [r7, r1, lsl #2]
+	adds	r3, r3, #1
+	itt	ne
+	addne	r6, r6, #1
+	uxthne	r6, r6
+	b	.L3329
+.L3348:
+	add	fp, sp, #32
+	ldr	r0, [fp, r7, lsl #2]
+	adds	r6, r0, #1
+	bne	.L3335
+.L3341:
+	ldr	r2, .L3444+48
+	mov	r6, #-1
+	ldr	r3, [r5, #12]
+	ldr	r1, [r5, #4]
+	ldr	r2, [r2]
+	ldr	r2, [r2, #8]
+	str	r6, [r3, #4]
+	str	r6, [r3, #8]
+	str	r2, [r3]
+	movs	r2, #0
+	str	r2, [r3, #12]
+	str	r2, [r3, #16]
+	str	r2, [r1]
+	ldr	r1, .L3444+4
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	cmp	r1, #8
+	bhi	.L3336
+.L3337:
+	ldr	r3, [sp, #20]
+	cmp	r3, #0
+	beq	.L3343
+	ldrh	r3, [r4, #6]
+	cmp	r3, #1
+	bls	.L3343
+	ldr	fp, .L3444+56
+.L3413:
+	mov	r0, r4
+	bl	ftl_get_new_free_page
+	ldr	r3, [fp]
+	mov	r10, r0
+	lsls	r3, r3, #17
+	bpl	.L3345
+	ldrh	r2, [r4, #12]
+	mov	r1, r0
+	ldrh	r3, [r4, #10]
+	ldr	r0, .L3444+52
+	add	r3, r3, r2
+	ldr	r2, [r5, #12]
+	subs	r3, r3, #1
+	ldr	r2, [r2, #4]
+	bl	printf
+.L3345:
+	ldrb	r3, [r8]	@ zero_extendqisi2
+	ldr	r1, [sp, #12]
+	ldrh	r2, [r4, #6]
+	muls	r3, r1, r3
+	adds	r3, r3, #1
+	subs	r3, r3, r7
+	cmp	r2, r3
+	bls	.L3343
+	ldr	r3, .L3444+4
 	mov	r0, r10
-	ldr	r1, [r3, #4]
-	bl	pm_write_page
-.L3215:
-	movw	r3, #65535
-	strh	r3, [r5, r6, lsl #3]	@ movhi
-.L3214:
+	ldr	r2, [r5, #12]
+	ldr	r1, [r5, #4]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	bl	ftl_prog_ppa_page
+	str	r0, [sp, #28]
+	ldrh	r0, [r4]
+	bl	ftl_vpn_decrement
+	adds	r0, r6, #1
+	beq	.L3346
+	ldr	r3, [sp, #28]
+	adds	r3, r3, #1
+	beq	.L3346
+	add	r3, sp, #96
+	ldrh	r2, [r4, #12]
+	str	r10, [r3, r7, lsl #2]
+	ldrh	r3, [r4, #10]
+	add	r3, r3, r2
+	add	r2, sp, #160
+	subs	r3, r3, #1
+	str	r3, [r2, r7, lsl #2]
+.L3343:
 	adds	r7, r7, #1
-	b	.L3213
-.L3224:
+	b	.L3334
+.L3445:
 	.align	2
-.L3223:
-	.word	.LANCHOR104
-	.word	.LANCHOR149
-	.word	.LANCHOR146
-	.word	.LANCHOR209
+.L3444:
+	.word	.LANCHOR111
+	.word	.LANCHOR131
+	.word	.LANCHOR198
+	.word	.LANCHOR219
 	.word	.LC0
-	.word	.LANCHOR134
-	.word	.LANCHOR68
-	.word	.LANCHOR31
-	.word	.LANCHOR69
-	.size	pm_gc, .-pm_gc
-	.section	.text.pm_flush_id,"ax",%progbits
-	.align	1
-	.global	pm_flush_id
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	pm_flush_id, %function
-pm_flush_id:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L3230
-	push	{r4, lr}
-	add	r4, r3, r0, lsl #3
-	ldrh	r0, [r3, r0, lsl #3]
-	ldr	r1, [r4, #4]
-	bl	pm_write_page
-	ldrh	r3, [r4, #2]
-	ubfx	r3, r3, #0, #15
-	strh	r3, [r4, #2]	@ movhi
-	ldr	r4, .L3230+4
-	ldr	r3, [r4]
-	cbz	r3, .L3226
-	bl	pm_gc
-	movs	r3, #0
-	str	r3, [r4]
-.L3226:
-	movs	r0, #0
-	pop	{r4, pc}
-.L3231:
-	.align	2
-.L3230:
-	.word	.LANCHOR134
-	.word	.LANCHOR132
-	.size	pm_flush_id, .-pm_flush_id
-	.section	.text.pm_flush,"ax",%progbits
-	.align	1
-	.global	pm_flush
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	pm_flush, %function
-pm_flush:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	movs	r4, #0
-	ldr	r5, .L3236
-.L3234:
-	add	r3, r5, r4, lsl #3
-	uxth	r0, r4
-	ldrsh	r3, [r3, #2]
-	cmp	r3, #0
-	bge	.L3233
-	bl	pm_flush_id
-.L3233:
-	adds	r4, r4, #1
-	cmp	r4, #32
-	bne	.L3234
-	movs	r0, #0
-	pop	{r3, r4, r5, pc}
-.L3237:
-	.align	2
-.L3236:
-	.word	.LANCHOR134
-	.size	pm_flush, .-pm_flush
-	.section	.text.flt_sys_flush,"ax",%progbits
-	.align	1
-	.global	flt_sys_flush
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	flt_sys_flush, %function
-flt_sys_flush:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	bl	ftl_flush
-	bl	pm_flush
-	bl	ftl_ext_info_flush
-	movs	r0, #0
-	pop	{r3, lr}
-	b	ftl_info_flush
-	.size	flt_sys_flush, .-flt_sys_flush
-	.section	.text.rk_ftl_de_init,"ax",%progbits
-	.align	1
-	.global	rk_ftl_de_init
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	rk_ftl_de_init, %function
-rk_ftl_de_init:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	bl	zftl_flash_de_init
-	bl	flt_sys_flush
-	pop	{r3, lr}
-	b	zftl_flash_de_init
-	.size	rk_ftl_de_init, .-rk_ftl_de_init
-	.section	.text.zftl_deinit,"ax",%progbits
-	.align	1
-	.global	zftl_deinit
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	zftl_deinit, %function
-zftl_deinit:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	rk_ftl_de_init
-	.size	zftl_deinit, .-zftl_deinit
-	.section	.text.pm_init,"ax",%progbits
-	.align	1
-	.global	pm_init
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	pm_init, %function
-pm_init:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r4, #0
-	ldr	r3, .L3262
-	movs	r2, #1
-	mov	r8, r0
-	movs	r0, #64
-	ldr	r6, .L3262+4
-	str	r4, [r3]
-	ldr	r3, .L3262+8
-	mov	r5, r6
-	str	r4, [r3]
-	ldr	r3, .L3262+12
-	strb	r2, [r3]
-	bl	ftl_malloc
-	ldr	r3, .L3262+16
-	mov	r10, r3
-	str	r0, [r3]
-.L3243:
-	movw	r3, #65535
-	adds	r7, r6, r4
-	strh	r3, [r4, r6]	@ movhi
-	movs	r3, #0
-	strh	r3, [r7, #2]	@ movhi
-	cmp	r8, #0
-	beq	.L3242
-	ldr	r3, .L3262+20
-	ldrb	r0, [r3]	@ zero_extendqisi2
-	lsls	r0, r0, #9
-	bl	ftl_malloc
-	str	r0, [r7, #4]
-.L3242:
-	adds	r4, r4, #8
-	cmp	r4, #256
-	bne	.L3243
-	ldr	r3, [r5, #4]
-	ldr	r4, .L3262+24
-	ldr	r10, [r10]
-	str	r3, [sp, #12]
-	ldr	r3, [r4]
-	ldr	r2, [sp, #12]
-	ldrh	r1, [r3, #692]
-	ldrb	r0, [r3, #694]	@ zero_extendqisi2
-	movs	r3, #4
-	str	r3, [sp]
-	mov	r3, r10
-	bl	flash_get_last_written_page
-	ldr	r1, [r4]
+	.word	.LANCHOR95
+	.word	-178307901
+	.word	.LC182
+	.word	.LC183
+	.word	.LC150
+	.word	.LANCHOR75
+	.word	.LANCHOR32
+	.word	.LANCHOR110
+	.word	.LC187
+	.word	.LANCHOR14
+	.word	.LANCHOR76
+	.word	.LANCHOR193
+.L3335:
+	ldr	r3, [sp, #24]
+	ldr	r1, [r5, #4]
+	ldr	r2, [r5, #12]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	bl	ftl_read_ppa_page
+	ldr	r3, [r5, #12]
 	mov	r6, r0
-	ldrh	r2, [r1, #696]
-	cmp	r2, r0
-	bgt	.L3244
-	mov	r3, r0
-	ldrh	r1, [r1, #692]
-	ldr	r0, .L3262+28
+	ldr	r0, [r3, #4]
+	bl	lpa_hash_get_ppa
+	ldr	r3, .L3446
+	mov	r10, r0
+	ldr	r3, [r3]
+	lsls	r1, r3, #17
+	bpl	.L3338
+	ldr	r3, [r5, #12]
+	mov	r1, r0
+	ldr	r2, [fp, r7, lsl #2]
+	ldr	r0, .L3446+4
+	ldr	r3, [r3, #4]
 	bl	printf
-	ldr	r3, [r4]
-	ldrsh	r7, [r3, #696]
-.L3245:
-	cmp	r7, r6
-	ble	.L3247
-	ldr	r3, .L3262+32
+.L3338:
+	add	r3, sp, #32
+	ldr	r1, .L3446+8
+	ldr	r3, [r3, r7, lsl #2]
 	movs	r2, #1
-	add	r6, r6, r2
-	strb	r2, [r3]
-	ldr	r3, [r4]
-	strh	r6, [r3, #696]	@ movhi
-	bl	pm_free_sblk
-.L3244:
-	ldr	r3, .L3262+36
-	movs	r1, #255
-	ldr	r0, [r5, #4]
-	ldrh	r2, [r3]
-	bl	ftl_memset
-	ldr	r1, [r5, #4]
-	mov	r0, #-1
-	bl	pm_write_page
-	ldr	r3, .L3262+32
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L3248
-	ldr	r1, [r5, #4]
-	mov	r0, #-1
-	bl	pm_write_page
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	cmp	r10, r3
+	it	ne
+	movne	r6, #-1
+	ldr	r3, [r5, #12]
+	cmp	r1, #8
+	str	r2, [r3, #12]
+	mov	r2, #0
+	str	r2, [r3, #16]
+	it	hi
+	strhi	r2, [r3, #20]
+	adds	r2, r6, #1
+	str	r10, [r3, #8]
+	bne	.L3337
+	b	.L3341
+.L3336:
+	str	r2, [r3, #16]
+	str	r2, [r3, #20]
+	b	.L3337
+.L3346:
+	ldrh	r3, [r4, #6]
+	cmp	r3, #1
+	bls	.L3343
+	adds	r1, r6, #1
+	bne	.L3413
+	b	.L3343
+.L3356:
+	add	r8, sp, #96
+	ldr	r3, [r8, r6, lsl #2]
+	adds	r3, r3, #1
+	beq	.L3351
+	add	r0, sp, #32
+	ldr	r2, [r5, #12]
+	ldrb	r3, [r7]	@ zero_extendqisi2
 	ldr	r1, [r5, #4]
-	mov	r0, #-1
-	bl	pm_write_page
+	ldr	r0, [r0, r6, lsl #2]
+	bl	ftl_read_ppa_page
+	adds	r2, r0, #1
+	beq	.L3352
+	cmp	r0, #256
+	bne	.L3351
+.L3352:
+	ldr	r0, [r8, r6, lsl #2]
+	ldr	r8, .L3446
+	ldrb	r3, [r7]	@ zero_extendqisi2
+	ldr	r2, [r5, #12]
 	ldr	r1, [r5, #4]
-	mov	r0, #-1
-	bl	pm_write_page
-.L3248:
-	bl	pm_free_sblk
-	bl	pm_gc
-	movs	r0, #0
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3247:
-	ldr	r3, [r4]
-	ldr	r2, .L3262+40
-	ldrh	r8, [r3, #692]
-	ldrh	r2, [r2]
-	ldrb	r0, [r3, #694]	@ zero_extendqisi2
-	ldr	r3, .L3262+20
-	mla	r8, r2, r8, r7
-	ldr	r2, [sp, #12]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	mov	r1, r8
-	str	r3, [sp]
-	mov	r3, r10
-	bl	flash_read_page_en
-	ldr	r3, [r4]
-	mov	fp, r0
-	ldr	r0, .L3262+44
-	ldr	r2, [r3, #48]
-	adds	r2, r2, #1
-	str	r2, [r3, #48]
-	mov	r2, r8
-	ldrh	r3, [r3, #694]
-	ldr	r1, [r10]
+	bl	ftl_read_ppa_page
+	ldr	r3, [r8]
+	mov	r10, r0
+	lsls	r3, r3, #17
+	bpl	.L3354
+	ldr	r2, [r5, #12]
+	add	r3, sp, #32
+	mov	r1, r0
+	ldr	r3, [r3, r6, lsl #2]
+	ldr	r0, .L3446+12
+	ldr	r2, [r2, #8]
 	bl	printf
-	cmp	fp, #-1
-	beq	.L3246
-	cmp	fp, #512
-	beq	.L3246
-	ldr	r2, [r4]
-	ldr	r3, [r10]
-	ldrh	r1, [r2, #698]
-	cmp	r3, r1
-	itt	cc
-	addcc	r3, r3, #176
-	strcc	r8, [r2, r3, lsl #2]
-.L3246:
-	adds	r7, r7, #1
-	sxth	r7, r7
-	b	.L3245
-.L3263:
+.L3354:
+	cmp	r10, #-1
+	beq	.L3351
+	ldr	r1, [r5, #12]
+	add	r3, sp, #32
+	ldr	r2, [r3, r6, lsl #2]
+	ldr	r3, [r1, #8]
+	cmp	r2, r3
+	bne	.L3351
+	ldr	r3, [r8]
+	add	r8, sp, #160
+	tst	r3, #16384
+	beq	.L3355
+	ldr	r3, [r8, r6, lsl #2]
+	ldr	r1, [r1, #4]
+	ldr	r0, .L3446+16
+	bl	printf
+.L3355:
+	ldr	r3, [r5, #12]
+	ldrh	r2, [r8, r6, lsl #2]
+	ldr	r1, [r3, #8]
+	ldr	r0, [r3, #4]
+	bl	lpa_hash_update_ppa
+.L3351:
+	adds	r6, r6, #1
+	b	.L3349
+.L3324:
+	ldr	r0, [r5, #12]
+	ldr	r3, .L3446+20
+	ldr	r2, [r0, #4]
+	ldr	r3, [r3]
+	cmp	r2, r3
+	bcs	.L3321
+	ldr	r3, .L3446+24
+	ldrb	r1, [r4, #9]	@ zero_extendqisi2
+	ldrh	r2, [r4, #10]
+	ldrh	r3, [r3]
+	muls	r3, r1, r3
+	subs	r3, r3, #1
+	cmp	r2, r3
+	bge	.L3321
+	ldr	r3, .L3446+28
+	ldr	r6, [r0]
+	ldr	r3, [r3]
+	ldr	r1, [r3, #8]
+	cmp	r6, r1
+	it	hi
+	strhi	r6, [r3, #8]
+	ldrh	r3, [r4, #12]
+	ldr	r1, [r0, #8]
+	ldr	r0, [r0, #4]
+	add	r2, r2, r3
+	uxth	r2, r2
+	bl	lpa_hash_update_ppa
+	ldr	r3, [sp, #36]
+	str	r3, [sp, #32]
+	ldr	r3, [sp, #40]
+	str	r3, [sp, #36]
+	ldr	r3, [sp, #44]
+	str	r3, [sp, #40]
+	ldr	r3, [sp, #16]
+	str	r3, [sp, #44]
+	b	.L3321
+.L3447:
 	.align	2
-.L3262:
-	.word	.LANCHOR146
-	.word	.LANCHOR134
-	.word	.LANCHOR132
-	.word	.LANCHOR192
-	.word	.LANCHOR191
-	.word	.LANCHOR125
-	.word	.LANCHOR104
-	.word	.LC196
-	.word	.LANCHOR185
-	.word	.LANCHOR208
-	.word	.LANCHOR105
-	.word	.LC197
-	.size	pm_init, .-pm_init
-	.section	.text.pm_log2phys,"ax",%progbits
+.L3446:
+	.word	.LANCHOR14
+	.word	.LC186
+	.word	.LANCHOR131
+	.word	.LC187
+	.word	.LC188
+	.word	.LANCHOR128
+	.word	.LANCHOR95
+	.word	.LANCHOR110
+	.size	ftl_open_sblk_recovery, .-ftl_open_sblk_recovery
+	.section	.text.dump_ftl_info,"ax",%progbits
 	.align	1
-	.global	pm_log2phys
+	.global	dump_ftl_info
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	pm_log2phys, %function
-pm_log2phys:
-	@ args = 0, pretend = 0, frame = 8
+	.type	dump_ftl_info, %function
+dump_ftl_info:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L3279
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	fp, r0
-	str	r2, [sp, #4]
-	mov	r6, r1
-	ldr	r2, [r3]
-	cmp	r0, r2
-	bcc	.L3265
-	mov	r1, r0
-	ldr	r0, .L3279+4
+	ldr	r3, .L3449
+	push	{r0, r1, r2, r4, r5, r6, r7, lr}
+	ldr	r0, .L3449+4
+	ldrb	r1, [r3]	@ zero_extendqisi2
 	bl	printf
-	ldr	r3, [sp, #4]
-	mov	r0, #-1
-	cbnz	r3, .L3264
-	str	r0, [r6]
-.L3264:
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3265:
-	ldr	r3, .L3279+8
-	ldrb	r5, [r3]	@ zero_extendqisi2
-	lsls	r1, r5, #7
-	bl	__aeabi_uidiv
-	ldr	r1, .L3279+12
-	uxth	r7, r0
-	mov	r10, r0
-	movs	r2, #0
-	mov	r8, r1
-.L3271:
-	add	r0, r1, r2, lsl #3
-	uxth	r4, r2
-	ldr	r0, [r0, #4]
-	cmp	r0, #0
-	beq	.L3267
-	ldrh	r0, [r1, r2, lsl #3]
-	cmp	r0, r7
-	bne	.L3267
-.L3268:
-	lsls	r5, r5, #7
-	ldr	r3, [sp, #4]
-	lsls	r4, r4, #3
-	smulbb	r5, r5, r7
-	sub	r5, fp, r5
-	uxth	r5, r5
-	cbnz	r3, .L3269
-	add	r2, r8, r4
-	ldr	r1, .L3279+16
-	ldr	r2, [r2, #4]
-	ldr	r2, [r2, r5, lsl #2]
-	str	r2, [r6]
-	ldrb	r0, [r1]	@ zero_extendqisi2
-	rsb	r1, r0, #24
-	lsrs	r2, r2, r1
-	movs	r1, #1
-	lsls	r1, r1, r0
-	subs	r1, r1, #1
-	ands	r2, r2, r1
-	ldr	r1, .L3279+20
+	ldr	r1, .L3449+8
+	ldr	r5, .L3449+12
+	ldr	r0, .L3449+16
+	ldrh	r3, [r1, #2]
+	ldrb	r2, [r1, #1]	@ zero_extendqisi2
 	ldrb	r1, [r1]	@ zero_extendqisi2
-	cmp	r2, r1
-	bcc	.L3270
-	mov	r2, #-1
-	str	r2, [r6]
-.L3270:
-	add	r4, r4, r8
-	movw	r2, #32767
-	ldrh	r3, [r4, #2]
-	ubfx	r1, r3, #0, #15
-	cmp	r1, r2
-	beq	.L3274
-	adds	r3, r3, #1
-	strh	r3, [r4, #2]	@ movhi
-.L3274:
-	movs	r0, #0
-	b	.L3264
-.L3269:
-	add	r1, r8, r4
-	ldr	r0, [r6]
-	ldr	r2, [r1, #4]
-	str	r0, [r2, r5, lsl #2]
-	ldrh	r2, [r1, #2]
-	mvn	r2, r2, lsl #17
-	mvn	r2, r2, lsr #17
-	strh	r2, [r1, #2]	@ movhi
-	ldr	r2, .L3279+24
-	strb	r10, [r2]
-	b	.L3270
-.L3267:
-	adds	r2, r2, #1
-	cmp	r2, #32
-	bne	.L3271
-	bl	pm_select_ram_region
-	ldrh	r1, [r8, r0, lsl #3]
-	movw	r2, #65535
-	mov	r4, r0
-	cmp	r1, r2
-	beq	.L3272
-	add	r2, r8, r0, lsl #3
-	ldrsh	r2, [r2, #2]
-	cmp	r2, #0
-	bge	.L3272
-	bl	pm_flush_id
-.L3272:
-	ldr	r2, .L3279+28
-	mov	r1, r4
-	mov	r0, r7
-	strb	r4, [r2]
-	bl	load_l2p_region
-	b	.L3268
-.L3280:
+	bl	printf
+	ldr	r3, [r5]
+	ldr	r4, .L3449+20
+	ldr	r0, .L3449+24
+	ldrh	r2, [r3, #140]
+	ldrh	r1, [r3, #130]
+	bl	printf
+	ldr	r0, [r4]
+	ldr	r7, .L3449+28
+	ldrh	r6, [r0, #26]
+	ldrb	r3, [r0, #21]	@ zero_extendqisi2
+	ldrh	r2, [r0, #18]
+	ldrh	r1, [r0, #16]
+	str	r6, [sp, #4]
+	ldrh	r0, [r0, #22]
+	str	r0, [sp]
+	ldr	r0, .L3449+32
+	bl	printf
+	ldr	r0, [r4]
+	ldrh	r6, [r0, #58]
+	ldrb	r3, [r0, #53]	@ zero_extendqisi2
+	ldrh	r2, [r0, #50]
+	ldrh	r1, [r0, #48]
+	str	r6, [sp, #4]
+	ldrh	r0, [r0, #54]
+	ldr	r6, .L3449+36
+	str	r0, [sp]
+	ldr	r0, .L3449+40
+	bl	printf
+	ldr	r0, [r4]
+	ldrh	r4, [r0, #90]
+	ldrb	r3, [r0, #85]	@ zero_extendqisi2
+	ldrh	r2, [r0, #82]
+	ldrh	r1, [r0, #80]
+	str	r4, [sp, #4]
+	ldrh	r0, [r0, #86]
+	ldr	r4, .L3449+44
+	str	r0, [sp]
+	ldr	r0, .L3449+48
+	bl	printf
+	ldrh	r2, [r6]
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	ldr	r1, .L3449+52
+	ldr	r0, .L3449+56
+	muls	r3, r2, r3
+	ldr	r1, [r1]
+	movs	r2, #4
+	lsls	r3, r3, #1
+	bl	rknand_print_hex
+	ldr	r1, .L3449+60
+	movs	r2, #2
+	ldrh	r3, [r7]
+	ldr	r0, .L3449+64
+	ldr	r1, [r1]
+	bl	rknand_print_hex
+	ldr	r1, [r5]
+	movs	r2, #4
+	ldr	r0, .L3449+68
+	ldrh	r3, [r1, #698]
+	add	r1, r1, #704
+	bl	rknand_print_hex
+	ldr	r1, .L3449+72
+	movs	r2, #4
+	ldrh	r3, [r7]
+	ldr	r0, .L3449+76
+	ldr	r1, [r1]
+	bl	rknand_print_hex
+	mov	r3, #256
+	movs	r2, #2
+	ldr	r1, .L3449+80
+	ldr	r0, .L3449+84
+	bl	rknand_print_hex
+	ldrh	r2, [r6]
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	ldr	r1, .L3449+88
+	ldr	r0, .L3449+92
+	muls	r3, r2, r3
+	ldr	r1, [r1]
+	movs	r2, #2
+	lsls	r3, r3, #1
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, r6, r7, lr}
+	b	rknand_print_hex
+.L3450:
 	.align	2
-.L3279:
-	.word	.LANCHOR122
+.L3449:
+	.word	.LANCHOR58
+	.word	.LC189
+	.word	.LANCHOR194
+	.word	.LANCHOR110
+	.word	.LC190
+	.word	.LANCHOR10
+	.word	.LC191
+	.word	.LANCHOR6
+	.word	.LC192
+	.word	.LANCHOR95
+	.word	.LC193
+	.word	.LANCHOR80
+	.word	.LC194
+	.word	.LANCHOR117
+	.word	.LC195
+	.word	.LANCHOR9
+	.word	.LC196
+	.word	.LC176
+	.word	.LANCHOR7
+	.word	.LC197
+	.word	.LANCHOR116
 	.word	.LC198
-	.word	.LANCHOR125
-	.word	.LANCHOR134
-	.word	.LANCHOR31
-	.word	.LANCHOR106
-	.word	.LANCHOR135
-	.word	.LANCHOR210
-	.size	pm_log2phys, .-pm_log2phys
-	.section	.text.gc_recovery,"ax",%progbits
+	.word	.LANCHOR118
+	.word	.LC199
+	.size	dump_ftl_info, .-dump_ftl_info
+	.section	.text.pm_ppa_update_check,"ax",%progbits
 	.align	1
-	.global	gc_recovery
+	.global	pm_ppa_update_check
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	gc_recovery, %function
-gc_recovery:
-	@ args = 0, pretend = 0, frame = 32
+	.type	pm_ppa_update_check, %function
+pm_ppa_update_check:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L3368
-	ldr	r3, .L3368+4
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r4, #0
-	ldr	r5, [r2]
-	sub	sp, sp, #64
-	mov	r8, r2
-	strb	r4, [r3]
-	ldr	r3, .L3368+8
-	ldrh	r6, [r5, #80]
-	strb	r4, [r3]
-	movw	r3, #65535
-	cmp	r6, r3
-	beq	.L3282
-	strh	r3, [r5, #130]	@ movhi
-	movs	r0, #1
-	bl	buf_alloc
-	ldrb	r3, [r5, #89]	@ zero_extendqisi2
-	mov	r6, r0
-	ldr	r2, .L3368+12
-	ldr	r7, .L3368+16
-	add	r3, r5, r3, lsl #1
-	ldrh	r2, [r2]
-	ldrb	r1, [r7]	@ zero_extendqisi2
-	ldrh	r3, [r3, #94]
-	cmp	r1, #2
-	mul	r2, r2, r3
-	str	r2, [sp, #56]
-	beq	.L3283
-	ldr	r3, .L3368+20
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #0
-	beq	.L3284
-.L3283:
-	ldr	r3, .L3368+24
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r7, r2
+	ldr	r2, .L3458
+	mov	r5, r0
+	mov	r6, r1
+	ldr	r3, .L3458+4
+	ldrb	r4, [r2]	@ zero_extendqisi2
 	ldrh	r3, [r3]
-	subs	r3, r3, #1
-	add	r3, r3, r2
-	orr	r3, r3, r1, lsl #24
-.L3366:
-	str	r3, [r6, #24]
-.L3285:
-	movs	r1, #1
-	mov	r0, r6
-	bl	sblk_read_page
-	ldr	r3, [r6, #36]
-	adds	r2, r3, #1
-	beq	.L3286
-	cmp	r3, #512
-	beq	.L3286
-	ldr	r3, [r6, #12]
-	ldr	r2, [r3]
-	ldr	r3, .L3368+28
-	cmp	r2, r3
-	beq	.L3287
-.L3286:
-	mov	r0, r6
-	movs	r4, #0
-	bl	zbuf_free
-	ldr	r2, [r6, #12]
-	ldr	r3, [r6, #4]
-	ldr	r0, .L3368+32
-	ldr	r1, [r2, #12]
-	str	r1, [sp, #24]
-	ldr	r1, [r2, #8]
-	str	r1, [sp, #20]
-	ldr	r1, [r2, #4]
-	str	r1, [sp, #16]
-	ldr	r2, [r2]
-	str	r2, [sp, #12]
-	ldr	r2, [r3, #12]
-	str	r2, [sp, #8]
-	ldr	r2, [r3, #8]
-	str	r2, [sp, #4]
-	ldr	r2, [r3, #4]
-	str	r2, [sp]
+	rsb	r4, r4, #24
+	subs	r0, r4, r3
+	movs	r4, #1
+	lsls	r4, r4, r0
+	lsr	r0, r7, r3
+	ldr	r3, .L3458+8
+	subs	r4, r4, #1
+	ands	r0, r0, r4
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	ldr	r3, .L3458+12
+	uxth	r0, r0
 	ldr	r3, [r3]
-	ldr	r2, [r6, #36]
-	ldr	r1, [r6, #24]
-	bl	printf
-	ldr	r3, .L3368+36
-	ldrh	r2, [r5, #80]
-	ldr	r3, [r3]
-	strh	r4, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, [r8]
-.L3367:
-	ldrh	r2, [r5, #80]
-	strh	r2, [r3, #130]	@ movhi
-.L3288:
-	ldr	r3, .L3368+36
-	ldrh	r0, [r5, #80]
-	ldr	r3, [r3]
-	ldrh	r3, [r3, r0, lsl #1]
-	cbnz	r3, .L3323
-	bl	ftl_dump_write_open_sblk
-.L3323:
-	mov	r2, r4
-	ldrh	r1, [r5, #80]
-	movw	r4, #65535
-	ldr	r0, .L3368+40
+	add	r0, r3, r0, lsl #2
+	ldrb	r3, [r0, #2]	@ zero_extendqisi2
+	lsrs	r3, r3, #5
+	cmp	r3, #1
+	beq	.L3452
+	cmp	r3, #7
+	bne	.L3454
+.L3452:
+	mov	r3, r7
+	mov	r2, r6
+	mov	r1, r5
+	ldr	r0, .L3458+16
 	bl	printf
-	strh	r4, [r5, #80]	@ movhi
-	bl	pm_flush
-	bl	ftl_ext_info_flush
-	ldr	r3, .L3368
-	ldr	r2, [r3]
-	ldrh	r0, [r2, #130]
-	cmp	r0, r4
-	mov	r4, r3
-	beq	.L3324
-	bl	ftl_free_sblk
-.L3324:
-	ldr	r3, .L3368+44
+	bl	dump_ftl_info
+	mov	r0, #-1
+	pop	{r3, r4, r5, r6, r7, pc}
+.L3454:
 	movs	r0, #0
-	ldr	r2, [r3]
-	movw	r3, #65535
-	strh	r3, [r2, #126]	@ movhi
-	ldr	r2, [r4]
-	strh	r3, [r2, #130]	@ movhi
-	bl	ftl_info_flush
-.L3281:
-	add	sp, sp, #64
+	pop	{r3, r4, r5, r6, r7, pc}
+.L3459:
+	.align	2
+.L3458:
+	.word	.LANCHOR32
+	.word	.LANCHOR75
+	.word	.LANCHOR76
+	.word	.LANCHOR7
+	.word	.LC200
+	.size	pm_ppa_update_check, .-pm_ppa_update_check
+	.section	.text.load_l2p_region,"ax",%progbits
+	.align	1
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	load_l2p_region, %function
+load_l2p_region:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	cmp	r1, #31
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r5, r0
+	mov	r7, r1
+	bls	.L3461
+	movs	r2, #32
+	ldr	r1, .L3484
+	ldr	r0, .L3484+4
+	bl	printf
+.L3461:
+	ldr	r6, .L3484+8
+	ldr	r3, [r6]
+	mov	r10, r6
+	ldrh	r2, [r3, #698]
+	cmp	r2, r5
+	bcs	.L3462
+	mov	r1, r5
+	ldr	r0, .L3484+12
+	bl	printf
+	ldr	r3, .L3484+16
+	movs	r4, #0
+	movs	r1, #255
+	ldr	r0, [r4, #4]
+	ldrh	r2, [r3]
+	bl	ftl_memset
+	ldr	r3, [r6]
+	ldrh	r3, [r3, #698]
+	cmp	r3, r5
+	bcc	.L3463
+.L3482:
+	movs	r0, #0
+.L3460:
+	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3284:
-	cmp	r1, #3
-	bne	.L3285
-	ldr	r3, .L3368+48
-	ldrh	r3, [r3]
-	subs	r3, r3, #1
-	add	r3, r3, r2
-	orr	r3, r3, #50331648
-	b	.L3366
-.L3287:
-	ldr	fp, .L3368+24
-	ldr	r10, .L3368+72
-	ldr	r1, [r6, #4]
-	ldrh	r3, [fp]
-	ldrb	r2, [r10]	@ zero_extendqisi2
-	ldr	r8, .L3368+64
-	muls	r2, r3, r2
-	ldr	r3, .L3368+52
-	ldr	r0, [r3]
-	lsls	r2, r2, #2
-	bl	ftl_memcpy
-	ldrh	r3, [fp]
-	ldrb	r4, [r10]	@ zero_extendqisi2
-	muls	r4, r3, r4
-	ldr	r3, .L3368+56
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	lsls	r2, r4, #2
-	cmp	r3, r4, asr #6
-	bge	.L3289
-	movs	r1, #0
-	ldr	r0, [r8]
-	rsb	r4, r4, r3, lsl #7
-	bl	ftl_memset
-	ldrh	r1, [fp]
-	lsls	r4, r4, #2
-	ldrb	r3, [r10]	@ zero_extendqisi2
+.L3463:
+	movs	r2, #37
+.L3483:
+	ldr	r1, .L3484
+	ldr	r0, .L3484+4
+	bl	printf
+	b	.L3482
+.L3462:
+	ldr	r6, .L3484+20
+	add	r2, r5, #176
+	ldr	r4, [r3, r2, lsl #2]
+	movs	r3, #0
+	strh	r5, [r6, r7, lsl #3]	@ movhi
+	lsls	r7, r7, #3
+	add	fp, r6, r7
+	strh	r3, [fp, #2]	@ movhi
+	cbnz	r4, .L3465
 	mov	r2, r4
-	ldr	r0, [r8]
-	muls	r3, r1, r3
-	ldr	r1, [r6, #4]
-	add	r1, r1, r3, lsl #2
-	bl	ftl_memcpy
-	movs	r3, #1
-	str	r3, [sp, #44]
-.L3290:
-	ldr	r3, .L3368+48
-	ldrh	r3, [r3]
-	str	r3, [sp, #36]
-	ldrb	r3, [r7]	@ zero_extendqisi2
-	cmp	r3, #2
-	str	r3, [sp, #32]
-	bne	.L3291
-	ldr	r3, .L3368+60
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L3292
-.L3291:
-	ldr	r3, .L3368+20
+	mov	r1, r5
+	ldr	r0, .L3484+24
+	bl	printf
+	ldr	r3, .L3484+16
+	movs	r1, #255
+	ldr	r0, [fp, #4]
+	ldrh	r2, [r3]
+	bl	ftl_memset
+	b	.L3482
+.L3465:
+	ldr	r8, .L3484+32
+	mov	r0, r4
+	ldr	r3, .L3484+28
+	ldr	r1, [fp, #4]
+	ldr	r2, [r8]
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L3293
-.L3292:
-	ldr	r3, [sp, #32]
-	ldr	r2, [sp, #36]
-	muls	r3, r2, r3
-	str	r3, [sp, #36]
-	movs	r3, #1
-	str	r3, [sp, #32]
-.L3293:
-	movs	r7, #0
-	str	r7, [sp, #40]
-.L3294:
-	ldr	r3, [sp, #36]
-	cmp	r3, r7
-	bls	.L3306
-	mov	fp, #0
-	b	.L3307
-.L3289:
-	ldr	r1, [r6, #4]
-	ldr	r0, [r8]
-	add	r1, r1, r2
-	bl	ftl_memcpy
-	movs	r3, #0
-	str	r3, [sp, #44]
-	mov	r4, r3
-	b	.L3290
-.L3302:
-	ldr	r3, [sp, #48]
-	ldrh	r2, [r3, #96]
-	ldr	r3, .L3368+12
-	ldrh	r3, [r3]
-	muls	r3, r2, r3
-	ldr	r2, .L3368+16
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	str	r3, [sp, #56]
-	cmp	r1, #2
-	beq	.L3295
-	ldr	r2, .L3368+20
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cmp	r2, #0
-	beq	.L3296
-.L3295:
-	subs	r2, r7, #1
-	add	r3, r3, r2
-	add	r3, r3, r10
-	orr	r3, r3, r1, lsl #24
-.L3298:
-	str	r3, [r6, #24]
-	movs	r1, #1
-	mov	r0, r6
-	bl	sblk_read_page
-	ldr	r3, [sp, #44]
-	cbz	r3, .L3299
-	ldr	r3, .L3368+64
-	ldr	r3, [r3]
-	ldr	r2, [r3, r8]
-	cbnz	r2, .L3299
-	ldr	r2, [r6, #12]
-	ldr	r2, [r2, #8]
-	str	r2, [r3, r8]
-.L3299:
-	ldr	r3, .L3368+52
-	ldr	r2, [r6, #12]
-	ldr	r3, [r3]
-	ldr	r1, [r2, #4]
-	ldr	r3, [r3, r8]
-	cmp	r3, r1
-	bne	.L3300
-	ldr	r0, .L3368+64
-	ldr	r0, [r0]
-	ldr	ip, [r0, r8]
-	ldr	r0, [r2, #8]
-	cmp	ip, r0
-	beq	.L3301
-.L3300:
-	ldr	r0, [r2, #12]
-	str	r0, [sp, #16]
-	ldr	r0, [r2, #8]
-	str	r1, [sp, #8]
-	str	r0, [sp, #12]
-	ldr	r2, [r2]
-	ldr	r0, .L3368+68
-	str	r2, [sp, #4]
-	ldr	r2, .L3368+64
+	bl	ftl_read_ppa_page
+	ldr	r2, [r8]
+	mov	r3, r0
 	ldr	r2, [r2]
-	ldr	r2, [r2, r8]
-	str	r2, [sp]
-	ldr	r2, [r6, #36]
-	ldr	r1, [r6, #24]
-	bl	printf
-	ldr	r3, .L3368+52
+	cmp	r2, r5
+	bne	.L3466
+	adds	r1, r0, #1
+	beq	.L3466
+	cmp	r0, #512
+	beq	.L3466
+.L3471:
+	ldr	r3, .L3484+32
 	ldr	r3, [r3]
-	ldr	r3, [r3, r8]
-	adds	r3, r3, #1
-	beq	.L3301
-	mov	r0, r6
-	bl	zbuf_free
-	ldr	r3, .L3368+36
-	movs	r1, #0
-	ldrh	r2, [r5, #80]
 	ldr	r3, [r3]
-	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L3368
+	cmp	r5, r3
+	beq	.L3482
+	movs	r2, #73
+	b	.L3483
+.L3466:
+	mov	r1, r5
+	str	r4, [sp]
+	ldr	r0, .L3484+36
+	add	r8, r6, r7
+	bl	printf
+	ldr	r1, [r10]
+	movs	r2, #4
+	ldr	r10, .L3484+28
+	ldr	r0, .L3484+40
+	ldrh	r3, [r1, #698]
+	add	r1, r1, #704
+	bl	rknand_print_hex
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	movs	r2, #4
+	ldr	fp, .L3484+32
+	ldr	r1, [r8, #4]
+	ldr	r0, .L3484+44
+	lsls	r3, r3, #7
+	bl	rknand_print_hex
+	movs	r3, #16
+	movs	r2, #4
+	ldr	r1, [fp]
+	ldr	r0, .L3484+48
+	bl	rknand_print_hex
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	mov	r0, r4
+	ldr	r2, [fp]
+	ldr	r1, [r8, #4]
+	bl	ftl_read_ppa_page
+	adds	r3, r0, #1
+	beq	.L3469
+	cmp	r0, #512
+	bne	.L3470
+.L3469:
+	ldr	r3, .L3484+16
+	add	r6, r6, r7
+	movs	r1, #255
+	ldr	r0, [r6, #4]
+	ldrh	r2, [r3]
+	bl	ftl_memset
+.L3472:
+	mov	r0, #-1
+	b	.L3460
+.L3470:
+	ldr	r3, [fp]
 	ldr	r3, [r3]
-	b	.L3367
-.L3296:
-	cmp	r1, #3
-	add	r3, r3, r7
-	it	eq
-	orreq	r3, r3, r10, lsl #24
-	b	.L3298
-.L3369:
+	cmp	r5, r3
+	beq	.L3471
+	b	.L3472
+.L3485:
 	.align	2
-.L3368:
-	.word	.LANCHOR10
-	.word	.LANCHOR78
-	.word	.LANCHOR153
-	.word	.LANCHOR105
-	.word	.LANCHOR73
-	.word	.LANCHOR35
-	.word	.LANCHOR79
-	.word	-178307901
-	.word	.LC199
-	.word	.LANCHOR9
+.L3484:
+	.word	.LANCHOR220
+	.word	.LC0
+	.word	.LANCHOR110
 	.word	.LC201
-	.word	.LANCHOR104
-	.word	.LANCHOR87
-	.word	.LANCHOR155
-	.word	.LANCHOR125
-	.word	.LANCHOR74
-	.word	.LANCHOR156
-	.word	.LC200
-	.word	.LANCHOR80
-.L3301:
-	ldr	r3, [sp, #40]
-	add	r10, r10, #1
-	add	r8, r8, #4
-	adds	r3, r3, #1
-	str	r3, [sp, #40]
-.L3304:
-	ldr	r3, [sp, #32]
-	cmp	r3, r10
-	bcs	.L3302
-	add	fp, fp, #1
-.L3307:
-	ldrb	r3, [r5, #89]	@ zero_extendqisi2
-	cmp	fp, r3
-	bge	.L3303
-	ldr	r3, [sp, #40]
-	mov	r10, #1
-	lsl	r8, r3, #2
-	add	r3, r5, fp, lsl #1
-	str	r3, [sp, #48]
-	b	.L3304
-.L3303:
-	ldr	r3, .L3370
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L3305
-	adds	r7, r7, #1
-.L3305:
-	adds	r7, r7, #1
-	b	.L3294
-.L3306:
-	mov	r0, r6
-	movs	r4, #0
-	bl	zbuf_free
-	ldr	r3, .L3370+4
-	mov	fp, r4
-	ldr	r0, .L3370+8
-	mov	r10, r4
-	ldrh	r1, [r5, #80]
-	ldr	r2, [r3]
-	ldrh	r0, [r0]
-	ldrb	r3, [r5, #89]	@ zero_extendqisi2
-	smulbb	r3, r3, r0
-	strh	r3, [r2, r1, lsl #1]	@ movhi
-.L3308:
-	ldr	r3, [sp, #36]
-	cmp	r3, fp
-	bls	.L3321
-	mov	r8, #0
-	b	.L3322
-.L3317:
-	ldr	r3, .L3370+12
-	ldr	r2, [r3]
-	ldr	r3, [r2, r10, lsl #2]
-	str	r3, [sp, #40]
-	adds	r3, r3, #1
-	beq	.L3309
-	ldr	r3, .L3370+16
-	ldr	r0, [sp, #40]
-	ldr	r2, [r3]
-	ldr	r3, [r2, r10, lsl #2]
-	str	r3, [sp, #44]
-	bl	lpa_hash_get_ppa
-	str	r0, [sp, #60]
-	adds	r0, r0, #1
-	bne	.L3310
-	movs	r2, #0
-	add	r1, sp, #60
-	ldr	r0, [sp, #40]
-	bl	pm_log2phys
-.L3310:
-	ldr	r3, [sp, #48]
-	ldr	r1, .L3370+20
-	ldrh	r2, [r3, #96]
-	ldrh	r1, [r1]
-	muls	r2, r1, r2
-	ldr	r1, .L3370+24
-	ldrb	r0, [r1]	@ zero_extendqisi2
-	cmp	r0, #2
-	beq	.L3311
-	ldr	r1, .L3370+28
-	ldrb	r1, [r1]	@ zero_extendqisi2
-	cmp	r1, #0
-	beq	.L3312
-.L3311:
-	add	r1, fp, #-1
-	add	r2, r2, r1
-	add	r2, r2, r7
-	orr	r2, r2, r0, lsl #24
-.L3314:
-	str	r2, [sp, #56]
-	ldr	r2, .L3370+32
-	ldr	r3, [sp, #44]
-	ldr	r1, .L3370+36
-	ldrh	r0, [r2]
-	ldr	r2, .L3370+40
-	ldrb	r1, [r1]	@ zero_extendqisi2
-	ldrb	r6, [r2]	@ zero_extendqisi2
-	movs	r2, #1
-	str	r2, [sp, #52]
-	rsb	r6, r6, #24
-	subs	r6, r6, r0
-	lsr	r0, r3, r0
-	lsl	r6, r2, r6
-	subs	r6, r6, #1
-	ands	r0, r0, r6
-	bl	__aeabi_uidiv
-	ldr	r1, [sp, #60]
-	mov	r6, r0
-	ldr	r3, [sp, #44]
-	ldr	r2, [sp, #52]
-	cmp	r3, r1
-	bne	.L3315
-	add	r1, sp, #56
-	ldr	r0, [sp, #40]
-	bl	pm_log2phys
-	uxth	r0, r6
-	adds	r4, r4, #1
-	bl	ftl_vpn_decrement
-.L3316:
-	ldr	r2, .L3370+44
-	uxth	r6, r6
-	add	r10, r10, #1
-	ldr	r2, [r2]
-	add	r2, r2, r6, lsl #2
-	ldrb	r2, [r2, #2]	@ zero_extendqisi2
-	ands	r2, r2, #224
-	bne	.L3309
-	ldr	r1, .L3370+4
-	ldr	r1, [r1]
-	ldrh	r0, [r1, r6, lsl #1]
-	cbz	r0, .L3309
-	strh	r2, [r1, r6, lsl #1]	@ movhi
-.L3309:
-	adds	r7, r7, #1
-.L3319:
-	ldr	r3, [sp, #32]
-	cmp	r3, r7
-	bcs	.L3317
-	add	r8, r8, #1
-.L3322:
-	ldrb	r2, [r5, #89]	@ zero_extendqisi2
-	cmp	r8, r2
-	bge	.L3318
-	add	r3, r5, r8, lsl #1
-	movs	r7, #1
-	str	r3, [sp, #48]
-	b	.L3319
-.L3312:
-	cmp	r0, #3
-	add	r2, r2, fp
-	it	eq
-	orreq	r2, r2, r7, lsl #24
-	b	.L3314
-.L3315:
-	ldr	r2, [sp, #56]
-	cmp	r1, r2
-	it	eq
-	addeq	r4, r4, #1
-	b	.L3316
-.L3318:
-	ldr	r2, .L3370
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbz	r2, .L3320
-	add	fp, fp, #1
-.L3320:
-	add	fp, fp, #1
-	b	.L3308
-.L3321:
-	ldr	r3, .L3370+4
-	ldrh	r2, [r5, #80]
-	ldr	r3, [r3]
-	strh	r4, [r3, r2, lsl #1]	@ movhi
-	ldrh	r0, [r5, #80]
-	bl	zftl_insert_data_list
-	b	.L3288
-.L3282:
-	ldrh	r3, [r5, #130]
-	cmp	r3, r6
-	beq	.L3281
-	ldr	r5, .L3370+48
-	ldr	r2, [r5]
-	ldrh	r2, [r2, #126]
-	cmp	r2, r3
-	bne	.L3326
-	bl	pm_flush
-	ldr	r3, [r8]
-	ldrh	r0, [r3, #130]
-	bl	ftl_free_sblk
-	ldr	r3, [r5]
-	mov	r0, r4
-	strh	r6, [r3, #126]	@ movhi
-	bl	ftl_info_flush
-.L3326:
-	ldr	r3, [r8]
-	movw	r2, #65535
-	strh	r2, [r3, #130]	@ movhi
-	b	.L3281
-.L3371:
-	.align	2
-.L3370:
-	.word	.LANCHOR74
-	.word	.LANCHOR9
-	.word	.LANCHOR79
-	.word	.LANCHOR155
-	.word	.LANCHOR156
-	.word	.LANCHOR105
-	.word	.LANCHOR73
-	.word	.LANCHOR35
-	.word	.LANCHOR68
-	.word	.LANCHOR69
-	.word	.LANCHOR31
-	.word	.LANCHOR7
-	.word	.LANCHOR104
-	.size	gc_recovery, .-gc_recovery
-	.section	.text.zftl_init,"ax",%progbits
+	.word	.LANCHOR221
+	.word	.LANCHOR138
+	.word	.LC202
+	.word	.LANCHOR131
+	.word	.LANCHOR207
+	.word	.LC203
+	.word	.LC204
+	.word	.LC183
+	.word	.LC205
+	.size	load_l2p_region, .-load_l2p_region
+	.section	.text.pm_gc,"ax",%progbits
 	.align	1
-	.global	zftl_init
+	.global	pm_gc
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	zftl_init, %function
-zftl_init:
-	@ args = 0, pretend = 0, frame = 32
+	.type	pm_gc, %function
+pm_gc:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L3442
-	movs	r3, #255
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r4, #0
-	ldr	r10, .L3442+204
-	sub	sp, sp, #32
-	strb	r3, [r2]
-	ldr	r2, .L3442+4
-	ldr	r1, .L3442+8
-	ldr	r0, .L3442+12
-	strb	r4, [r2]
-	ldr	r2, .L3442+16
-	ldr	r7, .L3442+20
-	strb	r3, [r2]
-	ldr	r2, .L3442+24
-	strb	r4, [r2]
-	ldr	r2, .L3442+28
-	strb	r3, [r2]
-	mov	r2, #-1
-	ldr	r3, .L3442+32
-	strb	r4, [r3]
-	ldr	r3, .L3442+36
-	str	r2, [r3]
+	ldr	r4, .L3503
+	ldr	r5, .L3503+4
+	ldr	r3, [r4]
+	ldr	r6, .L3503+8
+	ldrh	r2, [r5]
+	ldrh	r1, [r3, #688]
+	subs	r2, r2, #1
+	cmp	r1, r2
+	bge	.L3487
+	ldr	r3, [r6]
+	cmp	r3, #0
+	beq	.L3488
+.L3487:
+	bl	pm_free_sblk
+	ldr	r2, [r4]
+	ldrh	r3, [r5]
+	ldrh	r1, [r2, #688]
+	subs	r3, r3, #1
+	cmp	r1, r3
+	bge	.L3489
+	ldr	r3, [r6]
+	cmp	r3, #0
+	beq	.L3488
+.L3489:
+	uxth	r0, r0
+	movw	r5, #65535
+	movs	r3, #0
+	adds	r0, r0, #208
+	str	r3, [r6]
+	ldrh	r8, [r2, r0, lsl #1]
+	cmp	r8, r5
+	bne	.L3491
+	movs	r2, #182
+	ldr	r1, .L3503+12
+	ldr	r0, .L3503+16
 	bl	printf
-	ldrb	r3, [r10, #12]	@ zero_extendqisi2
-	ldrb	r6, [r10, #9]	@ zero_extendqisi2
-	ldrh	r5, [r10, #10]
-	str	r3, [sp, #4]
-	ldr	r3, .L3442+40
-	ldrb	r2, [sp, #4]	@ zero_extendqisi2
-	mov	r0, r5
-	ldr	r1, [sp, #4]
-	lsl	fp, r6, #9
-	strb	r2, [r3]
-	uxth	fp, fp
-	ldr	r3, .L3442+44
-	strb	r6, [r3]
-	ldr	r3, .L3442+48
-	strh	r5, [r3]	@ movhi
-	bl	__aeabi_idiv
-	ldr	r2, .L3442+52
-	mov	r3, r0
-	ldrb	r1, [r10, #13]	@ zero_extendqisi2
-	ldr	ip, .L3442+208
-	ldrb	r8, [r2]	@ zero_extendqisi2
-	ldr	r2, .L3442+56
-	strh	r0, [r7]	@ movhi
-	ldrh	r10, [r10, #14]
-	strb	r8, [r2]
-	smulbb	r8, r8, r1
-	ldr	r2, .L3442+60
-	ldr	r0, .L3442+64
-	uxtb	r8, r8
-	str	r7, [sp, #12]
-	strb	r1, [r2]
-	ldr	r2, .L3442+68
-	ldr	r1, .L3442+72
-	strb	r8, [r0]
-	strh	fp, [r2]	@ movhi
-	ldr	r2, .L3442+76
-	strh	r10, [r1]	@ movhi
-	str	r0, [sp, #16]
-	ldrh	r2, [r2]
-	str	r1, [sp, #20]
-	strh	r2, [ip]	@ movhi
-	mov	ip, #1
-.L3373:
-	cmp	r2, ip
-	uxth	r1, r4
-	add	r4, r4, #1
-	bcs	.L3374
-	subs	r2, r1, #1
-	ldr	r1, .L3442+80
-	movs	r4, #1
-	strh	r2, [r1]	@ movhi
-	mul	r2, r5, r6
-	movs	r5, #0
-	mul	r0, r10, r2
-	lsrs	r7, r0, #21
-.L3375:
-	cmp	r7, r4
-	uxth	r1, r5
-	add	r5, r5, #1
-	bcs	.L3376
-	mov	r4, #1892352
-	subs	r1, r1, #1
-	mul	r4, r4, r8
-	uxth	r1, r1
-	str	r3, [sp, #24]
-	mul	r0, r8, r0
-	ldr	r7, .L3442+84
-	ldr	r5, .L3442+88
-	lsl	r3, r4, r1
-	ldr	r1, .L3442+92
-	str	r2, [sp, #28]
-	add	r4, r3, #24576
-	str	r0, [r7]
-	str	r3, [r1]
-	mov	r1, r6
-	ldr	r6, .L3442+96
-	mov	r0, r4
-	str	r4, [r5]
-	str	r3, [sp, #8]
-	bl	__aeabi_uidiv
-	add	ip, fp, #-1
-	mov	r1, fp
-	str	r0, [r6]
-	add	r0, ip, r0, lsl #2
-	ldr	fp, .L3442+156
-	bl	__aeabi_uidiv
-	ldr	r3, [sp, #24]
-	strh	r0, [fp]	@ movhi
+	bl	pm_free_sblk
+	ldr	r3, [r4]
 	uxth	r0, r0
-	lsls	r0, r0, #4
-	mul	r1, r8, r3
-	bl	__aeabi_idiv
-	ldr	r2, [sp, #28]
-	ldr	r3, .L3442+100
-	mul	r1, r8, r2
-	strh	r0, [r3]	@ movhi
-	mov	r0, r4
-	subs	r1, r1, #1
-	bl	__aeabi_uidiv
-	ldr	r3, .L3442+104
-	adds	r0, r0, #8
-	ldr	r2, .L3442+108
-	movs	r1, #48
-	ldr	ip, .L3442+212
-	strh	r0, [r3]	@ movhi
-	add	r3, r10, r10, lsl #1
-	lsr	r10, r10, #4
-	ldr	r0, .L3442+112
-	asrs	r3, r3, #2
-	ldr	r4, [sp, #4]
-	cmp	r10, #79
-	ldr	lr, .L3442+128
-	strh	r3, [r2]	@ movhi
-	it	ls
-	movls	r2, #80
-	ldr	r3, .L3442+116
-	str	fp, [sp, #24]
-	strh	r10, [r3]	@ movhi
-	mov	r10, r0
-	it	ls
-	strhls	r2, [r3]	@ movhi
-	mov	r3, #2000
-	strh	r3, [ip]	@ movhi
-	movs	r3, #50
-	strh	r3, [r0]	@ movhi
-	mov	r2, #256
-	ldr	r3, .L3442+120
-	cmp	r4, #2
-	strh	r2, [r3]	@ movhi
-	ldr	r2, .L3442+124
-	strh	r1, [r2]	@ movhi
-	mov	r1, #32
-	strh	r1, [lr]	@ movhi
-	mov	r8, r2
-	mov	lr, ip
-	beq	.L3378
-	ldr	fp, .L3442+216
-	ldrb	fp, [fp]	@ zero_extendqisi2
-	cmp	fp, #0
-	beq	.L3379
-.L3378:
-	movs	r2, #150
-	movs	r1, #12
-	strh	r2, [r10]	@ movhi
-	movs	r2, #64
-	strh	r2, [r8]	@ movhi
-	ldr	r2, .L3442+128
-	strh	r1, [r2]	@ movhi
-	ldr	r1, .L3442+132
-	ldrb	r1, [r1]	@ zero_extendqisi2
-	cbnz	r1, .L3381
-	movs	r1, #4
-	strh	r1, [r2]	@ movhi
-	mov	r2, #600
-	strh	r2, [lr]	@ movhi
-	movs	r2, #128
-	strh	r2, [r3]	@ movhi
-.L3381:
-	ldr	r3, .L3442+136
-	ldr	r2, [r3]
-	mov	r8, r3
-	tst	r2, #4096
-	beq	.L3383
-	ldr	r1, [sp, #8]
-	ldr	r0, .L3442+140
-	bl	printf
-.L3383:
-	ldr	r3, [r8]
-	lsls	r0, r3, #19
-	bpl	.L3384
-	ldr	r1, [r7]
-	ldr	r0, .L3442+144
-	bl	printf
-.L3384:
-	ldr	r3, [r8]
-	lsls	r1, r3, #19
-	bpl	.L3385
-	ldr	r1, [r6]
-	ldr	r0, .L3442+148
-	bl	printf
-.L3385:
-	ldr	r3, [r8]
-	lsls	r2, r3, #19
-	bpl	.L3386
-	ldr	r1, [r5]
-	ldr	r0, .L3442+152
-	bl	printf
-.L3386:
-	ldr	r3, [r8]
-	lsls	r3, r3, #19
-	bpl	.L3387
-	ldr	r3, .L3442+156
-	ldr	r0, .L3442+160
-	ldrh	r1, [r3]
-	bl	printf
-.L3387:
-	ldr	r3, [r8]
-	ldr	r6, .L3442+68
-	tst	r3, #4096
-	beq	.L3388
-	ldrh	r1, [r6]
-	ldr	r0, .L3442+164
-	bl	printf
-.L3388:
-	ldr	r3, [r8]
-	lsls	r7, r3, #19
-	bpl	.L3389
-	ldr	r3, .L3442+100
-	ldr	r0, .L3442+168
-	ldrh	r1, [r3]
-	bl	printf
-.L3389:
-	ldr	r3, [r8]
-	lsls	r5, r3, #19
-	bpl	.L3390
-	ldr	r3, .L3442+116
-	ldr	r0, .L3442+172
-	ldrh	r1, [r3]
-	bl	printf
-.L3390:
-	ldr	r3, [r8]
-	lsls	r4, r3, #19
-	bpl	.L3391
-	ldr	r3, .L3442+104
-	ldr	r0, .L3442+176
-	ldrh	r1, [r3]
-	bl	printf
-.L3391:
-	bl	zbuf_init
-	ldr	r3, [sp, #20]
-	movs	r0, #6
-	ldr	r5, .L3442+180
-	ldrh	r3, [r3]
-	muls	r0, r3, r0
-	bl	ftl_malloc
-	ldr	r3, .L3442+184
-	ldr	r2, [sp, #16]
-	str	r0, [r3]
-	ldr	r3, [sp, #12]
-	ldrb	r0, [r2]	@ zero_extendqisi2
-	ldrh	r3, [r3]
-	muls	r0, r3, r0
-	lsls	r0, r0, #2
-	bl	ftl_malloc
-	ldr	r3, .L3442+188
-	ldr	r2, .L3442+192
-	str	r0, [r3]
-	ldr	r3, .L3442+196
-	str	r2, [r3]
-	ldr	r3, [sp, #12]
+	adds	r0, r0, #208
+	ldrh	r8, [r3, r0, lsl #1]
+	cmp	r8, r5
+	beq	.L3488
+.L3491:
+	ldr	r5, .L3503+20
+	bl	pm_select_ram_region
+	mov	r6, r0
+	movw	r3, #65535
+	ldrh	r0, [r5, r0, lsl #3]
+	cmp	r0, r3
+	beq	.L3492
+	add	r7, r5, r6, lsl #3
+	ldr	r1, [r7, #4]
+	cbz	r1, .L3492
+	ldrsh	r3, [r7, #2]
+	cmp	r3, #0
+	bge	.L3492
+	bl	pm_write_page
+	ldrh	r3, [r7, #2]
+	ubfx	r3, r3, #0, #15
+	strh	r3, [r7, #2]	@ movhi
+.L3492:
+	movs	r7, #0
+.L3493:
+	ldr	r1, [r4]
+	uxth	fp, r7
+	ldrh	r3, [r1, #698]
+	cmp	r3, fp
+	bhi	.L3496
+	bl	pm_free_sblk
+.L3488:
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3496:
+	ldr	r3, .L3503+24
+	uxth	r10, r7
+	mov	ip, #1
 	ldrh	r0, [r3]
-	ldr	r3, [sp, #16]
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	muls	r0, r1, r0
-	ldr	r1, .L3442+200
-	add	r3, r2, r0, lsl #3
-	str	r3, [r1]
-	ldr	r1, [sp, #20]
-	ldrh	r1, [r1]
-	lsrs	r1, r1, #1
-	add	r1, r1, r0, lsl #1
-	ldr	r0, [r8]
-	add	r1, r2, r1, lsl #2
-	lsls	r0, r0, #19
-	str	r1, [r5]
-	bpl	.L3392
-	b	.L3443
-.L3444:
+	ldr	r3, .L3503+28
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	rsb	r3, r3, #24
+	subs	r3, r3, r0
+	lsl	r3, ip, r3
+	add	ip, r10, #176
+	ldr	r1, [r1, ip, lsl #2]
+	subs	r3, r3, #1
+	lsr	r0, r1, r0
+	ldr	r1, .L3503+32
+	ands	r0, r0, r3
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	uxth	r0, r0
+	cmp	r8, r0
+	bne	.L3494
+	mov	r1, r6
+	mov	r0, fp
+	bl	load_l2p_region
+	cbnz	r0, .L3495
+	add	r3, r5, r6, lsl #3
+	mov	r0, r10
+	ldr	r1, [r3, #4]
+	bl	pm_write_page
+.L3495:
+	movw	r3, #65535
+	strh	r3, [r5, r6, lsl #3]	@ movhi
+.L3494:
+	adds	r7, r7, #1
+	b	.L3493
+.L3504:
 	.align	2
-.L3442:
-	.word	.LANCHOR59
-	.word	.LANCHOR60
-	.word	.LC202
-	.word	.LC99
-	.word	.LANCHOR128
-	.word	.LANCHOR87
-	.word	.LANCHOR129
-	.word	.LANCHOR177
-	.word	.LANCHOR123
-	.word	.LANCHOR211
-	.word	.LANCHOR73
-	.word	.LANCHOR125
-	.word	.LANCHOR79
-	.word	.LANCHOR18
-	.word	.LANCHOR106
-	.word	.LANCHOR69
-	.word	.LANCHOR80
-	.word	.LANCHOR208
-	.word	.LANCHOR6
-	.word	.LANCHOR2
-	.word	.LANCHOR68
-	.word	.LANCHOR212
-	.word	.LANCHOR213
-	.word	.LANCHOR61
-	.word	.LANCHOR122
-	.word	.LANCHOR149
-	.word	.LANCHOR95
-	.word	.LANCHOR119
-	.word	.LANCHOR118
-	.word	.LANCHOR91
-	.word	.LANCHOR148
-	.word	.LANCHOR147
-	.word	.LANCHOR8
-	.word	.LANCHOR0
-	.word	.LANCHOR14
-	.word	.LC203
-	.word	.LC204
-	.word	.LC205
-	.word	.LC206
-	.word	.LANCHOR194
-	.word	.LC207
-	.word	.LC208
-	.word	.LC209
-	.word	.LC210
-	.word	.LC211
-	.word	.LANCHOR10
-	.word	.LANCHOR4
-	.word	.LANCHOR112
-	.word	ftl_ext_info_data_buffer
-	.word	.LANCHOR111
-	.word	.LANCHOR9
+.L3503:
+	.word	.LANCHOR110
+	.word	.LANCHOR155
+	.word	.LANCHOR151
+	.word	.LANCHOR222
+	.word	.LC0
+	.word	.LANCHOR138
+	.word	.LANCHOR75
 	.word	.LANCHOR32
-	.word	.LANCHOR105
-	.word	.LANCHOR120
-	.word	.LANCHOR77
-.L3443:
-	ldr	r0, .L3445
-	bl	printf
-.L3392:
-	ldr	r2, [sp, #12]
-	ldr	r1, [sp, #16]
-	ldr	r3, [sp, #20]
-	ldrh	r2, [r2]
-	ldrb	r7, [r1]	@ zero_extendqisi2
-	ldrh	r3, [r3]
-	muls	r7, r2, r7
-	ldr	r2, [sp, #24]
-	lsls	r4, r3, #2
-	ldrh	r2, [r2]
-	add	r7, r3, r7, lsl #2
-	ldr	r3, [r8]
-	lsls	r7, r7, #1
-	add	r4, r4, r2, lsl #2
-	lsls	r2, r3, #19
-	add	r7, r7, #632
-	add	r4, r4, #704
-	bpl	.L3393
-	ldrh	r3, [r6]
-	mov	r2, r4
-	mov	r1, r7
-	ldr	r0, .L3445+4
-	bl	printf
-.L3393:
-	ldrh	r3, [r6]
-	cmp	r7, r3
-	bhi	.L3394
-	cmp	r4, r3
-	bls	.L3395
-.L3394:
-.L3441:
-	b	.L3441
-.L3374:
-	lsl	ip, ip, #1
-	b	.L3373
-.L3376:
-	lsls	r4, r4, #1
-	b	.L3375
-.L3379:
-	ldr	r3, .L3445+8
-	ldrb	r3, [r3]	@ zero_extendqisi2
+	.word	.LANCHOR76
+	.size	pm_gc, .-pm_gc
+	.section	.text.pm_flush_id,"ax",%progbits
+	.align	1
+	.global	pm_flush_id
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	pm_flush_id, %function
+pm_flush_id:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L3510
+	push	{r4, lr}
+	add	r4, r3, r0, lsl #3
+	ldrh	r0, [r3, r0, lsl #3]
+	ldr	r1, [r4, #4]
+	bl	pm_write_page
+	ldrh	r3, [r4, #2]
+	ubfx	r3, r3, #0, #15
+	strh	r3, [r4, #2]	@ movhi
+	ldr	r4, .L3510+4
+	ldr	r3, [r4]
+	cbz	r3, .L3506
+	bl	pm_gc
+	movs	r3, #0
+	str	r3, [r4]
+.L3506:
+	movs	r0, #0
+	pop	{r4, pc}
+.L3511:
+	.align	2
+.L3510:
+	.word	.LANCHOR138
+	.word	.LANCHOR136
+	.size	pm_flush_id, .-pm_flush_id
+	.section	.text.pm_flush,"ax",%progbits
+	.align	1
+	.global	pm_flush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	pm_flush, %function
+pm_flush:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	movs	r4, #0
+	ldr	r5, .L3516
+.L3514:
+	add	r3, r5, r4, lsl #3
+	uxth	r0, r4
+	ldrsh	r3, [r3, #2]
 	cmp	r3, #0
-	beq	.L3381
-	mov	r3, #1200
-	strh	r1, [r0]	@ movhi
-	strh	r3, [ip]	@ movhi
-	strh	r1, [r2]	@ movhi
-	b	.L3381
-.L3395:
-	bl	sblk_init
-	bl	ftl_info_blk_init
-	adds	r3, r0, #1
-	beq	.L3372
-	bl	ftl_ext_info_init
-	bl	gc_init
-	movs	r0, #1
-	ldr	r4, .L3445+12
-	bl	pm_init
-	bl	lpa_rebuild_hash
-	ldr	r0, [r5]
-	movs	r1, #0
-	adds	r0, r0, #16
-	bl	ftl_open_sblk_recovery
-	ldr	r0, [r5]
-	add	r1, r0, #16
-	adds	r0, r0, #48
-	bl	ftl_open_sblk_recovery
-	ldr	r2, [r4]
-	ldr	r0, [r5]
-	ldr	r3, [r2, #8]
-	adds	r0, r0, #16
-	adds	r3, r3, #16
-	str	r3, [r2, #8]
-	bl	ftl_info_data_recovery
-	ldr	r0, [r5]
-	adds	r0, r0, #48
-	bl	ftl_info_data_recovery
-	ldr	r0, [r5]
-	adds	r0, r0, #80
-	bl	ftl_info_data_recovery
-	bl	gc_recovery
+	bge	.L3513
+	bl	pm_flush_id
+.L3513:
+	adds	r4, r4, #1
+	cmp	r4, #32
+	bne	.L3514
+	movs	r0, #0
+	pop	{r3, r4, r5, pc}
+.L3517:
+	.align	2
+.L3516:
+	.word	.LANCHOR138
+	.size	pm_flush, .-pm_flush
+	.section	.text.flt_sys_flush,"ax",%progbits
+	.align	1
+	.global	flt_sys_flush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flt_sys_flush, %function
+flt_sys_flush:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	bl	ftl_flush
 	bl	pm_flush
-	movs	r0, #1
-	bl	ftl_total_vpn_update
-	ldr	r3, .L3445+16
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L3397
-	ldr	r2, [r4]
-	ldr	r3, [r2, #68]
-	adds	r3, r3, #1
-	str	r3, [r2, #68]
-.L3397:
 	bl	ftl_ext_info_flush
 	movs	r0, #0
-	bl	ftl_info_flush
-	bl	print_ftl_debug_info
-	movs	r0, #0
-.L3372:
-	add	sp, sp, #32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3446:
-	.align	2
-.L3445:
-	.word	.LC212
-	.word	.LC213
-	.word	.LANCHOR35
-	.word	.LANCHOR104
-	.word	.LANCHOR185
-	.size	zftl_init, .-zftl_init
-	.section	.text.rk_ftl_init,"ax",%progbits
+	pop	{r3, lr}
+	b	ftl_info_flush
+	.size	flt_sys_flush, .-flt_sys_flush
+	.section	.text.rk_ftl_de_init,"ax",%progbits
 	.align	1
-	.global	rk_ftl_init
+	.global	rk_ftl_de_init
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	rk_ftl_init, %function
-rk_ftl_init:
+	.type	rk_ftl_de_init, %function
+rk_ftl_de_init:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, lr}
-	bl	nand_flash_init
-	mov	r4, r0
-	cbnz	r0, .L3448
-	bl	zftl_init
-	mov	r4, r0
-.L3448:
-	bl	idb_init
-	mov	r1, r4
-	ldr	r0, .L3449
-	bl	printf
-	mov	r0, r4
-	pop	{r4, pc}
-.L3450:
-	.align	2
-.L3449:
-	.word	.LC214
-	.size	rk_ftl_init, .-rk_ftl_init
-	.section	.text.gc_update_l2p_map_new,"ax",%progbits
+	push	{r3, lr}
+	bl	zftl_flash_de_init
+	bl	flt_sys_flush
+	pop	{r3, lr}
+	b	zftl_flash_de_init
+	.size	rk_ftl_de_init, .-rk_ftl_de_init
+	.section	.text.zftl_deinit,"ax",%progbits
 	.align	1
-	.global	gc_update_l2p_map_new
+	.global	zftl_deinit
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	gc_update_l2p_map_new, %function
-gc_update_l2p_map_new:
-	@ args = 0, pretend = 0, frame = 32
+	.type	zftl_deinit, %function
+zftl_deinit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	rk_ftl_de_init
+	.size	zftl_deinit, .-zftl_deinit
+	.section	.text.pm_init,"ax",%progbits
+	.align	1
+	.global	pm_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	pm_init, %function
+pm_init:
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L3485
+	ldr	r3, .L3546
+	movs	r2, #1
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #32
-	ldr	r2, .L3485+4
-	ldr	r4, [r3]
-	ldrh	r2, [r2]
-	ldr	r7, .L3485+8
-	ldrb	r1, [r4, #89]	@ zero_extendqisi2
-	str	r3, [sp, #20]
-	muls	r2, r1, r2
-	str	r2, [sp, #4]
-	ldr	r2, [r7]
-	tst	r2, #256
-	beq	.L3452
-	ldrh	r1, [r4, #80]
-	ldr	r0, .L3485+12
-	bl	printf
-.L3452:
-	ldr	r3, .L3485+16
-	movs	r6, #0
-	ldr	r1, [sp, #4]
+	movs	r4, #0
+	sub	sp, sp, #24
+	mov	r8, r0
+	movs	r0, #64
+	str	r4, [r3]
+	ldr	r3, .L3546+4
+	ldr	r6, .L3546+8
+	str	r4, [r3]
+	ldr	r3, .L3546+12
 	mov	r5, r6
-	ldrh	r2, [r4, #80]
-	ldr	r3, [r3]
-	subs	r1, r1, #1
-	strh	r1, [r3, r2, lsl #1]	@ movhi
-.L3453:
-	ldr	r3, [sp, #4]
-	cmp	r5, r3
-	bne	.L3462
-	ldr	r3, [r7]
-	ldr	r5, .L3485+16
-	tst	r3, #256
-	beq	.L3463
-	ldr	r3, [sp, #20]
-	ldrh	r0, [r4, #80]
-	ldr	r2, [r5]
-	ldr	r1, [r3]
-	mov	r3, r6
-	ldrh	r2, [r2, r0, lsl #1]
-	ldrh	r1, [r1, #80]
-	ldr	r0, .L3485+20
+	strb	r2, [r3]
+	bl	ftl_malloc
+	ldr	r3, .L3546+16
+	mov	r10, r3
+	str	r0, [r3]
+.L3523:
+	movw	r3, #65535
+	adds	r7, r6, r4
+	strh	r3, [r4, r6]	@ movhi
+	movs	r3, #0
+	strh	r3, [r7, #2]	@ movhi
+	cmp	r8, #0
+	beq	.L3522
+	ldr	r3, .L3546+20
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	lsls	r0, r0, #9
+	bl	ftl_malloc
+	str	r0, [r7, #4]
+.L3522:
+	adds	r4, r4, #8
+	cmp	r4, #256
+	bne	.L3523
+	ldr	r4, .L3546+24
+	ldr	fp, [r5, #4]
+	ldr	r8, [r10]
+	ldr	r3, [r4]
+	mov	r2, fp
+	ldrh	r1, [r3, #692]
+	ldrb	r0, [r3, #694]	@ zero_extendqisi2
+	movs	r3, #4
+	str	r3, [sp]
+	mov	r3, r8
+	bl	flash_get_last_written_page
+	ldr	r1, [r4]
+	mov	r6, r0
+	ldrh	r2, [r1, #696]
+	cmp	r2, r0
+	bgt	.L3524
+	mov	r3, r0
+	ldrh	r1, [r1, #692]
+	ldr	r0, .L3546+28
 	bl	printf
-.L3463:
-	ldrh	r2, [r4, #80]
-	ldr	r3, [r5]
-	ldrh	r3, [r3, r2, lsl #1]
-	cmp	r6, r3
-	beq	.L3464
-	mov	r2, #748
-	ldr	r1, .L3485+24
-	ldr	r0, .L3485+28
-	bl	printf
-.L3464:
-	ldrh	r2, [r4, #80]
-	ldr	r3, [r5]
-	strh	r6, [r3, r2, lsl #1]	@ movhi
-	ldrh	r0, [r4, #80]
-	bl	zftl_insert_data_list
-	add	sp, sp, #32
+	ldr	r3, [r4]
+	ldrsh	r7, [r3, #696]
+.L3525:
+	cmp	r7, r6
+	ble	.L3528
+	ldr	r3, .L3546+32
+	movs	r2, #1
+	add	r6, r6, r2
+	strb	r2, [r3]
+	ldr	r3, [r4]
+	strh	r6, [r3, #696]	@ movhi
+	bl	pm_free_sblk
+.L3524:
+	ldr	r3, .L3546+36
+	movs	r1, #255
+	ldr	r0, [r5, #4]
+	ldrh	r2, [r3]
+	bl	ftl_memset
+	ldr	r1, [r5, #4]
+	mov	r0, #-1
+	bl	pm_write_page
+	ldr	r3, .L3546+32
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L3529
+	ldr	r1, [r5, #4]
+	mov	r0, #-1
+	bl	pm_write_page
+	ldr	r1, [r5, #4]
+	mov	r0, #-1
+	bl	pm_write_page
+	ldr	r1, [r5, #4]
+	mov	r0, #-1
+	bl	pm_write_page
+.L3529:
+	bl	pm_free_sblk
+	bl	pm_gc
+	movs	r0, #0
+	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3462:
-	ldr	r3, .L3485+32
-	lsl	r8, r5, #2
-	ldr	r3, [r3]
-	ldr	r10, [r3, r5, lsl #2]
-	cmp	r10, #-1
-	beq	.L3454
-	ldr	r3, .L3485+36
-	mov	r0, r10
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	lsls	r1, r1, #7
-	bl	__aeabi_uidiv
-	uxth	r3, r0
-	str	r3, [sp, #16]
-	ldr	r3, [r7]
-	lsls	r1, r3, #23
-	bpl	.L3455
-	mov	r3, r5
-	mov	r2, r10
-	ldr	r1, [sp, #16]
-	ldr	r0, .L3485+40
+.L3528:
+	ldr	r3, [r4]
+	ldr	r1, .L3546+40
+	ldrh	r2, [r3, #692]
+	ldrh	r1, [r1]
+	ldrb	r0, [r3, #694]	@ zero_extendqisi2
+	ldr	r3, .L3546+20
+	mla	r2, r1, r2, r7
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r2, [sp, #12]
+	mov	r2, fp
+	str	r3, [sp]
+	mov	r3, r8
+	ldr	r1, [sp, #12]
+	bl	flash_read_page_en
+	ldr	r3, [r4]
+	mov	r10, r0
+	ldr	r0, .L3546+44
+	ldr	r2, [r3, #48]
+	adds	r2, r2, #1
+	str	r2, [r3, #48]
+	ldrh	r3, [r3, #694]
+	ldr	r2, [sp, #12]
+	ldr	r1, [r8]
 	bl	printf
-.L3455:
-	ldr	fp, .L3485+32
-	str	r5, [sp, #12]
-.L3461:
-	ldr	r3, [fp]
-	ldr	r10, [r3, r8]
 	cmp	r10, #-1
-	beq	.L3456
-	ldr	r3, .L3485+36
-	mov	r0, r10
+	beq	.L3526
+	cmp	r10, #512
+	beq	.L3526
+	ldr	r2, [r4]
+	ldr	r10, [r8]
+	ldrh	r3, [r2, #698]
+	cmp	r10, r3
+	bcs	.L3526
+	ldr	r3, [r8, #8]
+	str	r3, [sp, #20]
+	cbz	r3, .L3527
+	ldr	r3, .L3546+20
+	mov	r0, fp
+	str	r2, [sp, #16]
 	ldrb	r1, [r3]	@ zero_extendqisi2
-	lsls	r1, r1, #7
-	bl	__aeabi_uidiv
-	ldr	r3, [sp, #16]
-	uxth	r0, r0
+	lsls	r1, r1, #9
+	bl	js_hash
+	ldr	r3, [sp, #20]
+	ldr	r2, [sp, #16]
 	cmp	r3, r0
-	bne	.L3456
-	ldr	r3, .L3485+44
-	mov	r0, r10
-	ldr	r3, [r3]
-	ldr	r3, [r3, r8]
-	str	r3, [sp, #8]
-	bl	lpa_hash_get_ppa
-	str	r0, [sp, #28]
-	adds	r0, r0, #1
-	bne	.L3457
-	movs	r2, #0
-	add	r1, sp, #28
-	mov	r0, r10
-	bl	pm_log2phys
-.L3457:
-	ldr	r3, [sp, #28]
-	ldr	r2, [sp, #8]
-	cmp	r2, r3
-	bne	.L3458
-	ldr	r3, .L3485+48
-	add	r1, sp, #32
-	movs	r2, #1
-	mov	r0, r10
-	adds	r6, r6, #1
-	ldr	r3, [r3]
-	ldr	r3, [r3, r8]
-	str	r3, [r1, #-8]!
-	bl	pm_log2phys
-	ldr	r3, .L3485+52
-	ldrh	r2, [r3]
-	ldr	r3, .L3485+56
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	rsb	r3, r3, #24
-	subs	r0, r3, r2
-	movs	r3, #1
-	lsls	r3, r3, r0
-	ldr	r0, [sp, #8]
-	subs	r3, r3, #1
-	lsrs	r0, r0, r2
-	ldr	r2, .L3485+60
-	ands	r0, r0, r3
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	bl	__aeabi_uidiv
-	uxth	r0, r0
-.L3484:
-	bl	ftl_vpn_decrement
-	ldr	r3, [fp]
-	mov	r2, #-1
-	str	r2, [r3, r8]
-.L3456:
-	ldr	r3, [sp, #12]
-	add	r8, r8, #4
-	adds	r3, r3, #1
-	str	r3, [sp, #12]
-	ldr	r2, [sp, #12]
-	ldr	r3, [sp, #4]
-	cmp	r3, r2
-	bne	.L3461
-.L3454:
-	adds	r5, r5, #1
-	b	.L3453
-.L3458:
-	ldr	r2, [r7]
-	lsls	r2, r2, #23
-	bpl	.L3460
-	ldr	r2, [sp, #8]
-	mov	r1, r10
-	ldr	r0, .L3485+64
+	beq	.L3527
+	mov	r1, r3
+	ldr	r0, .L3546+48
 	bl	printf
-.L3460:
-	ldrh	r0, [r4, #80]
-	b	.L3484
-.L3486:
+.L3526:
+	adds	r7, r7, #1
+	sxth	r7, r7
+	b	.L3525
+.L3527:
+	ldr	r3, [sp, #12]
+	add	r10, r10, #176
+	str	r3, [r2, r10, lsl #2]
+	b	.L3526
+.L3547:
 	.align	2
-.L3485:
-	.word	.LANCHOR10
-	.word	.LANCHOR79
-	.word	.LANCHOR14
-	.word	.LC215
-	.word	.LANCHOR9
-	.word	.LC218
-	.word	.LANCHOR214
-	.word	.LC0
-	.word	.LANCHOR155
-	.word	.LANCHOR125
-	.word	.LC216
-	.word	.LANCHOR156
-	.word	.LANCHOR157
-	.word	.LANCHOR68
-	.word	.LANCHOR31
-	.word	.LANCHOR69
-	.word	.LC217
-	.size	gc_update_l2p_map_new, .-gc_update_l2p_map_new
-	.section	.text.gc_scan_src_blk_one_page,"ax",%progbits
+.L3546:
+	.word	.LANCHOR151
+	.word	.LANCHOR136
+	.word	.LANCHOR138
+	.word	.LANCHOR208
+	.word	.LANCHOR207
+	.word	.LANCHOR131
+	.word	.LANCHOR110
+	.word	.LC206
+	.word	.LANCHOR198
+	.word	.LANCHOR221
+	.word	.LANCHOR111
+	.word	.LC207
+	.word	.LC208
+	.size	pm_init, .-pm_init
+	.section	.text.pm_log2phys,"ax",%progbits
 	.align	1
-	.global	gc_scan_src_blk_one_page
+	.global	pm_log2phys
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	gc_scan_src_blk_one_page, %function
-gc_scan_src_blk_one_page:
-	@ args = 0, pretend = 0, frame = 16
+	.type	pm_log2phys, %function
+pm_log2phys:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r1, #0
-	ldr	r4, .L3517
-	mov	r0, r1
-	movw	r5, #65535
-	ldr	r6, .L3517+4
-	ldrb	r3, [r4, #4]	@ zero_extendqisi2
-	ldrb	ip, [r6]	@ zero_extendqisi2
-	add	r2, r4, r3, lsl #1
-	ldrh	r7, [r2, #36]
-	ldrh	r2, [r4, #2]
-.L3488:
-	cmp	r7, r5
-	beq	.L3490
-	cbz	r0, .L3491
-	strh	r2, [r4, #2]	@ movhi
-.L3491:
-	cbz	r1, .L3492
-	strb	r3, [r4, #4]
-.L3492:
-	ldr	r8, .L3517+20
-	movs	r0, #1
-	ldr	r10, .L3517+24
-	mov	fp, #1
-	bl	buf_alloc
-	mov	r5, r0
-.L3493:
-	ldrb	r1, [r4, #6]	@ zero_extendqisi2
-	cmp	fp, r1
-	ble	.L3502
-	mov	r0, r5
-	bl	zbuf_free
-	ldrb	r3, [r4, #4]	@ zero_extendqisi2
-	ldrb	r2, [r6]	@ zero_extendqisi2
-	adds	r3, r3, #1
-	uxtb	r3, r3
-	cmp	r2, r3
-	strb	r3, [r4, #4]
-	bne	.L3487
-	ldrh	r3, [r4, #2]
-	adds	r3, r3, #1
-	strh	r3, [r4, #2]	@ movhi
-	movs	r3, #0
-	strb	r3, [r4, #4]
-.L3487:
-	add	sp, sp, #16
+	ldr	r3, .L3563
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	fp, r0
+	str	r2, [sp, #4]
+	mov	r6, r1
+	ldr	r2, [r3]
+	cmp	r0, r2
+	bcc	.L3549
+	mov	r1, r0
+	ldr	r0, .L3563+4
+	bl	printf
+	ldr	r3, [sp, #4]
+	mov	r0, #-1
+	cbnz	r3, .L3548
+	str	r0, [r6]
+.L3548:
+	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3490:
-	adds	r3, r3, #1
-	uxtb	r3, r3
-	cmp	r3, ip
-	itt	eq
-	moveq	r3, #0
-	addeq	r2, r2, #1
-	add	r1, r4, r3, lsl #1
-	it	eq
-	uxtheq	r2, r2
-	ldrh	r7, [r1, #36]
-	it	eq
-	moveq	r0, #1
+.L3549:
+	ldr	r3, .L3563+8
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	lsls	r1, r5, #7
+	bl	__aeabi_uidiv
+	ldr	r1, .L3563+12
+	uxth	r7, r0
+	mov	r10, r0
+	movs	r2, #0
+	mov	r8, r1
+.L3555:
+	add	r0, r1, r2, lsl #3
+	uxth	r4, r2
+	ldr	r0, [r0, #4]
+	cmp	r0, #0
+	beq	.L3551
+	ldrh	r0, [r1, r2, lsl #3]
+	cmp	r0, r7
+	bne	.L3551
+.L3552:
+	lsls	r5, r5, #7
+	ldr	r3, [sp, #4]
+	lsls	r4, r4, #3
+	smulbb	r5, r5, r7
+	sub	r5, fp, r5
+	uxth	r5, r5
+	cbnz	r3, .L3553
+	add	r2, r8, r4
+	ldr	r1, .L3563+16
+	ldr	r2, [r2, #4]
+	ldr	r2, [r2, r5, lsl #2]
+	str	r2, [r6]
+	ldrb	r0, [r1]	@ zero_extendqisi2
+	rsb	r1, r0, #24
+	lsrs	r2, r2, r1
 	movs	r1, #1
-	b	.L3488
-.L3502:
-	ldrh	r3, [r8]
-	cmp	r1, #2
-	mul	r2, r7, r3
-	beq	.L3494
-	cmp	r1, #3
-	bne	.L3495
-	ldr	r3, .L3517+8
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #0
-	beq	.L3496
-.L3494:
+	lsls	r1, r1, r0
+	subs	r1, r1, #1
+	ands	r2, r2, r1
+	ldr	r1, .L3563+20
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	cmp	r2, r1
+	bcc	.L3554
+	mov	r2, #-1
+	str	r2, [r6]
+.L3554:
+	add	r4, r4, r8
+	movw	r2, #32767
 	ldrh	r3, [r4, #2]
-	add	r3, r2, r3, lsl #1
-	ldrb	r2, [r10]	@ zero_extendqisi2
-	subs	r3, r3, #1
-	add	r3, r3, fp
-	orr	r3, r3, r2, lsl #24
-.L3516:
-	str	r3, [r5, #24]
-	movs	r1, #1
-	mov	r0, r5
-	bl	sblk_read_page
-	ldr	r3, [r5, #36]
-	adds	r2, r3, #1
-	beq	.L3499
-	cmp	r3, #512
-	beq	.L3499
-	ldr	r3, [r5, #12]
-	ldr	r3, [r3, #4]
-	mov	r0, r3
-	str	r3, [sp, #4]
-	bl	lpa_hash_get_ppa
-	str	r0, [sp, #12]
-	adds	r0, r0, #1
-	ldr	r3, [sp, #4]
-	bne	.L3501
-	ldr	r2, .L3517+12
-	ldr	r2, [r2]
-	cmp	r3, r2
-	bcs	.L3501
-	movs	r2, #0
-	add	r1, sp, #12
-	mov	r0, r3
-	bl	pm_log2phys
-.L3501:
-	ldr	r2, [r5, #24]
-	ldr	r3, [sp, #12]
-	cmp	r2, r3
-	bne	.L3499
-	ldr	r1, .L3517+16
-	ldrh	r3, [r4, #20]
-	ldr	r1, [r1]
-	str	r2, [r1, r3, lsl #2]
-	adds	r3, r3, #1
-	strh	r3, [r4, #20]	@ movhi
-.L3499:
-	ldrh	r3, [r4, #22]
-	add	fp, fp, #1
+	ubfx	r1, r3, #0, #15
+	cmp	r1, r2
+	beq	.L3558
 	adds	r3, r3, #1
-	strh	r3, [r4, #22]	@ movhi
-	b	.L3493
-.L3496:
-	ldrh	r3, [r4, #2]
-	add	r3, r3, r2
-	orr	r3, r3, fp, lsl #24
-	b	.L3516
-.L3495:
-	ldrh	r3, [r4, #2]
-	add	r3, r3, r2
-	b	.L3516
-.L3518:
+	strh	r3, [r4, #2]	@ movhi
+.L3558:
+	movs	r0, #0
+	b	.L3548
+.L3553:
+	add	r1, r8, r4
+	ldr	r0, [r6]
+	ldr	r2, [r1, #4]
+	str	r0, [r2, r5, lsl #2]
+	ldrh	r2, [r1, #2]
+	mvn	r2, r2, lsl #17
+	mvn	r2, r2, lsr #17
+	strh	r2, [r1, #2]	@ movhi
+	ldr	r2, .L3563+24
+	strb	r10, [r2]
+	b	.L3554
+.L3551:
+	adds	r2, r2, #1
+	cmp	r2, #32
+	bne	.L3555
+	bl	pm_select_ram_region
+	ldrh	r1, [r8, r0, lsl #3]
+	movw	r2, #65535
+	mov	r4, r0
+	cmp	r1, r2
+	beq	.L3556
+	add	r2, r8, r0, lsl #3
+	ldrsh	r2, [r2, #2]
+	cmp	r2, #0
+	bge	.L3556
+	bl	pm_flush_id
+.L3556:
+	ldr	r2, .L3563+28
+	mov	r1, r4
+	mov	r0, r7
+	strb	r4, [r2]
+	bl	load_l2p_region
+	b	.L3552
+.L3564:
 	.align	2
-.L3517:
-	.word	.LANCHOR64
-	.word	.LANCHOR80
-	.word	.LANCHOR35
-	.word	.LANCHOR122
-	.word	.LANCHOR70
-	.word	.LANCHOR105
-	.word	.LANCHOR73
-	.size	gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page
-	.section	.text.gc_scan_src_blk,"ax",%progbits
+.L3563:
+	.word	.LANCHOR128
+	.word	.LC209
+	.word	.LANCHOR131
+	.word	.LANCHOR138
+	.word	.LANCHOR32
+	.word	.LANCHOR112
+	.word	.LANCHOR139
+	.word	.LANCHOR223
+	.size	pm_log2phys, .-pm_log2phys
+	.section	.text.gc_recovery,"ax",%progbits
 	.align	1
-	.global	gc_scan_src_blk
+	.global	gc_recovery
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	gc_scan_src_blk, %function
-gc_scan_src_blk:
-	@ args = 0, pretend = 0, frame = 16
+	.type	gc_recovery, %function
+gc_recovery:
+	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r5, #0
+	ldr	r4, .L3675
+	sub	sp, sp, #72
+	ldr	r3, .L3675+4
+	ldr	fp, [r4]
+	strb	r5, [r3]
+	ldr	r3, .L3675+8
+	ldrh	r6, [fp, #80]
+	strb	r5, [r3]
 	movw	r3, #65535
-	ldr	r4, .L3563
-	ldrh	r2, [r4]
+	cmp	r6, r3
+	beq	.L3566
+	strh	r3, [fp, #130]	@ movhi
+	movs	r0, #1
+	bl	buf_alloc
+	ldrb	r3, [fp, #89]	@ zero_extendqisi2
+	mov	r7, r0
+	ldr	r2, .L3675+12
+	ldr	r5, .L3675+16
+	add	r3, fp, r3, lsl #1
+	ldrh	r2, [r2]
+	ldrb	r1, [r5]	@ zero_extendqisi2
+	ldrh	r3, [r3, #94]
+	str	r5, [sp, #36]
+	cmp	r1, #2
+	mul	r2, r2, r3
+	str	r2, [sp, #64]
+	beq	.L3567
+	ldr	r3, .L3675+20
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L3567
+	ldr	r3, .L3675+24
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L3568
+.L3567:
+	ldr	r3, .L3675+28
+	ldrh	r3, [r3]
+	subs	r3, r3, #1
+	add	r3, r3, r2
+	orr	r3, r3, r1, lsl #24
+.L3667:
+	str	r3, [r7, #24]
+.L3569:
+	movs	r1, #1
+	mov	r0, r7
+	bl	sblk_read_page
+	ldr	r3, [r7, #36]
+	adds	r2, r3, #1
+	beq	.L3570
+	cmp	r3, #512
+	beq	.L3570
+	ldr	r2, [r7, #12]
+	ldr	r3, .L3675+32
+	ldr	r2, [r2]
+	str	r3, [sp, #40]
 	cmp	r2, r3
-	bne	.L3520
-	movw	r2, #1235
-	ldr	r1, .L3563+4
-	ldr	r0, .L3563+8
-	bl	printf
-.L3520:
-	ldrh	r1, [r4]
-	movw	r3, #65535
-	cmp	r1, r3
-	beq	.L3541
-	ldr	r3, .L3563+12
+	beq	.L3571
+.L3570:
+	mov	r0, r7
+	bl	zbuf_free
+	ldr	r2, [r7, #12]
+	ldr	r3, [r7, #4]
+	ldr	r0, .L3675+36
+	ldr	r1, [r2, #12]
+	str	r1, [sp, #24]
+	ldr	r1, [r2, #8]
+	str	r1, [sp, #20]
+	ldr	r1, [r2, #4]
+	str	r1, [sp, #16]
+	ldr	r2, [r2]
+	str	r2, [sp, #12]
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	ldr	r2, [r3, #8]
+	str	r2, [sp, #4]
+	ldr	r2, [r3, #4]
+	str	r2, [sp]
+	ldr	r2, [r7, #36]
 	ldr	r3, [r3]
-	lsls	r0, r3, #23
-	bpl	.L3522
-	ldr	r3, .L3563+16
-	ldr	r0, .L3563+20
+	ldr	r1, [r7, #24]
+	bl	printf
+.L3674:
+	ldr	r3, .L3675+40
+	ldrh	r1, [fp, #80]
+	ldr	r2, [r3]
+	movs	r3, #0
+	strh	r3, [r2, r1, lsl #1]	@ movhi
+	ldr	r2, [r4]
+	mov	r4, r3
+	ldrh	r1, [fp, #80]
+	strh	r1, [r2, #130]	@ movhi
+.L3572:
+	ldr	r3, .L3675+40
+	ldrh	r0, [fp, #80]
 	ldr	r3, [r3]
-	ldrh	r2, [r3, r1, lsl #1]
+	ldrh	r3, [r3, r0, lsl #1]
+	cbnz	r3, .L3616
+	bl	ftl_dump_write_open_sblk
+.L3616:
+	mov	r2, r4
+	ldrh	r1, [fp, #80]
+	movw	r5, #65535
+	ldr	r0, .L3675+44
+	ldr	r4, .L3675
 	bl	printf
-.L3522:
-	ldr	r1, .L3563+24
-	ldrh	r0, [r4]
-	bl	ftl_get_blk_list_in_sblk
-	uxtb	r0, r0
-	strb	r0, [r4, #5]
-	cbnz	r0, .L3523
+	strh	r5, [fp, #80]	@ movhi
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	ldr	r3, [r4]
+	ldrh	r3, [r3, #130]
+	cmp	r3, r5
+	beq	.L3617
+	ldr	r2, .L3675+48
+	ldrh	r2, [r2]
+	cmp	r2, r3
+	bhi	.L3618
+	movw	r2, #517
+	ldr	r1, .L3675+52
+	ldr	r0, .L3675+56
+	bl	printf
+.L3618:
+	ldr	r3, [r4]
+	ldrh	r0, [r3, #130]
+	bl	ftl_free_sblk
+.L3617:
+	ldr	r3, .L3675+60
+	movs	r0, #0
+	ldr	r2, [r3]
 	movw	r3, #65535
-	strh	r3, [r4]	@ movhi
-.L3519:
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3523:
-	ldr	r5, .L3563+28
-	ldrh	r3, [r4]
-	ldr	r2, [r5]
-	add	r2, r2, r3, lsl #2
-	ldrb	r2, [r2, #2]	@ zero_extendqisi2
-	and	r2, r2, #224
-	cmp	r2, #32
-	beq	.L3524
-	cmp	r2, #224
-	beq	.L3524
-	cbz	r2, .L3525
-	ldr	r2, .L3563+32
-	ldr	r2, [r2]
-	ldrh	r1, [r2, #16]
-	cmp	r1, r3
-	beq	.L3524
-	ldrh	r1, [r2, #48]
-	cmp	r1, r3
-	beq	.L3524
-	ldrh	r2, [r2, #80]
-	cmp	r2, r3
-	bne	.L3561
-.L3524:
-	movw	r3, #65535
-	movs	r0, #0
-	strh	r3, [r4]	@ movhi
-	strh	r0, [r4, #20]	@ movhi
-	b	.L3519
-.L3525:
-	ldr	r5, .L3563+16
-	ldr	r1, [r5]
-	ldrh	r3, [r1, r3, lsl #1]
-	cbz	r3, .L3527
-	movw	r2, #1255
-	ldr	r1, .L3563+4
-	ldr	r0, .L3563+8
-	bl	printf
-.L3527:
-	ldrh	r2, [r4]
-	movs	r1, #0
-	ldr	r3, [r5]
-	strh	r1, [r3, r2, lsl #1]	@ movhi
-	b	.L3524
-.L3561:
-	add	r0, r4, r0, lsl #1
-	movw	r3, #65535
-	ldrh	r6, [r0, #34]
-	cmp	r6, r3
-	bne	.L3528
-	movw	r2, #1263
-	ldr	r1, .L3563+4
-	ldr	r0, .L3563+8
-	bl	printf
-.L3528:
-	ldr	r2, .L3563+36
-	ldrh	r0, [r4]
-	ldr	r1, .L3563+40
-	ldrh	r2, [r2]
-	ldr	r8, .L3563+72
-	ldrh	r3, [r1]
-	mov	r10, r1
-	muls	r6, r2, r6
-	ldr	r2, [r5]
+	strh	r3, [r2, #126]	@ movhi
+	ldr	r2, [r4]
+	strh	r3, [r2, #130]	@ movhi
+	bl	ftl_info_flush
+.L3565:
+	add	sp, sp, #72
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3568:
+	cmp	r1, #3
+	bne	.L3569
+	ldr	r3, .L3675+64
+	ldrh	r3, [r3]
 	subs	r3, r3, #1
-	uxth	r3, r3
-	add	r2, r2, r0, lsl #2
-	ldrb	r2, [r2, #2]	@ zero_extendqisi2
-	and	r2, r2, #224
-	cmp	r2, #160
-	bne	.L3542
-	ldr	r2, .L3563+44
-	ldrb	r2, [r2]	@ zero_extendqisi2
+	add	r3, r3, r2
+	orr	r3, r3, #50331648
+	b	.L3667
+.L3571:
+	ldr	r3, .L3675+68
+	ldr	r5, .L3675+28
+	ldr	r6, .L3675+72
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	str	r3, [sp, #44]
+	ldr	r8, .L3675+88
 	cmp	r2, #2
-	uxth	r7, r2
-	orr	r6, r6, r2, lsl #24
-	ldr	r2, .L3563+48
-	it	eq
-	ldrheq	r3, [r8]
+	bne	.L3573
+	ldr	r3, [sp, #36]
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	cmp	r2, #3
+	bne	.L3573
+	ldrh	r2, [r5]
+	ldr	r10, .L3675+80
+	ldr	r0, [r8]
+	lsls	r1, r2, #2
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	ldrh	ip, [r10]
+	smulbb	r2, r2, r1
+	ldr	r1, [r7, #4]
+	sub	r2, r2, ip
+	lsr	ip, ip, #2
+	uxth	r2, r2
+	add	r0, r0, ip, lsl #2
+	bl	ftl_memcpy
+	ldr	r2, .L3675+20
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	itt	eq
-	addeq	r3, r3, #-1
-	uxtheq	r3, r3
-	cbz	r2, .L3529
-	ldrh	r3, [r8]
-	subs	r3, r3, #1
-	uxth	r3, r3
-.L3529:
-	orrs	r6, r6, r3
-	strb	r7, [r4, #6]
-	movs	r5, #0
-	movs	r0, #1
-	strh	r5, [r4, #2]	@ movhi
-	strb	r5, [r4, #4]
-	strh	r5, [r4, #22]	@ movhi
-	strh	r5, [r4, #24]	@ movhi
-	bl	buf_alloc
-	str	r6, [r0, #24]
+	cbnz	r2, .L3574
+	ldr	r2, .L3675+24
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbz	r2, .L3575
+.L3574:
+	ldr	r2, [r7, #24]
+	subs	r2, r2, #1
+.L3668:
+	str	r2, [r7, #24]
 	movs	r1, #1
-	ldr	r6, .L3563+52
-	mov	fp, r0
+	mov	r0, r7
 	bl	sblk_read_page
-	ldrh	r3, [r8]
-	movs	r1, #255
+	ldr	r2, [r7, #36]
+	adds	r3, r2, #1
+	beq	.L3577
+	cmp	r2, #512
+	beq	.L3577
+	ldr	r2, [r7, #12]
+	ldr	r3, [sp, #40]
+	ldr	r2, [r2]
+	cmp	r2, r3
+	beq	.L3578
+.L3577:
+	mov	r0, r7
+	bl	zbuf_free
+	b	.L3674
+.L3575:
+	ldr	r1, .L3675+64
+	ldr	r2, [sp, #64]
+	ldrh	r1, [r1]
+	subs	r2, r2, #1
+	add	r2, r2, r1
+	orr	r2, r2, #33554432
+	b	.L3668
+.L3578:
+	ldrh	r2, [r10]
+.L3669:
+	ldr	r1, [r7, #4]
+	ldr	r0, [r8]
+	bl	ftl_memcpy
+	ldrh	r3, [r5]
 	ldrb	r2, [r6]	@ zero_extendqisi2
-	ldr	r8, .L3563+76
+	ldr	r10, .L3675+92
 	muls	r2, r3, r2
-	ldr	r0, [r8]
-	lsls	r2, r2, #2
+	ldr	r3, .L3675+76
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r2, asr #6
+	lsl	r2, r2, #2
+	bge	.L3580
+	movs	r1, #0
+	ldr	r0, [r10]
 	bl	ftl_memset
-	ldr	r3, [fp, #36]
-	strh	r5, [r4, #20]	@ movhi
-	adds	r2, r3, #1
-	beq	.L3562
-	cmp	r3, #512
-	bne	.L3532
-.L3562:
-	mov	r0, fp
-	bl	zbuf_free
-	mov	r0, #-1
-	b	.L3519
-.L3542:
-	movs	r7, #1
-	b	.L3529
-.L3532:
-	ldr	r3, [fp, #12]
-	ldr	r2, [r3]
-	ldr	r3, .L3563+56
-	cmp	r2, r3
-	beq	.L3533
-	movw	r2, #1298
-	ldr	r1, .L3563+4
-	ldr	r0, .L3563+8
-	bl	printf
-	b	.L3562
-.L3533:
-	ldrh	r3, [r10]
-	ldrb	r6, [r6]	@ zero_extendqisi2
-	ldr	r10, .L3563+80
-	smulbb	r6, r6, r3
-	smulbb	r6, r6, r7
-	ldr	r7, [fp, #4]
-	uxth	r6, r6
-	subs	r7, r7, #4
-.L3534:
-	cmp	r5, r6
-	blt	.L3539
-	ldr	r5, .L3563+16
-	mov	r0, fp
-	bl	zbuf_free
-	ldrh	r1, [r4]
-	ldr	r3, [r5]
-	ldrh	r2, [r3, r1, lsl #1]
-	ldrh	r3, [r4, #20]
-	cmp	r2, r3
-	beq	.L3540
-	ldr	r0, .L3563+60
-	bl	printf
-.L3540:
-	ldr	r3, [r5]
-	ldrh	r1, [r4, #20]
-	ldrh	r2, [r4]
-	strh	r1, [r3, r2, lsl #1]	@ movhi
+	ldr	r3, [sp, #44]
+	ldrb	r8, [r3]	@ zero_extendqisi2
+	cmp	r8, #1
+	bne	.L3621
+	ldrh	r1, [r5]
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	ldr	r2, .L3675+80
+	ldr	r0, [r10]
+	muls	r3, r1, r3
+	ldrh	r4, [r2]
+	ldr	r1, [r7, #4]
+	lsls	r3, r3, #2
+	subs	r4, r4, r3
+	add	r1, r1, r3
+	mov	r2, r4
+	bl	ftl_memcpy
+	str	r8, [sp, #44]
+.L3581:
+	ldr	r3, .L3675+64
+	ldrh	r3, [r3]
+	str	r3, [sp, #40]
+	ldr	r3, [sp, #36]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #2
+	str	r3, [sp, #36]
+	bne	.L3582
+	ldr	r3, .L3675+84
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L3583
+.L3582:
+	ldr	r3, .L3675+20
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L3584
+.L3583:
+	ldr	r3, [sp, #36]
+	ldr	r2, [sp, #40]
+	muls	r3, r2, r3
+	str	r3, [sp, #40]
+	movs	r3, #1
+	str	r3, [sp, #36]
+.L3584:
+	movs	r5, #0
+	str	r5, [sp, #48]
+.L3585:
+	ldr	r3, [sp, #40]
+	cmp	r3, r5
+	bls	.L3598
+	add	r3, r5, r5, lsl #1
+	mov	r10, #0
+	subs	r3, r3, #1
+	str	r3, [sp, #52]
+	b	.L3599
+.L3573:
+	ldrh	r1, [r5]
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	muls	r2, r1, r2
+	lsls	r2, r2, #2
+	b	.L3669
+.L3580:
+	ldr	r1, [r7, #4]
+	ldr	r0, [r10]
+	add	r1, r1, r2
+	bl	ftl_memcpy
 	movs	r3, #0
-	strh	r3, [r4, #24]	@ movhi
-	ldrh	r0, [r4, #20]
-	b	.L3519
-.L3539:
-	ldr	r0, [r7, #4]!
-	adds	r3, r0, #1
-	beq	.L3536
-	bl	lpa_hash_get_ppa
-	str	r0, [sp, #12]
-	adds	r0, r0, #1
-	bne	.L3537
-	movs	r2, #0
-	add	r1, sp, #12
-	ldr	r0, [r7]
-	bl	pm_log2phys
-.L3537:
-	ldr	r2, .L3563+64
-	movs	r1, #1
-	ldrh	r0, [r10]
-	ldr	r3, [sp, #12]
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	str	r3, [sp, #4]
-	rsb	r2, r2, #24
-	subs	r2, r2, r0
-	lsr	r0, r3, r0
-	lsl	r2, r1, r2
-	ldr	r1, .L3563+68
-	subs	r2, r2, #1
-	ands	r0, r0, r2
-	ldrb	r1, [r1]	@ zero_extendqisi2
-	bl	__aeabi_uidiv
-	ldrh	r2, [r4]
-	ldr	r3, [sp, #4]
-	cmp	r0, r2
-	bne	.L3536
-	ldrh	r2, [r4, #20]
-	ldr	r1, [r8]
-	str	r3, [r1, r2, lsl #2]
-	adds	r2, r2, #1
-	strh	r2, [r4, #20]	@ movhi
-.L3536:
-	adds	r5, r5, #1
-	b	.L3534
-.L3541:
-	movs	r0, #0
-	b	.L3519
-.L3564:
+.L3670:
+	str	r3, [sp, #44]
+	movs	r4, #0
+	b	.L3581
+.L3621:
+	movs	r3, #1
+	b	.L3670
+.L3676:
 	.align	2
-.L3563:
-	.word	.LANCHOR64
-	.word	.LANCHOR215
-	.word	.LC0
-	.word	.LANCHOR14
-	.word	.LANCHOR9
-	.word	.LC219
-	.word	.LANCHOR64+36
-	.word	.LANCHOR7
+.L3675:
 	.word	.LANCHOR10
-	.word	.LANCHOR105
-	.word	.LANCHOR87
-	.word	.LANCHOR73
-	.word	.LANCHOR35
-	.word	.LANCHOR80
-	.word	-178307901
-	.word	.LC220
-	.word	.LANCHOR31
-	.word	.LANCHOR69
+	.word	.LANCHOR85
+	.word	.LANCHOR159
+	.word	.LANCHOR111
 	.word	.LANCHOR79
-	.word	.LANCHOR70
-	.word	.LANCHOR68
-	.size	gc_scan_src_blk, .-gc_scan_src_blk
-	.section	.text.gc_scan_static_data,"ax",%progbits
-	.align	1
-	.global	gc_scan_static_data
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	gc_scan_static_data, %function
-gc_scan_static_data:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
-	ldr	r4, .L3581
-	ldr	r3, [r4]
-	ldr	r2, [r3, #544]
-	adds	r2, r2, #1
-	beq	.L3566
-	ldr	r7, .L3581+4
-	movs	r5, #11
-	ldr	r8, .L3581+28
-.L3574:
-	ldr	r3, [r4]
-	movs	r2, #0
-	add	r1, sp, #4
-	ldr	r0, [r3, #544]
-	bl	pm_log2phys
-	ldr	r3, [sp, #4]
-	adds	r3, r3, #1
-	beq	.L3567
-	movs	r0, #1
-	bl	buf_alloc
-	ldr	r3, [sp, #4]
-	mov	r6, r0
-	movs	r1, #1
-	str	r3, [r0, #24]
-	bl	sblk_read_page
-	ldr	r3, [r6, #36]
-	cmp	r3, #256
-	bne	.L3568
-	ldr	r3, .L3581+8
-	mov	r10, #1
-	ldr	r0, [sp, #4]
-	ldrh	r2, [r3]
-	ldr	r3, .L3581+12
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	lsrs	r0, r0, r2
-	rsb	r3, r3, #24
-	subs	r3, r3, r2
-	ldr	r2, .L3581+16
-	lsl	r3, r10, r3
-	subs	r3, r3, #1
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	ands	r0, r0, r3
-	bl	__aeabi_uidiv
-	movs	r2, #0
-	mov	r1, r10
-	uxth	r0, r0
-	bl	gc_add_sblk
-.L3568:
-	ldr	r2, [r6, #12]
-	ldr	r3, [r4]
-	ldr	r2, [r2, #4]
-	ldr	r3, [r3, #544]
-	cmp	r2, r3
-	beq	.L3569
-	movw	r2, #1737
-	mov	r1, r7
-	mov	r0, r8
-	bl	printf
-.L3569:
-	mov	r0, r6
-	bl	zbuf_free
-.L3567:
-	ldr	r3, [r4]
-	ldr	r1, .L3581+20
-	ldr	r2, [r3, #544]
-	ldr	r1, [r1]
-	adds	r2, r2, #1
-	cmp	r2, r1
-	str	r2, [r3, #544]
-	bcc	.L3570
-	mov	r2, #-1
-	str	r2, [r3, #544]
-	ldr	r2, [r3, #548]
-	adds	r2, r2, #1
-	str	r2, [r3, #548]
-	bl	ftl_flush
-	bl	pm_flush
-	bl	ftl_ext_info_flush
-	movs	r0, #0
-	bl	ftl_info_flush
-.L3565:
-	add	sp, sp, #12
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L3570:
-	ldr	r3, [sp, #4]
-	adds	r3, r3, #1
-	bne	.L3565
-	subs	r5, r5, #1
-	uxth	r5, r5
-	cmp	r5, #0
-	bne	.L3574
-	b	.L3565
-.L3566:
-	ldr	r2, [r3, #536]
-	ldr	r1, [r3, #12]
-	ldr	r0, .L3581+24
-	add	r2, r2, #12910592
-	add	r2, r2, #49408
-	cmp	r1, r2
-	bhi	.L3576
-	ldr	r4, [r0]
-	ldr	r2, [r3, #540]
-	ldr	r4, [r4, #44]
-	add	r2, r2, #4992
-	adds	r2, r2, #8
-	cmp	r4, r2
-	bls	.L3565
-.L3576:
-	ldr	r2, [r0]
-	ldr	r2, [r2, #44]
-	str	r1, [r3, #536]
-	str	r2, [r3, #540]
-	movs	r2, #0
-	str	r2, [r3, #544]
-	b	.L3565
-.L3582:
-	.align	2
-.L3581:
-	.word	.LANCHOR10
-	.word	.LANCHOR216
-	.word	.LANCHOR68
-	.word	.LANCHOR31
-	.word	.LANCHOR69
-	.word	.LANCHOR122
-	.word	.LANCHOR104
+	.word	.LANCHOR36
+	.word	.LANCHOR37
+	.word	.LANCHOR86
+	.word	-178307901
+	.word	.LC210
+	.word	.LANCHOR9
+	.word	.LC212
+	.word	.LANCHOR6
+	.word	.LANCHOR225
 	.word	.LC0
-	.size	gc_scan_static_data, .-gc_scan_static_data
-	.section	.text.ftl_sblk_dump,"ax",%progbits
-	.align	1
-	.global	ftl_sblk_dump
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_sblk_dump, %function
-ftl_sblk_dump:
-	@ args = 0, pretend = 0, frame = 88
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	lsls	r3, r0, #2
-	ldr	r4, .L3624
-	sub	sp, sp, #128
-	lsls	r2, r0, #2
-	mov	r6, r0
-	str	r3, [sp, #72]
-	ldr	r3, [r4]
-	str	r1, [sp, #68]
-	ldr	r1, [r3, r0, lsl #2]
-	adds	r2, r3, r2
-	ldrb	r2, [r2, #2]	@ zero_extendqisi2
-	ubfx	r1, r1, #11, #8
-	str	r1, [sp, #4]
-	mov	r1, r0
-	ldrh	r3, [r3, r0, lsl #2]
-	ldr	r0, .L3624+4
-	ubfx	r3, r3, #0, #11
-	str	r3, [sp]
-	ubfx	r3, r2, #3, #2
-	lsrs	r2, r2, #5
-	bl	printf
-	movw	r3, #65535
-	cmp	r6, r3
-	beq	.L3605
-	ldr	r3, .L3624+8
-	ldrh	r3, [r3]
-	cmp	r3, r6
-	bls	.L3605
-	ldr	r3, [r4]
-	lsls	r2, r6, #2
-	add	r1, sp, #112
-	strh	r6, [sp, #96]	@ movhi
-	mov	r0, r6
-	movs	r5, #0
-	add	r3, r3, r2
-	mov	r10, r5
-	ldrb	r3, [r3, #2]	@ zero_extendqisi2
-	and	r3, r3, #224
-	cmp	r3, #160
-	itet	eq
-	ldreq	r3, .L3624+12
-	movne	fp, #1
-	ldrbeq	fp, [r3]	@ zero_extendqisi2
-	bl	ftl_get_blk_list_in_sblk
-	ldr	r3, .L3624+16
-	uxtb	r0, r0
-	lsls	r2, r6, #2
-	strb	r5, [sp, #101]
-	strb	r0, [sp, #105]
-	mov	r1, r6
-	ldrh	r3, [r3]
-	strh	r5, [sp, #98]	@ movhi
-	strh	r5, [sp, #106]	@ movhi
-	smulbb	r3, r3, r0
-	strh	r3, [sp, #102]	@ movhi
-	ldr	r3, [r4]
-	add	r3, r3, r2
-	ldrb	r2, [r3, #2]	@ zero_extendqisi2
-	mov	r3, fp
-	str	r0, [sp]
-	ldr	r0, .L3624+20
-	lsrs	r2, r2, #5
-	bl	printf
-	movs	r0, #1
-	bl	buf_alloc
-	mov	r7, r0
-	str	r5, [sp, #48]
-	str	r5, [sp, #44]
+	.word	.LANCHOR110
+	.word	.LANCHOR95
+	.word	.LANCHOR224
+	.word	.LANCHOR80
+	.word	.LANCHOR131
+	.word	.LANCHOR221
+	.word	.LANCHOR81
+	.word	.LANCHOR162
+	.word	.LANCHOR163
+.L3594:
+	ldr	r3, [sp, #56]
+	ldr	r2, .L3677
+	ldrh	r3, [r3, #96]
+	ldrh	r2, [r2]
+	muls	r3, r2, r3
+	ldr	r2, .L3677+4
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	str	r3, [sp, #64]
+	cmp	r1, #2
+	beq	.L3586
+	ldr	r2, .L3677+8
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r2, #0
+	beq	.L3587
 .L3586:
-	ldr	r3, .L3624+16
-	ldrh	r2, [r3]
-	uxth	r3, r5
-	cmp	r2, r3
-	bls	.L3602
-	str	r3, [sp, #60]
-	lsls	r3, r3, #1
-	subs	r2, r3, #1
-	str	r2, [sp, #76]
-	ldr	r2, [sp, #60]
+	subs	r2, r5, #1
 	add	r3, r3, r2
-	subs	r3, r3, #1
-	str	r3, [sp, #80]
-	movs	r3, #0
-	b	.L3623
-.L3599:
-	ldr	r3, [sp, #84]
-	add	r2, sp, #128
-	add	r3, r2, r3, lsl #1
-	ldrh	r3, [r3, #-32]
-	str	r3, [sp, #56]
-	movw	r3, #65535
-	ldr	r2, [sp, #56]
-	cmp	r2, r3
-	beq	.L3587
-	ldr	r3, .L3624+24
-	cmp	fp, #3
-	ldrh	r4, [r3]
-	mul	r4, r2, r4
-	bne	.L3588
-	ldr	r3, .L3624+28
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L3589
-	ldr	r3, [sp, #80]
-.L3621:
-	add	r4, r4, r3
-	ldr	r3, .L3624+12
-	add	r4, r4, r8
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	orr	r4, r4, r3, lsl #24
-	b	.L3590
-.L3589:
-	uxtah	r4, r4, r5
-	orr	r4, r4, r8, lsl #24
-.L3590:
+	add	r3, r3, r8
+	orr	r3, r3, r1, lsl #24
+.L3671:
+	str	r3, [r7, #24]
 	movs	r1, #1
-	str	r4, [r7, #24]
 	mov	r0, r7
 	bl	sblk_read_page
+	ldr	r3, [sp, #44]
+	cbz	r3, .L3591
+	ldr	r3, .L3677+12
+	ldr	r3, [r3]
+	ldr	r2, [r3, r6]
+	cbnz	r2, .L3591
 	ldr	r2, [r7, #12]
-	ldr	r3, [r7, #36]
-	ldr	r0, .L3624+32
-	ldr	r1, [r2, #12]
-	str	r3, [sp, #64]
-	ldr	r3, [r7, #4]
-	str	r1, [sp, #32]
-	ldr	r1, [r2, #8]
-	str	r1, [sp, #28]
+	ldr	r2, [r2, #8]
+	str	r2, [r3, r6]
+.L3591:
+	ldr	r3, .L3677+16
+	ldr	r2, [r7, #12]
+	ldr	r3, [r3]
 	ldr	r1, [r2, #4]
-	str	r1, [sp, #24]
+	ldr	r3, [r3, r6]
+	cmp	r3, r1
+	bne	.L3592
+	ldr	r0, .L3677+12
+	ldr	r0, [r0]
+	ldr	ip, [r0, r6]
+	ldr	r0, [r2, #8]
+	cmp	ip, r0
+	beq	.L3593
+.L3592:
+	ldr	r0, [r2, #12]
+	str	r0, [sp, #16]
+	ldr	r0, [r2, #8]
+	str	r1, [sp, #8]
+	str	r0, [sp, #12]
 	ldr	r2, [r2]
-	ldr	r1, [sp, #56]
-	str	r2, [sp, #20]
-	ldr	r2, [r3, #12]
-	str	r2, [sp, #16]
-	ldr	r2, [r3, #8]
-	str	r2, [sp, #12]
-	ldr	r2, [r3, #4]
-	str	r2, [sp, #8]
-	ldr	r3, [r3]
-	ldr	r2, [sp, #60]
-	str	r3, [sp, #4]
-	ldr	r3, [sp, #64]
-	str	r3, [sp]
-	mov	r3, r4
+	ldr	r0, .L3677+20
+	str	r2, [sp, #4]
+	ldr	r2, .L3677+12
+	ldr	r2, [r2]
+	ldr	r2, [r2, r6]
+	str	r2, [sp]
+	ldr	r2, [r7, #36]
+	ldr	r1, [r7, #24]
 	bl	printf
-	ldr	r3, [sp, #64]
-	adds	r2, r3, #1
-	beq	.L3607
-	cmp	r3, #512
-	ldr	r3, [sp, #44]
-	it	eq
-	moveq	r3, #1
-.L3622:
-	str	r3, [sp, #44]
-	ldr	r3, .L3624
-	ldr	r2, [sp, #72]
+	ldr	r3, .L3677+16
+	ldr	r3, [r3]
+	ldr	r3, [r3, r6]
+	adds	r3, r3, #1
+	beq	.L3593
+	mov	r0, r7
+	bl	zbuf_free
+	ldr	r3, .L3677+24
+	movs	r1, #0
+	ldrh	r2, [fp, #80]
 	ldr	r3, [r3]
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	ldr	r3, .L3677+28
+	ldrh	r2, [fp, #80]
+	ldr	r3, [r3]
+	strh	r2, [r3, #130]	@ movhi
+	b	.L3572
+.L3587:
+	cmp	r1, #3
+	bne	.L3589
+	ldr	r2, .L3677+32
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbz	r2, .L3590
+	ldr	r2, [sp, #52]
 	add	r3, r3, r2
-	ldrb	r3, [r3, #2]	@ zero_extendqisi2
-	and	r3, r3, #224
-	cmp	r3, #224
-	beq	.L3587
-	cmp	r3, #32
-	beq	.L3587
-	ldr	r3, [r7, #12]
-	ldr	r0, [r3, #4]
-	bl	lpa_hash_get_ppa
-	str	r0, [sp, #92]
-	adds	r0, r0, #1
-	bne	.L3593
-	ldr	r3, [r7, #12]
-	movs	r2, #0
-	add	r1, sp, #92
-	ldr	r0, [r3, #4]
-	bl	pm_log2phys
+	add	r3, r3, r8
+	orr	r3, r3, #50331648
+	b	.L3671
+.L3590:
+	add	r3, r3, r5
+	orr	r3, r3, r8, lsl #24
+	b	.L3671
+.L3589:
+	add	r3, r3, r5
+	b	.L3671
 .L3593:
-	ldr	r3, [sp, #92]
-	cmp	r4, r3
-	bne	.L3594
 	ldr	r3, [sp, #48]
-	mov	r1, r4
-	ldr	r2, [r7, #12]
-	ldr	r0, .L3624+36
+	add	r8, r8, #1
+	adds	r6, r6, #4
 	adds	r3, r3, #1
-	ldr	r2, [r2, #4]
 	str	r3, [sp, #48]
-	bl	printf
-.L3594:
-	ldr	r3, [sp, #68]
-	cbz	r3, .L3596
-	ldr	r2, [r3, r10, lsl #2]
-	lsl	r4, r10, #2
-	ldr	r3, [r7, #12]
-	ldr	r3, [r3, #4]
-	cmp	r3, r2
-	beq	.L3597
-	ldr	r3, .L3624+40
-	ldr	r3, [r3]
-	lsls	r3, r3, #19
-	bpl	.L3597
-	mov	r1, r10
-	ldr	r0, .L3624+44
-	bl	printf
-.L3597:
-	ldr	r3, [sp, #68]
-	ldr	r2, [r7, #12]
-	ldr	r3, [r3, r4]
-	ldr	r2, [r2, #4]
-	cmp	r2, r3
-	beq	.L3596
-	adds	r3, r3, #1
-	beq	.L3596
-	movw	r2, #1383
-	ldr	r1, .L3624+48
-	ldr	r0, .L3624+52
-	bl	printf
 .L3596:
+	ldr	r3, [sp, #36]
+	cmp	r3, r8
+	bcs	.L3594
 	add	r10, r10, #1
-.L3587:
-	add	r8, r8, #1
-	uxth	r8, r8
-.L3601:
-	cmp	fp, r8
-	bcs	.L3599
-	ldr	r3, [sp, #52]
-	adds	r3, r3, #1
-.L3623:
-	str	r3, [sp, #52]
-	ldrb	r2, [sp, #105]	@ zero_extendqisi2
-	ldrh	r3, [sp, #52]
-	cmp	r2, r3
-	bls	.L3600
-	adds	r3, r3, #8
+.L3599:
+	ldrb	r3, [fp, #89]	@ zero_extendqisi2
+	cmp	r10, r3
+	bge	.L3595
+	ldr	r3, [sp, #48]
 	mov	r8, #1
-	str	r3, [sp, #84]
-	b	.L3601
-.L3588:
-	cmp	fp, #2
-	bne	.L3591
-	ldr	r3, [sp, #76]
-	b	.L3621
-.L3591:
-	uxtah	r4, r4, r5
-	b	.L3590
-.L3607:
-	movs	r3, #1
-	b	.L3622
-.L3600:
+	lsls	r6, r3, #2
+	add	r3, fp, r10, lsl #1
+	str	r3, [sp, #56]
+	b	.L3596
+.L3595:
+	ldr	r3, .L3677+36
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L3597
 	adds	r5, r5, #1
-	b	.L3586
-.L3602:
+.L3597:
+	adds	r5, r5, #1
+	b	.L3585
+.L3598:
 	mov	r0, r7
+	movs	r4, #0
 	bl	zbuf_free
-	ldr	r3, .L3624+56
-	mov	r1, r6
-	ldr	r0, .L3624+60
+	ldr	r3, .L3677+24
+	mov	r10, r4
+	ldr	r0, .L3677+40
+	mov	r8, r4
+	ldrh	r1, [fp, #80]
 	ldr	r2, [r3]
-	ldr	r3, [sp, #48]
-	ldrh	r2, [r2, r6, lsl #1]
-	bl	printf
-	ldr	r0, [sp, #44]
-.L3583:
-	add	sp, sp, #128
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3605:
-	movs	r0, #0
-	b	.L3583
-.L3625:
-	.align	2
-.L3624:
-	.word	.LANCHOR7
-	.word	.LC221
-	.word	.LANCHOR6
-	.word	.LANCHOR73
-	.word	.LANCHOR87
-	.word	.LC222
-	.word	.LANCHOR105
-	.word	.LANCHOR35
-	.word	.LC163
-	.word	.LC223
-	.word	.LANCHOR14
-	.word	.LC224
-	.word	.LANCHOR217
-	.word	.LC0
-	.word	.LANCHOR9
-	.word	.LC225
-	.size	ftl_sblk_dump, .-ftl_sblk_dump
-	.section	.text.zftl_read,"ax",%progbits
-	.align	1
-	.global	zftl_read
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	zftl_read, %function
-zftl_read:
-	@ args = 0, pretend = 0, frame = 48
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r5, r3
-	ldr	r3, .L3673
-	mov	r4, r0
-	sub	sp, sp, #72
-	mov	r6, r1
-	mov	fp, r2
-	ldr	r3, [r3]
-	lsls	r0, r3, #19
-	bpl	.L3627
-	mov	r3, r2
-	ldr	r0, .L3673+4
-	mov	r2, r1
-	mov	r1, r4
-	bl	printf
-.L3627:
-	cmp	r4, #0
-	bne	.L3628
-	ldr	r3, .L3673+8
-	mov	r4, #24576
-	ldr	r3, [r3]
-.L3629:
-	add	r2, r6, fp
-	cmp	r3, r2
-	bcc	.L3658
-	adds	r3, r4, r6
-	ldr	r6, .L3673+12
-	str	r3, [sp, #28]
-	ldr	r3, .L3673+16
-	ldr	r0, [sp, #28]
+	ldrh	r0, [r0]
+	ldrb	r3, [fp, #89]	@ zero_extendqisi2
+	smulbb	r3, r3, r0
+	strh	r3, [r2, r1, lsl #1]	@ movhi
+.L3600:
+	ldr	r3, [sp, #40]
+	cmp	r3, r10
+	bls	.L3614
+	add	r2, r10, r10, lsl #1
+	movs	r7, #0
+	subs	r3, r2, #1
+	str	r3, [sp, #52]
+	b	.L3615
+.L3610:
+	ldr	r3, .L3677+16
 	ldr	r2, [r3]
-	ldr	r3, [r2, #24]
-	add	r3, r3, fp
-	str	r3, [r2, #24]
-	ldr	r3, .L3673+20
-	ldrb	r4, [r3]	@ zero_extendqisi2
-	mov	r1, r4
-	bl	__aeabi_uidiv
-	ldr	r3, [sp, #28]
-	mov	r1, r4
-	str	r0, [sp, #36]
-	add	r3, fp, r3
-	subs	r0, r3, #1
+	ldr	r3, [r2, r8, lsl #2]
 	str	r3, [sp, #44]
+	adds	r3, r3, #1
+	beq	.L3601
+	ldr	r3, .L3677+12
+	ldr	r0, [sp, #44]
+	ldr	r2, [r3]
+	ldr	r3, [r2, r8, lsl #2]
+	str	r3, [sp, #48]
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #68]
+	adds	r0, r0, #1
+	bne	.L3602
+	movs	r2, #0
+	add	r1, sp, #68
+	ldr	r0, [sp, #44]
+	bl	pm_log2phys
+.L3602:
+	ldr	r3, [sp, #56]
+	ldr	r1, .L3677
+	ldrh	r2, [r3, #96]
+	ldrh	r1, [r1]
+	muls	r1, r2, r1
+	ldr	r2, .L3677+4
+	ldrb	r0, [r2]	@ zero_extendqisi2
+	cmp	r0, #2
+	beq	.L3603
+	ldr	r2, .L3677+8
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r2, #0
+	beq	.L3604
+.L3603:
+	add	r2, r10, #-1
+	add	r2, r2, r1
+	add	r2, r2, r5
+	orr	r2, r2, r0, lsl #24
+.L3673:
+	str	r2, [sp, #64]
+.L3605:
+	ldr	r2, .L3677+44
+	ldr	r3, [sp, #48]
+	ldrh	r1, [r2]
+	ldr	r2, .L3677+48
+	ldrb	r0, [r2]	@ zero_extendqisi2
+	movs	r2, #1
+	lsr	r6, r3, r1
+	str	r2, [sp, #60]
+	rsb	r0, r0, #24
+	subs	r0, r0, r1
+	ldr	r1, .L3677+52
+	lsl	r0, r2, r0
+	subs	r0, r0, #1
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	ands	r0, r0, r6
 	bl	__aeabi_uidiv
+	ldr	r1, [sp, #68]
+	mov	r6, r0
+	ldr	r3, [sp, #48]
+	ldr	r2, [sp, #60]
+	cmp	r3, r1
+	bne	.L3608
+	add	r1, sp, #64
+	ldr	r0, [sp, #44]
+	bl	pm_log2phys
+	uxth	r0, r6
+	adds	r4, r4, #1
+	bl	ftl_vpn_decrement
+.L3609:
+	ldr	r2, .L3677+56
+	uxth	r6, r6
+	add	r8, r8, #1
+	ldr	r2, [r2]
+	add	r2, r2, r6, lsl #2
+	ldrb	r2, [r2, #2]	@ zero_extendqisi2
+	ands	r2, r2, #224
+	bne	.L3601
+	ldr	r1, .L3677+24
+	ldr	r1, [r1]
+	ldrh	r0, [r1, r6, lsl #1]
+	cbz	r0, .L3601
+	strh	r2, [r1, r6, lsl #1]	@ movhi
+.L3601:
+	adds	r5, r5, #1
+.L3612:
 	ldr	r3, [sp, #36]
-	ldr	r4, [sp, #36]
-	str	r0, [sp, #48]
-	rsb	r3, r3, #1
-	add	r3, r3, r0
-	str	r3, [sp, #32]
-	movs	r3, #0
-	str	r3, [sp, #40]
-.L3631:
-	ldr	r3, [sp, #32]
-	cbnz	r3, .L3656
-	ldr	r0, [sp, #40]
-.L3626:
-	add	sp, sp, #72
+	cmp	r3, r5
+	bcs	.L3610
+	adds	r7, r7, #1
+.L3615:
+	ldrb	r2, [fp, #89]	@ zero_extendqisi2
+	cmp	r7, r2
+	bge	.L3611
+	add	r3, fp, r7, lsl #1
+	movs	r5, #1
+	str	r3, [sp, #56]
+	b	.L3612
+.L3604:
+	cmp	r0, #3
+	bne	.L3606
+	ldr	r2, .L3677+32
+	lsls	r0, r5, #24
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbz	r2, .L3607
+	ldr	r3, [sp, #52]
+	adds	r2, r1, r3
+	add	r2, r2, r5
+.L3672:
+	orrs	r2, r2, r0
+	b	.L3673
+.L3607:
+	add	r2, r10, r1
+	b	.L3672
+.L3606:
+	add	r1, r1, r10
+	str	r1, [sp, #64]
+	b	.L3605
+.L3608:
+	ldr	r2, [sp, #64]
+	cmp	r1, r2
+	it	eq
+	addeq	r4, r4, #1
+	b	.L3609
+.L3611:
+	ldr	r2, .L3677+36
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbz	r2, .L3613
+	add	r10, r10, #1
+.L3613:
+	add	r10, r10, #1
+	b	.L3600
+.L3614:
+	ldr	r3, .L3677+24
+	ldrh	r2, [fp, #80]
+	ldr	r3, [r3]
+	strh	r4, [r3, r2, lsl #1]	@ movhi
+	ldrh	r0, [fp, #80]
+	bl	zftl_insert_data_list
+	b	.L3572
+.L3678:
+	.align	2
+.L3677:
+	.word	.LANCHOR111
+	.word	.LANCHOR79
+	.word	.LANCHOR36
+	.word	.LANCHOR163
+	.word	.LANCHOR162
+	.word	.LC211
+	.word	.LANCHOR9
+	.word	.LANCHOR10
+	.word	.LANCHOR37
+	.word	.LANCHOR81
+	.word	.LANCHOR86
+	.word	.LANCHOR75
+	.word	.LANCHOR32
+	.word	.LANCHOR76
+	.word	.LANCHOR7
+.L3566:
+	ldrh	r3, [fp, #130]
+	cmp	r3, r6
+	beq	.L3565
+	ldr	r7, .L3679
+	ldr	r2, [r7]
+	ldrh	r2, [r2, #126]
+	cmp	r2, r3
+	bne	.L3620
+	bl	pm_flush
+	ldr	r3, [r4]
+	ldrh	r0, [r3, #130]
+	bl	ftl_free_sblk
+	ldr	r3, [r7]
+	mov	r0, r5
+	strh	r6, [r3, #126]	@ movhi
+	bl	ftl_info_flush
+.L3620:
+	ldr	r3, [r4]
+	movw	r2, #65535
+	strh	r2, [r3, #130]	@ movhi
+	b	.L3565
+.L3680:
+	.align	2
+.L3679:
+	.word	.LANCHOR110
+	.size	gc_recovery, .-gc_recovery
+	.section	.text.gc_update_l2p_map_new,"ax",%progbits
+	.align	1
+	.global	gc_update_l2p_map_new
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_update_l2p_map_new, %function
+gc_update_l2p_map_new:
+	@ args = 0, pretend = 0, frame = 32
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L3715
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #32
+	ldr	r2, .L3715+4
+	ldr	r4, [r3]
+	ldrh	r2, [r2]
+	ldr	r7, .L3715+8
+	ldrb	r1, [r4, #89]	@ zero_extendqisi2
+	str	r3, [sp, #20]
+	muls	r2, r1, r2
+	str	r2, [sp, #4]
+	ldr	r2, [r7]
+	tst	r2, #256
+	beq	.L3682
+	ldrh	r1, [r4, #80]
+	ldr	r0, .L3715+12
+	bl	printf
+.L3682:
+	ldr	r3, .L3715+16
+	movs	r6, #0
+	ldr	r0, [sp, #4]
+	mov	r5, r6
+	ldrh	r1, [r4, #80]
+	ldr	r2, [r3]
+	ldr	r3, .L3715+20
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	subs	r3, r0, r3
+	strh	r3, [r2, r1, lsl #1]	@ movhi
+.L3683:
+	ldr	r3, [sp, #4]
+	cmp	r5, r3
+	bne	.L3692
+	ldr	r3, [r7]
+	ldr	r5, .L3715+16
+	tst	r3, #256
+	beq	.L3693
+	ldr	r3, [sp, #20]
+	ldrh	r0, [r4, #80]
+	ldr	r2, [r5]
+	ldr	r1, [r3]
+	mov	r3, r6
+	ldrh	r2, [r2, r0, lsl #1]
+	ldrh	r1, [r1, #80]
+	ldr	r0, .L3715+24
+	bl	printf
+.L3693:
+	ldrh	r2, [r4, #80]
+	ldr	r3, [r5]
+	ldrh	r3, [r3, r2, lsl #1]
+	cmp	r6, r3
+	beq	.L3694
+	movw	r2, #898
+	ldr	r1, .L3715+28
+	ldr	r0, .L3715+32
+	bl	printf
+.L3694:
+	ldrh	r2, [r4, #80]
+	ldr	r3, [r5]
+	strh	r6, [r3, r2, lsl #1]	@ movhi
+	ldrh	r0, [r4, #80]
+	bl	zftl_insert_data_list
+	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3628:
-	cmp	r4, #3
-	bhi	.L3658
-	lsls	r4, r4, #13
-	mov	r3, #8192
-	b	.L3629
-.L3656:
-	ldr	r3, .L3673+20
+.L3692:
+	ldr	r3, .L3715+36
+	lsl	r8, r5, #2
+	ldr	r3, [r3]
+	ldr	r10, [r3, r5, lsl #2]
+	cmp	r10, #-1
+	beq	.L3684
+	ldr	r3, .L3715+40
+	mov	r0, r10
 	ldrb	r1, [r3]	@ zero_extendqisi2
-	ldr	r3, [sp, #36]
-	cmp	r4, r3
-	uxth	r7, r1
-	bne	.L3632
-	ldr	r0, [sp, #28]
-	bl	__aeabi_uidivmod
-	uxth	r8, r1
-	sub	r7, r7, r8
-	uxth	r7, r7
-	cmp	fp, r7
-	bcs	.L3633
-	uxth	r7, fp
-.L3633:
-	ldr	r2, .L3673+12
-	movs	r3, #0
-.L3636:
-	ldr	r1, [r2, #20]
-	cmp	r4, r1
-	bne	.L3634
-	ldrb	r1, [r2, #2]	@ zero_extendqisi2
-	lsls	r1, r1, #28
-	bpl	.L3634
-	movs	r2, #48
-	lsls	r7, r7, #9
-	mov	r0, r5
-	mla	r3, r2, r3, r6
-	add	r5, r5, r7
-	mov	r2, r7
-	ldr	r1, [r3, #4]
-	add	r1, r1, r8, lsl #9
-	bl	ftl_memcpy
-.L3635:
-	ldr	r3, [sp, #32]
-	adds	r4, r4, #1
-	subs	r3, r3, #1
-	str	r3, [sp, #32]
-.L3642:
-	ldr	r3, .L3673+24
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #2
-	bls	.L3643
-	ldr	r3, [sp, #32]
-	cmp	r3, #0
-	bne	.L3631
-.L3643:
-	ldr	r3, .L3673+28
+	lsls	r1, r1, #7
+	bl	__aeabi_uidiv
+	uxth	r3, r0
+	str	r3, [sp, #16]
+	ldr	r3, [r7]
+	lsls	r1, r3, #23
+	bpl	.L3685
+	mov	r3, r5
+	mov	r2, r10
+	ldr	r1, [sp, #16]
+	ldr	r0, .L3715+44
+	bl	printf
+.L3685:
+	ldr	fp, .L3715+36
+	str	r5, [sp, #12]
+.L3691:
+	ldr	r3, [fp]
+	ldr	r10, [r3, r8]
+	cmp	r10, #-1
+	beq	.L3686
+	ldr	r3, .L3715+40
+	mov	r0, r10
 	ldrb	r1, [r3]	@ zero_extendqisi2
-	cmp	r1, #0
-	beq	.L3631
-	ldr	r3, .L3673+32
-	ldrb	r0, [r3]	@ zero_extendqisi2
-	add	r0, r0, r0, lsl #1
-	add	r0, r6, r0, lsl #4
-	bl	sblk_read_page
-.L3645:
-	ldr	r3, .L3673+28
-	ldr	r8, .L3673+32
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	cmp	r2, #0
-	bne	.L3655
-	movs	r1, #255
-	strb	r2, [r3]
-	strb	r1, [r8]
-	b	.L3631
-.L3632:
-	ldr	r3, [sp, #48]
-	mov	r8, #0
-	cmp	r4, r3
-	itttt	eq
-	ldreq	r3, [sp, #28]
-	addeq	r7, r3, fp
-	mlseq	r1, r4, r1, r7
-	uxtbeq	r7, r1
-	b	.L3633
-.L3634:
-	adds	r3, r3, #1
-	adds	r2, r2, #48
-	cmp	r3, #32
-	bne	.L3636
-	mov	r0, r4
+	lsls	r1, r1, #7
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #16]
+	uxth	r0, r0
+	cmp	r3, r0
+	bne	.L3686
+	ldr	r3, .L3715+48
+	mov	r0, r10
+	ldr	r3, [r3]
+	ldr	r3, [r3, r8]
+	str	r3, [sp, #8]
 	bl	lpa_hash_get_ppa
-	str	r0, [sp, #68]
+	str	r0, [sp, #28]
 	adds	r0, r0, #1
-	bne	.L3637
+	bne	.L3687
 	movs	r2, #0
-	add	r1, sp, #68
-	mov	r0, r4
+	add	r1, sp, #28
+	mov	r0, r10
 	bl	pm_log2phys
-.L3637:
-	ldr	r3, [sp, #68]
-	adds	r3, r3, #1
-	bne	.L3638
-	ldr	r8, .L3673+20
-	movs	r7, #0
-.L3639:
-	ldrb	r3, [r8]	@ zero_extendqisi2
-	cmp	r7, r3
-	bcs	.L3635
-	mla	r3, r3, r4, r7
-	ldr	r2, [sp, #28]
-	cmp	r2, r3
-	bhi	.L3640
-	ldr	r2, [sp, #44]
+.L3687:
+	ldr	r3, [sp, #28]
+	ldr	r2, [sp, #8]
 	cmp	r2, r3
-	bls	.L3640
-	mov	r0, r5
-	add	r5, r5, #512
-	mov	r2, #512
-	movs	r1, #0
-	bl	ftl_memset
-.L3640:
-	adds	r7, r7, #1
-	b	.L3639
-.L3638:
-	movs	r0, #0
-	bl	buf_alloc
-	cmp	r0, #0
-	beq	.L3642
-	ldr	r2, .L3673+16
-	ldr	r1, [r2]
-	ldr	r2, [r1, #40]
-	adds	r2, r2, #1
-	str	r2, [r1, #40]
-	ldr	r2, [sp, #68]
-	str	r5, [r0, #8]
-	add	r5, r5, r7, lsl #9
-	str	r4, [r0, #20]
-	str	r2, [r0, #24]
-	str	r2, [r0, #28]
-	strb	r7, [r0, #40]
-	strb	r8, [r0, #41]
-	bl	zftl_add_read_buf
-	b	.L3635
-.L3674:
-	.align	2
-.L3673:
-	.word	.LANCHOR14
-	.word	.LC226
-	.word	.LANCHOR61
-	.word	.LANCHOR52
-	.word	.LANCHOR104
-	.word	.LANCHOR125
-	.word	.LANCHOR54
-	.word	.LANCHOR129
-	.word	.LANCHOR128
-.L3655:
-	ldrb	r3, [r8]	@ zero_extendqisi2
-	cmp	r3, #255
-	bne	.L3646
-	mov	r2, #1088
-	ldr	r1, .L3675
-	ldr	r0, .L3675+4
-	bl	printf
-.L3646:
-	ldrb	r7, [r8]	@ zero_extendqisi2
-	add	r3, r7, r7, lsl #1
-	add	r3, r6, r3, lsl #4
-	str	r3, [sp, #52]
-	movs	r3, #48
-	muls	r3, r7, r3
-	adds	r2, r6, r3
-	ldrb	r3, [r6, r3]	@ zero_extendqisi2
-	strb	r3, [r8]
-	ldr	r8, [r2, #36]
-	cmp	r8, #-1
-	bne	.L3647
-	ldr	r3, .L3675+8
-	str	r8, [sp, #40]
-	ldr	r2, [r3]
-	ldr	r3, [r2, #552]
-	adds	r3, r3, #1
-	str	r3, [r2, #552]
-.L3648:
-	movs	r3, #48
-	mla	r3, r3, r7, r6
-	ldr	r2, [r3, #12]
-	ldr	r3, [r3, #20]
-	ldr	r1, [r2, #4]
-	cmp	r1, r3
-	bne	.L3649
-	cmp	r8, #-1
-	bne	.L3650
-.L3649:
-	ldr	r1, .L3675+8
-	mov	r10, #48
-	mla	r10, r10, r7, r6
-	ldr	r0, [r1]
-	ldr	r1, [r0, #552]
-	adds	r1, r1, #1
-	str	r1, [r0, #552]
-	ldr	r0, [r2, #12]
-	ldrb	r1, [r10, #1]	@ zero_extendqisi2
-	str	r0, [sp, #16]
-	ldr	r0, [r2, #8]
-	str	r0, [sp, #12]
-	ldr	r0, [r2, #4]
-	str	r0, [sp, #8]
-	ldr	r2, [r2]
-	ldr	r0, .L3675+12
-	str	r2, [sp, #4]
-	ldr	r2, [r10, #24]
-	str	r2, [sp]
-	mov	r2, r8
-	bl	printf
-	ldr	r3, .L3675+16
+	bne	.L3688
+	ldr	r3, .L3715+52
+	add	r1, sp, #32
+	movs	r2, #1
+	mov	r0, r10
+	adds	r6, r6, #1
+	ldr	r3, [r3]
+	ldr	r3, [r3, r8]
+	str	r3, [r1, #-8]!
+	bl	pm_log2phys
+	ldr	r3, .L3715+56
 	ldrh	r2, [r3]
-	ldr	r3, .L3675+20
+	ldr	r3, .L3715+60
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	rsb	r3, r3, #24
 	subs	r0, r3, r2
 	movs	r3, #1
 	lsls	r3, r3, r0
-	ldr	r0, [r10, #24]
+	ldr	r0, [sp, #8]
 	subs	r3, r3, #1
 	lsrs	r0, r0, r2
-	ldr	r2, .L3675+24
+	ldr	r2, .L3715+64
 	ands	r0, r0, r3
 	ldrb	r1, [r2]	@ zero_extendqisi2
 	bl	__aeabi_uidiv
-	movs	r1, #0
 	uxth	r0, r0
-	bl	ftl_sblk_dump
-.L3650:
-	movs	r3, #48
-	mla	r3, r3, r7, r6
-	ldr	r2, [r3, #12]
-	ldr	r3, [r3, #20]
-	ldr	r2, [r2, #4]
-	cmp	r2, r3
-	bne	.L3651
-	cmp	r8, #-1
-	bne	.L3652
-.L3651:
-	movw	r2, #1109
-	ldr	r1, .L3675
-	ldr	r0, .L3675+4
-	bl	printf
-.L3652:
-	movs	r3, #48
-	mla	r7, r3, r7, r6
-	ldr	r3, .L3675+28
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	ldrb	r2, [r7, #40]	@ zero_extendqisi2
+.L3714:
+	bl	ftl_vpn_decrement
+	ldr	r3, [fp]
+	mov	r2, #-1
+	str	r2, [r3, r8]
+.L3686:
+	ldr	r3, [sp, #12]
+	add	r8, r8, #4
+	adds	r3, r3, #1
+	str	r3, [sp, #12]
+	ldr	r2, [sp, #12]
+	ldr	r3, [sp, #4]
 	cmp	r3, r2
-	bls	.L3653
-	ldrb	r1, [r7, #41]	@ zero_extendqisi2
-	lsls	r2, r2, #9
-	ldr	r3, [r7, #4]
-	ldr	r0, [r7, #8]
-	add	r1, r3, r1, lsl #9
-	bl	ftl_memcpy
-.L3654:
-	ldr	r1, [sp, #52]
-	ldr	r0, .L3675+32
-	bl	buf_remove_buf
-	ldr	r0, [sp, #52]
-	bl	zbuf_free
-	ldr	r2, .L3675+36
-	ldrb	r3, [r2]	@ zero_extendqisi2
-	subs	r3, r3, #1
-	strb	r3, [r2]
-	b	.L3645
-.L3647:
-	cmp	r8, #256
-	bne	.L3648
-	ldr	r1, .L3675+16
-	ldr	r3, [r2, #24]
-	str	r2, [sp, #60]
-	movs	r2, #1
-	ldrh	r0, [r1]
-	ldr	r1, .L3675+20
-	str	r3, [sp, #56]
-	ldrb	ip, [r1]	@ zero_extendqisi2
-	ldr	r1, .L3675+24
-	rsb	ip, ip, #24
-	sub	ip, ip, r0
-	lsr	r0, r3, r0
-	lsl	ip, r2, ip
-	ldrb	r1, [r1]	@ zero_extendqisi2
-	add	ip, ip, #-1
-	and	r0, ip, r0
-	bl	__aeabi_uidiv
-	ldr	r2, [sp, #60]
-	mov	r10, r0
-	uxth	r1, r0
-	ldr	r3, [sp, #56]
-	ldr	r0, .L3675+40
-	ldr	r2, [r2, #20]
+	bne	.L3691
+.L3684:
+	adds	r5, r5, #1
+	b	.L3683
+.L3688:
+	ldr	r2, [r7]
+	lsls	r2, r2, #23
+	bpl	.L3690
+	ldr	r2, [sp, #8]
+	mov	r1, r10
+	ldr	r0, .L3715+68
 	bl	printf
-	movs	r2, #0
-	movs	r1, #1
-	uxth	r0, r10
-	bl	gc_add_sblk
-	b	.L3648
-.L3653:
-	ldrb	r3, [r7, #2]	@ zero_extendqisi2
-	bic	r3, r3, #8
-	strb	r3, [r7, #2]
-	b	.L3654
-.L3658:
-	mov	r0, #-1
-	b	.L3626
-.L3676:
+.L3690:
+	ldrh	r0, [r4, #80]
+	b	.L3714
+.L3716:
 	.align	2
-.L3675:
-	.word	.LANCHOR218
-	.word	.LC0
+.L3715:
 	.word	.LANCHOR10
-	.word	.LC228
-	.word	.LANCHOR68
-	.word	.LANCHOR31
-	.word	.LANCHOR69
-	.word	.LANCHOR125
+	.word	.LANCHOR86
+	.word	.LANCHOR14
+	.word	.LC213
+	.word	.LANCHOR9
+	.word	.LANCHOR224
+	.word	.LC216
+	.word	.LANCHOR226
+	.word	.LC0
+	.word	.LANCHOR162
 	.word	.LANCHOR131
-	.word	.LANCHOR129
-	.word	.LC227
-	.size	zftl_read, .-zftl_read
-	.section	.text.ftl_vendor_read,"ax",%progbits
-	.align	1
-	.global	ftl_vendor_read
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_vendor_read, %function
-ftl_vendor_read:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	mov	r3, r2
-	mov	r2, r1
-	add	r1, r0, #512
-	movs	r0, #2
-	b	zftl_read
-	.size	ftl_vendor_read, .-ftl_vendor_read
-	.section	.text.zftl_sys_read,"ax",%progbits
-	.align	1
-	.global	zftl_sys_read
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	zftl_sys_read, %function
-zftl_sys_read:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	mov	r3, r2
-	mov	r2, r1
-	mov	r1, r0
-	movs	r0, #2
-	b	zftl_read
-	.size	zftl_sys_read, .-zftl_sys_read
-	.section	.text.StorageSysDataLoad,"ax",%progbits
+	.word	.LC214
+	.word	.LANCHOR163
+	.word	.LANCHOR164
+	.word	.LANCHOR75
+	.word	.LANCHOR32
+	.word	.LANCHOR76
+	.word	.LC215
+	.size	gc_update_l2p_map_new, .-gc_update_l2p_map_new
+	.section	.text.gc_scan_src_blk_one_page,"ax",%progbits
 	.align	1
-	.global	StorageSysDataLoad
+	.global	gc_scan_src_blk_one_page
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	StorageSysDataLoad, %function
-StorageSysDataLoad:
-	@ args = 0, pretend = 0, frame = 0
+	.type	gc_scan_src_blk_one_page, %function
+gc_scan_src_blk_one_page:
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, lr}
-	mov	r4, r1
-	mov	r5, r0
-	mov	r2, #512
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r1, #0
-	mov	r0, r4
-	bl	ftl_memset
-	mov	r3, r4
-	mov	r1, r5
-	movs	r2, #1
-	movs	r0, #2
-	pop	{r4, r5, r6, lr}
-	b	zftl_read
-	.size	StorageSysDataLoad, .-StorageSysDataLoad
-	.section	.text.FlashBootVendorRead,"ax",%progbits
-	.align	1
-	.global	FlashBootVendorRead
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FlashBootVendorRead, %function
-FlashBootVendorRead:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	mov	r3, r2
-	mov	r2, r1
-	add	r1, r0, #512
-	movs	r0, #2
-	b	zftl_read
-	.size	FlashBootVendorRead, .-FlashBootVendorRead
-	.section	.text.ftl_read,"ax",%progbits
-	.align	1
-	.global	ftl_read
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_read, %function
-ftl_read:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	zftl_read
-	.size	ftl_read, .-ftl_read
-	.section	.text.gc_check_data_one_wl,"ax",%progbits
-	.align	1
-	.global	gc_check_data_one_wl
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	gc_check_data_one_wl, %function
-gc_check_data_one_wl:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #32
-	ldr	r4, .L3711
-	ldr	r3, .L3711+4
-	ldr	r2, [r4, #8]
-	ldr	r7, [r3]
-	mov	r8, r3
-	cbnz	r2, .L3683
+	ldr	r4, .L3746
+	mov	r0, r1
+	movw	r5, #65535
+	ldr	r6, .L3746+4
+	ldrb	r3, [r4, #4]	@ zero_extendqisi2
+	ldrb	ip, [r6]	@ zero_extendqisi2
+	add	r2, r4, r3, lsl #1
+	ldrh	r7, [r2, #36]
+	ldrh	r2, [r4, #2]
+.L3718:
+	cmp	r7, r5
+	beq	.L3720
+	cbz	r0, .L3721
+	strh	r2, [r4, #2]	@ movhi
+.L3721:
+	cbz	r1, .L3722
+	strb	r3, [r4, #4]
+.L3722:
+	ldr	r8, .L3746+24
 	movs	r0, #1
+	ldr	r10, .L3746+28
+	mov	fp, #1
 	bl	buf_alloc
-	str	r0, [r4, #8]
-.L3683:
-	ldr	r5, [r4, #8]
-	cbnz	r5, .L3684
-	mov	r2, #612
-	ldr	r1, .L3711+8
-	ldr	r0, .L3711+12
-	bl	printf
-.L3684:
-	add	r3, r7, #96
-	mov	r10, #0
-.L3685:
-	ldrb	r1, [r7, #89]	@ zero_extendqisi2
-	cmp	r10, r1
-	bge	.L3695
-	movs	r6, #1
-	b	.L3696
-.L3694:
-	ldr	r2, .L3711+16
-	ldrh	r1, [r3]
-	ldrh	ip, [r2]
-	ldr	r2, .L3711+20
-	ldrb	r0, [r2]	@ zero_extendqisi2
-	mul	ip, ip, r1
-	cmp	r0, #2
-	beq	.L3686
-	ldr	r1, .L3711+24
-	ldrb	r1, [r1]	@ zero_extendqisi2
-	cmp	r1, #0
-	beq	.L3687
-.L3686:
-	ldrh	r1, [r4, #12]
-	subs	r1, r1, #1
-	add	r1, r1, ip
-	add	r1, r1, r6
-	orr	r1, r1, r0, lsl #24
-.L3689:
-	str	r1, [r5, #24]
+	mov	r5, r0
+.L3723:
+	ldrb	r1, [r4, #6]	@ zero_extendqisi2
+	cmp	fp, r1
+	ble	.L3733
 	mov	r0, r5
+	bl	zbuf_free
+	ldrb	r3, [r4, #4]	@ zero_extendqisi2
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	cmp	r2, r3
+	strb	r3, [r4, #4]
+	bne	.L3717
+	ldrh	r3, [r4, #2]
+	adds	r3, r3, #1
+	strh	r3, [r4, #2]	@ movhi
+	movs	r3, #0
+	strb	r3, [r4, #4]
+.L3717:
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3720:
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	cmp	r3, ip
+	itt	eq
+	moveq	r3, #0
+	addeq	r2, r2, #1
+	add	r1, r4, r3, lsl #1
+	it	eq
+	uxtheq	r2, r2
+	ldrh	r7, [r1, #36]
+	it	eq
+	moveq	r0, #1
 	movs	r1, #1
-	str	r3, [sp, #28]
+	b	.L3718
+.L3733:
+	ldrh	r3, [r8]
+	cmp	r1, #2
+	mul	r2, r7, r3
+	bne	.L3724
+	ldrh	r3, [r4, #2]
+	add	r3, r2, r3, lsl #1
+	subs	r3, r3, #1
+.L3745:
+	ldr	r2, .L3746+8
+	add	r3, r3, fp
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	orr	r3, r3, r2, lsl #24
+.L3744:
+	str	r3, [r5, #24]
+	movs	r1, #1
+	mov	r0, r5
 	bl	sblk_read_page
-	ldr	r1, [r5, #36]
-	ldr	fp, .L3711+68
-	ldr	r3, [sp, #28]
-	adds	r1, r1, #1
-	beq	.L3690
-	ldr	r0, [fp]
-	ldrh	ip, [r4, #18]
-	ldr	r1, [r5, #12]
-	ldr	r2, [r0, ip, lsl #2]
-	ldr	r0, [r1, #4]
-	cmp	r2, r0
-	bne	.L3690
-	ldr	r0, .L3711+28
-	ldr	r1, [r1, #8]
-	ldr	r0, [r0]
-	ldr	r0, [r0, ip, lsl #2]
-	cmp	r0, r1
-	beq	.L3691
-.L3690:
-	ldr	r1, [fp]
-	ldrh	r0, [r4, #18]
-	ldr	r0, [r1, r0, lsl #2]
-	adds	r0, r0, #1
-	beq	.L3691
-	ldr	r6, .L3711+32
-	ldrb	r3, [r7, #89]	@ zero_extendqisi2
-	ldr	r0, .L3711+36
-	ldrh	r2, [r6]
-	muls	r3, r2, r3
-	movs	r2, #4
-	bl	rknand_print_hex
-	ldrh	r2, [r6]
-	ldrb	r3, [r7, #89]	@ zero_extendqisi2
-	ldr	r6, .L3711+28
-	ldr	r0, .L3711+40
-	muls	r3, r2, r3
-	ldr	r1, [r6]
-	movs	r2, #4
-	bl	rknand_print_hex
-	ldr	r3, .L3711+44
-	ldr	r3, [r3]
-	lsls	r3, r3, #21
-	bpl	.L3692
+	ldr	r3, [r5, #36]
+	adds	r2, r3, #1
+	beq	.L3730
+	cmp	r3, #512
+	beq	.L3730
 	ldr	r3, [r5, #12]
-	ldrh	r2, [r4, #18]
-	ldr	r1, [fp]
-	ldr	r0, [r3, #12]
-	str	r0, [sp, #16]
-	ldr	r0, [r3, #8]
-	str	r0, [sp, #12]
-	ldr	r0, [r3, #4]
-	str	r0, [sp, #8]
-	ldr	r3, [r3]
-	ldr	r0, .L3711+48
+	ldr	r3, [r3, #4]
+	mov	r0, r3
 	str	r3, [sp, #4]
-	ldr	r3, [r6]
-	ldr	r3, [r3, r2, lsl #2]
-	str	r3, [sp]
-	ldr	r3, [r1, r2, lsl #2]
-	ldr	r2, [r5, #36]
-	ldr	r1, [r5, #24]
-	bl	printf
-.L3692:
-	ldr	r3, [r8]
-	movs	r1, #0
-	ldrh	r0, [r3, #80]
-	bl	ftl_sblk_dump
-	ldr	r3, .L3711+52
-	movs	r1, #0
-	ldrh	r2, [r7, #80]
-	ldr	r3, [r3]
-	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r2, [r8]
-	ldr	r3, [r2, #556]
-	adds	r3, r3, #1
-	str	r3, [r2, #556]
-	ldr	r3, .L3711+56
-	ldr	r3, [r3]
-	ldr	r2, [r3, #156]
-	ldr	r3, .L3711+60
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #12]
+	adds	r0, r0, #1
+	ldr	r3, [sp, #4]
+	bne	.L3732
+	ldr	r2, .L3746+12
+	ldr	r2, [r2]
+	cmp	r3, r2
+	bcs	.L3732
+	movs	r2, #0
+	add	r1, sp, #12
+	mov	r0, r3
+	bl	pm_log2phys
+.L3732:
+	ldr	r2, [r5, #24]
+	ldr	r3, [sp, #12]
 	cmp	r2, r3
-	bne	.L3697
-	ldr	r0, [r5, #24]
-	bl	ftl_mask_bad_block
-.L3697:
-	mov	r0, #-1
-	b	.L3682
-.L3687:
-	ldrh	r1, [r4, #12]
-	cmp	r0, #3
-	add	r1, r1, ip
-	it	eq
-	orreq	r1, r1, r6, lsl #24
-	b	.L3689
-.L3691:
-	ldrh	r1, [r4, #18]
-	adds	r6, r6, #1
-	adds	r1, r1, #1
-	strh	r1, [r4, #18]	@ movhi
-.L3696:
-	ldrh	r1, [r4, #16]
-	cmp	r6, r1
-	ble	.L3694
-	add	r10, r10, #1
-	adds	r3, r3, #2
-	b	.L3685
-.L3695:
-	ldrh	r3, [r4, #12]
-	adds	r2, r3, #1
-	strh	r2, [r4, #12]	@ movhi
-	ldr	r2, .L3711+64
-	ldrb	r0, [r2]	@ zero_extendqisi2
-	cbz	r0, .L3682
-	movs	r0, #0
-	adds	r3, r3, #2
-	strh	r3, [r4, #12]	@ movhi
-.L3693:
-.L3682:
-	add	sp, sp, #32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3712:
+	bne	.L3730
+	ldr	r1, .L3746+16
+	ldrh	r3, [r4, #20]
+	ldr	r1, [r1]
+	str	r2, [r1, r3, lsl #2]
+	adds	r3, r3, #1
+	strh	r3, [r4, #20]	@ movhi
+.L3730:
+	ldrh	r3, [r4, #22]
+	add	fp, fp, #1
+	adds	r3, r3, #1
+	strh	r3, [r4, #22]	@ movhi
+	b	.L3723
+.L3724:
+	cmp	r1, #3
+	bne	.L3726
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	cbnz	r3, .L3727
+	ldr	r3, .L3746+20
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L3728
+.L3727:
+	ldrh	r3, [r4, #2]
+	add	r3, r3, r3, lsl #1
+	subs	r3, r3, #1
+	add	r3, r3, r2
+	b	.L3745
+.L3728:
+	ldrh	r3, [r4, #2]
+	add	r3, r3, r2
+	orr	r3, r3, fp, lsl #24
+	b	.L3744
+.L3726:
+	ldrh	r3, [r4, #2]
+	add	r3, r3, r2
+	b	.L3744
+.L3747:
 	.align	2
-.L3711:
-	.word	.LANCHOR64
-	.word	.LANCHOR10
-	.word	.LANCHOR219
-	.word	.LC0
-	.word	.LANCHOR105
-	.word	.LANCHOR73
-	.word	.LANCHOR35
-	.word	.LANCHOR156
+.L3746:
+	.word	.LANCHOR71
+	.word	.LANCHOR80
 	.word	.LANCHOR79
-	.word	.LC229
-	.word	.LC230
-	.word	.LANCHOR14
-	.word	.LC231
-	.word	.LANCHOR9
-	.word	.LANCHOR104
-	.word	1145785929
-	.word	.LANCHOR74
-	.word	.LANCHOR155
-	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
-	.global	__aeabi_idivmod
-	.section	.text.ftl_update_l2p_map,"ax",%progbits
+	.word	.LANCHOR128
+	.word	.LANCHOR77
+	.word	.LANCHOR37
+	.word	.LANCHOR111
+	.word	.LANCHOR36
+	.size	gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page
+	.section	.text.gc_scan_src_blk,"ax",%progbits
 	.align	1
-	.global	ftl_update_l2p_map
+	.global	gc_scan_src_blk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_update_l2p_map, %function
-ftl_update_l2p_map:
-	@ args = 0, pretend = 0, frame = 24
+	.type	gc_scan_src_blk, %function
+gc_scan_src_blk:
+	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L3742
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #24
-	ldrb	r7, [r0, #9]	@ zero_extendqisi2
-	mov	r6, r0
-	ldrh	r3, [r3]
-	ldr	r2, .L3742+4
-	muls	r7, r3, r7
-	ldr	r4, [r2]
-	ldrh	r3, [r0, #12]
-	str	r2, [sp, #4]
-	add	r4, r4, r3, lsl #2
-	add	r3, r7, #1073741824
-	subs	r3, r3, #1
-	ldr	r3, [r4, r3, lsl #2]
-	adds	r3, r3, #1
-	beq	.L3714
-	movw	r2, #1733
-	ldr	r1, .L3742+8
-	ldr	r0, .L3742+12
+	movw	r3, #65535
+	ldr	r4, .L3813
+	sub	sp, sp, #32
+	ldrh	r2, [r4]
+	cmp	r2, r3
+	bne	.L3749
+	mov	r2, #1504
+	ldr	r1, .L3813+4
+	ldr	r0, .L3813+8
 	bl	printf
-.L3714:
-	movs	r5, #0
-	subs	r4, r4, #4
-	mov	r10, r5
-.L3715:
-	cmp	r10, r7
-	bne	.L3721
-	ldr	r3, .L3742+16
-	ldr	r4, .L3742+20
+.L3749:
+	ldrh	r1, [r4]
+	movw	r3, #65535
+	cmp	r1, r3
+	beq	.L3781
+	ldr	r3, .L3813+12
 	ldr	r3, [r3]
-	tst	r3, #4096
-	beq	.L3722
-	ldrh	r1, [r6]
-	mov	r2, r5
-	ldr	r3, [r4]
-	ldr	r0, .L3742+24
-	ldrh	r3, [r3, r1, lsl #1]
-	bl	printf
-.L3722:
-	ldrh	r2, [r6]
-	ldr	r3, [r4]
-	strh	r5, [r3, r2, lsl #1]	@ movhi
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3721:
-	ldr	r8, [r4, #4]!
-	cmp	r8, #-1
-	beq	.L3716
-	ldr	r3, .L3742+28
-	mov	r0, r8
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	lsls	r1, r1, #7
-	bl	__aeabi_uidiv
-	uxth	r3, r0
-	str	r3, [sp]
-	ldr	r3, .L3742+16
+	lsls	r0, r3, #23
+	bpl	.L3751
+	ldr	r3, .L3813+16
+	ldr	r0, .L3813+20
 	ldr	r3, [r3]
-	lsls	r2, r3, #19
-	bpl	.L3717
-	mov	r3, r10
-	mov	r2, r8
-	ldr	r1, [sp]
-	ldr	r0, .L3742+32
+	ldrh	r2, [r3, r1, lsl #1]
 	bl	printf
-.L3717:
-	mov	r8, r4
-	mov	fp, r10
-.L3720:
-	ldr	r0, [r8]
-	adds	r3, r0, #1
-	beq	.L3718
-	ldr	r3, .L3742+28
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	lsls	r1, r1, #7
-	bl	__aeabi_uidiv
-	ldr	r3, [sp]
-	uxth	r0, r0
-	cmp	r3, r0
-	bne	.L3718
-	ldrb	r3, [r6, #9]	@ zero_extendqisi2
-	mov	r0, fp
-	mov	r1, r3
-	str	r3, [sp, #12]
-	bl	__aeabi_idivmod
-	ldr	r3, .L3742+36
-	adds	r1, r1, #8
-	ldrh	r0, [r6, r1, lsl #1]
-	ldrh	r2, [r3]
-	ldr	r3, [sp, #12]
-	muls	r2, r0, r2
-	mov	r1, r3
-	mov	r0, fp
-	str	r2, [sp, #8]
-	bl	__aeabi_idiv
-	ldr	r2, [sp, #8]
-	add	r2, r2, r0
-	ldr	r0, .L3742+40
-	str	r2, [sp, #20]
-	ldr	r1, [r8]
-	bl	pm_ppa_update_check
-	cbz	r0, .L3719
-	ldr	r1, [sp, #4]
-	mov	r3, r7
-	movs	r2, #4
-	ldr	r0, .L3742+44
-	ldr	r1, [r1]
-	bl	rknand_print_hex
-.L3719:
-	adds	r5, r5, #1
-	movs	r2, #1
-	uxth	r5, r5
-	add	r1, sp, #20
-	ldr	r0, [r8]
-	bl	pm_log2phys
-	mov	r3, #-1
-	str	r3, [r8]
-.L3718:
-	add	fp, fp, #1
-	add	r8, r8, #4
-	cmp	r7, fp
-	bne	.L3720
-.L3716:
-	add	r10, r10, #1
-	b	.L3715
-.L3743:
-	.align	2
-.L3742:
-	.word	.LANCHOR87
-	.word	.LANCHOR111
-	.word	.LANCHOR220
-	.word	.LC0
-	.word	.LANCHOR14
-	.word	.LANCHOR9
-	.word	.LC235
-	.word	.LANCHOR125
-	.word	.LC232
-	.word	.LANCHOR105
-	.word	.LC233
-	.word	.LC234
-	.size	ftl_update_l2p_map, .-ftl_update_l2p_map
-	.section	.text.ftl_alloc_new_data_sblk,"ax",%progbits
-	.align	1
-	.global	ftl_alloc_new_data_sblk
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_alloc_new_data_sblk, %function
-ftl_alloc_new_data_sblk:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, lr}
-	mov	r5, r0
-	ldrh	r6, [r0]
-	bl	ftl_update_l2p_map
-	bl	pm_flush
-	ldrh	r0, [r5]
+.L3751:
+	ldr	r1, .L3813+24
+	ldrh	r0, [r4]
+	bl	ftl_get_blk_list_in_sblk
+	uxtb	r0, r0
+	strb	r0, [r4, #5]
+	cbnz	r0, .L3752
 	movw	r3, #65535
-	cmp	r0, r3
-	beq	.L3745
-	bl	zftl_insert_data_list
-.L3745:
-	ldr	r4, .L3749
-	mov	r0, r5
-	ldr	r1, [r4]
-	adds	r1, r1, #16
-	cmp	r5, r1
-	ite	eq
-	moveq	r1, #2
-	movne	r1, #3
-	bl	ftl_open_sblk_init
-	ldr	r3, [r4]
-	ldr	r3, [r3, #560]
-	cmp	r3, r6
-	bne	.L3747
-	movw	r5, #65535
-	cmp	r6, r5
-	beq	.L3747
-	mov	r1, r6
-	ldr	r0, .L3749+4
-	bl	printf
-	ldr	r3, [r4]
-	ldr	r0, [r3, #564]
-	bl	gc_mark_bad_ppa
-	ldr	r3, [r4]
-	mov	r2, #-1
-	str	r5, [r3, #560]
-	str	r2, [r3, #564]
-.L3747:
-	bl	ftl_ext_info_flush
-	movs	r0, #0
-	bl	ftl_info_flush
-	bl	lpa_rebuild_hash
-	movs	r0, #0
-	pop	{r4, r5, r6, pc}
-.L3750:
-	.align	2
-.L3749:
-	.word	.LANCHOR10
-	.word	.LC236
-	.size	ftl_alloc_new_data_sblk, .-ftl_alloc_new_data_sblk
-	.section	.text.ftl_write_commit,"ax",%progbits
-	.align	1
-	.global	ftl_write_commit
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_write_commit, %function
-ftl_write_commit:
-	@ args = 0, pretend = 0, frame = 24
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #32
-	ldr	r7, .L3811
+	strh	r3, [r4]	@ movhi
+.L3748:
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
 .L3752:
-	ldr	r1, .L3811+4
-	ldrb	r3, [r1]	@ zero_extendqisi2
-	cmp	r3, #0
-	beq	.L3754
-	ldr	r0, .L3811+8
-	subs	r3, r3, #1
-	strb	r3, [r1]
-	ldrb	r2, [r0]	@ zero_extendqisi2
-	str	r2, [sp, #8]
-	add	r2, r2, r2, lsl #1
-	ldr	r4, [sp, #8]
-	add	r2, r7, r2, lsl #4
-	str	r2, [sp, #20]
-	movs	r2, #48
-	muls	r2, r4, r2
-	ldr	r4, .L3811+12
-	ldr	r3, [r4]
-	adds	r5, r7, r2
-	ldrb	r2, [r7, r2]	@ zero_extendqisi2
-	strb	r2, [r0]
-	ldr	r2, [r5, #20]
+	ldr	r5, .L3813+28
+	ldrh	r3, [r4]
+	ldr	r2, [r5]
+	add	r2, r2, r3, lsl #2
+	ldrb	r2, [r2, #2]	@ zero_extendqisi2
+	and	r2, r2, #224
+	cmp	r2, #32
+	beq	.L3753
+	cmp	r2, #224
+	beq	.L3753
+	cbz	r2, .L3754
+	ldr	r2, .L3813+32
+	ldr	r2, [r2]
+	ldrh	r1, [r2, #16]
+	cmp	r1, r3
+	beq	.L3753
+	ldrh	r1, [r2, #48]
+	cmp	r1, r3
+	beq	.L3753
+	ldrh	r2, [r2, #80]
 	cmp	r2, r3
-	bcc	.L3756
-	mov	r2, #510
-	ldr	r1, .L3811+16
-	ldr	r0, .L3811+20
+	bne	.L3807
+.L3753:
+	movw	r3, #65535
+	movs	r0, #0
+	strh	r3, [r4]	@ movhi
+	strh	r0, [r4, #20]	@ movhi
+	b	.L3748
+.L3754:
+	ldr	r5, .L3813+16
+	ldr	r1, [r5]
+	ldrh	r3, [r1, r3, lsl #1]
+	cbz	r3, .L3756
+	movw	r2, #1529
+	ldr	r1, .L3813+4
+	ldr	r0, .L3813+8
 	bl	printf
 .L3756:
-	ldr	r2, [sp, #8]
-	movs	r3, #48
-	mla	r3, r3, r2, r7
-	ldr	r2, [r4]
-	ldr	r8, [r3, #20]
-	cmp	r8, r2
-	bcc	.L3757
-	ldr	r0, [sp, #20]
-	bl	zbuf_free
-	mov	r0, #-1
-.L3751:
-	add	sp, sp, #32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+	ldrh	r2, [r4]
+	movs	r1, #0
+	ldr	r3, [r5]
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	b	.L3753
+.L3807:
+	add	r0, r4, r0, lsl #1
+	movw	r3, #65535
+	ldrh	r7, [r0, #34]
+	cmp	r7, r3
+	bne	.L3757
+	movw	r2, #1539
+	ldr	r1, .L3813+4
+	ldr	r0, .L3813+8
+	bl	printf
 .L3757:
-	ldr	r2, [r3, #12]
-	ldr	fp, [r3, #4]
-	ldrb	r4, [r3, #41]	@ zero_extendqisi2
-	ldrb	r3, [r3, #40]	@ zero_extendqisi2
-	str	r2, [sp, #12]
-	str	r3, [sp, #16]
-	ldr	r3, .L3811+24
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L3759
-	ldr	r3, .L3811+28
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	add	r3, r7, r3, lsl #4
-.L3760:
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	cmp	r2, #255
-	bne	.L3761
-	ldr	r2, [r3, #20]
-	cmp	r8, r2
-	bne	.L3759
-	ldr	r0, [r3, #4]
-	lsls	r4, r4, #9
-	ldr	r3, [sp, #16]
-	add	r1, fp, r4
-	add	r0, r0, r4
-	lsls	r2, r3, #9
-	bl	ftl_memcpy
-	ldr	r0, [sp, #20]
-	bl	zbuf_free
-	b	.L3752
-.L3761:
-	add	r2, r2, r2, lsl #1
-	add	r3, r7, r2, lsl #4
-	b	.L3760
-.L3759:
-	mov	r0, r8
-	bl	lpa_hash_get_ppa
-	str	r0, [sp, #28]
-	adds	r0, r0, #1
-	bne	.L3763
-	movs	r2, #0
-	add	r1, sp, #28
-	mov	r0, r8
-	bl	pm_log2phys
-.L3763:
-	ldr	r3, .L3811+32
-	ldr	r2, .L3811
-	ldr	r6, [r3]
-	movs	r3, #0
-	adds	r6, r6, #16
-.L3766:
-	ldr	r1, [r2, #20]
-	cmp	r8, r1
-	bne	.L3764
-	ldrb	r1, [r2, #2]	@ zero_extendqisi2
-	lsls	r0, r1, #28
-	bpl	.L3764
-	movs	r2, #48
-	bic	r1, r1, #8
-	mla	r3, r2, r3, r7
-	strb	r1, [r3, #2]
-	ldr	r5, [r3, #4]
-	ldr	r3, [r3, #24]
-	str	r3, [sp, #28]
-.L3765:
-	ldr	r10, .L3811+36
-	ldr	r2, [sp, #16]
-	ldrb	r3, [r10]	@ zero_extendqisi2
-	cmp	r2, r3
-	bcs	.L3790
-	cbz	r5, .L3768
-	cbz	r4, .L3769
-	lsls	r2, r4, #9
-	mov	r1, r5
-	mov	r0, fp
-	bl	ftl_memcpy
-	ldr	r3, .L3811+32
-	ldr	r6, [r3]
-	adds	r6, r6, #48
-.L3769:
-	ldr	r3, [sp, #16]
-	ldrb	r2, [r10]	@ zero_extendqisi2
-	add	r4, r4, r3
-	cmp	r4, r2
-	bcc	.L3770
-	ldr	r3, .L3811+32
-	ldr	r6, [r3]
-	adds	r6, r6, #16
-.L3790:
-	mov	r10, #0
-	b	.L3767
-.L3764:
-	adds	r3, r3, #1
-	adds	r2, r2, #48
-	cmp	r3, #32
-	bne	.L3766
-	movs	r5, #0
-	b	.L3765
-.L3770:
-	lsls	r0, r4, #9
-	subs	r2, r2, r4
-	lsls	r2, r2, #9
-	adds	r1, r5, r0
-	add	r0, r0, fp
-	bl	ftl_memcpy
-	b	.L3790
-.L3812:
-	.align	2
-.L3811:
-	.word	.LANCHOR52
-	.word	.LANCHOR60
-	.word	.LANCHOR59
-	.word	.LANCHOR122
-	.word	.LANCHOR221
-	.word	.LC0
-	.word	.LANCHOR123
-	.word	.LANCHOR177
-	.word	.LANCHOR10
-	.word	.LANCHOR125
-.L3768:
-	ldr	r3, [sp, #28]
-	adds	r3, r3, #1
-	beq	.L3771
+	ldrh	ip, [r4]
+	ldr	r1, [r5]
+	ldr	r6, .L3813+36
+	ldr	r0, .L3813+40
+	add	r1, r1, ip, lsl #2
+	ldrh	r3, [r6]
+	ldrh	r2, [r0]
+	mov	r8, r6
+	ldrb	r1, [r1, #2]	@ zero_extendqisi2
+	subs	r3, r3, #1
+	str	r0, [sp, #12]
+	uxth	r3, r3
+	and	r1, r1, #224
+	muls	r2, r7, r2
+	cmp	r1, #160
+	bne	.L3782
+	ldr	r1, .L3813+44
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	cmp	r1, #2
+	it	eq
+	ldreq	r3, .L3813+48
+	uxth	r10, r1
+	orr	r2, r2, r1, lsl #24
+	ldr	r1, .L3813+52
+	it	eq
+	ldrheq	r3, [r3]
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	itt	eq
+	addeq	r3, r3, #-1
+	uxtheq	r3, r3
+	cbnz	r1, .L3760
+	ldr	r1, .L3813+56
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	cbz	r1, .L3758
+.L3760:
+	ldr	r3, .L3813+48
+	ldrh	r3, [r3]
+	subs	r3, r3, #1
+	uxth	r3, r3
+.L3758:
+	movs	r6, #0
+	strb	r10, [r4, #6]
+	orrs	r3, r3, r2
 	movs	r0, #1
+	str	r3, [sp, #4]
+	strh	r6, [r4, #2]	@ movhi
+	strb	r6, [r4, #4]
+	strh	r6, [r4, #22]	@ movhi
+	strh	r6, [r4, #24]	@ movhi
 	bl	buf_alloc
-	ldr	r3, [sp, #28]
+	ldr	r3, [sp, #4]
 	mov	r5, r0
-	str	r8, [r0, #20]
 	movs	r1, #1
 	str	r3, [r0, #24]
 	bl	sblk_read_page
-	ldr	r3, [r5, #12]
-	ldr	r2, [r3, #12]
-	ldr	r3, [r3, #4]
-	add	r10, r2, #1
-	cmp	r8, r3
-	bne	.L3772
-	ldr	r3, [r5, #36]
-	adds	r3, r3, #1
-	bne	.L3773
-.L3772:
-	ldr	r3, .L3813
-	ldr	r0, .L3813+4
-	ldr	r2, [r3]
-	ldr	r3, [r2, #552]
-	adds	r3, r3, #1
-	str	r3, [r2, #552]
 	ldr	r3, [r5, #36]
-	ldrb	r1, [r5, #1]	@ zero_extendqisi2
-	ldr	r2, [sp, #28]
-	str	r3, [sp]
-	mov	r3, r8
-	bl	printf
-	movs	r3, #4
-	ldr	r1, [r5, #12]
-	mov	r2, r3
+	strh	r6, [r4, #20]	@ movhi
+	adds	r1, r3, #1
+	beq	.L3811
+	cmp	r3, #512
+	bne	.L3762
+.L3811:
+	mov	r0, r5
+	bl	zbuf_free
+.L3809:
+	mov	r0, #-1
+	b	.L3748
+.L3782:
+	mov	r10, #1
+	b	.L3758
+.L3762:
+	ldr	r6, [r5, #12]
+	ldr	r3, .L3813+60
+	ldr	r2, [r6]
+	str	r3, [sp, #16]
+	cmp	r2, r3
+	beq	.L3763
+	movw	r2, #1577
+.L3812:
+	ldr	r1, .L3813+4
 	ldr	r0, .L3813+8
-	bl	rknand_print_hex
-.L3773:
-	ldr	r3, [r5, #12]
-	ldr	r3, [r3, #4]
-	cmp	r8, r3
-	bne	.L3774
-	ldr	r3, [r5, #36]
-	adds	r3, r3, #1
-	bne	.L3775
-.L3774:
-	movw	r2, #581
-	ldr	r1, .L3813+12
-	ldr	r0, .L3813+16
 	bl	printf
-.L3775:
-	cbz	r4, .L3776
-	ldr	r3, [sp, #28]
-	lsls	r2, r4, #9
-	adds	r3, r3, #1
-	beq	.L3777
+	b	.L3811
+.L3763:
+	ldr	r3, .L3813+64
+	ldrh	r2, [r8]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	smulbb	r2, r2, r3
+	smulbb	r2, r2, r10
+	uxth	r2, r2
+	str	r2, [sp, #8]
+	ldr	r2, .L3813+68
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r2, #2
+	bne	.L3764
+	cmp	r10, #3
+	bne	.L3764
+	ldr	r2, .L3813+48
+	ldr	fp, .L3813+84
+	ldr	r10, .L3813+76
+	ldrh	r6, [r2]
+	ldrh	r0, [fp]
 	ldr	r1, [r5, #4]
-	mov	r0, fp
+	lsls	r6, r6, #2
+	smulbb	r6, r6, r3
+	ldr	r3, [r10]
+	subs	r6, r6, r0
+	lsrs	r0, r0, #2
+	uxth	r6, r6
+	add	r0, r3, r0, lsl #2
+	mov	r2, r6
 	bl	ftl_memcpy
-.L3778:
-	ldr	r3, .L3813
-	ldr	r6, [r3]
-	adds	r6, r6, #48
-.L3776:
-	ldr	r3, [sp, #16]
-	add	r4, r4, r3
-	ldr	r3, .L3813+20
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	cmp	r4, r2
-	bcc	.L3779
-	bls	.L3780
-	ldr	r3, .L3813
-	ldr	r6, [r3]
-	adds	r6, r6, #16
-.L3780:
-	cbz	r5, .L3767
-	ldrb	r3, [r5, #2]	@ zero_extendqisi2
-	mov	r1, r5
-	ldr	r0, .L3813+24
-	bic	r3, r3, #8
-	strb	r3, [r5, #2]
-	bl	buf_remove_buf
+	ldr	r3, [r5, #12]
+	ldr	r3, [r3, #4]
+	str	r3, [sp, #20]
+	cbz	r3, .L3765
+	mov	r1, r6
+	ldr	r0, [r5, #4]
+	bl	js_hash
+	ldr	r3, [sp, #20]
+	cmp	r3, r0
+	beq	.L3765
 	mov	r0, r5
 	bl	zbuf_free
+	ldr	r1, [r5, #12]
+	mov	r3, r6
+.L3810:
+	ldr	r2, [r5, #24]
+	ldr	r1, [r1, #4]
+	ldr	r0, .L3813+72
+	bl	printf
+	b	.L3809
+.L3765:
+	ldr	r3, .L3813+52
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L3766
+	ldr	r3, .L3813+56
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L3767
+.L3766:
+	ldr	r3, [sp, #4]
+	subs	r3, r3, #1
+	str	r3, [r5, #24]
+.L3768:
+	movs	r1, #1
+	mov	r0, r5
+	bl	sblk_read_page
+	ldr	r3, [r5, #36]
+	adds	r2, r3, #1
+	beq	.L3811
+	cmp	r3, #512
+	beq	.L3811
+	ldr	r3, [r5, #12]
+	ldr	r2, [sp, #16]
+	ldr	r3, [r3]
+	cmp	r3, r2
+	beq	.L3771
+	movw	r2, #1618
+	b	.L3812
 .L3767:
-	ldrh	r3, [r6, #6]
-	cbnz	r3, .L3782
-	bl	ftl_flush
-	mov	r0, r6
-	bl	ftl_alloc_new_data_sblk
-.L3782:
-	mov	r0, r6
-	bl	ftl_get_new_free_page
-	ldr	r2, [sp, #8]
-	movs	r3, #48
-	ldr	r4, [sp, #12]
-	muls	r3, r2, r3
-	adds	r2, r7, r3
-	ldr	r1, [r2, #16]
-	str	r8, [r4, #4]
-	str	r10, [r4, #12]
-	str	r1, [r4]
-	ldr	r1, [sp, #28]
-	str	r1, [r4, #8]
-	str	r1, [r2, #28]
-	movs	r1, #255
-	strb	r1, [r7, r3]
-	ldrb	r3, [r2, #2]	@ zero_extendqisi2
-	ldrh	r1, [r6, #12]
-	str	r0, [r2, #24]
-	orr	r3, r3, #10
-	ldr	r0, .L3813+28
-	strb	r3, [r2, #2]
-	ldrh	r3, [r6, #10]
-	add	r3, r3, r1
-	ldr	r1, [sp, #20]
+	ldr	r2, [sp, #12]
+	ldrh	r3, [r8]
+	ldrh	r2, [r2]
 	subs	r3, r3, #1
-	strh	r3, [r2, #32]	@ movhi
-	bl	buf_add_tail
-	ldr	r2, .L3813+32
-	movs	r1, #0
-	ldrb	r3, [r2]	@ zero_extendqisi2
-	adds	r3, r3, #1
-	uxtb	r3, r3
-	strb	r3, [r2]
-	cmp	r3, #2
-	ldr	r2, .L3813+36
-	str	r1, [r2]
-	ldrh	r2, [r6, #6]
-	bhi	.L3783
-	cmp	r2, #1
-	bne	.L3755
-.L3783:
-	ldr	r5, .L3813+28
-	mov	ip, #48
-	ldrb	r1, [r6, #5]	@ zero_extendqisi2
-	ldrb	r0, [r5]	@ zero_extendqisi2
-	cmp	r1, #0
-	mov	r1, #0
-	ite	ne
-	movne	r4, #2
-	moveq	r4, #1
-	cmp	r2, #1
-	it	eq
-	moveq	r4, r3
-	mov	r2, r0
-.L3787:
-	cmp	r1, r4
-	bne	.L3788
-	strb	r2, [r5]
-	uxtb	r1, r1
-	ldr	r2, .L3813+32
-	add	r0, r0, r0, lsl #1
-	subs	r3, r3, r1
-	add	r0, r7, r0, lsl #4
-	strb	r3, [r2]
-	bl	sblk_prog_page
-	ldrh	r3, [r6, #6]
-	cmp	r3, #1
-	bne	.L3755
-	bl	sblk_wait_write_queue_completed
-	bl	ftl_write_completed
-	mov	r0, r6
-	bl	ftl_write_last_log_page
-	mov	r0, r6
-	bl	ftl_alloc_new_data_sblk
-.L3755:
-	ldr	r3, .L3813+40
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #0
-	bne	.L3752
-.L3754:
-	bl	ftl_write_completed
-	movs	r0, #0
-	b	.L3751
-.L3779:
-	ldr	r3, [sp, #28]
-	subs	r2, r2, r4
-	lsls	r2, r2, #9
-	lsls	r0, r4, #9
-	adds	r3, r3, #1
-	beq	.L3781
+	uxth	r3, r3
+	muls	r7, r2, r7
+	orr	r3, r3, #33554432
+	orrs	r7, r7, r3
+	str	r7, [r5, #24]
+	b	.L3768
+.L3771:
+	ldrh	r2, [fp]
 	ldr	r1, [r5, #4]
-	add	r1, r1, r0
-	add	r0, r0, fp
+	ldr	r0, [r10]
+.L3808:
+	ldr	r7, .L3813+76
+	mov	r8, #0
 	bl	ftl_memcpy
-	b	.L3780
-.L3781:
-	movs	r1, #0
-	add	r0, r0, fp
-	bl	ftl_memset
-	b	.L3780
-.L3788:
-	mul	r2, ip, r2
-	adds	r1, r1, #1
-	ldrb	r2, [r7, r2]	@ zero_extendqisi2
-	b	.L3787
-.L3789:
-	lsls	r2, r4, #9
-	mov	r10, r5
-.L3777:
-	movs	r1, #0
-	mov	r0, fp
-	bl	ftl_memset
-	b	.L3778
-.L3771:
-	cmp	r4, #0
-	bne	.L3789
-	mov	r10, r4
-	mov	r5, r4
-	b	.L3776
+	ldr	r10, .L3813+88
+	ldr	r6, [r7]
+	ldr	fp, .L3813+92
+	subs	r6, r6, #4
+.L3774:
+	ldr	r3, [sp, #8]
+	cmp	r8, r3
+	blt	.L3779
+	mov	r0, r5
+	ldr	r5, .L3813+16
+	bl	zbuf_free
+	ldrh	r1, [r4]
+	ldr	r3, [r5]
+	ldrh	r2, [r3, r1, lsl #1]
+	ldrh	r3, [r4, #20]
+	cmp	r2, r3
+	beq	.L3780
+	ldr	r0, .L3813+80
+	bl	printf
+.L3780:
+	ldr	r3, [r5]
+	ldrh	r1, [r4, #20]
+	ldrh	r2, [r4]
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	movs	r3, #0
+	strh	r3, [r4, #24]	@ movhi
+	ldrh	r0, [r4, #20]
+	b	.L3748
 .L3814:
 	.align	2
 .L3813:
+	.word	.LANCHOR71
+	.word	.LANCHOR227
+	.word	.LC0
+	.word	.LANCHOR14
+	.word	.LANCHOR9
+	.word	.LC217
+	.word	.LANCHOR71+36
+	.word	.LANCHOR7
 	.word	.LANCHOR10
-	.word	.LC237
-	.word	.LC195
+	.word	.LANCHOR95
+	.word	.LANCHOR111
+	.word	.LANCHOR79
+	.word	.LANCHOR86
+	.word	.LANCHOR36
+	.word	.LANCHOR37
+	.word	-178307901
+	.word	.LANCHOR80
+	.word	.LANCHOR224
+	.word	.LC218
+	.word	.LANCHOR77
+	.word	.LC219
 	.word	.LANCHOR221
-	.word	.LC0
-	.word	.LANCHOR125
-	.word	.LANCHOR131
-	.word	.LANCHOR177
-	.word	.LANCHOR123
-	.word	.LANCHOR222
-	.word	.LANCHOR60
-	.size	ftl_write_commit, .-ftl_write_commit
-	.section	.text.gc_do_copy_back,"ax",%progbits
+	.word	.LANCHOR75
+	.word	.LANCHOR32
+.L3764:
+	ldr	r3, [sp, #8]
+	ldr	r8, [r5, #4]
+	lsls	r7, r3, #2
+	mov	r0, r8
+	mov	r1, r7
+	bl	js_hash
+	ldr	r3, [r6, #4]
+	cmp	r3, r0
+	beq	.L3773
+	mov	r0, r5
+	bl	zbuf_free
+	ldr	r1, [r5, #12]
+	mov	r3, r7
+	b	.L3810
+.L3773:
+	ldr	r3, .L3815
+	mov	r2, r7
+	mov	r1, r8
+	ldr	r0, [r3]
+	b	.L3808
+.L3779:
+	ldr	r0, [r6, #4]!
+	adds	r3, r0, #1
+	beq	.L3776
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #28]
+	adds	r0, r0, #1
+	bne	.L3777
+	movs	r2, #0
+	add	r1, sp, #28
+	ldr	r0, [r6]
+	bl	pm_log2phys
+.L3777:
+	ldrb	r3, [fp]	@ zero_extendqisi2
+	ldr	r2, [sp, #28]
+	ldrh	r1, [r10]
+	rsb	r3, r3, #24
+	str	r2, [sp, #4]
+	subs	r0, r3, r1
+	movs	r3, #1
+	lsls	r3, r3, r0
+	lsr	r0, r2, r1
+	ldr	r1, .L3815+4
+	subs	r3, r3, #1
+	ands	r0, r0, r3
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	ldrh	r3, [r4]
+	ldr	r2, [sp, #4]
+	cmp	r0, r3
+	bne	.L3776
+	ldrh	r3, [r4, #20]
+	ldr	r1, [r7]
+	str	r2, [r1, r3, lsl #2]
+	adds	r3, r3, #1
+	strh	r3, [r4, #20]	@ movhi
+.L3776:
+	add	r8, r8, #1
+	b	.L3774
+.L3781:
+	movs	r0, #0
+	b	.L3748
+.L3816:
+	.align	2
+.L3815:
+	.word	.LANCHOR77
+	.word	.LANCHOR76
+	.size	gc_scan_src_blk, .-gc_scan_src_blk
+	.section	.text.gc_scan_static_data,"ax",%progbits
 	.align	1
-	.global	gc_do_copy_back
+	.global	gc_scan_static_data
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	gc_do_copy_back, %function
-gc_do_copy_back:
-	@ args = 0, pretend = 0, frame = 56
+	.type	gc_scan_static_data, %function
+gc_scan_static_data:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L3959
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #88
-	ldrb	r0, [r3]	@ zero_extendqisi2
-	cmp	r0, #0
-	bne	.L3816
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r4, .L3833
+	ldr	r3, [r4]
+	ldr	r2, [r3, #544]
+	adds	r2, r2, #1
+	beq	.L3818
+	ldr	r8, .L3833+28
+	movs	r6, #0
+	ldr	r10, .L3833+32
+.L3826:
+	ldr	r3, [r4]
+	movs	r2, #0
+	add	r1, sp, #4
+	uxth	r7, r6
+	ldr	r0, [r3, #544]
+	bl	pm_log2phys
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #1
+	beq	.L3819
+	movs	r0, #1
 	bl	buf_alloc
-	mov	r4, r0
-	cmp	r0, #0
-	beq	.L3815
-	ldr	r6, .L3959+4
-	ldrh	r2, [r6, #22]
-	mov	r0, r2
-	bl	gc_get_src_ppa_from_index
+	ldr	r3, [sp, #4]
+	mov	r5, r0
 	movs	r1, #1
-	adds	r2, r2, #1
-	str	r0, [r4, #24]
-	mov	r7, r0
-	mov	r0, r4
-	strh	r2, [r6, #22]	@ movhi
+	str	r3, [r0, #24]
 	bl	sblk_read_page
-	ldr	r3, [r4, #36]
-	adds	r1, r3, #1
-	beq	.L3818
-	cmp	r3, #512
-	bne	.L3819
-.L3818:
-	movw	r2, #863
-	ldr	r1, .L3959+8
-	ldr	r0, .L3959+12
-	bl	printf
-.L3819:
-	ldr	r3, [r4, #12]
-	ldr	r5, [r3, #4]
-	mov	r0, r5
-	bl	lpa_hash_get_ppa
-	str	r0, [sp, #64]
-	adds	r0, r0, #1
+	ldr	r3, [r5, #36]
+	cmp	r3, #256
 	bne	.L3820
+	ldr	r3, .L3833+4
+	mov	fp, #1
+	ldr	r2, [sp, #4]
+	ldrh	r0, [r3]
+	ldr	r3, .L3833+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	rsb	r3, r3, #24
+	subs	r3, r3, r0
+	lsr	r0, r2, r0
+	lsl	r3, fp, r3
+	ldr	r2, .L3833+12
+	subs	r3, r3, #1
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	ands	r0, r0, r3
+	bl	__aeabi_uidiv
 	movs	r2, #0
-	add	r1, sp, #64
-	mov	r0, r5
-	bl	pm_log2phys
+	mov	r1, fp
+	uxth	r0, r0
+	bl	gc_add_sblk
 .L3820:
-	ldr	r8, [sp, #64]
-	cmp	r7, r8
-	bne	.L3821
-	ldr	r0, .L3959+16
-	movs	r3, #0
-.L3824:
-	adds	r2, r0, r3
-	ldr	r1, [r2, #20]
-	cmp	r5, r1
-	bne	.L3822
-	ldrb	r2, [r2, #2]	@ zero_extendqisi2
-	lsls	r2, r2, #30
-	bpl	.L3822
-	mov	r0, r4
-	bl	zbuf_free
-	ldr	r3, .L3959+20
-	ldr	r3, [r3]
-	lsls	r1, r3, #23
-	bpl	.L3815
-	ldrh	r3, [r6, #22]
-	mov	r2, r7
-	mov	r1, r5
-	ldr	r0, .L3959+24
+	ldr	r2, [r5, #12]
+	ldr	r3, [r4]
+	ldr	r2, [r2, #4]
+	ldr	r3, [r3, #544]
+	cmp	r2, r3
+	beq	.L3821
+	movw	r2, #2162
+	mov	r1, r8
+	mov	r0, r10
 	bl	printf
-.L3815:
-	add	sp, sp, #88
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3822:
-	adds	r3, r3, #48
-	cmp	r3, #1536
-	bne	.L3824
-	movs	r3, #0
-	str	r5, [r4, #20]
-	strb	r3, [r4, #41]
-	ldr	r3, .L3959+28
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	strb	r3, [r4, #40]
-	ldrb	r3, [r4, #2]	@ zero_extendqisi2
-	orr	r3, r3, #10
-	strb	r3, [r4, #2]
-	ldr	r3, [r4, #12]
-	ldr	r3, [r3]
-	str	r3, [r4, #16]
-	ldr	r3, .L3959+20
-	ldr	r3, [r3]
-	lsls	r2, r3, #23
-	bpl	.L3825
-	mov	r0, r5
-	bl	lpa_hash_get_ppa
-	ldrh	r3, [r6, #22]
-	mov	r2, r8
-	str	r7, [sp]
-	mov	r1, r5
-	str	r3, [sp, #4]
-	mov	r3, r0
-	ldr	r0, .L3959+32
-	bl	printf
-.L3825:
-	mov	r0, r4
-	bl	ftl_gc_write_buf
-	bl	ftl_write_commit
-	ldr	r3, .L3959+36
-	ldr	r2, [r3]
-	ldr	r3, [r2, #60]
-	adds	r3, r3, #1
-	str	r3, [r2, #60]
-	ldrh	r3, [r6, #24]
-	adds	r3, r3, #1
-	strh	r3, [r6, #24]	@ movhi
-	b	.L3815
 .L3821:
-	ldr	r3, .L3959+20
-	ldr	r3, [r3]
-	lsls	r3, r3, #23
-	bpl	.L3826
 	mov	r0, r5
-	bl	lpa_hash_get_ppa
-	ldrh	r3, [r6, #22]
-	mov	r2, r8
-	str	r7, [sp]
-	mov	r1, r5
-	str	r3, [sp, #4]
-	mov	r3, r0
-	ldr	r0, .L3959+32
-	bl	printf
-.L3826:
-	mov	r0, r4
 	bl	zbuf_free
-	b	.L3815
-.L3816:
-	ldr	r3, .L3959+40
-	ldr	r7, .L3959+4
-	ldr	r3, [r3]
-	str	r3, [sp, #40]
-	ldr	r3, .L3959+44
-	ldrb	fp, [r3]	@ zero_extendqisi2
-	ldr	r3, [sp, #40]
-	cmp	fp, #3
-	ldrb	r10, [r3, #89]	@ zero_extendqisi2
-	bne	.L3827
-	ldr	r3, .L3959+48
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #0
-	beq	.L3828
-	ldrh	r5, [r7, #566]
-	mov	r1, r10
-	mov	r0, r5
-	bl	__aeabi_idiv
-	ldr	r3, .L3959+52
-	uxth	r4, r0
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L3829
-	ldr	r3, .L3959+56
-	ldrh	r3, [r3, r0, lsl #1]
-	cmp	r3, #0
-	ite	eq
-	moveq	fp, #1
-	movne	fp, #2
-.L3830:
-	smulbb	r0, r10, r4
-	subs	r0, r5, r0
-.L3954:
-	uxth	r3, r0
-	str	r3, [sp, #32]
-.L3831:
-	mul	r3, r10, fp
-	str	r3, [sp, #44]
-	ldr	r3, .L3959+60
+.L3819:
+	ldr	r3, [r4]
+	ldr	r1, .L3833+16
+	ldr	r2, [r3, #544]
+	ldr	r1, [r1]
+	adds	r2, r2, #1
+	cmp	r2, r1
+	str	r2, [r3, #544]
+	bcc	.L3822
+	mov	r2, #-1
+	str	r2, [r3, #544]
+	ldr	r2, [r3, #548]
+	adds	r2, r2, #1
+	str	r2, [r3, #548]
+	bl	ftl_flush
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	movs	r0, #0
+	bl	ftl_info_flush
+.L3817:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3822:
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #1
+	bne	.L3817
+	ldr	r3, .L3833+20
+	adds	r6, r6, #1
 	ldrh	r3, [r3]
-	mul	r10, r10, r3
-	add	r3, r10, #-1
-	ldr	r10, .L3959+56
-	str	r3, [sp, #48]
-	ldr	r3, .L3959+52
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	str	r3, [sp, #36]
-	ldr	r3, .L3959+64
-	ldr	r8, [r3]
-	ldrh	r3, [r7, #20]
-	movs	r7, #0
-	str	r3, [sp, #52]
-	ldr	r3, .L3959+4
-.L3835:
-	ldr	r1, [sp, #44]
-	uxth	lr, r7
-	mov	r2, lr
-	cmp	lr, r1
-	blt	.L3839
-.L3888:
-	mov	r8, #1
-	b	.L3833
-.L3829:
-	ldr	r3, .L3959+68
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L3882
-	sub	r3, r4, #62
-	cmp	r3, #2160
-	bcs	.L3883
-	mov	r1, fp
-	mov	r0, r4
-	bl	__aeabi_uidivmod
-	uxth	r1, r1
-	cmp	r1, #0
-	ite	ne
-	movne	fp, #1
-	moveq	fp, #2
-	b	.L3830
-.L3882:
-	mov	fp, #1
-	b	.L3830
-.L3883:
-	mov	fp, #2
-	b	.L3830
+	cmp	r7, r3, lsr #2
+	bcc	.L3826
+	b	.L3817
+.L3818:
+	ldr	r2, [r3, #536]
+	ldr	r1, [r3, #12]
+	ldr	r0, .L3833+24
+	add	r2, r2, #12910592
+	add	r2, r2, #49408
+	cmp	r1, r2
+	bhi	.L3828
+	ldr	r4, [r0]
+	ldr	r2, [r3, #540]
+	ldr	r4, [r4, #44]
+	add	r2, r2, #4992
+	adds	r2, r2, #8
+	cmp	r4, r2
+	bls	.L3817
 .L3828:
-	ldr	r3, .L3959+72
-	ldrh	r5, [r7, #566]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L3832
-	add	r1, r10, r10, lsl #1
-	mov	r0, r5
-	bl	__aeabi_idiv
-	uxth	r4, r0
-	sub	r0, r10, r10, lsl #2
-	smulbb	r0, r0, r4
-	add	r0, r0, r5
-	b	.L3954
-.L3960:
+	ldr	r2, [r0]
+	ldr	r2, [r2, #44]
+	str	r1, [r3, #536]
+	str	r2, [r3, #540]
+	movs	r2, #0
+	str	r2, [r3, #544]
+	b	.L3817
+.L3834:
 	.align	2
-.L3959:
-	.word	.LANCHOR78
-	.word	.LANCHOR64
-	.word	.LANCHOR223
-	.word	.LC0
-	.word	.LANCHOR52
-	.word	.LANCHOR14
-	.word	.LC238
-	.word	.LANCHOR125
-	.word	.LC239
-	.word	.LANCHOR104
-	.word	.LANCHOR10
-	.word	.LANCHOR73
-	.word	.LANCHOR35
-	.word	.LANCHOR204
-	.word	.LANCHOR224
-	.word	.LANCHOR79
-	.word	.LANCHOR156
-	.word	.LANCHOR205
-	.word	.LANCHOR77
-.L3832:
-	mov	r0, r5
-	mov	r1, r10
-	bl	__aeabi_idiv
-	ldr	r3, .L3961
-	ldrh	r8, [r3, r0, lsl #1]
-	smulbb	r0, r0, r10
-	subs	r5, r5, r0
-	lsr	r4, r8, #3
-	uxth	r3, r5
-	mla	r5, r10, r4, r3
-	str	r3, [sp, #32]
-	and	r8, r8, #7
-	cmp	r8, #1
-	add	r5, r5, r5, lsl #1
-	uxth	r5, r5
-	beq	.L3831
 .L3833:
-	ldr	r3, .L3961+4
-	ldr	r3, [r3]
-	lsls	r0, r3, #23
-	bpl	.L3840
-	ldr	r3, .L3961+8
-	mov	r1, r4
-	ldr	r2, .L3961+12
-	ldr	r0, .L3961+16
-	ldr	r3, [r3]
-	ldrh	r2, [r2, r4, lsl #1]
-	str	r5, [sp, #12]
-	str	r2, [sp, #16]
-	add	r2, r3, r5, lsl #2
-	ldr	r2, [r2, #4]
-	str	r2, [sp, #8]
-	mov	r2, r8
-	ldr	r3, [r3, r5, lsl #2]
-	str	r3, [sp, #4]
-	ldr	r3, .L3961+20
-	ldrh	r3, [r3, #566]
+	.word	.LANCHOR10
+	.word	.LANCHOR75
+	.word	.LANCHOR32
+	.word	.LANCHOR76
+	.word	.LANCHOR128
+	.word	.LANCHOR221
+	.word	.LANCHOR110
+	.word	.LANCHOR228
+	.word	.LC0
+	.size	gc_scan_static_data, .-gc_scan_static_data
+	.section	.text.ftl_sblk_dump,"ax",%progbits
+	.align	1
+	.global	ftl_sblk_dump
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_sblk_dump, %function
+ftl_sblk_dump:
+	@ args = 0, pretend = 0, frame = 88
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	lsls	r3, r0, #2
+	ldr	r4, .L3878
+	sub	sp, sp, #128
+	lsls	r2, r0, #2
+	mov	r6, r0
+	str	r3, [sp, #76]
+	ldr	r3, [r4]
+	str	r1, [sp, #68]
+	ldr	r1, [r3, r0, lsl #2]
+	adds	r2, r3, r2
+	ldrb	r2, [r2, #2]	@ zero_extendqisi2
+	ubfx	r1, r1, #11, #8
+	str	r1, [sp, #4]
+	mov	r1, r0
+	ldrh	r3, [r3, r0, lsl #2]
+	ldr	r0, .L3878+4
+	ubfx	r3, r3, #0, #11
 	str	r3, [sp]
-	ldr	r3, [sp, #32]
+	ubfx	r3, r2, #3, #2
+	lsrs	r2, r2, #5
 	bl	printf
-.L3840:
-	movs	r3, #0
-.L3956:
-	str	r3, [sp, #48]
-	ldrh	r3, [sp, #48]
-	str	r3, [sp, #44]
-	str	r3, [sp, #36]
-	ldr	r3, [sp, #40]
-	ldr	r1, [sp, #44]
-	ldrb	r2, [r3, #89]	@ zero_extendqisi2
-	mul	r3, r2, fp
-	cmp	r1, r3
-	blt	.L3862
-	ldr	r1, .L3961+24
-	ldrb	r1, [r1]	@ zero_extendqisi2
-	cmp	r1, #3
-	bne	.L3863
-	ldr	r1, .L3961+28
-	ldrb	r0, [r1]	@ zero_extendqisi2
-	cmp	r0, #0
-	beq	.L3864
-	movs	r0, #0
-	subs	r3, r3, #1
-.L3865:
-	uxth	r1, r0
-	adds	r0, r0, #1
-	cmp	r1, r3
-	blt	.L3866
-.L3957:
-	add	r1, sp, #88
-	add	r3, r1, r3, lsl #2
-	movs	r1, #255
-	ldr	r3, [r3, #-24]
-	strb	r1, [r3]
-	smulbb	r1, fp, r2
-	ldr	r0, [sp, #64]
-	uxtb	r1, r1
-	bl	sblk_prog_page
-	b	.L3867
-.L3827:
-	ldr	r3, .L3961+32
-	mov	r1, r10
-	ldrh	r5, [r7, #566]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	mov	r0, r5
-	cbnz	r3, .L3834
-	bl	__aeabi_idiv
-	uxth	r4, r0
-	mov	fp, #1
-	smulbb	r0, r10, r4
-	subs	r0, r5, r0
-	uxth	r3, r0
-	str	r3, [sp, #32]
-	b	.L3831
-.L3834:
-	bl	__aeabi_idiv
-	uxth	r4, r0
-	mov	fp, #2
-	smulbb	r0, r10, r4
-	subs	r0, r5, r0
-	uxth	r3, r0
-	str	r3, [sp, #32]
-	b	.L3831
-.L3839:
-	ldr	r1, [sp, #48]
-	add	r2, r2, r5
-	cmp	r2, r1
-	bne	.L3836
-	ldr	r1, [sp, #36]
-	cmp	r1, #0
-	beq	.L3888
-	ldrh	r1, [r10, r4, lsl #1]
-	cmp	r1, r4
-	bcs	.L3888
-	tst	lr, #1
-	beq	.L3888
-.L3836:
-	ldr	r1, [r8, r2, lsl #2]
-	adds	r1, r1, #1
-	bne	.L3837
-	ldrh	r1, [r3, #22]
-	ldr	r0, [sp, #52]
-	cmp	r1, r0
-	bcs	.L3815
-	ldr	r0, [sp, #36]
-	cbz	r0, .L3838
-	ldrh	ip, [r10, r4, lsl #1]
-	cmp	ip, r4
-	bcs	.L3838
-	tst	lr, #1
-	beq	.L3838
-	ldr	r1, [r8, ip, lsl #2]
-	str	r1, [r8, r2, lsl #2]
-.L3837:
-	adds	r7, r7, #1
-	b	.L3835
-.L3838:
-	mov	r0, r1
-	str	r3, [sp, #56]
-	bl	gc_get_src_ppa_from_index
-	ldr	r3, [sp, #56]
-	adds	r1, r1, #1
-	strh	r1, [r3, #22]	@ movhi
-	str	r0, [r8, r2, lsl #2]
-	b	.L3837
-.L3962:
-	.align	2
-.L3961:
-	.word	.LANCHOR225
-	.word	.LANCHOR14
-	.word	.LANCHOR156
-	.word	.LANCHOR224
-	.word	.LC240
-	.word	.LANCHOR64
-	.word	.LANCHOR73
-	.word	.LANCHOR35
-	.word	.LANCHOR74
-.L3862:
-	ldr	r3, [sp, #44]
-	adds	r7, r5, r3
-	ldr	r3, .L3963
-	ldr	r3, [r3]
-	ldrb	r3, [r3, r7]	@ zero_extendqisi2
-	cmp	r3, #255
-	bne	.L3842
-	movs	r0, #0
-	bl	buf_alloc
-	mov	r6, r0
-	cbnz	r0, .L3843
-	bl	sblk_wait_write_queue_completed
-	bl	ftl_write_completed
-	bl	gc_write_completed
-	bl	gc_free_temp_buf
+	movw	r3, #65535
+	cmp	r6, r3
+	beq	.L3858
+	ldr	r3, .L3878+8
+	ldrh	r3, [r3]
+	cmp	r3, r6
+	bls	.L3858
+	ldr	r3, [r4]
+	lsls	r2, r6, #2
+	add	r1, sp, #112
+	strh	r6, [sp, #96]	@ movhi
 	mov	r0, r6
+	movs	r5, #0
+	add	r3, r3, r2
+	mov	r10, r5
+	ldrb	r3, [r3, #2]	@ zero_extendqisi2
+	and	r3, r3, #224
+	cmp	r3, #160
+	itet	eq
+	ldreq	r3, .L3878+12
+	movne	fp, #1
+	ldrbeq	fp, [r3]	@ zero_extendqisi2
+	bl	ftl_get_blk_list_in_sblk
+	ldr	r3, .L3878+16
+	uxtb	r0, r0
+	lsls	r2, r6, #2
+	strb	r5, [sp, #101]
+	strb	r0, [sp, #105]
+	mov	r1, r6
+	ldrh	r3, [r3]
+	strh	r5, [sp, #98]	@ movhi
+	strh	r5, [sp, #106]	@ movhi
+	smulbb	r3, r3, r0
+	strh	r3, [sp, #102]	@ movhi
+	ldr	r3, [r4]
+	add	r3, r3, r2
+	ldrb	r2, [r3, #2]	@ zero_extendqisi2
+	mov	r3, fp
+	str	r0, [sp]
+	ldr	r0, .L3878+20
+	lsrs	r2, r2, #5
+	bl	printf
+	movs	r0, #1
 	bl	buf_alloc
-	mov	r6, r0
-	cmp	r0, #0
-	beq	.L3815
-.L3843:
-	ldr	r3, .L3963
-	ldrb	r2, [r6, #1]	@ zero_extendqisi2
-	ldr	r3, [r3]
-	strb	r2, [r3, r7]
-	ldr	r2, .L3963+4
-	strb	r8, [r6, #45]
-	ldrb	r3, [r2, #7]	@ zero_extendqisi2
-	adds	r3, r3, #1
-	strb	r3, [r2, #7]
-	ldr	r3, [sp, #36]
-	add	r3, r3, r5
-	strh	r3, [r6, #32]	@ movhi
-	ldr	r3, .L3963+8
+	mov	r7, r0
+	str	r5, [sp, #48]
+	str	r5, [sp, #44]
+.L3838:
+	ldr	r3, .L3878+16
 	ldrh	r2, [r3]
-	ldr	r3, [sp, #40]
-	ldrb	r3, [r3, #89]	@ zero_extendqisi2
-	muls	r3, r2, r3
+	uxth	r3, r5
+	cmp	r2, r3
+	bls	.L3855
+	str	r3, [sp, #60]
+	lsls	r3, r3, #1
+	subs	r2, r3, #1
+	str	r2, [sp, #80]
+	ldr	r2, [sp, #60]
+	add	r3, r3, r2
 	subs	r3, r3, #1
-	cmp	r7, r3
-	bne	.L3844
-	ldr	r3, .L3963+12
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L3845
-	ldr	r3, .L3963+16
-	ldrh	r3, [r3, r4, lsl #1]
-	cmp	r3, r4
-	bcs	.L3845
-	ldr	r3, [sp, #36]
-	lsls	r1, r3, #31
-	bmi	.L3844
-.L3845:
-	ldr	r3, .L3963+20
-	ldr	r10, .L3963+40
-	ldr	r0, [r6, #4]
-	ldr	r1, [r3]
-	mov	r3, #-1
-	str	r3, [r1, r7, lsl #2]
-	ldrb	r3, [r10]	@ zero_extendqisi2
-	muls	r2, r3, r2
-	lsls	r2, r2, #2
-	bl	ftl_memcpy
-	ldr	r3, .L3963+8
-	ldrb	r2, [r10]	@ zero_extendqisi2
-	ldrh	r3, [r3]
-	muls	r2, r3, r2
-	ldr	r3, .L3963+24
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	lsls	r2, r2, #2
-	mov	r0, r2
-	cbz	r3, .L3846
-	ldr	r3, .L3963+28
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	rsb	r2, r2, r3, lsl #9
-.L3846:
-	ldr	r3, [r6, #4]
-	ldr	r1, .L3963+32
-	add	r0, r0, r3
-	ldr	r1, [r1]
-	bl	ftl_memcpy
-	ldr	r3, .L3963+28
-	movs	r1, #0
-	ldr	r0, [r6, #12]
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	lsls	r2, r2, #1
-	bl	ftl_memset
-	ldr	r10, [r6, #12]
-	ldr	r3, .L3963+36
-	ldr	r2, .L3963+40
-	ldr	r0, [r6, #4]
-	str	r3, [r10]
-	ldr	r3, .L3963+8
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	ldrh	r3, [r3]
-	muls	r1, r3, r1
-	lsls	r1, r1, #2
-	bl	js_hash
-	ldr	r3, .L3963+44
-	str	r0, [r10, #4]
-	ldr	r3, [r3]
-	ldr	r3, [r3, #132]
-	str	r3, [r10, #8]
-.L3842:
-	ldr	r3, .L3963
-	add	r1, sp, #88
-	mov	ip, #48
-	ldr	r2, [r3]
-	ldr	r3, [sp, #44]
-	ldrb	r10, [r2, r7]	@ zero_extendqisi2
-	add	r0, r1, r3, lsl #2
-	ldr	r1, .L3963+48
-	add	r3, r10, r10, lsl #1
-	mla	ip, ip, r10, r1
-	add	r3, r1, r3, lsl #4
-	str	r3, [r0, #-24]
-	movs	r3, #2
-	strh	r3, [ip, #34]	@ movhi
-	ldr	r3, .L3963+52
-	strb	r8, [ip, #45]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #3
-	bne	.L3853
-	ldr	r3, .L3963+56
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #0
-	beq	.L3854
-	ldr	r1, .L3963+12
-	ldr	r3, [sp, #36]
-	ldrb	r1, [r1]	@ zero_extendqisi2
-	and	r0, r3, #1
-	adds	r3, r0, r4
-	cbz	r1, .L3855
-	ldr	r1, .L3963+16
-	ldrh	r1, [r1, r4, lsl #1]
-	cmp	r1, r4
-	bcs	.L3855
-	cmp	r0, #0
-	it	ne
-	movne	r3, r1
-.L3855:
-	ldr	r1, .L3963+48
-	movs	r0, #48
+	str	r3, [sp, #72]
+	movs	r3, #0
+	b	.L3877
+.L3852:
+	ldr	r3, [sp, #84]
+	add	r2, sp, #128
+	add	r3, r2, r3, lsl #1
+	ldrh	r3, [r3, #-32]
 	str	r3, [sp, #56]
-	str	r2, [sp, #60]
-	mla	r3, r0, r10, r1
-	ldr	r0, [sp, #36]
-	mov	r1, fp
-	str	r3, [sp, #52]
-	bl	__aeabi_uidiv
-	ldr	r3, [sp, #32]
-	ldr	r2, [sp, #52]
-	uxtah	r0, r3, r0
-	ldr	r3, [sp, #40]
-	add	r0, r3, r0, lsl #1
-	ldr	r3, [sp, #56]
-	ldrh	r1, [r0, #96]
-	ldr	r0, .L3963+60
-	ldrh	r0, [r0]
-	mla	r3, r0, r1, r3
-	orr	r3, r3, #50331648
-	str	r3, [r2, #24]
-	ldr	r2, [sp, #60]
-.L3859:
-	ldr	r1, .L3963+48
-	movs	r3, #48
-	mla	r3, r3, r10, r1
-	ldr	r0, [r3, #24]
-	ldrh	r1, [r3, #32]
-	ldr	r3, .L3963+64
-	ldr	r3, [r3]
-	str	r0, [r3, r1, lsl #2]
-	b	.L3857
-.L3844:
-	ldr	r3, .L3963+32
+	movw	r3, #65535
+	ldr	r2, [sp, #56]
+	cmp	r2, r3
+	beq	.L3839
+	ldr	r3, .L3878+24
+	cmp	fp, #3
+	ldrh	r4, [r3]
+	mov	r3, r2
+	mul	r3, r3, r4
+	bne	.L3840
+	ldr	r2, .L3878+28
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbz	r2, .L3841
+	ldr	r2, [sp, #72]
+.L3874:
+	adds	r4, r3, r2
+	ldr	r2, .L3878+12
+	add	r3, r4, r8
+	ldrb	r4, [r2]	@ zero_extendqisi2
+	orr	r4, r3, r4, lsl #24
+	b	.L3842
+.L3841:
+	ldr	r2, .L3878+32
+	lsl	r4, r8, #24
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r2, #0
+	beq	.L3843
+	ldr	r2, [sp, #72]
+	add	r3, r3, r2
+	add	r3, r3, r8
+.L3875:
+	orrs	r4, r4, r3
+.L3842:
 	movs	r1, #1
-	mov	r0, r6
-	ldr	r3, [r3]
-	ldr	r3, [r3, r7, lsl #2]
-	str	r3, [r6, #24]
+	str	r4, [r7, #24]
+	mov	r0, r7
 	bl	sblk_read_page
-	ldr	r3, [r6, #36]
+	ldr	r2, [r7, #12]
+	ldr	r3, [r7, #36]
+	ldr	r0, .L3878+36
+	ldr	r1, [r2, #12]
+	str	r3, [sp, #64]
+	ldr	r3, [r7, #4]
+	str	r1, [sp, #32]
+	ldr	r1, [r2, #8]
+	str	r1, [sp, #28]
+	ldr	r1, [r2, #4]
+	str	r1, [sp, #24]
+	ldr	r2, [r2]
+	ldr	r1, [sp, #56]
+	str	r2, [sp, #20]
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #16]
+	ldr	r2, [r3, #8]
+	str	r2, [sp, #12]
+	ldr	r2, [r3, #4]
+	str	r2, [sp, #8]
+	ldr	r3, [r3]
+	ldr	r2, [sp, #60]
+	str	r3, [sp, #4]
+	ldr	r3, [sp, #64]
+	str	r3, [sp]
+	mov	r3, r4
+	bl	printf
+	ldr	r3, [sp, #64]
 	adds	r2, r3, #1
-	beq	.L3847
+	beq	.L3860
 	cmp	r3, #512
-	bne	.L3851
+	ldr	r3, [sp, #44]
+	it	eq
+	moveq	r3, #1
+.L3876:
+	str	r3, [sp, #44]
+	ldr	r3, .L3878
+	ldr	r2, [sp, #76]
+	ldr	r3, [r3]
+	add	r3, r3, r2
+	ldrb	r3, [r3, #2]	@ zero_extendqisi2
+	and	r3, r3, #224
+	cmp	r3, #224
+	beq	.L3839
+	cmp	r3, #32
+	beq	.L3839
+	ldr	r3, [r7, #12]
+	ldr	r0, [r3, #4]
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #92]
+	adds	r0, r0, #1
+	bne	.L3846
+	ldr	r3, [r7, #12]
+	movs	r2, #0
+	add	r1, sp, #92
+	ldr	r0, [r3, #4]
+	bl	pm_log2phys
+.L3846:
+	ldr	r3, [sp, #92]
+	cmp	r4, r3
+	bne	.L3847
+	ldr	r3, [sp, #48]
+	mov	r1, r4
+	ldr	r2, [r7, #12]
+	ldr	r0, .L3878+40
+	adds	r3, r3, #1
+	ldr	r2, [r2, #4]
+	str	r3, [sp, #48]
+	bl	printf
 .L3847:
-	ldr	r3, .L3963+68
-	ldrh	r2, [r3]
-	ldr	r3, .L3963+72
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	rsb	r3, r3, #24
-	subs	r0, r3, r2
-	movs	r3, #1
-	lsls	r3, r3, r0
-	ldr	r0, [r6, #24]
-	subs	r3, r3, #1
-	lsrs	r0, r0, r2
-	ldr	r2, .L3963+76
-	ands	r0, r0, r3
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	bl	__aeabi_uidiv
-	movs	r1, #0
-	uxth	r0, r0
-	bl	ftl_sblk_dump
-	ldr	r3, [r6, #36]
-	adds	r0, r3, #1
-	beq	.L3849
-	cmp	r3, #512
-	bne	.L3851
-.L3849:
-	ldr	r3, [r6, #12]
-	mov	r2, #-1
-	str	r2, [r3, #4]
-	ldr	r3, [r6, #36]
+	ldr	r3, [sp, #68]
+	cbz	r3, .L3849
+	ldr	r2, [r3, r10, lsl #2]
+	lsl	r4, r10, #2
+	ldr	r3, [r7, #12]
+	ldr	r3, [r3, #4]
 	cmp	r3, r2
 	beq	.L3850
-	cmp	r3, #512
-	bne	.L3851
+	ldr	r3, .L3878+44
+	ldr	r3, [r3]
+	lsls	r3, r3, #19
+	bpl	.L3850
+	mov	r1, r10
+	ldr	r0, .L3878+48
+	bl	printf
 .L3850:
-	movw	r2, #1002
-	ldr	r1, .L3963+80
-	ldr	r0, .L3963+84
+	ldr	r3, [sp, #68]
+	ldr	r2, [r7, #12]
+	ldr	r3, [r3, r4]
+	ldr	r2, [r2, #4]
+	cmp	r2, r3
+	beq	.L3849
+	adds	r3, r3, #1
+	beq	.L3849
+	movw	r2, #1567
+	ldr	r1, .L3878+52
+	ldr	r0, .L3878+56
 	bl	printf
-.L3851:
-	ldr	r3, [r6, #12]
-	ldr	r2, .L3963+88
-	ldr	r1, [r3, #4]
-	ldr	r2, [r2]
-	cmp	r1, r2
-	itt	cs
-	movcs	r2, #-1
-	strcs	r2, [r3, #4]
-	ldr	r2, .L3963+20
-	ldr	r1, [r3, #4]
-	ldr	r2, [r2]
-	str	r1, [r2, r7, lsl #2]
-	ldr	r2, [r6, #24]
-	str	r2, [r3, #8]
+.L3849:
+	add	r10, r10, #1
+.L3839:
+	add	r8, r8, #1
+	uxth	r8, r8
+.L3854:
+	cmp	fp, r8
+	bcs	.L3852
+	ldr	r3, [sp, #52]
+	adds	r3, r3, #1
+.L3877:
+	str	r3, [sp, #52]
+	ldrb	r2, [sp, #105]	@ zero_extendqisi2
+	ldrh	r3, [sp, #52]
+	cmp	r2, r3
+	bls	.L3853
+	adds	r3, r3, #8
+	mov	r8, #1
+	str	r3, [sp, #84]
+	b	.L3854
+.L3843:
+	uxtah	r3, r3, r5
+	b	.L3875
+.L3840:
+	cmp	fp, #2
+	bne	.L3844
+	ldr	r2, [sp, #80]
+	b	.L3874
+.L3844:
+	uxtah	r4, r3, r5
 	b	.L3842
-.L3964:
+.L3860:
+	movs	r3, #1
+	b	.L3876
+.L3853:
+	adds	r5, r5, #1
+	b	.L3838
+.L3855:
+	mov	r0, r7
+	bl	zbuf_free
+	ldr	r3, .L3878+60
+	mov	r1, r6
+	ldr	r0, .L3878+64
+	ldr	r2, [r3]
+	ldr	r3, [sp, #48]
+	ldrh	r2, [r2, r6, lsl #1]
+	bl	printf
+	ldr	r0, [sp, #44]
+.L3835:
+	add	sp, sp, #128
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3858:
+	movs	r0, #0
+	b	.L3835
+.L3879:
 	.align	2
-.L3963:
-	.word	.LANCHOR76
-	.word	.LANCHOR64
+.L3878:
+	.word	.LANCHOR7
+	.word	.LC220
+	.word	.LANCHOR6
 	.word	.LANCHOR79
-	.word	.LANCHOR204
-	.word	.LANCHOR224
-	.word	.LANCHOR155
-	.word	.LANCHOR205
-	.word	.LANCHOR125
-	.word	.LANCHOR156
-	.word	-178307901
-	.word	.LANCHOR80
-	.word	.LANCHOR10
-	.word	.LANCHOR52
-	.word	.LANCHOR73
-	.word	.LANCHOR35
-	.word	.LANCHOR105
-	.word	.LANCHOR157
-	.word	.LANCHOR68
-	.word	.LANCHOR31
-	.word	.LANCHOR69
-	.word	.LANCHOR223
+	.word	.LANCHOR95
+	.word	.LC221
+	.word	.LANCHOR111
+	.word	.LANCHOR36
+	.word	.LANCHOR37
+	.word	.LC167
+	.word	.LC222
+	.word	.LANCHOR14
+	.word	.LC223
+	.word	.LANCHOR229
 	.word	.LC0
-	.word	.LANCHOR122
-.L3854:
-	ldr	r3, [sp, #36]
-	ldr	r0, .L3965
-	umull	r0, r1, r3, r0
-	ldr	r0, [sp, #40]
-	lsrs	r3, r1, #1
-	ldr	r1, [sp, #32]
-	uxtah	r1, r1, r3
-	add	r3, r3, r3, lsl #1
-	add	r1, r0, r1, lsl #1
-	ldrh	r0, [r1, #96]
-	ldr	r1, .L3965+4
-	ldrh	r1, [r1]
-	muls	r1, r0, r1
-	ldr	r0, .L3965+8
-	ldr	lr, [r0]
-	ldr	r0, [sp, #36]
-	orrs	r1, r1, r4
-	str	r1, [ip, #24]
-	ldrh	ip, [ip, #32]
-	subs	r3, r0, r3
-	lsls	r3, r3, #24
-	add	r3, r3, #16777216
-	orrs	r1, r1, r3
-	str	r1, [lr, ip, lsl #2]
-.L3857:
-	ldr	r3, .L3965+12
+	.word	.LANCHOR9
+	.word	.LC224
+	.size	ftl_sblk_dump, .-ftl_sblk_dump
+	.section	.text.zftl_read,"ax",%progbits
+	.align	1
+	.global	zftl_read
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	zftl_read, %function
+zftl_read:
+	@ args = 0, pretend = 0, frame = 48
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r5, r3
+	ldr	r3, .L3929
+	mov	r4, r0
+	sub	sp, sp, #72
+	mov	r6, r1
+	mov	fp, r2
 	ldr	r3, [r3]
-	lsls	r1, r3, #23
-	bpl	.L3860
-	ldr	r1, [r6, #12]
-	movs	r0, #48
-	ldr	r3, .L3965+16
-	ldr	r1, [r1]
-	ldrb	r3, [r3, #6]	@ zero_extendqisi2
-	str	r1, [sp, #24]
-	ldr	r1, .L3965+20
-	mla	r10, r0, r10, r1
-	ldr	r0, .L3965
-	ldr	r1, [r10, #12]
-	ldr	r1, [r1, #4]
-	str	r1, [sp, #20]
-	ldr	r1, [sp, #36]
-	umull	r0, r1, r1, r0
-	ldr	r0, [sp, #32]
-	ubfx	r1, r1, #1, #16
-	add	r1, r1, r0
-	ldr	r0, .L3965+24
-	str	r1, [sp, #16]
-	ldrb	r1, [r10, #1]	@ zero_extendqisi2
-	str	r1, [sp, #12]
-	ldrh	r1, [r10, #32]
-	str	r1, [sp, #8]
-	ldr	r1, [r10, #24]
-	str	r1, [sp, #4]
-	ldrb	r2, [r2, r7]	@ zero_extendqisi2
-	ldr	r1, [sp, #44]
-	str	r2, [sp]
-	mov	r2, r8
+	lsls	r0, r3, #19
+	bpl	.L3881
+	mov	r3, r2
+	ldr	r0, .L3929+4
+	mov	r2, r1
+	mov	r1, r4
 	bl	printf
-.L3860:
-	ldr	r3, .L3965+28
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L3861
-	ldr	r3, .L3965+32
-	ldrh	r3, [r3, r4, lsl #1]
-	cmp	r3, r4
-	bcs	.L3861
-	ldr	r3, [sp, #36]
-	lsls	r3, r3, #31
-	bpl	.L3861
-	ldr	r3, .L3965+36
-	movs	r2, #255
-	ldr	r3, [r3]
-	strb	r2, [r3, r7]
-	add	r2, sp, #88
-	ldr	r3, [sp, #44]
-	add	r3, r2, r3, lsl #2
-	ldr	r2, [r3, #-24]
-	ldr	r3, [sp, #40]
-	ldrb	r1, [r2, #1]	@ zero_extendqisi2
-	ldrb	r3, [r3, #89]	@ zero_extendqisi2
-	lsls	r3, r3, #1
-	mls	r3, r3, fp, r5
-	uxth	r3, r3
-	strh	r3, [r2, #32]	@ movhi
-	ldr	r2, .L3965+36
-	ldr	r2, [r2]
-	strb	r1, [r2, r3]
-	mov	r2, #-1
-	ldr	r3, .L3965+40
+.L3881:
+	cmp	r4, #0
+	bne	.L3882
+	ldr	r3, .L3929+8
+	mov	r4, #24576
 	ldr	r3, [r3]
-	str	r2, [r3, r7, lsl #2]
-.L3861:
-	ldr	r3, [sp, #48]
-	adds	r3, r3, #1
-	b	.L3956
-.L3853:
-	cmp	r3, #2
-	bne	.L3859
-	ldr	r3, .L3965+44
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L3858
-	ldr	r1, [sp, #32]
-	ldr	r3, [sp, #44]
-	add	r3, r3, r1
-	ldr	r1, [sp, #40]
-	add	r3, r1, r3, lsl #1
-	ldr	r1, .L3965+4
-	ldrh	r3, [r3, #96]
-	ldrh	r1, [r1]
-	mla	r3, r1, r3, r4
-.L3955:
-	orr	r3, r3, #33554432
-	str	r3, [ip, #24]
-	b	.L3859
-.L3858:
-	ldr	r1, [sp, #36]
-	ldr	r3, [sp, #32]
-	add	r3, r3, r1, lsr #1
-	ldr	r1, [sp, #40]
-	add	r3, r1, r3, lsl #1
-	ldr	r1, .L3965+4
-	ldrh	r3, [r3, #96]
-	ldrh	r1, [r1]
-	mla	r3, r1, r3, r4
-	ldr	r1, [sp, #36]
-	and	r1, r1, #1
-	add	r3, r3, r1
-	b	.L3955
-.L3866:
-	add	r5, sp, #88
-	add	r6, sp, #88
-	add	r5, r5, r1, lsl #2
-	add	r1, r6, r1, lsl #2
-	ldr	r1, [r1, #-20]
-	ldr	r5, [r5, #-24]
-	ldrb	r1, [r1, #1]	@ zero_extendqisi2
-	strb	r1, [r5]
-	b	.L3865
-.L3864:
-	ldr	r3, .L3965+48
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	ldr	r3, [sp, #64]
-	cmp	r1, #0
-	beq	.L3868
-	strb	r0, [r3, #44]
-.L3958:
-	add	r1, sp, #76
-	add	r0, sp, #64
-	bl	sblk_xlc_prog_pages
-.L3867:
-	ldr	r3, .L3965+48
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	ldr	r3, [sp, #40]
-	ldrb	r3, [r3, #89]	@ zero_extendqisi2
-	cmp	r2, #0
-	beq	.L3876
-	add	r3, r3, r3, lsl #1
-.L3877:
-	ldr	r2, .L3965+52
-	ldr	r1, [r2]
-	ldr	r2, [r1, #52]
-	add	r2, r2, r3
-	str	r2, [r1, #52]
-	ldr	r2, .L3965+16
-	ldrh	r1, [r2, #566]
-	add	r3, r3, r1
-	uxth	r3, r3
-	strh	r3, [r2, #566]	@ movhi
-	ldr	r2, .L3965+56
-	ldrh	r1, [r2]
-	ldr	r2, [sp, #40]
-	ldrb	r2, [r2, #89]	@ zero_extendqisi2
-	muls	r2, r1, r2
+.L3883:
+	cmp	r3, r6
+	bls	.L3914
+	cmp	r3, fp
+	bcc	.L3914
+	add	r2, r6, fp
 	cmp	r3, r2
-	itttt	ge
-	ldrge	r3, .L3965+60
-	movge	r2, #0
-	ldrge	r3, [r3]
-	strhge	r2, [r3, #86]	@ movhi
-	bl	gc_write_completed
-	b	.L3815
-.L3868:
-	cmp	r8, #1
-	bne	.L3869
-	movs	r1, #9
-.L3871:
-	strb	r1, [r3, #44]
-	b	.L3958
-.L3869:
-	cmp	r8, #2
-	it	eq
-	moveq	r1, #13
-	b	.L3871
-.L3863:
-	ldr	r1, .L3965+44
-	ldrb	r0, [r1]	@ zero_extendqisi2
-	cbz	r0, .L3872
-	ldr	r1, .L3965+64
-	ldrb	r0, [r1]	@ zero_extendqisi2
-	cbnz	r0, .L3873
-.L3872:
-	subs	r3, r3, #1
-.L3874:
-	uxth	r1, r0
-	adds	r0, r0, #1
-	cmp	r1, r3
-	bge	.L3957
-	add	r5, sp, #88
-	add	r6, sp, #88
-	add	r5, r5, r1, lsl #2
-	add	r1, r6, r1, lsl #2
-	ldr	r1, [r1, #-20]
-	ldr	r5, [r5, #-24]
-	ldrb	r1, [r1, #1]	@ zero_extendqisi2
-	strb	r1, [r5]
-	b	.L3874
-.L3873:
-	mov	r1, r2
-	add	r0, sp, #64
-	bl	sblk_3d_mlc_prog_pages
-	b	.L3867
-.L3876:
-	ldr	r2, .L3965+44
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbz	r2, .L3878
-	lsls	r3, r3, #1
-	b	.L3877
-.L3878:
-	ldr	r2, .L3965+68
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbz	r2, .L3879
-	ldr	r1, .L3965+28
-	uxth	r2, r3
-	mul	r3, r2, fp
-	ldrb	r1, [r1]	@ zero_extendqisi2
-	cmp	r1, #0
-	beq	.L3877
-	ldr	r1, .L3965+32
-	ldrh	r1, [r1, r4, lsl #1]
-	cmp	r1, r4
-	it	cc
-	movcc	r3, r2
-	b	.L3877
-.L3879:
-	uxth	r3, r3
-	b	.L3877
-.L3966:
-	.align	2
-.L3965:
-	.word	-1431655765
-	.word	.LANCHOR105
-	.word	.LANCHOR157
-	.word	.LANCHOR14
-	.word	.LANCHOR64
-	.word	.LANCHOR52
-	.word	.LC241
-	.word	.LANCHOR204
-	.word	.LANCHOR224
-	.word	.LANCHOR76
-	.word	.LANCHOR156
-	.word	.LANCHOR74
-	.word	.LANCHOR77
-	.word	.LANCHOR104
-	.word	.LANCHOR79
-	.word	.LANCHOR10
-	.word	.LANCHOR75
-	.word	.LANCHOR35
-	.size	gc_do_copy_back, .-gc_do_copy_back
-	.section	.text.zftl_do_gc,"ax",%progbits
-	.align	1
-	.global	zftl_do_gc
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	zftl_do_gc, %function
-zftl_do_gc:
-	@ args = 0, pretend = 0, frame = 24
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L4148
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #48
-	ldr	r4, .L4148+4
-	ldrh	r7, [r3]
-	ldr	r3, .L4148+8
-	ldr	r2, .L4148+12
-	str	r0, [sp, #32]
-	ldrh	r6, [r3]
-	ldrb	r3, [r4]	@ zero_extendqisi2
-	mov	r8, r2
-	ldr	r5, [r2]
-	add	r6, r6, r7
-	uxth	r6, r6
-	cmp	r3, #6
-	bhi	.L4077
-	tbh	[pc, r3, lsl #1]
-.L3970:
-	.2byte	(.L3969-.L3970)/2
-	.2byte	(.L3971-.L3970)/2
-	.2byte	(.L3972-.L3970)/2
-	.2byte	(.L3973-.L3970)/2
-	.2byte	(.L3974-.L3970)/2
-	.2byte	(.L3975-.L3970)/2
-	.2byte	(.L3976-.L3970)/2
-	.p2align 1
-.L3975:
-	ldr	r5, .L4148+16
-	movs	r7, #0
-.L3977:
-	bl	gc_check_data_one_wl
-	mov	r10, r0
-	cmp	r0, #0
-	beq	.L4073
-	ldr	r3, [r8]
-	movs	r6, #0
-	strh	r6, [r5, #52]	@ movhi
-	ldrh	r0, [r3, #80]
-	bl	ftl_free_sblk
-	ldr	r1, .L4148+20
-	movw	r3, #65535
-	ldr	r2, [r8]
-	ldr	r0, [r5, #8]
-	ldr	r1, [r1]
-	strh	r3, [r2, #80]	@ movhi
-	strh	r3, [r1, #126]	@ movhi
-	strh	r3, [r2, #130]	@ movhi
-	bl	zbuf_free
-	str	r6, [r5, #8]
-	strb	r6, [r4]
-	b	.L4145
-.L3969:
-	ldr	r3, .L4148+24
-	ldr	r1, .L4148+28
-	ldr	r2, .L4148+32
-	ldrh	r3, [r3]
-	str	r1, [sp, #36]
-	ldrh	r0, [r2]
-	add	r7, r7, r3
-	ldrh	r3, [r1]
-	uxth	r7, r7
-	str	r2, [sp, #40]
-	add	r3, r3, r0
-	ldrh	r0, [r5, #80]
-	uxth	r3, r3
+	bcc	.L3914
+	adds	r3, r4, r6
+	ldr	r6, .L3929+12
 	str	r3, [sp, #28]
-	movw	r3, #65535
-	cmp	r0, r3
-	beq	.L3978
-	ldr	r3, [sp, #32]
-	cbnz	r3, .L3979
-	ldr	r3, .L4148+36
-	ldrh	r3, [r3]
-	cmp	r6, r3, lsl #1
-	blt	.L3979
-.L4077:
-	movs	r5, #16
-	b	.L3967
-.L3979:
-	ldr	r10, .L4148+84
-	movs	r1, #5
-	ldr	fp, .L4148+72
-	ldrh	r0, [r10]
-	adds	r0, r0, #1
-	uxth	r0, r0
-	strh	r0, [r10]	@ movhi
-	bl	zftl_get_gc_node
-	movw	r3, #65535
-	mov	ip, r10
-	cmp	r0, r3
-	beq	.L3980
-	ldr	r1, .L4148+40
-	ldr	lr, .L4148+80
-	ldr	r2, .L4148+44
-	ldr	r1, [r1]
-	ldrh	lr, [lr]
-	ldr	r3, [r2]
-	mov	r10, r2
-	ldrh	r1, [r1, r0, lsl #1]
-	adds	r3, r3, #1
-	cmp	lr, r1
-	str	r3, [r2]
-	bcs	.L3981
-	ldr	r2, .L4148+48
-	ldrh	r2, [r2]
-	cmp	r3, r2, lsr #4
-	bls	.L3980
-	ldr	r3, .L4148+52
-	ldrh	r3, [r3]
-	cmp	r3, r1
-	bls	.L3980
-.L3981:
-	ldrb	r2, [fp]	@ zero_extendqisi2
-	movs	r1, #0
-	bl	gc_add_sblk
-	cbz	r0, .L3982
-	movs	r3, #1
-	strb	r3, [r4]
-	movs	r3, #0
-	str	r3, [r10]
-	b	.L4077
-.L3980:
-	movs	r3, #0
-	strh	r3, [ip]	@ movhi
-.L3982:
-	cmp	r7, #15
-	bls	.L4079
-	ldr	r3, .L4148+56
-	ldrh	r2, [r3]
-	ldr	r3, .L4148+60
-	ldrh	r3, [r3]
-	cmp	r2, r3
-	bhi	.L4079
-	ldr	r3, [sp, #28]
-	cmp	r3, #0
-	ite	eq
-	moveq	r10, #2
-	movne	r10, #1
-.L3983:
-	ldr	r3, .L4148+64
-	ldr	r3, [r3]
-	lsls	r3, r3, #23
-	bpl	.L3984
-	ldr	r3, [r8]
-	ldrh	r1, [r5, #80]
-	ldrb	r2, [fp]	@ zero_extendqisi2
-	ldr	r0, .L4148+68
-	str	r1, [sp, #16]
-	ldrh	r1, [r3, #122]
-	str	r1, [sp, #12]
-	ldrh	r1, [r3, #120]
-	str	r1, [sp, #8]
-	movw	r1, #2170
-	ldrh	r3, [r3, #124]
-	str	r7, [sp]
-	str	r3, [sp, #4]
-	mov	r3, r6
-	bl	printf
-.L3984:
-	movs	r2, #1
-	mov	r1, r10
-	ldrb	r0, [fp]	@ zero_extendqisi2
-	bl	gc_search_src_blk
-	cmp	r0, #0
-	ble	.L3985
-.L3986:
-	movs	r3, #1
-.L4146:
-	strb	r3, [r4]
-	b	.L4077
-.L4079:
-	mov	r10, #2
-	b	.L3983
-.L3985:
-	movs	r2, #1
-	movs	r1, #3
-	ldrb	r0, [fp]	@ zero_extendqisi2
-	bl	gc_search_src_blk
-	cmp	r0, #0
-	bgt	.L3986
-	b	.L4077
-.L3978:
-	ldr	r3, .L4148+64
+	ldr	r3, .L3929+16
+	ldr	r0, [sp, #28]
 	ldr	r2, [r3]
+	ldr	r3, [r2, #24]
+	add	r3, r3, fp
+	str	r3, [r2, #24]
+	ldr	r3, .L3929+20
+	ldrb	r4, [r3]	@ zero_extendqisi2
+	mov	r1, r4
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #28]
+	mov	r1, r4
+	str	r0, [sp, #36]
+	add	r3, fp, r3
+	subs	r0, r3, #1
 	str	r3, [sp, #44]
-	tst	r2, #256
-	beq	.L3988
-	ldr	r3, .L4148+72
-	movw	r1, #2182
-	ldr	r0, .L4148+68
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	ldr	r3, [sp, #32]
-	str	r3, [sp, #16]
-	ldrh	r3, [r5, #122]
-	str	r3, [sp, #12]
-	ldrh	r3, [r5, #120]
-	str	r3, [sp, #8]
-	ldrh	r3, [r5, #124]
-	str	r7, [sp]
-	str	r3, [sp, #4]
-	mov	r3, r6
-	bl	printf
-.L3988:
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #36]
+	ldr	r4, [sp, #36]
+	str	r0, [sp, #48]
+	rsb	r3, r3, #1
+	add	r3, r3, r0
+	str	r3, [sp, #32]
+	movs	r3, #0
+	str	r3, [sp, #40]
+.L3885:
 	ldr	r3, [sp, #32]
-	cmp	r3, #1
-	bne	.L3989
-	bl	gc_scan_static_data
-	ldr	r3, [r8]
-	ldr	fp, .L4148+72
-	ldrh	r3, [r3, #122]
-	cbz	r3, .L3990
-.L3991:
-	movs	r3, #1
-	strb	r3, [fp]
-	b	.L4146
-.L3990:
-	bl	gc_static_wearleveling
-	mov	r5, r0
-	cmp	r0, #0
-	bne	.L3991
-	cmp	r7, #0
-	bne	.L3992
-.L3996:
-	movs	r5, #16
-.L3993:
-	ldr	r0, [r8]
-	movs	r1, #1
-	ldr	r3, .L4148+72
-	ldrh	fp, [r0, #124]
-	strb	r1, [r3]
-	mov	r8, r3
-	cmp	fp, #0
-	beq	.L4001
-	movs	r2, #0
-	strb	r1, [r4]
-	strb	r2, [r3]
-	ldr	r3, [sp, #44]
-	ldr	r3, [r3]
-	lsls	r4, r3, #23
-	bpl	.L3967
-	ldrh	r3, [r0, #122]
-	mov	r1, #2272
-	str	r3, [sp, #12]
-	ldrh	r3, [r0, #120]
-	stm	sp, {r7, fp}
-	ldr	r0, .L4148+76
-	str	r3, [sp, #8]
-	mov	r3, r6
-	bl	printf
-.L3967:
-	mov	r0, r5
-	add	sp, sp, #48
+	cbnz	r3, .L3910
+	ldr	r0, [sp, #40]
+.L3880:
+	add	sp, sp, #72
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L4149:
-	.align	2
-.L4148:
-	.word	.LANCHOR101
-	.word	.LANCHOR153
-	.word	.LANCHOR97
-	.word	.LANCHOR10
-	.word	.LANCHOR64
-	.word	.LANCHOR104
-	.word	.LANCHOR99
-	.word	.LANCHOR92
-	.word	.LANCHOR90
-	.word	.LANCHOR81
-	.word	.LANCHOR9
-	.word	.LANCHOR154
-	.word	.LANCHOR6
-	.word	.LANCHOR93
-	.word	.LANCHOR94
-	.word	.LANCHOR95
-	.word	.LANCHOR14
-	.word	.LC242
-	.word	.LANCHOR78
-	.word	.LC243
-	.word	.LANCHOR87
-	.word	.LANCHOR89
-.L3992:
-	ldr	r3, [sp, #28]
-	ldr	r2, .L4150
-	cmp	r6, r3
-	bcs	.L3994
-	ldrh	r3, [r2]
-	cmp	r3, r6
-	bhi	.L3995
-.L3994:
-	ldr	r3, [sp, #28]
-	ldrh	r2, [r2]
-	adds	r3, r6, r3
-	cmp	r3, r2
-	blt	.L3995
-	ldr	r3, .L4150+4
-	ldrh	r2, [r3]
-	ldr	r3, .L4150+8
-	ldrh	r3, [r3]
-	cmp	r2, r3
-	bcc	.L3996
-.L3995:
-	mov	r10, #1
-	ldr	r2, .L4150+12
-	strb	r10, [fp]
-	ldr	fp, .L4150+32
-	ldrh	r2, [r2]
-	ldr	r3, [fp]
-	add	r3, r3, r10
-	cmp	r3, r2, lsr #5
-	str	r3, [fp]
-	ldr	r3, .L4150+4
-	bls	.L3997
-	ldrh	r2, [r3]
-	cmp	r2, r7
-	bls	.L3997
-	movs	r1, #5
-	movs	r0, #0
-	bl	zftl_get_gc_node
-	movw	r3, #65535
-	cmp	r0, r3
-	beq	.L3996
-	ldr	r3, .L4150+16
-	ldr	r3, [r3]
-	ldrh	r2, [r3, r0, lsl #1]
-	ldr	r3, .L4150+20
-	ldrh	r1, [r3]
-	ldr	r3, .L4150+24
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	muls	r3, r1, r3
-	cmp	r2, r3
-	bgt	.L3996
-	movs	r2, #4
-	movs	r1, #2
-	mov	r0, r10
-	movs	r3, #0
-	str	r3, [fp]
-.L4136:
-	bl	gc_search_src_blk
-	uxth	r0, r0
-	cmp	r0, #0
-	beq	.L3996
-	b	.L3986
-.L3997:
-	ldrh	r2, [r3]
-	ldr	r3, .L4150+8
-	ldrh	r3, [r3]
-	cmp	r2, r3
-	bcc	.L3999
-	movs	r2, #1
-	movs	r1, #2
-	mov	r0, r2
-	b	.L4136
-.L3999:
+.L3882:
+	cmp	r4, #3
+	bhi	.L3914
+	lsls	r4, r4, #13
+	mov	r3, #8192
+	b	.L3883
+.L3910:
+	ldr	r3, .L3929+20
+	ldrb	r1, [r3]	@ zero_extendqisi2
 	ldr	r3, [sp, #36]
-	ldrh	r3, [r3]
-	cbnz	r3, .L4000
-	ldr	r3, [sp, #40]
-	ldrh	r3, [r3]
-	cmp	r3, #8
-	bls	.L3993
-.L4000:
-	movs	r1, #1
-	movs	r2, #4
-	mov	r0, r1
-	b	.L4136
-.L3989:
-	ldr	r3, .L4150+28
-	ldrh	r3, [r3]
-	cmp	r3, r6
-	bcc	.L4077
-	b	.L3996
-.L4001:
-	ldr	r2, .L4150+28
-	ldrh	ip, [r2]
-	mov	r10, r2
-	cmp	r6, ip
-	bcs	.L4002
-	cmp	r7, #0
-	beq	.L4003
-	cmp	r7, #16
-	bls	.L4004
-	ldr	r2, .L4150+4
-	ldrh	r0, [r2]
-	ldr	r2, .L4150+8
-	ldrh	r2, [r2]
-	cmp	r0, r2
-	bhi	.L4004
-	movs	r2, #4
-	mov	r0, r1
-	str	r3, [sp, #28]
-	bl	gc_search_src_blk
-	uxth	r0, r0
-	ldr	r3, [sp, #28]
-	cbnz	r0, .L4005
-	ldrb	r0, [r3]	@ zero_extendqisi2
-	movs	r2, #4
-	movs	r1, #3
-.L4142:
-	bl	gc_search_src_blk
-	uxth	r0, r0
-.L4006:
-	cbnz	r0, .L4008
-	b	.L3967
-.L4005:
-	movs	r1, #5
-	mov	r0, fp
-	bl	zftl_get_gc_node
-	movw	r3, #65535
-	cmp	r0, r3
-	beq	.L4008
-	ldr	r1, .L4150+16
-	ldr	r6, .L4150+20
-	ldr	r2, .L4150+32
-	ldr	r1, [r1]
-	ldrh	r6, [r6]
-	ldr	r3, [r2]
-	ldrh	r1, [r1, r0, lsl #1]
-	adds	r3, r3, #1
-	cmp	r6, r1
-	str	r3, [r2]
-	mov	r6, r2
-	bcs	.L4009
-	ldr	r2, .L4150+12
-	ldrh	r2, [r2]
-	cmp	r3, r2, lsr #4
-	bls	.L4008
-	ldr	r3, .L4150+36
-	ldrh	r3, [r3]
-	cmp	r3, r1
-	bls	.L4008
-.L4009:
-	ldrb	r2, [r8]	@ zero_extendqisi2
-	movs	r1, #0
-	bl	gc_add_sblk
-	ldr	r3, .L4150+40
-	movs	r2, #1
-	str	r2, [r3]
+	cmp	r4, r3
+	uxth	r7, r1
+	bne	.L3886
+	ldr	r0, [sp, #28]
+	bl	__aeabi_uidivmod
+	uxth	r8, r1
+	sub	r7, r7, r8
+	uxth	r7, r7
+	cmp	fp, r7
+	bcs	.L3887
+	uxth	r7, fp
+.L3887:
+	ldr	r2, .L3929+12
 	movs	r3, #0
-	str	r3, [r6]
-.L4008:
-	movs	r3, #1
-	strb	r3, [r4]
-	b	.L3967
-.L4004:
-	movs	r2, #1
-	movs	r1, #2
-	mov	r0, r2
-.L4144:
-	bl	gc_search_src_blk
-	uxth	r0, r0
-	cmp	r0, #0
-	bne	.L4008
-	movs	r2, #2
-	b	.L4138
-.L4003:
-	strb	r7, [r3]
-	ldr	r3, [sp, #44]
-	ldr	r3, [r3]
-	lsls	r1, r3, #23
-	bpl	.L4011
-	ldrh	r3, [r0, #122]
+.L3890:
+	ldr	r1, [r2, #20]
+	cmp	r4, r1
+	bne	.L3888
+	ldrb	r1, [r2, #2]	@ zero_extendqisi2
+	lsls	r1, r1, #28
+	bpl	.L3888
+	movs	r2, #48
+	lsls	r7, r7, #9
+	mov	r0, r5
+	mla	r3, r2, r3, r6
+	add	r5, r5, r7
 	mov	r2, r7
-	movw	r1, #2302
-	str	r3, [sp, #12]
-	ldrh	r3, [r0, #120]
-	str	r7, [sp, #4]
-	str	r7, [sp]
-	str	r3, [sp, #8]
-	mov	r3, r6
-	ldr	r0, .L4150+44
-	bl	printf
-.L4011:
-	cmp	r6, #16
-	bls	.L4012
-	movs	r2, #4
-.L4138:
-	movs	r1, #3
-	ldrb	r0, [r8]	@ zero_extendqisi2
-	b	.L4142
-.L4012:
-	movs	r2, #1
-	ldrb	r0, [r8]	@ zero_extendqisi2
-	mov	r1, r2
-	b	.L4144
-.L4002:
+	ldr	r1, [r3, #4]
+	add	r1, r1, r8, lsl #9
+	bl	ftl_memcpy
+.L3889:
 	ldr	r3, [sp, #32]
-	cmp	r3, #1
-	bne	.L3967
-	cmp	r6, ip, lsl #1
-	bge	.L4013
-	ldr	r3, [sp, #28]
-	cmp	r3, r7, lsr #1
-	bcs	.L4014
-	ldr	r3, .L4150+4
-	ldrh	r1, [r3]
-	ldr	r3, .L4150+8
-	ldrh	r3, [r3]
-	cmp	r1, r3
-	bcs	.L4014
-	ldr	r3, .L4150
-	ldrh	r3, [r3]
-	lsrs	r3, r3, #2
-	strh	r3, [r2]	@ movhi
-	b	.L3967
-.L4014:
-	movs	r1, #5
-	movs	r0, #0
-	bl	zftl_get_gc_node
-	movw	r3, #65535
-	mov	fp, r0
-	cmp	r0, r3
-	bne	.L4015
-.L4020:
-	cmp	r7, #1
-	bhi	.L4016
-.L4017:
-	ldr	r3, [sp, #28]
-	cmp	r6, r3
-	ldr	r6, .L4150
-	bcs	.L4024
-	movs	r7, #0
-	movs	r0, #4
-	strb	r7, [r8]
-	bl	zftl_get_gc_node.part.9
-	movw	r3, #65535
-	cmp	r0, r3
-	beq	.L4024
-	ldr	r3, .L4150+16
-	ldr	r3, [r3]
-	ldrh	r2, [r3, r0, lsl #1]
-	ldr	r3, .L4150+20
-	ldrh	r1, [r3]
-	ldr	r3, .L4150+24
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	muls	r3, r1, r3
-	cmp	r2, r3, asr #1
-	ble	.L4026
-.L4024:
-	ldrh	r3, [r6]
-	lsrs	r3, r3, #2
-	strh	r3, [r10]	@ movhi
-	b	.L3967
-.L4015:
-	ldr	r2, .L4150+32
-	ldr	r1, .L4150+12
-	ldr	r3, [r2]
-	ldrh	r1, [r1]
-	adds	r3, r3, #1
-	str	r3, [r2]
-	cmp	r3, r1, lsr #4
-	ldr	r3, .L4150+16
-	bls	.L4018
-	movs	r1, #0
-	str	r1, [r2]
-	ldr	r2, [r3]
-	ldrh	ip, [r2, r0, lsl #1]
-	ldr	r2, .L4150+36
-	ldrh	r2, [r2]
-	cmp	ip, r2
-	bcs	.L4018
-	movs	r2, #1
+	adds	r4, r4, #1
+	subs	r3, r3, #1
 	str	r3, [sp, #32]
-	bl	gc_add_sblk
+.L3896:
+	ldr	r3, .L3929+24
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #2
+	bls	.L3897
 	ldr	r3, [sp, #32]
-	cmp	r0, #0
-	bne	.L4008
-.L4018:
-	ldr	r3, [r3]
-	ldrh	r2, [r3, fp, lsl #1]
-	ldr	r3, .L4150+20
-	ldrh	r3, [r3]
-	cmp	r2, r3, lsr #1
-	bhi	.L4019
-	movs	r2, #0
-	movs	r1, #1
-	mov	r0, fp
-	bl	gc_add_sblk
-	b	.L4008
-.L4019:
-	ldr	r3, [sp, #36]
-	ldr	r1, [sp, #40]
-	ldrh	r3, [r3]
-	ldrh	r1, [r1]
-	add	r3, r3, r1
-	ldr	r1, .L4150
-	ldrh	r1, [r1]
-	cmp	r3, r1, lsl #1
-	ble	.L4020
-	ldr	r3, .L4150+36
-	ldrh	r3, [r3]
-	cmp	r3, r2
-	bcc	.L4017
-	b	.L4020
-.L4151:
-	.align	2
-.L4150:
-	.word	.LANCHOR91
-	.word	.LANCHOR94
-	.word	.LANCHOR95
-	.word	.LANCHOR6
-	.word	.LANCHOR9
-	.word	.LANCHOR87
-	.word	.LANCHOR80
-	.word	.LANCHOR81
-	.word	.LANCHOR154
-	.word	.LANCHOR93
-	.word	.LANCHOR116
-	.word	.LC243
-.L4016:
-	cmp	r7, #16
-	mov	r1, #1
+	cmp	r3, #0
+	bne	.L3885
+.L3897:
+	ldr	r3, .L3929+28
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	cmp	r1, #0
+	beq	.L3885
+	ldr	r3, .L3929+32
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	add	r0, r0, r0, lsl #1
+	add	r0, r6, r0, lsl #4
+	bl	sblk_read_page
+.L3899:
+	ldr	r3, .L3929+28
+	ldr	r8, .L3929+32
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	cmp	r2, #0
+	bne	.L3909
+	movs	r1, #255
+	strb	r2, [r3]
 	strb	r1, [r8]
-	bls	.L4021
-	ldr	r3, .L4152
-	ldrh	r2, [r3]
-	ldr	r3, .L4152+4
-	ldrh	r3, [r3]
-	cmp	r2, r3
-	bhi	.L4021
-	movs	r2, #4
-	mov	r0, r1
-	bl	gc_search_src_blk
-	uxth	r0, r0
-	cbnz	r0, .L4022
-	movs	r2, #4
-.L4137:
-	movs	r1, #3
-	ldrb	r0, [r8]	@ zero_extendqisi2
-	bl	gc_search_src_blk
-	uxth	r0, r0
-.L4022:
-	ldr	r3, [sp, #28]
-	cmp	r6, r3, lsr #1
-	ldr	r3, .L4152+8
-	ldrh	r3, [r3]
-	bls	.L4140
-	lsrs	r3, r3, #2
-.L4141:
-	strh	r3, [r10]	@ movhi
-	b	.L4006
-.L4021:
-	movs	r2, #1
-	movs	r1, #2
-	mov	r0, r2
-	bl	gc_search_src_blk
-	uxth	r0, r0
-	cmp	r0, #0
-	bne	.L4022
-	movs	r2, #2
-	b	.L4137
-.L4026:
-	movs	r2, #4
-	movs	r1, #3
-	mov	r0, r7
-	bl	gc_search_src_blk
-	ldrh	r3, [r6]
-	uxth	r0, r0
-.L4140:
-	lsrs	r3, r3, #1
-	b	.L4141
-.L4013:
-	ldr	r3, .L4152+8
-	mov	r5, fp
-	ldrh	r3, [r3]
-	lsrs	r3, r3, #2
-	strh	r3, [r2]	@ movhi
-	b	.L3967
-.L3971:
-	ldr	r5, .L4152+12
-	movw	r3, #65535
-	ldrh	r2, [r5]
-	cmp	r2, r3
-	bne	.L4027
-	bl	gc_get_src_blk
-	strh	r0, [r5]	@ movhi
-.L4027:
-	ldrh	r2, [r5]
-	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L4028
-	ldr	r1, .L4152+16
-	ldrh	r1, [r1]
-	cmp	r1, r2
-	it	ls
-	strhls	r3, [r5]	@ movhi
-.L4028:
-	ldrh	r6, [r5]
-	movw	r3, #65535
-	cmp	r6, r3
-	beq	.L4147
-	ldr	r3, .L4152+20
-	ldrh	r1, [r5, #52]
-	ldr	r3, [r3]
-	add	r3, r3, r6, lsl #2
-	cbz	r1, .L4030
-	ldr	r0, .L4152+24
-	movs	r2, #0
-.L4031:
-	uxth	r5, r2
-	cmp	r1, r5
-	bhi	.L4032
-.L4030:
-	ldrb	r3, [r3, #2]	@ zero_extendqisi2
-	and	r2, r3, #224
-	cmp	r2, #224
-	beq	.L4033
-	tst	r3, #192
-	bne	.L4034
-.L4033:
-	ldr	r3, .L4152+28
-	ldr	r3, [r3]
-	ldrh	r3, [r3, r6, lsl #1]
-	cbz	r3, .L4036
-	movw	r2, #2537
-	ldr	r1, .L4152+32
-	ldr	r0, .L4152+36
-	bl	printf
-	b	.L4036
-.L4032:
-	ldrh	r5, [r0, #2]!
-	adds	r2, r2, #1
-	cmp	r5, r6
-	bne	.L4031
-.L4036:
-	ldr	r3, .L4152+12
-	movw	r2, #65535
-	strh	r2, [r3]	@ movhi
-	b	.L4077
-.L4034:
-	movs	r3, #2
-	b	.L4146
-.L3972:
-	bl	gc_scan_src_blk
+	b	.L3885
+.L3886:
+	ldr	r3, [sp, #48]
+	mov	r8, #0
+	cmp	r4, r3
+	itttt	eq
+	ldreq	r3, [sp, #28]
+	addeq	r7, r3, fp
+	mlseq	r1, r4, r1, r7
+	uxtbeq	r7, r1
+	b	.L3887
+.L3888:
+	adds	r3, r3, #1
+	adds	r2, r2, #48
+	cmp	r3, #32
+	bne	.L3890
+	mov	r0, r4
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #68]
 	adds	r0, r0, #1
-	bne	.L4037
-	movs	r3, #3
-	b	.L4146
-.L4037:
-	ldr	r3, .L4152+12
-	movw	r1, #65535
-	ldrh	r2, [r3]
-	mov	r5, r3
-	cmp	r2, r1
-	beq	.L3986
-	ldrh	r1, [r3, #20]
-	cbz	r1, .L4038
-	movs	r2, #4
-	strb	r2, [r4]
+	bne	.L3891
 	movs	r2, #0
-	strh	r2, [r3, #22]	@ movhi
-	b	.L4077
-.L4038:
-	movs	r3, #1
-	strb	r3, [r4]
-	ldr	r4, .L4152+28
-	ldr	r1, [r4]
-	ldrh	r2, [r1, r2, lsl #1]
-	cbz	r2, .L4039
-	movw	r2, #2565
-	ldr	r1, .L4152+32
-	ldr	r0, .L4152+36
-	bl	printf
-.L4039:
-	ldrh	r0, [r5]
-	bl	ftl_free_sblk
-	ldr	r3, [r4]
-	movs	r4, #0
-	ldrh	r2, [r5]
-	strh	r4, [r3, r2, lsl #1]	@ movhi
-	ldrh	r3, [r5, #26]
-	adds	r3, r3, #1
-	uxth	r3, r3
-	cmp	r3, #8
-	bhi	.L4040
-	strh	r3, [r5, #26]	@ movhi
-	b	.L4036
-.L4040:
-	strh	r4, [r5, #26]	@ movhi
-	bl	ftl_flush
-	bl	pm_flush
-	bl	ftl_ext_info_flush
+	add	r1, sp, #68
 	mov	r0, r4
-	bl	ftl_info_flush
-	b	.L4036
-.L3973:
-	ldr	r7, .L4152+12
-	mov	r5, r7
-.L4116:
-	bl	gc_scan_src_blk_one_page
-	ldr	r3, .L4152+40
-	ldrh	r2, [r7, #2]
-	ldrh	r3, [r3]
+	bl	pm_log2phys
+.L3891:
+	ldr	r3, [sp, #68]
+	adds	r3, r3, #1
+	bne	.L3892
+	ldr	r8, .L3929+20
+	movs	r7, #0
+.L3893:
+	ldrb	r3, [r8]	@ zero_extendqisi2
+	cmp	r7, r3
+	bcs	.L3889
+	mla	r3, r3, r4, r7
+	ldr	r2, [sp, #28]
 	cmp	r2, r3
-	bcs	.L4042
-	cmp	r6, #7
-	bls	.L4116
-	b	.L4077
-.L4042:
-	ldrh	r3, [r7, #20]
-	ldr	r2, .L4152+44
-	cbz	r3, .L4043
-	ldr	r2, [r2]
-	movs	r1, #4
-	strb	r1, [r4]
+	bhi	.L3894
+	ldr	r2, [sp, #44]
+	cmp	r2, r3
+	bls	.L3894
+	mov	r0, r5
+	add	r5, r5, #512
+	mov	r2, #512
 	movs	r1, #0
-	strh	r1, [r7, #22]	@ movhi
-	tst	r2, #256
-	ldr	r4, .L4152+28
-	beq	.L4044
-	ldrh	r1, [r7]
-	ldr	r2, [r4]
-	ldr	r0, .L4152+48
-	ldrh	r2, [r2, r1, lsl #1]
+	bl	ftl_memset
+.L3894:
+	adds	r7, r7, #1
+	b	.L3893
+.L3892:
+	movs	r0, #0
+	bl	buf_alloc
+	cmp	r0, #0
+	beq	.L3896
+	ldr	r2, .L3929+16
+	ldr	r1, [r2]
+	ldr	r2, [r1, #40]
+	adds	r2, r2, #1
+	str	r2, [r1, #40]
+	ldr	r2, [sp, #68]
+	str	r5, [r0, #8]
+	add	r5, r5, r7, lsl #9
+	str	r4, [r0, #20]
+	str	r2, [r0, #24]
+	str	r2, [r0, #28]
+	strb	r7, [r0, #40]
+	strb	r8, [r0, #41]
+	bl	zftl_add_read_buf
+	b	.L3889
+.L3930:
+	.align	2
+.L3929:
+	.word	.LANCHOR14
+	.word	.LC225
+	.word	.LANCHOR68
+	.word	.LANCHOR56
+	.word	.LANCHOR110
+	.word	.LANCHOR131
+	.word	.LANCHOR58
+	.word	.LANCHOR134
+	.word	.LANCHOR133
+.L3909:
+	ldrb	r3, [r8]	@ zero_extendqisi2
+	cmp	r3, #255
+	bne	.L3900
+	movw	r2, #1276
+	ldr	r1, .L3931
+	ldr	r0, .L3931+4
 	bl	printf
-.L4044:
-	ldr	r3, [r4]
-	ldrh	r2, [r5]
-	ldrh	r2, [r3, r2, lsl #1]
-	ldrh	r3, [r5, #20]
-	cmp	r2, r3
-	beq	.L4045
-	movw	r2, #2599
-	ldr	r1, .L4152+32
-	ldr	r0, .L4152+36
+.L3900:
+	ldrb	r7, [r8]	@ zero_extendqisi2
+	add	r3, r7, r7, lsl #1
+	add	r3, r6, r3, lsl #4
+	str	r3, [sp, #52]
+	movs	r3, #48
+	muls	r3, r7, r3
+	adds	r2, r6, r3
+	ldrb	r3, [r6, r3]	@ zero_extendqisi2
+	strb	r3, [r8]
+	ldr	r8, [r2, #36]
+	cmp	r8, #-1
+	bne	.L3901
+	ldr	r3, .L3931+8
+	str	r8, [sp, #40]
+	ldr	r2, [r3]
+	ldr	r3, [r2, #552]
+	adds	r3, r3, #1
+	str	r3, [r2, #552]
+.L3902:
+	movs	r3, #48
+	mla	r3, r3, r7, r6
+	ldr	r2, [r3, #12]
+	ldr	r3, [r3, #20]
+	ldr	r1, [r2, #4]
+	cmp	r1, r3
+	bne	.L3903
+	cmp	r8, #-1
+	bne	.L3904
+.L3903:
+	ldr	r1, .L3931+8
+	mov	r10, #48
+	mla	r10, r10, r7, r6
+	ldr	r0, [r1]
+	ldr	r1, [r0, #552]
+	adds	r1, r1, #1
+	str	r1, [r0, #552]
+	ldr	r0, [r2, #12]
+	ldrb	r1, [r10, #1]	@ zero_extendqisi2
+	str	r0, [sp, #16]
+	ldr	r0, [r2, #8]
+	str	r0, [sp, #12]
+	ldr	r0, [r2, #4]
+	str	r0, [sp, #8]
+	ldr	r2, [r2]
+	ldr	r0, .L3931+12
+	str	r2, [sp, #4]
+	ldr	r2, [r10, #24]
+	str	r2, [sp]
+	mov	r2, r8
 	bl	printf
-.L4045:
-	ldrh	r1, [r5, #20]
-	ldrh	r2, [r5]
-	ldr	r3, [r4]
-	strh	r1, [r3, r2, lsl #1]	@ movhi
-	b	.L4077
-.L4043:
-	ldr	r3, .L4152+20
-	ldrh	r1, [r7]
-	ldr	r6, [r3]
+	ldr	r3, .L3931+16
+	ldrh	r2, [r3]
+	ldr	r3, .L3931+20
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	rsb	r3, r3, #24
+	subs	r0, r3, r2
 	movs	r3, #1
-	strb	r3, [r4]
-	ldr	r3, [r2]
-	add	r6, r6, r1, lsl #2
-	lsls	r2, r3, #23
-	bpl	.L4046
-	ldrb	r2, [r6, #2]	@ zero_extendqisi2
-	ldr	r0, .L4152+52
-	lsrs	r2, r2, #5
-	bl	printf
-.L4046:
-	ldrb	r3, [r6, #2]	@ zero_extendqisi2
-	and	r2, r3, #224
-	cmp	r2, #224
-	beq	.L4047
-	tst	r3, #192
-	bne	.L4048
-.L4047:
-	movw	r2, #2609
-	ldr	r1, .L4152+32
-	ldr	r0, .L4152+36
-	bl	printf
-.L4048:
-	ldrh	r0, [r5]
-	bl	ftl_free_sblk
-	movw	r3, #65535
-	strh	r3, [r5]	@ movhi
-	ldrh	r3, [r5, #26]
-	adds	r3, r3, #1
-	uxth	r3, r3
-	cmp	r3, #8
-	bhi	.L4049
-	strh	r3, [r5, #26]	@ movhi
-	b	.L4077
-.L4049:
-	movs	r3, #0
-	strh	r3, [r5, #26]	@ movhi
-.L4145:
-	bl	flt_sys_flush
-	b	.L4077
-.L4153:
-	.align	2
-.L4152:
-	.word	.LANCHOR94
-	.word	.LANCHOR95
-	.word	.LANCHOR91
-	.word	.LANCHOR64
-	.word	.LANCHOR6
-	.word	.LANCHOR7
-	.word	.LANCHOR64+52
-	.word	.LANCHOR9
-	.word	.LANCHOR226
-	.word	.LC0
-	.word	.LANCHOR87
-	.word	.LANCHOR14
-	.word	.LC244
-	.word	.LC245
-.L3974:
-	ldrh	r2, [r5, #80]
-	movw	r3, #65535
+	lsls	r3, r3, r0
+	ldr	r0, [r10, #24]
+	subs	r3, r3, #1
+	lsrs	r0, r0, r2
+	ldr	r2, .L3931+24
+	ands	r0, r0, r3
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	movs	r1, #0
+	uxth	r0, r0
+	bl	ftl_sblk_dump
+.L3904:
+	movs	r3, #48
+	mla	r3, r3, r7, r6
+	ldr	r2, [r3, #12]
+	ldr	r3, [r3, #20]
+	ldr	r2, [r2, #4]
 	cmp	r2, r3
-	bne	.L4050
-	ldr	r3, .L4154
-	ldrb	r7, [r3]	@ zero_extendqisi2
-	cmp	r7, #1
-	bne	.L4050
-	ldr	r6, .L4154+4
-	bl	ftl_flush
-	movs	r1, #5
-	ldrh	r0, [r6, #570]
-	cbz	r0, .L4051
-	mov	r0, r7
-.L4051:
-	bl	zftl_gc_get_free_sblk
-	movw	r3, #65535
-	mov	r4, r0
-	cmp	r0, r3
-	beq	.L4053
-	ldr	r3, .L4154+8
-	ldr	r7, [r3]
-	add	r7, r7, r0, lsl #2
-	ldrb	r3, [r7, #2]	@ zero_extendqisi2
-	tst	r3, #224
-	beq	.L4054
-	movw	r2, #2638
-	ldr	r1, .L4154+12
-	ldr	r0, .L4154+16
+	bne	.L3905
+	cmp	r8, #-1
+	bne	.L3906
+.L3905:
+	movw	r2, #1301
+	ldr	r1, .L3931
+	ldr	r0, .L3931+4
 	bl	printf
-.L4054:
+.L3906:
+	movs	r3, #48
+	mla	r7, r3, r7, r6
+	ldr	r3, .L3931+28
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	ldrb	r2, [r7, #40]	@ zero_extendqisi2
+	cmp	r3, r2
+	bls	.L3907
+	ldrb	r1, [r7, #41]	@ zero_extendqisi2
+	lsls	r2, r2, #9
+	ldr	r3, [r7, #4]
+	ldr	r0, [r7, #8]
+	add	r1, r3, r1, lsl #9
+	bl	ftl_memcpy
+.L3908:
+	ldr	r1, [sp, #52]
+	ldr	r0, .L3931+32
+	bl	buf_remove_buf
+	ldr	r0, [sp, #52]
+	bl	zbuf_free
+	ldr	r2, .L3931+36
+	ldrb	r3, [r2]	@ zero_extendqisi2
+	subs	r3, r3, #1
+	strb	r3, [r2]
+	b	.L3899
+.L3901:
+	cmp	r8, #256
+	bne	.L3902
+	ldr	r1, .L3931+16
+	ldr	r3, [r2, #24]
+	str	r2, [sp, #60]
+	movs	r2, #1
+	ldrh	r0, [r1]
+	ldr	r1, .L3931+20
+	str	r3, [sp, #56]
+	ldrb	ip, [r1]	@ zero_extendqisi2
+	ldr	r1, .L3931+24
+	rsb	ip, ip, #24
+	sub	ip, ip, r0
+	lsr	r0, r3, r0
+	lsl	ip, r2, ip
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	add	ip, ip, #-1
+	and	r0, ip, r0
+	bl	__aeabi_uidiv
+	ldr	r2, [sp, #60]
+	mov	r10, r0
+	uxth	r1, r0
+	ldr	r3, [sp, #56]
+	ldr	r0, .L3931+40
+	ldr	r2, [r2, #20]
+	bl	printf
+	movs	r2, #0
+	movs	r1, #1
+	uxth	r0, r10
+	bl	gc_add_sblk
+	b	.L3902
+.L3907:
 	ldrb	r3, [r7, #2]	@ zero_extendqisi2
-	and	r3, r3, #15
-	orr	r3, r3, #176
+	bic	r3, r3, #8
 	strb	r3, [r7, #2]
-.L4076:
-	movs	r1, #1
-	mov	r0, r4
-	bl	ftl_erase_sblk
-	movs	r3, #5
-	add	r1, r5, #96
-	strb	r3, [r5, #84]
+	b	.L3908
+.L3914:
+	mov	r0, #-1
+	b	.L3880
+.L3932:
+	.align	2
+.L3931:
+	.word	.LANCHOR230
+	.word	.LC0
+	.word	.LANCHOR10
+	.word	.LC227
+	.word	.LANCHOR75
+	.word	.LANCHOR32
+	.word	.LANCHOR76
+	.word	.LANCHOR131
+	.word	.LANCHOR63
+	.word	.LANCHOR134
+	.word	.LC226
+	.size	zftl_read, .-zftl_read
+	.section	.text.zftl_sys_read,"ax",%progbits
+	.align	1
+	.global	zftl_sys_read
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	zftl_sys_read, %function
+zftl_sys_read:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r3, r2
+	mov	r2, r1
+	mov	r1, r0
+	movs	r0, #2
+	b	zftl_read
+	.size	zftl_sys_read, .-zftl_sys_read
+	.section	.text.StorageSysDataLoad,"ax",%progbits
+	.align	1
+	.global	StorageSysDataLoad
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	StorageSysDataLoad, %function
+StorageSysDataLoad:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	mov	r4, r1
+	mov	r5, r0
+	mov	r2, #512
+	movs	r1, #0
 	mov	r0, r4
-	bl	ftl_get_blk_list_in_sblk
-	ldr	r3, .L4154+20
-	uxtb	r0, r0
-	movs	r7, #0
-	ldr	r10, .L4154+60
-	strb	r0, [r5, #89]
-	movs	r1, #255
-	ldrh	r3, [r3]
-	strh	r4, [r5, #80]	@ movhi
-	strh	r7, [r5, #82]	@ movhi
-	strb	r7, [r5, #85]
-	smulbb	r0, r3, r0
-	strh	r7, [r5, #90]	@ movhi
-	ldrh	r3, [r10]
-	strh	r0, [r5, #86]	@ movhi
-	ldr	r5, .L4154+24
-	ldrb	r2, [r5]	@ zero_extendqisi2
-	muls	r2, r3, r2
-	ldr	r3, .L4154+28
-	ldr	r0, [r3]
-	lsls	r2, r2, #2
 	bl	ftl_memset
-	ldrh	r3, [r10]
-	movs	r1, #255
-	ldrb	r2, [r5]	@ zero_extendqisi2
-	muls	r2, r3, r2
-	ldr	r3, .L4154+32
-	ldr	r0, [r3]
-	lsls	r2, r2, #2
-	bl	ftl_memset
-	ldrh	r3, [r10]
-	movs	r1, #255
-	ldrb	r2, [r5]	@ zero_extendqisi2
-	muls	r2, r3, r2
-	ldr	r3, .L4154+36
-	ldr	r0, [r3]
-	bl	ftl_memset
-	ldr	r3, [r8]
-	movw	r2, #65535
-	strh	r2, [r3, #128]	@ movhi
-	strh	r2, [r3, #130]	@ movhi
-	str	r4, [r3, #132]
-	bl	pm_flush
-	bl	ftl_ext_info_flush
-	ldr	r3, .L4154+40
-	mov	r0, r7
-	strh	r7, [r6, #52]	@ movhi
-	ldr	r3, [r3]
-	strh	r4, [r3, #126]	@ movhi
-	mov	r3, #-1
-	strh	r7, [r6, #566]	@ movhi
-	strh	r7, [r6, #568]	@ movhi
-	strh	r7, [r6, #572]	@ movhi
-	str	r3, [r6, #576]
-	bl	ftl_info_flush
-	b	.L4077
-.L4050:
-	ldr	r3, [sp, #32]
-	ldr	r7, .L4154
-	cmp	r3, #1
-	ite	ne
-	movne	r10, #1
-	moveq	r10, #4
-	cmp	r6, #15
-	ldr	r6, .L4154+4
-	it	ls
-	addls	r10, r10, #4
-.L4057:
-	add	r10, r10, #-1
-	uxtb	r10, r10
-	cmp	r10, #255
-	beq	.L4077
-	bl	gc_do_copy_back
-	ldrb	r3, [r7]	@ zero_extendqisi2
-	cbnz	r3, .L4058
-	ldr	r3, .L4154+44
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #3
-	bhi	.L4059
-	bl	ftl_write_commit
-.L4059:
-	ldrh	r2, [r6, #22]
-	ldrh	r3, [r6, #20]
-	cmp	r2, r3
-	bcc	.L4057
-	movs	r3, #1
-	strb	r3, [r4]
-	ldr	r4, .L4154+48
-	bl	ftl_write_commit
-	bl	ftl_flush
-	ldrh	r1, [r6]
-	ldr	r2, [r4]
-	ldrh	r2, [r2, r1, lsl #1]
-	cbz	r2, .L4061
-	movw	r2, #2713
-	ldr	r1, .L4154+12
-	ldr	r0, .L4154+16
-	bl	printf
-.L4061:
-	ldrh	r0, [r6]
-	ldr	r3, [r4]
-	ldrh	r3, [r3, r0, lsl #1]
-	cbnz	r3, .L4062
-	bl	ftl_free_sblk
-	b	.L4036
-.L4062:
+	mov	r3, r4
+	mov	r1, r5
 	movs	r2, #1
-	movs	r1, #0
-	bl	gc_add_sblk
-	b	.L4036
-.L4058:
-	ldrh	r3, [r6, #572]
-	cbz	r3, .L4063
-	movs	r5, #0
-	strh	r5, [r6, #572]	@ movhi
-	bl	sblk_wait_write_queue_completed
-	bl	gc_write_completed
-	ldr	r0, [r6, #576]
-	adds	r3, r0, #1
-	beq	.L4064
-	bl	ftl_mask_bad_block
-.L4064:
-	ldr	r3, [r8]
-	str	r5, [r6, #576]
-	strh	r5, [r6, #52]	@ movhi
-	ldrh	r0, [r3, #80]
-	bl	ftl_free_sblk
-	ldr	r1, .L4154+40
-	movw	r3, #65535
-	ldr	r0, [r6, #8]
-	ldr	r2, [r8]
-	ldr	r1, [r1]
-	strh	r3, [r2, #80]	@ movhi
-	strh	r3, [r1, #126]	@ movhi
-	strh	r3, [r2, #130]	@ movhi
-	cbz	r0, .L4065
-	bl	zbuf_free
-.L4065:
-	movs	r5, #0
-	str	r5, [r6, #8]
-	bl	flt_sys_flush
-	movw	r2, #2751
-	ldr	r1, .L4154+12
-	ldr	r0, .L4154+16
-	strb	r5, [r4]
-	bl	printf
-	b	.L4077
-.L4063:
-	ldrh	r3, [r5, #86]
-	ldrh	r2, [r6, #22]
-	cmp	r3, #1
-	ldrh	r3, [r6, #20]
-	bls	.L4066
-	cmp	r2, r3
-	bcc	.L4057
-	movs	r3, #1
-	strb	r3, [r4]
-	ldrh	r3, [r6, #52]
-	adds	r2, r3, #1
-	strh	r2, [r6, #52]	@ movhi
-	add	r3, r6, r3, lsl #1
-	ldrh	r2, [r6]
-	strh	r2, [r3, #54]	@ movhi
-	movw	r3, #65535
-	strh	r3, [r6]	@ movhi
-	b	.L4077
-.L4066:
-	cmp	r2, r3
-	mov	r1, #5
-	strb	r1, [r4]
-	bcc	.L4067
-	ldrh	r3, [r6, #52]
-	adds	r2, r3, #1
-	strh	r2, [r6, #52]	@ movhi
-	add	r3, r6, r3, lsl #1
-	ldrh	r2, [r6]
-	strh	r2, [r3, #54]	@ movhi
-	movw	r3, #65535
-	strh	r3, [r6]	@ movhi
-.L4067:
-	bl	ftl_flush
-	bl	sblk_wait_write_queue_completed
-	bl	gc_write_completed
-	ldr	r3, [r8]
-	ldrh	r2, [r5, #80]
-	strh	r2, [r3, #128]	@ movhi
-	bl	pm_flush
-	bl	ftl_ext_info_flush
-	movs	r3, #0
-	ldr	r2, .L4154+52
-	strh	r3, [r6, #12]	@ movhi
-	ldr	r3, .L4154+20
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	ldrh	r3, [r3]
-	strh	r3, [r6, #14]	@ movhi
-	ldr	r3, .L4154+56
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	strh	r3, [r6, #16]	@ movhi
-	cbz	r2, .L4068
-	ldr	r2, .L4154+60
-	ldrh	r2, [r2]
-	strh	r2, [r6, #14]	@ movhi
-	movs	r2, #1
-	strh	r2, [r6, #16]	@ movhi
-.L4068:
-	cmp	r3, #2
-	bne	.L4070
-	ldrh	r3, [r6, #14]
-	lsls	r3, r3, #1
-	strh	r3, [r6, #14]	@ movhi
-	ldr	r3, .L4154+64
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L4070
-	movs	r3, #1
-	strh	r3, [r6, #16]	@ movhi
-.L4070:
-	movs	r3, #0
-	strh	r3, [r6, #18]	@ movhi
-	b	.L4077
-.L4073:
-	ldrh	r2, [r5, #12]
-	ldrh	r3, [r5, #14]
-	cmp	r2, r3
-	bcc	.L4074
-	movs	r3, #6
-	ldr	r0, [r5, #8]
-	strb	r3, [r4]
-	bl	zbuf_free
-	str	r10, [r5, #8]
-	b	.L4077
-.L4074:
-	cmp	r6, #15
-	bls	.L3977
-	ldr	r3, [sp, #32]
-	cmp	r3, #1
-	bne	.L4077
-	adds	r7, r7, #1
-	uxtb	r7, r7
-	cmp	r7, #4
-	bls	.L3977
-	b	.L4077
-.L4155:
-	.align	2
-.L4154:
-	.word	.LANCHOR78
-	.word	.LANCHOR64
-	.word	.LANCHOR7
-	.word	.LANCHOR226
-	.word	.LC0
-	.word	.LANCHOR87
-	.word	.LANCHOR80
-	.word	.LANCHOR155
-	.word	.LANCHOR156
-	.word	.LANCHOR76
-	.word	.LANCHOR104
-	.word	.LANCHOR54
-	.word	.LANCHOR9
-	.word	.LANCHOR35
-	.word	.LANCHOR73
-	.word	.LANCHOR79
-	.word	.LANCHOR74
-.L3976:
-	bl	gc_update_l2p_map_new
-	bl	gc_free_src_blk
-	bl	ftl_flush
-	movw	r6, #65535
-	bl	pm_flush
-	strh	r6, [r5, #80]	@ movhi
-	bl	ftl_ext_info_flush
-	ldr	r3, .L4156
-	movs	r0, #0
-	ldr	r3, [r3]
-	strh	r6, [r3, #126]	@ movhi
-	bl	ftl_info_flush
-.L4147:
-	movs	r3, #0
-	b	.L4146
-.L4053:
-	movw	r2, #2644
-	ldr	r1, .L4156+4
-	ldr	r0, .L4156+8
-	bl	printf
-	b	.L4076
-.L4157:
-	.align	2
-.L4156:
-	.word	.LANCHOR104
-	.word	.LANCHOR226
-	.word	.LC0
-	.size	zftl_do_gc, .-zftl_do_gc
-	.section	.text.zftl_write,"ax",%progbits
+	movs	r0, #2
+	pop	{r4, r5, r6, lr}
+	b	zftl_read
+	.size	StorageSysDataLoad, .-StorageSysDataLoad
+	.section	.text.FlashBootVendorRead,"ax",%progbits
 	.align	1
-	.global	zftl_write
+	.global	FlashBootVendorRead
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	zftl_write, %function
-zftl_write:
-	@ args = 0, pretend = 0, frame = 16
+	.type	FlashBootVendorRead, %function
+FlashBootVendorRead:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r3, r2
+	mov	r2, r1
+	add	r1, r0, #512
+	movs	r0, #2
+	b	zftl_read
+	.size	FlashBootVendorRead, .-FlashBootVendorRead
+	.section	.text.ftl_read,"ax",%progbits
+	.align	1
+	.global	ftl_read
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_read, %function
+ftl_read:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	zftl_read
+	.size	ftl_read, .-ftl_read
+	.section	.text.ftl_vendor_read,"ax",%progbits
+	.align	1
+	.global	ftl_vendor_read
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_vendor_read, %function
+ftl_vendor_read:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r3, r2
+	mov	r2, r1
+	add	r1, r0, #512
+	movs	r0, #2
+	b	zftl_read
+	.size	ftl_vendor_read, .-ftl_vendor_read
+	.section	.text.zftl_vendor_read,"ax",%progbits
+	.align	1
+	.global	zftl_vendor_read
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	zftl_vendor_read, %function
+zftl_vendor_read:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	ftl_vendor_read
+	.size	zftl_vendor_read, .-zftl_vendor_read
+	.global	__aeabi_idivmod
+	.section	.text.ftl_update_l2p_map,"ax",%progbits
+	.align	1
+	.global	ftl_update_l2p_map
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_update_l2p_map, %function
+ftl_update_l2p_map:
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L3968
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r8, r3
-	ldr	r3, .L4178
 	sub	sp, sp, #24
-	mov	r4, r0
-	mov	r5, r1
-	mov	r7, r2
+	ldrb	r7, [r0, #9]	@ zero_extendqisi2
+	mov	r6, r0
+	ldrh	r3, [r3]
+	ldr	r2, .L3968+4
+	muls	r7, r3, r7
+	ldr	r4, [r2]
+	ldrh	r3, [r0, #12]
+	str	r2, [sp, #4]
+	add	r4, r4, r3, lsl #2
+	add	r3, r7, #1073741824
+	subs	r3, r3, #1
+	ldr	r3, [r4, r3, lsl #2]
+	adds	r3, r3, #1
+	beq	.L3940
+	movw	r2, #1990
+	ldr	r1, .L3968+8
+	ldr	r0, .L3968+12
+	bl	printf
+.L3940:
+	movs	r5, #0
+	subs	r4, r4, #4
+	mov	r10, r5
+.L3941:
+	cmp	r10, r7
+	bne	.L3947
+	ldr	r3, .L3968+16
+	ldr	r4, .L3968+20
 	ldr	r3, [r3]
-	lsls	r3, r3, #19
-	bpl	.L4159
-	ldr	r3, [r8]
-	str	r3, [sp]
-	mov	r3, r2
-	mov	r2, r1
-	mov	r1, r0
-	ldr	r0, .L4178+4
+	tst	r3, #4096
+	beq	.L3948
+	ldrh	r1, [r6]
+	mov	r2, r5
+	ldr	r3, [r4]
+	ldr	r0, .L3968+24
+	ldrh	r3, [r3, r1, lsl #1]
 	bl	printf
-.L4159:
-	cbnz	r4, .L4160
-	ldr	r3, .L4178+8
-	mov	r4, #24576
+.L3948:
+	ldrh	r2, [r6]
+	ldr	r3, [r4]
+	strh	r5, [r3, r2, lsl #1]	@ movhi
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3947:
+	ldr	r8, [r4, #4]!
+	cmp	r8, #-1
+	beq	.L3942
+	ldr	r3, .L3968+28
+	mov	r0, r8
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	lsls	r1, r1, #7
+	bl	__aeabi_uidiv
+	uxth	r3, r0
+	str	r3, [sp]
+	ldr	r3, .L3968+16
 	ldr	r3, [r3]
-.L4161:
-	adds	r2, r5, r7
-	cmp	r3, r2
-	bcc	.L4174
-	ldr	fp, .L4178+24
-	add	r4, r4, r5
-	mov	r0, r4
-	ldrb	r5, [fp]	@ zero_extendqisi2
-	mov	r1, r5
-	bl	__aeabi_uidiv
-	mov	r10, r0
-	subs	r0, r7, #1
-	mov	r1, r5
-	add	r0, r0, r4
+	lsls	r2, r3, #19
+	bpl	.L3943
+	mov	r3, r10
+	mov	r2, r8
+	ldr	r1, [sp]
+	ldr	r0, .L3968+32
+	bl	printf
+.L3943:
+	mov	r8, r4
+	mov	fp, r10
+.L3946:
+	ldr	r0, [r8]
+	adds	r3, r0, #1
+	beq	.L3944
+	ldr	r3, .L3968+28
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	lsls	r1, r1, #7
 	bl	__aeabi_uidiv
-	sub	r5, r0, r10
-	mov	r6, r10
-	adds	r5, r5, #1
-	str	r0, [sp, #12]
-	str	fp, [sp, #16]
-.L4163:
-	cbnz	r5, .L4170
-	bl	ftl_write_commit
-	bl	ftl_flush
-	ldr	r4, .L4178+12
-	mov	r0, r5
-	ldr	r5, .L4178+16
-	movs	r1, #1
-	bl	zftl_do_gc
-.L4171:
-	ldrh	r3, [r5]
-	ldrh	r2, [r4]
-	add	r3, r3, r2
-	cmp	r3, #7
-	ble	.L4172
-	movs	r0, #0
-.L4158:
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L4160:
-	cmp	r4, #3
-	bhi	.L4174
-	lsls	r4, r4, #13
-	mov	r3, #8192
-	b	.L4161
-.L4170:
-	movs	r0, #0
-	bl	buf_alloc
-	mov	fp, r0
-	cbnz	r0, .L4164
-	bl	ftl_write_commit
-	b	.L4163
-.L4164:
-	mov	r3, #0
-	cmp	r6, r10
-	strb	r3, [r0, #41]
-	ldr	r3, [sp, #16]
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	strb	r2, [r0, #40]
-	bne	.L4166
-	mov	r1, r2
-	mov	r0, r4
-	str	r2, [sp, #20]
-	bl	__aeabi_uidivmod
-	ldr	r2, [sp, #20]
-	uxtb	r1, r1
-	strb	r1, [fp, #41]
-	subs	r1, r2, r1
-	uxtb	r1, r1
-	cmp	r7, r1
-	ite	cs
-	strbcs	r1, [fp, #40]
-	strbcc	r7, [fp, #40]
-.L4168:
-	ldrb	ip, [fp, #41]	@ zero_extendqisi2
-	mov	r1, r8
-	ldrb	r2, [fp, #40]	@ zero_extendqisi2
-	subs	r5, r5, #1
-	ldr	r0, [fp, #4]
-	lsls	r2, r2, #9
-	add	r0, r0, ip, lsl #9
-	bl	ftl_memcpy
-	ldr	r3, .L4178+20
-	str	r6, [fp, #20]
-	adds	r6, r6, #1
-	ldr	r1, [r3]
-	ldr	r2, [r1, #8]
-	adds	r0, r2, #1
-	str	r0, [r1, #8]
+	ldr	r3, [sp]
+	uxth	r0, r0
+	cmp	r3, r0
+	bne	.L3944
+	ldrb	r3, [r6, #9]	@ zero_extendqisi2
 	mov	r0, fp
-	str	r2, [fp, #16]
-	bl	ftl_write_buf
-	ldrb	r3, [fp, #40]	@ zero_extendqisi2
-	add	r8, r8, r3, lsl #9
-	b	.L4163
-.L4166:
+	mov	r1, r3
+	str	r3, [sp, #12]
+	bl	__aeabi_idivmod
+	ldr	r3, .L3968+36
+	adds	r1, r1, #8
+	ldrh	r0, [r6, r1, lsl #1]
+	ldrh	r2, [r3]
 	ldr	r3, [sp, #12]
-	cmp	r6, r3
-	itttt	eq
-	smulbbeq	r2, r6, r2
-	addeq	r1, r4, r7
-	subeq	r2, r1, r2
-	strbeq	r2, [r0, #40]
-	b	.L4168
-.L4172:
-	movs	r1, #1
-	movs	r0, #0
-	bl	zftl_do_gc
-	b	.L4171
-.L4174:
-	mov	r0, #-1
-	b	.L4158
-.L4179:
+	muls	r2, r0, r2
+	mov	r1, r3
+	mov	r0, fp
+	str	r2, [sp, #8]
+	bl	__aeabi_idiv
+	ldr	r2, [sp, #8]
+	add	r2, r2, r0
+	ldr	r0, .L3968+40
+	str	r2, [sp, #20]
+	ldr	r1, [r8]
+	bl	pm_ppa_update_check
+	cbz	r0, .L3945
+	ldr	r1, [sp, #4]
+	mov	r3, r7
+	movs	r2, #4
+	ldr	r0, .L3968+44
+	ldr	r1, [r1]
+	bl	rknand_print_hex
+.L3945:
+	adds	r5, r5, #1
+	movs	r2, #1
+	uxth	r5, r5
+	add	r1, sp, #20
+	ldr	r0, [r8]
+	bl	pm_log2phys
+	mov	r3, #-1
+	str	r3, [r8]
+.L3944:
+	add	fp, fp, #1
+	add	r8, r8, #4
+	cmp	r7, fp
+	bne	.L3946
+.L3942:
+	add	r10, r10, #1
+	b	.L3941
+.L3969:
 	.align	2
-.L4178:
+.L3968:
+	.word	.LANCHOR95
+	.word	.LANCHOR117
+	.word	.LANCHOR231
+	.word	.LC0
 	.word	.LANCHOR14
-	.word	.LC246
-	.word	.LANCHOR61
-	.word	.LANCHOR101
-	.word	.LANCHOR97
-	.word	.LANCHOR104
-	.word	.LANCHOR125
-	.size	zftl_write, .-zftl_write
-	.section	.text.ftl_vendor_write,"ax",%progbits
-	.align	1
-	.global	ftl_vendor_write
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_vendor_write, %function
-ftl_vendor_write:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	mov	r3, r2
-	mov	r2, r1
-	add	r1, r0, #512
-	movs	r0, #2
-	b	zftl_write
-	.size	ftl_vendor_write, .-ftl_vendor_write
-	.section	.text.zftl_sys_write,"ax",%progbits
-	.align	1
-	.global	zftl_sys_write
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	zftl_sys_write, %function
-zftl_sys_write:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	mov	r3, r2
-	mov	r2, r1
-	mov	r1, r0
-	movs	r0, #2
-	b	zftl_write
-	.size	zftl_sys_write, .-zftl_sys_write
-	.section	.text.StorageSysDataStore,"ax",%progbits
+	.word	.LANCHOR9
+	.word	.LC231
+	.word	.LANCHOR131
+	.word	.LC228
+	.word	.LANCHOR111
+	.word	.LC229
+	.word	.LC230
+	.size	ftl_update_l2p_map, .-ftl_update_l2p_map
+	.section	.text.ftl_alloc_new_data_sblk,"ax",%progbits
 	.align	1
-	.global	StorageSysDataStore
+	.global	ftl_alloc_new_data_sblk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	StorageSysDataStore, %function
-StorageSysDataStore:
+	.type	ftl_alloc_new_data_sblk, %function
+ftl_alloc_new_data_sblk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	mov	r3, r1
-	movs	r2, #1
-	mov	r1, r0
-	movs	r0, #2
-	b	zftl_write
-	.size	StorageSysDataStore, .-StorageSysDataStore
-	.section	.text.FlashBootVendorWrite,"ax",%progbits
+	push	{r4, r5, r6, lr}
+	mov	r5, r0
+	ldrh	r6, [r0]
+	bl	ftl_update_l2p_map
+	bl	pm_flush
+	ldrh	r0, [r5]
+	movw	r3, #65535
+	cmp	r0, r3
+	beq	.L3971
+	bl	zftl_insert_data_list
+.L3971:
+	ldr	r4, .L3975
+	mov	r0, r5
+	ldr	r1, [r4]
+	adds	r1, r1, #16
+	cmp	r5, r1
+	ite	eq
+	moveq	r1, #2
+	movne	r1, #3
+	bl	ftl_open_sblk_init
+	ldr	r3, [r4]
+	ldr	r3, [r3, #560]
+	cmp	r3, r6
+	bne	.L3973
+	movw	r5, #65535
+	cmp	r6, r5
+	beq	.L3973
+	mov	r1, r6
+	ldr	r0, .L3975+4
+	bl	printf
+	ldr	r3, [r4]
+	ldr	r0, [r3, #564]
+	bl	gc_mark_bad_ppa
+	ldr	r3, [r4]
+	mov	r2, #-1
+	str	r5, [r3, #560]
+	str	r2, [r3, #564]
+.L3973:
+	bl	ftl_ext_info_flush
+	movs	r0, #0
+	bl	ftl_info_flush
+	bl	lpa_rebuild_hash
+	movs	r0, #0
+	pop	{r4, r5, r6, pc}
+.L3976:
+	.align	2
+.L3975:
+	.word	.LANCHOR10
+	.word	.LC232
+	.size	ftl_alloc_new_data_sblk, .-ftl_alloc_new_data_sblk
+	.section	.text.ftl_write_commit,"ax",%progbits
 	.align	1
-	.global	FlashBootVendorWrite
+	.global	ftl_write_commit
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashBootVendorWrite, %function
-FlashBootVendorWrite:
-	@ args = 0, pretend = 0, frame = 0
+	.type	ftl_write_commit, %function
+ftl_write_commit:
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	mov	r3, r2
-	mov	r2, r1
-	add	r1, r0, #512
-	movs	r0, #2
-	b	zftl_write
-	.size	FlashBootVendorWrite, .-FlashBootVendorWrite
-	.section	.text.ftl_write,"ax",%progbits
-	.align	1
-	.global	ftl_write
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_write, %function
-ftl_write:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, lr}
-	mov	r7, r1
-	mov	r4, r2
-	mov	r5, r3
-	mov	r6, r0
-	cbnz	r0, .L4185
-	mov	r3, r2
-	mov	r2, r5
-	bl	idb_write_data
-.L4185:
-	mov	r3, r5
-	mov	r2, r4
-	mov	r1, r7
-	mov	r0, r6
-	pop	{r4, r5, r6, r7, r8, lr}
-	b	zftl_write
-	.size	ftl_write, .-ftl_write
-	.section	.text.zftl_discard,"ax",%progbits
-	.align	1
-	.global	zftl_discard
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	zftl_discard, %function
-zftl_discard:
-	@ args = 0, pretend = 0, frame = 24
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L4234
-	adds	r3, r0, r1
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r4, r1
 	sub	sp, sp, #32
-	ldr	r2, [r2]
+	ldr	r8, .L4040+32
+.L3978:
+	ldr	r1, .L4040
+	ldrb	r3, [r1]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L3980
+	ldr	r0, .L4040+4
+	subs	r3, r3, #1
+	strb	r3, [r1]
+	ldrb	r2, [r0]	@ zero_extendqisi2
+	str	r2, [sp, #12]
+	add	r2, r2, r2, lsl #1
+	ldr	r4, [sp, #12]
+	add	r2, r8, r2, lsl #4
+	str	r2, [sp, #20]
+	movs	r2, #48
+	muls	r2, r4, r2
+	ldr	r4, .L4040+8
+	ldr	r3, [r4]
+	add	r5, r8, r2
+	ldrb	r2, [r8, r2]	@ zero_extendqisi2
+	strb	r2, [r0]
+	ldr	r2, [r5, #20]
 	cmp	r2, r3
-	bcc	.L4207
-	ldr	r2, .L4234+4
-	add	r7, r0, #24576
-	ldr	r3, .L4234+8
-	ldr	r0, [r2]
-	ldr	r1, [r3]
-	str	r3, [sp, #12]
-	tst	r0, #4096
-	str	r2, [sp, #16]
-	add	r1, r1, r4
-	str	r1, [r3]
-	beq	.L4188
-	movs	r3, #0
-	mov	r2, r7
-	str	r3, [sp]
-	mov	r3, r4
-	ldr	r0, .L4234+12
+	bcc	.L3982
+	mov	r2, #604
+	ldr	r1, .L4040+12
+	ldr	r0, .L4040+16
 	bl	printf
-.L4188:
-	ldr	r8, .L4234+36
-	ldr	r10, .L4234+40
-	ldr	r3, [r8]
-	ldr	r2, [r3, #8]
+.L3982:
+	ldr	r2, [sp, #12]
+	movs	r3, #48
+	mla	r3, r3, r2, r8
+	ldr	r2, [r4]
+	ldr	r7, [r3, #20]
+	cmp	r7, r2
+	bcc	.L3983
+	ldr	r0, [sp, #20]
+	bl	zbuf_free
+	mov	r0, #-1
+.L3977:
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3983:
+	ldr	r2, [r3, #12]
+	ldr	fp, [r3, #4]
+	ldrb	r4, [r3, #41]	@ zero_extendqisi2
+	ldrb	r3, [r3, #40]	@ zero_extendqisi2
 	str	r2, [sp, #8]
-	adds	r2, r2, #1
-	str	r2, [r3, #8]
-	bl	ftl_write_commit
-	bl	ftl_flush
-	ldrb	r6, [r10]	@ zero_extendqisi2
-	mov	r0, r7
-	mov	r1, r6
-	bl	__aeabi_uidiv
-	mov	r1, r6
-	mov	r5, r0
+	str	r3, [sp, #16]
+	ldr	r3, .L4040+20
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L3985
+	ldr	r3, .L4040+24
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	add	r5, r5, r5, lsl #1
+	add	r5, r8, r5, lsl #4
+.L3986:
+	ldrb	r3, [r5]	@ zero_extendqisi2
+	cmp	r3, #255
+	bne	.L3987
+	ldr	r3, [r5, #20]
+	cmp	r7, r3
+	bne	.L3985
+	ldr	r2, [sp, #16]
+	lsls	r0, r4, #9
+	ldr	r3, [r5, #4]
+	add	r1, fp, r0
+	lsls	r2, r2, #9
+	add	r0, r0, r3
+	bl	ftl_memcpy
+	ldr	r3, .L4040+28
+	movs	r0, #2
+	ldr	r2, [r5, #4]
+	ldr	r1, [r5, #12]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	adds	r1, r1, #16
+	subs	r3, r3, #2
+	add	r2, r2, r3, lsl #9
+	bl	ftl_debug_info_fill
+	ldr	r0, [sp, #20]
+	bl	zbuf_free
+	b	.L3978
+.L3987:
+	add	r3, r3, r3, lsl #1
+	add	r5, r8, r3, lsl #4
+	b	.L3986
+.L3985:
 	mov	r0, r7
-	bl	__aeabi_uidivmod
-	mov	fp, r1
-	cmp	r1, #0
-	beq	.L4189
-	subs	r6, r6, r1
-	mov	r0, r5
-	cmp	r6, r4
-	it	cs
-	movcs	r6, r4
 	bl	lpa_hash_get_ppa
-	str	r0, [sp, #24]
+	str	r0, [sp, #28]
 	adds	r0, r0, #1
-	bne	.L4190
+	bne	.L3989
 	movs	r2, #0
-	add	r1, sp, #24
-	mov	r0, r5
+	add	r1, sp, #28
+	mov	r0, r7
 	bl	pm_log2phys
-.L4190:
-	ldr	r3, [sp, #24]
+.L3989:
+	ldr	r10, .L4040+36
+	movs	r2, #0
+	ldr	r3, .L4040+32
+	mov	r5, r2
+	ldr	r0, [sp, #28]
+	ldr	r6, [r10]
+	add	ip, r3, #1536
+	adds	r6, r6, #16
+.L3991:
+	ldr	r1, [r3, #20]
+	cmp	r7, r1
+	bne	.L3990
+	ldrb	r1, [r3, #2]	@ zero_extendqisi2
+	tst	r1, #8
+	beq	.L3990
+	ldr	r5, [r3, #4]
+	movs	r2, #1
+	ldr	r0, [r3, #24]
+	bic	r1, r1, #8
+	strb	r1, [r3, #2]
+.L3990:
+	adds	r3, r3, #48
+	cmp	r3, ip
+	bne	.L3991
+	cbz	r2, .L3992
+	str	r0, [sp, #28]
+.L3992:
+	ldr	r3, .L4040+28
+	ldr	r2, [sp, #16]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r2, r3
+	bcs	.L4016
+	cbz	r5, .L3994
+	cbz	r4, .L3995
+	lsls	r2, r4, #9
+	mov	r1, r5
+	mov	r0, fp
+	bl	ftl_memcpy
+	ldr	r3, .L4040+36
+	ldr	r6, [r3]
+	adds	r6, r6, #48
+.L3995:
+	ldr	r3, [sp, #16]
+	add	r4, r4, r3
+	ldr	r3, .L4040+28
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	cmp	r4, r2
+	bcc	.L3996
+	ldr	r6, [r10]
+	adds	r6, r6, #16
+.L4016:
+	mov	r10, #0
+	b	.L3993
+.L3996:
+	lsls	r0, r4, #9
+	subs	r2, r2, r4
+	lsls	r2, r2, #9
+	adds	r1, r5, r0
+	add	r0, r0, fp
+	bl	ftl_memcpy
+	b	.L4016
+.L4041:
+	.align	2
+.L4040:
+	.word	.LANCHOR67
+	.word	.LANCHOR66
+	.word	.LANCHOR128
+	.word	.LANCHOR232
+	.word	.LC0
+	.word	.LANCHOR129
+	.word	.LANCHOR185
+	.word	.LANCHOR131
+	.word	.LANCHOR56
+	.word	.LANCHOR10
+.L3994:
+	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
-	beq	.L4192
-	movs	r0, #0
+	beq	.L3997
+	movs	r0, #1
 	bl	buf_alloc
-	mov	r3, r0
-	cbz	r0, .L4192
-	ldr	r2, [sp, #8]
-	movs	r1, #0
-	str	r5, [r0, #20]
-	strb	fp, [r0, #41]
-	str	r2, [r0, #16]
-	uxth	r2, r6
-	strb	r6, [r0, #40]
-	ldr	r0, [r0, #4]
-	lsls	r2, r2, #9
-	str	r3, [sp, #20]
-	add	r0, r0, fp, lsl #9
-	bl	ftl_memset
-	ldr	r3, [sp, #20]
-	mov	r0, r3
-	bl	ftl_write_buf
-	bl	ftl_write_commit
-	ldr	r2, [r8]
-	ldr	r3, [r2, #76]
+	ldr	r3, [sp, #28]
+	mov	r5, r0
+	str	r7, [r0, #20]
+	movs	r1, #1
+	str	r3, [r0, #24]
+	bl	sblk_read_page
+	ldr	r3, [r5, #12]
+	ldr	r2, [r3, #12]
+	ldr	r3, [r3, #4]
+	add	r10, r2, #1
+	cmp	r7, r3
+	bne	.L3998
+	ldr	r3, [r5, #36]
 	adds	r3, r3, #1
-	str	r3, [r2, #76]
-.L4192:
-	uxth	r6, r6
-	adds	r5, r5, #1
-	subs	r4, r4, r6
-.L4189:
-	cbz	r4, .L4194
-	bl	ftl_flush
-.L4194:
-	ldr	fp, .L4234+44
-	mov	r3, #-1
-	ldr	r6, .L4234+16
-	str	r3, [sp, #28]
-.L4195:
-	ldrb	r3, [r10]	@ zero_extendqisi2
-	cmp	r4, r3
-	bcs	.L4200
-	cmp	r4, #0
-	beq	.L4202
-	mov	r0, r5
-	bl	lpa_hash_get_ppa
-	str	r0, [sp, #24]
-	adds	r0, r0, #1
-	bne	.L4203
-	movs	r2, #0
-	add	r1, sp, #24
-	mov	r0, r5
-	bl	pm_log2phys
-.L4203:
-	ldr	r3, [sp, #24]
+	bne	.L3999
+.L3998:
+	ldr	r3, .L4042
+	ldr	r0, .L4042+4
+	ldr	r2, [r3]
+	ldr	r3, [r2, #552]
 	adds	r3, r3, #1
-	beq	.L4202
-	movs	r0, #0
-	bl	buf_alloc
-	mov	r6, r0
-	cbz	r0, .L4202
-	movs	r3, #0
-	str	r5, [r0, #20]
-	strb	r3, [r0, #41]
-	ldr	r3, [sp, #8]
-	strb	r4, [r0, #40]
-	str	r3, [r0, #16]
-	ldrb	r3, [r10]	@ zero_extendqisi2
-	cmp	r4, r3
-	bcc	.L4205
-	movw	r2, #1259
-	ldr	r1, .L4234+20
-	ldr	r0, .L4234+24
+	str	r3, [r2, #552]
+	ldr	r3, [r5, #36]
+	ldrb	r1, [r5, #1]	@ zero_extendqisi2
+	ldr	r2, [sp, #28]
+	str	r3, [sp]
+	mov	r3, r7
 	bl	printf
-.L4205:
+	movs	r3, #4
+	ldr	r1, [r5, #12]
+	mov	r2, r3
+	ldr	r0, .L4042+8
+	bl	rknand_print_hex
+.L3999:
+	ldr	r3, [r5, #12]
+	ldr	r3, [r3, #4]
+	cmp	r7, r3
+	bne	.L4000
+	ldr	r3, [r5, #36]
+	adds	r3, r3, #1
+	bne	.L4001
+.L4000:
+	movw	r2, #691
+	ldr	r1, .L4042+12
+	ldr	r0, .L4042+16
+	bl	printf
+.L4001:
+	cbz	r4, .L4002
+	ldr	r3, [sp, #28]
 	lsls	r2, r4, #9
-	movs	r1, #0
-	ldr	r0, [r6, #4]
-	bl	ftl_memset
-	mov	r0, r6
-	bl	ftl_write_buf
-	bl	ftl_write_commit
-	ldr	r2, [r8]
-	ldr	r3, [r2, #76]
 	adds	r3, r3, #1
-	str	r3, [r2, #76]
-.L4202:
-	ldr	r3, [sp, #12]
-	ldr	r1, [r3]
-	cmp	r1, #8192
-	bls	.L4208
+	beq	.L4003
+	ldr	r1, [r5, #4]
+	mov	r0, fp
+	bl	ftl_memcpy
+.L4004:
+	ldr	r3, .L4042
+	ldr	r6, [r3]
+	adds	r6, r6, #48
+.L4002:
 	ldr	r3, [sp, #16]
-	ldr	r3, [r3]
-	lsls	r3, r3, #19
-	bpl	.L4206
-	movs	r3, #0
-	mov	r2, r7
-	str	r3, [sp]
-	mov	r3, r4
-	ldr	r0, .L4234+12
-	bl	printf
-.L4206:
-	ldr	r3, [sp, #12]
-	movs	r4, #0
-	str	r4, [r3]
-	bl	flt_sys_flush
-	ldr	r3, .L4234+28
-	movs	r2, #1
-	str	r2, [r3]
-.L4208:
-	movs	r0, #0
-	b	.L4186
-.L4200:
+	add	r4, r4, r3
+	ldr	r3, .L4042+20
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	cmp	r4, r2
+	bcc	.L4005
+	bls	.L4006
+	ldr	r3, .L4042
+	ldr	r6, [r3]
+	adds	r6, r6, #16
+.L4006:
+	cbz	r5, .L3993
+	ldrb	r3, [r5, #2]	@ zero_extendqisi2
+	mov	r1, r5
+	ldr	r0, .L4042+24
+	bic	r3, r3, #8
+	strb	r3, [r5, #2]
+	bl	buf_remove_buf
 	mov	r0, r5
-	bl	lpa_hash_get_ppa
-	str	r0, [sp, #24]
-	adds	r0, r0, #1
-	beq	.L4196
+	bl	zbuf_free
+.L3993:
+	ldrh	r3, [r6, #6]
+	cbnz	r3, .L4008
+	bl	ftl_flush
+	mov	r0, r6
+	bl	ftl_alloc_new_data_sblk
+.L4008:
+	mov	r0, r6
+	movs	r5, #48
+	bl	ftl_get_new_free_page
+	ldr	r3, [sp, #12]
+	str	r0, [sp, #16]
+	movs	r0, #2
+	muls	r5, r3, r5
+	ldr	r3, [sp, #8]
+	mov	r1, r3
+	add	r4, r8, r5
+	ldr	r2, [r4, #16]
+	str	r10, [r3, #12]
+	stm	r3, {r2, r7}
+	movs	r7, #0
+	ldr	r2, [sp, #28]
+	str	r2, [r3, #8]
+	ldr	r3, .L4042+20
+	str	r7, [r1, #16]!
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	subs	r2, r2, #2
+	add	r2, fp, r2, lsl #9
+	bl	ftl_debug_info_fill
+	ldr	r3, [sp, #16]
+	ldrh	r2, [r6, #12]
+	ldr	r1, [sp, #20]
+	str	r3, [r4, #24]
+	ldr	r3, [sp, #28]
+	ldr	r0, .L4042+28
+	str	r3, [r4, #28]
+	movs	r3, #255
+	strb	r3, [r8, r5]
+	ldrb	r3, [r4, #2]	@ zero_extendqisi2
+	orr	r3, r3, #10
+	strb	r3, [r4, #2]
+	ldrh	r3, [r6, #10]
+	add	r3, r3, r2
+	subs	r3, r3, #1
+	strh	r3, [r4, #32]	@ movhi
+	bl	buf_add_tail
+	ldr	r2, .L4042+32
+	ldrb	r3, [r2]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	strb	r3, [r2]
+	cmp	r3, #2
+	ldr	r2, .L4042+36
+	str	r7, [r2]
+	ldrh	r2, [r6, #6]
+	bhi	.L4009
+	cmp	r2, #1
+	bne	.L3981
+.L4009:
+	ldr	r5, .L4042+28
+	movs	r7, #48
+	ldrb	r1, [r6, #5]	@ zero_extendqisi2
+	ldrb	r0, [r5]	@ zero_extendqisi2
+	cmp	r1, #0
+	mov	r1, #0
+	ite	ne
+	movne	r4, #2
+	moveq	r4, #1
+	cmp	r2, #1
+	it	eq
+	moveq	r4, r3
+	mov	r2, r0
+.L4013:
+	cmp	r1, r4
+	bne	.L4014
+	strb	r2, [r5]
+	uxtb	r1, r1
+	ldr	r2, .L4042+32
+	add	r0, r0, r0, lsl #1
+	subs	r3, r3, r1
+	add	r0, r8, r0, lsl #4
+	strb	r3, [r2]
+	bl	sblk_prog_page
+	ldrh	r3, [r6, #6]
+	cmp	r3, #1
+	bne	.L3981
+	bl	sblk_wait_write_queue_completed
+	bl	ftl_write_completed
+	mov	r0, r6
+	bl	ftl_write_last_log_page
+	mov	r0, r6
+	bl	ftl_alloc_new_data_sblk
+.L3981:
+	ldr	r3, .L4042+40
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L3978
+.L3980:
+	bl	ftl_write_completed
 	movs	r0, #0
-	bl	buf_alloc
-	mov	r3, r0
-	cbz	r0, .L4198
-	ldrb	r2, [r10]	@ zero_extendqisi2
-	movs	r1, #0
-	strb	r1, [r0, #41]
-	str	r5, [r0, #20]
-	strb	r2, [r0, #40]
-	ldr	r0, [sp, #8]
+	b	.L3977
+.L4005:
+	ldr	r3, [sp, #28]
+	subs	r2, r2, r4
 	lsls	r2, r2, #9
-	str	r3, [sp, #20]
-	str	r0, [r3, #16]
-	ldr	r0, [r3, #4]
-	bl	ftl_memset
-	ldr	r3, [sp, #20]
-	mov	r0, r3
-	bl	ftl_write_buf
-	bl	ftl_write_commit
-.L4233:
-	ldr	r2, [r8]
-	ldr	r3, [r2, #76]
-	adds	r3, r3, #1
-	str	r3, [r2, #76]
-.L4198:
-	ldrb	r3, [r10]	@ zero_extendqisi2
-	adds	r5, r5, #1
-	subs	r4, r4, r3
-	b	.L4195
-.L4196:
-	movs	r2, #0
-	add	r1, sp, #24
-	mov	r0, r5
-	bl	pm_log2phys
-	ldr	r3, [sp, #24]
+	lsls	r0, r4, #9
 	adds	r3, r3, #1
-	beq	.L4198
-	add	r1, sp, #28
-	movs	r2, #1
-	mov	r0, r5
-	bl	pm_log2phys
-	ldrb	r3, [r6]	@ zero_extendqisi2
-	ldrh	r2, [fp]
-	rsb	r3, r3, #24
-	subs	r0, r3, r2
-	movs	r3, #1
-	lsls	r3, r3, r0
-	ldr	r0, [sp, #24]
-	subs	r3, r3, #1
-	lsrs	r0, r0, r2
-	ldr	r2, .L4234+32
-	ands	r0, r0, r3
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	bl	__aeabi_uidiv
-	uxth	r0, r0
-	bl	ftl_vpn_decrement
-	b	.L4233
-.L4207:
-	mov	r0, #-1
-.L4186:
-	add	sp, sp, #32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L4235:
+	beq	.L4007
+	ldr	r1, [r5, #4]
+	add	r1, r1, r0
+	add	r0, r0, fp
+	bl	ftl_memcpy
+	b	.L4006
+.L4007:
+	movs	r1, #0
+	add	r0, r0, fp
+	bl	ftl_memset
+	b	.L4006
+.L4014:
+	muls	r2, r7, r2
+	adds	r1, r1, #1
+	ldrb	r2, [r8, r2]	@ zero_extendqisi2
+	b	.L4013
+.L4015:
+	lsls	r2, r4, #9
+	mov	r10, r5
+.L4003:
+	movs	r1, #0
+	mov	r0, fp
+	bl	ftl_memset
+	b	.L4004
+.L3997:
+	cmp	r4, #0
+	bne	.L4015
+	mov	r10, r4
+	mov	r5, r4
+	b	.L4002
+.L4043:
 	.align	2
-.L4234:
-	.word	.LANCHOR61
-	.word	.LANCHOR14
-	.word	.LANCHOR227
-	.word	.LC247
-	.word	.LANCHOR31
-	.word	.LANCHOR228
+.L4042:
+	.word	.LANCHOR10
+	.word	.LC233
+	.word	.LC205
+	.word	.LANCHOR232
 	.word	.LC0
-	.word	.LANCHOR116
-	.word	.LANCHOR69
-	.word	.LANCHOR104
-	.word	.LANCHOR125
-	.word	.LANCHOR68
-	.size	zftl_discard, .-zftl_discard
-	.section	.text.ftl_discard,"ax",%progbits
-	.align	1
-	.global	ftl_discard
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_discard, %function
-ftl_discard:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	mov	r0, r1
-	mov	r1, r2
-	b	zftl_discard
-	.size	ftl_discard, .-ftl_discard
-	.section	.text.dump_pm_blk,"ax",%progbits
+	.word	.LANCHOR131
+	.word	.LANCHOR63
+	.word	.LANCHOR185
+	.word	.LANCHOR129
+	.word	.LANCHOR233
+	.word	.LANCHOR67
+	.size	ftl_write_commit, .-ftl_write_commit
+	.section	.text.gc_do_copy_back,"ax",%progbits
 	.align	1
-	.global	dump_pm_blk
+	.global	gc_do_copy_back
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	dump_pm_blk, %function
-dump_pm_blk:
-	@ args = 0, pretend = 0, frame = 0
+	.type	gc_do_copy_back, %function
+gc_do_copy_back:
+	@ args = 0, pretend = 0, frame = 72
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	movs	r2, #4
-	ldr	r4, .L4241
-	movs	r5, #0
-	movw	r7, #65535
-	ldr	r0, .L4241+4
-	ldr	r1, [r4]
-	ldr	r6, .L4241+8
-	ldrh	r3, [r1, #698]
-	add	r1, r1, #704
-	bl	rknand_print_hex
-	ldr	r1, [r4]
-	movs	r2, #2
-	ldrh	r3, [r6]
-	ldr	r0, .L4241+12
-	add	r1, r1, #416
-	bl	rknand_print_hex
-.L4238:
-	ldrh	r2, [r6]
-	uxth	r3, r5
-	cmp	r2, r3
-	bhi	.L4240
-	pop	{r3, r4, r5, r6, r7, pc}
-.L4240:
-	ldr	r2, [r4]
-	uxth	r3, r5
-	adds	r3, r3, #208
-	ldrh	r0, [r2, r3, lsl #1]
-	cmp	r0, r7
-	beq	.L4239
-	movs	r1, #0
-	bl	ftl_sblk_dump
-.L4239:
-	adds	r5, r5, #1
-	b	.L4238
-.L4242:
+	ldr	r3, .L4187
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #80
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	cmp	r0, #0
+	bne	.L4045
+	bl	buf_alloc
+	mov	r4, r0
+	cmp	r0, #0
+	beq	.L4044
+	ldr	r5, .L4187+4
+	ldrh	r2, [r5, #22]
+	mov	r0, r2
+	bl	gc_get_src_ppa_from_index
+	movs	r1, #1
+	adds	r2, r2, #1
+	str	r0, [r4, #24]
+	mov	r6, r0
+	mov	r0, r4
+	strh	r2, [r5, #22]	@ movhi
+	bl	sblk_read_page
+	ldr	r3, [r4, #36]
+	adds	r0, r3, #1
+	beq	.L4047
+	cmp	r3, #512
+	bne	.L4048
+.L4047:
+	mov	r2, #1032
+	ldr	r1, .L4187+8
+	ldr	r0, .L4187+12
+	bl	printf
+.L4048:
+	ldr	r3, [r4, #12]
+	ldr	r8, [r3, #4]
+	mov	r0, r8
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #56]
+	adds	r0, r0, #1
+	bne	.L4049
+	movs	r2, #0
+	add	r1, sp, #56
+	mov	r0, r8
+	bl	pm_log2phys
+.L4049:
+	ldr	r7, [sp, #56]
+	cmp	r6, r7
+	bne	.L4050
+	ldr	r0, .L4187+16
+	movs	r3, #0
+.L4053:
+	adds	r2, r0, r3
+	ldr	r1, [r2, #20]
+	cmp	r8, r1
+	bne	.L4051
+	ldrb	r2, [r2, #2]	@ zero_extendqisi2
+	lsls	r1, r2, #30
+	bpl	.L4051
+	mov	r0, r4
+	bl	zbuf_free
+	ldr	r3, .L4187+20
+	ldr	r3, [r3]
+	lsls	r2, r3, #23
+	bpl	.L4044
+	ldrh	r3, [r5, #22]
+	mov	r2, r6
+	mov	r1, r8
+	ldr	r0, .L4187+24
+	bl	printf
+.L4044:
+	add	sp, sp, #80
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L4051:
+	adds	r3, r3, #48
+	cmp	r3, #1536
+	bne	.L4053
+	ldr	r3, .L4187+28
+	movs	r2, #0
+	str	r8, [r4, #20]
+	strb	r2, [r4, #41]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	strb	r3, [r4, #40]
+	ldr	r3, [r4, #12]
+	ldr	r1, [r3]
+	str	r1, [r4, #16]
+	str	r2, [r3, #16]
+	ldr	r3, .L4187+20
+	ldr	r3, [r3]
+	lsls	r3, r3, #23
+	bpl	.L4054
+	mov	r0, r8
+	bl	lpa_hash_get_ppa
+	ldrh	r3, [r5, #22]
+	mov	r2, r7
+	str	r6, [sp]
+	mov	r1, r8
+	str	r3, [sp, #4]
+	mov	r3, r0
+	ldr	r0, .L4187+32
+	bl	printf
+.L4054:
+	mov	r0, r4
+	bl	ftl_gc_write_buf
+	bl	ftl_write_commit
+	ldr	r3, .L4187+36
+	ldr	r2, [r3]
+	ldr	r3, [r2, #60]
+	adds	r3, r3, #1
+	str	r3, [r2, #60]
+	ldrh	r3, [r5, #24]
+	adds	r3, r3, #1
+	strh	r3, [r5, #24]	@ movhi
+	b	.L4044
+.L4050:
+	ldr	r3, .L4187+20
+	ldr	r3, [r3]
+	lsls	r0, r3, #23
+	bpl	.L4055
+	mov	r0, r8
+	bl	lpa_hash_get_ppa
+	ldrh	r3, [r5, #22]
+	mov	r2, r7
+	str	r6, [sp]
+	mov	r1, r8
+	str	r3, [sp, #4]
+	mov	r3, r0
+	ldr	r0, .L4187+32
+	bl	printf
+.L4055:
+	mov	r0, r4
+	bl	zbuf_free
+	b	.L4044
+.L4045:
+	ldr	r3, .L4187+40
+	ldr	r3, [r3]
+	ldrb	r6, [r3, #89]	@ zero_extendqisi2
+	str	r3, [sp, #28]
+	ldr	r3, .L4187+44
+	uxth	r7, r6
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r7
+	bhi	.L4113
+	cmp	r7, #2
+	mov	fp, r7
+	it	cs
+	movcs	fp, #2
+.L4056:
+	ldr	r3, .L4187+48
+	ldr	r5, .L4187+4
+	ldrb	r8, [r3]	@ zero_extendqisi2
+	cmp	r8, #3
+	bne	.L4057
+	ldr	r3, .L4187+52
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L4058
+	ldrh	r3, [r5, #2102]
+	mov	r1, r6
+	mov	r0, r3
+	str	r3, [sp, #12]
+	bl	__aeabi_idiv
+	ldr	r3, .L4187+56
+	uxth	r4, r0
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L4059
+	ldr	r3, .L4187+60
+	ldrh	r3, [r3, r0, lsl #1]
+	cmp	r3, #0
+	ite	eq
+	moveq	r3, #1
+	movne	r3, #2
+.L4179:
+	str	r3, [sp, #16]
+	smulbb	r7, r7, r4
+	ldr	r3, [sp, #12]
+	subs	r7, r3, r7
+	uxth	r3, r7
+	str	r3, [sp, #20]
+.L4061:
+	ldr	r3, [sp, #16]
+	ldr	r10, .L4187+60
+	mul	r3, fp, r3
+	str	r3, [sp, #24]
+	ldr	r3, .L4187+64
+	ldrh	r1, [r3]
+	ldr	r3, .L4187+68
+	muls	r1, r6, r1
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	movs	r6, #0
+	subs	r1, r1, r3
+	ldr	r3, .L4187+56
+	ldrb	r8, [r3]	@ zero_extendqisi2
+	ldr	r3, .L4187+72
+	ldr	r7, [r3]
+	ldrh	r3, [r5, #20]
+	str	r3, [sp, #32]
+	ldr	r3, .L4187+4
+.L4065:
+	ldr	r0, [sp, #24]
+	uxth	ip, r6
+	mov	r2, ip
+	cmp	ip, r0
+	bge	.L4121
+	ldr	r0, [sp, #12]
+	add	r2, r2, r0
+	cmp	r2, r1
+	blt	.L4066
+	cmp	r8, #0
+	beq	.L4121
+	ldrh	r0, [r10, r4, lsl #1]
+	cmp	r0, r4
+	bcc	.L4067
+.L4121:
+	movs	r3, #1
+	str	r3, [sp, #24]
+	b	.L4063
+.L4113:
+	mov	fp, #1
+	b	.L4056
+.L4059:
+	ldr	r3, .L4187+76
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L4115
+	sub	r3, r4, #62
+	cmp	r3, #2160
+	bcs	.L4116
+	mov	r1, r8
+	mov	r0, r4
+	bl	__aeabi_uidivmod
+	uxth	r1, r1
+	cmp	r1, #0
+	ite	ne
+	movne	r3, #1
+	moveq	r3, #2
+	b	.L4179
+.L4115:
+	movs	r3, #1
+	b	.L4179
+.L4116:
+	movs	r3, #2
+	b	.L4179
+.L4058:
+	ldr	r3, .L4187+80
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L4062
+	ldrh	r3, [r5, #2102]
+	add	r1, r6, r6, lsl #1
+	mov	r0, r3
+	str	r3, [sp, #12]
+	bl	__aeabi_idiv
+	uxth	r4, r0
+	muls	r0, r6, r0
+	ldr	r3, [sp, #12]
+	ldr	r2, .L4187+84
+	sub	r0, r0, r0, lsl #2
+	add	r0, r0, r3
+	smull	r2, r3, r0, r2
+	sub	r0, r3, r0, asr #31
+	uxth	r3, r0
+	str	r3, [sp, #20]
+	ldr	r3, .L4187+88
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L4118
+	add	r4, r4, r4, lsl #1
+	uxth	r4, r4
+.L4118:
+	str	r8, [sp, #16]
+	b	.L4061
+.L4188:
 	.align	2
-.L4241:
-	.word	.LANCHOR104
-	.word	.LC248
-	.word	.LANCHOR149
-	.word	.LC249
-	.size	dump_pm_blk, .-dump_pm_blk
-	.global	g_pm_spare
-	.global	pm_first_write
-	.global	pm_force_gc
-	.global	pm_gc_enable
-	.global	pm_last_load_ram_id
-	.global	pm_last_update_ram_id
-	.global	pm_ram_info
-	.global	sblk_gc_write_completed_queue_head
-	.global	sblk_read_completed_queue_head
-	.global	sblk_write_completed_queue_head
-	.global	sblk_queue_head
-	.global	slc_cache_sblk
-	.global	xlc_data_sblk
-	.global	slc_data_sblk
-	.global	free_mix_sblk
-	.global	free_xlc_sblk
-	.global	free_slc_sblk
+.L4187:
+	.word	.LANCHOR85
+	.word	.LANCHOR71
+	.word	.LANCHOR234
+	.word	.LC0
+	.word	.LANCHOR56
+	.word	.LANCHOR14
+	.word	.LC234
+	.word	.LANCHOR131
+	.word	.LC235
+	.word	.LANCHOR110
+	.word	.LANCHOR10
+	.word	.LANCHOR80
+	.word	.LANCHOR79
+	.word	.LANCHOR36
+	.word	.LANCHOR124
+	.word	.LANCHOR235
+	.word	.LANCHOR86
+	.word	.LANCHOR224
+	.word	.LANCHOR163
+	.word	.LANCHOR217
+	.word	.LANCHOR84
+	.word	1431655766
+	.word	.LANCHOR37
+.L4062:
+	ldrh	r10, [r5, #2102]
+	mov	r1, r6
+	mov	r0, r10
+	bl	__aeabi_idiv
+	ldr	r3, .L4189
+	smulbb	r7, r0, r7
+	str	r8, [sp, #16]
+	ldrh	r3, [r3, r0, lsl #1]
+	sub	r10, r10, r7
+	lsrs	r4, r3, #3
+	and	r3, r3, #7
+	str	r3, [sp, #24]
+	uxth	r3, r10
+	str	r3, [sp, #20]
+	mla	r3, r6, r4, r3
+	add	r3, r3, r3, lsl #1
+	uxth	r3, r3
+	str	r3, [sp, #12]
+	ldr	r3, [sp, #24]
+	cmp	r3, #1
+	beq	.L4061
+.L4063:
+	ldr	r3, [sp, #16]
+	ldrh	r2, [sp, #16]
+	mul	r3, fp, r3
+	str	r3, [sp, #40]
+	lsl	r3, fp, #1
+	uxth	r3, r3
+	str	r3, [sp, #44]
+	ldrh	r3, [sp, #44]
+	smulbb	r3, r3, r2
+	ldr	r2, [sp, #12]
+	subs	r3, r2, r3
+	uxth	r3, r3
+	str	r3, [sp, #48]
+	movs	r3, #0
+.L4183:
+	str	r3, [sp, #36]
+	ldr	r2, [sp, #40]
+	ldrh	r6, [sp, #36]
+	cmp	r6, r2
+	str	r6, [sp, #32]
+	blt	.L4095
+	ldr	r3, .L4189+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #3
+	bne	.L4096
+	ldr	r3, .L4189+8
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	cmp	r1, #0
+	beq	.L4097
+	movs	r1, #0
+	subs	r2, r2, #1
+.L4098:
+	uxth	r3, r1
+	adds	r1, r1, #1
+	cmp	r3, r2
+	blt	.L4099
+	add	r3, sp, #80
+	add	r2, r3, r2, lsl #2
+	ldr	r3, [r2, #-24]
+.L4184:
+	movs	r2, #255
+	strb	r2, [r3]
+	ldrh	r3, [sp, #16]
+	ldr	r0, [sp, #56]
+	smulbb	r1, fp, r3
+	uxtb	r1, r1
+	bl	sblk_prog_page
+	b	.L4100
+.L4057:
+	ldr	r3, .L4189+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L4064
+	ldrh	r3, [r5, #2102]
+	mov	r1, r6
+	mov	r0, r3
+	str	r3, [sp, #12]
+	bl	__aeabi_idiv
+	uxth	r4, r0
+	ldr	r3, [sp, #12]
+	smulbb	r7, r7, r4
+	subs	r7, r3, r7
+	uxth	r3, r7
+	str	r3, [sp, #20]
+	movs	r3, #1
+.L4180:
+	str	r3, [sp, #16]
+	b	.L4061
+.L4064:
+	ldrh	r3, [r5, #2102]
+	mov	r1, r6
+	mov	r0, r3
+	str	r3, [sp, #12]
+	bl	__aeabi_idiv
+	uxth	r4, r0
+	ldr	r3, [sp, #12]
+	smulbb	r7, r7, r4
+	subs	r7, r3, r7
+	uxth	r3, r7
+	str	r3, [sp, #20]
+	movs	r3, #2
+	b	.L4180
+.L4067:
+	tst	ip, #1
+	beq	.L4121
+.L4066:
+	ldr	r0, [r7, r2, lsl #2]
+	adds	r0, r0, #1
+	bne	.L4069
+	ldrh	r5, [r3, #22]
+	ldr	r0, [sp, #32]
+	cmp	r5, r0
+	bcs	.L4044
+	cmp	r8, #0
+	beq	.L4070
+	ldrh	r0, [r10, r4, lsl #1]
+	cmp	r0, r4
+	bcs	.L4070
+	tst	ip, #1
+	beq	.L4070
+	ldr	r0, [r7, r0, lsl #2]
+.L4181:
+	str	r0, [r7, r2, lsl #2]
+.L4069:
+	adds	r6, r6, #1
+	b	.L4065
+.L4070:
+	mov	r0, r5
+	str	r3, [sp, #36]
+	bl	gc_get_src_ppa_from_index
+	ldr	r3, [sp, #36]
+	adds	r5, r5, #1
+	strh	r5, [r3, #22]	@ movhi
+	b	.L4181
+.L4095:
+	ldr	r3, [sp, #12]
+	ldr	r2, [sp, #32]
+	adds	r7, r3, r2
+	ldr	r3, .L4189+16
+	ldr	r3, [r3]
+	ldrb	r3, [r3, r7]	@ zero_extendqisi2
+	cmp	r3, #255
+	bne	.L4072
+	movs	r0, #0
+	bl	buf_alloc
+	mov	r5, r0
+	cbnz	r0, .L4073
+	bl	sblk_wait_write_queue_completed
+	bl	ftl_write_completed
+	bl	gc_write_completed
+	bl	gc_free_temp_buf
+	mov	r0, r5
+	bl	buf_alloc
+	mov	r5, r0
+	cmp	r0, #0
+	beq	.L4044
+.L4073:
+	ldr	r3, .L4189+16
+	ldrb	r2, [r5, #1]	@ zero_extendqisi2
+	ldr	r3, [r3]
+	strb	r2, [r3, r7]
+	ldr	r2, .L4189+20
+	ldrb	r3, [r2, #7]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	strb	r3, [r2, #7]
+	ldr	r3, [sp, #12]
+	adds	r3, r6, r3
+	strh	r3, [r5, #32]	@ movhi
+	ldrb	r3, [sp, #24]	@ zero_extendqisi2
+	strb	r3, [r5, #45]
+	ldr	r3, .L4189+24
+	ldrh	r2, [r3]
+	ldr	r3, .L4189+28
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	ldr	r3, [sp, #28]
+	ldrb	r3, [r3, #89]	@ zero_extendqisi2
+	muls	r3, r2, r3
+	subs	r3, r3, r0
+	cmp	r7, r3
+	blt	.L4074
+	ldr	r1, .L4189+32
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	cbz	r1, .L4075
+	ldr	r1, .L4189+36
+	ldrh	r1, [r1, r4, lsl #1]
+	cmp	r1, r4
+	bcs	.L4075
+	lsls	r1, r6, #31
+	bmi	.L4074
+.L4075:
+	ldr	r1, .L4189+40
+	cmp	r0, #2
+	mov	ip, #-1
+	ldr	r1, [r1]
+	str	ip, [r1, r7, lsl #2]
+	bne	.L4076
+	cmp	r7, r3
+	ldr	r10, .L4189+68
+	bne	.L4077
+	ldrh	r2, [r10]
+	ldr	r0, [r5, #4]
+	bl	ftl_memcpy
+	ldr	r3, .L4189+44
+	movs	r1, #0
+	ldr	r0, [r5, #12]
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	lsls	r2, r2, #1
+	bl	ftl_memset
+	ldr	r8, [r5, #12]
+	ldr	r3, .L4189+48
+	ldr	r0, [r5, #4]
+	ldrh	r1, [r10]
+	str	r3, [r8]
+	bl	js_hash
+	ldr	r3, .L4189+52
+	str	r0, [r8, #4]
+	ldr	r3, [r3]
+	ldr	r3, [r3, #132]
+	str	r3, [r8, #8]
+	movs	r3, #0
+	str	r3, [r8, #12]
+.L4078:
+	ldr	r3, [r5, #12]
+	movs	r2, #0
+	str	r2, [r3, #16]
+.L4072:
+	ldr	r3, .L4189+16
+	add	r2, sp, #80
+	ldr	r3, [r3]
+	ldrb	r5, [r3, r7]	@ zero_extendqisi2
+	str	r3, [sp, #52]
+	ldr	r3, [sp, #32]
+	add	r1, r2, r3, lsl #2
+	ldr	r2, .L4189+56
+	add	r3, r5, r5, lsl #1
+	add	r3, r2, r3, lsl #4
+	str	r3, [r1, #-24]
+	movs	r1, #48
+	mla	r1, r1, r5, r2
+	ldrb	r3, [sp, #24]	@ zero_extendqisi2
+	strb	r3, [r1, #45]
+	movs	r3, #2
+	strh	r3, [r1, #34]	@ movhi
+	ldr	r3, .L4189+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #3
+	bne	.L4086
+	ldr	r3, .L4189+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L4087
+	ldr	r3, .L4189+32
+	and	r2, r6, #1
+	add	r10, r2, r4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L4088
+	ldr	r3, .L4189+36
+	ldrh	r3, [r3, r4, lsl #1]
+	cmp	r3, r4
+	bcs	.L4088
+	cmp	r2, #0
+	it	ne
+	movne	r10, r3
+.L4088:
+	ldr	r3, .L4189+56
+	mov	r8, #48
+	ldr	r1, [sp, #16]
+	mov	r0, r6
+	mla	r8, r8, r5, r3
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #20]
+	ldr	r2, .L4189+60
+	uxtah	r0, r3, r0
+	ldr	r3, [sp, #28]
+	ldrh	r2, [r2]
+	add	r0, r3, r0, lsl #1
+	ldrh	r3, [r0, #96]
+	mla	r10, r2, r3, r10
+	orr	r3, r10, #50331648
+	str	r3, [r8, #24]
+.L4093:
+	ldr	r2, .L4189+56
+	movs	r3, #48
+	mla	r5, r3, r5, r2
+	ldr	r3, .L4189+64
+	ldr	r3, [r3]
+	ldr	r1, [r5, #24]
+	ldrh	r2, [r5, #32]
+	str	r1, [r3, r2, lsl #2]
+	b	.L4112
+.L4190:
+	.align	2
+.L4189:
+	.word	.LANCHOR236
+	.word	.LANCHOR79
+	.word	.LANCHOR36
+	.word	.LANCHOR81
+	.word	.LANCHOR83
+	.word	.LANCHOR71
+	.word	.LANCHOR86
+	.word	.LANCHOR224
+	.word	.LANCHOR124
+	.word	.LANCHOR235
+	.word	.LANCHOR162
+	.word	.LANCHOR131
+	.word	-178307901
+	.word	.LANCHOR10
+	.word	.LANCHOR56
+	.word	.LANCHOR111
+	.word	.LANCHOR164
+	.word	.LANCHOR221
+.L4077:
+	ldr	r0, .L4191
+	ldrh	r3, [r10]
+	ldrb	r8, [r0]	@ zero_extendqisi2
+	ldr	r0, [r5, #4]
+	mul	r8, r2, r8
+	rsb	r8, r3, r8, lsl #2
+	lsrs	r3, r3, #2
+	mov	r2, r8
+	add	r1, r1, r3, lsl #2
+	bl	ftl_memcpy
+	ldr	r3, .L4191+4
+	movs	r1, #0
+	ldr	r0, [r5, #12]
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	lsls	r2, r2, #1
+	bl	ftl_memset
+	ldr	r10, [r5, #12]
+	mov	r1, r8
+	ldr	r3, .L4191+8
+	ldr	r0, [r5, #4]
+	str	r3, [r10]
+	bl	js_hash
+	ldr	r3, .L4191+12
+	str	r0, [r10, #4]
+	ldr	r3, [r3]
+	ldr	r3, [r3, #132]
+	str	r3, [r10, #8]
+	movs	r3, #1
+	str	r3, [r10, #12]
+	b	.L4078
+.L4076:
+	ldr	r10, .L4191
+	ldr	r0, [r5, #4]
+	ldrb	r8, [r10]	@ zero_extendqisi2
+	mul	r2, r2, r8
+	lsls	r2, r2, #2
+	bl	ftl_memcpy
+	ldr	r3, .L4191+16
+	ldr	r1, .L4191+4
+	ldrh	r2, [r3]
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	muls	r3, r2, r3
+	cmp	r1, r3, asr #6
+	lsl	r2, r3, #2
+	ldr	r1, .L4191+20
+	it	lt
+	ldrlt	r3, .L4191+24
+	mov	r0, r2
+	ldr	r1, [r1]
+	itt	lt
+	ldrhlt	r3, [r3]
+	sublt	r2, r3, r2
+	ldr	r3, [r5, #4]
+	add	r0, r0, r3
+	bl	ftl_memcpy
+	ldr	r3, .L4191+4
+	movs	r1, #0
+	ldr	r0, [r5, #12]
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	lsls	r2, r2, #1
+	bl	ftl_memset
+	ldr	r8, [r5, #12]
+	ldr	r3, .L4191+8
+	ldr	r2, .L4191
+	ldr	r0, [r5, #4]
+	str	r3, [r8]
+	ldr	r3, .L4191+16
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	muls	r1, r3, r1
+	lsls	r1, r1, #2
+	bl	js_hash
+	ldr	r3, .L4191+12
+	str	r0, [r8, #4]
+	ldr	r3, [r3]
+	ldr	r3, [r3, #132]
+	str	r3, [r8, #8]
+	b	.L4078
+.L4074:
+	ldr	r3, .L4191+20
+	movs	r1, #1
+	mov	r0, r5
+	ldr	r3, [r3]
+	ldr	r3, [r3, r7, lsl #2]
+	str	r3, [r5, #24]
+	bl	sblk_read_page
+	ldr	r3, [r5, #36]
+	adds	r1, r3, #1
+	beq	.L4080
+	cmp	r3, #512
+	bne	.L4084
+.L4080:
+	ldr	r3, .L4191+28
+	movs	r0, #1
+	ldr	r2, [r5, #24]
+	ldrh	r1, [r3]
+	ldr	r3, .L4191+32
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	lsrs	r2, r2, r1
+	rsb	r3, r3, #24
+	subs	r3, r3, r1
+	ldr	r1, .L4191+36
+	lsl	r3, r0, r3
+	subs	r3, r3, #1
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	and	r0, r3, r2
+	bl	__aeabi_uidiv
+	movs	r1, #0
+	uxth	r0, r0
+	bl	ftl_sblk_dump
+	ldr	r3, [r5, #36]
+	adds	r2, r3, #1
+	beq	.L4082
+	cmp	r3, #512
+	bne	.L4084
+.L4082:
+	ldr	r3, [r5, #12]
+	mov	r2, #-1
+	str	r2, [r3, #4]
+	ldr	r3, [r5, #36]
+	cmp	r3, r2
+	beq	.L4083
+	cmp	r3, #512
+	bne	.L4084
+.L4083:
+	movw	r2, #1223
+	ldr	r1, .L4191+40
+	ldr	r0, .L4191+44
+	bl	printf
+.L4084:
+	ldr	r3, [r5, #12]
+	ldr	r2, .L4191+48
+	ldr	r1, [r3, #4]
+	ldr	r2, [r2]
+	cmp	r1, r2
+	itt	cs
+	movcs	r2, #-1
+	strcs	r2, [r3, #4]
+	ldr	r2, .L4191+52
+	ldr	r1, [r3, #4]
+	ldr	r2, [r2]
+	str	r1, [r2, r7, lsl #2]
+	ldr	r2, [r5, #24]
+	str	r2, [r3, #8]
+	b	.L4078
+.L4087:
+	ldr	r3, .L4191+56
+	ldr	r2, .L4191+60
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L4090
+	umull	r2, r3, r6, r2
+	ldr	r2, [sp, #20]
+	ldr	r0, [sp, #28]
+	lsrs	r3, r3, #1
+	uxtah	r2, r2, r3
+	add	r3, r3, r3, lsl #1
+	add	r2, r0, r2, lsl #1
+	ldr	r0, .L4191+64
+	subs	r3, r6, r3
+	ldrh	r2, [r2, #96]
+	ldrh	r0, [r0]
+	mla	r2, r0, r2, r4
+	uxtah	r3, r2, r3
+.L4186:
+	str	r3, [r1, #24]
+	movs	r2, #48
+	ldr	r3, .L4191+68
+	mla	r5, r2, r5, r3
+	ldr	r2, .L4191+60
+	ldr	r3, .L4191+72
+	ldr	r1, [r3]
+	umull	r2, r3, r6, r2
+	ldr	r2, [r5, #24]
+	ldrh	r0, [r5, #32]
+	lsrs	r3, r3, #1
+	add	r3, r3, r3, lsl #1
+	subs	r3, r6, r3
+	lsls	r3, r3, #24
+	add	r3, r3, #16777216
+	orrs	r3, r3, r2
+	str	r3, [r1, r0, lsl #2]
+.L4112:
+	ldr	r3, .L4191+76
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L4094
+	ldr	r3, .L4191+80
+	ldrh	r3, [r3, r4, lsl #1]
+	cmp	r3, r4
+	bcs	.L4094
+	lsls	r3, r6, #31
+	bpl	.L4094
+	ldr	r2, [sp, #52]
+	movs	r3, #255
+	ldr	r1, [sp, #48]
+	strb	r3, [r2, r7]
+	add	r2, sp, #80
+	ldr	r3, [sp, #32]
+	add	r3, r2, r3, lsl #2
+	ldrh	r2, [sp, #48]
+	ldr	r3, [r3, #-24]
+	strh	r2, [r3, #32]	@ movhi
+	ldrb	r2, [r3, #1]	@ zero_extendqisi2
+	ldr	r3, .L4191+84
+	ldr	r3, [r3]
+	strb	r2, [r3, r1]
+	mov	r2, #-1
+	ldr	r3, .L4191+20
+	ldr	r3, [r3]
+	str	r2, [r3, r7, lsl #2]
+.L4094:
+	ldr	r3, [sp, #36]
+	adds	r3, r3, #1
+	b	.L4183
+.L4090:
+	umull	r2, r3, r6, r2
+	ldr	r2, [sp, #20]
+	ubfx	r3, r3, #1, #16
+	add	r3, r3, r2
+	ldr	r2, [sp, #28]
+	add	r3, r2, r3, lsl #1
+	ldr	r2, .L4191+64
+	ldrh	r3, [r3, #96]
+	ldrh	r2, [r2]
+	mla	r3, r2, r3, r4
+	b	.L4186
+.L4086:
+	cmp	r3, #2
+	bne	.L4093
+	ldr	r3, .L4191+88
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L4092
+	ldr	r2, [sp, #20]
+	ldr	r3, [sp, #32]
+	add	r3, r3, r2
+	ldr	r2, [sp, #28]
+	add	r3, r2, r3, lsl #1
+	ldr	r2, .L4191+64
+	ldrh	r3, [r3, #96]
+	ldrh	r2, [r2]
+	mla	r3, r2, r3, r4
+.L4182:
+	orr	r3, r3, #33554432
+	str	r3, [r1, #24]
+	b	.L4093
+.L4092:
+	ldr	r3, [sp, #20]
+	ldr	r2, [sp, #28]
+	add	r3, r3, r6, lsr #1
+	add	r3, r2, r3, lsl #1
+	ldr	r2, .L4191+64
+	ldrh	r3, [r3, #96]
+	ldrh	r2, [r2]
+	mla	r3, r2, r3, r4
+	and	r2, r6, #1
+	add	r3, r3, r2
+	b	.L4182
+.L4099:
+	add	r0, sp, #80
+	add	r5, sp, #80
+	add	r0, r0, r3, lsl #2
+	add	r3, r5, r3, lsl #2
+	ldr	r3, [r3, #-20]
+	ldr	r0, [r0, #-24]
+	ldrb	r3, [r3, #1]	@ zero_extendqisi2
+	strb	r3, [r0]
+	b	.L4098
+.L4192:
+	.align	2
+.L4191:
+	.word	.LANCHOR80
+	.word	.LANCHOR131
+	.word	-178307901
+	.word	.LANCHOR10
+	.word	.LANCHOR86
+	.word	.LANCHOR163
+	.word	.LANCHOR221
+	.word	.LANCHOR75
+	.word	.LANCHOR32
+	.word	.LANCHOR76
+	.word	.LANCHOR234
+	.word	.LC0
+	.word	.LANCHOR128
+	.word	.LANCHOR162
+	.word	.LANCHOR37
+	.word	-1431655765
+	.word	.LANCHOR111
+	.word	.LANCHOR56
+	.word	.LANCHOR164
+	.word	.LANCHOR124
+	.word	.LANCHOR235
+	.word	.LANCHOR83
+	.word	.LANCHOR81
+.L4097:
+	ldr	r3, .L4193
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	ldr	r3, [sp, #56]
+	cmp	r2, #0
+	beq	.L4101
+	strb	r1, [r3, #44]
+.L4185:
+	mov	r2, fp
+	add	r1, sp, #68
+	add	r0, sp, #56
+	bl	sblk_xlc_prog_pages
+.L4100:
+	ldr	r3, .L4193
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L4109
+	add	r3, fp, fp, lsl #1
+	uxth	fp, r3
+.L4110:
+	ldr	r3, .L4193+4
+	ldr	r2, [r3]
+	ldr	r3, [r2, #52]
+	add	r3, r3, fp
+	str	r3, [r2, #52]
+	ldr	r2, .L4193+8
+	ldrh	r3, [r2, #2102]
+	add	r3, r3, fp
+	uxth	r3, r3
+	strh	r3, [r2, #2102]	@ movhi
+	ldr	r2, .L4193+12
+	ldrh	r1, [r2]
+	ldr	r2, [sp, #28]
+	ldrb	r2, [r2, #89]	@ zero_extendqisi2
+	muls	r2, r1, r2
+	cmp	r3, r2
+	itttt	ge
+	ldrge	r3, .L4193+16
+	movge	r2, #0
+	ldrge	r3, [r3]
+	strhge	r2, [r3, #86]	@ movhi
+	bl	gc_write_completed
+	b	.L4044
+.L4101:
+	ldr	r1, [sp, #24]
+	cmp	r1, #1
+	bne	.L4102
+	movs	r2, #9
+.L4104:
+	strb	r2, [r3, #44]
+	b	.L4185
+.L4102:
+	ldr	r1, [sp, #24]
+	cmp	r1, #2
+	it	eq
+	moveq	r2, #13
+	b	.L4104
+.L4096:
+	ldr	r3, .L4193+20
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L4105
+	ldr	r3, .L4193+24
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L4106
+.L4105:
+	ldr	r2, [sp, #40]
+	subs	r1, r2, #1
+.L4107:
+	uxth	r2, r3
+	adds	r3, r3, #1
+	cmp	r2, r1
+	blt	.L4108
+	add	r3, sp, #80
+	add	r1, r3, r1, lsl #2
+	ldr	r3, [r1, #-24]
+	b	.L4184
+.L4106:
+	mov	r1, fp
+	add	r0, sp, #56
+	bl	sblk_3d_mlc_prog_pages
+	b	.L4100
+.L4108:
+	add	r0, sp, #80
+	add	r5, sp, #80
+	add	r0, r0, r2, lsl #2
+	add	r2, r5, r2, lsl #2
+	ldr	r2, [r2, #-20]
+	ldr	r0, [r0, #-24]
+	ldrb	r2, [r2, #1]	@ zero_extendqisi2
+	strb	r2, [r0]
+	b	.L4107
+.L4109:
+	ldr	r3, .L4193+20
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L4123
+	ldr	r3, .L4193+28
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L4110
+	ldrh	r3, [sp, #16]
+	ldr	r2, .L4193+32
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	smulbb	r3, fp, r3
+	uxth	r3, r3
+	cbz	r2, .L4124
+	ldr	r2, .L4193+36
+	ldrh	r2, [r2, r4, lsl #1]
+	cmp	r2, r4
+	it	cs
+	movcs	fp, r3
+	b	.L4110
+.L4123:
+	ldr	fp, [sp, #44]
+	b	.L4110
+.L4124:
+	mov	fp, r3
+	b	.L4110
+.L4194:
+	.align	2
+.L4193:
+	.word	.LANCHOR84
+	.word	.LANCHOR110
+	.word	.LANCHOR71
+	.word	.LANCHOR86
+	.word	.LANCHOR10
+	.word	.LANCHOR81
+	.word	.LANCHOR82
+	.word	.LANCHOR36
+	.word	.LANCHOR124
+	.word	.LANCHOR235
+	.size	gc_do_copy_back, .-gc_do_copy_back
+	.section	.text.zftl_do_gc,"ax",%progbits
+	.align	1
+	.global	zftl_do_gc
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	zftl_do_gc, %function
+zftl_do_gc:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L4392
+	ldr	r2, .L4392+4
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #48
+	ldr	r4, .L4392+8
+	mov	r10, r2
+	ldrh	r7, [r3]
+	ldrh	r6, [r2]
+	ldr	r1, .L4392+12
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	add	r6, r6, r7
+	str	r0, [sp, #32]
+	ldr	r5, [r1]
+	uxth	r6, r6
+	mov	r8, r1
+	cmp	r3, #6
+	bhi	.L4310
+	tbh	[pc, r3, lsl #1]
+.L4198:
+	.2byte	(.L4197-.L4198)/2
+	.2byte	(.L4199-.L4198)/2
+	.2byte	(.L4200-.L4198)/2
+	.2byte	(.L4201-.L4198)/2
+	.2byte	(.L4202-.L4198)/2
+	.2byte	(.L4203-.L4198)/2
+	.2byte	(.L4204-.L4198)/2
+	.p2align 1
+.L4203:
+	ldr	r5, .L4392+16
+	movs	r7, #0
+.L4205:
+	bl	gc_check_data_one_wl
+	mov	r10, r0
+	cmp	r0, #0
+	beq	.L4306
+	ldr	r3, [r8]
+	movs	r6, #0
+	strh	r6, [r5, #52]	@ movhi
+	ldrh	r0, [r3, #80]
+	bl	ftl_free_sblk
+	ldr	r1, .L4392+20
+	movw	r3, #65535
+	ldr	r2, [r8]
+	ldr	r0, [r5, #8]
+	ldr	r1, [r1]
+	strh	r3, [r2, #80]	@ movhi
+	strh	r3, [r1, #126]	@ movhi
+	strh	r3, [r2, #130]	@ movhi
+	bl	zbuf_free
+	str	r6, [r5, #8]
+	strb	r6, [r4]
+	b	.L4389
+.L4197:
+	ldr	r3, .L4392+24
+	ldr	r2, .L4392+28
+	ldr	r1, .L4392+32
+	ldrh	r3, [r3]
+	str	r2, [sp, #36]
+	ldrh	r1, [r1]
+	add	r7, r7, r3
+	ldrh	r3, [r2]
+	uxth	r7, r7
+	add	r3, r3, r1
+	ldrh	r1, [r5, #80]
+	uxth	r3, r3
+	str	r3, [sp, #28]
+	movw	r3, #65535
+	cmp	r1, r3
+	ldr	r3, [sp, #32]
+	beq	.L4206
+	cbnz	r3, .L4207
+	ldr	r3, .L4392+36
+	ldrh	r3, [r3]
+	cmp	r6, r3, lsl #1
+	blt	.L4207
+.L4310:
+	movs	r5, #16
+	b	.L4195
+.L4207:
+	ldr	r10, .L4392+80
+	movs	r1, #5
+	ldr	fp, .L4392+76
+	ldrh	r0, [r10]
+	adds	r0, r0, #1
+	uxth	r0, r0
+	strh	r0, [r10]	@ movhi
+	bl	zftl_get_gc_node
+	movw	r3, #65535
+	mov	ip, r10
+	cmp	r0, r3
+	beq	.L4208
+	ldr	r1, .L4392+40
+	ldr	lr, .L4392+72
+	ldr	r2, .L4392+44
+	ldr	r1, [r1]
+	ldrh	lr, [lr]
+	ldr	r3, [r2]
+	mov	r10, r2
+	ldrh	r1, [r1, r0, lsl #1]
+	adds	r3, r3, #1
+	cmp	lr, r1
+	str	r3, [r2]
+	bcs	.L4209
+	ldr	r2, .L4392+48
+	ldrh	r2, [r2]
+	cmp	r3, r2, lsr #4
+	bls	.L4208
+	ldr	r3, .L4392+52
+	ldrh	r3, [r3]
+	cmp	r3, r1
+	bls	.L4208
+.L4209:
+	ldrb	r2, [fp]	@ zero_extendqisi2
+	movs	r1, #0
+	bl	gc_add_sblk
+	cbz	r0, .L4210
+	movs	r3, #1
+	strb	r3, [r4]
+	movs	r3, #0
+	str	r3, [r10]
+	b	.L4310
+.L4208:
+	movs	r3, #0
+	strh	r3, [ip]	@ movhi
+.L4210:
+	cmp	r7, #15
+	bls	.L4312
+	ldr	r3, .L4392+56
+	ldrh	r2, [r3]
+	ldr	r3, .L4392+60
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bhi	.L4312
+	ldr	r3, [sp, #28]
+	cmp	r3, #0
+	ite	eq
+	moveq	r10, #2
+	movne	r10, #1
+.L4211:
+	ldr	r3, .L4392+64
+	ldr	r3, [r3]
+	lsls	r3, r3, #23
+	bpl	.L4212
+	ldr	r3, [r8]
+	ldrh	r1, [r5, #80]
+	ldrb	r2, [fp]	@ zero_extendqisi2
+	ldr	r0, .L4392+68
+	str	r1, [sp, #16]
+	ldrh	r1, [r3, #122]
+	str	r1, [sp, #12]
+	ldrh	r1, [r3, #120]
+	str	r1, [sp, #8]
+	movw	r1, #2662
+	ldrh	r3, [r3, #124]
+	str	r7, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r6
+	bl	printf
+.L4212:
+	movs	r2, #1
+	mov	r1, r10
+	ldrb	r0, [fp]	@ zero_extendqisi2
+	bl	gc_search_src_blk
+	cmp	r0, #0
+	ble	.L4213
+.L4214:
+	movs	r3, #1
+.L4390:
+	strb	r3, [r4]
+	b	.L4310
+.L4312:
+	mov	r10, #2
+	b	.L4211
+.L4213:
+	movs	r2, #1
+	movs	r1, #3
+	ldrb	r0, [fp]	@ zero_extendqisi2
+	bl	gc_search_src_blk
+	cmp	r0, #0
+	bgt	.L4214
+	b	.L4310
+.L4206:
+	cmp	r3, #1
+	bne	.L4216
+	bl	gc_scan_static_data
+	ldr	r3, [r8]
+	ldr	fp, .L4392+76
+	ldrh	r3, [r3, #122]
+	cbz	r3, .L4217
+.L4218:
+	movs	r3, #1
+	strb	r3, [fp]
+	b	.L4390
+.L4393:
+	.align	2
+.L4392:
+	.word	.LANCHOR107
+	.word	.LANCHOR103
+	.word	.LANCHOR159
+	.word	.LANCHOR10
+	.word	.LANCHOR71
+	.word	.LANCHOR110
+	.word	.LANCHOR105
+	.word	.LANCHOR97
+	.word	.LANCHOR99
+	.word	.LANCHOR87
+	.word	.LANCHOR9
+	.word	.LANCHOR160
+	.word	.LANCHOR6
+	.word	.LANCHOR100
+	.word	.LANCHOR93
+	.word	.LANCHOR101
+	.word	.LANCHOR14
+	.word	.LC236
+	.word	.LANCHOR95
+	.word	.LANCHOR85
+	.word	.LANCHOR96
+.L4217:
+	bl	gc_static_wearleveling
+	mov	r5, r0
+	cmp	r0, #0
+	bne	.L4218
+	ldr	r10, .L4394+16
+	cmp	r7, #0
+	beq	.L4219
+	ldr	r3, [sp, #28]
+	ldr	r2, .L4394
+	cmp	r6, r3
+	bcs	.L4220
+	ldrh	r3, [r2]
+	cmp	r3, r6
+	bhi	.L4221
+.L4220:
+	ldr	r3, [sp, #28]
+	ldrh	r2, [r2]
+	adds	r3, r6, r3
+	cmp	r3, r2
+	blt	.L4221
+	ldr	r3, .L4394+4
+	ldrh	r2, [r3]
+	ldr	r3, .L4394+8
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L4219
+.L4221:
+	movs	r1, #1
+	movs	r0, #16
+	strb	r1, [fp]
+	str	r1, [sp, #40]
+	bl	zftl_get_gc_node.part.9
+	movw	r2, #65535
+	cmp	r0, r2
+	beq	.L4222
+	ldr	r2, .L4394+12
+	ldr	r3, .L4394+16
+	ldr	r2, [r2]
+	ldrh	r3, [r3]
+	ldrh	r2, [r2, r0, lsl #1]
+	cmp	r2, r3
+	bcs	.L4222
+	cmp	r6, #2
+	ldr	r1, [sp, #40]
+	bls	.L4222
+	ldr	r3, .L4394+20
+	movs	r2, #0
+	strb	r2, [fp]
+	str	r2, [r3]
+	bl	gc_add_sblk
+	cmp	r0, #0
+	bne	.L4214
+.L4222:
+	movs	r1, #3
+	movs	r0, #0
+	bl	zftl_get_gc_node
+	movw	r2, #65535
+	cmp	r0, r2
+	beq	.L4223
+	ldr	r2, .L4394+12
+	ldr	r3, .L4394+16
+	ldr	r2, [r2]
+	ldrh	r3, [r3]
+	ldrh	r2, [r2, r0, lsl #1]
+	cmp	r2, r3
+	bcs	.L4223
+	cmp	r6, #2
+	bls	.L4223
+	ldr	r3, .L4394+20
+	movs	r2, #0
+	movs	r1, #1
+	strb	r2, [fp]
+	str	r2, [r3]
+	bl	gc_add_sblk
+	cmp	r0, #0
+	bne	.L4214
+.L4223:
+	ldr	r2, .L4394+24
+	ldrh	r3, [r10]
+	ldr	r1, .L4394+28
+	ldrh	fp, [r2]
+	adds	r3, r3, #1
+	ldr	r2, .L4394+20
+	uxth	r3, r3
+	cmp	r3, fp, lsr #5
+	strh	r3, [r10]	@ movhi
+	str	r2, [sp, #44]
+	itt	hi
+	movhi	r3, #4
+	strhhi	r3, [r10]	@ movhi
+	mov	r10, #0
+	strh	r10, [r1]	@ movhi
+	ldr	r1, .L4394+32
+	ldr	r3, [r2]
+	strh	r10, [r1]	@ movhi
+	ldr	r1, .L4394+36
+	adds	r3, r3, #1
+	str	r3, [r2]
+	strh	r10, [r1]	@ movhi
+	ldr	r1, .L4394+40
+	ldrh	r1, [r1]
+	cmp	r3, r1, lsr #5
+	ldr	r3, .L4394+44
+	ldr	r1, .L4394+4
+	bls	.L4225
+	ldrh	r0, [r1]
+	cmp	r0, r7
+	bls	.L4225
+	movs	r1, #5
+	mov	r0, r10
+	str	r3, [sp, #40]
+	bl	zftl_get_gc_node
+	movw	r1, #65535
+	ldr	r3, [sp, #40]
+	cmp	r0, r1
+	ldr	r2, [sp, #44]
+	bne	.L4226
+.L4379:
+	movs	r5, #16
+.L4227:
+	ldr	r3, [r8]
+	movs	r1, #1
+	ldr	fp, .L4394+44
+	ldrh	r3, [r3, #124]
+	strb	r1, [fp]
+	mov	r8, fp
+	cmp	r3, #0
+	beq	.L4232
+	movs	r3, #0
+	strb	r1, [r4]
+	strb	r3, [fp]
+.L4195:
+	mov	r0, r5
+	add	sp, sp, #48
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L4226:
+	ldr	r1, .L4394+12
+	ldr	r1, [r1]
+	ldrh	r1, [r1, r0, lsl #1]
+	ldr	r0, .L4394+48
+	ldrb	r0, [r0]	@ zero_extendqisi2
+	mul	fp, fp, r0
+	cmp	r1, fp
+	bgt	.L4379
+	str	r10, [r2]
+	movs	r2, #4
+.L4386:
+	movs	r1, #2
+.L4378:
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	bl	gc_search_src_blk
+	uxth	r0, r0
+	cmp	r0, #0
+	beq	.L4379
+	b	.L4214
+.L4225:
+	ldr	r2, .L4394+8
+	ldrh	r1, [r1]
+	ldrh	r2, [r2]
+	cmp	r1, r2
+	bcc	.L4230
+	movs	r2, #1
+	b	.L4386
+.L4230:
+	ldr	r2, [sp, #36]
+	ldrh	r2, [r2]
+	cbnz	r2, .L4231
+	ldr	r2, .L4394+52
+	ldrh	r2, [r2]
+	cmp	r2, #8
+	bls	.L4227
+.L4231:
+	movs	r2, #4
+	movs	r1, #1
+	b	.L4378
+.L4219:
+	ldr	r3, .L4394+24
+	ldrh	r2, [r3]
+	ldrh	r3, [r10]
+	cmp	r3, r2, lsr #5
+	itt	cs
+	movcs	r3, #4
+	strhcs	r3, [r10]	@ movhi
+	b	.L4379
+.L4216:
+	ldr	r3, .L4394+56
+	ldrh	r3, [r3]
+	cmp	r3, r6
+	bcs	.L4379
+	ldrh	r3, [r5, #124]
+	cmp	r3, #0
+	beq	.L4310
+	b	.L4379
+.L4232:
+	ldr	r2, .L4394+56
+	ldrh	r0, [r2]
+	mov	r10, r2
+	cmp	r6, r0
+	bcs	.L4233
+	cmp	r7, #0
+	beq	.L4234
+	cmp	r7, #16
+	bls	.L4235
+	ldr	r2, .L4394+4
+	ldrh	r0, [r2]
+	ldr	r2, .L4394+8
+	ldrh	r2, [r2]
+	cmp	r0, r2
+	bhi	.L4235
+	movs	r2, #4
+	mov	r0, r1
+	str	r3, [sp, #28]
+	bl	gc_search_src_blk
+	uxth	r0, r0
+	ldr	r3, [sp, #28]
+	cbnz	r0, .L4236
+.L4382:
+	movs	r2, #4
+	movs	r1, #3
+	ldrb	r0, [fp]	@ zero_extendqisi2
+	b	.L4381
+.L4236:
+	mov	r0, r3
+	movs	r1, #5
+	bl	zftl_get_gc_node
+	movw	r3, #65535
+	cmp	r0, r3
+	beq	.L4239
+	ldr	r1, .L4394+12
+	ldr	r6, .L4394+24
+	ldr	r2, .L4394+20
+	ldr	r1, [r1]
+	ldrh	r6, [r6]
+	ldr	r3, [r2]
+	ldrh	r1, [r1, r0, lsl #1]
+	adds	r3, r3, #1
+	cmp	r6, r1
+	str	r3, [r2]
+	mov	r6, r2
+	bcs	.L4240
+	ldr	r2, .L4394+40
+	ldrh	r2, [r2]
+	cmp	r3, r2, lsr #4
+	bls	.L4239
+	ldr	r3, .L4394+60
+	ldrh	r3, [r3]
+	cmp	r3, r1
+	bls	.L4239
+.L4240:
+	ldrb	r2, [r8]	@ zero_extendqisi2
+	movs	r1, #0
+	bl	gc_add_sblk
+	ldr	r3, .L4394+64
+	movs	r2, #1
+	str	r2, [r3]
+	movs	r3, #0
+	str	r3, [r6]
+.L4239:
+	movs	r3, #1
+	b	.L4385
+.L4235:
+	movs	r2, #1
+	movs	r1, #2
+	mov	r0, r2
+	bl	gc_search_src_blk
+	uxth	r0, r0
+	cmp	r0, #0
+	bne	.L4239
+	ldrb	r0, [r8]	@ zero_extendqisi2
+	movs	r2, #4
+	movs	r1, #3
+.L4381:
+	bl	gc_search_src_blk
+	uxth	r0, r0
+.L4237:
+	cmp	r0, #0
+	bne	.L4239
+	b	.L4195
+.L4234:
+	cmp	r6, #16
+	strb	r7, [fp]
+	bls	.L4242
+	movs	r2, #4
+	movs	r1, #3
+	mov	r0, r7
+	b	.L4381
+.L4242:
+	mov	r2, r1
+	mov	r0, r7
+	bl	gc_search_src_blk
+	uxth	r0, r0
+	cmp	r0, #0
+	bne	.L4239
+	b	.L4382
+.L4233:
+	ldr	r1, [sp, #32]
+	cmp	r1, #1
+	bne	.L4195
+	cmp	r6, r0, lsl #1
+	bge	.L4243
+	ldr	r3, [sp, #28]
+	cmp	r3, r7, lsr #1
+	bcs	.L4244
+	ldr	r3, .L4394+4
+	ldrh	r1, [r3]
+	ldr	r3, .L4394+8
+	ldrh	r3, [r3]
+	cmp	r1, r3
+	bcs	.L4244
+	ldr	r3, .L4394
+	ldrh	r3, [r3]
+	lsrs	r3, r3, #2
+	strh	r3, [r2]	@ movhi
+	b	.L4195
+.L4395:
+	.align	2
+.L4394:
+	.word	.LANCHOR98
+	.word	.LANCHOR93
+	.word	.LANCHOR101
+	.word	.LANCHOR9
+	.word	.LANCHOR161
+	.word	.LANCHOR160
+	.word	.LANCHOR95
+	.word	.LANCHOR90
+	.word	.LANCHOR91
+	.word	.LANCHOR92
+	.word	.LANCHOR6
+	.word	.LANCHOR85
+	.word	.LANCHOR80
+	.word	.LANCHOR99
+	.word	.LANCHOR87
+	.word	.LANCHOR100
+	.word	.LANCHOR122
+.L4244:
+	movs	r0, #8
+	bl	zftl_get_gc_node.part.9
+	movw	r2, #65535
+	cmp	r0, r2
+	beq	.L4245
+	ldr	r2, .L4396
+	ldr	r2, [r2]
+	ldrh	r3, [r2, r0, lsl #1]
+	cmp	r3, #3
+	bhi	.L4245
+	cbz	r6, .L4245
+	movs	r2, #0
+	movs	r1, #1
+	strb	r2, [r8]
+	bl	gc_add_sblk
+	cmp	r0, #0
+	bne	.L4239
+.L4245:
+	movs	r1, #5
+	movs	r0, #0
+	bl	zftl_get_gc_node
+	movw	r3, #65535
+	mov	fp, r0
+	cmp	r0, r3
+	bne	.L4246
+.L4251:
+	cmp	r7, #1
+	bhi	.L4247
+.L4248:
+	ldr	r3, [sp, #28]
+	cmp	r6, r3
+	ldr	r6, .L4396+4
+	bcs	.L4255
+	movs	r7, #0
+	movs	r0, #4
+	strb	r7, [r8]
+	bl	zftl_get_gc_node.part.9
+	movw	r3, #65535
+	cmp	r0, r3
+	beq	.L4255
+	ldr	r3, .L4396
+	ldr	r3, [r3]
+	ldrh	r2, [r3, r0, lsl #1]
+	ldr	r3, .L4396+8
+	ldrh	r1, [r3]
+	ldr	r3, .L4396+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	muls	r3, r1, r3
+	cmp	r2, r3, asr #1
+	ble	.L4257
+.L4255:
+	ldrh	r3, [r6]
+	lsrs	r3, r3, #2
+	strh	r3, [r10]	@ movhi
+	b	.L4195
+.L4246:
+	ldr	r2, .L4396+16
+	ldr	r1, .L4396+20
+	ldr	r3, [r2]
+	ldrh	r1, [r1]
+	adds	r3, r3, #1
+	str	r3, [r2]
+	cmp	r3, r1, lsr #4
+	bls	.L4249
+	ldr	r3, .L4396
+	movs	r1, #0
+	str	r1, [r2]
+	ldr	r3, [r3]
+	ldrh	r2, [r3, r0, lsl #1]
+	ldr	r3, .L4396+24
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcs	.L4249
+	movs	r3, #1
+	mov	r2, r3
+	strb	r3, [r8]
+	str	r3, [sp, #32]
+	bl	gc_add_sblk
+	ldr	r3, [sp, #32]
+	cbz	r0, .L4249
+.L4385:
+	strb	r3, [r4]
+	b	.L4195
+.L4249:
+	ldr	r3, .L4396
+	ldr	r3, [r3]
+	ldrh	r2, [r3, fp, lsl #1]
+	ldr	r3, .L4396+8
+	ldrh	r3, [r3]
+	cmp	r2, r3, lsr #1
+	bhi	.L4250
+	movs	r2, #0
+	movs	r1, #1
+	mov	r0, fp
+	bl	gc_add_sblk
+	b	.L4239
+.L4250:
+	ldr	r3, [sp, #36]
+	ldr	r1, .L4396+28
+	ldrh	r3, [r3]
+	ldrh	r1, [r1]
+	add	r3, r3, r1
+	ldr	r1, .L4396+4
+	ldrh	r1, [r1]
+	cmp	r3, r1, lsl #1
+	ble	.L4251
+	ldr	r3, .L4396+24
+	ldrh	r3, [r3]
+	cmp	r3, r2
+	bcc	.L4248
+	b	.L4251
+.L4247:
+	cmp	r7, #16
+	mov	r1, #1
+	strb	r1, [r8]
+	bls	.L4252
+	ldr	r3, .L4396+32
+	ldrh	r2, [r3]
+	ldr	r3, .L4396+36
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bhi	.L4252
+	movs	r2, #4
+	mov	r0, r1
+.L4388:
+	bl	gc_search_src_blk
+	uxth	r0, r0
+	cbnz	r0, .L4253
+	movs	r2, #4
+	movs	r1, #3
+	ldrb	r0, [r8]	@ zero_extendqisi2
+	bl	gc_search_src_blk
+	uxth	r0, r0
+.L4253:
+	ldr	r3, [sp, #28]
+	cmp	r6, r3, lsr #1
+	ldr	r3, .L4396+4
+	ldrh	r3, [r3]
+	bls	.L4383
+	lsrs	r3, r3, #2
+.L4384:
+	strh	r3, [r10]	@ movhi
+	b	.L4237
+.L4252:
+	movs	r2, #1
+	movs	r1, #2
+	mov	r0, r2
+	b	.L4388
+.L4257:
+	movs	r2, #4
+	movs	r1, #3
+	mov	r0, r7
+	bl	gc_search_src_blk
+	ldrh	r3, [r6]
+	uxth	r0, r0
+.L4383:
+	lsrs	r3, r3, #1
+	b	.L4384
+.L4243:
+	ldr	r1, .L4396+4
+	mov	r5, r3
+	ldrh	r1, [r1]
+	lsrs	r1, r1, #2
+	strh	r1, [r2]	@ movhi
+	b	.L4195
+.L4199:
+	ldr	r5, .L4396+40
+	movw	r3, #65535
+	ldrh	r2, [r5]
+	cmp	r2, r3
+	bne	.L4258
+	bl	gc_get_src_blk
+	strh	r0, [r5]	@ movhi
+.L4258:
+	ldrh	r2, [r5]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L4259
+	ldr	r1, .L4396+20
+	ldrh	r1, [r1]
+	cmp	r1, r2
+	it	ls
+	strhls	r3, [r5]	@ movhi
+.L4259:
+	ldrh	r6, [r5]
+	movw	r3, #65535
+	cmp	r6, r3
+	beq	.L4391
+	ldr	r3, .L4396+44
+	ldrh	r1, [r5, #52]
+	ldr	r3, [r3]
+	add	r3, r3, r6, lsl #2
+	cbz	r1, .L4261
+	ldr	r0, .L4396+48
+	movs	r2, #0
+.L4262:
+	uxth	r5, r2
+	cmp	r1, r5
+	bhi	.L4263
+.L4261:
+	ldrb	r3, [r3, #2]	@ zero_extendqisi2
+	and	r2, r3, #224
+	cmp	r2, #224
+	beq	.L4264
+	tst	r3, #192
+	bne	.L4265
+.L4264:
+	ldr	r3, .L4396
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r6, lsl #1]
+	cbz	r3, .L4267
+	movw	r2, #3153
+	ldr	r1, .L4396+52
+	ldr	r0, .L4396+56
+	bl	printf
+	b	.L4267
+.L4263:
+	ldrh	r5, [r0, #2]!
+	adds	r2, r2, #1
+	cmp	r5, r6
+	bne	.L4262
+.L4267:
+	ldr	r3, .L4396+40
+	movw	r2, #65535
+	strh	r2, [r3]	@ movhi
+	b	.L4310
+.L4265:
+	movs	r3, #2
+	b	.L4390
+.L4200:
+	bl	gc_scan_src_blk
+	adds	r0, r0, #1
+	bne	.L4268
+	movs	r3, #3
+	b	.L4390
+.L4268:
+	ldr	r3, .L4396+40
+	movw	r1, #65535
+	ldrh	r2, [r3]
+	mov	r5, r3
+	cmp	r2, r1
+	beq	.L4214
+	ldrh	r1, [r3, #20]
+	cbz	r1, .L4269
+	movs	r2, #4
+	strb	r2, [r4]
+	movs	r2, #0
+	strh	r2, [r3, #22]	@ movhi
+	b	.L4310
+.L4269:
+	movs	r3, #1
+	strb	r3, [r4]
+	ldr	r4, .L4396
+	ldr	r1, [r4]
+	ldrh	r2, [r1, r2, lsl #1]
+	cbz	r2, .L4270
+	movw	r2, #3183
+	ldr	r1, .L4396+52
+	ldr	r0, .L4396+56
+	bl	printf
+.L4270:
+	ldrh	r0, [r5]
+	bl	ftl_free_sblk
+	ldr	r3, [r4]
+	movs	r4, #0
+	ldrh	r2, [r5]
+	strh	r4, [r3, r2, lsl #1]	@ movhi
+	ldrh	r3, [r5, #26]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	cmp	r3, #8
+	bhi	.L4271
+	strh	r3, [r5, #26]	@ movhi
+	b	.L4267
+.L4271:
+	strh	r4, [r5, #26]	@ movhi
+	bl	ftl_flush
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	mov	r0, r4
+	bl	ftl_info_flush
+	b	.L4267
+.L4201:
+	ldr	r7, .L4396+40
+	mov	r5, r7
+.L4355:
+	bl	gc_scan_src_blk_one_page
+	ldr	r3, .L4396+8
+	ldrh	r2, [r7, #2]
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcs	.L4273
+	cmp	r6, #7
+	bls	.L4355
+	b	.L4310
+.L4397:
+	.align	2
+.L4396:
+	.word	.LANCHOR9
+	.word	.LANCHOR98
+	.word	.LANCHOR95
+	.word	.LANCHOR80
+	.word	.LANCHOR160
+	.word	.LANCHOR6
+	.word	.LANCHOR100
+	.word	.LANCHOR99
+	.word	.LANCHOR93
+	.word	.LANCHOR101
+	.word	.LANCHOR71
+	.word	.LANCHOR7
+	.word	.LANCHOR71+52
+	.word	.LANCHOR237
+	.word	.LC0
+.L4273:
+	ldrh	r3, [r7, #20]
+	ldrh	r1, [r7]
+	cbz	r3, .L4274
+	movs	r2, #4
+	strb	r2, [r4]
+	movs	r2, #0
+	ldr	r4, .L4398
+	strh	r2, [r7, #22]	@ movhi
+	ldr	r2, [r4]
+	ldrh	r2, [r2, r1, lsl #1]
+	cmp	r3, r2
+	beq	.L4275
+	ldr	r0, .L4398+4
+	ldr	r0, [r0]
+	lsls	r0, r0, #21
+	bpl	.L4275
+	ldr	r0, .L4398+8
+	bl	printf
+.L4275:
+	ldr	r3, [r4]
+	ldrh	r2, [r5]
+	ldrh	r2, [r3, r2, lsl #1]
+	ldrh	r3, [r5, #20]
+	cmp	r2, r3
+	beq	.L4276
+	movw	r2, #3226
+	ldr	r1, .L4398+12
+	ldr	r0, .L4398+16
+	bl	printf
+.L4276:
+	ldrh	r1, [r5, #20]
+	ldrh	r2, [r5]
+	ldr	r3, [r4]
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	b	.L4310
+.L4274:
+	ldr	r3, .L4398+20
+	ldr	r6, [r3]
+	movs	r3, #1
+	strb	r3, [r4]
+	ldr	r3, .L4398+4
+	add	r6, r6, r1, lsl #2
+	ldr	r3, [r3]
+	lsls	r7, r3, #23
+	bpl	.L4277
+	ldrb	r2, [r6, #2]	@ zero_extendqisi2
+	ldr	r0, .L4398+24
+	lsrs	r2, r2, #5
+	bl	printf
+.L4277:
+	ldrb	r3, [r6, #2]	@ zero_extendqisi2
+	and	r2, r3, #224
+	cmp	r2, #224
+	beq	.L4278
+	tst	r3, #192
+	bne	.L4279
+.L4278:
+	movw	r2, #3236
+	ldr	r1, .L4398+12
+	ldr	r0, .L4398+16
+	bl	printf
+.L4279:
+	ldrh	r0, [r5]
+	bl	ftl_free_sblk
+	movw	r3, #65535
+	strh	r3, [r5]	@ movhi
+	ldrh	r3, [r5, #26]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	cmp	r3, #8
+	bhi	.L4280
+	strh	r3, [r5, #26]	@ movhi
+	b	.L4310
+.L4280:
+	movs	r3, #0
+	strh	r3, [r5, #26]	@ movhi
+.L4389:
+	bl	flt_sys_flush
+	b	.L4310
+.L4202:
+	ldrh	r2, [r5, #80]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L4281
+	ldr	r3, .L4398+28
+	ldrb	r7, [r3]	@ zero_extendqisi2
+	cmp	r7, #1
+	bne	.L4281
+	ldr	r6, .L4398+32
+	bl	ftl_flush
+	movs	r1, #5
+	ldrh	r0, [r6, #2106]
+	cbz	r0, .L4282
+	mov	r0, r7
+.L4282:
+	bl	zftl_gc_get_free_sblk
+	movw	r3, #65535
+	mov	r4, r0
+	cmp	r0, r3
+	beq	.L4284
+	ldr	r3, .L4398+20
+	ldr	r7, [r3]
+	add	r7, r7, r0, lsl #2
+	ldrb	r3, [r7, #2]	@ zero_extendqisi2
+	tst	r3, #224
+	beq	.L4285
+	movw	r2, #3270
+	ldr	r1, .L4398+12
+	ldr	r0, .L4398+16
+	bl	printf
+.L4285:
+	ldrb	r3, [r7, #2]	@ zero_extendqisi2
+	and	r3, r3, #15
+	orr	r3, r3, #176
+	strb	r3, [r7, #2]
+.L4309:
+	movs	r1, #1
+	mov	r0, r4
+	bl	ftl_erase_sblk
+	movs	r3, #5
+	add	r1, r5, #96
+	strb	r3, [r5, #84]
+	mov	r0, r4
+	bl	ftl_get_blk_list_in_sblk
+	ldr	r3, .L4398+36
+	uxtb	r0, r0
+	movs	r7, #0
+	ldr	r10, .L4398+64
+	strb	r0, [r5, #89]
+	movs	r1, #255
+	ldrh	r3, [r3]
+	strh	r4, [r5, #80]	@ movhi
+	strh	r7, [r5, #82]	@ movhi
+	strb	r7, [r5, #85]
+	smulbb	r0, r3, r0
+	strh	r7, [r5, #90]	@ movhi
+	ldrh	r3, [r10]
+	strh	r0, [r5, #86]	@ movhi
+	ldr	r5, .L4398+40
+	ldrb	r2, [r5]	@ zero_extendqisi2
+	muls	r2, r3, r2
+	ldr	r3, .L4398+44
+	ldr	r0, [r3]
+	lsls	r2, r2, #2
+	bl	ftl_memset
+	ldrh	r3, [r10]
+	movs	r1, #255
+	ldrb	r2, [r5]	@ zero_extendqisi2
+	muls	r2, r3, r2
+	ldr	r3, .L4398+48
+	ldr	r0, [r3]
+	lsls	r2, r2, #2
+	bl	ftl_memset
+	ldrh	r3, [r10]
+	movs	r1, #255
+	ldrb	r2, [r5]	@ zero_extendqisi2
+	muls	r2, r3, r2
+	ldr	r3, .L4398+52
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldr	r3, [r8]
+	movw	r2, #65535
+	strh	r2, [r3, #128]	@ movhi
+	strh	r2, [r3, #130]	@ movhi
+	str	r4, [r3, #132]
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	ldr	r3, .L4398+56
+	mov	r0, r7
+	strh	r7, [r6, #52]	@ movhi
+	ldr	r3, [r3]
+	strh	r4, [r3, #126]	@ movhi
+	mov	r3, #-1
+	strh	r7, [r6, #2102]	@ movhi
+	strh	r7, [r6, #2104]	@ movhi
+	strh	r7, [r6, #2108]	@ movhi
+	str	r3, [r6, #2112]
+	bl	ftl_info_flush
+	b	.L4310
+.L4281:
+	ldr	r3, [sp, #32]
+	ldr	r7, .L4398+28
+	cmp	r3, #1
+	ite	ne
+	movne	fp, #1
+	moveq	fp, #4
+	cmp	r6, #15
+	ldr	r6, .L4398+32
+	it	ls
+	addls	fp, fp, #4
+.L4288:
+	add	fp, fp, #-1
+	uxtb	fp, fp
+	cmp	fp, #255
+	beq	.L4310
+	bl	gc_do_copy_back
+	ldrb	r3, [r7]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L4289
+	ldr	r3, .L4398+60
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #3
+	bhi	.L4290
+	bl	ftl_write_commit
+.L4290:
+	ldrh	r2, [r6, #22]
+	ldrh	r3, [r6, #20]
+	cmp	r2, r3
+	bcc	.L4288
+	movs	r3, #1
+	strb	r3, [r4]
+	ldr	r4, .L4398
+	bl	ftl_write_commit
+	bl	ftl_flush
+	ldrh	r1, [r6]
+	ldr	r2, [r4]
+	ldrh	r2, [r2, r1, lsl #1]
+	cbz	r2, .L4292
+	movw	r2, #3354
+	ldr	r1, .L4398+12
+	ldr	r0, .L4398+16
+	bl	printf
+.L4292:
+	ldrh	r0, [r6]
+	ldr	r3, [r4]
+	ldrh	r3, [r3, r0, lsl #1]
+	cbnz	r3, .L4293
+	bl	ftl_free_sblk
+	b	.L4267
+.L4293:
+	movs	r2, #1
+	movs	r1, #0
+	bl	gc_add_sblk
+	b	.L4267
+.L4399:
+	.align	2
+.L4398:
+	.word	.LANCHOR9
+	.word	.LANCHOR14
+	.word	.LC237
+	.word	.LANCHOR237
+	.word	.LC0
+	.word	.LANCHOR7
+	.word	.LC238
+	.word	.LANCHOR85
+	.word	.LANCHOR71
+	.word	.LANCHOR95
+	.word	.LANCHOR80
+	.word	.LANCHOR162
+	.word	.LANCHOR163
+	.word	.LANCHOR83
+	.word	.LANCHOR110
+	.word	.LANCHOR58
+	.word	.LANCHOR86
+.L4289:
+	ldrh	r3, [r6, #2108]
+	cmp	r3, #0
+	beq	.L4294
+	movs	r3, #0
+	ldr	r7, .L4400
+	strh	r3, [r6, #2108]	@ movhi
+	bl	sblk_wait_write_queue_completed
+	bl	gc_write_completed
+	ldr	r0, [r6, #2112]
+	adds	r5, r0, #1
+	beq	.L4295
+	ldr	r3, .L4400+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L4296
+	ldr	r3, .L4400+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L4297
+.L4296:
+	ldr	r3, [r7]
+	ldr	r2, [r3, #156]
+	ldr	r3, .L4400+12
+	cmp	r2, r3
+	bne	.L4297
+	ldr	r3, .L4400+16
+	ldrh	r1, [r3]
+	ldr	r3, .L4400+20
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	lsrs	r0, r0, r1
+	rsb	r3, r3, #24
+	subs	r2, r3, r1
+	movs	r3, #1
+	lsls	r3, r3, r2
+	ldr	r2, .L4400+24
+	subs	r3, r3, #1
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	ands	r0, r0, r3
+	bl	__aeabi_uidiv
+	ldr	r3, .L4400+28
+	ldr	r3, [r3]
+	add	r5, r3, r0, lsl #2
+	ldrb	r2, [r5, #2]	@ zero_extendqisi2
+	lsls	r1, r2, #28
+	bpl	.L4295
+	ldr	ip, .L4400+60
+	ldrh	r1, [r10]
+	ldrh	ip, [ip]
+	adds	r1, r1, #8
+	cmp	r1, ip
+	bge	.L4295
+	ldr	r1, .L4400+32
+	bfc	r2, #3, #2
+	strb	r2, [r5, #2]
+	ldr	r2, [r3, r0, lsl #2]
+	ldrh	r1, [r1]
+	ldrh	r5, [r3, r0, lsl #2]
+	ubfx	r2, r2, #11, #8
+	muls	r1, r2, r1
+	ubfx	ip, r5, #0, #11
+	lsrs	r2, r2, #3
+	add	r1, r1, r1, lsl #1
+	add	r1, ip, r1, asr #2
+	bfi	r5, r1, #0, #11
+	strh	r5, [r3, r0, lsl #2]	@ movhi
+	ldr	r1, [r3, r0, lsl #2]
+	bfi	r1, r2, #11, #8
+	str	r1, [r3, r0, lsl #2]
+.L4295:
+	ldr	r3, [r8]
+	movs	r5, #0
+	str	r5, [r6, #2112]
+	strh	r5, [r6, #52]	@ movhi
+	ldrh	r0, [r3, #80]
+	bl	ftl_free_sblk
+	ldr	r0, [r6, #8]
+	movw	r3, #65535
+	ldr	r2, [r8]
+	ldr	r1, [r7]
+	strh	r3, [r2, #80]	@ movhi
+	strh	r3, [r1, #126]	@ movhi
+	strh	r3, [r2, #130]	@ movhi
+	cbz	r0, .L4298
+	bl	zbuf_free
+.L4298:
+	str	r5, [r6, #8]
+	bl	flt_sys_flush
+	movw	r2, #3413
+	ldr	r1, .L4400+36
+	ldr	r0, .L4400+40
+	strb	r5, [r4]
+	bl	printf
+	b	.L4310
+.L4297:
+	bl	ftl_mask_bad_block
+	b	.L4295
+.L4294:
+	ldrh	r3, [r5, #86]
+	ldrh	r2, [r6, #22]
+	cmp	r3, #1
+	ldrh	r3, [r6, #20]
+	bls	.L4299
+	cmp	r2, r3
+	bcc	.L4288
+	movs	r3, #1
+	strb	r3, [r4]
+	ldrh	r3, [r6, #52]
+	adds	r2, r3, #1
+	strh	r2, [r6, #52]	@ movhi
+	add	r3, r6, r3, lsl #1
+	ldrh	r2, [r6]
+	strh	r2, [r3, #54]	@ movhi
+	movw	r3, #65535
+	strh	r3, [r6]	@ movhi
+	b	.L4310
+.L4299:
+	cmp	r2, r3
+	mov	r1, #5
+	strb	r1, [r4]
+	bcc	.L4300
+	ldrh	r3, [r6, #52]
+	adds	r2, r3, #1
+	strh	r2, [r6, #52]	@ movhi
+	add	r3, r6, r3, lsl #1
+	ldrh	r2, [r6]
+	strh	r2, [r3, #54]	@ movhi
+	movw	r3, #65535
+	strh	r3, [r6]	@ movhi
+.L4300:
+	bl	ftl_flush
+	bl	sblk_wait_write_queue_completed
+	bl	gc_write_completed
+	ldr	r3, [r8]
+	ldrh	r2, [r5, #80]
+	strh	r2, [r3, #128]	@ movhi
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	movs	r3, #0
+	ldr	r2, .L4400+44
+	strh	r3, [r6, #12]	@ movhi
+	ldr	r3, .L4400+48
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	strh	r3, [r6, #14]	@ movhi
+	ldr	r3, .L4400+52
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	strh	r3, [r6, #16]	@ movhi
+	cbz	r2, .L4301
+	ldr	r2, .L4400+56
+	ldrh	r2, [r2]
+	strh	r2, [r6, #14]	@ movhi
+	movs	r2, #1
+	strh	r2, [r6, #16]	@ movhi
+.L4301:
+	cmp	r3, #2
+	bne	.L4303
+	ldrh	r3, [r6, #14]
+	lsls	r3, r3, #1
+	strh	r3, [r6, #14]	@ movhi
+	ldr	r3, .L4400+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L4303
+	movs	r3, #1
+	strh	r3, [r6, #16]	@ movhi
+.L4303:
+	movs	r3, #0
+	strh	r3, [r6, #18]	@ movhi
+	b	.L4310
+.L4306:
+	ldrh	r2, [r5, #12]
+	ldrh	r3, [r5, #14]
+	cmp	r2, r3
+	bcc	.L4307
+	movs	r3, #6
+	ldr	r0, [r5, #8]
+	strb	r3, [r4]
+	bl	zbuf_free
+	str	r10, [r5, #8]
+	b	.L4310
+.L4307:
+	cmp	r6, #15
+	bls	.L4205
+	ldr	r3, [sp, #32]
+	cmp	r3, #1
+	bne	.L4310
+	adds	r7, r7, #1
+	uxtb	r7, r7
+	cmp	r7, #4
+	bls	.L4205
+	b	.L4310
+.L4204:
+	bl	gc_update_l2p_map_new
+	bl	gc_free_src_blk
+	bl	ftl_flush
+	movw	r6, #65535
+	bl	pm_flush
+	strh	r6, [r5, #80]	@ movhi
+	bl	ftl_ext_info_flush
+	ldr	r3, .L4400
+	movs	r0, #0
+	ldr	r3, [r3]
+	strh	r6, [r3, #126]	@ movhi
+	bl	ftl_info_flush
+.L4391:
+	movs	r3, #0
+	b	.L4390
+.L4284:
+	movw	r2, #3277
+	ldr	r1, .L4400+36
+	ldr	r0, .L4400+40
+	bl	printf
+	b	.L4309
+.L4401:
+	.align	2
+.L4400:
+	.word	.LANCHOR110
+	.word	.LANCHOR124
+	.word	.LANCHOR81
+	.word	1145785929
+	.word	.LANCHOR75
+	.word	.LANCHOR32
+	.word	.LANCHOR76
+	.word	.LANCHOR7
+	.word	.LANCHOR8
+	.word	.LANCHOR237
+	.word	.LC0
+	.word	.LANCHOR36
+	.word	.LANCHOR95
+	.word	.LANCHOR79
+	.word	.LANCHOR86
+	.word	.LANCHOR98
+	.size	zftl_do_gc, .-zftl_do_gc
+	.section	.text.zftl_init,"ax",%progbits
+	.align	1
+	.global	zftl_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	zftl_init, %function
+zftl_init:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r2, .L4481
+	movs	r3, #255
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r5, #0
+	ldr	r7, .L4481+4
+	sub	sp, sp, #24
+	strb	r3, [r2]
+	ldr	r2, .L4481+8
+	ldr	r1, .L4481+12
+	ldr	r0, .L4481+16
+	strb	r5, [r2]
+	ldr	r2, .L4481+20
+	ldr	r6, .L4481+24
+	strb	r3, [r2]
+	ldr	r2, .L4481+28
+	strb	r5, [r2]
+	ldr	r2, .L4481+32
+	strb	r3, [r2]
+	mov	r2, #-1
+	ldr	r3, .L4481+36
+	strb	r5, [r3]
+	ldr	r3, .L4481+40
+	str	r2, [r3]
+	bl	printf
+	ldrb	r8, [r7, #12]	@ zero_extendqisi2
+	ldr	r3, .L4481+44
+	ldrb	fp, [r7, #9]	@ zero_extendqisi2
+	mov	r1, r8
+	strb	r8, [r3]
+	ldr	r3, .L4481+48
+	strb	fp, [r3]
+	ldrh	r3, [r7, #10]
+	str	r3, [sp]
+	ldr	r3, .L4481+52
+	ldrh	r2, [sp]
+	ldr	r0, [sp]
+	strh	r2, [r3]	@ movhi
+	bl	__aeabi_idiv
+	ldr	r2, .L4481+56
+	mov	r3, r0
+	ldr	r1, .L4481+60
+	ldrh	r10, [r7, #14]
+	ldrb	r4, [r2]	@ zero_extendqisi2
+	ldr	r2, .L4481+64
+	strh	r0, [r6]	@ movhi
+	ldr	r0, .L4481+68
+	strb	r4, [r2]
+	ldrb	r2, [r7, #13]	@ zero_extendqisi2
+	str	r6, [sp, #8]
+	str	r0, [sp, #12]
+	strb	r2, [r1]
+	smulbb	r4, r4, r2
+	ldr	r2, .L4481+72
+	strh	r10, [r2]	@ movhi
+	lsl	r2, fp, #9
+	uxtb	r4, r4
+	uxth	r2, r2
+	strb	r4, [r0]
+	str	r2, [sp, #4]
+	ldr	r2, .L4481+76
+	ldrh	r1, [sp, #4]
+	strh	r1, [r2]	@ movhi
+	ldr	r2, .L4481+80
+	ldrh	r1, [r2]
+	ldr	r2, .L4481+84
+	strh	r1, [r2]	@ movhi
+	movs	r2, #1
+.L4403:
+	cmp	r1, r2
+	uxth	r0, r5
+	add	r5, r5, #1
+	bcs	.L4404
+	ldr	r1, .L4481+88
+	subs	r2, r0, #1
+	movs	r6, #0
+	movs	r5, #1
+	strh	r2, [r1]	@ movhi
+	ldr	r2, [sp]
+	mul	r2, r2, fp
+	mul	r0, r2, r10
+	lsrs	r7, r0, #21
+.L4405:
+	cmp	r7, r5
+	uxth	r1, r6
+	add	r6, r6, #1
+	bcs	.L4406
+	mov	r5, #1892352
+	subs	r1, r1, #1
+	mul	r6, r5, r4
+	uxth	r1, r1
+	ldr	r7, .L4481+92
+	lsr	r10, r10, #4
+	muls	r0, r4, r0
+	str	r2, [sp, #20]
+	str	r3, [sp, #16]
+	lsl	r5, r6, r1
+	ldr	r1, .L4481+96
+	add	r6, r5, #24576
+	str	r0, [r7]
+	str	r5, [r1]
+	mov	r0, r6
+	ldr	r1, .L4481+100
+	str	r6, [r1]
+	mov	r1, fp
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #4]
+	ldr	r1, .L4481+104
+	ldr	fp, .L4481+172
+	add	ip, r3, #-1
+	str	r0, [r1]
+	add	r0, ip, r0, lsl #2
+	mov	r1, r3
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #16]
+	strh	r0, [fp]	@ movhi
+	uxth	r0, r0
+	lsls	r0, r0, #4
+	mul	r1, r4, r3
+	bl	__aeabi_idiv
+	ldr	r2, [sp, #20]
+	ldr	r3, .L4481+108
+	mul	r1, r4, r2
+	strh	r0, [r3]	@ movhi
+	mov	r0, r6
+	mov	r6, fp
+	subs	r1, r1, #1
+	bl	__aeabi_uidiv
+	ldr	r3, .L4481+112
+	adds	r0, r0, #8
+	cmp	r10, #79
+	ldr	ip, .L4481+212
+	it	ls
+	movls	r2, #80
+	ldr	lr, .L4481+132
+	strh	r0, [r3]	@ movhi
+	mov	r1, #48
+	ldr	r3, .L4481+116
+	ldr	r0, .L4481+120
+	strh	r10, [r3]	@ movhi
+	it	ls
+	strhls	r2, [r3]	@ movhi
+	mov	r3, #2000
+	strh	r3, [ip]	@ movhi
+	movs	r3, #50
+	strh	r3, [r0]	@ movhi
+	mov	r2, #256
+	ldr	r3, .L4481+124
+	cmp	r8, #2
+	mov	r8, r0
+	strh	r2, [r3]	@ movhi
+	ldr	r2, .L4481+128
+	strh	r1, [r2]	@ movhi
+	mov	r1, #32
+	strh	r1, [lr]	@ movhi
+	mov	r10, r2
+	mov	lr, ip
+	beq	.L4408
+	ldr	fp, .L4481+216
+	ldrb	fp, [fp]	@ zero_extendqisi2
+	cmp	fp, #0
+	beq	.L4409
+.L4408:
+	movs	r2, #150
+	movs	r1, #12
+	strh	r2, [r8]	@ movhi
+	movs	r2, #64
+	strh	r2, [r10]	@ movhi
+	ldr	r2, .L4481+132
+	strh	r1, [r2]	@ movhi
+	ldr	r1, .L4481+136
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	cbnz	r1, .L4410
+	movs	r1, #4
+	strh	r1, [r2]	@ movhi
+	mov	r2, #600
+	strh	r2, [lr]	@ movhi
+	movs	r2, #128
+	strh	r2, [r3]	@ movhi
+.L4410:
+	ldr	r3, .L4481+140
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L4412
+	movs	r3, #200
+	strh	r3, [r8]	@ movhi
+	mov	r3, #2000
+	strh	r3, [lr]	@ movhi
+.L4412:
+	ldr	r3, .L4481+144
+	movs	r2, #0
+	str	r2, [r3]
+	movs	r2, #1
+	ldr	r3, .L4481+148
+	strb	r2, [r3]
+	ldr	r2, [sp]
+	muls	r4, r2, r4
+	ldr	r2, [sp, #4]
+	cmp	r2, r4, lsl #2
+	ldr	r4, .L4481+152
+	itt	lt
+	movlt	r2, #2
+	strblt	r2, [r3]
+	ldr	r3, [r4]
+	lsls	r3, r3, #19
+	bpl	.L4415
+	mov	r1, r5
+	ldr	r0, .L4481+156
+	bl	printf
+.L4415:
+	ldr	r3, [r4]
+	lsls	r5, r3, #19
+	bpl	.L4416
+	ldr	r1, [r7]
+	ldr	r0, .L4481+160
+	bl	printf
+.L4416:
+	ldr	r3, [r4]
+	lsls	r0, r3, #19
+	bpl	.L4417
+	ldr	r3, .L4481+104
+	ldr	r0, .L4481+164
+	ldr	r1, [r3]
+	bl	printf
+.L4417:
+	ldr	r3, [r4]
+	lsls	r1, r3, #19
+	bpl	.L4418
+	ldr	r3, .L4481+100
+	ldr	r0, .L4481+168
+	ldr	r1, [r3]
+	bl	printf
+.L4418:
+	ldr	r3, [r4]
+	lsls	r2, r3, #19
+	bpl	.L4419
+	ldr	r3, .L4481+172
+	ldr	r0, .L4481+176
+	ldrh	r1, [r3]
+	bl	printf
+.L4419:
+	ldr	r3, [r4]
+	ldr	r8, .L4481+76
+	tst	r3, #4096
+	beq	.L4420
+	ldrh	r1, [r8]
+	ldr	r0, .L4481+180
+	bl	printf
+.L4420:
+	ldr	r3, [r4]
+	lsls	r3, r3, #19
+	bpl	.L4421
+	ldr	r3, .L4481+108
+	ldr	r0, .L4481+184
+	ldrh	r1, [r3]
+	bl	printf
+.L4421:
+	ldr	r3, [r4]
+	lsls	r7, r3, #19
+	bpl	.L4422
+	ldr	r3, .L4481+116
+	ldr	r0, .L4481+188
+	ldrh	r1, [r3]
+	bl	printf
+.L4422:
+	ldr	r3, [r4]
+	lsls	r5, r3, #19
+	bpl	.L4423
+	ldr	r3, .L4481+112
+	ldr	r0, .L4481+192
+	ldrh	r1, [r3]
+	bl	printf
+.L4423:
+	bl	zbuf_init
+	mov	r0, #16384
+	ldr	r5, .L4481+196
+	bl	ftl_malloc
+	ldr	r3, .L4481+200
+	ldr	r7, .L4481+72
+	str	r0, [r3]
+	mov	r0, #16384
+	bl	ftl_malloc
+	str	r0, [r5]
+	mov	r0, #16384
+	bl	ftl_malloc
+	ldr	r3, .L4481+204
+	str	r0, [r3]
+	movs	r0, #6
+	ldrh	r3, [r7]
+	muls	r0, r3, r0
+	bl	ftl_malloc
+	ldr	r3, .L4481+208
+	ldr	r2, [sp, #12]
+	b	.L4482
+.L4483:
+	.align	2
+.L4481:
+	.word	.LANCHOR66
+	.word	.LANCHOR33
+	.word	.LANCHOR67
+	.word	.LC239
+	.word	.LC104
+	.word	.LANCHOR133
+	.word	.LANCHOR95
+	.word	.LANCHOR134
+	.word	.LANCHOR185
+	.word	.LANCHOR129
+	.word	.LANCHOR238
+	.word	.LANCHOR79
+	.word	.LANCHOR131
+	.word	.LANCHOR86
+	.word	.LANCHOR18
+	.word	.LANCHOR76
+	.word	.LANCHOR112
+	.word	.LANCHOR80
+	.word	.LANCHOR6
+	.word	.LANCHOR221
+	.word	.LANCHOR2
+	.word	.LANCHOR111
+	.word	.LANCHOR75
+	.word	.LANCHOR239
+	.word	.LANCHOR68
+	.word	.LANCHOR240
+	.word	.LANCHOR128
+	.word	.LANCHOR155
+	.word	.LANCHOR101
+	.word	.LANCHOR98
+	.word	.LANCHOR125
+	.word	.LANCHOR152
+	.word	.LANCHOR153
+	.word	.LANCHOR8
+	.word	.LANCHOR0
+	.word	.LANCHOR37
+	.word	.LANCHOR122
+	.word	.LANCHOR224
+	.word	.LANCHOR14
+	.word	.LC240
+	.word	.LC241
+	.word	.LC242
+	.word	.LC243
+	.word	.LANCHOR204
+	.word	.LC244
+	.word	.LC245
+	.word	.LC246
+	.word	.LC247
+	.word	.LC248
+	.word	.LANCHOR200
+	.word	.LANCHOR195
+	.word	.LANCHOR190
+	.word	.LANCHOR4
+	.word	.LANCHOR126
+	.word	.LANCHOR84
+.L4482:
+	str	r0, [r3]
+	ldr	r3, [sp, #8]
+	ldrb	r0, [r2]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	muls	r0, r3, r0
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L4484
+	ldr	r2, [r5]
+	ldrh	r5, [r7]
+	str	r0, [r3]
+	ldr	r3, .L4484+4
+	str	r2, [r3]
+	ldr	r3, [sp, #8]
+	ldrh	r1, [r3]
+	ldr	r3, [sp, #12]
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	muls	r0, r1, r0
+	ldr	r1, .L4484+8
+	add	r3, r2, r0, lsl #3
+	str	r3, [r1]
+	lsls	r1, r0, #1
+	ldr	r0, [r4]
+	add	r1, r1, r5, lsr #1
+	ldr	r5, .L4484+12
+	add	r1, r2, r1, lsl #2
+	lsls	r0, r0, #19
+	str	r1, [r5]
+	bpl	.L4424
+	ldr	r0, .L4484+16
+	bl	printf
+.L4424:
+	ldr	r2, [sp, #8]
+	ldr	r1, [sp, #12]
+	ldrh	r3, [r7]
+	ldrh	r2, [r2]
+	ldrb	r7, [r1]	@ zero_extendqisi2
+	muls	r7, r2, r7
+	ldrh	r2, [r6]
+	lsls	r6, r3, #2
+	add	r7, r3, r7, lsl #2
+	ldr	r3, [r4]
+	add	r6, r6, r2, lsl #2
+	lsls	r7, r7, #1
+	lsls	r2, r3, #19
+	add	r7, r7, #632
+	add	r6, r6, #704
+	bpl	.L4425
+	ldrh	r3, [r8]
+	mov	r2, r6
+	mov	r1, r7
+	ldr	r0, .L4484+20
+	bl	printf
+.L4425:
+	ldrh	r3, [r8]
+	cmp	r7, r3
+	bhi	.L4426
+	cmp	r6, r3
+	bls	.L4427
+.L4426:
+.L4480:
+	b	.L4480
+.L4404:
+	lsls	r2, r2, #1
+	b	.L4403
+.L4406:
+	lsls	r5, r5, #1
+	b	.L4405
+.L4409:
+	ldr	r3, .L4484+24
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L4412
+	mov	r3, #1200
+	strh	r1, [r0]	@ movhi
+	strh	r3, [ip]	@ movhi
+	strh	r1, [r2]	@ movhi
+	b	.L4412
+.L4427:
+	bl	sblk_init
+	bl	ftl_info_blk_init
+	adds	r3, r0, #1
+	beq	.L4402
+	bl	ftl_ext_info_init
+	bl	gc_init
+	movs	r0, #1
+	ldr	r4, .L4484+28
+	bl	pm_init
+	bl	lpa_rebuild_hash
+	ldr	r0, [r5]
+	movs	r1, #0
+	adds	r0, r0, #16
+	bl	ftl_open_sblk_recovery
+	ldr	r0, [r5]
+	add	r1, r0, #16
+	adds	r0, r0, #48
+	bl	ftl_open_sblk_recovery
+	ldr	r2, [r4]
+	ldr	r0, [r5]
+	ldr	r3, [r2, #8]
+	adds	r0, r0, #16
+	adds	r3, r3, #16
+	str	r3, [r2, #8]
+	bl	ftl_info_data_recovery
+	ldr	r0, [r5]
+	adds	r0, r0, #48
+	bl	ftl_info_data_recovery
+	ldr	r0, [r5]
+	adds	r0, r0, #80
+	bl	ftl_info_data_recovery
+	bl	gc_recovery
+	bl	pm_flush
+	movs	r0, #1
+	bl	ftl_total_vpn_update
+	ldr	r3, .L4484+32
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L4429
+	ldr	r2, [r4]
+	ldr	r3, [r2, #68]
+	adds	r3, r3, #1
+	str	r3, [r2, #68]
+.L4429:
+	bl	ftl_ext_info_flush
+	movs	r0, #0
+	bl	ftl_info_flush
+	bl	print_ftl_debug_info
+	ldr	r3, [r5]
+	ldrh	r3, [r3, #124]
+	cbnz	r3, .L4436
+	ldr	r3, .L4484+36
+	ldr	r2, .L4484+40
+	ldrh	r3, [r3]
+	ldrh	r2, [r2]
+	add	r3, r3, r2
+	cmp	r3, #7
+	ble	.L4436
+.L4432:
+	movs	r0, #0
+.L4402:
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L4436:
+	ldr	r6, .L4484+36
+	mov	r4, #16384
+.L4433:
+	movs	r1, #1
+	movs	r0, #0
+	bl	zftl_do_gc
+	movs	r1, #1
+	mov	r0, r1
+	bl	zftl_do_gc
+	ldr	r3, [r5]
+	ldrh	r2, [r3, #124]
+	cbnz	r2, .L4431
+	ldrh	r2, [r3, #80]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L4431
+	ldr	r2, .L4484+40
+	ldrh	r3, [r6]
+	ldrh	r2, [r2]
+	add	r3, r3, r2
+	cmp	r3, #7
+	bgt	.L4432
+.L4431:
+	subs	r4, r4, #1
+	bne	.L4433
+	b	.L4432
+.L4485:
+	.align	2
+.L4484:
+	.word	.LANCHOR118
+	.word	.LANCHOR117
+	.word	.LANCHOR9
+	.word	.LANCHOR10
+	.word	.LC249
+	.word	.LC250
+	.word	.LANCHOR36
+	.word	.LANCHOR110
+	.word	.LANCHOR198
+	.word	.LANCHOR103
+	.word	.LANCHOR107
+	.size	zftl_init, .-zftl_init
+	.section	.text.rk_ftl_init,"ax",%progbits
+	.align	1
+	.global	rk_ftl_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_ftl_init, %function
+rk_ftl_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, lr}
+	bl	nand_flash_init
+	mov	r4, r0
+	cbnz	r0, .L4487
+	bl	zftl_init
+	mov	r4, r0
+.L4487:
+	bl	idb_init
+	mov	r1, r4
+	ldr	r0, .L4488
+	bl	printf
+	mov	r0, r4
+	pop	{r4, pc}
+.L4489:
+	.align	2
+.L4488:
+	.word	.LC251
+	.size	rk_ftl_init, .-rk_ftl_init
+	.section	.text.zftl_write,"ax",%progbits
+	.align	1
+	.global	zftl_write
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	zftl_write, %function
+zftl_write:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r8, r3
+	ldr	r3, .L4519
+	sub	sp, sp, #24
+	mov	r4, r0
+	mov	r6, r1
+	mov	r5, r2
+	ldr	r3, [r3]
+	lsls	r3, r3, #19
+	bpl	.L4491
+	ldr	r3, [r8]
+	str	r3, [sp]
+	mov	r3, r2
+	mov	r2, r1
+	mov	r1, r0
+	ldr	r0, .L4519+4
+	bl	printf
+.L4491:
+	cmp	r4, #0
+	bne	.L4492
+	ldr	r3, .L4519+8
+	mov	r4, #24576
+	ldr	r3, [r3]
+.L4493:
+	cmp	r3, r6
+	bls	.L4511
+	cmp	r3, r5
+	bcc	.L4511
+	adds	r2, r6, r5
+	cmp	r3, r2
+	bcc	.L4511
+	ldr	fp, .L4519+36
+	add	r4, r4, r6
+	mov	r0, r4
+	ldrb	r6, [fp]	@ zero_extendqisi2
+	mov	r1, r6
+	bl	__aeabi_uidiv
+	mov	r10, r0
+	subs	r0, r5, #1
+	mov	r1, r6
+	add	r0, r0, r4
+	bl	__aeabi_uidiv
+	sub	r6, r0, r10
+	mov	r7, r10
+	adds	r6, r6, #1
+	str	r0, [sp, #12]
+	str	fp, [sp, #16]
+.L4495:
+	cbnz	r6, .L4503
+	bl	ftl_write_commit
+	bl	ftl_flush
+	movs	r1, #1
+	mov	r0, r6
+	bl	zftl_do_gc
+	ldr	r3, .L4519+12
+	ldr	r5, .L4519+16
+	ldr	r4, .L4519+20
+	ldr	r3, [r3]
+	ldrh	r3, [r3, #124]
+	cbnz	r3, .L4504
+	ldrh	r3, [r5]
+	ldrh	r2, [r4]
+	add	r3, r3, r2
+	cmp	r3, #11
+	bgt	.L4506
+.L4504:
+	movs	r1, #1
+	movs	r0, #0
+.L4518:
+	bl	zftl_do_gc
+.L4506:
+	ldrh	r3, [r5]
+	ldrh	r2, [r4]
+	add	r3, r3, r2
+	cmp	r3, #7
+	ble	.L4507
+	movs	r0, #0
+.L4490:
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L4492:
+	cmp	r4, #3
+	bhi	.L4511
+	lsls	r4, r4, #13
+	mov	r3, #8192
+	b	.L4493
+.L4503:
+	ldr	r3, .L4519+24
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L4496
+	ldr	r3, .L4519+28
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #2
+	bhi	.L4496
+	bl	ftl_write_commit
+.L4496:
+	movs	r0, #0
+	bl	buf_alloc
+	mov	fp, r0
+	cbnz	r0, .L4497
+	bl	ftl_write_commit
+	b	.L4495
+.L4497:
+	ldr	r3, [sp, #16]
+	movs	r2, #0
+	strb	r2, [r0, #41]
+	cmp	r7, r10
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	strb	r2, [r0, #40]
+	bne	.L4499
+	mov	r1, r2
+	mov	r0, r4
+	str	r2, [sp, #20]
+	bl	__aeabi_uidivmod
+	ldr	r2, [sp, #20]
+	uxtb	r1, r1
+	strb	r1, [fp, #41]
+	subs	r1, r2, r1
+	uxtb	r1, r1
+	cmp	r5, r1
+	ite	cs
+	strbcs	r1, [fp, #40]
+	strbcc	r5, [fp, #40]
+.L4501:
+	ldrb	ip, [fp, #41]	@ zero_extendqisi2
+	mov	r1, r8
+	ldrb	r2, [fp, #40]	@ zero_extendqisi2
+	subs	r6, r6, #1
+	ldr	r0, [fp, #4]
+	lsls	r2, r2, #9
+	add	r0, r0, ip, lsl #9
+	bl	ftl_memcpy
+	ldr	r2, .L4519+32
+	str	r7, [fp, #20]
+	adds	r7, r7, #1
+	ldr	r1, [r2]
+	ldr	r2, [r1, #8]
+	adds	r0, r2, #1
+	str	r0, [r1, #8]
+	mov	r0, fp
+	str	r2, [fp, #16]
+	bl	ftl_write_buf
+	ldrb	r3, [fp, #40]	@ zero_extendqisi2
+	add	r8, r8, r3, lsl #9
+	b	.L4495
+.L4499:
+	ldr	r3, [sp, #12]
+	cmp	r7, r3
+	itttt	eq
+	smulbbeq	r2, r7, r2
+	addeq	r1, r4, r5
+	subeq	r2, r1, r2
+	strbeq	r2, [r0, #40]
+	b	.L4501
+.L4507:
+	movs	r1, #1
+	movs	r0, #0
+	bl	zftl_do_gc
+	movs	r1, #1
+	mov	r0, r1
+	b	.L4518
+.L4511:
+	mov	r0, #-1
+	b	.L4490
+.L4520:
+	.align	2
+.L4519:
+	.word	.LANCHOR14
+	.word	.LC252
+	.word	.LANCHOR68
+	.word	.LANCHOR10
+	.word	.LANCHOR103
+	.word	.LANCHOR107
+	.word	.LANCHOR67
+	.word	.LANCHOR58
+	.word	.LANCHOR110
+	.word	.LANCHOR131
+	.size	zftl_write, .-zftl_write
+	.section	.text.zftl_sys_write,"ax",%progbits
+	.align	1
+	.global	zftl_sys_write
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	zftl_sys_write, %function
+zftl_sys_write:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r3, r2
+	mov	r2, r1
+	mov	r1, r0
+	movs	r0, #2
+	b	zftl_write
+	.size	zftl_sys_write, .-zftl_sys_write
+	.section	.text.StorageSysDataStore,"ax",%progbits
+	.align	1
+	.global	StorageSysDataStore
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	StorageSysDataStore, %function
+StorageSysDataStore:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r3, r1
+	movs	r2, #1
+	mov	r1, r0
+	movs	r0, #2
+	b	zftl_write
+	.size	StorageSysDataStore, .-StorageSysDataStore
+	.section	.text.FlashBootVendorWrite,"ax",%progbits
+	.align	1
+	.global	FlashBootVendorWrite
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashBootVendorWrite, %function
+FlashBootVendorWrite:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r3, r2
+	mov	r2, r1
+	add	r1, r0, #512
+	movs	r0, #2
+	b	zftl_write
+	.size	FlashBootVendorWrite, .-FlashBootVendorWrite
+	.section	.text.ftl_write,"ax",%progbits
+	.align	1
+	.global	ftl_write
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_write, %function
+ftl_write:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r7, r1
+	mov	r4, r2
+	mov	r5, r3
+	mov	r6, r0
+	cbnz	r0, .L4525
+	mov	r3, r2
+	mov	r2, r5
+	bl	idb_write_data
+.L4525:
+	mov	r3, r5
+	mov	r2, r4
+	mov	r1, r7
+	mov	r0, r6
+	pop	{r4, r5, r6, r7, r8, lr}
+	b	zftl_write
+	.size	ftl_write, .-ftl_write
+	.section	.text.ftl_vendor_write,"ax",%progbits
+	.align	1
+	.global	ftl_vendor_write
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_vendor_write, %function
+ftl_vendor_write:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r3, r2
+	mov	r2, r1
+	add	r1, r0, #512
+	movs	r0, #2
+	b	zftl_write
+	.size	ftl_vendor_write, .-ftl_vendor_write
+	.section	.text.zftl_vendor_write,"ax",%progbits
+	.align	1
+	.global	zftl_vendor_write
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	zftl_vendor_write, %function
+zftl_vendor_write:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	ftl_vendor_write
+	.size	zftl_vendor_write, .-zftl_vendor_write
+	.section	.text.zftl_discard,"ax",%progbits
+	.align	1
+	.global	zftl_discard
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	zftl_discard, %function
+zftl_discard:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L4578
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r1
+	sub	sp, sp, #32
+	ldr	r3, [r3]
+	cmp	r0, r3
+	bcs	.L4551
+	cmp	r1, r3
+	bhi	.L4551
+	adds	r2, r0, r1
+	cmp	r3, r2
+	bcc	.L4551
+	ldr	r2, .L4578+4
+	add	r7, r0, #24576
+	ldr	r3, .L4578+8
+	ldr	r0, [r2]
+	ldr	r1, [r3]
+	str	r3, [sp, #12]
+	tst	r0, #4096
+	str	r2, [sp, #16]
+	add	r1, r1, r4
+	str	r1, [r3]
+	beq	.L4530
+	movs	r3, #0
+	mov	r2, r7
+	str	r3, [sp]
+	mov	r3, r4
+	ldr	r0, .L4578+12
+	bl	printf
+.L4530:
+	ldr	r8, .L4578+36
+	ldr	r10, .L4578+40
+	ldr	r3, [r8]
+	ldr	r2, [r3, #8]
+	str	r2, [sp, #8]
+	adds	r2, r2, #1
+	str	r2, [r3, #8]
+	bl	ftl_write_commit
+	bl	ftl_flush
+	ldrb	r6, [r10]	@ zero_extendqisi2
+	mov	r0, r7
+	mov	r1, r6
+	bl	__aeabi_uidiv
+	mov	r1, r6
+	mov	r5, r0
+	mov	r0, r7
+	bl	__aeabi_uidivmod
+	mov	fp, r1
+	cmp	r1, #0
+	beq	.L4531
+	subs	r6, r6, r1
+	mov	r0, r5
+	cmp	r6, r4
+	it	cs
+	movcs	r6, r4
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #24]
+	adds	r0, r0, #1
+	bne	.L4532
+	movs	r2, #0
+	add	r1, sp, #24
+	mov	r0, r5
+	bl	pm_log2phys
+.L4532:
+	ldr	r3, [sp, #24]
+	adds	r3, r3, #1
+	beq	.L4534
+	movs	r0, #0
+	bl	buf_alloc
+	mov	r3, r0
+	cbz	r0, .L4534
+	ldr	r2, [sp, #8]
+	movs	r1, #0
+	str	r5, [r0, #20]
+	strb	fp, [r0, #41]
+	str	r2, [r0, #16]
+	uxth	r2, r6
+	strb	r6, [r0, #40]
+	ldr	r0, [r0, #4]
+	lsls	r2, r2, #9
+	str	r3, [sp, #20]
+	add	r0, r0, fp, lsl #9
+	bl	ftl_memset
+	ldr	r3, [sp, #20]
+	mov	r0, r3
+	bl	ftl_write_buf
+	bl	ftl_write_commit
+	ldr	r2, [r8]
+	ldr	r3, [r2, #76]
+	adds	r3, r3, #1
+	str	r3, [r2, #76]
+.L4534:
+	uxth	r6, r6
+	adds	r5, r5, #1
+	subs	r4, r4, r6
+.L4531:
+	cbz	r4, .L4536
+	bl	ftl_flush
+.L4536:
+	ldr	fp, .L4578+44
+	mov	r3, #-1
+	ldr	r6, .L4578+16
+	str	r3, [sp, #28]
+.L4537:
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	cmp	r4, r3
+	bcs	.L4542
+	cmp	r4, #0
+	beq	.L4544
+	mov	r0, r5
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #24]
+	adds	r0, r0, #1
+	bne	.L4545
+	movs	r2, #0
+	add	r1, sp, #24
+	mov	r0, r5
+	bl	pm_log2phys
+.L4545:
+	ldr	r3, [sp, #24]
+	adds	r3, r3, #1
+	beq	.L4544
+	movs	r0, #0
+	bl	buf_alloc
+	mov	r6, r0
+	cbz	r0, .L4544
+	movs	r3, #0
+	str	r5, [r0, #20]
+	strb	r3, [r0, #41]
+	ldr	r3, [sp, #8]
+	strb	r4, [r0, #40]
+	str	r3, [r0, #16]
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	cmp	r4, r3
+	bcc	.L4547
+	movw	r2, #1477
+	ldr	r1, .L4578+20
+	ldr	r0, .L4578+24
+	bl	printf
+.L4547:
+	lsls	r2, r4, #9
+	movs	r1, #0
+	ldr	r0, [r6, #4]
+	bl	ftl_memset
+	mov	r0, r6
+	bl	ftl_write_buf
+	bl	ftl_write_commit
+	ldr	r2, [r8]
+	ldr	r3, [r2, #76]
+	adds	r3, r3, #1
+	str	r3, [r2, #76]
+.L4544:
+	ldr	r3, [sp, #12]
+	ldr	r1, [r3]
+	cmp	r1, #8192
+	bls	.L4552
+	ldr	r3, [sp, #16]
+	ldr	r3, [r3]
+	lsls	r3, r3, #19
+	bpl	.L4548
+	movs	r3, #0
+	mov	r2, r7
+	str	r3, [sp]
+	mov	r3, r4
+	ldr	r0, .L4578+12
+	bl	printf
+.L4548:
+	ldr	r3, [sp, #12]
+	movs	r4, #0
+	str	r4, [r3]
+	bl	flt_sys_flush
+	ldr	r3, .L4578+28
+	movs	r2, #1
+	str	r2, [r3]
+.L4552:
+	movs	r0, #0
+	b	.L4528
+.L4542:
+	mov	r0, r5
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #24]
+	adds	r0, r0, #1
+	beq	.L4538
+	movs	r0, #0
+	bl	buf_alloc
+	mov	r3, r0
+	cbz	r0, .L4540
+	ldrb	r2, [r10]	@ zero_extendqisi2
+	movs	r1, #0
+	strb	r1, [r0, #41]
+	str	r5, [r0, #20]
+	strb	r2, [r0, #40]
+	ldr	r0, [sp, #8]
+	lsls	r2, r2, #9
+	str	r3, [sp, #20]
+	str	r0, [r3, #16]
+	ldr	r0, [r3, #4]
+	bl	ftl_memset
+	ldr	r3, [sp, #20]
+	mov	r0, r3
+	bl	ftl_write_buf
+	bl	ftl_write_commit
+.L4577:
+	ldr	r2, [r8]
+	ldr	r3, [r2, #76]
+	adds	r3, r3, #1
+	str	r3, [r2, #76]
+.L4540:
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	adds	r5, r5, #1
+	subs	r4, r4, r3
+	b	.L4537
+.L4538:
+	movs	r2, #0
+	add	r1, sp, #24
+	mov	r0, r5
+	bl	pm_log2phys
+	ldr	r3, [sp, #24]
+	adds	r3, r3, #1
+	beq	.L4540
+	add	r1, sp, #28
+	movs	r2, #1
+	mov	r0, r5
+	bl	pm_log2phys
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	ldrh	r2, [fp]
+	rsb	r3, r3, #24
+	subs	r0, r3, r2
+	movs	r3, #1
+	lsls	r3, r3, r0
+	ldr	r0, [sp, #24]
+	subs	r3, r3, #1
+	lsrs	r0, r0, r2
+	ldr	r2, .L4578+32
+	ands	r0, r0, r3
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	uxth	r0, r0
+	bl	ftl_vpn_decrement
+	b	.L4577
+.L4551:
+	mov	r0, #-1
+.L4528:
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L4579:
+	.align	2
+.L4578:
+	.word	.LANCHOR68
+	.word	.LANCHOR14
+	.word	.LANCHOR241
+	.word	.LC253
+	.word	.LANCHOR32
+	.word	.LANCHOR242
+	.word	.LC0
+	.word	.LANCHOR122
+	.word	.LANCHOR76
+	.word	.LANCHOR110
+	.word	.LANCHOR131
+	.word	.LANCHOR75
+	.size	zftl_discard, .-zftl_discard
+	.section	.text.ftl_discard,"ax",%progbits
+	.align	1
+	.global	ftl_discard
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_discard, %function
+ftl_discard:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r0, r1
+	mov	r1, r2
+	b	zftl_discard
+	.size	ftl_discard, .-ftl_discard
+	.section	.text.dump_pm_blk,"ax",%progbits
+	.align	1
+	.global	dump_pm_blk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	dump_pm_blk, %function
+dump_pm_blk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	movs	r2, #4
+	ldr	r4, .L4585
+	movs	r5, #0
+	movw	r7, #65535
+	ldr	r0, .L4585+4
+	ldr	r1, [r4]
+	ldr	r6, .L4585+8
+	ldrh	r3, [r1, #698]
+	add	r1, r1, #704
+	bl	rknand_print_hex
+	ldr	r1, [r4]
+	movs	r2, #2
+	ldrh	r3, [r6]
+	ldr	r0, .L4585+12
+	add	r1, r1, #416
+	bl	rknand_print_hex
+.L4582:
+	ldrh	r2, [r6]
+	uxth	r3, r5
+	cmp	r2, r3
+	bhi	.L4584
+	pop	{r3, r4, r5, r6, r7, pc}
+.L4584:
+	ldr	r2, [r4]
+	uxth	r3, r5
+	adds	r3, r3, #208
+	ldrh	r0, [r2, r3, lsl #1]
+	cmp	r0, r7
+	beq	.L4583
+	movs	r1, #0
+	bl	ftl_sblk_dump
+.L4583:
+	adds	r5, r5, #1
+	b	.L4582
+.L4586:
+	.align	2
+.L4585:
+	.word	.LANCHOR110
+	.word	.LC254
+	.word	.LANCHOR155
+	.word	.LC255
+	.size	dump_pm_blk, .-dump_pm_blk
+	.global	g_pm_spare
+	.global	pm_first_write
+	.global	pm_force_gc
+	.global	pm_gc_enable
+	.global	pm_last_load_ram_id
+	.global	pm_last_update_ram_id
+	.global	pm_ram_info
+	.global	sblk_gc_write_completed_queue_head
+	.global	sblk_read_completed_queue_head
+	.global	sblk_write_completed_queue_head
+	.global	sblk_queue_head
+	.global	slc_cache_sblk
+	.global	xlc_data_sblk
+	.global	slc_data_sblk
+	.global	free_mix_sblk
+	.global	free_xlc_sblk
+	.global	free_slc_sblk
 	.global	gp_data_xlc_data_head
 	.global	gp_data_slc_data_head
 	.global	gp_data_slc_cache_head
@@ -27520,11 +29788,11 @@ dump_pm_blk:
 	.global	gp_ftl_ext_info
 	.global	gp_ftl_info
 	.global	gp_blk_info
-	.global	ftl_tmp_spare
-	.global	ftl_info_spare
+	.global	ftl_tmp_buffer
 	.global	ftl_ext_info_data_buffer
 	.global	ftl_info_data_buffer
-	.global	ftl_tmp_buffer
+	.global	ftl_tmp_spare
+	.global	ftl_info_spare
 	.global	g_ftl_info_blk
 	.global	tlc_b05a_prog_tbl
 	.global	tlc_prog_order
@@ -27540,6 +29808,7 @@ dump_pm_blk:
 	.global	gc_slc_data_index
 	.global	gc_free_slc_sblk_th
 	.global	gc_slc_mode_vpn_th
+	.global	gc_slc_mode_slc_vpn_th
 	.global	gc_slc_mode_tlc_vpn_th
 	.global	gc_tlc_mode_tlc_vpn_th
 	.global	gc_tlc_mode_slc_vpn_th
@@ -27548,6 +29817,7 @@ dump_pm_blk:
 	.global	p_read_ahead_ext_buf
 	.global	discard_sector_count
 	.global	read_ahead_lpa
+	.global	_ftl_gc_tag_page_num
 	.global	read_buf_count
 	.global	read_buf_head
 	.global	write_commit_count
@@ -27566,7 +29836,6 @@ dump_pm_blk:
 	.global	_last_write_time
 	.global	_last_read_time
 	.global	_min_slc_super_block
-	.global	_max_slc_super_block
 	.global	_max_xlc_super_block
 	.global	_c_max_pm_sblk
 	.global	_c_ftl_pm_page_num
@@ -27618,6 +29887,7 @@ dump_pm_blk:
 	.global	g_maxRegNum
 	.global	g_retryMode
 	.global	g_flash_toggle_mode_en
+	.global	g_flash_ymtc_3d_tlc_flag
 	.global	g_flash_micron_3d_tlc_b16a
 	.global	g_flash_micron_3d_tlc_b05a
 	.global	g_flash_micron_3d_tlc_flag
@@ -27632,6 +29902,7 @@ dump_pm_blk:
 	.global	g_slc_mode_addr2
 	.global	g_slc_mode_enable
 	.global	g_flash_cur_mode
+	.global	g_flash_six_addr
 	.global	g_flash_slc_mode
 	.global	g_slc_page_num
 	.global	g_totle_phy_block
@@ -27645,7 +29916,7 @@ dump_pm_blk:
 	.global	g_flash_page_buffer
 	.section	.bss.IDByte,"aw",%nobits
 	.align	2
-	.set	.LANCHOR44,. + 0
+	.set	.LANCHOR48,. + 0
 	.type	IDByte, %object
 	.size	IDByte, 32
 IDByte:
@@ -27659,27 +29930,27 @@ _c_ftl_blk_pre_plane:
 	.space	2
 	.section	.bss._c_ftl_block_addr_log2,"aw",%nobits
 	.align	1
-	.set	.LANCHOR68,. + 0
+	.set	.LANCHOR75,. + 0
 	.type	_c_ftl_block_addr_log2, %object
 	.size	_c_ftl_block_addr_log2, 2
 _c_ftl_block_addr_log2:
 	.space	2
 	.section	.bss._c_ftl_block_align_addr,"aw",%nobits
 	.align	1
-	.set	.LANCHOR105,. + 0
+	.set	.LANCHOR111,. + 0
 	.type	_c_ftl_block_align_addr, %object
 	.size	_c_ftl_block_align_addr, 2
 _c_ftl_block_align_addr:
 	.space	2
 	.section	.bss._c_ftl_byte_pre_page,"aw",%nobits
 	.align	1
-	.set	.LANCHOR208,. + 0
+	.set	.LANCHOR221,. + 0
 	.type	_c_ftl_byte_pre_page, %object
 	.size	_c_ftl_byte_pre_page, 2
 _c_ftl_byte_pre_page:
 	.space	2
 	.section	.bss._c_ftl_cs_bits,"aw",%nobits
-	.set	.LANCHOR31,. + 0
+	.set	.LANCHOR32,. + 0
 	.type	_c_ftl_cs_bits, %object
 	.size	_c_ftl_cs_bits, 1
 _c_ftl_cs_bits:
@@ -27691,7 +29962,7 @@ _c_ftl_cs_bits:
 _c_ftl_nand_blks_per_die:
 	.space	2
 	.section	.bss._c_ftl_nand_die_num,"aw",%nobits
-	.set	.LANCHOR106,. + 0
+	.set	.LANCHOR112,. + 0
 	.type	_c_ftl_nand_die_num, %object
 	.size	_c_ftl_nand_die_num, 1
 _c_ftl_nand_die_num:
@@ -27703,61 +29974,61 @@ _c_ftl_nand_die_num:
 _c_ftl_nand_planes_num:
 	.space	1
 	.section	.bss._c_ftl_nand_type,"aw",%nobits
-	.set	.LANCHOR73,. + 0
+	.set	.LANCHOR79,. + 0
 	.type	_c_ftl_nand_type, %object
 	.size	_c_ftl_nand_type, 1
 _c_ftl_nand_type:
 	.space	1
 	.section	.bss._c_ftl_page_pre_blk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR79,. + 0
+	.set	.LANCHOR86,. + 0
 	.type	_c_ftl_page_pre_blk, %object
 	.size	_c_ftl_page_pre_blk, 2
 _c_ftl_page_pre_blk:
 	.space	2
 	.section	.bss._c_ftl_page_pre_slc_blk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR87,. + 0
+	.set	.LANCHOR95,. + 0
 	.type	_c_ftl_page_pre_slc_blk, %object
 	.size	_c_ftl_page_pre_slc_blk, 2
 _c_ftl_page_pre_slc_blk:
 	.space	2
 	.section	.bss._c_ftl_planes_per_die,"aw",%nobits
-	.set	.LANCHOR69,. + 0
+	.set	.LANCHOR76,. + 0
 	.type	_c_ftl_planes_per_die, %object
 	.size	_c_ftl_planes_per_die, 1
 _c_ftl_planes_per_die:
 	.space	1
 	.section	.bss._c_ftl_pm_page_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR194,. + 0
+	.set	.LANCHOR204,. + 0
 	.type	_c_ftl_pm_page_num, %object
 	.size	_c_ftl_pm_page_num, 2
 _c_ftl_pm_page_num:
 	.space	2
 	.section	.bss._c_ftl_sec_per_page,"aw",%nobits
-	.set	.LANCHOR125,. + 0
+	.set	.LANCHOR131,. + 0
 	.type	_c_ftl_sec_per_page, %object
 	.size	_c_ftl_sec_per_page, 1
 _c_ftl_sec_per_page:
 	.space	1
 	.section	.bss._c_max_pm_sblk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR149,. + 0
+	.set	.LANCHOR155,. + 0
 	.type	_c_max_pm_sblk, %object
 	.size	_c_max_pm_sblk, 2
 _c_max_pm_sblk:
 	.space	2
 	.section	.bss._c_mix_max_slc_ec_count,"aw",%nobits
 	.align	1
-	.set	.LANCHOR120,. + 0
+	.set	.LANCHOR126,. + 0
 	.type	_c_mix_max_slc_ec_count, %object
 	.size	_c_mix_max_slc_ec_count, 2
 _c_mix_max_slc_ec_count:
 	.space	2
 	.section	.bss._c_mix_max_xlc_ec_count,"aw",%nobits
 	.align	1
-	.set	.LANCHOR118,. + 0
+	.set	.LANCHOR125,. + 0
 	.type	_c_mix_max_xlc_ec_count, %object
 	.size	_c_mix_max_xlc_ec_count, 2
 _c_mix_max_xlc_ec_count:
@@ -27771,49 +30042,55 @@ _c_slc_to_xlc_ec_ratio:
 	.space	2
 	.section	.bss._c_swl_slc_gc_th,"aw",%nobits
 	.align	1
-	.set	.LANCHOR148,. + 0
+	.set	.LANCHOR152,. + 0
 	.type	_c_swl_slc_gc_th, %object
 	.size	_c_swl_slc_gc_th, 2
 _c_swl_slc_gc_th:
 	.space	2
 	.section	.bss._c_swl_xlc_gc_th,"aw",%nobits
 	.align	1
-	.set	.LANCHOR147,. + 0
+	.set	.LANCHOR153,. + 0
 	.type	_c_swl_xlc_gc_th, %object
 	.size	_c_swl_xlc_gc_th, 2
 _c_swl_xlc_gc_th:
 	.space	2
 	.section	.bss._c_totle_data_density,"aw",%nobits
 	.align	2
-	.set	.LANCHOR213,. + 0
+	.set	.LANCHOR240,. + 0
 	.type	_c_totle_data_density, %object
 	.size	_c_totle_data_density, 4
 _c_totle_data_density:
 	.space	4
 	.section	.bss._c_totle_log_page,"aw",%nobits
 	.align	2
-	.set	.LANCHOR122,. + 0
+	.set	.LANCHOR128,. + 0
 	.type	_c_totle_log_page, %object
 	.size	_c_totle_log_page, 4
 _c_totle_log_page:
 	.space	4
 	.section	.bss._c_totle_phy_density,"aw",%nobits
 	.align	2
-	.set	.LANCHOR212,. + 0
+	.set	.LANCHOR239,. + 0
 	.type	_c_totle_phy_density, %object
 	.size	_c_totle_phy_density, 4
 _c_totle_phy_density:
 	.space	4
 	.section	.bss._c_user_data_density,"aw",%nobits
 	.align	2
-	.set	.LANCHOR61,. + 0
+	.set	.LANCHOR68,. + 0
 	.type	_c_user_data_density, %object
 	.size	_c_user_data_density, 4
 _c_user_data_density:
 	.space	4
+	.section	.bss._ftl_gc_tag_page_num,"aw",%nobits
+	.set	.LANCHOR224,. + 0
+	.type	_ftl_gc_tag_page_num, %object
+	.size	_ftl_gc_tag_page_num, 1
+_ftl_gc_tag_page_num:
+	.space	1
 	.section	.bss._gc_after_discard_en,"aw",%nobits
 	.align	2
-	.set	.LANCHOR116,. + 0
+	.set	.LANCHOR122,. + 0
 	.type	_gc_after_discard_en, %object
 	.size	_gc_after_discard_en, 4
 _gc_after_discard_en:
@@ -27830,144 +30107,139 @@ _last_read_time:
 	.size	_last_write_time, 4
 _last_write_time:
 	.space	4
-	.section	.bss._max_slc_super_block,"aw",%nobits
-	.align	1
-	.set	.LANCHOR119,. + 0
-	.type	_max_slc_super_block, %object
-	.size	_max_slc_super_block, 2
-_max_slc_super_block:
-	.space	2
 	.section	.bss._max_xlc_super_block,"aw",%nobits
 	.align	1
-	.set	.LANCHOR95,. + 0
+	.set	.LANCHOR101,. + 0
 	.type	_max_xlc_super_block, %object
 	.size	_max_xlc_super_block, 2
 _max_xlc_super_block:
 	.space	2
 	.section	.bss._min_slc_super_block,"aw",%nobits
 	.align	1
-	.set	.LANCHOR91,. + 0
+	.set	.LANCHOR98,. + 0
 	.type	_min_slc_super_block, %object
 	.size	_min_slc_super_block, 2
 _min_slc_super_block:
 	.space	2
 	.section	.bss.discard_sector_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR227,. + 0
+	.set	.LANCHOR241,. + 0
 	.type	discard_sector_count, %object
 	.size	discard_sector_count, 4
 discard_sector_count:
 	.space	4
 	.section	.bss.fill_spare_size,"aw",%nobits
 	.align	1
-	.set	.LANCHOR50,. + 0
+	.set	.LANCHOR54,. + 0
 	.type	fill_spare_size, %object
 	.size	fill_spare_size, 2
 fill_spare_size:
 	.space	2
 	.section	.bss.flash_ddr_tuning_sdr_read_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR163,. + 0
+	.set	.LANCHOR172,. + 0
 	.type	flash_ddr_tuning_sdr_read_count, %object
 	.size	flash_ddr_tuning_sdr_read_count, 4
 flash_ddr_tuning_sdr_read_count:
 	.space	4
 	.section	.bss.flash_read_retry,"aw",%nobits
 	.align	2
-	.set	.LANCHOR165,. + 0
+	.set	.LANCHOR174,. + 0
 	.type	flash_read_retry, %object
 	.size	flash_read_retry, 4
 flash_read_retry:
 	.space	4
 	.section	.bss.free_buf_count,"aw",%nobits
-	.set	.LANCHOR54,. + 0
+	.set	.LANCHOR58,. + 0
 	.type	free_buf_count, %object
 	.size	free_buf_count, 1
 free_buf_count:
 	.space	1
 	.section	.bss.free_mix_sblk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR101,. + 0
+	.set	.LANCHOR107,. + 0
 	.type	free_mix_sblk, %object
 	.size	free_mix_sblk, 2
 free_mix_sblk:
 	.space	2
 	.section	.bss.free_slc_sblk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR97,. + 0
+	.set	.LANCHOR103,. + 0
 	.type	free_slc_sblk, %object
 	.size	free_slc_sblk, 2
 free_slc_sblk:
 	.space	2
 	.section	.bss.free_xlc_sblk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR99,. + 0
+	.set	.LANCHOR105,. + 0
 	.type	free_xlc_sblk, %object
 	.size	free_xlc_sblk, 2
 free_xlc_sblk:
 	.space	2
 	.section	.bss.ftl_ext_info_data_buffer,"aw",%nobits
-	.align	6
+	.align	2
+	.set	.LANCHOR200,. + 0
 	.type	ftl_ext_info_data_buffer, %object
-	.size	ftl_ext_info_data_buffer, 16384
+	.size	ftl_ext_info_data_buffer, 4
 ftl_ext_info_data_buffer:
-	.space	16384
+	.space	4
 	.section	.bss.ftl_ext_info_first_write,"aw",%nobits
-	.set	.LANCHOR186,. + 0
+	.set	.LANCHOR199,. + 0
 	.type	ftl_ext_info_first_write, %object
 	.size	ftl_ext_info_first_write, 1
 ftl_ext_info_first_write:
 	.space	1
 	.section	.bss.ftl_flush_jiffies,"aw",%nobits
 	.align	2
-	.set	.LANCHOR222,. + 0
+	.set	.LANCHOR233,. + 0
 	.type	ftl_flush_jiffies, %object
 	.size	ftl_flush_jiffies, 4
 ftl_flush_jiffies:
 	.space	4
 	.section	.bss.ftl_info_data_buffer,"aw",%nobits
-	.align	6
+	.align	2
+	.set	.LANCHOR195,. + 0
 	.type	ftl_info_data_buffer, %object
-	.size	ftl_info_data_buffer, 16384
+	.size	ftl_info_data_buffer, 4
 ftl_info_data_buffer:
-	.space	16384
+	.space	4
 	.section	.bss.ftl_info_spare,"aw",%nobits
 	.align	6
-	.set	.LANCHOR181,. + 0
+	.set	.LANCHOR193,. + 0
 	.type	ftl_info_spare, %object
 	.size	ftl_info_spare, 256
 ftl_info_spare:
 	.space	256
 	.section	.bss.ftl_low_format_cur_blk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR62,. + 0
+	.set	.LANCHOR69,. + 0
 	.type	ftl_low_format_cur_blk, %object
 	.size	ftl_low_format_cur_blk, 2
 ftl_low_format_cur_blk:
 	.space	2
 	.section	.bss.ftl_power_lost_flag,"aw",%nobits
-	.set	.LANCHOR185,. + 0
+	.set	.LANCHOR198,. + 0
 	.type	ftl_power_lost_flag, %object
 	.size	ftl_power_lost_flag, 1
 ftl_power_lost_flag:
 	.space	1
 	.section	.bss.ftl_sblk_lpa_tbl,"aw",%nobits
 	.align	2
-	.set	.LANCHOR111,. + 0
+	.set	.LANCHOR117,. + 0
 	.type	ftl_sblk_lpa_tbl, %object
 	.size	ftl_sblk_lpa_tbl, 4
 ftl_sblk_lpa_tbl:
 	.space	4
 	.section	.bss.ftl_sblk_update_list,"aw",%nobits
 	.align	1
-	.set	.LANCHOR67,. + 0
+	.set	.LANCHOR74,. + 0
 	.type	ftl_sblk_update_list, %object
 	.size	ftl_sblk_update_list, 16
 ftl_sblk_update_list:
 	.space	16
 	.section	.bss.ftl_sblk_update_list_offset,"aw",%nobits
 	.align	1
-	.set	.LANCHOR117,. + 0
+	.set	.LANCHOR123,. + 0
 	.type	ftl_sblk_update_list_offset, %object
 	.size	ftl_sblk_update_list_offset, 2
 ftl_sblk_update_list_offset:
@@ -27981,33 +30253,34 @@ ftl_sblk_vpn:
 	.space	4
 	.section	.bss.ftl_sblk_vpn_update_id,"aw",%nobits
 	.align	1
-	.set	.LANCHOR66,. + 0
+	.set	.LANCHOR73,. + 0
 	.type	ftl_sblk_vpn_update_id, %object
 	.size	ftl_sblk_vpn_update_id, 2
 ftl_sblk_vpn_update_id:
 	.space	2
 	.section	.bss.ftl_sys_info_first_write,"aw",%nobits
-	.set	.LANCHOR184,. + 0
+	.set	.LANCHOR197,. + 0
 	.type	ftl_sys_info_first_write, %object
 	.size	ftl_sys_info_first_write, 1
 ftl_sys_info_first_write:
 	.space	1
 	.section	.bss.ftl_tmp_buffer,"aw",%nobits
-	.align	6
+	.align	2
+	.set	.LANCHOR190,. + 0
 	.type	ftl_tmp_buffer, %object
-	.size	ftl_tmp_buffer, 16384
+	.size	ftl_tmp_buffer, 4
 ftl_tmp_buffer:
-	.space	16384
+	.space	4
 	.section	.bss.ftl_tmp_spare,"aw",%nobits
 	.align	6
-	.set	.LANCHOR179,. + 0
+	.set	.LANCHOR191,. + 0
 	.type	ftl_tmp_spare, %object
 	.size	ftl_tmp_spare, 256
 ftl_tmp_spare:
 	.space	256
 	.section	.bss.ftl_vpn_update_count,"aw",%nobits
 	.align	1
-	.set	.LANCHOR115,. + 0
+	.set	.LANCHOR121,. + 0
 	.type	ftl_vpn_update_count, %object
 	.size	ftl_vpn_update_count, 2
 ftl_vpn_update_count:
@@ -28021,14 +30294,14 @@ g_block_align_addr:
 	.space	2
 	.section	.bss.g_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR52,. + 0
+	.set	.LANCHOR56,. + 0
 	.type	g_buf, %object
 	.size	g_buf, 1536
 g_buf:
 	.space	1536
 	.section	.bss.g_die_addr,"aw",%nobits
 	.align	2
-	.set	.LANCHOR143,. + 0
+	.set	.LANCHOR148,. + 0
 	.type	g_die_addr, %object
 	.size	g_die_addr, 32
 g_die_addr:
@@ -28041,78 +30314,84 @@ g_die_addr:
 g_die_cs_idx:
 	.space	8
 	.section	.bss.g_flash_3d_mlc_flag,"aw",%nobits
-	.set	.LANCHOR74,. + 0
+	.set	.LANCHOR81,. + 0
 	.type	g_flash_3d_mlc_flag, %object
 	.size	g_flash_3d_mlc_flag, 1
 g_flash_3d_mlc_flag:
 	.space	1
 	.section	.bss.g_flash_3d_tlc_flag,"aw",%nobits
-	.set	.LANCHOR77,. + 0
+	.set	.LANCHOR84,. + 0
 	.type	g_flash_3d_tlc_flag, %object
 	.size	g_flash_3d_tlc_flag, 1
 g_flash_3d_tlc_flag:
 	.space	1
 	.section	.bss.g_flash_blk_info,"aw",%nobits
 	.align	1
-	.set	.LANCHOR198,. + 0
+	.set	.LANCHOR211,. + 0
 	.type	g_flash_blk_info, %object
 	.size	g_flash_blk_info, 4
 g_flash_blk_info:
 	.space	4
 	.section	.bss.g_flash_cur_mode,"aw",%nobits
-	.set	.LANCHOR33,. + 0
+	.set	.LANCHOR34,. + 0
 	.type	g_flash_cur_mode, %object
 	.size	g_flash_cur_mode, 4
 g_flash_cur_mode:
 	.space	4
 	.section	.bss.g_flash_interface_mode,"aw",%nobits
-	.set	.LANCHOR45,. + 0
+	.set	.LANCHOR49,. + 0
 	.type	g_flash_interface_mode, %object
 	.size	g_flash_interface_mode, 1
 g_flash_interface_mode:
 	.space	1
 	.section	.bss.g_flash_micron_3d_tlc_b05a,"aw",%nobits
-	.set	.LANCHOR204,. + 0
+	.set	.LANCHOR124,. + 0
 	.type	g_flash_micron_3d_tlc_b05a, %object
 	.size	g_flash_micron_3d_tlc_b05a, 1
 g_flash_micron_3d_tlc_b05a:
 	.space	1
 	.section	.bss.g_flash_micron_3d_tlc_b16a,"aw",%nobits
-	.set	.LANCHOR205,. + 0
+	.set	.LANCHOR217,. + 0
 	.type	g_flash_micron_3d_tlc_b16a, %object
 	.size	g_flash_micron_3d_tlc_b16a, 1
 g_flash_micron_3d_tlc_b16a:
 	.space	1
 	.section	.bss.g_flash_micron_3d_tlc_flag,"aw",%nobits
-	.set	.LANCHOR35,. + 0
+	.set	.LANCHOR36,. + 0
 	.type	g_flash_micron_3d_tlc_flag, %object
 	.size	g_flash_micron_3d_tlc_flag, 1
 g_flash_micron_3d_tlc_flag:
 	.space	1
 	.section	.bss.g_flash_multi_page_prog_en,"aw",%nobits
-	.set	.LANCHOR41,. + 0
+	.set	.LANCHOR45,. + 0
 	.type	g_flash_multi_page_prog_en, %object
 	.size	g_flash_multi_page_prog_en, 1
 g_flash_multi_page_prog_en:
 	.space	1
 	.section	.bss.g_flash_multi_page_read_en,"aw",%nobits
-	.set	.LANCHOR171,. + 0
+	.set	.LANCHOR186,. + 0
 	.type	g_flash_multi_page_read_en, %object
 	.size	g_flash_multi_page_read_en, 1
 g_flash_multi_page_read_en:
 	.space	1
 	.section	.bss.g_flash_page_buffer,"aw",%nobits
 	.align	2
-	.set	.LANCHOR167,. + 0
+	.set	.LANCHOR176,. + 0
 	.type	g_flash_page_buffer, %object
 	.size	g_flash_page_buffer, 4
 g_flash_page_buffer:
 	.space	4
 	.section	.bss.g_flash_reversd_blks,"aw",%nobits
-	.set	.LANCHOR203,. + 0
+	.set	.LANCHOR216,. + 0
 	.type	g_flash_reversd_blks, %object
 	.size	g_flash_reversd_blks, 1
 g_flash_reversd_blks:
+	.space	1
+	.section	.bss.g_flash_six_addr,"aw",%nobits
+	.set	.LANCHOR31,. + 0
+	.type	g_flash_six_addr, %object
+	.size	g_flash_six_addr, 1
+g_flash_six_addr:
 	.space	1
 	.section	.bss.g_flash_slc_mode,"aw",%nobits
 	.set	.LANCHOR0,. + 0
@@ -28122,28 +30401,28 @@ g_flash_slc_mode:
 	.space	1
 	.section	.bss.g_flash_spare_buffer,"aw",%nobits
 	.align	2
-	.set	.LANCHOR166,. + 0
+	.set	.LANCHOR175,. + 0
 	.type	g_flash_spare_buffer, %object
 	.size	g_flash_spare_buffer, 4
 g_flash_spare_buffer:
 	.space	4
 	.section	.bss.g_flash_sys_spare_buffer,"aw",%nobits
 	.align	2
-	.set	.LANCHOR197,. + 0
+	.set	.LANCHOR210,. + 0
 	.type	g_flash_sys_spare_buffer, %object
 	.size	g_flash_sys_spare_buffer, 4
 g_flash_sys_spare_buffer:
 	.space	4
 	.section	.bss.g_flash_tmp_page_buffer,"aw",%nobits
 	.align	2
-	.set	.LANCHOR159,. + 0
+	.set	.LANCHOR166,. + 0
 	.type	g_flash_tmp_page_buffer, %object
 	.size	g_flash_tmp_page_buffer, 4
 g_flash_tmp_page_buffer:
 	.space	4
 	.section	.bss.g_flash_tmp_spare_buffer,"aw",%nobits
 	.align	2
-	.set	.LANCHOR161,. + 0
+	.set	.LANCHOR168,. + 0
 	.type	g_flash_tmp_spare_buffer, %object
 	.size	g_flash_tmp_spare_buffer, 4
 g_flash_tmp_spare_buffer:
@@ -28153,21 +30432,27 @@ g_flash_tmp_spare_buffer:
 	.type	g_flash_toggle_mode_en, %object
 	.size	g_flash_toggle_mode_en, 1
 g_flash_toggle_mode_en:
+	.space	1
+	.section	.bss.g_flash_ymtc_3d_tlc_flag,"aw",%nobits
+	.set	.LANCHOR37,. + 0
+	.type	g_flash_ymtc_3d_tlc_flag, %object
+	.size	g_flash_ymtc_3d_tlc_flag, 1
+g_flash_ymtc_3d_tlc_flag:
 	.space	1
 	.section	.bss.g_ftl_info_blk,"aw",%nobits
 	.align	6
-	.set	.LANCHOR182,. + 0
+	.set	.LANCHOR194,. + 0
 	.type	g_ftl_info_blk, %object
 	.size	g_ftl_info_blk, 4
 g_ftl_info_blk:
 	.space	4
 	.section	.bss.g_gc_info,"aw",%nobits
 	.align	2
-	.set	.LANCHOR64,. + 0
+	.set	.LANCHOR71,. + 0
 	.type	g_gc_info, %object
-	.size	g_gc_info, 596
+	.size	g_gc_info, 2132
 g_gc_info:
-	.space	596
+	.space	2132
 	.section	.bss.g_idb_ecc_bits,"aw",%nobits
 	.set	.LANCHOR17,. + 0
 	.type	g_idb_ecc_bits, %object
@@ -28184,9 +30469,9 @@ g_idb_slc_mode_enable:
 	.align	2
 	.set	.LANCHOR3,. + 0
 	.type	g_lsb_page_tbl, %object
-	.size	g_lsb_page_tbl, 512
+	.size	g_lsb_page_tbl, 1024
 g_lsb_page_tbl:
-	.space	512
+	.space	1024
 	.section	.bss.g_maxRegNum,"aw",%nobits
 	.set	.LANCHOR26,. + 0
 	.type	g_maxRegNum, %object
@@ -28194,18 +30479,18 @@ g_lsb_page_tbl:
 g_maxRegNum:
 	.space	1
 	.section	.bss.g_maxRetryCount,"aw",%nobits
-	.set	.LANCHOR162,. + 0
+	.set	.LANCHOR169,. + 0
 	.type	g_maxRetryCount, %object
 	.size	g_maxRetryCount, 1
 g_maxRetryCount:
 	.space	1
 	.section	.bss.g_msb_page_tbl,"aw",%nobits
 	.align	2
-	.set	.LANCHOR140,. + 0
+	.set	.LANCHOR145,. + 0
 	.type	g_msb_page_tbl, %object
-	.size	g_msb_page_tbl, 1024
+	.size	g_msb_page_tbl, 2048
 g_msb_page_tbl:
-	.space	1024
+	.space	2048
 	.section	.bss.g_nand_max_die,"aw",%nobits
 	.set	.LANCHOR18,. + 0
 	.type	g_nand_max_die, %object
@@ -28219,20 +30504,20 @@ g_nand_max_die:
 g_nand_opt_para:
 	.space	32
 	.section	.bss.g_nandc_ecc_bits,"aw",%nobits
-	.set	.LANCHOR46,. + 0
+	.set	.LANCHOR50,. + 0
 	.type	g_nandc_ecc_bits, %object
 	.size	g_nandc_ecc_bits, 1
 g_nandc_ecc_bits:
 	.space	1
 	.section	.bss.g_nandc_tran_timeout,"aw",%nobits
-	.set	.LANCHOR160,. + 0
+	.set	.LANCHOR167,. + 0
 	.type	g_nandc_tran_timeout, %object
 	.size	g_nandc_tran_timeout, 1
 g_nandc_tran_timeout:
 	.space	1
 	.section	.bss.g_nandc_v6_master_info,"aw",%nobits
 	.align	2
-	.set	.LANCHOR49,. + 0
+	.set	.LANCHOR53,. + 0
 	.type	g_nandc_v6_master_info, %object
 	.size	g_nandc_v6_master_info, 28
 g_nandc_v6_master_info:
@@ -28244,14 +30529,14 @@ g_nandc_v6_master_info:
 g_nandc_ver:
 	.space	1
 	.section	.bss.g_one_pass_program,"aw",%nobits
-	.set	.LANCHOR75,. + 0
+	.set	.LANCHOR82,. + 0
 	.type	g_one_pass_program, %object
 	.size	g_one_pass_program, 1
 g_one_pass_program:
 	.space	1
 	.section	.bss.g_pm_spare,"aw",%nobits
 	.align	2
-	.set	.LANCHOR191,. + 0
+	.set	.LANCHOR207,. + 0
 	.type	g_pm_spare, %object
 	.size	g_pm_spare, 4
 g_pm_spare:
@@ -28275,131 +30560,138 @@ g_slc_mode_enable:
 	.space	1
 	.section	.bss.g_slc_page_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR142,. + 0
+	.set	.LANCHOR147,. + 0
 	.type	g_slc_page_num, %object
 	.size	g_slc_page_num, 2
 g_slc_page_num:
 	.space	2
 	.section	.bss.g_totle_phy_block,"aw",%nobits
 	.align	1
-	.set	.LANCHOR144,. + 0
+	.set	.LANCHOR149,. + 0
 	.type	g_totle_phy_block, %object
 	.size	g_totle_phy_block, 2
 g_totle_phy_block:
 	.space	2
 	.section	.bss.gc_des_ppa_tbl,"aw",%nobits
 	.align	2
-	.set	.LANCHOR157,. + 0
+	.set	.LANCHOR164,. + 0
 	.type	gc_des_ppa_tbl, %object
 	.size	gc_des_ppa_tbl, 4
 gc_des_ppa_tbl:
 	.space	4
 	.section	.bss.gc_free_slc_sblk_th,"aw",%nobits
 	.align	1
-	.set	.LANCHOR81,. + 0
+	.set	.LANCHOR87,. + 0
 	.type	gc_free_slc_sblk_th, %object
 	.size	gc_free_slc_sblk_th, 2
 gc_free_slc_sblk_th:
 	.space	2
 	.section	.bss.gc_lpa_tbl,"aw",%nobits
 	.align	2
-	.set	.LANCHOR155,. + 0
+	.set	.LANCHOR162,. + 0
 	.type	gc_lpa_tbl, %object
 	.size	gc_lpa_tbl, 4
 gc_lpa_tbl:
 	.space	4
 	.section	.bss.gc_mode,"aw",%nobits
-	.set	.LANCHOR78,. + 0
+	.set	.LANCHOR85,. + 0
 	.type	gc_mode, %object
 	.size	gc_mode, 1
 gc_mode:
 	.space	1
 	.section	.bss.gc_page_buf_id,"aw",%nobits
 	.align	2
-	.set	.LANCHOR76,. + 0
+	.set	.LANCHOR83,. + 0
 	.type	gc_page_buf_id, %object
 	.size	gc_page_buf_id, 4
 gc_page_buf_id:
 	.space	4
 	.section	.bss.gc_pre_ppa_tbl,"aw",%nobits
 	.align	2
-	.set	.LANCHOR156,. + 0
+	.set	.LANCHOR163,. + 0
 	.type	gc_pre_ppa_tbl, %object
 	.size	gc_pre_ppa_tbl, 4
 gc_pre_ppa_tbl:
 	.space	4
 	.section	.bss.gc_search_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR154,. + 0
+	.set	.LANCHOR160,. + 0
 	.type	gc_search_count, %object
 	.size	gc_search_count, 4
 gc_search_count:
 	.space	4
 	.section	.bss.gc_slc_cache_index,"aw",%nobits
 	.align	1
-	.set	.LANCHOR84,. + 0
+	.set	.LANCHOR91,. + 0
 	.type	gc_slc_cache_index, %object
 	.size	gc_slc_cache_index, 2
 gc_slc_cache_index:
 	.space	2
 	.section	.bss.gc_slc_data_index,"aw",%nobits
 	.align	1
-	.set	.LANCHOR88,. + 0
+	.set	.LANCHOR90,. + 0
 	.type	gc_slc_data_index, %object
 	.size	gc_slc_data_index, 2
 gc_slc_data_index:
+	.space	2
+	.section	.bss.gc_slc_mode_slc_vpn_th,"aw",%nobits
+	.align	1
+	.set	.LANCHOR161,. + 0
+	.type	gc_slc_mode_slc_vpn_th, %object
+	.size	gc_slc_mode_slc_vpn_th, 2
+gc_slc_mode_slc_vpn_th:
 	.space	2
 	.section	.bss.gc_slc_mode_tlc_vpn_th,"aw",%nobits
 	.align	1
-	.set	.LANCHOR86,. + 0
+	.set	.LANCHOR94,. + 0
 	.type	gc_slc_mode_tlc_vpn_th, %object
 	.size	gc_slc_mode_tlc_vpn_th, 2
 gc_slc_mode_tlc_vpn_th:
 	.space	2
 	.section	.bss.gc_slc_mode_vpn_th,"aw",%nobits
 	.align	1
-	.set	.LANCHOR63,. + 0
+	.set	.LANCHOR70,. + 0
 	.type	gc_slc_mode_vpn_th, %object
 	.size	gc_slc_mode_vpn_th, 2
 gc_slc_mode_vpn_th:
 	.space	2
 	.section	.bss.gc_state,"aw",%nobits
-	.set	.LANCHOR153,. + 0
+	.set	.LANCHOR159,. + 0
 	.type	gc_state, %object
 	.size	gc_state, 1
 gc_state:
 	.space	1
 	.section	.bss.gc_tlc_mode_slc_vpn_th,"aw",%nobits
 	.align	1
-	.set	.LANCHOR96,. + 0
+	.set	.LANCHOR102,. + 0
 	.type	gc_tlc_mode_slc_vpn_th, %object
 	.size	gc_tlc_mode_slc_vpn_th, 2
 gc_tlc_mode_slc_vpn_th:
 	.space	2
 	.section	.bss.gc_tlc_mode_tlc_vpn_th,"aw",%nobits
 	.align	1
-	.set	.LANCHOR93,. + 0
+	.set	.LANCHOR100,. + 0
 	.type	gc_tlc_mode_tlc_vpn_th, %object
 	.size	gc_tlc_mode_tlc_vpn_th, 2
 gc_tlc_mode_tlc_vpn_th:
 	.space	2
 	.section	.bss.gc_valid_page_ppa,"aw",%nobits
 	.align	2
-	.set	.LANCHOR70,. + 0
+	.set	.LANCHOR77,. + 0
 	.type	gc_valid_page_ppa, %object
 	.size	gc_valid_page_ppa, 4
 gc_valid_page_ppa:
 	.space	4
 	.section	.bss.gc_xlc_data_index,"aw",%nobits
 	.align	1
-	.set	.LANCHOR85,. + 0
+	.set	.LANCHOR92,. + 0
 	.type	gc_xlc_data_index, %object
 	.size	gc_xlc_data_index, 2
 gc_xlc_data_index:
 	.space	2
 	.section	.bss.gc_xlc_search_index,"aw",%nobits
 	.align	1
-	.set	.LANCHOR89,. + 0
+	.set	.LANCHOR96,. + 0
 	.type	gc_xlc_search_index, %object
 	.size	gc_xlc_search_index, 2
 gc_xlc_search_index:
@@ -28413,7 +30705,7 @@ gp_blk_info:
 	.space	4
 	.section	.bss.gp_data_slc_cache_head,"aw",%nobits
 	.align	2
-	.set	.LANCHOR83,. + 0
+	.set	.LANCHOR89,. + 0
 	.type	gp_data_slc_cache_head, %object
 	.size	gp_data_slc_cache_head, 4
 gp_data_slc_cache_head:
@@ -28427,14 +30719,14 @@ gp_data_slc_data_head:
 	.space	4
 	.section	.bss.gp_data_xlc_data_head,"aw",%nobits
 	.align	2
-	.set	.LANCHOR82,. + 0
+	.set	.LANCHOR88,. + 0
 	.type	gp_data_xlc_data_head, %object
 	.size	gp_data_xlc_data_head, 4
 gp_data_xlc_data_head:
 	.space	4
 	.section	.bss.gp_flash_check_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR139,. + 0
+	.set	.LANCHOR144,. + 0
 	.type	gp_flash_check_buf, %object
 	.size	gp_flash_check_buf, 4
 gp_flash_check_buf:
@@ -28448,21 +30740,21 @@ gp_flash_info:
 	.space	4
 	.section	.bss.gp_free_mix_head,"aw",%nobits
 	.align	2
-	.set	.LANCHOR102,. + 0
+	.set	.LANCHOR108,. + 0
 	.type	gp_free_mix_head, %object
 	.size	gp_free_mix_head, 4
 gp_free_mix_head:
 	.space	4
 	.section	.bss.gp_free_slc_head,"aw",%nobits
 	.align	2
-	.set	.LANCHOR98,. + 0
+	.set	.LANCHOR104,. + 0
 	.type	gp_free_slc_head, %object
 	.size	gp_free_slc_head, 4
 gp_free_slc_head:
 	.space	4
 	.section	.bss.gp_free_xlc_head,"aw",%nobits
 	.align	2
-	.set	.LANCHOR100,. + 0
+	.set	.LANCHOR106,. + 0
 	.type	gp_free_xlc_head, %object
 	.size	gp_free_xlc_head, 4
 gp_free_xlc_head:
@@ -28476,7 +30768,7 @@ gp_ftl_ext_info:
 	.space	4
 	.section	.bss.gp_ftl_info,"aw",%nobits
 	.align	2
-	.set	.LANCHOR104,. + 0
+	.set	.LANCHOR110,. + 0
 	.type	gp_ftl_info, %object
 	.size	gp_ftl_info, 4
 gp_ftl_info:
@@ -28504,28 +30796,41 @@ gp_sblk_list_tbl:
 	.space	4
 	.section	.bss.idb_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR137,. + 0
+	.set	.LANCHOR141,. + 0
 	.type	idb_buf, %object
 	.size	idb_buf, 4
 idb_buf:
+	.space	4
+	.section	.bss.idb_last_lba,"aw",%nobits
+	.align	2
+	.set	.LANCHOR177,. + 0
+	.type	idb_last_lba, %object
+	.size	idb_last_lba, 4
+idb_last_lba:
 	.space	4
 	.section	.bss.idb_need_write_back,"aw",%nobits
 	.align	2
-	.set	.LANCHOR138,. + 0
+	.set	.LANCHOR142,. + 0
 	.type	idb_need_write_back, %object
 	.size	idb_need_write_back, 4
 idb_need_write_back:
 	.space	4
+	.section	.bss.idb_write_enable,"aw",%nobits
+	.set	.LANCHOR143,. + 0
+	.type	idb_write_enable, %object
+	.size	idb_write_enable, 1
+idb_write_enable:
+	.space	1
 	.section	.bss.lpa_hash,"aw",%nobits
 	.align	1
-	.set	.LANCHOR110,. + 0
+	.set	.LANCHOR116,. + 0
 	.type	lpa_hash, %object
 	.size	lpa_hash, 512
 lpa_hash:
 	.space	512
 	.section	.bss.lpa_hash_index,"aw",%nobits
 	.align	2
-	.set	.LANCHOR112,. + 0
+	.set	.LANCHOR118,. + 0
 	.type	lpa_hash_index, %object
 	.size	lpa_hash_index, 4
 lpa_hash_index:
@@ -28536,19 +30841,19 @@ lpa_hash_index:
 nandc_ecc_sts:
 	.space	16
 	.section	.bss.nandc_hw_seed,"aw",%nobits
-	.set	.LANCHOR47,. + 0
+	.set	.LANCHOR51,. + 0
 	.type	nandc_hw_seed, %object
 	.size	nandc_hw_seed, 1
 nandc_hw_seed:
 	.space	1
 	.section	.bss.nandc_randomizer_en,"aw",%nobits
-	.set	.LANCHOR48,. + 0
+	.set	.LANCHOR52,. + 0
 	.type	nandc_randomizer_en, %object
 	.size	nandc_randomizer_en, 1
 nandc_randomizer_en:
 	.space	1
 	.section	.bss.p_free_buf_head,"aw",%nobits
-	.set	.LANCHOR53,. + 0
+	.set	.LANCHOR57,. + 0
 	.type	p_free_buf_head, %object
 	.size	p_free_buf_head, 1
 p_free_buf_head:
@@ -28560,142 +30865,142 @@ p_free_buf_head:
 p_read_ahead_ext_buf:
 	.space	4
 	.section	.bss.pm_first_write,"aw",%nobits
-	.set	.LANCHOR192,. + 0
+	.set	.LANCHOR208,. + 0
 	.type	pm_first_write, %object
 	.size	pm_first_write, 1
 pm_first_write:
 	.space	1
 	.section	.bss.pm_force_gc,"aw",%nobits
 	.align	2
-	.set	.LANCHOR146,. + 0
+	.set	.LANCHOR151,. + 0
 	.type	pm_force_gc, %object
 	.size	pm_force_gc, 4
 pm_force_gc:
 	.space	4
 	.section	.bss.pm_gc_enable,"aw",%nobits
 	.align	2
-	.set	.LANCHOR132,. + 0
+	.set	.LANCHOR136,. + 0
 	.type	pm_gc_enable, %object
 	.size	pm_gc_enable, 4
 pm_gc_enable:
 	.space	4
 	.section	.bss.pm_last_load_ram_id,"aw",%nobits
-	.set	.LANCHOR210,. + 0
+	.set	.LANCHOR223,. + 0
 	.type	pm_last_load_ram_id, %object
 	.size	pm_last_load_ram_id, 1
 pm_last_load_ram_id:
 	.space	1
 	.section	.bss.pm_last_update_ram_id,"aw",%nobits
-	.set	.LANCHOR135,. + 0
+	.set	.LANCHOR139,. + 0
 	.type	pm_last_update_ram_id, %object
 	.size	pm_last_update_ram_id, 1
 pm_last_update_ram_id:
 	.space	1
 	.section	.bss.pm_ram_info,"aw",%nobits
 	.align	2
-	.set	.LANCHOR134,. + 0
+	.set	.LANCHOR138,. + 0
 	.type	pm_ram_info, %object
 	.size	pm_ram_info, 256
 pm_ram_info:
 	.space	256
 	.section	.bss.read_ahead_lpa,"aw",%nobits
 	.align	2
-	.set	.LANCHOR211,. + 0
+	.set	.LANCHOR238,. + 0
 	.type	read_ahead_lpa, %object
 	.size	read_ahead_lpa, 4
 read_ahead_lpa:
 	.space	4
 	.section	.bss.read_buf_count,"aw",%nobits
-	.set	.LANCHOR129,. + 0
+	.set	.LANCHOR134,. + 0
 	.type	read_buf_count, %object
 	.size	read_buf_count, 1
 read_buf_count:
 	.space	1
 	.section	.bss.read_buf_head,"aw",%nobits
-	.set	.LANCHOR128,. + 0
+	.set	.LANCHOR133,. + 0
 	.type	read_buf_head, %object
 	.size	read_buf_head, 1
 read_buf_head:
 	.space	1
 	.section	.bss.sblk_gc_write_completed_queue_head,"aw",%nobits
-	.set	.LANCHOR71,. + 0
+	.set	.LANCHOR64,. + 0
 	.type	sblk_gc_write_completed_queue_head, %object
 	.size	sblk_gc_write_completed_queue_head, 1
 sblk_gc_write_completed_queue_head:
 	.space	1
 	.section	.bss.sblk_queue_head,"aw",%nobits
-	.set	.LANCHOR56,. + 0
+	.set	.LANCHOR60,. + 0
 	.type	sblk_queue_head, %object
 	.size	sblk_queue_head, 1
 sblk_queue_head:
 	.space	1
 	.section	.bss.sblk_read_completed_queue_head,"aw",%nobits
-	.set	.LANCHOR131,. + 0
+	.set	.LANCHOR63,. + 0
 	.type	sblk_read_completed_queue_head, %object
 	.size	sblk_read_completed_queue_head, 1
 sblk_read_completed_queue_head:
 	.space	1
 	.section	.bss.sblk_write_completed_queue_head,"aw",%nobits
-	.set	.LANCHOR126,. + 0
+	.set	.LANCHOR65,. + 0
 	.type	sblk_write_completed_queue_head, %object
 	.size	sblk_write_completed_queue_head, 1
 sblk_write_completed_queue_head:
 	.space	1
 	.section	.bss.slc_cache_sblk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR90,. + 0
+	.set	.LANCHOR99,. + 0
 	.type	slc_cache_sblk, %object
 	.size	slc_cache_sblk, 2
 slc_cache_sblk:
 	.space	2
 	.section	.bss.slc_data_sblk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR92,. + 0
+	.set	.LANCHOR97,. + 0
 	.type	slc_data_sblk, %object
 	.size	slc_data_sblk, 2
 slc_data_sblk:
 	.space	2
 	.section	.bss.write_buf_count,"aw",%nobits
-	.set	.LANCHOR60,. + 0
+	.set	.LANCHOR67,. + 0
 	.type	write_buf_count, %object
 	.size	write_buf_count, 1
 write_buf_count:
 	.space	1
 	.section	.bss.write_buf_head,"aw",%nobits
-	.set	.LANCHOR59,. + 0
+	.set	.LANCHOR66,. + 0
 	.type	write_buf_head, %object
 	.size	write_buf_head, 1
 write_buf_head:
 	.space	1
 	.section	.bss.write_commit_count,"aw",%nobits
-	.set	.LANCHOR123,. + 0
+	.set	.LANCHOR129,. + 0
 	.type	write_commit_count, %object
 	.size	write_commit_count, 1
 write_commit_count:
 	.space	1
 	.section	.bss.write_commit_head,"aw",%nobits
-	.set	.LANCHOR177,. + 0
+	.set	.LANCHOR185,. + 0
 	.type	write_commit_head, %object
 	.size	write_commit_head, 1
 write_commit_head:
 	.space	1
 	.section	.bss.xlc_data_sblk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR94,. + 0
+	.set	.LANCHOR93,. + 0
 	.type	xlc_data_sblk, %object
 	.size	xlc_data_sblk, 2
 xlc_data_sblk:
 	.space	2
 	.section	.bss.zftl_print_list_count,"aw",%nobits
 	.align	1
-	.set	.LANCHOR103,. + 0
+	.set	.LANCHOR109,. + 0
 	.type	zftl_print_list_count, %object
 	.size	zftl_print_list_count, 2
 zftl_print_list_count:
 	.space	2
 	.section	.data.g_nand_para_info,"aw",%progbits
 	.align	1
-	.set	.LANCHOR32,. + 0
+	.set	.LANCHOR33,. + 0
 	.type	g_nand_para_info, %object
 	.size	g_nand_para_info, 32
 g_nand_para_info:
@@ -28728,7 +31033,7 @@ g_nand_para_info:
 	.byte	0
 	.byte	0
 	.section	.data.hy_f26_ref_value,"aw",%progbits
-	.set	.LANCHOR158,. + 0
+	.set	.LANCHOR165,. + 0
 	.type	hy_f26_ref_value, %object
 	.size	hy_f26_ref_value, 28
 hy_f26_ref_value:
@@ -28761,7 +31066,7 @@ hy_f26_ref_value:
 	.byte	-32
 	.byte	-37
 	.section	.data.nand_opt_para,"aw",%progbits
-	.set	.LANCHOR202,. + 0
+	.set	.LANCHOR215,. + 0
 	.type	nand_opt_para, %object
 	.size	nand_opt_para, 128
 nand_opt_para:
@@ -28842,7 +31147,7 @@ nand_opt_para:
 	.byte	0
 	.space	14
 	.section	.data.sd15_slc_rr,"aw",%progbits
-	.set	.LANCHOR39,. + 0
+	.set	.LANCHOR41,. + 0
 	.type	sd15_slc_rr, %object
 	.size	sd15_slc_rr, 25
 sd15_slc_rr:
@@ -28872,7 +31177,7 @@ sd15_slc_rr:
 	.byte	104
 	.byte	112
 	.section	.data.sd15_tlc_rr,"aw",%progbits
-	.set	.LANCHOR38,. + 0
+	.set	.LANCHOR40,. + 0
 	.type	sd15_tlc_rr, %object
 	.size	sd15_tlc_rr, 329
 sd15_tlc_rr:
@@ -29207,7 +31512,7 @@ sd15_tlc_rr:
 	.byte	0
 	.section	.data.tlc_b05a_prog_tbl,"aw",%progbits
 	.align	1
-	.set	.LANCHOR224,. + 0
+	.set	.LANCHOR235,. + 0
 	.type	tlc_b05a_prog_tbl, %object
 	.size	tlc_b05a_prog_tbl, 1536
 tlc_b05a_prog_tbl:
@@ -29981,7 +32286,7 @@ tlc_b05a_prog_tbl:
 	.short	0
 	.section	.data.tlc_prog_order,"aw",%progbits
 	.align	1
-	.set	.LANCHOR225,. + 0
+	.set	.LANCHOR236,. + 0
 	.type	tlc_prog_order, %object
 	.size	tlc_prog_order, 768
 tlc_prog_order:
@@ -30378,9 +32683,9 @@ zftl_debug:
 	.word	17476
 	.section	.data.zftl_nand_flash_para_tbl,"aw",%progbits
 	.align	1
-	.set	.LANCHOR201,. + 0
+	.set	.LANCHOR214,. + 0
 	.type	zftl_nand_flash_para_tbl, %object
-	.size	zftl_nand_flash_para_tbl, 1408
+	.size	zftl_nand_flash_para_tbl, 1568
 zftl_nand_flash_para_tbl:
 	.byte	6
 	.byte	-104
@@ -30691,6 +32996,34 @@ zftl_nand_flash_para_tbl:
 	.byte	0
 	.byte	0
 	.byte	6
+	.byte	-104
+	.byte	-34
+	.byte	-108
+	.byte	-109
+	.byte	118
+	.byte	-47
+	.byte	1
+	.byte	1
+	.byte	32
+	.short	256
+	.byte	2
+	.byte	2
+	.short	1074
+	.short	17881
+	.byte	2
+	.byte	35
+	.byte	40
+	.byte	32
+	.byte	3
+	.byte	1
+	.byte	4
+	.byte	0
+	.short	256
+	.byte	1
+	.byte	-94
+	.byte	0
+	.byte	0
+	.byte	6
 	.byte	69
 	.byte	58
 	.byte	-108
@@ -30941,7 +33274,7 @@ zftl_nand_flash_para_tbl:
 	.byte	0
 	.byte	0
 	.byte	0
-	.byte	0
+	.byte	1
 	.byte	5
 	.byte	44
 	.byte	100
@@ -31050,7 +33383,7 @@ zftl_nand_flash_para_tbl:
 	.byte	4
 	.byte	0
 	.short	512
-	.byte	2
+	.byte	1
 	.byte	-38
 	.byte	-33
 	.byte	0
@@ -31106,7 +33439,7 @@ zftl_nand_flash_para_tbl:
 	.byte	4
 	.byte	0
 	.short	512
-	.byte	2
+	.byte	1
 	.byte	-38
 	.byte	-33
 	.byte	0
@@ -31134,7 +33467,7 @@ zftl_nand_flash_para_tbl:
 	.byte	4
 	.byte	0
 	.short	512
-	.byte	2
+	.byte	1
 	.byte	-38
 	.byte	-33
 	.byte	0
@@ -31162,7 +33495,7 @@ zftl_nand_flash_para_tbl:
 	.byte	4
 	.byte	0
 	.short	512
-	.byte	2
+	.byte	1
 	.byte	-38
 	.byte	-33
 	.byte	0
@@ -31246,38 +33579,94 @@ zftl_nand_flash_para_tbl:
 	.byte	1
 	.byte	0
 	.short	1024
-	.byte	3
-	.byte	0
+	.byte	3
+	.byte	0
+	.byte	0
+	.byte	2
+	.byte	6
+	.byte	44
+	.byte	-92
+	.byte	8
+	.byte	50
+	.byte	-95
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	32
+	.short	2304
+	.byte	3
+	.byte	1
+	.short	1008
+	.short	3521
+	.byte	0
+	.byte	19
+	.byte	70
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.short	4096
+	.byte	3
+	.byte	0
+	.byte	0
+	.byte	4
+	.byte	6
+	.byte	44
+	.byte	-92
+	.byte	100
+	.byte	50
+	.byte	-86
+	.byte	4
+	.byte	4
+	.byte	1
+	.byte	32
+	.short	1024
+	.byte	2
+	.byte	1
+	.short	2192
+	.short	9671
+	.byte	10
+	.byte	19
+	.byte	70
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.short	1024
+	.byte	1
+	.byte	-38
+	.byte	-33
 	.byte	0
-	.byte	2
 	.byte	6
-	.byte	44
-	.byte	-92
-	.byte	8
-	.byte	50
-	.byte	-95
+	.byte	-101
+	.byte	-61
+	.byte	72
+	.byte	37
+	.byte	16
 	.byte	0
-	.byte	4
+	.byte	9
 	.byte	1
 	.byte	32
-	.short	2304
+	.short	1152
 	.byte	3
-	.byte	1
-	.short	1008
-	.short	3521
-	.byte	0
-	.byte	19
+	.byte	2
+	.short	1006
+	.short	-27169
+	.byte	13
+	.byte	81
 	.byte	70
 	.byte	32
 	.byte	1
 	.byte	0
-	.byte	1
-	.byte	0
-	.short	4096
-	.byte	3
-	.byte	0
-	.byte	0
 	.byte	4
+	.byte	0
+	.short	2048
+	.byte	1
+	.byte	-38
+	.byte	-33
+	.byte	24
 	.byte	6
 	.byte	-83
 	.byte	-34
@@ -31299,7 +33688,7 @@ zftl_nand_flash_para_tbl:
 	.byte	32
 	.byte	3
 	.byte	1
-	.byte	4
+	.byte	3
 	.byte	0
 	.short	256
 	.byte	2
@@ -31467,13 +33856,13 @@ zftl_nand_flash_para_tbl:
 	.byte	32
 	.byte	3
 	.byte	1
-	.byte	4
+	.byte	3
 	.byte	0
 	.short	512
-	.byte	2
+	.byte	0
 	.byte	-65
 	.byte	-66
-	.byte	0
+	.byte	1
 	.byte	5
 	.byte	-119
 	.byte	100
@@ -31588,6 +33977,34 @@ zftl_nand_flash_para_tbl:
 	.byte	0
 	.byte	6
 	.byte	-119
+	.byte	-120
+	.byte	4
+	.byte	75
+	.byte	-87
+	.byte	0
+	.byte	7
+	.byte	1
+	.byte	16
+	.short	256
+	.byte	2
+	.byte	4
+	.short	1024
+	.short	449
+	.byte	1
+	.byte	0
+	.byte	24
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.short	256
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	6
+	.byte	-119
 	.byte	-92
 	.byte	8
 	.byte	50
@@ -31614,766 +34031,811 @@ zftl_nand_flash_para_tbl:
 	.byte	0
 	.byte	0
 	.byte	4
-	.section	.rodata.__func__.10144,"a",%progbits
-	.set	.LANCHOR141,. + 0
-	.type	__func__.10144, %object
-	.size	__func__.10144, 20
-__func__.10144:
+	.byte	6
+	.byte	-20
+	.byte	-34
+	.byte	-108
+	.byte	-61
+	.byte	-92
+	.byte	-54
+	.byte	0
+	.byte	1
+	.byte	32
+	.short	792
+	.byte	2
+	.byte	1
+	.short	688
+	.short	1217
+	.byte	11
+	.byte	50
+	.byte	40
+	.byte	32
+	.byte	3
+	.byte	1
+	.byte	1
+	.byte	0
+	.short	1024
+	.byte	1
+	.byte	-38
+	.byte	-33
+	.byte	0
+	.section	.rodata.__func__.10010,"a",%progbits
+	.set	.LANCHOR47,. + 0
+	.type	__func__.10010, %object
+	.size	__func__.10010, 23
+__func__.10010:
+	.ascii	"flash_start_plane_read\000"
+	.section	.rodata.__func__.10023,"a",%progbits
+	.set	.LANCHOR182,. + 0
+	.type	__func__.10023, %object
+	.size	__func__.10023, 25
+__func__.10023:
+	.ascii	"flash_complete_page_read\000"
+	.section	.rodata.__func__.10438,"a",%progbits
+	.set	.LANCHOR146,. + 0
+	.type	__func__.10438, %object
+	.size	__func__.10438, 20
+__func__.10438:
 	.ascii	"flash_die_info_init\000"
-	.section	.rodata.__func__.10154,"a",%progbits
+	.section	.rodata.__func__.10448,"a",%progbits
 	.set	.LANCHOR15,. + 0
-	.type	__func__.10154, %object
-	.size	__func__.10154, 22
-__func__.10154:
+	.type	__func__.10448, %object
+	.size	__func__.10448, 22
+__func__.10448:
 	.ascii	"nand_flash_print_info\000"
-	.section	.rodata.__func__.10199,"a",%progbits
-	.set	.LANCHOR200,. + 0
-	.type	__func__.10199, %object
-	.size	__func__.10199, 16
-__func__.10199:
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 	.ascii	"pm_alloc_new_blk\000"
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-	.set	.LANCHOR190,. + 0
-	.type	__func__.12154, %object
-	.size	__func__.12154, 14
-__func__.12154:
+	.section	.rodata.__func__.12461,"a",%progbits
+	.set	.LANCHOR206,. + 0
+	.type	__func__.12461, %object
+	.size	__func__.12461, 14
+__func__.12461:
 	.ascii	"pm_write_page\000"
-	.section	.rodata.__func__.12172,"a",%progbits
-	.set	.LANCHOR136,. + 0
-	.type	__func__.12172, %object
-	.size	__func__.12172, 21
-__func__.12172:
+	.section	.rodata.__func__.12479,"a",%progbits
+	.set	.LANCHOR140,. + 0
+	.type	__func__.12479, %object
+	.size	__func__.12479, 21
+__func__.12479:
 	.ascii	"pm_select_ram_region\000"
-	.section	.rodata.__func__.9620,"a",%progbits
-	.set	.LANCHOR164,. + 0
-	.type	__func__.9620, %object
-	.size	__func__.9620, 19
-__func__.9620:
+	.section	.rodata.__func__.9819,"a",%progbits
+	.set	.LANCHOR173,. + 0
+	.type	__func__.9819, %object
+	.size	__func__.9819, 19
+__func__.9819:
 	.ascii	"flash_read_page_en\000"
-	.section	.rodata.__func__.9662,"a",%progbits
-	.set	.LANCHOR178,. + 0
-	.type	__func__.9662, %object
-	.size	__func__.9662, 19
-__func__.9662:
+	.section	.rodata.__func__.9880,"a",%progbits
+	.set	.LANCHOR189,. + 0
+	.type	__func__.9880, %object
+	.size	__func__.9880, 19
+__func__.9880:
 	.ascii	"flash_prog_page_en\000"
-	.section	.rodata.__func__.9678,"a",%progbits
-	.set	.LANCHOR40,. + 0
-	.type	__func__.9678, %object
-	.size	__func__.9678, 26
-__func__.9678:
+	.section	.rodata.__func__.9896,"a",%progbits
+	.set	.LANCHOR44,. + 0
+	.type	__func__.9896, %object
+	.size	__func__.9896, 26
+__func__.9896:
 	.ascii	"flash_erase_duplane_block\000"
-	.section	.rodata.__func__.9689,"a",%progbits
-	.set	.LANCHOR42,. + 0
-	.type	__func__.9689, %object
-	.size	__func__.9689, 21
-__func__.9689:
+	.section	.rodata.__func__.9907,"a",%progbits
+	.set	.LANCHOR46,. + 0
+	.type	__func__.9907, %object
+	.size	__func__.9907, 21
+__func__.9907:
 	.ascii	"flash_erase_block_en\000"
-	.section	.rodata.__func__.9703,"a",%progbits
+	.section	.rodata.__func__.9921,"a",%progbits
 	.set	.LANCHOR29,. + 0
-	.type	__func__.9703, %object
-	.size	__func__.9703, 28
-__func__.9703:
+	.type	__func__.9921, %object
+	.size	__func__.9921, 28
+__func__.9921:
 	.ascii	"flash_wait_device_ready_raw\000"
-	.section	.rodata.__func__.9727,"a",%progbits
-	.set	.LANCHOR173,. + 0
-	.type	__func__.9727, %object
-	.size	__func__.9727, 26
-__func__.9727:
+	.section	.rodata.__func__.9945,"a",%progbits
+	.set	.LANCHOR178,. + 0
+	.type	__func__.9945, %object
+	.size	__func__.9945, 26
+__func__.9945:
 	.ascii	"flash_start_tlc_page_prog\000"
-	.section	.rodata.__func__.9738,"a",%progbits
-	.set	.LANCHOR174,. + 0
-	.type	__func__.9738, %object
-	.size	__func__.9738, 29
-__func__.9738:
+	.section	.rodata.__func__.9956,"a",%progbits
+	.set	.LANCHOR179,. + 0
+	.type	__func__.9956, %object
+	.size	__func__.9956, 29
+__func__.9956:
 	.ascii	"flash_start_3d_mlc_page_prog\000"
-	.section	.rodata.__func__.9756,"a",%progbits
-	.set	.LANCHOR175,. + 0
-	.type	__func__.9756, %object
-	.size	__func__.9756, 22
-__func__.9756:
+	.section	.rodata.__func__.9974,"a",%progbits
+	.set	.LANCHOR180,. + 0
+	.type	__func__.9974, %object
+	.size	__func__.9974, 22
+__func__.9974:
 	.ascii	"flash_start_page_prog\000"
-	.section	.rodata.__func__.9767,"a",%progbits
-	.set	.LANCHOR34,. + 0
-	.type	__func__.9767, %object
-	.size	__func__.9767, 22
-__func__.9767:
+	.section	.rodata.__func__.9985,"a",%progbits
+	.set	.LANCHOR35,. + 0
+	.type	__func__.9985, %object
+	.size	__func__.9985, 22
+__func__.9985:
 	.ascii	"flash_start_page_read\000"
-	.section	.rodata.__func__.9780,"a",%progbits
-	.set	.LANCHOR168,. + 0
-	.type	__func__.9780, %object
-	.size	__func__.9780, 31
-__func__.9780:
+	.section	.rodata.__func__.9998,"a",%progbits
+	.set	.LANCHOR181,. + 0
+	.type	__func__.9998, %object
+	.size	__func__.9998, 31
+__func__.9998:
 	.ascii	"flash_complete_plane_page_read\000"
-	.section	.rodata.__func__.9792,"a",%progbits
-	.set	.LANCHOR43,. + 0
-	.type	__func__.9792, %object
-	.size	__func__.9792, 23
-__func__.9792:
-	.ascii	"flash_start_plane_read\000"
-	.section	.rodata.__func__.9805,"a",%progbits
-	.set	.LANCHOR169,. + 0
-	.type	__func__.9805, %object
-	.size	__func__.9805, 25
-__func__.9805:
-	.ascii	"flash_complete_page_read\000"
 	.section	.rodata._list_remove_node.str1.1,"aMS",%progbits,1
 .LC0:
 	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
+	.section	.rodata.dump_buf_info.str1.1,"aMS",%progbits,1
+.LC41:
+	.ascii	"sblk_queue_head = %d\012\000"
+.LC42:
+	.ascii	"sblk_read_completed_queue_head = %d\012\000"
+.LC43:
+	.ascii	"sblk_gc_write_completed_queue_head = %d\012\000"
+.LC44:
+	.ascii	"sblk_write_completed_queue_head = %d\012\000"
+.LC45:
+	.ascii	"p_free_buf_head = %d\012\000"
+.LC46:
+	.ascii	"free_buf_count = %d\012\000"
+.LC47:
+	.ascii	"buf = %d, next=%d, flag=%d gc_write_flag=%d, lun_st"
+	.ascii	"ate=%d, op_status = %d lpa=%x, ppa=%x\012\000"
 	.section	.rodata.dump_ftl_info.str1.1,"aMS",%progbits,1
-.LC178:
+.LC189:
 	.ascii	"free_buf_count: %d\012\000"
-.LC179:
+.LC190:
 	.ascii	"g_ftl_info_blk blk:0x%x, index:0x%x, page:0x%x\012\000"
-.LC180:
+.LC191:
 	.ascii	"ftl_ext_info_blk blk:0x%x, page:0x%x\012\000"
-.LC181:
+.LC192:
 	.ascii	"ac_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page"
 	.ascii	"_index:0x%x\012\000"
-.LC182:
+.LC193:
 	.ascii	"tmp_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, pag"
 	.ascii	"e_index:0x%x\012\000"
-.LC183:
+.LC194:
 	.ascii	"gc_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page"
 	.ascii	"_index:0x%x\012\000"
-.LC184:
+.LC195:
 	.ascii	"lpa:\000"
-.LC185:
+.LC196:
 	.ascii	"vpn:\000"
-.LC186:
+.LC197:
 	.ascii	"sblk:\000"
-.LC187:
+.LC198:
 	.ascii	"lpa_hash:\000"
-.LC188:
+.LC199:
 	.ascii	"lpa_hash_index:\000"
 	.section	.rodata.dump_pm_blk.str1.1,"aMS",%progbits,1
-.LC248:
+.LC254:
 	.ascii	"pm l2p:\000"
-.LC249:
+.LC255:
 	.ascii	"pm blk:\000"
 	.section	.rodata.dump_sblk_queue.str1.1,"aMS",%progbits,1
-.LC75:
+.LC80:
 	.ascii	"dump_sblk_queue: %d\012\000"
-.LC76:
+.LC81:
 	.ascii	"buf id= %d state = %d ppa = %x\012\000"
 	.section	.rodata.flash_complete_page_read.str1.1,"aMS",%progbits,1
-.LC124:
+.LC139:
 	.ascii	"flash_complete_page_read %x %x error_ecc %d %d\012\000"
 	.section	.rodata.flash_ddr_tuning_read.str1.1,"aMS",%progbits,1
-.LC117:
+.LC125:
 	.ascii	"%d flash_ddr_tuning_read %x ecc=%d\012\000"
-.LC118:
+.LC126:
 	.ascii	"sync para %d\012\000"
-.LC119:
+.LC127:
 	.ascii	"DDR mode Read error %x %x\012\000"
-.LC120:
+.LC128:
 	.ascii	"SDR mode Read %x %x ecc:%x\012\000"
 	.section	.rodata.flash_erase_all.str1.1,"aMS",%progbits,1
-.LC36:
+.LC35:
 	.ascii	"erase done: %x\012\000"
 	.section	.rodata.flash_erase_block_en.str1.1,"aMS",%progbits,1
-.LC34:
+.LC33:
 	.ascii	"flash_erase_block %x %x %x\012\000"
-.LC35:
+.LC34:
 	.ascii	"flash_erase_block %d block = %x status = %x\012\000"
 	.section	.rodata.flash_erase_duplane_block.str1.1,"aMS",%progbits,1
-.LC32:
+.LC31:
 	.ascii	"flash_erase_duplane_block %x %x %x\012\000"
-.LC33:
+.LC32:
 	.ascii	"flash_erase_duplane_block pageadd = %x status = %x\012"
 	.ascii	"\000"
 	.section	.rodata.flash_get_last_written_page.str1.1,"aMS",%progbits,1
-.LC123:
+.LC131:
 	.ascii	"flash_get_last_written_page: %x %x %x\012\000"
 	.section	.rodata.flash_info_blk_init.str1.1,"aMS",%progbits,1
-.LC175:
+.LC174:
 	.ascii	"...%d @ %s %d %p\012\000"
-.LC176:
+.LC175:
 	.ascii	"no sys info %x\012\000"
 	.section	.rodata.flash_info_data_init.str1.1,"aMS",%progbits,1
-.LC92:
+.LC97:
 	.ascii	"...%d @ %s\012\000"
 	.section	.rodata.flash_info_flush.str1.1,"aMS",%progbits,1
-.LC172:
+.LC171:
 	.ascii	"finfo:\000"
-.LC173:
+.LC172:
 	.ascii	"flash_info_flush id = %x, page = %x\012\000"
-.LC174:
+.LC173:
 	.ascii	"sys_info_flush error:%x\012\000"
 	.section	.rodata.flash_mask_bad_block.str1.1,"aMS",%progbits,1
-.LC42:
+.LC48:
 	.ascii	"flash_mask_bad_block %d %d\012\000"
 	.section	.rodata.flash_prog_page.str1.1,"aMS",%progbits,1
-.LC130:
+.LC132:
 	.ascii	"flash_prog_page %x %x %x\012\000"
-.LC131:
+.LC133:
 	.ascii	"flash_prog_page page_addr = %x status = %x\012\000"
 	.section	.rodata.flash_prog_page_en.str1.1,"aMS",%progbits,1
-.LC138:
+.LC147:
 	.ascii	"flash_prog_page_en:%x %x %x\012\000"
-.LC139:
+.LC148:
 	.ascii	"w d:\000"
-.LC140:
+.LC149:
 	.ascii	"w s:\000"
-.LC141:
+.LC150:
 	.ascii	"spare\000"
-.LC142:
+.LC151:
 	.ascii	"data\000"
-.LC143:
+.LC152:
 	.ascii	"write error: %x\012\000"
 	.section	.rodata.flash_read_id.str1.1,"aMS",%progbits,1
-.LC39:
+.LC38:
 	.ascii	"No.%d FLASH ID:%x %x %x %x %x %x\012\000"
 	.section	.rodata.flash_read_otp_data.str1.1,"aMS",%progbits,1
-.LC40:
+.LC39:
 	.ascii	"otp:%x %x %x %x\012\000"
-	.section	.rodata.flash_read_page.str1.1,"aMS",%progbits,1
-.LC110:
-	.ascii	"flash_read_page %x %x %x\012\000"
 	.section	.rodata.flash_read_page_en.str1.1,"aMS",%progbits,1
-.LC121:
-	.ascii	"flash_read_page_en %x %x %x\012\000"
-.LC122:
+.LC129:
+	.ascii	"flash_read_page_en %x %x %x %x\012\000"
+.LC130:
 	.ascii	"flash_read_page_en %x %x error_ecc %d %d\012\000"
 	.section	.rodata.flash_set_interface_mode.str1.1,"aMS",%progbits,1
-.LC37:
+.LC36:
 	.ascii	"nand sdr mode %x\012\000"
-.LC38:
+.LC37:
 	.ascii	"nand ddr mode %x\012\000"
 	.section	.rodata.ftl_alloc_new_data_sblk.str1.1,"aMS",%progbits,1
-.LC236:
+.LC232:
 	.ascii	"error gc_add_sblk: %x\012\000"
 	.section	.rodata.ftl_alloc_sblk.str1.1,"aMS",%progbits,1
-.LC74:
+.LC79:
 	.ascii	"alloc sblk %x %d\012\000"
 	.section	.rodata.ftl_dump_write_open_sblk.str1.1,"aMS",%progbits,1
-.LC162:
+.LC166:
 	.ascii	"ftl_sblk_dump_write = %x %d %d %d %d\012\000"
-.LC163:
+.LC167:
 	.ascii	"blk= %x, page=%x, ppa = %x, status = %x, data:%x %x"
 	.ascii	" %x %x, spare: %x %x %x %x\012\000"
-.LC164:
+.LC168:
 	.ascii	"ftl_sblk_dump_write2 = %x %d %d %d\012\000"
-.LC165:
+.LC169:
 	.ascii	"ftl_sblk_dump_write = %x %x\012\000"
-.LC166:
+.LC170:
 	.ascii	"ftl_sblk_dump_write done = %x\012\000"
 	.section	.rodata.ftl_ext_info_init.str1.1,"aMS",%progbits,1
-.LC149:
+.LC159:
 	.ascii	"%s %d %d %x %x\012\000"
-.LC150:
+.LC160:
+	.ascii	"ext info hash %x error\012\000"
+.LC161:
 	.ascii	"%s %x %x %x\012\000"
 	.section	.rodata.ftl_free_sblk.str1.1,"aMS",%progbits,1
-.LC63:
+.LC68:
 	.ascii	"swl_slc_free_mini_ec_blk sblk %x\012\000"
 	.section	.rodata.ftl_info_blk_init.str1.1,"aMS",%progbits,1
-.LC146:
+.LC155:
 	.ascii	"%d %x @%d %x\012\000"
-.LC147:
+.LC156:
 	.ascii	"ftl_info_blk_init %d %d %x\012\000"
-.LC148:
+.LC157:
+	.ascii	"ftl info hash %x error\012\000"
+.LC158:
 	.ascii	"ink flag: %x\012\000"
 	.section	.rodata.ftl_info_flush.str1.1,"aMS",%progbits,1
-.LC145:
+.LC154:
 	.ascii	"g_ftl_info_blk blk = %x, page = %x version = %d\012"
 	.ascii	"\000"
-	.section	.rodata.ftl_ink_check_sblk.str1.1,"aMS",%progbits,1
-.LC167:
-	.ascii	"ftl_ink_check_sblk = %x %d %d\012\000"
-.LC168:
-	.ascii	"ftl_ink_check_sblk = %x %d %d end\012\000"
 	.section	.rodata.ftl_low_format.str1.1,"aMS",%progbits,1
-.LC169:
+.LC162:
 	.ascii	"ftl_low_format %d\012\000"
-.LC170:
+.LC163:
 	.ascii	"low format %d %d %d %d\012\000"
 	.section	.rodata.ftl_mask_bad_block.str1.1,"aMS",%progbits,1
-.LC61:
+.LC66:
 	.ascii	"mask bad block:cs %x %x block: %x %x\012\000"
 	.section	.rodata.ftl_open_sblk_recovery.str1.1,"aMS",%progbits,1
-.LC151:
+.LC177:
 	.ascii	"saved_active_page  = %x\012\000"
-.LC152:
+.LC178:
 	.ascii	"saved_active_plane = %x\012\000"
-.LC153:
+.LC179:
 	.ascii	"sblk = %x\012\000"
-.LC154:
+.LC180:
 	.ascii	"phy_blk = %x %x\012\000"
-.LC155:
+.LC181:
 	.ascii	"num_planes = %x\012\000"
-.LC156:
+.LC182:
+	.ascii	"recovery blk=%x, page=%x, ppa = %x, status = %x, ha"
+	.ascii	"sh:%x\012\000"
+.LC183:
+	.ascii	"data:\000"
+.LC184:
 	.ascii	"sblk = %x, vpn0 = %d, vpn1 = %d\012\000"
-.LC157:
+.LC185:
 	.ascii	"dump_write_lpa = %x %x %x %x\012\000"
-.LC158:
+.LC186:
 	.ascii	"dump write new ppa = %x, last ppa = %x lpa = %x\012"
 	.ascii	"\000"
-.LC159:
+.LC187:
 	.ascii	"dump write = %x %x %x\012\000"
-.LC160:
+.LC188:
 	.ascii	"dump write hash update = %x %x %x\012\000"
 	.section	.rodata.ftl_re_low_format.str1.1,"aMS",%progbits,1
-.LC171:
+.LC164:
 	.ascii	"re low format %d\012\000"
 	.section	.rodata.ftl_sblk_dump.str1.1,"aMS",%progbits,1
-.LC221:
+.LC220:
 	.ascii	"ftl_sblk_dump = %x %d %d %d %d\012\000"
-.LC222:
+.LC221:
 	.ascii	"ftl_sblk_dump = %x %x %x %x\012\000"
-.LC223:
+.LC222:
 	.ascii	"page_addr = %x, lpa=%x vpn = %d\012\000"
-.LC224:
+.LC223:
 	.ascii	"index= %x, lpa=%x\012\000"
-.LC225:
-	.ascii	"block = %x, vpn=%x check vpn = %d\012\000"
+.LC224:
+	.ascii	"block = %x, vpn=%x check vpn = %x\012\000"
 	.section	.rodata.ftl_sysblk_dump.str1.1,"aMS",%progbits,1
-.LC177:
+.LC176:
 	.ascii	"l2p:\000"
 	.section	.rodata.ftl_test_block.str1.1,"aMS",%progbits,1
-.LC144:
+.LC153:
 	.ascii	"low format %d\012\000"
 	.section	.rodata.ftl_update_l2p_map.str1.1,"aMS",%progbits,1
-.LC232:
+.LC228:
 	.ascii	"ftl_update_l2p_map: %x %x %x\012\000"
-.LC233:
+.LC229:
 	.ascii	"ftl_update_l2p_map\000"
-.LC234:
+.LC230:
 	.ascii	"lpa_tbl:\000"
-.LC235:
+.LC231:
 	.ascii	"sblk %x vpn: %d %d\012\000"
 	.section	.rodata.ftl_vpn_decrement.str1.1,"aMS",%progbits,1
-.LC60:
+.LC65:
 	.ascii	"ftl_vpn_decrement %x = %d, %d\012\000"
 	.section	.rodata.ftl_write_commit.str1.1,"aMS",%progbits,1
-.LC237:
+.LC233:
 	.ascii	"%d read error: ppa:%x, lpa:%x, status:%x\012\000"
 	.section	.rodata.ftl_write_completed.str1.1,"aMS",%progbits,1
-.LC72:
+.LC77:
 	.ascii	"ftl prog error =%x, lpa = %x, ppa= %x\012\000"
-.LC73:
+.LC78:
 	.ascii	"ftl re prog: lpa = %x, ppa= %x\012\000"
 	.section	.rodata.gc_add_sblk.str1.1,"aMS",%progbits,1
-.LC43:
+.LC49:
 	.ascii	"gc_add_sblk = %d, %d, %d, %d, %d, %d, %d\012\000"
-.LC44:
+.LC50:
 	.ascii	"gc_add_sblk = %d, %d, %d\012\000"
-.LC45:
+.LC51:
 	.ascii	"gc_add_sblk = %d, %d, %d,last update:%d, %d\012\000"
-.LC46:
+.LC52:
 	.ascii	"gc_add_sblk = %d, %d, %d, %d, %d, %d\012\000"
 	.section	.rodata.gc_check_data_one_wl.str1.1,"aMS",%progbits,1
-.LC229:
-	.ascii	"gc_lpa:\000"
-.LC230:
-	.ascii	"gc_ppa:\000"
-.LC231:
+.LC146:
 	.ascii	"err: ppa = %x, status = %x, %x %x spare: %x %x %x %"
 	.ascii	"x\012\000"
 	.section	.rodata.gc_do_copy_back.str1.1,"aMS",%progbits,1
-.LC238:
+.LC234:
 	.ascii	"gc page in buf: lpa %x ppa = %x pageindex= %x\012\000"
-.LC239:
+.LC235:
 	.ascii	"gc_do_copy_back: lpa %x des_ppa = %x %x gc_ppa= %x "
 	.ascii	"page_index= %d\012\000"
-.LC240:
-	.ascii	"gc_do_copy_back: %x %x %x %x gc_ppa:%x %x %x %d\012"
-	.ascii	"\000"
-.LC241:
-	.ascii	"%d prog_step: %x %x buf id= %x ppa = %x hash=%d id "
-	.ascii	"= %x plane = %x lpa=%x %x\012\000"
 	.section	.rodata.gc_free_bad_sblk.str1.1,"aMS",%progbits,1
-.LC62:
+.LC67:
 	.ascii	"gc_free_bad_sblk 0x%x\012\000"
 	.section	.rodata.gc_free_src_blk.str1.1,"aMS",%progbits,1
-.LC64:
+.LC69:
 	.ascii	"gc_free_src_blk = %x, vpn = %d\012\000"
-.LC65:
+.LC70:
 	.ascii	"gc_free_src_blk %x, %d\012\000"
 	.section	.rodata.gc_free_temp_buf.str1.1,"aMS",%progbits,1
-.LC50:
+.LC55:
 	.ascii	"%d gc_free_temp_buf buf id= %x\012\000"
 	.section	.rodata.gc_mark_bad_ppa.str1.1,"aMS",%progbits,1
-.LC47:
+.LC53:
 	.ascii	"gc_mark_bad_ppa %d %x %x\012\000"
 	.section	.rodata.gc_recovery.str1.1,"aMS",%progbits,1
-.LC199:
+.LC210:
 	.ascii	"ppa = %x, status = %x, data:%x %x %x %x, spare: %x "
 	.ascii	"%x %x %x\012\000"
-.LC200:
+.LC211:
 	.ascii	"ppa = %x, status = %x, %x %x spare: %x %x %x %x\012"
 	.ascii	"\000"
-.LC201:
+.LC212:
 	.ascii	"gc_recovery: %x vpn = %x\012\000"
 	.section	.rodata.gc_scan_src_blk.str1.1,"aMS",%progbits,1
-.LC219:
+.LC217:
 	.ascii	"gc_scan_src_blk = %x, vpn = %d\012\000"
-.LC220:
+.LC218:
+	.ascii	"js hash error:%x %x %x\012\000"
+.LC219:
 	.ascii	"gc_scan_src_blk = %x, s vpn0 = %d, c vpn1 = %d\012\000"
 	.section	.rodata.gc_search_src_blk.str1.1,"aMS",%progbits,1
-.LC52:
+.LC57:
 	.ascii	"zftl_get_gc_node cache = %x index = %d vpn = %x\012"
 	.ascii	"\000"
-.LC53:
+.LC58:
 	.ascii	"gc_search_src_blk mode = %x, src mode = %x, count= "
 	.ascii	"%d %d\012\000"
 	.section	.rodata.gc_static_wearleveling.str1.1,"aMS",%progbits,1
-.LC80:
+.LC85:
 	.ascii	"gc_static_wearleveling: min blk: %x,sec=%d,xec = %d"
 	.ascii	" ,mode=%d, func=%x, bbt=%x vpn = %d\012\000"
-.LC81:
+.LC86:
 	.ascii	"gc_static_wearleveling: min slc blk: %x,sec=%d,xec "
 	.ascii	"= %d ,mode=%d, func=%x, bbt=%x vpn = %d\012\000"
-.LC82:
+.LC87:
 	.ascii	"gc_static_wearleveling: min tlc blk: %x,sec=%d,xec "
 	.ascii	"= %d ,mode=%d, func=%x, bbt=%x vpn = %d\012\000"
-.LC83:
+.LC88:
 	.ascii	"gc_static_wearleveling: max slc blk: %x,sec=%d,xec "
 	.ascii	"= %d ,mode=%d, func=%x, bbt=%x vpn = %d\012\000"
-.LC84:
+.LC89:
 	.ascii	"gc_static_wearleveling: max xlc blk: %x,sec=%d,xec "
 	.ascii	"= %d ,mode=%d, func=%x, bbt=%x vpn = %d\012\000"
-.LC85:
+.LC90:
 	.ascii	"gc_static_wearleveling: slc blk: %x, tlc blk: %d av"
 	.ascii	"g slc ec: %d, avg tlc ec: %d \012\000"
-.LC86:
+.LC91:
 	.ascii	"gc_static_wearleveling: min slc ec: %x, min tlc ec:"
 	.ascii	" %d max slc ec: %d, max tlc ec: %d; %d %d\012\000"
-.LC87:
+.LC92:
 	.ascii	"swl add tlc gc = %x, %d, %d, %d, %d, %d\012\000"
-.LC88:
+.LC93:
 	.ascii	"swl add slc gc  = %x, %d, %d, %d, %d, %d\012\000"
 	.section	.rodata.gc_update_l2p_map_new.str1.1,"aMS",%progbits,1
-.LC215:
+.LC213:
 	.ascii	"gc_update_l2p_map_new sblk %x\012\000"
-.LC216:
+.LC214:
 	.ascii	"gc_update_l2p_map_new: %x %x %x\012\000"
-.LC217:
+.LC215:
 	.ascii	"lpa: %x %x %x\012\000"
-.LC218:
+.LC216:
 	.ascii	"gc_update_l2p_map_new: %x vpn = %x vpn1 = %x done\012"
 	.ascii	"\000"
 	.section	.rodata.gc_write_completed.str1.1,"aMS",%progbits,1
-.LC48:
+.LC54:
 	.ascii	"status: %x, ppa: %x\012\000"
-.LC49:
-	.ascii	"gc_write_completed: %x  %x  %d %x\012\000"
 	.section	.rodata.hynix_get_read_retry_default.str1.1,"aMS",%progbits,1
-.LC100:
+.LC105:
 	.ascii	"otp error! %d\000"
-.LC101:
+.LC106:
 	.ascii	"rr\000"
 	.section	.rodata.hynix_read_retrial.str1.1,"aMS",%progbits,1
-.LC116:
+.LC124:
 	.ascii	"hynix RR %d row=%x, count %d, status=%d\012\000"
 	.section	.rodata.idb_write_data.str1.1,"aMS",%progbits,1
-.LC132:
+.LC135:
 	.ascii	"1 write_idblock fix data %x %x %x\012\000"
-.LC133:
+.LC136:
 	.ascii	"write_idblock check fail! %x\012\000"
-.LC134:
+.LC137:
 	.ascii	"write_idblock fail! %x\012\000"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",%progbits,1
-.LC190:
+.LC201:
 	.ascii	"region_id = %d, pm_max_region = %d\012\000"
-.LC191:
+.LC202:
 	.ascii	"load_l2p_region no ppa = %x , %x, all setting 0xff."
 	.ascii	"...\012\000"
-.LC192:
+.LC203:
 	.ascii	"load_l2p_region = %x,%x,%x, %x\012\000"
-.LC193:
+.LC204:
 	.ascii	"pm_ppa:\000"
-.LC194:
-	.ascii	"data:\000"
-.LC195:
+.LC205:
 	.ascii	"spare:\000"
 	.section	.rodata.lpa_rebuild_hash.str1.1,"aMS",%progbits,1
-.LC79:
+.LC84:
 	.ascii	"%s %d %d\012\000"
 	.section	.rodata.micron_read_retrial.str1.1,"aMS",%progbits,1
-.LC111:
+.LC115:
 	.ascii	"MT %d row=%x,last status %d,status = %d\012\000"
-.LC112:
+.LC116:
 	.ascii	"MT RR %d row=%x,count %d,status=%d\012\000"
 	.section	.rodata.nand_flash_print_info.str1.1,"aMS",%progbits,1
 .LC1:
@@ -32403,130 +34865,130 @@ __func__.9805:
 .LC13:
 	.ascii	"idb ecc: %x\012\000"
 .LC14:
-	.ascii	"g_flash_slc_mode: %x\012\000"
-.LC15:
 	.ascii	"OptMode: %x\012\000"
-.LC16:
+.LC15:
 	.ascii	"g_nand_max_die: %x\012\000"
-.LC17:
+.LC16:
 	.ascii	"Cache read enable: %x\012\000"
-.LC18:
+.LC17:
 	.ascii	"Cache random read enable: %x\012\000"
-.LC19:
+.LC18:
 	.ascii	"Cache prog enable: %x\012\000"
-.LC20:
+.LC19:
 	.ascii	"multi read enable: %x\012\000"
-.LC21:
+.LC20:
 	.ascii	"multi prog enable: %x\012\000"
-.LC22:
+.LC21:
 	.ascii	"interleave enable: %x\012\000"
-.LC23:
+.LC22:
 	.ascii	"read retry enable: %x\012\000"
-.LC24:
+.LC23:
 	.ascii	"randomizer enable: %x\012\000"
-.LC25:
+.LC24:
 	.ascii	"SDR enable: %x\012\000"
-.LC26:
+.LC25:
 	.ascii	"ONFI enable: %x\012\000"
-.LC27:
+.LC26:
 	.ascii	"TOGGLE enable: %x\012\000"
-.LC28:
+.LC27:
 	.ascii	"g_flash_slc_mode: %x %x\012\000"
-.LC29:
+.LC28:
 	.ascii	"MultiPlaneProgCmd: %x %x\012\000"
-.LC30:
+.LC29:
 	.ascii	"MultiPlaneReadCmd: %x %x\012\000"
-.LC31:
+.LC30:
 	.ascii	"g_flash_toggle_mode_en: %x\012\000"
 	.section	.rodata.nandc_init.str1.1,"aMS",%progbits,1
-.LC93:
+.LC98:
 	.ascii	"...%s enter... %p\012\000"
-.LC94:
+.LC99:
 	.ascii	"0:%x %x %x %x %x\012\000"
-.LC95:
+.LC100:
 	.ascii	"g_nandc_ver...%d\012\000"
 	.section	.rodata.nandc_xfer.str1.1,"aMS",%progbits,1
-.LC107:
+.LC112:
 	.ascii	"dqs data abort %x\012\000"
-.LC108:
+.LC113:
 	.ascii	"dqs data timeout %x\012\000"
-.LC109:
+.LC114:
 	.ascii	"xfer error %x\012\000"
 	.section	.rodata.nandc_xfer_done.str1.1,"aMS",%progbits,1
-.LC102:
+.LC107:
 	.ascii	"flash_abort_clear = %d\012\000"
-.LC103:
+.LC108:
 	.ascii	"%d mtrans_cnt = %d page_num = %d\012\000"
-.LC104:
-	.ascii	"nandc:\000"
-.LC105:
+.LC109:
 	.ascii	"%d flReg.d32=%x %x\012\000"
-.LC106:
+.LC110:
+	.ascii	"nandc:\000"
+.LC111:
 	.ascii	"nandc_xfer_done read error %x\012\000"
 	.section	.rodata.pm_alloc_new_blk.str1.1,"aMS",%progbits,1
-.LC77:
+.LC82:
 	.ascii	"blk %x is bad block\012\000"
-.LC78:
+.LC83:
 	.ascii	"pm_alloc_new_blk: %x %x %x %x\012\000"
 	.section	.rodata.pm_free_sblk.str1.1,"aMS",%progbits,1
-.LC90:
+.LC95:
 	.ascii	"GC PM block %x %x %x %d\012\000"
-.LC91:
+.LC96:
 	.ascii	"ftl_free_no_use_map_blk %x %x %x %d\012\000"
 	.section	.rodata.pm_init.str1.1,"aMS",%progbits,1
-.LC196:
+.LC206:
 	.ascii	"pm_init posr %x %x %x\012\000"
-.LC197:
+.LC207:
 	.ascii	"pm_init recovery %x %x %x\012\000"
+.LC208:
+	.ascii	"pm_init hash %x error\012\000"
 	.section	.rodata.pm_log2phys.str1.1,"aMS",%progbits,1
-.LC198:
+.LC209:
 	.ascii	"pm_log2phys  lpn = %d, max lpn = %d\012\000"
 	.section	.rodata.pm_ppa_update_check.str1.1,"aMS",%progbits,1
-.LC189:
+.LC200:
 	.ascii	"%s w error lpn = %x, max ppa = %d\012\000"
 	.section	.rodata.pm_write_page.str1.1,"aMS",%progbits,1
-.LC161:
+.LC165:
 	.ascii	"pm_write_page write error: %x\012\000"
 	.section	.rodata.print_ftl_debug_info.str1.1,"aMS",%progbits,1
-.LC66:
+.LC71:
 	.ascii	"bad blk = %x, %x free blk: s:%x,t:%x,m:%x, data blk"
 	.ascii	":s:%x,%x,t%x vpn: s:%x t:%x, max_vpn: %x\012\000"
-.LC67:
+.LC72:
 	.ascii	"totle w: %d MB,r: %d MB %d dv:0x%X,poc:%d\012\000"
-.LC68:
+.LC73:
 	.ascii	"gc xlc page: %d,gc slc page: %d, tmp w: %d MB\012\000"
-.LC69:
+.LC74:
 	.ascii	"slc ec: %d,%d,%d,%d,%d,tlc ec: %d,%d,%d,%d,%d\012\000"
-.LC70:
+.LC75:
 	.ascii	"gc th: tlc_tlc: %d tlc_slc: %d slc_slc: %d slc_tlc:"
 	.ascii	"%d free_th: %d\012\000"
-.LC71:
+.LC76:
 	.ascii	"swl : %x %x %x %x %x %x\012\000"
 	.section	.rodata.print_gc_debug_info.str1.1,"aMS",%progbits,1
-.LC51:
+.LC56:
 	.ascii	"gc: b:%x,p:%x,i:%x; free buf=%d %d free slc th: %d\012"
 	.ascii	"\000"
 	.section	.rodata.print_list_info.str1.1,"aMS",%progbits,1
-.LC58:
+.LC63:
 	.ascii	"list count:%p %d\012\000"
-.LC59:
+.LC64:
 	.ascii	"%d: node:%x %x %x %x, %d %d %d %d %d\012\000"
 	.section	.rodata.queue_wait_first_req_completed.str1.1,"aMS",%progbits,1
-.LC125:
+.LC140:
 	.ascii	"read: %x %x %x %x\012\000"
-.LC126:
+.LC141:
 	.ascii	"0set buf %d,status = %x, ppa = %x lun state = %d\012"
 	.ascii	"\000"
-.LC127:
+.LC142:
 	.ascii	"prog end %x %x error_ecc %d %d\012\000"
-.LC128:
+.LC143:
 	.ascii	"1set buf %d,status = %x, ppa = %x lun state = %d\012"
 	.ascii	"\000"
-.LC129:
+.LC144:
 	.ascii	"dp prog end %x %x error_ecc %d %d\012\000"
 	.section	.rodata.random_seed,"a",%progbits
 	.align	1
-	.set	.LANCHOR51,. + 0
+	.set	.LANCHOR55,. + 0
 	.type	random_seed, %object
 	.size	random_seed, 256
 random_seed:
@@ -32659,30 +35121,173 @@ random_seed:
 	.short	17598
 	.short	28087
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",%progbits,1
-.LC214:
+.LC251:
 	.ascii	"zftl_init %x\012\000"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",%progbits,1
-.LC96:
-	.ascii	"%s 0x%x:\000"
-.LC97:
+.LC101:
+	.ascii	"%s %p + 0x%x:\000"
+.LC102:
 	.ascii	"%x \000"
-.LC98:
+.LC103:
 	.ascii	"\000"
-.LC99:
+.LC104:
 	.ascii	"%s\012\000"
+	.section	.rodata.samsung_14nm_mlc_rr,"a",%progbits
+	.set	.LANCHOR171,. + 0
+	.type	samsung_14nm_mlc_rr, %object
+	.size	samsung_14nm_mlc_rr, 104
+samsung_14nm_mlc_rr:
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	-4
+	.byte	3
+	.byte	-4
+	.byte	-6
+	.byte	6
+	.byte	0
+	.byte	6
+	.byte	-10
+	.byte	-10
+	.byte	4
+	.byte	-10
+	.byte	16
+	.byte	12
+	.byte	-4
+	.byte	12
+	.byte	8
+	.byte	-16
+	.byte	10
+	.byte	-16
+	.byte	24
+	.byte	18
+	.byte	-14
+	.byte	18
+	.byte	-4
+	.byte	-22
+	.byte	-16
+	.byte	-22
+	.byte	-8
+	.byte	24
+	.byte	-9
+	.byte	24
+	.byte	8
+	.byte	-28
+	.byte	-4
+	.byte	-28
+	.byte	16
+	.byte	30
+	.byte	10
+	.byte	30
+	.byte	10
+	.byte	-34
+	.byte	6
+	.byte	-34
+	.byte	0
+	.byte	36
+	.byte	-8
+	.byte	36
+	.byte	-8
+	.byte	-40
+	.byte	-2
+	.byte	-40
+	.byte	-20
+	.byte	-46
+	.byte	-4
+	.byte	-46
+	.byte	-30
+	.byte	3
+	.byte	0
+	.byte	3
+	.byte	-3
+	.byte	-2
+	.byte	-4
+	.byte	-2
+	.byte	-6
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-10
+	.byte	-6
+	.byte	-8
+	.byte	-6
+	.byte	-14
+	.byte	-9
+	.byte	-8
+	.byte	-9
+	.byte	-18
+	.byte	-52
+	.byte	22
+	.byte	-52
+	.byte	10
+	.byte	42
+	.byte	4
+	.byte	42
+	.byte	4
+	.byte	48
+	.byte	-9
+	.byte	48
+	.byte	4
+	.byte	-58
+	.byte	12
+	.byte	-58
+	.byte	0
+	.byte	-64
+	.byte	-24
+	.byte	-64
+	.byte	-6
+	.byte	9
+	.byte	18
+	.byte	9
+	.byte	8
+	.section	.rodata.samsung_14nm_slc_rr,"a",%progbits
+	.set	.LANCHOR170,. + 0
+	.type	samsung_14nm_slc_rr, %object
+	.size	samsung_14nm_slc_rr, 26
+samsung_14nm_slc_rr:
+	.byte	0
+	.byte	10
+	.byte	-10
+	.byte	20
+	.byte	-20
+	.byte	30
+	.byte	-30
+	.byte	40
+	.byte	-40
+	.byte	50
+	.byte	-50
+	.byte	60
+	.byte	-60
+	.byte	-70
+	.byte	-80
+	.byte	-90
+	.byte	-100
+	.byte	-110
+	.byte	-120
+	.byte	-9
+	.byte	70
+	.byte	80
+	.byte	90
+	.byte	-125
+	.byte	-115
+	.byte	100
+	.section	.rodata.samsung_read_retrial.str1.1,"aMS",%progbits,1
+.LC121:
+	.ascii	"samsung SRR %d row=%x, status=%d\012\000"
+.LC122:
+	.ascii	"samsung TRR %d row=%x, status=%d\012\000"
+.LC123:
+	.ascii	"samsung RR %d row=%x,count %d,status=%d\012\000"
 	.section	.rodata.sandisk_prog_test_bad_block.str1.1,"aMS",%progbits,1
-.LC41:
+.LC40:
 	.ascii	"bad block test:%x %x\012\000"
-	.section	.rodata.sblk_3d_tlc_dump_prog.str1.1,"aMS",%progbits,1
-.LC135:
-	.ascii	"sblk_3d_tlc_dump_prog wl_addr= %x ppa = %x ppa = %x"
-	.ascii	"\012\000"
 	.section	.rodata.sblk_mlc_dump_prog.str1.1,"aMS",%progbits,1
-.LC136:
+.LC138:
 	.ascii	"sblk_mlc_dump_prog wl_addr= %x ppa = %x ppa = %x\012"
 	.ascii	"\000"
 	.section	.rodata.sblk_prog_page.str1.1,"aMS",%progbits,1
-.LC137:
+.LC145:
 	.ascii	"sblk_prog_page ppa = %x, count = %d\012\000"
 	.section	.rodata.toshiba_15ref_value,"a",%progbits
 	.set	.LANCHOR24,. + 0
@@ -32692,182 +35297,664 @@ toshiba_15ref_value:
 	.byte	4
 	.byte	5
 	.byte	6
-	.byte	7
+	.byte	7
+	.byte	13
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	2
+	.byte	4
+	.byte	2
+	.byte	0
+	.byte	0
+	.byte	8
+	.byte	8
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	124
+	.byte	0
+	.byte	124
+	.byte	124
+	.byte	0
+	.byte	122
+	.byte	0
+	.byte	122
+	.byte	122
+	.byte	0
+	.byte	11
+	.byte	126
+	.byte	118
+	.byte	116
+	.byte	0
+	.byte	120
+	.byte	2
+	.byte	120
+	.byte	122
+	.byte	0
+	.byte	126
+	.byte	4
+	.byte	126
+	.byte	122
+	.byte	0
+	.byte	16
+	.byte	118
+	.byte	114
+	.byte	112
+	.byte	0
+	.byte	118
+	.byte	4
+	.byte	118
+	.byte	120
+	.byte	0
+	.byte	4
+	.byte	4
+	.byte	4
+	.byte	118
+	.byte	0
+	.byte	2
+	.byte	0
+	.byte	126
+	.byte	124
+	.byte	0
+	.byte	6
+	.byte	10
+	.byte	6
+	.byte	2
+	.byte	0
+	.byte	116
+	.byte	124
+	.byte	116
+	.byte	118
+	.byte	0
+	.byte	4
+	.byte	4
+	.byte	124
+	.byte	126
+	.byte	0
+	.byte	0
+	.byte	124
+	.byte	120
+	.byte	120
+	.byte	0
+	.byte	124
+	.byte	118
+	.byte	116
+	.byte	114
+	.byte	0
+	.section	.rodata.toshiba_3D_slc_value,"a",%progbits
+	.set	.LANCHOR39,. + 0
+	.type	toshiba_3D_slc_value, %object
+	.size	toshiba_3D_slc_value, 11
+toshiba_3D_slc_value:
+	.byte	-117
+	.byte	0
+	.byte	-8
+	.byte	8
+	.byte	-16
+	.byte	-24
+	.byte	24
+	.byte	-40
+	.byte	40
+	.byte	-56
+	.byte	56
+	.section	.rodata.toshiba_3D_tlc_value,"a",%progbits
+	.set	.LANCHOR38,. + 0
+	.type	toshiba_3D_tlc_value, %object
+	.size	toshiba_3D_tlc_value, 399
+toshiba_3D_tlc_value:
+	.byte	-119
+	.byte	-119
+	.byte	-119
+	.byte	-119
+	.byte	-118
+	.byte	-118
+	.byte	-118
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	5
+	.byte	-2
+	.byte	-1
+	.byte	0
+	.byte	-3
+	.byte	-2
+	.byte	6
+	.byte	-9
+	.byte	-12
+	.byte	-9
+	.byte	-7
+	.byte	-13
+	.byte	-12
+	.byte	-7
+	.byte	-6
+	.byte	-15
+	.byte	-15
+	.byte	-2
+	.byte	-12
+	.byte	-16
+	.byte	-6
+	.byte	-2
+	.byte	-19
+	.byte	-19
+	.byte	-6
+	.byte	-4
+	.byte	-12
+	.byte	-14
+	.byte	-2
+	.byte	-11
+	.byte	-23
+	.byte	-34
+	.byte	-4
+	.byte	-20
+	.byte	-22
+	.byte	-2
+	.byte	-7
+	.byte	-31
+	.byte	-30
+	.byte	-12
+	.byte	-20
+	.byte	-18
+	.byte	2
+	.byte	-15
+	.byte	-19
+	.byte	-36
+	.byte	-12
+	.byte	-28
+	.byte	-34
+	.byte	-6
+	.byte	-15
+	.byte	-11
+	.byte	2
+	.byte	-12
+	.byte	-8
+	.byte	-2
+	.byte	2
+	.byte	-3
+	.byte	-7
+	.byte	-10
+	.byte	-4
+	.byte	-8
+	.byte	-6
+	.byte	-6
+	.byte	-11
+	.byte	-27
+	.byte	-38
+	.byte	-16
+	.byte	-12
+	.byte	-2
+	.byte	2
+	.byte	-7
+	.byte	-31
+	.byte	-22
+	.byte	-4
+	.byte	-16
+	.byte	-22
+	.byte	-7
+	.byte	-31
+	.byte	-23
+	.byte	-22
+	.byte	-28
+	.byte	-28
+	.byte	-26
+	.byte	2
+	.byte	-7
+	.byte	-11
+	.byte	-14
+	.byte	-8
+	.byte	-12
+	.byte	-10
+	.byte	-10
+	.byte	-27
+	.byte	-25
+	.byte	-22
+	.byte	-20
+	.byte	-28
+	.byte	-22
+	.byte	-7
+	.byte	-23
+	.byte	-29
+	.byte	-34
+	.byte	-24
+	.byte	-32
+	.byte	-22
+	.byte	-10
+	.byte	-11
+	.byte	-29
+	.byte	-18
+	.byte	-12
+	.byte	-24
+	.byte	-22
+	.byte	6
+	.byte	1
+	.byte	-3
+	.byte	-6
+	.byte	0
+	.byte	-4
+	.byte	-2
+	.byte	10
+	.byte	-3
+	.byte	-7
+	.byte	-6
+	.byte	4
+	.byte	-4
+	.byte	-2
+	.byte	-10
+	.byte	-23
+	.byte	-39
+	.byte	-22
+	.byte	-19
+	.byte	-24
+	.byte	-18
+	.byte	-14
+	.byte	-23
+	.byte	-29
+	.byte	-30
+	.byte	-15
+	.byte	-30
+	.byte	-30
+	.byte	-7
+	.byte	-27
+	.byte	-35
+	.byte	-26
+	.byte	-15
+	.byte	-24
+	.byte	-26
+	.byte	6
+	.byte	-11
+	.byte	5
+	.byte	-2
+	.byte	-16
+	.byte	-16
+	.byte	-2
+	.byte	-2
+	.byte	-15
+	.byte	-15
+	.byte	-20
+	.byte	-8
+	.byte	-16
+	.byte	-18
+	.byte	6
+	.byte	5
+	.byte	-15
+	.byte	-2
+	.byte	-24
+	.byte	-28
+	.byte	-22
+	.byte	10
+	.byte	-15
+	.byte	-3
+	.byte	-30
+	.byte	-8
+	.byte	-24
+	.byte	-30
+	.byte	-10
+	.byte	-27
+	.byte	-19
+	.byte	-30
+	.byte	-12
+	.byte	-16
+	.byte	-10
+	.byte	14
+	.byte	-19
+	.byte	-3
+	.byte	-30
+	.byte	4
+	.byte	4
+	.byte	6
+	.byte	2
+	.byte	1
+	.byte	-3
+	.byte	-10
+	.byte	-8
+	.byte	-4
+	.byte	-6
+	.byte	-2
+	.byte	-15
+	.byte	-11
+	.byte	-26
+	.byte	-8
+	.byte	-20
+	.byte	-30
+	.byte	6
+	.byte	-19
+	.byte	-3
+	.byte	-46
+	.byte	0
+	.byte	0
+	.byte	2
+	.byte	6
+	.byte	9
+	.byte	5
+	.byte	2
+	.byte	4
+	.byte	8
+	.byte	6
+	.byte	8
+	.byte	9
+	.byte	9
+	.byte	6
+	.byte	8
+	.byte	8
+	.byte	6
+	.byte	10
 	.byte	13
+	.byte	9
+	.byte	6
+	.byte	8
+	.byte	12
+	.byte	10
+	.byte	2
+	.byte	5
+	.byte	1
+	.byte	-2
 	.byte	0
 	.byte	0
+	.byte	6
+	.byte	12
+	.byte	1
+	.byte	13
+	.byte	2
+	.byte	12
+	.byte	12
+	.byte	14
+	.byte	-12
+	.byte	-14
+	.byte	-20
+	.byte	-18
+	.byte	-16
+	.byte	-16
+	.byte	-14
+	.byte	-12
+	.byte	-10
+	.byte	-21
+	.byte	-14
+	.byte	-12
+	.byte	-12
+	.byte	-10
+	.byte	-12
+	.byte	-18
+	.byte	-22
+	.byte	-24
+	.byte	-18
+	.byte	-18
+	.byte	-18
+	.byte	-12
+	.byte	-14
+	.byte	-23
+	.byte	-20
+	.byte	-20
+	.byte	-20
+	.byte	-20
+	.byte	-12
+	.byte	-24
+	.byte	-24
+	.byte	-30
+	.byte	-24
+	.byte	-28
+	.byte	-28
+	.byte	-12
+	.byte	-26
+	.byte	-25
+	.byte	-34
+	.byte	-24
+	.byte	-24
+	.byte	-24
+	.byte	-12
+	.byte	-13
+	.byte	-26
+	.byte	-20
+	.byte	-14
+	.byte	-18
+	.byte	-18
+	.byte	-12
+	.byte	-15
+	.byte	-27
+	.byte	-22
+	.byte	-20
+	.byte	-24
+	.byte	-22
+	.byte	-12
+	.byte	-21
+	.byte	-28
+	.byte	-28
+	.byte	-24
+	.byte	-26
+	.byte	-24
+	.byte	20
+	.byte	16
+	.byte	6
+	.byte	10
+	.byte	16
+	.byte	12
+	.byte	12
+	.byte	16
+	.byte	16
+	.byte	8
+	.byte	8
+	.byte	12
+	.byte	12
+	.byte	12
+	.byte	18
+	.byte	18
+	.byte	10
+	.byte	8
+	.byte	14
+	.byte	14
+	.byte	14
+	.byte	16
+	.byte	14
+	.byte	6
+	.byte	6
+	.byte	12
+	.byte	14
+	.byte	8
+	.byte	20
+	.byte	18
+	.byte	8
+	.byte	6
+	.byte	14
+	.byte	14
+	.byte	10
+	.byte	20
+	.byte	20
+	.byte	6
+	.byte	10
+	.byte	10
+	.byte	12
+	.byte	12
+	.byte	10
+	.byte	13
+	.byte	5
+	.byte	2
+	.byte	14
+	.byte	8
+	.byte	6
+	.byte	6
+	.byte	13
+	.byte	9
+	.byte	4
+	.byte	14
+	.byte	10
+	.byte	10
+	.byte	10
+	.byte	13
+	.byte	9
+	.byte	6
+	.byte	8
+	.byte	12
+	.byte	10
+	.byte	2
+	.byte	5
+	.byte	1
+	.byte	-2
 	.byte	0
 	.byte	0
+	.byte	6
+	.byte	12
+	.byte	1
+	.byte	13
+	.byte	2
+	.byte	12
+	.byte	12
+	.byte	14
+	.section	.rodata.toshiba_3d_read_retrial.str1.1,"aMS",%progbits,1
+.LC117:
+	.ascii	"toshiba SRR %d row=%x, status=%d\012\000"
+.LC118:
+	.ascii	"toshiba TRR %d row=%x, status=%d\012\000"
+.LC119:
+	.ascii	"toshiba RR %d row=%x,count %d,status=%d\012\000"
+	.section	.rodata.toshiba_A19ref_value,"a",%progbits
+	.set	.LANCHOR22,. + 0
+	.type	toshiba_A19ref_value, %object
+	.size	toshiba_A19ref_value, 45
+toshiba_A19ref_value:
+	.byte	4
+	.byte	5
+	.byte	6
+	.byte	7
+	.byte	13
 	.byte	0
 	.byte	0
 	.byte	0
 	.byte	0
 	.byte	0
-	.byte	0
-	.byte	2
 	.byte	4
-	.byte	2
-	.byte	0
-	.byte	0
-	.byte	8
-	.byte	8
-	.byte	0
+	.byte	4
+	.byte	124
+	.byte	126
 	.byte	0
 	.byte	0
 	.byte	124
+	.byte	120
+	.byte	120
 	.byte	0
 	.byte	124
-	.byte	124
+	.byte	118
+	.byte	116
+	.byte	114
+	.byte	0
+	.byte	8
+	.byte	8
 	.byte	0
-	.byte	122
 	.byte	0
-	.byte	122
-	.byte	122
 	.byte	0
 	.byte	11
 	.byte	126
 	.byte	118
 	.byte	116
 	.byte	0
-	.byte	120
-	.byte	2
-	.byte	120
-	.byte	122
-	.byte	0
-	.byte	126
-	.byte	4
-	.byte	126
-	.byte	122
-	.byte	0
 	.byte	16
 	.byte	118
 	.byte	114
 	.byte	112
 	.byte	0
-	.byte	118
-	.byte	4
-	.byte	118
-	.byte	120
-	.byte	0
-	.byte	4
-	.byte	4
-	.byte	4
-	.byte	118
-	.byte	0
 	.byte	2
 	.byte	0
 	.byte	126
 	.byte	124
 	.byte	0
-	.byte	6
-	.byte	10
-	.byte	6
-	.byte	2
-	.byte	0
-	.byte	116
-	.byte	124
-	.byte	116
-	.byte	118
+	.section	.rodata.toshiba_ref_value,"a",%progbits
+	.set	.LANCHOR25,. + 0
+	.type	toshiba_ref_value, %object
+	.size	toshiba_ref_value, 8
+toshiba_ref_value:
 	.byte	0
 	.byte	4
-	.byte	4
-	.byte	124
-	.byte	126
-	.byte	0
-	.byte	0
 	.byte	124
 	.byte	120
-	.byte	120
-	.byte	0
-	.byte	124
-	.byte	118
 	.byte	116
-	.byte	114
-	.byte	0
-	.section	.rodata.toshiba_3D_slc_value,"a",%progbits
-	.set	.LANCHOR37,. + 0
-	.type	toshiba_3D_slc_value, %object
-	.size	toshiba_3D_slc_value, 11
-toshiba_3D_slc_value:
-	.byte	-117
+	.byte	8
+	.byte	12
+	.byte	112
+	.section	.rodata.ymtc_3D_slc_value,"a",%progbits
+	.set	.LANCHOR43,. + 0
+	.type	ymtc_3D_slc_value, %object
+	.size	ymtc_3D_slc_value, 10
+ymtc_3D_slc_value:
 	.byte	0
 	.byte	-8
 	.byte	8
 	.byte	-16
-	.byte	-24
+	.byte	-20
 	.byte	24
-	.byte	-40
+	.byte	-26
 	.byte	40
-	.byte	-56
+	.byte	-12
 	.byte	56
-	.section	.rodata.toshiba_3D_tlc_value,"a",%progbits
-	.set	.LANCHOR36,. + 0
-	.type	toshiba_3D_tlc_value, %object
-	.size	toshiba_3D_tlc_value, 399
-toshiba_3D_tlc_value:
-	.byte	-119
-	.byte	-119
-	.byte	-119
-	.byte	-119
-	.byte	-118
-	.byte	-118
-	.byte	-118
-	.byte	0
+	.section	.rodata.ymtc_3D_tlc_value,"a",%progbits
+	.set	.LANCHOR42,. + 0
+	.type	ymtc_3D_tlc_value, %object
+	.size	ymtc_3D_tlc_value, 357
+ymtc_3D_tlc_value:
 	.byte	0
 	.byte	0
 	.byte	0
 	.byte	0
 	.byte	0
 	.byte	0
-	.byte	5
-	.byte	-2
-	.byte	-1
 	.byte	0
-	.byte	-3
-	.byte	-2
-	.byte	6
-	.byte	-9
-	.byte	-12
-	.byte	-9
-	.byte	-7
-	.byte	-13
-	.byte	-12
-	.byte	-7
+	.byte	-10
+	.byte	-10
 	.byte	-6
-	.byte	-15
-	.byte	-15
-	.byte	-2
-	.byte	-12
-	.byte	-16
 	.byte	-6
 	.byte	-2
-	.byte	-19
-	.byte	-19
+	.byte	2
+	.byte	2
+	.byte	-6
 	.byte	-6
 	.byte	-4
-	.byte	-12
-	.byte	-14
+	.byte	-4
+	.byte	-4
+	.byte	-6
+	.byte	-8
+	.byte	6
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	-2
+	.byte	-2
 	.byte	-2
-	.byte	-11
-	.byte	-23
-	.byte	-34
 	.byte	-4
-	.byte	-20
-	.byte	-22
+	.byte	-4
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-11
 	.byte	-2
-	.byte	-7
-	.byte	-31
-	.byte	-30
-	.byte	-12
-	.byte	-20
-	.byte	-18
 	.byte	2
-	.byte	-15
-	.byte	-19
-	.byte	-36
-	.byte	-12
-	.byte	-28
-	.byte	-34
+	.byte	4
+	.byte	4
+	.byte	6
+	.byte	6
+	.byte	6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-8
+	.byte	-14
 	.byte	-6
 	.byte	-15
 	.byte	-11
@@ -32882,27 +35969,104 @@ toshiba_3D_tlc_value:
 	.byte	-4
 	.byte	-8
 	.byte	-6
-	.byte	-6
-	.byte	-11
-	.byte	-27
-	.byte	-38
-	.byte	-16
+	.byte	-18
+	.byte	-18
+	.byte	-14
+	.byte	-14
+	.byte	-10
+	.byte	-5
+	.byte	-5
+	.byte	-14
+	.byte	-14
+	.byte	-12
+	.byte	-12
+	.byte	-12
+	.byte	-13
+	.byte	-15
+	.byte	-2
+	.byte	-8
+	.byte	-8
+	.byte	-8
+	.byte	-8
+	.byte	-7
+	.byte	-7
+	.byte	-10
+	.byte	-10
+	.byte	-10
 	.byte	-12
+	.byte	-12
+	.byte	-13
+	.byte	-13
+	.byte	-14
+	.byte	-14
+	.byte	-14
+	.byte	-14
+	.byte	-14
+	.byte	-13
+	.byte	-18
+	.byte	-10
+	.byte	-6
+	.byte	-4
+	.byte	-4
 	.byte	-2
-	.byte	2
+	.byte	-1
+	.byte	-1
+	.byte	-14
+	.byte	-14
+	.byte	-14
+	.byte	-14
+	.byte	-14
+	.byte	-15
+	.byte	-21
+	.byte	-12
+	.byte	-11
+	.byte	-7
+	.byte	-7
+	.byte	-3
+	.byte	1
+	.byte	1
+	.byte	-8
+	.byte	-7
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-7
+	.byte	-9
+	.byte	4
+	.byte	-1
+	.byte	-1
+	.byte	-1
+	.byte	-1
+	.byte	-1
+	.byte	-1
+	.byte	-4
+	.byte	-3
+	.byte	-3
+	.byte	-5
+	.byte	-5
+	.byte	-7
+	.byte	-7
+	.byte	-8
+	.byte	-7
+	.byte	-7
+	.byte	-7
+	.byte	-7
 	.byte	-7
-	.byte	-31
-	.byte	-22
+	.byte	-12
 	.byte	-4
-	.byte	-16
-	.byte	-22
+	.byte	1
+	.byte	3
+	.byte	3
+	.byte	5
+	.byte	5
+	.byte	5
+	.byte	-8
 	.byte	-7
-	.byte	-31
-	.byte	-23
-	.byte	-22
-	.byte	-28
-	.byte	-28
-	.byte	-26
+	.byte	-7
+	.byte	-7
+	.byte	-7
+	.byte	-9
+	.byte	-15
 	.byte	2
 	.byte	-7
 	.byte	-11
@@ -32910,27 +36074,6 @@ toshiba_3D_tlc_value:
 	.byte	-8
 	.byte	-12
 	.byte	-10
-	.byte	-10
-	.byte	-27
-	.byte	-25
-	.byte	-22
-	.byte	-20
-	.byte	-28
-	.byte	-22
-	.byte	-7
-	.byte	-23
-	.byte	-29
-	.byte	-34
-	.byte	-24
-	.byte	-32
-	.byte	-22
-	.byte	-10
-	.byte	-11
-	.byte	-29
-	.byte	-18
-	.byte	-12
-	.byte	-24
-	.byte	-22
 	.byte	6
 	.byte	1
 	.byte	-3
@@ -32952,13 +36095,6 @@ toshiba_3D_tlc_value:
 	.byte	-19
 	.byte	-24
 	.byte	-18
-	.byte	-14
-	.byte	-23
-	.byte	-29
-	.byte	-30
-	.byte	-15
-	.byte	-30
-	.byte	-30
 	.byte	-7
 	.byte	-27
 	.byte	-35
@@ -32980,34 +36116,6 @@ toshiba_3D_tlc_value:
 	.byte	-8
 	.byte	-16
 	.byte	-18
-	.byte	6
-	.byte	5
-	.byte	-15
-	.byte	-2
-	.byte	-24
-	.byte	-28
-	.byte	-22
-	.byte	10
-	.byte	-15
-	.byte	-3
-	.byte	-30
-	.byte	-8
-	.byte	-24
-	.byte	-30
-	.byte	-10
-	.byte	-27
-	.byte	-19
-	.byte	-30
-	.byte	-12
-	.byte	-16
-	.byte	-10
-	.byte	14
-	.byte	-19
-	.byte	-3
-	.byte	-30
-	.byte	4
-	.byte	4
-	.byte	6
 	.byte	2
 	.byte	1
 	.byte	-3
@@ -33092,48 +36200,6 @@ toshiba_3D_tlc_value:
 	.byte	-20
 	.byte	-20
 	.byte	-20
-	.byte	-12
-	.byte	-24
-	.byte	-24
-	.byte	-30
-	.byte	-24
-	.byte	-28
-	.byte	-28
-	.byte	-12
-	.byte	-26
-	.byte	-25
-	.byte	-34
-	.byte	-24
-	.byte	-24
-	.byte	-24
-	.byte	-12
-	.byte	-13
-	.byte	-26
-	.byte	-20
-	.byte	-14
-	.byte	-18
-	.byte	-18
-	.byte	-12
-	.byte	-15
-	.byte	-27
-	.byte	-22
-	.byte	-20
-	.byte	-24
-	.byte	-22
-	.byte	-12
-	.byte	-21
-	.byte	-28
-	.byte	-28
-	.byte	-24
-	.byte	-26
-	.byte	-24
-	.byte	20
-	.byte	16
-	.byte	6
-	.byte	10
-	.byte	16
-	.byte	12
-	.byte	12
 	.byte	16
 	.byte	16
 	.byte	8
@@ -33155,20 +36221,6 @@ toshiba_3D_tlc_value:
 	.byte	12
 	.byte	14
 	.byte	8
-	.byte	20
-	.byte	18
-	.byte	8
-	.byte	6
-	.byte	14
-	.byte	14
-	.byte	10
-	.byte	20
-	.byte	20
-	.byte	6
-	.byte	10
-	.byte	10
-	.byte	12
-	.byte	12
 	.byte	10
 	.byte	13
 	.byte	5
@@ -33204,136 +36256,71 @@ toshiba_3D_tlc_value:
 	.byte	12
 	.byte	12
 	.byte	14
-	.section	.rodata.toshiba_3d_read_retrial.str1.1,"aMS",%progbits,1
-.LC113:
-	.ascii	"toshiba SRR %d row=%x, status=%d\012\000"
-.LC114:
-	.ascii	"toshiba TRR %d row=%x, status=%d\012\000"
-.LC115:
-	.ascii	"toshiba RR %d row=%x,count %d,status=%d\012\000"
-	.section	.rodata.toshiba_A19ref_value,"a",%progbits
-	.set	.LANCHOR22,. + 0
-	.type	toshiba_A19ref_value, %object
-	.size	toshiba_A19ref_value, 45
-toshiba_A19ref_value:
-	.byte	4
-	.byte	5
-	.byte	6
-	.byte	7
-	.byte	13
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	4
-	.byte	4
-	.byte	124
-	.byte	126
-	.byte	0
-	.byte	0
-	.byte	124
-	.byte	120
-	.byte	120
-	.byte	0
-	.byte	124
-	.byte	118
-	.byte	116
-	.byte	114
-	.byte	0
-	.byte	8
-	.byte	8
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	11
-	.byte	126
-	.byte	118
-	.byte	116
-	.byte	0
-	.byte	16
-	.byte	118
-	.byte	114
-	.byte	112
-	.byte	0
-	.byte	2
-	.byte	0
-	.byte	126
-	.byte	124
-	.byte	0
-	.section	.rodata.toshiba_ref_value,"a",%progbits
-	.set	.LANCHOR25,. + 0
-	.type	toshiba_ref_value, %object
-	.size	toshiba_ref_value, 8
-toshiba_ref_value:
-	.byte	0
-	.byte	4
-	.byte	124
-	.byte	120
-	.byte	116
-	.byte	8
-	.byte	12
-	.byte	112
+	.section	.rodata.ymtc_3d_read_retrial.str1.1,"aMS",%progbits,1
+.LC120:
+	.ascii	"YMTC RR %d row=%x,count %d,status=%d\012\000"
+	.section	.rodata.ymtc_flash_tlc_page_prog.str1.1,"aMS",%progbits,1
+.LC134:
+	.ascii	"ymtc_flash_tlc_page_prog page_addr = %x status = %x"
+	.ascii	"\012\000"
 	.section	.rodata.zftl_discard.str1.1,"aMS",%progbits,1
-.LC247:
+.LC253:
 	.ascii	"ftl_discard:(%x, %x, %x, %x)\012\000"
 	.section	.rodata.zftl_do_gc.str1.1,"aMS",%progbits,1
-.LC242:
+.LC236:
 	.ascii	"gc %d: %d %d %d %d %d %d %d\012\000"
-.LC243:
-	.ascii	"gc %d: %d %d %d %d %d %d\012\000"
-.LC244:
+.LC237:
 	.ascii	"GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\012"
 	.ascii	"\000"
-.LC245:
+.LC238:
 	.ascii	"gc free %x, %d\012\000"
 	.section	.rodata.zftl_gc_get_free_sblk.str1.1,"aMS",%progbits,1
-.LC54:
+.LC59:
 	.ascii	"swl_tlc_free_mini_ec_blk alloc sblk %x\012\000"
-.LC55:
+.LC60:
 	.ascii	"zftl_get_free_sblk %x %d, %p %d %d\012\000"
-.LC56:
+.LC61:
 	.ascii	"zftl_gc_get_free_sblk %x %x %x, %d %d %d\012\000"
 	.section	.rodata.zftl_get_free_sblk.str1.1,"aMS",%progbits,1
-.LC57:
+.LC62:
 	.ascii	"swl_slc_free_mini_ec_blk alloc sblk %x\012\000"
 	.section	.rodata.zftl_init.str1.1,"aMS",%progbits,1
-.LC202:
-	.ascii	"FTL version: 6.0.18 20190918\000"
-.LC203:
+.LC239:
+	.ascii	"FTL version: 6.0.23 20201130\000"
+.LC240:
 	.ascii	"_c_user_data_density := %d\012\000"
-.LC204:
+.LC241:
 	.ascii	"_c_totle_phy_density := %d\012\000"
-.LC205:
+.LC242:
 	.ascii	"_c_totle_log_page := %d\012\000"
-.LC206:
+.LC243:
 	.ascii	"_c_totle_data_density := %d\012\000"
-.LC207:
+.LC244:
 	.ascii	"_c_ftl_pm_page_num := %d\012\000"
-.LC208:
+.LC245:
 	.ascii	"_c_ftl_byte_pre_page := %d\012\000"
-.LC209:
+.LC246:
 	.ascii	"_c_max_pm_sblk := %d\012\000"
-.LC210:
+.LC247:
 	.ascii	"_min_slc_super_block := %d\012\000"
-.LC211:
+.LC248:
 	.ascii	"_max_xlc_super_block := %d\012\000"
-.LC212:
+.LC249:
 	.ascii	"gp_ftl_ext_info %p %p %p\012\000"
-.LC213:
+.LC250:
 	.ascii	"flash info size: %d %d %d\012\000"
 	.section	.rodata.zftl_read.str1.1,"aMS",%progbits,1
-.LC226:
+.LC225:
 	.ascii	"ftl_read %x %x %x\012\000"
-.LC227:
+.LC226:
 	.ascii	"ftl_read refresh =%x, lpa = %x, ppa= %x\012\000"
-.LC228:
+.LC227:
 	.ascii	"id=%d, status = %x, lpa = %x, ppa = %x spare = %x %"
 	.ascii	"x %x %x\012\000"
 	.section	.rodata.zftl_sblk_list_init.str1.1,"aMS",%progbits,1
-.LC89:
+.LC94:
 	.ascii	"free blk vpn error: %x %x\012\000"
 	.section	.rodata.zftl_write.str1.1,"aMS",%progbits,1
-.LC246:
+.LC252:
 	.ascii	"ftlwrite %x %x %x %x\012\000"
 	.hidden	free
diff --git a/drivers/rknand/rk_zftl_arm_v8.S b/drivers/rknand/rk_zftl_arm_v8.S
index 9e55dd762d..4c57f76e80 100644
--- a/drivers/rknand/rk_zftl_arm_v8.S
+++ b/drivers/rknand/rk_zftl_arm_v8.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2020-04-17
+ * date: 2020-11-30
  */
 	.arch armv8-a
 	.file	"rk_zftl_arm_v8.S"
@@ -93,7 +93,7 @@ _list_remove_node:
 	beq	.L19
 	adrp	x1, .LANCHOR5
 	adrp	x0, .LC0
-	mov	w2, 188
+	mov	w2, 202
 	add	x1, x1, :lo12:.LANCHOR5
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -467,7 +467,7 @@ _list_update_data_list:
 	bne	.L76
 	adrp	x1, .LANCHOR11
 	adrp	x0, .LC0
-	mov	w2, 255
+	mov	w2, 273
 	add	x1, x1, :lo12:.LANCHOR11
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -534,10 +534,10 @@ zftl_get_gc_node.part.9:
 	ldr	x0, [x0, #:lo12:.LANCHOR12]
 	b	_list_get_gc_head_node.isra.2
 	.size	zftl_get_gc_node.part.9, .-zftl_get_gc_node.part.9
-	.section	.text.nandc_de_cs.constprop.31,"ax",@progbits
+	.section	.text.nandc_de_cs.constprop.33,"ax",@progbits
 	.align	2
-	.type	nandc_de_cs.constprop.31, %function
-nandc_de_cs.constprop.31:
+	.type	nandc_de_cs.constprop.33, %function
+nandc_de_cs.constprop.33:
 	adrp	x0, .LANCHOR13
 	ldr	x1, [x0, #:lo12:.LANCHOR13]
 	ldr	w0, [x1]
@@ -545,7 +545,7 @@ nandc_de_cs.constprop.31:
 	and	w0, w0, -131073
 	str	w0, [x1]
 	ret
-	.size	nandc_de_cs.constprop.31, .-nandc_de_cs.constprop.31
+	.size	nandc_de_cs.constprop.33, .-nandc_de_cs.constprop.33
 	.section	.text.nand_flash_print_info,"ax",@progbits
 	.align	2
 	.global	nand_flash_print_info
@@ -1138,40 +1138,47 @@ flash_wait_device_ready_raw:
 	bhi	.L254
 	adrp	x1, .LANCHOR29
 	adrp	x0, .LC0
-	mov	w2, 704
+	mov	w2, 805
 	add	x1, x1, :lo12:.LANCHOR29
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 .L254:
 	adrp	x0, .LANCHOR30
 	add	x0, x0, :lo12:.LANCHOR30
-	ldrb	w5, [x0, w21, sxtw]
+	lsr	w7, w19, 8
+	lsr	w8, w19, 16
+	lsr	w10, w19, 24
+	adrp	x5, .LANCHOR31
+	ldrb	w6, [x0, w21, sxtw]
 	adrp	x0, .LANCHOR13
+	and	w19, w19, 255
+	add	x5, x5, :lo12:.LANCHOR31
 	ldr	x4, [x0, #:lo12:.LANCHOR13]
-	mov	w0, w5
+	mov	w11, 120
+	ubfiz	x0, x6, 8, 8
+	add	x4, x4, x0
+.L260:
+	mov	w0, w6
 	bl	nandc_cs
-	ubfiz	x2, x5, 8, 8
-	lsr	w6, w19, 8
-	lsr	w7, w19, 16
-	and	w19, w19, 255
-	add	x2, x4, x2
-	mov	w4, 120
-.L257:
-	str	w4, [x2, 2056]
+	str	w11, [x4, 2056]
+	str	w19, [x4, 2052]
+	ldrb	w0, [x5]
+	str	w7, [x4, 2052]
+	str	w8, [x4, 2052]
+	cbz	w0, .L255
+	str	w10, [x4, 2052]
+.L255:
 	mov	w0, 120
-	str	w19, [x2, 2052]
-	str	w6, [x2, 2052]
-	str	w7, [x2, 2052]
 	bl	timer_delay_ns
-	ldr	w3, [x2, 2048]
-	and	w3, w3, 255
-	bics	wzr, w20, w3
-	bne	.L257
-	cmp	w3, 255
-	beq	.L257
-	bl	nandc_de_cs.constprop.31
+	ldr	w2, [x4, 2048]
+	and	w2, w2, 255
+	bl	nandc_de_cs.constprop.33
+	bics	wzr, w20, w2
+	bne	.L260
+	cmp	w2, 255
+	beq	.L260
+	mov	w0, w2
 	ldr	x21, [sp, 32]
-	mov	w0, w3
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
@@ -1182,10 +1189,10 @@ flash_wait_device_ready_raw:
 	.type	flash_wait_device_ready, %function
 flash_wait_device_ready:
 	mov	w2, w1
-	adrp	x1, .LANCHOR31
+	adrp	x1, .LANCHOR32
 	mov	w5, 24
 	mov	w4, 1
-	ldrb	w6, [x1, #:lo12:.LANCHOR31]
+	ldrb	w6, [x1, #:lo12:.LANCHOR32]
 	tst	x0, 50331648
 	sub	w5, w5, w6
 	lsl	w3, w4, w5
@@ -1196,31 +1203,31 @@ flash_wait_device_ready:
 	and	w4, w4, w5
 	and	w1, w3, w0
 	and	w4, w4, 255
-	bne	.L261
+	bne	.L265
 	adrp	x0, .LANCHOR0
 	adrp	x5, .LANCHOR1
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L262
+	cbz	w0, .L266
 	ldrb	w0, [x5, #:lo12:.LANCHOR1]
-	cbz	w0, .L261
-.L262:
+	cbz	w0, .L265
+.L266:
 	adrp	x0, .LANCHOR2
 	ldrh	w3, [x0, #:lo12:.LANCHOR2]
 	udiv	w0, w1, w3
 	mul	w0, w0, w3
 	sub	w3, w1, w0
 	ldrb	w1, [x5, #:lo12:.LANCHOR1]
-	cbz	w1, .L263
+	cbz	w1, .L267
 	add	w1, w0, w3, lsl 1
-.L261:
+.L265:
 	mov	w0, w4
 	b	flash_wait_device_ready_raw
-.L263:
+.L267:
 	adrp	x5, .LANCHOR3
 	add	x5, x5, :lo12:.LANCHOR3
 	ldrh	w3, [x5, w3, uxtw 1]
 	add	w1, w3, w0
-	b	.L261
+	b	.L265
 	.size	flash_wait_device_ready, .-flash_wait_device_ready
 	.section	.text.nandc_de_cs,"ax",@progbits
 	.align	2
@@ -1245,23 +1252,23 @@ nandc_wait_flash_ready_no_delay:
 	movk	w2, 0x1, lsl 16
 	adrp	x3, .LANCHOR13
 	add	x29, sp, 0
-.L273:
+.L277:
 	ldr	x0, [x3, #:lo12:.LANCHOR13]
 	ldr	w0, [x0]
 	str	w0, [x29, 24]
 	ldr	w0, [x29, 24]
-	tbnz	x0, 9, .L274
+	tbnz	x0, 9, .L278
 	mov	w0, 10
 	bl	timer_delay_ns
 	subs	w2, w2, #1
-	bne	.L273
+	bne	.L277
 	mov	w0, -1
-.L271:
+.L275:
 	ldp	x29, x30, [sp], 32
 	ret
-.L274:
+.L278:
 	mov	w0, 0
-	b	.L271
+	b	.L275
 	.size	nandc_wait_flash_ready_no_delay, .-nandc_wait_flash_ready_no_delay
 	.section	.text.zftl_flash_enter_slc_mode,"ax",@progbits
 	.align	2
@@ -1271,48 +1278,48 @@ zftl_flash_enter_slc_mode:
 	and	x4, x0, 255
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L296
+	cbz	w0, .L300
 	adrp	x1, .LANCHOR13
 	cmp	w0, 1
 	ldr	x5, [x1, #:lo12:.LANCHOR13]
-	bne	.L280
-	adrp	x0, .LANCHOR32+29
-	ldrb	w0, [x0, #:lo12:.LANCHOR32+29]
-	cbz	w0, .L296
+	bne	.L284
+	adrp	x0, .LANCHOR33+29
+	ldrb	w0, [x0, #:lo12:.LANCHOR33+29]
+	cbz	w0, .L300
 	add	x4, x4, 8
 	add	x4, x5, x4, lsl 8
 	str	w0, [x4, 8]
 	ret
-.L280:
+.L284:
 	stp	x29, x30, [sp, -16]!
 	cmp	w0, 2
 	add	x29, sp, 0
-	bne	.L282
-	adrp	x0, .LANCHOR33
-	add	x0, x0, :lo12:.LANCHOR33
+	bne	.L286
+	adrp	x0, .LANCHOR34
+	add	x0, x0, :lo12:.LANCHOR34
 	ldrb	w1, [x0, x4]
-	cbz	w1, .L277
-	adrp	x6, .LANCHOR32
-	add	x6, x6, :lo12:.LANCHOR32
+	cbz	w1, .L281
+	adrp	x6, .LANCHOR33
+	add	x6, x6, :lo12:.LANCHOR33
 	strb	wzr, [x0, x4]
 	ldrb	w0, [x6, 29]
-	cbz	w0, .L277
+	cbz	w0, .L281
 	bl	nandc_wait_flash_ready_no_delay
 	add	x4, x4, 8
 	add	x4, x5, x4, lsl 8
 	ldrb	w0, [x6, 29]
 	str	w0, [x4, 8]
-.L277:
+.L281:
 	ldp	x29, x30, [sp], 16
 	ret
-.L282:
+.L286:
 	cmp	w0, 3
-	bne	.L277
-	adrp	x6, .LANCHOR33
+	bne	.L281
+	adrp	x6, .LANCHOR34
 	sxtw	x7, w4
-	add	x6, x6, :lo12:.LANCHOR33
+	add	x6, x6, :lo12:.LANCHOR34
 	ldrb	w0, [x6, x7]
-	cbz	w0, .L277
+	cbz	w0, .L281
 	bl	nandc_wait_flash_ready_no_delay
 	ubfiz	x4, x4, 8, 8
 	add	x4, x5, x4
@@ -1333,8 +1340,8 @@ zftl_flash_enter_slc_mode:
 	bl	nandc_wait_flash_ready_no_delay
 	mov	w0, 218
 	str	w0, [x4, 2056]
-	b	.L277
-.L296:
+	b	.L281
+.L300:
 	ret
 	.size	zftl_flash_enter_slc_mode, .-zftl_flash_enter_slc_mode
 	.section	.text.zftl_flash_exit_slc_mode,"ax",@progbits
@@ -1345,56 +1352,56 @@ zftl_flash_exit_slc_mode:
 	and	x4, x0, 255
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L319
+	cbz	w0, .L323
 	adrp	x1, .LANCHOR13
 	cmp	w0, 1
 	ldr	x5, [x1, #:lo12:.LANCHOR13]
-	bne	.L301
-	adrp	x0, .LANCHOR32+30
-	ldrb	w0, [x0, #:lo12:.LANCHOR32+30]
-	cbz	w0, .L319
+	bne	.L305
+	adrp	x0, .LANCHOR33+30
+	ldrb	w0, [x0, #:lo12:.LANCHOR33+30]
+	cbz	w0, .L323
 	add	x4, x4, 8
 	add	x4, x5, x4, lsl 8
 	str	w0, [x4, 8]
 	ret
-.L301:
+.L305:
 	stp	x29, x30, [sp, -16]!
 	cmp	w0, 2
 	add	x29, sp, 0
-	bne	.L303
-	adrp	x0, .LANCHOR33
-	add	x0, x0, :lo12:.LANCHOR33
+	bne	.L307
+	adrp	x0, .LANCHOR34
+	add	x0, x0, :lo12:.LANCHOR34
 	ldrb	w1, [x0, x4]
-	cbnz	w1, .L298
-	adrp	x6, .LANCHOR32
-	add	x6, x6, :lo12:.LANCHOR32
+	cbnz	w1, .L302
+	adrp	x6, .LANCHOR33
+	add	x6, x6, :lo12:.LANCHOR33
 	mov	w2, 4
 	ldrb	w1, [x6, 12]
 	cmp	w1, 2
 	csel	w1, w1, w2, eq
 	strb	w1, [x0, x4]
 	ldrb	w0, [x6, 30]
-	cbz	w0, .L298
+	cbz	w0, .L302
 	bl	nandc_wait_flash_ready_no_delay
 	add	x4, x4, 8
 	add	x4, x5, x4, lsl 8
 	ldrb	w0, [x6, 30]
 	str	w0, [x4, 8]
-.L298:
+.L302:
 	ldp	x29, x30, [sp], 16
 	ret
-.L303:
+.L307:
 	cmp	w0, 3
-	bne	.L298
-	adrp	x6, .LANCHOR33
+	bne	.L302
+	adrp	x6, .LANCHOR34
 	sxtw	x7, w4
-	add	x6, x6, :lo12:.LANCHOR33
+	add	x6, x6, :lo12:.LANCHOR34
 	ldrb	w0, [x6, x7]
-	cbnz	w0, .L298
+	cbnz	w0, .L302
 	bl	nandc_wait_flash_ready_no_delay
 	ubfiz	x4, x4, 8, 8
-	adrp	x2, .LANCHOR32
-	add	x2, x2, :lo12:.LANCHOR32
+	adrp	x2, .LANCHOR33
+	add	x2, x2, :lo12:.LANCHOR33
 	add	x4, x5, x4
 	mov	w1, 4
 	ldrb	w0, [x2, 12]
@@ -1410,9 +1417,9 @@ zftl_flash_exit_slc_mode:
 	ldrb	w0, [x2, 7]
 	cmp	w0, 9
 	mov	w0, 1
-	bne	.L306
+	bne	.L310
 	str	w0, [x4, 2048]
-.L307:
+.L311:
 	str	w0, [x4, 2048]
 	mov	w0, 150
 	str	wzr, [x4, 2048]
@@ -1421,12 +1428,12 @@ zftl_flash_exit_slc_mode:
 	bl	nandc_wait_flash_ready_no_delay
 	mov	w0, 223
 	str	w0, [x4, 2056]
-	b	.L298
-.L306:
+	b	.L302
+.L310:
 	ldrb	w1, [x6, x7]
 	str	w1, [x4, 2048]
-	b	.L307
-.L319:
+	b	.L311
+.L323:
 	ret
 	.size	zftl_flash_exit_slc_mode, .-zftl_flash_exit_slc_mode
 	.section	.text.flash_start_page_read,"ax",@progbits
@@ -1439,11 +1446,11 @@ flash_start_page_read:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 255
-	adrp	x0, .LANCHOR31
+	adrp	x0, .LANCHOR32
 	stp	x21, x22, [sp, 32]
 	mov	w19, 1
 	mov	w21, w1
-	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	ldrb	w0, [x0, #:lo12:.LANCHOR32]
 	str	x23, [sp, 48]
 	sub	w22, w8, w0
 	lsl	w19, w19, w0
@@ -1455,17 +1462,17 @@ flash_start_page_read:
 	mov	x23, x0
 	ldrb	w1, [x0, #:lo12:.LANCHOR18]
 	cmp	w1, w19
-	bhi	.L322
-	adrp	x1, .LANCHOR34
+	bhi	.L326
+	adrp	x1, .LANCHOR35
 	adrp	x0, .LC0
-	mov	w2, 882
-	add	x1, x1, :lo12:.LANCHOR34
+	mov	w2, 1001
+	add	x1, x1, :lo12:.LANCHOR35
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L322:
+.L326:
 	ldrb	w0, [x23, #:lo12:.LANCHOR18]
 	cmp	w0, w19
-	bls	.L321
+	bls	.L325
 	adrp	x0, .LANCHOR30
 	add	x0, x0, :lo12:.LANCHOR30
 	mov	w8, 1
@@ -1478,57 +1485,74 @@ flash_start_page_read:
 	ldr	x10, [x0, #:lo12:.LANCHOR13]
 	mov	w0, w11
 	bl	nandc_cs
-	cbnz	w21, .L324
+	adrp	x12, .LANCHOR16
+	cbnz	w21, .L328
 	mov	w0, w8
 	bl	slc_phy_page_address_calc
 	mov	w8, w0
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L325
+	cbz	w0, .L329
 	mov	w0, w11
 	bl	zftl_flash_enter_slc_mode
-.L325:
+.L329:
+	ldr	x0, [x12, #:lo12:.LANCHOR16]
+	ldrb	w1, [x0, 7]
+	cmp	w1, 1
+	bne	.L331
+	ldrb	w0, [x0, 12]
+	cmp	w0, 2
+	bne	.L331
+	sxtw	x0, w11
+	mov	w1, 38
+	add	x0, x0, 8
+	add	x0, x10, x0, lsl 8
+	str	w1, [x0, 8]
+.L331:
 	ubfiz	x0, x11, 8, 8
-	ldr	x23, [sp, 48]
-	add	x0, x10, x0
 	and	w1, w8, 255
-	ldp	x21, x22, [sp, 32]
+	add	x0, x10, x0
 	str	wzr, [x0, 2056]
 	str	wzr, [x0, 2052]
 	str	wzr, [x0, 2052]
 	str	w1, [x0, 2052]
 	lsr	w1, w8, 8
 	str	w1, [x0, 2052]
-	lsr	w8, w8, 16
+	lsr	w1, w8, 16
+	str	w1, [x0, 2052]
+	adrp	x1, .LANCHOR31
+	ldrb	w1, [x1, #:lo12:.LANCHOR31]
+	cbz	w1, .L332
+	lsr	w8, w8, 24
 	str	w8, [x0, 2052]
+.L332:
 	str	w20, [x0, 2056]
+.L325:
 	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
-	b	nandc_de_cs.constprop.31
-.L324:
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
+	ret
+.L328:
+	ldr	x0, [x12, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L326
-	adrp	x0, .LANCHOR35
-	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbnz	w0, .L326
+	bne	.L330
+	adrp	x0, .LANCHOR36
+	ldrb	w0, [x0, #:lo12:.LANCHOR36]
+	cbnz	w0, .L330
+	adrp	x0, .LANCHOR37
+	ldrb	w0, [x0, #:lo12:.LANCHOR37]
+	cbnz	w0, .L330
 	sxtw	x0, w11
 	add	x0, x0, 8
 	add	x0, x10, x0, lsl 8
 	str	w21, [x0, 8]
-	b	.L325
-.L326:
+	b	.L329
+.L330:
 	mov	w0, w11
 	bl	zftl_flash_exit_slc_mode
-	b	.L325
-.L321:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldr	x23, [sp, 48]
-	ldp	x29, x30, [sp], 64
-	ret
+	b	.L329
 	.size	flash_start_page_read, .-flash_start_page_read
 	.section	.text.nandc_wait_flash_ready,"ax",@progbits
 	.align	2
@@ -1542,23 +1566,23 @@ nandc_wait_flash_ready:
 	mov	w2, 34464
 	adrp	x3, .LANCHOR13
 	movk	w2, 0x1, lsl 16
-.L333:
+.L342:
 	ldr	x0, [x3, #:lo12:.LANCHOR13]
 	ldr	w0, [x0]
 	str	w0, [x29, 24]
 	ldr	w0, [x29, 24]
-	tbnz	x0, 9, .L334
+	tbnz	x0, 9, .L343
 	mov	w0, 10
 	bl	timer_delay_ns
 	subs	w2, w2, #1
-	bne	.L333
+	bne	.L342
 	mov	w0, -1
-.L331:
+.L340:
 	ldp	x29, x30, [sp], 32
 	ret
-.L334:
+.L343:
 	mov	w0, 0
-	b	.L331
+	b	.L340
 	.size	nandc_wait_flash_ready, .-nandc_wait_flash_ready
 	.section	.text.sandisk_set_rr_para,"ax",@progbits
 	.align	2
@@ -1589,22 +1613,22 @@ sandisk_set_rr_para:
 	add	x2, x2, x1
 	add	x1, x0, x1
 	mov	x0, 0
-.L338:
+.L347:
 	cmp	w4, w0
-	bhi	.L341
+	bhi	.L350
 	ldp	x29, x30, [sp], 16
 	b	nandc_wait_flash_ready
-.L341:
+.L350:
 	cmp	w5, 67
-	bne	.L339
+	bne	.L348
 	ldrsb	w6, [x1, x0]
-.L343:
+.L352:
 	add	x0, x0, 1
 	str	w6, [x3]
-	b	.L338
-.L339:
+	b	.L347
+.L348:
 	ldrsb	w6, [x2, x0]
-	b	.L343
+	b	.L352
 	.size	sandisk_set_rr_para, .-sandisk_set_rr_para
 	.section	.text.toshiba_3d_set_tlc_rr_para,"ax",@progbits
 	.align	2
@@ -1623,8 +1647,8 @@ toshiba_3d_set_tlc_rr_para:
 	madd	x1, x2, x1, x1
 	mov	w0, -119
 	str	w0, [x4, 4]
-	adrp	x0, .LANCHOR36
-	add	x0, x0, :lo12:.LANCHOR36
+	adrp	x0, .LANCHOR38
+	add	x0, x0, :lo12:.LANCHOR38
 	add	x5, x0, x1
 	ldrsb	w0, [x0, x1]
 	str	w0, [x4]
@@ -1659,8 +1683,8 @@ toshiba_3d_set_slc_rr_para:
 	str	wzr, [x0, 4]
 	mov	w2, -117
 	str	w2, [x0, 4]
-	adrp	x2, .LANCHOR37
-	add	x2, x2, :lo12:.LANCHOR37
+	adrp	x2, .LANCHOR39
+	add	x2, x2, :lo12:.LANCHOR39
 	add	x1, x2, x1, uxtb
 	ldrsb	w1, [x1, 1]
 	str	w1, [x0]
@@ -1676,7 +1700,7 @@ toshiba_3d_set_slc_rr_para:
 toshiba_tlc_set_rr_para:
 	mov	w6, 239
 	uxtw	x1, w1
-	cbz	w2, .L348
+	cbz	w2, .L357
 	stp	x29, x30, [sp, -16]!
 	mov	x4, x0
 	mov	x2, 7
@@ -1685,8 +1709,8 @@ toshiba_tlc_set_rr_para:
 	str	w6, [x4, 8]
 	mul	x1, x1, x2
 	str	w0, [x4, 4]
-	adrp	x0, .LANCHOR38
-	add	x0, x0, :lo12:.LANCHOR38
+	adrp	x0, .LANCHOR40
+	add	x0, x0, :lo12:.LANCHOR40
 	add	x5, x0, x1
 	ldrb	w0, [x0, x1]
 	str	w0, [x4]
@@ -1708,21 +1732,88 @@ toshiba_tlc_set_rr_para:
 	str	w0, [x4]
 	str	wzr, [x4]
 	ldp	x29, x30, [sp], 16
-.L351:
+.L360:
 	b	nandc_wait_flash_ready
-.L348:
+.L357:
 	str	w6, [x0, 8]
 	mov	w2, 20
 	str	w2, [x0, 4]
-	adrp	x2, .LANCHOR39
-	add	x2, x2, :lo12:.LANCHOR39
+	adrp	x2, .LANCHOR41
+	add	x2, x2, :lo12:.LANCHOR41
 	ldrb	w1, [x2, x1]
 	str	w1, [x0]
 	str	wzr, [x0]
 	str	wzr, [x0]
 	str	wzr, [x0]
-	b	.L351
+	b	.L360
 	.size	toshiba_tlc_set_rr_para, .-toshiba_tlc_set_rr_para
+	.section	.text.ymtc_3d_set_tlc_rr_para,"ax",@progbits
+	.align	2
+	.global	ymtc_3d_set_tlc_rr_para
+	.type	ymtc_3d_set_tlc_rr_para, %function
+ymtc_3d_set_tlc_rr_para:
+	mov	x4, x0
+	stp	x29, x30, [sp, -16]!
+	and	x1, x1, 255
+	mov	x2, 7
+	add	x29, sp, 0
+	mov	w6, 239
+	mov	w0, 160
+	str	w6, [x4, 8]
+	mul	x1, x1, x2
+	str	w0, [x4, 4]
+	adrp	x0, .LANCHOR42
+	add	x0, x0, :lo12:.LANCHOR42
+	add	x5, x0, x1
+	ldrsb	w0, [x0, x1]
+	str	w0, [x4]
+	ldrsb	w0, [x5, 4]
+	str	w0, [x4]
+	str	wzr, [x4]
+	str	wzr, [x4]
+	bl	nandc_wait_flash_ready
+	str	w6, [x4, 8]
+	mov	w0, 161
+	str	w0, [x4, 4]
+	ldrsb	w0, [x5, 1]
+	str	w0, [x4]
+	ldrsb	w0, [x5, 3]
+	str	w0, [x4]
+	ldrsb	w0, [x5, 5]
+	str	w0, [x4]
+	str	wzr, [x4]
+	bl	nandc_wait_flash_ready
+	ldp	x29, x30, [sp], 16
+	mov	w0, 162
+	str	w6, [x4, 8]
+	str	w0, [x4, 4]
+	ldrsb	w0, [x5, 2]
+	str	w0, [x4]
+	ldrsb	w0, [x5, 6]
+	str	w0, [x4]
+	str	wzr, [x4]
+	str	wzr, [x4]
+	b	nandc_wait_flash_ready
+	.size	ymtc_3d_set_tlc_rr_para, .-ymtc_3d_set_tlc_rr_para
+	.section	.text.ymtc_3d_set_slc_rr_para,"ax",@progbits
+	.align	2
+	.global	ymtc_3d_set_slc_rr_para
+	.type	ymtc_3d_set_slc_rr_para, %function
+ymtc_3d_set_slc_rr_para:
+	mov	w2, 239
+	str	w2, [x0, 8]
+	mov	w2, 163
+	and	x1, x1, 255
+	str	w2, [x0, 4]
+	adrp	x2, .LANCHOR43
+	add	x2, x2, :lo12:.LANCHOR43
+	ldrsb	w1, [x2, x1]
+	str	w1, [x0]
+	str	wzr, [x0]
+	str	wzr, [x0]
+	str	wzr, [x0]
+	b	nandc_wait_flash_ready
+	.size	ymtc_3d_set_slc_rr_para, .-ymtc_3d_set_slc_rr_para
 	.section	.text.flash_erase_duplane_block,"ax",@progbits
 	.align	2
 	.global	flash_erase_duplane_block
@@ -1742,17 +1833,17 @@ flash_erase_duplane_block:
 	mov	w20, w3
 	mov	x19, x0
 	cmp	w1, w22
-	bhi	.L355
-	adrp	x1, .LANCHOR40
+	bhi	.L367
+	adrp	x1, .LANCHOR44
 	adrp	x0, .LC0
-	mov	w2, 608
-	add	x1, x1, :lo12:.LANCHOR40
+	mov	w2, 688
+	add	x1, x1, :lo12:.LANCHOR44
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L355:
+.L367:
 	ldrb	w0, [x19, #:lo12:.LANCHOR18]
 	cmp	w0, w22
-	bls	.L362
+	bls	.L376
 	adrp	x0, .LANCHOR30
 	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w22, [x0, w22, sxtw]
@@ -1763,21 +1854,21 @@ flash_erase_duplane_block:
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	add	x23, x19, 8
 	add	x23, x25, x23, lsl 8
-	tbz	x0, 4, .L357
+	tbz	x0, 4, .L369
 	adrp	x0, .LC31
 	mov	w3, w20
 	mov	w2, w21
 	mov	w1, w22
 	add	x0, x0, :lo12:.LC31
 	bl	printf
-.L357:
+.L369:
 	bl	nandc_wait_flash_ready
 	mov	w0, w22
 	bl	nandc_cs
 	mov	w0, w22
-	cbnz	w24, .L358
+	cbnz	w24, .L370
 	bl	zftl_flash_enter_slc_mode
-.L359:
+.L371:
 	add	x25, x25, x19, lsl 8
 	mov	w0, 96
 	str	w0, [x25, 2056]
@@ -1787,9 +1878,16 @@ flash_erase_duplane_block:
 	str	w0, [x25, 2052]
 	lsr	w0, w21, 16
 	str	w0, [x25, 2052]
-	adrp	x0, .LANCHOR41
-	ldrb	w0, [x0, #:lo12:.LANCHOR41]
-	cbnz	w0, .L363
+	adrp	x0, .LANCHOR31
+	mov	x6, x0
+	ldrb	w1, [x0, #:lo12:.LANCHOR31]
+	cbz	w1, .L372
+	lsr	w0, w21, 24
+	str	w0, [x25, 2052]
+.L372:
+	adrp	x0, .LANCHOR45
+	ldrb	w0, [x0, #:lo12:.LANCHOR45]
+	cbnz	w0, .L377
 	mov	w0, 208
 	str	w0, [x25, 2056]
 	mov	w19, 5
@@ -1797,15 +1895,20 @@ flash_erase_duplane_block:
 	mov	x0, x23
 	bl	flash_read_status
 	and	w5, w0, w19
-.L360:
+.L373:
 	mov	w0, 96
 	str	w0, [x25, 2056]
 	and	w0, w20, 255
 	str	w0, [x25, 2052]
 	lsr	w0, w20, 8
 	str	w0, [x25, 2052]
-	lsr	w20, w20, 16
+	lsr	w0, w20, 16
+	str	w0, [x25, 2052]
+	ldrb	w0, [x6, #:lo12:.LANCHOR31]
+	cbz	w0, .L374
+	lsr	w20, w20, 24
 	str	w20, [x25, 2052]
+.L374:
 	mov	w0, 208
 	str	w0, [x25, 2056]
 	mov	w19, 5
@@ -1813,32 +1916,32 @@ flash_erase_duplane_block:
 	mov	x0, x23
 	bl	flash_read_status
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.31
+	bl	nandc_de_cs.constprop.33
 	and	w19, w2, w19
 	orr	w19, w19, w5
-	cbz	w19, .L361
+	cbz	w19, .L375
 	adrp	x0, .LC32
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC32
 	bl	printf
-.L361:
+.L375:
 	mov	w0, w19
-.L354:
+.L366:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L358:
+.L370:
 	bl	zftl_flash_exit_slc_mode
-	b	.L359
-.L363:
+	b	.L371
+.L377:
 	mov	w5, 0
-	b	.L360
-.L362:
+	b	.L373
+.L376:
 	mov	w0, -1
-	b	.L354
+	b	.L366
 	.size	flash_erase_duplane_block, .-flash_erase_duplane_block
 	.section	.text.flash_erase_block_en,"ax",@progbits
 	.align	2
@@ -1849,11 +1952,11 @@ flash_erase_block_en:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	and	w22, w0, 255
-	adrp	x0, .LANCHOR31
+	adrp	x0, .LANCHOR32
 	stp	x19, x20, [sp, 16]
 	mov	w19, 24
 	stp	x23, x24, [sp, 48]
-	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	ldrb	w0, [x0, #:lo12:.LANCHOR32]
 	and	w24, w1, 255
 	stp	x25, x26, [sp, 64]
 	mov	w23, w2
@@ -1866,17 +1969,17 @@ flash_erase_block_en:
 	ldrb	w1, [x0, #:lo12:.LANCHOR18]
 	and	w19, w19, w2
 	cmp	w1, w22
-	bhi	.L372
-	adrp	x1, .LANCHOR42
+	bhi	.L392
+	adrp	x1, .LANCHOR46
 	adrp	x0, .LC0
-	mov	w2, 657
-	add	x1, x1, :lo12:.LANCHOR42
+	mov	w2, 750
+	add	x1, x1, :lo12:.LANCHOR46
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L372:
+.L392:
 	ldrb	w0, [x20, #:lo12:.LANCHOR18]
 	cmp	w0, w22
-	bls	.L378
+	bls	.L399
 	adrp	x0, .LANCHOR30
 	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w21, [x0, w22, sxtw]
@@ -1887,21 +1990,21 @@ flash_erase_block_en:
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	add	x25, x20, 8
 	add	x25, x26, x25, lsl 8
-	tbz	x0, 4, .L374
+	tbz	x0, 4, .L394
 	adrp	x0, .LC33
 	mov	w3, w24
 	mov	w2, w23
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC33
 	bl	printf
-.L374:
+.L394:
 	bl	nandc_wait_flash_ready
 	mov	w0, w21
 	bl	nandc_cs
 	mov	w0, w21
-	cbnz	w24, .L375
+	cbnz	w24, .L395
 	bl	zftl_flash_enter_slc_mode
-.L376:
+.L396:
 	add	x0, x26, x20, lsl 8
 	mov	w1, 96
 	str	w1, [x0, 2056]
@@ -1909,18 +2012,24 @@ flash_erase_block_en:
 	str	w1, [x0, 2052]
 	lsr	w1, w19, 8
 	str	w1, [x0, 2052]
-	lsr	w19, w19, 16
+	lsr	w1, w19, 16
+	str	w1, [x0, 2052]
+	adrp	x1, .LANCHOR31
+	ldrb	w1, [x1, #:lo12:.LANCHOR31]
+	cbz	w1, .L397
+	lsr	w19, w19, 24
 	str	w19, [x0, 2052]
+.L397:
 	mov	w1, 208
 	str	w1, [x0, 2056]
 	bl	nandc_wait_flash_ready
 	mov	x0, x25
 	bl	flash_read_status
 	mov	w3, w0
-	bl	nandc_de_cs.constprop.31
+	bl	nandc_de_cs.constprop.33
 	mov	w0, 5
 	ands	w3, w3, w0
-	beq	.L377
+	beq	.L398
 	adrp	x0, .LANCHOR2
 	mov	w1, w22
 	ldrh	w2, [x0, #:lo12:.LANCHOR2]
@@ -1929,21 +2038,21 @@ flash_erase_block_en:
 	udiv	w2, w23, w2
 	bl	printf
 	mov	w3, -1
-.L377:
+.L398:
 	mov	w0, w3
-.L371:
+.L391:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L375:
+.L395:
 	bl	zftl_flash_exit_slc_mode
-	b	.L376
-.L378:
+	b	.L396
+.L399:
 	mov	w0, -1
-	b	.L371
+	b	.L391
 	.size	flash_erase_block_en, .-flash_erase_block_en
 	.section	.text.flash_erase_block,"ax",@progbits
 	.align	2
@@ -1960,8 +2069,8 @@ flash_erase_block:
 	.type	flash_erase_all, %function
 flash_erase_all:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR32
-	add	x0, x0, :lo12:.LANCHOR32
+	adrp	x0, .LANCHOR33
+	add	x0, x0, :lo12:.LANCHOR33
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w19, 0
@@ -1977,10 +2086,10 @@ flash_erase_all:
 	ldrb	w1, [x0, 13]
 	mul	w20, w20, w1
 	and	w20, w20, 65535
-.L388:
+.L412:
 	ldrb	w0, [x22]
 	cmp	w0, w19
-	bhi	.L391
+	bhi	.L415
 	ldp	x19, x20, [sp, 16]
 	mov	w1, 0
 	ldp	x21, x22, [sp, 32]
@@ -1990,23 +2099,23 @@ flash_erase_all:
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	b	printf
-.L391:
+.L415:
 	add	x0, x24, :lo12:.LANCHOR30
 	mov	w21, 0
 	ldrb	w25, [x0, w19, sxtw]
-.L389:
+.L413:
 	cmp	w20, w21, uxth
-	bhi	.L390
+	bhi	.L414
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L388
-.L390:
+	b	.L412
+.L414:
 	ldrh	w1, [x23]
 	mov	w0, w25
 	mul	w1, w1, w21
 	add	w21, w21, 1
 	bl	flash_erase_block
-	b	.L389
+	b	.L413
 	.size	flash_erase_all, .-flash_erase_all
 	.section	.text.flash_start_plane_read,"ax",@progbits
 	.align	2
@@ -2014,11 +2123,11 @@ flash_erase_all:
 	.type	flash_start_plane_read, %function
 flash_start_plane_read:
 	stp	x29, x30, [sp, -48]!
-	adrp	x2, .LANCHOR31
+	adrp	x2, .LANCHOR32
 	mov	w3, 24
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	ldrb	w20, [x2, #:lo12:.LANCHOR31]
+	ldrb	w20, [x2, #:lo12:.LANCHOR32]
 	mov	w2, 1
 	stp	x21, x22, [sp, 32]
 	ubfx	x21, x0, 24, 2
@@ -2035,23 +2144,23 @@ flash_start_plane_read:
 	and	w19, w19, w1
 	ldrb	w0, [x0, #:lo12:.LANCHOR18]
 	cmp	w0, w20
-	bhi	.L394
-	adrp	x1, .LANCHOR43
+	bhi	.L418
+	adrp	x1, .LANCHOR47
 	adrp	x0, .LC0
-	mov	w2, 981
-	add	x1, x1, :lo12:.LANCHOR43
+	mov	w2, 1128
+	add	x1, x1, :lo12:.LANCHOR47
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L394:
+.L418:
 	adrp	x0, .LANCHOR30
 	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w8, [x0, w20, sxtw]
 	adrp	x0, .LANCHOR13
-	ldr	x11, [x0, #:lo12:.LANCHOR13]
+	ldr	x10, [x0, #:lo12:.LANCHOR13]
 	mov	w0, w8
 	bl	nandc_cs
-	adrp	x10, .LANCHOR16
-	cbnz	w21, .L395
+	adrp	x11, .LANCHOR16
+	cbnz	w21, .L419
 	mov	w0, w22
 	bl	slc_phy_page_address_calc
 	mov	w22, w0
@@ -2060,85 +2169,118 @@ flash_start_plane_read:
 	mov	w19, w0
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L396
+	cbz	w0, .L420
 	mov	w0, w8
 	bl	zftl_flash_enter_slc_mode
-.L396:
+.L420:
 	adrp	x0, .LANCHOR20
-	and	x4, x8, 255
 	add	x1, x0, :lo12:.LANCHOR20
-	add	x4, x11, x4, lsl 8
-	and	w3, w22, 255
-	and	w6, w19, 255
-	lsr	w5, w19, 8
-	lsr	w19, w19, 16
-	ldrb	w7, [x1, 8]
+	and	x4, x8, 255
+	and	w5, w22, 255
+	lsr	w3, w22, 8
+	and	w12, w19, 255
 	ldrb	w2, [x1, 16]
-	str	w7, [x4, 2056]
+	lsr	w7, w19, 8
+	lsr	w6, w19, 16
 	cmp	w2, 1
-	lsr	w2, w22, 8
-	lsr	w22, w22, 16
-	bne	.L398
+	lsr	w2, w22, 16
+	bne	.L422
+	add	x4, x10, x4, lsl 8
+	ldrb	w1, [x1, 8]
+	str	w1, [x4, 2056]
+	adrp	x1, .LANCHOR31
 	str	wzr, [x4, 2052]
 	str	wzr, [x4, 2052]
+	str	w5, [x4, 2052]
+	mov	x5, x1
 	str	w3, [x4, 2052]
 	str	w2, [x4, 2052]
-	ldrb	w0, [x1, 9]
+	ldrb	w2, [x1, #:lo12:.LANCHOR31]
+	cbz	w2, .L423
+	lsr	w22, w22, 24
 	str	w22, [x4, 2052]
+.L423:
+	add	x0, x0, :lo12:.LANCHOR20
+	ldrb	w0, [x0, 9]
 	str	w0, [x4, 2056]
 	bl	nandc_wait_flash_ready
-	ldr	x0, [x10, #:lo12:.LANCHOR16]
+	ldr	x0, [x11, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L399
-	cbz	w21, .L399
+	bne	.L424
+	cbz	w21, .L424
 	str	w21, [x4, 2056]
-.L399:
+.L424:
 	str	wzr, [x4, 2056]
 	str	wzr, [x4, 2052]
 	str	wzr, [x4, 2052]
-.L412:
-	ldp	x21, x22, [sp, 32]
+	str	w12, [x4, 2052]
+	ldrb	w0, [x5, #:lo12:.LANCHOR31]
+	str	w7, [x4, 2052]
 	str	w6, [x4, 2052]
-	str	w5, [x4, 2052]
-	mov	w0, 48
+	cbz	w0, .L445
+	lsr	w19, w19, 24
 	str	w19, [x4, 2052]
-	str	w0, [x4, 2056]
+.L445:
 	ldp	x19, x20, [sp, 16]
+	mov	w0, 48
+	ldp	x21, x22, [sp, 32]
+	str	w0, [x4, 2056]
 	ldp	x29, x30, [sp], 48
-	b	nandc_de_cs.constprop.31
-.L395:
-	ldr	x0, [x10, #:lo12:.LANCHOR16]
+	b	nandc_de_cs.constprop.33
+.L419:
+	ldr	x0, [x11, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L397
-	adrp	x0, .LANCHOR35
-	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbnz	w0, .L397
+	bne	.L421
+	adrp	x0, .LANCHOR36
+	ldrb	w0, [x0, #:lo12:.LANCHOR36]
+	cbnz	w0, .L421
+	adrp	x0, .LANCHOR37
+	ldrb	w0, [x0, #:lo12:.LANCHOR37]
+	cbnz	w0, .L421
 	sxtw	x0, w8
 	add	x0, x0, 8
-	add	x0, x11, x0, lsl 8
+	add	x0, x10, x0, lsl 8
 	str	w21, [x0, 8]
-	b	.L396
-.L397:
+	b	.L420
+.L421:
 	mov	w0, w8
 	bl	zftl_flash_exit_slc_mode
-	b	.L396
-.L398:
+	b	.L420
+.L422:
+	ldr	x1, [x11, #:lo12:.LANCHOR16]
+	ldrb	w11, [x1, 7]
+	cmp	w11, 1
+	bne	.L427
+	ldrb	w11, [x1, 12]
+	cmp	w11, 2
+	bne	.L427
+	add	x8, x8, 8
+	mov	w11, 38
+	add	x8, x10, x8, lsl 8
+	str	w11, [x8, 8]
+.L427:
+	add	x8, x0, :lo12:.LANCHOR20
+	add	x4, x10, x4, lsl 8
+	ldrb	w8, [x8, 8]
+	str	w8, [x4, 2056]
+	str	w5, [x4, 2052]
 	str	w3, [x4, 2052]
-	ldr	x1, [x10, #:lo12:.LANCHOR16]
 	str	w2, [x4, 2052]
-	str	w22, [x4, 2052]
 	ldrb	w1, [x1, 12]
 	cmp	w1, 3
-	bne	.L401
-	cbz	w21, .L401
+	bne	.L428
+	cbz	w21, .L428
 	str	w21, [x4, 2056]
-.L401:
+.L428:
 	add	x0, x0, :lo12:.LANCHOR20
 	ldrb	w0, [x0, 9]
 	str	w0, [x4, 2056]
-	b	.L412
+	str	w12, [x4, 2052]
+	str	w7, [x4, 2052]
+	str	w6, [x4, 2052]
+	b	.L445
 	.size	flash_start_plane_read, .-flash_start_plane_read
 	.section	.text.flash_set_interface_mode,"ax",@progbits
 	.align	2
@@ -2148,50 +2290,50 @@ flash_set_interface_mode:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR44
+	adrp	x22, .LANCHOR48
 	stp	x19, x20, [sp, 16]
 	adrp	x21, .LANCHOR14
 	stp	x23, x24, [sp, 48]
-	adrp	x20, .LANCHOR45
+	adrp	x20, .LANCHOR49
 	mov	w23, w0
-	add	x22, x22, :lo12:.LANCHOR44
-	add	x20, x20, :lo12:.LANCHOR45
+	add	x22, x22, :lo12:.LANCHOR48
+	add	x20, x20, :lo12:.LANCHOR49
 	add	x21, x21, :lo12:.LANCHOR14
 	str	x25, [sp, 64]
 	mov	x25, 0
-.L426:
+.L459:
 	adrp	x0, .LANCHOR13
 	ldr	x19, [x0, #:lo12:.LANCHOR13]
 	lsl	x0, x25, 3
 	ldrb	w24, [x0, x22]
 	cmp	w24, 69
-	beq	.L414
+	beq	.L447
 	add	w0, w24, 119
 	cmp	w24, 44
 	and	w1, w0, 255
 	cset	w2, eq
 	cmp	w1, 18
-	bhi	.L427
+	bhi	.L460
 	mov	x0, 32769
 	movk	x0, 0x4, lsl 16
 	lsr	x0, x0, x1
 	mvn	x0, x0
-.L415:
+.L448:
 	and	w0, w0, 1
 	eor	w0, w0, 1
 	orr	w0, w2, w0
-	cbz	w0, .L416
-.L414:
+	cbz	w0, .L449
+.L447:
 	ldrb	w1, [x20]
 	cmp	w23, 1
-	bne	.L417
-	tbz	x1, 0, .L416
+	bne	.L450
+	tbz	x1, 0, .L449
 	ldr	w0, [x21]
-	tbz	x0, 12, .L418
+	tbz	x0, 12, .L451
 	adrp	x0, .LC36
 	add	x0, x0, :lo12:.LC36
 	bl	printf
-.L418:
+.L451:
 	add	x0, x19, x25, lsl 8
 	mov	w1, 239
 	cmp	w24, 44
@@ -2199,19 +2341,20 @@ flash_set_interface_mode:
 	mov	w1, 137
 	ccmp	w24, w1, 4, ne
 	mov	w1, 1
-	bne	.L419
+	bne	.L452
+.L483:
 	str	w1, [x0, 2052]
 	mov	w1, 5
-.L449:
+.L482:
 	str	w1, [x0, 2048]
-.L424:
+.L457:
 	str	wzr, [x0, 2048]
 	str	wzr, [x0, 2048]
 	str	wzr, [x0, 2048]
-.L416:
+.L449:
 	add	x25, x25, 1
 	cmp	x25, 4
-	bne	.L426
+	bne	.L459
 	bl	nandc_wait_flash_ready
 	ldr	x25, [sp, 64]
 	mov	w0, 0
@@ -2220,50 +2363,46 @@ flash_set_interface_mode:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L427:
+.L460:
 	mov	x0, 1
-	b	.L415
-.L419:
+	b	.L448
+.L452:
 	cmp	w24, 155
-	bne	.L421
-	str	w1, [x0, 2052]
-	mov	w1, 3
-	b	.L449
-.L421:
+	beq	.L483
 	mov	w2, 128
 	str	w2, [x0, 2052]
-	b	.L449
-.L417:
-	tbz	x1, 2, .L416
+	b	.L482
+.L450:
+	tbz	x1, 2, .L449
 	ldr	w0, [x21]
-	tbz	x0, 12, .L422
+	tbz	x0, 12, .L455
 	adrp	x0, .LC37
 	add	x0, x0, :lo12:.LC37
 	bl	printf
-.L422:
+.L455:
 	add	x0, x19, x25, lsl 8
 	mov	w1, 239
 	cmp	w24, 44
 	str	w1, [x0, 2056]
 	mov	w1, 137
 	ccmp	w24, w1, 4, ne
-	bne	.L423
+	bne	.L456
 	mov	w1, 1
 	str	w1, [x0, 2052]
 	mov	w1, 35
-	b	.L449
-.L423:
+	b	.L482
+.L456:
 	cmp	w24, 155
-	bne	.L425
+	bne	.L458
 	mov	w1, 1
 	str	w1, [x0, 2052]
 	mov	w1, 37
-	b	.L449
-.L425:
+	b	.L482
+.L458:
 	mov	w1, 128
 	str	w1, [x0, 2052]
 	str	wzr, [x0, 2048]
-	b	.L424
+	b	.L457
 	.size	flash_set_interface_mode, .-flash_set_interface_mode
 	.section	.text.mt_auto_read_calibration_config,"ax",@progbits
 	.align	2
@@ -2343,12 +2482,12 @@ flash_read_id:
 	strb	w0, [x8, 6]
 	ldr	w0, [x2, 2048]
 	strb	w0, [x8, 7]
-	bl	nandc_de_cs.constprop.31
+	bl	nandc_de_cs.constprop.33
 	ldrb	w2, [x8]
 	sub	w0, w2, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bhi	.L453
+	bhi	.L487
 	ldrb	w7, [x8, 5]
 	add	w1, w10, 1
 	ldrb	w6, [x8, 4]
@@ -2359,7 +2498,7 @@ flash_read_id:
 	ldrb	w3, [x8, 1]
 	ldp	x29, x30, [sp], 16
 	b	printf
-.L453:
+.L487:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	flash_read_id, .-flash_read_id
@@ -2370,10 +2509,10 @@ flash_read_id:
 flash_read_spare:
 	stp	x29, x30, [sp, -16]!
 	mov	x5, x2
-	adrp	x2, .LANCHOR32+9
+	adrp	x2, .LANCHOR33+9
 	ubfiz	x0, x0, 8, 8
 	add	x29, sp, 0
-	ldrb	w3, [x2, #:lo12:.LANCHOR32+9]
+	ldrb	w3, [x2, #:lo12:.LANCHOR33+9]
 	adrp	x2, .LANCHOR13
 	ldr	x4, [x2, #:lo12:.LANCHOR13]
 	lsl	w3, w3, 9
@@ -2450,12 +2589,12 @@ flash_read_otp_data:
 	str	w0, [x19, 2056]
 	bl	nandc_wait_flash_ready
 	mov	x0, 0
-.L459:
+.L493:
 	ldr	w1, [x19, 2048]
 	strb	w1, [x21, x0]
 	add	x0, x0, 1
 	cmp	x0, 16384
-	bne	.L459
+	bne	.L493
 	mov	w0, 239
 	str	w0, [x19, 2056]
 	mov	w0, 144
@@ -2469,7 +2608,7 @@ flash_read_otp_data:
 	str	wzr, [x19, 2048]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
-	b	nandc_de_cs.constprop.31
+	b	nandc_de_cs.constprop.33
 	.size	flash_read_otp_data, .-flash_read_otp_data
 	.section	.text.sandisk_prog_test_bad_block,"ax",@progbits
 	.align	2
@@ -2482,16 +2621,16 @@ sandisk_prog_test_bad_block:
 	and	x2, x0, 255
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR32
+	adrp	x20, .LANCHOR33
 	ldr	x19, [x1, #:lo12:.LANCHOR13]
-	add	x1, x20, :lo12:.LANCHOR32
+	add	x1, x20, :lo12:.LANCHOR33
 	str	x21, [sp, 32]
 	mov	x0, x2
 	add	x2, x2, 8
 	ldrb	w1, [x1, 29]
 	add	x2, x19, x2, lsl 8
-	cbz	w1, .L463
-.L477:
+	cbz	w1, .L497
+.L511:
 	ubfiz	x0, x0, 8, 8
 	str	w1, [x2, 8]
 	add	x19, x19, x0
@@ -2515,28 +2654,28 @@ sandisk_prog_test_bad_block:
 	ldr	w2, [x19, 2048]
 	mov	w0, 5
 	ands	w21, w2, w0
-	beq	.L465
+	beq	.L499
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L465
+	tbz	x0, 12, .L499
 	adrp	x0, .LC40
 	mov	w1, w4
 	add	x0, x0, :lo12:.LC40
 	bl	printf
-.L465:
-	add	x20, x20, :lo12:.LANCHOR32
+.L499:
+	add	x20, x20, :lo12:.LANCHOR33
 	ldrb	w0, [x20, 30]
-	cbz	w0, .L462
+	cbz	w0, .L496
 	str	w0, [x19, 2056]
-.L462:
+.L496:
 	mov	w0, w21
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L463:
+.L497:
 	mov	w1, 162
-	b	.L477
+	b	.L511
 	.size	sandisk_prog_test_bad_block, .-sandisk_prog_test_bad_block
 	.section	.text.nandc_rdy_status,"ax",@progbits
 	.align	2
@@ -2563,24 +2702,24 @@ nandc_bch_sel:
 	ldr	w1, [sp, 8]
 	orr	w1, w1, 1
 	str	w1, [sp, 8]
-	adrp	x1, .LANCHOR46
-	strb	w0, [x1, #:lo12:.LANCHOR46]
+	adrp	x1, .LANCHOR50
+	strb	w0, [x1, #:lo12:.LANCHOR50]
 	adrp	x1, .LANCHOR28
 	ldrb	w1, [x1, #:lo12:.LANCHOR28]
 	cmp	w1, 9
 	adrp	x1, .LANCHOR13
-	bne	.L481
+	bne	.L515
 	ldr	x1, [x1, #:lo12:.LANCHOR13]
 	cmp	w0, 70
 	ldr	w2, [sp, 8]
 	str	w2, [x1, 16]
-	beq	.L487
+	beq	.L521
 	cmp	w0, 60
-	beq	.L488
+	beq	.L522
 	cmp	w0, 40
 	cset	w0, eq
 	add	w0, w0, 1
-.L482:
+.L516:
 	str	wzr, [sp]
 	ldr	w2, [sp]
 	bfi	w2, w0, 25, 3
@@ -2590,16 +2729,16 @@ nandc_bch_sel:
 	str	w0, [sp]
 	ldr	w0, [sp]
 	str	w0, [x1, 32]
-.L480:
+.L514:
 	add	sp, sp, 16
 	ret
-.L487:
+.L521:
 	mov	w0, 0
-	b	.L482
-.L488:
+	b	.L516
+.L522:
 	mov	w0, 3
-	b	.L482
-.L481:
+	b	.L516
+.L515:
 	ldr	x2, [x1, #:lo12:.LANCHOR13]
 	mov	w3, 16
 	ldr	w1, [sp, 8]
@@ -2612,20 +2751,20 @@ nandc_bch_sel:
 	ldr	w1, [sp]
 	and	w1, w1, -262145
 	str	w1, [sp]
-	bne	.L484
-.L491:
-	ldr	w0, [sp]
+	bne	.L518
+.L525:
+	ldr	w0, [sp]
 	and	w0, w0, -17
-	b	.L492
-.L484:
+	b	.L526
+.L518:
 	cmp	w0, 24
-	bne	.L486
+	bne	.L520
 	ldr	w0, [sp]
 	orr	w0, w0, 16
-.L492:
+.L526:
 	str	w0, [sp]
-	b	.L485
-.L486:
+	b	.L519
+.L520:
 	ldr	w1, [sp]
 	cmp	w0, 40
 	orr	w1, w1, 262144
@@ -2633,14 +2772,14 @@ nandc_bch_sel:
 	ldr	w1, [sp]
 	orr	w1, w1, 16
 	str	w1, [sp]
-	beq	.L491
-.L485:
+	beq	.L525
+.L519:
 	ldr	w0, [sp]
 	orr	w0, w0, 1
 	str	w0, [sp]
 	ldr	w0, [sp]
 	str	w0, [x2, 12]
-	b	.L480
+	b	.L514
 	.size	nandc_bch_sel, .-nandc_bch_sel
 	.section	.text.zftl_nandc_get_irq_status,"ax",@progbits
 	.align	2
@@ -2650,10 +2789,10 @@ zftl_nandc_get_irq_status:
 	adrp	x1, .LANCHOR28
 	ldrb	w1, [x1, #:lo12:.LANCHOR28]
 	cmp	w1, 9
-	bne	.L494
+	bne	.L528
 	ldr	w0, [x0, 296]
 	ret
-.L494:
+.L528:
 	ldr	w0, [x0, 372]
 	ret
 	.size	zftl_nandc_get_irq_status, .-zftl_nandc_get_irq_status
@@ -2685,7 +2824,7 @@ rk_nandc_flash_xfer_completed:
 nandc_xfer_start:
 	stp	x29, x30, [sp, -80]!
 	and	w1, w1, 255
-	adrp	x4, .LANCHOR49
+	adrp	x4, .LANCHOR53
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 255
@@ -2696,7 +2835,7 @@ nandc_xfer_start:
 	ldrb	w0, [x0, #:lo12:.LANCHOR28]
 	cmp	w0, 9
 	add	w0, w1, 1
-	bne	.L500
+	bne	.L534
 	str	wzr, [x29, 56]
 	mov	w5, 1
 	ubfx	x0, x0, 1, 6
@@ -2724,18 +2863,18 @@ nandc_xfer_start:
 	ldr	w0, [x29, 56]
 	orr	w0, w0, 128
 	str	w0, [x29, 56]
-	adrp	x0, .LANCHOR47
-	ldrb	w0, [x0, #:lo12:.LANCHOR47]
-	cbz	w0, .L501
-	adrp	x0, .LANCHOR48
-	ldrb	w0, [x0, #:lo12:.LANCHOR48]
-	cbz	w0, .L501
+	adrp	x0, .LANCHOR51
+	ldrb	w0, [x0, #:lo12:.LANCHOR51]
+	cbz	w0, .L535
+	adrp	x0, .LANCHOR52
+	ldrb	w0, [x0, #:lo12:.LANCHOR52]
+	cbz	w0, .L535
 	ldr	w0, [x29, 56]
 	orr	w0, w0, 512
 	str	w0, [x29, 56]
-.L501:
+.L535:
 	ldr	w0, [x29, 56]
-	add	x19, x4, :lo12:.LANCHOR49
+	add	x19, x4, :lo12:.LANCHOR53
 	add	x1, x2, 63
 	and	x1, x1, -64
 	ubfx	x0, x0, 22, 6
@@ -2782,8 +2921,8 @@ nandc_xfer_start:
 	ldr	w1, [x29, 64]
 	orr	w1, w1, 1
 	str	w1, [x29, 64]
-	adrp	x1, .LANCHOR50
-	ldrh	w2, [x1, #:lo12:.LANCHOR50]
+	adrp	x1, .LANCHOR54
+	ldrh	w2, [x1, #:lo12:.LANCHOR54]
 	ldr	w1, [x29, 64]
 	bfi	w1, w2, 16, 11
 	str	w1, [x29, 64]
@@ -2796,12 +2935,12 @@ nandc_xfer_start:
 	str	w1, [x29, 56]
 	ldr	w1, [x29, 56]
 	str	w1, [x0, 16]
-.L499:
+.L533:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 80
 	ret
-.L500:
+.L534:
 	ldr	x5, [x21, #:lo12:.LANCHOR13]
 	mov	w7, 16
 	ubfx	x0, x0, 1, 6
@@ -2839,24 +2978,24 @@ nandc_xfer_start:
 	ldr	w5, [x29, 56]
 	bfi	w5, w0, 22, 6
 	str	w5, [x29, 56]
-	cbz	w20, .L503
-	adrp	x0, .LANCHOR46
+	cbz	w20, .L537
+	adrp	x0, .LANCHOR50
 	ubfx	x1, x1, 1, 7
-	ldr	x8, [x4, #:lo12:.LANCHOR49]
+	ldr	x8, [x4, #:lo12:.LANCHOR53]
 	add	x1, x3, x1, lsl 2
-	ldrb	w0, [x0, #:lo12:.LANCHOR46]
+	ldrb	w0, [x0, #:lo12:.LANCHOR50]
 	mov	w5, 64
 	cmp	w0, 25
 	mov	w0, 128
 	csel	w5, w5, w0, cc
 	mov	w0, 0
-.L505:
+.L539:
 	add	w7, w5, w0
 	cmp	x3, x1
-	bne	.L506
-.L507:
-	add	x19, x4, :lo12:.LANCHOR49
-	ldr	x0, [x4, #:lo12:.LANCHOR49]
+	bne	.L540
+.L541:
+	add	x19, x4, :lo12:.LANCHOR53
+	ldr	x0, [x4, #:lo12:.LANCHOR53]
 	add	x1, x2, 63
 	and	x1, x1, -64
 	stp	x2, x0, [x19, 8]
@@ -2917,8 +3056,8 @@ nandc_xfer_start:
 	str	w1, [x29, 56]
 	ldr	w1, [x29, 56]
 	str	w1, [x0, 8]
-	b	.L499
-.L506:
+	b	.L533
+.L540:
 	ldrh	w10, [x3]
 	and	x0, x0, 4294967292
 	ldrh	w6, [x3, 2]
@@ -2926,11 +3065,11 @@ nandc_xfer_start:
 	orr	x6, x10, x6, lsl 16
 	str	w6, [x8, x0]
 	mov	w0, w7
-	b	.L505
-.L503:
-	ldr	x0, [x4, #:lo12:.LANCHOR49]
+	b	.L539
+.L537:
+	ldr	x0, [x4, #:lo12:.LANCHOR53]
 	str	w6, [x0]
-	b	.L507
+	b	.L541
 	.size	nandc_xfer_start, .-nandc_xfer_start
 	.section	.text.nandc_set_seed,"ax",@progbits
 	.align	2
@@ -2938,11 +3077,11 @@ nandc_xfer_start:
 	.type	nandc_set_seed, %function
 nandc_set_seed:
 	and	x0, x0, 127
-	adrp	x1, .LANCHOR51
-	add	x1, x1, :lo12:.LANCHOR51
+	adrp	x1, .LANCHOR55
+	add	x1, x1, :lo12:.LANCHOR55
 	ldrh	w0, [x1, x0, lsl 1]
-	adrp	x1, .LANCHOR48
-	ldrb	w2, [x1, #:lo12:.LANCHOR48]
+	adrp	x1, .LANCHOR52
+	ldrb	w2, [x1, #:lo12:.LANCHOR52]
 	orr	w1, w0, -1073741824
 	cmp	w2, 0
 	csel	w0, w1, w0, ne
@@ -2951,10 +3090,10 @@ nandc_set_seed:
 	cmp	w1, 9
 	adrp	x1, .LANCHOR13
 	ldr	x1, [x1, #:lo12:.LANCHOR13]
-	bne	.L518
+	bne	.L552
 	str	w0, [x1, 520]
 	ret
-.L518:
+.L552:
 	str	w0, [x1, 336]
 	ret
 	.size	nandc_set_seed, .-nandc_set_seed
@@ -2969,40 +3108,40 @@ zftl_flash_de_init:
 	bl	nandc_wait_flash_ready
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L523
+	cbz	w0, .L557
 	adrp	x0, .LANCHOR19
 	ldrb	w0, [x0, #:lo12:.LANCHOR19]
-	cbnz	w0, .L523
+	cbnz	w0, .L557
 	adrp	x0, .LANCHOR28
 	ldrb	w0, [x0, #:lo12:.LANCHOR28]
 	cmp	w0, 9
-	beq	.L523
+	beq	.L557
 	mov	w0, 0
 	bl	zftl_flash_exit_slc_mode
-.L523:
+.L557:
 	adrp	x19, .LANCHOR21
 	mov	w0, 0
 	bl	hynix_reconfig_rr_para
 	ldrb	w0, [x19, #:lo12:.LANCHOR21]
-	cbz	w0, .L524
-	adrp	x0, .LANCHOR45
-	ldrb	w0, [x0, #:lo12:.LANCHOR45]
-	tbz	x0, 0, .L524
+	cbz	w0, .L558
+	adrp	x0, .LANCHOR49
+	ldrb	w0, [x0, #:lo12:.LANCHOR49]
+	tbz	x0, 0, .L558
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
 	bl	nandc_set_if_mode
 	strb	wzr, [x19, #:lo12:.LANCHOR21]
-.L524:
-	adrp	x3, .LANCHOR48
-	ldrb	w0, [x3, #:lo12:.LANCHOR48]
-	cbz	w0, .L525
+.L558:
+	adrp	x3, .LANCHOR52
+	ldrb	w0, [x3, #:lo12:.LANCHOR52]
+	cbz	w0, .L559
 	mov	w0, 0
-	strb	wzr, [x3, #:lo12:.LANCHOR48]
+	strb	wzr, [x3, #:lo12:.LANCHOR52]
 	bl	nandc_set_seed
 	mov	w0, 1
-	strb	w0, [x3, #:lo12:.LANCHOR48]
-.L525:
+	strb	w0, [x3, #:lo12:.LANCHOR52]
+.L559:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -3013,8 +3152,8 @@ zftl_flash_de_init:
 	.global	nandc_randomizer_enable
 	.type	nandc_randomizer_enable, %function
 nandc_randomizer_enable:
-	adrp	x1, .LANCHOR48
-	strb	w0, [x1, #:lo12:.LANCHOR48]
+	adrp	x1, .LANCHOR52
+	strb	w0, [x1, #:lo12:.LANCHOR52]
 	ret
 	.size	nandc_randomizer_enable, .-nandc_randomizer_enable
 	.section	.text.nandc_get_chip_if,"ax",@progbits
@@ -3034,10 +3173,10 @@ nandc_get_chip_if:
 	.global	buf_reinit
 	.type	buf_reinit, %function
 buf_reinit:
-	adrp	x0, .LANCHOR52
-	add	x1, x0, :lo12:.LANCHOR52
+	adrp	x0, .LANCHOR56
+	add	x1, x0, :lo12:.LANCHOR56
 	mov	w2, 0
-.L545:
+.L579:
 	and	w3, w2, 255
 	strb	wzr, [x1, 2]
 	add	w4, w3, 1
@@ -3047,14 +3186,14 @@ buf_reinit:
 	str	xzr, [x1, 16]
 	cmp	w2, 32
 	add	x1, x1, 64
-	bne	.L545
-	add	x0, x0, :lo12:.LANCHOR52
+	bne	.L579
+	add	x0, x0, :lo12:.LANCHOR56
 	mov	w1, -1
 	strb	w1, [x0, 1984]
-	adrp	x0, .LANCHOR53
-	strb	wzr, [x0, #:lo12:.LANCHOR53]
-	adrp	x0, .LANCHOR54
-	strb	w2, [x0, #:lo12:.LANCHOR54]
+	adrp	x0, .LANCHOR57
+	strb	wzr, [x0, #:lo12:.LANCHOR57]
+	adrp	x0, .LANCHOR58
+	strb	w2, [x0, #:lo12:.LANCHOR58]
 	ret
 	.size	buf_reinit, .-buf_reinit
 	.section	.text.buf_add_tail,"ax",@progbits
@@ -3072,49 +3211,49 @@ buf_add_tail:
 	mov	x20, x1
 	ldrb	w1, [x19]
 	cmp	w1, 255
-	bne	.L553
+	bne	.L587
 	ldrb	w0, [x20, 1]
 	cmp	w0, 255
-	bne	.L549
-	adrp	x1, .LANCHOR55
+	bne	.L583
+	adrp	x1, .LANCHOR59
 	adrp	x0, .LC0
 	mov	w2, 74
-	add	x1, x1, :lo12:.LANCHOR55
+	add	x1, x1, :lo12:.LANCHOR59
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L549:
+.L583:
 	ldrb	w0, [x20, 1]
 	strb	w0, [x19]
-.L547:
+.L581:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L553:
-	adrp	x0, .LANCHOR52
-	add	x2, x0, :lo12:.LANCHOR52
+.L587:
+	adrp	x0, .LANCHOR56
+	add	x2, x0, :lo12:.LANCHOR56
 	mov	x19, x0
-.L554:
+.L588:
 	sbfiz	x0, x1, 6, 32
 	mov	w21, w1
 	ldrb	w1, [x2, x0]
 	cmp	w1, 255
-	bne	.L554
+	bne	.L588
 	ldrb	w0, [x20, 1]
 	cmp	w0, 255
-	bne	.L551
-	adrp	x1, .LANCHOR55
+	bne	.L585
+	adrp	x1, .LANCHOR59
 	adrp	x0, .LC0
 	mov	w2, 81
-	add	x1, x1, :lo12:.LANCHOR55
+	add	x1, x1, :lo12:.LANCHOR59
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L551:
-	add	x0, x19, :lo12:.LANCHOR52
+.L585:
+	add	x0, x19, :lo12:.LANCHOR56
 	sbfiz	x21, x21, 6, 32
 	ldrb	w1, [x20, 1]
 	strb	w1, [x0, x21]
-	b	.L547
+	b	.L581
 	.size	buf_add_tail, .-buf_add_tail
 	.section	.text.queue_read_cmd,"ax",@progbits
 	.align	2
@@ -3133,9 +3272,9 @@ queue_read_cmd:
 	mov	w0, -1
 	strb	w0, [x19]
 	mov	x1, x19
-	adrp	x0, .LANCHOR56
+	adrp	x0, .LANCHOR60
 	ldr	x19, [sp, 16]
-	add	x0, x0, :lo12:.LANCHOR56
+	add	x0, x0, :lo12:.LANCHOR60
 	ldp	x29, x30, [sp], 32
 	b	buf_add_tail
 	.size	queue_read_cmd, .-queue_read_cmd
@@ -3145,33 +3284,33 @@ queue_read_cmd:
 	.type	zbuf_free, %function
 zbuf_free:
 	ldrb	w1, [x0, 2]
-	adrp	x2, .LANCHOR53
+	adrp	x2, .LANCHOR57
 	and	w1, w1, 8
 	strb	w1, [x0, 2]
-	cbz	w1, .L559
+	cbz	w1, .L593
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L559
+	beq	.L593
 	stp	x29, x30, [sp, -16]!
 	mov	x1, x0
-	add	x0, x2, :lo12:.LANCHOR53
+	add	x0, x2, :lo12:.LANCHOR57
 	add	x29, sp, 0
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR54
+	adrp	x1, .LANCHOR58
 	ldp	x29, x30, [sp], 16
-	ldrb	w0, [x1, #:lo12:.LANCHOR54]
+	ldrb	w0, [x1, #:lo12:.LANCHOR58]
 	add	w0, w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR54]
+	strb	w0, [x1, #:lo12:.LANCHOR58]
 	ret
-.L559:
-	ldrb	w1, [x2, #:lo12:.LANCHOR53]
+.L593:
+	ldrb	w1, [x2, #:lo12:.LANCHOR57]
 	strb	w1, [x0]
-	adrp	x1, .LANCHOR54
+	adrp	x1, .LANCHOR58
 	ldrb	w0, [x0, 1]
-	strb	w0, [x2, #:lo12:.LANCHOR53]
-	ldrb	w0, [x1, #:lo12:.LANCHOR54]
+	strb	w0, [x2, #:lo12:.LANCHOR57]
+	ldrb	w0, [x1, #:lo12:.LANCHOR58]
 	add	w0, w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR54]
+	strb	w0, [x1, #:lo12:.LANCHOR58]
 	ret
 	.size	zbuf_free, .-zbuf_free
 	.section	.text.buf_alloc,"ax",@progbits
@@ -3182,29 +3321,29 @@ buf_alloc:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR54
+	adrp	x19, .LANCHOR58
 	and	w20, w0, 255
-	ldrb	w0, [x19, #:lo12:.LANCHOR54]
-	cbz	w0, .L572
-.L575:
-	adrp	x2, .LANCHOR53
-	adrp	x1, .LANCHOR52
-	add	x0, x1, :lo12:.LANCHOR52
-	ldrb	w3, [x2, #:lo12:.LANCHOR53]
+	ldrb	w0, [x19, #:lo12:.LANCHOR58]
+	cbz	w0, .L606
+.L609:
+	adrp	x2, .LANCHOR57
+	adrp	x1, .LANCHOR56
+	add	x0, x1, :lo12:.LANCHOR56
+	ldrb	w3, [x2, #:lo12:.LANCHOR57]
 	ubfiz	x4, x3, 6, 8
 	add	x0, x0, x4
 	mov	x4, x2
-	cbz	w20, .L573
-.L574:
-	add	x1, x1, :lo12:.LANCHOR52
+	cbz	w20, .L607
+.L608:
+	add	x1, x1, :lo12:.LANCHOR56
 	sbfiz	x3, x3, 6, 32
 	add	x2, x1, x3
 	ldrb	w5, [x1, x3]
-	strb	w5, [x4, #:lo12:.LANCHOR53]
-	ldrb	w4, [x19, #:lo12:.LANCHOR54]
+	strb	w5, [x4, #:lo12:.LANCHOR57]
+	ldrb	w4, [x19, #:lo12:.LANCHOR58]
 	strh	wzr, [x2, 50]
 	sub	w4, w4, #1
-	strb	w4, [x19, #:lo12:.LANCHOR54]
+	strb	w4, [x19, #:lo12:.LANCHOR58]
 	mov	w4, 1
 	strb	wzr, [x2, 56]
 	strb	w4, [x2, 2]
@@ -3214,27 +3353,27 @@ buf_alloc:
 	mov	w1, -1
 	str	xzr, [x2, 16]
 	str	w1, [x2, 36]
-	b	.L571
-.L572:
+	b	.L605
+.L606:
 	mov	w2, 121
-	adrp	x1, .LANCHOR57
+	adrp	x1, .LANCHOR61
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR57
+	add	x1, x1, :lo12:.LANCHOR61
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	ldrb	w0, [x19, #:lo12:.LANCHOR54]
-	cbnz	w0, .L575
-.L577:
+	ldrb	w0, [x19, #:lo12:.LANCHOR58]
+	cbnz	w0, .L609
+.L611:
 	mov	x0, 0
-.L571:
+.L605:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L573:
-	ldrb	w2, [x19, #:lo12:.LANCHOR54]
+.L607:
+	ldrb	w2, [x19, #:lo12:.LANCHOR58]
 	cmp	w2, 1
-	bne	.L574
-	b	.L577
+	bne	.L608
+	b	.L611
 	.size	buf_alloc, .-buf_alloc
 	.section	.text.buf_remove_buf,"ax",@progbits
 	.align	2
@@ -3244,30 +3383,30 @@ buf_remove_buf:
 	ldrb	w4, [x1, 1]
 	ldrb	w2, [x0]
 	cmp	w4, w2
-	bne	.L585
+	bne	.L619
 	ldrb	w1, [x1]
 	strb	w1, [x0]
-.L589:
+.L623:
 	mov	w0, 1
 	ret
-.L586:
+.L620:
 	mov	w3, w2
 	sbfiz	x2, x2, 6, 32
 	ldrb	w2, [x0, x2]
 	cmp	w4, w2
-	bne	.L587
+	bne	.L621
 	sbfiz	x3, x3, 6, 32
 	ldrb	w2, [x1]
 	strb	w2, [x0, x3]
 	mov	w0, -1
 	strb	w0, [x1]
-	b	.L589
-.L585:
-	adrp	x0, .LANCHOR52
-	add	x0, x0, :lo12:.LANCHOR52
-.L587:
+	b	.L623
+.L619:
+	adrp	x0, .LANCHOR56
+	add	x0, x0, :lo12:.LANCHOR56
+.L621:
 	cmp	w2, 255
-	bne	.L586
+	bne	.L620
 	mov	w0, 0
 	ret
 	.size	buf_remove_buf, .-buf_remove_buf
@@ -3279,43 +3418,108 @@ buf_remove_free:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR54
+	adrp	x19, .LANCHOR58
 	mov	x20, x0
-	ldrb	w0, [x19, #:lo12:.LANCHOR54]
-	cbnz	w0, .L591
-	adrp	x1, .LANCHOR58
+	ldrb	w0, [x19, #:lo12:.LANCHOR58]
+	cbnz	w0, .L625
+	adrp	x1, .LANCHOR62
 	adrp	x0, .LC0
 	mov	w2, 172
-	add	x1, x1, :lo12:.LANCHOR58
+	add	x1, x1, :lo12:.LANCHOR62
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L591:
-	ldrb	w0, [x19, #:lo12:.LANCHOR54]
-	cbz	w0, .L590
+.L625:
+	ldrb	w0, [x19, #:lo12:.LANCHOR58]
+	cbz	w0, .L624
 	mov	x1, x20
-	adrp	x0, .LANCHOR53
-	add	x0, x0, :lo12:.LANCHOR53
+	adrp	x0, .LANCHOR57
+	add	x0, x0, :lo12:.LANCHOR57
 	bl	buf_remove_buf
 	cmp	w0, 1
-	bne	.L590
-	ldrb	w0, [x19, #:lo12:.LANCHOR54]
+	bne	.L624
+	ldrb	w0, [x19, #:lo12:.LANCHOR58]
 	sub	w0, w0, #1
-	strb	w0, [x19, #:lo12:.LANCHOR54]
+	strb	w0, [x19, #:lo12:.LANCHOR58]
 	ldrb	w0, [x20, 2]
 	orr	w0, w0, 1
 	strb	w0, [x20, 2]
-.L590:
+.L624:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
 	.size	buf_remove_free, .-buf_remove_free
+	.section	.text.dump_buf_info,"ax",@progbits
+	.align	2
+	.global	dump_buf_info
+	.type	dump_buf_info, %function
+dump_buf_info:
+	sub	sp, sp, #64
+	adrp	x0, .LANCHOR60
+	stp	x29, x30, [sp, 16]
+	add	x29, sp, 16
+	ldrb	w1, [x0, #:lo12:.LANCHOR60]
+	stp	x19, x20, [sp, 32]
+	adrp	x0, .LC41
+	str	x21, [sp, 48]
+	add	x0, x0, :lo12:.LC41
+	adrp	x19, .LANCHOR56
+	add	x19, x19, :lo12:.LANCHOR56
+	bl	printf
+	adrp	x20, .LC47
+	adrp	x0, .LANCHOR63
+	add	x20, x20, :lo12:.LC47
+	add	x21, x19, 2048
+	ldrb	w1, [x0, #:lo12:.LANCHOR63]
+	adrp	x0, .LC42
+	add	x0, x0, :lo12:.LC42
+	bl	printf
+	adrp	x0, .LANCHOR64
+	ldrb	w1, [x0, #:lo12:.LANCHOR64]
+	adrp	x0, .LC43
+	add	x0, x0, :lo12:.LC43
+	bl	printf
+	adrp	x0, .LANCHOR65
+	ldrb	w1, [x0, #:lo12:.LANCHOR65]
+	adrp	x0, .LC44
+	add	x0, x0, :lo12:.LC44
+	bl	printf
+	adrp	x0, .LANCHOR57
+	ldrb	w1, [x0, #:lo12:.LANCHOR57]
+	adrp	x0, .LC45
+	add	x0, x0, :lo12:.LC45
+	bl	printf
+	adrp	x0, .LANCHOR58
+	ldrb	w1, [x0, #:lo12:.LANCHOR58]
+	adrp	x0, .LC46
+	add	x0, x0, :lo12:.LC46
+	bl	printf
+.L631:
+	ldp	w7, w0, [x19, 36]
+	str	w0, [sp]
+	ldrb	w5, [x19, 58]
+	mov	x0, x20
+	ldrh	w4, [x19, 50]
+	add	x19, x19, 64
+	ldrb	w3, [x19, -62]
+	ldrb	w2, [x19, -64]
+	ldrb	w1, [x19, -63]
+	ldr	w6, [x19, -12]
+	bl	printf
+	cmp	x19, x21
+	bne	.L631
+	ldp	x19, x20, [sp, 32]
+	ldp	x29, x30, [sp, 16]
+	ldr	x21, [sp, 48]
+	add	sp, sp, 64
+	ret
+	.size	dump_buf_info, .-dump_buf_info
 	.section	.text.flash_check_bad_block,"ax",@progbits
 	.align	2
 	.global	flash_check_bad_block
 	.type	flash_check_bad_block, %function
 flash_check_bad_block:
-	adrp	x3, .LANCHOR32
-	add	x3, x3, :lo12:.LANCHOR32
+	adrp	x3, .LANCHOR33
+	add	x3, x3, :lo12:.LANCHOR33
 	and	w5, w0, 255
 	lsr	w4, w1, 5
 	and	w1, w1, 31
@@ -3346,14 +3550,14 @@ flash_mask_bad_block:
 	add	x29, sp, 0
 	str	x21, [sp, 32]
 	and	w21, w0, 255
-	adrp	x0, .LANCHOR32
-	add	x0, x0, :lo12:.LANCHOR32
+	adrp	x0, .LANCHOR33
+	add	x0, x0, :lo12:.LANCHOR33
 	stp	x19, x20, [sp, 16]
 	mov	w20, w1
 	ldrh	w19, [x0, 14]
 	ldrb	w1, [x0, 13]
-	adrp	x0, .LC41
-	add	x0, x0, :lo12:.LC41
+	adrp	x0, .LC48
+	add	x0, x0, :lo12:.LC48
 	mul	w19, w19, w1
 	mov	w1, w21
 	bl	printf
@@ -3389,15 +3593,15 @@ ftl_gc_write_buf:
 	orr	w1, w1, 2
 	strb	w1, [x0, 2]
 	mov	x1, x0
-	adrp	x0, .LANCHOR59
-	add	x0, x0, :lo12:.LANCHOR59
+	adrp	x0, .LANCHOR66
+	add	x0, x0, :lo12:.LANCHOR66
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR60
+	adrp	x1, .LANCHOR67
 	ldp	x29, x30, [sp], 16
-	ldrb	w0, [x1, #:lo12:.LANCHOR60]
+	ldrb	w0, [x1, #:lo12:.LANCHOR67]
 	add	w0, w0, 1
 	and	w0, w0, 255
-	strb	w0, [x1, #:lo12:.LANCHOR60]
+	strb	w0, [x1, #:lo12:.LANCHOR67]
 	ret
 	.size	ftl_gc_write_buf, .-ftl_gc_write_buf
 	.section	.text.zftl_cache_flush,"ax",@progbits
@@ -3412,11 +3616,11 @@ zftl_cache_flush:
 	.global	zftl_get_density
 	.type	zftl_get_density, %function
 zftl_get_density:
-	cbnz	w0, .L603
-	adrp	x0, .LANCHOR61
-	ldr	w0, [x0, #:lo12:.LANCHOR61]
+	cbnz	w0, .L641
+	adrp	x0, .LANCHOR68
+	ldr	w0, [x0, #:lo12:.LANCHOR68]
 	ret
-.L603:
+.L641:
 	cmp	w0, 4
 	cset	w0, cc
 	lsl	w0, w0, 13
@@ -3448,8 +3652,8 @@ ftl_scan_all_data:
 	.global	FtlGetCurEraseBlock
 	.type	FtlGetCurEraseBlock, %function
 FtlGetCurEraseBlock:
-	adrp	x0, .LANCHOR62
-	ldrh	w0, [x0, #:lo12:.LANCHOR62]
+	adrp	x0, .LANCHOR69
+	ldrh	w0, [x0, #:lo12:.LANCHOR69]
 	ret
 	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
 	.section	.text.FtlGetAllBlockNum,"ax",@progbits
@@ -3484,7 +3688,7 @@ gc_add_sblk:
 	and	w22, w1, 65535
 	stp	x23, x24, [sp, 48]
 	and	w23, w2, 65535
-	tbz	x0, 8, .L613
+	tbz	x0, 8, .L651
 	adrp	x1, .LANCHOR9
 	uxtw	x0, w19
 	mov	w3, w23
@@ -3494,44 +3698,44 @@ gc_add_sblk:
 	ldrh	w5, [x2, x0, lsl 1]
 	mov	w2, w22
 	add	x1, x1, x0, lsl 2
-	adrp	x0, .LC42
-	add	x0, x0, :lo12:.LC42
+	adrp	x0, .LC49
+	add	x0, x0, :lo12:.LC49
 	ldrb	w4, [x1, 2]
-	adrp	x1, .LANCHOR63
-	ldrh	w7, [x1, #:lo12:.LANCHOR63]
-	adrp	x1, .LANCHOR64+56
+	adrp	x1, .LANCHOR70
+	ldrh	w7, [x1, #:lo12:.LANCHOR70]
+	adrp	x1, .LANCHOR71+56
 	ubfx	x4, x4, 5, 3
-	ldrh	w6, [x1, #:lo12:.LANCHOR64+56]
+	ldrh	w6, [x1, #:lo12:.LANCHOR71+56]
 	mov	w1, w19
 	bl	printf
-.L613:
+.L651:
 	adrp	x0, .LANCHOR6
 	mov	x20, x0
 	ldrh	w1, [x0, #:lo12:.LANCHOR6]
 	cmp	w1, w19
-	bhi	.L614
-	adrp	x1, .LANCHOR65
+	bhi	.L652
+	adrp	x1, .LANCHOR72
 	adrp	x0, .LC0
-	mov	w2, 454
-	add	x1, x1, :lo12:.LANCHOR65
+	mov	w2, 543
+	add	x1, x1, :lo12:.LANCHOR72
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L614:
+.L652:
 	ldrh	w0, [x20, #:lo12:.LANCHOR6]
 	cmp	w0, w19
-	bhi	.L615
+	bhi	.L653
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L637
-	adrp	x0, .LC43
+	tbz	x0, 10, .L675
+	adrp	x0, .LC50
 	mov	w3, w23
 	mov	w2, w22
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC43
+	add	x0, x0, :lo12:.LC50
 	bl	printf
-.L637:
+.L675:
 	mov	w0, 0
-	b	.L612
-.L615:
+	b	.L650
+.L653:
 	adrp	x1, .LANCHOR9
 	uxtw	x0, w19
 	ldr	x1, [x1, #:lo12:.LANCHOR9]
@@ -3541,122 +3745,122 @@ gc_add_sblk:
 	add	x0, x1, x0, lsl 2
 	ldrb	w2, [x0, 2]
 	tst	w2, 224
-	bne	.L617
-	cbz	w3, .L637
-	mov	w2, 461
-	adrp	x1, .LANCHOR65
+	bne	.L655
+	cbz	w3, .L675
+	mov	w2, 553
+	adrp	x1, .LANCHOR72
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR65
+	add	x1, x1, :lo12:.LANCHOR72
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L637
-.L617:
-	adrp	x0, .LANCHOR64
-	add	x1, x0, :lo12:.LANCHOR64
-	ldrh	w0, [x0, #:lo12:.LANCHOR64]
+	b	.L675
+.L655:
+	adrp	x0, .LANCHOR71
+	add	x1, x0, :lo12:.LANCHOR71
+	ldrh	w0, [x0, #:lo12:.LANCHOR71]
 	cmp	w0, w19
-	beq	.L637
+	beq	.L675
 	adrp	x24, .LANCHOR10
 	ldr	x0, [x24, #:lo12:.LANCHOR10]
 	ldrh	w4, [x0, 48]
 	cmp	w4, w19
-	beq	.L637
+	beq	.L675
 	ldrh	w4, [x0, 16]
 	cmp	w4, w19
-	beq	.L637
+	beq	.L675
 	ldrh	w4, [x0, 80]
 	cmp	w4, w19
-	beq	.L637
+	beq	.L675
 	ldrh	w5, [x1, 56]
 	add	x1, x1, 58
 	mov	w4, 0
-.L618:
+.L656:
 	cmp	w4, w5
-	bcc	.L619
-	cbnz	w22, .L623
-	adrp	x1, .LANCHOR66
-	ldrh	w6, [x1, #:lo12:.LANCHOR66]
+	bcc	.L657
+	cbnz	w22, .L661
+	adrp	x1, .LANCHOR73
+	ldrh	w6, [x1, #:lo12:.LANCHOR73]
 	cmp	w19, w6
-	beq	.L637
-	adrp	x4, .LANCHOR67
-	add	x4, x4, :lo12:.LANCHOR67
+	beq	.L675
+	adrp	x4, .LANCHOR74
+	add	x4, x4, :lo12:.LANCHOR74
 	mov	x1, 0
-.L622:
+.L660:
 	ldrh	w7, [x1, x4]
 	cmp	w19, w7
-	bne	.L621
+	bne	.L659
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L637
+	tbz	x0, 8, .L675
 	mov	w5, w6
 	mov	w4, w19
 	ubfx	x2, x2, 5, 3
 	mov	w1, w19
-	adrp	x0, .LC44
-	add	x0, x0, :lo12:.LC44
+	adrp	x0, .LC51
+	add	x0, x0, :lo12:.LC51
 	bl	printf
-	b	.L637
-.L619:
+	b	.L675
+.L657:
 	ldrh	w6, [x1], 2
 	cmp	w6, w19
-	beq	.L637
+	beq	.L675
 	add	w4, w4, 1
-	b	.L618
-.L621:
+	b	.L656
+.L659:
 	add	x1, x1, 2
 	cmp	x1, 16
-	bne	.L622
+	bne	.L660
 	ubfiz	x20, x23, 7, 16
 	add	x20, x20, 136
 	add	x20, x0, x20
-.L624:
+.L662:
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L625
-	adrp	x0, .LANCHOR63
+	tbz	x0, 8, .L663
+	adrp	x0, .LANCHOR70
 	mov	w4, w3
 	mov	w1, w19
 	ubfx	x3, x2, 5, 3
-	ldrh	w6, [x0, #:lo12:.LANCHOR63]
+	ldrh	w6, [x0, #:lo12:.LANCHOR70]
 	mov	w2, w22
-	adrp	x0, .LC45
-	add	x0, x0, :lo12:.LC45
+	adrp	x0, .LC52
+	add	x0, x0, :lo12:.LC52
 	bl	printf
-.L625:
+.L663:
 	mov	x0, x20
 	add	x1, x20, 128
 	mov	w2, 65535
-.L628:
+.L666:
 	ldrh	w3, [x0]
 	cmp	w3, w2
-	bne	.L626
+	bne	.L664
 	strh	w19, [x0]
-	cbz	w22, .L627
+	cbz	w22, .L665
 	ldr	x1, [x24, #:lo12:.LANCHOR10]
 	ldrh	w0, [x1, 124]
 	add	w0, w0, 1
 	strh	w0, [x1, 124]
-.L647:
+.L685:
 	mov	w0, 1
-.L612:
+.L650:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L623:
+.L661:
 	add	x20, x0, 392
-	b	.L624
-.L627:
+	b	.L662
+.L665:
 	ldr	x0, [x24, #:lo12:.LANCHOR10]
 	add	x23, x0, x23, uxth 1
 	ldrh	w0, [x23, 120]
 	add	w0, w0, 1
 	strh	w0, [x23, 120]
-	b	.L647
-.L626:
+	b	.L685
+.L664:
 	add	x0, x0, 2
 	cmp	x1, x0
-	bne	.L628
-	b	.L647
+	bne	.L666
+	b	.L685
 	.size	gc_add_sblk, .-gc_add_sblk
 	.section	.text.gc_mark_bad_ppa,"ax",@progbits
 	.align	2
@@ -3664,75 +3868,75 @@ gc_add_sblk:
 	.type	gc_mark_bad_ppa, %function
 gc_mark_bad_ppa:
 	stp	x29, x30, [sp, -64]!
-	adrp	x1, .LANCHOR68
-	adrp	x3, .LANCHOR31
+	adrp	x1, .LANCHOR75
+	adrp	x3, .LANCHOR32
 	add	x29, sp, 0
-	ldrh	w1, [x1, #:lo12:.LANCHOR68]
-	ldrb	w3, [x3, #:lo12:.LANCHOR31]
+	ldrh	w1, [x1, #:lo12:.LANCHOR75]
+	ldrb	w3, [x3, #:lo12:.LANCHOR32]
 	stp	x19, x20, [sp, 16]
 	mov	w19, 24
 	sub	w19, w19, w3
 	lsr	w2, w0, w1
 	sub	w19, w19, w1
-	adrp	x1, .LANCHOR69
+	adrp	x1, .LANCHOR76
 	str	x23, [sp, 48]
 	mov	w23, 1
-	ldrb	w1, [x1, #:lo12:.LANCHOR69]
+	ldrb	w1, [x1, #:lo12:.LANCHOR76]
 	lsl	w19, w23, w19
 	sub	w19, w19, #1
 	stp	x21, x22, [sp, 32]
 	and	w19, w19, w2
-	adrp	x20, .LANCHOR64
-	add	x21, x20, :lo12:.LANCHOR64
+	adrp	x20, .LANCHOR71
+	add	x21, x20, :lo12:.LANCHOR71
 	mov	w3, w0
 	and	w22, w2, 65535
-	adrp	x0, .LC46
+	adrp	x0, .LC53
 	udiv	w19, w19, w1
 	mov	w2, w22
-	ldr	w1, [x21, 584]
-	add	x0, x0, :lo12:.LC46
+	ldr	w1, [x21, 2120]
+	add	x0, x0, :lo12:.LC53
 	and	w19, w19, 65535
 	bl	printf
 	mov	w1, w23
 	mov	w2, 0
 	mov	w0, w19
 	bl	gc_add_sblk
-	ldr	w0, [x21, 584]
+	ldr	w0, [x21, 2120]
 	mov	w1, 0
-.L649:
+.L687:
 	cmp	w1, w0
-	bcc	.L651
+	bcc	.L689
 	cmp	w0, 5
-	bhi	.L650
-	add	x20, x20, :lo12:.LANCHOR64
+	bhi	.L688
+	add	x20, x20, :lo12:.LANCHOR71
 	add	w1, w0, 1
-	str	w1, [x20, 584]
+	str	w1, [x20, 2120]
 	add	x20, x20, x0, uxtw 1
-	strh	w22, [x20, 588]
-.L650:
+	strh	w22, [x20, 2124]
+.L688:
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L651:
+.L689:
 	add	x2, x21, x1, sxtw 1
-	ldrh	w2, [x2, 588]
+	ldrh	w2, [x2, 2124]
 	cmp	w2, w22
-	beq	.L650
+	beq	.L688
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L649
+	b	.L687
 	.size	gc_mark_bad_ppa, .-gc_mark_bad_ppa
 	.section	.text.gc_get_src_ppa_from_index,"ax",@progbits
 	.align	2
 	.global	gc_get_src_ppa_from_index
 	.type	gc_get_src_ppa_from_index, %function
 gc_get_src_ppa_from_index:
-	adrp	x1, .LANCHOR70
+	adrp	x1, .LANCHOR77
 	ubfiz	x0, x0, 2, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR70]
+	ldr	x1, [x1, #:lo12:.LANCHOR77]
 	ldr	w0, [x1, x0]
 	ret
 	.size	gc_get_src_ppa_from_index, .-gc_get_src_ppa_from_index
@@ -3743,160 +3947,163 @@ gc_get_src_ppa_from_index:
 gc_write_completed:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR71
 	stp	x21, x22, [sp, 32]
-	adrp	x24, .LANCHOR52
-	add	x23, x23, :lo12:.LANCHOR71
-	add	x22, x24, :lo12:.LANCHOR52
-	stp	x19, x20, [sp, 16]
+	adrp	x22, .LANCHOR64
+	stp	x23, x24, [sp, 48]
+	add	x22, x22, :lo12:.LANCHOR64
 	stp	x25, x26, [sp, 64]
-	stp	x27, x28, [sp, 80]
-.L655:
-	ldrb	w20, [x23]
-	cmp	w20, 255
-	bne	.L668
+	adrp	x23, .LANCHOR56
+	add	x25, x23, :lo12:.LANCHOR56
+	stp	x19, x20, [sp, 16]
+	str	x27, [sp, 80]
+.L693:
+	ldrb	w0, [x22]
+	cmp	w0, 255
+	bne	.L706
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
+	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L668:
-	lsl	x1, x20, 6
-	add	x0, x24, :lo12:.LANCHOR52
-	add	x2, x0, x1
-	ldrb	w0, [x0, x1]
+.L706:
+	sxtw	x20, w0
+	add	x1, x23, :lo12:.LANCHOR56
+	lsl	x3, x20, 6
+	add	x2, x1, x3
+	ldrb	w0, [x1, x3]
 	ldr	w1, [x2, 52]
-	strb	w0, [x23]
-	ldrh	w25, [x2, 48]
-	cbz	w1, .L656
+	strb	w0, [x22]
+	ldrh	w24, [x2, 48]
+	cbz	w1, .L694
 	ldr	w2, [x2, 40]
-	adrp	x0, .LANCHOR64
-	add	x0, x0, :lo12:.LANCHOR64
+	adrp	x0, .LANCHOR71
+	add	x0, x0, :lo12:.LANCHOR71
 	mov	w3, 1
-	str	w2, [x0, 580]
-	strh	w3, [x0, 576]
-	adrp	x0, .LC47
-	add	x0, x0, :lo12:.LC47
+	str	w2, [x0, 2116]
+	strh	w3, [x0, 2112]
+	adrp	x0, .LC54
+	add	x0, x0, :lo12:.LC54
 	bl	printf
-	adrp	x1, .LANCHOR72
+	adrp	x1, .LANCHOR78
 	adrp	x0, .LC0
-	mov	w2, 809
-	add	x1, x1, :lo12:.LANCHOR72
+	mov	w2, 956
+	add	x1, x1, :lo12:.LANCHOR78
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L656:
-	adrp	x27, .LANCHOR73
-	ldrb	w0, [x27, #:lo12:.LANCHOR73]
-	cmp	w0, 3
-	bne	.L657
-	adrp	x0, .LANCHOR35
-	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbnz	w0, .L657
+.L694:
+	adrp	x0, .LANCHOR79
+	mov	x26, x0
+	ldrb	w1, [x0, #:lo12:.LANCHOR79]
+	cmp	w1, 3
+	bne	.L695
+	adrp	x0, .LANCHOR36
+	ldrb	w0, [x0, #:lo12:.LANCHOR36]
+	cbnz	w0, .L695
 	adrp	x0, .LANCHOR10
+	adrp	x1, .LANCHOR80
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
-	ldrb	w19, [x0, 89]
+	ldrb	w1, [x1, #:lo12:.LANCHOR80]
+	ldrb	w0, [x0, 89]
+	mov	w19, w0
+	cmp	w1, w0
+	bhi	.L707
+	cmp	w0, 2
+	mov	w0, 2
+	csel	w19, w19, w0, ls
+.L696:
 	add	w19, w19, w19, lsl 1
-	and	w19, w19, 1023
-.L658:
-	adrp	x0, .LANCHOR14
-	adrp	x28, .LANCHOR76
-	and	x21, x25, 65535
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L659
-	ldr	x1, [x28, #:lo12:.LANCHOR76]
-	add	x0, x22, x20, lsl 6
-	ldrh	w3, [x0, 48]
-	ldrb	w4, [x1, x21]
-	mov	w1, w25
-	ldrb	w2, [x0, 1]
-	adrp	x0, .LC48
-	add	x0, x0, :lo12:.LC48
-	bl	printf
-.L659:
-	ldr	x1, [x28, #:lo12:.LANCHOR76]
-	add	x0, x22, x20, lsl 6
-	mov	x26, x21
+.L697:
+	adrp	x1, .LANCHOR83
+	and	x21, x24, 65535
+	add	x0, x25, x20, lsl 6
+	mov	x27, x1
+	ldr	x2, [x1, #:lo12:.LANCHOR83]
 	ldrb	w0, [x0, 1]
-	ldrb	w1, [x1, x21]
-	cmp	w1, w0
-	beq	.L660
-	adrp	x1, .LANCHOR72
+	ldrb	w2, [x2, x21]
+	cmp	w2, w0
+	beq	.L698
+	adrp	x1, .LANCHOR78
 	adrp	x0, .LC0
-	mov	w2, 818
-	add	x1, x1, :lo12:.LANCHOR72
+	mov	w2, 976
+	add	x1, x1, :lo12:.LANCHOR78
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L660:
-	add	x20, x22, x20, lsl 6
-	ldrb	w0, [x20, 61]
+.L698:
+	add	x0, x25, x20, lsl 6
+	ldrb	w0, [x0, 61]
 	cmp	w0, 3
-	beq	.L661
-	ldrb	w0, [x27, #:lo12:.LANCHOR73]
+	beq	.L699
+	ldrb	w0, [x26, #:lo12:.LANCHOR79]
 	cmp	w0, 3
-	bne	.L661
-	adrp	x0, .LANCHOR77
-	ldrb	w0, [x0, #:lo12:.LANCHOR77]
-	cbnz	w0, .L661
-	adrp	x0, .LANCHOR35
-	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbnz	w0, .L661
-	adrp	x0, .LANCHOR74
-	ldrb	w0, [x0, #:lo12:.LANCHOR74]
-	cbz	w0, .L662
-	adrp	x0, .LANCHOR75
-	ldrb	w0, [x0, #:lo12:.LANCHOR75]
-	cbnz	w0, .L661
-.L662:
-	ldr	x1, [x28, #:lo12:.LANCHOR76]
+	bne	.L699
+	adrp	x0, .LANCHOR84
+	ldrb	w0, [x0, #:lo12:.LANCHOR84]
+	cbnz	w0, .L699
+	adrp	x0, .LANCHOR36
+	ldrb	w0, [x0, #:lo12:.LANCHOR36]
+	cbnz	w0, .L699
+	adrp	x0, .LANCHOR37
+	ldrb	w0, [x0, #:lo12:.LANCHOR37]
+	cbnz	w0, .L699
+	adrp	x0, .LANCHOR81
+	ldrb	w0, [x0, #:lo12:.LANCHOR81]
+	cbz	w0, .L700
+	adrp	x0, .LANCHOR82
+	ldrb	w0, [x0, #:lo12:.LANCHOR82]
+	cbnz	w0, .L699
+.L700:
+	ldr	x1, [x27, #:lo12:.LANCHOR83]
 	mov	x0, 0
 	add	x21, x1, x21
-.L663:
+.L701:
 	cmp	w19, w0, uxth
-	bls	.L655
+	bls	.L693
 	ldrb	w1, [x21, x0]
 	add	x0, x0, 1
-	add	x1, x22, x1, lsl 6
+	add	x1, x25, x1, lsl 6
 	strb	wzr, [x1, 61]
-	b	.L663
-.L657:
-	adrp	x0, .LANCHOR74
-	ldrb	w0, [x0, #:lo12:.LANCHOR74]
-	cbz	w0, .L669
-	adrp	x0, .LANCHOR75
-	ldrb	w0, [x0, #:lo12:.LANCHOR75]
+	b	.L701
+.L707:
+	mov	w19, 1
+	b	.L696
+.L695:
+	adrp	x0, .LANCHOR81
+	ldrb	w0, [x0, #:lo12:.LANCHOR81]
+	cbz	w0, .L708
+	adrp	x0, .LANCHOR82
+	ldrb	w0, [x0, #:lo12:.LANCHOR82]
 	cmp	w0, 0
 	cset	w19, ne
 	add	w19, w19, 1
-	b	.L658
-.L669:
+	b	.L697
+.L708:
 	mov	w19, 1
-	b	.L658
-.L661:
-	adrp	x20, .LANCHOR64
-	add	x20, x20, :lo12:.LANCHOR64
+	b	.L697
+.L699:
+	adrp	x20, .LANCHOR71
+	add	x20, x20, :lo12:.LANCHOR71
 	add	x19, x21, x19, uxth
-	mov	w21, -1
-	strh	w25, [x20, 572]
-.L664:
-	cmp	x19, x26
-	beq	.L655
-	ldr	x1, [x28, #:lo12:.LANCHOR76]
-	ldrb	w0, [x1, x26]
-	strb	w21, [x1, x26]
-	add	x26, x26, 1
+	strh	w24, [x20, 2108]
+	mov	w24, -1
+.L702:
+	cmp	x21, x19
+	beq	.L693
+	ldr	x1, [x27, #:lo12:.LANCHOR83]
+	ldrb	w0, [x1, x21]
+	strb	w24, [x1, x21]
+	add	x21, x21, 1
 	sbfiz	x1, x0, 6, 32
 	ubfiz	x0, x0, 6, 8
-	add	x1, x22, x1
-	add	x0, x22, x0
+	add	x1, x25, x1
+	add	x0, x25, x0
 	strb	wzr, [x1, 61]
 	bl	zbuf_free
 	ldrb	w0, [x20, 7]
 	sub	w0, w0, #1
 	strb	w0, [x20, 7]
-	b	.L664
+	b	.L702
 	.size	gc_write_completed, .-gc_write_completed
 	.section	.text.gc_get_src_blk,"ax",@progbits
 	.align	2
@@ -3905,47 +4112,47 @@ gc_write_completed:
 gc_get_src_blk:
 	adrp	x0, .LANCHOR10
 	ldr	x2, [x0, #:lo12:.LANCHOR10]
-	adrp	x0, .LANCHOR78
-	ldrb	w3, [x0, #:lo12:.LANCHOR78]
+	adrp	x0, .LANCHOR85
+	ldrb	w3, [x0, #:lo12:.LANCHOR85]
 	ldrh	w0, [x2, 124]
-	cbz	w0, .L685
+	cbz	w0, .L721
 	add	x1, x2, 392
 	mov	w4, 1
-.L686:
+.L722:
 	add	x5, x1, 128
 	mov	w6, 65535
-.L690:
+.L726:
 	ldrh	w0, [x1]
 	cmp	w0, w6
-	beq	.L688
+	beq	.L724
 	mov	w5, -1
 	strh	w5, [x1]
-	cbz	w4, .L689
+	cbz	w4, .L725
 	ldrh	w1, [x2, 124]
 	sub	w1, w1, #1
 	strh	w1, [x2, 124]
 	ret
-.L685:
+.L721:
 	add	x0, x2, x3, sxtw 1
 	ldrh	w0, [x0, 120]
-	cbz	w0, .L691
+	cbz	w0, .L727
 	ubfiz	x1, x3, 7, 8
 	mov	w4, 0
 	add	x1, x1, 136
 	add	x1, x2, x1
-	b	.L686
-.L689:
+	b	.L722
+.L725:
 	add	x2, x2, x3, uxtb 1
 	ldrh	w1, [x2, 120]
 	sub	w1, w1, #1
 	strh	w1, [x2, 120]
 	ret
-.L688:
+.L724:
 	add	x1, x1, 2
 	cmp	x1, x5
-	bne	.L690
+	bne	.L726
 	ret
-.L691:
+.L727:
 	mov	w0, 65535
 	ret
 	.size	gc_get_src_blk, .-gc_get_src_blk
@@ -3957,90 +4164,90 @@ gc_free_temp_buf:
 	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR64
-	add	x0, x20, :lo12:.LANCHOR64
+	adrp	x20, .LANCHOR71
+	add	x0, x20, :lo12:.LANCHOR71
 	stp	x21, x22, [sp, 32]
 	ldrb	w1, [x0, 7]
-	cbz	w1, .L700
-	adrp	x1, .LANCHOR54
-	ldrb	w1, [x1, #:lo12:.LANCHOR54]
+	cbz	w1, .L736
+	adrp	x1, .LANCHOR58
+	ldrb	w1, [x1, #:lo12:.LANCHOR58]
 	cmp	w1, 1
-	bhi	.L700
-	ldrh	w19, [x0, 572]
+	bhi	.L736
+	ldrh	w19, [x0, 2108]
 	adrp	x2, .LANCHOR80
-	adrp	x0, .LANCHOR79
-	adrp	x21, .LANCHOR76
+	adrp	x0, .LANCHOR86
+	adrp	x21, .LANCHOR83
 	ldrb	w2, [x2, #:lo12:.LANCHOR80]
 	add	w1, w19, 24
-	ldrh	w0, [x0, #:lo12:.LANCHOR79]
-	ldr	x4, [x21, #:lo12:.LANCHOR76]
+	ldrh	w0, [x0, #:lo12:.LANCHOR86]
+	ldr	x4, [x21, #:lo12:.LANCHOR83]
 	mul	w0, w0, w2
 	cmp	w0, w1
 	csel	w1, w0, w1, ls
-	adrp	x0, .LANCHOR52
-	add	x0, x0, :lo12:.LANCHOR52
-.L695:
+	adrp	x0, .LANCHOR56
+	add	x0, x0, :lo12:.LANCHOR56
+.L731:
 	cmp	w19, w1
-	bcc	.L698
-.L700:
+	bcc	.L734
+.L736:
 	mov	w0, 0
-	b	.L693
-.L698:
+	b	.L729
+.L734:
 	uxtw	x22, w19
 	ldrb	w2, [x4, x22]
 	cmp	w2, 255
-	beq	.L696
+	beq	.L732
 	sbfiz	x3, x2, 6, 32
 	add	x3, x0, x3
 	ldrb	w3, [x3, 61]
-	cbnz	w3, .L696
+	cbnz	w3, .L732
 	ubfiz	x2, x2, 6, 8
 	add	x0, x0, x2
 	bl	zbuf_free
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L697
-	ldr	x0, [x21, #:lo12:.LANCHOR76]
+	tbz	x0, 8, .L733
+	ldr	x0, [x21, #:lo12:.LANCHOR83]
 	mov	w1, w19
 	ldrb	w2, [x0, x22]
-	adrp	x0, .LC49
-	add	x0, x0, :lo12:.LC49
+	adrp	x0, .LC55
+	add	x0, x0, :lo12:.LC55
 	bl	printf
-.L697:
-	ldr	x0, [x21, #:lo12:.LANCHOR76]
-	add	x20, x20, :lo12:.LANCHOR64
+.L733:
+	ldr	x0, [x21, #:lo12:.LANCHOR83]
+	add	x20, x20, :lo12:.LANCHOR71
 	mov	w1, -1
 	strb	w1, [x0, x22]
 	ldrb	w0, [x20, 7]
 	sub	w0, w0, #1
 	strb	w0, [x20, 7]
 	mov	w0, 1
-.L693:
+.L729:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L696:
+.L732:
 	add	w19, w19, 1
-	b	.L695
+	b	.L731
 	.size	gc_free_temp_buf, .-gc_free_temp_buf
 	.section	.text.print_gc_debug_info,"ax",@progbits
 	.align	2
 	.global	print_gc_debug_info
 	.type	print_gc_debug_info, %function
 print_gc_debug_info:
-	adrp	x2, .LANCHOR81
-	adrp	x1, .LANCHOR64
-	add	x0, x1, :lo12:.LANCHOR64
-	ldrh	w6, [x2, #:lo12:.LANCHOR81]
-	adrp	x2, .LANCHOR54
-	ldrh	w1, [x1, #:lo12:.LANCHOR64]
+	adrp	x2, .LANCHOR87
+	adrp	x1, .LANCHOR71
+	add	x0, x1, :lo12:.LANCHOR71
+	ldrh	w6, [x2, #:lo12:.LANCHOR87]
+	adrp	x2, .LANCHOR58
+	ldrh	w1, [x1, #:lo12:.LANCHOR71]
 	ldrb	w5, [x0, 7]
-	ldrb	w4, [x2, #:lo12:.LANCHOR54]
-	ldrh	w3, [x0, 570]
+	ldrb	w4, [x2, #:lo12:.LANCHOR58]
+	ldrh	w3, [x0, 2106]
 	ldrh	w2, [x0, 2]
-	adrp	x0, .LC50
-	add	x0, x0, :lo12:.LC50
+	adrp	x0, .LC56
+	add	x0, x0, :lo12:.LC56
 	b	printf
 	.size	print_gc_debug_info, .-print_gc_debug_info
 	.section	.text.zftl_get_gc_node,"ax",@progbits
@@ -4051,532 +4258,654 @@ zftl_get_gc_node:
 	and	w1, w1, 65535
 	and	w0, w0, 65535
 	cmp	w1, 5
-	bne	.L710
+	bne	.L746
 	mov	w1, w0
-	adrp	x0, .LANCHOR82
-	ldr	x0, [x0, #:lo12:.LANCHOR82]
-.L712:
+	adrp	x0, .LANCHOR88
+	ldr	x0, [x0, #:lo12:.LANCHOR88]
+.L748:
 	b	_list_get_gc_head_node.isra.2
-.L710:
+.L746:
 	cmp	w1, 2
-	bne	.L711
+	bne	.L747
 	b	zftl_get_gc_node.part.9
-.L711:
+.L747:
 	mov	w1, w0
-	adrp	x0, .LANCHOR83
-	ldr	x0, [x0, #:lo12:.LANCHOR83]
-	b	.L712
+	adrp	x0, .LANCHOR89
+	ldr	x0, [x0, #:lo12:.LANCHOR89]
+	b	.L748
 	.size	zftl_get_gc_node, .-zftl_get_gc_node
 	.section	.text.gc_search_src_blk,"ax",@progbits
 	.align	2
 	.global	gc_search_src_blk
 	.type	gc_search_src_blk, %function
 gc_search_src_blk:
-	stp	x29, x30, [sp, -128]!
+	stp	x29, x30, [sp, -160]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	and	w21, w0, 255
+	and	w22, w0, 255
 	and	w0, w1, 255
 	stp	x19, x20, [sp, 16]
-	str	w0, [x29, 112]
+	str	w0, [x29, 144]
 	adrp	x0, .LANCHOR10
+	and	w19, w2, 255
 	stp	x23, x24, [sp, 48]
-	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	ldr	x2, [x0, #:lo12:.LANCHOR10]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	add	x0, x0, x21, sxtw 1
-	ldrh	w19, [x0, 120]
-	cbz	w19, .L714
-	mov	w0, w19
-.L713:
+	add	x0, x2, x22, sxtw 1
+	ldrh	w21, [x0, 120]
+	cbz	w21, .L750
+	mov	w0, w21
+.L749:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 128
+	ldp	x29, x30, [sp], 160
 	ret
-.L714:
-	and	w20, w2, 255
-	cbnz	w21, .L716
-	adrp	x24, .LANCHOR84
-	adrp	x26, .LANCHOR14
-	adrp	x27, .LC51
-	and	w22, w20, 65535
-	add	x26, x26, :lo12:.LANCHOR14
-	add	x27, x27, :lo12:.LC51
-	strh	wzr, [x24, #:lo12:.LANCHOR84]
-	mov	w23, 0
-	mov	w25, 0
-.L717:
-	cmp	w25, w22
-	bcs	.L722
-	ldrh	w6, [x24, #:lo12:.LANCHOR84]
-	add	x7, x24, :lo12:.LANCHOR84
+.L750:
+	adrp	x0, .LANCHOR71
+	add	x1, x0, :lo12:.LANCHOR71
+	ldrh	w1, [x1, 56]
+	cmp	w1, 1
+	bhi	.L752
+	adrp	x3, .LANCHOR90
+	strh	wzr, [x3, #:lo12:.LANCHOR90]
+	adrp	x3, .LANCHOR91
+	strh	wzr, [x3, #:lo12:.LANCHOR91]
+	adrp	x3, .LANCHOR92
+	strh	wzr, [x3, #:lo12:.LANCHOR92]
+.L752:
+	cbnz	w22, .L753
+	adrp	x26, .LANCHOR91
+	adrp	x25, .LANCHOR14
+	add	x23, x26, :lo12:.LANCHOR91
+	add	x25, x25, :lo12:.LANCHOR14
+	mov	w24, 0
+	mov	w20, 0
+.L754:
+	cmp	w19, w20
+	blt	.L759
+	ldrh	w6, [x23]
 	mov	w1, 3
 	mov	w0, w6
 	bl	zftl_get_gc_node
 	add	w2, w6, 1
 	and	w2, w2, 65535
-	strh	w2, [x24, #:lo12:.LANCHOR84]
+	strh	w2, [x23]
 	and	w1, w0, 65535
 	mov	w0, 65535
-	mov	w28, w1
+	mov	w27, w1
 	cmp	w1, w0
-	beq	.L718
-	ldr	w0, [x26]
-	adrp	x6, .LANCHOR9
-	uxtw	x4, w1
-	tbz	x0, 8, .L719
-	ldr	x0, [x6, #:lo12:.LANCHOR9]
-	stp	x6, x4, [x29, 96]
-	ldrh	w3, [x0, x4, lsl 1]
-	mov	x0, x27
+	beq	.L755
+	ldr	w0, [x25]
+	adrp	x4, .LANCHOR9
+	uxtw	x28, w1
+	tbz	x0, 8, .L756
+	ldr	x0, [x4, #:lo12:.LANCHOR9]
+	str	x4, [x29, 136]
+	ldrh	w3, [x0, x28, lsl 1]
+	adrp	x0, .LC57
+	add	x0, x0, :lo12:.LC57
 	bl	printf
-	ldp	x6, x4, [x29, 96]
-.L719:
-	ldr	x0, [x6, #:lo12:.LANCHOR9]
-	ldrh	w1, [x0, x4, lsl 1]
-	adrp	x0, .LANCHOR63
-	ldrh	w0, [x0, #:lo12:.LANCHOR63]
+	ldr	x4, [x29, 136]
+.L756:
+	ldr	x0, [x4, #:lo12:.LANCHOR9]
+	ldrh	w1, [x0, x28, lsl 1]
+	adrp	x0, .LANCHOR70
+	ldrh	w0, [x0, #:lo12:.LANCHOR70]
 	cmp	w1, w0
-	bcs	.L720
+	bcs	.L757
 	mov	w2, 0
 	mov	w1, 0
-	mov	w0, w28
+	mov	w0, w27
 	bl	gc_add_sblk
-	cbz	w0, .L721
-	add	w5, w23, 1
-	and	w23, w5, 65535
-	cmp	w22, w23
-	bcs	.L721
-.L722:
-	ldr	x0, [x29, 112]
-	tbz	x0, 1, .L724
-	adrp	x25, .LANCHOR86
-	adrp	x24, .LANCHOR85
-	add	x27, x25, :lo12:.LANCHOR86
-	add	x24, x24, :lo12:.LANCHOR85
-	mov	w28, 0
+	cbz	w0, .L758
+	add	w5, w24, 1
+	and	w24, w5, 65535
+	cmp	w24, w19
+	bcc	.L758
+.L759:
+	ldr	x0, [x29, 144]
+	tbz	x0, 1, .L761
+	adrp	x0, .LANCHOR93
+	ldrh	w0, [x0, #:lo12:.LANCHOR93]
+	cmp	w0, 32
+	bls	.L761
+	adrp	x23, .LANCHOR94
+	adrp	x20, .LANCHOR92
+	add	x27, x23, :lo12:.LANCHOR94
+	add	x20, x20, :lo12:.LANCHOR92
+	mov	w25, 0
 	mov	w26, 65535
-.L725:
-	cmp	w28, w22
-	beq	.L729
-	ldrh	w6, [x24]
+.L762:
+	cmp	w19, w25
+	blt	.L766
+	ldrh	w6, [x20]
 	mov	w1, 5
 	mov	w0, w6
 	bl	zftl_get_gc_node
 	add	w6, w6, 1
-	strh	w6, [x24]
+	strh	w6, [x20]
 	and	w1, w0, 65535
 	cmp	w1, w26
-	beq	.L726
+	beq	.L763
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x1]
 	ldrh	w1, [x27]
 	cmp	w2, w1
-	bcs	.L726
+	bcs	.L763
 	mov	w2, 0
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L728
-	add	w5, w23, 1
-	and	w23, w5, 65535
-	cmp	w22, w23
-	bcs	.L728
-.L729:
-	cmp	w23, w22
-	adrp	x0, .LANCHOR87
-	bcs	.L731
-	ldrh	w1, [x0, #:lo12:.LANCHOR87]
+	cbz	w0, .L765
+	add	w5, w24, 1
+	and	w24, w5, 65535
+	cmp	w24, w19
+	bcc	.L765
+.L766:
+	cmp	w24, w19
+	adrp	x0, .LANCHOR95
+	bcs	.L768
+	ldrh	w1, [x0, #:lo12:.LANCHOR95]
 	adrp	x3, .LANCHOR80
-	adrp	x0, .LANCHOR79
-	ldrh	w2, [x25, #:lo12:.LANCHOR86]
+	adrp	x0, .LANCHOR86
+	ldrh	w2, [x23, #:lo12:.LANCHOR94]
 	ldrb	w3, [x3, #:lo12:.LANCHOR80]
-	ldrh	w0, [x0, #:lo12:.LANCHOR79]
+	ldrh	w0, [x0, #:lo12:.LANCHOR86]
 	mul	w0, w0, w3
 	sub	w0, w0, w1, lsr 2
 	cmp	w2, w0
-	bge	.L724
+	bge	.L761
 	add	w1, w2, w1, lsr 3
-	strh	w1, [x25, #:lo12:.LANCHOR86]
-.L724:
-	ldr	x0, [x29, 112]
-	tbz	x0, 0, .L732
-	cmp	w23, w22
-	bcs	.L732
-	adrp	x24, .LANCHOR88
-	add	x24, x24, :lo12:.LANCHOR88
+	strh	w1, [x23, #:lo12:.LANCHOR94]
+.L761:
+	ldr	x0, [x29, 144]
+	tbz	x0, 0, .L769
+	and	w23, w19, 65535
+	cmp	w24, w23
+	bcs	.L769
+	adrp	x20, .LANCHOR90
+	add	x20, x20, :lo12:.LANCHOR90
 	mov	w25, 65535
-.L737:
-	ldrh	w6, [x24]
+.L774:
+	ldrh	w6, [x20]
 	mov	w0, w6
 	bl	zftl_get_gc_node.part.9
 	add	w6, w6, 1
-	strh	w6, [x24]
+	strh	w6, [x20]
 	cmp	w25, w0, uxth
-	beq	.L733
+	beq	.L770
 	mov	w2, 0
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L734
-	add	w5, w23, 1
-	and	w23, w5, 65535
-	cmp	w22, w23
-	bhi	.L734
-.L735:
-	adrp	x0, .LANCHOR87
-	adrp	x1, .LANCHOR63
-	ldrh	w0, [x0, #:lo12:.LANCHOR87]
-	ldrh	w2, [x1, #:lo12:.LANCHOR63]
+	cbz	w0, .L771
+	add	w5, w24, 1
+	and	w24, w5, 65535
+	cmp	w23, w24
+	bhi	.L771
+.L772:
+	adrp	x0, .LANCHOR95
+	adrp	x1, .LANCHOR70
+	ldrh	w0, [x0, #:lo12:.LANCHOR95]
+	ldrh	w2, [x1, #:lo12:.LANCHOR70]
 	cmp	w2, w0, lsr 1
-	bls	.L732
+	bls	.L769
 	sub	w0, w2, w0, lsr 3
-	b	.L812
-.L720:
-	strh	wzr, [x24, #:lo12:.LANCHOR84]
-	b	.L722
-.L718:
-	strh	wzr, [x7]
-	b	.L722
-.L721:
+	b	.L860
+.L757:
+	strh	wzr, [x26, #:lo12:.LANCHOR91]
+	b	.L759
+.L755:
+	strh	wzr, [x23]
+	b	.L759
+.L758:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L754
+.L763:
+	strh	wzr, [x20]
+	b	.L766
+.L765:
 	add	w25, w25, 1
 	and	w25, w25, 65535
-	b	.L717
-.L726:
-	strh	wzr, [x24]
-	b	.L729
-.L728:
-	add	w28, w28, 1
-	and	w28, w28, 65535
-	b	.L725
-.L731:
-	ldrh	w1, [x25, #:lo12:.LANCHOR86]
-	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	b	.L762
+.L768:
+	ldrh	w1, [x23, #:lo12:.LANCHOR94]
+	ldrh	w0, [x0, #:lo12:.LANCHOR95]
 	cmp	w1, w0
-	bls	.L724
+	bls	.L761
 	sub	w0, w1, w0, lsr 3
-	strh	w0, [x25, #:lo12:.LANCHOR86]
-	b	.L724
-.L733:
-	strh	wzr, [x24]
-.L736:
-	cmp	w23, w22
-	bcs	.L735
-	adrp	x1, .LANCHOR63
-	adrp	x0, .LANCHOR87
-	ldrh	w2, [x1, #:lo12:.LANCHOR63]
-	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	strh	w0, [x23, #:lo12:.LANCHOR94]
+	b	.L761
+.L770:
+	strh	wzr, [x20]
+.L773:
+	cmp	w24, w23
+	bcs	.L772
+	adrp	x1, .LANCHOR70
+	adrp	x0, .LANCHOR95
+	ldrh	w2, [x1, #:lo12:.LANCHOR70]
+	ldrh	w0, [x0, #:lo12:.LANCHOR95]
 	cmp	w2, w0
-	bcs	.L732
+	bcs	.L769
 	add	w0, w2, w0, lsr 3
-.L812:
-	strh	w0, [x1, #:lo12:.LANCHOR63]
-.L732:
+.L860:
+	strh	w0, [x1, #:lo12:.LANCHOR70]
+.L769:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L759
-	ldr	w2, [x29, 112]
-	adrp	x0, .LC52
-	mov	w4, w20
-	mov	w3, w23
-	mov	w1, w21
-	add	x0, x0, :lo12:.LC52
+	tbz	x0, 8, .L805
+	ldr	w2, [x29, 144]
+	adrp	x0, .LC58
+	mov	w4, w19
+	mov	w3, w24
+	mov	w1, w22
+	add	x0, x0, :lo12:.LC58
 	bl	printf
-.L759:
-	mov	w0, w23
-	b	.L713
-.L734:
-	add	w19, w19, 1
-	and	w19, w19, 65535
-	cmp	w22, w19
-	bne	.L737
-	b	.L736
-.L716:
-	adrp	x0, .LANCHOR64+574
-	strh	wzr, [x0, #:lo12:.LANCHOR64+574]
-	adrp	x0, .LANCHOR89
-	strh	wzr, [x0, #:lo12:.LANCHOR89]
-	ldr	w0, [x29, 112]
-	and	w0, w0, 1
-	str	w0, [x29, 104]
-	ldr	x0, [x29, 112]
-	tbz	x0, 0, .L762
-	adrp	x1, .LANCHOR91
-	adrp	x25, .LANCHOR90
-	str	x1, [x29, 96]
-	adrp	x26, .LANCHOR92
-	ldrh	w0, [x25, #:lo12:.LANCHOR90]
-	ldrh	w2, [x1, #:lo12:.LANCHOR91]
-	cmp	w0, w2, lsr 2
-	bcc	.L739
-	ldrh	w1, [x26, #:lo12:.LANCHOR92]
-	cmp	w1, w0
-	bls	.L763
-.L739:
-	ldrh	w0, [x26, #:lo12:.LANCHOR92]
-	adrp	x22, .LANCHOR88
-	lsr	w0, w0, 2
-	strh	w0, [x22, #:lo12:.LANCHOR88]
-	mov	w0, 0
-	bl	zftl_get_gc_node.part.9
-	and	w1, w0, 65535
+.L805:
+	mov	w0, w24
+	b	.L749
+.L771:
+	add	w21, w21, 1
+	and	w21, w21, 65535
+	cmp	w23, w21
+	bhi	.L774
+	b	.L773
+.L753:
+	adrp	x23, .LANCHOR80
+	adrp	x25, .LANCHOR86
+	str	x23, [x29, 136]
+	cmp	w19, 1
+	ldrb	w20, [x23, #:lo12:.LANCHOR80]
+	ldrh	w3, [x25, #:lo12:.LANCHOR86]
+	mul	w20, w20, w3
+	and	w20, w20, 65535
+	bne	.L775
+	cbz	w1, .L775
+	ldrh	w3, [x2, 80]
 	mov	w2, 65535
-	cmp	w1, w2
-	beq	.L765
-	adrp	x2, .LANCHOR9
-	ubfiz	x1, x1, 1, 16
-	ldr	x3, [x2, #:lo12:.LANCHOR9]
-	adrp	x2, .LANCHOR87
-	ldrh	w2, [x2, #:lo12:.LANCHOR87]
-	ldrh	w1, [x3, x1]
-	cmp	w1, w2, lsr 2
-	bcs	.L765
-	strh	wzr, [x22, #:lo12:.LANCHOR88]
-	mov	w2, w21
-	mov	w1, 0
-	bl	gc_add_sblk
-	cmp	w0, 0
-	cset	w23, ne
-.L741:
-	add	x22, x22, :lo12:.LANCHOR88
-	and	w28, w20, 65535
-	mov	w24, 64
-	mov	w27, 65535
-.L743:
-	ldrh	w6, [x22]
-	mov	w0, w6
+	cmp	w3, w2
+	beq	.L808
+	add	x2, x0, :lo12:.LANCHOR71
+	ldrh	w2, [x2, 2106]
+	sub	w20, w20, w2
+	and	w20, w20, 65535
+.L808:
+	mov	w19, 8
+.L775:
+	add	x0, x0, :lo12:.LANCHOR71
+	strh	wzr, [x0, 2110]
+	adrp	x0, .LANCHOR96
+	strh	wzr, [x0, #:lo12:.LANCHOR96]
+	ldr	w0, [x29, 144]
+	and	w0, w0, 1
+	str	w0, [x29, 120]
+	ldr	x0, [x29, 144]
+	tbz	x0, 0, .L809
+	adrp	x2, .LANCHOR98
+	adrp	x26, .LANCHOR97
+	str	x2, [x29, 128]
+	ldrh	w0, [x26, #:lo12:.LANCHOR97]
+	ldrh	w3, [x2, #:lo12:.LANCHOR98]
+	cmp	w0, w3, lsr 2
+	bhi	.L777
+	adrp	x2, .LANCHOR99
+	ldrh	w2, [x2, #:lo12:.LANCHOR99]
+	cmp	w2, w0
+	bcs	.L810
+.L777:
+	cmp	w1, 1
+	adrp	x28, .LANCHOR90
+	bls	.L779
+.L781:
+	mov	w24, 0
+.L780:
+	add	x28, x28, :lo12:.LANCHOR90
+	adrp	x0, .LANCHOR99
+	mov	w23, 0
+	add	x0, x0, :lo12:.LANCHOR99
+	mov	w27, 64
+	str	x0, [x29, 112]
+.L784:
+	ldrh	w7, [x28]
+	mov	w0, w7
 	bl	zftl_get_gc_node.part.9
-	add	w6, w6, 1
-	strh	w6, [x22]
-	cmp	w27, w0, uxth
-	beq	.L740
-	mov	w2, w21
+	and	w6, w0, 65535
+	str	w6, [x29, 104]
+	mov	w1, 65535
+	cmp	w6, w1
+	beq	.L782
+	add	w7, w7, 1
+	mov	w2, w22
+	strh	w7, [x28]
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L742
-	add	w5, w23, 1
-	and	w23, w5, 65535
-	cmp	w23, w28
-	bcs	.L740
-.L742:
-	sub	w24, w24, #1
-	ands	w24, w24, 65535
-	bne	.L743
-.L740:
-	ldr	x0, [x29, 96]
-	ldrh	w1, [x25, #:lo12:.LANCHOR90]
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
-	cmp	w1, w0, lsr 3
-	bhi	.L760
-	ldrh	w0, [x26, #:lo12:.LANCHOR92]
+	cbz	w0, .L783
+	adrp	x0, .LANCHOR9
+	ldr	w6, [x29, 104]
+	add	w5, w24, 1
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	and	w24, w5, 65535
+	ubfiz	x6, x6, 1, 16
+	cmp	w24, w19
+	ldrh	w0, [x0, x6]
+	add	w3, w23, w0
+	and	w23, w3, 65535
+	bcs	.L778
+	cmp	w20, w23
+	bcc	.L778
+	ldr	x0, [x29, 112]
+	ldrh	w1, [x26, #:lo12:.LANCHOR97]
+	ldrh	w0, [x0]
+	cmp	w0, w1, lsl 1
+	ble	.L783
+.L778:
+	adrp	x0, .LANCHOR99
+	ldrh	w1, [x0, #:lo12:.LANCHOR99]
+	ldr	x0, [x29, 128]
+	ldrh	w0, [x0, #:lo12:.LANCHOR98]
+	cmp	w1, w0, lsr 2
+	bhi	.L806
+	ldrh	w0, [x26, #:lo12:.LANCHOR97]
 	add	w0, w0, 8
 	cmp	w1, w0
-	ble	.L738
-.L760:
-	adrp	x24, .LANCHOR84
-	and	w26, w20, 65535
-	mov	w22, 64
-	mov	w25, 65535
-	strh	wzr, [x24, #:lo12:.LANCHOR84]
-	add	x24, x24, :lo12:.LANCHOR84
-.L745:
-	ldrh	w6, [x24]
+	ble	.L776
+.L806:
+	cmp	w20, w23
+	bls	.L776
+	adrp	x4, .LANCHOR91
+	add	x28, x4, :lo12:.LANCHOR91
+	and	w0, w19, 65535
+	mov	w26, 64
+	adrp	x27, .LANCHOR9
+	str	w0, [x29, 128]
+.L787:
+	ldrh	w6, [x28]
 	mov	w1, 3
 	mov	w0, w6
 	bl	zftl_get_gc_node
+	and	w7, w0, 65535
+	str	w7, [x29, 112]
+	mov	w1, 65535
+	cmp	w7, w1
+	beq	.L785
 	add	w6, w6, 1
-	strh	w6, [x24]
-	cmp	w25, w0, uxth
-	beq	.L738
-	mov	w2, w21
+	mov	w2, w22
+	strh	w6, [x28]
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L744
-	add	w5, w23, 1
-	and	w23, w5, 65535
-	cmp	w23, w26
-	bcs	.L738
-.L744:
-	sub	w22, w22, #1
-	ands	w22, w22, 65535
-	bne	.L745
-.L738:
-	ldr	x0, [x29, 112]
-	tbz	x0, 1, .L746
-	adrp	x24, .LANCHOR85
-	adrp	x28, .LANCHOR93
-	adrp	x25, .LANCHOR80
-	add	x26, x24, :lo12:.LANCHOR85
-	add	x27, x28, :lo12:.LANCHOR93
-	add	x25, x25, :lo12:.LANCHOR80
-	strh	wzr, [x24, #:lo12:.LANCHOR85]
-	mov	w22, 64
-.L751:
-	ldrh	w6, [x26]
+	cbz	w0, .L786
+	ldr	w7, [x29, 112]
+	add	w5, w24, 1
+	ldr	x0, [x27, #:lo12:.LANCHOR9]
+	and	w24, w5, 65535
+	ubfiz	x7, x7, 1, 16
+	ldrh	w0, [x0, x7]
+	add	w3, w23, w0
+	ldr	w0, [x29, 128]
+	and	w23, w3, 65535
+	cmp	w24, w0
+	bcs	.L776
+	cmp	w20, w23
+	bcs	.L786
+.L776:
+	ldr	x0, [x29, 144]
+	tbz	x0, 1, .L788
+	adrp	x0, .LANCHOR93
+	str	x0, [x29, 112]
+	ldrh	w1, [x0, #:lo12:.LANCHOR93]
+	cmp	w1, 32
+	bls	.L788
+	cmp	w23, w20
+	bcs	.L788
+	adrp	x0, .LANCHOR92
+	adrp	x27, .LANCHOR100
+	add	x28, x0, :lo12:.LANCHOR92
+	mov	w26, 64
+	add	x0, x27, :lo12:.LANCHOR100
+	str	x0, [x29, 128]
+.L794:
+	ldrh	w6, [x28]
 	mov	w1, 5
 	mov	w0, w6
 	bl	zftl_get_gc_node
+	and	w8, w0, 65535
+	mov	w1, 65535
+	cmp	w8, w1
+	beq	.L789
 	add	w6, w6, 1
-	strh	w6, [x26]
-	and	w1, w0, 65535
-	mov	w2, 65535
-	cmp	w1, w2
-	beq	.L747
-	cmp	w20, 1
-	bne	.L748
-	adrp	x3, .LANCHOR79
-	ldrb	w2, [x25]
-	ldrh	w3, [x3, #:lo12:.LANCHOR79]
-	mul	w3, w2, w3
-	adrp	x2, .LANCHOR87
-	ldrh	w2, [x2, #:lo12:.LANCHOR87]
-	sub	w2, w3, w2, lsr 3
-	strh	w2, [x27]
-.L748:
-	adrp	x2, .LANCHOR9
-	ubfiz	x1, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR9]
-	ldrh	w2, [x2, x1]
-	ldrh	w1, [x27]
-	cmp	w2, w1
-	bcs	.L749
-	mov	w2, w21
-	mov	w1, 0
-	bl	gc_add_sblk
-	cbz	w0, .L750
-	add	w5, w23, 1
-	add	w19, w19, 1
-	and	w23, w5, 65535
-	and	w19, w19, 65535
-	cmp	w23, w20
-	bcc	.L750
-.L747:
-	cmp	w23, w20
-	adrp	x0, .LANCHOR87
-	adrp	x3, .LANCHOR80
-	bcc	.L752
-	cbnz	w19, .L753
-	adrp	x1, .LANCHOR94
-	ldrh	w2, [x1, #:lo12:.LANCHOR94]
+	strh	w6, [x28]
+	cmp	w19, 1
+	bne	.L790
+	ldr	x1, [x29, 136]
+	ldrh	w2, [x25, #:lo12:.LANCHOR86]
+	ldrb	w1, [x1, #:lo12:.LANCHOR80]
+	mul	w2, w1, w2
 	adrp	x1, .LANCHOR95
 	ldrh	w1, [x1, #:lo12:.LANCHOR95]
+	sub	w1, w2, w1, lsr 3
+	ldr	x2, [x29, 128]
+	strh	w1, [x2]
+.L790:
+	ubfiz	x6, x8, 1, 16
+	adrp	x8, .LANCHOR9
+	stp	x8, x6, [x29, 96]
+	ldr	x1, [x8, #:lo12:.LANCHOR9]
+	ldrh	w2, [x1, x6]
+	ldr	x1, [x29, 128]
+	ldrh	w1, [x1]
 	cmp	w2, w1
-	bls	.L753
-.L752:
-	ldrh	w2, [x0, #:lo12:.LANCHOR87]
-	adrp	x0, .LANCHOR79
-	ldrb	w3, [x3, #:lo12:.LANCHOR80]
-	ldrh	w0, [x0, #:lo12:.LANCHOR79]
-	ldrh	w1, [x28, #:lo12:.LANCHOR93]
+	bcs	.L791
+	mov	w2, w22
+	mov	w1, 0
+	bl	gc_add_sblk
+	cbz	w0, .L792
+	ldp	x8, x6, [x29, 96]
+	add	w5, w24, 1
+	add	w21, w21, 1
+	and	w24, w5, 65535
+	and	w21, w21, 65535
+	cmp	w24, w19
+	ldr	x0, [x8, #:lo12:.LANCHOR9]
+	ldrh	w0, [x0, x6]
+	add	w3, w23, w0
+	and	w23, w3, 65535
+	bcs	.L793
+	cmp	w20, w23
+	bcs	.L792
+.L793:
+	cmp	w24, w19
+	adrp	x0, .LANCHOR95
+	bcc	.L795
+	cbnz	w21, .L796
+	ldr	x1, [x29, 112]
+	ldrh	w2, [x1, #:lo12:.LANCHOR93]
+	adrp	x1, .LANCHOR101
+	ldrh	w1, [x1, #:lo12:.LANCHOR101]
+	cmp	w2, w1
+	bls	.L796
+.L795:
+	ldr	x3, [x29, 136]
+	ldrh	w2, [x0, #:lo12:.LANCHOR95]
+	ldrh	w0, [x25, #:lo12:.LANCHOR86]
+	ldrh	w1, [x27, #:lo12:.LANCHOR100]
+	ldrb	w6, [x3, #:lo12:.LANCHOR80]
 	lsr	w2, w2, 3
-	mul	w0, w0, w3
+	mul	w0, w0, w6
 	sub	w0, w0, w2
 	cmp	w1, w0
-	bge	.L746
+	bge	.L788
 	add	w1, w1, w2
-	strh	w1, [x28, #:lo12:.LANCHOR93]
-.L746:
-	ldr	w0, [x29, 104]
-	cbz	w0, .L732
-	adrp	x25, .LANCHOR84
-	adrp	x22, .LANCHOR96
-	adrp	x26, .LANCHOR91
-	adrp	x27, .LANCHOR90
-	add	x28, x22, :lo12:.LANCHOR96
-	add	x26, x26, :lo12:.LANCHOR91
-	add	x27, x27, :lo12:.LANCHOR90
-	strh	wzr, [x25, #:lo12:.LANCHOR84]
-	mov	w24, 64
-.L757:
-	ldrh	w6, [x25, #:lo12:.LANCHOR84]
+	strh	w1, [x27, #:lo12:.LANCHOR100]
+.L788:
+	ldr	w0, [x29, 120]
+	cbz	w0, .L769
+	and	w26, w19, 65535
+	cmp	w24, w26
+	bcs	.L769
+	cmp	w23, w20
+	bcs	.L769
+	adrp	x21, .LANCHOR91
+	add	x21, x21, :lo12:.LANCHOR91
+	adrp	x28, .LANCHOR102
+	mov	w25, 64
+	add	x0, x28, :lo12:.LANCHOR102
+	adrp	x27, .LANCHOR9
+	str	x0, [x29, 128]
+.L804:
+	ldrh	w6, [x21]
 	mov	w1, 3
 	mov	w0, w6
 	bl	zftl_get_gc_node
+	and	w4, w0, 65535
+	mov	w1, 65535
+	cmp	w4, w1
+	beq	.L798
+	ldr	x1, [x27, #:lo12:.LANCHOR9]
+	ubfiz	x4, x4, 1, 16
 	add	w6, w6, 1
-	strh	w6, [x25, #:lo12:.LANCHOR84]
+	strh	w6, [x21]
+	ldrh	w2, [x1, x4]
+	ldr	x1, [x29, 128]
+	ldrh	w1, [x1]
+	cmp	w2, w1
+	bcs	.L799
+	adrp	x1, .LANCHOR98
+	ldrh	w2, [x1, #:lo12:.LANCHOR98]
+	adrp	x1, .LANCHOR99
+	ldrh	w1, [x1, #:lo12:.LANCHOR99]
+	cmp	w1, w2, lsr 1
+	bls	.L800
+.L799:
+	mov	w2, w22
+	mov	w1, 0
+	str	x4, [x29, 120]
+	bl	gc_add_sblk
+	cbz	w0, .L801
+	adrp	x0, .LANCHOR9
+	ldr	x4, [x29, 120]
+	add	w5, w24, 1
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	and	w24, w5, 65535
+	cmp	w26, w24
+	ldrh	w0, [x0, x4]
+	add	w3, w23, w0
+	and	w23, w3, 65535
+	bls	.L802
+	cmp	w20, w23
+	bcs	.L801
+.L803:
+	adrp	x0, .LANCHOR95
+	ldrh	w1, [x28, #:lo12:.LANCHOR102]
+	ldrh	w0, [x0, #:lo12:.LANCHOR95]
+	cmp	w1, w0, lsr 1
+	bls	.L769
+	sub	w0, w1, w0, lsr 3
+	strh	w0, [x28, #:lo12:.LANCHOR102]
+	b	.L769
+.L779:
+	lsr	w0, w0, 2
+	strh	w0, [x28, #:lo12:.LANCHOR90]
+	mov	w0, 0
+	bl	zftl_get_gc_node.part.9
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L754
+	beq	.L781
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR9]
-	ldrh	w1, [x2, x1]
-	ldrh	w2, [x28]
-	cmp	w2, w1
-	bls	.L755
-	cmp	w1, 2
-	bls	.L755
-	ldrh	w2, [x26]
-	ldrh	w1, [x27]
-	cmp	w1, w2, lsr 1
-	bls	.L754
-.L755:
-	mov	w2, w21
+	ldr	x3, [x2, #:lo12:.LANCHOR9]
+	adrp	x2, .LANCHOR95
+	ldrh	w2, [x2, #:lo12:.LANCHOR95]
+	ldrh	w1, [x3, x1]
+	cmp	w1, w2, lsr 2
+	bcs	.L781
+	mov	w1, 1
+	mov	w2, w22
+	strh	w1, [x28, #:lo12:.LANCHOR90]
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L756
-	add	w5, w23, 1
-	and	w23, w5, 65535
-	cmp	w23, w20
-	bcs	.L754
-.L756:
-	sub	w24, w24, #1
-	ands	w24, w24, 65535
-	bne	.L757
-.L754:
-	cmp	w23, w20
-	adrp	x0, .LANCHOR87
-	bcs	.L758
-	ldrh	w0, [x0, #:lo12:.LANCHOR87]
-	ldrh	w1, [x22, #:lo12:.LANCHOR96]
-	cmp	w1, w0, lsr 1
-	bls	.L732
-	sub	w0, w1, w0, lsr 3
-	strh	w0, [x22, #:lo12:.LANCHOR96]
-	b	.L732
-.L765:
-	mov	w23, 0
-	b	.L741
-.L762:
+	cmp	w0, 0
+	cset	w24, ne
+	b	.L780
+.L782:
+	strh	wzr, [x28]
+	b	.L778
+.L783:
+	sub	w27, w27, #1
+	ands	w27, w27, 65535
+	bne	.L784
+	b	.L778
+.L785:
+	cmp	w6, 64
+	bls	.L776
+	strh	wzr, [x28]
+	b	.L776
+.L786:
+	sub	w26, w26, #1
+	ands	w26, w26, 65535
+	bne	.L787
+	b	.L776
+.L809:
 	mov	w23, 0
-	b	.L738
-.L749:
-	strh	wzr, [x24, #:lo12:.LANCHOR85]
-	b	.L747
-.L750:
-	sub	w22, w22, #1
-	ands	w22, w22, 65535
-	bne	.L751
-	b	.L747
-.L753:
-	ldrh	w0, [x0, #:lo12:.LANCHOR87]
-	ldrb	w1, [x3, #:lo12:.LANCHOR80]
-	ldrh	w2, [x28, #:lo12:.LANCHOR93]
+	mov	w24, 0
+	b	.L776
+.L791:
+	adrp	x0, .LANCHOR92
+	strh	wzr, [x0, #:lo12:.LANCHOR92]
+	b	.L793
+.L789:
+	strh	wzr, [x28]
+	b	.L793
+.L792:
+	sub	w26, w26, #1
+	ands	w26, w26, 65535
+	bne	.L794
+	b	.L793
+.L796:
+	ldr	x1, [x29, 136]
+	ldrh	w0, [x0, #:lo12:.LANCHOR95]
+	ldrh	w2, [x27, #:lo12:.LANCHOR100]
+	ldrb	w1, [x1, #:lo12:.LANCHOR80]
 	mul	w1, w1, w0
 	cmp	w2, w1
-	ble	.L746
+	ble	.L769
 	sub	w0, w2, w0, lsr 3
-	strh	w0, [x28, #:lo12:.LANCHOR93]
-	b	.L746
-.L758:
-	ldrh	w1, [x0, #:lo12:.LANCHOR87]
-	adrp	x0, .LANCHOR80
-	ldrh	w2, [x22, #:lo12:.LANCHOR96]
+	strh	w0, [x27, #:lo12:.LANCHOR100]
+	b	.L769
+.L798:
+	cmp	w6, 64
+	bls	.L800
+	strh	wzr, [x21]
+.L800:
+	cmp	w24, w26
+	bcc	.L803
+.L802:
+	adrp	x0, .LANCHOR95
+	ldrh	w2, [x28, #:lo12:.LANCHOR102]
+	ldrh	w1, [x0, #:lo12:.LANCHOR95]
+	ldr	x0, [x29, 136]
 	ldrb	w0, [x0, #:lo12:.LANCHOR80]
 	mul	w0, w0, w1
 	sub	w0, w0, #32
 	cmp	w2, w0
-	bge	.L732
+	bge	.L769
 	add	w1, w2, w1, lsr 3
-	strh	w1, [x22, #:lo12:.LANCHOR96]
-	b	.L732
-.L763:
+	strh	w1, [x28, #:lo12:.LANCHOR102]
+	b	.L769
+.L801:
+	sub	w25, w25, #1
+	ands	w25, w25, 65535
+	bne	.L804
+	b	.L800
+.L810:
 	mov	w23, 0
-	b	.L740
+	mov	w24, 0
+	b	.L778
 	.size	gc_search_src_blk, .-gc_search_src_blk
 	.section	.text.zftl_insert_free_list,"ax",@progbits
 	.align	2
@@ -4589,27 +4918,27 @@ zftl_insert_free_list:
 	add	x0, x0, x1, uxth 2
 	ldrb	w0, [x0, 2]
 	ands	w0, w0, 24
-	bne	.L814
-	adrp	x2, .LANCHOR97
-	adrp	x0, .LANCHOR98
-	add	x2, x2, :lo12:.LANCHOR97
-	add	x0, x0, :lo12:.LANCHOR98
-.L816:
+	bne	.L862
+	adrp	x2, .LANCHOR103
+	adrp	x0, .LANCHOR104
+	add	x2, x2, :lo12:.LANCHOR103
+	add	x0, x0, :lo12:.LANCHOR104
+.L864:
 	b	_insert_free_list
-.L814:
+.L862:
 	cmp	w0, 16
-	bne	.L815
-	adrp	x2, .LANCHOR99
-	adrp	x0, .LANCHOR100
-	add	x2, x2, :lo12:.LANCHOR99
-	add	x0, x0, :lo12:.LANCHOR100
-	b	.L816
-.L815:
-	adrp	x2, .LANCHOR101
-	adrp	x0, .LANCHOR102
-	add	x2, x2, :lo12:.LANCHOR101
-	add	x0, x0, :lo12:.LANCHOR102
-	b	.L816
+	bne	.L863
+	adrp	x2, .LANCHOR105
+	adrp	x0, .LANCHOR106
+	add	x2, x2, :lo12:.LANCHOR105
+	add	x0, x0, :lo12:.LANCHOR106
+	b	.L864
+.L863:
+	adrp	x2, .LANCHOR107
+	adrp	x0, .LANCHOR108
+	add	x2, x2, :lo12:.LANCHOR107
+	add	x0, x0, :lo12:.LANCHOR108
+	b	.L864
 	.size	zftl_insert_free_list, .-zftl_insert_free_list
 	.section	.text.zftl_insert_data_list,"ax",@progbits
 	.align	2
@@ -4623,30 +4952,30 @@ zftl_insert_data_list:
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L818
-	adrp	x2, .LANCHOR92
+	bne	.L866
+	adrp	x2, .LANCHOR97
 	adrp	x0, .LANCHOR12
-	add	x2, x2, :lo12:.LANCHOR92
+	add	x2, x2, :lo12:.LANCHOR97
 	add	x0, x0, :lo12:.LANCHOR12
-.L821:
+.L869:
 	b	_insert_data_list
-.L818:
+.L866:
 	cmp	w2, 96
-	bne	.L819
-	adrp	x2, .LANCHOR90
-	adrp	x0, .LANCHOR83
-	add	x2, x2, :lo12:.LANCHOR90
-	add	x0, x0, :lo12:.LANCHOR83
-	b	.L821
-.L819:
+	bne	.L867
+	adrp	x2, .LANCHOR99
+	adrp	x0, .LANCHOR89
+	add	x2, x2, :lo12:.LANCHOR99
+	add	x0, x0, :lo12:.LANCHOR89
+	b	.L869
+.L867:
 	cmp	w2, 160
-	bne	.L817
-	adrp	x2, .LANCHOR94
-	adrp	x0, .LANCHOR82
-	add	x2, x2, :lo12:.LANCHOR94
-	add	x0, x0, :lo12:.LANCHOR82
-	b	.L821
-.L817:
+	bne	.L865
+	adrp	x2, .LANCHOR93
+	adrp	x0, .LANCHOR88
+	add	x2, x2, :lo12:.LANCHOR93
+	add	x0, x0, :lo12:.LANCHOR88
+	b	.L869
+.L865:
 	ret
 	.size	zftl_insert_data_list, .-zftl_insert_data_list
 	.section	.text.zftl_gc_get_free_sblk,"ax",@progbits
@@ -4665,55 +4994,61 @@ zftl_gc_get_free_sblk:
 	ldrh	w19, [x0, 588]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L823
-	cbnz	w21, .L823
+	beq	.L871
+	cbnz	w21, .L871
 	mov	w1, w19
-	adrp	x0, .LC53
-	add	x0, x0, :lo12:.LC53
+	adrp	x0, .LC59
+	add	x0, x0, :lo12:.LC59
 	bl	printf
 	ldr	x0, [x20, #:lo12:.LANCHOR10]
 	mov	w1, -1
 	strh	w1, [x0, 588]
-.L824:
+.L872:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L823:
-	adrp	x2, .LANCHOR99
-	adrp	x20, .LANCHOR101
-	ldrh	w0, [x2, #:lo12:.LANCHOR99]
-	ldrh	w1, [x20, #:lo12:.LANCHOR101]
+.L871:
+	adrp	x2, .LANCHOR105
+	adrp	x20, .LANCHOR107
+	ldrh	w0, [x2, #:lo12:.LANCHOR105]
+	ldrh	w1, [x20, #:lo12:.LANCHOR107]
 	cmp	w0, w1
-	bls	.L825
-	lsr	w1, w0, 3
-	cmp	w21, 0
-	adrp	x0, .LANCHOR100
-	csel	w1, w1, wzr, ne
-	add	x2, x2, :lo12:.LANCHOR99
-	add	x0, x0, :lo12:.LANCHOR100
-.L839:
+	bcc	.L873
+	adrp	x3, .LANCHOR103
+	ldrh	w3, [x3, #:lo12:.LANCHOR103]
+	cmp	w3, w0
+	bls	.L874
+	cbz	w1, .L874
+.L873:
+	cbnz	w21, .L875
+	lsr	w1, w1, 2
+.L876:
+	adrp	x0, .LANCHOR108
+	add	x2, x20, :lo12:.LANCHOR107
+	add	x0, x0, :lo12:.LANCHOR108
+.L891:
 	bl	_list_pop_index_node
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	bne	.L830
-	adrp	x0, .LANCHOR97
-	ldrh	w5, [x20, #:lo12:.LANCHOR101]
+	bne	.L879
+	adrp	x0, .LANCHOR103
+	ldrh	w5, [x20, #:lo12:.LANCHOR107]
 	mov	w2, w22
 	mov	w1, w19
-	ldrh	w4, [x0, #:lo12:.LANCHOR97]
-	adrp	x0, .LANCHOR98
-	ldr	x3, [x0, #:lo12:.LANCHOR98]
-	adrp	x0, .LC54
-	add	x0, x0, :lo12:.LC54
+	ldrh	w4, [x0, #:lo12:.LANCHOR103]
+	adrp	x0, .LANCHOR104
+	ldr	x3, [x0, #:lo12:.LANCHOR104]
+	adrp	x0, .LC60
+	add	x0, x0, :lo12:.LC60
 	bl	printf
-.L830:
-	cbz	w21, .L824
+.L879:
+	cbz	w21, .L872
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L824
+	tbz	x0, 8, .L872
 	adrp	x4, .LANCHOR9
 	adrp	x1, .LANCHOR7
 	uxtw	x3, w19
@@ -4727,26 +5062,26 @@ zftl_gc_get_free_sblk:
 	ldrh	w5, [x1, x0]
 	ubfx	x4, x4, 11, 8
 	mov	w1, w19
-	adrp	x0, .LC55
+	adrp	x0, .LC61
 	ubfx	x3, x2, 3, 2
 	and	w5, w5, 2047
 	ubfx	x2, x2, 5, 3
-	add	x0, x0, :lo12:.LC55
+	add	x0, x0, :lo12:.LC61
 	bl	printf
-	b	.L824
-.L825:
-	cbnz	w21, .L828
-	lsr	w1, w1, 2
-.L829:
-	adrp	x0, .LANCHOR102
-	add	x2, x20, :lo12:.LANCHOR101
-	add	x0, x0, :lo12:.LANCHOR102
-	b	.L839
-.L828:
+	b	.L872
+.L875:
 	mov	w1, 7
 	mul	w1, w0, w1
 	lsr	w1, w1, 3
-	b	.L829
+	b	.L876
+.L874:
+	lsr	w1, w0, 3
+	cmp	w21, 0
+	adrp	x0, .LANCHOR106
+	csel	w1, w1, wzr, ne
+	add	x2, x2, :lo12:.LANCHOR105
+	add	x0, x0, :lo12:.LANCHOR106
+	b	.L891
 	.size	zftl_gc_get_free_sblk, .-zftl_gc_get_free_sblk
 	.section	.text.zftl_get_free_sblk,"ax",@progbits
 	.align	2
@@ -4759,99 +5094,99 @@ zftl_get_free_sblk:
 	and	w20, w1, 65535
 	str	x21, [sp, 32]
 	cmp	w20, 5
-	bne	.L841
-	adrp	x2, .LANCHOR99
-	adrp	x0, .LANCHOR101
-	ldrh	w3, [x2, #:lo12:.LANCHOR99]
-	ldrh	w1, [x0, #:lo12:.LANCHOR101]
+	bne	.L893
+	adrp	x2, .LANCHOR105
+	adrp	x0, .LANCHOR107
+	ldrh	w3, [x2, #:lo12:.LANCHOR105]
+	ldrh	w1, [x0, #:lo12:.LANCHOR107]
 	cmp	w3, w1
-	bcc	.L842
-	adrp	x4, .LANCHOR97
-	ldrh	w4, [x4, #:lo12:.LANCHOR97]
+	bcc	.L894
+	adrp	x4, .LANCHOR103
+	ldrh	w4, [x4, #:lo12:.LANCHOR103]
 	cmp	w4, w3
-	bls	.L843
-	cbz	w1, .L843
-.L842:
-	add	x2, x0, :lo12:.LANCHOR101
+	bls	.L895
+	cbz	w1, .L895
+.L894:
+	add	x2, x0, :lo12:.LANCHOR107
 	lsr	w1, w1, 1
-.L862:
-	adrp	x0, .LANCHOR102
-	add	x0, x0, :lo12:.LANCHOR102
-	b	.L861
-.L843:
-	adrp	x0, .LANCHOR100
-	add	x2, x2, :lo12:.LANCHOR99
-	add	x0, x0, :lo12:.LANCHOR100
+.L914:
+	adrp	x0, .LANCHOR108
+	add	x0, x0, :lo12:.LANCHOR108
+	b	.L913
+.L895:
+	adrp	x0, .LANCHOR106
+	add	x2, x2, :lo12:.LANCHOR105
+	add	x0, x0, :lo12:.LANCHOR106
 	mov	w1, 0
-.L861:
+.L913:
 	bl	_list_pop_index_node
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	bne	.L846
-	adrp	x0, .LANCHOR101
+	bne	.L898
+	adrp	x0, .LANCHOR107
 	mov	w2, w20
 	mov	w1, w19
-	ldrh	w5, [x0, #:lo12:.LANCHOR101]
-	adrp	x0, .LANCHOR97
-	ldrh	w4, [x0, #:lo12:.LANCHOR97]
-	adrp	x0, .LANCHOR98
-	ldr	x3, [x0, #:lo12:.LANCHOR98]
-	adrp	x0, .LC54
-	add	x0, x0, :lo12:.LC54
+	ldrh	w5, [x0, #:lo12:.LANCHOR107]
+	adrp	x0, .LANCHOR103
+	ldrh	w4, [x0, #:lo12:.LANCHOR103]
+	adrp	x0, .LANCHOR104
+	ldr	x3, [x0, #:lo12:.LANCHOR104]
+	adrp	x0, .LC60
+	add	x0, x0, :lo12:.LC60
 	bl	printf
-	b	.L846
-.L841:
+	b	.L898
+.L893:
 	adrp	x21, .LANCHOR10
 	and	w0, w0, 65535
 	ldr	x1, [x21, #:lo12:.LANCHOR10]
 	ldrh	w19, [x1, 590]
 	mov	w1, 65535
 	cmp	w19, w1
-	beq	.L845
+	beq	.L897
 	cmp	w20, 1
-	beq	.L845
+	beq	.L897
 	mov	w1, w19
-	adrp	x0, .LC56
-	add	x0, x0, :lo12:.LC56
+	adrp	x0, .LC62
+	add	x0, x0, :lo12:.LC62
 	bl	printf
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	mov	w1, -1
 	strh	w1, [x0, 590]
-.L846:
+.L898:
 	mov	w0, w19
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L845:
-	adrp	x2, .LANCHOR97
-	adrp	x4, .LANCHOR101
-	ldrh	w1, [x2, #:lo12:.LANCHOR97]
-	ldrh	w3, [x4, #:lo12:.LANCHOR101]
+.L897:
+	adrp	x2, .LANCHOR103
+	adrp	x4, .LANCHOR107
+	ldrh	w1, [x2, #:lo12:.LANCHOR103]
+	ldrh	w3, [x4, #:lo12:.LANCHOR107]
 	cmp	w1, w3
-	bcc	.L847
-	adrp	x5, .LANCHOR99
-	ldrh	w5, [x5, #:lo12:.LANCHOR99]
+	bcc	.L899
+	adrp	x5, .LANCHOR105
+	ldrh	w5, [x5, #:lo12:.LANCHOR105]
 	cmp	w5, w1
-	bls	.L848
-	cbz	w3, .L848
-.L847:
+	bls	.L900
+	cbz	w3, .L900
+.L899:
 	cmp	w20, 1
 	lsr	w3, w3, 1
 	csel	w0, w3, w0, eq
-	add	x2, x4, :lo12:.LANCHOR101
+	add	x2, x4, :lo12:.LANCHOR107
 	mov	w1, w0
-	b	.L862
-.L848:
+	b	.L914
+.L900:
 	lsr	w1, w1, 1
 	cmp	w20, 1
 	csel	w0, w1, w0, eq
-	add	x2, x2, :lo12:.LANCHOR97
+	add	x2, x2, :lo12:.LANCHOR103
 	mov	w1, w0
-	adrp	x0, .LANCHOR98
-	add	x0, x0, :lo12:.LANCHOR98
-	b	.L861
+	adrp	x0, .LANCHOR104
+	add	x0, x0, :lo12:.LANCHOR104
+	b	.L913
 	.size	zftl_get_free_sblk, .-zftl_get_free_sblk
 	.section	.text.zftl_remove_data_node,"ax",@progbits
 	.align	2
@@ -4865,30 +5200,30 @@ zftl_remove_data_node:
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L864
-	adrp	x2, .LANCHOR92
+	bne	.L916
+	adrp	x2, .LANCHOR97
 	adrp	x0, .LANCHOR12
-	add	x2, x2, :lo12:.LANCHOR92
+	add	x2, x2, :lo12:.LANCHOR97
 	add	x0, x0, :lo12:.LANCHOR12
-.L867:
+.L919:
 	b	_list_remove_node
-.L864:
+.L916:
 	cmp	w2, 96
-	bne	.L865
-	adrp	x2, .LANCHOR90
-	adrp	x0, .LANCHOR83
-	add	x2, x2, :lo12:.LANCHOR90
-	add	x0, x0, :lo12:.LANCHOR83
-	b	.L867
-.L865:
+	bne	.L917
+	adrp	x2, .LANCHOR99
+	adrp	x0, .LANCHOR89
+	add	x2, x2, :lo12:.LANCHOR99
+	add	x0, x0, :lo12:.LANCHOR89
+	b	.L919
+.L917:
 	cmp	w2, 160
-	bne	.L863
-	adrp	x2, .LANCHOR94
-	adrp	x0, .LANCHOR82
-	add	x2, x2, :lo12:.LANCHOR94
-	add	x0, x0, :lo12:.LANCHOR82
-	b	.L867
-.L863:
+	bne	.L915
+	adrp	x2, .LANCHOR93
+	adrp	x0, .LANCHOR88
+	add	x2, x2, :lo12:.LANCHOR93
+	add	x0, x0, :lo12:.LANCHOR88
+	b	.L919
+.L915:
 	ret
 	.size	zftl_remove_data_node, .-zftl_remove_data_node
 	.section	.text.zftl_remove_free_node,"ax",@progbits
@@ -4902,27 +5237,27 @@ zftl_remove_free_node:
 	add	x0, x0, x1, uxth 2
 	ldrb	w0, [x0, 2]
 	ands	w0, w0, 24
-	bne	.L869
-	adrp	x2, .LANCHOR97
-	adrp	x0, .LANCHOR98
-	add	x2, x2, :lo12:.LANCHOR97
-	add	x0, x0, :lo12:.LANCHOR98
-.L871:
+	bne	.L921
+	adrp	x2, .LANCHOR103
+	adrp	x0, .LANCHOR104
+	add	x2, x2, :lo12:.LANCHOR103
+	add	x0, x0, :lo12:.LANCHOR104
+.L923:
 	b	_list_remove_node
-.L869:
+.L921:
 	cmp	w0, 16
-	bne	.L870
-	adrp	x2, .LANCHOR99
-	adrp	x0, .LANCHOR100
-	add	x2, x2, :lo12:.LANCHOR99
-	add	x0, x0, :lo12:.LANCHOR100
-	b	.L871
-.L870:
-	adrp	x2, .LANCHOR101
-	adrp	x0, .LANCHOR102
-	add	x2, x2, :lo12:.LANCHOR101
-	add	x0, x0, :lo12:.LANCHOR102
-	b	.L871
+	bne	.L922
+	adrp	x2, .LANCHOR105
+	adrp	x0, .LANCHOR106
+	add	x2, x2, :lo12:.LANCHOR105
+	add	x0, x0, :lo12:.LANCHOR106
+	b	.L923
+.L922:
+	adrp	x2, .LANCHOR107
+	adrp	x0, .LANCHOR108
+	add	x2, x2, :lo12:.LANCHOR107
+	add	x0, x0, :lo12:.LANCHOR108
+	b	.L923
 	.size	zftl_remove_free_node, .-zftl_remove_free_node
 	.section	.text.zftl_list_update_data_list,"ax",@progbits
 	.align	2
@@ -4936,30 +5271,30 @@ zftl_list_update_data_list:
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L873
-	adrp	x2, .LANCHOR92
+	bne	.L925
+	adrp	x2, .LANCHOR97
 	adrp	x0, .LANCHOR12
-	add	x2, x2, :lo12:.LANCHOR92
+	add	x2, x2, :lo12:.LANCHOR97
 	add	x0, x0, :lo12:.LANCHOR12
-.L876:
+.L928:
 	b	_list_update_data_list
-.L873:
+.L925:
 	cmp	w2, 96
-	bne	.L874
-	adrp	x2, .LANCHOR90
-	adrp	x0, .LANCHOR83
-	add	x2, x2, :lo12:.LANCHOR90
-	add	x0, x0, :lo12:.LANCHOR83
-	b	.L876
-.L874:
+	bne	.L926
+	adrp	x2, .LANCHOR99
+	adrp	x0, .LANCHOR89
+	add	x2, x2, :lo12:.LANCHOR99
+	add	x0, x0, :lo12:.LANCHOR89
+	b	.L928
+.L926:
 	cmp	w2, 160
-	bne	.L872
-	adrp	x2, .LANCHOR94
-	adrp	x0, .LANCHOR82
-	add	x2, x2, :lo12:.LANCHOR94
-	add	x0, x0, :lo12:.LANCHOR82
-	b	.L876
-.L872:
+	bne	.L924
+	adrp	x2, .LANCHOR93
+	adrp	x0, .LANCHOR88
+	add	x2, x2, :lo12:.LANCHOR93
+	add	x0, x0, :lo12:.LANCHOR88
+	b	.L928
+.L924:
 	ret
 	.size	zftl_list_update_data_list, .-zftl_list_update_data_list
 	.section	.text.print_list_info,"ax",@progbits
@@ -4975,21 +5310,21 @@ print_list_info:
 	stp	x19, x20, [sp, 48]
 	mov	x19, x0
 	stp	x21, x22, [sp, 64]
-	adrp	x0, .LC57
+	adrp	x0, .LC63
 	stp	x23, x24, [sp, 80]
-	add	x0, x0, :lo12:.LC57
+	add	x0, x0, :lo12:.LC63
 	bl	printf
 	ldr	x19, [x19]
-	cbz	x19, .L877
+	cbz	x19, .L929
 	mov	x24, -6148914691236517206
-	adrp	x22, .LC58
-	adrp	x21, .LANCHOR103
-	add	x22, x22, :lo12:.LC58
-	add	x21, x21, :lo12:.LANCHOR103
+	adrp	x22, .LC64
+	adrp	x21, .LANCHOR109
+	add	x22, x22, :lo12:.LC64
+	add	x21, x21, :lo12:.LANCHOR109
 	mov	w20, 0
 	adrp	x23, .LANCHOR4
 	movk	x24, 0xaaab, lsl 0
-.L881:
+.L933:
 	ldr	x2, [x23, #:lo12:.LANCHOR4]
 	adrp	x1, .LANCHOR7
 	adrp	x8, .LANCHOR9
@@ -5022,7 +5357,7 @@ print_list_info:
 	ldrh	w19, [x19]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L877
+	beq	.L929
 	ldr	x0, [x23, #:lo12:.LANCHOR4]
 	mov	w1, 6
 	add	w20, w20, 1
@@ -5030,8 +5365,8 @@ print_list_info:
 	umaddl	x19, w19, w1, x0
 	ldrh	w0, [x21]
 	cmp	w0, w20
-	bcs	.L881
-.L877:
+	bcs	.L933
+.L929:
 	ldp	x19, x20, [sp, 48]
 	ldp	x21, x22, [sp, 64]
 	ldp	x23, x24, [sp, 80]
@@ -5045,37 +5380,37 @@ print_list_info:
 	.type	dump_all_list_info, %function
 dump_all_list_info:
 	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR97
-	adrp	x0, .LANCHOR98
-	add	x1, x1, :lo12:.LANCHOR97
+	adrp	x1, .LANCHOR103
+	adrp	x0, .LANCHOR104
+	add	x1, x1, :lo12:.LANCHOR103
 	add	x29, sp, 0
-	add	x0, x0, :lo12:.LANCHOR98
+	add	x0, x0, :lo12:.LANCHOR104
 	bl	print_list_info
-	adrp	x1, .LANCHOR99
-	adrp	x0, .LANCHOR100
-	add	x1, x1, :lo12:.LANCHOR99
-	add	x0, x0, :lo12:.LANCHOR100
+	adrp	x1, .LANCHOR105
+	adrp	x0, .LANCHOR106
+	add	x1, x1, :lo12:.LANCHOR105
+	add	x0, x0, :lo12:.LANCHOR106
 	bl	print_list_info
-	adrp	x1, .LANCHOR101
-	adrp	x0, .LANCHOR102
-	add	x1, x1, :lo12:.LANCHOR101
-	add	x0, x0, :lo12:.LANCHOR102
+	adrp	x1, .LANCHOR107
+	adrp	x0, .LANCHOR108
+	add	x1, x1, :lo12:.LANCHOR107
+	add	x0, x0, :lo12:.LANCHOR108
 	bl	print_list_info
-	adrp	x1, .LANCHOR92
+	adrp	x1, .LANCHOR97
 	adrp	x0, .LANCHOR12
-	add	x1, x1, :lo12:.LANCHOR92
+	add	x1, x1, :lo12:.LANCHOR97
 	add	x0, x0, :lo12:.LANCHOR12
 	bl	print_list_info
-	adrp	x1, .LANCHOR90
-	adrp	x0, .LANCHOR83
-	add	x1, x1, :lo12:.LANCHOR90
-	add	x0, x0, :lo12:.LANCHOR83
+	adrp	x1, .LANCHOR99
+	adrp	x0, .LANCHOR89
+	add	x1, x1, :lo12:.LANCHOR99
+	add	x0, x0, :lo12:.LANCHOR89
 	bl	print_list_info
 	ldp	x29, x30, [sp], 16
-	adrp	x1, .LANCHOR94
-	adrp	x0, .LANCHOR82
-	add	x1, x1, :lo12:.LANCHOR94
-	add	x0, x0, :lo12:.LANCHOR82
+	adrp	x1, .LANCHOR93
+	adrp	x0, .LANCHOR88
+	add	x1, x1, :lo12:.LANCHOR93
+	add	x0, x0, :lo12:.LANCHOR88
 	b	print_list_info
 	.size	dump_all_list_info, .-dump_all_list_info
 	.section	.text.ftl_tmp_into_update,"ax",@progbits
@@ -5083,40 +5418,40 @@ dump_all_list_info:
 	.global	ftl_tmp_into_update
 	.type	ftl_tmp_into_update, %function
 ftl_tmp_into_update:
-	adrp	x0, .LANCHOR104
-	ldr	x0, [x0, #:lo12:.LANCHOR104]
+	adrp	x0, .LANCHOR110
+	ldr	x0, [x0, #:lo12:.LANCHOR110]
 	ldr	w1, [x0, 16]
 	cmp	w1, 2048
-	bls	.L886
+	bls	.L938
 	ldr	w2, [x0, 20]
 	add	w2, w2, w1, lsr 11
 	and	w1, w1, 2047
 	stp	w1, w2, [x0, 16]
-.L886:
+.L938:
 	ldr	w1, [x0, 24]
 	cmp	w1, 2048
-	bls	.L887
+	bls	.L939
 	ldr	w2, [x0, 28]
 	add	w2, w2, w1, lsr 11
 	and	w1, w1, 2047
 	stp	w1, w2, [x0, 24]
-.L887:
+.L939:
 	ldr	w1, [x0, 32]
 	cmp	w1, 1024
-	bls	.L888
+	bls	.L940
 	ldr	w2, [x0, 36]
 	add	w2, w2, w1, lsr 10
 	and	w1, w1, 1023
 	stp	w1, w2, [x0, 32]
-.L888:
+.L940:
 	ldr	w1, [x0, 40]
 	cmp	w1, 1024
-	bls	.L885
+	bls	.L937
 	ldr	w2, [x0, 44]
 	add	w2, w2, w1, lsr 10
 	and	w1, w1, 1023
 	stp	w1, w2, [x0, 40]
-.L885:
+.L937:
 	ret
 	.size	ftl_tmp_into_update, .-ftl_tmp_into_update
 	.section	.text.ftl_get_blk_list_in_sblk,"ax",@progbits
@@ -5127,18 +5462,18 @@ ftl_get_blk_list_in_sblk:
 	adrp	x2, .LANCHOR7
 	and	w0, w0, 65535
 	mov	w7, 24
-	adrp	x8, .LANCHOR68
+	adrp	x8, .LANCHOR75
 	ldr	x2, [x2, #:lo12:.LANCHOR7]
-	add	x8, x8, :lo12:.LANCHOR68
+	add	x8, x8, :lo12:.LANCHOR75
 	mov	w3, 0
 	add	x2, x2, x0, uxth 2
 	ldrb	w13, [x2, 3]
 	adrp	x2, .LANCHOR80
 	ldrb	w11, [x2, #:lo12:.LANCHOR80]
-	adrp	x2, .LANCHOR69
-	ldrb	w6, [x2, #:lo12:.LANCHOR69]
-	adrp	x2, .LANCHOR31
-	ldrb	w2, [x2, #:lo12:.LANCHOR31]
+	adrp	x2, .LANCHOR76
+	ldrb	w6, [x2, #:lo12:.LANCHOR76]
+	adrp	x2, .LANCHOR32
+	ldrb	w2, [x2, #:lo12:.LANCHOR32]
 	sub	w7, w7, w2
 	and	w2, w6, 65535
 	mul	w0, w0, w2
@@ -5146,18 +5481,18 @@ ftl_get_blk_list_in_sblk:
 	sxth	w5, w2
 	and	w4, w0, 65535
 	mov	w0, 0
-.L891:
+.L943:
 	cmp	w3, w11
-	blt	.L895
+	blt	.L947
 	sxtw	x2, w0
 	mov	w3, -1
-.L896:
+.L948:
 	cmp	w11, w2
-	bgt	.L897
+	bgt	.L949
 	ret
-.L895:
+.L947:
 	asr	w2, w13, w3
-	tbnz	x2, 0, .L892
+	tbnz	x2, 0, .L944
 	sdiv	w2, w3, w6
 	ldrh	w10, [x8]
 	sbfiz	x12, x0, 1, 32
@@ -5166,21 +5501,21 @@ ftl_get_blk_list_in_sblk:
 	lsl	w2, w2, w10
 	add	w2, w4, w2
 	and	w2, w2, 65535
-	bhi	.L893
-.L898:
+	bhi	.L945
+.L950:
 	add	w0, w0, 1
 	strh	w2, [x1, x12]
-.L892:
+.L944:
 	add	w3, w3, 1
-	b	.L891
-.L893:
+	b	.L943
+.L945:
 	and	w10, w5, w3
 	add	w2, w2, w10
-	b	.L898
-.L897:
+	b	.L950
+.L949:
 	strh	w3, [x1, x2, lsl 1]
 	add	x2, x2, 1
-	b	.L896
+	b	.L948
 	.size	ftl_get_blk_list_in_sblk, .-ftl_get_blk_list_in_sblk
 	.section	.text.ftl_erase_phy_blk,"ax",@progbits
 	.align	2
@@ -5192,35 +5527,35 @@ ftl_erase_phy_blk:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	mov	w21, w1
-	adrp	x1, .LANCHOR31
+	adrp	x1, .LANCHOR32
 	stp	x19, x20, [sp, 16]
-	adrp	x22, .LANCHOR105
-	ldrb	w19, [x1, #:lo12:.LANCHOR31]
+	adrp	x22, .LANCHOR111
+	ldrb	w19, [x1, #:lo12:.LANCHOR32]
 	mov	w1, 24
 	sub	w19, w1, w19
-	adrp	x1, .LANCHOR68
-	ldrh	w1, [x1, #:lo12:.LANCHOR68]
+	adrp	x1, .LANCHOR75
+	ldrh	w1, [x1, #:lo12:.LANCHOR75]
 	sub	w1, w19, w1
 	mov	w19, 1
 	lsl	w19, w19, w1
 	sub	w19, w19, #1
 	and	w19, w19, w0
 	asr	w20, w0, w1
-	adrp	x0, .LANCHOR74
+	adrp	x0, .LANCHOR81
 	sxth	w19, w19
-	ldrb	w0, [x0, #:lo12:.LANCHOR74]
-	cbz	w0, .L900
-	adrp	x0, .LANCHOR75
-	ldrb	w0, [x0, #:lo12:.LANCHOR75]
-	cbnz	w0, .L900
-	ldrh	w2, [x22, #:lo12:.LANCHOR105]
+	ldrb	w0, [x0, #:lo12:.LANCHOR81]
+	cbz	w0, .L952
+	adrp	x0, .LANCHOR82
+	ldrb	w0, [x0, #:lo12:.LANCHOR82]
+	cbnz	w0, .L952
+	ldrh	w2, [x22, #:lo12:.LANCHOR111]
 	cmp	w21, 0
 	cset	w1, eq
 	mov	w0, w20
 	mul	w2, w2, w19
 	bl	flash_erase_block_en
-.L900:
-	ldrh	w2, [x22, #:lo12:.LANCHOR105]
+.L952:
+	ldrh	w2, [x22, #:lo12:.LANCHOR111]
 	mov	w1, w21
 	mov	w0, w20
 	ldp	x21, x22, [sp, 32]
@@ -5241,56 +5576,56 @@ ftl_erase_sblk:
 	stp	x25, x26, [sp, 64]
 	and	w26, w0, 65535
 	ldr	x0, [x23, #:lo12:.LANCHOR7]
-	adrp	x25, .LANCHOR106
+	adrp	x25, .LANCHOR112
 	stp	x21, x22, [sp, 32]
 	ubfiz	x22, x26, 2, 16
 	add	x0, x0, x22
 	stp	x27, x28, [sp, 80]
 	stp	x19, x20, [sp, 16]
-	adrp	x24, .LANCHOR69
+	adrp	x24, .LANCHOR76
 	mov	w20, w1
-	add	x25, x25, :lo12:.LANCHOR106
+	add	x25, x25, :lo12:.LANCHOR112
 	ldrb	w28, [x0, 3]
-	add	x24, x24, :lo12:.LANCHOR69
+	add	x24, x24, :lo12:.LANCHOR76
 	add	x27, x29, 112
 	mov	w19, 0
-.L906:
+.L958:
 	ldrb	w0, [x25]
 	cmp	w19, w0
-	bge	.L917
+	bge	.L969
 	ldrb	w1, [x24]
-	adrp	x0, .LANCHOR105
+	adrp	x0, .LANCHOR111
 	mov	w21, 0
-	ldrh	w3, [x0, #:lo12:.LANCHOR105]
+	ldrh	w3, [x0, #:lo12:.LANCHOR111]
 	sub	w4, w1, #1
 	mov	w0, 0
 	mul	w6, w19, w1
 	mul	w5, w26, w1
-	b	.L918
-.L908:
+	b	.L970
+.L960:
 	add	w2, w0, w6
 	asr	w2, w28, w2
-	tbnz	x2, 0, .L907
+	tbnz	x2, 0, .L959
 	and	w2, w0, w4
 	add	w2, w2, w5
 	mul	w2, w2, w3
 	str	w2, [x27, w21, sxtw 2]
 	add	w21, w21, 1
-.L907:
+.L959:
 	add	w0, w0, 1
-.L918:
+.L970:
 	cmp	w0, w1
-	blt	.L908
+	blt	.L960
 	cmp	w1, 4
-	bne	.L909
+	bne	.L961
 	mov	x3, 0
-.L910:
+.L962:
 	cmp	w21, w3
-	bgt	.L911
-.L912:
+	bgt	.L963
+.L964:
 	add	w19, w19, 1
-	b	.L906
-.L911:
+	b	.L958
+.L963:
 	ldr	w2, [x27, x3, lsl 2]
 	mov	w1, w20
 	str	x3, [x29, 104]
@@ -5298,65 +5633,65 @@ ftl_erase_sblk:
 	bl	flash_erase_block_en
 	ldr	x3, [x29, 104]
 	add	x3, x3, 1
-	b	.L910
-.L909:
+	b	.L962
+.L961:
 	cmp	w21, 2
-	bne	.L913
-	adrp	x0, .LANCHOR74
-	ldrb	w0, [x0, #:lo12:.LANCHOR74]
-	cbz	w0, .L914
-	adrp	x0, .LANCHOR75
-	ldrb	w0, [x0, #:lo12:.LANCHOR75]
-	cbnz	w0, .L914
+	bne	.L965
+	adrp	x0, .LANCHOR81
+	ldrb	w0, [x0, #:lo12:.LANCHOR81]
+	cbz	w0, .L966
+	adrp	x0, .LANCHOR82
+	ldrb	w0, [x0, #:lo12:.LANCHOR82]
+	cbnz	w0, .L966
 	ldp	w2, w3, [x29, 112]
 	cmp	w20, 0
 	cset	w1, eq
 	mov	w0, w19
 	bl	flash_erase_duplane_block
-.L914:
+.L966:
 	ldp	w2, w3, [x29, 112]
 	mov	w1, w20
 	mov	w0, w19
 	bl	flash_erase_duplane_block
-	b	.L912
-.L913:
+	b	.L964
+.L965:
 	cmp	w21, 1
-	bne	.L912
-	adrp	x0, .LANCHOR74
-	ldrb	w0, [x0, #:lo12:.LANCHOR74]
-	cbz	w0, .L916
-	adrp	x0, .LANCHOR75
-	ldrb	w0, [x0, #:lo12:.LANCHOR75]
-	cbnz	w0, .L916
+	bne	.L964
+	adrp	x0, .LANCHOR81
+	ldrb	w0, [x0, #:lo12:.LANCHOR81]
+	cbz	w0, .L968
+	adrp	x0, .LANCHOR82
+	ldrb	w0, [x0, #:lo12:.LANCHOR82]
+	cbnz	w0, .L968
 	ldr	w2, [x29, 112]
 	cmp	w20, 0
 	cset	w1, eq
 	mov	w0, w19
 	bl	flash_erase_block_en
-.L916:
+.L968:
 	ldr	w2, [x29, 112]
 	mov	w1, w20
 	mov	w0, w19
 	bl	flash_erase_block_en
-	b	.L912
-.L917:
-	adrp	x2, .LANCHOR104
+	b	.L964
+.L969:
+	adrp	x2, .LANCHOR110
 	ldr	x3, [x23, #:lo12:.LANCHOR7]
-	cbnz	w20, .L919
+	cbnz	w20, .L971
 	ldrh	w1, [x3, x22]
 	add	w0, w1, 1
 	and	w0, w0, 2047
 	bfi	w1, w0, 0, 11
 	strh	w1, [x3, x22]
-	ldr	x1, [x2, #:lo12:.LANCHOR104]
+	ldr	x1, [x2, #:lo12:.LANCHOR110]
 	ldr	w2, [x1, 84]
 	add	w2, w2, 1
 	str	w2, [x1, 84]
 	ldrh	w2, [x1, 96]
 	cmp	w2, w0
-	bge	.L921
+	bge	.L973
 	strh	w0, [x1, 96]
-.L921:
+.L973:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -5365,7 +5700,7 @@ ftl_erase_sblk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L919:
+.L971:
 	ldr	w1, [x3, x22]
 	ubfx	x0, x1, 11, 8
 	add	w0, w0, 1
@@ -5373,15 +5708,15 @@ ftl_erase_sblk:
 	bfi	w1, w0, 11, 8
 	str	w1, [x3, x22]
 	and	w0, w0, 65535
-	ldr	x1, [x2, #:lo12:.LANCHOR104]
+	ldr	x1, [x2, #:lo12:.LANCHOR110]
 	ldr	w2, [x1, 80]
 	add	w2, w2, 1
 	str	w2, [x1, 80]
 	ldrh	w2, [x1, 98]
 	cmp	w2, w0
-	bcs	.L921
+	bcs	.L973
 	strh	w0, [x1, 98]
-	b	.L921
+	b	.L973
 	.size	ftl_erase_sblk, .-ftl_erase_sblk
 	.section	.text.ftl_alloc_sys_blk,"ax",@progbits
 	.align	2
@@ -5389,44 +5724,44 @@ ftl_erase_sblk:
 	.type	ftl_alloc_sys_blk, %function
 ftl_alloc_sys_blk:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR104
+	adrp	x0, .LANCHOR110
 	add	x29, sp, 0
-	ldr	x1, [x0, #:lo12:.LANCHOR104]
+	ldr	x1, [x0, #:lo12:.LANCHOR110]
 	ldrh	w2, [x1, 136]
 	str	x19, [sp, 16]
 	mov	x19, x0
 	cmp	w2, 63
-	bls	.L931
+	bls	.L983
 	strh	wzr, [x1, 136]
-.L931:
+.L983:
 	ldrh	w0, [x1, 112]
-	cbnz	w0, .L932
-	adrp	x1, .LANCHOR107
+	cbnz	w0, .L984
+	adrp	x1, .LANCHOR113
 	adrp	x0, .LC0
-	mov	w2, 1150
-	add	x1, x1, :lo12:.LANCHOR107
+	mov	w2, 1283
+	add	x1, x1, :lo12:.LANCHOR113
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L932:
-	ldr	x1, [x19, #:lo12:.LANCHOR104]
+.L984:
+	ldr	x1, [x19, #:lo12:.LANCHOR110]
 	mov	w5, 65535
-.L935:
+.L987:
 	ldrh	w2, [x1, 136]
-.L933:
+.L985:
 	mov	w3, w2
 	cmp	w2, 63
-	ble	.L934
+	ble	.L986
 	strh	wzr, [x1, 136]
-	b	.L935
-.L934:
+	b	.L987
+.L986:
 	add	x4, x2, 1
 	add	x0, x1, x4, lsl 1
 	ldrh	w0, [x0, 158]
 	cmp	w0, w5
-	bne	.L938
+	bne	.L990
 	mov	x2, x4
-	b	.L933
-.L938:
+	b	.L985
+.L990:
 	add	x3, x1, x3, sxtw 1
 	mov	w4, -1
 	ldr	x19, [sp, 16]
@@ -5447,40 +5782,40 @@ ftl_free_sys_blk:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 65535
-	adrp	x0, .LANCHOR104
+	adrp	x0, .LANCHOR110
 	mov	x19, x0
-	ldr	x1, [x0, #:lo12:.LANCHOR104]
+	ldr	x1, [x0, #:lo12:.LANCHOR110]
 	ldrh	w2, [x1, 138]
 	cmp	w2, 63
-	bls	.L941
+	bls	.L993
 	strh	wzr, [x1, 138]
-.L941:
+.L993:
 	ldrh	w0, [x1, 112]
 	cmp	w0, 63
-	bls	.L942
-	adrp	x1, .LANCHOR108
+	bls	.L994
+	adrp	x1, .LANCHOR114
 	adrp	x0, .LC0
-	mov	w2, 1174
-	add	x1, x1, :lo12:.LANCHOR108
+	mov	w2, 1310
+	add	x1, x1, :lo12:.LANCHOR114
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L942:
-	ldr	x0, [x19, #:lo12:.LANCHOR104]
+.L994:
+	ldr	x0, [x19, #:lo12:.LANCHOR110]
 	mov	w4, 65535
-.L945:
+.L997:
 	ldrh	w1, [x0, 138]
-.L943:
+.L995:
 	mov	w2, w1
 	cmp	w1, 63
-	ble	.L944
+	ble	.L996
 	strh	wzr, [x0, 138]
-	b	.L945
-.L944:
+	b	.L997
+.L996:
 	add	x3, x1, 1
 	add	x5, x0, x3, lsl 1
 	ldrh	w5, [x5, 158]
 	cmp	w5, w4
-	bne	.L946
+	bne	.L998
 	add	x2, x0, x2, sxtw 1
 	strh	w20, [x2, 160]
 	strh	w1, [x0, 138]
@@ -5490,9 +5825,9 @@ ftl_free_sys_blk:
 	strh	w1, [x0, 112]
 	ldp	x29, x30, [sp], 32
 	ret
-.L946:
+.L998:
 	mov	x1, x3
-	b	.L943
+	b	.L995
 	.size	ftl_free_sys_blk, .-ftl_free_sys_blk
 	.section	.text.ftl_info_data_recovery,"ax",@progbits
 	.align	2
@@ -5502,7 +5837,7 @@ ftl_info_data_recovery:
 	ldrh	w2, [x0]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L959
+	beq	.L1011
 	stp	x29, x30, [sp, -48]!
 	adrp	x1, .LANCHOR7
 	add	x29, sp, 0
@@ -5513,25 +5848,25 @@ ftl_info_data_recovery:
 	add	x21, x20, x19
 	ldrb	w1, [x21, 2]
 	tst	w1, 224
-	bne	.L949
+	bne	.L1001
 	ldrb	w0, [x0, 4]
 	bfi	w1, w0, 5, 3
 	strb	w1, [x21, 2]
 	mov	w0, w2
 	bl	zftl_remove_free_node
 	ldrb	w0, [x21, 2]
-	adrp	x1, .LANCHOR104
-	ldr	x3, [x1, #:lo12:.LANCHOR104]
-	tbz	x0, 3, .L953
+	adrp	x1, .LANCHOR110
+	ldr	x3, [x1, #:lo12:.LANCHOR110]
+	tbz	x0, 3, .L1005
 	ldrh	w2, [x3, 116]
 	sub	w2, w2, #1
 	strh	w2, [x3, 116]
-.L954:
+.L1006:
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L956
+	bne	.L1008
 	ldr	w0, [x20, x19]
-	ldr	x1, [x1, #:lo12:.LANCHOR104]
+	ldr	x1, [x1, #:lo12:.LANCHOR110]
 	ubfx	x2, x0, 11, 8
 	add	w2, w2, 1
 	bfi	w0, w2, 11, 8
@@ -5539,44 +5874,44 @@ ftl_info_data_recovery:
 	ldrh	w0, [x1, 120]
 	sub	w0, w0, #1
 	strh	w0, [x1, 120]
-.L949:
+.L1001:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L953:
+.L1005:
 	tst	w0, 24
-	bne	.L955
+	bne	.L1007
 	ldrh	w2, [x3, 114]
 	sub	w2, w2, #1
 	strh	w2, [x3, 114]
-	b	.L954
-.L955:
+	b	.L1006
+.L1007:
 	ldrh	w2, [x3, 118]
 	sub	w2, w2, #1
 	strh	w2, [x3, 118]
-	b	.L954
-.L956:
+	b	.L1006
+.L1008:
 	ldrh	w2, [x20, x19]
 	cmp	w0, 64
 	add	w3, w2, 1
 	bfi	w2, w3, 0, 11
 	strh	w2, [x20, x19]
-	bne	.L957
-	ldr	x1, [x1, #:lo12:.LANCHOR104]
+	bne	.L1009
+	ldr	x1, [x1, #:lo12:.LANCHOR110]
 	ldrh	w0, [x1, 122]
 	sub	w0, w0, #1
 	strh	w0, [x1, 122]
-	b	.L949
-.L957:
+	b	.L1001
+.L1009:
 	cmp	w0, 96
-	bne	.L949
-	ldr	x1, [x1, #:lo12:.LANCHOR104]
+	bne	.L1001
+	ldr	x1, [x1, #:lo12:.LANCHOR110]
 	ldrh	w0, [x1, 124]
 	sub	w0, w0, #1
 	strh	w0, [x1, 124]
-	b	.L949
-.L959:
+	b	.L1001
+.L1011:
 	ret
 	.size	ftl_info_data_recovery, .-ftl_info_data_recovery
 	.section	.text.ftl_get_ppa_from_index,"ax",@progbits
@@ -5590,15 +5925,15 @@ ftl_get_ppa_from_index:
 	and	w0, w0, 65535
 	add	x29, sp, 0
 	ldr	x2, [x1, #:lo12:.LANCHOR10]
-	adrp	x1, .LANCHOR87
+	adrp	x1, .LANCHOR95
 	ldrb	w3, [x3, #:lo12:.LANCHOR80]
-	ldrh	w1, [x1, #:lo12:.LANCHOR87]
+	ldrh	w1, [x1, #:lo12:.LANCHOR95]
 	stp	x19, x20, [sp, 16]
 	mul	w1, w1, w3
 	cmp	w0, w1
-	bge	.L963
+	bge	.L1015
 	add	x2, x2, 16
-.L964:
+.L1016:
 	ldrb	w1, [x2, 9]
 	sdiv	w19, w0, w1
 	msub	w0, w19, w1, w0
@@ -5606,25 +5941,25 @@ ftl_get_ppa_from_index:
 	ldrh	w20, [x0, 16]
 	mov	w0, 65535
 	cmp	w20, w0
-	bne	.L965
-	adrp	x1, .LANCHOR109
+	bne	.L1017
+	adrp	x1, .LANCHOR115
 	adrp	x0, .LC0
-	mov	w2, 1696
-	add	x1, x1, :lo12:.LANCHOR109
+	mov	w2, 1937
+	add	x1, x1, :lo12:.LANCHOR115
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L965:
-	adrp	x0, .LANCHOR105
-	ldrh	w0, [x0, #:lo12:.LANCHOR105]
+.L1017:
+	adrp	x0, .LANCHOR111
+	ldrh	w0, [x0, #:lo12:.LANCHOR111]
 	madd	w0, w0, w20, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L963:
+.L1015:
 	sub	w0, w0, w1
 	add	x2, x2, 48
 	and	w0, w0, 65535
-	b	.L964
+	b	.L1016
 	.size	ftl_get_ppa_from_index, .-ftl_get_ppa_from_index
 	.section	.text.lpa_hash_get_ppa,"ax",@progbits
 	.align	2
@@ -5632,29 +5967,29 @@ ftl_get_ppa_from_index:
 	.type	lpa_hash_get_ppa, %function
 lpa_hash_get_ppa:
 	and	x2, x0, 255
-	adrp	x1, .LANCHOR110
-	add	x1, x1, :lo12:.LANCHOR110
+	adrp	x1, .LANCHOR116
+	add	x1, x1, :lo12:.LANCHOR116
 	mov	w3, 65535
 	ldrh	w1, [x1, x2, lsl 1]
-	adrp	x2, .LANCHOR111
-	ldr	x4, [x2, #:lo12:.LANCHOR111]
-	adrp	x2, .LANCHOR112
-	ldr	x5, [x2, #:lo12:.LANCHOR112]
-.L968:
+	adrp	x2, .LANCHOR117
+	ldr	x4, [x2, #:lo12:.LANCHOR117]
+	adrp	x2, .LANCHOR118
+	ldr	x5, [x2, #:lo12:.LANCHOR118]
+.L1020:
 	cmp	w1, w3
-	bne	.L970
+	bne	.L1022
 	mov	w0, -1
 	ret
-.L970:
+.L1022:
 	uxtw	x2, w1
 	ldr	w6, [x4, x2, lsl 2]
 	cmp	w0, w6
-	bne	.L969
+	bne	.L1021
 	mov	w0, w1
 	b	ftl_get_ppa_from_index
-.L969:
+.L1021:
 	ldrh	w1, [x5, x2, lsl 1]
-	b	.L968
+	b	.L1020
 	.size	lpa_hash_get_ppa, .-lpa_hash_get_ppa
 	.section	.text.ftl_get_new_free_page,"ax",@progbits
 	.align	2
@@ -5668,50 +6003,50 @@ ftl_get_new_free_page:
 	mov	x19, x0
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L972
-	adrp	x1, .LANCHOR113
+	bne	.L1024
+	adrp	x1, .LANCHOR119
 	adrp	x0, .LC0
-	mov	w2, 1819
-	add	x1, x1, :lo12:.LANCHOR113
+	mov	w2, 2080
+	add	x1, x1, :lo12:.LANCHOR119
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L972:
-	adrp	x0, .LANCHOR87
+.L1024:
+	adrp	x0, .LANCHOR95
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	ldrh	w0, [x0, #:lo12:.LANCHOR95]
 	cmp	w1, w0
-	bne	.L973
-	adrp	x1, .LANCHOR113
+	bne	.L1025
+	adrp	x1, .LANCHOR119
 	adrp	x0, .LC0
-	mov	w2, 1820
-	add	x1, x1, :lo12:.LANCHOR113
+	mov	w2, 2081
+	add	x1, x1, :lo12:.LANCHOR119
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L973:
+.L1025:
 	ldrh	w0, [x19, 6]
-	cbnz	w0, .L974
-	adrp	x1, .LANCHOR113
+	cbnz	w0, .L1026
+	adrp	x1, .LANCHOR119
 	adrp	x0, .LC0
-	mov	w2, 1821
-	add	x1, x1, :lo12:.LANCHOR113
+	mov	w2, 2082
+	add	x1, x1, :lo12:.LANCHOR119
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L974:
+.L1026:
 	ldrb	w0, [x19, 5]
 	mov	w2, 65535
 	add	x0, x0, 8
 	ldrh	w3, [x19, x0, lsl 1]
 	adrp	x0, .LANCHOR80
 	ldrb	w4, [x0, #:lo12:.LANCHOR80]
-.L975:
+.L1027:
 	cmp	w3, w2
 	ldrb	w1, [x19, 5]
-	beq	.L977
-	adrp	x0, .LANCHOR105
+	beq	.L1029
+	adrp	x0, .LANCHOR111
 	add	w1, w1, 1
 	and	w1, w1, 255
 	ldrh	w2, [x19, 2]
-	ldrh	w0, [x0, #:lo12:.LANCHOR105]
+	ldrh	w0, [x0, #:lo12:.LANCHOR111]
 	cmp	w4, w1
 	strb	w1, [x19, 5]
 	mul	w0, w0, w3
@@ -5722,29 +6057,29 @@ ftl_get_new_free_page:
 	orr	w0, w0, w2
 	add	w3, w3, 1
 	strh	w3, [x19, 10]
-	bne	.L971
+	bne	.L1023
 	add	w2, w2, 1
 	strb	wzr, [x19, 5]
 	strh	w2, [x19, 2]
-.L971:
+.L1023:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L977:
+.L1029:
 	add	w1, w1, 1
 	and	w1, w1, 255
 	strb	w1, [x19, 5]
 	cmp	w1, w4
-	bne	.L976
+	bne	.L1028
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 5]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L976:
+.L1028:
 	ldrb	w0, [x19, 5]
 	add	x0, x0, 8
 	ldrh	w3, [x19, x0, lsl 1]
-	b	.L975
+	b	.L1027
 	.size	ftl_get_new_free_page, .-ftl_get_new_free_page
 	.section	.text.ftl_ext_alloc_new_blk,"ax",@progbits
 	.align	2
@@ -5760,22 +6095,22 @@ ftl_ext_alloc_new_blk:
 	mov	w19, w0
 	sub	w0, w0, #1
 	cmp	w1, w0, uxth
-	bcs	.L981
-	adrp	x1, .LANCHOR114
+	bcs	.L1033
+	adrp	x1, .LANCHOR120
 	adrp	x0, .LC0
-	mov	w2, 1852
-	add	x1, x1, :lo12:.LANCHOR114
+	mov	w2, 2117
+	add	x1, x1, :lo12:.LANCHOR120
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L981:
-	adrp	x20, .LANCHOR104
+.L1033:
+	adrp	x20, .LANCHOR110
 	mov	w1, 0
 	mov	w0, w19
 	bl	ftl_erase_phy_blk
-	ldr	x0, [x20, #:lo12:.LANCHOR104]
+	ldr	x0, [x20, #:lo12:.LANCHOR110]
 	ldrh	w0, [x0, 130]
 	bl	ftl_free_sys_blk
-	ldr	x0, [x20, #:lo12:.LANCHOR104]
+	ldr	x0, [x20, #:lo12:.LANCHOR110]
 	strh	w19, [x0, 130]
 	strh	wzr, [x0, 140]
 	mov	w0, 0
@@ -5788,18 +6123,18 @@ ftl_ext_alloc_new_blk:
 	.global	ftl_total_vpn_update
 	.type	ftl_total_vpn_update, %function
 ftl_total_vpn_update:
-	adrp	x2, .LANCHOR115
+	adrp	x2, .LANCHOR121
 	mov	x3, x2
-	ldrh	w1, [x2, #:lo12:.LANCHOR115]
+	ldrh	w1, [x2, #:lo12:.LANCHOR121]
 	cmp	w1, 4
-	bhi	.L984
-	cbnz	w0, .L984
+	bhi	.L1036
+	cbnz	w0, .L1036
 	add	w1, w1, 1
-	strh	w1, [x2, #:lo12:.LANCHOR115]
+	strh	w1, [x2, #:lo12:.LANCHOR121]
 	ret
-.L984:
+.L1036:
 	adrp	x0, .LANCHOR6
-	strh	wzr, [x3, #:lo12:.LANCHOR115]
+	strh	wzr, [x3, #:lo12:.LANCHOR121]
 	mov	x1, 0
 	mov	w2, 0
 	ldrh	w5, [x0, #:lo12:.LANCHOR6]
@@ -5809,46 +6144,38 @@ ftl_total_vpn_update:
 	adrp	x0, .LANCHOR7
 	ldr	x7, [x0, #:lo12:.LANCHOR7]
 	mov	w0, 0
-.L986:
+.L1038:
 	cmp	w5, w1, uxth
-	bhi	.L989
+	bhi	.L1041
 	adrp	x1, .LANCHOR10
 	ldr	x1, [x1, #:lo12:.LANCHOR10]
 	str	w2, [x1, 524]
-	adrp	x2, .LANCHOR104
+	adrp	x2, .LANCHOR110
 	str	w0, [x1, 528]
-	ldr	x2, [x2, #:lo12:.LANCHOR104]
+	ldr	x2, [x2, #:lo12:.LANCHOR110]
 	ldrh	w2, [x2, 120]
-	cbz	w2, .L983
+	cbz	w2, .L1035
 	udiv	w0, w0, w2
 	str	w0, [x1, 532]
-.L983:
+.L1035:
 	ret
-.L989:
+.L1041:
 	ldrh	w3, [x6, x1, lsl 1]
 	cmp	w3, w8
-	beq	.L987
+	beq	.L1039
 	add	x4, x7, x1, lsl 2
 	ldrb	w4, [x4, 2]
 	and	w4, w4, 224
 	cmp	w4, 160
-	bne	.L988
+	bne	.L1040
 	add	w0, w0, w3
-.L987:
+.L1039:
 	add	x1, x1, 1
-	b	.L986
-.L988:
+	b	.L1038
+.L1040:
 	add	w2, w2, w3
-	b	.L987
+	b	.L1039
 	.size	ftl_total_vpn_update, .-ftl_total_vpn_update
-	.section	.text.ftl_debug_info_fill,"ax",@progbits
-	.align	2
-	.global	ftl_debug_info_fill
-	.type	ftl_debug_info_fill, %function
-ftl_debug_info_fill:
-	mov	w0, 0
-	ret
-	.size	ftl_debug_info_fill, .-ftl_debug_info_fill
 	.section	.text.ftl_vpn_update,"ax",@progbits
 	.align	2
 	.global	ftl_vpn_update
@@ -5864,17 +6191,17 @@ ftl_vpn_update:
 	ubfiz	x19, x19, 1, 16
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, x19]
-	cbnz	w0, .L997
-	adrp	x1, .LANCHOR116
+	cbnz	w0, .L1048
+	adrp	x1, .LANCHOR122
 	mov	w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR116]
-.L995:
+	str	w0, [x1, #:lo12:.LANCHOR122]
+.L1046:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L997:
+.L1048:
 	mov	w0, 0
-	b	.L995
+	b	.L1046
 	.size	ftl_vpn_update, .-ftl_vpn_update
 	.section	.text.ftl_vpn_decrement,"ax",@progbits
 	.align	2
@@ -5887,57 +6214,57 @@ ftl_vpn_decrement:
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1000
+	beq	.L1051
 	adrp	x0, .LANCHOR9
 	uxtw	x1, w19
 	lsl	x2, x1, 1
 	ldr	x3, [x0, #:lo12:.LANCHOR9]
 	ldrh	w0, [x3, x2]
-	cbnz	w0, .L1001
+	cbnz	w0, .L1052
 	adrp	x0, .LANCHOR7
 	mov	w2, 0
 	ldr	x0, [x0, #:lo12:.LANCHOR7]
 	add	x1, x0, x1, lsl 2
-	adrp	x0, .LC59
-	add	x0, x0, :lo12:.LC59
+	adrp	x0, .LC65
+	add	x0, x0, :lo12:.LC65
 	ldrb	w3, [x1, 2]
 	mov	w1, w19
 	ubfx	x3, x3, 5, 3
 	bl	printf
-.L1006:
+.L1057:
 	mov	w0, 0
-	b	.L999
-.L1001:
+	b	.L1050
+.L1052:
 	sub	w0, w0, #1
 	strh	w0, [x3, x2]
-.L1000:
-	adrp	x20, .LANCHOR66
-	ldrh	w0, [x20, #:lo12:.LANCHOR66]
+.L1051:
+	adrp	x20, .LANCHOR73
+	ldrh	w0, [x20, #:lo12:.LANCHOR73]
 	cmp	w19, w0
-	beq	.L1006
+	beq	.L1057
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L1003
-	strh	w19, [x20, #:lo12:.LANCHOR66]
-	b	.L1006
-.L1003:
+	bne	.L1054
+	strh	w19, [x20, #:lo12:.LANCHOR73]
+	b	.L1057
+.L1054:
 	bl	ftl_vpn_update
 	cmp	w0, 0
-	adrp	x1, .LANCHOR117
+	adrp	x1, .LANCHOR123
 	cset	w0, ne
-	ldrh	w3, [x20, #:lo12:.LANCHOR66]
-	ldrh	w2, [x1, #:lo12:.LANCHOR117]
-	strh	w19, [x20, #:lo12:.LANCHOR66]
+	ldrh	w3, [x20, #:lo12:.LANCHOR73]
+	ldrh	w2, [x1, #:lo12:.LANCHOR123]
+	strh	w19, [x20, #:lo12:.LANCHOR73]
 	add	w2, w2, 1
 	and	w2, w2, 65535
 	cmp	w2, 7
 	csel	w2, w2, wzr, ls
-	strh	w2, [x1, #:lo12:.LANCHOR117]
+	strh	w2, [x1, #:lo12:.LANCHOR123]
 	and	x2, x2, 65535
-	adrp	x1, .LANCHOR67
-	add	x1, x1, :lo12:.LANCHOR67
+	adrp	x1, .LANCHOR74
+	add	x1, x1, :lo12:.LANCHOR74
 	strh	w3, [x1, x2, lsl 1]
-.L999:
+.L1050:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -5947,52 +6274,52 @@ ftl_vpn_decrement:
 	.global	lpa_hash_update_ppa
 	.type	lpa_hash_update_ppa, %function
 lpa_hash_update_ppa:
-	adrp	x3, .LANCHOR110
+	adrp	x3, .LANCHOR116
 	and	x5, x0, 255
-	add	x4, x3, :lo12:.LANCHOR110
+	add	x4, x3, :lo12:.LANCHOR116
 	mov	w7, 65535
 	and	w2, w2, 65535
 	mov	w12, w7
 	ldrh	w6, [x4, x5, lsl 1]
-	adrp	x4, .LANCHOR111
-	ldr	x8, [x4, #:lo12:.LANCHOR111]
-	adrp	x4, .LANCHOR112
-	ldr	x4, [x4, #:lo12:.LANCHOR112]
-.L1009:
+	adrp	x4, .LANCHOR117
+	ldr	x8, [x4, #:lo12:.LANCHOR117]
+	adrp	x4, .LANCHOR118
+	ldr	x4, [x4, #:lo12:.LANCHOR118]
+.L1060:
 	cmp	w6, w12
-	beq	.L1013
+	beq	.L1064
 	uxtw	x11, w6
 	lsl	x10, x11, 2
 	add	x13, x8, x10
 	ldr	w10, [x8, x10]
 	cmp	w0, w10
 	lsl	x10, x11, 1
-	bne	.L1010
+	bne	.L1061
 	mov	w6, -1
 	str	w6, [x13]
 	cmp	w7, w12
-	bne	.L1011
-	add	x6, x3, :lo12:.LANCHOR110
+	bne	.L1062
+	add	x6, x3, :lo12:.LANCHOR116
 	ldrh	w7, [x4, x10]
 	strh	w7, [x6, x5, lsl 1]
-.L1012:
+.L1063:
 	mov	w6, -1
 	strh	w6, [x4, x11, lsl 1]
-.L1013:
+.L1064:
 	uxtw	x6, w2
-	add	x3, x3, :lo12:.LANCHOR110
+	add	x3, x3, :lo12:.LANCHOR116
 	cmn	w1, #1
 	str	w0, [x8, x6, lsl 2]
 	ldrh	w0, [x3, x5, lsl 1]
 	strh	w2, [x3, x5, lsl 1]
 	strh	w0, [x4, x6, lsl 1]
-	beq	.L1020
+	beq	.L1071
 	stp	x29, x30, [sp, -16]!
-	adrp	x0, .LANCHOR68
+	adrp	x0, .LANCHOR75
 	add	x29, sp, 0
-	ldrh	w3, [x0, #:lo12:.LANCHOR68]
-	adrp	x0, .LANCHOR31
-	ldrb	w2, [x0, #:lo12:.LANCHOR31]
+	ldrh	w3, [x0, #:lo12:.LANCHOR75]
+	adrp	x0, .LANCHOR32
+	ldrb	w2, [x0, #:lo12:.LANCHOR32]
 	mov	w0, 24
 	lsr	w1, w1, w3
 	sub	w0, w0, w2
@@ -6001,22 +6328,22 @@ lpa_hash_update_ppa:
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
 	and	w1, w0, w1
-	adrp	x0, .LANCHOR69
-	ldrb	w0, [x0, #:lo12:.LANCHOR69]
+	adrp	x0, .LANCHOR76
+	ldrb	w0, [x0, #:lo12:.LANCHOR76]
 	udiv	w0, w1, w0
 	bl	ftl_vpn_decrement
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
-.L1011:
+.L1062:
 	ldrh	w6, [x4, x10]
 	strh	w6, [x4, w7, uxtw 1]
-	b	.L1012
-.L1010:
+	b	.L1063
+.L1061:
 	mov	w7, w6
 	ldrh	w6, [x4, x10]
-	b	.L1009
-.L1020:
+	b	.L1060
+.L1071:
 	mov	w0, -1
 	ret
 	.size	lpa_hash_update_ppa, .-lpa_hash_update_ppa
@@ -6026,25 +6353,25 @@ lpa_hash_update_ppa:
 	.type	ftl_mask_bad_block, %function
 ftl_mask_bad_block:
 	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LANCHOR31
+	adrp	x1, .LANCHOR32
 	mov	w6, 24
 	mov	w4, 1
 	add	x29, sp, 0
-	ldrb	w1, [x1, #:lo12:.LANCHOR31]
+	ldrb	w1, [x1, #:lo12:.LANCHOR32]
 	stp	x19, x20, [sp, 16]
 	sub	w6, w6, w1
 	lsl	w1, w4, w1
 	sub	w1, w1, #1
 	lsr	w2, w0, w6
 	and	w1, w1, w2
-	adrp	x2, .LANCHOR69
+	adrp	x2, .LANCHOR76
 	and	w1, w1, 255
-	ldrb	w5, [x2, #:lo12:.LANCHOR69]
+	ldrb	w5, [x2, #:lo12:.LANCHOR76]
 	cmp	w5, 1
 	mul	w2, w1, w5
 	and	w19, w2, 255
-	adrp	x2, .LANCHOR68
-	ldrh	w3, [x2, #:lo12:.LANCHOR68]
+	adrp	x2, .LANCHOR75
+	ldrh	w3, [x2, #:lo12:.LANCHOR75]
 	lsr	w0, w0, w3
 	sub	w3, w6, w3
 	lsl	w3, w4, w3
@@ -6053,25 +6380,25 @@ ftl_mask_bad_block:
 	and	w4, w3, 65535
 	udiv	w3, w3, w5
 	and	w20, w3, 65535
-	bls	.L1024
+	bls	.L1075
 	sub	w2, w5, #1
 	and	w2, w2, w4
 	add	w2, w19, w2
 	and	w19, w2, 255
-.L1024:
+.L1075:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 14, .L1025
-	adrp	x0, .LC60
+	tbz	x0, 14, .L1076
+	adrp	x0, .LC66
 	and	w3, w3, 65535
 	mov	w2, w19
-	add	x0, x0, :lo12:.LC60
+	add	x0, x0, :lo12:.LC66
 	bl	printf
-.L1025:
+.L1076:
 	adrp	x0, .LANCHOR6
 	ldrh	w0, [x0, #:lo12:.LANCHOR6]
 	cmp	w0, w20
-	bls	.L1023
+	bls	.L1074
 	adrp	x0, .LANCHOR7
 	mov	w2, 1
 	lsl	w2, w2, w19
@@ -6080,7 +6407,7 @@ ftl_mask_bad_block:
 	ldrb	w19, [x20, 3]
 	orr	w2, w2, w19
 	strb	w2, [x20, 3]
-.L1023:
+.L1074:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -6095,24 +6422,24 @@ gc_free_bad_sblk:
 	stp	x23, x24, [sp, 48]
 	and	w23, w0, 65535
 	str	x27, [sp, 80]
-	adrp	x27, .LANCHOR64
-	add	x0, x27, :lo12:.LANCHOR64
+	adrp	x27, .LANCHOR71
+	add	x0, x27, :lo12:.LANCHOR71
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
-	ldr	w0, [x0, 584]
-	cbz	w0, .L1045
-	adrp	x22, .LC61
+	ldr	w0, [x0, 2120]
+	cbz	w0, .L1097
+	adrp	x22, .LC67
 	mov	w24, 20041
-	add	x22, x22, :lo12:.LC61
+	add	x22, x22, :lo12:.LC67
 	mov	w26, 0
 	movk	w24, 0x444b, lsl 16
-.L1033:
+.L1084:
 	adrp	x0, .LANCHOR80
 	ldrb	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w0, w26
-	bhi	.L1042
-.L1045:
+	bhi	.L1094
+.L1097:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -6121,80 +6448,84 @@ gc_free_bad_sblk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1042:
-	adrp	x0, .LANCHOR69
-	adrp	x1, .LANCHOR31
-	adrp	x21, .LANCHOR68
-	ldrb	w2, [x0, #:lo12:.LANCHOR69]
-	ldrb	w3, [x1, #:lo12:.LANCHOR31]
+.L1094:
+	adrp	x0, .LANCHOR76
+	adrp	x1, .LANCHOR32
+	adrp	x21, .LANCHOR75
+	ldrb	w2, [x0, #:lo12:.LANCHOR76]
+	ldrb	w3, [x1, #:lo12:.LANCHOR32]
 	mov	w1, 24
 	and	w0, w2, 65535
 	cmp	w2, 1
 	sub	w1, w1, w3
-	ldrh	w3, [x21, #:lo12:.LANCHOR68]
+	ldrh	w3, [x21, #:lo12:.LANCHOR75]
 	sdiv	w19, w26, w2
 	sub	w1, w1, w3
 	lsl	w19, w19, w1
 	madd	w19, w23, w0, w19
 	and	w19, w19, 65535
-	bls	.L1034
+	bls	.L1085
 	sub	w0, w0, #1
 	and	w0, w0, w26
 	add	w19, w19, w0
 	and	w19, w19, 65535
-.L1034:
-	adrp	x25, .LANCHOR118
-	add	x25, x25, :lo12:.LANCHOR118
+.L1085:
+	adrp	x25, .LANCHOR124
+	add	x25, x25, :lo12:.LANCHOR124
 	mov	w20, 0
-.L1035:
-	add	x0, x27, :lo12:.LANCHOR64
-	ldr	w1, [x0, 584]
+.L1086:
+	add	x0, x27, :lo12:.LANCHOR71
+	ldr	w1, [x0, 2120]
 	cmp	w20, w1
-	bcc	.L1041
+	bcc	.L1093
 	add	w26, w26, 1
 	and	w26, w26, 65535
-	b	.L1033
-.L1041:
+	b	.L1084
+.L1093:
 	add	x0, x0, x20, sxtw 1
-	ldrh	w0, [x0, 588]
+	ldrh	w0, [x0, 2124]
 	cmp	w0, w19
-	bne	.L1036
+	bne	.L1087
 	mov	w1, w19
 	mov	x0, x22
 	bl	printf
 	ldrb	w0, [x25]
-	cbz	w0, .L1037
-	adrp	x0, .LANCHOR104
-	ldr	x0, [x0, #:lo12:.LANCHOR104]
+	cbnz	w0, .L1088
+	adrp	x0, .LANCHOR81
+	ldrb	w0, [x0, #:lo12:.LANCHOR81]
+	cbz	w0, .L1089
+.L1088:
+	adrp	x0, .LANCHOR110
+	ldr	x0, [x0, #:lo12:.LANCHOR110]
 	ldr	w0, [x0, 156]
 	cmp	w0, w24
-	beq	.L1038
-.L1037:
-	ldrh	w0, [x21, #:lo12:.LANCHOR68]
+	beq	.L1090
+.L1089:
+	ldrh	w0, [x21, #:lo12:.LANCHOR75]
 	lsl	w0, w19, w0
 	bl	ftl_mask_bad_block
-.L1038:
-	add	x1, x27, :lo12:.LANCHOR64
+.L1090:
+	add	x1, x27, :lo12:.LANCHOR71
 	mov	w0, w20
-	ldr	w2, [x1, 584]
-.L1039:
+	ldr	w2, [x1, 2120]
+.L1091:
 	cmp	w0, w2
-	bcc	.L1040
-	add	x0, x27, :lo12:.LANCHOR64
+	bcc	.L1092
+	add	x0, x27, :lo12:.LANCHOR71
 	sub	w2, w2, #1
-	str	w2, [x0, 584]
-.L1036:
+	str	w2, [x0, 2120]
+.L1087:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L1035
-.L1040:
+	b	.L1086
+.L1092:
 	add	w3, w0, 1
 	add	x0, x1, x0, sxtw 1
 	add	x4, x1, x3, sxtw 1
-	ldrh	w4, [x4, 588]
-	strh	w4, [x0, 588]
+	ldrh	w4, [x4, 2124]
+	strh	w4, [x0, 2124]
 	and	w0, w3, 65535
-	b	.L1039
+	b	.L1091
 	.size	gc_free_bad_sblk, .-gc_free_bad_sblk
 	.section	.text.ftl_free_sblk,"ax",@progbits
 	.align	2
@@ -6207,81 +6538,81 @@ ftl_free_sblk:
 	adrp	x23, .LANCHOR7
 	and	x24, x0, 65535
 	stp	x19, x20, [sp, 16]
-	ldr	x4, [x23, #:lo12:.LANCHOR7]
+	ldr	x3, [x23, #:lo12:.LANCHOR7]
 	lsl	x19, x24, 2
 	stp	x21, x22, [sp, 32]
 	mov	x21, x24
-	add	x20, x4, x19
+	add	x20, x3, x19
 	ldrb	w0, [x20, 2]
 	ubfx	x22, x0, 5, 3
-	tbz	x0, 3, .L1053
-	adrp	x1, .LANCHOR104
-	ldrh	w2, [x4, x19]
-	adrp	x8, .LANCHOR119
-	ldr	x7, [x1, #:lo12:.LANCHOR104]
-	and	w5, w2, 2047
-	ldr	w2, [x4, x19]
-	ldrh	w8, [x8, #:lo12:.LANCHOR119]
-	ldrh	w3, [x7, 74]
-	ubfx	x1, x2, 11, 8
+	tbz	x0, 3, .L1104
+	adrp	x2, .LANCHOR110
+	ldrh	w1, [x3, x19]
+	adrp	x8, .LANCHOR125
+	ldr	x7, [x2, #:lo12:.LANCHOR110]
+	and	w1, w1, 2047
+	ldr	w2, [x3, x19]
+	ldrh	w8, [x8, #:lo12:.LANCHOR125]
+	ldrh	w4, [x7, 74]
+	ubfx	x5, x2, 11, 8
 	adrp	x2, .LANCHOR8
-	add	w3, w5, w3
+	add	w4, w1, w4
 	ldrh	w2, [x2, #:lo12:.LANCHOR8]
-	and	w6, w3, 65535
-	ldrh	w3, [x7, 72]
-	add	w3, w1, w3
+	and	w6, w4, 65535
+	ldrh	w4, [x7, 72]
+	add	w4, w5, w4
 	udiv	w7, w6, w2
-	and	w3, w3, 65535
-	add	w7, w7, w3
+	and	w4, w4, 65535
+	add	w7, w7, w4
 	cmp	w7, w8
-	ble	.L1054
-	adrp	x3, .LANCHOR95
-	adrp	x7, .LANCHOR99
-	ldrh	w6, [x3, #:lo12:.LANCHOR95]
-	adrp	x3, .LANCHOR94
-	ldrh	w7, [x7, #:lo12:.LANCHOR99]
-	ldrh	w3, [x3, #:lo12:.LANCHOR94]
+	ble	.L1105
+	adrp	x4, .LANCHOR101
+	adrp	x7, .LANCHOR105
+	ldrh	w6, [x4, #:lo12:.LANCHOR101]
+	adrp	x4, .LANCHOR93
+	ldrh	w7, [x7, #:lo12:.LANCHOR105]
+	ldrh	w4, [x4, #:lo12:.LANCHOR93]
 	add	w6, w6, 7
-	add	w3, w3, w7
-	cmp	w6, w3
-	blt	.L1055
-.L1060:
-	mov	w3, 2
-	bfi	w0, w3, 3, 2
-	b	.L1069
-.L1055:
-	adrp	x3, .LANCHOR120
-	adrp	x7, .LANCHOR97
-	ldrh	w6, [x3, #:lo12:.LANCHOR120]
-	adrp	x3, .LANCHOR92
-	ldrh	w7, [x7, #:lo12:.LANCHOR97]
-	ldrh	w3, [x3, #:lo12:.LANCHOR92]
+	add	w4, w4, w7
+	cmp	w6, w4
+	blt	.L1106
+.L1111:
+	mov	w4, 2
+	bfi	w0, w4, 3, 2
+	b	.L1122
+.L1106:
+	adrp	x4, .LANCHOR98
+	adrp	x7, .LANCHOR103
+	ldrh	w6, [x4, #:lo12:.LANCHOR98]
+	adrp	x4, .LANCHOR97
+	ldrh	w7, [x7, #:lo12:.LANCHOR103]
+	ldrh	w4, [x4, #:lo12:.LANCHOR97]
 	add	w6, w6, 7
-	add	w3, w3, w7
-	adrp	x7, .LANCHOR90
-	ldrh	w7, [x7, #:lo12:.LANCHOR90]
-	add	w3, w3, w7
-	cmp	w6, w3
-	blt	.L1060
-.L1070:
+	add	w4, w4, w7
+	adrp	x7, .LANCHOR99
+	ldrh	w7, [x7, #:lo12:.LANCHOR99]
+	add	w4, w4, w7
+	cmp	w6, w4
+	blt	.L1111
+.L1124:
 	and	w0, w0, -25
-.L1069:
+.L1122:
 	strb	w0, [x20, 2]
-.L1056:
+.L1107:
 	ldrb	w0, [x20, 2]
 	ands	w0, w0, 24
-	bne	.L1061
-	mul	w0, w1, w2
-	ldrh	w2, [x4, x19]
-	add	w0, w0, w0, lsl 1
-	add	w0, w5, w0, lsr 2
-	bfi	w2, w0, 0, 11
-	strh	w2, [x4, x19]
-	lsr	w2, w1, 3
-	ldr	w0, [x4, x19]
+	bne	.L1112
+	mul	w2, w5, w2
+	ldrh	w0, [x3, x19]
+	add	w2, w2, w2, lsl 1
+	add	w1, w1, w2, lsr 2
+	lsr	w2, w5, 3
+	bfi	w0, w1, 0, 11
+	strh	w0, [x3, x19]
+	ldr	w0, [x3, x19]
 	bfi	w0, w2, 11, 8
-	str	w0, [x4, x19]
-.L1053:
+	str	w0, [x3, x19]
+.L1113:
 	mov	w0, w21
 	bl	zftl_remove_data_node
 	ldr	x0, [x23, #:lo12:.LANCHOR7]
@@ -6295,79 +6626,124 @@ ftl_free_sblk:
 	adrp	x0, .LANCHOR9
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x24, lsl 1]
-	bhi	.L1063
+	bhi	.L1116
 	mov	w0, w21
 	bl	gc_free_bad_sblk
-.L1063:
+.L1116:
 	ldrb	w0, [x20, 2]
-	tbz	x0, 3, .L1064
+	tbz	x0, 3, .L1117
 	adrp	x0, .LANCHOR10
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldrh	w1, [x0, 586]
 	cmp	w1, w21
-	bne	.L1064
+	bne	.L1117
 	mov	w1, -1
 	ldrh	w2, [x0, 590]
 	strh	w1, [x0, 586]
 	mov	w1, 65535
 	cmp	w2, w1
-	bne	.L1064
+	bne	.L1117
 	strh	w21, [x0, 590]
 	mov	w1, w21
 	ldp	x19, x20, [sp, 16]
-	adrp	x0, .LC62
+	adrp	x0, .LC68
 	ldp	x21, x22, [sp, 32]
-	add	x0, x0, :lo12:.LC62
+	add	x0, x0, :lo12:.LC68
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	b	printf
-.L1054:
-	madd	w3, w2, w3, w6
-	adrp	x6, .LANCHOR121
-	ldrh	w6, [x6, #:lo12:.LANCHOR121]
-	cmp	w3, w6
-	ble	.L1056
-	adrp	x3, .LANCHOR120
-	adrp	x7, .LANCHOR97
-	ldrh	w6, [x3, #:lo12:.LANCHOR120]
-	adrp	x3, .LANCHOR92
-	ldrh	w7, [x7, #:lo12:.LANCHOR97]
-	ldrh	w3, [x3, #:lo12:.LANCHOR92]
-	add	w3, w3, w7
-	adrp	x7, .LANCHOR90
-	ldrh	w7, [x7, #:lo12:.LANCHOR90]
-	add	w3, w3, w7
+.L1105:
+	madd	w4, w2, w4, w6
+	adrp	x6, .LANCHOR126
+	ldrh	w6, [x6, #:lo12:.LANCHOR126]
+	cmp	w4, w6
+	ble	.L1107
+	adrp	x4, .LANCHOR98
+	adrp	x7, .LANCHOR103
+	ldrh	w6, [x4, #:lo12:.LANCHOR98]
+	adrp	x4, .LANCHOR97
+	ldrh	w7, [x7, #:lo12:.LANCHOR103]
+	ldrh	w4, [x4, #:lo12:.LANCHOR97]
+	add	w4, w4, w7
+	adrp	x7, .LANCHOR99
+	ldrh	w7, [x7, #:lo12:.LANCHOR99]
+	add	w4, w4, w7
 	add	w7, w6, 7
-	cmp	w7, w3
-	bge	.L1070
-	adrp	x7, .LANCHOR95
-	adrp	x10, .LANCHOR99
-	ldrh	w8, [x7, #:lo12:.LANCHOR95]
-	adrp	x7, .LANCHOR94
-	ldrh	w10, [x10, #:lo12:.LANCHOR99]
-	ldrh	w7, [x7, #:lo12:.LANCHOR94]
+	cmp	w7, w4
+	bge	.L1124
+	adrp	x7, .LANCHOR101
+	adrp	x10, .LANCHOR105
+	ldrh	w8, [x7, #:lo12:.LANCHOR101]
+	adrp	x7, .LANCHOR93
+	ldrh	w10, [x10, #:lo12:.LANCHOR105]
+	ldrh	w7, [x7, #:lo12:.LANCHOR93]
 	add	w8, w8, 7
 	add	w7, w7, w10
 	cmp	w8, w7
-	bge	.L1060
+	bge	.L1111
 	add	w6, w6, 23
-	cmp	w3, w6
-	bgt	.L1060
-	b	.L1070
-.L1061:
+	cmp	w4, w6
+	bgt	.L1111
+	b	.L1124
+.L1112:
 	cmp	w0, 16
-	bne	.L1053
-	sdiv	w2, w5, w2
-	ldr	w0, [x4, x19]
+	bne	.L1113
+	sdiv	w2, w1, w2
+	ldr	w0, [x3, x19]
 	add	w2, w2, w2, lsl 1
-	add	w2, w1, w2, lsr 2
+	add	w2, w5, w2, lsr 2
+.L1123:
 	bfi	w0, w2, 11, 8
-	asr	w2, w5, 5
-	str	w0, [x4, x19]
-	bfi	w0, w2, 0, 11
-	strh	w0, [x4, x19]
-	b	.L1053
-.L1064:
+	asr	w1, w1, 5
+	str	w0, [x3, x19]
+	bfi	w0, w1, 0, 11
+	strh	w0, [x3, x19]
+	b	.L1113
+.L1104:
+	tst	w0, 24
+	bne	.L1113
+	adrp	x1, .LANCHOR107
+	ldrh	w1, [x1, #:lo12:.LANCHOR107]
+	cbnz	w1, .L1113
+	adrp	x1, .LANCHOR105
+	ldrh	w4, [x1, #:lo12:.LANCHOR105]
+	cmp	w4, 15
+	bhi	.L1113
+	adrp	x1, .LANCHOR97
+	adrp	x2, .LANCHOR103
+	ldrh	w1, [x1, #:lo12:.LANCHOR97]
+	ldrh	w2, [x2, #:lo12:.LANCHOR103]
+	add	w1, w1, w2
+	adrp	x2, .LANCHOR99
+	ldrh	w2, [x2, #:lo12:.LANCHOR99]
+	add	w1, w1, w2
+	adrp	x2, .LANCHOR98
+	ldrh	w2, [x2, #:lo12:.LANCHOR98]
+	add	w2, w2, 16
+	cmp	w1, w2
+	ble	.L1113
+	adrp	x1, .LANCHOR101
+	ldrh	w2, [x1, #:lo12:.LANCHOR101]
+	adrp	x1, .LANCHOR93
+	ldrh	w1, [x1, #:lo12:.LANCHOR93]
+	add	w2, w2, 7
+	add	w1, w1, w4
+	cmp	w2, w1
+	blt	.L1113
+	mov	w1, 2
+	bfi	w0, w1, 3, 2
+	strb	w0, [x20, 2]
+	adrp	x0, .LANCHOR8
+	ldrh	w1, [x3, x19]
+	ldrh	w0, [x0, #:lo12:.LANCHOR8]
+	and	w1, w1, 2047
+	sdiv	w0, w1, w0
+	add	w2, w0, w0, lsl 1
+	ldr	w0, [x3, x19]
+	ubfx	x4, x0, 11, 8
+	add	w2, w4, w2, lsr 2
+	b	.L1123
+.L1117:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6383,20 +6759,20 @@ gc_free_src_blk:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR64
+	adrp	x21, .LANCHOR71
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LC63
+	adrp	x22, .LC69
 	adrp	x23, .LANCHOR9
-	add	x21, x21, :lo12:.LANCHOR64
+	add	x21, x21, :lo12:.LANCHOR71
 	mov	x24, x23
-	add	x22, x22, :lo12:.LC63
+	add	x22, x22, :lo12:.LC69
 	stp	x19, x20, [sp, 16]
 	mov	w20, 0
 	stp	x25, x26, [sp, 64]
-.L1072:
+.L1126:
 	ldrh	w0, [x21, 56]
 	cmp	w0, w20
-	bhi	.L1086
+	bhi	.L1140
 	strh	wzr, [x21, 56]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6404,18 +6780,18 @@ gc_free_src_blk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1086:
+.L1140:
 	add	x0, x21, x20, sxtw 1
 	ldrh	w25, [x0, 58]
 	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	mov	x19, x25
 	lsl	x26, x25, 1
 	ldrh	w2, [x0, x26]
-	cbz	w2, .L1073
+	cbz	w2, .L1127
 	mov	w1, w25
 	mov	x0, x22
 	bl	printf
-.L1073:
+.L1127:
 	ldr	x0, [x24, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x26]
 	adrp	x0, .LANCHOR7
@@ -6423,95 +6799,95 @@ gc_free_src_blk:
 	add	x25, x0, x25, lsl 2
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L1074
+	tbz	x0, 8, .L1128
 	ldrb	w2, [x25, 2]
-	adrp	x0, .LC64
+	adrp	x0, .LC70
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC64
+	add	x0, x0, :lo12:.LC70
 	ubfx	x2, x2, 5, 3
 	bl	printf
-.L1074:
+.L1128:
 	ldrb	w0, [x25, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L1075
+	beq	.L1129
 	tst	w0, 192
-	bne	.L1076
-.L1075:
-	adrp	x1, .LANCHOR122
+	bne	.L1130
+.L1129:
+	adrp	x1, .LANCHOR127
 	adrp	x0, .LC0
-	mov	w2, 1119
-	add	x1, x1, :lo12:.LANCHOR122
+	mov	w2, 1362
+	add	x1, x1, :lo12:.LANCHOR127
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1076:
+.L1130:
 	mov	w0, w19
 	bl	ftl_free_sblk
 	adrp	x0, .LANCHOR10
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldrh	w2, [x0, 124]
-	cbz	w2, .L1077
+	cbz	w2, .L1131
 	add	x3, x0, 392
 	mov	w1, 0
-.L1079:
+.L1133:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L1078
+	bne	.L1132
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 392]
 	strh	w2, [x0, 124]
-.L1077:
+.L1131:
 	ldrh	w2, [x0, 120]
-	cbz	w2, .L1080
+	cbz	w2, .L1134
 	add	x3, x0, 136
 	mov	w1, 0
-.L1082:
+.L1136:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L1081
+	bne	.L1135
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 136]
 	strh	w2, [x0, 120]
-.L1080:
+.L1134:
 	ldrh	w2, [x0, 122]
-	cbz	w2, .L1083
+	cbz	w2, .L1137
 	add	x3, x0, 264
 	mov	w1, 0
-.L1085:
+.L1139:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L1084
+	bne	.L1138
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 264]
 	strh	w2, [x0, 122]
-.L1083:
+.L1137:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L1072
-.L1078:
+	b	.L1126
+.L1132:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L1079
-	b	.L1077
-.L1081:
+	bne	.L1133
+	b	.L1131
+.L1135:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L1082
-	b	.L1080
-.L1084:
+	bne	.L1136
+	b	.L1134
+.L1138:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L1085
-	b	.L1083
+	bne	.L1139
+	b	.L1137
 	.size	gc_free_src_blk, .-gc_free_src_blk
 	.section	.text.print_ftl_debug_info,"ax",@progbits
 	.align	2
@@ -6519,25 +6895,25 @@ gc_free_src_blk:
 	.type	print_ftl_debug_info, %function
 print_ftl_debug_info:
 	sub	sp, sp, #64
-	adrp	x2, .LANCHOR90
-	adrp	x8, .LANCHOR123
+	adrp	x2, .LANCHOR99
+	adrp	x8, .LANCHOR128
 	stp	x29, x30, [sp, 32]
 	add	x29, sp, 32
-	ldrh	w7, [x2, #:lo12:.LANCHOR90]
-	adrp	x2, .LANCHOR92
+	ldrh	w7, [x2, #:lo12:.LANCHOR99]
+	adrp	x2, .LANCHOR97
 	stp	x19, x20, [sp, 48]
-	adrp	x19, .LANCHOR104
+	adrp	x19, .LANCHOR110
 	adrp	x20, .LANCHOR10
-	ldrh	w6, [x2, #:lo12:.LANCHOR92]
-	adrp	x2, .LANCHOR101
-	ldr	x1, [x19, #:lo12:.LANCHOR104]
-	ldrh	w5, [x2, #:lo12:.LANCHOR101]
-	adrp	x2, .LANCHOR99
+	ldrh	w6, [x2, #:lo12:.LANCHOR97]
+	adrp	x2, .LANCHOR107
+	ldr	x1, [x19, #:lo12:.LANCHOR110]
+	ldrh	w5, [x2, #:lo12:.LANCHOR107]
+	adrp	x2, .LANCHOR105
 	ldr	x0, [x20, #:lo12:.LANCHOR10]
-	ldrh	w4, [x2, #:lo12:.LANCHOR99]
-	adrp	x2, .LANCHOR97
-	ldr	w8, [x8, #:lo12:.LANCHOR123]
-	ldrh	w3, [x2, #:lo12:.LANCHOR97]
+	ldrh	w4, [x2, #:lo12:.LANCHOR105]
+	adrp	x2, .LANCHOR103
+	ldr	w8, [x8, #:lo12:.LANCHOR128]
+	ldrh	w3, [x2, #:lo12:.LANCHOR103]
 	ldrh	w2, [x1, 146]
 	ldrh	w1, [x1, 148]
 	str	w8, [sp, 24]
@@ -6545,31 +6921,31 @@ print_ftl_debug_info:
 	str	w8, [sp, 16]
 	ldr	w0, [x0, 524]
 	str	w0, [sp, 8]
-	adrp	x0, .LANCHOR94
-	ldrh	w0, [x0, #:lo12:.LANCHOR94]
+	adrp	x0, .LANCHOR93
+	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	str	w0, [sp]
-	adrp	x0, .LC65
-	add	x0, x0, :lo12:.LC65
+	adrp	x0, .LC71
+	add	x0, x0, :lo12:.LC71
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR104]
-	adrp	x1, .LANCHOR124
-	ldrb	w3, [x1, #:lo12:.LANCHOR124]
+	ldr	x0, [x19, #:lo12:.LANCHOR110]
+	adrp	x1, .LANCHOR129
+	ldrb	w3, [x1, #:lo12:.LANCHOR129]
 	ldr	w4, [x0, 8]
 	ldr	w5, [x0, 64]
 	ldr	w1, [x0, 20]
 	ldr	w2, [x0, 28]
-	adrp	x0, .LC66
-	add	x0, x0, :lo12:.LC66
+	adrp	x0, .LC72
+	add	x0, x0, :lo12:.LC72
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR104]
+	ldr	x0, [x19, #:lo12:.LANCHOR110]
 	ldr	w1, [x0, 52]
 	ldr	w2, [x0, 60]
 	ldr	w3, [x0, 16]
-	adrp	x0, .LC67
-	add	x0, x0, :lo12:.LC67
+	adrp	x0, .LC73
+	add	x0, x0, :lo12:.LC73
 	lsr	w3, w3, 11
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR104]
+	ldr	x0, [x19, #:lo12:.LANCHOR110]
 	ldrh	w2, [x0, 98]
 	ldrh	w6, [x0, 72]
 	ldrh	w5, [x0, 96]
@@ -6582,24 +6958,24 @@ print_ftl_debug_info:
 	ldrh	w2, [x0, 90]
 	str	w2, [sp]
 	ldp	w7, w2, [x0, 80]
-	adrp	x0, .LC68
-	add	x0, x0, :lo12:.LC68
+	adrp	x0, .LC74
+	add	x0, x0, :lo12:.LC74
 	bl	printf
-	adrp	x0, .LANCHOR81
-	ldrh	w5, [x0, #:lo12:.LANCHOR81]
-	adrp	x0, .LANCHOR86
-	ldrh	w4, [x0, #:lo12:.LANCHOR86]
-	adrp	x0, .LANCHOR63
-	ldrh	w3, [x0, #:lo12:.LANCHOR63]
-	adrp	x0, .LANCHOR96
-	ldrh	w2, [x0, #:lo12:.LANCHOR96]
-	adrp	x0, .LANCHOR93
-	ldrh	w1, [x0, #:lo12:.LANCHOR93]
-	adrp	x0, .LC69
-	add	x0, x0, :lo12:.LC69
+	adrp	x0, .LANCHOR87
+	ldrh	w5, [x0, #:lo12:.LANCHOR87]
+	adrp	x0, .LANCHOR94
+	ldrh	w4, [x0, #:lo12:.LANCHOR94]
+	adrp	x0, .LANCHOR70
+	ldrh	w3, [x0, #:lo12:.LANCHOR70]
+	adrp	x0, .LANCHOR102
+	ldrh	w2, [x0, #:lo12:.LANCHOR102]
+	adrp	x0, .LANCHOR100
+	ldrh	w1, [x0, #:lo12:.LANCHOR100]
+	adrp	x0, .LC75
+	add	x0, x0, :lo12:.LC75
 	bl	printf
 	ldr	x0, [x20, #:lo12:.LANCHOR10]
-	ldr	x1, [x19, #:lo12:.LANCHOR104]
+	ldr	x1, [x19, #:lo12:.LANCHOR110]
 	ldp	x29, x30, [sp, 32]
 	ldrh	w4, [x0, 590]
 	ldrh	w6, [x1, 150]
@@ -6609,8 +6985,8 @@ print_ftl_debug_info:
 	add	sp, sp, 64
 	ldr	w5, [x1, 156]
 	ldrh	w1, [x0, 584]
-	adrp	x0, .LC70
-	add	x0, x0, :lo12:.LC70
+	adrp	x0, .LC76
+	add	x0, x0, :lo12:.LC76
 	b	printf
 	.size	print_ftl_debug_info, .-print_ftl_debug_info
 	.section	.text.ftl_write_buf,"ax",@progbits
@@ -6622,65 +6998,65 @@ ftl_write_buf:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	str	x21, [sp, 32]
-	cbnz	x0, .L1112
-	adrp	x1, .LANCHOR125
-	add	x1, x1, :lo12:.LANCHOR125
-	mov	w2, 676
+	cbnz	x0, .L1166
+	adrp	x1, .LANCHOR130
+	add	x1, x1, :lo12:.LANCHOR130
+	mov	w2, 803
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	bl	print_ftl_debug_info
 	mov	w0, -1
-.L1111:
+.L1165:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1115:
+.L1169:
 	mov	x1, x19
-	adrp	x0, .LANCHOR59
-	add	x0, x0, :lo12:.LANCHOR59
+	adrp	x0, .LANCHOR66
+	add	x0, x0, :lo12:.LANCHOR66
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR104
+	adrp	x1, .LANCHOR110
 	ldrb	w3, [x19, 56]
-	ldrb	w0, [x21, #:lo12:.LANCHOR60]
-	ldr	x1, [x1, #:lo12:.LANCHOR104]
+	ldrb	w0, [x21, #:lo12:.LANCHOR67]
+	ldr	x1, [x1, #:lo12:.LANCHOR110]
 	add	w0, w0, 1
 	and	w0, w0, 255
-	strb	w0, [x21, #:lo12:.LANCHOR60]
+	strb	w0, [x21, #:lo12:.LANCHOR67]
 	ldr	w2, [x1, 16]
 	add	w2, w2, w3
 	str	w2, [x1, 16]
 	ldr	w2, [x1, 32]
 	add	w2, w2, 1
 	str	w2, [x1, 32]
-	b	.L1111
-.L1112:
+	b	.L1165
+.L1166:
 	mov	x19, x0
-	adrp	x0, .LANCHOR126
+	adrp	x0, .LANCHOR131
 	mov	x20, x0
-	ldrb	w1, [x0, #:lo12:.LANCHOR126]
+	ldrb	w1, [x0, #:lo12:.LANCHOR131]
 	ldrb	w2, [x19, 56]
 	cmp	w2, w1
-	bls	.L1117
-	adrp	x1, .LANCHOR125
+	bls	.L1171
+	adrp	x1, .LANCHOR130
 	adrp	x0, .LC0
-	mov	w2, 681
-	add	x1, x1, :lo12:.LANCHOR125
+	mov	w2, 810
+	add	x1, x1, :lo12:.LANCHOR130
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1117:
+.L1171:
 	ldrb	w0, [x19, 56]
-	adrp	x21, .LANCHOR60
-	cbz	w0, .L1114
-	ldrb	w1, [x20, #:lo12:.LANCHOR126]
+	adrp	x21, .LANCHOR67
+	cbz	w0, .L1168
+	ldrb	w1, [x20, #:lo12:.LANCHOR131]
 	cmp	w1, w0
-	bcs	.L1115
-.L1114:
+	bcs	.L1169
+.L1168:
 	mov	x0, x19
 	bl	zbuf_free
-	ldrb	w0, [x21, #:lo12:.LANCHOR60]
-	b	.L1111
+	ldrb	w0, [x21, #:lo12:.LANCHOR67]
+	b	.L1165
 	.size	ftl_write_buf, .-ftl_write_buf
 	.section	.text.ftl_write_completed,"ax",@progbits
 	.align	2
@@ -6690,28 +7066,28 @@ ftl_write_completed:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR52
+	adrp	x21, .LANCHOR56
 	stp	x19, x20, [sp, 16]
-	add	x22, x21, :lo12:.LANCHOR52
+	add	x22, x21, :lo12:.LANCHOR56
 	stp	x23, x24, [sp, 48]
-	adrp	x20, .LANCHOR127
+	adrp	x20, .LANCHOR65
 	mov	w23, 20041
-	add	x20, x20, :lo12:.LANCHOR127
+	add	x20, x20, :lo12:.LANCHOR65
 	str	x25, [sp, 64]
 	movk	w23, 0x444b, lsl 16
 	mov	w25, 0
-.L1123:
+.L1177:
 	ldrb	w0, [x20]
 	cmp	w0, 255
-	bne	.L1133
+	bne	.L1188
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1133:
-	add	x1, x21, :lo12:.LANCHOR52
+.L1188:
+	add	x1, x21, :lo12:.LANCHOR56
 	lsl	x2, x0, 6
 	add	x24, x1, x2
 	ubfiz	x19, x0, 6, 8
@@ -6720,32 +7096,36 @@ ftl_write_completed:
 	strb	w1, [x20]
 	ldr	w1, [x24, 52]
 	cmn	w1, #1
-	bne	.L1124
-	adrp	x1, .LANCHOR118
-	ldrb	w1, [x1, #:lo12:.LANCHOR118]
-	cbz	w1, .L1125
-	adrp	x1, .LANCHOR104
-	ldr	x1, [x1, #:lo12:.LANCHOR104]
+	bne	.L1178
+	adrp	x1, .LANCHOR124
+	ldrb	w1, [x1, #:lo12:.LANCHOR124]
+	cbnz	w1, .L1179
+	adrp	x1, .LANCHOR81
+	ldrb	w1, [x1, #:lo12:.LANCHOR81]
+	cbz	w1, .L1180
+.L1179:
+	adrp	x1, .LANCHOR110
+	ldr	x1, [x1, #:lo12:.LANCHOR110]
 	ldr	w1, [x1, 156]
 	cmp	w1, w23
-	beq	.L1126
-.L1125:
+	beq	.L1181
+.L1180:
 	add	x1, x22, x0, lsl 6
 	mov	w2, 24
 	mov	w5, 65535
 	ldr	w3, [x1, 40]
-	adrp	x1, .LANCHOR68
-	ldrh	w4, [x1, #:lo12:.LANCHOR68]
-	adrp	x1, .LANCHOR31
-	ldrb	w1, [x1, #:lo12:.LANCHOR31]
+	adrp	x1, .LANCHOR75
+	ldrh	w4, [x1, #:lo12:.LANCHOR75]
+	adrp	x1, .LANCHOR32
+	ldrb	w1, [x1, #:lo12:.LANCHOR32]
 	sub	w1, w2, w1
 	sub	w2, w1, w4
 	mov	w1, 1
 	lsr	w4, w3, w4
 	lsl	w1, w1, w2
-	adrp	x2, .LANCHOR69
+	adrp	x2, .LANCHOR76
 	sub	w1, w1, #1
-	ldrb	w2, [x2, #:lo12:.LANCHOR69]
+	ldrb	w2, [x2, #:lo12:.LANCHOR76]
 	and	w1, w1, w4
 	udiv	w1, w1, w2
 	adrp	x2, .LANCHOR10
@@ -6755,14 +7135,14 @@ ftl_write_completed:
 	and	w1, w1, w5
 	ldr	w6, [x4, 560]
 	cmp	w6, w5
-	bne	.L1127
+	bne	.L1182
 	str	w1, [x4, 560]
 	str	w3, [x4, 564]
-.L1127:
+.L1182:
 	add	x0, x22, x0, lsl 6
 	ldr	w2, [x0, 36]
-	adrp	x0, .LC71
-	add	x0, x0, :lo12:.LC71
+	adrp	x0, .LC77
+	add	x0, x0, :lo12:.LC77
 	bl	printf
 	ldr	x0, [x24, #:lo12:.LANCHOR10]
 	ldr	w1, [x0, 556]
@@ -6770,42 +7150,42 @@ ftl_write_completed:
 	str	w1, [x0, 556]
 	ldrh	w1, [x0, 16]
 	cmp	w1, w25
-	bne	.L1128
+	bne	.L1183
 	strh	wzr, [x0, 22]
-.L1126:
+.L1181:
 	mov	x0, x19
 	mov	w25, 1
 	bl	ftl_write_buf
-	b	.L1123
-.L1128:
+	b	.L1177
+.L1183:
 	ldrh	w1, [x0, 48]
 	cmp	w1, w25
-	bne	.L1126
+	bne	.L1181
 	strh	wzr, [x0, 54]
-	b	.L1126
-.L1124:
-	cbz	w25, .L1131
+	b	.L1181
+.L1178:
+	cbz	w25, .L1186
 	ldp	w1, w2, [x24, 36]
-	adrp	x0, .LC72
-	add	x0, x0, :lo12:.LC72
+	adrp	x0, .LC78
+	add	x0, x0, :lo12:.LC78
 	bl	printf
 	mov	x0, x19
 	bl	ftl_write_buf
-	b	.L1123
-.L1131:
+	b	.L1177
+.L1186:
 	ldrh	w2, [x24, 48]
 	ldr	w0, [x24, 36]
 	ldr	w1, [x24, 44]
 	bl	lpa_hash_update_ppa
 	ldrb	w0, [x24, 2]
-	tbz	x0, 2, .L1132
+	tbz	x0, 2, .L1187
 	and	w0, w0, -3
 	strb	w0, [x24, 2]
-	b	.L1123
-.L1132:
+	b	.L1177
+.L1187:
 	mov	x0, x19
 	bl	zbuf_free
-	b	.L1123
+	b	.L1177
 	.size	ftl_write_completed, .-ftl_write_completed
 	.section	.text.zftl_add_read_buf,"ax",@progbits
 	.align	2
@@ -6815,40 +7195,40 @@ zftl_add_read_buf:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	str	x19, [sp, 16]
-	cbnz	x0, .L1139
-	mov	w2, 974
-	adrp	x1, .LANCHOR128
+	cbnz	x0, .L1194
+	mov	w2, 1143
+	adrp	x1, .LANCHOR132
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR128
+	add	x1, x1, :lo12:.LANCHOR132
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	print_ftl_debug_info
-.L1139:
+.L1194:
 	ldrb	w1, [x0, 56]
 	mov	x19, x0
-	adrp	x0, .LANCHOR126
-	ldrb	w0, [x0, #:lo12:.LANCHOR126]
+	adrp	x0, .LANCHOR131
+	ldrb	w0, [x0, #:lo12:.LANCHOR131]
 	cmp	w1, w0
-	bls	.L1141
-	adrp	x1, .LANCHOR128
+	bls	.L1196
+	adrp	x1, .LANCHOR132
 	adrp	x0, .LC0
-	mov	w2, 979
-	add	x1, x1, :lo12:.LANCHOR128
+	mov	w2, 1150
+	add	x1, x1, :lo12:.LANCHOR132
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1141:
+.L1196:
 	mov	x1, x19
-	adrp	x0, .LANCHOR129
-	add	x0, x0, :lo12:.LANCHOR129
+	adrp	x0, .LANCHOR133
+	add	x0, x0, :lo12:.LANCHOR133
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR130
+	adrp	x1, .LANCHOR134
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	ldrb	w0, [x1, #:lo12:.LANCHOR130]
+	ldrb	w0, [x1, #:lo12:.LANCHOR134]
 	add	w0, w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR130]
+	strb	w0, [x1, #:lo12:.LANCHOR134]
 	ret
 	.size	zftl_add_read_buf, .-zftl_add_read_buf
 	.section	.text.ftl_alloc_sblk,"ax",@progbits
@@ -6861,83 +7241,90 @@ ftl_alloc_sblk:
 	add	x29, sp, 0
 	str	x23, [sp, 48]
 	and	w23, w0, 65535
-	stp	x19, x20, [sp, 16]
-	mov	w1, w23
 	stp	x21, x22, [sp, 32]
-	mov	w20, w0
+	mov	w1, w23
+	stp	x19, x20, [sp, 16]
 	cset	w22, eq
+	mov	w21, w0
 	mov	w0, 0
 	bl	zftl_get_free_sblk
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1146
+	beq	.L1201
 	adrp	x0, .LANCHOR7
 	lsl	w22, w22, 1
-	ldr	x21, [x0, #:lo12:.LANCHOR7]
-	add	x21, x21, x19, uxth 2
-	ldrb	w0, [x21, 2]
+	ldr	x20, [x0, #:lo12:.LANCHOR7]
+	add	x20, x20, x19, uxth 2
+	ldrb	w0, [x20, 2]
 	tst	w0, 224
-	beq	.L1147
-	adrp	x1, .LANCHOR131
+	beq	.L1202
+	adrp	x1, .LANCHOR135
 	adrp	x0, .LC0
-	mov	w2, 846
-	add	x1, x1, :lo12:.LANCHOR131
+	mov	w2, 939
+	add	x1, x1, :lo12:.LANCHOR135
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1147:
-	ldrb	w0, [x21, 2]
-	bfi	w0, w20, 5, 3
+.L1202:
+	ldrb	w0, [x20, 2]
+	bfi	w0, w21, 5, 3
 	ubfx	x1, x0, 3, 2
-	orr	w22, w22, w1
-	bfi	w0, w22, 3, 2
-	strb	w0, [x21, 2]
-.L1148:
+	orr	w1, w22, w1
+	bfi	w0, w1, 3, 2
+	strb	w0, [x20, 2]
+	and	w1, w0, 24
+	cmp	w1, 24
+	bne	.L1203
+	cbnz	w22, .L1203
+	mov	w1, 1
+	bfi	w0, w1, 3, 2
+	strb	w0, [x20, 2]
+.L1203:
 	mov	w0, w19
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1146:
+.L1201:
 	bl	print_ftl_debug_info
-	adrp	x21, .LC73
-	mov	w2, w20
-	add	x21, x21, :lo12:.LC73
+	adrp	x20, .LC79
+	mov	w2, w21
+	add	x20, x20, :lo12:.LC79
 	mov	w1, w19
-	mov	x0, x21
+	mov	x0, x20
 	bl	printf
 	mov	w1, w23
 	mov	w0, 0
 	bl	zftl_get_free_sblk
 	and	w19, w0, 65535
-	mov	w2, w20
+	mov	w2, w21
 	mov	w1, w19
-	mov	x0, x21
+	mov	x0, x20
 	bl	printf
 	bl	dump_all_list_info
-	mov	w2, 856
-	adrp	x1, .LANCHOR131
+	mov	w2, 955
+	adrp	x1, .LANCHOR135
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR131
+	add	x1, x1, :lo12:.LANCHOR135
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L1148
+	b	.L1203
 	.size	ftl_alloc_sblk, .-ftl_alloc_sblk
 	.section	.text.sblk_init,"ax",@progbits
 	.align	2
 	.global	sblk_init
 	.type	sblk_init, %function
 sblk_init:
-	adrp	x1, .LANCHOR56
+	adrp	x1, .LANCHOR60
 	mov	w0, -1
-	strb	w0, [x1, #:lo12:.LANCHOR56]
-	adrp	x1, .LANCHOR127
-	strb	w0, [x1, #:lo12:.LANCHOR127]
-	adrp	x1, .LANCHOR132
-	strb	w0, [x1, #:lo12:.LANCHOR132]
-	adrp	x1, .LANCHOR71
-	strb	w0, [x1, #:lo12:.LANCHOR71]
+	strb	w0, [x1, #:lo12:.LANCHOR60]
+	adrp	x1, .LANCHOR65
+	strb	w0, [x1, #:lo12:.LANCHOR65]
+	adrp	x1, .LANCHOR63
+	strb	w0, [x1, #:lo12:.LANCHOR63]
+	adrp	x1, .LANCHOR64
+	strb	w0, [x1, #:lo12:.LANCHOR64]
 	mov	w0, 0
 	ret
 	.size	sblk_init, .-sblk_init
@@ -6947,25 +7334,25 @@ sblk_init:
 	.type	dump_sblk_queue, %function
 dump_sblk_queue:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LC74
-	add	x0, x0, :lo12:.LC74
+	adrp	x0, .LC80
+	add	x0, x0, :lo12:.LC80
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR56
+	adrp	x19, .LANCHOR60
 	str	x21, [sp, 32]
-	ldrb	w1, [x19, #:lo12:.LANCHOR56]
+	ldrb	w1, [x19, #:lo12:.LANCHOR60]
 	bl	printf
-	ldrb	w19, [x19, #:lo12:.LANCHOR56]
+	ldrb	w19, [x19, #:lo12:.LANCHOR60]
 	cmp	w19, 255
-	beq	.L1155
-	adrp	x1, .LANCHOR52
+	beq	.L1210
+	adrp	x1, .LANCHOR56
 	ubfiz	x19, x19, 6, 8
-	add	x1, x1, :lo12:.LANCHOR52
-	adrp	x21, .LC75
+	add	x1, x1, :lo12:.LANCHOR56
+	adrp	x21, .LC81
 	add	x19, x1, x19
-	add	x21, x21, :lo12:.LC75
+	add	x21, x21, :lo12:.LC81
 	mov	x20, x1
-.L1157:
+.L1212:
 	ldrb	w2, [x19, 58]
 	mov	x0, x21
 	ldrb	w1, [x19, 1]
@@ -6973,11 +7360,11 @@ dump_sblk_queue:
 	bl	printf
 	ldrb	w19, [x19]
 	cmp	w19, 255
-	beq	.L1155
+	beq	.L1210
 	ubfiz	x19, x19, 6, 8
 	add	x19, x20, x19
-	b	.L1157
-.L1155:
+	b	.L1212
+.L1210:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -6988,90 +7375,90 @@ dump_sblk_queue:
 	.global	queue_lun_state
 	.type	queue_lun_state, %function
 queue_lun_state:
-	adrp	x2, .LANCHOR56
-	ldrb	w2, [x2, #:lo12:.LANCHOR56]
+	adrp	x2, .LANCHOR60
+	ldrb	w2, [x2, #:lo12:.LANCHOR60]
 	cmp	w2, 255
-	beq	.L1173
-	adrp	x3, .LANCHOR31
+	beq	.L1228
+	adrp	x3, .LANCHOR32
 	mov	w8, 24
-	adrp	x10, .LANCHOR52
-	add	x10, x10, :lo12:.LANCHOR52
-	ldrb	w4, [x3, #:lo12:.LANCHOR31]
+	adrp	x10, .LANCHOR56
+	add	x10, x10, :lo12:.LANCHOR56
+	ldrb	w4, [x3, #:lo12:.LANCHOR32]
 	mov	w3, 1
-	adrp	x13, .L1169
+	adrp	x13, .L1224
 	mov	x15, x10
 	sub	w8, w8, w4
-	add	x13, x13, :lo12:.L1169
+	add	x13, x13, :lo12:.L1224
 	lsl	w4, w3, w4
 	sub	w4, w4, #1
 	and	w6, w4, 65535
-	adrp	x4, .LANCHOR68
+	adrp	x4, .LANCHOR75
 	asr	w11, w0, w8
 	and	w11, w11, w6
-	ldrh	w12, [x4, #:lo12:.LANCHOR68]
+	ldrh	w12, [x4, #:lo12:.LANCHOR75]
 	sub	w4, w8, w12
 	lsl	w3, w3, w4
 	sub	w3, w3, #1
 	and	w7, w3, 65535
-	adrp	x3, .LANCHOR69
-	ldrb	w5, [x3, #:lo12:.LANCHOR69]
+	adrp	x3, .LANCHOR76
+	ldrb	w5, [x3, #:lo12:.LANCHOR76]
 	asr	w3, w0, w12
 	sub	w5, w5, #1
 	and	w5, w5, 65535
 	and	w3, w3, w5
 	and	w3, w3, w7
-.L1172:
+.L1227:
 	add	x14, x10, x2, lsl 6
 	ldr	w4, [x14, 40]
 	lsr	w0, w4, w8
 	and	w0, w6, w0
 	cmp	w11, w0
-	bne	.L1167
+	bne	.L1222
 	lsr	w4, w4, w12
 	and	w4, w5, w4
 	and	w4, w7, w4
 	ldrb	w0, [x14, 58]
 	cmp	w3, w4
-	bne	.L1168
+	bne	.L1223
 	cmp	w1, 1
-	bne	.L1165
+	bne	.L1220
 	cmp	w0, 7
 	ccmp	w0, 9, 4, ne
-	beq	.L1167
+	beq	.L1222
 	ret
-.L1168:
+.L1223:
 	cmp	w1, 3
-	bhi	.L1167
+	bhi	.L1222
 	ldrb	w4, [x13,w1,uxtw]
-	adr	x14, .Lrtx1169
+	adr	x14, .Lrtx1224
 	add	x4, x14, w4, sxtb #2
 	br	x4
-.Lrtx1169:
+.Lrtx1224:
 	.section	.rodata.queue_lun_state,"a",@progbits
 	.align	0
 	.align	2
-.L1169:
-	.byte	(.L1165 - .Lrtx1169) / 4
-	.byte	(.L1170 - .Lrtx1169) / 4
-	.byte	(.L1171 - .Lrtx1169) / 4
-	.byte	(.L1165 - .Lrtx1169) / 4
+.L1224:
+	.byte	(.L1220 - .Lrtx1224) / 4
+	.byte	(.L1225 - .Lrtx1224) / 4
+	.byte	(.L1226 - .Lrtx1224) / 4
+	.byte	(.L1220 - .Lrtx1224) / 4
 	.section	.text.queue_lun_state
-.L1170:
+.L1225:
 	cmp	w0, 7
 	ccmp	w0, 9, 4, ne
-	beq	.L1167
+	beq	.L1222
 	ret
-.L1171:
+.L1226:
 	cmp	w0, 11
-	bne	.L1165
-.L1167:
+	bne	.L1220
+.L1222:
 	lsl	x2, x2, 6
 	ldrb	w2, [x15, x2]
 	cmp	w2, 255
-	bne	.L1172
-.L1173:
+	bne	.L1227
+.L1228:
 	mov	w0, 0
-.L1165:
+.L1220:
 	ret
 	.size	queue_lun_state, .-queue_lun_state
 	.section	.text.queue_remove_completed_req,"ax",@progbits
@@ -7079,25 +7466,25 @@ queue_lun_state:
 	.global	queue_remove_completed_req
 	.type	queue_remove_completed_req, %function
 queue_remove_completed_req:
-	adrp	x4, .LANCHOR127
-	adrp	x8, .LANCHOR71
-	adrp	x1, .LANCHOR56
-	adrp	x7, .LANCHOR132
-	adrp	x3, .LANCHOR52
-	ldrb	w14, [x4, #:lo12:.LANCHOR127]
-	add	x5, x3, :lo12:.LANCHOR52
-	ldrb	w2, [x1, #:lo12:.LANCHOR56]
-	ldrb	w12, [x8, #:lo12:.LANCHOR71]
+	adrp	x4, .LANCHOR65
+	adrp	x8, .LANCHOR64
+	adrp	x1, .LANCHOR60
+	adrp	x7, .LANCHOR63
+	adrp	x3, .LANCHOR56
+	ldrb	w14, [x4, #:lo12:.LANCHOR65]
+	add	x5, x3, :lo12:.LANCHOR56
+	ldrb	w2, [x1, #:lo12:.LANCHOR60]
+	ldrb	w12, [x8, #:lo12:.LANCHOR64]
 	mov	x11, x5
-	ldrb	w13, [x7, #:lo12:.LANCHOR132]
-	add	x16, x8, :lo12:.LANCHOR71
-	add	x7, x7, :lo12:.LANCHOR132
-	add	x10, x4, :lo12:.LANCHOR127
+	ldrb	w13, [x7, #:lo12:.LANCHOR63]
+	add	x16, x8, :lo12:.LANCHOR64
+	add	x7, x7, :lo12:.LANCHOR63
+	add	x10, x4, :lo12:.LANCHOR65
 	mov	w6, 0
 	mov	w15, -1
-.L1176:
+.L1231:
 	cmp	w2, 255
-	beq	.L1177
+	beq	.L1232
 	sbfiz	x8, x2, 6, 32
 	sxtw	x0, w2
 	add	x4, x5, x8
@@ -7105,61 +7492,61 @@ queue_remove_completed_req:
 	sub	w4, w4, #12
 	and	w4, w4, 255
 	cmp	w4, 1
-	bls	.L1178
-	cbz	w6, .L1175
-	strb	w2, [x1, #:lo12:.LANCHOR56]
+	bls	.L1233
+	cbz	w6, .L1230
+	strb	w2, [x1, #:lo12:.LANCHOR60]
 	ret
-.L1178:
+.L1233:
 	lsl	x6, x0, 6
 	ldrb	w2, [x5, x8]
 	add	x4, x5, x6
 	strb	w15, [x5, x6]
 	ldrb	w6, [x4, 59]
 	cmp	w6, 1
-	bne	.L1181
+	bne	.L1236
 	ldrh	w4, [x4, 50]
-	cbnz	w4, .L1189
+	cbnz	w4, .L1244
 	mov	w4, w14
 	mov	x6, x10
-.L1182:
+.L1237:
 	cmp	w4, 255
-	bne	.L1187
-	add	x3, x3, :lo12:.LANCHOR52
-	strb	w2, [x1, #:lo12:.LANCHOR56]
+	bne	.L1242
+	add	x3, x3, :lo12:.LANCHOR56
+	strb	w2, [x1, #:lo12:.LANCHOR60]
 	add	x0, x3, x0, lsl 6
 	ldrb	w0, [x0, 1]
 	strb	w0, [x6]
 	ret
-.L1181:
-	cbnz	w6, .L1183
+.L1236:
+	cbnz	w6, .L1238
 	ldr	w4, [x4, 36]
 	cmn	w4, #1
-	beq	.L1183
+	beq	.L1238
 	mov	w4, w13
 	mov	x6, x7
-	b	.L1182
-.L1189:
+	b	.L1237
+.L1244:
 	mov	w4, w12
 	mov	x6, x16
-	b	.L1182
-.L1187:
+	b	.L1237
+.L1242:
 	mov	w6, w4
 	sbfiz	x4, x4, 6, 32
 	ldrb	w4, [x11, x4]
 	cmp	w4, 255
-	bne	.L1187
+	bne	.L1242
 	add	x0, x11, x0, lsl 6
 	sbfiz	x6, x6, 6, 32
 	ldrb	w0, [x0, 1]
 	strb	w0, [x11, x6]
-.L1183:
+.L1238:
 	mov	w6, 1
-	b	.L1176
-.L1177:
-	cbz	w6, .L1175
+	b	.L1231
+.L1232:
+	cbz	w6, .L1230
 	mov	w0, -1
-	strb	w0, [x1, #:lo12:.LANCHOR56]
-.L1175:
+	strb	w0, [x1, #:lo12:.LANCHOR60]
+.L1230:
 	ret
 	.size	queue_remove_completed_req, .-queue_remove_completed_req
 	.section	.text.pm_alloc_new_blk,"ax",@progbits
@@ -7171,9 +7558,9 @@ pm_alloc_new_blk:
 	adrp	x2, .LANCHOR80
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR104
+	adrp	x20, .LANCHOR110
 	stp	x21, x22, [sp, 32]
-	ldr	x1, [x20, #:lo12:.LANCHOR104]
+	ldr	x1, [x20, #:lo12:.LANCHOR110]
 	ldrb	w2, [x2, #:lo12:.LANCHOR80]
 	ldrh	w0, [x1, 690]
 	str	x23, [sp, 48]
@@ -7181,110 +7568,114 @@ pm_alloc_new_blk:
 	and	w0, w0, 65535
 	strh	w0, [x1, 690]
 	cmp	w2, w0
-	bls	.L1200
+	bls	.L1255
 	add	x0, x1, x0, sxtw 1
 	ldrh	w1, [x0, 672]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1201
-.L1200:
-	adrp	x19, .LC76
-	add	x19, x19, :lo12:.LC76
-	adrp	x23, .LANCHOR7
-.L1213:
+	bne	.L1256
+.L1255:
+	adrp	x19, .LC82
+	add	x19, x19, :lo12:.LC82
+	mov	w23, 65535
+	adrp	x22, .LANCHOR7
+.L1257:
 	mov	w0, 1
 	bl	ftl_alloc_sblk
-	mov	w1, 0
 	and	w21, w0, 65535
+	cmp	w21, w23
+	beq	.L1257
+	mov	w1, 0
+	mov	w0, w21
 	bl	ftl_erase_sblk
-	add	x14, x20, :lo12:.LANCHOR104
-	ldr	x1, [x20, #:lo12:.LANCHOR104]
+	add	x14, x20, :lo12:.LANCHOR110
+	ldr	x1, [x20, #:lo12:.LANCHOR110]
 	mov	w0, w21
 	add	x1, x1, 672
 	bl	ftl_get_blk_list_in_sblk
 	tst	w0, 65535
-	bne	.L1202
+	bne	.L1258
 	mov	w1, w21
 	mov	x0, x19
 	bl	printf
-	ldr	x1, [x23, #:lo12:.LANCHOR7]
-	add	x1, x1, x21, uxth 2
-	ldrb	w0, [x1, 2]
+	ldr	x0, [x22, #:lo12:.LANCHOR7]
+	add	x21, x0, x21, uxth 2
+	ldrb	w0, [x21, 2]
 	orr	w0, w0, -32
-	strb	w0, [x1, 2]
-	b	.L1213
-.L1202:
+	strb	w0, [x21, 2]
+	b	.L1257
+.L1258:
 	ldr	x0, [x14]
-	adrp	x1, .LANCHOR133
+	adrp	x1, .LANCHOR136
 	mov	w2, 1
 	mov	w19, 0
 	add	x0, x0, 416
-	str	w2, [x1, #:lo12:.LANCHOR133]
+	str	w2, [x1, #:lo12:.LANCHOR136]
 	mov	w1, 65535
 	strh	wzr, [x0, 274]
-.L1204:
+.L1260:
 	ldrh	w2, [x0]
 	cmp	w2, w1
-	beq	.L1203
+	beq	.L1259
 	add	w19, w19, 1
 	add	x0, x0, 2
 	and	w19, w19, 65535
 	cmp	w19, 128
-	bne	.L1204
-	adrp	x1, .LANCHOR134
+	bne	.L1260
+	adrp	x1, .LANCHOR137
 	adrp	x0, .LC0
-	mov	w2, 231
-	add	x1, x1, :lo12:.LANCHOR134
+	mov	w2, 264
+	add	x1, x1, :lo12:.LANCHOR137
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1203:
-	ldr	x0, [x20, #:lo12:.LANCHOR104]
+.L1259:
+	ldr	x0, [x20, #:lo12:.LANCHOR110]
 	add	x19, x0, x19, sxtw 1
 	ldrh	w1, [x0, 688]
 	strh	w21, [x19, 416]
 	add	w1, w1, 1
 	strh	w1, [x0, 688]
-.L1201:
-	ldr	x1, [x20, #:lo12:.LANCHOR104]
+.L1256:
+	ldr	x1, [x20, #:lo12:.LANCHOR110]
 	ldrh	w0, [x1, 690]
 	add	x0, x0, 336
 	ldrh	w19, [x1, x0, lsl 1]
 	mov	w0, 65533
 	sub	w1, w19, #1
 	cmp	w0, w1, uxth
-	bcs	.L1206
-	adrp	x1, .LANCHOR134
+	bcs	.L1262
+	adrp	x1, .LANCHOR137
 	adrp	x0, .LC0
-	mov	w2, 236
-	add	x1, x1, :lo12:.LANCHOR134
+	mov	w2, 270
+	add	x1, x1, :lo12:.LANCHOR137
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1206:
-	adrp	x1, .LANCHOR31
+.L1262:
+	adrp	x1, .LANCHOR32
 	mov	w2, 24
-	ldr	x0, [x20, #:lo12:.LANCHOR104]
-	ldrb	w1, [x1, #:lo12:.LANCHOR31]
+	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	ldrb	w1, [x1, #:lo12:.LANCHOR32]
 	sub	w2, w2, w1
-	adrp	x1, .LANCHOR68
+	adrp	x1, .LANCHOR75
 	strh	wzr, [x0, 696]
-	ldrh	w1, [x1, #:lo12:.LANCHOR68]
+	ldrh	w1, [x1, #:lo12:.LANCHOR75]
 	strh	w19, [x0, 692]
 	sub	w2, w2, w1
 	asr	w4, w19, w2
 	strh	w4, [x0, 694]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1209
+	tbz	x0, 12, .L1265
 	mov	w0, 1
 	and	w4, w4, 65535
 	lsl	w2, w0, w2
 	mov	w3, w19
-	adrp	x0, .LC77
+	adrp	x0, .LC83
 	sub	w2, w2, #1
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC77
+	add	x0, x0, :lo12:.LC83
 	bl	printf
-.L1209:
+.L1265:
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -7298,68 +7689,68 @@ pm_alloc_new_blk:
 	.type	pm_select_ram_region, %function
 pm_select_ram_region:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR135
-	add	x0, x0, :lo12:.LANCHOR135
+	adrp	x0, .LANCHOR138
+	add	x0, x0, :lo12:.LANCHOR138
 	mov	x1, 0
 	add	x29, sp, 0
 	mov	w2, 65535
 	str	x19, [sp, 16]
-.L1218:
+.L1274:
 	lsl	x3, x1, 4
 	and	w19, w1, 65535
 	ldrh	w3, [x3, x0]
 	cmp	w3, w2
-	beq	.L1217
+	beq	.L1273
 	add	x1, x1, 1
 	cmp	x1, 32
-	bne	.L1218
+	bne	.L1274
 	add	x0, x0, 2
 	mov	w19, w1
 	mov	x2, x0
 	mov	w4, 32768
 	mov	w1, 0
-.L1220:
+.L1276:
 	ldrh	w3, [x2]
-	tbnz	x3, 15, .L1219
+	tbnz	x3, 15, .L1275
 	cmp	w3, w4
-	bcs	.L1219
+	bcs	.L1275
 	mov	w4, w3
 	mov	w19, w1
-.L1219:
+.L1275:
 	add	w1, w1, 1
 	add	x2, x2, 16
 	and	w1, w1, 65535
 	cmp	w1, 32
-	bne	.L1220
+	bne	.L1276
 	cmp	w19, 32
-	bne	.L1217
-	adrp	x1, .LANCHOR136
+	bne	.L1273
+	adrp	x1, .LANCHOR139
 	mov	w2, -1
-	ldrb	w3, [x1, #:lo12:.LANCHOR136]
+	ldrb	w3, [x1, #:lo12:.LANCHOR139]
 	mov	w1, 0
-.L1222:
+.L1278:
 	ldrh	w5, [x0]
 	cmp	w5, w2
-	bcs	.L1221
+	bcs	.L1277
 	ldrh	w4, [x0, -2]
 	cmp	w4, w3
 	csel	w2, w2, w5, eq
 	csel	w19, w19, w1, eq
-.L1221:
+.L1277:
 	add	w1, w1, 1
 	add	x0, x0, 16
 	and	w1, w1, 65535
 	cmp	w1, 32
-	bne	.L1222
+	bne	.L1278
 	cmp	w19, 32
-	bne	.L1217
-	adrp	x1, .LANCHOR137
+	bne	.L1273
+	adrp	x1, .LANCHOR140
 	adrp	x0, .LC0
-	mov	w2, 335
-	add	x1, x1, :lo12:.LANCHOR137
+	mov	w2, 377
+	add	x1, x1, :lo12:.LANCHOR140
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1217:
+.L1273:
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -7370,14 +7761,14 @@ pm_select_ram_region:
 	.global	idb_init
 	.type	idb_init, %function
 idb_init:
-	adrp	x0, .LANCHOR138
-	str	xzr, [x0, #:lo12:.LANCHOR138]
-	adrp	x0, .LANCHOR139
-	str	wzr, [x0, #:lo12:.LANCHOR139]
-	adrp	x0, .LANCHOR140
-	strb	wzr, [x0, #:lo12:.LANCHOR140]
 	adrp	x0, .LANCHOR141
 	str	xzr, [x0, #:lo12:.LANCHOR141]
+	adrp	x0, .LANCHOR142
+	str	wzr, [x0, #:lo12:.LANCHOR142]
+	adrp	x0, .LANCHOR143
+	strb	wzr, [x0, #:lo12:.LANCHOR143]
+	adrp	x0, .LANCHOR144
+	str	xzr, [x0, #:lo12:.LANCHOR144]
 	mov	w0, 0
 	ret
 	.size	idb_init, .-idb_init
@@ -7394,63 +7785,70 @@ ftl_memset:
 	.global	flash_lsb_page_tbl_build
 	.type	flash_lsb_page_tbl_build, %function
 flash_lsb_page_tbl_build:
-	stp	x29, x30, [sp, -32]!
+	stp	x29, x30, [sp, -48]!
+	adrp	x1, .LANCHOR16
 	add	x29, sp, 0
+	ldr	x1, [x1, #:lo12:.LANCHOR16]
 	stp	x19, x20, [sp, 16]
+	mov	w20, 1024
+	str	x21, [sp, 32]
 	adrp	x19, .LANCHOR3
-	cbnz	w0, .L1230
+	ldrb	w1, [x1, 12]
+	sdiv	w20, w20, w1
+	cbnz	w0, .L1286
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1231:
+.L1287:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
-	cmp	x0, 256
-	bne	.L1231
-.L1237:
-	adrp	x20, .LANCHOR142
-	add	x20, x20, :lo12:.LANCHOR142
-	mov	w2, 1024
+	cmp	x0, 512
+	bne	.L1287
+.L1293:
+	adrp	x21, .LANCHOR145
+	add	x21, x21, :lo12:.LANCHOR145
+	mov	w2, 2048
 	mov	w1, 255
-	mov	x0, x20
+	mov	x0, x21
 	add	x19, x19, :lo12:.LANCHOR3
 	bl	ftl_memset
 	mov	x0, 0
-.L1232:
-	ldrh	w1, [x0, x19]
-	add	x0, x0, 2
-	cmp	x0, 512
-	strh	w1, [x20, w1, sxtw 1]
-	bne	.L1232
+.L1288:
+	ldrh	w1, [x19, x0, lsl 1]
+	add	x0, x0, 1
+	cmp	w20, w0, uxth
+	strh	w1, [x21, w1, sxtw 1]
+	bhi	.L1288
 	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 32
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 48
 	ret
-.L1230:
+.L1286:
 	cmp	w0, 1
-	bne	.L1233
+	bne	.L1289
 	add	x3, x19, :lo12:.LANCHOR3
 	mov	x1, 0
-.L1236:
+.L1292:
 	and	w0, w1, 65535
 	cmp	x1, 3
-	bls	.L1234
+	bls	.L1290
 	ubfiz	w2, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 2
 	sub	w0, w2, w0
 	and	w0, w0, 65535
-.L1234:
+.L1290:
 	strh	w0, [x3, x1, lsl 1]
 	add	x1, x1, 1
-	cmp	x1, 256
-	bne	.L1236
-	b	.L1237
-.L1233:
+	cmp	x1, 512
+	bne	.L1292
+	b	.L1293
+.L1289:
 	cmp	w0, 2
-	bne	.L1238
+	bne	.L1294
 	add	x3, x19, :lo12:.LANCHOR3
 	mov	w1, 65535
 	mov	x0, 0
-.L1240:
+.L1296:
 	cmp	x0, 2
 	and	w2, w0, 65535
 	csel	w2, w2, w1, cc
@@ -7458,32 +7856,32 @@ flash_lsb_page_tbl_build:
 	add	w1, w1, 2
 	add	x0, x0, 1
 	and	w1, w1, 65535
-	cmp	x0, 256
-	bne	.L1240
-	b	.L1237
-.L1238:
+	cmp	x0, 512
+	bne	.L1296
+	b	.L1293
+.L1294:
 	cmp	w0, 3
-	bne	.L1241
+	bne	.L1297
 	add	x3, x19, :lo12:.LANCHOR3
 	mov	x1, 0
-.L1244:
+.L1300:
 	and	w0, w1, 65535
 	cmp	x1, 5
-	bls	.L1242
+	bls	.L1298
 	ubfiz	w2, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 4
 	sub	w0, w2, w0
 	and	w0, w0, 65535
-.L1242:
+.L1298:
 	strh	w0, [x3, x1, lsl 1]
 	add	x1, x1, 1
-	cmp	x1, 256
-	bne	.L1244
-	b	.L1237
-.L1241:
+	cmp	x1, 512
+	bne	.L1300
+	b	.L1293
+.L1297:
 	cmp	w0, 4
-	bne	.L1245
+	bne	.L1301
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	w2, 1
 	add	x1, x1, 16
@@ -7501,7 +7899,7 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1, -10]
 	strh	w0, [x1, -2]
 	mov	w0, 8
-.L1247:
+.L1303:
 	and	w3, w0, 1
 	ubfiz	w2, w0, 1, 15
 	add	w3, w3, 6
@@ -7509,41 +7907,41 @@ flash_lsb_page_tbl_build:
 	sub	w2, w2, w3
 	strh	w2, [x1], 2
 	and	w0, w0, 65535
-	cmp	w0, 256
-	bne	.L1247
-	b	.L1237
-.L1245:
+	cmp	w0, 512
+	bne	.L1303
+	b	.L1293
+.L1301:
 	cmp	w0, 5
-	bne	.L1248
+	bne	.L1304
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1249:
+.L1305:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 16
-	bne	.L1249
+	bne	.L1305
 	add	x1, x1, 32
-.L1250:
+.L1306:
 	strh	w0, [x1], 2
 	add	w0, w0, 2
 	and	w0, w0, 65535
-	cmp	w0, 496
-	bne	.L1250
-	b	.L1237
-.L1248:
+	cmp	w0, 1008
+	bne	.L1306
+	b	.L1293
+.L1304:
 	cmp	w0, 8
-	bne	.L1251
+	bne	.L1307
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1252:
+.L1308:
 	strh	w0, [x0, x1]
 	add	x0, x0, 2
-	cmp	x0, 512
-	bne	.L1252
-	b	.L1237
-.L1251:
+	cmp	x0, 1024
+	bne	.L1308
+	b	.L1293
+.L1307:
 	cmp	w0, 9
-	bne	.L1253
+	bne	.L1309
 	add	x0, x19, :lo12:.LANCHOR3
 	mov	w1, 1
 	add	x0, x0, 6
@@ -7552,31 +7950,67 @@ flash_lsb_page_tbl_build:
 	mov	w1, 2
 	strh	w1, [x0, -2]
 	mov	w1, 3
-.L1254:
+.L1310:
 	strh	w1, [x0], 2
 	add	w1, w1, 2
 	and	w1, w1, 65535
-	cmp	w1, 509
-	bne	.L1254
-	b	.L1237
-.L1253:
+	cmp	w1, 1021
+	bne	.L1310
+	b	.L1293
+.L1309:
 	cmp	w0, 10
-	bne	.L1237
+	bne	.L1311
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1255:
+.L1312:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 63
-	bne	.L1255
+	bne	.L1312
 	add	x1, x1, 126
-.L1256:
+.L1313:
 	strh	w0, [x1], 2
 	add	w0, w0, 2
 	and	w0, w0, 65535
-	cmp	w0, 449
-	bne	.L1256
-	b	.L1237
+	cmp	w0, 961
+	bne	.L1313
+	b	.L1293
+.L1311:
+	cmp	w0, 11
+	bne	.L1314
+	add	x1, x19, :lo12:.LANCHOR3
+	mov	x0, 0
+.L1315:
+	strh	w0, [x1, x0, lsl 1]
+	add	x0, x0, 1
+	cmp	x0, 8
+	bne	.L1315
+	add	x1, x1, 16
+.L1317:
+	and	w3, w0, 1
+	ubfiz	w2, w0, 1, 15
+	add	w3, w3, 6
+	add	w0, w0, 1
+	sub	w2, w2, w3
+	strh	w2, [x1], 2
+	and	w0, w0, 65535
+	cmp	w0, 512
+	bne	.L1317
+	b	.L1293
+.L1314:
+	cmp	w0, 13
+	bne	.L1293
+	add	x2, x19, :lo12:.LANCHOR3
+	mov	x1, 0
+	mov	w0, 0
+.L1318:
+	strh	w0, [x1, x2]
+	add	w0, w0, 3
+	and	w0, w0, 65535
+	add	x1, x1, 2
+	cmp	w0, 1536
+	bne	.L1318
+	b	.L1293
 	.size	flash_lsb_page_tbl_build, .-flash_lsb_page_tbl_build
 	.section	.text.flash_die_info_init,"ax",@progbits
 	.align	2
@@ -7590,54 +8024,54 @@ flash_die_info_init:
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	tbz	x0, 12, .L1275
-	adrp	x1, .LANCHOR143
+	tbz	x0, 12, .L1341
+	adrp	x1, .LANCHOR146
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR143
+	add	x1, x1, :lo12:.LANCHOR146
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1275:
-	adrp	x22, .LANCHOR32
-	add	x19, x22, :lo12:.LANCHOR32
+.L1341:
+	adrp	x22, .LANCHOR33
+	add	x19, x22, :lo12:.LANCHOR33
 	adrp	x23, .LANCHOR2
 	adrp	x24, .LANCHOR18
 	adrp	x21, .LANCHOR30
 	mov	w2, 8
 	ldrh	w0, [x19, 26]
-	adrp	x20, .LANCHOR145
+	adrp	x20, .LANCHOR148
 	ldrb	w1, [x19, 12]
 	strh	w0, [x23, #:lo12:.LANCHOR2]
 	ldrh	w0, [x19, 10]
 	strb	wzr, [x24, #:lo12:.LANCHOR18]
 	sdiv	w0, w0, w1
-	adrp	x1, .LANCHOR144
-	strh	w0, [x1, #:lo12:.LANCHOR144]
+	adrp	x1, .LANCHOR147
+	strh	w0, [x1, #:lo12:.LANCHOR147]
 	mov	w1, 0
 	add	x0, x21, :lo12:.LANCHOR30
 	bl	ftl_memset
-	add	x0, x20, :lo12:.LANCHOR145
+	add	x0, x20, :lo12:.LANCHOR148
 	mov	w2, 32
 	mov	w1, 0
 	bl	ftl_memset
 	mov	x8, x22
 	mov	x15, x21
 	mov	x11, x20
-	adrp	x14, .LANCHOR44
-	adrp	x20, .LANCHOR33
-	add	x21, x14, :lo12:.LANCHOR44
-	add	x20, x20, :lo12:.LANCHOR33
+	adrp	x14, .LANCHOR48
+	adrp	x20, .LANCHOR34
+	add	x21, x14, :lo12:.LANCHOR48
+	add	x20, x20, :lo12:.LANCHOR34
 	add	x22, x19, 1
 	mov	x12, 0
-.L1277:
+.L1343:
 	ldrb	w2, [x19]
 	mov	w0, 2
 	strb	w0, [x12, x20]
 	add	x1, x21, x12, lsl 3
 	mov	x0, x22
 	bl	flash_mem_cmp8
-	cbnz	w0, .L1276
+	cbnz	w0, .L1342
 	ldrb	w2, [x24, #:lo12:.LANCHOR18]
-	add	x1, x11, :lo12:.LANCHOR145
+	add	x1, x11, :lo12:.LANCHOR148
 	add	w0, w2, 1
 	strb	w0, [x24, #:lo12:.LANCHOR18]
 	and	w0, w12, 255
@@ -7645,16 +8079,16 @@ flash_die_info_init:
 	add	x1, x15, :lo12:.LANCHOR30
 	strb	w0, [x1, x2]
 	bl	zftl_flash_enter_slc_mode
-.L1276:
+.L1342:
 	add	x12, x12, 1
 	cmp	x12, 4
-	bne	.L1277
-	add	x0, x8, :lo12:.LANCHOR32
+	bne	.L1343
+	add	x0, x8, :lo12:.LANCHOR33
 	ldrb	w1, [x0, 8]
 	cmp	w1, 2
-	beq	.L1278
-.L1282:
-	add	x8, x8, :lo12:.LANCHOR32
+	beq	.L1344
+.L1348:
+	add	x8, x8, :lo12:.LANCHOR33
 	ldrb	w0, [x24, #:lo12:.LANCHOR18]
 	ldp	x19, x20, [sp, 16]
 	ldrb	w1, [x8, 13]
@@ -7664,18 +8098,18 @@ flash_die_info_init:
 	ldrh	w1, [x8, 14]
 	ldp	x29, x30, [sp], 64
 	mul	w0, w0, w1
-	adrp	x1, .LANCHOR146
-	strh	w0, [x1, #:lo12:.LANCHOR146]
+	adrp	x1, .LANCHOR149
+	strh	w0, [x1, #:lo12:.LANCHOR149]
 	ret
-.L1278:
+.L1344:
 	ldrh	w1, [x23, #:lo12:.LANCHOR2]
-	add	x14, x14, :lo12:.LANCHOR44
+	add	x14, x14, :lo12:.LANCHOR48
 	ldrb	w12, [x0, 13]
 	add	x7, x0, 1
-	ldrb	w20, [x8, #:lo12:.LANCHOR32]
+	ldrb	w20, [x8, #:lo12:.LANCHOR33]
 	add	x19, x24, :lo12:.LANCHOR18
 	ldrb	w21, [x0, 23]
-	add	x11, x11, :lo12:.LANCHOR145
+	add	x11, x11, :lo12:.LANCHOR148
 	add	x15, x15, :lo12:.LANCHOR30
 	mov	x13, 0
 	mul	w12, w12, w1
@@ -7683,12 +8117,12 @@ flash_die_info_init:
 	and	w1, w1, 65280
 	mul	w12, w12, w1
 	lsl	w22, w12, 1
-.L1281:
+.L1347:
 	mov	w2, w20
 	add	x1, x14, x13, lsl 3
 	mov	x0, x7
 	bl	flash_mem_cmp8
-	cbnz	w0, .L1279
+	cbnz	w0, .L1345
 	ldrb	w1, [x19]
 	cmp	w21, 0
 	csel	w2, w12, w22, eq
@@ -7696,11 +8130,11 @@ flash_die_info_init:
 	strb	w0, [x19]
 	str	w2, [x11, x1, lsl 2]
 	strb	w13, [x15, x1]
-.L1279:
+.L1345:
 	add	x13, x13, 1
 	cmp	x13, 4
-	bne	.L1281
-	b	.L1282
+	bne	.L1347
+	b	.L1348
 	.size	flash_die_info_init, .-flash_die_info_init
 	.section	.text.lpa_hash_init,"ax",@progbits
 	.align	2
@@ -7710,19 +8144,19 @@ lpa_hash_init:
 	stp	x29, x30, [sp, -16]!
 	mov	w2, 512
 	mov	w1, 255
-	adrp	x0, .LANCHOR110
+	adrp	x0, .LANCHOR116
 	add	x29, sp, 0
-	add	x0, x0, :lo12:.LANCHOR110
+	add	x0, x0, :lo12:.LANCHOR116
 	bl	ftl_memset
-	adrp	x0, .LANCHOR87
+	adrp	x0, .LANCHOR95
 	mov	w1, 255
 	ldp	x29, x30, [sp], 16
-	ldrh	w2, [x0, #:lo12:.LANCHOR87]
+	ldrh	w2, [x0, #:lo12:.LANCHOR95]
 	adrp	x0, .LANCHOR80
 	ldrb	w0, [x0, #:lo12:.LANCHOR80]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR112
-	ldr	x0, [x0, #:lo12:.LANCHOR112]
+	adrp	x0, .LANCHOR118
+	ldr	x0, [x0, #:lo12:.LANCHOR118]
 	lsl	w2, w2, 2
 	b	ftl_memset
 	.size	lpa_hash_init, .-lpa_hash_init
@@ -7737,59 +8171,59 @@ lpa_rebuild_hash:
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	tbz	x0, 12, .L1295
-	adrp	x1, .LANCHOR147
-	adrp	x0, .LC78
+	tbz	x0, 12, .L1361
+	adrp	x1, .LANCHOR150
+	adrp	x0, .LC84
 	mov	w3, 0
-	mov	w2, 225
-	add	x1, x1, :lo12:.LANCHOR147
-	add	x0, x0, :lo12:.LC78
+	mov	w2, 239
+	add	x1, x1, :lo12:.LANCHOR150
+	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L1295:
-	adrp	x20, .LANCHOR87
+.L1361:
+	adrp	x20, .LANCHOR95
 	adrp	x22, .LANCHOR80
-	adrp	x19, .LANCHOR110
-	add	x19, x19, :lo12:.LANCHOR110
+	adrp	x19, .LANCHOR116
+	add	x19, x19, :lo12:.LANCHOR116
 	mov	w2, 512
 	mov	w1, 255
 	mov	x0, x19
 	bl	ftl_memset
-	ldrh	w2, [x20, #:lo12:.LANCHOR87]
-	adrp	x21, .LANCHOR112
+	ldrh	w2, [x20, #:lo12:.LANCHOR95]
+	adrp	x21, .LANCHOR118
 	ldrb	w0, [x22, #:lo12:.LANCHOR80]
 	mov	w1, 255
-	add	x20, x20, :lo12:.LANCHOR87
+	add	x20, x20, :lo12:.LANCHOR95
 	mul	w2, w2, w0
-	ldr	x0, [x21, #:lo12:.LANCHOR112]
+	ldr	x0, [x21, #:lo12:.LANCHOR118]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	adrp	x0, .LANCHOR111
+	adrp	x0, .LANCHOR117
 	ldrb	w3, [x22, #:lo12:.LANCHOR80]
-	ldr	x5, [x21, #:lo12:.LANCHOR112]
+	ldr	x5, [x21, #:lo12:.LANCHOR118]
 	mov	w1, 0
-	ldr	x4, [x0, #:lo12:.LANCHOR111]
-.L1296:
+	ldr	x4, [x0, #:lo12:.LANCHOR117]
+.L1362:
 	ldrh	w0, [x20]
 	mul	w0, w0, w3
 	cmp	w1, w0, lsl 1
-	blt	.L1298
+	blt	.L1364
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1298:
+.L1364:
 	uxtw	x2, w1
 	ldr	w0, [x4, x2, lsl 2]
 	cmn	w0, #1
-	beq	.L1297
+	beq	.L1363
 	and	x0, x0, 255
 	ldrh	w6, [x19, x0, lsl 1]
 	strh	w1, [x19, x0, lsl 1]
 	strh	w6, [x5, x2, lsl 1]
-.L1297:
+.L1363:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L1296
+	b	.L1362
 	.size	lpa_rebuild_hash, .-lpa_rebuild_hash
 	.section	.text.zftl_read_flash_info,"ax",@progbits
 	.align	2
@@ -7803,10 +8237,10 @@ zftl_read_flash_info:
 	str	x19, [sp, 16]
 	mov	x19, x0
 	bl	ftl_memset
-	adrp	x1, .LANCHOR32
-	add	x1, x1, :lo12:.LANCHOR32
+	adrp	x1, .LANCHOR33
+	add	x1, x1, :lo12:.LANCHOR33
 	adrp	x0, .LANCHOR2
-	adrp	x3, .LANCHOR61
+	adrp	x3, .LANCHOR68
 	strb	wzr, [x19, 10]
 	mov	w4, 1
 	ldrb	w2, [x1, 9]
@@ -7815,11 +8249,11 @@ zftl_read_flash_info:
 	strb	w0, [x19, 4]
 	ubfx	x0, x0, 8, 8
 	strb	w0, [x19, 5]
-	adrp	x0, .LANCHOR46
-	ldrb	w0, [x0, #:lo12:.LANCHOR46]
+	adrp	x0, .LANCHOR50
+	ldrb	w0, [x0, #:lo12:.LANCHOR50]
 	strb	w0, [x19, 7]
-	add	x0, x3, :lo12:.LANCHOR61
-	ldrb	w3, [x3, #:lo12:.LANCHOR61]
+	add	x0, x3, :lo12:.LANCHOR68
+	ldrb	w3, [x3, #:lo12:.LANCHOR68]
 	strb	w3, [x19]
 	ldrb	w3, [x0, 1]
 	strb	w3, [x19, 1]
@@ -7837,20 +8271,20 @@ zftl_read_flash_info:
 	strb	w0, [x19, 9]
 	adrp	x0, .LANCHOR18
 	ldrb	w3, [x0, #:lo12:.LANCHOR18]
-.L1307:
+.L1373:
 	cmp	w3, w1, uxtb
-	bhi	.L1308
+	bhi	.L1374
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1308:
+.L1374:
 	ldrb	w0, [x1, x2]
 	add	x1, x1, 1
 	ldrb	w5, [x19, 10]
 	lsl	w0, w4, w0
 	orr	w0, w0, w5
 	strb	w0, [x19, 10]
-	b	.L1307
+	b	.L1373
 	.size	zftl_read_flash_info, .-zftl_read_flash_info
 	.section	.text.gc_static_wearleveling,"ax",@progbits
 	.align	2
@@ -7859,176 +8293,213 @@ zftl_read_flash_info:
 gc_static_wearleveling:
 	stp	x29, x30, [sp, -160]!
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR104
-	stp	x19, x20, [sp, 16]
-	ldr	x0, [x23, #:lo12:.LANCHOR104]
 	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR110
+	stp	x19, x20, [sp, 16]
+	ldr	x0, [x22, #:lo12:.LANCHOR110]
+	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	ldr	w1, [x0, 32]
 	mov	w0, 10240
 	cmp	w1, w0
-	bls	.L1311
+	bls	.L1377
 	bl	ftl_tmp_into_update
-.L1311:
+.L1377:
 	adrp	x19, .LANCHOR10
+	mov	w3, 36000
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldr	w1, [x0, 568]
 	ldr	w2, [x0, 12]
+	add	w3, w1, w3
+	cmp	w2, w3
+	bcs	.L1378
+	ldr	x4, [x22, #:lo12:.LANCHOR110]
+	ldr	w3, [x0, 572]
+	add	w3, w3, 256
+	ldr	w4, [x4, 36]
+	cmp	w4, w3
+	bcc	.L1430
+.L1378:
 	add	w1, w1, 860160
 	add	w1, w1, 3840
 	cmp	w2, w1
-	bhi	.L1312
-	ldr	x3, [x23, #:lo12:.LANCHOR104]
+	bhi	.L1380
+	ldr	x3, [x22, #:lo12:.LANCHOR110]
 	ldr	w1, [x0, 572]
 	add	w1, w1, 32
 	ldr	w3, [x3, 36]
 	cmp	w3, w1
-	bls	.L1362
-.L1312:
-	ldr	x1, [x23, #:lo12:.LANCHOR104]
+	bls	.L1431
+.L1380:
+	ldr	x1, [x22, #:lo12:.LANCHOR110]
 	mov	w20, 65535
 	adrp	x8, .LANCHOR14
 	mov	w21, w20
 	add	x8, x8, :lo12:.LANCHOR14
-	mov	w28, 0
 	mov	w27, 0
-	mov	w22, 0
+	mov	w25, 0
+	mov	w26, 0
 	ldr	w3, [x1, 36]
+	mov	w23, 0
+	ldrh	w28, [x1, 134]
 	adrp	x24, .LANCHOR7
-	ldrh	w25, [x1, 134]
 	str	w2, [x0, 568]
 	str	w3, [x0, 572]
 	adrp	x0, .LANCHOR6
 	add	x10, x0, :lo12:.LANCHOR6
 	str	wzr, [x29, 128]
 	str	wzr, [x29, 136]
-	stp	wzr, wzr, [x29, 148]
-	str	wzr, [x29, 156]
-.L1314:
+	stp	wzr, wzr, [x29, 144]
+.L1382:
 	ldrh	w0, [x10]
-	cmp	w0, w25
-	bhi	.L1323
+	cmp	w0, w28
+	bhi	.L1391
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w2, 128
 	mov	w1, 255
-	adrp	x25, .LANCHOR14
 	add	x0, x0, 264
 	strh	wzr, [x0, -142]
 	bl	ftl_memset
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
-	ldr	w3, [x25, #:lo12:.LANCHOR14]
-	ldr	x2, [x24, #:lo12:.LANCHOR7]
-	ldrh	w5, [x0, 586]
-	mov	x1, x5
-	lsl	x0, x5, 2
-	add	x26, x2, x0
-	tbz	x3, 10, .L1324
-	adrp	x3, .LANCHOR9
-	ldrb	w4, [x26, 2]
-	ldr	x6, [x3, #:lo12:.LANCHOR9]
-	ldr	w3, [x2, x0]
-	ldrh	w2, [x2, x0]
-	adrp	x0, .LC80
-	add	x0, x0, :lo12:.LC80
-	ldrh	w7, [x6, x5, lsl 1]
+	adrp	x2, .LANCHOR14
+	ldr	x8, [x24, #:lo12:.LANCHOR7]
+	ldr	w3, [x2, #:lo12:.LANCHOR14]
+	str	x2, [x29, 152]
+	ldrh	w0, [x0, 586]
+	mov	x1, x0
+	lsl	x28, x0, 2
+	add	x10, x8, x28
+	tbz	x3, 10, .L1392
+	adrp	x2, .LANCHOR9
+	ldrb	w6, [x10, 3]
+	ldrb	w4, [x10, 2]
+	ldr	x5, [x2, #:lo12:.LANCHOR9]
+	ldr	w3, [x8, x28]
+	ldrh	w2, [x8, x28]
+	stp	x8, x10, [x29, 112]
+	ldrh	w7, [x5, x0, lsl 1]
 	ubfx	x3, x3, 11, 8
-	ldrb	w6, [x26, 3]
 	ubfx	x5, x4, 5, 3
 	and	w2, w2, 2047
 	ubfx	x4, x4, 3, 2
+	adrp	x0, .LC86
+	add	x0, x0, :lo12:.LC86
 	bl	printf
-.L1324:
-	ldrb	w0, [x26, 2]
-	and	w1, w0, 224
-	cmp	w1, 32
-	bne	.L1325
-	ldr	x2, [x23, #:lo12:.LANCHOR104]
-	ldrh	w2, [x2, 688]
-	cmp	w2, 2
-	bls	.L1325
-	adrp	x2, .LANCHOR148
-	mov	w3, 1
-	str	w3, [x2, #:lo12:.LANCHOR148]
-.L1325:
-	ldrb	w2, [x26, 2]
-	tbz	x2, 3, .L1326
+	ldp	x8, x10, [x29, 112]
+.L1392:
+	ldrb	w0, [x10, 2]
+	and	w3, w0, 224
+	cmp	w3, 32
+	bne	.L1393
+	ldr	x1, [x22, #:lo12:.LANCHOR110]
+	ldrh	w1, [x1, 688]
+	cmp	w1, 2
+	bls	.L1393
+	adrp	x1, .LANCHOR151
+	mov	w2, 1
+	str	w2, [x1, #:lo12:.LANCHOR151]
+.L1393:
+	ldrb	w1, [x10, 2]
+	tbz	x1, 3, .L1394
+	ldr	x1, [x22, #:lo12:.LANCHOR110]
+	ldrh	w2, [x8, x28]
+	and	w2, w2, 2047
+	ldrh	w4, [x1, 96]
+	adrp	x1, .LANCHOR152
+	ldrh	w1, [x1, #:lo12:.LANCHOR152]
+	add	w1, w2, w1, lsr 2
+	cmp	w4, w1
+	ble	.L1394
 	and	w0, w0, 192
 	cmp	w0, 64
-	bne	.L1327
+	bne	.L1395
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w1, 0
 	mov	w2, 1
 	ldrh	w0, [x0, 586]
 	bl	gc_add_sblk
-	adrp	x0, .LANCHOR64+574
+	adrp	x0, .LANCHOR71+2110
 	mov	w1, 1
-	strh	w1, [x0, #:lo12:.LANCHOR64+574]
-.L1326:
+	strh	w1, [x0, #:lo12:.LANCHOR71+2110]
+.L1394:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
-	ldr	w3, [x25, #:lo12:.LANCHOR14]
-	ldr	x2, [x24, #:lo12:.LANCHOR7]
-	ldrh	w5, [x0, 584]
-	mov	x1, x5
-	lsl	x0, x5, 2
-	add	x26, x2, x0
-	tbz	x3, 10, .L1328
-	adrp	x3, .LANCHOR9
-	ldrb	w4, [x26, 2]
-	ldr	x6, [x3, #:lo12:.LANCHOR9]
-	ldr	w3, [x2, x0]
-	ldrh	w2, [x2, x0]
-	adrp	x0, .LC81
-	add	x0, x0, :lo12:.LC81
-	ldrh	w7, [x6, x5, lsl 1]
+	ldr	x2, [x29, 152]
+	ldr	x11, [x24, #:lo12:.LANCHOR7]
+	ldrh	w0, [x0, 584]
+	ldr	w2, [x2, #:lo12:.LANCHOR14]
+	mov	x1, x0
+	lsl	x10, x0, 2
+	add	x28, x11, x10
+	tbz	x2, 10, .L1396
+	adrp	x2, .LANCHOR9
+	ldrb	w6, [x28, 3]
+	ldrb	w4, [x28, 2]
+	ldr	x5, [x2, #:lo12:.LANCHOR9]
+	ldr	w3, [x11, x10]
+	ldrh	w2, [x11, x10]
+	stp	x10, x11, [x29, 112]
+	ldrh	w7, [x5, x0, lsl 1]
 	ubfx	x3, x3, 11, 8
-	ldrb	w6, [x26, 3]
 	ubfx	x5, x4, 5, 3
 	and	w2, w2, 2047
 	ubfx	x4, x4, 3, 2
+	adrp	x0, .LC87
+	add	x0, x0, :lo12:.LC87
 	bl	printf
-.L1328:
-	ldrb	w0, [x26, 2]
-	tbz	x0, 3, .L1329
-	ldrb	w0, [x26, 2]
+	ldp	x10, x11, [x29, 112]
+.L1396:
+	ldrb	w0, [x28, 2]
+	tbz	x0, 3, .L1397
+	ldr	x0, [x22, #:lo12:.LANCHOR110]
+	ldr	w1, [x11, x10]
+	ldrh	w2, [x0, 98]
+	adrp	x0, .LANCHOR153
+	ubfx	x1, x1, 11, 8
+	ldrh	w0, [x0, #:lo12:.LANCHOR153]
+	add	w0, w1, w0, lsr 2
+	cmp	w2, w0
+	ble	.L1397
+	ldrb	w0, [x28, 2]
 	and	w1, w0, 192
 	cmp	w1, 64
-	bne	.L1330
+	bne	.L1398
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w1, 0
 	mov	w2, 1
 	ldrh	w0, [x0, 584]
 	bl	gc_add_sblk
-	adrp	x0, .LANCHOR64+574
+	adrp	x0, .LANCHOR71+2110
 	mov	w1, 1
-	strh	w1, [x0, #:lo12:.LANCHOR64+574]
-.L1329:
-	ldr	w0, [x25, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1331
-	ldr	w6, [x29, 128]
+	strh	w1, [x0, #:lo12:.LANCHOR71+2110]
+.L1397:
+	ldr	x0, [x29, 152]
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 10, .L1399
 	adrp	x2, .LANCHOR9
 	ldr	x1, [x24, #:lo12:.LANCHOR7]
-	ldr	x7, [x2, #:lo12:.LANCHOR9]
+	uxtw	x6, w27
 	lsl	x0, x6, 2
+	ldr	x7, [x2, #:lo12:.LANCHOR9]
 	add	x5, x1, x0
 	ldr	w3, [x1, x0]
-	ldrh	w2, [x1, x0]
-	adrp	x0, .LC82
 	ldrh	w7, [x7, x6, lsl 1]
-	add	x0, x0, :lo12:.LC82
 	ldrb	w6, [x5, 3]
-	ubfx	x3, x3, 11, 8
-	ldr	w1, [x29, 128]
-	and	w2, w2, 2047
 	ldrb	w4, [x5, 2]
+	ubfx	x3, x3, 11, 8
+	ldrh	w2, [x1, x0]
+	adrp	x0, .LC88
+	mov	w1, w27
+	add	x0, x0, :lo12:.LC88
 	ubfx	x5, x4, 5, 3
+	and	w2, w2, 2047
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1331:
-	ldr	w0, [x25, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1332
-	ldr	w6, [x29, 136]
+.L1399:
+	ldr	x0, [x29, 152]
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 10, .L1400
+	ldr	w6, [x29, 128]
 	adrp	x2, .LANCHOR9
 	ldr	x1, [x24, #:lo12:.LANCHOR7]
 	ldr	x7, [x2, #:lo12:.LANCHOR9]
@@ -8036,152 +8507,153 @@ gc_static_wearleveling:
 	add	x5, x1, x0
 	ldr	w3, [x1, x0]
 	ldrh	w2, [x1, x0]
-	adrp	x0, .LC83
+	adrp	x0, .LC89
 	ldrh	w7, [x7, x6, lsl 1]
-	add	x0, x0, :lo12:.LC83
+	add	x0, x0, :lo12:.LC89
 	ldrb	w6, [x5, 3]
 	ubfx	x3, x3, 11, 8
-	ldr	w1, [x29, 136]
+	ldr	w1, [x29, 128]
 	and	w2, w2, 2047
 	ldrb	w4, [x5, 2]
 	ubfx	x5, x4, 5, 3
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1332:
-	ldr	x0, [x23, #:lo12:.LANCHOR104]
-	ldrh	w1, [x29, 156]
+.L1400:
+	ldr	x0, [x22, #:lo12:.LANCHOR110]
+	ldrh	w1, [x29, 148]
 	strh	w1, [x0, 96]
-	ldr	w1, [x29, 148]
-	strh	w22, [x0, 98]
+	ldr	w1, [x29, 136]
+	strh	w23, [x0, 98]
 	strh	w20, [x0, 92]
 	strh	w21, [x0, 94]
-	udiv	w3, w1, w27
-	ldr	w1, [x29, 152]
-	udiv	w4, w1, w28
+	udiv	w3, w1, w26
+	ldr	w1, [x29, 144]
+	udiv	w4, w1, w25
 	strh	w3, [x0, 88]
 	strh	w4, [x0, 90]
-	ldr	w0, [x25, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1333
-	adrp	x0, .LC84
+	ldr	x0, [x29, 152]
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 10, .L1401
+	adrp	x0, .LC90
 	and	w4, w4, 65535
 	and	w3, w3, 65535
-	mov	w2, w28
-	mov	w1, w27
-	add	x0, x0, :lo12:.LC84
+	mov	w2, w25
+	mov	w1, w26
+	add	x0, x0, :lo12:.LC90
 	bl	printf
-.L1333:
-	ldr	w0, [x25, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1334
-	adrp	x0, .LANCHOR149
-	ldr	w3, [x29, 156]
-	mov	w4, w22
+.L1401:
+	ldr	x0, [x29, 152]
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 10, .L1402
+	adrp	x0, .LANCHOR153
+	ldr	w3, [x29, 148]
+	mov	w4, w23
 	mov	w2, w21
-	ldrh	w6, [x0, #:lo12:.LANCHOR149]
-	adrp	x0, .LANCHOR150
+	ldrh	w6, [x0, #:lo12:.LANCHOR153]
+	adrp	x0, .LANCHOR152
 	mov	w1, w20
-	ldrh	w5, [x0, #:lo12:.LANCHOR150]
-	adrp	x0, .LC85
-	add	x0, x0, :lo12:.LC85
+	ldrh	w5, [x0, #:lo12:.LANCHOR152]
+	adrp	x0, .LC91
+	add	x0, x0, :lo12:.LC91
 	bl	printf
-.L1334:
-	sub	w0, w22, w21
-	str	w0, [x29, 148]
-	adrp	x0, .LANCHOR149
-	ldr	w1, [x29, 148]
-	ldrh	w0, [x0, #:lo12:.LANCHOR149]
+.L1402:
+	sub	w0, w23, w21
+	str	w0, [x29, 144]
+	adrp	x0, .LANCHOR153
+	ldr	w1, [x29, 144]
+	ldrh	w0, [x0, #:lo12:.LANCHOR153]
 	cmp	w1, w0
-	bgt	.L1335
-	adrp	x1, .LANCHOR150
-	ldr	w0, [x29, 156]
-	ldrh	w1, [x1, #:lo12:.LANCHOR150]
+	bgt	.L1403
+	adrp	x1, .LANCHOR152
+	ldr	w0, [x29, 148]
+	ldrh	w1, [x1, #:lo12:.LANCHOR152]
 	sub	w0, w0, w20
 	cmp	w0, w1
-	ble	.L1363
-.L1335:
+	ble	.L1432
+.L1403:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
-	adrp	x28, .LANCHOR64
-	add	x28, x28, :lo12:.LANCHOR64
-	mov	w27, 0
-	mov	w22, 0
-	ldrh	w26, [x0, 580]
-	ldr	x0, [x23, #:lo12:.LANCHOR104]
-	ldrh	w0, [x0, 134]
-	str	w0, [x29, 152]
+	adrp	x26, .LANCHOR71
+	add	x26, x26, :lo12:.LANCHOR71
+	mov	w25, 0
+	mov	w23, 0
+	ldrh	w28, [x0, 580]
+	ldr	x0, [x22, #:lo12:.LANCHOR110]
+	ldrh	w27, [x0, 134]
 	adrp	x0, .LANCHOR6
 	add	x0, x0, :lo12:.LANCHOR6
 	str	x0, [x29, 136]
-	adrp	x0, .LANCHOR150
-	add	x0, x0, :lo12:.LANCHOR150
+	adrp	x0, .LANCHOR152
+	add	x0, x0, :lo12:.LANCHOR152
 	str	x0, [x29, 128]
-.L1337:
+.L1405:
 	ldr	x0, [x29, 136]
-	ldr	w1, [x29, 152]
 	ldrh	w0, [x0]
-	cmp	w1, w0
-	bcc	.L1347
-.L1346:
+	cmp	w27, w0
+	bcc	.L1415
+.L1414:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
-	str	w26, [x0, 580]
-.L1336:
-	cbz	w21, .L1349
-	ldr	x2, [x23, #:lo12:.LANCHOR104]
+	str	w28, [x0, 580]
+.L1404:
+	cbz	w21, .L1417
+	ldr	x2, [x22, #:lo12:.LANCHOR110]
 	adrp	x0, .LANCHOR6
 	ldrh	w5, [x0, #:lo12:.LANCHOR6]
 	ldr	x0, [x24, #:lo12:.LANCHOR7]
 	ldrh	w1, [x2, 134]
 	add	x0, x0, x1, uxth 2
-.L1350:
+.L1418:
 	cmp	w1, w5
-	bcc	.L1352
+	bcc	.L1420
 	ldrh	w0, [x2, 72]
 	add	w0, w21, w0
 	strh	w0, [x2, 72]
 	ldrh	w0, [x2, 98]
 	cmp	w21, w0
-	bcs	.L1349
+	bcs	.L1417
 	sub	w21, w0, w21
 	strh	w21, [x2, 98]
-.L1349:
-	cbz	w20, .L1355
-	ldr	x2, [x23, #:lo12:.LANCHOR104]
+.L1417:
+	cbz	w20, .L1423
+	ldr	x2, [x22, #:lo12:.LANCHOR110]
 	adrp	x0, .LANCHOR6
 	ldrh	w6, [x0, #:lo12:.LANCHOR6]
 	ldr	x0, [x24, #:lo12:.LANCHOR7]
 	ldrh	w1, [x2, 134]
 	add	x0, x0, x1, uxth 2
-.L1356:
+.L1424:
 	cmp	w1, w6
-	bcc	.L1358
+	bcc	.L1426
 	ldrh	w0, [x2, 74]
 	add	w0, w20, w0
 	strh	w0, [x2, 74]
 	ldrh	w0, [x2, 96]
 	cmp	w20, w0
-	bcs	.L1355
+	bcs	.L1423
 	sub	w20, w0, w20
 	strh	w20, [x2, 96]
-.L1355:
+.L1423:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L1313
+	beq	.L1381
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR9]
-	ldrh	w2, [x2, x1]
-	adrp	x1, .LANCHOR87
-	ldrh	w1, [x1, #:lo12:.LANCHOR87]
-	cmp	w2, w1
-	bhi	.L1313
-	add	w22, w22, 1
+	ldr	x3, [x2, #:lo12:.LANCHOR9]
+	adrp	x2, .LANCHOR95
+	ldrh	w2, [x2, #:lo12:.LANCHOR95]
+	ldrh	w1, [x3, x1]
+	cmp	w1, w2, lsr 1
+	bhi	.L1381
+	add	w23, w23, 1
 	mov	w2, 1
 	mov	w1, 0
 	bl	gc_add_sblk
-.L1313:
-	add	w0, w22, w27
+.L1381:
+	add	w0, w23, w25
+.L1376:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -8189,245 +8661,247 @@ gc_static_wearleveling:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L1323:
-	uxtw	x7, w25
+.L1391:
+	uxtw	x7, w28
 	ldr	x6, [x24, #:lo12:.LANCHOR7]
 	lsl	x2, x7, 2
 	add	x11, x6, x2
 	ldrb	w0, [x11, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L1315
+	beq	.L1383
 	ubfx	x4, x0, 3, 2
-	tbz	x4, 0, .L1316
+	tbz	x4, 0, .L1384
 	ldr	w0, [x6, x2]
 	ldrh	w1, [x6, x2]
 	ubfx	x0, x0, 11, 8
 	and	w1, w1, 2047
-.L1317:
-	ldr	w3, [x29, 148]
-	add	w27, w27, 1
-	and	w27, w27, 65535
+.L1385:
+	ldr	w3, [x29, 136]
+	add	w26, w26, 1
+	and	w26, w26, 65535
 	cmp	w20, w1
 	add	w3, w3, w1
-	str	w3, [x29, 148]
-	bls	.L1361
+	str	w3, [x29, 136]
+	bls	.L1429
 	ldr	x3, [x19, #:lo12:.LANCHOR10]
 	mov	w20, w1
-	strh	w25, [x3, 586]
-.L1361:
-	ldr	w3, [x29, 156]
+	strh	w28, [x3, 586]
+.L1429:
+	ldr	w3, [x29, 148]
 	cmp	w3, w1
-	bcs	.L1320
-	str	w25, [x29, 128]
-	str	w1, [x29, 156]
-.L1320:
+	bcs	.L1388
+	mov	w27, w28
+	str	w1, [x29, 148]
+.L1388:
 	mov	w3, 65535
 	cmp	w0, w3
-	bne	.L1319
-.L1321:
+	bne	.L1387
+.L1389:
 	cmp	w0, 9
 	ccmp	w1, 9, 0, hi
-	bhi	.L1315
+	bhi	.L1383
 	ldr	w0, [x8]
-	tbz	x0, 8, .L1315
+	tbz	x0, 8, .L1383
 	adrp	x0, .LANCHOR9
 	ldr	w3, [x6, x2]
 	ldrh	w2, [x6, x2]
-	mov	w1, w25
+	mov	w1, w28
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrb	w6, [x11, 3]
 	ubfx	x3, x3, 11, 8
 	ldrb	w5, [x11, 2]
 	and	w2, w2, 2047
-	stp	x8, x10, [x29, 112]
+	str	x8, [x29, 120]
 	ldrh	w7, [x0, x7, lsl 1]
-	adrp	x0, .LC79
+	adrp	x0, .LC85
+	str	x10, [x29, 152]
 	ubfx	x5, x5, 5, 3
-	add	x0, x0, :lo12:.LC79
+	add	x0, x0, :lo12:.LC85
 	bl	printf
-	ldp	x8, x10, [x29, 112]
-.L1315:
-	add	w25, w25, 1
-	and	w25, w25, 65535
-	b	.L1314
-.L1316:
+	ldr	x8, [x29, 120]
+	ldr	x10, [x29, 152]
+.L1383:
+	add	w28, w28, 1
+	and	w28, w28, 65535
+	b	.L1382
+.L1384:
 	tst	w0, 24
-	bne	.L1318
+	bne	.L1386
 	ldrh	w1, [x6, x2]
 	mov	w0, 65535
 	and	w1, w1, 2047
-	b	.L1317
-.L1318:
+	b	.L1385
+.L1386:
 	ldr	w0, [x6, x2]
 	mov	w1, 65535
 	ubfx	x0, x0, 11, 8
-.L1319:
-	ldr	w3, [x29, 152]
-	add	w28, w28, 1
-	and	w28, w28, 65535
+.L1387:
+	ldr	w3, [x29, 144]
+	add	w25, w25, 1
+	and	w25, w25, 65535
 	cmp	w21, w0
 	add	w3, w3, w0
-	str	w3, [x29, 152]
-	bls	.L1322
+	str	w3, [x29, 144]
+	bls	.L1390
 	ldr	x3, [x19, #:lo12:.LANCHOR10]
 	mov	w21, w0
-	strh	w25, [x3, 584]
-.L1322:
-	cmp	w22, w0
-	bcs	.L1321
-	mov	w22, w0
-	str	w25, [x29, 136]
-	b	.L1321
-.L1327:
-	cbnz	w1, .L1326
+	strh	w28, [x3, 584]
+.L1390:
+	cmp	w23, w0
+	bcs	.L1389
+	mov	w23, w0
+	str	w28, [x29, 128]
+	b	.L1389
+.L1395:
+	cbnz	w3, .L1394
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
 	mov	w0, 65535
 	ldrh	w2, [x1, 590]
 	cmp	w2, w0
-	bne	.L1326
+	bne	.L1394
 	ldrh	w0, [x1, 586]
 	ldrh	w1, [x1, 588]
 	cmp	w1, w0
-	beq	.L1326
+	beq	.L1394
 	bl	zftl_remove_free_node
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldrh	w1, [x0, 586]
 	strh	w1, [x0, 590]
 	mov	w1, -1
 	strh	w1, [x0, 586]
-	b	.L1326
-.L1330:
+	b	.L1394
+.L1398:
 	and	w0, w0, 248
 	cmp	w0, 16
-	bne	.L1329
+	bne	.L1397
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
 	mov	w0, 65535
 	ldrh	w2, [x1, 588]
 	cmp	w2, w0
-	bne	.L1329
+	bne	.L1397
 	ldrh	w0, [x1, 584]
 	ldrh	w1, [x1, 590]
 	cmp	w1, w0
-	beq	.L1329
+	beq	.L1397
 	bl	zftl_remove_free_node
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldrh	w1, [x0, 584]
 	strh	w1, [x0, 588]
 	mov	w1, -1
 	strh	w1, [x0, 584]
-	b	.L1329
-.L1347:
-	add	w7, w26, 1
+	b	.L1397
+.L1415:
+	add	w7, w28, 1
 	ldr	x4, [x24, #:lo12:.LANCHOR7]
-	and	w26, w7, 65535
-	cmp	w0, w26
-	csel	w26, w26, wzr, hi
-	uxtw	x8, w26
+	and	w28, w7, 65535
+	cmp	w0, w28
+	csel	w28, w28, wzr, hi
+	uxtw	x8, w28
 	lsl	x3, x8, 2
 	add	x0, x4, x3
 	ldrb	w0, [x0, 2]
 	tst	w0, 192
-	beq	.L1339
+	beq	.L1407
 	and	w2, w0, 224
 	cmp	w2, 224
-	beq	.L1339
+	beq	.L1407
 	ubfx	x0, x0, 3, 2
 	and	w1, w0, 1
-	tbz	x0, 0, .L1340
+	tbz	x0, 0, .L1408
 	cmp	w2, 160
-.L1427:
-	bne	.L1342
-	adrp	x0, .LANCHOR149
-	ldr	w2, [x29, 148]
-	ldrh	w0, [x0, #:lo12:.LANCHOR149]
+.L1495:
+	bne	.L1410
+	adrp	x0, .LANCHOR153
+	ldr	w2, [x29, 144]
+	ldrh	w0, [x0, #:lo12:.LANCHOR153]
 	cmp	w2, w0
-	ble	.L1343
+	ble	.L1411
 	ldr	w0, [x4, x3]
 	ubfx	x0, x0, 11, 8
 	cmp	w0, w21
-	bls	.L1344
-	cbz	w1, .L1343
+	bls	.L1412
+	cbz	w1, .L1411
 	ldrh	w0, [x4, x3]
 	and	w0, w0, 2047
 	cmp	w0, w20
-	bgt	.L1343
-.L1344:
+	bgt	.L1411
+.L1412:
 	stp	x4, x8, [x29, 104]
 	mov	w2, 1
 	str	x3, [x29, 120]
 	mov	w1, 0
-	mov	w0, w26
+	mov	w0, w28
 	bl	gc_add_sblk
 	mov	w0, 1
-	strh	w0, [x28, 574]
-	ldr	w0, [x25, #:lo12:.LANCHOR14]
-	add	w22, w22, 1
+	strh	w0, [x26, 2110]
+	ldr	x0, [x29, 152]
+	add	w23, w23, 1
 	ldp	x4, x8, [x29, 104]
 	ldr	x3, [x29, 120]
-	tbz	x0, 10, .L1343
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 10, .L1411
 	adrp	x0, .LANCHOR9
 	ldr	w6, [x4, x3]
 	ldrh	w5, [x4, x3]
 	ldr	x1, [x0, #:lo12:.LANCHOR9]
 	ldr	x0, [x24, #:lo12:.LANCHOR7]
 	ubfx	x6, x6, 11, 8
-	ldrh	w4, [x28, 56]
+	ldrh	w4, [x26, 56]
 	and	w5, w5, 2047
 	add	x3, x0, x3
-	adrp	x0, .LC86
-	add	x0, x0, :lo12:.LC86
+	adrp	x0, .LC92
+	add	x0, x0, :lo12:.LC92
 	ldrb	w2, [x3, 2]
 	ldrh	w3, [x1, x8, lsl 1]
-	mov	w1, w26
+	mov	w1, w28
 	ubfx	x2, x2, 5, 3
-.L1428:
+.L1496:
 	bl	printf
-.L1343:
-	cmp	w22, 4
-	ccmp	w27, 4, 2, ls
-	bhi	.L1346
-.L1339:
-	ldr	w0, [x29, 152]
-	add	w0, w0, 1
-	and	w0, w0, 65535
-	str	w0, [x29, 152]
-	b	.L1337
-.L1340:
+.L1411:
+	cmp	w23, 4
+	ccmp	w25, 4, 2, ls
+	bhi	.L1414
+.L1407:
+	add	w27, w27, 1
+	and	w27, w27, 65535
+	b	.L1405
+.L1408:
 	cmp	w0, 2
-	b	.L1427
-.L1342:
+	b	.L1495
+.L1410:
 	ldr	x2, [x29, 128]
-	ldr	w0, [x29, 156]
+	ldr	w0, [x29, 148]
 	sub	w0, w0, w20
 	ldrh	w2, [x2]
 	cmp	w0, w2
-	ble	.L1343
+	ble	.L1411
 	ldrh	w0, [x4, x3]
 	add	w2, w20, 8
 	and	w0, w0, 2047
 	cmp	w0, w2
-	ble	.L1345
-	cbz	w1, .L1343
+	ble	.L1413
+	cbz	w1, .L1411
 	ldr	w0, [x4, x3]
 	add	w1, w21, 4
 	ubfx	x0, x0, 11, 8
 	cmp	w0, w1
-	bgt	.L1343
-.L1345:
+	bgt	.L1411
+.L1413:
 	stp	x4, x8, [x29, 104]
 	mov	w2, 1
 	str	x3, [x29, 120]
 	mov	w1, 0
-	mov	w0, w26
+	mov	w0, w28
 	bl	gc_add_sblk
 	mov	w0, 1
-	strh	w0, [x28, 574]
-	ldr	w0, [x25, #:lo12:.LANCHOR14]
-	add	w27, w27, 1
+	strh	w0, [x26, 2110]
+	ldr	x0, [x29, 152]
+	add	w25, w25, 1
 	ldp	x4, x8, [x29, 104]
 	ldr	x3, [x29, 120]
-	tbz	x0, 10, .L1343
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 10, .L1411
 	adrp	x0, .LANCHOR9
 	ldr	w6, [x4, x3]
 	ldrh	w5, [x4, x3]
@@ -8435,302 +8909,320 @@ gc_static_wearleveling:
 	ldr	x0, [x24, #:lo12:.LANCHOR7]
 	ubfx	x6, x6, 11, 8
 	and	w5, w5, 2047
-	ldrh	w4, [x28, 56]
+	ldrh	w4, [x26, 56]
 	add	x3, x0, x3
-	adrp	x0, .LC87
-	add	x0, x0, :lo12:.LC87
+	adrp	x0, .LC93
+	add	x0, x0, :lo12:.LC93
 	ldrb	w2, [x3, 2]
 	ldrh	w3, [x1, x8, lsl 1]
-	mov	w1, w26
+	mov	w1, w28
 	ubfx	x2, x2, 5, 3
-	b	.L1428
-.L1363:
-	mov	w27, 0
-	mov	w22, 0
-	b	.L1336
-.L1352:
+	b	.L1496
+.L1432:
+	mov	w25, 0
+	mov	w23, 0
+	b	.L1404
+.L1420:
 	ldr	w3, [x0]
 	ubfx	x4, x3, 11, 8
 	cmp	w21, w4
-	bhi	.L1351
+	bhi	.L1419
 	ldrb	w6, [x0, 2]
 	tst	w6, 24
-	beq	.L1351
+	beq	.L1419
 	sub	w4, w4, w21
 	bfi	w3, w4, 11, 8
 	str	w3, [x0]
-.L1351:
+.L1419:
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 65535
-	b	.L1350
-.L1358:
+	b	.L1418
+.L1426:
 	ldrh	w3, [x0]
 	and	w4, w3, 2047
 	cmp	w4, w20
-	blt	.L1357
+	blt	.L1425
 	ldrb	w5, [x0, 2]
 	and	w5, w5, 24
 	cmp	w5, 16
-	beq	.L1357
+	beq	.L1425
 	sub	w4, w4, w20
 	bfi	w3, w4, 0, 11
 	strh	w3, [x0]
-.L1357:
+.L1425:
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 65535
-	b	.L1356
-.L1362:
-	mov	w27, 0
-	mov	w22, 0
-	b	.L1313
+	b	.L1424
+.L1431:
+	mov	w25, 0
+	mov	w23, 0
+	b	.L1381
+.L1430:
+	mov	w0, 0
+	b	.L1376
 	.size	gc_static_wearleveling, .-gc_static_wearleveling
 	.section	.text.zftl_sblk_list_init,"ax",@progbits
 	.align	2
 	.global	zftl_sblk_list_init
 	.type	zftl_sblk_list_init, %function
 zftl_sblk_list_init:
-	stp	x29, x30, [sp, -192]!
+	stp	x29, x30, [sp, -208]!
+	adrp	x8, .LANCHOR4
 	mov	w0, 6
 	mov	w1, 0
 	add	x29, sp, 0
 	stp	x27, x28, [sp, 80]
-	adrp	x27, .LANCHOR6
-	adrp	x28, .LANCHOR4
+	adrp	x28, .LANCHOR6
 	stp	x19, x20, [sp, 16]
-	ldrh	w2, [x27, #:lo12:.LANCHOR6]
-	adrp	x20, .LANCHOR94
+	adrp	x20, .LANCHOR99
+	ldrh	w2, [x28, #:lo12:.LANCHOR6]
+	mov	w27, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x19, .LANCHOR90
+	adrp	x22, .LANCHOR97
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR101
+	adrp	x21, .LANCHOR93
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR104
+	adrp	x26, .LANCHOR110
 	mul	w2, w2, w0
-	ldr	x0, [x28, #:lo12:.LANCHOR4]
-	adrp	x24, .LANCHOR97
-	adrp	x23, .LANCHOR99
-	adrp	x21, .LANCHOR92
+	ldr	x0, [x8, #:lo12:.LANCHOR4]
+	str	x8, [x29, 192]
+	adrp	x25, .LANCHOR103
+	adrp	x24, .LANCHOR105
+	adrp	x23, .LANCHOR107
 	bl	ftl_memset
-	str	x28, [x29, 168]
-	adrp	x0, .LANCHOR103
-	adrp	x2, .LANCHOR80
-	adrp	x3, .LANCHOR79
-	mov	w1, 16
-	strh	w1, [x0, #:lo12:.LANCHOR103]
-	adrp	x10, .LANCHOR98
-	ldrb	w0, [x2, #:lo12:.LANCHOR80]
-	adrp	x8, .LANCHOR100
-	ldrh	w1, [x3, #:lo12:.LANCHOR79]
-	adrp	x7, .LANCHOR102
-	adrp	x6, .LANCHOR83
+	strh	wzr, [x25, #:lo12:.LANCHOR103]
+	adrp	x0, .LANCHOR109
+	adrp	x3, .LANCHOR80
+	adrp	x2, .LANCHOR86
+	mov	w1, 32
+	strh	w1, [x0, #:lo12:.LANCHOR109]
+	adrp	x11, .LANCHOR104
+	ldrb	w0, [x3, #:lo12:.LANCHOR80]
+	adrp	x10, .LANCHOR106
+	ldrh	w1, [x2, #:lo12:.LANCHOR86]
+	adrp	x7, .LANCHOR108
+	adrp	x6, .LANCHOR89
 	adrp	x5, .LANCHOR12
-	adrp	x4, .LANCHOR82
-	str	xzr, [x10, #:lo12:.LANCHOR98]
-	str	xzr, [x8, #:lo12:.LANCHOR100]
-	adrp	x28, .LANCHOR7
+	adrp	x4, .LANCHOR88
+	ldr	x8, [x29, 192]
+	str	xzr, [x11, #:lo12:.LANCHOR104]
 	mul	w1, w0, w1
 	mov	w0, 32768
-	str	xzr, [x7, #:lo12:.LANCHOR102]
-	str	xzr, [x6, #:lo12:.LANCHOR83]
-	str	xzr, [x5, #:lo12:.LANCHOR12]
+	str	xzr, [x10, #:lo12:.LANCHOR106]
+	str	xzr, [x7, #:lo12:.LANCHOR108]
+	str	xzr, [x6, #:lo12:.LANCHOR89]
 	sdiv	w0, w0, w1
-	str	xzr, [x4, #:lo12:.LANCHOR82]
-	strh	wzr, [x24, #:lo12:.LANCHOR97]
-	strh	wzr, [x23, #:lo12:.LANCHOR99]
-	strh	wzr, [x22, #:lo12:.LANCHOR101]
+	str	xzr, [x5, #:lo12:.LANCHOR12]
+	str	xzr, [x4, #:lo12:.LANCHOR88]
+	strh	wzr, [x24, #:lo12:.LANCHOR105]
+	strh	wzr, [x23, #:lo12:.LANCHOR107]
 	sxth	w0, w0
-	str	w0, [x29, 188]
-	ldr	x0, [x25, #:lo12:.LANCHOR104]
-	strh	wzr, [x21, #:lo12:.LANCHOR92]
-	strh	wzr, [x20, #:lo12:.LANCHOR94]
-	strh	wzr, [x19, #:lo12:.LANCHOR90]
+	str	w0, [x29, 204]
+	ldr	x0, [x26, #:lo12:.LANCHOR110]
+	strh	wzr, [x22, #:lo12:.LANCHOR97]
+	strh	wzr, [x21, #:lo12:.LANCHOR93]
+	strh	wzr, [x20, #:lo12:.LANCHOR99]
 	strh	wzr, [x0, 146]
-	ldrsh	w26, [x0, 134]
-	add	x0, x27, :lo12:.LANCHOR6
-	adrp	x27, .LC88
-	add	x27, x27, :lo12:.LC88
-	stp	x3, x2, [x29, 104]
-	stp	x4, x5, [x29, 120]
-	stp	x6, x7, [x29, 136]
-	stp	x8, x10, [x29, 152]
-	str	x0, [x29, 176]
-.L1430:
-	ldr	x0, [x29, 176]
+	ldrsh	w19, [x0, 134]
+	add	x0, x28, :lo12:.LANCHOR6
+	str	x0, [x29, 192]
+	adrp	x0, .LANCHOR154
+	add	x0, x0, :lo12:.LANCHOR154
+	adrp	x28, .LC0
+	str	x0, [x29, 112]
+	add	x0, x28, :lo12:.LC0
+	stp	x2, x3, [x29, 120]
+	stp	x4, x5, [x29, 136]
+	stp	x6, x7, [x29, 152]
+	stp	x10, x11, [x29, 168]
+	str	x8, [x29, 184]
+	str	x0, [x29, 104]
+.L1498:
+	ldr	x0, [x29, 192]
 	ldrh	w0, [x0]
-	cmp	w26, w0
-	blt	.L1446
-	ldr	x0, [x25, #:lo12:.LANCHOR104]
-	ldrh	w1, [x24, #:lo12:.LANCHOR97]
-	ldp	x25, x26, [sp, 64]
+	cmp	w19, w0
+	blt	.L1515
+	ldr	x0, [x26, #:lo12:.LANCHOR110]
+	ldrh	w1, [x25, #:lo12:.LANCHOR103]
+	ldp	x27, x28, [sp, 80]
 	strh	w1, [x0, 114]
-	ldrh	w1, [x23, #:lo12:.LANCHOR99]
+	ldrh	w1, [x24, #:lo12:.LANCHOR105]
 	strh	w1, [x0, 118]
-	ldrh	w1, [x22, #:lo12:.LANCHOR101]
+	ldrh	w1, [x23, #:lo12:.LANCHOR107]
 	strh	w1, [x0, 116]
-	ldrh	w1, [x21, #:lo12:.LANCHOR92]
+	ldrh	w1, [x22, #:lo12:.LANCHOR97]
 	strh	w1, [x0, 122]
-	ldrh	w1, [x20, #:lo12:.LANCHOR94]
+	ldrh	w1, [x21, #:lo12:.LANCHOR93]
 	strh	w1, [x0, 120]
-	ldrh	w1, [x19, #:lo12:.LANCHOR90]
+	ldrh	w1, [x20, #:lo12:.LANCHOR99]
 	strh	w1, [x0, 124]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 192
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 208
 	ret
-.L1446:
-	ldr	x4, [x28, #:lo12:.LANCHOR7]
-	sxtw	x2, w26
-	add	x4, x4, x2, lsl 2
-	ldrb	w6, [x4, 3]
-	cbz	w6, .L1447
-	ldr	x0, [x29, 112]
+.L1515:
+	adrp	x0, .LANCHOR7
+	sxtw	x2, w19
+	ldr	x3, [x0, #:lo12:.LANCHOR7]
+	add	x28, x3, x2, lsl 2
+	ldrb	w5, [x28, 3]
+	cbz	w5, .L1516
+	ldr	x0, [x29, 128]
 	mov	w1, 0
-	ldr	x7, [x25, #:lo12:.LANCHOR104]
-	ldrb	w8, [x0, #:lo12:.LANCHOR80]
-	ldr	x0, [x29, 104]
-	ldrh	w10, [x0, #:lo12:.LANCHOR79]
+	ldr	x6, [x26, #:lo12:.LANCHOR110]
+	ldrb	w7, [x0, #:lo12:.LANCHOR80]
+	ldr	x0, [x29, 120]
+	ldrh	w8, [x0, #:lo12:.LANCHOR86]
 	mov	w0, 0
-.L1432:
-	cmp	w1, w8
-	blt	.L1435
-	cbz	w0, .L1436
+.L1500:
+	cmp	w1, w7
+	blt	.L1503
+	cbz	w0, .L1504
 	mov	w1, 32768
 	sdiv	w0, w1, w0
 	add	w0, w0, 1
 	sxth	w0, w0
-.L1431:
-	ldr	x3, [x29, 168]
+.L1499:
+	ldr	x3, [x29, 184]
 	mov	w1, 6
-	smull	x1, w26, w1
-	ldr	x5, [x3, #:lo12:.LANCHOR4]
-	add	x6, x5, x1
-	strh	w0, [x6, 4]
+	smull	x1, w19, w1
+	ldr	x4, [x3, #:lo12:.LANCHOR4]
+	add	x5, x4, x1
+	strh	w0, [x5, 4]
 	mov	w0, -1
-	strh	w0, [x6, 2]
-	strh	w0, [x5, x1]
-	mov	w5, 224
-	ldrb	w1, [x4, 2]
-	and	w0, w1, 224
+	strh	w0, [x5, 2]
+	strh	w0, [x4, x1]
+	mov	w1, 224
+	ldrb	w0, [x28, 2]
+	and	w0, w0, 224
 	cmp	w0, 32
-	ccmp	w0, w5, 4, ne
-	beq	.L1437
-	adrp	x5, .LANCHOR10
-	ldr	x5, [x5, #:lo12:.LANCHOR10]
-	ldrh	w6, [x5, 16]
-	cmp	w26, w6
-	beq	.L1437
-	ldrh	w6, [x5, 48]
-	cmp	w26, w6
-	beq	.L1437
-	ldrh	w5, [x5, 80]
-	cmp	w26, w5
-	beq	.L1437
+	ccmp	w0, w1, 4, ne
+	beq	.L1505
+	adrp	x1, .LANCHOR10
+	ldr	x1, [x1, #:lo12:.LANCHOR10]
+	ldrh	w4, [x1, 16]
+	cmp	w19, w4
+	beq	.L1505
+	ldrh	w4, [x1, 48]
+	cmp	w19, w4
+	beq	.L1505
+	ldrh	w1, [x1, 80]
+	cmp	w19, w1
+	beq	.L1505
 	cmp	w0, 64
-	bne	.L1438
-	ldr	x0, [x29, 128]
-	add	x2, x21, :lo12:.LANCHOR92
-	mov	w1, w26
+	bne	.L1506
+	ldr	x0, [x29, 144]
+	add	x2, x22, :lo12:.LANCHOR97
+	mov	w1, w19
 	add	x0, x0, :lo12:.LANCHOR12
-.L1450:
+.L1522:
 	bl	_insert_data_list
-.L1437:
-	add	w3, w26, 1
-	sxth	w26, w3
-	b	.L1430
-.L1435:
-	asr	w5, w6, w1
-	tbnz	x5, 0, .L1433
-	add	w0, w10, w0
+.L1505:
+	add	w19, w19, 1
+	sxth	w19, w19
+	b	.L1498
+.L1503:
+	asr	w4, w5, w1
+	tbnz	x4, 0, .L1501
+	add	w0, w8, w0
 	sxth	w0, w0
-.L1434:
+.L1502:
 	add	w1, w1, 1
-	b	.L1432
-.L1433:
-	ldrh	w5, [x7, 146]
-	add	w5, w5, 1
-	strh	w5, [x7, 146]
-	b	.L1434
-.L1436:
-	ldrb	w1, [x4, 2]
-	mov	w5, -1
+	b	.L1500
+.L1501:
+	ldrh	w4, [x6, 146]
+	add	w4, w4, 1
+	strh	w4, [x6, 146]
+	b	.L1502
+.L1504:
+	ldrb	w1, [x28, 2]
+	mov	w4, -1
 	orr	w1, w1, -32
-	strb	w1, [x4, 2]
+	strb	w1, [x28, 2]
 	adrp	x1, .LANCHOR9
 	ldr	x1, [x1, #:lo12:.LANCHOR9]
-	strh	w5, [x1, x2, lsl 1]
-	b	.L1431
-.L1447:
-	ldr	w0, [x29, 188]
-	b	.L1431
-.L1438:
+	strh	w4, [x1, x2, lsl 1]
+	b	.L1499
+.L1516:
+	ldr	w0, [x29, 204]
+	b	.L1499
+.L1506:
 	cmp	w0, 96
-	bne	.L1439
-	ldr	x0, [x29, 136]
-	add	x2, x19, :lo12:.LANCHOR90
-	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR83
-	b	.L1450
-.L1439:
+	bne	.L1507
+	ldr	x0, [x29, 152]
+	add	x2, x20, :lo12:.LANCHOR99
+	mov	w1, w19
+	add	x0, x0, :lo12:.LANCHOR89
+	b	.L1522
+.L1507:
 	cmp	w0, 160
-	bne	.L1440
-	ldr	x0, [x29, 120]
-	add	x2, x20, :lo12:.LANCHOR94
-	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR82
-	b	.L1450
-.L1440:
-	cbnz	w0, .L1437
+	bne	.L1508
+	ldr	x0, [x29, 136]
+	add	x2, x21, :lo12:.LANCHOR93
+	mov	w1, w19
+	add	x0, x0, :lo12:.LANCHOR88
+	b	.L1522
+.L1508:
+	cbnz	w0, .L1505
 	adrp	x0, .LANCHOR9
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w2, [x0, x2, lsl 1]
-	cbz	w2, .L1441
-	str	x4, [x29, 96]
-	mov	w1, w26
-	mov	x0, x27
+	cbz	w2, .L1509
+	cmp	w27, 2
+	bgt	.L1510
+	mov	w1, w19
+	adrp	x0, .LC94
+	add	x0, x0, :lo12:.LC94
 	bl	printf
-	ldr	x4, [x29, 96]
-	ldrb	w0, [x4, 2]
-	tbz	x0, 4, .L1442
+	ldrb	w0, [x28, 2]
+	add	w27, w27, 1
+	sxth	w27, w27
+	tbz	x0, 4, .L1511
 	mov	w1, 5
-.L1449:
+.L1521:
 	bfi	w0, w1, 5, 3
-	strb	w0, [x4, 2]
+	strb	w0, [x28, 2]
 	mov	w2, 0
 	mov	w1, 1
-	mov	w0, w26
+	mov	w0, w19
 	bl	gc_add_sblk
-	b	.L1437
-.L1442:
+	b	.L1505
+.L1511:
 	mov	w1, 2
-	b	.L1449
-.L1441:
-	ands	w1, w1, 24
-	bne	.L1444
-	ldr	x0, [x29, 160]
-	add	x2, x24, :lo12:.LANCHOR97
-	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR98
-.L1451:
+	b	.L1521
+.L1510:
+	ldp	x0, x1, [x29, 104]
+	mov	w2, 651
+	bl	printf
+.L1509:
+	ldrb	w0, [x28, 2]
+	ands	w0, w0, 24
+	bne	.L1513
+	ldr	x0, [x29, 176]
+	add	x2, x25, :lo12:.LANCHOR103
+	mov	w1, w19
+	add	x0, x0, :lo12:.LANCHOR104
+.L1523:
 	bl	_insert_free_list
-	b	.L1437
-.L1444:
-	cmp	w1, 16
-	bne	.L1445
-	ldr	x0, [x29, 152]
-	add	x2, x23, :lo12:.LANCHOR99
-	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR100
-	b	.L1451
-.L1445:
-	ldr	x0, [x29, 144]
-	add	x2, x22, :lo12:.LANCHOR101
-	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR102
-	b	.L1451
+	b	.L1505
+.L1513:
+	cmp	w0, 16
+	bne	.L1514
+	ldr	x0, [x29, 168]
+	add	x2, x24, :lo12:.LANCHOR105
+	mov	w1, w19
+	add	x0, x0, :lo12:.LANCHOR106
+	b	.L1523
+.L1514:
+	ldr	x0, [x29, 160]
+	add	x2, x23, :lo12:.LANCHOR107
+	mov	w1, w19
+	add	x0, x0, :lo12:.LANCHOR108
+	b	.L1523
 	.size	zftl_sblk_list_init, .-zftl_sblk_list_init
 	.section	.text.ftl_open_sblk_init,"ax",@progbits
 	.align	2
@@ -8739,51 +9231,55 @@ zftl_sblk_list_init:
 ftl_open_sblk_init:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR80
 	stp	x21, x22, [sp, 32]
-	mov	x19, x0
+	adrp	x21, .LANCHOR80
 	stp	x23, x24, [sp, 48]
-	adrp	x21, .LC76
-	adrp	x23, .LANCHOR87
-	mov	w22, w1
-	add	x23, x23, :lo12:.LANCHOR87
-	add	x20, x20, :lo12:.LANCHOR80
-	add	x21, x21, :lo12:.LC76
+	adrp	x22, .LC82
+	stp	x19, x20, [sp, 16]
+	adrp	x24, .LANCHOR95
+	mov	x19, x0
+	mov	w23, w1
+	add	x24, x24, :lo12:.LANCHOR95
+	add	x21, x21, :lo12:.LANCHOR80
+	add	x22, x22, :lo12:.LC82
 	stp	x25, x26, [sp, 64]
-.L1453:
-.L1456:
-	mov	w0, w22
+.L1525:
+	mov	w25, 65535
+.L1526:
+	mov	w0, w23
 	bl	ftl_alloc_sblk
+	and	w20, w0, 65535
+	cmp	w20, w25
+	beq	.L1526
 	mov	w1, 0
-	and	w24, w0, 65535
+	mov	w0, w20
 	bl	ftl_erase_sblk
 	add	x1, x19, 16
-	mov	w0, w24
+	mov	w0, w20
 	bl	ftl_get_blk_list_in_sblk
 	and	w0, w0, 255
-	ldrh	w1, [x23]
-	cmp	w22, 2
+	ldrh	w1, [x24]
+	cmp	w23, 2
 	strb	w0, [x19, 9]
-	strh	w24, [x19]
+	strh	w20, [x19]
 	strh	wzr, [x19, 2]
 	mul	w0, w1, w0
 	strb	wzr, [x19, 5]
 	strh	w0, [x19, 6]
 	strh	wzr, [x19, 10]
-	strb	w22, [x19, 4]
-	beq	.L1457
-	ldrb	w0, [x20]
+	strb	w23, [x19, 4]
+	beq	.L1529
+	ldrb	w0, [x21]
 	mul	w0, w1, w0
 	and	w0, w0, 65535
-.L1454:
-	ldrb	w2, [x20]
+.L1527:
+	ldrb	w2, [x21]
 	adrp	x26, .LANCHOR9
 	strh	w0, [x19, 12]
-	ubfiz	x25, x24, 1, 16
+	ubfiz	x25, x20, 1, 16
 	mul	w2, w2, w1
-	adrp	x1, .LANCHOR111
-	ldr	x3, [x1, #:lo12:.LANCHOR111]
+	adrp	x1, .LANCHOR117
+	ldr	x3, [x1, #:lo12:.LANCHOR117]
 	mov	w1, 255
 	lsl	w2, w2, 2
 	add	x0, x3, x0, uxth 2
@@ -8792,20 +9288,20 @@ ftl_open_sblk_init:
 	ldrh	w1, [x19, 6]
 	strh	w1, [x0, x25]
 	ldrb	w0, [x19, 9]
-	cbnz	w0, .L1452
-	mov	w1, w24
-	mov	x0, x21
+	cbnz	w0, .L1524
+	mov	w1, w20
+	mov	x0, x22
 	bl	printf
 	ldr	x0, [x26, #:lo12:.LANCHOR9]
 	mov	w1, -1
 	strh	w1, [x0, x25]
 	mov	w0, 7
 	strb	w0, [x19, 4]
-	b	.L1456
-.L1457:
+	b	.L1525
+.L1529:
 	mov	w0, 0
-	b	.L1454
-.L1452:
+	b	.L1527
+.L1524:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -8819,50 +9315,50 @@ ftl_open_sblk_init:
 	.type	pm_free_sblk, %function
 pm_free_sblk:
 	stp	x29, x30, [sp, -384]!
-	adrp	x0, .LANCHOR151
+	adrp	x0, .LANCHOR155
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	ldrh	w1, [x0, #:lo12:.LANCHOR151]
+	ldrh	w1, [x0, #:lo12:.LANCHOR155]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	cmp	w1, 128
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	bls	.L1460
-	adrp	x1, .LANCHOR152
+	bls	.L1533
+	adrp	x1, .LANCHOR156
 	adrp	x0, .LC0
-	mov	w2, 88
-	add	x1, x1, :lo12:.LANCHOR152
+	mov	w2, 94
+	add	x1, x1, :lo12:.LANCHOR156
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1460:
-	adrp	x5, .LANCHOR104
+.L1533:
+	adrp	x5, .LANCHOR110
 	mov	x26, x5
-	ldrh	w3, [x19, #:lo12:.LANCHOR151]
+	ldrh	w3, [x19, #:lo12:.LANCHOR155]
 	mov	w1, 0
-	ldr	x0, [x5, #:lo12:.LANCHOR104]
+	ldr	x0, [x5, #:lo12:.LANCHOR110]
 	mov	w19, 0
 	mov	w4, 65535
 	add	x0, x0, 416
 	ldrh	w2, [x0, 272]
-.L1463:
+.L1536:
 	ldrh	w6, [x0]
 	cmp	w6, w4
-	beq	.L1461
+	beq	.L1534
 	add	w1, w1, 1
 	and	w1, w1, 65535
-.L1461:
+.L1534:
 	cmp	w1, w2
-	bcs	.L1462
+	bcs	.L1535
 	cmp	w1, w3
-	bcs	.L1462
+	bcs	.L1535
 	add	w19, w19, 1
 	add	x0, x0, 2
 	and	w19, w19, 65535
 	cmp	w19, 128
-	bne	.L1463
-.L1462:
+	bne	.L1536
+.L1535:
 	add	w19, w19, 1
 	mov	w0, 128
 	and	w19, w19, 65535
@@ -8872,16 +9368,16 @@ pm_free_sblk:
 	csel	w19, w19, w0, ne
 	mov	w1, 0
 	mov	x0, x22
-	adrp	x23, .LANCHOR69
+	adrp	x23, .LANCHOR76
 	bl	ftl_memset
-	adrp	x0, .LANCHOR68
-	ldr	x6, [x26, #:lo12:.LANCHOR104]
+	adrp	x0, .LANCHOR75
+	ldr	x6, [x26, #:lo12:.LANCHOR110]
 	mov	w2, 24
-	ldrb	w11, [x23, #:lo12:.LANCHOR69]
-	ldrh	w10, [x0, #:lo12:.LANCHOR68]
-	adrp	x0, .LANCHOR31
+	ldrb	w11, [x23, #:lo12:.LANCHOR76]
+	ldrh	w10, [x0, #:lo12:.LANCHOR75]
+	adrp	x0, .LANCHOR32
 	add	x4, x6, 704
-	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	ldrb	w0, [x0, #:lo12:.LANCHOR32]
 	ldrh	w1, [x6, 698]
 	sub	w2, w2, w0
 	sub	w0, w2, w10
@@ -8890,25 +9386,25 @@ pm_free_sblk:
 	add	x1, x6, x1, lsl 2
 	lsl	w2, w2, w0
 	sub	w2, w2, #1
-.L1465:
+.L1538:
 	cmp	x1, x4
-	bne	.L1468
+	bne	.L1541
 	adrp	x24, .LANCHOR80
-	adrp	x25, .LANCHOR87
-	adrp	x27, .LC89
+	adrp	x25, .LANCHOR95
+	adrp	x27, .LC95
 	adrp	x28, .LANCHOR14
 	ldrb	w21, [x24, #:lo12:.LANCHOR80]
-	add	x23, x23, :lo12:.LANCHOR69
-	ldrh	w0, [x25, #:lo12:.LANCHOR87]
-	add	x27, x27, :lo12:.LC89
+	add	x23, x23, :lo12:.LANCHOR76
+	ldrh	w0, [x25, #:lo12:.LANCHOR95]
+	add	x27, x27, :lo12:.LC95
 	add	x28, x28, :lo12:.LANCHOR14
 	mov	x20, 0
 	mov	w7, 65535
 	str	wzr, [x29, 124]
 	mul	w21, w21, w0
 	and	w21, w21, 65535
-.L1474:
-	ldr	x0, [x26, #:lo12:.LANCHOR104]
+.L1547:
+	ldr	x0, [x26, #:lo12:.LANCHOR110]
 	and	w6, w20, 65535
 	ldrb	w2, [x23]
 	mov	w8, w20
@@ -8917,27 +9413,27 @@ pm_free_sblk:
 	ldrh	w1, [x0, 692]
 	sdiv	w1, w1, w2
 	cmp	w1, w3
-	bne	.L1469
+	bne	.L1542
 	ldrb	w1, [x24, #:lo12:.LANCHOR80]
-	ldrh	w2, [x25, #:lo12:.LANCHOR87]
+	ldrh	w2, [x25, #:lo12:.LANCHOR95]
 	mul	w1, w1, w2
 	strh	w1, [x22, x20, lsl 1]
-.L1469:
+.L1542:
 	ldrh	w2, [x22, x20, lsl 1]
 	cmp	w2, w21
-	bcs	.L1470
+	bcs	.L1543
 	cmp	w2, 0
 	ldr	w1, [x29, 124]
 	csel	w21, w21, w2, eq
 	csel	w1, w1, w6, eq
 	str	w1, [x29, 124]
-.L1470:
+.L1543:
 	ldrh	w1, [x0, 74]
 	cmp	w1, 2
-	bls	.L1471
+	bls	.L1544
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L1471
+	beq	.L1544
 	adrp	x4, .LANCHOR7
 	ubfiz	x1, x3, 2, 16
 	ldrh	w0, [x0, 92]
@@ -8946,7 +9442,7 @@ pm_free_sblk:
 	ldrh	w4, [x4, x1]
 	and	w4, w4, 2047
 	cmp	w4, w0
-	bgt	.L1471
+	bgt	.L1544
 	mov	w1, w8
 	str	w6, [x29, 104]
 	str	w8, [x29, 112]
@@ -8955,36 +9451,36 @@ pm_free_sblk:
 	ldr	w6, [x29, 104]
 	ldr	w8, [x29, 112]
 	mov	w7, w6
-.L1471:
+.L1544:
 	ldrh	w0, [x22, x20, lsl 1]
-	cbnz	w0, .L1472
-	ldr	x0, [x26, #:lo12:.LANCHOR104]
+	cbnz	w0, .L1545
+	ldr	x0, [x26, #:lo12:.LANCHOR110]
 	sxtw	x6, w8
 	add	x1, x6, 208
 	ldrh	w3, [x0, x1, lsl 1]
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L1472
+	beq	.L1545
 	ldr	w1, [x28]
-	tbz	x1, 12, .L1473
+	tbz	x1, 12, .L1546
 	ldrh	w4, [x0, 688]
 	mov	w2, 0
 	str	x6, [x29, 104]
 	mov	w1, w8
 	str	w7, [x29, 112]
-	adrp	x0, .LC90
-	add	x0, x0, :lo12:.LC90
+	adrp	x0, .LC96
+	add	x0, x0, :lo12:.LC96
 	bl	printf
 	ldr	w7, [x29, 112]
 	ldr	x6, [x29, 104]
-.L1473:
-	ldr	x0, [x26, #:lo12:.LANCHOR104]
+.L1546:
+	ldr	x0, [x26, #:lo12:.LANCHOR110]
 	add	x6, x6, 208
 	str	w7, [x29, 104]
 	str	x6, [x29, 112]
 	ldrh	w0, [x0, x6, lsl 1]
 	bl	ftl_free_sblk
-	ldr	x0, [x26, #:lo12:.LANCHOR104]
+	ldr	x0, [x26, #:lo12:.LANCHOR110]
 	mov	w1, -1
 	ldr	x6, [x29, 112]
 	ldr	w7, [x29, 104]
@@ -8992,10 +9488,10 @@ pm_free_sblk:
 	ldrh	w1, [x0, 688]
 	sub	w1, w1, #1
 	strh	w1, [x0, 688]
-.L1472:
+.L1545:
 	add	x20, x20, 1
 	cmp	w19, w20, uxth
-	bhi	.L1474
+	bhi	.L1547
 	mov	w0, 65535
 	cmp	w7, w0
 	ldr	w0, [x29, 124]
@@ -9007,7 +9503,7 @@ pm_free_sblk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 384
 	ret
-.L1468:
+.L1541:
 	ldr	w0, [x4]
 	add	x7, x6, 416
 	mov	x3, 0
@@ -9015,20 +9511,20 @@ pm_free_sblk:
 	and	w0, w0, w2
 	udiv	w0, w0, w11
 	and	w0, w0, 65535
-.L1467:
+.L1540:
 	ldrh	w8, [x7]
 	cmp	w8, w0
-	bne	.L1466
+	bne	.L1539
 	ldrh	w8, [x22, x3, lsl 1]
 	add	w8, w8, 1
 	strh	w8, [x22, x3, lsl 1]
-.L1466:
+.L1539:
 	add	x3, x3, 1
 	add	x7, x7, 2
 	cmp	w19, w3, uxth
-	bhi	.L1467
+	bhi	.L1540
 	add	x4, x4, 4
-	b	.L1465
+	b	.L1538
 	.size	pm_free_sblk, .-pm_free_sblk
 	.section	.text.ftl_memcpy,"ax",@progbits
 	.align	2
@@ -9048,14 +9544,14 @@ flash_info_data_init:
 	add	x29, sp, 0
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	str	x19, [sp, 16]
-	tbz	x0, 12, .L1487
-	adrp	x2, .LANCHOR153
-	adrp	x0, .LC91
-	add	x2, x2, :lo12:.LANCHOR153
-	mov	w1, 105
-	add	x0, x0, :lo12:.LC91
+	tbz	x0, 12, .L1560
+	adrp	x2, .LANCHOR157
+	adrp	x0, .LC97
+	add	x2, x2, :lo12:.LANCHOR157
+	mov	w1, 119
+	add	x0, x0, :lo12:.LC97
 	bl	printf
-.L1487:
+.L1560:
 	adrp	x19, .LANCHOR27
 	mov	w2, 2048
 	mov	w1, 0
@@ -9077,9 +9573,9 @@ flash_info_data_init:
 	ldr	x0, [x19, #:lo12:.LANCHOR27]
 	mov	w2, 32
 	ldr	x19, [sp, 16]
-	adrp	x1, .LANCHOR32
+	adrp	x1, .LANCHOR33
 	ldp	x29, x30, [sp], 32
-	add	x1, x1, :lo12:.LANCHOR32
+	add	x1, x1, :lo12:.LANCHOR33
 	add	x0, x0, 48
 	b	ftl_memcpy
 	.size	flash_info_data_init, .-flash_info_data_init
@@ -9089,15 +9585,15 @@ flash_info_data_init:
 	.type	ftl_memcpy32, %function
 ftl_memcpy32:
 	mov	x3, 0
-.L1493:
+.L1566:
 	cmp	w2, w3
-	bhi	.L1494
+	bhi	.L1567
 	ret
-.L1494:
+.L1567:
 	ldr	w4, [x1, x3, lsl 2]
 	str	w4, [x0, x3, lsl 2]
 	add	x3, x3, 1
-	b	.L1493
+	b	.L1566
 	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.ftl_memcmp,"ax",@progbits
 	.align	2
@@ -9138,14 +9634,14 @@ nandc_init:
 	mov	x19, x0
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
 	str	wzr, [x29, 56]
-	tbz	x0, 12, .L1499
-	adrp	x1, .LANCHOR154
-	adrp	x0, .LC92
+	tbz	x0, 12, .L1572
+	adrp	x1, .LANCHOR158
+	adrp	x0, .LC98
 	mov	x2, x19
-	add	x1, x1, :lo12:.LANCHOR154
-	add	x0, x0, :lo12:.LC92
+	add	x1, x1, :lo12:.LANCHOR158
+	add	x0, x0, :lo12:.LC98
 	bl	printf
-.L1499:
+.L1572:
 	adrp	x20, .LANCHOR28
 	mov	w0, 6
 	ldr	w2, [x19, 352]
@@ -9156,24 +9652,24 @@ nandc_init:
 	mov	x22, x0
 	str	x19, [x0, #:lo12:.LANCHOR13]
 	cmp	w2, w1
-	bne	.L1500
+	bne	.L1573
 	mov	w0, 8
 	strb	w0, [x20, #:lo12:.LANCHOR28]
-.L1500:
+.L1573:
 	ldr	w1, [x19, 128]
 	mov	w0, 12336
 	movk	w0, 0x5639, lsl 16
 	cmp	w1, w0
-	bne	.L1501
+	bne	.L1574
 	mov	w0, 9
 	strb	w0, [x20, #:lo12:.LANCHOR28]
-.L1501:
+.L1574:
 	ldrb	w0, [x20, #:lo12:.LANCHOR28]
 	cmp	w0, 9
-	adrp	x0, .LANCHOR47
-	bne	.L1502
+	adrp	x0, .LANCHOR51
+	bne	.L1575
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR47]
+	strb	w1, [x0, #:lo12:.LANCHOR51]
 	ldr	w0, [x29, 56]
 	mov	w1, 2
 	orr	w0, w0, 256
@@ -9196,37 +9692,37 @@ nandc_init:
 	mov	w0, 39
 	str	w0, [x19, 84]
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1504
+	tbz	x0, 12, .L1577
 	ldr	w1, [x19]
 	ldr	w2, [x19, 8]
 	ldr	w3, [x19, 80]
 	ldr	w4, [x19, 84]
 	ldr	w5, [x19, 88]
-.L1517:
-	adrp	x0, .LC93
-	add	x0, x0, :lo12:.LC93
+.L1590:
+	adrp	x0, .LC99
+	add	x0, x0, :lo12:.LC99
 	bl	printf
-.L1504:
-	adrp	x0, .LANCHOR48
+.L1577:
+	adrp	x0, .LANCHOR52
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR48]
+	strb	w1, [x0, #:lo12:.LANCHOR52]
+	adrp	x0, .LANCHOR54
+	strh	wzr, [x0, #:lo12:.LANCHOR54]
 	adrp	x0, .LANCHOR50
-	strh	wzr, [x0, #:lo12:.LANCHOR50]
-	adrp	x0, .LANCHOR46
-	strb	wzr, [x0, #:lo12:.LANCHOR46]
+	strb	wzr, [x0, #:lo12:.LANCHOR50]
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1498
+	tbz	x0, 12, .L1571
 	ldrb	w1, [x20, #:lo12:.LANCHOR28]
-	adrp	x0, .LC94
-	add	x0, x0, :lo12:.LC94
+	adrp	x0, .LC100
+	add	x0, x0, :lo12:.LC100
 	bl	printf
-.L1498:
+.L1571:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1502:
-	strb	wzr, [x0, #:lo12:.LANCHOR47]
+.L1575:
+	strb	wzr, [x0, #:lo12:.LANCHOR51]
 	mov	w1, 1
 	ldr	w0, [x29, 56]
 	orr	w0, w0, 256
@@ -9250,17 +9746,17 @@ nandc_init:
 	str	w0, [x19, 308]
 	mov	w0, 2048
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR49
-	str	x0, [x1, #:lo12:.LANCHOR49]
+	adrp	x1, .LANCHOR53
+	str	x0, [x1, #:lo12:.LANCHOR53]
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1504
+	tbz	x0, 12, .L1577
 	ldr	x0, [x22, #:lo12:.LANCHOR13]
 	ldr	w1, [x0]
 	ldr	w2, [x0, 344]
 	ldr	w3, [x0, 304]
 	ldr	w4, [x0, 308]
 	ldr	w5, [x0, 312]
-	b	.L1517
+	b	.L1590
 	.size	nandc_init, .-nandc_init
 	.section	.text.zbuf_init,"ax",@progbits
 	.align	2
@@ -9268,16 +9764,16 @@ nandc_init:
 	.type	zbuf_init, %function
 zbuf_init:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LANCHOR52
+	adrp	x0, .LANCHOR56
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	add	x19, x0, :lo12:.LANCHOR52
+	add	x19, x0, :lo12:.LANCHOR56
 	stp	x21, x22, [sp, 32]
 	mov	x20, x0
-	adrp	x22, .LANCHOR126
-	add	x22, x22, :lo12:.LANCHOR126
+	adrp	x22, .LANCHOR131
+	add	x22, x22, :lo12:.LANCHOR131
 	mov	w21, 0
-.L1519:
+.L1592:
 	and	w0, w21, 255
 	strb	w0, [x19, 1]
 	add	w1, w0, 1
@@ -9294,15 +9790,15 @@ zbuf_init:
 	bl	ftl_malloc
 	str	x0, [x19, -40]
 	cmp	w21, 32
-	bne	.L1519
-	add	x0, x20, :lo12:.LANCHOR52
+	bne	.L1592
+	add	x0, x20, :lo12:.LANCHOR56
 	mov	w1, -1
 	strb	w1, [x0, 1984]
-	adrp	x0, .LANCHOR53
-	strb	wzr, [x0, #:lo12:.LANCHOR53]
-	adrp	x0, .LANCHOR54
+	adrp	x0, .LANCHOR57
+	strb	wzr, [x0, #:lo12:.LANCHOR57]
+	adrp	x0, .LANCHOR58
 	ldp	x19, x20, [sp, 16]
-	strb	w21, [x0, #:lo12:.LANCHOR54]
+	strb	w21, [x0, #:lo12:.LANCHOR58]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
@@ -9313,91 +9809,94 @@ zbuf_init:
 	.type	gc_init, %function
 gc_init:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR78
-	mov	w2, 600
+	adrp	x0, .LANCHOR85
+	mov	w2, 2136
 	mov	w1, 0
 	add	x29, sp, 0
-	strb	wzr, [x0, #:lo12:.LANCHOR78]
-	adrp	x0, .LANCHOR155
+	strb	wzr, [x0, #:lo12:.LANCHOR85]
+	adrp	x0, .LANCHOR159
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR64
-	strb	wzr, [x0, #:lo12:.LANCHOR155]
-	adrp	x0, .LANCHOR156
-	add	x19, x20, :lo12:.LANCHOR64
-	str	wzr, [x0, #:lo12:.LANCHOR156]
-	adrp	x0, .LANCHOR89
-	strh	wzr, [x0, #:lo12:.LANCHOR89]
+	adrp	x20, .LANCHOR71
+	strb	wzr, [x0, #:lo12:.LANCHOR159]
+	adrp	x0, .LANCHOR160
+	add	x19, x20, :lo12:.LANCHOR71
+	str	wzr, [x0, #:lo12:.LANCHOR160]
+	adrp	x0, .LANCHOR96
+	strh	wzr, [x0, #:lo12:.LANCHOR96]
 	mov	x0, x19
 	bl	ftl_memset
 	str	xzr, [x19, 8]
 	mov	w0, -1
-	strh	w0, [x20, #:lo12:.LANCHOR64]
-	adrp	x0, .LANCHOR87
-	adrp	x4, .LANCHOR96
-	adrp	x20, .LANCHOR79
-	ldrh	w1, [x0, #:lo12:.LANCHOR87]
+	strh	w0, [x20, #:lo12:.LANCHOR71]
+	adrp	x0, .LANCHOR95
+	adrp	x4, .LANCHOR102
+	adrp	x20, .LANCHOR86
+	ldrh	w1, [x0, #:lo12:.LANCHOR95]
 	lsr	w2, w1, 1
 	lsr	w0, w1, 2
 	strh	w2, [x19, 38]
-	adrp	x2, .LANCHOR88
+	adrp	x2, .LANCHOR90
 	strh	w0, [x19, 36]
 	adrp	x19, .LANCHOR80
-	strh	wzr, [x2, #:lo12:.LANCHOR88]
-	adrp	x2, .LANCHOR84
+	strh	wzr, [x2, #:lo12:.LANCHOR90]
+	adrp	x2, .LANCHOR91
 	ldrb	w3, [x19, #:lo12:.LANCHOR80]
-	strh	wzr, [x2, #:lo12:.LANCHOR84]
-	adrp	x2, .LANCHOR85
-	strh	wzr, [x2, #:lo12:.LANCHOR85]
+	strh	wzr, [x2, #:lo12:.LANCHOR91]
+	adrp	x2, .LANCHOR92
+	strh	wzr, [x2, #:lo12:.LANCHOR92]
 	mul	w2, w1, w3
 	and	w2, w2, 65535
 	sub	w5, w2, #32
-	strh	w5, [x4, #:lo12:.LANCHOR96]
-	adrp	x4, .LANCHOR93
-	strh	w2, [x4, #:lo12:.LANCHOR93]
-	adrp	x2, .LANCHOR86
-	strh	w1, [x2, #:lo12:.LANCHOR86]
-	adrp	x1, .LANCHOR63
-	strh	w0, [x1, #:lo12:.LANCHOR63]
-	ldrh	w0, [x20, #:lo12:.LANCHOR79]
+	strh	w5, [x4, #:lo12:.LANCHOR102]
+	adrp	x4, .LANCHOR100
+	strh	w2, [x4, #:lo12:.LANCHOR100]
+	adrp	x2, .LANCHOR94
+	strh	w1, [x2, #:lo12:.LANCHOR94]
+	adrp	x1, .LANCHOR161
+	mov	w2, 4
+	strh	w2, [x1, #:lo12:.LANCHOR161]
+	adrp	x1, .LANCHOR70
+	strh	w0, [x1, #:lo12:.LANCHOR70]
+	ldrh	w0, [x20, #:lo12:.LANCHOR86]
 	mul	w0, w0, w3
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR157
-	str	x0, [x1, #:lo12:.LANCHOR157]
+	adrp	x1, .LANCHOR162
+	str	x0, [x1, #:lo12:.LANCHOR162]
 	ldrb	w1, [x19, #:lo12:.LANCHOR80]
-	ldrh	w0, [x20, #:lo12:.LANCHOR79]
+	ldrh	w0, [x20, #:lo12:.LANCHOR86]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR158
-	str	x0, [x1, #:lo12:.LANCHOR158]
-	ldrh	w1, [x20, #:lo12:.LANCHOR79]
+	adrp	x1, .LANCHOR163
+	str	x0, [x1, #:lo12:.LANCHOR163]
+	ldrh	w1, [x20, #:lo12:.LANCHOR86]
 	ldrb	w0, [x19, #:lo12:.LANCHOR80]
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR76
-	str	x0, [x1, #:lo12:.LANCHOR76]
+	adrp	x1, .LANCHOR83
+	str	x0, [x1, #:lo12:.LANCHOR83]
 	ldrb	w1, [x19, #:lo12:.LANCHOR80]
-	ldrh	w0, [x20, #:lo12:.LANCHOR79]
+	ldrh	w0, [x20, #:lo12:.LANCHOR86]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR70
-	str	x0, [x1, #:lo12:.LANCHOR70]
+	adrp	x1, .LANCHOR77
+	str	x0, [x1, #:lo12:.LANCHOR77]
 	ldrb	w1, [x19, #:lo12:.LANCHOR80]
-	ldrh	w0, [x20, #:lo12:.LANCHOR79]
+	ldrh	w0, [x20, #:lo12:.LANCHOR86]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR159
+	adrp	x1, .LANCHOR164
 	ldp	x19, x20, [sp, 16]
-	str	x0, [x1, #:lo12:.LANCHOR159]
-	adrp	x0, .LANCHOR91
-	adrp	x1, .LANCHOR81
+	str	x0, [x1, #:lo12:.LANCHOR164]
+	adrp	x0, .LANCHOR98
+	adrp	x1, .LANCHOR87
 	ldp	x29, x30, [sp], 32
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	ldrh	w0, [x0, #:lo12:.LANCHOR98]
 	lsr	w0, w0, 2
-	strh	w0, [x1, #:lo12:.LANCHOR81]
+	strh	w0, [x1, #:lo12:.LANCHOR87]
 	ret
 	.size	gc_init, .-gc_init
 	.section	.text.ftl_free,"ax",@progbits
@@ -9416,19 +9915,51 @@ js_hash:
 	mov	w0, 42982
 	mov	x3, 0
 	movk	w0, 0x47c6, lsl 16
-.L1526:
+.L1599:
 	cmp	w1, w3
-	bhi	.L1527
+	bhi	.L1600
 	ret
-.L1527:
+.L1600:
 	lsr	w2, w0, 2
 	ldrb	w5, [x4, x3]
 	add	w2, w2, w0, lsl 5
 	add	x3, x3, 1
 	add	w2, w2, w5
 	eor	w0, w0, w2
-	b	.L1526
+	b	.L1599
 	.size	js_hash, .-js_hash
+	.section	.text.ftl_debug_info_fill,"ax",@progbits
+	.align	2
+	.global	ftl_debug_info_fill
+	.type	ftl_debug_info_fill, %function
+ftl_debug_info_fill:
+	adrp	x3, .LANCHOR131
+	ldrb	w3, [x3, #:lo12:.LANCHOR131]
+	cmp	w3, 8
+	bls	.L1605
+	and	w0, w0, 255
+	cmp	x2, 0
+	ccmp	w0, 2, 0, ne
+	bne	.L1603
+	stp	x29, x30, [sp, -16]!
+	mov	x6, x1
+	mov	w1, 21320
+	mov	x0, x2
+	add	x29, sp, 0
+	movk	w1, 0x4841, lsl 16
+	str	w1, [x6]
+	mov	w1, 1024
+	bl	js_hash
+	str	w0, [x6, 4]
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+.L1603:
+	stp	wzr, wzr, [x1]
+.L1605:
+	mov	w0, 0
+	ret
+	.size	ftl_debug_info_fill, .-ftl_debug_info_fill
 	.section	.text.timer_get_time,"ax",@progbits
 	.align	2
 	.global	timer_get_time
@@ -9464,8 +9995,8 @@ ftl_get_density:
 	.global	ftl_get_capacity
 	.type	ftl_get_capacity, %function
 ftl_get_capacity:
-	adrp	x0, .LANCHOR61
-	ldr	w0, [x0, #:lo12:.LANCHOR61]
+	adrp	x0, .LANCHOR68
+	ldr	w0, [x0, #:lo12:.LANCHOR68]
 	ret
 	.size	ftl_get_capacity, .-ftl_get_capacity
 	.section	.text.rknand_print_hex,"ax",@progbits
@@ -9476,67 +10007,70 @@ rknand_print_hex:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LC96
+	adrp	x21, .LC102
 	stp	x23, x24, [sp, 48]
 	mov	x22, x1
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LC95
-	mov	x26, x0
 	mov	w24, w2
-	uxtw	x25, w3
-	add	x23, x23, :lo12:.LC95
-	add	x21, x21, :lo12:.LC96
+	stp	x27, x28, [sp, 80]
+	adrp	x25, .LC101
+	mov	x27, x0
+	uxtw	x26, w3
+	add	x25, x25, :lo12:.LC101
+	add	x21, x21, :lo12:.LC102
 	stp	x19, x20, [sp, 16]
-	str	x27, [sp, 80]
+	mov	w23, 0
 	mov	x19, 0
 	mov	w20, 0
-	adrp	x27, .LC97
-.L1534:
-	cmp	x25, x19
-	bne	.L1540
+	adrp	x28, .LC103
+.L1614:
+	cmp	x26, x19
+	bne	.L1620
 	ldp	x19, x20, [sp, 16]
-	adrp	x1, .LC97
+	adrp	x1, .LC103
 	ldp	x21, x22, [sp, 32]
-	add	x1, x1, :lo12:.LC97
+	add	x1, x1, :lo12:.LC103
 	ldp	x23, x24, [sp, 48]
-	adrp	x0, .LC98
+	adrp	x0, .LC104
 	ldp	x25, x26, [sp, 64]
-	add	x0, x0, :lo12:.LC98
-	ldr	x27, [sp, 80]
+	add	x0, x0, :lo12:.LC104
+	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	printf
-.L1540:
-	cbnz	w20, .L1535
-	mov	w2, w19
-	mov	x1, x26
-	mov	x0, x23
+.L1620:
+	cbnz	w20, .L1615
+	mov	w3, w23
+	mov	x2, x22
+	mov	x1, x27
+	mov	x0, x25
 	bl	printf
-.L1535:
+.L1615:
 	cmp	w24, 4
-	bne	.L1536
+	bne	.L1616
 	ldr	w1, [x22, x19, lsl 2]
-.L1542:
+.L1622:
 	mov	x0, x21
 	add	w20, w20, 1
 	bl	printf
 	cmp	w20, 15
-	bls	.L1539
+	bls	.L1619
 	mov	w20, 0
-	add	x1, x27, :lo12:.LC97
-	adrp	x0, .LC98
-	add	x0, x0, :lo12:.LC98
+	add	x1, x28, :lo12:.LC103
+	adrp	x0, .LC104
+	add	x0, x0, :lo12:.LC104
 	bl	printf
-.L1539:
+.L1619:
 	add	x19, x19, 1
-	b	.L1534
-.L1536:
+	add	w23, w23, w24
+	b	.L1614
+.L1616:
 	cmp	w24, 2
-	bne	.L1538
+	bne	.L1618
 	ldrsh	w1, [x22, x19, lsl 1]
-	b	.L1542
-.L1538:
+	b	.L1622
+.L1618:
 	ldrb	w1, [x22, x19]
-	b	.L1542
+	b	.L1622
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.hynix_get_read_retry_default,"ax",@progbits
 	.align	2
@@ -9565,41 +10099,41 @@ hynix_get_read_retry_default:
 	strb	w2, [x8, 129]
 	strb	w1, [x8, 130]
 	strb	w0, [x8, 131]
-	bne	.L1544
+	bne	.L1624
 	mov	w0, -89
 	strb	w0, [x13, 16]
-	adrp	x0, .LANCHOR160+17
+	adrp	x0, .LANCHOR165+17
 	mov	w1, -9
-	strb	w1, [x0, #:lo12:.LANCHOR160+17]
-.L1608:
+	strb	w1, [x0, #:lo12:.LANCHOR165+17]
+.L1688:
 	mov	w24, 7
-	b	.L1651
-.L1544:
+	b	.L1731
+.L1624:
 	cmp	w10, 3
-	bne	.L1546
+	bne	.L1626
 	mov	x11, 0
-.L1547:
+.L1627:
 	sub	w0, w11, #80
 	strb	w0, [x6, x11]
 	add	x11, x11, 1
 	cmp	x11, 8
-	bne	.L1547
+	bne	.L1627
 	mov	w24, w11
-.L1545:
+.L1625:
 	sub	w0, w10, #1
 	cmp	w0, 1
-	bhi	.L1553
+	bhi	.L1633
 	adrp	x7, .LANCHOR18
 	adrp	x8, .LANCHOR30
 	add	x7, x7, :lo12:.LANCHOR18
 	add	x8, x8, :lo12:.LANCHOR30
 	mov	w5, 0
 	mov	w10, 55
-.L1554:
+.L1634:
 	ldrb	w0, [x7]
 	cmp	w0, w5
-	bhi	.L1560
-.L1561:
+	bhi	.L1640
+.L1641:
 	strb	w11, [x13, 1]
 	strb	w24, [x13, 2]
 	ldp	x19, x20, [sp, 16]
@@ -9609,9 +10143,9 @@ hynix_get_read_retry_default:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1546:
+.L1626:
 	cmp	w10, 4
-	bne	.L1548
+	bne	.L1628
 	mov	w3, -52
 	strb	w3, [x8, 128]
 	mov	w3, -65
@@ -9627,10 +10161,10 @@ hynix_get_read_retry_default:
 	strb	w3, [x8, 132]
 	strb	w1, [x8, 134]
 	strb	w0, [x8, 135]
-	b	.L1545
-.L1548:
+	b	.L1625
+.L1628:
 	cmp	w10, 5
-	bne	.L1549
+	bne	.L1629
 	mov	w0, 56
 	strb	w0, [x8, 128]
 	mov	w0, 57
@@ -9640,12 +10174,12 @@ hynix_get_read_retry_default:
 	strb	w0, [x8, 130]
 	mov	w0, 59
 	strb	w0, [x8, 131]
-.L1651:
+.L1731:
 	mov	w11, 4
-	b	.L1545
-.L1549:
+	b	.L1625
+.L1629:
 	cmp	w10, 6
-	bne	.L1550
+	bne	.L1630
 	mov	w0, 14
 	strb	w0, [x8, 128]
 	mov	w0, 15
@@ -9655,27 +10189,27 @@ hynix_get_read_retry_default:
 	strb	w0, [x8, 130]
 	mov	w0, 17
 	strb	w0, [x8, 131]
-	b	.L1651
-.L1550:
+	b	.L1731
+.L1630:
 	cmp	w10, 7
-	bne	.L1551
+	bne	.L1631
 	mov	x0, 0
-.L1552:
+.L1632:
 	sub	w1, w0, #80
 	strb	w1, [x6, x0]
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L1552
+	bne	.L1632
 	mov	w0, -44
 	mov	w24, 12
 	strb	w0, [x8, 136]
 	mov	w11, 10
 	mov	w0, -43
 	strb	w0, [x8, 137]
-	b	.L1545
-.L1551:
+	b	.L1625
+.L1631:
 	cmp	w10, 8
-	bne	.L1608
+	bne	.L1688
 	mov	w0, 6
 	strb	w0, [x8, 128]
 	mov	w0, 7
@@ -9687,8 +10221,8 @@ hynix_get_read_retry_default:
 	mov	w0, 10
 	mov	w11, 5
 	strb	w0, [x8, 132]
-	b	.L1545
-.L1560:
+	b	.L1625
+.L1640:
 	ldrb	w0, [x8, w5, sxtw]
 	mov	x1, 32
 	mov	w2, 160
@@ -9699,7 +10233,7 @@ hynix_get_read_retry_default:
 	ldr	x4, [x1, #:lo12:.LANCHOR13]
 	add	x2, x13, x2
 	add	x4, x4, x0
-.L1555:
+.L1635:
 	str	w10, [x4, 2056]
 	ldrb	w0, [x6, x3]
 	str	w0, [x4, 2052]
@@ -9709,15 +10243,15 @@ hynix_get_read_retry_default:
 	strb	w0, [x2, x3]
 	add	x3, x3, 1
 	cmp	w11, w3, uxtb
-	bhi	.L1555
-	adrp	x3, .LANCHOR160
-	add	x3, x3, :lo12:.LANCHOR160
+	bhi	.L1635
+	adrp	x3, .LANCHOR165
+	add	x3, x3, :lo12:.LANCHOR165
 	mov	x0, 0
-.L1558:
+.L1638:
 	add	x14, x2, x0
 	add	x12, x3, x0
 	mov	x1, 1
-.L1557:
+.L1637:
 	lsl	x4, x1, 2
 	lsl	x15, x1, 3
 	ldrb	w16, [x2, x0]
@@ -9726,10 +10260,10 @@ hynix_get_read_retry_default:
 	ldrb	w4, [x12, x4]
 	add	w4, w4, w16
 	strb	w4, [x14, x15]
-	bne	.L1557
+	bne	.L1637
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L1558
+	bne	.L1638
 	add	w5, w5, 1
 	strb	wzr, [x2, 16]
 	strb	wzr, [x2, 24]
@@ -9739,11 +10273,11 @@ hynix_get_read_retry_default:
 	strb	wzr, [x2, 48]
 	strb	wzr, [x2, 41]
 	strb	wzr, [x2, 49]
-	b	.L1554
-.L1553:
+	b	.L1634
+.L1633:
 	sub	w0, w10, #3
 	cmp	w0, 5
-	bhi	.L1561
+	bhi	.L1641
 	mul	w19, w24, w11
 	sub	w14, w11, #1
 	and	x14, x14, 255
@@ -9756,10 +10290,10 @@ hynix_get_read_retry_default:
 	lsl	w23, w15, 1
 	sbfiz	x22, x15, 1, 32
 	mov	w12, 0
-.L1562:
+.L1642:
 	ldrb	w0, [x20]
 	cmp	w0, w12
-	bls	.L1561
+	bls	.L1641
 	adrp	x0, .LANCHOR30
 	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w25, [x0, w12, sxtw]
@@ -9778,7 +10312,7 @@ hynix_get_read_retry_default:
 	str	w6, [x4, 2056]
 	bl	nandc_wait_flash_ready
 	cmp	w10, 8
-	bne	.L1563
+	bne	.L1643
 	mov	w0, 120
 	str	w0, [x4, 2056]
 	str	wzr, [x4, 2052]
@@ -9798,7 +10332,7 @@ hynix_get_read_retry_default:
 	str	wzr, [x4, 2052]
 	str	wzr, [x4, 2052]
 	str	w1, [x4, 2052]
-.L1654:
+.L1734:
 	str	w0, [x4, 2052]
 	mov	w0, 48
 	str	wzr, [x4, 2052]
@@ -9806,65 +10340,65 @@ hynix_get_read_retry_default:
 	bl	nandc_wait_flash_ready
 	cmp	w21, 1
 	ccmp	w10, 8, 4, hi
-	beq	.L1609
+	beq	.L1689
 	cmp	w10, 7
 	mov	w0, 32
 	mov	w1, 2
 	csel	w1, w1, w0, ne
-.L1570:
-	adrp	x6, .LANCHOR161
+.L1650:
+	adrp	x6, .LANCHOR166
 	mov	x2, 0
-	ldr	x0, [x6, #:lo12:.LANCHOR161]
-.L1571:
+	ldr	x0, [x6, #:lo12:.LANCHOR166]
+.L1651:
 	ldr	w3, [x4, 2048]
 	strb	w3, [x0, x2]
 	add	x2, x2, 1
 	cmp	w1, w2, uxtb
-	bhi	.L1571
+	bhi	.L1651
 	cmp	w10, 8
-	bne	.L1572
+	bne	.L1652
 	mov	w1, 0
-.L1574:
+.L1654:
 	ldrb	w2, [x0]
 	cmp	w2, 50
-	beq	.L1573
+	beq	.L1653
 	ldrb	w2, [x0, 1]
 	cmp	w2, 5
-	beq	.L1573
+	beq	.L1653
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 255
 	cmp	w1, 8
-	bne	.L1574
-.L1575:
-	adrp	x0, .LC99
+	bne	.L1654
+.L1655:
+	adrp	x0, .LC105
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC99
+	add	x0, x0, :lo12:.LC105
 	bl	printf
-.L1577:
-	b	.L1577
-.L1563:
+.L1657:
+	b	.L1657
+.L1643:
 	mov	w0, 54
 	str	w0, [x4, 2056]
 	cmp	w10, 4
-	bne	.L1565
+	bne	.L1645
 	mov	w0, 64
 	str	w6, [x4, 2052]
 	str	w0, [x4, 2048]
 	mov	w0, 204
-.L1652:
+.L1732:
 	str	w0, [x4, 2052]
 	mov	w0, 77
-	b	.L1653
-.L1565:
+	b	.L1733
+.L1645:
 	cmp	w21, 1
-	bhi	.L1567
+	bhi	.L1647
 	ldrb	w0, [x8, 128]
 	str	w0, [x4, 2052]
 	mov	w0, 82
-.L1653:
+.L1733:
 	str	w0, [x4, 2048]
-.L1566:
+.L1646:
 	mov	w0, 22
 	str	w0, [x4, 2056]
 	mov	w0, 23
@@ -9877,185 +10411,185 @@ hynix_get_read_retry_default:
 	cmp	w10, 6
 	str	wzr, [x4, 2052]
 	str	wzr, [x4, 2052]
-	bne	.L1568
+	bne	.L1648
 	mov	w0, 31
 	str	w0, [x4, 2052]
-.L1569:
+.L1649:
 	mov	w0, 2
-	b	.L1654
-.L1567:
+	b	.L1734
+.L1647:
 	cmp	w10, 7
-	bne	.L1566
+	bne	.L1646
 	mov	w0, 174
 	str	w0, [x4, 2052]
 	str	wzr, [x4, 2048]
 	mov	w0, 176
-	b	.L1652
-.L1568:
+	b	.L1732
+.L1648:
 	str	wzr, [x4, 2052]
-	b	.L1569
-.L1609:
+	b	.L1649
+.L1689:
 	mov	w1, 16
-	b	.L1570
-.L1573:
+	b	.L1650
+.L1653:
 	cmp	w1, 6
-	bhi	.L1575
-.L1576:
-	ldr	x3, [x6, #:lo12:.LANCHOR161]
+	bhi	.L1655
+.L1656:
+	ldr	x3, [x6, #:lo12:.LANCHOR166]
 	mov	x0, 0
-.L1586:
+.L1666:
 	cmp	w19, w0
-	bgt	.L1587
-	ldr	x1, [x6, #:lo12:.LANCHOR161]
+	bgt	.L1667
+	ldr	x1, [x6, #:lo12:.LANCHOR166]
 	mov	w6, 8
 	add	x2, x1, x22
-.L1589:
+.L1669:
 	mov	x0, 0
-.L1588:
+.L1668:
 	ldrh	w7, [x2, x0, lsl 1]
 	mvn	w7, w7
 	strh	w7, [x2, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	w15, w0
-	bgt	.L1588
+	bgt	.L1668
 	add	x2, x2, x23, uxtw 1
 	subs	w6, w6, #1
-	bne	.L1589
+	bne	.L1669
 	mov	x6, x1
 	mov	w7, 0
 	mov	w26, 1
-.L1590:
+.L1670:
 	mov	w0, 0
 	mov	w2, 0
-.L1594:
+.L1674:
 	mov	x25, x6
 	lsl	w30, w26, w2
 	mov	w17, 16
 	mov	w16, 0
-.L1592:
+.L1672:
 	ldrh	w27, [x25]
 	add	x25, x25, x22
 	bics	wzr, w30, w27
 	cinc	w16, w16, eq
 	subs	w17, w17, #1
-	bne	.L1592
+	bne	.L1672
 	cmp	w16, 8
-	bls	.L1593
+	bls	.L1673
 	orr	w0, w0, w30
 	and	w0, w0, 65535
-.L1593:
+.L1673:
 	add	w2, w2, 1
 	cmp	w2, 16
-	bne	.L1594
+	bne	.L1674
 	strh	w0, [x6], 2
 	add	w7, w7, 1
 	cmp	w15, w7
-	bgt	.L1590
+	bgt	.L1670
 	mov	x0, 0
 	mov	w2, 0
-.L1597:
+.L1677:
 	ldr	w6, [x1, x0]
 	add	x0, x0, 4
 	cmp	w6, 0
 	cinc	w2, w2, eq
 	cmp	x0, 32
-	bne	.L1597
+	bne	.L1677
 	cmp	w2, 7
-	ble	.L1598
+	ble	.L1678
 	mov	w3, 1024
 	mov	w2, 1
-	adrp	x0, .LC100
-	add	x0, x0, :lo12:.LC100
+	adrp	x0, .LC106
+	add	x0, x0, :lo12:.LC106
 	bl	rknand_print_hex
-	adrp	x0, .LC99
+	adrp	x0, .LC105
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC99
+	add	x0, x0, :lo12:.LC105
 	bl	printf
-.L1599:
-	b	.L1599
-.L1572:
+.L1679:
+	b	.L1679
+.L1652:
 	cmp	w10, 7
-	bne	.L1578
+	bne	.L1658
 	mov	w1, 0
-.L1580:
+.L1660:
 	ldrb	w2, [x0]
 	cmp	w2, 12
-	beq	.L1579
+	beq	.L1659
 	ldrb	w2, [x0, 1]
 	cmp	w2, 10
-	beq	.L1579
+	beq	.L1659
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 255
 	cmp	w1, 8
-	bne	.L1580
-.L1581:
-	adrp	x0, .LC99
+	bne	.L1660
+.L1661:
+	adrp	x0, .LC105
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC99
+	add	x0, x0, :lo12:.LC105
 	bl	printf
-.L1582:
-	b	.L1582
-.L1579:
+.L1662:
+	b	.L1662
+.L1659:
 	cmp	w1, 6
-	bls	.L1576
-	b	.L1581
-.L1578:
+	bls	.L1656
+	b	.L1661
+.L1658:
 	cmp	w10, 6
-	bne	.L1576
+	bne	.L1656
 	mov	x1, 0
-.L1583:
+.L1663:
 	ldrb	w2, [x0, x1]
 	cmp	w2, 12
-	beq	.L1576
+	beq	.L1656
 	add	x2, x0, x1
 	ldrb	w2, [x2, 8]
 	cmp	w2, 4
-	beq	.L1576
+	beq	.L1656
 	add	x1, x1, 1
 	cmp	x1, 8
-	bne	.L1583
-	adrp	x0, .LC99
+	bne	.L1663
+	adrp	x0, .LC105
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC99
+	add	x0, x0, :lo12:.LC105
 	bl	printf
-.L1585:
-	b	.L1585
-.L1587:
+.L1665:
+	b	.L1665
+.L1667:
 	ldr	w1, [x4, 2048]
 	strb	w1, [x3, x0]
 	add	x0, x0, 1
-	b	.L1586
-.L1598:
+	b	.L1666
+.L1678:
 	cmp	w10, 6
-	beq	.L1611
+	beq	.L1691
 	cmp	w10, 7
-	beq	.L1612
+	beq	.L1692
 	cmp	w10, 8
 	mov	x1, 5
 	mov	x0, 8
 	csel	x0, x0, x1, ne
-.L1600:
+.L1680:
 	mov	x1, x5
 	mov	w5, 0
-.L1601:
+.L1681:
 	mov	x2, 0
-.L1602:
+.L1682:
 	ldrb	w6, [x3, x2]
 	strb	w6, [x1, x2]
 	add	x2, x2, 1
 	cmp	w11, w2, uxtb
-	bhi	.L1602
+	bhi	.L1682
 	add	w5, w5, 1
 	add	x3, x3, x14
 	add	x1, x1, x0
 	cmp	w24, w5
-	bgt	.L1601
+	bgt	.L1681
 	mov	w5, 255
 	str	w5, [x4, 2056]
 	bl	nandc_wait_flash_ready
 	cmp	w21, 1
-	bhi	.L1604
+	bhi	.L1684
 	mov	w0, 54
 	str	w0, [x4, 2056]
 	ldrb	w0, [x8, 128]
@@ -10070,40 +10604,40 @@ hynix_get_read_retry_default:
 	str	w5, [x4, 2052]
 	str	w5, [x4, 2052]
 	str	w5, [x4, 2052]
-.L1655:
+.L1735:
 	str	w0, [x4, 2056]
 	bl	nandc_wait_flash_ready
 	add	w12, w12, 1
 	and	w12, w12, 255
-	b	.L1562
-.L1611:
+	b	.L1642
+.L1691:
 	mov	x0, 4
-	b	.L1600
-.L1612:
+	b	.L1680
+.L1692:
 	mov	x0, 10
-	b	.L1600
-.L1604:
+	b	.L1680
+.L1684:
 	cmp	w10, 8
-	bne	.L1606
+	bne	.L1686
 	mov	w0, 190
-	b	.L1655
-.L1606:
+	b	.L1735
+.L1686:
 	mov	w0, 56
-	b	.L1655
+	b	.L1735
 	.size	hynix_get_read_retry_default, .-hynix_get_read_retry_default
 	.section	.text.flash_get_read_retry_tbl,"ax",@progbits
 	.align	2
 	.global	flash_get_read_retry_tbl
 	.type	flash_get_read_retry_tbl, %function
 flash_get_read_retry_tbl:
-	adrp	x0, .LANCHOR32+19
-	ldrb	w0, [x0, #:lo12:.LANCHOR32+19]
+	adrp	x0, .LANCHOR33+19
+	ldrb	w0, [x0, #:lo12:.LANCHOR33+19]
 	sub	w1, w0, #1
 	and	w1, w1, 255
 	cmp	w1, 7
-	bhi	.L1656
+	bhi	.L1736
 	b	hynix_get_read_retry_default
-.L1656:
+.L1736:
 	ret
 	.size	flash_get_read_retry_tbl, .-flash_get_read_retry_tbl
 	.section	.text.nandc_xfer_done,"ax",@progbits
@@ -10112,37 +10646,37 @@ flash_get_read_retry_tbl:
 	.type	nandc_xfer_done, %function
 nandc_xfer_done:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR162
+	adrp	x0, .LANCHOR167
 	adrp	x1, .LANCHOR28
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR13
 	ldrb	w1, [x1, #:lo12:.LANCHOR28]
 	stp	x21, x22, [sp, 32]
-	strb	wzr, [x0, #:lo12:.LANCHOR162]
+	strb	wzr, [x0, #:lo12:.LANCHOR167]
 	cmp	w1, 9
 	str	x23, [sp, 48]
-	bne	.L1659
+	bne	.L1739
 	ldr	x20, [x19, #:lo12:.LANCHOR13]
 	mov	x21, x0
 	ldr	w0, [x20, 16]
 	str	w0, [x29, 64]
 	ldr	w0, [x20, 48]
-	tbnz	x0, 1, .L1660
-	adrp	x22, .LC104
-	adrp	x23, .LC103
-	add	x22, x22, :lo12:.LC104
-	add	x23, x23, :lo12:.LC103
+	tbnz	x0, 1, .L1740
+	adrp	x22, .LC109
+	adrp	x23, .LC110
+	add	x22, x22, :lo12:.LC109
+	add	x23, x23, :lo12:.LC110
 	mov	w21, 0
-.L1661:
+.L1741:
 	ldr	w0, [x29, 64]
-	tbnz	x0, 20, .L1663
+	tbnz	x0, 20, .L1743
 	ldr	x0, [x19, #:lo12:.LANCHOR13]
 	add	w21, w21, 1
 	tst	x21, 16777215
 	ldr	w0, [x0, 16]
 	str	w0, [x29, 64]
-	bne	.L1661
+	bne	.L1741
 	ldr	w2, [x29, 64]
 	mov	w1, w21
 	ldr	w3, [x20, 64]
@@ -10154,79 +10688,73 @@ nandc_xfer_done:
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1661
-.L1662:
+	b	.L1741
+.L1742:
 	ldr	w0, [x29, 64]
 	add	w1, w1, 1
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0, lsl 12
-	bne	.L1664
+	bne	.L1744
 	ldr	w2, [x20, 64]
-	adrp	x0, .LC102
+	adrp	x0, .LC108
 	ldr	w3, [x29, 64]
-	add	x0, x0, :lo12:.LC102
+	add	x0, x0, :lo12:.LC108
 	ubfx	x2, x2, 16, 5
 	ubfx	x3, x3, 22, 6
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR13]
-	mov	w3, 64
-	mov	w2, 4
-	adrp	x0, .LC103
-	add	x0, x0, :lo12:.LC103
-	bl	rknand_print_hex
 	ldr	w0, [x29, 72]
 	mov	w0, 1
-	strb	w0, [x21, #:lo12:.LANCHOR162]
-.L1663:
-	adrp	x0, .LANCHOR49+32
+	strb	w0, [x21, #:lo12:.LANCHOR167]
+.L1743:
+	adrp	x0, .LANCHOR53+32
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
-	str	wzr, [x0, #:lo12:.LANCHOR49+32]
+	str	wzr, [x0, #:lo12:.LANCHOR53+32]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1660:
+.L1740:
 	mov	w1, 0
-.L1664:
+.L1744:
 	ldr	w2, [x20, 64]
 	ldr	w0, [x29, 64]
 	ubfx	x2, x2, 16, 6
 	ubfx	x0, x0, 22, 6
 	cmp	w2, w0
-	bge	.L1663
+	bge	.L1743
 	ldr	w0, [x20]
 	str	w0, [x29, 72]
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1662
+	tbz	x0, 13, .L1742
 	ldr	w0, [x29, 72]
-	tbz	x0, 17, .L1662
+	tbz	x0, 17, .L1742
 	ldr	w1, [x29, 72]
-	adrp	x0, .LC101
-	add	x0, x0, :lo12:.LC101
+	adrp	x0, .LC107
+	add	x0, x0, :lo12:.LC107
 	ubfx	x1, x1, 17, 1
-.L1693:
+.L1773:
 	bl	printf
-	b	.L1663
-.L1659:
+	b	.L1743
+.L1739:
 	ldr	x20, [x19, #:lo12:.LANCHOR13]
 	mov	w21, 0
 	ldr	w0, [x20, 8]
 	str	w0, [x29, 64]
 	ldr	w0, [x20, 16]
-	tbnz	x0, 1, .L1669
-	adrp	x22, .LC104
-	adrp	x23, .LC103
-	add	x22, x22, :lo12:.LC104
-	add	x23, x23, :lo12:.LC103
-.L1670:
+	tbnz	x0, 1, .L1749
+	adrp	x22, .LC109
+	adrp	x23, .LC110
+	add	x22, x22, :lo12:.LC109
+	add	x23, x23, :lo12:.LC110
+.L1750:
 	ldr	w0, [x29, 64]
-	tbnz	x0, 20, .L1663
+	tbnz	x0, 20, .L1743
 	ldr	x0, [x19, #:lo12:.LANCHOR13]
 	add	w21, w21, 1
 	tst	x21, 16777215
 	ldr	w0, [x0, 8]
 	str	w0, [x29, 64]
-	bne	.L1670
+	bne	.L1750
 	ldr	w2, [x29, 64]
 	mov	w1, w21
 	ldr	w3, [x20, 28]
@@ -10238,34 +10766,34 @@ nandc_xfer_done:
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1670
-.L1669:
-	adrp	x22, .LC102
-	adrp	x23, .LC103
-	add	x22, x22, :lo12:.LC102
-	add	x23, x23, :lo12:.LC103
-.L1671:
+	b	.L1750
+.L1749:
+	adrp	x22, .LC108
+	adrp	x23, .LC110
+	add	x22, x22, :lo12:.LC108
+	add	x23, x23, :lo12:.LC110
+.L1751:
 	ldr	w1, [x20, 28]
 	ldr	w0, [x29, 64]
 	ubfx	x1, x1, 16, 5
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0
-	bge	.L1663
+	bge	.L1743
 	ldr	x0, [x19, #:lo12:.LANCHOR13]
 	ldr	w0, [x0]
 	str	w0, [x29, 72]
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1672
+	tbz	x0, 13, .L1752
 	ldr	w0, [x29, 72]
-	tbz	x0, 17, .L1672
-	adrp	x0, .LC105
+	tbz	x0, 17, .L1752
+	adrp	x0, .LC111
 	ldr	w1, [x29, 72]
-	add	x0, x0, :lo12:.LC105
-	b	.L1693
-.L1672:
+	add	x0, x0, :lo12:.LC111
+	b	.L1773
+.L1752:
 	add	w21, w21, 1
 	tst	x21, 16777215
-	bne	.L1671
+	bne	.L1751
 	ldr	w2, [x20, 28]
 	mov	w1, w21
 	ldr	w3, [x29, 64]
@@ -10278,7 +10806,7 @@ nandc_xfer_done:
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1671
+	b	.L1751
 	.size	nandc_xfer_done, .-nandc_xfer_done
 	.section	.text.nandc_xfer,"ax",@progbits
 	.align	2
@@ -10300,20 +10828,20 @@ nandc_xfer:
 	bl	nandc_xfer_start
 	mov	w0, w22
 	bl	nandc_xfer_done
-	cbnz	w22, .L1713
+	cbnz	w22, .L1793
 	adrp	x0, .LANCHOR28
 	ldrb	w0, [x0, #:lo12:.LANCHOR28]
 	cmp	w0, 9
-	bne	.L1696
+	bne	.L1776
 	adrp	x22, .LANCHOR13
 	lsr	w19, w19, 2
 	mov	w3, 1
 	mov	w2, 0
 	ldr	x5, [x22, #:lo12:.LANCHOR13]
 	mov	w0, 0
-.L1697:
+.L1777:
 	cmp	w2, w19
-	bcc	.L1701
+	bcc	.L1781
 	ldr	w19, [x5]
 	cmp	w3, 0
 	mov	w1, 512
@@ -10322,35 +10850,35 @@ nandc_xfer:
 	movk	w1, 0x2, lsl 16
 	and	w1, w19, w1
 	cmp	w1, 139264
-	bne	.L1703
+	bne	.L1783
 	mov	w1, w19
-	adrp	x0, .LC106
-	add	x0, x0, :lo12:.LC106
+	adrp	x0, .LC112
+	add	x0, x0, :lo12:.LC112
 	bl	printf
 	ldr	x0, [x22, #:lo12:.LANCHOR13]
 	orr	w19, w19, 131072
 	str	w19, [x0]
 	mov	w0, -1
-.L1703:
-	tbz	x19, 13, .L1704
-	adrp	x1, .LANCHOR162
-	ldrb	w1, [x1, #:lo12:.LANCHOR162]
-	cbz	w1, .L1704
+.L1783:
+	tbz	x19, 13, .L1784
+	adrp	x1, .LANCHOR167
+	ldrb	w1, [x1, #:lo12:.LANCHOR167]
+	cbz	w1, .L1784
 	mov	w1, w19
-	adrp	x0, .LC107
-	add	x0, x0, :lo12:.LC107
+	adrp	x0, .LC113
+	add	x0, x0, :lo12:.LC113
 	bl	printf
 	ldr	x0, [x22, #:lo12:.LANCHOR13]
 	mov	w1, 1
 	str	w1, [x0, 16]
-.L1732:
+.L1812:
 	mov	w0, -1
-.L1695:
+.L1775:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1701:
+.L1781:
 	uxtw	x1, w2
 	add	x1, x1, 84
 	ldr	w1, [x5, x1, lsl 2]
@@ -10361,70 +10889,70 @@ nandc_xfer:
 	and	w1, w4, w1, lsr 10
 	and	w3, w3, w1
 	ldr	w1, [x29, 56]
-	tbnz	x1, 2, .L1715
+	tbnz	x1, 2, .L1795
 	ldr	w1, [x29, 56]
-	tbnz	x1, 18, .L1715
+	tbnz	x1, 18, .L1795
 	ldr	w4, [x29, 56]
 	ldr	w1, [x29, 56]
 	ubfx	x4, x4, 3, 7
 	ubfx	x1, x1, 19, 7
 	cmp	w4, w1
 	ldr	w1, [x29, 56]
-	ble	.L1699
+	ble	.L1779
 	ubfx	x1, x1, 3, 7
-.L1700:
+.L1780:
 	cmp	w0, w1
 	csel	w0, w0, w1, cs
-.L1698:
+.L1778:
 	add	w2, w2, 1
-	b	.L1697
-.L1699:
+	b	.L1777
+.L1779:
 	ubfx	x1, x1, 19, 7
-	b	.L1700
-.L1715:
+	b	.L1780
+.L1795:
 	mov	w0, -1
-	b	.L1698
-.L1696:
-	adrp	x0, .LANCHOR46
+	b	.L1778
+.L1776:
+	adrp	x0, .LANCHOR50
 	lsr	w4, w19, 1
 	mov	w3, 64
 	mov	w1, 1
-	ldrb	w0, [x0, #:lo12:.LANCHOR46]
+	ldrb	w0, [x0, #:lo12:.LANCHOR50]
 	mov	w2, 0
-	adrp	x6, .LANCHOR49
+	adrp	x6, .LANCHOR53
 	cmp	w0, 25
 	mov	w0, 128
 	csel	w3, w3, w0, cc
 	mov	w0, 0
-.L1706:
+.L1786:
 	add	w5, w3, w0
 	cmp	w2, w4
-	bcc	.L1707
+	bcc	.L1787
 	adrp	x22, .LANCHOR13
 	lsr	w19, w19, 2
 	mov	w3, 0
 	mov	w0, 0
 	ldr	x4, [x22, #:lo12:.LANCHOR13]
-.L1708:
+.L1788:
 	cmp	w3, w19
-	bcc	.L1712
+	bcc	.L1792
 	str	wzr, [x4, 16]
 	mov	w1, 8192
 	movk	w1, 0x2, lsl 16
 	ldr	w19, [x4]
 	and	w1, w19, w1
 	cmp	w1, 139264
-	bne	.L1704
+	bne	.L1784
 	mov	w1, w19
-	adrp	x0, .LC108
-	add	x0, x0, :lo12:.LC108
+	adrp	x0, .LC114
+	add	x0, x0, :lo12:.LC114
 	bl	printf
 	ldr	x0, [x22, #:lo12:.LANCHOR13]
 	orr	w19, w19, 131072
 	str	w19, [x0]
-	b	.L1732
-.L1707:
-	ldr	x7, [x6, #:lo12:.LANCHOR49]
+	b	.L1812
+.L1787:
+	ldr	x7, [x6, #:lo12:.LANCHOR53]
 	and	x0, x0, 4294967292
 	ldr	w0, [x7, x0]
 	lsl	w7, w2, 2
@@ -10440,16 +10968,16 @@ nandc_xfer:
 	add	w1, w1, 4
 	strb	w0, [x21, x7]
 	mov	w0, w5
-	b	.L1706
-.L1712:
+	b	.L1786
+.L1792:
 	uxtw	x1, w3
 	add	x1, x1, 8
 	ldr	w1, [x4, x1, lsl 2]
 	str	w1, [x29, 56]
 	ldr	w1, [x29, 56]
-	tbnz	x1, 2, .L1718
+	tbnz	x1, 2, .L1798
 	ldr	w1, [x29, 56]
-	tbnz	x1, 15, .L1718
+	tbnz	x1, 15, .L1798
 	ldr	w2, [x29, 56]
 	ubfx	x6, x2, 3, 5
 	ldr	w2, [x29, 56]
@@ -10462,155 +10990,163 @@ nandc_xfer:
 	orr	w1, w5, w1, lsl 5
 	cmp	w2, w1
 	ldr	w1, [x29, 56]
-	bls	.L1710
+	bls	.L1790
 	ubfx	x2, x1, 3, 5
 	ldr	w1, [x29, 56]
 	ubfx	x1, x1, 27, 1
-.L1731:
+.L1811:
 	orr	w1, w2, w1, lsl 5
 	cmp	w0, w1
 	csel	w0, w0, w1, cs
-.L1709:
+.L1789:
 	add	w3, w3, 1
-	b	.L1708
-.L1710:
+	b	.L1788
+.L1790:
 	ubfx	x2, x1, 16, 5
 	ldr	w1, [x29, 56]
 	ubfx	x1, x1, 29, 1
-	b	.L1731
-.L1718:
+	b	.L1811
+.L1798:
 	mov	w0, -1
-	b	.L1709
-.L1704:
+	b	.L1789
+.L1784:
 	cmn	w0, #1
-	beq	.L1695
+	beq	.L1775
 	ldr	w1, [x21]
 	cmn	w1, #1
-	bne	.L1695
+	bne	.L1775
 	ldr	w1, [x21, 4]
 	cmn	w1, #1
-	bne	.L1695
+	bne	.L1775
 	ldr	w1, [x20]
 	cmn	w1, #1
 	mov	w1, 512
 	csel	w0, w0, w1, ne
-	b	.L1695
-.L1713:
+	b	.L1775
+.L1793:
 	mov	w0, 0
-	b	.L1695
+	b	.L1775
 	.size	nandc_xfer, .-nandc_xfer
 	.section	.text.flash_read_page,"ax",@progbits
 	.align	2
 	.global	flash_read_page
 	.type	flash_read_page, %function
 flash_read_page:
-	stp	x29, x30, [sp, -80]!
-	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	and	w21, w0, 255
+	stp	x29, x30, [sp, -32]!
+	and	w10, w0, 255
 	adrp	x0, .LANCHOR13
-	stp	x19, x20, [sp, 16]
-	mov	w19, 24
-	stp	x23, x24, [sp, 48]
-	ldr	x20, [x0, #:lo12:.LANCHOR13]
-	adrp	x0, .LANCHOR31
-	str	x25, [sp, 64]
-	mov	x24, x2
-	ldrb	w0, [x0, #:lo12:.LANCHOR31]
-	mov	w23, w4
-	ubfx	x22, x1, 24, 2
-	mov	x25, x3
-	sub	w0, w19, w0
-	mov	w19, 1
-	lsl	w19, w19, w0
-	adrp	x0, .LANCHOR14
-	sub	w19, w19, #1
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	and	w19, w19, w1
-	tbz	x0, 4, .L1734
-	mov	w3, w1
-	adrp	x0, .LC109
-	mov	w2, w22
-	mov	w1, w21
-	add	x0, x0, :lo12:.LC109
-	bl	printf
-.L1734:
+	mov	w8, 24
+	add	x29, sp, 0
+	ldr	x14, [x0, #:lo12:.LANCHOR13]
+	adrp	x0, .LANCHOR32
+	mov	x12, x2
+	mov	x13, x3
+	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	mov	w11, w4
+	ubfx	x15, x1, 24, 2
+	str	x19, [sp, 16]
+	sub	w0, w8, w0
+	mov	w8, 1
+	adrp	x19, .LANCHOR16
+	lsl	w8, w8, w0
+	sub	w8, w8, #1
+	and	w8, w8, w1
 	bl	nandc_wait_flash_ready
-	mov	w0, w21
+	mov	w0, w10
 	bl	nandc_cs
-	adrp	x8, .LANCHOR16
-	cbnz	w22, .L1735
-	mov	w0, w21
+	cbnz	w15, .L1814
+	mov	w0, w10
 	bl	zftl_flash_enter_slc_mode
-.L1736:
-	ubfiz	x4, x21, 8, 8
-	and	w0, w19, 255
-	add	x4, x20, x4
+.L1815:
+	ldr	x1, [x19, #:lo12:.LANCHOR16]
+	ldrb	w0, [x1, 7]
+	cmp	w0, 1
+	bne	.L1817
+	ldrb	w0, [x1, 12]
+	cmp	w0, 2
+	bne	.L1817
+	sxtw	x0, w10
+	mov	w2, 38
+	add	x0, x0, 8
+	add	x0, x14, x0, lsl 8
+	str	w2, [x0, 8]
+.L1817:
+	ubfiz	x4, x10, 8, 8
+	and	w0, w8, 255
+	add	x4, x14, x4
 	str	wzr, [x4, 2056]
 	str	wzr, [x4, 2052]
 	str	wzr, [x4, 2052]
 	str	w0, [x4, 2052]
-	lsr	w0, w19, 8
+	lsr	w0, w8, 8
 	str	w0, [x4, 2052]
-	lsr	w0, w19, 16
+	lsr	w0, w8, 16
 	str	w0, [x4, 2052]
+	adrp	x0, .LANCHOR31
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	cbz	w0, .L1818
+	lsr	w0, w8, 24
+	str	w0, [x4, 2052]
+.L1818:
 	mov	w0, 48
 	str	w0, [x4, 2056]
-	ldr	x0, [x8, #:lo12:.LANCHOR16]
-	ldrb	w0, [x0, 12]
+	ldrb	w0, [x1, 12]
 	cmp	w0, 3
-	bne	.L1738
-	cbz	w22, .L1738
-	adrp	x0, .LANCHOR35
-	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbnz	w0, .L1738
-	add	w19, w19, w19, lsl 1
-	sub	w0, w19, #1
-	add	w0, w0, w22
-.L1747:
+	bne	.L1819
+	cbz	w15, .L1819
+	adrp	x0, .LANCHOR36
+	ldrb	w0, [x0, #:lo12:.LANCHOR36]
+	cbnz	w0, .L1819
+	adrp	x0, .LANCHOR37
+	ldrb	w0, [x0, #:lo12:.LANCHOR37]
+	cbnz	w0, .L1819
+	add	w8, w8, w8, lsl 1
+	sub	w0, w8, #1
+	add	w0, w0, w15
+.L1828:
 	bl	nandc_set_seed
 	bl	nandc_wait_flash_ready
+	mov	w2, w11
 	mov	w0, 5
 	str	w0, [x4, 2056]
 	str	wzr, [x4, 2052]
 	mov	w0, 224
 	str	wzr, [x4, 2052]
-	mov	w2, w23
+	mov	x3, x12
 	str	w0, [x4, 2056]
-	mov	x3, x24
-	mov	x4, x25
 	mov	w1, 0
-	mov	w0, w21
+	mov	x4, x13
+	mov	w0, w10
 	bl	nandc_xfer
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.31
-	ldr	x25, [sp, 64]
+	bl	nandc_de_cs.constprop.33
+	ldr	x19, [sp, 16]
 	mov	w0, w2
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 80
+	ldp	x29, x30, [sp], 32
 	ret
-.L1735:
-	ldr	x0, [x8, #:lo12:.LANCHOR16]
+.L1814:
+	ldr	x0, [x19, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1737
-	adrp	x0, .LANCHOR35
-	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbnz	w0, .L1737
-	sxtw	x0, w21
+	bne	.L1816
+	adrp	x0, .LANCHOR36
+	ldrb	w0, [x0, #:lo12:.LANCHOR36]
+	cbnz	w0, .L1816
+	adrp	x0, .LANCHOR37
+	ldrb	w0, [x0, #:lo12:.LANCHOR37]
+	cbnz	w0, .L1816
+	sxtw	x0, w10
 	add	x0, x0, 8
-	add	x0, x20, x0, lsl 8
-	str	w22, [x0, 8]
-	b	.L1736
-.L1737:
-	mov	w0, w21
+	add	x0, x14, x0, lsl 8
+	str	w15, [x0, 8]
+	b	.L1815
+.L1816:
+	mov	w0, w10
 	bl	zftl_flash_exit_slc_mode
-	b	.L1736
-.L1738:
-	mov	w0, w19
-	b	.L1747
+	b	.L1815
+.L1819:
+	mov	w0, w8
+	b	.L1828
 	.size	flash_read_page, .-flash_read_page
 	.section	.text.micron_read_retrial,"ax",@progbits
 	.align	2
@@ -10620,39 +11156,43 @@ micron_read_retrial:
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	and	w20, w0, 255
-	adrp	x0, .LANCHOR46
+	and	w19, w0, 255
+	adrp	x0, .LANCHOR50
 	stp	x25, x26, [sp, 64]
-	stp	x21, x22, [sp, 32]
+	str	w4, [x29, 116]
 	mov	x26, x3
+	str	x2, [x29, 120]
+	stp	x21, x22, [sp, 32]
+	mov	w22, 0
 	stp	x23, x24, [sp, 48]
 	mov	w23, w1
-	ldrb	w19, [x0, #:lo12:.LANCHOR46]
-	mov	w22, 0
+	ldrb	w20, [x0, #:lo12:.LANCHOR50]
 	stp	x27, x28, [sp, 80]
-	str	w4, [x29, 116]
-	str	x2, [x29, 120]
 	bl	nandc_wait_flash_ready
+	mov	w0, w19
+	bl	zftl_flash_enter_slc_mode
+	mov	w0, w19
+	bl	zftl_flash_exit_slc_mode
 	adrp	x0, .LANCHOR13
-	add	w19, w19, w19, lsl 1
-	asr	w19, w19, 2
+	add	w20, w20, w20, lsl 1
+	asr	w20, w20, 2
 	ldr	x6, [x0, #:lo12:.LANCHOR13]
-	adrp	x0, .LANCHOR164
-	add	x0, x0, :lo12:.LANCHOR164
+	adrp	x0, .LANCHOR169
+	add	x0, x0, :lo12:.LANCHOR169
 	str	x0, [x29, 104]
-	ubfiz	x0, x20, 8, 8
+	ubfiz	x0, x19, 8, 8
 	add	x25, x6, x0
-.L1749:
+.L1830:
 	adrp	x24, .LANCHOR14
 	add	x24, x24, :lo12:.LANCHOR14
 	mov	w21, 0
 	mov	w28, -1
-.L1750:
+.L1831:
 	ldr	x0, [x29, 104]
 	ldrb	w0, [x0]
 	cmp	w21, w0
-	bcc	.L1755
-.L1754:
+	bcc	.L1836
+.L1835:
 	mov	w0, 239
 	str	w0, [x25, 2056]
 	mov	w0, 137
@@ -10661,36 +11201,36 @@ micron_read_retrial:
 	bl	timer_delay_ns
 	str	wzr, [x25, 2048]
 	str	wzr, [x25, 2048]
-	cmp	w28, w19
+	cmp	w28, w20
 	str	wzr, [x25, 2048]
 	str	wzr, [x25, 2048]
-	bcc	.L1756
+	bcc	.L1837
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L1756:
+.L1837:
 	cmn	w28, #1
 	cset	w24, eq
 	cmp	w28, 256
 	cset	w0, eq
 	orr	w0, w24, w0
-	cbz	w0, .L1757
+	cbz	w0, .L1838
 	mov	w4, w28
 	mov	w3, w21
 	mov	w2, w23
 	mov	w1, w21
-	adrp	x0, .LC111
-	add	x0, x0, :lo12:.LC111
+	adrp	x0, .LC116
+	add	x0, x0, :lo12:.LC116
 	bl	printf
 	eor	w0, w22, 1
 	tst	w24, w0
-	beq	.L1758
+	beq	.L1839
 	mov	w1, 3
-	mov	w0, w20
+	mov	w0, w19
 	mov	w22, 1
 	bl	mt_auto_read_calibration_config
-	b	.L1749
-.L1755:
+	b	.L1830
+.L1836:
 	mov	w0, 239
 	str	w0, [x25, 2056]
 	mov	w0, 137
@@ -10704,49 +11244,49 @@ micron_read_retrial:
 	ldr	w4, [x29, 116]
 	mov	w1, w23
 	ldr	x2, [x29, 120]
-	mov	w0, w20
+	mov	w0, w19
 	str	wzr, [x25, 2048]
 	str	wzr, [x25, 2048]
 	bl	flash_read_page
 	mov	w7, w0
 	ldr	w0, [x24]
-	tbz	x0, 12, .L1751
+	tbz	x0, 12, .L1832
 	mov	w4, w7
 	str	w7, [x29, 112]
 	mov	w3, w28
 	mov	w2, w23
 	mov	w1, w21
-	adrp	x0, .LC110
-	add	x0, x0, :lo12:.LC110
+	adrp	x0, .LC115
+	add	x0, x0, :lo12:.LC115
 	bl	printf
 	ldr	w7, [x29, 112]
-.L1751:
+.L1832:
 	cmn	w7, #1
-	beq	.L1752
-	adrp	x0, .LANCHOR161
+	beq	.L1833
+	adrp	x0, .LANCHOR166
 	cmn	w28, #1
 	csel	w28, w28, w7, ne
-	cmp	w7, w19
-	ldr	x0, [x0, #:lo12:.LANCHOR161]
+	cmp	w7, w20
+	ldr	x0, [x0, #:lo12:.LANCHOR166]
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR163
-	ldr	x26, [x0, #:lo12:.LANCHOR163]
-	bcc	.L1761
-.L1752:
+	adrp	x0, .LANCHOR168
+	ldr	x26, [x0, #:lo12:.LANCHOR168]
+	bcc	.L1842
+.L1833:
 	mov	w21, w27
-	b	.L1750
-.L1761:
+	b	.L1831
+.L1842:
 	mov	w28, w7
-	b	.L1754
-.L1758:
-	cbz	w22, .L1759
-	mov	w0, w20
+	b	.L1835
+.L1839:
+	cbz	w22, .L1840
+	mov	w0, w19
 	mov	w1, 0
 	bl	mt_auto_read_calibration_config
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L1759:
+.L1840:
 	bl	nandc_wait_flash_ready
 	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
@@ -10756,13 +11296,13 @@ micron_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1757:
-	cbz	w22, .L1759
+.L1838:
+	cbz	w22, .L1840
 	mov	w1, 0
-	mov	w0, w20
+	mov	w0, w19
 	mov	w28, 256
 	bl	mt_auto_read_calibration_config
-	b	.L1759
+	b	.L1840
 	.size	micron_read_retrial, .-micron_read_retrial
 	.section	.text.toshiba_3d_read_retrial,"ax",@progbits
 	.align	2
@@ -10803,17 +11343,17 @@ toshiba_3d_read_retrial:
 	csel	w0, w1, w0, ne
 	str	w0, [x29, 136]
 	add	x0, x22, :lo12:.LANCHOR24
-	cbnz	w4, .L1779
+	cbnz	w4, .L1860
 	str	x0, [x29, 120]
 	sxtw	x0, w24
 	add	x0, x0, 8
 	add	x0, x25, x0, lsl 8
 	str	x0, [x29, 112]
-.L1786:
+.L1867:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, 36
-	bne	.L1780
+	bne	.L1861
 	mov	w1, w20
 	mov	x0, x21
 	mov	w2, 0
@@ -10821,7 +11361,7 @@ toshiba_3d_read_retrial:
 	ldr	x1, [x29, 112]
 	mov	w0, 93
 	str	w0, [x1, 8]
-.L1781:
+.L1862:
 	mov	w4, w28
 	mov	x3, x27
 	mov	x2, x26
@@ -10831,60 +11371,60 @@ toshiba_3d_read_retrial:
 	mov	w4, w0
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 4, .L1782
+	tbz	x0, 4, .L1863
 	mov	w3, w4
 	str	w4, [x29, 108]
 	mov	w2, w23
 	mov	w1, w20
-	adrp	x0, .LC112
-	add	x0, x0, :lo12:.LC112
+	adrp	x0, .LC117
+	add	x0, x0, :lo12:.LC117
 	bl	printf
 	ldr	w4, [x29, 108]
-.L1782:
+.L1863:
 	cmn	w4, #1
-	beq	.L1783
-	adrp	x0, .LANCHOR161
+	beq	.L1864
+	adrp	x0, .LANCHOR166
 	cmn	w19, #1
 	csel	w19, w19, w4, ne
-	ldr	x26, [x0, #:lo12:.LANCHOR161]
-	adrp	x0, .LANCHOR163
-	ldr	x27, [x0, #:lo12:.LANCHOR163]
-	adrp	x0, .LANCHOR46
-	ldrb	w0, [x0, #:lo12:.LANCHOR46]
+	ldr	x26, [x0, #:lo12:.LANCHOR166]
+	adrp	x0, .LANCHOR168
+	ldr	x27, [x0, #:lo12:.LANCHOR168]
+	adrp	x0, .LANCHOR50
+	ldrb	w0, [x0, #:lo12:.LANCHOR50]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1801
-.L1783:
+	bcc	.L1882
+.L1864:
 	ldr	w0, [x29, 136]
 	add	w20, w20, 1
 	cmp	w0, w20
-	bne	.L1786
-.L1785:
+	bne	.L1867
+.L1866:
 	ldrb	w0, [x22, #:lo12:.LANCHOR24]
 	cmp	w0, 36
-	bne	.L1787
+	bne	.L1868
 	mov	w2, 0
-.L1824:
+.L1905:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_tlc_set_rr_para
-	b	.L1788
-.L1780:
+	b	.L1869
+.L1861:
 	mov	w1, w20
 	mov	x0, x21
 	bl	toshiba_3d_set_slc_rr_para
-	b	.L1781
-.L1801:
+	b	.L1862
+.L1882:
 	mov	w19, w4
-	b	.L1785
-.L1787:
+	b	.L1866
+.L1868:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_3d_set_slc_rr_para
-.L1788:
+.L1869:
 	ldrb	w0, [x22, #:lo12:.LANCHOR24]
 	cmp	w0, 36
-	bne	.L1797
+	bne	.L1878
 	ldr	x0, [x29, 128]
 	add	x25, x25, x0, lsl 8
 	mov	w0, 85
@@ -10893,27 +11433,27 @@ toshiba_3d_read_retrial:
 	str	wzr, [x25, 2052]
 	str	wzr, [x25, 2048]
 	str	w0, [x25, 2056]
-.L1797:
-	adrp	x0, .LANCHOR46
-	ldrb	w0, [x0, #:lo12:.LANCHOR46]
+.L1878:
+	adrp	x0, .LANCHOR50
+	ldrb	w0, [x0, #:lo12:.LANCHOR50]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L1798
+	bcc	.L1879
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L1798:
+.L1879:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L1799
-	adrp	x0, .LC114
+	bne	.L1880
+	adrp	x0, .LC119
 	mov	w4, w19
 	mov	w3, w20
 	mov	w2, w23
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC114
+	add	x0, x0, :lo12:.LC119
 	bl	printf
-.L1799:
+.L1880:
 	bl	nandc_wait_flash_ready
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
@@ -10923,23 +11463,23 @@ toshiba_3d_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1779:
+.L1860:
 	str	x0, [x29, 112]
 	sxtw	x0, w24
 	add	x0, x0, 8
 	add	x0, x25, x0, lsl 8
 	str	x0, [x29, 136]
-.L1795:
+.L1876:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
 	cmp	w0, 36
-	bne	.L1789
+	bne	.L1870
 	mov	x0, x21
 	mov	w2, 1
 	mov	w1, w20
 	bl	toshiba_tlc_set_rr_para
 	mov	w0, 93
-.L1823:
+.L1904:
 	ldr	x1, [x29, 136]
 	mov	w4, w28
 	mov	x3, x27
@@ -10951,54 +11491,54 @@ toshiba_3d_read_retrial:
 	mov	w4, w0
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 4, .L1791
+	tbz	x0, 4, .L1872
 	mov	w3, w4
 	str	w4, [x29, 108]
 	mov	w2, w23
 	mov	w1, w20
-	adrp	x0, .LC113
-	add	x0, x0, :lo12:.LC113
+	adrp	x0, .LC118
+	add	x0, x0, :lo12:.LC118
 	bl	printf
 	ldr	w4, [x29, 108]
-.L1791:
+.L1872:
 	cmn	w4, #1
-	beq	.L1792
-	adrp	x0, .LANCHOR161
+	beq	.L1873
+	adrp	x0, .LANCHOR166
 	cmn	w19, #1
 	csel	w19, w19, w4, ne
-	ldr	x26, [x0, #:lo12:.LANCHOR161]
-	adrp	x0, .LANCHOR163
-	ldr	x27, [x0, #:lo12:.LANCHOR163]
-	adrp	x0, .LANCHOR46
-	ldrb	w0, [x0, #:lo12:.LANCHOR46]
+	ldr	x26, [x0, #:lo12:.LANCHOR166]
+	adrp	x0, .LANCHOR168
+	ldr	x27, [x0, #:lo12:.LANCHOR168]
+	adrp	x0, .LANCHOR50
+	ldrb	w0, [x0, #:lo12:.LANCHOR50]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1802
-.L1792:
+	bcc	.L1883
+.L1873:
 	ldr	w0, [x29, 120]
 	add	w20, w20, 1
 	cmp	w0, w20
-	bne	.L1795
-.L1794:
+	bne	.L1876
+.L1875:
 	ldrb	w0, [x22, #:lo12:.LANCHOR24]
 	cmp	w0, 36
-	bne	.L1796
+	bne	.L1877
 	mov	w2, 1
-	b	.L1824
-.L1789:
+	b	.L1905
+.L1870:
 	mov	x0, x21
 	mov	w1, w20
 	bl	toshiba_3d_set_tlc_rr_para
 	mov	w0, 38
-	b	.L1823
-.L1802:
+	b	.L1904
+.L1883:
 	mov	w19, w4
-	b	.L1794
-.L1796:
+	b	.L1875
+.L1877:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_3d_set_tlc_rr_para
-	b	.L1788
+	b	.L1869
 	.size	toshiba_3d_read_retrial, .-toshiba_3d_read_retrial
 	.section	.text.toshiba_read_retrial,"ax",@progbits
 	.align	2
@@ -11010,14 +11550,18 @@ toshiba_read_retrial:
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	mov	w25, w1
-	stp	x19, x20, [sp, 16]
 	mov	x26, x2
-	stp	x27, x28, [sp, 80]
+	str	w4, [x29, 116]
+	stp	x19, x20, [sp, 16]
 	and	w19, w0, 255
-	stp	x23, x24, [sp, 48]
+	stp	x27, x28, [sp, 80]
 	mov	x27, x3
-	str	w4, [x29, 116]
+	stp	x23, x24, [sp, 48]
 	bl	nandc_wait_flash_ready
+	mov	w0, w19
+	bl	zftl_flash_enter_slc_mode
+	mov	w0, w19
+	bl	zftl_flash_exit_slc_mode
 	adrp	x0, .LANCHOR13
 	adrp	x1, .LANCHOR24
 	str	x1, [x29, 120]
@@ -11030,35 +11574,35 @@ toshiba_read_retrial:
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
-	bls	.L1843
+	bls	.L1924
 	adrp	x0, .LANCHOR21
 	ldrb	w0, [x0, #:lo12:.LANCHOR21]
-	cbz	w0, .L1844
+	cbz	w0, .L1925
 	mov	w23, 1
 	mov	w0, 1
 	bl	nandc_set_if_mode
-.L1827:
+.L1908:
 	and	x0, x19, 255
 	mov	w1, 92
 	add	x0, x22, x0, lsl 8
 	str	w1, [x0, 2056]
 	mov	w1, 197
 	str	w1, [x0, 2056]
-.L1826:
+.L1907:
 	sxtw	x0, w19
 	mov	w20, 1
 	add	x0, x0, 8
 	mov	w24, -1
 	add	x0, x22, x0, lsl 8
 	str	x0, [x29, 96]
-.L1828:
-	adrp	x0, .LANCHOR164
-	ldrb	w0, [x0, #:lo12:.LANCHOR164]
+.L1909:
+	adrp	x0, .LANCHOR169
+	ldrb	w0, [x0, #:lo12:.LANCHOR169]
 	add	w0, w0, 1
 	cmp	w20, w0
-	bcc	.L1837
+	bcc	.L1918
 	mov	w28, w24
-.L1836:
+.L1917:
 	ldr	x0, [x29, 120]
 	mov	w1, 0
 	ldrb	w0, [x0, #:lo12:.LANCHOR24]
@@ -11066,39 +11610,39 @@ toshiba_read_retrial:
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x21
-	bhi	.L1838
+	bhi	.L1919
 	bl	sandisk_set_rr_para
-.L1839:
+.L1920:
 	sxtw	x19, w19
 	mov	w0, 255
 	add	x19, x19, 8
 	add	x22, x22, x19, lsl 8
 	str	w0, [x22, 8]
-	adrp	x0, .LANCHOR46
-	ldrb	w0, [x0, #:lo12:.LANCHOR46]
+	adrp	x0, .LANCHOR50
+	ldrb	w0, [x0, #:lo12:.LANCHOR50]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L1840
+	bcc	.L1921
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L1840:
+.L1921:
 	cmp	w28, 256
 	ccmn	w28, #1, 4, ne
-	bne	.L1841
-	adrp	x0, .LC114
+	bne	.L1922
+	adrp	x0, .LC119
 	mov	w4, w28
 	mov	w3, w20
 	mov	w2, w25
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC114
+	add	x0, x0, :lo12:.LC119
 	bl	printf
-.L1841:
+.L1922:
 	bl	nandc_wait_flash_ready
-	cbz	w23, .L1825
+	cbz	w23, .L1906
 	mov	w0, 4
 	bl	nandc_set_if_mode
-.L1825:
+.L1906:
 	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11107,13 +11651,13 @@ toshiba_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1844:
+.L1925:
 	mov	w23, 0
-	b	.L1827
-.L1843:
+	b	.L1908
+.L1924:
 	mov	w23, 0
-	b	.L1826
-.L1837:
+	b	.L1907
+.L1918:
 	ldr	x0, [x29, 120]
 	mov	w1, w20
 	ldrb	w0, [x0, #:lo12:.LANCHOR24]
@@ -11121,22 +11665,22 @@ toshiba_read_retrial:
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x21
-	bhi	.L1829
+	bhi	.L1910
 	bl	sandisk_set_rr_para
-.L1830:
+.L1911:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0, #:lo12:.LANCHOR24]
 	cmp	w0, 34
-	bne	.L1831
-	adrp	x0, .LANCHOR164
-	ldrb	w0, [x0, #:lo12:.LANCHOR164]
+	bne	.L1912
+	adrp	x0, .LANCHOR169
+	ldrb	w0, [x0, #:lo12:.LANCHOR169]
 	sub	w0, w0, #3
 	cmp	w20, w0
-	bne	.L1831
+	bne	.L1912
 	ldr	x1, [x29, 96]
 	mov	w0, 179
 	str	w0, [x1, 8]
-.L1831:
+.L1912:
 	ldr	x0, [x29, 104]
 	mov	w1, 38
 	ldr	w4, [x29, 116]
@@ -11151,85 +11695,114 @@ toshiba_read_retrial:
 	bl	flash_read_page
 	mov	w28, w0
 	cmn	w0, #1
-	beq	.L1834
+	beq	.L1915
 	cmn	w24, #1
 	csel	w24, w24, w0, ne
-	adrp	x0, .LANCHOR161
-	ldr	x26, [x0, #:lo12:.LANCHOR161]
-	adrp	x0, .LANCHOR163
-	ldr	x27, [x0, #:lo12:.LANCHOR163]
-	adrp	x0, .LANCHOR46
-	ldrb	w0, [x0, #:lo12:.LANCHOR46]
+	adrp	x0, .LANCHOR166
+	ldr	x26, [x0, #:lo12:.LANCHOR166]
+	adrp	x0, .LANCHOR168
+	ldr	x27, [x0, #:lo12:.LANCHOR168]
+	adrp	x0, .LANCHOR50
+	ldrb	w0, [x0, #:lo12:.LANCHOR50]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L1836
-.L1834:
+	bcc	.L1917
+.L1915:
 	add	w20, w20, 1
-	b	.L1828
-.L1829:
+	b	.L1909
+.L1910:
 	bl	toshiba_set_rr_para
-	b	.L1830
-.L1838:
+	b	.L1911
+.L1919:
 	bl	toshiba_set_rr_para
-	b	.L1839
+	b	.L1920
 	.size	toshiba_read_retrial, .-toshiba_read_retrial
-	.section	.text.hynix_read_retrial,"ax",@progbits
+	.section	.text.ymtc_3d_read_retrial,"ax",@progbits
 	.align	2
-	.global	hynix_read_retrial
-	.type	hynix_read_retrial, %function
-hynix_read_retrial:
-	stp	x29, x30, [sp, -128]!
+	.global	ymtc_3d_read_retrial
+	.type	ymtc_3d_read_retrial, %function
+ymtc_3d_read_retrial:
+	stp	x29, x30, [sp, -112]!
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	and	x23, x0, 255
-	adrp	x0, .LANCHOR27
-	stp	x27, x28, [sp, 80]
-	stp	x21, x22, [sp, 32]
-	mov	w27, w4
-	ldr	x28, [x0, #:lo12:.LANCHOR27]
-	mov	w22, w1
-	stp	x25, x26, [sp, 64]
-	mov	x25, x2
-	add	x28, x28, 112
 	stp	x19, x20, [sp, 16]
-	add	x0, x28, x23
-	mov	x26, x3
-	mov	x21, x23
 	mov	w19, -1
-	ldrb	w24, [x28, 2]
-	ldrb	w20, [x0, 8]
+	stp	x21, x22, [sp, 32]
+	and	w22, w0, 255
+	stp	x23, x24, [sp, 48]
+	mov	w23, w1
+	stp	x25, x26, [sp, 64]
+	mov	x24, x2
+	stp	x27, x28, [sp, 80]
+	mov	x25, x3
+	mov	w26, w4
 	bl	nandc_wait_flash_ready
-	adrp	x6, .LANCHOR46
-	add	x6, x6, :lo12:.LANCHOR46
-	mov	w5, 0
-	adrp	x7, .LANCHOR161
-	adrp	x8, .LANCHOR163
-.L1858:
-	cmp	w5, w24
-	bcc	.L1863
-.L1862:
-	adrp	x0, .LANCHOR46
-	add	x23, x28, x23
-	ldrb	w0, [x0, #:lo12:.LANCHOR46]
-	strb	w20, [x23, 8]
+	mov	w0, w22
+	bl	zftl_flash_enter_slc_mode
+	mov	w0, w22
+	bl	zftl_flash_exit_slc_mode
+	adrp	x1, .LANCHOR13
+	ubfiz	x21, x22, 8, 8
+	add	x0, x21, 2048
+	adrp	x27, .LANCHOR50
+	ldr	x21, [x1, #:lo12:.LANCHOR13]
+	mov	w20, 1
+	adrp	x28, .LANCHOR166
+	adrp	x5, .LANCHOR168
+	add	x21, x21, x0
+	add	x27, x27, :lo12:.LANCHOR50
+	tst	x23, 50331648
+	bne	.L1948
+.L1943:
+	str	x5, [x29, 104]
+	mov	w1, w20
+	mov	x0, x21
+	bl	ymtc_3d_set_slc_rr_para
+	mov	w4, w26
+	mov	x3, x25
+	mov	x2, x24
+	mov	w1, w23
+	mov	w0, w22
+	bl	flash_read_page
+	ldr	x5, [x29, 104]
+	cmn	w0, #1
+	beq	.L1940
+	ldrb	w1, [x27]
+	cmn	w19, #1
+	csel	w19, w19, w0, ne
+	ldr	x24, [x28, #:lo12:.LANCHOR166]
+	ldr	x25, [x5, #:lo12:.LANCHOR168]
+	add	w1, w1, w1, lsl 1
+	cmp	w0, w1, lsr 2
+	bcc	.L1951
+.L1940:
+	add	w20, w20, 1
+	cmp	w20, 10
+	bne	.L1943
+.L1942:
+	mov	w1, 0
+	mov	x0, x21
+	bl	ymtc_3d_set_slc_rr_para
+.L1944:
+	adrp	x0, .LANCHOR50
+	ldrb	w0, [x0, #:lo12:.LANCHOR50]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L1864
+	bcc	.L1949
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L1864:
+.L1949:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L1865
-	adrp	x0, .LC115
+	bne	.L1950
+	adrp	x0, .LC120
 	mov	w4, w19
-	mov	w3, w5
-	mov	w2, w22
-	mov	w1, w5
-	add	x0, x0, :lo12:.LC115
+	mov	w3, w20
+	mov	w2, w23
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC120
 	bl	printf
-.L1865:
+.L1950:
 	bl	nandc_wait_flash_ready
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
@@ -11237,44 +11810,351 @@ hynix_read_retrial:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 128
+	ldp	x29, x30, [sp], 112
 	ret
-.L1863:
-	add	w20, w20, 1
-	stp	x6, x8, [x29, 96]
-	and	w20, w20, 255
-	str	x7, [x29, 112]
-	cmp	w24, w20
-	str	w5, [x29, 124]
-	csel	w20, w20, wzr, hi
-	mov	w0, w21
+.L1951:
+	mov	w19, w0
+	b	.L1942
+.L1948:
+	str	x5, [x29, 104]
 	mov	w1, w20
-	bl	hynix_set_rr_para
-	mov	w4, w27
-	mov	x3, x26
-	mov	x2, x25
-	mov	w1, w22
-	mov	w0, w21
-	bl	flash_read_page
-	ldr	w5, [x29, 124]
-	cmn	w0, #1
-	ldp	x6, x8, [x29, 96]
+	mov	x0, x21
+	bl	ymtc_3d_set_tlc_rr_para
+	mov	w4, w26
+	mov	x3, x25
+	mov	x2, x24
+	mov	w1, w23
+	mov	w0, w22
+	bl	flash_read_page
+	ldr	x5, [x29, 104]
+	cmn	w0, #1
+	beq	.L1945
+	ldrb	w1, [x27]
+	cmn	w19, #1
+	csel	w19, w19, w0, ne
+	ldr	x24, [x28, #:lo12:.LANCHOR166]
+	ldr	x25, [x5, #:lo12:.LANCHOR168]
+	add	w1, w1, w1, lsl 1
+	cmp	w0, w1, lsr 2
+	bcc	.L1952
+.L1945:
+	add	w20, w20, 1
+	cmp	w20, 51
+	bne	.L1948
+.L1947:
+	mov	w1, 0
+	mov	x0, x21
+	bl	ymtc_3d_set_tlc_rr_para
+	b	.L1944
+.L1952:
+	mov	w19, w0
+	b	.L1947
+	.size	ymtc_3d_read_retrial, .-ymtc_3d_read_retrial
+	.section	.text.samsung_read_retrial,"ax",@progbits
+	.align	2
+	.global	samsung_read_retrial
+	.type	samsung_read_retrial, %function
+samsung_read_retrial:
+	stp	x29, x30, [sp, -112]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	and	w21, w0, 255
+	mov	x22, x2
+	stp	x19, x20, [sp, 16]
+	str	w4, [x29, 108]
+	mov	w20, w1
+	stp	x23, x24, [sp, 48]
+	mov	x23, x3
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	bl	nandc_wait_flash_ready
+	mov	w0, w21
+	bl	zftl_flash_enter_slc_mode
+	mov	w0, w21
+	bl	zftl_flash_exit_slc_mode
+	adrp	x0, .LANCHOR13
+	tst	x20, 50331648
+	and	x5, x21, 255
+	ldr	x0, [x0, #:lo12:.LANCHOR13]
+	bne	.L1968
+	adrp	x24, .LANCHOR170
+	adrp	x27, .LC121
+	add	x28, x0, x5, lsl 8
+	add	x24, x24, :lo12:.LANCHOR170
+	add	x27, x27, :lo12:.LC121
+	mov	x26, 0
+	mov	w25, -1
+.L1973:
+	mov	w0, 239
+	str	w0, [x28, 2056]
+	mov	w0, 141
+	str	w0, [x28, 2052]
+	add	x0, x24, x26
+	add	w19, w26, 1
+	ldrsb	w0, [x0, 1]
+	str	w0, [x28, 2048]
+	str	wzr, [x28, 2048]
+	str	wzr, [x28, 2048]
+	str	wzr, [x28, 2048]
+	bl	nandc_wait_flash_ready
+	ldr	w4, [x29, 108]
+	mov	x3, x23
+	mov	x2, x22
+	mov	w1, w20
+	mov	w0, w21
+	bl	flash_read_page
+	mov	w4, w0
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 4, .L1969
+	mov	w3, w4
+	str	w4, [x29, 104]
+	mov	w2, w20
+	mov	w1, w19
+	mov	x0, x27
+	bl	printf
+	ldr	w4, [x29, 104]
+.L1969:
+	cmn	w4, #1
+	beq	.L1970
+	adrp	x0, .LANCHOR166
+	cmn	w25, #1
+	csel	w25, w25, w4, ne
+	ldr	x22, [x0, #:lo12:.LANCHOR166]
+	adrp	x0, .LANCHOR168
+	ldr	x23, [x0, #:lo12:.LANCHOR168]
+	adrp	x0, .LANCHOR50
+	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	add	w0, w0, w0, lsl 1
+	cmp	w4, w0, lsr 2
+	bcc	.L1982
+.L1970:
+	add	x26, x26, 1
+	cmp	x26, 25
+	bne	.L1973
+	mov	w19, 26
+.L1972:
+	mov	w0, 239
+	str	w0, [x28, 2056]
+	mov	w0, 141
+	str	w0, [x28, 2052]
+	str	wzr, [x28, 2048]
+	str	wzr, [x28, 2048]
+	str	wzr, [x28, 2048]
+	str	wzr, [x28, 2048]
+.L2004:
+	bl	nandc_wait_flash_ready
+	adrp	x0, .LANCHOR50
+	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	add	w0, w0, w0, lsl 1
+	cmp	w25, w0, lsr 2
+	bcc	.L1980
+	cmn	w25, #1
+	mov	w0, 256
+	csel	w25, w25, w0, eq
+.L1980:
+	cmp	w25, 256
+	ccmn	w25, #1, 4, ne
+	bne	.L1981
+	adrp	x0, .LC123
+	mov	w4, w25
+	mov	w3, w19
+	mov	w2, w20
+	mov	w1, w19
+	add	x0, x0, :lo12:.LC123
+	bl	printf
+.L1981:
+	bl	nandc_wait_flash_ready
+	mov	w0, w25
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L1982:
+	mov	w25, w4
+	b	.L1972
+.L1968:
+	adrp	x7, .LANCHOR171
+	add	x7, x7, :lo12:.LANCHOR171
+	adrp	x24, .LC122
+	add	x28, x7, 4
+	add	x27, x0, x5, lsl 8
+	add	x24, x24, :lo12:.LC122
+	mov	w25, -1
+	mov	w19, 1
+	mov	w26, 137
+.L1979:
+	mov	w0, 239
+	str	w0, [x27, 2056]
+	str	w26, [x27, 2052]
+	ldrb	w0, [x28]
+	str	w0, [x27, 2048]
+	ldrb	w0, [x28, 1]
+	str	w0, [x27, 2048]
+	ldrb	w0, [x28, 2]
+	str	w0, [x27, 2048]
+	ldrb	w0, [x28, 3]
+	str	w0, [x27, 2048]
+	bl	nandc_wait_flash_ready
+	ldr	w4, [x29, 108]
+	mov	x3, x23
+	mov	x2, x22
+	mov	w1, w20
+	mov	w0, w21
+	bl	flash_read_page
+	mov	w4, w0
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 4, .L1975
+	mov	w3, w4
+	str	w4, [x29, 104]
+	mov	w2, w20
+	mov	w1, w19
+	mov	x0, x24
+	bl	printf
+	ldr	w4, [x29, 104]
+.L1975:
+	cmn	w4, #1
+	beq	.L1976
+	adrp	x0, .LANCHOR166
+	cmn	w25, #1
+	csel	w25, w25, w4, ne
+	ldr	x22, [x0, #:lo12:.LANCHOR166]
+	adrp	x0, .LANCHOR168
+	ldr	x23, [x0, #:lo12:.LANCHOR168]
+	adrp	x0, .LANCHOR50
+	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	add	w0, w0, w0, lsl 1
+	cmp	w4, w0, lsr 2
+	bcc	.L1983
+.L1976:
+	add	w19, w19, 1
+	add	x28, x28, 4
+	cmp	w19, 26
+	bne	.L1979
+.L1978:
+	mov	w0, 239
+	str	w0, [x27, 2056]
+	mov	w0, 137
+	str	w0, [x27, 2052]
+	str	wzr, [x27, 2048]
+	str	wzr, [x27, 2048]
+	str	wzr, [x27, 2048]
+	str	wzr, [x27, 2048]
+	b	.L2004
+.L1983:
+	mov	w25, w4
+	b	.L1978
+	.size	samsung_read_retrial, .-samsung_read_retrial
+	.section	.text.hynix_read_retrial,"ax",@progbits
+	.align	2
+	.global	hynix_read_retrial
+	.type	hynix_read_retrial, %function
+hynix_read_retrial:
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	and	x23, x0, 255
+	adrp	x0, .LANCHOR27
+	stp	x27, x28, [sp, 80]
+	stp	x21, x22, [sp, 32]
+	mov	w27, w4
+	ldr	x28, [x0, #:lo12:.LANCHOR27]
+	mov	w22, w1
+	stp	x25, x26, [sp, 64]
+	mov	x25, x2
+	add	x28, x28, 112
+	stp	x19, x20, [sp, 16]
+	add	x0, x28, x23
+	mov	x26, x3
+	mov	x21, x23
+	mov	w19, -1
+	ldrb	w24, [x28, 2]
+	ldrb	w20, [x0, 8]
+	bl	nandc_wait_flash_ready
+	mov	w0, w23
+	bl	zftl_flash_enter_slc_mode
+	mov	w0, w23
+	bl	zftl_flash_exit_slc_mode
+	adrp	x6, .LANCHOR50
+	add	x6, x6, :lo12:.LANCHOR50
+	mov	w5, 0
+	adrp	x7, .LANCHOR166
+	adrp	x8, .LANCHOR168
+.L2006:
+	cmp	w5, w24
+	bcc	.L2011
+.L2010:
+	adrp	x0, .LANCHOR50
+	add	x23, x28, x23
+	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	strb	w20, [x23, 8]
+	add	w0, w0, w0, lsl 1
+	cmp	w19, w0, lsr 2
+	bcc	.L2012
+	cmn	w19, #1
+	mov	w0, 256
+	csel	w19, w19, w0, eq
+.L2012:
+	cmp	w19, 256
+	ccmn	w19, #1, 4, ne
+	bne	.L2013
+	adrp	x0, .LC124
+	mov	w4, w19
+	mov	w3, w5
+	mov	w2, w22
+	mov	w1, w5
+	add	x0, x0, :lo12:.LC124
+	bl	printf
+.L2013:
+	bl	nandc_wait_flash_ready
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+.L2011:
+	add	w20, w20, 1
+	stp	x6, x8, [x29, 96]
+	and	w20, w20, 255
+	str	x7, [x29, 112]
+	cmp	w24, w20
+	str	w5, [x29, 124]
+	csel	w20, w20, wzr, hi
+	mov	w0, w21
+	mov	w1, w20
+	bl	hynix_set_rr_para
+	mov	w4, w27
+	mov	x3, x26
+	mov	x2, x25
+	mov	w1, w22
+	mov	w0, w21
+	bl	flash_read_page
+	ldr	w5, [x29, 124]
+	cmn	w0, #1
+	ldp	x6, x8, [x29, 96]
 	ldr	x7, [x29, 112]
-	beq	.L1860
+	beq	.L2008
 	ldrb	w1, [x6]
 	cmn	w19, #1
 	csel	w19, w19, w0, ne
-	ldr	x25, [x7, #:lo12:.LANCHOR161]
-	ldr	x26, [x8, #:lo12:.LANCHOR163]
+	ldr	x25, [x7, #:lo12:.LANCHOR166]
+	ldr	x26, [x8, #:lo12:.LANCHOR168]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L1866
-.L1860:
+	bcc	.L2014
+.L2008:
 	add	w5, w5, 1
-	b	.L1858
-.L1866:
+	b	.L2006
+.L2014:
 	mov	w19, w0
-	b	.L1862
+	b	.L2010
 	.size	hynix_read_retrial, .-hynix_read_retrial
 	.section	.text.flash_ddr_tuning_read,"ax",@progbits
 	.align	2
@@ -11292,25 +12172,25 @@ flash_ddr_tuning_read:
 	stp	x25, x26, [sp, 64]
 	mov	x24, x3
 	stp	x27, x28, [sp, 80]
-	adrp	x25, .LANCHOR46
+	adrp	x25, .LANCHOR50
 	str	w4, [x29, 136]
 	bl	nandc_get_ddr_para
-	add	x25, x25, :lo12:.LANCHOR46
+	add	x25, x25, :lo12:.LANCHOR50
 	str	w0, [x29, 132]
 	adrp	x0, .LANCHOR14
 	add	x0, x0, :lo12:.LANCHOR14
 	mov	w28, 0
 	str	x0, [x29, 120]
 	mov	w26, 0
-	adrp	x0, .LC116
+	adrp	x0, .LC125
 	mov	w27, 0
-	add	x0, x0, :lo12:.LC116
+	add	x0, x0, :lo12:.LC125
 	mov	w19, 1024
 	mov	w21, -1
 	mov	w7, 6
 	str	wzr, [x29, 140]
 	str	x0, [x29, 112]
-.L1882:
+.L2030:
 	mov	w0, w7
 	str	w7, [x29, 128]
 	bl	nandc_set_ddr_para
@@ -11324,7 +12204,7 @@ flash_ddr_tuning_read:
 	ldr	x0, [x29, 120]
 	ldr	w7, [x29, 128]
 	ldr	w0, [x0]
-	tbz	x0, 4, .L1877
+	tbz	x0, 4, .L2025
 	ldr	x0, [x29, 112]
 	mov	w3, w4
 	mov	w1, w7
@@ -11334,47 +12214,50 @@ flash_ddr_tuning_read:
 	bl	printf
 	ldr	w4, [x29, 108]
 	ldr	w7, [x29, 128]
-.L1877:
+.L2025:
 	add	w0, w19, 1
 	cmp	w4, w0
-	bhi	.L1878
-	adrp	x0, .LANCHOR161
-	ldr	x23, [x0, #:lo12:.LANCHOR161]
-	adrp	x0, .LANCHOR163
-	ldr	x24, [x0, #:lo12:.LANCHOR163]
+	bhi	.L2026
+	adrp	x0, .LANCHOR166
+	ldr	x23, [x0, #:lo12:.LANCHOR166]
+	adrp	x0, .LANCHOR168
+	ldr	x24, [x0, #:lo12:.LANCHOR168]
 	ldrb	w0, [x25]
 	cmp	w4, w0, lsr 2
-	bcs	.L1888
+	bcs	.L2036
 	add	w27, w27, 1
 	cmp	w27, 7
-	bls	.L1888
+	bls	.L2036
 	sub	w28, w7, w27
 	mov	w19, w4
 	mov	w21, 0
-.L1880:
+.L2028:
 	ldr	w0, [x29, 140]
 	cmp	w27, w26
 	csel	w28, w28, w0, cs
-.L1881:
-	cbz	w28, .L1883
-	adrp	x0, .LANCHOR46
+.L2029:
+	cbz	w28, .L2031
+	adrp	x0, .LANCHOR50
 	mov	w1, 3
-	ldrb	w0, [x0, #:lo12:.LANCHOR46]
+	ldrb	w0, [x0, #:lo12:.LANCHOR50]
 	udiv	w0, w0, w1
 	cmp	w0, w19
-	bls	.L1883
+	bls	.L2031
 	mov	w1, w28
-	adrp	x0, .LC117
-	add	x0, x0, :lo12:.LC117
+	adrp	x0, .LC126
+	add	x0, x0, :lo12:.LC126
 	bl	printf
 	mov	w0, w28
-.L1899:
+.L2050:
 	bl	nandc_set_ddr_para
-	cbz	w21, .L1876
+	cbz	w21, .L2024
+	adrp	x25, .LANCHOR49
+	ldrb	w0, [x25, #:lo12:.LANCHOR49]
+	tbz	x0, 0, .L2024
 	mov	w2, w22
 	mov	w1, w20
-	adrp	x0, .LC118
-	add	x0, x0, :lo12:.LC118
+	adrp	x0, .LC127
+	add	x0, x0, :lo12:.LC127
 	bl	printf
 	mov	w0, w20
 	bl	flash_reset
@@ -11382,8 +12265,8 @@ flash_ddr_tuning_read:
 	bl	flash_set_interface_mode
 	mov	w0, 1
 	bl	nandc_set_if_mode
-	adrp	x0, .LANCHOR33
-	add	x0, x0, :lo12:.LANCHOR33
+	adrp	x0, .LANCHOR34
+	add	x0, x0, :lo12:.LANCHOR34
 	mov	w1, 2
 	strb	w1, [x0, w20, sxtw]
 	mov	w0, w20
@@ -11398,22 +12281,22 @@ flash_ddr_tuning_read:
 	mov	w3, w0
 	mov	w2, w22
 	mov	w1, w20
-	adrp	x0, .LC119
-	add	x0, x0, :lo12:.LC119
+	adrp	x0, .LC128
+	add	x0, x0, :lo12:.LC128
 	bl	printf
-	adrp	x0, .LANCHOR46
-	ldrb	w0, [x0, #:lo12:.LANCHOR46]
+	adrp	x0, .LANCHOR50
+	ldrb	w0, [x0, #:lo12:.LANCHOR50]
 	cmp	w19, w0
-	bhi	.L1890
-	adrp	x1, .LANCHOR165
-	ldr	w0, [x1, #:lo12:.LANCHOR165]
+	bhi	.L2038
+	adrp	x1, .LANCHOR172
+	ldr	w0, [x1, #:lo12:.LANCHOR172]
 	add	w0, w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR165]
+	str	w0, [x1, #:lo12:.LANCHOR172]
 	cmp	w0, 100
-	bls	.L1886
+	bls	.L2034
 	adrp	x0, .LANCHOR21
 	strb	wzr, [x0, #:lo12:.LANCHOR21]
-.L1876:
+.L2024:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11422,38 +12305,37 @@ flash_ddr_tuning_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1878:
+.L2026:
 	cmp	w27, w26
-	bls	.L1889
+	bls	.L2037
 	sub	w0, w28, w27
 	str	w0, [x29, 140]
 	cmp	w27, 7
-	bhi	.L1881
+	bhi	.L2029
 	mov	w26, w27
-.L1889:
+.L2037:
 	mov	w27, 0
-	b	.L1879
-.L1888:
+	b	.L2027
+.L2036:
 	mov	w28, w7
 	mov	w19, w4
 	mov	w21, 0
-.L1879:
+.L2027:
 	add	w7, w7, 2
 	cmp	w7, 50
-	bne	.L1882
-	b	.L1880
-.L1883:
+	bne	.L2030
+	b	.L2028
+.L2031:
 	ldrb	w0, [x29, 132]
-	b	.L1899
-.L1890:
+	b	.L2050
+.L2038:
 	mov	w19, w21
-.L1886:
-	adrp	x20, .LANCHOR45
-	ldrb	w0, [x20, #:lo12:.LANCHOR45]
+.L2034:
+	ldrb	w0, [x25, #:lo12:.LANCHOR49]
 	bl	flash_set_interface_mode
-	ldrb	w0, [x20, #:lo12:.LANCHOR45]
+	ldrb	w0, [x25, #:lo12:.LANCHOR49]
 	bl	nandc_set_if_mode
-	b	.L1876
+	b	.L2024
 	.size	flash_ddr_tuning_read, .-flash_ddr_tuning_read
 	.section	.text.flash_read_page_en,"ax",@progbits
 	.align	2
@@ -11475,59 +12357,59 @@ flash_read_page_en:
 	mov	w24, w4
 	mov	x25, x0
 	cmp	w1, w20
-	bhi	.L1901
-	adrp	x1, .LANCHOR166
+	bhi	.L2052
+	adrp	x1, .LANCHOR173
 	adrp	x0, .LC0
-	mov	w2, 409
-	add	x1, x1, :lo12:.LANCHOR166
+	mov	w2, 428
+	add	x1, x1, :lo12:.LANCHOR173
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1901:
+.L2052:
 	adrp	x0, .LANCHOR30
 	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w4, [x25, #:lo12:.LANCHOR18]
 	ldrb	w21, [x0, w20, sxtw]
 	cmp	w20, w4
-	bcc	.L1902
+	bcc	.L2053
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbnz	x0, 6, .L1903
-.L1927:
+	tbnz	x0, 6, .L2054
+.L2078:
 	mov	w0, -1
-.L1900:
+.L2051:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1903:
+.L2054:
 	mov	w3, w19
 	mov	w2, w20
 	mov	w1, w21
-	adrp	x0, .LC120
-	add	x0, x0, :lo12:.LC120
+	adrp	x0, .LC129
+	add	x0, x0, :lo12:.LC129
 	bl	printf
-	b	.L1927
-.L1902:
+	b	.L2078
+.L2053:
 	tst	x19, 50331648
-	bne	.L1905
+	bne	.L2056
 	adrp	x0, .LANCHOR0
 	adrp	x1, .LANCHOR1
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L1906
+	cbz	w0, .L2057
 	ldrb	w0, [x1, #:lo12:.LANCHOR1]
-	cbz	w0, .L1905
-.L1906:
+	cbz	w0, .L2056
+.L2057:
 	adrp	x0, .LANCHOR2
 	ldrb	w1, [x1, #:lo12:.LANCHOR1]
 	ldrh	w2, [x0, #:lo12:.LANCHOR2]
 	udiv	w0, w19, w2
 	mul	w0, w0, w2
 	sub	w19, w19, w0
-	cbz	w1, .L1907
+	cbz	w1, .L2058
 	add	w19, w0, w19, lsl 1
-.L1905:
+.L2056:
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -11535,25 +12417,25 @@ flash_read_page_en:
 	mov	w0, w21
 	bl	flash_read_page
 	cmn	w0, #1
-	bne	.L1900
-	adrp	x20, .LANCHOR48
-	ldrb	w25, [x20, #:lo12:.LANCHOR48]
-	cbnz	w25, .L1908
-.L1911:
-	adrp	x0, .LANCHOR167
-	ldr	x5, [x0, #:lo12:.LANCHOR167]
-	cbnz	x5, .L1909
-.L1910:
-	ldrb	w4, [x20, #:lo12:.LANCHOR48]
+	bne	.L2051
+	adrp	x20, .LANCHOR52
+	ldrb	w25, [x20, #:lo12:.LANCHOR52]
+	cbnz	w25, .L2059
+.L2062:
+	adrp	x0, .LANCHOR174
+	ldr	x5, [x0, #:lo12:.LANCHOR174]
+	cbnz	x5, .L2060
+.L2061:
+	ldrb	w4, [x20, #:lo12:.LANCHOR52]
 	mov	w3, -1
 	mov	w2, w19
 	mov	w1, 0
-	adrp	x0, .LC121
-	add	x0, x0, :lo12:.LC121
+	adrp	x0, .LC130
+	add	x0, x0, :lo12:.LC130
 	bl	printf
 	adrp	x0, .LANCHOR21
 	ldrb	w0, [x0, #:lo12:.LANCHOR21]
-	cbz	w0, .L1927
+	cbz	w0, .L2078
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -11565,25 +12447,25 @@ flash_read_page_en:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	b	flash_ddr_tuning_read
-.L1907:
+.L2058:
 	adrp	x1, .LANCHOR3
 	add	x1, x1, :lo12:.LANCHOR3
 	ldrh	w19, [x1, w19, uxtw 1]
 	add	w19, w19, w0
-	b	.L1905
-.L1908:
-	strb	wzr, [x20, #:lo12:.LANCHOR48]
+	b	.L2056
+.L2059:
+	strb	wzr, [x20, #:lo12:.LANCHOR52]
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
 	mov	w1, w19
 	mov	w0, w21
 	bl	flash_read_page
-	strb	w25, [x20, #:lo12:.LANCHOR48]
+	strb	w25, [x20, #:lo12:.LANCHOR52]
 	cmn	w0, #1
-	beq	.L1911
-	b	.L1900
-.L1909:
+	beq	.L2062
+	b	.L2051
+.L2060:
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -11591,8 +12473,8 @@ flash_read_page_en:
 	mov	w0, w21
 	blr	x5
 	cmn	w0, #1
-	beq	.L1910
-	b	.L1900
+	beq	.L2061
+	b	.L2051
 	.size	flash_read_page_en, .-flash_read_page_en
 	.section	.text.flash_get_last_written_page,"ax",@progbits
 	.align	2
@@ -11603,15 +12485,15 @@ flash_get_last_written_page:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	w23, w0, 255
-	adrp	x0, .LANCHOR144
+	adrp	x0, .LANCHOR147
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
 	mov	x24, x2
-	ldrh	w19, [x0, #:lo12:.LANCHOR144]
-	adrp	x0, .LANCHOR32+26
+	ldrh	w19, [x0, #:lo12:.LANCHOR147]
+	adrp	x0, .LANCHOR33+26
 	stp	x21, x22, [sp, 32]
 	and	w21, w1, 65535
-	ldrh	w26, [x0, #:lo12:.LANCHOR32+26]
+	ldrh	w26, [x0, #:lo12:.LANCHOR33+26]
 	sub	w19, w19, #1
 	sxth	w19, w19
 	stp	x27, x28, [sp, 80]
@@ -11622,23 +12504,23 @@ flash_get_last_written_page:
 	add	w1, w19, w26
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L1929
+	bne	.L2080
 	mov	w27, 0
 	mov	w28, 2
-.L1930:
+.L2081:
 	cmp	w27, w19
-	ble	.L1933
-.L1929:
+	ble	.L2084
+.L2080:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1934
+	tbz	x0, 12, .L2085
 	ldr	w3, [x22]
-	adrp	x0, .LC122
+	adrp	x0, .LC131
 	mov	w2, w19
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC122
+	add	x0, x0, :lo12:.LC131
 	bl	printf
-.L1934:
+.L2085:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11647,7 +12529,7 @@ flash_get_last_written_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1933:
+.L2084:
 	add	w20, w27, w19
 	mov	w4, w25
 	mov	x3, x22
@@ -11657,28 +12539,28 @@ flash_get_last_written_page:
 	add	w1, w26, w20, sxth
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L1931
+	bne	.L2082
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L1930
-.L1931:
+	b	.L2081
+.L2082:
 	add	w20, w20, 1
 	sxth	w27, w20
-	b	.L1930
+	b	.L2081
 	.size	flash_get_last_written_page, .-flash_get_last_written_page
 	.section	.text.flash_get_last_written_page_ext,"ax",@progbits
 	.align	2
 	.global	flash_get_last_written_page_ext
 	.type	flash_get_last_written_page_ext, %function
 flash_get_last_written_page_ext:
-	adrp	x4, .LANCHOR31
+	adrp	x4, .LANCHOR32
 	mov	w5, 24
 	and	w0, w0, 65535
 	mov	w6, 1
-	ldrb	w4, [x4, #:lo12:.LANCHOR31]
+	ldrb	w4, [x4, #:lo12:.LANCHOR32]
 	sub	w5, w5, w4
-	adrp	x4, .LANCHOR68
-	ldrh	w4, [x4, #:lo12:.LANCHOR68]
+	adrp	x4, .LANCHOR75
+	ldrh	w4, [x4, #:lo12:.LANCHOR75]
 	sub	w5, w5, w4
 	mov	w4, w3
 	mov	x3, x2
@@ -11697,44 +12579,44 @@ flash_ddr_para_scan:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR45
+	adrp	x20, .LANCHOR49
 	stp	x21, x22, [sp, 32]
 	and	w22, w0, 255
-	ldrb	w0, [x20, #:lo12:.LANCHOR45]
+	ldrb	w0, [x20, #:lo12:.LANCHOR49]
 	adrp	x19, .LANCHOR21
 	stp	x23, x24, [sp, 48]
 	mov	w21, 1
 	mov	w23, w1
 	str	x25, [sp, 64]
 	strb	w21, [x19, #:lo12:.LANCHOR21]
-	adrp	x24, .LANCHOR169
+	adrp	x24, .LANCHOR176
 	bl	flash_set_interface_mode
-	adrp	x25, .LANCHOR168
-	ldrb	w0, [x20, #:lo12:.LANCHOR45]
+	adrp	x25, .LANCHOR175
+	ldrb	w0, [x20, #:lo12:.LANCHOR49]
 	bl	nandc_set_if_mode
-	ldr	x3, [x25, #:lo12:.LANCHOR168]
+	ldr	x3, [x25, #:lo12:.LANCHOR175]
 	mov	w4, 4
-	ldr	x2, [x24, #:lo12:.LANCHOR169]
+	ldr	x2, [x24, #:lo12:.LANCHOR176]
 	mov	w1, w23
 	mov	w0, w22
 	bl	flash_ddr_tuning_read
-	ldr	x3, [x25, #:lo12:.LANCHOR168]
+	ldr	x3, [x25, #:lo12:.LANCHOR175]
 	mov	w4, 4
-	ldr	x2, [x24, #:lo12:.LANCHOR169]
+	ldr	x2, [x24, #:lo12:.LANCHOR176]
 	mov	w1, w23
 	mov	w0, w22
 	bl	flash_read_page
 	cmn	w0, #1
 	mov	x0, x19
-	bne	.L1941
-	ldrb	w1, [x20, #:lo12:.LANCHOR45]
-	tbz	x1, 0, .L1941
+	bne	.L2092
+	ldrb	w1, [x20, #:lo12:.LANCHOR49]
+	tbz	x1, 0, .L2092
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, w21
 	bl	nandc_set_if_mode
 	strb	wzr, [x19, #:lo12:.LANCHOR21]
-.L1942:
+.L2093:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -11742,10 +12624,10 @@ flash_ddr_para_scan:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1941:
+.L2092:
 	mov	w1, 1
 	strb	w1, [x0, #:lo12:.LANCHOR21]
-	b	.L1942
+	b	.L2093
 	.size	flash_ddr_para_scan, .-flash_ddr_para_scan
 	.section	.text.flash_prog_page,"ax",@progbits
 	.align	2
@@ -11761,10 +12643,10 @@ flash_prog_page:
 	stp	x19, x20, [sp, 16]
 	mov	w20, 24
 	ldr	x26, [x0, #:lo12:.LANCHOR13]
-	adrp	x0, .LANCHOR31
+	adrp	x0, .LANCHOR32
 	stp	x23, x24, [sp, 48]
 	mov	w22, w1
-	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	ldrb	w0, [x0, #:lo12:.LANCHOR32]
 	and	x19, x21, 255
 	str	x27, [sp, 80]
 	add	x23, x19, 8
@@ -11779,22 +12661,22 @@ flash_prog_page:
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	and	w20, w20, w1
 	ubfx	x27, x22, 24, 2
-	tbz	x0, 4, .L1948
-	adrp	x0, .LC123
+	tbz	x0, 4, .L2099
+	adrp	x0, .LC132
 	mov	w3, w4
 	mov	w2, w27
-	add	x0, x0, :lo12:.LC123
+	add	x0, x0, :lo12:.LC132
 	bl	printf
-.L1948:
+.L2099:
 	bl	nandc_wait_flash_ready
 	mov	w0, w21
 	bl	hynix_reconfig_rr_para
 	mov	w0, w21
 	bl	nandc_cs
 	mov	w0, w21
-	cbnz	w27, .L1949
+	cbnz	w27, .L2100
 	bl	zftl_flash_enter_slc_mode
-.L1950:
+.L2101:
 	add	x19, x26, x19, lsl 8
 	mov	w0, 128
 	str	w0, [x19, 2056]
@@ -11806,13 +12688,19 @@ flash_prog_page:
 	str	w0, [x19, 2052]
 	lsr	w0, w20, 16
 	str	w0, [x19, 2052]
+	adrp	x0, .LANCHOR31
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	cbz	w0, .L2102
+	lsr	w0, w20, 24
+	str	w0, [x19, 2052]
+.L2102:
 	mov	w0, w20
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR32+9
+	adrp	x0, .LANCHOR33+9
 	mov	x4, x25
 	mov	x3, x24
 	mov	w1, 1
-	ldrb	w2, [x0, #:lo12:.LANCHOR32+9]
+	ldrb	w2, [x0, #:lo12:.LANCHOR33+9]
 	mov	w0, w21
 	bl	nandc_xfer
 	mov	w0, 16
@@ -11821,15 +12709,15 @@ flash_prog_page:
 	mov	x0, x23
 	bl	flash_read_status
 	mov	w3, w0
-	bl	nandc_de_cs.constprop.31
+	bl	nandc_de_cs.constprop.33
 	and	w2, w3, 4
-	tbz	x3, 2, .L1947
+	tbz	x3, 2, .L2098
 	mov	w1, w22
-	adrp	x0, .LC124
-	add	x0, x0, :lo12:.LC124
+	adrp	x0, .LC133
+	add	x0, x0, :lo12:.LC133
 	bl	printf
 	mov	w2, -1
-.L1947:
+.L2098:
 	mov	w0, w2
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -11838,9 +12726,9 @@ flash_prog_page:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1949:
+.L2100:
 	bl	zftl_flash_exit_slc_mode
-	b	.L1950
+	b	.L2101
 	.size	flash_prog_page, .-flash_prog_page
 	.section	.text.flash_test_blk,"ax",@progbits
 	.align	2
@@ -11851,16 +12739,16 @@ flash_test_blk:
 	mov	w2, 32
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR161
+	adrp	x22, .LANCHOR166
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 255
-	ldr	x0, [x22, #:lo12:.LANCHOR161]
-	adrp	x21, .LANCHOR163
+	ldr	x0, [x22, #:lo12:.LANCHOR166]
+	adrp	x21, .LANCHOR168
 	and	w19, w1, 65535
 	str	x23, [sp, 48]
 	mov	w1, 165
 	bl	ftl_memset
-	ldr	x0, [x21, #:lo12:.LANCHOR163]
+	ldr	x0, [x21, #:lo12:.LANCHOR168]
 	mov	w2, 8
 	mov	w1, 90
 	bl	ftl_memset
@@ -11871,10 +12759,10 @@ flash_test_blk:
 	mov	w1, w19
 	bl	flash_erase_block
 	cmn	w0, #1
-	bne	.L1960
-.L1962:
+	bne	.L2115
+.L2117:
 	mov	w21, -1
-.L1961:
+.L2116:
 	mov	w1, w19
 	mov	w0, w20
 	bl	flash_erase_block
@@ -11884,38 +12772,38 @@ flash_test_blk:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1960:
-	adrp	x23, .LANCHOR32
-	add	x23, x23, :lo12:.LANCHOR32
-	ldr	x3, [x21, #:lo12:.LANCHOR163]
+.L2115:
+	adrp	x23, .LANCHOR33
+	add	x23, x23, :lo12:.LANCHOR33
+	ldr	x3, [x21, #:lo12:.LANCHOR168]
 	mov	w1, w19
-	ldr	x2, [x22, #:lo12:.LANCHOR161]
+	ldr	x2, [x22, #:lo12:.LANCHOR166]
 	mov	w0, w20
 	ldrb	w4, [x23, 9]
 	bl	flash_prog_page
 	cmn	w0, #1
-	beq	.L1962
+	beq	.L2117
 	ldrb	w4, [x23, 9]
 	mov	w1, w19
-	ldr	x3, [x21, #:lo12:.LANCHOR163]
+	ldr	x3, [x21, #:lo12:.LANCHOR168]
 	mov	w0, w20
-	ldr	x2, [x22, #:lo12:.LANCHOR161]
+	ldr	x2, [x22, #:lo12:.LANCHOR166]
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L1962
-	ldr	x0, [x22, #:lo12:.LANCHOR161]
+	beq	.L2117
+	ldr	x0, [x22, #:lo12:.LANCHOR166]
 	ldr	w1, [x0]
 	mov	w0, 42405
 	movk	w0, 0xa5a5, lsl 16
 	cmp	w1, w0
-	bne	.L1962
-	ldr	x0, [x21, #:lo12:.LANCHOR163]
+	bne	.L2117
+	ldr	x0, [x21, #:lo12:.LANCHOR168]
 	ldr	w1, [x0]
 	mov	w0, 23130
 	movk	w0, 0x5a5a, lsl 16
 	cmp	w1, w0
 	csetm	w21, ne
-	b	.L1961
+	b	.L2116
 	.size	flash_test_blk, .-flash_test_blk
 	.section	.text.id_block_prog_msb_ff_data,"ax",@progbits
 	.align	2
@@ -11931,45 +12819,45 @@ id_block_prog_msb_ff_data:
 	stp	x23, x24, [sp, 48]
 	ldrb	w0, [x0, #:lo12:.LANCHOR19]
 	str	x25, [sp, 64]
-	cbnz	w0, .L1970
-	adrp	x20, .LANCHOR32
-	add	x20, x20, :lo12:.LANCHOR32
+	cbnz	w0, .L2125
+	adrp	x20, .LANCHOR33
+	add	x20, x20, :lo12:.LANCHOR33
 	ldrb	w0, [x20, 19]
 	sub	w0, w0, #5
 	and	w3, w0, 255
 	cmp	w3, 63
-	bhi	.L1970
+	bhi	.L2125
 	and	w19, w2, 65535
 	mov	x2, 16391
 	movk	x2, 0x4000, lsl 16
 	movk	x2, 0x8000, lsl 48
 	lsr	x0, x2, x3
-	tbz	x0, 0, .L1970
-	adrp	x21, .LANCHOR142
+	tbz	x0, 0, .L2125
+	adrp	x21, .LANCHOR145
 	mov	w23, w1
-	add	x21, x21, :lo12:.LANCHOR142
+	add	x21, x21, :lo12:.LANCHOR145
 	mov	w25, 65535
-	adrp	x24, .LANCHOR161
-.L1972:
+	adrp	x24, .LANCHOR166
+.L2127:
 	ldrh	w0, [x20, 10]
 	cmp	w0, w19
-	bhi	.L1973
-.L1970:
+	bhi	.L2128
+.L2125:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1973:
+.L2128:
 	ldrh	w0, [x21, w19, sxtw 1]
 	cmp	w0, w25
-	bne	.L1970
-	ldr	x0, [x24, #:lo12:.LANCHOR161]
+	bne	.L2125
+	ldr	x0, [x24, #:lo12:.LANCHOR166]
 	mov	w2, 16384
 	mov	w1, 255
 	bl	ftl_memset
-	ldr	x3, [x24, #:lo12:.LANCHOR161]
+	ldr	x3, [x24, #:lo12:.LANCHOR166]
 	add	w1, w19, w23
 	ldrb	w4, [x20, 9]
 	add	w19, w19, 1
@@ -11977,138 +12865,245 @@ id_block_prog_msb_ff_data:
 	mov	w0, w22
 	and	w19, w19, 65535
 	bl	flash_prog_page
-	b	.L1972
+	b	.L2127
 	.size	id_block_prog_msb_ff_data, .-id_block_prog_msb_ff_data
-	.section	.text.flash_dual_page_prog,"ax",@progbits
+	.section	.text.flash_start_one_pass_page_prog,"ax",@progbits
 	.align	2
-	.global	flash_dual_page_prog
-	.type	flash_dual_page_prog, %function
-flash_dual_page_prog:
-	stp	x29, x30, [sp, -128]!
-	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	and	w21, w0, 255
+	.global	flash_start_one_pass_page_prog
+	.type	flash_start_one_pass_page_prog, %function
+flash_start_one_pass_page_prog:
+	stp	x29, x30, [sp, -32]!
+	and	w8, w0, 255
+	and	w7, w3, 255
 	adrp	x0, .LANCHOR13
+	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	stp	x23, x24, [sp, 48]
-	and	x23, x21, 255
+	and	w20, w2, 255
 	ldr	x19, [x0, #:lo12:.LANCHOR13]
-	add	x0, x23, 8
-	mov	w20, 24
-	stp	x27, x28, [sp, 80]
-	mov	x27, x2
-	stp	x25, x26, [sp, 64]
-	add	x0, x19, x0, lsl 8
-	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR31
-	mov	w22, w1
-	mov	x28, x3
-	mov	x25, x4
-	ldrb	w0, [x0, #:lo12:.LANCHOR31]
-	mov	x26, x5
-	ubfx	x24, x22, 24, 2
-	sub	w0, w20, w0
-	mov	w20, 1
-	lsl	w20, w20, w0
-	adrp	x0, .LANCHOR14
-	str	x0, [x29, 112]
-	sub	w20, w20, #1
-	ldr	w2, [x0, #:lo12:.LANCHOR14]
-	and	w20, w20, w1
-	tbz	x2, 4, .L1976
-	adrp	x0, .LC123
-	mov	w3, w6
-	mov	w2, w24
-	add	x0, x0, :lo12:.LC123
-	bl	printf
-.L1976:
-	bl	nandc_wait_flash_ready
-	mov	w0, w21
+	mov	w0, w7
 	bl	nandc_cs
-	mov	w0, w21
-	cbnz	w24, .L1977
-	bl	zftl_flash_enter_slc_mode
-.L1978:
-	add	x19, x19, x23, lsl 8
-	mov	w5, 128
-	and	w0, w20, 255
-	adrp	x23, .LANCHOR32
-	add	x23, x23, :lo12:.LANCHOR32
-	str	w5, [x29, 108]
-	str	w5, [x19, 2056]
-	mov	w24, 16
+	cbz	w8, .L2131
+	sxtw	x0, w7
+	add	x0, x0, 8
+	add	x0, x19, x0, lsl 8
+	str	w8, [x0, 8]
+.L2131:
+	ubfiz	x0, x7, 8, 8
+	add	x19, x19, x0
+	mov	w0, 128
+	str	w0, [x19, 2056]
+	and	w0, w4, 255
 	str	wzr, [x19, 2052]
 	str	wzr, [x19, 2052]
 	str	w0, [x19, 2052]
-	lsr	w0, w20, 8
+	lsr	w0, w4, 8
 	str	w0, [x19, 2052]
-	lsr	w0, w20, 16
+	lsr	w0, w4, 16
 	str	w0, [x19, 2052]
-	mov	w0, w20
+	adrp	x0, .LANCHOR31
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	cbz	w0, .L2132
+	lsr	w0, w4, 24
+	str	w0, [x19, 2052]
+.L2132:
+	mov	w0, w4
 	bl	nandc_set_seed
-	ldrb	w2, [x23, 9]
-	mov	x4, x28
-	mov	x3, x27
+	adrp	x0, .LANCHOR33+9
+	mov	x4, x6
+	mov	x3, x5
 	mov	w1, 1
-	mov	w0, w21
+	ldrb	w2, [x0, #:lo12:.LANCHOR33+9]
+	mov	w0, w7
 	bl	nandc_xfer
-	str	w24, [x19, 2056]
+	str	w20, [x19, 2056]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	flash_start_one_pass_page_prog, .-flash_start_one_pass_page_prog
+	.section	.text.flash_dual_page_prog,"ax",@progbits
+	.align	2
+	.global	flash_dual_page_prog
+	.type	flash_dual_page_prog, %function
+flash_dual_page_prog:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w20, w0, 255
+	stp	x25, x26, [sp, 64]
+	mov	x25, x2
+	adrp	x2, .LANCHOR13
+	stp	x21, x22, [sp, 32]
+	ubfiz	x22, x20, 8, 8
+	stp	x27, x28, [sp, 80]
+	add	x0, x22, 2048
+	ldr	x22, [x2, #:lo12:.LANCHOR13]
+	mov	w19, 24
+	adrp	x27, .LANCHOR14
+	add	x22, x22, x0
+	adrp	x0, .LANCHOR32
+	stp	x23, x24, [sp, 48]
+	mov	w21, w1
+	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	mov	x26, x3
+	mov	x23, x4
+	mov	x24, x5
+	sub	w0, w19, w0
+	mov	w19, 1
+	ubfx	x28, x21, 24, 2
+	lsl	w19, w19, w0
+	ldr	w0, [x27, #:lo12:.LANCHOR14]
+	sub	w19, w19, #1
+	and	w19, w19, w1
+	tbz	x0, 4, .L2141
+	adrp	x0, .LC132
+	mov	w3, w6
+	mov	w2, w28
+	add	x0, x0, :lo12:.LC132
+	bl	printf
+.L2141:
 	bl	nandc_wait_flash_ready
-	ldr	w5, [x29, 108]
-	add	w0, w20, 1
-	str	w5, [x19, 2056]
-	and	w1, w0, 255
-	str	wzr, [x19, 2052]
-	str	wzr, [x19, 2052]
-	str	w1, [x19, 2052]
-	lsr	w1, w0, 8
-	str	w1, [x19, 2052]
-	lsr	w1, w0, 16
-	str	w1, [x19, 2052]
-	bl	nandc_set_seed
-	ldrb	w2, [x23, 9]
-	mov	x4, x26
-	mov	x3, x25
-	mov	w1, 1
-	mov	w0, w21
-	bl	nandc_xfer
-	str	w24, [x19, 2056]
+	mov	w0, w20
+	bl	nandc_cs
+	mov	w0, w20
+	cbnz	w28, .L2142
+	bl	zftl_flash_enter_slc_mode
+.L2143:
+	mov	x6, x26
+	mov	x5, x25
+	mov	w4, w19
+	mov	w3, w20
+	mov	w2, 16
+	mov	w1, 0
+	mov	w0, 0
+	bl	flash_start_one_pass_page_prog
 	bl	nandc_wait_flash_ready
-	ldr	x0, [x29, 120]
+	mov	x6, x24
+	mov	x5, x23
+	add	w4, w19, 1
+	mov	w3, w20
+	mov	w2, 16
+	mov	w1, 0
+	mov	w0, 0
+	bl	flash_start_one_pass_page_prog
+	bl	nandc_wait_flash_ready
+	mov	x0, x22
 	bl	flash_read_status
 	mov	w3, w0
-	bl	nandc_de_cs.constprop.31
+	bl	nandc_de_cs.constprop.33
 	and	w2, w3, 4
-	tbz	x3, 2, .L1975
-	ldr	x0, [x29, 112]
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1980
-	adrp	x0, .LC124
-	mov	w1, w22
-	add	x0, x0, :lo12:.LC124
+	tbz	x3, 2, .L2140
+	ldr	w0, [x27, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2145
+	adrp	x0, .LC133
+	mov	w1, w21
+	add	x0, x0, :lo12:.LC133
 	bl	printf
-.L1980:
+.L2145:
 	mov	w2, -1
-.L1975:
-	ldp	x19, x20, [sp, 16]
+.L2140:
 	mov	w0, w2
+	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 128
+	ldp	x29, x30, [sp], 96
 	ret
-.L1977:
+.L2142:
 	bl	zftl_flash_exit_slc_mode
-	b	.L1978
+	b	.L2143
 	.size	flash_dual_page_prog, .-flash_dual_page_prog
-	.section	.text.fw_flash_page_prog.constprop.28,"ax",@progbits
+	.section	.text.ymtc_flash_tlc_page_prog,"ax",@progbits
+	.align	2
+	.global	ymtc_flash_tlc_page_prog
+	.type	ymtc_flash_tlc_page_prog, %function
+ymtc_flash_tlc_page_prog:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w20, w0, 255
+	str	x25, [sp, 64]
+	mov	w25, w1
+	adrp	x1, .LANCHOR13
+	stp	x21, x22, [sp, 32]
+	ubfiz	x22, x20, 8, 8
+	mov	w19, 24
+	add	x0, x22, 2048
+	ldr	x22, [x1, #:lo12:.LANCHOR13]
+	mov	w21, 1
+	stp	x23, x24, [sp, 48]
+	add	x22, x22, x0
+	adrp	x0, .LANCHOR32
+	mov	x23, x2
+	mov	x24, x3
+	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	sub	w19, w19, w0
+	bl	nandc_wait_flash_ready
+	lsl	w19, w21, w19
+	mov	w0, w20
+	sub	w19, w19, #1
+	bl	nandc_cs
+	and	w19, w19, w25
+	mov	w0, w20
+	bl	zftl_flash_exit_slc_mode
+	mov	x6, x24
+	mov	x5, x23
+	mov	w4, w19
+	mov	w3, w20
+	mov	w1, w21
+	mov	w2, 26
+	mov	w0, 0
+	bl	flash_start_one_pass_page_prog
+	bl	nandc_wait_flash_ready
+	mov	x6, x24
+	mov	x5, x23
+	add	w4, w19, w21
+	mov	w3, w20
+	mov	w1, w21
+	mov	w2, 26
+	mov	w0, 0
+	bl	flash_start_one_pass_page_prog
+	bl	nandc_wait_flash_ready
+	mov	x6, x24
+	mov	x5, x23
+	add	w4, w19, 2
+	mov	w3, w20
+	mov	w1, w21
+	mov	w2, 16
+	mov	w0, 0
+	bl	flash_start_one_pass_page_prog
+	bl	nandc_wait_flash_ready
+	mov	x0, x22
+	bl	flash_read_status
+	mov	w3, w0
+	bl	nandc_de_cs.constprop.33
+	and	w2, w3, 4
+	tbz	x3, 2, .L2153
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2155
+	adrp	x0, .LC134
+	mov	w1, w25
+	add	x0, x0, :lo12:.LC134
+	bl	printf
+.L2155:
+	mov	w2, -1
+.L2153:
+	mov	w0, w2
+	ldr	x25, [sp, 64]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	ret
+	.size	ymtc_flash_tlc_page_prog, .-ymtc_flash_tlc_page_prog
+	.section	.text.fw_flash_page_prog.constprop.30,"ax",@progbits
 	.align	2
-	.type	fw_flash_page_prog.constprop.28, %function
-fw_flash_page_prog.constprop.28:
+	.type	fw_flash_page_prog.constprop.30, %function
+fw_flash_page_prog.constprop.30:
 	stp	x29, x30, [sp, -64]!
-	adrp	x4, .LANCHOR32
-	add	x4, x4, :lo12:.LANCHOR32
+	adrp	x4, .LANCHOR33
+	add	x4, x4, :lo12:.LANCHOR33
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x20, x1
@@ -12117,28 +13112,26 @@ fw_flash_page_prog.constprop.28:
 	str	x23, [sp, 48]
 	ldrb	w19, [x4, 9]
 	udiv	w19, w0, w19
-	adrp	x0, .LANCHOR46
-	ldrb	w23, [x0, #:lo12:.LANCHOR46]
+	adrp	x0, .LANCHOR50
+	ldrb	w23, [x0, #:lo12:.LANCHOR50]
 	adrp	x0, .LANCHOR17
 	ldrb	w0, [x0, #:lo12:.LANCHOR17]
 	bl	nandc_bch_sel
 	ldrb	w0, [x4, 7]
 	cmp	w0, 9
-	bne	.L1989
-	adrp	x22, .LANCHOR161
-	mov	w2, 16384
-	mov	w1, 255
-	ldr	x0, [x22, #:lo12:.LANCHOR161]
-	bl	ftl_memset
-	ldr	x5, [x22, #:lo12:.LANCHOR161]
-	mov	w6, 4
+	bne	.L2161
+	adrp	x0, .LANCHOR19
+	ldrb	w0, [x0, #:lo12:.LANCHOR19]
+	cbnz	w0, .L2161
+	ldrb	w0, [x4, 12]
+	cmp	w0, 3
+	bne	.L2162
 	mov	x3, x21
 	mov	x2, x20
-	mov	x4, x5
 	mov	w1, w19
 	mov	w0, 0
-	bl	flash_dual_page_prog
-.L1992:
+	bl	ymtc_flash_tlc_page_prog
+.L2165:
 	mov	w4, w0
 	mov	w0, w23
 	bl	nandc_bch_sel
@@ -12148,15 +13141,30 @@ fw_flash_page_prog.constprop.28:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1989:
+.L2162:
+	adrp	x22, .LANCHOR166
+	mov	w2, 16384
+	mov	w1, 255
+	ldr	x0, [x22, #:lo12:.LANCHOR166]
+	bl	ftl_memset
+	ldr	x5, [x22, #:lo12:.LANCHOR166]
+	mov	w6, 4
+	mov	x3, x21
+	mov	x2, x20
+	mov	x4, x5
+	mov	w1, w19
+	mov	w0, 0
+	bl	flash_dual_page_prog
+	b	.L2165
+.L2161:
 	mov	w4, 4
 	mov	x3, x21
 	mov	x2, x20
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_prog_page
-	b	.L1992
-	.size	fw_flash_page_prog.constprop.28, .-fw_flash_page_prog.constprop.28
+	b	.L2165
+	.size	fw_flash_page_prog.constprop.30, .-fw_flash_page_prog.constprop.30
 	.section	.text.idb_write_data,"ax",@progbits
 	.align	2
 	.global	idb_write_data
@@ -12170,74 +13178,81 @@ idb_write_data:
 	stp	x21, x22, [sp, 32]
 	mov	w20, w3
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR140
+	adrp	x22, .LANCHOR143
 	stp	x25, x26, [sp, 64]
 	mov	x24, x2
 	stp	x27, x28, [sp, 80]
-	bne	.L1994
-	ldr	w1, [x2]
-	mov	w0, 35899
-	movk	w0, 0xfcdc, lsl 16
-	cmp	w1, w0
-	bne	.L1994
-	adrp	x21, .LANCHOR138
+	bne	.L2167
+	ldr	w0, [x2]
+	mov	w1, 35899
+	movk	w1, 0xfcdc, lsl 16
+	cmp	w0, w1
+	mov	w1, 19282
+	movk	w1, 0x534e, lsl 16
+	ccmp	w0, w1, 4, ne
+	beq	.L2168
+	add	w1, w1, 327680
+	cmp	w0, w1
+	bne	.L2167
+.L2168:
+	adrp	x21, .LANCHOR141
 	mov	w1, 1
-	strb	w1, [x22, #:lo12:.LANCHOR140]
-	ldr	x0, [x21, #:lo12:.LANCHOR138]
-	cbnz	x0, .L1995
+	strb	w1, [x22, #:lo12:.LANCHOR143]
+	ldr	x0, [x21, #:lo12:.LANCHOR141]
+	cbnz	x0, .L2169
 	mov	w0, 262144
 	bl	ftl_malloc
-	str	x0, [x21, #:lo12:.LANCHOR138]
-.L1995:
-	adrp	x0, .LANCHOR170
+	str	x0, [x21, #:lo12:.LANCHOR141]
+.L2169:
+	adrp	x0, .LANCHOR177
 	mov	w1, 64
-	str	w1, [x0, #:lo12:.LANCHOR170]
-.L1994:
-	ldrb	w0, [x22, #:lo12:.LANCHOR140]
-	cbz	w0, .L2061
-	adrp	x0, .LANCHOR138
+	str	w1, [x0, #:lo12:.LANCHOR177]
+.L2167:
+	ldrb	w0, [x22, #:lo12:.LANCHOR143]
+	cbz	w0, .L2235
+	adrp	x0, .LANCHOR141
 	mov	x23, x0
-	ldr	x21, [x0, #:lo12:.LANCHOR138]
-	cbz	x21, .L2061
+	ldr	x21, [x0, #:lo12:.LANCHOR141]
+	cbz	x21, .L2235
 	add	w0, w19, w20
-	str	w0, [x29, 144]
+	str	w0, [x29, 140]
 	cmp	w0, 63
-	bls	.L1997
+	bls	.L2171
 	cmp	w19, 575
-	bhi	.L1998
-	adrp	x21, .LANCHOR141
-	ldr	x0, [x21, #:lo12:.LANCHOR141]
-	cbz	x0, .L1999
-.L2002:
-	adrp	x1, .LANCHOR139
+	bhi	.L2172
+	adrp	x21, .LANCHOR144
+	ldr	x0, [x21, #:lo12:.LANCHOR144]
+	cbz	x0, .L2173
+.L2176:
+	adrp	x1, .LANCHOR142
 	mov	w2, 1
-	ldr	x0, [x23, #:lo12:.LANCHOR138]
+	ldr	x0, [x23, #:lo12:.LANCHOR141]
 	cmp	w19, 64
-	str	w2, [x1, #:lo12:.LANCHOR139]
-	bhi	.L2111
+	str	w2, [x1, #:lo12:.LANCHOR142]
+	bhi	.L2288
 	mov	w4, 64
 	sub	w4, w4, w19
 	sub	w2, w20, w4
 	ubfiz	x4, x4, 9, 25
 	lsl	w2, w2, 9
 	add	x1, x24, x4
-.L2117:
+.L2294:
 	bl	ftl_memcpy
-.L2003:
-	adrp	x0, .LANCHOR170
-	ldr	w0, [x0, #:lo12:.LANCHOR170]
+.L2177:
+	adrp	x0, .LANCHOR177
+	ldr	w0, [x0, #:lo12:.LANCHOR177]
 	cmp	w19, w0
-	beq	.L2057
-	strb	wzr, [x22, #:lo12:.LANCHOR140]
-	b	.L2057
-.L1999:
+	beq	.L2231
+	strb	wzr, [x22, #:lo12:.LANCHOR143]
+	b	.L2231
+.L2173:
 	mov	w0, 262144
 	bl	ftl_malloc
-	str	x0, [x21, #:lo12:.LANCHOR141]
-	cbnz	x0, .L2002
+	str	x0, [x21, #:lo12:.LANCHOR144]
+	cbnz	x0, .L2176
 	mov	w0, -1
-	b	.L1993
-.L2111:
+	b	.L2166
+.L2288:
 	mov	w2, 576
 	sub	w2, w2, w19
 	cmp	w20, w2
@@ -12247,19 +13262,26 @@ idb_write_data:
 	lsl	w2, w2, 9
 	mov	x1, x24
 	add	x0, x0, x3
-	b	.L2117
-.L1997:
+	b	.L2294
+.L2171:
 	cmp	w19, 575
-	bls	.L2003
-.L1998:
-	adrp	x0, .LANCHOR139
-	ldr	w0, [x0, #:lo12:.LANCHOR139]
-	cbz	w0, .L2003
-	ldr	w1, [x21]
-	mov	w0, 35899
-	movk	w0, 0xfcdc, lsl 16
-	cmp	w1, w0
-	bne	.L2005
+	bls	.L2177
+.L2172:
+	adrp	x0, .LANCHOR142
+	ldr	w0, [x0, #:lo12:.LANCHOR142]
+	cbz	w0, .L2177
+	ldr	w0, [x21]
+	mov	w1, 35899
+	movk	w1, 0xfcdc, lsl 16
+	cmp	w0, w1
+	mov	w1, 19282
+	movk	w1, 0x534e, lsl 16
+	ccmp	w0, w1, 4, ne
+	beq	.L2178
+	add	w1, w1, 327680
+	cmp	w0, w1
+	bne	.L2179
+.L2178:
 	adrp	x0, .LANCHOR0
 	mov	x10, x0
 	ldrb	w1, [x0, #:lo12:.LANCHOR0]
@@ -12269,19 +13291,19 @@ idb_write_data:
 	ldr	w0, [x29, 176]
 	ldrb	w2, [x1, #:lo12:.LANCHOR19]
 	str	w2, [x29, 204]
-	cbz	w0, .L2006
+	cbz	w0, .L2180
 	ldrh	w0, [x29, 176]
 	str	w0, [x29, 172]
 	uxtw	x0, w2
 	cmp	w0, 0
 	cset	w0, eq
-.L2114:
-	adrp	x12, .LANCHOR32
-	add	x8, x12, :lo12:.LANCHOR32
+.L2291:
+	adrp	x8, .LANCHOR33
+	add	x8, x8, :lo12:.LANCHOR33
 	str	w0, [x29, 200]
 	mov	w0, 0
-	ldrb	w22, [x8, 9]
-	ldrh	w19, [x8, 26]
+	ldrb	w19, [x8, 9]
+	ldrh	w22, [x8, 26]
 	bl	zftl_flash_exit_slc_mode
 	ldrh	w20, [x8, 10]
 	add	x1, x21, 258048
@@ -12294,44 +13316,42 @@ idb_write_data:
 	mov	w2, 65023
 	movk	w4, 0x4f4f, lsl 16
 	mov	w3, 4098
-	str	x12, [x29, 120]
 	sdiv	w20, w20, w0
 	mov	w0, 512
 	cmp	w20, 512
 	csel	w20, w20, w0, lt
 	mov	w0, 0
-.L2013:
+.L2187:
 	ldr	w5, [x1]
-	cbnz	w5, .L2009
-	cbnz	w0, .L2010
+	cbnz	w5, .L2183
+	cbnz	w0, .L2184
 	str	w4, [x1, 2048]
-.L2011:
+.L2185:
 	add	w0, w0, 1
 	sub	w2, w2, #1
 	cmp	w0, w3
 	sub	x1, x1, #4
 	csel	w0, w0, wzr, ls
 	cmp	w2, 4096
-	bne	.L2013
-.L2009:
+	bne	.L2187
+.L2183:
 	ldr	w1, [x21, w2, uxtw 2]
-	mul	w19, w19, w22
 	mov	w3, w20
-	adrp	x0, .LC125
-	add	x0, x0, :lo12:.LC125
+	adrp	x0, .LC135
+	add	x0, x0, :lo12:.LC135
 	bl	printf
 	str	wzr, [x29, 180]
-	and	w0, w19, 65535
+	mul	w0, w22, w19
 	str	wzr, [x29, 192]
-	str	w0, [x29, 140]
-	adrp	x0, .LANCHOR48
-	add	x0, x0, :lo12:.LANCHOR48
+	str	w0, [x29, 128]
+	adrp	x0, .LANCHOR52
+	add	x0, x0, :lo12:.LANCHOR52
 	str	x0, [x29, 184]
-.L2052:
-	adrp	x23, .LANCHOR141
+.L2226:
+	adrp	x23, .LANCHOR144
 	mov	w1, 0
 	mov	w2, 512
-	ldr	x0, [x23, #:lo12:.LANCHOR141]
+	ldr	x0, [x23, #:lo12:.LANCHOR144]
 	bl	ftl_memset
 	str	x23, [x29, 160]
 	adrp	x0, .LANCHOR27
@@ -12340,26 +13360,26 @@ idb_write_data:
 	add	x0, x0, x1, uxtw
 	ldrb	w19, [x0, 32]
 	cmp	w19, 255
-	beq	.L2014
-	ldr	w0, [x29, 140]
+	beq	.L2188
+	ldr	w0, [x29, 128]
 	mul	w19, w19, w0
 	ldr	w0, [x29, 200]
-	cbz	w0, .L2015
+	cbz	w0, .L2189
 	and	w0, w1, -3
 	adrp	x10, .LANCHOR0
 	cmp	w0, 1
 	adrp	x8, .LANCHOR19
-	beq	.L2016
+	beq	.L2190
 	ldr	w0, [x29, 200]
 	cmp	w0, 3
-	bne	.L2017
-.L2016:
+	bne	.L2191
+.L2190:
 	ldrb	w0, [x29, 172]
 	strb	w0, [x10, #:lo12:.LANCHOR0]
 	strb	w0, [x8, #:lo12:.LANCHOR19]
-.L2015:
-	ldr	x0, [x29, 120]
-	add	x27, x0, :lo12:.LANCHOR32
+.L2189:
+	adrp	x22, .LANCHOR33
+	add	x27, x22, :lo12:.LANCHOR33
 	ldr	x0, [x29, 184]
 	ldrb	w24, [x27, 9]
 	ldrh	w25, [x27, 26]
@@ -12367,14 +13387,13 @@ idb_write_data:
 	str	w0, [x29, 136]
 	udiv	w1, w19, w24
 	ldr	x0, [x29, 184]
-	mul	w25, w24, w25
-	and	w22, w25, 65535
+	mul	w25, w25, w24
 	strb	wzr, [x0]
 	mov	w0, 0
 	bl	flash_erase_block
-	udiv	w25, w19, w22
+	udiv	w0, w19, w25
 	ldrb	w1, [x27, 12]
-	msub	w0, w25, w22, w19
+	msub	w0, w0, w25, w19
 	str	w0, [x29, 168]
 	sub	w26, w19, w0
 	ldrh	w0, [x27, 10]
@@ -12382,15 +13401,15 @@ idb_write_data:
 	lsl	w0, w0, 2
 	sdiv	w0, w0, w1
 	str	w0, [x29, 156]
-	bne	.L2067
+	bne	.L2241
 	adrp	x0, .LANCHOR28
 	ldrb	w0, [x0, #:lo12:.LANCHOR28]
 	cmp	w0, 9
-	bne	.L2067
+	bne	.L2241
 	ldr	x0, [x29, 160]
 	mov	w2, 1024
 	mov	w1, 0
-	ldr	x25, [x0, #:lo12:.LANCHOR141]
+	ldr	x25, [x0, #:lo12:.LANCHOR144]
 	mov	x0, x25
 	bl	ftl_memset
 	mov	w0, 18766
@@ -12402,19 +13421,18 @@ idb_write_data:
 	strb	wzr, [x25, 16]
 	str	wzr, [x25, 12]
 	ldrb	w0, [x0, #:lo12:.LANCHOR19]
-	cbz	w0, .L2019
+	cbz	w0, .L2193
 	ldrb	w0, [x27, 29]
 	strb	w0, [x25, 16]
-.L2019:
+.L2193:
+	add	x1, x22, :lo12:.LANCHOR33
 	mov	w0, 4
 	strb	w0, [x25, 17]
-	adrp	x0, .LANCHOR32
-	add	x1, x0, :lo12:.LANCHOR32
 	cmp	w24, 8
 	strb	wzr, [x25, 20]
-	strh	wzr, [x25, 22]
 	ldrh	w0, [x1, 10]
 	ldrb	w1, [x1, 12]
+	strh	wzr, [x25, 22]
 	sdiv	w0, w0, w1
 	mov	w1, 16
 	strh	w0, [x25, 18]
@@ -12427,37 +13445,36 @@ idb_write_data:
 	str	w0, [x25, 8]
 	sub	w0, w20, #4
 	str	w0, [x29, 196]
-.L2018:
+.L2192:
 	adrp	x27, .LANCHOR3
-	adrp	x28, .LANCHOR19
 	mov	x23, x21
 	add	x27, x27, :lo12:.LANCHOR3
-	add	x28, x28, :lo12:.LANCHOR19
-	mov	w22, 0
-.L2021:
+	adrp	x0, .LANCHOR19
+	mov	w28, 0
+	add	x0, x0, :lo12:.LANCHOR19
+	str	x0, [x29, 144]
+.L2195:
 	ldr	w0, [x29, 156]
-	cmp	w0, w22
-	bhi	.L2032
+	cmp	w0, w28
+	bhi	.L2206
 	ldr	x0, [x29, 160]
+	add	x22, x22, :lo12:.LANCHOR33
 	mov	w24, 4
 	mov	w25, 0
 	mov	w28, 0
-	ldr	x23, [x0, #:lo12:.LANCHOR141]
-	adrp	x0, .LANCHOR32
-	add	x22, x0, :lo12:.LANCHOR32
+	ldr	x23, [x0, #:lo12:.LANCHOR144]
 	ldrb	w0, [x22, 9]
-	str	w0, [x29, 152]
+	str	w0, [x29, 144]
 	ldrh	w0, [x22, 26]
-	ldr	w1, [x29, 152]
-	mul	w0, w1, w0
-	adrp	x1, .LANCHOR48
-	and	w0, w0, 65535
-	strb	wzr, [x1, #:lo12:.LANCHOR48]
+	ldr	w1, [x29, 144]
+	mul	w0, w0, w1
+	adrp	x1, .LANCHOR52
+	strb	wzr, [x1, #:lo12:.LANCHOR52]
 	udiv	w1, w19, w0
 	msub	w0, w1, w0, w19
 	str	w0, [x29, 168]
 	sub	w0, w19, w0
-	str	w0, [x29, 148]
+	str	w0, [x29, 152]
 	ldr	w0, [x29, 168]
 	and	w0, w0, 3
 	str	w0, [x29, 160]
@@ -12465,42 +13482,42 @@ idb_write_data:
 	str	w0, [x29, 156]
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
-	str	x0, [x29, 104]
-.L2033:
+	str	x0, [x29, 112]
+.L2207:
 	ldr	w0, [x29, 156]
 	cmp	w25, w0
-	bcc	.L2047
+	bcc	.L2221
 	ldr	x0, [x29, 184]
 	ldrb	w1, [x29, 136]
 	strb	w1, [x0]
 	ldr	w0, [x29, 200]
-	cbz	w0, .L2048
+	cbz	w0, .L2222
 	mov	w0, 0
 	bl	zftl_flash_exit_slc_mode
 	adrp	x0, .LANCHOR0
 	strb	wzr, [x0, #:lo12:.LANCHOR0]
 	adrp	x0, .LANCHOR19
 	strb	wzr, [x0, #:lo12:.LANCHOR19]
-.L2048:
+.L2222:
 	ldr	w0, [x29, 196]
 	mov	x2, 0
 	lsl	w1, w0, 7
-	adrp	x0, .LANCHOR141
-	ldr	x0, [x0, #:lo12:.LANCHOR141]
-.L2049:
+	adrp	x0, .LANCHOR144
+	ldr	x0, [x0, #:lo12:.LANCHOR144]
+.L2223:
 	mov	w22, w2
 	cmp	w2, w1
-	bcc	.L2050
+	bcc	.L2224
 	ldr	w0, [x29, 180]
 	add	w0, w0, 1
 	str	w0, [x29, 180]
 	cmp	w0, 5
-	bls	.L2014
-	b	.L2059
-.L2006:
+	bls	.L2188
+	b	.L2233
+.L2180:
 	ldr	w0, [x29, 204]
 	cmp	w0, 3
-	beq	.L2063
+	beq	.L2237
 	cmp	w0, 2
 	mov	w0, 2
 	csel	w0, wzr, w0, ne
@@ -12509,99 +13526,101 @@ idb_write_data:
 	cmp	w0, 2
 	mov	w0, 3
 	csel	w0, wzr, w0, ne
-	b	.L2114
-.L2063:
+	b	.L2291
+.L2237:
 	ldr	w0, [x29, 204]
 	str	w0, [x29, 172]
 	mov	w0, 2
-	b	.L2114
-.L2010:
+	b	.L2291
+.L2184:
 	ldr	w5, [x21, w0, uxtw 2]
 	str	w5, [x1, 2048]
-	b	.L2011
-.L2017:
+	b	.L2185
+.L2191:
 	mov	w0, 0
 	bl	zftl_flash_exit_slc_mode
 	strb	wzr, [x10, #:lo12:.LANCHOR0]
 	strb	wzr, [x8, #:lo12:.LANCHOR19]
-	b	.L2015
-.L2067:
+	b	.L2189
+.L2241:
 	mov	x25, 0
 	str	w20, [x29, 196]
-	b	.L2018
-.L2032:
+	b	.L2192
+.L2206:
 	ldr	w0, [x29, 168]
-	ldrb	w2, [x28]
-	add	w4, w0, w22
-	lsr	w4, w4, 2
+	adrp	x2, .LANCHOR19
+	add	w4, w0, w28
+	ldrb	w2, [x2, #:lo12:.LANCHOR19]
+	ubfx	x4, x4, 2, 16
 	add	w1, w4, 1
 	ldrh	w0, [x27, w1, sxtw 1]
-	cbz	w2, .L2023
+	cbz	w2, .L2197
 	adrp	x0, .LANCHOR1
 	ldrb	w7, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w1, 1
 	cmp	w7, 0
 	csel	w0, w0, w1, ne
-.L2023:
+.L2197:
 	adrp	x1, .LANCHOR28
 	ldrb	w1, [x1, #:lo12:.LANCHOR28]
 	cmp	w1, 9
-	bne	.L2025
-.L2115:
+	bne	.L2199
+.L2292:
 	str	w0, [x29, 208]
 	mov	w0, 61424
 	str	w0, [x29, 212]
 	ldrh	w0, [x27, w4, sxtw 1]
-	cbnz	w2, .L2027
+	cbnz	w2, .L2201
 	mov	w4, w0
-.L2028:
+.L2202:
 	mul	w0, w24, w4
-	cbnz	x25, .L2029
+	cbnz	x25, .L2203
 	str	w4, [x29, 152]
 	add	x2, x29, 208
 	mov	x1, x23
 	add	w0, w0, w26
-	bl	fw_flash_page_prog.constprop.28
-	ldrb	w0, [x28]
+	bl	fw_flash_page_prog.constprop.30
+	ldr	x0, [x29, 144]
 	ldr	w4, [x29, 152]
-	cbnz	w0, .L2030
+	ldrb	w0, [x0]
+	cbnz	w0, .L2204
 	udiv	w1, w26, w24
 	add	w2, w4, 1
 	bl	id_block_prog_msb_ff_data
-.L2030:
+.L2204:
 	ldr	w0, [x29, 196]
 	add	x23, x23, 2048
 	add	w0, w0, 16
-	cmp	w22, w0
-	bcc	.L2031
+	cmp	w28, w0
+	bcc	.L2205
 	ldr	w0, [x29, 196]
 	add	w1, w0, 20
 	add	x0, x21, 2048
-	cmp	w22, w1
+	cmp	w28, w1
 	csel	x23, x0, x23, cc
-.L2031:
-	add	w5, w22, 4
+.L2205:
+	add	w5, w28, 4
 	mov	x25, 0
-	and	w22, w5, 65535
-	b	.L2021
-.L2025:
+	and	w28, w5, 65535
+	b	.L2195
+.L2199:
 	sub	w0, w0, #1
 	lsl	w0, w0, 2
-	b	.L2115
-.L2027:
+	b	.L2292
+.L2201:
 	adrp	x0, .LANCHOR1
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w4, 1
 	cmp	w1, 0
 	csel	w4, w0, w4, ne
-	b	.L2028
-.L2029:
+	b	.L2202
+.L2203:
 	add	x2, x29, 208
 	mov	x1, x25
 	add	w0, w0, w26
-	bl	fw_flash_page_prog.constprop.28
-	b	.L2031
-.L2047:
+	bl	fw_flash_page_prog.constprop.30
+	b	.L2205
+.L2221:
 	ldr	w0, [x29, 160]
 	adrp	x1, .LANCHOR19
 	sub	w27, w24, w0
@@ -12609,32 +13628,32 @@ idb_write_data:
 	ldrb	w1, [x1, #:lo12:.LANCHOR19]
 	and	w27, w27, 65535
 	add	w22, w0, w25
-	ldr	x0, [x29, 104]
+	ldr	x0, [x29, 112]
 	udiv	w22, w22, w24
 	and	w22, w22, 65535
 	ldrh	w0, [x0, w22, sxtw 1]
-	cbnz	w1, .L2034
+	cbnz	w1, .L2208
 	mov	w22, w0
-.L2035:
+.L2209:
 	adrp	x0, .LANCHOR17
-	ldr	w1, [x29, 148]
+	ldr	w1, [x29, 152]
 	ldrb	w26, [x0, #:lo12:.LANCHOR17]
 	ldr	w0, [x29, 160]
 	add	w0, w0, w1
-	ldr	w1, [x29, 152]
+	ldr	w1, [x29, 144]
 	madd	w22, w1, w22, w0
-	adrp	x0, .LANCHOR32+9
-	ldrb	w0, [x0, #:lo12:.LANCHOR32+9]
+	adrp	x0, .LANCHOR33+9
+	ldrb	w0, [x0, #:lo12:.LANCHOR33+9]
 	udiv	w22, w22, w0
-	adrp	x0, .LANCHOR46
-	ldrb	w0, [x0, #:lo12:.LANCHOR46]
+	adrp	x0, .LANCHOR50
+	ldrb	w0, [x0, #:lo12:.LANCHOR50]
 	str	w0, [x29, 132]
 	mov	w0, w26
 	bl	nandc_bch_sel
 	adrp	x0, .LANCHOR21
 	add	x0, x0, :lo12:.LANCHOR21
-	str	x0, [x29, 112]
-.L2036:
+	str	x0, [x29, 120]
+.L2210:
 	mov	w4, w24
 	add	x3, x29, 208
 	mov	x2, x23
@@ -12643,38 +13662,37 @@ idb_write_data:
 	bl	flash_read_page
 	mov	w5, w0
 	cmn	w0, #1
-	bne	.L2037
+	bne	.L2211
 	ldr	x0, [x29, 184]
 	ldrb	w6, [x0]
-	cbnz	w6, .L2038
-.L2041:
-	adrp	x0, .LANCHOR167
-	ldr	x6, [x0, #:lo12:.LANCHOR167]
-	cbnz	x6, .L2039
-.L2040:
-	ldr	x0, [x29, 112]
+	cbnz	w6, .L2212
+.L2215:
+	adrp	x0, .LANCHOR174
+	ldr	x6, [x0, #:lo12:.LANCHOR174]
+	cbnz	x6, .L2213
+.L2214:
+	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
-	cbz	w0, .L2037
+	cbz	w0, .L2211
 	mov	w4, w24
 	add	x3, x29, 208
 	mov	x2, x23
 	mov	w1, w22
 	mov	w0, 0
 	bl	flash_ddr_tuning_read
-	b	.L2116
-.L2034:
+	b	.L2293
+.L2208:
 	adrp	x0, .LANCHOR1
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w22, 1
 	cmp	w1, 0
 	csel	w22, w0, w22, ne
-	b	.L2035
-.L2038:
+	b	.L2209
+.L2212:
 	ldr	x0, [x29, 184]
 	mov	w1, w22
-	str	w6, [x29, 100]
+	stp	w6, w5, [x29, 104]
 	mov	w4, w24
-	str	w5, [x29, 128]
 	add	x3, x29, 208
 	mov	x2, x23
 	strb	wzr, [x0]
@@ -12682,25 +13700,24 @@ idb_write_data:
 	bl	flash_read_page
 	cmn	w0, #1
 	ldr	x1, [x29, 184]
-	ldr	w6, [x29, 100]
-	ldr	w5, [x29, 128]
+	ldp	w6, w5, [x29, 104]
 	strb	w6, [x1]
-	beq	.L2041
-.L2116:
+	beq	.L2215
+.L2293:
 	mov	w5, w0
-.L2037:
+.L2211:
 	cmn	w5, #1
 	cset	w4, eq
 	cmp	w26, 16
 	cset	w0, ne
 	tst	w4, w0
-	beq	.L2043
+	beq	.L2217
 	mov	w0, 16
 	mov	w26, 16
 	bl	nandc_bch_sel
-	b	.L2036
-.L2039:
-	str	w5, [x29, 128]
+	b	.L2210
+.L2213:
+	str	w5, [x29, 108]
 	mov	w4, w24
 	add	x3, x29, 208
 	mov	x2, x23
@@ -12708,106 +13725,106 @@ idb_write_data:
 	mov	w0, 0
 	blr	x6
 	cmn	w0, #1
-	ldr	w5, [x29, 128]
-	beq	.L2040
-	b	.L2116
-.L2043:
+	ldr	w5, [x29, 108]
+	beq	.L2214
+	b	.L2293
+.L2217:
 	ldr	w0, [x29, 132]
 	bl	nandc_bch_sel
 	cmp	w4, 0
-	ldr	w0, [x29, 148]
+	ldr	w0, [x29, 152]
 	csinv	w28, w28, wzr, eq
 	cmp	w25, 0
 	ccmp	w19, w0, 0, eq
-	bne	.L2045
-	cbnz	w28, .L2045
+	bne	.L2219
+	cbnz	w28, .L2219
 	ldr	w1, [x23]
 	mov	w0, 18766
 	movk	w0, 0x464e, lsl 16
 	cmp	w1, w0
-	bne	.L2045
+	bne	.L2219
 	ldr	w0, [x29, 156]
 	ldrb	w24, [x23, 17]
 	add	w0, w0, w27
 	str	w0, [x29, 156]
-.L2046:
+.L2220:
 	add	w25, w27, w25
 	and	w25, w25, 65535
-	b	.L2033
-.L2045:
+	b	.L2207
+.L2219:
 	ubfiz	x0, x27, 9, 16
 	str	wzr, [x29, 160]
 	add	x23, x23, x0
-	b	.L2046
-.L2050:
+	b	.L2220
+.L2224:
 	ldr	w4, [x0, x2, lsl 2]
 	add	x2, x2, 1
 	add	x3, x21, x2, lsl 2
 	ldr	w3, [x3, -4]
 	cmp	w4, w3
-	beq	.L2049
+	beq	.L2223
 	mov	w2, 512
 	mov	w1, 0
 	bl	ftl_memset
 	mov	w1, w22
-	adrp	x0, .LC126
-	add	x0, x0, :lo12:.LC126
+	adrp	x0, .LC136
+	add	x0, x0, :lo12:.LC136
 	bl	printf
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_erase_block
-.L2014:
+.L2188:
 	ldr	w0, [x29, 192]
 	add	w0, w0, 1
 	str	w0, [x29, 192]
 	cmp	w0, 4
-	bne	.L2052
-.L2059:
+	bne	.L2226
+.L2233:
 	mov	w0, 0
 	bl	zftl_flash_exit_slc_mode
 	adrp	x0, .LANCHOR0
 	ldrb	w1, [x29, 176]
 	strb	w1, [x0, #:lo12:.LANCHOR0]
 	ldr	w0, [x29, 200]
-	cbz	w0, .L2053
+	cbz	w0, .L2227
 	adrp	x0, .LANCHOR19
 	ldrb	w1, [x29, 204]
 	strb	w1, [x0, #:lo12:.LANCHOR19]
-.L2053:
+.L2227:
 	mov	w1, 2
-	adrp	x0, .LANCHOR33
-	strb	w1, [x0, #:lo12:.LANCHOR33]
+	adrp	x0, .LANCHOR34
+	strb	w1, [x0, #:lo12:.LANCHOR34]
 	mov	w0, 0
 	bl	zftl_flash_enter_slc_mode
 	ldr	w0, [x29, 180]
-	cbnz	w0, .L2005
-	adrp	x0, .LC127
+	cbnz	w0, .L2179
+	adrp	x0, .LC137
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC127
+	add	x0, x0, :lo12:.LC137
 	bl	printf
-.L2005:
-	adrp	x0, .LANCHOR139
-	adrp	x19, .LANCHOR138
-	str	wzr, [x0, #:lo12:.LANCHOR139]
-	adrp	x0, .LANCHOR140
-	strb	wzr, [x0, #:lo12:.LANCHOR140]
-	ldr	x0, [x19, #:lo12:.LANCHOR138]
-	cbz	x0, .L2055
-	bl	free
-	str	xzr, [x19, #:lo12:.LANCHOR138]
-.L2055:
+.L2179:
+	adrp	x0, .LANCHOR142
 	adrp	x19, .LANCHOR141
+	str	wzr, [x0, #:lo12:.LANCHOR142]
+	adrp	x0, .LANCHOR143
+	strb	wzr, [x0, #:lo12:.LANCHOR143]
 	ldr	x0, [x19, #:lo12:.LANCHOR141]
-	cbz	x0, .L2057
+	cbz	x0, .L2229
 	bl	free
 	str	xzr, [x19, #:lo12:.LANCHOR141]
-.L2057:
-	adrp	x0, .LANCHOR170
-	ldr	w1, [x29, 144]
-	str	w1, [x0, #:lo12:.LANCHOR170]
-.L2061:
+.L2229:
+	adrp	x19, .LANCHOR144
+	ldr	x0, [x19, #:lo12:.LANCHOR144]
+	cbz	x0, .L2231
+	bl	free
+	str	xzr, [x19, #:lo12:.LANCHOR144]
+.L2231:
+	adrp	x0, .LANCHOR177
+	ldr	w1, [x29, 140]
+	str	w1, [x0, #:lo12:.LANCHOR177]
+.L2235:
 	mov	w0, 0
-.L1993:
+.L2166:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -12838,17 +13855,17 @@ flash_start_tlc_page_prog:
 	mov	x24, x6
 	cmp	w1, w26
 	mov	x19, x0
-	bhi	.L2119
-	adrp	x1, .LANCHOR171
+	bhi	.L2296
+	adrp	x1, .LANCHOR178
 	adrp	x0, .LC0
-	mov	w2, 753
-	add	x1, x1, :lo12:.LANCHOR171
+	mov	w2, 859
+	add	x1, x1, :lo12:.LANCHOR178
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2119:
+.L2296:
 	ldrb	w0, [x19, #:lo12:.LANCHOR18]
 	cmp	w0, w26
-	bls	.L2118
+	bls	.L2295
 	adrp	x0, .LANCHOR30
 	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w5, [x0, w26, sxtw]
@@ -12856,12 +13873,12 @@ flash_start_tlc_page_prog:
 	ldr	x19, [x0, #:lo12:.LANCHOR13]
 	mov	w0, w5
 	bl	nandc_cs
-	cbz	w25, .L2121
+	cbz	w25, .L2298
 	sxtw	x0, w5
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 8
 	str	w25, [x0, 8]
-.L2121:
+.L2298:
 	ubfiz	x0, x5, 8, 8
 	add	x19, x19, x0
 	mov	w0, 128
@@ -12879,11 +13896,11 @@ flash_start_tlc_page_prog:
 	sub	w0, w20, #1
 	add	w0, w0, w21
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR32+9
+	adrp	x0, .LANCHOR33+9
 	mov	x4, x24
 	mov	x3, x23
 	mov	w1, 1
-	ldrb	w2, [x0, #:lo12:.LANCHOR32+9]
+	ldrb	w2, [x0, #:lo12:.LANCHOR33+9]
 	mov	w0, w5
 	bl	nandc_xfer
 	ldp	x23, x24, [sp, 48]
@@ -12892,8 +13909,8 @@ flash_start_tlc_page_prog:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 80
-	b	nandc_de_cs.constprop.31
-.L2118:
+	b	nandc_de_cs.constprop.33
+.L2295:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -12905,31 +13922,84 @@ flash_start_tlc_page_prog:
 	.align	2
 	.type	queue_tlc_prog_cmd, %function
 queue_tlc_prog_cmd:
-	stp	x29, x30, [sp, -48]!
+	stp	x29, x30, [sp, -64]!
 	mov	w2, 24
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	mov	x21, x0
-	adrp	x0, .LANCHOR31
+	ldr	x7, [x0]
+	adrp	x0, .LANCHOR32
 	mov	w22, 1
 	stp	x19, x20, [sp, 16]
-	ldr	x7, [x21]
-	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	str	x23, [sp, 48]
+	mov	w23, w1
 	sub	w2, w2, w0
 	ldr	w1, [x7, 40]
 	lsl	w19, w22, w0
+	adrp	x0, .LANCHOR37
 	lsl	w20, w22, w2
 	sub	w19, w19, #1
+	ldrb	w0, [x0, #:lo12:.LANCHOR37]
 	sub	w20, w20, #1
-	ldr	x5, [x7, 8]
 	and	w20, w20, w1
 	lsr	w1, w1, w2
 	and	w19, w19, w1
-	ldr	x6, [x7, 24]
 	and	w19, w19, 255
-	ldrb	w0, [x7, 60]
+	cbz	w0, .L2304
+	mov	w0, w19
+	bl	zftl_flash_exit_slc_mode
+	ldr	x0, [x21]
+	mov	w4, w20
+	mov	w3, w19
+	mov	w1, w22
+	mov	w2, 26
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	mov	w0, 0
+	bl	flash_start_one_pass_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x0, [x21, 8]
+	add	w4, w20, w22
+	mov	w3, w19
+	mov	w1, w22
+	mov	w2, 26
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	mov	w0, 0
+	bl	flash_start_one_pass_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x0, [x21, 16]
+	add	w4, w20, 2
+	mov	w3, w19
+	mov	w2, 16
+	mov	w1, w22
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	mov	w0, 0
+	bl	flash_start_one_pass_page_prog
+.L2305:
+	cbz	w23, .L2303
+	ldr	x1, [x21]
+	mov	w0, 4
+	strb	w0, [x1, 58]
+	mov	w0, 1
+	strb	w0, [x1, 59]
+	mov	w0, -1
+	strb	w0, [x1]
+	adrp	x0, .LANCHOR60
+	add	x0, x0, :lo12:.LANCHOR60
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	b	buf_add_tail
+.L2304:
+	ldr	x5, [x7, 8]
 	mov	w4, w20
+	ldr	x6, [x7, 24]
 	mov	w3, w19
+	ldrb	w0, [x7, 60]
 	mov	w1, w22
 	mov	w2, 26
 	bl	flash_start_tlc_page_prog
@@ -12954,18 +14024,13 @@ queue_tlc_prog_cmd:
 	ldr	x6, [x0, 24]
 	ldrb	w0, [x7, 60]
 	bl	flash_start_tlc_page_prog
-	ldr	x1, [x21]
-	mov	w0, 4
-	strb	w22, [x1, 59]
-	strb	w0, [x1, 58]
-	mov	w0, -1
-	strb	w0, [x1]
-	adrp	x0, .LANCHOR56
-	add	x0, x0, :lo12:.LANCHOR56
+	b	.L2305
+.L2303:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 48
-	b	buf_add_tail
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	ret
 	.size	queue_tlc_prog_cmd, .-queue_tlc_prog_cmd
 	.section	.text.sblk_3d_tlc_dump_prog,"ax",@progbits
 	.align	2
@@ -12973,32 +14038,67 @@ queue_tlc_prog_cmd:
 	.type	sblk_3d_tlc_dump_prog, %function
 sblk_3d_tlc_dump_prog:
 	stp	x29, x30, [sp, -48]!
-	mov	w1, 24
+	mov	w2, 24
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x20, x0
-	adrp	x0, .LANCHOR31
+	ldr	w1, [x0, 40]
+	adrp	x0, .LANCHOR32
 	stp	x21, x22, [sp, 32]
 	mov	w22, 1
-	ldrb	w0, [x0, #:lo12:.LANCHOR31]
-	ldr	w3, [x20, 40]
-	sub	w1, w1, w0
+	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	sub	w2, w2, w0
 	lsl	w19, w22, w0
+	adrp	x0, .LANCHOR37
+	lsl	w21, w22, w2
 	sub	w19, w19, #1
-	lsl	w21, w22, w1
+	ldrb	w0, [x0, #:lo12:.LANCHOR37]
 	sub	w21, w21, #1
-	and	w21, w21, w3
-	lsr	w1, w3, w1
-	mov	w2, w3
+	and	w21, w21, w1
+	lsr	w1, w1, w2
 	and	w19, w19, w1
-	adrp	x0, .LC128
-	mov	w1, w21
-	add	x0, x0, :lo12:.LC128
-	bl	printf
 	and	w19, w19, 255
+	cbz	w0, .L2309
+	mov	w0, w19
+	bl	zftl_flash_exit_slc_mode
+	ldr	x5, [x20, 8]
+	mov	w4, w21
+	ldr	x6, [x20, 24]
+	mov	w3, w19
+	mov	w1, w22
+	mov	w2, 26
+	mov	w0, 0
+	bl	flash_start_one_pass_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x5, [x20, 8]
+	add	w4, w21, w22
+	ldr	x6, [x20, 24]
+	mov	w3, w19
+	mov	w1, w22
+	mov	w2, 26
+	mov	w0, 0
+	bl	flash_start_one_pass_page_prog
+	bl	nandc_wait_flash_ready
 	ldr	x5, [x20, 8]
+	add	w4, w21, 2
 	ldr	x6, [x20, 24]
+	mov	w3, w19
+	mov	w2, 16
+	mov	w1, w22
+	mov	w0, 0
+	bl	flash_start_one_pass_page_prog
+.L2310:
+	bl	nandc_wait_flash_ready
+	ldr	w0, [x20, 40]
+	mov	w1, 64
+	ldp	x21, x22, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	b	flash_wait_device_ready
+.L2309:
+	ldr	x5, [x20, 8]
 	mov	w4, w21
+	ldr	x6, [x20, 24]
 	mov	w3, w19
 	mov	w1, w22
 	mov	w2, 26
@@ -13022,13 +14122,7 @@ sblk_3d_tlc_dump_prog:
 	mov	w1, 3
 	mov	w0, 0
 	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldr	w0, [x20, 40]
-	mov	w1, 64
-	ldp	x21, x22, [sp, 32]
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
-	b	flash_wait_device_ready
+	b	.L2310
 	.size	sblk_3d_tlc_dump_prog, .-sblk_3d_tlc_dump_prog
 	.section	.text.flash_start_3d_mlc_page_prog,"ax",@progbits
 	.align	2
@@ -13049,17 +14143,17 @@ flash_start_3d_mlc_page_prog:
 	mov	x23, x4
 	cmp	w1, w24
 	mov	x19, x0
-	bhi	.L2131
-	adrp	x1, .LANCHOR172
+	bhi	.L2313
+	adrp	x1, .LANCHOR179
 	adrp	x0, .LC0
-	mov	w2, 785
-	add	x1, x1, :lo12:.LANCHOR172
+	mov	w2, 892
+	add	x1, x1, :lo12:.LANCHOR179
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2131:
+.L2313:
 	ldrb	w0, [x19, #:lo12:.LANCHOR18]
 	cmp	w0, w24
-	bls	.L2130
+	bls	.L2312
 	adrp	x0, .LANCHOR30
 	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w5, [x0, w24, sxtw]
@@ -13081,15 +14175,15 @@ flash_start_3d_mlc_page_prog:
 	str	w0, [x19, 2052]
 	mov	w0, w20
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR32+9
+	adrp	x0, .LANCHOR33+9
 	mov	x4, x23
 	mov	x3, x22
 	mov	w1, 1
-	ldrb	w2, [x0, #:lo12:.LANCHOR32+9]
+	ldrb	w2, [x0, #:lo12:.LANCHOR33+9]
 	mov	w0, w5
 	bl	nandc_xfer
 	str	w21, [x19, 2056]
-.L2130:
+.L2312:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -13106,12 +14200,12 @@ sblk_mlc_dump_prog:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x20, x0
-	adrp	x0, .LANCHOR31
-	ldrb	w19, [x0, #:lo12:.LANCHOR31]
+	ldr	w1, [x0, 40]
+	adrp	x0, .LANCHOR32
+	str	x21, [sp, 32]
+	ldrb	w19, [x0, #:lo12:.LANCHOR32]
 	mov	w0, 1
-	ldr	w1, [x20, 40]
 	sub	w2, w2, w19
-	str	x21, [sp, 32]
 	lsl	w19, w0, w19
 	sub	w19, w19, #1
 	lsl	w21, w0, w2
@@ -13122,12 +14216,16 @@ sblk_mlc_dump_prog:
 	and	w19, w19, 255
 	mov	w0, w19
 	bl	zftl_flash_exit_slc_mode
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2317
 	ldr	w2, [x20, 40]
+	adrp	x0, .LC138
 	mov	w1, w21
-	adrp	x0, .LC129
-	add	x0, x0, :lo12:.LC129
+	add	x0, x0, :lo12:.LC138
 	add	w3, w2, 1
 	bl	printf
+.L2317:
 	ldr	x3, [x20, 8]
 	mov	w2, w21
 	ldr	x4, [x20, 24]
@@ -13146,7 +14244,7 @@ sblk_mlc_dump_prog:
 	mov	w1, 64
 	bl	flash_wait_device_ready
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.31
+	bl	nandc_de_cs.constprop.33
 	ldr	x21, [sp, 32]
 	mov	w0, w2
 	ldp	x19, x20, [sp, 16]
@@ -13162,11 +14260,11 @@ flash_start_page_prog:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	and	w21, w0, 255
-	adrp	x0, .LANCHOR31
+	adrp	x0, .LANCHOR32
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
 	mov	w19, 24
-	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	ldrb	w0, [x0, #:lo12:.LANCHOR32]
 	mov	w20, 1
 	str	x27, [sp, 80]
 	adrp	x27, .LANCHOR18
@@ -13182,17 +14280,17 @@ flash_start_page_prog:
 	mov	x22, x2
 	mov	x23, x3
 	cmp	w0, w20
-	bhi	.L2137
-	adrp	x1, .LANCHOR173
+	bhi	.L2323
+	adrp	x1, .LANCHOR180
 	adrp	x0, .LC0
-	mov	w2, 836
-	add	x1, x1, :lo12:.LANCHOR173
+	mov	w2, 945
+	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2137:
+.L2323:
 	ldrb	w0, [x27, #:lo12:.LANCHOR18]
 	cmp	w0, w20
-	bls	.L2136
+	bls	.L2322
 	adrp	x0, .LANCHOR30
 	add	x0, x0, :lo12:.LANCHOR30
 	mov	w19, 1
@@ -13203,27 +14301,27 @@ flash_start_page_prog:
 	and	w19, w19, w24
 	ldr	x25, [x0, #:lo12:.LANCHOR13]
 	bl	nandc_rdy_status
-	cbnz	w0, .L2139
+	cbnz	w0, .L2325
 	ldrb	w0, [x27, #:lo12:.LANCHOR18]
 	cmp	w0, 1
-	bne	.L2140
+	bne	.L2326
 	bl	nandc_wait_flash_ready
-.L2139:
+.L2325:
 	mov	w0, w26
 	bl	hynix_reconfig_rr_para
 	mov	w0, w26
 	bl	nandc_cs
 	tst	x24, 50331648
-	bne	.L2141
+	bne	.L2327
 	mov	w0, w19
 	bl	slc_phy_page_address_calc
 	mov	w19, w0
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L2142
+	cbz	w0, .L2328
 	mov	w0, w26
 	bl	zftl_flash_enter_slc_mode
-.L2142:
+.L2328:
 	ubfiz	x20, x26, 8, 8
 	mov	w0, 128
 	add	x20, x25, x20
@@ -13236,13 +14334,19 @@ flash_start_page_prog:
 	str	w0, [x20, 2052]
 	lsr	w0, w19, 16
 	str	w0, [x20, 2052]
+	adrp	x0, .LANCHOR31
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	cbz	w0, .L2329
+	lsr	w0, w19, 24
+	str	w0, [x20, 2052]
+.L2329:
 	mov	w0, w19
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR32+9
+	adrp	x0, .LANCHOR33+9
 	mov	x4, x23
 	mov	x3, x22
 	mov	w1, 1
-	ldrb	w2, [x0, #:lo12:.LANCHOR32+9]
+	ldrb	w2, [x0, #:lo12:.LANCHOR33+9]
 	mov	w0, w26
 	bl	nandc_xfer
 	ldr	x27, [sp, 80]
@@ -13252,18 +14356,18 @@ flash_start_page_prog:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 96
-	b	nandc_de_cs.constprop.31
-.L2140:
+	b	nandc_de_cs.constprop.33
+.L2326:
 	mov	w2, 64
 	mov	w1, w19
 	mov	w0, w20
 	bl	flash_wait_device_ready_raw
-	b	.L2139
-.L2141:
+	b	.L2325
+.L2327:
 	mov	w0, w26
 	bl	zftl_flash_exit_slc_mode
-	b	.L2142
-.L2136:
+	b	.L2328
+.L2322:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -13285,16 +14389,16 @@ queue_prog_cmd:
 	mov	x19, x0
 	mov	w0, 16
 	bl	flash_start_page_prog
-	adrp	x0, .LANCHOR56
+	adrp	x0, .LANCHOR60
 	ldr	w3, [x19, 40]
-	ldrb	w1, [x0, #:lo12:.LANCHOR56]
+	ldrb	w1, [x0, #:lo12:.LANCHOR60]
 	cmp	w1, 255
-	beq	.L2148
-	adrp	x2, .LANCHOR31
+	beq	.L2338
+	adrp	x2, .LANCHOR32
 	mov	w5, 24
-	adrp	x6, .LANCHOR52
-	add	x6, x6, :lo12:.LANCHOR52
-	ldrb	w4, [x2, #:lo12:.LANCHOR31]
+	adrp	x6, .LANCHOR56
+	add	x6, x6, :lo12:.LANCHOR56
+	ldrb	w4, [x2, #:lo12:.LANCHOR32]
 	mov	w2, 1
 	mov	x8, x6
 	sub	w5, w5, w4
@@ -13303,19 +14407,19 @@ queue_prog_cmd:
 	and	w2, w2, 65535
 	asr	w3, w3, w5
 	and	w3, w3, w2
-.L2150:
+.L2340:
 	add	x7, x6, x1, lsl 6
 	ldr	w4, [x7, 40]
 	lsr	w4, w4, w5
 	and	w4, w2, w4
 	cmp	w3, w4
-	bne	.L2149
+	bne	.L2339
 	ldrb	w4, [x7, 58]
 	cmp	w4, 7
-	bne	.L2149
+	bne	.L2339
 	mov	w1, 3
 	strb	w1, [x7, 58]
-.L2148:
+.L2338:
 	mov	w1, 3
 	strb	w1, [x19, 58]
 	mov	w1, 1
@@ -13323,16 +14427,16 @@ queue_prog_cmd:
 	mov	w1, -1
 	strb	w1, [x19]
 	mov	x1, x19
-	add	x0, x0, :lo12:.LANCHOR56
+	add	x0, x0, :lo12:.LANCHOR60
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	buf_add_tail
-.L2149:
+.L2339:
 	lsl	x1, x1, 6
 	ldrb	w1, [x8, x1]
 	cmp	w1, 255
-	bne	.L2150
-	b	.L2148
+	bne	.L2340
+	b	.L2338
 	.size	queue_prog_cmd, .-queue_prog_cmd
 	.section	.text.flash_complete_plane_page_read,"ax",@progbits
 	.align	2
@@ -13344,11 +14448,11 @@ flash_complete_plane_page_read:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	mov	w24, w0
-	adrp	x0, .LANCHOR31
+	adrp	x0, .LANCHOR32
 	stp	x21, x22, [sp, 32]
 	stp	x19, x20, [sp, 16]
 	mov	w19, 1
-	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	ldrb	w0, [x0, #:lo12:.LANCHOR32]
 	mov	x20, x1
 	mov	x21, x2
 	sub	w22, w4, w0
@@ -13361,110 +14465,123 @@ flash_complete_plane_page_read:
 	mov	x23, x0
 	ldrb	w1, [x0, #:lo12:.LANCHOR18]
 	cmp	w1, w19
-	bhi	.L2157
-	adrp	x1, .LANCHOR174
+	bhi	.L2347
+	adrp	x1, .LANCHOR181
 	adrp	x0, .LC0
-	mov	w2, 925
-	add	x1, x1, :lo12:.LANCHOR174
+	mov	w2, 1055
+	add	x1, x1, :lo12:.LANCHOR181
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2157:
+.L2347:
 	ldrb	w0, [x23, #:lo12:.LANCHOR18]
 	cmp	w0, w19
-	bls	.L2165
+	bls	.L2358
 	adrp	x2, .LANCHOR30
 	add	x2, x2, :lo12:.LANCHOR30
 	adrp	x0, .LANCHOR13
 	mov	w4, 1
 	lsl	w4, w4, w22
 	sub	w4, w4, #1
-	ldrb	w7, [x2, w19, sxtw]
+	ldrb	w8, [x2, w19, sxtw]
 	and	w4, w4, w24
-	ldr	x6, [x0, #:lo12:.LANCHOR13]
+	ldr	x7, [x0, #:lo12:.LANCHOR13]
 	ubfx	x24, x24, 24, 2
-	mov	w0, w7
+	mov	w0, w8
 	bl	nandc_cs
-	cbnz	w24, .L2159
+	cbnz	w24, .L2349
 	mov	w0, w4
 	bl	slc_phy_page_address_calc
 	mov	w4, w0
-.L2159:
+.L2349:
 	adrp	x0, .LANCHOR20+16
-	and	x1, x7, 255
-	and	w5, w4, 255
-	lsr	w3, w4, 8
+	and	x1, x8, 255
+	and	w6, w4, 255
+	lsr	w5, w4, 8
 	ldrb	w0, [x0, #:lo12:.LANCHOR20+16]
-	lsr	w2, w4, 16
+	lsr	w3, w4, 16
+	adrp	x2, .LANCHOR31
 	cmp	w0, 1
 	adrp	x0, .LANCHOR16
-	bne	.L2160
-	add	x1, x6, x1, lsl 8
-	mov	w6, 6
-.L2172:
-	str	w6, [x1, 2056]
+	bne	.L2350
+	add	x1, x7, x1, lsl 8
+	mov	w7, 6
+.L2376:
+	str	w7, [x1, 2056]
 	str	wzr, [x1, 2052]
 	str	wzr, [x1, 2052]
+	str	w6, [x1, 2052]
 	str	w5, [x1, 2052]
 	str	w3, [x1, 2052]
+	ldrb	w2, [x2, #:lo12:.LANCHOR31]
+	cbz	w2, .L2372
+	lsr	w2, w4, 24
 	str	w2, [x1, 2052]
-.L2170:
+.L2372:
 	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	mov	w2, 224
 	str	w2, [x1, 2056]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L2163
-	cbz	w24, .L2163
-	adrp	x0, .LANCHOR35
-	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbnz	w0, .L2163
+	bne	.L2356
+	cbz	w24, .L2356
+	adrp	x0, .LANCHOR36
+	ldrb	w0, [x0, #:lo12:.LANCHOR36]
+	cbnz	w0, .L2356
+	adrp	x0, .LANCHOR37
+	ldrb	w0, [x0, #:lo12:.LANCHOR37]
+	cbnz	w0, .L2356
 	add	w4, w4, w4, lsl 1
 	sub	w0, w24, #1
 	add	w0, w4, w0
-.L2171:
+.L2373:
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR32+9
+	adrp	x0, .LANCHOR33+9
 	mov	x4, x21
 	mov	x3, x20
 	mov	w1, 0
-	ldrb	w2, [x0, #:lo12:.LANCHOR32+9]
-	mov	w0, w7
+	ldrb	w2, [x0, #:lo12:.LANCHOR33+9]
+	mov	w0, w8
 	bl	nandc_xfer
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.31
+	bl	nandc_de_cs.constprop.33
 	mov	w0, w2
-.L2156:
+.L2346:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2160:
-	ldr	x8, [x0, #:lo12:.LANCHOR16]
-	add	x1, x6, x1, lsl 8
-	ldrb	w8, [x8, 12]
-	cmp	w8, 3
-	bne	.L2162
-	mov	w6, 5
-	b	.L2172
-.L2162:
+.L2350:
+	ldr	x10, [x0, #:lo12:.LANCHOR16]
+	add	x1, x7, x1, lsl 8
+	ldrb	w10, [x10, 12]
+	cmp	w10, 3
+	bne	.L2353
+	mov	w7, 5
+	b	.L2376
+.L2353:
 	str	wzr, [x1, 2056]
 	str	wzr, [x1, 2052]
 	str	wzr, [x1, 2052]
+	str	w6, [x1, 2052]
+	ldrb	w2, [x2, #:lo12:.LANCHOR31]
 	str	w5, [x1, 2052]
 	str	w3, [x1, 2052]
+	cbz	w2, .L2355
+	lsr	w2, w4, 24
 	str	w2, [x1, 2052]
+.L2355:
 	mov	w2, 5
 	str	w2, [x1, 2056]
 	str	wzr, [x1, 2052]
 	str	wzr, [x1, 2052]
-	b	.L2170
-.L2163:
+	b	.L2372
+.L2356:
 	mov	w0, w4
-	b	.L2171
-.L2165:
+	b	.L2373
+.L2358:
 	mov	w0, -1
-	b	.L2156
+	b	.L2346
 	.size	flash_complete_plane_page_read, .-flash_complete_plane_page_read
 	.section	.text.flash_complete_page_read,"ax",@progbits
 	.align	2
@@ -13475,11 +14592,11 @@ flash_complete_page_read:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	mov	w21, w0
-	adrp	x0, .LANCHOR31
+	adrp	x0, .LANCHOR32
 	stp	x19, x20, [sp, 16]
 	mov	x22, x1
 	mov	w1, 24
-	ldrb	w20, [x0, #:lo12:.LANCHOR31]
+	ldrb	w20, [x0, #:lo12:.LANCHOR32]
 	mov	w0, 1
 	stp	x23, x24, [sp, 48]
 	mov	x23, x2
@@ -13498,14 +14615,14 @@ flash_complete_page_read:
 	and	w19, w19, w21
 	ubfx	x24, x21, 24, 2
 	cmp	w0, w20
-	bhi	.L2174
-	adrp	x1, .LANCHOR175
+	bhi	.L2378
+	adrp	x1, .LANCHOR182
 	adrp	x0, .LC0
-	mov	w2, 1049
-	add	x1, x1, :lo12:.LANCHOR175
+	mov	w2, 1212
+	add	x1, x1, :lo12:.LANCHOR182
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2174:
+.L2378:
 	adrp	x0, .LANCHOR30
 	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w25, [x0, w20, sxtw]
@@ -13513,78 +14630,86 @@ flash_complete_page_read:
 	ldr	x4, [x0, #:lo12:.LANCHOR13]
 	mov	w0, w25
 	bl	nandc_cs
-	cbnz	w24, .L2175
+	cbnz	w24, .L2379
 	mov	w0, w19
 	bl	slc_phy_page_address_calc
 	mov	w19, w0
-.L2175:
+.L2379:
 	ubfiz	x0, x25, 8, 8
 	mov	w1, 5
 	add	x0, x4, x0
+	adrp	x20, .LANCHOR33
 	str	w1, [x0, 2056]
-	and	w1, w19, 255
+	add	x1, x20, :lo12:.LANCHOR33
 	str	wzr, [x0, 2052]
 	str	wzr, [x0, 2052]
+	ldrb	w1, [x1, 12]
+	cmp	w1, 3
+	bne	.L2380
+	and	w1, w19, 255
 	str	w1, [x0, 2052]
 	lsr	w1, w19, 8
 	str	w1, [x0, 2052]
 	lsr	w1, w19, 16
 	str	w1, [x0, 2052]
+.L2380:
 	mov	w1, 224
 	str	w1, [x0, 2056]
 	adrp	x0, .LANCHOR16
 	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L2176
-	cbz	w24, .L2176
-	adrp	x0, .LANCHOR35
-	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbnz	w0, .L2176
+	bne	.L2381
+	cbz	w24, .L2381
+	adrp	x0, .LANCHOR36
+	ldrb	w0, [x0, #:lo12:.LANCHOR36]
+	cbnz	w0, .L2381
+	adrp	x0, .LANCHOR37
+	ldrb	w0, [x0, #:lo12:.LANCHOR37]
+	cbnz	w0, .L2381
 	sub	w0, w24, #1
 	add	w1, w19, w19, lsl 1
 	add	w0, w0, w1
-.L2203:
-	adrp	x20, .LANCHOR32
-	add	x28, x20, :lo12:.LANCHOR32
+.L2408:
+	add	x28, x20, :lo12:.LANCHOR33
 	bl	nandc_set_seed
 	mov	x4, x23
 	mov	x3, x22
-	ldrb	w2, [x28, 9]
 	mov	w1, 0
 	mov	w0, w25
+	ldrb	w2, [x28, 9]
 	bl	nandc_xfer
 	cmn	w0, #1
-	bne	.L2178
-	adrp	x26, .LANCHOR48
-	ldrb	w27, [x26, #:lo12:.LANCHOR48]
-	cbz	w27, .L2179
+	bne	.L2383
+	adrp	x26, .LANCHOR52
+	ldrb	w27, [x26, #:lo12:.LANCHOR52]
+	cbz	w27, .L2384
 	ldrb	w4, [x28, 9]
 	mov	x3, x23
-	strb	wzr, [x26, #:lo12:.LANCHOR48]
+	strb	wzr, [x26, #:lo12:.LANCHOR52]
 	mov	x2, x22
 	orr	w1, w19, w24, lsl 24
 	mov	w0, w25
 	bl	flash_read_page
-	strb	w27, [x26, #:lo12:.LANCHOR48]
-	cbnz	w24, .L2180
-.L2185:
+	strb	w27, [x26, #:lo12:.LANCHOR52]
+	cbnz	w24, .L2385
+.L2390:
 	adrp	x1, .LANCHOR0
 	ldrb	w1, [x1, #:lo12:.LANCHOR0]
-	cbz	w1, .L2180
-	adrp	x1, .LANCHOR46
-	ldrb	w1, [x1, #:lo12:.LANCHOR46]
+	cbz	w1, .L2385
+	adrp	x1, .LANCHOR50
+	ldrb	w1, [x1, #:lo12:.LANCHOR50]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	blt	.L2180
-	add	x20, x20, :lo12:.LANCHOR32
+	blt	.L2385
+	add	x20, x20, :lo12:.LANCHOR33
 	ldrb	w1, [x20, 19]
 	sub	w1, w1, #4
 	and	w1, w1, 255
 	cmp	w1, 4
 	mov	w1, 256
 	csel	w0, w0, w1, hi
-.L2173:
+.L2377:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -13592,32 +14717,32 @@ flash_complete_page_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2176:
+.L2381:
 	mov	w0, w19
-	b	.L2203
-.L2180:
+	b	.L2408
+.L2385:
 	cmn	w0, #1
-	bne	.L2173
-.L2186:
-	adrp	x0, .LANCHOR167
-	ldr	x5, [x0, #:lo12:.LANCHOR167]
-	cbnz	x5, .L2182
-.L2184:
-	adrp	x0, .LANCHOR48
+	bne	.L2377
+.L2391:
+	adrp	x0, .LANCHOR174
+	ldr	x5, [x0, #:lo12:.LANCHOR174]
+	cbnz	x5, .L2387
+.L2389:
+	adrp	x0, .LANCHOR52
 	mov	w3, -1
 	mov	w2, w21
 	mov	w1, 0
-	ldrb	w4, [x0, #:lo12:.LANCHOR48]
-	adrp	x0, .LC130
-	add	x0, x0, :lo12:.LC130
+	ldrb	w4, [x0, #:lo12:.LANCHOR52]
+	adrp	x0, .LC139
+	add	x0, x0, :lo12:.LC139
 	bl	printf
 	adrp	x0, .LANCHOR21
 	ldrb	w0, [x0, #:lo12:.LANCHOR21]
-	cbnz	w0, .L2183
+	cbnz	w0, .L2388
 	mov	w0, -1
-	b	.L2173
-.L2182:
-	add	x0, x20, :lo12:.LANCHOR32
+	b	.L2377
+.L2387:
+	add	x0, x20, :lo12:.LANCHOR33
 	mov	x3, x23
 	mov	x2, x22
 	orr	w1, w19, w24, lsl 24
@@ -13625,10 +14750,10 @@ flash_complete_page_read:
 	mov	w0, w25
 	blr	x5
 	cmn	w0, #1
-	beq	.L2184
-	b	.L2173
-.L2183:
-	add	x20, x20, :lo12:.LANCHOR32
+	beq	.L2389
+	b	.L2377
+.L2388:
+	add	x20, x20, :lo12:.LANCHOR33
 	orr	w1, w19, w24, lsl 24
 	mov	x3, x23
 	mov	x2, x22
@@ -13641,80 +14766,80 @@ flash_complete_page_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	flash_ddr_tuning_read
-.L2178:
-	cbz	w24, .L2185
-	b	.L2173
-.L2179:
-	cbnz	w24, .L2186
-	b	.L2185
+.L2384:
+	cbz	w24, .L2390
+	b	.L2391
+.L2383:
+	cbnz	w24, .L2377
+	b	.L2390
 	.size	flash_complete_page_read, .-flash_complete_page_read
 	.section	.text.queue_wait_first_req_completed,"ax",@progbits
 	.align	2
 	.type	queue_wait_first_req_completed, %function
 queue_wait_first_req_completed:
 	stp	x29, x30, [sp, -96]!
-	adrp	x0, .LANCHOR56
+	adrp	x0, .LANCHOR60
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	ldrb	w0, [x0, #:lo12:.LANCHOR56]
+	ldrb	w0, [x0, #:lo12:.LANCHOR60]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	cmp	w0, 255
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	bne	.L2205
-.L2238:
+	bne	.L2410
+.L2443:
 	mov	w21, 0
-	b	.L2204
-.L2205:
-	adrp	x19, .LANCHOR52
+	b	.L2409
+.L2410:
+	adrp	x19, .LANCHOR56
 	sxtw	x20, w0
-	add	x1, x19, :lo12:.LANCHOR52
+	add	x1, x19, :lo12:.LANCHOR56
 	add	x1, x1, x20, lsl 6
 	ldrb	w2, [x1, 58]
 	ldr	w21, [x1, 40]
 	sub	w3, w2, #1
 	cmp	w3, 10
-	bhi	.L2238
-	adrp	x1, .L2208
-	add	x1, x1, :lo12:.L2208
+	bhi	.L2443
+	adrp	x1, .L2413
+	add	x1, x1, :lo12:.L2413
 	ldrh	w1, [x1,w3,uxtw #1]
-	adr	x3, .Lrtx2208
+	adr	x3, .Lrtx2413
 	add	x1, x3, w1, sxth #2
 	br	x1
-.Lrtx2208:
+.Lrtx2413:
 	.section	.rodata.queue_wait_first_req_completed,"a",@progbits
 	.align	0
 	.align	2
-.L2208:
-	.2byte	(.L2207 - .Lrtx2208) / 4
-	.2byte	(.L2209 - .Lrtx2208) / 4
-	.2byte	(.L2210 - .Lrtx2208) / 4
-	.2byte	(.L2210 - .Lrtx2208) / 4
-	.2byte	(.L2210 - .Lrtx2208) / 4
-	.2byte	(.L2210 - .Lrtx2208) / 4
-	.2byte	(.L2211 - .Lrtx2208) / 4
-	.2byte	(.L2212 - .Lrtx2208) / 4
-	.2byte	(.L2213 - .Lrtx2208) / 4
-	.2byte	(.L2210 - .Lrtx2208) / 4
-	.2byte	(.L2213 - .Lrtx2208) / 4
+.L2413:
+	.2byte	(.L2412 - .Lrtx2413) / 4
+	.2byte	(.L2414 - .Lrtx2413) / 4
+	.2byte	(.L2415 - .Lrtx2413) / 4
+	.2byte	(.L2415 - .Lrtx2413) / 4
+	.2byte	(.L2415 - .Lrtx2413) / 4
+	.2byte	(.L2415 - .Lrtx2413) / 4
+	.2byte	(.L2416 - .Lrtx2413) / 4
+	.2byte	(.L2417 - .Lrtx2413) / 4
+	.2byte	(.L2418 - .Lrtx2413) / 4
+	.2byte	(.L2415 - .Lrtx2413) / 4
+	.2byte	(.L2418 - .Lrtx2413) / 4
 	.section	.text.queue_wait_first_req_completed
-.L2207:
+.L2412:
 	mov	w1, 64
 	mov	w0, w21
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L2238
-	add	x0, x19, :lo12:.LANCHOR52
+	tbz	x0, 6, .L2443
+	add	x0, x19, :lo12:.LANCHOR56
 	add	x0, x0, x20, lsl 6
 	ldp	x1, x2, [x0, 8]
-	cbz	x2, .L2215
+	cbz	x2, .L2420
 	ldrb	w3, [x0, 56]
-	adrp	x0, .LANCHOR126
-	ldrb	w0, [x0, #:lo12:.LANCHOR126]
+	adrp	x0, .LANCHOR131
+	ldrb	w0, [x0, #:lo12:.LANCHOR131]
 	cmp	w3, w0
 	csel	x1, x1, x2, ne
-.L2215:
-	add	x19, x19, :lo12:.LANCHOR52
+.L2420:
+	add	x19, x19, :lo12:.LANCHOR56
 	mov	w0, w21
 	add	x20, x19, x20, lsl 6
 	ldr	x2, [x20, 24]
@@ -13725,37 +14850,37 @@ queue_wait_first_req_completed:
 	ldrb	w0, [x20, 2]
 	orr	w0, w0, 8
 	strb	w0, [x20, 2]
-	b	.L2238
-.L2209:
+	b	.L2443
+.L2414:
 	mov	w1, 64
 	mov	w0, w21
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L2238
-	add	x0, x19, :lo12:.LANCHOR52
+	tbz	x0, 6, .L2443
+	add	x0, x19, :lo12:.LANCHOR56
 	lsl	x2, x20, 6
 	add	x1, x0, x2
 	ldrb	w21, [x0, x2]
 	add	x0, x0, x21, lsl 6
 	ldr	x24, [x0, 8]
 	ldp	x26, x0, [x1, 8]
-	cbz	x0, .L2216
+	cbz	x0, .L2421
 	ldrb	w2, [x1, 56]
-	adrp	x1, .LANCHOR126
-	ldrb	w1, [x1, #:lo12:.LANCHOR126]
+	adrp	x1, .LANCHOR131
+	ldrb	w1, [x1, #:lo12:.LANCHOR131]
 	cmp	w2, w1
 	csel	x26, x26, x0, ne
-.L2216:
-	add	x0, x19, :lo12:.LANCHOR52
+.L2421:
+	add	x0, x19, :lo12:.LANCHOR56
 	add	x0, x0, x21, lsl 6
 	ldr	x1, [x0, 16]
-	cbz	x1, .L2217
+	cbz	x1, .L2422
 	ldrb	w2, [x0, 56]
-	adrp	x0, .LANCHOR126
-	ldrb	w0, [x0, #:lo12:.LANCHOR126]
+	adrp	x0, .LANCHOR131
+	ldrb	w0, [x0, #:lo12:.LANCHOR131]
 	cmp	w2, w0
 	csel	x24, x24, x1, ne
-.L2217:
-	add	x22, x19, :lo12:.LANCHOR52
+.L2422:
+	add	x22, x19, :lo12:.LANCHOR56
 	mov	x1, x26
 	add	x27, x22, x20, lsl 6
 	add	x22, x22, x21, lsl 6
@@ -13769,28 +14894,28 @@ queue_wait_first_req_completed:
 	bl	flash_complete_plane_page_read
 	mov	w25, w0
 	cmn	w23, #1
-	beq	.L2218
+	beq	.L2423
 	ldr	w0, [x27, 36]
 	cmn	w0, #1
-	beq	.L2219
+	beq	.L2424
 	ldr	x1, [x27, 24]
 	ldr	w1, [x1, 4]
 	cmp	w0, w1
-	beq	.L2219
-.L2218:
-	adrp	x0, .LANCHOR31
-	add	x22, x19, :lo12:.LANCHOR52
+	beq	.L2424
+.L2423:
+	adrp	x0, .LANCHOR32
+	add	x22, x19, :lo12:.LANCHOR56
 	add	x22, x22, x20, lsl 6
 	mov	w5, 1
-	ldrb	w2, [x0, #:lo12:.LANCHOR31]
+	ldrb	w2, [x0, #:lo12:.LANCHOR32]
 	mov	w0, 24
 	sub	w0, w0, w2
 	ldr	x3, [x22, 24]
 	lsl	w5, w5, w2
-	adrp	x2, .LANCHOR126
+	adrp	x2, .LANCHOR131
 	sub	w5, w5, #1
 	ldr	w1, [x22, 40]
-	ldrb	w4, [x2, #:lo12:.LANCHOR126]
+	ldrb	w4, [x2, #:lo12:.LANCHOR131]
 	mov	x2, x26
 	lsl	w6, w5, w0
 	lsr	w0, w1, w0
@@ -13800,37 +14925,37 @@ queue_wait_first_req_completed:
 	mov	w23, w0
 	ldr	w2, [x22, 36]
 	cmn	w2, #1
-	beq	.L2220
+	beq	.L2425
 	ldr	x0, [x22, 24]
 	ldr	w4, [x0, 4]
 	cmp	w2, w4
-	beq	.L2220
+	beq	.L2425
 	adrp	x1, .LANCHOR14
 	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 6, .L2220
+	tbz	x1, 6, .L2425
 	ldr	w3, [x0]
-	adrp	x0, .LC131
+	adrp	x0, .LC140
 	ldr	w1, [x22, 40]
-	add	x0, x0, :lo12:.LC131
+	add	x0, x0, :lo12:.LC140
 	bl	printf
-.L2220:
-	add	x0, x19, :lo12:.LANCHOR52
+.L2425:
+	add	x0, x19, :lo12:.LANCHOR56
 	add	x0, x0, x20, lsl 6
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L2219
+	beq	.L2424
 	ldr	x0, [x0, 24]
 	ldr	w0, [x0, 4]
 	cmp	w1, w0
-	beq	.L2219
-	adrp	x1, .LANCHOR176
+	beq	.L2424
+	adrp	x1, .LANCHOR183
 	adrp	x0, .LC0
-	mov	w2, 360
-	add	x1, x1, :lo12:.LANCHOR176
+	mov	w2, 430
+	add	x1, x1, :lo12:.LANCHOR183
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2219:
-	add	x0, x19, :lo12:.LANCHOR52
+.L2424:
+	add	x0, x19, :lo12:.LANCHOR56
 	mov	w1, 13
 	add	x20, x0, x20, lsl 6
 	cmn	w25, #1
@@ -13839,29 +14964,29 @@ queue_wait_first_req_completed:
 	str	w23, [x20, 52]
 	orr	w1, w1, 8
 	strb	w1, [x20, 2]
-	beq	.L2221
+	beq	.L2426
 	add	x0, x0, x21, lsl 6
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L2223
+	beq	.L2428
 	ldr	x0, [x0, 24]
 	ldr	w0, [x0, 4]
 	cmp	w1, w0
-	beq	.L2223
-.L2221:
-	adrp	x0, .LANCHOR31
-	add	x20, x19, :lo12:.LANCHOR52
+	beq	.L2428
+.L2426:
+	adrp	x0, .LANCHOR32
+	add	x20, x19, :lo12:.LANCHOR56
 	add	x20, x20, x21, lsl 6
 	mov	w5, 1
-	ldrb	w2, [x0, #:lo12:.LANCHOR31]
+	ldrb	w2, [x0, #:lo12:.LANCHOR32]
 	mov	w0, 24
 	sub	w0, w0, w2
 	ldr	x3, [x20, 24]
 	lsl	w5, w5, w2
-	adrp	x2, .LANCHOR126
+	adrp	x2, .LANCHOR131
 	sub	w5, w5, #1
 	ldr	w1, [x20, 40]
-	ldrb	w4, [x2, #:lo12:.LANCHOR126]
+	ldrb	w4, [x2, #:lo12:.LANCHOR131]
 	mov	x2, x24
 	lsl	w6, w5, w0
 	lsr	w0, w1, w0
@@ -13870,37 +14995,37 @@ queue_wait_first_req_completed:
 	bl	flash_read_page_en
 	ldr	w2, [x20, 36]
 	cmn	w2, #1
-	beq	.L2225
+	beq	.L2430
 	ldr	x0, [x20, 24]
 	ldr	w4, [x0, 4]
 	cmp	w2, w4
-	beq	.L2225
+	beq	.L2430
 	adrp	x1, .LANCHOR14
 	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 6, .L2225
+	tbz	x1, 6, .L2430
 	ldr	w3, [x0]
-	adrp	x0, .LC131
+	adrp	x0, .LC140
 	ldr	w1, [x20, 40]
-	add	x0, x0, :lo12:.LC131
+	add	x0, x0, :lo12:.LC140
 	bl	printf
-.L2225:
-	add	x0, x19, :lo12:.LANCHOR52
+.L2430:
+	add	x0, x19, :lo12:.LANCHOR56
 	add	x0, x0, x21, lsl 6
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L2223
+	beq	.L2428
 	ldr	x0, [x0, 24]
 	ldr	w0, [x0, 4]
 	cmp	w1, w0
-	beq	.L2223
-	adrp	x1, .LANCHOR176
+	beq	.L2428
+	adrp	x1, .LANCHOR183
 	adrp	x0, .LC0
-	mov	w2, 375
-	add	x1, x1, :lo12:.LANCHOR176
+	mov	w2, 449
+	add	x1, x1, :lo12:.LANCHOR183
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2223:
-	add	x19, x19, :lo12:.LANCHOR52
+.L2428:
+	add	x19, x19, :lo12:.LANCHOR56
 	mov	w0, 13
 	add	x21, x19, x21, lsl 6
 	strb	w0, [x21, 58]
@@ -13908,17 +15033,17 @@ queue_wait_first_req_completed:
 	str	w23, [x21, 52]
 	orr	w0, w0, 8
 	strb	w0, [x21, 2]
-	b	.L2238
-.L2210:
+	b	.L2443
+.L2415:
 	mov	w0, w21
 	mov	w1, 64
 	bl	flash_wait_device_ready
 	mov	w21, w0
-	tbz	x21, 6, .L2238
+	tbz	x21, 6, .L2443
 	mov	w0, 5
 	tst	w21, w0
-	beq	.L2226
-	add	x19, x19, :lo12:.LANCHOR52
+	beq	.L2431
+	add	x19, x19, :lo12:.LANCHOR56
 	mov	w0, 12
 	add	x20, x19, x20, lsl 6
 	mov	w4, 12
@@ -13926,79 +15051,79 @@ queue_wait_first_req_completed:
 	ldrb	w1, [x20, 1]
 	ldr	w3, [x20, 40]
 	strb	w0, [x20, 58]
-	adrp	x0, .LC132
-	add	x0, x0, :lo12:.LC132
+	adrp	x0, .LC141
+	add	x0, x0, :lo12:.LC141
 	bl	printf
-.L2302:
+.L2507:
 	mov	w0, -1
 	str	w0, [x20, 52]
-	b	.L2204
-.L2226:
-	add	x21, x19, :lo12:.LANCHOR52
+	b	.L2409
+.L2431:
+	add	x21, x19, :lo12:.LANCHOR56
 	mov	w0, 13
 	add	x21, x21, x20, lsl 6
 	strb	w0, [x21, 58]
-	adrp	x0, .LANCHOR104
-	ldr	x0, [x0, #:lo12:.LANCHOR104]
+	adrp	x0, .LANCHOR110
+	ldr	x0, [x0, #:lo12:.LANCHOR110]
 	ldr	w1, [x0, 156]
 	mov	w0, 20041
 	str	wzr, [x21, 52]
 	movk	w0, 0x444b, lsl 16
 	cmp	w1, w0
-	bne	.L2238
+	bne	.L2443
 	ldrh	w0, [x21, 50]
-	cbnz	w0, .L2238
-	adrp	x0, .LANCHOR31
+	cbnz	w0, .L2443
+	adrp	x0, .LANCHOR32
 	mov	w5, 1
-	adrp	x22, .LANCHOR168
+	adrp	x22, .LANCHOR175
 	ldr	w1, [x21, 40]
-	ldrb	w2, [x0, #:lo12:.LANCHOR31]
+	ldrb	w2, [x0, #:lo12:.LANCHOR32]
 	mov	w0, 24
-	ldr	x3, [x22, #:lo12:.LANCHOR168]
+	ldr	x3, [x22, #:lo12:.LANCHOR175]
 	sub	w0, w0, w2
 	lsl	w5, w5, w2
-	adrp	x2, .LANCHOR126
+	adrp	x2, .LANCHOR131
 	sub	w5, w5, #1
-	ldrb	w4, [x2, #:lo12:.LANCHOR126]
-	adrp	x2, .LANCHOR169
+	ldrb	w4, [x2, #:lo12:.LANCHOR131]
+	adrp	x2, .LANCHOR176
 	lsl	w6, w5, w0
-	ldr	x2, [x2, #:lo12:.LANCHOR169]
+	ldr	x2, [x2, #:lo12:.LANCHOR176]
 	lsr	w0, w1, w0
 	bic	w1, w1, w6
 	and	w0, w0, w5
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L2227
-	ldr	x1, [x22, #:lo12:.LANCHOR168]
+	beq	.L2432
+	ldr	x1, [x22, #:lo12:.LANCHOR175]
 	ldr	x2, [x21, 24]
 	ldr	w1, [x1]
 	ldr	w2, [x2]
 	cmp	w2, w1
-	beq	.L2238
-.L2227:
-	add	x19, x19, :lo12:.LANCHOR52
-	adrp	x1, .LANCHOR48
+	beq	.L2443
+.L2432:
+	add	x19, x19, :lo12:.LANCHOR56
+	adrp	x1, .LANCHOR52
 	add	x20, x19, x20, lsl 6
 	mov	w3, w0
-	ldrb	w4, [x1, #:lo12:.LANCHOR48]
-	adrp	x0, .LC133
-	add	x0, x0, :lo12:.LC133
+	ldrb	w4, [x1, #:lo12:.LANCHOR52]
+	adrp	x0, .LC142
+	add	x0, x0, :lo12:.LC142
 	ldrb	w1, [x20, 1]
 	ldr	w2, [x20, 40]
 	bl	printf
 	mov	w0, -1
 	str	w0, [x20, 52]
-	b	.L2238
-.L2213:
+	b	.L2443
+.L2418:
 	cmp	w2, 11
 	mov	w1, 3
 	mov	w5, 10
 	csel	w5, w5, w1, eq
-	adrp	x1, .LANCHOR31
+	adrp	x1, .LANCHOR32
 	mov	w4, 24
 	mov	w2, 1
-	add	x22, x19, :lo12:.LANCHOR52
-	ldrb	w3, [x1, #:lo12:.LANCHOR31]
+	add	x22, x19, :lo12:.LANCHOR56
+	ldrb	w3, [x1, #:lo12:.LANCHOR32]
 	ubfiz	x0, x0, 6, 8
 	add	x0, x22, x0
 	mov	x24, x1
@@ -14008,41 +15133,41 @@ queue_wait_first_req_completed:
 	lsr	w3, w21, w4
 	and	w3, w3, w2
 	and	w3, w3, 65535
-.L2229:
+.L2434:
 	ldrb	w1, [x0]
 	cmp	w1, 255
-	bne	.L2236
+	bne	.L2441
 	mov	w21, -1
-	b	.L2204
-.L2236:
+	b	.L2409
+.L2441:
 	sxtw	x23, w1
 	ubfiz	x0, x1, 6, 8
 	add	x1, x22, x23, lsl 6
 	add	x0, x22, x0
 	ldrb	w6, [x1, 58]
 	cmp	w6, w5
-	bne	.L2229
+	bne	.L2434
 	ldr	w1, [x1, 40]
 	lsr	w1, w1, w4
 	and	w1, w1, w2
 	cmp	w3, w1
-	bne	.L2229
+	bne	.L2434
 	mov	w0, w21
 	mov	w1, 64
 	bl	flash_wait_device_ready
 	mov	w21, w0
-	tbnz	x21, 6, .L2231
-.L2301:
+	tbnz	x21, 6, .L2436
+.L2506:
 	mov	w21, 0
-	b	.L2232
-.L2231:
+	b	.L2437
+.L2436:
 	tst	x21, 15
-	beq	.L2233
+	beq	.L2438
 	add	x22, x22, x20, lsl 6
 	mov	w2, w0
 	mov	w4, 12
-	adrp	x0, .LC134
-	add	x0, x0, :lo12:.LC134
+	adrp	x0, .LC143
+	add	x0, x0, :lo12:.LC143
 	ldrb	w1, [x22, 1]
 	ldr	w3, [x22, 40]
 	bl	printf
@@ -14050,15 +15175,15 @@ queue_wait_first_req_completed:
 	strb	w0, [x22, 58]
 	mov	w0, -1
 	str	w0, [x22, 52]
-.L2232:
-	add	x1, x19, :lo12:.LANCHOR52
+.L2437:
+	add	x1, x19, :lo12:.LANCHOR56
 	add	x20, x1, x20, lsl 6
 	add	x1, x1, x23, lsl 6
 	ldrb	w0, [x20, 58]
 	strb	w0, [x1, 58]
 	ldr	w0, [x20, 52]
 	str	w0, [x1, 52]
-.L2204:
+.L2409:
 	mov	w0, w21
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -14067,89 +15192,89 @@ queue_wait_first_req_completed:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2233:
+.L2438:
 	add	x21, x22, x20, lsl 6
 	mov	w0, 13
 	strb	w0, [x21, 58]
-	adrp	x0, .LANCHOR104
-	ldr	x0, [x0, #:lo12:.LANCHOR104]
+	adrp	x0, .LANCHOR110
+	ldr	x0, [x0, #:lo12:.LANCHOR110]
 	ldr	w1, [x0, 156]
 	mov	w0, 20041
 	str	wzr, [x21, 52]
 	movk	w0, 0x444b, lsl 16
 	cmp	w1, w0
-	bne	.L2301
+	bne	.L2506
 	ldrh	w0, [x21, 50]
-	cbnz	w0, .L2301
-	ldrb	w2, [x24, #:lo12:.LANCHOR31]
+	cbnz	w0, .L2506
+	ldrb	w2, [x24, #:lo12:.LANCHOR32]
 	mov	w5, 1
 	mov	w0, 24
-	adrp	x22, .LANCHOR168
+	adrp	x22, .LANCHOR175
 	sub	w0, w0, w2
 	ldr	w1, [x21, 40]
 	lsl	w5, w5, w2
-	adrp	x2, .LANCHOR126
+	adrp	x2, .LANCHOR131
 	sub	w5, w5, #1
-	ldr	x3, [x22, #:lo12:.LANCHOR168]
-	ldrb	w4, [x2, #:lo12:.LANCHOR126]
-	adrp	x2, .LANCHOR169
+	ldr	x3, [x22, #:lo12:.LANCHOR175]
+	ldrb	w4, [x2, #:lo12:.LANCHOR131]
+	adrp	x2, .LANCHOR176
 	lsl	w6, w5, w0
-	ldr	x2, [x2, #:lo12:.LANCHOR169]
+	ldr	x2, [x2, #:lo12:.LANCHOR176]
 	lsr	w0, w1, w0
 	bic	w1, w1, w6
 	and	w0, w0, w5
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L2235
-	ldr	x1, [x22, #:lo12:.LANCHOR168]
+	beq	.L2440
+	ldr	x1, [x22, #:lo12:.LANCHOR175]
 	ldr	x2, [x21, 24]
 	ldr	w1, [x1]
 	ldr	w2, [x2]
 	cmp	w2, w1
-	beq	.L2301
-.L2235:
-	add	x21, x19, :lo12:.LANCHOR52
-	adrp	x1, .LANCHOR48
+	beq	.L2506
+.L2440:
+	add	x21, x19, :lo12:.LANCHOR56
+	adrp	x1, .LANCHOR52
 	add	x21, x21, x20, lsl 6
 	mov	w3, w0
-	ldrb	w4, [x1, #:lo12:.LANCHOR48]
-	adrp	x0, .LC135
-	add	x0, x0, :lo12:.LC135
+	ldrb	w4, [x1, #:lo12:.LANCHOR52]
+	adrp	x0, .LC144
+	add	x0, x0, :lo12:.LC144
 	ldrb	w1, [x21, 1]
 	ldr	w2, [x21, 40]
 	bl	printf
 	mov	w0, -1
 	str	w0, [x21, 52]
-	b	.L2301
-.L2211:
+	b	.L2506
+.L2416:
 	mov	w0, w21
 	mov	w1, 32
 	bl	flash_wait_device_ready
 	mov	w21, w0
-	tbz	x21, 5, .L2238
-	add	x19, x19, :lo12:.LANCHOR52
+	tbz	x21, 5, .L2443
+	add	x19, x19, :lo12:.LANCHOR56
 	tst	x21, 15
 	add	x20, x19, x20, lsl 6
-	beq	.L2237
+	beq	.L2442
 	mov	w0, 12
 	strb	w0, [x20, 58]
-	b	.L2302
-.L2237:
+	b	.L2507
+.L2442:
 	mov	w0, 13
 	str	wzr, [x20, 52]
 	strb	w0, [x20, 58]
-	b	.L2238
-.L2212:
+	b	.L2443
+.L2417:
 	mov	w1, 64
 	mov	w0, w21
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L2238
-	add	x19, x19, :lo12:.LANCHOR52
+	tbz	x0, 6, .L2443
+	add	x19, x19, :lo12:.LANCHOR56
 	add	x19, x19, x20, lsl 6
 	str	w0, [x19, 52]
 	mov	w0, 7
 	strb	w0, [x19, 58]
-	b	.L2238
+	b	.L2443
 	.size	queue_wait_first_req_completed, .-queue_wait_first_req_completed
 	.section	.text.sblk_prog_page,"ax",@progbits
 	.align	2
@@ -14166,24 +15291,24 @@ sblk_prog_page:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbz	w0, .L2304
+	cbz	w0, .L2509
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2304
+	tbz	x0, 8, .L2509
 	ldr	w1, [x19, 40]
-	adrp	x0, .LC136
+	adrp	x0, .LC145
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC136
+	add	x0, x0, :lo12:.LC145
 	bl	printf
-.L2304:
-	adrp	x23, .LANCHOR41
-	adrp	x25, .LANCHOR31
-	add	x23, x23, :lo12:.LANCHOR41
-	add	x26, x25, :lo12:.LANCHOR31
+.L2509:
+	adrp	x23, .LANCHOR45
+	adrp	x25, .LANCHOR32
+	add	x23, x23, :lo12:.LANCHOR45
+	add	x26, x25, :lo12:.LANCHOR32
 	mov	w21, 0
-.L2305:
-	cbnz	w20, .L2316
-.L2329:
+.L2510:
+	cbnz	w20, .L2521
+.L2537:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -14192,35 +15317,38 @@ sblk_prog_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2316:
+.L2521:
 	ldrb	w24, [x19]
 	ldr	w22, [x19, 40]
-.L2306:
+.L2511:
 	mov	w1, 1
 	mov	w0, w22
 	bl	queue_lun_state
-	cbnz	w0, .L2307
+	cbnz	w0, .L2512
 	cmp	w20, 1
-	beq	.L2308
+	beq	.L2513
 	ldrb	w0, [x23]
-	cbnz	w0, .L2309
-.L2308:
+	cbz	w0, .L2513
+	adrp	x0, .LANCHOR37
+	ldrb	w0, [x0, #:lo12:.LANCHOR37]
+	cbz	w0, .L2514
+.L2513:
 	mov	x0, x19
 	bl	queue_prog_cmd
-.L2310:
+.L2515:
 	subs	w20, w20, #1
-	beq	.L2329
+	beq	.L2537
 	ubfiz	x24, x24, 6, 8
-	adrp	x19, .LANCHOR52
-	add	x19, x19, :lo12:.LANCHOR52
+	adrp	x19, .LANCHOR56
+	add	x19, x19, :lo12:.LANCHOR56
 	add	x19, x19, x24
-	b	.L2305
-.L2307:
+	b	.L2510
+.L2512:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2306
-.L2309:
-	ldrb	w1, [x25, #:lo12:.LANCHOR31]
+	b	.L2511
+.L2514:
+	ldrb	w1, [x25, #:lo12:.LANCHOR32]
 	mov	w27, 24
 	mov	w0, 1
 	sub	w27, w27, w1
@@ -14231,17 +15359,17 @@ sblk_prog_page:
 	ldrb	w0, [x19]
 	and	w27, w27, 65535
 	cmp	w0, 255
-	bne	.L2311
-	adrp	x1, .LANCHOR177
+	bne	.L2516
+	adrp	x1, .LANCHOR184
 	adrp	x0, .LC0
-	mov	w2, 582
-	add	x1, x1, :lo12:.LANCHOR177
+	mov	w2, 696
+	add	x1, x1, :lo12:.LANCHOR184
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2311:
+.L2516:
 	ldrb	w0, [x19]
-	adrp	x1, .LANCHOR52
-	add	x1, x1, :lo12:.LANCHOR52
+	adrp	x1, .LANCHOR56
+	add	x1, x1, :lo12:.LANCHOR56
 	mov	w3, 24
 	mov	w28, 1
 	add	x0, x1, x0, lsl 6
@@ -14253,11 +15381,11 @@ sblk_prog_page:
 	lsr	w1, w4, w3
 	and	w0, w0, w1
 	cmp	w27, w0, uxth
-	bne	.L2312
-	adrp	x0, .LANCHOR68
-	ldrh	w2, [x0, #:lo12:.LANCHOR68]
-	adrp	x0, .LANCHOR69
-	ldrb	w1, [x0, #:lo12:.LANCHOR69]
+	bne	.L2517
+	adrp	x0, .LANCHOR75
+	ldrh	w2, [x0, #:lo12:.LANCHOR75]
+	adrp	x0, .LANCHOR76
+	ldrb	w1, [x0, #:lo12:.LANCHOR76]
 	sub	w0, w3, w2
 	lsr	w5, w22, w2
 	sub	w3, w1, #1
@@ -14275,9 +15403,9 @@ sblk_prog_page:
 	cmp	w5, w0
 	and	w1, w1, w4
 	ccmp	w22, w1, 0, ne
-	bne	.L2312
+	bne	.L2517
 	cmp	w21, w3
-	beq	.L2312
+	beq	.L2517
 	ldr	w1, [x19, 40]
 	mov	w0, 17
 	ldr	x2, [x19, 8]
@@ -14290,15 +15418,15 @@ sblk_prog_page:
 	mov	w0, -1
 	strb	w0, [x19]
 	mov	x1, x19
-	adrp	x0, .LANCHOR56
-	add	x0, x0, :lo12:.LANCHOR56
+	adrp	x0, .LANCHOR60
+	add	x0, x0, :lo12:.LANCHOR60
 	bl	buf_add_tail
-	b	.L2310
-.L2312:
+	b	.L2515
+.L2517:
 	mov	x0, x19
 	mov	w21, 0
 	bl	queue_prog_cmd
-	b	.L2310
+	b	.L2515
 	.size	sblk_prog_page, .-sblk_prog_page
 	.section	.text.sblk_wait_write_queue_completed,"ax",@progbits
 	.align	2
@@ -14308,19 +15436,19 @@ sblk_wait_write_queue_completed:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR56
-	add	x19, x19, :lo12:.LANCHOR56
-.L2332:
+	adrp	x19, .LANCHOR60
+	add	x19, x19, :lo12:.LANCHOR60
+.L2540:
 	ldrb	w0, [x19]
 	cmp	w0, 255
-	bne	.L2333
+	bne	.L2541
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2333:
+.L2541:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2332
+	b	.L2540
 	.size	sblk_wait_write_queue_completed, .-sblk_wait_write_queue_completed
 	.section	.text.ftl_flush,"ax",@progbits
 	.align	2
@@ -14328,22 +15456,22 @@ sblk_wait_write_queue_completed:
 	.type	ftl_flush, %function
 ftl_flush:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR124
+	adrp	x0, .LANCHOR129
 	add	x29, sp, 0
-	ldrb	w1, [x0, #:lo12:.LANCHOR124]
+	ldrb	w1, [x0, #:lo12:.LANCHOR129]
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	adrp	x20, .LANCHOR178
-	cbz	w1, .L2336
-	ldrb	w2, [x20, #:lo12:.LANCHOR178]
-	adrp	x0, .LANCHOR52
-	add	x0, x0, :lo12:.LANCHOR52
+	adrp	x20, .LANCHOR185
+	cbz	w1, .L2544
+	ldrb	w2, [x20, #:lo12:.LANCHOR185]
+	adrp	x0, .LANCHOR56
+	add	x0, x0, :lo12:.LANCHOR56
 	add	x0, x0, x2, lsl 6
 	bl	sblk_prog_page
-.L2336:
+.L2544:
 	mov	w0, -1
-	strb	wzr, [x19, #:lo12:.LANCHOR124]
-	strb	w0, [x20, #:lo12:.LANCHOR178]
+	strb	wzr, [x19, #:lo12:.LANCHOR129]
+	strb	w0, [x20, #:lo12:.LANCHOR185]
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	ldp	x19, x20, [sp, 16]
@@ -14388,11 +15516,11 @@ ftl_read_ppa_page:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w20, w0
-	adrp	x0, .LANCHOR31
+	adrp	x0, .LANCHOR32
 	mov	w19, 24
 	stp	x21, x22, [sp, 32]
 	mov	x21, x1
-	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	ldrb	w0, [x0, #:lo12:.LANCHOR32]
 	mov	x22, x2
 	str	x23, [sp, 48]
 	mov	w23, w3
@@ -14426,21 +15554,21 @@ sblk_read_page:
 	stp	x27, x28, [sp, 80]
 	mov	w21, w22
 	stp	x19, x20, [sp, 16]
-	adrp	x27, .LANCHOR31
+	adrp	x27, .LANCHOR32
 	stp	x23, x24, [sp, 48]
 	mov	x19, x0
 	stp	x25, x26, [sp, 64]
 	mov	x23, x0
-	adrp	x25, .LANCHOR179
-	add	x28, x27, :lo12:.LANCHOR31
-	add	x25, x25, :lo12:.LANCHOR179
-.L2346:
-	cbnz	w21, .L2356
-.L2369:
-	adrp	x19, .LANCHOR52
-	add	x19, x19, :lo12:.LANCHOR52
-.L2357:
-	cbnz	w22, .L2359
+	adrp	x25, .LANCHOR186
+	add	x28, x27, :lo12:.LANCHOR32
+	add	x25, x25, :lo12:.LANCHOR186
+.L2554:
+	cbnz	w21, .L2564
+.L2577:
+	adrp	x19, .LANCHOR56
+	add	x19, x19, :lo12:.LANCHOR56
+.L2565:
+	cbnz	w22, .L2567
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -14449,28 +15577,28 @@ sblk_read_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2356:
+.L2564:
 	ldrb	w24, [x19]
 	ldr	w26, [x19, 40]
-.L2347:
+.L2555:
 	mov	w1, 0
 	mov	w0, w26
 	bl	queue_lun_state
-	cbnz	w0, .L2348
+	cbnz	w0, .L2556
 	cmp	w21, 1
-	beq	.L2353
+	beq	.L2561
 	ldrb	w0, [x25]
-	cbnz	w0, .L2350
-.L2353:
+	cbnz	w0, .L2558
+.L2561:
 	mov	x0, x19
 	bl	queue_read_cmd
-	b	.L2351
-.L2348:
+	b	.L2559
+.L2556:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2347
-.L2350:
-	ldrb	w1, [x27, #:lo12:.LANCHOR31]
+	b	.L2555
+.L2558:
+	ldrb	w1, [x27, #:lo12:.LANCHOR32]
 	mov	w20, 24
 	mov	w0, 1
 	sub	w20, w20, w1
@@ -14481,17 +15609,17 @@ sblk_read_page:
 	ldrb	w0, [x19]
 	and	w20, w20, 65535
 	cmp	w0, 255
-	bne	.L2352
-	adrp	x1, .LANCHOR180
+	bne	.L2560
+	adrp	x1, .LANCHOR187
 	adrp	x0, .LC0
-	mov	w2, 660
-	add	x1, x1, :lo12:.LANCHOR180
+	mov	w2, 781
+	add	x1, x1, :lo12:.LANCHOR187
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2352:
+.L2560:
 	ldrb	w4, [x19]
-	adrp	x2, .LANCHOR52
-	add	x2, x2, :lo12:.LANCHOR52
+	adrp	x2, .LANCHOR56
+	add	x2, x2, :lo12:.LANCHOR56
 	ldrb	w7, [x28]
 	mov	w0, 24
 	mov	w3, 1
@@ -14504,18 +15632,18 @@ sblk_read_page:
 	lsr	w0, w1, w0
 	and	w0, w0, w3
 	cmp	w20, w0, uxth
-	bne	.L2353
-	adrp	x0, .LANCHOR105
-	ldrh	w0, [x0, #:lo12:.LANCHOR105]
+	bne	.L2561
+	adrp	x0, .LANCHOR111
+	ldrh	w0, [x0, #:lo12:.LANCHOR111]
 	add	w26, w0, w26
 	cmp	w1, w26
-	bne	.L2353
+	bne	.L2561
 	ldr	w0, [x19, 40]
 	mov	w26, -1
 	ldrb	w24, [x2, x5]
-	adrp	x20, .LANCHOR56
+	adrp	x20, .LANCHOR60
 	stp	x6, x5, [x29, 96]
-	add	x20, x20, :lo12:.LANCHOR56
+	add	x20, x20, :lo12:.LANCHOR60
 	str	x2, [x29, 112]
 	sub	w21, w21, #1
 	str	w4, [x29, 120]
@@ -14538,29 +15666,220 @@ sblk_read_page:
 	ubfiz	x1, x4, 6, 8
 	add	x1, x2, x1
 	bl	buf_add_tail
-.L2351:
+.L2559:
 	subs	w21, w21, #1
-	beq	.L2369
+	beq	.L2577
 	ubfiz	x24, x24, 6, 8
-	adrp	x19, .LANCHOR52
-	add	x19, x19, :lo12:.LANCHOR52
+	adrp	x19, .LANCHOR56
+	add	x19, x19, :lo12:.LANCHOR56
 	add	x19, x19, x24
-	b	.L2346
-.L2359:
+	b	.L2554
+.L2567:
 	ldrb	w0, [x23, 58]
 	cmp	w0, 13
-	bne	.L2358
+	bne	.L2566
 	ldrb	w0, [x23]
 	sub	w22, w22, #1
 	cmp	w0, 255
-	beq	.L2358
+	beq	.L2566
 	ubfiz	x23, x0, 6, 8
 	add	x23, x19, x23
-.L2358:
+.L2566:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2357
+	b	.L2565
 	.size	sblk_read_page, .-sblk_read_page
+	.section	.text.gc_check_data_one_wl,"ax",@progbits
+	.align	2
+	.global	gc_check_data_one_wl
+	.type	gc_check_data_one_wl, %function
+gc_check_data_one_wl:
+	sub	sp, sp, #112
+	stp	x29, x30, [sp, 16]
+	add	x29, sp, 16
+	stp	x19, x20, [sp, 32]
+	adrp	x19, .LANCHOR71
+	stp	x21, x22, [sp, 48]
+	add	x22, x19, :lo12:.LANCHOR71
+	adrp	x20, .LANCHOR10
+	stp	x23, x24, [sp, 64]
+	stp	x25, x26, [sp, 80]
+	ldr	x0, [x22, 8]
+	stp	x27, x28, [sp, 96]
+	ldr	x21, [x20, #:lo12:.LANCHOR10]
+	cbnz	x0, .L2580
+	mov	w0, 1
+	bl	buf_alloc
+	str	x0, [x22, 8]
+.L2580:
+	add	x0, x19, :lo12:.LANCHOR71
+	ldr	x22, [x0, 8]
+	cbnz	x22, .L2581
+	adrp	x1, .LANCHOR188
+	adrp	x0, .LC0
+	mov	w2, 729
+	add	x1, x1, :lo12:.LANCHOR188
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2581:
+	adrp	x27, .LANCHOR111
+	adrp	x28, .LANCHOR79
+	add	x26, x21, 96
+	add	x27, x27, :lo12:.LANCHOR111
+	add	x28, x28, :lo12:.LANCHOR79
+	mov	w25, 0
+.L2582:
+	ldrb	w0, [x21, 89]
+	cmp	w25, w0
+	bge	.L2593
+	mov	w24, 1
+	add	x23, x19, :lo12:.LANCHOR71
+	b	.L2594
+.L2592:
+	ldrh	w0, [x26]
+	ldrh	w2, [x27]
+	ldrb	w1, [x28]
+	cmp	w1, 2
+	mul	w2, w0, w2
+	beq	.L2583
+	adrp	x0, .LANCHOR36
+	ldrb	w0, [x0, #:lo12:.LANCHOR36]
+	cbz	w0, .L2584
+.L2583:
+	ldrh	w0, [x23, 16]
+	sub	w3, w0, #1
+	add	w0, w24, w2
+	add	w0, w3, w0
+	orr	w1, w0, w1, lsl 24
+	str	w1, [x22, 40]
+.L2585:
+	mov	w1, 1
+	mov	x0, x22
+	bl	sblk_read_page
+	ldr	w2, [x22, 52]
+	adrp	x1, .LANCHOR162
+	cmn	w2, #1
+	beq	.L2588
+	ldrh	w0, [x23, 22]
+	ldr	x4, [x1, #:lo12:.LANCHOR162]
+	ldr	x3, [x22, 24]
+	lsl	x0, x0, 2
+	ldr	w5, [x4, x0]
+	ldr	w4, [x3, 4]
+	cmp	w5, w4
+	bne	.L2588
+	adrp	x4, .LANCHOR163
+	ldr	x4, [x4, #:lo12:.LANCHOR163]
+	ldr	w4, [x4, x0]
+	ldr	w0, [x3, 8]
+	cmp	w4, w0
+	beq	.L2589
+.L2588:
+	ldrh	w0, [x23, 22]
+	ldr	x1, [x1, #:lo12:.LANCHOR162]
+	lsl	x0, x0, 2
+	ldr	w3, [x1, x0]
+	cmn	w3, #1
+	beq	.L2589
+	adrp	x1, .LANCHOR14
+	ldr	w1, [x1, #:lo12:.LANCHOR14]
+	tbz	x1, 10, .L2590
+	ldr	x1, [x22, 24]
+	adrp	x4, .LANCHOR163
+	ldr	x4, [x4, #:lo12:.LANCHOR163]
+	ldr	w5, [x1, 12]
+	str	w5, [sp]
+	ldr	w4, [x4, x0]
+	adrp	x0, .LC146
+	ldp	w5, w6, [x1]
+	add	x0, x0, :lo12:.LC146
+	ldr	w7, [x1, 8]
+	ldr	w1, [x22, 40]
+	bl	printf
+.L2590:
+	adrp	x0, .LANCHOR124
+	ldrh	w1, [x21, 80]
+	ldrb	w2, [x0, #:lo12:.LANCHOR124]
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	strh	wzr, [x0, x1, lsl 1]
+	ldr	x1, [x20, #:lo12:.LANCHOR10]
+	ldr	w0, [x1, 556]
+	add	w0, w0, 1
+	str	w0, [x1, 556]
+	adrp	x0, .LANCHOR110
+	ldr	x0, [x0, #:lo12:.LANCHOR110]
+	ldr	w1, [x0, 156]
+	mov	w0, 20041
+	movk	w0, 0x444b, lsl 16
+	cmp	w1, w0
+	bne	.L2597
+	cbnz	w2, .L2597
+	adrp	x0, .LANCHOR81
+	ldrb	w0, [x0, #:lo12:.LANCHOR81]
+	cbnz	w0, .L2597
+	ldr	w0, [x22, 40]
+	bl	ftl_mask_bad_block
+.L2597:
+	mov	w0, -1
+.L2579:
+	ldp	x19, x20, [sp, 32]
+	ldp	x21, x22, [sp, 48]
+	ldp	x23, x24, [sp, 64]
+	ldp	x25, x26, [sp, 80]
+	ldp	x27, x28, [sp, 96]
+	ldp	x29, x30, [sp, 16]
+	add	sp, sp, 112
+	ret
+.L2584:
+	cmp	w1, 3
+	ldrh	w0, [x23, 16]
+	bne	.L2586
+	adrp	x1, .LANCHOR37
+	ldrb	w1, [x1, #:lo12:.LANCHOR37]
+	cbz	w1, .L2587
+	add	w0, w0, w0, lsl 1
+	sub	w1, w0, #1
+	add	w0, w24, w2
+	add	w0, w1, w0
+	orr	w0, w0, 50331648
+.L2612:
+	str	w0, [x22, 40]
+	b	.L2585
+.L2587:
+	add	w0, w0, w2
+	orr	w0, w0, w24, lsl 24
+	b	.L2612
+.L2586:
+	add	w0, w0, w2
+	b	.L2612
+.L2589:
+	ldrh	w0, [x23, 22]
+	add	w24, w24, 1
+	add	w0, w0, 1
+	strh	w0, [x23, 22]
+.L2594:
+	ldrh	w0, [x23, 20]
+	cmp	w24, w0
+	ble	.L2592
+	add	w25, w25, 1
+	add	x26, x26, 2
+	b	.L2582
+.L2593:
+	add	x19, x19, :lo12:.LANCHOR71
+	ldrh	w0, [x19, 16]
+	add	w1, w0, 1
+	strh	w1, [x19, 16]
+	adrp	x1, .LANCHOR81
+	ldrb	w1, [x1, #:lo12:.LANCHOR81]
+	cbz	w1, .L2598
+	add	w0, w0, 2
+	strh	w0, [x19, 16]
+.L2598:
+.L2591:
+	mov	w0, 0
+	b	.L2579
+	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
 	.section	.text.sblk_tlc_prog_one_page,"ax",@progbits
 	.align	2
 	.global	sblk_tlc_prog_one_page
@@ -14572,21 +15891,22 @@ sblk_tlc_prog_one_page:
 	mov	x19, x0
 	ldr	x0, [x0]
 	ldr	w20, [x0, 40]
-.L2372:
+.L2614:
 	mov	w1, 1
 	mov	w0, w20
 	bl	queue_lun_state
-	cbnz	w0, .L2373
+	cbnz	w0, .L2615
 	mov	x0, x19
+	mov	w1, 1
 	bl	queue_tlc_prog_cmd
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2373:
+.L2615:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2372
+	b	.L2614
 	.size	sblk_tlc_prog_one_page, .-sblk_tlc_prog_one_page
 	.section	.text.sblk_xlc_prog_pages,"ax",@progbits
 	.align	2
@@ -14598,109 +15918,116 @@ sblk_xlc_prog_pages:
 	stp	x19, x20, [sp, 16]
 	mov	x20, x0
 	ldr	x0, [x0]
+	stp	x21, x22, [sp, 32]
+	mov	x22, x1
 	stp	x23, x24, [sp, 48]
-	mov	x23, x1
 	mov	w24, w2
-	stp	x21, x22, [sp, 32]
 	ldr	w19, [x0, 40]
 	str	x25, [sp, 64]
-.L2376:
+.L2618:
 	mov	w1, 1
 	mov	w0, w19
 	bl	queue_lun_state
-	cbnz	w0, .L2377
+	cbnz	w0, .L2619
 	cmp	w24, 2
-	bne	.L2378
+	bne	.L2620
+	adrp	x0, .LANCHOR45
+	ldr	x3, [x22]
+	ldrb	w0, [x0, #:lo12:.LANCHOR45]
+	cbz	w0, .L2621
+	adrp	x0, .LANCHOR32
 	ldr	x7, [x20]
-	adrp	x0, .LANCHOR31
-	ldr	x3, [x23]
+	mov	w25, 1
 	mov	w2, 24
-	ldrb	w0, [x0, #:lo12:.LANCHOR31]
-	mov	w22, 1
-	ldr	w1, [x7, 40]
+	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	ldr	w3, [x3, 40]
 	sub	w2, w2, w0
-	lsl	w19, w22, w0
+	ldr	w1, [x7, 40]
+	lsl	w19, w25, w0
+	adrp	x0, .LANCHOR37
+	lsl	w21, w25, w2
 	sub	w19, w19, #1
-	lsl	w21, w22, w2
+	ldrb	w0, [x0, #:lo12:.LANCHOR37]
 	sub	w21, w21, #1
-	and	w25, w1, w21
-	ldr	w3, [x3, 40]
+	and	w23, w1, w21
 	lsr	w1, w1, w2
 	and	w19, w19, w1
-	and	w19, w19, 255
-	ldr	x5, [x7, 8]
-	ldr	x6, [x7, 24]
 	and	w21, w21, w3
-	ldrb	w0, [x7, 60]
-	mov	w4, w25
-	mov	w1, w22
+	and	w19, w19, 255
+	cbz	w0, .L2622
+	mov	w0, w19
+	bl	zftl_flash_exit_slc_mode
+	ldr	x0, [x20]
+	mov	w4, w23
 	mov	w3, w19
+	mov	w1, w25
 	mov	w2, 17
-	bl	flash_start_tlc_page_prog
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	mov	w0, 0
+	bl	flash_start_one_pass_page_prog
 	bl	nandc_wait_flash_ready
-	ldr	x7, [x20]
+	ldr	x0, [x22]
 	mov	w4, w21
-	ldr	x0, [x23]
 	mov	w3, w19
-	mov	w1, w22
+	mov	w1, w25
 	mov	w2, 26
 	ldr	x5, [x0, 8]
 	ldr	x6, [x0, 24]
-	ldrb	w0, [x7, 60]
-	bl	flash_start_tlc_page_prog
+	mov	w0, 0
+	bl	flash_start_one_pass_page_prog
 	bl	nandc_wait_flash_ready
-	ldp	x7, x0, [x20]
-	mov	w4, w25
+	ldr	x0, [x20, 8]
+	add	w4, w23, w25
 	mov	w3, w19
 	mov	w1, w24
 	mov	w2, 17
 	ldr	x5, [x0, 8]
 	ldr	x6, [x0, 24]
-	ldrb	w0, [x7, 60]
-	bl	flash_start_tlc_page_prog
+	mov	w0, 0
+	bl	flash_start_one_pass_page_prog
 	bl	nandc_wait_flash_ready
-	ldr	x7, [x20]
-	mov	w4, w21
-	ldr	x0, [x23, 8]
+	ldr	x0, [x22, 8]
+	add	w4, w21, w25
 	mov	w3, w19
 	mov	w1, w24
 	mov	w2, 26
 	ldr	x5, [x0, 8]
 	ldr	x6, [x0, 24]
-	ldrb	w0, [x7, 60]
-	bl	flash_start_tlc_page_prog
+	mov	w0, 0
+	bl	flash_start_one_pass_page_prog
 	bl	nandc_wait_flash_ready
-	ldr	x7, [x20]
-	mov	w4, w25
 	ldr	x0, [x20, 16]
+	add	w4, w23, 2
 	mov	w3, w19
 	mov	w2, 17
 	mov	w1, 3
 	ldr	x5, [x0, 8]
 	ldr	x6, [x0, 24]
-	ldrb	w0, [x7, 60]
-	bl	flash_start_tlc_page_prog
+	mov	w0, 0
+	bl	flash_start_one_pass_page_prog
 	bl	nandc_wait_flash_ready
-	ldr	x0, [x23, 16]
-	mov	w1, 3
-	ldr	x7, [x20]
-	mov	w4, w21
+	ldr	x0, [x22, 16]
+	add	w4, w21, 2
 	mov	w3, w19
 	mov	w2, 16
+	mov	w1, 3
 	ldr	x5, [x0, 8]
 	ldr	x6, [x0, 24]
-	ldrb	w0, [x7, 60]
-	bl	flash_start_tlc_page_prog
+	mov	w0, 0
+	bl	flash_start_one_pass_page_prog
+.L2623:
 	ldr	x1, [x20]
 	mov	w0, 5
-	strb	w22, [x1, 59]
 	strb	w0, [x1, 58]
+	mov	w0, 1
+	strb	w0, [x1, 59]
 	mov	w0, -1
 	strb	w0, [x1]
-	adrp	x0, .LANCHOR56
-	add	x0, x0, :lo12:.LANCHOR56
+	adrp	x0, .LANCHOR60
+	add	x0, x0, :lo12:.LANCHOR60
 	bl	buf_add_tail
-.L2379:
+.L2624:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -14708,16 +16035,106 @@ sblk_xlc_prog_pages:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2377:
+.L2619:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2376
-.L2378:
-	mov	x0, x20
-	bl	queue_tlc_prog_cmd
-	b	.L2379
-	.size	sblk_xlc_prog_pages, .-sblk_xlc_prog_pages
-	.section	.text.sblk_3d_mlc_prog_pages,"ax",@progbits
+	b	.L2618
+.L2622:
+	ldr	x5, [x7, 8]
+	mov	w4, w23
+	ldr	x6, [x7, 24]
+	mov	w3, w19
+	ldrb	w0, [x7, 60]
+	mov	w1, w25
+	mov	w2, 17
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x7, [x20]
+	mov	w4, w21
+	ldr	x0, [x22]
+	mov	w3, w19
+	mov	w1, w25
+	mov	w2, 26
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldp	x7, x0, [x20]
+	mov	w4, w23
+	mov	w3, w19
+	mov	w1, w24
+	mov	w2, 17
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x7, [x20]
+	mov	w4, w21
+	ldr	x0, [x22, 8]
+	mov	w3, w19
+	mov	w1, w24
+	mov	w2, 26
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x7, [x20]
+	mov	w4, w23
+	ldr	x0, [x20, 16]
+	mov	w3, w19
+	mov	w2, 17
+	mov	w1, 3
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x0, [x22, 16]
+	mov	w4, w21
+	ldr	x7, [x20]
+	mov	w3, w19
+	mov	w2, 16
+	mov	w1, 3
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
+	b	.L2623
+.L2621:
+	ldr	w19, [x3, 40]
+.L2625:
+	mov	w1, 1
+	mov	w0, w19
+	bl	queue_lun_state
+	cbnz	w0, .L2626
+	mov	w1, 1
+	mov	x0, x20
+	bl	queue_tlc_prog_cmd
+	mov	w1, 0
+	mov	x0, x22
+	bl	queue_tlc_prog_cmd
+.L2627:
+	mov	w1, 1
+	mov	w0, w19
+	bl	queue_lun_state
+	cbz	w0, .L2624
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L2627
+.L2626:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L2625
+.L2620:
+	mov	w1, 1
+	mov	x0, x20
+	bl	queue_tlc_prog_cmd
+	b	.L2624
+	.size	sblk_xlc_prog_pages, .-sblk_xlc_prog_pages
+	.section	.text.sblk_3d_mlc_prog_pages,"ax",@progbits
 	.align	2
 	.global	sblk_3d_mlc_prog_pages
 	.type	sblk_3d_mlc_prog_pages, %function
@@ -14729,17 +16146,17 @@ sblk_3d_mlc_prog_pages:
 	stp	x21, x22, [sp, 32]
 	add	x21, x0, x1
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR31
-	adrp	x24, .LANCHOR56
+	adrp	x23, .LANCHOR32
+	adrp	x24, .LANCHOR60
 	str	x25, [sp, 64]
-	add	x23, x23, :lo12:.LANCHOR31
-	add	x24, x24, :lo12:.LANCHOR56
+	add	x23, x23, :lo12:.LANCHOR32
+	add	x24, x24, :lo12:.LANCHOR60
 	add	x25, x0, 8
 	stp	x19, x20, [sp, 16]
 	mov	w22, 1
-.L2382:
+.L2631:
 	cmp	x21, x25
-	bne	.L2385
+	bne	.L2634
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -14747,14 +16164,14 @@ sblk_3d_mlc_prog_pages:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2385:
+.L2634:
 	ldr	x0, [x25, -8]
 	ldr	w19, [x0, 40]
-.L2383:
+.L2632:
 	mov	w1, 1
 	mov	w0, w19
 	bl	queue_lun_state
-	cbnz	w0, .L2384
+	cbnz	w0, .L2633
 	ldr	x0, [x25, -8]
 	mov	w2, 24
 	ldrb	w1, [x23]
@@ -14786,7 +16203,7 @@ sblk_3d_mlc_prog_pages:
 	ldr	x4, [x0, 24]
 	mov	w0, 16
 	bl	flash_start_3d_mlc_page_prog
-	bl	nandc_de_cs.constprop.31
+	bl	nandc_de_cs.constprop.33
 	ldr	x1, [x25, -24]
 	mov	w0, 4
 	strb	w22, [x1, 59]
@@ -14795,11 +16212,11 @@ sblk_3d_mlc_prog_pages:
 	strb	w0, [x1]
 	mov	x0, x24
 	bl	buf_add_tail
-	b	.L2382
-.L2384:
+	b	.L2631
+.L2633:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2383
+	b	.L2632
 	.size	sblk_3d_mlc_prog_pages, .-sblk_3d_mlc_prog_pages
 	.section	.text.flash_prog_page_en,"ax",@progbits
 	.align	2
@@ -14825,51 +16242,51 @@ flash_prog_page_en:
 	ubfx	x24, x20, 24, 2
 	cmp	w1, w21
 	mov	x19, x0
-	bhi	.L2388
-	adrp	x1, .LANCHOR181
+	bhi	.L2637
+	adrp	x1, .LANCHOR189
 	adrp	x0, .LC0
-	mov	w2, 564
-	add	x1, x1, :lo12:.LANCHOR181
+	mov	w2, 635
+	add	x1, x1, :lo12:.LANCHOR189
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2388:
+.L2637:
 	ldrb	w0, [x19, #:lo12:.LANCHOR18]
 	cmp	w0, w21
-	bls	.L2399
+	bls	.L2648
 	adrp	x0, .LANCHOR30
 	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w27, [x0, w21, sxtw]
-	cbnz	w24, .L2401
+	cbnz	w24, .L2650
 	adrp	x0, .LANCHOR0
 	ldrb	w1, [x0, #:lo12:.LANCHOR0]
 	adrp	x0, .LANCHOR1
-	cbz	w1, .L2391
+	cbz	w1, .L2640
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
-	cbz	w1, .L2401
-.L2391:
+	cbz	w1, .L2650
+.L2640:
 	adrp	x1, .LANCHOR2
 	ldrb	w0, [x0, #:lo12:.LANCHOR1]
 	ldrh	w1, [x1, #:lo12:.LANCHOR2]
 	udiv	w19, w20, w1
 	mul	w19, w19, w1
 	sub	w1, w20, w19
-	cbz	w0, .L2392
+	cbz	w0, .L2641
 	add	w19, w19, w1, lsl 1
-.L2390:
+.L2639:
 	adrp	x24, .LANCHOR14
-	adrp	x25, .LC137
+	adrp	x25, .LC147
 	add	x24, x24, :lo12:.LANCHOR14
-	add	x25, x25, :lo12:.LC137
-	adrp	x26, .LANCHOR168
-.L2396:
+	add	x25, x25, :lo12:.LC147
+	adrp	x26, .LANCHOR175
+.L2645:
 	ldr	w0, [x24]
-	tbz	x0, 4, .L2393
+	tbz	x0, 4, .L2642
 	mov	w3, w19
 	mov	w2, w20
 	mov	w1, w27
 	mov	x0, x25
 	bl	printf
-.L2393:
+.L2642:
 	mov	w4, w28
 	mov	x3, x22
 	mov	x2, x23
@@ -14878,12 +16295,12 @@ flash_prog_page_en:
 	bl	flash_prog_page
 	mov	w5, w0
 	ldr	w0, [x29, 124]
-	cbz	w0, .L2394
-	adrp	x6, .LANCHOR169
-	ldr	x3, [x26, #:lo12:.LANCHOR168]
+	cbz	w0, .L2643
+	adrp	x6, .LANCHOR176
+	ldr	x3, [x26, #:lo12:.LANCHOR175]
 	mov	w4, w28
 	str	x6, [x29, 112]
-	ldr	x2, [x6, #:lo12:.LANCHOR169]
+	ldr	x2, [x6, #:lo12:.LANCHOR176]
 	mov	w1, w20
 	mov	w0, w21
 	str	w5, [x29, 104]
@@ -14893,78 +16310,78 @@ flash_prog_page_en:
 	mov	w4, w0
 	ccmn	w0, #1, 4, ne
 	mov	x7, x6
-	beq	.L2395
-	ldr	x0, [x6, #:lo12:.LANCHOR169]
+	beq	.L2644
+	ldr	x0, [x6, #:lo12:.LANCHOR176]
 	ldr	w1, [x23]
 	ldr	w5, [x29, 104]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	bne	.L2395
-	ldr	x0, [x26, #:lo12:.LANCHOR168]
+	bne	.L2644
+	ldr	x0, [x26, #:lo12:.LANCHOR175]
 	ldr	w1, [x22]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	beq	.L2394
-.L2395:
+	beq	.L2643
+.L2644:
 	str	w4, [x29, 112]
 	mov	w3, 4
 	str	x7, [x29, 104]
 	mov	w2, w3
 	mov	x1, x23
-	adrp	x0, .LC138
-	add	x0, x0, :lo12:.LC138
+	adrp	x0, .LC148
+	add	x0, x0, :lo12:.LC148
 	bl	rknand_print_hex
 	mov	w3, 4
 	mov	x1, x22
 	mov	w2, w3
-	adrp	x0, .LC139
-	add	x0, x0, :lo12:.LC139
+	adrp	x0, .LC149
+	add	x0, x0, :lo12:.LC149
 	bl	rknand_print_hex
-	adrp	x0, .LANCHOR168
+	adrp	x0, .LANCHOR175
 	mov	w3, 4
 	mov	w2, w3
-	ldr	x1, [x0, #:lo12:.LANCHOR168]
-	adrp	x0, .LC140
-	add	x0, x0, :lo12:.LC140
+	ldr	x1, [x0, #:lo12:.LANCHOR175]
+	adrp	x0, .LC150
+	add	x0, x0, :lo12:.LC150
 	bl	rknand_print_hex
 	ldr	x7, [x29, 104]
 	mov	w3, 4
-	adrp	x0, .LC141
+	adrp	x0, .LC151
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC141
-	ldr	x1, [x7, #:lo12:.LANCHOR169]
+	add	x0, x0, :lo12:.LC151
+	ldr	x1, [x7, #:lo12:.LANCHOR176]
 	bl	rknand_print_hex
 	ldr	w4, [x29, 112]
 	cmp	w4, 512
-	beq	.L2396
-.L2398:
+	beq	.L2645
+.L2647:
 	mov	w1, w20
-	adrp	x0, .LC142
-	add	x0, x0, :lo12:.LC142
+	adrp	x0, .LC152
+	add	x0, x0, :lo12:.LC152
 	bl	printf
-	adrp	x1, .LANCHOR181
+	adrp	x1, .LANCHOR189
 	adrp	x0, .LC0
-	mov	w2, 597
-	add	x1, x1, :lo12:.LANCHOR181
+	mov	w2, 678
+	add	x1, x1, :lo12:.LANCHOR189
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2399:
+.L2648:
 	mov	w0, -1
-	b	.L2387
-.L2392:
+	b	.L2636
+.L2641:
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
 	ldrh	w0, [x0, w1, uxtw 1]
 	add	w19, w0, w19
-	b	.L2390
-.L2401:
+	b	.L2639
+.L2650:
 	mov	w19, w20
-	b	.L2390
-.L2394:
+	b	.L2639
+.L2643:
 	mov	w0, w5
 	cmn	w5, #1
-	beq	.L2398
-.L2387:
+	beq	.L2647
+.L2636:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -14981,115 +16398,116 @@ ftl_test_block:
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x24, ftl_tmp_buffer
-	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR182
+	adrp	x24, .LANCHOR190
 	stp	x21, x22, [sp, 32]
-	adrp	x26, .LANCHOR106
 	and	w21, w0, 65535
-	add	x0, x26, :lo12:.LANCHOR106
-	stp	x19, x20, [sp, 16]
+	ldr	x0, [x24, #:lo12:.LANCHOR190]
 	mov	w23, 0
+	stp	x25, x26, [sp, 64]
+	adrp	x25, .LANCHOR191
+	stp	x19, x20, [sp, 16]
+	adrp	x26, .LANCHOR112
 	stp	x27, x28, [sp, 80]
 	mov	w20, 0
-	adrp	x27, .LANCHOR69
+	str	wzr, [x0]
+	add	x0, x26, :lo12:.LANCHOR112
+	adrp	x27, .LANCHOR76
 	str	x0, [x29, 112]
-	str	wzr, [x24, #:lo12:ftl_tmp_buffer]
-	add	x0, x27, :lo12:.LANCHOR69
-	str	wzr, [x25, #:lo12:.LANCHOR182]
+	str	wzr, [x25, #:lo12:.LANCHOR191]
+	add	x0, x27, :lo12:.LANCHOR76
 	str	x0, [x29, 96]
-.L2418:
+.L2667:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
 	cmp	w0, w20
-	bls	.L2428
-	add	x0, x27, :lo12:.LANCHOR69
+	bls	.L2677
+	add	x0, x27, :lo12:.LANCHOR76
 	mov	w22, 0
 	str	x0, [x29, 120]
 	adrp	x0, .LANCHOR14
 	add	x0, x0, :lo12:.LANCHOR14
 	str	x0, [x29, 104]
-	b	.L2429
-.L2427:
+	b	.L2678
+.L2676:
 	ldr	x0, [x29, 104]
 	ldr	w0, [x0]
-	tbz	x0, 12, .L2419
-	adrp	x0, .LC143
+	tbz	x0, 12, .L2668
+	adrp	x0, .LC153
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC143
+	add	x0, x0, :lo12:.LC153
 	bl	printf
-.L2419:
+.L2668:
 	ldr	x0, [x29, 96]
 	ldrb	w19, [x0]
 	madd	w19, w21, w19, w22
 	and	w19, w19, 65535
-	cbnz	w20, .L2420
+	cbnz	w20, .L2669
 	adrp	x0, .LANCHOR27
 	ldr	x0, [x0, #:lo12:.LANCHOR27]
 	ldrb	w0, [x0, 47]
 	cmp	w0, w19
-	bcs	.L2421
-.L2420:
+	bcs	.L2670
+.L2669:
 	and	w28, w20, 255
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_check_bad_block
-	cbnz	w0, .L2421
-	adrp	x0, .LANCHOR105
+	cbnz	w0, .L2670
+	adrp	x0, .LANCHOR111
 	mov	w1, w23
-	ldrh	w7, [x0, #:lo12:.LANCHOR105]
+	ldrh	w7, [x0, #:lo12:.LANCHOR111]
 	mov	w0, w28
 	mul	w26, w7, w19
 	mov	w2, w26
 	bl	flash_erase_block_en
-	cbz	w0, .L2422
-	adrp	x0, .LANCHOR73
-	ldrb	w0, [x0, #:lo12:.LANCHOR73]
+	cbz	w0, .L2671
+	adrp	x0, .LANCHOR79
+	ldrb	w0, [x0, #:lo12:.LANCHOR79]
 	cmp	w0, 2
-	bne	.L2444
+	bne	.L2693
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L2444
+	cbz	w0, .L2693
 	mov	w2, w26
 	mov	w1, 1
 	mov	w0, w28
 	bl	flash_erase_block_en
-	cbnz	w0, .L2444
-.L2426:
-	adrp	x0, .LANCHOR73
+	cbnz	w0, .L2693
+.L2675:
+	adrp	x0, .LANCHOR79
 	mov	w23, 1
-	ldrb	w0, [x0, #:lo12:.LANCHOR73]
+	ldrb	w0, [x0, #:lo12:.LANCHOR79]
 	add	w26, w26, w0, lsl 24
-.L2425:
-	adrp	x0, .LANCHOR126
+.L2674:
+	adrp	x0, .LANCHOR131
+	ldr	x2, [x24, #:lo12:.LANCHOR190]
 	mov	w5, 1
-	add	x3, x25, :lo12:.LANCHOR182
-	add	x2, x24, :lo12:ftl_tmp_buffer
-	ldrb	w4, [x0, #:lo12:.LANCHOR126]
+	add	x3, x25, :lo12:.LANCHOR191
+	ldrb	w4, [x0, #:lo12:.LANCHOR131]
 	mov	w1, w26
 	mov	w0, w28
 	bl	flash_prog_page_en
-	cbz	w0, .L2421
-.L2444:
+	cbz	w0, .L2670
+.L2693:
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_mask_bad_block
-.L2421:
+.L2670:
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L2429:
+.L2678:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, w22
-	bhi	.L2427
+	bhi	.L2676
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2418
-.L2422:
-	cbz	w23, .L2425
-	b	.L2426
-.L2428:
-	cbz	w23, .L2430
+	b	.L2667
+.L2671:
+	cbz	w23, .L2674
+	b	.L2675
+.L2677:
+	cbz	w23, .L2679
 	adrp	x0, .LANCHOR7
 	mov	w1, 2
 	ldr	x0, [x0, #:lo12:.LANCHOR7]
@@ -15097,7 +16515,7 @@ ftl_test_block:
 	ldrb	w0, [x21, 2]
 	bfi	w0, w1, 3, 2
 	strb	w0, [x21, 2]
-.L2430:
+.L2679:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -15132,18 +16550,18 @@ ftl_prog_page:
 	bl	flash_prog_page_en
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L2445
-	mov	w2, 2350
-	adrp	x1, .LANCHOR183
+	bne	.L2694
+	mov	w2, 2670
+	adrp	x1, .LANCHOR192
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR183
+	add	x1, x1, :lo12:.LANCHOR192
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	adrp	x0, .LC142
+	adrp	x0, .LC152
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC142
+	add	x0, x0, :lo12:.LC152
 	bl	printf
-.L2445:
+.L2694:
 	mov	w0, w19
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -15160,85 +16578,78 @@ ftl_info_flush:
 	mov	w1, 0
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR126
+	adrp	x21, .LANCHOR131
+	stp	x23, x24, [sp, 48]
+	adrp	x24, .LANCHOR110
+	ldrb	w2, [x21, #:lo12:.LANCHOR131]
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR184
-	ldrb	w2, [x21, #:lo12:.LANCHOR126]
-	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR104
+	adrp	x20, .LANCHOR193
 	str	w0, [x29, 116]
-	add	x0, x20, :lo12:.LANCHOR184
-	stp	x23, x24, [sp, 48]
+	add	x0, x20, :lo12:.LANCHOR193
+	stp	x25, x26, [sp, 64]
 	lsl	w2, w2, 1
 	stp	x27, x28, [sp, 80]
 	bl	ftl_memset
-	adrp	x0, .LANCHOR74
-	ldrb	w0, [x0, #:lo12:.LANCHOR74]
-	cbz	w0, .L2449
-	ldr	x0, [x25, #:lo12:.LANCHOR104]
-	strh	wzr, [x0, 150]
-	str	wzr, [x0, 156]
-.L2449:
-	ldr	x0, [x25, #:lo12:.LANCHOR104]
+	ldr	x0, [x24, #:lo12:.LANCHOR110]
 	ldrh	w1, [x0, 74]
-	cbz	w1, .L2450
+	cbz	w1, .L2698
 	strh	wzr, [x0, 150]
-.L2450:
-	adrp	x23, .LANCHOR185
-	add	x19, x23, :lo12:.LANCHOR185
-	adrp	x24, .LANCHOR105
+.L2698:
+	adrp	x23, .LANCHOR194
+	add	x19, x23, :lo12:.LANCHOR194
+	adrp	x25, .LANCHOR111
 	mov	w26, 0
-	add	x0, x24, :lo12:.LANCHOR105
+	add	x0, x25, :lo12:.LANCHOR111
 	str	x0, [x29, 104]
-.L2463:
-	add	x0, x23, :lo12:.LANCHOR185
-	ldrh	w1, [x24, #:lo12:.LANCHOR105]
-	add	x7, x20, :lo12:.LANCHOR184
+.L2711:
+	add	x0, x23, :lo12:.LANCHOR194
+	adrp	x22, .LANCHOR195
+	ldrh	w1, [x25, #:lo12:.LANCHOR111]
+	add	x7, x20, :lo12:.LANCHOR193
 	str	w1, [x29, 120]
-	ldrb	w1, [x21, #:lo12:.LANCHOR126]
-	adrp	x22, ftl_info_data_buffer
 	ldrh	w27, [x0, 2]
-	ldr	x0, [x25, #:lo12:.LANCHOR104]
-	lsl	w1, w1, 9
-	ldrb	w28, [x23, #:lo12:.LANCHOR185]
+	ldr	x0, [x24, #:lo12:.LANCHOR110]
+	ldrb	w1, [x21, #:lo12:.LANCHOR131]
+	ldrb	w28, [x23, #:lo12:.LANCHOR194]
 	ldr	w6, [x0, 4]
+	lsl	w1, w1, 9
 	add	w6, w6, 1
 	str	w6, [x0, 4]
 	ldr	w0, [x29, 116]
-	str	w0, [x20, #:lo12:.LANCHOR184]
-	add	x0, x22, :lo12:ftl_info_data_buffer
+	str	w0, [x20, #:lo12:.LANCHOR193]
+	ldr	x0, [x22, #:lo12:.LANCHOR195]
 	str	w6, [x7, 4]
 	bl	js_hash
 	str	w0, [x7, 8]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2451
-	adrp	x0, .LC144
+	tbz	x0, 12, .L2699
+	adrp	x0, .LC154
 	mov	w3, w6
 	mov	w2, w27
 	mov	w1, w28
-	add	x0, x0, :lo12:.LC144
+	add	x0, x0, :lo12:.LC154
 	bl	printf
-.L2451:
-	adrp	x1, .LANCHOR87
+.L2699:
+	adrp	x1, .LANCHOR95
 	ldrh	w0, [x19, 2]
-	ldrh	w1, [x1, #:lo12:.LANCHOR87]
+	ldrh	w1, [x1, #:lo12:.LANCHOR95]
 	cmp	w1, w0
-	bhi	.L2452
-	adrp	x27, .LANCHOR186
+	bhi	.L2700
+	adrp	x27, .LANCHOR196
 	adrp	x3, .LC0
-	add	x27, x27, :lo12:.LANCHOR186
+	add	x27, x27, :lo12:.LANCHOR196
 	add	x3, x3, :lo12:.LC0
-.L2459:
+.L2707:
 	ldrb	w0, [x19, 1]
 	adrp	x28, .LANCHOR27
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x19, 1]
 	cmp	w0, 7
-	bls	.L2453
+	bls	.L2701
 	mov	x0, 0
-.L2458:
+.L2706:
 	ldr	x2, [x28, #:lo12:.LANCHOR27]
 	add	w1, w0, 8
 	and	w26, w0, 65535
@@ -15247,86 +16658,86 @@ ftl_info_flush:
 	add	w1, w2, 127
 	and	w1, w1, 255
 	cmp	w1, 125
-	bhi	.L2454
+	bhi	.L2702
 	mov	x0, x3
 	str	x3, [x29, 120]
-	mov	w2, 761
+	mov	w2, 841
 	mov	x1, x27
 	bl	printf
 	ldr	x3, [x29, 120]
-.L2457:
+.L2705:
 	strb	w26, [x19, 1]
 	mov	w26, 1
-.L2453:
+.L2701:
 	ldr	x0, [x28, #:lo12:.LANCHOR27]
 	ldrb	w1, [x19, 1]
 	add	x0, x0, x1
 	ldrb	w28, [x0, 40]
 	strb	w28, [x19]
 	cmp	w28, 255
-	beq	.L2459
+	beq	.L2707
 	ldr	x0, [x29, 104]
 	ldrh	w27, [x0]
 	mov	w0, 0
 	mul	w27, w27, w28
 	mov	w1, w27
 	bl	flash_erase_block
-	ldrb	w4, [x21, #:lo12:.LANCHOR126]
+	ldrb	w4, [x21, #:lo12:.LANCHOR131]
 	mov	w1, w27
-	add	x3, x20, :lo12:.LANCHOR184
-	add	x2, x22, :lo12:ftl_info_data_buffer
+	ldr	x2, [x22, #:lo12:.LANCHOR195]
+	add	x3, x20, :lo12:.LANCHOR193
 	mov	w0, 0
 	add	w27, w27, 1
 	bl	ftl_prog_page
 	mov	w0, 1
 	strh	w0, [x19, 2]
-.L2460:
-	ldrb	w4, [x21, #:lo12:.LANCHOR126]
+.L2708:
+	ldrb	w4, [x21, #:lo12:.LANCHOR131]
 	mov	w1, w27
-	add	x3, x20, :lo12:.LANCHOR184
-	add	x2, x22, :lo12:ftl_info_data_buffer
+	ldr	x2, [x22, #:lo12:.LANCHOR195]
+	add	x3, x20, :lo12:.LANCHOR193
 	mov	w0, 0
 	bl	ftl_prog_page
 	cmn	w0, #1
 	ldrh	w1, [x19, 2]
-	adrp	x0, .LANCHOR187
+	adrp	x0, .LANCHOR197
 	add	w1, w1, 1
 	strh	w1, [x19, 2]
-	beq	.L2461
-	ldrb	w1, [x0, #:lo12:.LANCHOR187]
-	cbz	w1, .L2462
-.L2461:
-	strb	wzr, [x0, #:lo12:.LANCHOR187]
-	b	.L2463
-.L2454:
+	beq	.L2709
+	ldrb	w1, [x0, #:lo12:.LANCHOR197]
+	cbz	w1, .L2710
+.L2709:
+	strb	wzr, [x0, #:lo12:.LANCHOR197]
+	b	.L2711
+.L2702:
 	cmp	w2, 255
-	bne	.L2457
+	bne	.L2705
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L2458
+	bne	.L2706
 	mov	w26, w0
-	b	.L2457
-.L2452:
+	b	.L2705
+.L2700:
 	ldr	w1, [x29, 120]
 	madd	w27, w1, w28, w27
-	cbnz	w0, .L2460
+	cbnz	w0, .L2708
 	mov	w1, w27
 	bl	flash_erase_block
-	b	.L2460
-.L2462:
-	cbnz	w26, .L2464
-.L2472:
-	adrp	x0, .LANCHOR185
-	ldrb	w0, [x0, #:lo12:.LANCHOR185]
+	b	.L2708
+.L2710:
+	cbnz	w26, .L2712
+.L2720:
+	adrp	x0, .LANCHOR194
+	ldrb	w0, [x0, #:lo12:.LANCHOR194]
 	cmp	w0, 255
-	bne	.L2466
-	adrp	x1, .LANCHOR186
+	bne	.L2714
+	adrp	x1, .LANCHOR196
 	adrp	x0, .LC0
-	mov	w2, 797
-	add	x1, x1, :lo12:.LANCHOR186
+	mov	w2, 885
+	add	x1, x1, :lo12:.LANCHOR196
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2466:
+.L2714:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -15335,17 +16746,17 @@ ftl_info_flush:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2464:
+.L2712:
 	ldrb	w19, [x19, 1]
-	adrp	x20, .LANCHOR186
+	adrp	x20, .LANCHOR196
 	adrp	x21, .LC0
-	add	x20, x20, :lo12:.LANCHOR186
+	add	x20, x20, :lo12:.LANCHOR196
 	add	w19, w19, 1
 	add	x21, x21, :lo12:.LC0
 	adrp	x22, .LANCHOR27
-.L2467:
+.L2715:
 	cmp	w19, 7
-	bhi	.L2472
+	bhi	.L2720
 	ldr	x1, [x22, #:lo12:.LANCHOR27]
 	add	w0, w19, 8
 	add	x0, x1, x0, sxtw
@@ -15353,78 +16764,78 @@ ftl_info_flush:
 	add	w0, w23, 127
 	and	w0, w0, 255
 	cmp	w0, 125
-	bhi	.L2468
-	mov	w2, 790
+	bhi	.L2716
+	mov	w2, 876
 	mov	x1, x20
 	mov	x0, x21
 	bl	printf
-.L2469:
-	adrp	x0, .LANCHOR105
-	ldrh	w1, [x0, #:lo12:.LANCHOR105]
+.L2717:
+	adrp	x0, .LANCHOR111
+	ldrh	w1, [x0, #:lo12:.LANCHOR111]
 	mov	w0, 0
 	mul	w1, w1, w23
 	bl	flash_erase_block
-	b	.L2470
-.L2468:
+	b	.L2718
+.L2716:
 	cmp	w23, 255
-	bne	.L2469
-.L2470:
+	bne	.L2717
+.L2718:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L2467
+	b	.L2715
 	.size	ftl_info_flush, .-ftl_info_flush
 	.section	.text.ftl_info_blk_init,"ax",@progbits
 	.align	2
 	.global	ftl_info_blk_init
 	.type	ftl_info_blk_init, %function
 ftl_info_blk_init:
-	stp	x29, x30, [sp, -128]!
-	adrp	x0, .LANCHOR188
-	adrp	x1, .LANCHOR187
+	stp	x29, x30, [sp, -112]!
+	adrp	x0, .LANCHOR198
+	adrp	x1, .LANCHOR197
 	mov	w2, 16384
 	add	x29, sp, 0
-	strb	wzr, [x0, #:lo12:.LANCHOR188]
+	strb	wzr, [x0, #:lo12:.LANCHOR198]
 	mov	w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR187]
-	adrp	x1, .LANCHOR189
+	strb	w0, [x1, #:lo12:.LANCHOR197]
+	adrp	x1, .LANCHOR199
 	stp	x21, x22, [sp, 32]
-	adrp	x21, ftl_info_data_buffer
-	strb	w0, [x1, #:lo12:.LANCHOR189]
+	adrp	x21, .LANCHOR195
+	strb	w0, [x1, #:lo12:.LANCHOR199]
 	adrp	x1, .LANCHOR7
-	add	x0, x21, :lo12:ftl_info_data_buffer
-	stp	x19, x20, [sp, 16]
+	ldr	x0, [x21, #:lo12:.LANCHOR195]
+	mov	x22, 7
 	str	x0, [x1, #:lo12:.LANCHOR7]
 	adrp	x1, .LANCHOR6
-	adrp	x19, .LANCHOR104
-	stp	x23, x24, [sp, 48]
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR110
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
+	adrp	x20, .LANCHOR194
+	stp	x23, x24, [sp, 48]
 	adrp	x23, .LANCHOR27
 	stp	x25, x26, [sp, 64]
-	adrp	x20, .LANCHOR185
-	stp	x27, x28, [sp, 80]
-	adrp	x26, .LANCHOR105
+	adrp	x24, .LANCHOR131
 	add	x1, x0, x1, lsl 2
-	str	x1, [x19, #:lo12:.LANCHOR104]
+	stp	x27, x28, [sp, 80]
+	str	x1, [x19, #:lo12:.LANCHOR110]
 	mov	w1, 0
 	bl	ftl_memset
+	adrp	x26, .LANCHOR111
+	adrp	x0, .LANCHOR200
 	mov	w1, 0
 	mov	w2, 16384
-	adrp	x0, ftl_ext_info_data_buffer
-	add	x0, x0, :lo12:ftl_ext_info_data_buffer
+	mov	w27, 21574
+	ldr	x0, [x0, #:lo12:.LANCHOR200]
+	add	x26, x26, :lo12:.LANCHOR111
+	add	x24, x24, :lo12:.LANCHOR131
+	movk	w27, 0x494c, lsl 16
 	bl	ftl_memset
-	adrp	x24, .LANCHOR126
 	ldr	x1, [x23, #:lo12:.LANCHOR27]
-	add	x0, x20, :lo12:.LANCHOR185
-	mov	w27, 21574
-	add	x26, x26, :lo12:.LANCHOR105
-	add	x24, x24, :lo12:.LANCHOR126
-	mov	x22, 7
+	add	x0, x20, :lo12:.LANCHOR194
 	strb	wzr, [x0, 1]
-	movk	w27, 0x494c, lsl 16
 	ldrb	w1, [x1, 40]
-	strb	w1, [x20, #:lo12:.LANCHOR185]
+	strb	w1, [x20, #:lo12:.LANCHOR194]
 	strh	wzr, [x0, 2]
-.L2494:
+.L2739:
 	ldr	x1, [x23, #:lo12:.LANCHOR27]
 	add	w0, w22, 8
 	sxth	w25, w22
@@ -15432,149 +16843,147 @@ ftl_info_blk_init:
 	add	x0, x1, x0, sxtw
 	ldrb	w0, [x0, 32]
 	cmp	w0, 255
-	bne	.L2493
-.L2498:
+	bne	.L2738
+.L2743:
 	sub	x22, x22, #1
 	cmn	x22, #1
-	bne	.L2494
+	bne	.L2739
 	mov	w25, 0
-.L2495:
+.L2740:
 	adrp	x24, .LANCHOR14
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2499
-	ldr	x0, [x19, #:lo12:.LANCHOR104]
+	tbz	x0, 12, .L2744
+	ldr	x0, [x19, #:lo12:.LANCHOR110]
 	mov	w2, 4800
 	mov	w1, w22
 	ldr	w3, [x0]
-	adrp	x0, .LC146
-	add	x0, x0, :lo12:.LC146
+	adrp	x0, .LC156
+	add	x0, x0, :lo12:.LC156
 	bl	printf
-.L2499:
+.L2744:
 	cmn	w22, #1
-	bne	.L2500
+	bne	.L2745
+	ldr	x0, [x21, #:lo12:.LANCHOR195]
 	mov	w1, 0
 	mov	w2, 16384
-	add	x0, x21, :lo12:ftl_info_data_buffer
 	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR104]
+	ldr	x0, [x19, #:lo12:.LANCHOR110]
 	mov	w1, 21574
 	movk	w1, 0x494c, lsl 16
 	str	w1, [x0]
-	mov	w1, 34
+	mov	w1, 35
 	movk	w1, 0x6, lsl 16
 	str	w1, [x0, 12]
 	mov	w0, w22
-.L2492:
+.L2737:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 128
+	ldp	x29, x30, [sp], 112
 	ret
-.L2493:
+.L2738:
 	ldrh	w6, [x26]
-	add	x8, x21, :lo12:ftl_info_data_buffer
+	adrp	x7, .LANCHOR193
 	ldrb	w4, [x24]
-	adrp	x7, .LANCHOR184
-	add	x7, x7, :lo12:.LANCHOR184
-	mov	x2, x8
+	add	x7, x7, :lo12:.LANCHOR193
+	ldr	x2, [x21, #:lo12:.LANCHOR195]
 	mov	x3, x7
-	stp	x7, x8, [x29, 104]
+	str	x7, [x29, 96]
 	mul	w6, w6, w0
 	mov	w0, 0
-	str	w6, [x29, 124]
+	str	w6, [x29, 108]
 	mov	w1, w6
 	bl	ftl_read_page
 	mov	w5, w0
 	cmn	w0, #1
-	ldr	w6, [x29, 124]
-	ldp	x7, x8, [x29, 104]
-	bne	.L2496
+	ldr	w6, [x29, 108]
+	ldr	x7, [x29, 96]
+	bne	.L2741
 	ldrb	w4, [x24]
 	mov	x3, x7
-	mov	x2, x8
+	ldr	x2, [x21, #:lo12:.LANCHOR195]
 	add	w1, w6, 1
 	mov	w0, 0
 	bl	ftl_read_page
 	mov	w5, w0
-.L2496:
+.L2741:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2497
-	ldr	x0, [x19, #:lo12:.LANCHOR104]
+	tbz	x0, 12, .L2742
+	ldr	x0, [x19, #:lo12:.LANCHOR110]
 	mov	w2, w5
-	str	w5, [x29, 124]
-	mov	w3, 672
+	str	w5, [x29, 108]
+	mov	w3, 744
 	mov	w1, w28
 	ldr	w4, [x0]
-	adrp	x0, .LC145
-	add	x0, x0, :lo12:.LC145
+	adrp	x0, .LC155
+	add	x0, x0, :lo12:.LC155
 	bl	printf
-	ldr	w5, [x29, 124]
-.L2497:
+	ldr	w5, [x29, 108]
+.L2742:
 	cmn	w5, #1
-	beq	.L2498
-	ldr	x0, [x19, #:lo12:.LANCHOR104]
+	beq	.L2743
+	ldr	x0, [x19, #:lo12:.LANCHOR110]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L2498
+	bne	.L2743
 	mov	w22, w25
-	b	.L2495
-.L2500:
+	b	.L2740
+.L2745:
 	ldr	x1, [x23, #:lo12:.LANCHOR27]
 	add	w0, w25, 8
+	ldr	x2, [x21, #:lo12:.LANCHOR195]
 	mov	w4, 4
-	add	x2, x21, :lo12:ftl_info_data_buffer
-	adrp	x26, .LANCHOR126
+	adrp	x26, .LANCHOR131
 	mov	w28, 21574
 	add	x0, x1, x0, sxtw
-	adrp	x27, .LC147
-	add	x26, x26, :lo12:.LANCHOR126
-	add	x27, x27, :lo12:.LC147
+	adrp	x27, .LC157
+	add	x26, x26, :lo12:.LANCHOR131
+	add	x27, x27, :lo12:.LC157
 	movk	w28, 0x494c, lsl 16
 	ldrb	w1, [x0, 32]
-	add	x0, x20, :lo12:.LANCHOR185
-	strb	w1, [x20, #:lo12:.LANCHOR185]
+	add	x0, x20, :lo12:.LANCHOR194
+	strb	w1, [x20, #:lo12:.LANCHOR194]
 	strb	w25, [x0, 1]
-	adrp	x25, .LANCHOR184
+	adrp	x25, .LANCHOR193
 	mov	w0, 0
-	add	x3, x25, :lo12:.LANCHOR184
+	add	x3, x25, :lo12:.LANCHOR193
 	bl	flash_get_last_written_page
 	sxth	w22, w0
 	add	w0, w0, 1
-	ldrb	w23, [x20, #:lo12:.LANCHOR185]
+	ldrb	w23, [x20, #:lo12:.LANCHOR194]
 	and	w0, w0, 65535
-	str	w0, [x29, 124]
-	adrp	x0, .LANCHOR105
-	ldrh	w0, [x0, #:lo12:.LANCHOR105]
+	str	w0, [x29, 108]
+	adrp	x0, .LANCHOR111
+	ldrh	w0, [x0, #:lo12:.LANCHOR111]
 	madd	w23, w23, w0, w22
-.L2502:
-	tbnz	w22, #31, .L2506
+.L2747:
+	tbnz	w22, #31, .L2751
 	ldrb	w4, [x26]
-	add	x6, x25, :lo12:.LANCHOR184
-	add	x5, x21, :lo12:ftl_info_data_buffer
-	mov	x3, x6
-	mov	x2, x5
+	add	x5, x25, :lo12:.LANCHOR193
+	ldr	x2, [x21, #:lo12:.LANCHOR195]
+	mov	x3, x5
 	mov	w1, w23
 	mov	w0, 0
-	stp	x6, x5, [x29, 104]
+	str	x5, [x29, 96]
 	bl	ftl_read_page
 	cmn	w0, #1
-	beq	.L2503
-	ldr	x0, [x19, #:lo12:.LANCHOR104]
-	ldp	x6, x5, [x29, 104]
+	beq	.L2748
+	ldr	x0, [x19, #:lo12:.LANCHOR110]
+	ldr	x5, [x29, 96]
 	ldr	w0, [x0]
 	cmp	w0, w28
-	bne	.L2503
-	ldr	w6, [x6, 8]
-	cbnz	w6, .L2504
-.L2506:
-	ldrh	w0, [x29, 124]
-	add	x20, x20, :lo12:.LANCHOR185
+	bne	.L2748
+	ldr	w6, [x5, 8]
+	cbnz	w6, .L2749
+.L2751:
+	ldrh	w0, [x29, 108]
+	add	x20, x20, :lo12:.LANCHOR194
 	strh	w0, [x20, 2]
 	bl	ftl_tmp_into_update
-	ldr	x1, [x19, #:lo12:.LANCHOR104]
+	ldr	x1, [x19, #:lo12:.LANCHOR110]
 	ldr	w0, [x1, 64]
 	add	w0, w0, 1
 	str	w0, [x1, 64]
@@ -15583,32 +16992,32 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_info_flush
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbnz	x0, 14, .L2505
-.L2522:
+	tbnz	x0, 14, .L2750
+.L2767:
 	mov	w0, 0
-	b	.L2492
-.L2504:
+	b	.L2737
+.L2749:
+	ldr	x0, [x21, #:lo12:.LANCHOR195]
 	ldrb	w1, [x26]
-	mov	x0, x5
 	lsl	w1, w1, 9
 	bl	js_hash
 	cmp	w6, w0
-	beq	.L2506
+	beq	.L2751
 	mov	w1, w6
 	mov	x0, x27
 	bl	printf
-.L2503:
+.L2748:
 	sub	w22, w22, #1
 	sub	w23, w23, #1
 	sxth	w22, w22
-	b	.L2502
-.L2505:
-	ldr	x0, [x19, #:lo12:.LANCHOR104]
+	b	.L2747
+.L2750:
+	ldr	x0, [x19, #:lo12:.LANCHOR110]
 	ldr	w1, [x0, 156]
-	adrp	x0, .LC148
-	add	x0, x0, :lo12:.LC148
+	adrp	x0, .LC158
+	add	x0, x0, :lo12:.LC158
 	bl	printf
-	b	.L2522
+	b	.L2767
 	.size	ftl_info_blk_init, .-ftl_info_blk_init
 	.section	.text.ftl_ext_info_flush,"ax",@progbits
 	.align	2
@@ -15625,76 +17034,76 @@ ftl_ext_info_flush:
 	ldr	w1, [x0, 520]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbz	w1, .L2524
+	cbz	w1, .L2769
 	str	wzr, [x0, 520]
-.L2524:
-	adrp	x20, .LANCHOR87
-	adrp	x22, .LANCHOR190
-	adrp	x21, .LANCHOR31
-	add	x20, x20, :lo12:.LANCHOR87
-	add	x22, x22, :lo12:.LANCHOR190
-	add	x21, x21, :lo12:.LANCHOR31
+.L2769:
+	adrp	x20, .LANCHOR95
+	adrp	x22, .LANCHOR201
+	adrp	x21, .LANCHOR32
+	add	x20, x20, :lo12:.LANCHOR95
+	add	x22, x22, :lo12:.LANCHOR201
+	add	x21, x21, :lo12:.LANCHOR32
 	mov	w0, 0
 	bl	ftl_total_vpn_update
-.L2525:
-	adrp	x23, .LANCHOR104
+.L2770:
+	adrp	x23, .LANCHOR110
 	mov	x24, x23
-.L2528:
-	ldr	x0, [x23, #:lo12:.LANCHOR104]
+.L2773:
+	ldr	x0, [x23, #:lo12:.LANCHOR110]
 	ldr	w1, [x0, 56]
 	add	w1, w1, 1
 	str	w1, [x0, 56]
 	ldrh	w1, [x0, 140]
 	ldrh	w0, [x20]
 	cmp	w1, w0
-	bcc	.L2526
+	bcc	.L2771
 	bl	ftl_ext_alloc_new_blk
-.L2526:
-	ldr	x0, [x24, #:lo12:.LANCHOR104]
+.L2771:
+	ldr	x0, [x24, #:lo12:.LANCHOR110]
 	ldrh	w1, [x0, 130]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2527
+	bne	.L2772
 	adrp	x0, .LC0
-	mov	w2, 1926
+	mov	w2, 2203
 	mov	x1, x22
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2527:
+.L2772:
 	ldrb	w19, [x21]
 	mov	w0, 24
-	ldr	x1, [x24, #:lo12:.LANCHOR104]
-	adrp	x26, .LANCHOR126
+	ldr	x1, [x24, #:lo12:.LANCHOR110]
+	adrp	x26, .LANCHOR131
 	sub	w19, w0, w19
-	adrp	x0, .LANCHOR68
-	adrp	x27, .LANCHOR184
-	add	x25, x27, :lo12:.LANCHOR184
-	ldrh	w0, [x0, #:lo12:.LANCHOR68]
+	adrp	x0, .LANCHOR75
+	adrp	x27, .LANCHOR193
+	add	x25, x27, :lo12:.LANCHOR193
+	ldrh	w0, [x0, #:lo12:.LANCHOR75]
 	ldrh	w2, [x1, 130]
 	sub	w0, w19, w0
 	mov	w19, 1
 	asr	w28, w2, w0
 	lsl	w19, w19, w0
-	adrp	x0, .LANCHOR105
+	adrp	x0, .LANCHOR111
 	sub	w19, w19, #1
 	and	w19, w19, w2
-	ldrh	w2, [x0, #:lo12:.LANCHOR105]
+	ldrh	w2, [x0, #:lo12:.LANCHOR111]
 	ldrh	w0, [x1, 140]
 	sxth	w19, w19
 	mov	w1, 0
 	madd	w19, w19, w2, w0
-	ldrb	w2, [x26, #:lo12:.LANCHOR126]
+	ldrb	w2, [x26, #:lo12:.LANCHOR131]
 	mov	x0, x25
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	ldr	x0, [x24, #:lo12:.LANCHOR104]
-	adrp	x6, ftl_ext_info_data_buffer
-	ldrb	w7, [x26, #:lo12:.LANCHOR126]
-	add	x6, x6, :lo12:ftl_ext_info_data_buffer
-	str	wzr, [x27, #:lo12:.LANCHOR184]
+	ldr	x0, [x24, #:lo12:.LANCHOR110]
+	ldrb	w7, [x26, #:lo12:.LANCHOR131]
+	str	wzr, [x27, #:lo12:.LANCHOR193]
 	ldr	w0, [x0, 56]
 	lsl	w1, w7, 9
 	str	w0, [x25, 4]
+	adrp	x0, .LANCHOR200
+	ldr	x6, [x0, #:lo12:.LANCHOR200]
 	mov	x0, x6
 	bl	js_hash
 	mov	x2, x6
@@ -15704,22 +17113,22 @@ ftl_ext_info_flush:
 	mov	x3, x25
 	mov	w0, w28
 	bl	ftl_prog_page
-	ldr	x2, [x24, #:lo12:.LANCHOR104]
+	ldr	x2, [x24, #:lo12:.LANCHOR110]
 	ldrh	w1, [x2, 140]
 	add	w1, w1, 1
 	and	w1, w1, 65535
 	strh	w1, [x2, 140]
 	cmp	w1, 1
-	beq	.L2528
+	beq	.L2773
 	cmn	w0, #1
-	adrp	x0, .LANCHOR189
-	beq	.L2529
-	ldrb	w1, [x0, #:lo12:.LANCHOR189]
-	cbz	w1, .L2530
-.L2529:
-	strb	wzr, [x0, #:lo12:.LANCHOR189]
-	b	.L2525
-.L2530:
+	adrp	x0, .LANCHOR199
+	beq	.L2774
+	ldrb	w1, [x0, #:lo12:.LANCHOR199]
+	cbz	w1, .L2775
+.L2774:
+	strb	wzr, [x0, #:lo12:.LANCHOR199]
+	b	.L2770
+.L2775:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -15735,98 +17144,97 @@ ftl_ext_info_flush:
 	.type	ftl_ext_info_init, %function
 ftl_ext_info_init:
 	stp	x29, x30, [sp, -128]!
-	adrp	x0, .LANCHOR115
-	adrp	x2, .LANCHOR68
+	adrp	x0, .LANCHOR121
+	adrp	x2, .LANCHOR75
 	mov	w4, 4
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR104
-	strh	wzr, [x0, #:lo12:.LANCHOR115]
-	ldr	x0, [x20, #:lo12:.LANCHOR104]
+	adrp	x20, .LANCHOR110
+	strh	wzr, [x0, #:lo12:.LANCHOR121]
+	ldr	x0, [x20, #:lo12:.LANCHOR110]
 	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR200
 	stp	x27, x28, [sp, 80]
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR184
+	adrp	x24, .LANCHOR193
 	ldrh	w1, [x0, 130]
-	adrp	x0, .LANCHOR31
+	adrp	x0, .LANCHOR32
 	stp	x25, x26, [sp, 64]
-	adrp	x24, ftl_ext_info_data_buffer
-	ldrb	w19, [x0, #:lo12:.LANCHOR31]
+	add	x3, x24, :lo12:.LANCHOR193
+	ldrb	w19, [x0, #:lo12:.LANCHOR32]
 	mov	w0, 24
-	add	x3, x23, :lo12:.LANCHOR184
 	sub	w0, w0, w19
-	ldrh	w19, [x2, #:lo12:.LANCHOR68]
-	add	x2, x24, :lo12:ftl_ext_info_data_buffer
+	ldrh	w19, [x2, #:lo12:.LANCHOR75]
+	ldr	x2, [x21, #:lo12:.LANCHOR200]
 	sub	w0, w0, w19
 	mov	w19, 1
 	lsl	w19, w19, w0
 	sub	w19, w19, #1
-	asr	w21, w1, w0
+	asr	w22, w1, w0
 	and	w19, w19, w1
-	and	w27, w21, 255
+	and	w27, w22, 255
 	mov	w1, w19
 	mov	w0, w27
 	bl	flash_get_last_written_page
-	sxth	w22, w0
+	sxth	w23, w0
 	adrp	x0, .LANCHOR14
-	stp	x0, x23, [x29, 112]
+	stp	x0, x24, [x29, 112]
 	ldr	w1, [x0, #:lo12:.LANCHOR14]
-	tbz	x1, 12, .L2541
-	ldr	x0, [x20, #:lo12:.LANCHOR104]
-	adrp	x1, .LANCHOR191
-	and	w4, w21, 65535
-	mov	w3, w22
-	mov	w2, 1971
-	add	x1, x1, :lo12:.LANCHOR191
+	tbz	x1, 12, .L2786
+	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	adrp	x1, .LANCHOR202
+	and	w4, w22, 65535
+	mov	w3, w23
+	mov	w2, 2248
+	add	x1, x1, :lo12:.LANCHOR202
 	ldrh	w5, [x0, 130]
-	adrp	x0, .LC149
-	add	x0, x0, :lo12:.LC149
+	adrp	x0, .LC159
+	add	x0, x0, :lo12:.LC159
 	bl	printf
-.L2541:
-	adrp	x25, .LANCHOR126
-	adrp	x26, .LANCHOR105
+.L2786:
+	adrp	x25, .LANCHOR131
+	adrp	x26, .LANCHOR111
 	mov	w28, 20038
-	add	x25, x25, :lo12:.LANCHOR126
-	add	x26, x26, :lo12:.LANCHOR105
-	mov	w23, 0
+	add	x25, x25, :lo12:.LANCHOR131
+	add	x26, x26, :lo12:.LANCHOR111
+	mov	w24, 0
 	movk	w28, 0x4549, lsl 16
-.L2542:
-	and	w21, w22, 65535
-	sub	w0, w21, w23
-	tbnz	x0, 15, .L2547
+.L2787:
+	and	w22, w23, 65535
+	sub	w0, w22, w24
+	tbnz	x0, 15, .L2792
 	ldr	x0, [x29, 120]
-	sub	w1, w22, w23
+	sub	w1, w23, w24
 	ldrb	w4, [x25]
-	add	x5, x24, :lo12:ftl_ext_info_data_buffer
-	add	x6, x0, :lo12:.LANCHOR184
+	add	x5, x0, :lo12:.LANCHOR193
 	ldrh	w0, [x26]
-	mov	x2, x5
-	mov	x3, x6
-	stp	x6, x5, [x29, 96]
+	ldr	x2, [x21, #:lo12:.LANCHOR200]
+	mov	x3, x5
+	str	x5, [x29, 104]
 	madd	w1, w0, w19, w1
 	mov	w0, w27
 	bl	flash_read_page_en
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2543
+	beq	.L2788
 	adrp	x0, .LANCHOR10
-	ldp	x6, x5, [x29, 96]
+	ldr	x5, [x29, 104]
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x0]
 	cmp	w0, w28
-	bne	.L2543
-	ldr	w6, [x6, 8]
-	cbnz	w6, .L2544
-.L2547:
+	bne	.L2788
+	ldr	w6, [x5, 8]
+	cbnz	w6, .L2789
+.L2792:
 	bl	zftl_sblk_list_init
-	ldr	x0, [x20, #:lo12:.LANCHOR104]
+	ldr	x0, [x20, #:lo12:.LANCHOR110]
 	ldrh	w1, [x0, 140]
-	cmp	w1, w22
-	bgt	.L2546
-	add	w21, w21, 1
-	strh	w21, [x0, 140]
+	cmp	w1, w23
+	bgt	.L2791
+	add	w22, w22, 1
+	strh	w22, [x0, 140]
 	bl	ftl_ext_info_flush
-.L2546:
+.L2791:
 	adrp	x0, .LANCHOR10
 	mov	w1, -1
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
@@ -15843,20 +17251,20 @@ ftl_ext_info_init:
 	str	wzr, [x0, 604]
 	str	wzr, [x0, 608]
 	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 12, .L2549
+	tbz	x1, 12, .L2794
 	ldr	w3, [x0, 12]
-	adrp	x1, .LANCHOR191
-	adrp	x0, .LC151
+	adrp	x1, .LANCHOR202
+	adrp	x0, .LC161
 	mov	w4, 0
 	mov	w2, 0
-	add	x1, x1, :lo12:.LANCHOR191
-	add	x0, x0, :lo12:.LC151
+	add	x1, x1, :lo12:.LANCHOR202
+	add	x0, x0, :lo12:.LC161
 	bl	printf
-.L2549:
-	adrp	x0, .LANCHOR66
+.L2794:
+	adrp	x0, .LANCHOR73
 	mov	w1, -1
 	ldp	x19, x20, [sp, 16]
-	strh	w1, [x0, #:lo12:.LANCHOR66]
+	strh	w1, [x0, #:lo12:.LANCHOR73]
 	ldp	x21, x22, [sp, 32]
 	mov	w0, 0
 	ldp	x23, x24, [sp, 48]
@@ -15864,20 +17272,20 @@ ftl_ext_info_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2544:
+.L2789:
+	ldr	x0, [x21, #:lo12:.LANCHOR200]
 	ldrb	w1, [x25]
-	mov	x0, x5
 	lsl	w1, w1, 9
 	bl	js_hash
 	cmp	w6, w0
-	beq	.L2547
-	adrp	x0, .LC150
+	beq	.L2792
+	adrp	x0, .LC160
 	mov	w1, w6
-	add	x0, x0, :lo12:.LC150
+	add	x0, x0, :lo12:.LC160
 	bl	printf
-.L2543:
-	add	w23, w23, 1
-	b	.L2542
+.L2788:
+	add	w24, w24, 1
+	b	.L2787
 	.size	ftl_ext_info_init, .-ftl_ext_info_init
 	.section	.text.ftl_low_format_data_init,"ax",@progbits
 	.align	2
@@ -15885,67 +17293,67 @@ ftl_ext_info_init:
 	.type	ftl_low_format_data_init, %function
 ftl_low_format_data_init:
 	stp	x29, x30, [sp, -48]!
+	adrp	x0, .LANCHOR200
 	mov	w2, 16384
 	mov	w1, 0
-	adrp	x0, ftl_ext_info_data_buffer
 	add	x29, sp, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR200]
 	stp	x19, x20, [sp, 16]
-	add	x0, x0, :lo12:ftl_ext_info_data_buffer
+	adrp	x19, .LANCHOR110
 	str	x21, [sp, 32]
 	bl	ftl_memset
 	bl	zftl_sblk_list_init
-	adrp	x19, .LANCHOR104
 	mov	w0, 1
 	bl	ftl_alloc_sblk
 	mov	w1, 0
 	mov	w21, w0
 	bl	ftl_erase_sblk
-	ldr	x1, [x19, #:lo12:.LANCHOR104]
+	ldr	x1, [x19, #:lo12:.LANCHOR110]
 	mov	w0, w21
 	add	x1, x1, 672
 	bl	ftl_get_blk_list_in_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR104]
+	ldr	x0, [x19, #:lo12:.LANCHOR110]
 	ldrh	w20, [x0, 672]
 	strh	wzr, [x0, 690]
 	mov	w0, 65533
 	sub	w1, w20, #1
 	cmp	w0, w1, uxth
-	bcs	.L2561
-	adrp	x1, .LANCHOR192
+	bcs	.L2806
+	adrp	x1, .LANCHOR203
 	adrp	x0, .LC0
-	mov	w2, 2172
-	add	x1, x1, :lo12:.LANCHOR192
+	mov	w2, 2476
+	add	x1, x1, :lo12:.LANCHOR203
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2561:
-	ldr	x0, [x19, #:lo12:.LANCHOR104]
+.L2806:
+	ldr	x0, [x19, #:lo12:.LANCHOR110]
 	mov	w2, 256
 	mov	w1, 255
 	add	x0, x0, 416
 	strh	wzr, [x0, 280]
 	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR104]
+	ldr	x0, [x19, #:lo12:.LANCHOR110]
 	mov	w2, 4096
 	mov	w1, 0
 	add	x0, x0, 704
 	bl	ftl_memset
-	adrp	x0, .LANCHOR31
-	ldr	x1, [x19, #:lo12:.LANCHOR104]
-	ldrb	w2, [x0, #:lo12:.LANCHOR31]
+	adrp	x0, .LANCHOR32
+	ldr	x1, [x19, #:lo12:.LANCHOR110]
+	ldrb	w2, [x0, #:lo12:.LANCHOR32]
 	mov	w0, 24
 	sub	w0, w0, w2
-	adrp	x2, .LANCHOR68
+	adrp	x2, .LANCHOR75
 	strh	w21, [x1, 416]
 	adrp	x21, .LANCHOR10
-	ldrh	w2, [x2, #:lo12:.LANCHOR68]
+	ldrh	w2, [x2, #:lo12:.LANCHOR75]
 	strh	w20, [x1, 692]
 	sub	w0, w0, w2
 	asr	w0, w20, w0
 	strh	w0, [x1, 694]
 	mov	w0, 1
 	strh	w0, [x1, 688]
-	adrp	x0, .LANCHOR193
-	ldrh	w0, [x0, #:lo12:.LANCHOR193]
+	adrp	x0, .LANCHOR204
+	ldrh	w0, [x0, #:lo12:.LANCHOR204]
 	strh	w0, [x1, 698]
 	mov	w1, 20038
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
@@ -15955,7 +17363,7 @@ ftl_low_format_data_init:
 	mov	w20, w0
 	mov	w1, 0
 	bl	ftl_erase_phy_blk
-	ldr	x0, [x19, #:lo12:.LANCHOR104]
+	ldr	x0, [x19, #:lo12:.LANCHOR110]
 	mov	w1, 2
 	strh	w20, [x0, 130]
 	mov	w20, -1
@@ -15971,7 +17379,7 @@ ftl_low_format_data_init:
 	mov	w1, 3
 	add	x0, x0, 48
 	bl	ftl_open_sblk_init
-	ldr	x1, [x19, #:lo12:.LANCHOR104]
+	ldr	x1, [x19, #:lo12:.LANCHOR110]
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	add	x0, x0, 136
 	ldrh	w2, [x1, 134]
@@ -16012,13 +17420,13 @@ ftl_low_format_data_init:
 ftl_low_format:
 	stp	x29, x30, [sp, -80]!
 	mov	w1, 0
-	adrp	x0, .LC152
-	add	x0, x0, :lo12:.LC152
+	adrp	x0, .LC162
+	add	x0, x0, :lo12:.LC162
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR194
+	adrp	x20, .LANCHOR205
 	stp	x21, x22, [sp, 32]
-	add	x20, x20, :lo12:.LANCHOR194
+	add	x20, x20, :lo12:.LANCHOR205
 	stp	x25, x26, [sp, 64]
 	adrp	x22, .LANCHOR27
 	mov	x25, x22
@@ -16026,66 +17434,66 @@ ftl_low_format:
 	mov	w19, 8
 	adrp	x23, .LC0
 	bl	printf
-.L2566:
+.L2811:
 	ldr	x0, [x22, #:lo12:.LANCHOR27]
 	add	x0, x0, x19, sxtw
 	ldrb	w21, [x0, 32]
 	add	w0, w21, 127
 	and	w0, w0, 255
 	cmp	w0, 125
-	bhi	.L2564
-	mov	w2, 2226
+	bhi	.L2809
+	mov	w2, 2531
 	mov	x1, x20
 	add	x0, x23, :lo12:.LC0
 	bl	printf
-.L2564:
+.L2809:
 	cmp	w21, 255
-	beq	.L2565
-	adrp	x0, .LANCHOR105
-	ldrh	w1, [x0, #:lo12:.LANCHOR105]
+	beq	.L2810
+	adrp	x0, .LANCHOR111
+	ldrh	w1, [x0, #:lo12:.LANCHOR111]
 	mov	w0, 0
 	mul	w1, w1, w21
 	bl	flash_erase_block
-.L2565:
+.L2810:
 	add	w19, w19, 1
 	cmp	w19, 16
-	bne	.L2566
+	bne	.L2811
 	bl	sblk_init
 	adrp	x22, .LANCHOR7
 	bl	ftl_info_blk_init
 	adrp	x19, .LANCHOR6
+	adrp	x0, .LANCHOR195
 	mov	w2, 16384
 	mov	w1, 0
-	adrp	x0, ftl_info_data_buffer
-	add	x0, x0, :lo12:ftl_info_data_buffer
+	ldr	x0, [x0, #:lo12:.LANCHOR195]
 	bl	ftl_memset
 	ldr	x0, [x22, #:lo12:.LANCHOR7]
 	mov	w3, 1
 	ldrh	w2, [x19, #:lo12:.LANCHOR6]
 	add	x2, x0, x2, lsl 2
-.L2567:
+.L2812:
 	cmp	x0, x2
-	bne	.L2568
-	adrp	x21, .LANCHOR104
+	bne	.L2813
+	adrp	x21, .LANCHOR110
 	mov	w1, 21574
-	adrp	x24, .LANCHOR62
-	add	x24, x24, :lo12:.LANCHOR62
-	ldr	x0, [x21, #:lo12:.LANCHOR104]
+	adrp	x24, .LANCHOR69
+	add	x24, x24, :lo12:.LANCHOR69
+	ldr	x0, [x21, #:lo12:.LANCHOR110]
 	movk	w1, 0x494c, lsl 16
 	mov	w20, 0
 	mov	w26, 1
 	strh	wzr, [x0, 148]
 	str	w1, [x0]
-.L2569:
+.L2814:
 	ldrh	w0, [x19, #:lo12:.LANCHOR6]
-	adrp	x23, .LANCHOR69
+	adrp	x23, .LANCHOR76
 	cmp	w0, w20
-	bhi	.L2578
+	bhi	.L2823
 	ldr	x0, [x25, #:lo12:.LANCHOR27]
 	mov	w4, 3
-	ldrb	w2, [x23, #:lo12:.LANCHOR69]
+	ldrb	w2, [x23, #:lo12:.LANCHOR76]
 	mov	w10, 15
-	ldr	x6, [x21, #:lo12:.LANCHOR104]
+	ldr	x6, [x21, #:lo12:.LANCHOR110]
 	cmp	w2, 1
 	ldr	x1, [x22, #:lo12:.LANCHOR7]
 	ldrb	w0, [x0, 47]
@@ -16099,7 +17507,7 @@ ftl_low_format:
 	add	x0, x0, 4
 	add	w20, w5, 1
 	add	x0, x1, x0
-.L2581:
+.L2826:
 	cmp	w2, 4
 	add	x1, x1, 4
 	csel	w7, w10, w4, eq
@@ -16108,7 +17516,7 @@ ftl_low_format:
 	orr	w7, w7, -32
 	strb	w7, [x1, -2]
 	cmp	x1, x0
-	bne	.L2581
+	bne	.L2826
 	mul	w5, w5, w8
 	mov	w4, 16
 	add	w0, w8, w3
@@ -16120,32 +17528,32 @@ ftl_low_format:
 	add	w4, w20, w4
 	and	w4, w4, 65535
 	strh	w4, [x6, 134]
-	tbz	x0, 12, .L2582
-	adrp	x0, .LC153
+	tbz	x0, 12, .L2827
+	adrp	x0, .LC163
 	mov	w3, w20
 	mov	w2, 128
-	mov	w1, 2273
-	add	x0, x0, :lo12:.LC153
+	mov	w1, 2590
+	add	x0, x0, :lo12:.LC163
 	bl	printf
-.L2582:
-	ldr	x0, [x21, #:lo12:.LANCHOR104]
+.L2827:
+	ldr	x0, [x21, #:lo12:.LANCHOR110]
 	mov	w2, 128
 	mov	w1, 255
 	add	x0, x0, 160
 	bl	ftl_memset
-	adrp	x0, .LANCHOR106
-	ldrb	w10, [x23, #:lo12:.LANCHOR69]
-	adrp	x3, .LANCHOR68
-	ldr	x2, [x21, #:lo12:.LANCHOR104]
-	ldrb	w16, [x0, #:lo12:.LANCHOR106]
-	adrp	x0, .LANCHOR31
+	adrp	x0, .LANCHOR112
+	ldrb	w10, [x23, #:lo12:.LANCHOR76]
+	adrp	x3, .LANCHOR75
+	ldr	x2, [x21, #:lo12:.LANCHOR110]
+	ldrb	w16, [x0, #:lo12:.LANCHOR112]
+	adrp	x0, .LANCHOR32
 	and	w11, w10, 65535
 	ldr	x15, [x22, #:lo12:.LANCHOR7]
-	ldrb	w4, [x0, #:lo12:.LANCHOR31]
+	ldrb	w4, [x0, #:lo12:.LANCHOR32]
 	mov	w0, 24
 	ldrh	w8, [x2, 134]
 	sub	w0, w0, w4
-	ldrh	w4, [x3, #:lo12:.LANCHOR68]
+	ldrh	w4, [x3, #:lo12:.LANCHOR75]
 	mul	w1, w20, w11
 	mov	w3, 0
 	sub	w0, w0, w4
@@ -16153,9 +17561,9 @@ ftl_low_format:
 	and	w1, w1, 65535
 	lsl	w4, w4, w0
 	and	w4, w4, 65535
-.L2583:
+.L2828:
 	cmp	w20, w8
-	bcc	.L2589
+	bcc	.L2834
 	ldrh	w0, [x19, #:lo12:.LANCHOR6]
 	strh	w3, [x2, 112]
 	sub	w0, w0, w8
@@ -16171,41 +17579,41 @@ ftl_low_format:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2568:
+.L2813:
 	ldrb	w1, [x0, 2]
 	add	x0, x0, 4
 	and	w1, w1, 31
 	bfi	w1, w3, 3, 2
 	strb	w1, [x0, -2]
-	b	.L2567
-.L2578:
-	adrp	x0, .LANCHOR75
+	b	.L2812
+.L2823:
+	adrp	x0, .LANCHOR82
 	strh	w20, [x24]
-	ldrb	w0, [x0, #:lo12:.LANCHOR75]
-	cbnz	w0, .L2570
+	ldrb	w0, [x0, #:lo12:.LANCHOR82]
+	cbnz	w0, .L2815
 	mov	w0, w20
 	bl	ftl_test_block
-.L2570:
-	ldrb	w11, [x23, #:lo12:.LANCHOR69]
-	adrp	x0, .LANCHOR106
+.L2815:
+	ldrb	w11, [x23, #:lo12:.LANCHOR76]
+	adrp	x0, .LANCHOR112
 	ldr	x6, [x22, #:lo12:.LANCHOR7]
 	mov	w7, 0
-	ldrb	w14, [x0, #:lo12:.LANCHOR106]
+	ldrb	w14, [x0, #:lo12:.LANCHOR112]
 	mov	w10, 0
-	ldr	x13, [x21, #:lo12:.LANCHOR104]
+	ldr	x13, [x21, #:lo12:.LANCHOR110]
 	mov	w8, 0
 	mul	w12, w20, w11
 	add	x6, x6, x20, uxth 2
-.L2571:
+.L2816:
 	cmp	w8, w14
-	bcs	.L2575
+	bcs	.L2820
 	add	w15, w11, w7
-	b	.L2576
-.L2574:
+	b	.L2821
+.L2819:
 	add	w1, w7, w12
 	mov	w0, w8
 	bl	flash_check_bad_block
-	cbz	w0, .L2572
+	cbz	w0, .L2817
 	ldrb	w1, [x6, 3]
 	lsl	w0, w26, w7
 	orr	w0, w0, w1
@@ -16213,29 +17621,29 @@ ftl_low_format:
 	ldrh	w0, [x13, 148]
 	add	w0, w0, 1
 	strh	w0, [x13, 148]
-.L2573:
+.L2818:
 	add	w7, w7, 1
-.L2576:
+.L2821:
 	cmp	w7, w15
-	bne	.L2574
+	bne	.L2819
 	add	w8, w8, 1
 	sub	w12, w12, w11
 	and	w8, w8, 65535
-	b	.L2571
-.L2572:
+	b	.L2816
+.L2817:
 	add	w10, w10, 1
 	and	w10, w10, 65535
-	b	.L2573
-.L2575:
-	cbnz	w10, .L2577
+	b	.L2818
+.L2820:
+	cbnz	w10, .L2822
 	ldrb	w0, [x6, 2]
 	orr	w0, w0, -32
 	strb	w0, [x6, 2]
-.L2577:
+.L2822:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2569
-.L2589:
+	b	.L2814
+.L2834:
 	add	x13, x15, x20, uxth 2
 	mov	w6, 0
 	mov	w12, 0
@@ -16243,48 +17651,48 @@ ftl_low_format:
 	ldrb	w0, [x13, 2]
 	orr	w0, w0, -32
 	strb	w0, [x13, 2]
-.L2584:
+.L2829:
 	cmp	w5, w16
-	bcc	.L2591
+	bcc	.L2836
 	add	w20, w20, 1
 	add	w1, w1, w11
 	and	w20, w20, 65535
 	and	w1, w1, 65535
-	b	.L2583
-.L2587:
+	b	.L2828
+.L2832:
 	ldrb	w14, [x13, 3]
 	add	w17, w12, w7
 	asr	w14, w14, w17
-	tbnz	x14, 0, .L2585
+	tbnz	x14, 0, .L2830
 	cmp	w10, 1
-	bls	.L2590
+	bls	.L2835
 	and	w0, w0, 1
 	add	w0, w1, w0
 	and	w0, w0, 65535
-.L2586:
+.L2831:
 	add	x14, x2, x3, sxtw 1
 	add	w3, w3, 1
 	and	w3, w3, 65535
 	add	w0, w0, w6
 	strh	w0, [x14, 160]
-.L2585:
+.L2830:
 	add	x7, x7, 1
-.L2588:
+.L2833:
 	and	w0, w7, 65535
 	cmp	w0, w11
-	bcc	.L2587
+	bcc	.L2832
 	add	w5, w5, 1
 	add	w6, w4, w6
 	and	w5, w5, 65535
 	add	w12, w12, w10
 	and	w6, w6, 65535
-	b	.L2584
-.L2590:
+	b	.L2829
+.L2835:
 	mov	w0, w1
-	b	.L2586
-.L2591:
+	b	.L2831
+.L2836:
 	mov	x7, 0
-	b	.L2588
+	b	.L2833
 	.size	ftl_low_format, .-ftl_low_format
 	.section	.text.ftl_re_low_format,"ax",@progbits
 	.align	2
@@ -16293,27 +17701,27 @@ ftl_low_format:
 ftl_re_low_format:
 	stp	x29, x30, [sp, -16]!
 	mov	w1, 1
-	adrp	x0, .LC154
-	add	x0, x0, :lo12:.LC154
+	adrp	x0, .LC164
+	add	x0, x0, :lo12:.LC164
 	add	x29, sp, 0
 	bl	printf
 	bl	sblk_init
 	bl	ftl_info_blk_init
 	bl	ftl_ext_info_init
-	adrp	x0, .LANCHOR104
+	adrp	x0, .LANCHOR110
 	adrp	x2, .LANCHOR6
 	mov	w3, 0
 	mov	w4, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR104]
+	ldr	x0, [x0, #:lo12:.LANCHOR110]
 	mov	w5, 0
 	ldrh	w7, [x2, #:lo12:.LANCHOR6]
 	adrp	x2, .LANCHOR7
 	ldr	x2, [x2, #:lo12:.LANCHOR7]
 	ldrh	w1, [x0, 134]
 	add	x2, x2, x1, uxth 2
-.L2602:
+.L2847:
 	cmp	w1, w7
-	bcc	.L2606
+	bcc	.L2851
 	strh	w5, [x0, 114]
 	strh	w4, [x0, 118]
 	strh	w3, [x0, 116]
@@ -16324,38 +17732,38 @@ ftl_re_low_format:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L2606:
+.L2851:
 	ldrb	w6, [x2, 2]
 	and	w8, w6, 31
 	strb	w8, [x2, 2]
 	ands	w6, w6, 24
-	bne	.L2603
+	bne	.L2848
 	add	w5, w5, 1
 	and	w5, w5, 65535
-.L2604:
+.L2849:
 	add	w1, w1, 1
 	add	x2, x2, 4
 	and	w1, w1, 65535
-	b	.L2602
-.L2603:
+	b	.L2847
+.L2848:
 	cmp	w6, 16
-	bne	.L2605
+	bne	.L2850
 	add	w4, w4, 1
 	and	w4, w4, 65535
-	b	.L2604
-.L2605:
+	b	.L2849
+.L2850:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L2604
+	b	.L2849
 	.size	ftl_re_low_format, .-ftl_re_low_format
 	.section	.text.ftl_prog_ppa_page,"ax",@progbits
 	.align	2
 	.global	ftl_prog_ppa_page
 	.type	ftl_prog_ppa_page, %function
 ftl_prog_ppa_page:
-	adrp	x4, .LANCHOR31
+	adrp	x4, .LANCHOR32
 	mov	w5, 1
-	ldrb	w6, [x4, #:lo12:.LANCHOR31]
+	ldrb	w6, [x4, #:lo12:.LANCHOR32]
 	mov	w4, 24
 	sub	w4, w4, w6
 	lsl	w7, w5, w4
@@ -16377,1396 +17785,841 @@ ftl_prog_ppa_page:
 ftl_write_last_log_page:
 	ldrh	w1, [x0, 6]
 	cmp	w1, 1
-	bne	.L2611
+	bne	.L2856
 	stp	x29, x30, [sp, -48]!
-	adrp	x1, .LANCHOR111
+	adrp	x1, .LANCHOR117
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
 	stp	x21, x22, [sp, 32]
-	ldr	x20, [x1, #:lo12:.LANCHOR111]
+	ldr	x20, [x1, #:lo12:.LANCHOR117]
 	ldrh	w22, [x0, 12]
 	bl	ftl_get_new_free_page
 	mov	w21, w0
 	cmn	w0, #1
-	beq	.L2612
+	beq	.L2857
 	ldrh	w0, [x19]
 	add	x20, x20, x22, uxth 2
 	bl	ftl_vpn_decrement
-	adrp	x0, .LANCHOR182
+	adrp	x0, .LANCHOR191
 	mov	w1, 15555
-	add	x6, x0, :lo12:.LANCHOR182
+	add	x7, x0, :lo12:.LANCHOR191
 	movk	w1, 0xf55f, lsl 16
-	str	w1, [x0, #:lo12:.LANCHOR182]
-	adrp	x0, .LANCHOR87
-	ldrh	w1, [x0, #:lo12:.LANCHOR87]
+	str	w1, [x0, #:lo12:.LANCHOR191]
+	adrp	x0, .LANCHOR95
+	ldrh	w1, [x0, #:lo12:.LANCHOR95]
 	adrp	x0, .LANCHOR80
 	ldrb	w0, [x0, #:lo12:.LANCHOR80]
 	mul	w1, w1, w0
 	mov	x0, x20
 	lsl	w1, w1, 2
 	bl	js_hash
-	stp	w0, wzr, [x6, 4]
-	adrp	x0, .LANCHOR126
-	mov	x2, x6
+	mov	x1, x7
+	mov	x2, 0
+	stp	w0, wzr, [x7, 4]
+	mov	w0, 2
+	str	wzr, [x7, 12]
+	str	wzr, [x1, 16]!
+	bl	ftl_debug_info_fill
+	mov	x2, x7
+	adrp	x0, .LANCHOR131
 	mov	x1, x20
-	ldrb	w3, [x0, #:lo12:.LANCHOR126]
+	ldrb	w3, [x0, #:lo12:.LANCHOR131]
 	mov	w0, w21
-	str	wzr, [x6, 12]
 	bl	ftl_prog_ppa_page
-.L2612:
+.L2857:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L2611:
+.L2856:
 	mov	w0, -1
 	ret
 	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
-	.section	.text.ftl_open_sblk_recovery,"ax",@progbits
+	.section	.text.pm_write_page,"ax",@progbits
 	.align	2
-	.global	ftl_open_sblk_recovery
-	.type	ftl_open_sblk_recovery, %function
-ftl_open_sblk_recovery:
-	stp	x29, x30, [sp, -368]!
+	.global	pm_write_page
+	.type	pm_write_page, %function
+pm_write_page:
+	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR14
 	stp	x19, x20, [sp, 16]
-	mov	x19, x0
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	mov	w19, w0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR95
 	stp	x23, x24, [sp, 48]
+	adrp	x22, .LANCHOR111
+	adrp	x24, .LANCHOR110
+	mov	x23, x1
+	add	x21, x21, :lo12:.LANCHOR95
+	mov	x20, x24
+	add	x22, x22, :lo12:.LANCHOR111
 	stp	x25, x26, [sp, 64]
-	stp	x27, x28, [sp, 80]
-	str	x1, [x29, 144]
-	tbz	x0, 12, .L2618
-	ldrh	w1, [x19, 2]
-	adrp	x0, .LC155
-	add	x0, x0, :lo12:.LC155
-	bl	printf
-.L2618:
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2619
-	ldrb	w1, [x19, 5]
-	adrp	x0, .LC156
-	add	x0, x0, :lo12:.LC156
-	bl	printf
-.L2619:
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2620
-	ldrh	w1, [x19]
-	adrp	x0, .LC157
-	add	x0, x0, :lo12:.LC157
-	bl	printf
-.L2620:
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2621
-	ldrh	w2, [x19, 18]
-	adrp	x0, .LC158
-	ldrh	w1, [x19, 16]
-	add	x0, x0, :lo12:.LC158
-	bl	printf
-.L2621:
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2622
-	ldrb	w1, [x19, 9]
-	adrp	x0, .LC159
-	add	x0, x0, :lo12:.LC159
-	bl	printf
-.L2622:
-	ldrh	w0, [x19, 10]
-	strh	w0, [x19, 14]
-	adrp	x0, .LANCHOR6
-	ldrh	w1, [x19]
-	ldrh	w0, [x0, #:lo12:.LANCHOR6]
-	cmp	w1, w0
-	bcs	.L2617
-	mov	w0, 1
-	add	x23, x29, 176
-	bl	buf_alloc
-	add	x26, x29, 240
-	mov	w2, 64
-	mov	w1, 255
-	mov	x20, x0
-	mov	x0, x23
-	bl	ftl_memset
-	add	x27, x29, 304
-	mov	w2, 64
-	mov	w1, 255
-	mov	x0, x26
-	bl	ftl_memset
-	mov	w2, 64
-	mov	w1, 255
-	mov	x0, x27
-	bl	ftl_memset
-	ldrb	w22, [x19, 5]
-	mov	w0, 2
-	ldrh	w24, [x19, 2]
-	adrp	x25, .LANCHOR87
-	str	w0, [x29, 168]
-	adrp	x0, .LANCHOR126
-	str	wzr, [x29, 160]
-	add	x0, x0, :lo12:.LANCHOR126
-	str	x0, [x29, 128]
-.L2624:
-	ldrh	w0, [x25, #:lo12:.LANCHOR87]
-	cmp	w0, w24
-	bhi	.L2637
-.L2627:
-	ldrh	w0, [x19, 10]
-	ldrh	w1, [x19, 6]
-	ldrh	w2, [x25, #:lo12:.LANCHOR87]
-	add	w1, w1, w0
-	ldrb	w0, [x19, 9]
-	strh	w24, [x19, 2]
-	strb	w22, [x19, 5]
-	mul	w0, w0, w2
-	cmp	w1, w0
-	beq	.L2638
-	adrp	x1, .LANCHOR195
+	str	x27, [sp, 80]
+	mov	w25, 65535
+.L2863:
+	ldr	x0, [x24, #:lo12:.LANCHOR110]
+	ldr	w1, [x0, 48]
+	ldrh	w2, [x0, 696]
+	add	w1, w1, 1
+	str	w1, [x0, 48]
+	ldrh	w1, [x21]
+	cmp	w2, w1
+	bcs	.L2864
+	ldrh	w0, [x0, 692]
+	cmp	w0, w25
+	bne	.L2865
+.L2864:
+	bl	pm_alloc_new_blk
+	mov	w0, 0
+	bl	ftl_info_flush
+.L2865:
+	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	ldrh	w0, [x0, 692]
+	cmp	w0, w25
+	bne	.L2866
+	adrp	x1, .LANCHOR206
 	adrp	x0, .LC0
-	mov	w2, 1579
-	add	x1, x1, :lo12:.LANCHOR195
+	mov	w2, 303
+	add	x1, x1, :lo12:.LANCHOR206
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2638:
-	adrp	x2, .LANCHOR111
-	ldrh	w3, [x19, 10]
-	mov	w0, 0
+.L2866:
+	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	adrp	x27, .LANCHOR207
+	ldrh	w1, [x22]
+	mov	w2, 64
+	ldrh	w26, [x0, 692]
+	ldrh	w0, [x0, 696]
+	madd	w26, w26, w1, w0
+	ldr	x0, [x27, #:lo12:.LANCHOR207]
 	mov	w1, 0
-	ldr	x4, [x2, #:lo12:.LANCHOR111]
-	str	x2, [x29, 136]
-.L2639:
-	cmp	w1, w3
-	bcc	.L2641
-	ldrb	w22, [x19, 9]
-	adrp	x24, .LANCHOR9
-	ldrh	w1, [x25, #:lo12:.LANCHOR87]
-	madd	w22, w22, w1, w0
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	sub	w22, w22, w3
-	and	w22, w22, 65535
-	tbz	x0, 12, .L2642
-	ldrh	w1, [x19]
-	ldr	x2, [x24, #:lo12:.LANCHOR9]
-	ubfiz	x0, x1, 1, 16
-	ldrh	w3, [x2, x0]
-	adrp	x0, .LC160
-	mov	w2, w22
-	add	x0, x0, :lo12:.LC160
-	bl	printf
-.L2642:
-	ldr	x0, [x24, #:lo12:.LANCHOR9]
-	ldrh	w1, [x19]
-	strh	w22, [x0, x1, lsl 1]
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 14, .L2643
-	ldp	w1, w2, [x29, 176]
-	adrp	x0, .LC161
-	ldp	w3, w4, [x29, 184]
-	add	x0, x0, :lo12:.LC161
-	bl	printf
-.L2643:
-	adrp	x24, .LANCHOR126
-	ldr	x0, [x20, 8]
-	mov	w1, 0
-	mov	x28, 0
-	ldrb	w2, [x24, #:lo12:.LANCHOR126]
-	lsl	w2, w2, 9
 	bl	ftl_memset
-	adrp	x0, .LC163
-	add	x0, x0, :lo12:.LC163
-	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR80
-	add	x0, x0, :lo12:.LANCHOR80
-	str	x0, [x29, 112]
-.L2644:
-	adrp	x0, .LANCHOR80
-	ldr	w2, [x29, 168]
-	add	x1, x0, :lo12:.LANCHOR80
-	str	w28, [x29, 152]
-	ldrb	w0, [x0, #:lo12:.LANCHOR80]
-	mul	w0, w0, w2
-	cmp	w28, w0
-	bcc	.L2656
-	adrp	x0, .LC164
-	add	x0, x0, :lo12:.LC164
-	stp	x0, x1, [x29, 152]
-	adrp	x0, .LC163
-	add	x28, x0, :lo12:.LC163
-	mov	x22, 0
-.L2657:
-	ldr	x0, [x29, 160]
-	ldr	w1, [x29, 168]
-	ldrb	w0, [x0]
-	mul	w0, w0, w1
-	cmp	w0, w22
-	bhi	.L2663
-	mov	x0, x20
-	bl	zbuf_free
-	ldrh	w1, [x19, 12]
-	ldrh	w0, [x25, #:lo12:.LANCHOR87]
-	ldrb	w2, [x19, 9]
-	madd	w0, w0, w2, w1
-	mov	x1, -4
-	add	x0, x1, x0, sxtw 2
-	ldr	x1, [x29, 136]
-	ldr	x1, [x1, #:lo12:.LANCHOR111]
-	ldr	w0, [x1, x0]
+	ldr	x6, [x27, #:lo12:.LANCHOR207]
+	ldr	x7, [x20, #:lo12:.LANCHOR110]
+	str	w19, [x6]
+	ldr	w0, [x7, 48]
+	str	w0, [x6, 4]
+	adrp	x0, .LANCHOR131
+	ldrb	w8, [x0, #:lo12:.LANCHOR131]
+	mov	x0, x23
+	lsl	w1, w8, 9
+	bl	js_hash
+	str	w0, [x6, 8]
+	ldrb	w0, [x7, 694]
+	mov	x2, x23
+	mov	w1, w26
+	mov	w4, w8
+	mov	x3, x6
+	bl	ftl_prog_page
+	ldr	x2, [x20, #:lo12:.LANCHOR110]
+	ldrh	w1, [x2, 696]
+	add	w1, w1, 1
+	and	w1, w1, 65535
+	strh	w1, [x2, 696]
+	cmp	w1, 1
+	adrp	x1, .LANCHOR208
+	beq	.L2867
+	ldrb	w3, [x1, #:lo12:.LANCHOR208]
+	cbz	w3, .L2868
+.L2867:
+	strb	wzr, [x1, #:lo12:.LANCHOR208]
+	b	.L2863
+.L2868:
 	cmn	w0, #1
-	beq	.L2664
-	adrp	x1, .LANCHOR195
-	adrp	x0, .LC0
-	mov	w2, 1670
-	add	x1, x1, :lo12:.LANCHOR195
-	add	x0, x0, :lo12:.LC0
+	bne	.L2870
+	mov	w1, w26
+	adrp	x0, .LC165
+	add	x0, x0, :lo12:.LC165
 	bl	printf
-.L2664:
-	ldrh	w0, [x19, 6]
-	cmp	w0, 1
-	bne	.L2617
-	mov	x0, x19
-	bl	ftl_write_last_log_page
-.L2617:
+	b	.L2863
+.L2870:
+	ldrh	w0, [x2, 698]
+	cmp	w19, w0
+	bcs	.L2871
+	add	x19, x2, x19, uxtw 2
+	str	w26, [x19, 704]
+.L2871:
+	mov	w0, 0
+	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 368
+	ldp	x29, x30, [sp], 96
 	ret
-.L2637:
-	ldrb	w22, [x19, 5]
-	adrp	x0, .LANCHOR105
-	add	x0, x0, :lo12:.LANCHOR105
-	str	x0, [x29, 136]
-.L2625:
-	ldrb	w0, [x19, 9]
-	cmp	w0, w22
-	bhi	.L2636
-	add	w24, w24, 1
-	strb	wzr, [x19, 5]
-	and	w24, w24, 65535
-	b	.L2624
-.L2636:
-	add	x0, x19, x22, sxtw 1
-	mov	w1, 65535
-	ldrh	w0, [x0, 16]
-	cmp	w0, w1
-	beq	.L2626
-	ldr	x1, [x29, 136]
-	ldr	x2, [x20, 24]
-	ldrh	w1, [x1]
-	madd	w0, w1, w0, w24
-	ldr	x1, [x20, 8]
-	str	w0, [x29, 152]
-	adrp	x0, .LANCHOR126
-	ldrb	w3, [x0, #:lo12:.LANCHOR126]
-	ldr	w0, [x29, 152]
-	bl	ftl_read_ppa_page
-	mov	w28, w0
-	cmp	w0, 512
-	beq	.L2627
-	cmn	w0, #1
-	beq	.L2628
-	ldr	x0, [x20, 24]
-	ldr	w1, [x0]
-	cmn	w1, #1
-	bne	.L2628
-	ldr	w0, [x0, 4]
-	cmn	w0, #1
-	bne	.L2628
-	ldr	x0, [x20, 8]
-	ldr	w0, [x0]
-	cmn	w0, #1
-	beq	.L2627
-.L2628:
-	adrp	x0, .LANCHOR188
-	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR188]
-	ldrb	w0, [x19, 9]
-	ldrh	w1, [x19, 10]
-	madd	w0, w0, w24, w22
-	cmp	w1, w0
-	beq	.L2629
-	adrp	x1, .LANCHOR195
-	adrp	x0, .LC0
-	mov	w2, 1498
-	add	x1, x1, :lo12:.LANCHOR195
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2629:
-	ldrh	w0, [x19, 10]
-	ldrh	w1, [x19, 6]
-	ldrb	w2, [x19, 9]
-	add	w1, w1, w0
-	ldrh	w0, [x25, #:lo12:.LANCHOR87]
-	mul	w0, w0, w2
-	cmp	w1, w0
-	beq	.L2630
-	adrp	x1, .LANCHOR195
-	adrp	x0, .LC0
-	mov	w2, 1499
-	add	x1, x1, :lo12:.LANCHOR195
-	add	x0, x0, :lo12:.LC0
+	.size	pm_write_page, .-pm_write_page
+	.section	.text.ftl_dump_write_open_sblk,"ax",@progbits
+	.align	2
+	.global	ftl_dump_write_open_sblk
+	.type	ftl_dump_write_open_sblk, %function
+ftl_dump_write_open_sblk:
+	sub	sp, sp, #224
+	stp	x29, x30, [sp, 48]
+	add	x29, sp, 48
+	stp	x19, x20, [sp, 64]
+	and	w20, w0, 65535
+	adrp	x0, .LANCHOR6
+	stp	x21, x22, [sp, 80]
+	stp	x23, x24, [sp, 96]
+	ldrh	w0, [x0, #:lo12:.LANCHOR6]
+	stp	x25, x26, [sp, 112]
+	stp	x27, x28, [sp, 128]
+	cmp	w0, w20
+	bls	.L2876
+	adrp	x0, .LANCHOR84
+	str	x0, [x29, 120]
+	ldrb	w1, [x0, #:lo12:.LANCHOR84]
+	cbnz	w1, .L2878
+	adrp	x0, .LANCHOR81
+	ldrb	w0, [x0, #:lo12:.LANCHOR81]
+	cbz	w0, .L2876
+.L2878:
+	adrp	x0, .LANCHOR36
+	ldrb	w0, [x0, #:lo12:.LANCHOR36]
+	cbnz	w0, .L2876
+	adrp	x0, .LANCHOR7
+	ubfiz	x14, x20, 2, 16
+	mov	x15, x0
+	ldr	x1, [x0, #:lo12:.LANCHOR7]
+	add	x1, x1, x14
+	ldrb	w1, [x1, 2]
+	and	w1, w1, 224
+	cmp	w1, 160
+	bne	.L2900
+	adrp	x0, .LANCHOR79
+	ldrb	w25, [x0, #:lo12:.LANCHOR79]
+.L2879:
+	add	x21, x29, 176
+	adrp	x23, .LANCHOR95
+	mov	w0, w20
+	adrp	x26, .LANCHOR111
+	add	x26, x26, :lo12:.LANCHOR111
+	mov	w27, 0
+	strh	w20, [x21, -32]!
+	mov	w28, 0
+	add	x1, x21, 16
+	bl	ftl_get_blk_list_in_sblk
+	ldrh	w1, [x23, #:lo12:.LANCHOR95]
+	and	w0, w0, 255
+	strb	w0, [x29, 153]
+	strb	wzr, [x29, 149]
+	strh	wzr, [x29, 146]
+	mul	w0, w0, w1
+	strh	wzr, [x29, 154]
+	strh	w0, [x29, 150]
+	ldr	x0, [x15, #:lo12:.LANCHOR7]
+	add	x1, x0, x14
+	ldr	w5, [x0, x14]
+	ldrb	w2, [x1, 2]
+	mov	w1, w20
+	ldrh	w4, [x0, x14]
+	adrp	x0, .LC166
+	ubfx	x5, x5, 11, 8
+	add	x0, x0, :lo12:.LC166
+	ubfx	x3, x2, 3, 2
+	and	w4, w4, 2047
+	ubfx	x2, x2, 5, 3
 	bl	printf
-.L2630:
-	cmn	w28, #1
-	beq	.L2632
-	ldr	x0, [x20, 24]
-	ldr	w0, [x0, 4]
-	cmn	w0, #1
-	beq	.L2632
-	bl	lpa_hash_get_ppa
-	ldr	x1, [x29, 144]
-	cbz	x1, .L2634
-	ldr	x3, [x20, 24]
-	ldr	w1, [x3, 8]
-	cmp	w0, w1
-	beq	.L2634
-	cmn	w0, #1
-	beq	.L2634
-	adrp	x5, .LANCHOR31
-	adrp	x6, .LANCHOR68
-	mov	w4, 24
-	mov	w28, 1
-	ldrb	w1, [x5, #:lo12:.LANCHOR31]
-	ldrh	w7, [x6, #:lo12:.LANCHOR68]
-	sub	w1, w4, w1
-	sub	w1, w1, w7
-	lsr	w2, w0, w7
-	adrp	x7, .LANCHOR69
-	lsl	w1, w28, w1
-	sub	w1, w1, #1
-	and	w1, w1, w2
-	ldrb	w2, [x7, #:lo12:.LANCHOR69]
-	udiv	w1, w1, w2
-	ldr	x2, [x29, 144]
-	ldrh	w2, [x2]
-	cmp	w2, w1, uxth
-	bne	.L2634
-	ldr	x1, [x29, 128]
-	adrp	x8, .LANCHOR184
-	ldr	w10, [x3]
-	add	x2, x8, :lo12:.LANCHOR184
-	str	w10, [x29, 160]
-	str	x8, [x29, 168]
-	ldrb	w3, [x1]
-	ldr	x1, [x20, 8]
-	str	x7, [x29, 96]
-	str	w4, [x29, 108]
-	stp	x5, x6, [x29, 112]
-	bl	ftl_read_ppa_page
-	ldr	x8, [x29, 168]
-	ldr	w10, [x29, 160]
-	ldr	w0, [x8, #:lo12:.LANCHOR184]
-	cmp	w10, w0
-	bhi	.L2634
-	ldr	x0, [x20, 24]
-	ldr	w3, [x0, 8]
-	cmn	w3, #1
-	beq	.L2632
-	ldp	x5, x6, [x29, 112]
-	ldr	w4, [x29, 108]
-	ldr	x7, [x29, 96]
-	ldrb	w2, [x5, #:lo12:.LANCHOR31]
-	ldrh	w1, [x6, #:lo12:.LANCHOR68]
-	sub	w4, w4, w2
-	sub	w4, w4, w1
-	lsr	w0, w3, w1
-	lsl	w28, w28, w4
-	sub	w28, w28, #1
-	and	w28, w28, w0
-	ldrb	w0, [x7, #:lo12:.LANCHOR69]
-	udiv	w0, w28, w0
-	bl	ftl_vpn_decrement
-.L2632:
-	ldrh	w0, [x19, 6]
-	sub	w0, w0, #1
-	strh	w0, [x19, 6]
-	ldrh	w0, [x19, 10]
-	add	w0, w0, 1
-	strh	w0, [x19, 10]
-	mov	w0, 4
-	str	w0, [x29, 168]
 	mov	w0, 1
-	str	w0, [x29, 160]
-.L2626:
-	add	w22, w22, 1
-	and	w22, w22, 65535
-	b	.L2625
-.L2641:
-	ldrh	w2, [x19, 12]
-	add	w2, w2, w1
-	ldr	w2, [x4, x2, lsl 2]
-	cmn	w2, #1
-	beq	.L2640
-	add	w22, w0, 1
-	and	w0, w22, 65535
-.L2640:
-	add	w1, w1, 1
-	b	.L2639
-.L2656:
-	ldr	w0, [x23, x28, lsl 2]
-	cmn	w0, #1
-	bne	.L2645
-.L2649:
-	adrp	x1, .LANCHOR104
-	ldr	x0, [x20, 24]
-	mov	w22, -1
-	ldr	x1, [x1, #:lo12:.LANCHOR104]
-	ldr	w1, [x1, 8]
-	stp	w1, w22, [x0]
-	stp	w22, wzr, [x0, 8]
-	ldr	x0, [x20, 8]
-	str	wzr, [x0]
-.L2646:
-	ldr	w0, [x29, 160]
-	cbz	w0, .L2651
-	ldrh	w0, [x19, 6]
-	cmp	w0, 1
-	bls	.L2651
-	add	x0, x21, :lo12:.LANCHOR14
-	str	x0, [x29, 144]
-	add	x0, x24, :lo12:.LANCHOR126
+	bl	buf_alloc
+	mov	x19, x0
+	mov	w10, 0
+	add	x0, x23, :lo12:.LANCHOR95
 	str	x0, [x29, 128]
-.L2712:
-	mov	x0, x19
-	bl	ftl_get_new_free_page
-	mov	w5, w0
-	ldr	x0, [x29, 144]
-	ldr	w0, [x0]
-	tbz	x0, 14, .L2653
-	ldrh	w0, [x19, 12]
-	mov	w1, w5
-	ldrh	w3, [x19, 10]
-	str	w5, [x29, 108]
-	add	w3, w3, w0
-	ldr	x0, [x20, 24]
-	sub	w3, w3, #1
-	ldr	w2, [x0, 4]
-	ldr	x0, [x29, 120]
-	bl	printf
-	ldr	w5, [x29, 108]
-.L2653:
-	ldr	x0, [x29, 112]
-	ldr	w2, [x29, 168]
-	ldrh	w1, [x19, 6]
-	ldrb	w0, [x0]
-	mul	w0, w0, w2
-	ldr	w2, [x29, 152]
-	add	w0, w0, 1
-	sub	w0, w0, w2
-	cmp	w1, w0
-	bls	.L2651
+.L2880:
 	ldr	x0, [x29, 128]
-	ldr	x1, [x20, 8]
-	ldr	x2, [x20, 24]
-	str	w5, [x29, 96]
-	ldrb	w3, [x0]
-	mov	w0, w5
-	bl	ftl_prog_ppa_page
-	mov	w1, w0
-	ldrh	w0, [x19]
-	str	w1, [x29, 108]
-	bl	ftl_vpn_decrement
-	ldr	w1, [x29, 108]
-	cmn	w22, #1
-	ldr	w5, [x29, 96]
-	ccmn	w1, #1, 4, ne
-	beq	.L2654
-	ldrh	w0, [x19, 10]
-	ldrh	w1, [x19, 12]
-	str	w5, [x26, x28, lsl 2]
-	add	w0, w0, w1
-	sub	w0, w0, #1
-	str	w0, [x27, x28, lsl 2]
-.L2651:
-	add	x28, x28, 1
-	b	.L2644
-.L2645:
-	ldrb	w3, [x24, #:lo12:.LANCHOR126]
-	ldr	x1, [x20, 8]
-	ldr	x2, [x20, 24]
-	bl	ftl_read_ppa_page
-	mov	w22, w0
-	ldr	x0, [x20, 24]
-	ldr	w0, [x0, 4]
-	bl	lpa_hash_get_ppa
-	mov	w5, w0
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 14, .L2647
-	ldr	x0, [x20, 24]
-	mov	w1, w5
-	ldr	w2, [x23, x28, lsl 2]
-	str	w5, [x29, 144]
-	ldr	w3, [x0, 4]
-	adrp	x0, .LC162
-	add	x0, x0, :lo12:.LC162
-	bl	printf
-	ldr	w5, [x29, 144]
-.L2647:
-	ldr	w0, [x23, x28, lsl 2]
+	ldrh	w0, [x0]
+	cmp	w0, w27
+	bls	.L2888
+	lsl	w22, w27, 1
+	mov	w28, 0
+	sub	w0, w22, #1
+	add	w22, w22, w27
+	str	w0, [x29, 140]
+	sub	w22, w22, #1
+	adrp	x0, .LC167
+	add	x0, x0, :lo12:.LC167
+	str	x0, [x29, 112]
+	b	.L2891
+.L2900:
+	mov	w25, 1
+	b	.L2879
+.L2889:
+	ldrh	w12, [x21, x24]
+	mov	w0, 65535
+	cmp	w12, w0
+	bne	.L2881
+.L2887:
+	add	w10, w10, 1
+	and	w10, w10, 65535
+.L2882:
+	cmp	w25, w10
+	bcs	.L2889
+	add	w11, w28, 1
+	and	w28, w11, 65535
+.L2891:
+	ldrb	w0, [x29, 153]
+	cmp	w0, w28
+	bls	.L2890
+	sxtw	x24, w28
+	mov	w10, 1
+	add	x24, x24, 8
+	lsl	x24, x24, 1
+	b	.L2882
+.L2881:
+	ldrh	w3, [x26]
+	cmp	w25, 3
+	mul	w3, w3, w12
+	add	w0, w3, w10
+	bne	.L2883
+	adrp	x1, .LANCHOR37
+	ldrb	w1, [x1, #:lo12:.LANCHOR37]
+	cbz	w1, .L2884
+	adrp	x1, .LANCHOR79
+	add	w0, w0, w22
+	ldrb	w3, [x1, #:lo12:.LANCHOR79]
+.L2914:
+	orr	w3, w0, w3, lsl 24
+	b	.L2885
+.L2884:
+	add	w3, w27, w3
+	orr	w3, w3, w10, lsl 24
+.L2885:
+	str	w3, [x19, 40]
 	mov	w1, 1
-	cmp	w5, w0
-	ldr	x0, [x20, 24]
-	csinv	w22, w22, wzr, eq
-	cmn	w22, #1
-	stp	w5, w1, [x0, 8]
-	bne	.L2646
-	b	.L2649
-.L2654:
-	ldrh	w0, [x19, 6]
-	cmp	w0, 1
-	bls	.L2651
-	cmn	w22, #1
-	bne	.L2712
-	b	.L2651
-.L2663:
-	ldr	w0, [x26, x22, lsl 2]
-	cmn	w0, #1
-	beq	.L2659
-	ldrb	w3, [x24, #:lo12:.LANCHOR126]
-	ldr	w0, [x23, x22, lsl 2]
-	ldr	x1, [x20, 8]
-	ldr	x2, [x20, 24]
-	bl	ftl_read_ppa_page
-	cmp	w0, 256
-	ccmn	w0, #1, 4, ne
-	bne	.L2659
-	ldrb	w3, [x24, #:lo12:.LANCHOR126]
-	ldr	w0, [x26, x22, lsl 2]
-	ldr	x1, [x20, 8]
-	ldr	x2, [x20, 24]
-	bl	ftl_read_ppa_page
-	mov	w5, w0
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 14, .L2661
-	ldr	x0, [x20, 24]
-	mov	w1, w5
-	ldr	w3, [x23, x22, lsl 2]
-	str	w5, [x29, 144]
-	ldr	w2, [x0, 8]
-	mov	x0, x28
+	stp	w10, w12, [x29, 104]
+	mov	x0, x19
+	str	w3, [x29, 136]
+	bl	sblk_read_page
+	ldr	w13, [x19, 52]
+	ldp	w10, w12, [x29, 104]
+	cmp	w13, 512
+	ccmn	w13, #1, 4, ne
+	ldr	w3, [x29, 136]
+	bne	.L2887
+	ldr	x1, [x19, 24]
+	mov	w4, w13
+	ldr	x0, [x19, 8]
+	str	w10, [x29, 108]
+	str	w13, [x29, 136]
+	ldr	w2, [x1, 12]
+	str	w2, [sp, 32]
+	ldr	w2, [x1, 8]
+	str	w2, [sp, 24]
+	ldr	w2, [x1, 4]
+	str	w2, [sp, 16]
+	mov	w2, w27
+	ldr	w1, [x1]
+	str	w1, [sp, 8]
+	ldr	w1, [x0, 12]
+	str	w1, [sp]
+	mov	w1, w12
+	ldp	w5, w6, [x0]
+	ldr	w7, [x0, 8]
+	ldr	x0, [x29, 112]
 	bl	printf
-	ldr	w5, [x29, 144]
-.L2661:
-	cmn	w5, #1
-	beq	.L2659
-	ldr	x0, [x20, 24]
-	ldr	w2, [x23, x22, lsl 2]
-	ldr	w1, [x0, 8]
-	cmp	w2, w1
-	bne	.L2659
-	ldr	w1, [x21, #:lo12:.LANCHOR14]
-	tbz	x1, 14, .L2662
-	ldr	w1, [x0, 4]
-	ldr	w3, [x27, x22, lsl 2]
-	ldr	x0, [x29, 152]
+	ldr	w13, [x29, 136]
+	ldr	w10, [x29, 108]
+	cmp	w13, 512
+	bne	.L2887
+.L2888:
+	mov	w4, w10
+	mov	w3, w28
+	mov	w2, w27
+	mov	w1, w20
+	adrp	x24, .LANCHOR131
+	adrp	x0, .LC168
+	add	x0, x0, :lo12:.LC168
 	bl	printf
-.L2662:
-	ldr	x0, [x20, 24]
-	lsl	x1, x22, 2
-	ldrh	w2, [x27, x1]
-	ldr	w1, [x0, 8]
-	ldr	w0, [x0, 4]
-	bl	lpa_hash_update_ppa
-.L2659:
-	add	x22, x22, 1
-	b	.L2657
-.L2634:
-	ldr	x3, [x20, 24]
-	adrp	x0, .LANCHOR123
-	ldr	w0, [x0, #:lo12:.LANCHOR123]
-	ldr	w1, [x3, 4]
-	cmp	w1, w0
-	bcs	.L2632
-	ldrb	w0, [x19, 9]
-	ldrh	w1, [x25, #:lo12:.LANCHOR87]
-	ldrh	w2, [x19, 10]
+	ldr	x0, [x19, 8]
+	mov	w1, 0
+	ldrb	w2, [x24, #:lo12:.LANCHOR131]
+	adrp	x25, .LANCHOR14
+	adrp	x26, .LC169
+	add	x25, x25, :lo12:.LANCHOR14
+	add	x26, x26, :lo12:.LC169
+	lsl	w2, w2, 9
+	bl	ftl_memset
+	ldr	x0, [x19, 24]
+	mov	w1, 0
+	ldrb	w2, [x24, #:lo12:.LANCHOR131]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+.L2892:
+	ldrh	w0, [x23, #:lo12:.LANCHOR95]
+	cmp	w0, w27
+	bls	.L2898
+	lsl	w0, w27, 1
+	str	w0, [x29, 140]
+	ldr	x0, [x29, 120]
+	mov	w22, 0
+	add	x28, x0, :lo12:.LANCHOR84
+	b	.L2899
+.L2883:
+	cmp	w25, 2
+	bne	.L2886
+	adrp	x1, .LANCHOR79
+	ldrb	w3, [x1, #:lo12:.LANCHOR79]
+	ldr	w1, [x29, 140]
+	add	w0, w1, w0
+	b	.L2914
+.L2886:
+	add	w3, w27, w3
+	b	.L2885
+.L2890:
+	add	w8, w27, 1
+	and	w27, w8, 65535
+	b	.L2880
+.L2897:
+	ldr	w0, [x25]
+	tbz	x0, 12, .L2893
+	mov	w2, w22
+	mov	w1, w27
+	mov	x0, x26
+	bl	printf
+.L2893:
+	ldrb	w1, [x28]
+	adrp	x2, .LANCHOR111
+	sxtw	x0, w22
+	cbz	w1, .L2894
+	add	x0, x0, 8
+	ldrh	w1, [x2, #:lo12:.LANCHOR111]
+	ldrh	w0, [x21, x0, lsl 1]
 	mul	w0, w0, w1
-	sub	w0, w0, #1
-	cmp	w2, w0
-	bge	.L2632
-	adrp	x0, .LANCHOR104
-	ldr	w1, [x3]
-	ldr	x0, [x0, #:lo12:.LANCHOR104]
-	ldr	w4, [x0, 8]
-	cmp	w1, w4
-	bls	.L2635
-	str	w1, [x0, 8]
-.L2635:
-	ldrh	w0, [x19, 12]
-	add	w2, w2, w0
-	ldp	w0, w1, [x3, 4]
-	bl	lpa_hash_update_ppa
-	ldr	w0, [x29, 180]
-	str	w0, [x29, 176]
-	ldr	w0, [x29, 184]
-	str	w0, [x29, 180]
-	ldr	w0, [x29, 188]
-	str	w0, [x29, 184]
-	ldr	w0, [x29, 152]
-	str	w0, [x29, 188]
-	b	.L2632
-	.size	ftl_open_sblk_recovery, .-ftl_open_sblk_recovery
-	.section	.text.pm_write_page,"ax",@progbits
+	orr	w0, w0, w27
+	str	w0, [x19, 40]
+	mov	x0, x19
+	bl	sblk_3d_tlc_dump_prog
+.L2895:
+	add	w22, w22, 1
+	and	w22, w22, 65535
+.L2899:
+	ldrb	w0, [x29, 153]
+	cmp	w0, w22
+	bhi	.L2897
+	add	w8, w27, 1
+	and	w27, w8, 65535
+	b	.L2892
+.L2894:
+	adrp	x1, .LANCHOR79
+	add	x0, x0, 8
+	ldrb	w1, [x1, #:lo12:.LANCHOR79]
+	cmp	w1, 2
+	bne	.L2896
+	ldrh	w1, [x2, #:lo12:.LANCHOR111]
+	ldrh	w0, [x21, x0, lsl 1]
+	mul	w0, w0, w1
+	ldr	w1, [x29, 140]
+	orr	w0, w0, w1
+	orr	w0, w0, 33554432
+	str	w0, [x19, 40]
+	mov	x0, x19
+	bl	sblk_mlc_dump_prog
+	b	.L2895
+.L2896:
+	ldrh	w1, [x21, x0, lsl 1]
+	mov	w6, 1
+	ldrh	w0, [x2, #:lo12:.LANCHOR111]
+	mov	w5, 0
+	ldrb	w4, [x24, #:lo12:.LANCHOR131]
+	ldr	x3, [x19, 24]
+	mul	w1, w1, w0
+	adrp	x0, .LANCHOR32
+	ldrb	w2, [x0, #:lo12:.LANCHOR32]
+	mov	w0, 24
+	orr	w1, w1, w27
+	str	w1, [x19, 40]
+	sub	w0, w0, w2
+	lsl	w6, w6, w2
+	ldr	x2, [x19, 8]
+	sub	w6, w6, #1
+	lsl	w7, w6, w0
+	lsr	w0, w1, w0
+	bic	w1, w1, w7
+	and	w0, w0, w6
+	bl	flash_prog_page_en
+	b	.L2895
+.L2898:
+	mov	x0, x19
+	bl	zbuf_free
+	adrp	x0, .LC170
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC170
+	bl	printf
+.L2876:
+	ldp	x19, x20, [sp, 64]
+	ldp	x21, x22, [sp, 80]
+	ldp	x23, x24, [sp, 96]
+	ldp	x25, x26, [sp, 112]
+	ldp	x27, x28, [sp, 128]
+	ldp	x29, x30, [sp, 48]
+	add	sp, sp, 224
+	ret
+	.size	ftl_dump_write_open_sblk, .-ftl_dump_write_open_sblk
+	.section	.text.flash_info_flush,"ax",@progbits
 	.align	2
-	.global	pm_write_page
-	.type	pm_write_page, %function
-pm_write_page:
-	stp	x29, x30, [sp, -96]!
+	.global	flash_info_flush
+	.type	flash_info_flush, %function
+flash_info_flush:
+	stp	x29, x30, [sp, -112]!
+	adrp	x0, .LANCHOR14
 	add	x29, sp, 0
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	stp	x19, x20, [sp, 16]
-	mov	w19, w0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR87
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR105
-	adrp	x24, .LANCHOR104
-	mov	x23, x1
-	add	x21, x21, :lo12:.LANCHOR87
-	mov	x20, x24
-	add	x22, x22, :lo12:.LANCHOR105
 	stp	x25, x26, [sp, 64]
-	str	x27, [sp, 80]
-	mov	w25, 65535
-.L2739:
-	ldr	x0, [x24, #:lo12:.LANCHOR104]
-	ldr	w1, [x0, 48]
-	ldrh	w2, [x0, 696]
-	add	w1, w1, 1
-	str	w1, [x0, 48]
-	ldrh	w1, [x21]
-	cmp	w2, w1
-	bcs	.L2740
-	ldrh	w0, [x0, 692]
-	cmp	w0, w25
-	bne	.L2741
-.L2740:
-	bl	pm_alloc_new_blk
-	mov	w0, 0
-	bl	ftl_info_flush
-.L2741:
-	ldr	x0, [x20, #:lo12:.LANCHOR104]
-	ldrh	w0, [x0, 692]
-	cmp	w0, w25
-	bne	.L2742
-	adrp	x1, .LANCHOR196
-	adrp	x0, .LC0
-	mov	w2, 267
-	add	x1, x1, :lo12:.LANCHOR196
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2742:
-	ldr	x0, [x20, #:lo12:.LANCHOR104]
-	adrp	x27, .LANCHOR197
-	ldrh	w1, [x22]
+	stp	x27, x28, [sp, 80]
+	tbz	x0, 12, .L2916
+	adrp	x2, .LANCHOR209
+	adrp	x0, .LC97
+	add	x2, x2, :lo12:.LANCHOR209
+	mov	w1, 364
+	add	x0, x0, :lo12:.LC97
+	bl	printf
+.L2916:
+	adrp	x23, .LANCHOR210
+	adrp	x20, .LANCHOR27
 	mov	w2, 64
-	ldrh	w26, [x0, 692]
-	ldrh	w0, [x0, 696]
-	madd	w26, w26, w1, w0
-	ldr	x0, [x27, #:lo12:.LANCHOR197]
 	mov	w1, 0
+	ldr	x0, [x23, #:lo12:.LANCHOR210]
+	adrp	x21, .LANCHOR211
+	adrp	x22, .LANCHOR2
+	adrp	x24, .LC172
+	adrp	x25, .LANCHOR147
+	add	x22, x22, :lo12:.LANCHOR2
+	add	x24, x24, :lo12:.LC172
+	add	x25, x25, :lo12:.LANCHOR147
 	bl	ftl_memset
-	ldr	x6, [x27, #:lo12:.LANCHOR197]
-	ldr	x7, [x20, #:lo12:.LANCHOR104]
-	str	w19, [x6]
-	ldr	w0, [x7, 48]
-	str	w0, [x6, 4]
-	adrp	x0, .LANCHOR126
-	ldrb	w8, [x0, #:lo12:.LANCHOR126]
-	mov	x0, x23
-	lsl	w1, w8, 9
+	add	x27, x21, :lo12:.LANCHOR211
+	ldr	x1, [x20, #:lo12:.LANCHOR27]
+	mov	w3, 16
+	mov	w2, 4
+	adrp	x0, .LC171
+	add	x0, x0, :lo12:.LC171
+	mov	w26, 0
+	bl	rknand_print_hex
+	ldr	x6, [x20, #:lo12:.LANCHOR27]
+	add	x0, x6, 16
+	ldr	w1, [x6, 8]
 	bl	js_hash
-	str	w0, [x6, 8]
-	ldrb	w0, [x7, 694]
-	mov	x2, x23
-	mov	w1, w26
-	mov	w4, w8
-	mov	x3, x6
-	bl	ftl_prog_page
-	ldr	x2, [x20, #:lo12:.LANCHOR104]
-	ldrh	w1, [x2, 696]
+	str	w0, [x6, 12]
+.L2917:
+	add	x28, x21, :lo12:.LANCHOR211
+	ldrb	w4, [x21, #:lo12:.LANCHOR211]
+	ldrh	w19, [x22]
+	mov	x0, x24
+	mov	w1, w4
+	ldrh	w3, [x28, 2]
+	stp	w3, w4, [x29, 104]
+	mov	w2, w3
+	bl	printf
+	ldrh	w0, [x25]
+	ldrh	w1, [x28, 2]
+	sub	w0, w0, #1
+	cmp	w1, w0
+	ldp	w3, w4, [x29, 104]
+	blt	.L2918
+	ldr	x6, [x20, #:lo12:.LANCHOR27]
+	ldrb	w7, [x28, 1]
+	strh	wzr, [x28, 2]
+	ldr	w0, [x6, 4]
+	ldrh	w1, [x6, 16]
+	add	w0, w0, 1
+	str	w0, [x6, 4]
+	ldrb	w0, [x21, #:lo12:.LANCHOR211]
 	add	w1, w1, 1
-	and	w1, w1, 65535
-	strh	w1, [x2, 696]
-	cmp	w1, 1
-	adrp	x1, .LANCHOR198
-	beq	.L2743
-	ldrb	w3, [x1, #:lo12:.LANCHOR198]
-	cbz	w3, .L2744
-.L2743:
-	strb	wzr, [x1, #:lo12:.LANCHOR198]
-	b	.L2739
-.L2744:
+	strb	w0, [x28, 1]
+	mov	x0, x6
+	strb	w7, [x21, #:lo12:.LANCHOR211]
+	strh	w1, [x0, 16]!
+	ldr	w1, [x6, 8]
+	bl	js_hash
+	ldrh	w19, [x22]
+	str	w0, [x6, 12]
+	mul	w19, w19, w7
+.L2927:
+	mov	w1, w19
+	mov	w0, 0
+	bl	flash_erase_block
+	b	.L2919
+.L2922:
+	mov	w26, 1
+	b	.L2917
+.L2918:
+	madd	w19, w19, w4, w3
+	cbz	w1, .L2927
+.L2919:
+	ldr	x2, [x20, #:lo12:.LANCHOR27]
+	mov	w1, w19
+	ldr	x3, [x23, #:lo12:.LANCHOR210]
+	mov	w5, 1
+	mov	w4, 4
+	ldr	w0, [x2, 4]
+	str	w0, [x3]
+	mov	w0, 21321
+	movk	w0, 0x5359, lsl 16
+	str	w0, [x3, 4]
+	mov	w0, 0
+	bl	flash_prog_page_en
 	cmn	w0, #1
-	bne	.L2746
-	mov	w1, w26
-	adrp	x0, .LC165
-	add	x0, x0, :lo12:.LC165
+	ldrh	w1, [x27, 2]
+	add	w1, w1, 1
+	strh	w1, [x27, 2]
+	bne	.L2920
+	mov	w1, w19
+	adrp	x0, .LC173
+	add	x0, x0, :lo12:.LC173
 	bl	printf
-	b	.L2739
-.L2746:
-	ldrh	w0, [x2, 698]
-	cmp	w19, w0
-	bcs	.L2747
-	add	x19, x2, x19, uxtw 2
-	str	w26, [x19, 704]
-.L2747:
+	b	.L2917
+.L2920:
+	cbz	w26, .L2922
+	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
-	ldr	x27, [sp, 80]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+	.size	flash_info_flush, .-flash_info_flush
+	.section	.text.flash_info_blk_init,"ax",@progbits
+	.align	2
+	.global	flash_info_blk_init
+	.type	flash_info_blk_init, %function
+flash_info_blk_init:
+	stp	x29, x30, [sp, -96]!
+	adrp	x0, .LANCHOR14
+	add	x29, sp, 0
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR27
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	str	x27, [sp, 80]
+	tbz	x0, 12, .L2929
+	ldr	x4, [x20, #:lo12:.LANCHOR27]
+	adrp	x2, .LANCHOR212
+	adrp	x0, .LC174
+	mov	w3, 2048
+	add	x2, x2, :lo12:.LANCHOR212
+	mov	w1, 49
+	add	x0, x0, :lo12:.LC174
+	bl	printf
+.L2929:
+	adrp	x24, .LANCHOR2
+	mov	w23, 21321
+	add	x26, x24, :lo12:.LANCHOR2
+	mov	w22, 4
+	adrp	x21, .LANCHOR210
+	movk	w23, 0x5359, lsl 16
+.L2933:
+	mov	w19, 0
+.L2932:
+	ldrh	w1, [x26]
+	mov	w4, 4
+	ldr	x3, [x21, #:lo12:.LANCHOR210]
+	mov	w0, 0
+	ldr	x2, [x20, #:lo12:.LANCHOR27]
+	add	x27, x21, :lo12:.LANCHOR210
+	add	x25, x20, :lo12:.LANCHOR27
+	madd	w1, w1, w22, w19
+	bl	flash_read_page_en
+	cmn	w0, #1
+	beq	.L2930
+	ldr	x2, [x20, #:lo12:.LANCHOR27]
+	ldr	w0, [x2]
+	cmp	w0, w23
+	beq	.L2931
+.L2930:
+	add	w19, w19, 1
+	cmp	w19, 4
+	bne	.L2932
+	add	w22, w22, 1
+	cmp	w22, 16
+	bne	.L2933
+.L2959:
+	mov	w0, -1
+.L2928:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
+	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-	.size	pm_write_page, .-pm_write_page
-	.section	.text.ftl_dump_write_open_sblk,"ax",@progbits
+.L2941:
+	ldr	x0, [x25]
+	ldr	w1, [x0]
+	cmp	w1, w23
+	bne	.L2942
+	ldr	w22, [x0, 4]
+.L2935:
+	add	x23, x19, :lo12:.LANCHOR211
+	ldrh	w0, [x24, #:lo12:.LANCHOR2]
+	ldr	x3, [x21, #:lo12:.LANCHOR210]
+	mov	w4, 4
+	ldr	x2, [x20, #:lo12:.LANCHOR27]
+	ldrb	w1, [x23, 1]
+	mul	w1, w1, w0
+	mov	w0, 0
+	bl	flash_read_page_en
+	cmn	w0, #1
+	beq	.L2936
+	ldr	x0, [x20, #:lo12:.LANCHOR27]
+	mov	w1, 21321
+	movk	w1, 0x5359, lsl 16
+	ldr	w2, [x0]
+	cmp	w2, w1
+	bne	.L2936
+	ldr	w1, [x0, 4]
+	cmp	w22, w1
+	bcs	.L2936
+	ldrb	w1, [x0, 37]
+	ldrb	w0, [x0, 36]
+	strb	w1, [x19, #:lo12:.LANCHOR211]
+	strb	w0, [x23, 1]
+.L2936:
+	ldrb	w1, [x19, #:lo12:.LANCHOR211]
+	add	x22, x19, :lo12:.LANCHOR211
+	ldr	x3, [x21, #:lo12:.LANCHOR210]
+	mov	w4, 4
+	ldr	x2, [x20, #:lo12:.LANCHOR27]
+	mov	w0, 0
+	bl	flash_get_last_written_page
+	and	w25, w0, 65535
+	add	w1, w25, 1
+	ldrb	w23, [x19, #:lo12:.LANCHOR211]
+	strh	w1, [x22, 2]
+	mov	w22, 0
+	ldrh	w1, [x24, #:lo12:.LANCHOR2]
+	mov	w24, 21321
+	movk	w24, 0x5359, lsl 16
+	mul	w23, w23, w1
+	add	w23, w23, w0, sxth
+.L2937:
+	sub	w0, w25, w22
+	sxth	w19, w0
+	tbz	w19, #31, .L2940
+	cmn	w19, #1
+	bne	.L2939
+	ldr	x0, [x20, #:lo12:.LANCHOR27]
+	ldr	w1, [x0]
+	adrp	x0, .LC175
+	add	x0, x0, :lo12:.LC175
+	bl	printf
+	b	.L2959
+.L2940:
+	ldr	x3, [x21, #:lo12:.LANCHOR210]
+	mov	w4, 4
+	ldr	x2, [x20, #:lo12:.LANCHOR27]
+	sub	w1, w23, w22
+	mov	w0, 0
+	bl	flash_read_page_en
+	cmn	w0, #1
+	beq	.L2938
+	ldr	x0, [x20, #:lo12:.LANCHOR27]
+	ldr	w0, [x0]
+	cmp	w0, w24
+	beq	.L2939
+.L2938:
+	add	w22, w22, 1
+	b	.L2937
+.L2939:
+	cmp	w22, 1
+	bls	.L2943
+	bl	flash_info_flush
+.L2943:
+	mov	w0, 0
+	b	.L2928
+.L2931:
+	adrp	x19, .LANCHOR211
+	add	x1, x19, :lo12:.LANCHOR211
+	ldrb	w3, [x2, 37]
+	mov	w4, 4
+	ldrb	w0, [x2, 36]
+	strb	w3, [x1, 1]
+	ldrh	w1, [x26]
+	ldr	x3, [x27]
+	strb	w0, [x19, #:lo12:.LANCHOR211]
+	mul	w1, w1, w0
+	mov	w0, 0
+	bl	flash_read_page_en
+	cmn	w0, #1
+	bne	.L2941
+.L2942:
+	mov	w22, 0
+	b	.L2935
+	.size	flash_info_blk_init, .-flash_info_blk_init
+	.section	.text.nand_flash_init,"ax",@progbits
 	.align	2
-	.global	ftl_dump_write_open_sblk
-	.type	ftl_dump_write_open_sblk, %function
-ftl_dump_write_open_sblk:
-	sub	sp, sp, #224
-	stp	x29, x30, [sp, 48]
-	add	x29, sp, 48
-	stp	x19, x20, [sp, 64]
-	and	w20, w0, 65535
-	adrp	x0, .LANCHOR6
-	stp	x21, x22, [sp, 80]
-	stp	x23, x24, [sp, 96]
-	ldrh	w0, [x0, #:lo12:.LANCHOR6]
-	stp	x25, x26, [sp, 112]
-	stp	x27, x28, [sp, 128]
-	cmp	w0, w20
-	bls	.L2752
-	adrp	x25, .LANCHOR77
-	str	x25, [x29, 136]
-	ldrb	w0, [x25, #:lo12:.LANCHOR77]
-	cbnz	w0, .L2754
-	adrp	x0, .LANCHOR74
-	ldrb	w0, [x0, #:lo12:.LANCHOR74]
-	cbz	w0, .L2752
-.L2754:
-	adrp	x0, .LANCHOR7
-	ubfiz	x14, x20, 2, 16
-	mov	x15, x0
-	ldr	x1, [x0, #:lo12:.LANCHOR7]
-	add	x1, x1, x14
-	ldrb	w1, [x1, 2]
-	and	w1, w1, 224
-	cmp	w1, 160
-	bne	.L2774
-	adrp	x0, .LANCHOR73
-	ldrb	w10, [x0, #:lo12:.LANCHOR73]
-.L2755:
-	add	x22, x29, 176
-	adrp	x23, .LANCHOR87
-	str	w10, [x29, 128]
-	mov	w0, w20
-	mov	w24, 0
-	mov	w25, 0
-	strh	w20, [x22, -32]!
-	mov	w27, 0
-	add	x1, x22, 16
-	bl	ftl_get_blk_list_in_sblk
-	ldrh	w1, [x23, #:lo12:.LANCHOR87]
-	and	w0, w0, 255
-	strb	w0, [x29, 153]
-	strb	wzr, [x29, 149]
-	strh	wzr, [x29, 146]
-	mul	w0, w0, w1
-	strh	wzr, [x29, 154]
-	strh	w0, [x29, 150]
-	ldr	x0, [x15, #:lo12:.LANCHOR7]
-	add	x1, x0, x14
-	ldr	w5, [x0, x14]
-	ldrb	w2, [x1, 2]
-	mov	w1, w20
-	ldrh	w4, [x0, x14]
-	adrp	x0, .LC166
-	ubfx	x5, x5, 11, 8
-	add	x0, x0, :lo12:.LC166
-	ubfx	x3, x2, 3, 2
-	and	w4, w4, 2047
-	ubfx	x2, x2, 5, 3
-	bl	printf
-	mov	w0, 1
-	bl	buf_alloc
-	mov	x19, x0
-	ldr	w10, [x29, 128]
-	adrp	x12, .LANCHOR105
-	add	x14, x23, :lo12:.LANCHOR87
-	add	x12, x12, :lo12:.LANCHOR105
-.L2756:
-	ldrh	w0, [x14]
-	cmp	w0, w25
-	bls	.L2762
-	lsl	w11, w25, 1
-	adrp	x26, .LC167
-	sub	w11, w11, #1
-	mov	w27, 0
-	add	x26, x26, :lo12:.LC167
-	b	.L2766
-.L2774:
-	mov	w10, 1
-	b	.L2755
-.L2764:
-	ldrh	w13, [x22, x28]
-	mov	w0, 65535
-	cmp	w13, w0
-	bne	.L2757
-.L2763:
-	add	w24, w24, 1
-	and	w24, w24, 65535
-.L2758:
-	cmp	w10, w24
-	bcs	.L2764
-	add	w27, w27, 1
-	and	w27, w27, 65535
-.L2766:
-	ldrb	w0, [x29, 153]
-	cmp	w0, w27
-	bls	.L2765
-	sxtw	x28, w27
-	mov	w24, 1
-	add	x28, x28, 8
-	lsl	x28, x28, 1
-	b	.L2758
-.L2757:
-	ldrh	w21, [x12]
-	cmp	w10, 3
-	mul	w21, w21, w13
-	bne	.L2759
-	add	w21, w25, w21
-	orr	w21, w21, w24, lsl 24
-.L2760:
-	str	w21, [x19, 40]
-	mov	w1, 1
-	stp	x12, x14, [x29, 96]
-	mov	x0, x19
-	stp	w11, w10, [x29, 116]
-	str	w13, [x29, 124]
-	bl	sblk_read_page
-	ldr	x1, [x19, 24]
-	mov	w3, w21
-	ldr	x0, [x19, 8]
-	ldr	w15, [x19, 52]
-	ldr	w13, [x29, 124]
-	ldr	w2, [x1, 12]
-	mov	w4, w15
-	str	w2, [sp, 32]
-	str	w15, [x29, 128]
-	ldr	w2, [x1, 8]
-	str	w2, [sp, 24]
-	ldr	w2, [x1, 4]
-	str	w2, [sp, 16]
-	mov	w2, w25
-	ldr	w1, [x1]
-	str	w1, [sp, 8]
-	ldr	w1, [x0, 12]
-	str	w1, [sp]
-	mov	w1, w13
-	ldp	w5, w6, [x0]
-	ldr	w7, [x0, 8]
-	mov	x0, x26
-	bl	printf
-	ldr	w15, [x29, 128]
-	ldp	w11, w10, [x29, 116]
-	cmp	w15, 512
-	ldp	x12, x14, [x29, 96]
-	bne	.L2763
-.L2762:
-	mov	w4, w24
-	mov	w3, w27
-	mov	w2, w25
-	mov	w1, w20
-	adrp	x24, .LANCHOR126
-	adrp	x0, .LC168
-	add	x0, x0, :lo12:.LC168
-	bl	printf
-	ldr	x0, [x19, 8]
-	mov	w1, 0
-	ldrb	w2, [x24, #:lo12:.LANCHOR126]
-	adrp	x26, .LC169
-	adrp	x27, .LANCHOR73
-	add	x26, x26, :lo12:.LC169
-	add	x27, x27, :lo12:.LANCHOR73
-	lsl	w2, w2, 9
-	bl	ftl_memset
-	ldr	x0, [x19, 24]
-	mov	w1, 0
-	ldrb	w2, [x24, #:lo12:.LANCHOR126]
-	lsl	w2, w2, 1
-	bl	ftl_memset
-.L2767:
-	ldrh	w0, [x23, #:lo12:.LANCHOR87]
-	cmp	w0, w25
-	bls	.L2772
-	ldr	x0, [x29, 136]
-	lsl	w28, w25, 1
-	mov	w21, 0
-	add	x0, x0, :lo12:.LANCHOR77
-	str	x0, [x29, 128]
-	b	.L2773
-.L2759:
-	cmp	w10, 2
-	bne	.L2761
-	adrp	x0, .LANCHOR73
-	add	w21, w21, w11
-	add	w21, w21, w24
-	ldrb	w3, [x0, #:lo12:.LANCHOR73]
-	orr	w21, w21, w3, lsl 24
-	b	.L2760
-.L2761:
-	add	w21, w25, w21
-	b	.L2760
-.L2765:
-	add	w8, w25, 1
-	and	w25, w8, 65535
-	b	.L2756
-.L2771:
-	mov	w2, w21
-	mov	w1, w25
-	mov	x0, x26
-	bl	printf
-	ldr	x0, [x29, 128]
-	adrp	x2, .LANCHOR105
-	ldrb	w1, [x0]
-	sxtw	x0, w21
-	cbz	w1, .L2768
-	add	x0, x0, 8
-	ldrh	w1, [x2, #:lo12:.LANCHOR105]
-	ldrh	w0, [x22, x0, lsl 1]
-	mul	w0, w0, w1
-	orr	w0, w0, w25
-	str	w0, [x19, 40]
-	mov	x0, x19
-	bl	sblk_3d_tlc_dump_prog
-.L2769:
-	add	w21, w21, 1
-	and	w21, w21, 65535
-.L2773:
-	ldrb	w0, [x29, 153]
-	cmp	w0, w21
-	bhi	.L2771
-	add	w8, w25, 1
-	and	w25, w8, 65535
-	b	.L2767
-.L2768:
-	ldrb	w1, [x27]
-	add	x0, x0, 8
-	cmp	w1, 2
-	bne	.L2770
-	ldrh	w0, [x22, x0, lsl 1]
-	ldrh	w1, [x2, #:lo12:.LANCHOR105]
-	mul	w0, w0, w1
-	orr	w0, w0, w28
-	orr	w0, w0, 33554432
-	str	w0, [x19, 40]
-	mov	x0, x19
-	bl	sblk_mlc_dump_prog
-	b	.L2769
-.L2770:
-	ldrh	w1, [x22, x0, lsl 1]
-	mov	w6, 1
-	ldrh	w0, [x2, #:lo12:.LANCHOR105]
-	mov	w5, 0
-	ldrb	w4, [x24, #:lo12:.LANCHOR126]
-	ldr	x3, [x19, 24]
-	mul	w1, w1, w0
-	adrp	x0, .LANCHOR31
-	ldrb	w2, [x0, #:lo12:.LANCHOR31]
-	mov	w0, 24
-	orr	w1, w1, w25
-	str	w1, [x19, 40]
-	sub	w0, w0, w2
-	lsl	w6, w6, w2
-	ldr	x2, [x19, 8]
-	sub	w6, w6, #1
-	lsl	w7, w6, w0
-	lsr	w0, w1, w0
-	bic	w1, w1, w7
-	and	w0, w0, w6
-	bl	flash_prog_page_en
-	b	.L2769
-.L2772:
-	mov	x0, x19
-	bl	zbuf_free
-	adrp	x0, .LC170
-	mov	w1, w20
-	add	x0, x0, :lo12:.LC170
-	bl	printf
-.L2752:
-	ldp	x19, x20, [sp, 64]
-	ldp	x21, x22, [sp, 80]
-	ldp	x23, x24, [sp, 96]
-	ldp	x25, x26, [sp, 112]
-	ldp	x27, x28, [sp, 128]
-	ldp	x29, x30, [sp, 48]
-	add	sp, sp, 224
-	ret
-	.size	ftl_dump_write_open_sblk, .-ftl_dump_write_open_sblk
-	.section	.text.flash_info_flush,"ax",@progbits
-	.align	2
-	.global	flash_info_flush
-	.type	flash_info_flush, %function
-flash_info_flush:
-	stp	x29, x30, [sp, -112]!
-	adrp	x0, .LANCHOR14
+	.global	nand_flash_init
+	.type	nand_flash_init, %function
+nand_flash_init:
+	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR14
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2783
-	adrp	x2, .LANCHOR199
-	adrp	x0, .LC91
-	add	x2, x2, :lo12:.LANCHOR199
-	mov	w1, 325
-	add	x0, x0, :lo12:.LC91
+	str	x27, [sp, 80]
+	tbz	x0, 12, .L2961
+	adrp	x2, .LANCHOR213
+	adrp	x0, .LC97
+	add	x2, x2, :lo12:.LANCHOR213
+	mov	w1, 3429
+	add	x0, x0, :lo12:.LC97
 	bl	printf
-.L2783:
-	adrp	x23, .LANCHOR200
-	adrp	x20, .LANCHOR27
-	mov	w2, 64
+.L2961:
+	adrp	x0, .LANCHOR172
+	adrp	x24, .LANCHOR16
+	adrp	x22, .LANCHOR48
+	add	x25, x22, :lo12:.LANCHOR48
+	str	wzr, [x0, #:lo12:.LANCHOR172]
+	mov	x0, x19
+	bl	nandc_init
+	adrp	x19, .LANCHOR33
+	add	x0, x19, :lo12:.LANCHOR33
+	str	x0, [x24, #:lo12:.LANCHOR16]
+	adrp	x0, .LANCHOR18
+	adrp	x23, .LANCHOR32
+	mov	x26, x25
+	mov	w1, 1
+	mov	w20, 0
+	strb	w1, [x0, #:lo12:.LANCHOR18]
+	mov	w27, 44
+	mov	w0, 3
+	mov	w2, 8
+	strb	w0, [x23, #:lo12:.LANCHOR32]
 	mov	w1, 0
-	ldr	x0, [x23, #:lo12:.LANCHOR200]
-	adrp	x21, .LANCHOR201
-	adrp	x22, .LANCHOR2
-	adrp	x24, .LC172
-	adrp	x25, .LANCHOR144
-	add	x22, x22, :lo12:.LANCHOR2
-	add	x24, x24, :lo12:.LC172
-	add	x25, x25, :lo12:.LANCHOR144
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
 	bl	ftl_memset
-	add	x27, x21, :lo12:.LANCHOR201
-	ldr	x1, [x20, #:lo12:.LANCHOR27]
-	mov	w3, 16
-	mov	w2, 4
-	adrp	x0, .LC171
-	add	x0, x0, :lo12:.LC171
-	mov	w26, 0
-	bl	rknand_print_hex
-	ldr	x6, [x20, #:lo12:.LANCHOR27]
-	add	x0, x6, 16
-	ldr	w1, [x6, 8]
-	bl	js_hash
-	str	w0, [x6, 12]
-.L2784:
-	add	x28, x21, :lo12:.LANCHOR201
-	ldrb	w4, [x21, #:lo12:.LANCHOR201]
-	ldrh	w19, [x22]
-	mov	x0, x24
-	mov	w1, w4
-	ldrh	w3, [x28, 2]
-	stp	w3, w4, [x29, 104]
-	mov	w2, w3
-	bl	printf
-	ldrh	w0, [x25]
-	ldrh	w1, [x28, 2]
-	sub	w0, w0, #1
-	cmp	w1, w0
-	ldp	w3, w4, [x29, 104]
-	blt	.L2785
-	ldr	x6, [x20, #:lo12:.LANCHOR27]
-	ldrb	w7, [x28, 1]
-	strh	wzr, [x28, 2]
-	ldr	w0, [x6, 4]
-	ldrh	w1, [x6, 16]
-	add	w0, w0, 1
-	str	w0, [x6, 4]
-	ldrb	w0, [x21, #:lo12:.LANCHOR201]
-	add	w1, w1, 1
-	strb	w0, [x28, 1]
-	mov	x0, x6
-	strb	w7, [x21, #:lo12:.LANCHOR201]
-	strh	w1, [x0, 16]!
-	ldr	w1, [x6, 8]
-	bl	js_hash
-	ldrh	w19, [x22]
-	str	w0, [x6, 12]
-	mul	w19, w19, w7
-.L2794:
-	mov	w1, w19
-	mov	w0, 0
-	bl	flash_erase_block
-	b	.L2786
-.L2789:
-	mov	w26, 1
-	b	.L2784
-.L2785:
-	madd	w19, w19, w4, w3
-	cbz	w1, .L2794
-.L2786:
-	ldr	x2, [x20, #:lo12:.LANCHOR27]
-	mov	w1, w19
-	ldr	x3, [x23, #:lo12:.LANCHOR200]
-	mov	w5, 1
-	mov	w4, 4
-	ldr	w0, [x2, 4]
-	str	w0, [x3]
-	mov	w0, 21321
-	movk	w0, 0x5359, lsl 16
-	str	w0, [x3, 4]
-	mov	w0, 0
-	bl	flash_prog_page_en
-	cmn	w0, #1
-	ldrh	w1, [x27, 2]
-	add	w1, w1, 1
-	strh	w1, [x27, 2]
-	bne	.L2787
-	mov	w1, w19
-	adrp	x0, .LC173
-	add	x0, x0, :lo12:.LC173
-	bl	printf
-	b	.L2784
-.L2787:
-	cbz	w26, .L2789
-	ldp	x19, x20, [sp, 16]
-	mov	w0, 0
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 112
-	ret
-	.size	flash_info_flush, .-flash_info_flush
-	.section	.text.flash_info_blk_init,"ax",@progbits
-	.align	2
-	.global	flash_info_blk_init
-	.type	flash_info_blk_init, %function
-flash_info_blk_init:
-	stp	x29, x30, [sp, -96]!
-	adrp	x0, .LANCHOR14
-	add	x29, sp, 0
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR27
-	stp	x21, x22, [sp, 32]
-	stp	x23, x24, [sp, 48]
-	stp	x25, x26, [sp, 64]
-	str	x27, [sp, 80]
-	tbz	x0, 12, .L2796
-	ldr	x4, [x20, #:lo12:.LANCHOR27]
-	adrp	x2, .LANCHOR202
-	adrp	x0, .LC174
-	mov	w3, 2048
-	add	x2, x2, :lo12:.LANCHOR202
-	mov	w1, 50
-	add	x0, x0, :lo12:.LC174
-	bl	printf
-.L2796:
-	adrp	x21, .LANCHOR200
-	adrp	x24, .LANCHOR2
-	mov	w22, 21321
-	add	x26, x24, :lo12:.LANCHOR2
-	mov	x23, x21
-	mov	w19, 4
-	movk	w22, 0x5359, lsl 16
-.L2799:
-	ldrh	w1, [x26]
-	mov	w4, 4
-	ldr	x3, [x21, #:lo12:.LANCHOR200]
-	mov	w0, 0
-	ldr	x2, [x20, #:lo12:.LANCHOR27]
-	add	x27, x21, :lo12:.LANCHOR200
-	add	x25, x20, :lo12:.LANCHOR27
-	mul	w1, w1, w19
-	bl	flash_read_page_en
-	cmn	w0, #1
-	beq	.L2797
-	ldr	x2, [x20, #:lo12:.LANCHOR27]
-	ldr	w0, [x2]
-	cmp	w0, w22
-	beq	.L2798
-.L2797:
-	add	w19, w19, 1
-	cmp	w19, 16
-	bne	.L2799
-.L2824:
-	mov	w0, -1
-.L2795:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldr	x27, [sp, 80]
-	ldp	x29, x30, [sp], 96
-	ret
-.L2807:
-	ldr	x0, [x25]
-	ldr	w1, [x0]
-	cmp	w1, w22
-	bne	.L2808
-	ldr	w21, [x0, 4]
-.L2801:
-	add	x22, x19, :lo12:.LANCHOR201
-	ldrh	w0, [x24, #:lo12:.LANCHOR2]
-	ldr	x3, [x23, #:lo12:.LANCHOR200]
-	mov	w4, 4
-	ldr	x2, [x20, #:lo12:.LANCHOR27]
-	ldrb	w1, [x22, 1]
-	mul	w1, w1, w0
-	mov	w0, 0
-	bl	flash_read_page_en
-	cmn	w0, #1
-	beq	.L2802
-	ldr	x0, [x20, #:lo12:.LANCHOR27]
-	mov	w1, 21321
-	movk	w1, 0x5359, lsl 16
-	ldr	w2, [x0]
-	cmp	w2, w1
-	bne	.L2802
-	ldr	w1, [x0, 4]
-	cmp	w21, w1
-	bcs	.L2802
-	ldrb	w1, [x0, 37]
-	ldrb	w0, [x0, 36]
-	strb	w1, [x19, #:lo12:.LANCHOR201]
-	strb	w0, [x22, 1]
-.L2802:
-	ldrb	w1, [x19, #:lo12:.LANCHOR201]
-	add	x21, x19, :lo12:.LANCHOR201
-	ldr	x3, [x23, #:lo12:.LANCHOR200]
-	mov	w4, 4
-	ldr	x2, [x20, #:lo12:.LANCHOR27]
-	mov	w0, 0
-	bl	flash_get_last_written_page
-	and	w25, w0, 65535
-	add	w1, w25, 1
-	ldrb	w22, [x19, #:lo12:.LANCHOR201]
-	strh	w1, [x21, 2]
-	mov	w21, 0
-	ldrh	w1, [x24, #:lo12:.LANCHOR2]
-	mov	w24, 21321
-	movk	w24, 0x5359, lsl 16
-	mul	w22, w22, w1
-	add	w22, w22, w0, sxth
-.L2803:
-	sub	w0, w25, w21
-	sxth	w19, w0
-	tbz	w19, #31, .L2806
-	cmn	w19, #1
-	bne	.L2805
-	ldr	x0, [x20, #:lo12:.LANCHOR27]
-	ldr	w1, [x0]
-	adrp	x0, .LC175
-	add	x0, x0, :lo12:.LC175
-	bl	printf
-	b	.L2824
-.L2806:
-	ldr	x3, [x23, #:lo12:.LANCHOR200]
-	mov	w4, 4
-	ldr	x2, [x20, #:lo12:.LANCHOR27]
-	sub	w1, w22, w21
-	mov	w0, 0
-	bl	flash_read_page_en
-	cmn	w0, #1
-	beq	.L2804
-	ldr	x0, [x20, #:lo12:.LANCHOR27]
-	ldr	w0, [x0]
-	cmp	w0, w24
-	beq	.L2805
-.L2804:
-	add	w21, w21, 1
-	b	.L2803
-.L2805:
-	cmp	w21, 1
-	bls	.L2809
-	bl	flash_info_flush
-.L2809:
-	mov	w0, 0
-	b	.L2795
-.L2798:
-	adrp	x19, .LANCHOR201
-	add	x1, x19, :lo12:.LANCHOR201
-	ldrb	w3, [x2, 37]
-	mov	w4, 4
-	ldrb	w0, [x2, 36]
-	strb	w3, [x1, 1]
-	ldrh	w1, [x26]
-	ldr	x3, [x27]
-	strb	w0, [x19, #:lo12:.LANCHOR201]
-	mul	w1, w1, w0
-	mov	w0, 0
-	bl	flash_read_page_en
-	cmn	w0, #1
-	bne	.L2807
-.L2808:
-	mov	w21, 0
-	b	.L2801
-	.size	flash_info_blk_init, .-flash_info_blk_init
-	.section	.text.nand_flash_init,"ax",@progbits
-	.align	2
-	.global	nand_flash_init
-	.type	nand_flash_init, %function
-nand_flash_init:
-	stp	x29, x30, [sp, -96]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR14
-	mov	x19, x0
-	stp	x21, x22, [sp, 32]
-	ldr	w0, [x20, #:lo12:.LANCHOR14]
-	stp	x23, x24, [sp, 48]
-	stp	x25, x26, [sp, 64]
-	str	x27, [sp, 80]
-	tbz	x0, 12, .L2826
-	adrp	x2, .LANCHOR203
-	adrp	x0, .LC91
-	add	x2, x2, :lo12:.LANCHOR203
-	mov	w1, 2765
-	add	x0, x0, :lo12:.LC91
-	bl	printf
-.L2826:
-	adrp	x0, .LANCHOR165
-	adrp	x24, .LANCHOR16
-	adrp	x22, .LANCHOR44
-	add	x25, x22, :lo12:.LANCHOR44
-	str	wzr, [x0, #:lo12:.LANCHOR165]
-	mov	x0, x19
-	bl	nandc_init
-	adrp	x19, .LANCHOR32
-	add	x0, x19, :lo12:.LANCHOR32
-	str	x0, [x24, #:lo12:.LANCHOR16]
-	adrp	x0, .LANCHOR18
-	adrp	x23, .LANCHOR31
-	mov	x26, x25
-	mov	w1, 1
-	mov	w21, 0
-	strb	w1, [x0, #:lo12:.LANCHOR18]
-	mov	w27, 44
-	mov	w0, 3
-	mov	w2, 8
-	strb	w0, [x23, #:lo12:.LANCHOR31]
-	mov	w1, 0
-	adrp	x0, .LANCHOR30
-	add	x0, x0, :lo12:.LANCHOR30
-	bl	ftl_memset
-	mov	w2, 32
-	mov	w1, 0
-	adrp	x0, .LANCHOR145
-	add	x0, x0, :lo12:.LANCHOR145
-	bl	ftl_memset
-.L2832:
-	mov	x1, x25
-	mov	w0, w21
-	bl	flash_read_id
-	cbnz	w21, .L2827
-	ldrb	w0, [x26]
+	mov	w2, 32
+	mov	w1, 0
+	adrp	x0, .LANCHOR148
+	add	x0, x0, :lo12:.LANCHOR148
+	bl	ftl_memset
+.L2967:
+	mov	x1, x25
+	mov	w0, w20
+	bl	flash_read_id
+	cbnz	w20, .L2962
+	ldrb	w0, [x26]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bls	.L2828
-.L2830:
-	mov	w19, -2
-.L2825:
-	mov	w0, w19
+	bls	.L2963
+.L2965:
+	mov	w8, -2
+.L2960:
+	mov	w0, w8
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -17774,375 +18627,403 @@ nand_flash_init:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2828:
+.L2963:
 	ldrb	w0, [x26, 1]
 	cmp	w0, 255
-	beq	.L2830
-.L2827:
+	beq	.L2965
+.L2962:
 	ldrb	w0, [x25]
 	cmp	w0, 181
-	bne	.L2831
+	bne	.L2966
 	strb	w27, [x25]
-.L2831:
-	add	w21, w21, 1
+.L2966:
+	add	w20, w20, 1
 	add	x25, x25, 8
-	and	w21, w21, 255
-	cmp	w21, 4
-	bne	.L2832
-	adrp	x0, .LANCHOR204
-	add	x8, x0, :lo12:.LANCHOR204
+	and	w20, w20, 255
+	cmp	w20, 4
+	bne	.L2967
+	adrp	x0, .LANCHOR214
+	add	x8, x0, :lo12:.LANCHOR214
 	add	x8, x8, 1
 	mov	x7, x0
-	add	x12, x22, :lo12:.LANCHOR44
+	add	x12, x22, :lo12:.LANCHOR48
 	mov	x10, 0
-.L2835:
+.L2970:
 	ldrb	w2, [x8, -1]
 	mov	w11, w10
 	lsl	x25, x10, 5
 	mov	x1, x12
 	mov	x0, x8
 	bl	flash_mem_cmp8
-	cbnz	w0, .L2833
-	add	x0, x7, :lo12:.LANCHOR204
+	cbnz	w0, .L2968
+	add	x0, x7, :lo12:.LANCHOR214
 	ubfiz	x11, x11, 5, 32
 	add	x25, x0, x25
 	add	x0, x0, x11
-	adrp	x1, .LANCHOR205
-	add	x4, x1, :lo12:.LANCHOR205
+	adrp	x1, .LANCHOR215
+	add	x4, x1, :lo12:.LANCHOR215
 	ldrb	w3, [x0, 22]
 	mov	x0, 0
-.L2834:
+.L2969:
 	lsl	x5, x0, 5
 	mov	w2, w0
 	ldrb	w5, [x5, x4]
 	cmp	w5, w3
-	beq	.L2836
+	beq	.L2971
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L2834
+	bne	.L2969
 	mov	w2, w0
-.L2836:
+.L2971:
 	ubfiz	x0, x2, 5, 32
-	add	x1, x1, :lo12:.LANCHOR205
+	add	x1, x1, :lo12:.LANCHOR215
 	add	x1, x1, x0
 	mov	w2, 32
 	adrp	x0, .LANCHOR20
+	add	x20, x19, :lo12:.LANCHOR33
 	add	x0, x0, :lo12:.LANCHOR20
+	adrp	x26, .LANCHOR28
 	bl	ftl_memcpy
-	add	x21, x19, :lo12:.LANCHOR32
-	mov	x1, x25
-	adrp	x25, .LANCHOR28
 	mov	w2, 32
-	mov	x0, x21
+	mov	x1, x25
+	mov	x0, x20
 	bl	ftl_memcpy
-	ldrb	w0, [x25, #:lo12:.LANCHOR28]
+	ldrb	w0, [x26, #:lo12:.LANCHOR28]
 	cmp	w0, 8
-	bhi	.L2837
-	ldrb	w0, [x21, 20]
+	bhi	.L2972
+	ldrb	w0, [x20, 20]
 	cmp	w0, 60
-	bls	.L2837
+	bls	.L2972
 	mov	w0, 60
-	strb	w0, [x21, 20]
-.L2837:
-	ldr	w0, [x20, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2865
-	adrp	x2, .LANCHOR203
-	adrp	x0, .LC91
-	add	x2, x2, :lo12:.LANCHOR203
-	mov	w1, 2787
-	add	x0, x0, :lo12:.LC91
+	strb	w0, [x20, 20]
+.L2972:
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L3002
+	adrp	x2, .LANCHOR213
+	adrp	x0, .LC97
+	add	x2, x2, :lo12:.LANCHOR213
+	mov	w1, 3456
+	add	x0, x0, :lo12:.LC97
 	bl	printf
-.L2865:
+.L3002:
 	ldr	x0, [x24, #:lo12:.LANCHOR16]
 	ldrh	w0, [x0, 10]
 	cmp	w0, 1023
-	bls	.L2838
+	bls	.L2973
 	mov	w0, 2
-	strb	w0, [x23, #:lo12:.LANCHOR31]
-.L2838:
+	strb	w0, [x23, #:lo12:.LANCHOR32]
+.L2973:
 	mov	w0, 16384
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR169
+	adrp	x1, .LANCHOR176
 	adrp	x23, .LANCHOR27
-	add	x21, x19, :lo12:.LANCHOR32
-	str	x0, [x1, #:lo12:.LANCHOR169]
+	add	x20, x19, :lo12:.LANCHOR33
+	adrp	x25, .LANCHOR49
+	str	x0, [x1, #:lo12:.LANCHOR176]
 	mov	w0, 16384
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR161
-	str	x0, [x1, #:lo12:.LANCHOR161]
+	adrp	x1, .LANCHOR166
+	str	x0, [x1, #:lo12:.LANCHOR166]
 	mov	w0, 2048
 	bl	ftl_malloc
 	str	x0, [x23, #:lo12:.LANCHOR27]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR168
-	str	x0, [x1, #:lo12:.LANCHOR168]
+	adrp	x1, .LANCHOR175
+	str	x0, [x1, #:lo12:.LANCHOR175]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR163
-	str	x0, [x1, #:lo12:.LANCHOR163]
+	adrp	x1, .LANCHOR168
+	str	x0, [x1, #:lo12:.LANCHOR168]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR200
-	str	x0, [x1, #:lo12:.LANCHOR200]
-	adrp	x0, .LANCHOR206
-	strb	wzr, [x0, #:lo12:.LANCHOR206]
+	adrp	x1, .LANCHOR210
+	str	x0, [x1, #:lo12:.LANCHOR210]
+	adrp	x0, .LANCHOR216
+	strb	wzr, [x0, #:lo12:.LANCHOR216]
 	bl	flash_die_info_init
-	ldrb	w0, [x21, 18]
+	ldrb	w0, [x20, 18]
 	bl	flash_lsb_page_tbl_build
-	ldrb	w0, [x21, 20]
-	adrp	x21, .LANCHOR167
+	ldrb	w0, [x20, 20]
+	adrp	x20, .LANCHOR174
 	bl	nandc_bch_sel
-	str	xzr, [x21, #:lo12:.LANCHOR167]
+	str	xzr, [x20, #:lo12:.LANCHOR174]
 	ldr	x2, [x24, #:lo12:.LANCHOR16]
-	adrp	x24, .LANCHOR45
 	ldrh	w0, [x2, 16]
 	ubfx	x1, x0, 8, 3
-	strb	w1, [x24, #:lo12:.LANCHOR45]
-	adrp	x1, .LANCHOR179
+	strb	w1, [x25, #:lo12:.LANCHOR49]
+	adrp	x1, .LANCHOR186
 	ubfx	x3, x0, 3, 1
-	strb	w3, [x1, #:lo12:.LANCHOR179]
-	adrp	x1, .LANCHOR41
+	strb	w3, [x1, #:lo12:.LANCHOR186]
+	adrp	x1, .LANCHOR45
 	ubfx	x3, x0, 4, 1
-	strb	w3, [x1, #:lo12:.LANCHOR41]
-	adrp	x1, .LANCHOR77
+	strb	w3, [x1, #:lo12:.LANCHOR45]
+	adrp	x1, .LANCHOR84
 	ubfx	x3, x0, 12, 1
-	strb	w3, [x1, #:lo12:.LANCHOR77]
-	adrp	x1, .LANCHOR74
+	strb	w3, [x1, #:lo12:.LANCHOR84]
+	adrp	x1, .LANCHOR81
 	ubfx	x3, x0, 13, 1
-	strb	w3, [x1, #:lo12:.LANCHOR74]
-	adrp	x1, .LANCHOR35
+	strb	w3, [x1, #:lo12:.LANCHOR81]
+	adrp	x1, .LANCHOR36
 	ubfx	x3, x0, 11, 1
-	strb	w3, [x1, #:lo12:.LANCHOR35]
-	adrp	x3, .LANCHOR118
+	strb	w3, [x1, #:lo12:.LANCHOR36]
+	adrp	x3, .LANCHOR124
 	ldrb	w1, [x2, 31]
 	ldrb	w2, [x2, 28]
 	ubfx	x4, x1, 1, 1
-	strb	w4, [x3, #:lo12:.LANCHOR118]
-	adrp	x3, .LANCHOR207
-	ubfx	x1, x1, 2, 1
-	strb	w1, [x3, #:lo12:.LANCHOR207]
-	adrp	x1, .LANCHOR1
-	ubfx	x3, x0, 14, 1
+	strb	w4, [x3, #:lo12:.LANCHOR124]
+	adrp	x3, .LANCHOR217
+	ubfx	x4, x1, 2, 1
+	strb	w4, [x3, #:lo12:.LANCHOR217]
+	adrp	x3, .LANCHOR1
+	ubfx	x4, x0, 14, 1
 	lsr	w0, w0, 15
-	strb	w3, [x1, #:lo12:.LANCHOR1]
-	adrp	x1, .LANCHOR75
-	strb	w0, [x1, #:lo12:.LANCHOR75]
+	strb	w4, [x3, #:lo12:.LANCHOR1]
+	adrp	x3, .LANCHOR82
+	strb	w0, [x3, #:lo12:.LANCHOR82]
 	adrp	x0, .LANCHOR0
-	mov	w1, 60
+	ubfx	x3, x1, 3, 1
+	ubfx	x1, x1, 4, 1
 	strb	w2, [x0, #:lo12:.LANCHOR0]
-	adrp	x0, .LANCHOR17
-	strb	w1, [x0, #:lo12:.LANCHOR17]
-	ldrb	w1, [x25, #:lo12:.LANCHOR28]
-	cmp	w1, 9
-	bne	.L2839
+	adrp	x0, .LANCHOR31
+	strb	w3, [x0, #:lo12:.LANCHOR31]
+	adrp	x0, .LANCHOR37
+	strb	w1, [x0, #:lo12:.LANCHOR37]
+	adrp	x1, .LANCHOR17
+	mov	w0, 60
+	strb	w0, [x1, #:lo12:.LANCHOR17]
+	ldrb	w0, [x26, #:lo12:.LANCHOR28]
+	cmp	w0, 9
+	bne	.L2974
 	mov	w3, 70
-	strb	w3, [x0, #:lo12:.LANCHOR17]
-.L2839:
-	adrp	x0, .LANCHOR19
-	strb	w2, [x0, #:lo12:.LANCHOR19]
-	add	x2, x19, :lo12:.LANCHOR32
-	ldrb	w2, [x2, 7]
-	cmp	w2, 9
-	bne	.L2840
-	strb	wzr, [x0, #:lo12:.LANCHOR19]
-.L2840:
-	add	x2, x19, :lo12:.LANCHOR32
-	ldrb	w3, [x2, 31]
-	tbz	x3, 0, .L2841
-	ldrb	w2, [x2, 29]
-	cbz	w2, .L2842
-	mov	w2, 2
-.L2894:
-	strb	w2, [x0, #:lo12:.LANCHOR19]
-.L2841:
-	cmp	w1, 8
-	bne	.L2843
-	ldrb	w1, [x22, #:lo12:.LANCHOR44]
-	mov	w2, 137
-	cmp	w1, 44
-	ccmp	w1, w2, 4, ne
-	bne	.L2843
-	add	x1, x19, :lo12:.LANCHOR32
-	ldrb	w1, [x1, 28]
-	cmp	w1, 3
-	bne	.L2843
-	strb	wzr, [x0, #:lo12:.LANCHOR19]
-.L2843:
-	add	x19, x19, :lo12:.LANCHOR32
-	adrp	x25, .LANCHOR24
-	ldrh	w1, [x19, 16]
-	ldrb	w0, [x19, 19]
-	strb	w0, [x25, #:lo12:.LANCHOR24]
-	tbz	x1, 6, .L2845
+	strb	w3, [x1, #:lo12:.LANCHOR17]
+.L2974:
+	add	x1, x19, :lo12:.LANCHOR33
+	adrp	x24, .LANCHOR19
+	strb	w2, [x24, #:lo12:.LANCHOR19]
+	ldrb	w2, [x1, 31]
+	tbz	x2, 0, .L2975
+	ldrb	w1, [x1, 29]
+	cbz	w1, .L2976
+	mov	w1, 2
+.L3034:
+	strb	w1, [x24, #:lo12:.LANCHOR19]
+.L2975:
+	cmp	w0, 8
+	bne	.L2977
+	ldrb	w0, [x22, #:lo12:.LANCHOR48]
+	mov	w1, 137
+	cmp	w0, 44
+	ccmp	w0, w1, 4, ne
+	bne	.L2977
+	add	x0, x19, :lo12:.LANCHOR33
+	ldrb	w0, [x0, 28]
+	cmp	w0, 3
+	bne	.L2977
+	strb	wzr, [x24, #:lo12:.LANCHOR19]
+.L2977:
+	add	x1, x19, :lo12:.LANCHOR33
+	adrp	x27, .LANCHOR24
+	ldrb	w0, [x1, 19]
+	ldrh	w1, [x1, 16]
+	strb	w0, [x27, #:lo12:.LANCHOR24]
+	tbz	x1, 6, .L2979
 	sub	w1, w0, #17
 	and	w1, w1, 255
 	cmp	w1, 2
 	ccmp	w0, 21, 4, hi
-	bne	.L2846
+	bne	.L2980
 	adrp	x1, micron_read_retrial
 	add	x1, x1, :lo12:micron_read_retrial
-	str	x1, [x21, #:lo12:.LANCHOR167]
+	str	x1, [x20, #:lo12:.LANCHOR174]
 	cmp	w0, 21
-	adrp	x0, .LANCHOR164
-	beq	.L2847
+	adrp	x0, .LANCHOR169
+	beq	.L2981
 	mov	w1, 15
-.L2896:
-	strb	w1, [x0, #:lo12:.LANCHOR164]
-	b	.L2845
-.L2833:
-	add	x10, x10, 1
+.L3036:
+	strb	w1, [x0, #:lo12:.LANCHOR169]
+.L2979:
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2990
+	adrp	x2, .LANCHOR213
+	adrp	x0, .LC97
+	add	x2, x2, :lo12:.LANCHOR213
+	mov	w1, 3549
+	add	x0, x0, :lo12:.LC97
+	bl	printf
+.L2990:
+	adrp	x26, .LANCHOR21
+	ldrb	w0, [x25, #:lo12:.LANCHOR49]
+	strb	wzr, [x26, #:lo12:.LANCHOR21]
+	tbz	x0, 0, .L2991
+	ldrb	w0, [x22, #:lo12:.LANCHOR48]
+	cmp	w0, 155
+	beq	.L2992
+	mov	w0, 4
+	bl	flash_set_interface_mode
+	mov	w0, 4
+	bl	nandc_set_if_mode
+.L2992:
+	mov	w0, 1
+	bl	flash_set_interface_mode
+	mov	w0, 1
+.L3038:
+	bl	nandc_set_if_mode
+	bl	flash_info_blk_init
+	mov	w8, w0
+	cmn	w0, #1
+	bne	.L2994
+	ldr	x0, [x23, #:lo12:.LANCHOR27]
+	mov	w1, 17
+	strb	w1, [x0, 32]
+	adrp	x0, .LANCHOR34
+	strb	wzr, [x0, #:lo12:.LANCHOR34]
+	mov	w0, 0
+	bl	zftl_flash_exit_slc_mode
+	b	.L2960
+.L2968:
+	add	x10, x10, 1
 	add	x8, x8, 32
-	cmp	x10, 46
-	bne	.L2835
-	b	.L2830
-.L2842:
-	mov	w2, 3
-	b	.L2894
-.L2847:
+	cmp	x10, 49
+	bne	.L2970
+	b	.L2965
+.L2976:
+	mov	w1, 3
+	b	.L3034
+.L2981:
 	mov	w1, 4
-	b	.L2896
-.L2846:
+	b	.L3036
+.L2980:
 	sub	w1, w0, #65
 	cmp	w0, 33
 	and	w1, w1, 255
 	ccmp	w1, 1, 0, ne
-	bhi	.L2849
+	bhi	.L2983
 	adrp	x0, toshiba_read_retrial
 	add	x0, x0, :lo12:toshiba_read_retrial
-	str	x0, [x21, #:lo12:.LANCHOR167]
+	str	x0, [x20, #:lo12:.LANCHOR174]
 	adrp	x0, .LANCHOR26
 	mov	w1, 4
 	strb	w1, [x0, #:lo12:.LANCHOR26]
-.L2898:
+.L3040:
 	mov	w1, 7
-	adrp	x0, .LANCHOR164
-	b	.L2896
-.L2849:
+.L3039:
+	adrp	x0, .LANCHOR169
+	b	.L3036
+.L2983:
 	sub	w2, w0, #34
 	sub	w1, w0, #67
 	and	w2, w2, 255
 	and	w1, w1, 255
 	cmp	w2, 1
 	ccmp	w1, 1, 0, hi
-	bhi	.L2850
+	bhi	.L2984
 	adrp	x2, toshiba_read_retrial
 	add	x2, x2, :lo12:toshiba_read_retrial
-	str	x2, [x21, #:lo12:.LANCHOR167]
+	str	x2, [x20, #:lo12:.LANCHOR174]
 	cmp	w0, 35
 	mov	w2, 68
 	ccmp	w0, w2, 4, ne
-	adrp	x0, .LANCHOR164
-	beq	.L2851
+	adrp	x0, .LANCHOR169
+	beq	.L2985
 	mov	w2, 7
-.L2895:
-	strb	w2, [x0, #:lo12:.LANCHOR164]
+.L3035:
+	strb	w2, [x0, #:lo12:.LANCHOR169]
 	cmp	w1, 1
 	adrp	x0, .LANCHOR26
-	bhi	.L2853
+	bhi	.L2987
 	mov	w1, 4
-.L2897:
+.L3037:
 	strb	w1, [x0, #:lo12:.LANCHOR26]
-.L2845:
-	ldr	w0, [x20, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2854
-	adrp	x2, .LANCHOR203
-	adrp	x0, .LC91
-	add	x2, x2, :lo12:.LANCHOR203
-	mov	w1, 2863
-	add	x0, x0, :lo12:.LC91
-	bl	printf
-.L2854:
-	adrp	x22, .LANCHOR21
-	ldrb	w0, [x24, #:lo12:.LANCHOR45]
-	strb	wzr, [x22, #:lo12:.LANCHOR21]
-	tbz	x0, 0, .L2855
-	mov	w0, 4
-	bl	nandc_set_if_mode
-	mov	w0, 1
-	bl	flash_set_interface_mode
-	mov	w0, 1
-.L2899:
-	bl	nandc_set_if_mode
-	bl	flash_info_blk_init
-	mov	w19, w0
-	cmn	w0, #1
-	bne	.L2857
-	ldr	w0, [x20, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2858
-	adrp	x2, .LANCHOR203
-	adrp	x0, .LC91
-	add	x2, x2, :lo12:.LANCHOR203
-	mov	w1, 2881
-	add	x0, x0, :lo12:.LC91
-	bl	printf
-.L2858:
-	ldr	x0, [x23, #:lo12:.LANCHOR27]
-	mov	w1, 17
-	strb	w1, [x0, 32]
-	adrp	x0, .LANCHOR33
-	strb	wzr, [x0, #:lo12:.LANCHOR33]
-	mov	w0, 0
-	bl	zftl_flash_exit_slc_mode
-	b	.L2825
-.L2851:
+	b	.L2979
+.L2985:
 	mov	w2, 17
-	b	.L2895
-.L2853:
+	b	.L3035
+.L2987:
 	mov	w1, 5
-	b	.L2897
-.L2850:
-	sub	w0, w0, #36
-	and	w0, w0, 255
-	cmp	w0, 1
-	bhi	.L2845
+	b	.L3037
+.L2984:
+	sub	w1, w0, #36
+	and	w1, w1, 255
+	cmp	w1, 1
+	bhi	.L2988
 	adrp	x0, toshiba_3d_read_retrial
 	add	x0, x0, :lo12:toshiba_3d_read_retrial
-	str	x0, [x21, #:lo12:.LANCHOR167]
-	b	.L2898
-.L2855:
+	str	x0, [x20, #:lo12:.LANCHOR174]
+	b	.L3040
+.L2988:
+	cmp	w0, 50
+	bne	.L2989
+	adrp	x0, samsung_read_retrial
+	mov	w1, 25
+	add	x0, x0, :lo12:samsung_read_retrial
+	str	x0, [x20, #:lo12:.LANCHOR174]
+	b	.L3039
+.L2989:
+	cmp	w0, 81
+	bne	.L2979
+	adrp	x0, ymtc_3d_read_retrial
+	add	x0, x0, :lo12:ymtc_3d_read_retrial
+	str	x0, [x20, #:lo12:.LANCHOR174]
+	adrp	x0, .LANCHOR169
+	mov	w1, 7
+	strb	w1, [x0, #:lo12:.LANCHOR169]
+	adrp	x0, .LANCHOR51
+	strb	wzr, [x0, #:lo12:.LANCHOR51]
+	b	.L2979
+.L2991:
 	mov	w0, 4
-	b	.L2899
-.L2857:
-	ldrb	w0, [x25, #:lo12:.LANCHOR24]
+	b	.L3038
+.L2994:
+	add	x19, x19, :lo12:.LANCHOR33
+	ldrb	w0, [x19, 7]
+	cmp	w0, 9
+	bne	.L2995
+	ldr	x0, [x23, #:lo12:.LANCHOR27]
+	ldrb	w0, [x0, 20]
+	cmp	w0, 1
+	beq	.L2995
+	strb	wzr, [x24, #:lo12:.LANCHOR19]
+.L2995:
+	ldrb	w0, [x27, #:lo12:.LANCHOR24]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 7
-	bhi	.L2859
+	bhi	.L2996
 	adrp	x0, hynix_read_retrial
 	add	x0, x0, :lo12:hynix_read_retrial
-	str	x0, [x21, #:lo12:.LANCHOR167]
-.L2859:
-	ldrb	w0, [x24, #:lo12:.LANCHOR45]
-	tbz	x0, 2, .L2861
+	str	x0, [x20, #:lo12:.LANCHOR174]
+.L2996:
+	ldrb	w0, [x25, #:lo12:.LANCHOR49]
+	tbz	x0, 2, .L2998
 	ldr	x0, [x23, #:lo12:.LANCHOR27]
 	ldrb	w0, [x0, 19]
-	cbz	w0, .L2861
-	adrp	x0, .LANCHOR201
-	ldrb	w1, [x0, #:lo12:.LANCHOR201]
+	cbz	w0, .L2998
+	adrp	x0, .LANCHOR211
+	ldrb	w1, [x0, #:lo12:.LANCHOR211]
 	adrp	x0, .LANCHOR2
 	ldrh	w0, [x0, #:lo12:.LANCHOR2]
 	mul	w1, w1, w0
 	mov	w0, 0
 	bl	flash_ddr_para_scan
-	ldrb	w0, [x22, #:lo12:.LANCHOR21]
-	cbnz	w0, .L2861
+	ldrb	w0, [x26, #:lo12:.LANCHOR21]
+	cbnz	w0, .L2998
 	ldr	x0, [x23, #:lo12:.LANCHOR27]
 	strb	wzr, [x0, 19]
 	bl	flash_info_flush
-.L2861:
-	ldr	w0, [x20, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2863
-	adrp	x2, .LANCHOR203
-	adrp	x0, .LC91
-	add	x2, x2, :lo12:.LANCHOR203
-	mov	w1, 2935
-	add	x0, x0, :lo12:.LC91
+.L2998:
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L3000
+	adrp	x2, .LANCHOR213
+	adrp	x0, .LC97
+	add	x2, x2, :lo12:.LANCHOR213
+	mov	w1, 3647
+	add	x0, x0, :lo12:.LC97
 	bl	printf
-.L2863:
+.L3000:
 	bl	nand_flash_print_info
-	mov	w19, 0
-	b	.L2825
+	mov	w8, 0
+	b	.L2960
 	.size	nand_flash_init, .-nand_flash_init
 	.section	.text.ftl_sysblk_dump,"ax",@progbits
 	.align	2
@@ -18159,21 +19040,21 @@ ftl_sysblk_dump:
 	stp	x25, x26, [sp, 112]
 	mov	w0, 1
 	stp	x27, x28, [sp, 128]
-	adrp	x25, .LANCHOR87
+	adrp	x25, .LANCHOR95
 	stp	x21, x22, [sp, 80]
 	bl	buf_alloc
 	ldr	x28, [x0, 8]
-	adrp	x26, .LANCHOR105
-	adrp	x27, .LANCHOR126
+	adrp	x26, .LANCHOR111
+	adrp	x27, .LANCHOR131
 	mov	x24, x0
-	add	x25, x25, :lo12:.LANCHOR87
-	add	x26, x26, :lo12:.LANCHOR105
-	add	x27, x27, :lo12:.LANCHOR126
+	add	x25, x25, :lo12:.LANCHOR95
+	add	x26, x26, :lo12:.LANCHOR111
+	add	x27, x27, :lo12:.LANCHOR131
 	mov	w19, 0
-.L2901:
+.L3042:
 	ldrh	w0, [x25]
 	cmp	w0, w19
-	bhi	.L2903
+	bhi	.L3044
 	add	x1, x28, 704
 	mov	w3, 32
 	mov	w2, 4
@@ -18182,14 +19063,14 @@ ftl_sysblk_dump:
 	bl	rknand_print_hex
 	mov	x0, x24
 	bl	zbuf_free
-	cbz	w20, .L2904
-	adrp	x1, .LANCHOR208
+	cbz	w20, .L3045
+	adrp	x1, .LANCHOR218
 	adrp	x0, .LC0
-	mov	w2, 1432
-	add	x1, x1, :lo12:.LANCHOR208
+	mov	w2, 1611
+	add	x1, x1, :lo12:.LANCHOR218
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2904:
+.L3045:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
@@ -18199,7 +19080,7 @@ ftl_sysblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 144
 	ret
-.L2903:
+.L3044:
 	ldrh	w21, [x26]
 	ldrb	w3, [x27]
 	ldr	x1, [x24, 8]
@@ -18234,1908 +19115,2279 @@ ftl_sysblk_dump:
 	cmp	w22, 512
 	ccmn	w22, #1, 4, ne
 	csinc	w20, w20, wzr, ne
-	b	.L2901
+	b	.L3042
 	.size	ftl_sysblk_dump, .-ftl_sysblk_dump
-	.section	.text.dump_ftl_info,"ax",@progbits
+	.section	.text.ftl_open_sblk_recovery,"ax",@progbits
 	.align	2
-	.global	dump_ftl_info
-	.type	dump_ftl_info, %function
-dump_ftl_info:
-	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LANCHOR54
+	.global	ftl_open_sblk_recovery
+	.type	ftl_open_sblk_recovery, %function
+ftl_open_sblk_recovery:
+	stp	x29, x30, [sp, -368]!
 	add	x29, sp, 0
-	ldrb	w1, [x0, #:lo12:.LANCHOR54]
-	adrp	x0, .LC177
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR14
 	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	str	x1, [x29, 136]
+	tbz	x0, 12, .L3053
+	ldrh	w1, [x19, 2]
+	adrp	x0, .LC177
 	add	x0, x0, :lo12:.LC177
-	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR104
-	adrp	x19, .LANCHOR10
-	adrp	x20, .LANCHOR87
 	bl	printf
-	adrp	x21, .LANCHOR6
-	adrp	x0, .LANCHOR185
-	add	x1, x0, :lo12:.LANCHOR185
-	ldrh	w3, [x1, 2]
-	ldrb	w2, [x1, 1]
-	ldrb	w1, [x0, #:lo12:.LANCHOR185]
+.L3053:
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L3054
+	ldrb	w1, [x19, 5]
 	adrp	x0, .LC178
 	add	x0, x0, :lo12:.LC178
 	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR104]
-	ldrh	w2, [x0, 140]
-	ldrh	w1, [x0, 130]
+.L3054:
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L3055
+	ldrh	w1, [x19]
 	adrp	x0, .LC179
 	add	x0, x0, :lo12:.LC179
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR10]
+.L3055:
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L3056
+	ldrh	w2, [x19, 18]
 	adrp	x0, .LC180
+	ldrh	w1, [x19, 16]
 	add	x0, x0, :lo12:.LC180
-	ldrh	w5, [x1, 26]
-	ldrh	w4, [x1, 22]
-	ldrb	w3, [x1, 21]
-	ldrh	w2, [x1, 18]
-	ldrh	w1, [x1, 16]
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR10]
+.L3056:
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L3057
+	ldrb	w1, [x19, 9]
 	adrp	x0, .LC181
 	add	x0, x0, :lo12:.LC181
-	ldrh	w5, [x1, 58]
-	ldrh	w4, [x1, 54]
-	ldrb	w3, [x1, 53]
-	ldrh	w2, [x1, 50]
-	ldrh	w1, [x1, 48]
-	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR10]
-	adrp	x19, .LANCHOR80
-	adrp	x0, .LC182
-	add	x0, x0, :lo12:.LC182
-	ldrh	w5, [x1, 90]
-	ldrh	w4, [x1, 86]
-	ldrb	w3, [x1, 85]
-	ldrh	w2, [x1, 82]
-	ldrh	w1, [x1, 80]
 	bl	printf
-	ldrb	w0, [x19, #:lo12:.LANCHOR80]
-	mov	w2, 4
-	ldrh	w3, [x20, #:lo12:.LANCHOR87]
-	mul	w3, w3, w0
+.L3057:
+	ldrh	w0, [x19, 10]
+	strh	w0, [x19, 14]
+	adrp	x0, .LANCHOR6
+	ldrh	w1, [x19]
+	ldrh	w0, [x0, #:lo12:.LANCHOR6]
+	cmp	w1, w0
+	bcs	.L3052
+	mov	w0, 1
+	adrp	x22, .LANCHOR131
+	bl	buf_alloc
+	mov	x20, x0
+	ldrb	w0, [x22, #:lo12:.LANCHOR131]
+	add	x26, x29, 176
+	mov	w2, 64
+	mov	w27, 2
+	ldr	x1, [x20, 8]
+	sub	w0, w0, #2
+	lsl	w0, w0, 7
+	add	x0, x1, x0, sxtw 2
+	mov	w1, 255
+	str	x0, [x29, 144]
+	mov	x0, x26
+	bl	ftl_memset
+	mov	w2, 64
+	mov	w1, 255
+	add	x0, x29, 240
+	bl	ftl_memset
+	mov	w2, 64
+	mov	w1, 255
+	add	x0, x29, 304
+	bl	ftl_memset
+	ldrb	w23, [x19, 5]
 	adrp	x0, .LANCHOR111
-	ldr	x1, [x0, #:lo12:.LANCHOR111]
-	adrp	x0, .LC183
-	lsl	w3, w3, 1
-	add	x0, x0, :lo12:.LC183
-	bl	rknand_print_hex
-	adrp	x0, .LANCHOR9
-	ldrh	w3, [x21, #:lo12:.LANCHOR6]
-	mov	w2, 2
-	ldr	x1, [x0, #:lo12:.LANCHOR9]
+	ldrh	w24, [x19, 2]
+	add	x0, x0, :lo12:.LANCHOR111
+	str	wzr, [x29, 156]
+	str	x0, [x29, 120]
+.L3059:
+	adrp	x25, .LANCHOR95
+	ldrh	w0, [x25, #:lo12:.LANCHOR95]
+	cmp	w0, w24
+	bhi	.L3074
+.L3062:
+	ldrh	w0, [x19, 10]
+	ldrh	w1, [x19, 6]
+	ldrh	w2, [x25, #:lo12:.LANCHOR95]
+	add	w1, w1, w0
+	ldrb	w0, [x19, 9]
+	strh	w24, [x19, 2]
+	strb	w23, [x19, 5]
+	mul	w0, w0, w2
+	cmp	w1, w0
+	beq	.L3075
+	adrp	x1, .LANCHOR219
+	adrp	x0, .LC0
+	mov	w2, 1794
+	add	x1, x1, :lo12:.LANCHOR219
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L3075:
+	adrp	x2, .LANCHOR117
+	ldrh	w3, [x19, 10]
+	mov	w0, 0
+	mov	w1, 0
+	ldr	x4, [x2, #:lo12:.LANCHOR117]
+	str	x2, [x29, 144]
+.L3076:
+	cmp	w1, w3
+	bcc	.L3078
+	ldrb	w23, [x19, 9]
+	adrp	x24, .LANCHOR9
+	ldrh	w1, [x25, #:lo12:.LANCHOR95]
+	madd	w23, w23, w1, w0
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	sub	w23, w23, w3
+	and	w23, w23, 65535
+	tbz	x0, 12, .L3079
+	ldrh	w1, [x19]
+	ldr	x2, [x24, #:lo12:.LANCHOR9]
+	ubfiz	x0, x1, 1, 16
+	ldrh	w3, [x2, x0]
 	adrp	x0, .LC184
+	mov	w2, w23
 	add	x0, x0, :lo12:.LC184
-	bl	rknand_print_hex
-	ldr	x1, [x22, #:lo12:.LANCHOR104]
-	mov	w2, 4
-	adrp	x0, .LC176
-	add	x0, x0, :lo12:.LC176
-	add	x1, x1, 704
-	ldrh	w3, [x1, -6]
-	bl	rknand_print_hex
-	adrp	x0, .LANCHOR7
-	ldrh	w3, [x21, #:lo12:.LANCHOR6]
-	mov	w2, 4
-	ldr	x1, [x0, #:lo12:.LANCHOR7]
+	bl	printf
+.L3079:
+	ldr	x0, [x24, #:lo12:.LANCHOR9]
+	ldrh	w1, [x19]
+	strh	w23, [x0, x1, lsl 1]
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 14, .L3080
+	ldp	w1, w2, [x29, 176]
 	adrp	x0, .LC185
+	ldp	w3, w4, [x29, 184]
 	add	x0, x0, :lo12:.LC185
-	bl	rknand_print_hex
-	mov	w3, 256
-	mov	w2, 2
-	adrp	x1, .LANCHOR110
-	adrp	x0, .LC186
-	add	x1, x1, :lo12:.LANCHOR110
-	add	x0, x0, :lo12:.LC186
-	bl	rknand_print_hex
-	ldrb	w0, [x19, #:lo12:.LANCHOR80]
-	mov	w2, 2
-	ldrh	w3, [x20, #:lo12:.LANCHOR87]
-	ldp	x21, x22, [sp, 32]
-	ldp	x19, x20, [sp, 16]
-	mul	w3, w3, w0
-	adrp	x0, .LANCHOR112
-	ldp	x29, x30, [sp], 48
-	lsl	w3, w3, 1
-	ldr	x1, [x0, #:lo12:.LANCHOR112]
+	bl	printf
+.L3080:
+	ldr	x0, [x20, 8]
+	mov	w1, 0
+	ldrb	w2, [x22, #:lo12:.LANCHOR131]
+	adrp	x28, .LANCHOR80
+	mov	x24, 0
+	lsl	w2, w2, 9
+	bl	ftl_memset
 	adrp	x0, .LC187
 	add	x0, x0, :lo12:.LC187
-	b	rknand_print_hex
-	.size	dump_ftl_info, .-dump_ftl_info
-	.section	.text.pm_ppa_update_check,"ax",@progbits
-	.align	2
-	.global	pm_ppa_update_check
-	.type	pm_ppa_update_check, %function
-pm_ppa_update_check:
-	adrp	x4, .LANCHOR31
-	adrp	x3, .LANCHOR68
-	mov	w5, 24
-	ldrb	w4, [x4, #:lo12:.LANCHOR31]
-	ldrh	w3, [x3, #:lo12:.LANCHOR68]
-	sub	w4, w5, w4
-	sub	w5, w4, w3
-	mov	w4, 1
-	lsr	w3, w2, w3
-	lsl	w4, w4, w5
-	sub	w4, w4, #1
-	and	w4, w4, w3
-	adrp	x3, .LANCHOR69
-	ldrb	w3, [x3, #:lo12:.LANCHOR69]
-	udiv	w4, w4, w3
-	adrp	x3, .LANCHOR7
-	ldr	x3, [x3, #:lo12:.LANCHOR7]
-	add	x4, x3, x4, uxth 2
-	ldrb	w3, [x4, 2]
-	ubfx	x3, x3, 5, 3
-	cmp	w3, 1
-	ccmp	w3, 7, 4, ne
-	bne	.L2915
-	mov	w3, w2
-	mov	w2, w1
-	mov	x1, x0
-	stp	x29, x30, [sp, -16]!
-	adrp	x0, .LC188
-	add	x0, x0, :lo12:.LC188
-	add	x29, sp, 0
-	bl	printf
-	bl	dump_ftl_info
-	mov	w0, -1
-	ldp	x29, x30, [sp], 16
-	ret
-.L2915:
-	mov	w0, 0
-	ret
-	.size	pm_ppa_update_check, .-pm_ppa_update_check
-	.section	.text.load_l2p_region,"ax",@progbits
-	.align	2
-	.type	load_l2p_region, %function
-load_l2p_region:
-	stp	x29, x30, [sp, -80]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	and	w19, w0, 65535
-	stp	x21, x22, [sp, 32]
-	and	x21, x1, 65535
-	stp	x23, x24, [sp, 48]
-	cmp	w21, 31
-	stp	x25, x26, [sp, 64]
-	bls	.L2921
-	adrp	x1, .LANCHOR209
+	str	x0, [x29, 128]
+	add	x0, x28, :lo12:.LANCHOR80
+	str	x0, [x29, 120]
+.L3081:
+	ldrb	w0, [x28, #:lo12:.LANCHOR80]
+	add	x1, x28, :lo12:.LANCHOR80
+	str	w24, [x29, 168]
+	mul	w0, w0, w27
+	cmp	w24, w0
+	bcc	.L3093
+	adrp	x24, .LC188
+	adrp	x23, .LC187
+	add	x24, x24, :lo12:.LC188
+	add	x23, x23, :lo12:.LC187
+	mov	x28, 0
+	str	x1, [x29, 160]
+.L3094:
+	ldr	x0, [x29, 160]
+	ldrb	w0, [x0]
+	mul	w0, w0, w27
+	cmp	w0, w28
+	bhi	.L3100
+	mov	x0, x20
+	bl	zbuf_free
+	ldrh	w1, [x19, 12]
+	ldrh	w0, [x25, #:lo12:.LANCHOR95]
+	ldrb	w2, [x19, 9]
+	madd	w0, w0, w2, w1
+	mov	x1, -4
+	add	x0, x1, x0, sxtw 2
+	ldr	x1, [x29, 144]
+	ldr	x1, [x1, #:lo12:.LANCHOR117]
+	ldr	w0, [x1, x0]
+	cmn	w0, #1
+	beq	.L3101
+	adrp	x1, .LANCHOR219
 	adrp	x0, .LC0
-	mov	w2, 32
-	add	x1, x1, :lo12:.LANCHOR209
+	mov	w2, 1909
+	add	x1, x1, :lo12:.LANCHOR219
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2921:
-	adrp	x20, .LANCHOR104
-	mov	x25, x20
-	ldr	x0, [x20, #:lo12:.LANCHOR104]
-	ldrh	w2, [x0, 698]
-	cmp	w2, w19
-	bcs	.L2922
-	mov	w1, w19
-	adrp	x0, .LC189
-	add	x0, x0, :lo12:.LC189
-	bl	printf
-	adrp	x0, .LANCHOR210
-	mov	w1, 255
-	ldrh	w2, [x0, #:lo12:.LANCHOR210]
-	mov	x0, 0
-	ldr	x0, [x0, 8]
-	bl	ftl_memset
-	ldr	x0, [x20, #:lo12:.LANCHOR104]
-	ldrh	w0, [x0, 698]
-	cmp	w0, w19
-	bcc	.L2923
-.L2933:
-	mov	w0, 0
-.L2920:
+.L3101:
+	ldrh	w0, [x19, 6]
+	cmp	w0, 1
+	bne	.L3052
+	mov	x0, x19
+	bl	ftl_write_last_log_page
+.L3052:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 368
 	ret
-.L2923:
-	mov	w2, 36
-.L2934:
-	adrp	x1, .LANCHOR209
+.L3074:
+	ldrb	w23, [x19, 5]
+	adrp	x0, .LANCHOR198
+	add	x0, x0, :lo12:.LANCHOR198
+	str	x0, [x29, 128]
+.L3060:
+	ldrb	w0, [x19, 9]
+	cmp	w0, w23
+	bhi	.L3073
+	add	w24, w24, 1
+	strb	wzr, [x19, 5]
+	and	w24, w24, 65535
+	b	.L3059
+.L3073:
+	add	x0, x19, x23, sxtw 1
+	ldrh	w0, [x0, 16]
+	str	w0, [x29, 168]
+	mov	w0, 65535
+	ldr	w1, [x29, 168]
+	cmp	w1, w0
+	beq	.L3061
+	ldr	x0, [x29, 120]
+	ldrb	w3, [x22, #:lo12:.LANCHOR131]
+	ldr	x2, [x20, 24]
+	ldrh	w0, [x0]
+	madd	w0, w0, w1, w24
+	ldr	x1, [x20, 8]
+	str	w0, [x29, 160]
+	bl	ftl_read_ppa_page
+	mov	w28, w0
+	cmp	w0, 512
+	beq	.L3062
+	cmn	w0, #1
+	beq	.L3063
+	ldr	x0, [x20, 24]
+	ldr	w1, [x0]
+	cmn	w1, #1
+	bne	.L3063
+	ldr	w0, [x0, 4]
+	cmn	w0, #1
+	bne	.L3063
+	ldr	x0, [x20, 8]
+	ldr	w0, [x0]
+	cmn	w0, #1
+	beq	.L3062
+.L3063:
+	ldr	x1, [x29, 128]
+	mov	w0, 1
+	strb	w0, [x1]
+	ldrb	w0, [x19, 9]
+	ldrh	w1, [x19, 10]
+	madd	w0, w0, w24, w23
+	cmp	w1, w0
+	beq	.L3064
+	adrp	x1, .LANCHOR219
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR209
+	mov	w2, 1686
+	add	x1, x1, :lo12:.LANCHOR219
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L2933
-.L2922:
-	add	x0, x0, x19, sxtw 2
-	adrp	x22, .LANCHOR135
-	add	x1, x22, :lo12:.LANCHOR135
-	ldr	w23, [x0, 704]
-	lsl	x0, x21, 4
-	add	x26, x1, x0
-	strh	w19, [x1, x0]
-	strh	wzr, [x26, 2]
-	cbnz	w23, .L2925
-	mov	w1, w19
-	mov	w2, 0
-	adrp	x0, .LC190
-	add	x0, x0, :lo12:.LC190
+.L3064:
+	ldrh	w0, [x19, 10]
+	ldrh	w1, [x19, 6]
+	ldrb	w2, [x19, 9]
+	add	w1, w1, w0
+	ldrh	w0, [x25, #:lo12:.LANCHOR95]
+	mul	w0, w0, w2
+	cmp	w1, w0
+	beq	.L3065
+	adrp	x1, .LANCHOR219
+	adrp	x0, .LC0
+	mov	w2, 1687
+	add	x1, x1, :lo12:.LANCHOR219
+	add	x0, x0, :lo12:.LC0
 	bl	printf
-	adrp	x0, .LANCHOR210
-	mov	w1, 255
-	ldrh	w2, [x0, #:lo12:.LANCHOR210]
-	ldr	x0, [x26, 8]
-	bl	ftl_memset
-	b	.L2933
-.L2925:
-	adrp	x20, .LANCHOR197
-	adrp	x24, .LANCHOR126
-	ldr	x1, [x26, 8]
-	mov	w0, w23
-	ldr	x2, [x20, #:lo12:.LANCHOR197]
-	ldrb	w3, [x24, #:lo12:.LANCHOR126]
-	bl	ftl_read_ppa_page
-	ldr	x1, [x20, #:lo12:.LANCHOR197]
-	ldr	w2, [x1]
-	cmp	w2, w19
-	bne	.L2926
-	cmp	w0, 512
-	ccmn	w0, #1, 4, ne
-	beq	.L2926
-.L2930:
-	ldr	x0, [x20, #:lo12:.LANCHOR197]
-	ldr	w0, [x0]
-	cmp	w19, w0
-	beq	.L2933
-	mov	w2, 67
-	b	.L2934
-.L2926:
-	mov	w4, w23
-	mov	w3, w0
-	mov	w1, w19
-	adrp	x0, .LC191
-	add	x0, x0, :lo12:.LC191
+.L3065:
+	ldrb	w0, [x22, #:lo12:.LANCHOR131]
+	cmp	w0, 8
+	bls	.L3066
+	ldr	x6, [x20, 24]
+	mov	w1, 15555
+	movk	w1, 0xf55f, lsl 16
+	ldr	w0, [x6]
+	cmp	w0, w1
+	beq	.L3066
+	cmn	w28, #1
+	beq	.L3068
+	ldr	w0, [x6, 4]
+	cmn	w0, #1
+	beq	.L3069
+	ldr	w1, [x6, 16]
+	mov	w0, 21320
+	movk	w0, 0x4841, lsl 16
+	cmp	w1, w0
+	bne	.L3069
+	ldr	x0, [x29, 144]
+	mov	w1, 1024
+	bl	js_hash
+	ldr	w1, [x6, 20]
+	cmp	w1, w0
+	beq	.L3069
+	ldr	w3, [x29, 160]
+	mov	w5, w0
+	ldr	w1, [x29, 168]
+	mov	w4, w28
+	mov	w2, w24
+	adrp	x0, .LC182
+	add	x0, x0, :lo12:.LC182
 	bl	printf
-	ldr	x1, [x25, #:lo12:.LANCHOR104]
-	add	x22, x22, :lo12:.LANCHOR135
-	add	x21, x22, x21, lsl 4
-	mov	w2, 4
-	add	x1, x1, 704
-	adrp	x0, .LC192
-	add	x0, x0, :lo12:.LC192
-	ldrh	w3, [x1, -6]
-	bl	rknand_print_hex
-	ldr	x1, [x21, 8]
+	ldr	x1, [x29, 144]
+	mov	w3, 16
 	mov	w2, 4
-	ldrb	w3, [x24, #:lo12:.LANCHOR126]
-	adrp	x0, .LC193
-	add	x0, x0, :lo12:.LC193
-	lsl	w3, w3, 7
+	adrp	x0, .LC183
+	add	x0, x0, :lo12:.LC183
 	bl	rknand_print_hex
-	ldr	x1, [x20, #:lo12:.LANCHOR197]
-	mov	w3, 16
+	ldr	x1, [x20, 24]
+	adrp	x0, .LC150
+	ldrb	w3, [x22, #:lo12:.LANCHOR131]
 	mov	w2, 4
-	adrp	x0, .LC194
-	add	x0, x0, :lo12:.LC194
+	add	x0, x0, :lo12:.LC150
+	lsr	w3, w3, 1
 	bl	rknand_print_hex
-	ldrb	w3, [x24, #:lo12:.LANCHOR126]
-	mov	w0, w23
-	ldr	x2, [x20, #:lo12:.LANCHOR197]
-	ldr	x1, [x21, 8]
-	bl	ftl_read_ppa_page
-	cmp	w0, 512
-	ccmn	w0, #1, 4, ne
-	bne	.L2929
-	adrp	x0, .LANCHOR210
-	mov	w1, 255
-	ldrh	w2, [x0, #:lo12:.LANCHOR210]
-	ldr	x0, [x21, 8]
-	bl	ftl_memset
-.L2931:
-	mov	w0, -1
-	b	.L2920
-.L2929:
-	ldr	x0, [x20, #:lo12:.LANCHOR197]
-	ldr	w0, [x0]
-	cmp	w19, w0
-	beq	.L2930
-	b	.L2931
-	.size	load_l2p_region, .-load_l2p_region
-	.section	.text.pm_gc,"ax",@progbits
-	.align	2
-	.global	pm_gc
-	.type	pm_gc, %function
-pm_gc:
-	stp	x29, x30, [sp, -96]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR104
-	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR148
-	ldr	x0, [x19, #:lo12:.LANCHOR104]
-	stp	x23, x24, [sp, 48]
-	stp	x25, x26, [sp, 64]
-	ldrh	w2, [x0, 688]
-	adrp	x0, .LANCHOR151
-	str	x27, [sp, 80]
-	mov	x20, x0
-	ldrh	w1, [x0, #:lo12:.LANCHOR151]
+.L3068:
+	ldrh	w0, [x19, 6]
+	mov	w27, 4
+	sub	w0, w0, #1
+	strh	w0, [x19, 6]
+	ldrh	w0, [x19, 10]
+	add	w0, w0, 1
+	strh	w0, [x19, 10]
+	mov	w0, 1
+	str	w0, [x29, 156]
+.L3061:
+	add	w23, w23, 1
+	and	w23, w23, 65535
+	b	.L3060
+.L3066:
+	cmn	w28, #1
+	beq	.L3068
+.L3069:
+	ldr	x1, [x20, 24]
+	ldr	w0, [x1, 4]
+	cmn	w0, #1
+	beq	.L3068
+	ldr	w1, [x1]
+	mov	w2, 15555
+	movk	w2, 0xf55f, lsl 16
+	cmp	w1, w2
+	beq	.L3068
+	bl	lpa_hash_get_ppa
+	ldr	x1, [x29, 136]
+	cbz	x1, .L3071
+	ldr	x3, [x20, 24]
+	ldr	w1, [x3, 8]
+	cmp	w0, w1
+	beq	.L3071
+	cmn	w0, #1
+	beq	.L3071
+	adrp	x4, .LANCHOR32
+	adrp	x5, .LANCHOR75
+	mov	w28, 24
+	mov	w27, 1
+	ldrb	w1, [x4, #:lo12:.LANCHOR32]
+	ldrh	w6, [x5, #:lo12:.LANCHOR75]
+	sub	w1, w28, w1
+	sub	w1, w1, w6
+	lsr	w2, w0, w6
+	adrp	x6, .LANCHOR76
+	lsl	w1, w27, w1
 	sub	w1, w1, #1
-	cmp	w2, w1
-	bge	.L2936
-	ldr	w0, [x21, #:lo12:.LANCHOR148]
-	cbz	w0, .L2937
-.L2936:
-	bl	pm_free_sblk
-	ldr	x2, [x19, #:lo12:.LANCHOR104]
-	ldrh	w1, [x20, #:lo12:.LANCHOR151]
-	sub	w1, w1, #1
-	ldrh	w3, [x2, 688]
-	cmp	w3, w1
-	bge	.L2938
-	ldr	w1, [x21, #:lo12:.LANCHOR148]
-	cbz	w1, .L2937
-.L2938:
-	add	x0, x2, x0, uxth 1
-	str	wzr, [x21, #:lo12:.LANCHOR148]
-	mov	w20, 65535
-	ldrh	w21, [x0, 416]
-	cmp	w21, w20
-	bne	.L2940
-	adrp	x1, .LANCHOR211
-	add	x1, x1, :lo12:.LANCHOR211
-	mov	w2, 166
-	adrp	x0, .LC0
-	add	x0, x0, :lo12:.LC0
+	and	w1, w1, w2
+	ldrb	w2, [x6, #:lo12:.LANCHOR76]
+	udiv	w1, w1, w2
+	ldr	x2, [x29, 136]
+	ldrh	w2, [x2]
+	cmp	w2, w1, uxth
+	bne	.L3071
+	ldr	w8, [x3]
+	adrp	x7, .LANCHOR193
+	ldrb	w3, [x22, #:lo12:.LANCHOR131]
+	add	x2, x7, :lo12:.LANCHOR193
+	ldr	x1, [x20, 8]
+	str	w8, [x29, 156]
+	str	x7, [x29, 168]
+	stp	x6, x4, [x29, 96]
+	str	x5, [x29, 112]
+	bl	ftl_read_ppa_page
+	ldr	x7, [x29, 168]
+	ldr	w8, [x29, 156]
+	ldr	w0, [x7, #:lo12:.LANCHOR193]
+	cmp	w8, w0
+	bhi	.L3071
+	ldr	x0, [x20, 24]
+	ldr	w0, [x0, 8]
+	cmn	w0, #1
+	beq	.L3068
+	ldp	x6, x4, [x29, 96]
+	ldr	x5, [x29, 112]
+	ldrb	w2, [x4, #:lo12:.LANCHOR32]
+	ldrh	w1, [x5, #:lo12:.LANCHOR75]
+	sub	w28, w28, w2
+	sub	w28, w28, w1
+	lsr	w0, w0, w1
+	lsl	w27, w27, w28
+	sub	w27, w27, #1
+	and	w27, w27, w0
+	ldrb	w0, [x6, #:lo12:.LANCHOR76]
+	udiv	w0, w27, w0
+	bl	ftl_vpn_decrement
+	b	.L3068
+.L3078:
+	ldrh	w2, [x19, 12]
+	add	w2, w2, w1
+	ldr	w2, [x4, x2, lsl 2]
+	cmn	w2, #1
+	beq	.L3077
+	add	w23, w0, 1
+	and	w0, w23, 65535
+.L3077:
+	add	w1, w1, 1
+	b	.L3076
+.L3093:
+	ldr	w0, [x26, x24, lsl 2]
+	cmn	w0, #1
+	bne	.L3082
+.L3086:
+	adrp	x0, .LANCHOR110
+	ldr	x1, [x20, 24]
+	mov	w23, -1
+	mov	x2, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR110]
+	ldr	w0, [x0, 8]
+	stp	w0, w23, [x1]
+	ldr	x0, [x20, 8]
+	stp	w23, wzr, [x1, 8]
+	str	wzr, [x1, 16]!
+	str	wzr, [x0]
+	mov	w0, 2
+	bl	ftl_debug_info_fill
+.L3083:
+	ldr	w0, [x29, 156]
+	cbz	w0, .L3088
+	ldrh	w0, [x19, 6]
+	cmp	w0, 1
+	bls	.L3088
+	add	x0, x21, :lo12:.LANCHOR14
+	str	x0, [x29, 160]
+	add	x0, x22, :lo12:.LANCHOR131
+	str	x0, [x29, 136]
+.L3153:
+	mov	x0, x19
+	bl	ftl_get_new_free_page
+	mov	w4, w0
+	ldr	x0, [x29, 160]
+	ldr	w0, [x0]
+	tbz	x0, 14, .L3090
+	ldrh	w0, [x19, 12]
+	mov	w1, w4
+	ldrh	w3, [x19, 10]
+	str	w4, [x29, 112]
+	add	w3, w3, w0
+	ldr	x0, [x20, 24]
+	sub	w3, w3, #1
+	ldr	w2, [x0, 4]
+	ldr	x0, [x29, 128]
 	bl	printf
-	bl	pm_free_sblk
-	ldr	x1, [x19, #:lo12:.LANCHOR104]
-	add	x0, x1, x0, uxth 1
-	ldrh	w21, [x0, 416]
-	cmp	w21, w20
-	beq	.L2937
-.L2940:
-	bl	pm_select_ram_region
-	and	x22, x0, 65535
-	lsl	x0, x22, 4
-	adrp	x20, .LANCHOR135
-	add	x1, x20, :lo12:.LANCHOR135
-	mov	x25, x22
-	add	x23, x1, x0
-	ldrh	w0, [x1, x0]
-	mov	w1, 65535
-	cmp	w0, w1
-	beq	.L2941
-	ldr	x1, [x23, 8]
-	cbz	x1, .L2941
-	ldrsh	w2, [x23, 2]
-	tbz	w2, #31, .L2941
-	bl	pm_write_page
-	ldrh	w0, [x23, 2]
-	and	w0, w0, 32767
-	strh	w0, [x23, 2]
-.L2941:
-	adrp	x23, .LANCHOR68
-	adrp	x24, .LANCHOR31
-	add	x23, x23, :lo12:.LANCHOR68
-	add	x24, x24, :lo12:.LANCHOR31
-	mov	w27, 0
-	mov	w26, 24
-.L2942:
-	ldr	x2, [x19, #:lo12:.LANCHOR104]
-	ldrh	w0, [x2, 698]
-	cmp	w0, w27
-	bhi	.L2945
-	bl	pm_free_sblk
-.L2937:
-	mov	w0, 0
-	ldr	x27, [sp, 80]
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 96
-	ret
-.L2945:
-	ldrb	w0, [x24]
-	add	x2, x2, x27, sxtw 2
-	ldrh	w3, [x23]
-	sub	w0, w26, w0
-	sub	w1, w0, w3
+	ldr	w4, [x29, 112]
+.L3090:
+	ldr	x0, [x29, 120]
+	ldr	w2, [x29, 168]
+	ldrh	w1, [x19, 6]
+	ldrb	w0, [x0]
+	mul	w0, w0, w27
+	add	w0, w0, 1
+	sub	w0, w0, w2
+	cmp	w1, w0
+	bls	.L3088
+	ldr	x0, [x29, 136]
+	ldr	x1, [x20, 8]
+	ldr	x2, [x20, 24]
+	str	w4, [x29, 104]
+	ldrb	w3, [x0]
+	mov	w0, w4
+	bl	ftl_prog_ppa_page
+	mov	w1, w0
+	ldrh	w0, [x19]
+	str	w1, [x29, 112]
+	bl	ftl_vpn_decrement
+	ldr	w1, [x29, 112]
+	cmn	w23, #1
+	ldr	w4, [x29, 104]
+	ccmn	w1, #1, 4, ne
+	beq	.L3091
+	add	x0, x29, 240
+	ldrh	w1, [x19, 12]
+	str	w4, [x0, x24, lsl 2]
+	ldrh	w0, [x19, 10]
+	add	w0, w0, w1
+	add	x1, x29, 304
+	sub	w0, w0, #1
+	str	w0, [x1, x24, lsl 2]
+.L3088:
+	add	x24, x24, 1
+	b	.L3081
+.L3082:
+	ldrb	w3, [x22, #:lo12:.LANCHOR131]
+	ldr	x1, [x20, 8]
+	ldr	x2, [x20, 24]
+	bl	ftl_read_ppa_page
+	mov	w23, w0
+	ldr	x0, [x20, 24]
+	ldr	w0, [x0, 4]
+	bl	lpa_hash_get_ppa
+	mov	w4, w0
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 14, .L3084
+	ldr	x0, [x20, 24]
+	mov	w1, w4
+	ldr	w2, [x26, x24, lsl 2]
+	str	w4, [x29, 160]
+	ldr	w3, [x0, 4]
+	adrp	x0, .LC186
+	add	x0, x0, :lo12:.LC186
+	bl	printf
+	ldr	w4, [x29, 160]
+.L3084:
+	ldr	x1, [x20, 24]
+	mov	x2, 0
+	ldr	w0, [x26, x24, lsl 2]
+	cmp	w4, w0
 	mov	w0, 1
-	lsl	w0, w0, w1
-	ldr	w1, [x2, 704]
+	stp	w4, w0, [x1, 8]
+	csinv	w23, w23, wzr, eq
+	str	wzr, [x1, 16]!
+	mov	w0, 2
+	bl	ftl_debug_info_fill
+	cmn	w23, #1
+	bne	.L3083
+	b	.L3086
+.L3091:
+	ldrh	w0, [x19, 6]
+	cmp	w0, 1
+	bls	.L3088
+	cmn	w23, #1
+	bne	.L3153
+	b	.L3088
+.L3100:
+	add	x0, x29, 240
+	ldr	w0, [x0, x28, lsl 2]
+	cmn	w0, #1
+	beq	.L3096
+	ldrb	w3, [x22, #:lo12:.LANCHOR131]
+	ldr	w0, [x26, x28, lsl 2]
+	ldr	x1, [x20, 8]
+	ldr	x2, [x20, 24]
+	bl	ftl_read_ppa_page
+	cmp	w0, 256
+	ccmn	w0, #1, 4, ne
+	bne	.L3096
+	add	x0, x29, 240
+	ldrb	w3, [x22, #:lo12:.LANCHOR131]
+	ldr	x1, [x20, 8]
+	ldr	x2, [x20, 24]
+	ldr	w0, [x0, x28, lsl 2]
+	bl	ftl_read_ppa_page
+	mov	w5, w0
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 14, .L3098
+	ldr	x0, [x20, 24]
+	mov	w1, w5
+	ldr	w3, [x26, x28, lsl 2]
+	str	w5, [x29, 168]
+	ldr	w2, [x0, 8]
+	mov	x0, x23
+	bl	printf
+	ldr	w5, [x29, 168]
+.L3098:
+	cmn	w5, #1
+	beq	.L3096
+	ldr	x0, [x20, 24]
+	ldr	w2, [x26, x28, lsl 2]
+	ldr	w1, [x0, 8]
+	cmp	w2, w1
+	bne	.L3096
+	ldr	w1, [x21, #:lo12:.LANCHOR14]
+	tbz	x1, 14, .L3099
+	add	x1, x29, 304
+	ldr	w3, [x1, x28, lsl 2]
+	ldr	w1, [x0, 4]
+	mov	x0, x24
+	bl	printf
+.L3099:
+	add	x1, x29, 304
+	ldr	x0, [x20, 24]
+	ldr	w1, [x1, x28, lsl 2]
+	str	w1, [x29, 168]
+	ldr	w1, [x0, 8]
+	ldrh	w2, [x29, 168]
+	ldr	w0, [x0, 4]
+	bl	lpa_hash_update_ppa
+.L3096:
+	add	x28, x28, 1
+	b	.L3094
+.L3071:
+	ldr	x3, [x20, 24]
+	adrp	x0, .LANCHOR128
+	ldr	w0, [x0, #:lo12:.LANCHOR128]
+	ldr	w1, [x3, 4]
+	cmp	w1, w0
+	bcs	.L3068
+	ldrb	w0, [x19, 9]
+	ldrh	w1, [x25, #:lo12:.LANCHOR95]
+	ldrh	w2, [x19, 10]
+	mul	w0, w0, w1
 	sub	w0, w0, #1
-	lsr	w1, w1, w3
-	and	w0, w0, w1
-	adrp	x1, .LANCHOR69
-	ldrb	w1, [x1, #:lo12:.LANCHOR69]
-	udiv	w0, w0, w1
-	cmp	w21, w0, uxth
-	bne	.L2943
-	mov	w1, w25
-	mov	w0, w27
-	bl	load_l2p_region
-	cbnz	w0, .L2944
-	add	x0, x20, :lo12:.LANCHOR135
-	add	x0, x0, x22, lsl 4
-	ldr	x1, [x0, 8]
-	mov	w0, w27
-	bl	pm_write_page
-.L2944:
-	add	x1, x20, :lo12:.LANCHOR135
-	lsl	x0, x22, 4
-	mov	w2, -1
-	strh	w2, [x1, x0]
-.L2943:
-	add	w27, w27, 1
-	and	w27, w27, 65535
-	b	.L2942
-	.size	pm_gc, .-pm_gc
-	.section	.text.pm_flush_id,"ax",@progbits
+	cmp	w2, w0
+	bge	.L3068
+	adrp	x0, .LANCHOR110
+	ldr	w1, [x3]
+	ldr	x0, [x0, #:lo12:.LANCHOR110]
+	ldr	w4, [x0, 8]
+	cmp	w1, w4
+	bls	.L3072
+	str	w1, [x0, 8]
+.L3072:
+	ldrh	w0, [x19, 12]
+	add	w2, w2, w0
+	ldp	w0, w1, [x3, 4]
+	bl	lpa_hash_update_ppa
+	ldr	w0, [x29, 180]
+	str	w0, [x29, 176]
+	ldr	w0, [x29, 184]
+	str	w0, [x29, 180]
+	ldr	w0, [x29, 188]
+	str	w0, [x29, 184]
+	ldr	w0, [x29, 160]
+	str	w0, [x29, 188]
+	b	.L3068
+	.size	ftl_open_sblk_recovery, .-ftl_open_sblk_recovery
+	.section	.text.dump_ftl_info,"ax",@progbits
 	.align	2
-	.global	pm_flush_id
-	.type	pm_flush_id, %function
-pm_flush_id:
-	stp	x29, x30, [sp, -32]!
-	ubfiz	x0, x0, 4, 16
-	adrp	x2, .LANCHOR135
-	add	x2, x2, :lo12:.LANCHOR135
-	add	x29, sp, 0
-	str	x19, [sp, 16]
-	add	x19, x2, x0
-	ldrh	w0, [x2, x0]
-	ldr	x1, [x19, 8]
-	bl	pm_write_page
-	ldrh	w0, [x19, 2]
-	and	w0, w0, 32767
-	strh	w0, [x19, 2]
-	adrp	x19, .LANCHOR133
-	ldr	w0, [x19, #:lo12:.LANCHOR133]
-	cbz	w0, .L2954
-	bl	pm_gc
-	str	wzr, [x19, #:lo12:.LANCHOR133]
-.L2954:
-	mov	w0, 0
-	ldr	x19, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	ret
-	.size	pm_flush_id, .-pm_flush_id
-	.section	.text.pm_flush,"ax",@progbits
-	.align	2
-	.global	pm_flush
-	.type	pm_flush, %function
-pm_flush:
-	stp	x29, x30, [sp, -32]!
+	.global	dump_ftl_info
+	.type	dump_ftl_info, %function
+dump_ftl_info:
+	stp	x29, x30, [sp, -48]!
+	adrp	x0, .LANCHOR58
 	add	x29, sp, 0
+	ldrb	w1, [x0, #:lo12:.LANCHOR58]
+	adrp	x0, .LC189
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR135
-	add	x19, x19, :lo12:.LANCHOR135
-	mov	w20, 0
-	add	x19, x19, 2
-.L2961:
-	ldrsh	w0, [x19]
-	tbz	w0, #31, .L2960
-	mov	w0, w20
-	bl	pm_flush_id
-.L2960:
-	add	w20, w20, 1
-	add	x19, x19, 16
-	and	w20, w20, 65535
-	cmp	w20, 32
-	bne	.L2961
-	mov	w0, 0
+	add	x0, x0, :lo12:.LC189
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR110
+	adrp	x19, .LANCHOR10
+	adrp	x20, .LANCHOR95
+	bl	printf
+	adrp	x21, .LANCHOR6
+	adrp	x0, .LANCHOR194
+	add	x1, x0, :lo12:.LANCHOR194
+	ldrh	w3, [x1, 2]
+	ldrb	w2, [x1, 1]
+	ldrb	w1, [x0, #:lo12:.LANCHOR194]
+	adrp	x0, .LC190
+	add	x0, x0, :lo12:.LC190
+	bl	printf
+	ldr	x0, [x22, #:lo12:.LANCHOR110]
+	ldrh	w2, [x0, 140]
+	ldrh	w1, [x0, 130]
+	adrp	x0, .LC191
+	add	x0, x0, :lo12:.LC191
+	bl	printf
+	ldr	x1, [x19, #:lo12:.LANCHOR10]
+	adrp	x0, .LC192
+	add	x0, x0, :lo12:.LC192
+	ldrh	w5, [x1, 26]
+	ldrh	w4, [x1, 22]
+	ldrb	w3, [x1, 21]
+	ldrh	w2, [x1, 18]
+	ldrh	w1, [x1, 16]
+	bl	printf
+	ldr	x1, [x19, #:lo12:.LANCHOR10]
+	adrp	x0, .LC193
+	add	x0, x0, :lo12:.LC193
+	ldrh	w5, [x1, 58]
+	ldrh	w4, [x1, 54]
+	ldrb	w3, [x1, 53]
+	ldrh	w2, [x1, 50]
+	ldrh	w1, [x1, 48]
+	bl	printf
+	ldr	x1, [x19, #:lo12:.LANCHOR10]
+	adrp	x19, .LANCHOR80
+	adrp	x0, .LC194
+	add	x0, x0, :lo12:.LC194
+	ldrh	w5, [x1, 90]
+	ldrh	w4, [x1, 86]
+	ldrb	w3, [x1, 85]
+	ldrh	w2, [x1, 82]
+	ldrh	w1, [x1, 80]
+	bl	printf
+	ldrb	w0, [x19, #:lo12:.LANCHOR80]
+	mov	w2, 4
+	ldrh	w3, [x20, #:lo12:.LANCHOR95]
+	mul	w3, w3, w0
+	adrp	x0, .LANCHOR117
+	ldr	x1, [x0, #:lo12:.LANCHOR117]
+	adrp	x0, .LC195
+	lsl	w3, w3, 1
+	add	x0, x0, :lo12:.LC195
+	bl	rknand_print_hex
+	adrp	x0, .LANCHOR9
+	ldrh	w3, [x21, #:lo12:.LANCHOR6]
+	mov	w2, 2
+	ldr	x1, [x0, #:lo12:.LANCHOR9]
+	adrp	x0, .LC196
+	add	x0, x0, :lo12:.LC196
+	bl	rknand_print_hex
+	ldr	x1, [x22, #:lo12:.LANCHOR110]
+	mov	w2, 4
+	adrp	x0, .LC176
+	add	x0, x0, :lo12:.LC176
+	add	x1, x1, 704
+	ldrh	w3, [x1, -6]
+	bl	rknand_print_hex
+	adrp	x0, .LANCHOR7
+	ldrh	w3, [x21, #:lo12:.LANCHOR6]
+	mov	w2, 4
+	ldr	x1, [x0, #:lo12:.LANCHOR7]
+	adrp	x0, .LC197
+	add	x0, x0, :lo12:.LC197
+	bl	rknand_print_hex
+	mov	w3, 256
+	mov	w2, 2
+	adrp	x1, .LANCHOR116
+	adrp	x0, .LC198
+	add	x1, x1, :lo12:.LANCHOR116
+	add	x0, x0, :lo12:.LC198
+	bl	rknand_print_hex
+	ldrb	w0, [x19, #:lo12:.LANCHOR80]
+	mov	w2, 2
+	ldrh	w3, [x20, #:lo12:.LANCHOR95]
+	ldp	x21, x22, [sp, 32]
 	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	ret
-	.size	pm_flush, .-pm_flush
-	.section	.text.flt_sys_flush,"ax",@progbits
+	mul	w3, w3, w0
+	adrp	x0, .LANCHOR118
+	ldp	x29, x30, [sp], 48
+	lsl	w3, w3, 1
+	ldr	x1, [x0, #:lo12:.LANCHOR118]
+	adrp	x0, .LC199
+	add	x0, x0, :lo12:.LC199
+	b	rknand_print_hex
+	.size	dump_ftl_info, .-dump_ftl_info
+	.section	.text.pm_ppa_update_check,"ax",@progbits
 	.align	2
-	.global	flt_sys_flush
-	.type	flt_sys_flush, %function
-flt_sys_flush:
+	.global	pm_ppa_update_check
+	.type	pm_ppa_update_check, %function
+pm_ppa_update_check:
+	adrp	x4, .LANCHOR32
+	adrp	x3, .LANCHOR75
+	mov	w5, 24
+	ldrb	w4, [x4, #:lo12:.LANCHOR32]
+	ldrh	w3, [x3, #:lo12:.LANCHOR75]
+	sub	w4, w5, w4
+	sub	w5, w4, w3
+	mov	w4, 1
+	lsr	w3, w2, w3
+	lsl	w4, w4, w5
+	sub	w4, w4, #1
+	and	w4, w4, w3
+	adrp	x3, .LANCHOR76
+	ldrb	w3, [x3, #:lo12:.LANCHOR76]
+	udiv	w4, w4, w3
+	adrp	x3, .LANCHOR7
+	ldr	x3, [x3, #:lo12:.LANCHOR7]
+	add	x4, x3, x4, uxth 2
+	ldrb	w3, [x4, 2]
+	ubfx	x3, x3, 5, 3
+	cmp	w3, 1
+	ccmp	w3, 7, 4, ne
+	bne	.L3185
+	mov	w3, w2
+	mov	w2, w1
+	mov	x1, x0
 	stp	x29, x30, [sp, -16]!
+	adrp	x0, .LC200
+	add	x0, x0, :lo12:.LC200
 	add	x29, sp, 0
-	bl	ftl_flush
-	bl	pm_flush
-	bl	ftl_ext_info_flush
+	bl	printf
+	bl	dump_ftl_info
+	mov	w0, -1
 	ldp	x29, x30, [sp], 16
+	ret
+.L3185:
 	mov	w0, 0
-	b	ftl_info_flush
-	.size	flt_sys_flush, .-flt_sys_flush
-	.section	.text.rk_ftl_de_init,"ax",@progbits
-	.align	2
-	.global	rk_ftl_de_init
-	.type	rk_ftl_de_init, %function
-rk_ftl_de_init:
-	stp	x29, x30, [sp, -16]!
-	add	x29, sp, 0
-	bl	zftl_flash_de_init
-	bl	flt_sys_flush
-	ldp	x29, x30, [sp], 16
-	b	zftl_flash_de_init
-	.size	rk_ftl_de_init, .-rk_ftl_de_init
-	.section	.text.zftl_deinit,"ax",@progbits
-	.align	2
-	.global	zftl_deinit
-	.type	zftl_deinit, %function
-zftl_deinit:
-	b	rk_ftl_de_init
-	.size	zftl_deinit, .-zftl_deinit
-	.section	.text.pm_init,"ax",@progbits
+	ret
+	.size	pm_ppa_update_check, .-pm_ppa_update_check
+	.section	.text.load_l2p_region,"ax",@progbits
 	.align	2
-	.global	pm_init
-	.type	pm_init, %function
-pm_init:
-	stp	x29, x30, [sp, -112]!
-	mov	w1, 1
+	.type	load_l2p_region, %function
+load_l2p_region:
+	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	mov	w24, w0
-	adrp	x0, .LANCHOR148
 	stp	x19, x20, [sp, 16]
+	and	w19, w0, 65535
 	stp	x21, x22, [sp, 32]
-	adrp	x19, .LANCHOR135
-	str	wzr, [x0, #:lo12:.LANCHOR148]
-	adrp	x0, .LANCHOR133
+	and	x21, x1, 65535
+	stp	x23, x24, [sp, 48]
+	cmp	w21, 31
 	stp	x25, x26, [sp, 64]
-	add	x20, x19, :lo12:.LANCHOR135
-	str	wzr, [x0, #:lo12:.LANCHOR133]
-	adrp	x0, .LANCHOR198
-	stp	x27, x28, [sp, 80]
-	adrp	x22, .LANCHOR126
-	strb	w1, [x0, #:lo12:.LANCHOR198]
-	mov	w0, 64
-	bl	ftl_malloc
-	add	x23, x20, 512
-	adrp	x1, .LANCHOR197
-	add	x22, x22, :lo12:.LANCHOR126
-	mov	x21, x1
-	mov	w25, -1
-	str	x0, [x1, #:lo12:.LANCHOR197]
-.L2971:
-	strh	w25, [x20]
-	strh	wzr, [x20, 2]
-	cbz	w24, .L2970
-	ldrb	w0, [x22]
-	lsl	w0, w0, 9
-	bl	ftl_malloc
-	str	x0, [x20, 8]
-.L2970:
-	add	x20, x20, 16
-	cmp	x20, x23
-	bne	.L2971
-	add	x0, x19, :lo12:.LANCHOR135
-	adrp	x20, .LANCHOR104
-	ldr	x22, [x21, #:lo12:.LANCHOR197]
-	mov	w4, 4
-	ldr	x27, [x0, 8]
-	mov	x3, x22
-	ldr	x0, [x20, #:lo12:.LANCHOR104]
-	mov	x2, x27
-	ldrh	w1, [x0, 692]
-	ldrb	w0, [x0, 694]
-	bl	flash_get_last_written_page
-	sxth	w26, w0
-	ldr	x0, [x20, #:lo12:.LANCHOR104]
-	mov	w24, w26
-	ldrh	w2, [x0, 696]
-	cmp	w2, w26
-	bgt	.L2972
-	ldrh	w1, [x0, 692]
-	mov	w3, w26
-	adrp	x0, .LC195
-	add	x0, x0, :lo12:.LC195
-	adrp	x25, .LANCHOR126
-	add	x25, x25, :lo12:.LANCHOR126
-	adrp	x28, .LC196
+	bls	.L3191
+	adrp	x1, .LANCHOR220
+	adrp	x0, .LC0
+	mov	w2, 32
+	add	x1, x1, :lo12:.LANCHOR220
+	add	x0, x0, :lo12:.LC0
 	bl	printf
-	ldr	x0, [x20, #:lo12:.LANCHOR104]
-	ldrsh	w21, [x0, 696]
-	adrp	x0, .LANCHOR105
-	add	x0, x0, :lo12:.LANCHOR105
-	str	x0, [x29, 104]
-.L2973:
-	cmp	w21, w26
-	ble	.L2976
-	adrp	x0, .LANCHOR188
-	mov	w1, 1
-	add	w24, w24, 1
-	strb	w1, [x0, #:lo12:.LANCHOR188]
-	ldr	x0, [x20, #:lo12:.LANCHOR104]
-	strh	w24, [x0, 696]
-	bl	pm_free_sblk
-.L2972:
-	add	x19, x19, :lo12:.LANCHOR135
-	adrp	x0, .LANCHOR210
+.L3191:
+	adrp	x20, .LANCHOR110
+	mov	x25, x20
+	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	ldrh	w2, [x0, 698]
+	cmp	w2, w19
+	bcs	.L3192
+	mov	w1, w19
+	adrp	x0, .LC201
+	add	x0, x0, :lo12:.LC201
+	bl	printf
+	adrp	x0, .LANCHOR221
 	mov	w1, 255
-	ldrh	w2, [x0, #:lo12:.LANCHOR210]
-	ldr	x0, [x19, 8]
+	ldrh	w2, [x0, #:lo12:.LANCHOR221]
+	mov	x0, 0
+	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	ldr	x1, [x19, 8]
-	mov	w0, -1
-	bl	pm_write_page
-	adrp	x0, .LANCHOR188
-	ldrb	w0, [x0, #:lo12:.LANCHOR188]
-	cbz	w0, .L2977
-	ldr	x1, [x19, 8]
-	mov	w0, -1
-	bl	pm_write_page
-	ldr	x1, [x19, 8]
-	mov	w0, -1
-	bl	pm_write_page
-	ldr	x1, [x19, 8]
-	mov	w0, -1
-	bl	pm_write_page
-.L2977:
-	bl	pm_free_sblk
-	bl	pm_gc
-	mov	w0, 0
-	ldp	x19, x20, [sp, 16]
+	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	ldrh	w0, [x0, 698]
+	cmp	w0, w19
+	bcc	.L3193
+.L3203:
+	mov	w0, 0
+.L3190:
+	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 112
+	ldp	x29, x30, [sp], 80
 	ret
-.L2976:
-	ldr	x0, [x20, #:lo12:.LANCHOR104]
-	mov	x3, x22
-	ldr	x1, [x29, 104]
-	mov	x2, x27
-	ldrb	w4, [x25]
-	ldrh	w23, [x0, 692]
-	ldrh	w1, [x1]
-	ldrb	w0, [x0, 694]
-	madd	w23, w23, w1, w21
-	mov	w1, w23
-	bl	flash_read_page_en
-	mov	w4, w0
-	ldr	x0, [x20, #:lo12:.LANCHOR104]
-	str	w4, [x29, 100]
-	mov	w2, w23
-	ldr	w1, [x0, 48]
-	ldrh	w3, [x0, 694]
-	add	w1, w1, 1
-	str	w1, [x0, 48]
-	add	x0, x28, :lo12:.LC196
-	ldr	w1, [x22]
+.L3193:
+	mov	w2, 37
+.L3204:
+	adrp	x1, .LANCHOR220
+	adrp	x0, .LC0
+	add	x1, x1, :lo12:.LANCHOR220
+	add	x0, x0, :lo12:.LC0
 	bl	printf
-	ldr	w4, [x29, 100]
-	cmp	w4, 512
-	ccmn	w4, #1, 4, ne
-	beq	.L2974
-	ldr	x8, [x20, #:lo12:.LANCHOR104]
-	ldr	w6, [x22]
-	ldrh	w0, [x8, 698]
-	cmp	w6, w0
-	bcs	.L2974
-	ldr	w7, [x22, 8]
-	cbz	w7, .L2975
-	ldrb	w1, [x25]
-	mov	x0, x27
-	lsl	w1, w1, 9
-	bl	js_hash
-	cmp	w7, w0
-	beq	.L2975
-	adrp	x0, .LC197
-	mov	w1, w7
-	add	x0, x0, :lo12:.LC197
+	b	.L3203
+.L3192:
+	add	x0, x0, x19, sxtw 2
+	adrp	x22, .LANCHOR138
+	add	x1, x22, :lo12:.LANCHOR138
+	ldr	w23, [x0, 704]
+	lsl	x0, x21, 4
+	add	x26, x1, x0
+	strh	w19, [x1, x0]
+	strh	wzr, [x26, 2]
+	cbnz	w23, .L3195
+	mov	w1, w19
+	mov	w2, 0
+	adrp	x0, .LC202
+	add	x0, x0, :lo12:.LC202
 	bl	printf
-.L2974:
-	add	w21, w21, 1
-	sxth	w21, w21
-	b	.L2973
-.L2975:
-	add	x6, x8, x6, uxtw 2
-	str	w23, [x6, 704]
-	b	.L2974
-	.size	pm_init, .-pm_init
-	.section	.text.pm_log2phys,"ax",@progbits
+	adrp	x0, .LANCHOR221
+	mov	w1, 255
+	ldrh	w2, [x0, #:lo12:.LANCHOR221]
+	ldr	x0, [x26, 8]
+	bl	ftl_memset
+	b	.L3203
+.L3195:
+	adrp	x20, .LANCHOR207
+	adrp	x24, .LANCHOR131
+	ldr	x1, [x26, 8]
+	mov	w0, w23
+	ldr	x2, [x20, #:lo12:.LANCHOR207]
+	ldrb	w3, [x24, #:lo12:.LANCHOR131]
+	bl	ftl_read_ppa_page
+	ldr	x1, [x20, #:lo12:.LANCHOR207]
+	ldr	w2, [x1]
+	cmp	w2, w19
+	bne	.L3196
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	beq	.L3196
+.L3200:
+	ldr	x0, [x20, #:lo12:.LANCHOR207]
+	ldr	w0, [x0]
+	cmp	w19, w0
+	beq	.L3203
+	mov	w2, 73
+	b	.L3204
+.L3196:
+	mov	w4, w23
+	mov	w3, w0
+	mov	w1, w19
+	adrp	x0, .LC203
+	add	x0, x0, :lo12:.LC203
+	bl	printf
+	ldr	x1, [x25, #:lo12:.LANCHOR110]
+	add	x22, x22, :lo12:.LANCHOR138
+	add	x21, x22, x21, lsl 4
+	mov	w2, 4
+	add	x1, x1, 704
+	adrp	x0, .LC204
+	add	x0, x0, :lo12:.LC204
+	ldrh	w3, [x1, -6]
+	bl	rknand_print_hex
+	ldr	x1, [x21, 8]
+	mov	w2, 4
+	ldrb	w3, [x24, #:lo12:.LANCHOR131]
+	adrp	x0, .LC183
+	add	x0, x0, :lo12:.LC183
+	lsl	w3, w3, 7
+	bl	rknand_print_hex
+	ldr	x1, [x20, #:lo12:.LANCHOR207]
+	mov	w3, 16
+	mov	w2, 4
+	adrp	x0, .LC205
+	add	x0, x0, :lo12:.LC205
+	bl	rknand_print_hex
+	ldrb	w3, [x24, #:lo12:.LANCHOR131]
+	mov	w0, w23
+	ldr	x2, [x20, #:lo12:.LANCHOR207]
+	ldr	x1, [x21, 8]
+	bl	ftl_read_ppa_page
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	bne	.L3199
+	adrp	x0, .LANCHOR221
+	mov	w1, 255
+	ldrh	w2, [x0, #:lo12:.LANCHOR221]
+	ldr	x0, [x21, 8]
+	bl	ftl_memset
+.L3201:
+	mov	w0, -1
+	b	.L3190
+.L3199:
+	ldr	x0, [x20, #:lo12:.LANCHOR207]
+	ldr	w0, [x0]
+	cmp	w19, w0
+	beq	.L3200
+	b	.L3201
+	.size	load_l2p_region, .-load_l2p_region
+	.section	.text.pm_gc,"ax",@progbits
 	.align	2
-	.global	pm_log2phys
-	.type	pm_log2phys, %function
-pm_log2phys:
+	.global	pm_gc
+	.type	pm_gc, %function
+pm_gc:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
-	stp	x25, x26, [sp, 64]
-	mov	w25, w0
-	adrp	x0, .LANCHOR123
-	stp	x23, x24, [sp, 48]
 	stp	x19, x20, [sp, 16]
-	mov	w24, w2
+	adrp	x19, .LANCHOR110
 	stp	x21, x22, [sp, 32]
-	mov	x23, x1
-	ldr	w2, [x0, #:lo12:.LANCHOR123]
+	adrp	x21, .LANCHOR151
+	ldr	x0, [x19, #:lo12:.LANCHOR110]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	ldrh	w2, [x0, 688]
+	adrp	x0, .LANCHOR155
 	str	x27, [sp, 80]
-	cmp	w25, w2
-	bcc	.L2993
-	mov	w1, w25
-	adrp	x0, .LC198
-	add	x0, x0, :lo12:.LC198
+	mov	x20, x0
+	ldrh	w1, [x0, #:lo12:.LANCHOR155]
+	sub	w1, w1, #1
+	cmp	w2, w1
+	bge	.L3206
+	ldr	w0, [x21, #:lo12:.LANCHOR151]
+	cbz	w0, .L3207
+.L3206:
+	bl	pm_free_sblk
+	ldr	x2, [x19, #:lo12:.LANCHOR110]
+	ldrh	w1, [x20, #:lo12:.LANCHOR155]
+	sub	w1, w1, #1
+	ldrh	w3, [x2, 688]
+	cmp	w3, w1
+	bge	.L3208
+	ldr	w1, [x21, #:lo12:.LANCHOR151]
+	cbz	w1, .L3207
+.L3208:
+	add	x0, x2, x0, uxth 1
+	str	wzr, [x21, #:lo12:.LANCHOR151]
+	mov	w20, 65535
+	ldrh	w21, [x0, 416]
+	cmp	w21, w20
+	bne	.L3210
+	adrp	x1, .LANCHOR222
+	add	x1, x1, :lo12:.LANCHOR222
+	mov	w2, 182
+	adrp	x0, .LC0
+	add	x0, x0, :lo12:.LC0
 	bl	printf
-	mov	w0, -1
-	cbnz	w24, .L2992
-	str	w0, [x23]
-.L2992:
+	bl	pm_free_sblk
+	ldr	x1, [x19, #:lo12:.LANCHOR110]
+	add	x0, x1, x0, uxth 1
+	ldrh	w21, [x0, 416]
+	cmp	w21, w20
+	beq	.L3207
+.L3210:
+	bl	pm_select_ram_region
+	and	x22, x0, 65535
+	lsl	x0, x22, 4
+	adrp	x20, .LANCHOR138
+	add	x1, x20, :lo12:.LANCHOR138
+	mov	x25, x22
+	add	x23, x1, x0
+	ldrh	w0, [x1, x0]
+	mov	w1, 65535
+	cmp	w0, w1
+	beq	.L3211
+	ldr	x1, [x23, 8]
+	cbz	x1, .L3211
+	ldrsh	w2, [x23, 2]
+	tbz	w2, #31, .L3211
+	bl	pm_write_page
+	ldrh	w0, [x23, 2]
+	and	w0, w0, 32767
+	strh	w0, [x23, 2]
+.L3211:
+	adrp	x23, .LANCHOR75
+	adrp	x24, .LANCHOR32
+	add	x23, x23, :lo12:.LANCHOR75
+	add	x24, x24, :lo12:.LANCHOR32
+	mov	w27, 0
+	mov	w26, 24
+.L3212:
+	ldr	x2, [x19, #:lo12:.LANCHOR110]
+	ldrh	w0, [x2, 698]
+	cmp	w0, w27
+	bhi	.L3215
+	bl	pm_free_sblk
+.L3207:
+	mov	w0, 0
+	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2993:
-	adrp	x0, .LANCHOR126
-	adrp	x21, .LANCHOR135
-	mov	x19, 0
-	ldrb	w20, [x0, #:lo12:.LANCHOR126]
-	add	x0, x21, :lo12:.LANCHOR135
-	add	x0, x0, 8
-	lsl	w22, w20, 7
-	udiv	w22, w25, w22
-	and	w26, w22, 65535
-.L2999:
-	ldr	x1, [x0]
-	cbz	x1, .L2995
-	ldrh	w1, [x0, -8]
-	cmp	w1, w26
-	bne	.L2995
-.L2996:
-	ubfiz	w20, w20, 7, 9
-	msub	w25, w26, w20, w25
-	and	x25, x25, 65535
-	cbnz	w24, .L2997
-	add	x0, x21, :lo12:.LANCHOR135
-	adrp	x1, .LANCHOR31
-	add	x0, x0, x19, lsl 4
-	mov	w2, 24
-	ldr	x0, [x0, 8]
-	ldr	w0, [x0, x25, lsl 2]
-	str	w0, [x23]
-	ldrb	w3, [x1, #:lo12:.LANCHOR31]
-	mov	w1, 1
-	sub	w2, w2, w3
-	lsl	w1, w1, w3
-	sub	w1, w1, #1
-	lsr	w0, w0, w2
+.L3215:
+	ldrb	w0, [x24]
+	add	x2, x2, x27, sxtw 2
+	ldrh	w3, [x23]
+	sub	w0, w26, w0
+	sub	w1, w0, w3
+	mov	w0, 1
+	lsl	w0, w0, w1
+	ldr	w1, [x2, 704]
+	sub	w0, w0, #1
+	lsr	w1, w1, w3
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR106
-	ldrb	w1, [x1, #:lo12:.LANCHOR106]
-	cmp	w0, w1
-	bcc	.L2998
-	mov	w0, -1
-	str	w0, [x23]
-.L2998:
-	add	x21, x21, :lo12:.LANCHOR135
-	add	x19, x21, x19, lsl 4
+	adrp	x1, .LANCHOR76
+	ldrb	w1, [x1, #:lo12:.LANCHOR76]
+	udiv	w0, w0, w1
+	cmp	w21, w0, uxth
+	bne	.L3213
+	mov	w1, w25
+	mov	w0, w27
+	bl	load_l2p_region
+	cbnz	w0, .L3214
+	add	x0, x20, :lo12:.LANCHOR138
+	add	x0, x0, x22, lsl 4
+	ldr	x1, [x0, 8]
+	mov	w0, w27
+	bl	pm_write_page
+.L3214:
+	add	x1, x20, :lo12:.LANCHOR138
+	lsl	x0, x22, 4
+	mov	w2, -1
+	strh	w2, [x1, x0]
+.L3213:
+	add	w27, w27, 1
+	and	w27, w27, 65535
+	b	.L3212
+	.size	pm_gc, .-pm_gc
+	.section	.text.pm_flush_id,"ax",@progbits
+	.align	2
+	.global	pm_flush_id
+	.type	pm_flush_id, %function
+pm_flush_id:
+	stp	x29, x30, [sp, -32]!
+	ubfiz	x0, x0, 4, 16
+	adrp	x2, .LANCHOR138
+	add	x2, x2, :lo12:.LANCHOR138
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	add	x19, x2, x0
+	ldrh	w0, [x2, x0]
+	ldr	x1, [x19, 8]
+	bl	pm_write_page
 	ldrh	w0, [x19, 2]
-	mvn	x1, x0
-	tst	x1, 32767
-	beq	.L3002
-	add	w0, w0, 1
+	and	w0, w0, 32767
 	strh	w0, [x19, 2]
-.L3002:
+	adrp	x19, .LANCHOR136
+	ldr	w0, [x19, #:lo12:.LANCHOR136]
+	cbz	w0, .L3224
+	bl	pm_gc
+	str	wzr, [x19, #:lo12:.LANCHOR136]
+.L3224:
 	mov	w0, 0
-	b	.L2992
-.L2997:
-	add	x0, x21, :lo12:.LANCHOR135
-	ldr	w2, [x23]
-	add	x0, x0, x19, lsl 4
-	ldr	x1, [x0, 8]
-	str	w2, [x1, x25, lsl 2]
-	ldrh	w1, [x0, 2]
-	orr	w1, w1, -32768
-	strh	w1, [x0, 2]
-	adrp	x0, .LANCHOR136
-	strb	w22, [x0, #:lo12:.LANCHOR136]
-	b	.L2998
-.L2995:
-	add	w19, w19, 1
-	add	x0, x0, 16
-	and	x19, x19, 65535
-	cmp	w19, 32
-	bne	.L2999
-	bl	pm_select_ram_region
-	and	x19, x0, 65535
-	sbfiz	x1, x19, 4, 32
-	add	x2, x21, :lo12:.LANCHOR135
-	add	x3, x2, x1
-	mov	w27, w0
-	ldrh	w2, [x2, x1]
-	mov	w1, 65535
-	cmp	w2, w1
-	beq	.L3000
-	ldrsh	w1, [x3, 2]
-	tbz	w1, #31, .L3000
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	pm_flush_id, .-pm_flush_id
+	.section	.text.pm_flush,"ax",@progbits
+	.align	2
+	.global	pm_flush
+	.type	pm_flush, %function
+pm_flush:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR138
+	add	x19, x19, :lo12:.LANCHOR138
+	mov	w20, 0
+	add	x19, x19, 2
+.L3231:
+	ldrsh	w0, [x19]
+	tbz	w0, #31, .L3230
+	mov	w0, w20
 	bl	pm_flush_id
-.L3000:
-	adrp	x0, .LANCHOR212
-	mov	w1, w27
-	strb	w19, [x0, #:lo12:.LANCHOR212]
-	mov	w0, w26
-	bl	load_l2p_region
-	b	.L2996
-	.size	pm_log2phys, .-pm_log2phys
-	.section	.text.gc_recovery,"ax",@progbits
+.L3230:
+	add	w20, w20, 1
+	add	x19, x19, 16
+	and	w20, w20, 65535
+	cmp	w20, 32
+	bne	.L3231
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	pm_flush, .-pm_flush
+	.section	.text.flt_sys_flush,"ax",@progbits
 	.align	2
-	.global	gc_recovery
-	.type	gc_recovery, %function
-gc_recovery:
-	sub	sp, sp, #240
-	adrp	x0, .LANCHOR10
-	adrp	x1, .LANCHOR78
-	mov	w2, 65535
-	stp	x29, x30, [sp, 32]
-	add	x29, sp, 32
-	stp	x19, x20, [sp, 48]
-	ldr	x20, [x0, #:lo12:.LANCHOR10]
-	strb	wzr, [x1, #:lo12:.LANCHOR78]
-	adrp	x1, .LANCHOR155
-	stp	x27, x28, [sp, 112]
-	mov	x27, x0
-	strb	wzr, [x1, #:lo12:.LANCHOR155]
-	add	x1, x20, 80
-	stp	x21, x22, [sp, 64]
-	str	x1, [x29, 168]
-	stp	x23, x24, [sp, 80]
-	ldrh	w1, [x20, 80]
-	stp	x25, x26, [sp, 96]
-	cmp	w1, w2
-	beq	.L3009
-	mov	w0, -1
-	strh	w0, [x20, 130]
-	mov	w0, 1
-	bl	buf_alloc
-	mov	x28, x0
-	ldrb	w0, [x20, 89]
-	add	x1, x20, 80
-	adrp	x3, .LANCHOR105
-	str	x3, [x29, 144]
-	sub	w0, w0, #1
-	add	x0, x1, x0, sxtw 1
-	ldrh	w1, [x3, #:lo12:.LANCHOR105]
-	ldrh	w0, [x0, 16]
-	mul	w1, w0, w1
-	adrp	x0, .LANCHOR73
-	str	w1, [x29, 200]
-	ldrb	w2, [x0, #:lo12:.LANCHOR73]
-	str	x0, [x29, 160]
-	cmp	w2, 2
-	beq	.L3010
-	adrp	x0, .LANCHOR35
-	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbz	w0, .L3011
-.L3010:
-	adrp	x0, .LANCHOR79
-	ldrh	w0, [x0, #:lo12:.LANCHOR79]
-	sub	w0, w0, #1
-	add	w0, w0, w1
-	orr	w2, w0, w2, lsl 24
-	str	w2, [x28, 40]
-.L3012:
+	.global	flt_sys_flush
+	.type	flt_sys_flush, %function
+flt_sys_flush:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	bl	ftl_flush
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	ldp	x29, x30, [sp], 16
+	mov	w0, 0
+	b	ftl_info_flush
+	.size	flt_sys_flush, .-flt_sys_flush
+	.section	.text.rk_ftl_de_init,"ax",@progbits
+	.align	2
+	.global	rk_ftl_de_init
+	.type	rk_ftl_de_init, %function
+rk_ftl_de_init:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	bl	zftl_flash_de_init
+	bl	flt_sys_flush
+	ldp	x29, x30, [sp], 16
+	b	zftl_flash_de_init
+	.size	rk_ftl_de_init, .-rk_ftl_de_init
+	.section	.text.zftl_deinit,"ax",@progbits
+	.align	2
+	.global	zftl_deinit
+	.type	zftl_deinit, %function
+zftl_deinit:
+	b	rk_ftl_de_init
+	.size	zftl_deinit, .-zftl_deinit
+	.section	.text.pm_init,"ax",@progbits
+	.align	2
+	.global	pm_init
+	.type	pm_init, %function
+pm_init:
+	stp	x29, x30, [sp, -112]!
 	mov	w1, 1
-	mov	x0, x28
-	bl	sblk_read_page
-	ldr	w0, [x28, 52]
-	cmp	w0, 512
-	ccmn	w0, #1, 4, ne
-	beq	.L3013
-	ldr	x0, [x28, 24]
-	ldr	w1, [x0]
-	mov	w0, 15555
-	movk	w0, 0xf55f, lsl 16
-	cmp	w1, w0
-	beq	.L3014
-.L3013:
-	mov	x0, x28
-	bl	zbuf_free
-	ldr	x1, [x28, 24]
-	mov	w26, 0
-	ldr	x0, [x28, 8]
-	ldr	w2, [x1, 12]
-	str	w2, [sp, 16]
-	ldr	w2, [x1, 8]
-	str	w2, [sp, 8]
-	ldr	w2, [x1, 4]
-	str	w2, [sp]
-	ldp	w3, w4, [x0]
-	ldp	w5, w6, [x0, 8]
-	adrp	x0, .LC199
-	ldr	w7, [x1]
-	add	x0, x0, :lo12:.LC199
-	ldr	w1, [x28, 40]
-	ldr	w2, [x28, 52]
-	bl	printf
-	adrp	x0, .LANCHOR9
-	ldrh	w1, [x20, 80]
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
-	strh	wzr, [x0, x1, lsl 1]
-	ldr	x0, [x27, #:lo12:.LANCHOR10]
-	ldrh	w1, [x20, 80]
-	strh	w1, [x0, 130]
-.L3015:
-	ldrh	w0, [x20, 80]
-	adrp	x2, .LANCHOR9
-	ldr	x2, [x2, #:lo12:.LANCHOR9]
-	ubfiz	x1, x0, 1, 16
-	ldrh	w1, [x2, x1]
-	cbnz	w1, .L3050
-	bl	ftl_dump_write_open_sblk
-.L3050:
-	ldrh	w1, [x20, 80]
-	mov	w2, w26
-	adrp	x0, .LC201
-	add	x0, x0, :lo12:.LC201
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	mov	w24, w0
+	adrp	x0, .LANCHOR151
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	adrp	x19, .LANCHOR138
+	str	wzr, [x0, #:lo12:.LANCHOR151]
+	adrp	x0, .LANCHOR136
+	stp	x25, x26, [sp, 64]
+	add	x20, x19, :lo12:.LANCHOR138
+	str	wzr, [x0, #:lo12:.LANCHOR136]
+	adrp	x0, .LANCHOR208
+	stp	x27, x28, [sp, 80]
+	adrp	x22, .LANCHOR131
+	strb	w1, [x0, #:lo12:.LANCHOR208]
+	mov	w0, 64
+	bl	ftl_malloc
+	add	x23, x20, 512
+	adrp	x1, .LANCHOR207
+	add	x22, x22, :lo12:.LANCHOR131
+	mov	x21, x1
+	mov	w25, -1
+	str	x0, [x1, #:lo12:.LANCHOR207]
+.L3241:
+	strh	w25, [x20]
+	strh	wzr, [x20, 2]
+	cbz	w24, .L3240
+	ldrb	w0, [x22]
+	lsl	w0, w0, 9
+	bl	ftl_malloc
+	str	x0, [x20, 8]
+.L3240:
+	add	x20, x20, 16
+	cmp	x20, x23
+	bne	.L3241
+	add	x0, x19, :lo12:.LANCHOR138
+	adrp	x20, .LANCHOR110
+	ldr	x22, [x21, #:lo12:.LANCHOR207]
+	mov	w4, 4
+	ldr	x27, [x0, 8]
+	mov	x3, x22
+	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	mov	x2, x27
+	ldrh	w1, [x0, 692]
+	ldrb	w0, [x0, 694]
+	bl	flash_get_last_written_page
+	sxth	w26, w0
+	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	mov	w24, w26
+	ldrh	w2, [x0, 696]
+	cmp	w2, w26
+	bgt	.L3242
+	ldrh	w1, [x0, 692]
+	mov	w3, w26
+	adrp	x0, .LC206
+	add	x0, x0, :lo12:.LC206
+	adrp	x25, .LANCHOR131
+	add	x25, x25, :lo12:.LANCHOR131
+	adrp	x28, .LC207
 	bl	printf
+	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	ldrsh	w21, [x0, 696]
+	adrp	x0, .LANCHOR111
+	add	x0, x0, :lo12:.LANCHOR111
+	str	x0, [x29, 104]
+.L3243:
+	cmp	w21, w26
+	ble	.L3246
+	adrp	x0, .LANCHOR198
+	mov	w1, 1
+	add	w24, w24, 1
+	strb	w1, [x0, #:lo12:.LANCHOR198]
+	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	strh	w24, [x0, 696]
+	bl	pm_free_sblk
+.L3242:
+	add	x19, x19, :lo12:.LANCHOR138
+	adrp	x0, .LANCHOR221
+	mov	w1, 255
+	ldrh	w2, [x0, #:lo12:.LANCHOR221]
+	ldr	x0, [x19, 8]
+	bl	ftl_memset
+	ldr	x1, [x19, 8]
 	mov	w0, -1
-	strh	w0, [x20, 80]
-	bl	pm_flush
-	bl	ftl_ext_info_flush
-	ldr	x0, [x27, #:lo12:.LANCHOR10]
-	mov	w1, 65535
-	ldrh	w0, [x0, 130]
-	cmp	w0, w1
-	beq	.L3051
-	bl	ftl_free_sblk
-.L3051:
-	adrp	x0, .LANCHOR104
-	ldr	x1, [x0, #:lo12:.LANCHOR104]
+	bl	pm_write_page
+	adrp	x0, .LANCHOR198
+	ldrb	w0, [x0, #:lo12:.LANCHOR198]
+	cbz	w0, .L3247
+	ldr	x1, [x19, 8]
 	mov	w0, -1
-	strh	w0, [x1, 126]
-	ldr	x1, [x27, #:lo12:.LANCHOR10]
-	strh	w0, [x1, 130]
+	bl	pm_write_page
+	ldr	x1, [x19, 8]
+	mov	w0, -1
+	bl	pm_write_page
+	ldr	x1, [x19, 8]
+	mov	w0, -1
+	bl	pm_write_page
+.L3247:
+	bl	pm_free_sblk
+	bl	pm_gc
 	mov	w0, 0
-	bl	ftl_info_flush
-.L3008:
-	ldp	x19, x20, [sp, 48]
-	ldp	x21, x22, [sp, 64]
-	ldp	x23, x24, [sp, 80]
-	ldp	x25, x26, [sp, 96]
-	ldp	x27, x28, [sp, 112]
-	ldp	x29, x30, [sp, 32]
-	add	sp, sp, 240
-	ret
-.L3011:
-	cmp	w2, 3
-	bne	.L3012
-	adrp	x0, .LANCHOR87
-	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L3246:
+	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	mov	x3, x22
+	ldr	x1, [x29, 104]
+	mov	x2, x27
+	ldrb	w4, [x25]
+	ldrh	w23, [x0, 692]
+	ldrh	w1, [x1]
+	ldrb	w0, [x0, 694]
+	madd	w23, w23, w1, w21
+	mov	w1, w23
+	bl	flash_read_page_en
+	mov	w4, w0
+	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	str	w4, [x29, 100]
+	mov	w2, w23
+	ldr	w1, [x0, 48]
+	ldrh	w3, [x0, 694]
+	add	w1, w1, 1
+	str	w1, [x0, 48]
+	add	x0, x28, :lo12:.LC207
+	ldr	w1, [x22]
+	bl	printf
+	ldr	w4, [x29, 100]
+	cmp	w4, 512
+	ccmn	w4, #1, 4, ne
+	beq	.L3244
+	ldr	x8, [x20, #:lo12:.LANCHOR110]
+	ldr	w6, [x22]
+	ldrh	w0, [x8, 698]
+	cmp	w6, w0
+	bcs	.L3244
+	ldr	w7, [x22, 8]
+	cbz	w7, .L3245
+	ldrb	w1, [x25]
+	mov	x0, x27
+	lsl	w1, w1, 9
+	bl	js_hash
+	cmp	w7, w0
+	beq	.L3245
+	adrp	x0, .LC208
+	mov	w1, w7
+	add	x0, x0, :lo12:.LC208
+	bl	printf
+.L3244:
+	add	w21, w21, 1
+	sxth	w21, w21
+	b	.L3243
+.L3245:
+	add	x6, x8, x6, uxtw 2
+	str	w23, [x6, 704]
+	b	.L3244
+	.size	pm_init, .-pm_init
+	.section	.text.pm_log2phys,"ax",@progbits
+	.align	2
+	.global	pm_log2phys
+	.type	pm_log2phys, %function
+pm_log2phys:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x25, x26, [sp, 64]
+	mov	w25, w0
+	adrp	x0, .LANCHOR128
+	stp	x23, x24, [sp, 48]
+	stp	x19, x20, [sp, 16]
+	mov	w24, w2
+	stp	x21, x22, [sp, 32]
+	mov	x23, x1
+	ldr	w2, [x0, #:lo12:.LANCHOR128]
+	str	x27, [sp, 80]
+	cmp	w25, w2
+	bcc	.L3263
+	mov	w1, w25
+	adrp	x0, .LC209
+	add	x0, x0, :lo12:.LC209
+	bl	printf
+	mov	w0, -1
+	cbnz	w24, .L3262
+	str	w0, [x23]
+.L3262:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	ret
+.L3263:
+	adrp	x0, .LANCHOR131
+	adrp	x21, .LANCHOR138
+	mov	x19, 0
+	ldrb	w20, [x0, #:lo12:.LANCHOR131]
+	add	x0, x21, :lo12:.LANCHOR138
+	add	x0, x0, 8
+	lsl	w22, w20, 7
+	udiv	w22, w25, w22
+	and	w26, w22, 65535
+.L3269:
+	ldr	x1, [x0]
+	cbz	x1, .L3265
+	ldrh	w1, [x0, -8]
+	cmp	w1, w26
+	bne	.L3265
+.L3266:
+	ubfiz	w20, w20, 7, 9
+	msub	w25, w26, w20, w25
+	and	x25, x25, 65535
+	cbnz	w24, .L3267
+	add	x0, x21, :lo12:.LANCHOR138
+	adrp	x1, .LANCHOR32
+	add	x0, x0, x19, lsl 4
+	mov	w2, 24
+	ldr	x0, [x0, 8]
+	ldr	w0, [x0, x25, lsl 2]
+	str	w0, [x23]
+	ldrb	w3, [x1, #:lo12:.LANCHOR32]
+	mov	w1, 1
+	sub	w2, w2, w3
+	lsl	w1, w1, w3
+	sub	w1, w1, #1
+	lsr	w0, w0, w2
+	and	w0, w0, w1
+	adrp	x1, .LANCHOR112
+	ldrb	w1, [x1, #:lo12:.LANCHOR112]
+	cmp	w0, w1
+	bcc	.L3268
+	mov	w0, -1
+	str	w0, [x23]
+.L3268:
+	add	x21, x21, :lo12:.LANCHOR138
+	add	x19, x21, x19, lsl 4
+	ldrh	w0, [x19, 2]
+	mvn	x1, x0
+	tst	x1, 32767
+	beq	.L3272
+	add	w0, w0, 1
+	strh	w0, [x19, 2]
+.L3272:
+	mov	w0, 0
+	b	.L3262
+.L3267:
+	add	x0, x21, :lo12:.LANCHOR138
+	ldr	w2, [x23]
+	add	x0, x0, x19, lsl 4
+	ldr	x1, [x0, 8]
+	str	w2, [x1, x25, lsl 2]
+	ldrh	w1, [x0, 2]
+	orr	w1, w1, -32768
+	strh	w1, [x0, 2]
+	adrp	x0, .LANCHOR139
+	strb	w22, [x0, #:lo12:.LANCHOR139]
+	b	.L3268
+.L3265:
+	add	w19, w19, 1
+	add	x0, x0, 16
+	and	x19, x19, 65535
+	cmp	w19, 32
+	bne	.L3269
+	bl	pm_select_ram_region
+	and	x19, x0, 65535
+	sbfiz	x1, x19, 4, 32
+	add	x2, x21, :lo12:.LANCHOR138
+	add	x3, x2, x1
+	mov	w27, w0
+	ldrh	w2, [x2, x1]
+	mov	w1, 65535
+	cmp	w2, w1
+	beq	.L3270
+	ldrsh	w1, [x3, 2]
+	tbz	w1, #31, .L3270
+	bl	pm_flush_id
+.L3270:
+	adrp	x0, .LANCHOR223
+	mov	w1, w27
+	strb	w19, [x0, #:lo12:.LANCHOR223]
+	mov	w0, w26
+	bl	load_l2p_region
+	b	.L3266
+	.size	pm_log2phys, .-pm_log2phys
+	.section	.text.gc_recovery,"ax",@progbits
+	.align	2
+	.global	gc_recovery
+	.type	gc_recovery, %function
+gc_recovery:
+	sub	sp, sp, #240
+	adrp	x0, .LANCHOR10
+	adrp	x1, .LANCHOR85
+	mov	w2, 65535
+	stp	x29, x30, [sp, 32]
+	add	x29, sp, 32
+	stp	x23, x24, [sp, 80]
+	ldr	x23, [x0, #:lo12:.LANCHOR10]
+	strb	wzr, [x1, #:lo12:.LANCHOR85]
+	adrp	x1, .LANCHOR159
+	stp	x25, x26, [sp, 96]
+	mov	x26, x0
+	strb	wzr, [x1, #:lo12:.LANCHOR159]
+	add	x1, x23, 80
+	stp	x19, x20, [sp, 48]
+	str	x1, [x29, 168]
+	stp	x21, x22, [sp, 64]
+	ldrh	w1, [x23, 80]
+	stp	x27, x28, [sp, 112]
+	cmp	w1, w2
+	beq	.L3279
+	mov	w0, -1
+	strh	w0, [x23, 130]
+	mov	w0, 1
+	bl	buf_alloc
+	mov	x27, x0
+	ldrb	w0, [x23, 89]
+	add	x1, x23, 80
+	adrp	x3, .LANCHOR111
+	str	x3, [x29, 152]
+	sub	w0, w0, #1
+	add	x0, x1, x0, sxtw 1
+	ldrh	w1, [x3, #:lo12:.LANCHOR111]
+	ldrh	w0, [x0, 16]
+	mul	w1, w0, w1
+	adrp	x0, .LANCHOR79
+	str	w1, [x29, 200]
+	ldrb	w2, [x0, #:lo12:.LANCHOR79]
+	str	x0, [x29, 176]
+	cmp	w2, 2
+	beq	.L3280
+	adrp	x0, .LANCHOR36
+	ldrb	w0, [x0, #:lo12:.LANCHOR36]
+	cbnz	w0, .L3280
+	adrp	x0, .LANCHOR37
+	ldrb	w0, [x0, #:lo12:.LANCHOR37]
+	cbz	w0, .L3281
+.L3280:
+	adrp	x0, .LANCHOR86
+	ldrh	w0, [x0, #:lo12:.LANCHOR86]
 	sub	w0, w0, #1
 	add	w0, w0, w1
-	orr	w0, w0, 50331648
-	str	w0, [x28, 40]
-	b	.L3012
-.L3014:
-	adrp	x22, .LANCHOR79
-	adrp	x19, .LANCHOR80
-	adrp	x23, .LANCHOR157
-	ldr	x1, [x28, 8]
-	ldrb	w0, [x19, #:lo12:.LANCHOR80]
-	adrp	x25, .LANCHOR158
-	ldrh	w2, [x22, #:lo12:.LANCHOR79]
-	mul	w2, w2, w0
-	ldr	x0, [x23, #:lo12:.LANCHOR157]
-	lsl	w2, w2, 2
-	bl	ftl_memcpy
-	str	x22, [x29, 152]
-	ldrb	w1, [x19, #:lo12:.LANCHOR80]
-	ldrh	w0, [x22, #:lo12:.LANCHOR79]
-	mul	w0, w0, w1
-	adrp	x1, .LANCHOR126
-	ldrb	w1, [x1, #:lo12:.LANCHOR126]
-	lsl	w2, w0, 2
-	cmp	w1, w0, lsr 6
-	bge	.L3016
-	lsl	w1, w1, 7
-	sub	w0, w1, w0
-	mov	w1, 0
-	lsl	w26, w0, 2
-	ldr	x0, [x25, #:lo12:.LANCHOR158]
-	bl	ftl_memset
-	ldr	x0, [x29, 152]
-	mov	w2, w26
-	ldrb	w1, [x19, #:lo12:.LANCHOR80]
-	ldrh	w0, [x0, #:lo12:.LANCHOR79]
-	mul	w0, w0, w1
-	ldr	x1, [x28, 8]
-	add	x1, x1, x0, sxtw 2
-	ldr	x0, [x25, #:lo12:.LANCHOR158]
-	bl	ftl_memcpy
-	mov	w0, 1
-	str	w0, [x29, 180]
-.L3017:
-	adrp	x0, .LANCHOR87
-	ldrh	w0, [x0, #:lo12:.LANCHOR87]
-	str	w0, [x29, 184]
-	ldr	x0, [x29, 160]
-	ldrb	w0, [x0, #:lo12:.LANCHOR73]
-	str	w0, [x29, 188]
-	cmp	w0, 2
-	bne	.L3018
-	adrp	x0, .LANCHOR74
-	ldrb	w0, [x0, #:lo12:.LANCHOR74]
-	cbz	w0, .L3019
-.L3018:
-	adrp	x0, .LANCHOR35
-	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbz	w0, .L3020
-.L3019:
-	ldp	w0, w1, [x29, 184]
-	mul	w0, w0, w1
-	str	w0, [x29, 184]
-	mov	w0, 1
-	str	w0, [x29, 188]
-.L3020:
-	adrp	x24, .LC200
-	mov	w22, 0
-	add	x0, x24, :lo12:.LC200
-	mov	w19, 0
-	str	x0, [x29, 104]
-.L3021:
-	sub	w0, w22, #1
-	str	w0, [x29, 136]
-	ldr	w0, [x29, 184]
-	cmp	w0, w22
-	bls	.L3033
-	adrp	x0, .LANCHOR35
-	mov	x21, 0
-	add	x0, x0, :lo12:.LANCHOR35
-	str	x0, [x29, 112]
-	b	.L3034
-.L3016:
-	ldr	x1, [x28, 8]
-	mov	w26, 0
-	add	x1, x1, x0, sxtw 2
-	ldr	x0, [x25, #:lo12:.LANCHOR158]
-	bl	ftl_memcpy
-	str	wzr, [x29, 180]
-	b	.L3017
-.L3029:
-	ldp	x1, x0, [x29, 120]
-	ldrh	w0, [x0, 96]
-	ldrh	w1, [x1]
-	mul	w0, w0, w1
-	ldr	x1, [x29, 160]
-	str	w0, [x29, 200]
-	ldrb	w1, [x1, #:lo12:.LANCHOR73]
-	cmp	w1, 2
-	beq	.L3022
-	ldr	x2, [x29, 112]
-	ldrb	w2, [x2]
-	cbz	w2, .L3023
-.L3022:
-	ldr	w2, [x29, 136]
-	add	w0, w2, w0
-	add	w0, w0, w24
-	orr	w0, w0, w1, lsl 24
-.L3025:
-	str	w0, [x28, 40]
+	orr	w2, w0, w2, lsl 24
+	str	w2, [x27, 40]
+.L3282:
 	mov	w1, 1
-	str	x8, [x29, 96]
-	mov	x0, x28
+	mov	x0, x27
 	bl	sblk_read_page
-	ldr	w1, [x29, 180]
-	ldr	x0, [x28, 24]
-	ldr	x8, [x29, 96]
-	cbz	w1, .L3026
-	ldr	x1, [x25, #:lo12:.LANCHOR158]
-	ldr	w2, [x1, x8]
-	cbnz	w2, .L3026
-	ldr	w2, [x0, 8]
-	str	w2, [x1, x8]
-.L3026:
-	ldr	x1, [x23, #:lo12:.LANCHOR157]
-	ldr	w6, [x0, 4]
-	ldr	w3, [x1, x8]
-	cmp	w3, w6
-	bne	.L3027
-	ldr	x1, [x25, #:lo12:.LANCHOR158]
-	ldr	w2, [x1, x8]
-	ldr	w1, [x0, 8]
-	cmp	w2, w1
-	beq	.L3028
-.L3027:
-	ldr	x1, [x25, #:lo12:.LANCHOR158]
-	ldr	w2, [x0, 12]
+	ldr	w0, [x27, 52]
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	beq	.L3283
+	ldr	x0, [x27, 24]
+	ldr	w1, [x0]
+	mov	w0, 15555
+	movk	w0, 0xf55f, lsl 16
+	cmp	w1, w0
+	beq	.L3284
+.L3283:
+	mov	x0, x27
+	bl	zbuf_free
+	ldr	x1, [x27, 24]
+	ldr	x0, [x27, 8]
+	ldr	w2, [x1, 12]
+	str	w2, [sp, 16]
+	ldr	w2, [x1, 8]
+	str	w2, [sp, 8]
+	ldr	w2, [x1, 4]
 	str	w2, [sp]
+	ldp	w3, w4, [x0]
+	ldp	w5, w6, [x0, 8]
+	adrp	x0, .LC210
+	ldr	w7, [x1]
+	add	x0, x0, :lo12:.LC210
+	ldr	w1, [x27, 40]
+	ldr	w2, [x27, 52]
+	bl	printf
+.L3373:
+	adrp	x0, .LANCHOR9
+	ldrh	w1, [x23, 80]
+	mov	w25, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	strh	wzr, [x0, x1, lsl 1]
+	ldr	x0, [x26, #:lo12:.LANCHOR10]
+	ldrh	w1, [x23, 80]
+	strh	w1, [x0, 130]
+.L3285:
+	ldrh	w0, [x23, 80]
+	adrp	x2, .LANCHOR9
+	ldr	x2, [x2, #:lo12:.LANCHOR9]
+	ubfiz	x1, x0, 1, 16
+	ldrh	w1, [x2, x1]
+	cbnz	w1, .L3329
+	bl	ftl_dump_write_open_sblk
+.L3329:
+	ldrh	w1, [x23, 80]
+	mov	w2, w25
+	adrp	x0, .LC212
+	add	x0, x0, :lo12:.LC212
+	bl	printf
+	mov	w0, -1
+	strh	w0, [x23, 80]
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	ldr	x0, [x26, #:lo12:.LANCHOR10]
+	mov	w1, 65535
+	ldrh	w0, [x0, 130]
+	cmp	w0, w1
+	beq	.L3330
+	adrp	x1, .LANCHOR6
+	ldrh	w1, [x1, #:lo12:.LANCHOR6]
+	cmp	w1, w0
+	bhi	.L3331
+	adrp	x1, .LANCHOR225
+	adrp	x0, .LC0
+	mov	w2, 517
+	add	x1, x1, :lo12:.LANCHOR225
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L3331:
+	ldr	x0, [x26, #:lo12:.LANCHOR10]
+	ldrh	w0, [x0, 130]
+	bl	ftl_free_sblk
+.L3330:
+	adrp	x0, .LANCHOR110
+	ldr	x1, [x0, #:lo12:.LANCHOR110]
+	mov	w0, -1
+	strh	w0, [x1, 126]
+	ldr	x1, [x26, #:lo12:.LANCHOR10]
+	strh	w0, [x1, 130]
+	mov	w0, 0
+	bl	ftl_info_flush
+.L3278:
+	ldp	x19, x20, [sp, 48]
+	ldp	x21, x22, [sp, 64]
+	ldp	x23, x24, [sp, 80]
+	ldp	x25, x26, [sp, 96]
+	ldp	x27, x28, [sp, 112]
+	ldp	x29, x30, [sp, 32]
+	add	sp, sp, 240
+	ret
+.L3281:
+	cmp	w2, 3
+	bne	.L3282
+	adrp	x0, .LANCHOR95
+	ldrh	w0, [x0, #:lo12:.LANCHOR95]
+	sub	w0, w0, #1
+	add	w0, w0, w1
+	orr	w0, w0, 50331648
+	str	w0, [x27, 40]
+	b	.L3282
+.L3284:
+	adrp	x21, .LANCHOR224
+	adrp	x19, .LANCHOR86
+	adrp	x20, .LANCHOR80
+	adrp	x24, .LANCHOR162
+	ldrb	w0, [x21, #:lo12:.LANCHOR224]
+	cmp	w0, 2
+	bne	.L3286
+	ldr	x0, [x29, 176]
+	ldrb	w0, [x0, #:lo12:.LANCHOR79]
+	cmp	w0, 3
+	bne	.L3286
+	ldrh	w2, [x19, #:lo12:.LANCHOR86]
+	adrp	x22, .LANCHOR221
+	ldrb	w1, [x20, #:lo12:.LANCHOR80]
+	ldr	x3, [x24, #:lo12:.LANCHOR162]
+	ubfiz	w2, w2, 2, 14
+	ldrh	w0, [x22, #:lo12:.LANCHOR221]
+	mul	w2, w2, w1
+	ldr	x1, [x27, 8]
+	sub	w2, w2, w0
+	and	x0, x0, 65532
+	and	w2, w2, 65535
+	add	x0, x3, x0
+	bl	ftl_memcpy
+	adrp	x0, .LANCHOR36
+	ldrb	w0, [x0, #:lo12:.LANCHOR36]
+	cbnz	w0, .L3287
+	adrp	x0, .LANCHOR37
+	ldrb	w0, [x0, #:lo12:.LANCHOR37]
+	cbz	w0, .L3288
+.L3287:
+	ldr	w0, [x27, 40]
+	sub	w0, w0, #1
+.L3367:
+	str	w0, [x27, 40]
+	mov	w1, 1
+	mov	x0, x27
+	bl	sblk_read_page
+	ldr	w0, [x27, 52]
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	beq	.L3290
+	ldr	x0, [x27, 24]
+	ldr	w1, [x0]
+	mov	w0, 15555
+	movk	w0, 0xf55f, lsl 16
+	cmp	w1, w0
+	beq	.L3291
+.L3290:
+	mov	x0, x27
+	bl	zbuf_free
+	b	.L3373
+.L3288:
+	adrp	x1, .LANCHOR95
+	ldr	w0, [x29, 200]
+	ldrh	w1, [x1, #:lo12:.LANCHOR95]
+	sub	w0, w0, #1
+	add	w0, w0, w1
+	orr	w0, w0, 33554432
+	b	.L3367
+.L3291:
+	ldrh	w2, [x22, #:lo12:.LANCHOR221]
+.L3368:
+	ldr	x1, [x27, 8]
+	adrp	x22, .LANCHOR163
+	ldr	x0, [x24, #:lo12:.LANCHOR162]
+	bl	ftl_memcpy
+	ldrb	w1, [x20, #:lo12:.LANCHOR80]
+	ldrh	w0, [x19, #:lo12:.LANCHOR86]
+	mul	w0, w0, w1
+	adrp	x1, .LANCHOR131
+	ldrb	w1, [x1, #:lo12:.LANCHOR131]
+	lsl	w2, w0, 2
+	cmp	w1, w0, lsr 6
+	bge	.L3293
+	ldr	x0, [x22, #:lo12:.LANCHOR163]
+	mov	w1, 0
+	bl	ftl_memset
+	ldrb	w21, [x21, #:lo12:.LANCHOR224]
+	cmp	w21, 1
+	bne	.L3334
+	ldrb	w1, [x20, #:lo12:.LANCHOR80]
+	ldrh	w0, [x19, #:lo12:.LANCHOR86]
+	mul	w0, w0, w1
+	adrp	x1, .LANCHOR221
+	ldrh	w1, [x1, #:lo12:.LANCHOR221]
+	sub	w25, w1, w0, lsl 2
+	ldr	x1, [x27, 8]
+	mov	w2, w25
+	add	x1, x1, x0, sxtw 2
+	ldr	x0, [x22, #:lo12:.LANCHOR163]
+	bl	ftl_memcpy
+.L3294:
+	adrp	x0, .LANCHOR95
+	ldrh	w0, [x0, #:lo12:.LANCHOR95]
+	str	w0, [x29, 184]
+	ldr	x0, [x29, 176]
+	ldrb	w0, [x0, #:lo12:.LANCHOR79]
+	str	w0, [x29, 188]
+	cmp	w0, 2
+	bne	.L3295
+	adrp	x0, .LANCHOR81
+	ldrb	w0, [x0, #:lo12:.LANCHOR81]
+	cbz	w0, .L3296
+.L3295:
+	adrp	x0, .LANCHOR36
+	ldrb	w0, [x0, #:lo12:.LANCHOR36]
+	cbz	w0, .L3297
+.L3296:
+	ldp	w0, w1, [x29, 184]
+	mul	w0, w0, w1
+	str	w0, [x29, 184]
+	mov	w0, 1
+	str	w0, [x29, 188]
+.L3297:
+	adrp	x22, .LANCHOR36
+	mov	w28, 0
+	add	x0, x22, :lo12:.LANCHOR36
+	mov	w10, 0
+	str	x0, [x29, 112]
+.L3298:
+	sub	w0, w28, #1
+	str	w0, [x29, 144]
+	ldr	w0, [x29, 184]
+	cmp	w0, w28
+	bls	.L3311
+	add	w0, w28, w28, lsl 1
+	mov	x20, 0
+	sub	w0, w0, #1
+	str	w0, [x29, 164]
+	adrp	x0, .LANCHOR37
+	add	x0, x0, :lo12:.LANCHOR37
+	str	x0, [x29, 120]
+	b	.L3312
+.L3286:
+	ldrh	w2, [x19, #:lo12:.LANCHOR86]
+	ldrb	w0, [x20, #:lo12:.LANCHOR80]
+	mul	w2, w2, w0
+	lsl	w2, w2, 2
+	b	.L3368
+.L3293:
+	ldr	x1, [x27, 8]
+	mov	w21, 0
+	add	x1, x1, x0, sxtw 2
+	ldr	x0, [x22, #:lo12:.LANCHOR163]
+	bl	ftl_memcpy
+.L3369:
+	mov	w25, 0
+	b	.L3294
+.L3334:
+	mov	w21, 1
+	b	.L3369
+.L3307:
+	ldp	x1, x0, [x29, 128]
+	ldr	x2, [x29, 176]
+	ldrh	w0, [x0, 96]
+	ldrh	w1, [x1]
+	ldrb	w2, [x2, #:lo12:.LANCHOR79]
+	cmp	w2, 2
+	mul	w0, w0, w1
+	str	w0, [x29, 200]
+	add	w1, w22, w0
+	beq	.L3299
+	ldr	x3, [x29, 112]
+	ldrb	w3, [x3]
+	cbz	w3, .L3300
+.L3299:
+	ldr	w0, [x29, 144]
+	add	w1, w1, w0
+	orr	w1, w1, w2, lsl 24
+.L3370:
+	str	w1, [x27, 40]
+.L3301:
+	mov	w1, 1
 	str	x8, [x29, 96]
+	str	w10, [x29, 104]
+	mov	x0, x27
+	bl	sblk_read_page
+	adrp	x1, .LANCHOR163
+	ldr	w10, [x29, 104]
+	ldr	x0, [x27, 24]
+	ldr	x8, [x29, 96]
+	cbz	w21, .L3304
+	ldr	x2, [x1, #:lo12:.LANCHOR163]
+	ldr	w3, [x2, x8]
+	cbnz	w3, .L3304
+	ldr	w3, [x0, 8]
+	str	w3, [x2, x8]
+.L3304:
+	ldr	x2, [x24, #:lo12:.LANCHOR162]
+	ldr	w6, [x0, 4]
+	ldr	w3, [x2, x8]
+	cmp	w3, w6
+	bne	.L3305
+	ldr	x2, [x1, #:lo12:.LANCHOR163]
+	ldr	w4, [x2, x8]
+	ldr	w2, [x0, 8]
+	cmp	w4, w2
+	beq	.L3306
+.L3305:
+	ldr	x1, [x1, #:lo12:.LANCHOR163]
+	ldr	w2, [x0, 12]
+	str	w2, [sp]
+	str	w10, [x29, 96]
 	ldr	w4, [x1, x8]
 	ldr	w5, [x0]
 	ldr	w7, [x0, 8]
-	ldr	w1, [x28, 40]
-	ldr	w2, [x28, 52]
-	ldr	x0, [x29, 104]
+	adrp	x0, .LC211
+	ldr	w1, [x27, 40]
+	add	x0, x0, :lo12:.LC211
+	ldr	w2, [x27, 52]
+	str	x8, [x29, 104]
 	bl	printf
-	ldr	x0, [x23, #:lo12:.LANCHOR157]
-	ldr	x8, [x29, 96]
+	ldr	x0, [x24, #:lo12:.LANCHOR162]
+	ldr	x8, [x29, 104]
+	ldr	w10, [x29, 96]
 	ldr	w0, [x0, x8]
 	cmn	w0, #1
-	beq	.L3028
-	mov	x0, x28
+	beq	.L3306
+	mov	x0, x27
 	bl	zbuf_free
 	adrp	x0, .LANCHOR9
-	ldrh	w1, [x20, 80]
+	ldrh	w1, [x23, 80]
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x1, lsl 1]
-	ldr	x0, [x27, #:lo12:.LANCHOR10]
-	ldrh	w1, [x20, 80]
+	ldr	x0, [x26, #:lo12:.LANCHOR10]
+	ldrh	w1, [x23, 80]
 	strh	w1, [x0, 130]
-	b	.L3015
-.L3023:
-	cmp	w1, 3
-	add	w0, w22, w0
-	bne	.L3025
-	orr	w0, w0, w24, lsl 24
-	b	.L3025
-.L3028:
-	add	w19, w19, 1
-	add	w24, w24, 1
+	b	.L3285
+.L3300:
+	cmp	w2, 3
+	bne	.L3302
+	ldr	x2, [x29, 120]
+	ldrb	w2, [x2]
+	cbz	w2, .L3303
+	ldr	w0, [x29, 164]
+	add	w1, w1, w0
+	orr	w1, w1, 50331648
+	b	.L3370
+.L3303:
+	add	w0, w28, w0
+	orr	w0, w0, w22, lsl 24
+.L3371:
+	str	w0, [x27, 40]
+	b	.L3301
+.L3302:
+	add	w0, w28, w0
+	b	.L3371
+.L3306:
+	add	w10, w10, 1
+	add	w22, w22, 1
 	add	x8, x8, 4
-.L3031:
+.L3309:
 	ldr	w0, [x29, 188]
-	cmp	w0, w24
-	bcs	.L3029
-	add	x21, x21, 1
-.L3034:
+	cmp	w0, w22
+	bcs	.L3307
+	add	x20, x20, 1
+.L3312:
 	ldr	x0, [x29, 168]
 	ldrb	w0, [x0, 9]
-	cmp	w0, w21
-	ble	.L3030
-	add	x0, x20, x21, lsl 1
+	cmp	w0, w20
+	ble	.L3308
+	add	x0, x23, x20, lsl 1
+	str	x0, [x29, 136]
+	ldr	x0, [x29, 152]
+	sbfiz	x8, x10, 2, 32
+	mov	w22, 1
+	add	x0, x0, :lo12:.LANCHOR111
 	str	x0, [x29, 128]
-	ldr	x0, [x29, 144]
-	sbfiz	x8, x19, 2, 32
-	mov	w24, 1
-	add	x0, x0, :lo12:.LANCHOR105
-	str	x0, [x29, 120]
-	b	.L3031
-.L3030:
-	adrp	x0, .LANCHOR74
-	ldrb	w0, [x0, #:lo12:.LANCHOR74]
+	b	.L3309
+.L3308:
+	adrp	x0, .LANCHOR81
+	ldrb	w0, [x0, #:lo12:.LANCHOR81]
 	cmp	w0, 0
-	cinc	w22, w22, ne
-	add	w22, w22, 1
-	b	.L3021
-.L3033:
-	mov	x0, x28
+	cinc	w28, w28, ne
+	add	w28, w28, 1
+	b	.L3298
+.L3311:
+	mov	x0, x27
 	bl	zbuf_free
-	ldr	x3, [x29, 152]
-	adrp	x21, .LANCHOR9
 	ldr	x0, [x29, 168]
-	adrp	x24, .LANCHOR68
-	ldrh	w2, [x20, 80]
-	mov	w26, 0
-	ldr	x1, [x21, #:lo12:.LANCHOR9]
+	adrp	x20, .LANCHOR9
+	ldrh	w3, [x19, #:lo12:.LANCHOR86]
+	mov	w25, 0
+	ldrh	w2, [x23, 80]
+	mov	w27, 0
+	ldr	x1, [x20, #:lo12:.LANCHOR9]
 	mov	w28, 0
-	ldrh	w3, [x3, #:lo12:.LANCHOR79]
 	ldrb	w0, [x0, 9]
-	str	x21, [x29, 136]
-	str	wzr, [x29, 180]
+	str	x20, [x29, 144]
 	mul	w0, w0, w3
 	strh	w0, [x1, x2, lsl 1]
-	add	x0, x24, :lo12:.LANCHOR68
+	adrp	x0, .LANCHOR75
+	add	x0, x0, :lo12:.LANCHOR75
 	str	x0, [x29, 104]
-.L3035:
-	sub	w0, w28, #1
+.L3313:
+	sub	w0, w27, #1
 	str	w0, [x29, 128]
 	ldr	w0, [x29, 184]
-	cmp	w0, w28
-	bls	.L3048
-	mov	x22, 0
-	b	.L3049
-.L3044:
-	ldr	w0, [x29, 180]
-	ldr	x1, [x23, #:lo12:.LANCHOR157]
-	sbfiz	x0, x0, 2, 32
-	ldr	w21, [x1, x0]
-	cmn	w21, #1
-	beq	.L3036
-	ldr	x1, [x25, #:lo12:.LANCHOR158]
+	cmp	w0, w27
+	bls	.L3327
+	add	w22, w27, w27, lsl 1
+	mov	x21, 0
+	sub	w0, w22, #1
+	str	w0, [x29, 120]
+	b	.L3328
+.L3323:
+	ldr	x1, [x24, #:lo12:.LANCHOR162]
+	sbfiz	x0, x28, 2, 32
+	ldr	w20, [x1, x0]
+	cmn	w20, #1
+	beq	.L3314
+	adrp	x1, .LANCHOR163
+	ldr	x1, [x1, #:lo12:.LANCHOR163]
 	ldr	w0, [x1, x0]
-	str	w0, [x29, 152]
-	mov	w0, w21
+	str	w0, [x29, 164]
+	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 204]
 	cmn	w0, #1
-	bne	.L3037
+	bne	.L3315
 	mov	w2, 0
 	add	x1, x29, 204
-	mov	w0, w21
+	mov	w0, w20
 	bl	pm_log2phys
-.L3037:
-	ldr	x0, [x29, 120]
-	ldr	x1, [x29, 144]
+.L3315:
+	ldr	x0, [x29, 136]
+	ldr	x1, [x29, 152]
+	ldr	x2, [x29, 176]
 	ldrh	w0, [x0, 96]
-	ldrh	w1, [x1, #:lo12:.LANCHOR105]
+	ldrh	w1, [x1, #:lo12:.LANCHOR111]
+	ldrb	w2, [x2, #:lo12:.LANCHOR79]
+	cmp	w2, 2
 	mul	w0, w0, w1
-	ldr	x1, [x29, 160]
-	ldrb	w1, [x1, #:lo12:.LANCHOR73]
-	cmp	w1, 2
-	beq	.L3038
-	adrp	x2, .LANCHOR35
-	ldrb	w2, [x2, #:lo12:.LANCHOR35]
-	cbz	w2, .L3039
-.L3038:
-	ldr	w2, [x29, 128]
-	add	w0, w0, w2
-	add	w0, w0, w24
-	orr	w0, w0, w1, lsl 24
-.L3041:
-	ldr	x1, [x29, 112]
+	add	w1, w22, w0
+	beq	.L3316
+	adrp	x6, .LANCHOR36
+	ldrb	w6, [x6, #:lo12:.LANCHOR36]
+	cbz	w6, .L3317
+.L3316:
+	ldr	w0, [x29, 128]
+	add	w1, w0, w1
+	orr	w1, w1, w2, lsl 24
+	str	w1, [x29, 200]
+.L3318:
+	ldp	x0, x1, [x29, 104]
 	mov	w19, 24
-	str	w0, [x29, 200]
 	mov	w2, 1
-	ldr	x0, [x29, 104]
 	ldrb	w1, [x1]
 	ldrh	w0, [x0]
 	sub	w19, w19, w1
-	ldr	w1, [x29, 152]
+	ldr	w1, [x29, 164]
 	sub	w19, w19, w0
 	lsr	w0, w1, w0
 	lsl	w19, w2, w19
 	sub	w19, w19, #1
 	and	w19, w19, w0
-	adrp	x0, .LANCHOR69
-	ldrb	w0, [x0, #:lo12:.LANCHOR69]
+	adrp	x0, .LANCHOR76
+	ldrb	w0, [x0, #:lo12:.LANCHOR76]
 	udiv	w19, w19, w0
 	ldr	w0, [x29, 204]
 	cmp	w1, w0
 	and	x19, x19, 65535
-	bne	.L3042
+	bne	.L3321
 	add	x1, x29, 200
-	mov	w0, w21
+	mov	w0, w20
 	bl	pm_log2phys
-	add	w26, w26, 1
+	add	w25, w25, 1
 	mov	w0, w19
 	bl	ftl_vpn_decrement
-.L3043:
-	ldr	w0, [x29, 180]
-	add	w0, w0, 1
-	str	w0, [x29, 180]
+.L3322:
 	adrp	x0, .LANCHOR7
+	add	w28, w28, 1
 	ldr	x0, [x0, #:lo12:.LANCHOR7]
 	add	x0, x0, x19, lsl 2
 	ldrb	w0, [x0, 2]
 	tst	w0, 224
-	bne	.L3036
-	ldr	x0, [x29, 136]
+	bne	.L3314
+	ldr	x0, [x29, 144]
 	lsl	x19, x19, 1
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x0, x19]
-	cbz	w1, .L3036
+	cbz	w1, .L3314
 	strh	wzr, [x0, x19]
-.L3036:
-	add	w24, w24, 1
-.L3046:
+.L3314:
+	add	w22, w22, 1
+.L3325:
 	ldr	w0, [x29, 188]
-	cmp	w0, w24
-	bcs	.L3044
-	add	x22, x22, 1
-.L3049:
+	cmp	w0, w22
+	bcs	.L3323
+	add	x21, x21, 1
+.L3328:
 	ldr	x0, [x29, 168]
 	ldrb	w0, [x0, 9]
-	cmp	w0, w22
-	ble	.L3045
-	add	x0, x20, x22, lsl 1
-	mov	w24, 1
-	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR31
-	add	x0, x0, :lo12:.LANCHOR31
+	cmp	w0, w21
+	ble	.L3324
+	add	x0, x23, x21, lsl 1
+	mov	w22, 1
+	str	x0, [x29, 136]
+	adrp	x0, .LANCHOR32
+	add	x0, x0, :lo12:.LANCHOR32
 	str	x0, [x29, 112]
-	b	.L3046
-.L3039:
-	cmp	w1, 3
-	add	w0, w28, w0
-	bne	.L3041
-	orr	w0, w0, w24, lsl 24
-	b	.L3041
-.L3042:
+	b	.L3325
+.L3317:
+	cmp	w2, 3
+	bne	.L3319
+	adrp	x2, .LANCHOR37
+	ldrb	w6, [x2, #:lo12:.LANCHOR37]
+	lsl	w2, w22, 24
+	cbz	w6, .L3320
+	ldr	w0, [x29, 120]
+	add	w1, w0, w1
+	orr	w0, w1, w2
+.L3372:
+	str	w0, [x29, 200]
+	b	.L3318
+.L3320:
+	add	w0, w27, w0
+	orr	w0, w0, w2
+	b	.L3372
+.L3319:
+	add	w0, w27, w0
+	b	.L3372
+.L3321:
 	ldr	w1, [x29, 200]
 	cmp	w0, w1
-	cinc	w26, w26, eq
-	b	.L3043
-.L3045:
-	adrp	x0, .LANCHOR74
-	ldrb	w0, [x0, #:lo12:.LANCHOR74]
+	cinc	w25, w25, eq
+	b	.L3322
+.L3324:
+	adrp	x0, .LANCHOR81
+	ldrb	w0, [x0, #:lo12:.LANCHOR81]
 	cmp	w0, 0
-	cinc	w28, w28, ne
-	add	w28, w28, 1
-	b	.L3035
-.L3048:
-	ldr	x0, [x29, 136]
-	ldrh	w1, [x20, 80]
+	cinc	w27, w27, ne
+	add	w27, w27, 1
+	b	.L3313
+.L3327:
+	ldr	x0, [x29, 144]
+	ldrh	w1, [x23, 80]
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
-	strh	w26, [x0, x1, lsl 1]
-	ldrh	w0, [x20, 80]
+	strh	w25, [x0, x1, lsl 1]
+	ldrh	w0, [x23, 80]
 	bl	zftl_insert_data_list
-	b	.L3015
-.L3009:
-	ldrh	w0, [x20, 130]
+	b	.L3285
+.L3279:
+	ldrh	w0, [x23, 130]
 	cmp	w0, w1
-	beq	.L3008
-	adrp	x19, .LANCHOR104
-	ldr	x1, [x19, #:lo12:.LANCHOR104]
+	beq	.L3278
+	adrp	x19, .LANCHOR110
+	ldr	x1, [x19, #:lo12:.LANCHOR110]
 	ldrh	w1, [x1, 126]
 	cmp	w1, w0
-	bne	.L3053
+	bne	.L3333
 	bl	pm_flush
-	ldr	x0, [x27, #:lo12:.LANCHOR10]
+	ldr	x0, [x26, #:lo12:.LANCHOR10]
 	ldrh	w0, [x0, 130]
 	bl	ftl_free_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR104]
+	ldr	x0, [x19, #:lo12:.LANCHOR110]
 	mov	w1, -1
 	strh	w1, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L3053:
-	ldr	x0, [x27, #:lo12:.LANCHOR10]
+.L3333:
+	ldr	x0, [x26, #:lo12:.LANCHOR10]
 	mov	w1, -1
 	strh	w1, [x0, 130]
-	b	.L3008
+	b	.L3278
 	.size	gc_recovery, .-gc_recovery
-	.section	.text.zftl_init,"ax",@progbits
+	.section	.text.gc_update_l2p_map_new,"ax",@progbits
 	.align	2
-	.global	zftl_init
-	.type	zftl_init, %function
-zftl_init:
-	stp	x29, x30, [sp, -112]!
-	adrp	x1, .LANCHOR59
-	mov	w0, -1
+	.global	gc_update_l2p_map_new
+	.type	gc_update_l2p_map_new, %function
+gc_update_l2p_map_new:
+	stp	x29, x30, [sp, -176]!
+	adrp	x0, .LANCHOR10
+	adrp	x1, .LANCHOR86
 	add	x29, sp, 0
-	strb	w0, [x1, #:lo12:.LANCHOR59]
-	adrp	x1, .LANCHOR60
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR87
-	strb	wzr, [x1, #:lo12:.LANCHOR60]
-	adrp	x1, .LANCHOR129
-	stp	x19, x20, [sp, 16]
-	adrp	x21, .LANCHOR80
-	strb	w0, [x1, #:lo12:.LANCHOR129]
-	adrp	x1, .LANCHOR130
-	stp	x23, x24, [sp, 48]
-	adrp	x20, .LANCHOR210
-	strb	wzr, [x1, #:lo12:.LANCHOR130]
-	adrp	x1, .LANCHOR178
+	ldr	x21, [x0, #:lo12:.LANCHOR10]
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LANCHOR6
-	strb	w0, [x1, #:lo12:.LANCHOR178]
-	adrp	x0, .LANCHOR124
-	mov	w1, -1
+	ldrh	w26, [x1, #:lo12:.LANCHOR86]
+	add	x1, x21, 80
+	stp	x23, x24, [sp, 48]
+	adrp	x24, .LANCHOR14
+	stp	x19, x20, [sp, 16]
 	stp	x27, x28, [sp, 80]
-	strb	wzr, [x0, #:lo12:.LANCHOR124]
-	adrp	x0, .LANCHOR213
-	str	w1, [x0, #:lo12:.LANCHOR213]
-	adrp	x1, .LC202
-	adrp	x0, .LC98
-	add	x1, x1, :lo12:.LC202
-	add	x0, x0, :lo12:.LC98
-	bl	printf
-	adrp	x1, .LANCHOR32
-	add	x1, x1, :lo12:.LANCHOR32
-	adrp	x0, .LANCHOR73
-	adrp	x2, .LANCHOR126
-	adrp	x3, .LANCHOR79
-	adrp	x4, .LANCHOR69
-	ldrb	w5, [x1, 12]
-	strb	w5, [x0, #:lo12:.LANCHOR73]
-	ldrb	w0, [x1, 9]
-	strb	w0, [x2, #:lo12:.LANCHOR126]
-	ldrh	w2, [x1, 10]
-	strh	w2, [x3, #:lo12:.LANCHOR79]
-	adrp	x3, .LANCHOR18
-	ldrh	w7, [x1, 14]
-	ubfiz	w10, w0, 9, 7
-	ldrb	w6, [x3, #:lo12:.LANCHOR18]
-	adrp	x3, .LANCHOR106
-	sdiv	w8, w2, w5
-	strh	w7, [x23, #:lo12:.LANCHOR6]
-	strb	w6, [x3, #:lo12:.LANCHOR106]
-	ldrb	w3, [x1, 13]
-	adrp	x1, .LANCHOR2
-	strb	w3, [x4, #:lo12:.LANCHOR69]
-	ldrh	w4, [x1, #:lo12:.LANCHOR2]
-	adrp	x1, .LANCHOR105
-	strh	w8, [x22, #:lo12:.LANCHOR87]
-	mul	w6, w6, w3
-	strh	w4, [x1, #:lo12:.LANCHOR105]
-	strh	w10, [x20, #:lo12:.LANCHOR210]
-	mov	w3, 1
-	and	w6, w6, 255
-	mov	w1, 0
-	strb	w6, [x21, #:lo12:.LANCHOR80]
-.L3087:
-	cmp	w4, w3
-	bcs	.L3088
-	mul	w2, w0, w2
-	adrp	x3, .LANCHOR68
-	sub	w1, w1, #1
-	mov	w4, 0
-	strh	w1, [x3, #:lo12:.LANCHOR68]
-	mov	w1, 1
-	mul	w3, w2, w7
-	lsr	w11, w3, 21
-.L3089:
-	cmp	w11, w1
-	bcs	.L3090
-	mov	w1, 57344
-	sub	w4, w4, #1
-	movk	w1, 0x1c, lsl 16
-	mul	w3, w3, w6
-	adrp	x28, .LANCHOR123
-	sub	w11, w10, #1
-	mul	w1, w6, w1
-	adrp	x24, .LANCHOR193
-	mul	w8, w8, w6
-	adrp	x27, .LANCHOR215
-	mul	w2, w2, w6
-	adrp	x26, .LANCHOR151
-	lsl	w1, w1, w4
-	adrp	x4, .LANCHOR61
-	sub	w2, w2, #1
-	adrp	x25, .LANCHOR91
-	str	w1, [x4, #:lo12:.LANCHOR61]
-	adrp	x4, .LANCHOR214
-	str	w3, [x4, #:lo12:.LANCHOR214]
-	add	w3, w1, 24576
-	str	w3, [x27, #:lo12:.LANCHOR215]
-	udiv	w0, w3, w0
-	udiv	w3, w3, w2
-	adrp	x2, .LANCHOR120
-	str	w0, [x28, #:lo12:.LANCHOR123]
-	add	w0, w11, w0, lsl 2
-	add	w3, w3, 8
-	udiv	w0, w0, w10
-	strh	w0, [x24, #:lo12:.LANCHOR193]
-	ubfiz	w0, w0, 4, 16
-	sdiv	w0, w0, w8
-	adrp	x8, .LANCHOR95
-	str	x8, [x29, 104]
-	strh	w3, [x8, #:lo12:.LANCHOR95]
-	strh	w0, [x26, #:lo12:.LANCHOR151]
-	add	w0, w7, w7, lsl 1
-	asr	w0, w0, 2
-	strh	w0, [x2, #:lo12:.LANCHOR120]
-	lsr	w0, w7, 4
-	strh	w0, [x25, #:lo12:.LANCHOR91]
-	cmp	w0, 79
-	bhi	.L3091
-	mov	w0, 80
-	strh	w0, [x25, #:lo12:.LANCHOR91]
-.L3091:
-	adrp	x7, .LANCHOR121
-	mov	w0, 2000
-	adrp	x6, .LANCHOR119
-	adrp	x8, .LANCHOR150
-	strh	w0, [x7, #:lo12:.LANCHOR121]
-	mov	w0, 50
-	adrp	x2, .LANCHOR149
-	strh	w0, [x6, #:lo12:.LANCHOR119]
-	mov	w0, 256
-	strh	w0, [x8, #:lo12:.LANCHOR150]
-	mov	w0, 48
-	strh	w0, [x2, #:lo12:.LANCHOR149]
-	adrp	x0, .LANCHOR8
-	mov	w3, 32
-	cmp	w5, 2
-	mov	x11, x6
-	strh	w3, [x0, #:lo12:.LANCHOR8]
-	mov	x5, x7
-	mov	x10, x2
-	beq	.L3092
-	adrp	x12, .LANCHOR77
-	ldrb	w12, [x12, #:lo12:.LANCHOR77]
-	cbz	w12, .L3093
-.L3092:
-	mov	w2, 150
-	strh	w2, [x11, #:lo12:.LANCHOR119]
-	mov	w2, 64
-	strh	w2, [x10, #:lo12:.LANCHOR149]
-	mov	w2, 12
-	strh	w2, [x0, #:lo12:.LANCHOR8]
-	adrp	x2, .LANCHOR0
-	ldrb	w2, [x2, #:lo12:.LANCHOR0]
-	cbnz	w2, .L3095
-	mov	w2, 4
-	strh	w2, [x0, #:lo12:.LANCHOR8]
-	mov	w0, 600
-	strh	w0, [x5, #:lo12:.LANCHOR121]
-	mov	w0, 128
-	strh	w0, [x8, #:lo12:.LANCHOR150]
-.L3095:
-	adrp	x19, .LANCHOR14
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3097
-	str	x4, [x29, 96]
-	adrp	x0, .LC203
-	add	x0, x0, :lo12:.LC203
-	bl	printf
-	ldr	x4, [x29, 96]
-.L3097:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3098
-	ldr	w1, [x4, #:lo12:.LANCHOR214]
-	adrp	x0, .LC204
-	add	x0, x0, :lo12:.LC204
-	bl	printf
-.L3098:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3099
-	ldr	w1, [x28, #:lo12:.LANCHOR123]
-	adrp	x0, .LC205
-	add	x0, x0, :lo12:.LC205
-	bl	printf
-.L3099:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3100
-	ldr	w1, [x27, #:lo12:.LANCHOR215]
-	adrp	x0, .LC206
-	add	x0, x0, :lo12:.LC206
+	stp	x0, x1, [x29, 128]
+	ldrb	w1, [x1, 9]
+	mul	w26, w26, w1
+	ldr	w1, [x24, #:lo12:.LANCHOR14]
+	tbz	x1, 8, .L3375
+	ldrh	w1, [x21, 80]
+	adrp	x0, .LC213
+	add	x0, x0, :lo12:.LC213
 	bl	printf
-.L3100:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3101
-	ldrh	w1, [x24, #:lo12:.LANCHOR193]
-	adrp	x0, .LC207
-	add	x0, x0, :lo12:.LC207
+.L3375:
+	adrp	x23, .LANCHOR9
+	adrp	x0, .LANCHOR224
+	ldrh	w2, [x21, 80]
+	mov	x22, 0
+	ldr	x1, [x23, #:lo12:.LANCHOR9]
+	mov	w25, 0
+	ldrb	w0, [x0, #:lo12:.LANCHOR224]
+	sub	w0, w26, w0
+	strh	w0, [x1, x2, lsl 1]
+	adrp	x0, .LANCHOR131
+	add	x0, x0, :lo12:.LANCHOR131
+	str	x0, [x29, 104]
+.L3376:
+	mov	w28, w22
+	cmp	w26, w22
+	bhi	.L3386
+	ldr	w0, [x24, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L3387
+	ldr	x0, [x29, 128]
+	mov	w3, w25
+	ldr	x1, [x23, #:lo12:.LANCHOR9]
+	ldrh	w2, [x21, 80]
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	ldrh	w2, [x1, x2, lsl 1]
+	ldrh	w1, [x0, 80]
+	adrp	x0, .LC216
+	add	x0, x0, :lo12:.LC216
 	bl	printf
-.L3101:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3102
-	ldrh	w1, [x20, #:lo12:.LANCHOR210]
-	adrp	x0, .LC208
-	add	x0, x0, :lo12:.LC208
+.L3387:
+	ldrh	w1, [x21, 80]
+	ldr	x0, [x23, #:lo12:.LANCHOR9]
+	ldrh	w0, [x0, x1, lsl 1]
+	cmp	w25, w0
+	beq	.L3388
+	adrp	x1, .LANCHOR226
+	adrp	x0, .LC0
+	mov	w2, 898
+	add	x1, x1, :lo12:.LANCHOR226
+	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3102:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3103
-	ldrh	w1, [x26, #:lo12:.LANCHOR151]
-	adrp	x0, .LC209
-	add	x0, x0, :lo12:.LC209
+.L3388:
+	ldrh	w1, [x21, 80]
+	ldr	x0, [x23, #:lo12:.LANCHOR9]
+	strh	w25, [x0, x1, lsl 1]
+	ldrh	w0, [x21, 80]
+	bl	zftl_insert_data_list
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 176
+	ret
+.L3386:
+	adrp	x27, .LANCHOR162
+	lsl	x19, x22, 2
+	ldr	x0, [x27, #:lo12:.LANCHOR162]
+	ldr	w2, [x0, x19]
+	cmn	w2, #1
+	beq	.L3377
+	adrp	x0, .LANCHOR131
+	ldrb	w20, [x0, #:lo12:.LANCHOR131]
+	lsl	w20, w20, 7
+	udiv	w20, w2, w20
+	and	w0, w20, 65535
+	str	w0, [x29, 156]
+	ldr	w0, [x24, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L3378
+	ldr	w1, [x29, 156]
+	adrp	x0, .LC214
+	mov	w3, w22
+	add	x0, x0, :lo12:.LC214
 	bl	printf
-.L3103:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3104
-	ldrh	w1, [x25, #:lo12:.LANCHOR91]
-	adrp	x0, .LC210
-	add	x0, x0, :lo12:.LC210
-	bl	printf
-.L3104:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3105
-	ldr	x0, [x29, 104]
-	ldrh	w1, [x0, #:lo12:.LANCHOR95]
-	adrp	x0, .LC211
-	add	x0, x0, :lo12:.LC211
-	bl	printf
-.L3105:
-	bl	zbuf_init
-	adrp	x25, .LANCHOR10
-	ldrh	w1, [x23, #:lo12:.LANCHOR6]
-	mov	w0, 6
-	mul	w0, w1, w0
-	bl	ftl_malloc
-	adrp	x1, .LANCHOR4
-	str	x0, [x1, #:lo12:.LANCHOR4]
-	ldrb	w1, [x21, #:lo12:.LANCHOR80]
-	ldrh	w0, [x22, #:lo12:.LANCHOR87]
-	mul	w0, w0, w1
-	lsl	w0, w0, 2
-	bl	ftl_malloc
-	adrp	x1, .LANCHOR112
-	adrp	x2, ftl_ext_info_data_buffer
-	add	x2, x2, :lo12:ftl_ext_info_data_buffer
-	str	x0, [x1, #:lo12:.LANCHOR112]
-	adrp	x0, .LANCHOR111
-	ldrh	w1, [x22, #:lo12:.LANCHOR87]
-	str	x2, [x0, #:lo12:.LANCHOR111]
-	ldrb	w0, [x21, #:lo12:.LANCHOR80]
-	mul	w1, w1, w0
-	lsl	w0, w1, 1
-	adrp	x1, .LANCHOR9
-	add	x3, x2, x0, sxtw 2
-	str	x3, [x1, #:lo12:.LANCHOR9]
-	ldrh	w1, [x23, #:lo12:.LANCHOR6]
-	add	w1, w0, w1, lsr 1
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	add	x1, x2, x1, sxtw 2
-	str	x1, [x25, #:lo12:.LANCHOR10]
-	tbz	x0, 12, .L3106
-	adrp	x0, .LC212
-	add	x0, x0, :lo12:.LC212
-	bl	printf
-.L3106:
-	ldrh	w0, [x22, #:lo12:.LANCHOR87]
-	ldrb	w21, [x21, #:lo12:.LANCHOR80]
-	ldrh	w1, [x23, #:lo12:.LANCHOR6]
-	ldrh	w22, [x24, #:lo12:.LANCHOR193]
-	mul	w21, w0, w21
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	add	w21, w1, w21, lsl 2
-	lsl	w1, w1, 2
-	lsl	w21, w21, 1
-	add	w22, w1, w22, lsl 2
-	add	w21, w21, 632
-	add	w22, w22, 704
-	tbz	x0, 12, .L3107
-	ldrh	w3, [x20, #:lo12:.LANCHOR210]
-	adrp	x0, .LC213
-	mov	w2, w22
-	mov	w1, w21
-	add	x0, x0, :lo12:.LC213
-	bl	printf
-.L3107:
-	ldrh	w0, [x20, #:lo12:.LANCHOR210]
-	cmp	w21, w0
-	bhi	.L3108
-	cmp	w22, w0
-	bls	.L3109
-.L3108:
-.L3155:
-	b	.L3155
-.L3088:
-	add	w1, w1, 1
-	lsl	w3, w3, 1
-	and	w1, w1, 65535
-	b	.L3087
-.L3090:
-	add	w4, w4, 1
-	lsl	w1, w1, 1
-	and	w4, w4, 65535
-	b	.L3089
-.L3093:
-	adrp	x0, .LANCHOR35
-	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbz	w0, .L3095
-	mov	w0, 1200
-	strh	w3, [x6, #:lo12:.LANCHOR119]
-	strh	w0, [x7, #:lo12:.LANCHOR121]
-	strh	w3, [x2, #:lo12:.LANCHOR149]
-	b	.L3095
-.L3109:
-	bl	sblk_init
-	bl	ftl_info_blk_init
-	cmn	w0, #1
-	beq	.L3086
-	bl	ftl_ext_info_init
-	adrp	x19, .LANCHOR104
-	bl	gc_init
-	mov	w0, 1
-	bl	pm_init
-	bl	lpa_rebuild_hash
-	ldr	x0, [x25, #:lo12:.LANCHOR10]
-	mov	x1, 0
-	add	x0, x0, 16
-	bl	ftl_open_sblk_recovery
-	ldr	x0, [x25, #:lo12:.LANCHOR10]
-	add	x1, x0, 16
-	add	x0, x0, 48
-	bl	ftl_open_sblk_recovery
-	ldr	x1, [x19, #:lo12:.LANCHOR104]
-	ldr	w0, [x1, 8]
-	add	w0, w0, 16
-	str	w0, [x1, 8]
-	ldr	x0, [x25, #:lo12:.LANCHOR10]
-	add	x0, x0, 16
-	bl	ftl_info_data_recovery
-	ldr	x0, [x25, #:lo12:.LANCHOR10]
-	add	x0, x0, 48
-	bl	ftl_info_data_recovery
-	ldr	x0, [x25, #:lo12:.LANCHOR10]
-	add	x0, x0, 80
-	bl	ftl_info_data_recovery
-	bl	gc_recovery
-	bl	pm_flush
-	mov	w0, 1
-	bl	ftl_total_vpn_update
-	adrp	x0, .LANCHOR188
-	ldrb	w0, [x0, #:lo12:.LANCHOR188]
-	cbz	w0, .L3111
-	ldr	x1, [x19, #:lo12:.LANCHOR104]
-	ldr	w0, [x1, 68]
-	add	w0, w0, 1
-	str	w0, [x1, 68]
-.L3111:
-	bl	ftl_ext_info_flush
-	mov	w0, 0
-	bl	ftl_info_flush
-	bl	print_ftl_debug_info
-	mov	w0, 0
-.L3086:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 112
-	ret
-	.size	zftl_init, .-zftl_init
-	.section	.text.rk_ftl_init,"ax",@progbits
-	.align	2
-	.global	rk_ftl_init
-	.type	rk_ftl_init, %function
-rk_ftl_init:
-	stp	x29, x30, [sp, -32]!
-	add	x29, sp, 0
-	str	x19, [sp, 16]
-	bl	nand_flash_init
-	cbnz	w0, .L3159
-	bl	zftl_init
-.L3159:
-	mov	w19, w0
-	bl	idb_init
-	mov	w1, w19
-	adrp	x0, .LC214
-	add	x0, x0, :lo12:.LC214
-	bl	printf
-	mov	w0, w19
-	ldr	x19, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	ret
-	.size	rk_ftl_init, .-rk_ftl_init
-	.section	.text.gc_update_l2p_map_new,"ax",@progbits
-	.align	2
-	.global	gc_update_l2p_map_new
-	.type	gc_update_l2p_map_new, %function
-gc_update_l2p_map_new:
-	stp	x29, x30, [sp, -176]!
-	adrp	x0, .LANCHOR10
-	adrp	x1, .LANCHOR79
-	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	ldr	x21, [x0, #:lo12:.LANCHOR10]
-	stp	x25, x26, [sp, 64]
-	ldrh	w26, [x1, #:lo12:.LANCHOR79]
-	add	x1, x21, 80
-	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR14
-	stp	x19, x20, [sp, 16]
-	stp	x27, x28, [sp, 80]
-	stp	x0, x1, [x29, 128]
-	ldrb	w1, [x1, 9]
-	mul	w26, w26, w1
-	ldr	w1, [x24, #:lo12:.LANCHOR14]
-	tbz	x1, 8, .L3162
-	ldrh	w1, [x21, 80]
-	adrp	x0, .LC215
-	add	x0, x0, :lo12:.LC215
-	bl	printf
-.L3162:
-	adrp	x23, .LANCHOR9
-	ldrh	w1, [x21, 80]
-	sub	w2, w26, #1
-	mov	x22, 0
-	ldr	x0, [x23, #:lo12:.LANCHOR9]
-	mov	w25, 0
-	strh	w2, [x0, x1, lsl 1]
-	adrp	x0, .LANCHOR126
-	add	x0, x0, :lo12:.LANCHOR126
-	str	x0, [x29, 104]
-.L3163:
-	mov	w28, w22
-	cmp	w26, w22
-	bhi	.L3173
-	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3174
-	ldr	x0, [x29, 128]
-	mov	w3, w25
-	ldr	x1, [x23, #:lo12:.LANCHOR9]
-	ldrh	w2, [x21, 80]
-	ldr	x0, [x0, #:lo12:.LANCHOR10]
-	ldrh	w2, [x1, x2, lsl 1]
-	ldrh	w1, [x0, 80]
-	adrp	x0, .LC218
-	add	x0, x0, :lo12:.LC218
-	bl	printf
-.L3174:
-	ldrh	w1, [x21, 80]
-	ldr	x0, [x23, #:lo12:.LANCHOR9]
-	ldrh	w0, [x0, x1, lsl 1]
-	cmp	w25, w0
-	beq	.L3175
-	adrp	x1, .LANCHOR216
-	adrp	x0, .LC0
-	mov	w2, 753
-	add	x1, x1, :lo12:.LANCHOR216
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L3175:
-	ldrh	w1, [x21, 80]
-	ldr	x0, [x23, #:lo12:.LANCHOR9]
-	strh	w25, [x0, x1, lsl 1]
-	ldrh	w0, [x21, 80]
-	bl	zftl_insert_data_list
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 176
-	ret
-.L3173:
-	adrp	x27, .LANCHOR157
-	lsl	x19, x22, 2
-	ldr	x0, [x27, #:lo12:.LANCHOR157]
-	ldr	w2, [x0, x19]
-	cmn	w2, #1
-	beq	.L3164
-	adrp	x0, .LANCHOR126
-	ldrb	w20, [x0, #:lo12:.LANCHOR126]
-	lsl	w20, w20, 7
-	udiv	w20, w2, w20
-	and	w0, w20, 65535
-	str	w0, [x29, 156]
-	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3165
-	ldr	w1, [x29, 156]
-	adrp	x0, .LC216
-	mov	w3, w22
-	add	x0, x0, :lo12:.LC216
-	bl	printf
-.L3165:
+.L3378:
 	sub	w28, w26, w28
 	add	x28, x28, x22
 	lsl	x0, x28, 2
 	str	x0, [x29, 144]
-	adrp	x0, .LC217
-	add	x0, x0, :lo12:.LC217
+	adrp	x0, .LC215
+	add	x0, x0, :lo12:.LC215
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR68
-	add	x0, x0, :lo12:.LANCHOR68
+	adrp	x0, .LANCHOR75
+	add	x0, x0, :lo12:.LANCHOR75
 	str	x0, [x29, 112]
-.L3166:
+.L3379:
 	ldr	x0, [x29, 144]
 	cmp	x0, x19
-	bne	.L3172
-.L3164:
+	bne	.L3385
+.L3377:
 	add	x22, x22, 1
-	b	.L3163
-.L3172:
-	ldr	x0, [x27, #:lo12:.LANCHOR157]
+	b	.L3376
+.L3385:
+	ldr	x0, [x27, #:lo12:.LANCHOR162]
 	ldr	w20, [x0, x19]
 	cmn	w20, #1
-	beq	.L3167
+	beq	.L3380
 	ldr	x0, [x29, 104]
 	ldr	w1, [x29, 156]
 	ldrb	w0, [x0]
 	lsl	w0, w0, 7
 	udiv	w0, w20, w0
 	cmp	w1, w0, uxth
-	bne	.L3167
-	adrp	x0, .LANCHOR158
-	ldr	x0, [x0, #:lo12:.LANCHOR158]
+	bne	.L3380
+	adrp	x0, .LANCHOR163
+	ldr	x0, [x0, #:lo12:.LANCHOR163]
 	ldr	w28, [x0, x19]
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 172]
 	cmn	w0, #1
-	bne	.L3168
+	bne	.L3381
 	mov	w2, 0
 	add	x1, x29, 172
 	mov	w0, w20
 	bl	pm_log2phys
-.L3168:
+.L3381:
 	ldr	w3, [x29, 172]
 	cmp	w28, w3
-	bne	.L3169
-	adrp	x0, .LANCHOR159
+	bne	.L3382
+	adrp	x0, .LANCHOR164
 	mov	w2, 1
 	add	x1, x29, 168
 	add	w25, w25, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR159]
+	ldr	x0, [x0, #:lo12:.LANCHOR164]
 	ldr	w0, [x0, x19]
 	str	w0, [x29, 168]
 	mov	w0, w20
 	bl	pm_log2phys
 	ldr	x0, [x29, 112]
 	ldrh	w2, [x0]
-	adrp	x0, .LANCHOR31
-	ldrb	w1, [x0, #:lo12:.LANCHOR31]
+	adrp	x0, .LANCHOR32
+	ldrb	w1, [x0, #:lo12:.LANCHOR32]
 	mov	w0, 24
 	lsr	w28, w28, w2
 	sub	w0, w0, w1
@@ -20144,28 +21396,28 @@ gc_update_l2p_map_new:
 	lsl	w0, w0, w1
 	sub	w0, w0, #1
 	and	w28, w0, w28
-	adrp	x0, .LANCHOR69
-	ldrb	w0, [x0, #:lo12:.LANCHOR69]
+	adrp	x0, .LANCHOR76
+	ldrb	w0, [x0, #:lo12:.LANCHOR76]
 	udiv	w0, w28, w0
-.L3195:
+.L3408:
 	bl	ftl_vpn_decrement
-	ldr	x0, [x27, #:lo12:.LANCHOR157]
+	ldr	x0, [x27, #:lo12:.LANCHOR162]
 	mov	w1, -1
 	str	w1, [x0, x19]
-.L3167:
+.L3380:
 	add	x19, x19, 4
-	b	.L3166
-.L3169:
+	b	.L3379
+.L3382:
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3171
+	tbz	x0, 8, .L3384
 	ldr	x0, [x29, 120]
 	mov	w2, w28
 	mov	w1, w20
 	bl	printf
-.L3171:
+.L3384:
 	ldr	x0, [x29, 136]
 	ldrh	w0, [x0]
-	b	.L3195
+	b	.L3408
 	.size	gc_update_l2p_map_new, .-gc_update_l2p_map_new
 	.section	.text.gc_scan_src_blk_one_page,"ax",@progbits
 	.align	2
@@ -20178,428 +21430,539 @@ gc_scan_src_blk_one_page:
 	mov	w5, 65535
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR64
-	add	x1, x19, :lo12:.LANCHOR64
+	adrp	x20, .LANCHOR71
+	add	x1, x20, :lo12:.LANCHOR71
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR80
+	adrp	x21, .LANCHOR80
 	stp	x25, x26, [sp, 64]
-	ldrb	w6, [x22, #:lo12:.LANCHOR80]
+	ldrb	w6, [x21, #:lo12:.LANCHOR80]
 	ldrb	w0, [x1, 4]
 	add	x2, x1, x0, sxtw 1
-	ldrh	w23, [x2, 40]
+	ldrh	w22, [x2, 40]
 	ldrh	w2, [x1, 2]
-.L3197:
-	cmp	w23, w5
-	beq	.L3199
-	cbz	w4, .L3200
-	add	x1, x19, :lo12:.LANCHOR64
+.L3410:
+	cmp	w22, w5
+	beq	.L3412
+	cbz	w4, .L3413
+	add	x1, x20, :lo12:.LANCHOR71
 	strh	w2, [x1, 2]
-.L3200:
-	cbz	w3, .L3201
-	add	x1, x19, :lo12:.LANCHOR64
+.L3413:
+	cbz	w3, .L3414
+	add	x1, x20, :lo12:.LANCHOR71
 	strb	w0, [x1, 4]
-.L3201:
+.L3414:
 	mov	w0, 1
-	adrp	x24, .LANCHOR105
+	adrp	x23, .LANCHOR111
 	bl	buf_alloc
-	adrp	x25, .LANCHOR73
-	mov	x21, x0
-	add	x24, x24, :lo12:.LANCHOR105
-	add	x25, x25, :lo12:.LANCHOR73
+	adrp	x24, .LANCHOR36
+	mov	x25, x0
+	add	x23, x23, :lo12:.LANCHOR111
+	add	x24, x24, :lo12:.LANCHOR36
 	mov	w26, 1
-.L3202:
-	add	x20, x19, :lo12:.LANCHOR64
-	ldrb	w1, [x20, 6]
+.L3415:
+	add	x19, x20, :lo12:.LANCHOR71
+	ldrb	w1, [x19, 6]
 	cmp	w26, w1
-	ble	.L3211
-	mov	x0, x21
+	ble	.L3425
+	mov	x0, x25
 	bl	zbuf_free
-	ldrb	w0, [x20, 4]
-	ldrb	w1, [x22, #:lo12:.LANCHOR80]
+	ldrb	w0, [x19, 4]
+	ldrb	w1, [x21, #:lo12:.LANCHOR80]
 	add	w0, w0, 1
 	and	w0, w0, 255
-	strb	w0, [x20, 4]
+	strb	w0, [x19, 4]
 	cmp	w1, w0
-	bne	.L3196
-	ldrh	w0, [x20, 2]
-	strb	wzr, [x20, 4]
+	bne	.L3409
+	ldrh	w0, [x19, 2]
+	strb	wzr, [x19, 4]
 	add	w0, w0, 1
-	strh	w0, [x20, 2]
-.L3196:
+	strh	w0, [x19, 2]
+.L3409:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L3199:
+.L3412:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	cmp	w0, w6
-	bne	.L3198
+	bne	.L3411
 	add	w2, w2, 1
 	mov	w0, 0
 	and	w2, w2, 65535
 	mov	w4, 1
-.L3198:
+.L3411:
 	add	x3, x1, x0, sxtw 1
-	ldrh	w23, [x3, 40]
+	ldrh	w22, [x3, 40]
 	mov	w3, 1
-	b	.L3197
-.L3211:
-	ldrh	w0, [x24]
+	b	.L3410
+.L3425:
+	ldrh	w0, [x23]
 	cmp	w1, 2
-	mul	w0, w0, w23
-	beq	.L3203
-	cmp	w1, 3
-	bne	.L3204
-	adrp	x1, .LANCHOR35
-	ldrb	w1, [x1, #:lo12:.LANCHOR35]
-	cbz	w1, .L3205
-.L3203:
-	add	x1, x19, :lo12:.LANCHOR64
-	add	w0, w26, w0
-	ldrh	w1, [x1, 2]
+	mul	w0, w0, w22
+	bne	.L3416
+	ldrh	w1, [x19, 2]
 	lsl	w1, w1, 1
+.L3435:
 	sub	w1, w1, #1
+	add	w0, w26, w0
 	add	w0, w1, w0
-	ldrb	w1, [x25]
+	adrp	x1, .LANCHOR79
+	ldrb	w1, [x1, #:lo12:.LANCHOR79]
 	orr	w0, w0, w1, lsl 24
-.L3223:
-	str	w0, [x21, 40]
+.L3434:
+	str	w0, [x25, 40]
 	mov	w1, 1
-	mov	x0, x21
+	mov	x0, x25
 	bl	sblk_read_page
-	ldr	w0, [x21, 52]
+	ldr	w0, [x25, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L3208
-	ldr	x0, [x21, 24]
-	ldr	w20, [x0, 4]
-	mov	w0, w20
+	beq	.L3422
+	ldr	x0, [x25, 24]
+	ldr	w19, [x0, 4]
+	mov	w0, w19
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 92]
 	cmn	w0, #1
-	bne	.L3209
-	adrp	x0, .LANCHOR123
-	ldr	w0, [x0, #:lo12:.LANCHOR123]
-	cmp	w20, w0
-	bcs	.L3209
+	bne	.L3423
+	adrp	x0, .LANCHOR128
+	ldr	w0, [x0, #:lo12:.LANCHOR128]
+	cmp	w19, w0
+	bcs	.L3423
 	mov	w2, 0
 	add	x1, x29, 92
-	mov	w0, w20
+	mov	w0, w19
 	bl	pm_log2phys
-.L3209:
-	ldr	w2, [x21, 40]
+.L3423:
+	ldr	w2, [x25, 40]
 	ldr	w0, [x29, 92]
 	cmp	w2, w0
-	bne	.L3208
-	add	x1, x19, :lo12:.LANCHOR64
-	adrp	x4, .LANCHOR70
-	ldr	x4, [x4, #:lo12:.LANCHOR70]
+	bne	.L3422
+	add	x1, x20, :lo12:.LANCHOR71
+	adrp	x4, .LANCHOR77
+	ldr	x4, [x4, #:lo12:.LANCHOR77]
 	ldrh	w0, [x1, 24]
 	ubfiz	x3, x0, 2, 16
 	add	w0, w0, 1
 	str	w2, [x4, x3]
 	strh	w0, [x1, 24]
-.L3208:
-	add	x1, x19, :lo12:.LANCHOR64
+.L3422:
+	add	x1, x20, :lo12:.LANCHOR71
 	add	w26, w26, 1
 	ldrh	w0, [x1, 26]
 	add	w0, w0, 1
 	strh	w0, [x1, 26]
-	b	.L3202
-.L3205:
-	ldrh	w1, [x20, 2]
+	b	.L3415
+.L3416:
+	cmp	w1, 3
+	bne	.L3418
+	ldrb	w1, [x24]
+	cbnz	w1, .L3419
+	adrp	x1, .LANCHOR37
+	ldrb	w1, [x1, #:lo12:.LANCHOR37]
+	cbz	w1, .L3420
+.L3419:
+	add	x1, x20, :lo12:.LANCHOR71
+	ldrh	w1, [x1, 2]
+	add	w1, w1, w1, lsl 1
+	b	.L3435
+.L3420:
+	ldrh	w1, [x19, 2]
 	add	w0, w1, w0
 	orr	w0, w0, w26, lsl 24
-	b	.L3223
-.L3204:
-	ldrh	w1, [x20, 2]
+	b	.L3434
+.L3418:
+	ldrh	w1, [x19, 2]
 	add	w0, w1, w0
-	b	.L3223
+	b	.L3434
 	.size	gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page
 	.section	.text.gc_scan_src_blk,"ax",@progbits
 	.align	2
 	.global	gc_scan_src_blk
 	.type	gc_scan_src_blk, %function
 gc_scan_src_blk:
-	stp	x29, x30, [sp, -96]!
+	stp	x29, x30, [sp, -112]!
 	mov	w0, 65535
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR64
 	stp	x21, x22, [sp, 32]
-	ldrh	w1, [x19, #:lo12:.LANCHOR64]
+	adrp	x21, .LANCHOR71
+	stp	x19, x20, [sp, 16]
+	ldrh	w1, [x21, #:lo12:.LANCHOR71]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w1, w0
-	bne	.L3225
-	adrp	x1, .LANCHOR217
+	stp	x27, x28, [sp, 80]
+	bne	.L3437
+	adrp	x1, .LANCHOR227
 	adrp	x0, .LC0
-	mov	w2, 1240
-	add	x1, x1, :lo12:.LANCHOR217
+	mov	w2, 1504
+	add	x1, x1, :lo12:.LANCHOR227
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3225:
-	ldrh	w1, [x19, #:lo12:.LANCHOR64]
+.L3437:
+	ldrh	w1, [x21, #:lo12:.LANCHOR71]
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L3245
+	beq	.L3467
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3227
+	tbz	x0, 8, .L3439
 	adrp	x2, .LANCHOR9
 	ubfiz	x0, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC219
-	add	x0, x0, :lo12:.LC219
+	adrp	x0, .LC217
+	add	x0, x0, :lo12:.LC217
 	bl	printf
-.L3227:
-	ldrh	w0, [x19, #:lo12:.LANCHOR64]
-	add	x14, x19, :lo12:.LANCHOR64
+.L3439:
+	ldrh	w0, [x21, #:lo12:.LANCHOR71]
+	add	x14, x21, :lo12:.LANCHOR71
 	add	x1, x14, 40
 	bl	ftl_get_blk_list_in_sblk
 	and	w1, w0, 255
 	strb	w1, [x14, 5]
-	cbnz	w1, .L3228
+	cbnz	w1, .L3440
 	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR64]
-.L3245:
+	strh	w0, [x21, #:lo12:.LANCHOR71]
+.L3467:
 	mov	w0, 0
-	b	.L3224
-.L3228:
+	b	.L3436
+.L3440:
 	adrp	x4, .LANCHOR7
-	ldrh	w3, [x19, #:lo12:.LANCHOR64]
-	mov	x22, x4
+	ldrh	w3, [x21, #:lo12:.LANCHOR71]
+	mov	x19, x4
 	ldr	x1, [x4, #:lo12:.LANCHOR7]
 	mov	x2, x3
 	add	x1, x1, x3, lsl 2
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 32
-	beq	.L3229
+	beq	.L3441
 	cmp	w1, 224
-	beq	.L3229
-	cbz	w1, .L3230
+	beq	.L3441
+	cbz	w1, .L3442
 	adrp	x1, .LANCHOR10
 	ldr	x1, [x1, #:lo12:.LANCHOR10]
 	ldrh	w3, [x1, 16]
 	cmp	w3, w2
-	beq	.L3229
+	beq	.L3441
 	ldrh	w3, [x1, 48]
 	cmp	w3, w2
-	beq	.L3229
+	beq	.L3441
 	ldrh	w1, [x1, 80]
 	cmp	w1, w2
-	bne	.L3262
-.L3229:
-	add	x0, x19, :lo12:.LANCHOR64
+	bne	.L3487
+.L3441:
+	add	x0, x21, :lo12:.LANCHOR71
 	mov	w1, -1
-	strh	w1, [x19, #:lo12:.LANCHOR64]
+	strh	w1, [x21, #:lo12:.LANCHOR71]
 	strh	wzr, [x0, 24]
-	b	.L3245
-.L3230:
+	b	.L3467
+.L3442:
 	adrp	x0, .LANCHOR9
-	mov	x20, x0
+	mov	x19, x0
 	ldr	x1, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x1, x3, lsl 1]
-	cbz	w1, .L3232
-	adrp	x1, .LANCHOR217
+	cbz	w1, .L3444
+	adrp	x1, .LANCHOR227
 	adrp	x0, .LC0
-	mov	w2, 1260
-	add	x1, x1, :lo12:.LANCHOR217
+	mov	w2, 1529
+	add	x1, x1, :lo12:.LANCHOR227
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3232:
-	ldrh	w1, [x19, #:lo12:.LANCHOR64]
-	ldr	x0, [x20, #:lo12:.LANCHOR9]
+.L3444:
+	ldrh	w1, [x21, #:lo12:.LANCHOR71]
+	ldr	x0, [x19, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x1, lsl 1]
-	b	.L3229
-.L3262:
+	b	.L3441
+.L3487:
 	and	w0, w0, 255
 	sub	w0, w0, #1
 	add	x0, x14, x0, sxtw 1
-	ldrh	w21, [x0, 40]
+	ldrh	w24, [x0, 40]
 	mov	w0, 65535
-	cmp	w21, w0
-	bne	.L3233
-	adrp	x1, .LANCHOR217
+	cmp	w24, w0
+	bne	.L3445
+	adrp	x1, .LANCHOR227
 	adrp	x0, .LC0
-	mov	w2, 1268
-	add	x1, x1, :lo12:.LANCHOR217
+	mov	w2, 1539
+	add	x1, x1, :lo12:.LANCHOR227
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3233:
-	adrp	x1, .LANCHOR105
-	ldr	x3, [x22, #:lo12:.LANCHOR7]
-	adrp	x2, .LANCHOR87
-	mov	x24, x2
-	ldrh	w20, [x1, #:lo12:.LANCHOR105]
-	ldrh	w1, [x19, #:lo12:.LANCHOR64]
-	ldrh	w0, [x2, #:lo12:.LANCHOR87]
-	add	x1, x3, x1, lsl 2
+.L3445:
+	ldrh	w1, [x21, #:lo12:.LANCHOR71]
+	adrp	x23, .LANCHOR111
+	ldr	x2, [x19, #:lo12:.LANCHOR7]
+	adrp	x22, .LANCHOR95
+	ldrh	w20, [x23, #:lo12:.LANCHOR111]
+	ldrh	w0, [x22, #:lo12:.LANCHOR95]
+	add	x1, x2, x1, lsl 2
 	sub	w0, w0, #1
-	mul	w20, w20, w21
 	and	w0, w0, 65535
-	adrp	x21, .LANCHOR79
+	mul	w20, w20, w24
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 160
-	bne	.L3246
-	adrp	x1, .LANCHOR73
-	ldrb	w1, [x1, #:lo12:.LANCHOR73]
-	and	w23, w1, 65535
+	bne	.L3468
+	adrp	x1, .LANCHOR79
+	ldrb	w1, [x1, #:lo12:.LANCHOR79]
+	and	w27, w1, 65535
 	cmp	w1, 2
 	orr	w20, w20, w1, lsl 24
-	bne	.L3235
-	ldrh	w0, [x21, #:lo12:.LANCHOR79]
+	bne	.L3447
+	adrp	x0, .LANCHOR86
+	ldrh	w0, [x0, #:lo12:.LANCHOR86]
 	sub	w0, w0, #1
 	and	w0, w0, 65535
-.L3235:
-	adrp	x1, .LANCHOR35
-	ldrb	w1, [x1, #:lo12:.LANCHOR35]
-	cbz	w1, .L3234
-	ldrh	w0, [x21, #:lo12:.LANCHOR79]
+.L3447:
+	adrp	x1, .LANCHOR36
+	ldrb	w1, [x1, #:lo12:.LANCHOR36]
+	cbnz	w1, .L3448
+	adrp	x1, .LANCHOR37
+	ldrb	w1, [x1, #:lo12:.LANCHOR37]
+	cbz	w1, .L3446
+.L3448:
+	adrp	x0, .LANCHOR86
+	ldrh	w0, [x0, #:lo12:.LANCHOR86]
 	sub	w0, w0, #1
 	and	w0, w0, 65535
-.L3234:
-	add	x22, x19, :lo12:.LANCHOR64
+.L3446:
+	add	x25, x21, :lo12:.LANCHOR71
 	orr	w20, w0, w20
 	mov	w0, 1
-	strb	w23, [x22, 6]
-	strh	wzr, [x22, 2]
-	strb	wzr, [x22, 4]
-	strh	wzr, [x22, 26]
-	strh	wzr, [x22, 28]
+	strb	w27, [x25, 6]
+	strh	wzr, [x25, 2]
+	strb	wzr, [x25, 4]
+	strh	wzr, [x25, 26]
+	strh	wzr, [x25, 28]
 	bl	buf_alloc
+	mov	x19, x0
 	str	w20, [x0, 40]
-	adrp	x20, .LANCHOR80
-	mov	x25, x0
 	mov	w1, 1
 	bl	sblk_read_page
-	ldrh	w2, [x21, #:lo12:.LANCHOR79]
-	adrp	x21, .LANCHOR70
-	ldrb	w0, [x20, #:lo12:.LANCHOR80]
-	mov	w1, 255
-	mul	w2, w2, w0
-	ldr	x0, [x21, #:lo12:.LANCHOR70]
-	lsl	w2, w2, 2
-	bl	ftl_memset
-	strh	wzr, [x22, 24]
-	ldr	w0, [x25, 52]
+	strh	wzr, [x25, 24]
+	ldr	w0, [x19, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3236
-.L3264:
-	mov	x0, x25
+	bne	.L3449
+.L3492:
+	mov	x0, x19
 	bl	zbuf_free
+.L3490:
 	mov	w0, -1
-.L3224:
+.L3436:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 96
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
 	ret
-.L3246:
-	mov	w23, 1
-	b	.L3234
-.L3236:
-	ldr	x0, [x25, 24]
-	ldr	w1, [x0]
+.L3468:
+	mov	w27, 1
+	b	.L3446
+.L3449:
+	ldr	x7, [x19, 24]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
+	ldr	w1, [x7]
 	cmp	w1, w0
-	beq	.L3237
-	mov	w2, 1303
-	adrp	x1, .LANCHOR217
+	beq	.L3450
+	mov	w2, 1577
+.L3493:
+	adrp	x1, .LANCHOR227
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR217
+	add	x1, x1, :lo12:.LANCHOR227
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3264
-.L3237:
-	ldrh	w0, [x24, #:lo12:.LANCHOR87]
-	adrp	x22, .LANCHOR68
-	ldrb	w20, [x20, #:lo12:.LANCHOR80]
-	add	x22, x22, :lo12:.LANCHOR68
-	ldr	x24, [x25, 8]
-	mov	x26, 0
-	mul	w20, w20, w0
-	mul	w20, w23, w20
-	adrp	x23, .LANCHOR31
-	add	x23, x23, :lo12:.LANCHOR31
-	and	w20, w20, 65535
-.L3238:
-	cmp	w20, w26
-	bgt	.L3243
-	mov	x0, x25
+	b	.L3492
+.L3450:
+	adrp	x0, .LANCHOR80
+	ldrh	w26, [x22, #:lo12:.LANCHOR95]
+	ldrb	w25, [x0, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR224
+	ldrb	w0, [x0, #:lo12:.LANCHOR224]
+	mul	w26, w25, w26
+	cmp	w0, 2
+	mul	w26, w27, w26
+	and	w26, w26, 65535
+	bne	.L3451
+	cmp	w27, 3
+	bne	.L3451
+	adrp	x1, .LANCHOR86
+	adrp	x28, .LANCHOR221
+	adrp	x27, .LANCHOR77
+	ldrh	w1, [x1, #:lo12:.LANCHOR86]
+	ldrh	w0, [x28, #:lo12:.LANCHOR221]
+	ldr	x3, [x27, #:lo12:.LANCHOR77]
+	ubfiz	w1, w1, 2, 14
+	mul	w25, w25, w1
+	ldr	x1, [x19, 8]
+	sub	w25, w25, w0
+	and	x0, x0, 65532
+	and	w25, w25, 65535
+	add	x0, x3, x0
+	mov	w2, w25
+	bl	ftl_memcpy
+	ldr	x0, [x19, 24]
+	ldr	w6, [x0, 4]
+	cbz	w6, .L3452
+	ldr	x0, [x19, 8]
+	mov	w1, w25
+	bl	js_hash
+	cmp	w6, w0
+	beq	.L3452
+	mov	x0, x19
+	bl	zbuf_free
+	ldr	x0, [x19, 24]
+	mov	w3, w25
+.L3491:
+	ldr	w1, [x0, 4]
+	adrp	x0, .LC218
+	ldr	w2, [x19, 40]
+	add	x0, x0, :lo12:.LC218
+	bl	printf
+	b	.L3490
+.L3452:
+	adrp	x0, .LANCHOR36
+	ldrb	w0, [x0, #:lo12:.LANCHOR36]
+	cbnz	w0, .L3453
+	adrp	x0, .LANCHOR37
+	ldrb	w0, [x0, #:lo12:.LANCHOR37]
+	cbz	w0, .L3454
+.L3453:
+	sub	w0, w20, #1
+	str	w0, [x19, 40]
+.L3455:
+	mov	w1, 1
+	mov	x0, x19
+	bl	sblk_read_page
+	ldr	w0, [x19, 52]
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	beq	.L3492
+	ldr	x0, [x19, 24]
+	ldr	w1, [x0]
+	mov	w0, 15555
+	movk	w0, 0xf55f, lsl 16
+	cmp	w1, w0
+	beq	.L3457
+	mov	w2, 1618
+	b	.L3493
+.L3454:
+	ldrh	w1, [x23, #:lo12:.LANCHOR111]
+	ldrh	w0, [x22, #:lo12:.LANCHOR95]
+	sub	w0, w0, #1
+	and	w0, w0, 65535
+	mul	w24, w1, w24
+	orr	w0, w0, 33554432
+	orr	w24, w0, w24
+	str	w24, [x19, 40]
+	b	.L3455
+.L3457:
+	ldrh	w2, [x28, #:lo12:.LANCHOR221]
+	ldr	x0, [x27, #:lo12:.LANCHOR77]
+	ldr	x1, [x19, 8]
+.L3489:
+	adrp	x20, .LANCHOR77
+	bl	ftl_memcpy
+	adrp	x22, .LANCHOR75
+	adrp	x23, .LANCHOR32
+	ldr	x24, [x20, #:lo12:.LANCHOR77]
+	add	x22, x22, :lo12:.LANCHOR75
+	add	x23, x23, :lo12:.LANCHOR32
+	mov	x25, 0
+.L3460:
+	cmp	w26, w25
+	bgt	.L3465
+	mov	x0, x19
 	bl	zbuf_free
 	adrp	x0, .LANCHOR9
-	ldrh	w1, [x19, #:lo12:.LANCHOR64]
-	add	x3, x19, :lo12:.LANCHOR64
-	mov	x20, x0
+	ldrh	w1, [x21, #:lo12:.LANCHOR71]
+	add	x3, x21, :lo12:.LANCHOR71
+	mov	x19, x0
 	ldr	x4, [x0, #:lo12:.LANCHOR9]
 	ubfiz	x2, x1, 1, 16
 	ldrh	w3, [x3, 24]
 	ldrh	w2, [x4, x2]
 	cmp	w2, w3
-	beq	.L3244
-	adrp	x0, .LC220
-	add	x0, x0, :lo12:.LC220
+	beq	.L3466
+	adrp	x0, .LC219
+	add	x0, x0, :lo12:.LC219
 	bl	printf
-.L3244:
-	add	x0, x19, :lo12:.LANCHOR64
-	ldrh	w2, [x19, #:lo12:.LANCHOR64]
-	ldr	x1, [x20, #:lo12:.LANCHOR9]
+.L3466:
+	add	x0, x21, :lo12:.LANCHOR71
+	ldrh	w2, [x21, #:lo12:.LANCHOR71]
+	ldr	x1, [x19, #:lo12:.LANCHOR9]
 	ldrh	w3, [x0, 24]
 	strh	w3, [x1, x2, lsl 1]
 	strh	wzr, [x0, 28]
 	ldrh	w0, [x0, 24]
-	b	.L3224
-.L3243:
-	ldr	w0, [x24, x26, lsl 2]
+	b	.L3436
+.L3451:
+	ldr	x6, [x19, 8]
+	lsl	w20, w26, 2
+	mov	w1, w20
+	mov	x0, x6
+	bl	js_hash
+	ldr	w1, [x7, 4]
+	cmp	w1, w0
+	beq	.L3459
+	mov	x0, x19
+	bl	zbuf_free
+	mov	w3, w20
+	ldr	x0, [x19, 24]
+	b	.L3491
+.L3459:
+	adrp	x0, .LANCHOR77
+	mov	w2, w20
+	mov	x1, x6
+	ldr	x0, [x0, #:lo12:.LANCHOR77]
+	b	.L3489
+.L3465:
+	ldr	w0, [x24, x25, lsl 2]
 	cmn	w0, #1
-	beq	.L3240
+	beq	.L3462
 	bl	lpa_hash_get_ppa
-	str	w0, [x29, 92]
+	str	w0, [x29, 108]
 	cmn	w0, #1
-	bne	.L3241
-	ldr	w0, [x24, x26, lsl 2]
+	bne	.L3463
+	ldr	w0, [x24, x25, lsl 2]
 	mov	w2, 0
-	add	x1, x29, 92
+	add	x1, x29, 108
 	bl	pm_log2phys
-.L3241:
+.L3463:
 	ldrb	w0, [x23]
 	mov	w1, 24
 	ldrh	w2, [x22]
 	sub	w0, w1, w0
-	ldr	w3, [x29, 92]
+	ldr	w3, [x29, 108]
 	sub	w1, w0, w2
 	mov	w0, 1
 	lsl	w0, w0, w1
-	adrp	x1, .LANCHOR69
+	adrp	x1, .LANCHOR76
 	sub	w0, w0, #1
 	lsr	w2, w3, w2
-	ldrb	w1, [x1, #:lo12:.LANCHOR69]
+	ldrb	w1, [x1, #:lo12:.LANCHOR76]
 	and	w0, w0, w2
-	ldrh	w2, [x19, #:lo12:.LANCHOR64]
+	ldrh	w2, [x21, #:lo12:.LANCHOR71]
 	udiv	w0, w0, w1
-	add	x1, x19, :lo12:.LANCHOR64
+	add	x1, x21, :lo12:.LANCHOR71
 	cmp	w0, w2
-	bne	.L3240
+	bne	.L3462
 	ldrh	w0, [x1, 24]
-	ldr	x4, [x21, #:lo12:.LANCHOR70]
+	ldr	x4, [x20, #:lo12:.LANCHOR77]
 	ubfiz	x2, x0, 2, 16
 	add	w0, w0, 1
 	str	w3, [x4, x2]
 	strh	w0, [x1, 24]
-.L3240:
-	add	x26, x26, 1
-	b	.L3238
+.L3462:
+	add	x25, x25, 1
+	b	.L3460
 	.size	gc_scan_src_blk, .-gc_scan_src_blk
 	.section	.text.gc_scan_static_data,"ax",@progbits
 	.align	2
@@ -20615,13 +21978,13 @@ gc_scan_static_data:
 	ldr	w1, [x0, 544]
 	str	x23, [sp, 48]
 	cmn	w1, #1
-	beq	.L3266
-	adrp	x21, .LANCHOR218
+	beq	.L3495
+	adrp	x21, .LANCHOR228
 	adrp	x22, .LC0
-	add	x21, x21, :lo12:.LANCHOR218
+	add	x21, x21, :lo12:.LANCHOR228
 	add	x22, x22, :lo12:.LC0
-	mov	w20, 11
-.L3274:
+	mov	w20, 0
+.L3503:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w2, 0
 	add	x1, x29, 76
@@ -20629,7 +21992,7 @@ gc_scan_static_data:
 	bl	pm_log2phys
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L3267
+	beq	.L3496
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 76]
@@ -20639,12 +22002,12 @@ gc_scan_static_data:
 	bl	sblk_read_page
 	ldr	w0, [x23, 52]
 	cmp	w0, 256
-	bne	.L3268
-	adrp	x0, .LANCHOR68
+	bne	.L3497
+	adrp	x0, .LANCHOR75
 	ldr	w2, [x29, 76]
-	ldrh	w3, [x0, #:lo12:.LANCHOR68]
-	adrp	x0, .LANCHOR31
-	ldrb	w1, [x0, #:lo12:.LANCHOR31]
+	ldrh	w3, [x0, #:lo12:.LANCHOR75]
+	adrp	x0, .LANCHOR32
+	ldrb	w1, [x0, #:lo12:.LANCHOR32]
 	mov	w0, 24
 	lsr	w2, w2, w3
 	sub	w0, w0, w1
@@ -20653,34 +22016,34 @@ gc_scan_static_data:
 	lsl	w0, w1, w0
 	sub	w0, w0, #1
 	and	w0, w0, w2
-	adrp	x2, .LANCHOR69
-	ldrb	w3, [x2, #:lo12:.LANCHOR69]
+	adrp	x2, .LANCHOR76
+	ldrb	w3, [x2, #:lo12:.LANCHOR76]
 	mov	w2, 0
 	udiv	w0, w0, w3
 	bl	gc_add_sblk
-.L3268:
+.L3497:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldr	x1, [x23, 24]
 	ldr	w0, [x0, 544]
 	ldr	w1, [x1, 4]
 	cmp	w1, w0
-	beq	.L3269
-	mov	w2, 1742
+	beq	.L3498
+	mov	w2, 2162
 	mov	x1, x21
 	mov	x0, x22
 	bl	printf
-.L3269:
+.L3498:
 	mov	x0, x23
 	bl	zbuf_free
-.L3267:
+.L3496:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
-	adrp	x2, .LANCHOR123
-	ldr	w2, [x2, #:lo12:.LANCHOR123]
+	adrp	x2, .LANCHOR128
+	ldr	w2, [x2, #:lo12:.LANCHOR128]
 	ldr	w1, [x0, 544]
 	add	w1, w1, 1
 	str	w1, [x0, 544]
 	cmp	w1, w2
-	bcc	.L3270
+	bcc	.L3499
 	mov	w1, -1
 	str	w1, [x0, 544]
 	ldr	w1, [x0, 548]
@@ -20691,42 +22054,46 @@ gc_scan_static_data:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-.L3265:
+.L3494:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L3270:
+.L3499:
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	bne	.L3265
-	sub	w20, w20, #1
-	ands	w20, w20, 65535
-	bne	.L3274
-	b	.L3265
-.L3266:
+	bne	.L3494
+	adrp	x1, .LANCHOR221
+	add	w0, w20, 1
+	and	w0, w0, 65535
+	ldrh	w1, [x1, #:lo12:.LANCHOR221]
+	cmp	w20, w1, lsr 2
+	bcs	.L3494
+	mov	w20, w0
+	b	.L3503
+.L3495:
 	ldr	w1, [x0, 536]
-	adrp	x3, .LANCHOR104
+	adrp	x3, .LANCHOR110
 	ldr	w2, [x0, 12]
 	add	w1, w1, 12959744
 	add	w1, w1, 256
 	cmp	w2, w1
-	bhi	.L3276
-	ldr	x4, [x3, #:lo12:.LANCHOR104]
+	bhi	.L3505
+	ldr	x4, [x3, #:lo12:.LANCHOR110]
 	mov	w5, 5000
 	ldr	w1, [x0, 540]
 	add	w1, w1, w5
 	ldr	w4, [x4, 44]
 	cmp	w4, w1
-	bls	.L3265
-.L3276:
-	ldr	x1, [x3, #:lo12:.LANCHOR104]
+	bls	.L3494
+.L3505:
+	ldr	x1, [x3, #:lo12:.LANCHOR110]
 	ldr	w1, [x1, 44]
 	str	w1, [x0, 540]
 	str	w2, [x0, 536]
 	str	wzr, [x0, 544]
-	b	.L3265
+	b	.L3494
 	.size	gc_scan_static_data, .-gc_scan_static_data
 	.section	.text.ftl_sblk_dump,"ax",@progbits
 	.align	2
@@ -20752,49 +22119,49 @@ ftl_sblk_dump:
 	ldrb	w2, [x1, 2]
 	mov	w1, w20
 	ldrh	w4, [x0, x23]
-	adrp	x0, .LC221
+	adrp	x0, .LC220
 	stp	x27, x28, [sp, 128]
 	ubfx	x5, x5, 11, 8
 	ubfx	x3, x2, 3, 2
 	and	w4, w4, 2047
 	ubfx	x2, x2, 5, 3
-	add	x0, x0, :lo12:.LC221
+	add	x0, x0, :lo12:.LC220
 	bl	printf
 	mov	w0, 65535
 	cmp	w20, w0
-	beq	.L3304
+	beq	.L3534
 	adrp	x0, .LANCHOR6
 	ldrh	w0, [x0, #:lo12:.LANCHOR6]
 	cmp	w0, w20
-	bls	.L3304
+	bls	.L3534
 	ldr	x0, [x24, #:lo12:.LANCHOR7]
 	add	x0, x0, x23
 	ldrb	w0, [x0, 2]
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L3305
-	adrp	x0, .LANCHOR73
-	ldrb	w25, [x0, #:lo12:.LANCHOR73]
-.L3284:
+	bne	.L3535
+	adrp	x0, .LANCHOR79
+	ldrb	w25, [x0, #:lo12:.LANCHOR79]
+.L3513:
 	add	x28, x29, 240
-	adrp	x21, .LANCHOR87
+	adrp	x21, .LANCHOR95
 	mov	w0, w20
 	mov	w19, 0
 	strh	w20, [x28, -32]!
 	add	x1, x28, 16
 	bl	ftl_get_blk_list_in_sblk
-	ldrh	w2, [x21, #:lo12:.LANCHOR87]
+	ldrh	w2, [x21, #:lo12:.LANCHOR95]
 	and	w1, w0, 255
 	strb	w1, [x29, 217]
 	and	w4, w0, 255
 	strb	wzr, [x29, 213]
 	mov	w3, w25
 	strh	wzr, [x29, 210]
-	adrp	x0, .LC222
+	adrp	x0, .LC221
 	mul	w1, w1, w2
 	strh	wzr, [x29, 218]
 	strh	w1, [x29, 214]
-	add	x0, x0, :lo12:.LC222
+	add	x0, x0, :lo12:.LC221
 	ldr	x1, [x24, #:lo12:.LANCHOR7]
 	add	x1, x1, x23
 	ldrb	w2, [x1, 2]
@@ -20806,54 +22173,59 @@ ftl_sblk_dump:
 	str	x21, [x29, 136]
 	mov	x26, x0
 	stp	wzr, wzr, [x29, 168]
-	adrp	x0, .LANCHOR105
+	adrp	x0, .LANCHOR111
 	str	wzr, [x29, 176]
-	add	x0, x0, :lo12:.LANCHOR105
+	add	x0, x0, :lo12:.LANCHOR111
 	str	x0, [x29, 112]
-.L3285:
+.L3514:
 	ldr	x0, [x29, 136]
-	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	ldrh	w0, [x0, #:lo12:.LANCHOR95]
 	cmp	w0, w19
-	bls	.L3301
+	bls	.L3531
 	lsl	w0, w19, 1
 	mov	w22, 0
 	sub	w1, w0, #1
 	add	w0, w0, w19
 	sub	w0, w0, #1
-	stp	w0, w1, [x29, 152]
+	stp	w1, w0, [x29, 152]
 	adrp	x0, .LC167
 	add	x0, x0, :lo12:.LC167
 	str	x0, [x29, 120]
-	b	.L3302
-.L3305:
+	b	.L3532
+.L3535:
 	mov	w25, 1
-	b	.L3284
-.L3298:
+	b	.L3513
+.L3528:
 	ldr	x0, [x29, 128]
 	ldrh	w11, [x28, x0]
 	mov	w0, 65535
 	cmp	w11, w0
-	beq	.L3286
+	beq	.L3515
 	ldr	x0, [x29, 112]
 	cmp	w25, 3
 	ldrh	w8, [x0]
-	mul	w8, w8, w11
-	add	w0, w21, w8
-	bne	.L3287
-	adrp	x1, .LANCHOR35
-	ldrb	w1, [x1, #:lo12:.LANCHOR35]
-	cbz	w1, .L3288
-	adrp	x1, .LANCHOR73
-	ldrb	w8, [x1, #:lo12:.LANCHOR73]
-	ldr	w1, [x29, 152]
-.L3314:
+	mul	w1, w8, w11
+	add	w0, w21, w1
+	bne	.L3516
+	adrp	x2, .LANCHOR36
+	ldrb	w2, [x2, #:lo12:.LANCHOR36]
+	cbz	w2, .L3517
+	adrp	x1, .LANCHOR79
+	ldrb	w8, [x1, #:lo12:.LANCHOR79]
+	ldr	w1, [x29, 156]
+.L3544:
 	add	w0, w0, w1
 	orr	w27, w0, w8, lsl 24
-	b	.L3289
-.L3288:
-	add	w8, w19, w8
-	orr	w27, w8, w21, lsl 24
-.L3289:
+	b	.L3518
+.L3517:
+	adrp	x2, .LANCHOR37
+	lsl	w8, w21, 24
+	ldrb	w2, [x2, #:lo12:.LANCHOR37]
+	cbz	w2, .L3519
+	ldr	w1, [x29, 156]
+	add	w0, w0, w1
+	orr	w27, w0, w8
+.L3518:
 	str	w27, [x26, 40]
 	mov	w1, 1
 	str	w11, [x29, 100]
@@ -20895,22 +22267,22 @@ ftl_sblk_dump:
 	and	w0, w0, 224
 	cmp	w0, 224
 	ccmp	w0, w1, 4, ne
-	beq	.L3286
+	beq	.L3515
 	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 204]
 	cmn	w0, #1
-	bne	.L3292
+	bne	.L3522
 	ldr	x0, [x26, 24]
 	mov	w2, 0
 	add	x1, x29, 204
 	ldr	w0, [x0, 4]
 	bl	pm_log2phys
-.L3292:
+.L3522:
 	ldr	w0, [x29, 204]
 	cmp	w27, w0
-	bne	.L3293
+	bne	.L3523
 	ldr	w0, [x29, 172]
 	mov	w1, w27
 	add	w0, w0, 1
@@ -20918,12 +22290,12 @@ ftl_sblk_dump:
 	ldr	x0, [x26, 24]
 	ldr	w3, [x29, 172]
 	ldr	w2, [x0, 4]
-	adrp	x0, .LC223
-	add	x0, x0, :lo12:.LC223
+	adrp	x0, .LC222
+	add	x0, x0, :lo12:.LC222
 	bl	printf
-.L3293:
+.L3523:
 	ldr	x0, [x29, 160]
-	cbz	x0, .L3295
+	cbz	x0, .L3525
 	ldr	x0, [x29, 176]
 	ubfiz	x3, x0, 2, 32
 	ldr	x0, [x29, 160]
@@ -20931,68 +22303,72 @@ ftl_sblk_dump:
 	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	cmp	w0, w2
-	beq	.L3296
+	beq	.L3526
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3296
+	tbz	x0, 12, .L3526
 	ldr	w1, [x29, 176]
-	adrp	x0, .LC224
+	adrp	x0, .LC223
 	str	x3, [x29, 104]
-	add	x0, x0, :lo12:.LC224
+	add	x0, x0, :lo12:.LC223
 	bl	printf
 	ldr	x3, [x29, 104]
-.L3296:
+.L3526:
 	ldr	x1, [x26, 24]
 	ldr	x0, [x29, 160]
 	ldr	w1, [x1, 4]
 	ldr	w0, [x0, x3]
 	cmp	w1, w0
-	beq	.L3295
+	beq	.L3525
 	cmn	w0, #1
-	beq	.L3295
-	adrp	x1, .LANCHOR219
+	beq	.L3525
+	adrp	x1, .LANCHOR229
 	adrp	x0, .LC0
-	mov	w2, 1393
-	add	x1, x1, :lo12:.LANCHOR219
+	mov	w2, 1567
+	add	x1, x1, :lo12:.LANCHOR229
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3295:
+.L3525:
 	ldr	w0, [x29, 176]
 	add	w0, w0, 1
 	str	w0, [x29, 176]
-.L3286:
+.L3515:
 	add	w21, w21, 1
 	and	w21, w21, 65535
-.L3300:
+.L3530:
 	cmp	w25, w21
-	bcs	.L3298
+	bcs	.L3528
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L3302:
+.L3532:
 	ldrb	w0, [x29, 217]
 	cmp	w0, w22
-	bls	.L3299
+	bls	.L3529
 	sxtw	x0, w22
 	mov	w21, 1
 	add	x0, x0, 8
 	lsl	x0, x0, 1
 	str	x0, [x29, 128]
-	b	.L3300
-.L3287:
+	b	.L3530
+.L3519:
+	add	w1, w19, w1
+	orr	w27, w8, w1
+	b	.L3518
+.L3516:
 	cmp	w25, 2
-	bne	.L3290
-	adrp	x1, .LANCHOR73
-	ldrb	w8, [x1, #:lo12:.LANCHOR73]
-	ldr	w1, [x29, 156]
-	b	.L3314
-.L3290:
-	add	w27, w19, w8
-	b	.L3289
-.L3299:
+	bne	.L3520
+	adrp	x1, .LANCHOR79
+	ldrb	w8, [x1, #:lo12:.LANCHOR79]
+	ldr	w1, [x29, 152]
+	b	.L3544
+.L3520:
+	add	w27, w19, w1
+	b	.L3518
+.L3529:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L3285
-.L3301:
+	b	.L3514
+.L3531:
 	mov	x0, x26
 	bl	zbuf_free
 	adrp	x0, .LANCHOR9
@@ -21001,11 +22377,11 @@ ftl_sblk_dump:
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w2, [x0, x1, lsl 1]
 	mov	w1, w20
-	adrp	x0, .LC225
-	add	x0, x0, :lo12:.LC225
+	adrp	x0, .LC224
+	add	x0, x0, :lo12:.LC224
 	bl	printf
 	ldr	w0, [x29, 168]
-.L3282:
+.L3511:
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
 	ldp	x23, x24, [sp, 96]
@@ -21014,9 +22390,9 @@ ftl_sblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 288
 	ret
-.L3304:
+.L3534:
 	mov	w0, 0
-	b	.L3282
+	b	.L3511
 	.size	ftl_sblk_dump, .-ftl_sblk_dump
 	.section	.text.zftl_read,"ax",@progbits
 	.align	2
@@ -21037,35 +22413,35 @@ zftl_read:
 	stp	x25, x26, [sp, 80]
 	mov	x22, x3
 	stp	x27, x28, [sp, 96]
-	tbz	x0, 12, .L3316
+	tbz	x0, 12, .L3546
 	mov	w3, w2
-	adrp	x0, .LC226
+	adrp	x0, .LC225
 	mov	w2, w1
-	add	x0, x0, :lo12:.LC226
+	add	x0, x0, :lo12:.LC225
 	mov	w1, w19
 	bl	printf
-.L3316:
-	cbnz	w19, .L3317
-	adrp	x0, .LANCHOR61
+.L3546:
+	cbnz	w19, .L3547
+	adrp	x0, .LANCHOR68
 	mov	w19, 24576
-	ldr	w0, [x0, #:lo12:.LANCHOR61]
-.L3318:
+	ldr	w0, [x0, #:lo12:.LANCHOR68]
+.L3548:
 	cmp	w0, w20
 	ccmp	w0, w23, 0, hi
-	bcc	.L3348
+	bcc	.L3578
 	add	w1, w20, w23
 	cmp	w0, w1
-	bcc	.L3348
-	adrp	x1, .LANCHOR104
-	adrp	x26, .LANCHOR126
+	bcc	.L3578
+	adrp	x1, .LANCHOR110
+	adrp	x26, .LANCHOR131
 	add	w19, w19, w20
 	str	x1, [x29, 120]
-	ldr	x2, [x1, #:lo12:.LANCHOR104]
+	ldr	x2, [x1, #:lo12:.LANCHOR110]
 	str	x26, [x29, 168]
 	ldr	w0, [x2, 24]
 	add	w0, w0, w23
 	str	w0, [x2, 24]
-	ldrb	w0, [x26, #:lo12:.LANCHOR126]
+	ldrb	w0, [x26, #:lo12:.LANCHOR131]
 	add	w2, w23, w19
 	stp	w2, wzr, [x29, 160]
 	sub	w2, w2, #1
@@ -21075,12 +22451,12 @@ zftl_read:
 	sub	w25, w0, w27
 	str	w0, [x29, 156]
 	add	w25, w25, 1
-	adrp	x0, .LANCHOR130
-	add	x28, x0, :lo12:.LANCHOR130
-.L3320:
-	cbnz	w25, .L3345
+	adrp	x0, .LANCHOR134
+	add	x28, x0, :lo12:.LANCHOR134
+.L3550:
+	cbnz	w25, .L3575
 	ldr	w0, [x29, 164]
-.L3315:
+.L3545:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -21089,22 +22465,22 @@ zftl_read:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 208
 	ret
-.L3317:
+.L3547:
 	cmp	w19, 3
-	bhi	.L3348
+	bhi	.L3578
 	lsl	w19, w19, 13
 	mov	w0, 8192
-	b	.L3318
-.L3345:
+	b	.L3548
+.L3575:
 	ldr	x0, [x29, 168]
 	cmp	w20, w27
-	ldrb	w1, [x0, #:lo12:.LANCHOR126]
+	ldrb	w1, [x0, #:lo12:.LANCHOR131]
 	ldr	w0, [x29, 156]
 	and	w24, w1, 65535
 	ccmp	w20, w0, 4, ne
-	bne	.L3349
+	bne	.L3579
 	cmp	w20, w27
-	bne	.L3322
+	bne	.L3552
 	udiv	w3, w19, w1
 	and	w0, w23, 65535
 	msub	w1, w3, w1, w19
@@ -21113,18 +22489,18 @@ zftl_read:
 	and	w24, w24, 65535
 	cmp	w23, w24
 	csel	w24, w0, w24, cc
-.L3321:
-	adrp	x21, .LANCHOR52
-	add	x1, x21, :lo12:.LANCHOR52
+.L3551:
+	adrp	x21, .LANCHOR56
+	add	x1, x21, :lo12:.LANCHOR56
 	add	x1, x1, 2
 	mov	w0, 0
-.L3325:
+.L3555:
 	ldr	w2, [x1, 34]
 	cmp	w20, w2
-	bne	.L3323
+	bne	.L3553
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L3323
-	add	x1, x21, :lo12:.LANCHOR52
+	tbz	x2, 3, .L3553
+	add	x1, x21, :lo12:.LANCHOR56
 	ubfiz	x0, x0, 6, 32
 	add	x0, x1, x0
 	lsl	w2, w24, 9
@@ -21135,89 +22511,89 @@ zftl_read:
 	add	x22, x22, x24
 	add	x1, x1, x26
 	bl	ftl_memcpy
-.L3324:
+.L3554:
 	add	w20, w20, 1
 	sub	w25, w25, #1
-.L3331:
-	adrp	x0, .LANCHOR54
-	ldrb	w0, [x0, #:lo12:.LANCHOR54]
+.L3561:
+	adrp	x0, .LANCHOR58
+	ldrb	w0, [x0, #:lo12:.LANCHOR58]
 	cmp	w0, 2
-	bls	.L3332
-	cbnz	w25, .L3320
-.L3332:
-	adrp	x0, .LANCHOR130
-	ldrb	w1, [x0, #:lo12:.LANCHOR130]
-	cbz	w1, .L3320
-	adrp	x24, .LANCHOR129
-	add	x0, x21, :lo12:.LANCHOR52
-	ldrb	w2, [x24, #:lo12:.LANCHOR129]
+	bls	.L3562
+	cbnz	w25, .L3550
+.L3562:
+	adrp	x0, .LANCHOR134
+	ldrb	w1, [x0, #:lo12:.LANCHOR134]
+	cbz	w1, .L3550
+	adrp	x24, .LANCHOR133
+	add	x0, x21, :lo12:.LANCHOR56
+	ldrb	w2, [x24, #:lo12:.LANCHOR133]
 	add	x0, x0, x2, lsl 6
 	bl	sblk_read_page
-	adrp	x0, .LANCHOR220
-	add	x0, x0, :lo12:.LANCHOR220
+	adrp	x0, .LANCHOR230
+	add	x0, x0, :lo12:.LANCHOR230
 	str	x0, [x29, 136]
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	str	x0, [x29, 128]
-.L3334:
+.L3564:
 	ldrb	w0, [x28]
-	cbnz	w0, .L3344
+	cbnz	w0, .L3574
 	mov	w0, -1
 	strb	wzr, [x28]
-	strb	w0, [x24, #:lo12:.LANCHOR129]
-	b	.L3320
-.L3322:
+	strb	w0, [x24, #:lo12:.LANCHOR133]
+	b	.L3550
+.L3552:
 	ldr	w0, [x29, 160]
 	msub	w24, w1, w20, w0
 	and	w24, w24, 255
-.L3349:
+.L3579:
 	mov	w26, 0
-	b	.L3321
-.L3323:
+	b	.L3551
+.L3553:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 32
-	bne	.L3325
+	bne	.L3555
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L3326
+	bne	.L3556
 	mov	w2, 0
 	add	x1, x29, 188
 	mov	w0, w20
 	bl	pm_log2phys
-.L3326:
+.L3556:
 	ldr	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L3327
+	bne	.L3557
 	ldr	x0, [x29, 168]
 	mov	w24, 0
-	add	x26, x0, :lo12:.LANCHOR126
-.L3328:
+	add	x26, x0, :lo12:.LANCHOR131
+.L3558:
 	ldrb	w0, [x26]
 	cmp	w24, w0
-	bcs	.L3324
+	bcs	.L3554
 	madd	w0, w20, w0, w24
 	cmp	w19, w0
-	bhi	.L3329
+	bhi	.L3559
 	ldr	w1, [x29, 160]
 	cmp	w1, w0
-	bls	.L3329
+	bls	.L3559
 	mov	x0, x22
 	add	x22, x22, 512
 	mov	w2, 512
 	mov	w1, 0
 	bl	ftl_memset
-.L3329:
+.L3559:
 	add	w24, w24, 1
-	b	.L3328
-.L3327:
+	b	.L3558
+.L3557:
 	mov	w0, 0
 	bl	buf_alloc
-	cbz	x0, .L3331
+	cbz	x0, .L3561
 	ldr	x2, [x29, 120]
-	ldr	x4, [x2, #:lo12:.LANCHOR104]
+	ldr	x4, [x2, #:lo12:.LANCHOR110]
 	ldr	w2, [x4, 40]
 	add	w2, w2, 1
 	str	w2, [x4, 40]
@@ -21230,46 +22606,46 @@ zftl_read:
 	stp	w20, w2, [x0, 36]
 	str	w2, [x0, 44]
 	bl	zftl_add_read_buf
-	b	.L3324
-.L3344:
-	ldrb	w0, [x24, #:lo12:.LANCHOR129]
+	b	.L3554
+.L3574:
+	ldrb	w0, [x24, #:lo12:.LANCHOR133]
 	cmp	w0, 255
-	bne	.L3335
+	bne	.L3565
 	ldp	x0, x1, [x29, 128]
-	mov	w2, 1090
+	mov	w2, 1276
 	bl	printf
-.L3335:
-	ldrb	w26, [x24, #:lo12:.LANCHOR129]
-	add	x0, x21, :lo12:.LANCHOR52
+.L3565:
+	ldrb	w26, [x24, #:lo12:.LANCHOR133]
+	add	x0, x21, :lo12:.LANCHOR56
 	ubfiz	x1, x26, 6, 8
 	lsl	x2, x26, 6
 	add	x1, x0, x1
 	str	x1, [x29, 144]
 	add	x1, x0, x2
 	ldrb	w0, [x0, x2]
-	strb	w0, [x24, #:lo12:.LANCHOR129]
+	strb	w0, [x24, #:lo12:.LANCHOR133]
 	ldr	w10, [x1, 52]
 	cmn	w10, #1
-	bne	.L3336
+	bne	.L3566
 	adrp	x0, .LANCHOR10
 	str	w10, [x29, 164]
 	ldr	x1, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x1, 552]
 	add	w0, w0, 1
 	str	w0, [x1, 552]
-.L3337:
-	add	x1, x21, :lo12:.LANCHOR52
+.L3567:
+	add	x1, x21, :lo12:.LANCHOR56
 	add	x1, x1, x26, lsl 6
 	ldr	x0, [x1, 24]
 	ldr	w3, [x1, 36]
 	ldr	w1, [x0, 4]
 	cmp	w1, w3
-	bne	.L3338
+	bne	.L3568
 	cmn	w10, #1
-	bne	.L3339
-.L3338:
+	bne	.L3569
+.L3568:
 	adrp	x1, .LANCHOR10
-	add	x11, x21, :lo12:.LANCHOR52
+	add	x11, x21, :lo12:.LANCHOR56
 	add	x11, x11, x26, lsl 6
 	str	w10, [x29, 152]
 	ldr	x2, [x1, #:lo12:.LANCHOR10]
@@ -21283,15 +22659,15 @@ zftl_read:
 	mov	w2, w10
 	ldp	w5, w6, [x0]
 	ldr	w7, [x0, 8]
-	adrp	x0, .LC228
+	adrp	x0, .LC227
 	ldr	w4, [x11, 40]
-	add	x0, x0, :lo12:.LC228
+	add	x0, x0, :lo12:.LC227
 	bl	printf
-	adrp	x0, .LANCHOR68
+	adrp	x0, .LANCHOR75
 	ldr	x11, [x29, 112]
-	ldrh	w2, [x0, #:lo12:.LANCHOR68]
-	adrp	x0, .LANCHOR31
-	ldrb	w1, [x0, #:lo12:.LANCHOR31]
+	ldrh	w2, [x0, #:lo12:.LANCHOR75]
+	adrp	x0, .LANCHOR32
+	ldrb	w1, [x0, #:lo12:.LANCHOR32]
 	mov	w0, 24
 	sub	w0, w0, w1
 	sub	w1, w0, w2
@@ -21301,34 +22677,34 @@ zftl_read:
 	sub	w0, w0, #1
 	lsr	w1, w1, w2
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR69
-	ldrb	w2, [x1, #:lo12:.LANCHOR69]
+	adrp	x1, .LANCHOR76
+	ldrb	w2, [x1, #:lo12:.LANCHOR76]
 	mov	x1, 0
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
 	ldr	w10, [x29, 152]
-.L3339:
-	add	x0, x21, :lo12:.LANCHOR52
+.L3569:
+	add	x0, x21, :lo12:.LANCHOR56
 	add	x0, x0, x26, lsl 6
 	ldr	x1, [x0, 24]
 	ldr	w0, [x0, 36]
 	ldr	w1, [x1, 4]
 	cmp	w1, w0
-	bne	.L3340
+	bne	.L3570
 	cmn	w10, #1
-	bne	.L3341
-.L3340:
+	bne	.L3571
+.L3570:
 	ldp	x0, x1, [x29, 128]
-	mov	w2, 1111
+	mov	w2, 1301
 	bl	printf
-.L3341:
-	add	x0, x21, :lo12:.LANCHOR52
+.L3571:
+	add	x0, x21, :lo12:.LANCHOR56
 	add	x8, x0, x26, lsl 6
 	ldr	x0, [x29, 168]
 	ldrb	w2, [x8, 56]
-	ldrb	w0, [x0, #:lo12:.LANCHOR126]
+	ldrb	w0, [x0, #:lo12:.LANCHOR131]
 	cmp	w0, w2
-	bls	.L3342
+	bls	.L3572
 	ldrb	w0, [x8, 57]
 	lsl	w2, w2, 9
 	ldr	x1, [x8, 8]
@@ -21336,26 +22712,26 @@ zftl_read:
 	add	x1, x1, x0
 	ldr	x0, [x8, 16]
 	bl	ftl_memcpy
-.L3343:
+.L3573:
 	ldr	x1, [x29, 144]
-	adrp	x0, .LANCHOR132
-	add	x0, x0, :lo12:.LANCHOR132
+	adrp	x0, .LANCHOR63
+	add	x0, x0, :lo12:.LANCHOR63
 	bl	buf_remove_buf
 	ldr	x0, [x29, 144]
 	bl	zbuf_free
 	ldrb	w0, [x28]
 	sub	w0, w0, #1
 	strb	w0, [x28]
-	b	.L3334
-.L3336:
+	b	.L3564
+.L3566:
 	cmp	w10, 256
-	bne	.L3337
-	adrp	x2, .LANCHOR31
-	adrp	x0, .LANCHOR68
+	bne	.L3567
+	adrp	x2, .LANCHOR32
+	adrp	x0, .LANCHOR75
 	mov	w4, 24
 	mov	w5, 1
-	ldrb	w2, [x2, #:lo12:.LANCHOR31]
-	ldrh	w0, [x0, #:lo12:.LANCHOR68]
+	ldrb	w2, [x2, #:lo12:.LANCHOR32]
+	ldrh	w0, [x0, #:lo12:.LANCHOR75]
 	sub	w4, w4, w2
 	stp	w10, w5, [x29, 108]
 	ldp	w2, w3, [x1, 36]
@@ -21364,11 +22740,11 @@ zftl_read:
 	sub	w4, w4, #1
 	lsr	w0, w3, w0
 	and	w4, w4, w0
-	adrp	x0, .LANCHOR69
-	ldrb	w0, [x0, #:lo12:.LANCHOR69]
+	adrp	x0, .LANCHOR76
+	ldrb	w0, [x0, #:lo12:.LANCHOR76]
 	udiv	w4, w4, w0
-	adrp	x0, .LC227
-	add	x0, x0, :lo12:.LC227
+	adrp	x0, .LC226
+	add	x0, x0, :lo12:.LC226
 	and	w1, w4, 65535
 	str	w4, [x29, 152]
 	bl	printf
@@ -21379,27 +22755,16 @@ zftl_read:
 	mov	w0, w4
 	bl	gc_add_sblk
 	ldr	w10, [x29, 108]
-	b	.L3337
-.L3342:
+	b	.L3567
+.L3572:
 	ldrb	w0, [x8, 2]
 	and	w0, w0, -9
 	strb	w0, [x8, 2]
-	b	.L3343
-.L3348:
+	b	.L3573
+.L3578:
 	mov	w0, -1
-	b	.L3315
+	b	.L3545
 	.size	zftl_read, .-zftl_read
-	.section	.text.ftl_vendor_read,"ax",@progbits
-	.align	2
-	.global	ftl_vendor_read
-	.type	ftl_vendor_read, %function
-ftl_vendor_read:
-	mov	x3, x2
-	mov	w2, w1
-	add	w1, w0, 512
-	mov	w0, 2
-	b	zftl_read
-	.size	ftl_vendor_read, .-ftl_vendor_read
 	.section	.text.zftl_sys_read,"ax",@progbits
 	.align	2
 	.global	zftl_sys_read
@@ -21452,212 +22817,24 @@ ftl_read:
 	and	w0, w0, 255
 	b	zftl_read
 	.size	ftl_read, .-ftl_read
-	.section	.text.gc_check_data_one_wl,"ax",@progbits
+	.section	.text.ftl_vendor_read,"ax",@progbits
 	.align	2
-	.global	gc_check_data_one_wl
-	.type	gc_check_data_one_wl, %function
-gc_check_data_one_wl:
-	sub	sp, sp, #128
-	stp	x29, x30, [sp, 16]
-	add	x29, sp, 16
-	stp	x19, x20, [sp, 32]
-	adrp	x19, .LANCHOR64
-	add	x20, x19, :lo12:.LANCHOR64
-	stp	x21, x22, [sp, 48]
-	stp	x23, x24, [sp, 64]
-	adrp	x22, .LANCHOR10
-	stp	x25, x26, [sp, 80]
-	ldr	x0, [x20, 8]
-	stp	x27, x28, [sp, 96]
-	ldr	x23, [x22, #:lo12:.LANCHOR10]
-	cbnz	x0, .L3371
-	mov	w0, 1
-	bl	buf_alloc
-	str	x0, [x20, 8]
-.L3371:
-	add	x0, x19, :lo12:.LANCHOR64
-	ldr	x20, [x0, 8]
-	cbnz	x20, .L3372
-	adrp	x1, .LANCHOR221
-	adrp	x0, .LC0
-	mov	w2, 614
-	add	x1, x1, :lo12:.LANCHOR221
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L3372:
-	adrp	x4, .LANCHOR105
-	add	x28, x23, 96
-	add	x24, x23, 80
-	add	x4, x4, :lo12:.LANCHOR105
-	mov	w27, 0
-.L3373:
-	ldrb	w0, [x24, 9]
-	cmp	w27, w0
-	bge	.L3384
-	adrp	x26, .LANCHOR73
-	mov	w25, 1
-	add	x21, x19, :lo12:.LANCHOR64
-	add	x26, x26, :lo12:.LANCHOR73
-	b	.L3385
-.L3383:
-	ldrh	w0, [x28]
-	ldrh	w1, [x4]
-	ldrb	w2, [x26]
-	cmp	w2, 2
-	mul	w1, w0, w1
-	beq	.L3374
-	adrp	x0, .LANCHOR35
-	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbz	w0, .L3375
-.L3374:
-	ldrh	w0, [x21, 16]
-	sub	w3, w0, #1
-	add	w0, w25, w1
-	add	w0, w3, w0
-	orr	w2, w0, w2, lsl 24
-	str	w2, [x20, 40]
-.L3376:
-	str	x4, [x29, 104]
-	mov	w1, 1
-	mov	x0, x20
-	bl	sblk_read_page
-	ldr	w2, [x20, 52]
-	adrp	x8, .LANCHOR157
-	ldr	x4, [x29, 104]
-	cmn	w2, #1
-	beq	.L3378
-	ldrh	w0, [x21, 22]
-	ldr	x3, [x8, #:lo12:.LANCHOR157]
-	ldr	x1, [x20, 24]
-	lsl	x0, x0, 2
-	ldr	w5, [x3, x0]
-	ldr	w3, [x1, 4]
-	cmp	w5, w3
-	bne	.L3378
-	adrp	x3, .LANCHOR158
-	ldr	x3, [x3, #:lo12:.LANCHOR158]
-	ldr	w3, [x3, x0]
-	ldr	w0, [x1, 8]
-	cmp	w3, w0
-	beq	.L3379
-.L3378:
-	ldrh	w0, [x21, 22]
-	ldr	x1, [x8, #:lo12:.LANCHOR157]
-	lsl	x0, x0, 2
-	ldr	w3, [x1, x0]
-	cmn	w3, #1
-	beq	.L3379
-	adrp	x1, .LANCHOR14
-	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 10, .L3380
-	ldr	x1, [x20, 24]
-	adrp	x4, .LANCHOR158
-	str	x8, [x29, 104]
-	ldr	x4, [x4, #:lo12:.LANCHOR158]
-	ldr	w5, [x1, 12]
-	str	w5, [sp]
-	ldr	w4, [x4, x0]
-	adrp	x0, .LC229
-	ldp	w5, w6, [x1]
-	add	x0, x0, :lo12:.LC229
-	ldr	w7, [x1, 8]
-	ldr	w1, [x20, 40]
-	bl	printf
-	ldr	x8, [x29, 104]
-.L3380:
-	adrp	x0, .LANCHOR118
-	mov	x21, x0
-	ldrb	w1, [x0, #:lo12:.LANCHOR118]
-	cbnz	w1, .L3381
-	adrp	x19, .LANCHOR79
-	ldrb	w3, [x24, 9]
-	ldr	x1, [x8, #:lo12:.LANCHOR157]
-	mov	w2, 4
-	ldrh	w0, [x19, #:lo12:.LANCHOR79]
-	mul	w3, w3, w0
-	adrp	x0, .LC230
-	add	x0, x0, :lo12:.LC230
-	bl	rknand_print_hex
-	ldrh	w0, [x19, #:lo12:.LANCHOR79]
-	mov	w2, 4
-	ldrb	w3, [x24, 9]
-	mul	w3, w3, w0
-	adrp	x0, .LANCHOR158
-	ldr	x1, [x0, #:lo12:.LANCHOR158]
-	adrp	x0, .LC231
-	add	x0, x0, :lo12:.LC231
-	bl	rknand_print_hex
-	ldr	x0, [x22, #:lo12:.LANCHOR10]
-	mov	x1, 0
-	ldrh	w0, [x0, 80]
-	bl	ftl_sblk_dump
-.L3381:
-	adrp	x0, .LANCHOR9
-	ldrh	w1, [x23, 80]
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
-	strh	wzr, [x0, x1, lsl 1]
-	ldr	x1, [x22, #:lo12:.LANCHOR10]
-	ldr	w0, [x1, 556]
-	add	w0, w0, 1
-	str	w0, [x1, 556]
-	adrp	x0, .LANCHOR104
-	ldr	x0, [x0, #:lo12:.LANCHOR104]
-	ldr	w1, [x0, 156]
-	mov	w0, 20041
-	movk	w0, 0x444b, lsl 16
-	cmp	w1, w0
-	bne	.L3387
-	ldrb	w0, [x21, #:lo12:.LANCHOR118]
-	cbnz	w0, .L3387
-	ldr	w0, [x20, 40]
-	bl	ftl_mask_bad_block
-.L3387:
-	mov	w0, -1
-.L3370:
-	ldp	x19, x20, [sp, 32]
-	ldp	x21, x22, [sp, 48]
-	ldp	x23, x24, [sp, 64]
-	ldp	x25, x26, [sp, 80]
-	ldp	x27, x28, [sp, 96]
-	ldp	x29, x30, [sp, 16]
-	add	sp, sp, 128
-	ret
-.L3375:
-	ldrh	w0, [x21, 16]
-	cmp	w2, 3
-	add	w0, w0, w1
-	bne	.L3377
-	orr	w0, w0, w25, lsl 24
-.L3377:
-	str	w0, [x20, 40]
-	b	.L3376
-.L3379:
-	ldrh	w0, [x21, 22]
-	add	w25, w25, 1
-	add	w0, w0, 1
-	strh	w0, [x21, 22]
-.L3385:
-	ldrh	w0, [x21, 20]
-	cmp	w25, w0
-	ble	.L3383
-	add	w27, w27, 1
-	add	x28, x28, 2
-	b	.L3373
-.L3384:
-	add	x19, x19, :lo12:.LANCHOR64
-	ldrh	w0, [x19, 16]
-	add	w1, w0, 1
-	strh	w1, [x19, 16]
-	adrp	x1, .LANCHOR74
-	ldrb	w1, [x1, #:lo12:.LANCHOR74]
-	cbz	w1, .L3388
-	add	w0, w0, 2
-	strh	w0, [x19, 16]
-.L3388:
-.L3382:
-	mov	w0, 0
-	b	.L3370
-	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
+	.global	ftl_vendor_read
+	.type	ftl_vendor_read, %function
+ftl_vendor_read:
+	mov	x3, x2
+	mov	w2, w1
+	add	w1, w0, 512
+	mov	w0, 2
+	b	zftl_read
+	.size	ftl_vendor_read, .-ftl_vendor_read
+	.section	.text.zftl_vendor_read,"ax",@progbits
+	.align	2
+	.global	zftl_vendor_read
+	.type	zftl_vendor_read, %function
+zftl_vendor_read:
+	b	ftl_vendor_read
+	.size	zftl_vendor_read, .-zftl_vendor_read
 	.section	.text.ftl_update_l2p_map,"ax",@progbits
 	.align	2
 	.global	ftl_update_l2p_map
@@ -21668,50 +22845,50 @@ ftl_update_l2p_map:
 	stp	x21, x22, [sp, 32]
 	mov	x22, x0
 	stp	x19, x20, [sp, 16]
-	adrp	x0, .LANCHOR87
+	adrp	x0, .LANCHOR95
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	ldrh	w23, [x0, #:lo12:.LANCHOR87]
+	ldrh	w23, [x0, #:lo12:.LANCHOR95]
 	ldrb	w0, [x22, 9]
 	ldrh	w19, [x22, 12]
 	mul	w23, w23, w0
-	adrp	x0, .LANCHOR111
+	adrp	x0, .LANCHOR117
 	str	x0, [x29, 104]
-	ldr	x1, [x0, #:lo12:.LANCHOR111]
+	ldr	x1, [x0, #:lo12:.LANCHOR117]
 	add	x19, x1, x19, lsl 2
 	add	x1, x19, x23, sxtw 2
 	ldr	w1, [x1, -4]
 	cmn	w1, #1
-	beq	.L3403
-	adrp	x1, .LANCHOR222
+	beq	.L3602
+	adrp	x1, .LANCHOR231
 	adrp	x0, .LC0
-	mov	w2, 1743
-	add	x1, x1, :lo12:.LANCHOR222
+	mov	w2, 1990
+	add	x1, x1, :lo12:.LANCHOR231
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3403:
-	adrp	x27, .LANCHOR126
+.L3602:
+	adrp	x27, .LANCHOR131
 	mov	x24, 0
-	add	x0, x27, :lo12:.LANCHOR126
+	add	x0, x27, :lo12:.LANCHOR131
 	mov	w21, 0
 	str	x0, [x29, 96]
-.L3404:
+.L3603:
 	cmp	w24, w23
-	blt	.L3410
+	blt	.L3609
 	adrp	x0, .LANCHOR14
 	adrp	x19, .LANCHOR9
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3411
+	tbz	x0, 12, .L3610
 	ldrh	w1, [x22]
 	ldr	x2, [x19, #:lo12:.LANCHOR9]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w3, [x2, x0]
-	adrp	x0, .LC235
+	adrp	x0, .LC231
 	mov	w2, w21
-	add	x0, x0, :lo12:.LC235
+	add	x0, x0, :lo12:.LC231
 	bl	printf
-.L3411:
+.L3610:
 	ldrh	w1, [x22]
 	ldr	x0, [x19, #:lo12:.LANCHOR9]
 	ldp	x23, x24, [sp, 48]
@@ -21722,38 +22899,38 @@ ftl_update_l2p_map:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L3410:
+.L3609:
 	ldr	w2, [x19, x24, lsl 2]
 	cmn	w2, #1
-	beq	.L3405
-	ldrb	w20, [x27, #:lo12:.LANCHOR126]
+	beq	.L3604
+	ldrb	w20, [x27, #:lo12:.LANCHOR131]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	lsl	w20, w20, 7
 	udiv	w20, w2, w20
 	and	w20, w20, 65535
-	tbz	x0, 12, .L3406
-	adrp	x0, .LC232
+	tbz	x0, 12, .L3605
+	adrp	x0, .LC228
 	mov	w3, w24
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC232
+	add	x0, x0, :lo12:.LC228
 	bl	printf
-.L3406:
-	adrp	x25, .LANCHOR105
-	adrp	x26, .LC233
+.L3605:
+	adrp	x25, .LANCHOR111
+	adrp	x26, .LC229
 	mov	x28, x24
-	add	x25, x25, :lo12:.LANCHOR105
-	add	x26, x26, :lo12:.LC233
-.L3409:
+	add	x25, x25, :lo12:.LANCHOR111
+	add	x26, x26, :lo12:.LC229
+.L3608:
 	ldr	w1, [x19, x28, lsl 2]
 	cmn	w1, #1
-	beq	.L3407
+	beq	.L3606
 	ldr	x0, [x29, 96]
 	ldrb	w2, [x0]
 	lsl	w2, w2, 7
 	udiv	w1, w1, w2
 	cmp	w20, w1, uxth
-	bne	.L3407
+	bne	.L3606
 	ldrb	w0, [x22, 9]
 	sdiv	w1, w28, w0
 	msub	w0, w1, w0, w28
@@ -21765,15 +22942,15 @@ ftl_update_l2p_map:
 	str	w2, [x29, 124]
 	ldr	w1, [x19, x28, lsl 2]
 	bl	pm_ppa_update_check
-	cbz	w0, .L3408
+	cbz	w0, .L3607
 	ldr	x0, [x29, 104]
 	mov	w3, w23
 	mov	w2, 4
-	ldr	x1, [x0, #:lo12:.LANCHOR111]
-	adrp	x0, .LC234
-	add	x0, x0, :lo12:.LC234
+	ldr	x1, [x0, #:lo12:.LANCHOR117]
+	adrp	x0, .LC230
+	add	x0, x0, :lo12:.LC230
 	bl	rknand_print_hex
-.L3408:
+.L3607:
 	ldr	w0, [x19, x28, lsl 2]
 	add	w21, w21, 1
 	mov	w2, 1
@@ -21782,13 +22959,13 @@ ftl_update_l2p_map:
 	bl	pm_log2phys
 	mov	w0, -1
 	str	w0, [x19, x28, lsl 2]
-.L3407:
+.L3606:
 	add	x28, x28, 1
 	cmp	w23, w28
-	bgt	.L3409
-.L3405:
+	bgt	.L3608
+.L3604:
 	add	x24, x24, 1
-	b	.L3404
+	b	.L3603
 	.size	ftl_update_l2p_map, .-ftl_update_l2p_map
 	.section	.text.ftl_alloc_new_data_sblk,"ax",@progbits
 	.align	2
@@ -21806,9 +22983,9 @@ ftl_alloc_new_data_sblk:
 	ldrh	w0, [x20]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3433
+	beq	.L3632
 	bl	zftl_insert_data_list
-.L3433:
+.L3632:
 	adrp	x19, .LANCHOR10
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	add	x0, x0, 16
@@ -21820,13 +22997,13 @@ ftl_alloc_new_data_sblk:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldr	w0, [x0, 560]
 	cmp	w0, w21
-	bne	.L3435
+	bne	.L3634
 	mov	w20, 65535
 	cmp	w21, w20
-	beq	.L3435
+	beq	.L3634
 	mov	w1, w21
-	adrp	x0, .LC236
-	add	x0, x0, :lo12:.LC236
+	adrp	x0, .LC232
+	add	x0, x0, :lo12:.LC232
 	bl	printf
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldr	w0, [x0, 564]
@@ -21835,7 +23012,7 @@ ftl_alloc_new_data_sblk:
 	mov	w1, -1
 	str	w20, [x0, 560]
 	str	w1, [x0, 564]
-.L3435:
+.L3634:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
@@ -21851,388 +23028,410 @@ ftl_alloc_new_data_sblk:
 	.global	ftl_write_commit
 	.type	ftl_write_commit, %function
 ftl_write_commit:
-	stp	x29, x30, [sp, -144]!
-	adrp	x0, .LANCHOR52
+	stp	x29, x30, [sp, -160]!
+	adrp	x0, .LANCHOR56
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	add	x23, x0, :lo12:.LANCHOR52
+	add	x24, x0, :lo12:.LANCHOR56
+	add	x0, x24, 2050
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-.L3439:
-	adrp	x2, .LANCHOR60
-	ldrb	w1, [x2, #:lo12:.LANCHOR60]
-	cbz	w1, .L3441
-	adrp	x3, .LANCHOR59
-	adrp	x0, .LANCHOR52
-	add	x0, x0, :lo12:.LANCHOR52
+	str	x0, [x29, 104]
+.L3638:
+	adrp	x2, .LANCHOR67
+	ldrb	w1, [x2, #:lo12:.LANCHOR67]
+	cbz	w1, .L3640
+	adrp	x3, .LANCHOR66
+	adrp	x0, .LANCHOR56
+	add	x0, x0, :lo12:.LANCHOR56
 	sub	w1, w1, #1
-	ldrb	w4, [x3, #:lo12:.LANCHOR59]
-	strb	w1, [x2, #:lo12:.LANCHOR60]
-	ubfiz	x27, x4, 6, 8
-	add	x5, x0, x27
-	stp	x4, x5, [x29, 112]
+	ldrb	w4, [x3, #:lo12:.LANCHOR66]
+	strb	w1, [x2, #:lo12:.LANCHOR67]
+	ubfiz	x28, x4, 6, 8
+	add	x5, x0, x28
+	stp	x4, x5, [x29, 128]
 	lsl	x4, x4, 6
 	add	x5, x0, x4
 	ldrb	w0, [x0, x4]
-	strb	w0, [x3, #:lo12:.LANCHOR59]
-	adrp	x0, .LANCHOR123
+	strb	w0, [x3, #:lo12:.LANCHOR66]
+	adrp	x0, .LANCHOR128
 	ldr	w2, [x5, 36]
 	mov	x19, x0
-	ldr	w1, [x0, #:lo12:.LANCHOR123]
+	ldr	w1, [x0, #:lo12:.LANCHOR128]
 	cmp	w2, w1
-	bcc	.L3443
-	adrp	x1, .LANCHOR223
+	bcc	.L3642
+	adrp	x1, .LANCHOR232
 	adrp	x0, .LC0
-	mov	w2, 510
-	add	x1, x1, :lo12:.LANCHOR223
+	mov	w2, 604
+	add	x1, x1, :lo12:.LANCHOR232
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3443:
-	ldr	x0, [x29, 112]
-	ldr	w1, [x19, #:lo12:.LANCHOR123]
-	add	x0, x23, x0, lsl 6
+.L3642:
+	ldr	x0, [x29, 128]
+	ldr	w1, [x19, #:lo12:.LANCHOR128]
+	add	x0, x24, x0, lsl 6
 	ldr	w22, [x0, 36]
 	cmp	w22, w1
-	bcc	.L3444
-	ldr	x0, [x29, 120]
+	bcc	.L3643
+	ldr	x0, [x29, 136]
 	bl	zbuf_free
 	mov	w0, -1
-.L3438:
+.L3637:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 144
+	ldp	x29, x30, [sp], 160
 	ret
-.L3444:
+.L3643:
 	ldrb	w21, [x0, 57]
 	ldrb	w20, [x0, 56]
 	ldr	x26, [x0, 8]
-	ldr	x28, [x0, 24]
-	adrp	x0, .LANCHOR124
-	str	x0, [x29, 104]
-	ldrb	w1, [x0, #:lo12:.LANCHOR124]
-	cbz	w1, .L3446
-	adrp	x0, .LANCHOR178
-	ldrb	w1, [x0, #:lo12:.LANCHOR178]
-	add	x1, x23, x1, lsl 6
-.L3447:
-	ldrb	w0, [x1]
+	ldr	x23, [x0, 24]
+	adrp	x0, .LANCHOR129
+	str	x0, [x29, 120]
+	ldrb	w1, [x0, #:lo12:.LANCHOR129]
+	cbz	w1, .L3645
+	adrp	x0, .LANCHOR185
+	ldrb	w19, [x0, #:lo12:.LANCHOR185]
+	add	x19, x24, x19, lsl 6
+.L3646:
+	ldrb	w0, [x19]
 	cmp	w0, 255
-	bne	.L3448
-	ldr	w0, [x1, 36]
+	bne	.L3647
+	ldr	w0, [x19, 36]
 	cmp	w22, w0
-	bne	.L3446
-	ldr	x0, [x1, 8]
+	bne	.L3645
+	ldr	x0, [x19, 8]
 	ubfiz	x21, x21, 9, 8
 	lsl	w2, w20, 9
 	add	x1, x26, x21
 	add	x0, x0, x21
 	bl	ftl_memcpy
-	ldr	x0, [x29, 120]
+	adrp	x0, .LANCHOR131
+	ldr	x2, [x19, 8]
+	ldr	x1, [x19, 24]
+	ldrb	w0, [x0, #:lo12:.LANCHOR131]
+	add	x1, x1, 16
+	sub	w0, w0, #2
+	lsl	w0, w0, 7
+	add	x2, x2, x0, sxtw 2
+	mov	w0, 2
+	bl	ftl_debug_info_fill
+	ldr	x0, [x29, 136]
 	bl	zbuf_free
-	b	.L3439
-.L3448:
-	ubfiz	x1, x0, 6, 8
-	add	x1, x23, x1
-	b	.L3447
-.L3446:
+	b	.L3638
+.L3647:
+	ubfiz	x19, x0, 6, 8
+	add	x19, x24, x19
+	b	.L3646
+.L3645:
 	mov	w0, w22
 	bl	lpa_hash_get_ppa
-	str	w0, [x29, 140]
+	str	w0, [x29, 156]
 	cmn	w0, #1
-	bne	.L3450
+	bne	.L3649
 	mov	w2, 0
-	add	x1, x29, 140
+	add	x1, x29, 156
 	mov	w0, w22
 	bl	pm_log2phys
-.L3450:
-	adrp	x25, .LANCHOR10
-	add	x1, x23, 2
-	mov	w0, 0
-	ldr	x19, [x25, #:lo12:.LANCHOR10]
+.L3649:
+	adrp	x27, .LANCHOR10
+	ldr	w2, [x29, 156]
+	add	x0, x24, 2
+	mov	w3, 0
+	ldr	x19, [x27, #:lo12:.LANCHOR10]
+	mov	x25, 0
 	add	x19, x19, 16
-.L3453:
-	ldr	w2, [x1, 34]
-	cmp	w22, w2
-	bne	.L3451
-	ldrb	w2, [x1]
-	tbz	x2, 3, .L3451
-	ubfiz	x0, x0, 6, 32
-	and	w2, w2, -9
-	add	x0, x23, x0
-	strb	w2, [x0, 2]
-	ldr	x24, [x0, 8]
-	ldr	w0, [x0, 40]
-	str	w0, [x29, 140]
-.L3452:
-	adrp	x0, .LANCHOR126
-	str	x0, [x29, 96]
-	ldrb	w1, [x0, #:lo12:.LANCHOR126]
+.L3651:
+	ldr	w1, [x0, 34]
+	cmp	w22, w1
+	bne	.L3650
+	ldrb	w1, [x0]
+	tbz	x1, 3, .L3650
+	ldr	w2, [x0, 38]
+	and	w1, w1, -9
+	ldr	x25, [x0, 6]
+	mov	w3, 1
+	strb	w1, [x0]
+.L3650:
+	ldr	x1, [x29, 104]
+	add	x0, x0, 64
+	cmp	x0, x1
+	bne	.L3651
+	cbz	w3, .L3652
+	str	w2, [x29, 156]
+.L3652:
+	adrp	x0, .LANCHOR131
+	str	x0, [x29, 112]
+	ldrb	w1, [x0, #:lo12:.LANCHOR131]
 	cmp	w20, w1
-	bcs	.L3477
+	bcs	.L3676
 	add	w20, w21, w20
-	cbz	x24, .L3455
-	cbz	w21, .L3456
+	cbz	x25, .L3654
+	cbz	w21, .L3655
 	lsl	w2, w21, 9
-	mov	x1, x24
+	mov	x1, x25
 	mov	x0, x26
 	bl	ftl_memcpy
-	ldr	x19, [x25, #:lo12:.LANCHOR10]
+	ldr	x19, [x27, #:lo12:.LANCHOR10]
 	add	x19, x19, 48
-.L3456:
-	ldr	x0, [x29, 96]
-	ldrb	w2, [x0, #:lo12:.LANCHOR126]
+.L3655:
+	ldr	x0, [x29, 112]
+	ldrb	w2, [x0, #:lo12:.LANCHOR131]
 	cmp	w20, w2
-	bcc	.L3457
-	ldr	x19, [x25, #:lo12:.LANCHOR10]
+	bcc	.L3656
+	ldr	x19, [x27, #:lo12:.LANCHOR10]
 	add	x19, x19, 16
-.L3477:
-	mov	w24, 0
-	b	.L3454
-.L3451:
-	add	w0, w0, 1
-	add	x1, x1, 64
-	cmp	w0, 32
-	bne	.L3453
-	mov	x24, 0
-	b	.L3452
-.L3457:
+.L3676:
+	mov	w25, 0
+	b	.L3653
+.L3656:
 	ubfiz	x0, x20, 9, 9
 	sub	w2, w2, w20
-	add	x1, x24, x0
+	add	x1, x25, x0
 	lsl	w2, w2, 9
 	add	x0, x26, x0
 	bl	ftl_memcpy
-	b	.L3477
-.L3455:
-	ldr	w0, [x29, 140]
+	b	.L3676
+.L3654:
+	ldr	w0, [x29, 156]
 	cmn	w0, #1
-	beq	.L3458
+	beq	.L3657
 	mov	w0, 1
 	bl	buf_alloc
-	ldr	w1, [x29, 140]
-	mov	x27, x0
+	ldr	w1, [x29, 156]
+	mov	x28, x0
 	stp	w22, w1, [x0, 36]
 	mov	w1, 1
 	bl	sblk_read_page
-	ldr	x0, [x27, 24]
-	ldr	w24, [x0, 12]
+	ldr	x0, [x28, 24]
+	ldr	w25, [x0, 12]
 	ldr	w0, [x0, 4]
-	add	w24, w24, 1
+	add	w25, w25, 1
 	cmp	w22, w0
-	bne	.L3459
-	ldr	w0, [x27, 52]
+	bne	.L3658
+	ldr	w0, [x28, 52]
 	cmn	w0, #1
-	bne	.L3460
-.L3459:
-	ldr	x1, [x25, #:lo12:.LANCHOR10]
+	bne	.L3659
+.L3658:
+	ldr	x1, [x27, #:lo12:.LANCHOR10]
 	mov	w3, w22
-	ldr	w4, [x27, 52]
-	ldr	w2, [x29, 140]
+	ldr	w4, [x28, 52]
+	ldr	w2, [x29, 156]
 	ldr	w0, [x1, 552]
 	add	w0, w0, 1
 	str	w0, [x1, 552]
-	adrp	x0, .LC237
-	add	x0, x0, :lo12:.LC237
-	ldrb	w1, [x27, 1]
+	adrp	x0, .LC233
+	add	x0, x0, :lo12:.LC233
+	ldrb	w1, [x28, 1]
 	bl	printf
-	ldr	x1, [x27, 24]
+	ldr	x1, [x28, 24]
 	mov	w3, 4
-	adrp	x0, .LC194
+	adrp	x0, .LC205
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC194
+	add	x0, x0, :lo12:.LC205
 	bl	rknand_print_hex
-.L3460:
-	ldr	x0, [x27, 24]
+.L3659:
+	ldr	x0, [x28, 24]
 	ldr	w0, [x0, 4]
 	cmp	w22, w0
-	bne	.L3461
-	ldr	w0, [x27, 52]
+	bne	.L3660
+	ldr	w0, [x28, 52]
 	cmn	w0, #1
-	bne	.L3462
-.L3461:
-	adrp	x1, .LANCHOR223
+	bne	.L3661
+.L3660:
+	adrp	x1, .LANCHOR232
 	adrp	x0, .LC0
-	mov	w2, 581
-	add	x1, x1, :lo12:.LANCHOR223
+	mov	w2, 691
+	add	x1, x1, :lo12:.LANCHOR232
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3462:
-	cbz	w21, .L3463
-	ldr	w0, [x29, 140]
+.L3661:
+	cbz	w21, .L3662
+	ldr	w0, [x29, 156]
 	lsl	w2, w21, 9
 	cmn	w0, #1
-	beq	.L3464
-	ldr	x1, [x27, 8]
+	beq	.L3663
+	ldr	x1, [x28, 8]
 	mov	x0, x26
 	bl	ftl_memcpy
-.L3465:
-	ldr	x19, [x25, #:lo12:.LANCHOR10]
+.L3664:
+	ldr	x19, [x27, #:lo12:.LANCHOR10]
 	add	x19, x19, 48
-.L3463:
-	ldr	x0, [x29, 96]
-	ldrb	w2, [x0, #:lo12:.LANCHOR126]
+.L3662:
+	ldr	x0, [x29, 112]
+	ldrb	w2, [x0, #:lo12:.LANCHOR131]
 	cmp	w20, w2
-	bcc	.L3466
-	bls	.L3467
-	ldr	x19, [x25, #:lo12:.LANCHOR10]
+	bcc	.L3665
+	bls	.L3666
+	ldr	x19, [x27, #:lo12:.LANCHOR10]
 	add	x19, x19, 16
-.L3467:
-	cbz	x27, .L3454
-	ldrb	w0, [x27, 2]
-	mov	x1, x27
+.L3666:
+	cbz	x28, .L3653
+	ldrb	w0, [x28, 2]
+	mov	x1, x28
 	and	w0, w0, -9
-	strb	w0, [x27, 2]
-	adrp	x0, .LANCHOR132
-	add	x0, x0, :lo12:.LANCHOR132
+	strb	w0, [x28, 2]
+	adrp	x0, .LANCHOR63
+	add	x0, x0, :lo12:.LANCHOR63
 	bl	buf_remove_buf
-	mov	x0, x27
+	mov	x0, x28
 	bl	zbuf_free
-.L3454:
+.L3653:
 	ldrh	w0, [x19, 6]
-	cbnz	w0, .L3469
+	cbnz	w0, .L3668
 	bl	ftl_flush
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L3469:
+.L3668:
 	mov	x0, x19
 	bl	ftl_get_new_free_page
-	ldr	x1, [x29, 112]
-	adrp	x20, .LANCHOR178
-	lsl	x2, x1, 6
-	add	x1, x23, x2
-	ldr	w3, [x1, 32]
-	stp	w3, w22, [x28]
-	str	w24, [x28, 12]
-	ldr	w3, [x29, 140]
-	str	w3, [x28, 8]
-	stp	w0, w3, [x1, 40]
+	mov	w10, w0
+	ldr	x0, [x29, 128]
+	mov	x1, x23
+	adrp	x20, .LANCHOR185
+	lsl	x8, x0, 6
+	add	x7, x24, x8
+	ldr	w0, [x7, 32]
+	stp	w0, w22, [x23]
+	str	w25, [x23, 12]
+	ldr	w0, [x29, 156]
+	str	w0, [x23, 8]
+	ldr	x0, [x29, 112]
+	str	wzr, [x1, 16]!
+	ldrb	w2, [x0, #:lo12:.LANCHOR131]
+	mov	w0, 2
+	sub	w2, w2, #2
+	lsl	w2, w2, 7
+	add	x2, x26, x2, sxtw 2
+	bl	ftl_debug_info_fill
+	ldr	w0, [x29, 156]
+	mov	w1, 10
+	stp	w10, w0, [x7, 40]
 	mov	w0, -1
-	strb	w0, [x23, x2]
-	mov	w2, 10
-	ldrb	w0, [x1, 2]
-	orr	w0, w0, w2
-	ldrh	w2, [x19, 12]
-	strb	w0, [x1, 2]
+	strb	w0, [x24, x8]
+	ldrb	w0, [x7, 2]
+	orr	w0, w0, w1
+	ldrh	w1, [x19, 12]
+	strb	w0, [x7, 2]
 	ldrh	w0, [x19, 10]
-	add	w0, w0, w2
+	add	w0, w0, w1
+	ldr	x1, [x29, 136]
 	sub	w0, w0, #1
-	strh	w0, [x1, 48]
-	ldr	x1, [x29, 120]
-	add	x0, x20, :lo12:.LANCHOR178
+	strh	w0, [x7, 48]
+	add	x0, x20, :lo12:.LANCHOR185
 	bl	buf_add_tail
-	ldr	x0, [x29, 104]
-	ldrb	w2, [x0, #:lo12:.LANCHOR124]
+	ldr	x0, [x29, 120]
+	ldrb	w2, [x0, #:lo12:.LANCHOR129]
 	add	w2, w2, 1
 	and	w2, w2, 255
-	strb	w2, [x0, #:lo12:.LANCHOR124]
-	adrp	x0, .LANCHOR224
+	strb	w2, [x0, #:lo12:.LANCHOR129]
+	adrp	x0, .LANCHOR233
 	cmp	w2, 2
-	str	wzr, [x0, #:lo12:.LANCHOR224]
+	str	wzr, [x0, #:lo12:.LANCHOR233]
 	ldrh	w0, [x19, 6]
-	bhi	.L3470
+	bhi	.L3669
 	cmp	w0, 1
-	bne	.L3442
-.L3470:
+	bne	.L3641
+.L3669:
 	ldrb	w1, [x19, 5]
 	cmp	w1, 0
 	mov	w1, 0
 	cset	w4, ne
 	cmp	w0, 1
-	ldrb	w0, [x20, #:lo12:.LANCHOR178]
+	ldrb	w0, [x20, #:lo12:.LANCHOR185]
 	csinc	w4, w2, w4, eq
 	mov	w3, w0
-.L3474:
+.L3673:
 	cmp	w1, w4
-	bne	.L3475
-	strb	w3, [x20, #:lo12:.LANCHOR178]
+	bne	.L3674
+	strb	w3, [x20, #:lo12:.LANCHOR185]
 	and	w1, w1, 255
-	ldr	x3, [x29, 104]
+	ldr	x3, [x29, 120]
 	sub	w2, w2, w1
 	ubfiz	x0, x0, 6, 8
-	add	x0, x23, x0
-	strb	w2, [x3, #:lo12:.LANCHOR124]
+	add	x0, x24, x0
+	strb	w2, [x3, #:lo12:.LANCHOR129]
 	bl	sblk_prog_page
 	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bne	.L3442
+	bne	.L3641
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	mov	x0, x19
 	bl	ftl_write_last_log_page
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L3442:
-	adrp	x0, .LANCHOR60
-	ldrb	w0, [x0, #:lo12:.LANCHOR60]
-	cbnz	w0, .L3439
-.L3441:
+.L3641:
+	adrp	x0, .LANCHOR67
+	ldrb	w0, [x0, #:lo12:.LANCHOR67]
+	cbnz	w0, .L3638
+.L3640:
 	bl	ftl_write_completed
 	mov	w0, 0
-	b	.L3438
-.L3466:
-	ldr	w0, [x29, 140]
+	b	.L3637
+.L3665:
+	ldr	w0, [x29, 156]
 	sub	w2, w2, w20
 	lsl	w2, w2, 9
 	cmn	w0, #1
 	ubfiz	x0, x20, 7, 9
-	beq	.L3468
-	ldr	x1, [x27, 8]
+	beq	.L3667
+	ldr	x1, [x28, 8]
 	lsl	x0, x0, 2
 	add	x1, x1, x0
 	add	x0, x26, x0
 	bl	ftl_memcpy
-	b	.L3467
-.L3468:
+	b	.L3666
+.L3667:
 	mov	w1, 0
 	add	x0, x26, x0, lsl 2
 	bl	ftl_memset
-	b	.L3467
-.L3475:
+	b	.L3666
+.L3674:
 	ubfiz	x3, x3, 6, 8
 	add	w1, w1, 1
-	ldrb	w3, [x23, x3]
-	b	.L3474
-.L3476:
+	ldrb	w3, [x24, x3]
+	b	.L3673
+.L3675:
 	lsl	w2, w21, 9
-	mov	x27, 0
-	mov	w24, 0
-.L3464:
+	mov	x28, 0
+	mov	w25, 0
+.L3663:
 	mov	w1, 0
 	mov	x0, x26
 	bl	ftl_memset
-	b	.L3465
-.L3458:
-	cbnz	w21, .L3476
-	mov	w24, 0
-	mov	x27, 0
-	b	.L3463
+	b	.L3664
+.L3657:
+	cbnz	w21, .L3675
+	mov	w25, 0
+	mov	x28, 0
+	b	.L3662
 	.size	ftl_write_commit, .-ftl_write_commit
 	.section	.text.gc_do_copy_back,"ax",@progbits
 	.align	2
 	.global	gc_do_copy_back
 	.type	gc_do_copy_back, %function
 gc_do_copy_back:
-	sub	sp, sp, #208
-	adrp	x0, .LANCHOR78
-	stp	x29, x30, [sp, 16]
-	add	x29, sp, 16
-	ldrb	w0, [x0, #:lo12:.LANCHOR78]
-	stp	x19, x20, [sp, 32]
-	stp	x21, x22, [sp, 48]
-	stp	x23, x24, [sp, 64]
-	stp	x25, x26, [sp, 80]
-	stp	x27, x28, [sp, 96]
-	cbnz	w0, .L3500
+	stp	x29, x30, [sp, -224]!
+	adrp	x0, .LANCHOR85
+	add	x29, sp, 0
+	ldrb	w0, [x0, #:lo12:.LANCHOR85]
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	cbnz	w0, .L3702
 	bl	buf_alloc
 	mov	x19, x0
-	cbz	x0, .L3499
-	adrp	x21, .LANCHOR64
-	add	x3, x21, :lo12:.LANCHOR64
+	cbz	x0, .L3701
+	adrp	x21, .LANCHOR71
+	add	x3, x21, :lo12:.LANCHOR71
 	ldrh	w2, [x3, 26]
 	mov	w0, w2
 	bl	gc_get_src_ppa_from_index
@@ -22246,1003 +23445,1177 @@ gc_do_copy_back:
 	ldr	w0, [x19, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3502
-	adrp	x1, .LANCHOR225
+	bne	.L3704
+	adrp	x1, .LANCHOR234
 	adrp	x0, .LC0
-	mov	w2, 868
-	add	x1, x1, :lo12:.LANCHOR225
+	mov	w2, 1032
+	add	x1, x1, :lo12:.LANCHOR234
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3502:
+.L3704:
 	ldr	x0, [x19, 24]
 	ldr	w20, [x0, 4]
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
-	str	w0, [x29, 144]
+	str	w0, [x29, 176]
 	cmn	w0, #1
-	bne	.L3503
+	bne	.L3705
 	mov	w2, 0
-	add	x1, x29, 144
+	add	x1, x29, 176
 	mov	w0, w20
 	bl	pm_log2phys
-.L3503:
-	ldr	w23, [x29, 144]
+.L3705:
+	ldr	w23, [x29, 176]
 	cmp	w22, w23
-	bne	.L3504
-	adrp	x0, .LANCHOR52
-	add	x0, x0, :lo12:.LANCHOR52
+	bne	.L3706
+	adrp	x0, .LANCHOR56
+	add	x0, x0, :lo12:.LANCHOR56
 	add	x1, x0, 2
 	add	x0, x0, 2050
-.L3507:
+.L3709:
 	ldr	w2, [x1, 34]
 	cmp	w20, w2
-	bne	.L3505
+	bne	.L3707
 	ldrb	w2, [x1]
-	tbz	x2, 1, .L3505
+	tbz	x2, 1, .L3707
 	mov	x0, x19
 	bl	zbuf_free
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3499
-	add	x21, x21, :lo12:.LANCHOR64
-	adrp	x0, .LC238
+	tbz	x0, 8, .L3701
+	add	x21, x21, :lo12:.LANCHOR71
+	adrp	x0, .LC234
 	mov	w2, w22
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC238
+	add	x0, x0, :lo12:.LC234
 	ldrh	w3, [x21, 26]
 	bl	printf
-.L3499:
-	ldp	x19, x20, [sp, 32]
-	ldp	x21, x22, [sp, 48]
-	ldp	x23, x24, [sp, 64]
-	ldp	x25, x26, [sp, 80]
-	ldp	x27, x28, [sp, 96]
-	ldp	x29, x30, [sp, 16]
-	add	sp, sp, 208
+.L3701:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 224
 	ret
-.L3505:
+.L3707:
 	add	x1, x1, 64
 	cmp	x1, x0
-	bne	.L3507
-	adrp	x0, .LANCHOR126
-	mov	w1, 10
+	bne	.L3709
+	adrp	x0, .LANCHOR131
 	strb	wzr, [x19, 57]
-	ldrb	w0, [x0, #:lo12:.LANCHOR126]
-	strb	w0, [x19, 56]
-	ldrb	w0, [x19, 2]
 	str	w20, [x19, 36]
-	orr	w0, w0, w1
-	strb	w0, [x19, 2]
+	ldrb	w0, [x0, #:lo12:.LANCHOR131]
+	strb	w0, [x19, 56]
 	ldr	x0, [x19, 24]
-	ldr	w0, [x0]
-	str	w0, [x19, 32]
+	ldr	w1, [x0]
+	str	w1, [x19, 32]
+	str	wzr, [x0, 16]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3508
+	tbz	x0, 8, .L3710
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
-	add	x1, x21, :lo12:.LANCHOR64
+	add	x1, x21, :lo12:.LANCHOR71
 	mov	w3, w0
 	mov	w4, w22
-	adrp	x0, .LC239
+	adrp	x0, .LC235
 	mov	w2, w23
-	add	x0, x0, :lo12:.LC239
+	add	x0, x0, :lo12:.LC235
 	ldrh	w5, [x1, 26]
 	mov	w1, w20
 	bl	printf
-.L3508:
+.L3710:
 	mov	x0, x19
 	bl	ftl_gc_write_buf
 	bl	ftl_write_commit
-	add	x21, x21, :lo12:.LANCHOR64
-	adrp	x0, .LANCHOR104
-	ldr	x1, [x0, #:lo12:.LANCHOR104]
+	add	x21, x21, :lo12:.LANCHOR71
+	adrp	x0, .LANCHOR110
+	ldr	x1, [x0, #:lo12:.LANCHOR110]
 	ldr	w0, [x1, 60]
 	add	w0, w0, 1
 	str	w0, [x1, 60]
 	ldrh	w0, [x21, 28]
 	add	w0, w0, 1
 	strh	w0, [x21, 28]
-	b	.L3499
-.L3504:
+	b	.L3701
+.L3706:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3509
-	add	x21, x21, :lo12:.LANCHOR64
+	tbz	x0, 8, .L3711
+	add	x21, x21, :lo12:.LANCHOR71
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	mov	w3, w0
 	mov	w4, w22
-	adrp	x0, .LC239
+	adrp	x0, .LC235
 	ldrh	w5, [x21, 26]
 	mov	w2, w23
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC239
+	add	x0, x0, :lo12:.LC235
 	bl	printf
-.L3509:
+.L3711:
 	mov	x0, x19
 	bl	zbuf_free
-	b	.L3499
-.L3500:
-	adrp	x1, .LANCHOR10
-	adrp	x0, .LANCHOR73
-	stp	x0, x1, [x29, 112]
-	adrp	x23, .LANCHOR64
-	ldr	x21, [x1, #:lo12:.LANCHOR10]
-	ldrb	w19, [x0, #:lo12:.LANCHOR73]
-	add	x21, x21, 80
+	b	.L3701
+.L3702:
+	adrp	x2, .LANCHOR10
+	adrp	x1, .LANCHOR80
+	stp	x1, x2, [x29, 136]
+	ldr	x26, [x2, #:lo12:.LANCHOR10]
+	ldrb	w3, [x1, #:lo12:.LANCHOR80]
+	add	x26, x26, 80
+	ldrb	w0, [x26, 9]
+	and	w20, w0, 65535
+	cmp	w3, w20
+	bhi	.L3766
+	cmp	w20, 2
+	mov	w21, 2
+	csel	w21, w20, w21, ls
+	and	w21, w21, 65535
+.L3712:
+	adrp	x1, .LANCHOR79
+	str	x1, [x29, 120]
+	ldrb	w19, [x1, #:lo12:.LANCHOR79]
 	cmp	w19, 3
-	bne	.L3510
-	adrp	x0, .LANCHOR35
-	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbz	w0, .L3511
-	add	x0, x23, :lo12:.LANCHOR64
-	ldrb	w20, [x21, 9]
-	ldrh	w28, [x0, 570]
-	adrp	x0, .LANCHOR118
-	ldrb	w0, [x0, #:lo12:.LANCHOR118]
-	sdiv	w1, w28, w20
-	and	w27, w1, 65535
-	cbz	w0, .L3512
-	adrp	x0, .LANCHOR226
-	add	x0, x0, :lo12:.LANCHOR226
-	ldrh	w0, [x0, w1, sxtw 1]
-	cmp	w0, 0
+	bne	.L3713
+	adrp	x1, .LANCHOR36
+	ldrb	w1, [x1, #:lo12:.LANCHOR36]
+	cbz	w1, .L3714
+	adrp	x1, .LANCHOR71
+	add	x1, x1, :lo12:.LANCHOR71
+	ldrh	w22, [x1, 2106]
+	adrp	x1, .LANCHOR124
+	ldrb	w1, [x1, #:lo12:.LANCHOR124]
+	sdiv	w2, w22, w0
+	and	w25, w2, 65535
+	cbz	w1, .L3715
+	adrp	x1, .LANCHOR235
+	add	x1, x1, :lo12:.LANCHOR235
+	ldrh	w1, [x1, w2, sxtw 1]
+	cmp	w1, 0
 	cset	w19, ne
-.L3631:
+.L3833:
 	add	w19, w19, 1
-.L3513:
-	msub	w20, w27, w20, w28
-.L3632:
+.L3716:
+	msub	w20, w20, w25, w22
 	and	w20, w20, 65535
-.L3514:
-	adrp	x1, .LANCHOR79
-	ldrb	w0, [x21, 9]
-	add	x5, x23, :lo12:.LANCHOR64
-	adrp	x11, .LANCHOR226
-	ldrh	w4, [x1, #:lo12:.LANCHOR79]
-	add	x11, x11, :lo12:.LANCHOR226
-	sxtw	x14, w27
+.L3717:
+	adrp	x1, .LANCHOR86
+	mul	w11, w19, w21
+	adrp	x10, .LANCHOR235
+	sxtw	x13, w25
+	ldrh	w5, [x1, #:lo12:.LANCHOR86]
+	adrp	x1, .LANCHOR224
+	add	x10, x10, :lo12:.LANCHOR235
 	mov	w2, 0
-	mul	w13, w19, w0
-	ldrh	w15, [x5, 24]
-	mul	w4, w4, w0
-	adrp	x0, .LANCHOR118
-	ldrb	w12, [x0, #:lo12:.LANCHOR118]
-	adrp	x0, .LANCHOR158
-	sub	w4, w4, #1
-	ldr	x7, [x0, #:lo12:.LANCHOR158]
-.L3518:
-	cmp	w2, w13
-	blt	.L3522
-.L3567:
-	mov	w22, 1
-	b	.L3516
-.L3512:
-	adrp	x0, .LANCHOR207
-	ldrb	w0, [x0, #:lo12:.LANCHOR207]
-	cbz	w0, .L3561
-	sub	w0, w27, #62
-	and	w0, w0, 65535
-	cmp	w0, 2159
-	bhi	.L3562
-	udiv	w19, w27, w19
+	mul	w0, w5, w0
+	ldrb	w5, [x1, #:lo12:.LANCHOR224]
+	sub	w5, w0, w5
+	adrp	x0, .LANCHOR124
+	ldrb	w12, [x0, #:lo12:.LANCHOR124]
+	adrp	x0, .LANCHOR163
+	ldr	x8, [x0, #:lo12:.LANCHOR163]
+	adrp	x0, .LANCHOR71
+	add	x6, x0, :lo12:.LANCHOR71
+	ldrh	w14, [x6, 24]
+.L3721:
+	cmp	w2, w11
+	bge	.L3774
+	add	w4, w22, w2
+	cmp	w4, w5
+	blt	.L3722
+	cbz	w12, .L3774
+	ldrh	w0, [x10, x13, lsl 1]
+	cmp	w0, w25
+	bcc	.L3723
+.L3774:
+	mov	w23, 1
+	b	.L3719
+.L3766:
+	mov	w21, 1
+	b	.L3712
+.L3715:
+	adrp	x1, .LANCHOR217
+	ldrb	w1, [x1, #:lo12:.LANCHOR217]
+	cbz	w1, .L3768
+	sub	w1, w25, #62
+	and	w1, w1, 65535
+	cmp	w1, 2159
+	bhi	.L3769
+	udiv	w19, w25, w19
 	add	w19, w19, w19, lsl 1
-	sub	w19, w27, w19
+	sub	w19, w25, w19
 	and	w19, w19, 65535
 	cmp	w19, 0
 	cset	w19, eq
-	b	.L3631
-.L3561:
+	b	.L3833
+.L3768:
 	mov	w19, 1
-	b	.L3513
-.L3562:
+	b	.L3716
+.L3769:
 	mov	w19, 2
-	b	.L3513
-.L3511:
-	adrp	x0, .LANCHOR77
-	ldrb	w0, [x0, #:lo12:.LANCHOR77]
-	cbz	w0, .L3515
-	add	x0, x23, :lo12:.LANCHOR64
-	ldrb	w20, [x21, 9]
-	ldrh	w28, [x0, 570]
-	add	w8, w20, w20, lsl 1
+	b	.L3716
+.L3714:
+	adrp	x1, .LANCHOR84
+	ldrb	w1, [x1, #:lo12:.LANCHOR84]
+	cbz	w1, .L3718
+	adrp	x1, .LANCHOR71
+	add	x1, x1, :lo12:.LANCHOR71
+	add	w20, w0, w0, lsl 1
+	ldrh	w22, [x1, 2106]
+	adrp	x1, .LANCHOR37
+	ldrb	w1, [x1, #:lo12:.LANCHOR37]
+	sdiv	w20, w22, w20
+	and	w25, w20, 65535
+	mul	w20, w0, w20
 	sub	w20, w20, w20, lsl 2
-	sdiv	w27, w28, w8
-	madd	w20, w27, w20, w28
-	b	.L3632
-.L3515:
-	add	x0, x23, :lo12:.LANCHOR64
-	ldrb	w10, [x21, 9]
-	ldrh	w1, [x0, 570]
-	adrp	x0, .LANCHOR227
-	add	x0, x0, :lo12:.LANCHOR227
-	sdiv	w20, w1, w10
-	ldrh	w22, [x0, w20, sxtw 1]
-	msub	w20, w20, w10, w1
+	add	w20, w20, w22
+	sdiv	w20, w20, w19
 	and	w20, w20, 65535
-	lsr	w27, w22, 3
-	and	w22, w22, 7
-	cmp	w22, 1
-	madd	w10, w27, w10, w20
-	add	w10, w10, w10, lsl 1
-	and	w28, w10, 65535
-	beq	.L3514
-.L3516:
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3523
-	adrp	x0, .LANCHOR158
-	ubfiz	x1, x28, 2, 16
-	mov	w7, w28
-	ldr	x2, [x0, #:lo12:.LANCHOR158]
-	add	x0, x23, :lo12:.LANCHOR64
-	add	x3, x2, x1
-	ldrh	w4, [x0, 570]
-	adrp	x0, .LANCHOR226
-	add	x0, x0, :lo12:.LANCHOR226
-	ldrh	w0, [x0, w27, sxtw 1]
-	str	w0, [sp]
-	adrp	x0, .LC240
-	add	x0, x0, :lo12:.LC240
-	ldr	w5, [x2, x1]
-	mov	w2, w22
-	ldr	w6, [x3, 4]
-	mov	w1, w27
-	mov	w3, w20
-	bl	printf
-.L3523:
-	adrp	x0, .LANCHOR79
-	str	wzr, [x29, 136]
-	add	x0, x0, :lo12:.LANCHOR79
+	cbz	w1, .L3717
+	add	w3, w25, w25, lsl 1
+	and	w25, w3, 65535
+	b	.L3717
+.L3718:
+	adrp	x1, .LANCHOR71
+	add	x1, x1, :lo12:.LANCHOR71
+	adrp	x2, .LANCHOR236
+	add	x2, x2, :lo12:.LANCHOR236
+	ldrh	w4, [x1, 2106]
+	sdiv	w1, w4, w0
+	ldrh	w23, [x2, w1, sxtw 1]
+	msub	w20, w20, w1, w4
+	and	w20, w20, 65535
+	lsr	w25, w23, 3
+	and	w23, w23, 7
+	cmp	w23, 1
+	madd	w22, w25, w0, w20
+	add	w22, w22, w22, lsl 1
+	and	w22, w22, 65535
+	beq	.L3717
+.L3719:
+	mul	w0, w19, w21
+	stp	wzr, w0, [x29, 152]
+	ubfiz	w0, w21, 1, 15
+	str	w0, [x29, 132]
+	msub	w0, w0, w19, w22
+	and	w0, w0, 65535
+	str	w0, [x29, 128]
+	ldrh	w0, [x29, 128]
+	str	x0, [x29, 112]
+	adrp	x0, .LANCHOR56
+	add	x0, x0, :lo12:.LANCHOR56
 	str	x0, [x29, 104]
-.L3524:
-	ldrb	w2, [x21, 9]
-	ldr	w0, [x29, 136]
-	ldrh	w24, [x29, 136]
+.L3724:
+	ldp	w0, w1, [x29, 152]
+	ldrh	w24, [x29, 152]
 	and	w0, w0, 65535
-	str	w0, [x29, 140]
-	mul	w1, w19, w2
+	str	w0, [x29, 168]
 	cmp	w0, w1
-	blt	.L3541
-	ldr	x0, [x29, 112]
-	ldrb	w0, [x0, #:lo12:.LANCHOR73]
+	blt	.L3748
+	ldr	x0, [x29, 120]
+	ldrb	w0, [x0, #:lo12:.LANCHOR79]
 	cmp	w0, 3
-	add	x0, x29, 144
-	bne	.L3542
-	adrp	x3, .LANCHOR35
-	ldrb	w3, [x3, #:lo12:.LANCHOR35]
-	cbz	w3, .L3543
-	sub	w3, w1, #1
-	mov	w2, 0
-.L3544:
-	cmp	w2, w3
-	blt	.L3545
-.L3636:
-	ldr	x0, [x0, w3, sxtw 3]
-	mov	w2, -1
-	strb	w2, [x0]
-	ldr	x0, [x29, 144]
+	add	x0, x29, 176
+	bne	.L3749
+	adrp	x1, .LANCHOR36
+	ldrb	w1, [x1, #:lo12:.LANCHOR36]
+	cbz	w1, .L3750
+	ldr	w2, [x29, 156]
+	mov	w1, 0
+	sub	w2, w2, #1
+.L3751:
+	cmp	w1, w2
+	blt	.L3752
+.L3837:
+	ldr	x0, [x0, w2, sxtw 3]
+	mov	w1, -1
+	strb	w1, [x0]
+	mul	w1, w21, w19
+	ldr	x0, [x29, 176]
 	bl	sblk_prog_page
-	b	.L3546
-.L3510:
-	adrp	x0, .LANCHOR74
-	ldrb	w0, [x0, #:lo12:.LANCHOR74]
-	cbnz	w0, .L3517
-	add	x0, x23, :lo12:.LANCHOR64
-	ldrb	w20, [x21, 9]
+	b	.L3753
+.L3713:
+	adrp	x1, .LANCHOR81
+	ldrb	w1, [x1, #:lo12:.LANCHOR81]
+	cbnz	w1, .L3720
+	adrp	x1, .LANCHOR71
+	add	x1, x1, :lo12:.LANCHOR71
 	mov	w19, 1
-	ldrh	w28, [x0, 570]
-	sdiv	w27, w28, w20
-	msub	w20, w27, w20, w28
+	ldrh	w22, [x1, 2106]
+	sdiv	w25, w22, w0
+	msub	w20, w20, w25, w22
 	and	w20, w20, 65535
-	b	.L3514
-.L3517:
-	add	x0, x23, :lo12:.LANCHOR64
-	ldrb	w20, [x21, 9]
+	b	.L3717
+.L3720:
+	adrp	x1, .LANCHOR71
+	add	x1, x1, :lo12:.LANCHOR71
 	mov	w19, 2
-	ldrh	w28, [x0, 570]
-	sdiv	w27, w28, w20
-	msub	w20, w27, w20, w28
+	ldrh	w22, [x1, 2106]
+	sdiv	w25, w22, w0
+	msub	w20, w20, w25, w22
 	and	w20, w20, 65535
-	b	.L3514
-.L3522:
-	add	w3, w28, w2
-	cmp	w3, w4
-	bne	.L3519
-	cbz	w12, .L3567
-	ldrh	w0, [x11, x14, lsl 1]
-	cmp	w0, w27
-	bcs	.L3567
-	tbz	x2, 0, .L3567
-.L3519:
-	sbfiz	x3, x3, 2, 32
-	ldr	w0, [x7, x3]
+	b	.L3717
+.L3723:
+	tbz	x2, 0, .L3774
+.L3722:
+	sbfiz	x4, x4, 2, 32
+	ldr	w0, [x8, x4]
 	cmn	w0, #1
-	bne	.L3520
-	ldrh	w6, [x5, 26]
-	cmp	w6, w15
-	bcs	.L3499
-	cbz	w12, .L3521
-	ldrh	w0, [x11, x14, lsl 1]
-	cmp	w0, w27
-	bcs	.L3521
-	tbz	x2, 0, .L3521
+	bne	.L3725
+	ldrh	w7, [x6, 26]
+	cmp	w7, w14
+	bcs	.L3701
+	cbz	w12, .L3726
+	ldrh	w0, [x10, x13, lsl 1]
+	cmp	w0, w25
+	bcs	.L3726
+	tbz	x2, 0, .L3726
 	ubfiz	x0, x0, 2, 16
-	ldr	w0, [x7, x0]
-.L3633:
-	str	w0, [x7, x3]
-.L3520:
+	ldr	w0, [x8, x0]
+.L3834:
+	str	w0, [x8, x4]
+.L3725:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-	b	.L3518
-.L3521:
-	mov	w0, w6
+	b	.L3721
+.L3726:
+	mov	w0, w7
 	bl	gc_get_src_ppa_from_index
-	add	w6, w6, 1
-	strh	w6, [x5, 26]
-	b	.L3633
-.L3541:
-	ldr	w0, [x29, 140]
-	add	w0, w28, w0
-	str	w0, [x29, 128]
-	sxtw	x26, w0
-	adrp	x0, .LANCHOR76
-	ldr	x0, [x0, #:lo12:.LANCHOR76]
-	ldrb	w0, [x0, x26]
+	add	w7, w7, 1
+	strh	w7, [x6, 26]
+	b	.L3834
+.L3748:
+	ldr	w0, [x29, 168]
+	add	w0, w22, w0
+	str	w0, [x29, 172]
+	sxtw	x0, w0
+	str	x0, [x29, 160]
+	adrp	x0, .LANCHOR83
+	ldr	x1, [x29, 160]
+	ldr	x0, [x0, #:lo12:.LANCHOR83]
+	ldrb	w0, [x0, x1]
 	cmp	w0, 255
-	bne	.L3525
+	bne	.L3728
 	mov	w0, 0
 	bl	buf_alloc
-	mov	x25, x0
-	cbnz	x0, .L3526
+	mov	x27, x0
+	cbnz	x0, .L3729
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	bl	gc_write_completed
 	bl	gc_free_temp_buf
 	mov	w0, 0
 	bl	buf_alloc
-	mov	x25, x0
-	cbz	x0, .L3499
-.L3526:
-	adrp	x0, .LANCHOR76
-	ldrb	w1, [x25, 1]
-	adrp	x5, .LANCHOR158
-	ldr	x0, [x0, #:lo12:.LANCHOR76]
-	strb	w1, [x0, x26]
-	add	x1, x23, :lo12:.LANCHOR64
-	strb	w22, [x25, 61]
+	mov	x27, x0
+	cbz	x0, .L3701
+.L3729:
+	adrp	x0, .LANCHOR83
+	ldr	x2, [x29, 160]
+	ldrb	w1, [x27, 1]
+	ldr	x0, [x0, #:lo12:.LANCHOR83]
+	strb	w1, [x0, x2]
+	adrp	x0, .LANCHOR71
+	add	x1, x0, :lo12:.LANCHOR71
+	strb	w23, [x27, 61]
 	ldrb	w0, [x1, 7]
 	add	w0, w0, 1
 	strb	w0, [x1, 7]
-	add	w0, w24, w28
-	strh	w0, [x25, 48]
-	adrp	x0, .LANCHOR79
-	ldr	w1, [x29, 128]
-	ldrh	w6, [x0, #:lo12:.LANCHOR79]
-	ldrb	w0, [x21, 9]
+	add	w0, w24, w22
+	strh	w0, [x27, 48]
+	adrp	x0, .LANCHOR86
+	ldr	w1, [x29, 172]
+	ldrh	w6, [x0, #:lo12:.LANCHOR86]
+	adrp	x0, .LANCHOR224
+	ldrb	w5, [x0, #:lo12:.LANCHOR224]
+	ldrb	w0, [x26, 9]
 	mul	w0, w0, w6
-	sub	w0, w0, #1
+	sub	w0, w0, w5
 	cmp	w1, w0
-	bne	.L3527
-	adrp	x0, .LANCHOR118
-	ldrb	w0, [x0, #:lo12:.LANCHOR118]
-	cbz	w0, .L3528
-	adrp	x0, .LANCHOR226
-	add	x0, x0, :lo12:.LANCHOR226
-	ldrh	w0, [x0, w27, sxtw 1]
-	cmp	w0, w27
-	bcs	.L3528
-	tbnz	x24, 0, .L3527
-.L3528:
-	adrp	x0, .LANCHOR157
-	adrp	x4, .LANCHOR80
-	str	x5, [x29, 96]
-	ldr	x1, [x0, #:lo12:.LANCHOR157]
-	mov	w0, -1
-	str	x4, [x29, 128]
-	str	w0, [x1, x26, lsl 2]
-	ldr	x0, [x25, 8]
-	ldrb	w2, [x4, #:lo12:.LANCHOR80]
-	mul	w2, w2, w6
-	lsl	w2, w2, 2
-	bl	ftl_memcpy
-	ldp	x5, x0, [x29, 96]
-	adrp	x6, .LANCHOR126
-	ldr	x4, [x29, 128]
-	ldrh	w0, [x0]
-	ldrb	w1, [x4, #:lo12:.LANCHOR80]
-	mul	w0, w0, w1
-	adrp	x1, .LANCHOR207
-	ldrb	w1, [x1, #:lo12:.LANCHOR207]
-	lsl	w2, w0, 2
-	cbz	w1, .L3529
-	ldrb	w1, [x6, #:lo12:.LANCHOR126]
-	lsl	w1, w1, 9
-	sub	w2, w1, w2
-.L3529:
-	ldr	x1, [x5, #:lo12:.LANCHOR158]
-	ldr	x7, [x25, 8]
-	str	x4, [x29, 96]
-	str	x6, [x29, 128]
-	add	x0, x7, x0, sxtw 2
+	blt	.L3730
+	adrp	x1, .LANCHOR124
+	ldrb	w1, [x1, #:lo12:.LANCHOR124]
+	cbz	w1, .L3731
+	adrp	x1, .LANCHOR235
+	add	x1, x1, :lo12:.LANCHOR235
+	ldrh	w1, [x1, w25, sxtw 1]
+	cmp	w1, w25
+	bcs	.L3731
+	tbnz	x24, 0, .L3730
+.L3731:
+	adrp	x1, .LANCHOR162
+	ldr	w3, [x29, 172]
+	mov	w2, -1
+	cmp	w5, 2
+	ldr	x1, [x1, #:lo12:.LANCHOR162]
+	str	w2, [x1, w3, sxtw 2]
+	bne	.L3732
+	cmp	w3, w0
+	adrp	x28, .LANCHOR221
+	bne	.L3733
+	ldrh	w2, [x28, #:lo12:.LANCHOR221]
+	ldr	x0, [x27, 8]
 	bl	ftl_memcpy
-	ldr	x6, [x29, 128]
+	adrp	x0, .LANCHOR131
 	mov	w1, 0
-	ldr	x0, [x25, 24]
-	ldrb	w2, [x6, #:lo12:.LANCHOR126]
+	ldrb	w2, [x0, #:lo12:.LANCHOR131]
+	ldr	x0, [x27, 24]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	ldr	x6, [x25, 24]
+	ldr	x6, [x27, 24]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
-	ldr	x4, [x29, 96]
+	ldrh	w1, [x28, #:lo12:.LANCHOR221]
 	str	w0, [x6]
-	ldr	x0, [x29, 104]
-	ldrh	w1, [x0]
-	ldrb	w0, [x4, #:lo12:.LANCHOR80]
-	mul	w1, w1, w0
-	ldr	x0, [x25, 8]
-	lsl	w1, w1, 2
+	ldr	x0, [x27, 8]
 	bl	js_hash
 	str	w0, [x6, 4]
-	ldr	x0, [x29, 120]
+	ldr	x0, [x29, 144]
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x0, 132]
-	str	w0, [x6, 8]
-.L3525:
-	adrp	x0, .LANCHOR76
-	adrp	x11, .LANCHOR52
-	add	x7, x11, :lo12:.LANCHOR52
-	ldrsw	x2, [x29, 140]
-	ldr	x3, [x0, #:lo12:.LANCHOR76]
+	stp	w0, wzr, [x6, 8]
+.L3734:
+	ldr	x0, [x27, 24]
+	str	wzr, [x0, 16]
+.L3728:
+	adrp	x0, .LANCHOR83
+	ldrsw	x2, [x29, 168]
+	add	x4, x29, 176
+	ldr	x1, [x0, #:lo12:.LANCHOR83]
+	ldr	x0, [x29, 160]
+	ldrb	w5, [x1, x0]
+	adrp	x0, .LANCHOR56
+	add	x6, x0, :lo12:.LANCHOR56
+	mov	x7, x5
+	ubfiz	x0, x5, 6, 8
+	add	x0, x6, x0
+	add	x6, x6, x5, lsl 6
+	str	x0, [x4, x2, lsl 3]
 	mov	w0, 2
-	add	x1, x29, 144
-	adrp	x6, .LANCHOR159
-	ldrb	w5, [x3, x26]
-	ubfiz	x4, x5, 6, 8
-	add	x4, x7, x4
-	add	x7, x7, x5, lsl 6
-	str	x4, [x1, x2, lsl 3]
-	adrp	x4, .LANCHOR118
-	strh	w0, [x7, 50]
-	ldr	x0, [x29, 112]
-	strb	w22, [x7, 61]
-	ldrb	w0, [x0, #:lo12:.LANCHOR73]
+	strh	w0, [x6, 50]
+	ldr	x0, [x29, 120]
+	strb	w23, [x6, 61]
+	ldrb	w0, [x0, #:lo12:.LANCHOR79]
 	cmp	w0, 3
-	bne	.L3533
-	adrp	x12, .LANCHOR35
-	ldrb	w13, [x12, #:lo12:.LANCHOR35]
-	adrp	x12, .LANCHOR105
-	cbz	w13, .L3534
-	ldrb	w0, [x4, #:lo12:.LANCHOR118]
-	and	w14, w24, 1
-	add	w13, w14, w27
-	cbz	w0, .L3535
-	adrp	x7, .LANCHOR226
-	add	x7, x7, :lo12:.LANCHOR226
-	ldrh	w0, [x7, w27, sxtw 1]
-	cmp	w0, w27
-	bcs	.L3535
-	cmp	w14, 0
-	csel	w13, w13, w0, eq
-.L3535:
-	udiv	w7, w24, w19
-	add	x14, x11, :lo12:.LANCHOR52
-	add	x14, x14, x5, lsl 6
-	add	w7, w7, w20
-	add	x7, x21, x7, sxtw 1
-	ldrh	w0, [x7, 16]
-	ldrh	w7, [x12, #:lo12:.LANCHOR105]
-	madd	w0, w0, w7, w13
+	bne	.L3739
+	adrp	x8, .LANCHOR36
+	ldrb	w8, [x8, #:lo12:.LANCHOR36]
+	cbz	w8, .L3740
+	adrp	x0, .LANCHOR124
+	and	w8, w24, 1
+	add	w10, w8, w25
+	ldrb	w0, [x0, #:lo12:.LANCHOR124]
+	cbz	w0, .L3741
+	adrp	x6, .LANCHOR235
+	add	x6, x6, :lo12:.LANCHOR235
+	ldrh	w6, [x6, w25, sxtw 1]
+	cmp	w6, w25
+	bcs	.L3741
+	cmp	w8, 0
+	csel	w10, w10, w6, eq
+.L3741:
+	adrp	x0, .LANCHOR56
+	add	x6, x0, :lo12:.LANCHOR56
+	add	x5, x6, x5, lsl 6
+	udiv	w6, w24, w19
+	add	w6, w6, w20
+	add	x6, x26, x6, sxtw 1
+	ldrh	w0, [x6, 16]
+	adrp	x6, .LANCHOR111
+	ldrh	w6, [x6, #:lo12:.LANCHOR111]
+	madd	w0, w0, w6, w10
 	orr	w0, w0, 50331648
-	str	w0, [x14, 40]
-.L3539:
-	add	x0, x11, :lo12:.LANCHOR52
-	add	x0, x0, x5, lsl 6
+	str	w0, [x5, 40]
+.L3746:
+	adrp	x0, .LANCHOR56
+	sbfiz	x7, x7, 6, 32
+	add	x0, x0, :lo12:.LANCHOR56
+	add	x0, x0, x7
 	ldrh	w5, [x0, 48]
-	ldr	w7, [x0, 40]
-	ldr	x0, [x6, #:lo12:.LANCHOR159]
-	str	w7, [x0, x5, lsl 2]
-	b	.L3537
-.L3527:
-	lsl	x0, x26, 2
-	str	x0, [x29, 128]
-	ldr	x0, [x5, #:lo12:.LANCHOR158]
-	lsl	x1, x26, 2
-	ldr	w0, [x0, x1]
-	mov	w1, 1
-	str	w0, [x25, 40]
-	mov	x0, x25
-	bl	sblk_read_page
-	ldr	w0, [x25, 52]
-	cmp	w0, 512
-	ccmn	w0, #1, 4, ne
-	bne	.L3531
-	adrp	x0, .LANCHOR68
-	ldrh	w2, [x0, #:lo12:.LANCHOR68]
-	adrp	x0, .LANCHOR31
-	ldrb	w1, [x0, #:lo12:.LANCHOR31]
-	mov	w0, 24
-	sub	w0, w0, w1
-	sub	w1, w0, w2
-	mov	w0, 1
-	lsl	w0, w0, w1
-	ldr	w1, [x25, 40]
-	sub	w0, w0, #1
-	lsr	w1, w1, w2
-	and	w0, w0, w1
-	adrp	x1, .LANCHOR69
-	ldrb	w2, [x1, #:lo12:.LANCHOR69]
-	mov	x1, 0
+	ldr	w6, [x0, 40]
+	adrp	x0, .LANCHOR164
+	ldr	x0, [x0, #:lo12:.LANCHOR164]
+	str	w6, [x0, x5, lsl 2]
+	b	.L3765
+.L3733:
+	ldr	x2, [x29, 136]
+	ldrh	w0, [x28, #:lo12:.LANCHOR221]
+	ldrb	w28, [x2, #:lo12:.LANCHOR80]
+	mul	w28, w28, w6
+	lsl	w28, w28, 2
+	sub	w28, w28, w0
+	and	x0, x0, 65532
+	add	x1, x1, x0
+	ldr	x0, [x27, 8]
+	mov	w2, w28
+	bl	ftl_memcpy
+	adrp	x0, .LANCHOR131
+	mov	w1, 0
+	ldrb	w2, [x0, #:lo12:.LANCHOR131]
+	ldr	x0, [x27, 24]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	ldr	x6, [x27, 24]
+	mov	w0, 15555
+	movk	w0, 0xf55f, lsl 16
+	mov	w1, w28
+	str	w0, [x6]
+	ldr	x0, [x27, 8]
+	bl	js_hash
+	str	w0, [x6, 4]
+	ldr	x0, [x29, 144]
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	ldr	w0, [x0, 132]
+	str	w0, [x6, 8]
+	mov	w0, 1
+	str	w0, [x6, 12]
+	b	.L3734
+.L3732:
+	ldr	x0, [x29, 136]
+	ldrb	w2, [x0, #:lo12:.LANCHOR80]
+	ldr	x0, [x27, 8]
+	mul	w2, w2, w6
+	lsl	w2, w2, 2
+	bl	ftl_memcpy
+	ldr	x1, [x29, 136]
+	adrp	x0, .LANCHOR86
+	ldrh	w0, [x0, #:lo12:.LANCHOR86]
+	ldrb	w1, [x1, #:lo12:.LANCHOR80]
+	mul	w0, w0, w1
+	adrp	x1, .LANCHOR131
+	ldrb	w1, [x1, #:lo12:.LANCHOR131]
+	lsl	w2, w0, 2
+	cmp	w1, w0, lsr 6
+	bge	.L3735
+	adrp	x1, .LANCHOR221
+	ldrh	w1, [x1, #:lo12:.LANCHOR221]
+	sub	w2, w1, w2
+.L3735:
+	adrp	x1, .LANCHOR163
+	ldr	x5, [x27, 8]
+	ldr	x1, [x1, #:lo12:.LANCHOR163]
+	add	x0, x5, x0, sxtw 2
+	bl	ftl_memcpy
+	adrp	x0, .LANCHOR131
+	mov	w1, 0
+	ldrb	w2, [x0, #:lo12:.LANCHOR131]
+	ldr	x0, [x27, 24]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	ldr	x6, [x27, 24]
+	mov	w0, 15555
+	movk	w0, 0xf55f, lsl 16
+	str	w0, [x6]
+	adrp	x0, .LANCHOR86
+	ldrh	w1, [x0, #:lo12:.LANCHOR86]
+	ldr	x0, [x29, 136]
+	ldrb	w0, [x0, #:lo12:.LANCHOR80]
+	mul	w1, w1, w0
+	ldr	x0, [x27, 8]
+	lsl	w1, w1, 2
+	bl	js_hash
+	str	w0, [x6, 4]
+	ldr	x0, [x29, 144]
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	ldr	w0, [x0, 132]
+	str	w0, [x6, 8]
+	b	.L3734
+.L3730:
+	ldr	x0, [x29, 160]
+	mov	w1, 1
+	lsl	x28, x0, 2
+	adrp	x0, .LANCHOR163
+	ldr	x0, [x0, #:lo12:.LANCHOR163]
+	ldr	w0, [x0, x28]
+	str	w0, [x27, 40]
+	mov	x0, x27
+	bl	sblk_read_page
+	ldr	w0, [x27, 52]
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	bne	.L3737
+	adrp	x0, .LANCHOR75
+	ldrh	w2, [x0, #:lo12:.LANCHOR75]
+	adrp	x0, .LANCHOR32
+	ldrb	w1, [x0, #:lo12:.LANCHOR32]
+	mov	w0, 24
+	sub	w0, w0, w1
+	sub	w1, w0, w2
+	mov	w0, 1
+	lsl	w0, w0, w1
+	ldr	w1, [x27, 40]
+	sub	w0, w0, #1
+	lsr	w1, w1, w2
+	and	w0, w0, w1
+	adrp	x1, .LANCHOR76
+	ldrb	w2, [x1, #:lo12:.LANCHOR76]
+	mov	x1, 0
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
-	ldr	w0, [x25, 52]
+	ldr	w0, [x27, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3531
-	ldr	x0, [x25, 24]
+	bne	.L3737
+	ldr	x0, [x27, 24]
 	mov	w1, -1
 	str	w1, [x0, 4]
-	ldr	w0, [x25, 52]
+	ldr	w0, [x27, 52]
 	cmp	w0, 512
 	ccmp	w0, w1, 4, ne
-	bne	.L3531
-	adrp	x1, .LANCHOR225
+	bne	.L3737
+	adrp	x1, .LANCHOR234
 	adrp	x0, .LC0
-	mov	w2, 1007
-	add	x1, x1, :lo12:.LANCHOR225
+	mov	w2, 1223
+	add	x1, x1, :lo12:.LANCHOR234
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3531:
-	ldr	x0, [x25, 24]
-	adrp	x1, .LANCHOR123
-	ldr	w1, [x1, #:lo12:.LANCHOR123]
+.L3737:
+	ldr	x0, [x27, 24]
+	adrp	x1, .LANCHOR128
+	ldr	w1, [x1, #:lo12:.LANCHOR128]
 	ldr	w2, [x0, 4]
 	cmp	w2, w1
-	bcc	.L3532
+	bcc	.L3738
 	mov	w1, -1
 	str	w1, [x0, 4]
-.L3532:
-	adrp	x1, .LANCHOR157
-	lsl	x3, x26, 2
+.L3738:
+	adrp	x1, .LANCHOR162
 	ldr	w2, [x0, 4]
-	ldr	x1, [x1, #:lo12:.LANCHOR157]
-	str	w2, [x1, x3]
-	ldr	w1, [x25, 40]
+	ldr	x1, [x1, #:lo12:.LANCHOR162]
+	str	w2, [x1, x28]
+	ldr	w1, [x27, 40]
 	str	w1, [x0, 8]
-	b	.L3525
-.L3534:
+	b	.L3734
+.L3740:
+	udiv	w0, w24, w0
+	adrp	x7, .LANCHOR37
+	ldrb	w7, [x7, #:lo12:.LANCHOR37]
+	cbz	w7, .L3743
+	add	w7, w0, w20
+	adrp	x8, .LANCHOR111
+	add	x7, x26, x7, sxtw 1
+	add	w0, w0, w0, lsl 1
+	ldrh	w8, [x8, #:lo12:.LANCHOR111]
+	sub	w0, w24, w0
+	ldrh	w7, [x7, 16]
+	madd	w7, w7, w8, w25
+	add	w0, w7, w0, uxth
+.L3838:
+	str	w0, [x6, 40]
+	ldr	x0, [x29, 104]
+	add	x5, x0, x5, lsl 6
+	adrp	x0, .LANCHOR164
+	ldr	x6, [x0, #:lo12:.LANCHOR164]
+	mov	w0, 3
+	ldrh	w7, [x5, 48]
 	udiv	w0, w24, w0
-	ldrh	w11, [x12, #:lo12:.LANCHOR105]
-	ldr	x6, [x6, #:lo12:.LANCHOR159]
-	add	w5, w0, w20
+	ldr	w5, [x5, 40]
 	add	w0, w0, w0, lsl 1
-	add	x5, x21, x5, sxtw 1
 	sub	w0, w24, w0
 	and	w0, w0, 65535
 	add	w0, w0, 1
-	ldrh	w5, [x5, 16]
-	mul	w5, w5, w11
-	orr	w5, w5, w27
-	str	w5, [x7, 40]
-	ldrh	w7, [x7, 48]
 	orr	w0, w5, w0, lsl 24
 	str	w0, [x6, x7, lsl 2]
-.L3537:
-	ldrb	w0, [x4, #:lo12:.LANCHOR118]
-	cbz	w0, .L3540
-	adrp	x0, .LANCHOR226
-	add	x0, x0, :lo12:.LANCHOR226
-	ldrh	w0, [x0, w27, sxtw 1]
-	cmp	w0, w27
-	bcs	.L3540
-	tbz	x24, 0, .L3540
+.L3765:
+	adrp	x0, .LANCHOR124
+	ldrb	w0, [x0, #:lo12:.LANCHOR124]
+	cbz	w0, .L3747
+	adrp	x0, .LANCHOR235
+	add	x0, x0, :lo12:.LANCHOR235
+	ldrh	w0, [x0, w25, sxtw 1]
+	cmp	w0, w25
+	bcs	.L3747
+	tbz	x24, 0, .L3747
+	ldr	x3, [x29, 160]
 	mov	w0, -1
-	strb	w0, [x3, x26]
-	ldrb	w0, [x21, 9]
-	ldr	x1, [x1, x2, lsl 3]
-	ubfiz	w0, w0, 1, 15
-	ldrb	w2, [x1, 1]
-	msub	w0, w19, w0, w28
-	and	w0, w0, 65535
-	strh	w0, [x1, 48]
-	adrp	x1, .LANCHOR76
-	and	x0, x0, 65535
-	ldr	x1, [x1, #:lo12:.LANCHOR76]
-	strb	w2, [x1, x0]
-	adrp	x0, .LANCHOR158
+	strb	w0, [x1, x3]
+	ldrh	w1, [x29, 128]
+	ldr	x0, [x4, x2, lsl 3]
+	ldr	x2, [x29, 112]
+	strh	w1, [x0, 48]
+	ldrb	w1, [x0, 1]
+	adrp	x0, .LANCHOR83
+	ldr	x0, [x0, #:lo12:.LANCHOR83]
+	strb	w1, [x0, x2]
+	adrp	x0, .LANCHOR163
+	ldr	w2, [x29, 172]
 	mov	w1, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR158]
-	str	w1, [x0, x26, lsl 2]
-.L3540:
-	ldr	w0, [x29, 136]
+	ldr	x0, [x0, #:lo12:.LANCHOR163]
+	str	w1, [x0, w2, sxtw 2]
+.L3747:
+	ldr	w0, [x29, 152]
 	add	w0, w0, 1
-	str	w0, [x29, 136]
-	b	.L3524
-.L3533:
+	str	w0, [x29, 152]
+	b	.L3724
+.L3743:
+	add	w0, w0, w20
+	adrp	x7, .LANCHOR111
+	add	x0, x26, x0, sxtw 1
+	ldrh	w7, [x7, #:lo12:.LANCHOR111]
+	ldrh	w0, [x0, 16]
+	madd	w0, w0, w7, w25
+	b	.L3838
+.L3739:
 	cmp	w0, 2
-	bne	.L3539
-	adrp	x0, .LANCHOR74
-	adrp	x12, .LANCHOR105
-	ldrb	w0, [x0, #:lo12:.LANCHOR74]
-	cbnz	w0, .L3538
-	ldr	w0, [x29, 140]
-	ldrh	w12, [x12, #:lo12:.LANCHOR105]
-	add	w25, w20, w0
-	add	x25, x21, x25, sxtw 1
-	ldrh	w0, [x25, 16]
-	madd	w0, w0, w12, w27
-.L3634:
+	bne	.L3746
+	adrp	x0, .LANCHOR81
+	adrp	x5, .LANCHOR111
+	ldrb	w0, [x0, #:lo12:.LANCHOR81]
+	cbnz	w0, .L3745
+	ldr	w0, [x29, 168]
+	ldrh	w5, [x5, #:lo12:.LANCHOR111]
+	add	w27, w20, w0
+	add	x27, x26, x27, sxtw 1
+	ldrh	w0, [x27, 16]
+	madd	w0, w0, w5, w25
+.L3835:
 	orr	w0, w0, 33554432
-	str	w0, [x7, 40]
-	b	.L3539
-.L3538:
+	str	w0, [x6, 40]
+	b	.L3746
+.L3745:
 	add	w0, w20, w24, lsr 1
-	ldrh	w12, [x12, #:lo12:.LANCHOR105]
-	add	x0, x21, x0, sxtw 1
+	ldrh	w5, [x5, #:lo12:.LANCHOR111]
+	add	x0, x26, x0, sxtw 1
 	ldrh	w0, [x0, 16]
-	madd	w0, w0, w12, w27
-	and	w12, w24, 1
-	add	w0, w0, w12
-	b	.L3634
-.L3545:
-	ldr	x4, [x0, w2, sxtw 3]
-	add	w2, w2, 1
-	ldr	x5, [x0, w2, sxtw 3]
-	and	w2, w2, 65535
+	madd	w0, w0, w5, w25
+	and	w5, w24, 1
+	add	w0, w0, w5
+	b	.L3835
+.L3752:
+	ldr	x4, [x0, w1, sxtw 3]
+	add	w1, w1, 1
+	ldr	x5, [x0, w1, sxtw 3]
+	and	w1, w1, 65535
 	ldrb	w5, [x5, 1]
 	strb	w5, [x4]
-	b	.L3544
-.L3543:
-	adrp	x1, .LANCHOR77
-	ldrb	w3, [x1, #:lo12:.LANCHOR77]
-	ldr	x1, [x29, 144]
-	cbz	w3, .L3547
-.L3550:
+	b	.L3751
+.L3750:
+	adrp	x1, .LANCHOR84
+	ldrb	w2, [x1, #:lo12:.LANCHOR84]
+	ldr	x1, [x29, 176]
+	cbz	w2, .L3754
+.L3757:
 	strb	wzr, [x1, 60]
-	b	.L3549
-.L3547:
-	cmp	w22, 1
-	bne	.L3548
-	mov	w3, 9
-.L3635:
-	strb	w3, [x1, 60]
-.L3549:
+	b	.L3756
+.L3754:
+	cmp	w23, 1
+	bne	.L3755
+	mov	w2, 9
+.L3836:
+	strb	w2, [x1, 60]
+.L3756:
+	mov	w2, w21
 	add	x1, x0, 24
 	bl	sblk_xlc_prog_pages
-.L3546:
-	adrp	x0, .LANCHOR77
-	ldrb	w0, [x0, #:lo12:.LANCHOR77]
-	cbz	w0, .L3555
-	ldrb	w19, [x21, 9]
-	add	w19, w19, w19, lsl 1
-	and	w19, w19, 1023
-.L3556:
-	adrp	x0, .LANCHOR104
-	add	x23, x23, :lo12:.LANCHOR64
-	ldr	x1, [x0, #:lo12:.LANCHOR104]
+.L3753:
+	adrp	x0, .LANCHOR84
+	ldrb	w0, [x0, #:lo12:.LANCHOR84]
+	cbz	w0, .L3762
+	add	w21, w21, w21, lsl 1
+	and	w21, w21, 65535
+.L3763:
+	adrp	x0, .LANCHOR110
+	ldr	x1, [x0, #:lo12:.LANCHOR110]
 	ldr	w0, [x1, 52]
-	add	w0, w0, w19
+	add	w0, w0, w21
 	str	w0, [x1, 52]
-	ldrh	w0, [x23, 570]
-	add	w19, w19, w0
-	adrp	x0, .LANCHOR79
-	and	w19, w19, 65535
-	strh	w19, [x23, 570]
-	ldrh	w0, [x0, #:lo12:.LANCHOR79]
-	ldrb	w1, [x21, 9]
+	adrp	x0, .LANCHOR71
+	add	x25, x0, :lo12:.LANCHOR71
+	ldrh	w0, [x25, 2106]
+	add	w21, w21, w0
+	adrp	x0, .LANCHOR86
+	and	w21, w21, 65535
+	strh	w21, [x25, 2106]
+	ldrh	w0, [x0, #:lo12:.LANCHOR86]
+	ldrb	w1, [x26, 9]
 	mul	w0, w0, w1
-	cmp	w19, w0
-	blt	.L3559
-	ldr	x0, [x29, 120]
+	cmp	w21, w0
+	blt	.L3764
+	ldr	x0, [x29, 144]
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	strh	wzr, [x0, 86]
-.L3559:
+.L3764:
 	bl	gc_write_completed
-	b	.L3499
-.L3548:
-	cmp	w22, 2
-	bne	.L3550
-	mov	w3, 13
-	b	.L3635
-.L3542:
-	adrp	x3, .LANCHOR74
-	ldrb	w3, [x3, #:lo12:.LANCHOR74]
-	cbz	w3, .L3568
-	adrp	x3, .LANCHOR75
-	ldrb	w3, [x3, #:lo12:.LANCHOR75]
-	cbnz	w3, .L3552
-.L3568:
-	sub	w3, w1, #1
-	mov	w2, 0
-.L3553:
-	cmp	w2, w3
-	bge	.L3636
-	ldr	x4, [x0, w2, sxtw 3]
-	add	w2, w2, 1
-	ldr	x5, [x0, w2, sxtw 3]
-	and	w2, w2, 65535
+	b	.L3701
+.L3755:
+	cmp	w23, 2
+	bne	.L3757
+	mov	w2, 13
+	b	.L3836
+.L3749:
+	adrp	x1, .LANCHOR81
+	ldrb	w1, [x1, #:lo12:.LANCHOR81]
+	cbz	w1, .L3775
+	adrp	x1, .LANCHOR82
+	ldrb	w1, [x1, #:lo12:.LANCHOR82]
+	cbnz	w1, .L3759
+.L3758:
+	ldr	w2, [x29, 156]
+	sub	w2, w2, #1
+.L3760:
+	cmp	w1, w2
+	bge	.L3837
+	ldr	x4, [x0, w1, sxtw 3]
+	add	w1, w1, 1
+	ldr	x5, [x0, w1, sxtw 3]
+	and	w1, w1, 65535
 	ldrb	w5, [x5, 1]
 	strb	w5, [x4]
-	b	.L3553
-.L3552:
-	mov	w1, w2
+	b	.L3760
+.L3775:
+	mov	w1, 0
+	b	.L3758
+.L3759:
+	mov	w1, w21
 	bl	sblk_3d_mlc_prog_pages
-	b	.L3546
-.L3555:
-	adrp	x0, .LANCHOR74
-	ldrb	w0, [x0, #:lo12:.LANCHOR74]
-	cbz	w0, .L3557
-	ldrb	w19, [x21, 9]
-	ubfiz	w19, w19, 1, 8
-	b	.L3556
-.L3557:
-	adrp	x0, .LANCHOR35
-	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbz	w0, .L3558
-	adrp	x0, .LANCHOR118
-	ldrb	w1, [x21, 9]
-	ldrb	w0, [x0, #:lo12:.LANCHOR118]
-	mul	w19, w1, w19
-	cbz	w0, .L3556
-	adrp	x0, .LANCHOR226
-	add	x0, x0, :lo12:.LANCHOR226
-	ldrh	w0, [x0, w27, sxtw 1]
-	cmp	w0, w27
-	csel	w19, w19, w1, cs
-	b	.L3556
-.L3558:
-	ldrb	w19, [x21, 9]
-	b	.L3556
+	b	.L3753
+.L3762:
+	adrp	x0, .LANCHOR81
+	ldrb	w0, [x0, #:lo12:.LANCHOR81]
+	cbnz	w0, .L3776
+	adrp	x0, .LANCHOR36
+	ldrb	w0, [x0, #:lo12:.LANCHOR36]
+	cbz	w0, .L3763
+	adrp	x0, .LANCHOR124
+	ldrh	w1, [x29, 156]
+	ldrb	w0, [x0, #:lo12:.LANCHOR124]
+	cbz	w0, .L3777
+	adrp	x0, .LANCHOR235
+	add	x0, x0, :lo12:.LANCHOR235
+	ldrh	w0, [x0, w25, sxtw 1]
+	cmp	w0, w25
+	csel	w21, w21, w1, cc
+	b	.L3763
+.L3776:
+	ldr	w21, [x29, 132]
+	b	.L3763
+.L3777:
+	mov	w21, w1
+	b	.L3763
 	.size	gc_do_copy_back, .-gc_do_copy_back
 	.section	.text.zftl_do_gc,"ax",@progbits
 	.align	2
 	.global	zftl_do_gc
 	.type	zftl_do_gc, %function
 zftl_do_gc:
-	sub	sp, sp, #128
-	adrp	x1, .LANCHOR101
+	sub	sp, sp, #144
+	adrp	x1, .LANCHOR107
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
+	stp	x23, x24, [sp, 64]
+	adrp	x24, .LANCHOR103
 	stp	x19, x20, [sp, 32]
-	adrp	x19, .LANCHOR155
+	adrp	x19, .LANCHOR159
 	stp	x21, x22, [sp, 48]
-	ldrh	w22, [x1, #:lo12:.LANCHOR101]
-	adrp	x1, .LANCHOR97
-	stp	x23, x24, [sp, 64]
 	adrp	x23, .LANCHOR10
-	ldrh	w21, [x1, #:lo12:.LANCHOR97]
+	ldrh	w22, [x1, #:lo12:.LANCHOR107]
 	stp	x25, x26, [sp, 80]
-	ldrb	w1, [x19, #:lo12:.LANCHOR155]
-	add	w21, w22, w21
+	ldrh	w21, [x24, #:lo12:.LANCHOR103]
+	ldrb	w1, [x19, #:lo12:.LANCHOR159]
 	stp	x27, x28, [sp, 96]
-	ldr	x20, [x23, #:lo12:.LANCHOR10]
+	add	w21, w22, w21
+	ldr	x26, [x23, #:lo12:.LANCHOR10]
 	cmp	w1, 6
-	bhi	.L3747
+	bhi	.L3954
 	mov	w25, w0
 	and	w21, w21, 65535
-	adrp	x0, .L3640
-	add	x0, x0, :lo12:.L3640
+	adrp	x0, .L3842
+	add	x0, x0, :lo12:.L3842
 	ldrh	w0, [x0,w1,uxtw #1]
-	adr	x1, .Lrtx3640
+	adr	x1, .Lrtx3842
 	add	x0, x1, w0, sxth #2
 	br	x0
-.Lrtx3640:
+.Lrtx3842:
 	.section	.rodata.zftl_do_gc,"a",@progbits
 	.align	0
 	.align	2
-.L3640:
-	.2byte	(.L3639 - .Lrtx3640) / 4
-	.2byte	(.L3641 - .Lrtx3640) / 4
-	.2byte	(.L3642 - .Lrtx3640) / 4
-	.2byte	(.L3643 - .Lrtx3640) / 4
-	.2byte	(.L3644 - .Lrtx3640) / 4
-	.2byte	(.L3645 - .Lrtx3640) / 4
-	.2byte	(.L3646 - .Lrtx3640) / 4
+.L3842:
+	.2byte	(.L3841 - .Lrtx3842) / 4
+	.2byte	(.L3843 - .Lrtx3842) / 4
+	.2byte	(.L3844 - .Lrtx3842) / 4
+	.2byte	(.L3845 - .Lrtx3842) / 4
+	.2byte	(.L3846 - .Lrtx3842) / 4
+	.2byte	(.L3847 - .Lrtx3842) / 4
+	.2byte	(.L3848 - .Lrtx3842) / 4
 	.section	.text.zftl_do_gc
-.L3645:
-	adrp	x20, .LANCHOR64
-	add	x24, x20, :lo12:.LANCHOR64
+.L3847:
+	adrp	x20, .LANCHOR71
+	add	x24, x20, :lo12:.LANCHOR71
 	mov	w22, 0
-.L3647:
+.L3849:
 	bl	gc_check_data_one_wl
-	cbz	w0, .L3743
+	cbz	w0, .L3950
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
-	add	x20, x20, :lo12:.LANCHOR64
+	add	x20, x20, :lo12:.LANCHOR71
 	strh	wzr, [x20, 56]
 	ldrh	w0, [x0, 80]
 	bl	ftl_free_sblk
-	adrp	x2, .LANCHOR104
+	adrp	x2, .LANCHOR110
 	ldr	x1, [x23, #:lo12:.LANCHOR10]
 	mov	w0, -1
-	ldr	x2, [x2, #:lo12:.LANCHOR104]
+	ldr	x2, [x2, #:lo12:.LANCHOR110]
 	strh	w0, [x1, 80]
 	strh	w0, [x2, 126]
 	strh	w0, [x1, 130]
 	ldr	x0, [x20, 8]
 	bl	zbuf_free
-	strb	wzr, [x19, #:lo12:.LANCHOR155]
+	strb	wzr, [x19, #:lo12:.LANCHOR159]
 	str	xzr, [x20, 8]
-	b	.L3817
-.L3639:
-	adrp	x0, .LANCHOR99
-	adrp	x27, .LANCHOR92
-	ldrh	w2, [x20, 80]
-	ldrh	w0, [x0, #:lo12:.LANCHOR99]
-	ldrh	w24, [x27, #:lo12:.LANCHOR92]
+	b	.L4034
+.L3841:
+	adrp	x0, .LANCHOR105
+	adrp	x27, .LANCHOR97
+	ldrh	w2, [x26, 80]
+	ldrh	w0, [x0, #:lo12:.LANCHOR105]
+	ldrh	w24, [x27, #:lo12:.LANCHOR97]
 	add	w22, w22, w0
-	adrp	x0, .LANCHOR90
-	str	x0, [x29, 104]
+	adrp	x0, .LANCHOR99
+	stp	x0, x27, [x29, 112]
 	and	w22, w22, 65535
-	ldrh	w1, [x0, #:lo12:.LANCHOR90]
+	ldrh	w1, [x0, #:lo12:.LANCHOR99]
 	add	w24, w24, w1
 	mov	w1, 65535
 	and	w24, w24, 65535
 	cmp	w2, w1
-	beq	.L3648
-	cbnz	w25, .L3649
-	adrp	x0, .LANCHOR81
-	ldrh	w0, [x0, #:lo12:.LANCHOR81]
+	beq	.L3850
+	cbnz	w25, .L3851
+	adrp	x0, .LANCHOR87
+	ldrh	w0, [x0, #:lo12:.LANCHOR87]
 	cmp	w21, w0, lsl 1
-	blt	.L3649
-.L3747:
+	blt	.L3851
+.L3954:
 	mov	w20, 16
-	b	.L3637
-.L3649:
-	adrp	x5, .LANCHOR89
+	b	.L3839
+.L3851:
+	adrp	x5, .LANCHOR96
 	mov	w1, 5
-	adrp	x25, .LANCHOR78
-	ldrh	w0, [x5, #:lo12:.LANCHOR89]
+	adrp	x25, .LANCHOR85
+	ldrh	w0, [x5, #:lo12:.LANCHOR96]
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	strh	w0, [x5, #:lo12:.LANCHOR89]
+	strh	w0, [x5, #:lo12:.LANCHOR96]
 	bl	zftl_get_gc_node
 	and	w3, w0, 65535
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L3650
+	beq	.L3852
 	adrp	x4, .LANCHOR9
 	ubfiz	x3, x3, 1, 16
-	adrp	x1, .LANCHOR156
-	mov	x26, x1
+	adrp	x1, .LANCHOR160
+	mov	x20, x1
 	ldr	x4, [x4, #:lo12:.LANCHOR9]
-	ldr	w2, [x1, #:lo12:.LANCHOR156]
+	ldr	w2, [x1, #:lo12:.LANCHOR160]
 	add	w2, w2, 1
-	str	w2, [x1, #:lo12:.LANCHOR156]
+	str	w2, [x1, #:lo12:.LANCHOR160]
 	ldrh	w3, [x4, x3]
-	adrp	x4, .LANCHOR87
-	ldrh	w4, [x4, #:lo12:.LANCHOR87]
+	adrp	x4, .LANCHOR95
+	ldrh	w4, [x4, #:lo12:.LANCHOR95]
 	cmp	w4, w3
-	bcs	.L3651
+	bcs	.L3853
 	adrp	x1, .LANCHOR6
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	cmp	w2, w1, lsr 4
-	bls	.L3650
-	adrp	x1, .LANCHOR93
-	ldrh	w1, [x1, #:lo12:.LANCHOR93]
+	bls	.L3852
+	adrp	x1, .LANCHOR100
+	ldrh	w1, [x1, #:lo12:.LANCHOR100]
 	cmp	w1, w3
-	bls	.L3650
-.L3651:
-	ldrb	w2, [x25, #:lo12:.LANCHOR78]
+	bls	.L3852
+.L3853:
+	ldrb	w2, [x25, #:lo12:.LANCHOR85]
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L3652
+	cbz	w0, .L3854
 	mov	w0, 1
-	str	wzr, [x26, #:lo12:.LANCHOR156]
-	strb	w0, [x19, #:lo12:.LANCHOR155]
-	b	.L3747
-.L3650:
-	strh	wzr, [x5, #:lo12:.LANCHOR89]
-.L3652:
+	str	wzr, [x20, #:lo12:.LANCHOR160]
+	strb	w0, [x19, #:lo12:.LANCHOR159]
+	b	.L3954
+.L3852:
+	strh	wzr, [x5, #:lo12:.LANCHOR96]
+.L3854:
 	cmp	w22, 15
-	bls	.L3749
-	adrp	x0, .LANCHOR94
-	ldrh	w1, [x0, #:lo12:.LANCHOR94]
-	adrp	x0, .LANCHOR95
-	ldrh	w0, [x0, #:lo12:.LANCHOR95]
+	bls	.L3956
+	adrp	x0, .LANCHOR93
+	ldrh	w1, [x0, #:lo12:.LANCHOR93]
+	adrp	x0, .LANCHOR101
+	ldrh	w0, [x0, #:lo12:.LANCHOR101]
 	cmp	w1, w0
-	bhi	.L3749
+	bhi	.L3956
 	cmp	w24, 0
-	cset	w24, eq
-	add	w24, w24, 1
-.L3653:
+	cset	w20, eq
+	add	w20, w20, 1
+.L3855:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3654
+	tbz	x0, 8, .L3856
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	mov	w4, w22
-	ldrb	w2, [x25, #:lo12:.LANCHOR78]
+	ldrb	w2, [x25, #:lo12:.LANCHOR85]
 	mov	w3, w21
-	mov	w1, 2175
+	mov	w1, 2662
 	ldrh	w7, [x0, 122]
 	ldrh	w6, [x0, 120]
 	ldrh	w5, [x0, 124]
-	ldrh	w0, [x20, 80]
+	ldrh	w0, [x26, 80]
 	str	w0, [sp]
-	adrp	x0, .LC241
-	add	x0, x0, :lo12:.LC241
+	adrp	x0, .LC236
+	add	x0, x0, :lo12:.LC236
 	bl	printf
-.L3654:
-	ldrb	w0, [x25, #:lo12:.LANCHOR78]
+.L3856:
+	ldrb	w0, [x25, #:lo12:.LANCHOR85]
 	mov	w2, 1
-	mov	w1, w24
+	mov	w1, w20
 	bl	gc_search_src_blk
 	cmp	w0, 0
-	ble	.L3655
-.L3656:
+	ble	.L3857
+.L3858:
 	mov	w0, 1
-.L3819:
-	strb	w0, [x19, #:lo12:.LANCHOR155]
-	b	.L3747
-.L3749:
-	mov	w24, 2
-	b	.L3653
-.L3655:
-	ldrb	w0, [x25, #:lo12:.LANCHOR78]
+.L4036:
+	strb	w0, [x19, #:lo12:.LANCHOR159]
+	b	.L3954
+.L3956:
+	mov	w20, 2
+	b	.L3855
+.L3857:
+	ldrb	w0, [x25, #:lo12:.LANCHOR85]
 	mov	w2, 1
 	mov	w1, 3
 	bl	gc_search_src_blk
 	cmp	w0, 0
-	bgt	.L3656
-	b	.L3747
-.L3648:
-	adrp	x28, .LANCHOR14
-	ldr	w0, [x28, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3658
-	adrp	x0, .LANCHOR78
-	ldrh	w7, [x20, 122]
-	ldrh	w6, [x20, 120]
-	mov	w4, w22
-	ldrh	w5, [x20, 124]
-	mov	w3, w21
-	ldrb	w2, [x0, #:lo12:.LANCHOR78]
-	mov	w1, 2187
-	str	w25, [sp]
-	adrp	x0, .LC241
-	add	x0, x0, :lo12:.LC241
-	bl	printf
-.L3658:
+	bgt	.L3858
+	b	.L3954
+.L3850:
 	cmp	w25, 1
-	bne	.L3659
+	bne	.L3860
 	bl	gc_scan_static_data
-	adrp	x26, .LANCHOR78
+	adrp	x26, .LANCHOR85
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	ldrh	w0, [x0, 122]
-	cbz	w0, .L3660
-.L3661:
+	cbz	w0, .L3861
+.L3862:
 	mov	w0, 1
-	strb	w0, [x26, #:lo12:.LANCHOR78]
-	b	.L3819
-.L3660:
+	strb	w0, [x26, #:lo12:.LANCHOR85]
+	b	.L4036
+.L3861:
 	bl	gc_static_wearleveling
 	mov	w20, w0
-	cbnz	w0, .L3661
-	cbnz	w22, .L3662
-.L3666:
+	cbnz	w0, .L3862
+	adrp	x27, .LANCHOR161
+	cbz	w22, .L3863
+	cmp	w21, w24
+	adrp	x1, .LANCHOR98
+	bcs	.L3864
+	ldrh	w0, [x1, #:lo12:.LANCHOR98]
+	cmp	w0, w21
+	bhi	.L3865
+.L3864:
+	ldrh	w1, [x1, #:lo12:.LANCHOR98]
+	add	w0, w21, w24
+	cmp	w0, w1
+	blt	.L3865
+	adrp	x0, .LANCHOR93
+	ldrh	w1, [x0, #:lo12:.LANCHOR93]
+	adrp	x0, .LANCHOR101
+	ldrh	w0, [x0, #:lo12:.LANCHOR101]
+	cmp	w1, w0
+	bcc	.L3863
+.L3865:
+	mov	w0, 1
+	strb	w0, [x26, #:lo12:.LANCHOR85]
+	mov	w0, 16
+	bl	zftl_get_gc_node.part.9
+	and	w1, w0, 65535
+	mov	w2, 65535
+	adrp	x28, .LANCHOR160
+	cmp	w1, w2
+	beq	.L3866
+	adrp	x2, .LANCHOR9
+	ubfiz	x1, x1, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR9]
+	ldrh	w2, [x2, x1]
+	ldrh	w1, [x27, #:lo12:.LANCHOR161]
+	cmp	w2, w1
+	bcs	.L3866
+	cmp	w21, 2
+	bls	.L3866
+	strb	wzr, [x26, #:lo12:.LANCHOR85]
+	mov	w2, 0
+	str	wzr, [x28, #:lo12:.LANCHOR160]
+	mov	w1, 1
+	bl	gc_add_sblk
+	cbnz	w0, .L3858
+.L3866:
+	mov	w1, 3
+	mov	w0, 0
+	bl	zftl_get_gc_node
+	and	w1, w0, 65535
+	mov	w2, 65535
+	cmp	w1, w2
+	beq	.L3867
+	adrp	x2, .LANCHOR9
+	ubfiz	x1, x1, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR9]
+	ldrh	w2, [x2, x1]
+	ldrh	w1, [x27, #:lo12:.LANCHOR161]
+	cmp	w2, w1
+	bcs	.L3867
+	cmp	w21, 2
+	bls	.L3867
+	strb	wzr, [x26, #:lo12:.LANCHOR85]
+	mov	w2, 0
+	str	wzr, [x28, #:lo12:.LANCHOR160]
+	mov	w1, 1
+	bl	gc_add_sblk
+	cbnz	w0, .L3858
+.L3867:
+	ldrh	w0, [x27, #:lo12:.LANCHOR161]
+	adrp	x1, .LANCHOR95
+	add	w0, w0, 1
+	ldrh	w5, [x1, #:lo12:.LANCHOR95]
+	and	w0, w0, 65535
+	strh	w0, [x27, #:lo12:.LANCHOR161]
+	cmp	w0, w5, lsr 5
+	bls	.L3868
+	mov	w0, 4
+	strh	w0, [x27, #:lo12:.LANCHOR161]
+.L3868:
+	adrp	x1, .LANCHOR90
+	ldr	w0, [x28, #:lo12:.LANCHOR160]
+	strh	wzr, [x1, #:lo12:.LANCHOR90]
+	adrp	x1, .LANCHOR91
+	add	w0, w0, 1
+	str	w0, [x28, #:lo12:.LANCHOR160]
+	strh	wzr, [x1, #:lo12:.LANCHOR91]
+	adrp	x1, .LANCHOR92
+	strh	wzr, [x1, #:lo12:.LANCHOR92]
+	adrp	x1, .LANCHOR6
+	ldrh	w1, [x1, #:lo12:.LANCHOR6]
+	cmp	w0, w1, lsr 5
+	adrp	x0, .LANCHOR93
+	bls	.L3869
+	ldrh	w1, [x0, #:lo12:.LANCHOR93]
+	cmp	w1, w22
+	bls	.L3869
+	mov	w1, 5
+	mov	w0, 0
+	bl	zftl_get_gc_node
+	and	w0, w0, 65535
+	mov	w1, 65535
+	cmp	w0, w1
+	bne	.L3870
+.L4024:
 	mov	w20, 16
-.L3663:
+.L3871:
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
-	adrp	x3, .LANCHOR78
+	adrp	x28, .LANCHOR85
 	mov	w1, 1
-	mov	x23, x3
-	strb	w1, [x3, #:lo12:.LANCHOR78]
-	ldrh	w5, [x0, 124]
-	cbz	w5, .L3671
-	strb	w1, [x19, #:lo12:.LANCHOR155]
-	ldr	w1, [x28, #:lo12:.LANCHOR14]
-	strb	wzr, [x3, #:lo12:.LANCHOR78]
-	tbz	x1, 8, .L3637
-	ldrh	w7, [x0, 122]
-	mov	w4, w22
-	ldrh	w6, [x0, 120]
-	mov	w3, w21
-	adrp	x0, .LC242
-	mov	w2, 0
-	mov	w1, 2277
-	add	x0, x0, :lo12:.LC242
-	bl	printf
-.L3637:
+	mov	x23, x28
+	strb	w1, [x28, #:lo12:.LANCHOR85]
+	ldrh	w0, [x0, 124]
+	cbz	w0, .L3876
+	strb	wzr, [x28, #:lo12:.LANCHOR85]
+	strb	w1, [x19, #:lo12:.LANCHOR159]
+.L3839:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
@@ -23250,223 +24623,200 @@ zftl_do_gc:
 	ldp	x25, x26, [sp, 80]
 	ldp	x27, x28, [sp, 96]
 	ldp	x29, x30, [sp, 16]
-	add	sp, sp, 128
+	add	sp, sp, 144
 	ret
-.L3662:
-	cmp	w21, w24
-	adrp	x1, .LANCHOR94
-	adrp	x2, .LANCHOR91
-	bcs	.L3664
-	ldrh	w0, [x2, #:lo12:.LANCHOR91]
-	cmp	w0, w21
-	bhi	.L3665
-.L3664:
-	ldrh	w2, [x2, #:lo12:.LANCHOR91]
-	add	w0, w21, w24
-	cmp	w0, w2
-	blt	.L3665
-	adrp	x0, .LANCHOR95
-	ldrh	w2, [x1, #:lo12:.LANCHOR94]
-	ldrh	w0, [x0, #:lo12:.LANCHOR95]
-	cmp	w2, w0
-	bcc	.L3666
-.L3665:
-	adrp	x5, .LANCHOR156
-	adrp	x2, .LANCHOR6
-	mov	w6, 1
-	strb	w6, [x26, #:lo12:.LANCHOR78]
-	ldr	w0, [x5, #:lo12:.LANCHOR156]
-	ldrh	w2, [x2, #:lo12:.LANCHOR6]
-	add	w0, w0, 1
-	str	w0, [x5, #:lo12:.LANCHOR156]
-	cmp	w0, w2, lsr 5
-	bls	.L3667
-	ldrh	w0, [x1, #:lo12:.LANCHOR94]
-	cmp	w0, w22
-	bls	.L3667
-	mov	w1, 5
-	mov	w0, 0
-	bl	zftl_get_gc_node
-	and	w0, w0, 65535
-	mov	w1, 65535
-	cmp	w0, w1
-	beq	.L3666
+.L3870:
 	adrp	x1, .LANCHOR9
 	ubfiz	x0, x0, 1, 16
-	adrp	x2, .LANCHOR80
 	ldr	x1, [x1, #:lo12:.LANCHOR9]
-	ldrb	w2, [x2, #:lo12:.LANCHOR80]
 	ldrh	w1, [x1, x0]
-	adrp	x0, .LANCHOR87
-	ldrh	w0, [x0, #:lo12:.LANCHOR87]
-	mul	w0, w0, w2
+	adrp	x0, .LANCHOR80
+	ldrb	w0, [x0, #:lo12:.LANCHOR80]
+	mul	w0, w0, w5
 	cmp	w1, w0
-	bgt	.L3666
-	mov	w0, w6
-	str	wzr, [x5, #:lo12:.LANCHOR156]
+	bgt	.L4024
+	str	wzr, [x28, #:lo12:.LANCHOR160]
 	mov	w2, 4
+.L4031:
 	mov	w1, 2
-.L3807:
+.L4023:
+	ldrb	w0, [x26, #:lo12:.LANCHOR85]
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-	cbz	w0, .L3666
-	b	.L3656
-.L3667:
-	adrp	x0, .LANCHOR95
-	ldrh	w1, [x1, #:lo12:.LANCHOR94]
-	ldrh	w0, [x0, #:lo12:.LANCHOR95]
+	cbz	w0, .L4024
+	b	.L3858
+.L3869:
+	ldrh	w1, [x0, #:lo12:.LANCHOR93]
+	adrp	x0, .LANCHOR101
+	ldrh	w0, [x0, #:lo12:.LANCHOR101]
 	cmp	w1, w0
-	bcc	.L3669
+	bcc	.L3874
 	mov	w2, 1
-	mov	w1, 2
-	mov	w0, w2
-	b	.L3807
-.L3669:
-	ldrh	w0, [x27, #:lo12:.LANCHOR92]
-	cbnz	w0, .L3670
-	ldr	x0, [x29, 104]
-	ldrh	w0, [x0, #:lo12:.LANCHOR90]
+	b	.L4031
+.L3874:
+	ldr	x0, [x29, 120]
+	ldrh	w0, [x0, #:lo12:.LANCHOR97]
+	cbnz	w0, .L3875
+	ldr	x0, [x29, 112]
+	ldrh	w0, [x0, #:lo12:.LANCHOR99]
 	cmp	w0, 8
-	bls	.L3663
-.L3670:
-	mov	w1, 1
+	bls	.L3871
+.L3875:
 	mov	w2, 4
-	mov	w0, w1
-	b	.L3807
-.L3659:
-	adrp	x0, .LANCHOR81
-	ldrh	w0, [x0, #:lo12:.LANCHOR81]
+	mov	w1, 1
+	b	.L4023
+.L3863:
+	adrp	x0, .LANCHOR95
+	ldrh	w1, [x0, #:lo12:.LANCHOR95]
+	ldrh	w0, [x27, #:lo12:.LANCHOR161]
+	cmp	w0, w1, lsr 5
+	bcc	.L4024
+	mov	w0, 4
+	strh	w0, [x27, #:lo12:.LANCHOR161]
+	b	.L4024
+.L3860:
+	adrp	x0, .LANCHOR87
+	ldrh	w0, [x0, #:lo12:.LANCHOR87]
 	cmp	w0, w21
-	bcc	.L3747
-	b	.L3666
-.L3671:
-	adrp	x2, .LANCHOR81
-	mov	x26, x2
-	ldrh	w4, [x2, #:lo12:.LANCHOR81]
-	cmp	w21, w4
-	bcs	.L3672
-	cbz	w22, .L3673
+	bcs	.L4024
+	ldrh	w0, [x26, 124]
+	cbz	w0, .L3954
+	b	.L4024
+.L3876:
+	adrp	x0, .LANCHOR87
+	mov	x26, x0
+	ldrh	w2, [x0, #:lo12:.LANCHOR87]
+	cmp	w21, w2
+	bcs	.L3877
+	cbz	w22, .L3878
 	cmp	w22, 16
-	bls	.L3674
-	adrp	x0, .LANCHOR94
-	ldrh	w2, [x0, #:lo12:.LANCHOR94]
-	adrp	x0, .LANCHOR95
-	ldrh	w0, [x0, #:lo12:.LANCHOR95]
+	bls	.L3879
+	adrp	x0, .LANCHOR93
+	ldrh	w2, [x0, #:lo12:.LANCHOR93]
+	adrp	x0, .LANCHOR101
+	ldrh	w0, [x0, #:lo12:.LANCHOR101]
 	cmp	w2, w0
-	bhi	.L3674
-	str	x3, [x29, 104]
+	bhi	.L3879
 	mov	w2, 4
 	mov	w0, w1
 	bl	gc_search_src_blk
-	ldr	x3, [x29, 104]
 	tst	w0, 65535
-	bne	.L3675
-	ldrb	w0, [x3, #:lo12:.LANCHOR78]
+	bne	.L3880
+.L4027:
 	mov	w2, 4
 	mov	w1, 3
-.L3809:
-	bl	gc_search_src_blk
-	and	w0, w0, 65535
-.L3676:
-	cbnz	w0, .L3678
-	b	.L3637
-.L3675:
+	ldrb	w0, [x28, #:lo12:.LANCHOR85]
+	b	.L4026
+.L3880:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	and	w3, w0, 65535
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L3678
+	beq	.L3883
 	adrp	x4, .LANCHOR9
 	ubfiz	x3, x3, 1, 16
-	adrp	x1, .LANCHOR156
+	adrp	x1, .LANCHOR160
 	mov	x21, x1
 	ldr	x4, [x4, #:lo12:.LANCHOR9]
-	ldr	w2, [x1, #:lo12:.LANCHOR156]
+	ldr	w2, [x1, #:lo12:.LANCHOR160]
 	add	w2, w2, 1
-	str	w2, [x1, #:lo12:.LANCHOR156]
+	str	w2, [x1, #:lo12:.LANCHOR160]
 	ldrh	w3, [x4, x3]
-	adrp	x4, .LANCHOR87
-	ldrh	w4, [x4, #:lo12:.LANCHOR87]
+	adrp	x4, .LANCHOR95
+	ldrh	w4, [x4, #:lo12:.LANCHOR95]
 	cmp	w4, w3
-	bcs	.L3679
+	bcs	.L3884
 	adrp	x1, .LANCHOR6
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	cmp	w2, w1, lsr 4
-	bls	.L3678
-	adrp	x1, .LANCHOR93
-	ldrh	w1, [x1, #:lo12:.LANCHOR93]
+	bls	.L3883
+	adrp	x1, .LANCHOR100
+	ldrh	w1, [x1, #:lo12:.LANCHOR100]
 	cmp	w1, w3
-	bls	.L3678
-.L3679:
-	ldrb	w2, [x23, #:lo12:.LANCHOR78]
+	bls	.L3883
+.L3884:
+	ldrb	w2, [x23, #:lo12:.LANCHOR85]
 	mov	w1, 0
 	bl	gc_add_sblk
-	str	wzr, [x21, #:lo12:.LANCHOR156]
-	adrp	x0, .LANCHOR116
+	str	wzr, [x21, #:lo12:.LANCHOR160]
+	adrp	x0, .LANCHOR122
 	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR116]
-.L3678:
+	str	w1, [x0, #:lo12:.LANCHOR122]
+.L3883:
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR155]
-	b	.L3637
-.L3674:
+	strb	w0, [x19, #:lo12:.LANCHOR159]
+	b	.L3839
+.L3879:
 	mov	w2, 1
-	mov	w0, w2
 	mov	w1, 2
-.L3816:
+	mov	w0, w2
 	bl	gc_search_src_blk
 	tst	w0, 65535
-	bne	.L3678
-	mov	w2, 2
-.L3812:
+	bne	.L3883
+	ldrb	w0, [x23, #:lo12:.LANCHOR85]
+	mov	w2, 4
 	mov	w1, 3
-	ldrb	w0, [x23, #:lo12:.LANCHOR78]
-	b	.L3809
-.L3673:
-	ldr	w1, [x28, #:lo12:.LANCHOR14]
-	strb	wzr, [x3, #:lo12:.LANCHOR78]
-	tbz	x1, 8, .L3681
-	ldrh	w7, [x0, 122]
-	mov	w5, 0
-	ldrh	w6, [x0, 120]
-	mov	w4, 0
-	adrp	x0, .LC242
-	mov	w3, w21
-	mov	w2, 0
-	mov	w1, 2307
-	add	x0, x0, :lo12:.LC242
-	bl	printf
-.L3681:
+.L4026:
+	bl	gc_search_src_blk
+	and	w0, w0, 65535
+.L3881:
+	cbnz	w0, .L3883
+	b	.L3839
+.L3878:
+	strb	wzr, [x28, #:lo12:.LANCHOR85]
 	cmp	w21, 16
-	bls	.L3682
+	bls	.L3886
 	mov	w2, 4
-	b	.L3812
-.L3682:
-	mov	w2, 1
-	ldrb	w0, [x23, #:lo12:.LANCHOR78]
-	mov	w1, w2
-	b	.L3816
-.L3672:
+	mov	w1, 3
+	mov	w0, 0
+	b	.L4026
+.L3886:
+	mov	w2, w1
+	mov	w0, 0
+	bl	gc_search_src_blk
+	tst	w0, 65535
+	bne	.L3883
+	b	.L4027
+.L3877:
 	cmp	w25, 1
-	bne	.L3637
-	cmp	w21, w4, lsl 1
-	bge	.L3683
+	bne	.L3839
+	cmp	w21, w2, lsl 1
+	bge	.L3887
 	cmp	w24, w22, lsr 1
-	bcs	.L3684
-	adrp	x0, .LANCHOR94
-	ldrh	w1, [x0, #:lo12:.LANCHOR94]
-	adrp	x0, .LANCHOR95
-	ldrh	w0, [x0, #:lo12:.LANCHOR95]
-	cmp	w1, w0
-	bcs	.L3684
-	adrp	x0, .LANCHOR91
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
-	lsr	w0, w0, 2
-	strh	w0, [x2, #:lo12:.LANCHOR81]
-	b	.L3637
-.L3684:
+	bcs	.L3888
+	adrp	x1, .LANCHOR93
+	ldrh	w2, [x1, #:lo12:.LANCHOR93]
+	adrp	x1, .LANCHOR101
+	ldrh	w1, [x1, #:lo12:.LANCHOR101]
+	cmp	w2, w1
+	bcs	.L3888
+	adrp	x1, .LANCHOR98
+	ldrh	w1, [x1, #:lo12:.LANCHOR98]
+	lsr	w1, w1, 2
+	strh	w1, [x0, #:lo12:.LANCHOR87]
+	b	.L3839
+.L3888:
+	mov	w0, 8
+	bl	zftl_get_gc_node.part.9
+	and	w1, w0, 65535
+	mov	w2, 65535
+	cmp	w1, w2
+	beq	.L3889
+	adrp	x2, .LANCHOR9
+	ubfiz	x1, x1, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR9]
+	ldrh	w1, [x2, x1]
+	cmp	w1, 3
+	bhi	.L3889
+	cbz	w21, .L3889
+	strb	wzr, [x23, #:lo12:.LANCHOR85]
+	mov	w2, 0
+	mov	w1, 1
+	bl	gc_add_sblk
+	cbnz	w0, .L3883
+.L3889:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
@@ -23474,451 +24824,455 @@ zftl_do_gc:
 	mov	w1, 65535
 	mov	w28, w25
 	cmp	w25, w1
-	bne	.L3685
-.L3690:
+	bne	.L3890
+.L3895:
 	cmp	w22, 1
-	bhi	.L3686
-.L3687:
+	bhi	.L3891
+.L3892:
 	cmp	w21, w24
-	adrp	x21, .LANCHOR91
-	bcs	.L3694
-	strb	wzr, [x23, #:lo12:.LANCHOR78]
+	adrp	x21, .LANCHOR98
+	bcs	.L3899
+	strb	wzr, [x23, #:lo12:.LANCHOR85]
 	mov	w0, 4
 	bl	zftl_get_gc_node.part.9
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3694
+	beq	.L3899
 	adrp	x1, .LANCHOR9
 	ubfiz	x0, x0, 1, 16
 	adrp	x2, .LANCHOR80
 	ldr	x1, [x1, #:lo12:.LANCHOR9]
 	ldrb	w2, [x2, #:lo12:.LANCHOR80]
 	ldrh	w1, [x1, x0]
-	adrp	x0, .LANCHOR87
-	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	adrp	x0, .LANCHOR95
+	ldrh	w0, [x0, #:lo12:.LANCHOR95]
 	mul	w0, w0, w2
 	cmp	w1, w0, lsr 1
-	ble	.L3696
-.L3694:
-	ldrh	w0, [x21, #:lo12:.LANCHOR91]
+	ble	.L3901
+.L3899:
+	ldrh	w0, [x21, #:lo12:.LANCHOR98]
 	lsr	w0, w0, 2
-	strh	w0, [x26, #:lo12:.LANCHOR81]
-	b	.L3637
-.L3685:
-	adrp	x2, .LANCHOR156
+	strh	w0, [x26, #:lo12:.LANCHOR87]
+	b	.L3839
+.L3890:
+	adrp	x2, .LANCHOR160
 	adrp	x3, .LANCHOR6
 	uxtw	x25, w25
-	ldr	w1, [x2, #:lo12:.LANCHOR156]
+	ldr	w1, [x2, #:lo12:.LANCHOR160]
 	ldrh	w3, [x3, #:lo12:.LANCHOR6]
 	add	w1, w1, 1
-	str	w1, [x2, #:lo12:.LANCHOR156]
+	str	w1, [x2, #:lo12:.LANCHOR160]
 	cmp	w1, w3, lsr 4
 	adrp	x3, .LANCHOR9
-	bls	.L3688
+	bls	.L3893
 	ldr	x1, [x3, #:lo12:.LANCHOR9]
-	str	wzr, [x2, #:lo12:.LANCHOR156]
+	str	wzr, [x2, #:lo12:.LANCHOR160]
 	ldrh	w2, [x1, x25, lsl 1]
-	adrp	x1, .LANCHOR93
-	ldrh	w1, [x1, #:lo12:.LANCHOR93]
+	adrp	x1, .LANCHOR100
+	ldrh	w1, [x1, #:lo12:.LANCHOR100]
 	cmp	w2, w1
-	bcs	.L3688
+	bcs	.L3893
+	mov	w4, 1
 	str	x3, [x29, 96]
+	strb	w4, [x23, #:lo12:.LANCHOR85]
 	mov	w2, 1
+	str	w4, [x29, 108]
 	mov	w1, 0
 	bl	gc_add_sblk
+	ldr	w4, [x29, 108]
 	ldr	x3, [x29, 96]
-	cbnz	w0, .L3678
-.L3688:
+	cbz	w0, .L3893
+	strb	w4, [x19, #:lo12:.LANCHOR159]
+	b	.L3839
+.L3893:
 	ldr	x0, [x3, #:lo12:.LANCHOR9]
 	ldrh	w1, [x0, x25, lsl 1]
-	adrp	x0, .LANCHOR87
-	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	adrp	x0, .LANCHOR95
+	ldrh	w0, [x0, #:lo12:.LANCHOR95]
 	cmp	w1, w0, lsr 1
-	bhi	.L3689
+	bhi	.L3894
 	mov	w2, 0
 	mov	w1, 1
 	mov	w0, w28
 	bl	gc_add_sblk
-	b	.L3678
-.L3689:
-	ldr	x2, [x29, 104]
-	ldrh	w0, [x27, #:lo12:.LANCHOR92]
-	ldrh	w2, [x2, #:lo12:.LANCHOR90]
+	b	.L3883
+.L3894:
+	ldp	x2, x0, [x29, 112]
+	ldrh	w2, [x2, #:lo12:.LANCHOR99]
+	ldrh	w0, [x0, #:lo12:.LANCHOR97]
 	add	w0, w0, w2
-	adrp	x2, .LANCHOR91
-	ldrh	w2, [x2, #:lo12:.LANCHOR91]
+	adrp	x2, .LANCHOR98
+	ldrh	w2, [x2, #:lo12:.LANCHOR98]
 	cmp	w0, w2, lsl 1
-	ble	.L3690
-	adrp	x0, .LANCHOR93
-	ldrh	w0, [x0, #:lo12:.LANCHOR93]
+	ble	.L3895
+	adrp	x0, .LANCHOR100
+	ldrh	w0, [x0, #:lo12:.LANCHOR100]
 	cmp	w0, w1
-	bcc	.L3687
-	b	.L3690
-.L3686:
+	bcc	.L3892
+	b	.L3895
+.L3891:
 	mov	w1, 1
-	strb	w1, [x23, #:lo12:.LANCHOR78]
+	strb	w1, [x23, #:lo12:.LANCHOR85]
 	cmp	w22, 16
-	bls	.L3691
-	adrp	x0, .LANCHOR94
-	ldrh	w2, [x0, #:lo12:.LANCHOR94]
-	adrp	x0, .LANCHOR95
-	ldrh	w0, [x0, #:lo12:.LANCHOR95]
+	bls	.L3896
+	adrp	x0, .LANCHOR93
+	ldrh	w2, [x0, #:lo12:.LANCHOR93]
+	adrp	x0, .LANCHOR101
+	ldrh	w0, [x0, #:lo12:.LANCHOR101]
 	cmp	w2, w0
-	bhi	.L3691
-	mov	w2, 4
+	bhi	.L3896
 	mov	w0, w1
+	mov	w2, 4
+.L4033:
 	bl	gc_search_src_blk
 	ands	w0, w0, 65535
-	bne	.L3692
+	bne	.L3897
+	ldrb	w0, [x23, #:lo12:.LANCHOR85]
 	mov	w2, 4
-.L3808:
-	ldrb	w0, [x23, #:lo12:.LANCHOR78]
 	mov	w1, 3
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-.L3692:
-	adrp	x1, .LANCHOR91
+.L3897:
+	adrp	x1, .LANCHOR98
 	cmp	w21, w24, lsr 1
-	ldrh	w1, [x1, #:lo12:.LANCHOR91]
-	bls	.L3810
+	ldrh	w1, [x1, #:lo12:.LANCHOR98]
+	bls	.L4028
 	lsr	w1, w1, 2
-.L3811:
-	strh	w1, [x26, #:lo12:.LANCHOR81]
-	b	.L3676
-.L3691:
+.L4029:
+	strh	w1, [x26, #:lo12:.LANCHOR87]
+	b	.L3881
+.L3896:
 	mov	w2, 1
 	mov	w1, 2
 	mov	w0, w2
-	bl	gc_search_src_blk
-	ands	w0, w0, 65535
-	bne	.L3692
-	mov	w2, 2
-	b	.L3808
-.L3696:
+	b	.L4033
+.L3901:
 	mov	w1, 3
 	mov	w2, 4
 	mov	w0, 0
 	bl	gc_search_src_blk
-	ldrh	w1, [x21, #:lo12:.LANCHOR91]
+	ldrh	w1, [x21, #:lo12:.LANCHOR98]
 	and	w0, w0, 65535
-.L3810:
+.L4028:
 	lsr	w1, w1, 1
-	b	.L3811
-.L3683:
-	adrp	x0, .LANCHOR91
+	b	.L4029
+.L3887:
+	adrp	x1, .LANCHOR98
 	mov	w20, 0
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
-	lsr	w0, w0, 2
-	strh	w0, [x2, #:lo12:.LANCHOR81]
-	b	.L3637
-.L3641:
-	adrp	x7, .LANCHOR64
+	ldrh	w1, [x1, #:lo12:.LANCHOR98]
+	lsr	w1, w1, 2
+	strh	w1, [x0, #:lo12:.LANCHOR87]
+	b	.L3839
+.L3843:
+	adrp	x7, .LANCHOR71
 	mov	w0, 65535
-	ldrh	w1, [x7, #:lo12:.LANCHOR64]
+	ldrh	w1, [x7, #:lo12:.LANCHOR71]
 	cmp	w1, w0
-	bne	.L3697
+	bne	.L3902
 	bl	gc_get_src_blk
-	strh	w0, [x7, #:lo12:.LANCHOR64]
-.L3697:
-	ldrh	w0, [x7, #:lo12:.LANCHOR64]
+	strh	w0, [x7, #:lo12:.LANCHOR71]
+.L3902:
+	ldrh	w0, [x7, #:lo12:.LANCHOR71]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3698
+	beq	.L3903
 	adrp	x1, .LANCHOR6
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	cmp	w1, w0
-	bhi	.L3698
+	bhi	.L3903
 	mov	w0, -1
-	strh	w0, [x7, #:lo12:.LANCHOR64]
-.L3698:
-	ldrh	w3, [x7, #:lo12:.LANCHOR64]
+	strh	w0, [x7, #:lo12:.LANCHOR71]
+.L3903:
+	ldrh	w3, [x7, #:lo12:.LANCHOR71]
 	mov	w0, 65535
-	add	x1, x7, :lo12:.LANCHOR64
+	add	x1, x7, :lo12:.LANCHOR71
 	cmp	w3, w0
-	beq	.L3818
+	beq	.L4035
 	adrp	x0, .LANCHOR7
 	ldrh	w5, [x1, 56]
 	uxtw	x4, w3
 	ldr	x2, [x0, #:lo12:.LANCHOR7]
 	add	x2, x2, x4, lsl 2
-	cbz	w5, .L3700
+	cbz	w5, .L3905
 	add	x1, x1, 58
 	mov	w0, 0
-.L3702:
+.L3907:
 	ldrh	w6, [x1], 2
 	cmp	w6, w3
-	bne	.L3701
-.L3706:
-	adrp	x0, .LANCHOR64
+	bne	.L3906
+.L3911:
+	adrp	x0, .LANCHOR71
 	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR64]
-	b	.L3747
-.L3701:
+	strh	w1, [x0, #:lo12:.LANCHOR71]
+	b	.L3954
+.L3906:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w5, w0
-	bne	.L3702
-.L3700:
+	bne	.L3907
+.L3905:
 	ldrb	w0, [x2, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L3703
+	beq	.L3908
 	tst	w0, 192
-	bne	.L3704
-.L3703:
+	bne	.L3909
+.L3908:
 	adrp	x0, .LANCHOR9
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, x4, lsl 1]
-	cbz	w0, .L3706
-	mov	w2, 2542
-	adrp	x1, .LANCHOR228
+	cbz	w0, .L3911
+	mov	w2, 3153
+	adrp	x1, .LANCHOR237
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR228
+	add	x1, x1, :lo12:.LANCHOR237
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3706
-.L3704:
+	b	.L3911
+.L3909:
 	mov	w0, 2
-	b	.L3819
-.L3642:
+	b	.L4036
+.L3844:
 	bl	gc_scan_src_blk
 	cmn	w0, #1
-	bne	.L3707
+	bne	.L3912
 	mov	w0, 3
-	b	.L3819
-.L3707:
-	adrp	x20, .LANCHOR64
+	b	.L4036
+.L3912:
+	adrp	x20, .LANCHOR71
 	mov	w2, 65535
-	add	x0, x20, :lo12:.LANCHOR64
-	ldrh	w1, [x20, #:lo12:.LANCHOR64]
+	add	x0, x20, :lo12:.LANCHOR71
+	ldrh	w1, [x20, #:lo12:.LANCHOR71]
 	cmp	w1, w2
-	beq	.L3656
+	beq	.L3858
 	ldrh	w2, [x0, 24]
-	cbz	w2, .L3708
+	cbz	w2, .L3913
 	mov	w1, 4
 	strh	wzr, [x0, 26]
-	strb	w1, [x19, #:lo12:.LANCHOR155]
-	b	.L3747
-.L3708:
+	strb	w1, [x19, #:lo12:.LANCHOR159]
+	b	.L3954
+.L3913:
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR155]
+	strb	w0, [x19, #:lo12:.LANCHOR159]
 	adrp	x0, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	mov	x19, x0
 	ldr	x2, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L3709
-	adrp	x1, .LANCHOR228
+	cbz	w1, .L3914
+	adrp	x1, .LANCHOR237
 	adrp	x0, .LC0
-	mov	w2, 2570
-	add	x1, x1, :lo12:.LANCHOR228
+	mov	w2, 3183
+	add	x1, x1, :lo12:.LANCHOR237
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3709:
-	ldrh	w0, [x20, #:lo12:.LANCHOR64]
-	add	x21, x20, :lo12:.LANCHOR64
+.L3914:
+	ldrh	w0, [x20, #:lo12:.LANCHOR71]
+	add	x21, x20, :lo12:.LANCHOR71
 	bl	ftl_free_sblk
 	ldr	x0, [x19, #:lo12:.LANCHOR9]
-	ldrh	w1, [x20, #:lo12:.LANCHOR64]
+	ldrh	w1, [x20, #:lo12:.LANCHOR71]
 	strh	wzr, [x0, x1, lsl 1]
 	ldrh	w0, [x21, 30]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w0, 8
-	bhi	.L3710
+	bhi	.L3915
 	strh	w0, [x21, 30]
-	b	.L3706
-.L3710:
+	b	.L3911
+.L3915:
 	strh	wzr, [x21, 30]
 	bl	ftl_flush
 	bl	pm_flush
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L3706
-.L3643:
-	adrp	x20, .LANCHOR64
-	adrp	x23, .LANCHOR87
-	add	x22, x20, :lo12:.LANCHOR64
-	add	x23, x23, :lo12:.LANCHOR87
-.L3786:
+	b	.L3911
+.L3845:
+	adrp	x20, .LANCHOR71
+	adrp	x23, .LANCHOR95
+	add	x22, x20, :lo12:.LANCHOR71
+	add	x23, x23, :lo12:.LANCHOR95
+.L3999:
 	bl	gc_scan_src_blk_one_page
 	ldrh	w1, [x22, 2]
 	ldrh	w0, [x23]
 	cmp	w1, w0
-	bcs	.L3712
+	bcs	.L3917
 	cmp	w21, 7
-	bls	.L3786
-	b	.L3747
-.L3712:
+	bls	.L3999
+	b	.L3954
+.L3917:
 	ldrh	w3, [x22, 24]
-	adrp	x0, .LANCHOR14
-	cbz	w3, .L3713
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	mov	w1, 4
-	strh	wzr, [x22, 26]
-	strb	w1, [x19, #:lo12:.LANCHOR155]
-	adrp	x19, .LANCHOR9
-	tbz	x0, 8, .L3714
 	ldrh	w1, [x22]
-	ldr	x2, [x19, #:lo12:.LANCHOR9]
+	cbz	w3, .L3918
+	mov	w0, 4
+	strb	w0, [x19, #:lo12:.LANCHOR159]
+	adrp	x19, .LANCHOR9
 	ubfiz	x0, x1, 1, 16
+	strh	wzr, [x22, 26]
+	ldr	x2, [x19, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC243
-	add	x0, x0, :lo12:.LC243
+	cmp	w3, w2
+	beq	.L3919
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 10, .L3919
+	adrp	x0, .LC237
+	add	x0, x0, :lo12:.LC237
 	bl	printf
-.L3714:
-	ldrh	w2, [x20, #:lo12:.LANCHOR64]
-	add	x0, x20, :lo12:.LANCHOR64
+.L3919:
+	ldrh	w2, [x20, #:lo12:.LANCHOR71]
+	add	x0, x20, :lo12:.LANCHOR71
 	ldr	x1, [x19, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, 24]
 	ldrh	w1, [x1, x2, lsl 1]
 	cmp	w1, w0
-	beq	.L3715
-	adrp	x1, .LANCHOR228
+	beq	.L3920
+	adrp	x1, .LANCHOR237
 	adrp	x0, .LC0
-	mov	w2, 2604
-	add	x1, x1, :lo12:.LANCHOR228
+	mov	w2, 3226
+	add	x1, x1, :lo12:.LANCHOR237
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3715:
-	add	x0, x20, :lo12:.LANCHOR64
-	ldrh	w1, [x20, #:lo12:.LANCHOR64]
+.L3920:
+	add	x0, x20, :lo12:.LANCHOR71
+	ldrh	w1, [x20, #:lo12:.LANCHOR71]
 	ldrh	w2, [x0, 24]
 	ldr	x0, [x19, #:lo12:.LANCHOR9]
 	strh	w2, [x0, x1, lsl 1]
-	b	.L3747
-.L3713:
-	adrp	x2, .LANCHOR7
+	b	.L3954
+.L3918:
+	adrp	x0, .LANCHOR7
+	ldr	x21, [x0, #:lo12:.LANCHOR7]
+	mov	w0, 1
+	strb	w0, [x19, #:lo12:.LANCHOR159]
+	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	ldrh	w1, [x22]
-	ldr	x21, [x2, #:lo12:.LANCHOR7]
-	mov	w2, 1
-	strb	w2, [x19, #:lo12:.LANCHOR155]
 	add	x21, x21, x1, uxth 2
-	tbz	x0, 8, .L3716
+	tbz	x0, 8, .L3921
 	ldrb	w2, [x21, 2]
-	adrp	x0, .LC244
-	add	x0, x0, :lo12:.LC244
+	adrp	x0, .LC238
+	add	x0, x0, :lo12:.LC238
 	ubfx	x2, x2, 5, 3
 	bl	printf
-.L3716:
+.L3921:
 	ldrb	w0, [x21, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L3717
+	beq	.L3922
 	tst	w0, 192
-	bne	.L3718
-.L3717:
-	adrp	x1, .LANCHOR228
+	bne	.L3923
+.L3922:
+	adrp	x1, .LANCHOR237
 	adrp	x0, .LC0
-	mov	w2, 2614
-	add	x1, x1, :lo12:.LANCHOR228
+	mov	w2, 3236
+	add	x1, x1, :lo12:.LANCHOR237
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3718:
-	ldrh	w0, [x20, #:lo12:.LANCHOR64]
-	add	x19, x20, :lo12:.LANCHOR64
+.L3923:
+	ldrh	w0, [x20, #:lo12:.LANCHOR71]
+	add	x19, x20, :lo12:.LANCHOR71
 	bl	ftl_free_sblk
 	mov	w0, -1
-	strh	w0, [x20, #:lo12:.LANCHOR64]
+	strh	w0, [x20, #:lo12:.LANCHOR71]
 	ldrh	w0, [x19, 30]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w0, 8
-	bhi	.L3719
+	bhi	.L3924
 	strh	w0, [x19, 30]
-	b	.L3747
-.L3719:
+	b	.L3954
+.L3924:
 	strh	wzr, [x19, 30]
-.L3817:
+.L4034:
 	bl	flt_sys_flush
-	b	.L3747
-.L3644:
-	ldrh	w1, [x20, 80]
+	b	.L3954
+.L3846:
+	ldrh	w1, [x26, 80]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L3720
-	adrp	x0, .LANCHOR78
-	ldrb	w22, [x0, #:lo12:.LANCHOR78]
+	bne	.L3925
+	adrp	x0, .LANCHOR85
+	ldrb	w22, [x0, #:lo12:.LANCHOR85]
 	cmp	w22, 1
-	bne	.L3720
+	bne	.L3925
 	bl	ftl_flush
-	adrp	x0, .LANCHOR64
-	add	x1, x0, :lo12:.LANCHOR64
-	mov	x21, x0
-	ldrh	w1, [x1, 574]
-	cbz	w1, .L3721
+	adrp	x0, .LANCHOR71
+	add	x1, x0, :lo12:.LANCHOR71
+	mov	x20, x0
+	ldrh	w1, [x1, 2110]
+	cbz	w1, .L3926
 	mov	w0, w22
 	mov	w1, 5
-.L3814:
+.L4030:
 	bl	zftl_gc_get_free_sblk
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L3723
+	beq	.L3928
 	adrp	x0, .LANCHOR7
-	ldr	x22, [x0, #:lo12:.LANCHOR7]
-	add	x22, x22, x19, uxth 2
-	ldrb	w0, [x22, 2]
+	ldr	x21, [x0, #:lo12:.LANCHOR7]
+	add	x21, x21, x19, uxth 2
+	ldrb	w0, [x21, 2]
 	tst	w0, 224
-	beq	.L3724
-	adrp	x1, .LANCHOR228
+	beq	.L3929
+	adrp	x1, .LANCHOR237
 	adrp	x0, .LC0
-	mov	w2, 2643
-	add	x1, x1, :lo12:.LANCHOR228
+	mov	w2, 3270
+	add	x1, x1, :lo12:.LANCHOR237
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3724:
-	ldrb	w0, [x22, 2]
+.L3929:
+	ldrb	w0, [x21, 2]
 	mov	w1, 5
 	bfi	w0, w1, 5, 3
 	orr	w0, w0, 16
-	strb	w0, [x22, 2]
-.L3746:
+	strb	w0, [x21, 2]
+.L3953:
 	mov	w1, 1
 	mov	w0, w19
 	bl	ftl_erase_sblk
-	adrp	x22, .LANCHOR79
+	adrp	x22, .LANCHOR86
 	mov	w0, 5
-	strb	w0, [x20, 84]
-	add	x1, x20, 96
+	strb	w0, [x26, 84]
+	add	x1, x26, 96
 	mov	w0, w19
 	bl	ftl_get_blk_list_in_sblk
 	and	w0, w0, 255
-	adrp	x1, .LANCHOR87
-	strb	w0, [x20, 89]
-	strh	w19, [x20, 80]
-	ldrh	w1, [x1, #:lo12:.LANCHOR87]
-	strh	wzr, [x20, 82]
-	strb	wzr, [x20, 85]
-	strh	wzr, [x20, 90]
+	adrp	x1, .LANCHOR95
+	adrp	x21, .LANCHOR80
+	strb	w0, [x26, 89]
+	ldrh	w1, [x1, #:lo12:.LANCHOR95]
+	ldrh	w2, [x22, #:lo12:.LANCHOR86]
+	strh	w19, [x26, 80]
+	strh	wzr, [x26, 82]
 	mul	w0, w0, w1
-	ldrh	w2, [x22, #:lo12:.LANCHOR79]
-	strh	w0, [x20, 86]
-	adrp	x20, .LANCHOR80
+	strb	wzr, [x26, 85]
+	strh	w0, [x26, 86]
 	mov	w1, 255
-	ldrb	w0, [x20, #:lo12:.LANCHOR80]
+	ldrb	w0, [x21, #:lo12:.LANCHOR80]
+	strh	wzr, [x26, 90]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR157
-	ldr	x0, [x0, #:lo12:.LANCHOR157]
+	adrp	x0, .LANCHOR162
+	ldr	x0, [x0, #:lo12:.LANCHOR162]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	ldrb	w0, [x20, #:lo12:.LANCHOR80]
+	ldrb	w0, [x21, #:lo12:.LANCHOR80]
 	mov	w1, 255
-	ldrh	w2, [x22, #:lo12:.LANCHOR79]
+	ldrh	w2, [x22, #:lo12:.LANCHOR86]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR158
-	ldr	x0, [x0, #:lo12:.LANCHOR158]
+	adrp	x0, .LANCHOR163
+	ldr	x0, [x0, #:lo12:.LANCHOR163]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	ldrb	w0, [x20, #:lo12:.LANCHOR80]
+	ldrb	w0, [x21, #:lo12:.LANCHOR80]
 	mov	w1, 255
-	ldrh	w2, [x22, #:lo12:.LANCHOR79]
+	ldrh	w2, [x22, #:lo12:.LANCHOR86]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR76
-	ldr	x0, [x0, #:lo12:.LANCHOR76]
+	adrp	x0, .LANCHOR83
+	ldr	x0, [x0, #:lo12:.LANCHOR83]
 	bl	ftl_memset
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	mov	w1, -1
@@ -23927,406 +25281,947 @@ zftl_do_gc:
 	strh	w1, [x0, 130]
 	bl	pm_flush
 	bl	ftl_ext_info_flush
-	adrp	x0, .LANCHOR104
+	adrp	x0, .LANCHOR110
 	mov	w1, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR104]
+	ldr	x0, [x0, #:lo12:.LANCHOR110]
 	strh	w19, [x0, 126]
-	add	x0, x21, :lo12:.LANCHOR64
-	str	w1, [x0, 580]
-	strh	wzr, [x0, 570]
+	add	x0, x20, :lo12:.LANCHOR71
+	str	w1, [x0, 2116]
+	strh	wzr, [x0, 2106]
 	strh	wzr, [x0, 56]
-	strh	wzr, [x0, 572]
-	strh	wzr, [x0, 576]
+	strh	wzr, [x0, 2108]
+	strh	wzr, [x0, 2112]
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L3747
-.L3721:
+	b	.L3954
+.L3926:
 	mov	w1, 5
 	mov	w0, 0
-	b	.L3814
-.L3720:
+	b	.L4030
+.L3925:
 	cmp	w25, 1
 	mov	w22, 4
 	csinc	w22, w22, wzr, eq
 	cmp	w21, 15
 	mov	w0, w22
 	add	w22, w22, 4
-	adrp	x25, .LANCHOR78
-	adrp	x24, .LANCHOR64
+	adrp	x25, .LANCHOR85
+	adrp	x21, .LANCHOR71
 	csel	w22, w22, w0, ls
-	add	x25, x25, :lo12:.LANCHOR78
-	add	x21, x24, :lo12:.LANCHOR64
-	add	x26, x20, 80
-.L3727:
+	add	x25, x25, :lo12:.LANCHOR85
+	add	x20, x21, :lo12:.LANCHOR71
+	add	x27, x26, 80
+.L3932:
 	sub	w22, w22, #1
 	and	w22, w22, 255
 	cmp	w22, 255
-	beq	.L3747
+	beq	.L3954
 	bl	gc_do_copy_back
 	ldrb	w0, [x25]
-	cbnz	w0, .L3728
-	adrp	x0, .LANCHOR54
-	ldrb	w0, [x0, #:lo12:.LANCHOR54]
+	cbnz	w0, .L3933
+	adrp	x0, .LANCHOR58
+	ldrb	w0, [x0, #:lo12:.LANCHOR58]
 	cmp	w0, 3
-	bhi	.L3729
+	bhi	.L3934
 	bl	ftl_write_commit
-.L3729:
-	ldrh	w1, [x21, 26]
-	ldrh	w0, [x21, 24]
+.L3934:
+	ldrh	w1, [x20, 26]
+	ldrh	w0, [x20, 24]
 	cmp	w1, w0
-	bcc	.L3727
+	bcc	.L3932
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR155]
+	strb	w0, [x19, #:lo12:.LANCHOR159]
 	bl	ftl_write_commit
 	bl	ftl_flush
 	adrp	x0, .LANCHOR9
-	ldrh	w2, [x21]
+	ldrh	w2, [x20]
 	mov	x19, x0
 	ldr	x1, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x1, x2, lsl 1]
-	cbz	w1, .L3731
-	adrp	x1, .LANCHOR228
+	cbz	w1, .L3936
+	adrp	x1, .LANCHOR237
 	adrp	x0, .LC0
-	mov	w2, 2718
-	add	x1, x1, :lo12:.LANCHOR228
+	mov	w2, 3354
+	add	x1, x1, :lo12:.LANCHOR237
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3731:
-	ldrh	w0, [x24, #:lo12:.LANCHOR64]
+.L3936:
+	ldrh	w0, [x21, #:lo12:.LANCHOR71]
 	ldr	x2, [x19, #:lo12:.LANCHOR9]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L3732
+	cbnz	w1, .L3937
 	bl	ftl_free_sblk
-	b	.L3706
-.L3732:
+	b	.L3911
+.L3937:
 	mov	w2, 1
 	mov	w1, 0
 	bl	gc_add_sblk
-	b	.L3706
-.L3728:
-	ldrh	w0, [x21, 576]
-	cbz	w0, .L3733
-	strh	wzr, [x21, 576]
+	b	.L3911
+.L3933:
+	ldrh	w0, [x20, 2112]
+	cbz	w0, .L3938
+	strh	wzr, [x20, 2112]
 	bl	sblk_wait_write_queue_completed
 	bl	gc_write_completed
-	ldr	w0, [x21, 580]
+	ldr	w0, [x20, 2116]
+	adrp	x20, .LANCHOR110
 	cmn	w0, #1
-	beq	.L3734
-	bl	ftl_mask_bad_block
-.L3734:
+	beq	.L3939
+	adrp	x1, .LANCHOR124
+	ldrb	w1, [x1, #:lo12:.LANCHOR124]
+	cbnz	w1, .L3940
+	adrp	x1, .LANCHOR81
+	ldrb	w1, [x1, #:lo12:.LANCHOR81]
+	cbz	w1, .L3941
+.L3940:
+	ldr	x1, [x20, #:lo12:.LANCHOR110]
+	ldr	w2, [x1, 156]
+	mov	w1, 20041
+	movk	w1, 0x444b, lsl 16
+	cmp	w2, w1
+	bne	.L3941
+	adrp	x1, .LANCHOR75
+	ldrh	w3, [x1, #:lo12:.LANCHOR75]
+	adrp	x1, .LANCHOR32
+	ldrb	w2, [x1, #:lo12:.LANCHOR32]
+	mov	w1, 24
+	lsr	w0, w0, w3
+	sub	w1, w1, w2
+	sub	w2, w1, w3
+	mov	w1, 1
+	lsl	w1, w1, w2
+	sub	w1, w1, #1
+	and	w0, w1, w0
+	adrp	x1, .LANCHOR76
+	ldrb	w1, [x1, #:lo12:.LANCHOR76]
+	udiv	w0, w0, w1
+	adrp	x1, .LANCHOR7
+	ldr	x2, [x1, #:lo12:.LANCHOR7]
+	lsl	x0, x0, 2
+	add	x4, x2, x0
+	ldrb	w1, [x4, 2]
+	tbz	x1, 3, .L3939
+	adrp	x5, .LANCHOR98
+	ldrh	w3, [x24, #:lo12:.LANCHOR103]
+	ldrh	w5, [x5, #:lo12:.LANCHOR98]
+	add	w3, w3, 8
+	cmp	w3, w5
+	bge	.L3939
+	and	w1, w1, -25
+	strb	w1, [x4, 2]
+	adrp	x1, .LANCHOR8
+	ldr	w3, [x2, x0]
+	ldrh	w1, [x1, #:lo12:.LANCHOR8]
+	ldrh	w4, [x2, x0]
+	ubfx	x3, x3, 11, 8
+	and	w5, w4, 2047
+	mul	w1, w1, w3
+	lsr	w3, w3, 3
+	add	w1, w1, w1, lsl 1
+	add	w1, w5, w1, lsr 2
+	bfi	w4, w1, 0, 11
+	strh	w4, [x2, x0]
+	ldr	w1, [x2, x0]
+	bfi	w1, w3, 11, 8
+	str	w1, [x2, x0]
+.L3939:
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
-	add	x20, x24, :lo12:.LANCHOR64
-	strh	wzr, [x20, 56]
+	add	x22, x21, :lo12:.LANCHOR71
+	strh	wzr, [x22, 56]
 	ldrh	w0, [x0, 80]
-	str	wzr, [x20, 580]
+	str	wzr, [x22, 2116]
 	bl	ftl_free_sblk
-	adrp	x2, .LANCHOR104
 	ldr	x1, [x23, #:lo12:.LANCHOR10]
 	mov	w0, -1
-	ldr	x2, [x2, #:lo12:.LANCHOR104]
+	ldr	x2, [x20, #:lo12:.LANCHOR110]
 	strh	w0, [x1, 80]
 	strh	w0, [x2, 126]
 	strh	w0, [x1, 130]
-	ldr	x0, [x20, 8]
-	cbz	x0, .L3735
+	ldr	x0, [x22, 8]
+	cbz	x0, .L3942
 	bl	zbuf_free
-.L3735:
-	add	x24, x24, :lo12:.LANCHOR64
-	str	xzr, [x24, 8]
+.L3942:
+	add	x21, x21, :lo12:.LANCHOR71
+	str	xzr, [x21, 8]
 	bl	flt_sys_flush
-	mov	w2, 2756
-	strb	wzr, [x19, #:lo12:.LANCHOR155]
-	adrp	x1, .LANCHOR228
+	mov	w2, 3413
+	strb	wzr, [x19, #:lo12:.LANCHOR159]
+	adrp	x1, .LANCHOR237
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR228
+	add	x1, x1, :lo12:.LANCHOR237
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3747
-.L3733:
-	ldrh	w0, [x26, 6]
-	ldrh	w1, [x21, 26]
+	b	.L3954
+.L3941:
+	bl	ftl_mask_bad_block
+	b	.L3939
+.L3938:
+	ldrh	w0, [x27, 6]
+	ldrh	w1, [x20, 26]
 	cmp	w0, 1
-	ldrh	w0, [x21, 24]
-	bls	.L3736
+	ldrh	w0, [x20, 24]
+	bls	.L3943
 	cmp	w1, w0
-	bcc	.L3727
+	bcc	.L3932
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR155]
-	ldrh	w0, [x21, 56]
+	strb	w0, [x19, #:lo12:.LANCHOR159]
+	ldrh	w0, [x20, 56]
 	add	w1, w0, 1
-	strh	w1, [x21, 56]
-	add	x0, x21, x0, sxtw 1
-	ldrh	w1, [x21]
+	strh	w1, [x20, 56]
+	add	x0, x20, x0, sxtw 1
+	ldrh	w1, [x20]
 	strh	w1, [x0, 58]
 	mov	w0, -1
-	strh	w0, [x21]
-	b	.L3747
-.L3736:
+	strh	w0, [x20]
+	b	.L3954
+.L3943:
 	mov	w2, 5
-	strb	w2, [x19, #:lo12:.LANCHOR155]
+	strb	w2, [x19, #:lo12:.LANCHOR159]
 	cmp	w1, w0
-	bcc	.L3737
-	ldrh	w0, [x21, 56]
+	bcc	.L3944
+	ldrh	w0, [x20, 56]
 	add	w1, w0, 1
-	strh	w1, [x21, 56]
-	add	x0, x21, x0, sxtw 1
-	ldrh	w1, [x21]
+	strh	w1, [x20, 56]
+	add	x0, x20, x0, sxtw 1
+	ldrh	w1, [x20]
 	strh	w1, [x0, 58]
 	mov	w0, -1
-	strh	w0, [x21]
-.L3737:
+	strh	w0, [x20]
+.L3944:
 	bl	ftl_flush
 	bl	sblk_wait_write_queue_completed
 	bl	gc_write_completed
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
-	ldrh	w1, [x20, 80]
+	ldrh	w1, [x26, 80]
 	strh	w1, [x0, 128]
 	bl	pm_flush
 	bl	ftl_ext_info_flush
-	adrp	x1, .LANCHOR87
-	add	x0, x24, :lo12:.LANCHOR64
-	adrp	x2, .LANCHOR35
-	ldrh	w1, [x1, #:lo12:.LANCHOR87]
+	adrp	x1, .LANCHOR95
+	add	x0, x21, :lo12:.LANCHOR71
+	adrp	x2, .LANCHOR36
+	ldrh	w1, [x1, #:lo12:.LANCHOR95]
 	strh	w1, [x0, 18]
-	adrp	x1, .LANCHOR73
-	ldrb	w2, [x2, #:lo12:.LANCHOR35]
+	adrp	x1, .LANCHOR79
+	ldrb	w2, [x2, #:lo12:.LANCHOR36]
 	strh	wzr, [x0, 16]
-	ldrb	w1, [x1, #:lo12:.LANCHOR73]
+	ldrb	w1, [x1, #:lo12:.LANCHOR79]
 	strh	w1, [x0, 20]
-	cbz	w2, .L3738
-	adrp	x2, .LANCHOR79
-	ldrh	w2, [x2, #:lo12:.LANCHOR79]
+	cbz	w2, .L3945
+	adrp	x2, .LANCHOR86
+	ldrh	w2, [x2, #:lo12:.LANCHOR86]
 	strh	w2, [x0, 18]
 	mov	w2, 1
 	strh	w2, [x0, 20]
-.L3738:
+.L3945:
 	cmp	w1, 2
-	bne	.L3740
-	add	x0, x24, :lo12:.LANCHOR64
+	bne	.L3947
+	add	x0, x21, :lo12:.LANCHOR71
 	ldrh	w1, [x0, 18]
 	ubfiz	w1, w1, 1, 15
 	strh	w1, [x0, 18]
-	adrp	x1, .LANCHOR74
-	ldrb	w1, [x1, #:lo12:.LANCHOR74]
-	cbnz	w1, .L3740
+	adrp	x1, .LANCHOR81
+	ldrb	w1, [x1, #:lo12:.LANCHOR81]
+	cbnz	w1, .L3947
 	mov	w1, 1
 	strh	w1, [x0, 20]
-.L3740:
-	add	x24, x24, :lo12:.LANCHOR64
-	strh	wzr, [x24, 22]
-	b	.L3747
-.L3743:
+.L3947:
+	add	x21, x21, :lo12:.LANCHOR71
+	strh	wzr, [x21, 22]
+	b	.L3954
+.L3950:
 	ldrh	w1, [x24, 16]
 	ldrh	w0, [x24, 18]
 	cmp	w1, w0
-	bcc	.L3744
+	bcc	.L3951
 	mov	w0, 6
-	strb	w0, [x19, #:lo12:.LANCHOR155]
+	strb	w0, [x19, #:lo12:.LANCHOR159]
 	ldr	x0, [x24, 8]
 	bl	zbuf_free
 	str	xzr, [x24, 8]
-	b	.L3747
-.L3744:
+	b	.L3954
+.L3951:
 	cmp	w21, 15
-	bls	.L3647
+	bls	.L3849
 	cmp	w25, 1
-	bne	.L3747
+	bne	.L3954
 	add	w22, w22, 1
 	and	w22, w22, 255
 	cmp	w22, 4
-	bls	.L3647
-	b	.L3747
-.L3646:
+	bls	.L3849
+	b	.L3954
+.L3848:
 	bl	gc_update_l2p_map_new
-	mov	w21, -1
+	mov	w20, -1
 	bl	gc_free_src_blk
 	bl	ftl_flush
 	bl	pm_flush
-	strh	w21, [x20, 80]
+	strh	w20, [x26, 80]
 	bl	ftl_ext_info_flush
-	adrp	x0, .LANCHOR104
-	ldr	x0, [x0, #:lo12:.LANCHOR104]
-	strh	w21, [x0, 126]
+	adrp	x0, .LANCHOR110
+	ldr	x0, [x0, #:lo12:.LANCHOR110]
+	strh	w20, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L3818:
-	strb	wzr, [x19, #:lo12:.LANCHOR155]
-	b	.L3747
-.L3723:
-	mov	w2, 2649
-	adrp	x1, .LANCHOR228
+.L4035:
+	strb	wzr, [x19, #:lo12:.LANCHOR159]
+	b	.L3954
+.L3928:
+	mov	w2, 3277
+	adrp	x1, .LANCHOR237
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR228
+	add	x1, x1, :lo12:.LANCHOR237
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3746
+	b	.L3953
 	.size	zftl_do_gc, .-zftl_do_gc
-	.section	.text.zftl_write,"ax",@progbits
+	.section	.text.zftl_init,"ax",@progbits
 	.align	2
-	.global	zftl_write
-	.type	zftl_write, %function
-zftl_write:
+	.global	zftl_init
+	.type	zftl_init, %function
+zftl_init:
 	stp	x29, x30, [sp, -112]!
+	adrp	x1, .LANCHOR66
+	mov	w0, -1
 	add	x29, sp, 0
-	stp	x25, x26, [sp, 64]
-	mov	w26, w0
-	adrp	x0, .LANCHOR14
-	stp	x19, x20, [sp, 16]
+	strb	w0, [x1, #:lo12:.LANCHOR66]
+	adrp	x1, .LANCHOR67
 	stp	x21, x22, [sp, 32]
-	mov	w19, w1
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	mov	w25, w2
+	adrp	x22, .LANCHOR95
+	strb	wzr, [x1, #:lo12:.LANCHOR67]
+	adrp	x1, .LANCHOR133
+	stp	x19, x20, [sp, 16]
+	adrp	x21, .LANCHOR80
+	strb	w0, [x1, #:lo12:.LANCHOR133]
+	adrp	x1, .LANCHOR134
 	stp	x23, x24, [sp, 48]
-	mov	x22, x3
+	adrp	x20, .LANCHOR221
+	strb	wzr, [x1, #:lo12:.LANCHOR134]
+	adrp	x1, .LANCHOR185
+	stp	x25, x26, [sp, 64]
+	adrp	x23, .LANCHOR6
+	strb	w0, [x1, #:lo12:.LANCHOR185]
+	adrp	x0, .LANCHOR129
+	mov	w1, -1
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L3821
-	ldr	w4, [x22]
-	mov	w3, w2
+	strb	wzr, [x0, #:lo12:.LANCHOR129]
+	adrp	x0, .LANCHOR238
+	str	w1, [x0, #:lo12:.LANCHOR238]
+	adrp	x1, .LC239
+	adrp	x0, .LC104
+	add	x1, x1, :lo12:.LC239
+	add	x0, x0, :lo12:.LC104
+	bl	printf
+	adrp	x1, .LANCHOR33
+	add	x1, x1, :lo12:.LANCHOR33
+	adrp	x0, .LANCHOR79
+	adrp	x2, .LANCHOR131
+	adrp	x3, .LANCHOR112
+	adrp	x4, .LANCHOR76
+	ldrb	w7, [x1, 12]
+	strb	w7, [x0, #:lo12:.LANCHOR79]
+	ldrb	w0, [x1, 9]
+	strb	w0, [x2, #:lo12:.LANCHOR131]
+	adrp	x2, .LANCHOR86
+	ldrh	w5, [x1, 10]
+	strh	w5, [x2, #:lo12:.LANCHOR86]
+	adrp	x2, .LANCHOR18
+	ldrh	w8, [x1, 14]
+	ubfiz	w6, w0, 9, 7
+	ldrb	w2, [x2, #:lo12:.LANCHOR18]
+	sdiv	w11, w5, w7
+	strb	w2, [x3, #:lo12:.LANCHOR112]
+	ldrb	w3, [x1, 13]
+	adrp	x1, .LANCHOR2
+	strb	w3, [x4, #:lo12:.LANCHOR76]
+	ldrh	w4, [x1, #:lo12:.LANCHOR2]
+	adrp	x1, .LANCHOR111
+	strh	w11, [x22, #:lo12:.LANCHOR95]
+	mul	w2, w2, w3
+	strh	w4, [x1, #:lo12:.LANCHOR111]
+	strh	w8, [x23, #:lo12:.LANCHOR6]
+	mov	w3, 1
+	and	w2, w2, 255
+	strh	w6, [x20, #:lo12:.LANCHOR221]
+	strb	w2, [x21, #:lo12:.LANCHOR80]
+	mov	w1, 0
+.L4038:
+	cmp	w4, w3
+	bcs	.L4039
+	mul	w10, w0, w5
+	adrp	x3, .LANCHOR75
+	sub	w1, w1, #1
+	mov	w4, 0
+	strh	w1, [x3, #:lo12:.LANCHOR75]
+	mov	w1, 1
+	mul	w3, w8, w10
+	lsr	w12, w3, 21
+.L4040:
+	cmp	w12, w1
+	bcs	.L4041
+	mov	w1, 57344
+	sub	w4, w4, #1
+	movk	w1, 0x1c, lsl 16
+	mul	w3, w3, w2
+	adrp	x28, .LANCHOR128
+	sub	w12, w6, #1
+	mul	w1, w2, w1
+	adrp	x24, .LANCHOR204
+	mul	w11, w11, w2
+	adrp	x27, .LANCHOR240
+	mul	w10, w10, w2
+	adrp	x26, .LANCHOR155
+	lsl	w1, w1, w4
+	adrp	x4, .LANCHOR68
+	sub	w10, w10, #1
+	adrp	x25, .LANCHOR98
+	str	w1, [x4, #:lo12:.LANCHOR68]
+	adrp	x4, .LANCHOR239
+	lsr	w8, w8, 4
+	strh	w8, [x25, #:lo12:.LANCHOR98]
+	str	w3, [x4, #:lo12:.LANCHOR239]
+	add	w3, w1, 24576
+	str	w3, [x27, #:lo12:.LANCHOR240]
+	cmp	w8, 79
+	udiv	w0, w3, w0
+	udiv	w3, w3, w10
+	str	w0, [x28, #:lo12:.LANCHOR128]
+	add	w0, w12, w0, lsl 2
+	add	w3, w3, 8
+	udiv	w0, w0, w6
+	strh	w0, [x24, #:lo12:.LANCHOR204]
+	ubfiz	w0, w0, 4, 16
+	sdiv	w0, w0, w11
+	strh	w0, [x26, #:lo12:.LANCHOR155]
+	adrp	x0, .LANCHOR101
+	str	x0, [x29, 104]
+	strh	w3, [x0, #:lo12:.LANCHOR101]
+	bhi	.L4042
+	mov	w0, 80
+	strh	w0, [x25, #:lo12:.LANCHOR98]
+.L4042:
+	adrp	x12, .LANCHOR126
+	mov	w0, 2000
+	adrp	x11, .LANCHOR125
+	adrp	x3, .LANCHOR152
+	strh	w0, [x12, #:lo12:.LANCHOR126]
+	mov	w0, 50
+	adrp	x8, .LANCHOR153
+	strh	w0, [x11, #:lo12:.LANCHOR125]
+	mov	w0, 256
+	strh	w0, [x3, #:lo12:.LANCHOR152]
+	mov	w0, 48
+	strh	w0, [x8, #:lo12:.LANCHOR153]
+	adrp	x0, .LANCHOR8
+	mov	w10, 32
+	cmp	w7, 2
+	mov	x13, x11
+	strh	w10, [x0, #:lo12:.LANCHOR8]
+	mov	x7, x12
+	mov	x14, x8
+	beq	.L4043
+	adrp	x15, .LANCHOR84
+	ldrb	w15, [x15, #:lo12:.LANCHOR84]
+	cbz	w15, .L4044
+.L4043:
+	mov	w8, 150
+	strh	w8, [x13, #:lo12:.LANCHOR125]
+	mov	w8, 64
+	strh	w8, [x14, #:lo12:.LANCHOR153]
+	mov	w8, 12
+	strh	w8, [x0, #:lo12:.LANCHOR8]
+	adrp	x8, .LANCHOR0
+	ldrb	w8, [x8, #:lo12:.LANCHOR0]
+	cbnz	w8, .L4045
+	mov	w8, 4
+	strh	w8, [x0, #:lo12:.LANCHOR8]
+	mov	w0, 600
+	strh	w0, [x7, #:lo12:.LANCHOR126]
+	mov	w0, 128
+	strh	w0, [x3, #:lo12:.LANCHOR152]
+.L4045:
+	adrp	x0, .LANCHOR37
+	ldrb	w0, [x0, #:lo12:.LANCHOR37]
+	cbz	w0, .L4047
+	mov	w0, 200
+	strh	w0, [x13, #:lo12:.LANCHOR125]
+	mov	w0, 2000
+	strh	w0, [x7, #:lo12:.LANCHOR126]
+.L4047:
+	adrp	x0, .LANCHOR122
+	mul	w2, w5, w2
+	mov	w3, 1
+	str	wzr, [x0, #:lo12:.LANCHOR122]
+	adrp	x0, .LANCHOR224
+	cmp	w6, w2, lsl 2
+	strb	w3, [x0, #:lo12:.LANCHOR224]
+	bge	.L4049
+	mov	w2, 2
+	strb	w2, [x0, #:lo12:.LANCHOR224]
+.L4049:
+	adrp	x19, .LANCHOR14
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L4050
+	str	x4, [x29, 96]
+	adrp	x0, .LC240
+	add	x0, x0, :lo12:.LC240
+	bl	printf
+	ldr	x4, [x29, 96]
+.L4050:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L4051
+	ldr	w1, [x4, #:lo12:.LANCHOR239]
+	adrp	x0, .LC241
+	add	x0, x0, :lo12:.LC241
+	bl	printf
+.L4051:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L4052
+	ldr	w1, [x28, #:lo12:.LANCHOR128]
+	adrp	x0, .LC242
+	add	x0, x0, :lo12:.LC242
+	bl	printf
+.L4052:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L4053
+	ldr	w1, [x27, #:lo12:.LANCHOR240]
+	adrp	x0, .LC243
+	add	x0, x0, :lo12:.LC243
+	bl	printf
+.L4053:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L4054
+	ldrh	w1, [x24, #:lo12:.LANCHOR204]
+	adrp	x0, .LC244
+	add	x0, x0, :lo12:.LC244
+	bl	printf
+.L4054:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L4055
+	ldrh	w1, [x20, #:lo12:.LANCHOR221]
 	adrp	x0, .LC245
-	mov	w2, w1
 	add	x0, x0, :lo12:.LC245
-	mov	w1, w26
 	bl	printf
-.L3821:
-	cbnz	w26, .L3822
-	adrp	x0, .LANCHOR61
-	mov	w26, 24576
-	ldr	w0, [x0, #:lo12:.LANCHOR61]
-.L3823:
-	cmp	w0, w19
-	ccmp	w0, w25, 0, hi
-	bcc	.L3838
-	add	w1, w19, w25
-	cmp	w0, w1
-	bcc	.L3838
-	adrp	x23, .LANCHOR126
-	add	w26, w26, w19
-	sub	w19, w25, #1
-	adrp	x24, .LANCHOR104
-	ldrb	w0, [x23, #:lo12:.LANCHOR126]
-	add	w19, w19, w26
-	add	x23, x23, :lo12:.LANCHOR126
-	udiv	w21, w26, w0
-	udiv	w19, w19, w0
-	add	w0, w26, w25
-	str	w0, [x29, 108]
-	mov	w28, w21
-	sub	w20, w19, w21
-	add	w20, w20, 1
-.L3825:
-	cbnz	w20, .L3833
-	adrp	x20, .LANCHOR97
-	adrp	x19, .LANCHOR101
-	add	x20, x20, :lo12:.LANCHOR97
-	add	x19, x19, :lo12:.LANCHOR101
-	bl	ftl_write_commit
-	bl	ftl_flush
-	mov	w1, 1
-	mov	w0, 0
-	bl	zftl_do_gc
-.L3834:
-	ldrh	w0, [x20]
-	ldrh	w1, [x19]
-	add	w0, w0, w1
-	cmp	w0, 7
-	ble	.L3835
-	mov	w0, 0
-.L3820:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 112
-	ret
-.L3822:
-	cmp	w26, 3
-	bhi	.L3838
-	lsl	w26, w26, 13
-	mov	w0, 8192
-	b	.L3823
-.L3833:
-	mov	w0, 0
-	bl	buf_alloc
-	mov	x27, x0
-	cbnz	x0, .L3826
-	bl	ftl_write_commit
-	b	.L3825
-.L3826:
-	ldrb	w3, [x23]
-	cmp	w28, w21
-	strb	wzr, [x0, 57]
-	ccmp	w28, w19, 4, ne
-	strb	w3, [x0, 56]
-	bne	.L3829
-	cmp	w28, w21
-	bne	.L3830
-	udiv	w0, w26, w3
-	msub	w0, w0, w3, w26
-	and	w0, w0, 255
-	strb	w0, [x27, 57]
-	sub	w3, w3, w0
-	and	w3, w3, 255
-	cmp	w25, w3
-	csel	w3, w25, w3, cc
-.L3843:
-	strb	w3, [x27, 56]
-.L3829:
-	ldr	x3, [x27, 8]
-	mov	x1, x22
-	ldrb	w0, [x27, 57]
-	sub	w20, w20, #1
-	ldrb	w2, [x27, 56]
-	ubfiz	x0, x0, 9, 8
-	lsl	w2, w2, 9
-	add	x0, x3, x0
+.L4055:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L4056
+	ldrh	w1, [x26, #:lo12:.LANCHOR155]
+	adrp	x0, .LC246
+	add	x0, x0, :lo12:.LC246
+	bl	printf
+.L4056:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L4057
+	ldrh	w1, [x25, #:lo12:.LANCHOR98]
+	adrp	x0, .LC247
+	add	x0, x0, :lo12:.LC247
+	bl	printf
+.L4057:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L4058
+	ldr	x0, [x29, 104]
+	ldrh	w1, [x0, #:lo12:.LANCHOR101]
+	adrp	x0, .LC248
+	add	x0, x0, :lo12:.LC248
+	bl	printf
+.L4058:
+	bl	zbuf_init
+	adrp	x25, .LANCHOR200
+	mov	w0, 16384
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR195
+	str	x0, [x1, #:lo12:.LANCHOR195]
+	mov	w0, 16384
+	bl	ftl_malloc
+	str	x0, [x25, #:lo12:.LANCHOR200]
+	mov	w0, 16384
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR190
+	str	x0, [x1, #:lo12:.LANCHOR190]
+	mov	w0, 6
+	ldrh	w1, [x23, #:lo12:.LANCHOR6]
+	mul	w0, w1, w0
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR4
+	str	x0, [x1, #:lo12:.LANCHOR4]
+	ldrb	w1, [x21, #:lo12:.LANCHOR80]
+	ldrh	w0, [x22, #:lo12:.LANCHOR95]
+	mul	w0, w0, w1
+	lsl	w0, w0, 2
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR118
+	ldr	x2, [x25, #:lo12:.LANCHOR200]
+	adrp	x25, .LANCHOR10
+	str	x0, [x1, #:lo12:.LANCHOR118]
+	adrp	x0, .LANCHOR117
+	ldrh	w1, [x22, #:lo12:.LANCHOR95]
+	str	x2, [x0, #:lo12:.LANCHOR117]
+	ldrb	w0, [x21, #:lo12:.LANCHOR80]
+	mul	w1, w1, w0
+	lsl	w0, w1, 1
+	adrp	x1, .LANCHOR9
+	add	x3, x2, x0, sxtw 2
+	str	x3, [x1, #:lo12:.LANCHOR9]
+	ldrh	w1, [x23, #:lo12:.LANCHOR6]
+	add	w1, w0, w1, lsr 1
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	add	x1, x2, x1, sxtw 2
+	str	x1, [x25, #:lo12:.LANCHOR10]
+	tbz	x0, 12, .L4059
+	adrp	x0, .LC249
+	add	x0, x0, :lo12:.LC249
+	bl	printf
+.L4059:
+	ldrh	w0, [x22, #:lo12:.LANCHOR95]
+	ldrb	w21, [x21, #:lo12:.LANCHOR80]
+	ldrh	w1, [x23, #:lo12:.LANCHOR6]
+	ldrh	w22, [x24, #:lo12:.LANCHOR204]
+	mul	w21, w0, w21
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	add	w21, w1, w21, lsl 2
+	lsl	w1, w1, 2
+	lsl	w21, w21, 1
+	add	w22, w1, w22, lsl 2
+	add	w21, w21, 632
+	add	w22, w22, 704
+	tbz	x0, 12, .L4060
+	ldrh	w3, [x20, #:lo12:.LANCHOR221]
+	adrp	x0, .LC250
+	mov	w2, w22
+	mov	w1, w21
+	add	x0, x0, :lo12:.LC250
+	bl	printf
+.L4060:
+	ldrh	w0, [x20, #:lo12:.LANCHOR221]
+	cmp	w21, w0
+	bhi	.L4061
+	cmp	w22, w0
+	bls	.L4062
+.L4061:
+.L4115:
+	b	.L4115
+.L4039:
+	add	w1, w1, 1
+	lsl	w3, w3, 1
+	and	w1, w1, 65535
+	b	.L4038
+.L4041:
+	add	w4, w4, 1
+	lsl	w1, w1, 1
+	and	w4, w4, 65535
+	b	.L4040
+.L4044:
+	adrp	x0, .LANCHOR36
+	ldrb	w0, [x0, #:lo12:.LANCHOR36]
+	cbz	w0, .L4047
+	mov	w0, 1200
+	strh	w10, [x11, #:lo12:.LANCHOR125]
+	strh	w0, [x12, #:lo12:.LANCHOR126]
+	strh	w10, [x8, #:lo12:.LANCHOR153]
+	b	.L4047
+.L4062:
+	bl	sblk_init
+	bl	ftl_info_blk_init
+	cmn	w0, #1
+	beq	.L4037
+	bl	ftl_ext_info_init
+	adrp	x19, .LANCHOR110
+	bl	gc_init
+	mov	w0, 1
+	bl	pm_init
+	bl	lpa_rebuild_hash
+	ldr	x0, [x25, #:lo12:.LANCHOR10]
+	mov	x1, 0
+	add	x0, x0, 16
+	bl	ftl_open_sblk_recovery
+	ldr	x0, [x25, #:lo12:.LANCHOR10]
+	add	x1, x0, 16
+	add	x0, x0, 48
+	bl	ftl_open_sblk_recovery
+	ldr	x1, [x19, #:lo12:.LANCHOR110]
+	ldr	w0, [x1, 8]
+	add	w0, w0, 16
+	str	w0, [x1, 8]
+	ldr	x0, [x25, #:lo12:.LANCHOR10]
+	add	x0, x0, 16
+	bl	ftl_info_data_recovery
+	ldr	x0, [x25, #:lo12:.LANCHOR10]
+	add	x0, x0, 48
+	bl	ftl_info_data_recovery
+	ldr	x0, [x25, #:lo12:.LANCHOR10]
+	add	x0, x0, 80
+	bl	ftl_info_data_recovery
+	bl	gc_recovery
+	bl	pm_flush
+	mov	w0, 1
+	bl	ftl_total_vpn_update
+	adrp	x0, .LANCHOR198
+	ldrb	w0, [x0, #:lo12:.LANCHOR198]
+	cbz	w0, .L4064
+	ldr	x1, [x19, #:lo12:.LANCHOR110]
+	ldr	w0, [x1, 68]
+	add	w0, w0, 1
+	str	w0, [x1, 68]
+.L4064:
+	bl	ftl_ext_info_flush
+	mov	w0, 0
+	bl	ftl_info_flush
+	bl	print_ftl_debug_info
+	ldr	x0, [x25, #:lo12:.LANCHOR10]
+	ldrh	w0, [x0, 124]
+	cbnz	w0, .L4071
+	adrp	x0, .LANCHOR103
+	adrp	x1, .LANCHOR107
+	ldrh	w0, [x0, #:lo12:.LANCHOR103]
+	ldrh	w1, [x1, #:lo12:.LANCHOR107]
+	add	w0, w0, w1
+	cmp	w0, 7
+	ble	.L4071
+.L4067:
+	mov	w0, 0
+.L4037:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L4071:
+	adrp	x20, .LANCHOR103
+	adrp	x21, .LANCHOR107
+	add	x20, x20, :lo12:.LANCHOR103
+	add	x21, x21, :lo12:.LANCHOR107
+	mov	w19, 16384
+.L4068:
+	mov	w1, 1
+	mov	w0, 0
+	bl	zftl_do_gc
+	mov	w1, 1
+	mov	w0, w1
+	bl	zftl_do_gc
+	ldr	x0, [x25, #:lo12:.LANCHOR10]
+	ldrh	w1, [x0, 124]
+	cbnz	w1, .L4066
+	ldrh	w1, [x0, 80]
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L4066
+	ldrh	w0, [x20]
+	ldrh	w1, [x21]
+	add	w0, w0, w1
+	cmp	w0, 7
+	bgt	.L4067
+.L4066:
+	subs	w19, w19, #1
+	bne	.L4068
+	b	.L4067
+	.size	zftl_init, .-zftl_init
+	.section	.text.rk_ftl_init,"ax",@progbits
+	.align	2
+	.global	rk_ftl_init
+	.type	rk_ftl_init, %function
+rk_ftl_init:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	bl	nand_flash_init
+	cbnz	w0, .L4119
+	bl	zftl_init
+.L4119:
+	mov	w19, w0
+	bl	idb_init
+	mov	w1, w19
+	adrp	x0, .LC251
+	add	x0, x0, :lo12:.LC251
+	bl	printf
+	mov	w0, w19
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	rk_ftl_init, .-rk_ftl_init
+	.section	.text.zftl_write,"ax",@progbits
+	.align	2
+	.global	zftl_write
+	.type	zftl_write, %function
+zftl_write:
+	stp	x29, x30, [sp, -112]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w19, w0
+	adrp	x0, .LANCHOR14
+	stp	x21, x22, [sp, 32]
+	stp	x25, x26, [sp, 64]
+	mov	w20, w1
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	mov	w21, w2
+	stp	x23, x24, [sp, 48]
+	mov	x25, x3
+	stp	x27, x28, [sp, 80]
+	tbz	x0, 12, .L4122
+	ldr	w4, [x25]
+	mov	w3, w2
+	adrp	x0, .LC252
+	mov	w2, w1
+	add	x0, x0, :lo12:.LC252
+	mov	w1, w19
+	bl	printf
+.L4122:
+	cbnz	w19, .L4123
+	adrp	x0, .LANCHOR68
+	mov	w19, 24576
+	ldr	w0, [x0, #:lo12:.LANCHOR68]
+.L4124:
+	cmp	w0, w20
+	ccmp	w0, w21, 0, hi
+	bcc	.L4142
+	add	w1, w20, w21
+	cmp	w0, w1
+	bcc	.L4142
+	adrp	x26, .LANCHOR131
+	add	w19, w19, w20
+	sub	w22, w21, #1
+	adrp	x27, .LANCHOR67
+	ldrb	w0, [x26, #:lo12:.LANCHOR131]
+	add	w22, w22, w19
+	adrp	x28, .LANCHOR58
+	add	x27, x27, :lo12:.LANCHOR67
+	add	x28, x28, :lo12:.LANCHOR58
+	udiv	w24, w19, w0
+	udiv	w22, w22, w0
+	add	x0, x26, :lo12:.LANCHOR131
+	str	x0, [x29, 104]
+	mov	w20, w24
+	sub	w23, w22, w24
+	add	w23, w23, 1
+.L4126:
+	cbnz	w23, .L4135
+	bl	ftl_write_commit
+	adrp	x20, .LANCHOR103
+	bl	ftl_flush
+	adrp	x19, .LANCHOR107
+	mov	w1, 1
+	mov	w0, 0
+	bl	zftl_do_gc
+	adrp	x0, .LANCHOR10
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	ldrh	w0, [x0, 124]
+	cbnz	w0, .L4136
+	ldrh	w0, [x20, #:lo12:.LANCHOR103]
+	ldrh	w1, [x19, #:lo12:.LANCHOR107]
+	add	w0, w0, w1
+	cmp	w0, 11
+	bgt	.L4137
+.L4136:
+	mov	w1, 1
+	mov	w0, 0
+	bl	zftl_do_gc
+.L4137:
+	add	x20, x20, :lo12:.LANCHOR103
+	add	x19, x19, :lo12:.LANCHOR107
+.L4138:
+	ldrh	w0, [x20]
+	ldrh	w1, [x19]
+	add	w0, w0, w1
+	cmp	w0, 7
+	ble	.L4139
+	mov	w0, 0
+.L4121:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L4123:
+	cmp	w19, 3
+	bhi	.L4142
+	lsl	w19, w19, 13
+	mov	w0, 8192
+	b	.L4124
+.L4135:
+	ldrb	w0, [x27]
+	cbz	w0, .L4127
+	ldrb	w0, [x28]
+	cmp	w0, 2
+	bhi	.L4127
+	bl	ftl_write_commit
+.L4127:
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x26, x0
+	cbnz	x0, .L4128
+	bl	ftl_write_commit
+	b	.L4126
+.L4128:
+	strb	wzr, [x0, 57]
+	cmp	w20, w24
+	ldr	x0, [x29, 104]
+	ccmp	w20, w22, 4, ne
+	ldrb	w0, [x0]
+	strb	w0, [x26, 56]
+	bne	.L4131
+	cmp	w20, w24
+	bne	.L4132
+	udiv	w1, w19, w0
+	msub	w1, w1, w0, w19
+	and	w1, w1, 255
+	strb	w1, [x26, 57]
+	sub	w0, w0, w1
+	and	w0, w0, 255
+	cmp	w21, w0
+	csel	w0, w21, w0, cc
+.L4150:
+	strb	w0, [x26, 56]
+.L4131:
+	ldr	x4, [x26, 8]
+	mov	x1, x25
+	ldrb	w0, [x26, 57]
+	sub	w23, w23, #1
+	ldrb	w2, [x26, 56]
+	ubfiz	x0, x0, 9, 8
+	lsl	w2, w2, 9
+	add	x0, x4, x0
 	bl	ftl_memcpy
-	ldr	x1, [x24, #:lo12:.LANCHOR104]
+	adrp	x0, .LANCHOR110
+	ldr	x1, [x0, #:lo12:.LANCHOR110]
 	ldr	w0, [x1, 8]
-	str	w28, [x27, 36]
-	add	w28, w28, 1
+	str	w20, [x26, 36]
+	add	w20, w20, 1
 	add	w2, w0, 1
 	str	w2, [x1, 8]
-	str	w0, [x27, 32]
-	mov	x0, x27
+	str	w0, [x26, 32]
+	mov	x0, x26
 	bl	ftl_write_buf
-	ldrb	w0, [x27, 56]
+	ldrb	w0, [x26, 56]
 	ubfiz	x0, x0, 9, 8
-	add	x22, x22, x0
-	b	.L3825
-.L3830:
-	ldr	w0, [x29, 108]
-	msub	w3, w3, w28, w0
-	b	.L3843
-.L3835:
+	add	x25, x25, x0
+	b	.L4126
+.L4132:
+	add	w1, w19, w21
+	msub	w0, w0, w20, w1
+	b	.L4150
+.L4139:
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
-	b	.L3834
-.L3838:
+	mov	w1, 1
+	mov	w0, w1
+	bl	zftl_do_gc
+	b	.L4138
+.L4142:
 	mov	w0, -1
-	b	.L3820
+	b	.L4121
 	.size	zftl_write, .-zftl_write
-	.section	.text.ftl_vendor_write,"ax",@progbits
+	.section	.text.zftl_sys_write,"ax",@progbits
 	.align	2
-	.global	ftl_vendor_write
-	.type	ftl_vendor_write, %function
-ftl_vendor_write:
+	.global	zftl_sys_write
+	.type	zftl_sys_write, %function
+zftl_sys_write:
 	mov	x3, x2
 	mov	w2, w1
-	add	w1, w0, 512
-	mov	w0, 2
-	b	zftl_write
-	.size	ftl_vendor_write, .-ftl_vendor_write
-	.section	.text.zftl_sys_write,"ax",@progbits
-	.align	2
-	.global	zftl_sys_write
-	.type	zftl_sys_write, %function
-zftl_sys_write:
-	mov	x3, x2
-	mov	w2, w1
-	mov	w1, w0
+	mov	w1, w0
 	mov	w0, 2
 	b	zftl_write
 	.size	zftl_sys_write, .-zftl_sys_write
@@ -24365,12 +26260,12 @@ ftl_write:
 	mov	x20, x3
 	mov	w22, w1
 	ands	w21, w0, 255
-	bne	.L3849
+	bne	.L4155
 	mov	w3, w2
 	mov	w0, 0
 	mov	x2, x20
 	bl	idb_write_data
-.L3849:
+.L4155:
 	mov	x3, x20
 	mov	w2, w19
 	mov	w1, w22
@@ -24380,6 +26275,24 @@ ftl_write:
 	ldp	x29, x30, [sp], 48
 	b	zftl_write
 	.size	ftl_write, .-ftl_write
+	.section	.text.ftl_vendor_write,"ax",@progbits
+	.align	2
+	.global	ftl_vendor_write
+	.type	ftl_vendor_write, %function
+ftl_vendor_write:
+	mov	x3, x2
+	mov	w2, w1
+	add	w1, w0, 512
+	mov	w0, 2
+	b	zftl_write
+	.size	ftl_vendor_write, .-ftl_vendor_write
+	.section	.text.zftl_vendor_write,"ax",@progbits
+	.align	2
+	.global	zftl_vendor_write
+	.type	zftl_vendor_write, %function
+zftl_vendor_write:
+	b	ftl_vendor_write
+	.size	zftl_vendor_write, .-zftl_vendor_write
 	.section	.text.zftl_discard,"ax",@progbits
 	.align	2
 	.global	zftl_discard
@@ -24389,46 +26302,46 @@ zftl_discard:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w19, w1
-	adrp	x1, .LANCHOR61
+	adrp	x1, .LANCHOR68
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	ldr	w1, [x1, #:lo12:.LANCHOR61]
+	ldr	w1, [x1, #:lo12:.LANCHOR68]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	cmp	w0, w1
 	ccmp	w19, w1, 2, cc
-	bhi	.L3873
+	bhi	.L4181
 	add	w2, w0, w19
 	cmp	w1, w2
-	bcc	.L3873
-	adrp	x24, .LANCHOR229
+	bcc	.L4181
+	adrp	x24, .LANCHOR241
 	add	w22, w0, 24576
 	adrp	x0, .LANCHOR14
 	str	x0, [x29, 104]
-	ldr	w1, [x24, #:lo12:.LANCHOR229]
+	ldr	w1, [x24, #:lo12:.LANCHOR241]
 	ldr	w2, [x0, #:lo12:.LANCHOR14]
 	add	w1, w19, w1
-	str	w1, [x24, #:lo12:.LANCHOR229]
-	tbz	x2, 12, .L3853
-	adrp	x0, .LC246
+	str	w1, [x24, #:lo12:.LANCHOR241]
+	tbz	x2, 12, .L4161
+	adrp	x0, .LC253
 	mov	w4, 0
 	mov	w3, w19
 	mov	w2, w22
-	add	x0, x0, :lo12:.LC246
+	add	x0, x0, :lo12:.LC253
 	bl	printf
-.L3853:
-	adrp	x23, .LANCHOR104
-	adrp	x26, .LANCHOR126
-	ldr	x0, [x23, #:lo12:.LANCHOR104]
+.L4161:
+	adrp	x23, .LANCHOR110
+	adrp	x26, .LANCHOR131
+	ldr	x0, [x23, #:lo12:.LANCHOR110]
 	ldr	w27, [x0, 8]
 	add	w1, w27, 1
 	str	w1, [x0, 8]
 	bl	ftl_write_commit
 	bl	ftl_flush
-	ldrb	w21, [x26, #:lo12:.LANCHOR126]
+	ldrb	w21, [x26, #:lo12:.LANCHOR131]
 	udiv	w20, w22, w21
 	msub	w25, w20, w21, w22
-	cbz	w25, .L3854
+	cbz	w25, .L4162
 	sub	w21, w21, w25
 	mov	w0, w20
 	cmp	w21, w19
@@ -24436,20 +26349,20 @@ zftl_discard:
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	bne	.L3855
+	bne	.L4163
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
-.L3855:
+.L4163:
 	ldr	w0, [x29, 120]
 	and	w28, w21, 65535
 	cmn	w0, #1
-	beq	.L3857
+	beq	.L4165
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x3, x0
-	cbz	x0, .L3857
+	cbz	x0, .L4165
 	strb	w25, [x0, 57]
 	ubfiz	x25, x25, 9, 25
 	strb	w21, [x0, 56]
@@ -24464,57 +26377,57 @@ zftl_discard:
 	mov	x0, x3
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-	ldr	x1, [x23, #:lo12:.LANCHOR104]
+	ldr	x1, [x23, #:lo12:.LANCHOR110]
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3857:
+.L4165:
 	add	w20, w20, 1
 	sub	w19, w19, w28
-.L3854:
-	cbz	w19, .L3859
+.L4162:
+	cbz	w19, .L4167
 	bl	ftl_flush
-.L3859:
-	adrp	x25, .LANCHOR68
-	add	x21, x26, :lo12:.LANCHOR126
-	add	x25, x25, :lo12:.LANCHOR68
+.L4167:
+	adrp	x25, .LANCHOR75
+	add	x21, x26, :lo12:.LANCHOR131
+	add	x25, x25, :lo12:.LANCHOR75
 	mov	w0, -1
 	str	w0, [x29, 124]
-.L3860:
+.L4168:
 	ldrb	w0, [x21]
 	cmp	w19, w0
-	bcs	.L3865
-	cbz	w19, .L3867
+	bcs	.L4173
+	cbz	w19, .L4175
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	bne	.L3868
+	bne	.L4176
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
-.L3868:
+.L4176:
 	ldr	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3867
+	beq	.L4175
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x21, x0
-	cbz	x0, .L3867
+	cbz	x0, .L4175
 	strb	wzr, [x0, 57]
 	strb	w19, [x0, 56]
 	stp	w27, w20, [x21, 32]
-	ldrb	w0, [x26, #:lo12:.LANCHOR126]
+	ldrb	w0, [x26, #:lo12:.LANCHOR131]
 	cmp	w19, w0
-	bcc	.L3870
-	adrp	x1, .LANCHOR230
+	bcc	.L4178
+	adrp	x1, .LANCHOR242
 	adrp	x0, .LC0
-	mov	w2, 1261
-	add	x1, x1, :lo12:.LANCHOR230
+	mov	w2, 1477
+	add	x1, x1, :lo12:.LANCHOR242
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3870:
+.L4178:
 	ldr	x0, [x21, 8]
 	lsl	w2, w19, 9
 	mov	w1, 0
@@ -24522,42 +26435,42 @@ zftl_discard:
 	mov	x0, x21
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-	ldr	x1, [x23, #:lo12:.LANCHOR104]
+	ldr	x1, [x23, #:lo12:.LANCHOR110]
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3867:
-	ldr	w1, [x24, #:lo12:.LANCHOR229]
+.L4175:
+	ldr	w1, [x24, #:lo12:.LANCHOR241]
 	cmp	w1, 8192
-	bls	.L3874
+	bls	.L4182
 	ldr	x0, [x29, 104]
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3871
-	adrp	x0, .LC246
+	tbz	x0, 12, .L4179
+	adrp	x0, .LC253
 	mov	w4, 0
 	mov	w3, w19
 	mov	w2, w22
-	add	x0, x0, :lo12:.LC246
+	add	x0, x0, :lo12:.LC253
 	bl	printf
-.L3871:
-	str	wzr, [x24, #:lo12:.LANCHOR229]
+.L4179:
+	str	wzr, [x24, #:lo12:.LANCHOR241]
 	bl	flt_sys_flush
-	adrp	x0, .LANCHOR116
+	adrp	x0, .LANCHOR122
 	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR116]
-.L3874:
+	str	w1, [x0, #:lo12:.LANCHOR122]
+.L4182:
 	mov	w0, 0
-	b	.L3851
-.L3865:
+	b	.L4159
+.L4173:
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3861
+	beq	.L4169
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbz	x0, .L3863
+	cbz	x0, .L4171
 	ldrb	w2, [x21]
 	mov	w1, 0
 	strb	w2, [x0, 56]
@@ -24569,31 +26482,31 @@ zftl_discard:
 	mov	x0, x28
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-.L3900:
-	ldr	x1, [x23, #:lo12:.LANCHOR104]
+.L4208:
+	ldr	x1, [x23, #:lo12:.LANCHOR110]
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3863:
+.L4171:
 	ldrb	w0, [x21]
 	add	w20, w20, 1
 	sub	w19, w19, w0
-	b	.L3860
-.L3861:
+	b	.L4168
+.L4169:
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
 	ldr	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3863
+	beq	.L4171
 	add	x1, x29, 124
 	mov	w2, 1
 	mov	w0, w20
 	bl	pm_log2phys
-	adrp	x0, .LANCHOR31
+	adrp	x0, .LANCHOR32
 	ldrh	w2, [x25]
-	ldrb	w1, [x0, #:lo12:.LANCHOR31]
+	ldrb	w1, [x0, #:lo12:.LANCHOR32]
 	mov	w0, 24
 	sub	w0, w0, w1
 	sub	w1, w0, w2
@@ -24603,14 +26516,14 @@ zftl_discard:
 	sub	w0, w0, #1
 	lsr	w1, w1, w2
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR69
-	ldrb	w1, [x1, #:lo12:.LANCHOR69]
+	adrp	x1, .LANCHOR76
+	ldrb	w1, [x1, #:lo12:.LANCHOR76]
 	udiv	w0, w0, w1
 	bl	ftl_vpn_decrement
-	b	.L3900
-.L3873:
+	b	.L4208
+.L4181:
 	mov	w0, -1
-.L3851:
+.L4159:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -24635,47 +26548,47 @@ ftl_discard:
 dump_pm_blk:
 	stp	x29, x30, [sp, -48]!
 	mov	w2, 4
-	adrp	x0, .LC247
-	add	x0, x0, :lo12:.LC247
+	adrp	x0, .LC254
+	add	x0, x0, :lo12:.LC254
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR104
+	adrp	x20, .LANCHOR110
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR151
-	ldr	x1, [x20, #:lo12:.LANCHOR104]
+	adrp	x21, .LANCHOR155
+	ldr	x1, [x20, #:lo12:.LANCHOR110]
 	mov	w19, 0
 	mov	w22, 65535
 	add	x1, x1, 704
 	ldrh	w3, [x1, -6]
 	bl	rknand_print_hex
-	ldrh	w3, [x21, #:lo12:.LANCHOR151]
-	add	x21, x21, :lo12:.LANCHOR151
-	ldr	x1, [x20, #:lo12:.LANCHOR104]
+	ldrh	w3, [x21, #:lo12:.LANCHOR155]
+	add	x21, x21, :lo12:.LANCHOR155
+	ldr	x1, [x20, #:lo12:.LANCHOR110]
 	mov	w2, 2
-	adrp	x0, .LC248
-	add	x0, x0, :lo12:.LC248
+	adrp	x0, .LC255
+	add	x0, x0, :lo12:.LC255
 	add	x1, x1, 416
 	bl	rknand_print_hex
-.L3903:
+.L4211:
 	ldrh	w0, [x21]
 	cmp	w0, w19
-	bhi	.L3905
+	bhi	.L4213
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L3905:
-	ldr	x0, [x20, #:lo12:.LANCHOR104]
+.L4213:
+	ldr	x0, [x20, #:lo12:.LANCHOR110]
 	add	x0, x0, x19, sxtw 1
 	ldrh	w0, [x0, 416]
 	cmp	w0, w22
-	beq	.L3904
+	beq	.L4212
 	mov	x1, 0
 	bl	ftl_sblk_dump
-.L3904:
+.L4212:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L3903
+	b	.L4211
 	.size	dump_pm_blk, .-dump_pm_blk
 	.global	g_pm_spare
 	.global	pm_first_write
@@ -24715,11 +26628,11 @@ dump_pm_blk:
 	.global	gp_ftl_ext_info
 	.global	gp_ftl_info
 	.global	gp_blk_info
-	.global	ftl_tmp_spare
-	.global	ftl_info_spare
+	.global	ftl_tmp_buffer
 	.global	ftl_ext_info_data_buffer
 	.global	ftl_info_data_buffer
-	.global	ftl_tmp_buffer
+	.global	ftl_tmp_spare
+	.global	ftl_info_spare
 	.global	g_ftl_info_blk
 	.global	tlc_b05a_prog_tbl
 	.global	tlc_prog_order
@@ -24735,6 +26648,7 @@ dump_pm_blk:
 	.global	gc_slc_data_index
 	.global	gc_free_slc_sblk_th
 	.global	gc_slc_mode_vpn_th
+	.global	gc_slc_mode_slc_vpn_th
 	.global	gc_slc_mode_tlc_vpn_th
 	.global	gc_tlc_mode_tlc_vpn_th
 	.global	gc_tlc_mode_slc_vpn_th
@@ -24743,6 +26657,7 @@ dump_pm_blk:
 	.global	p_read_ahead_ext_buf
 	.global	discard_sector_count
 	.global	read_ahead_lpa
+	.global	_ftl_gc_tag_page_num
 	.global	read_buf_count
 	.global	read_buf_head
 	.global	write_commit_count
@@ -24761,7 +26676,6 @@ dump_pm_blk:
 	.global	_last_write_time
 	.global	_last_read_time
 	.global	_min_slc_super_block
-	.global	_max_slc_super_block
 	.global	_max_xlc_super_block
 	.global	_c_max_pm_sblk
 	.global	_c_ftl_pm_page_num
@@ -24813,6 +26727,7 @@ dump_pm_blk:
 	.global	g_maxRegNum
 	.global	g_retryMode
 	.global	g_flash_toggle_mode_en
+	.global	g_flash_ymtc_3d_tlc_flag
 	.global	g_flash_micron_3d_tlc_b16a
 	.global	g_flash_micron_3d_tlc_b05a
 	.global	g_flash_micron_3d_tlc_flag
@@ -24827,6 +26742,7 @@ dump_pm_blk:
 	.global	g_slc_mode_addr2
 	.global	g_slc_mode_enable
 	.global	g_flash_cur_mode
+	.global	g_flash_six_addr
 	.global	g_flash_slc_mode
 	.global	g_slc_page_num
 	.global	g_totle_phy_block
@@ -24840,7 +26756,7 @@ dump_pm_blk:
 	.global	g_flash_page_buffer
 	.section	.bss.IDByte,"aw",@nobits
 	.align	2
-	.set	.LANCHOR44,. + 0
+	.set	.LANCHOR48,. + 0
 	.type	IDByte, %object
 	.size	IDByte, 32
 IDByte:
@@ -24854,27 +26770,27 @@ _c_ftl_blk_pre_plane:
 	.zero	2
 	.section	.bss._c_ftl_block_addr_log2,"aw",@nobits
 	.align	1
-	.set	.LANCHOR68,. + 0
+	.set	.LANCHOR75,. + 0
 	.type	_c_ftl_block_addr_log2, %object
 	.size	_c_ftl_block_addr_log2, 2
 _c_ftl_block_addr_log2:
 	.zero	2
 	.section	.bss._c_ftl_block_align_addr,"aw",@nobits
 	.align	1
-	.set	.LANCHOR105,. + 0
+	.set	.LANCHOR111,. + 0
 	.type	_c_ftl_block_align_addr, %object
 	.size	_c_ftl_block_align_addr, 2
 _c_ftl_block_align_addr:
 	.zero	2
 	.section	.bss._c_ftl_byte_pre_page,"aw",@nobits
 	.align	1
-	.set	.LANCHOR210,. + 0
+	.set	.LANCHOR221,. + 0
 	.type	_c_ftl_byte_pre_page, %object
 	.size	_c_ftl_byte_pre_page, 2
 _c_ftl_byte_pre_page:
 	.zero	2
 	.section	.bss._c_ftl_cs_bits,"aw",@nobits
-	.set	.LANCHOR31,. + 0
+	.set	.LANCHOR32,. + 0
 	.type	_c_ftl_cs_bits, %object
 	.size	_c_ftl_cs_bits, 1
 _c_ftl_cs_bits:
@@ -24886,7 +26802,7 @@ _c_ftl_cs_bits:
 _c_ftl_nand_blks_per_die:
 	.zero	2
 	.section	.bss._c_ftl_nand_die_num,"aw",@nobits
-	.set	.LANCHOR106,. + 0
+	.set	.LANCHOR112,. + 0
 	.type	_c_ftl_nand_die_num, %object
 	.size	_c_ftl_nand_die_num, 1
 _c_ftl_nand_die_num:
@@ -24898,61 +26814,61 @@ _c_ftl_nand_die_num:
 _c_ftl_nand_planes_num:
 	.zero	1
 	.section	.bss._c_ftl_nand_type,"aw",@nobits
-	.set	.LANCHOR73,. + 0
+	.set	.LANCHOR79,. + 0
 	.type	_c_ftl_nand_type, %object
 	.size	_c_ftl_nand_type, 1
 _c_ftl_nand_type:
 	.zero	1
 	.section	.bss._c_ftl_page_pre_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR79,. + 0
+	.set	.LANCHOR86,. + 0
 	.type	_c_ftl_page_pre_blk, %object
 	.size	_c_ftl_page_pre_blk, 2
 _c_ftl_page_pre_blk:
 	.zero	2
 	.section	.bss._c_ftl_page_pre_slc_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR87,. + 0
+	.set	.LANCHOR95,. + 0
 	.type	_c_ftl_page_pre_slc_blk, %object
 	.size	_c_ftl_page_pre_slc_blk, 2
 _c_ftl_page_pre_slc_blk:
 	.zero	2
 	.section	.bss._c_ftl_planes_per_die,"aw",@nobits
-	.set	.LANCHOR69,. + 0
+	.set	.LANCHOR76,. + 0
 	.type	_c_ftl_planes_per_die, %object
 	.size	_c_ftl_planes_per_die, 1
 _c_ftl_planes_per_die:
 	.zero	1
 	.section	.bss._c_ftl_pm_page_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR193,. + 0
+	.set	.LANCHOR204,. + 0
 	.type	_c_ftl_pm_page_num, %object
 	.size	_c_ftl_pm_page_num, 2
 _c_ftl_pm_page_num:
 	.zero	2
 	.section	.bss._c_ftl_sec_per_page,"aw",@nobits
-	.set	.LANCHOR126,. + 0
+	.set	.LANCHOR131,. + 0
 	.type	_c_ftl_sec_per_page, %object
 	.size	_c_ftl_sec_per_page, 1
 _c_ftl_sec_per_page:
 	.zero	1
 	.section	.bss._c_max_pm_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR151,. + 0
+	.set	.LANCHOR155,. + 0
 	.type	_c_max_pm_sblk, %object
 	.size	_c_max_pm_sblk, 2
 _c_max_pm_sblk:
 	.zero	2
 	.section	.bss._c_mix_max_slc_ec_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR121,. + 0
+	.set	.LANCHOR126,. + 0
 	.type	_c_mix_max_slc_ec_count, %object
 	.size	_c_mix_max_slc_ec_count, 2
 _c_mix_max_slc_ec_count:
 	.zero	2
 	.section	.bss._c_mix_max_xlc_ec_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR119,. + 0
+	.set	.LANCHOR125,. + 0
 	.type	_c_mix_max_xlc_ec_count, %object
 	.size	_c_mix_max_xlc_ec_count, 2
 _c_mix_max_xlc_ec_count:
@@ -24966,49 +26882,55 @@ _c_slc_to_xlc_ec_ratio:
 	.zero	2
 	.section	.bss._c_swl_slc_gc_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR150,. + 0
+	.set	.LANCHOR152,. + 0
 	.type	_c_swl_slc_gc_th, %object
 	.size	_c_swl_slc_gc_th, 2
 _c_swl_slc_gc_th:
 	.zero	2
 	.section	.bss._c_swl_xlc_gc_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR149,. + 0
+	.set	.LANCHOR153,. + 0
 	.type	_c_swl_xlc_gc_th, %object
 	.size	_c_swl_xlc_gc_th, 2
 _c_swl_xlc_gc_th:
 	.zero	2
 	.section	.bss._c_totle_data_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR215,. + 0
+	.set	.LANCHOR240,. + 0
 	.type	_c_totle_data_density, %object
 	.size	_c_totle_data_density, 4
 _c_totle_data_density:
 	.zero	4
 	.section	.bss._c_totle_log_page,"aw",@nobits
 	.align	2
-	.set	.LANCHOR123,. + 0
+	.set	.LANCHOR128,. + 0
 	.type	_c_totle_log_page, %object
 	.size	_c_totle_log_page, 4
 _c_totle_log_page:
 	.zero	4
 	.section	.bss._c_totle_phy_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR214,. + 0
+	.set	.LANCHOR239,. + 0
 	.type	_c_totle_phy_density, %object
 	.size	_c_totle_phy_density, 4
 _c_totle_phy_density:
 	.zero	4
 	.section	.bss._c_user_data_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR61,. + 0
+	.set	.LANCHOR68,. + 0
 	.type	_c_user_data_density, %object
 	.size	_c_user_data_density, 4
 _c_user_data_density:
 	.zero	4
+	.section	.bss._ftl_gc_tag_page_num,"aw",@nobits
+	.set	.LANCHOR224,. + 0
+	.type	_ftl_gc_tag_page_num, %object
+	.size	_ftl_gc_tag_page_num, 1
+_ftl_gc_tag_page_num:
+	.zero	1
 	.section	.bss._gc_after_discard_en,"aw",@nobits
 	.align	2
-	.set	.LANCHOR116,. + 0
+	.set	.LANCHOR122,. + 0
 	.type	_gc_after_discard_en, %object
 	.size	_gc_after_discard_en, 4
 _gc_after_discard_en:
@@ -25025,144 +26947,139 @@ _last_read_time:
 	.size	_last_write_time, 4
 _last_write_time:
 	.zero	4
-	.section	.bss._max_slc_super_block,"aw",@nobits
-	.align	1
-	.set	.LANCHOR120,. + 0
-	.type	_max_slc_super_block, %object
-	.size	_max_slc_super_block, 2
-_max_slc_super_block:
-	.zero	2
 	.section	.bss._max_xlc_super_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR95,. + 0
+	.set	.LANCHOR101,. + 0
 	.type	_max_xlc_super_block, %object
 	.size	_max_xlc_super_block, 2
 _max_xlc_super_block:
 	.zero	2
 	.section	.bss._min_slc_super_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR91,. + 0
+	.set	.LANCHOR98,. + 0
 	.type	_min_slc_super_block, %object
 	.size	_min_slc_super_block, 2
 _min_slc_super_block:
 	.zero	2
 	.section	.bss.discard_sector_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR229,. + 0
+	.set	.LANCHOR241,. + 0
 	.type	discard_sector_count, %object
 	.size	discard_sector_count, 4
 discard_sector_count:
 	.zero	4
 	.section	.bss.fill_spare_size,"aw",@nobits
 	.align	1
-	.set	.LANCHOR50,. + 0
+	.set	.LANCHOR54,. + 0
 	.type	fill_spare_size, %object
 	.size	fill_spare_size, 2
 fill_spare_size:
 	.zero	2
 	.section	.bss.flash_ddr_tuning_sdr_read_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR165,. + 0
+	.set	.LANCHOR172,. + 0
 	.type	flash_ddr_tuning_sdr_read_count, %object
 	.size	flash_ddr_tuning_sdr_read_count, 4
 flash_ddr_tuning_sdr_read_count:
 	.zero	4
 	.section	.bss.flash_read_retry,"aw",@nobits
 	.align	3
-	.set	.LANCHOR167,. + 0
+	.set	.LANCHOR174,. + 0
 	.type	flash_read_retry, %object
 	.size	flash_read_retry, 8
 flash_read_retry:
 	.zero	8
 	.section	.bss.free_buf_count,"aw",@nobits
-	.set	.LANCHOR54,. + 0
+	.set	.LANCHOR58,. + 0
 	.type	free_buf_count, %object
 	.size	free_buf_count, 1
 free_buf_count:
 	.zero	1
 	.section	.bss.free_mix_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR101,. + 0
+	.set	.LANCHOR107,. + 0
 	.type	free_mix_sblk, %object
 	.size	free_mix_sblk, 2
 free_mix_sblk:
 	.zero	2
 	.section	.bss.free_slc_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR97,. + 0
+	.set	.LANCHOR103,. + 0
 	.type	free_slc_sblk, %object
 	.size	free_slc_sblk, 2
 free_slc_sblk:
 	.zero	2
 	.section	.bss.free_xlc_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR99,. + 0
+	.set	.LANCHOR105,. + 0
 	.type	free_xlc_sblk, %object
 	.size	free_xlc_sblk, 2
 free_xlc_sblk:
 	.zero	2
 	.section	.bss.ftl_ext_info_data_buffer,"aw",@nobits
-	.align	6
+	.align	3
+	.set	.LANCHOR200,. + 0
 	.type	ftl_ext_info_data_buffer, %object
-	.size	ftl_ext_info_data_buffer, 16384
+	.size	ftl_ext_info_data_buffer, 8
 ftl_ext_info_data_buffer:
-	.zero	16384
+	.zero	8
 	.section	.bss.ftl_ext_info_first_write,"aw",@nobits
-	.set	.LANCHOR189,. + 0
+	.set	.LANCHOR199,. + 0
 	.type	ftl_ext_info_first_write, %object
 	.size	ftl_ext_info_first_write, 1
 ftl_ext_info_first_write:
 	.zero	1
 	.section	.bss.ftl_flush_jiffies,"aw",@nobits
 	.align	2
-	.set	.LANCHOR224,. + 0
+	.set	.LANCHOR233,. + 0
 	.type	ftl_flush_jiffies, %object
 	.size	ftl_flush_jiffies, 4
 ftl_flush_jiffies:
 	.zero	4
 	.section	.bss.ftl_info_data_buffer,"aw",@nobits
-	.align	6
+	.align	3
+	.set	.LANCHOR195,. + 0
 	.type	ftl_info_data_buffer, %object
-	.size	ftl_info_data_buffer, 16384
+	.size	ftl_info_data_buffer, 8
 ftl_info_data_buffer:
-	.zero	16384
+	.zero	8
 	.section	.bss.ftl_info_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR184,. + 0
+	.set	.LANCHOR193,. + 0
 	.type	ftl_info_spare, %object
 	.size	ftl_info_spare, 256
 ftl_info_spare:
 	.zero	256
 	.section	.bss.ftl_low_format_cur_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR62,. + 0
+	.set	.LANCHOR69,. + 0
 	.type	ftl_low_format_cur_blk, %object
 	.size	ftl_low_format_cur_blk, 2
 ftl_low_format_cur_blk:
 	.zero	2
 	.section	.bss.ftl_power_lost_flag,"aw",@nobits
-	.set	.LANCHOR188,. + 0
+	.set	.LANCHOR198,. + 0
 	.type	ftl_power_lost_flag, %object
 	.size	ftl_power_lost_flag, 1
 ftl_power_lost_flag:
 	.zero	1
 	.section	.bss.ftl_sblk_lpa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR111,. + 0
+	.set	.LANCHOR117,. + 0
 	.type	ftl_sblk_lpa_tbl, %object
 	.size	ftl_sblk_lpa_tbl, 8
 ftl_sblk_lpa_tbl:
 	.zero	8
 	.section	.bss.ftl_sblk_update_list,"aw",@nobits
 	.align	3
-	.set	.LANCHOR67,. + 0
+	.set	.LANCHOR74,. + 0
 	.type	ftl_sblk_update_list, %object
 	.size	ftl_sblk_update_list, 16
 ftl_sblk_update_list:
 	.zero	16
 	.section	.bss.ftl_sblk_update_list_offset,"aw",@nobits
 	.align	1
-	.set	.LANCHOR117,. + 0
+	.set	.LANCHOR123,. + 0
 	.type	ftl_sblk_update_list_offset, %object
 	.size	ftl_sblk_update_list_offset, 2
 ftl_sblk_update_list_offset:
@@ -25176,33 +27093,34 @@ ftl_sblk_vpn:
 	.zero	8
 	.section	.bss.ftl_sblk_vpn_update_id,"aw",@nobits
 	.align	1
-	.set	.LANCHOR66,. + 0
+	.set	.LANCHOR73,. + 0
 	.type	ftl_sblk_vpn_update_id, %object
 	.size	ftl_sblk_vpn_update_id, 2
 ftl_sblk_vpn_update_id:
 	.zero	2
 	.section	.bss.ftl_sys_info_first_write,"aw",@nobits
-	.set	.LANCHOR187,. + 0
+	.set	.LANCHOR197,. + 0
 	.type	ftl_sys_info_first_write, %object
 	.size	ftl_sys_info_first_write, 1
 ftl_sys_info_first_write:
 	.zero	1
 	.section	.bss.ftl_tmp_buffer,"aw",@nobits
-	.align	6
+	.align	3
+	.set	.LANCHOR190,. + 0
 	.type	ftl_tmp_buffer, %object
-	.size	ftl_tmp_buffer, 16384
+	.size	ftl_tmp_buffer, 8
 ftl_tmp_buffer:
-	.zero	16384
+	.zero	8
 	.section	.bss.ftl_tmp_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR182,. + 0
+	.set	.LANCHOR191,. + 0
 	.type	ftl_tmp_spare, %object
 	.size	ftl_tmp_spare, 256
 ftl_tmp_spare:
 	.zero	256
 	.section	.bss.ftl_vpn_update_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR115,. + 0
+	.set	.LANCHOR121,. + 0
 	.type	ftl_vpn_update_count, %object
 	.size	ftl_vpn_update_count, 2
 ftl_vpn_update_count:
@@ -25216,14 +27134,14 @@ g_block_align_addr:
 	.zero	2
 	.section	.bss.g_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR52,. + 0
+	.set	.LANCHOR56,. + 0
 	.type	g_buf, %object
 	.size	g_buf, 2048
 g_buf:
 	.zero	2048
 	.section	.bss.g_die_addr,"aw",@nobits
 	.align	2
-	.set	.LANCHOR145,. + 0
+	.set	.LANCHOR148,. + 0
 	.type	g_die_addr, %object
 	.size	g_die_addr, 32
 g_die_addr:
@@ -25236,79 +27154,85 @@ g_die_addr:
 g_die_cs_idx:
 	.zero	8
 	.section	.bss.g_flash_3d_mlc_flag,"aw",@nobits
-	.set	.LANCHOR74,. + 0
+	.set	.LANCHOR81,. + 0
 	.type	g_flash_3d_mlc_flag, %object
 	.size	g_flash_3d_mlc_flag, 1
 g_flash_3d_mlc_flag:
 	.zero	1
 	.section	.bss.g_flash_3d_tlc_flag,"aw",@nobits
-	.set	.LANCHOR77,. + 0
+	.set	.LANCHOR84,. + 0
 	.type	g_flash_3d_tlc_flag, %object
 	.size	g_flash_3d_tlc_flag, 1
 g_flash_3d_tlc_flag:
 	.zero	1
 	.section	.bss.g_flash_blk_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR201,. + 0
+	.set	.LANCHOR211,. + 0
 	.type	g_flash_blk_info, %object
 	.size	g_flash_blk_info, 4
 g_flash_blk_info:
 	.zero	4
 	.section	.bss.g_flash_cur_mode,"aw",@nobits
 	.align	3
-	.set	.LANCHOR33,. + 0
+	.set	.LANCHOR34,. + 0
 	.type	g_flash_cur_mode, %object
 	.size	g_flash_cur_mode, 4
 g_flash_cur_mode:
 	.zero	4
 	.section	.bss.g_flash_interface_mode,"aw",@nobits
-	.set	.LANCHOR45,. + 0
+	.set	.LANCHOR49,. + 0
 	.type	g_flash_interface_mode, %object
 	.size	g_flash_interface_mode, 1
 g_flash_interface_mode:
 	.zero	1
 	.section	.bss.g_flash_micron_3d_tlc_b05a,"aw",@nobits
-	.set	.LANCHOR118,. + 0
+	.set	.LANCHOR124,. + 0
 	.type	g_flash_micron_3d_tlc_b05a, %object
 	.size	g_flash_micron_3d_tlc_b05a, 1
 g_flash_micron_3d_tlc_b05a:
 	.zero	1
 	.section	.bss.g_flash_micron_3d_tlc_b16a,"aw",@nobits
-	.set	.LANCHOR207,. + 0
+	.set	.LANCHOR217,. + 0
 	.type	g_flash_micron_3d_tlc_b16a, %object
 	.size	g_flash_micron_3d_tlc_b16a, 1
 g_flash_micron_3d_tlc_b16a:
 	.zero	1
 	.section	.bss.g_flash_micron_3d_tlc_flag,"aw",@nobits
-	.set	.LANCHOR35,. + 0
+	.set	.LANCHOR36,. + 0
 	.type	g_flash_micron_3d_tlc_flag, %object
 	.size	g_flash_micron_3d_tlc_flag, 1
 g_flash_micron_3d_tlc_flag:
 	.zero	1
 	.section	.bss.g_flash_multi_page_prog_en,"aw",@nobits
-	.set	.LANCHOR41,. + 0
+	.set	.LANCHOR45,. + 0
 	.type	g_flash_multi_page_prog_en, %object
 	.size	g_flash_multi_page_prog_en, 1
 g_flash_multi_page_prog_en:
 	.zero	1
 	.section	.bss.g_flash_multi_page_read_en,"aw",@nobits
-	.set	.LANCHOR179,. + 0
+	.set	.LANCHOR186,. + 0
 	.type	g_flash_multi_page_read_en, %object
 	.size	g_flash_multi_page_read_en, 1
 g_flash_multi_page_read_en:
 	.zero	1
 	.section	.bss.g_flash_page_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR169,. + 0
+	.set	.LANCHOR176,. + 0
 	.type	g_flash_page_buffer, %object
 	.size	g_flash_page_buffer, 8
 g_flash_page_buffer:
 	.zero	8
 	.section	.bss.g_flash_reversd_blks,"aw",@nobits
-	.set	.LANCHOR206,. + 0
+	.set	.LANCHOR216,. + 0
 	.type	g_flash_reversd_blks, %object
 	.size	g_flash_reversd_blks, 1
 g_flash_reversd_blks:
+	.zero	1
+	.section	.bss.g_flash_six_addr,"aw",@nobits
+	.set	.LANCHOR31,. + 0
+	.type	g_flash_six_addr, %object
+	.size	g_flash_six_addr, 1
+g_flash_six_addr:
 	.zero	1
 	.section	.bss.g_flash_slc_mode,"aw",@nobits
 	.set	.LANCHOR0,. + 0
@@ -25318,28 +27242,28 @@ g_flash_slc_mode:
 	.zero	1
 	.section	.bss.g_flash_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR168,. + 0
+	.set	.LANCHOR175,. + 0
 	.type	g_flash_spare_buffer, %object
 	.size	g_flash_spare_buffer, 8
 g_flash_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_sys_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR200,. + 0
+	.set	.LANCHOR210,. + 0
 	.type	g_flash_sys_spare_buffer, %object
 	.size	g_flash_sys_spare_buffer, 8
 g_flash_sys_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_tmp_page_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR161,. + 0
+	.set	.LANCHOR166,. + 0
 	.type	g_flash_tmp_page_buffer, %object
 	.size	g_flash_tmp_page_buffer, 8
 g_flash_tmp_page_buffer:
 	.zero	8
 	.section	.bss.g_flash_tmp_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR163,. + 0
+	.set	.LANCHOR168,. + 0
 	.type	g_flash_tmp_spare_buffer, %object
 	.size	g_flash_tmp_spare_buffer, 8
 g_flash_tmp_spare_buffer:
@@ -25349,21 +27273,27 @@ g_flash_tmp_spare_buffer:
 	.type	g_flash_toggle_mode_en, %object
 	.size	g_flash_toggle_mode_en, 1
 g_flash_toggle_mode_en:
+	.zero	1
+	.section	.bss.g_flash_ymtc_3d_tlc_flag,"aw",@nobits
+	.set	.LANCHOR37,. + 0
+	.type	g_flash_ymtc_3d_tlc_flag, %object
+	.size	g_flash_ymtc_3d_tlc_flag, 1
+g_flash_ymtc_3d_tlc_flag:
 	.zero	1
 	.section	.bss.g_ftl_info_blk,"aw",@nobits
 	.align	6
-	.set	.LANCHOR185,. + 0
+	.set	.LANCHOR194,. + 0
 	.type	g_ftl_info_blk, %object
 	.size	g_ftl_info_blk, 4
 g_ftl_info_blk:
 	.zero	4
 	.section	.bss.g_gc_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR64,. + 0
+	.set	.LANCHOR71,. + 0
 	.type	g_gc_info, %object
-	.size	g_gc_info, 600
+	.size	g_gc_info, 2136
 g_gc_info:
-	.zero	600
+	.zero	2136
 	.section	.bss.g_idb_ecc_bits,"aw",@nobits
 	.set	.LANCHOR17,. + 0
 	.type	g_idb_ecc_bits, %object
@@ -25380,9 +27310,9 @@ g_idb_slc_mode_enable:
 	.align	2
 	.set	.LANCHOR3,. + 0
 	.type	g_lsb_page_tbl, %object
-	.size	g_lsb_page_tbl, 512
+	.size	g_lsb_page_tbl, 1024
 g_lsb_page_tbl:
-	.zero	512
+	.zero	1024
 	.section	.bss.g_maxRegNum,"aw",@nobits
 	.set	.LANCHOR26,. + 0
 	.type	g_maxRegNum, %object
@@ -25390,18 +27320,18 @@ g_lsb_page_tbl:
 g_maxRegNum:
 	.zero	1
 	.section	.bss.g_maxRetryCount,"aw",@nobits
-	.set	.LANCHOR164,. + 0
+	.set	.LANCHOR169,. + 0
 	.type	g_maxRetryCount, %object
 	.size	g_maxRetryCount, 1
 g_maxRetryCount:
 	.zero	1
 	.section	.bss.g_msb_page_tbl,"aw",@nobits
 	.align	2
-	.set	.LANCHOR142,. + 0
+	.set	.LANCHOR145,. + 0
 	.type	g_msb_page_tbl, %object
-	.size	g_msb_page_tbl, 1024
+	.size	g_msb_page_tbl, 2048
 g_msb_page_tbl:
-	.zero	1024
+	.zero	2048
 	.section	.bss.g_nand_max_die,"aw",@nobits
 	.set	.LANCHOR18,. + 0
 	.type	g_nand_max_die, %object
@@ -25416,20 +27346,20 @@ g_nand_max_die:
 g_nand_opt_para:
 	.zero	32
 	.section	.bss.g_nandc_ecc_bits,"aw",@nobits
-	.set	.LANCHOR46,. + 0
+	.set	.LANCHOR50,. + 0
 	.type	g_nandc_ecc_bits, %object
 	.size	g_nandc_ecc_bits, 1
 g_nandc_ecc_bits:
 	.zero	1
 	.section	.bss.g_nandc_tran_timeout,"aw",@nobits
-	.set	.LANCHOR162,. + 0
+	.set	.LANCHOR167,. + 0
 	.type	g_nandc_tran_timeout, %object
 	.size	g_nandc_tran_timeout, 1
 g_nandc_tran_timeout:
 	.zero	1
 	.section	.bss.g_nandc_v6_master_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR49,. + 0
+	.set	.LANCHOR53,. + 0
 	.type	g_nandc_v6_master_info, %object
 	.size	g_nandc_v6_master_info, 40
 g_nandc_v6_master_info:
@@ -25441,14 +27371,14 @@ g_nandc_v6_master_info:
 g_nandc_ver:
 	.zero	1
 	.section	.bss.g_one_pass_program,"aw",@nobits
-	.set	.LANCHOR75,. + 0
+	.set	.LANCHOR82,. + 0
 	.type	g_one_pass_program, %object
 	.size	g_one_pass_program, 1
 g_one_pass_program:
 	.zero	1
 	.section	.bss.g_pm_spare,"aw",@nobits
 	.align	3
-	.set	.LANCHOR197,. + 0
+	.set	.LANCHOR207,. + 0
 	.type	g_pm_spare, %object
 	.size	g_pm_spare, 8
 g_pm_spare:
@@ -25472,131 +27402,138 @@ g_slc_mode_enable:
 	.zero	1
 	.section	.bss.g_slc_page_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR144,. + 0
+	.set	.LANCHOR147,. + 0
 	.type	g_slc_page_num, %object
 	.size	g_slc_page_num, 2
 g_slc_page_num:
 	.zero	2
 	.section	.bss.g_totle_phy_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR146,. + 0
+	.set	.LANCHOR149,. + 0
 	.type	g_totle_phy_block, %object
 	.size	g_totle_phy_block, 2
 g_totle_phy_block:
 	.zero	2
 	.section	.bss.gc_des_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR159,. + 0
+	.set	.LANCHOR164,. + 0
 	.type	gc_des_ppa_tbl, %object
 	.size	gc_des_ppa_tbl, 8
 gc_des_ppa_tbl:
 	.zero	8
 	.section	.bss.gc_free_slc_sblk_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR81,. + 0
+	.set	.LANCHOR87,. + 0
 	.type	gc_free_slc_sblk_th, %object
 	.size	gc_free_slc_sblk_th, 2
 gc_free_slc_sblk_th:
 	.zero	2
 	.section	.bss.gc_lpa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR157,. + 0
+	.set	.LANCHOR162,. + 0
 	.type	gc_lpa_tbl, %object
 	.size	gc_lpa_tbl, 8
 gc_lpa_tbl:
 	.zero	8
 	.section	.bss.gc_mode,"aw",@nobits
-	.set	.LANCHOR78,. + 0
+	.set	.LANCHOR85,. + 0
 	.type	gc_mode, %object
 	.size	gc_mode, 1
 gc_mode:
 	.zero	1
 	.section	.bss.gc_page_buf_id,"aw",@nobits
 	.align	3
-	.set	.LANCHOR76,. + 0
+	.set	.LANCHOR83,. + 0
 	.type	gc_page_buf_id, %object
 	.size	gc_page_buf_id, 8
 gc_page_buf_id:
 	.zero	8
 	.section	.bss.gc_pre_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR158,. + 0
+	.set	.LANCHOR163,. + 0
 	.type	gc_pre_ppa_tbl, %object
 	.size	gc_pre_ppa_tbl, 8
 gc_pre_ppa_tbl:
 	.zero	8
 	.section	.bss.gc_search_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR156,. + 0
+	.set	.LANCHOR160,. + 0
 	.type	gc_search_count, %object
 	.size	gc_search_count, 4
 gc_search_count:
 	.zero	4
 	.section	.bss.gc_slc_cache_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR84,. + 0
+	.set	.LANCHOR91,. + 0
 	.type	gc_slc_cache_index, %object
 	.size	gc_slc_cache_index, 2
 gc_slc_cache_index:
 	.zero	2
 	.section	.bss.gc_slc_data_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR88,. + 0
+	.set	.LANCHOR90,. + 0
 	.type	gc_slc_data_index, %object
 	.size	gc_slc_data_index, 2
 gc_slc_data_index:
+	.zero	2
+	.section	.bss.gc_slc_mode_slc_vpn_th,"aw",@nobits
+	.align	1
+	.set	.LANCHOR161,. + 0
+	.type	gc_slc_mode_slc_vpn_th, %object
+	.size	gc_slc_mode_slc_vpn_th, 2
+gc_slc_mode_slc_vpn_th:
 	.zero	2
 	.section	.bss.gc_slc_mode_tlc_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR86,. + 0
+	.set	.LANCHOR94,. + 0
 	.type	gc_slc_mode_tlc_vpn_th, %object
 	.size	gc_slc_mode_tlc_vpn_th, 2
 gc_slc_mode_tlc_vpn_th:
 	.zero	2
 	.section	.bss.gc_slc_mode_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR63,. + 0
+	.set	.LANCHOR70,. + 0
 	.type	gc_slc_mode_vpn_th, %object
 	.size	gc_slc_mode_vpn_th, 2
 gc_slc_mode_vpn_th:
 	.zero	2
 	.section	.bss.gc_state,"aw",@nobits
-	.set	.LANCHOR155,. + 0
+	.set	.LANCHOR159,. + 0
 	.type	gc_state, %object
 	.size	gc_state, 1
 gc_state:
 	.zero	1
 	.section	.bss.gc_tlc_mode_slc_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR96,. + 0
+	.set	.LANCHOR102,. + 0
 	.type	gc_tlc_mode_slc_vpn_th, %object
 	.size	gc_tlc_mode_slc_vpn_th, 2
 gc_tlc_mode_slc_vpn_th:
 	.zero	2
 	.section	.bss.gc_tlc_mode_tlc_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR93,. + 0
+	.set	.LANCHOR100,. + 0
 	.type	gc_tlc_mode_tlc_vpn_th, %object
 	.size	gc_tlc_mode_tlc_vpn_th, 2
 gc_tlc_mode_tlc_vpn_th:
 	.zero	2
 	.section	.bss.gc_valid_page_ppa,"aw",@nobits
 	.align	3
-	.set	.LANCHOR70,. + 0
+	.set	.LANCHOR77,. + 0
 	.type	gc_valid_page_ppa, %object
 	.size	gc_valid_page_ppa, 8
 gc_valid_page_ppa:
 	.zero	8
 	.section	.bss.gc_xlc_data_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR85,. + 0
+	.set	.LANCHOR92,. + 0
 	.type	gc_xlc_data_index, %object
 	.size	gc_xlc_data_index, 2
 gc_xlc_data_index:
 	.zero	2
 	.section	.bss.gc_xlc_search_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR89,. + 0
+	.set	.LANCHOR96,. + 0
 	.type	gc_xlc_search_index, %object
 	.size	gc_xlc_search_index, 2
 gc_xlc_search_index:
@@ -25610,7 +27547,7 @@ gp_blk_info:
 	.zero	8
 	.section	.bss.gp_data_slc_cache_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR83,. + 0
+	.set	.LANCHOR89,. + 0
 	.type	gp_data_slc_cache_head, %object
 	.size	gp_data_slc_cache_head, 8
 gp_data_slc_cache_head:
@@ -25624,14 +27561,14 @@ gp_data_slc_data_head:
 	.zero	8
 	.section	.bss.gp_data_xlc_data_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR82,. + 0
+	.set	.LANCHOR88,. + 0
 	.type	gp_data_xlc_data_head, %object
 	.size	gp_data_xlc_data_head, 8
 gp_data_xlc_data_head:
 	.zero	8
 	.section	.bss.gp_flash_check_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR141,. + 0
+	.set	.LANCHOR144,. + 0
 	.type	gp_flash_check_buf, %object
 	.size	gp_flash_check_buf, 8
 gp_flash_check_buf:
@@ -25645,21 +27582,21 @@ gp_flash_info:
 	.zero	8
 	.section	.bss.gp_free_mix_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR102,. + 0
+	.set	.LANCHOR108,. + 0
 	.type	gp_free_mix_head, %object
 	.size	gp_free_mix_head, 8
 gp_free_mix_head:
 	.zero	8
 	.section	.bss.gp_free_slc_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR98,. + 0
+	.set	.LANCHOR104,. + 0
 	.type	gp_free_slc_head, %object
 	.size	gp_free_slc_head, 8
 gp_free_slc_head:
 	.zero	8
 	.section	.bss.gp_free_xlc_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR100,. + 0
+	.set	.LANCHOR106,. + 0
 	.type	gp_free_xlc_head, %object
 	.size	gp_free_xlc_head, 8
 gp_free_xlc_head:
@@ -25673,7 +27610,7 @@ gp_ftl_ext_info:
 	.zero	8
 	.section	.bss.gp_ftl_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR104,. + 0
+	.set	.LANCHOR110,. + 0
 	.type	gp_ftl_info, %object
 	.size	gp_ftl_info, 8
 gp_ftl_info:
@@ -25701,41 +27638,41 @@ gp_sblk_list_tbl:
 	.zero	8
 	.section	.bss.idb_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR138,. + 0
+	.set	.LANCHOR141,. + 0
 	.type	idb_buf, %object
 	.size	idb_buf, 8
 idb_buf:
 	.zero	8
 	.section	.bss.idb_last_lba,"aw",@nobits
 	.align	2
-	.set	.LANCHOR170,. + 0
+	.set	.LANCHOR177,. + 0
 	.type	idb_last_lba, %object
 	.size	idb_last_lba, 4
 idb_last_lba:
 	.zero	4
 	.section	.bss.idb_need_write_back,"aw",@nobits
 	.align	2
-	.set	.LANCHOR139,. + 0
+	.set	.LANCHOR142,. + 0
 	.type	idb_need_write_back, %object
 	.size	idb_need_write_back, 4
 idb_need_write_back:
 	.zero	4
 	.section	.bss.idb_write_enable,"aw",@nobits
-	.set	.LANCHOR140,. + 0
+	.set	.LANCHOR143,. + 0
 	.type	idb_write_enable, %object
 	.size	idb_write_enable, 1
 idb_write_enable:
 	.zero	1
 	.section	.bss.lpa_hash,"aw",@nobits
 	.align	3
-	.set	.LANCHOR110,. + 0
+	.set	.LANCHOR116,. + 0
 	.type	lpa_hash, %object
 	.size	lpa_hash, 512
 lpa_hash:
 	.zero	512
 	.section	.bss.lpa_hash_index,"aw",@nobits
 	.align	3
-	.set	.LANCHOR112,. + 0
+	.set	.LANCHOR118,. + 0
 	.type	lpa_hash_index, %object
 	.size	lpa_hash_index, 8
 lpa_hash_index:
@@ -25747,19 +27684,19 @@ lpa_hash_index:
 nandc_ecc_sts:
 	.zero	16
 	.section	.bss.nandc_hw_seed,"aw",@nobits
-	.set	.LANCHOR47,. + 0
+	.set	.LANCHOR51,. + 0
 	.type	nandc_hw_seed, %object
 	.size	nandc_hw_seed, 1
 nandc_hw_seed:
 	.zero	1
 	.section	.bss.nandc_randomizer_en,"aw",@nobits
-	.set	.LANCHOR48,. + 0
+	.set	.LANCHOR52,. + 0
 	.type	nandc_randomizer_en, %object
 	.size	nandc_randomizer_en, 1
 nandc_randomizer_en:
 	.zero	1
 	.section	.bss.p_free_buf_head,"aw",@nobits
-	.set	.LANCHOR53,. + 0
+	.set	.LANCHOR57,. + 0
 	.type	p_free_buf_head, %object
 	.size	p_free_buf_head, 1
 p_free_buf_head:
@@ -25771,142 +27708,142 @@ p_free_buf_head:
 p_read_ahead_ext_buf:
 	.zero	8
 	.section	.bss.pm_first_write,"aw",@nobits
-	.set	.LANCHOR198,. + 0
+	.set	.LANCHOR208,. + 0
 	.type	pm_first_write, %object
 	.size	pm_first_write, 1
 pm_first_write:
 	.zero	1
 	.section	.bss.pm_force_gc,"aw",@nobits
 	.align	2
-	.set	.LANCHOR148,. + 0
+	.set	.LANCHOR151,. + 0
 	.type	pm_force_gc, %object
 	.size	pm_force_gc, 4
 pm_force_gc:
 	.zero	4
 	.section	.bss.pm_gc_enable,"aw",@nobits
 	.align	2
-	.set	.LANCHOR133,. + 0
+	.set	.LANCHOR136,. + 0
 	.type	pm_gc_enable, %object
 	.size	pm_gc_enable, 4
 pm_gc_enable:
 	.zero	4
 	.section	.bss.pm_last_load_ram_id,"aw",@nobits
-	.set	.LANCHOR212,. + 0
+	.set	.LANCHOR223,. + 0
 	.type	pm_last_load_ram_id, %object
 	.size	pm_last_load_ram_id, 1
 pm_last_load_ram_id:
 	.zero	1
 	.section	.bss.pm_last_update_ram_id,"aw",@nobits
-	.set	.LANCHOR136,. + 0
+	.set	.LANCHOR139,. + 0
 	.type	pm_last_update_ram_id, %object
 	.size	pm_last_update_ram_id, 1
 pm_last_update_ram_id:
 	.zero	1
 	.section	.bss.pm_ram_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR135,. + 0
+	.set	.LANCHOR138,. + 0
 	.type	pm_ram_info, %object
 	.size	pm_ram_info, 512
 pm_ram_info:
 	.zero	512
 	.section	.bss.read_ahead_lpa,"aw",@nobits
 	.align	2
-	.set	.LANCHOR213,. + 0
+	.set	.LANCHOR238,. + 0
 	.type	read_ahead_lpa, %object
 	.size	read_ahead_lpa, 4
 read_ahead_lpa:
 	.zero	4
 	.section	.bss.read_buf_count,"aw",@nobits
-	.set	.LANCHOR130,. + 0
+	.set	.LANCHOR134,. + 0
 	.type	read_buf_count, %object
 	.size	read_buf_count, 1
 read_buf_count:
 	.zero	1
 	.section	.bss.read_buf_head,"aw",@nobits
-	.set	.LANCHOR129,. + 0
+	.set	.LANCHOR133,. + 0
 	.type	read_buf_head, %object
 	.size	read_buf_head, 1
 read_buf_head:
 	.zero	1
 	.section	.bss.sblk_gc_write_completed_queue_head,"aw",@nobits
-	.set	.LANCHOR71,. + 0
+	.set	.LANCHOR64,. + 0
 	.type	sblk_gc_write_completed_queue_head, %object
 	.size	sblk_gc_write_completed_queue_head, 1
 sblk_gc_write_completed_queue_head:
 	.zero	1
 	.section	.bss.sblk_queue_head,"aw",@nobits
-	.set	.LANCHOR56,. + 0
+	.set	.LANCHOR60,. + 0
 	.type	sblk_queue_head, %object
 	.size	sblk_queue_head, 1
 sblk_queue_head:
 	.zero	1
 	.section	.bss.sblk_read_completed_queue_head,"aw",@nobits
-	.set	.LANCHOR132,. + 0
+	.set	.LANCHOR63,. + 0
 	.type	sblk_read_completed_queue_head, %object
 	.size	sblk_read_completed_queue_head, 1
 sblk_read_completed_queue_head:
 	.zero	1
 	.section	.bss.sblk_write_completed_queue_head,"aw",@nobits
-	.set	.LANCHOR127,. + 0
+	.set	.LANCHOR65,. + 0
 	.type	sblk_write_completed_queue_head, %object
 	.size	sblk_write_completed_queue_head, 1
 sblk_write_completed_queue_head:
 	.zero	1
 	.section	.bss.slc_cache_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR90,. + 0
+	.set	.LANCHOR99,. + 0
 	.type	slc_cache_sblk, %object
 	.size	slc_cache_sblk, 2
 slc_cache_sblk:
 	.zero	2
 	.section	.bss.slc_data_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR92,. + 0
+	.set	.LANCHOR97,. + 0
 	.type	slc_data_sblk, %object
 	.size	slc_data_sblk, 2
 slc_data_sblk:
 	.zero	2
 	.section	.bss.write_buf_count,"aw",@nobits
-	.set	.LANCHOR60,. + 0
+	.set	.LANCHOR67,. + 0
 	.type	write_buf_count, %object
 	.size	write_buf_count, 1
 write_buf_count:
 	.zero	1
 	.section	.bss.write_buf_head,"aw",@nobits
-	.set	.LANCHOR59,. + 0
+	.set	.LANCHOR66,. + 0
 	.type	write_buf_head, %object
 	.size	write_buf_head, 1
 write_buf_head:
 	.zero	1
 	.section	.bss.write_commit_count,"aw",@nobits
-	.set	.LANCHOR124,. + 0
+	.set	.LANCHOR129,. + 0
 	.type	write_commit_count, %object
 	.size	write_commit_count, 1
 write_commit_count:
 	.zero	1
 	.section	.bss.write_commit_head,"aw",@nobits
-	.set	.LANCHOR178,. + 0
+	.set	.LANCHOR185,. + 0
 	.type	write_commit_head, %object
 	.size	write_commit_head, 1
 write_commit_head:
 	.zero	1
 	.section	.bss.xlc_data_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR94,. + 0
+	.set	.LANCHOR93,. + 0
 	.type	xlc_data_sblk, %object
 	.size	xlc_data_sblk, 2
 xlc_data_sblk:
 	.zero	2
 	.section	.bss.zftl_print_list_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR103,. + 0
+	.set	.LANCHOR109,. + 0
 	.type	zftl_print_list_count, %object
 	.size	zftl_print_list_count, 2
 zftl_print_list_count:
 	.zero	2
 	.section	.data.g_nand_para_info,"aw",@progbits
 	.align	3
-	.set	.LANCHOR32,. + 0
+	.set	.LANCHOR33,. + 0
 	.type	g_nand_para_info, %object
 	.size	g_nand_para_info, 32
 g_nand_para_info:
@@ -25940,7 +27877,7 @@ g_nand_para_info:
 	.byte	0
 	.section	.data.hy_f26_ref_value,"aw",@progbits
 	.align	3
-	.set	.LANCHOR160,. + 0
+	.set	.LANCHOR165,. + 0
 	.type	hy_f26_ref_value, %object
 	.size	hy_f26_ref_value, 28
 hy_f26_ref_value:
@@ -25974,7 +27911,7 @@ hy_f26_ref_value:
 	.byte	-37
 	.section	.data.nand_opt_para,"aw",@progbits
 	.align	3
-	.set	.LANCHOR205,. + 0
+	.set	.LANCHOR215,. + 0
 	.type	nand_opt_para, %object
 	.size	nand_opt_para, 128
 nand_opt_para:
@@ -26056,7 +27993,7 @@ nand_opt_para:
 	.zero	14
 	.section	.data.sd15_slc_rr,"aw",@progbits
 	.align	3
-	.set	.LANCHOR39,. + 0
+	.set	.LANCHOR41,. + 0
 	.type	sd15_slc_rr, %object
 	.size	sd15_slc_rr, 25
 sd15_slc_rr:
@@ -26087,7 +28024,7 @@ sd15_slc_rr:
 	.byte	112
 	.section	.data.sd15_tlc_rr,"aw",@progbits
 	.align	3
-	.set	.LANCHOR38,. + 0
+	.set	.LANCHOR40,. + 0
 	.type	sd15_tlc_rr, %object
 	.size	sd15_tlc_rr, 329
 sd15_tlc_rr:
@@ -26422,7 +28359,7 @@ sd15_tlc_rr:
 	.byte	0
 	.section	.data.tlc_b05a_prog_tbl,"aw",@progbits
 	.align	3
-	.set	.LANCHOR226,. + 0
+	.set	.LANCHOR235,. + 0
 	.type	tlc_b05a_prog_tbl, %object
 	.size	tlc_b05a_prog_tbl, 1536
 tlc_b05a_prog_tbl:
@@ -27196,7 +29133,7 @@ tlc_b05a_prog_tbl:
 	.hword	0
 	.section	.data.tlc_prog_order,"aw",@progbits
 	.align	3
-	.set	.LANCHOR227,. + 0
+	.set	.LANCHOR236,. + 0
 	.type	tlc_prog_order, %object
 	.size	tlc_prog_order, 768
 tlc_prog_order:
@@ -27593,9 +29530,9 @@ zftl_debug:
 	.word	17476
 	.section	.data.zftl_nand_flash_para_tbl,"aw",@progbits
 	.align	3
-	.set	.LANCHOR204,. + 0
+	.set	.LANCHOR214,. + 0
 	.type	zftl_nand_flash_para_tbl, %object
-	.size	zftl_nand_flash_para_tbl, 1472
+	.size	zftl_nand_flash_para_tbl, 1568
 zftl_nand_flash_para_tbl:
 	.byte	6
 	.byte	-104
@@ -27906,6 +29843,34 @@ zftl_nand_flash_para_tbl:
 	.byte	0
 	.byte	0
 	.byte	6
+	.byte	-104
+	.byte	-34
+	.byte	-108
+	.byte	-109
+	.byte	118
+	.byte	-47
+	.byte	1
+	.byte	1
+	.byte	32
+	.hword	256
+	.byte	2
+	.byte	2
+	.hword	1074
+	.hword	17881
+	.byte	2
+	.byte	35
+	.byte	40
+	.byte	32
+	.byte	3
+	.byte	1
+	.byte	4
+	.byte	0
+	.hword	256
+	.byte	1
+	.byte	-94
+	.byte	0
+	.byte	0
+	.byte	6
 	.byte	69
 	.byte	58
 	.byte	-108
@@ -28156,7 +30121,7 @@ zftl_nand_flash_para_tbl:
 	.byte	0
 	.byte	0
 	.byte	0
-	.byte	0
+	.byte	1
 	.byte	5
 	.byte	44
 	.byte	100
@@ -28265,7 +30230,7 @@ zftl_nand_flash_para_tbl:
 	.byte	4
 	.byte	0
 	.hword	512
-	.byte	2
+	.byte	1
 	.byte	-38
 	.byte	-33
 	.byte	0
@@ -28321,7 +30286,7 @@ zftl_nand_flash_para_tbl:
 	.byte	4
 	.byte	0
 	.hword	512
-	.byte	2
+	.byte	1
 	.byte	-38
 	.byte	-33
 	.byte	0
@@ -28349,7 +30314,7 @@ zftl_nand_flash_para_tbl:
 	.byte	4
 	.byte	0
 	.hword	512
-	.byte	2
+	.byte	1
 	.byte	-38
 	.byte	-33
 	.byte	0
@@ -28377,7 +30342,7 @@ zftl_nand_flash_para_tbl:
 	.byte	4
 	.byte	0
 	.hword	512
-	.byte	2
+	.byte	1
 	.byte	-38
 	.byte	-33
 	.byte	0
@@ -28517,11 +30482,39 @@ zftl_nand_flash_para_tbl:
 	.byte	1
 	.byte	0
 	.hword	1024
-	.byte	2
+	.byte	1
 	.byte	-38
 	.byte	-33
 	.byte	0
 	.byte	6
+	.byte	-101
+	.byte	-61
+	.byte	72
+	.byte	37
+	.byte	16
+	.byte	0
+	.byte	9
+	.byte	1
+	.byte	32
+	.hword	1152
+	.byte	3
+	.byte	2
+	.hword	1006
+	.hword	-27169
+	.byte	13
+	.byte	81
+	.byte	70
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	4
+	.byte	0
+	.hword	2048
+	.byte	1
+	.byte	-38
+	.byte	-33
+	.byte	24
+	.byte	6
 	.byte	-83
 	.byte	-34
 	.byte	20
@@ -28885,501 +30878,558 @@ zftl_nand_flash_para_tbl:
 	.byte	0
 	.byte	0
 	.byte	4
-	.section	.rodata.__func__.10018,"a",@progbits
+	.byte	6
+	.byte	-20
+	.byte	-34
+	.byte	-108
+	.byte	-61
+	.byte	-92
+	.byte	-54
+	.byte	0
+	.byte	1
+	.byte	32
+	.hword	792
+	.byte	2
+	.byte	1
+	.hword	688
+	.hword	1217
+	.byte	11
+	.byte	50
+	.byte	40
+	.byte	32
+	.byte	3
+	.byte	1
+	.byte	1
+	.byte	0
+	.hword	1024
+	.byte	1
+	.byte	-38
+	.byte	-33
+	.byte	0
+	.section	.rodata.__func__.10137,"a",@progbits
 	.align	3
-	.set	.LANCHOR209,. + 0
-	.type	__func__.10018, %object
-	.size	__func__.10018, 16
-__func__.10018:
-	.string	"load_l2p_region"
-	.section	.rodata.__func__.10034,"a",@progbits
+	.set	.LANCHOR225,. + 0
+	.type	__func__.10137, %object
+	.size	__func__.10137, 12
+__func__.10137:
+	.string	"gc_recovery"
+	.section	.rodata.__func__.10147,"a",@progbits
 	.align	3
-	.set	.LANCHOR152,. + 0
-	.type	__func__.10034, %object
-	.size	__func__.10034, 13
-__func__.10034:
-	.string	"pm_free_sblk"
-	.section	.rodata.__func__.10058,"a",@progbits
+	.set	.LANCHOR72,. + 0
+	.type	__func__.10147, %object
+	.size	__func__.10147, 12
+__func__.10147:
+	.string	"gc_add_sblk"
+	.section	.rodata.__func__.10194,"a",@progbits
 	.align	3
-	.set	.LANCHOR211,. + 0
-	.type	__func__.10058, %object
-	.size	__func__.10058, 6
-__func__.10058:
-	.string	"pm_gc"
-	.section	.rodata.__func__.10074,"a",@progbits
+	.set	.LANCHOR188,. + 0
+	.type	__func__.10194, %object
+	.size	__func__.10194, 21
+__func__.10194:
+	.string	"gc_check_data_one_wl"
+	.section	.rodata.__func__.10226,"a",@progbits
 	.align	3
-	.set	.LANCHOR134,. + 0
-	.type	__func__.10074, %object
-	.size	__func__.10074, 17
-__func__.10074:
-	.string	"pm_alloc_new_blk"
-	.section	.rodata.__func__.10084,"a",@progbits
+	.set	.LANCHOR226,. + 0
+	.type	__func__.10226, %object
+	.size	__func__.10226, 22
+__func__.10226:
+	.string	"gc_update_l2p_map_new"
+	.section	.rodata.__func__.10239,"a",@progbits
 	.align	3
-	.set	.LANCHOR196,. + 0
-	.type	__func__.10084, %object
-	.size	__func__.10084, 14
-__func__.10084:
-	.string	"pm_write_page"
-	.section	.rodata.__func__.10102,"a",@progbits
+	.set	.LANCHOR78,. + 0
+	.type	__func__.10239, %object
+	.size	__func__.10239, 19
+__func__.10239:
+	.string	"gc_write_completed"
+	.section	.rodata.__func__.10269,"a",@progbits
 	.align	3
-	.set	.LANCHOR137,. + 0
-	.type	__func__.10102, %object
-	.size	__func__.10102, 21
-__func__.10102:
-	.string	"pm_select_ram_region"
-	.section	.rodata.__func__.7564,"a",@progbits
+	.set	.LANCHOR234,. + 0
+	.type	__func__.10269, %object
+	.size	__func__.10269, 16
+__func__.10269:
+	.string	"gc_do_copy_back"
+	.section	.rodata.__func__.10296,"a",@progbits
 	.align	3
-	.set	.LANCHOR166,. + 0
-	.type	__func__.7564, %object
-	.size	__func__.7564, 19
-__func__.7564:
-	.string	"flash_read_page_en"
-	.section	.rodata.__func__.7606,"a",@progbits
+	.set	.LANCHOR127,. + 0
+	.type	__func__.10296, %object
+	.size	__func__.10296, 16
+__func__.10296:
+	.string	"gc_free_src_blk"
+	.section	.rodata.__func__.10340,"a",@progbits
 	.align	3
-	.set	.LANCHOR181,. + 0
-	.type	__func__.7606, %object
-	.size	__func__.7606, 19
-__func__.7606:
-	.string	"flash_prog_page_en"
-	.section	.rodata.__func__.7622,"a",@progbits
+	.set	.LANCHOR227,. + 0
+	.type	__func__.10340, %object
+	.size	__func__.10340, 16
+__func__.10340:
+	.string	"gc_scan_src_blk"
+	.section	.rodata.__func__.10401,"a",@progbits
 	.align	3
-	.set	.LANCHOR40,. + 0
-	.type	__func__.7622, %object
-	.size	__func__.7622, 26
-__func__.7622:
-	.string	"flash_erase_duplane_block"
-	.section	.rodata.__func__.7633,"a",@progbits
+	.set	.LANCHOR228,. + 0
+	.type	__func__.10401, %object
+	.size	__func__.10401, 20
+__func__.10401:
+	.string	"gc_scan_static_data"
+	.section	.rodata.__func__.10468,"a",@progbits
 	.align	3
-	.set	.LANCHOR42,. + 0
-	.type	__func__.7633, %object
-	.size	__func__.7633, 21
-__func__.7633:
-	.string	"flash_erase_block_en"
-	.section	.rodata.__func__.7647,"a",@progbits
+	.set	.LANCHOR237,. + 0
+	.type	__func__.10468, %object
+	.size	__func__.10468, 11
+__func__.10468:
+	.string	"zftl_do_gc"
+	.section	.rodata.__func__.10563,"a",@progbits
 	.align	3
-	.set	.LANCHOR29,. + 0
-	.type	__func__.7647, %object
-	.size	__func__.7647, 28
-__func__.7647:
-	.string	"flash_wait_device_ready_raw"
-	.section	.rodata.__func__.7671,"a",@progbits
+	.set	.LANCHOR5,. + 0
+	.type	__func__.10563, %object
+	.size	__func__.10563, 18
+__func__.10563:
+	.string	"_list_remove_node"
+	.section	.rodata.__func__.10588,"a",@progbits
 	.align	3
-	.set	.LANCHOR171,. + 0
-	.type	__func__.7671, %object
-	.size	__func__.7671, 26
-__func__.7671:
-	.string	"flash_start_tlc_page_prog"
-	.section	.rodata.__func__.7682,"a",@progbits
+	.set	.LANCHOR11,. + 0
+	.type	__func__.10588, %object
+	.size	__func__.10588, 23
+__func__.10588:
+	.string	"_list_update_data_list"
+	.section	.rodata.__func__.10663,"a",@progbits
 	.align	3
-	.set	.LANCHOR172,. + 0
-	.type	__func__.7682, %object
-	.size	__func__.7682, 29
-__func__.7682:
-	.string	"flash_start_3d_mlc_page_prog"
-	.section	.rodata.__func__.7700,"a",@progbits
+	.set	.LANCHOR154,. + 0
+	.type	__func__.10663, %object
+	.size	__func__.10663, 20
+__func__.10663:
+	.string	"zftl_sblk_list_init"
+	.section	.rodata.__func__.10697,"a",@progbits
 	.align	3
-	.set	.LANCHOR173,. + 0
-	.type	__func__.7700, %object
-	.size	__func__.7700, 22
-__func__.7700:
-	.string	"flash_start_page_prog"
-	.section	.rodata.__func__.7711,"a",@progbits
+	.set	.LANCHOR196,. + 0
+	.type	__func__.10697, %object
+	.size	__func__.10697, 15
+__func__.10697:
+	.string	"ftl_info_flush"
+	.section	.rodata.__func__.10729,"a",@progbits
 	.align	3
-	.set	.LANCHOR34,. + 0
-	.type	__func__.7711, %object
-	.size	__func__.7711, 22
-__func__.7711:
-	.string	"flash_start_page_read"
-	.section	.rodata.__func__.7724,"a",@progbits
+	.set	.LANCHOR135,. + 0
+	.type	__func__.10729, %object
+	.size	__func__.10729, 15
+__func__.10729:
+	.string	"ftl_alloc_sblk"
+	.section	.rodata.__func__.10771,"a",@progbits
 	.align	3
-	.set	.LANCHOR174,. + 0
-	.type	__func__.7724, %object
-	.size	__func__.7724, 31
-__func__.7724:
-	.string	"flash_complete_plane_page_read"
-	.section	.rodata.__func__.7736,"a",@progbits
+	.set	.LANCHOR113,. + 0
+	.type	__func__.10771, %object
+	.size	__func__.10771, 18
+__func__.10771:
+	.string	"ftl_alloc_sys_blk"
+	.section	.rodata.__func__.10781,"a",@progbits
 	.align	3
-	.set	.LANCHOR43,. + 0
-	.type	__func__.7736, %object
-	.size	__func__.7736, 23
-__func__.7736:
-	.string	"flash_start_plane_read"
-	.section	.rodata.__func__.7749,"a",@progbits
+	.set	.LANCHOR114,. + 0
+	.type	__func__.10781, %object
+	.size	__func__.10781, 17
+__func__.10781:
+	.string	"ftl_free_sys_blk"
+	.section	.rodata.__func__.10816,"a",@progbits
 	.align	3
-	.set	.LANCHOR175,. + 0
-	.type	__func__.7749, %object
-	.size	__func__.7749, 25
-__func__.7749:
-	.string	"flash_complete_page_read"
-	.section	.rodata.__func__.8094,"a",@progbits
+	.set	.LANCHOR229,. + 0
+	.type	__func__.10816, %object
+	.size	__func__.10816, 14
+__func__.10816:
+	.string	"ftl_sblk_dump"
+	.section	.rodata.__func__.10840,"a",@progbits
 	.align	3
-	.set	.LANCHOR143,. + 0
-	.type	__func__.8094, %object
-	.size	__func__.8094, 20
-__func__.8094:
-	.string	"flash_die_info_init"
-	.section	.rodata.__func__.8104,"a",@progbits
+	.set	.LANCHOR218,. + 0
+	.type	__func__.10840, %object
+	.size	__func__.10840, 16
+__func__.10840:
+	.string	"ftl_sysblk_dump"
+	.section	.rodata.__func__.10865,"a",@progbits
 	.align	3
-	.set	.LANCHOR15,. + 0
-	.type	__func__.8104, %object
-	.size	__func__.8104, 22
-__func__.8104:
-	.string	"nand_flash_print_info"
-	.section	.rodata.__func__.8149,"a",@progbits
+	.set	.LANCHOR219,. + 0
+	.type	__func__.10865, %object
+	.size	__func__.10865, 23
+__func__.10865:
+	.string	"ftl_open_sblk_recovery"
+	.section	.rodata.__func__.10898,"a",@progbits
 	.align	3
-	.set	.LANCHOR203,. + 0
-	.type	__func__.8149, %object
-	.size	__func__.8149, 16
-__func__.8149:
-	.string	"nand_flash_init"
-	.section	.rodata.__func__.8172,"a",@progbits
+	.set	.LANCHOR115,. + 0
+	.type	__func__.10898, %object
+	.size	__func__.10898, 23
+__func__.10898:
+	.string	"ftl_get_ppa_from_index"
+	.section	.rodata.__func__.10919,"a",@progbits
 	.align	3
-	.set	.LANCHOR154,. + 0
-	.type	__func__.8172, %object
-	.size	__func__.8172, 11
-__func__.8172:
-	.string	"nandc_init"
-	.section	.rodata.__func__.8341,"a",@progbits
+	.set	.LANCHOR231,. + 0
+	.type	__func__.10919, %object
+	.size	__func__.10919, 19
+__func__.10919:
+	.string	"ftl_update_l2p_map"
+	.section	.rodata.__func__.10938,"a",@progbits
 	.align	3
-	.set	.LANCHOR55,. + 0
-	.type	__func__.8341, %object
-	.size	__func__.8341, 13
-__func__.8341:
-	.string	"buf_add_tail"
-	.section	.rodata.__func__.8354,"a",@progbits
+	.set	.LANCHOR119,. + 0
+	.type	__func__.10938, %object
+	.size	__func__.10938, 22
+__func__.10938:
+	.string	"ftl_get_new_free_page"
+	.section	.rodata.__func__.10949,"a",@progbits
 	.align	3
-	.set	.LANCHOR57,. + 0
-	.type	__func__.8354, %object
-	.size	__func__.8354, 10
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-	.string	"buf_alloc"
-	.section	.rodata.__func__.8368,"a",@progbits
+	.set	.LANCHOR120,. + 0
+	.type	__func__.10949, %object
+	.size	__func__.10949, 22
+__func__.10949:
+	.string	"ftl_ext_alloc_new_blk"
+	.section	.rodata.__func__.10975,"a",@progbits
 	.align	3
-	.set	.LANCHOR58,. + 0
-	.type	__func__.8368, %object
-	.size	__func__.8368, 16
-__func__.8368:
-	.string	"buf_remove_free"
-	.section	.rodata.__func__.8381,"a",@progbits
+	.set	.LANCHOR201,. + 0
+	.type	__func__.10975, %object
+	.size	__func__.10975, 19
+__func__.10975:
+	.string	"ftl_ext_info_flush"
+	.section	.rodata.__func__.10987,"a",@progbits
 	.align	3
 	.set	.LANCHOR202,. + 0
-	.type	__func__.8381, %object
-	.size	__func__.8381, 20
-__func__.8381:
-	.string	"flash_info_blk_init"
-	.section	.rodata.__func__.8392,"a",@progbits
+	.type	__func__.10987, %object
+	.size	__func__.10987, 18
+__func__.10987:
+	.string	"ftl_ext_info_init"
+	.section	.rodata.__func__.11026,"a",@progbits
 	.align	3
-	.set	.LANCHOR153,. + 0
-	.type	__func__.8392, %object
-	.size	__func__.8392, 21
-__func__.8392:
-	.string	"flash_info_data_init"
-	.section	.rodata.__func__.8414,"a",@progbits
+	.set	.LANCHOR203,. + 0
+	.type	__func__.11026, %object
+	.size	__func__.11026, 25
+__func__.11026:
+	.string	"ftl_low_format_data_init"
+	.section	.rodata.__func__.11041,"a",@progbits
 	.align	3
-	.set	.LANCHOR199,. + 0
-	.type	__func__.8414, %object
-	.size	__func__.8414, 17
-__func__.8414:
-	.string	"flash_info_flush"
-	.section	.rodata.__func__.8490,"a",@progbits
+	.set	.LANCHOR205,. + 0
+	.type	__func__.11041, %object
+	.size	__func__.11041, 15
+__func__.11041:
+	.string	"ftl_low_format"
+	.section	.rodata.__func__.11089,"a",@progbits
 	.align	3
-	.set	.LANCHOR147,. + 0
-	.type	__func__.8490, %object
-	.size	__func__.8490, 17
-__func__.8490:
-	.string	"lpa_rebuild_hash"
-	.section	.rodata.__func__.8537,"a",@progbits
+	.set	.LANCHOR192,. + 0
+	.type	__func__.11089, %object
+	.size	__func__.11089, 14
+__func__.11089:
+	.string	"ftl_prog_page"
+	.section	.rodata.__func__.11212,"a",@progbits
 	.align	3
-	.set	.LANCHOR223,. + 0
-	.type	__func__.8537, %object
-	.size	__func__.8537, 17
-__func__.8537:
-	.string	"ftl_write_commit"
-	.section	.rodata.__func__.8555,"a",@progbits
+	.set	.LANCHOR183,. + 0
+	.type	__func__.11212, %object
+	.size	__func__.11212, 31
+__func__.11212:
+	.string	"queue_wait_first_req_completed"
+	.section	.rodata.__func__.11266,"a",@progbits
 	.align	3
-	.set	.LANCHOR125,. + 0
-	.type	__func__.8555, %object
-	.size	__func__.8555, 14
-__func__.8555:
-	.string	"ftl_write_buf"
-	.section	.rodata.__func__.8600,"a",@progbits
+	.set	.LANCHOR184,. + 0
+	.type	__func__.11266, %object
+	.size	__func__.11266, 15
+__func__.11266:
+	.string	"sblk_prog_page"
+	.section	.rodata.__func__.11293,"a",@progbits
 	.align	3
-	.set	.LANCHOR128,. + 0
-	.type	__func__.8600, %object
-	.size	__func__.8600, 18
-__func__.8600:
-	.string	"zftl_add_read_buf"
-	.section	.rodata.__func__.8633,"a",@progbits
+	.set	.LANCHOR187,. + 0
+	.type	__func__.11293, %object
+	.size	__func__.11293, 15
+__func__.11293:
+	.string	"sblk_read_page"
+	.section	.rodata.__func__.11363,"a",@progbits
 	.align	3
 	.set	.LANCHOR220,. + 0
-	.type	__func__.8633, %object
-	.size	__func__.8633, 10
-__func__.8633:
-	.string	"zftl_read"
-	.section	.rodata.__func__.8664,"a",@progbits
+	.type	__func__.11363, %object
+	.size	__func__.11363, 16
+__func__.11363:
+	.string	"load_l2p_region"
+	.section	.rodata.__func__.11379,"a",@progbits
 	.align	3
-	.set	.LANCHOR230,. + 0
-	.type	__func__.8664, %object
-	.size	__func__.8664, 13
-__func__.8664:
-	.string	"_ftl_discard"
-	.section	.rodata.__func__.8816,"a",@progbits
+	.set	.LANCHOR156,. + 0
+	.type	__func__.11379, %object
+	.size	__func__.11379, 13
+__func__.11379:
+	.string	"pm_free_sblk"
+	.section	.rodata.__func__.11403,"a",@progbits
 	.align	3
-	.set	.LANCHOR65,. + 0
-	.type	__func__.8816, %object
-	.size	__func__.8816, 12
-__func__.8816:
-	.string	"gc_add_sblk"
-	.section	.rodata.__func__.8863,"a",@progbits
+	.set	.LANCHOR222,. + 0
+	.type	__func__.11403, %object
+	.size	__func__.11403, 6
+__func__.11403:
+	.string	"pm_gc"
+	.section	.rodata.__func__.11419,"a",@progbits
 	.align	3
-	.set	.LANCHOR221,. + 0
-	.type	__func__.8863, %object
-	.size	__func__.8863, 21
-__func__.8863:
-	.string	"gc_check_data_one_wl"
-	.section	.rodata.__func__.8897,"a",@progbits
+	.set	.LANCHOR137,. + 0
+	.type	__func__.11419, %object
+	.size	__func__.11419, 17
+__func__.11419:
+	.string	"pm_alloc_new_blk"
+	.section	.rodata.__func__.11429,"a",@progbits
 	.align	3
-	.set	.LANCHOR216,. + 0
-	.type	__func__.8897, %object
-	.size	__func__.8897, 22
-__func__.8897:
-	.string	"gc_update_l2p_map_new"
-	.section	.rodata.__func__.8910,"a",@progbits
+	.set	.LANCHOR206,. + 0
+	.type	__func__.11429, %object
+	.size	__func__.11429, 14
+__func__.11429:
+	.string	"pm_write_page"
+	.section	.rodata.__func__.11447,"a",@progbits
 	.align	3
-	.set	.LANCHOR72,. + 0
-	.type	__func__.8910, %object
-	.size	__func__.8910, 19
-__func__.8910:
-	.string	"gc_write_completed"
-	.section	.rodata.__func__.8939,"a",@progbits
+	.set	.LANCHOR140,. + 0
+	.type	__func__.11447, %object
+	.size	__func__.11447, 21
+__func__.11447:
+	.string	"pm_select_ram_region"
+	.section	.rodata.__func__.8787,"a",@progbits
 	.align	3
-	.set	.LANCHOR225,. + 0
-	.type	__func__.8939, %object
-	.size	__func__.8939, 16
-__func__.8939:
-	.string	"gc_do_copy_back"
-	.section	.rodata.__func__.8966,"a",@progbits
+	.set	.LANCHOR173,. + 0
+	.type	__func__.8787, %object
+	.size	__func__.8787, 19
+__func__.8787:
+	.string	"flash_read_page_en"
+	.section	.rodata.__func__.8848,"a",@progbits
 	.align	3
-	.set	.LANCHOR122,. + 0
-	.type	__func__.8966, %object
-	.size	__func__.8966, 16
-__func__.8966:
-	.string	"gc_free_src_blk"
-	.section	.rodata.__func__.9010,"a",@progbits
+	.set	.LANCHOR189,. + 0
+	.type	__func__.8848, %object
+	.size	__func__.8848, 19
+__func__.8848:
+	.string	"flash_prog_page_en"
+	.section	.rodata.__func__.8864,"a",@progbits
 	.align	3
-	.set	.LANCHOR217,. + 0
-	.type	__func__.9010, %object
-	.size	__func__.9010, 16
-__func__.9010:
-	.string	"gc_scan_src_blk"
-	.section	.rodata.__func__.9068,"a",@progbits
+	.set	.LANCHOR44,. + 0
+	.type	__func__.8864, %object
+	.size	__func__.8864, 26
+__func__.8864:
+	.string	"flash_erase_duplane_block"
+	.section	.rodata.__func__.8875,"a",@progbits
 	.align	3
-	.set	.LANCHOR218,. + 0
-	.type	__func__.9068, %object
-	.size	__func__.9068, 20
-__func__.9068:
-	.string	"gc_scan_static_data"
-	.section	.rodata.__func__.9135,"a",@progbits
+	.set	.LANCHOR46,. + 0
+	.type	__func__.8875, %object
+	.size	__func__.8875, 21
+__func__.8875:
+	.string	"flash_erase_block_en"
+	.section	.rodata.__func__.8889,"a",@progbits
 	.align	3
-	.set	.LANCHOR228,. + 0
-	.type	__func__.9135, %object
-	.size	__func__.9135, 11
-__func__.9135:
-	.string	"zftl_do_gc"
-	.section	.rodata.__func__.9228,"a",@progbits
+	.set	.LANCHOR29,. + 0
+	.type	__func__.8889, %object
+	.size	__func__.8889, 28
+__func__.8889:
+	.string	"flash_wait_device_ready_raw"
+	.section	.rodata.__func__.8913,"a",@progbits
 	.align	3
-	.set	.LANCHOR5,. + 0
-	.type	__func__.9228, %object
-	.size	__func__.9228, 18
-__func__.9228:
-	.string	"_list_remove_node"
-	.section	.rodata.__func__.9253,"a",@progbits
+	.set	.LANCHOR178,. + 0
+	.type	__func__.8913, %object
+	.size	__func__.8913, 26
+__func__.8913:
+	.string	"flash_start_tlc_page_prog"
+	.section	.rodata.__func__.8924,"a",@progbits
 	.align	3
-	.set	.LANCHOR11,. + 0
-	.type	__func__.9253, %object
-	.size	__func__.9253, 23
-__func__.9253:
-	.string	"_list_update_data_list"
-	.section	.rodata.__func__.9361,"a",@progbits
+	.set	.LANCHOR179,. + 0
+	.type	__func__.8924, %object
+	.size	__func__.8924, 29
+__func__.8924:
+	.string	"flash_start_3d_mlc_page_prog"
+	.section	.rodata.__func__.8942,"a",@progbits
 	.align	3
-	.set	.LANCHOR186,. + 0
-	.type	__func__.9361, %object
-	.size	__func__.9361, 15
-__func__.9361:
-	.string	"ftl_info_flush"
-	.section	.rodata.__func__.9393,"a",@progbits
+	.set	.LANCHOR180,. + 0
+	.type	__func__.8942, %object
+	.size	__func__.8942, 22
+__func__.8942:
+	.string	"flash_start_page_prog"
+	.section	.rodata.__func__.8953,"a",@progbits
 	.align	3
-	.set	.LANCHOR131,. + 0
-	.type	__func__.9393, %object
-	.size	__func__.9393, 15
-__func__.9393:
-	.string	"ftl_alloc_sblk"
-	.section	.rodata.__func__.9435,"a",@progbits
+	.set	.LANCHOR35,. + 0
+	.type	__func__.8953, %object
+	.size	__func__.8953, 22
+__func__.8953:
+	.string	"flash_start_page_read"
+	.section	.rodata.__func__.8966,"a",@progbits
 	.align	3
-	.set	.LANCHOR107,. + 0
-	.type	__func__.9435, %object
-	.size	__func__.9435, 18
-__func__.9435:
-	.string	"ftl_alloc_sys_blk"
-	.section	.rodata.__func__.9445,"a",@progbits
+	.set	.LANCHOR181,. + 0
+	.type	__func__.8966, %object
+	.size	__func__.8966, 31
+__func__.8966:
+	.string	"flash_complete_plane_page_read"
+	.section	.rodata.__func__.8978,"a",@progbits
 	.align	3
-	.set	.LANCHOR108,. + 0
-	.type	__func__.9445, %object
-	.size	__func__.9445, 17
-__func__.9445:
-	.string	"ftl_free_sys_blk"
-	.section	.rodata.__func__.9480,"a",@progbits
+	.set	.LANCHOR47,. + 0
+	.type	__func__.8978, %object
+	.size	__func__.8978, 23
+__func__.8978:
+	.string	"flash_start_plane_read"
+	.section	.rodata.__func__.8991,"a",@progbits
 	.align	3
-	.set	.LANCHOR219,. + 0
-	.type	__func__.9480, %object
-	.size	__func__.9480, 14
-__func__.9480:
-	.string	"ftl_sblk_dump"
-	.section	.rodata.__func__.9504,"a",@progbits
+	.set	.LANCHOR182,. + 0
+	.type	__func__.8991, %object
+	.size	__func__.8991, 25
+__func__.8991:
+	.string	"flash_complete_page_read"
+	.section	.rodata.__func__.9406,"a",@progbits
 	.align	3
-	.set	.LANCHOR208,. + 0
-	.type	__func__.9504, %object
-	.size	__func__.9504, 16
-__func__.9504:
-	.string	"ftl_sysblk_dump"
-	.section	.rodata.__func__.9528,"a",@progbits
+	.set	.LANCHOR146,. + 0
+	.type	__func__.9406, %object
+	.size	__func__.9406, 20
+__func__.9406:
+	.string	"flash_die_info_init"
+	.section	.rodata.__func__.9416,"a",@progbits
 	.align	3
-	.set	.LANCHOR195,. + 0
-	.type	__func__.9528, %object
-	.size	__func__.9528, 23
-__func__.9528:
-	.string	"ftl_open_sblk_recovery"
-	.section	.rodata.__func__.9561,"a",@progbits
+	.set	.LANCHOR15,. + 0
+	.type	__func__.9416, %object
+	.size	__func__.9416, 22
+__func__.9416:
+	.string	"nand_flash_print_info"
+	.section	.rodata.__func__.9461,"a",@progbits
 	.align	3
-	.set	.LANCHOR109,. + 0
-	.type	__func__.9561, %object
-	.size	__func__.9561, 23
-__func__.9561:
-	.string	"ftl_get_ppa_from_index"
-	.section	.rodata.__func__.9582,"a",@progbits
+	.set	.LANCHOR213,. + 0
+	.type	__func__.9461, %object
+	.size	__func__.9461, 16
+__func__.9461:
+	.string	"nand_flash_init"
+	.section	.rodata.__func__.9484,"a",@progbits
 	.align	3
-	.set	.LANCHOR222,. + 0
-	.type	__func__.9582, %object
-	.size	__func__.9582, 19
-__func__.9582:
-	.string	"ftl_update_l2p_map"
-	.section	.rodata.__func__.9601,"a",@progbits
+	.set	.LANCHOR158,. + 0
+	.type	__func__.9484, %object
+	.size	__func__.9484, 11
+__func__.9484:
+	.string	"nandc_init"
+	.section	.rodata.__func__.9653,"a",@progbits
 	.align	3
-	.set	.LANCHOR113,. + 0
-	.type	__func__.9601, %object
-	.size	__func__.9601, 22
-__func__.9601:
-	.string	"ftl_get_new_free_page"
-	.section	.rodata.__func__.9612,"a",@progbits
+	.set	.LANCHOR59,. + 0
+	.type	__func__.9653, %object
+	.size	__func__.9653, 13
+__func__.9653:
+	.string	"buf_add_tail"
+	.section	.rodata.__func__.9666,"a",@progbits
 	.align	3
-	.set	.LANCHOR114,. + 0
-	.type	__func__.9612, %object
-	.size	__func__.9612, 22
-__func__.9612:
-	.string	"ftl_ext_alloc_new_blk"
-	.section	.rodata.__func__.9637,"a",@progbits
+	.set	.LANCHOR61,. + 0
+	.type	__func__.9666, %object
+	.size	__func__.9666, 10
+__func__.9666:
+	.string	"buf_alloc"
+	.section	.rodata.__func__.9680,"a",@progbits
 	.align	3
-	.set	.LANCHOR190,. + 0
-	.type	__func__.9637, %object
-	.size	__func__.9637, 19
-__func__.9637:
-	.string	"ftl_ext_info_flush"
-	.section	.rodata.__func__.9649,"a",@progbits
+	.set	.LANCHOR62,. + 0
+	.type	__func__.9680, %object
+	.size	__func__.9680, 16
+__func__.9680:
+	.string	"buf_remove_free"
+	.section	.rodata.__func__.9701,"a",@progbits
 	.align	3
-	.set	.LANCHOR191,. + 0
-	.type	__func__.9649, %object
-	.size	__func__.9649, 18
-__func__.9649:
-	.string	"ftl_ext_info_init"
-	.section	.rodata.__func__.9688,"a",@progbits
+	.set	.LANCHOR212,. + 0
+	.type	__func__.9701, %object
+	.size	__func__.9701, 20
+__func__.9701:
+	.string	"flash_info_blk_init"
+	.section	.rodata.__func__.9716,"a",@progbits
 	.align	3
-	.set	.LANCHOR192,. + 0
-	.type	__func__.9688, %object
-	.size	__func__.9688, 25
-__func__.9688:
-	.string	"ftl_low_format_data_init"
-	.section	.rodata.__func__.9703,"a",@progbits
+	.set	.LANCHOR157,. + 0
+	.type	__func__.9716, %object
+	.size	__func__.9716, 21
+__func__.9716:
+	.string	"flash_info_data_init"
+	.section	.rodata.__func__.9738,"a",@progbits
 	.align	3
-	.set	.LANCHOR194,. + 0
-	.type	__func__.9703, %object
-	.size	__func__.9703, 15
-__func__.9703:
-	.string	"ftl_low_format"
-	.section	.rodata.__func__.9751,"a",@progbits
+	.set	.LANCHOR209,. + 0
+	.type	__func__.9738, %object
+	.size	__func__.9738, 17
+__func__.9738:
+	.string	"flash_info_flush"
+	.section	.rodata.__func__.9814,"a",@progbits
 	.align	3
-	.set	.LANCHOR183,. + 0
-	.type	__func__.9751, %object
-	.size	__func__.9751, 14
-__func__.9751:
-	.string	"ftl_prog_page"
-	.section	.rodata.__func__.9873,"a",@progbits
+	.set	.LANCHOR150,. + 0
+	.type	__func__.9814, %object
+	.size	__func__.9814, 17
+__func__.9814:
+	.string	"lpa_rebuild_hash"
+	.section	.rodata.__func__.9864,"a",@progbits
 	.align	3
-	.set	.LANCHOR176,. + 0
-	.type	__func__.9873, %object
-	.size	__func__.9873, 31
-__func__.9873:
-	.string	"queue_wait_first_req_completed"
+	.set	.LANCHOR232,. + 0
+	.type	__func__.9864, %object
+	.size	__func__.9864, 17
+__func__.9864:
+	.string	"ftl_write_commit"
+	.section	.rodata.__func__.9882,"a",@progbits
+	.align	3
+	.set	.LANCHOR130,. + 0
+	.type	__func__.9882, %object
+	.size	__func__.9882, 14
+__func__.9882:
+	.string	"ftl_write_buf"
 	.section	.rodata.__func__.9927,"a",@progbits
 	.align	3
-	.set	.LANCHOR177,. + 0
+	.set	.LANCHOR132,. + 0
 	.type	__func__.9927, %object
-	.size	__func__.9927, 15
+	.size	__func__.9927, 18
 __func__.9927:
-	.string	"sblk_prog_page"
-	.section	.rodata.__func__.9954,"a",@progbits
+	.string	"zftl_add_read_buf"
+	.section	.rodata.__func__.9960,"a",@progbits
 	.align	3
-	.set	.LANCHOR180,. + 0
-	.type	__func__.9954, %object
-	.size	__func__.9954, 15
-__func__.9954:
-	.string	"sblk_read_page"
+	.set	.LANCHOR230,. + 0
+	.type	__func__.9960, %object
+	.size	__func__.9960, 10
+__func__.9960:
+	.string	"zftl_read"
+	.section	.rodata.__func__.9991,"a",@progbits
+	.align	3
+	.set	.LANCHOR242,. + 0
+	.type	__func__.9991, %object
+	.size	__func__.9991, 13
+__func__.9991:
+	.string	"_ftl_discard"
 	.section	.rodata._list_remove_node.str1.1,"aMS",@progbits,1
 .LC0:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
+	.section	.rodata.dump_buf_info.str1.1,"aMS",@progbits,1
+.LC41:
+	.string	"sblk_queue_head = %d\n"
+.LC42:
+	.string	"sblk_read_completed_queue_head = %d\n"
+.LC43:
+	.string	"sblk_gc_write_completed_queue_head = %d\n"
+.LC44:
+	.string	"sblk_write_completed_queue_head = %d\n"
+.LC45:
+	.string	"p_free_buf_head = %d\n"
+.LC46:
+	.string	"free_buf_count = %d\n"
+.LC47:
+	.string	"buf = %d, next=%d, flag=%d gc_write_flag=%d, lun_state=%d, op_status = %d lpa=%x, ppa=%x\n"
 	.section	.rodata.dump_ftl_info.str1.1,"aMS",@progbits,1
-.LC177:
+.LC189:
 	.string	"free_buf_count: %d\n"
-.LC178:
+.LC190:
 	.string	"g_ftl_info_blk blk:0x%x, index:0x%x, page:0x%x\n"
-.LC179:
+.LC191:
 	.string	"ftl_ext_info_blk blk:0x%x, page:0x%x\n"
-.LC180:
+.LC192:
 	.string	"ac_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC181:
+.LC193:
 	.string	"tmp_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC182:
+.LC194:
 	.string	"gc_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC183:
+.LC195:
 	.string	"lpa:"
-.LC184:
+.LC196:
 	.string	"vpn:"
-.LC185:
+.LC197:
 	.string	"sblk:"
-.LC186:
+.LC198:
 	.string	"lpa_hash:"
-.LC187:
+.LC199:
 	.string	"lpa_hash_index:"
 	.section	.rodata.dump_pm_blk.str1.1,"aMS",@progbits,1
-.LC247:
+.LC254:
 	.string	"pm l2p:"
-.LC248:
+.LC255:
 	.string	"pm blk:"
 	.section	.rodata.dump_sblk_queue.str1.1,"aMS",@progbits,1
-.LC74:
+.LC80:
 	.string	"dump_sblk_queue: %d\n"
-.LC75:
+.LC81:
 	.string	"buf id= %d state = %d ppa = %x\n"
 	.section	.rodata.flash_complete_page_read.str1.1,"aMS",@progbits,1
-.LC130:
+.LC139:
 	.string	"flash_complete_page_read %x %x error_ecc %d %d\n"
 	.section	.rodata.flash_ddr_tuning_read.str1.1,"aMS",@progbits,1
-.LC116:
+.LC125:
 	.string	"%d flash_ddr_tuning_read %x ecc=%d\n"
-.LC117:
+.LC126:
 	.string	"sync para %d\n"
-.LC118:
+.LC127:
 	.string	"DDR mode Read error %x %x\n"
-.LC119:
+.LC128:
 	.string	"SDR mode Read %x %x ecc:%x\n"
 	.section	.rodata.flash_erase_all.str1.1,"aMS",@progbits,1
 .LC35:
@@ -29395,7 +31445,7 @@ __func__.9954:
 .LC32:
 	.string	"flash_erase_duplane_block pageadd = %x status = %x\n"
 	.section	.rodata.flash_get_last_written_page.str1.1,"aMS",@progbits,1
-.LC122:
+.LC131:
 	.string	"flash_get_last_written_page: %x %x %x\n"
 	.section	.rodata.flash_info_blk_init.str1.1,"aMS",@progbits,1
 .LC174:
@@ -29403,7 +31453,7 @@ __func__.9954:
 .LC175:
 	.string	"no sys info %x\n"
 	.section	.rodata.flash_info_data_init.str1.1,"aMS",@progbits,1
-.LC91:
+.LC97:
 	.string	"...%d @ %s\n"
 	.section	.rodata.flash_info_flush.str1.1,"aMS",@progbits,1
 .LC171:
@@ -29413,25 +31463,25 @@ __func__.9954:
 .LC173:
 	.string	"sys_info_flush error:%x\n"
 	.section	.rodata.flash_mask_bad_block.str1.1,"aMS",@progbits,1
-.LC41:
+.LC48:
 	.string	"flash_mask_bad_block %d %d\n"
 	.section	.rodata.flash_prog_page.str1.1,"aMS",@progbits,1
-.LC123:
+.LC132:
 	.string	"flash_prog_page %x %x %x\n"
-.LC124:
+.LC133:
 	.string	"flash_prog_page page_addr = %x status = %x\n"
 	.section	.rodata.flash_prog_page_en.str1.1,"aMS",@progbits,1
-.LC137:
+.LC147:
 	.string	"flash_prog_page_en:%x %x %x\n"
-.LC138:
+.LC148:
 	.string	"w d:"
-.LC139:
+.LC149:
 	.string	"w s:"
-.LC140:
+.LC150:
 	.string	"spare"
-.LC141:
+.LC151:
 	.string	"data"
-.LC142:
+.LC152:
 	.string	"write error: %x\n"
 	.section	.rodata.flash_read_id.str1.1,"aMS",@progbits,1
 .LC38:
@@ -29439,13 +31489,10 @@ __func__.9954:
 	.section	.rodata.flash_read_otp_data.str1.1,"aMS",@progbits,1
 .LC39:
 	.string	"otp:%x %x %x %x\n"
-	.section	.rodata.flash_read_page.str1.1,"aMS",@progbits,1
-.LC109:
-	.string	"flash_read_page %x %x %x\n"
 	.section	.rodata.flash_read_page_en.str1.1,"aMS",@progbits,1
-.LC120:
+.LC129:
 	.string	"flash_read_page_en %x %x %x %x\n"
-.LC121:
+.LC130:
 	.string	"flash_read_page_en %x %x error_ecc %d %d\n"
 	.section	.rodata.flash_set_interface_mode.str1.1,"aMS",@progbits,1
 .LC36:
@@ -29453,10 +31500,10 @@ __func__.9954:
 .LC37:
 	.string	"nand ddr mode %x\n"
 	.section	.rodata.ftl_alloc_new_data_sblk.str1.1,"aMS",@progbits,1
-.LC236:
+.LC232:
 	.string	"error gc_add_sblk: %x\n"
 	.section	.rodata.ftl_alloc_sblk.str1.1,"aMS",@progbits,1
-.LC73:
+.LC79:
 	.string	"alloc sblk %x %d\n"
 	.section	.rodata.ftl_dump_write_open_sblk.str1.1,"aMS",@progbits,1
 .LC166:
@@ -29470,218 +31517,214 @@ __func__.9954:
 .LC170:
 	.string	"ftl_sblk_dump_write done = %x\n"
 	.section	.rodata.ftl_ext_info_init.str1.1,"aMS",@progbits,1
-.LC149:
+.LC159:
 	.string	"%s %d %d %x %x\n"
-.LC150:
+.LC160:
 	.string	"ext info hash %x error\n"
-.LC151:
+.LC161:
 	.string	"%s %x %x %x\n"
 	.section	.rodata.ftl_free_sblk.str1.1,"aMS",@progbits,1
-.LC62:
+.LC68:
 	.string	"swl_slc_free_mini_ec_blk sblk %x\n"
 	.section	.rodata.ftl_info_blk_init.str1.1,"aMS",@progbits,1
-.LC145:
+.LC155:
 	.string	"%d %x @%d %x\n"
-.LC146:
+.LC156:
 	.string	"ftl_info_blk_init %d %d %x\n"
-.LC147:
+.LC157:
 	.string	"ftl info hash %x error\n"
-.LC148:
+.LC158:
 	.string	"ink flag: %x\n"
 	.section	.rodata.ftl_info_flush.str1.1,"aMS",@progbits,1
-.LC144:
+.LC154:
 	.string	"g_ftl_info_blk blk = %x, page = %x version = %d\n"
 	.section	.rodata.ftl_low_format.str1.1,"aMS",@progbits,1
-.LC152:
+.LC162:
 	.string	"ftl_low_format %d\n"
-.LC153:
+.LC163:
 	.string	"low format %d %d %d %d\n"
 	.section	.rodata.ftl_mask_bad_block.str1.1,"aMS",@progbits,1
-.LC60:
+.LC66:
 	.string	"mask bad block:cs %x %x block: %x %x\n"
 	.section	.rodata.ftl_open_sblk_recovery.str1.1,"aMS",@progbits,1
-.LC155:
+.LC177:
 	.string	"saved_active_page  = %x\n"
-.LC156:
+.LC178:
 	.string	"saved_active_plane = %x\n"
-.LC157:
+.LC179:
 	.string	"sblk = %x\n"
-.LC158:
+.LC180:
 	.string	"phy_blk = %x %x\n"
-.LC159:
+.LC181:
 	.string	"num_planes = %x\n"
-.LC160:
+.LC182:
+	.string	"recovery blk=%x, page=%x, ppa = %x, status = %x, hash:%x\n"
+.LC183:
+	.string	"data:"
+.LC184:
 	.string	"sblk = %x, vpn0 = %d, vpn1 = %d\n"
-.LC161:
+.LC185:
 	.string	"dump_write_lpa = %x %x %x %x\n"
-.LC162:
+.LC186:
 	.string	"dump write new ppa = %x, last ppa = %x lpa = %x\n"
-.LC163:
+.LC187:
 	.string	"dump write = %x %x %x\n"
-.LC164:
+.LC188:
 	.string	"dump write hash update = %x %x %x\n"
 	.section	.rodata.ftl_re_low_format.str1.1,"aMS",@progbits,1
-.LC154:
+.LC164:
 	.string	"re low format %d\n"
 	.section	.rodata.ftl_sblk_dump.str1.1,"aMS",@progbits,1
-.LC221:
+.LC220:
 	.string	"ftl_sblk_dump = %x %d %d %d %d\n"
-.LC222:
+.LC221:
 	.string	"ftl_sblk_dump = %x %x %x %x\n"
-.LC223:
+.LC222:
 	.string	"page_addr = %x, lpa=%x vpn = %d\n"
-.LC224:
+.LC223:
 	.string	"index= %x, lpa=%x\n"
-.LC225:
-	.string	"block = %x, vpn=%x check vpn = %d\n"
+.LC224:
+	.string	"block = %x, vpn=%x check vpn = %x\n"
 	.section	.rodata.ftl_sysblk_dump.str1.1,"aMS",@progbits,1
 .LC176:
 	.string	"l2p:"
 	.section	.rodata.ftl_test_block.str1.1,"aMS",@progbits,1
-.LC143:
+.LC153:
 	.string	"low format %d\n"
 	.section	.rodata.ftl_update_l2p_map.str1.1,"aMS",@progbits,1
-.LC232:
+.LC228:
 	.string	"ftl_update_l2p_map: %x %x %x\n"
-.LC233:
+.LC229:
 	.string	"ftl_update_l2p_map"
-.LC234:
+.LC230:
 	.string	"lpa_tbl:"
-.LC235:
+.LC231:
 	.string	"sblk %x vpn: %d %d\n"
 	.section	.rodata.ftl_vpn_decrement.str1.1,"aMS",@progbits,1
-.LC59:
+.LC65:
 	.string	"ftl_vpn_decrement %x = %d, %d\n"
 	.section	.rodata.ftl_write_commit.str1.1,"aMS",@progbits,1
-.LC237:
+.LC233:
 	.string	"%d read error: ppa:%x, lpa:%x, status:%x\n"
 	.section	.rodata.ftl_write_completed.str1.1,"aMS",@progbits,1
-.LC71:
+.LC77:
 	.string	"ftl prog error =%x, lpa = %x, ppa= %x\n"
-.LC72:
+.LC78:
 	.string	"ftl re prog: lpa = %x, ppa= %x\n"
 	.section	.rodata.gc_add_sblk.str1.1,"aMS",@progbits,1
-.LC42:
+.LC49:
 	.string	"gc_add_sblk = %d, %d, %d, %d, %d, %d, %d\n"
-.LC43:
+.LC50:
 	.string	"gc_add_sblk = %d, %d, %d\n"
-.LC44:
+.LC51:
 	.string	"gc_add_sblk = %d, %d, %d,last update:%d, %d\n"
-.LC45:
+.LC52:
 	.string	"gc_add_sblk = %d, %d, %d, %d, %d, %d\n"
 	.section	.rodata.gc_check_data_one_wl.str1.1,"aMS",@progbits,1
-.LC229:
+.LC146:
 	.string	"err: ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
-.LC230:
-	.string	"gc_lpa:"
-.LC231:
-	.string	"gc_ppa:"
 	.section	.rodata.gc_do_copy_back.str1.1,"aMS",@progbits,1
-.LC238:
+.LC234:
 	.string	"gc page in buf: lpa %x ppa = %x pageindex= %x\n"
-.LC239:
+.LC235:
 	.string	"gc_do_copy_back: lpa %x des_ppa = %x %x gc_ppa= %x page_index= %d\n"
-.LC240:
-	.string	"gc_do_copy_back: %x %x %x %x gc_ppa:%x %x %x %d\n"
 	.section	.rodata.gc_free_bad_sblk.str1.1,"aMS",@progbits,1
-.LC61:
+.LC67:
 	.string	"gc_free_bad_sblk 0x%x\n"
 	.section	.rodata.gc_free_src_blk.str1.1,"aMS",@progbits,1
-.LC63:
+.LC69:
 	.string	"gc_free_src_blk = %x, vpn = %d\n"
-.LC64:
+.LC70:
 	.string	"gc_free_src_blk %x, %d\n"
 	.section	.rodata.gc_free_temp_buf.str1.1,"aMS",@progbits,1
-.LC49:
+.LC55:
 	.string	"%d gc_free_temp_buf buf id= %x\n"
 	.section	.rodata.gc_mark_bad_ppa.str1.1,"aMS",@progbits,1
-.LC46:
+.LC53:
 	.string	"gc_mark_bad_ppa %d %x %x\n"
 	.section	.rodata.gc_recovery.str1.1,"aMS",@progbits,1
-.LC199:
+.LC210:
 	.string	"ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
-.LC200:
+.LC211:
 	.string	"ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
-.LC201:
+.LC212:
 	.string	"gc_recovery: %x vpn = %x\n"
 	.section	.rodata.gc_scan_src_blk.str1.1,"aMS",@progbits,1
-.LC219:
+.LC217:
 	.string	"gc_scan_src_blk = %x, vpn = %d\n"
-.LC220:
+.LC218:
+	.string	"js hash error:%x %x %x\n"
+.LC219:
 	.string	"gc_scan_src_blk = %x, s vpn0 = %d, c vpn1 = %d\n"
 	.section	.rodata.gc_search_src_blk.str1.1,"aMS",@progbits,1
-.LC51:
+.LC57:
 	.string	"zftl_get_gc_node cache = %x index = %d vpn = %x\n"
-.LC52:
+.LC58:
 	.string	"gc_search_src_blk mode = %x, src mode = %x, count= %d %d\n"
 	.section	.rodata.gc_static_wearleveling.str1.1,"aMS",@progbits,1
-.LC79:
+.LC85:
 	.string	"gc_static_wearleveling: min blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
-.LC80:
+.LC86:
 	.string	"gc_static_wearleveling: min slc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
-.LC81:
+.LC87:
 	.string	"gc_static_wearleveling: min tlc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
-.LC82:
+.LC88:
 	.string	"gc_static_wearleveling: max slc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
-.LC83:
+.LC89:
 	.string	"gc_static_wearleveling: max xlc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
-.LC84:
+.LC90:
 	.string	"gc_static_wearleveling: slc blk: %x, tlc blk: %d avg slc ec: %d, avg tlc ec: %d \n"
-.LC85:
+.LC91:
 	.string	"gc_static_wearleveling: min slc ec: %x, min tlc ec: %d max slc ec: %d, max tlc ec: %d; %d %d\n"
-.LC86:
+.LC92:
 	.string	"swl add tlc gc = %x, %d, %d, %d, %d, %d\n"
-.LC87:
+.LC93:
 	.string	"swl add slc gc  = %x, %d, %d, %d, %d, %d\n"
 	.section	.rodata.gc_update_l2p_map_new.str1.1,"aMS",@progbits,1
-.LC215:
+.LC213:
 	.string	"gc_update_l2p_map_new sblk %x\n"
-.LC216:
+.LC214:
 	.string	"gc_update_l2p_map_new: %x %x %x\n"
-.LC217:
+.LC215:
 	.string	"lpa: %x %x %x\n"
-.LC218:
+.LC216:
 	.string	"gc_update_l2p_map_new: %x vpn = %x vpn1 = %x done\n"
 	.section	.rodata.gc_write_completed.str1.1,"aMS",@progbits,1
-.LC47:
+.LC54:
 	.string	"status: %x, ppa: %x\n"
-.LC48:
-	.string	"gc_write_completed: %x  %x  %d %x\n"
 	.section	.rodata.hynix_get_read_retry_default.str1.1,"aMS",@progbits,1
-.LC99:
+.LC105:
 	.string	"otp error! %d"
-.LC100:
+.LC106:
 	.string	"rr"
 	.section	.rodata.hynix_read_retrial.str1.1,"aMS",@progbits,1
-.LC115:
+.LC124:
 	.string	"hynix RR %d row=%x, count %d, status=%d\n"
 	.section	.rodata.idb_write_data.str1.1,"aMS",@progbits,1
-.LC125:
+.LC135:
 	.string	"1 write_idblock fix data %x %x %x\n"
-.LC126:
+.LC136:
 	.string	"write_idblock check fail! %x\n"
-.LC127:
+.LC137:
 	.string	"write_idblock fail! %x\n"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",@progbits,1
-.LC189:
+.LC201:
 	.string	"region_id = %d, pm_max_region = %d\n"
-.LC190:
+.LC202:
 	.string	"load_l2p_region no ppa = %x , %x, all setting 0xff....\n"
-.LC191:
+.LC203:
 	.string	"load_l2p_region = %x,%x,%x, %x\n"
-.LC192:
+.LC204:
 	.string	"pm_ppa:"
-.LC193:
-	.string	"data:"
-.LC194:
+.LC205:
 	.string	"spare:"
 	.section	.rodata.lpa_rebuild_hash.str1.1,"aMS",@progbits,1
-.LC78:
+.LC84:
 	.string	"%s %d %d\n"
 	.section	.rodata.micron_read_retrial.str1.1,"aMS",@progbits,1
-.LC110:
+.LC115:
 	.string	"MT %d row=%x,last status %d,status = %d\n"
-.LC111:
+.LC116:
 	.string	"MT RR %d row=%x,count %d,status=%d\n"
 	.section	.rodata.nand_flash_print_info.str1.1,"aMS",@progbits,1
 .LC1:
@@ -29745,91 +31788,91 @@ __func__.9954:
 .LC30:
 	.string	"g_flash_toggle_mode_en: %x\n"
 	.section	.rodata.nandc_init.str1.1,"aMS",@progbits,1
-.LC92:
+.LC98:
 	.string	"...%s enter... %p\n"
-.LC93:
+.LC99:
 	.string	"0:%x %x %x %x %x\n"
-.LC94:
+.LC100:
 	.string	"g_nandc_ver...%d\n"
 	.section	.rodata.nandc_xfer.str1.1,"aMS",@progbits,1
-.LC106:
+.LC112:
 	.string	"dqs data abort %x\n"
-.LC107:
+.LC113:
 	.string	"dqs data timeout %x\n"
-.LC108:
+.LC114:
 	.string	"xfer error %x\n"
 	.section	.rodata.nandc_xfer_done.str1.1,"aMS",@progbits,1
-.LC101:
+.LC107:
 	.string	"flash_abort_clear = %d\n"
-.LC102:
+.LC108:
 	.string	"%d mtrans_cnt = %d page_num = %d\n"
-.LC103:
-	.string	"nandc:"
-.LC104:
+.LC109:
 	.string	"%d flReg.d32=%x %x\n"
-.LC105:
+.LC110:
+	.string	"nandc:"
+.LC111:
 	.string	"nandc_xfer_done read error %x\n"
 	.section	.rodata.pm_alloc_new_blk.str1.1,"aMS",@progbits,1
-.LC76:
+.LC82:
 	.string	"blk %x is bad block\n"
-.LC77:
+.LC83:
 	.string	"pm_alloc_new_blk: %x %x %x %x\n"
 	.section	.rodata.pm_free_sblk.str1.1,"aMS",@progbits,1
-.LC89:
+.LC95:
 	.string	"GC PM block %x %x %x %d\n"
-.LC90:
+.LC96:
 	.string	"ftl_free_no_use_map_blk %x %x %x %d\n"
 	.section	.rodata.pm_init.str1.1,"aMS",@progbits,1
-.LC195:
+.LC206:
 	.string	"pm_init posr %x %x %x\n"
-.LC196:
+.LC207:
 	.string	"pm_init recovery %x %x %x\n"
-.LC197:
+.LC208:
 	.string	"pm_init hash %x error\n"
 	.section	.rodata.pm_log2phys.str1.1,"aMS",@progbits,1
-.LC198:
+.LC209:
 	.string	"pm_log2phys  lpn = %d, max lpn = %d\n"
 	.section	.rodata.pm_ppa_update_check.str1.1,"aMS",@progbits,1
-.LC188:
+.LC200:
 	.string	"%s w error lpn = %x, max ppa = %d\n"
 	.section	.rodata.pm_write_page.str1.1,"aMS",@progbits,1
 .LC165:
 	.string	"pm_write_page write error: %x\n"
 	.section	.rodata.print_ftl_debug_info.str1.1,"aMS",@progbits,1
-.LC65:
+.LC71:
 	.string	"bad blk = %x, %x free blk: s:%x,t:%x,m:%x, data blk:s:%x,%x,t%x vpn: s:%x t:%x, max_vpn: %x\n"
-.LC66:
+.LC72:
 	.string	"totle w: %d MB,r: %d MB %d dv:0x%X,poc:%d\n"
-.LC67:
+.LC73:
 	.string	"gc xlc page: %d,gc slc page: %d, tmp w: %d MB\n"
-.LC68:
+.LC74:
 	.string	"slc ec: %d,%d,%d,%d,%d,tlc ec: %d,%d,%d,%d,%d\n"
-.LC69:
+.LC75:
 	.string	"gc th: tlc_tlc: %d tlc_slc: %d slc_slc: %d slc_tlc:%d free_th: %d\n"
-.LC70:
+.LC76:
 	.string	"swl : %x %x %x %x %x %x\n"
 	.section	.rodata.print_gc_debug_info.str1.1,"aMS",@progbits,1
-.LC50:
+.LC56:
 	.string	"gc: b:%x,p:%x,i:%x; free buf=%d %d free slc th: %d\n"
 	.section	.rodata.print_list_info.str1.1,"aMS",@progbits,1
-.LC57:
+.LC63:
 	.string	"list count:%p %d\n"
-.LC58:
+.LC64:
 	.string	"%d: node:%x %x %x %x, %d %d %d %d %d\n"
 	.section	.rodata.queue_wait_first_req_completed.str1.1,"aMS",@progbits,1
-.LC131:
+.LC140:
 	.string	"read: %x %x %x %x\n"
-.LC132:
+.LC141:
 	.string	"0set buf %d,status = %x, ppa = %x lun state = %d\n"
-.LC133:
+.LC142:
 	.string	"prog end %x %x error_ecc %d %d\n"
-.LC134:
+.LC143:
 	.string	"1set buf %d,status = %x, ppa = %x lun state = %d\n"
-.LC135:
+.LC144:
 	.string	"dp prog end %x %x error_ecc %d %d\n"
 	.section	.rodata.random_seed,"a",@progbits
 	.align	3
-	.set	.LANCHOR51,. + 0
+	.set	.LANCHOR55,. + 0
 	.type	random_seed, %object
 	.size	random_seed, 256
 random_seed:
@@ -29962,28 +32005,174 @@ random_seed:
 	.hword	17598
 	.hword	28087
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",@progbits,1
-.LC214:
+.LC251:
 	.string	"zftl_init %x\n"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
-.LC95:
-	.string	"%s 0x%x:"
-.LC96:
+.LC101:
+	.string	"%s %p + 0x%x:"
+.LC102:
 	.string	"%x "
-.LC97:
+.LC103:
 	.string	""
-.LC98:
+.LC104:
 	.string	"%s\n"
+	.section	.rodata.samsung_14nm_mlc_rr,"a",@progbits
+	.align	3
+	.set	.LANCHOR171,. + 0
+	.type	samsung_14nm_mlc_rr, %object
+	.size	samsung_14nm_mlc_rr, 104
+samsung_14nm_mlc_rr:
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	-4
+	.byte	3
+	.byte	-4
+	.byte	-6
+	.byte	6
+	.byte	0
+	.byte	6
+	.byte	-10
+	.byte	-10
+	.byte	4
+	.byte	-10
+	.byte	16
+	.byte	12
+	.byte	-4
+	.byte	12
+	.byte	8
+	.byte	-16
+	.byte	10
+	.byte	-16
+	.byte	24
+	.byte	18
+	.byte	-14
+	.byte	18
+	.byte	-4
+	.byte	-22
+	.byte	-16
+	.byte	-22
+	.byte	-8
+	.byte	24
+	.byte	-9
+	.byte	24
+	.byte	8
+	.byte	-28
+	.byte	-4
+	.byte	-28
+	.byte	16
+	.byte	30
+	.byte	10
+	.byte	30
+	.byte	10
+	.byte	-34
+	.byte	6
+	.byte	-34
+	.byte	0
+	.byte	36
+	.byte	-8
+	.byte	36
+	.byte	-8
+	.byte	-40
+	.byte	-2
+	.byte	-40
+	.byte	-20
+	.byte	-46
+	.byte	-4
+	.byte	-46
+	.byte	-30
+	.byte	3
+	.byte	0
+	.byte	3
+	.byte	-3
+	.byte	-2
+	.byte	-4
+	.byte	-2
+	.byte	-6
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-10
+	.byte	-6
+	.byte	-8
+	.byte	-6
+	.byte	-14
+	.byte	-9
+	.byte	-8
+	.byte	-9
+	.byte	-18
+	.byte	-52
+	.byte	22
+	.byte	-52
+	.byte	10
+	.byte	42
+	.byte	4
+	.byte	42
+	.byte	4
+	.byte	48
+	.byte	-9
+	.byte	48
+	.byte	4
+	.byte	-58
+	.byte	12
+	.byte	-58
+	.byte	0
+	.byte	-64
+	.byte	-24
+	.byte	-64
+	.byte	-6
+	.byte	9
+	.byte	18
+	.byte	9
+	.byte	8
+	.section	.rodata.samsung_14nm_slc_rr,"a",@progbits
+	.align	3
+	.set	.LANCHOR170,. + 0
+	.type	samsung_14nm_slc_rr, %object
+	.size	samsung_14nm_slc_rr, 26
+samsung_14nm_slc_rr:
+	.byte	0
+	.byte	10
+	.byte	-10
+	.byte	20
+	.byte	-20
+	.byte	30
+	.byte	-30
+	.byte	40
+	.byte	-40
+	.byte	50
+	.byte	-50
+	.byte	60
+	.byte	-60
+	.byte	-70
+	.byte	-80
+	.byte	-90
+	.byte	-100
+	.byte	-110
+	.byte	-120
+	.byte	-9
+	.byte	70
+	.byte	80
+	.byte	90
+	.byte	-125
+	.byte	-115
+	.byte	100
+	.section	.rodata.samsung_read_retrial.str1.1,"aMS",@progbits,1
+.LC121:
+	.string	"samsung SRR %d row=%x, status=%d\n"
+.LC122:
+	.string	"samsung TRR %d row=%x, status=%d\n"
+.LC123:
+	.string	"samsung RR %d row=%x,count %d,status=%d\n"
 	.section	.rodata.sandisk_prog_test_bad_block.str1.1,"aMS",@progbits,1
 .LC40:
 	.string	"bad block test:%x %x\n"
-	.section	.rodata.sblk_3d_tlc_dump_prog.str1.1,"aMS",@progbits,1
-.LC128:
-	.string	"sblk_3d_tlc_dump_prog wl_addr= %x ppa = %x ppa = %x\n"
 	.section	.rodata.sblk_mlc_dump_prog.str1.1,"aMS",@progbits,1
-.LC129:
+.LC138:
 	.string	"sblk_mlc_dump_prog wl_addr= %x ppa = %x ppa = %x\n"
 	.section	.rodata.sblk_prog_page.str1.1,"aMS",@progbits,1
-.LC136:
+.LC145:
 	.string	"sblk_prog_page ppa = %x, count = %d\n"
 	.section	.rodata.toshiba_15ref_value,"a",@progbits
 	.align	3
@@ -29994,184 +32183,670 @@ toshiba_15ref_value:
 	.byte	4
 	.byte	5
 	.byte	6
-	.byte	7
+	.byte	7
+	.byte	13
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	2
+	.byte	4
+	.byte	2
+	.byte	0
+	.byte	0
+	.byte	8
+	.byte	8
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	124
+	.byte	0
+	.byte	124
+	.byte	124
+	.byte	0
+	.byte	122
+	.byte	0
+	.byte	122
+	.byte	122
+	.byte	0
+	.byte	11
+	.byte	126
+	.byte	118
+	.byte	116
+	.byte	0
+	.byte	120
+	.byte	2
+	.byte	120
+	.byte	122
+	.byte	0
+	.byte	126
+	.byte	4
+	.byte	126
+	.byte	122
+	.byte	0
+	.byte	16
+	.byte	118
+	.byte	114
+	.byte	112
+	.byte	0
+	.byte	118
+	.byte	4
+	.byte	118
+	.byte	120
+	.byte	0
+	.byte	4
+	.byte	4
+	.byte	4
+	.byte	118
+	.byte	0
+	.byte	2
+	.byte	0
+	.byte	126
+	.byte	124
+	.byte	0
+	.byte	6
+	.byte	10
+	.byte	6
+	.byte	2
+	.byte	0
+	.byte	116
+	.byte	124
+	.byte	116
+	.byte	118
+	.byte	0
+	.byte	4
+	.byte	4
+	.byte	124
+	.byte	126
+	.byte	0
+	.byte	0
+	.byte	124
+	.byte	120
+	.byte	120
+	.byte	0
+	.byte	124
+	.byte	118
+	.byte	116
+	.byte	114
+	.byte	0
+	.section	.rodata.toshiba_3D_slc_value,"a",@progbits
+	.align	3
+	.set	.LANCHOR39,. + 0
+	.type	toshiba_3D_slc_value, %object
+	.size	toshiba_3D_slc_value, 11
+toshiba_3D_slc_value:
+	.byte	-117
+	.byte	0
+	.byte	-8
+	.byte	8
+	.byte	-16
+	.byte	-24
+	.byte	24
+	.byte	-40
+	.byte	40
+	.byte	-56
+	.byte	56
+	.section	.rodata.toshiba_3D_tlc_value,"a",@progbits
+	.align	3
+	.set	.LANCHOR38,. + 0
+	.type	toshiba_3D_tlc_value, %object
+	.size	toshiba_3D_tlc_value, 399
+toshiba_3D_tlc_value:
+	.byte	-119
+	.byte	-119
+	.byte	-119
+	.byte	-119
+	.byte	-118
+	.byte	-118
+	.byte	-118
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	5
+	.byte	-2
+	.byte	-1
+	.byte	0
+	.byte	-3
+	.byte	-2
+	.byte	6
+	.byte	-9
+	.byte	-12
+	.byte	-9
+	.byte	-7
+	.byte	-13
+	.byte	-12
+	.byte	-7
+	.byte	-6
+	.byte	-15
+	.byte	-15
+	.byte	-2
+	.byte	-12
+	.byte	-16
+	.byte	-6
+	.byte	-2
+	.byte	-19
+	.byte	-19
+	.byte	-6
+	.byte	-4
+	.byte	-12
+	.byte	-14
+	.byte	-2
+	.byte	-11
+	.byte	-23
+	.byte	-34
+	.byte	-4
+	.byte	-20
+	.byte	-22
+	.byte	-2
+	.byte	-7
+	.byte	-31
+	.byte	-30
+	.byte	-12
+	.byte	-20
+	.byte	-18
+	.byte	2
+	.byte	-15
+	.byte	-19
+	.byte	-36
+	.byte	-12
+	.byte	-28
+	.byte	-34
+	.byte	-6
+	.byte	-15
+	.byte	-11
+	.byte	2
+	.byte	-12
+	.byte	-8
+	.byte	-2
+	.byte	2
+	.byte	-3
+	.byte	-7
+	.byte	-10
+	.byte	-4
+	.byte	-8
+	.byte	-6
+	.byte	-6
+	.byte	-11
+	.byte	-27
+	.byte	-38
+	.byte	-16
+	.byte	-12
+	.byte	-2
+	.byte	2
+	.byte	-7
+	.byte	-31
+	.byte	-22
+	.byte	-4
+	.byte	-16
+	.byte	-22
+	.byte	-7
+	.byte	-31
+	.byte	-23
+	.byte	-22
+	.byte	-28
+	.byte	-28
+	.byte	-26
+	.byte	2
+	.byte	-7
+	.byte	-11
+	.byte	-14
+	.byte	-8
+	.byte	-12
+	.byte	-10
+	.byte	-10
+	.byte	-27
+	.byte	-25
+	.byte	-22
+	.byte	-20
+	.byte	-28
+	.byte	-22
+	.byte	-7
+	.byte	-23
+	.byte	-29
+	.byte	-34
+	.byte	-24
+	.byte	-32
+	.byte	-22
+	.byte	-10
+	.byte	-11
+	.byte	-29
+	.byte	-18
+	.byte	-12
+	.byte	-24
+	.byte	-22
+	.byte	6
+	.byte	1
+	.byte	-3
+	.byte	-6
+	.byte	0
+	.byte	-4
+	.byte	-2
+	.byte	10
+	.byte	-3
+	.byte	-7
+	.byte	-6
+	.byte	4
+	.byte	-4
+	.byte	-2
+	.byte	-10
+	.byte	-23
+	.byte	-39
+	.byte	-22
+	.byte	-19
+	.byte	-24
+	.byte	-18
+	.byte	-14
+	.byte	-23
+	.byte	-29
+	.byte	-30
+	.byte	-15
+	.byte	-30
+	.byte	-30
+	.byte	-7
+	.byte	-27
+	.byte	-35
+	.byte	-26
+	.byte	-15
+	.byte	-24
+	.byte	-26
+	.byte	6
+	.byte	-11
+	.byte	5
+	.byte	-2
+	.byte	-16
+	.byte	-16
+	.byte	-2
+	.byte	-2
+	.byte	-15
+	.byte	-15
+	.byte	-20
+	.byte	-8
+	.byte	-16
+	.byte	-18
+	.byte	6
+	.byte	5
+	.byte	-15
+	.byte	-2
+	.byte	-24
+	.byte	-28
+	.byte	-22
+	.byte	10
+	.byte	-15
+	.byte	-3
+	.byte	-30
+	.byte	-8
+	.byte	-24
+	.byte	-30
+	.byte	-10
+	.byte	-27
+	.byte	-19
+	.byte	-30
+	.byte	-12
+	.byte	-16
+	.byte	-10
+	.byte	14
+	.byte	-19
+	.byte	-3
+	.byte	-30
+	.byte	4
+	.byte	4
+	.byte	6
+	.byte	2
+	.byte	1
+	.byte	-3
+	.byte	-10
+	.byte	-8
+	.byte	-4
+	.byte	-6
+	.byte	-2
+	.byte	-15
+	.byte	-11
+	.byte	-26
+	.byte	-8
+	.byte	-20
+	.byte	-30
+	.byte	6
+	.byte	-19
+	.byte	-3
+	.byte	-46
+	.byte	0
+	.byte	0
+	.byte	2
+	.byte	6
+	.byte	9
+	.byte	5
+	.byte	2
+	.byte	4
+	.byte	8
+	.byte	6
+	.byte	8
+	.byte	9
+	.byte	9
+	.byte	6
+	.byte	8
+	.byte	8
+	.byte	6
+	.byte	10
 	.byte	13
+	.byte	9
+	.byte	6
+	.byte	8
+	.byte	12
+	.byte	10
+	.byte	2
+	.byte	5
+	.byte	1
+	.byte	-2
 	.byte	0
 	.byte	0
+	.byte	6
+	.byte	12
+	.byte	1
+	.byte	13
+	.byte	2
+	.byte	12
+	.byte	12
+	.byte	14
+	.byte	-12
+	.byte	-14
+	.byte	-20
+	.byte	-18
+	.byte	-16
+	.byte	-16
+	.byte	-14
+	.byte	-12
+	.byte	-10
+	.byte	-21
+	.byte	-14
+	.byte	-12
+	.byte	-12
+	.byte	-10
+	.byte	-12
+	.byte	-18
+	.byte	-22
+	.byte	-24
+	.byte	-18
+	.byte	-18
+	.byte	-18
+	.byte	-12
+	.byte	-14
+	.byte	-23
+	.byte	-20
+	.byte	-20
+	.byte	-20
+	.byte	-20
+	.byte	-12
+	.byte	-24
+	.byte	-24
+	.byte	-30
+	.byte	-24
+	.byte	-28
+	.byte	-28
+	.byte	-12
+	.byte	-26
+	.byte	-25
+	.byte	-34
+	.byte	-24
+	.byte	-24
+	.byte	-24
+	.byte	-12
+	.byte	-13
+	.byte	-26
+	.byte	-20
+	.byte	-14
+	.byte	-18
+	.byte	-18
+	.byte	-12
+	.byte	-15
+	.byte	-27
+	.byte	-22
+	.byte	-20
+	.byte	-24
+	.byte	-22
+	.byte	-12
+	.byte	-21
+	.byte	-28
+	.byte	-28
+	.byte	-24
+	.byte	-26
+	.byte	-24
+	.byte	20
+	.byte	16
+	.byte	6
+	.byte	10
+	.byte	16
+	.byte	12
+	.byte	12
+	.byte	16
+	.byte	16
+	.byte	8
+	.byte	8
+	.byte	12
+	.byte	12
+	.byte	12
+	.byte	18
+	.byte	18
+	.byte	10
+	.byte	8
+	.byte	14
+	.byte	14
+	.byte	14
+	.byte	16
+	.byte	14
+	.byte	6
+	.byte	6
+	.byte	12
+	.byte	14
+	.byte	8
+	.byte	20
+	.byte	18
+	.byte	8
+	.byte	6
+	.byte	14
+	.byte	14
+	.byte	10
+	.byte	20
+	.byte	20
+	.byte	6
+	.byte	10
+	.byte	10
+	.byte	12
+	.byte	12
+	.byte	10
+	.byte	13
+	.byte	5
+	.byte	2
+	.byte	14
+	.byte	8
+	.byte	6
+	.byte	6
+	.byte	13
+	.byte	9
+	.byte	4
+	.byte	14
+	.byte	10
+	.byte	10
+	.byte	10
+	.byte	13
+	.byte	9
+	.byte	6
+	.byte	8
+	.byte	12
+	.byte	10
+	.byte	2
+	.byte	5
+	.byte	1
+	.byte	-2
 	.byte	0
 	.byte	0
+	.byte	6
+	.byte	12
+	.byte	1
+	.byte	13
+	.byte	2
+	.byte	12
+	.byte	12
+	.byte	14
+	.section	.rodata.toshiba_3d_read_retrial.str1.1,"aMS",@progbits,1
+.LC117:
+	.string	"toshiba SRR %d row=%x, status=%d\n"
+.LC118:
+	.string	"toshiba TRR %d row=%x, status=%d\n"
+.LC119:
+	.string	"toshiba RR %d row=%x,count %d,status=%d\n"
+	.section	.rodata.toshiba_A19ref_value,"a",@progbits
+	.align	3
+	.set	.LANCHOR23,. + 0
+	.type	toshiba_A19ref_value, %object
+	.size	toshiba_A19ref_value, 45
+toshiba_A19ref_value:
+	.byte	4
+	.byte	5
+	.byte	6
+	.byte	7
+	.byte	13
 	.byte	0
 	.byte	0
 	.byte	0
 	.byte	0
 	.byte	0
-	.byte	0
-	.byte	2
 	.byte	4
-	.byte	2
-	.byte	0
-	.byte	0
-	.byte	8
-	.byte	8
-	.byte	0
+	.byte	4
+	.byte	124
+	.byte	126
 	.byte	0
 	.byte	0
 	.byte	124
+	.byte	120
+	.byte	120
 	.byte	0
 	.byte	124
-	.byte	124
+	.byte	118
+	.byte	116
+	.byte	114
+	.byte	0
+	.byte	8
+	.byte	8
 	.byte	0
-	.byte	122
 	.byte	0
-	.byte	122
-	.byte	122
 	.byte	0
 	.byte	11
 	.byte	126
 	.byte	118
 	.byte	116
 	.byte	0
-	.byte	120
-	.byte	2
-	.byte	120
-	.byte	122
-	.byte	0
-	.byte	126
-	.byte	4
-	.byte	126
-	.byte	122
-	.byte	0
 	.byte	16
 	.byte	118
 	.byte	114
 	.byte	112
 	.byte	0
-	.byte	118
-	.byte	4
-	.byte	118
-	.byte	120
-	.byte	0
-	.byte	4
-	.byte	4
-	.byte	4
-	.byte	118
-	.byte	0
 	.byte	2
 	.byte	0
 	.byte	126
 	.byte	124
 	.byte	0
-	.byte	6
-	.byte	10
-	.byte	6
-	.byte	2
-	.byte	0
-	.byte	116
-	.byte	124
-	.byte	116
-	.byte	118
+	.section	.rodata.toshiba_ref_value,"a",@progbits
+	.align	3
+	.set	.LANCHOR25,. + 0
+	.type	toshiba_ref_value, %object
+	.size	toshiba_ref_value, 8
+toshiba_ref_value:
 	.byte	0
 	.byte	4
-	.byte	4
-	.byte	124
-	.byte	126
-	.byte	0
-	.byte	0
 	.byte	124
 	.byte	120
-	.byte	120
-	.byte	0
-	.byte	124
-	.byte	118
 	.byte	116
-	.byte	114
-	.byte	0
-	.section	.rodata.toshiba_3D_slc_value,"a",@progbits
+	.byte	8
+	.byte	12
+	.byte	112
+	.section	.rodata.ymtc_3D_slc_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR37,. + 0
-	.type	toshiba_3D_slc_value, %object
-	.size	toshiba_3D_slc_value, 11
-toshiba_3D_slc_value:
-	.byte	-117
+	.set	.LANCHOR43,. + 0
+	.type	ymtc_3D_slc_value, %object
+	.size	ymtc_3D_slc_value, 10
+ymtc_3D_slc_value:
 	.byte	0
 	.byte	-8
 	.byte	8
 	.byte	-16
-	.byte	-24
+	.byte	-20
 	.byte	24
-	.byte	-40
+	.byte	-26
 	.byte	40
-	.byte	-56
+	.byte	-12
 	.byte	56
-	.section	.rodata.toshiba_3D_tlc_value,"a",@progbits
+	.section	.rodata.ymtc_3D_tlc_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR36,. + 0
-	.type	toshiba_3D_tlc_value, %object
-	.size	toshiba_3D_tlc_value, 399
-toshiba_3D_tlc_value:
-	.byte	-119
-	.byte	-119
-	.byte	-119
-	.byte	-119
-	.byte	-118
-	.byte	-118
-	.byte	-118
-	.byte	0
+	.set	.LANCHOR42,. + 0
+	.type	ymtc_3D_tlc_value, %object
+	.size	ymtc_3D_tlc_value, 357
+ymtc_3D_tlc_value:
 	.byte	0
 	.byte	0
 	.byte	0
 	.byte	0
 	.byte	0
 	.byte	0
-	.byte	5
-	.byte	-2
-	.byte	-1
 	.byte	0
-	.byte	-3
-	.byte	-2
-	.byte	6
-	.byte	-9
-	.byte	-12
-	.byte	-9
-	.byte	-7
-	.byte	-13
-	.byte	-12
-	.byte	-7
+	.byte	-10
+	.byte	-10
 	.byte	-6
-	.byte	-15
-	.byte	-15
-	.byte	-2
-	.byte	-12
-	.byte	-16
 	.byte	-6
 	.byte	-2
-	.byte	-19
-	.byte	-19
+	.byte	2
+	.byte	2
+	.byte	-6
 	.byte	-6
 	.byte	-4
-	.byte	-12
-	.byte	-14
+	.byte	-4
+	.byte	-4
+	.byte	-6
+	.byte	-8
+	.byte	6
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	-2
+	.byte	-2
 	.byte	-2
-	.byte	-11
-	.byte	-23
-	.byte	-34
 	.byte	-4
-	.byte	-20
-	.byte	-22
+	.byte	-4
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-11
 	.byte	-2
-	.byte	-7
-	.byte	-31
-	.byte	-30
-	.byte	-12
-	.byte	-20
-	.byte	-18
 	.byte	2
-	.byte	-15
-	.byte	-19
-	.byte	-36
-	.byte	-12
-	.byte	-28
-	.byte	-34
+	.byte	4
+	.byte	4
+	.byte	6
+	.byte	6
+	.byte	6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-8
+	.byte	-14
 	.byte	-6
 	.byte	-15
 	.byte	-11
@@ -30186,27 +32861,104 @@ toshiba_3D_tlc_value:
 	.byte	-4
 	.byte	-8
 	.byte	-6
-	.byte	-6
-	.byte	-11
-	.byte	-27
-	.byte	-38
-	.byte	-16
+	.byte	-18
+	.byte	-18
+	.byte	-14
+	.byte	-14
+	.byte	-10
+	.byte	-5
+	.byte	-5
+	.byte	-14
+	.byte	-14
+	.byte	-12
+	.byte	-12
+	.byte	-12
+	.byte	-13
+	.byte	-15
+	.byte	-2
+	.byte	-8
+	.byte	-8
+	.byte	-8
+	.byte	-8
+	.byte	-7
+	.byte	-7
+	.byte	-10
+	.byte	-10
+	.byte	-10
 	.byte	-12
+	.byte	-12
+	.byte	-13
+	.byte	-13
+	.byte	-14
+	.byte	-14
+	.byte	-14
+	.byte	-14
+	.byte	-14
+	.byte	-13
+	.byte	-18
+	.byte	-10
+	.byte	-6
+	.byte	-4
+	.byte	-4
 	.byte	-2
-	.byte	2
+	.byte	-1
+	.byte	-1
+	.byte	-14
+	.byte	-14
+	.byte	-14
+	.byte	-14
+	.byte	-14
+	.byte	-15
+	.byte	-21
+	.byte	-12
+	.byte	-11
+	.byte	-7
+	.byte	-7
+	.byte	-3
+	.byte	1
+	.byte	1
+	.byte	-8
+	.byte	-7
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-7
+	.byte	-9
+	.byte	4
+	.byte	-1
+	.byte	-1
+	.byte	-1
+	.byte	-1
+	.byte	-1
+	.byte	-1
+	.byte	-4
+	.byte	-3
+	.byte	-3
+	.byte	-5
+	.byte	-5
+	.byte	-7
+	.byte	-7
+	.byte	-8
+	.byte	-7
+	.byte	-7
+	.byte	-7
+	.byte	-7
 	.byte	-7
-	.byte	-31
-	.byte	-22
+	.byte	-12
 	.byte	-4
-	.byte	-16
-	.byte	-22
+	.byte	1
+	.byte	3
+	.byte	3
+	.byte	5
+	.byte	5
+	.byte	5
+	.byte	-8
 	.byte	-7
-	.byte	-31
-	.byte	-23
-	.byte	-22
-	.byte	-28
-	.byte	-28
-	.byte	-26
+	.byte	-7
+	.byte	-7
+	.byte	-7
+	.byte	-9
+	.byte	-15
 	.byte	2
 	.byte	-7
 	.byte	-11
@@ -30214,27 +32966,6 @@ toshiba_3D_tlc_value:
 	.byte	-8
 	.byte	-12
 	.byte	-10
-	.byte	-10
-	.byte	-27
-	.byte	-25
-	.byte	-22
-	.byte	-20
-	.byte	-28
-	.byte	-22
-	.byte	-7
-	.byte	-23
-	.byte	-29
-	.byte	-34
-	.byte	-24
-	.byte	-32
-	.byte	-22
-	.byte	-10
-	.byte	-11
-	.byte	-29
-	.byte	-18
-	.byte	-12
-	.byte	-24
-	.byte	-22
 	.byte	6
 	.byte	1
 	.byte	-3
@@ -30256,13 +32987,6 @@ toshiba_3D_tlc_value:
 	.byte	-19
 	.byte	-24
 	.byte	-18
-	.byte	-14
-	.byte	-23
-	.byte	-29
-	.byte	-30
-	.byte	-15
-	.byte	-30
-	.byte	-30
 	.byte	-7
 	.byte	-27
 	.byte	-35
@@ -30284,34 +33008,6 @@ toshiba_3D_tlc_value:
 	.byte	-8
 	.byte	-16
 	.byte	-18
-	.byte	6
-	.byte	5
-	.byte	-15
-	.byte	-2
-	.byte	-24
-	.byte	-28
-	.byte	-22
-	.byte	10
-	.byte	-15
-	.byte	-3
-	.byte	-30
-	.byte	-8
-	.byte	-24
-	.byte	-30
-	.byte	-10
-	.byte	-27
-	.byte	-19
-	.byte	-30
-	.byte	-12
-	.byte	-16
-	.byte	-10
-	.byte	14
-	.byte	-19
-	.byte	-3
-	.byte	-30
-	.byte	4
-	.byte	4
-	.byte	6
 	.byte	2
 	.byte	1
 	.byte	-3
@@ -30396,48 +33092,6 @@ toshiba_3D_tlc_value:
 	.byte	-20
 	.byte	-20
 	.byte	-20
-	.byte	-12
-	.byte	-24
-	.byte	-24
-	.byte	-30
-	.byte	-24
-	.byte	-28
-	.byte	-28
-	.byte	-12
-	.byte	-26
-	.byte	-25
-	.byte	-34
-	.byte	-24
-	.byte	-24
-	.byte	-24
-	.byte	-12
-	.byte	-13
-	.byte	-26
-	.byte	-20
-	.byte	-14
-	.byte	-18
-	.byte	-18
-	.byte	-12
-	.byte	-15
-	.byte	-27
-	.byte	-22
-	.byte	-20
-	.byte	-24
-	.byte	-22
-	.byte	-12
-	.byte	-21
-	.byte	-28
-	.byte	-28
-	.byte	-24
-	.byte	-26
-	.byte	-24
-	.byte	20
-	.byte	16
-	.byte	6
-	.byte	10
-	.byte	16
-	.byte	12
-	.byte	12
 	.byte	16
 	.byte	16
 	.byte	8
@@ -30459,20 +33113,6 @@ toshiba_3D_tlc_value:
 	.byte	12
 	.byte	14
 	.byte	8
-	.byte	20
-	.byte	18
-	.byte	8
-	.byte	6
-	.byte	14
-	.byte	14
-	.byte	10
-	.byte	20
-	.byte	20
-	.byte	6
-	.byte	10
-	.byte	10
-	.byte	12
-	.byte	12
 	.byte	10
 	.byte	13
 	.byte	5
@@ -30508,136 +33148,68 @@ toshiba_3D_tlc_value:
 	.byte	12
 	.byte	12
 	.byte	14
-	.section	.rodata.toshiba_3d_read_retrial.str1.1,"aMS",@progbits,1
-.LC112:
-	.string	"toshiba SRR %d row=%x, status=%d\n"
-.LC113:
-	.string	"toshiba TRR %d row=%x, status=%d\n"
-.LC114:
-	.string	"toshiba RR %d row=%x,count %d,status=%d\n"
-	.section	.rodata.toshiba_A19ref_value,"a",@progbits
-	.align	3
-	.set	.LANCHOR23,. + 0
-	.type	toshiba_A19ref_value, %object
-	.size	toshiba_A19ref_value, 45
-toshiba_A19ref_value:
-	.byte	4
-	.byte	5
-	.byte	6
-	.byte	7
-	.byte	13
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	4
-	.byte	4
-	.byte	124
-	.byte	126
-	.byte	0
-	.byte	0
-	.byte	124
-	.byte	120
-	.byte	120
-	.byte	0
-	.byte	124
-	.byte	118
-	.byte	116
-	.byte	114
-	.byte	0
-	.byte	8
-	.byte	8
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	11
-	.byte	126
-	.byte	118
-	.byte	116
-	.byte	0
-	.byte	16
-	.byte	118
-	.byte	114
-	.byte	112
-	.byte	0
-	.byte	2
-	.byte	0
-	.byte	126
-	.byte	124
-	.byte	0
-	.section	.rodata.toshiba_ref_value,"a",@progbits
-	.align	3
-	.set	.LANCHOR25,. + 0
-	.type	toshiba_ref_value, %object
-	.size	toshiba_ref_value, 8
-toshiba_ref_value:
-	.byte	0
-	.byte	4
-	.byte	124
-	.byte	120
-	.byte	116
-	.byte	8
-	.byte	12
-	.byte	112
+	.section	.rodata.ymtc_3d_read_retrial.str1.1,"aMS",@progbits,1
+.LC120:
+	.string	"YMTC RR %d row=%x,count %d,status=%d\n"
+	.section	.rodata.ymtc_flash_tlc_page_prog.str1.1,"aMS",@progbits,1
+.LC134:
+	.string	"ymtc_flash_tlc_page_prog page_addr = %x status = %x\n"
 	.section	.rodata.zftl_discard.str1.1,"aMS",@progbits,1
-.LC246:
+.LC253:
 	.string	"ftl_discard:(%x, %x, %x, %x)\n"
 	.section	.rodata.zftl_do_gc.str1.1,"aMS",@progbits,1
-.LC241:
+.LC236:
 	.string	"gc %d: %d %d %d %d %d %d %d\n"
-.LC242:
-	.string	"gc %d: %d %d %d %d %d %d\n"
-.LC243:
+.LC237:
 	.string	"GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\n"
-.LC244:
+.LC238:
 	.string	"gc free %x, %d\n"
 	.section	.rodata.zftl_gc_get_free_sblk.str1.1,"aMS",@progbits,1
-.LC53:
+.LC59:
 	.string	"swl_tlc_free_mini_ec_blk alloc sblk %x\n"
-.LC54:
+.LC60:
 	.string	"zftl_get_free_sblk %x %d, %p %d %d\n"
-.LC55:
+.LC61:
 	.string	"zftl_gc_get_free_sblk %x %x %x, %d %d %d\n"
 	.section	.rodata.zftl_get_free_sblk.str1.1,"aMS",@progbits,1
-.LC56:
+.LC62:
 	.string	"swl_slc_free_mini_ec_blk alloc sblk %x\n"
 	.section	.rodata.zftl_init.str1.1,"aMS",@progbits,1
-.LC202:
-	.string	"FTL version: 6.0.22 20200417"
-.LC203:
+.LC239:
+	.string	"FTL version: 6.0.23 20201130"
+.LC240:
 	.string	"_c_user_data_density := %d\n"
-.LC204:
+.LC241:
 	.string	"_c_totle_phy_density := %d\n"
-.LC205:
+.LC242:
 	.string	"_c_totle_log_page := %d\n"
-.LC206:
+.LC243:
 	.string	"_c_totle_data_density := %d\n"
-.LC207:
+.LC244:
 	.string	"_c_ftl_pm_page_num := %d\n"
-.LC208:
+.LC245:
 	.string	"_c_ftl_byte_pre_page := %d\n"
-.LC209:
+.LC246:
 	.string	"_c_max_pm_sblk := %d\n"
-.LC210:
+.LC247:
 	.string	"_min_slc_super_block := %d\n"
-.LC211:
+.LC248:
 	.string	"_max_xlc_super_block := %d\n"
-.LC212:
+.LC249:
 	.string	"gp_ftl_ext_info %p %p %p\n"
-.LC213:
+.LC250:
 	.string	"flash info size: %d %d %d\n"
 	.section	.rodata.zftl_read.str1.1,"aMS",@progbits,1
-.LC226:
+.LC225:
 	.string	"ftl_read %x %x %x\n"
-.LC227:
+.LC226:
 	.string	"ftl_read refresh =%x, lpa = %x, ppa= %x\n"
-.LC228:
+.LC227:
 	.string	"id=%d, status = %x, lpa = %x, ppa = %x spare = %x %x %x %x\n"
 	.section	.rodata.zftl_sblk_list_init.str1.1,"aMS",@progbits,1
-.LC88:
+.LC94:
 	.string	"free blk vpn error: %x %x\n"
 	.section	.rodata.zftl_write.str1.1,"aMS",@progbits,1
-.LC245:
+.LC252:
 	.string	"ftlwrite %x %x %x %x\n"
 	.hidden	free

commit 893be51cf5d60866ab40da91580317f5d586d66f
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Thu Nov 26 16:51:01 2020 +0800

    configs: add nand config for rk3568
    
    This nand config for rk3568 can support MLC NAND, TLC NAND and EMMC.
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: I658a151f964f3ae99c2165471d4690acec3740f5

diff --git a/configs/rk3568-nand.config b/configs/rk3568-nand.config
new file mode 100644
index 0000000000..983d9d3027
--- /dev/null
+++ b/configs/rk3568-nand.config
@@ -0,0 +1,23 @@
+CONFIG_BASE_DEFCONFIG="rk3568_defconfig"
+# CONFIG_CMD_MTD_BLK is not set
+# CONFIG_CMD_MTD is not set
+# CONFIG_CMD_NAND is not set
+CONFIG_CMD_RKNAND=y
+# CONFIG_DM_CRYPTO is not set
+CONFIG_LOADER_INI="RK3568MINIALL_NAND.ini"
+# CONFIG_MTD_DEVICE is not set
+# CONFIG_MTD is not set
+# CONFIG_MTD_NAND_BBT_USING_FLASH is not set
+# CONFIG_NAND is not set
+CONFIG_RKNAND=y
+# CONFIG_SPI_FLASH is not set
+# CONFIG_SPI_MEM is not set
+# CONFIG_SPL_DM_CRYPTO is not set
+# CONFIG_SPL_MTD_SUPPORT is not set
+# CONFIG_SPL_NAND_SUPPORT is not set
+CONFIG_SPL_RKNAND_SUPPORT=y
+# CONFIG_SPL_SPI_FLASH_SUPPORT is not set
+# CONFIG_SPL_SPI_SUPPORT is not set
+CONFIG_SPL_SYS_MALLOC_F_LEN=0x100000
+CONFIG_SYS_MALLOC_F_LEN=0x100000
+CONFIG_ZFTL=y

commit 5d96bba97e39b7f095cf6cf4e3de9c2d4962f654
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Thu Nov 26 10:05:15 2020 +0800

    rk3568: add nand support for spl and uboot
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: I3b849db025ae15dde22636ae17ac2d19c5484dd6

diff --git a/arch/arm/dts/rk3568-u-boot.dtsi b/arch/arm/dts/rk3568-u-boot.dtsi
index 001ea635b0..d04f975615 100644
--- a/arch/arm/dts/rk3568-u-boot.dtsi
+++ b/arch/arm/dts/rk3568-u-boot.dtsi
@@ -13,7 +13,7 @@
 
 	chosen {
 		stdout-path = &uart2;
-		u-boot,spl-boot-order = &sdhci, &spi_nand, &spi_nor;
+		u-boot,spl-boot-order = &sdhci, &nandc0, &spi_nand, &spi_nor;
 	};
 };
 
@@ -137,3 +137,17 @@
 	status = "okay";
 };
 
+&nandc0 {
+	u-boot,dm-spl;
+	status = "okay";
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	nand@0 {
+		u-boot,dm-spl;
+		reg = <0>;
+		nand-ecc-mode = "hw_syndrome";
+		nand-ecc-strength = <16>;
+		nand-ecc-step-size = <1024>;
+	};
+};
diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h
index 7cbe468849..c35e339aa9 100644
--- a/include/configs/rk3568_common.h
+++ b/include/configs/rk3568_common.h
@@ -11,9 +11,9 @@
 
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_TEXT_BASE		0x00000000
-#define CONFIG_SPL_MAX_SIZE		0x00028000
+#define CONFIG_SPL_MAX_SIZE		0x00038000
 #define CONFIG_SPL_BSS_START_ADDR	0x03fe0000
-#define CONFIG_SPL_BSS_MAX_SIZE		0x00002000
+#define CONFIG_SPL_BSS_MAX_SIZE		0x00010000
 #define CONFIG_SPL_STACK		0x03fe0000
 
 #define CONFIG_SYS_MALLOC_LEN		(32 << 20)

commit 568252a02ccdb6999314f6854923e018f12a7db8
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Wed Nov 25 16:03:24 2020 +0800

    rockchip: spl-boot-order: support scan rknand device
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: I49da396e3e8d10572be9b9f9dac57bd317c4cf83

diff --git a/arch/arm/mach-rockchip/spl-boot-order.c b/arch/arm/mach-rockchip/spl-boot-order.c
index 5894255a52..9b42ea208c 100644
--- a/arch/arm/mach-rockchip/spl-boot-order.c
+++ b/arch/arm/mach-rockchip/spl-boot-order.c
@@ -103,6 +103,14 @@ static int spl_node_to_boot_device(int node)
 	}
 #endif
 
+	/*
+	 * This should eventually move into the SPL code, once SPL becomes
+	 * aware of the block-device layer.  Until then (and to avoid unneeded
+	 * delays in getting this feature out, it lives at the board-level).
+	 */
+	if (!uclass_get_device_by_of_offset(UCLASS_RKNAND, node, &parent))
+		return BOOT_DEVICE_RKNAND;
+
 	return -1;
 }
 

commit ffc357038c3450975a8295e237cc942c1c95a33a
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Wed Nov 25 16:01:14 2020 +0800

    spl: support boot from rknand device
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: I168ec42ec1ac4bc1e8b640fba22357cde4a26aac

diff --git a/arch/arm/include/asm/spl.h b/arch/arm/include/asm/spl.h
index 2fe357bcb0..45ed028e13 100644
--- a/arch/arm/include/asm/spl.h
+++ b/arch/arm/include/asm/spl.h
@@ -34,6 +34,7 @@ enum {
 	BOOT_DEVICE_MTD_BLK_NAND,
 	BOOT_DEVICE_MTD_BLK_SPI_NAND,
 	BOOT_DEVICE_MTD_BLK_SPI_NOR,
+	BOOT_DEVICE_RKNAND,
 	BOOT_DEVICE_NONE
 };
 #endif
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index bc06b507c6..cf982b92fe 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -658,6 +658,23 @@ config SPL_SPI_FLASH_SUPPORT
 	  lines). This enables the drivers in drivers/mtd/spi as part of an
 	  SPL build. This normally requires SPL_SPI_SUPPORT.
 
+config SPL_RKNAND_SUPPORT
+	bool "Rockchip NAND FLASH device support"
+	depends on BLK
+	select RKNAND
+	select ZFTL if (ROCKCHIP_PX30 || ROCKCHIP_RK3568)
+	help
+	  This option enables support for Rockchip NAND FLASH devices.
+	  It supports block interface(with rk ftl) to read and write NAND FLASH.
+
+config RKNAND_BLK_U_BOOT_OFFS
+	hex "Location in RKNAND block to read U-Boot from"
+	default 0x4000
+	depends on SPL_RKNAND_SUPPORT
+	help
+	  Set the offset from the start of the rknand device where
+	  u-boot should be loaded from.
+
 if SPL_SPI_FLASH_SUPPORT
 
 config SPL_SPI_FLASH_TINY
diff --git a/common/spl/Makefile b/common/spl/Makefile
index 393cbf358f..d73dde66b9 100644
--- a/common/spl/Makefile
+++ b/common/spl/Makefile
@@ -40,6 +40,7 @@ obj-$(CONFIG_$(SPL_TPL_)UBI) += spl_ubi.o
 obj-$(CONFIG_$(SPL_TPL_)NET_SUPPORT) += spl_net.o
 obj-$(CONFIG_$(SPL_TPL_)MMC_SUPPORT) += spl_mmc.o
 obj-$(CONFIG_$(SPL_TPL_)MTD_SUPPORT) += spl_mtd_blk.o
+obj-$(CONFIG_$(SPL_TPL_)RKNAND_SUPPORT) += spl_rknand.o
 obj-$(CONFIG_$(SPL_TPL_)ATF) += spl_atf.o
 obj-$(CONFIG_$(SPL_TPL_)OPTEE) += spl_optee.o
 obj-$(CONFIG_$(SPL_TPL_)LOAD_RKFW) += spl_rkfw.o
diff --git a/common/spl/spl_rknand.c b/common/spl/spl_rknand.c
new file mode 100644
index 0000000000..241801bcd0
--- /dev/null
+++ b/common/spl/spl_rknand.c
@@ -0,0 +1,108 @@
+/*
+ * Copyright (c) 2020 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <blk.h>
+#include <boot_rkimg.h>
+#include <dm.h>
+#include <errno.h>
+#include <image.h>
+#include <malloc.h>
+#include <mtd_blk.h>
+#include <part.h>
+#include <spl.h>
+#include <spl_ab.h>
+#include <spl_rkfw.h>
+#include <asm/u-boot.h>
+#include <dm/device-internal.h>
+#include <linux/compiler.h>
+
+static struct blk_desc *find_rknand_device(int dev_num)
+{
+	struct udevice *dev;
+	struct blk_desc *desc;
+	int ret;
+
+	ret = blk_find_device(IF_TYPE_RKNAND, dev_num, &dev);
+	if (ret)
+		return NULL;
+
+	ret = device_probe(dev);
+	if (ret) {
+		debug("RKNAND Device %d not found\n", dev_num);
+		return NULL;
+	}
+
+	desc = dev_get_uclass_platdata(dev);
+	if (!desc)
+		return NULL;
+
+	return desc;
+}
+
+static ulong h_spl_load_read(struct spl_load_info *load, ulong sector,
+			     ulong count, void *buf)
+{
+	return blk_dread(load->dev, sector, count, buf);
+}
+
+static int spl_rknand_load_image(struct spl_image_info *spl_image,
+				 struct spl_boot_device *bootdev)
+{
+	lbaint_t image_sector = CONFIG_RKNAND_BLK_U_BOOT_OFFS;
+	struct image_header *header;
+	struct spl_load_info load;
+	struct blk_desc *desc;
+	int ret = -1;
+
+	desc = find_rknand_device(0);
+	if (!desc)
+		return -ENODEV;
+
+	load.dev = desc;
+	load.priv = NULL;
+	load.filename = NULL;
+	load.bl_len = desc->blksz;
+	load.read = h_spl_load_read;
+
+#ifdef CONFIG_SPL_LIBDISK_SUPPORT
+	disk_partition_t info;
+
+	ret = part_get_info_by_name(desc, PART_UBOOT, &info);
+	if (ret > 0)
+		image_sector = info.start;
+#endif
+
+	if (IS_ENABLED(CONFIG_SPL_LOAD_FIT)) {
+		header = (struct image_header *)(CONFIG_SYS_TEXT_BASE -
+					 sizeof(struct image_header));
+		ret = blk_dread(desc, image_sector, 1, header);
+		if (ret != 1)
+			return -ENODEV;
+
+#ifdef CONFIG_SPL_FIT_IMAGE_MULTIPLE
+		if (image_get_magic(header) == FDT_MAGIC ||
+		    CONFIG_SPL_FIT_IMAGE_MULTIPLE > 1) {
+#else
+		if (image_get_magic(header) == FDT_MAGIC) {
+#endif
+			ret = spl_load_simple_fit(spl_image, &load,
+						  image_sector,
+						  header);
+		}
+	}
+
+	if (!ret)
+		return 0;
+
+#ifdef CONFIG_SPL_LOAD_RKFW
+	ret = spl_load_rkfw_image(spl_image, &load);
+#endif
+
+	return ret;
+}
+
+SPL_LOAD_IMAGE_METHOD("RKNAND", 0, BOOT_DEVICE_RKNAND, spl_rknand_load_image);

commit e18e7090245c4c26ad498bd5505736b324a15463
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Wed Nov 25 15:58:09 2020 +0800

    drivers: rknand: add nand flash drivers for spl
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: I21c449226f57f2ff05fdcf241dde014062634cb5

diff --git a/drivers/Makefile b/drivers/Makefile
index 07f22e57fa..15c48e010e 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -59,7 +59,7 @@ obj-$(CONFIG_SPL_USB_HOST_SUPPORT) += block/
 obj-$(CONFIG_SPL_MMC_SUPPORT) += block/
 obj-$(CONFIG_SPL_MTD_SUPPORT) += block/
 obj-$(CONFIG_SPL_FPGA_SUPPORT) += fpga/
-
+obj-$(CONFIG_SPL_RKNAND_SUPPORT) += rknand/
 endif
 endif
 
diff --git a/drivers/rknand/Kconfig b/drivers/rknand/Kconfig
index 96ebd29f49..6c5b37b7a5 100644
--- a/drivers/rknand/Kconfig
+++ b/drivers/rknand/Kconfig
@@ -7,15 +7,15 @@
 config RKNAND
 	bool "Rockchip NAND FLASH device support"
 	depends on BLK
-	select ZFTL if ROCKCHIP_PX30
+	select ZFTL if (ROCKCHIP_PX30 || ROCKCHIP_RK3568)
 	help
 	  This option enables support for Rockchip NAND FLASH devices.
 	  It supports block interface(with rk ftl) to read and write NAND FLASH.
 
 config ZFTL
 	bool "Rockchip ZFTL for rkpx30/rk3326 to support 3D/2D TLC/MLC"
-	depends on RKNAND && (ROCKCHIP_PX30)
-	default y if ROCKCHIP_PX30
+	depends on RKNAND && (ROCKCHIP_PX30 || ROCKCHIP_RK3568)
+	default y if (ROCKCHIP_PX30 || ROCKCHIP_RK3568)
 	help
 	  This option enables support for Rockchip NAND FLASH devices.
 	  It supports block interface(with zftl) to read and write 3D/2D TLC/MLC
diff --git a/drivers/rknand/Makefile b/drivers/rknand/Makefile
index 92dcebf20d..451b884031 100644
--- a/drivers/rknand/Makefile
+++ b/drivers/rknand/Makefile
@@ -8,7 +8,11 @@ obj-y += rknand.o
 ifdef CONFIG_ARM64
 
 ifdef CONFIG_ZFTL
+ifdef CONFIG_SPL_BUILD
+obj-y += rk_zftl_spl_arm_v8.o
+else
 obj-y += rk_zftl_arm_v8.o
+endif
 else
 obj-y += rk_ftl_arm_v8.o
 endif
@@ -21,4 +25,4 @@ else
 obj-y += rk_ftl_arm_v7.o
 endif
 
-endif
\ No newline at end of file
+endif
diff --git a/drivers/rknand/rk_zftl_spl_arm_v8.S b/drivers/rknand/rk_zftl_spl_arm_v8.S
new file mode 100644
index 0000000000..c10b4d5248
--- /dev/null
+++ b/drivers/rknand/rk_zftl_spl_arm_v8.S
@@ -0,0 +1,33178 @@
+/*
+ * Copyright (c) 2016-2017, Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ * date: 2020-11-18
+ */
+	.arch armv8-a+nosimd
+	.file	"rk_zftl_spl_arm_v8.S"
+	.section	.text.flash_mem_cmp8,"ax",@progbits
+	.align	2
+	.type	flash_mem_cmp8, %function
+flash_mem_cmp8:
+	mov	x3, 0
+.L2:
+	mov	w4, w3
+	cmp	w3, w2
+	bcc	.L4
+	mov	w0, 0
+	ret
+.L4:
+	ldrb	w5, [x0, x3]
+	add	x3, x3, 1
+	add	x6, x1, x3
+	ldrb	w6, [x6, -1]
+	cmp	w6, w5
+	beq	.L2
+	add	w0, w4, 1
+	ret
+	.size	flash_mem_cmp8, .-flash_mem_cmp8
+	.section	.text.slc_phy_page_address_calc,"ax",@progbits
+	.align	2
+	.type	slc_phy_page_address_calc, %function
+slc_phy_page_address_calc:
+	adrp	x1, .LANCHOR0
+	adrp	x2, .LANCHOR1
+	ldrb	w1, [x1, #:lo12:.LANCHOR0]
+	cbz	w1, .L7
+	ldrb	w1, [x2, #:lo12:.LANCHOR1]
+	cbz	w1, .L8
+.L7:
+	adrp	x1, .LANCHOR2
+	ldrb	w2, [x2, #:lo12:.LANCHOR1]
+	ldrh	w3, [x1, #:lo12:.LANCHOR2]
+	udiv	w1, w0, w3
+	mul	w1, w1, w3
+	sub	w0, w0, w1
+	cbz	w2, .L9
+	add	w0, w1, w0, lsl 1
+	ret
+.L9:
+	adrp	x2, .LANCHOR3
+	add	x2, x2, :lo12:.LANCHOR3
+	ldrh	w0, [x2, w0, uxtw 1]
+	add	w0, w0, w1
+.L8:
+	ret
+	.size	slc_phy_page_address_calc, .-slc_phy_page_address_calc
+	.section	.text._list_remove_node,"ax",@progbits
+	.align	2
+	.type	_list_remove_node, %function
+_list_remove_node:
+	stp	x29, x30, [sp, -64]!
+	and	w1, w1, 65535
+	mov	w3, 6
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR4
+	stp	x19, x20, [sp, 16]
+	umull	x20, w1, w3
+	stp	x23, x24, [sp, 48]
+	mov	w1, 65535
+	ldr	x24, [x21, #:lo12:.LANCHOR4]
+	add	x19, x24, x20
+	ldrh	w4, [x24, x20]
+	ldrh	w3, [x19, 2]
+	cmp	w4, w1
+	ldr	x1, [x0]
+	bne	.L17
+	cmp	w3, w4
+	bne	.L17
+	cmp	x19, x1
+	bne	.L16
+.L17:
+	mov	x22, x0
+	mov	x23, x2
+	mov	w0, 65535
+	cmp	w3, w0
+	bne	.L19
+	cmp	x19, x1
+	beq	.L19
+	adrp	x1, .LANCHOR5
+	adrp	x0, .LC0
+	mov	w2, 202
+	add	x1, x1, :lo12:.LANCHOR5
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L19:
+	ldr	x0, [x22]
+	ldrh	w3, [x24, x20]
+	cmp	x19, x0
+	mov	w0, 65535
+	bne	.L20
+	cmp	w3, w0
+	bne	.L21
+	str	xzr, [x22]
+.L22:
+	mov	w0, -1
+	strh	w0, [x24, x20]
+	strh	w0, [x19, 2]
+	ldrh	w0, [x23]
+	sub	w0, w0, #1
+	strh	w0, [x23]
+.L16:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	ret
+.L21:
+	ldr	x0, [x21, #:lo12:.LANCHOR4]
+	mov	w1, 6
+	umaddl	x3, w3, w1, x0
+	mov	w0, -1
+	str	x3, [x22]
+	strh	w0, [x3, 2]
+	b	.L22
+.L20:
+	cmp	w3, w0
+	ldrh	w0, [x19, 2]
+	bne	.L23
+	cmp	w0, w3
+	beq	.L22
+	mov	w1, 6
+	mov	w2, -1
+	umull	x0, w0, w1
+	ldr	x1, [x21, #:lo12:.LANCHOR4]
+	strh	w2, [x1, x0]
+	b	.L22
+.L23:
+	ldr	x1, [x21, #:lo12:.LANCHOR4]
+	mov	w2, 6
+	umaddl	x4, w3, w2, x1
+	strh	w0, [x4, 2]
+	ldrh	w0, [x19, 2]
+	umull	x0, w0, w2
+	strh	w3, [x1, x0]
+	b	.L22
+	.size	_list_remove_node, .-_list_remove_node
+	.section	.text._list_pop_index_node,"ax",@progbits
+	.align	2
+	.type	_list_pop_index_node, %function
+_list_pop_index_node:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	ldr	x20, [x0]
+	cbz	x20, .L31
+	adrp	x3, .LANCHOR4
+	and	w1, w1, 65535
+	mov	w4, 65535
+	mov	w5, 6
+	ldr	x19, [x3, #:lo12:.LANCHOR4]
+.L27:
+	cbnz	w1, .L28
+.L30:
+	sub	x19, x20, x19
+	mov	x1, -6148914691236517206
+	asr	x19, x19, 1
+	movk	x1, 0xaaab, lsl 0
+	mul	x19, x19, x1
+	and	w19, w19, 65535
+	mov	w1, w19
+	bl	_list_remove_node
+	mov	w0, -1
+	strh	w0, [x20]
+	strh	w0, [x20, 2]
+	mov	w0, w19
+.L25:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L28:
+	ldrh	w3, [x20]
+	cmp	w3, w4
+	beq	.L30
+	sub	w1, w1, #1
+	umaddl	x20, w3, w5, x19
+	and	w1, w1, 65535
+	b	.L27
+.L31:
+	mov	w0, 65535
+	b	.L25
+	.size	_list_pop_index_node, .-_list_pop_index_node
+	.section	.text._insert_free_list,"ax",@progbits
+	.align	2
+	.type	_insert_free_list, %function
+_insert_free_list:
+	adrp	x3, .LANCHOR6
+	and	w1, w1, 65535
+	ldrh	w3, [x3, #:lo12:.LANCHOR6]
+	cmp	w3, w1
+	bls	.L33
+	ldrh	w3, [x2]
+	mov	w8, 6
+	ldr	x7, [x0]
+	add	w3, w3, 1
+	strh	w3, [x2]
+	adrp	x2, .LANCHOR4
+	umull	x12, w1, w8
+	ldr	x5, [x2, #:lo12:.LANCHOR4]
+	mov	w2, -1
+	add	x6, x5, x12
+	strh	w2, [x6, 2]
+	strh	w2, [x5, x12]
+	cbnz	x7, .L35
+.L40:
+	str	x6, [x0]
+	ret
+.L35:
+	adrp	x2, .LANCHOR7
+	adrp	x3, .LANCHOR8
+	mov	w10, w8
+	mov	w15, 65535
+	ldr	x11, [x2, #:lo12:.LANCHOR7]
+	ubfiz	x2, x1, 2, 16
+	ldrh	w14, [x3, #:lo12:.LANCHOR8]
+	mov	x3, -6148914691236517206
+	movk	x3, 0xaaab, lsl 0
+	ldr	w4, [x11, x2]
+	ldrh	w2, [x11, x2]
+	ubfx	x4, x4, 11, 8
+	and	w2, w2, 2047
+	madd	w4, w14, w4, w2
+	sub	x2, x7, x5
+	asr	x2, x2, 1
+	and	w4, w4, 65535
+	mul	x2, x2, x3
+	mov	x3, x7
+	and	w2, w2, 65535
+.L38:
+	ubfiz	x13, x2, 2, 16
+	ldr	w8, [x11, x13]
+	ldrh	w13, [x11, x13]
+	ubfx	x8, x8, 11, 8
+	and	w13, w13, 2047
+	madd	w8, w14, w8, w13
+	cmp	w4, w8, uxth
+	bls	.L36
+	ldrh	w8, [x3]
+	cmp	w8, w15
+	bne	.L37
+	strh	w2, [x6, 2]
+	strh	w1, [x3]
+	ret
+.L37:
+	umaddl	x3, w8, w10, x5
+	mov	w2, w8
+	b	.L38
+.L36:
+	ldrh	w4, [x3, 2]
+	cmp	x7, x3
+	strh	w4, [x6, 2]
+	strh	w2, [x5, x12]
+	bne	.L39
+	strh	w1, [x7, 2]
+	b	.L40
+.L39:
+	ldrh	w0, [x3, 2]
+	mov	w2, 6
+	umull	x0, w0, w2
+	strh	w1, [x5, x0]
+	strh	w1, [x3, 2]
+.L33:
+	ret
+	.size	_insert_free_list, .-_insert_free_list
+	.section	.text._insert_data_list,"ax",@progbits
+	.align	2
+	.type	_insert_data_list, %function
+_insert_data_list:
+	adrp	x3, .LANCHOR6
+	and	w1, w1, 65535
+	ldrh	w4, [x3, #:lo12:.LANCHOR6]
+	cmp	w4, w1
+	bls	.L63
+	mov	x5, x3
+	ldrh	w3, [x2]
+	mov	w13, 6
+	ldr	x12, [x0]
+	add	w3, w3, 1
+	strh	w3, [x2]
+	adrp	x2, .LANCHOR4
+	umull	x13, w1, w13
+	ldr	x10, [x2, #:lo12:.LANCHOR4]
+	mov	w2, -1
+	add	x11, x10, x13
+	strh	w2, [x11, 2]
+	strh	w2, [x10, x13]
+	cbnz	x12, .L44
+	str	x11, [x0]
+	ret
+.L44:
+	stp	x29, x30, [sp, -32]!
+	adrp	x2, .LANCHOR9
+	uxtw	x3, w1
+	adrp	x6, .LANCHOR8
+	add	x29, sp, 0
+	ldr	x15, [x2, #:lo12:.LANCHOR9]
+	adrp	x2, .LANCHOR7
+	ldrh	w4, [x11, 4]
+	ldr	x14, [x2, #:lo12:.LANCHOR7]
+	stp	x19, x20, [sp, 16]
+	ldrh	w8, [x15, x3, lsl 1]
+	lsl	x3, x3, 2
+	ldrh	w16, [x6, #:lo12:.LANCHOR8]
+	ldr	w2, [x14, x3]
+	mul	w8, w8, w4
+	ldrh	w3, [x14, x3]
+	ubfx	x2, x2, 11, 8
+	and	w3, w3, 2047
+	cbz	w8, .L45
+	madd	w2, w16, w2, w3
+	add	w8, w8, w2, uxth
+.L45:
+	sub	x2, x12, x10
+	mov	x3, -6148914691236517206
+	asr	x2, x2, 1
+	movk	x3, 0xaaab, lsl 0
+	cmp	w4, 0
+	ldrh	w19, [x5, #:lo12:.LANCHOR6]
+	csinv	w8, w8, wzr, ne
+	mov	x7, x12
+	mul	x2, x2, x3
+	mov	w4, 0
+	mov	w20, 65535
+	mov	w30, 6
+	and	w2, w2, 65535
+.L51:
+	add	w4, w4, 1
+	and	w4, w4, 65535
+	cmp	w4, w19
+	bhi	.L41
+	cmp	w1, w2
+	beq	.L41
+	uxtw	x6, w2
+	ldrh	w17, [x7, 4]
+	ldrh	w3, [x15, x6, lsl 1]
+	lsl	x6, x6, 2
+	ldr	w5, [x14, x6]
+	mul	w3, w3, w17
+	ldrh	w6, [x14, x6]
+	ubfx	x5, x5, 11, 8
+	and	w6, w6, 2047
+	cbz	w3, .L48
+	madd	w5, w16, w5, w6
+	add	w3, w3, w5, uxth
+.L48:
+	cbz	w17, .L49
+	cmp	w8, w3
+	bls	.L49
+	ldrh	w3, [x7]
+	cmp	w3, w20
+	bne	.L50
+	strh	w2, [x11, 2]
+	strh	w1, [x7]
+.L41:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L50:
+	umaddl	x7, w3, w30, x10
+	mov	w2, w3
+	b	.L51
+.L49:
+	ldrh	w3, [x7, 2]
+	cmp	x12, x7
+	strh	w3, [x11, 2]
+	strh	w2, [x10, x13]
+	bne	.L52
+	strh	w1, [x12, 2]
+	str	x11, [x0]
+	b	.L41
+.L52:
+	ldrh	w0, [x7, 2]
+	mov	w2, 6
+	umull	x0, w0, w2
+	strh	w1, [x10, x0]
+	strh	w1, [x7, 2]
+	b	.L41
+.L63:
+	ret
+	.size	_insert_data_list, .-_insert_data_list
+	.section	.text._list_get_gc_head_node.isra.2,"ax",@progbits
+	.align	2
+	.type	_list_get_gc_head_node.isra.2, %function
+_list_get_gc_head_node.isra.2:
+	and	w1, w1, 65535
+	cbz	x0, .L70
+	adrp	x2, .LANCHOR4
+	mov	w3, 65535
+	mov	w4, 6
+	ldr	x2, [x2, #:lo12:.LANCHOR4]
+.L67:
+	cbz	w1, .L68
+	ldrh	w0, [x0]
+	cmp	w0, w3
+	bne	.L69
+	ret
+.L69:
+	sub	w1, w1, #1
+	umaddl	x0, w0, w4, x2
+	and	w1, w1, 65535
+	b	.L67
+.L70:
+	mov	w0, 65535
+	ret
+.L68:
+	sub	x0, x0, x2
+	mov	x1, -6148914691236517206
+	asr	x0, x0, 1
+	movk	x1, 0xaaab, lsl 0
+	mul	x0, x0, x1
+	and	w0, w0, 65535
+	ret
+	.size	_list_get_gc_head_node.isra.2, .-_list_get_gc_head_node.isra.2
+	.section	.text._list_update_data_list,"ax",@progbits
+	.align	2
+	.type	_list_update_data_list, %function
+_list_update_data_list:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w19, w1, 65535
+	adrp	x1, .LANCHOR10
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	ldr	x1, [x1, #:lo12:.LANCHOR10]
+	ldrh	w3, [x1, 16]
+	str	x25, [sp, 64]
+	cmp	w3, w19
+	beq	.L72
+	ldrh	w3, [x1, 48]
+	cmp	w3, w19
+	beq	.L72
+	ldrh	w1, [x1, 80]
+	cmp	w1, w19
+	beq	.L72
+	adrp	x1, .LANCHOR4
+	mov	w22, 6
+	ldr	x3, [x0]
+	mov	x25, x1
+	umull	x22, w19, w22
+	ldr	x24, [x1, #:lo12:.LANCHOR4]
+	add	x23, x24, x22
+	cmp	x23, x3
+	beq	.L72
+	mov	x20, x0
+	ldrh	w0, [x23, 2]
+	mov	w1, 65535
+	mov	x21, x2
+	cmp	w0, w1
+	bne	.L76
+	ldrh	w1, [x24, x22]
+	cmp	w1, w0
+	bne	.L76
+	adrp	x1, .LANCHOR11
+	adrp	x0, .LC0
+	mov	w2, 273
+	add	x1, x1, :lo12:.LANCHOR11
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L76:
+	ldrh	w1, [x23, 2]
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L77
+	ldrh	w0, [x24, x22]
+	cmp	w0, w1
+	beq	.L72
+.L77:
+	adrp	x0, .LANCHOR9
+	ubfiz	x2, x19, 1, 16
+	mov	x5, -6148914691236517206
+	mov	w4, -1
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	movk	x5, 0xaaab, lsl 0
+	ldrh	w3, [x0, x2]
+	ldrh	w2, [x23, 4]
+	cmp	w2, 0
+	mul	w3, w3, w2
+	mov	w2, 6
+	umull	x1, w1, w2
+	csel	w3, w3, w4, ne
+	asr	x2, x1, 1
+	mul	x2, x2, x5
+	ldrh	w0, [x0, x2, lsl 1]
+	ldr	x2, [x25, #:lo12:.LANCHOR4]
+	add	x1, x2, x1
+	ldrh	w1, [x1, 4]
+	cmp	w1, 0
+	mul	w0, w0, w1
+	csel	w0, w0, w4, ne
+	cmp	w3, w0
+	bcs	.L72
+	mov	x2, x21
+	mov	w1, w19
+	mov	x0, x20
+	bl	_list_remove_node
+	mov	x2, x21
+	mov	w1, w19
+	mov	x0, x20
+	ldr	x25, [sp, 64]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	b	_insert_data_list
+.L72:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+	.size	_list_update_data_list, .-_list_update_data_list
+	.section	.text.zftl_get_gc_node.part.9,"ax",@progbits
+	.align	2
+	.type	zftl_get_gc_node.part.9, %function
+zftl_get_gc_node.part.9:
+	mov	w1, w0
+	adrp	x0, .LANCHOR12
+	ldr	x0, [x0, #:lo12:.LANCHOR12]
+	b	_list_get_gc_head_node.isra.2
+	.size	zftl_get_gc_node.part.9, .-zftl_get_gc_node.part.9
+	.section	.text.nandc_de_cs.constprop.32,"ax",@progbits
+	.align	2
+	.type	nandc_de_cs.constprop.32, %function
+nandc_de_cs.constprop.32:
+	adrp	x0, .LANCHOR13
+	ldr	x1, [x0, #:lo12:.LANCHOR13]
+	ldr	w0, [x1]
+	and	w0, w0, -256
+	and	w0, w0, -131073
+	str	w0, [x1]
+	ret
+	.size	nandc_de_cs.constprop.32, .-nandc_de_cs.constprop.32
+	.section	.text.nand_flash_print_info,"ax",@progbits
+	.align	2
+	.global	nand_flash_print_info
+	.type	nand_flash_print_info, %function
+nand_flash_print_info:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	adrp	x19, .LANCHOR14
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L86
+	adrp	x1, .LANCHOR15
+	adrp	x0, .LC1
+	add	x1, x1, :lo12:.LANCHOR15
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L86:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L87
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
+	ldrb	w6, [x0, 6]
+	ldrb	w5, [x0, 5]
+	ldrb	w4, [x0, 4]
+	ldrb	w3, [x0, 3]
+	ldrb	w2, [x0, 2]
+	ldrb	w1, [x0, 1]
+	adrp	x0, .LC2
+	add	x0, x0, :lo12:.LC2
+	bl	printf
+.L87:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L88
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
+	ldrb	w1, [x0, 8]
+	adrp	x0, .LC3
+	add	x0, x0, :lo12:.LC3
+	bl	printf
+.L88:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L89
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
+	ldrb	w1, [x0, 9]
+	adrp	x0, .LC4
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+.L89:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L90
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
+	ldrh	w1, [x0, 10]
+	adrp	x0, .LC5
+	add	x0, x0, :lo12:.LC5
+	bl	printf
+.L90:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L91
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
+	ldrb	w1, [x0, 12]
+	adrp	x0, .LC6
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L91:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L92
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
+	ldrb	w1, [x0, 13]
+	adrp	x0, .LC7
+	add	x0, x0, :lo12:.LC7
+	bl	printf
+.L92:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L93
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
+	ldrh	w1, [x0, 14]
+	adrp	x0, .LC8
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L93:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L94
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
+	ldrb	w1, [x0, 23]
+	adrp	x0, .LC9
+	add	x0, x0, :lo12:.LC9
+	bl	printf
+.L94:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L95
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
+	ldrb	w1, [x0, 18]
+	adrp	x0, .LC10
+	add	x0, x0, :lo12:.LC10
+	bl	printf
+.L95:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L96
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
+	ldrb	w1, [x0, 19]
+	adrp	x0, .LC11
+	add	x0, x0, :lo12:.LC11
+	bl	printf
+.L96:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L97
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
+	ldrb	w1, [x0, 20]
+	adrp	x0, .LC12
+	add	x0, x0, :lo12:.LC12
+	bl	printf
+.L97:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L98
+	adrp	x0, .LANCHOR17
+	ldrb	w1, [x0, #:lo12:.LANCHOR17]
+	adrp	x0, .LC13
+	add	x0, x0, :lo12:.LC13
+	bl	printf
+.L98:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L99
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
+	ldrb	w1, [x0, 22]
+	adrp	x0, .LC14
+	add	x0, x0, :lo12:.LC14
+	bl	printf
+.L99:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L100
+	adrp	x0, .LANCHOR18
+	ldrb	w1, [x0, #:lo12:.LANCHOR18]
+	adrp	x0, .LC15
+	add	x0, x0, :lo12:.LC15
+	bl	printf
+.L100:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L101
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
+	ldrb	w1, [x0, 16]
+	adrp	x0, .LC16
+	add	x0, x0, :lo12:.LC16
+	and	w1, w1, 1
+	bl	printf
+.L101:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L102
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
+	ldrh	w1, [x0, 16]
+	adrp	x0, .LC17
+	add	x0, x0, :lo12:.LC17
+	ubfx	x1, x1, 1, 1
+	bl	printf
+.L102:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L103
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
+	ldrh	w1, [x0, 16]
+	adrp	x0, .LC18
+	add	x0, x0, :lo12:.LC18
+	ubfx	x1, x1, 2, 1
+	bl	printf
+.L103:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L104
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
+	ldrh	w1, [x0, 16]
+	adrp	x0, .LC19
+	add	x0, x0, :lo12:.LC19
+	ubfx	x1, x1, 3, 1
+	bl	printf
+.L104:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L105
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
+	ldrh	w1, [x0, 16]
+	adrp	x0, .LC20
+	add	x0, x0, :lo12:.LC20
+	ubfx	x1, x1, 4, 1
+	bl	printf
+.L105:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L106
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
+	ldrh	w1, [x0, 16]
+	adrp	x0, .LC21
+	add	x0, x0, :lo12:.LC21
+	ubfx	x1, x1, 5, 1
+	bl	printf
+.L106:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L107
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
+	ldrh	w1, [x0, 16]
+	adrp	x0, .LC22
+	add	x0, x0, :lo12:.LC22
+	ubfx	x1, x1, 6, 1
+	bl	printf
+.L107:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L108
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
+	ldrh	w1, [x0, 16]
+	adrp	x0, .LC23
+	add	x0, x0, :lo12:.LC23
+	ubfx	x1, x1, 7, 1
+	bl	printf
+.L108:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L109
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
+	ldrb	w1, [x0, 17]
+	adrp	x0, .LC24
+	add	x0, x0, :lo12:.LC24
+	and	w1, w1, 1
+	bl	printf
+.L109:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L110
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
+	ldrh	w1, [x0, 16]
+	adrp	x0, .LC25
+	add	x0, x0, :lo12:.LC25
+	ubfx	x1, x1, 9, 1
+	bl	printf
+.L110:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L111
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
+	ldrh	w1, [x0, 16]
+	adrp	x0, .LC26
+	add	x0, x0, :lo12:.LC26
+	ubfx	x1, x1, 10, 1
+	bl	printf
+.L111:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L112
+	adrp	x0, .LANCHOR19
+	ldrb	w2, [x0, #:lo12:.LANCHOR19]
+	adrp	x0, .LANCHOR0
+	ldrb	w1, [x0, #:lo12:.LANCHOR0]
+	adrp	x0, .LC27
+	add	x0, x0, :lo12:.LC27
+	bl	printf
+.L112:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L113
+	adrp	x0, .LANCHOR20
+	add	x0, x0, :lo12:.LANCHOR20
+	ldrb	w2, [x0, 11]
+	ldrb	w1, [x0, 10]
+	adrp	x0, .LC28
+	add	x0, x0, :lo12:.LC28
+	bl	printf
+.L113:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L114
+	adrp	x0, .LANCHOR20
+	add	x0, x0, :lo12:.LANCHOR20
+	ldrb	w2, [x0, 9]
+	ldrb	w1, [x0, 8]
+	adrp	x0, .LC29
+	add	x0, x0, :lo12:.LC29
+	bl	printf
+.L114:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L85
+	adrp	x0, .LANCHOR21
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ldrb	w1, [x0, #:lo12:.LANCHOR21]
+	adrp	x0, .LC30
+	add	x0, x0, :lo12:.LC30
+	b	printf
+.L85:
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	nand_flash_print_info, .-nand_flash_print_info
+	.section	.text.timer_delay_ns,"ax",@progbits
+	.align	2
+	.global	timer_delay_ns
+	.type	timer_delay_ns, %function
+timer_delay_ns:
+	sub	sp, sp, #16
+	lsr	w0, w0, 4
+	str	w0, [sp, 12]
+.L205:
+	ldr	w0, [sp, 12]
+	sub	w1, w0, #1
+	str	w1, [sp, 12]
+	cbnz	w0, .L205
+	add	sp, sp, 16
+	ret
+	.size	timer_delay_ns, .-timer_delay_ns
+	.section	.text.flash_read_status,"ax",@progbits
+	.align	2
+	.global	flash_read_status
+	.type	flash_read_status, %function
+flash_read_status:
+	stp	x29, x30, [sp, -16]!
+	mov	x2, x0
+	mov	w0, 112
+	add	x29, sp, 0
+	str	w0, [x2, 8]
+	mov	w0, 120
+	bl	timer_delay_ns
+	ldr	w0, [x2]
+	ldp	x29, x30, [sp], 16
+	and	w0, w0, 255
+	ret
+	.size	flash_read_status, .-flash_read_status
+	.section	.text.toshiba_set_rr_para,"ax",@progbits
+	.align	2
+	.global	toshiba_set_rr_para
+	.type	toshiba_set_rr_para, %function
+toshiba_set_rr_para:
+	and	w11, w1, 255
+	mov	x4, x0
+	add	w2, w11, 1
+	mov	w0, 5
+	adrp	x6, .LANCHOR26
+	add	x6, x6, :lo12:.LANCHOR26
+	adrp	x3, .LANCHOR22
+	add	x3, x3, :lo12:.LANCHOR22
+	umull	x2, w2, w0
+	adrp	x0, .LANCHOR23
+	add	x7, x0, :lo12:.LANCHOR23
+	mov	x5, x0
+	ldrb	w0, [x6]
+	add	x3, x3, x2
+	add	x7, x7, x2
+	adrp	x8, .LANCHOR24
+	mov	x2, 0
+	adrp	x10, .LANCHOR25
+	add	x8, x8, :lo12:.LANCHOR24
+	add	x10, x10, :lo12:.LANCHOR25
+	cmp	w0, w2
+	bhi	.L218
+	ret
+.L212:
+	cmp	w0, 35
+	bne	.L214
+	ldrsb	w0, [x3, x2]
+	b	.L219
+.L214:
+	ldrsb	w0, [x10, w11, sxtw]
+	b	.L219
+.L218:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+.L215:
+	mov	w0, 85
+	str	w0, [x4, 8]
+	add	x0, x5, :lo12:.LANCHOR23
+	ldrsb	w0, [x2, x0]
+	str	w0, [x4, 4]
+	mov	w0, 200
+	bl	timer_delay_ns
+	ldrb	w0, [x8]
+	cmp	w0, 34
+	bne	.L212
+	ldrsb	w0, [x7, x2]
+.L219:
+	str	w0, [x4]
+	add	x2, x2, 1
+	ldrb	w0, [x6]
+	cmp	w0, w2
+	bhi	.L215
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	toshiba_set_rr_para, .-toshiba_set_rr_para
+	.section	.text.hynix_set_rr_para,"ax",@progbits
+	.align	2
+	.type	hynix_set_rr_para, %function
+hynix_set_rr_para:
+	adrp	x2, .LANCHOR27
+	and	w1, w1, 255
+	and	w0, w0, 255
+	ldr	x3, [x2, #:lo12:.LANCHOR27]
+	adrp	x2, .LANCHOR13
+	add	x6, x3, 128
+	add	x4, x3, 112
+	ldr	x2, [x2, #:lo12:.LANCHOR13]
+	ldrb	w5, [x3, 113]
+	ldrb	w3, [x3, 112]
+	cmp	w3, 8
+	mov	x3, 32
+	umaddl	x1, w1, w5, x3
+	beq	.L221
+	mov	w3, 160
+	umaddl	x1, w3, w0, x1
+.L221:
+	ubfiz	x0, x0, 8, 8
+	mov	x3, 0
+	add	x2, x2, x0
+	mov	w0, 54
+	add	x4, x4, x1
+	cmp	w5, w3, uxtb
+	str	w0, [x2, 2056]
+	bhi	.L228
+	mov	w0, 22
+	str	w0, [x2, 2056]
+	ret
+.L228:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+.L224:
+	ldrb	w0, [x6, x3]
+	str	w0, [x2, 2052]
+	mov	w0, 120
+	bl	timer_delay_ns
+	ldrsb	w0, [x4, x3]
+	str	w0, [x2, 2048]
+	add	x3, x3, 1
+	cmp	w5, w3, uxtb
+	bhi	.L224
+	mov	w0, 22
+	str	w0, [x2, 2056]
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	hynix_set_rr_para, .-hynix_set_rr_para
+	.section	.text.hynix_reconfig_rr_para,"ax",@progbits
+	.align	2
+	.global	hynix_reconfig_rr_para
+	.type	hynix_reconfig_rr_para, %function
+hynix_reconfig_rr_para:
+	adrp	x1, .LANCHOR24
+	ldrb	w1, [x1, #:lo12:.LANCHOR24]
+	sub	w1, w1, #1
+	and	w1, w1, 255
+	cmp	w1, 7
+	bhi	.L235
+	adrp	x8, .LANCHOR27
+	and	w0, w0, 255
+	sxtw	x7, w0
+	ldr	x1, [x8, #:lo12:.LANCHOR27]
+	add	x1, x1, x7
+	ldrb	w1, [x1, 120]
+	cbz	w1, .L235
+	stp	x29, x30, [sp, -16]!
+	mov	w1, 0
+	add	x29, sp, 0
+	bl	hynix_set_rr_para
+	ldr	x0, [x8, #:lo12:.LANCHOR27]
+	add	x0, x0, x7
+	strb	wzr, [x0, 120]
+	ldp	x29, x30, [sp], 16
+	ret
+.L235:
+	ret
+	.size	hynix_reconfig_rr_para, .-hynix_reconfig_rr_para
+	.section	.text.nandc_set_ddr_para,"ax",@progbits
+	.align	2
+	.global	nandc_set_ddr_para
+	.type	nandc_set_ddr_para, %function
+nandc_set_ddr_para:
+	adrp	x1, .LANCHOR28
+	and	w0, w0, 255
+	adrp	x2, .LANCHOR13
+	ldrb	w1, [x1, #:lo12:.LANCHOR28]
+	ldr	x2, [x2, #:lo12:.LANCHOR13]
+	cmp	w1, 9
+	lsl	w1, w0, 16
+	lsl	w0, w0, 8
+	orr	w1, w1, w0
+	orr	w1, w1, 3
+	bne	.L239
+	str	w1, [x2, 80]
+	ret
+.L239:
+	str	w1, [x2, 304]
+	ret
+	.size	nandc_set_ddr_para, .-nandc_set_ddr_para
+	.section	.text.nandc_get_ddr_para,"ax",@progbits
+	.align	2
+	.global	nandc_get_ddr_para
+	.type	nandc_get_ddr_para, %function
+nandc_get_ddr_para:
+	adrp	x0, .LANCHOR28
+	ldrb	w0, [x0, #:lo12:.LANCHOR28]
+	cmp	w0, 9
+	adrp	x0, .LANCHOR13
+	ldr	x0, [x0, #:lo12:.LANCHOR13]
+	bne	.L242
+	ldr	w0, [x0, 80]
+.L244:
+	ubfx	x0, x0, 8, 8
+	ret
+.L242:
+	ldr	w0, [x0, 304]
+	b	.L244
+	.size	nandc_get_ddr_para, .-nandc_get_ddr_para
+	.section	.text.nandc_set_if_mode,"ax",@progbits
+	.align	2
+	.global	nandc_set_if_mode
+	.type	nandc_set_if_mode, %function
+nandc_set_if_mode:
+	adrp	x1, .LANCHOR13
+	and	w0, w0, 255
+	tst	w0, 6
+	ldr	x2, [x1, #:lo12:.LANCHOR13]
+	ldr	w1, [x2]
+	beq	.L246
+	tst	x0, 4
+	orr	w1, w1, 24576
+	adrp	x0, .LANCHOR28
+	and	w1, w1, -32769
+	orr	w1, w1, 196608
+	ldrb	w0, [x0, #:lo12:.LANCHOR28]
+	orr	w3, w1, 32768
+	csel	w1, w3, w1, ne
+	cmp	w0, 9
+	mov	w0, 4099
+	movk	w0, 0x10, lsl 16
+	bne	.L248
+	mov	w3, 8321
+	str	w3, [x2, 8]
+	str	w0, [x2, 80]
+	mov	w0, 38
+	str	w0, [x2, 84]
+	mov	w0, 39
+	str	w0, [x2, 84]
+.L249:
+	str	w1, [x2]
+	ret
+.L248:
+	mov	w3, 8322
+	str	w3, [x2, 344]
+	str	w0, [x2, 304]
+	mov	w0, 38
+	str	w0, [x2, 308]
+	mov	w0, 39
+	str	w0, [x2, 308]
+	b	.L249
+.L246:
+	and	w1, w1, -8193
+	b	.L249
+	.size	nandc_set_if_mode, .-nandc_set_if_mode
+	.section	.text.nandc_cs,"ax",@progbits
+	.align	2
+	.global	nandc_cs
+	.type	nandc_cs, %function
+nandc_cs:
+	adrp	x1, .LANCHOR13
+	mov	w2, 1
+	lsl	w0, w2, w0
+	ldr	x3, [x1, #:lo12:.LANCHOR13]
+	ldr	w1, [x3]
+	bfi	w1, w0, 0, 8
+	str	w1, [x3]
+	ret
+	.size	nandc_cs, .-nandc_cs
+	.section	.text.flash_wait_device_ready_raw,"ax",@progbits
+	.align	2
+	.global	flash_wait_device_ready_raw
+	.type	flash_wait_device_ready_raw, %function
+flash_wait_device_ready_raw:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	str	x21, [sp, 32]
+	and	w21, w0, 255
+	adrp	x0, .LANCHOR18
+	stp	x19, x20, [sp, 16]
+	mov	w19, w1
+	mov	w20, w2
+	ldrb	w0, [x0, #:lo12:.LANCHOR18]
+	cmp	w0, w21
+	bhi	.L254
+	adrp	x1, .LANCHOR29
+	adrp	x0, .LC0
+	mov	w2, 805
+	add	x1, x1, :lo12:.LANCHOR29
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L254:
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
+	lsr	w7, w19, 8
+	lsr	w8, w19, 16
+	lsr	w10, w19, 24
+	adrp	x5, .LANCHOR31
+	ldrb	w6, [x0, w21, sxtw]
+	adrp	x0, .LANCHOR13
+	and	w19, w19, 255
+	add	x5, x5, :lo12:.LANCHOR31
+	ldr	x4, [x0, #:lo12:.LANCHOR13]
+	mov	w11, 120
+	ubfiz	x0, x6, 8, 8
+	add	x4, x4, x0
+.L260:
+	mov	w0, w6
+	bl	nandc_cs
+	str	w11, [x4, 2056]
+	str	w19, [x4, 2052]
+	ldrb	w0, [x5]
+	str	w7, [x4, 2052]
+	str	w8, [x4, 2052]
+	cbz	w0, .L255
+	str	w10, [x4, 2052]
+.L255:
+	mov	w0, 120
+	bl	timer_delay_ns
+	ldr	w2, [x4, 2048]
+	and	w2, w2, 255
+	bl	nandc_de_cs.constprop.32
+	bics	wzr, w20, w2
+	bne	.L260
+	cmp	w2, 255
+	beq	.L260
+	mov	w0, w2
+	ldr	x21, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+	.size	flash_wait_device_ready_raw, .-flash_wait_device_ready_raw
+	.section	.text.flash_wait_device_ready,"ax",@progbits
+	.align	2
+	.global	flash_wait_device_ready
+	.type	flash_wait_device_ready, %function
+flash_wait_device_ready:
+	mov	w2, w1
+	adrp	x1, .LANCHOR32
+	mov	w5, 24
+	mov	w4, 1
+	ldrb	w6, [x1, #:lo12:.LANCHOR32]
+	tst	x0, 50331648
+	sub	w5, w5, w6
+	lsl	w3, w4, w5
+	sub	w3, w3, #1
+	lsl	w4, w4, w6
+	sub	w4, w4, #1
+	asr	w5, w0, w5
+	and	w4, w4, w5
+	and	w1, w3, w0
+	and	w4, w4, 255
+	bne	.L265
+	adrp	x0, .LANCHOR0
+	adrp	x5, .LANCHOR1
+	ldrb	w0, [x0, #:lo12:.LANCHOR0]
+	cbz	w0, .L266
+	ldrb	w0, [x5, #:lo12:.LANCHOR1]
+	cbz	w0, .L265
+.L266:
+	adrp	x0, .LANCHOR2
+	ldrh	w3, [x0, #:lo12:.LANCHOR2]
+	udiv	w0, w1, w3
+	mul	w0, w0, w3
+	sub	w3, w1, w0
+	ldrb	w1, [x5, #:lo12:.LANCHOR1]
+	cbz	w1, .L267
+	add	w1, w0, w3, lsl 1
+.L265:
+	mov	w0, w4
+	b	flash_wait_device_ready_raw
+.L267:
+	adrp	x5, .LANCHOR3
+	add	x5, x5, :lo12:.LANCHOR3
+	ldrh	w3, [x5, w3, uxtw 1]
+	add	w1, w3, w0
+	b	.L265
+	.size	flash_wait_device_ready, .-flash_wait_device_ready
+	.section	.text.nandc_de_cs,"ax",@progbits
+	.align	2
+	.global	nandc_de_cs
+	.type	nandc_de_cs, %function
+nandc_de_cs:
+	adrp	x0, .LANCHOR13
+	ldr	x1, [x0, #:lo12:.LANCHOR13]
+	ldr	w0, [x1]
+	and	w0, w0, -256
+	and	w0, w0, -131073
+	str	w0, [x1]
+	ret
+	.size	nandc_de_cs, .-nandc_de_cs
+	.section	.text.nandc_wait_flash_ready_no_delay,"ax",@progbits
+	.align	2
+	.global	nandc_wait_flash_ready_no_delay
+	.type	nandc_wait_flash_ready_no_delay, %function
+nandc_wait_flash_ready_no_delay:
+	mov	w2, 34464
+	stp	x29, x30, [sp, -32]!
+	movk	w2, 0x1, lsl 16
+	adrp	x3, .LANCHOR13
+	add	x29, sp, 0
+.L277:
+	ldr	x0, [x3, #:lo12:.LANCHOR13]
+	ldr	w0, [x0]
+	str	w0, [x29, 24]
+	ldr	w0, [x29, 24]
+	tbnz	x0, 9, .L278
+	mov	w0, 10
+	bl	timer_delay_ns
+	subs	w2, w2, #1
+	bne	.L277
+	mov	w0, -1
+.L275:
+	ldp	x29, x30, [sp], 32
+	ret
+.L278:
+	mov	w0, 0
+	b	.L275
+	.size	nandc_wait_flash_ready_no_delay, .-nandc_wait_flash_ready_no_delay
+	.section	.text.zftl_flash_enter_slc_mode,"ax",@progbits
+	.align	2
+	.global	zftl_flash_enter_slc_mode
+	.type	zftl_flash_enter_slc_mode, %function
+zftl_flash_enter_slc_mode:
+	and	x4, x0, 255
+	adrp	x0, .LANCHOR0
+	ldrb	w0, [x0, #:lo12:.LANCHOR0]
+	cbz	w0, .L300
+	adrp	x1, .LANCHOR13
+	cmp	w0, 1
+	ldr	x5, [x1, #:lo12:.LANCHOR13]
+	bne	.L284
+	adrp	x0, .LANCHOR33+29
+	ldrb	w0, [x0, #:lo12:.LANCHOR33+29]
+	cbz	w0, .L300
+	add	x4, x4, 8
+	add	x4, x5, x4, lsl 8
+	str	w0, [x4, 8]
+	ret
+.L284:
+	stp	x29, x30, [sp, -16]!
+	cmp	w0, 2
+	add	x29, sp, 0
+	bne	.L286
+	adrp	x0, .LANCHOR34
+	add	x0, x0, :lo12:.LANCHOR34
+	ldrb	w1, [x0, x4]
+	cbz	w1, .L281
+	adrp	x6, .LANCHOR33
+	add	x6, x6, :lo12:.LANCHOR33
+	strb	wzr, [x0, x4]
+	ldrb	w0, [x6, 29]
+	cbz	w0, .L281
+	bl	nandc_wait_flash_ready_no_delay
+	add	x4, x4, 8
+	add	x4, x5, x4, lsl 8
+	ldrb	w0, [x6, 29]
+	str	w0, [x4, 8]
+.L281:
+	ldp	x29, x30, [sp], 16
+	ret
+.L286:
+	cmp	w0, 3
+	bne	.L281
+	adrp	x6, .LANCHOR34
+	sxtw	x7, w4
+	add	x6, x6, :lo12:.LANCHOR34
+	ldrb	w0, [x6, x7]
+	cbz	w0, .L281
+	bl	nandc_wait_flash_ready_no_delay
+	ubfiz	x4, x4, 8, 8
+	add	x4, x5, x4
+	mov	w0, 239
+	strb	wzr, [x6, x7]
+	str	w0, [x4, 2056]
+	mov	w0, 145
+	str	w0, [x4, 2052]
+	mov	w0, 100
+	bl	timer_delay_ns
+	str	wzr, [x4, 2048]
+	mov	w0, 1
+	str	w0, [x4, 2048]
+	str	wzr, [x4, 2048]
+	mov	w0, 150
+	str	wzr, [x4, 2048]
+	bl	timer_delay_ns
+	bl	nandc_wait_flash_ready_no_delay
+	mov	w0, 218
+	str	w0, [x4, 2056]
+	b	.L281
+.L300:
+	ret
+	.size	zftl_flash_enter_slc_mode, .-zftl_flash_enter_slc_mode
+	.section	.text.zftl_flash_exit_slc_mode,"ax",@progbits
+	.align	2
+	.global	zftl_flash_exit_slc_mode
+	.type	zftl_flash_exit_slc_mode, %function
+zftl_flash_exit_slc_mode:
+	and	x4, x0, 255
+	adrp	x0, .LANCHOR0
+	ldrb	w0, [x0, #:lo12:.LANCHOR0]
+	cbz	w0, .L323
+	adrp	x1, .LANCHOR13
+	cmp	w0, 1
+	ldr	x5, [x1, #:lo12:.LANCHOR13]
+	bne	.L305
+	adrp	x0, .LANCHOR33+30
+	ldrb	w0, [x0, #:lo12:.LANCHOR33+30]
+	cbz	w0, .L323
+	add	x4, x4, 8
+	add	x4, x5, x4, lsl 8
+	str	w0, [x4, 8]
+	ret
+.L305:
+	stp	x29, x30, [sp, -16]!
+	cmp	w0, 2
+	add	x29, sp, 0
+	bne	.L307
+	adrp	x0, .LANCHOR34
+	add	x0, x0, :lo12:.LANCHOR34
+	ldrb	w1, [x0, x4]
+	cbnz	w1, .L302
+	adrp	x6, .LANCHOR33
+	add	x6, x6, :lo12:.LANCHOR33
+	mov	w2, 4
+	ldrb	w1, [x6, 12]
+	cmp	w1, 2
+	csel	w1, w1, w2, eq
+	strb	w1, [x0, x4]
+	ldrb	w0, [x6, 30]
+	cbz	w0, .L302
+	bl	nandc_wait_flash_ready_no_delay
+	add	x4, x4, 8
+	add	x4, x5, x4, lsl 8
+	ldrb	w0, [x6, 30]
+	str	w0, [x4, 8]
+.L302:
+	ldp	x29, x30, [sp], 16
+	ret
+.L307:
+	cmp	w0, 3
+	bne	.L302
+	adrp	x6, .LANCHOR34
+	sxtw	x7, w4
+	add	x6, x6, :lo12:.LANCHOR34
+	ldrb	w0, [x6, x7]
+	cbnz	w0, .L302
+	bl	nandc_wait_flash_ready_no_delay
+	ubfiz	x4, x4, 8, 8
+	adrp	x2, .LANCHOR33
+	add	x2, x2, :lo12:.LANCHOR33
+	add	x4, x5, x4
+	mov	w1, 4
+	ldrb	w0, [x2, 12]
+	cmp	w0, 2
+	csel	w0, w0, w1, eq
+	strb	w0, [x6, x7]
+	mov	w0, 239
+	str	w0, [x4, 2056]
+	mov	w0, 145
+	str	w0, [x4, 2052]
+	mov	w0, 100
+	bl	timer_delay_ns
+	ldrb	w0, [x2, 7]
+	cmp	w0, 9
+	mov	w0, 1
+	bne	.L310
+	str	w0, [x4, 2048]
+.L311:
+	str	w0, [x4, 2048]
+	mov	w0, 150
+	str	wzr, [x4, 2048]
+	str	wzr, [x4, 2048]
+	bl	timer_delay_ns
+	bl	nandc_wait_flash_ready_no_delay
+	mov	w0, 223
+	str	w0, [x4, 2056]
+	b	.L302
+.L310:
+	ldrb	w1, [x6, x7]
+	str	w1, [x4, 2048]
+	b	.L311
+.L323:
+	ret
+	.size	zftl_flash_exit_slc_mode, .-zftl_flash_exit_slc_mode
+	.section	.text.flash_start_page_read,"ax",@progbits
+	.align	2
+	.global	flash_start_page_read
+	.type	flash_start_page_read, %function
+flash_start_page_read:
+	stp	x29, x30, [sp, -64]!
+	mov	w8, 24
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w20, w0, 255
+	adrp	x0, .LANCHOR32
+	stp	x21, x22, [sp, 32]
+	mov	w19, 1
+	mov	w21, w1
+	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	str	x23, [sp, 48]
+	sub	w22, w8, w0
+	lsl	w19, w19, w0
+	sub	w19, w19, #1
+	lsr	w0, w1, w22
+	and	w19, w19, w0
+	adrp	x0, .LANCHOR18
+	and	w19, w19, 255
+	mov	x23, x0
+	ldrb	w1, [x0, #:lo12:.LANCHOR18]
+	cmp	w1, w19
+	bhi	.L326
+	adrp	x1, .LANCHOR35
+	adrp	x0, .LC0
+	mov	w2, 1001
+	add	x1, x1, :lo12:.LANCHOR35
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L326:
+	ldrb	w0, [x23, #:lo12:.LANCHOR18]
+	cmp	w0, w19
+	bls	.L325
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
+	mov	w8, 1
+	lsl	w8, w8, w22
+	sub	w8, w8, #1
+	ldrb	w11, [x0, w19, sxtw]
+	adrp	x0, .LANCHOR13
+	and	w8, w8, w21
+	ubfx	x21, x21, 24, 2
+	ldr	x10, [x0, #:lo12:.LANCHOR13]
+	mov	w0, w11
+	bl	nandc_cs
+	adrp	x12, .LANCHOR16
+	cbnz	w21, .L328
+	mov	w0, w8
+	bl	slc_phy_page_address_calc
+	mov	w8, w0
+	adrp	x0, .LANCHOR0
+	ldrb	w0, [x0, #:lo12:.LANCHOR0]
+	cbz	w0, .L329
+	mov	w0, w11
+	bl	zftl_flash_enter_slc_mode
+.L329:
+	ldr	x0, [x12, #:lo12:.LANCHOR16]
+	ldrb	w1, [x0, 7]
+	cmp	w1, 1
+	bne	.L331
+	ldrb	w0, [x0, 12]
+	cmp	w0, 2
+	bne	.L331
+	sxtw	x0, w11
+	mov	w1, 38
+	add	x0, x0, 8
+	add	x0, x10, x0, lsl 8
+	str	w1, [x0, 8]
+.L331:
+	ubfiz	x0, x11, 8, 8
+	and	w1, w8, 255
+	add	x0, x10, x0
+	str	wzr, [x0, 2056]
+	str	wzr, [x0, 2052]
+	str	wzr, [x0, 2052]
+	str	w1, [x0, 2052]
+	lsr	w1, w8, 8
+	str	w1, [x0, 2052]
+	lsr	w1, w8, 16
+	str	w1, [x0, 2052]
+	adrp	x1, .LANCHOR31
+	ldrb	w1, [x1, #:lo12:.LANCHOR31]
+	cbz	w1, .L332
+	lsr	w8, w8, 24
+	str	w8, [x0, 2052]
+.L332:
+	str	w20, [x0, 2056]
+.L325:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	ret
+.L328:
+	ldr	x0, [x12, #:lo12:.LANCHOR16]
+	ldrb	w0, [x0, 12]
+	cmp	w0, 3
+	bne	.L330
+	adrp	x0, .LANCHOR36
+	ldrb	w0, [x0, #:lo12:.LANCHOR36]
+	cbnz	w0, .L330
+	adrp	x0, .LANCHOR37
+	ldrb	w0, [x0, #:lo12:.LANCHOR37]
+	cbnz	w0, .L330
+	sxtw	x0, w11
+	add	x0, x0, 8
+	add	x0, x10, x0, lsl 8
+	str	w21, [x0, 8]
+	b	.L329
+.L330:
+	mov	w0, w11
+	bl	zftl_flash_exit_slc_mode
+	b	.L329
+	.size	flash_start_page_read, .-flash_start_page_read
+	.section	.text.nandc_wait_flash_ready,"ax",@progbits
+	.align	2
+	.global	nandc_wait_flash_ready
+	.type	nandc_wait_flash_ready, %function
+nandc_wait_flash_ready:
+	stp	x29, x30, [sp, -32]!
+	mov	w0, 150
+	add	x29, sp, 0
+	bl	timer_delay_ns
+	mov	w2, 34464
+	adrp	x3, .LANCHOR13
+	movk	w2, 0x1, lsl 16
+.L342:
+	ldr	x0, [x3, #:lo12:.LANCHOR13]
+	ldr	w0, [x0]
+	str	w0, [x29, 24]
+	ldr	w0, [x29, 24]
+	tbnz	x0, 9, .L343
+	mov	w0, 10
+	bl	timer_delay_ns
+	subs	w2, w2, #1
+	bne	.L342
+	mov	w0, -1
+.L340:
+	ldp	x29, x30, [sp], 32
+	ret
+.L343:
+	mov	w0, 0
+	b	.L340
+	.size	nandc_wait_flash_ready, .-nandc_wait_flash_ready
+	.section	.text.sandisk_set_rr_para,"ax",@progbits
+	.align	2
+	.global	sandisk_set_rr_para
+	.type	sandisk_set_rr_para, %function
+sandisk_set_rr_para:
+	stp	x29, x30, [sp, -16]!
+	mov	x3, x0
+	and	w2, w1, 255
+	mov	w0, 239
+	add	x29, sp, 0
+	str	w0, [x3, 8]
+	mov	w0, 17
+	str	w0, [x3, 4]
+	mov	w0, 200
+	bl	timer_delay_ns
+	add	w1, w2, 1
+	adrp	x0, .LANCHOR26
+	adrp	x2, .LANCHOR22
+	add	x2, x2, :lo12:.LANCHOR22
+	ldrb	w4, [x0, #:lo12:.LANCHOR26]
+	adrp	x0, .LANCHOR24
+	ldrb	w5, [x0, #:lo12:.LANCHOR24]
+	mov	w0, 5
+	umull	x1, w1, w0
+	adrp	x0, .LANCHOR23
+	add	x0, x0, :lo12:.LANCHOR23
+	add	x2, x2, x1
+	add	x1, x0, x1
+	mov	x0, 0
+.L347:
+	cmp	w4, w0
+	bhi	.L350
+	ldp	x29, x30, [sp], 16
+	b	nandc_wait_flash_ready
+.L350:
+	cmp	w5, 67
+	bne	.L348
+	ldrsb	w6, [x1, x0]
+.L352:
+	add	x0, x0, 1
+	str	w6, [x3]
+	b	.L347
+.L348:
+	ldrsb	w6, [x2, x0]
+	b	.L352
+	.size	sandisk_set_rr_para, .-sandisk_set_rr_para
+	.section	.text.toshiba_3d_set_tlc_rr_para,"ax",@progbits
+	.align	2
+	.global	toshiba_3d_set_tlc_rr_para
+	.type	toshiba_3d_set_tlc_rr_para, %function
+toshiba_3d_set_tlc_rr_para:
+	mov	x4, x0
+	stp	x29, x30, [sp, -16]!
+	and	x2, x1, 255
+	mov	x1, 7
+	add	x29, sp, 0
+	mov	w6, 213
+	str	w6, [x4, 8]
+	str	wzr, [x4, 4]
+	nop // between mem op and mult-accumulate
+	madd	x1, x2, x1, x1
+	mov	w0, -119
+	str	w0, [x4, 4]
+	adrp	x0, .LANCHOR38
+	add	x0, x0, :lo12:.LANCHOR38
+	add	x5, x0, x1
+	ldrsb	w0, [x0, x1]
+	str	w0, [x4]
+	ldrsb	w0, [x5, 1]
+	str	w0, [x4]
+	ldrsb	w0, [x5, 2]
+	str	w0, [x4]
+	ldrsb	w0, [x5, 3]
+	str	w0, [x4]
+	bl	nandc_wait_flash_ready
+	ldp	x29, x30, [sp], 16
+	str	w6, [x4, 8]
+	str	wzr, [x4, 4]
+	mov	w0, -118
+	str	w0, [x4, 4]
+	ldrsb	w0, [x5, 4]
+	str	w0, [x4]
+	ldrsb	w0, [x5, 5]
+	str	w0, [x4]
+	ldrsb	w0, [x5, 6]
+	str	w0, [x4]
+	str	wzr, [x4]
+	b	nandc_wait_flash_ready
+	.size	toshiba_3d_set_tlc_rr_para, .-toshiba_3d_set_tlc_rr_para
+	.section	.text.toshiba_3d_set_slc_rr_para,"ax",@progbits
+	.align	2
+	.global	toshiba_3d_set_slc_rr_para
+	.type	toshiba_3d_set_slc_rr_para, %function
+toshiba_3d_set_slc_rr_para:
+	mov	w2, 213
+	str	w2, [x0, 8]
+	str	wzr, [x0, 4]
+	mov	w2, -117
+	str	w2, [x0, 4]
+	adrp	x2, .LANCHOR39
+	add	x2, x2, :lo12:.LANCHOR39
+	add	x1, x2, x1, uxtb
+	ldrsb	w1, [x1, 1]
+	str	w1, [x0]
+	str	wzr, [x0]
+	str	wzr, [x0]
+	str	wzr, [x0]
+	b	nandc_wait_flash_ready
+	.size	toshiba_3d_set_slc_rr_para, .-toshiba_3d_set_slc_rr_para
+	.section	.text.toshiba_tlc_set_rr_para,"ax",@progbits
+	.align	2
+	.global	toshiba_tlc_set_rr_para
+	.type	toshiba_tlc_set_rr_para, %function
+toshiba_tlc_set_rr_para:
+	mov	w6, 239
+	uxtw	x1, w1
+	cbz	w2, .L357
+	stp	x29, x30, [sp, -16]!
+	mov	x4, x0
+	mov	x2, 7
+	mov	w0, 18
+	add	x29, sp, 0
+	str	w6, [x4, 8]
+	mul	x1, x1, x2
+	str	w0, [x4, 4]
+	adrp	x0, .LANCHOR40
+	add	x0, x0, :lo12:.LANCHOR40
+	add	x5, x0, x1
+	ldrb	w0, [x0, x1]
+	str	w0, [x4]
+	ldrb	w0, [x5, 1]
+	str	w0, [x4]
+	ldrb	w0, [x5, 2]
+	str	w0, [x4]
+	ldrb	w0, [x5, 3]
+	str	w0, [x4]
+	bl	nandc_wait_flash_ready
+	str	w6, [x4, 8]
+	mov	w0, 19
+	str	w0, [x4, 4]
+	ldrb	w0, [x5, 4]
+	str	w0, [x4]
+	ldrb	w0, [x5, 5]
+	str	w0, [x4]
+	ldrb	w0, [x5, 6]
+	str	w0, [x4]
+	str	wzr, [x4]
+	ldp	x29, x30, [sp], 16
+.L360:
+	b	nandc_wait_flash_ready
+.L357:
+	str	w6, [x0, 8]
+	mov	w2, 20
+	str	w2, [x0, 4]
+	adrp	x2, .LANCHOR41
+	add	x2, x2, :lo12:.LANCHOR41
+	ldrb	w1, [x2, x1]
+	str	w1, [x0]
+	str	wzr, [x0]
+	str	wzr, [x0]
+	str	wzr, [x0]
+	b	.L360
+	.size	toshiba_tlc_set_rr_para, .-toshiba_tlc_set_rr_para
+	.section	.text.ymtc_3d_set_tlc_rr_para,"ax",@progbits
+	.align	2
+	.global	ymtc_3d_set_tlc_rr_para
+	.type	ymtc_3d_set_tlc_rr_para, %function
+ymtc_3d_set_tlc_rr_para:
+	mov	x4, x0
+	stp	x29, x30, [sp, -16]!
+	and	x1, x1, 255
+	mov	x2, 7
+	add	x29, sp, 0
+	mov	w6, 239
+	mov	w0, 160
+	str	w6, [x4, 8]
+	mul	x1, x1, x2
+	str	w0, [x4, 4]
+	adrp	x0, .LANCHOR42
+	add	x0, x0, :lo12:.LANCHOR42
+	add	x5, x0, x1
+	ldrsb	w0, [x0, x1]
+	str	w0, [x4]
+	ldrsb	w0, [x5, 4]
+	str	w0, [x4]
+	str	wzr, [x4]
+	str	wzr, [x4]
+	bl	nandc_wait_flash_ready
+	str	w6, [x4, 8]
+	mov	w0, 161
+	str	w0, [x4, 4]
+	ldrsb	w0, [x5, 1]
+	str	w0, [x4]
+	ldrsb	w0, [x5, 3]
+	str	w0, [x4]
+	ldrsb	w0, [x5, 5]
+	str	w0, [x4]
+	str	wzr, [x4]
+	bl	nandc_wait_flash_ready
+	ldp	x29, x30, [sp], 16
+	mov	w0, 162
+	str	w6, [x4, 8]
+	str	w0, [x4, 4]
+	ldrsb	w0, [x5, 2]
+	str	w0, [x4]
+	ldrsb	w0, [x5, 6]
+	str	w0, [x4]
+	str	wzr, [x4]
+	str	wzr, [x4]
+	b	nandc_wait_flash_ready
+	.size	ymtc_3d_set_tlc_rr_para, .-ymtc_3d_set_tlc_rr_para
+	.section	.text.ymtc_3d_set_slc_rr_para,"ax",@progbits
+	.align	2
+	.global	ymtc_3d_set_slc_rr_para
+	.type	ymtc_3d_set_slc_rr_para, %function
+ymtc_3d_set_slc_rr_para:
+	mov	w2, 239
+	str	w2, [x0, 8]
+	mov	w2, 163
+	and	x1, x1, 255
+	str	w2, [x0, 4]
+	adrp	x2, .LANCHOR43
+	add	x2, x2, :lo12:.LANCHOR43
+	ldrsb	w1, [x2, x1]
+	str	w1, [x0]
+	str	wzr, [x0]
+	str	wzr, [x0]
+	str	wzr, [x0]
+	b	nandc_wait_flash_ready
+	.size	ymtc_3d_set_slc_rr_para, .-ymtc_3d_set_slc_rr_para
+	.section	.text.flash_erase_duplane_block,"ax",@progbits
+	.align	2
+	.global	flash_erase_duplane_block
+	.type	flash_erase_duplane_block, %function
+flash_erase_duplane_block:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	and	w22, w0, 255
+	adrp	x0, .LANCHOR18
+	stp	x19, x20, [sp, 16]
+	stp	x23, x24, [sp, 48]
+	and	w24, w1, 255
+	str	x25, [sp, 64]
+	mov	w21, w2
+	ldrb	w1, [x0, #:lo12:.LANCHOR18]
+	mov	w20, w3
+	mov	x19, x0
+	cmp	w1, w22
+	bhi	.L367
+	adrp	x1, .LANCHOR44
+	adrp	x0, .LC0
+	mov	w2, 688
+	add	x1, x1, :lo12:.LANCHOR44
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L367:
+	ldrb	w0, [x19, #:lo12:.LANCHOR18]
+	cmp	w0, w22
+	bls	.L376
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
+	ldrb	w22, [x0, w22, sxtw]
+	adrp	x0, .LANCHOR13
+	ldr	x25, [x0, #:lo12:.LANCHOR13]
+	adrp	x0, .LANCHOR14
+	and	x19, x22, 255
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	add	x23, x19, 8
+	add	x23, x25, x23, lsl 8
+	tbz	x0, 4, .L369
+	adrp	x0, .LC31
+	mov	w3, w20
+	mov	w2, w21
+	mov	w1, w22
+	add	x0, x0, :lo12:.LC31
+	bl	printf
+.L369:
+	bl	nandc_wait_flash_ready
+	mov	w0, w22
+	bl	nandc_cs
+	mov	w0, w22
+	cbnz	w24, .L370
+	bl	zftl_flash_enter_slc_mode
+.L371:
+	add	x25, x25, x19, lsl 8
+	mov	w0, 96
+	str	w0, [x25, 2056]
+	and	w0, w21, 255
+	str	w0, [x25, 2052]
+	lsr	w0, w21, 8
+	str	w0, [x25, 2052]
+	lsr	w0, w21, 16
+	str	w0, [x25, 2052]
+	adrp	x0, .LANCHOR31
+	mov	x6, x0
+	ldrb	w1, [x0, #:lo12:.LANCHOR31]
+	cbz	w1, .L372
+	lsr	w0, w21, 24
+	str	w0, [x25, 2052]
+.L372:
+	adrp	x0, .LANCHOR45
+	ldrb	w0, [x0, #:lo12:.LANCHOR45]
+	cbnz	w0, .L377
+	mov	w0, 208
+	str	w0, [x25, 2056]
+	mov	w19, 5
+	bl	nandc_wait_flash_ready
+	mov	x0, x23
+	bl	flash_read_status
+	and	w5, w0, w19
+.L373:
+	mov	w0, 96
+	str	w0, [x25, 2056]
+	and	w0, w20, 255
+	str	w0, [x25, 2052]
+	lsr	w0, w20, 8
+	str	w0, [x25, 2052]
+	lsr	w0, w20, 16
+	str	w0, [x25, 2052]
+	ldrb	w0, [x6, #:lo12:.LANCHOR31]
+	cbz	w0, .L374
+	lsr	w20, w20, 24
+	str	w20, [x25, 2052]
+.L374:
+	mov	w0, 208
+	str	w0, [x25, 2056]
+	mov	w19, 5
+	bl	nandc_wait_flash_ready
+	mov	x0, x23
+	bl	flash_read_status
+	mov	w2, w0
+	bl	nandc_de_cs.constprop.32
+	and	w19, w2, w19
+	orr	w19, w19, w5
+	cbz	w19, .L375
+	adrp	x0, .LC32
+	mov	w1, w21
+	add	x0, x0, :lo12:.LC32
+	bl	printf
+.L375:
+	mov	w0, w19
+.L366:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L370:
+	bl	zftl_flash_exit_slc_mode
+	b	.L371
+.L377:
+	mov	w5, 0
+	b	.L373
+.L376:
+	mov	w0, -1
+	b	.L366
+	.size	flash_erase_duplane_block, .-flash_erase_duplane_block
+	.section	.text.flash_erase_block_en,"ax",@progbits
+	.align	2
+	.global	flash_erase_block_en
+	.type	flash_erase_block_en, %function
+flash_erase_block_en:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	and	w22, w0, 255
+	adrp	x0, .LANCHOR32
+	stp	x19, x20, [sp, 16]
+	mov	w19, 24
+	stp	x23, x24, [sp, 48]
+	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	and	w24, w1, 255
+	stp	x25, x26, [sp, 64]
+	mov	w23, w2
+	sub	w0, w19, w0
+	mov	w19, 1
+	lsl	w19, w19, w0
+	adrp	x0, .LANCHOR18
+	sub	w19, w19, #1
+	mov	x20, x0
+	ldrb	w1, [x0, #:lo12:.LANCHOR18]
+	and	w19, w19, w2
+	cmp	w1, w22
+	bhi	.L392
+	adrp	x1, .LANCHOR46
+	adrp	x0, .LC0
+	mov	w2, 750
+	add	x1, x1, :lo12:.LANCHOR46
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L392:
+	ldrb	w0, [x20, #:lo12:.LANCHOR18]
+	cmp	w0, w22
+	bls	.L399
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
+	ldrb	w21, [x0, w22, sxtw]
+	adrp	x0, .LANCHOR13
+	ldr	x26, [x0, #:lo12:.LANCHOR13]
+	adrp	x0, .LANCHOR14
+	and	x20, x21, 255
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	add	x25, x20, 8
+	add	x25, x26, x25, lsl 8
+	tbz	x0, 4, .L394
+	adrp	x0, .LC33
+	mov	w3, w24
+	mov	w2, w23
+	mov	w1, w21
+	add	x0, x0, :lo12:.LC33
+	bl	printf
+.L394:
+	bl	nandc_wait_flash_ready
+	mov	w0, w21
+	bl	nandc_cs
+	mov	w0, w21
+	cbnz	w24, .L395
+	bl	zftl_flash_enter_slc_mode
+.L396:
+	add	x0, x26, x20, lsl 8
+	mov	w1, 96
+	str	w1, [x0, 2056]
+	and	w1, w19, 255
+	str	w1, [x0, 2052]
+	lsr	w1, w19, 8
+	str	w1, [x0, 2052]
+	lsr	w1, w19, 16
+	str	w1, [x0, 2052]
+	adrp	x1, .LANCHOR31
+	ldrb	w1, [x1, #:lo12:.LANCHOR31]
+	cbz	w1, .L397
+	lsr	w19, w19, 24
+	str	w19, [x0, 2052]
+.L397:
+	mov	w1, 208
+	str	w1, [x0, 2056]
+	bl	nandc_wait_flash_ready
+	mov	x0, x25
+	bl	flash_read_status
+	mov	w3, w0
+	bl	nandc_de_cs.constprop.32
+	mov	w0, 5
+	ands	w3, w3, w0
+	beq	.L398
+	adrp	x0, .LANCHOR2
+	mov	w1, w22
+	ldrh	w2, [x0, #:lo12:.LANCHOR2]
+	adrp	x0, .LC34
+	add	x0, x0, :lo12:.LC34
+	udiv	w2, w23, w2
+	bl	printf
+	mov	w3, -1
+.L398:
+	mov	w0, w3
+.L391:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L395:
+	bl	zftl_flash_exit_slc_mode
+	b	.L396
+.L399:
+	mov	w0, -1
+	b	.L391
+	.size	flash_erase_block_en, .-flash_erase_block_en
+	.section	.text.flash_erase_block,"ax",@progbits
+	.align	2
+	.global	flash_erase_block
+	.type	flash_erase_block, %function
+flash_erase_block:
+	mov	w2, w1
+	mov	w1, 0
+	b	flash_erase_block_en
+	.size	flash_erase_block, .-flash_erase_block
+	.section	.text.flash_erase_all,"ax",@progbits
+	.align	2
+	.global	flash_erase_all
+	.type	flash_erase_all, %function
+flash_erase_all:
+	stp	x29, x30, [sp, -80]!
+	adrp	x0, .LANCHOR33
+	add	x0, x0, :lo12:.LANCHOR33
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w19, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR2
+	stp	x21, x22, [sp, 32]
+	add	x23, x23, :lo12:.LANCHOR2
+	ldrh	w20, [x0, 14]
+	adrp	x22, .LANCHOR18
+	str	x25, [sp, 64]
+	add	x22, x22, :lo12:.LANCHOR18
+	adrp	x24, .LANCHOR30
+	ldrb	w1, [x0, 13]
+	mul	w20, w20, w1
+	and	w20, w20, 65535
+.L412:
+	ldrb	w0, [x22]
+	cmp	w0, w19
+	bhi	.L415
+	ldp	x19, x20, [sp, 16]
+	mov	w1, 0
+	ldp	x21, x22, [sp, 32]
+	adrp	x0, .LC35
+	ldp	x23, x24, [sp, 48]
+	add	x0, x0, :lo12:.LC35
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	b	printf
+.L415:
+	add	x0, x24, :lo12:.LANCHOR30
+	mov	w21, 0
+	ldrb	w25, [x0, w19, sxtw]
+.L413:
+	cmp	w20, w21, uxth
+	bhi	.L414
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L412
+.L414:
+	ldrh	w1, [x23]
+	mov	w0, w25
+	mul	w1, w1, w21
+	add	w21, w21, 1
+	bl	flash_erase_block
+	b	.L413
+	.size	flash_erase_all, .-flash_erase_all
+	.section	.text.flash_start_plane_read,"ax",@progbits
+	.align	2
+	.global	flash_start_plane_read
+	.type	flash_start_plane_read, %function
+flash_start_plane_read:
+	stp	x29, x30, [sp, -48]!
+	adrp	x2, .LANCHOR32
+	mov	w3, 24
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	ldrb	w20, [x2, #:lo12:.LANCHOR32]
+	mov	w2, 1
+	stp	x21, x22, [sp, 32]
+	ubfx	x21, x0, 24, 2
+	sub	w3, w3, w20
+	lsl	w20, w2, w20
+	sub	w20, w20, #1
+	lsl	w19, w2, w3
+	sub	w19, w19, #1
+	and	w22, w19, w0
+	lsr	w3, w0, w3
+	adrp	x0, .LANCHOR18
+	and	w20, w20, w3
+	and	w20, w20, 255
+	and	w19, w19, w1
+	ldrb	w0, [x0, #:lo12:.LANCHOR18]
+	cmp	w0, w20
+	bhi	.L418
+	adrp	x1, .LANCHOR47
+	adrp	x0, .LC0
+	mov	w2, 1128
+	add	x1, x1, :lo12:.LANCHOR47
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L418:
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
+	ldrb	w8, [x0, w20, sxtw]
+	adrp	x0, .LANCHOR13
+	ldr	x10, [x0, #:lo12:.LANCHOR13]
+	mov	w0, w8
+	bl	nandc_cs
+	adrp	x11, .LANCHOR16
+	cbnz	w21, .L419
+	mov	w0, w22
+	bl	slc_phy_page_address_calc
+	mov	w22, w0
+	mov	w0, w19
+	bl	slc_phy_page_address_calc
+	mov	w19, w0
+	adrp	x0, .LANCHOR0
+	ldrb	w0, [x0, #:lo12:.LANCHOR0]
+	cbz	w0, .L420
+	mov	w0, w8
+	bl	zftl_flash_enter_slc_mode
+.L420:
+	adrp	x0, .LANCHOR20
+	add	x1, x0, :lo12:.LANCHOR20
+	and	x4, x8, 255
+	and	w5, w22, 255
+	lsr	w3, w22, 8
+	and	w12, w19, 255
+	ldrb	w2, [x1, 16]
+	lsr	w7, w19, 8
+	lsr	w6, w19, 16
+	cmp	w2, 1
+	lsr	w2, w22, 16
+	bne	.L422
+	add	x4, x10, x4, lsl 8
+	ldrb	w1, [x1, 8]
+	str	w1, [x4, 2056]
+	adrp	x1, .LANCHOR31
+	str	wzr, [x4, 2052]
+	str	wzr, [x4, 2052]
+	str	w5, [x4, 2052]
+	mov	x5, x1
+	str	w3, [x4, 2052]
+	str	w2, [x4, 2052]
+	ldrb	w2, [x1, #:lo12:.LANCHOR31]
+	cbz	w2, .L423
+	lsr	w22, w22, 24
+	str	w22, [x4, 2052]
+.L423:
+	add	x0, x0, :lo12:.LANCHOR20
+	ldrb	w0, [x0, 9]
+	str	w0, [x4, 2056]
+	bl	nandc_wait_flash_ready
+	ldr	x0, [x11, #:lo12:.LANCHOR16]
+	ldrb	w0, [x0, 12]
+	cmp	w0, 3
+	bne	.L424
+	cbz	w21, .L424
+	str	w21, [x4, 2056]
+.L424:
+	str	wzr, [x4, 2056]
+	str	wzr, [x4, 2052]
+	str	wzr, [x4, 2052]
+	str	w12, [x4, 2052]
+	ldrb	w0, [x5, #:lo12:.LANCHOR31]
+	str	w7, [x4, 2052]
+	str	w6, [x4, 2052]
+	cbz	w0, .L445
+	lsr	w19, w19, 24
+	str	w19, [x4, 2052]
+.L445:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 48
+	ldp	x21, x22, [sp, 32]
+	str	w0, [x4, 2056]
+	ldp	x29, x30, [sp], 48
+	b	nandc_de_cs.constprop.32
+.L419:
+	ldr	x0, [x11, #:lo12:.LANCHOR16]
+	ldrb	w0, [x0, 12]
+	cmp	w0, 3
+	bne	.L421
+	adrp	x0, .LANCHOR36
+	ldrb	w0, [x0, #:lo12:.LANCHOR36]
+	cbnz	w0, .L421
+	adrp	x0, .LANCHOR37
+	ldrb	w0, [x0, #:lo12:.LANCHOR37]
+	cbnz	w0, .L421
+	sxtw	x0, w8
+	add	x0, x0, 8
+	add	x0, x10, x0, lsl 8
+	str	w21, [x0, 8]
+	b	.L420
+.L421:
+	mov	w0, w8
+	bl	zftl_flash_exit_slc_mode
+	b	.L420
+.L422:
+	ldr	x1, [x11, #:lo12:.LANCHOR16]
+	ldrb	w11, [x1, 7]
+	cmp	w11, 1
+	bne	.L427
+	ldrb	w11, [x1, 12]
+	cmp	w11, 2
+	bne	.L427
+	add	x8, x8, 8
+	mov	w11, 38
+	add	x8, x10, x8, lsl 8
+	str	w11, [x8, 8]
+.L427:
+	add	x8, x0, :lo12:.LANCHOR20
+	add	x4, x10, x4, lsl 8
+	ldrb	w8, [x8, 8]
+	str	w8, [x4, 2056]
+	str	w5, [x4, 2052]
+	str	w3, [x4, 2052]
+	str	w2, [x4, 2052]
+	ldrb	w1, [x1, 12]
+	cmp	w1, 3
+	bne	.L428
+	cbz	w21, .L428
+	str	w21, [x4, 2056]
+.L428:
+	add	x0, x0, :lo12:.LANCHOR20
+	ldrb	w0, [x0, 9]
+	str	w0, [x4, 2056]
+	str	w12, [x4, 2052]
+	str	w7, [x4, 2052]
+	str	w6, [x4, 2052]
+	b	.L445
+	.size	flash_start_plane_read, .-flash_start_plane_read
+	.section	.text.flash_set_interface_mode,"ax",@progbits
+	.align	2
+	.global	flash_set_interface_mode
+	.type	flash_set_interface_mode, %function
+flash_set_interface_mode:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR48
+	stp	x19, x20, [sp, 16]
+	adrp	x21, .LANCHOR14
+	stp	x23, x24, [sp, 48]
+	adrp	x20, .LANCHOR49
+	mov	w23, w0
+	add	x22, x22, :lo12:.LANCHOR48
+	add	x20, x20, :lo12:.LANCHOR49
+	add	x21, x21, :lo12:.LANCHOR14
+	str	x25, [sp, 64]
+	mov	x25, 0
+.L459:
+	adrp	x0, .LANCHOR13
+	ldr	x19, [x0, #:lo12:.LANCHOR13]
+	lsl	x0, x25, 3
+	ldrb	w24, [x0, x22]
+	cmp	w24, 69
+	beq	.L447
+	add	w0, w24, 119
+	cmp	w24, 44
+	and	w1, w0, 255
+	cset	w2, eq
+	cmp	w1, 18
+	bhi	.L460
+	mov	x0, 32769
+	movk	x0, 0x4, lsl 16
+	lsr	x0, x0, x1
+	mvn	x0, x0
+.L448:
+	and	w0, w0, 1
+	eor	w0, w0, 1
+	orr	w0, w2, w0
+	cbz	w0, .L449
+.L447:
+	ldrb	w1, [x20]
+	cmp	w23, 1
+	bne	.L450
+	tbz	x1, 0, .L449
+	ldr	w0, [x21]
+	tbz	x0, 12, .L451
+	adrp	x0, .LC36
+	add	x0, x0, :lo12:.LC36
+	bl	printf
+.L451:
+	add	x0, x19, x25, lsl 8
+	mov	w1, 239
+	cmp	w24, 44
+	str	w1, [x0, 2056]
+	mov	w1, 137
+	ccmp	w24, w1, 4, ne
+	mov	w1, 1
+	bne	.L452
+.L483:
+	str	w1, [x0, 2052]
+	mov	w1, 5
+.L482:
+	str	w1, [x0, 2048]
+.L457:
+	str	wzr, [x0, 2048]
+	str	wzr, [x0, 2048]
+	str	wzr, [x0, 2048]
+.L449:
+	add	x25, x25, 1
+	cmp	x25, 4
+	bne	.L459
+	bl	nandc_wait_flash_ready
+	ldr	x25, [sp, 64]
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	ret
+.L460:
+	mov	x0, 1
+	b	.L448
+.L452:
+	cmp	w24, 155
+	beq	.L483
+	mov	w2, 128
+	str	w2, [x0, 2052]
+	b	.L482
+.L450:
+	tbz	x1, 2, .L449
+	ldr	w0, [x21]
+	tbz	x0, 12, .L455
+	adrp	x0, .LC37
+	add	x0, x0, :lo12:.LC37
+	bl	printf
+.L455:
+	add	x0, x19, x25, lsl 8
+	mov	w1, 239
+	cmp	w24, 44
+	str	w1, [x0, 2056]
+	mov	w1, 137
+	ccmp	w24, w1, 4, ne
+	bne	.L456
+	mov	w1, 1
+	str	w1, [x0, 2052]
+	mov	w1, 35
+	b	.L482
+.L456:
+	cmp	w24, 155
+	bne	.L458
+	mov	w1, 1
+	str	w1, [x0, 2052]
+	mov	w1, 37
+	b	.L482
+.L458:
+	mov	w1, 128
+	str	w1, [x0, 2052]
+	str	wzr, [x0, 2048]
+	b	.L457
+	.size	flash_set_interface_mode, .-flash_set_interface_mode
+	.section	.text.mt_auto_read_calibration_config,"ax",@progbits
+	.align	2
+	.type	mt_auto_read_calibration_config, %function
+mt_auto_read_calibration_config:
+	mov	w5, w1
+	and	w4, w0, 255
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	bl	nandc_wait_flash_ready
+	ubfiz	x4, x4, 8, 8
+	adrp	x0, .LANCHOR13
+	ldr	x2, [x0, #:lo12:.LANCHOR13]
+	mov	w0, 239
+	add	x2, x2, x4
+	str	w0, [x2, 2056]
+	mov	w0, 150
+	str	w0, [x2, 2052]
+	mov	w0, 200
+	bl	timer_delay_ns
+	str	w5, [x2, 2048]
+	str	wzr, [x2, 2048]
+	str	wzr, [x2, 2048]
+	str	wzr, [x2, 2048]
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	mt_auto_read_calibration_config, .-mt_auto_read_calibration_config
+	.section	.text.flash_reset,"ax",@progbits
+	.align	2
+	.global	flash_reset
+	.type	flash_reset, %function
+flash_reset:
+	adrp	x1, .LANCHOR13
+	ubfiz	x0, x0, 8, 8
+	add	x0, x0, 2048
+	ldr	x1, [x1, #:lo12:.LANCHOR13]
+	add	x1, x1, x0
+	mov	w0, 255
+	str	w0, [x1, 8]
+	b	nandc_wait_flash_ready
+	.size	flash_reset, .-flash_reset
+	.section	.text.flash_read_id,"ax",@progbits
+	.align	2
+	.global	flash_read_id
+	.type	flash_read_id, %function
+flash_read_id:
+	and	w10, w0, 255
+	stp	x29, x30, [sp, -16]!
+	adrp	x0, .LANCHOR13
+	mov	x8, x1
+	add	x29, sp, 0
+	ldr	x4, [x0, #:lo12:.LANCHOR13]
+	mov	w0, w10
+	bl	flash_reset
+	mov	w0, w10
+	bl	nandc_cs
+	ubfiz	x2, x10, 8, 8
+	add	x2, x4, x2
+	mov	w0, 144
+	str	w0, [x2, 2056]
+	mov	w0, 200
+	str	wzr, [x2, 2052]
+	bl	timer_delay_ns
+	ldr	w0, [x2, 2048]
+	strb	w0, [x8]
+	ldr	w0, [x2, 2048]
+	strb	w0, [x8, 1]
+	ldr	w0, [x2, 2048]
+	strb	w0, [x8, 2]
+	ldr	w0, [x2, 2048]
+	strb	w0, [x8, 3]
+	ldr	w0, [x2, 2048]
+	strb	w0, [x8, 4]
+	ldr	w0, [x2, 2048]
+	strb	w0, [x8, 5]
+	ldr	w0, [x2, 2048]
+	strb	w0, [x8, 6]
+	ldr	w0, [x2, 2048]
+	strb	w0, [x8, 7]
+	bl	nandc_de_cs.constprop.32
+	ldrb	w2, [x8]
+	sub	w0, w2, #1
+	and	w0, w0, 255
+	cmp	w0, 253
+	bhi	.L487
+	ldrb	w7, [x8, 5]
+	add	w1, w10, 1
+	ldrb	w6, [x8, 4]
+	adrp	x0, .LC38
+	ldrb	w5, [x8, 3]
+	add	x0, x0, :lo12:.LC38
+	ldrb	w4, [x8, 2]
+	ldrb	w3, [x8, 1]
+	ldp	x29, x30, [sp], 16
+	b	printf
+.L487:
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	flash_read_id, .-flash_read_id
+	.section	.text.flash_read_spare,"ax",@progbits
+	.align	2
+	.global	flash_read_spare
+	.type	flash_read_spare, %function
+flash_read_spare:
+	stp	x29, x30, [sp, -16]!
+	mov	x5, x2
+	adrp	x2, .LANCHOR33+9
+	ubfiz	x0, x0, 8, 8
+	add	x29, sp, 0
+	ldrb	w3, [x2, #:lo12:.LANCHOR33+9]
+	adrp	x2, .LANCHOR13
+	ldr	x4, [x2, #:lo12:.LANCHOR13]
+	lsl	w3, w3, 9
+	add	x4, x4, x0
+	and	w0, w1, 255
+	str	wzr, [x4, 2056]
+	str	w3, [x4, 2052]
+	lsr	w3, w3, 8
+	str	w3, [x4, 2052]
+	str	w0, [x4, 2052]
+	lsr	w0, w1, 8
+	str	w0, [x4, 2052]
+	lsr	w1, w1, 16
+	str	w1, [x4, 2052]
+	mov	w0, 48
+	str	w0, [x4, 2056]
+	bl	nandc_wait_flash_ready
+	ldr	w0, [x4, 2048]
+	ldp	x29, x30, [sp], 16
+	strb	w0, [x5]
+	ret
+	.size	flash_read_spare, .-flash_read_spare
+	.section	.text.flash_read_otp_data,"ax",@progbits
+	.align	2
+	.global	flash_read_otp_data
+	.type	flash_read_otp_data, %function
+flash_read_otp_data:
+	stp	x29, x30, [sp, -48]!
+	and	w4, w0, 255
+	adrp	x0, .LANCHOR13
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w20, w1
+	ldr	x19, [x0, #:lo12:.LANCHOR13]
+	mov	w0, w4
+	str	x21, [sp, 32]
+	mov	x21, x2
+	bl	nandc_cs
+	ubfiz	x4, x4, 8, 8
+	add	x19, x19, x4
+	mov	w0, 239
+	mov	w4, 144
+	str	w0, [x19, 2056]
+	mov	w0, 50
+	str	w4, [x19, 2052]
+	bl	timer_delay_ns
+	mov	w0, 1
+	str	w0, [x19, 2048]
+	str	wzr, [x19, 2048]
+	str	wzr, [x19, 2048]
+	str	wzr, [x19, 2048]
+	bl	nandc_wait_flash_ready
+	mov	w0, 238
+	str	w0, [x19, 2056]
+	str	w4, [x19, 2052]
+	mov	w1, w20
+	adrp	x0, .LC39
+	add	x0, x0, :lo12:.LC39
+	ldr	w2, [x19, 2048]
+	ldr	w3, [x19, 2048]
+	ldr	w4, [x19, 2048]
+	bl	printf
+	bl	nandc_wait_flash_ready
+	str	wzr, [x19, 2056]
+	str	wzr, [x19, 2052]
+	and	w0, w20, 255
+	str	wzr, [x19, 2052]
+	str	w0, [x19, 2052]
+	lsr	w0, w20, 8
+	str	w0, [x19, 2052]
+	lsr	w20, w20, 16
+	str	w20, [x19, 2052]
+	mov	w0, 48
+	str	w0, [x19, 2056]
+	bl	nandc_wait_flash_ready
+	mov	x0, 0
+.L493:
+	ldr	w1, [x19, 2048]
+	strb	w1, [x21, x0]
+	add	x0, x0, 1
+	cmp	x0, 16384
+	bne	.L493
+	mov	w0, 239
+	str	w0, [x19, 2056]
+	mov	w0, 144
+	str	w0, [x19, 2052]
+	mov	w0, 50
+	bl	timer_delay_ns
+	ldr	x21, [sp, 32]
+	str	wzr, [x19, 2048]
+	str	wzr, [x19, 2048]
+	str	wzr, [x19, 2048]
+	str	wzr, [x19, 2048]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	b	nandc_de_cs.constprop.32
+	.size	flash_read_otp_data, .-flash_read_otp_data
+	.section	.text.sandisk_prog_test_bad_block,"ax",@progbits
+	.align	2
+	.global	sandisk_prog_test_bad_block
+	.type	sandisk_prog_test_bad_block, %function
+sandisk_prog_test_bad_block:
+	stp	x29, x30, [sp, -48]!
+	mov	w4, w1
+	adrp	x1, .LANCHOR13
+	and	x2, x0, 255
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR33
+	ldr	x19, [x1, #:lo12:.LANCHOR13]
+	add	x1, x20, :lo12:.LANCHOR33
+	str	x21, [sp, 32]
+	mov	x0, x2
+	add	x2, x2, 8
+	ldrb	w1, [x1, 29]
+	add	x2, x19, x2, lsl 8
+	cbz	w1, .L497
+.L511:
+	ubfiz	x0, x0, 8, 8
+	str	w1, [x2, 8]
+	add	x19, x19, x0
+	mov	w0, 128
+	str	w0, [x19, 2056]
+	and	w0, w4, 255
+	str	wzr, [x19, 2052]
+	str	wzr, [x19, 2052]
+	str	w0, [x19, 2052]
+	lsr	w0, w4, 8
+	str	w0, [x19, 2052]
+	lsr	w0, w4, 16
+	str	w0, [x19, 2052]
+	mov	w0, 16
+	str	w0, [x19, 2056]
+	bl	nandc_wait_flash_ready
+	mov	w0, 112
+	str	w0, [x19, 2056]
+	mov	w0, 80
+	bl	timer_delay_ns
+	ldr	w2, [x19, 2048]
+	mov	w0, 5
+	ands	w21, w2, w0
+	beq	.L499
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L499
+	adrp	x0, .LC40
+	mov	w1, w4
+	add	x0, x0, :lo12:.LC40
+	bl	printf
+.L499:
+	add	x20, x20, :lo12:.LANCHOR33
+	ldrb	w0, [x20, 30]
+	cbz	w0, .L496
+	str	w0, [x19, 2056]
+.L496:
+	mov	w0, w21
+	ldr	x21, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+.L497:
+	mov	w1, 162
+	b	.L511
+	.size	sandisk_prog_test_bad_block, .-sandisk_prog_test_bad_block
+	.section	.text.nandc_rdy_status,"ax",@progbits
+	.align	2
+	.global	nandc_rdy_status
+	.type	nandc_rdy_status, %function
+nandc_rdy_status:
+	adrp	x0, .LANCHOR13
+	sub	sp, sp, #16
+	ldr	x0, [x0, #:lo12:.LANCHOR13]
+	ldr	w0, [x0]
+	str	w0, [sp, 8]
+	ldr	w0, [sp, 8]
+	add	sp, sp, 16
+	ubfx	x0, x0, 9, 1
+	ret
+	.size	nandc_rdy_status, .-nandc_rdy_status
+	.section	.text.nandc_bch_sel,"ax",@progbits
+	.align	2
+	.global	nandc_bch_sel
+	.type	nandc_bch_sel, %function
+nandc_bch_sel:
+	sub	sp, sp, #16
+	str	wzr, [sp, 8]
+	ldr	w1, [sp, 8]
+	orr	w1, w1, 1
+	str	w1, [sp, 8]
+	adrp	x1, .LANCHOR50
+	strb	w0, [x1, #:lo12:.LANCHOR50]
+	adrp	x1, .LANCHOR28
+	ldrb	w1, [x1, #:lo12:.LANCHOR28]
+	cmp	w1, 9
+	adrp	x1, .LANCHOR13
+	bne	.L515
+	ldr	x1, [x1, #:lo12:.LANCHOR13]
+	cmp	w0, 70
+	ldr	w2, [sp, 8]
+	str	w2, [x1, 16]
+	beq	.L521
+	cmp	w0, 60
+	beq	.L522
+	cmp	w0, 40
+	cset	w0, eq
+	add	w0, w0, 1
+.L516:
+	str	wzr, [sp]
+	ldr	w2, [sp]
+	bfi	w2, w0, 25, 3
+	str	w2, [sp]
+	ldr	w0, [sp]
+	orr	w0, w0, 1
+	str	w0, [sp]
+	ldr	w0, [sp]
+	str	w0, [x1, 32]
+.L514:
+	add	sp, sp, 16
+	ret
+.L521:
+	mov	w0, 0
+	b	.L516
+.L522:
+	mov	w0, 3
+	b	.L516
+.L515:
+	ldr	x2, [x1, #:lo12:.LANCHOR13]
+	mov	w3, 16
+	ldr	w1, [sp, 8]
+	cmp	w0, w3
+	str	w1, [x2, 8]
+	str	wzr, [sp]
+	ldr	w1, [sp]
+	bfi	w1, w3, 8, 8
+	str	w1, [sp]
+	ldr	w1, [sp]
+	and	w1, w1, -262145
+	str	w1, [sp]
+	bne	.L518
+.L525:
+	ldr	w0, [sp]
+	and	w0, w0, -17
+	b	.L526
+.L518:
+	cmp	w0, 24
+	bne	.L520
+	ldr	w0, [sp]
+	orr	w0, w0, 16
+.L526:
+	str	w0, [sp]
+	b	.L519
+.L520:
+	ldr	w1, [sp]
+	cmp	w0, 40
+	orr	w1, w1, 262144
+	str	w1, [sp]
+	ldr	w1, [sp]
+	orr	w1, w1, 16
+	str	w1, [sp]
+	beq	.L525
+.L519:
+	ldr	w0, [sp]
+	orr	w0, w0, 1
+	str	w0, [sp]
+	ldr	w0, [sp]
+	str	w0, [x2, 12]
+	b	.L514
+	.size	nandc_bch_sel, .-nandc_bch_sel
+	.section	.text.zftl_nandc_get_irq_status,"ax",@progbits
+	.align	2
+	.global	zftl_nandc_get_irq_status
+	.type	zftl_nandc_get_irq_status, %function
+zftl_nandc_get_irq_status:
+	adrp	x1, .LANCHOR28
+	ldrb	w1, [x1, #:lo12:.LANCHOR28]
+	cmp	w1, 9
+	bne	.L528
+	ldr	w0, [x0, 296]
+	ret
+.L528:
+	ldr	w0, [x0, 372]
+	ret
+	.size	zftl_nandc_get_irq_status, .-zftl_nandc_get_irq_status
+	.section	.text.rk_nandc_flash_ready,"ax",@progbits
+	.align	2
+	.global	rk_nandc_flash_ready
+	.type	rk_nandc_flash_ready, %function
+rk_nandc_flash_ready:
+	ret
+	.size	rk_nandc_flash_ready, .-rk_nandc_flash_ready
+	.section	.text.nandc_iqr_wait_flash_ready,"ax",@progbits
+	.align	2
+	.global	nandc_iqr_wait_flash_ready
+	.type	nandc_iqr_wait_flash_ready, %function
+nandc_iqr_wait_flash_ready:
+	ret
+	.size	nandc_iqr_wait_flash_ready, .-nandc_iqr_wait_flash_ready
+	.section	.text.rk_nandc_flash_xfer_completed,"ax",@progbits
+	.align	2
+	.global	rk_nandc_flash_xfer_completed
+	.type	rk_nandc_flash_xfer_completed, %function
+rk_nandc_flash_xfer_completed:
+	ret
+	.size	rk_nandc_flash_xfer_completed, .-rk_nandc_flash_xfer_completed
+	.section	.text.nandc_xfer_start,"ax",@progbits
+	.align	2
+	.global	nandc_xfer_start
+	.type	nandc_xfer_start, %function
+nandc_xfer_start:
+	stp	x29, x30, [sp, -80]!
+	and	w1, w1, 255
+	adrp	x4, .LANCHOR53
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w20, w0, 255
+	adrp	x0, .LANCHOR28
+	str	x21, [sp, 32]
+	and	w6, w20, 1
+	adrp	x21, .LANCHOR13
+	ldrb	w0, [x0, #:lo12:.LANCHOR28]
+	cmp	w0, 9
+	add	w0, w1, 1
+	bne	.L534
+	str	wzr, [x29, 56]
+	mov	w5, 1
+	ubfx	x0, x0, 1, 6
+	ldr	w1, [x29, 56]
+	bfi	w1, w6, 1, 1
+	str	w1, [x29, 56]
+	ldr	w1, [x29, 56]
+	orr	w1, w1, 8
+	str	w1, [x29, 56]
+	ldr	w1, [x29, 56]
+	bfi	w1, w5, 5, 2
+	str	w1, [x29, 56]
+	ldr	w1, [x29, 56]
+	orr	w1, w1, 536870912
+	str	w1, [x29, 56]
+	ldr	w1, [x29, 56]
+	orr	w1, w1, 1024
+	str	w1, [x29, 56]
+	ldr	w1, [x29, 56]
+	and	w1, w1, -17
+	str	w1, [x29, 56]
+	ldr	w1, [x29, 56]
+	bfi	w1, w0, 22, 6
+	str	w1, [x29, 56]
+	ldr	w0, [x29, 56]
+	orr	w0, w0, 128
+	str	w0, [x29, 56]
+	adrp	x0, .LANCHOR51
+	ldrb	w0, [x0, #:lo12:.LANCHOR51]
+	cbz	w0, .L535
+	adrp	x0, .LANCHOR52
+	ldrb	w0, [x0, #:lo12:.LANCHOR52]
+	cbz	w0, .L535
+	ldr	w0, [x29, 56]
+	orr	w0, w0, 512
+	str	w0, [x29, 56]
+.L535:
+	ldr	w0, [x29, 56]
+	add	x19, x4, :lo12:.LANCHOR53
+	add	x1, x2, 63
+	and	x1, x1, -64
+	ubfx	x0, x0, 22, 6
+	stp	x2, x3, [x19, 8]
+	ubfiz	x0, x0, 10, 6
+	stp	w2, w3, [x19, 24]
+	add	x1, x1, x0
+	and	x0, x2, -64
+	bl	flush_dcache_range
+	ldr	x0, [x19, 16]
+	add	x1, x0, 63
+	and	x0, x0, -64
+	and	x1, x1, -64
+	add	x1, x1, 64
+	bl	flush_dcache_range
+	mov	w0, 1
+	str	w0, [x19, 32]
+	ldr	x0, [x21, #:lo12:.LANCHOR13]
+	mov	w2, 16
+	ldr	w1, [x19, 24]
+	cmp	w20, 0
+	str	w1, [x0, 52]
+	ldr	w1, [x19, 28]
+	str	w1, [x0, 56]
+	ldr	w1, [x0, 48]
+	str	w1, [x29, 64]
+	ldr	w1, [x29, 64]
+	bfi	w1, w2, 9, 5
+	str	w1, [x29, 64]
+	mov	w2, 2
+	ldr	w1, [x29, 64]
+	orr	w1, w1, 448
+	str	w1, [x29, 64]
+	ldr	w1, [x29, 64]
+	bfi	w1, w2, 3, 3
+	str	w1, [x29, 64]
+	cset	w2, eq
+	ldr	w1, [x29, 64]
+	orr	w1, w1, 4
+	str	w1, [x29, 64]
+	ldr	w1, [x29, 64]
+	bfi	w1, w2, 1, 1
+	str	w1, [x29, 64]
+	ldr	w1, [x29, 64]
+	orr	w1, w1, 1
+	str	w1, [x29, 64]
+	adrp	x1, .LANCHOR54
+	ldrh	w2, [x1, #:lo12:.LANCHOR54]
+	ldr	w1, [x29, 64]
+	bfi	w1, w2, 16, 11
+	str	w1, [x29, 64]
+	ldr	w1, [x29, 64]
+	str	w1, [x0, 48]
+	ldr	w1, [x29, 56]
+	str	w1, [x0, 16]
+	ldr	w1, [x29, 56]
+	orr	w1, w1, 4
+	str	w1, [x29, 56]
+	ldr	w1, [x29, 56]
+	str	w1, [x0, 16]
+.L533:
+	ldp	x19, x20, [sp, 16]
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 80
+	ret
+.L534:
+	ldr	x5, [x21, #:lo12:.LANCHOR13]
+	mov	w7, 16
+	ubfx	x0, x0, 1, 6
+	ldr	w5, [x5, 12]
+	str	w5, [x29, 72]
+	ldr	w5, [x29, 72]
+	bfi	w5, w7, 8, 8
+	str	w5, [x29, 72]
+	ldr	w5, [x29, 72]
+	and	w5, w5, -9
+	str	w5, [x29, 72]
+	ldr	w5, [x29, 72]
+	and	w5, w5, -225
+	str	w5, [x29, 72]
+	str	wzr, [x29, 56]
+	ldr	w5, [x29, 56]
+	bfi	w5, w6, 1, 1
+	str	w5, [x29, 56]
+	mov	w6, 1
+	ldr	w5, [x29, 56]
+	orr	w5, w5, 8
+	str	w5, [x29, 56]
+	ldr	w5, [x29, 56]
+	bfi	w5, w6, 5, 2
+	str	w5, [x29, 56]
+	ldr	w5, [x29, 56]
+	orr	w5, w5, 536870912
+	str	w5, [x29, 56]
+	ldr	w5, [x29, 56]
+	orr	w5, w5, 1024
+	str	w5, [x29, 56]
+	ldr	w5, [x29, 56]
+	and	w5, w5, -17
+	str	w5, [x29, 56]
+	ldr	w5, [x29, 56]
+	bfi	w5, w0, 22, 6
+	str	w5, [x29, 56]
+	cbz	w20, .L537
+	adrp	x0, .LANCHOR50
+	ubfx	x1, x1, 1, 7
+	ldr	x8, [x4, #:lo12:.LANCHOR53]
+	add	x1, x3, x1, lsl 2
+	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	mov	w5, 64
+	cmp	w0, 25
+	mov	w0, 128
+	csel	w5, w5, w0, cc
+	mov	w0, 0
+.L539:
+	add	w7, w5, w0
+	cmp	x3, x1
+	bne	.L540
+.L541:
+	add	x19, x4, :lo12:.LANCHOR53
+	ldr	x0, [x4, #:lo12:.LANCHOR53]
+	add	x1, x2, 63
+	and	x1, x1, -64
+	stp	x2, x0, [x19, 8]
+	stp	w2, w0, [x19, 24]
+	ldr	w0, [x29, 56]
+	ubfx	x0, x0, 22, 6
+	ubfiz	x0, x0, 10, 6
+	add	x1, x1, x0
+	and	x0, x2, -64
+	bl	flush_dcache_range
+	ldr	x0, [x19, 16]
+	ldr	w1, [x29, 56]
+	add	x2, x0, 63
+	and	x0, x0, -64
+	and	x2, x2, -64
+	ubfx	x1, x1, 22, 6
+	ubfiz	x1, x1, 7, 6
+	add	x1, x2, x1
+	bl	flush_dcache_range
+	mov	w0, 1
+	str	w0, [x19, 32]
+	ldr	x0, [x21, #:lo12:.LANCHOR13]
+	mov	w2, 16
+	ldr	w1, [x19, 24]
+	cmp	w20, 0
+	str	w1, [x0, 20]
+	ldr	w1, [x19, 28]
+	str	w1, [x0, 24]
+	str	wzr, [x29, 64]
+	ldr	w1, [x29, 64]
+	bfi	w1, w2, 9, 5
+	str	w1, [x29, 64]
+	mov	w2, 2
+	ldr	w1, [x29, 64]
+	orr	w1, w1, 448
+	str	w1, [x29, 64]
+	ldr	w1, [x29, 64]
+	bfi	w1, w2, 3, 3
+	str	w1, [x29, 64]
+	cset	w2, eq
+	ldr	w1, [x29, 64]
+	orr	w1, w1, 4
+	str	w1, [x29, 64]
+	ldr	w1, [x29, 64]
+	bfi	w1, w2, 1, 1
+	str	w1, [x29, 64]
+	ldr	w1, [x29, 64]
+	orr	w1, w1, 1
+	str	w1, [x29, 64]
+	ldr	w1, [x29, 64]
+	str	w1, [x0, 16]
+	ldr	w1, [x29, 72]
+	str	w1, [x0, 12]
+	ldr	w1, [x29, 56]
+	str	w1, [x0, 8]
+	ldr	w1, [x29, 56]
+	orr	w1, w1, 4
+	str	w1, [x29, 56]
+	ldr	w1, [x29, 56]
+	str	w1, [x0, 8]
+	b	.L533
+.L540:
+	ldrh	w10, [x3]
+	and	x0, x0, 4294967292
+	ldrh	w6, [x3, 2]
+	add	x3, x3, 4
+	orr	x6, x10, x6, lsl 16
+	str	w6, [x8, x0]
+	mov	w0, w7
+	b	.L539
+.L537:
+	ldr	x0, [x4, #:lo12:.LANCHOR53]
+	str	w6, [x0]
+	b	.L541
+	.size	nandc_xfer_start, .-nandc_xfer_start
+	.section	.text.nandc_set_seed,"ax",@progbits
+	.align	2
+	.global	nandc_set_seed
+	.type	nandc_set_seed, %function
+nandc_set_seed:
+	and	x0, x0, 127
+	adrp	x1, .LANCHOR55
+	add	x1, x1, :lo12:.LANCHOR55
+	ldrh	w0, [x1, x0, lsl 1]
+	adrp	x1, .LANCHOR52
+	ldrb	w2, [x1, #:lo12:.LANCHOR52]
+	orr	w1, w0, -1073741824
+	cmp	w2, 0
+	csel	w0, w1, w0, ne
+	adrp	x1, .LANCHOR28
+	ldrb	w1, [x1, #:lo12:.LANCHOR28]
+	cmp	w1, 9
+	adrp	x1, .LANCHOR13
+	ldr	x1, [x1, #:lo12:.LANCHOR13]
+	bne	.L552
+	str	w0, [x1, 520]
+	ret
+.L552:
+	str	w0, [x1, 336]
+	ret
+	.size	nandc_set_seed, .-nandc_set_seed
+	.section	.text.zftl_flash_de_init,"ax",@progbits
+	.align	2
+	.global	zftl_flash_de_init
+	.type	zftl_flash_de_init, %function
+zftl_flash_de_init:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	bl	nandc_wait_flash_ready
+	adrp	x0, .LANCHOR0
+	ldrb	w0, [x0, #:lo12:.LANCHOR0]
+	cbz	w0, .L557
+	adrp	x0, .LANCHOR19
+	ldrb	w0, [x0, #:lo12:.LANCHOR19]
+	cbnz	w0, .L557
+	adrp	x0, .LANCHOR28
+	ldrb	w0, [x0, #:lo12:.LANCHOR28]
+	cmp	w0, 9
+	beq	.L557
+	mov	w0, 0
+	bl	zftl_flash_exit_slc_mode
+.L557:
+	adrp	x19, .LANCHOR21
+	mov	w0, 0
+	bl	hynix_reconfig_rr_para
+	ldrb	w0, [x19, #:lo12:.LANCHOR21]
+	cbz	w0, .L558
+	adrp	x0, .LANCHOR49
+	ldrb	w0, [x0, #:lo12:.LANCHOR49]
+	tbz	x0, 0, .L558
+	mov	w0, 1
+	bl	flash_set_interface_mode
+	mov	w0, 1
+	bl	nandc_set_if_mode
+	strb	wzr, [x19, #:lo12:.LANCHOR21]
+.L558:
+	adrp	x3, .LANCHOR52
+	ldrb	w0, [x3, #:lo12:.LANCHOR52]
+	cbz	w0, .L559
+	mov	w0, 0
+	strb	wzr, [x3, #:lo12:.LANCHOR52]
+	bl	nandc_set_seed
+	mov	w0, 1
+	strb	w0, [x3, #:lo12:.LANCHOR52]
+.L559:
+	mov	w0, 0
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	zftl_flash_de_init, .-zftl_flash_de_init
+	.section	.text.nandc_randomizer_enable,"ax",@progbits
+	.align	2
+	.global	nandc_randomizer_enable
+	.type	nandc_randomizer_enable, %function
+nandc_randomizer_enable:
+	adrp	x1, .LANCHOR52
+	strb	w0, [x1, #:lo12:.LANCHOR52]
+	ret
+	.size	nandc_randomizer_enable, .-nandc_randomizer_enable
+	.section	.text.nandc_get_chip_if,"ax",@progbits
+	.align	2
+	.global	nandc_get_chip_if
+	.type	nandc_get_chip_if, %function
+nandc_get_chip_if:
+	adrp	x1, .LANCHOR13
+	ubfiz	x0, x0, 8, 8
+	add	x0, x0, 2048
+	ldr	x1, [x1, #:lo12:.LANCHOR13]
+	add	x0, x1, x0
+	ret
+	.size	nandc_get_chip_if, .-nandc_get_chip_if
+	.section	.text.buf_reinit,"ax",@progbits
+	.align	2
+	.global	buf_reinit
+	.type	buf_reinit, %function
+buf_reinit:
+	adrp	x0, .LANCHOR56
+	add	x1, x0, :lo12:.LANCHOR56
+	mov	w2, 0
+.L579:
+	and	w3, w2, 255
+	strb	wzr, [x1, 2]
+	add	w4, w3, 1
+	strb	w3, [x1, 1]
+	strb	w4, [x1]
+	add	w2, w2, 1
+	str	xzr, [x1, 16]
+	cmp	w2, 16
+	add	x1, x1, 64
+	bne	.L579
+	add	x0, x0, :lo12:.LANCHOR56
+	mov	w1, -1
+	strb	w1, [x0, 960]
+	adrp	x0, .LANCHOR57
+	strb	wzr, [x0, #:lo12:.LANCHOR57]
+	adrp	x0, .LANCHOR58
+	strb	w2, [x0, #:lo12:.LANCHOR58]
+	ret
+	.size	buf_reinit, .-buf_reinit
+	.section	.text.buf_add_tail,"ax",@progbits
+	.align	2
+	.global	buf_add_tail
+	.type	buf_add_tail, %function
+buf_add_tail:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	str	x21, [sp, 32]
+	mov	w0, -1
+	strb	w0, [x1]
+	mov	x20, x1
+	ldrb	w1, [x19]
+	cmp	w1, 255
+	bne	.L587
+	ldrb	w0, [x20, 1]
+	cmp	w0, 255
+	bne	.L583
+	adrp	x1, .LANCHOR59
+	adrp	x0, .LC0
+	mov	w2, 74
+	add	x1, x1, :lo12:.LANCHOR59
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L583:
+	ldrb	w0, [x20, 1]
+	strb	w0, [x19]
+.L581:
+	ldp	x19, x20, [sp, 16]
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
+.L587:
+	adrp	x0, .LANCHOR56
+	add	x2, x0, :lo12:.LANCHOR56
+	mov	x19, x0
+.L588:
+	sbfiz	x0, x1, 6, 32
+	mov	w21, w1
+	ldrb	w1, [x2, x0]
+	cmp	w1, 255
+	bne	.L588
+	ldrb	w0, [x20, 1]
+	cmp	w0, 255
+	bne	.L585
+	adrp	x1, .LANCHOR59
+	adrp	x0, .LC0
+	mov	w2, 81
+	add	x1, x1, :lo12:.LANCHOR59
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L585:
+	add	x0, x19, :lo12:.LANCHOR56
+	sbfiz	x21, x21, 6, 32
+	ldrb	w1, [x20, 1]
+	strb	w1, [x0, x21]
+	b	.L581
+	.size	buf_add_tail, .-buf_add_tail
+	.section	.text.queue_read_cmd,"ax",@progbits
+	.align	2
+	.type	queue_read_cmd, %function
+queue_read_cmd:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	mov	x19, x0
+	mov	w0, 48
+	ldr	w1, [x19, 40]
+	bl	flash_start_page_read
+	strb	wzr, [x19, 59]
+	mov	w0, 1
+	strb	w0, [x19, 58]
+	mov	w0, -1
+	strb	w0, [x19]
+	mov	x1, x19
+	adrp	x0, .LANCHOR60
+	ldr	x19, [sp, 16]
+	add	x0, x0, :lo12:.LANCHOR60
+	ldp	x29, x30, [sp], 32
+	b	buf_add_tail
+	.size	queue_read_cmd, .-queue_read_cmd
+	.section	.text.zbuf_free,"ax",@progbits
+	.align	2
+	.global	zbuf_free
+	.type	zbuf_free, %function
+zbuf_free:
+	ldrb	w1, [x0, 2]
+	adrp	x2, .LANCHOR57
+	and	w1, w1, 8
+	strb	w1, [x0, 2]
+	cbz	w1, .L593
+	ldr	w1, [x0, 36]
+	cmn	w1, #1
+	beq	.L593
+	stp	x29, x30, [sp, -16]!
+	mov	x1, x0
+	add	x0, x2, :lo12:.LANCHOR57
+	add	x29, sp, 0
+	bl	buf_add_tail
+	adrp	x1, .LANCHOR58
+	ldp	x29, x30, [sp], 16
+	ldrb	w0, [x1, #:lo12:.LANCHOR58]
+	add	w0, w0, 1
+	strb	w0, [x1, #:lo12:.LANCHOR58]
+	ret
+.L593:
+	ldrb	w1, [x2, #:lo12:.LANCHOR57]
+	strb	w1, [x0]
+	adrp	x1, .LANCHOR58
+	ldrb	w0, [x0, 1]
+	strb	w0, [x2, #:lo12:.LANCHOR57]
+	ldrb	w0, [x1, #:lo12:.LANCHOR58]
+	add	w0, w0, 1
+	strb	w0, [x1, #:lo12:.LANCHOR58]
+	ret
+	.size	zbuf_free, .-zbuf_free
+	.section	.text.buf_alloc,"ax",@progbits
+	.align	2
+	.global	buf_alloc
+	.type	buf_alloc, %function
+buf_alloc:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR58
+	and	w20, w0, 255
+	ldrb	w0, [x19, #:lo12:.LANCHOR58]
+	cbz	w0, .L606
+.L609:
+	adrp	x2, .LANCHOR57
+	adrp	x1, .LANCHOR56
+	add	x0, x1, :lo12:.LANCHOR56
+	ldrb	w3, [x2, #:lo12:.LANCHOR57]
+	ubfiz	x4, x3, 6, 8
+	add	x0, x0, x4
+	mov	x4, x2
+	cbz	w20, .L607
+.L608:
+	add	x1, x1, :lo12:.LANCHOR56
+	sbfiz	x3, x3, 6, 32
+	add	x2, x1, x3
+	ldrb	w5, [x1, x3]
+	strb	w5, [x4, #:lo12:.LANCHOR57]
+	ldrb	w4, [x19, #:lo12:.LANCHOR58]
+	strh	wzr, [x2, 50]
+	sub	w4, w4, #1
+	strb	w4, [x19, #:lo12:.LANCHOR58]
+	mov	w4, 1
+	strb	wzr, [x2, 56]
+	strb	w4, [x2, 2]
+	mov	w4, -1
+	strb	wzr, [x2, 57]
+	strb	w4, [x1, x3]
+	mov	w1, -1
+	str	xzr, [x2, 16]
+	str	w1, [x2, 36]
+	b	.L605
+.L606:
+	mov	w2, 121
+	adrp	x1, .LANCHOR61
+	adrp	x0, .LC0
+	add	x1, x1, :lo12:.LANCHOR61
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+	ldrb	w0, [x19, #:lo12:.LANCHOR58]
+	cbnz	w0, .L609
+.L611:
+	mov	x0, 0
+.L605:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L607:
+	ldrb	w2, [x19, #:lo12:.LANCHOR58]
+	cmp	w2, 1
+	bne	.L608
+	b	.L611
+	.size	buf_alloc, .-buf_alloc
+	.section	.text.buf_remove_buf,"ax",@progbits
+	.align	2
+	.global	buf_remove_buf
+	.type	buf_remove_buf, %function
+buf_remove_buf:
+	ldrb	w4, [x1, 1]
+	ldrb	w2, [x0]
+	cmp	w4, w2
+	bne	.L619
+	ldrb	w1, [x1]
+	strb	w1, [x0]
+.L623:
+	mov	w0, 1
+	ret
+.L620:
+	mov	w3, w2
+	sbfiz	x2, x2, 6, 32
+	ldrb	w2, [x0, x2]
+	cmp	w4, w2
+	bne	.L621
+	sbfiz	x3, x3, 6, 32
+	ldrb	w2, [x1]
+	strb	w2, [x0, x3]
+	mov	w0, -1
+	strb	w0, [x1]
+	b	.L623
+.L619:
+	adrp	x0, .LANCHOR56
+	add	x0, x0, :lo12:.LANCHOR56
+.L621:
+	cmp	w2, 255
+	bne	.L620
+	mov	w0, 0
+	ret
+	.size	buf_remove_buf, .-buf_remove_buf
+	.section	.text.buf_remove_free,"ax",@progbits
+	.align	2
+	.global	buf_remove_free
+	.type	buf_remove_free, %function
+buf_remove_free:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR58
+	mov	x20, x0
+	ldrb	w0, [x19, #:lo12:.LANCHOR58]
+	cbnz	w0, .L625
+	adrp	x1, .LANCHOR62
+	adrp	x0, .LC0
+	mov	w2, 172
+	add	x1, x1, :lo12:.LANCHOR62
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L625:
+	ldrb	w0, [x19, #:lo12:.LANCHOR58]
+	cbz	w0, .L624
+	mov	x1, x20
+	adrp	x0, .LANCHOR57
+	add	x0, x0, :lo12:.LANCHOR57
+	bl	buf_remove_buf
+	cmp	w0, 1
+	bne	.L624
+	ldrb	w0, [x19, #:lo12:.LANCHOR58]
+	sub	w0, w0, #1
+	strb	w0, [x19, #:lo12:.LANCHOR58]
+	ldrb	w0, [x20, 2]
+	orr	w0, w0, 1
+	strb	w0, [x20, 2]
+.L624:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	buf_remove_free, .-buf_remove_free
+	.section	.text.dump_buf_info,"ax",@progbits
+	.align	2
+	.global	dump_buf_info
+	.type	dump_buf_info, %function
+dump_buf_info:
+	sub	sp, sp, #64
+	adrp	x0, .LANCHOR60
+	stp	x29, x30, [sp, 16]
+	add	x29, sp, 16
+	ldrb	w1, [x0, #:lo12:.LANCHOR60]
+	stp	x19, x20, [sp, 32]
+	adrp	x0, .LC41
+	str	x21, [sp, 48]
+	add	x0, x0, :lo12:.LC41
+	adrp	x19, .LANCHOR56
+	add	x19, x19, :lo12:.LANCHOR56
+	bl	printf
+	adrp	x20, .LC47
+	adrp	x0, .LANCHOR63
+	add	x20, x20, :lo12:.LC47
+	add	x21, x19, 1024
+	ldrb	w1, [x0, #:lo12:.LANCHOR63]
+	adrp	x0, .LC42
+	add	x0, x0, :lo12:.LC42
+	bl	printf
+	adrp	x0, .LANCHOR64
+	ldrb	w1, [x0, #:lo12:.LANCHOR64]
+	adrp	x0, .LC43
+	add	x0, x0, :lo12:.LC43
+	bl	printf
+	adrp	x0, .LANCHOR65
+	ldrb	w1, [x0, #:lo12:.LANCHOR65]
+	adrp	x0, .LC44
+	add	x0, x0, :lo12:.LC44
+	bl	printf
+	adrp	x0, .LANCHOR57
+	ldrb	w1, [x0, #:lo12:.LANCHOR57]
+	adrp	x0, .LC45
+	add	x0, x0, :lo12:.LC45
+	bl	printf
+	adrp	x0, .LANCHOR58
+	ldrb	w1, [x0, #:lo12:.LANCHOR58]
+	adrp	x0, .LC46
+	add	x0, x0, :lo12:.LC46
+	bl	printf
+.L631:
+	ldp	w7, w0, [x19, 36]
+	str	w0, [sp]
+	ldrb	w5, [x19, 58]
+	mov	x0, x20
+	ldrh	w4, [x19, 50]
+	add	x19, x19, 64
+	ldrb	w3, [x19, -62]
+	ldrb	w2, [x19, -64]
+	ldrb	w1, [x19, -63]
+	ldr	w6, [x19, -12]
+	bl	printf
+	cmp	x19, x21
+	bne	.L631
+	ldp	x19, x20, [sp, 32]
+	ldp	x29, x30, [sp, 16]
+	ldr	x21, [sp, 48]
+	add	sp, sp, 64
+	ret
+	.size	dump_buf_info, .-dump_buf_info
+	.section	.text.flash_check_bad_block,"ax",@progbits
+	.align	2
+	.global	flash_check_bad_block
+	.type	flash_check_bad_block, %function
+flash_check_bad_block:
+	adrp	x3, .LANCHOR33
+	add	x3, x3, :lo12:.LANCHOR33
+	and	w5, w0, 255
+	lsr	w4, w1, 5
+	ldrb	w0, [x3, 13]
+	ldrh	w2, [x3, 14]
+	mul	w2, w2, w0
+	mov	x0, 912
+	and	w2, w2, 65535
+	add	w2, w2, 31
+	asr	w2, w2, 5
+	lsl	w2, w2, 2
+	umaddl	x0, w2, w5, x0
+	adrp	x2, .LANCHOR27
+	ldr	x2, [x2, #:lo12:.LANCHOR27]
+	add	x0, x0, x4, uxtw 2
+	ldr	w0, [x2, x0]
+	lsr	w0, w0, w1
+	and	w0, w0, 1
+	ret
+	.size	flash_check_bad_block, .-flash_check_bad_block
+	.section	.text.flash_mask_bad_block,"ax",@progbits
+	.align	2
+	.global	flash_mask_bad_block
+	.type	flash_mask_bad_block, %function
+flash_mask_bad_block:
+	stp	x29, x30, [sp, -48]!
+	mov	w2, w1
+	add	x29, sp, 0
+	str	x21, [sp, 32]
+	and	w21, w0, 255
+	adrp	x0, .LANCHOR33
+	add	x0, x0, :lo12:.LANCHOR33
+	stp	x19, x20, [sp, 16]
+	mov	w20, w1
+	ldrh	w19, [x0, 14]
+	ldrb	w1, [x0, 13]
+	adrp	x0, .LC48
+	add	x0, x0, :lo12:.LC48
+	mul	w19, w19, w1
+	mov	w1, w21
+	bl	printf
+	and	w19, w19, 65535
+	lsr	w0, w20, 5
+	add	w1, w19, 31
+	mov	x19, 912
+	asr	w1, w1, 5
+	mov	w2, 1
+	lsl	w1, w1, 2
+	umaddl	x1, w1, w21, x19
+	ldr	x21, [sp, 32]
+	add	x1, x1, x0, uxtw 2
+	adrp	x0, .LANCHOR27
+	ldr	x3, [x0, #:lo12:.LANCHOR27]
+	lsl	w0, w2, w20
+	ldp	x19, x20, [sp, 16]
+	ldr	w2, [x3, x1]
+	orr	w2, w2, w0
+	str	w2, [x3, x1]
+	ldp	x29, x30, [sp], 48
+	ret
+	.size	flash_mask_bad_block, .-flash_mask_bad_block
+	.section	.text.ftl_gc_write_buf,"ax",@progbits
+	.align	2
+	.global	ftl_gc_write_buf
+	.type	ftl_gc_write_buf, %function
+ftl_gc_write_buf:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	ldrb	w1, [x0, 2]
+	orr	w1, w1, 2
+	strb	w1, [x0, 2]
+	mov	x1, x0
+	adrp	x0, .LANCHOR66
+	add	x0, x0, :lo12:.LANCHOR66
+	bl	buf_add_tail
+	adrp	x1, .LANCHOR67
+	ldp	x29, x30, [sp], 16
+	ldrb	w0, [x1, #:lo12:.LANCHOR67]
+	add	w0, w0, 1
+	and	w0, w0, 255
+	strb	w0, [x1, #:lo12:.LANCHOR67]
+	ret
+	.size	ftl_gc_write_buf, .-ftl_gc_write_buf
+	.section	.text.zftl_cache_flush,"ax",@progbits
+	.align	2
+	.global	zftl_cache_flush
+	.type	zftl_cache_flush, %function
+zftl_cache_flush:
+	ret
+	.size	zftl_cache_flush, .-zftl_cache_flush
+	.section	.text.zftl_get_density,"ax",@progbits
+	.align	2
+	.global	zftl_get_density
+	.type	zftl_get_density, %function
+zftl_get_density:
+	cbnz	w0, .L641
+	adrp	x0, .LANCHOR68
+	ldr	w0, [x0, #:lo12:.LANCHOR68]
+	ret
+.L641:
+	cmp	w0, 4
+	cset	w0, cc
+	lsl	w0, w0, 13
+	ret
+	.size	zftl_get_density, .-zftl_get_density
+	.section	.text.gc_hook,"ax",@progbits
+	.align	2
+	.global	gc_hook
+	.type	gc_hook, %function
+gc_hook:
+	ret
+	.size	gc_hook, .-gc_hook
+	.section	.text.vpn_check,"ax",@progbits
+	.align	2
+	.global	vpn_check
+	.type	vpn_check, %function
+vpn_check:
+	ret
+	.size	vpn_check, .-vpn_check
+	.section	.text.ftl_scan_all_data,"ax",@progbits
+	.align	2
+	.global	ftl_scan_all_data
+	.type	ftl_scan_all_data, %function
+ftl_scan_all_data:
+	ret
+	.size	ftl_scan_all_data, .-ftl_scan_all_data
+	.section	.text.FtlGetCurEraseBlock,"ax",@progbits
+	.align	2
+	.global	FtlGetCurEraseBlock
+	.type	FtlGetCurEraseBlock, %function
+FtlGetCurEraseBlock:
+	adrp	x0, .LANCHOR69
+	ldrh	w0, [x0, #:lo12:.LANCHOR69]
+	ret
+	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
+	.section	.text.FtlGetAllBlockNum,"ax",@progbits
+	.align	2
+	.global	FtlGetAllBlockNum
+	.type	FtlGetAllBlockNum, %function
+FtlGetAllBlockNum:
+	adrp	x0, .LANCHOR6
+	ldrh	w0, [x0, #:lo12:.LANCHOR6]
+	ret
+	.size	FtlGetAllBlockNum, .-FtlGetAllBlockNum
+	.section	.text.FtlLowFormat,"ax",@progbits
+	.align	2
+	.global	FtlLowFormat
+	.type	FtlLowFormat, %function
+FtlLowFormat:
+	mov	w0, 0
+	ret
+	.size	FtlLowFormat, .-FtlLowFormat
+	.section	.text.gc_add_sblk,"ax",@progbits
+	.align	2
+	.global	gc_add_sblk
+	.type	gc_add_sblk, %function
+gc_add_sblk:
+	stp	x29, x30, [sp, -64]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR14
+	stp	x19, x20, [sp, 16]
+	and	w19, w0, 65535
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	and	w22, w1, 65535
+	stp	x23, x24, [sp, 48]
+	and	w23, w2, 65535
+	tbz	x0, 8, .L651
+	adrp	x1, .LANCHOR9
+	uxtw	x0, w19
+	mov	w3, w23
+	ldr	x2, [x1, #:lo12:.LANCHOR9]
+	adrp	x1, .LANCHOR7
+	ldr	x1, [x1, #:lo12:.LANCHOR7]
+	ldrh	w5, [x2, x0, lsl 1]
+	mov	w2, w22
+	add	x1, x1, x0, lsl 2
+	adrp	x0, .LC49
+	add	x0, x0, :lo12:.LC49
+	ldrb	w4, [x1, 2]
+	adrp	x1, .LANCHOR70
+	ldrh	w7, [x1, #:lo12:.LANCHOR70]
+	adrp	x1, .LANCHOR71+56
+	ubfx	x4, x4, 5, 3
+	ldrh	w6, [x1, #:lo12:.LANCHOR71+56]
+	mov	w1, w19
+	bl	printf
+.L651:
+	adrp	x0, .LANCHOR6
+	mov	x20, x0
+	ldrh	w1, [x0, #:lo12:.LANCHOR6]
+	cmp	w1, w19
+	bhi	.L652
+	adrp	x1, .LANCHOR72
+	adrp	x0, .LC0
+	mov	w2, 543
+	add	x1, x1, :lo12:.LANCHOR72
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L652:
+	ldrh	w0, [x20, #:lo12:.LANCHOR6]
+	cmp	w0, w19
+	bhi	.L653
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 10, .L675
+	adrp	x0, .LC50
+	mov	w3, w23
+	mov	w2, w22
+	mov	w1, w19
+	add	x0, x0, :lo12:.LC50
+	bl	printf
+.L675:
+	mov	w0, 0
+	b	.L650
+.L653:
+	adrp	x1, .LANCHOR9
+	uxtw	x0, w19
+	ldr	x1, [x1, #:lo12:.LANCHOR9]
+	ldrh	w3, [x1, x0, lsl 1]
+	adrp	x1, .LANCHOR7
+	ldr	x1, [x1, #:lo12:.LANCHOR7]
+	add	x0, x1, x0, lsl 2
+	ldrb	w2, [x0, 2]
+	tst	w2, 224
+	bne	.L655
+	cbz	w3, .L675
+	mov	w2, 553
+	adrp	x1, .LANCHOR72
+	adrp	x0, .LC0
+	add	x1, x1, :lo12:.LANCHOR72
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+	b	.L675
+.L655:
+	adrp	x0, .LANCHOR71
+	add	x1, x0, :lo12:.LANCHOR71
+	ldrh	w0, [x0, #:lo12:.LANCHOR71]
+	cmp	w0, w19
+	beq	.L675
+	adrp	x24, .LANCHOR10
+	ldr	x0, [x24, #:lo12:.LANCHOR10]
+	ldrh	w4, [x0, 48]
+	cmp	w4, w19
+	beq	.L675
+	ldrh	w4, [x0, 16]
+	cmp	w4, w19
+	beq	.L675
+	ldrh	w4, [x0, 80]
+	cmp	w4, w19
+	beq	.L675
+	ldrh	w5, [x1, 56]
+	add	x1, x1, 58
+	mov	w4, 0
+.L656:
+	cmp	w4, w5
+	bcc	.L657
+	cbnz	w22, .L661
+	adrp	x1, .LANCHOR73
+	ldrh	w6, [x1, #:lo12:.LANCHOR73]
+	cmp	w19, w6
+	beq	.L675
+	adrp	x4, .LANCHOR74
+	add	x4, x4, :lo12:.LANCHOR74
+	mov	x1, 0
+.L660:
+	ldrh	w7, [x1, x4]
+	cmp	w19, w7
+	bne	.L659
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L675
+	mov	w5, w6
+	mov	w4, w19
+	ubfx	x2, x2, 5, 3
+	mov	w1, w19
+	adrp	x0, .LC51
+	add	x0, x0, :lo12:.LC51
+	bl	printf
+	b	.L675
+.L657:
+	ldrh	w6, [x1], 2
+	cmp	w6, w19
+	beq	.L675
+	add	w4, w4, 1
+	b	.L656
+.L659:
+	add	x1, x1, 2
+	cmp	x1, 16
+	bne	.L660
+	ubfiz	x20, x23, 7, 16
+	add	x20, x20, 136
+	add	x20, x0, x20
+.L662:
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L663
+	adrp	x0, .LANCHOR70
+	mov	w4, w3
+	mov	w1, w19
+	ubfx	x3, x2, 5, 3
+	ldrh	w6, [x0, #:lo12:.LANCHOR70]
+	mov	w2, w22
+	adrp	x0, .LC52
+	add	x0, x0, :lo12:.LC52
+	bl	printf
+.L663:
+	mov	x0, x20
+	add	x1, x20, 128
+	mov	w2, 65535
+.L666:
+	ldrh	w3, [x0]
+	cmp	w3, w2
+	bne	.L664
+	strh	w19, [x0]
+	cbz	w22, .L665
+	ldr	x1, [x24, #:lo12:.LANCHOR10]
+	ldrh	w0, [x1, 124]
+	add	w0, w0, 1
+	strh	w0, [x1, 124]
+.L685:
+	mov	w0, 1
+.L650:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	ret
+.L661:
+	add	x20, x0, 392
+	b	.L662
+.L665:
+	ldr	x0, [x24, #:lo12:.LANCHOR10]
+	add	x23, x0, x23, uxth 1
+	ldrh	w0, [x23, 120]
+	add	w0, w0, 1
+	strh	w0, [x23, 120]
+	b	.L685
+.L664:
+	add	x0, x0, 2
+	cmp	x1, x0
+	bne	.L666
+	b	.L685
+	.size	gc_add_sblk, .-gc_add_sblk
+	.section	.text.gc_mark_bad_ppa,"ax",@progbits
+	.align	2
+	.global	gc_mark_bad_ppa
+	.type	gc_mark_bad_ppa, %function
+gc_mark_bad_ppa:
+	stp	x29, x30, [sp, -64]!
+	adrp	x1, .LANCHOR75
+	adrp	x3, .LANCHOR32
+	add	x29, sp, 0
+	ldrh	w1, [x1, #:lo12:.LANCHOR75]
+	ldrb	w3, [x3, #:lo12:.LANCHOR32]
+	stp	x19, x20, [sp, 16]
+	mov	w19, 24
+	sub	w19, w19, w3
+	lsr	w2, w0, w1
+	sub	w19, w19, w1
+	adrp	x1, .LANCHOR76
+	str	x23, [sp, 48]
+	mov	w23, 1
+	ldrb	w1, [x1, #:lo12:.LANCHOR76]
+	lsl	w19, w23, w19
+	sub	w19, w19, #1
+	stp	x21, x22, [sp, 32]
+	and	w19, w19, w2
+	adrp	x20, .LANCHOR71
+	add	x21, x20, :lo12:.LANCHOR71
+	mov	w3, w0
+	and	w22, w2, 65535
+	adrp	x0, .LC53
+	udiv	w19, w19, w1
+	mov	w2, w22
+	ldr	w1, [x21, 2120]
+	add	x0, x0, :lo12:.LC53
+	and	w19, w19, 65535
+	bl	printf
+	mov	w1, w23
+	mov	w2, 0
+	mov	w0, w19
+	bl	gc_add_sblk
+	ldr	w0, [x21, 2120]
+	mov	w1, 0
+.L687:
+	cmp	w1, w0
+	bcc	.L689
+	cmp	w0, 5
+	bhi	.L688
+	add	x20, x20, :lo12:.LANCHOR71
+	add	w1, w0, 1
+	str	w1, [x20, 2120]
+	add	x20, x20, x0, uxtw 1
+	strh	w22, [x20, 2124]
+.L688:
+	mov	w0, 0
+	ldr	x23, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+.L689:
+	add	x2, x21, x1, sxtw 1
+	ldrh	w2, [x2, 2124]
+	cmp	w2, w22
+	beq	.L688
+	add	w1, w1, 1
+	and	w1, w1, 65535
+	b	.L687
+	.size	gc_mark_bad_ppa, .-gc_mark_bad_ppa
+	.section	.text.gc_get_src_ppa_from_index,"ax",@progbits
+	.align	2
+	.global	gc_get_src_ppa_from_index
+	.type	gc_get_src_ppa_from_index, %function
+gc_get_src_ppa_from_index:
+	adrp	x1, .LANCHOR77
+	ubfiz	x0, x0, 2, 16
+	ldr	x1, [x1, #:lo12:.LANCHOR77]
+	ldr	w0, [x1, x0]
+	ret
+	.size	gc_get_src_ppa_from_index, .-gc_get_src_ppa_from_index
+	.section	.text.gc_write_completed,"ax",@progbits
+	.align	2
+	.global	gc_write_completed
+	.type	gc_write_completed, %function
+gc_write_completed:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR64
+	stp	x23, x24, [sp, 48]
+	add	x22, x22, :lo12:.LANCHOR64
+	stp	x25, x26, [sp, 64]
+	adrp	x23, .LANCHOR56
+	add	x25, x23, :lo12:.LANCHOR56
+	stp	x19, x20, [sp, 16]
+	str	x27, [sp, 80]
+.L693:
+	ldrb	w0, [x22]
+	cmp	w0, 255
+	bne	.L706
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	ret
+.L706:
+	sxtw	x20, w0
+	add	x1, x23, :lo12:.LANCHOR56
+	lsl	x3, x20, 6
+	add	x2, x1, x3
+	ldrb	w0, [x1, x3]
+	ldr	w1, [x2, 52]
+	strb	w0, [x22]
+	ldrh	w24, [x2, 48]
+	cbz	w1, .L694
+	ldr	w2, [x2, 40]
+	adrp	x0, .LANCHOR71
+	add	x0, x0, :lo12:.LANCHOR71
+	mov	w3, 1
+	str	w2, [x0, 2116]
+	strh	w3, [x0, 2112]
+	adrp	x0, .LC54
+	add	x0, x0, :lo12:.LC54
+	bl	printf
+	adrp	x1, .LANCHOR78
+	adrp	x0, .LC0
+	mov	w2, 956
+	add	x1, x1, :lo12:.LANCHOR78
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L694:
+	adrp	x0, .LANCHOR79
+	mov	x26, x0
+	ldrb	w1, [x0, #:lo12:.LANCHOR79]
+	cmp	w1, 3
+	bne	.L695
+	adrp	x0, .LANCHOR36
+	ldrb	w0, [x0, #:lo12:.LANCHOR36]
+	cbnz	w0, .L695
+	adrp	x0, .LANCHOR10
+	adrp	x1, .LANCHOR80
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	ldrb	w1, [x1, #:lo12:.LANCHOR80]
+	ldrb	w0, [x0, 89]
+	mov	w19, w0
+	cmp	w1, w0
+	bhi	.L707
+	cmp	w0, 2
+	mov	w0, 2
+	csel	w19, w19, w0, ls
+.L696:
+	add	w19, w19, w19, lsl 1
+.L697:
+	adrp	x1, .LANCHOR83
+	and	x21, x24, 65535
+	add	x0, x25, x20, lsl 6
+	mov	x27, x1
+	ldr	x2, [x1, #:lo12:.LANCHOR83]
+	ldrb	w0, [x0, 1]
+	ldrb	w2, [x2, x21]
+	cmp	w2, w0
+	beq	.L698
+	adrp	x1, .LANCHOR78
+	adrp	x0, .LC0
+	mov	w2, 976
+	add	x1, x1, :lo12:.LANCHOR78
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L698:
+	add	x0, x25, x20, lsl 6
+	ldrb	w0, [x0, 61]
+	cmp	w0, 3
+	beq	.L699
+	ldrb	w0, [x26, #:lo12:.LANCHOR79]
+	cmp	w0, 3
+	bne	.L699
+	adrp	x0, .LANCHOR84
+	ldrb	w0, [x0, #:lo12:.LANCHOR84]
+	cbnz	w0, .L699
+	adrp	x0, .LANCHOR36
+	ldrb	w0, [x0, #:lo12:.LANCHOR36]
+	cbnz	w0, .L699
+	adrp	x0, .LANCHOR37
+	ldrb	w0, [x0, #:lo12:.LANCHOR37]
+	cbnz	w0, .L699
+	adrp	x0, .LANCHOR81
+	ldrb	w0, [x0, #:lo12:.LANCHOR81]
+	cbz	w0, .L700
+	adrp	x0, .LANCHOR82
+	ldrb	w0, [x0, #:lo12:.LANCHOR82]
+	cbnz	w0, .L699
+.L700:
+	ldr	x1, [x27, #:lo12:.LANCHOR83]
+	mov	x0, 0
+	add	x21, x1, x21
+.L701:
+	cmp	w19, w0, uxth
+	bls	.L693
+	ldrb	w1, [x21, x0]
+	add	x0, x0, 1
+	add	x1, x25, x1, lsl 6
+	strb	wzr, [x1, 61]
+	b	.L701
+.L707:
+	mov	w19, 1
+	b	.L696
+.L695:
+	adrp	x0, .LANCHOR81
+	ldrb	w0, [x0, #:lo12:.LANCHOR81]
+	cbz	w0, .L708
+	adrp	x0, .LANCHOR82
+	ldrb	w0, [x0, #:lo12:.LANCHOR82]
+	cmp	w0, 0
+	cset	w19, ne
+	add	w19, w19, 1
+	b	.L697
+.L708:
+	mov	w19, 1
+	b	.L697
+.L699:
+	adrp	x20, .LANCHOR71
+	add	x20, x20, :lo12:.LANCHOR71
+	add	x19, x21, x19, uxth
+	strh	w24, [x20, 2108]
+	mov	w24, -1
+.L702:
+	cmp	x21, x19
+	beq	.L693
+	ldr	x1, [x27, #:lo12:.LANCHOR83]
+	ldrb	w0, [x1, x21]
+	strb	w24, [x1, x21]
+	add	x21, x21, 1
+	sbfiz	x1, x0, 6, 32
+	ubfiz	x0, x0, 6, 8
+	add	x1, x25, x1
+	add	x0, x25, x0
+	strb	wzr, [x1, 61]
+	bl	zbuf_free
+	ldrb	w0, [x20, 7]
+	sub	w0, w0, #1
+	strb	w0, [x20, 7]
+	b	.L702
+	.size	gc_write_completed, .-gc_write_completed
+	.section	.text.gc_get_src_blk,"ax",@progbits
+	.align	2
+	.global	gc_get_src_blk
+	.type	gc_get_src_blk, %function
+gc_get_src_blk:
+	adrp	x0, .LANCHOR10
+	ldr	x2, [x0, #:lo12:.LANCHOR10]
+	adrp	x0, .LANCHOR85
+	ldrb	w3, [x0, #:lo12:.LANCHOR85]
+	ldrh	w0, [x2, 124]
+	cbz	w0, .L721
+	add	x1, x2, 392
+	mov	w4, 1
+.L722:
+	add	x5, x1, 128
+	mov	w6, 65535
+.L726:
+	ldrh	w0, [x1]
+	cmp	w0, w6
+	beq	.L724
+	mov	w5, -1
+	strh	w5, [x1]
+	cbz	w4, .L725
+	ldrh	w1, [x2, 124]
+	sub	w1, w1, #1
+	strh	w1, [x2, 124]
+	ret
+.L721:
+	add	x0, x2, x3, sxtw 1
+	ldrh	w0, [x0, 120]
+	cbz	w0, .L727
+	ubfiz	x1, x3, 7, 8
+	mov	w4, 0
+	add	x1, x1, 136
+	add	x1, x2, x1
+	b	.L722
+.L725:
+	add	x2, x2, x3, uxtb 1
+	ldrh	w1, [x2, 120]
+	sub	w1, w1, #1
+	strh	w1, [x2, 120]
+	ret
+.L724:
+	add	x1, x1, 2
+	cmp	x1, x5
+	bne	.L726
+	ret
+.L727:
+	mov	w0, 65535
+	ret
+	.size	gc_get_src_blk, .-gc_get_src_blk
+	.section	.text.gc_free_temp_buf,"ax",@progbits
+	.align	2
+	.global	gc_free_temp_buf
+	.type	gc_free_temp_buf, %function
+gc_free_temp_buf:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR71
+	add	x0, x20, :lo12:.LANCHOR71
+	stp	x21, x22, [sp, 32]
+	ldrb	w1, [x0, 7]
+	cbz	w1, .L736
+	adrp	x1, .LANCHOR58
+	ldrb	w1, [x1, #:lo12:.LANCHOR58]
+	cmp	w1, 1
+	bhi	.L736
+	ldrh	w19, [x0, 2108]
+	adrp	x2, .LANCHOR80
+	adrp	x0, .LANCHOR86
+	adrp	x21, .LANCHOR83
+	ldrb	w2, [x2, #:lo12:.LANCHOR80]
+	add	w1, w19, 24
+	ldrh	w0, [x0, #:lo12:.LANCHOR86]
+	ldr	x4, [x21, #:lo12:.LANCHOR83]
+	mul	w0, w0, w2
+	cmp	w0, w1
+	csel	w1, w0, w1, ls
+	adrp	x0, .LANCHOR56
+	add	x0, x0, :lo12:.LANCHOR56
+.L731:
+	cmp	w19, w1
+	bcc	.L734
+.L736:
+	mov	w0, 0
+	b	.L729
+.L734:
+	uxtw	x22, w19
+	ldrb	w2, [x4, x22]
+	cmp	w2, 255
+	beq	.L732
+	sbfiz	x3, x2, 6, 32
+	add	x3, x0, x3
+	ldrb	w3, [x3, 61]
+	cbnz	w3, .L732
+	ubfiz	x2, x2, 6, 8
+	add	x0, x0, x2
+	bl	zbuf_free
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L733
+	ldr	x0, [x21, #:lo12:.LANCHOR83]
+	mov	w1, w19
+	ldrb	w2, [x0, x22]
+	adrp	x0, .LC55
+	add	x0, x0, :lo12:.LC55
+	bl	printf
+.L733:
+	ldr	x0, [x21, #:lo12:.LANCHOR83]
+	add	x20, x20, :lo12:.LANCHOR71
+	mov	w1, -1
+	strb	w1, [x0, x22]
+	ldrb	w0, [x20, 7]
+	sub	w0, w0, #1
+	strb	w0, [x20, 7]
+	mov	w0, 1
+.L729:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
+.L732:
+	add	w19, w19, 1
+	b	.L731
+	.size	gc_free_temp_buf, .-gc_free_temp_buf
+	.section	.text.print_gc_debug_info,"ax",@progbits
+	.align	2
+	.global	print_gc_debug_info
+	.type	print_gc_debug_info, %function
+print_gc_debug_info:
+	adrp	x2, .LANCHOR87
+	adrp	x1, .LANCHOR71
+	add	x0, x1, :lo12:.LANCHOR71
+	ldrh	w6, [x2, #:lo12:.LANCHOR87]
+	adrp	x2, .LANCHOR58
+	ldrh	w1, [x1, #:lo12:.LANCHOR71]
+	ldrb	w5, [x0, 7]
+	ldrb	w4, [x2, #:lo12:.LANCHOR58]
+	ldrh	w3, [x0, 2106]
+	ldrh	w2, [x0, 2]
+	adrp	x0, .LC56
+	add	x0, x0, :lo12:.LC56
+	b	printf
+	.size	print_gc_debug_info, .-print_gc_debug_info
+	.section	.text.zftl_get_gc_node,"ax",@progbits
+	.align	2
+	.global	zftl_get_gc_node
+	.type	zftl_get_gc_node, %function
+zftl_get_gc_node:
+	and	w1, w1, 65535
+	and	w0, w0, 65535
+	cmp	w1, 5
+	bne	.L746
+	mov	w1, w0
+	adrp	x0, .LANCHOR88
+	ldr	x0, [x0, #:lo12:.LANCHOR88]
+.L748:
+	b	_list_get_gc_head_node.isra.2
+.L746:
+	cmp	w1, 2
+	bne	.L747
+	b	zftl_get_gc_node.part.9
+.L747:
+	mov	w1, w0
+	adrp	x0, .LANCHOR89
+	ldr	x0, [x0, #:lo12:.LANCHOR89]
+	b	.L748
+	.size	zftl_get_gc_node, .-zftl_get_gc_node
+	.section	.text.gc_search_src_blk,"ax",@progbits
+	.align	2
+	.global	gc_search_src_blk
+	.type	gc_search_src_blk, %function
+gc_search_src_blk:
+	stp	x29, x30, [sp, -160]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	and	w22, w0, 255
+	and	w0, w1, 255
+	stp	x19, x20, [sp, 16]
+	str	w0, [x29, 144]
+	adrp	x0, .LANCHOR10
+	and	w19, w2, 255
+	stp	x23, x24, [sp, 48]
+	ldr	x2, [x0, #:lo12:.LANCHOR10]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	add	x0, x2, x22, sxtw 1
+	ldrh	w21, [x0, 120]
+	cbz	w21, .L750
+	mov	w0, w21
+.L749:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 160
+	ret
+.L750:
+	adrp	x0, .LANCHOR71
+	add	x1, x0, :lo12:.LANCHOR71
+	ldrh	w1, [x1, 56]
+	cmp	w1, 1
+	bhi	.L752
+	adrp	x3, .LANCHOR90
+	strh	wzr, [x3, #:lo12:.LANCHOR90]
+	adrp	x3, .LANCHOR91
+	strh	wzr, [x3, #:lo12:.LANCHOR91]
+	adrp	x3, .LANCHOR92
+	strh	wzr, [x3, #:lo12:.LANCHOR92]
+.L752:
+	cbnz	w22, .L753
+	adrp	x26, .LANCHOR91
+	adrp	x25, .LANCHOR14
+	add	x23, x26, :lo12:.LANCHOR91
+	add	x25, x25, :lo12:.LANCHOR14
+	mov	w24, 0
+	mov	w20, 0
+.L754:
+	cmp	w19, w20
+	blt	.L759
+	ldrh	w6, [x23]
+	mov	w1, 3
+	mov	w0, w6
+	bl	zftl_get_gc_node
+	add	w2, w6, 1
+	and	w2, w2, 65535
+	strh	w2, [x23]
+	and	w1, w0, 65535
+	mov	w0, 65535
+	mov	w27, w1
+	cmp	w1, w0
+	beq	.L755
+	ldr	w0, [x25]
+	adrp	x4, .LANCHOR9
+	uxtw	x28, w1
+	tbz	x0, 8, .L756
+	ldr	x0, [x4, #:lo12:.LANCHOR9]
+	str	x4, [x29, 136]
+	ldrh	w3, [x0, x28, lsl 1]
+	adrp	x0, .LC57
+	add	x0, x0, :lo12:.LC57
+	bl	printf
+	ldr	x4, [x29, 136]
+.L756:
+	ldr	x0, [x4, #:lo12:.LANCHOR9]
+	ldrh	w1, [x0, x28, lsl 1]
+	adrp	x0, .LANCHOR70
+	ldrh	w0, [x0, #:lo12:.LANCHOR70]
+	cmp	w1, w0
+	bcs	.L757
+	mov	w2, 0
+	mov	w1, 0
+	mov	w0, w27
+	bl	gc_add_sblk
+	cbz	w0, .L758
+	add	w5, w24, 1
+	and	w24, w5, 65535
+	cmp	w24, w19
+	bcc	.L758
+.L759:
+	ldr	x0, [x29, 144]
+	tbz	x0, 1, .L761
+	adrp	x0, .LANCHOR93
+	ldrh	w0, [x0, #:lo12:.LANCHOR93]
+	cmp	w0, 32
+	bls	.L761
+	adrp	x23, .LANCHOR94
+	adrp	x20, .LANCHOR92
+	add	x27, x23, :lo12:.LANCHOR94
+	add	x20, x20, :lo12:.LANCHOR92
+	mov	w25, 0
+	mov	w26, 65535
+.L762:
+	cmp	w19, w25
+	blt	.L766
+	ldrh	w6, [x20]
+	mov	w1, 5
+	mov	w0, w6
+	bl	zftl_get_gc_node
+	add	w6, w6, 1
+	strh	w6, [x20]
+	and	w1, w0, 65535
+	cmp	w1, w26
+	beq	.L763
+	adrp	x2, .LANCHOR9
+	ubfiz	x1, x1, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR9]
+	ldrh	w2, [x2, x1]
+	ldrh	w1, [x27]
+	cmp	w2, w1
+	bcs	.L763
+	mov	w2, 0
+	mov	w1, 0
+	bl	gc_add_sblk
+	cbz	w0, .L765
+	add	w5, w24, 1
+	and	w24, w5, 65535
+	cmp	w24, w19
+	bcc	.L765
+.L766:
+	cmp	w24, w19
+	adrp	x0, .LANCHOR95
+	bcs	.L768
+	ldrh	w1, [x0, #:lo12:.LANCHOR95]
+	adrp	x3, .LANCHOR80
+	adrp	x0, .LANCHOR86
+	ldrh	w2, [x23, #:lo12:.LANCHOR94]
+	ldrb	w3, [x3, #:lo12:.LANCHOR80]
+	ldrh	w0, [x0, #:lo12:.LANCHOR86]
+	mul	w0, w0, w3
+	sub	w0, w0, w1, lsr 2
+	cmp	w2, w0
+	bge	.L761
+	add	w1, w2, w1, lsr 3
+	strh	w1, [x23, #:lo12:.LANCHOR94]
+.L761:
+	ldr	x0, [x29, 144]
+	tbz	x0, 0, .L769
+	and	w23, w19, 65535
+	cmp	w24, w23
+	bcs	.L769
+	adrp	x20, .LANCHOR90
+	add	x20, x20, :lo12:.LANCHOR90
+	mov	w25, 65535
+.L774:
+	ldrh	w6, [x20]
+	mov	w0, w6
+	bl	zftl_get_gc_node.part.9
+	add	w6, w6, 1
+	strh	w6, [x20]
+	cmp	w25, w0, uxth
+	beq	.L770
+	mov	w2, 0
+	mov	w1, 0
+	bl	gc_add_sblk
+	cbz	w0, .L771
+	add	w5, w24, 1
+	and	w24, w5, 65535
+	cmp	w23, w24
+	bhi	.L771
+.L772:
+	adrp	x0, .LANCHOR95
+	adrp	x1, .LANCHOR70
+	ldrh	w0, [x0, #:lo12:.LANCHOR95]
+	ldrh	w2, [x1, #:lo12:.LANCHOR70]
+	cmp	w2, w0, lsr 1
+	bls	.L769
+	sub	w0, w2, w0, lsr 3
+	b	.L860
+.L757:
+	strh	wzr, [x26, #:lo12:.LANCHOR91]
+	b	.L759
+.L755:
+	strh	wzr, [x23]
+	b	.L759
+.L758:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L754
+.L763:
+	strh	wzr, [x20]
+	b	.L766
+.L765:
+	add	w25, w25, 1
+	and	w25, w25, 65535
+	b	.L762
+.L768:
+	ldrh	w1, [x23, #:lo12:.LANCHOR94]
+	ldrh	w0, [x0, #:lo12:.LANCHOR95]
+	cmp	w1, w0
+	bls	.L761
+	sub	w0, w1, w0, lsr 3
+	strh	w0, [x23, #:lo12:.LANCHOR94]
+	b	.L761
+.L770:
+	strh	wzr, [x20]
+.L773:
+	cmp	w24, w23
+	bcs	.L772
+	adrp	x1, .LANCHOR70
+	adrp	x0, .LANCHOR95
+	ldrh	w2, [x1, #:lo12:.LANCHOR70]
+	ldrh	w0, [x0, #:lo12:.LANCHOR95]
+	cmp	w2, w0
+	bcs	.L769
+	add	w0, w2, w0, lsr 3
+.L860:
+	strh	w0, [x1, #:lo12:.LANCHOR70]
+.L769:
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L805
+	ldr	w2, [x29, 144]
+	adrp	x0, .LC58
+	mov	w4, w19
+	mov	w3, w24
+	mov	w1, w22
+	add	x0, x0, :lo12:.LC58
+	bl	printf
+.L805:
+	mov	w0, w24
+	b	.L749
+.L771:
+	add	w21, w21, 1
+	and	w21, w21, 65535
+	cmp	w23, w21
+	bhi	.L774
+	b	.L773
+.L753:
+	adrp	x23, .LANCHOR80
+	adrp	x25, .LANCHOR86
+	str	x23, [x29, 136]
+	cmp	w19, 1
+	ldrb	w20, [x23, #:lo12:.LANCHOR80]
+	ldrh	w3, [x25, #:lo12:.LANCHOR86]
+	mul	w20, w20, w3
+	and	w20, w20, 65535
+	bne	.L775
+	cbz	w1, .L775
+	ldrh	w3, [x2, 80]
+	mov	w2, 65535
+	cmp	w3, w2
+	beq	.L808
+	add	x2, x0, :lo12:.LANCHOR71
+	ldrh	w2, [x2, 2106]
+	sub	w20, w20, w2
+	and	w20, w20, 65535
+.L808:
+	mov	w19, 8
+.L775:
+	add	x0, x0, :lo12:.LANCHOR71
+	strh	wzr, [x0, 2110]
+	adrp	x0, .LANCHOR96
+	strh	wzr, [x0, #:lo12:.LANCHOR96]
+	ldr	w0, [x29, 144]
+	and	w0, w0, 1
+	str	w0, [x29, 120]
+	ldr	x0, [x29, 144]
+	tbz	x0, 0, .L809
+	adrp	x2, .LANCHOR98
+	adrp	x26, .LANCHOR97
+	str	x2, [x29, 128]
+	ldrh	w0, [x26, #:lo12:.LANCHOR97]
+	ldrh	w3, [x2, #:lo12:.LANCHOR98]
+	cmp	w0, w3, lsr 2
+	bhi	.L777
+	adrp	x2, .LANCHOR99
+	ldrh	w2, [x2, #:lo12:.LANCHOR99]
+	cmp	w2, w0
+	bcs	.L810
+.L777:
+	cmp	w1, 1
+	adrp	x28, .LANCHOR90
+	bls	.L779
+.L781:
+	mov	w24, 0
+.L780:
+	add	x28, x28, :lo12:.LANCHOR90
+	adrp	x0, .LANCHOR99
+	mov	w23, 0
+	add	x0, x0, :lo12:.LANCHOR99
+	mov	w27, 64
+	str	x0, [x29, 112]
+.L784:
+	ldrh	w7, [x28]
+	mov	w0, w7
+	bl	zftl_get_gc_node.part.9
+	and	w6, w0, 65535
+	str	w6, [x29, 104]
+	mov	w1, 65535
+	cmp	w6, w1
+	beq	.L782
+	add	w7, w7, 1
+	mov	w2, w22
+	strh	w7, [x28]
+	mov	w1, 0
+	bl	gc_add_sblk
+	cbz	w0, .L783
+	adrp	x0, .LANCHOR9
+	ldr	w6, [x29, 104]
+	add	w5, w24, 1
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	and	w24, w5, 65535
+	ubfiz	x6, x6, 1, 16
+	cmp	w24, w19
+	ldrh	w0, [x0, x6]
+	add	w3, w23, w0
+	and	w23, w3, 65535
+	bcs	.L778
+	cmp	w20, w23
+	bcc	.L778
+	ldr	x0, [x29, 112]
+	ldrh	w1, [x26, #:lo12:.LANCHOR97]
+	ldrh	w0, [x0]
+	cmp	w0, w1, lsl 1
+	ble	.L783
+.L778:
+	adrp	x0, .LANCHOR99
+	ldrh	w1, [x0, #:lo12:.LANCHOR99]
+	ldr	x0, [x29, 128]
+	ldrh	w0, [x0, #:lo12:.LANCHOR98]
+	cmp	w1, w0, lsr 2
+	bhi	.L806
+	ldrh	w0, [x26, #:lo12:.LANCHOR97]
+	add	w0, w0, 8
+	cmp	w1, w0
+	ble	.L776
+.L806:
+	cmp	w20, w23
+	bls	.L776
+	adrp	x4, .LANCHOR91
+	add	x28, x4, :lo12:.LANCHOR91
+	and	w0, w19, 65535
+	mov	w26, 64
+	adrp	x27, .LANCHOR9
+	str	w0, [x29, 128]
+.L787:
+	ldrh	w6, [x28]
+	mov	w1, 3
+	mov	w0, w6
+	bl	zftl_get_gc_node
+	and	w7, w0, 65535
+	str	w7, [x29, 112]
+	mov	w1, 65535
+	cmp	w7, w1
+	beq	.L785
+	add	w6, w6, 1
+	mov	w2, w22
+	strh	w6, [x28]
+	mov	w1, 0
+	bl	gc_add_sblk
+	cbz	w0, .L786
+	ldr	w7, [x29, 112]
+	add	w5, w24, 1
+	ldr	x0, [x27, #:lo12:.LANCHOR9]
+	and	w24, w5, 65535
+	ubfiz	x7, x7, 1, 16
+	ldrh	w0, [x0, x7]
+	add	w3, w23, w0
+	ldr	w0, [x29, 128]
+	and	w23, w3, 65535
+	cmp	w24, w0
+	bcs	.L776
+	cmp	w20, w23
+	bcs	.L786
+.L776:
+	ldr	x0, [x29, 144]
+	tbz	x0, 1, .L788
+	adrp	x0, .LANCHOR93
+	str	x0, [x29, 112]
+	ldrh	w1, [x0, #:lo12:.LANCHOR93]
+	cmp	w1, 32
+	bls	.L788
+	cmp	w23, w20
+	bcs	.L788
+	adrp	x0, .LANCHOR92
+	adrp	x27, .LANCHOR100
+	add	x28, x0, :lo12:.LANCHOR92
+	mov	w26, 64
+	add	x0, x27, :lo12:.LANCHOR100
+	str	x0, [x29, 128]
+.L794:
+	ldrh	w6, [x28]
+	mov	w1, 5
+	mov	w0, w6
+	bl	zftl_get_gc_node
+	and	w8, w0, 65535
+	mov	w1, 65535
+	cmp	w8, w1
+	beq	.L789
+	add	w6, w6, 1
+	strh	w6, [x28]
+	cmp	w19, 1
+	bne	.L790
+	ldr	x1, [x29, 136]
+	ldrh	w2, [x25, #:lo12:.LANCHOR86]
+	ldrb	w1, [x1, #:lo12:.LANCHOR80]
+	mul	w2, w1, w2
+	adrp	x1, .LANCHOR95
+	ldrh	w1, [x1, #:lo12:.LANCHOR95]
+	sub	w1, w2, w1, lsr 3
+	ldr	x2, [x29, 128]
+	strh	w1, [x2]
+.L790:
+	ubfiz	x6, x8, 1, 16
+	adrp	x8, .LANCHOR9
+	stp	x8, x6, [x29, 96]
+	ldr	x1, [x8, #:lo12:.LANCHOR9]
+	ldrh	w2, [x1, x6]
+	ldr	x1, [x29, 128]
+	ldrh	w1, [x1]
+	cmp	w2, w1
+	bcs	.L791
+	mov	w2, w22
+	mov	w1, 0
+	bl	gc_add_sblk
+	cbz	w0, .L792
+	ldp	x8, x6, [x29, 96]
+	add	w5, w24, 1
+	add	w21, w21, 1
+	and	w24, w5, 65535
+	and	w21, w21, 65535
+	cmp	w24, w19
+	ldr	x0, [x8, #:lo12:.LANCHOR9]
+	ldrh	w0, [x0, x6]
+	add	w3, w23, w0
+	and	w23, w3, 65535
+	bcs	.L793
+	cmp	w20, w23
+	bcs	.L792
+.L793:
+	cmp	w24, w19
+	adrp	x0, .LANCHOR95
+	bcc	.L795
+	cbnz	w21, .L796
+	ldr	x1, [x29, 112]
+	ldrh	w2, [x1, #:lo12:.LANCHOR93]
+	adrp	x1, .LANCHOR101
+	ldrh	w1, [x1, #:lo12:.LANCHOR101]
+	cmp	w2, w1
+	bls	.L796
+.L795:
+	ldr	x3, [x29, 136]
+	ldrh	w2, [x0, #:lo12:.LANCHOR95]
+	ldrh	w0, [x25, #:lo12:.LANCHOR86]
+	ldrh	w1, [x27, #:lo12:.LANCHOR100]
+	ldrb	w6, [x3, #:lo12:.LANCHOR80]
+	lsr	w2, w2, 3
+	mul	w0, w0, w6
+	sub	w0, w0, w2
+	cmp	w1, w0
+	bge	.L788
+	add	w1, w1, w2
+	strh	w1, [x27, #:lo12:.LANCHOR100]
+.L788:
+	ldr	w0, [x29, 120]
+	cbz	w0, .L769
+	and	w26, w19, 65535
+	cmp	w24, w26
+	bcs	.L769
+	cmp	w23, w20
+	bcs	.L769
+	adrp	x21, .LANCHOR91
+	add	x21, x21, :lo12:.LANCHOR91
+	adrp	x28, .LANCHOR102
+	mov	w25, 64
+	add	x0, x28, :lo12:.LANCHOR102
+	adrp	x27, .LANCHOR9
+	str	x0, [x29, 128]
+.L804:
+	ldrh	w6, [x21]
+	mov	w1, 3
+	mov	w0, w6
+	bl	zftl_get_gc_node
+	and	w4, w0, 65535
+	mov	w1, 65535
+	cmp	w4, w1
+	beq	.L798
+	ldr	x1, [x27, #:lo12:.LANCHOR9]
+	ubfiz	x4, x4, 1, 16
+	add	w6, w6, 1
+	strh	w6, [x21]
+	ldrh	w2, [x1, x4]
+	ldr	x1, [x29, 128]
+	ldrh	w1, [x1]
+	cmp	w2, w1
+	bcs	.L799
+	adrp	x1, .LANCHOR98
+	ldrh	w2, [x1, #:lo12:.LANCHOR98]
+	adrp	x1, .LANCHOR99
+	ldrh	w1, [x1, #:lo12:.LANCHOR99]
+	cmp	w1, w2, lsr 1
+	bls	.L800
+.L799:
+	mov	w2, w22
+	mov	w1, 0
+	str	x4, [x29, 120]
+	bl	gc_add_sblk
+	cbz	w0, .L801
+	adrp	x0, .LANCHOR9
+	ldr	x4, [x29, 120]
+	add	w5, w24, 1
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	and	w24, w5, 65535
+	cmp	w26, w24
+	ldrh	w0, [x0, x4]
+	add	w3, w23, w0
+	and	w23, w3, 65535
+	bls	.L802
+	cmp	w20, w23
+	bcs	.L801
+.L803:
+	adrp	x0, .LANCHOR95
+	ldrh	w1, [x28, #:lo12:.LANCHOR102]
+	ldrh	w0, [x0, #:lo12:.LANCHOR95]
+	cmp	w1, w0, lsr 1
+	bls	.L769
+	sub	w0, w1, w0, lsr 3
+	strh	w0, [x28, #:lo12:.LANCHOR102]
+	b	.L769
+.L779:
+	lsr	w0, w0, 2
+	strh	w0, [x28, #:lo12:.LANCHOR90]
+	mov	w0, 0
+	bl	zftl_get_gc_node.part.9
+	and	w1, w0, 65535
+	mov	w2, 65535
+	cmp	w1, w2
+	beq	.L781
+	adrp	x2, .LANCHOR9
+	ubfiz	x1, x1, 1, 16
+	ldr	x3, [x2, #:lo12:.LANCHOR9]
+	adrp	x2, .LANCHOR95
+	ldrh	w2, [x2, #:lo12:.LANCHOR95]
+	ldrh	w1, [x3, x1]
+	cmp	w1, w2, lsr 2
+	bcs	.L781
+	mov	w1, 1
+	mov	w2, w22
+	strh	w1, [x28, #:lo12:.LANCHOR90]
+	mov	w1, 0
+	bl	gc_add_sblk
+	cmp	w0, 0
+	cset	w24, ne
+	b	.L780
+.L782:
+	strh	wzr, [x28]
+	b	.L778
+.L783:
+	sub	w27, w27, #1
+	ands	w27, w27, 65535
+	bne	.L784
+	b	.L778
+.L785:
+	cmp	w6, 64
+	bls	.L776
+	strh	wzr, [x28]
+	b	.L776
+.L786:
+	sub	w26, w26, #1
+	ands	w26, w26, 65535
+	bne	.L787
+	b	.L776
+.L809:
+	mov	w23, 0
+	mov	w24, 0
+	b	.L776
+.L791:
+	adrp	x0, .LANCHOR92
+	strh	wzr, [x0, #:lo12:.LANCHOR92]
+	b	.L793
+.L789:
+	strh	wzr, [x28]
+	b	.L793
+.L792:
+	sub	w26, w26, #1
+	ands	w26, w26, 65535
+	bne	.L794
+	b	.L793
+.L796:
+	ldr	x1, [x29, 136]
+	ldrh	w0, [x0, #:lo12:.LANCHOR95]
+	ldrh	w2, [x27, #:lo12:.LANCHOR100]
+	ldrb	w1, [x1, #:lo12:.LANCHOR80]
+	mul	w1, w1, w0
+	cmp	w2, w1
+	ble	.L769
+	sub	w0, w2, w0, lsr 3
+	strh	w0, [x27, #:lo12:.LANCHOR100]
+	b	.L769
+.L798:
+	cmp	w6, 64
+	bls	.L800
+	strh	wzr, [x21]
+.L800:
+	cmp	w24, w26
+	bcc	.L803
+.L802:
+	adrp	x0, .LANCHOR95
+	ldrh	w2, [x28, #:lo12:.LANCHOR102]
+	ldrh	w1, [x0, #:lo12:.LANCHOR95]
+	ldr	x0, [x29, 136]
+	ldrb	w0, [x0, #:lo12:.LANCHOR80]
+	mul	w0, w0, w1
+	sub	w0, w0, #32
+	cmp	w2, w0
+	bge	.L769
+	add	w1, w2, w1, lsr 3
+	strh	w1, [x28, #:lo12:.LANCHOR102]
+	b	.L769
+.L801:
+	sub	w25, w25, #1
+	ands	w25, w25, 65535
+	bne	.L804
+	b	.L800
+.L810:
+	mov	w23, 0
+	mov	w24, 0
+	b	.L778
+	.size	gc_search_src_blk, .-gc_search_src_blk
+	.section	.text.zftl_insert_free_list,"ax",@progbits
+	.align	2
+	.global	zftl_insert_free_list
+	.type	zftl_insert_free_list, %function
+zftl_insert_free_list:
+	and	w1, w0, 65535
+	adrp	x0, .LANCHOR7
+	ldr	x0, [x0, #:lo12:.LANCHOR7]
+	add	x0, x0, x1, uxth 2
+	ldrb	w0, [x0, 2]
+	ands	w0, w0, 24
+	bne	.L862
+	adrp	x2, .LANCHOR103
+	adrp	x0, .LANCHOR104
+	add	x2, x2, :lo12:.LANCHOR103
+	add	x0, x0, :lo12:.LANCHOR104
+.L864:
+	b	_insert_free_list
+.L862:
+	cmp	w0, 16
+	bne	.L863
+	adrp	x2, .LANCHOR105
+	adrp	x0, .LANCHOR106
+	add	x2, x2, :lo12:.LANCHOR105
+	add	x0, x0, :lo12:.LANCHOR106
+	b	.L864
+.L863:
+	adrp	x2, .LANCHOR107
+	adrp	x0, .LANCHOR108
+	add	x2, x2, :lo12:.LANCHOR107
+	add	x0, x0, :lo12:.LANCHOR108
+	b	.L864
+	.size	zftl_insert_free_list, .-zftl_insert_free_list
+	.section	.text.zftl_insert_data_list,"ax",@progbits
+	.align	2
+	.global	zftl_insert_data_list
+	.type	zftl_insert_data_list, %function
+zftl_insert_data_list:
+	and	w1, w0, 65535
+	adrp	x0, .LANCHOR7
+	ldr	x0, [x0, #:lo12:.LANCHOR7]
+	add	x0, x0, x1, uxth 2
+	ldrb	w2, [x0, 2]
+	and	w2, w2, 224
+	cmp	w2, 64
+	bne	.L866
+	adrp	x2, .LANCHOR97
+	adrp	x0, .LANCHOR12
+	add	x2, x2, :lo12:.LANCHOR97
+	add	x0, x0, :lo12:.LANCHOR12
+.L869:
+	b	_insert_data_list
+.L866:
+	cmp	w2, 96
+	bne	.L867
+	adrp	x2, .LANCHOR99
+	adrp	x0, .LANCHOR89
+	add	x2, x2, :lo12:.LANCHOR99
+	add	x0, x0, :lo12:.LANCHOR89
+	b	.L869
+.L867:
+	cmp	w2, 160
+	bne	.L865
+	adrp	x2, .LANCHOR93
+	adrp	x0, .LANCHOR88
+	add	x2, x2, :lo12:.LANCHOR93
+	add	x0, x0, :lo12:.LANCHOR88
+	b	.L869
+.L865:
+	ret
+	.size	zftl_insert_data_list, .-zftl_insert_data_list
+	.section	.text.zftl_gc_get_free_sblk,"ax",@progbits
+	.align	2
+	.global	zftl_gc_get_free_sblk
+	.type	zftl_gc_get_free_sblk, %function
+zftl_gc_get_free_sblk:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR10
+	stp	x21, x22, [sp, 32]
+	and	w21, w0, 65535
+	ldr	x0, [x20, #:lo12:.LANCHOR10]
+	and	w22, w1, 65535
+	ldrh	w19, [x0, 588]
+	mov	w0, 65535
+	cmp	w19, w0
+	beq	.L871
+	cbnz	w21, .L871
+	mov	w1, w19
+	adrp	x0, .LC59
+	add	x0, x0, :lo12:.LC59
+	bl	printf
+	ldr	x0, [x20, #:lo12:.LANCHOR10]
+	mov	w1, -1
+	strh	w1, [x0, 588]
+.L872:
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
+.L871:
+	adrp	x2, .LANCHOR105
+	adrp	x20, .LANCHOR107
+	ldrh	w0, [x2, #:lo12:.LANCHOR105]
+	ldrh	w1, [x20, #:lo12:.LANCHOR107]
+	cmp	w0, w1
+	bcc	.L873
+	adrp	x3, .LANCHOR103
+	ldrh	w3, [x3, #:lo12:.LANCHOR103]
+	cmp	w3, w0
+	bls	.L874
+	cbz	w1, .L874
+.L873:
+	cbnz	w21, .L875
+	lsr	w1, w1, 2
+.L876:
+	adrp	x0, .LANCHOR108
+	add	x2, x20, :lo12:.LANCHOR107
+	add	x0, x0, :lo12:.LANCHOR108
+.L891:
+	bl	_list_pop_index_node
+	and	w19, w0, 65535
+	mov	w0, 65535
+	cmp	w19, w0
+	bne	.L879
+	adrp	x0, .LANCHOR103
+	ldrh	w5, [x20, #:lo12:.LANCHOR107]
+	mov	w2, w22
+	mov	w1, w19
+	ldrh	w4, [x0, #:lo12:.LANCHOR103]
+	adrp	x0, .LANCHOR104
+	ldr	x3, [x0, #:lo12:.LANCHOR104]
+	adrp	x0, .LC60
+	add	x0, x0, :lo12:.LC60
+	bl	printf
+.L879:
+	cbz	w21, .L872
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L872
+	adrp	x4, .LANCHOR9
+	adrp	x1, .LANCHOR7
+	uxtw	x3, w19
+	ldr	x1, [x1, #:lo12:.LANCHOR7]
+	lsl	x0, x3, 2
+	ldr	x6, [x4, #:lo12:.LANCHOR9]
+	add	x2, x1, x0
+	ldr	w4, [x1, x0]
+	ldrh	w6, [x6, x3, lsl 1]
+	ldrb	w2, [x2, 2]
+	ldrh	w5, [x1, x0]
+	ubfx	x4, x4, 11, 8
+	mov	w1, w19
+	adrp	x0, .LC61
+	ubfx	x3, x2, 3, 2
+	and	w5, w5, 2047
+	ubfx	x2, x2, 5, 3
+	add	x0, x0, :lo12:.LC61
+	bl	printf
+	b	.L872
+.L875:
+	mov	w1, 7
+	mul	w1, w0, w1
+	lsr	w1, w1, 3
+	b	.L876
+.L874:
+	lsr	w1, w0, 3
+	cmp	w21, 0
+	adrp	x0, .LANCHOR106
+	csel	w1, w1, wzr, ne
+	add	x2, x2, :lo12:.LANCHOR105
+	add	x0, x0, :lo12:.LANCHOR106
+	b	.L891
+	.size	zftl_gc_get_free_sblk, .-zftl_gc_get_free_sblk
+	.section	.text.zftl_get_free_sblk,"ax",@progbits
+	.align	2
+	.global	zftl_get_free_sblk
+	.type	zftl_get_free_sblk, %function
+zftl_get_free_sblk:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w20, w1, 65535
+	str	x21, [sp, 32]
+	cmp	w20, 5
+	bne	.L893
+	adrp	x2, .LANCHOR105
+	adrp	x0, .LANCHOR107
+	ldrh	w3, [x2, #:lo12:.LANCHOR105]
+	ldrh	w1, [x0, #:lo12:.LANCHOR107]
+	cmp	w3, w1
+	bcc	.L894
+	adrp	x4, .LANCHOR103
+	ldrh	w4, [x4, #:lo12:.LANCHOR103]
+	cmp	w4, w3
+	bls	.L895
+	cbz	w1, .L895
+.L894:
+	add	x2, x0, :lo12:.LANCHOR107
+	lsr	w1, w1, 1
+.L914:
+	adrp	x0, .LANCHOR108
+	add	x0, x0, :lo12:.LANCHOR108
+	b	.L913
+.L895:
+	adrp	x0, .LANCHOR106
+	add	x2, x2, :lo12:.LANCHOR105
+	add	x0, x0, :lo12:.LANCHOR106
+	mov	w1, 0
+.L913:
+	bl	_list_pop_index_node
+	and	w19, w0, 65535
+	mov	w0, 65535
+	cmp	w19, w0
+	bne	.L898
+	adrp	x0, .LANCHOR107
+	mov	w2, w20
+	mov	w1, w19
+	ldrh	w5, [x0, #:lo12:.LANCHOR107]
+	adrp	x0, .LANCHOR103
+	ldrh	w4, [x0, #:lo12:.LANCHOR103]
+	adrp	x0, .LANCHOR104
+	ldr	x3, [x0, #:lo12:.LANCHOR104]
+	adrp	x0, .LC60
+	add	x0, x0, :lo12:.LC60
+	bl	printf
+	b	.L898
+.L893:
+	adrp	x21, .LANCHOR10
+	and	w0, w0, 65535
+	ldr	x1, [x21, #:lo12:.LANCHOR10]
+	ldrh	w19, [x1, 590]
+	mov	w1, 65535
+	cmp	w19, w1
+	beq	.L897
+	cmp	w20, 1
+	beq	.L897
+	mov	w1, w19
+	adrp	x0, .LC62
+	add	x0, x0, :lo12:.LC62
+	bl	printf
+	ldr	x0, [x21, #:lo12:.LANCHOR10]
+	mov	w1, -1
+	strh	w1, [x0, 590]
+.L898:
+	mov	w0, w19
+	ldr	x21, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+.L897:
+	adrp	x2, .LANCHOR103
+	adrp	x4, .LANCHOR107
+	ldrh	w1, [x2, #:lo12:.LANCHOR103]
+	ldrh	w3, [x4, #:lo12:.LANCHOR107]
+	cmp	w1, w3
+	bcc	.L899
+	adrp	x5, .LANCHOR105
+	ldrh	w5, [x5, #:lo12:.LANCHOR105]
+	cmp	w5, w1
+	bls	.L900
+	cbz	w3, .L900
+.L899:
+	cmp	w20, 1
+	lsr	w3, w3, 1
+	csel	w0, w3, w0, eq
+	add	x2, x4, :lo12:.LANCHOR107
+	mov	w1, w0
+	b	.L914
+.L900:
+	lsr	w1, w1, 1
+	cmp	w20, 1
+	csel	w0, w1, w0, eq
+	add	x2, x2, :lo12:.LANCHOR103
+	mov	w1, w0
+	adrp	x0, .LANCHOR104
+	add	x0, x0, :lo12:.LANCHOR104
+	b	.L913
+	.size	zftl_get_free_sblk, .-zftl_get_free_sblk
+	.section	.text.zftl_remove_data_node,"ax",@progbits
+	.align	2
+	.global	zftl_remove_data_node
+	.type	zftl_remove_data_node, %function
+zftl_remove_data_node:
+	and	w1, w0, 65535
+	adrp	x0, .LANCHOR7
+	ldr	x0, [x0, #:lo12:.LANCHOR7]
+	add	x0, x0, x1, uxth 2
+	ldrb	w2, [x0, 2]
+	and	w2, w2, 224
+	cmp	w2, 64
+	bne	.L916
+	adrp	x2, .LANCHOR97
+	adrp	x0, .LANCHOR12
+	add	x2, x2, :lo12:.LANCHOR97
+	add	x0, x0, :lo12:.LANCHOR12
+.L919:
+	b	_list_remove_node
+.L916:
+	cmp	w2, 96
+	bne	.L917
+	adrp	x2, .LANCHOR99
+	adrp	x0, .LANCHOR89
+	add	x2, x2, :lo12:.LANCHOR99
+	add	x0, x0, :lo12:.LANCHOR89
+	b	.L919
+.L917:
+	cmp	w2, 160
+	bne	.L915
+	adrp	x2, .LANCHOR93
+	adrp	x0, .LANCHOR88
+	add	x2, x2, :lo12:.LANCHOR93
+	add	x0, x0, :lo12:.LANCHOR88
+	b	.L919
+.L915:
+	ret
+	.size	zftl_remove_data_node, .-zftl_remove_data_node
+	.section	.text.zftl_remove_free_node,"ax",@progbits
+	.align	2
+	.global	zftl_remove_free_node
+	.type	zftl_remove_free_node, %function
+zftl_remove_free_node:
+	and	w1, w0, 65535
+	adrp	x0, .LANCHOR7
+	ldr	x0, [x0, #:lo12:.LANCHOR7]
+	add	x0, x0, x1, uxth 2
+	ldrb	w0, [x0, 2]
+	ands	w0, w0, 24
+	bne	.L921
+	adrp	x2, .LANCHOR103
+	adrp	x0, .LANCHOR104
+	add	x2, x2, :lo12:.LANCHOR103
+	add	x0, x0, :lo12:.LANCHOR104
+.L923:
+	b	_list_remove_node
+.L921:
+	cmp	w0, 16
+	bne	.L922
+	adrp	x2, .LANCHOR105
+	adrp	x0, .LANCHOR106
+	add	x2, x2, :lo12:.LANCHOR105
+	add	x0, x0, :lo12:.LANCHOR106
+	b	.L923
+.L922:
+	adrp	x2, .LANCHOR107
+	adrp	x0, .LANCHOR108
+	add	x2, x2, :lo12:.LANCHOR107
+	add	x0, x0, :lo12:.LANCHOR108
+	b	.L923
+	.size	zftl_remove_free_node, .-zftl_remove_free_node
+	.section	.text.zftl_list_update_data_list,"ax",@progbits
+	.align	2
+	.global	zftl_list_update_data_list
+	.type	zftl_list_update_data_list, %function
+zftl_list_update_data_list:
+	and	w1, w0, 65535
+	adrp	x0, .LANCHOR7
+	ldr	x0, [x0, #:lo12:.LANCHOR7]
+	add	x0, x0, x1, uxth 2
+	ldrb	w2, [x0, 2]
+	and	w2, w2, 224
+	cmp	w2, 64
+	bne	.L925
+	adrp	x2, .LANCHOR97
+	adrp	x0, .LANCHOR12
+	add	x2, x2, :lo12:.LANCHOR97
+	add	x0, x0, :lo12:.LANCHOR12
+.L928:
+	b	_list_update_data_list
+.L925:
+	cmp	w2, 96
+	bne	.L926
+	adrp	x2, .LANCHOR99
+	adrp	x0, .LANCHOR89
+	add	x2, x2, :lo12:.LANCHOR99
+	add	x0, x0, :lo12:.LANCHOR89
+	b	.L928
+.L926:
+	cmp	w2, 160
+	bne	.L924
+	adrp	x2, .LANCHOR93
+	adrp	x0, .LANCHOR88
+	add	x2, x2, :lo12:.LANCHOR93
+	add	x0, x0, :lo12:.LANCHOR88
+	b	.L928
+.L924:
+	ret
+	.size	zftl_list_update_data_list, .-zftl_list_update_data_list
+	.section	.text.print_list_info,"ax",@progbits
+	.align	2
+	.global	print_list_info
+	.type	print_list_info, %function
+print_list_info:
+	sub	sp, sp, #96
+	stp	x29, x30, [sp, 32]
+	add	x29, sp, 32
+	ldrh	w2, [x1]
+	ldr	x1, [x0]
+	stp	x19, x20, [sp, 48]
+	mov	x19, x0
+	stp	x21, x22, [sp, 64]
+	adrp	x0, .LC63
+	stp	x23, x24, [sp, 80]
+	add	x0, x0, :lo12:.LC63
+	bl	printf
+	ldr	x19, [x19]
+	cbz	x19, .L929
+	mov	x24, -6148914691236517206
+	adrp	x22, .LC64
+	adrp	x21, .LANCHOR109
+	add	x22, x22, :lo12:.LC64
+	add	x21, x21, :lo12:.LANCHOR109
+	mov	w20, 0
+	adrp	x23, .LANCHOR4
+	movk	x24, 0xaaab, lsl 0
+.L933:
+	ldr	x2, [x23, #:lo12:.LANCHOR4]
+	adrp	x1, .LANCHOR7
+	adrp	x8, .LANCHOR9
+	ldrh	w5, [x19, 4]
+	sub	x2, x19, x2
+	ldr	x1, [x1, #:lo12:.LANCHOR7]
+	asr	x2, x2, 1
+	ldr	x8, [x8, #:lo12:.LANCHOR9]
+	ldrh	w4, [x19, 2]
+	mul	x2, x2, x24
+	and	x7, x2, 65535
+	and	w2, w2, 65535
+	lsl	x0, x7, 2
+	add	x3, x1, x0
+	ldrh	w7, [x8, x7, lsl 1]
+	ldrb	w6, [x3, 2]
+	ldrh	w3, [x19]
+	str	w7, [sp, 16]
+	ldrh	w7, [x1, x0]
+	and	w7, w7, 2047
+	str	w7, [sp, 8]
+	ubfx	x7, x6, 3, 2
+	ubfx	x6, x6, 5, 3
+	ldr	w0, [x1, x0]
+	mov	w1, w20
+	ubfx	x0, x0, 11, 8
+	str	w0, [sp]
+	mov	x0, x22
+	bl	printf
+	ldrh	w19, [x19]
+	mov	w0, 65535
+	cmp	w19, w0
+	beq	.L929
+	ldr	x0, [x23, #:lo12:.LANCHOR4]
+	mov	w1, 6
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	umaddl	x19, w19, w1, x0
+	ldrh	w0, [x21]
+	cmp	w0, w20
+	bcs	.L933
+.L929:
+	ldp	x19, x20, [sp, 48]
+	ldp	x21, x22, [sp, 64]
+	ldp	x23, x24, [sp, 80]
+	ldp	x29, x30, [sp, 32]
+	add	sp, sp, 96
+	ret
+	.size	print_list_info, .-print_list_info
+	.section	.text.dump_all_list_info,"ax",@progbits
+	.align	2
+	.global	dump_all_list_info
+	.type	dump_all_list_info, %function
+dump_all_list_info:
+	stp	x29, x30, [sp, -16]!
+	adrp	x1, .LANCHOR103
+	adrp	x0, .LANCHOR104
+	add	x1, x1, :lo12:.LANCHOR103
+	add	x29, sp, 0
+	add	x0, x0, :lo12:.LANCHOR104
+	bl	print_list_info
+	adrp	x1, .LANCHOR105
+	adrp	x0, .LANCHOR106
+	add	x1, x1, :lo12:.LANCHOR105
+	add	x0, x0, :lo12:.LANCHOR106
+	bl	print_list_info
+	adrp	x1, .LANCHOR107
+	adrp	x0, .LANCHOR108
+	add	x1, x1, :lo12:.LANCHOR107
+	add	x0, x0, :lo12:.LANCHOR108
+	bl	print_list_info
+	adrp	x1, .LANCHOR97
+	adrp	x0, .LANCHOR12
+	add	x1, x1, :lo12:.LANCHOR97
+	add	x0, x0, :lo12:.LANCHOR12
+	bl	print_list_info
+	adrp	x1, .LANCHOR99
+	adrp	x0, .LANCHOR89
+	add	x1, x1, :lo12:.LANCHOR99
+	add	x0, x0, :lo12:.LANCHOR89
+	bl	print_list_info
+	ldp	x29, x30, [sp], 16
+	adrp	x1, .LANCHOR93
+	adrp	x0, .LANCHOR88
+	add	x1, x1, :lo12:.LANCHOR93
+	add	x0, x0, :lo12:.LANCHOR88
+	b	print_list_info
+	.size	dump_all_list_info, .-dump_all_list_info
+	.section	.text.ftl_tmp_into_update,"ax",@progbits
+	.align	2
+	.global	ftl_tmp_into_update
+	.type	ftl_tmp_into_update, %function
+ftl_tmp_into_update:
+	adrp	x0, .LANCHOR110
+	ldr	x0, [x0, #:lo12:.LANCHOR110]
+	ldr	w1, [x0, 16]
+	cmp	w1, 2048
+	bls	.L938
+	ldr	w2, [x0, 20]
+	add	w2, w2, w1, lsr 11
+	and	w1, w1, 2047
+	stp	w1, w2, [x0, 16]
+.L938:
+	ldr	w1, [x0, 24]
+	cmp	w1, 2048
+	bls	.L939
+	ldr	w2, [x0, 28]
+	add	w2, w2, w1, lsr 11
+	and	w1, w1, 2047
+	stp	w1, w2, [x0, 24]
+.L939:
+	ldr	w1, [x0, 32]
+	cmp	w1, 1024
+	bls	.L940
+	ldr	w2, [x0, 36]
+	add	w2, w2, w1, lsr 10
+	and	w1, w1, 1023
+	stp	w1, w2, [x0, 32]
+.L940:
+	ldr	w1, [x0, 40]
+	cmp	w1, 1024
+	bls	.L937
+	ldr	w2, [x0, 44]
+	add	w2, w2, w1, lsr 10
+	and	w1, w1, 1023
+	stp	w1, w2, [x0, 40]
+.L937:
+	ret
+	.size	ftl_tmp_into_update, .-ftl_tmp_into_update
+	.section	.text.ftl_get_blk_list_in_sblk,"ax",@progbits
+	.align	2
+	.global	ftl_get_blk_list_in_sblk
+	.type	ftl_get_blk_list_in_sblk, %function
+ftl_get_blk_list_in_sblk:
+	adrp	x2, .LANCHOR7
+	and	w0, w0, 65535
+	mov	w7, 24
+	adrp	x8, .LANCHOR75
+	ldr	x2, [x2, #:lo12:.LANCHOR7]
+	add	x8, x8, :lo12:.LANCHOR75
+	mov	w3, 0
+	add	x2, x2, x0, uxth 2
+	ldrb	w13, [x2, 3]
+	adrp	x2, .LANCHOR80
+	ldrb	w11, [x2, #:lo12:.LANCHOR80]
+	adrp	x2, .LANCHOR76
+	ldrb	w6, [x2, #:lo12:.LANCHOR76]
+	adrp	x2, .LANCHOR32
+	ldrb	w2, [x2, #:lo12:.LANCHOR32]
+	sub	w7, w7, w2
+	and	w2, w6, 65535
+	mul	w0, w0, w2
+	sub	w2, w2, #1
+	sxth	w5, w2
+	and	w4, w0, 65535
+	mov	w0, 0
+.L943:
+	cmp	w3, w11
+	blt	.L947
+	sxtw	x2, w0
+	mov	w3, -1
+.L948:
+	cmp	w11, w2
+	bgt	.L949
+	ret
+.L947:
+	asr	w2, w13, w3
+	tbnz	x2, 0, .L944
+	sdiv	w2, w3, w6
+	ldrh	w10, [x8]
+	sbfiz	x12, x0, 1, 32
+	cmp	w6, 1
+	sub	w10, w7, w10
+	lsl	w2, w2, w10
+	add	w2, w4, w2
+	and	w2, w2, 65535
+	bhi	.L945
+.L950:
+	add	w0, w0, 1
+	strh	w2, [x1, x12]
+.L944:
+	add	w3, w3, 1
+	b	.L943
+.L945:
+	and	w10, w5, w3
+	add	w2, w2, w10
+	b	.L950
+.L949:
+	strh	w3, [x1, x2, lsl 1]
+	add	x2, x2, 1
+	b	.L948
+	.size	ftl_get_blk_list_in_sblk, .-ftl_get_blk_list_in_sblk
+	.section	.text.ftl_erase_phy_blk,"ax",@progbits
+	.align	2
+	.global	ftl_erase_phy_blk
+	.type	ftl_erase_phy_blk, %function
+ftl_erase_phy_blk:
+	stp	x29, x30, [sp, -48]!
+	and	w0, w0, 65535
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	mov	w21, w1
+	adrp	x1, .LANCHOR32
+	stp	x19, x20, [sp, 16]
+	adrp	x22, .LANCHOR111
+	ldrb	w19, [x1, #:lo12:.LANCHOR32]
+	mov	w1, 24
+	sub	w19, w1, w19
+	adrp	x1, .LANCHOR75
+	ldrh	w1, [x1, #:lo12:.LANCHOR75]
+	sub	w1, w19, w1
+	mov	w19, 1
+	lsl	w19, w19, w1
+	sub	w19, w19, #1
+	and	w19, w19, w0
+	asr	w20, w0, w1
+	adrp	x0, .LANCHOR81
+	sxth	w19, w19
+	ldrb	w0, [x0, #:lo12:.LANCHOR81]
+	cbz	w0, .L952
+	adrp	x0, .LANCHOR82
+	ldrb	w0, [x0, #:lo12:.LANCHOR82]
+	cbnz	w0, .L952
+	ldrh	w2, [x22, #:lo12:.LANCHOR111]
+	cmp	w21, 0
+	cset	w1, eq
+	mov	w0, w20
+	mul	w2, w2, w19
+	bl	flash_erase_block_en
+.L952:
+	ldrh	w2, [x22, #:lo12:.LANCHOR111]
+	mov	w1, w21
+	mov	w0, w20
+	ldp	x21, x22, [sp, 32]
+	mul	w2, w2, w19
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	b	flash_erase_block_en
+	.size	ftl_erase_phy_blk, .-ftl_erase_phy_blk
+	.section	.text.ftl_erase_sblk,"ax",@progbits
+	.align	2
+	.global	ftl_erase_sblk
+	.type	ftl_erase_sblk, %function
+ftl_erase_sblk:
+	stp	x29, x30, [sp, -176]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR7
+	stp	x25, x26, [sp, 64]
+	and	w26, w0, 65535
+	ldr	x0, [x23, #:lo12:.LANCHOR7]
+	adrp	x25, .LANCHOR112
+	stp	x21, x22, [sp, 32]
+	ubfiz	x22, x26, 2, 16
+	add	x0, x0, x22
+	stp	x27, x28, [sp, 80]
+	stp	x19, x20, [sp, 16]
+	adrp	x24, .LANCHOR76
+	mov	w20, w1
+	add	x25, x25, :lo12:.LANCHOR112
+	ldrb	w28, [x0, 3]
+	add	x24, x24, :lo12:.LANCHOR76
+	add	x27, x29, 112
+	mov	w19, 0
+.L958:
+	ldrb	w0, [x25]
+	cmp	w19, w0
+	bge	.L969
+	ldrb	w1, [x24]
+	adrp	x0, .LANCHOR111
+	mov	w21, 0
+	ldrh	w3, [x0, #:lo12:.LANCHOR111]
+	sub	w4, w1, #1
+	mov	w0, 0
+	mul	w6, w19, w1
+	mul	w5, w26, w1
+	b	.L970
+.L960:
+	add	w2, w0, w6
+	asr	w2, w28, w2
+	tbnz	x2, 0, .L959
+	and	w2, w0, w4
+	add	w2, w2, w5
+	mul	w2, w2, w3
+	str	w2, [x27, w21, sxtw 2]
+	add	w21, w21, 1
+.L959:
+	add	w0, w0, 1
+.L970:
+	cmp	w0, w1
+	blt	.L960
+	cmp	w1, 4
+	bne	.L961
+	mov	x3, 0
+.L962:
+	cmp	w21, w3
+	bgt	.L963
+.L964:
+	add	w19, w19, 1
+	b	.L958
+.L963:
+	ldr	w2, [x27, x3, lsl 2]
+	mov	w1, w20
+	str	x3, [x29, 104]
+	mov	w0, w19
+	bl	flash_erase_block_en
+	ldr	x3, [x29, 104]
+	add	x3, x3, 1
+	b	.L962
+.L961:
+	cmp	w21, 2
+	bne	.L965
+	adrp	x0, .LANCHOR81
+	ldrb	w0, [x0, #:lo12:.LANCHOR81]
+	cbz	w0, .L966
+	adrp	x0, .LANCHOR82
+	ldrb	w0, [x0, #:lo12:.LANCHOR82]
+	cbnz	w0, .L966
+	ldp	w2, w3, [x29, 112]
+	cmp	w20, 0
+	cset	w1, eq
+	mov	w0, w19
+	bl	flash_erase_duplane_block
+.L966:
+	ldp	w2, w3, [x29, 112]
+	mov	w1, w20
+	mov	w0, w19
+	bl	flash_erase_duplane_block
+	b	.L964
+.L965:
+	cmp	w21, 1
+	bne	.L964
+	adrp	x0, .LANCHOR81
+	ldrb	w0, [x0, #:lo12:.LANCHOR81]
+	cbz	w0, .L968
+	adrp	x0, .LANCHOR82
+	ldrb	w0, [x0, #:lo12:.LANCHOR82]
+	cbnz	w0, .L968
+	ldr	w2, [x29, 112]
+	cmp	w20, 0
+	cset	w1, eq
+	mov	w0, w19
+	bl	flash_erase_block_en
+.L968:
+	ldr	w2, [x29, 112]
+	mov	w1, w20
+	mov	w0, w19
+	bl	flash_erase_block_en
+	b	.L964
+.L969:
+	adrp	x2, .LANCHOR110
+	ldr	x3, [x23, #:lo12:.LANCHOR7]
+	cbnz	w20, .L971
+	ldrh	w1, [x3, x22]
+	add	w0, w1, 1
+	and	w0, w0, 2047
+	bfi	w1, w0, 0, 11
+	strh	w1, [x3, x22]
+	ldr	x1, [x2, #:lo12:.LANCHOR110]
+	ldr	w2, [x1, 84]
+	add	w2, w2, 1
+	str	w2, [x1, 84]
+	ldrh	w2, [x1, 96]
+	cmp	w2, w0
+	bge	.L973
+	strh	w0, [x1, 96]
+.L973:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 176
+	ret
+.L971:
+	ldr	w1, [x3, x22]
+	ubfx	x0, x1, 11, 8
+	add	w0, w0, 1
+	and	w0, w0, 255
+	bfi	w1, w0, 11, 8
+	str	w1, [x3, x22]
+	and	w0, w0, 65535
+	ldr	x1, [x2, #:lo12:.LANCHOR110]
+	ldr	w2, [x1, 80]
+	add	w2, w2, 1
+	str	w2, [x1, 80]
+	ldrh	w2, [x1, 98]
+	cmp	w2, w0
+	bcs	.L973
+	strh	w0, [x1, 98]
+	b	.L973
+	.size	ftl_erase_sblk, .-ftl_erase_sblk
+	.section	.text.ftl_alloc_sys_blk,"ax",@progbits
+	.align	2
+	.global	ftl_alloc_sys_blk
+	.type	ftl_alloc_sys_blk, %function
+ftl_alloc_sys_blk:
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR110
+	add	x29, sp, 0
+	ldr	x1, [x0, #:lo12:.LANCHOR110]
+	ldrh	w2, [x1, 136]
+	str	x19, [sp, 16]
+	mov	x19, x0
+	cmp	w2, 63
+	bls	.L983
+	strh	wzr, [x1, 136]
+.L983:
+	ldrh	w0, [x1, 112]
+	cbnz	w0, .L984
+	adrp	x1, .LANCHOR113
+	adrp	x0, .LC0
+	mov	w2, 1283
+	add	x1, x1, :lo12:.LANCHOR113
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L984:
+	ldr	x1, [x19, #:lo12:.LANCHOR110]
+	mov	w5, 65535
+.L987:
+	ldrh	w2, [x1, 136]
+.L985:
+	mov	w3, w2
+	cmp	w2, 63
+	ble	.L986
+	strh	wzr, [x1, 136]
+	b	.L987
+.L986:
+	add	x4, x2, 1
+	add	x0, x1, x4, lsl 1
+	ldrh	w0, [x0, 158]
+	cmp	w0, w5
+	bne	.L990
+	mov	x2, x4
+	b	.L985
+.L990:
+	add	x3, x1, x3, sxtw 1
+	mov	w4, -1
+	ldr	x19, [sp, 16]
+	strh	w4, [x3, 160]
+	strh	w2, [x1, 136]
+	ldrh	w2, [x1, 112]
+	sub	w2, w2, #1
+	strh	w2, [x1, 112]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	ftl_alloc_sys_blk, .-ftl_alloc_sys_blk
+	.section	.text.ftl_free_sys_blk,"ax",@progbits
+	.align	2
+	.global	ftl_free_sys_blk
+	.type	ftl_free_sys_blk, %function
+ftl_free_sys_blk:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w20, w0, 65535
+	adrp	x0, .LANCHOR110
+	mov	x19, x0
+	ldr	x1, [x0, #:lo12:.LANCHOR110]
+	ldrh	w2, [x1, 138]
+	cmp	w2, 63
+	bls	.L993
+	strh	wzr, [x1, 138]
+.L993:
+	ldrh	w0, [x1, 112]
+	cmp	w0, 63
+	bls	.L994
+	adrp	x1, .LANCHOR114
+	adrp	x0, .LC0
+	mov	w2, 1310
+	add	x1, x1, :lo12:.LANCHOR114
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L994:
+	ldr	x0, [x19, #:lo12:.LANCHOR110]
+	mov	w4, 65535
+.L997:
+	ldrh	w1, [x0, 138]
+.L995:
+	mov	w2, w1
+	cmp	w1, 63
+	ble	.L996
+	strh	wzr, [x0, 138]
+	b	.L997
+.L996:
+	add	x3, x1, 1
+	add	x5, x0, x3, lsl 1
+	ldrh	w5, [x5, 158]
+	cmp	w5, w4
+	bne	.L998
+	add	x2, x0, x2, sxtw 1
+	strh	w20, [x2, 160]
+	strh	w1, [x0, 138]
+	ldrh	w1, [x0, 112]
+	ldp	x19, x20, [sp, 16]
+	add	w1, w1, 1
+	strh	w1, [x0, 112]
+	ldp	x29, x30, [sp], 32
+	ret
+.L998:
+	mov	x1, x3
+	b	.L995
+	.size	ftl_free_sys_blk, .-ftl_free_sys_blk
+	.section	.text.ftl_info_data_recovery,"ax",@progbits
+	.align	2
+	.global	ftl_info_data_recovery
+	.type	ftl_info_data_recovery, %function
+ftl_info_data_recovery:
+	ldrh	w2, [x0]
+	mov	w1, 65535
+	cmp	w2, w1
+	beq	.L1011
+	stp	x29, x30, [sp, -48]!
+	adrp	x1, .LANCHOR7
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	ubfiz	x19, x2, 2, 16
+	ldr	x20, [x1, #:lo12:.LANCHOR7]
+	str	x21, [sp, 32]
+	add	x21, x20, x19
+	ldrb	w1, [x21, 2]
+	tst	w1, 224
+	bne	.L1001
+	ldrb	w0, [x0, 4]
+	bfi	w1, w0, 5, 3
+	strb	w1, [x21, 2]
+	mov	w0, w2
+	bl	zftl_remove_free_node
+	ldrb	w0, [x21, 2]
+	adrp	x1, .LANCHOR110
+	ldr	x3, [x1, #:lo12:.LANCHOR110]
+	tbz	x0, 3, .L1005
+	ldrh	w2, [x3, 116]
+	sub	w2, w2, #1
+	strh	w2, [x3, 116]
+.L1006:
+	and	w0, w0, 224
+	cmp	w0, 160
+	bne	.L1008
+	ldr	w0, [x20, x19]
+	ldr	x1, [x1, #:lo12:.LANCHOR110]
+	ubfx	x2, x0, 11, 8
+	add	w2, w2, 1
+	bfi	w0, w2, 11, 8
+	str	w0, [x20, x19]
+	ldrh	w0, [x1, 120]
+	sub	w0, w0, #1
+	strh	w0, [x1, 120]
+.L1001:
+	ldp	x19, x20, [sp, 16]
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
+.L1005:
+	tst	w0, 24
+	bne	.L1007
+	ldrh	w2, [x3, 114]
+	sub	w2, w2, #1
+	strh	w2, [x3, 114]
+	b	.L1006
+.L1007:
+	ldrh	w2, [x3, 118]
+	sub	w2, w2, #1
+	strh	w2, [x3, 118]
+	b	.L1006
+.L1008:
+	ldrh	w2, [x20, x19]
+	cmp	w0, 64
+	add	w3, w2, 1
+	bfi	w2, w3, 0, 11
+	strh	w2, [x20, x19]
+	bne	.L1009
+	ldr	x1, [x1, #:lo12:.LANCHOR110]
+	ldrh	w0, [x1, 122]
+	sub	w0, w0, #1
+	strh	w0, [x1, 122]
+	b	.L1001
+.L1009:
+	cmp	w0, 96
+	bne	.L1001
+	ldr	x1, [x1, #:lo12:.LANCHOR110]
+	ldrh	w0, [x1, 124]
+	sub	w0, w0, #1
+	strh	w0, [x1, 124]
+	b	.L1001
+.L1011:
+	ret
+	.size	ftl_info_data_recovery, .-ftl_info_data_recovery
+	.section	.text.ftl_get_ppa_from_index,"ax",@progbits
+	.align	2
+	.global	ftl_get_ppa_from_index
+	.type	ftl_get_ppa_from_index, %function
+ftl_get_ppa_from_index:
+	stp	x29, x30, [sp, -32]!
+	adrp	x1, .LANCHOR10
+	adrp	x3, .LANCHOR80
+	and	w0, w0, 65535
+	add	x29, sp, 0
+	ldr	x2, [x1, #:lo12:.LANCHOR10]
+	adrp	x1, .LANCHOR95
+	ldrb	w3, [x3, #:lo12:.LANCHOR80]
+	ldrh	w1, [x1, #:lo12:.LANCHOR95]
+	stp	x19, x20, [sp, 16]
+	mul	w1, w1, w3
+	cmp	w0, w1
+	bge	.L1015
+	add	x2, x2, 16
+.L1016:
+	ldrb	w1, [x2, 9]
+	sdiv	w19, w0, w1
+	msub	w0, w19, w1, w0
+	add	x0, x2, x0, uxth 1
+	ldrh	w20, [x0, 16]
+	mov	w0, 65535
+	cmp	w20, w0
+	bne	.L1017
+	adrp	x1, .LANCHOR115
+	adrp	x0, .LC0
+	mov	w2, 1937
+	add	x1, x1, :lo12:.LANCHOR115
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1017:
+	adrp	x0, .LANCHOR111
+	ldrh	w0, [x0, #:lo12:.LANCHOR111]
+	madd	w0, w0, w20, w19
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L1015:
+	sub	w0, w0, w1
+	add	x2, x2, 48
+	and	w0, w0, 65535
+	b	.L1016
+	.size	ftl_get_ppa_from_index, .-ftl_get_ppa_from_index
+	.section	.text.lpa_hash_get_ppa,"ax",@progbits
+	.align	2
+	.global	lpa_hash_get_ppa
+	.type	lpa_hash_get_ppa, %function
+lpa_hash_get_ppa:
+	and	x2, x0, 255
+	adrp	x1, .LANCHOR116
+	add	x1, x1, :lo12:.LANCHOR116
+	mov	w3, 65535
+	ldrh	w1, [x1, x2, lsl 1]
+	adrp	x2, .LANCHOR117
+	ldr	x4, [x2, #:lo12:.LANCHOR117]
+	adrp	x2, .LANCHOR118
+	ldr	x5, [x2, #:lo12:.LANCHOR118]
+.L1020:
+	cmp	w1, w3
+	bne	.L1022
+	mov	w0, -1
+	ret
+.L1022:
+	uxtw	x2, w1
+	ldr	w6, [x4, x2, lsl 2]
+	cmp	w0, w6
+	bne	.L1021
+	mov	w0, w1
+	b	ftl_get_ppa_from_index
+.L1021:
+	ldrh	w1, [x5, x2, lsl 1]
+	b	.L1020
+	.size	lpa_hash_get_ppa, .-lpa_hash_get_ppa
+	.section	.text.ftl_get_new_free_page,"ax",@progbits
+	.align	2
+	.global	ftl_get_new_free_page
+	.type	ftl_get_new_free_page, %function
+ftl_get_new_free_page:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	ldrh	w1, [x0]
+	str	x19, [sp, 16]
+	mov	x19, x0
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L1024
+	adrp	x1, .LANCHOR119
+	adrp	x0, .LC0
+	mov	w2, 2080
+	add	x1, x1, :lo12:.LANCHOR119
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1024:
+	adrp	x0, .LANCHOR95
+	ldrh	w1, [x19, 2]
+	ldrh	w0, [x0, #:lo12:.LANCHOR95]
+	cmp	w1, w0
+	bne	.L1025
+	adrp	x1, .LANCHOR119
+	adrp	x0, .LC0
+	mov	w2, 2081
+	add	x1, x1, :lo12:.LANCHOR119
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1025:
+	ldrh	w0, [x19, 6]
+	cbnz	w0, .L1026
+	adrp	x1, .LANCHOR119
+	adrp	x0, .LC0
+	mov	w2, 2082
+	add	x1, x1, :lo12:.LANCHOR119
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1026:
+	ldrb	w0, [x19, 5]
+	mov	w2, 65535
+	add	x0, x0, 8
+	ldrh	w3, [x19, x0, lsl 1]
+	adrp	x0, .LANCHOR80
+	ldrb	w4, [x0, #:lo12:.LANCHOR80]
+.L1027:
+	cmp	w3, w2
+	ldrb	w1, [x19, 5]
+	beq	.L1029
+	adrp	x0, .LANCHOR111
+	add	w1, w1, 1
+	and	w1, w1, 255
+	ldrh	w2, [x19, 2]
+	ldrh	w0, [x0, #:lo12:.LANCHOR111]
+	cmp	w4, w1
+	strb	w1, [x19, 5]
+	mul	w0, w0, w3
+	ldrh	w3, [x19, 6]
+	sub	w3, w3, #1
+	strh	w3, [x19, 6]
+	ldrh	w3, [x19, 10]
+	orr	w0, w0, w2
+	add	w3, w3, 1
+	strh	w3, [x19, 10]
+	bne	.L1023
+	add	w2, w2, 1
+	strb	wzr, [x19, 5]
+	strh	w2, [x19, 2]
+.L1023:
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L1029:
+	add	w1, w1, 1
+	and	w1, w1, 255
+	strb	w1, [x19, 5]
+	cmp	w1, w4
+	bne	.L1028
+	ldrh	w0, [x19, 2]
+	strb	wzr, [x19, 5]
+	add	w0, w0, 1
+	strh	w0, [x19, 2]
+.L1028:
+	ldrb	w0, [x19, 5]
+	add	x0, x0, 8
+	ldrh	w3, [x19, x0, lsl 1]
+	b	.L1027
+	.size	ftl_get_new_free_page, .-ftl_get_new_free_page
+	.section	.text.ftl_ext_alloc_new_blk,"ax",@progbits
+	.align	2
+	.global	ftl_ext_alloc_new_blk
+	.type	ftl_ext_alloc_new_blk, %function
+ftl_ext_alloc_new_blk:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	bl	ftl_alloc_sys_blk
+	and	w0, w0, 65535
+	mov	w1, 65533
+	mov	w19, w0
+	sub	w0, w0, #1
+	cmp	w1, w0, uxth
+	bcs	.L1033
+	adrp	x1, .LANCHOR120
+	adrp	x0, .LC0
+	mov	w2, 2117
+	add	x1, x1, :lo12:.LANCHOR120
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1033:
+	adrp	x20, .LANCHOR110
+	mov	w1, 0
+	mov	w0, w19
+	bl	ftl_erase_phy_blk
+	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	ldrh	w0, [x0, 130]
+	bl	ftl_free_sys_blk
+	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	strh	w19, [x0, 130]
+	strh	wzr, [x0, 140]
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	ftl_ext_alloc_new_blk, .-ftl_ext_alloc_new_blk
+	.section	.text.ftl_total_vpn_update,"ax",@progbits
+	.align	2
+	.global	ftl_total_vpn_update
+	.type	ftl_total_vpn_update, %function
+ftl_total_vpn_update:
+	adrp	x2, .LANCHOR121
+	mov	x3, x2
+	ldrh	w1, [x2, #:lo12:.LANCHOR121]
+	cmp	w1, 4
+	bhi	.L1036
+	cbnz	w0, .L1036
+	add	w1, w1, 1
+	strh	w1, [x2, #:lo12:.LANCHOR121]
+	ret
+.L1036:
+	adrp	x0, .LANCHOR6
+	strh	wzr, [x3, #:lo12:.LANCHOR121]
+	mov	x1, 0
+	mov	w2, 0
+	ldrh	w5, [x0, #:lo12:.LANCHOR6]
+	adrp	x0, .LANCHOR9
+	mov	w8, 65535
+	ldr	x6, [x0, #:lo12:.LANCHOR9]
+	adrp	x0, .LANCHOR7
+	ldr	x7, [x0, #:lo12:.LANCHOR7]
+	mov	w0, 0
+.L1038:
+	cmp	w5, w1, uxth
+	bhi	.L1041
+	adrp	x1, .LANCHOR10
+	ldr	x1, [x1, #:lo12:.LANCHOR10]
+	str	w2, [x1, 524]
+	adrp	x2, .LANCHOR110
+	str	w0, [x1, 528]
+	ldr	x2, [x2, #:lo12:.LANCHOR110]
+	ldrh	w2, [x2, 120]
+	cbz	w2, .L1035
+	udiv	w0, w0, w2
+	str	w0, [x1, 532]
+.L1035:
+	ret
+.L1041:
+	ldrh	w3, [x6, x1, lsl 1]
+	cmp	w3, w8
+	beq	.L1039
+	add	x4, x7, x1, lsl 2
+	ldrb	w4, [x4, 2]
+	and	w4, w4, 224
+	cmp	w4, 160
+	bne	.L1040
+	add	w0, w0, w3
+.L1039:
+	add	x1, x1, 1
+	b	.L1038
+.L1040:
+	add	w2, w2, w3
+	b	.L1039
+	.size	ftl_total_vpn_update, .-ftl_total_vpn_update
+	.section	.text.ftl_vpn_update,"ax",@progbits
+	.align	2
+	.global	ftl_vpn_update
+	.type	ftl_vpn_update, %function
+ftl_vpn_update:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	and	w19, w0, 65535
+	mov	w0, w19
+	bl	zftl_list_update_data_list
+	adrp	x0, .LANCHOR9
+	ubfiz	x19, x19, 1, 16
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrh	w0, [x0, x19]
+	cbnz	w0, .L1048
+	adrp	x1, .LANCHOR122
+	mov	w0, 1
+	str	w0, [x1, #:lo12:.LANCHOR122]
+.L1046:
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L1048:
+	mov	w0, 0
+	b	.L1046
+	.size	ftl_vpn_update, .-ftl_vpn_update
+	.section	.text.ftl_vpn_decrement,"ax",@progbits
+	.align	2
+	.global	ftl_vpn_decrement
+	.type	ftl_vpn_decrement, %function
+ftl_vpn_decrement:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w19, w0, 65535
+	mov	w0, 65535
+	cmp	w19, w0
+	beq	.L1051
+	adrp	x0, .LANCHOR9
+	uxtw	x1, w19
+	lsl	x2, x1, 1
+	ldr	x3, [x0, #:lo12:.LANCHOR9]
+	ldrh	w0, [x3, x2]
+	cbnz	w0, .L1052
+	adrp	x0, .LANCHOR7
+	mov	w2, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR7]
+	add	x1, x0, x1, lsl 2
+	adrp	x0, .LC65
+	add	x0, x0, :lo12:.LC65
+	ldrb	w3, [x1, 2]
+	mov	w1, w19
+	ubfx	x3, x3, 5, 3
+	bl	printf
+.L1057:
+	mov	w0, 0
+	b	.L1050
+.L1052:
+	sub	w0, w0, #1
+	strh	w0, [x3, x2]
+.L1051:
+	adrp	x20, .LANCHOR73
+	ldrh	w0, [x20, #:lo12:.LANCHOR73]
+	cmp	w19, w0
+	beq	.L1057
+	mov	w1, 65535
+	cmp	w0, w1
+	bne	.L1054
+	strh	w19, [x20, #:lo12:.LANCHOR73]
+	b	.L1057
+.L1054:
+	bl	ftl_vpn_update
+	cmp	w0, 0
+	adrp	x1, .LANCHOR123
+	cset	w0, ne
+	ldrh	w3, [x20, #:lo12:.LANCHOR73]
+	ldrh	w2, [x1, #:lo12:.LANCHOR123]
+	strh	w19, [x20, #:lo12:.LANCHOR73]
+	add	w2, w2, 1
+	and	w2, w2, 65535
+	cmp	w2, 7
+	csel	w2, w2, wzr, ls
+	strh	w2, [x1, #:lo12:.LANCHOR123]
+	and	x2, x2, 65535
+	adrp	x1, .LANCHOR74
+	add	x1, x1, :lo12:.LANCHOR74
+	strh	w3, [x1, x2, lsl 1]
+.L1050:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	ftl_vpn_decrement, .-ftl_vpn_decrement
+	.section	.text.lpa_hash_update_ppa,"ax",@progbits
+	.align	2
+	.global	lpa_hash_update_ppa
+	.type	lpa_hash_update_ppa, %function
+lpa_hash_update_ppa:
+	adrp	x3, .LANCHOR116
+	and	x5, x0, 255
+	add	x4, x3, :lo12:.LANCHOR116
+	mov	w7, 65535
+	and	w2, w2, 65535
+	mov	w12, w7
+	ldrh	w6, [x4, x5, lsl 1]
+	adrp	x4, .LANCHOR117
+	ldr	x8, [x4, #:lo12:.LANCHOR117]
+	adrp	x4, .LANCHOR118
+	ldr	x4, [x4, #:lo12:.LANCHOR118]
+.L1060:
+	cmp	w6, w12
+	beq	.L1064
+	uxtw	x11, w6
+	lsl	x10, x11, 2
+	add	x13, x8, x10
+	ldr	w10, [x8, x10]
+	cmp	w0, w10
+	lsl	x10, x11, 1
+	bne	.L1061
+	mov	w6, -1
+	str	w6, [x13]
+	cmp	w7, w12
+	bne	.L1062
+	add	x6, x3, :lo12:.LANCHOR116
+	ldrh	w7, [x4, x10]
+	strh	w7, [x6, x5, lsl 1]
+.L1063:
+	mov	w6, -1
+	strh	w6, [x4, x11, lsl 1]
+.L1064:
+	uxtw	x6, w2
+	add	x3, x3, :lo12:.LANCHOR116
+	cmn	w1, #1
+	str	w0, [x8, x6, lsl 2]
+	ldrh	w0, [x3, x5, lsl 1]
+	strh	w2, [x3, x5, lsl 1]
+	strh	w0, [x4, x6, lsl 1]
+	beq	.L1071
+	stp	x29, x30, [sp, -16]!
+	adrp	x0, .LANCHOR75
+	add	x29, sp, 0
+	ldrh	w3, [x0, #:lo12:.LANCHOR75]
+	adrp	x0, .LANCHOR32
+	ldrb	w2, [x0, #:lo12:.LANCHOR32]
+	mov	w0, 24
+	lsr	w1, w1, w3
+	sub	w0, w0, w2
+	sub	w2, w0, w3
+	mov	w0, 1
+	lsl	w0, w0, w2
+	sub	w0, w0, #1
+	and	w1, w0, w1
+	adrp	x0, .LANCHOR76
+	ldrb	w0, [x0, #:lo12:.LANCHOR76]
+	udiv	w0, w1, w0
+	bl	ftl_vpn_decrement
+	mov	w0, -1
+	ldp	x29, x30, [sp], 16
+	ret
+.L1062:
+	ldrh	w6, [x4, x10]
+	strh	w6, [x4, w7, uxtw 1]
+	b	.L1063
+.L1061:
+	mov	w7, w6
+	ldrh	w6, [x4, x10]
+	b	.L1060
+.L1071:
+	mov	w0, -1
+	ret
+	.size	lpa_hash_update_ppa, .-lpa_hash_update_ppa
+	.section	.text.ftl_mask_bad_block,"ax",@progbits
+	.align	2
+	.global	ftl_mask_bad_block
+	.type	ftl_mask_bad_block, %function
+ftl_mask_bad_block:
+	stp	x29, x30, [sp, -32]!
+	adrp	x1, .LANCHOR32
+	mov	w6, 24
+	mov	w4, 1
+	add	x29, sp, 0
+	ldrb	w1, [x1, #:lo12:.LANCHOR32]
+	stp	x19, x20, [sp, 16]
+	sub	w6, w6, w1
+	lsl	w1, w4, w1
+	sub	w1, w1, #1
+	lsr	w2, w0, w6
+	and	w1, w1, w2
+	adrp	x2, .LANCHOR76
+	and	w1, w1, 255
+	ldrb	w5, [x2, #:lo12:.LANCHOR76]
+	cmp	w5, 1
+	mul	w2, w1, w5
+	and	w19, w2, 255
+	adrp	x2, .LANCHOR75
+	ldrh	w3, [x2, #:lo12:.LANCHOR75]
+	lsr	w0, w0, w3
+	sub	w3, w6, w3
+	lsl	w3, w4, w3
+	sub	w3, w3, #1
+	and	w3, w3, w0
+	and	w4, w3, 65535
+	udiv	w3, w3, w5
+	and	w20, w3, 65535
+	bls	.L1075
+	sub	w2, w5, #1
+	and	w2, w2, w4
+	add	w2, w19, w2
+	and	w19, w2, 255
+.L1075:
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 14, .L1076
+	adrp	x0, .LC66
+	and	w3, w3, 65535
+	mov	w2, w19
+	add	x0, x0, :lo12:.LC66
+	bl	printf
+.L1076:
+	adrp	x0, .LANCHOR6
+	ldrh	w0, [x0, #:lo12:.LANCHOR6]
+	cmp	w0, w20
+	bls	.L1074
+	adrp	x0, .LANCHOR7
+	mov	w2, 1
+	lsl	w2, w2, w19
+	ldr	x0, [x0, #:lo12:.LANCHOR7]
+	add	x20, x0, x20, uxth 2
+	ldrb	w19, [x20, 3]
+	orr	w2, w2, w19
+	strb	w2, [x20, 3]
+.L1074:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	ftl_mask_bad_block, .-ftl_mask_bad_block
+	.section	.text.gc_free_bad_sblk,"ax",@progbits
+	.align	2
+	.global	gc_free_bad_sblk
+	.type	gc_free_bad_sblk, %function
+gc_free_bad_sblk:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	and	w23, w0, 65535
+	str	x27, [sp, 80]
+	adrp	x27, .LANCHOR71
+	add	x0, x27, :lo12:.LANCHOR71
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	stp	x25, x26, [sp, 64]
+	ldr	w0, [x0, 2120]
+	cbz	w0, .L1097
+	adrp	x22, .LC67
+	mov	w24, 20041
+	add	x22, x22, :lo12:.LC67
+	mov	w26, 0
+	movk	w24, 0x444b, lsl 16
+.L1084:
+	adrp	x0, .LANCHOR80
+	ldrb	w0, [x0, #:lo12:.LANCHOR80]
+	cmp	w0, w26
+	bhi	.L1094
+.L1097:
+	mov	w0, 0
+	ldr	x27, [sp, 80]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	ret
+.L1094:
+	adrp	x0, .LANCHOR76
+	adrp	x1, .LANCHOR32
+	adrp	x21, .LANCHOR75
+	ldrb	w2, [x0, #:lo12:.LANCHOR76]
+	ldrb	w3, [x1, #:lo12:.LANCHOR32]
+	mov	w1, 24
+	and	w0, w2, 65535
+	cmp	w2, 1
+	sub	w1, w1, w3
+	ldrh	w3, [x21, #:lo12:.LANCHOR75]
+	sdiv	w19, w26, w2
+	sub	w1, w1, w3
+	lsl	w19, w19, w1
+	madd	w19, w23, w0, w19
+	and	w19, w19, 65535
+	bls	.L1085
+	sub	w0, w0, #1
+	and	w0, w0, w26
+	add	w19, w19, w0
+	and	w19, w19, 65535
+.L1085:
+	adrp	x25, .LANCHOR124
+	add	x25, x25, :lo12:.LANCHOR124
+	mov	w20, 0
+.L1086:
+	add	x0, x27, :lo12:.LANCHOR71
+	ldr	w1, [x0, 2120]
+	cmp	w20, w1
+	bcc	.L1093
+	add	w26, w26, 1
+	and	w26, w26, 65535
+	b	.L1084
+.L1093:
+	add	x0, x0, x20, sxtw 1
+	ldrh	w0, [x0, 2124]
+	cmp	w0, w19
+	bne	.L1087
+	mov	w1, w19
+	mov	x0, x22
+	bl	printf
+	ldrb	w0, [x25]
+	cbnz	w0, .L1088
+	adrp	x0, .LANCHOR81
+	ldrb	w0, [x0, #:lo12:.LANCHOR81]
+	cbz	w0, .L1089
+.L1088:
+	adrp	x0, .LANCHOR110
+	ldr	x0, [x0, #:lo12:.LANCHOR110]
+	ldr	w0, [x0, 156]
+	cmp	w0, w24
+	beq	.L1090
+.L1089:
+	ldrh	w0, [x21, #:lo12:.LANCHOR75]
+	lsl	w0, w19, w0
+	bl	ftl_mask_bad_block
+.L1090:
+	add	x1, x27, :lo12:.LANCHOR71
+	mov	w0, w20
+	ldr	w2, [x1, 2120]
+.L1091:
+	cmp	w0, w2
+	bcc	.L1092
+	add	x0, x27, :lo12:.LANCHOR71
+	sub	w2, w2, #1
+	str	w2, [x0, 2120]
+.L1087:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L1086
+.L1092:
+	add	w3, w0, 1
+	add	x0, x1, x0, sxtw 1
+	add	x4, x1, x3, sxtw 1
+	ldrh	w4, [x4, 2124]
+	strh	w4, [x0, 2124]
+	and	w0, w3, 65535
+	b	.L1091
+	.size	gc_free_bad_sblk, .-gc_free_bad_sblk
+	.section	.text.ftl_free_sblk,"ax",@progbits
+	.align	2
+	.global	ftl_free_sblk
+	.type	ftl_free_sblk, %function
+ftl_free_sblk:
+	stp	x29, x30, [sp, -64]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR7
+	and	x24, x0, 65535
+	stp	x19, x20, [sp, 16]
+	ldr	x3, [x23, #:lo12:.LANCHOR7]
+	lsl	x19, x24, 2
+	stp	x21, x22, [sp, 32]
+	mov	x21, x24
+	add	x20, x3, x19
+	ldrb	w0, [x20, 2]
+	ubfx	x22, x0, 5, 3
+	tbz	x0, 3, .L1104
+	adrp	x2, .LANCHOR110
+	ldrh	w1, [x3, x19]
+	adrp	x8, .LANCHOR125
+	ldr	x7, [x2, #:lo12:.LANCHOR110]
+	and	w1, w1, 2047
+	ldr	w2, [x3, x19]
+	ldrh	w8, [x8, #:lo12:.LANCHOR125]
+	ldrh	w4, [x7, 74]
+	ubfx	x5, x2, 11, 8
+	adrp	x2, .LANCHOR8
+	add	w4, w1, w4
+	ldrh	w2, [x2, #:lo12:.LANCHOR8]
+	and	w6, w4, 65535
+	ldrh	w4, [x7, 72]
+	add	w4, w5, w4
+	udiv	w7, w6, w2
+	and	w4, w4, 65535
+	add	w7, w7, w4
+	cmp	w7, w8
+	ble	.L1105
+	adrp	x4, .LANCHOR101
+	adrp	x7, .LANCHOR105
+	ldrh	w6, [x4, #:lo12:.LANCHOR101]
+	adrp	x4, .LANCHOR93
+	ldrh	w7, [x7, #:lo12:.LANCHOR105]
+	ldrh	w4, [x4, #:lo12:.LANCHOR93]
+	add	w6, w6, 7
+	add	w4, w4, w7
+	cmp	w6, w4
+	blt	.L1106
+.L1111:
+	mov	w4, 2
+	bfi	w0, w4, 3, 2
+	b	.L1122
+.L1106:
+	adrp	x4, .LANCHOR98
+	adrp	x7, .LANCHOR103
+	ldrh	w6, [x4, #:lo12:.LANCHOR98]
+	adrp	x4, .LANCHOR97
+	ldrh	w7, [x7, #:lo12:.LANCHOR103]
+	ldrh	w4, [x4, #:lo12:.LANCHOR97]
+	add	w6, w6, 7
+	add	w4, w4, w7
+	adrp	x7, .LANCHOR99
+	ldrh	w7, [x7, #:lo12:.LANCHOR99]
+	add	w4, w4, w7
+	cmp	w6, w4
+	blt	.L1111
+.L1124:
+	and	w0, w0, -25
+.L1122:
+	strb	w0, [x20, 2]
+.L1107:
+	ldrb	w0, [x20, 2]
+	ands	w0, w0, 24
+	bne	.L1112
+	mul	w2, w5, w2
+	ldrh	w0, [x3, x19]
+	add	w2, w2, w2, lsl 1
+	add	w1, w1, w2, lsr 2
+	lsr	w2, w5, 3
+	bfi	w0, w1, 0, 11
+	strh	w0, [x3, x19]
+	ldr	w0, [x3, x19]
+	bfi	w0, w2, 11, 8
+	str	w0, [x3, x19]
+.L1113:
+	mov	w0, w21
+	bl	zftl_remove_data_node
+	ldr	x0, [x23, #:lo12:.LANCHOR7]
+	add	w22, w22, 6
+	and	w22, w22, 7
+	add	x19, x0, x19
+	cmp	w22, 4
+	ldrb	w0, [x19, 2]
+	and	w0, w0, 31
+	strb	w0, [x19, 2]
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	strh	wzr, [x0, x24, lsl 1]
+	bhi	.L1116
+	mov	w0, w21
+	bl	gc_free_bad_sblk
+.L1116:
+	ldrb	w0, [x20, 2]
+	tbz	x0, 3, .L1117
+	adrp	x0, .LANCHOR10
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	ldrh	w1, [x0, 586]
+	cmp	w1, w21
+	bne	.L1117
+	mov	w1, -1
+	ldrh	w2, [x0, 590]
+	strh	w1, [x0, 586]
+	mov	w1, 65535
+	cmp	w2, w1
+	bne	.L1117
+	strh	w21, [x0, 590]
+	mov	w1, w21
+	ldp	x19, x20, [sp, 16]
+	adrp	x0, .LC68
+	ldp	x21, x22, [sp, 32]
+	add	x0, x0, :lo12:.LC68
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	b	printf
+.L1105:
+	madd	w4, w2, w4, w6
+	adrp	x6, .LANCHOR126
+	ldrh	w6, [x6, #:lo12:.LANCHOR126]
+	cmp	w4, w6
+	ble	.L1107
+	adrp	x4, .LANCHOR98
+	adrp	x7, .LANCHOR103
+	ldrh	w6, [x4, #:lo12:.LANCHOR98]
+	adrp	x4, .LANCHOR97
+	ldrh	w7, [x7, #:lo12:.LANCHOR103]
+	ldrh	w4, [x4, #:lo12:.LANCHOR97]
+	add	w4, w4, w7
+	adrp	x7, .LANCHOR99
+	ldrh	w7, [x7, #:lo12:.LANCHOR99]
+	add	w4, w4, w7
+	add	w7, w6, 7
+	cmp	w7, w4
+	bge	.L1124
+	adrp	x7, .LANCHOR101
+	adrp	x10, .LANCHOR105
+	ldrh	w8, [x7, #:lo12:.LANCHOR101]
+	adrp	x7, .LANCHOR93
+	ldrh	w10, [x10, #:lo12:.LANCHOR105]
+	ldrh	w7, [x7, #:lo12:.LANCHOR93]
+	add	w8, w8, 7
+	add	w7, w7, w10
+	cmp	w8, w7
+	bge	.L1111
+	add	w6, w6, 23
+	cmp	w4, w6
+	bgt	.L1111
+	b	.L1124
+.L1112:
+	cmp	w0, 16
+	bne	.L1113
+	sdiv	w2, w1, w2
+	ldr	w0, [x3, x19]
+	add	w2, w2, w2, lsl 1
+	add	w2, w5, w2, lsr 2
+.L1123:
+	bfi	w0, w2, 11, 8
+	asr	w1, w1, 5
+	str	w0, [x3, x19]
+	bfi	w0, w1, 0, 11
+	strh	w0, [x3, x19]
+	b	.L1113
+.L1104:
+	tst	w0, 24
+	bne	.L1113
+	adrp	x1, .LANCHOR107
+	ldrh	w1, [x1, #:lo12:.LANCHOR107]
+	cbnz	w1, .L1113
+	adrp	x1, .LANCHOR105
+	ldrh	w4, [x1, #:lo12:.LANCHOR105]
+	cmp	w4, 15
+	bhi	.L1113
+	adrp	x1, .LANCHOR97
+	adrp	x2, .LANCHOR103
+	ldrh	w1, [x1, #:lo12:.LANCHOR97]
+	ldrh	w2, [x2, #:lo12:.LANCHOR103]
+	add	w1, w1, w2
+	adrp	x2, .LANCHOR99
+	ldrh	w2, [x2, #:lo12:.LANCHOR99]
+	add	w1, w1, w2
+	adrp	x2, .LANCHOR98
+	ldrh	w2, [x2, #:lo12:.LANCHOR98]
+	add	w2, w2, 16
+	cmp	w1, w2
+	ble	.L1113
+	adrp	x1, .LANCHOR101
+	ldrh	w2, [x1, #:lo12:.LANCHOR101]
+	adrp	x1, .LANCHOR93
+	ldrh	w1, [x1, #:lo12:.LANCHOR93]
+	add	w2, w2, 7
+	add	w1, w1, w4
+	cmp	w2, w1
+	blt	.L1113
+	mov	w1, 2
+	bfi	w0, w1, 3, 2
+	strb	w0, [x20, 2]
+	adrp	x0, .LANCHOR8
+	ldrh	w1, [x3, x19]
+	ldrh	w0, [x0, #:lo12:.LANCHOR8]
+	and	w1, w1, 2047
+	sdiv	w0, w1, w0
+	add	w2, w0, w0, lsl 1
+	ldr	w0, [x3, x19]
+	ubfx	x4, x0, 11, 8
+	add	w2, w4, w2, lsr 2
+	b	.L1123
+.L1117:
+	mov	w0, w21
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	b	zftl_insert_free_list
+	.size	ftl_free_sblk, .-ftl_free_sblk
+	.section	.text.gc_free_src_blk,"ax",@progbits
+	.align	2
+	.global	gc_free_src_blk
+	.type	gc_free_src_blk, %function
+gc_free_src_blk:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR71
+	stp	x23, x24, [sp, 48]
+	adrp	x22, .LC69
+	adrp	x23, .LANCHOR9
+	add	x21, x21, :lo12:.LANCHOR71
+	mov	x24, x23
+	add	x22, x22, :lo12:.LC69
+	stp	x19, x20, [sp, 16]
+	mov	w20, 0
+	stp	x25, x26, [sp, 64]
+.L1126:
+	ldrh	w0, [x21, 56]
+	cmp	w0, w20
+	bhi	.L1140
+	strh	wzr, [x21, 56]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L1140:
+	add	x0, x21, x20, sxtw 1
+	ldrh	w25, [x0, 58]
+	ldr	x0, [x23, #:lo12:.LANCHOR9]
+	mov	x19, x25
+	lsl	x26, x25, 1
+	ldrh	w2, [x0, x26]
+	cbz	w2, .L1127
+	mov	w1, w25
+	mov	x0, x22
+	bl	printf
+.L1127:
+	ldr	x0, [x24, #:lo12:.LANCHOR9]
+	strh	wzr, [x0, x26]
+	adrp	x0, .LANCHOR7
+	ldr	x0, [x0, #:lo12:.LANCHOR7]
+	add	x25, x0, x25, lsl 2
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L1128
+	ldrb	w2, [x25, 2]
+	adrp	x0, .LC70
+	mov	w1, w19
+	add	x0, x0, :lo12:.LC70
+	ubfx	x2, x2, 5, 3
+	bl	printf
+.L1128:
+	ldrb	w0, [x25, 2]
+	and	w1, w0, 224
+	cmp	w1, 224
+	beq	.L1129
+	tst	w0, 192
+	bne	.L1130
+.L1129:
+	adrp	x1, .LANCHOR127
+	adrp	x0, .LC0
+	mov	w2, 1362
+	add	x1, x1, :lo12:.LANCHOR127
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1130:
+	mov	w0, w19
+	bl	ftl_free_sblk
+	adrp	x0, .LANCHOR10
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	ldrh	w2, [x0, 124]
+	cbz	w2, .L1131
+	add	x3, x0, 392
+	mov	w1, 0
+.L1133:
+	ldrh	w4, [x3]
+	cmp	w4, w19
+	bne	.L1132
+	add	x1, x0, x1, sxtw 1
+	mov	w3, -1
+	sub	w2, w2, #1
+	strh	w3, [x1, 392]
+	strh	w2, [x0, 124]
+.L1131:
+	ldrh	w2, [x0, 120]
+	cbz	w2, .L1134
+	add	x3, x0, 136
+	mov	w1, 0
+.L1136:
+	ldrh	w4, [x3]
+	cmp	w4, w19
+	bne	.L1135
+	add	x1, x0, x1, sxtw 1
+	mov	w3, -1
+	sub	w2, w2, #1
+	strh	w3, [x1, 136]
+	strh	w2, [x0, 120]
+.L1134:
+	ldrh	w2, [x0, 122]
+	cbz	w2, .L1137
+	add	x3, x0, 264
+	mov	w1, 0
+.L1139:
+	ldrh	w4, [x3]
+	cmp	w4, w19
+	bne	.L1138
+	add	x1, x0, x1, sxtw 1
+	mov	w3, -1
+	sub	w2, w2, #1
+	strh	w3, [x1, 264]
+	strh	w2, [x0, 122]
+.L1137:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L1126
+.L1132:
+	add	w1, w1, 1
+	add	x3, x3, 2
+	cmp	w1, 64
+	bne	.L1133
+	b	.L1131
+.L1135:
+	add	w1, w1, 1
+	add	x3, x3, 2
+	cmp	w1, 64
+	bne	.L1136
+	b	.L1134
+.L1138:
+	add	w1, w1, 1
+	add	x3, x3, 2
+	cmp	w1, 64
+	bne	.L1139
+	b	.L1137
+	.size	gc_free_src_blk, .-gc_free_src_blk
+	.section	.text.print_ftl_debug_info,"ax",@progbits
+	.align	2
+	.global	print_ftl_debug_info
+	.type	print_ftl_debug_info, %function
+print_ftl_debug_info:
+	sub	sp, sp, #64
+	adrp	x2, .LANCHOR99
+	adrp	x8, .LANCHOR128
+	stp	x29, x30, [sp, 32]
+	add	x29, sp, 32
+	ldrh	w7, [x2, #:lo12:.LANCHOR99]
+	adrp	x2, .LANCHOR97
+	stp	x19, x20, [sp, 48]
+	adrp	x19, .LANCHOR110
+	adrp	x20, .LANCHOR10
+	ldrh	w6, [x2, #:lo12:.LANCHOR97]
+	adrp	x2, .LANCHOR107
+	ldr	x1, [x19, #:lo12:.LANCHOR110]
+	ldrh	w5, [x2, #:lo12:.LANCHOR107]
+	adrp	x2, .LANCHOR105
+	ldr	x0, [x20, #:lo12:.LANCHOR10]
+	ldrh	w4, [x2, #:lo12:.LANCHOR105]
+	adrp	x2, .LANCHOR103
+	ldr	w8, [x8, #:lo12:.LANCHOR128]
+	ldrh	w3, [x2, #:lo12:.LANCHOR103]
+	ldrh	w2, [x1, 146]
+	ldrh	w1, [x1, 148]
+	str	w8, [sp, 24]
+	ldr	w8, [x0, 528]
+	str	w8, [sp, 16]
+	ldr	w0, [x0, 524]
+	str	w0, [sp, 8]
+	adrp	x0, .LANCHOR93
+	ldrh	w0, [x0, #:lo12:.LANCHOR93]
+	str	w0, [sp]
+	adrp	x0, .LC71
+	add	x0, x0, :lo12:.LC71
+	bl	printf
+	ldr	x0, [x19, #:lo12:.LANCHOR110]
+	adrp	x1, .LANCHOR129
+	ldrb	w3, [x1, #:lo12:.LANCHOR129]
+	ldr	w4, [x0, 8]
+	ldr	w5, [x0, 64]
+	ldr	w1, [x0, 20]
+	ldr	w2, [x0, 28]
+	adrp	x0, .LC72
+	add	x0, x0, :lo12:.LC72
+	bl	printf
+	ldr	x0, [x19, #:lo12:.LANCHOR110]
+	ldr	w1, [x0, 52]
+	ldr	w2, [x0, 60]
+	ldr	w3, [x0, 16]
+	adrp	x0, .LC73
+	add	x0, x0, :lo12:.LC73
+	lsr	w3, w3, 11
+	bl	printf
+	ldr	x0, [x19, #:lo12:.LANCHOR110]
+	ldrh	w2, [x0, 98]
+	ldrh	w6, [x0, 72]
+	ldrh	w5, [x0, 96]
+	ldrh	w4, [x0, 92]
+	ldrh	w3, [x0, 88]
+	ldrh	w1, [x0, 74]
+	str	w2, [sp, 16]
+	ldrh	w2, [x0, 94]
+	str	w2, [sp, 8]
+	ldrh	w2, [x0, 90]
+	str	w2, [sp]
+	ldp	w7, w2, [x0, 80]
+	adrp	x0, .LC74
+	add	x0, x0, :lo12:.LC74
+	bl	printf
+	adrp	x0, .LANCHOR87
+	ldrh	w5, [x0, #:lo12:.LANCHOR87]
+	adrp	x0, .LANCHOR94
+	ldrh	w4, [x0, #:lo12:.LANCHOR94]
+	adrp	x0, .LANCHOR70
+	ldrh	w3, [x0, #:lo12:.LANCHOR70]
+	adrp	x0, .LANCHOR102
+	ldrh	w2, [x0, #:lo12:.LANCHOR102]
+	adrp	x0, .LANCHOR100
+	ldrh	w1, [x0, #:lo12:.LANCHOR100]
+	adrp	x0, .LC75
+	add	x0, x0, :lo12:.LC75
+	bl	printf
+	ldr	x0, [x20, #:lo12:.LANCHOR10]
+	ldr	x1, [x19, #:lo12:.LANCHOR110]
+	ldp	x29, x30, [sp, 32]
+	ldrh	w4, [x0, 590]
+	ldrh	w6, [x1, 150]
+	ldrh	w3, [x0, 588]
+	ldrh	w2, [x0, 586]
+	ldp	x19, x20, [sp, 48]
+	add	sp, sp, 64
+	ldr	w5, [x1, 156]
+	ldrh	w1, [x0, 584]
+	adrp	x0, .LC76
+	add	x0, x0, :lo12:.LC76
+	b	printf
+	.size	print_ftl_debug_info, .-print_ftl_debug_info
+	.section	.text.ftl_write_buf,"ax",@progbits
+	.align	2
+	.global	ftl_write_buf
+	.type	ftl_write_buf, %function
+ftl_write_buf:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	str	x21, [sp, 32]
+	cbnz	x0, .L1166
+	adrp	x1, .LANCHOR130
+	add	x1, x1, :lo12:.LANCHOR130
+	mov	w2, 803
+	adrp	x0, .LC0
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+	bl	print_ftl_debug_info
+	mov	w0, -1
+.L1165:
+	ldp	x19, x20, [sp, 16]
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
+.L1169:
+	mov	x1, x19
+	adrp	x0, .LANCHOR66
+	add	x0, x0, :lo12:.LANCHOR66
+	bl	buf_add_tail
+	adrp	x1, .LANCHOR110
+	ldrb	w3, [x19, 56]
+	ldrb	w0, [x21, #:lo12:.LANCHOR67]
+	ldr	x1, [x1, #:lo12:.LANCHOR110]
+	add	w0, w0, 1
+	and	w0, w0, 255
+	strb	w0, [x21, #:lo12:.LANCHOR67]
+	ldr	w2, [x1, 16]
+	add	w2, w2, w3
+	str	w2, [x1, 16]
+	ldr	w2, [x1, 32]
+	add	w2, w2, 1
+	str	w2, [x1, 32]
+	b	.L1165
+.L1166:
+	mov	x19, x0
+	adrp	x0, .LANCHOR131
+	mov	x20, x0
+	ldrb	w1, [x0, #:lo12:.LANCHOR131]
+	ldrb	w2, [x19, 56]
+	cmp	w2, w1
+	bls	.L1171
+	adrp	x1, .LANCHOR130
+	adrp	x0, .LC0
+	mov	w2, 810
+	add	x1, x1, :lo12:.LANCHOR130
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1171:
+	ldrb	w0, [x19, 56]
+	adrp	x21, .LANCHOR67
+	cbz	w0, .L1168
+	ldrb	w1, [x20, #:lo12:.LANCHOR131]
+	cmp	w1, w0
+	bcs	.L1169
+.L1168:
+	mov	x0, x19
+	bl	zbuf_free
+	ldrb	w0, [x21, #:lo12:.LANCHOR67]
+	b	.L1165
+	.size	ftl_write_buf, .-ftl_write_buf
+	.section	.text.ftl_write_completed,"ax",@progbits
+	.align	2
+	.global	ftl_write_completed
+	.type	ftl_write_completed, %function
+ftl_write_completed:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR56
+	stp	x19, x20, [sp, 16]
+	add	x22, x21, :lo12:.LANCHOR56
+	stp	x23, x24, [sp, 48]
+	adrp	x20, .LANCHOR65
+	mov	w23, 20041
+	add	x20, x20, :lo12:.LANCHOR65
+	str	x25, [sp, 64]
+	movk	w23, 0x444b, lsl 16
+	mov	w25, 0
+.L1177:
+	ldrb	w0, [x20]
+	cmp	w0, 255
+	bne	.L1188
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L1188:
+	add	x1, x21, :lo12:.LANCHOR56
+	lsl	x2, x0, 6
+	add	x24, x1, x2
+	ubfiz	x19, x0, 6, 8
+	add	x19, x1, x19
+	ldrb	w1, [x1, x2]
+	strb	w1, [x20]
+	ldr	w1, [x24, 52]
+	cmn	w1, #1
+	bne	.L1178
+	adrp	x1, .LANCHOR124
+	ldrb	w1, [x1, #:lo12:.LANCHOR124]
+	cbnz	w1, .L1179
+	adrp	x1, .LANCHOR81
+	ldrb	w1, [x1, #:lo12:.LANCHOR81]
+	cbz	w1, .L1180
+.L1179:
+	adrp	x1, .LANCHOR110
+	ldr	x1, [x1, #:lo12:.LANCHOR110]
+	ldr	w1, [x1, 156]
+	cmp	w1, w23
+	beq	.L1181
+.L1180:
+	add	x1, x22, x0, lsl 6
+	mov	w2, 24
+	mov	w5, 65535
+	ldr	w3, [x1, 40]
+	adrp	x1, .LANCHOR75
+	ldrh	w4, [x1, #:lo12:.LANCHOR75]
+	adrp	x1, .LANCHOR32
+	ldrb	w1, [x1, #:lo12:.LANCHOR32]
+	sub	w1, w2, w1
+	sub	w2, w1, w4
+	mov	w1, 1
+	lsr	w4, w3, w4
+	lsl	w1, w1, w2
+	adrp	x2, .LANCHOR76
+	sub	w1, w1, #1
+	ldrb	w2, [x2, #:lo12:.LANCHOR76]
+	and	w1, w1, w4
+	udiv	w1, w1, w2
+	adrp	x2, .LANCHOR10
+	mov	x24, x2
+	ldr	x4, [x2, #:lo12:.LANCHOR10]
+	and	w25, w1, 65535
+	and	w1, w1, w5
+	ldr	w6, [x4, 560]
+	cmp	w6, w5
+	bne	.L1182
+	str	w1, [x4, 560]
+	str	w3, [x4, 564]
+.L1182:
+	add	x0, x22, x0, lsl 6
+	ldr	w2, [x0, 36]
+	adrp	x0, .LC77
+	add	x0, x0, :lo12:.LC77
+	bl	printf
+	ldr	x0, [x24, #:lo12:.LANCHOR10]
+	ldr	w1, [x0, 556]
+	add	w1, w1, 1
+	str	w1, [x0, 556]
+	ldrh	w1, [x0, 16]
+	cmp	w1, w25
+	bne	.L1183
+	strh	wzr, [x0, 22]
+.L1181:
+	mov	x0, x19
+	mov	w25, 1
+	bl	ftl_write_buf
+	b	.L1177
+.L1183:
+	ldrh	w1, [x0, 48]
+	cmp	w1, w25
+	bne	.L1181
+	strh	wzr, [x0, 54]
+	b	.L1181
+.L1178:
+	cbz	w25, .L1186
+	ldp	w1, w2, [x24, 36]
+	adrp	x0, .LC78
+	add	x0, x0, :lo12:.LC78
+	bl	printf
+	mov	x0, x19
+	bl	ftl_write_buf
+	b	.L1177
+.L1186:
+	ldrh	w2, [x24, 48]
+	ldr	w0, [x24, 36]
+	ldr	w1, [x24, 44]
+	bl	lpa_hash_update_ppa
+	ldrb	w0, [x24, 2]
+	tbz	x0, 2, .L1187
+	and	w0, w0, -3
+	strb	w0, [x24, 2]
+	b	.L1177
+.L1187:
+	mov	x0, x19
+	bl	zbuf_free
+	b	.L1177
+	.size	ftl_write_completed, .-ftl_write_completed
+	.section	.text.zftl_add_read_buf,"ax",@progbits
+	.align	2
+	.global	zftl_add_read_buf
+	.type	zftl_add_read_buf, %function
+zftl_add_read_buf:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	cbnz	x0, .L1194
+	mov	w2, 1143
+	adrp	x1, .LANCHOR132
+	adrp	x0, .LC0
+	add	x1, x1, :lo12:.LANCHOR132
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	b	print_ftl_debug_info
+.L1194:
+	ldrb	w1, [x0, 56]
+	mov	x19, x0
+	adrp	x0, .LANCHOR131
+	ldrb	w0, [x0, #:lo12:.LANCHOR131]
+	cmp	w1, w0
+	bls	.L1196
+	adrp	x1, .LANCHOR132
+	adrp	x0, .LC0
+	mov	w2, 1150
+	add	x1, x1, :lo12:.LANCHOR132
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1196:
+	mov	x1, x19
+	adrp	x0, .LANCHOR133
+	add	x0, x0, :lo12:.LANCHOR133
+	bl	buf_add_tail
+	adrp	x1, .LANCHOR134
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ldrb	w0, [x1, #:lo12:.LANCHOR134]
+	add	w0, w0, 1
+	strb	w0, [x1, #:lo12:.LANCHOR134]
+	ret
+	.size	zftl_add_read_buf, .-zftl_add_read_buf
+	.section	.text.ftl_alloc_sblk,"ax",@progbits
+	.align	2
+	.global	ftl_alloc_sblk
+	.type	ftl_alloc_sblk, %function
+ftl_alloc_sblk:
+	stp	x29, x30, [sp, -64]!
+	cmp	w0, 5
+	add	x29, sp, 0
+	str	x23, [sp, 48]
+	and	w23, w0, 65535
+	stp	x21, x22, [sp, 32]
+	mov	w1, w23
+	stp	x19, x20, [sp, 16]
+	cset	w22, eq
+	mov	w21, w0
+	mov	w0, 0
+	bl	zftl_get_free_sblk
+	and	w19, w0, 65535
+	mov	w0, 65535
+	cmp	w19, w0
+	beq	.L1201
+	adrp	x0, .LANCHOR7
+	lsl	w22, w22, 1
+	ldr	x20, [x0, #:lo12:.LANCHOR7]
+	add	x20, x20, x19, uxth 2
+	ldrb	w0, [x20, 2]
+	tst	w0, 224
+	beq	.L1202
+	adrp	x1, .LANCHOR135
+	adrp	x0, .LC0
+	mov	w2, 939
+	add	x1, x1, :lo12:.LANCHOR135
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1202:
+	ldrb	w0, [x20, 2]
+	bfi	w0, w21, 5, 3
+	ubfx	x1, x0, 3, 2
+	orr	w1, w22, w1
+	bfi	w0, w1, 3, 2
+	strb	w0, [x20, 2]
+	and	w1, w0, 24
+	cmp	w1, 24
+	bne	.L1203
+	cbnz	w22, .L1203
+	mov	w1, 1
+	bfi	w0, w1, 3, 2
+	strb	w0, [x20, 2]
+.L1203:
+	mov	w0, w19
+	ldr	x23, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+.L1201:
+	bl	print_ftl_debug_info
+	adrp	x20, .LC79
+	mov	w2, w21
+	add	x20, x20, :lo12:.LC79
+	mov	w1, w19
+	mov	x0, x20
+	bl	printf
+	mov	w1, w23
+	mov	w0, 0
+	bl	zftl_get_free_sblk
+	and	w19, w0, 65535
+	mov	w2, w21
+	mov	w1, w19
+	mov	x0, x20
+	bl	printf
+	bl	dump_all_list_info
+	mov	w2, 955
+	adrp	x1, .LANCHOR135
+	adrp	x0, .LC0
+	add	x1, x1, :lo12:.LANCHOR135
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+	b	.L1203
+	.size	ftl_alloc_sblk, .-ftl_alloc_sblk
+	.section	.text.sblk_init,"ax",@progbits
+	.align	2
+	.global	sblk_init
+	.type	sblk_init, %function
+sblk_init:
+	adrp	x1, .LANCHOR60
+	mov	w0, -1
+	strb	w0, [x1, #:lo12:.LANCHOR60]
+	adrp	x1, .LANCHOR65
+	strb	w0, [x1, #:lo12:.LANCHOR65]
+	adrp	x1, .LANCHOR63
+	strb	w0, [x1, #:lo12:.LANCHOR63]
+	adrp	x1, .LANCHOR64
+	strb	w0, [x1, #:lo12:.LANCHOR64]
+	mov	w0, 0
+	ret
+	.size	sblk_init, .-sblk_init
+	.section	.text.dump_sblk_queue,"ax",@progbits
+	.align	2
+	.global	dump_sblk_queue
+	.type	dump_sblk_queue, %function
+dump_sblk_queue:
+	stp	x29, x30, [sp, -48]!
+	adrp	x0, .LC80
+	add	x0, x0, :lo12:.LC80
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR60
+	str	x21, [sp, 32]
+	ldrb	w1, [x19, #:lo12:.LANCHOR60]
+	bl	printf
+	ldrb	w19, [x19, #:lo12:.LANCHOR60]
+	cmp	w19, 255
+	beq	.L1210
+	adrp	x1, .LANCHOR56
+	ubfiz	x19, x19, 6, 8
+	add	x1, x1, :lo12:.LANCHOR56
+	adrp	x21, .LC81
+	add	x19, x1, x19
+	add	x21, x21, :lo12:.LC81
+	mov	x20, x1
+.L1212:
+	ldrb	w2, [x19, 58]
+	mov	x0, x21
+	ldrb	w1, [x19, 1]
+	ldr	w3, [x19, 40]
+	bl	printf
+	ldrb	w19, [x19]
+	cmp	w19, 255
+	beq	.L1210
+	ubfiz	x19, x19, 6, 8
+	add	x19, x20, x19
+	b	.L1212
+.L1210:
+	ldp	x19, x20, [sp, 16]
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
+	.size	dump_sblk_queue, .-dump_sblk_queue
+	.section	.text.queue_lun_state,"ax",@progbits
+	.align	2
+	.global	queue_lun_state
+	.type	queue_lun_state, %function
+queue_lun_state:
+	adrp	x2, .LANCHOR60
+	ldrb	w2, [x2, #:lo12:.LANCHOR60]
+	cmp	w2, 255
+	beq	.L1228
+	adrp	x3, .LANCHOR32
+	mov	w8, 24
+	adrp	x10, .LANCHOR56
+	add	x10, x10, :lo12:.LANCHOR56
+	ldrb	w4, [x3, #:lo12:.LANCHOR32]
+	mov	w3, 1
+	adrp	x13, .L1224
+	mov	x15, x10
+	sub	w8, w8, w4
+	add	x13, x13, :lo12:.L1224
+	lsl	w4, w3, w4
+	sub	w4, w4, #1
+	and	w6, w4, 65535
+	adrp	x4, .LANCHOR75
+	asr	w11, w0, w8
+	and	w11, w11, w6
+	ldrh	w12, [x4, #:lo12:.LANCHOR75]
+	sub	w4, w8, w12
+	lsl	w3, w3, w4
+	sub	w3, w3, #1
+	and	w7, w3, 65535
+	adrp	x3, .LANCHOR76
+	ldrb	w5, [x3, #:lo12:.LANCHOR76]
+	asr	w3, w0, w12
+	sub	w5, w5, #1
+	and	w5, w5, 65535
+	and	w3, w3, w5
+	and	w3, w3, w7
+.L1227:
+	add	x14, x10, x2, lsl 6
+	ldr	w4, [x14, 40]
+	lsr	w0, w4, w8
+	and	w0, w6, w0
+	cmp	w11, w0
+	bne	.L1222
+	lsr	w4, w4, w12
+	and	w4, w5, w4
+	and	w4, w7, w4
+	ldrb	w0, [x14, 58]
+	cmp	w3, w4
+	bne	.L1223
+	cmp	w1, 1
+	bne	.L1220
+	cmp	w0, 7
+	ccmp	w0, 9, 4, ne
+	beq	.L1222
+	ret
+.L1223:
+	cmp	w1, 3
+	bhi	.L1222
+	ldrb	w4, [x13,w1,uxtw]
+	adr	x14, .Lrtx1224
+	add	x4, x14, w4, sxtb #2
+	br	x4
+.Lrtx1224:
+	.section	.rodata.queue_lun_state,"a",@progbits
+	.align	0
+	.align	2
+.L1224:
+	.byte	(.L1220 - .Lrtx1224) / 4
+	.byte	(.L1225 - .Lrtx1224) / 4
+	.byte	(.L1226 - .Lrtx1224) / 4
+	.byte	(.L1220 - .Lrtx1224) / 4
+	.section	.text.queue_lun_state
+.L1225:
+	cmp	w0, 7
+	ccmp	w0, 9, 4, ne
+	beq	.L1222
+	ret
+.L1226:
+	cmp	w0, 11
+	bne	.L1220
+.L1222:
+	lsl	x2, x2, 6
+	ldrb	w2, [x15, x2]
+	cmp	w2, 255
+	bne	.L1227
+.L1228:
+	mov	w0, 0
+.L1220:
+	ret
+	.size	queue_lun_state, .-queue_lun_state
+	.section	.text.queue_remove_completed_req,"ax",@progbits
+	.align	2
+	.global	queue_remove_completed_req
+	.type	queue_remove_completed_req, %function
+queue_remove_completed_req:
+	adrp	x4, .LANCHOR65
+	adrp	x8, .LANCHOR64
+	adrp	x1, .LANCHOR60
+	adrp	x7, .LANCHOR63
+	adrp	x3, .LANCHOR56
+	ldrb	w14, [x4, #:lo12:.LANCHOR65]
+	add	x5, x3, :lo12:.LANCHOR56
+	ldrb	w2, [x1, #:lo12:.LANCHOR60]
+	ldrb	w12, [x8, #:lo12:.LANCHOR64]
+	mov	x11, x5
+	ldrb	w13, [x7, #:lo12:.LANCHOR63]
+	add	x16, x8, :lo12:.LANCHOR64
+	add	x7, x7, :lo12:.LANCHOR63
+	add	x10, x4, :lo12:.LANCHOR65
+	mov	w6, 0
+	mov	w15, -1
+.L1231:
+	cmp	w2, 255
+	beq	.L1232
+	sbfiz	x8, x2, 6, 32
+	sxtw	x0, w2
+	add	x4, x5, x8
+	ldrb	w4, [x4, 58]
+	sub	w4, w4, #12
+	and	w4, w4, 255
+	cmp	w4, 1
+	bls	.L1233
+	cbz	w6, .L1230
+	strb	w2, [x1, #:lo12:.LANCHOR60]
+	ret
+.L1233:
+	lsl	x6, x0, 6
+	ldrb	w2, [x5, x8]
+	add	x4, x5, x6
+	strb	w15, [x5, x6]
+	ldrb	w6, [x4, 59]
+	cmp	w6, 1
+	bne	.L1236
+	ldrh	w4, [x4, 50]
+	cbnz	w4, .L1244
+	mov	w4, w14
+	mov	x6, x10
+.L1237:
+	cmp	w4, 255
+	bne	.L1242
+	add	x3, x3, :lo12:.LANCHOR56
+	strb	w2, [x1, #:lo12:.LANCHOR60]
+	add	x0, x3, x0, lsl 6
+	ldrb	w0, [x0, 1]
+	strb	w0, [x6]
+	ret
+.L1236:
+	cbnz	w6, .L1238
+	ldr	w4, [x4, 36]
+	cmn	w4, #1
+	beq	.L1238
+	mov	w4, w13
+	mov	x6, x7
+	b	.L1237
+.L1244:
+	mov	w4, w12
+	mov	x6, x16
+	b	.L1237
+.L1242:
+	mov	w6, w4
+	sbfiz	x4, x4, 6, 32
+	ldrb	w4, [x11, x4]
+	cmp	w4, 255
+	bne	.L1242
+	add	x0, x11, x0, lsl 6
+	sbfiz	x6, x6, 6, 32
+	ldrb	w0, [x0, 1]
+	strb	w0, [x11, x6]
+.L1238:
+	mov	w6, 1
+	b	.L1231
+.L1232:
+	cbz	w6, .L1230
+	mov	w0, -1
+	strb	w0, [x1, #:lo12:.LANCHOR60]
+.L1230:
+	ret
+	.size	queue_remove_completed_req, .-queue_remove_completed_req
+	.section	.text.pm_alloc_new_blk,"ax",@progbits
+	.align	2
+	.global	pm_alloc_new_blk
+	.type	pm_alloc_new_blk, %function
+pm_alloc_new_blk:
+	stp	x29, x30, [sp, -64]!
+	adrp	x2, .LANCHOR80
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR110
+	stp	x21, x22, [sp, 32]
+	ldr	x1, [x20, #:lo12:.LANCHOR110]
+	ldrb	w2, [x2, #:lo12:.LANCHOR80]
+	ldrh	w0, [x1, 690]
+	str	x23, [sp, 48]
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	strh	w0, [x1, 690]
+	cmp	w2, w0
+	bls	.L1255
+	add	x0, x1, x0, sxtw 1
+	ldrh	w1, [x0, 672]
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L1256
+.L1255:
+	adrp	x19, .LC82
+	add	x19, x19, :lo12:.LC82
+	mov	w23, 65535
+	adrp	x22, .LANCHOR7
+.L1257:
+	mov	w0, 1
+	bl	ftl_alloc_sblk
+	and	w21, w0, 65535
+	cmp	w21, w23
+	beq	.L1257
+	mov	w1, 0
+	mov	w0, w21
+	bl	ftl_erase_sblk
+	add	x14, x20, :lo12:.LANCHOR110
+	ldr	x1, [x20, #:lo12:.LANCHOR110]
+	mov	w0, w21
+	add	x1, x1, 672
+	bl	ftl_get_blk_list_in_sblk
+	tst	w0, 65535
+	bne	.L1258
+	mov	w1, w21
+	mov	x0, x19
+	bl	printf
+	ldr	x0, [x22, #:lo12:.LANCHOR7]
+	add	x21, x0, x21, uxth 2
+	ldrb	w0, [x21, 2]
+	orr	w0, w0, -32
+	strb	w0, [x21, 2]
+	b	.L1257
+.L1258:
+	ldr	x0, [x14]
+	adrp	x1, .LANCHOR136
+	mov	w2, 1
+	mov	w19, 0
+	add	x0, x0, 416
+	str	w2, [x1, #:lo12:.LANCHOR136]
+	mov	w1, 65535
+	strh	wzr, [x0, 274]
+.L1260:
+	ldrh	w2, [x0]
+	cmp	w2, w1
+	beq	.L1259
+	add	w19, w19, 1
+	add	x0, x0, 2
+	and	w19, w19, 65535
+	cmp	w19, 128
+	bne	.L1260
+	adrp	x1, .LANCHOR137
+	adrp	x0, .LC0
+	mov	w2, 264
+	add	x1, x1, :lo12:.LANCHOR137
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1259:
+	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	add	x19, x0, x19, sxtw 1
+	ldrh	w1, [x0, 688]
+	strh	w21, [x19, 416]
+	add	w1, w1, 1
+	strh	w1, [x0, 688]
+.L1256:
+	ldr	x1, [x20, #:lo12:.LANCHOR110]
+	ldrh	w0, [x1, 690]
+	add	x0, x0, 336
+	ldrh	w19, [x1, x0, lsl 1]
+	mov	w0, 65533
+	sub	w1, w19, #1
+	cmp	w0, w1, uxth
+	bcs	.L1262
+	adrp	x1, .LANCHOR137
+	adrp	x0, .LC0
+	mov	w2, 270
+	add	x1, x1, :lo12:.LANCHOR137
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1262:
+	adrp	x1, .LANCHOR32
+	mov	w2, 24
+	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	ldrb	w1, [x1, #:lo12:.LANCHOR32]
+	sub	w2, w2, w1
+	adrp	x1, .LANCHOR75
+	strh	wzr, [x0, 696]
+	ldrh	w1, [x1, #:lo12:.LANCHOR75]
+	strh	w19, [x0, 692]
+	sub	w2, w2, w1
+	asr	w4, w19, w2
+	strh	w4, [x0, 694]
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L1265
+	mov	w0, 1
+	and	w4, w4, 65535
+	lsl	w2, w0, w2
+	mov	w3, w19
+	adrp	x0, .LC83
+	sub	w2, w2, #1
+	mov	w1, w19
+	add	x0, x0, :lo12:.LC83
+	bl	printf
+.L1265:
+	mov	w0, 0
+	ldr	x23, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+	.size	pm_alloc_new_blk, .-pm_alloc_new_blk
+	.section	.text.pm_select_ram_region,"ax",@progbits
+	.align	2
+	.global	pm_select_ram_region
+	.type	pm_select_ram_region, %function
+pm_select_ram_region:
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR138
+	add	x0, x0, :lo12:.LANCHOR138
+	mov	x1, 0
+	add	x29, sp, 0
+	mov	w2, 65535
+	str	x19, [sp, 16]
+.L1274:
+	lsl	x3, x1, 4
+	and	w19, w1, 65535
+	ldrh	w3, [x3, x0]
+	cmp	w3, w2
+	beq	.L1273
+	add	x1, x1, 1
+	cmp	x1, 8
+	bne	.L1274
+	add	x0, x0, 2
+	mov	w19, w1
+	mov	x2, x0
+	mov	w4, 32768
+	mov	w1, 0
+.L1276:
+	ldrh	w3, [x2]
+	tbnz	x3, 15, .L1275
+	cmp	w3, w4
+	bcs	.L1275
+	mov	w4, w3
+	mov	w19, w1
+.L1275:
+	add	w1, w1, 1
+	add	x2, x2, 16
+	and	w1, w1, 65535
+	cmp	w1, 8
+	bne	.L1276
+	cmp	w19, 8
+	bne	.L1273
+	adrp	x1, .LANCHOR139
+	mov	w2, -1
+	ldrb	w3, [x1, #:lo12:.LANCHOR139]
+	mov	w1, 0
+.L1278:
+	ldrh	w5, [x0]
+	cmp	w5, w2
+	bcs	.L1277
+	ldrh	w4, [x0, -2]
+	cmp	w4, w3
+	csel	w2, w2, w5, eq
+	csel	w19, w19, w1, eq
+.L1277:
+	add	w1, w1, 1
+	add	x0, x0, 16
+	and	w1, w1, 65535
+	cmp	w1, 8
+	bne	.L1278
+	cmp	w19, 8
+	bne	.L1273
+	adrp	x1, .LANCHOR140
+	adrp	x0, .LC0
+	mov	w2, 377
+	add	x1, x1, :lo12:.LANCHOR140
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1273:
+	mov	w0, w19
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	pm_select_ram_region, .-pm_select_ram_region
+	.section	.text.idb_init,"ax",@progbits
+	.align	2
+	.global	idb_init
+	.type	idb_init, %function
+idb_init:
+	adrp	x0, .LANCHOR141
+	str	xzr, [x0, #:lo12:.LANCHOR141]
+	adrp	x0, .LANCHOR142
+	str	wzr, [x0, #:lo12:.LANCHOR142]
+	adrp	x0, .LANCHOR143
+	strb	wzr, [x0, #:lo12:.LANCHOR143]
+	adrp	x0, .LANCHOR144
+	str	xzr, [x0, #:lo12:.LANCHOR144]
+	mov	w0, 0
+	ret
+	.size	idb_init, .-idb_init
+	.section	.text.ftl_memset,"ax",@progbits
+	.align	2
+	.global	ftl_memset
+	.type	ftl_memset, %function
+ftl_memset:
+	uxtw	x2, w2
+	b	memset
+	.size	ftl_memset, .-ftl_memset
+	.section	.text.flash_lsb_page_tbl_build,"ax",@progbits
+	.align	2
+	.global	flash_lsb_page_tbl_build
+	.type	flash_lsb_page_tbl_build, %function
+flash_lsb_page_tbl_build:
+	stp	x29, x30, [sp, -48]!
+	adrp	x1, .LANCHOR16
+	add	x29, sp, 0
+	ldr	x1, [x1, #:lo12:.LANCHOR16]
+	stp	x19, x20, [sp, 16]
+	mov	w20, 1024
+	str	x21, [sp, 32]
+	adrp	x19, .LANCHOR3
+	ldrb	w1, [x1, 12]
+	sdiv	w20, w20, w1
+	cbnz	w0, .L1286
+	add	x1, x19, :lo12:.LANCHOR3
+	mov	x0, 0
+.L1287:
+	strh	w0, [x1, x0, lsl 1]
+	add	x0, x0, 1
+	cmp	x0, 512
+	bne	.L1287
+.L1293:
+	adrp	x21, .LANCHOR145
+	add	x21, x21, :lo12:.LANCHOR145
+	mov	w2, 2048
+	mov	w1, 255
+	mov	x0, x21
+	add	x19, x19, :lo12:.LANCHOR3
+	bl	ftl_memset
+	mov	x0, 0
+.L1288:
+	ldrh	w1, [x19, x0, lsl 1]
+	add	x0, x0, 1
+	cmp	w20, w0, uxth
+	strh	w1, [x21, w1, sxtw 1]
+	bhi	.L1288
+	ldp	x19, x20, [sp, 16]
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
+.L1286:
+	cmp	w0, 1
+	bne	.L1289
+	add	x3, x19, :lo12:.LANCHOR3
+	mov	x1, 0
+.L1292:
+	and	w0, w1, 65535
+	cmp	x1, 3
+	bls	.L1290
+	ubfiz	w2, w0, 1, 15
+	and	w0, w0, 1
+	add	w0, w0, 2
+	sub	w0, w2, w0
+	and	w0, w0, 65535
+.L1290:
+	strh	w0, [x3, x1, lsl 1]
+	add	x1, x1, 1
+	cmp	x1, 512
+	bne	.L1292
+	b	.L1293
+.L1289:
+	cmp	w0, 2
+	bne	.L1294
+	add	x3, x19, :lo12:.LANCHOR3
+	mov	w1, 65535
+	mov	x0, 0
+.L1296:
+	cmp	x0, 2
+	and	w2, w0, 65535
+	csel	w2, w2, w1, cc
+	strh	w2, [x3, x0, lsl 1]
+	add	w1, w1, 2
+	add	x0, x0, 1
+	and	w1, w1, 65535
+	cmp	x0, 512
+	bne	.L1296
+	b	.L1293
+.L1294:
+	cmp	w0, 3
+	bne	.L1297
+	add	x3, x19, :lo12:.LANCHOR3
+	mov	x1, 0
+.L1300:
+	and	w0, w1, 65535
+	cmp	x1, 5
+	bls	.L1298
+	ubfiz	w2, w0, 1, 15
+	and	w0, w0, 1
+	add	w0, w0, 4
+	sub	w0, w2, w0
+	and	w0, w0, 65535
+.L1298:
+	strh	w0, [x3, x1, lsl 1]
+	add	x1, x1, 1
+	cmp	x1, 512
+	bne	.L1300
+	b	.L1293
+.L1297:
+	cmp	w0, 4
+	bne	.L1301
+	add	x1, x19, :lo12:.LANCHOR3
+	mov	w2, 1
+	add	x1, x1, 16
+	strh	wzr, [x19, #:lo12:.LANCHOR3]
+	strh	w0, [x1, -8]
+	mov	w0, 5
+	strh	w2, [x1, -14]
+	mov	w2, 2
+	strh	w0, [x1, -6]
+	mov	w0, 7
+	strh	w2, [x1, -12]
+	mov	w2, 3
+	strh	w0, [x1, -4]
+	mov	w0, 8
+	strh	w2, [x1, -10]
+	strh	w0, [x1, -2]
+	mov	w0, 8
+.L1303:
+	and	w3, w0, 1
+	ubfiz	w2, w0, 1, 15
+	add	w3, w3, 6
+	add	w0, w0, 1
+	sub	w2, w2, w3
+	strh	w2, [x1], 2
+	and	w0, w0, 65535
+	cmp	w0, 512
+	bne	.L1303
+	b	.L1293
+.L1301:
+	cmp	w0, 5
+	bne	.L1304
+	add	x1, x19, :lo12:.LANCHOR3
+	mov	x0, 0
+.L1305:
+	strh	w0, [x1, x0, lsl 1]
+	add	x0, x0, 1
+	cmp	x0, 16
+	bne	.L1305
+	add	x1, x1, 32
+.L1306:
+	strh	w0, [x1], 2
+	add	w0, w0, 2
+	and	w0, w0, 65535
+	cmp	w0, 1008
+	bne	.L1306
+	b	.L1293
+.L1304:
+	cmp	w0, 8
+	bne	.L1307
+	add	x1, x19, :lo12:.LANCHOR3
+	mov	x0, 0
+.L1308:
+	strh	w0, [x0, x1]
+	add	x0, x0, 2
+	cmp	x0, 1024
+	bne	.L1308
+	b	.L1293
+.L1307:
+	cmp	w0, 9
+	bne	.L1309
+	add	x0, x19, :lo12:.LANCHOR3
+	mov	w1, 1
+	add	x0, x0, 6
+	strh	wzr, [x19, #:lo12:.LANCHOR3]
+	strh	w1, [x0, -4]
+	mov	w1, 2
+	strh	w1, [x0, -2]
+	mov	w1, 3
+.L1310:
+	strh	w1, [x0], 2
+	add	w1, w1, 2
+	and	w1, w1, 65535
+	cmp	w1, 1021
+	bne	.L1310
+	b	.L1293
+.L1309:
+	cmp	w0, 10
+	bne	.L1311
+	add	x1, x19, :lo12:.LANCHOR3
+	mov	x0, 0
+.L1312:
+	strh	w0, [x1, x0, lsl 1]
+	add	x0, x0, 1
+	cmp	x0, 63
+	bne	.L1312
+	add	x1, x1, 126
+.L1313:
+	strh	w0, [x1], 2
+	add	w0, w0, 2
+	and	w0, w0, 65535
+	cmp	w0, 961
+	bne	.L1313
+	b	.L1293
+.L1311:
+	cmp	w0, 11
+	bne	.L1314
+	add	x1, x19, :lo12:.LANCHOR3
+	mov	x0, 0
+.L1315:
+	strh	w0, [x1, x0, lsl 1]
+	add	x0, x0, 1
+	cmp	x0, 8
+	bne	.L1315
+	add	x1, x1, 16
+.L1317:
+	and	w3, w0, 1
+	ubfiz	w2, w0, 1, 15
+	add	w3, w3, 6
+	add	w0, w0, 1
+	sub	w2, w2, w3
+	strh	w2, [x1], 2
+	and	w0, w0, 65535
+	cmp	w0, 512
+	bne	.L1317
+	b	.L1293
+.L1314:
+	cmp	w0, 13
+	bne	.L1293
+	add	x2, x19, :lo12:.LANCHOR3
+	mov	x1, 0
+	mov	w0, 0
+.L1318:
+	strh	w0, [x1, x2]
+	add	w0, w0, 3
+	and	w0, w0, 65535
+	add	x1, x1, 2
+	cmp	w0, 1536
+	bne	.L1318
+	b	.L1293
+	.size	flash_lsb_page_tbl_build, .-flash_lsb_page_tbl_build
+	.section	.text.flash_die_info_init,"ax",@progbits
+	.align	2
+	.global	flash_die_info_init
+	.type	flash_die_info_init, %function
+flash_die_info_init:
+	stp	x29, x30, [sp, -64]!
+	adrp	x0, .LANCHOR14
+	add	x29, sp, 0
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	tbz	x0, 12, .L1341
+	adrp	x1, .LANCHOR146
+	adrp	x0, .LC1
+	add	x1, x1, :lo12:.LANCHOR146
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L1341:
+	adrp	x22, .LANCHOR33
+	add	x19, x22, :lo12:.LANCHOR33
+	adrp	x23, .LANCHOR2
+	adrp	x24, .LANCHOR18
+	adrp	x21, .LANCHOR30
+	mov	w2, 8
+	ldrh	w0, [x19, 26]
+	adrp	x20, .LANCHOR148
+	ldrb	w1, [x19, 12]
+	strh	w0, [x23, #:lo12:.LANCHOR2]
+	ldrh	w0, [x19, 10]
+	strb	wzr, [x24, #:lo12:.LANCHOR18]
+	sdiv	w0, w0, w1
+	adrp	x1, .LANCHOR147
+	strh	w0, [x1, #:lo12:.LANCHOR147]
+	mov	w1, 0
+	add	x0, x21, :lo12:.LANCHOR30
+	bl	ftl_memset
+	add	x0, x20, :lo12:.LANCHOR148
+	mov	w2, 32
+	mov	w1, 0
+	bl	ftl_memset
+	mov	x8, x22
+	mov	x15, x21
+	mov	x11, x20
+	adrp	x14, .LANCHOR48
+	adrp	x20, .LANCHOR34
+	add	x21, x14, :lo12:.LANCHOR48
+	add	x20, x20, :lo12:.LANCHOR34
+	add	x22, x19, 1
+	mov	x12, 0
+.L1343:
+	ldrb	w2, [x19]
+	mov	w0, 2
+	strb	w0, [x12, x20]
+	add	x1, x21, x12, lsl 3
+	mov	x0, x22
+	bl	flash_mem_cmp8
+	cbnz	w0, .L1342
+	ldrb	w2, [x24, #:lo12:.LANCHOR18]
+	add	x1, x11, :lo12:.LANCHOR148
+	add	w0, w2, 1
+	strb	w0, [x24, #:lo12:.LANCHOR18]
+	and	w0, w12, 255
+	str	wzr, [x1, x2, lsl 2]
+	add	x1, x15, :lo12:.LANCHOR30
+	strb	w0, [x1, x2]
+	bl	zftl_flash_enter_slc_mode
+.L1342:
+	add	x12, x12, 1
+	cmp	x12, 4
+	bne	.L1343
+	add	x0, x8, :lo12:.LANCHOR33
+	ldrb	w1, [x0, 8]
+	cmp	w1, 2
+	beq	.L1344
+.L1348:
+	add	x8, x8, :lo12:.LANCHOR33
+	ldrb	w0, [x24, #:lo12:.LANCHOR18]
+	ldp	x19, x20, [sp, 16]
+	ldrb	w1, [x8, 13]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	mul	w0, w0, w1
+	ldrh	w1, [x8, 14]
+	ldp	x29, x30, [sp], 64
+	mul	w0, w0, w1
+	adrp	x1, .LANCHOR149
+	strh	w0, [x1, #:lo12:.LANCHOR149]
+	ret
+.L1344:
+	ldrh	w1, [x23, #:lo12:.LANCHOR2]
+	add	x14, x14, :lo12:.LANCHOR48
+	ldrb	w12, [x0, 13]
+	add	x7, x0, 1
+	ldrb	w20, [x8, #:lo12:.LANCHOR33]
+	add	x19, x24, :lo12:.LANCHOR18
+	ldrb	w21, [x0, 23]
+	add	x11, x11, :lo12:.LANCHOR148
+	add	x15, x15, :lo12:.LANCHOR30
+	mov	x13, 0
+	mul	w12, w12, w1
+	ldrh	w1, [x0, 14]
+	and	w1, w1, 65280
+	mul	w12, w12, w1
+	lsl	w22, w12, 1
+.L1347:
+	mov	w2, w20
+	add	x1, x14, x13, lsl 3
+	mov	x0, x7
+	bl	flash_mem_cmp8
+	cbnz	w0, .L1345
+	ldrb	w1, [x19]
+	cmp	w21, 0
+	csel	w2, w12, w22, eq
+	add	w0, w1, 1
+	strb	w0, [x19]
+	str	w2, [x11, x1, lsl 2]
+	strb	w13, [x15, x1]
+.L1345:
+	add	x13, x13, 1
+	cmp	x13, 4
+	bne	.L1347
+	b	.L1348
+	.size	flash_die_info_init, .-flash_die_info_init
+	.section	.text.lpa_hash_init,"ax",@progbits
+	.align	2
+	.global	lpa_hash_init
+	.type	lpa_hash_init, %function
+lpa_hash_init:
+	stp	x29, x30, [sp, -16]!
+	mov	w2, 512
+	mov	w1, 255
+	adrp	x0, .LANCHOR116
+	add	x29, sp, 0
+	add	x0, x0, :lo12:.LANCHOR116
+	bl	ftl_memset
+	adrp	x0, .LANCHOR95
+	mov	w1, 255
+	ldp	x29, x30, [sp], 16
+	ldrh	w2, [x0, #:lo12:.LANCHOR95]
+	adrp	x0, .LANCHOR80
+	ldrb	w0, [x0, #:lo12:.LANCHOR80]
+	mul	w2, w2, w0
+	adrp	x0, .LANCHOR118
+	ldr	x0, [x0, #:lo12:.LANCHOR118]
+	lsl	w2, w2, 2
+	b	ftl_memset
+	.size	lpa_hash_init, .-lpa_hash_init
+	.section	.text.lpa_rebuild_hash,"ax",@progbits
+	.align	2
+	.global	lpa_rebuild_hash
+	.type	lpa_rebuild_hash, %function
+lpa_rebuild_hash:
+	stp	x29, x30, [sp, -48]!
+	adrp	x0, .LANCHOR14
+	add	x29, sp, 0
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	tbz	x0, 12, .L1361
+	adrp	x1, .LANCHOR150
+	adrp	x0, .LC84
+	mov	w3, 0
+	mov	w2, 239
+	add	x1, x1, :lo12:.LANCHOR150
+	add	x0, x0, :lo12:.LC84
+	bl	printf
+.L1361:
+	adrp	x20, .LANCHOR95
+	adrp	x22, .LANCHOR80
+	adrp	x19, .LANCHOR116
+	add	x19, x19, :lo12:.LANCHOR116
+	mov	w2, 512
+	mov	w1, 255
+	mov	x0, x19
+	bl	ftl_memset
+	ldrh	w2, [x20, #:lo12:.LANCHOR95]
+	adrp	x21, .LANCHOR118
+	ldrb	w0, [x22, #:lo12:.LANCHOR80]
+	mov	w1, 255
+	add	x20, x20, :lo12:.LANCHOR95
+	mul	w2, w2, w0
+	ldr	x0, [x21, #:lo12:.LANCHOR118]
+	lsl	w2, w2, 2
+	bl	ftl_memset
+	adrp	x0, .LANCHOR117
+	ldrb	w3, [x22, #:lo12:.LANCHOR80]
+	ldr	x5, [x21, #:lo12:.LANCHOR118]
+	mov	w1, 0
+	ldr	x4, [x0, #:lo12:.LANCHOR117]
+.L1362:
+	ldrh	w0, [x20]
+	mul	w0, w0, w3
+	cmp	w1, w0, lsl 1
+	blt	.L1364
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
+.L1364:
+	uxtw	x2, w1
+	ldr	w0, [x4, x2, lsl 2]
+	cmn	w0, #1
+	beq	.L1363
+	and	x0, x0, 255
+	ldrh	w6, [x19, x0, lsl 1]
+	strh	w1, [x19, x0, lsl 1]
+	strh	w6, [x5, x2, lsl 1]
+.L1363:
+	add	w1, w1, 1
+	and	w1, w1, 65535
+	b	.L1362
+	.size	lpa_rebuild_hash, .-lpa_rebuild_hash
+	.section	.text.zftl_read_flash_info,"ax",@progbits
+	.align	2
+	.global	zftl_read_flash_info
+	.type	zftl_read_flash_info, %function
+zftl_read_flash_info:
+	stp	x29, x30, [sp, -32]!
+	mov	w2, 11
+	mov	w1, 0
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	mov	x19, x0
+	bl	ftl_memset
+	adrp	x1, .LANCHOR33
+	add	x1, x1, :lo12:.LANCHOR33
+	adrp	x0, .LANCHOR2
+	adrp	x3, .LANCHOR68
+	strb	wzr, [x19, 10]
+	mov	w4, 1
+	ldrb	w2, [x1, 9]
+	ldrh	w0, [x0, #:lo12:.LANCHOR2]
+	mul	w0, w2, w0
+	strb	w0, [x19, 4]
+	ubfx	x0, x0, 8, 8
+	strb	w0, [x19, 5]
+	adrp	x0, .LANCHOR50
+	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	strb	w0, [x19, 7]
+	add	x0, x3, :lo12:.LANCHOR68
+	ldrb	w3, [x3, #:lo12:.LANCHOR68]
+	strb	w3, [x19]
+	ldrb	w3, [x0, 1]
+	strb	w3, [x19, 1]
+	ldrb	w3, [x0, 2]
+	ldrb	w0, [x0, 3]
+	strb	w3, [x19, 2]
+	strb	w0, [x19, 3]
+	mov	w0, 32
+	strb	w2, [x19, 6]
+	adrp	x2, .LANCHOR30
+	strb	w0, [x19, 8]
+	add	x2, x2, :lo12:.LANCHOR30
+	ldrb	w0, [x1, 7]
+	mov	x1, 0
+	strb	w0, [x19, 9]
+	adrp	x0, .LANCHOR18
+	ldrb	w3, [x0, #:lo12:.LANCHOR18]
+.L1373:
+	cmp	w3, w1, uxtb
+	bhi	.L1374
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L1374:
+	ldrb	w0, [x1, x2]
+	add	x1, x1, 1
+	ldrb	w5, [x19, 10]
+	lsl	w0, w4, w0
+	orr	w0, w0, w5
+	strb	w0, [x19, 10]
+	b	.L1373
+	.size	zftl_read_flash_info, .-zftl_read_flash_info
+	.section	.text.gc_static_wearleveling,"ax",@progbits
+	.align	2
+	.global	gc_static_wearleveling
+	.type	gc_static_wearleveling, %function
+gc_static_wearleveling:
+	stp	x29, x30, [sp, -160]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR110
+	stp	x19, x20, [sp, 16]
+	ldr	x0, [x22, #:lo12:.LANCHOR110]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	ldr	w1, [x0, 32]
+	mov	w0, 10240
+	cmp	w1, w0
+	bls	.L1377
+	bl	ftl_tmp_into_update
+.L1377:
+	adrp	x19, .LANCHOR10
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	ldr	w1, [x0, 568]
+	ldr	w2, [x0, 12]
+	add	w1, w1, 860160
+	add	w1, w1, 3840
+	cmp	w2, w1
+	bhi	.L1378
+	ldr	x3, [x22, #:lo12:.LANCHOR110]
+	ldr	w1, [x0, 572]
+	add	w1, w1, 32
+	ldr	w3, [x3, 36]
+	cmp	w3, w1
+	bls	.L1428
+.L1378:
+	ldr	x1, [x22, #:lo12:.LANCHOR110]
+	mov	w20, 65535
+	adrp	x8, .LANCHOR14
+	mov	w21, w20
+	add	x8, x8, :lo12:.LANCHOR14
+	mov	w27, 0
+	mov	w25, 0
+	mov	w26, 0
+	ldr	w3, [x1, 36]
+	mov	w23, 0
+	ldrh	w28, [x1, 134]
+	adrp	x24, .LANCHOR7
+	str	w2, [x0, 568]
+	str	w3, [x0, 572]
+	adrp	x0, .LANCHOR6
+	add	x10, x0, :lo12:.LANCHOR6
+	str	wzr, [x29, 128]
+	str	wzr, [x29, 136]
+	stp	wzr, wzr, [x29, 144]
+.L1380:
+	ldrh	w0, [x10]
+	cmp	w0, w28
+	bhi	.L1389
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	mov	w2, 128
+	mov	w1, 255
+	add	x0, x0, 264
+	strh	wzr, [x0, -142]
+	bl	ftl_memset
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	adrp	x2, .LANCHOR14
+	ldr	x8, [x24, #:lo12:.LANCHOR7]
+	ldr	w3, [x2, #:lo12:.LANCHOR14]
+	str	x2, [x29, 152]
+	ldrh	w0, [x0, 586]
+	mov	x1, x0
+	lsl	x28, x0, 2
+	add	x10, x8, x28
+	tbz	x3, 10, .L1390
+	adrp	x2, .LANCHOR9
+	ldrb	w6, [x10, 3]
+	ldrb	w4, [x10, 2]
+	ldr	x5, [x2, #:lo12:.LANCHOR9]
+	ldr	w3, [x8, x28]
+	ldrh	w2, [x8, x28]
+	stp	x8, x10, [x29, 112]
+	ldrh	w7, [x5, x0, lsl 1]
+	ubfx	x3, x3, 11, 8
+	ubfx	x5, x4, 5, 3
+	and	w2, w2, 2047
+	ubfx	x4, x4, 3, 2
+	adrp	x0, .LC86
+	add	x0, x0, :lo12:.LC86
+	bl	printf
+	ldp	x8, x10, [x29, 112]
+.L1390:
+	ldrb	w0, [x10, 2]
+	and	w3, w0, 224
+	cmp	w3, 32
+	bne	.L1391
+	ldr	x1, [x22, #:lo12:.LANCHOR110]
+	ldrh	w1, [x1, 688]
+	cmp	w1, 2
+	bls	.L1391
+	adrp	x1, .LANCHOR151
+	mov	w2, 1
+	str	w2, [x1, #:lo12:.LANCHOR151]
+.L1391:
+	ldrb	w1, [x10, 2]
+	tbz	x1, 3, .L1392
+	ldr	x1, [x22, #:lo12:.LANCHOR110]
+	ldrh	w2, [x8, x28]
+	and	w2, w2, 2047
+	ldrh	w4, [x1, 96]
+	adrp	x1, .LANCHOR152
+	ldrh	w1, [x1, #:lo12:.LANCHOR152]
+	add	w1, w2, w1, lsr 2
+	cmp	w4, w1
+	ble	.L1392
+	and	w0, w0, 192
+	cmp	w0, 64
+	bne	.L1393
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	mov	w1, 0
+	mov	w2, 1
+	ldrh	w0, [x0, 586]
+	bl	gc_add_sblk
+	adrp	x0, .LANCHOR71+2110
+	mov	w1, 1
+	strh	w1, [x0, #:lo12:.LANCHOR71+2110]
+.L1392:
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	ldr	x2, [x29, 152]
+	ldr	x11, [x24, #:lo12:.LANCHOR7]
+	ldrh	w0, [x0, 584]
+	ldr	w2, [x2, #:lo12:.LANCHOR14]
+	mov	x1, x0
+	lsl	x10, x0, 2
+	add	x28, x11, x10
+	tbz	x2, 10, .L1394
+	adrp	x2, .LANCHOR9
+	ldrb	w6, [x28, 3]
+	ldrb	w4, [x28, 2]
+	ldr	x5, [x2, #:lo12:.LANCHOR9]
+	ldr	w3, [x11, x10]
+	ldrh	w2, [x11, x10]
+	stp	x10, x11, [x29, 112]
+	ldrh	w7, [x5, x0, lsl 1]
+	ubfx	x3, x3, 11, 8
+	ubfx	x5, x4, 5, 3
+	and	w2, w2, 2047
+	ubfx	x4, x4, 3, 2
+	adrp	x0, .LC87
+	add	x0, x0, :lo12:.LC87
+	bl	printf
+	ldp	x10, x11, [x29, 112]
+.L1394:
+	ldrb	w0, [x28, 2]
+	tbz	x0, 3, .L1395
+	ldr	x0, [x22, #:lo12:.LANCHOR110]
+	ldr	w1, [x11, x10]
+	ldrh	w2, [x0, 98]
+	adrp	x0, .LANCHOR153
+	ubfx	x1, x1, 11, 8
+	ldrh	w0, [x0, #:lo12:.LANCHOR153]
+	add	w0, w1, w0, lsr 2
+	cmp	w2, w0
+	ble	.L1395
+	ldrb	w0, [x28, 2]
+	and	w1, w0, 192
+	cmp	w1, 64
+	bne	.L1396
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	mov	w1, 0
+	mov	w2, 1
+	ldrh	w0, [x0, 584]
+	bl	gc_add_sblk
+	adrp	x0, .LANCHOR71+2110
+	mov	w1, 1
+	strh	w1, [x0, #:lo12:.LANCHOR71+2110]
+.L1395:
+	ldr	x0, [x29, 152]
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 10, .L1397
+	adrp	x2, .LANCHOR9
+	ldr	x1, [x24, #:lo12:.LANCHOR7]
+	uxtw	x6, w27
+	lsl	x0, x6, 2
+	ldr	x7, [x2, #:lo12:.LANCHOR9]
+	add	x5, x1, x0
+	ldr	w3, [x1, x0]
+	ldrh	w7, [x7, x6, lsl 1]
+	ldrb	w6, [x5, 3]
+	ldrb	w4, [x5, 2]
+	ubfx	x3, x3, 11, 8
+	ldrh	w2, [x1, x0]
+	adrp	x0, .LC88
+	mov	w1, w27
+	add	x0, x0, :lo12:.LC88
+	ubfx	x5, x4, 5, 3
+	and	w2, w2, 2047
+	ubfx	x4, x4, 3, 2
+	bl	printf
+.L1397:
+	ldr	x0, [x29, 152]
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 10, .L1398
+	ldr	w6, [x29, 128]
+	adrp	x2, .LANCHOR9
+	ldr	x1, [x24, #:lo12:.LANCHOR7]
+	ldr	x7, [x2, #:lo12:.LANCHOR9]
+	lsl	x0, x6, 2
+	add	x5, x1, x0
+	ldr	w3, [x1, x0]
+	ldrh	w2, [x1, x0]
+	adrp	x0, .LC89
+	ldrh	w7, [x7, x6, lsl 1]
+	add	x0, x0, :lo12:.LC89
+	ldrb	w6, [x5, 3]
+	ubfx	x3, x3, 11, 8
+	ldr	w1, [x29, 128]
+	and	w2, w2, 2047
+	ldrb	w4, [x5, 2]
+	ubfx	x5, x4, 5, 3
+	ubfx	x4, x4, 3, 2
+	bl	printf
+.L1398:
+	ldr	x0, [x22, #:lo12:.LANCHOR110]
+	ldrh	w1, [x29, 148]
+	strh	w1, [x0, 96]
+	ldr	w1, [x29, 136]
+	strh	w23, [x0, 98]
+	strh	w20, [x0, 92]
+	strh	w21, [x0, 94]
+	udiv	w3, w1, w26
+	ldr	w1, [x29, 144]
+	udiv	w4, w1, w25
+	strh	w3, [x0, 88]
+	strh	w4, [x0, 90]
+	ldr	x0, [x29, 152]
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 10, .L1399
+	adrp	x0, .LC90
+	and	w4, w4, 65535
+	and	w3, w3, 65535
+	mov	w2, w25
+	mov	w1, w26
+	add	x0, x0, :lo12:.LC90
+	bl	printf
+.L1399:
+	ldr	x0, [x29, 152]
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 10, .L1400
+	adrp	x0, .LANCHOR153
+	ldr	w3, [x29, 148]
+	mov	w4, w23
+	mov	w2, w21
+	ldrh	w6, [x0, #:lo12:.LANCHOR153]
+	adrp	x0, .LANCHOR152
+	mov	w1, w20
+	ldrh	w5, [x0, #:lo12:.LANCHOR152]
+	adrp	x0, .LC91
+	add	x0, x0, :lo12:.LC91
+	bl	printf
+.L1400:
+	sub	w0, w23, w21
+	str	w0, [x29, 144]
+	adrp	x0, .LANCHOR153
+	ldr	w1, [x29, 144]
+	ldrh	w0, [x0, #:lo12:.LANCHOR153]
+	cmp	w1, w0
+	bgt	.L1401
+	adrp	x1, .LANCHOR152
+	ldr	w0, [x29, 148]
+	ldrh	w1, [x1, #:lo12:.LANCHOR152]
+	sub	w0, w0, w20
+	cmp	w0, w1
+	ble	.L1429
+.L1401:
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	adrp	x26, .LANCHOR71
+	add	x26, x26, :lo12:.LANCHOR71
+	mov	w25, 0
+	mov	w23, 0
+	ldrh	w28, [x0, 580]
+	ldr	x0, [x22, #:lo12:.LANCHOR110]
+	ldrh	w27, [x0, 134]
+	adrp	x0, .LANCHOR6
+	add	x0, x0, :lo12:.LANCHOR6
+	str	x0, [x29, 136]
+	adrp	x0, .LANCHOR152
+	add	x0, x0, :lo12:.LANCHOR152
+	str	x0, [x29, 128]
+.L1403:
+	ldr	x0, [x29, 136]
+	ldrh	w0, [x0]
+	cmp	w27, w0
+	bcc	.L1413
+.L1412:
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	str	w28, [x0, 580]
+.L1402:
+	cbz	w21, .L1415
+	ldr	x2, [x22, #:lo12:.LANCHOR110]
+	adrp	x0, .LANCHOR6
+	ldrh	w5, [x0, #:lo12:.LANCHOR6]
+	ldr	x0, [x24, #:lo12:.LANCHOR7]
+	ldrh	w1, [x2, 134]
+	add	x0, x0, x1, uxth 2
+.L1416:
+	cmp	w1, w5
+	bcc	.L1418
+	ldrh	w0, [x2, 72]
+	add	w0, w21, w0
+	strh	w0, [x2, 72]
+	ldrh	w0, [x2, 98]
+	cmp	w21, w0
+	bcs	.L1415
+	sub	w21, w0, w21
+	strh	w21, [x2, 98]
+.L1415:
+	cbz	w20, .L1421
+	ldr	x2, [x22, #:lo12:.LANCHOR110]
+	adrp	x0, .LANCHOR6
+	ldrh	w6, [x0, #:lo12:.LANCHOR6]
+	ldr	x0, [x24, #:lo12:.LANCHOR7]
+	ldrh	w1, [x2, 134]
+	add	x0, x0, x1, uxth 2
+.L1422:
+	cmp	w1, w6
+	bcc	.L1424
+	ldrh	w0, [x2, 74]
+	add	w0, w20, w0
+	strh	w0, [x2, 74]
+	ldrh	w0, [x2, 96]
+	cmp	w20, w0
+	bcs	.L1421
+	sub	w20, w0, w20
+	strh	w20, [x2, 96]
+.L1421:
+	mov	w1, 5
+	mov	w0, 0
+	bl	zftl_get_gc_node
+	and	w1, w0, 65535
+	mov	w2, 65535
+	cmp	w1, w2
+	beq	.L1379
+	adrp	x2, .LANCHOR9
+	ubfiz	x1, x1, 1, 16
+	ldr	x3, [x2, #:lo12:.LANCHOR9]
+	adrp	x2, .LANCHOR95
+	ldrh	w2, [x2, #:lo12:.LANCHOR95]
+	ldrh	w1, [x3, x1]
+	cmp	w1, w2, lsr 1
+	bhi	.L1379
+	add	w23, w23, 1
+	mov	w2, 1
+	mov	w1, 0
+	bl	gc_add_sblk
+.L1379:
+	add	w0, w23, w25
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 160
+	ret
+.L1389:
+	uxtw	x7, w28
+	ldr	x6, [x24, #:lo12:.LANCHOR7]
+	lsl	x2, x7, 2
+	add	x11, x6, x2
+	ldrb	w0, [x11, 2]
+	and	w1, w0, 224
+	cmp	w1, 224
+	beq	.L1381
+	ubfx	x4, x0, 3, 2
+	tbz	x4, 0, .L1382
+	ldr	w0, [x6, x2]
+	ldrh	w1, [x6, x2]
+	ubfx	x0, x0, 11, 8
+	and	w1, w1, 2047
+.L1383:
+	ldr	w3, [x29, 136]
+	add	w26, w26, 1
+	and	w26, w26, 65535
+	cmp	w20, w1
+	add	w3, w3, w1
+	str	w3, [x29, 136]
+	bls	.L1427
+	ldr	x3, [x19, #:lo12:.LANCHOR10]
+	mov	w20, w1
+	strh	w28, [x3, 586]
+.L1427:
+	ldr	w3, [x29, 148]
+	cmp	w3, w1
+	bcs	.L1386
+	mov	w27, w28
+	str	w1, [x29, 148]
+.L1386:
+	mov	w3, 65535
+	cmp	w0, w3
+	bne	.L1385
+.L1387:
+	cmp	w0, 9
+	ccmp	w1, 9, 0, hi
+	bhi	.L1381
+	ldr	w0, [x8]
+	tbz	x0, 8, .L1381
+	adrp	x0, .LANCHOR9
+	ldr	w3, [x6, x2]
+	ldrh	w2, [x6, x2]
+	mov	w1, w28
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrb	w6, [x11, 3]
+	ubfx	x3, x3, 11, 8
+	ldrb	w5, [x11, 2]
+	and	w2, w2, 2047
+	str	x8, [x29, 120]
+	ldrh	w7, [x0, x7, lsl 1]
+	adrp	x0, .LC85
+	str	x10, [x29, 152]
+	ubfx	x5, x5, 5, 3
+	add	x0, x0, :lo12:.LC85
+	bl	printf
+	ldr	x8, [x29, 120]
+	ldr	x10, [x29, 152]
+.L1381:
+	add	w28, w28, 1
+	and	w28, w28, 65535
+	b	.L1380
+.L1382:
+	tst	w0, 24
+	bne	.L1384
+	ldrh	w1, [x6, x2]
+	mov	w0, 65535
+	and	w1, w1, 2047
+	b	.L1383
+.L1384:
+	ldr	w0, [x6, x2]
+	mov	w1, 65535
+	ubfx	x0, x0, 11, 8
+.L1385:
+	ldr	w3, [x29, 144]
+	add	w25, w25, 1
+	and	w25, w25, 65535
+	cmp	w21, w0
+	add	w3, w3, w0
+	str	w3, [x29, 144]
+	bls	.L1388
+	ldr	x3, [x19, #:lo12:.LANCHOR10]
+	mov	w21, w0
+	strh	w28, [x3, 584]
+.L1388:
+	cmp	w23, w0
+	bcs	.L1387
+	mov	w23, w0
+	str	w28, [x29, 128]
+	b	.L1387
+.L1393:
+	cbnz	w3, .L1392
+	ldr	x1, [x19, #:lo12:.LANCHOR10]
+	mov	w0, 65535
+	ldrh	w2, [x1, 590]
+	cmp	w2, w0
+	bne	.L1392
+	ldrh	w0, [x1, 586]
+	ldrh	w1, [x1, 588]
+	cmp	w1, w0
+	beq	.L1392
+	bl	zftl_remove_free_node
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	ldrh	w1, [x0, 586]
+	strh	w1, [x0, 590]
+	mov	w1, -1
+	strh	w1, [x0, 586]
+	b	.L1392
+.L1396:
+	and	w0, w0, 248
+	cmp	w0, 16
+	bne	.L1395
+	ldr	x1, [x19, #:lo12:.LANCHOR10]
+	mov	w0, 65535
+	ldrh	w2, [x1, 588]
+	cmp	w2, w0
+	bne	.L1395
+	ldrh	w0, [x1, 584]
+	ldrh	w1, [x1, 590]
+	cmp	w1, w0
+	beq	.L1395
+	bl	zftl_remove_free_node
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	ldrh	w1, [x0, 584]
+	strh	w1, [x0, 588]
+	mov	w1, -1
+	strh	w1, [x0, 584]
+	b	.L1395
+.L1413:
+	add	w7, w28, 1
+	ldr	x4, [x24, #:lo12:.LANCHOR7]
+	and	w28, w7, 65535
+	cmp	w0, w28
+	csel	w28, w28, wzr, hi
+	uxtw	x8, w28
+	lsl	x3, x8, 2
+	add	x0, x4, x3
+	ldrb	w0, [x0, 2]
+	tst	w0, 192
+	beq	.L1405
+	and	w2, w0, 224
+	cmp	w2, 224
+	beq	.L1405
+	ubfx	x0, x0, 3, 2
+	and	w1, w0, 1
+	tbz	x0, 0, .L1406
+	cmp	w2, 160
+.L1493:
+	bne	.L1408
+	adrp	x0, .LANCHOR153
+	ldr	w2, [x29, 144]
+	ldrh	w0, [x0, #:lo12:.LANCHOR153]
+	cmp	w2, w0
+	ble	.L1409
+	ldr	w0, [x4, x3]
+	ubfx	x0, x0, 11, 8
+	cmp	w0, w21
+	bls	.L1410
+	cbz	w1, .L1409
+	ldrh	w0, [x4, x3]
+	and	w0, w0, 2047
+	cmp	w0, w20
+	bgt	.L1409
+.L1410:
+	stp	x4, x8, [x29, 104]
+	mov	w2, 1
+	str	x3, [x29, 120]
+	mov	w1, 0
+	mov	w0, w28
+	bl	gc_add_sblk
+	mov	w0, 1
+	strh	w0, [x26, 2110]
+	ldr	x0, [x29, 152]
+	add	w23, w23, 1
+	ldp	x4, x8, [x29, 104]
+	ldr	x3, [x29, 120]
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 10, .L1409
+	adrp	x0, .LANCHOR9
+	ldr	w6, [x4, x3]
+	ldrh	w5, [x4, x3]
+	ldr	x1, [x0, #:lo12:.LANCHOR9]
+	ldr	x0, [x24, #:lo12:.LANCHOR7]
+	ubfx	x6, x6, 11, 8
+	ldrh	w4, [x26, 56]
+	and	w5, w5, 2047
+	add	x3, x0, x3
+	adrp	x0, .LC92
+	add	x0, x0, :lo12:.LC92
+	ldrb	w2, [x3, 2]
+	ldrh	w3, [x1, x8, lsl 1]
+	mov	w1, w28
+	ubfx	x2, x2, 5, 3
+.L1494:
+	bl	printf
+.L1409:
+	cmp	w23, 4
+	ccmp	w25, 4, 2, ls
+	bhi	.L1412
+.L1405:
+	add	w27, w27, 1
+	and	w27, w27, 65535
+	b	.L1403
+.L1406:
+	cmp	w0, 2
+	b	.L1493
+.L1408:
+	ldr	x2, [x29, 128]
+	ldr	w0, [x29, 148]
+	sub	w0, w0, w20
+	ldrh	w2, [x2]
+	cmp	w0, w2
+	ble	.L1409
+	ldrh	w0, [x4, x3]
+	add	w2, w20, 8
+	and	w0, w0, 2047
+	cmp	w0, w2
+	ble	.L1411
+	cbz	w1, .L1409
+	ldr	w0, [x4, x3]
+	add	w1, w21, 4
+	ubfx	x0, x0, 11, 8
+	cmp	w0, w1
+	bgt	.L1409
+.L1411:
+	stp	x4, x8, [x29, 104]
+	mov	w2, 1
+	str	x3, [x29, 120]
+	mov	w1, 0
+	mov	w0, w28
+	bl	gc_add_sblk
+	mov	w0, 1
+	strh	w0, [x26, 2110]
+	ldr	x0, [x29, 152]
+	add	w25, w25, 1
+	ldp	x4, x8, [x29, 104]
+	ldr	x3, [x29, 120]
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 10, .L1409
+	adrp	x0, .LANCHOR9
+	ldr	w6, [x4, x3]
+	ldrh	w5, [x4, x3]
+	ldr	x1, [x0, #:lo12:.LANCHOR9]
+	ldr	x0, [x24, #:lo12:.LANCHOR7]
+	ubfx	x6, x6, 11, 8
+	and	w5, w5, 2047
+	ldrh	w4, [x26, 56]
+	add	x3, x0, x3
+	adrp	x0, .LC93
+	add	x0, x0, :lo12:.LC93
+	ldrb	w2, [x3, 2]
+	ldrh	w3, [x1, x8, lsl 1]
+	mov	w1, w28
+	ubfx	x2, x2, 5, 3
+	b	.L1494
+.L1429:
+	mov	w25, 0
+	mov	w23, 0
+	b	.L1402
+.L1418:
+	ldr	w3, [x0]
+	ubfx	x4, x3, 11, 8
+	cmp	w21, w4
+	bhi	.L1417
+	ldrb	w6, [x0, 2]
+	tst	w6, 24
+	beq	.L1417
+	sub	w4, w4, w21
+	bfi	w3, w4, 11, 8
+	str	w3, [x0]
+.L1417:
+	add	w1, w1, 1
+	add	x0, x0, 4
+	and	w1, w1, 65535
+	b	.L1416
+.L1424:
+	ldrh	w3, [x0]
+	and	w4, w3, 2047
+	cmp	w4, w20
+	blt	.L1423
+	ldrb	w5, [x0, 2]
+	and	w5, w5, 24
+	cmp	w5, 16
+	beq	.L1423
+	sub	w4, w4, w20
+	bfi	w3, w4, 0, 11
+	strh	w3, [x0]
+.L1423:
+	add	w1, w1, 1
+	add	x0, x0, 4
+	and	w1, w1, 65535
+	b	.L1422
+.L1428:
+	mov	w25, 0
+	mov	w23, 0
+	b	.L1379
+	.size	gc_static_wearleveling, .-gc_static_wearleveling
+	.section	.text.zftl_sblk_list_init,"ax",@progbits
+	.align	2
+	.global	zftl_sblk_list_init
+	.type	zftl_sblk_list_init, %function
+zftl_sblk_list_init:
+	stp	x29, x30, [sp, -208]!
+	adrp	x8, .LANCHOR4
+	mov	w0, 6
+	mov	w1, 0
+	add	x29, sp, 0
+	stp	x27, x28, [sp, 80]
+	adrp	x28, .LANCHOR6
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR99
+	ldrh	w2, [x28, #:lo12:.LANCHOR6]
+	mov	w27, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR97
+	stp	x23, x24, [sp, 48]
+	adrp	x21, .LANCHOR93
+	stp	x25, x26, [sp, 64]
+	adrp	x26, .LANCHOR110
+	mul	w2, w2, w0
+	ldr	x0, [x8, #:lo12:.LANCHOR4]
+	str	x8, [x29, 192]
+	adrp	x25, .LANCHOR103
+	adrp	x24, .LANCHOR105
+	adrp	x23, .LANCHOR107
+	bl	ftl_memset
+	strh	wzr, [x25, #:lo12:.LANCHOR103]
+	adrp	x0, .LANCHOR109
+	adrp	x3, .LANCHOR80
+	adrp	x2, .LANCHOR86
+	mov	w1, 32
+	strh	w1, [x0, #:lo12:.LANCHOR109]
+	adrp	x11, .LANCHOR104
+	ldrb	w0, [x3, #:lo12:.LANCHOR80]
+	adrp	x10, .LANCHOR106
+	ldrh	w1, [x2, #:lo12:.LANCHOR86]
+	adrp	x7, .LANCHOR108
+	adrp	x6, .LANCHOR89
+	adrp	x5, .LANCHOR12
+	adrp	x4, .LANCHOR88
+	ldr	x8, [x29, 192]
+	str	xzr, [x11, #:lo12:.LANCHOR104]
+	mul	w1, w0, w1
+	mov	w0, 32768
+	str	xzr, [x10, #:lo12:.LANCHOR106]
+	str	xzr, [x7, #:lo12:.LANCHOR108]
+	str	xzr, [x6, #:lo12:.LANCHOR89]
+	sdiv	w0, w0, w1
+	str	xzr, [x5, #:lo12:.LANCHOR12]
+	str	xzr, [x4, #:lo12:.LANCHOR88]
+	strh	wzr, [x24, #:lo12:.LANCHOR105]
+	strh	wzr, [x23, #:lo12:.LANCHOR107]
+	sxth	w0, w0
+	str	w0, [x29, 204]
+	ldr	x0, [x26, #:lo12:.LANCHOR110]
+	strh	wzr, [x22, #:lo12:.LANCHOR97]
+	strh	wzr, [x21, #:lo12:.LANCHOR93]
+	strh	wzr, [x20, #:lo12:.LANCHOR99]
+	strh	wzr, [x0, 146]
+	ldrsh	w19, [x0, 134]
+	add	x0, x28, :lo12:.LANCHOR6
+	str	x0, [x29, 192]
+	adrp	x0, .LANCHOR154
+	add	x0, x0, :lo12:.LANCHOR154
+	adrp	x28, .LC0
+	str	x0, [x29, 112]
+	add	x0, x28, :lo12:.LC0
+	stp	x2, x3, [x29, 120]
+	stp	x4, x5, [x29, 136]
+	stp	x6, x7, [x29, 152]
+	stp	x10, x11, [x29, 168]
+	str	x8, [x29, 184]
+	str	x0, [x29, 104]
+.L1496:
+	ldr	x0, [x29, 192]
+	ldrh	w0, [x0]
+	cmp	w19, w0
+	blt	.L1513
+	ldr	x0, [x26, #:lo12:.LANCHOR110]
+	ldrh	w1, [x25, #:lo12:.LANCHOR103]
+	ldp	x27, x28, [sp, 80]
+	strh	w1, [x0, 114]
+	ldrh	w1, [x24, #:lo12:.LANCHOR105]
+	strh	w1, [x0, 118]
+	ldrh	w1, [x23, #:lo12:.LANCHOR107]
+	strh	w1, [x0, 116]
+	ldrh	w1, [x22, #:lo12:.LANCHOR97]
+	strh	w1, [x0, 122]
+	ldrh	w1, [x21, #:lo12:.LANCHOR93]
+	strh	w1, [x0, 120]
+	ldrh	w1, [x20, #:lo12:.LANCHOR99]
+	strh	w1, [x0, 124]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 208
+	ret
+.L1513:
+	adrp	x0, .LANCHOR7
+	sxtw	x2, w19
+	ldr	x3, [x0, #:lo12:.LANCHOR7]
+	add	x28, x3, x2, lsl 2
+	ldrb	w5, [x28, 3]
+	cbz	w5, .L1514
+	ldr	x0, [x29, 128]
+	mov	w1, 0
+	ldr	x6, [x26, #:lo12:.LANCHOR110]
+	ldrb	w7, [x0, #:lo12:.LANCHOR80]
+	ldr	x0, [x29, 120]
+	ldrh	w8, [x0, #:lo12:.LANCHOR86]
+	mov	w0, 0
+.L1498:
+	cmp	w1, w7
+	blt	.L1501
+	cbz	w0, .L1502
+	mov	w1, 32768
+	sdiv	w0, w1, w0
+	add	w0, w0, 1
+	sxth	w0, w0
+.L1497:
+	ldr	x3, [x29, 184]
+	mov	w1, 6
+	smull	x1, w19, w1
+	ldr	x4, [x3, #:lo12:.LANCHOR4]
+	add	x5, x4, x1
+	strh	w0, [x5, 4]
+	mov	w0, -1
+	strh	w0, [x5, 2]
+	strh	w0, [x4, x1]
+	mov	w1, 224
+	ldrb	w0, [x28, 2]
+	and	w0, w0, 224
+	cmp	w0, 32
+	ccmp	w0, w1, 4, ne
+	beq	.L1503
+	adrp	x1, .LANCHOR10
+	ldr	x1, [x1, #:lo12:.LANCHOR10]
+	ldrh	w4, [x1, 16]
+	cmp	w19, w4
+	beq	.L1503
+	ldrh	w4, [x1, 48]
+	cmp	w19, w4
+	beq	.L1503
+	ldrh	w1, [x1, 80]
+	cmp	w19, w1
+	beq	.L1503
+	cmp	w0, 64
+	bne	.L1504
+	ldr	x0, [x29, 144]
+	add	x2, x22, :lo12:.LANCHOR97
+	mov	w1, w19
+	add	x0, x0, :lo12:.LANCHOR12
+.L1520:
+	bl	_insert_data_list
+.L1503:
+	add	w19, w19, 1
+	sxth	w19, w19
+	b	.L1496
+.L1501:
+	asr	w4, w5, w1
+	tbnz	x4, 0, .L1499
+	add	w0, w8, w0
+	sxth	w0, w0
+.L1500:
+	add	w1, w1, 1
+	b	.L1498
+.L1499:
+	ldrh	w4, [x6, 146]
+	add	w4, w4, 1
+	strh	w4, [x6, 146]
+	b	.L1500
+.L1502:
+	ldrb	w1, [x28, 2]
+	mov	w4, -1
+	orr	w1, w1, -32
+	strb	w1, [x28, 2]
+	adrp	x1, .LANCHOR9
+	ldr	x1, [x1, #:lo12:.LANCHOR9]
+	strh	w4, [x1, x2, lsl 1]
+	b	.L1497
+.L1514:
+	ldr	w0, [x29, 204]
+	b	.L1497
+.L1504:
+	cmp	w0, 96
+	bne	.L1505
+	ldr	x0, [x29, 152]
+	add	x2, x20, :lo12:.LANCHOR99
+	mov	w1, w19
+	add	x0, x0, :lo12:.LANCHOR89
+	b	.L1520
+.L1505:
+	cmp	w0, 160
+	bne	.L1506
+	ldr	x0, [x29, 136]
+	add	x2, x21, :lo12:.LANCHOR93
+	mov	w1, w19
+	add	x0, x0, :lo12:.LANCHOR88
+	b	.L1520
+.L1506:
+	cbnz	w0, .L1503
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrh	w2, [x0, x2, lsl 1]
+	cbz	w2, .L1507
+	cmp	w27, 2
+	bgt	.L1508
+	mov	w1, w19
+	adrp	x0, .LC94
+	add	x0, x0, :lo12:.LC94
+	bl	printf
+	ldrb	w0, [x28, 2]
+	add	w27, w27, 1
+	sxth	w27, w27
+	tbz	x0, 4, .L1509
+	mov	w1, 5
+.L1519:
+	bfi	w0, w1, 5, 3
+	strb	w0, [x28, 2]
+	mov	w2, 0
+	mov	w1, 1
+	mov	w0, w19
+	bl	gc_add_sblk
+	b	.L1503
+.L1509:
+	mov	w1, 2
+	b	.L1519
+.L1508:
+	ldp	x0, x1, [x29, 104]
+	mov	w2, 651
+	bl	printf
+.L1507:
+	ldrb	w0, [x28, 2]
+	ands	w0, w0, 24
+	bne	.L1511
+	ldr	x0, [x29, 176]
+	add	x2, x25, :lo12:.LANCHOR103
+	mov	w1, w19
+	add	x0, x0, :lo12:.LANCHOR104
+.L1521:
+	bl	_insert_free_list
+	b	.L1503
+.L1511:
+	cmp	w0, 16
+	bne	.L1512
+	ldr	x0, [x29, 168]
+	add	x2, x24, :lo12:.LANCHOR105
+	mov	w1, w19
+	add	x0, x0, :lo12:.LANCHOR106
+	b	.L1521
+.L1512:
+	ldr	x0, [x29, 160]
+	add	x2, x23, :lo12:.LANCHOR107
+	mov	w1, w19
+	add	x0, x0, :lo12:.LANCHOR108
+	b	.L1521
+	.size	zftl_sblk_list_init, .-zftl_sblk_list_init
+	.section	.text.ftl_open_sblk_init,"ax",@progbits
+	.align	2
+	.global	ftl_open_sblk_init
+	.type	ftl_open_sblk_init, %function
+ftl_open_sblk_init:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR80
+	stp	x23, x24, [sp, 48]
+	adrp	x22, .LC82
+	stp	x19, x20, [sp, 16]
+	adrp	x24, .LANCHOR95
+	mov	x19, x0
+	mov	w23, w1
+	add	x24, x24, :lo12:.LANCHOR95
+	add	x21, x21, :lo12:.LANCHOR80
+	add	x22, x22, :lo12:.LC82
+	stp	x25, x26, [sp, 64]
+.L1523:
+	mov	w25, 65535
+.L1524:
+	mov	w0, w23
+	bl	ftl_alloc_sblk
+	and	w20, w0, 65535
+	cmp	w20, w25
+	beq	.L1524
+	mov	w1, 0
+	mov	w0, w20
+	bl	ftl_erase_sblk
+	add	x1, x19, 16
+	mov	w0, w20
+	bl	ftl_get_blk_list_in_sblk
+	and	w0, w0, 255
+	ldrh	w1, [x24]
+	cmp	w23, 2
+	strb	w0, [x19, 9]
+	strh	w20, [x19]
+	strh	wzr, [x19, 2]
+	mul	w0, w1, w0
+	strb	wzr, [x19, 5]
+	strh	w0, [x19, 6]
+	strh	wzr, [x19, 10]
+	strb	w23, [x19, 4]
+	beq	.L1527
+	ldrb	w0, [x21]
+	mul	w0, w1, w0
+	and	w0, w0, 65535
+.L1525:
+	ldrb	w2, [x21]
+	adrp	x26, .LANCHOR9
+	strh	w0, [x19, 12]
+	ubfiz	x25, x20, 1, 16
+	mul	w2, w2, w1
+	adrp	x1, .LANCHOR117
+	ldr	x3, [x1, #:lo12:.LANCHOR117]
+	mov	w1, 255
+	lsl	w2, w2, 2
+	add	x0, x3, x0, uxth 2
+	bl	ftl_memset
+	ldr	x0, [x26, #:lo12:.LANCHOR9]
+	ldrh	w1, [x19, 6]
+	strh	w1, [x0, x25]
+	ldrb	w0, [x19, 9]
+	cbnz	w0, .L1522
+	mov	w1, w20
+	mov	x0, x22
+	bl	printf
+	ldr	x0, [x26, #:lo12:.LANCHOR9]
+	mov	w1, -1
+	strh	w1, [x0, x25]
+	mov	w0, 7
+	strb	w0, [x19, 4]
+	b	.L1523
+.L1527:
+	mov	w0, 0
+	b	.L1525
+.L1522:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+	.size	ftl_open_sblk_init, .-ftl_open_sblk_init
+	.section	.text.pm_free_sblk,"ax",@progbits
+	.align	2
+	.global	pm_free_sblk
+	.type	pm_free_sblk, %function
+pm_free_sblk:
+	stp	x29, x30, [sp, -384]!
+	adrp	x0, .LANCHOR155
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	ldrh	w1, [x0, #:lo12:.LANCHOR155]
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	cmp	w1, 128
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	bls	.L1531
+	adrp	x1, .LANCHOR156
+	adrp	x0, .LC0
+	mov	w2, 94
+	add	x1, x1, :lo12:.LANCHOR156
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1531:
+	adrp	x5, .LANCHOR110
+	mov	x26, x5
+	ldrh	w3, [x19, #:lo12:.LANCHOR155]
+	mov	w1, 0
+	ldr	x0, [x5, #:lo12:.LANCHOR110]
+	mov	w19, 0
+	mov	w4, 65535
+	add	x0, x0, 416
+	ldrh	w2, [x0, 272]
+.L1534:
+	ldrh	w6, [x0]
+	cmp	w6, w4
+	beq	.L1532
+	add	w1, w1, 1
+	and	w1, w1, 65535
+.L1532:
+	cmp	w1, w2
+	bcs	.L1533
+	cmp	w1, w3
+	bcs	.L1533
+	add	w19, w19, 1
+	add	x0, x0, 2
+	and	w19, w19, 65535
+	cmp	w19, 128
+	bne	.L1534
+.L1533:
+	add	w19, w19, 1
+	mov	w0, 128
+	and	w19, w19, 65535
+	add	x22, x29, 128
+	cmp	w19, 129
+	mov	w2, 256
+	csel	w19, w19, w0, ne
+	mov	w1, 0
+	mov	x0, x22
+	adrp	x23, .LANCHOR76
+	bl	ftl_memset
+	adrp	x0, .LANCHOR75
+	ldr	x6, [x26, #:lo12:.LANCHOR110]
+	mov	w2, 24
+	ldrb	w11, [x23, #:lo12:.LANCHOR76]
+	ldrh	w10, [x0, #:lo12:.LANCHOR75]
+	adrp	x0, .LANCHOR32
+	add	x4, x6, 704
+	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	ldrh	w1, [x6, 698]
+	sub	w2, w2, w0
+	sub	w0, w2, w10
+	add	x1, x1, 176
+	mov	w2, 1
+	add	x1, x6, x1, lsl 2
+	lsl	w2, w2, w0
+	sub	w2, w2, #1
+.L1536:
+	cmp	x1, x4
+	bne	.L1539
+	adrp	x24, .LANCHOR80
+	adrp	x25, .LANCHOR95
+	adrp	x27, .LC95
+	adrp	x28, .LANCHOR14
+	ldrb	w21, [x24, #:lo12:.LANCHOR80]
+	add	x23, x23, :lo12:.LANCHOR76
+	ldrh	w0, [x25, #:lo12:.LANCHOR95]
+	add	x27, x27, :lo12:.LC95
+	add	x28, x28, :lo12:.LANCHOR14
+	mov	x20, 0
+	mov	w7, 65535
+	str	wzr, [x29, 124]
+	mul	w21, w21, w0
+	and	w21, w21, 65535
+.L1545:
+	ldr	x0, [x26, #:lo12:.LANCHOR110]
+	and	w6, w20, 65535
+	ldrb	w2, [x23]
+	mov	w8, w20
+	add	x1, x0, x20, sxtw 1
+	ldrh	w3, [x1, 416]
+	ldrh	w1, [x0, 692]
+	sdiv	w1, w1, w2
+	cmp	w1, w3
+	bne	.L1540
+	ldrb	w1, [x24, #:lo12:.LANCHOR80]
+	ldrh	w2, [x25, #:lo12:.LANCHOR95]
+	mul	w1, w1, w2
+	strh	w1, [x22, x20, lsl 1]
+.L1540:
+	ldrh	w2, [x22, x20, lsl 1]
+	cmp	w2, w21
+	bcs	.L1541
+	cmp	w2, 0
+	ldr	w1, [x29, 124]
+	csel	w21, w21, w2, eq
+	csel	w1, w1, w6, eq
+	str	w1, [x29, 124]
+.L1541:
+	ldrh	w1, [x0, 74]
+	cmp	w1, 2
+	bls	.L1542
+	mov	w1, 65535
+	cmp	w3, w1
+	beq	.L1542
+	adrp	x4, .LANCHOR7
+	ubfiz	x1, x3, 2, 16
+	ldrh	w0, [x0, 92]
+	ldr	x4, [x4, #:lo12:.LANCHOR7]
+	add	w0, w0, 4
+	ldrh	w4, [x4, x1]
+	and	w4, w4, 2047
+	cmp	w4, w0
+	bgt	.L1542
+	mov	w1, w8
+	str	w6, [x29, 104]
+	str	w8, [x29, 112]
+	mov	x0, x27
+	bl	printf
+	ldr	w6, [x29, 104]
+	ldr	w8, [x29, 112]
+	mov	w7, w6
+.L1542:
+	ldrh	w0, [x22, x20, lsl 1]
+	cbnz	w0, .L1543
+	ldr	x0, [x26, #:lo12:.LANCHOR110]
+	sxtw	x6, w8
+	add	x1, x6, 208
+	ldrh	w3, [x0, x1, lsl 1]
+	mov	w1, 65535
+	cmp	w3, w1
+	beq	.L1543
+	ldr	w1, [x28]
+	tbz	x1, 12, .L1544
+	ldrh	w4, [x0, 688]
+	mov	w2, 0
+	str	x6, [x29, 104]
+	mov	w1, w8
+	str	w7, [x29, 112]
+	adrp	x0, .LC96
+	add	x0, x0, :lo12:.LC96
+	bl	printf
+	ldr	w7, [x29, 112]
+	ldr	x6, [x29, 104]
+.L1544:
+	ldr	x0, [x26, #:lo12:.LANCHOR110]
+	add	x6, x6, 208
+	str	w7, [x29, 104]
+	str	x6, [x29, 112]
+	ldrh	w0, [x0, x6, lsl 1]
+	bl	ftl_free_sblk
+	ldr	x0, [x26, #:lo12:.LANCHOR110]
+	mov	w1, -1
+	ldr	x6, [x29, 112]
+	ldr	w7, [x29, 104]
+	strh	w1, [x0, x6, lsl 1]
+	ldrh	w1, [x0, 688]
+	sub	w1, w1, #1
+	strh	w1, [x0, 688]
+.L1543:
+	add	x20, x20, 1
+	cmp	w19, w20, uxth
+	bhi	.L1545
+	mov	w0, 65535
+	cmp	w7, w0
+	ldr	w0, [x29, 124]
+	ldp	x19, x20, [sp, 16]
+	csel	w0, w0, w7, eq
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 384
+	ret
+.L1539:
+	ldr	w0, [x4]
+	add	x7, x6, 416
+	mov	x3, 0
+	lsr	w0, w0, w10
+	and	w0, w0, w2
+	udiv	w0, w0, w11
+	and	w0, w0, 65535
+.L1538:
+	ldrh	w8, [x7]
+	cmp	w8, w0
+	bne	.L1537
+	ldrh	w8, [x22, x3, lsl 1]
+	add	w8, w8, 1
+	strh	w8, [x22, x3, lsl 1]
+.L1537:
+	add	x3, x3, 1
+	add	x7, x7, 2
+	cmp	w19, w3, uxth
+	bhi	.L1538
+	add	x4, x4, 4
+	b	.L1536
+	.size	pm_free_sblk, .-pm_free_sblk
+	.section	.text.ftl_memcpy,"ax",@progbits
+	.align	2
+	.global	ftl_memcpy
+	.type	ftl_memcpy, %function
+ftl_memcpy:
+	uxtw	x2, w2
+	b	memcpy
+	.size	ftl_memcpy, .-ftl_memcpy
+	.section	.text.flash_info_data_init,"ax",@progbits
+	.align	2
+	.global	flash_info_data_init
+	.type	flash_info_data_init, %function
+flash_info_data_init:
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR14
+	add	x29, sp, 0
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	str	x19, [sp, 16]
+	tbz	x0, 12, .L1558
+	adrp	x2, .LANCHOR157
+	adrp	x0, .LC97
+	add	x2, x2, :lo12:.LANCHOR157
+	mov	w1, 119
+	add	x0, x0, :lo12:.LC97
+	bl	printf
+.L1558:
+	adrp	x19, .LANCHOR27
+	mov	w2, 2048
+	mov	w1, 0
+	ldr	x0, [x19, #:lo12:.LANCHOR27]
+	bl	ftl_memset
+	ldr	x0, [x19, #:lo12:.LANCHOR27]
+	mov	w1, 21321
+	movk	w1, 0x5359, lsl 16
+	mov	w2, 32
+	add	x0, x0, 80
+	str	w1, [x0, -80]
+	mov	w1, 2032
+	str	w1, [x0, -72]
+	mov	w1, 1
+	strh	w1, [x0, -64]
+	adrp	x1, .LANCHOR20
+	add	x1, x1, :lo12:.LANCHOR20
+	bl	ftl_memcpy
+	ldr	x0, [x19, #:lo12:.LANCHOR27]
+	mov	w2, 32
+	ldr	x19, [sp, 16]
+	adrp	x1, .LANCHOR33
+	ldp	x29, x30, [sp], 32
+	add	x1, x1, :lo12:.LANCHOR33
+	add	x0, x0, 48
+	b	ftl_memcpy
+	.size	flash_info_data_init, .-flash_info_data_init
+	.section	.text.ftl_memcpy32,"ax",@progbits
+	.align	2
+	.global	ftl_memcpy32
+	.type	ftl_memcpy32, %function
+ftl_memcpy32:
+	mov	x3, 0
+.L1564:
+	cmp	w2, w3
+	bhi	.L1565
+	ret
+.L1565:
+	ldr	w4, [x1, x3, lsl 2]
+	str	w4, [x0, x3, lsl 2]
+	add	x3, x3, 1
+	b	.L1564
+	.size	ftl_memcpy32, .-ftl_memcpy32
+	.section	.text.ftl_memcmp,"ax",@progbits
+	.align	2
+	.global	ftl_memcmp
+	.type	ftl_memcmp, %function
+ftl_memcmp:
+	uxtw	x2, w2
+	b	memcmp
+	.size	ftl_memcmp, .-ftl_memcmp
+	.section	.text.rknand_get_clk_rate,"ax",@progbits
+	.align	2
+	.global	rknand_get_clk_rate
+	.type	rknand_get_clk_rate, %function
+rknand_get_clk_rate:
+	mov	w0, 19712
+	movk	w0, 0x8d2, lsl 16
+	ret
+	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
+	.section	.text.ftl_malloc,"ax",@progbits
+	.align	2
+	.global	ftl_malloc
+	.type	ftl_malloc, %function
+ftl_malloc:
+	mov	w1, 0
+	sxtw	x0, w0
+	b	kmalloc
+	.size	ftl_malloc, .-ftl_malloc
+	.section	.text.nandc_init,"ax",@progbits
+	.align	2
+	.global	nandc_init
+	.type	nandc_init, %function
+nandc_init:
+	stp	x29, x30, [sp, -64]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR14
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	str	wzr, [x29, 56]
+	tbz	x0, 12, .L1570
+	adrp	x1, .LANCHOR158
+	adrp	x0, .LC98
+	mov	x2, x19
+	add	x1, x1, :lo12:.LANCHOR158
+	add	x0, x0, :lo12:.LC98
+	bl	printf
+.L1570:
+	adrp	x20, .LANCHOR28
+	mov	w0, 6
+	ldr	w2, [x19, 352]
+	mov	w1, 12336
+	strb	w0, [x20, #:lo12:.LANCHOR28]
+	adrp	x0, .LANCHOR13
+	movk	w1, 0x5638, lsl 16
+	mov	x22, x0
+	str	x19, [x0, #:lo12:.LANCHOR13]
+	cmp	w2, w1
+	bne	.L1571
+	mov	w0, 8
+	strb	w0, [x20, #:lo12:.LANCHOR28]
+.L1571:
+	ldr	w1, [x19, 128]
+	mov	w0, 12336
+	movk	w0, 0x5639, lsl 16
+	cmp	w1, w0
+	bne	.L1572
+	mov	w0, 9
+	strb	w0, [x20, #:lo12:.LANCHOR28]
+.L1572:
+	ldrb	w0, [x20, #:lo12:.LANCHOR28]
+	cmp	w0, 9
+	adrp	x0, .LANCHOR51
+	bne	.L1573
+	mov	w1, 1
+	strb	w1, [x0, #:lo12:.LANCHOR51]
+	ldr	w0, [x29, 56]
+	mov	w1, 2
+	orr	w0, w0, 256
+	str	w0, [x29, 56]
+	ldr	w0, [x29, 56]
+	bfi	w0, w1, 18, 3
+	str	w0, [x29, 56]
+	ldr	w0, [x29, 56]
+	str	w0, [x19]
+	str	wzr, [x19, 520]
+	mov	w0, 4161
+	str	w0, [x19, 4]
+	mov	w0, 8321
+	str	w0, [x19, 8]
+	mov	w0, 4099
+	movk	w0, 0x10, lsl 16
+	str	w0, [x19, 80]
+	mov	w0, 38
+	str	w0, [x19, 84]
+	mov	w0, 39
+	str	w0, [x19, 84]
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L1575
+	ldr	w1, [x19]
+	ldr	w2, [x19, 8]
+	ldr	w3, [x19, 80]
+	ldr	w4, [x19, 84]
+	ldr	w5, [x19, 88]
+.L1588:
+	adrp	x0, .LC99
+	add	x0, x0, :lo12:.LC99
+	bl	printf
+.L1575:
+	adrp	x0, .LANCHOR52
+	mov	w1, 1
+	strb	w1, [x0, #:lo12:.LANCHOR52]
+	adrp	x0, .LANCHOR54
+	strh	wzr, [x0, #:lo12:.LANCHOR54]
+	adrp	x0, .LANCHOR50
+	strb	wzr, [x0, #:lo12:.LANCHOR50]
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L1569
+	ldrb	w1, [x20, #:lo12:.LANCHOR28]
+	adrp	x0, .LC100
+	add	x0, x0, :lo12:.LC100
+	bl	printf
+.L1569:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+.L1573:
+	strb	wzr, [x0, #:lo12:.LANCHOR51]
+	mov	w1, 1
+	ldr	w0, [x29, 56]
+	orr	w0, w0, 256
+	str	w0, [x29, 56]
+	ldr	w0, [x29, 56]
+	bfi	w0, w1, 24, 3
+	str	w0, [x29, 56]
+	ldr	w0, [x29, 56]
+	str	w0, [x19]
+	str	wzr, [x19, 336]
+	mov	w0, 4193
+	str	w0, [x19, 4]
+	mov	w0, 8321
+	str	w0, [x19, 344]
+	mov	w0, 4099
+	movk	w0, 0x10, lsl 16
+	str	w0, [x19, 304]
+	mov	w0, 38
+	str	w0, [x19, 308]
+	mov	w0, 39
+	str	w0, [x19, 308]
+	mov	w0, 2048
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR53
+	str	x0, [x1, #:lo12:.LANCHOR53]
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L1575
+	ldr	x0, [x22, #:lo12:.LANCHOR13]
+	ldr	w1, [x0]
+	ldr	w2, [x0, 344]
+	ldr	w3, [x0, 304]
+	ldr	w4, [x0, 308]
+	ldr	w5, [x0, 312]
+	b	.L1588
+	.size	nandc_init, .-nandc_init
+	.section	.text.zbuf_init,"ax",@progbits
+	.align	2
+	.global	zbuf_init
+	.type	zbuf_init, %function
+zbuf_init:
+	stp	x29, x30, [sp, -48]!
+	adrp	x0, .LANCHOR56
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	add	x19, x0, :lo12:.LANCHOR56
+	stp	x21, x22, [sp, 32]
+	mov	x20, x0
+	adrp	x22, .LANCHOR131
+	add	x22, x22, :lo12:.LANCHOR131
+	mov	w21, 0
+.L1590:
+	and	w0, w21, 255
+	strb	w0, [x19, 1]
+	add	w1, w0, 1
+	ldrb	w0, [x22]
+	strb	w1, [x19]
+	add	w21, w21, 1
+	strb	wzr, [x19, 2]
+	add	x19, x19, 64
+	str	xzr, [x19, -48]
+	lsl	w0, w0, 9
+	bl	ftl_malloc
+	str	x0, [x19, -56]
+	mov	w0, 64
+	bl	ftl_malloc
+	str	x0, [x19, -40]
+	cmp	w21, 16
+	bne	.L1590
+	add	x0, x20, :lo12:.LANCHOR56
+	mov	w1, -1
+	strb	w1, [x0, 960]
+	adrp	x0, .LANCHOR57
+	strb	wzr, [x0, #:lo12:.LANCHOR57]
+	adrp	x0, .LANCHOR58
+	ldp	x19, x20, [sp, 16]
+	strb	w21, [x0, #:lo12:.LANCHOR58]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
+	.size	zbuf_init, .-zbuf_init
+	.section	.text.gc_init,"ax",@progbits
+	.align	2
+	.global	gc_init
+	.type	gc_init, %function
+gc_init:
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR85
+	mov	w2, 2136
+	mov	w1, 0
+	add	x29, sp, 0
+	strb	wzr, [x0, #:lo12:.LANCHOR85]
+	adrp	x0, .LANCHOR159
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR71
+	strb	wzr, [x0, #:lo12:.LANCHOR159]
+	adrp	x0, .LANCHOR160
+	add	x19, x20, :lo12:.LANCHOR71
+	str	wzr, [x0, #:lo12:.LANCHOR160]
+	adrp	x0, .LANCHOR96
+	strh	wzr, [x0, #:lo12:.LANCHOR96]
+	mov	x0, x19
+	bl	ftl_memset
+	str	xzr, [x19, 8]
+	mov	w0, -1
+	strh	w0, [x20, #:lo12:.LANCHOR71]
+	adrp	x0, .LANCHOR95
+	adrp	x4, .LANCHOR102
+	adrp	x20, .LANCHOR86
+	ldrh	w1, [x0, #:lo12:.LANCHOR95]
+	lsr	w2, w1, 1
+	lsr	w0, w1, 2
+	strh	w2, [x19, 38]
+	adrp	x2, .LANCHOR90
+	strh	w0, [x19, 36]
+	adrp	x19, .LANCHOR80
+	strh	wzr, [x2, #:lo12:.LANCHOR90]
+	adrp	x2, .LANCHOR91
+	ldrb	w3, [x19, #:lo12:.LANCHOR80]
+	strh	wzr, [x2, #:lo12:.LANCHOR91]
+	adrp	x2, .LANCHOR92
+	strh	wzr, [x2, #:lo12:.LANCHOR92]
+	mul	w2, w1, w3
+	and	w2, w2, 65535
+	sub	w5, w2, #32
+	strh	w5, [x4, #:lo12:.LANCHOR102]
+	adrp	x4, .LANCHOR100
+	strh	w2, [x4, #:lo12:.LANCHOR100]
+	adrp	x2, .LANCHOR94
+	strh	w1, [x2, #:lo12:.LANCHOR94]
+	adrp	x1, .LANCHOR161
+	mov	w2, 4
+	strh	w2, [x1, #:lo12:.LANCHOR161]
+	adrp	x1, .LANCHOR70
+	strh	w0, [x1, #:lo12:.LANCHOR70]
+	ldrh	w0, [x20, #:lo12:.LANCHOR86]
+	mul	w0, w0, w3
+	lsl	w0, w0, 2
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR162
+	str	x0, [x1, #:lo12:.LANCHOR162]
+	ldrb	w1, [x19, #:lo12:.LANCHOR80]
+	ldrh	w0, [x20, #:lo12:.LANCHOR86]
+	mul	w0, w0, w1
+	lsl	w0, w0, 2
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR163
+	str	x0, [x1, #:lo12:.LANCHOR163]
+	ldrh	w1, [x20, #:lo12:.LANCHOR86]
+	ldrb	w0, [x19, #:lo12:.LANCHOR80]
+	mul	w0, w1, w0
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR83
+	str	x0, [x1, #:lo12:.LANCHOR83]
+	ldrb	w1, [x19, #:lo12:.LANCHOR80]
+	ldrh	w0, [x20, #:lo12:.LANCHOR86]
+	mul	w0, w0, w1
+	lsl	w0, w0, 2
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR77
+	str	x0, [x1, #:lo12:.LANCHOR77]
+	ldrb	w1, [x19, #:lo12:.LANCHOR80]
+	ldrh	w0, [x20, #:lo12:.LANCHOR86]
+	mul	w0, w0, w1
+	lsl	w0, w0, 2
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR164
+	ldp	x19, x20, [sp, 16]
+	str	x0, [x1, #:lo12:.LANCHOR164]
+	adrp	x0, .LANCHOR98
+	adrp	x1, .LANCHOR87
+	ldp	x29, x30, [sp], 32
+	ldrh	w0, [x0, #:lo12:.LANCHOR98]
+	lsr	w0, w0, 2
+	strh	w0, [x1, #:lo12:.LANCHOR87]
+	ret
+	.size	gc_init, .-gc_init
+	.section	.text.ftl_free,"ax",@progbits
+	.align	2
+	.global	ftl_free
+	.type	ftl_free, %function
+ftl_free:
+	ret
+	.size	ftl_free, .-ftl_free
+	.section	.text.ftl_malloc_init,"ax",@progbits
+	.align	2
+	.global	ftl_malloc_init
+	.type	ftl_malloc_init, %function
+ftl_malloc_init:
+	ret
+	.size	ftl_malloc_init, .-ftl_malloc_init
+	.section	.text.js_hash,"ax",@progbits
+	.align	2
+	.global	js_hash
+	.type	js_hash, %function
+js_hash:
+	mov	x4, x0
+	mov	w0, 42982
+	mov	x3, 0
+	movk	w0, 0x47c6, lsl 16
+.L1598:
+	cmp	w1, w3
+	bhi	.L1599
+	ret
+.L1599:
+	lsr	w2, w0, 2
+	ldrb	w5, [x4, x3]
+	add	w2, w2, w0, lsl 5
+	add	x3, x3, 1
+	add	w2, w2, w5
+	eor	w0, w0, w2
+	b	.L1598
+	.size	js_hash, .-js_hash
+	.section	.text.ftl_debug_info_fill,"ax",@progbits
+	.align	2
+	.global	ftl_debug_info_fill
+	.type	ftl_debug_info_fill, %function
+ftl_debug_info_fill:
+	adrp	x3, .LANCHOR131
+	ldrb	w3, [x3, #:lo12:.LANCHOR131]
+	cmp	w3, 8
+	bls	.L1604
+	and	w0, w0, 255
+	cmp	x2, 0
+	ccmp	w0, 2, 0, ne
+	bne	.L1602
+	stp	x29, x30, [sp, -16]!
+	mov	x6, x1
+	mov	w1, 21320
+	mov	x0, x2
+	add	x29, sp, 0
+	movk	w1, 0x4841, lsl 16
+	str	w1, [x6]
+	mov	w1, 1024
+	bl	js_hash
+	str	w0, [x6, 4]
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+.L1602:
+	stp	wzr, wzr, [x1]
+.L1604:
+	mov	w0, 0
+	ret
+	.size	ftl_debug_info_fill, .-ftl_debug_info_fill
+	.section	.text.timer_get_time,"ax",@progbits
+	.align	2
+	.global	timer_get_time
+	.type	timer_get_time, %function
+timer_get_time:
+	mov	w0, 0
+	ret
+	.size	timer_get_time, .-timer_get_time
+	.section	.text.FlashCs123Init,"ax",@progbits
+	.align	2
+	.global	FlashCs123Init
+	.type	FlashCs123Init, %function
+FlashCs123Init:
+	ret
+	.size	FlashCs123Init, .-FlashCs123Init
+	.section	.text.rk_nand_de_init,"ax",@progbits
+	.align	2
+	.global	rk_nand_de_init
+	.type	rk_nand_de_init, %function
+rk_nand_de_init:
+	b	zftl_flash_de_init
+	.size	rk_nand_de_init, .-rk_nand_de_init
+	.section	.text.ftl_get_density,"ax",@progbits
+	.align	2
+	.global	ftl_get_density
+	.type	ftl_get_density, %function
+ftl_get_density:
+	and	w0, w0, 255
+	b	zftl_get_density
+	.size	ftl_get_density, .-ftl_get_density
+	.section	.text.ftl_get_capacity,"ax",@progbits
+	.align	2
+	.global	ftl_get_capacity
+	.type	ftl_get_capacity, %function
+ftl_get_capacity:
+	adrp	x0, .LANCHOR68
+	ldr	w0, [x0, #:lo12:.LANCHOR68]
+	ret
+	.size	ftl_get_capacity, .-ftl_get_capacity
+	.section	.text.rknand_print_hex,"ax",@progbits
+	.align	2
+	.global	rknand_print_hex
+	.type	rknand_print_hex, %function
+rknand_print_hex:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LC102
+	stp	x23, x24, [sp, 48]
+	mov	x22, x1
+	stp	x25, x26, [sp, 64]
+	mov	w24, w2
+	stp	x27, x28, [sp, 80]
+	adrp	x25, .LC101
+	mov	x27, x0
+	uxtw	x26, w3
+	add	x25, x25, :lo12:.LC101
+	add	x21, x21, :lo12:.LC102
+	stp	x19, x20, [sp, 16]
+	mov	w23, 0
+	mov	x19, 0
+	mov	w20, 0
+	adrp	x28, .LC103
+.L1613:
+	cmp	x26, x19
+	bne	.L1619
+	ldp	x19, x20, [sp, 16]
+	adrp	x1, .LC103
+	ldp	x21, x22, [sp, 32]
+	add	x1, x1, :lo12:.LC103
+	ldp	x23, x24, [sp, 48]
+	adrp	x0, .LC104
+	ldp	x25, x26, [sp, 64]
+	add	x0, x0, :lo12:.LC104
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	b	printf
+.L1619:
+	cbnz	w20, .L1614
+	mov	w3, w23
+	mov	x2, x22
+	mov	x1, x27
+	mov	x0, x25
+	bl	printf
+.L1614:
+	cmp	w24, 4
+	bne	.L1615
+	ldr	w1, [x22, x19, lsl 2]
+.L1621:
+	mov	x0, x21
+	add	w20, w20, 1
+	bl	printf
+	cmp	w20, 15
+	bls	.L1618
+	mov	w20, 0
+	add	x1, x28, :lo12:.LC103
+	adrp	x0, .LC104
+	add	x0, x0, :lo12:.LC104
+	bl	printf
+.L1618:
+	add	x19, x19, 1
+	add	w23, w23, w24
+	b	.L1613
+.L1615:
+	cmp	w24, 2
+	bne	.L1617
+	ldrsh	w1, [x22, x19, lsl 1]
+	b	.L1621
+.L1617:
+	ldrb	w1, [x22, x19]
+	b	.L1621
+	.size	rknand_print_hex, .-rknand_print_hex
+	.section	.text.hynix_get_read_retry_default,"ax",@progbits
+	.align	2
+	.global	hynix_get_read_retry_default
+	.type	hynix_get_read_retry_default, %function
+hynix_get_read_retry_default:
+	stp	x29, x30, [sp, -96]!
+	mov	w10, w0
+	adrp	x0, .LANCHOR27
+	mov	w2, -83
+	add	x29, sp, 0
+	ldr	x8, [x0, #:lo12:.LANCHOR27]
+	mov	w0, -84
+	stp	x19, x20, [sp, 16]
+	mov	w1, -82
+	stp	x21, x22, [sp, 32]
+	add	x6, x8, 128
+	stp	x23, x24, [sp, 48]
+	add	x13, x8, 112
+	stp	x25, x26, [sp, 64]
+	cmp	w10, 2
+	str	x27, [sp, 80]
+	strb	w0, [x8, 128]
+	mov	w0, -81
+	strb	w10, [x8, 112]
+	strb	w2, [x8, 129]
+	strb	w1, [x8, 130]
+	strb	w0, [x8, 131]
+	bne	.L1623
+	mov	w0, -89
+	strb	w0, [x13, 16]
+	adrp	x0, .LANCHOR165+17
+	mov	w1, -9
+	strb	w1, [x0, #:lo12:.LANCHOR165+17]
+.L1687:
+	mov	w24, 7
+	b	.L1730
+.L1623:
+	cmp	w10, 3
+	bne	.L1625
+	mov	x11, 0
+.L1626:
+	sub	w0, w11, #80
+	strb	w0, [x6, x11]
+	add	x11, x11, 1
+	cmp	x11, 8
+	bne	.L1626
+	mov	w24, w11
+.L1624:
+	sub	w0, w10, #1
+	cmp	w0, 1
+	bhi	.L1632
+	adrp	x7, .LANCHOR18
+	adrp	x8, .LANCHOR30
+	add	x7, x7, :lo12:.LANCHOR18
+	add	x8, x8, :lo12:.LANCHOR30
+	mov	w5, 0
+	mov	w10, 55
+.L1633:
+	ldrb	w0, [x7]
+	cmp	w0, w5
+	bhi	.L1639
+.L1640:
+	strb	w11, [x13, 1]
+	strb	w24, [x13, 2]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	ret
+.L1625:
+	cmp	w10, 4
+	bne	.L1627
+	mov	w3, -52
+	strb	w3, [x8, 128]
+	mov	w3, -65
+	strb	w3, [x8, 129]
+	mov	w3, -86
+	strb	w3, [x8, 130]
+	mov	w3, -85
+	mov	w24, 8
+	strb	w3, [x8, 131]
+	mov	w11, w24
+	mov	w3, -51
+	strb	w2, [x8, 133]
+	strb	w3, [x8, 132]
+	strb	w1, [x8, 134]
+	strb	w0, [x8, 135]
+	b	.L1624
+.L1627:
+	cmp	w10, 5
+	bne	.L1628
+	mov	w0, 56
+	strb	w0, [x8, 128]
+	mov	w0, 57
+	strb	w0, [x8, 129]
+	mov	w0, 58
+	mov	w24, 8
+	strb	w0, [x8, 130]
+	mov	w0, 59
+	strb	w0, [x8, 131]
+.L1730:
+	mov	w11, 4
+	b	.L1624
+.L1628:
+	cmp	w10, 6
+	bne	.L1629
+	mov	w0, 14
+	strb	w0, [x8, 128]
+	mov	w0, 15
+	strb	w0, [x8, 129]
+	mov	w0, 16
+	mov	w24, 12
+	strb	w0, [x8, 130]
+	mov	w0, 17
+	strb	w0, [x8, 131]
+	b	.L1730
+.L1629:
+	cmp	w10, 7
+	bne	.L1630
+	mov	x0, 0
+.L1631:
+	sub	w1, w0, #80
+	strb	w1, [x6, x0]
+	add	x0, x0, 1
+	cmp	x0, 8
+	bne	.L1631
+	mov	w0, -44
+	mov	w24, 12
+	strb	w0, [x8, 136]
+	mov	w11, 10
+	mov	w0, -43
+	strb	w0, [x8, 137]
+	b	.L1624
+.L1630:
+	cmp	w10, 8
+	bne	.L1687
+	mov	w0, 6
+	strb	w0, [x8, 128]
+	mov	w0, 7
+	strb	w0, [x8, 129]
+	mov	w0, 9
+	strb	w10, [x8, 130]
+	strb	w0, [x8, 131]
+	mov	w24, 50
+	mov	w0, 10
+	mov	w11, 5
+	strb	w0, [x8, 132]
+	b	.L1624
+.L1639:
+	ldrb	w0, [x8, w5, sxtw]
+	mov	x1, 32
+	mov	w2, 160
+	mov	x3, 0
+	umaddl	x2, w2, w0, x1
+	adrp	x1, .LANCHOR13
+	ubfiz	x0, x0, 8, 8
+	ldr	x4, [x1, #:lo12:.LANCHOR13]
+	add	x2, x13, x2
+	add	x4, x4, x0
+.L1634:
+	str	w10, [x4, 2056]
+	ldrb	w0, [x6, x3]
+	str	w0, [x4, 2052]
+	mov	w0, 80
+	bl	timer_delay_ns
+	ldr	w0, [x4, 2048]
+	strb	w0, [x2, x3]
+	add	x3, x3, 1
+	cmp	w11, w3, uxtb
+	bhi	.L1634
+	adrp	x3, .LANCHOR165
+	add	x3, x3, :lo12:.LANCHOR165
+	mov	x0, 0
+.L1637:
+	add	x14, x2, x0
+	add	x12, x3, x0
+	mov	x1, 1
+.L1636:
+	lsl	x4, x1, 2
+	lsl	x15, x1, 3
+	ldrb	w16, [x2, x0]
+	add	x1, x1, 1
+	cmp	x1, 7
+	ldrb	w4, [x12, x4]
+	add	w4, w4, w16
+	strb	w4, [x14, x15]
+	bne	.L1636
+	add	x0, x0, 1
+	cmp	x0, 4
+	bne	.L1637
+	add	w5, w5, 1
+	strb	wzr, [x2, 16]
+	strb	wzr, [x2, 24]
+	and	w5, w5, 255
+	strb	wzr, [x2, 32]
+	strb	wzr, [x2, 40]
+	strb	wzr, [x2, 48]
+	strb	wzr, [x2, 41]
+	strb	wzr, [x2, 49]
+	b	.L1633
+.L1632:
+	sub	w0, w10, #3
+	cmp	w0, 5
+	bhi	.L1640
+	mul	w19, w24, w11
+	sub	w14, w11, #1
+	and	x14, x14, 255
+	adrp	x20, .LANCHOR18
+	sub	w21, w10, #5
+	add	x20, x20, :lo12:.LANCHOR18
+	asr	w15, w19, 1
+	add	x14, x14, 1
+	lsl	w19, w19, 4
+	lsl	w23, w15, 1
+	sbfiz	x22, x15, 1, 32
+	mov	w12, 0
+.L1641:
+	ldrb	w0, [x20]
+	cmp	w0, w12
+	bls	.L1640
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
+	ldrb	w25, [x0, w12, sxtw]
+	mov	w0, w25
+	bl	zftl_flash_exit_slc_mode
+	adrp	x0, .LANCHOR13
+	mov	x5, 32
+	mov	w1, 160
+	mov	w6, 255
+	ldr	x4, [x0, #:lo12:.LANCHOR13]
+	nop // between mem op and mult-accumulate
+	umaddl	x1, w1, w25, x5
+	ubfiz	x25, x25, 8, 8
+	add	x4, x4, x25
+	add	x5, x13, x1
+	str	w6, [x4, 2056]
+	bl	nandc_wait_flash_ready
+	cmp	w10, 8
+	bne	.L1642
+	mov	w0, 120
+	str	w0, [x4, 2056]
+	str	wzr, [x4, 2052]
+	mov	w0, 23
+	str	wzr, [x4, 2052]
+	mov	w1, 25
+	str	wzr, [x4, 2052]
+	add	x5, x8, 144
+	str	w0, [x4, 2056]
+	mov	w0, 4
+	str	w0, [x4, 2056]
+	str	w1, [x4, 2056]
+	mov	w1, 218
+	str	w1, [x4, 2056]
+	mov	w1, 21
+	str	wzr, [x4, 2056]
+	str	wzr, [x4, 2052]
+	str	wzr, [x4, 2052]
+	str	w1, [x4, 2052]
+.L1733:
+	str	w0, [x4, 2052]
+	mov	w0, 48
+	str	wzr, [x4, 2052]
+	str	w0, [x4, 2056]
+	bl	nandc_wait_flash_ready
+	cmp	w21, 1
+	ccmp	w10, 8, 4, hi
+	beq	.L1688
+	cmp	w10, 7
+	mov	w0, 32
+	mov	w1, 2
+	csel	w1, w1, w0, ne
+.L1649:
+	adrp	x6, .LANCHOR166
+	mov	x2, 0
+	ldr	x0, [x6, #:lo12:.LANCHOR166]
+.L1650:
+	ldr	w3, [x4, 2048]
+	strb	w3, [x0, x2]
+	add	x2, x2, 1
+	cmp	w1, w2, uxtb
+	bhi	.L1650
+	cmp	w10, 8
+	bne	.L1651
+	mov	w1, 0
+.L1653:
+	ldrb	w2, [x0]
+	cmp	w2, 50
+	beq	.L1652
+	ldrb	w2, [x0, 1]
+	cmp	w2, 5
+	beq	.L1652
+	add	w1, w1, 1
+	add	x0, x0, 4
+	and	w1, w1, 255
+	cmp	w1, 8
+	bne	.L1653
+.L1654:
+	adrp	x0, .LC105
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC105
+	bl	printf
+.L1656:
+	b	.L1656
+.L1642:
+	mov	w0, 54
+	str	w0, [x4, 2056]
+	cmp	w10, 4
+	bne	.L1644
+	mov	w0, 64
+	str	w6, [x4, 2052]
+	str	w0, [x4, 2048]
+	mov	w0, 204
+.L1731:
+	str	w0, [x4, 2052]
+	mov	w0, 77
+	b	.L1732
+.L1644:
+	cmp	w21, 1
+	bhi	.L1646
+	ldrb	w0, [x8, 128]
+	str	w0, [x4, 2052]
+	mov	w0, 82
+.L1732:
+	str	w0, [x4, 2048]
+.L1645:
+	mov	w0, 22
+	str	w0, [x4, 2056]
+	mov	w0, 23
+	str	w0, [x4, 2056]
+	mov	w0, 4
+	str	w0, [x4, 2056]
+	mov	w0, 25
+	str	w0, [x4, 2056]
+	str	wzr, [x4, 2056]
+	cmp	w10, 6
+	str	wzr, [x4, 2052]
+	str	wzr, [x4, 2052]
+	bne	.L1647
+	mov	w0, 31
+	str	w0, [x4, 2052]
+.L1648:
+	mov	w0, 2
+	b	.L1733
+.L1646:
+	cmp	w10, 7
+	bne	.L1645
+	mov	w0, 174
+	str	w0, [x4, 2052]
+	str	wzr, [x4, 2048]
+	mov	w0, 176
+	b	.L1731
+.L1647:
+	str	wzr, [x4, 2052]
+	b	.L1648
+.L1688:
+	mov	w1, 16
+	b	.L1649
+.L1652:
+	cmp	w1, 6
+	bhi	.L1654
+.L1655:
+	ldr	x3, [x6, #:lo12:.LANCHOR166]
+	mov	x0, 0
+.L1665:
+	cmp	w19, w0
+	bgt	.L1666
+	ldr	x1, [x6, #:lo12:.LANCHOR166]
+	mov	w6, 8
+	add	x2, x1, x22
+.L1668:
+	mov	x0, 0
+.L1667:
+	ldrh	w7, [x2, x0, lsl 1]
+	mvn	w7, w7
+	strh	w7, [x2, x0, lsl 1]
+	add	x0, x0, 1
+	cmp	w15, w0
+	bgt	.L1667
+	add	x2, x2, x23, uxtw 1
+	subs	w6, w6, #1
+	bne	.L1668
+	mov	x6, x1
+	mov	w7, 0
+	mov	w26, 1
+.L1669:
+	mov	w0, 0
+	mov	w2, 0
+.L1673:
+	mov	x25, x6
+	lsl	w30, w26, w2
+	mov	w17, 16
+	mov	w16, 0
+.L1671:
+	ldrh	w27, [x25]
+	add	x25, x25, x22
+	bics	wzr, w30, w27
+	cinc	w16, w16, eq
+	subs	w17, w17, #1
+	bne	.L1671
+	cmp	w16, 8
+	bls	.L1672
+	orr	w0, w0, w30
+	and	w0, w0, 65535
+.L1672:
+	add	w2, w2, 1
+	cmp	w2, 16
+	bne	.L1673
+	strh	w0, [x6], 2
+	add	w7, w7, 1
+	cmp	w15, w7
+	bgt	.L1669
+	mov	x0, 0
+	mov	w2, 0
+.L1676:
+	ldr	w6, [x1, x0]
+	add	x0, x0, 4
+	cmp	w6, 0
+	cinc	w2, w2, eq
+	cmp	x0, 32
+	bne	.L1676
+	cmp	w2, 7
+	ble	.L1677
+	mov	w3, 1024
+	mov	w2, 1
+	adrp	x0, .LC106
+	add	x0, x0, :lo12:.LC106
+	bl	rknand_print_hex
+	adrp	x0, .LC105
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC105
+	bl	printf
+.L1678:
+	b	.L1678
+.L1651:
+	cmp	w10, 7
+	bne	.L1657
+	mov	w1, 0
+.L1659:
+	ldrb	w2, [x0]
+	cmp	w2, 12
+	beq	.L1658
+	ldrb	w2, [x0, 1]
+	cmp	w2, 10
+	beq	.L1658
+	add	w1, w1, 1
+	add	x0, x0, 4
+	and	w1, w1, 255
+	cmp	w1, 8
+	bne	.L1659
+.L1660:
+	adrp	x0, .LC105
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC105
+	bl	printf
+.L1661:
+	b	.L1661
+.L1658:
+	cmp	w1, 6
+	bls	.L1655
+	b	.L1660
+.L1657:
+	cmp	w10, 6
+	bne	.L1655
+	mov	x1, 0
+.L1662:
+	ldrb	w2, [x0, x1]
+	cmp	w2, 12
+	beq	.L1655
+	add	x2, x0, x1
+	ldrb	w2, [x2, 8]
+	cmp	w2, 4
+	beq	.L1655
+	add	x1, x1, 1
+	cmp	x1, 8
+	bne	.L1662
+	adrp	x0, .LC105
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC105
+	bl	printf
+.L1664:
+	b	.L1664
+.L1666:
+	ldr	w1, [x4, 2048]
+	strb	w1, [x3, x0]
+	add	x0, x0, 1
+	b	.L1665
+.L1677:
+	cmp	w10, 6
+	beq	.L1690
+	cmp	w10, 7
+	beq	.L1691
+	cmp	w10, 8
+	mov	x1, 5
+	mov	x0, 8
+	csel	x0, x0, x1, ne
+.L1679:
+	mov	x1, x5
+	mov	w5, 0
+.L1680:
+	mov	x2, 0
+.L1681:
+	ldrb	w6, [x3, x2]
+	strb	w6, [x1, x2]
+	add	x2, x2, 1
+	cmp	w11, w2, uxtb
+	bhi	.L1681
+	add	w5, w5, 1
+	add	x3, x3, x14
+	add	x1, x1, x0
+	cmp	w24, w5
+	bgt	.L1680
+	mov	w5, 255
+	str	w5, [x4, 2056]
+	bl	nandc_wait_flash_ready
+	cmp	w21, 1
+	bhi	.L1683
+	mov	w0, 54
+	str	w0, [x4, 2056]
+	ldrb	w0, [x8, 128]
+	str	w0, [x4, 2052]
+	str	wzr, [x4, 2048]
+	mov	w0, 22
+	str	w0, [x4, 2056]
+	mov	w0, 48
+	str	wzr, [x4, 2056]
+	str	wzr, [x4, 2052]
+	str	wzr, [x4, 2052]
+	str	w5, [x4, 2052]
+	str	w5, [x4, 2052]
+	str	w5, [x4, 2052]
+.L1734:
+	str	w0, [x4, 2056]
+	bl	nandc_wait_flash_ready
+	add	w12, w12, 1
+	and	w12, w12, 255
+	b	.L1641
+.L1690:
+	mov	x0, 4
+	b	.L1679
+.L1691:
+	mov	x0, 10
+	b	.L1679
+.L1683:
+	cmp	w10, 8
+	bne	.L1685
+	mov	w0, 190
+	b	.L1734
+.L1685:
+	mov	w0, 56
+	b	.L1734
+	.size	hynix_get_read_retry_default, .-hynix_get_read_retry_default
+	.section	.text.flash_get_read_retry_tbl,"ax",@progbits
+	.align	2
+	.global	flash_get_read_retry_tbl
+	.type	flash_get_read_retry_tbl, %function
+flash_get_read_retry_tbl:
+	adrp	x0, .LANCHOR33+19
+	ldrb	w0, [x0, #:lo12:.LANCHOR33+19]
+	sub	w1, w0, #1
+	and	w1, w1, 255
+	cmp	w1, 7
+	bhi	.L1735
+	b	hynix_get_read_retry_default
+.L1735:
+	ret
+	.size	flash_get_read_retry_tbl, .-flash_get_read_retry_tbl
+	.section	.text.nandc_xfer_done,"ax",@progbits
+	.align	2
+	.global	nandc_xfer_done
+	.type	nandc_xfer_done, %function
+nandc_xfer_done:
+	stp	x29, x30, [sp, -80]!
+	adrp	x0, .LANCHOR167
+	adrp	x1, .LANCHOR28
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR13
+	ldrb	w1, [x1, #:lo12:.LANCHOR28]
+	stp	x21, x22, [sp, 32]
+	strb	wzr, [x0, #:lo12:.LANCHOR167]
+	cmp	w1, 9
+	str	x23, [sp, 48]
+	bne	.L1738
+	ldr	x20, [x19, #:lo12:.LANCHOR13]
+	mov	x21, x0
+	ldr	w0, [x20, 16]
+	str	w0, [x29, 64]
+	ldr	w0, [x20, 48]
+	tbnz	x0, 1, .L1739
+	adrp	x22, .LC109
+	adrp	x23, .LC110
+	add	x22, x22, :lo12:.LC109
+	add	x23, x23, :lo12:.LC110
+	mov	w21, 0
+.L1740:
+	ldr	w0, [x29, 64]
+	tbnz	x0, 20, .L1742
+	ldr	x0, [x19, #:lo12:.LANCHOR13]
+	add	w21, w21, 1
+	tst	x21, 16777215
+	ldr	w0, [x0, 16]
+	str	w0, [x29, 64]
+	bne	.L1740
+	ldr	w2, [x29, 64]
+	mov	w1, w21
+	ldr	w3, [x20, 64]
+	mov	x0, x22
+	ubfx	x3, x3, 16, 6
+	bl	printf
+	ldr	x1, [x19, #:lo12:.LANCHOR13]
+	mov	w3, 64
+	mov	w2, 4
+	mov	x0, x23
+	bl	rknand_print_hex
+	b	.L1740
+.L1741:
+	ldr	w0, [x29, 64]
+	add	w1, w1, 1
+	ubfx	x0, x0, 22, 6
+	cmp	w1, w0, lsl 12
+	bne	.L1743
+	ldr	w2, [x20, 64]
+	adrp	x0, .LC108
+	ldr	w3, [x29, 64]
+	add	x0, x0, :lo12:.LC108
+	ubfx	x2, x2, 16, 5
+	ubfx	x3, x3, 22, 6
+	bl	printf
+	ldr	w0, [x29, 72]
+	mov	w0, 1
+	strb	w0, [x21, #:lo12:.LANCHOR167]
+.L1742:
+	adrp	x0, .LANCHOR53+32
+	ldr	x23, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	str	wzr, [x0, #:lo12:.LANCHOR53+32]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 80
+	ret
+.L1739:
+	mov	w1, 0
+.L1743:
+	ldr	w2, [x20, 64]
+	ldr	w0, [x29, 64]
+	ubfx	x2, x2, 16, 6
+	ubfx	x0, x0, 22, 6
+	cmp	w2, w0
+	bge	.L1742
+	ldr	w0, [x20]
+	str	w0, [x29, 72]
+	ldr	w0, [x29, 72]
+	tbz	x0, 13, .L1741
+	ldr	w0, [x29, 72]
+	tbz	x0, 17, .L1741
+	ldr	w1, [x29, 72]
+	adrp	x0, .LC107
+	add	x0, x0, :lo12:.LC107
+	ubfx	x1, x1, 17, 1
+.L1772:
+	bl	printf
+	b	.L1742
+.L1738:
+	ldr	x20, [x19, #:lo12:.LANCHOR13]
+	mov	w21, 0
+	ldr	w0, [x20, 8]
+	str	w0, [x29, 64]
+	ldr	w0, [x20, 16]
+	tbnz	x0, 1, .L1748
+	adrp	x22, .LC109
+	adrp	x23, .LC110
+	add	x22, x22, :lo12:.LC109
+	add	x23, x23, :lo12:.LC110
+.L1749:
+	ldr	w0, [x29, 64]
+	tbnz	x0, 20, .L1742
+	ldr	x0, [x19, #:lo12:.LANCHOR13]
+	add	w21, w21, 1
+	tst	x21, 16777215
+	ldr	w0, [x0, 8]
+	str	w0, [x29, 64]
+	bne	.L1749
+	ldr	w2, [x29, 64]
+	mov	w1, w21
+	ldr	w3, [x20, 28]
+	mov	x0, x22
+	ubfx	x3, x3, 16, 5
+	bl	printf
+	ldr	x1, [x19, #:lo12:.LANCHOR13]
+	mov	w3, 64
+	mov	w2, 4
+	mov	x0, x23
+	bl	rknand_print_hex
+	b	.L1749
+.L1748:
+	adrp	x22, .LC108
+	adrp	x23, .LC110
+	add	x22, x22, :lo12:.LC108
+	add	x23, x23, :lo12:.LC110
+.L1750:
+	ldr	w1, [x20, 28]
+	ldr	w0, [x29, 64]
+	ubfx	x1, x1, 16, 5
+	ubfx	x0, x0, 22, 6
+	cmp	w1, w0
+	bge	.L1742
+	ldr	x0, [x19, #:lo12:.LANCHOR13]
+	ldr	w0, [x0]
+	str	w0, [x29, 72]
+	ldr	w0, [x29, 72]
+	tbz	x0, 13, .L1751
+	ldr	w0, [x29, 72]
+	tbz	x0, 17, .L1751
+	adrp	x0, .LC111
+	ldr	w1, [x29, 72]
+	add	x0, x0, :lo12:.LC111
+	b	.L1772
+.L1751:
+	add	w21, w21, 1
+	tst	x21, 16777215
+	bne	.L1750
+	ldr	w2, [x20, 28]
+	mov	w1, w21
+	ldr	w3, [x29, 64]
+	mov	x0, x22
+	ubfx	x2, x2, 16, 5
+	ubfx	x3, x3, 22, 6
+	bl	printf
+	ldr	x1, [x19, #:lo12:.LANCHOR13]
+	mov	w3, 64
+	mov	w2, 4
+	mov	x0, x23
+	bl	rknand_print_hex
+	b	.L1750
+	.size	nandc_xfer_done, .-nandc_xfer_done
+	.section	.text.nandc_xfer,"ax",@progbits
+	.align	2
+	.global	nandc_xfer
+	.type	nandc_xfer, %function
+nandc_xfer:
+	stp	x29, x30, [sp, -64]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w19, w2, 255
+	mov	x20, x3
+	stp	x21, x22, [sp, 32]
+	mov	x3, x4
+	and	w22, w1, 255
+	mov	x2, x20
+	mov	w1, w19
+	mov	w0, w22
+	mov	x21, x4
+	bl	nandc_xfer_start
+	mov	w0, w22
+	bl	nandc_xfer_done
+	cbnz	w22, .L1792
+	adrp	x0, .LANCHOR28
+	ldrb	w0, [x0, #:lo12:.LANCHOR28]
+	cmp	w0, 9
+	bne	.L1775
+	adrp	x22, .LANCHOR13
+	lsr	w19, w19, 2
+	mov	w3, 1
+	mov	w2, 0
+	ldr	x5, [x22, #:lo12:.LANCHOR13]
+	mov	w0, 0
+.L1776:
+	cmp	w2, w19
+	bcc	.L1780
+	ldr	w19, [x5]
+	cmp	w3, 0
+	mov	w1, 512
+	csel	w0, w0, w1, eq
+	mov	w1, 8192
+	movk	w1, 0x2, lsl 16
+	and	w1, w19, w1
+	cmp	w1, 139264
+	bne	.L1782
+	mov	w1, w19
+	adrp	x0, .LC112
+	add	x0, x0, :lo12:.LC112
+	bl	printf
+	ldr	x0, [x22, #:lo12:.LANCHOR13]
+	orr	w19, w19, 131072
+	str	w19, [x0]
+	mov	w0, -1
+.L1782:
+	tbz	x19, 13, .L1783
+	adrp	x1, .LANCHOR167
+	ldrb	w1, [x1, #:lo12:.LANCHOR167]
+	cbz	w1, .L1783
+	mov	w1, w19
+	adrp	x0, .LC113
+	add	x0, x0, :lo12:.LC113
+	bl	printf
+	ldr	x0, [x22, #:lo12:.LANCHOR13]
+	mov	w1, 1
+	str	w1, [x0, 16]
+.L1811:
+	mov	w0, -1
+.L1774:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+.L1780:
+	uxtw	x1, w2
+	add	x1, x1, 84
+	ldr	w1, [x5, x1, lsl 2]
+	str	w1, [x29, 56]
+	ldr	w1, [x29, 56]
+	ldr	w4, [x29, 56]
+	ubfx	x4, x4, 26, 1
+	and	w1, w4, w1, lsr 10
+	and	w3, w3, w1
+	ldr	w1, [x29, 56]
+	tbnz	x1, 2, .L1794
+	ldr	w1, [x29, 56]
+	tbnz	x1, 18, .L1794
+	ldr	w4, [x29, 56]
+	ldr	w1, [x29, 56]
+	ubfx	x4, x4, 3, 7
+	ubfx	x1, x1, 19, 7
+	cmp	w4, w1
+	ldr	w1, [x29, 56]
+	ble	.L1778
+	ubfx	x1, x1, 3, 7
+.L1779:
+	cmp	w0, w1
+	csel	w0, w0, w1, cs
+.L1777:
+	add	w2, w2, 1
+	b	.L1776
+.L1778:
+	ubfx	x1, x1, 19, 7
+	b	.L1779
+.L1794:
+	mov	w0, -1
+	b	.L1777
+.L1775:
+	adrp	x0, .LANCHOR50
+	lsr	w4, w19, 1
+	mov	w3, 64
+	mov	w1, 1
+	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	mov	w2, 0
+	adrp	x6, .LANCHOR53
+	cmp	w0, 25
+	mov	w0, 128
+	csel	w3, w3, w0, cc
+	mov	w0, 0
+.L1785:
+	add	w5, w3, w0
+	cmp	w2, w4
+	bcc	.L1786
+	adrp	x22, .LANCHOR13
+	lsr	w19, w19, 2
+	mov	w3, 0
+	mov	w0, 0
+	ldr	x4, [x22, #:lo12:.LANCHOR13]
+.L1787:
+	cmp	w3, w19
+	bcc	.L1791
+	str	wzr, [x4, 16]
+	mov	w1, 8192
+	movk	w1, 0x2, lsl 16
+	ldr	w19, [x4]
+	and	w1, w19, w1
+	cmp	w1, 139264
+	bne	.L1783
+	mov	w1, w19
+	adrp	x0, .LC114
+	add	x0, x0, :lo12:.LC114
+	bl	printf
+	ldr	x0, [x22, #:lo12:.LANCHOR13]
+	orr	w19, w19, 131072
+	str	w19, [x0]
+	b	.L1811
+.L1786:
+	ldr	x7, [x6, #:lo12:.LANCHOR53]
+	and	x0, x0, 4294967292
+	ldr	w0, [x7, x0]
+	lsl	w7, w2, 2
+	add	w2, w2, 1
+	strb	w0, [x21, x7]
+	lsr	w7, w0, 8
+	strb	w7, [x21, w1, uxtw]
+	add	w7, w1, 1
+	lsr	w8, w0, 16
+	lsr	w0, w0, 24
+	strb	w8, [x21, x7]
+	add	w7, w1, 2
+	add	w1, w1, 4
+	strb	w0, [x21, x7]
+	mov	w0, w5
+	b	.L1785
+.L1791:
+	uxtw	x1, w3
+	add	x1, x1, 8
+	ldr	w1, [x4, x1, lsl 2]
+	str	w1, [x29, 56]
+	ldr	w1, [x29, 56]
+	tbnz	x1, 2, .L1797
+	ldr	w1, [x29, 56]
+	tbnz	x1, 15, .L1797
+	ldr	w2, [x29, 56]
+	ubfx	x6, x2, 3, 5
+	ldr	w2, [x29, 56]
+	ldr	w1, [x29, 56]
+	ubfx	x2, x2, 27, 1
+	ubfx	x5, x1, 16, 5
+	ldr	w1, [x29, 56]
+	orr	w2, w6, w2, lsl 5
+	ubfx	x1, x1, 29, 1
+	orr	w1, w5, w1, lsl 5
+	cmp	w2, w1
+	ldr	w1, [x29, 56]
+	bls	.L1789
+	ubfx	x2, x1, 3, 5
+	ldr	w1, [x29, 56]
+	ubfx	x1, x1, 27, 1
+.L1810:
+	orr	w1, w2, w1, lsl 5
+	cmp	w0, w1
+	csel	w0, w0, w1, cs
+.L1788:
+	add	w3, w3, 1
+	b	.L1787
+.L1789:
+	ubfx	x2, x1, 16, 5
+	ldr	w1, [x29, 56]
+	ubfx	x1, x1, 29, 1
+	b	.L1810
+.L1797:
+	mov	w0, -1
+	b	.L1788
+.L1783:
+	cmn	w0, #1
+	beq	.L1774
+	ldr	w1, [x21]
+	cmn	w1, #1
+	bne	.L1774
+	ldr	w1, [x21, 4]
+	cmn	w1, #1
+	bne	.L1774
+	ldr	w1, [x20]
+	cmn	w1, #1
+	mov	w1, 512
+	csel	w0, w0, w1, ne
+	b	.L1774
+.L1792:
+	mov	w0, 0
+	b	.L1774
+	.size	nandc_xfer, .-nandc_xfer
+	.section	.text.flash_read_page,"ax",@progbits
+	.align	2
+	.global	flash_read_page
+	.type	flash_read_page, %function
+flash_read_page:
+	stp	x29, x30, [sp, -32]!
+	and	w10, w0, 255
+	adrp	x0, .LANCHOR13
+	mov	w8, 24
+	add	x29, sp, 0
+	ldr	x14, [x0, #:lo12:.LANCHOR13]
+	adrp	x0, .LANCHOR32
+	mov	x12, x2
+	mov	x13, x3
+	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	mov	w11, w4
+	ubfx	x15, x1, 24, 2
+	str	x19, [sp, 16]
+	sub	w0, w8, w0
+	mov	w8, 1
+	adrp	x19, .LANCHOR16
+	lsl	w8, w8, w0
+	sub	w8, w8, #1
+	and	w8, w8, w1
+	bl	nandc_wait_flash_ready
+	mov	w0, w10
+	bl	nandc_cs
+	cbnz	w15, .L1813
+	mov	w0, w10
+	bl	zftl_flash_enter_slc_mode
+.L1814:
+	ldr	x1, [x19, #:lo12:.LANCHOR16]
+	ldrb	w0, [x1, 7]
+	cmp	w0, 1
+	bne	.L1816
+	ldrb	w0, [x1, 12]
+	cmp	w0, 2
+	bne	.L1816
+	sxtw	x0, w10
+	mov	w2, 38
+	add	x0, x0, 8
+	add	x0, x14, x0, lsl 8
+	str	w2, [x0, 8]
+.L1816:
+	ubfiz	x4, x10, 8, 8
+	and	w0, w8, 255
+	add	x4, x14, x4
+	str	wzr, [x4, 2056]
+	str	wzr, [x4, 2052]
+	str	wzr, [x4, 2052]
+	str	w0, [x4, 2052]
+	lsr	w0, w8, 8
+	str	w0, [x4, 2052]
+	lsr	w0, w8, 16
+	str	w0, [x4, 2052]
+	adrp	x0, .LANCHOR31
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	cbz	w0, .L1817
+	lsr	w0, w8, 24
+	str	w0, [x4, 2052]
+.L1817:
+	mov	w0, 48
+	str	w0, [x4, 2056]
+	ldrb	w0, [x1, 12]
+	cmp	w0, 3
+	bne	.L1818
+	cbz	w15, .L1818
+	adrp	x0, .LANCHOR36
+	ldrb	w0, [x0, #:lo12:.LANCHOR36]
+	cbnz	w0, .L1818
+	adrp	x0, .LANCHOR37
+	ldrb	w0, [x0, #:lo12:.LANCHOR37]
+	cbnz	w0, .L1818
+	add	w8, w8, w8, lsl 1
+	sub	w0, w8, #1
+	add	w0, w0, w15
+.L1827:
+	bl	nandc_set_seed
+	bl	nandc_wait_flash_ready
+	mov	w2, w11
+	mov	w0, 5
+	str	w0, [x4, 2056]
+	str	wzr, [x4, 2052]
+	mov	w0, 224
+	str	wzr, [x4, 2052]
+	mov	x3, x12
+	str	w0, [x4, 2056]
+	mov	w1, 0
+	mov	x4, x13
+	mov	w0, w10
+	bl	nandc_xfer
+	mov	w2, w0
+	bl	nandc_de_cs.constprop.32
+	ldr	x19, [sp, 16]
+	mov	w0, w2
+	ldp	x29, x30, [sp], 32
+	ret
+.L1813:
+	ldr	x0, [x19, #:lo12:.LANCHOR16]
+	ldrb	w0, [x0, 12]
+	cmp	w0, 3
+	bne	.L1815
+	adrp	x0, .LANCHOR36
+	ldrb	w0, [x0, #:lo12:.LANCHOR36]
+	cbnz	w0, .L1815
+	adrp	x0, .LANCHOR37
+	ldrb	w0, [x0, #:lo12:.LANCHOR37]
+	cbnz	w0, .L1815
+	sxtw	x0, w10
+	add	x0, x0, 8
+	add	x0, x14, x0, lsl 8
+	str	w15, [x0, 8]
+	b	.L1814
+.L1815:
+	mov	w0, w10
+	bl	zftl_flash_exit_slc_mode
+	b	.L1814
+.L1818:
+	mov	w0, w8
+	b	.L1827
+	.size	flash_read_page, .-flash_read_page
+	.section	.text.micron_read_retrial,"ax",@progbits
+	.align	2
+	.global	micron_read_retrial
+	.type	micron_read_retrial, %function
+micron_read_retrial:
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w20, w0, 255
+	adrp	x0, .LANCHOR50
+	stp	x25, x26, [sp, 64]
+	stp	x21, x22, [sp, 32]
+	mov	x26, x3
+	stp	x23, x24, [sp, 48]
+	mov	w23, w1
+	ldrb	w19, [x0, #:lo12:.LANCHOR50]
+	mov	w22, 0
+	stp	x27, x28, [sp, 80]
+	str	w4, [x29, 116]
+	str	x2, [x29, 120]
+	bl	nandc_wait_flash_ready
+	adrp	x0, .LANCHOR13
+	add	w19, w19, w19, lsl 1
+	asr	w19, w19, 2
+	ldr	x6, [x0, #:lo12:.LANCHOR13]
+	adrp	x0, .LANCHOR169
+	add	x0, x0, :lo12:.LANCHOR169
+	str	x0, [x29, 104]
+	ubfiz	x0, x20, 8, 8
+	add	x25, x6, x0
+.L1829:
+	adrp	x24, .LANCHOR14
+	add	x24, x24, :lo12:.LANCHOR14
+	mov	w21, 0
+	mov	w28, -1
+.L1830:
+	ldr	x0, [x29, 104]
+	ldrb	w0, [x0]
+	cmp	w21, w0
+	bcc	.L1835
+.L1834:
+	mov	w0, 239
+	str	w0, [x25, 2056]
+	mov	w0, 137
+	str	w0, [x25, 2052]
+	mov	w0, 200
+	bl	timer_delay_ns
+	str	wzr, [x25, 2048]
+	str	wzr, [x25, 2048]
+	cmp	w28, w19
+	str	wzr, [x25, 2048]
+	str	wzr, [x25, 2048]
+	bcc	.L1836
+	cmn	w28, #1
+	mov	w0, 256
+	csel	w28, w28, w0, eq
+.L1836:
+	cmn	w28, #1
+	cset	w24, eq
+	cmp	w28, 256
+	cset	w0, eq
+	orr	w0, w24, w0
+	cbz	w0, .L1837
+	mov	w4, w28
+	mov	w3, w21
+	mov	w2, w23
+	mov	w1, w21
+	adrp	x0, .LC116
+	add	x0, x0, :lo12:.LC116
+	bl	printf
+	eor	w0, w22, 1
+	tst	w24, w0
+	beq	.L1838
+	mov	w1, 3
+	mov	w0, w20
+	mov	w22, 1
+	bl	mt_auto_read_calibration_config
+	b	.L1829
+.L1835:
+	mov	w0, 239
+	str	w0, [x25, 2056]
+	mov	w0, 137
+	str	w0, [x25, 2052]
+	add	w27, w21, 1
+	mov	w0, 200
+	bl	timer_delay_ns
+	str	w27, [x25, 2048]
+	str	wzr, [x25, 2048]
+	mov	x3, x26
+	ldr	w4, [x29, 116]
+	mov	w1, w23
+	ldr	x2, [x29, 120]
+	mov	w0, w20
+	str	wzr, [x25, 2048]
+	str	wzr, [x25, 2048]
+	bl	flash_read_page
+	mov	w7, w0
+	ldr	w0, [x24]
+	tbz	x0, 12, .L1831
+	mov	w4, w7
+	str	w7, [x29, 112]
+	mov	w3, w28
+	mov	w2, w23
+	mov	w1, w21
+	adrp	x0, .LC115
+	add	x0, x0, :lo12:.LC115
+	bl	printf
+	ldr	w7, [x29, 112]
+.L1831:
+	cmn	w7, #1
+	beq	.L1832
+	adrp	x0, .LANCHOR166
+	cmn	w28, #1
+	csel	w28, w28, w7, ne
+	cmp	w7, w19
+	ldr	x0, [x0, #:lo12:.LANCHOR166]
+	str	x0, [x29, 120]
+	adrp	x0, .LANCHOR168
+	ldr	x26, [x0, #:lo12:.LANCHOR168]
+	bcc	.L1841
+.L1832:
+	mov	w21, w27
+	b	.L1830
+.L1841:
+	mov	w28, w7
+	b	.L1834
+.L1838:
+	cbz	w22, .L1839
+	mov	w0, w20
+	mov	w1, 0
+	bl	mt_auto_read_calibration_config
+	cmn	w28, #1
+	mov	w0, 256
+	csel	w28, w28, w0, eq
+.L1839:
+	bl	nandc_wait_flash_ready
+	mov	w0, w28
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+.L1837:
+	cbz	w22, .L1839
+	mov	w1, 0
+	mov	w0, w20
+	mov	w28, 256
+	bl	mt_auto_read_calibration_config
+	b	.L1839
+	.size	micron_read_retrial, .-micron_read_retrial
+	.section	.text.toshiba_3d_read_retrial,"ax",@progbits
+	.align	2
+	.global	toshiba_3d_read_retrial
+	.type	toshiba_3d_read_retrial, %function
+toshiba_3d_read_retrial:
+	stp	x29, x30, [sp, -144]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	mov	w23, w1
+	stp	x27, x28, [sp, 80]
+	mov	w28, w4
+	ubfx	x4, x23, 24, 2
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	and	w24, w0, 255
+	stp	x25, x26, [sp, 64]
+	mov	x27, x3
+	mov	x26, x2
+	bl	nandc_wait_flash_ready
+	adrp	x0, .LANCHOR13
+	adrp	x22, .LANCHOR24
+	mov	w1, 46
+	mov	w2, 56
+	ldr	x25, [x0, #:lo12:.LANCHOR13]
+	and	x0, x24, 255
+	add	x21, x0, 8
+	str	x0, [x29, 128]
+	ldrb	w0, [x22, #:lo12:.LANCHOR24]
+	mov	w19, -1
+	add	x21, x25, x21, lsl 8
+	mov	w20, 1
+	cmp	w0, 36
+	mov	w0, 26
+	csel	w1, w2, w1, ne
+	str	w1, [x29, 120]
+	mov	w1, 10
+	csel	w0, w1, w0, ne
+	str	w0, [x29, 136]
+	add	x0, x22, :lo12:.LANCHOR24
+	cbnz	w4, .L1859
+	str	x0, [x29, 120]
+	sxtw	x0, w24
+	add	x0, x0, 8
+	add	x0, x25, x0, lsl 8
+	str	x0, [x29, 112]
+.L1866:
+	ldr	x0, [x29, 120]
+	ldrb	w0, [x0]
+	cmp	w0, 36
+	bne	.L1860
+	mov	w1, w20
+	mov	x0, x21
+	mov	w2, 0
+	bl	toshiba_tlc_set_rr_para
+	ldr	x1, [x29, 112]
+	mov	w0, 93
+	str	w0, [x1, 8]
+.L1861:
+	mov	w4, w28
+	mov	x3, x27
+	mov	x2, x26
+	mov	w1, w23
+	mov	w0, w24
+	bl	flash_read_page
+	mov	w4, w0
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 4, .L1862
+	mov	w3, w4
+	str	w4, [x29, 108]
+	mov	w2, w23
+	mov	w1, w20
+	adrp	x0, .LC117
+	add	x0, x0, :lo12:.LC117
+	bl	printf
+	ldr	w4, [x29, 108]
+.L1862:
+	cmn	w4, #1
+	beq	.L1863
+	adrp	x0, .LANCHOR166
+	cmn	w19, #1
+	csel	w19, w19, w4, ne
+	ldr	x26, [x0, #:lo12:.LANCHOR166]
+	adrp	x0, .LANCHOR168
+	ldr	x27, [x0, #:lo12:.LANCHOR168]
+	adrp	x0, .LANCHOR50
+	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	add	w0, w0, w0, lsl 1
+	cmp	w4, w0, lsr 2
+	bcc	.L1881
+.L1863:
+	ldr	w0, [x29, 136]
+	add	w20, w20, 1
+	cmp	w0, w20
+	bne	.L1866
+.L1865:
+	ldrb	w0, [x22, #:lo12:.LANCHOR24]
+	cmp	w0, 36
+	bne	.L1867
+	mov	w2, 0
+.L1904:
+	mov	w1, 0
+	mov	x0, x21
+	bl	toshiba_tlc_set_rr_para
+	b	.L1868
+.L1860:
+	mov	w1, w20
+	mov	x0, x21
+	bl	toshiba_3d_set_slc_rr_para
+	b	.L1861
+.L1881:
+	mov	w19, w4
+	b	.L1865
+.L1867:
+	mov	w1, 0
+	mov	x0, x21
+	bl	toshiba_3d_set_slc_rr_para
+.L1868:
+	ldrb	w0, [x22, #:lo12:.LANCHOR24]
+	cmp	w0, 36
+	bne	.L1877
+	ldr	x0, [x29, 128]
+	add	x25, x25, x0, lsl 8
+	mov	w0, 85
+	str	w0, [x25, 2056]
+	mov	w0, 255
+	str	wzr, [x25, 2052]
+	str	wzr, [x25, 2048]
+	str	w0, [x25, 2056]
+.L1877:
+	adrp	x0, .LANCHOR50
+	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	add	w0, w0, w0, lsl 1
+	cmp	w19, w0, lsr 2
+	bcc	.L1878
+	cmn	w19, #1
+	mov	w0, 256
+	csel	w19, w19, w0, eq
+.L1878:
+	cmp	w19, 256
+	ccmn	w19, #1, 4, ne
+	bne	.L1879
+	adrp	x0, .LC119
+	mov	w4, w19
+	mov	w3, w20
+	mov	w2, w23
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC119
+	bl	printf
+.L1879:
+	bl	nandc_wait_flash_ready
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 144
+	ret
+.L1859:
+	str	x0, [x29, 112]
+	sxtw	x0, w24
+	add	x0, x0, 8
+	add	x0, x25, x0, lsl 8
+	str	x0, [x29, 136]
+.L1875:
+	ldr	x0, [x29, 112]
+	ldrb	w0, [x0]
+	cmp	w0, 36
+	bne	.L1869
+	mov	x0, x21
+	mov	w2, 1
+	mov	w1, w20
+	bl	toshiba_tlc_set_rr_para
+	mov	w0, 93
+.L1903:
+	ldr	x1, [x29, 136]
+	mov	w4, w28
+	mov	x3, x27
+	mov	x2, x26
+	str	w0, [x1, 8]
+	mov	w1, w23
+	mov	w0, w24
+	bl	flash_read_page
+	mov	w4, w0
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 4, .L1871
+	mov	w3, w4
+	str	w4, [x29, 108]
+	mov	w2, w23
+	mov	w1, w20
+	adrp	x0, .LC118
+	add	x0, x0, :lo12:.LC118
+	bl	printf
+	ldr	w4, [x29, 108]
+.L1871:
+	cmn	w4, #1
+	beq	.L1872
+	adrp	x0, .LANCHOR166
+	cmn	w19, #1
+	csel	w19, w19, w4, ne
+	ldr	x26, [x0, #:lo12:.LANCHOR166]
+	adrp	x0, .LANCHOR168
+	ldr	x27, [x0, #:lo12:.LANCHOR168]
+	adrp	x0, .LANCHOR50
+	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	add	w0, w0, w0, lsl 1
+	cmp	w4, w0, lsr 2
+	bcc	.L1882
+.L1872:
+	ldr	w0, [x29, 120]
+	add	w20, w20, 1
+	cmp	w0, w20
+	bne	.L1875
+.L1874:
+	ldrb	w0, [x22, #:lo12:.LANCHOR24]
+	cmp	w0, 36
+	bne	.L1876
+	mov	w2, 1
+	b	.L1904
+.L1869:
+	mov	x0, x21
+	mov	w1, w20
+	bl	toshiba_3d_set_tlc_rr_para
+	mov	w0, 38
+	b	.L1903
+.L1882:
+	mov	w19, w4
+	b	.L1874
+.L1876:
+	mov	w1, 0
+	mov	x0, x21
+	bl	toshiba_3d_set_tlc_rr_para
+	b	.L1868
+	.size	toshiba_3d_read_retrial, .-toshiba_3d_read_retrial
+	.section	.text.toshiba_read_retrial,"ax",@progbits
+	.align	2
+	.global	toshiba_read_retrial
+	.type	toshiba_read_retrial, %function
+toshiba_read_retrial:
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	stp	x25, x26, [sp, 64]
+	mov	w25, w1
+	stp	x19, x20, [sp, 16]
+	mov	x26, x2
+	stp	x27, x28, [sp, 80]
+	and	w19, w0, 255
+	stp	x23, x24, [sp, 48]
+	mov	x27, x3
+	str	w4, [x29, 116]
+	bl	nandc_wait_flash_ready
+	adrp	x0, .LANCHOR13
+	adrp	x1, .LANCHOR24
+	str	x1, [x29, 120]
+	ldr	x22, [x0, #:lo12:.LANCHOR13]
+	and	x0, x19, 255
+	add	x21, x0, 8
+	str	x0, [x29, 104]
+	ldrb	w0, [x1, #:lo12:.LANCHOR24]
+	add	x21, x22, x21, lsl 8
+	sub	w0, w0, #67
+	and	w0, w0, 255
+	cmp	w0, 1
+	bls	.L1923
+	adrp	x0, .LANCHOR21
+	ldrb	w0, [x0, #:lo12:.LANCHOR21]
+	cbz	w0, .L1924
+	mov	w23, 1
+	mov	w0, 1
+	bl	nandc_set_if_mode
+.L1907:
+	and	x0, x19, 255
+	mov	w1, 92
+	add	x0, x22, x0, lsl 8
+	str	w1, [x0, 2056]
+	mov	w1, 197
+	str	w1, [x0, 2056]
+.L1906:
+	sxtw	x0, w19
+	mov	w20, 1
+	add	x0, x0, 8
+	mov	w24, -1
+	add	x0, x22, x0, lsl 8
+	str	x0, [x29, 96]
+.L1908:
+	adrp	x0, .LANCHOR169
+	ldrb	w0, [x0, #:lo12:.LANCHOR169]
+	add	w0, w0, 1
+	cmp	w20, w0
+	bcc	.L1917
+	mov	w28, w24
+.L1916:
+	ldr	x0, [x29, 120]
+	mov	w1, 0
+	ldrb	w0, [x0, #:lo12:.LANCHOR24]
+	sub	w0, w0, #67
+	and	w0, w0, 255
+	cmp	w0, 1
+	mov	x0, x21
+	bhi	.L1918
+	bl	sandisk_set_rr_para
+.L1919:
+	sxtw	x19, w19
+	mov	w0, 255
+	add	x19, x19, 8
+	add	x22, x22, x19, lsl 8
+	str	w0, [x22, 8]
+	adrp	x0, .LANCHOR50
+	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	add	w0, w0, w0, lsl 1
+	cmp	w28, w0, lsr 2
+	bcc	.L1920
+	cmn	w28, #1
+	mov	w0, 256
+	csel	w28, w28, w0, eq
+.L1920:
+	cmp	w28, 256
+	ccmn	w28, #1, 4, ne
+	bne	.L1921
+	adrp	x0, .LC119
+	mov	w4, w28
+	mov	w3, w20
+	mov	w2, w25
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC119
+	bl	printf
+.L1921:
+	bl	nandc_wait_flash_ready
+	cbz	w23, .L1905
+	mov	w0, 4
+	bl	nandc_set_if_mode
+.L1905:
+	mov	w0, w28
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+.L1924:
+	mov	w23, 0
+	b	.L1907
+.L1923:
+	mov	w23, 0
+	b	.L1906
+.L1917:
+	ldr	x0, [x29, 120]
+	mov	w1, w20
+	ldrb	w0, [x0, #:lo12:.LANCHOR24]
+	sub	w0, w0, #67
+	and	w0, w0, 255
+	cmp	w0, 1
+	mov	x0, x21
+	bhi	.L1909
+	bl	sandisk_set_rr_para
+.L1910:
+	ldr	x0, [x29, 120]
+	ldrb	w0, [x0, #:lo12:.LANCHOR24]
+	cmp	w0, 34
+	bne	.L1911
+	adrp	x0, .LANCHOR169
+	ldrb	w0, [x0, #:lo12:.LANCHOR169]
+	sub	w0, w0, #3
+	cmp	w20, w0
+	bne	.L1911
+	ldr	x1, [x29, 96]
+	mov	w0, 179
+	str	w0, [x1, 8]
+.L1911:
+	ldr	x0, [x29, 104]
+	mov	w1, 38
+	ldr	w4, [x29, 116]
+	mov	x3, x27
+	mov	x2, x26
+	add	x0, x22, x0, lsl 8
+	str	w1, [x0, 2056]
+	mov	w1, 93
+	str	w1, [x0, 2056]
+	mov	w1, w25
+	mov	w0, w19
+	bl	flash_read_page
+	mov	w28, w0
+	cmn	w0, #1
+	beq	.L1914
+	cmn	w24, #1
+	csel	w24, w24, w0, ne
+	adrp	x0, .LANCHOR166
+	ldr	x26, [x0, #:lo12:.LANCHOR166]
+	adrp	x0, .LANCHOR168
+	ldr	x27, [x0, #:lo12:.LANCHOR168]
+	adrp	x0, .LANCHOR50
+	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	add	w0, w0, w0, lsl 1
+	cmp	w28, w0, lsr 2
+	bcc	.L1916
+.L1914:
+	add	w20, w20, 1
+	b	.L1908
+.L1909:
+	bl	toshiba_set_rr_para
+	b	.L1910
+.L1918:
+	bl	toshiba_set_rr_para
+	b	.L1919
+	.size	toshiba_read_retrial, .-toshiba_read_retrial
+	.section	.text.ymtc_3d_read_retrial,"ax",@progbits
+	.align	2
+	.global	ymtc_3d_read_retrial
+	.type	ymtc_3d_read_retrial, %function
+ymtc_3d_read_retrial:
+	stp	x29, x30, [sp, -112]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w19, -1
+	stp	x21, x22, [sp, 32]
+	mov	w22, w1
+	stp	x23, x24, [sp, 48]
+	mov	x23, x2
+	stp	x25, x26, [sp, 64]
+	mov	x24, x3
+	stp	x27, x28, [sp, 80]
+	and	w25, w0, 255
+	mov	w26, w4
+	bl	nandc_wait_flash_ready
+	adrp	x1, .LANCHOR13
+	ubfiz	x21, x25, 8, 8
+	add	x0, x21, 2048
+	adrp	x27, .LANCHOR50
+	ldr	x21, [x1, #:lo12:.LANCHOR13]
+	mov	w20, 1
+	adrp	x28, .LANCHOR166
+	adrp	x5, .LANCHOR168
+	add	x21, x21, x0
+	add	x27, x27, :lo12:.LANCHOR50
+	tst	x22, 50331648
+	bne	.L1947
+.L1942:
+	str	x5, [x29, 104]
+	mov	w1, w20
+	mov	x0, x21
+	bl	ymtc_3d_set_slc_rr_para
+	mov	w4, w26
+	mov	x3, x24
+	mov	x2, x23
+	mov	w1, w22
+	mov	w0, w25
+	bl	flash_read_page
+	ldr	x5, [x29, 104]
+	cmn	w0, #1
+	beq	.L1939
+	ldrb	w1, [x27]
+	cmn	w19, #1
+	csel	w19, w19, w0, ne
+	ldr	x23, [x28, #:lo12:.LANCHOR166]
+	ldr	x24, [x5, #:lo12:.LANCHOR168]
+	add	w1, w1, w1, lsl 1
+	cmp	w0, w1, lsr 2
+	bcc	.L1950
+.L1939:
+	add	w20, w20, 1
+	cmp	w20, 10
+	bne	.L1942
+.L1941:
+	mov	w1, 0
+	mov	x0, x21
+	bl	ymtc_3d_set_slc_rr_para
+.L1943:
+	adrp	x0, .LANCHOR50
+	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	add	w0, w0, w0, lsl 1
+	cmp	w19, w0, lsr 2
+	bcc	.L1948
+	cmn	w19, #1
+	mov	w0, 256
+	csel	w19, w19, w0, eq
+.L1948:
+	cmp	w19, 256
+	ccmn	w19, #1, 4, ne
+	bne	.L1949
+	adrp	x0, .LC120
+	mov	w4, w19
+	mov	w3, w20
+	mov	w2, w22
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC120
+	bl	printf
+.L1949:
+	bl	nandc_wait_flash_ready
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L1950:
+	mov	w19, w0
+	b	.L1941
+.L1947:
+	str	x5, [x29, 104]
+	mov	w1, w20
+	mov	x0, x21
+	bl	ymtc_3d_set_tlc_rr_para
+	mov	w4, w26
+	mov	x3, x24
+	mov	x2, x23
+	mov	w1, w22
+	mov	w0, w25
+	bl	flash_read_page
+	ldr	x5, [x29, 104]
+	cmn	w0, #1
+	beq	.L1944
+	ldrb	w1, [x27]
+	cmn	w19, #1
+	csel	w19, w19, w0, ne
+	ldr	x23, [x28, #:lo12:.LANCHOR166]
+	ldr	x24, [x5, #:lo12:.LANCHOR168]
+	add	w1, w1, w1, lsl 1
+	cmp	w0, w1, lsr 2
+	bcc	.L1951
+.L1944:
+	add	w20, w20, 1
+	cmp	w20, 51
+	bne	.L1947
+.L1946:
+	mov	w1, 0
+	mov	x0, x21
+	bl	ymtc_3d_set_tlc_rr_para
+	b	.L1943
+.L1951:
+	mov	w19, w0
+	b	.L1946
+	.size	ymtc_3d_read_retrial, .-ymtc_3d_read_retrial
+	.section	.text.samsung_read_retrial,"ax",@progbits
+	.align	2
+	.global	samsung_read_retrial
+	.type	samsung_read_retrial, %function
+samsung_read_retrial:
+	stp	x29, x30, [sp, -112]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	mov	x21, x2
+	stp	x19, x20, [sp, 16]
+	mov	x22, x3
+	stp	x23, x24, [sp, 48]
+	mov	w20, w1
+	and	w23, w0, 255
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	str	w4, [x29, 108]
+	bl	nandc_wait_flash_ready
+	adrp	x0, .LANCHOR13
+	tst	x20, 50331648
+	and	x5, x23, 255
+	ldr	x0, [x0, #:lo12:.LANCHOR13]
+	bne	.L1967
+	adrp	x24, .LANCHOR170
+	adrp	x27, .LC121
+	add	x28, x0, x5, lsl 8
+	add	x24, x24, :lo12:.LANCHOR170
+	add	x27, x27, :lo12:.LC121
+	mov	x26, 0
+	mov	w25, -1
+.L1972:
+	mov	w0, 239
+	str	w0, [x28, 2056]
+	mov	w0, 141
+	str	w0, [x28, 2052]
+	add	x0, x24, x26
+	add	w19, w26, 1
+	ldrsb	w0, [x0, 1]
+	str	w0, [x28, 2048]
+	str	wzr, [x28, 2048]
+	str	wzr, [x28, 2048]
+	str	wzr, [x28, 2048]
+	bl	nandc_wait_flash_ready
+	ldr	w4, [x29, 108]
+	mov	x3, x22
+	mov	x2, x21
+	mov	w1, w20
+	mov	w0, w23
+	bl	flash_read_page
+	mov	w4, w0
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 4, .L1968
+	mov	w3, w4
+	str	w4, [x29, 104]
+	mov	w2, w20
+	mov	w1, w19
+	mov	x0, x27
+	bl	printf
+	ldr	w4, [x29, 104]
+.L1968:
+	cmn	w4, #1
+	beq	.L1969
+	adrp	x0, .LANCHOR166
+	cmn	w25, #1
+	csel	w25, w25, w4, ne
+	ldr	x21, [x0, #:lo12:.LANCHOR166]
+	adrp	x0, .LANCHOR168
+	ldr	x22, [x0, #:lo12:.LANCHOR168]
+	adrp	x0, .LANCHOR50
+	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	add	w0, w0, w0, lsl 1
+	cmp	w4, w0, lsr 2
+	bcc	.L1981
+.L1969:
+	add	x26, x26, 1
+	cmp	x26, 25
+	bne	.L1972
+	mov	w19, 26
+.L1971:
+	mov	w0, 239
+	str	w0, [x28, 2056]
+	mov	w0, 141
+	str	w0, [x28, 2052]
+	str	wzr, [x28, 2048]
+	str	wzr, [x28, 2048]
+	str	wzr, [x28, 2048]
+	str	wzr, [x28, 2048]
+.L2003:
+	bl	nandc_wait_flash_ready
+	adrp	x0, .LANCHOR50
+	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	add	w0, w0, w0, lsl 1
+	cmp	w25, w0, lsr 2
+	bcc	.L1979
+	cmn	w25, #1
+	mov	w0, 256
+	csel	w25, w25, w0, eq
+.L1979:
+	cmp	w25, 256
+	ccmn	w25, #1, 4, ne
+	bne	.L1980
+	adrp	x0, .LC123
+	mov	w4, w25
+	mov	w3, w19
+	mov	w2, w20
+	mov	w1, w19
+	add	x0, x0, :lo12:.LC123
+	bl	printf
+.L1980:
+	bl	nandc_wait_flash_ready
+	mov	w0, w25
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L1981:
+	mov	w25, w4
+	b	.L1971
+.L1967:
+	adrp	x7, .LANCHOR171
+	add	x7, x7, :lo12:.LANCHOR171
+	adrp	x24, .LC122
+	add	x28, x7, 4
+	add	x27, x0, x5, lsl 8
+	add	x24, x24, :lo12:.LC122
+	mov	w25, -1
+	mov	w19, 1
+	mov	w26, 137
+.L1978:
+	mov	w0, 239
+	str	w0, [x27, 2056]
+	str	w26, [x27, 2052]
+	ldrb	w0, [x28]
+	str	w0, [x27, 2048]
+	ldrb	w0, [x28, 1]
+	str	w0, [x27, 2048]
+	ldrb	w0, [x28, 2]
+	str	w0, [x27, 2048]
+	ldrb	w0, [x28, 3]
+	str	w0, [x27, 2048]
+	bl	nandc_wait_flash_ready
+	ldr	w4, [x29, 108]
+	mov	x3, x22
+	mov	x2, x21
+	mov	w1, w20
+	mov	w0, w23
+	bl	flash_read_page
+	mov	w4, w0
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 4, .L1974
+	mov	w3, w4
+	str	w4, [x29, 104]
+	mov	w2, w20
+	mov	w1, w19
+	mov	x0, x24
+	bl	printf
+	ldr	w4, [x29, 104]
+.L1974:
+	cmn	w4, #1
+	beq	.L1975
+	adrp	x0, .LANCHOR166
+	cmn	w25, #1
+	csel	w25, w25, w4, ne
+	ldr	x21, [x0, #:lo12:.LANCHOR166]
+	adrp	x0, .LANCHOR168
+	ldr	x22, [x0, #:lo12:.LANCHOR168]
+	adrp	x0, .LANCHOR50
+	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	add	w0, w0, w0, lsl 1
+	cmp	w4, w0, lsr 2
+	bcc	.L1982
+.L1975:
+	add	w19, w19, 1
+	add	x28, x28, 4
+	cmp	w19, 26
+	bne	.L1978
+.L1977:
+	mov	w0, 239
+	str	w0, [x27, 2056]
+	mov	w0, 137
+	str	w0, [x27, 2052]
+	str	wzr, [x27, 2048]
+	str	wzr, [x27, 2048]
+	str	wzr, [x27, 2048]
+	str	wzr, [x27, 2048]
+	b	.L2003
+.L1982:
+	mov	w25, w4
+	b	.L1977
+	.size	samsung_read_retrial, .-samsung_read_retrial
+	.section	.text.hynix_read_retrial,"ax",@progbits
+	.align	2
+	.global	hynix_read_retrial
+	.type	hynix_read_retrial, %function
+hynix_read_retrial:
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	and	x23, x0, 255
+	adrp	x0, .LANCHOR27
+	stp	x27, x28, [sp, 80]
+	stp	x21, x22, [sp, 32]
+	mov	w27, w4
+	ldr	x28, [x0, #:lo12:.LANCHOR27]
+	mov	w22, w1
+	stp	x25, x26, [sp, 64]
+	mov	x25, x2
+	add	x28, x28, 112
+	stp	x19, x20, [sp, 16]
+	add	x0, x28, x23
+	mov	x26, x3
+	mov	x21, x23
+	mov	w19, -1
+	ldrb	w24, [x28, 2]
+	ldrb	w20, [x0, 8]
+	bl	nandc_wait_flash_ready
+	adrp	x6, .LANCHOR50
+	add	x6, x6, :lo12:.LANCHOR50
+	mov	w5, 0
+	adrp	x7, .LANCHOR166
+	adrp	x8, .LANCHOR168
+.L2005:
+	cmp	w5, w24
+	bcc	.L2010
+.L2009:
+	adrp	x0, .LANCHOR50
+	add	x23, x28, x23
+	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	strb	w20, [x23, 8]
+	add	w0, w0, w0, lsl 1
+	cmp	w19, w0, lsr 2
+	bcc	.L2011
+	cmn	w19, #1
+	mov	w0, 256
+	csel	w19, w19, w0, eq
+.L2011:
+	cmp	w19, 256
+	ccmn	w19, #1, 4, ne
+	bne	.L2012
+	adrp	x0, .LC124
+	mov	w4, w19
+	mov	w3, w5
+	mov	w2, w22
+	mov	w1, w5
+	add	x0, x0, :lo12:.LC124
+	bl	printf
+.L2012:
+	bl	nandc_wait_flash_ready
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+.L2010:
+	add	w20, w20, 1
+	stp	x6, x8, [x29, 96]
+	and	w20, w20, 255
+	str	x7, [x29, 112]
+	cmp	w24, w20
+	str	w5, [x29, 124]
+	csel	w20, w20, wzr, hi
+	mov	w0, w21
+	mov	w1, w20
+	bl	hynix_set_rr_para
+	mov	w4, w27
+	mov	x3, x26
+	mov	x2, x25
+	mov	w1, w22
+	mov	w0, w21
+	bl	flash_read_page
+	ldr	w5, [x29, 124]
+	cmn	w0, #1
+	ldp	x6, x8, [x29, 96]
+	ldr	x7, [x29, 112]
+	beq	.L2007
+	ldrb	w1, [x6]
+	cmn	w19, #1
+	csel	w19, w19, w0, ne
+	ldr	x25, [x7, #:lo12:.LANCHOR166]
+	ldr	x26, [x8, #:lo12:.LANCHOR168]
+	add	w1, w1, w1, lsl 1
+	cmp	w0, w1, lsr 2
+	bcc	.L2013
+.L2007:
+	add	w5, w5, 1
+	b	.L2005
+.L2013:
+	mov	w19, w0
+	b	.L2009
+	.size	hynix_read_retrial, .-hynix_read_retrial
+	.section	.text.flash_ddr_tuning_read,"ax",@progbits
+	.align	2
+	.global	flash_ddr_tuning_read
+	.type	flash_ddr_tuning_read, %function
+flash_ddr_tuning_read:
+	stp	x29, x30, [sp, -144]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w20, w0, 255
+	stp	x21, x22, [sp, 32]
+	mov	w22, w1
+	stp	x23, x24, [sp, 48]
+	mov	x23, x2
+	stp	x25, x26, [sp, 64]
+	mov	x24, x3
+	stp	x27, x28, [sp, 80]
+	adrp	x25, .LANCHOR50
+	str	w4, [x29, 136]
+	bl	nandc_get_ddr_para
+	add	x25, x25, :lo12:.LANCHOR50
+	str	w0, [x29, 132]
+	adrp	x0, .LANCHOR14
+	add	x0, x0, :lo12:.LANCHOR14
+	mov	w28, 0
+	str	x0, [x29, 120]
+	mov	w26, 0
+	adrp	x0, .LC125
+	mov	w27, 0
+	add	x0, x0, :lo12:.LC125
+	mov	w19, 1024
+	mov	w21, -1
+	mov	w7, 6
+	str	wzr, [x29, 140]
+	str	x0, [x29, 112]
+.L2029:
+	mov	w0, w7
+	str	w7, [x29, 128]
+	bl	nandc_set_ddr_para
+	ldr	w4, [x29, 136]
+	mov	x3, x24
+	mov	x2, x23
+	mov	w1, w22
+	mov	w0, w20
+	bl	flash_read_page
+	mov	w4, w0
+	ldr	x0, [x29, 120]
+	ldr	w7, [x29, 128]
+	ldr	w0, [x0]
+	tbz	x0, 4, .L2024
+	ldr	x0, [x29, 112]
+	mov	w3, w4
+	mov	w1, w7
+	str	w4, [x29, 108]
+	str	w7, [x29, 128]
+	mov	w2, w22
+	bl	printf
+	ldr	w4, [x29, 108]
+	ldr	w7, [x29, 128]
+.L2024:
+	add	w0, w19, 1
+	cmp	w4, w0
+	bhi	.L2025
+	adrp	x0, .LANCHOR166
+	ldr	x23, [x0, #:lo12:.LANCHOR166]
+	adrp	x0, .LANCHOR168
+	ldr	x24, [x0, #:lo12:.LANCHOR168]
+	ldrb	w0, [x25]
+	cmp	w4, w0, lsr 2
+	bcs	.L2035
+	add	w27, w27, 1
+	cmp	w27, 7
+	bls	.L2035
+	sub	w28, w7, w27
+	mov	w19, w4
+	mov	w21, 0
+.L2027:
+	ldr	w0, [x29, 140]
+	cmp	w27, w26
+	csel	w28, w28, w0, cs
+.L2028:
+	cbz	w28, .L2030
+	adrp	x0, .LANCHOR50
+	mov	w1, 3
+	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	udiv	w0, w0, w1
+	cmp	w0, w19
+	bls	.L2030
+	mov	w1, w28
+	adrp	x0, .LC126
+	add	x0, x0, :lo12:.LC126
+	bl	printf
+	mov	w0, w28
+.L2049:
+	bl	nandc_set_ddr_para
+	cbz	w21, .L2023
+	adrp	x25, .LANCHOR49
+	ldrb	w0, [x25, #:lo12:.LANCHOR49]
+	tbz	x0, 0, .L2023
+	mov	w2, w22
+	mov	w1, w20
+	adrp	x0, .LC127
+	add	x0, x0, :lo12:.LC127
+	bl	printf
+	mov	w0, w20
+	bl	flash_reset
+	mov	w0, 1
+	bl	flash_set_interface_mode
+	mov	w0, 1
+	bl	nandc_set_if_mode
+	adrp	x0, .LANCHOR34
+	add	x0, x0, :lo12:.LANCHOR34
+	mov	w1, 2
+	strb	w1, [x0, w20, sxtw]
+	mov	w0, w20
+	bl	zftl_flash_enter_slc_mode
+	ldr	w4, [x29, 136]
+	mov	x3, x24
+	mov	x2, x23
+	mov	w1, w22
+	mov	w0, w20
+	bl	flash_read_page
+	mov	w19, w0
+	mov	w3, w0
+	mov	w2, w22
+	mov	w1, w20
+	adrp	x0, .LC128
+	add	x0, x0, :lo12:.LC128
+	bl	printf
+	adrp	x0, .LANCHOR50
+	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	cmp	w19, w0
+	bhi	.L2037
+	adrp	x1, .LANCHOR172
+	ldr	w0, [x1, #:lo12:.LANCHOR172]
+	add	w0, w0, 1
+	str	w0, [x1, #:lo12:.LANCHOR172]
+	cmp	w0, 100
+	bls	.L2033
+	adrp	x0, .LANCHOR21
+	strb	wzr, [x0, #:lo12:.LANCHOR21]
+.L2023:
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 144
+	ret
+.L2025:
+	cmp	w27, w26
+	bls	.L2036
+	sub	w0, w28, w27
+	str	w0, [x29, 140]
+	cmp	w27, 7
+	bhi	.L2028
+	mov	w26, w27
+.L2036:
+	mov	w27, 0
+	b	.L2026
+.L2035:
+	mov	w28, w7
+	mov	w19, w4
+	mov	w21, 0
+.L2026:
+	add	w7, w7, 2
+	cmp	w7, 50
+	bne	.L2029
+	b	.L2027
+.L2030:
+	ldrb	w0, [x29, 132]
+	b	.L2049
+.L2037:
+	mov	w19, w21
+.L2033:
+	ldrb	w0, [x25, #:lo12:.LANCHOR49]
+	bl	flash_set_interface_mode
+	ldrb	w0, [x25, #:lo12:.LANCHOR49]
+	bl	nandc_set_if_mode
+	b	.L2023
+	.size	flash_ddr_tuning_read, .-flash_ddr_tuning_read
+	.section	.text.flash_read_page_en,"ax",@progbits
+	.align	2
+	.global	flash_read_page_en
+	.type	flash_read_page_en, %function
+flash_read_page_en:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w20, w0, 255
+	adrp	x0, .LANCHOR18
+	stp	x23, x24, [sp, 48]
+	stp	x21, x22, [sp, 32]
+	mov	w19, w1
+	str	x25, [sp, 64]
+	mov	x22, x2
+	ldrb	w1, [x0, #:lo12:.LANCHOR18]
+	mov	x23, x3
+	mov	w24, w4
+	mov	x25, x0
+	cmp	w1, w20
+	bhi	.L2051
+	adrp	x1, .LANCHOR173
+	adrp	x0, .LC0
+	mov	w2, 428
+	add	x1, x1, :lo12:.LANCHOR173
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2051:
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
+	ldrb	w4, [x25, #:lo12:.LANCHOR18]
+	ldrb	w21, [x0, w20, sxtw]
+	cmp	w20, w4
+	bcc	.L2052
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbnz	x0, 6, .L2053
+.L2077:
+	mov	w0, -1
+.L2050:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L2053:
+	mov	w3, w19
+	mov	w2, w20
+	mov	w1, w21
+	adrp	x0, .LC129
+	add	x0, x0, :lo12:.LC129
+	bl	printf
+	b	.L2077
+.L2052:
+	tst	x19, 50331648
+	bne	.L2055
+	adrp	x0, .LANCHOR0
+	adrp	x1, .LANCHOR1
+	ldrb	w0, [x0, #:lo12:.LANCHOR0]
+	cbz	w0, .L2056
+	ldrb	w0, [x1, #:lo12:.LANCHOR1]
+	cbz	w0, .L2055
+.L2056:
+	adrp	x0, .LANCHOR2
+	ldrb	w1, [x1, #:lo12:.LANCHOR1]
+	ldrh	w2, [x0, #:lo12:.LANCHOR2]
+	udiv	w0, w19, w2
+	mul	w0, w0, w2
+	sub	w19, w19, w0
+	cbz	w1, .L2057
+	add	w19, w0, w19, lsl 1
+.L2055:
+	mov	w4, w24
+	mov	x3, x23
+	mov	x2, x22
+	mov	w1, w19
+	mov	w0, w21
+	bl	flash_read_page
+	cmn	w0, #1
+	bne	.L2050
+	adrp	x20, .LANCHOR52
+	ldrb	w25, [x20, #:lo12:.LANCHOR52]
+	cbnz	w25, .L2058
+.L2061:
+	adrp	x0, .LANCHOR174
+	ldr	x5, [x0, #:lo12:.LANCHOR174]
+	cbnz	x5, .L2059
+.L2060:
+	ldrb	w4, [x20, #:lo12:.LANCHOR52]
+	mov	w3, -1
+	mov	w2, w19
+	mov	w1, 0
+	adrp	x0, .LC130
+	add	x0, x0, :lo12:.LC130
+	bl	printf
+	adrp	x0, .LANCHOR21
+	ldrb	w0, [x0, #:lo12:.LANCHOR21]
+	cbz	w0, .L2077
+	mov	w4, w24
+	mov	x3, x23
+	mov	x2, x22
+	mov	w1, w19
+	mov	w0, w21
+	ldr	x25, [sp, 64]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	b	flash_ddr_tuning_read
+.L2057:
+	adrp	x1, .LANCHOR3
+	add	x1, x1, :lo12:.LANCHOR3
+	ldrh	w19, [x1, w19, uxtw 1]
+	add	w19, w19, w0
+	b	.L2055
+.L2058:
+	strb	wzr, [x20, #:lo12:.LANCHOR52]
+	mov	w4, w24
+	mov	x3, x23
+	mov	x2, x22
+	mov	w1, w19
+	mov	w0, w21
+	bl	flash_read_page
+	strb	w25, [x20, #:lo12:.LANCHOR52]
+	cmn	w0, #1
+	beq	.L2061
+	b	.L2050
+.L2059:
+	mov	w4, w24
+	mov	x3, x23
+	mov	x2, x22
+	mov	w1, w19
+	mov	w0, w21
+	blr	x5
+	cmn	w0, #1
+	beq	.L2060
+	b	.L2050
+	.size	flash_read_page_en, .-flash_read_page_en
+	.section	.text.flash_get_last_written_page,"ax",@progbits
+	.align	2
+	.global	flash_get_last_written_page
+	.type	flash_get_last_written_page, %function
+flash_get_last_written_page:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	and	w23, w0, 255
+	adrp	x0, .LANCHOR147
+	stp	x19, x20, [sp, 16]
+	stp	x25, x26, [sp, 64]
+	mov	x24, x2
+	ldrh	w19, [x0, #:lo12:.LANCHOR147]
+	adrp	x0, .LANCHOR33+26
+	stp	x21, x22, [sp, 32]
+	and	w21, w1, 65535
+	ldrh	w26, [x0, #:lo12:.LANCHOR33+26]
+	sub	w19, w19, #1
+	sxth	w19, w19
+	stp	x27, x28, [sp, 80]
+	mov	x22, x3
+	mov	w25, w4
+	mov	w0, w23
+	mul	w26, w26, w21
+	add	w1, w19, w26
+	bl	flash_read_page_en
+	cmp	w0, 512
+	bne	.L2079
+	mov	w27, 0
+	mov	w28, 2
+.L2080:
+	cmp	w27, w19
+	ble	.L2083
+.L2079:
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2084
+	ldr	w3, [x22]
+	adrp	x0, .LC131
+	mov	w2, w19
+	mov	w1, w21
+	add	x0, x0, :lo12:.LC131
+	bl	printf
+.L2084:
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	ret
+.L2083:
+	add	w20, w27, w19
+	mov	w4, w25
+	mov	x3, x22
+	mov	x2, x24
+	mov	w0, w23
+	sdiv	w20, w20, w28
+	add	w1, w26, w20, sxth
+	bl	flash_read_page_en
+	cmp	w0, 512
+	bne	.L2081
+	sub	w19, w20, #1
+	sxth	w19, w19
+	b	.L2080
+.L2081:
+	add	w20, w20, 1
+	sxth	w27, w20
+	b	.L2080
+	.size	flash_get_last_written_page, .-flash_get_last_written_page
+	.section	.text.flash_get_last_written_page_ext,"ax",@progbits
+	.align	2
+	.global	flash_get_last_written_page_ext
+	.type	flash_get_last_written_page_ext, %function
+flash_get_last_written_page_ext:
+	adrp	x4, .LANCHOR32
+	mov	w5, 24
+	and	w0, w0, 65535
+	mov	w6, 1
+	ldrb	w4, [x4, #:lo12:.LANCHOR32]
+	sub	w5, w5, w4
+	adrp	x4, .LANCHOR75
+	ldrh	w4, [x4, #:lo12:.LANCHOR75]
+	sub	w5, w5, w4
+	mov	w4, w3
+	mov	x3, x2
+	mov	x2, x1
+	lsl	w6, w6, w5
+	sub	w6, w6, #1
+	and	w1, w6, w0
+	asr	w0, w0, w5
+	b	flash_get_last_written_page
+	.size	flash_get_last_written_page_ext, .-flash_get_last_written_page_ext
+	.section	.text.flash_ddr_para_scan,"ax",@progbits
+	.align	2
+	.global	flash_ddr_para_scan
+	.type	flash_ddr_para_scan, %function
+flash_ddr_para_scan:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR49
+	stp	x21, x22, [sp, 32]
+	and	w22, w0, 255
+	ldrb	w0, [x20, #:lo12:.LANCHOR49]
+	adrp	x19, .LANCHOR21
+	stp	x23, x24, [sp, 48]
+	mov	w21, 1
+	mov	w23, w1
+	str	x25, [sp, 64]
+	strb	w21, [x19, #:lo12:.LANCHOR21]
+	adrp	x24, .LANCHOR176
+	bl	flash_set_interface_mode
+	adrp	x25, .LANCHOR175
+	ldrb	w0, [x20, #:lo12:.LANCHOR49]
+	bl	nandc_set_if_mode
+	ldr	x3, [x25, #:lo12:.LANCHOR175]
+	mov	w4, 4
+	ldr	x2, [x24, #:lo12:.LANCHOR176]
+	mov	w1, w23
+	mov	w0, w22
+	bl	flash_ddr_tuning_read
+	ldr	x3, [x25, #:lo12:.LANCHOR175]
+	mov	w4, 4
+	ldr	x2, [x24, #:lo12:.LANCHOR176]
+	mov	w1, w23
+	mov	w0, w22
+	bl	flash_read_page
+	cmn	w0, #1
+	mov	x0, x19
+	bne	.L2091
+	ldrb	w1, [x20, #:lo12:.LANCHOR49]
+	tbz	x1, 0, .L2091
+	mov	w0, 1
+	bl	flash_set_interface_mode
+	mov	w0, w21
+	bl	nandc_set_if_mode
+	strb	wzr, [x19, #:lo12:.LANCHOR21]
+.L2092:
+	mov	w0, 0
+	ldr	x25, [sp, 64]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	ret
+.L2091:
+	mov	w1, 1
+	strb	w1, [x0, #:lo12:.LANCHOR21]
+	b	.L2092
+	.size	flash_ddr_para_scan, .-flash_ddr_para_scan
+	.section	.text.flash_prog_page,"ax",@progbits
+	.align	2
+	.global	flash_prog_page
+	.type	flash_prog_page, %function
+flash_prog_page:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	and	w21, w0, 255
+	adrp	x0, .LANCHOR13
+	stp	x25, x26, [sp, 64]
+	stp	x19, x20, [sp, 16]
+	mov	w20, 24
+	ldr	x26, [x0, #:lo12:.LANCHOR13]
+	adrp	x0, .LANCHOR32
+	stp	x23, x24, [sp, 48]
+	mov	w22, w1
+	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	and	x19, x21, 255
+	str	x27, [sp, 80]
+	add	x23, x19, 8
+	sub	w0, w20, w0
+	mov	w20, 1
+	mov	x24, x2
+	mov	x25, x3
+	lsl	w20, w20, w0
+	adrp	x0, .LANCHOR14
+	sub	w20, w20, #1
+	add	x23, x26, x23, lsl 8
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	and	w20, w20, w1
+	ubfx	x27, x22, 24, 2
+	tbz	x0, 4, .L2098
+	adrp	x0, .LC132
+	mov	w3, w4
+	mov	w2, w27
+	add	x0, x0, :lo12:.LC132
+	bl	printf
+.L2098:
+	bl	nandc_wait_flash_ready
+	mov	w0, w21
+	bl	hynix_reconfig_rr_para
+	mov	w0, w21
+	bl	nandc_cs
+	mov	w0, w21
+	cbnz	w27, .L2099
+	bl	zftl_flash_enter_slc_mode
+.L2100:
+	add	x19, x26, x19, lsl 8
+	mov	w0, 128
+	str	w0, [x19, 2056]
+	and	w0, w20, 255
+	str	wzr, [x19, 2052]
+	str	wzr, [x19, 2052]
+	str	w0, [x19, 2052]
+	lsr	w0, w20, 8
+	str	w0, [x19, 2052]
+	lsr	w0, w20, 16
+	str	w0, [x19, 2052]
+	adrp	x0, .LANCHOR31
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	cbz	w0, .L2101
+	lsr	w0, w20, 24
+	str	w0, [x19, 2052]
+.L2101:
+	mov	w0, w20
+	bl	nandc_set_seed
+	adrp	x0, .LANCHOR33+9
+	mov	x4, x25
+	mov	x3, x24
+	mov	w1, 1
+	ldrb	w2, [x0, #:lo12:.LANCHOR33+9]
+	mov	w0, w21
+	bl	nandc_xfer
+	mov	w0, 16
+	str	w0, [x19, 2056]
+	bl	nandc_wait_flash_ready
+	mov	x0, x23
+	bl	flash_read_status
+	mov	w3, w0
+	bl	nandc_de_cs.constprop.32
+	and	w2, w3, 4
+	tbz	x3, 2, .L2097
+	mov	w1, w22
+	adrp	x0, .LC133
+	add	x0, x0, :lo12:.LC133
+	bl	printf
+	mov	w2, -1
+.L2097:
+	mov	w0, w2
+	ldr	x27, [sp, 80]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	ret
+.L2099:
+	bl	zftl_flash_exit_slc_mode
+	b	.L2100
+	.size	flash_prog_page, .-flash_prog_page
+	.section	.text.flash_test_blk,"ax",@progbits
+	.align	2
+	.global	flash_test_blk
+	.type	flash_test_blk, %function
+flash_test_blk:
+	stp	x29, x30, [sp, -64]!
+	mov	w2, 32
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR166
+	stp	x19, x20, [sp, 16]
+	and	w20, w0, 255
+	ldr	x0, [x22, #:lo12:.LANCHOR166]
+	adrp	x21, .LANCHOR168
+	and	w19, w1, 65535
+	str	x23, [sp, 48]
+	mov	w1, 165
+	bl	ftl_memset
+	ldr	x0, [x21, #:lo12:.LANCHOR168]
+	mov	w2, 8
+	mov	w1, 90
+	bl	ftl_memset
+	adrp	x0, .LANCHOR2
+	ldrh	w0, [x0, #:lo12:.LANCHOR2]
+	mul	w19, w0, w19
+	mov	w0, w20
+	mov	w1, w19
+	bl	flash_erase_block
+	cmn	w0, #1
+	bne	.L2114
+.L2116:
+	mov	w21, -1
+.L2115:
+	mov	w1, w19
+	mov	w0, w20
+	bl	flash_erase_block
+	ldr	x23, [sp, 48]
+	mov	w0, w21
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+.L2114:
+	adrp	x23, .LANCHOR33
+	add	x23, x23, :lo12:.LANCHOR33
+	ldr	x3, [x21, #:lo12:.LANCHOR168]
+	mov	w1, w19
+	ldr	x2, [x22, #:lo12:.LANCHOR166]
+	mov	w0, w20
+	ldrb	w4, [x23, 9]
+	bl	flash_prog_page
+	cmn	w0, #1
+	beq	.L2116
+	ldrb	w4, [x23, 9]
+	mov	w1, w19
+	ldr	x3, [x21, #:lo12:.LANCHOR168]
+	mov	w0, w20
+	ldr	x2, [x22, #:lo12:.LANCHOR166]
+	bl	flash_read_page_en
+	cmn	w0, #1
+	beq	.L2116
+	ldr	x0, [x22, #:lo12:.LANCHOR166]
+	ldr	w1, [x0]
+	mov	w0, 42405
+	movk	w0, 0xa5a5, lsl 16
+	cmp	w1, w0
+	bne	.L2116
+	ldr	x0, [x21, #:lo12:.LANCHOR168]
+	ldr	w1, [x0]
+	mov	w0, 23130
+	movk	w0, 0x5a5a, lsl 16
+	cmp	w1, w0
+	csetm	w21, ne
+	b	.L2115
+	.size	flash_test_blk, .-flash_test_blk
+	.section	.text.id_block_prog_msb_ff_data,"ax",@progbits
+	.align	2
+	.global	id_block_prog_msb_ff_data
+	.type	id_block_prog_msb_ff_data, %function
+id_block_prog_msb_ff_data:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	and	w22, w0, 255
+	adrp	x0, .LANCHOR19
+	stp	x19, x20, [sp, 16]
+	stp	x23, x24, [sp, 48]
+	ldrb	w0, [x0, #:lo12:.LANCHOR19]
+	str	x25, [sp, 64]
+	cbnz	w0, .L2124
+	adrp	x20, .LANCHOR33
+	add	x20, x20, :lo12:.LANCHOR33
+	ldrb	w0, [x20, 19]
+	sub	w0, w0, #5
+	and	w3, w0, 255
+	cmp	w3, 63
+	bhi	.L2124
+	and	w19, w2, 65535
+	mov	x2, 16391
+	movk	x2, 0x4000, lsl 16
+	movk	x2, 0x8000, lsl 48
+	lsr	x0, x2, x3
+	tbz	x0, 0, .L2124
+	adrp	x21, .LANCHOR145
+	mov	w23, w1
+	add	x21, x21, :lo12:.LANCHOR145
+	mov	w25, 65535
+	adrp	x24, .LANCHOR166
+.L2126:
+	ldrh	w0, [x20, 10]
+	cmp	w0, w19
+	bhi	.L2127
+.L2124:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L2127:
+	ldrh	w0, [x21, w19, sxtw 1]
+	cmp	w0, w25
+	bne	.L2124
+	ldr	x0, [x24, #:lo12:.LANCHOR166]
+	mov	w2, 16384
+	mov	w1, 255
+	bl	ftl_memset
+	ldr	x3, [x24, #:lo12:.LANCHOR166]
+	add	w1, w19, w23
+	ldrb	w4, [x20, 9]
+	add	w19, w19, 1
+	mov	x2, x3
+	mov	w0, w22
+	and	w19, w19, 65535
+	bl	flash_prog_page
+	b	.L2126
+	.size	id_block_prog_msb_ff_data, .-id_block_prog_msb_ff_data
+	.section	.text.flash_start_one_pass_page_prog,"ax",@progbits
+	.align	2
+	.global	flash_start_one_pass_page_prog
+	.type	flash_start_one_pass_page_prog, %function
+flash_start_one_pass_page_prog:
+	stp	x29, x30, [sp, -32]!
+	and	w8, w0, 255
+	and	w7, w3, 255
+	adrp	x0, .LANCHOR13
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w20, w2, 255
+	ldr	x19, [x0, #:lo12:.LANCHOR13]
+	mov	w0, w7
+	bl	nandc_cs
+	cbz	w8, .L2130
+	sxtw	x0, w7
+	add	x0, x0, 8
+	add	x0, x19, x0, lsl 8
+	str	w8, [x0, 8]
+.L2130:
+	ubfiz	x0, x7, 8, 8
+	add	x19, x19, x0
+	mov	w0, 128
+	str	w0, [x19, 2056]
+	and	w0, w4, 255
+	str	wzr, [x19, 2052]
+	str	wzr, [x19, 2052]
+	str	w0, [x19, 2052]
+	lsr	w0, w4, 8
+	str	w0, [x19, 2052]
+	lsr	w0, w4, 16
+	str	w0, [x19, 2052]
+	adrp	x0, .LANCHOR31
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	cbz	w0, .L2131
+	lsr	w0, w4, 24
+	str	w0, [x19, 2052]
+.L2131:
+	mov	w0, w4
+	bl	nandc_set_seed
+	adrp	x0, .LANCHOR33+9
+	mov	x4, x6
+	mov	x3, x5
+	mov	w1, 1
+	ldrb	w2, [x0, #:lo12:.LANCHOR33+9]
+	mov	w0, w7
+	bl	nandc_xfer
+	str	w20, [x19, 2056]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	flash_start_one_pass_page_prog, .-flash_start_one_pass_page_prog
+	.section	.text.flash_dual_page_prog,"ax",@progbits
+	.align	2
+	.global	flash_dual_page_prog
+	.type	flash_dual_page_prog, %function
+flash_dual_page_prog:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w20, w0, 255
+	stp	x25, x26, [sp, 64]
+	mov	x25, x2
+	adrp	x2, .LANCHOR13
+	stp	x21, x22, [sp, 32]
+	ubfiz	x22, x20, 8, 8
+	stp	x27, x28, [sp, 80]
+	add	x0, x22, 2048
+	ldr	x22, [x2, #:lo12:.LANCHOR13]
+	mov	w19, 24
+	adrp	x27, .LANCHOR14
+	add	x22, x22, x0
+	adrp	x0, .LANCHOR32
+	stp	x23, x24, [sp, 48]
+	mov	w21, w1
+	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	mov	x26, x3
+	mov	x23, x4
+	mov	x24, x5
+	sub	w0, w19, w0
+	mov	w19, 1
+	ubfx	x28, x21, 24, 2
+	lsl	w19, w19, w0
+	ldr	w0, [x27, #:lo12:.LANCHOR14]
+	sub	w19, w19, #1
+	and	w19, w19, w1
+	tbz	x0, 4, .L2140
+	adrp	x0, .LC132
+	mov	w3, w6
+	mov	w2, w28
+	add	x0, x0, :lo12:.LC132
+	bl	printf
+.L2140:
+	bl	nandc_wait_flash_ready
+	mov	w0, w20
+	bl	nandc_cs
+	mov	w0, w20
+	cbnz	w28, .L2141
+	bl	zftl_flash_enter_slc_mode
+.L2142:
+	mov	x6, x26
+	mov	x5, x25
+	mov	w4, w19
+	mov	w3, w20
+	mov	w2, 16
+	mov	w1, 0
+	mov	w0, 0
+	bl	flash_start_one_pass_page_prog
+	bl	nandc_wait_flash_ready
+	mov	x6, x24
+	mov	x5, x23
+	add	w4, w19, 1
+	mov	w3, w20
+	mov	w2, 16
+	mov	w1, 0
+	mov	w0, 0
+	bl	flash_start_one_pass_page_prog
+	bl	nandc_wait_flash_ready
+	mov	x0, x22
+	bl	flash_read_status
+	mov	w3, w0
+	bl	nandc_de_cs.constprop.32
+	and	w2, w3, 4
+	tbz	x3, 2, .L2139
+	ldr	w0, [x27, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2144
+	adrp	x0, .LC133
+	mov	w1, w21
+	add	x0, x0, :lo12:.LC133
+	bl	printf
+.L2144:
+	mov	w2, -1
+.L2139:
+	mov	w0, w2
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	ret
+.L2141:
+	bl	zftl_flash_exit_slc_mode
+	b	.L2142
+	.size	flash_dual_page_prog, .-flash_dual_page_prog
+	.section	.text.ymtc_flash_tlc_page_prog,"ax",@progbits
+	.align	2
+	.global	ymtc_flash_tlc_page_prog
+	.type	ymtc_flash_tlc_page_prog, %function
+ymtc_flash_tlc_page_prog:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w20, w0, 255
+	str	x25, [sp, 64]
+	mov	w25, w1
+	adrp	x1, .LANCHOR13
+	stp	x21, x22, [sp, 32]
+	ubfiz	x22, x20, 8, 8
+	mov	w19, 24
+	add	x0, x22, 2048
+	ldr	x22, [x1, #:lo12:.LANCHOR13]
+	mov	w21, 1
+	stp	x23, x24, [sp, 48]
+	add	x22, x22, x0
+	adrp	x0, .LANCHOR32
+	mov	x23, x2
+	mov	x24, x3
+	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	sub	w19, w19, w0
+	bl	nandc_wait_flash_ready
+	lsl	w19, w21, w19
+	mov	w0, w20
+	sub	w19, w19, #1
+	bl	nandc_cs
+	and	w19, w19, w25
+	mov	w0, w20
+	bl	zftl_flash_exit_slc_mode
+	mov	x6, x24
+	mov	x5, x23
+	mov	w4, w19
+	mov	w3, w20
+	mov	w1, w21
+	mov	w2, 26
+	mov	w0, 0
+	bl	flash_start_one_pass_page_prog
+	bl	nandc_wait_flash_ready
+	mov	x6, x24
+	mov	x5, x23
+	add	w4, w19, w21
+	mov	w3, w20
+	mov	w1, w21
+	mov	w2, 26
+	mov	w0, 0
+	bl	flash_start_one_pass_page_prog
+	bl	nandc_wait_flash_ready
+	mov	x6, x24
+	mov	x5, x23
+	add	w4, w19, 2
+	mov	w3, w20
+	mov	w1, w21
+	mov	w2, 16
+	mov	w0, 0
+	bl	flash_start_one_pass_page_prog
+	bl	nandc_wait_flash_ready
+	mov	x0, x22
+	bl	flash_read_status
+	mov	w3, w0
+	bl	nandc_de_cs.constprop.32
+	and	w2, w3, 4
+	tbz	x3, 2, .L2152
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2154
+	adrp	x0, .LC134
+	mov	w1, w25
+	add	x0, x0, :lo12:.LC134
+	bl	printf
+.L2154:
+	mov	w2, -1
+.L2152:
+	mov	w0, w2
+	ldr	x25, [sp, 64]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	ret
+	.size	ymtc_flash_tlc_page_prog, .-ymtc_flash_tlc_page_prog
+	.section	.text.fw_flash_page_prog.constprop.29,"ax",@progbits
+	.align	2
+	.type	fw_flash_page_prog.constprop.29, %function
+fw_flash_page_prog.constprop.29:
+	stp	x29, x30, [sp, -64]!
+	adrp	x4, .LANCHOR33
+	add	x4, x4, :lo12:.LANCHOR33
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x20, x1
+	stp	x21, x22, [sp, 32]
+	mov	x21, x2
+	str	x23, [sp, 48]
+	ldrb	w19, [x4, 9]
+	udiv	w19, w0, w19
+	adrp	x0, .LANCHOR50
+	ldrb	w23, [x0, #:lo12:.LANCHOR50]
+	adrp	x0, .LANCHOR17
+	ldrb	w0, [x0, #:lo12:.LANCHOR17]
+	bl	nandc_bch_sel
+	ldrb	w0, [x4, 7]
+	cmp	w0, 9
+	bne	.L2160
+	adrp	x0, .LANCHOR19
+	ldrb	w0, [x0, #:lo12:.LANCHOR19]
+	cbnz	w0, .L2160
+	ldrb	w0, [x4, 12]
+	cmp	w0, 3
+	bne	.L2161
+	mov	x3, x21
+	mov	x2, x20
+	mov	w1, w19
+	mov	w0, 0
+	bl	ymtc_flash_tlc_page_prog
+.L2164:
+	mov	w4, w0
+	mov	w0, w23
+	bl	nandc_bch_sel
+	ldr	x23, [sp, 48]
+	mov	w0, w4
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+.L2161:
+	adrp	x22, .LANCHOR166
+	mov	w2, 16384
+	mov	w1, 255
+	ldr	x0, [x22, #:lo12:.LANCHOR166]
+	bl	ftl_memset
+	ldr	x5, [x22, #:lo12:.LANCHOR166]
+	mov	w6, 4
+	mov	x3, x21
+	mov	x2, x20
+	mov	x4, x5
+	mov	w1, w19
+	mov	w0, 0
+	bl	flash_dual_page_prog
+	b	.L2164
+.L2160:
+	mov	w4, 4
+	mov	x3, x21
+	mov	x2, x20
+	mov	w1, w19
+	mov	w0, 0
+	bl	flash_prog_page
+	b	.L2164
+	.size	fw_flash_page_prog.constprop.29, .-fw_flash_page_prog.constprop.29
+	.section	.text.idb_write_data,"ax",@progbits
+	.align	2
+	.global	idb_write_data
+	.type	idb_write_data, %function
+idb_write_data:
+	stp	x29, x30, [sp, -272]!
+	cmp	w1, 64
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w19, w1
+	stp	x21, x22, [sp, 32]
+	mov	w20, w3
+	stp	x23, x24, [sp, 48]
+	adrp	x22, .LANCHOR143
+	stp	x25, x26, [sp, 64]
+	mov	x24, x2
+	stp	x27, x28, [sp, 80]
+	bne	.L2166
+	ldr	w0, [x2]
+	mov	w1, 35899
+	movk	w1, 0xfcdc, lsl 16
+	cmp	w0, w1
+	mov	w1, 19282
+	movk	w1, 0x534e, lsl 16
+	ccmp	w0, w1, 4, ne
+	beq	.L2167
+	add	w1, w1, 327680
+	cmp	w0, w1
+	bne	.L2166
+.L2167:
+	adrp	x21, .LANCHOR141
+	mov	w1, 1
+	strb	w1, [x22, #:lo12:.LANCHOR143]
+	ldr	x0, [x21, #:lo12:.LANCHOR141]
+	cbnz	x0, .L2168
+	mov	w0, 262144
+	bl	ftl_malloc
+	str	x0, [x21, #:lo12:.LANCHOR141]
+.L2168:
+	adrp	x0, .LANCHOR177
+	mov	w1, 64
+	str	w1, [x0, #:lo12:.LANCHOR177]
+.L2166:
+	ldrb	w0, [x22, #:lo12:.LANCHOR143]
+	cbz	w0, .L2234
+	adrp	x0, .LANCHOR141
+	mov	x23, x0
+	ldr	x21, [x0, #:lo12:.LANCHOR141]
+	cbz	x21, .L2234
+	add	w0, w19, w20
+	str	w0, [x29, 140]
+	cmp	w0, 63
+	bls	.L2170
+	cmp	w19, 575
+	bhi	.L2171
+	adrp	x21, .LANCHOR144
+	ldr	x0, [x21, #:lo12:.LANCHOR144]
+	cbz	x0, .L2172
+.L2175:
+	adrp	x1, .LANCHOR142
+	mov	w2, 1
+	ldr	x0, [x23, #:lo12:.LANCHOR141]
+	cmp	w19, 64
+	str	w2, [x1, #:lo12:.LANCHOR142]
+	bhi	.L2287
+	mov	w4, 64
+	sub	w4, w4, w19
+	sub	w2, w20, w4
+	ubfiz	x4, x4, 9, 25
+	lsl	w2, w2, 9
+	add	x1, x24, x4
+.L2293:
+	bl	ftl_memcpy
+.L2176:
+	adrp	x0, .LANCHOR177
+	ldr	w0, [x0, #:lo12:.LANCHOR177]
+	cmp	w19, w0
+	beq	.L2230
+	strb	wzr, [x22, #:lo12:.LANCHOR143]
+	b	.L2230
+.L2172:
+	mov	w0, 262144
+	bl	ftl_malloc
+	str	x0, [x21, #:lo12:.LANCHOR144]
+	cbnz	x0, .L2175
+	mov	w0, -1
+	b	.L2165
+.L2287:
+	mov	w2, 576
+	sub	w2, w2, w19
+	cmp	w20, w2
+	sub	w3, w19, #64
+	csel	w2, w20, w2, ls
+	ubfiz	x3, x3, 9, 25
+	lsl	w2, w2, 9
+	mov	x1, x24
+	add	x0, x0, x3
+	b	.L2293
+.L2170:
+	cmp	w19, 575
+	bls	.L2176
+.L2171:
+	adrp	x0, .LANCHOR142
+	ldr	w0, [x0, #:lo12:.LANCHOR142]
+	cbz	w0, .L2176
+	ldr	w0, [x21]
+	mov	w1, 35899
+	movk	w1, 0xfcdc, lsl 16
+	cmp	w0, w1
+	mov	w1, 19282
+	movk	w1, 0x534e, lsl 16
+	ccmp	w0, w1, 4, ne
+	beq	.L2177
+	add	w1, w1, 327680
+	cmp	w0, w1
+	bne	.L2178
+.L2177:
+	adrp	x0, .LANCHOR0
+	mov	x10, x0
+	ldrb	w1, [x0, #:lo12:.LANCHOR0]
+	str	w1, [x29, 176]
+	adrp	x1, .LANCHOR19
+	mov	x11, x1
+	ldr	w0, [x29, 176]
+	ldrb	w2, [x1, #:lo12:.LANCHOR19]
+	str	w2, [x29, 204]
+	cbz	w0, .L2179
+	ldrh	w0, [x29, 176]
+	str	w0, [x29, 172]
+	uxtw	x0, w2
+	cmp	w0, 0
+	cset	w0, eq
+.L2290:
+	adrp	x8, .LANCHOR33
+	add	x8, x8, :lo12:.LANCHOR33
+	str	w0, [x29, 200]
+	mov	w0, 0
+	ldrb	w19, [x8, 9]
+	ldrh	w22, [x8, 26]
+	bl	zftl_flash_exit_slc_mode
+	ldrh	w20, [x8, 10]
+	add	x1, x21, 258048
+	ldrb	w0, [x11, #:lo12:.LANCHOR19]
+	mov	w4, 16981
+	strb	w0, [x10, #:lo12:.LANCHOR0]
+	add	x1, x1, 2044
+	ldrb	w0, [x8, 12]
+	lsl	w20, w20, 2
+	mov	w2, 65023
+	movk	w4, 0x4f4f, lsl 16
+	mov	w3, 4098
+	sdiv	w20, w20, w0
+	mov	w0, 512
+	cmp	w20, 512
+	csel	w20, w20, w0, lt
+	mov	w0, 0
+.L2186:
+	ldr	w5, [x1]
+	cbnz	w5, .L2182
+	cbnz	w0, .L2183
+	str	w4, [x1, 2048]
+.L2184:
+	add	w0, w0, 1
+	sub	w2, w2, #1
+	cmp	w0, w3
+	sub	x1, x1, #4
+	csel	w0, w0, wzr, ls
+	cmp	w2, 4096
+	bne	.L2186
+.L2182:
+	ldr	w1, [x21, w2, uxtw 2]
+	mov	w3, w20
+	adrp	x0, .LC135
+	add	x0, x0, :lo12:.LC135
+	bl	printf
+	str	wzr, [x29, 180]
+	mul	w0, w22, w19
+	str	wzr, [x29, 192]
+	str	w0, [x29, 128]
+	adrp	x0, .LANCHOR52
+	add	x0, x0, :lo12:.LANCHOR52
+	str	x0, [x29, 184]
+.L2225:
+	adrp	x23, .LANCHOR144
+	mov	w1, 0
+	mov	w2, 512
+	ldr	x0, [x23, #:lo12:.LANCHOR144]
+	bl	ftl_memset
+	str	x23, [x29, 160]
+	adrp	x0, .LANCHOR27
+	ldr	w1, [x29, 192]
+	ldr	x0, [x0, #:lo12:.LANCHOR27]
+	add	x0, x0, x1, uxtw
+	ldrb	w19, [x0, 32]
+	cmp	w19, 255
+	beq	.L2187
+	ldr	w0, [x29, 128]
+	mul	w19, w19, w0
+	ldr	w0, [x29, 200]
+	cbz	w0, .L2188
+	and	w0, w1, -3
+	adrp	x10, .LANCHOR0
+	cmp	w0, 1
+	adrp	x8, .LANCHOR19
+	beq	.L2189
+	ldr	w0, [x29, 200]
+	cmp	w0, 3
+	bne	.L2190
+.L2189:
+	ldrb	w0, [x29, 172]
+	strb	w0, [x10, #:lo12:.LANCHOR0]
+	strb	w0, [x8, #:lo12:.LANCHOR19]
+.L2188:
+	adrp	x22, .LANCHOR33
+	add	x27, x22, :lo12:.LANCHOR33
+	ldr	x0, [x29, 184]
+	ldrb	w24, [x27, 9]
+	ldrh	w25, [x27, 26]
+	ldrb	w0, [x0]
+	str	w0, [x29, 136]
+	udiv	w1, w19, w24
+	ldr	x0, [x29, 184]
+	mul	w25, w25, w24
+	strb	wzr, [x0]
+	mov	w0, 0
+	bl	flash_erase_block
+	udiv	w0, w19, w25
+	ldrb	w1, [x27, 12]
+	msub	w0, w0, w25, w19
+	str	w0, [x29, 168]
+	sub	w26, w19, w0
+	ldrh	w0, [x27, 10]
+	cmp	w19, w26
+	lsl	w0, w0, 2
+	sdiv	w0, w0, w1
+	str	w0, [x29, 156]
+	bne	.L2240
+	adrp	x0, .LANCHOR28
+	ldrb	w0, [x0, #:lo12:.LANCHOR28]
+	cmp	w0, 9
+	bne	.L2240
+	ldr	x0, [x29, 160]
+	mov	w2, 1024
+	mov	w1, 0
+	ldr	x25, [x0, #:lo12:.LANCHOR144]
+	mov	x0, x25
+	bl	ftl_memset
+	mov	w0, 18766
+	movk	w0, 0x464e, lsl 16
+	str	w0, [x25]
+	mov	w0, 12
+	str	w0, [x25, 4]
+	adrp	x0, .LANCHOR19
+	strb	wzr, [x25, 16]
+	str	wzr, [x25, 12]
+	ldrb	w0, [x0, #:lo12:.LANCHOR19]
+	cbz	w0, .L2192
+	ldrb	w0, [x27, 29]
+	strb	w0, [x25, 16]
+.L2192:
+	add	x1, x22, :lo12:.LANCHOR33
+	mov	w0, 4
+	strb	w0, [x25, 17]
+	cmp	w24, 8
+	strb	wzr, [x25, 20]
+	ldrh	w0, [x1, 10]
+	ldrb	w1, [x1, 12]
+	strh	wzr, [x25, 22]
+	sdiv	w0, w0, w1
+	mov	w1, 16
+	strh	w0, [x25, 18]
+	mov	w0, 70
+	csel	w0, w0, w1, hi
+	strb	w0, [x25, 21]
+	mov	w1, 12
+	add	x0, x25, 12
+	bl	js_hash
+	str	w0, [x25, 8]
+	sub	w0, w20, #4
+	str	w0, [x29, 196]
+.L2191:
+	adrp	x27, .LANCHOR3
+	mov	x23, x21
+	add	x27, x27, :lo12:.LANCHOR3
+	adrp	x0, .LANCHOR19
+	mov	w28, 0
+	add	x0, x0, :lo12:.LANCHOR19
+	str	x0, [x29, 144]
+.L2194:
+	ldr	w0, [x29, 156]
+	cmp	w0, w28
+	bhi	.L2205
+	ldr	x0, [x29, 160]
+	add	x22, x22, :lo12:.LANCHOR33
+	mov	w24, 4
+	mov	w25, 0
+	mov	w28, 0
+	ldr	x23, [x0, #:lo12:.LANCHOR144]
+	ldrb	w0, [x22, 9]
+	str	w0, [x29, 144]
+	ldrh	w0, [x22, 26]
+	ldr	w1, [x29, 144]
+	mul	w0, w0, w1
+	adrp	x1, .LANCHOR52
+	strb	wzr, [x1, #:lo12:.LANCHOR52]
+	udiv	w1, w19, w0
+	msub	w0, w1, w0, w19
+	str	w0, [x29, 168]
+	sub	w0, w19, w0
+	str	w0, [x29, 152]
+	ldr	w0, [x29, 168]
+	and	w0, w0, 3
+	str	w0, [x29, 160]
+	ldr	w0, [x29, 196]
+	str	w0, [x29, 156]
+	adrp	x0, .LANCHOR3
+	add	x0, x0, :lo12:.LANCHOR3
+	str	x0, [x29, 112]
+.L2206:
+	ldr	w0, [x29, 156]
+	cmp	w25, w0
+	bcc	.L2220
+	ldr	x0, [x29, 184]
+	ldrb	w1, [x29, 136]
+	strb	w1, [x0]
+	ldr	w0, [x29, 200]
+	cbz	w0, .L2221
+	mov	w0, 0
+	bl	zftl_flash_exit_slc_mode
+	adrp	x0, .LANCHOR0
+	strb	wzr, [x0, #:lo12:.LANCHOR0]
+	adrp	x0, .LANCHOR19
+	strb	wzr, [x0, #:lo12:.LANCHOR19]
+.L2221:
+	ldr	w0, [x29, 196]
+	mov	x2, 0
+	lsl	w1, w0, 7
+	adrp	x0, .LANCHOR144
+	ldr	x0, [x0, #:lo12:.LANCHOR144]
+.L2222:
+	mov	w22, w2
+	cmp	w2, w1
+	bcc	.L2223
+	ldr	w0, [x29, 180]
+	add	w0, w0, 1
+	str	w0, [x29, 180]
+	cmp	w0, 5
+	bls	.L2187
+	b	.L2232
+.L2179:
+	ldr	w0, [x29, 204]
+	cmp	w0, 3
+	beq	.L2236
+	cmp	w0, 2
+	mov	w0, 2
+	csel	w0, wzr, w0, ne
+	str	w0, [x29, 172]
+	ldr	w0, [x29, 204]
+	cmp	w0, 2
+	mov	w0, 3
+	csel	w0, wzr, w0, ne
+	b	.L2290
+.L2236:
+	ldr	w0, [x29, 204]
+	str	w0, [x29, 172]
+	mov	w0, 2
+	b	.L2290
+.L2183:
+	ldr	w5, [x21, w0, uxtw 2]
+	str	w5, [x1, 2048]
+	b	.L2184
+.L2190:
+	mov	w0, 0
+	bl	zftl_flash_exit_slc_mode
+	strb	wzr, [x10, #:lo12:.LANCHOR0]
+	strb	wzr, [x8, #:lo12:.LANCHOR19]
+	b	.L2188
+.L2240:
+	mov	x25, 0
+	str	w20, [x29, 196]
+	b	.L2191
+.L2205:
+	ldr	w0, [x29, 168]
+	adrp	x2, .LANCHOR19
+	add	w4, w0, w28
+	ldrb	w2, [x2, #:lo12:.LANCHOR19]
+	ubfx	x4, x4, 2, 16
+	add	w1, w4, 1
+	ldrh	w0, [x27, w1, sxtw 1]
+	cbz	w2, .L2196
+	adrp	x0, .LANCHOR1
+	ldrb	w7, [x0, #:lo12:.LANCHOR1]
+	lsl	w0, w1, 1
+	cmp	w7, 0
+	csel	w0, w0, w1, ne
+.L2196:
+	adrp	x1, .LANCHOR28
+	ldrb	w1, [x1, #:lo12:.LANCHOR28]
+	cmp	w1, 9
+	bne	.L2198
+.L2291:
+	str	w0, [x29, 208]
+	mov	w0, 61424
+	str	w0, [x29, 212]
+	ldrh	w0, [x27, w4, sxtw 1]
+	cbnz	w2, .L2200
+	mov	w4, w0
+.L2201:
+	mul	w0, w24, w4
+	cbnz	x25, .L2202
+	str	w4, [x29, 152]
+	add	x2, x29, 208
+	mov	x1, x23
+	add	w0, w0, w26
+	bl	fw_flash_page_prog.constprop.29
+	ldr	x0, [x29, 144]
+	ldr	w4, [x29, 152]
+	ldrb	w0, [x0]
+	cbnz	w0, .L2203
+	udiv	w1, w26, w24
+	add	w2, w4, 1
+	bl	id_block_prog_msb_ff_data
+.L2203:
+	ldr	w0, [x29, 196]
+	add	x23, x23, 2048
+	add	w0, w0, 16
+	cmp	w28, w0
+	bcc	.L2204
+	ldr	w0, [x29, 196]
+	add	w1, w0, 20
+	add	x0, x21, 2048
+	cmp	w28, w1
+	csel	x23, x0, x23, cc
+.L2204:
+	add	w5, w28, 4
+	mov	x25, 0
+	and	w28, w5, 65535
+	b	.L2194
+.L2198:
+	sub	w0, w0, #1
+	lsl	w0, w0, 2
+	b	.L2291
+.L2200:
+	adrp	x0, .LANCHOR1
+	ldrb	w1, [x0, #:lo12:.LANCHOR1]
+	lsl	w0, w4, 1
+	cmp	w1, 0
+	csel	w4, w0, w4, ne
+	b	.L2201
+.L2202:
+	add	x2, x29, 208
+	mov	x1, x25
+	add	w0, w0, w26
+	bl	fw_flash_page_prog.constprop.29
+	b	.L2204
+.L2220:
+	ldr	w0, [x29, 160]
+	adrp	x1, .LANCHOR19
+	sub	w27, w24, w0
+	ldr	w0, [x29, 168]
+	ldrb	w1, [x1, #:lo12:.LANCHOR19]
+	and	w27, w27, 65535
+	add	w22, w0, w25
+	ldr	x0, [x29, 112]
+	udiv	w22, w22, w24
+	and	w22, w22, 65535
+	ldrh	w0, [x0, w22, sxtw 1]
+	cbnz	w1, .L2207
+	mov	w22, w0
+.L2208:
+	adrp	x0, .LANCHOR17
+	ldr	w1, [x29, 152]
+	ldrb	w26, [x0, #:lo12:.LANCHOR17]
+	ldr	w0, [x29, 160]
+	add	w0, w0, w1
+	ldr	w1, [x29, 144]
+	madd	w22, w1, w22, w0
+	adrp	x0, .LANCHOR33+9
+	ldrb	w0, [x0, #:lo12:.LANCHOR33+9]
+	udiv	w22, w22, w0
+	adrp	x0, .LANCHOR50
+	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	str	w0, [x29, 132]
+	mov	w0, w26
+	bl	nandc_bch_sel
+	adrp	x0, .LANCHOR21
+	add	x0, x0, :lo12:.LANCHOR21
+	str	x0, [x29, 120]
+.L2209:
+	mov	w4, w24
+	add	x3, x29, 208
+	mov	x2, x23
+	mov	w1, w22
+	mov	w0, 0
+	bl	flash_read_page
+	mov	w5, w0
+	cmn	w0, #1
+	bne	.L2210
+	ldr	x0, [x29, 184]
+	ldrb	w6, [x0]
+	cbnz	w6, .L2211
+.L2214:
+	adrp	x0, .LANCHOR174
+	ldr	x6, [x0, #:lo12:.LANCHOR174]
+	cbnz	x6, .L2212
+.L2213:
+	ldr	x0, [x29, 120]
+	ldrb	w0, [x0]
+	cbz	w0, .L2210
+	mov	w4, w24
+	add	x3, x29, 208
+	mov	x2, x23
+	mov	w1, w22
+	mov	w0, 0
+	bl	flash_ddr_tuning_read
+	b	.L2292
+.L2207:
+	adrp	x0, .LANCHOR1
+	ldrb	w1, [x0, #:lo12:.LANCHOR1]
+	lsl	w0, w22, 1
+	cmp	w1, 0
+	csel	w22, w0, w22, ne
+	b	.L2208
+.L2211:
+	ldr	x0, [x29, 184]
+	mov	w1, w22
+	stp	w6, w5, [x29, 104]
+	mov	w4, w24
+	add	x3, x29, 208
+	mov	x2, x23
+	strb	wzr, [x0]
+	mov	w0, 0
+	bl	flash_read_page
+	cmn	w0, #1
+	ldr	x1, [x29, 184]
+	ldp	w6, w5, [x29, 104]
+	strb	w6, [x1]
+	beq	.L2214
+.L2292:
+	mov	w5, w0
+.L2210:
+	cmn	w5, #1
+	cset	w4, eq
+	cmp	w26, 16
+	cset	w0, ne
+	tst	w4, w0
+	beq	.L2216
+	mov	w0, 16
+	mov	w26, 16
+	bl	nandc_bch_sel
+	b	.L2209
+.L2212:
+	str	w5, [x29, 108]
+	mov	w4, w24
+	add	x3, x29, 208
+	mov	x2, x23
+	mov	w1, w22
+	mov	w0, 0
+	blr	x6
+	cmn	w0, #1
+	ldr	w5, [x29, 108]
+	beq	.L2213
+	b	.L2292
+.L2216:
+	ldr	w0, [x29, 132]
+	bl	nandc_bch_sel
+	cmp	w4, 0
+	ldr	w0, [x29, 152]
+	csinv	w28, w28, wzr, eq
+	cmp	w25, 0
+	ccmp	w19, w0, 0, eq
+	bne	.L2218
+	cbnz	w28, .L2218
+	ldr	w1, [x23]
+	mov	w0, 18766
+	movk	w0, 0x464e, lsl 16
+	cmp	w1, w0
+	bne	.L2218
+	ldr	w0, [x29, 156]
+	ldrb	w24, [x23, 17]
+	add	w0, w0, w27
+	str	w0, [x29, 156]
+.L2219:
+	add	w25, w27, w25
+	and	w25, w25, 65535
+	b	.L2206
+.L2218:
+	ubfiz	x0, x27, 9, 16
+	str	wzr, [x29, 160]
+	add	x23, x23, x0
+	b	.L2219
+.L2223:
+	ldr	w4, [x0, x2, lsl 2]
+	add	x2, x2, 1
+	add	x3, x21, x2, lsl 2
+	ldr	w3, [x3, -4]
+	cmp	w4, w3
+	beq	.L2222
+	mov	w2, 512
+	mov	w1, 0
+	bl	ftl_memset
+	mov	w1, w22
+	adrp	x0, .LC136
+	add	x0, x0, :lo12:.LC136
+	bl	printf
+	mov	w1, w19
+	mov	w0, 0
+	bl	flash_erase_block
+.L2187:
+	ldr	w0, [x29, 192]
+	add	w0, w0, 1
+	str	w0, [x29, 192]
+	cmp	w0, 4
+	bne	.L2225
+.L2232:
+	mov	w0, 0
+	bl	zftl_flash_exit_slc_mode
+	adrp	x0, .LANCHOR0
+	ldrb	w1, [x29, 176]
+	strb	w1, [x0, #:lo12:.LANCHOR0]
+	ldr	w0, [x29, 200]
+	cbz	w0, .L2226
+	adrp	x0, .LANCHOR19
+	ldrb	w1, [x29, 204]
+	strb	w1, [x0, #:lo12:.LANCHOR19]
+.L2226:
+	mov	w1, 2
+	adrp	x0, .LANCHOR34
+	strb	w1, [x0, #:lo12:.LANCHOR34]
+	mov	w0, 0
+	bl	zftl_flash_enter_slc_mode
+	ldr	w0, [x29, 180]
+	cbnz	w0, .L2178
+	adrp	x0, .LC137
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC137
+	bl	printf
+.L2178:
+	adrp	x0, .LANCHOR142
+	str	wzr, [x0, #:lo12:.LANCHOR142]
+	adrp	x0, .LANCHOR143
+	strb	wzr, [x0, #:lo12:.LANCHOR143]
+	adrp	x0, .LANCHOR141
+	ldr	x1, [x0, #:lo12:.LANCHOR141]
+	cbz	x1, .L2228
+	str	xzr, [x0, #:lo12:.LANCHOR141]
+.L2228:
+	adrp	x0, .LANCHOR144
+	ldr	x1, [x0, #:lo12:.LANCHOR144]
+	cbz	x1, .L2230
+	str	xzr, [x0, #:lo12:.LANCHOR144]
+.L2230:
+	adrp	x0, .LANCHOR177
+	ldr	w1, [x29, 140]
+	str	w1, [x0, #:lo12:.LANCHOR177]
+.L2234:
+	mov	w0, 0
+.L2165:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 272
+	ret
+	.size	idb_write_data, .-idb_write_data
+	.section	.text.flash_start_tlc_page_prog,"ax",@progbits
+	.align	2
+	.global	flash_start_tlc_page_prog
+	.type	flash_start_tlc_page_prog, %function
+flash_start_tlc_page_prog:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x25, x26, [sp, 64]
+	and	w25, w0, 255
+	adrp	x0, .LANCHOR18
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	and	w21, w1, 255
+	stp	x23, x24, [sp, 48]
+	and	w26, w3, 255
+	ldrb	w1, [x0, #:lo12:.LANCHOR18]
+	and	w22, w2, 255
+	mov	w20, w4
+	mov	x23, x5
+	mov	x24, x6
+	cmp	w1, w26
+	mov	x19, x0
+	bhi	.L2295
+	adrp	x1, .LANCHOR178
+	adrp	x0, .LC0
+	mov	w2, 859
+	add	x1, x1, :lo12:.LANCHOR178
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2295:
+	ldrb	w0, [x19, #:lo12:.LANCHOR18]
+	cmp	w0, w26
+	bls	.L2294
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
+	ldrb	w5, [x0, w26, sxtw]
+	adrp	x0, .LANCHOR13
+	ldr	x19, [x0, #:lo12:.LANCHOR13]
+	mov	w0, w5
+	bl	nandc_cs
+	cbz	w25, .L2297
+	sxtw	x0, w5
+	add	x0, x0, 8
+	add	x0, x19, x0, lsl 8
+	str	w25, [x0, 8]
+.L2297:
+	ubfiz	x0, x5, 8, 8
+	add	x19, x19, x0
+	mov	w0, 128
+	str	w21, [x19, 2056]
+	str	w0, [x19, 2056]
+	and	w0, w20, 255
+	str	wzr, [x19, 2052]
+	str	wzr, [x19, 2052]
+	str	w0, [x19, 2052]
+	lsr	w0, w20, 8
+	str	w0, [x19, 2052]
+	lsr	w0, w20, 16
+	add	w20, w20, w20, lsl 1
+	str	w0, [x19, 2052]
+	sub	w0, w20, #1
+	add	w0, w0, w21
+	bl	nandc_set_seed
+	adrp	x0, .LANCHOR33+9
+	mov	x4, x24
+	mov	x3, x23
+	mov	w1, 1
+	ldrb	w2, [x0, #:lo12:.LANCHOR33+9]
+	mov	w0, w5
+	bl	nandc_xfer
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	str	w22, [x19, 2056]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 80
+	b	nandc_de_cs.constprop.32
+.L2294:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+	.size	flash_start_tlc_page_prog, .-flash_start_tlc_page_prog
+	.section	.text.queue_tlc_prog_cmd,"ax",@progbits
+	.align	2
+	.type	queue_tlc_prog_cmd, %function
+queue_tlc_prog_cmd:
+	stp	x29, x30, [sp, -64]!
+	mov	w2, 24
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	mov	x21, x0
+	ldr	x7, [x0]
+	adrp	x0, .LANCHOR32
+	mov	w22, 1
+	stp	x19, x20, [sp, 16]
+	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	str	x23, [sp, 48]
+	mov	w23, w1
+	sub	w2, w2, w0
+	ldr	w1, [x7, 40]
+	lsl	w19, w22, w0
+	adrp	x0, .LANCHOR37
+	lsl	w20, w22, w2
+	sub	w19, w19, #1
+	ldrb	w0, [x0, #:lo12:.LANCHOR37]
+	sub	w20, w20, #1
+	and	w20, w20, w1
+	lsr	w1, w1, w2
+	and	w19, w19, w1
+	and	w19, w19, 255
+	cbz	w0, .L2303
+	mov	w0, w19
+	bl	zftl_flash_exit_slc_mode
+	ldr	x0, [x21]
+	mov	w4, w20
+	mov	w3, w19
+	mov	w1, w22
+	mov	w2, 26
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	mov	w0, 0
+	bl	flash_start_one_pass_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x0, [x21, 8]
+	add	w4, w20, w22
+	mov	w3, w19
+	mov	w1, w22
+	mov	w2, 26
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	mov	w0, 0
+	bl	flash_start_one_pass_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x0, [x21, 16]
+	add	w4, w20, 2
+	mov	w3, w19
+	mov	w2, 16
+	mov	w1, w22
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	mov	w0, 0
+	bl	flash_start_one_pass_page_prog
+.L2304:
+	cbz	w23, .L2302
+	ldr	x1, [x21]
+	mov	w0, 4
+	strb	w0, [x1, 58]
+	mov	w0, 1
+	strb	w0, [x1, 59]
+	mov	w0, -1
+	strb	w0, [x1]
+	adrp	x0, .LANCHOR60
+	add	x0, x0, :lo12:.LANCHOR60
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	b	buf_add_tail
+.L2303:
+	ldr	x5, [x7, 8]
+	mov	w4, w20
+	ldr	x6, [x7, 24]
+	mov	w3, w19
+	ldrb	w0, [x7, 60]
+	mov	w1, w22
+	mov	w2, 26
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldp	x7, x0, [x21]
+	mov	w4, w20
+	mov	w3, w19
+	mov	w2, 26
+	mov	w1, 2
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x0, [x21, 16]
+	mov	w4, w20
+	ldr	x7, [x21]
+	mov	w3, w19
+	mov	w2, 16
+	mov	w1, 3
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
+	b	.L2304
+.L2302:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	ret
+	.size	queue_tlc_prog_cmd, .-queue_tlc_prog_cmd
+	.section	.text.sblk_3d_tlc_dump_prog,"ax",@progbits
+	.align	2
+	.global	sblk_3d_tlc_dump_prog
+	.type	sblk_3d_tlc_dump_prog, %function
+sblk_3d_tlc_dump_prog:
+	stp	x29, x30, [sp, -48]!
+	mov	w2, 24
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x20, x0
+	ldr	w1, [x0, 40]
+	adrp	x0, .LANCHOR32
+	stp	x21, x22, [sp, 32]
+	mov	w22, 1
+	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	sub	w2, w2, w0
+	lsl	w19, w22, w0
+	adrp	x0, .LANCHOR37
+	lsl	w21, w22, w2
+	sub	w19, w19, #1
+	ldrb	w0, [x0, #:lo12:.LANCHOR37]
+	sub	w21, w21, #1
+	and	w21, w21, w1
+	lsr	w1, w1, w2
+	and	w19, w19, w1
+	and	w19, w19, 255
+	cbz	w0, .L2308
+	mov	w0, w19
+	bl	zftl_flash_exit_slc_mode
+	ldr	x5, [x20, 8]
+	mov	w4, w21
+	ldr	x6, [x20, 24]
+	mov	w3, w19
+	mov	w1, w22
+	mov	w2, 26
+	mov	w0, 0
+	bl	flash_start_one_pass_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x5, [x20, 8]
+	add	w4, w21, w22
+	ldr	x6, [x20, 24]
+	mov	w3, w19
+	mov	w1, w22
+	mov	w2, 26
+	mov	w0, 0
+	bl	flash_start_one_pass_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x5, [x20, 8]
+	add	w4, w21, 2
+	ldr	x6, [x20, 24]
+	mov	w3, w19
+	mov	w2, 16
+	mov	w1, w22
+	mov	w0, 0
+	bl	flash_start_one_pass_page_prog
+.L2309:
+	bl	nandc_wait_flash_ready
+	ldr	w0, [x20, 40]
+	mov	w1, 64
+	ldp	x21, x22, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	b	flash_wait_device_ready
+.L2308:
+	ldr	x5, [x20, 8]
+	mov	w4, w21
+	ldr	x6, [x20, 24]
+	mov	w3, w19
+	mov	w1, w22
+	mov	w2, 26
+	mov	w0, 0
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x5, [x20, 8]
+	mov	w4, w21
+	ldr	x6, [x20, 24]
+	mov	w3, w19
+	mov	w2, 26
+	mov	w1, 2
+	mov	w0, 0
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x5, [x20, 8]
+	mov	w4, w21
+	ldr	x6, [x20, 24]
+	mov	w3, w19
+	mov	w2, 16
+	mov	w1, 3
+	mov	w0, 0
+	bl	flash_start_tlc_page_prog
+	b	.L2309
+	.size	sblk_3d_tlc_dump_prog, .-sblk_3d_tlc_dump_prog
+	.section	.text.flash_start_3d_mlc_page_prog,"ax",@progbits
+	.align	2
+	.global	flash_start_3d_mlc_page_prog
+	.type	flash_start_3d_mlc_page_prog, %function
+flash_start_3d_mlc_page_prog:
+	stp	x29, x30, [sp, -64]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	and	w21, w0, 255
+	adrp	x0, .LANCHOR18
+	stp	x19, x20, [sp, 16]
+	stp	x23, x24, [sp, 48]
+	and	w24, w1, 255
+	ldrb	w1, [x0, #:lo12:.LANCHOR18]
+	mov	w20, w2
+	mov	x22, x3
+	mov	x23, x4
+	cmp	w1, w24
+	mov	x19, x0
+	bhi	.L2312
+	adrp	x1, .LANCHOR179
+	adrp	x0, .LC0
+	mov	w2, 892
+	add	x1, x1, :lo12:.LANCHOR179
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2312:
+	ldrb	w0, [x19, #:lo12:.LANCHOR18]
+	cmp	w0, w24
+	bls	.L2311
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
+	ldrb	w5, [x0, w24, sxtw]
+	adrp	x0, .LANCHOR13
+	ldr	x19, [x0, #:lo12:.LANCHOR13]
+	mov	w0, w5
+	bl	nandc_cs
+	ubfiz	x0, x5, 8, 8
+	add	x19, x19, x0
+	mov	w0, 128
+	str	w0, [x19, 2056]
+	and	w0, w20, 255
+	str	wzr, [x19, 2052]
+	str	wzr, [x19, 2052]
+	str	w0, [x19, 2052]
+	lsr	w0, w20, 8
+	str	w0, [x19, 2052]
+	lsr	w0, w20, 16
+	str	w0, [x19, 2052]
+	mov	w0, w20
+	bl	nandc_set_seed
+	adrp	x0, .LANCHOR33+9
+	mov	x4, x23
+	mov	x3, x22
+	mov	w1, 1
+	ldrb	w2, [x0, #:lo12:.LANCHOR33+9]
+	mov	w0, w5
+	bl	nandc_xfer
+	str	w21, [x19, 2056]
+.L2311:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	ret
+	.size	flash_start_3d_mlc_page_prog, .-flash_start_3d_mlc_page_prog
+	.section	.text.sblk_mlc_dump_prog,"ax",@progbits
+	.align	2
+	.global	sblk_mlc_dump_prog
+	.type	sblk_mlc_dump_prog, %function
+sblk_mlc_dump_prog:
+	stp	x29, x30, [sp, -48]!
+	mov	w2, 24
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x20, x0
+	ldr	w1, [x0, 40]
+	adrp	x0, .LANCHOR32
+	str	x21, [sp, 32]
+	ldrb	w19, [x0, #:lo12:.LANCHOR32]
+	mov	w0, 1
+	sub	w2, w2, w19
+	lsl	w19, w0, w19
+	sub	w19, w19, #1
+	lsl	w21, w0, w2
+	sub	w21, w21, #1
+	and	w21, w21, w1
+	lsr	w1, w1, w2
+	and	w19, w19, w1
+	and	w19, w19, 255
+	mov	w0, w19
+	bl	zftl_flash_exit_slc_mode
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2316
+	ldr	w2, [x20, 40]
+	adrp	x0, .LC138
+	mov	w1, w21
+	add	x0, x0, :lo12:.LC138
+	add	w3, w2, 1
+	bl	printf
+.L2316:
+	ldr	x3, [x20, 8]
+	mov	w2, w21
+	ldr	x4, [x20, 24]
+	mov	w1, w19
+	mov	w0, 16
+	bl	flash_start_3d_mlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x3, [x20, 8]
+	add	w2, w21, 1
+	ldr	x4, [x20, 24]
+	mov	w1, w19
+	mov	w0, 16
+	bl	flash_start_3d_mlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	w0, [x20, 40]
+	mov	w1, 64
+	bl	flash_wait_device_ready
+	mov	w2, w0
+	bl	nandc_de_cs.constprop.32
+	ldr	x21, [sp, 32]
+	mov	w0, w2
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+	.size	sblk_mlc_dump_prog, .-sblk_mlc_dump_prog
+	.section	.text.flash_start_page_prog,"ax",@progbits
+	.align	2
+	.global	flash_start_page_prog
+	.type	flash_start_page_prog, %function
+flash_start_page_prog:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	and	w21, w0, 255
+	adrp	x0, .LANCHOR32
+	stp	x19, x20, [sp, 16]
+	stp	x25, x26, [sp, 64]
+	mov	w19, 24
+	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	mov	w20, 1
+	str	x27, [sp, 80]
+	adrp	x27, .LANCHOR18
+	sub	w25, w19, w0
+	stp	x23, x24, [sp, 48]
+	lsl	w20, w20, w0
+	sub	w20, w20, #1
+	lsr	w0, w1, w25
+	and	w20, w20, w0
+	ldrb	w0, [x27, #:lo12:.LANCHOR18]
+	and	w20, w20, 255
+	mov	w24, w1
+	mov	x22, x2
+	mov	x23, x3
+	cmp	w0, w20
+	bhi	.L2322
+	adrp	x1, .LANCHOR180
+	adrp	x0, .LC0
+	mov	w2, 945
+	add	x1, x1, :lo12:.LANCHOR180
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2322:
+	ldrb	w0, [x27, #:lo12:.LANCHOR18]
+	cmp	w0, w20
+	bls	.L2321
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
+	mov	w19, 1
+	lsl	w19, w19, w25
+	sub	w19, w19, #1
+	ldrb	w26, [x0, w20, sxtw]
+	adrp	x0, .LANCHOR13
+	and	w19, w19, w24
+	ldr	x25, [x0, #:lo12:.LANCHOR13]
+	bl	nandc_rdy_status
+	cbnz	w0, .L2324
+	ldrb	w0, [x27, #:lo12:.LANCHOR18]
+	cmp	w0, 1
+	bne	.L2325
+	bl	nandc_wait_flash_ready
+.L2324:
+	mov	w0, w26
+	bl	hynix_reconfig_rr_para
+	mov	w0, w26
+	bl	nandc_cs
+	tst	x24, 50331648
+	bne	.L2326
+	mov	w0, w19
+	bl	slc_phy_page_address_calc
+	mov	w19, w0
+	adrp	x0, .LANCHOR0
+	ldrb	w0, [x0, #:lo12:.LANCHOR0]
+	cbz	w0, .L2327
+	mov	w0, w26
+	bl	zftl_flash_enter_slc_mode
+.L2327:
+	ubfiz	x20, x26, 8, 8
+	mov	w0, 128
+	add	x20, x25, x20
+	str	w0, [x20, 2056]
+	and	w0, w19, 255
+	str	wzr, [x20, 2052]
+	str	wzr, [x20, 2052]
+	str	w0, [x20, 2052]
+	lsr	w0, w19, 8
+	str	w0, [x20, 2052]
+	lsr	w0, w19, 16
+	str	w0, [x20, 2052]
+	adrp	x0, .LANCHOR31
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	cbz	w0, .L2328
+	lsr	w0, w19, 24
+	str	w0, [x20, 2052]
+.L2328:
+	mov	w0, w19
+	bl	nandc_set_seed
+	adrp	x0, .LANCHOR33+9
+	mov	x4, x23
+	mov	x3, x22
+	mov	w1, 1
+	ldrb	w2, [x0, #:lo12:.LANCHOR33+9]
+	mov	w0, w26
+	bl	nandc_xfer
+	ldr	x27, [sp, 80]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	str	w21, [x20, 2056]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 96
+	b	nandc_de_cs.constprop.32
+.L2325:
+	mov	w2, 64
+	mov	w1, w19
+	mov	w0, w20
+	bl	flash_wait_device_ready_raw
+	b	.L2324
+.L2326:
+	mov	w0, w26
+	bl	zftl_flash_exit_slc_mode
+	b	.L2327
+.L2321:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	ret
+	.size	flash_start_page_prog, .-flash_start_page_prog
+	.section	.text.queue_prog_cmd,"ax",@progbits
+	.align	2
+	.type	queue_prog_cmd, %function
+queue_prog_cmd:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	ldr	w1, [x0, 40]
+	ldr	x3, [x0, 24]
+	ldr	x2, [x0, 8]
+	str	x19, [sp, 16]
+	mov	x19, x0
+	mov	w0, 16
+	bl	flash_start_page_prog
+	adrp	x0, .LANCHOR60
+	ldr	w3, [x19, 40]
+	ldrb	w1, [x0, #:lo12:.LANCHOR60]
+	cmp	w1, 255
+	beq	.L2337
+	adrp	x2, .LANCHOR32
+	mov	w5, 24
+	adrp	x6, .LANCHOR56
+	add	x6, x6, :lo12:.LANCHOR56
+	ldrb	w4, [x2, #:lo12:.LANCHOR32]
+	mov	w2, 1
+	mov	x8, x6
+	sub	w5, w5, w4
+	lsl	w2, w2, w4
+	sub	w2, w2, #1
+	and	w2, w2, 65535
+	asr	w3, w3, w5
+	and	w3, w3, w2
+.L2339:
+	add	x7, x6, x1, lsl 6
+	ldr	w4, [x7, 40]
+	lsr	w4, w4, w5
+	and	w4, w2, w4
+	cmp	w3, w4
+	bne	.L2338
+	ldrb	w4, [x7, 58]
+	cmp	w4, 7
+	bne	.L2338
+	mov	w1, 3
+	strb	w1, [x7, 58]
+.L2337:
+	mov	w1, 3
+	strb	w1, [x19, 58]
+	mov	w1, 1
+	strb	w1, [x19, 59]
+	mov	w1, -1
+	strb	w1, [x19]
+	mov	x1, x19
+	add	x0, x0, :lo12:.LANCHOR60
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	b	buf_add_tail
+.L2338:
+	lsl	x1, x1, 6
+	ldrb	w1, [x8, x1]
+	cmp	w1, 255
+	bne	.L2339
+	b	.L2337
+	.size	queue_prog_cmd, .-queue_prog_cmd
+	.section	.text.flash_complete_plane_page_read,"ax",@progbits
+	.align	2
+	.global	flash_complete_plane_page_read
+	.type	flash_complete_plane_page_read, %function
+flash_complete_plane_page_read:
+	stp	x29, x30, [sp, -64]!
+	mov	w4, 24
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	mov	w24, w0
+	adrp	x0, .LANCHOR32
+	stp	x21, x22, [sp, 32]
+	stp	x19, x20, [sp, 16]
+	mov	w19, 1
+	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	mov	x20, x1
+	mov	x21, x2
+	sub	w22, w4, w0
+	lsl	w19, w19, w0
+	sub	w19, w19, #1
+	lsr	w0, w24, w22
+	and	w19, w19, w0
+	adrp	x0, .LANCHOR18
+	and	w19, w19, 255
+	mov	x23, x0
+	ldrb	w1, [x0, #:lo12:.LANCHOR18]
+	cmp	w1, w19
+	bhi	.L2346
+	adrp	x1, .LANCHOR181
+	adrp	x0, .LC0
+	mov	w2, 1055
+	add	x1, x1, :lo12:.LANCHOR181
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2346:
+	ldrb	w0, [x23, #:lo12:.LANCHOR18]
+	cmp	w0, w19
+	bls	.L2357
+	adrp	x2, .LANCHOR30
+	add	x2, x2, :lo12:.LANCHOR30
+	adrp	x0, .LANCHOR13
+	mov	w4, 1
+	lsl	w4, w4, w22
+	sub	w4, w4, #1
+	ldrb	w8, [x2, w19, sxtw]
+	and	w4, w4, w24
+	ldr	x7, [x0, #:lo12:.LANCHOR13]
+	ubfx	x24, x24, 24, 2
+	mov	w0, w8
+	bl	nandc_cs
+	cbnz	w24, .L2348
+	mov	w0, w4
+	bl	slc_phy_page_address_calc
+	mov	w4, w0
+.L2348:
+	adrp	x0, .LANCHOR20+16
+	and	x1, x8, 255
+	and	w6, w4, 255
+	lsr	w5, w4, 8
+	ldrb	w0, [x0, #:lo12:.LANCHOR20+16]
+	lsr	w3, w4, 16
+	adrp	x2, .LANCHOR31
+	cmp	w0, 1
+	adrp	x0, .LANCHOR16
+	bne	.L2349
+	add	x1, x7, x1, lsl 8
+	mov	w7, 6
+.L2375:
+	str	w7, [x1, 2056]
+	str	wzr, [x1, 2052]
+	str	wzr, [x1, 2052]
+	str	w6, [x1, 2052]
+	str	w5, [x1, 2052]
+	str	w3, [x1, 2052]
+	ldrb	w2, [x2, #:lo12:.LANCHOR31]
+	cbz	w2, .L2371
+	lsr	w2, w4, 24
+	str	w2, [x1, 2052]
+.L2371:
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
+	mov	w2, 224
+	str	w2, [x1, 2056]
+	ldrb	w0, [x0, 12]
+	cmp	w0, 3
+	bne	.L2355
+	cbz	w24, .L2355
+	adrp	x0, .LANCHOR36
+	ldrb	w0, [x0, #:lo12:.LANCHOR36]
+	cbnz	w0, .L2355
+	adrp	x0, .LANCHOR37
+	ldrb	w0, [x0, #:lo12:.LANCHOR37]
+	cbnz	w0, .L2355
+	add	w4, w4, w4, lsl 1
+	sub	w0, w24, #1
+	add	w0, w4, w0
+.L2372:
+	bl	nandc_set_seed
+	adrp	x0, .LANCHOR33+9
+	mov	x4, x21
+	mov	x3, x20
+	mov	w1, 0
+	ldrb	w2, [x0, #:lo12:.LANCHOR33+9]
+	mov	w0, w8
+	bl	nandc_xfer
+	mov	w2, w0
+	bl	nandc_de_cs.constprop.32
+	mov	w0, w2
+.L2345:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	ret
+.L2349:
+	ldr	x10, [x0, #:lo12:.LANCHOR16]
+	add	x1, x7, x1, lsl 8
+	ldrb	w10, [x10, 12]
+	cmp	w10, 3
+	bne	.L2352
+	mov	w7, 5
+	b	.L2375
+.L2352:
+	str	wzr, [x1, 2056]
+	str	wzr, [x1, 2052]
+	str	wzr, [x1, 2052]
+	str	w6, [x1, 2052]
+	ldrb	w2, [x2, #:lo12:.LANCHOR31]
+	str	w5, [x1, 2052]
+	str	w3, [x1, 2052]
+	cbz	w2, .L2354
+	lsr	w2, w4, 24
+	str	w2, [x1, 2052]
+.L2354:
+	mov	w2, 5
+	str	w2, [x1, 2056]
+	str	wzr, [x1, 2052]
+	str	wzr, [x1, 2052]
+	b	.L2371
+.L2355:
+	mov	w0, w4
+	b	.L2372
+.L2357:
+	mov	w0, -1
+	b	.L2345
+	.size	flash_complete_plane_page_read, .-flash_complete_plane_page_read
+	.section	.text.flash_complete_page_read,"ax",@progbits
+	.align	2
+	.global	flash_complete_page_read
+	.type	flash_complete_page_read, %function
+flash_complete_page_read:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	mov	w21, w0
+	adrp	x0, .LANCHOR32
+	stp	x19, x20, [sp, 16]
+	mov	x22, x1
+	mov	w1, 24
+	ldrb	w20, [x0, #:lo12:.LANCHOR32]
+	mov	w0, 1
+	stp	x23, x24, [sp, 48]
+	mov	x23, x2
+	sub	w1, w1, w20
+	stp	x25, x26, [sp, 64]
+	lsl	w20, w0, w20
+	sub	w20, w20, #1
+	lsl	w19, w0, w1
+	adrp	x0, .LANCHOR18
+	lsr	w1, w21, w1
+	stp	x27, x28, [sp, 80]
+	and	w20, w20, w1
+	ldrb	w0, [x0, #:lo12:.LANCHOR18]
+	sub	w19, w19, #1
+	and	w20, w20, 255
+	and	w19, w19, w21
+	ubfx	x24, x21, 24, 2
+	cmp	w0, w20
+	bhi	.L2377
+	adrp	x1, .LANCHOR182
+	adrp	x0, .LC0
+	mov	w2, 1212
+	add	x1, x1, :lo12:.LANCHOR182
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2377:
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
+	ldrb	w25, [x0, w20, sxtw]
+	adrp	x0, .LANCHOR13
+	ldr	x4, [x0, #:lo12:.LANCHOR13]
+	mov	w0, w25
+	bl	nandc_cs
+	cbnz	w24, .L2378
+	mov	w0, w19
+	bl	slc_phy_page_address_calc
+	mov	w19, w0
+.L2378:
+	ubfiz	x0, x25, 8, 8
+	mov	w1, 5
+	add	x0, x4, x0
+	adrp	x20, .LANCHOR33
+	str	w1, [x0, 2056]
+	add	x1, x20, :lo12:.LANCHOR33
+	str	wzr, [x0, 2052]
+	str	wzr, [x0, 2052]
+	ldrb	w1, [x1, 12]
+	cmp	w1, 3
+	bne	.L2379
+	and	w1, w19, 255
+	str	w1, [x0, 2052]
+	lsr	w1, w19, 8
+	str	w1, [x0, 2052]
+	lsr	w1, w19, 16
+	str	w1, [x0, 2052]
+.L2379:
+	mov	w1, 224
+	str	w1, [x0, 2056]
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
+	ldrb	w0, [x0, 12]
+	cmp	w0, 3
+	bne	.L2380
+	cbz	w24, .L2380
+	adrp	x0, .LANCHOR36
+	ldrb	w0, [x0, #:lo12:.LANCHOR36]
+	cbnz	w0, .L2380
+	adrp	x0, .LANCHOR37
+	ldrb	w0, [x0, #:lo12:.LANCHOR37]
+	cbnz	w0, .L2380
+	sub	w0, w24, #1
+	add	w1, w19, w19, lsl 1
+	add	w0, w0, w1
+.L2407:
+	add	x28, x20, :lo12:.LANCHOR33
+	bl	nandc_set_seed
+	mov	x4, x23
+	mov	x3, x22
+	mov	w1, 0
+	mov	w0, w25
+	ldrb	w2, [x28, 9]
+	bl	nandc_xfer
+	cmn	w0, #1
+	bne	.L2382
+	adrp	x26, .LANCHOR52
+	ldrb	w27, [x26, #:lo12:.LANCHOR52]
+	cbz	w27, .L2383
+	ldrb	w4, [x28, 9]
+	mov	x3, x23
+	strb	wzr, [x26, #:lo12:.LANCHOR52]
+	mov	x2, x22
+	orr	w1, w19, w24, lsl 24
+	mov	w0, w25
+	bl	flash_read_page
+	strb	w27, [x26, #:lo12:.LANCHOR52]
+	cbnz	w24, .L2384
+.L2389:
+	adrp	x1, .LANCHOR0
+	ldrb	w1, [x1, #:lo12:.LANCHOR0]
+	cbz	w1, .L2384
+	adrp	x1, .LANCHOR50
+	ldrb	w1, [x1, #:lo12:.LANCHOR50]
+	add	w1, w1, w1, lsl 1
+	cmp	w0, w1, lsr 2
+	blt	.L2384
+	add	x20, x20, :lo12:.LANCHOR33
+	ldrb	w1, [x20, 19]
+	sub	w1, w1, #4
+	and	w1, w1, 255
+	cmp	w1, 4
+	mov	w1, 256
+	csel	w0, w0, w1, hi
+.L2376:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	ret
+.L2380:
+	mov	w0, w19
+	b	.L2407
+.L2384:
+	cmn	w0, #1
+	bne	.L2376
+.L2390:
+	adrp	x0, .LANCHOR174
+	ldr	x5, [x0, #:lo12:.LANCHOR174]
+	cbnz	x5, .L2386
+.L2388:
+	adrp	x0, .LANCHOR52
+	mov	w3, -1
+	mov	w2, w21
+	mov	w1, 0
+	ldrb	w4, [x0, #:lo12:.LANCHOR52]
+	adrp	x0, .LC139
+	add	x0, x0, :lo12:.LC139
+	bl	printf
+	adrp	x0, .LANCHOR21
+	ldrb	w0, [x0, #:lo12:.LANCHOR21]
+	cbnz	w0, .L2387
+	mov	w0, -1
+	b	.L2376
+.L2386:
+	add	x0, x20, :lo12:.LANCHOR33
+	mov	x3, x23
+	mov	x2, x22
+	orr	w1, w19, w24, lsl 24
+	ldrb	w4, [x0, 9]
+	mov	w0, w25
+	blr	x5
+	cmn	w0, #1
+	beq	.L2388
+	b	.L2376
+.L2387:
+	add	x20, x20, :lo12:.LANCHOR33
+	orr	w1, w19, w24, lsl 24
+	mov	x3, x23
+	mov	x2, x22
+	mov	w0, w25
+	ldrb	w4, [x20, 9]
+	ldp	x21, x22, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	b	flash_ddr_tuning_read
+.L2383:
+	cbz	w24, .L2389
+	b	.L2390
+.L2382:
+	cbnz	w24, .L2376
+	b	.L2389
+	.size	flash_complete_page_read, .-flash_complete_page_read
+	.section	.text.queue_wait_first_req_completed,"ax",@progbits
+	.align	2
+	.type	queue_wait_first_req_completed, %function
+queue_wait_first_req_completed:
+	stp	x29, x30, [sp, -96]!
+	adrp	x0, .LANCHOR60
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	ldrb	w0, [x0, #:lo12:.LANCHOR60]
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	cmp	w0, 255
+	stp	x25, x26, [sp, 64]
+	str	x27, [sp, 80]
+	bne	.L2409
+.L2442:
+	mov	w21, 0
+	b	.L2408
+.L2409:
+	adrp	x19, .LANCHOR56
+	sxtw	x20, w0
+	add	x1, x19, :lo12:.LANCHOR56
+	add	x1, x1, x20, lsl 6
+	ldrb	w2, [x1, 58]
+	ldr	w21, [x1, 40]
+	sub	w3, w2, #1
+	cmp	w3, 10
+	bhi	.L2442
+	adrp	x1, .L2412
+	add	x1, x1, :lo12:.L2412
+	ldrh	w1, [x1,w3,uxtw #1]
+	adr	x3, .Lrtx2412
+	add	x1, x3, w1, sxth #2
+	br	x1
+.Lrtx2412:
+	.section	.rodata.queue_wait_first_req_completed,"a",@progbits
+	.align	0
+	.align	2
+.L2412:
+	.2byte	(.L2411 - .Lrtx2412) / 4
+	.2byte	(.L2413 - .Lrtx2412) / 4
+	.2byte	(.L2414 - .Lrtx2412) / 4
+	.2byte	(.L2414 - .Lrtx2412) / 4
+	.2byte	(.L2414 - .Lrtx2412) / 4
+	.2byte	(.L2414 - .Lrtx2412) / 4
+	.2byte	(.L2415 - .Lrtx2412) / 4
+	.2byte	(.L2416 - .Lrtx2412) / 4
+	.2byte	(.L2417 - .Lrtx2412) / 4
+	.2byte	(.L2414 - .Lrtx2412) / 4
+	.2byte	(.L2417 - .Lrtx2412) / 4
+	.section	.text.queue_wait_first_req_completed
+.L2411:
+	mov	w1, 64
+	mov	w0, w21
+	bl	flash_wait_device_ready
+	tbz	x0, 6, .L2442
+	add	x0, x19, :lo12:.LANCHOR56
+	add	x0, x0, x20, lsl 6
+	ldp	x1, x2, [x0, 8]
+	cbz	x2, .L2419
+	ldrb	w3, [x0, 56]
+	adrp	x0, .LANCHOR131
+	ldrb	w0, [x0, #:lo12:.LANCHOR131]
+	cmp	w3, w0
+	csel	x1, x1, x2, ne
+.L2419:
+	add	x19, x19, :lo12:.LANCHOR56
+	mov	w0, w21
+	add	x20, x19, x20, lsl 6
+	ldr	x2, [x20, 24]
+	bl	flash_complete_page_read
+	str	w0, [x20, 52]
+	mov	w0, 13
+	strb	w0, [x20, 58]
+	ldrb	w0, [x20, 2]
+	orr	w0, w0, 8
+	strb	w0, [x20, 2]
+	b	.L2442
+.L2413:
+	mov	w1, 64
+	mov	w0, w21
+	bl	flash_wait_device_ready
+	tbz	x0, 6, .L2442
+	add	x0, x19, :lo12:.LANCHOR56
+	lsl	x2, x20, 6
+	add	x1, x0, x2
+	ldrb	w21, [x0, x2]
+	add	x0, x0, x21, lsl 6
+	ldr	x24, [x0, 8]
+	ldp	x26, x0, [x1, 8]
+	cbz	x0, .L2420
+	ldrb	w2, [x1, 56]
+	adrp	x1, .LANCHOR131
+	ldrb	w1, [x1, #:lo12:.LANCHOR131]
+	cmp	w2, w1
+	csel	x26, x26, x0, ne
+.L2420:
+	add	x0, x19, :lo12:.LANCHOR56
+	add	x0, x0, x21, lsl 6
+	ldr	x1, [x0, 16]
+	cbz	x1, .L2421
+	ldrb	w2, [x0, 56]
+	adrp	x0, .LANCHOR131
+	ldrb	w0, [x0, #:lo12:.LANCHOR131]
+	cmp	w2, w0
+	csel	x24, x24, x1, ne
+.L2421:
+	add	x22, x19, :lo12:.LANCHOR56
+	mov	x1, x26
+	add	x27, x22, x20, lsl 6
+	add	x22, x22, x21, lsl 6
+	ldr	x2, [x27, 24]
+	ldr	w0, [x27, 40]
+	bl	flash_complete_plane_page_read
+	mov	w23, w0
+	ldr	x2, [x22, 24]
+	mov	x1, x24
+	ldr	w0, [x22, 40]
+	bl	flash_complete_plane_page_read
+	mov	w25, w0
+	cmn	w23, #1
+	beq	.L2422
+	ldr	w0, [x27, 36]
+	cmn	w0, #1
+	beq	.L2423
+	ldr	x1, [x27, 24]
+	ldr	w1, [x1, 4]
+	cmp	w0, w1
+	beq	.L2423
+.L2422:
+	adrp	x0, .LANCHOR32
+	add	x22, x19, :lo12:.LANCHOR56
+	add	x22, x22, x20, lsl 6
+	mov	w5, 1
+	ldrb	w2, [x0, #:lo12:.LANCHOR32]
+	mov	w0, 24
+	sub	w0, w0, w2
+	ldr	x3, [x22, 24]
+	lsl	w5, w5, w2
+	adrp	x2, .LANCHOR131
+	sub	w5, w5, #1
+	ldr	w1, [x22, 40]
+	ldrb	w4, [x2, #:lo12:.LANCHOR131]
+	mov	x2, x26
+	lsl	w6, w5, w0
+	lsr	w0, w1, w0
+	bic	w1, w1, w6
+	and	w0, w0, w5
+	bl	flash_read_page_en
+	mov	w23, w0
+	ldr	w2, [x22, 36]
+	cmn	w2, #1
+	beq	.L2424
+	ldr	x0, [x22, 24]
+	ldr	w4, [x0, 4]
+	cmp	w2, w4
+	beq	.L2424
+	adrp	x1, .LANCHOR14
+	ldr	w1, [x1, #:lo12:.LANCHOR14]
+	tbz	x1, 6, .L2424
+	ldr	w3, [x0]
+	adrp	x0, .LC140
+	ldr	w1, [x22, 40]
+	add	x0, x0, :lo12:.LC140
+	bl	printf
+.L2424:
+	add	x0, x19, :lo12:.LANCHOR56
+	add	x0, x0, x20, lsl 6
+	ldr	w1, [x0, 36]
+	cmn	w1, #1
+	beq	.L2423
+	ldr	x0, [x0, 24]
+	ldr	w0, [x0, 4]
+	cmp	w1, w0
+	beq	.L2423
+	adrp	x1, .LANCHOR183
+	adrp	x0, .LC0
+	mov	w2, 430
+	add	x1, x1, :lo12:.LANCHOR183
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2423:
+	add	x0, x19, :lo12:.LANCHOR56
+	mov	w1, 13
+	add	x20, x0, x20, lsl 6
+	cmn	w25, #1
+	strb	w1, [x20, 58]
+	ldrb	w1, [x20, 2]
+	str	w23, [x20, 52]
+	orr	w1, w1, 8
+	strb	w1, [x20, 2]
+	beq	.L2425
+	add	x0, x0, x21, lsl 6
+	ldr	w1, [x0, 36]
+	cmn	w1, #1
+	beq	.L2427
+	ldr	x0, [x0, 24]
+	ldr	w0, [x0, 4]
+	cmp	w1, w0
+	beq	.L2427
+.L2425:
+	adrp	x0, .LANCHOR32
+	add	x20, x19, :lo12:.LANCHOR56
+	add	x20, x20, x21, lsl 6
+	mov	w5, 1
+	ldrb	w2, [x0, #:lo12:.LANCHOR32]
+	mov	w0, 24
+	sub	w0, w0, w2
+	ldr	x3, [x20, 24]
+	lsl	w5, w5, w2
+	adrp	x2, .LANCHOR131
+	sub	w5, w5, #1
+	ldr	w1, [x20, 40]
+	ldrb	w4, [x2, #:lo12:.LANCHOR131]
+	mov	x2, x24
+	lsl	w6, w5, w0
+	lsr	w0, w1, w0
+	bic	w1, w1, w6
+	and	w0, w0, w5
+	bl	flash_read_page_en
+	ldr	w2, [x20, 36]
+	cmn	w2, #1
+	beq	.L2429
+	ldr	x0, [x20, 24]
+	ldr	w4, [x0, 4]
+	cmp	w2, w4
+	beq	.L2429
+	adrp	x1, .LANCHOR14
+	ldr	w1, [x1, #:lo12:.LANCHOR14]
+	tbz	x1, 6, .L2429
+	ldr	w3, [x0]
+	adrp	x0, .LC140
+	ldr	w1, [x20, 40]
+	add	x0, x0, :lo12:.LC140
+	bl	printf
+.L2429:
+	add	x0, x19, :lo12:.LANCHOR56
+	add	x0, x0, x21, lsl 6
+	ldr	w1, [x0, 36]
+	cmn	w1, #1
+	beq	.L2427
+	ldr	x0, [x0, 24]
+	ldr	w0, [x0, 4]
+	cmp	w1, w0
+	beq	.L2427
+	adrp	x1, .LANCHOR183
+	adrp	x0, .LC0
+	mov	w2, 449
+	add	x1, x1, :lo12:.LANCHOR183
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2427:
+	add	x19, x19, :lo12:.LANCHOR56
+	mov	w0, 13
+	add	x21, x19, x21, lsl 6
+	strb	w0, [x21, 58]
+	ldrb	w0, [x21, 2]
+	str	w23, [x21, 52]
+	orr	w0, w0, 8
+	strb	w0, [x21, 2]
+	b	.L2442
+.L2414:
+	mov	w0, w21
+	mov	w1, 64
+	bl	flash_wait_device_ready
+	mov	w21, w0
+	tbz	x21, 6, .L2442
+	mov	w0, 5
+	tst	w21, w0
+	beq	.L2430
+	add	x19, x19, :lo12:.LANCHOR56
+	mov	w0, 12
+	add	x20, x19, x20, lsl 6
+	mov	w4, 12
+	mov	w2, w21
+	ldrb	w1, [x20, 1]
+	ldr	w3, [x20, 40]
+	strb	w0, [x20, 58]
+	adrp	x0, .LC141
+	add	x0, x0, :lo12:.LC141
+	bl	printf
+.L2506:
+	mov	w0, -1
+	str	w0, [x20, 52]
+	b	.L2408
+.L2430:
+	add	x21, x19, :lo12:.LANCHOR56
+	mov	w0, 13
+	add	x21, x21, x20, lsl 6
+	strb	w0, [x21, 58]
+	adrp	x0, .LANCHOR110
+	ldr	x0, [x0, #:lo12:.LANCHOR110]
+	ldr	w1, [x0, 156]
+	mov	w0, 20041
+	str	wzr, [x21, 52]
+	movk	w0, 0x444b, lsl 16
+	cmp	w1, w0
+	bne	.L2442
+	ldrh	w0, [x21, 50]
+	cbnz	w0, .L2442
+	adrp	x0, .LANCHOR32
+	mov	w5, 1
+	adrp	x22, .LANCHOR175
+	ldr	w1, [x21, 40]
+	ldrb	w2, [x0, #:lo12:.LANCHOR32]
+	mov	w0, 24
+	ldr	x3, [x22, #:lo12:.LANCHOR175]
+	sub	w0, w0, w2
+	lsl	w5, w5, w2
+	adrp	x2, .LANCHOR131
+	sub	w5, w5, #1
+	ldrb	w4, [x2, #:lo12:.LANCHOR131]
+	adrp	x2, .LANCHOR176
+	lsl	w6, w5, w0
+	ldr	x2, [x2, #:lo12:.LANCHOR176]
+	lsr	w0, w1, w0
+	bic	w1, w1, w6
+	and	w0, w0, w5
+	bl	flash_read_page_en
+	cmn	w0, #1
+	beq	.L2431
+	ldr	x1, [x22, #:lo12:.LANCHOR175]
+	ldr	x2, [x21, 24]
+	ldr	w1, [x1]
+	ldr	w2, [x2]
+	cmp	w2, w1
+	beq	.L2442
+.L2431:
+	add	x19, x19, :lo12:.LANCHOR56
+	adrp	x1, .LANCHOR52
+	add	x20, x19, x20, lsl 6
+	mov	w3, w0
+	ldrb	w4, [x1, #:lo12:.LANCHOR52]
+	adrp	x0, .LC142
+	add	x0, x0, :lo12:.LC142
+	ldrb	w1, [x20, 1]
+	ldr	w2, [x20, 40]
+	bl	printf
+	mov	w0, -1
+	str	w0, [x20, 52]
+	b	.L2442
+.L2417:
+	cmp	w2, 11
+	mov	w1, 3
+	mov	w5, 10
+	csel	w5, w5, w1, eq
+	adrp	x1, .LANCHOR32
+	mov	w4, 24
+	mov	w2, 1
+	add	x22, x19, :lo12:.LANCHOR56
+	ldrb	w3, [x1, #:lo12:.LANCHOR32]
+	ubfiz	x0, x0, 6, 8
+	add	x0, x22, x0
+	mov	x24, x1
+	sub	w4, w4, w3
+	lsl	w2, w2, w3
+	sub	w2, w2, #1
+	lsr	w3, w21, w4
+	and	w3, w3, w2
+	and	w3, w3, 65535
+.L2433:
+	ldrb	w1, [x0]
+	cmp	w1, 255
+	bne	.L2440
+	mov	w21, -1
+	b	.L2408
+.L2440:
+	sxtw	x23, w1
+	ubfiz	x0, x1, 6, 8
+	add	x1, x22, x23, lsl 6
+	add	x0, x22, x0
+	ldrb	w6, [x1, 58]
+	cmp	w6, w5
+	bne	.L2433
+	ldr	w1, [x1, 40]
+	lsr	w1, w1, w4
+	and	w1, w1, w2
+	cmp	w3, w1
+	bne	.L2433
+	mov	w0, w21
+	mov	w1, 64
+	bl	flash_wait_device_ready
+	mov	w21, w0
+	tbnz	x21, 6, .L2435
+.L2505:
+	mov	w21, 0
+	b	.L2436
+.L2435:
+	tst	x21, 15
+	beq	.L2437
+	add	x22, x22, x20, lsl 6
+	mov	w2, w0
+	mov	w4, 12
+	adrp	x0, .LC143
+	add	x0, x0, :lo12:.LC143
+	ldrb	w1, [x22, 1]
+	ldr	w3, [x22, 40]
+	bl	printf
+	mov	w0, 12
+	strb	w0, [x22, 58]
+	mov	w0, -1
+	str	w0, [x22, 52]
+.L2436:
+	add	x1, x19, :lo12:.LANCHOR56
+	add	x20, x1, x20, lsl 6
+	add	x1, x1, x23, lsl 6
+	ldrb	w0, [x20, 58]
+	strb	w0, [x1, 58]
+	ldr	w0, [x20, 52]
+	str	w0, [x1, 52]
+.L2408:
+	mov	w0, w21
+	ldr	x27, [sp, 80]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	ret
+.L2437:
+	add	x21, x22, x20, lsl 6
+	mov	w0, 13
+	strb	w0, [x21, 58]
+	adrp	x0, .LANCHOR110
+	ldr	x0, [x0, #:lo12:.LANCHOR110]
+	ldr	w1, [x0, 156]
+	mov	w0, 20041
+	str	wzr, [x21, 52]
+	movk	w0, 0x444b, lsl 16
+	cmp	w1, w0
+	bne	.L2505
+	ldrh	w0, [x21, 50]
+	cbnz	w0, .L2505
+	ldrb	w2, [x24, #:lo12:.LANCHOR32]
+	mov	w5, 1
+	mov	w0, 24
+	adrp	x22, .LANCHOR175
+	sub	w0, w0, w2
+	ldr	w1, [x21, 40]
+	lsl	w5, w5, w2
+	adrp	x2, .LANCHOR131
+	sub	w5, w5, #1
+	ldr	x3, [x22, #:lo12:.LANCHOR175]
+	ldrb	w4, [x2, #:lo12:.LANCHOR131]
+	adrp	x2, .LANCHOR176
+	lsl	w6, w5, w0
+	ldr	x2, [x2, #:lo12:.LANCHOR176]
+	lsr	w0, w1, w0
+	bic	w1, w1, w6
+	and	w0, w0, w5
+	bl	flash_read_page_en
+	cmn	w0, #1
+	beq	.L2439
+	ldr	x1, [x22, #:lo12:.LANCHOR175]
+	ldr	x2, [x21, 24]
+	ldr	w1, [x1]
+	ldr	w2, [x2]
+	cmp	w2, w1
+	beq	.L2505
+.L2439:
+	add	x21, x19, :lo12:.LANCHOR56
+	adrp	x1, .LANCHOR52
+	add	x21, x21, x20, lsl 6
+	mov	w3, w0
+	ldrb	w4, [x1, #:lo12:.LANCHOR52]
+	adrp	x0, .LC144
+	add	x0, x0, :lo12:.LC144
+	ldrb	w1, [x21, 1]
+	ldr	w2, [x21, 40]
+	bl	printf
+	mov	w0, -1
+	str	w0, [x21, 52]
+	b	.L2505
+.L2415:
+	mov	w0, w21
+	mov	w1, 32
+	bl	flash_wait_device_ready
+	mov	w21, w0
+	tbz	x21, 5, .L2442
+	add	x19, x19, :lo12:.LANCHOR56
+	tst	x21, 15
+	add	x20, x19, x20, lsl 6
+	beq	.L2441
+	mov	w0, 12
+	strb	w0, [x20, 58]
+	b	.L2506
+.L2441:
+	mov	w0, 13
+	str	wzr, [x20, 52]
+	strb	w0, [x20, 58]
+	b	.L2442
+.L2416:
+	mov	w1, 64
+	mov	w0, w21
+	bl	flash_wait_device_ready
+	tbz	x0, 6, .L2442
+	add	x19, x19, :lo12:.LANCHOR56
+	add	x19, x19, x20, lsl 6
+	str	w0, [x19, 52]
+	mov	w0, 7
+	strb	w0, [x19, 58]
+	b	.L2442
+	.size	queue_wait_first_req_completed, .-queue_wait_first_req_completed
+	.section	.text.sblk_prog_page,"ax",@progbits
+	.align	2
+	.global	sblk_prog_page
+	.type	sblk_prog_page, %function
+sblk_prog_page:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	ldrh	w0, [x0, 50]
+	and	w20, w1, 255
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	cbz	w0, .L2508
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L2508
+	ldr	w1, [x19, 40]
+	adrp	x0, .LC145
+	mov	w2, w20
+	add	x0, x0, :lo12:.LC145
+	bl	printf
+.L2508:
+	adrp	x23, .LANCHOR45
+	adrp	x25, .LANCHOR32
+	add	x23, x23, :lo12:.LANCHOR45
+	add	x26, x25, :lo12:.LANCHOR32
+	mov	w21, 0
+.L2509:
+	cbnz	w20, .L2520
+.L2536:
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	ret
+.L2520:
+	ldrb	w24, [x19]
+	ldr	w22, [x19, 40]
+.L2510:
+	mov	w1, 1
+	mov	w0, w22
+	bl	queue_lun_state
+	cbnz	w0, .L2511
+	cmp	w20, 1
+	beq	.L2512
+	ldrb	w0, [x23]
+	cbz	w0, .L2512
+	adrp	x0, .LANCHOR37
+	ldrb	w0, [x0, #:lo12:.LANCHOR37]
+	cbz	w0, .L2513
+.L2512:
+	mov	x0, x19
+	bl	queue_prog_cmd
+.L2514:
+	subs	w20, w20, #1
+	beq	.L2536
+	ubfiz	x24, x24, 6, 8
+	adrp	x19, .LANCHOR56
+	add	x19, x19, :lo12:.LANCHOR56
+	add	x19, x19, x24
+	b	.L2509
+.L2511:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L2510
+.L2513:
+	ldrb	w1, [x25, #:lo12:.LANCHOR32]
+	mov	w27, 24
+	mov	w0, 1
+	sub	w27, w27, w1
+	lsl	w0, w0, w1
+	sub	w0, w0, #1
+	lsr	w27, w22, w27
+	and	w27, w27, w0
+	ldrb	w0, [x19]
+	and	w27, w27, 65535
+	cmp	w0, 255
+	bne	.L2515
+	adrp	x1, .LANCHOR184
+	adrp	x0, .LC0
+	mov	w2, 696
+	add	x1, x1, :lo12:.LANCHOR184
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2515:
+	ldrb	w0, [x19]
+	adrp	x1, .LANCHOR56
+	add	x1, x1, :lo12:.LANCHOR56
+	mov	w3, 24
+	mov	w28, 1
+	add	x0, x1, x0, lsl 6
+	ldr	w4, [x0, 40]
+	ldrb	w0, [x26]
+	sub	w3, w3, w0
+	lsl	w0, w28, w0
+	sub	w0, w0, #1
+	lsr	w1, w4, w3
+	and	w0, w0, w1
+	cmp	w27, w0, uxth
+	bne	.L2516
+	adrp	x0, .LANCHOR75
+	ldrh	w2, [x0, #:lo12:.LANCHOR75]
+	adrp	x0, .LANCHOR76
+	ldrb	w1, [x0, #:lo12:.LANCHOR76]
+	sub	w0, w3, w2
+	lsr	w5, w22, w2
+	sub	w3, w1, #1
+	lsl	w0, w28, w0
+	sub	w0, w0, #1
+	lsl	w1, w28, w2
+	and	w0, w0, w3
+	sub	w1, w1, #1
+	and	w0, w0, 65535
+	and	w1, w1, 65535
+	and	w5, w0, w5
+	lsr	w2, w4, w2
+	and	w0, w0, w2
+	and	w22, w1, w22
+	cmp	w5, w0
+	and	w1, w1, w4
+	ccmp	w22, w1, 0, ne
+	bne	.L2516
+	cmp	w21, w3
+	beq	.L2516
+	ldr	w1, [x19, 40]
+	mov	w0, 17
+	ldr	x2, [x19, 8]
+	add	w21, w21, w28
+	ldr	x3, [x19, 24]
+	bl	flash_start_page_prog
+	strb	w28, [x19, 59]
+	mov	w0, 9
+	strb	w0, [x19, 58]
+	mov	w0, -1
+	strb	w0, [x19]
+	mov	x1, x19
+	adrp	x0, .LANCHOR60
+	add	x0, x0, :lo12:.LANCHOR60
+	bl	buf_add_tail
+	b	.L2514
+.L2516:
+	mov	x0, x19
+	mov	w21, 0
+	bl	queue_prog_cmd
+	b	.L2514
+	.size	sblk_prog_page, .-sblk_prog_page
+	.section	.text.sblk_wait_write_queue_completed,"ax",@progbits
+	.align	2
+	.global	sblk_wait_write_queue_completed
+	.type	sblk_wait_write_queue_completed, %function
+sblk_wait_write_queue_completed:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	adrp	x19, .LANCHOR60
+	add	x19, x19, :lo12:.LANCHOR60
+.L2539:
+	ldrb	w0, [x19]
+	cmp	w0, 255
+	bne	.L2540
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L2540:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L2539
+	.size	sblk_wait_write_queue_completed, .-sblk_wait_write_queue_completed
+	.section	.text.ftl_flush,"ax",@progbits
+	.align	2
+	.global	ftl_flush
+	.type	ftl_flush, %function
+ftl_flush:
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR129
+	add	x29, sp, 0
+	ldrb	w1, [x0, #:lo12:.LANCHOR129]
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	adrp	x20, .LANCHOR185
+	cbz	w1, .L2543
+	ldrb	w2, [x20, #:lo12:.LANCHOR185]
+	adrp	x0, .LANCHOR56
+	add	x0, x0, :lo12:.LANCHOR56
+	add	x0, x0, x2, lsl 6
+	bl	sblk_prog_page
+.L2543:
+	mov	w0, -1
+	strb	wzr, [x19, #:lo12:.LANCHOR129]
+	strb	w0, [x20, #:lo12:.LANCHOR185]
+	bl	sblk_wait_write_queue_completed
+	bl	ftl_write_completed
+	ldp	x19, x20, [sp, 16]
+	mov	w0, -1
+	ldp	x29, x30, [sp], 32
+	b	ftl_vpn_decrement
+	.size	ftl_flush, .-ftl_flush
+	.section	.text.ftl_read_page,"ax",@progbits
+	.align	2
+	.global	ftl_read_page
+	.type	ftl_read_page, %function
+ftl_read_page:
+	stp	x29, x30, [sp, -64]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w19, w0, 255
+	stp	x21, x22, [sp, 32]
+	mov	w20, w1
+	mov	x21, x2
+	mov	x22, x3
+	str	x23, [sp, 48]
+	mov	w23, w4
+	bl	sblk_wait_write_queue_completed
+	mov	w4, w23
+	mov	x3, x22
+	mov	x2, x21
+	mov	w1, w20
+	mov	w0, w19
+	ldr	x23, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	b	flash_read_page_en
+	.size	ftl_read_page, .-ftl_read_page
+	.section	.text.ftl_read_ppa_page,"ax",@progbits
+	.align	2
+	.global	ftl_read_ppa_page
+	.type	ftl_read_ppa_page, %function
+ftl_read_ppa_page:
+	stp	x29, x30, [sp, -64]!
+	mov	w5, 1
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w20, w0
+	adrp	x0, .LANCHOR32
+	mov	w19, 24
+	stp	x21, x22, [sp, 32]
+	mov	x21, x1
+	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	mov	x22, x2
+	str	x23, [sp, 48]
+	mov	w23, w3
+	sub	w19, w19, w0
+	lsl	w5, w5, w0
+	sub	w5, w5, #1
+	lsr	w19, w20, w19
+	and	w19, w19, w5
+	and	w19, w19, 255
+	bl	sblk_wait_write_queue_completed
+	mov	w4, w23
+	mov	x3, x22
+	mov	x2, x21
+	mov	w1, w20
+	mov	w0, w19
+	ldr	x23, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	b	flash_read_page_en
+	.size	ftl_read_ppa_page, .-ftl_read_ppa_page
+	.section	.text.sblk_read_page,"ax",@progbits
+	.align	2
+	.global	sblk_read_page
+	.type	sblk_read_page, %function
+sblk_read_page:
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	and	w22, w1, 255
+	stp	x27, x28, [sp, 80]
+	mov	w21, w22
+	stp	x19, x20, [sp, 16]
+	adrp	x27, .LANCHOR32
+	stp	x23, x24, [sp, 48]
+	mov	x19, x0
+	stp	x25, x26, [sp, 64]
+	mov	x23, x0
+	adrp	x25, .LANCHOR186
+	add	x28, x27, :lo12:.LANCHOR32
+	add	x25, x25, :lo12:.LANCHOR186
+.L2553:
+	cbnz	w21, .L2563
+.L2576:
+	adrp	x19, .LANCHOR56
+	add	x19, x19, :lo12:.LANCHOR56
+.L2564:
+	cbnz	w22, .L2566
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+.L2563:
+	ldrb	w24, [x19]
+	ldr	w26, [x19, 40]
+.L2554:
+	mov	w1, 0
+	mov	w0, w26
+	bl	queue_lun_state
+	cbnz	w0, .L2555
+	cmp	w21, 1
+	beq	.L2560
+	ldrb	w0, [x25]
+	cbnz	w0, .L2557
+.L2560:
+	mov	x0, x19
+	bl	queue_read_cmd
+	b	.L2558
+.L2555:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L2554
+.L2557:
+	ldrb	w1, [x27, #:lo12:.LANCHOR32]
+	mov	w20, 24
+	mov	w0, 1
+	sub	w20, w20, w1
+	lsl	w0, w0, w1
+	sub	w0, w0, #1
+	lsr	w20, w26, w20
+	and	w20, w20, w0
+	ldrb	w0, [x19]
+	and	w20, w20, 65535
+	cmp	w0, 255
+	bne	.L2559
+	adrp	x1, .LANCHOR187
+	adrp	x0, .LC0
+	mov	w2, 781
+	add	x1, x1, :lo12:.LANCHOR187
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2559:
+	ldrb	w4, [x19]
+	adrp	x2, .LANCHOR56
+	add	x2, x2, :lo12:.LANCHOR56
+	ldrb	w7, [x28]
+	mov	w0, 24
+	mov	w3, 1
+	sbfiz	x5, x4, 6, 32
+	sub	w0, w0, w7
+	add	x6, x2, x5
+	lsl	w3, w3, w7
+	sub	w3, w3, #1
+	ldr	w1, [x6, 40]
+	lsr	w0, w1, w0
+	and	w0, w0, w3
+	cmp	w20, w0, uxth
+	bne	.L2560
+	adrp	x0, .LANCHOR111
+	ldrh	w0, [x0, #:lo12:.LANCHOR111]
+	add	w26, w0, w26
+	cmp	w1, w26
+	bne	.L2560
+	ldr	w0, [x19, 40]
+	mov	w26, -1
+	ldrb	w24, [x2, x5]
+	adrp	x20, .LANCHOR60
+	stp	x6, x5, [x29, 96]
+	add	x20, x20, :lo12:.LANCHOR60
+	str	x2, [x29, 112]
+	sub	w21, w21, #1
+	str	w4, [x29, 120]
+	bl	flash_start_plane_read
+	mov	w3, 2
+	strb	wzr, [x19, 59]
+	strb	w3, [x19, 58]
+	mov	x1, x19
+	strb	w26, [x19]
+	mov	x0, x20
+	str	w3, [x29, 124]
+	bl	buf_add_tail
+	ldp	x6, x5, [x29, 96]
+	strb	wzr, [x6, 59]
+	ldr	x2, [x29, 112]
+	mov	x0, x20
+	ldp	w4, w3, [x29, 120]
+	strb	w3, [x6, 58]
+	strb	w26, [x2, x5]
+	ubfiz	x1, x4, 6, 8
+	add	x1, x2, x1
+	bl	buf_add_tail
+.L2558:
+	subs	w21, w21, #1
+	beq	.L2576
+	ubfiz	x24, x24, 6, 8
+	adrp	x19, .LANCHOR56
+	add	x19, x19, :lo12:.LANCHOR56
+	add	x19, x19, x24
+	b	.L2553
+.L2566:
+	ldrb	w0, [x23, 58]
+	cmp	w0, 13
+	bne	.L2565
+	ldrb	w0, [x23]
+	sub	w22, w22, #1
+	cmp	w0, 255
+	beq	.L2565
+	ubfiz	x23, x0, 6, 8
+	add	x23, x19, x23
+.L2565:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L2564
+	.size	sblk_read_page, .-sblk_read_page
+	.section	.text.gc_check_data_one_wl,"ax",@progbits
+	.align	2
+	.global	gc_check_data_one_wl
+	.type	gc_check_data_one_wl, %function
+gc_check_data_one_wl:
+	sub	sp, sp, #112
+	stp	x29, x30, [sp, 16]
+	add	x29, sp, 16
+	stp	x19, x20, [sp, 32]
+	adrp	x19, .LANCHOR71
+	stp	x21, x22, [sp, 48]
+	add	x22, x19, :lo12:.LANCHOR71
+	adrp	x20, .LANCHOR10
+	stp	x23, x24, [sp, 64]
+	stp	x25, x26, [sp, 80]
+	ldr	x0, [x22, 8]
+	stp	x27, x28, [sp, 96]
+	ldr	x21, [x20, #:lo12:.LANCHOR10]
+	cbnz	x0, .L2579
+	mov	w0, 1
+	bl	buf_alloc
+	str	x0, [x22, 8]
+.L2579:
+	add	x0, x19, :lo12:.LANCHOR71
+	ldr	x22, [x0, 8]
+	cbnz	x22, .L2580
+	adrp	x1, .LANCHOR188
+	adrp	x0, .LC0
+	mov	w2, 729
+	add	x1, x1, :lo12:.LANCHOR188
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2580:
+	adrp	x27, .LANCHOR111
+	adrp	x28, .LANCHOR79
+	add	x26, x21, 96
+	add	x27, x27, :lo12:.LANCHOR111
+	add	x28, x28, :lo12:.LANCHOR79
+	mov	w25, 0
+.L2581:
+	ldrb	w0, [x21, 89]
+	cmp	w25, w0
+	bge	.L2592
+	mov	w24, 1
+	add	x23, x19, :lo12:.LANCHOR71
+	b	.L2593
+.L2591:
+	ldrh	w0, [x26]
+	ldrh	w2, [x27]
+	ldrb	w1, [x28]
+	cmp	w1, 2
+	mul	w2, w0, w2
+	beq	.L2582
+	adrp	x0, .LANCHOR36
+	ldrb	w0, [x0, #:lo12:.LANCHOR36]
+	cbz	w0, .L2583
+.L2582:
+	ldrh	w0, [x23, 16]
+	sub	w3, w0, #1
+	add	w0, w24, w2
+	add	w0, w3, w0
+	orr	w1, w0, w1, lsl 24
+	str	w1, [x22, 40]
+.L2584:
+	mov	w1, 1
+	mov	x0, x22
+	bl	sblk_read_page
+	ldr	w2, [x22, 52]
+	adrp	x1, .LANCHOR162
+	cmn	w2, #1
+	beq	.L2587
+	ldrh	w0, [x23, 22]
+	ldr	x4, [x1, #:lo12:.LANCHOR162]
+	ldr	x3, [x22, 24]
+	lsl	x0, x0, 2
+	ldr	w5, [x4, x0]
+	ldr	w4, [x3, 4]
+	cmp	w5, w4
+	bne	.L2587
+	adrp	x4, .LANCHOR163
+	ldr	x4, [x4, #:lo12:.LANCHOR163]
+	ldr	w4, [x4, x0]
+	ldr	w0, [x3, 8]
+	cmp	w4, w0
+	beq	.L2588
+.L2587:
+	ldrh	w0, [x23, 22]
+	ldr	x1, [x1, #:lo12:.LANCHOR162]
+	lsl	x0, x0, 2
+	ldr	w3, [x1, x0]
+	cmn	w3, #1
+	beq	.L2588
+	adrp	x1, .LANCHOR14
+	ldr	w1, [x1, #:lo12:.LANCHOR14]
+	tbz	x1, 10, .L2589
+	ldr	x1, [x22, 24]
+	adrp	x4, .LANCHOR163
+	ldr	x4, [x4, #:lo12:.LANCHOR163]
+	ldr	w5, [x1, 12]
+	str	w5, [sp]
+	ldr	w4, [x4, x0]
+	adrp	x0, .LC146
+	ldp	w5, w6, [x1]
+	add	x0, x0, :lo12:.LC146
+	ldr	w7, [x1, 8]
+	ldr	w1, [x22, 40]
+	bl	printf
+.L2589:
+	adrp	x0, .LANCHOR124
+	ldrh	w1, [x21, 80]
+	ldrb	w2, [x0, #:lo12:.LANCHOR124]
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	strh	wzr, [x0, x1, lsl 1]
+	ldr	x1, [x20, #:lo12:.LANCHOR10]
+	ldr	w0, [x1, 556]
+	add	w0, w0, 1
+	str	w0, [x1, 556]
+	adrp	x0, .LANCHOR110
+	ldr	x0, [x0, #:lo12:.LANCHOR110]
+	ldr	w1, [x0, 156]
+	mov	w0, 20041
+	movk	w0, 0x444b, lsl 16
+	cmp	w1, w0
+	bne	.L2596
+	cbnz	w2, .L2596
+	adrp	x0, .LANCHOR81
+	ldrb	w0, [x0, #:lo12:.LANCHOR81]
+	cbnz	w0, .L2596
+	ldr	w0, [x22, 40]
+	bl	ftl_mask_bad_block
+.L2596:
+	mov	w0, -1
+.L2578:
+	ldp	x19, x20, [sp, 32]
+	ldp	x21, x22, [sp, 48]
+	ldp	x23, x24, [sp, 64]
+	ldp	x25, x26, [sp, 80]
+	ldp	x27, x28, [sp, 96]
+	ldp	x29, x30, [sp, 16]
+	add	sp, sp, 112
+	ret
+.L2583:
+	cmp	w1, 3
+	ldrh	w0, [x23, 16]
+	bne	.L2585
+	adrp	x1, .LANCHOR37
+	ldrb	w1, [x1, #:lo12:.LANCHOR37]
+	cbz	w1, .L2586
+	add	w0, w0, w0, lsl 1
+	sub	w1, w0, #1
+	add	w0, w24, w2
+	add	w0, w1, w0
+	orr	w0, w0, 50331648
+.L2611:
+	str	w0, [x22, 40]
+	b	.L2584
+.L2586:
+	add	w0, w0, w2
+	orr	w0, w0, w24, lsl 24
+	b	.L2611
+.L2585:
+	add	w0, w0, w2
+	b	.L2611
+.L2588:
+	ldrh	w0, [x23, 22]
+	add	w24, w24, 1
+	add	w0, w0, 1
+	strh	w0, [x23, 22]
+.L2593:
+	ldrh	w0, [x23, 20]
+	cmp	w24, w0
+	ble	.L2591
+	add	w25, w25, 1
+	add	x26, x26, 2
+	b	.L2581
+.L2592:
+	add	x19, x19, :lo12:.LANCHOR71
+	ldrh	w0, [x19, 16]
+	add	w1, w0, 1
+	strh	w1, [x19, 16]
+	adrp	x1, .LANCHOR81
+	ldrb	w1, [x1, #:lo12:.LANCHOR81]
+	cbz	w1, .L2597
+	add	w0, w0, 2
+	strh	w0, [x19, 16]
+.L2597:
+.L2590:
+	mov	w0, 0
+	b	.L2578
+	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
+	.section	.text.sblk_tlc_prog_one_page,"ax",@progbits
+	.align	2
+	.global	sblk_tlc_prog_one_page
+	.type	sblk_tlc_prog_one_page, %function
+sblk_tlc_prog_one_page:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	ldr	x0, [x0]
+	ldr	w20, [x0, 40]
+.L2613:
+	mov	w1, 1
+	mov	w0, w20
+	bl	queue_lun_state
+	cbnz	w0, .L2614
+	mov	x0, x19
+	mov	w1, 1
+	bl	queue_tlc_prog_cmd
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L2614:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L2613
+	.size	sblk_tlc_prog_one_page, .-sblk_tlc_prog_one_page
+	.section	.text.sblk_xlc_prog_pages,"ax",@progbits
+	.align	2
+	.global	sblk_xlc_prog_pages
+	.type	sblk_xlc_prog_pages, %function
+sblk_xlc_prog_pages:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x20, x0
+	ldr	x0, [x0]
+	stp	x21, x22, [sp, 32]
+	mov	x22, x1
+	stp	x23, x24, [sp, 48]
+	mov	w24, w2
+	ldr	w19, [x0, 40]
+	str	x25, [sp, 64]
+.L2617:
+	mov	w1, 1
+	mov	w0, w19
+	bl	queue_lun_state
+	cbnz	w0, .L2618
+	cmp	w24, 2
+	bne	.L2619
+	adrp	x0, .LANCHOR45
+	ldr	x3, [x22]
+	ldrb	w0, [x0, #:lo12:.LANCHOR45]
+	cbz	w0, .L2620
+	adrp	x0, .LANCHOR32
+	ldr	x7, [x20]
+	mov	w25, 1
+	mov	w2, 24
+	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	ldr	w3, [x3, 40]
+	sub	w2, w2, w0
+	ldr	w1, [x7, 40]
+	lsl	w19, w25, w0
+	adrp	x0, .LANCHOR37
+	lsl	w21, w25, w2
+	sub	w19, w19, #1
+	ldrb	w0, [x0, #:lo12:.LANCHOR37]
+	sub	w21, w21, #1
+	and	w23, w1, w21
+	lsr	w1, w1, w2
+	and	w19, w19, w1
+	and	w21, w21, w3
+	and	w19, w19, 255
+	cbz	w0, .L2621
+	mov	w0, w19
+	bl	zftl_flash_exit_slc_mode
+	ldr	x0, [x20]
+	mov	w4, w23
+	mov	w3, w19
+	mov	w1, w25
+	mov	w2, 17
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	mov	w0, 0
+	bl	flash_start_one_pass_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x0, [x22]
+	mov	w4, w21
+	mov	w3, w19
+	mov	w1, w25
+	mov	w2, 26
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	mov	w0, 0
+	bl	flash_start_one_pass_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x0, [x20, 8]
+	add	w4, w23, w25
+	mov	w3, w19
+	mov	w1, w24
+	mov	w2, 17
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	mov	w0, 0
+	bl	flash_start_one_pass_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x0, [x22, 8]
+	add	w4, w21, w25
+	mov	w3, w19
+	mov	w1, w24
+	mov	w2, 26
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	mov	w0, 0
+	bl	flash_start_one_pass_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x0, [x20, 16]
+	add	w4, w23, 2
+	mov	w3, w19
+	mov	w2, 17
+	mov	w1, 3
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	mov	w0, 0
+	bl	flash_start_one_pass_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x0, [x22, 16]
+	add	w4, w21, 2
+	mov	w3, w19
+	mov	w2, 16
+	mov	w1, 3
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	mov	w0, 0
+	bl	flash_start_one_pass_page_prog
+.L2622:
+	ldr	x1, [x20]
+	mov	w0, 5
+	strb	w0, [x1, 58]
+	mov	w0, 1
+	strb	w0, [x1, 59]
+	mov	w0, -1
+	strb	w0, [x1]
+	adrp	x0, .LANCHOR60
+	add	x0, x0, :lo12:.LANCHOR60
+	bl	buf_add_tail
+.L2623:
+	mov	w0, 0
+	ldr	x25, [sp, 64]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	ret
+.L2618:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L2617
+.L2621:
+	ldr	x5, [x7, 8]
+	mov	w4, w23
+	ldr	x6, [x7, 24]
+	mov	w3, w19
+	ldrb	w0, [x7, 60]
+	mov	w1, w25
+	mov	w2, 17
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x7, [x20]
+	mov	w4, w21
+	ldr	x0, [x22]
+	mov	w3, w19
+	mov	w1, w25
+	mov	w2, 26
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldp	x7, x0, [x20]
+	mov	w4, w23
+	mov	w3, w19
+	mov	w1, w24
+	mov	w2, 17
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x7, [x20]
+	mov	w4, w21
+	ldr	x0, [x22, 8]
+	mov	w3, w19
+	mov	w1, w24
+	mov	w2, 26
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x7, [x20]
+	mov	w4, w23
+	ldr	x0, [x20, 16]
+	mov	w3, w19
+	mov	w2, 17
+	mov	w1, 3
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x0, [x22, 16]
+	mov	w4, w21
+	ldr	x7, [x20]
+	mov	w3, w19
+	mov	w2, 16
+	mov	w1, 3
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
+	b	.L2622
+.L2620:
+	ldr	w19, [x3, 40]
+.L2624:
+	mov	w1, 1
+	mov	w0, w19
+	bl	queue_lun_state
+	cbnz	w0, .L2625
+	mov	w1, 1
+	mov	x0, x20
+	bl	queue_tlc_prog_cmd
+	mov	w1, 0
+	mov	x0, x22
+	bl	queue_tlc_prog_cmd
+.L2626:
+	mov	w1, 1
+	mov	w0, w19
+	bl	queue_lun_state
+	cbz	w0, .L2623
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L2626
+.L2625:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L2624
+.L2619:
+	mov	w1, 1
+	mov	x0, x20
+	bl	queue_tlc_prog_cmd
+	b	.L2623
+	.size	sblk_xlc_prog_pages, .-sblk_xlc_prog_pages
+	.section	.text.sblk_3d_mlc_prog_pages,"ax",@progbits
+	.align	2
+	.global	sblk_3d_mlc_prog_pages
+	.type	sblk_3d_mlc_prog_pages, %function
+sblk_3d_mlc_prog_pages:
+	stp	x29, x30, [sp, -80]!
+	ubfiz	x1, x1, 4, 32
+	add	x1, x1, 8
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	add	x21, x0, x1
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR32
+	adrp	x24, .LANCHOR60
+	str	x25, [sp, 64]
+	add	x23, x23, :lo12:.LANCHOR32
+	add	x24, x24, :lo12:.LANCHOR60
+	add	x25, x0, 8
+	stp	x19, x20, [sp, 16]
+	mov	w22, 1
+.L2630:
+	cmp	x21, x25
+	bne	.L2633
+	mov	w0, 0
+	ldr	x25, [sp, 64]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	ret
+.L2633:
+	ldr	x0, [x25, -8]
+	ldr	w19, [x0, 40]
+.L2631:
+	mov	w1, 1
+	mov	w0, w19
+	bl	queue_lun_state
+	cbnz	w0, .L2632
+	ldr	x0, [x25, -8]
+	mov	w2, 24
+	ldrb	w1, [x23]
+	add	x25, x25, 16
+	sub	w2, w2, w1
+	ldr	w0, [x0, 40]
+	lsl	w19, w22, w1
+	lsl	w20, w22, w2
+	sub	w19, w19, #1
+	sub	w20, w20, #1
+	and	w20, w20, w0
+	lsr	w0, w0, w2
+	and	w19, w19, w0
+	and	w19, w19, 255
+	mov	w0, w19
+	bl	zftl_flash_exit_slc_mode
+	ldr	x0, [x25, -24]
+	mov	w2, w20
+	mov	w1, w19
+	ldr	x3, [x0, 8]
+	ldr	x4, [x0, 24]
+	mov	w0, 16
+	bl	flash_start_3d_mlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x0, [x25, -16]
+	add	w2, w20, 1
+	mov	w1, w19
+	ldr	x3, [x0, 8]
+	ldr	x4, [x0, 24]
+	mov	w0, 16
+	bl	flash_start_3d_mlc_page_prog
+	bl	nandc_de_cs.constprop.32
+	ldr	x1, [x25, -24]
+	mov	w0, 4
+	strb	w22, [x1, 59]
+	strb	w0, [x1, 58]
+	mov	w0, -1
+	strb	w0, [x1]
+	mov	x0, x24
+	bl	buf_add_tail
+	b	.L2630
+.L2632:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L2631
+	.size	sblk_3d_mlc_prog_pages, .-sblk_3d_mlc_prog_pages
+	.section	.text.flash_prog_page_en,"ax",@progbits
+	.align	2
+	.global	flash_prog_page_en
+	.type	flash_prog_page_en, %function
+flash_prog_page_en:
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	and	w21, w0, 255
+	and	w0, w5, 255
+	stp	x19, x20, [sp, 16]
+	str	w0, [x29, 124]
+	adrp	x0, .LANCHOR18
+	stp	x23, x24, [sp, 48]
+	mov	w20, w1
+	stp	x27, x28, [sp, 80]
+	mov	x23, x2
+	ldrb	w1, [x0, #:lo12:.LANCHOR18]
+	mov	x22, x3
+	stp	x25, x26, [sp, 64]
+	mov	w28, w4
+	ubfx	x24, x20, 24, 2
+	cmp	w1, w21
+	mov	x19, x0
+	bhi	.L2636
+	adrp	x1, .LANCHOR189
+	adrp	x0, .LC0
+	mov	w2, 635
+	add	x1, x1, :lo12:.LANCHOR189
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2636:
+	ldrb	w0, [x19, #:lo12:.LANCHOR18]
+	cmp	w0, w21
+	bls	.L2647
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
+	ldrb	w27, [x0, w21, sxtw]
+	cbnz	w24, .L2649
+	adrp	x0, .LANCHOR0
+	ldrb	w1, [x0, #:lo12:.LANCHOR0]
+	adrp	x0, .LANCHOR1
+	cbz	w1, .L2639
+	ldrb	w1, [x0, #:lo12:.LANCHOR1]
+	cbz	w1, .L2649
+.L2639:
+	adrp	x1, .LANCHOR2
+	ldrb	w0, [x0, #:lo12:.LANCHOR1]
+	ldrh	w1, [x1, #:lo12:.LANCHOR2]
+	udiv	w19, w20, w1
+	mul	w19, w19, w1
+	sub	w1, w20, w19
+	cbz	w0, .L2640
+	add	w19, w19, w1, lsl 1
+.L2638:
+	adrp	x24, .LANCHOR14
+	adrp	x25, .LC147
+	add	x24, x24, :lo12:.LANCHOR14
+	add	x25, x25, :lo12:.LC147
+	adrp	x26, .LANCHOR175
+.L2644:
+	ldr	w0, [x24]
+	tbz	x0, 4, .L2641
+	mov	w3, w19
+	mov	w2, w20
+	mov	w1, w27
+	mov	x0, x25
+	bl	printf
+.L2641:
+	mov	w4, w28
+	mov	x3, x22
+	mov	x2, x23
+	mov	w1, w19
+	mov	w0, w27
+	bl	flash_prog_page
+	mov	w5, w0
+	ldr	w0, [x29, 124]
+	cbz	w0, .L2642
+	adrp	x6, .LANCHOR176
+	ldr	x3, [x26, #:lo12:.LANCHOR175]
+	mov	w4, w28
+	str	x6, [x29, 112]
+	ldr	x2, [x6, #:lo12:.LANCHOR176]
+	mov	w1, w20
+	mov	w0, w21
+	str	w5, [x29, 104]
+	bl	flash_read_page_en
+	cmp	w0, 512
+	ldr	x6, [x29, 112]
+	mov	w4, w0
+	ccmn	w0, #1, 4, ne
+	mov	x7, x6
+	beq	.L2643
+	ldr	x0, [x6, #:lo12:.LANCHOR176]
+	ldr	w1, [x23]
+	ldr	w5, [x29, 104]
+	ldr	w0, [x0]
+	cmp	w1, w0
+	bne	.L2643
+	ldr	x0, [x26, #:lo12:.LANCHOR175]
+	ldr	w1, [x22]
+	ldr	w0, [x0]
+	cmp	w1, w0
+	beq	.L2642
+.L2643:
+	str	w4, [x29, 112]
+	mov	w3, 4
+	str	x7, [x29, 104]
+	mov	w2, w3
+	mov	x1, x23
+	adrp	x0, .LC148
+	add	x0, x0, :lo12:.LC148
+	bl	rknand_print_hex
+	mov	w3, 4
+	mov	x1, x22
+	mov	w2, w3
+	adrp	x0, .LC149
+	add	x0, x0, :lo12:.LC149
+	bl	rknand_print_hex
+	adrp	x0, .LANCHOR175
+	mov	w3, 4
+	mov	w2, w3
+	ldr	x1, [x0, #:lo12:.LANCHOR175]
+	adrp	x0, .LC150
+	add	x0, x0, :lo12:.LC150
+	bl	rknand_print_hex
+	ldr	x7, [x29, 104]
+	mov	w3, 4
+	adrp	x0, .LC151
+	mov	w2, w3
+	add	x0, x0, :lo12:.LC151
+	ldr	x1, [x7, #:lo12:.LANCHOR176]
+	bl	rknand_print_hex
+	ldr	w4, [x29, 112]
+	cmp	w4, 512
+	beq	.L2644
+.L2646:
+	mov	w1, w20
+	adrp	x0, .LC152
+	add	x0, x0, :lo12:.LC152
+	bl	printf
+	adrp	x1, .LANCHOR189
+	adrp	x0, .LC0
+	mov	w2, 678
+	add	x1, x1, :lo12:.LANCHOR189
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2647:
+	mov	w0, -1
+	b	.L2635
+.L2640:
+	adrp	x0, .LANCHOR3
+	add	x0, x0, :lo12:.LANCHOR3
+	ldrh	w0, [x0, w1, uxtw 1]
+	add	w19, w0, w19
+	b	.L2638
+.L2649:
+	mov	w19, w20
+	b	.L2638
+.L2642:
+	mov	w0, w5
+	cmn	w5, #1
+	beq	.L2646
+.L2635:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+	.size	flash_prog_page_en, .-flash_prog_page_en
+	.section	.text.ftl_test_block,"ax",@progbits
+	.align	2
+	.global	ftl_test_block
+	.type	ftl_test_block, %function
+ftl_test_block:
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x24, .LANCHOR190
+	stp	x21, x22, [sp, 32]
+	and	w21, w0, 65535
+	ldr	x0, [x24, #:lo12:.LANCHOR190]
+	mov	w23, 0
+	stp	x25, x26, [sp, 64]
+	adrp	x25, .LANCHOR191
+	stp	x19, x20, [sp, 16]
+	adrp	x26, .LANCHOR112
+	stp	x27, x28, [sp, 80]
+	mov	w20, 0
+	str	wzr, [x0]
+	add	x0, x26, :lo12:.LANCHOR112
+	adrp	x27, .LANCHOR76
+	str	x0, [x29, 112]
+	str	wzr, [x25, #:lo12:.LANCHOR191]
+	add	x0, x27, :lo12:.LANCHOR76
+	str	x0, [x29, 96]
+.L2666:
+	ldr	x0, [x29, 112]
+	ldrb	w0, [x0]
+	cmp	w0, w20
+	bls	.L2676
+	add	x0, x27, :lo12:.LANCHOR76
+	mov	w22, 0
+	str	x0, [x29, 120]
+	adrp	x0, .LANCHOR14
+	add	x0, x0, :lo12:.LANCHOR14
+	str	x0, [x29, 104]
+	b	.L2677
+.L2675:
+	ldr	x0, [x29, 104]
+	ldr	w0, [x0]
+	tbz	x0, 12, .L2667
+	adrp	x0, .LC153
+	mov	w1, w21
+	add	x0, x0, :lo12:.LC153
+	bl	printf
+.L2667:
+	ldr	x0, [x29, 96]
+	ldrb	w19, [x0]
+	madd	w19, w21, w19, w22
+	and	w19, w19, 65535
+	cbnz	w20, .L2668
+	adrp	x0, .LANCHOR27
+	ldr	x0, [x0, #:lo12:.LANCHOR27]
+	ldrb	w0, [x0, 47]
+	cmp	w0, w19
+	bcs	.L2669
+.L2668:
+	and	w28, w20, 255
+	mov	w1, w19
+	mov	w0, w28
+	bl	flash_check_bad_block
+	cbnz	w0, .L2669
+	adrp	x0, .LANCHOR111
+	mov	w1, w23
+	ldrh	w7, [x0, #:lo12:.LANCHOR111]
+	mov	w0, w28
+	mul	w26, w7, w19
+	mov	w2, w26
+	bl	flash_erase_block_en
+	cbz	w0, .L2670
+	adrp	x0, .LANCHOR79
+	ldrb	w0, [x0, #:lo12:.LANCHOR79]
+	cmp	w0, 2
+	bne	.L2692
+	adrp	x0, .LANCHOR0
+	ldrb	w0, [x0, #:lo12:.LANCHOR0]
+	cbz	w0, .L2692
+	mov	w2, w26
+	mov	w1, 1
+	mov	w0, w28
+	bl	flash_erase_block_en
+	cbnz	w0, .L2692
+.L2674:
+	adrp	x0, .LANCHOR79
+	mov	w23, 1
+	ldrb	w0, [x0, #:lo12:.LANCHOR79]
+	add	w26, w26, w0, lsl 24
+.L2673:
+	adrp	x0, .LANCHOR131
+	ldr	x2, [x24, #:lo12:.LANCHOR190]
+	mov	w5, 1
+	add	x3, x25, :lo12:.LANCHOR191
+	ldrb	w4, [x0, #:lo12:.LANCHOR131]
+	mov	w1, w26
+	mov	w0, w28
+	bl	flash_prog_page_en
+	cbz	w0, .L2669
+.L2692:
+	mov	w1, w19
+	mov	w0, w28
+	bl	flash_mask_bad_block
+.L2669:
+	add	w22, w22, 1
+	and	w22, w22, 65535
+.L2677:
+	ldr	x0, [x29, 120]
+	ldrb	w0, [x0]
+	cmp	w0, w22
+	bhi	.L2675
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L2666
+.L2670:
+	cbz	w23, .L2673
+	b	.L2674
+.L2676:
+	cbz	w23, .L2678
+	adrp	x0, .LANCHOR7
+	mov	w1, 2
+	ldr	x0, [x0, #:lo12:.LANCHOR7]
+	add	x21, x0, x21, uxth 2
+	ldrb	w0, [x21, 2]
+	bfi	w0, w1, 3, 2
+	strb	w0, [x21, 2]
+.L2678:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+	.size	ftl_test_block, .-ftl_test_block
+	.section	.text.ftl_prog_page,"ax",@progbits
+	.align	2
+	.global	ftl_prog_page
+	.type	ftl_prog_page, %function
+ftl_prog_page:
+	stp	x29, x30, [sp, -64]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w19, w0, 255
+	stp	x21, x22, [sp, 32]
+	mov	w20, w1
+	mov	x21, x2
+	mov	x22, x3
+	str	x23, [sp, 48]
+	mov	w23, w4
+	bl	sblk_wait_write_queue_completed
+	mov	w0, w19
+	mov	w5, 1
+	mov	w4, w23
+	mov	x3, x22
+	mov	x2, x21
+	mov	w1, w20
+	bl	flash_prog_page_en
+	mov	w19, w0
+	cmn	w0, #1
+	bne	.L2693
+	mov	w2, 2670
+	adrp	x1, .LANCHOR192
+	adrp	x0, .LC0
+	add	x1, x1, :lo12:.LANCHOR192
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+	adrp	x0, .LC152
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC152
+	bl	printf
+.L2693:
+	mov	w0, w19
+	ldr	x23, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+	.size	ftl_prog_page, .-ftl_prog_page
+	.section	.text.ftl_info_flush,"ax",@progbits
+	.align	2
+	.global	ftl_info_flush
+	.type	ftl_info_flush, %function
+ftl_info_flush:
+	stp	x29, x30, [sp, -128]!
+	mov	w1, 0
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR131
+	stp	x23, x24, [sp, 48]
+	adrp	x24, .LANCHOR110
+	ldrb	w2, [x21, #:lo12:.LANCHOR131]
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR193
+	str	w0, [x29, 116]
+	add	x0, x20, :lo12:.LANCHOR193
+	stp	x25, x26, [sp, 64]
+	lsl	w2, w2, 1
+	stp	x27, x28, [sp, 80]
+	bl	ftl_memset
+	ldr	x0, [x24, #:lo12:.LANCHOR110]
+	ldrh	w1, [x0, 74]
+	cbz	w1, .L2697
+	strh	wzr, [x0, 150]
+.L2697:
+	adrp	x23, .LANCHOR194
+	add	x19, x23, :lo12:.LANCHOR194
+	adrp	x25, .LANCHOR111
+	mov	w26, 0
+	add	x0, x25, :lo12:.LANCHOR111
+	str	x0, [x29, 104]
+.L2710:
+	add	x0, x23, :lo12:.LANCHOR194
+	adrp	x22, .LANCHOR195
+	ldrh	w1, [x25, #:lo12:.LANCHOR111]
+	add	x7, x20, :lo12:.LANCHOR193
+	str	w1, [x29, 120]
+	ldrh	w27, [x0, 2]
+	ldr	x0, [x24, #:lo12:.LANCHOR110]
+	ldrb	w1, [x21, #:lo12:.LANCHOR131]
+	ldrb	w28, [x23, #:lo12:.LANCHOR194]
+	ldr	w6, [x0, 4]
+	lsl	w1, w1, 9
+	add	w6, w6, 1
+	str	w6, [x0, 4]
+	ldr	w0, [x29, 116]
+	str	w0, [x20, #:lo12:.LANCHOR193]
+	ldr	x0, [x22, #:lo12:.LANCHOR195]
+	str	w6, [x7, 4]
+	bl	js_hash
+	str	w0, [x7, 8]
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2698
+	adrp	x0, .LC154
+	mov	w3, w6
+	mov	w2, w27
+	mov	w1, w28
+	add	x0, x0, :lo12:.LC154
+	bl	printf
+.L2698:
+	adrp	x1, .LANCHOR95
+	ldrh	w0, [x19, 2]
+	ldrh	w1, [x1, #:lo12:.LANCHOR95]
+	cmp	w1, w0
+	bhi	.L2699
+	adrp	x27, .LANCHOR196
+	adrp	x3, .LC0
+	add	x27, x27, :lo12:.LANCHOR196
+	add	x3, x3, :lo12:.LC0
+.L2706:
+	ldrb	w0, [x19, 1]
+	adrp	x28, .LANCHOR27
+	add	w0, w0, 1
+	and	w0, w0, 255
+	strb	w0, [x19, 1]
+	cmp	w0, 7
+	bls	.L2700
+	mov	x0, 0
+.L2705:
+	ldr	x2, [x28, #:lo12:.LANCHOR27]
+	add	w1, w0, 8
+	and	w26, w0, 65535
+	add	x1, x2, x1, sxtw
+	ldrb	w2, [x1, 32]
+	add	w1, w2, 127
+	and	w1, w1, 255
+	cmp	w1, 125
+	bhi	.L2701
+	mov	x0, x3
+	str	x3, [x29, 120]
+	mov	w2, 841
+	mov	x1, x27
+	bl	printf
+	ldr	x3, [x29, 120]
+.L2704:
+	strb	w26, [x19, 1]
+	mov	w26, 1
+.L2700:
+	ldr	x0, [x28, #:lo12:.LANCHOR27]
+	ldrb	w1, [x19, 1]
+	add	x0, x0, x1
+	ldrb	w28, [x0, 40]
+	strb	w28, [x19]
+	cmp	w28, 255
+	beq	.L2706
+	ldr	x0, [x29, 104]
+	ldrh	w27, [x0]
+	mov	w0, 0
+	mul	w27, w27, w28
+	mov	w1, w27
+	bl	flash_erase_block
+	ldrb	w4, [x21, #:lo12:.LANCHOR131]
+	mov	w1, w27
+	ldr	x2, [x22, #:lo12:.LANCHOR195]
+	add	x3, x20, :lo12:.LANCHOR193
+	mov	w0, 0
+	add	w27, w27, 1
+	bl	ftl_prog_page
+	mov	w0, 1
+	strh	w0, [x19, 2]
+.L2707:
+	ldrb	w4, [x21, #:lo12:.LANCHOR131]
+	mov	w1, w27
+	ldr	x2, [x22, #:lo12:.LANCHOR195]
+	add	x3, x20, :lo12:.LANCHOR193
+	mov	w0, 0
+	bl	ftl_prog_page
+	cmn	w0, #1
+	ldrh	w1, [x19, 2]
+	adrp	x0, .LANCHOR197
+	add	w1, w1, 1
+	strh	w1, [x19, 2]
+	beq	.L2708
+	ldrb	w1, [x0, #:lo12:.LANCHOR197]
+	cbz	w1, .L2709
+.L2708:
+	strb	wzr, [x0, #:lo12:.LANCHOR197]
+	b	.L2710
+.L2701:
+	cmp	w2, 255
+	bne	.L2704
+	add	x0, x0, 1
+	cmp	x0, 8
+	bne	.L2705
+	mov	w26, w0
+	b	.L2704
+.L2699:
+	ldr	w1, [x29, 120]
+	madd	w27, w1, w28, w27
+	cbnz	w0, .L2707
+	mov	w1, w27
+	bl	flash_erase_block
+	b	.L2707
+.L2709:
+	cbnz	w26, .L2711
+.L2719:
+	adrp	x0, .LANCHOR194
+	ldrb	w0, [x0, #:lo12:.LANCHOR194]
+	cmp	w0, 255
+	bne	.L2713
+	adrp	x1, .LANCHOR196
+	adrp	x0, .LC0
+	mov	w2, 885
+	add	x1, x1, :lo12:.LANCHOR196
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2713:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+.L2711:
+	ldrb	w19, [x19, 1]
+	adrp	x20, .LANCHOR196
+	adrp	x21, .LC0
+	add	x20, x20, :lo12:.LANCHOR196
+	add	w19, w19, 1
+	add	x21, x21, :lo12:.LC0
+	adrp	x22, .LANCHOR27
+.L2714:
+	cmp	w19, 7
+	bhi	.L2719
+	ldr	x1, [x22, #:lo12:.LANCHOR27]
+	add	w0, w19, 8
+	add	x0, x1, x0, sxtw
+	ldrb	w23, [x0, 32]
+	add	w0, w23, 127
+	and	w0, w0, 255
+	cmp	w0, 125
+	bhi	.L2715
+	mov	w2, 876
+	mov	x1, x20
+	mov	x0, x21
+	bl	printf
+.L2716:
+	adrp	x0, .LANCHOR111
+	ldrh	w1, [x0, #:lo12:.LANCHOR111]
+	mov	w0, 0
+	mul	w1, w1, w23
+	bl	flash_erase_block
+	b	.L2717
+.L2715:
+	cmp	w23, 255
+	bne	.L2716
+.L2717:
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L2714
+	.size	ftl_info_flush, .-ftl_info_flush
+	.section	.text.ftl_info_blk_init,"ax",@progbits
+	.align	2
+	.global	ftl_info_blk_init
+	.type	ftl_info_blk_init, %function
+ftl_info_blk_init:
+	stp	x29, x30, [sp, -112]!
+	adrp	x0, .LANCHOR198
+	adrp	x1, .LANCHOR197
+	mov	w2, 16384
+	add	x29, sp, 0
+	strb	wzr, [x0, #:lo12:.LANCHOR198]
+	mov	w0, 1
+	strb	w0, [x1, #:lo12:.LANCHOR197]
+	adrp	x1, .LANCHOR199
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR195
+	strb	w0, [x1, #:lo12:.LANCHOR199]
+	adrp	x1, .LANCHOR7
+	ldr	x0, [x21, #:lo12:.LANCHOR195]
+	mov	x22, 7
+	str	x0, [x1, #:lo12:.LANCHOR7]
+	adrp	x1, .LANCHOR6
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR110
+	ldrh	w1, [x1, #:lo12:.LANCHOR6]
+	adrp	x20, .LANCHOR194
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR27
+	stp	x25, x26, [sp, 64]
+	adrp	x24, .LANCHOR131
+	add	x1, x0, x1, lsl 2
+	stp	x27, x28, [sp, 80]
+	str	x1, [x19, #:lo12:.LANCHOR110]
+	mov	w1, 0
+	bl	ftl_memset
+	adrp	x26, .LANCHOR111
+	adrp	x0, .LANCHOR200
+	mov	w1, 0
+	mov	w2, 16384
+	mov	w27, 21574
+	ldr	x0, [x0, #:lo12:.LANCHOR200]
+	add	x26, x26, :lo12:.LANCHOR111
+	add	x24, x24, :lo12:.LANCHOR131
+	movk	w27, 0x494c, lsl 16
+	bl	ftl_memset
+	ldr	x1, [x23, #:lo12:.LANCHOR27]
+	add	x0, x20, :lo12:.LANCHOR194
+	strb	wzr, [x0, 1]
+	ldrb	w1, [x1, 40]
+	strb	w1, [x20, #:lo12:.LANCHOR194]
+	strh	wzr, [x0, 2]
+.L2738:
+	ldr	x1, [x23, #:lo12:.LANCHOR27]
+	add	w0, w22, 8
+	sxth	w25, w22
+	mov	w28, w22
+	add	x0, x1, x0, sxtw
+	ldrb	w0, [x0, 32]
+	cmp	w0, 255
+	bne	.L2737
+.L2742:
+	sub	x22, x22, #1
+	cmn	x22, #1
+	bne	.L2738
+	mov	w25, 0
+.L2739:
+	adrp	x24, .LANCHOR14
+	ldr	w0, [x24, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2743
+	ldr	x0, [x19, #:lo12:.LANCHOR110]
+	mov	w2, 4800
+	mov	w1, w22
+	ldr	w3, [x0]
+	adrp	x0, .LC156
+	add	x0, x0, :lo12:.LC156
+	bl	printf
+.L2743:
+	cmn	w22, #1
+	bne	.L2744
+	ldr	x0, [x21, #:lo12:.LANCHOR195]
+	mov	w1, 0
+	mov	w2, 16384
+	bl	ftl_memset
+	ldr	x0, [x19, #:lo12:.LANCHOR110]
+	mov	w1, 21574
+	movk	w1, 0x494c, lsl 16
+	str	w1, [x0]
+	mov	w1, 35
+	movk	w1, 0x6, lsl 16
+	str	w1, [x0, 12]
+	mov	w0, w22
+.L2736:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L2737:
+	ldrh	w6, [x26]
+	adrp	x7, .LANCHOR193
+	ldrb	w4, [x24]
+	add	x7, x7, :lo12:.LANCHOR193
+	ldr	x2, [x21, #:lo12:.LANCHOR195]
+	mov	x3, x7
+	str	x7, [x29, 96]
+	mul	w6, w6, w0
+	mov	w0, 0
+	str	w6, [x29, 108]
+	mov	w1, w6
+	bl	ftl_read_page
+	mov	w5, w0
+	cmn	w0, #1
+	ldr	w6, [x29, 108]
+	ldr	x7, [x29, 96]
+	bne	.L2740
+	ldrb	w4, [x24]
+	mov	x3, x7
+	ldr	x2, [x21, #:lo12:.LANCHOR195]
+	add	w1, w6, 1
+	mov	w0, 0
+	bl	ftl_read_page
+	mov	w5, w0
+.L2740:
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2741
+	ldr	x0, [x19, #:lo12:.LANCHOR110]
+	mov	w2, w5
+	str	w5, [x29, 108]
+	mov	w3, 744
+	mov	w1, w28
+	ldr	w4, [x0]
+	adrp	x0, .LC155
+	add	x0, x0, :lo12:.LC155
+	bl	printf
+	ldr	w5, [x29, 108]
+.L2741:
+	cmn	w5, #1
+	beq	.L2742
+	ldr	x0, [x19, #:lo12:.LANCHOR110]
+	ldr	w0, [x0]
+	cmp	w0, w27
+	bne	.L2742
+	mov	w22, w25
+	b	.L2739
+.L2744:
+	ldr	x1, [x23, #:lo12:.LANCHOR27]
+	add	w0, w25, 8
+	ldr	x2, [x21, #:lo12:.LANCHOR195]
+	mov	w4, 4
+	adrp	x26, .LANCHOR131
+	mov	w28, 21574
+	add	x0, x1, x0, sxtw
+	adrp	x27, .LC157
+	add	x26, x26, :lo12:.LANCHOR131
+	add	x27, x27, :lo12:.LC157
+	movk	w28, 0x494c, lsl 16
+	ldrb	w1, [x0, 32]
+	add	x0, x20, :lo12:.LANCHOR194
+	strb	w1, [x20, #:lo12:.LANCHOR194]
+	strb	w25, [x0, 1]
+	adrp	x25, .LANCHOR193
+	mov	w0, 0
+	add	x3, x25, :lo12:.LANCHOR193
+	bl	flash_get_last_written_page
+	sxth	w22, w0
+	add	w0, w0, 1
+	ldrb	w23, [x20, #:lo12:.LANCHOR194]
+	and	w0, w0, 65535
+	str	w0, [x29, 108]
+	adrp	x0, .LANCHOR111
+	ldrh	w0, [x0, #:lo12:.LANCHOR111]
+	madd	w23, w23, w0, w22
+.L2746:
+	tbnz	w22, #31, .L2750
+	ldrb	w4, [x26]
+	add	x5, x25, :lo12:.LANCHOR193
+	ldr	x2, [x21, #:lo12:.LANCHOR195]
+	mov	x3, x5
+	mov	w1, w23
+	mov	w0, 0
+	str	x5, [x29, 96]
+	bl	ftl_read_page
+	cmn	w0, #1
+	beq	.L2747
+	ldr	x0, [x19, #:lo12:.LANCHOR110]
+	ldr	x5, [x29, 96]
+	ldr	w0, [x0]
+	cmp	w0, w28
+	bne	.L2747
+	ldr	w6, [x5, 8]
+	cbnz	w6, .L2748
+.L2750:
+	ldrh	w0, [x29, 108]
+	add	x20, x20, :lo12:.LANCHOR194
+	strh	w0, [x20, 2]
+	bl	ftl_tmp_into_update
+	ldr	x1, [x19, #:lo12:.LANCHOR110]
+	ldr	w0, [x1, 64]
+	add	w0, w0, 1
+	str	w0, [x1, 64]
+	mov	w0, 0
+	bl	ftl_info_flush
+	mov	w0, 0
+	bl	ftl_info_flush
+	ldr	w0, [x24, #:lo12:.LANCHOR14]
+	tbnz	x0, 14, .L2749
+.L2766:
+	mov	w0, 0
+	b	.L2736
+.L2748:
+	ldr	x0, [x21, #:lo12:.LANCHOR195]
+	ldrb	w1, [x26]
+	lsl	w1, w1, 9
+	bl	js_hash
+	cmp	w6, w0
+	beq	.L2750
+	mov	w1, w6
+	mov	x0, x27
+	bl	printf
+.L2747:
+	sub	w22, w22, #1
+	sub	w23, w23, #1
+	sxth	w22, w22
+	b	.L2746
+.L2749:
+	ldr	x0, [x19, #:lo12:.LANCHOR110]
+	ldr	w1, [x0, 156]
+	adrp	x0, .LC158
+	add	x0, x0, :lo12:.LC158
+	bl	printf
+	b	.L2766
+	.size	ftl_info_blk_init, .-ftl_info_blk_init
+	.section	.text.ftl_ext_info_flush,"ax",@progbits
+	.align	2
+	.global	ftl_ext_info_flush
+	.type	ftl_ext_info_flush, %function
+ftl_ext_info_flush:
+	stp	x29, x30, [sp, -96]!
+	adrp	x0, .LANCHOR10
+	add	x29, sp, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	ldr	w1, [x0, 520]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	cbz	w1, .L2768
+	str	wzr, [x0, 520]
+.L2768:
+	adrp	x20, .LANCHOR95
+	adrp	x22, .LANCHOR201
+	adrp	x21, .LANCHOR32
+	add	x20, x20, :lo12:.LANCHOR95
+	add	x22, x22, :lo12:.LANCHOR201
+	add	x21, x21, :lo12:.LANCHOR32
+	mov	w0, 0
+	bl	ftl_total_vpn_update
+.L2769:
+	adrp	x23, .LANCHOR110
+	mov	x24, x23
+.L2772:
+	ldr	x0, [x23, #:lo12:.LANCHOR110]
+	ldr	w1, [x0, 56]
+	add	w1, w1, 1
+	str	w1, [x0, 56]
+	ldrh	w1, [x0, 140]
+	ldrh	w0, [x20]
+	cmp	w1, w0
+	bcc	.L2770
+	bl	ftl_ext_alloc_new_blk
+.L2770:
+	ldr	x0, [x24, #:lo12:.LANCHOR110]
+	ldrh	w1, [x0, 130]
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L2771
+	adrp	x0, .LC0
+	mov	w2, 2203
+	mov	x1, x22
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2771:
+	ldrb	w19, [x21]
+	mov	w0, 24
+	ldr	x1, [x24, #:lo12:.LANCHOR110]
+	adrp	x26, .LANCHOR131
+	sub	w19, w0, w19
+	adrp	x0, .LANCHOR75
+	adrp	x27, .LANCHOR193
+	add	x25, x27, :lo12:.LANCHOR193
+	ldrh	w0, [x0, #:lo12:.LANCHOR75]
+	ldrh	w2, [x1, 130]
+	sub	w0, w19, w0
+	mov	w19, 1
+	asr	w28, w2, w0
+	lsl	w19, w19, w0
+	adrp	x0, .LANCHOR111
+	sub	w19, w19, #1
+	and	w19, w19, w2
+	ldrh	w2, [x0, #:lo12:.LANCHOR111]
+	ldrh	w0, [x1, 140]
+	sxth	w19, w19
+	mov	w1, 0
+	madd	w19, w19, w2, w0
+	ldrb	w2, [x26, #:lo12:.LANCHOR131]
+	mov	x0, x25
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	ldr	x0, [x24, #:lo12:.LANCHOR110]
+	ldrb	w7, [x26, #:lo12:.LANCHOR131]
+	str	wzr, [x27, #:lo12:.LANCHOR193]
+	ldr	w0, [x0, 56]
+	lsl	w1, w7, 9
+	str	w0, [x25, 4]
+	adrp	x0, .LANCHOR200
+	ldr	x6, [x0, #:lo12:.LANCHOR200]
+	mov	x0, x6
+	bl	js_hash
+	mov	x2, x6
+	mov	w1, w19
+	str	w0, [x25, 8]
+	mov	w4, w7
+	mov	x3, x25
+	mov	w0, w28
+	bl	ftl_prog_page
+	ldr	x2, [x24, #:lo12:.LANCHOR110]
+	ldrh	w1, [x2, 140]
+	add	w1, w1, 1
+	and	w1, w1, 65535
+	strh	w1, [x2, 140]
+	cmp	w1, 1
+	beq	.L2772
+	cmn	w0, #1
+	adrp	x0, .LANCHOR199
+	beq	.L2773
+	ldrb	w1, [x0, #:lo12:.LANCHOR199]
+	cbz	w1, .L2774
+.L2773:
+	strb	wzr, [x0, #:lo12:.LANCHOR199]
+	b	.L2769
+.L2774:
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	ret
+	.size	ftl_ext_info_flush, .-ftl_ext_info_flush
+	.section	.text.ftl_ext_info_init,"ax",@progbits
+	.align	2
+	.global	ftl_ext_info_init
+	.type	ftl_ext_info_init, %function
+ftl_ext_info_init:
+	stp	x29, x30, [sp, -128]!
+	adrp	x0, .LANCHOR121
+	adrp	x2, .LANCHOR75
+	mov	w4, 4
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR110
+	strh	wzr, [x0, #:lo12:.LANCHOR121]
+	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR200
+	stp	x27, x28, [sp, 80]
+	stp	x23, x24, [sp, 48]
+	adrp	x24, .LANCHOR193
+	ldrh	w1, [x0, 130]
+	adrp	x0, .LANCHOR32
+	stp	x25, x26, [sp, 64]
+	add	x3, x24, :lo12:.LANCHOR193
+	ldrb	w19, [x0, #:lo12:.LANCHOR32]
+	mov	w0, 24
+	sub	w0, w0, w19
+	ldrh	w19, [x2, #:lo12:.LANCHOR75]
+	ldr	x2, [x21, #:lo12:.LANCHOR200]
+	sub	w0, w0, w19
+	mov	w19, 1
+	lsl	w19, w19, w0
+	sub	w19, w19, #1
+	asr	w22, w1, w0
+	and	w19, w19, w1
+	and	w27, w22, 255
+	mov	w1, w19
+	mov	w0, w27
+	bl	flash_get_last_written_page
+	sxth	w23, w0
+	adrp	x0, .LANCHOR14
+	stp	x0, x24, [x29, 112]
+	ldr	w1, [x0, #:lo12:.LANCHOR14]
+	tbz	x1, 12, .L2785
+	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	adrp	x1, .LANCHOR202
+	and	w4, w22, 65535
+	mov	w3, w23
+	mov	w2, 2248
+	add	x1, x1, :lo12:.LANCHOR202
+	ldrh	w5, [x0, 130]
+	adrp	x0, .LC159
+	add	x0, x0, :lo12:.LC159
+	bl	printf
+.L2785:
+	adrp	x25, .LANCHOR131
+	adrp	x26, .LANCHOR111
+	mov	w28, 20038
+	add	x25, x25, :lo12:.LANCHOR131
+	add	x26, x26, :lo12:.LANCHOR111
+	mov	w24, 0
+	movk	w28, 0x4549, lsl 16
+.L2786:
+	and	w22, w23, 65535
+	sub	w0, w22, w24
+	tbnz	x0, 15, .L2791
+	ldr	x0, [x29, 120]
+	sub	w1, w23, w24
+	ldrb	w4, [x25]
+	add	x5, x0, :lo12:.LANCHOR193
+	ldrh	w0, [x26]
+	ldr	x2, [x21, #:lo12:.LANCHOR200]
+	mov	x3, x5
+	str	x5, [x29, 104]
+	madd	w1, w0, w19, w1
+	mov	w0, w27
+	bl	flash_read_page_en
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	beq	.L2787
+	adrp	x0, .LANCHOR10
+	ldr	x5, [x29, 104]
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	ldr	w0, [x0]
+	cmp	w0, w28
+	bne	.L2787
+	ldr	w6, [x5, 8]
+	cbnz	w6, .L2788
+.L2791:
+	bl	zftl_sblk_list_init
+	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	ldrh	w1, [x0, 140]
+	cmp	w1, w23
+	bgt	.L2790
+	add	w22, w22, 1
+	strh	w22, [x0, 140]
+	bl	ftl_ext_info_flush
+.L2790:
+	adrp	x0, .LANCHOR10
+	mov	w1, -1
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	strh	w1, [x0, 584]
+	strh	w1, [x0, 586]
+	strh	w1, [x0, 588]
+	strh	w1, [x0, 590]
+	mov	w1, 65535
+	str	w1, [x0, 560]
+	mov	w1, -1
+	str	w1, [x0, 564]
+	ldr	x1, [x29, 112]
+	str	wzr, [x0, 520]
+	str	wzr, [x0, 604]
+	str	wzr, [x0, 608]
+	ldr	w1, [x1, #:lo12:.LANCHOR14]
+	tbz	x1, 12, .L2793
+	ldr	w3, [x0, 12]
+	adrp	x1, .LANCHOR202
+	adrp	x0, .LC161
+	mov	w4, 0
+	mov	w2, 0
+	add	x1, x1, :lo12:.LANCHOR202
+	add	x0, x0, :lo12:.LC161
+	bl	printf
+.L2793:
+	adrp	x0, .LANCHOR73
+	mov	w1, -1
+	ldp	x19, x20, [sp, 16]
+	strh	w1, [x0, #:lo12:.LANCHOR73]
+	ldp	x21, x22, [sp, 32]
+	mov	w0, 0
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+.L2788:
+	ldr	x0, [x21, #:lo12:.LANCHOR200]
+	ldrb	w1, [x25]
+	lsl	w1, w1, 9
+	bl	js_hash
+	cmp	w6, w0
+	beq	.L2791
+	adrp	x0, .LC160
+	mov	w1, w6
+	add	x0, x0, :lo12:.LC160
+	bl	printf
+.L2787:
+	add	w24, w24, 1
+	b	.L2786
+	.size	ftl_ext_info_init, .-ftl_ext_info_init
+	.section	.text.ftl_low_format_data_init,"ax",@progbits
+	.align	2
+	.global	ftl_low_format_data_init
+	.type	ftl_low_format_data_init, %function
+ftl_low_format_data_init:
+	stp	x29, x30, [sp, -48]!
+	adrp	x0, .LANCHOR200
+	mov	w2, 16384
+	mov	w1, 0
+	add	x29, sp, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR200]
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR110
+	str	x21, [sp, 32]
+	bl	ftl_memset
+	bl	zftl_sblk_list_init
+	mov	w0, 1
+	bl	ftl_alloc_sblk
+	mov	w1, 0
+	mov	w21, w0
+	bl	ftl_erase_sblk
+	ldr	x1, [x19, #:lo12:.LANCHOR110]
+	mov	w0, w21
+	add	x1, x1, 672
+	bl	ftl_get_blk_list_in_sblk
+	ldr	x0, [x19, #:lo12:.LANCHOR110]
+	ldrh	w20, [x0, 672]
+	strh	wzr, [x0, 690]
+	mov	w0, 65533
+	sub	w1, w20, #1
+	cmp	w0, w1, uxth
+	bcs	.L2805
+	adrp	x1, .LANCHOR203
+	adrp	x0, .LC0
+	mov	w2, 2476
+	add	x1, x1, :lo12:.LANCHOR203
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2805:
+	ldr	x0, [x19, #:lo12:.LANCHOR110]
+	mov	w2, 256
+	mov	w1, 255
+	add	x0, x0, 416
+	strh	wzr, [x0, 280]
+	bl	ftl_memset
+	ldr	x0, [x19, #:lo12:.LANCHOR110]
+	mov	w2, 4096
+	mov	w1, 0
+	add	x0, x0, 704
+	bl	ftl_memset
+	adrp	x0, .LANCHOR32
+	ldr	x1, [x19, #:lo12:.LANCHOR110]
+	ldrb	w2, [x0, #:lo12:.LANCHOR32]
+	mov	w0, 24
+	sub	w0, w0, w2
+	adrp	x2, .LANCHOR75
+	strh	w21, [x1, 416]
+	adrp	x21, .LANCHOR10
+	ldrh	w2, [x2, #:lo12:.LANCHOR75]
+	strh	w20, [x1, 692]
+	sub	w0, w0, w2
+	asr	w0, w20, w0
+	strh	w0, [x1, 694]
+	mov	w0, 1
+	strh	w0, [x1, 688]
+	adrp	x0, .LANCHOR204
+	ldrh	w0, [x0, #:lo12:.LANCHOR204]
+	strh	w0, [x1, 698]
+	mov	w1, 20038
+	ldr	x0, [x21, #:lo12:.LANCHOR10]
+	movk	w1, 0x4549, lsl 16
+	str	w1, [x0]
+	bl	ftl_alloc_sys_blk
+	mov	w20, w0
+	mov	w1, 0
+	bl	ftl_erase_phy_blk
+	ldr	x0, [x19, #:lo12:.LANCHOR110]
+	mov	w1, 2
+	strh	w20, [x0, 130]
+	mov	w20, -1
+	strh	wzr, [x0, 140]
+	ldr	x0, [x21, #:lo12:.LANCHOR10]
+	add	x0, x0, 16
+	strh	w20, [x0, 568]
+	strh	w20, [x0, 570]
+	strh	w20, [x0, 572]
+	strh	w20, [x0, 574]
+	bl	ftl_open_sblk_init
+	ldr	x0, [x21, #:lo12:.LANCHOR10]
+	mov	w1, 3
+	add	x0, x0, 48
+	bl	ftl_open_sblk_init
+	ldr	x1, [x19, #:lo12:.LANCHOR110]
+	ldr	x0, [x21, #:lo12:.LANCHOR10]
+	add	x0, x0, 136
+	ldrh	w2, [x1, 134]
+	strh	w2, [x0, -10]
+	strh	w20, [x0, -56]
+	mov	w2, -1
+	strh	w20, [x0, -6]
+	str	w2, [x0, 408]
+	strh	wzr, [x0, -12]
+	strh	wzr, [x0, -16]
+	strh	wzr, [x0, -14]
+	strh	w2, [x1, 126]
+	mov	w2, 256
+	str	wzr, [x0, 384]
+	mov	w1, 255
+	str	wzr, [x0, 388]
+	str	wzr, [x0, 392]
+	bl	ftl_memset
+	mov	w2, 128
+	mov	w1, 255
+	ldr	x0, [x21, #:lo12:.LANCHOR10]
+	add	x0, x0, 392
+	bl	ftl_memset
+	bl	ftl_ext_info_flush
+	mov	w0, 0
+	bl	ftl_info_flush
+	bl	ftl_info_blk_init
+	ldr	x21, [sp, 32]
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+	.size	ftl_low_format_data_init, .-ftl_low_format_data_init
+	.section	.text.ftl_low_format,"ax",@progbits
+	.align	2
+	.global	ftl_low_format
+	.type	ftl_low_format, %function
+ftl_low_format:
+	stp	x29, x30, [sp, -80]!
+	mov	w1, 0
+	adrp	x0, .LC162
+	add	x0, x0, :lo12:.LC162
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR205
+	stp	x21, x22, [sp, 32]
+	add	x20, x20, :lo12:.LANCHOR205
+	stp	x25, x26, [sp, 64]
+	adrp	x22, .LANCHOR27
+	mov	x25, x22
+	stp	x23, x24, [sp, 48]
+	mov	w19, 8
+	adrp	x23, .LC0
+	bl	printf
+.L2810:
+	ldr	x0, [x22, #:lo12:.LANCHOR27]
+	add	x0, x0, x19, sxtw
+	ldrb	w21, [x0, 32]
+	add	w0, w21, 127
+	and	w0, w0, 255
+	cmp	w0, 125
+	bhi	.L2808
+	mov	w2, 2531
+	mov	x1, x20
+	add	x0, x23, :lo12:.LC0
+	bl	printf
+.L2808:
+	cmp	w21, 255
+	beq	.L2809
+	adrp	x0, .LANCHOR111
+	ldrh	w1, [x0, #:lo12:.LANCHOR111]
+	mov	w0, 0
+	mul	w1, w1, w21
+	bl	flash_erase_block
+.L2809:
+	add	w19, w19, 1
+	cmp	w19, 16
+	bne	.L2810
+	bl	sblk_init
+	adrp	x22, .LANCHOR7
+	bl	ftl_info_blk_init
+	adrp	x19, .LANCHOR6
+	adrp	x0, .LANCHOR195
+	mov	w2, 16384
+	mov	w1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR195]
+	bl	ftl_memset
+	ldr	x0, [x22, #:lo12:.LANCHOR7]
+	mov	w3, 1
+	ldrh	w2, [x19, #:lo12:.LANCHOR6]
+	add	x2, x0, x2, lsl 2
+.L2811:
+	cmp	x0, x2
+	bne	.L2812
+	adrp	x21, .LANCHOR110
+	mov	w1, 21574
+	adrp	x24, .LANCHOR69
+	add	x24, x24, :lo12:.LANCHOR69
+	ldr	x0, [x21, #:lo12:.LANCHOR110]
+	movk	w1, 0x494c, lsl 16
+	mov	w20, 0
+	mov	w26, 1
+	strh	wzr, [x0, 148]
+	str	w1, [x0]
+.L2813:
+	ldrh	w0, [x19, #:lo12:.LANCHOR6]
+	adrp	x23, .LANCHOR76
+	cmp	w0, w20
+	bhi	.L2822
+	ldr	x0, [x25, #:lo12:.LANCHOR27]
+	mov	w4, 3
+	ldrb	w2, [x23, #:lo12:.LANCHOR76]
+	mov	w10, 15
+	ldr	x6, [x21, #:lo12:.LANCHOR110]
+	cmp	w2, 1
+	ldr	x1, [x22, #:lo12:.LANCHOR7]
+	ldrb	w0, [x0, 47]
+	csinc	w4, w4, wzr, ne
+	and	w4, w4, 255
+	and	w8, w2, 65535
+	ldrh	w3, [x6, 148]
+	udiv	w0, w0, w2
+	and	w5, w0, 65535
+	ubfiz	x0, x0, 2, 8
+	add	x0, x0, 4
+	add	w20, w5, 1
+	add	x0, x1, x0
+.L2825:
+	cmp	w2, 4
+	add	x1, x1, 4
+	csel	w7, w10, w4, eq
+	strb	w7, [x1, -1]
+	ldrb	w7, [x1, -2]
+	orr	w7, w7, -32
+	strb	w7, [x1, -2]
+	cmp	x1, x0
+	bne	.L2825
+	mul	w5, w5, w8
+	mov	w4, 16
+	add	w0, w8, w3
+	sdiv	w4, w4, w2
+	add	w0, w5, w0, uxth
+	strh	w0, [x6, 148]
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	add	w4, w20, w4
+	and	w4, w4, 65535
+	strh	w4, [x6, 134]
+	tbz	x0, 12, .L2826
+	adrp	x0, .LC163
+	mov	w3, w20
+	mov	w2, 128
+	mov	w1, 2590
+	add	x0, x0, :lo12:.LC163
+	bl	printf
+.L2826:
+	ldr	x0, [x21, #:lo12:.LANCHOR110]
+	mov	w2, 128
+	mov	w1, 255
+	add	x0, x0, 160
+	bl	ftl_memset
+	adrp	x0, .LANCHOR112
+	ldrb	w10, [x23, #:lo12:.LANCHOR76]
+	adrp	x3, .LANCHOR75
+	ldr	x2, [x21, #:lo12:.LANCHOR110]
+	ldrb	w16, [x0, #:lo12:.LANCHOR112]
+	adrp	x0, .LANCHOR32
+	and	w11, w10, 65535
+	ldr	x15, [x22, #:lo12:.LANCHOR7]
+	ldrb	w4, [x0, #:lo12:.LANCHOR32]
+	mov	w0, 24
+	ldrh	w8, [x2, 134]
+	sub	w0, w0, w4
+	ldrh	w4, [x3, #:lo12:.LANCHOR75]
+	mul	w1, w20, w11
+	mov	w3, 0
+	sub	w0, w0, w4
+	mov	w4, 1
+	and	w1, w1, 65535
+	lsl	w4, w4, w0
+	and	w4, w4, 65535
+.L2827:
+	cmp	w20, w8
+	bcc	.L2833
+	ldrh	w0, [x19, #:lo12:.LANCHOR6]
+	strh	w3, [x2, 112]
+	sub	w0, w0, w8
+	strh	wzr, [x2, 114]
+	strh	w0, [x2, 116]
+	strh	wzr, [x2, 118]
+	strh	w8, [x2, 132]
+	bl	ftl_low_format_data_init
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L2812:
+	ldrb	w1, [x0, 2]
+	add	x0, x0, 4
+	and	w1, w1, 31
+	bfi	w1, w3, 3, 2
+	strb	w1, [x0, -2]
+	b	.L2811
+.L2822:
+	adrp	x0, .LANCHOR82
+	strh	w20, [x24]
+	ldrb	w0, [x0, #:lo12:.LANCHOR82]
+	cbnz	w0, .L2814
+	mov	w0, w20
+	bl	ftl_test_block
+.L2814:
+	ldrb	w11, [x23, #:lo12:.LANCHOR76]
+	adrp	x0, .LANCHOR112
+	ldr	x6, [x22, #:lo12:.LANCHOR7]
+	mov	w7, 0
+	ldrb	w14, [x0, #:lo12:.LANCHOR112]
+	mov	w10, 0
+	ldr	x13, [x21, #:lo12:.LANCHOR110]
+	mov	w8, 0
+	mul	w12, w20, w11
+	add	x6, x6, x20, uxth 2
+.L2815:
+	cmp	w8, w14
+	bcs	.L2819
+	add	w15, w11, w7
+	b	.L2820
+.L2818:
+	add	w1, w7, w12
+	mov	w0, w8
+	bl	flash_check_bad_block
+	cbz	w0, .L2816
+	ldrb	w1, [x6, 3]
+	lsl	w0, w26, w7
+	orr	w0, w0, w1
+	strb	w0, [x6, 3]
+	ldrh	w0, [x13, 148]
+	add	w0, w0, 1
+	strh	w0, [x13, 148]
+.L2817:
+	add	w7, w7, 1
+.L2820:
+	cmp	w7, w15
+	bne	.L2818
+	add	w8, w8, 1
+	sub	w12, w12, w11
+	and	w8, w8, 65535
+	b	.L2815
+.L2816:
+	add	w10, w10, 1
+	and	w10, w10, 65535
+	b	.L2817
+.L2819:
+	cbnz	w10, .L2821
+	ldrb	w0, [x6, 2]
+	orr	w0, w0, -32
+	strb	w0, [x6, 2]
+.L2821:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L2813
+.L2833:
+	add	x13, x15, x20, uxth 2
+	mov	w6, 0
+	mov	w12, 0
+	mov	w5, 0
+	ldrb	w0, [x13, 2]
+	orr	w0, w0, -32
+	strb	w0, [x13, 2]
+.L2828:
+	cmp	w5, w16
+	bcc	.L2835
+	add	w20, w20, 1
+	add	w1, w1, w11
+	and	w20, w20, 65535
+	and	w1, w1, 65535
+	b	.L2827
+.L2831:
+	ldrb	w14, [x13, 3]
+	add	w17, w12, w7
+	asr	w14, w14, w17
+	tbnz	x14, 0, .L2829
+	cmp	w10, 1
+	bls	.L2834
+	and	w0, w0, 1
+	add	w0, w1, w0
+	and	w0, w0, 65535
+.L2830:
+	add	x14, x2, x3, sxtw 1
+	add	w3, w3, 1
+	and	w3, w3, 65535
+	add	w0, w0, w6
+	strh	w0, [x14, 160]
+.L2829:
+	add	x7, x7, 1
+.L2832:
+	and	w0, w7, 65535
+	cmp	w0, w11
+	bcc	.L2831
+	add	w5, w5, 1
+	add	w6, w4, w6
+	and	w5, w5, 65535
+	add	w12, w12, w10
+	and	w6, w6, 65535
+	b	.L2828
+.L2834:
+	mov	w0, w1
+	b	.L2830
+.L2835:
+	mov	x7, 0
+	b	.L2832
+	.size	ftl_low_format, .-ftl_low_format
+	.section	.text.ftl_re_low_format,"ax",@progbits
+	.align	2
+	.global	ftl_re_low_format
+	.type	ftl_re_low_format, %function
+ftl_re_low_format:
+	stp	x29, x30, [sp, -16]!
+	mov	w1, 1
+	adrp	x0, .LC164
+	add	x0, x0, :lo12:.LC164
+	add	x29, sp, 0
+	bl	printf
+	bl	sblk_init
+	bl	ftl_info_blk_init
+	bl	ftl_ext_info_init
+	adrp	x0, .LANCHOR110
+	adrp	x2, .LANCHOR6
+	mov	w3, 0
+	mov	w4, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR110]
+	mov	w5, 0
+	ldrh	w7, [x2, #:lo12:.LANCHOR6]
+	adrp	x2, .LANCHOR7
+	ldr	x2, [x2, #:lo12:.LANCHOR7]
+	ldrh	w1, [x0, 134]
+	add	x2, x2, x1, uxth 2
+.L2846:
+	cmp	w1, w7
+	bcc	.L2850
+	strh	w5, [x0, 114]
+	strh	w4, [x0, 118]
+	strh	w3, [x0, 116]
+	strh	wzr, [x0, 122]
+	strh	wzr, [x0, 120]
+	strh	wzr, [x0, 124]
+	bl	ftl_low_format_data_init
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+.L2850:
+	ldrb	w6, [x2, 2]
+	and	w8, w6, 31
+	strb	w8, [x2, 2]
+	ands	w6, w6, 24
+	bne	.L2847
+	add	w5, w5, 1
+	and	w5, w5, 65535
+.L2848:
+	add	w1, w1, 1
+	add	x2, x2, 4
+	and	w1, w1, 65535
+	b	.L2846
+.L2847:
+	cmp	w6, 16
+	bne	.L2849
+	add	w4, w4, 1
+	and	w4, w4, 65535
+	b	.L2848
+.L2849:
+	add	w3, w3, 1
+	and	w3, w3, 65535
+	b	.L2848
+	.size	ftl_re_low_format, .-ftl_re_low_format
+	.section	.text.ftl_prog_ppa_page,"ax",@progbits
+	.align	2
+	.global	ftl_prog_ppa_page
+	.type	ftl_prog_ppa_page, %function
+ftl_prog_ppa_page:
+	adrp	x4, .LANCHOR32
+	mov	w5, 1
+	ldrb	w6, [x4, #:lo12:.LANCHOR32]
+	mov	w4, 24
+	sub	w4, w4, w6
+	lsl	w7, w5, w4
+	sub	w7, w7, #1
+	lsl	w5, w5, w6
+	sub	w6, w5, #1
+	lsr	w5, w0, w4
+	mov	w4, w3
+	mov	x3, x2
+	mov	x2, x1
+	and	w1, w7, w0
+	and	w0, w6, w5
+	b	ftl_prog_page
+	.size	ftl_prog_ppa_page, .-ftl_prog_ppa_page
+	.section	.text.ftl_write_last_log_page,"ax",@progbits
+	.align	2
+	.global	ftl_write_last_log_page
+	.type	ftl_write_last_log_page, %function
+ftl_write_last_log_page:
+	ldrh	w1, [x0, 6]
+	cmp	w1, 1
+	bne	.L2855
+	stp	x29, x30, [sp, -48]!
+	adrp	x1, .LANCHOR117
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	stp	x21, x22, [sp, 32]
+	ldr	x20, [x1, #:lo12:.LANCHOR117]
+	ldrh	w22, [x0, 12]
+	bl	ftl_get_new_free_page
+	mov	w21, w0
+	cmn	w0, #1
+	beq	.L2856
+	ldrh	w0, [x19]
+	add	x20, x20, x22, uxth 2
+	bl	ftl_vpn_decrement
+	adrp	x0, .LANCHOR191
+	mov	w1, 15555
+	add	x7, x0, :lo12:.LANCHOR191
+	movk	w1, 0xf55f, lsl 16
+	str	w1, [x0, #:lo12:.LANCHOR191]
+	adrp	x0, .LANCHOR95
+	ldrh	w1, [x0, #:lo12:.LANCHOR95]
+	adrp	x0, .LANCHOR80
+	ldrb	w0, [x0, #:lo12:.LANCHOR80]
+	mul	w1, w1, w0
+	mov	x0, x20
+	lsl	w1, w1, 2
+	bl	js_hash
+	mov	x1, x7
+	mov	x2, 0
+	stp	w0, wzr, [x7, 4]
+	mov	w0, 2
+	str	wzr, [x7, 12]
+	str	wzr, [x1, 16]!
+	bl	ftl_debug_info_fill
+	mov	x2, x7
+	adrp	x0, .LANCHOR131
+	mov	x1, x20
+	ldrb	w3, [x0, #:lo12:.LANCHOR131]
+	mov	w0, w21
+	bl	ftl_prog_ppa_page
+.L2856:
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
+.L2855:
+	mov	w0, -1
+	ret
+	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
+	.section	.text.pm_write_page,"ax",@progbits
+	.align	2
+	.global	pm_write_page
+	.type	pm_write_page, %function
+pm_write_page:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w19, w0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR95
+	stp	x23, x24, [sp, 48]
+	adrp	x22, .LANCHOR111
+	adrp	x24, .LANCHOR110
+	mov	x23, x1
+	add	x21, x21, :lo12:.LANCHOR95
+	mov	x20, x24
+	add	x22, x22, :lo12:.LANCHOR111
+	stp	x25, x26, [sp, 64]
+	str	x27, [sp, 80]
+	mov	w25, 65535
+.L2862:
+	ldr	x0, [x24, #:lo12:.LANCHOR110]
+	ldr	w1, [x0, 48]
+	ldrh	w2, [x0, 696]
+	add	w1, w1, 1
+	str	w1, [x0, 48]
+	ldrh	w1, [x21]
+	cmp	w2, w1
+	bcs	.L2863
+	ldrh	w0, [x0, 692]
+	cmp	w0, w25
+	bne	.L2864
+.L2863:
+	bl	pm_alloc_new_blk
+	mov	w0, 0
+	bl	ftl_info_flush
+.L2864:
+	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	ldrh	w0, [x0, 692]
+	cmp	w0, w25
+	bne	.L2865
+	adrp	x1, .LANCHOR206
+	adrp	x0, .LC0
+	mov	w2, 303
+	add	x1, x1, :lo12:.LANCHOR206
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2865:
+	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	adrp	x27, .LANCHOR207
+	ldrh	w1, [x22]
+	mov	w2, 64
+	ldrh	w26, [x0, 692]
+	ldrh	w0, [x0, 696]
+	madd	w26, w26, w1, w0
+	ldr	x0, [x27, #:lo12:.LANCHOR207]
+	mov	w1, 0
+	bl	ftl_memset
+	ldr	x6, [x27, #:lo12:.LANCHOR207]
+	ldr	x7, [x20, #:lo12:.LANCHOR110]
+	str	w19, [x6]
+	ldr	w0, [x7, 48]
+	str	w0, [x6, 4]
+	adrp	x0, .LANCHOR131
+	ldrb	w8, [x0, #:lo12:.LANCHOR131]
+	mov	x0, x23
+	lsl	w1, w8, 9
+	bl	js_hash
+	str	w0, [x6, 8]
+	ldrb	w0, [x7, 694]
+	mov	x2, x23
+	mov	w1, w26
+	mov	w4, w8
+	mov	x3, x6
+	bl	ftl_prog_page
+	ldr	x2, [x20, #:lo12:.LANCHOR110]
+	ldrh	w1, [x2, 696]
+	add	w1, w1, 1
+	and	w1, w1, 65535
+	strh	w1, [x2, 696]
+	cmp	w1, 1
+	adrp	x1, .LANCHOR208
+	beq	.L2866
+	ldrb	w3, [x1, #:lo12:.LANCHOR208]
+	cbz	w3, .L2867
+.L2866:
+	strb	wzr, [x1, #:lo12:.LANCHOR208]
+	b	.L2862
+.L2867:
+	cmn	w0, #1
+	bne	.L2869
+	mov	w1, w26
+	adrp	x0, .LC165
+	add	x0, x0, :lo12:.LC165
+	bl	printf
+	b	.L2862
+.L2869:
+	ldrh	w0, [x2, 698]
+	cmp	w19, w0
+	bcs	.L2870
+	add	x19, x2, x19, uxtw 2
+	str	w26, [x19, 704]
+.L2870:
+	mov	w0, 0
+	ldr	x27, [sp, 80]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	ret
+	.size	pm_write_page, .-pm_write_page
+	.section	.text.ftl_dump_write_open_sblk,"ax",@progbits
+	.align	2
+	.global	ftl_dump_write_open_sblk
+	.type	ftl_dump_write_open_sblk, %function
+ftl_dump_write_open_sblk:
+	sub	sp, sp, #224
+	stp	x29, x30, [sp, 48]
+	add	x29, sp, 48
+	stp	x19, x20, [sp, 64]
+	and	w20, w0, 65535
+	adrp	x0, .LANCHOR6
+	stp	x21, x22, [sp, 80]
+	stp	x23, x24, [sp, 96]
+	ldrh	w0, [x0, #:lo12:.LANCHOR6]
+	stp	x25, x26, [sp, 112]
+	stp	x27, x28, [sp, 128]
+	cmp	w0, w20
+	bls	.L2875
+	adrp	x0, .LANCHOR84
+	str	x0, [x29, 120]
+	ldrb	w1, [x0, #:lo12:.LANCHOR84]
+	cbnz	w1, .L2877
+	adrp	x0, .LANCHOR81
+	ldrb	w0, [x0, #:lo12:.LANCHOR81]
+	cbz	w0, .L2875
+.L2877:
+	adrp	x0, .LANCHOR36
+	ldrb	w0, [x0, #:lo12:.LANCHOR36]
+	cbnz	w0, .L2875
+	adrp	x0, .LANCHOR7
+	ubfiz	x14, x20, 2, 16
+	mov	x15, x0
+	ldr	x1, [x0, #:lo12:.LANCHOR7]
+	add	x1, x1, x14
+	ldrb	w1, [x1, 2]
+	and	w1, w1, 224
+	cmp	w1, 160
+	bne	.L2899
+	adrp	x0, .LANCHOR79
+	ldrb	w25, [x0, #:lo12:.LANCHOR79]
+.L2878:
+	add	x21, x29, 176
+	adrp	x23, .LANCHOR95
+	mov	w0, w20
+	adrp	x26, .LANCHOR111
+	add	x26, x26, :lo12:.LANCHOR111
+	mov	w27, 0
+	strh	w20, [x21, -32]!
+	mov	w28, 0
+	add	x1, x21, 16
+	bl	ftl_get_blk_list_in_sblk
+	ldrh	w1, [x23, #:lo12:.LANCHOR95]
+	and	w0, w0, 255
+	strb	w0, [x29, 153]
+	strb	wzr, [x29, 149]
+	strh	wzr, [x29, 146]
+	mul	w0, w0, w1
+	strh	wzr, [x29, 154]
+	strh	w0, [x29, 150]
+	ldr	x0, [x15, #:lo12:.LANCHOR7]
+	add	x1, x0, x14
+	ldr	w5, [x0, x14]
+	ldrb	w2, [x1, 2]
+	mov	w1, w20
+	ldrh	w4, [x0, x14]
+	adrp	x0, .LC166
+	ubfx	x5, x5, 11, 8
+	add	x0, x0, :lo12:.LC166
+	ubfx	x3, x2, 3, 2
+	and	w4, w4, 2047
+	ubfx	x2, x2, 5, 3
+	bl	printf
+	mov	w0, 1
+	bl	buf_alloc
+	mov	x19, x0
+	mov	w10, 0
+	add	x0, x23, :lo12:.LANCHOR95
+	str	x0, [x29, 128]
+.L2879:
+	ldr	x0, [x29, 128]
+	ldrh	w0, [x0]
+	cmp	w0, w27
+	bls	.L2887
+	lsl	w22, w27, 1
+	mov	w28, 0
+	sub	w0, w22, #1
+	add	w22, w22, w27
+	str	w0, [x29, 140]
+	sub	w22, w22, #1
+	adrp	x0, .LC167
+	add	x0, x0, :lo12:.LC167
+	str	x0, [x29, 112]
+	b	.L2890
+.L2899:
+	mov	w25, 1
+	b	.L2878
+.L2888:
+	ldrh	w12, [x21, x24]
+	mov	w0, 65535
+	cmp	w12, w0
+	bne	.L2880
+.L2886:
+	add	w10, w10, 1
+	and	w10, w10, 65535
+.L2881:
+	cmp	w25, w10
+	bcs	.L2888
+	add	w11, w28, 1
+	and	w28, w11, 65535
+.L2890:
+	ldrb	w0, [x29, 153]
+	cmp	w0, w28
+	bls	.L2889
+	sxtw	x24, w28
+	mov	w10, 1
+	add	x24, x24, 8
+	lsl	x24, x24, 1
+	b	.L2881
+.L2880:
+	ldrh	w3, [x26]
+	cmp	w25, 3
+	mul	w3, w3, w12
+	add	w0, w3, w10
+	bne	.L2882
+	adrp	x1, .LANCHOR37
+	ldrb	w1, [x1, #:lo12:.LANCHOR37]
+	cbz	w1, .L2883
+	adrp	x1, .LANCHOR79
+	add	w0, w0, w22
+	ldrb	w3, [x1, #:lo12:.LANCHOR79]
+.L2913:
+	orr	w3, w0, w3, lsl 24
+	b	.L2884
+.L2883:
+	add	w3, w27, w3
+	orr	w3, w3, w10, lsl 24
+.L2884:
+	str	w3, [x19, 40]
+	mov	w1, 1
+	stp	w10, w12, [x29, 104]
+	mov	x0, x19
+	str	w3, [x29, 136]
+	bl	sblk_read_page
+	ldr	w13, [x19, 52]
+	ldp	w10, w12, [x29, 104]
+	cmp	w13, 512
+	ccmn	w13, #1, 4, ne
+	ldr	w3, [x29, 136]
+	bne	.L2886
+	ldr	x1, [x19, 24]
+	mov	w4, w13
+	ldr	x0, [x19, 8]
+	str	w10, [x29, 108]
+	str	w13, [x29, 136]
+	ldr	w2, [x1, 12]
+	str	w2, [sp, 32]
+	ldr	w2, [x1, 8]
+	str	w2, [sp, 24]
+	ldr	w2, [x1, 4]
+	str	w2, [sp, 16]
+	mov	w2, w27
+	ldr	w1, [x1]
+	str	w1, [sp, 8]
+	ldr	w1, [x0, 12]
+	str	w1, [sp]
+	mov	w1, w12
+	ldp	w5, w6, [x0]
+	ldr	w7, [x0, 8]
+	ldr	x0, [x29, 112]
+	bl	printf
+	ldr	w13, [x29, 136]
+	ldr	w10, [x29, 108]
+	cmp	w13, 512
+	bne	.L2886
+.L2887:
+	mov	w4, w10
+	mov	w3, w28
+	mov	w2, w27
+	mov	w1, w20
+	adrp	x24, .LANCHOR131
+	adrp	x0, .LC168
+	add	x0, x0, :lo12:.LC168
+	bl	printf
+	ldr	x0, [x19, 8]
+	mov	w1, 0
+	ldrb	w2, [x24, #:lo12:.LANCHOR131]
+	adrp	x25, .LANCHOR14
+	adrp	x26, .LC169
+	add	x25, x25, :lo12:.LANCHOR14
+	add	x26, x26, :lo12:.LC169
+	lsl	w2, w2, 9
+	bl	ftl_memset
+	ldr	x0, [x19, 24]
+	mov	w1, 0
+	ldrb	w2, [x24, #:lo12:.LANCHOR131]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+.L2891:
+	ldrh	w0, [x23, #:lo12:.LANCHOR95]
+	cmp	w0, w27
+	bls	.L2897
+	lsl	w0, w27, 1
+	str	w0, [x29, 140]
+	ldr	x0, [x29, 120]
+	mov	w22, 0
+	add	x28, x0, :lo12:.LANCHOR84
+	b	.L2898
+.L2882:
+	cmp	w25, 2
+	bne	.L2885
+	adrp	x1, .LANCHOR79
+	ldrb	w3, [x1, #:lo12:.LANCHOR79]
+	ldr	w1, [x29, 140]
+	add	w0, w1, w0
+	b	.L2913
+.L2885:
+	add	w3, w27, w3
+	b	.L2884
+.L2889:
+	add	w8, w27, 1
+	and	w27, w8, 65535
+	b	.L2879
+.L2896:
+	ldr	w0, [x25]
+	tbz	x0, 12, .L2892
+	mov	w2, w22
+	mov	w1, w27
+	mov	x0, x26
+	bl	printf
+.L2892:
+	ldrb	w1, [x28]
+	adrp	x2, .LANCHOR111
+	sxtw	x0, w22
+	cbz	w1, .L2893
+	add	x0, x0, 8
+	ldrh	w1, [x2, #:lo12:.LANCHOR111]
+	ldrh	w0, [x21, x0, lsl 1]
+	mul	w0, w0, w1
+	orr	w0, w0, w27
+	str	w0, [x19, 40]
+	mov	x0, x19
+	bl	sblk_3d_tlc_dump_prog
+.L2894:
+	add	w22, w22, 1
+	and	w22, w22, 65535
+.L2898:
+	ldrb	w0, [x29, 153]
+	cmp	w0, w22
+	bhi	.L2896
+	add	w8, w27, 1
+	and	w27, w8, 65535
+	b	.L2891
+.L2893:
+	adrp	x1, .LANCHOR79
+	add	x0, x0, 8
+	ldrb	w1, [x1, #:lo12:.LANCHOR79]
+	cmp	w1, 2
+	bne	.L2895
+	ldrh	w1, [x2, #:lo12:.LANCHOR111]
+	ldrh	w0, [x21, x0, lsl 1]
+	mul	w0, w0, w1
+	ldr	w1, [x29, 140]
+	orr	w0, w0, w1
+	orr	w0, w0, 33554432
+	str	w0, [x19, 40]
+	mov	x0, x19
+	bl	sblk_mlc_dump_prog
+	b	.L2894
+.L2895:
+	ldrh	w1, [x21, x0, lsl 1]
+	mov	w6, 1
+	ldrh	w0, [x2, #:lo12:.LANCHOR111]
+	mov	w5, 0
+	ldrb	w4, [x24, #:lo12:.LANCHOR131]
+	ldr	x3, [x19, 24]
+	mul	w1, w1, w0
+	adrp	x0, .LANCHOR32
+	ldrb	w2, [x0, #:lo12:.LANCHOR32]
+	mov	w0, 24
+	orr	w1, w1, w27
+	str	w1, [x19, 40]
+	sub	w0, w0, w2
+	lsl	w6, w6, w2
+	ldr	x2, [x19, 8]
+	sub	w6, w6, #1
+	lsl	w7, w6, w0
+	lsr	w0, w1, w0
+	bic	w1, w1, w7
+	and	w0, w0, w6
+	bl	flash_prog_page_en
+	b	.L2894
+.L2897:
+	mov	x0, x19
+	bl	zbuf_free
+	adrp	x0, .LC170
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC170
+	bl	printf
+.L2875:
+	ldp	x19, x20, [sp, 64]
+	ldp	x21, x22, [sp, 80]
+	ldp	x23, x24, [sp, 96]
+	ldp	x25, x26, [sp, 112]
+	ldp	x27, x28, [sp, 128]
+	ldp	x29, x30, [sp, 48]
+	add	sp, sp, 224
+	ret
+	.size	ftl_dump_write_open_sblk, .-ftl_dump_write_open_sblk
+	.section	.text.flash_info_flush,"ax",@progbits
+	.align	2
+	.global	flash_info_flush
+	.type	flash_info_flush, %function
+flash_info_flush:
+	stp	x29, x30, [sp, -112]!
+	adrp	x0, .LANCHOR14
+	add	x29, sp, 0
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	tbz	x0, 12, .L2915
+	adrp	x2, .LANCHOR209
+	adrp	x0, .LC97
+	add	x2, x2, :lo12:.LANCHOR209
+	mov	w1, 364
+	add	x0, x0, :lo12:.LC97
+	bl	printf
+.L2915:
+	adrp	x23, .LANCHOR210
+	adrp	x20, .LANCHOR27
+	mov	w2, 64
+	mov	w1, 0
+	ldr	x0, [x23, #:lo12:.LANCHOR210]
+	adrp	x21, .LANCHOR211
+	adrp	x22, .LANCHOR2
+	adrp	x24, .LC172
+	adrp	x25, .LANCHOR147
+	add	x22, x22, :lo12:.LANCHOR2
+	add	x24, x24, :lo12:.LC172
+	add	x25, x25, :lo12:.LANCHOR147
+	bl	ftl_memset
+	add	x27, x21, :lo12:.LANCHOR211
+	ldr	x1, [x20, #:lo12:.LANCHOR27]
+	mov	w3, 16
+	mov	w2, 4
+	adrp	x0, .LC171
+	add	x0, x0, :lo12:.LC171
+	mov	w26, 0
+	bl	rknand_print_hex
+	ldr	x6, [x20, #:lo12:.LANCHOR27]
+	add	x0, x6, 16
+	ldr	w1, [x6, 8]
+	bl	js_hash
+	str	w0, [x6, 12]
+.L2916:
+	add	x28, x21, :lo12:.LANCHOR211
+	ldrb	w4, [x21, #:lo12:.LANCHOR211]
+	ldrh	w19, [x22]
+	mov	x0, x24
+	mov	w1, w4
+	ldrh	w3, [x28, 2]
+	stp	w3, w4, [x29, 104]
+	mov	w2, w3
+	bl	printf
+	ldrh	w0, [x25]
+	ldrh	w1, [x28, 2]
+	sub	w0, w0, #1
+	cmp	w1, w0
+	ldp	w3, w4, [x29, 104]
+	blt	.L2917
+	ldr	x6, [x20, #:lo12:.LANCHOR27]
+	ldrb	w7, [x28, 1]
+	strh	wzr, [x28, 2]
+	ldr	w0, [x6, 4]
+	ldrh	w1, [x6, 16]
+	add	w0, w0, 1
+	str	w0, [x6, 4]
+	ldrb	w0, [x21, #:lo12:.LANCHOR211]
+	add	w1, w1, 1
+	strb	w0, [x28, 1]
+	mov	x0, x6
+	strb	w7, [x21, #:lo12:.LANCHOR211]
+	strh	w1, [x0, 16]!
+	ldr	w1, [x6, 8]
+	bl	js_hash
+	ldrh	w19, [x22]
+	str	w0, [x6, 12]
+	mul	w19, w19, w7
+.L2926:
+	mov	w1, w19
+	mov	w0, 0
+	bl	flash_erase_block
+	b	.L2918
+.L2921:
+	mov	w26, 1
+	b	.L2916
+.L2917:
+	madd	w19, w19, w4, w3
+	cbz	w1, .L2926
+.L2918:
+	ldr	x2, [x20, #:lo12:.LANCHOR27]
+	mov	w1, w19
+	ldr	x3, [x23, #:lo12:.LANCHOR210]
+	mov	w5, 1
+	mov	w4, 4
+	ldr	w0, [x2, 4]
+	str	w0, [x3]
+	mov	w0, 21321
+	movk	w0, 0x5359, lsl 16
+	str	w0, [x3, 4]
+	mov	w0, 0
+	bl	flash_prog_page_en
+	cmn	w0, #1
+	ldrh	w1, [x27, 2]
+	add	w1, w1, 1
+	strh	w1, [x27, 2]
+	bne	.L2919
+	mov	w1, w19
+	adrp	x0, .LC173
+	add	x0, x0, :lo12:.LC173
+	bl	printf
+	b	.L2916
+.L2919:
+	cbz	w26, .L2921
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+	.size	flash_info_flush, .-flash_info_flush
+	.section	.text.flash_info_blk_init,"ax",@progbits
+	.align	2
+	.global	flash_info_blk_init
+	.type	flash_info_blk_init, %function
+flash_info_blk_init:
+	stp	x29, x30, [sp, -96]!
+	adrp	x0, .LANCHOR14
+	add	x29, sp, 0
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR27
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	str	x27, [sp, 80]
+	tbz	x0, 12, .L2928
+	ldr	x4, [x20, #:lo12:.LANCHOR27]
+	adrp	x2, .LANCHOR212
+	adrp	x0, .LC174
+	mov	w3, 2048
+	add	x2, x2, :lo12:.LANCHOR212
+	mov	w1, 49
+	add	x0, x0, :lo12:.LC174
+	bl	printf
+.L2928:
+	adrp	x24, .LANCHOR2
+	mov	w23, 21321
+	add	x26, x24, :lo12:.LANCHOR2
+	mov	w22, 4
+	adrp	x21, .LANCHOR210
+	movk	w23, 0x5359, lsl 16
+.L2932:
+	mov	w19, 0
+.L2931:
+	ldrh	w1, [x26]
+	mov	w4, 4
+	ldr	x3, [x21, #:lo12:.LANCHOR210]
+	mov	w0, 0
+	ldr	x2, [x20, #:lo12:.LANCHOR27]
+	add	x27, x21, :lo12:.LANCHOR210
+	add	x25, x20, :lo12:.LANCHOR27
+	madd	w1, w1, w22, w19
+	bl	flash_read_page_en
+	cmn	w0, #1
+	beq	.L2929
+	ldr	x2, [x20, #:lo12:.LANCHOR27]
+	ldr	w0, [x2]
+	cmp	w0, w23
+	beq	.L2930
+.L2929:
+	add	w19, w19, 1
+	cmp	w19, 4
+	bne	.L2931
+	add	w22, w22, 1
+	cmp	w22, 16
+	bne	.L2932
+.L2958:
+	mov	w0, -1
+.L2927:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	ret
+.L2940:
+	ldr	x0, [x25]
+	ldr	w1, [x0]
+	cmp	w1, w23
+	bne	.L2941
+	ldr	w22, [x0, 4]
+.L2934:
+	add	x23, x19, :lo12:.LANCHOR211
+	ldrh	w0, [x24, #:lo12:.LANCHOR2]
+	ldr	x3, [x21, #:lo12:.LANCHOR210]
+	mov	w4, 4
+	ldr	x2, [x20, #:lo12:.LANCHOR27]
+	ldrb	w1, [x23, 1]
+	mul	w1, w1, w0
+	mov	w0, 0
+	bl	flash_read_page_en
+	cmn	w0, #1
+	beq	.L2935
+	ldr	x0, [x20, #:lo12:.LANCHOR27]
+	mov	w1, 21321
+	movk	w1, 0x5359, lsl 16
+	ldr	w2, [x0]
+	cmp	w2, w1
+	bne	.L2935
+	ldr	w1, [x0, 4]
+	cmp	w22, w1
+	bcs	.L2935
+	ldrb	w1, [x0, 37]
+	ldrb	w0, [x0, 36]
+	strb	w1, [x19, #:lo12:.LANCHOR211]
+	strb	w0, [x23, 1]
+.L2935:
+	ldrb	w1, [x19, #:lo12:.LANCHOR211]
+	add	x22, x19, :lo12:.LANCHOR211
+	ldr	x3, [x21, #:lo12:.LANCHOR210]
+	mov	w4, 4
+	ldr	x2, [x20, #:lo12:.LANCHOR27]
+	mov	w0, 0
+	bl	flash_get_last_written_page
+	and	w25, w0, 65535
+	add	w1, w25, 1
+	ldrb	w23, [x19, #:lo12:.LANCHOR211]
+	strh	w1, [x22, 2]
+	mov	w22, 0
+	ldrh	w1, [x24, #:lo12:.LANCHOR2]
+	mov	w24, 21321
+	movk	w24, 0x5359, lsl 16
+	mul	w23, w23, w1
+	add	w23, w23, w0, sxth
+.L2936:
+	sub	w0, w25, w22
+	sxth	w19, w0
+	tbz	w19, #31, .L2939
+	cmn	w19, #1
+	bne	.L2938
+	ldr	x0, [x20, #:lo12:.LANCHOR27]
+	ldr	w1, [x0]
+	adrp	x0, .LC175
+	add	x0, x0, :lo12:.LC175
+	bl	printf
+	b	.L2958
+.L2939:
+	ldr	x3, [x21, #:lo12:.LANCHOR210]
+	mov	w4, 4
+	ldr	x2, [x20, #:lo12:.LANCHOR27]
+	sub	w1, w23, w22
+	mov	w0, 0
+	bl	flash_read_page_en
+	cmn	w0, #1
+	beq	.L2937
+	ldr	x0, [x20, #:lo12:.LANCHOR27]
+	ldr	w0, [x0]
+	cmp	w0, w24
+	beq	.L2938
+.L2937:
+	add	w22, w22, 1
+	b	.L2936
+.L2938:
+	cmp	w22, 1
+	bls	.L2942
+	bl	flash_info_flush
+.L2942:
+	mov	w0, 0
+	b	.L2927
+.L2930:
+	adrp	x19, .LANCHOR211
+	add	x1, x19, :lo12:.LANCHOR211
+	ldrb	w3, [x2, 37]
+	mov	w4, 4
+	ldrb	w0, [x2, 36]
+	strb	w3, [x1, 1]
+	ldrh	w1, [x26]
+	ldr	x3, [x27]
+	strb	w0, [x19, #:lo12:.LANCHOR211]
+	mul	w1, w1, w0
+	mov	w0, 0
+	bl	flash_read_page_en
+	cmn	w0, #1
+	bne	.L2940
+.L2941:
+	mov	w22, 0
+	b	.L2934
+	.size	flash_info_blk_init, .-flash_info_blk_init
+	.section	.text.nand_flash_init,"ax",@progbits
+	.align	2
+	.global	nand_flash_init
+	.type	nand_flash_init, %function
+nand_flash_init:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR14
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	str	x27, [sp, 80]
+	tbz	x0, 12, .L2960
+	adrp	x2, .LANCHOR213
+	adrp	x0, .LC97
+	add	x2, x2, :lo12:.LANCHOR213
+	mov	w1, 3407
+	add	x0, x0, :lo12:.LC97
+	bl	printf
+.L2960:
+	adrp	x0, .LANCHOR172
+	adrp	x24, .LANCHOR16
+	adrp	x22, .LANCHOR48
+	add	x25, x22, :lo12:.LANCHOR48
+	str	wzr, [x0, #:lo12:.LANCHOR172]
+	mov	x0, x19
+	bl	nandc_init
+	adrp	x19, .LANCHOR33
+	add	x0, x19, :lo12:.LANCHOR33
+	str	x0, [x24, #:lo12:.LANCHOR16]
+	adrp	x0, .LANCHOR18
+	adrp	x23, .LANCHOR32
+	mov	x26, x25
+	mov	w1, 1
+	mov	w20, 0
+	strb	w1, [x0, #:lo12:.LANCHOR18]
+	mov	w27, 44
+	mov	w0, 3
+	mov	w2, 8
+	strb	w0, [x23, #:lo12:.LANCHOR32]
+	mov	w1, 0
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
+	bl	ftl_memset
+	mov	w2, 32
+	mov	w1, 0
+	adrp	x0, .LANCHOR148
+	add	x0, x0, :lo12:.LANCHOR148
+	bl	ftl_memset
+.L2966:
+	mov	x1, x25
+	mov	w0, w20
+	bl	flash_read_id
+	cbnz	w20, .L2961
+	ldrb	w0, [x26]
+	sub	w0, w0, #1
+	and	w0, w0, 255
+	cmp	w0, 253
+	bls	.L2962
+.L2964:
+	mov	w8, -2
+.L2959:
+	mov	w0, w8
+	ldr	x27, [sp, 80]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	ret
+.L2962:
+	ldrb	w0, [x26, 1]
+	cmp	w0, 255
+	beq	.L2964
+.L2961:
+	ldrb	w0, [x25]
+	cmp	w0, 181
+	bne	.L2965
+	strb	w27, [x25]
+.L2965:
+	add	w20, w20, 1
+	add	x25, x25, 8
+	and	w20, w20, 255
+	cmp	w20, 4
+	bne	.L2966
+	adrp	x0, .LANCHOR214
+	add	x8, x0, :lo12:.LANCHOR214
+	add	x8, x8, 1
+	mov	x7, x0
+	add	x12, x22, :lo12:.LANCHOR48
+	mov	x10, 0
+.L2969:
+	ldrb	w2, [x8, -1]
+	mov	w11, w10
+	lsl	x25, x10, 5
+	mov	x1, x12
+	mov	x0, x8
+	bl	flash_mem_cmp8
+	cbnz	w0, .L2967
+	add	x0, x7, :lo12:.LANCHOR214
+	ubfiz	x11, x11, 5, 32
+	add	x25, x0, x25
+	add	x0, x0, x11
+	adrp	x1, .LANCHOR215
+	add	x4, x1, :lo12:.LANCHOR215
+	ldrb	w3, [x0, 22]
+	mov	x0, 0
+.L2968:
+	lsl	x5, x0, 5
+	mov	w2, w0
+	ldrb	w5, [x5, x4]
+	cmp	w5, w3
+	beq	.L2970
+	add	x0, x0, 1
+	cmp	x0, 4
+	bne	.L2968
+	mov	w2, w0
+.L2970:
+	ubfiz	x0, x2, 5, 32
+	add	x1, x1, :lo12:.LANCHOR215
+	add	x1, x1, x0
+	mov	w2, 32
+	adrp	x0, .LANCHOR20
+	add	x20, x19, :lo12:.LANCHOR33
+	add	x0, x0, :lo12:.LANCHOR20
+	adrp	x26, .LANCHOR28
+	bl	ftl_memcpy
+	mov	w2, 32
+	mov	x1, x25
+	mov	x0, x20
+	bl	ftl_memcpy
+	ldrb	w0, [x26, #:lo12:.LANCHOR28]
+	cmp	w0, 8
+	bhi	.L2971
+	ldrb	w0, [x20, 20]
+	cmp	w0, 60
+	bls	.L2971
+	mov	w0, 60
+	strb	w0, [x20, 20]
+.L2971:
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L3001
+	adrp	x2, .LANCHOR213
+	adrp	x0, .LC97
+	add	x2, x2, :lo12:.LANCHOR213
+	mov	w1, 3434
+	add	x0, x0, :lo12:.LC97
+	bl	printf
+.L3001:
+	ldr	x0, [x24, #:lo12:.LANCHOR16]
+	ldrh	w0, [x0, 10]
+	cmp	w0, 1023
+	bls	.L2972
+	mov	w0, 2
+	strb	w0, [x23, #:lo12:.LANCHOR32]
+.L2972:
+	mov	w0, 16384
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR176
+	adrp	x23, .LANCHOR27
+	add	x20, x19, :lo12:.LANCHOR33
+	adrp	x25, .LANCHOR49
+	str	x0, [x1, #:lo12:.LANCHOR176]
+	mov	w0, 16384
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR166
+	str	x0, [x1, #:lo12:.LANCHOR166]
+	mov	w0, 2048
+	bl	ftl_malloc
+	str	x0, [x23, #:lo12:.LANCHOR27]
+	mov	w0, 64
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR175
+	str	x0, [x1, #:lo12:.LANCHOR175]
+	mov	w0, 64
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR168
+	str	x0, [x1, #:lo12:.LANCHOR168]
+	mov	w0, 64
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR210
+	str	x0, [x1, #:lo12:.LANCHOR210]
+	adrp	x0, .LANCHOR216
+	strb	wzr, [x0, #:lo12:.LANCHOR216]
+	bl	flash_die_info_init
+	ldrb	w0, [x20, 18]
+	bl	flash_lsb_page_tbl_build
+	ldrb	w0, [x20, 20]
+	adrp	x20, .LANCHOR174
+	bl	nandc_bch_sel
+	str	xzr, [x20, #:lo12:.LANCHOR174]
+	ldr	x2, [x24, #:lo12:.LANCHOR16]
+	ldrh	w0, [x2, 16]
+	ubfx	x1, x0, 8, 3
+	strb	w1, [x25, #:lo12:.LANCHOR49]
+	adrp	x1, .LANCHOR186
+	ubfx	x3, x0, 3, 1
+	strb	w3, [x1, #:lo12:.LANCHOR186]
+	adrp	x1, .LANCHOR45
+	ubfx	x3, x0, 4, 1
+	strb	w3, [x1, #:lo12:.LANCHOR45]
+	adrp	x1, .LANCHOR84
+	ubfx	x3, x0, 12, 1
+	strb	w3, [x1, #:lo12:.LANCHOR84]
+	adrp	x1, .LANCHOR81
+	ubfx	x3, x0, 13, 1
+	strb	w3, [x1, #:lo12:.LANCHOR81]
+	adrp	x1, .LANCHOR36
+	ubfx	x3, x0, 11, 1
+	strb	w3, [x1, #:lo12:.LANCHOR36]
+	adrp	x3, .LANCHOR124
+	ldrb	w1, [x2, 31]
+	ldrb	w2, [x2, 28]
+	ubfx	x4, x1, 1, 1
+	strb	w4, [x3, #:lo12:.LANCHOR124]
+	adrp	x3, .LANCHOR217
+	ubfx	x4, x1, 2, 1
+	strb	w4, [x3, #:lo12:.LANCHOR217]
+	adrp	x3, .LANCHOR1
+	ubfx	x4, x0, 14, 1
+	lsr	w0, w0, 15
+	strb	w4, [x3, #:lo12:.LANCHOR1]
+	adrp	x3, .LANCHOR82
+	strb	w0, [x3, #:lo12:.LANCHOR82]
+	adrp	x0, .LANCHOR0
+	ubfx	x3, x1, 3, 1
+	ubfx	x1, x1, 4, 1
+	strb	w2, [x0, #:lo12:.LANCHOR0]
+	adrp	x0, .LANCHOR31
+	strb	w3, [x0, #:lo12:.LANCHOR31]
+	adrp	x0, .LANCHOR37
+	strb	w1, [x0, #:lo12:.LANCHOR37]
+	adrp	x1, .LANCHOR17
+	mov	w0, 60
+	strb	w0, [x1, #:lo12:.LANCHOR17]
+	ldrb	w0, [x26, #:lo12:.LANCHOR28]
+	cmp	w0, 9
+	bne	.L2973
+	mov	w3, 70
+	strb	w3, [x1, #:lo12:.LANCHOR17]
+.L2973:
+	add	x1, x19, :lo12:.LANCHOR33
+	adrp	x24, .LANCHOR19
+	strb	w2, [x24, #:lo12:.LANCHOR19]
+	ldrb	w2, [x1, 31]
+	tbz	x2, 0, .L2974
+	ldrb	w1, [x1, 29]
+	cbz	w1, .L2975
+	mov	w1, 2
+.L3033:
+	strb	w1, [x24, #:lo12:.LANCHOR19]
+.L2974:
+	cmp	w0, 8
+	bne	.L2976
+	ldrb	w0, [x22, #:lo12:.LANCHOR48]
+	mov	w1, 137
+	cmp	w0, 44
+	ccmp	w0, w1, 4, ne
+	bne	.L2976
+	add	x0, x19, :lo12:.LANCHOR33
+	ldrb	w0, [x0, 28]
+	cmp	w0, 3
+	bne	.L2976
+	strb	wzr, [x24, #:lo12:.LANCHOR19]
+.L2976:
+	add	x1, x19, :lo12:.LANCHOR33
+	adrp	x27, .LANCHOR24
+	ldrb	w0, [x1, 19]
+	ldrh	w1, [x1, 16]
+	strb	w0, [x27, #:lo12:.LANCHOR24]
+	tbz	x1, 6, .L2978
+	sub	w1, w0, #17
+	and	w1, w1, 255
+	cmp	w1, 2
+	ccmp	w0, 21, 4, hi
+	bne	.L2979
+	adrp	x1, micron_read_retrial
+	add	x1, x1, :lo12:micron_read_retrial
+	str	x1, [x20, #:lo12:.LANCHOR174]
+	cmp	w0, 21
+	adrp	x0, .LANCHOR169
+	beq	.L2980
+	mov	w1, 15
+.L3035:
+	strb	w1, [x0, #:lo12:.LANCHOR169]
+.L2978:
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2989
+	adrp	x2, .LANCHOR213
+	adrp	x0, .LC97
+	add	x2, x2, :lo12:.LANCHOR213
+	mov	w1, 3527
+	add	x0, x0, :lo12:.LC97
+	bl	printf
+.L2989:
+	adrp	x26, .LANCHOR21
+	ldrb	w0, [x25, #:lo12:.LANCHOR49]
+	strb	wzr, [x26, #:lo12:.LANCHOR21]
+	tbz	x0, 0, .L2990
+	ldrb	w0, [x22, #:lo12:.LANCHOR48]
+	cmp	w0, 155
+	beq	.L2991
+	mov	w0, 4
+	bl	flash_set_interface_mode
+	mov	w0, 4
+	bl	nandc_set_if_mode
+.L2991:
+	mov	w0, 1
+	bl	flash_set_interface_mode
+	mov	w0, 1
+.L3037:
+	bl	nandc_set_if_mode
+	bl	flash_info_blk_init
+	mov	w8, w0
+	cmn	w0, #1
+	bne	.L2993
+	ldr	x0, [x23, #:lo12:.LANCHOR27]
+	mov	w1, 17
+	strb	w1, [x0, 32]
+	adrp	x0, .LANCHOR34
+	strb	wzr, [x0, #:lo12:.LANCHOR34]
+	mov	w0, 0
+	bl	zftl_flash_exit_slc_mode
+	b	.L2959
+.L2967:
+	add	x10, x10, 1
+	add	x8, x8, 32
+	cmp	x10, 49
+	bne	.L2969
+	b	.L2964
+.L2975:
+	mov	w1, 3
+	b	.L3033
+.L2980:
+	mov	w1, 4
+	b	.L3035
+.L2979:
+	sub	w1, w0, #65
+	cmp	w0, 33
+	and	w1, w1, 255
+	ccmp	w1, 1, 0, ne
+	bhi	.L2982
+	adrp	x0, toshiba_read_retrial
+	add	x0, x0, :lo12:toshiba_read_retrial
+	str	x0, [x20, #:lo12:.LANCHOR174]
+	adrp	x0, .LANCHOR26
+	mov	w1, 4
+	strb	w1, [x0, #:lo12:.LANCHOR26]
+.L3039:
+	mov	w1, 7
+.L3038:
+	adrp	x0, .LANCHOR169
+	b	.L3035
+.L2982:
+	sub	w2, w0, #34
+	sub	w1, w0, #67
+	and	w2, w2, 255
+	and	w1, w1, 255
+	cmp	w2, 1
+	ccmp	w1, 1, 0, hi
+	bhi	.L2983
+	adrp	x2, toshiba_read_retrial
+	add	x2, x2, :lo12:toshiba_read_retrial
+	str	x2, [x20, #:lo12:.LANCHOR174]
+	cmp	w0, 35
+	mov	w2, 68
+	ccmp	w0, w2, 4, ne
+	adrp	x0, .LANCHOR169
+	beq	.L2984
+	mov	w2, 7
+.L3034:
+	strb	w2, [x0, #:lo12:.LANCHOR169]
+	cmp	w1, 1
+	adrp	x0, .LANCHOR26
+	bhi	.L2986
+	mov	w1, 4
+.L3036:
+	strb	w1, [x0, #:lo12:.LANCHOR26]
+	b	.L2978
+.L2984:
+	mov	w2, 17
+	b	.L3034
+.L2986:
+	mov	w1, 5
+	b	.L3036
+.L2983:
+	sub	w1, w0, #36
+	and	w1, w1, 255
+	cmp	w1, 1
+	bhi	.L2987
+	adrp	x0, toshiba_3d_read_retrial
+	add	x0, x0, :lo12:toshiba_3d_read_retrial
+	str	x0, [x20, #:lo12:.LANCHOR174]
+	b	.L3039
+.L2987:
+	cmp	w0, 50
+	bne	.L2988
+	adrp	x0, samsung_read_retrial
+	mov	w1, 25
+	add	x0, x0, :lo12:samsung_read_retrial
+	str	x0, [x20, #:lo12:.LANCHOR174]
+	b	.L3038
+.L2988:
+	cmp	w0, 81
+	bne	.L2978
+	adrp	x0, ymtc_3d_read_retrial
+	add	x0, x0, :lo12:ymtc_3d_read_retrial
+	str	x0, [x20, #:lo12:.LANCHOR174]
+	adrp	x0, .LANCHOR169
+	mov	w1, 7
+	strb	w1, [x0, #:lo12:.LANCHOR169]
+	adrp	x0, .LANCHOR51
+	strb	wzr, [x0, #:lo12:.LANCHOR51]
+	b	.L2978
+.L2990:
+	mov	w0, 4
+	b	.L3037
+.L2993:
+	add	x19, x19, :lo12:.LANCHOR33
+	ldrb	w0, [x19, 7]
+	cmp	w0, 9
+	bne	.L2994
+	ldr	x0, [x23, #:lo12:.LANCHOR27]
+	ldrb	w0, [x0, 20]
+	cmp	w0, 1
+	beq	.L2994
+	strb	wzr, [x24, #:lo12:.LANCHOR19]
+.L2994:
+	ldrb	w0, [x27, #:lo12:.LANCHOR24]
+	sub	w0, w0, #1
+	and	w0, w0, 255
+	cmp	w0, 7
+	bhi	.L2995
+	adrp	x0, hynix_read_retrial
+	add	x0, x0, :lo12:hynix_read_retrial
+	str	x0, [x20, #:lo12:.LANCHOR174]
+.L2995:
+	ldrb	w0, [x25, #:lo12:.LANCHOR49]
+	tbz	x0, 2, .L2997
+	ldr	x0, [x23, #:lo12:.LANCHOR27]
+	ldrb	w0, [x0, 19]
+	cbz	w0, .L2997
+	adrp	x0, .LANCHOR211
+	ldrb	w1, [x0, #:lo12:.LANCHOR211]
+	adrp	x0, .LANCHOR2
+	ldrh	w0, [x0, #:lo12:.LANCHOR2]
+	mul	w1, w1, w0
+	mov	w0, 0
+	bl	flash_ddr_para_scan
+	ldrb	w0, [x26, #:lo12:.LANCHOR21]
+	cbnz	w0, .L2997
+	ldr	x0, [x23, #:lo12:.LANCHOR27]
+	strb	wzr, [x0, 19]
+	bl	flash_info_flush
+.L2997:
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2999
+	adrp	x2, .LANCHOR213
+	adrp	x0, .LC97
+	add	x2, x2, :lo12:.LANCHOR213
+	mov	w1, 3625
+	add	x0, x0, :lo12:.LC97
+	bl	printf
+.L2999:
+	bl	nand_flash_print_info
+	mov	w8, 0
+	b	.L2959
+	.size	nand_flash_init, .-nand_flash_init
+	.section	.text.ftl_sysblk_dump,"ax",@progbits
+	.align	2
+	.global	ftl_sysblk_dump
+	.type	ftl_sysblk_dump, %function
+ftl_sysblk_dump:
+	sub	sp, sp, #144
+	stp	x29, x30, [sp, 48]
+	add	x29, sp, 48
+	stp	x19, x20, [sp, 64]
+	mov	w20, 0
+	stp	x23, x24, [sp, 96]
+	and	w23, w0, 65535
+	stp	x25, x26, [sp, 112]
+	mov	w0, 1
+	stp	x27, x28, [sp, 128]
+	adrp	x25, .LANCHOR95
+	stp	x21, x22, [sp, 80]
+	bl	buf_alloc
+	ldr	x28, [x0, 8]
+	adrp	x26, .LANCHOR111
+	adrp	x27, .LANCHOR131
+	mov	x24, x0
+	add	x25, x25, :lo12:.LANCHOR95
+	add	x26, x26, :lo12:.LANCHOR111
+	add	x27, x27, :lo12:.LANCHOR131
+	mov	w19, 0
+.L3041:
+	ldrh	w0, [x25]
+	cmp	w0, w19
+	bhi	.L3043
+	add	x1, x28, 704
+	mov	w3, 32
+	mov	w2, 4
+	adrp	x0, .LC176
+	add	x0, x0, :lo12:.LC176
+	bl	rknand_print_hex
+	mov	x0, x24
+	bl	zbuf_free
+	cbz	w20, .L3044
+	adrp	x1, .LANCHOR218
+	adrp	x0, .LC0
+	mov	w2, 1611
+	add	x1, x1, :lo12:.LANCHOR218
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L3044:
+	mov	w0, w20
+	ldp	x19, x20, [sp, 64]
+	ldp	x21, x22, [sp, 80]
+	ldp	x23, x24, [sp, 96]
+	ldp	x25, x26, [sp, 112]
+	ldp	x27, x28, [sp, 128]
+	ldp	x29, x30, [sp, 48]
+	add	sp, sp, 144
+	ret
+.L3043:
+	ldrh	w21, [x26]
+	ldrb	w3, [x27]
+	ldr	x1, [x24, 8]
+	ldr	x2, [x24, 24]
+	madd	w21, w21, w23, w19
+	mov	w0, w21
+	bl	ftl_read_ppa_page
+	mov	w22, w0
+	ldr	x1, [x24, 24]
+	mov	w4, w0
+	ldr	x0, [x24, 8]
+	mov	w3, w21
+	ldr	w2, [x1, 12]
+	str	w2, [sp, 32]
+	ldr	w2, [x1, 8]
+	str	w2, [sp, 24]
+	ldr	w2, [x1, 4]
+	str	w2, [sp, 16]
+	mov	w2, w19
+	add	w19, w19, 1
+	ldr	w1, [x1]
+	and	w19, w19, 65535
+	str	w1, [sp, 8]
+	ldr	w1, [x0, 12]
+	str	w1, [sp]
+	mov	w1, w23
+	ldp	w5, w6, [x0]
+	ldr	w7, [x0, 8]
+	adrp	x0, .LC167
+	add	x0, x0, :lo12:.LC167
+	bl	printf
+	cmp	w22, 512
+	ccmn	w22, #1, 4, ne
+	csinc	w20, w20, wzr, ne
+	b	.L3041
+	.size	ftl_sysblk_dump, .-ftl_sysblk_dump
+	.section	.text.ftl_open_sblk_recovery,"ax",@progbits
+	.align	2
+	.global	ftl_open_sblk_recovery
+	.type	ftl_open_sblk_recovery, %function
+ftl_open_sblk_recovery:
+	stp	x29, x30, [sp, -368]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR14
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	str	x1, [x29, 136]
+	tbz	x0, 12, .L3052
+	ldrh	w1, [x19, 2]
+	adrp	x0, .LC177
+	add	x0, x0, :lo12:.LC177
+	bl	printf
+.L3052:
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L3053
+	ldrb	w1, [x19, 5]
+	adrp	x0, .LC178
+	add	x0, x0, :lo12:.LC178
+	bl	printf
+.L3053:
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L3054
+	ldrh	w1, [x19]
+	adrp	x0, .LC179
+	add	x0, x0, :lo12:.LC179
+	bl	printf
+.L3054:
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L3055
+	ldrh	w2, [x19, 18]
+	adrp	x0, .LC180
+	ldrh	w1, [x19, 16]
+	add	x0, x0, :lo12:.LC180
+	bl	printf
+.L3055:
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L3056
+	ldrb	w1, [x19, 9]
+	adrp	x0, .LC181
+	add	x0, x0, :lo12:.LC181
+	bl	printf
+.L3056:
+	ldrh	w0, [x19, 10]
+	strh	w0, [x19, 14]
+	adrp	x0, .LANCHOR6
+	ldrh	w1, [x19]
+	ldrh	w0, [x0, #:lo12:.LANCHOR6]
+	cmp	w1, w0
+	bcs	.L3051
+	mov	w0, 1
+	adrp	x22, .LANCHOR131
+	bl	buf_alloc
+	mov	x20, x0
+	ldrb	w0, [x22, #:lo12:.LANCHOR131]
+	add	x26, x29, 176
+	mov	w2, 64
+	mov	w27, 2
+	ldr	x1, [x20, 8]
+	sub	w0, w0, #2
+	lsl	w0, w0, 7
+	add	x0, x1, x0, sxtw 2
+	mov	w1, 255
+	str	x0, [x29, 144]
+	mov	x0, x26
+	bl	ftl_memset
+	mov	w2, 64
+	mov	w1, 255
+	add	x0, x29, 240
+	bl	ftl_memset
+	mov	w2, 64
+	mov	w1, 255
+	add	x0, x29, 304
+	bl	ftl_memset
+	ldrb	w23, [x19, 5]
+	adrp	x0, .LANCHOR111
+	ldrh	w24, [x19, 2]
+	add	x0, x0, :lo12:.LANCHOR111
+	str	wzr, [x29, 156]
+	str	x0, [x29, 120]
+.L3058:
+	adrp	x25, .LANCHOR95
+	ldrh	w0, [x25, #:lo12:.LANCHOR95]
+	cmp	w0, w24
+	bhi	.L3073
+.L3061:
+	ldrh	w0, [x19, 10]
+	ldrh	w1, [x19, 6]
+	ldrh	w2, [x25, #:lo12:.LANCHOR95]
+	add	w1, w1, w0
+	ldrb	w0, [x19, 9]
+	strh	w24, [x19, 2]
+	strb	w23, [x19, 5]
+	mul	w0, w0, w2
+	cmp	w1, w0
+	beq	.L3074
+	adrp	x1, .LANCHOR219
+	adrp	x0, .LC0
+	mov	w2, 1794
+	add	x1, x1, :lo12:.LANCHOR219
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L3074:
+	adrp	x2, .LANCHOR117
+	ldrh	w3, [x19, 10]
+	mov	w0, 0
+	mov	w1, 0
+	ldr	x4, [x2, #:lo12:.LANCHOR117]
+	str	x2, [x29, 144]
+.L3075:
+	cmp	w1, w3
+	bcc	.L3077
+	ldrb	w23, [x19, 9]
+	adrp	x24, .LANCHOR9
+	ldrh	w1, [x25, #:lo12:.LANCHOR95]
+	madd	w23, w23, w1, w0
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	sub	w23, w23, w3
+	and	w23, w23, 65535
+	tbz	x0, 12, .L3078
+	ldrh	w1, [x19]
+	ldr	x2, [x24, #:lo12:.LANCHOR9]
+	ubfiz	x0, x1, 1, 16
+	ldrh	w3, [x2, x0]
+	adrp	x0, .LC184
+	mov	w2, w23
+	add	x0, x0, :lo12:.LC184
+	bl	printf
+.L3078:
+	ldr	x0, [x24, #:lo12:.LANCHOR9]
+	ldrh	w1, [x19]
+	strh	w23, [x0, x1, lsl 1]
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 14, .L3079
+	ldp	w1, w2, [x29, 176]
+	adrp	x0, .LC185
+	ldp	w3, w4, [x29, 184]
+	add	x0, x0, :lo12:.LC185
+	bl	printf
+.L3079:
+	ldr	x0, [x20, 8]
+	mov	w1, 0
+	ldrb	w2, [x22, #:lo12:.LANCHOR131]
+	adrp	x28, .LANCHOR80
+	mov	x24, 0
+	lsl	w2, w2, 9
+	bl	ftl_memset
+	adrp	x0, .LC187
+	add	x0, x0, :lo12:.LC187
+	str	x0, [x29, 128]
+	add	x0, x28, :lo12:.LANCHOR80
+	str	x0, [x29, 120]
+.L3080:
+	ldrb	w0, [x28, #:lo12:.LANCHOR80]
+	add	x1, x28, :lo12:.LANCHOR80
+	str	w24, [x29, 168]
+	mul	w0, w0, w27
+	cmp	w24, w0
+	bcc	.L3092
+	adrp	x24, .LC188
+	adrp	x23, .LC187
+	add	x24, x24, :lo12:.LC188
+	add	x23, x23, :lo12:.LC187
+	mov	x28, 0
+	str	x1, [x29, 160]
+.L3093:
+	ldr	x0, [x29, 160]
+	ldrb	w0, [x0]
+	mul	w0, w0, w27
+	cmp	w0, w28
+	bhi	.L3099
+	mov	x0, x20
+	bl	zbuf_free
+	ldrh	w1, [x19, 12]
+	ldrh	w0, [x25, #:lo12:.LANCHOR95]
+	ldrb	w2, [x19, 9]
+	madd	w0, w0, w2, w1
+	mov	x1, -4
+	add	x0, x1, x0, sxtw 2
+	ldr	x1, [x29, 144]
+	ldr	x1, [x1, #:lo12:.LANCHOR117]
+	ldr	w0, [x1, x0]
+	cmn	w0, #1
+	beq	.L3100
+	adrp	x1, .LANCHOR219
+	adrp	x0, .LC0
+	mov	w2, 1909
+	add	x1, x1, :lo12:.LANCHOR219
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L3100:
+	ldrh	w0, [x19, 6]
+	cmp	w0, 1
+	bne	.L3051
+	mov	x0, x19
+	bl	ftl_write_last_log_page
+.L3051:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 368
+	ret
+.L3073:
+	ldrb	w23, [x19, 5]
+	adrp	x0, .LANCHOR198
+	add	x0, x0, :lo12:.LANCHOR198
+	str	x0, [x29, 128]
+.L3059:
+	ldrb	w0, [x19, 9]
+	cmp	w0, w23
+	bhi	.L3072
+	add	w24, w24, 1
+	strb	wzr, [x19, 5]
+	and	w24, w24, 65535
+	b	.L3058
+.L3072:
+	add	x0, x19, x23, sxtw 1
+	ldrh	w0, [x0, 16]
+	str	w0, [x29, 168]
+	mov	w0, 65535
+	ldr	w1, [x29, 168]
+	cmp	w1, w0
+	beq	.L3060
+	ldr	x0, [x29, 120]
+	ldrb	w3, [x22, #:lo12:.LANCHOR131]
+	ldr	x2, [x20, 24]
+	ldrh	w0, [x0]
+	madd	w0, w0, w1, w24
+	ldr	x1, [x20, 8]
+	str	w0, [x29, 160]
+	bl	ftl_read_ppa_page
+	mov	w28, w0
+	cmp	w0, 512
+	beq	.L3061
+	cmn	w0, #1
+	beq	.L3062
+	ldr	x0, [x20, 24]
+	ldr	w1, [x0]
+	cmn	w1, #1
+	bne	.L3062
+	ldr	w0, [x0, 4]
+	cmn	w0, #1
+	bne	.L3062
+	ldr	x0, [x20, 8]
+	ldr	w0, [x0]
+	cmn	w0, #1
+	beq	.L3061
+.L3062:
+	ldr	x1, [x29, 128]
+	mov	w0, 1
+	strb	w0, [x1]
+	ldrb	w0, [x19, 9]
+	ldrh	w1, [x19, 10]
+	madd	w0, w0, w24, w23
+	cmp	w1, w0
+	beq	.L3063
+	adrp	x1, .LANCHOR219
+	adrp	x0, .LC0
+	mov	w2, 1686
+	add	x1, x1, :lo12:.LANCHOR219
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L3063:
+	ldrh	w0, [x19, 10]
+	ldrh	w1, [x19, 6]
+	ldrb	w2, [x19, 9]
+	add	w1, w1, w0
+	ldrh	w0, [x25, #:lo12:.LANCHOR95]
+	mul	w0, w0, w2
+	cmp	w1, w0
+	beq	.L3064
+	adrp	x1, .LANCHOR219
+	adrp	x0, .LC0
+	mov	w2, 1687
+	add	x1, x1, :lo12:.LANCHOR219
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L3064:
+	ldrb	w0, [x22, #:lo12:.LANCHOR131]
+	cmp	w0, 8
+	bls	.L3065
+	ldr	x6, [x20, 24]
+	mov	w1, 15555
+	movk	w1, 0xf55f, lsl 16
+	ldr	w0, [x6]
+	cmp	w0, w1
+	beq	.L3065
+	cmn	w28, #1
+	beq	.L3067
+	ldr	w0, [x6, 4]
+	cmn	w0, #1
+	beq	.L3068
+	ldr	w1, [x6, 16]
+	mov	w0, 21320
+	movk	w0, 0x4841, lsl 16
+	cmp	w1, w0
+	bne	.L3068
+	ldr	x0, [x29, 144]
+	mov	w1, 1024
+	bl	js_hash
+	ldr	w1, [x6, 20]
+	cmp	w1, w0
+	beq	.L3068
+	ldr	w3, [x29, 160]
+	mov	w5, w0
+	ldr	w1, [x29, 168]
+	mov	w4, w28
+	mov	w2, w24
+	adrp	x0, .LC182
+	add	x0, x0, :lo12:.LC182
+	bl	printf
+	ldr	x1, [x29, 144]
+	mov	w3, 16
+	mov	w2, 4
+	adrp	x0, .LC183
+	add	x0, x0, :lo12:.LC183
+	bl	rknand_print_hex
+	ldr	x1, [x20, 24]
+	adrp	x0, .LC150
+	ldrb	w3, [x22, #:lo12:.LANCHOR131]
+	mov	w2, 4
+	add	x0, x0, :lo12:.LC150
+	lsr	w3, w3, 1
+	bl	rknand_print_hex
+.L3067:
+	ldrh	w0, [x19, 6]
+	mov	w27, 4
+	sub	w0, w0, #1
+	strh	w0, [x19, 6]
+	ldrh	w0, [x19, 10]
+	add	w0, w0, 1
+	strh	w0, [x19, 10]
+	mov	w0, 1
+	str	w0, [x29, 156]
+.L3060:
+	add	w23, w23, 1
+	and	w23, w23, 65535
+	b	.L3059
+.L3065:
+	cmn	w28, #1
+	beq	.L3067
+.L3068:
+	ldr	x1, [x20, 24]
+	ldr	w0, [x1, 4]
+	cmn	w0, #1
+	beq	.L3067
+	ldr	w1, [x1]
+	mov	w2, 15555
+	movk	w2, 0xf55f, lsl 16
+	cmp	w1, w2
+	beq	.L3067
+	bl	lpa_hash_get_ppa
+	ldr	x1, [x29, 136]
+	cbz	x1, .L3070
+	ldr	x3, [x20, 24]
+	ldr	w1, [x3, 8]
+	cmp	w0, w1
+	beq	.L3070
+	cmn	w0, #1
+	beq	.L3070
+	adrp	x4, .LANCHOR32
+	adrp	x5, .LANCHOR75
+	mov	w28, 24
+	mov	w27, 1
+	ldrb	w1, [x4, #:lo12:.LANCHOR32]
+	ldrh	w6, [x5, #:lo12:.LANCHOR75]
+	sub	w1, w28, w1
+	sub	w1, w1, w6
+	lsr	w2, w0, w6
+	adrp	x6, .LANCHOR76
+	lsl	w1, w27, w1
+	sub	w1, w1, #1
+	and	w1, w1, w2
+	ldrb	w2, [x6, #:lo12:.LANCHOR76]
+	udiv	w1, w1, w2
+	ldr	x2, [x29, 136]
+	ldrh	w2, [x2]
+	cmp	w2, w1, uxth
+	bne	.L3070
+	ldr	w8, [x3]
+	adrp	x7, .LANCHOR193
+	ldrb	w3, [x22, #:lo12:.LANCHOR131]
+	add	x2, x7, :lo12:.LANCHOR193
+	ldr	x1, [x20, 8]
+	str	w8, [x29, 156]
+	str	x7, [x29, 168]
+	stp	x6, x4, [x29, 96]
+	str	x5, [x29, 112]
+	bl	ftl_read_ppa_page
+	ldr	x7, [x29, 168]
+	ldr	w8, [x29, 156]
+	ldr	w0, [x7, #:lo12:.LANCHOR193]
+	cmp	w8, w0
+	bhi	.L3070
+	ldr	x0, [x20, 24]
+	ldr	w0, [x0, 8]
+	cmn	w0, #1
+	beq	.L3067
+	ldp	x6, x4, [x29, 96]
+	ldr	x5, [x29, 112]
+	ldrb	w2, [x4, #:lo12:.LANCHOR32]
+	ldrh	w1, [x5, #:lo12:.LANCHOR75]
+	sub	w28, w28, w2
+	sub	w28, w28, w1
+	lsr	w0, w0, w1
+	lsl	w27, w27, w28
+	sub	w27, w27, #1
+	and	w27, w27, w0
+	ldrb	w0, [x6, #:lo12:.LANCHOR76]
+	udiv	w0, w27, w0
+	bl	ftl_vpn_decrement
+	b	.L3067
+.L3077:
+	ldrh	w2, [x19, 12]
+	add	w2, w2, w1
+	ldr	w2, [x4, x2, lsl 2]
+	cmn	w2, #1
+	beq	.L3076
+	add	w23, w0, 1
+	and	w0, w23, 65535
+.L3076:
+	add	w1, w1, 1
+	b	.L3075
+.L3092:
+	ldr	w0, [x26, x24, lsl 2]
+	cmn	w0, #1
+	bne	.L3081
+.L3085:
+	adrp	x0, .LANCHOR110
+	ldr	x1, [x20, 24]
+	mov	w23, -1
+	mov	x2, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR110]
+	ldr	w0, [x0, 8]
+	stp	w0, w23, [x1]
+	ldr	x0, [x20, 8]
+	stp	w23, wzr, [x1, 8]
+	str	wzr, [x1, 16]!
+	str	wzr, [x0]
+	mov	w0, 2
+	bl	ftl_debug_info_fill
+.L3082:
+	ldr	w0, [x29, 156]
+	cbz	w0, .L3087
+	ldrh	w0, [x19, 6]
+	cmp	w0, 1
+	bls	.L3087
+	add	x0, x21, :lo12:.LANCHOR14
+	str	x0, [x29, 160]
+	add	x0, x22, :lo12:.LANCHOR131
+	str	x0, [x29, 136]
+.L3152:
+	mov	x0, x19
+	bl	ftl_get_new_free_page
+	mov	w4, w0
+	ldr	x0, [x29, 160]
+	ldr	w0, [x0]
+	tbz	x0, 14, .L3089
+	ldrh	w0, [x19, 12]
+	mov	w1, w4
+	ldrh	w3, [x19, 10]
+	str	w4, [x29, 112]
+	add	w3, w3, w0
+	ldr	x0, [x20, 24]
+	sub	w3, w3, #1
+	ldr	w2, [x0, 4]
+	ldr	x0, [x29, 128]
+	bl	printf
+	ldr	w4, [x29, 112]
+.L3089:
+	ldr	x0, [x29, 120]
+	ldr	w2, [x29, 168]
+	ldrh	w1, [x19, 6]
+	ldrb	w0, [x0]
+	mul	w0, w0, w27
+	add	w0, w0, 1
+	sub	w0, w0, w2
+	cmp	w1, w0
+	bls	.L3087
+	ldr	x0, [x29, 136]
+	ldr	x1, [x20, 8]
+	ldr	x2, [x20, 24]
+	str	w4, [x29, 104]
+	ldrb	w3, [x0]
+	mov	w0, w4
+	bl	ftl_prog_ppa_page
+	mov	w1, w0
+	ldrh	w0, [x19]
+	str	w1, [x29, 112]
+	bl	ftl_vpn_decrement
+	ldr	w1, [x29, 112]
+	cmn	w23, #1
+	ldr	w4, [x29, 104]
+	ccmn	w1, #1, 4, ne
+	beq	.L3090
+	add	x0, x29, 240
+	ldrh	w1, [x19, 12]
+	str	w4, [x0, x24, lsl 2]
+	ldrh	w0, [x19, 10]
+	add	w0, w0, w1
+	add	x1, x29, 304
+	sub	w0, w0, #1
+	str	w0, [x1, x24, lsl 2]
+.L3087:
+	add	x24, x24, 1
+	b	.L3080
+.L3081:
+	ldrb	w3, [x22, #:lo12:.LANCHOR131]
+	ldr	x1, [x20, 8]
+	ldr	x2, [x20, 24]
+	bl	ftl_read_ppa_page
+	mov	w23, w0
+	ldr	x0, [x20, 24]
+	ldr	w0, [x0, 4]
+	bl	lpa_hash_get_ppa
+	mov	w4, w0
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 14, .L3083
+	ldr	x0, [x20, 24]
+	mov	w1, w4
+	ldr	w2, [x26, x24, lsl 2]
+	str	w4, [x29, 160]
+	ldr	w3, [x0, 4]
+	adrp	x0, .LC186
+	add	x0, x0, :lo12:.LC186
+	bl	printf
+	ldr	w4, [x29, 160]
+.L3083:
+	ldr	x1, [x20, 24]
+	mov	x2, 0
+	ldr	w0, [x26, x24, lsl 2]
+	cmp	w4, w0
+	mov	w0, 1
+	stp	w4, w0, [x1, 8]
+	csinv	w23, w23, wzr, eq
+	str	wzr, [x1, 16]!
+	mov	w0, 2
+	bl	ftl_debug_info_fill
+	cmn	w23, #1
+	bne	.L3082
+	b	.L3085
+.L3090:
+	ldrh	w0, [x19, 6]
+	cmp	w0, 1
+	bls	.L3087
+	cmn	w23, #1
+	bne	.L3152
+	b	.L3087
+.L3099:
+	add	x0, x29, 240
+	ldr	w0, [x0, x28, lsl 2]
+	cmn	w0, #1
+	beq	.L3095
+	ldrb	w3, [x22, #:lo12:.LANCHOR131]
+	ldr	w0, [x26, x28, lsl 2]
+	ldr	x1, [x20, 8]
+	ldr	x2, [x20, 24]
+	bl	ftl_read_ppa_page
+	cmp	w0, 256
+	ccmn	w0, #1, 4, ne
+	bne	.L3095
+	add	x0, x29, 240
+	ldrb	w3, [x22, #:lo12:.LANCHOR131]
+	ldr	x1, [x20, 8]
+	ldr	x2, [x20, 24]
+	ldr	w0, [x0, x28, lsl 2]
+	bl	ftl_read_ppa_page
+	mov	w5, w0
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 14, .L3097
+	ldr	x0, [x20, 24]
+	mov	w1, w5
+	ldr	w3, [x26, x28, lsl 2]
+	str	w5, [x29, 168]
+	ldr	w2, [x0, 8]
+	mov	x0, x23
+	bl	printf
+	ldr	w5, [x29, 168]
+.L3097:
+	cmn	w5, #1
+	beq	.L3095
+	ldr	x0, [x20, 24]
+	ldr	w2, [x26, x28, lsl 2]
+	ldr	w1, [x0, 8]
+	cmp	w2, w1
+	bne	.L3095
+	ldr	w1, [x21, #:lo12:.LANCHOR14]
+	tbz	x1, 14, .L3098
+	add	x1, x29, 304
+	ldr	w3, [x1, x28, lsl 2]
+	ldr	w1, [x0, 4]
+	mov	x0, x24
+	bl	printf
+.L3098:
+	add	x1, x29, 304
+	ldr	x0, [x20, 24]
+	ldr	w1, [x1, x28, lsl 2]
+	str	w1, [x29, 168]
+	ldr	w1, [x0, 8]
+	ldrh	w2, [x29, 168]
+	ldr	w0, [x0, 4]
+	bl	lpa_hash_update_ppa
+.L3095:
+	add	x28, x28, 1
+	b	.L3093
+.L3070:
+	ldr	x3, [x20, 24]
+	adrp	x0, .LANCHOR128
+	ldr	w0, [x0, #:lo12:.LANCHOR128]
+	ldr	w1, [x3, 4]
+	cmp	w1, w0
+	bcs	.L3067
+	ldrb	w0, [x19, 9]
+	ldrh	w1, [x25, #:lo12:.LANCHOR95]
+	ldrh	w2, [x19, 10]
+	mul	w0, w0, w1
+	sub	w0, w0, #1
+	cmp	w2, w0
+	bge	.L3067
+	adrp	x0, .LANCHOR110
+	ldr	w1, [x3]
+	ldr	x0, [x0, #:lo12:.LANCHOR110]
+	ldr	w4, [x0, 8]
+	cmp	w1, w4
+	bls	.L3071
+	str	w1, [x0, 8]
+.L3071:
+	ldrh	w0, [x19, 12]
+	add	w2, w2, w0
+	ldp	w0, w1, [x3, 4]
+	bl	lpa_hash_update_ppa
+	ldr	w0, [x29, 180]
+	str	w0, [x29, 176]
+	ldr	w0, [x29, 184]
+	str	w0, [x29, 180]
+	ldr	w0, [x29, 188]
+	str	w0, [x29, 184]
+	ldr	w0, [x29, 160]
+	str	w0, [x29, 188]
+	b	.L3067
+	.size	ftl_open_sblk_recovery, .-ftl_open_sblk_recovery
+	.section	.text.dump_ftl_info,"ax",@progbits
+	.align	2
+	.global	dump_ftl_info
+	.type	dump_ftl_info, %function
+dump_ftl_info:
+	stp	x29, x30, [sp, -48]!
+	adrp	x0, .LANCHOR58
+	add	x29, sp, 0
+	ldrb	w1, [x0, #:lo12:.LANCHOR58]
+	adrp	x0, .LC189
+	stp	x19, x20, [sp, 16]
+	add	x0, x0, :lo12:.LC189
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR110
+	adrp	x19, .LANCHOR10
+	adrp	x20, .LANCHOR95
+	bl	printf
+	adrp	x21, .LANCHOR6
+	adrp	x0, .LANCHOR194
+	add	x1, x0, :lo12:.LANCHOR194
+	ldrh	w3, [x1, 2]
+	ldrb	w2, [x1, 1]
+	ldrb	w1, [x0, #:lo12:.LANCHOR194]
+	adrp	x0, .LC190
+	add	x0, x0, :lo12:.LC190
+	bl	printf
+	ldr	x0, [x22, #:lo12:.LANCHOR110]
+	ldrh	w2, [x0, 140]
+	ldrh	w1, [x0, 130]
+	adrp	x0, .LC191
+	add	x0, x0, :lo12:.LC191
+	bl	printf
+	ldr	x1, [x19, #:lo12:.LANCHOR10]
+	adrp	x0, .LC192
+	add	x0, x0, :lo12:.LC192
+	ldrh	w5, [x1, 26]
+	ldrh	w4, [x1, 22]
+	ldrb	w3, [x1, 21]
+	ldrh	w2, [x1, 18]
+	ldrh	w1, [x1, 16]
+	bl	printf
+	ldr	x1, [x19, #:lo12:.LANCHOR10]
+	adrp	x0, .LC193
+	add	x0, x0, :lo12:.LC193
+	ldrh	w5, [x1, 58]
+	ldrh	w4, [x1, 54]
+	ldrb	w3, [x1, 53]
+	ldrh	w2, [x1, 50]
+	ldrh	w1, [x1, 48]
+	bl	printf
+	ldr	x1, [x19, #:lo12:.LANCHOR10]
+	adrp	x19, .LANCHOR80
+	adrp	x0, .LC194
+	add	x0, x0, :lo12:.LC194
+	ldrh	w5, [x1, 90]
+	ldrh	w4, [x1, 86]
+	ldrb	w3, [x1, 85]
+	ldrh	w2, [x1, 82]
+	ldrh	w1, [x1, 80]
+	bl	printf
+	ldrb	w0, [x19, #:lo12:.LANCHOR80]
+	mov	w2, 4
+	ldrh	w3, [x20, #:lo12:.LANCHOR95]
+	mul	w3, w3, w0
+	adrp	x0, .LANCHOR117
+	ldr	x1, [x0, #:lo12:.LANCHOR117]
+	adrp	x0, .LC195
+	lsl	w3, w3, 1
+	add	x0, x0, :lo12:.LC195
+	bl	rknand_print_hex
+	adrp	x0, .LANCHOR9
+	ldrh	w3, [x21, #:lo12:.LANCHOR6]
+	mov	w2, 2
+	ldr	x1, [x0, #:lo12:.LANCHOR9]
+	adrp	x0, .LC196
+	add	x0, x0, :lo12:.LC196
+	bl	rknand_print_hex
+	ldr	x1, [x22, #:lo12:.LANCHOR110]
+	mov	w2, 4
+	adrp	x0, .LC176
+	add	x0, x0, :lo12:.LC176
+	add	x1, x1, 704
+	ldrh	w3, [x1, -6]
+	bl	rknand_print_hex
+	adrp	x0, .LANCHOR7
+	ldrh	w3, [x21, #:lo12:.LANCHOR6]
+	mov	w2, 4
+	ldr	x1, [x0, #:lo12:.LANCHOR7]
+	adrp	x0, .LC197
+	add	x0, x0, :lo12:.LC197
+	bl	rknand_print_hex
+	mov	w3, 256
+	mov	w2, 2
+	adrp	x1, .LANCHOR116
+	adrp	x0, .LC198
+	add	x1, x1, :lo12:.LANCHOR116
+	add	x0, x0, :lo12:.LC198
+	bl	rknand_print_hex
+	ldrb	w0, [x19, #:lo12:.LANCHOR80]
+	mov	w2, 2
+	ldrh	w3, [x20, #:lo12:.LANCHOR95]
+	ldp	x21, x22, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	mul	w3, w3, w0
+	adrp	x0, .LANCHOR118
+	ldp	x29, x30, [sp], 48
+	lsl	w3, w3, 1
+	ldr	x1, [x0, #:lo12:.LANCHOR118]
+	adrp	x0, .LC199
+	add	x0, x0, :lo12:.LC199
+	b	rknand_print_hex
+	.size	dump_ftl_info, .-dump_ftl_info
+	.section	.text.pm_ppa_update_check,"ax",@progbits
+	.align	2
+	.global	pm_ppa_update_check
+	.type	pm_ppa_update_check, %function
+pm_ppa_update_check:
+	adrp	x4, .LANCHOR32
+	adrp	x3, .LANCHOR75
+	mov	w5, 24
+	ldrb	w4, [x4, #:lo12:.LANCHOR32]
+	ldrh	w3, [x3, #:lo12:.LANCHOR75]
+	sub	w4, w5, w4
+	sub	w5, w4, w3
+	mov	w4, 1
+	lsr	w3, w2, w3
+	lsl	w4, w4, w5
+	sub	w4, w4, #1
+	and	w4, w4, w3
+	adrp	x3, .LANCHOR76
+	ldrb	w3, [x3, #:lo12:.LANCHOR76]
+	udiv	w4, w4, w3
+	adrp	x3, .LANCHOR7
+	ldr	x3, [x3, #:lo12:.LANCHOR7]
+	add	x4, x3, x4, uxth 2
+	ldrb	w3, [x4, 2]
+	ubfx	x3, x3, 5, 3
+	cmp	w3, 1
+	ccmp	w3, 7, 4, ne
+	bne	.L3184
+	mov	w3, w2
+	mov	w2, w1
+	mov	x1, x0
+	stp	x29, x30, [sp, -16]!
+	adrp	x0, .LC200
+	add	x0, x0, :lo12:.LC200
+	add	x29, sp, 0
+	bl	printf
+	bl	dump_ftl_info
+	mov	w0, -1
+	ldp	x29, x30, [sp], 16
+	ret
+.L3184:
+	mov	w0, 0
+	ret
+	.size	pm_ppa_update_check, .-pm_ppa_update_check
+	.section	.text.load_l2p_region,"ax",@progbits
+	.align	2
+	.type	load_l2p_region, %function
+load_l2p_region:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w19, w0, 65535
+	stp	x21, x22, [sp, 32]
+	and	x21, x1, 65535
+	stp	x23, x24, [sp, 48]
+	cmp	w21, 7
+	stp	x25, x26, [sp, 64]
+	bls	.L3190
+	adrp	x1, .LANCHOR220
+	adrp	x0, .LC0
+	mov	w2, 32
+	add	x1, x1, :lo12:.LANCHOR220
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L3190:
+	adrp	x20, .LANCHOR110
+	mov	x25, x20
+	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	ldrh	w2, [x0, 698]
+	cmp	w2, w19
+	bcs	.L3191
+	mov	w1, w19
+	adrp	x0, .LC201
+	add	x0, x0, :lo12:.LC201
+	bl	printf
+	adrp	x0, .LANCHOR221
+	mov	w1, 255
+	ldrh	w2, [x0, #:lo12:.LANCHOR221]
+	mov	x0, 0
+	ldr	x0, [x0, 8]
+	bl	ftl_memset
+	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	ldrh	w0, [x0, 698]
+	cmp	w0, w19
+	bcc	.L3192
+.L3202:
+	mov	w0, 0
+.L3189:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L3192:
+	mov	w2, 37
+.L3203:
+	adrp	x1, .LANCHOR220
+	adrp	x0, .LC0
+	add	x1, x1, :lo12:.LANCHOR220
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+	b	.L3202
+.L3191:
+	add	x0, x0, x19, sxtw 2
+	adrp	x22, .LANCHOR138
+	add	x1, x22, :lo12:.LANCHOR138
+	ldr	w23, [x0, 704]
+	lsl	x0, x21, 4
+	add	x26, x1, x0
+	strh	w19, [x1, x0]
+	strh	wzr, [x26, 2]
+	cbnz	w23, .L3194
+	mov	w1, w19
+	mov	w2, 0
+	adrp	x0, .LC202
+	add	x0, x0, :lo12:.LC202
+	bl	printf
+	adrp	x0, .LANCHOR221
+	mov	w1, 255
+	ldrh	w2, [x0, #:lo12:.LANCHOR221]
+	ldr	x0, [x26, 8]
+	bl	ftl_memset
+	b	.L3202
+.L3194:
+	adrp	x20, .LANCHOR207
+	adrp	x24, .LANCHOR131
+	ldr	x1, [x26, 8]
+	mov	w0, w23
+	ldr	x2, [x20, #:lo12:.LANCHOR207]
+	ldrb	w3, [x24, #:lo12:.LANCHOR131]
+	bl	ftl_read_ppa_page
+	ldr	x1, [x20, #:lo12:.LANCHOR207]
+	ldr	w2, [x1]
+	cmp	w2, w19
+	bne	.L3195
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	beq	.L3195
+.L3199:
+	ldr	x0, [x20, #:lo12:.LANCHOR207]
+	ldr	w0, [x0]
+	cmp	w19, w0
+	beq	.L3202
+	mov	w2, 73
+	b	.L3203
+.L3195:
+	mov	w4, w23
+	mov	w3, w0
+	mov	w1, w19
+	adrp	x0, .LC203
+	add	x0, x0, :lo12:.LC203
+	bl	printf
+	ldr	x1, [x25, #:lo12:.LANCHOR110]
+	add	x22, x22, :lo12:.LANCHOR138
+	add	x21, x22, x21, lsl 4
+	mov	w2, 4
+	add	x1, x1, 704
+	adrp	x0, .LC204
+	add	x0, x0, :lo12:.LC204
+	ldrh	w3, [x1, -6]
+	bl	rknand_print_hex
+	ldr	x1, [x21, 8]
+	mov	w2, 4
+	ldrb	w3, [x24, #:lo12:.LANCHOR131]
+	adrp	x0, .LC183
+	add	x0, x0, :lo12:.LC183
+	lsl	w3, w3, 7
+	bl	rknand_print_hex
+	ldr	x1, [x20, #:lo12:.LANCHOR207]
+	mov	w3, 16
+	mov	w2, 4
+	adrp	x0, .LC205
+	add	x0, x0, :lo12:.LC205
+	bl	rknand_print_hex
+	ldrb	w3, [x24, #:lo12:.LANCHOR131]
+	mov	w0, w23
+	ldr	x2, [x20, #:lo12:.LANCHOR207]
+	ldr	x1, [x21, 8]
+	bl	ftl_read_ppa_page
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	bne	.L3198
+	adrp	x0, .LANCHOR221
+	mov	w1, 255
+	ldrh	w2, [x0, #:lo12:.LANCHOR221]
+	ldr	x0, [x21, 8]
+	bl	ftl_memset
+.L3200:
+	mov	w0, -1
+	b	.L3189
+.L3198:
+	ldr	x0, [x20, #:lo12:.LANCHOR207]
+	ldr	w0, [x0]
+	cmp	w19, w0
+	beq	.L3199
+	b	.L3200
+	.size	load_l2p_region, .-load_l2p_region
+	.section	.text.pm_gc,"ax",@progbits
+	.align	2
+	.global	pm_gc
+	.type	pm_gc, %function
+pm_gc:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR110
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR151
+	ldr	x0, [x19, #:lo12:.LANCHOR110]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	ldrh	w2, [x0, 688]
+	adrp	x0, .LANCHOR155
+	str	x27, [sp, 80]
+	mov	x20, x0
+	ldrh	w1, [x0, #:lo12:.LANCHOR155]
+	sub	w1, w1, #1
+	cmp	w2, w1
+	bge	.L3205
+	ldr	w0, [x21, #:lo12:.LANCHOR151]
+	cbz	w0, .L3206
+.L3205:
+	bl	pm_free_sblk
+	ldr	x2, [x19, #:lo12:.LANCHOR110]
+	ldrh	w1, [x20, #:lo12:.LANCHOR155]
+	sub	w1, w1, #1
+	ldrh	w3, [x2, 688]
+	cmp	w3, w1
+	bge	.L3207
+	ldr	w1, [x21, #:lo12:.LANCHOR151]
+	cbz	w1, .L3206
+.L3207:
+	add	x0, x2, x0, uxth 1
+	str	wzr, [x21, #:lo12:.LANCHOR151]
+	mov	w20, 65535
+	ldrh	w21, [x0, 416]
+	cmp	w21, w20
+	bne	.L3209
+	adrp	x1, .LANCHOR222
+	add	x1, x1, :lo12:.LANCHOR222
+	mov	w2, 182
+	adrp	x0, .LC0
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+	bl	pm_free_sblk
+	ldr	x1, [x19, #:lo12:.LANCHOR110]
+	add	x0, x1, x0, uxth 1
+	ldrh	w21, [x0, 416]
+	cmp	w21, w20
+	beq	.L3206
+.L3209:
+	bl	pm_select_ram_region
+	and	x22, x0, 65535
+	lsl	x0, x22, 4
+	adrp	x20, .LANCHOR138
+	add	x1, x20, :lo12:.LANCHOR138
+	mov	x25, x22
+	add	x23, x1, x0
+	ldrh	w0, [x1, x0]
+	mov	w1, 65535
+	cmp	w0, w1
+	beq	.L3210
+	ldr	x1, [x23, 8]
+	cbz	x1, .L3210
+	ldrsh	w2, [x23, 2]
+	tbz	w2, #31, .L3210
+	bl	pm_write_page
+	ldrh	w0, [x23, 2]
+	and	w0, w0, 32767
+	strh	w0, [x23, 2]
+.L3210:
+	adrp	x23, .LANCHOR75
+	adrp	x24, .LANCHOR32
+	add	x23, x23, :lo12:.LANCHOR75
+	add	x24, x24, :lo12:.LANCHOR32
+	mov	w27, 0
+	mov	w26, 24
+.L3211:
+	ldr	x2, [x19, #:lo12:.LANCHOR110]
+	ldrh	w0, [x2, 698]
+	cmp	w0, w27
+	bhi	.L3214
+	bl	pm_free_sblk
+.L3206:
+	mov	w0, 0
+	ldr	x27, [sp, 80]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	ret
+.L3214:
+	ldrb	w0, [x24]
+	add	x2, x2, x27, sxtw 2
+	ldrh	w3, [x23]
+	sub	w0, w26, w0
+	sub	w1, w0, w3
+	mov	w0, 1
+	lsl	w0, w0, w1
+	ldr	w1, [x2, 704]
+	sub	w0, w0, #1
+	lsr	w1, w1, w3
+	and	w0, w0, w1
+	adrp	x1, .LANCHOR76
+	ldrb	w1, [x1, #:lo12:.LANCHOR76]
+	udiv	w0, w0, w1
+	cmp	w21, w0, uxth
+	bne	.L3212
+	mov	w1, w25
+	mov	w0, w27
+	bl	load_l2p_region
+	cbnz	w0, .L3213
+	add	x0, x20, :lo12:.LANCHOR138
+	add	x0, x0, x22, lsl 4
+	ldr	x1, [x0, 8]
+	mov	w0, w27
+	bl	pm_write_page
+.L3213:
+	add	x1, x20, :lo12:.LANCHOR138
+	lsl	x0, x22, 4
+	mov	w2, -1
+	strh	w2, [x1, x0]
+.L3212:
+	add	w27, w27, 1
+	and	w27, w27, 65535
+	b	.L3211
+	.size	pm_gc, .-pm_gc
+	.section	.text.pm_flush_id,"ax",@progbits
+	.align	2
+	.global	pm_flush_id
+	.type	pm_flush_id, %function
+pm_flush_id:
+	stp	x29, x30, [sp, -32]!
+	ubfiz	x0, x0, 4, 16
+	adrp	x2, .LANCHOR138
+	add	x2, x2, :lo12:.LANCHOR138
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	add	x19, x2, x0
+	ldrh	w0, [x2, x0]
+	ldr	x1, [x19, 8]
+	bl	pm_write_page
+	ldrh	w0, [x19, 2]
+	and	w0, w0, 32767
+	strh	w0, [x19, 2]
+	adrp	x19, .LANCHOR136
+	ldr	w0, [x19, #:lo12:.LANCHOR136]
+	cbz	w0, .L3223
+	bl	pm_gc
+	str	wzr, [x19, #:lo12:.LANCHOR136]
+.L3223:
+	mov	w0, 0
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	pm_flush_id, .-pm_flush_id
+	.section	.text.pm_flush,"ax",@progbits
+	.align	2
+	.global	pm_flush
+	.type	pm_flush, %function
+pm_flush:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR138
+	add	x19, x19, :lo12:.LANCHOR138
+	mov	w20, 0
+	add	x19, x19, 2
+.L3230:
+	ldrsh	w0, [x19]
+	tbz	w0, #31, .L3229
+	mov	w0, w20
+	bl	pm_flush_id
+.L3229:
+	add	w20, w20, 1
+	add	x19, x19, 16
+	and	w20, w20, 65535
+	cmp	w20, 8
+	bne	.L3230
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	pm_flush, .-pm_flush
+	.section	.text.flt_sys_flush,"ax",@progbits
+	.align	2
+	.global	flt_sys_flush
+	.type	flt_sys_flush, %function
+flt_sys_flush:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	bl	ftl_flush
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	ldp	x29, x30, [sp], 16
+	mov	w0, 0
+	b	ftl_info_flush
+	.size	flt_sys_flush, .-flt_sys_flush
+	.section	.text.rk_ftl_de_init,"ax",@progbits
+	.align	2
+	.global	rk_ftl_de_init
+	.type	rk_ftl_de_init, %function
+rk_ftl_de_init:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	bl	zftl_flash_de_init
+	bl	flt_sys_flush
+	ldp	x29, x30, [sp], 16
+	b	zftl_flash_de_init
+	.size	rk_ftl_de_init, .-rk_ftl_de_init
+	.section	.text.zftl_deinit,"ax",@progbits
+	.align	2
+	.global	zftl_deinit
+	.type	zftl_deinit, %function
+zftl_deinit:
+	b	rk_ftl_de_init
+	.size	zftl_deinit, .-zftl_deinit
+	.section	.text.pm_init,"ax",@progbits
+	.align	2
+	.global	pm_init
+	.type	pm_init, %function
+pm_init:
+	stp	x29, x30, [sp, -112]!
+	mov	w1, 1
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	mov	w24, w0
+	adrp	x0, .LANCHOR151
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	adrp	x19, .LANCHOR138
+	str	wzr, [x0, #:lo12:.LANCHOR151]
+	adrp	x0, .LANCHOR136
+	stp	x25, x26, [sp, 64]
+	add	x20, x19, :lo12:.LANCHOR138
+	str	wzr, [x0, #:lo12:.LANCHOR136]
+	adrp	x0, .LANCHOR208
+	stp	x27, x28, [sp, 80]
+	adrp	x22, .LANCHOR131
+	strb	w1, [x0, #:lo12:.LANCHOR208]
+	mov	w0, 64
+	bl	ftl_malloc
+	add	x23, x20, 128
+	adrp	x1, .LANCHOR207
+	add	x22, x22, :lo12:.LANCHOR131
+	mov	x21, x1
+	mov	w25, -1
+	str	x0, [x1, #:lo12:.LANCHOR207]
+.L3240:
+	strh	w25, [x20]
+	strh	wzr, [x20, 2]
+	cbz	w24, .L3239
+	ldrb	w0, [x22]
+	lsl	w0, w0, 9
+	bl	ftl_malloc
+	str	x0, [x20, 8]
+.L3239:
+	add	x20, x20, 16
+	cmp	x20, x23
+	bne	.L3240
+	add	x0, x19, :lo12:.LANCHOR138
+	adrp	x20, .LANCHOR110
+	ldr	x22, [x21, #:lo12:.LANCHOR207]
+	mov	w4, 4
+	ldr	x27, [x0, 8]
+	mov	x3, x22
+	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	mov	x2, x27
+	ldrh	w1, [x0, 692]
+	ldrb	w0, [x0, 694]
+	bl	flash_get_last_written_page
+	sxth	w26, w0
+	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	mov	w24, w26
+	ldrh	w2, [x0, 696]
+	cmp	w2, w26
+	bgt	.L3241
+	ldrh	w1, [x0, 692]
+	mov	w3, w26
+	adrp	x0, .LC206
+	add	x0, x0, :lo12:.LC206
+	adrp	x25, .LANCHOR131
+	add	x25, x25, :lo12:.LANCHOR131
+	adrp	x28, .LC207
+	bl	printf
+	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	ldrsh	w21, [x0, 696]
+	adrp	x0, .LANCHOR111
+	add	x0, x0, :lo12:.LANCHOR111
+	str	x0, [x29, 104]
+.L3242:
+	cmp	w21, w26
+	ble	.L3245
+	adrp	x0, .LANCHOR198
+	mov	w1, 1
+	add	w24, w24, 1
+	strb	w1, [x0, #:lo12:.LANCHOR198]
+	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	strh	w24, [x0, 696]
+	bl	pm_free_sblk
+.L3241:
+	add	x19, x19, :lo12:.LANCHOR138
+	adrp	x0, .LANCHOR221
+	mov	w1, 255
+	ldrh	w2, [x0, #:lo12:.LANCHOR221]
+	ldr	x0, [x19, 8]
+	bl	ftl_memset
+	ldr	x1, [x19, 8]
+	mov	w0, -1
+	bl	pm_write_page
+	adrp	x0, .LANCHOR198
+	ldrb	w0, [x0, #:lo12:.LANCHOR198]
+	cbz	w0, .L3246
+	ldr	x1, [x19, 8]
+	mov	w0, -1
+	bl	pm_write_page
+	ldr	x1, [x19, 8]
+	mov	w0, -1
+	bl	pm_write_page
+	ldr	x1, [x19, 8]
+	mov	w0, -1
+	bl	pm_write_page
+.L3246:
+	bl	pm_free_sblk
+	bl	pm_gc
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L3245:
+	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	mov	x3, x22
+	ldr	x1, [x29, 104]
+	mov	x2, x27
+	ldrb	w4, [x25]
+	ldrh	w23, [x0, 692]
+	ldrh	w1, [x1]
+	ldrb	w0, [x0, 694]
+	madd	w23, w23, w1, w21
+	mov	w1, w23
+	bl	flash_read_page_en
+	mov	w4, w0
+	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	str	w4, [x29, 100]
+	mov	w2, w23
+	ldr	w1, [x0, 48]
+	ldrh	w3, [x0, 694]
+	add	w1, w1, 1
+	str	w1, [x0, 48]
+	add	x0, x28, :lo12:.LC207
+	ldr	w1, [x22]
+	bl	printf
+	ldr	w4, [x29, 100]
+	cmp	w4, 512
+	ccmn	w4, #1, 4, ne
+	beq	.L3243
+	ldr	x8, [x20, #:lo12:.LANCHOR110]
+	ldr	w6, [x22]
+	ldrh	w0, [x8, 698]
+	cmp	w6, w0
+	bcs	.L3243
+	ldr	w7, [x22, 8]
+	cbz	w7, .L3244
+	ldrb	w1, [x25]
+	mov	x0, x27
+	lsl	w1, w1, 9
+	bl	js_hash
+	cmp	w7, w0
+	beq	.L3244
+	adrp	x0, .LC208
+	mov	w1, w7
+	add	x0, x0, :lo12:.LC208
+	bl	printf
+.L3243:
+	add	w21, w21, 1
+	sxth	w21, w21
+	b	.L3242
+.L3244:
+	add	x6, x8, x6, uxtw 2
+	str	w23, [x6, 704]
+	b	.L3243
+	.size	pm_init, .-pm_init
+	.section	.text.pm_log2phys,"ax",@progbits
+	.align	2
+	.global	pm_log2phys
+	.type	pm_log2phys, %function
+pm_log2phys:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x25, x26, [sp, 64]
+	mov	w25, w0
+	adrp	x0, .LANCHOR128
+	stp	x23, x24, [sp, 48]
+	stp	x19, x20, [sp, 16]
+	mov	w24, w2
+	stp	x21, x22, [sp, 32]
+	mov	x23, x1
+	ldr	w2, [x0, #:lo12:.LANCHOR128]
+	str	x27, [sp, 80]
+	cmp	w25, w2
+	bcc	.L3262
+	mov	w1, w25
+	adrp	x0, .LC209
+	add	x0, x0, :lo12:.LC209
+	bl	printf
+	mov	w0, -1
+	cbnz	w24, .L3261
+	str	w0, [x23]
+.L3261:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	ret
+.L3262:
+	adrp	x0, .LANCHOR131
+	adrp	x21, .LANCHOR138
+	mov	x19, 0
+	ldrb	w20, [x0, #:lo12:.LANCHOR131]
+	add	x0, x21, :lo12:.LANCHOR138
+	add	x0, x0, 8
+	lsl	w22, w20, 7
+	udiv	w22, w25, w22
+	and	w26, w22, 65535
+.L3268:
+	ldr	x1, [x0]
+	cbz	x1, .L3264
+	ldrh	w1, [x0, -8]
+	cmp	w1, w26
+	bne	.L3264
+.L3265:
+	ubfiz	w20, w20, 7, 9
+	msub	w25, w26, w20, w25
+	and	x25, x25, 65535
+	cbnz	w24, .L3266
+	add	x0, x21, :lo12:.LANCHOR138
+	adrp	x1, .LANCHOR32
+	add	x0, x0, x19, lsl 4
+	mov	w2, 24
+	ldr	x0, [x0, 8]
+	ldr	w0, [x0, x25, lsl 2]
+	str	w0, [x23]
+	ldrb	w3, [x1, #:lo12:.LANCHOR32]
+	mov	w1, 1
+	sub	w2, w2, w3
+	lsl	w1, w1, w3
+	sub	w1, w1, #1
+	lsr	w0, w0, w2
+	and	w0, w0, w1
+	adrp	x1, .LANCHOR112
+	ldrb	w1, [x1, #:lo12:.LANCHOR112]
+	cmp	w0, w1
+	bcc	.L3267
+	mov	w0, -1
+	str	w0, [x23]
+.L3267:
+	add	x21, x21, :lo12:.LANCHOR138
+	add	x19, x21, x19, lsl 4
+	ldrh	w0, [x19, 2]
+	mvn	x1, x0
+	tst	x1, 32767
+	beq	.L3271
+	add	w0, w0, 1
+	strh	w0, [x19, 2]
+.L3271:
+	mov	w0, 0
+	b	.L3261
+.L3266:
+	add	x0, x21, :lo12:.LANCHOR138
+	ldr	w2, [x23]
+	add	x0, x0, x19, lsl 4
+	ldr	x1, [x0, 8]
+	str	w2, [x1, x25, lsl 2]
+	ldrh	w1, [x0, 2]
+	orr	w1, w1, -32768
+	strh	w1, [x0, 2]
+	adrp	x0, .LANCHOR139
+	strb	w22, [x0, #:lo12:.LANCHOR139]
+	b	.L3267
+.L3264:
+	add	w19, w19, 1
+	add	x0, x0, 16
+	and	x19, x19, 65535
+	cmp	w19, 8
+	bne	.L3268
+	bl	pm_select_ram_region
+	and	x19, x0, 65535
+	sbfiz	x1, x19, 4, 32
+	add	x2, x21, :lo12:.LANCHOR138
+	add	x3, x2, x1
+	mov	w27, w0
+	ldrh	w2, [x2, x1]
+	mov	w1, 65535
+	cmp	w2, w1
+	beq	.L3269
+	ldrsh	w1, [x3, 2]
+	tbz	w1, #31, .L3269
+	bl	pm_flush_id
+.L3269:
+	adrp	x0, .LANCHOR223
+	mov	w1, w27
+	strb	w19, [x0, #:lo12:.LANCHOR223]
+	mov	w0, w26
+	bl	load_l2p_region
+	b	.L3265
+	.size	pm_log2phys, .-pm_log2phys
+	.section	.text.gc_recovery,"ax",@progbits
+	.align	2
+	.global	gc_recovery
+	.type	gc_recovery, %function
+gc_recovery:
+	sub	sp, sp, #240
+	adrp	x0, .LANCHOR10
+	adrp	x1, .LANCHOR85
+	mov	w2, 65535
+	stp	x29, x30, [sp, 32]
+	add	x29, sp, 32
+	stp	x23, x24, [sp, 80]
+	ldr	x23, [x0, #:lo12:.LANCHOR10]
+	strb	wzr, [x1, #:lo12:.LANCHOR85]
+	adrp	x1, .LANCHOR159
+	stp	x25, x26, [sp, 96]
+	mov	x26, x0
+	strb	wzr, [x1, #:lo12:.LANCHOR159]
+	add	x1, x23, 80
+	stp	x19, x20, [sp, 48]
+	str	x1, [x29, 168]
+	stp	x21, x22, [sp, 64]
+	ldrh	w1, [x23, 80]
+	stp	x27, x28, [sp, 112]
+	cmp	w1, w2
+	beq	.L3278
+	mov	w0, -1
+	strh	w0, [x23, 130]
+	mov	w0, 1
+	bl	buf_alloc
+	mov	x27, x0
+	ldrb	w0, [x23, 89]
+	add	x1, x23, 80
+	adrp	x3, .LANCHOR111
+	str	x3, [x29, 152]
+	sub	w0, w0, #1
+	add	x0, x1, x0, sxtw 1
+	ldrh	w1, [x3, #:lo12:.LANCHOR111]
+	ldrh	w0, [x0, 16]
+	mul	w1, w0, w1
+	adrp	x0, .LANCHOR79
+	str	w1, [x29, 200]
+	ldrb	w2, [x0, #:lo12:.LANCHOR79]
+	str	x0, [x29, 176]
+	cmp	w2, 2
+	beq	.L3279
+	adrp	x0, .LANCHOR36
+	ldrb	w0, [x0, #:lo12:.LANCHOR36]
+	cbnz	w0, .L3279
+	adrp	x0, .LANCHOR37
+	ldrb	w0, [x0, #:lo12:.LANCHOR37]
+	cbz	w0, .L3280
+.L3279:
+	adrp	x0, .LANCHOR86
+	ldrh	w0, [x0, #:lo12:.LANCHOR86]
+	sub	w0, w0, #1
+	add	w0, w0, w1
+	orr	w2, w0, w2, lsl 24
+	str	w2, [x27, 40]
+.L3281:
+	mov	w1, 1
+	mov	x0, x27
+	bl	sblk_read_page
+	ldr	w0, [x27, 52]
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	beq	.L3282
+	ldr	x0, [x27, 24]
+	ldr	w1, [x0]
+	mov	w0, 15555
+	movk	w0, 0xf55f, lsl 16
+	cmp	w1, w0
+	beq	.L3283
+.L3282:
+	mov	x0, x27
+	bl	zbuf_free
+	ldr	x1, [x27, 24]
+	ldr	x0, [x27, 8]
+	ldr	w2, [x1, 12]
+	str	w2, [sp, 16]
+	ldr	w2, [x1, 8]
+	str	w2, [sp, 8]
+	ldr	w2, [x1, 4]
+	str	w2, [sp]
+	ldp	w3, w4, [x0]
+	ldp	w5, w6, [x0, 8]
+	adrp	x0, .LC210
+	ldr	w7, [x1]
+	add	x0, x0, :lo12:.LC210
+	ldr	w1, [x27, 40]
+	ldr	w2, [x27, 52]
+	bl	printf
+.L3372:
+	adrp	x0, .LANCHOR9
+	ldrh	w1, [x23, 80]
+	mov	w25, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	strh	wzr, [x0, x1, lsl 1]
+	ldr	x0, [x26, #:lo12:.LANCHOR10]
+	ldrh	w1, [x23, 80]
+	strh	w1, [x0, 130]
+.L3284:
+	ldrh	w0, [x23, 80]
+	adrp	x2, .LANCHOR9
+	ldr	x2, [x2, #:lo12:.LANCHOR9]
+	ubfiz	x1, x0, 1, 16
+	ldrh	w1, [x2, x1]
+	cbnz	w1, .L3328
+	bl	ftl_dump_write_open_sblk
+.L3328:
+	ldrh	w1, [x23, 80]
+	mov	w2, w25
+	adrp	x0, .LC212
+	add	x0, x0, :lo12:.LC212
+	bl	printf
+	mov	w0, -1
+	strh	w0, [x23, 80]
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	ldr	x0, [x26, #:lo12:.LANCHOR10]
+	mov	w1, 65535
+	ldrh	w0, [x0, 130]
+	cmp	w0, w1
+	beq	.L3329
+	adrp	x1, .LANCHOR6
+	ldrh	w1, [x1, #:lo12:.LANCHOR6]
+	cmp	w1, w0
+	bhi	.L3330
+	adrp	x1, .LANCHOR225
+	adrp	x0, .LC0
+	mov	w2, 517
+	add	x1, x1, :lo12:.LANCHOR225
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L3330:
+	ldr	x0, [x26, #:lo12:.LANCHOR10]
+	ldrh	w0, [x0, 130]
+	bl	ftl_free_sblk
+.L3329:
+	adrp	x0, .LANCHOR110
+	ldr	x1, [x0, #:lo12:.LANCHOR110]
+	mov	w0, -1
+	strh	w0, [x1, 126]
+	ldr	x1, [x26, #:lo12:.LANCHOR10]
+	strh	w0, [x1, 130]
+	mov	w0, 0
+	bl	ftl_info_flush
+.L3277:
+	ldp	x19, x20, [sp, 48]
+	ldp	x21, x22, [sp, 64]
+	ldp	x23, x24, [sp, 80]
+	ldp	x25, x26, [sp, 96]
+	ldp	x27, x28, [sp, 112]
+	ldp	x29, x30, [sp, 32]
+	add	sp, sp, 240
+	ret
+.L3280:
+	cmp	w2, 3
+	bne	.L3281
+	adrp	x0, .LANCHOR95
+	ldrh	w0, [x0, #:lo12:.LANCHOR95]
+	sub	w0, w0, #1
+	add	w0, w0, w1
+	orr	w0, w0, 50331648
+	str	w0, [x27, 40]
+	b	.L3281
+.L3283:
+	adrp	x21, .LANCHOR224
+	adrp	x19, .LANCHOR86
+	adrp	x20, .LANCHOR80
+	adrp	x24, .LANCHOR162
+	ldrb	w0, [x21, #:lo12:.LANCHOR224]
+	cmp	w0, 2
+	bne	.L3285
+	ldr	x0, [x29, 176]
+	ldrb	w0, [x0, #:lo12:.LANCHOR79]
+	cmp	w0, 3
+	bne	.L3285
+	ldrh	w2, [x19, #:lo12:.LANCHOR86]
+	adrp	x22, .LANCHOR221
+	ldrb	w1, [x20, #:lo12:.LANCHOR80]
+	ldr	x3, [x24, #:lo12:.LANCHOR162]
+	ubfiz	w2, w2, 2, 14
+	ldrh	w0, [x22, #:lo12:.LANCHOR221]
+	mul	w2, w2, w1
+	ldr	x1, [x27, 8]
+	sub	w2, w2, w0
+	and	x0, x0, 65532
+	and	w2, w2, 65535
+	add	x0, x3, x0
+	bl	ftl_memcpy
+	adrp	x0, .LANCHOR36
+	ldrb	w0, [x0, #:lo12:.LANCHOR36]
+	cbnz	w0, .L3286
+	adrp	x0, .LANCHOR37
+	ldrb	w0, [x0, #:lo12:.LANCHOR37]
+	cbz	w0, .L3287
+.L3286:
+	ldr	w0, [x27, 40]
+	sub	w0, w0, #1
+.L3366:
+	str	w0, [x27, 40]
+	mov	w1, 1
+	mov	x0, x27
+	bl	sblk_read_page
+	ldr	w0, [x27, 52]
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	beq	.L3289
+	ldr	x0, [x27, 24]
+	ldr	w1, [x0]
+	mov	w0, 15555
+	movk	w0, 0xf55f, lsl 16
+	cmp	w1, w0
+	beq	.L3290
+.L3289:
+	mov	x0, x27
+	bl	zbuf_free
+	b	.L3372
+.L3287:
+	adrp	x1, .LANCHOR95
+	ldr	w0, [x29, 200]
+	ldrh	w1, [x1, #:lo12:.LANCHOR95]
+	sub	w0, w0, #1
+	add	w0, w0, w1
+	orr	w0, w0, 33554432
+	b	.L3366
+.L3290:
+	ldrh	w2, [x22, #:lo12:.LANCHOR221]
+.L3367:
+	ldr	x1, [x27, 8]
+	adrp	x22, .LANCHOR163
+	ldr	x0, [x24, #:lo12:.LANCHOR162]
+	bl	ftl_memcpy
+	ldrb	w1, [x20, #:lo12:.LANCHOR80]
+	ldrh	w0, [x19, #:lo12:.LANCHOR86]
+	mul	w0, w0, w1
+	adrp	x1, .LANCHOR131
+	ldrb	w1, [x1, #:lo12:.LANCHOR131]
+	lsl	w2, w0, 2
+	cmp	w1, w0, lsr 6
+	bge	.L3292
+	ldr	x0, [x22, #:lo12:.LANCHOR163]
+	mov	w1, 0
+	bl	ftl_memset
+	ldrb	w21, [x21, #:lo12:.LANCHOR224]
+	cmp	w21, 1
+	bne	.L3333
+	ldrb	w1, [x20, #:lo12:.LANCHOR80]
+	ldrh	w0, [x19, #:lo12:.LANCHOR86]
+	mul	w0, w0, w1
+	adrp	x1, .LANCHOR221
+	ldrh	w1, [x1, #:lo12:.LANCHOR221]
+	sub	w25, w1, w0, lsl 2
+	ldr	x1, [x27, 8]
+	mov	w2, w25
+	add	x1, x1, x0, sxtw 2
+	ldr	x0, [x22, #:lo12:.LANCHOR163]
+	bl	ftl_memcpy
+.L3293:
+	adrp	x0, .LANCHOR95
+	ldrh	w0, [x0, #:lo12:.LANCHOR95]
+	str	w0, [x29, 184]
+	ldr	x0, [x29, 176]
+	ldrb	w0, [x0, #:lo12:.LANCHOR79]
+	str	w0, [x29, 188]
+	cmp	w0, 2
+	bne	.L3294
+	adrp	x0, .LANCHOR81
+	ldrb	w0, [x0, #:lo12:.LANCHOR81]
+	cbz	w0, .L3295
+.L3294:
+	adrp	x0, .LANCHOR36
+	ldrb	w0, [x0, #:lo12:.LANCHOR36]
+	cbz	w0, .L3296
+.L3295:
+	ldp	w0, w1, [x29, 184]
+	mul	w0, w0, w1
+	str	w0, [x29, 184]
+	mov	w0, 1
+	str	w0, [x29, 188]
+.L3296:
+	adrp	x22, .LANCHOR36
+	mov	w28, 0
+	add	x0, x22, :lo12:.LANCHOR36
+	mov	w10, 0
+	str	x0, [x29, 112]
+.L3297:
+	sub	w0, w28, #1
+	str	w0, [x29, 144]
+	ldr	w0, [x29, 184]
+	cmp	w0, w28
+	bls	.L3310
+	add	w0, w28, w28, lsl 1
+	mov	x20, 0
+	sub	w0, w0, #1
+	str	w0, [x29, 164]
+	adrp	x0, .LANCHOR37
+	add	x0, x0, :lo12:.LANCHOR37
+	str	x0, [x29, 120]
+	b	.L3311
+.L3285:
+	ldrh	w2, [x19, #:lo12:.LANCHOR86]
+	ldrb	w0, [x20, #:lo12:.LANCHOR80]
+	mul	w2, w2, w0
+	lsl	w2, w2, 2
+	b	.L3367
+.L3292:
+	ldr	x1, [x27, 8]
+	mov	w21, 0
+	add	x1, x1, x0, sxtw 2
+	ldr	x0, [x22, #:lo12:.LANCHOR163]
+	bl	ftl_memcpy
+.L3368:
+	mov	w25, 0
+	b	.L3293
+.L3333:
+	mov	w21, 1
+	b	.L3368
+.L3306:
+	ldp	x1, x0, [x29, 128]
+	ldr	x2, [x29, 176]
+	ldrh	w0, [x0, 96]
+	ldrh	w1, [x1]
+	ldrb	w2, [x2, #:lo12:.LANCHOR79]
+	cmp	w2, 2
+	mul	w0, w0, w1
+	str	w0, [x29, 200]
+	add	w1, w22, w0
+	beq	.L3298
+	ldr	x3, [x29, 112]
+	ldrb	w3, [x3]
+	cbz	w3, .L3299
+.L3298:
+	ldr	w0, [x29, 144]
+	add	w1, w1, w0
+	orr	w1, w1, w2, lsl 24
+.L3369:
+	str	w1, [x27, 40]
+.L3300:
+	mov	w1, 1
+	str	x8, [x29, 96]
+	str	w10, [x29, 104]
+	mov	x0, x27
+	bl	sblk_read_page
+	adrp	x1, .LANCHOR163
+	ldr	w10, [x29, 104]
+	ldr	x0, [x27, 24]
+	ldr	x8, [x29, 96]
+	cbz	w21, .L3303
+	ldr	x2, [x1, #:lo12:.LANCHOR163]
+	ldr	w3, [x2, x8]
+	cbnz	w3, .L3303
+	ldr	w3, [x0, 8]
+	str	w3, [x2, x8]
+.L3303:
+	ldr	x2, [x24, #:lo12:.LANCHOR162]
+	ldr	w6, [x0, 4]
+	ldr	w3, [x2, x8]
+	cmp	w3, w6
+	bne	.L3304
+	ldr	x2, [x1, #:lo12:.LANCHOR163]
+	ldr	w4, [x2, x8]
+	ldr	w2, [x0, 8]
+	cmp	w4, w2
+	beq	.L3305
+.L3304:
+	ldr	x1, [x1, #:lo12:.LANCHOR163]
+	ldr	w2, [x0, 12]
+	str	w2, [sp]
+	str	w10, [x29, 96]
+	ldr	w4, [x1, x8]
+	ldr	w5, [x0]
+	ldr	w7, [x0, 8]
+	adrp	x0, .LC211
+	ldr	w1, [x27, 40]
+	add	x0, x0, :lo12:.LC211
+	ldr	w2, [x27, 52]
+	str	x8, [x29, 104]
+	bl	printf
+	ldr	x0, [x24, #:lo12:.LANCHOR162]
+	ldr	x8, [x29, 104]
+	ldr	w10, [x29, 96]
+	ldr	w0, [x0, x8]
+	cmn	w0, #1
+	beq	.L3305
+	mov	x0, x27
+	bl	zbuf_free
+	adrp	x0, .LANCHOR9
+	ldrh	w1, [x23, 80]
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	strh	wzr, [x0, x1, lsl 1]
+	ldr	x0, [x26, #:lo12:.LANCHOR10]
+	ldrh	w1, [x23, 80]
+	strh	w1, [x0, 130]
+	b	.L3284
+.L3299:
+	cmp	w2, 3
+	bne	.L3301
+	ldr	x2, [x29, 120]
+	ldrb	w2, [x2]
+	cbz	w2, .L3302
+	ldr	w0, [x29, 164]
+	add	w1, w1, w0
+	orr	w1, w1, 50331648
+	b	.L3369
+.L3302:
+	add	w0, w28, w0
+	orr	w0, w0, w22, lsl 24
+.L3370:
+	str	w0, [x27, 40]
+	b	.L3300
+.L3301:
+	add	w0, w28, w0
+	b	.L3370
+.L3305:
+	add	w10, w10, 1
+	add	w22, w22, 1
+	add	x8, x8, 4
+.L3308:
+	ldr	w0, [x29, 188]
+	cmp	w0, w22
+	bcs	.L3306
+	add	x20, x20, 1
+.L3311:
+	ldr	x0, [x29, 168]
+	ldrb	w0, [x0, 9]
+	cmp	w0, w20
+	ble	.L3307
+	add	x0, x23, x20, lsl 1
+	str	x0, [x29, 136]
+	ldr	x0, [x29, 152]
+	sbfiz	x8, x10, 2, 32
+	mov	w22, 1
+	add	x0, x0, :lo12:.LANCHOR111
+	str	x0, [x29, 128]
+	b	.L3308
+.L3307:
+	adrp	x0, .LANCHOR81
+	ldrb	w0, [x0, #:lo12:.LANCHOR81]
+	cmp	w0, 0
+	cinc	w28, w28, ne
+	add	w28, w28, 1
+	b	.L3297
+.L3310:
+	mov	x0, x27
+	bl	zbuf_free
+	ldr	x0, [x29, 168]
+	adrp	x20, .LANCHOR9
+	ldrh	w3, [x19, #:lo12:.LANCHOR86]
+	mov	w25, 0
+	ldrh	w2, [x23, 80]
+	mov	w27, 0
+	ldr	x1, [x20, #:lo12:.LANCHOR9]
+	mov	w28, 0
+	ldrb	w0, [x0, 9]
+	str	x20, [x29, 144]
+	mul	w0, w0, w3
+	strh	w0, [x1, x2, lsl 1]
+	adrp	x0, .LANCHOR75
+	add	x0, x0, :lo12:.LANCHOR75
+	str	x0, [x29, 104]
+.L3312:
+	sub	w0, w27, #1
+	str	w0, [x29, 128]
+	ldr	w0, [x29, 184]
+	cmp	w0, w27
+	bls	.L3326
+	add	w22, w27, w27, lsl 1
+	mov	x21, 0
+	sub	w0, w22, #1
+	str	w0, [x29, 120]
+	b	.L3327
+.L3322:
+	ldr	x1, [x24, #:lo12:.LANCHOR162]
+	sbfiz	x0, x28, 2, 32
+	ldr	w20, [x1, x0]
+	cmn	w20, #1
+	beq	.L3313
+	adrp	x1, .LANCHOR163
+	ldr	x1, [x1, #:lo12:.LANCHOR163]
+	ldr	w0, [x1, x0]
+	str	w0, [x29, 164]
+	mov	w0, w20
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 204]
+	cmn	w0, #1
+	bne	.L3314
+	mov	w2, 0
+	add	x1, x29, 204
+	mov	w0, w20
+	bl	pm_log2phys
+.L3314:
+	ldr	x0, [x29, 136]
+	ldr	x1, [x29, 152]
+	ldr	x2, [x29, 176]
+	ldrh	w0, [x0, 96]
+	ldrh	w1, [x1, #:lo12:.LANCHOR111]
+	ldrb	w2, [x2, #:lo12:.LANCHOR79]
+	cmp	w2, 2
+	mul	w0, w0, w1
+	add	w1, w22, w0
+	beq	.L3315
+	adrp	x6, .LANCHOR36
+	ldrb	w6, [x6, #:lo12:.LANCHOR36]
+	cbz	w6, .L3316
+.L3315:
+	ldr	w0, [x29, 128]
+	add	w1, w0, w1
+	orr	w1, w1, w2, lsl 24
+	str	w1, [x29, 200]
+.L3317:
+	ldp	x0, x1, [x29, 104]
+	mov	w19, 24
+	mov	w2, 1
+	ldrb	w1, [x1]
+	ldrh	w0, [x0]
+	sub	w19, w19, w1
+	ldr	w1, [x29, 164]
+	sub	w19, w19, w0
+	lsr	w0, w1, w0
+	lsl	w19, w2, w19
+	sub	w19, w19, #1
+	and	w19, w19, w0
+	adrp	x0, .LANCHOR76
+	ldrb	w0, [x0, #:lo12:.LANCHOR76]
+	udiv	w19, w19, w0
+	ldr	w0, [x29, 204]
+	cmp	w1, w0
+	and	x19, x19, 65535
+	bne	.L3320
+	add	x1, x29, 200
+	mov	w0, w20
+	bl	pm_log2phys
+	add	w25, w25, 1
+	mov	w0, w19
+	bl	ftl_vpn_decrement
+.L3321:
+	adrp	x0, .LANCHOR7
+	add	w28, w28, 1
+	ldr	x0, [x0, #:lo12:.LANCHOR7]
+	add	x0, x0, x19, lsl 2
+	ldrb	w0, [x0, 2]
+	tst	w0, 224
+	bne	.L3313
+	ldr	x0, [x29, 144]
+	lsl	x19, x19, 1
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrh	w1, [x0, x19]
+	cbz	w1, .L3313
+	strh	wzr, [x0, x19]
+.L3313:
+	add	w22, w22, 1
+.L3324:
+	ldr	w0, [x29, 188]
+	cmp	w0, w22
+	bcs	.L3322
+	add	x21, x21, 1
+.L3327:
+	ldr	x0, [x29, 168]
+	ldrb	w0, [x0, 9]
+	cmp	w0, w21
+	ble	.L3323
+	add	x0, x23, x21, lsl 1
+	mov	w22, 1
+	str	x0, [x29, 136]
+	adrp	x0, .LANCHOR32
+	add	x0, x0, :lo12:.LANCHOR32
+	str	x0, [x29, 112]
+	b	.L3324
+.L3316:
+	cmp	w2, 3
+	bne	.L3318
+	adrp	x2, .LANCHOR37
+	ldrb	w6, [x2, #:lo12:.LANCHOR37]
+	lsl	w2, w22, 24
+	cbz	w6, .L3319
+	ldr	w0, [x29, 120]
+	add	w1, w0, w1
+	orr	w0, w1, w2
+.L3371:
+	str	w0, [x29, 200]
+	b	.L3317
+.L3319:
+	add	w0, w27, w0
+	orr	w0, w0, w2
+	b	.L3371
+.L3318:
+	add	w0, w27, w0
+	b	.L3371
+.L3320:
+	ldr	w1, [x29, 200]
+	cmp	w0, w1
+	cinc	w25, w25, eq
+	b	.L3321
+.L3323:
+	adrp	x0, .LANCHOR81
+	ldrb	w0, [x0, #:lo12:.LANCHOR81]
+	cmp	w0, 0
+	cinc	w27, w27, ne
+	add	w27, w27, 1
+	b	.L3312
+.L3326:
+	ldr	x0, [x29, 144]
+	ldrh	w1, [x23, 80]
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	strh	w25, [x0, x1, lsl 1]
+	ldrh	w0, [x23, 80]
+	bl	zftl_insert_data_list
+	b	.L3284
+.L3278:
+	ldrh	w0, [x23, 130]
+	cmp	w0, w1
+	beq	.L3277
+	adrp	x19, .LANCHOR110
+	ldr	x1, [x19, #:lo12:.LANCHOR110]
+	ldrh	w1, [x1, 126]
+	cmp	w1, w0
+	bne	.L3332
+	bl	pm_flush
+	ldr	x0, [x26, #:lo12:.LANCHOR10]
+	ldrh	w0, [x0, 130]
+	bl	ftl_free_sblk
+	ldr	x0, [x19, #:lo12:.LANCHOR110]
+	mov	w1, -1
+	strh	w1, [x0, 126]
+	mov	w0, 0
+	bl	ftl_info_flush
+.L3332:
+	ldr	x0, [x26, #:lo12:.LANCHOR10]
+	mov	w1, -1
+	strh	w1, [x0, 130]
+	b	.L3277
+	.size	gc_recovery, .-gc_recovery
+	.section	.text.gc_update_l2p_map_new,"ax",@progbits
+	.align	2
+	.global	gc_update_l2p_map_new
+	.type	gc_update_l2p_map_new, %function
+gc_update_l2p_map_new:
+	stp	x29, x30, [sp, -176]!
+	adrp	x0, .LANCHOR10
+	adrp	x1, .LANCHOR86
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	ldr	x21, [x0, #:lo12:.LANCHOR10]
+	stp	x25, x26, [sp, 64]
+	ldrh	w26, [x1, #:lo12:.LANCHOR86]
+	add	x1, x21, 80
+	stp	x23, x24, [sp, 48]
+	adrp	x24, .LANCHOR14
+	stp	x19, x20, [sp, 16]
+	stp	x27, x28, [sp, 80]
+	stp	x0, x1, [x29, 128]
+	ldrb	w1, [x1, 9]
+	mul	w26, w26, w1
+	ldr	w1, [x24, #:lo12:.LANCHOR14]
+	tbz	x1, 8, .L3374
+	ldrh	w1, [x21, 80]
+	adrp	x0, .LC213
+	add	x0, x0, :lo12:.LC213
+	bl	printf
+.L3374:
+	adrp	x23, .LANCHOR9
+	adrp	x0, .LANCHOR224
+	ldrh	w2, [x21, 80]
+	mov	x22, 0
+	ldr	x1, [x23, #:lo12:.LANCHOR9]
+	mov	w25, 0
+	ldrb	w0, [x0, #:lo12:.LANCHOR224]
+	sub	w0, w26, w0
+	strh	w0, [x1, x2, lsl 1]
+	adrp	x0, .LANCHOR131
+	add	x0, x0, :lo12:.LANCHOR131
+	str	x0, [x29, 104]
+.L3375:
+	mov	w28, w22
+	cmp	w26, w22
+	bhi	.L3385
+	ldr	w0, [x24, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L3386
+	ldr	x0, [x29, 128]
+	mov	w3, w25
+	ldr	x1, [x23, #:lo12:.LANCHOR9]
+	ldrh	w2, [x21, 80]
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	ldrh	w2, [x1, x2, lsl 1]
+	ldrh	w1, [x0, 80]
+	adrp	x0, .LC216
+	add	x0, x0, :lo12:.LC216
+	bl	printf
+.L3386:
+	ldrh	w1, [x21, 80]
+	ldr	x0, [x23, #:lo12:.LANCHOR9]
+	ldrh	w0, [x0, x1, lsl 1]
+	cmp	w25, w0
+	beq	.L3387
+	adrp	x1, .LANCHOR226
+	adrp	x0, .LC0
+	mov	w2, 898
+	add	x1, x1, :lo12:.LANCHOR226
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L3387:
+	ldrh	w1, [x21, 80]
+	ldr	x0, [x23, #:lo12:.LANCHOR9]
+	strh	w25, [x0, x1, lsl 1]
+	ldrh	w0, [x21, 80]
+	bl	zftl_insert_data_list
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 176
+	ret
+.L3385:
+	adrp	x27, .LANCHOR162
+	lsl	x19, x22, 2
+	ldr	x0, [x27, #:lo12:.LANCHOR162]
+	ldr	w2, [x0, x19]
+	cmn	w2, #1
+	beq	.L3376
+	adrp	x0, .LANCHOR131
+	ldrb	w20, [x0, #:lo12:.LANCHOR131]
+	lsl	w20, w20, 7
+	udiv	w20, w2, w20
+	and	w0, w20, 65535
+	str	w0, [x29, 156]
+	ldr	w0, [x24, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L3377
+	ldr	w1, [x29, 156]
+	adrp	x0, .LC214
+	mov	w3, w22
+	add	x0, x0, :lo12:.LC214
+	bl	printf
+.L3377:
+	sub	w28, w26, w28
+	add	x28, x28, x22
+	lsl	x0, x28, 2
+	str	x0, [x29, 144]
+	adrp	x0, .LC215
+	add	x0, x0, :lo12:.LC215
+	str	x0, [x29, 120]
+	adrp	x0, .LANCHOR75
+	add	x0, x0, :lo12:.LANCHOR75
+	str	x0, [x29, 112]
+.L3378:
+	ldr	x0, [x29, 144]
+	cmp	x0, x19
+	bne	.L3384
+.L3376:
+	add	x22, x22, 1
+	b	.L3375
+.L3384:
+	ldr	x0, [x27, #:lo12:.LANCHOR162]
+	ldr	w20, [x0, x19]
+	cmn	w20, #1
+	beq	.L3379
+	ldr	x0, [x29, 104]
+	ldr	w1, [x29, 156]
+	ldrb	w0, [x0]
+	lsl	w0, w0, 7
+	udiv	w0, w20, w0
+	cmp	w1, w0, uxth
+	bne	.L3379
+	adrp	x0, .LANCHOR163
+	ldr	x0, [x0, #:lo12:.LANCHOR163]
+	ldr	w28, [x0, x19]
+	mov	w0, w20
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 172]
+	cmn	w0, #1
+	bne	.L3380
+	mov	w2, 0
+	add	x1, x29, 172
+	mov	w0, w20
+	bl	pm_log2phys
+.L3380:
+	ldr	w3, [x29, 172]
+	cmp	w28, w3
+	bne	.L3381
+	adrp	x0, .LANCHOR164
+	mov	w2, 1
+	add	x1, x29, 168
+	add	w25, w25, 1
+	ldr	x0, [x0, #:lo12:.LANCHOR164]
+	ldr	w0, [x0, x19]
+	str	w0, [x29, 168]
+	mov	w0, w20
+	bl	pm_log2phys
+	ldr	x0, [x29, 112]
+	ldrh	w2, [x0]
+	adrp	x0, .LANCHOR32
+	ldrb	w1, [x0, #:lo12:.LANCHOR32]
+	mov	w0, 24
+	lsr	w28, w28, w2
+	sub	w0, w0, w1
+	sub	w1, w0, w2
+	mov	w0, 1
+	lsl	w0, w0, w1
+	sub	w0, w0, #1
+	and	w28, w0, w28
+	adrp	x0, .LANCHOR76
+	ldrb	w0, [x0, #:lo12:.LANCHOR76]
+	udiv	w0, w28, w0
+.L3407:
+	bl	ftl_vpn_decrement
+	ldr	x0, [x27, #:lo12:.LANCHOR162]
+	mov	w1, -1
+	str	w1, [x0, x19]
+.L3379:
+	add	x19, x19, 4
+	b	.L3378
+.L3381:
+	ldr	w0, [x24, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L3383
+	ldr	x0, [x29, 120]
+	mov	w2, w28
+	mov	w1, w20
+	bl	printf
+.L3383:
+	ldr	x0, [x29, 136]
+	ldrh	w0, [x0]
+	b	.L3407
+	.size	gc_update_l2p_map_new, .-gc_update_l2p_map_new
+	.section	.text.gc_scan_src_blk_one_page,"ax",@progbits
+	.align	2
+	.global	gc_scan_src_blk_one_page
+	.type	gc_scan_src_blk_one_page, %function
+gc_scan_src_blk_one_page:
+	stp	x29, x30, [sp, -96]!
+	mov	w3, 0
+	mov	w4, 0
+	mov	w5, 65535
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR71
+	add	x1, x20, :lo12:.LANCHOR71
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	adrp	x21, .LANCHOR80
+	stp	x25, x26, [sp, 64]
+	ldrb	w6, [x21, #:lo12:.LANCHOR80]
+	ldrb	w0, [x1, 4]
+	add	x2, x1, x0, sxtw 1
+	ldrh	w22, [x2, 40]
+	ldrh	w2, [x1, 2]
+.L3409:
+	cmp	w22, w5
+	beq	.L3411
+	cbz	w4, .L3412
+	add	x1, x20, :lo12:.LANCHOR71
+	strh	w2, [x1, 2]
+.L3412:
+	cbz	w3, .L3413
+	add	x1, x20, :lo12:.LANCHOR71
+	strb	w0, [x1, 4]
+.L3413:
+	mov	w0, 1
+	adrp	x23, .LANCHOR111
+	bl	buf_alloc
+	adrp	x24, .LANCHOR36
+	mov	x25, x0
+	add	x23, x23, :lo12:.LANCHOR111
+	add	x24, x24, :lo12:.LANCHOR36
+	mov	w26, 1
+.L3414:
+	add	x19, x20, :lo12:.LANCHOR71
+	ldrb	w1, [x19, 6]
+	cmp	w26, w1
+	ble	.L3424
+	mov	x0, x25
+	bl	zbuf_free
+	ldrb	w0, [x19, 4]
+	ldrb	w1, [x21, #:lo12:.LANCHOR80]
+	add	w0, w0, 1
+	and	w0, w0, 255
+	strb	w0, [x19, 4]
+	cmp	w1, w0
+	bne	.L3408
+	ldrh	w0, [x19, 2]
+	strb	wzr, [x19, 4]
+	add	w0, w0, 1
+	strh	w0, [x19, 2]
+.L3408:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	ret
+.L3411:
+	add	w0, w0, 1
+	and	w0, w0, 255
+	cmp	w0, w6
+	bne	.L3410
+	add	w2, w2, 1
+	mov	w0, 0
+	and	w2, w2, 65535
+	mov	w4, 1
+.L3410:
+	add	x3, x1, x0, sxtw 1
+	ldrh	w22, [x3, 40]
+	mov	w3, 1
+	b	.L3409
+.L3424:
+	ldrh	w0, [x23]
+	cmp	w1, 2
+	mul	w0, w0, w22
+	bne	.L3415
+	ldrh	w1, [x19, 2]
+	lsl	w1, w1, 1
+.L3434:
+	sub	w1, w1, #1
+	add	w0, w26, w0
+	add	w0, w1, w0
+	adrp	x1, .LANCHOR79
+	ldrb	w1, [x1, #:lo12:.LANCHOR79]
+	orr	w0, w0, w1, lsl 24
+.L3433:
+	str	w0, [x25, 40]
+	mov	w1, 1
+	mov	x0, x25
+	bl	sblk_read_page
+	ldr	w0, [x25, 52]
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	beq	.L3421
+	ldr	x0, [x25, 24]
+	ldr	w19, [x0, 4]
+	mov	w0, w19
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 92]
+	cmn	w0, #1
+	bne	.L3422
+	adrp	x0, .LANCHOR128
+	ldr	w0, [x0, #:lo12:.LANCHOR128]
+	cmp	w19, w0
+	bcs	.L3422
+	mov	w2, 0
+	add	x1, x29, 92
+	mov	w0, w19
+	bl	pm_log2phys
+.L3422:
+	ldr	w2, [x25, 40]
+	ldr	w0, [x29, 92]
+	cmp	w2, w0
+	bne	.L3421
+	add	x1, x20, :lo12:.LANCHOR71
+	adrp	x4, .LANCHOR77
+	ldr	x4, [x4, #:lo12:.LANCHOR77]
+	ldrh	w0, [x1, 24]
+	ubfiz	x3, x0, 2, 16
+	add	w0, w0, 1
+	str	w2, [x4, x3]
+	strh	w0, [x1, 24]
+.L3421:
+	add	x1, x20, :lo12:.LANCHOR71
+	add	w26, w26, 1
+	ldrh	w0, [x1, 26]
+	add	w0, w0, 1
+	strh	w0, [x1, 26]
+	b	.L3414
+.L3415:
+	cmp	w1, 3
+	bne	.L3417
+	ldrb	w1, [x24]
+	cbnz	w1, .L3418
+	adrp	x1, .LANCHOR37
+	ldrb	w1, [x1, #:lo12:.LANCHOR37]
+	cbz	w1, .L3419
+.L3418:
+	add	x1, x20, :lo12:.LANCHOR71
+	ldrh	w1, [x1, 2]
+	add	w1, w1, w1, lsl 1
+	b	.L3434
+.L3419:
+	ldrh	w1, [x19, 2]
+	add	w0, w1, w0
+	orr	w0, w0, w26, lsl 24
+	b	.L3433
+.L3417:
+	ldrh	w1, [x19, 2]
+	add	w0, w1, w0
+	b	.L3433
+	.size	gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page
+	.section	.text.gc_scan_src_blk,"ax",@progbits
+	.align	2
+	.global	gc_scan_src_blk
+	.type	gc_scan_src_blk, %function
+gc_scan_src_blk:
+	stp	x29, x30, [sp, -112]!
+	mov	w0, 65535
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR71
+	stp	x19, x20, [sp, 16]
+	ldrh	w1, [x21, #:lo12:.LANCHOR71]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	cmp	w1, w0
+	stp	x27, x28, [sp, 80]
+	bne	.L3436
+	adrp	x1, .LANCHOR227
+	adrp	x0, .LC0
+	mov	w2, 1504
+	add	x1, x1, :lo12:.LANCHOR227
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L3436:
+	ldrh	w1, [x21, #:lo12:.LANCHOR71]
+	mov	w0, 65535
+	cmp	w1, w0
+	beq	.L3466
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L3438
+	adrp	x2, .LANCHOR9
+	ubfiz	x0, x1, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR9]
+	ldrh	w2, [x2, x0]
+	adrp	x0, .LC217
+	add	x0, x0, :lo12:.LC217
+	bl	printf
+.L3438:
+	ldrh	w0, [x21, #:lo12:.LANCHOR71]
+	add	x14, x21, :lo12:.LANCHOR71
+	add	x1, x14, 40
+	bl	ftl_get_blk_list_in_sblk
+	and	w1, w0, 255
+	strb	w1, [x14, 5]
+	cbnz	w1, .L3439
+	mov	w0, -1
+	strh	w0, [x21, #:lo12:.LANCHOR71]
+.L3466:
+	mov	w0, 0
+	b	.L3435
+.L3439:
+	adrp	x4, .LANCHOR7
+	ldrh	w3, [x21, #:lo12:.LANCHOR71]
+	mov	x19, x4
+	ldr	x1, [x4, #:lo12:.LANCHOR7]
+	mov	x2, x3
+	add	x1, x1, x3, lsl 2
+	ldrb	w1, [x1, 2]
+	and	w1, w1, 224
+	cmp	w1, 32
+	beq	.L3440
+	cmp	w1, 224
+	beq	.L3440
+	cbz	w1, .L3441
+	adrp	x1, .LANCHOR10
+	ldr	x1, [x1, #:lo12:.LANCHOR10]
+	ldrh	w3, [x1, 16]
+	cmp	w3, w2
+	beq	.L3440
+	ldrh	w3, [x1, 48]
+	cmp	w3, w2
+	beq	.L3440
+	ldrh	w1, [x1, 80]
+	cmp	w1, w2
+	bne	.L3486
+.L3440:
+	add	x0, x21, :lo12:.LANCHOR71
+	mov	w1, -1
+	strh	w1, [x21, #:lo12:.LANCHOR71]
+	strh	wzr, [x0, 24]
+	b	.L3466
+.L3441:
+	adrp	x0, .LANCHOR9
+	mov	x19, x0
+	ldr	x1, [x0, #:lo12:.LANCHOR9]
+	ldrh	w1, [x1, x3, lsl 1]
+	cbz	w1, .L3443
+	adrp	x1, .LANCHOR227
+	adrp	x0, .LC0
+	mov	w2, 1529
+	add	x1, x1, :lo12:.LANCHOR227
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L3443:
+	ldrh	w1, [x21, #:lo12:.LANCHOR71]
+	ldr	x0, [x19, #:lo12:.LANCHOR9]
+	strh	wzr, [x0, x1, lsl 1]
+	b	.L3440
+.L3486:
+	and	w0, w0, 255
+	sub	w0, w0, #1
+	add	x0, x14, x0, sxtw 1
+	ldrh	w24, [x0, 40]
+	mov	w0, 65535
+	cmp	w24, w0
+	bne	.L3444
+	adrp	x1, .LANCHOR227
+	adrp	x0, .LC0
+	mov	w2, 1539
+	add	x1, x1, :lo12:.LANCHOR227
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L3444:
+	ldrh	w1, [x21, #:lo12:.LANCHOR71]
+	adrp	x23, .LANCHOR111
+	ldr	x2, [x19, #:lo12:.LANCHOR7]
+	adrp	x22, .LANCHOR95
+	ldrh	w20, [x23, #:lo12:.LANCHOR111]
+	ldrh	w0, [x22, #:lo12:.LANCHOR95]
+	add	x1, x2, x1, lsl 2
+	sub	w0, w0, #1
+	and	w0, w0, 65535
+	mul	w20, w20, w24
+	ldrb	w1, [x1, 2]
+	and	w1, w1, 224
+	cmp	w1, 160
+	bne	.L3467
+	adrp	x1, .LANCHOR79
+	ldrb	w1, [x1, #:lo12:.LANCHOR79]
+	and	w27, w1, 65535
+	cmp	w1, 2
+	orr	w20, w20, w1, lsl 24
+	bne	.L3446
+	adrp	x0, .LANCHOR86
+	ldrh	w0, [x0, #:lo12:.LANCHOR86]
+	sub	w0, w0, #1
+	and	w0, w0, 65535
+.L3446:
+	adrp	x1, .LANCHOR36
+	ldrb	w1, [x1, #:lo12:.LANCHOR36]
+	cbnz	w1, .L3447
+	adrp	x1, .LANCHOR37
+	ldrb	w1, [x1, #:lo12:.LANCHOR37]
+	cbz	w1, .L3445
+.L3447:
+	adrp	x0, .LANCHOR86
+	ldrh	w0, [x0, #:lo12:.LANCHOR86]
+	sub	w0, w0, #1
+	and	w0, w0, 65535
+.L3445:
+	add	x25, x21, :lo12:.LANCHOR71
+	orr	w20, w0, w20
+	mov	w0, 1
+	strb	w27, [x25, 6]
+	strh	wzr, [x25, 2]
+	strb	wzr, [x25, 4]
+	strh	wzr, [x25, 26]
+	strh	wzr, [x25, 28]
+	bl	buf_alloc
+	mov	x19, x0
+	str	w20, [x0, 40]
+	mov	w1, 1
+	bl	sblk_read_page
+	strh	wzr, [x25, 24]
+	ldr	w0, [x19, 52]
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	bne	.L3448
+.L3491:
+	mov	x0, x19
+	bl	zbuf_free
+.L3489:
+	mov	w0, -1
+.L3435:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L3467:
+	mov	w27, 1
+	b	.L3445
+.L3448:
+	ldr	x7, [x19, 24]
+	mov	w0, 15555
+	movk	w0, 0xf55f, lsl 16
+	ldr	w1, [x7]
+	cmp	w1, w0
+	beq	.L3449
+	mov	w2, 1577
+.L3492:
+	adrp	x1, .LANCHOR227
+	adrp	x0, .LC0
+	add	x1, x1, :lo12:.LANCHOR227
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+	b	.L3491
+.L3449:
+	adrp	x0, .LANCHOR80
+	ldrh	w26, [x22, #:lo12:.LANCHOR95]
+	ldrb	w25, [x0, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR224
+	ldrb	w0, [x0, #:lo12:.LANCHOR224]
+	mul	w26, w25, w26
+	cmp	w0, 2
+	mul	w26, w27, w26
+	and	w26, w26, 65535
+	bne	.L3450
+	cmp	w27, 3
+	bne	.L3450
+	adrp	x1, .LANCHOR86
+	adrp	x28, .LANCHOR221
+	adrp	x27, .LANCHOR77
+	ldrh	w1, [x1, #:lo12:.LANCHOR86]
+	ldrh	w0, [x28, #:lo12:.LANCHOR221]
+	ldr	x3, [x27, #:lo12:.LANCHOR77]
+	ubfiz	w1, w1, 2, 14
+	mul	w25, w25, w1
+	ldr	x1, [x19, 8]
+	sub	w25, w25, w0
+	and	x0, x0, 65532
+	and	w25, w25, 65535
+	add	x0, x3, x0
+	mov	w2, w25
+	bl	ftl_memcpy
+	ldr	x0, [x19, 24]
+	ldr	w6, [x0, 4]
+	cbz	w6, .L3451
+	ldr	x0, [x19, 8]
+	mov	w1, w25
+	bl	js_hash
+	cmp	w6, w0
+	beq	.L3451
+	mov	x0, x19
+	bl	zbuf_free
+	ldr	x0, [x19, 24]
+	mov	w3, w25
+.L3490:
+	ldr	w1, [x0, 4]
+	adrp	x0, .LC218
+	ldr	w2, [x19, 40]
+	add	x0, x0, :lo12:.LC218
+	bl	printf
+	b	.L3489
+.L3451:
+	adrp	x0, .LANCHOR36
+	ldrb	w0, [x0, #:lo12:.LANCHOR36]
+	cbnz	w0, .L3452
+	adrp	x0, .LANCHOR37
+	ldrb	w0, [x0, #:lo12:.LANCHOR37]
+	cbz	w0, .L3453
+.L3452:
+	sub	w0, w20, #1
+	str	w0, [x19, 40]
+.L3454:
+	mov	w1, 1
+	mov	x0, x19
+	bl	sblk_read_page
+	ldr	w0, [x19, 52]
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	beq	.L3491
+	ldr	x0, [x19, 24]
+	ldr	w1, [x0]
+	mov	w0, 15555
+	movk	w0, 0xf55f, lsl 16
+	cmp	w1, w0
+	beq	.L3456
+	mov	w2, 1618
+	b	.L3492
+.L3453:
+	ldrh	w1, [x23, #:lo12:.LANCHOR111]
+	ldrh	w0, [x22, #:lo12:.LANCHOR95]
+	sub	w0, w0, #1
+	and	w0, w0, 65535
+	mul	w24, w1, w24
+	orr	w0, w0, 33554432
+	orr	w24, w0, w24
+	str	w24, [x19, 40]
+	b	.L3454
+.L3456:
+	ldrh	w2, [x28, #:lo12:.LANCHOR221]
+	ldr	x0, [x27, #:lo12:.LANCHOR77]
+	ldr	x1, [x19, 8]
+.L3488:
+	adrp	x20, .LANCHOR77
+	bl	ftl_memcpy
+	adrp	x22, .LANCHOR75
+	adrp	x23, .LANCHOR32
+	ldr	x24, [x20, #:lo12:.LANCHOR77]
+	add	x22, x22, :lo12:.LANCHOR75
+	add	x23, x23, :lo12:.LANCHOR32
+	mov	x25, 0
+.L3459:
+	cmp	w26, w25
+	bgt	.L3464
+	mov	x0, x19
+	bl	zbuf_free
+	adrp	x0, .LANCHOR9
+	ldrh	w1, [x21, #:lo12:.LANCHOR71]
+	add	x3, x21, :lo12:.LANCHOR71
+	mov	x19, x0
+	ldr	x4, [x0, #:lo12:.LANCHOR9]
+	ubfiz	x2, x1, 1, 16
+	ldrh	w3, [x3, 24]
+	ldrh	w2, [x4, x2]
+	cmp	w2, w3
+	beq	.L3465
+	adrp	x0, .LC219
+	add	x0, x0, :lo12:.LC219
+	bl	printf
+.L3465:
+	add	x0, x21, :lo12:.LANCHOR71
+	ldrh	w2, [x21, #:lo12:.LANCHOR71]
+	ldr	x1, [x19, #:lo12:.LANCHOR9]
+	ldrh	w3, [x0, 24]
+	strh	w3, [x1, x2, lsl 1]
+	strh	wzr, [x0, 28]
+	ldrh	w0, [x0, 24]
+	b	.L3435
+.L3450:
+	ldr	x6, [x19, 8]
+	lsl	w20, w26, 2
+	mov	w1, w20
+	mov	x0, x6
+	bl	js_hash
+	ldr	w1, [x7, 4]
+	cmp	w1, w0
+	beq	.L3458
+	mov	x0, x19
+	bl	zbuf_free
+	mov	w3, w20
+	ldr	x0, [x19, 24]
+	b	.L3490
+.L3458:
+	adrp	x0, .LANCHOR77
+	mov	w2, w20
+	mov	x1, x6
+	ldr	x0, [x0, #:lo12:.LANCHOR77]
+	b	.L3488
+.L3464:
+	ldr	w0, [x24, x25, lsl 2]
+	cmn	w0, #1
+	beq	.L3461
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 108]
+	cmn	w0, #1
+	bne	.L3462
+	ldr	w0, [x24, x25, lsl 2]
+	mov	w2, 0
+	add	x1, x29, 108
+	bl	pm_log2phys
+.L3462:
+	ldrb	w0, [x23]
+	mov	w1, 24
+	ldrh	w2, [x22]
+	sub	w0, w1, w0
+	ldr	w3, [x29, 108]
+	sub	w1, w0, w2
+	mov	w0, 1
+	lsl	w0, w0, w1
+	adrp	x1, .LANCHOR76
+	sub	w0, w0, #1
+	lsr	w2, w3, w2
+	ldrb	w1, [x1, #:lo12:.LANCHOR76]
+	and	w0, w0, w2
+	ldrh	w2, [x21, #:lo12:.LANCHOR71]
+	udiv	w0, w0, w1
+	add	x1, x21, :lo12:.LANCHOR71
+	cmp	w0, w2
+	bne	.L3461
+	ldrh	w0, [x1, 24]
+	ldr	x4, [x20, #:lo12:.LANCHOR77]
+	ubfiz	x2, x0, 2, 16
+	add	w0, w0, 1
+	str	w3, [x4, x2]
+	strh	w0, [x1, 24]
+.L3461:
+	add	x25, x25, 1
+	b	.L3459
+	.size	gc_scan_src_blk, .-gc_scan_src_blk
+	.section	.text.gc_scan_static_data,"ax",@progbits
+	.align	2
+	.global	gc_scan_static_data
+	.type	gc_scan_static_data, %function
+gc_scan_static_data:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR10
+	stp	x21, x22, [sp, 32]
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	ldr	w1, [x0, 544]
+	str	x23, [sp, 48]
+	cmn	w1, #1
+	beq	.L3494
+	adrp	x21, .LANCHOR228
+	adrp	x22, .LC0
+	add	x21, x21, :lo12:.LANCHOR228
+	add	x22, x22, :lo12:.LC0
+	mov	w20, 11
+.L3502:
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	mov	w2, 0
+	add	x1, x29, 76
+	ldr	w0, [x0, 544]
+	bl	pm_log2phys
+	ldr	w0, [x29, 76]
+	cmn	w0, #1
+	beq	.L3495
+	mov	w0, 1
+	bl	buf_alloc
+	ldr	w1, [x29, 76]
+	mov	x23, x0
+	str	w1, [x0, 40]
+	mov	w1, 1
+	bl	sblk_read_page
+	ldr	w0, [x23, 52]
+	cmp	w0, 256
+	bne	.L3496
+	adrp	x0, .LANCHOR75
+	ldr	w2, [x29, 76]
+	ldrh	w3, [x0, #:lo12:.LANCHOR75]
+	adrp	x0, .LANCHOR32
+	ldrb	w1, [x0, #:lo12:.LANCHOR32]
+	mov	w0, 24
+	lsr	w2, w2, w3
+	sub	w0, w0, w1
+	mov	w1, 1
+	sub	w0, w0, w3
+	lsl	w0, w1, w0
+	sub	w0, w0, #1
+	and	w0, w0, w2
+	adrp	x2, .LANCHOR76
+	ldrb	w3, [x2, #:lo12:.LANCHOR76]
+	mov	w2, 0
+	udiv	w0, w0, w3
+	bl	gc_add_sblk
+.L3496:
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	ldr	x1, [x23, 24]
+	ldr	w0, [x0, 544]
+	ldr	w1, [x1, 4]
+	cmp	w1, w0
+	beq	.L3497
+	mov	w2, 2162
+	mov	x1, x21
+	mov	x0, x22
+	bl	printf
+.L3497:
+	mov	x0, x23
+	bl	zbuf_free
+.L3495:
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	adrp	x2, .LANCHOR128
+	ldr	w2, [x2, #:lo12:.LANCHOR128]
+	ldr	w1, [x0, 544]
+	add	w1, w1, 1
+	str	w1, [x0, 544]
+	cmp	w1, w2
+	bcc	.L3498
+	mov	w1, -1
+	str	w1, [x0, 544]
+	ldr	w1, [x0, 548]
+	add	w1, w1, 1
+	str	w1, [x0, 548]
+	bl	ftl_flush
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	mov	w0, 0
+	bl	ftl_info_flush
+.L3493:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	ret
+.L3498:
+	ldr	w0, [x29, 76]
+	cmn	w0, #1
+	bne	.L3493
+	sub	w20, w20, #1
+	ands	w20, w20, 65535
+	bne	.L3502
+	b	.L3493
+.L3494:
+	ldr	w1, [x0, 536]
+	adrp	x3, .LANCHOR110
+	ldr	w2, [x0, 12]
+	add	w1, w1, 12959744
+	add	w1, w1, 256
+	cmp	w2, w1
+	bhi	.L3504
+	ldr	x4, [x3, #:lo12:.LANCHOR110]
+	mov	w5, 5000
+	ldr	w1, [x0, 540]
+	add	w1, w1, w5
+	ldr	w4, [x4, 44]
+	cmp	w4, w1
+	bls	.L3493
+.L3504:
+	ldr	x1, [x3, #:lo12:.LANCHOR110]
+	ldr	w1, [x1, 44]
+	str	w1, [x0, 540]
+	str	w2, [x0, 536]
+	str	wzr, [x0, 544]
+	b	.L3493
+	.size	gc_scan_static_data, .-gc_scan_static_data
+	.section	.text.ftl_sblk_dump,"ax",@progbits
+	.align	2
+	.global	ftl_sblk_dump
+	.type	ftl_sblk_dump, %function
+ftl_sblk_dump:
+	sub	sp, sp, #288
+	and	x0, x0, 65535
+	stp	x29, x30, [sp, 48]
+	add	x29, sp, 48
+	stp	x23, x24, [sp, 96]
+	adrp	x24, .LANCHOR7
+	lsl	x23, x0, 2
+	stp	x19, x20, [sp, 64]
+	str	x0, [x29, 144]
+	mov	x20, x0
+	ldr	x0, [x24, #:lo12:.LANCHOR7]
+	str	x1, [x29, 160]
+	add	x1, x0, x23
+	stp	x21, x22, [sp, 80]
+	stp	x25, x26, [sp, 112]
+	ldr	w5, [x0, x23]
+	ldrb	w2, [x1, 2]
+	mov	w1, w20
+	ldrh	w4, [x0, x23]
+	adrp	x0, .LC220
+	stp	x27, x28, [sp, 128]
+	ubfx	x5, x5, 11, 8
+	ubfx	x3, x2, 3, 2
+	and	w4, w4, 2047
+	ubfx	x2, x2, 5, 3
+	add	x0, x0, :lo12:.LC220
+	bl	printf
+	mov	w0, 65535
+	cmp	w20, w0
+	beq	.L3533
+	adrp	x0, .LANCHOR6
+	ldrh	w0, [x0, #:lo12:.LANCHOR6]
+	cmp	w0, w20
+	bls	.L3533
+	ldr	x0, [x24, #:lo12:.LANCHOR7]
+	add	x0, x0, x23
+	ldrb	w0, [x0, 2]
+	and	w0, w0, 224
+	cmp	w0, 160
+	bne	.L3534
+	adrp	x0, .LANCHOR79
+	ldrb	w25, [x0, #:lo12:.LANCHOR79]
+.L3512:
+	add	x28, x29, 240
+	adrp	x21, .LANCHOR95
+	mov	w0, w20
+	mov	w19, 0
+	strh	w20, [x28, -32]!
+	add	x1, x28, 16
+	bl	ftl_get_blk_list_in_sblk
+	ldrh	w2, [x21, #:lo12:.LANCHOR95]
+	and	w1, w0, 255
+	strb	w1, [x29, 217]
+	and	w4, w0, 255
+	strb	wzr, [x29, 213]
+	mov	w3, w25
+	strh	wzr, [x29, 210]
+	adrp	x0, .LC221
+	mul	w1, w1, w2
+	strh	wzr, [x29, 218]
+	strh	w1, [x29, 214]
+	add	x0, x0, :lo12:.LC221
+	ldr	x1, [x24, #:lo12:.LANCHOR7]
+	add	x1, x1, x23
+	ldrb	w2, [x1, 2]
+	mov	w1, w20
+	ubfx	x2, x2, 5, 3
+	bl	printf
+	mov	w0, 1
+	bl	buf_alloc
+	str	x21, [x29, 136]
+	mov	x26, x0
+	stp	wzr, wzr, [x29, 168]
+	adrp	x0, .LANCHOR111
+	str	wzr, [x29, 176]
+	add	x0, x0, :lo12:.LANCHOR111
+	str	x0, [x29, 112]
+.L3513:
+	ldr	x0, [x29, 136]
+	ldrh	w0, [x0, #:lo12:.LANCHOR95]
+	cmp	w0, w19
+	bls	.L3530
+	lsl	w0, w19, 1
+	mov	w22, 0
+	sub	w1, w0, #1
+	add	w0, w0, w19
+	sub	w0, w0, #1
+	stp	w1, w0, [x29, 152]
+	adrp	x0, .LC167
+	add	x0, x0, :lo12:.LC167
+	str	x0, [x29, 120]
+	b	.L3531
+.L3534:
+	mov	w25, 1
+	b	.L3512
+.L3527:
+	ldr	x0, [x29, 128]
+	ldrh	w11, [x28, x0]
+	mov	w0, 65535
+	cmp	w11, w0
+	beq	.L3514
+	ldr	x0, [x29, 112]
+	cmp	w25, 3
+	ldrh	w8, [x0]
+	mul	w1, w8, w11
+	add	w0, w21, w1
+	bne	.L3515
+	adrp	x2, .LANCHOR36
+	ldrb	w2, [x2, #:lo12:.LANCHOR36]
+	cbz	w2, .L3516
+	adrp	x1, .LANCHOR79
+	ldrb	w8, [x1, #:lo12:.LANCHOR79]
+	ldr	w1, [x29, 156]
+.L3543:
+	add	w0, w0, w1
+	orr	w27, w0, w8, lsl 24
+	b	.L3517
+.L3516:
+	adrp	x2, .LANCHOR37
+	lsl	w8, w21, 24
+	ldrb	w2, [x2, #:lo12:.LANCHOR37]
+	cbz	w2, .L3518
+	ldr	w1, [x29, 156]
+	add	w0, w0, w1
+	orr	w27, w0, w8
+.L3517:
+	str	w27, [x26, 40]
+	mov	w1, 1
+	str	w11, [x29, 100]
+	mov	x0, x26
+	bl	sblk_read_page
+	ldr	x1, [x26, 24]
+	mov	w3, w27
+	ldr	x0, [x26, 8]
+	ldr	w12, [x26, 52]
+	ldr	w11, [x29, 100]
+	ldr	w2, [x1, 12]
+	mov	w4, w12
+	str	w2, [sp, 32]
+	str	w12, [x29, 104]
+	ldr	w2, [x1, 8]
+	str	w2, [sp, 24]
+	ldr	w2, [x1, 4]
+	str	w2, [sp, 16]
+	mov	w2, w19
+	ldr	w1, [x1]
+	str	w1, [sp, 8]
+	ldr	w1, [x0, 12]
+	str	w1, [sp]
+	mov	w1, w11
+	ldp	w5, w6, [x0]
+	ldr	w7, [x0, 8]
+	ldr	x0, [x29, 120]
+	bl	printf
+	ldr	w12, [x29, 104]
+	mov	w1, 32
+	ldr	w0, [x29, 168]
+	cmp	w12, 512
+	ccmn	w12, #1, 4, ne
+	csinc	w0, w0, wzr, ne
+	str	w0, [x29, 168]
+	ldr	x0, [x24, #:lo12:.LANCHOR7]
+	add	x0, x0, x23
+	ldrb	w0, [x0, 2]
+	and	w0, w0, 224
+	cmp	w0, 224
+	ccmp	w0, w1, 4, ne
+	beq	.L3514
+	ldr	x0, [x26, 24]
+	ldr	w0, [x0, 4]
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 204]
+	cmn	w0, #1
+	bne	.L3521
+	ldr	x0, [x26, 24]
+	mov	w2, 0
+	add	x1, x29, 204
+	ldr	w0, [x0, 4]
+	bl	pm_log2phys
+.L3521:
+	ldr	w0, [x29, 204]
+	cmp	w27, w0
+	bne	.L3522
+	ldr	w0, [x29, 172]
+	mov	w1, w27
+	add	w0, w0, 1
+	str	w0, [x29, 172]
+	ldr	x0, [x26, 24]
+	ldr	w3, [x29, 172]
+	ldr	w2, [x0, 4]
+	adrp	x0, .LC222
+	add	x0, x0, :lo12:.LC222
+	bl	printf
+.L3522:
+	ldr	x0, [x29, 160]
+	cbz	x0, .L3524
+	ldr	x0, [x29, 176]
+	ubfiz	x3, x0, 2, 32
+	ldr	x0, [x29, 160]
+	ldr	w2, [x0, x3]
+	ldr	x0, [x26, 24]
+	ldr	w0, [x0, 4]
+	cmp	w0, w2
+	beq	.L3525
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L3525
+	ldr	w1, [x29, 176]
+	adrp	x0, .LC223
+	str	x3, [x29, 104]
+	add	x0, x0, :lo12:.LC223
+	bl	printf
+	ldr	x3, [x29, 104]
+.L3525:
+	ldr	x1, [x26, 24]
+	ldr	x0, [x29, 160]
+	ldr	w1, [x1, 4]
+	ldr	w0, [x0, x3]
+	cmp	w1, w0
+	beq	.L3524
+	cmn	w0, #1
+	beq	.L3524
+	adrp	x1, .LANCHOR229
+	adrp	x0, .LC0
+	mov	w2, 1567
+	add	x1, x1, :lo12:.LANCHOR229
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L3524:
+	ldr	w0, [x29, 176]
+	add	w0, w0, 1
+	str	w0, [x29, 176]
+.L3514:
+	add	w21, w21, 1
+	and	w21, w21, 65535
+.L3529:
+	cmp	w25, w21
+	bcs	.L3527
+	add	w22, w22, 1
+	and	w22, w22, 65535
+.L3531:
+	ldrb	w0, [x29, 217]
+	cmp	w0, w22
+	bls	.L3528
+	sxtw	x0, w22
+	mov	w21, 1
+	add	x0, x0, 8
+	lsl	x0, x0, 1
+	str	x0, [x29, 128]
+	b	.L3529
+.L3518:
+	add	w1, w19, w1
+	orr	w27, w8, w1
+	b	.L3517
+.L3515:
+	cmp	w25, 2
+	bne	.L3519
+	adrp	x1, .LANCHOR79
+	ldrb	w8, [x1, #:lo12:.LANCHOR79]
+	ldr	w1, [x29, 152]
+	b	.L3543
+.L3519:
+	add	w27, w19, w1
+	b	.L3517
+.L3528:
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L3513
+.L3530:
+	mov	x0, x26
+	bl	zbuf_free
+	adrp	x0, .LANCHOR9
+	ldr	x1, [x29, 144]
+	ldr	w3, [x29, 172]
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrh	w2, [x0, x1, lsl 1]
+	mov	w1, w20
+	adrp	x0, .LC224
+	add	x0, x0, :lo12:.LC224
+	bl	printf
+	ldr	w0, [x29, 168]
+.L3510:
+	ldp	x19, x20, [sp, 64]
+	ldp	x21, x22, [sp, 80]
+	ldp	x23, x24, [sp, 96]
+	ldp	x25, x26, [sp, 112]
+	ldp	x27, x28, [sp, 128]
+	ldp	x29, x30, [sp, 48]
+	add	sp, sp, 288
+	ret
+.L3533:
+	mov	w0, 0
+	b	.L3510
+	.size	ftl_sblk_dump, .-ftl_sblk_dump
+	.section	.text.zftl_read,"ax",@progbits
+	.align	2
+	.global	zftl_read
+	.type	zftl_read, %function
+zftl_read:
+	sub	sp, sp, #208
+	stp	x29, x30, [sp, 16]
+	add	x29, sp, 16
+	stp	x19, x20, [sp, 32]
+	mov	w19, w0
+	adrp	x0, .LANCHOR14
+	stp	x21, x22, [sp, 48]
+	stp	x23, x24, [sp, 64]
+	mov	w20, w1
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	mov	w23, w2
+	stp	x25, x26, [sp, 80]
+	mov	x22, x3
+	stp	x27, x28, [sp, 96]
+	tbz	x0, 12, .L3545
+	mov	w3, w2
+	adrp	x0, .LC225
+	mov	w2, w1
+	add	x0, x0, :lo12:.LC225
+	mov	w1, w19
+	bl	printf
+.L3545:
+	cbnz	w19, .L3546
+	adrp	x0, .LANCHOR68
+	mov	w19, 24576
+	ldr	w0, [x0, #:lo12:.LANCHOR68]
+.L3547:
+	cmp	w0, w20
+	ccmp	w0, w23, 0, hi
+	bcc	.L3577
+	add	w1, w20, w23
+	cmp	w0, w1
+	bcc	.L3577
+	adrp	x1, .LANCHOR110
+	adrp	x26, .LANCHOR131
+	add	w19, w19, w20
+	str	x1, [x29, 120]
+	ldr	x2, [x1, #:lo12:.LANCHOR110]
+	str	x26, [x29, 168]
+	ldr	w0, [x2, 24]
+	add	w0, w0, w23
+	str	w0, [x2, 24]
+	ldrb	w0, [x26, #:lo12:.LANCHOR131]
+	add	w2, w23, w19
+	stp	w2, wzr, [x29, 160]
+	sub	w2, w2, #1
+	udiv	w27, w19, w0
+	udiv	w0, w2, w0
+	mov	w20, w27
+	sub	w25, w0, w27
+	str	w0, [x29, 156]
+	add	w25, w25, 1
+	adrp	x0, .LANCHOR134
+	add	x28, x0, :lo12:.LANCHOR134
+.L3549:
+	cbnz	w25, .L3574
+	ldr	w0, [x29, 164]
+.L3544:
+	ldp	x19, x20, [sp, 32]
+	ldp	x21, x22, [sp, 48]
+	ldp	x23, x24, [sp, 64]
+	ldp	x25, x26, [sp, 80]
+	ldp	x27, x28, [sp, 96]
+	ldp	x29, x30, [sp, 16]
+	add	sp, sp, 208
+	ret
+.L3546:
+	cmp	w19, 3
+	bhi	.L3577
+	lsl	w19, w19, 13
+	mov	w0, 8192
+	b	.L3547
+.L3574:
+	ldr	x0, [x29, 168]
+	cmp	w20, w27
+	ldrb	w1, [x0, #:lo12:.LANCHOR131]
+	ldr	w0, [x29, 156]
+	and	w24, w1, 65535
+	ccmp	w20, w0, 4, ne
+	bne	.L3578
+	cmp	w20, w27
+	bne	.L3551
+	udiv	w3, w19, w1
+	and	w0, w23, 65535
+	msub	w1, w3, w1, w19
+	and	w26, w1, 65535
+	sub	w24, w24, w26
+	and	w24, w24, 65535
+	cmp	w23, w24
+	csel	w24, w0, w24, cc
+.L3550:
+	adrp	x21, .LANCHOR56
+	add	x1, x21, :lo12:.LANCHOR56
+	add	x1, x1, 2
+	mov	w0, 0
+.L3554:
+	ldr	w2, [x1, 34]
+	cmp	w20, w2
+	bne	.L3552
+	ldrb	w2, [x1]
+	tbz	x2, 3, .L3552
+	add	x1, x21, :lo12:.LANCHOR56
+	ubfiz	x0, x0, 6, 32
+	add	x0, x1, x0
+	lsl	w2, w24, 9
+	ubfiz	x24, x24, 9, 16
+	ubfiz	x26, x26, 9, 16
+	ldr	x1, [x0, 8]
+	mov	x0, x22
+	add	x22, x22, x24
+	add	x1, x1, x26
+	bl	ftl_memcpy
+.L3553:
+	add	w20, w20, 1
+	sub	w25, w25, #1
+.L3560:
+	adrp	x0, .LANCHOR58
+	ldrb	w0, [x0, #:lo12:.LANCHOR58]
+	cmp	w0, 2
+	bls	.L3561
+	cbnz	w25, .L3549
+.L3561:
+	adrp	x0, .LANCHOR134
+	ldrb	w1, [x0, #:lo12:.LANCHOR134]
+	cbz	w1, .L3549
+	adrp	x24, .LANCHOR133
+	add	x0, x21, :lo12:.LANCHOR56
+	ldrb	w2, [x24, #:lo12:.LANCHOR133]
+	add	x0, x0, x2, lsl 6
+	bl	sblk_read_page
+	adrp	x0, .LANCHOR230
+	add	x0, x0, :lo12:.LANCHOR230
+	str	x0, [x29, 136]
+	adrp	x0, .LC0
+	add	x0, x0, :lo12:.LC0
+	str	x0, [x29, 128]
+.L3563:
+	ldrb	w0, [x28]
+	cbnz	w0, .L3573
+	mov	w0, -1
+	strb	wzr, [x28]
+	strb	w0, [x24, #:lo12:.LANCHOR133]
+	b	.L3549
+.L3551:
+	ldr	w0, [x29, 160]
+	msub	w24, w1, w20, w0
+	and	w24, w24, 255
+.L3578:
+	mov	w26, 0
+	b	.L3550
+.L3552:
+	add	w0, w0, 1
+	add	x1, x1, 64
+	cmp	w0, 16
+	bne	.L3554
+	mov	w0, w20
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 188]
+	cmn	w0, #1
+	bne	.L3555
+	mov	w2, 0
+	add	x1, x29, 188
+	mov	w0, w20
+	bl	pm_log2phys
+.L3555:
+	ldr	w0, [x29, 188]
+	cmn	w0, #1
+	bne	.L3556
+	ldr	x0, [x29, 168]
+	mov	w24, 0
+	add	x26, x0, :lo12:.LANCHOR131
+.L3557:
+	ldrb	w0, [x26]
+	cmp	w24, w0
+	bcs	.L3553
+	madd	w0, w20, w0, w24
+	cmp	w19, w0
+	bhi	.L3558
+	ldr	w1, [x29, 160]
+	cmp	w1, w0
+	bls	.L3558
+	mov	x0, x22
+	add	x22, x22, 512
+	mov	w2, 512
+	mov	w1, 0
+	bl	ftl_memset
+.L3558:
+	add	w24, w24, 1
+	b	.L3557
+.L3556:
+	mov	w0, 0
+	bl	buf_alloc
+	cbz	x0, .L3560
+	ldr	x2, [x29, 120]
+	ldr	x4, [x2, #:lo12:.LANCHOR110]
+	ldr	w2, [x4, 40]
+	add	w2, w2, 1
+	str	w2, [x4, 40]
+	ldr	w2, [x29, 188]
+	strb	w24, [x0, 56]
+	ubfiz	x24, x24, 9, 16
+	str	x22, [x0, 16]
+	add	x22, x22, x24
+	strb	w26, [x0, 57]
+	stp	w20, w2, [x0, 36]
+	str	w2, [x0, 44]
+	bl	zftl_add_read_buf
+	b	.L3553
+.L3573:
+	ldrb	w0, [x24, #:lo12:.LANCHOR133]
+	cmp	w0, 255
+	bne	.L3564
+	ldp	x0, x1, [x29, 128]
+	mov	w2, 1276
+	bl	printf
+.L3564:
+	ldrb	w26, [x24, #:lo12:.LANCHOR133]
+	add	x0, x21, :lo12:.LANCHOR56
+	ubfiz	x1, x26, 6, 8
+	lsl	x2, x26, 6
+	add	x1, x0, x1
+	str	x1, [x29, 144]
+	add	x1, x0, x2
+	ldrb	w0, [x0, x2]
+	strb	w0, [x24, #:lo12:.LANCHOR133]
+	ldr	w10, [x1, 52]
+	cmn	w10, #1
+	bne	.L3565
+	adrp	x0, .LANCHOR10
+	str	w10, [x29, 164]
+	ldr	x1, [x0, #:lo12:.LANCHOR10]
+	ldr	w0, [x1, 552]
+	add	w0, w0, 1
+	str	w0, [x1, 552]
+.L3566:
+	add	x1, x21, :lo12:.LANCHOR56
+	add	x1, x1, x26, lsl 6
+	ldr	x0, [x1, 24]
+	ldr	w3, [x1, 36]
+	ldr	w1, [x0, 4]
+	cmp	w1, w3
+	bne	.L3567
+	cmn	w10, #1
+	bne	.L3568
+.L3567:
+	adrp	x1, .LANCHOR10
+	add	x11, x21, :lo12:.LANCHOR56
+	add	x11, x11, x26, lsl 6
+	str	w10, [x29, 152]
+	ldr	x2, [x1, #:lo12:.LANCHOR10]
+	str	x11, [x29, 112]
+	ldr	w1, [x2, 552]
+	add	w1, w1, 1
+	str	w1, [x2, 552]
+	ldrb	w1, [x11, 1]
+	ldr	w2, [x0, 12]
+	str	w2, [sp]
+	mov	w2, w10
+	ldp	w5, w6, [x0]
+	ldr	w7, [x0, 8]
+	adrp	x0, .LC227
+	ldr	w4, [x11, 40]
+	add	x0, x0, :lo12:.LC227
+	bl	printf
+	adrp	x0, .LANCHOR75
+	ldr	x11, [x29, 112]
+	ldrh	w2, [x0, #:lo12:.LANCHOR75]
+	adrp	x0, .LANCHOR32
+	ldrb	w1, [x0, #:lo12:.LANCHOR32]
+	mov	w0, 24
+	sub	w0, w0, w1
+	sub	w1, w0, w2
+	mov	w0, 1
+	lsl	w0, w0, w1
+	ldr	w1, [x11, 40]
+	sub	w0, w0, #1
+	lsr	w1, w1, w2
+	and	w0, w0, w1
+	adrp	x1, .LANCHOR76
+	ldrb	w2, [x1, #:lo12:.LANCHOR76]
+	mov	x1, 0
+	udiv	w0, w0, w2
+	bl	ftl_sblk_dump
+	ldr	w10, [x29, 152]
+.L3568:
+	add	x0, x21, :lo12:.LANCHOR56
+	add	x0, x0, x26, lsl 6
+	ldr	x1, [x0, 24]
+	ldr	w0, [x0, 36]
+	ldr	w1, [x1, 4]
+	cmp	w1, w0
+	bne	.L3569
+	cmn	w10, #1
+	bne	.L3570
+.L3569:
+	ldp	x0, x1, [x29, 128]
+	mov	w2, 1301
+	bl	printf
+.L3570:
+	add	x0, x21, :lo12:.LANCHOR56
+	add	x8, x0, x26, lsl 6
+	ldr	x0, [x29, 168]
+	ldrb	w2, [x8, 56]
+	ldrb	w0, [x0, #:lo12:.LANCHOR131]
+	cmp	w0, w2
+	bls	.L3571
+	ldrb	w0, [x8, 57]
+	lsl	w2, w2, 9
+	ldr	x1, [x8, 8]
+	ubfiz	x0, x0, 9, 8
+	add	x1, x1, x0
+	ldr	x0, [x8, 16]
+	bl	ftl_memcpy
+.L3572:
+	ldr	x1, [x29, 144]
+	adrp	x0, .LANCHOR63
+	add	x0, x0, :lo12:.LANCHOR63
+	bl	buf_remove_buf
+	ldr	x0, [x29, 144]
+	bl	zbuf_free
+	ldrb	w0, [x28]
+	sub	w0, w0, #1
+	strb	w0, [x28]
+	b	.L3563
+.L3565:
+	cmp	w10, 256
+	bne	.L3566
+	adrp	x2, .LANCHOR32
+	adrp	x0, .LANCHOR75
+	mov	w4, 24
+	mov	w5, 1
+	ldrb	w2, [x2, #:lo12:.LANCHOR32]
+	ldrh	w0, [x0, #:lo12:.LANCHOR75]
+	sub	w4, w4, w2
+	stp	w10, w5, [x29, 108]
+	ldp	w2, w3, [x1, 36]
+	sub	w4, w4, w0
+	lsl	w4, w5, w4
+	sub	w4, w4, #1
+	lsr	w0, w3, w0
+	and	w4, w4, w0
+	adrp	x0, .LANCHOR76
+	ldrb	w0, [x0, #:lo12:.LANCHOR76]
+	udiv	w4, w4, w0
+	adrp	x0, .LC226
+	add	x0, x0, :lo12:.LC226
+	and	w1, w4, 65535
+	str	w4, [x29, 152]
+	bl	printf
+	ldr	w5, [x29, 112]
+	mov	w2, 0
+	ldr	w4, [x29, 152]
+	mov	w1, w5
+	mov	w0, w4
+	bl	gc_add_sblk
+	ldr	w10, [x29, 108]
+	b	.L3566
+.L3571:
+	ldrb	w0, [x8, 2]
+	and	w0, w0, -9
+	strb	w0, [x8, 2]
+	b	.L3572
+.L3577:
+	mov	w0, -1
+	b	.L3544
+	.size	zftl_read, .-zftl_read
+	.section	.text.zftl_sys_read,"ax",@progbits
+	.align	2
+	.global	zftl_sys_read
+	.type	zftl_sys_read, %function
+zftl_sys_read:
+	mov	x3, x2
+	mov	w2, w1
+	mov	w1, w0
+	mov	w0, 2
+	b	zftl_read
+	.size	zftl_sys_read, .-zftl_sys_read
+	.section	.text.StorageSysDataLoad,"ax",@progbits
+	.align	2
+	.global	StorageSysDataLoad
+	.type	StorageSysDataLoad, %function
+StorageSysDataLoad:
+	stp	x29, x30, [sp, -32]!
+	mov	w2, 512
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x1
+	mov	w20, w0
+	mov	w1, 0
+	mov	x0, x19
+	bl	ftl_memset
+	mov	x3, x19
+	mov	w1, w20
+	ldp	x19, x20, [sp, 16]
+	mov	w2, 1
+	ldp	x29, x30, [sp], 32
+	mov	w0, 2
+	b	zftl_read
+	.size	StorageSysDataLoad, .-StorageSysDataLoad
+	.section	.text.FlashBootVendorRead,"ax",@progbits
+	.align	2
+	.global	FlashBootVendorRead
+	.type	FlashBootVendorRead, %function
+FlashBootVendorRead:
+	mov	x3, x2
+	mov	w2, w1
+	add	w1, w0, 512
+	mov	w0, 2
+	b	zftl_read
+	.size	FlashBootVendorRead, .-FlashBootVendorRead
+	.section	.text.ftl_read,"ax",@progbits
+	.align	2
+	.global	ftl_read
+	.type	ftl_read, %function
+ftl_read:
+	and	w0, w0, 255
+	b	zftl_read
+	.size	ftl_read, .-ftl_read
+	.section	.text.ftl_vendor_read,"ax",@progbits
+	.align	2
+	.global	ftl_vendor_read
+	.type	ftl_vendor_read, %function
+ftl_vendor_read:
+	mov	x3, x2
+	mov	w2, w1
+	add	w1, w0, 512
+	mov	w0, 2
+	b	zftl_read
+	.size	ftl_vendor_read, .-ftl_vendor_read
+	.section	.text.zftl_vendor_read,"ax",@progbits
+	.align	2
+	.global	zftl_vendor_read
+	.type	zftl_vendor_read, %function
+zftl_vendor_read:
+	b	ftl_vendor_read
+	.size	zftl_vendor_read, .-zftl_vendor_read
+	.section	.text.ftl_update_l2p_map,"ax",@progbits
+	.align	2
+	.global	ftl_update_l2p_map
+	.type	ftl_update_l2p_map, %function
+ftl_update_l2p_map:
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	mov	x22, x0
+	stp	x19, x20, [sp, 16]
+	adrp	x0, .LANCHOR95
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	ldrh	w23, [x0, #:lo12:.LANCHOR95]
+	ldrb	w0, [x22, 9]
+	ldrh	w19, [x22, 12]
+	mul	w23, w23, w0
+	adrp	x0, .LANCHOR117
+	str	x0, [x29, 104]
+	ldr	x1, [x0, #:lo12:.LANCHOR117]
+	add	x19, x1, x19, lsl 2
+	add	x1, x19, x23, sxtw 2
+	ldr	w1, [x1, -4]
+	cmn	w1, #1
+	beq	.L3601
+	adrp	x1, .LANCHOR231
+	adrp	x0, .LC0
+	mov	w2, 1990
+	add	x1, x1, :lo12:.LANCHOR231
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L3601:
+	adrp	x27, .LANCHOR131
+	mov	x24, 0
+	add	x0, x27, :lo12:.LANCHOR131
+	mov	w21, 0
+	str	x0, [x29, 96]
+.L3602:
+	cmp	w24, w23
+	blt	.L3608
+	adrp	x0, .LANCHOR14
+	adrp	x19, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L3609
+	ldrh	w1, [x22]
+	ldr	x2, [x19, #:lo12:.LANCHOR9]
+	ubfiz	x0, x1, 1, 16
+	ldrh	w3, [x2, x0]
+	adrp	x0, .LC231
+	mov	w2, w21
+	add	x0, x0, :lo12:.LC231
+	bl	printf
+.L3609:
+	ldrh	w1, [x22]
+	ldr	x0, [x19, #:lo12:.LANCHOR9]
+	ldp	x23, x24, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	strh	w21, [x0, x1, lsl 1]
+	ldp	x25, x26, [sp, 64]
+	ldp	x21, x22, [sp, 32]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+.L3608:
+	ldr	w2, [x19, x24, lsl 2]
+	cmn	w2, #1
+	beq	.L3603
+	ldrb	w20, [x27, #:lo12:.LANCHOR131]
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	lsl	w20, w20, 7
+	udiv	w20, w2, w20
+	and	w20, w20, 65535
+	tbz	x0, 12, .L3604
+	adrp	x0, .LC228
+	mov	w3, w24
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC228
+	bl	printf
+.L3604:
+	adrp	x25, .LANCHOR111
+	adrp	x26, .LC229
+	mov	x28, x24
+	add	x25, x25, :lo12:.LANCHOR111
+	add	x26, x26, :lo12:.LC229
+.L3607:
+	ldr	w1, [x19, x28, lsl 2]
+	cmn	w1, #1
+	beq	.L3605
+	ldr	x0, [x29, 96]
+	ldrb	w2, [x0]
+	lsl	w2, w2, 7
+	udiv	w1, w1, w2
+	cmp	w20, w1, uxth
+	bne	.L3605
+	ldrb	w0, [x22, 9]
+	sdiv	w1, w28, w0
+	msub	w0, w1, w0, w28
+	add	x0, x22, x0, sxtw 1
+	ldrh	w2, [x0, 16]
+	ldrh	w0, [x25]
+	madd	w2, w2, w0, w1
+	mov	x0, x26
+	str	w2, [x29, 124]
+	ldr	w1, [x19, x28, lsl 2]
+	bl	pm_ppa_update_check
+	cbz	w0, .L3606
+	ldr	x0, [x29, 104]
+	mov	w3, w23
+	mov	w2, 4
+	ldr	x1, [x0, #:lo12:.LANCHOR117]
+	adrp	x0, .LC230
+	add	x0, x0, :lo12:.LC230
+	bl	rknand_print_hex
+.L3606:
+	ldr	w0, [x19, x28, lsl 2]
+	add	w21, w21, 1
+	mov	w2, 1
+	add	x1, x29, 124
+	and	w21, w21, 65535
+	bl	pm_log2phys
+	mov	w0, -1
+	str	w0, [x19, x28, lsl 2]
+.L3605:
+	add	x28, x28, 1
+	cmp	w23, w28
+	bgt	.L3607
+.L3603:
+	add	x24, x24, 1
+	b	.L3602
+	.size	ftl_update_l2p_map, .-ftl_update_l2p_map
+	.section	.text.ftl_alloc_new_data_sblk,"ax",@progbits
+	.align	2
+	.global	ftl_alloc_new_data_sblk
+	.type	ftl_alloc_new_data_sblk, %function
+ftl_alloc_new_data_sblk:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x20, x0
+	str	x21, [sp, 32]
+	ldrh	w21, [x0]
+	bl	ftl_update_l2p_map
+	bl	pm_flush
+	ldrh	w0, [x20]
+	mov	w1, 65535
+	cmp	w0, w1
+	beq	.L3631
+	bl	zftl_insert_data_list
+.L3631:
+	adrp	x19, .LANCHOR10
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	add	x0, x0, 16
+	cmp	x20, x0
+	mov	x0, x20
+	cset	w1, ne
+	add	w1, w1, 2
+	bl	ftl_open_sblk_init
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	ldr	w0, [x0, 560]
+	cmp	w0, w21
+	bne	.L3633
+	mov	w20, 65535
+	cmp	w21, w20
+	beq	.L3633
+	mov	w1, w21
+	adrp	x0, .LC232
+	add	x0, x0, :lo12:.LC232
+	bl	printf
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	ldr	w0, [x0, 564]
+	bl	gc_mark_bad_ppa
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	mov	w1, -1
+	str	w20, [x0, 560]
+	str	w1, [x0, 564]
+.L3633:
+	bl	ftl_ext_info_flush
+	mov	w0, 0
+	bl	ftl_info_flush
+	bl	lpa_rebuild_hash
+	ldr	x21, [sp, 32]
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+	.size	ftl_alloc_new_data_sblk, .-ftl_alloc_new_data_sblk
+	.section	.text.ftl_write_commit,"ax",@progbits
+	.align	2
+	.global	ftl_write_commit
+	.type	ftl_write_commit, %function
+ftl_write_commit:
+	stp	x29, x30, [sp, -160]!
+	adrp	x0, .LANCHOR56
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	add	x24, x0, :lo12:.LANCHOR56
+	add	x0, x24, 1026
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	str	x0, [x29, 104]
+.L3637:
+	adrp	x2, .LANCHOR67
+	ldrb	w1, [x2, #:lo12:.LANCHOR67]
+	cbz	w1, .L3639
+	adrp	x3, .LANCHOR66
+	adrp	x0, .LANCHOR56
+	add	x0, x0, :lo12:.LANCHOR56
+	sub	w1, w1, #1
+	ldrb	w4, [x3, #:lo12:.LANCHOR66]
+	strb	w1, [x2, #:lo12:.LANCHOR67]
+	ubfiz	x28, x4, 6, 8
+	add	x5, x0, x28
+	stp	x4, x5, [x29, 128]
+	lsl	x4, x4, 6
+	add	x5, x0, x4
+	ldrb	w0, [x0, x4]
+	strb	w0, [x3, #:lo12:.LANCHOR66]
+	adrp	x0, .LANCHOR128
+	ldr	w2, [x5, 36]
+	mov	x19, x0
+	ldr	w1, [x0, #:lo12:.LANCHOR128]
+	cmp	w2, w1
+	bcc	.L3641
+	adrp	x1, .LANCHOR232
+	adrp	x0, .LC0
+	mov	w2, 604
+	add	x1, x1, :lo12:.LANCHOR232
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L3641:
+	ldr	x0, [x29, 128]
+	ldr	w1, [x19, #:lo12:.LANCHOR128]
+	add	x0, x24, x0, lsl 6
+	ldr	w22, [x0, 36]
+	cmp	w22, w1
+	bcc	.L3642
+	ldr	x0, [x29, 136]
+	bl	zbuf_free
+	mov	w0, -1
+.L3636:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 160
+	ret
+.L3642:
+	ldrb	w21, [x0, 57]
+	ldrb	w20, [x0, 56]
+	ldr	x26, [x0, 8]
+	ldr	x23, [x0, 24]
+	adrp	x0, .LANCHOR129
+	str	x0, [x29, 120]
+	ldrb	w1, [x0, #:lo12:.LANCHOR129]
+	cbz	w1, .L3644
+	adrp	x0, .LANCHOR185
+	ldrb	w19, [x0, #:lo12:.LANCHOR185]
+	add	x19, x24, x19, lsl 6
+.L3645:
+	ldrb	w0, [x19]
+	cmp	w0, 255
+	bne	.L3646
+	ldr	w0, [x19, 36]
+	cmp	w22, w0
+	bne	.L3644
+	ldr	x0, [x19, 8]
+	ubfiz	x21, x21, 9, 8
+	lsl	w2, w20, 9
+	add	x1, x26, x21
+	add	x0, x0, x21
+	bl	ftl_memcpy
+	adrp	x0, .LANCHOR131
+	ldr	x2, [x19, 8]
+	ldr	x1, [x19, 24]
+	ldrb	w0, [x0, #:lo12:.LANCHOR131]
+	add	x1, x1, 16
+	sub	w0, w0, #2
+	lsl	w0, w0, 7
+	add	x2, x2, x0, sxtw 2
+	mov	w0, 2
+	bl	ftl_debug_info_fill
+	ldr	x0, [x29, 136]
+	bl	zbuf_free
+	b	.L3637
+.L3646:
+	ubfiz	x19, x0, 6, 8
+	add	x19, x24, x19
+	b	.L3645
+.L3644:
+	mov	w0, w22
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 156]
+	cmn	w0, #1
+	bne	.L3648
+	mov	w2, 0
+	add	x1, x29, 156
+	mov	w0, w22
+	bl	pm_log2phys
+.L3648:
+	adrp	x27, .LANCHOR10
+	ldr	w2, [x29, 156]
+	add	x0, x24, 2
+	mov	w3, 0
+	ldr	x19, [x27, #:lo12:.LANCHOR10]
+	mov	x25, 0
+	add	x19, x19, 16
+.L3650:
+	ldr	w1, [x0, 34]
+	cmp	w22, w1
+	bne	.L3649
+	ldrb	w1, [x0]
+	tbz	x1, 3, .L3649
+	ldr	w2, [x0, 38]
+	and	w1, w1, -9
+	ldr	x25, [x0, 6]
+	mov	w3, 1
+	strb	w1, [x0]
+.L3649:
+	ldr	x1, [x29, 104]
+	add	x0, x0, 64
+	cmp	x0, x1
+	bne	.L3650
+	cbz	w3, .L3651
+	str	w2, [x29, 156]
+.L3651:
+	adrp	x0, .LANCHOR131
+	str	x0, [x29, 112]
+	ldrb	w1, [x0, #:lo12:.LANCHOR131]
+	cmp	w20, w1
+	bcs	.L3675
+	add	w20, w21, w20
+	cbz	x25, .L3653
+	cbz	w21, .L3654
+	lsl	w2, w21, 9
+	mov	x1, x25
+	mov	x0, x26
+	bl	ftl_memcpy
+	ldr	x19, [x27, #:lo12:.LANCHOR10]
+	add	x19, x19, 48
+.L3654:
+	ldr	x0, [x29, 112]
+	ldrb	w2, [x0, #:lo12:.LANCHOR131]
+	cmp	w20, w2
+	bcc	.L3655
+	ldr	x19, [x27, #:lo12:.LANCHOR10]
+	add	x19, x19, 16
+.L3675:
+	mov	w25, 0
+	b	.L3652
+.L3655:
+	ubfiz	x0, x20, 9, 9
+	sub	w2, w2, w20
+	add	x1, x25, x0
+	lsl	w2, w2, 9
+	add	x0, x26, x0
+	bl	ftl_memcpy
+	b	.L3675
+.L3653:
+	ldr	w0, [x29, 156]
+	cmn	w0, #1
+	beq	.L3656
+	mov	w0, 1
+	bl	buf_alloc
+	ldr	w1, [x29, 156]
+	mov	x28, x0
+	stp	w22, w1, [x0, 36]
+	mov	w1, 1
+	bl	sblk_read_page
+	ldr	x0, [x28, 24]
+	ldr	w25, [x0, 12]
+	ldr	w0, [x0, 4]
+	add	w25, w25, 1
+	cmp	w22, w0
+	bne	.L3657
+	ldr	w0, [x28, 52]
+	cmn	w0, #1
+	bne	.L3658
+.L3657:
+	ldr	x1, [x27, #:lo12:.LANCHOR10]
+	mov	w3, w22
+	ldr	w4, [x28, 52]
+	ldr	w2, [x29, 156]
+	ldr	w0, [x1, 552]
+	add	w0, w0, 1
+	str	w0, [x1, 552]
+	adrp	x0, .LC233
+	add	x0, x0, :lo12:.LC233
+	ldrb	w1, [x28, 1]
+	bl	printf
+	ldr	x1, [x28, 24]
+	mov	w3, 4
+	adrp	x0, .LC205
+	mov	w2, w3
+	add	x0, x0, :lo12:.LC205
+	bl	rknand_print_hex
+.L3658:
+	ldr	x0, [x28, 24]
+	ldr	w0, [x0, 4]
+	cmp	w22, w0
+	bne	.L3659
+	ldr	w0, [x28, 52]
+	cmn	w0, #1
+	bne	.L3660
+.L3659:
+	adrp	x1, .LANCHOR232
+	adrp	x0, .LC0
+	mov	w2, 691
+	add	x1, x1, :lo12:.LANCHOR232
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L3660:
+	cbz	w21, .L3661
+	ldr	w0, [x29, 156]
+	lsl	w2, w21, 9
+	cmn	w0, #1
+	beq	.L3662
+	ldr	x1, [x28, 8]
+	mov	x0, x26
+	bl	ftl_memcpy
+.L3663:
+	ldr	x19, [x27, #:lo12:.LANCHOR10]
+	add	x19, x19, 48
+.L3661:
+	ldr	x0, [x29, 112]
+	ldrb	w2, [x0, #:lo12:.LANCHOR131]
+	cmp	w20, w2
+	bcc	.L3664
+	bls	.L3665
+	ldr	x19, [x27, #:lo12:.LANCHOR10]
+	add	x19, x19, 16
+.L3665:
+	cbz	x28, .L3652
+	ldrb	w0, [x28, 2]
+	mov	x1, x28
+	and	w0, w0, -9
+	strb	w0, [x28, 2]
+	adrp	x0, .LANCHOR63
+	add	x0, x0, :lo12:.LANCHOR63
+	bl	buf_remove_buf
+	mov	x0, x28
+	bl	zbuf_free
+.L3652:
+	ldrh	w0, [x19, 6]
+	cbnz	w0, .L3667
+	bl	ftl_flush
+	mov	x0, x19
+	bl	ftl_alloc_new_data_sblk
+.L3667:
+	mov	x0, x19
+	bl	ftl_get_new_free_page
+	mov	w10, w0
+	ldr	x0, [x29, 128]
+	mov	x1, x23
+	adrp	x20, .LANCHOR185
+	lsl	x8, x0, 6
+	add	x7, x24, x8
+	ldr	w0, [x7, 32]
+	stp	w0, w22, [x23]
+	str	w25, [x23, 12]
+	ldr	w0, [x29, 156]
+	str	w0, [x23, 8]
+	ldr	x0, [x29, 112]
+	str	wzr, [x1, 16]!
+	ldrb	w2, [x0, #:lo12:.LANCHOR131]
+	mov	w0, 2
+	sub	w2, w2, #2
+	lsl	w2, w2, 7
+	add	x2, x26, x2, sxtw 2
+	bl	ftl_debug_info_fill
+	ldr	w0, [x29, 156]
+	mov	w1, 10
+	stp	w10, w0, [x7, 40]
+	mov	w0, -1
+	strb	w0, [x24, x8]
+	ldrb	w0, [x7, 2]
+	orr	w0, w0, w1
+	ldrh	w1, [x19, 12]
+	strb	w0, [x7, 2]
+	ldrh	w0, [x19, 10]
+	add	w0, w0, w1
+	ldr	x1, [x29, 136]
+	sub	w0, w0, #1
+	strh	w0, [x7, 48]
+	add	x0, x20, :lo12:.LANCHOR185
+	bl	buf_add_tail
+	ldr	x0, [x29, 120]
+	ldrb	w2, [x0, #:lo12:.LANCHOR129]
+	add	w2, w2, 1
+	and	w2, w2, 255
+	strb	w2, [x0, #:lo12:.LANCHOR129]
+	adrp	x0, .LANCHOR233
+	cmp	w2, 2
+	str	wzr, [x0, #:lo12:.LANCHOR233]
+	ldrh	w0, [x19, 6]
+	bhi	.L3668
+	cmp	w0, 1
+	bne	.L3640
+.L3668:
+	ldrb	w1, [x19, 5]
+	cmp	w1, 0
+	mov	w1, 0
+	cset	w4, ne
+	cmp	w0, 1
+	ldrb	w0, [x20, #:lo12:.LANCHOR185]
+	csinc	w4, w2, w4, eq
+	mov	w3, w0
+.L3672:
+	cmp	w1, w4
+	bne	.L3673
+	strb	w3, [x20, #:lo12:.LANCHOR185]
+	and	w1, w1, 255
+	ldr	x3, [x29, 120]
+	sub	w2, w2, w1
+	ubfiz	x0, x0, 6, 8
+	add	x0, x24, x0
+	strb	w2, [x3, #:lo12:.LANCHOR129]
+	bl	sblk_prog_page
+	ldrh	w0, [x19, 6]
+	cmp	w0, 1
+	bne	.L3640
+	bl	sblk_wait_write_queue_completed
+	bl	ftl_write_completed
+	mov	x0, x19
+	bl	ftl_write_last_log_page
+	mov	x0, x19
+	bl	ftl_alloc_new_data_sblk
+.L3640:
+	adrp	x0, .LANCHOR67
+	ldrb	w0, [x0, #:lo12:.LANCHOR67]
+	cbnz	w0, .L3637
+.L3639:
+	bl	ftl_write_completed
+	mov	w0, 0
+	b	.L3636
+.L3664:
+	ldr	w0, [x29, 156]
+	sub	w2, w2, w20
+	lsl	w2, w2, 9
+	cmn	w0, #1
+	ubfiz	x0, x20, 7, 9
+	beq	.L3666
+	ldr	x1, [x28, 8]
+	lsl	x0, x0, 2
+	add	x1, x1, x0
+	add	x0, x26, x0
+	bl	ftl_memcpy
+	b	.L3665
+.L3666:
+	mov	w1, 0
+	add	x0, x26, x0, lsl 2
+	bl	ftl_memset
+	b	.L3665
+.L3673:
+	ubfiz	x3, x3, 6, 8
+	add	w1, w1, 1
+	ldrb	w3, [x24, x3]
+	b	.L3672
+.L3674:
+	lsl	w2, w21, 9
+	mov	x28, 0
+	mov	w25, 0
+.L3662:
+	mov	w1, 0
+	mov	x0, x26
+	bl	ftl_memset
+	b	.L3663
+.L3656:
+	cbnz	w21, .L3674
+	mov	w25, 0
+	mov	x28, 0
+	b	.L3661
+	.size	ftl_write_commit, .-ftl_write_commit
+	.section	.text.gc_do_copy_back,"ax",@progbits
+	.align	2
+	.global	gc_do_copy_back
+	.type	gc_do_copy_back, %function
+gc_do_copy_back:
+	stp	x29, x30, [sp, -224]!
+	adrp	x0, .LANCHOR85
+	add	x29, sp, 0
+	ldrb	w0, [x0, #:lo12:.LANCHOR85]
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	cbnz	w0, .L3701
+	bl	buf_alloc
+	mov	x19, x0
+	cbz	x0, .L3700
+	adrp	x21, .LANCHOR71
+	add	x3, x21, :lo12:.LANCHOR71
+	ldrh	w2, [x3, 26]
+	mov	w0, w2
+	bl	gc_get_src_ppa_from_index
+	add	w2, w2, 1
+	mov	w22, w0
+	str	w22, [x19, 40]
+	strh	w2, [x3, 26]
+	mov	w1, 1
+	mov	x0, x19
+	bl	sblk_read_page
+	ldr	w0, [x19, 52]
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	bne	.L3703
+	adrp	x1, .LANCHOR234
+	adrp	x0, .LC0
+	mov	w2, 1032
+	add	x1, x1, :lo12:.LANCHOR234
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L3703:
+	ldr	x0, [x19, 24]
+	ldr	w20, [x0, 4]
+	mov	w0, w20
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 176]
+	cmn	w0, #1
+	bne	.L3704
+	mov	w2, 0
+	add	x1, x29, 176
+	mov	w0, w20
+	bl	pm_log2phys
+.L3704:
+	ldr	w23, [x29, 176]
+	cmp	w22, w23
+	bne	.L3705
+	adrp	x0, .LANCHOR56
+	add	x0, x0, :lo12:.LANCHOR56
+	add	x1, x0, 2
+	add	x0, x0, 1026
+.L3708:
+	ldr	w2, [x1, 34]
+	cmp	w20, w2
+	bne	.L3706
+	ldrb	w2, [x1]
+	tbz	x2, 1, .L3706
+	mov	x0, x19
+	bl	zbuf_free
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L3700
+	add	x21, x21, :lo12:.LANCHOR71
+	adrp	x0, .LC234
+	mov	w2, w22
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC234
+	ldrh	w3, [x21, 26]
+	bl	printf
+.L3700:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 224
+	ret
+.L3706:
+	add	x1, x1, 64
+	cmp	x1, x0
+	bne	.L3708
+	adrp	x0, .LANCHOR131
+	strb	wzr, [x19, 57]
+	str	w20, [x19, 36]
+	ldrb	w0, [x0, #:lo12:.LANCHOR131]
+	strb	w0, [x19, 56]
+	ldr	x0, [x19, 24]
+	ldr	w1, [x0]
+	str	w1, [x19, 32]
+	str	wzr, [x0, 16]
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L3709
+	mov	w0, w20
+	bl	lpa_hash_get_ppa
+	add	x1, x21, :lo12:.LANCHOR71
+	mov	w3, w0
+	mov	w4, w22
+	adrp	x0, .LC235
+	mov	w2, w23
+	add	x0, x0, :lo12:.LC235
+	ldrh	w5, [x1, 26]
+	mov	w1, w20
+	bl	printf
+.L3709:
+	mov	x0, x19
+	bl	ftl_gc_write_buf
+	bl	ftl_write_commit
+	add	x21, x21, :lo12:.LANCHOR71
+	adrp	x0, .LANCHOR110
+	ldr	x1, [x0, #:lo12:.LANCHOR110]
+	ldr	w0, [x1, 60]
+	add	w0, w0, 1
+	str	w0, [x1, 60]
+	ldrh	w0, [x21, 28]
+	add	w0, w0, 1
+	strh	w0, [x21, 28]
+	b	.L3700
+.L3705:
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L3710
+	add	x21, x21, :lo12:.LANCHOR71
+	mov	w0, w20
+	bl	lpa_hash_get_ppa
+	mov	w3, w0
+	mov	w4, w22
+	adrp	x0, .LC235
+	ldrh	w5, [x21, 26]
+	mov	w2, w23
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC235
+	bl	printf
+.L3710:
+	mov	x0, x19
+	bl	zbuf_free
+	b	.L3700
+.L3701:
+	adrp	x2, .LANCHOR10
+	adrp	x1, .LANCHOR80
+	stp	x1, x2, [x29, 136]
+	ldr	x26, [x2, #:lo12:.LANCHOR10]
+	ldrb	w3, [x1, #:lo12:.LANCHOR80]
+	add	x26, x26, 80
+	ldrb	w0, [x26, 9]
+	and	w20, w0, 65535
+	cmp	w3, w20
+	bhi	.L3765
+	cmp	w20, 2
+	mov	w21, 2
+	csel	w21, w20, w21, ls
+	and	w21, w21, 65535
+.L3711:
+	adrp	x1, .LANCHOR79
+	str	x1, [x29, 120]
+	ldrb	w19, [x1, #:lo12:.LANCHOR79]
+	cmp	w19, 3
+	bne	.L3712
+	adrp	x1, .LANCHOR36
+	ldrb	w1, [x1, #:lo12:.LANCHOR36]
+	cbz	w1, .L3713
+	adrp	x1, .LANCHOR71
+	add	x1, x1, :lo12:.LANCHOR71
+	ldrh	w22, [x1, 2106]
+	adrp	x1, .LANCHOR124
+	ldrb	w1, [x1, #:lo12:.LANCHOR124]
+	sdiv	w2, w22, w0
+	and	w25, w2, 65535
+	cbz	w1, .L3714
+	adrp	x1, .LANCHOR235
+	add	x1, x1, :lo12:.LANCHOR235
+	ldrh	w1, [x1, w2, sxtw 1]
+	cmp	w1, 0
+	cset	w19, ne
+.L3832:
+	add	w19, w19, 1
+.L3715:
+	msub	w20, w20, w25, w22
+	and	w20, w20, 65535
+.L3716:
+	adrp	x1, .LANCHOR86
+	mul	w11, w19, w21
+	adrp	x10, .LANCHOR235
+	sxtw	x13, w25
+	ldrh	w5, [x1, #:lo12:.LANCHOR86]
+	adrp	x1, .LANCHOR224
+	add	x10, x10, :lo12:.LANCHOR235
+	mov	w2, 0
+	mul	w0, w5, w0
+	ldrb	w5, [x1, #:lo12:.LANCHOR224]
+	sub	w5, w0, w5
+	adrp	x0, .LANCHOR124
+	ldrb	w12, [x0, #:lo12:.LANCHOR124]
+	adrp	x0, .LANCHOR163
+	ldr	x8, [x0, #:lo12:.LANCHOR163]
+	adrp	x0, .LANCHOR71
+	add	x6, x0, :lo12:.LANCHOR71
+	ldrh	w14, [x6, 24]
+.L3720:
+	cmp	w2, w11
+	bge	.L3773
+	add	w4, w22, w2
+	cmp	w4, w5
+	blt	.L3721
+	cbz	w12, .L3773
+	ldrh	w0, [x10, x13, lsl 1]
+	cmp	w0, w25
+	bcc	.L3722
+.L3773:
+	mov	w23, 1
+	b	.L3718
+.L3765:
+	mov	w21, 1
+	b	.L3711
+.L3714:
+	adrp	x1, .LANCHOR217
+	ldrb	w1, [x1, #:lo12:.LANCHOR217]
+	cbz	w1, .L3767
+	sub	w1, w25, #62
+	and	w1, w1, 65535
+	cmp	w1, 2159
+	bhi	.L3768
+	udiv	w19, w25, w19
+	add	w19, w19, w19, lsl 1
+	sub	w19, w25, w19
+	and	w19, w19, 65535
+	cmp	w19, 0
+	cset	w19, eq
+	b	.L3832
+.L3767:
+	mov	w19, 1
+	b	.L3715
+.L3768:
+	mov	w19, 2
+	b	.L3715
+.L3713:
+	adrp	x1, .LANCHOR84
+	ldrb	w1, [x1, #:lo12:.LANCHOR84]
+	cbz	w1, .L3717
+	adrp	x1, .LANCHOR71
+	add	x1, x1, :lo12:.LANCHOR71
+	add	w20, w0, w0, lsl 1
+	ldrh	w22, [x1, 2106]
+	adrp	x1, .LANCHOR37
+	ldrb	w1, [x1, #:lo12:.LANCHOR37]
+	sdiv	w20, w22, w20
+	and	w25, w20, 65535
+	mul	w20, w0, w20
+	sub	w20, w20, w20, lsl 2
+	add	w20, w20, w22
+	sdiv	w20, w20, w19
+	and	w20, w20, 65535
+	cbz	w1, .L3716
+	add	w3, w25, w25, lsl 1
+	and	w25, w3, 65535
+	b	.L3716
+.L3717:
+	adrp	x1, .LANCHOR71
+	add	x1, x1, :lo12:.LANCHOR71
+	adrp	x2, .LANCHOR236
+	add	x2, x2, :lo12:.LANCHOR236
+	ldrh	w4, [x1, 2106]
+	sdiv	w1, w4, w0
+	ldrh	w23, [x2, w1, sxtw 1]
+	msub	w20, w20, w1, w4
+	and	w20, w20, 65535
+	lsr	w25, w23, 3
+	and	w23, w23, 7
+	cmp	w23, 1
+	madd	w22, w25, w0, w20
+	add	w22, w22, w22, lsl 1
+	and	w22, w22, 65535
+	beq	.L3716
+.L3718:
+	mul	w0, w19, w21
+	stp	wzr, w0, [x29, 152]
+	ubfiz	w0, w21, 1, 15
+	str	w0, [x29, 132]
+	msub	w0, w0, w19, w22
+	and	w0, w0, 65535
+	str	w0, [x29, 128]
+	ldrh	w0, [x29, 128]
+	str	x0, [x29, 112]
+	adrp	x0, .LANCHOR56
+	add	x0, x0, :lo12:.LANCHOR56
+	str	x0, [x29, 104]
+.L3723:
+	ldp	w0, w1, [x29, 152]
+	ldrh	w24, [x29, 152]
+	and	w0, w0, 65535
+	str	w0, [x29, 168]
+	cmp	w0, w1
+	blt	.L3747
+	ldr	x0, [x29, 120]
+	ldrb	w0, [x0, #:lo12:.LANCHOR79]
+	cmp	w0, 3
+	add	x0, x29, 176
+	bne	.L3748
+	adrp	x1, .LANCHOR36
+	ldrb	w1, [x1, #:lo12:.LANCHOR36]
+	cbz	w1, .L3749
+	ldr	w2, [x29, 156]
+	mov	w1, 0
+	sub	w2, w2, #1
+.L3750:
+	cmp	w1, w2
+	blt	.L3751
+.L3836:
+	ldr	x0, [x0, w2, sxtw 3]
+	mov	w1, -1
+	strb	w1, [x0]
+	mul	w1, w21, w19
+	ldr	x0, [x29, 176]
+	bl	sblk_prog_page
+	b	.L3752
+.L3712:
+	adrp	x1, .LANCHOR81
+	ldrb	w1, [x1, #:lo12:.LANCHOR81]
+	cbnz	w1, .L3719
+	adrp	x1, .LANCHOR71
+	add	x1, x1, :lo12:.LANCHOR71
+	mov	w19, 1
+	ldrh	w22, [x1, 2106]
+	sdiv	w25, w22, w0
+	msub	w20, w20, w25, w22
+	and	w20, w20, 65535
+	b	.L3716
+.L3719:
+	adrp	x1, .LANCHOR71
+	add	x1, x1, :lo12:.LANCHOR71
+	mov	w19, 2
+	ldrh	w22, [x1, 2106]
+	sdiv	w25, w22, w0
+	msub	w20, w20, w25, w22
+	and	w20, w20, 65535
+	b	.L3716
+.L3722:
+	tbz	x2, 0, .L3773
+.L3721:
+	sbfiz	x4, x4, 2, 32
+	ldr	w0, [x8, x4]
+	cmn	w0, #1
+	bne	.L3724
+	ldrh	w7, [x6, 26]
+	cmp	w7, w14
+	bcs	.L3700
+	cbz	w12, .L3725
+	ldrh	w0, [x10, x13, lsl 1]
+	cmp	w0, w25
+	bcs	.L3725
+	tbz	x2, 0, .L3725
+	ubfiz	x0, x0, 2, 16
+	ldr	w0, [x8, x0]
+.L3833:
+	str	w0, [x8, x4]
+.L3724:
+	add	w2, w2, 1
+	and	w2, w2, 65535
+	b	.L3720
+.L3725:
+	mov	w0, w7
+	bl	gc_get_src_ppa_from_index
+	add	w7, w7, 1
+	strh	w7, [x6, 26]
+	b	.L3833
+.L3747:
+	ldr	w0, [x29, 168]
+	add	w0, w22, w0
+	str	w0, [x29, 172]
+	sxtw	x0, w0
+	str	x0, [x29, 160]
+	adrp	x0, .LANCHOR83
+	ldr	x1, [x29, 160]
+	ldr	x0, [x0, #:lo12:.LANCHOR83]
+	ldrb	w0, [x0, x1]
+	cmp	w0, 255
+	bne	.L3727
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x27, x0
+	cbnz	x0, .L3728
+	bl	sblk_wait_write_queue_completed
+	bl	ftl_write_completed
+	bl	gc_write_completed
+	bl	gc_free_temp_buf
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x27, x0
+	cbz	x0, .L3700
+.L3728:
+	adrp	x0, .LANCHOR83
+	ldr	x2, [x29, 160]
+	ldrb	w1, [x27, 1]
+	ldr	x0, [x0, #:lo12:.LANCHOR83]
+	strb	w1, [x0, x2]
+	adrp	x0, .LANCHOR71
+	add	x1, x0, :lo12:.LANCHOR71
+	strb	w23, [x27, 61]
+	ldrb	w0, [x1, 7]
+	add	w0, w0, 1
+	strb	w0, [x1, 7]
+	add	w0, w24, w22
+	strh	w0, [x27, 48]
+	adrp	x0, .LANCHOR86
+	ldr	w1, [x29, 172]
+	ldrh	w6, [x0, #:lo12:.LANCHOR86]
+	adrp	x0, .LANCHOR224
+	ldrb	w5, [x0, #:lo12:.LANCHOR224]
+	ldrb	w0, [x26, 9]
+	mul	w0, w0, w6
+	sub	w0, w0, w5
+	cmp	w1, w0
+	blt	.L3729
+	adrp	x1, .LANCHOR124
+	ldrb	w1, [x1, #:lo12:.LANCHOR124]
+	cbz	w1, .L3730
+	adrp	x1, .LANCHOR235
+	add	x1, x1, :lo12:.LANCHOR235
+	ldrh	w1, [x1, w25, sxtw 1]
+	cmp	w1, w25
+	bcs	.L3730
+	tbnz	x24, 0, .L3729
+.L3730:
+	adrp	x1, .LANCHOR162
+	ldr	w3, [x29, 172]
+	mov	w2, -1
+	cmp	w5, 2
+	ldr	x1, [x1, #:lo12:.LANCHOR162]
+	str	w2, [x1, w3, sxtw 2]
+	bne	.L3731
+	cmp	w3, w0
+	adrp	x28, .LANCHOR221
+	bne	.L3732
+	ldrh	w2, [x28, #:lo12:.LANCHOR221]
+	ldr	x0, [x27, 8]
+	bl	ftl_memcpy
+	adrp	x0, .LANCHOR131
+	mov	w1, 0
+	ldrb	w2, [x0, #:lo12:.LANCHOR131]
+	ldr	x0, [x27, 24]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	ldr	x6, [x27, 24]
+	mov	w0, 15555
+	movk	w0, 0xf55f, lsl 16
+	ldrh	w1, [x28, #:lo12:.LANCHOR221]
+	str	w0, [x6]
+	ldr	x0, [x27, 8]
+	bl	js_hash
+	str	w0, [x6, 4]
+	ldr	x0, [x29, 144]
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	ldr	w0, [x0, 132]
+	stp	w0, wzr, [x6, 8]
+.L3733:
+	ldr	x0, [x27, 24]
+	str	wzr, [x0, 16]
+.L3727:
+	adrp	x0, .LANCHOR83
+	ldrsw	x2, [x29, 168]
+	add	x4, x29, 176
+	ldr	x1, [x0, #:lo12:.LANCHOR83]
+	ldr	x0, [x29, 160]
+	ldrb	w5, [x1, x0]
+	adrp	x0, .LANCHOR56
+	add	x6, x0, :lo12:.LANCHOR56
+	mov	x7, x5
+	ubfiz	x0, x5, 6, 8
+	add	x0, x6, x0
+	add	x6, x6, x5, lsl 6
+	str	x0, [x4, x2, lsl 3]
+	mov	w0, 2
+	strh	w0, [x6, 50]
+	ldr	x0, [x29, 120]
+	strb	w23, [x6, 61]
+	ldrb	w0, [x0, #:lo12:.LANCHOR79]
+	cmp	w0, 3
+	bne	.L3738
+	adrp	x8, .LANCHOR36
+	ldrb	w8, [x8, #:lo12:.LANCHOR36]
+	cbz	w8, .L3739
+	adrp	x0, .LANCHOR124
+	and	w8, w24, 1
+	add	w10, w8, w25
+	ldrb	w0, [x0, #:lo12:.LANCHOR124]
+	cbz	w0, .L3740
+	adrp	x6, .LANCHOR235
+	add	x6, x6, :lo12:.LANCHOR235
+	ldrh	w6, [x6, w25, sxtw 1]
+	cmp	w6, w25
+	bcs	.L3740
+	cmp	w8, 0
+	csel	w10, w10, w6, eq
+.L3740:
+	adrp	x0, .LANCHOR56
+	add	x6, x0, :lo12:.LANCHOR56
+	add	x5, x6, x5, lsl 6
+	udiv	w6, w24, w19
+	add	w6, w6, w20
+	add	x6, x26, x6, sxtw 1
+	ldrh	w0, [x6, 16]
+	adrp	x6, .LANCHOR111
+	ldrh	w6, [x6, #:lo12:.LANCHOR111]
+	madd	w0, w0, w6, w10
+	orr	w0, w0, 50331648
+	str	w0, [x5, 40]
+.L3745:
+	adrp	x0, .LANCHOR56
+	sbfiz	x7, x7, 6, 32
+	add	x0, x0, :lo12:.LANCHOR56
+	add	x0, x0, x7
+	ldrh	w5, [x0, 48]
+	ldr	w6, [x0, 40]
+	adrp	x0, .LANCHOR164
+	ldr	x0, [x0, #:lo12:.LANCHOR164]
+	str	w6, [x0, x5, lsl 2]
+	b	.L3764
+.L3732:
+	ldr	x2, [x29, 136]
+	ldrh	w0, [x28, #:lo12:.LANCHOR221]
+	ldrb	w28, [x2, #:lo12:.LANCHOR80]
+	mul	w28, w28, w6
+	lsl	w28, w28, 2
+	sub	w28, w28, w0
+	and	x0, x0, 65532
+	add	x1, x1, x0
+	ldr	x0, [x27, 8]
+	mov	w2, w28
+	bl	ftl_memcpy
+	adrp	x0, .LANCHOR131
+	mov	w1, 0
+	ldrb	w2, [x0, #:lo12:.LANCHOR131]
+	ldr	x0, [x27, 24]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	ldr	x6, [x27, 24]
+	mov	w0, 15555
+	movk	w0, 0xf55f, lsl 16
+	mov	w1, w28
+	str	w0, [x6]
+	ldr	x0, [x27, 8]
+	bl	js_hash
+	str	w0, [x6, 4]
+	ldr	x0, [x29, 144]
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	ldr	w0, [x0, 132]
+	str	w0, [x6, 8]
+	mov	w0, 1
+	str	w0, [x6, 12]
+	b	.L3733
+.L3731:
+	ldr	x0, [x29, 136]
+	ldrb	w2, [x0, #:lo12:.LANCHOR80]
+	ldr	x0, [x27, 8]
+	mul	w2, w2, w6
+	lsl	w2, w2, 2
+	bl	ftl_memcpy
+	ldr	x1, [x29, 136]
+	adrp	x0, .LANCHOR86
+	ldrh	w0, [x0, #:lo12:.LANCHOR86]
+	ldrb	w1, [x1, #:lo12:.LANCHOR80]
+	mul	w0, w0, w1
+	adrp	x1, .LANCHOR131
+	ldrb	w1, [x1, #:lo12:.LANCHOR131]
+	lsl	w2, w0, 2
+	cmp	w1, w0, lsr 6
+	bge	.L3734
+	adrp	x1, .LANCHOR221
+	ldrh	w1, [x1, #:lo12:.LANCHOR221]
+	sub	w2, w1, w2
+.L3734:
+	adrp	x1, .LANCHOR163
+	ldr	x5, [x27, 8]
+	ldr	x1, [x1, #:lo12:.LANCHOR163]
+	add	x0, x5, x0, sxtw 2
+	bl	ftl_memcpy
+	adrp	x0, .LANCHOR131
+	mov	w1, 0
+	ldrb	w2, [x0, #:lo12:.LANCHOR131]
+	ldr	x0, [x27, 24]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	ldr	x6, [x27, 24]
+	mov	w0, 15555
+	movk	w0, 0xf55f, lsl 16
+	str	w0, [x6]
+	adrp	x0, .LANCHOR86
+	ldrh	w1, [x0, #:lo12:.LANCHOR86]
+	ldr	x0, [x29, 136]
+	ldrb	w0, [x0, #:lo12:.LANCHOR80]
+	mul	w1, w1, w0
+	ldr	x0, [x27, 8]
+	lsl	w1, w1, 2
+	bl	js_hash
+	str	w0, [x6, 4]
+	ldr	x0, [x29, 144]
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	ldr	w0, [x0, 132]
+	str	w0, [x6, 8]
+	b	.L3733
+.L3729:
+	ldr	x0, [x29, 160]
+	mov	w1, 1
+	lsl	x28, x0, 2
+	adrp	x0, .LANCHOR163
+	ldr	x0, [x0, #:lo12:.LANCHOR163]
+	ldr	w0, [x0, x28]
+	str	w0, [x27, 40]
+	mov	x0, x27
+	bl	sblk_read_page
+	ldr	w0, [x27, 52]
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	bne	.L3736
+	adrp	x0, .LANCHOR75
+	ldrh	w2, [x0, #:lo12:.LANCHOR75]
+	adrp	x0, .LANCHOR32
+	ldrb	w1, [x0, #:lo12:.LANCHOR32]
+	mov	w0, 24
+	sub	w0, w0, w1
+	sub	w1, w0, w2
+	mov	w0, 1
+	lsl	w0, w0, w1
+	ldr	w1, [x27, 40]
+	sub	w0, w0, #1
+	lsr	w1, w1, w2
+	and	w0, w0, w1
+	adrp	x1, .LANCHOR76
+	ldrb	w2, [x1, #:lo12:.LANCHOR76]
+	mov	x1, 0
+	udiv	w0, w0, w2
+	bl	ftl_sblk_dump
+	ldr	w0, [x27, 52]
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	bne	.L3736
+	ldr	x0, [x27, 24]
+	mov	w1, -1
+	str	w1, [x0, 4]
+	ldr	w0, [x27, 52]
+	cmp	w0, 512
+	ccmp	w0, w1, 4, ne
+	bne	.L3736
+	adrp	x1, .LANCHOR234
+	adrp	x0, .LC0
+	mov	w2, 1223
+	add	x1, x1, :lo12:.LANCHOR234
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L3736:
+	ldr	x0, [x27, 24]
+	adrp	x1, .LANCHOR128
+	ldr	w1, [x1, #:lo12:.LANCHOR128]
+	ldr	w2, [x0, 4]
+	cmp	w2, w1
+	bcc	.L3737
+	mov	w1, -1
+	str	w1, [x0, 4]
+.L3737:
+	adrp	x1, .LANCHOR162
+	ldr	w2, [x0, 4]
+	ldr	x1, [x1, #:lo12:.LANCHOR162]
+	str	w2, [x1, x28]
+	ldr	w1, [x27, 40]
+	str	w1, [x0, 8]
+	b	.L3733
+.L3739:
+	udiv	w0, w24, w0
+	adrp	x7, .LANCHOR37
+	ldrb	w7, [x7, #:lo12:.LANCHOR37]
+	cbz	w7, .L3742
+	add	w7, w0, w20
+	adrp	x8, .LANCHOR111
+	add	x7, x26, x7, sxtw 1
+	add	w0, w0, w0, lsl 1
+	ldrh	w8, [x8, #:lo12:.LANCHOR111]
+	sub	w0, w24, w0
+	ldrh	w7, [x7, 16]
+	madd	w7, w7, w8, w25
+	add	w0, w7, w0, uxth
+.L3837:
+	str	w0, [x6, 40]
+	ldr	x0, [x29, 104]
+	add	x5, x0, x5, lsl 6
+	adrp	x0, .LANCHOR164
+	ldr	x6, [x0, #:lo12:.LANCHOR164]
+	mov	w0, 3
+	ldrh	w7, [x5, 48]
+	udiv	w0, w24, w0
+	ldr	w5, [x5, 40]
+	add	w0, w0, w0, lsl 1
+	sub	w0, w24, w0
+	and	w0, w0, 65535
+	add	w0, w0, 1
+	orr	w0, w5, w0, lsl 24
+	str	w0, [x6, x7, lsl 2]
+.L3764:
+	adrp	x0, .LANCHOR124
+	ldrb	w0, [x0, #:lo12:.LANCHOR124]
+	cbz	w0, .L3746
+	adrp	x0, .LANCHOR235
+	add	x0, x0, :lo12:.LANCHOR235
+	ldrh	w0, [x0, w25, sxtw 1]
+	cmp	w0, w25
+	bcs	.L3746
+	tbz	x24, 0, .L3746
+	ldr	x3, [x29, 160]
+	mov	w0, -1
+	strb	w0, [x1, x3]
+	ldrh	w1, [x29, 128]
+	ldr	x0, [x4, x2, lsl 3]
+	ldr	x2, [x29, 112]
+	strh	w1, [x0, 48]
+	ldrb	w1, [x0, 1]
+	adrp	x0, .LANCHOR83
+	ldr	x0, [x0, #:lo12:.LANCHOR83]
+	strb	w1, [x0, x2]
+	adrp	x0, .LANCHOR163
+	ldr	w2, [x29, 172]
+	mov	w1, -1
+	ldr	x0, [x0, #:lo12:.LANCHOR163]
+	str	w1, [x0, w2, sxtw 2]
+.L3746:
+	ldr	w0, [x29, 152]
+	add	w0, w0, 1
+	str	w0, [x29, 152]
+	b	.L3723
+.L3742:
+	add	w0, w0, w20
+	adrp	x7, .LANCHOR111
+	add	x0, x26, x0, sxtw 1
+	ldrh	w7, [x7, #:lo12:.LANCHOR111]
+	ldrh	w0, [x0, 16]
+	madd	w0, w0, w7, w25
+	b	.L3837
+.L3738:
+	cmp	w0, 2
+	bne	.L3745
+	adrp	x0, .LANCHOR81
+	adrp	x5, .LANCHOR111
+	ldrb	w0, [x0, #:lo12:.LANCHOR81]
+	cbnz	w0, .L3744
+	ldr	w0, [x29, 168]
+	ldrh	w5, [x5, #:lo12:.LANCHOR111]
+	add	w27, w20, w0
+	add	x27, x26, x27, sxtw 1
+	ldrh	w0, [x27, 16]
+	madd	w0, w0, w5, w25
+.L3834:
+	orr	w0, w0, 33554432
+	str	w0, [x6, 40]
+	b	.L3745
+.L3744:
+	add	w0, w20, w24, lsr 1
+	ldrh	w5, [x5, #:lo12:.LANCHOR111]
+	add	x0, x26, x0, sxtw 1
+	ldrh	w0, [x0, 16]
+	madd	w0, w0, w5, w25
+	and	w5, w24, 1
+	add	w0, w0, w5
+	b	.L3834
+.L3751:
+	ldr	x4, [x0, w1, sxtw 3]
+	add	w1, w1, 1
+	ldr	x5, [x0, w1, sxtw 3]
+	and	w1, w1, 65535
+	ldrb	w5, [x5, 1]
+	strb	w5, [x4]
+	b	.L3750
+.L3749:
+	adrp	x1, .LANCHOR84
+	ldrb	w2, [x1, #:lo12:.LANCHOR84]
+	ldr	x1, [x29, 176]
+	cbz	w2, .L3753
+.L3756:
+	strb	wzr, [x1, 60]
+	b	.L3755
+.L3753:
+	cmp	w23, 1
+	bne	.L3754
+	mov	w2, 9
+.L3835:
+	strb	w2, [x1, 60]
+.L3755:
+	mov	w2, w21
+	add	x1, x0, 24
+	bl	sblk_xlc_prog_pages
+.L3752:
+	adrp	x0, .LANCHOR84
+	ldrb	w0, [x0, #:lo12:.LANCHOR84]
+	cbz	w0, .L3761
+	add	w21, w21, w21, lsl 1
+	and	w21, w21, 65535
+.L3762:
+	adrp	x0, .LANCHOR110
+	ldr	x1, [x0, #:lo12:.LANCHOR110]
+	ldr	w0, [x1, 52]
+	add	w0, w0, w21
+	str	w0, [x1, 52]
+	adrp	x0, .LANCHOR71
+	add	x25, x0, :lo12:.LANCHOR71
+	ldrh	w0, [x25, 2106]
+	add	w21, w21, w0
+	adrp	x0, .LANCHOR86
+	and	w21, w21, 65535
+	strh	w21, [x25, 2106]
+	ldrh	w0, [x0, #:lo12:.LANCHOR86]
+	ldrb	w1, [x26, 9]
+	mul	w0, w0, w1
+	cmp	w21, w0
+	blt	.L3763
+	ldr	x0, [x29, 144]
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	strh	wzr, [x0, 86]
+.L3763:
+	bl	gc_write_completed
+	b	.L3700
+.L3754:
+	cmp	w23, 2
+	bne	.L3756
+	mov	w2, 13
+	b	.L3835
+.L3748:
+	adrp	x1, .LANCHOR81
+	ldrb	w1, [x1, #:lo12:.LANCHOR81]
+	cbz	w1, .L3774
+	adrp	x1, .LANCHOR82
+	ldrb	w1, [x1, #:lo12:.LANCHOR82]
+	cbnz	w1, .L3758
+.L3757:
+	ldr	w2, [x29, 156]
+	sub	w2, w2, #1
+.L3759:
+	cmp	w1, w2
+	bge	.L3836
+	ldr	x4, [x0, w1, sxtw 3]
+	add	w1, w1, 1
+	ldr	x5, [x0, w1, sxtw 3]
+	and	w1, w1, 65535
+	ldrb	w5, [x5, 1]
+	strb	w5, [x4]
+	b	.L3759
+.L3774:
+	mov	w1, 0
+	b	.L3757
+.L3758:
+	mov	w1, w21
+	bl	sblk_3d_mlc_prog_pages
+	b	.L3752
+.L3761:
+	adrp	x0, .LANCHOR81
+	ldrb	w0, [x0, #:lo12:.LANCHOR81]
+	cbnz	w0, .L3775
+	adrp	x0, .LANCHOR36
+	ldrb	w0, [x0, #:lo12:.LANCHOR36]
+	cbz	w0, .L3762
+	adrp	x0, .LANCHOR124
+	ldrh	w1, [x29, 156]
+	ldrb	w0, [x0, #:lo12:.LANCHOR124]
+	cbz	w0, .L3776
+	adrp	x0, .LANCHOR235
+	add	x0, x0, :lo12:.LANCHOR235
+	ldrh	w0, [x0, w25, sxtw 1]
+	cmp	w0, w25
+	csel	w21, w21, w1, cc
+	b	.L3762
+.L3775:
+	ldr	w21, [x29, 132]
+	b	.L3762
+.L3776:
+	mov	w21, w1
+	b	.L3762
+	.size	gc_do_copy_back, .-gc_do_copy_back
+	.section	.text.zftl_do_gc,"ax",@progbits
+	.align	2
+	.global	zftl_do_gc
+	.type	zftl_do_gc, %function
+zftl_do_gc:
+	sub	sp, sp, #144
+	adrp	x1, .LANCHOR107
+	stp	x29, x30, [sp, 16]
+	add	x29, sp, 16
+	stp	x23, x24, [sp, 64]
+	adrp	x24, .LANCHOR103
+	stp	x19, x20, [sp, 32]
+	adrp	x19, .LANCHOR159
+	stp	x21, x22, [sp, 48]
+	adrp	x23, .LANCHOR10
+	ldrh	w22, [x1, #:lo12:.LANCHOR107]
+	stp	x25, x26, [sp, 80]
+	ldrh	w21, [x24, #:lo12:.LANCHOR103]
+	ldrb	w1, [x19, #:lo12:.LANCHOR159]
+	stp	x27, x28, [sp, 96]
+	add	w21, w22, w21
+	ldr	x26, [x23, #:lo12:.LANCHOR10]
+	cmp	w1, 6
+	bhi	.L3953
+	mov	w25, w0
+	and	w21, w21, 65535
+	adrp	x0, .L3841
+	add	x0, x0, :lo12:.L3841
+	ldrh	w0, [x0,w1,uxtw #1]
+	adr	x1, .Lrtx3841
+	add	x0, x1, w0, sxth #2
+	br	x0
+.Lrtx3841:
+	.section	.rodata.zftl_do_gc,"a",@progbits
+	.align	0
+	.align	2
+.L3841:
+	.2byte	(.L3840 - .Lrtx3841) / 4
+	.2byte	(.L3842 - .Lrtx3841) / 4
+	.2byte	(.L3843 - .Lrtx3841) / 4
+	.2byte	(.L3844 - .Lrtx3841) / 4
+	.2byte	(.L3845 - .Lrtx3841) / 4
+	.2byte	(.L3846 - .Lrtx3841) / 4
+	.2byte	(.L3847 - .Lrtx3841) / 4
+	.section	.text.zftl_do_gc
+.L3846:
+	adrp	x20, .LANCHOR71
+	add	x24, x20, :lo12:.LANCHOR71
+	mov	w22, 0
+.L3848:
+	bl	gc_check_data_one_wl
+	cbz	w0, .L3949
+	ldr	x0, [x23, #:lo12:.LANCHOR10]
+	add	x20, x20, :lo12:.LANCHOR71
+	strh	wzr, [x20, 56]
+	ldrh	w0, [x0, 80]
+	bl	ftl_free_sblk
+	adrp	x2, .LANCHOR110
+	ldr	x1, [x23, #:lo12:.LANCHOR10]
+	mov	w0, -1
+	ldr	x2, [x2, #:lo12:.LANCHOR110]
+	strh	w0, [x1, 80]
+	strh	w0, [x2, 126]
+	strh	w0, [x1, 130]
+	ldr	x0, [x20, 8]
+	bl	zbuf_free
+	strb	wzr, [x19, #:lo12:.LANCHOR159]
+	str	xzr, [x20, 8]
+	b	.L4033
+.L3840:
+	adrp	x0, .LANCHOR105
+	adrp	x27, .LANCHOR97
+	ldrh	w2, [x26, 80]
+	ldrh	w0, [x0, #:lo12:.LANCHOR105]
+	ldrh	w24, [x27, #:lo12:.LANCHOR97]
+	add	w22, w22, w0
+	adrp	x0, .LANCHOR99
+	stp	x0, x27, [x29, 112]
+	and	w22, w22, 65535
+	ldrh	w1, [x0, #:lo12:.LANCHOR99]
+	add	w24, w24, w1
+	mov	w1, 65535
+	and	w24, w24, 65535
+	cmp	w2, w1
+	beq	.L3849
+	cbnz	w25, .L3850
+	adrp	x0, .LANCHOR87
+	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	cmp	w21, w0, lsl 1
+	blt	.L3850
+.L3953:
+	mov	w20, 16
+	b	.L3838
+.L3850:
+	adrp	x5, .LANCHOR96
+	mov	w1, 5
+	adrp	x25, .LANCHOR85
+	ldrh	w0, [x5, #:lo12:.LANCHOR96]
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	strh	w0, [x5, #:lo12:.LANCHOR96]
+	bl	zftl_get_gc_node
+	and	w3, w0, 65535
+	mov	w1, 65535
+	cmp	w3, w1
+	beq	.L3851
+	adrp	x4, .LANCHOR9
+	ubfiz	x3, x3, 1, 16
+	adrp	x1, .LANCHOR160
+	mov	x20, x1
+	ldr	x4, [x4, #:lo12:.LANCHOR9]
+	ldr	w2, [x1, #:lo12:.LANCHOR160]
+	add	w2, w2, 1
+	str	w2, [x1, #:lo12:.LANCHOR160]
+	ldrh	w3, [x4, x3]
+	adrp	x4, .LANCHOR95
+	ldrh	w4, [x4, #:lo12:.LANCHOR95]
+	cmp	w4, w3
+	bcs	.L3852
+	adrp	x1, .LANCHOR6
+	ldrh	w1, [x1, #:lo12:.LANCHOR6]
+	cmp	w2, w1, lsr 4
+	bls	.L3851
+	adrp	x1, .LANCHOR100
+	ldrh	w1, [x1, #:lo12:.LANCHOR100]
+	cmp	w1, w3
+	bls	.L3851
+.L3852:
+	ldrb	w2, [x25, #:lo12:.LANCHOR85]
+	mov	w1, 0
+	bl	gc_add_sblk
+	cbz	w0, .L3853
+	mov	w0, 1
+	str	wzr, [x20, #:lo12:.LANCHOR160]
+	strb	w0, [x19, #:lo12:.LANCHOR159]
+	b	.L3953
+.L3851:
+	strh	wzr, [x5, #:lo12:.LANCHOR96]
+.L3853:
+	cmp	w22, 15
+	bls	.L3955
+	adrp	x0, .LANCHOR93
+	ldrh	w1, [x0, #:lo12:.LANCHOR93]
+	adrp	x0, .LANCHOR101
+	ldrh	w0, [x0, #:lo12:.LANCHOR101]
+	cmp	w1, w0
+	bhi	.L3955
+	cmp	w24, 0
+	cset	w20, eq
+	add	w20, w20, 1
+.L3854:
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L3855
+	ldr	x0, [x23, #:lo12:.LANCHOR10]
+	mov	w4, w22
+	ldrb	w2, [x25, #:lo12:.LANCHOR85]
+	mov	w3, w21
+	mov	w1, 2658
+	ldrh	w7, [x0, 122]
+	ldrh	w6, [x0, 120]
+	ldrh	w5, [x0, 124]
+	ldrh	w0, [x26, 80]
+	str	w0, [sp]
+	adrp	x0, .LC236
+	add	x0, x0, :lo12:.LC236
+	bl	printf
+.L3855:
+	ldrb	w0, [x25, #:lo12:.LANCHOR85]
+	mov	w2, 1
+	mov	w1, w20
+	bl	gc_search_src_blk
+	cmp	w0, 0
+	ble	.L3856
+.L3857:
+	mov	w0, 1
+.L4035:
+	strb	w0, [x19, #:lo12:.LANCHOR159]
+	b	.L3953
+.L3955:
+	mov	w20, 2
+	b	.L3854
+.L3856:
+	ldrb	w0, [x25, #:lo12:.LANCHOR85]
+	mov	w2, 1
+	mov	w1, 3
+	bl	gc_search_src_blk
+	cmp	w0, 0
+	bgt	.L3857
+	b	.L3953
+.L3849:
+	cmp	w25, 1
+	bne	.L3859
+	bl	gc_scan_static_data
+	adrp	x26, .LANCHOR85
+	ldr	x0, [x23, #:lo12:.LANCHOR10]
+	ldrh	w0, [x0, 122]
+	cbz	w0, .L3860
+.L3861:
+	mov	w0, 1
+	strb	w0, [x26, #:lo12:.LANCHOR85]
+	b	.L4035
+.L3860:
+	bl	gc_static_wearleveling
+	mov	w20, w0
+	cbnz	w0, .L3861
+	adrp	x27, .LANCHOR161
+	cbz	w22, .L3862
+	cmp	w21, w24
+	adrp	x1, .LANCHOR98
+	bcs	.L3863
+	ldrh	w0, [x1, #:lo12:.LANCHOR98]
+	cmp	w0, w21
+	bhi	.L3864
+.L3863:
+	ldrh	w1, [x1, #:lo12:.LANCHOR98]
+	add	w0, w21, w24
+	cmp	w0, w1
+	blt	.L3864
+	adrp	x0, .LANCHOR93
+	ldrh	w1, [x0, #:lo12:.LANCHOR93]
+	adrp	x0, .LANCHOR101
+	ldrh	w0, [x0, #:lo12:.LANCHOR101]
+	cmp	w1, w0
+	bcc	.L3862
+.L3864:
+	mov	w0, 1
+	strb	w0, [x26, #:lo12:.LANCHOR85]
+	mov	w0, 16
+	bl	zftl_get_gc_node.part.9
+	and	w1, w0, 65535
+	mov	w2, 65535
+	adrp	x28, .LANCHOR160
+	cmp	w1, w2
+	beq	.L3865
+	adrp	x2, .LANCHOR9
+	ubfiz	x1, x1, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR9]
+	ldrh	w2, [x2, x1]
+	ldrh	w1, [x27, #:lo12:.LANCHOR161]
+	cmp	w2, w1
+	bcs	.L3865
+	cmp	w21, 2
+	bls	.L3865
+	strb	wzr, [x26, #:lo12:.LANCHOR85]
+	mov	w2, 0
+	str	wzr, [x28, #:lo12:.LANCHOR160]
+	mov	w1, 1
+	bl	gc_add_sblk
+	cbnz	w0, .L3857
+.L3865:
+	mov	w1, 3
+	mov	w0, 0
+	bl	zftl_get_gc_node
+	and	w1, w0, 65535
+	mov	w2, 65535
+	cmp	w1, w2
+	beq	.L3866
+	adrp	x2, .LANCHOR9
+	ubfiz	x1, x1, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR9]
+	ldrh	w2, [x2, x1]
+	ldrh	w1, [x27, #:lo12:.LANCHOR161]
+	cmp	w2, w1
+	bcs	.L3866
+	cmp	w21, 2
+	bls	.L3866
+	strb	wzr, [x26, #:lo12:.LANCHOR85]
+	mov	w2, 0
+	str	wzr, [x28, #:lo12:.LANCHOR160]
+	mov	w1, 1
+	bl	gc_add_sblk
+	cbnz	w0, .L3857
+.L3866:
+	ldrh	w0, [x27, #:lo12:.LANCHOR161]
+	adrp	x1, .LANCHOR95
+	add	w0, w0, 1
+	ldrh	w5, [x1, #:lo12:.LANCHOR95]
+	and	w0, w0, 65535
+	strh	w0, [x27, #:lo12:.LANCHOR161]
+	cmp	w0, w5, lsr 5
+	bls	.L3867
+	mov	w0, 4
+	strh	w0, [x27, #:lo12:.LANCHOR161]
+.L3867:
+	adrp	x1, .LANCHOR90
+	ldr	w0, [x28, #:lo12:.LANCHOR160]
+	strh	wzr, [x1, #:lo12:.LANCHOR90]
+	adrp	x1, .LANCHOR91
+	add	w0, w0, 1
+	str	w0, [x28, #:lo12:.LANCHOR160]
+	strh	wzr, [x1, #:lo12:.LANCHOR91]
+	adrp	x1, .LANCHOR92
+	strh	wzr, [x1, #:lo12:.LANCHOR92]
+	adrp	x1, .LANCHOR6
+	ldrh	w1, [x1, #:lo12:.LANCHOR6]
+	cmp	w0, w1, lsr 5
+	adrp	x0, .LANCHOR93
+	bls	.L3868
+	ldrh	w1, [x0, #:lo12:.LANCHOR93]
+	cmp	w1, w22
+	bls	.L3868
+	mov	w1, 5
+	mov	w0, 0
+	bl	zftl_get_gc_node
+	and	w0, w0, 65535
+	mov	w1, 65535
+	cmp	w0, w1
+	bne	.L3869
+.L4023:
+	mov	w20, 16
+.L3870:
+	ldr	x0, [x23, #:lo12:.LANCHOR10]
+	adrp	x28, .LANCHOR85
+	mov	w1, 1
+	mov	x23, x28
+	strb	w1, [x28, #:lo12:.LANCHOR85]
+	ldrh	w0, [x0, 124]
+	cbz	w0, .L3875
+	strb	wzr, [x28, #:lo12:.LANCHOR85]
+	strb	w1, [x19, #:lo12:.LANCHOR159]
+.L3838:
+	mov	w0, w20
+	ldp	x19, x20, [sp, 32]
+	ldp	x21, x22, [sp, 48]
+	ldp	x23, x24, [sp, 64]
+	ldp	x25, x26, [sp, 80]
+	ldp	x27, x28, [sp, 96]
+	ldp	x29, x30, [sp, 16]
+	add	sp, sp, 144
+	ret
+.L3869:
+	adrp	x1, .LANCHOR9
+	ubfiz	x0, x0, 1, 16
+	ldr	x1, [x1, #:lo12:.LANCHOR9]
+	ldrh	w1, [x1, x0]
+	adrp	x0, .LANCHOR80
+	ldrb	w0, [x0, #:lo12:.LANCHOR80]
+	mul	w0, w0, w5
+	cmp	w1, w0
+	bgt	.L4023
+	str	wzr, [x28, #:lo12:.LANCHOR160]
+	mov	w2, 4
+.L4030:
+	mov	w1, 2
+.L4022:
+	ldrb	w0, [x26, #:lo12:.LANCHOR85]
+	bl	gc_search_src_blk
+	and	w0, w0, 65535
+	cbz	w0, .L4023
+	b	.L3857
+.L3868:
+	ldrh	w1, [x0, #:lo12:.LANCHOR93]
+	adrp	x0, .LANCHOR101
+	ldrh	w0, [x0, #:lo12:.LANCHOR101]
+	cmp	w1, w0
+	bcc	.L3873
+	mov	w2, 1
+	b	.L4030
+.L3873:
+	ldr	x0, [x29, 120]
+	ldrh	w0, [x0, #:lo12:.LANCHOR97]
+	cbnz	w0, .L3874
+	ldr	x0, [x29, 112]
+	ldrh	w0, [x0, #:lo12:.LANCHOR99]
+	cmp	w0, 8
+	bls	.L3870
+.L3874:
+	mov	w2, 4
+	mov	w1, 1
+	b	.L4022
+.L3862:
+	adrp	x0, .LANCHOR95
+	ldrh	w1, [x0, #:lo12:.LANCHOR95]
+	ldrh	w0, [x27, #:lo12:.LANCHOR161]
+	cmp	w0, w1, lsr 5
+	bcc	.L4023
+	mov	w0, 4
+	strh	w0, [x27, #:lo12:.LANCHOR161]
+	b	.L4023
+.L3859:
+	adrp	x0, .LANCHOR87
+	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	cmp	w0, w21
+	bcs	.L4023
+	ldrh	w0, [x26, 124]
+	cbz	w0, .L3953
+	b	.L4023
+.L3875:
+	adrp	x0, .LANCHOR87
+	mov	x26, x0
+	ldrh	w2, [x0, #:lo12:.LANCHOR87]
+	cmp	w21, w2
+	bcs	.L3876
+	cbz	w22, .L3877
+	cmp	w22, 16
+	bls	.L3878
+	adrp	x0, .LANCHOR93
+	ldrh	w2, [x0, #:lo12:.LANCHOR93]
+	adrp	x0, .LANCHOR101
+	ldrh	w0, [x0, #:lo12:.LANCHOR101]
+	cmp	w2, w0
+	bhi	.L3878
+	mov	w2, 4
+	mov	w0, w1
+	bl	gc_search_src_blk
+	tst	w0, 65535
+	bne	.L3879
+.L4026:
+	mov	w2, 4
+	mov	w1, 3
+	ldrb	w0, [x28, #:lo12:.LANCHOR85]
+	b	.L4025
+.L3879:
+	mov	w1, 5
+	mov	w0, 0
+	bl	zftl_get_gc_node
+	and	w3, w0, 65535
+	mov	w1, 65535
+	cmp	w3, w1
+	beq	.L3882
+	adrp	x4, .LANCHOR9
+	ubfiz	x3, x3, 1, 16
+	adrp	x1, .LANCHOR160
+	mov	x21, x1
+	ldr	x4, [x4, #:lo12:.LANCHOR9]
+	ldr	w2, [x1, #:lo12:.LANCHOR160]
+	add	w2, w2, 1
+	str	w2, [x1, #:lo12:.LANCHOR160]
+	ldrh	w3, [x4, x3]
+	adrp	x4, .LANCHOR95
+	ldrh	w4, [x4, #:lo12:.LANCHOR95]
+	cmp	w4, w3
+	bcs	.L3883
+	adrp	x1, .LANCHOR6
+	ldrh	w1, [x1, #:lo12:.LANCHOR6]
+	cmp	w2, w1, lsr 4
+	bls	.L3882
+	adrp	x1, .LANCHOR100
+	ldrh	w1, [x1, #:lo12:.LANCHOR100]
+	cmp	w1, w3
+	bls	.L3882
+.L3883:
+	ldrb	w2, [x23, #:lo12:.LANCHOR85]
+	mov	w1, 0
+	bl	gc_add_sblk
+	str	wzr, [x21, #:lo12:.LANCHOR160]
+	adrp	x0, .LANCHOR122
+	mov	w1, 1
+	str	w1, [x0, #:lo12:.LANCHOR122]
+.L3882:
+	mov	w0, 1
+	strb	w0, [x19, #:lo12:.LANCHOR159]
+	b	.L3838
+.L3878:
+	mov	w2, 1
+	mov	w1, 2
+	mov	w0, w2
+	bl	gc_search_src_blk
+	tst	w0, 65535
+	bne	.L3882
+	ldrb	w0, [x23, #:lo12:.LANCHOR85]
+	mov	w2, 4
+	mov	w1, 3
+.L4025:
+	bl	gc_search_src_blk
+	and	w0, w0, 65535
+.L3880:
+	cbnz	w0, .L3882
+	b	.L3838
+.L3877:
+	strb	wzr, [x28, #:lo12:.LANCHOR85]
+	cmp	w21, 16
+	bls	.L3885
+	mov	w2, 4
+	mov	w1, 3
+	mov	w0, 0
+	b	.L4025
+.L3885:
+	mov	w2, w1
+	mov	w0, 0
+	bl	gc_search_src_blk
+	tst	w0, 65535
+	bne	.L3882
+	b	.L4026
+.L3876:
+	cmp	w25, 1
+	bne	.L3838
+	cmp	w21, w2, lsl 1
+	bge	.L3886
+	cmp	w24, w22, lsr 1
+	bcs	.L3887
+	adrp	x1, .LANCHOR93
+	ldrh	w2, [x1, #:lo12:.LANCHOR93]
+	adrp	x1, .LANCHOR101
+	ldrh	w1, [x1, #:lo12:.LANCHOR101]
+	cmp	w2, w1
+	bcs	.L3887
+	adrp	x1, .LANCHOR98
+	ldrh	w1, [x1, #:lo12:.LANCHOR98]
+	lsr	w1, w1, 2
+	strh	w1, [x0, #:lo12:.LANCHOR87]
+	b	.L3838
+.L3887:
+	mov	w0, 8
+	bl	zftl_get_gc_node.part.9
+	and	w1, w0, 65535
+	mov	w2, 65535
+	cmp	w1, w2
+	beq	.L3888
+	adrp	x2, .LANCHOR9
+	ubfiz	x1, x1, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR9]
+	ldrh	w1, [x2, x1]
+	cmp	w1, 3
+	bhi	.L3888
+	cbz	w21, .L3888
+	strb	wzr, [x23, #:lo12:.LANCHOR85]
+	mov	w2, 0
+	mov	w1, 1
+	bl	gc_add_sblk
+	cbnz	w0, .L3882
+.L3888:
+	mov	w1, 5
+	mov	w0, 0
+	bl	zftl_get_gc_node
+	and	w25, w0, 65535
+	mov	w1, 65535
+	mov	w28, w25
+	cmp	w25, w1
+	bne	.L3889
+.L3894:
+	cmp	w22, 1
+	bhi	.L3890
+.L3891:
+	cmp	w21, w24
+	adrp	x21, .LANCHOR98
+	bcs	.L3898
+	strb	wzr, [x23, #:lo12:.LANCHOR85]
+	mov	w0, 4
+	bl	zftl_get_gc_node.part.9
+	and	w0, w0, 65535
+	mov	w1, 65535
+	cmp	w0, w1
+	beq	.L3898
+	adrp	x1, .LANCHOR9
+	ubfiz	x0, x0, 1, 16
+	adrp	x2, .LANCHOR80
+	ldr	x1, [x1, #:lo12:.LANCHOR9]
+	ldrb	w2, [x2, #:lo12:.LANCHOR80]
+	ldrh	w1, [x1, x0]
+	adrp	x0, .LANCHOR95
+	ldrh	w0, [x0, #:lo12:.LANCHOR95]
+	mul	w0, w0, w2
+	cmp	w1, w0, lsr 1
+	ble	.L3900
+.L3898:
+	ldrh	w0, [x21, #:lo12:.LANCHOR98]
+	lsr	w0, w0, 2
+	strh	w0, [x26, #:lo12:.LANCHOR87]
+	b	.L3838
+.L3889:
+	adrp	x2, .LANCHOR160
+	adrp	x3, .LANCHOR6
+	uxtw	x25, w25
+	ldr	w1, [x2, #:lo12:.LANCHOR160]
+	ldrh	w3, [x3, #:lo12:.LANCHOR6]
+	add	w1, w1, 1
+	str	w1, [x2, #:lo12:.LANCHOR160]
+	cmp	w1, w3, lsr 4
+	adrp	x3, .LANCHOR9
+	bls	.L3892
+	ldr	x1, [x3, #:lo12:.LANCHOR9]
+	str	wzr, [x2, #:lo12:.LANCHOR160]
+	ldrh	w2, [x1, x25, lsl 1]
+	adrp	x1, .LANCHOR100
+	ldrh	w1, [x1, #:lo12:.LANCHOR100]
+	cmp	w2, w1
+	bcs	.L3892
+	mov	w4, 1
+	str	x3, [x29, 96]
+	strb	w4, [x23, #:lo12:.LANCHOR85]
+	mov	w2, 1
+	str	w4, [x29, 108]
+	mov	w1, 0
+	bl	gc_add_sblk
+	ldr	w4, [x29, 108]
+	ldr	x3, [x29, 96]
+	cbz	w0, .L3892
+	strb	w4, [x19, #:lo12:.LANCHOR159]
+	b	.L3838
+.L3892:
+	ldr	x0, [x3, #:lo12:.LANCHOR9]
+	ldrh	w1, [x0, x25, lsl 1]
+	adrp	x0, .LANCHOR95
+	ldrh	w0, [x0, #:lo12:.LANCHOR95]
+	cmp	w1, w0, lsr 1
+	bhi	.L3893
+	mov	w2, 0
+	mov	w1, 1
+	mov	w0, w28
+	bl	gc_add_sblk
+	b	.L3882
+.L3893:
+	ldp	x2, x0, [x29, 112]
+	ldrh	w2, [x2, #:lo12:.LANCHOR99]
+	ldrh	w0, [x0, #:lo12:.LANCHOR97]
+	add	w0, w0, w2
+	adrp	x2, .LANCHOR98
+	ldrh	w2, [x2, #:lo12:.LANCHOR98]
+	cmp	w0, w2, lsl 1
+	ble	.L3894
+	adrp	x0, .LANCHOR100
+	ldrh	w0, [x0, #:lo12:.LANCHOR100]
+	cmp	w0, w1
+	bcc	.L3891
+	b	.L3894
+.L3890:
+	mov	w1, 1
+	strb	w1, [x23, #:lo12:.LANCHOR85]
+	cmp	w22, 16
+	bls	.L3895
+	adrp	x0, .LANCHOR93
+	ldrh	w2, [x0, #:lo12:.LANCHOR93]
+	adrp	x0, .LANCHOR101
+	ldrh	w0, [x0, #:lo12:.LANCHOR101]
+	cmp	w2, w0
+	bhi	.L3895
+	mov	w0, w1
+	mov	w2, 4
+.L4032:
+	bl	gc_search_src_blk
+	ands	w0, w0, 65535
+	bne	.L3896
+	ldrb	w0, [x23, #:lo12:.LANCHOR85]
+	mov	w2, 4
+	mov	w1, 3
+	bl	gc_search_src_blk
+	and	w0, w0, 65535
+.L3896:
+	adrp	x1, .LANCHOR98
+	cmp	w21, w24, lsr 1
+	ldrh	w1, [x1, #:lo12:.LANCHOR98]
+	bls	.L4027
+	lsr	w1, w1, 2
+.L4028:
+	strh	w1, [x26, #:lo12:.LANCHOR87]
+	b	.L3880
+.L3895:
+	mov	w2, 1
+	mov	w1, 2
+	mov	w0, w2
+	b	.L4032
+.L3900:
+	mov	w1, 3
+	mov	w2, 4
+	mov	w0, 0
+	bl	gc_search_src_blk
+	ldrh	w1, [x21, #:lo12:.LANCHOR98]
+	and	w0, w0, 65535
+.L4027:
+	lsr	w1, w1, 1
+	b	.L4028
+.L3886:
+	adrp	x1, .LANCHOR98
+	mov	w20, 0
+	ldrh	w1, [x1, #:lo12:.LANCHOR98]
+	lsr	w1, w1, 2
+	strh	w1, [x0, #:lo12:.LANCHOR87]
+	b	.L3838
+.L3842:
+	adrp	x7, .LANCHOR71
+	mov	w0, 65535
+	ldrh	w1, [x7, #:lo12:.LANCHOR71]
+	cmp	w1, w0
+	bne	.L3901
+	bl	gc_get_src_blk
+	strh	w0, [x7, #:lo12:.LANCHOR71]
+.L3901:
+	ldrh	w0, [x7, #:lo12:.LANCHOR71]
+	mov	w1, 65535
+	cmp	w0, w1
+	beq	.L3902
+	adrp	x1, .LANCHOR6
+	ldrh	w1, [x1, #:lo12:.LANCHOR6]
+	cmp	w1, w0
+	bhi	.L3902
+	mov	w0, -1
+	strh	w0, [x7, #:lo12:.LANCHOR71]
+.L3902:
+	ldrh	w3, [x7, #:lo12:.LANCHOR71]
+	mov	w0, 65535
+	add	x1, x7, :lo12:.LANCHOR71
+	cmp	w3, w0
+	beq	.L4034
+	adrp	x0, .LANCHOR7
+	ldrh	w5, [x1, 56]
+	uxtw	x4, w3
+	ldr	x2, [x0, #:lo12:.LANCHOR7]
+	add	x2, x2, x4, lsl 2
+	cbz	w5, .L3904
+	add	x1, x1, 58
+	mov	w0, 0
+.L3906:
+	ldrh	w6, [x1], 2
+	cmp	w6, w3
+	bne	.L3905
+.L3910:
+	adrp	x0, .LANCHOR71
+	mov	w1, -1
+	strh	w1, [x0, #:lo12:.LANCHOR71]
+	b	.L3953
+.L3905:
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	cmp	w5, w0
+	bne	.L3906
+.L3904:
+	ldrb	w0, [x2, 2]
+	and	w1, w0, 224
+	cmp	w1, 224
+	beq	.L3907
+	tst	w0, 192
+	bne	.L3908
+.L3907:
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrh	w0, [x0, x4, lsl 1]
+	cbz	w0, .L3910
+	mov	w2, 3147
+	adrp	x1, .LANCHOR237
+	adrp	x0, .LC0
+	add	x1, x1, :lo12:.LANCHOR237
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+	b	.L3910
+.L3908:
+	mov	w0, 2
+	b	.L4035
+.L3843:
+	bl	gc_scan_src_blk
+	cmn	w0, #1
+	bne	.L3911
+	mov	w0, 3
+	b	.L4035
+.L3911:
+	adrp	x20, .LANCHOR71
+	mov	w2, 65535
+	add	x0, x20, :lo12:.LANCHOR71
+	ldrh	w1, [x20, #:lo12:.LANCHOR71]
+	cmp	w1, w2
+	beq	.L3857
+	ldrh	w2, [x0, 24]
+	cbz	w2, .L3912
+	mov	w1, 4
+	strh	wzr, [x0, 26]
+	strb	w1, [x19, #:lo12:.LANCHOR159]
+	b	.L3953
+.L3912:
+	mov	w0, 1
+	strb	w0, [x19, #:lo12:.LANCHOR159]
+	adrp	x0, .LANCHOR9
+	ubfiz	x1, x1, 1, 16
+	mov	x19, x0
+	ldr	x2, [x0, #:lo12:.LANCHOR9]
+	ldrh	w1, [x2, x1]
+	cbz	w1, .L3913
+	adrp	x1, .LANCHOR237
+	adrp	x0, .LC0
+	mov	w2, 3177
+	add	x1, x1, :lo12:.LANCHOR237
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L3913:
+	ldrh	w0, [x20, #:lo12:.LANCHOR71]
+	add	x21, x20, :lo12:.LANCHOR71
+	bl	ftl_free_sblk
+	ldr	x0, [x19, #:lo12:.LANCHOR9]
+	ldrh	w1, [x20, #:lo12:.LANCHOR71]
+	strh	wzr, [x0, x1, lsl 1]
+	ldrh	w0, [x21, 30]
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	cmp	w0, 8
+	bhi	.L3914
+	strh	w0, [x21, 30]
+	b	.L3910
+.L3914:
+	strh	wzr, [x21, 30]
+	bl	ftl_flush
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	mov	w0, 0
+	bl	ftl_info_flush
+	b	.L3910
+.L3844:
+	adrp	x20, .LANCHOR71
+	adrp	x23, .LANCHOR95
+	add	x22, x20, :lo12:.LANCHOR71
+	add	x23, x23, :lo12:.LANCHOR95
+.L3998:
+	bl	gc_scan_src_blk_one_page
+	ldrh	w1, [x22, 2]
+	ldrh	w0, [x23]
+	cmp	w1, w0
+	bcs	.L3916
+	cmp	w21, 7
+	bls	.L3998
+	b	.L3953
+.L3916:
+	ldrh	w3, [x22, 24]
+	ldrh	w1, [x22]
+	cbz	w3, .L3917
+	mov	w0, 4
+	strb	w0, [x19, #:lo12:.LANCHOR159]
+	adrp	x19, .LANCHOR9
+	ubfiz	x0, x1, 1, 16
+	strh	wzr, [x22, 26]
+	ldr	x2, [x19, #:lo12:.LANCHOR9]
+	ldrh	w2, [x2, x0]
+	cmp	w3, w2
+	beq	.L3918
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 10, .L3918
+	adrp	x0, .LC237
+	add	x0, x0, :lo12:.LC237
+	bl	printf
+.L3918:
+	ldrh	w2, [x20, #:lo12:.LANCHOR71]
+	add	x0, x20, :lo12:.LANCHOR71
+	ldr	x1, [x19, #:lo12:.LANCHOR9]
+	ldrh	w0, [x0, 24]
+	ldrh	w1, [x1, x2, lsl 1]
+	cmp	w1, w0
+	beq	.L3919
+	adrp	x1, .LANCHOR237
+	adrp	x0, .LC0
+	mov	w2, 3220
+	add	x1, x1, :lo12:.LANCHOR237
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L3919:
+	add	x0, x20, :lo12:.LANCHOR71
+	ldrh	w1, [x20, #:lo12:.LANCHOR71]
+	ldrh	w2, [x0, 24]
+	ldr	x0, [x19, #:lo12:.LANCHOR9]
+	strh	w2, [x0, x1, lsl 1]
+	b	.L3953
+.L3917:
+	adrp	x0, .LANCHOR7
+	ldr	x21, [x0, #:lo12:.LANCHOR7]
+	mov	w0, 1
+	strb	w0, [x19, #:lo12:.LANCHOR159]
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	add	x21, x21, x1, uxth 2
+	tbz	x0, 8, .L3920
+	ldrb	w2, [x21, 2]
+	adrp	x0, .LC238
+	add	x0, x0, :lo12:.LC238
+	ubfx	x2, x2, 5, 3
+	bl	printf
+.L3920:
+	ldrb	w0, [x21, 2]
+	and	w1, w0, 224
+	cmp	w1, 224
+	beq	.L3921
+	tst	w0, 192
+	bne	.L3922
+.L3921:
+	adrp	x1, .LANCHOR237
+	adrp	x0, .LC0
+	mov	w2, 3230
+	add	x1, x1, :lo12:.LANCHOR237
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L3922:
+	ldrh	w0, [x20, #:lo12:.LANCHOR71]
+	add	x19, x20, :lo12:.LANCHOR71
+	bl	ftl_free_sblk
+	mov	w0, -1
+	strh	w0, [x20, #:lo12:.LANCHOR71]
+	ldrh	w0, [x19, 30]
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	cmp	w0, 8
+	bhi	.L3923
+	strh	w0, [x19, 30]
+	b	.L3953
+.L3923:
+	strh	wzr, [x19, 30]
+.L4033:
+	bl	flt_sys_flush
+	b	.L3953
+.L3845:
+	ldrh	w1, [x26, 80]
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L3924
+	adrp	x0, .LANCHOR85
+	ldrb	w22, [x0, #:lo12:.LANCHOR85]
+	cmp	w22, 1
+	bne	.L3924
+	bl	ftl_flush
+	adrp	x0, .LANCHOR71
+	add	x1, x0, :lo12:.LANCHOR71
+	mov	x20, x0
+	ldrh	w1, [x1, 2110]
+	cbz	w1, .L3925
+	mov	w0, w22
+	mov	w1, 5
+.L4029:
+	bl	zftl_gc_get_free_sblk
+	and	w19, w0, 65535
+	mov	w0, 65535
+	cmp	w19, w0
+	beq	.L3927
+	adrp	x0, .LANCHOR7
+	ldr	x21, [x0, #:lo12:.LANCHOR7]
+	add	x21, x21, x19, uxth 2
+	ldrb	w0, [x21, 2]
+	tst	w0, 224
+	beq	.L3928
+	adrp	x1, .LANCHOR237
+	adrp	x0, .LC0
+	mov	w2, 3264
+	add	x1, x1, :lo12:.LANCHOR237
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L3928:
+	ldrb	w0, [x21, 2]
+	mov	w1, 5
+	bfi	w0, w1, 5, 3
+	orr	w0, w0, 16
+	strb	w0, [x21, 2]
+.L3952:
+	mov	w1, 1
+	mov	w0, w19
+	bl	ftl_erase_sblk
+	adrp	x22, .LANCHOR86
+	mov	w0, 5
+	strb	w0, [x26, 84]
+	add	x1, x26, 96
+	mov	w0, w19
+	bl	ftl_get_blk_list_in_sblk
+	and	w0, w0, 255
+	adrp	x1, .LANCHOR95
+	adrp	x21, .LANCHOR80
+	strb	w0, [x26, 89]
+	ldrh	w1, [x1, #:lo12:.LANCHOR95]
+	ldrh	w2, [x22, #:lo12:.LANCHOR86]
+	strh	w19, [x26, 80]
+	strh	wzr, [x26, 82]
+	mul	w0, w0, w1
+	strb	wzr, [x26, 85]
+	strh	w0, [x26, 86]
+	mov	w1, 255
+	ldrb	w0, [x21, #:lo12:.LANCHOR80]
+	strh	wzr, [x26, 90]
+	mul	w2, w2, w0
+	adrp	x0, .LANCHOR162
+	ldr	x0, [x0, #:lo12:.LANCHOR162]
+	lsl	w2, w2, 2
+	bl	ftl_memset
+	ldrb	w0, [x21, #:lo12:.LANCHOR80]
+	mov	w1, 255
+	ldrh	w2, [x22, #:lo12:.LANCHOR86]
+	mul	w2, w2, w0
+	adrp	x0, .LANCHOR163
+	ldr	x0, [x0, #:lo12:.LANCHOR163]
+	lsl	w2, w2, 2
+	bl	ftl_memset
+	ldrb	w0, [x21, #:lo12:.LANCHOR80]
+	mov	w1, 255
+	ldrh	w2, [x22, #:lo12:.LANCHOR86]
+	mul	w2, w2, w0
+	adrp	x0, .LANCHOR83
+	ldr	x0, [x0, #:lo12:.LANCHOR83]
+	bl	ftl_memset
+	ldr	x0, [x23, #:lo12:.LANCHOR10]
+	mov	w1, -1
+	str	w19, [x0, 132]
+	strh	w1, [x0, 128]
+	strh	w1, [x0, 130]
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	adrp	x0, .LANCHOR110
+	mov	w1, -1
+	ldr	x0, [x0, #:lo12:.LANCHOR110]
+	strh	w19, [x0, 126]
+	add	x0, x20, :lo12:.LANCHOR71
+	str	w1, [x0, 2116]
+	strh	wzr, [x0, 2106]
+	strh	wzr, [x0, 56]
+	strh	wzr, [x0, 2108]
+	strh	wzr, [x0, 2112]
+	mov	w0, 0
+	bl	ftl_info_flush
+	b	.L3953
+.L3925:
+	mov	w1, 5
+	mov	w0, 0
+	b	.L4029
+.L3924:
+	cmp	w25, 1
+	mov	w22, 4
+	csinc	w22, w22, wzr, eq
+	cmp	w21, 15
+	mov	w0, w22
+	add	w22, w22, 4
+	adrp	x25, .LANCHOR85
+	adrp	x21, .LANCHOR71
+	csel	w22, w22, w0, ls
+	add	x25, x25, :lo12:.LANCHOR85
+	add	x20, x21, :lo12:.LANCHOR71
+	add	x27, x26, 80
+.L3931:
+	sub	w22, w22, #1
+	and	w22, w22, 255
+	cmp	w22, 255
+	beq	.L3953
+	bl	gc_do_copy_back
+	ldrb	w0, [x25]
+	cbnz	w0, .L3932
+	adrp	x0, .LANCHOR58
+	ldrb	w0, [x0, #:lo12:.LANCHOR58]
+	cmp	w0, 3
+	bhi	.L3933
+	bl	ftl_write_commit
+.L3933:
+	ldrh	w1, [x20, 26]
+	ldrh	w0, [x20, 24]
+	cmp	w1, w0
+	bcc	.L3931
+	mov	w0, 1
+	strb	w0, [x19, #:lo12:.LANCHOR159]
+	bl	ftl_write_commit
+	bl	ftl_flush
+	adrp	x0, .LANCHOR9
+	ldrh	w2, [x20]
+	mov	x19, x0
+	ldr	x1, [x0, #:lo12:.LANCHOR9]
+	ldrh	w1, [x1, x2, lsl 1]
+	cbz	w1, .L3935
+	adrp	x1, .LANCHOR237
+	adrp	x0, .LC0
+	mov	w2, 3348
+	add	x1, x1, :lo12:.LANCHOR237
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L3935:
+	ldrh	w0, [x21, #:lo12:.LANCHOR71]
+	ldr	x2, [x19, #:lo12:.LANCHOR9]
+	ubfiz	x1, x0, 1, 16
+	ldrh	w1, [x2, x1]
+	cbnz	w1, .L3936
+	bl	ftl_free_sblk
+	b	.L3910
+.L3936:
+	mov	w2, 1
+	mov	w1, 0
+	bl	gc_add_sblk
+	b	.L3910
+.L3932:
+	ldrh	w0, [x20, 2112]
+	cbz	w0, .L3937
+	strh	wzr, [x20, 2112]
+	bl	sblk_wait_write_queue_completed
+	bl	gc_write_completed
+	ldr	w0, [x20, 2116]
+	adrp	x20, .LANCHOR110
+	cmn	w0, #1
+	beq	.L3938
+	adrp	x1, .LANCHOR124
+	ldrb	w1, [x1, #:lo12:.LANCHOR124]
+	cbnz	w1, .L3939
+	adrp	x1, .LANCHOR81
+	ldrb	w1, [x1, #:lo12:.LANCHOR81]
+	cbz	w1, .L3940
+.L3939:
+	ldr	x1, [x20, #:lo12:.LANCHOR110]
+	ldr	w2, [x1, 156]
+	mov	w1, 20041
+	movk	w1, 0x444b, lsl 16
+	cmp	w2, w1
+	bne	.L3940
+	adrp	x1, .LANCHOR75
+	ldrh	w3, [x1, #:lo12:.LANCHOR75]
+	adrp	x1, .LANCHOR32
+	ldrb	w2, [x1, #:lo12:.LANCHOR32]
+	mov	w1, 24
+	lsr	w0, w0, w3
+	sub	w1, w1, w2
+	sub	w2, w1, w3
+	mov	w1, 1
+	lsl	w1, w1, w2
+	sub	w1, w1, #1
+	and	w0, w1, w0
+	adrp	x1, .LANCHOR76
+	ldrb	w1, [x1, #:lo12:.LANCHOR76]
+	udiv	w0, w0, w1
+	adrp	x1, .LANCHOR7
+	ldr	x2, [x1, #:lo12:.LANCHOR7]
+	lsl	x0, x0, 2
+	add	x4, x2, x0
+	ldrb	w1, [x4, 2]
+	tbz	x1, 3, .L3938
+	adrp	x5, .LANCHOR98
+	ldrh	w3, [x24, #:lo12:.LANCHOR103]
+	ldrh	w5, [x5, #:lo12:.LANCHOR98]
+	add	w3, w3, 8
+	cmp	w3, w5
+	bge	.L3938
+	and	w1, w1, -25
+	strb	w1, [x4, 2]
+	adrp	x1, .LANCHOR8
+	ldr	w3, [x2, x0]
+	ldrh	w1, [x1, #:lo12:.LANCHOR8]
+	ldrh	w4, [x2, x0]
+	ubfx	x3, x3, 11, 8
+	and	w5, w4, 2047
+	mul	w1, w1, w3
+	lsr	w3, w3, 3
+	add	w1, w1, w1, lsl 1
+	add	w1, w5, w1, lsr 2
+	bfi	w4, w1, 0, 11
+	strh	w4, [x2, x0]
+	ldr	w1, [x2, x0]
+	bfi	w1, w3, 11, 8
+	str	w1, [x2, x0]
+.L3938:
+	ldr	x0, [x23, #:lo12:.LANCHOR10]
+	add	x22, x21, :lo12:.LANCHOR71
+	strh	wzr, [x22, 56]
+	ldrh	w0, [x0, 80]
+	str	wzr, [x22, 2116]
+	bl	ftl_free_sblk
+	ldr	x1, [x23, #:lo12:.LANCHOR10]
+	mov	w0, -1
+	ldr	x2, [x20, #:lo12:.LANCHOR110]
+	strh	w0, [x1, 80]
+	strh	w0, [x2, 126]
+	strh	w0, [x1, 130]
+	ldr	x0, [x22, 8]
+	cbz	x0, .L3941
+	bl	zbuf_free
+.L3941:
+	add	x21, x21, :lo12:.LANCHOR71
+	str	xzr, [x21, 8]
+	bl	flt_sys_flush
+	mov	w2, 3407
+	strb	wzr, [x19, #:lo12:.LANCHOR159]
+	adrp	x1, .LANCHOR237
+	adrp	x0, .LC0
+	add	x1, x1, :lo12:.LANCHOR237
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+	b	.L3953
+.L3940:
+	bl	ftl_mask_bad_block
+	b	.L3938
+.L3937:
+	ldrh	w0, [x27, 6]
+	ldrh	w1, [x20, 26]
+	cmp	w0, 1
+	ldrh	w0, [x20, 24]
+	bls	.L3942
+	cmp	w1, w0
+	bcc	.L3931
+	mov	w0, 1
+	strb	w0, [x19, #:lo12:.LANCHOR159]
+	ldrh	w0, [x20, 56]
+	add	w1, w0, 1
+	strh	w1, [x20, 56]
+	add	x0, x20, x0, sxtw 1
+	ldrh	w1, [x20]
+	strh	w1, [x0, 58]
+	mov	w0, -1
+	strh	w0, [x20]
+	b	.L3953
+.L3942:
+	mov	w2, 5
+	strb	w2, [x19, #:lo12:.LANCHOR159]
+	cmp	w1, w0
+	bcc	.L3943
+	ldrh	w0, [x20, 56]
+	add	w1, w0, 1
+	strh	w1, [x20, 56]
+	add	x0, x20, x0, sxtw 1
+	ldrh	w1, [x20]
+	strh	w1, [x0, 58]
+	mov	w0, -1
+	strh	w0, [x20]
+.L3943:
+	bl	ftl_flush
+	bl	sblk_wait_write_queue_completed
+	bl	gc_write_completed
+	ldr	x0, [x23, #:lo12:.LANCHOR10]
+	ldrh	w1, [x26, 80]
+	strh	w1, [x0, 128]
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	adrp	x1, .LANCHOR95
+	add	x0, x21, :lo12:.LANCHOR71
+	adrp	x2, .LANCHOR36
+	ldrh	w1, [x1, #:lo12:.LANCHOR95]
+	strh	w1, [x0, 18]
+	adrp	x1, .LANCHOR79
+	ldrb	w2, [x2, #:lo12:.LANCHOR36]
+	strh	wzr, [x0, 16]
+	ldrb	w1, [x1, #:lo12:.LANCHOR79]
+	strh	w1, [x0, 20]
+	cbz	w2, .L3944
+	adrp	x2, .LANCHOR86
+	ldrh	w2, [x2, #:lo12:.LANCHOR86]
+	strh	w2, [x0, 18]
+	mov	w2, 1
+	strh	w2, [x0, 20]
+.L3944:
+	cmp	w1, 2
+	bne	.L3946
+	add	x0, x21, :lo12:.LANCHOR71
+	ldrh	w1, [x0, 18]
+	ubfiz	w1, w1, 1, 15
+	strh	w1, [x0, 18]
+	adrp	x1, .LANCHOR81
+	ldrb	w1, [x1, #:lo12:.LANCHOR81]
+	cbnz	w1, .L3946
+	mov	w1, 1
+	strh	w1, [x0, 20]
+.L3946:
+	add	x21, x21, :lo12:.LANCHOR71
+	strh	wzr, [x21, 22]
+	b	.L3953
+.L3949:
+	ldrh	w1, [x24, 16]
+	ldrh	w0, [x24, 18]
+	cmp	w1, w0
+	bcc	.L3950
+	mov	w0, 6
+	strb	w0, [x19, #:lo12:.LANCHOR159]
+	ldr	x0, [x24, 8]
+	bl	zbuf_free
+	str	xzr, [x24, 8]
+	b	.L3953
+.L3950:
+	cmp	w21, 15
+	bls	.L3848
+	cmp	w25, 1
+	bne	.L3953
+	add	w22, w22, 1
+	and	w22, w22, 255
+	cmp	w22, 4
+	bls	.L3848
+	b	.L3953
+.L3847:
+	bl	gc_update_l2p_map_new
+	mov	w20, -1
+	bl	gc_free_src_blk
+	bl	ftl_flush
+	bl	pm_flush
+	strh	w20, [x26, 80]
+	bl	ftl_ext_info_flush
+	adrp	x0, .LANCHOR110
+	ldr	x0, [x0, #:lo12:.LANCHOR110]
+	strh	w20, [x0, 126]
+	mov	w0, 0
+	bl	ftl_info_flush
+.L4034:
+	strb	wzr, [x19, #:lo12:.LANCHOR159]
+	b	.L3953
+.L3927:
+	mov	w2, 3271
+	adrp	x1, .LANCHOR237
+	adrp	x0, .LC0
+	add	x1, x1, :lo12:.LANCHOR237
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+	b	.L3952
+	.size	zftl_do_gc, .-zftl_do_gc
+	.section	.text.zftl_init,"ax",@progbits
+	.align	2
+	.global	zftl_init
+	.type	zftl_init, %function
+zftl_init:
+	stp	x29, x30, [sp, -112]!
+	adrp	x1, .LANCHOR66
+	mov	w0, -1
+	add	x29, sp, 0
+	strb	w0, [x1, #:lo12:.LANCHOR66]
+	adrp	x1, .LANCHOR67
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR95
+	strb	wzr, [x1, #:lo12:.LANCHOR67]
+	adrp	x1, .LANCHOR133
+	stp	x19, x20, [sp, 16]
+	adrp	x21, .LANCHOR80
+	strb	w0, [x1, #:lo12:.LANCHOR133]
+	adrp	x1, .LANCHOR134
+	stp	x23, x24, [sp, 48]
+	adrp	x20, .LANCHOR221
+	strb	wzr, [x1, #:lo12:.LANCHOR134]
+	adrp	x1, .LANCHOR185
+	stp	x25, x26, [sp, 64]
+	adrp	x23, .LANCHOR6
+	strb	w0, [x1, #:lo12:.LANCHOR185]
+	adrp	x0, .LANCHOR129
+	mov	w1, -1
+	stp	x27, x28, [sp, 80]
+	strb	wzr, [x0, #:lo12:.LANCHOR129]
+	adrp	x0, .LANCHOR238
+	str	w1, [x0, #:lo12:.LANCHOR238]
+	adrp	x1, .LC239
+	adrp	x0, .LC104
+	add	x1, x1, :lo12:.LC239
+	add	x0, x0, :lo12:.LC104
+	bl	printf
+	adrp	x1, .LANCHOR33
+	add	x1, x1, :lo12:.LANCHOR33
+	adrp	x0, .LANCHOR79
+	adrp	x2, .LANCHOR131
+	adrp	x3, .LANCHOR112
+	adrp	x4, .LANCHOR76
+	ldrb	w7, [x1, 12]
+	strb	w7, [x0, #:lo12:.LANCHOR79]
+	ldrb	w0, [x1, 9]
+	strb	w0, [x2, #:lo12:.LANCHOR131]
+	adrp	x2, .LANCHOR86
+	ldrh	w5, [x1, 10]
+	strh	w5, [x2, #:lo12:.LANCHOR86]
+	adrp	x2, .LANCHOR18
+	ldrh	w8, [x1, 14]
+	ubfiz	w6, w0, 9, 7
+	ldrb	w2, [x2, #:lo12:.LANCHOR18]
+	sdiv	w11, w5, w7
+	strb	w2, [x3, #:lo12:.LANCHOR112]
+	ldrb	w3, [x1, 13]
+	adrp	x1, .LANCHOR2
+	strb	w3, [x4, #:lo12:.LANCHOR76]
+	ldrh	w4, [x1, #:lo12:.LANCHOR2]
+	adrp	x1, .LANCHOR111
+	strh	w11, [x22, #:lo12:.LANCHOR95]
+	mul	w2, w2, w3
+	strh	w4, [x1, #:lo12:.LANCHOR111]
+	strh	w8, [x23, #:lo12:.LANCHOR6]
+	mov	w3, 1
+	and	w2, w2, 255
+	strh	w6, [x20, #:lo12:.LANCHOR221]
+	strb	w2, [x21, #:lo12:.LANCHOR80]
+	mov	w1, 0
+.L4037:
+	cmp	w4, w3
+	bcs	.L4038
+	mul	w10, w0, w5
+	adrp	x3, .LANCHOR75
+	sub	w1, w1, #1
+	mov	w4, 0
+	strh	w1, [x3, #:lo12:.LANCHOR75]
+	mov	w1, 1
+	mul	w3, w8, w10
+	lsr	w12, w3, 21
+.L4039:
+	cmp	w12, w1
+	bcs	.L4040
+	mov	w1, 57344
+	sub	w4, w4, #1
+	movk	w1, 0x1c, lsl 16
+	mul	w3, w3, w2
+	adrp	x28, .LANCHOR128
+	sub	w12, w6, #1
+	mul	w1, w2, w1
+	adrp	x24, .LANCHOR204
+	mul	w11, w11, w2
+	adrp	x27, .LANCHOR240
+	mul	w10, w10, w2
+	adrp	x26, .LANCHOR155
+	lsl	w1, w1, w4
+	adrp	x4, .LANCHOR68
+	sub	w10, w10, #1
+	adrp	x25, .LANCHOR98
+	str	w1, [x4, #:lo12:.LANCHOR68]
+	adrp	x4, .LANCHOR239
+	lsr	w8, w8, 4
+	strh	w8, [x25, #:lo12:.LANCHOR98]
+	str	w3, [x4, #:lo12:.LANCHOR239]
+	add	w3, w1, 24576
+	str	w3, [x27, #:lo12:.LANCHOR240]
+	cmp	w8, 79
+	udiv	w0, w3, w0
+	udiv	w3, w3, w10
+	str	w0, [x28, #:lo12:.LANCHOR128]
+	add	w0, w12, w0, lsl 2
+	add	w3, w3, 8
+	udiv	w0, w0, w6
+	strh	w0, [x24, #:lo12:.LANCHOR204]
+	ubfiz	w0, w0, 4, 16
+	sdiv	w0, w0, w11
+	strh	w0, [x26, #:lo12:.LANCHOR155]
+	adrp	x0, .LANCHOR101
+	str	x0, [x29, 104]
+	strh	w3, [x0, #:lo12:.LANCHOR101]
+	bhi	.L4041
+	mov	w0, 80
+	strh	w0, [x25, #:lo12:.LANCHOR98]
+.L4041:
+	adrp	x12, .LANCHOR126
+	mov	w0, 2000
+	adrp	x11, .LANCHOR125
+	adrp	x3, .LANCHOR152
+	strh	w0, [x12, #:lo12:.LANCHOR126]
+	mov	w0, 50
+	adrp	x8, .LANCHOR153
+	strh	w0, [x11, #:lo12:.LANCHOR125]
+	mov	w0, 256
+	strh	w0, [x3, #:lo12:.LANCHOR152]
+	mov	w0, 48
+	strh	w0, [x8, #:lo12:.LANCHOR153]
+	adrp	x0, .LANCHOR8
+	mov	w10, 32
+	cmp	w7, 2
+	mov	x13, x11
+	strh	w10, [x0, #:lo12:.LANCHOR8]
+	mov	x7, x12
+	mov	x14, x8
+	beq	.L4042
+	adrp	x15, .LANCHOR84
+	ldrb	w15, [x15, #:lo12:.LANCHOR84]
+	cbz	w15, .L4043
+.L4042:
+	mov	w8, 150
+	strh	w8, [x13, #:lo12:.LANCHOR125]
+	mov	w8, 64
+	strh	w8, [x14, #:lo12:.LANCHOR153]
+	mov	w8, 12
+	strh	w8, [x0, #:lo12:.LANCHOR8]
+	adrp	x8, .LANCHOR0
+	ldrb	w8, [x8, #:lo12:.LANCHOR0]
+	cbnz	w8, .L4044
+	mov	w8, 4
+	strh	w8, [x0, #:lo12:.LANCHOR8]
+	mov	w0, 600
+	strh	w0, [x7, #:lo12:.LANCHOR126]
+	mov	w0, 128
+	strh	w0, [x3, #:lo12:.LANCHOR152]
+.L4044:
+	adrp	x0, .LANCHOR37
+	ldrb	w0, [x0, #:lo12:.LANCHOR37]
+	cbz	w0, .L4046
+	mov	w0, 200
+	strh	w0, [x13, #:lo12:.LANCHOR125]
+	mov	w0, 2000
+	strh	w0, [x7, #:lo12:.LANCHOR126]
+.L4046:
+	adrp	x0, .LANCHOR122
+	mul	w2, w5, w2
+	mov	w3, 1
+	str	wzr, [x0, #:lo12:.LANCHOR122]
+	adrp	x0, .LANCHOR224
+	cmp	w6, w2, lsl 2
+	strb	w3, [x0, #:lo12:.LANCHOR224]
+	bge	.L4048
+	mov	w2, 2
+	strb	w2, [x0, #:lo12:.LANCHOR224]
+.L4048:
+	adrp	x19, .LANCHOR14
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L4049
+	str	x4, [x29, 96]
+	adrp	x0, .LC240
+	add	x0, x0, :lo12:.LC240
+	bl	printf
+	ldr	x4, [x29, 96]
+.L4049:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L4050
+	ldr	w1, [x4, #:lo12:.LANCHOR239]
+	adrp	x0, .LC241
+	add	x0, x0, :lo12:.LC241
+	bl	printf
+.L4050:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L4051
+	ldr	w1, [x28, #:lo12:.LANCHOR128]
+	adrp	x0, .LC242
+	add	x0, x0, :lo12:.LC242
+	bl	printf
+.L4051:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L4052
+	ldr	w1, [x27, #:lo12:.LANCHOR240]
+	adrp	x0, .LC243
+	add	x0, x0, :lo12:.LC243
+	bl	printf
+.L4052:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L4053
+	ldrh	w1, [x24, #:lo12:.LANCHOR204]
+	adrp	x0, .LC244
+	add	x0, x0, :lo12:.LC244
+	bl	printf
+.L4053:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L4054
+	ldrh	w1, [x20, #:lo12:.LANCHOR221]
+	adrp	x0, .LC245
+	add	x0, x0, :lo12:.LC245
+	bl	printf
+.L4054:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L4055
+	ldrh	w1, [x26, #:lo12:.LANCHOR155]
+	adrp	x0, .LC246
+	add	x0, x0, :lo12:.LC246
+	bl	printf
+.L4055:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L4056
+	ldrh	w1, [x25, #:lo12:.LANCHOR98]
+	adrp	x0, .LC247
+	add	x0, x0, :lo12:.LC247
+	bl	printf
+.L4056:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L4057
+	ldr	x0, [x29, 104]
+	ldrh	w1, [x0, #:lo12:.LANCHOR101]
+	adrp	x0, .LC248
+	add	x0, x0, :lo12:.LC248
+	bl	printf
+.L4057:
+	bl	zbuf_init
+	adrp	x25, .LANCHOR200
+	mov	w0, 16384
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR195
+	str	x0, [x1, #:lo12:.LANCHOR195]
+	mov	w0, 16384
+	bl	ftl_malloc
+	str	x0, [x25, #:lo12:.LANCHOR200]
+	mov	w0, 16384
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR190
+	str	x0, [x1, #:lo12:.LANCHOR190]
+	mov	w0, 6
+	ldrh	w1, [x23, #:lo12:.LANCHOR6]
+	mul	w0, w1, w0
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR4
+	str	x0, [x1, #:lo12:.LANCHOR4]
+	ldrb	w1, [x21, #:lo12:.LANCHOR80]
+	ldrh	w0, [x22, #:lo12:.LANCHOR95]
+	mul	w0, w0, w1
+	lsl	w0, w0, 2
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR118
+	ldr	x2, [x25, #:lo12:.LANCHOR200]
+	adrp	x25, .LANCHOR10
+	str	x0, [x1, #:lo12:.LANCHOR118]
+	adrp	x0, .LANCHOR117
+	ldrh	w1, [x22, #:lo12:.LANCHOR95]
+	str	x2, [x0, #:lo12:.LANCHOR117]
+	ldrb	w0, [x21, #:lo12:.LANCHOR80]
+	mul	w1, w1, w0
+	lsl	w0, w1, 1
+	adrp	x1, .LANCHOR9
+	add	x3, x2, x0, sxtw 2
+	str	x3, [x1, #:lo12:.LANCHOR9]
+	ldrh	w1, [x23, #:lo12:.LANCHOR6]
+	add	w1, w0, w1, lsr 1
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	add	x1, x2, x1, sxtw 2
+	str	x1, [x25, #:lo12:.LANCHOR10]
+	tbz	x0, 12, .L4058
+	adrp	x0, .LC249
+	add	x0, x0, :lo12:.LC249
+	bl	printf
+.L4058:
+	ldrh	w0, [x22, #:lo12:.LANCHOR95]
+	ldrb	w21, [x21, #:lo12:.LANCHOR80]
+	ldrh	w1, [x23, #:lo12:.LANCHOR6]
+	ldrh	w22, [x24, #:lo12:.LANCHOR204]
+	mul	w21, w0, w21
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	add	w21, w1, w21, lsl 2
+	lsl	w1, w1, 2
+	lsl	w21, w21, 1
+	add	w22, w1, w22, lsl 2
+	add	w21, w21, 632
+	add	w22, w22, 704
+	tbz	x0, 12, .L4059
+	ldrh	w3, [x20, #:lo12:.LANCHOR221]
+	adrp	x0, .LC250
+	mov	w2, w22
+	mov	w1, w21
+	add	x0, x0, :lo12:.LC250
+	bl	printf
+.L4059:
+	ldrh	w0, [x20, #:lo12:.LANCHOR221]
+	cmp	w21, w0
+	bhi	.L4060
+	cmp	w22, w0
+	bls	.L4061
+.L4060:
+.L4114:
+	b	.L4114
+.L4038:
+	add	w1, w1, 1
+	lsl	w3, w3, 1
+	and	w1, w1, 65535
+	b	.L4037
+.L4040:
+	add	w4, w4, 1
+	lsl	w1, w1, 1
+	and	w4, w4, 65535
+	b	.L4039
+.L4043:
+	adrp	x0, .LANCHOR36
+	ldrb	w0, [x0, #:lo12:.LANCHOR36]
+	cbz	w0, .L4046
+	mov	w0, 1200
+	strh	w10, [x11, #:lo12:.LANCHOR125]
+	strh	w0, [x12, #:lo12:.LANCHOR126]
+	strh	w10, [x8, #:lo12:.LANCHOR153]
+	b	.L4046
+.L4061:
+	bl	sblk_init
+	bl	ftl_info_blk_init
+	cmn	w0, #1
+	beq	.L4036
+	bl	ftl_ext_info_init
+	adrp	x19, .LANCHOR110
+	bl	gc_init
+	mov	w0, 1
+	bl	pm_init
+	bl	lpa_rebuild_hash
+	ldr	x0, [x25, #:lo12:.LANCHOR10]
+	mov	x1, 0
+	add	x0, x0, 16
+	bl	ftl_open_sblk_recovery
+	ldr	x0, [x25, #:lo12:.LANCHOR10]
+	add	x1, x0, 16
+	add	x0, x0, 48
+	bl	ftl_open_sblk_recovery
+	ldr	x1, [x19, #:lo12:.LANCHOR110]
+	ldr	w0, [x1, 8]
+	add	w0, w0, 16
+	str	w0, [x1, 8]
+	ldr	x0, [x25, #:lo12:.LANCHOR10]
+	add	x0, x0, 16
+	bl	ftl_info_data_recovery
+	ldr	x0, [x25, #:lo12:.LANCHOR10]
+	add	x0, x0, 48
+	bl	ftl_info_data_recovery
+	ldr	x0, [x25, #:lo12:.LANCHOR10]
+	add	x0, x0, 80
+	bl	ftl_info_data_recovery
+	bl	gc_recovery
+	bl	pm_flush
+	mov	w0, 1
+	bl	ftl_total_vpn_update
+	adrp	x0, .LANCHOR198
+	ldrb	w0, [x0, #:lo12:.LANCHOR198]
+	cbz	w0, .L4063
+	ldr	x1, [x19, #:lo12:.LANCHOR110]
+	ldr	w0, [x1, 68]
+	add	w0, w0, 1
+	str	w0, [x1, 68]
+.L4063:
+	bl	ftl_ext_info_flush
+	mov	w0, 0
+	bl	ftl_info_flush
+	bl	print_ftl_debug_info
+	ldr	x0, [x25, #:lo12:.LANCHOR10]
+	ldrh	w0, [x0, 124]
+	cbnz	w0, .L4070
+	adrp	x0, .LANCHOR103
+	adrp	x1, .LANCHOR107
+	ldrh	w0, [x0, #:lo12:.LANCHOR103]
+	ldrh	w1, [x1, #:lo12:.LANCHOR107]
+	add	w0, w0, w1
+	cmp	w0, 7
+	ble	.L4070
+.L4066:
+	mov	w0, 0
+.L4036:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L4070:
+	adrp	x20, .LANCHOR103
+	adrp	x21, .LANCHOR107
+	add	x20, x20, :lo12:.LANCHOR103
+	add	x21, x21, :lo12:.LANCHOR107
+	mov	w19, 16384
+.L4067:
+	mov	w1, 1
+	mov	w0, 0
+	bl	zftl_do_gc
+	mov	w1, 1
+	mov	w0, w1
+	bl	zftl_do_gc
+	ldr	x0, [x25, #:lo12:.LANCHOR10]
+	ldrh	w1, [x0, 124]
+	cbnz	w1, .L4065
+	ldrh	w1, [x0, 80]
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L4065
+	ldrh	w0, [x20]
+	ldrh	w1, [x21]
+	add	w0, w0, w1
+	cmp	w0, 7
+	bgt	.L4066
+.L4065:
+	subs	w19, w19, #1
+	bne	.L4067
+	b	.L4066
+	.size	zftl_init, .-zftl_init
+	.section	.text.rk_ftl_init,"ax",@progbits
+	.align	2
+	.global	rk_ftl_init
+	.type	rk_ftl_init, %function
+rk_ftl_init:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	bl	nand_flash_init
+	cbnz	w0, .L4118
+	bl	zftl_init
+.L4118:
+	mov	w19, w0
+	bl	idb_init
+	mov	w1, w19
+	adrp	x0, .LC251
+	add	x0, x0, :lo12:.LC251
+	bl	printf
+	mov	w0, w19
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	rk_ftl_init, .-rk_ftl_init
+	.section	.text.zftl_write,"ax",@progbits
+	.align	2
+	.global	zftl_write
+	.type	zftl_write, %function
+zftl_write:
+	stp	x29, x30, [sp, -112]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w19, w0
+	adrp	x0, .LANCHOR14
+	stp	x21, x22, [sp, 32]
+	stp	x25, x26, [sp, 64]
+	mov	w20, w1
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	mov	w21, w2
+	stp	x23, x24, [sp, 48]
+	mov	x25, x3
+	stp	x27, x28, [sp, 80]
+	tbz	x0, 12, .L4121
+	ldr	w4, [x25]
+	mov	w3, w2
+	adrp	x0, .LC252
+	mov	w2, w1
+	add	x0, x0, :lo12:.LC252
+	mov	w1, w19
+	bl	printf
+.L4121:
+	cbnz	w19, .L4122
+	adrp	x0, .LANCHOR68
+	mov	w19, 24576
+	ldr	w0, [x0, #:lo12:.LANCHOR68]
+.L4123:
+	cmp	w0, w20
+	ccmp	w0, w21, 0, hi
+	bcc	.L4141
+	add	w1, w20, w21
+	cmp	w0, w1
+	bcc	.L4141
+	adrp	x26, .LANCHOR131
+	add	w19, w19, w20
+	sub	w22, w21, #1
+	adrp	x27, .LANCHOR67
+	ldrb	w0, [x26, #:lo12:.LANCHOR131]
+	add	w22, w22, w19
+	adrp	x28, .LANCHOR58
+	add	x27, x27, :lo12:.LANCHOR67
+	add	x28, x28, :lo12:.LANCHOR58
+	udiv	w24, w19, w0
+	udiv	w22, w22, w0
+	add	x0, x26, :lo12:.LANCHOR131
+	str	x0, [x29, 104]
+	mov	w20, w24
+	sub	w23, w22, w24
+	add	w23, w23, 1
+.L4125:
+	cbnz	w23, .L4134
+	bl	ftl_write_commit
+	adrp	x20, .LANCHOR103
+	bl	ftl_flush
+	adrp	x19, .LANCHOR107
+	mov	w1, 1
+	mov	w0, 0
+	bl	zftl_do_gc
+	adrp	x0, .LANCHOR10
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	ldrh	w0, [x0, 124]
+	cbnz	w0, .L4135
+	ldrh	w0, [x20, #:lo12:.LANCHOR103]
+	ldrh	w1, [x19, #:lo12:.LANCHOR107]
+	add	w0, w0, w1
+	cmp	w0, 11
+	bgt	.L4136
+.L4135:
+	mov	w1, 1
+	mov	w0, 0
+	bl	zftl_do_gc
+.L4136:
+	add	x20, x20, :lo12:.LANCHOR103
+	add	x19, x19, :lo12:.LANCHOR107
+.L4137:
+	ldrh	w0, [x20]
+	ldrh	w1, [x19]
+	add	w0, w0, w1
+	cmp	w0, 7
+	ble	.L4138
+	mov	w0, 0
+.L4120:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L4122:
+	cmp	w19, 3
+	bhi	.L4141
+	lsl	w19, w19, 13
+	mov	w0, 8192
+	b	.L4123
+.L4134:
+	ldrb	w0, [x27]
+	cbz	w0, .L4126
+	ldrb	w0, [x28]
+	cmp	w0, 2
+	bhi	.L4126
+	bl	ftl_write_commit
+.L4126:
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x26, x0
+	cbnz	x0, .L4127
+	bl	ftl_write_commit
+	b	.L4125
+.L4127:
+	strb	wzr, [x0, 57]
+	cmp	w20, w24
+	ldr	x0, [x29, 104]
+	ccmp	w20, w22, 4, ne
+	ldrb	w0, [x0]
+	strb	w0, [x26, 56]
+	bne	.L4130
+	cmp	w20, w24
+	bne	.L4131
+	udiv	w1, w19, w0
+	msub	w1, w1, w0, w19
+	and	w1, w1, 255
+	strb	w1, [x26, 57]
+	sub	w0, w0, w1
+	and	w0, w0, 255
+	cmp	w21, w0
+	csel	w0, w21, w0, cc
+.L4149:
+	strb	w0, [x26, 56]
+.L4130:
+	ldr	x4, [x26, 8]
+	mov	x1, x25
+	ldrb	w0, [x26, 57]
+	sub	w23, w23, #1
+	ldrb	w2, [x26, 56]
+	ubfiz	x0, x0, 9, 8
+	lsl	w2, w2, 9
+	add	x0, x4, x0
+	bl	ftl_memcpy
+	adrp	x0, .LANCHOR110
+	ldr	x1, [x0, #:lo12:.LANCHOR110]
+	ldr	w0, [x1, 8]
+	str	w20, [x26, 36]
+	add	w20, w20, 1
+	add	w2, w0, 1
+	str	w2, [x1, 8]
+	str	w0, [x26, 32]
+	mov	x0, x26
+	bl	ftl_write_buf
+	ldrb	w0, [x26, 56]
+	ubfiz	x0, x0, 9, 8
+	add	x25, x25, x0
+	b	.L4125
+.L4131:
+	add	w1, w19, w21
+	msub	w0, w0, w20, w1
+	b	.L4149
+.L4138:
+	mov	w1, 1
+	mov	w0, 0
+	bl	zftl_do_gc
+	mov	w1, 1
+	mov	w0, w1
+	bl	zftl_do_gc
+	b	.L4137
+.L4141:
+	mov	w0, -1
+	b	.L4120
+	.size	zftl_write, .-zftl_write
+	.section	.text.zftl_sys_write,"ax",@progbits
+	.align	2
+	.global	zftl_sys_write
+	.type	zftl_sys_write, %function
+zftl_sys_write:
+	mov	x3, x2
+	mov	w2, w1
+	mov	w1, w0
+	mov	w0, 2
+	b	zftl_write
+	.size	zftl_sys_write, .-zftl_sys_write
+	.section	.text.StorageSysDataStore,"ax",@progbits
+	.align	2
+	.global	StorageSysDataStore
+	.type	StorageSysDataStore, %function
+StorageSysDataStore:
+	mov	x3, x1
+	mov	w2, 1
+	mov	w1, w0
+	mov	w0, 2
+	b	zftl_write
+	.size	StorageSysDataStore, .-StorageSysDataStore
+	.section	.text.FlashBootVendorWrite,"ax",@progbits
+	.align	2
+	.global	FlashBootVendorWrite
+	.type	FlashBootVendorWrite, %function
+FlashBootVendorWrite:
+	mov	x3, x2
+	mov	w2, w1
+	add	w1, w0, 512
+	mov	w0, 2
+	b	zftl_write
+	.size	FlashBootVendorWrite, .-FlashBootVendorWrite
+	.section	.text.ftl_write,"ax",@progbits
+	.align	2
+	.global	ftl_write
+	.type	ftl_write, %function
+ftl_write:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w19, w2
+	stp	x21, x22, [sp, 32]
+	mov	x20, x3
+	mov	w22, w1
+	ands	w21, w0, 255
+	bne	.L4154
+	mov	w3, w2
+	mov	w0, 0
+	mov	x2, x20
+	bl	idb_write_data
+.L4154:
+	mov	x3, x20
+	mov	w2, w19
+	mov	w1, w22
+	mov	w0, w21
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	b	zftl_write
+	.size	ftl_write, .-ftl_write
+	.section	.text.ftl_vendor_write,"ax",@progbits
+	.align	2
+	.global	ftl_vendor_write
+	.type	ftl_vendor_write, %function
+ftl_vendor_write:
+	mov	x3, x2
+	mov	w2, w1
+	add	w1, w0, 512
+	mov	w0, 2
+	b	zftl_write
+	.size	ftl_vendor_write, .-ftl_vendor_write
+	.section	.text.zftl_vendor_write,"ax",@progbits
+	.align	2
+	.global	zftl_vendor_write
+	.type	zftl_vendor_write, %function
+zftl_vendor_write:
+	b	ftl_vendor_write
+	.size	zftl_vendor_write, .-zftl_vendor_write
+	.section	.text.zftl_discard,"ax",@progbits
+	.align	2
+	.global	zftl_discard
+	.type	zftl_discard, %function
+zftl_discard:
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w19, w1
+	adrp	x1, .LANCHOR68
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	ldr	w1, [x1, #:lo12:.LANCHOR68]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	cmp	w0, w1
+	ccmp	w19, w1, 2, cc
+	bhi	.L4180
+	add	w2, w0, w19
+	cmp	w1, w2
+	bcc	.L4180
+	adrp	x24, .LANCHOR241
+	add	w22, w0, 24576
+	adrp	x0, .LANCHOR14
+	str	x0, [x29, 104]
+	ldr	w1, [x24, #:lo12:.LANCHOR241]
+	ldr	w2, [x0, #:lo12:.LANCHOR14]
+	add	w1, w19, w1
+	str	w1, [x24, #:lo12:.LANCHOR241]
+	tbz	x2, 12, .L4160
+	adrp	x0, .LC253
+	mov	w4, 0
+	mov	w3, w19
+	mov	w2, w22
+	add	x0, x0, :lo12:.LC253
+	bl	printf
+.L4160:
+	adrp	x23, .LANCHOR110
+	adrp	x26, .LANCHOR131
+	ldr	x0, [x23, #:lo12:.LANCHOR110]
+	ldr	w27, [x0, 8]
+	add	w1, w27, 1
+	str	w1, [x0, 8]
+	bl	ftl_write_commit
+	bl	ftl_flush
+	ldrb	w21, [x26, #:lo12:.LANCHOR131]
+	udiv	w20, w22, w21
+	msub	w25, w20, w21, w22
+	cbz	w25, .L4161
+	sub	w21, w21, w25
+	mov	w0, w20
+	cmp	w21, w19
+	csel	w21, w21, w19, ls
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 120]
+	cmn	w0, #1
+	bne	.L4162
+	mov	w2, 0
+	add	x1, x29, 120
+	mov	w0, w20
+	bl	pm_log2phys
+.L4162:
+	ldr	w0, [x29, 120]
+	and	w28, w21, 65535
+	cmn	w0, #1
+	beq	.L4164
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x3, x0
+	cbz	x0, .L4164
+	strb	w25, [x0, 57]
+	ubfiz	x25, x25, 9, 25
+	strb	w21, [x0, 56]
+	mov	w1, 0
+	ldr	x0, [x0, 8]
+	lsl	w2, w28, 9
+	stp	w27, w20, [x3, 32]
+	str	x3, [x29, 96]
+	add	x0, x0, x25
+	bl	ftl_memset
+	ldr	x3, [x29, 96]
+	mov	x0, x3
+	bl	ftl_write_buf
+	bl	ftl_write_commit
+	ldr	x1, [x23, #:lo12:.LANCHOR110]
+	ldr	w0, [x1, 76]
+	add	w0, w0, 1
+	str	w0, [x1, 76]
+.L4164:
+	add	w20, w20, 1
+	sub	w19, w19, w28
+.L4161:
+	cbz	w19, .L4166
+	bl	ftl_flush
+.L4166:
+	adrp	x25, .LANCHOR75
+	add	x21, x26, :lo12:.LANCHOR131
+	add	x25, x25, :lo12:.LANCHOR75
+	mov	w0, -1
+	str	w0, [x29, 124]
+.L4167:
+	ldrb	w0, [x21]
+	cmp	w19, w0
+	bcs	.L4172
+	cbz	w19, .L4174
+	mov	w0, w20
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 120]
+	cmn	w0, #1
+	bne	.L4175
+	mov	w2, 0
+	add	x1, x29, 120
+	mov	w0, w20
+	bl	pm_log2phys
+.L4175:
+	ldr	w0, [x29, 120]
+	cmn	w0, #1
+	beq	.L4174
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x21, x0
+	cbz	x0, .L4174
+	strb	wzr, [x0, 57]
+	strb	w19, [x0, 56]
+	stp	w27, w20, [x21, 32]
+	ldrb	w0, [x26, #:lo12:.LANCHOR131]
+	cmp	w19, w0
+	bcc	.L4177
+	adrp	x1, .LANCHOR242
+	adrp	x0, .LC0
+	mov	w2, 1477
+	add	x1, x1, :lo12:.LANCHOR242
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L4177:
+	ldr	x0, [x21, 8]
+	lsl	w2, w19, 9
+	mov	w1, 0
+	bl	ftl_memset
+	mov	x0, x21
+	bl	ftl_write_buf
+	bl	ftl_write_commit
+	ldr	x1, [x23, #:lo12:.LANCHOR110]
+	ldr	w0, [x1, 76]
+	add	w0, w0, 1
+	str	w0, [x1, 76]
+.L4174:
+	ldr	w1, [x24, #:lo12:.LANCHOR241]
+	cmp	w1, 8192
+	bls	.L4181
+	ldr	x0, [x29, 104]
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L4178
+	adrp	x0, .LC253
+	mov	w4, 0
+	mov	w3, w19
+	mov	w2, w22
+	add	x0, x0, :lo12:.LC253
+	bl	printf
+.L4178:
+	str	wzr, [x24, #:lo12:.LANCHOR241]
+	bl	flt_sys_flush
+	adrp	x0, .LANCHOR122
+	mov	w1, 1
+	str	w1, [x0, #:lo12:.LANCHOR122]
+.L4181:
+	mov	w0, 0
+	b	.L4158
+.L4172:
+	mov	w0, w20
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 120]
+	cmn	w0, #1
+	beq	.L4168
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x28, x0
+	cbz	x0, .L4170
+	ldrb	w2, [x21]
+	mov	w1, 0
+	strb	w2, [x0, 56]
+	strb	wzr, [x0, 57]
+	ldr	x0, [x0, 8]
+	lsl	w2, w2, 9
+	stp	w27, w20, [x28, 32]
+	bl	ftl_memset
+	mov	x0, x28
+	bl	ftl_write_buf
+	bl	ftl_write_commit
+.L4207:
+	ldr	x1, [x23, #:lo12:.LANCHOR110]
+	ldr	w0, [x1, 76]
+	add	w0, w0, 1
+	str	w0, [x1, 76]
+.L4170:
+	ldrb	w0, [x21]
+	add	w20, w20, 1
+	sub	w19, w19, w0
+	b	.L4167
+.L4168:
+	mov	w2, 0
+	add	x1, x29, 120
+	mov	w0, w20
+	bl	pm_log2phys
+	ldr	w0, [x29, 120]
+	cmn	w0, #1
+	beq	.L4170
+	add	x1, x29, 124
+	mov	w2, 1
+	mov	w0, w20
+	bl	pm_log2phys
+	adrp	x0, .LANCHOR32
+	ldrh	w2, [x25]
+	ldrb	w1, [x0, #:lo12:.LANCHOR32]
+	mov	w0, 24
+	sub	w0, w0, w1
+	sub	w1, w0, w2
+	mov	w0, 1
+	lsl	w0, w0, w1
+	ldr	w1, [x29, 120]
+	sub	w0, w0, #1
+	lsr	w1, w1, w2
+	and	w0, w0, w1
+	adrp	x1, .LANCHOR76
+	ldrb	w1, [x1, #:lo12:.LANCHOR76]
+	udiv	w0, w0, w1
+	bl	ftl_vpn_decrement
+	b	.L4207
+.L4180:
+	mov	w0, -1
+.L4158:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+	.size	zftl_discard, .-zftl_discard
+	.section	.text.ftl_discard,"ax",@progbits
+	.align	2
+	.global	ftl_discard
+	.type	ftl_discard, %function
+ftl_discard:
+	mov	w0, w1
+	mov	w1, w2
+	b	zftl_discard
+	.size	ftl_discard, .-ftl_discard
+	.section	.text.dump_pm_blk,"ax",@progbits
+	.align	2
+	.global	dump_pm_blk
+	.type	dump_pm_blk, %function
+dump_pm_blk:
+	stp	x29, x30, [sp, -48]!
+	mov	w2, 4
+	adrp	x0, .LC254
+	add	x0, x0, :lo12:.LC254
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR110
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR155
+	ldr	x1, [x20, #:lo12:.LANCHOR110]
+	mov	w19, 0
+	mov	w22, 65535
+	add	x1, x1, 704
+	ldrh	w3, [x1, -6]
+	bl	rknand_print_hex
+	ldrh	w3, [x21, #:lo12:.LANCHOR155]
+	add	x21, x21, :lo12:.LANCHOR155
+	ldr	x1, [x20, #:lo12:.LANCHOR110]
+	mov	w2, 2
+	adrp	x0, .LC255
+	add	x0, x0, :lo12:.LC255
+	add	x1, x1, 416
+	bl	rknand_print_hex
+.L4210:
+	ldrh	w0, [x21]
+	cmp	w0, w19
+	bhi	.L4212
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
+.L4212:
+	ldr	x0, [x20, #:lo12:.LANCHOR110]
+	add	x0, x0, x19, sxtw 1
+	ldrh	w0, [x0, 416]
+	cmp	w0, w22
+	beq	.L4211
+	mov	x1, 0
+	bl	ftl_sblk_dump
+.L4211:
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L4210
+	.size	dump_pm_blk, .-dump_pm_blk
+	.global	g_pm_spare
+	.global	pm_first_write
+	.global	pm_force_gc
+	.global	pm_gc_enable
+	.global	pm_last_load_ram_id
+	.global	pm_last_update_ram_id
+	.global	pm_ram_info
+	.global	sblk_gc_write_completed_queue_head
+	.global	sblk_read_completed_queue_head
+	.global	sblk_write_completed_queue_head
+	.global	sblk_queue_head
+	.global	slc_cache_sblk
+	.global	xlc_data_sblk
+	.global	slc_data_sblk
+	.global	free_mix_sblk
+	.global	free_xlc_sblk
+	.global	free_slc_sblk
+	.global	gp_data_xlc_data_head
+	.global	gp_data_slc_data_head
+	.global	gp_data_slc_cache_head
+	.global	gp_free_mix_head
+	.global	gp_free_xlc_head
+	.global	gp_free_slc_head
+	.global	gp_sblk_list_tbl
+	.global	zftl_print_list_count
+	.global	ftl_ext_info_first_write
+	.global	ftl_sys_info_first_write
+	.global	ftl_low_format_cur_blk
+	.global	ftl_power_lost_flag
+	.global	ftl_vpn_update_count
+	.global	ftl_sblk_update_list_offset
+	.global	ftl_sblk_update_list
+	.global	ftl_sblk_vpn_update_id
+	.global	ftl_sblk_lpa_tbl
+	.global	ftl_sblk_vpn
+	.global	gp_ftl_ext_info
+	.global	gp_ftl_info
+	.global	gp_blk_info
+	.global	ftl_tmp_buffer
+	.global	ftl_ext_info_data_buffer
+	.global	ftl_info_data_buffer
+	.global	ftl_tmp_spare
+	.global	ftl_info_spare
+	.global	g_ftl_info_blk
+	.global	tlc_b05a_prog_tbl
+	.global	tlc_prog_order
+	.global	gc_des_ppa_tbl
+	.global	gc_valid_page_ppa
+	.global	gc_page_buf_id
+	.global	gc_pre_ppa_tbl
+	.global	gc_lpa_tbl
+	.global	g_gc_info
+	.global	gc_xlc_search_index
+	.global	gc_xlc_data_index
+	.global	gc_slc_cache_index
+	.global	gc_slc_data_index
+	.global	gc_free_slc_sblk_th
+	.global	gc_slc_mode_vpn_th
+	.global	gc_slc_mode_slc_vpn_th
+	.global	gc_slc_mode_tlc_vpn_th
+	.global	gc_tlc_mode_tlc_vpn_th
+	.global	gc_tlc_mode_slc_vpn_th
+	.global	gc_state
+	.global	gc_mode
+	.global	p_read_ahead_ext_buf
+	.global	discard_sector_count
+	.global	read_ahead_lpa
+	.global	_ftl_gc_tag_page_num
+	.global	read_buf_count
+	.global	read_buf_head
+	.global	write_commit_count
+	.global	write_commit_head
+	.global	write_buf_count
+	.global	write_buf_head
+	.global	ftl_flush_jiffies
+	.global	lpa_hash
+	.global	lpa_hash_index
+	.global	_c_slc_to_xlc_ec_ratio
+	.global	_c_mix_max_xlc_ec_count
+	.global	_c_mix_max_slc_ec_count
+	.global	_c_swl_xlc_gc_th
+	.global	_c_swl_slc_gc_th
+	.global	_gc_after_discard_en
+	.global	_last_write_time
+	.global	_last_read_time
+	.global	_min_slc_super_block
+	.global	_max_xlc_super_block
+	.global	_c_max_pm_sblk
+	.global	_c_ftl_pm_page_num
+	.global	_c_totle_log_page
+	.global	_c_totle_data_density
+	.global	_c_user_data_density
+	.global	_c_totle_phy_density
+	.global	_c_ftl_block_addr_log2
+	.global	_c_ftl_block_align_addr
+	.global	_c_ftl_byte_pre_page
+	.global	_c_ftl_nand_blks_per_die
+	.global	_c_ftl_page_pre_slc_blk
+	.global	_c_ftl_page_pre_blk
+	.global	_c_ftl_blk_pre_plane
+	.global	_c_ftl_nand_planes_num
+	.global	_c_ftl_planes_per_die
+	.global	_c_ftl_sec_per_page
+	.global	_c_ftl_nand_die_num
+	.global	_c_ftl_nand_type
+	.global	zftl_debug
+	.global	g_flash_blk_info
+	.global	gp_flash_info
+	.global	p_free_buf_head
+	.global	free_buf_count
+	.global	g_buf
+	.global	nandc_ecc_sts
+	.global	g_nandc_v6_master_info
+	.global	nandc_randomizer_en
+	.global	nandc_hw_seed
+	.global	fill_spare_size
+	.global	g_nandc_ecc_bits
+	.global	g_nandc_tran_timeout
+	.global	g_nandc_ver
+	.global	gp_nandc
+	.global	hy_f26_ref_value
+	.global	sd15_tlc_rr
+	.global	sd15_slc_rr
+	.global	g_nand_para_info
+	.global	gp_nand_para_info
+	.global	g_nand_opt_para
+	.global	g_msb_page_tbl
+	.global	g_lsb_page_tbl
+	.global	g_die_addr
+	.global	g_die_cs_idx
+	.global	IDByte
+	.global	flash_read_retry
+	.global	_c_ftl_cs_bits
+	.global	g_maxRetryCount
+	.global	g_maxRegNum
+	.global	g_retryMode
+	.global	g_flash_toggle_mode_en
+	.global	g_flash_ymtc_3d_tlc_flag
+	.global	g_flash_micron_3d_tlc_b16a
+	.global	g_flash_micron_3d_tlc_b05a
+	.global	g_flash_micron_3d_tlc_flag
+	.global	g_flash_3d_mlc_flag
+	.global	g_flash_3d_tlc_flag
+	.global	g_flash_multi_page_prog_en
+	.global	g_flash_multi_page_read_en
+	.global	g_flash_interface_mode
+	.global	g_idb_ecc_bits
+	.global	g_idb_slc_mode_enable
+	.global	g_one_pass_program
+	.global	g_slc_mode_addr2
+	.global	g_slc_mode_enable
+	.global	g_flash_cur_mode
+	.global	g_flash_six_addr
+	.global	g_flash_slc_mode
+	.global	g_slc_page_num
+	.global	g_totle_phy_block
+	.global	g_block_align_addr
+	.global	g_flash_reversd_blks
+	.global	g_nand_max_die
+	.global	g_flash_tmp_spare_buffer
+	.global	g_flash_tmp_page_buffer
+	.global	g_flash_sys_spare_buffer
+	.global	g_flash_spare_buffer
+	.global	g_flash_page_buffer
+	.section	.bss.IDByte,"aw",@nobits
+	.align	2
+	.set	.LANCHOR48,. + 0
+	.type	IDByte, %object
+	.size	IDByte, 32
+IDByte:
+	.zero	32
+	.section	.bss._c_ftl_blk_pre_plane,"aw",@nobits
+	.align	1
+	.set	.LANCHOR6,. + 0
+	.type	_c_ftl_blk_pre_plane, %object
+	.size	_c_ftl_blk_pre_plane, 2
+_c_ftl_blk_pre_plane:
+	.zero	2
+	.section	.bss._c_ftl_block_addr_log2,"aw",@nobits
+	.align	1
+	.set	.LANCHOR75,. + 0
+	.type	_c_ftl_block_addr_log2, %object
+	.size	_c_ftl_block_addr_log2, 2
+_c_ftl_block_addr_log2:
+	.zero	2
+	.section	.bss._c_ftl_block_align_addr,"aw",@nobits
+	.align	1
+	.set	.LANCHOR111,. + 0
+	.type	_c_ftl_block_align_addr, %object
+	.size	_c_ftl_block_align_addr, 2
+_c_ftl_block_align_addr:
+	.zero	2
+	.section	.bss._c_ftl_byte_pre_page,"aw",@nobits
+	.align	1
+	.set	.LANCHOR221,. + 0
+	.type	_c_ftl_byte_pre_page, %object
+	.size	_c_ftl_byte_pre_page, 2
+_c_ftl_byte_pre_page:
+	.zero	2
+	.section	.bss._c_ftl_cs_bits,"aw",@nobits
+	.set	.LANCHOR32,. + 0
+	.type	_c_ftl_cs_bits, %object
+	.size	_c_ftl_cs_bits, 1
+_c_ftl_cs_bits:
+	.zero	1
+	.section	.bss._c_ftl_nand_blks_per_die,"aw",@nobits
+	.align	1
+	.type	_c_ftl_nand_blks_per_die, %object
+	.size	_c_ftl_nand_blks_per_die, 2
+_c_ftl_nand_blks_per_die:
+	.zero	2
+	.section	.bss._c_ftl_nand_die_num,"aw",@nobits
+	.set	.LANCHOR112,. + 0
+	.type	_c_ftl_nand_die_num, %object
+	.size	_c_ftl_nand_die_num, 1
+_c_ftl_nand_die_num:
+	.zero	1
+	.section	.bss._c_ftl_nand_planes_num,"aw",@nobits
+	.set	.LANCHOR80,. + 0
+	.type	_c_ftl_nand_planes_num, %object
+	.size	_c_ftl_nand_planes_num, 1
+_c_ftl_nand_planes_num:
+	.zero	1
+	.section	.bss._c_ftl_nand_type,"aw",@nobits
+	.set	.LANCHOR79,. + 0
+	.type	_c_ftl_nand_type, %object
+	.size	_c_ftl_nand_type, 1
+_c_ftl_nand_type:
+	.zero	1
+	.section	.bss._c_ftl_page_pre_blk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR86,. + 0
+	.type	_c_ftl_page_pre_blk, %object
+	.size	_c_ftl_page_pre_blk, 2
+_c_ftl_page_pre_blk:
+	.zero	2
+	.section	.bss._c_ftl_page_pre_slc_blk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR95,. + 0
+	.type	_c_ftl_page_pre_slc_blk, %object
+	.size	_c_ftl_page_pre_slc_blk, 2
+_c_ftl_page_pre_slc_blk:
+	.zero	2
+	.section	.bss._c_ftl_planes_per_die,"aw",@nobits
+	.set	.LANCHOR76,. + 0
+	.type	_c_ftl_planes_per_die, %object
+	.size	_c_ftl_planes_per_die, 1
+_c_ftl_planes_per_die:
+	.zero	1
+	.section	.bss._c_ftl_pm_page_num,"aw",@nobits
+	.align	1
+	.set	.LANCHOR204,. + 0
+	.type	_c_ftl_pm_page_num, %object
+	.size	_c_ftl_pm_page_num, 2
+_c_ftl_pm_page_num:
+	.zero	2
+	.section	.bss._c_ftl_sec_per_page,"aw",@nobits
+	.set	.LANCHOR131,. + 0
+	.type	_c_ftl_sec_per_page, %object
+	.size	_c_ftl_sec_per_page, 1
+_c_ftl_sec_per_page:
+	.zero	1
+	.section	.bss._c_max_pm_sblk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR155,. + 0
+	.type	_c_max_pm_sblk, %object
+	.size	_c_max_pm_sblk, 2
+_c_max_pm_sblk:
+	.zero	2
+	.section	.bss._c_mix_max_slc_ec_count,"aw",@nobits
+	.align	1
+	.set	.LANCHOR126,. + 0
+	.type	_c_mix_max_slc_ec_count, %object
+	.size	_c_mix_max_slc_ec_count, 2
+_c_mix_max_slc_ec_count:
+	.zero	2
+	.section	.bss._c_mix_max_xlc_ec_count,"aw",@nobits
+	.align	1
+	.set	.LANCHOR125,. + 0
+	.type	_c_mix_max_xlc_ec_count, %object
+	.size	_c_mix_max_xlc_ec_count, 2
+_c_mix_max_xlc_ec_count:
+	.zero	2
+	.section	.bss._c_slc_to_xlc_ec_ratio,"aw",@nobits
+	.align	1
+	.set	.LANCHOR8,. + 0
+	.type	_c_slc_to_xlc_ec_ratio, %object
+	.size	_c_slc_to_xlc_ec_ratio, 2
+_c_slc_to_xlc_ec_ratio:
+	.zero	2
+	.section	.bss._c_swl_slc_gc_th,"aw",@nobits
+	.align	1
+	.set	.LANCHOR152,. + 0
+	.type	_c_swl_slc_gc_th, %object
+	.size	_c_swl_slc_gc_th, 2
+_c_swl_slc_gc_th:
+	.zero	2
+	.section	.bss._c_swl_xlc_gc_th,"aw",@nobits
+	.align	1
+	.set	.LANCHOR153,. + 0
+	.type	_c_swl_xlc_gc_th, %object
+	.size	_c_swl_xlc_gc_th, 2
+_c_swl_xlc_gc_th:
+	.zero	2
+	.section	.bss._c_totle_data_density,"aw",@nobits
+	.align	2
+	.set	.LANCHOR240,. + 0
+	.type	_c_totle_data_density, %object
+	.size	_c_totle_data_density, 4
+_c_totle_data_density:
+	.zero	4
+	.section	.bss._c_totle_log_page,"aw",@nobits
+	.align	2
+	.set	.LANCHOR128,. + 0
+	.type	_c_totle_log_page, %object
+	.size	_c_totle_log_page, 4
+_c_totle_log_page:
+	.zero	4
+	.section	.bss._c_totle_phy_density,"aw",@nobits
+	.align	2
+	.set	.LANCHOR239,. + 0
+	.type	_c_totle_phy_density, %object
+	.size	_c_totle_phy_density, 4
+_c_totle_phy_density:
+	.zero	4
+	.section	.bss._c_user_data_density,"aw",@nobits
+	.align	2
+	.set	.LANCHOR68,. + 0
+	.type	_c_user_data_density, %object
+	.size	_c_user_data_density, 4
+_c_user_data_density:
+	.zero	4
+	.section	.bss._ftl_gc_tag_page_num,"aw",@nobits
+	.set	.LANCHOR224,. + 0
+	.type	_ftl_gc_tag_page_num, %object
+	.size	_ftl_gc_tag_page_num, 1
+_ftl_gc_tag_page_num:
+	.zero	1
+	.section	.bss._gc_after_discard_en,"aw",@nobits
+	.align	2
+	.set	.LANCHOR122,. + 0
+	.type	_gc_after_discard_en, %object
+	.size	_gc_after_discard_en, 4
+_gc_after_discard_en:
+	.zero	4
+	.section	.bss._last_read_time,"aw",@nobits
+	.align	2
+	.type	_last_read_time, %object
+	.size	_last_read_time, 4
+_last_read_time:
+	.zero	4
+	.section	.bss._last_write_time,"aw",@nobits
+	.align	2
+	.type	_last_write_time, %object
+	.size	_last_write_time, 4
+_last_write_time:
+	.zero	4
+	.section	.bss._max_xlc_super_block,"aw",@nobits
+	.align	1
+	.set	.LANCHOR101,. + 0
+	.type	_max_xlc_super_block, %object
+	.size	_max_xlc_super_block, 2
+_max_xlc_super_block:
+	.zero	2
+	.section	.bss._min_slc_super_block,"aw",@nobits
+	.align	1
+	.set	.LANCHOR98,. + 0
+	.type	_min_slc_super_block, %object
+	.size	_min_slc_super_block, 2
+_min_slc_super_block:
+	.zero	2
+	.section	.bss.discard_sector_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR241,. + 0
+	.type	discard_sector_count, %object
+	.size	discard_sector_count, 4
+discard_sector_count:
+	.zero	4
+	.section	.bss.fill_spare_size,"aw",@nobits
+	.align	1
+	.set	.LANCHOR54,. + 0
+	.type	fill_spare_size, %object
+	.size	fill_spare_size, 2
+fill_spare_size:
+	.zero	2
+	.section	.bss.flash_ddr_tuning_sdr_read_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR172,. + 0
+	.type	flash_ddr_tuning_sdr_read_count, %object
+	.size	flash_ddr_tuning_sdr_read_count, 4
+flash_ddr_tuning_sdr_read_count:
+	.zero	4
+	.section	.bss.flash_read_retry,"aw",@nobits
+	.align	3
+	.set	.LANCHOR174,. + 0
+	.type	flash_read_retry, %object
+	.size	flash_read_retry, 8
+flash_read_retry:
+	.zero	8
+	.section	.bss.free_buf_count,"aw",@nobits
+	.set	.LANCHOR58,. + 0
+	.type	free_buf_count, %object
+	.size	free_buf_count, 1
+free_buf_count:
+	.zero	1
+	.section	.bss.free_mix_sblk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR107,. + 0
+	.type	free_mix_sblk, %object
+	.size	free_mix_sblk, 2
+free_mix_sblk:
+	.zero	2
+	.section	.bss.free_slc_sblk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR103,. + 0
+	.type	free_slc_sblk, %object
+	.size	free_slc_sblk, 2
+free_slc_sblk:
+	.zero	2
+	.section	.bss.free_xlc_sblk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR105,. + 0
+	.type	free_xlc_sblk, %object
+	.size	free_xlc_sblk, 2
+free_xlc_sblk:
+	.zero	2
+	.section	.bss.ftl_ext_info_data_buffer,"aw",@nobits
+	.align	3
+	.set	.LANCHOR200,. + 0
+	.type	ftl_ext_info_data_buffer, %object
+	.size	ftl_ext_info_data_buffer, 8
+ftl_ext_info_data_buffer:
+	.zero	8
+	.section	.bss.ftl_ext_info_first_write,"aw",@nobits
+	.set	.LANCHOR199,. + 0
+	.type	ftl_ext_info_first_write, %object
+	.size	ftl_ext_info_first_write, 1
+ftl_ext_info_first_write:
+	.zero	1
+	.section	.bss.ftl_flush_jiffies,"aw",@nobits
+	.align	2
+	.set	.LANCHOR233,. + 0
+	.type	ftl_flush_jiffies, %object
+	.size	ftl_flush_jiffies, 4
+ftl_flush_jiffies:
+	.zero	4
+	.section	.bss.ftl_info_data_buffer,"aw",@nobits
+	.align	3
+	.set	.LANCHOR195,. + 0
+	.type	ftl_info_data_buffer, %object
+	.size	ftl_info_data_buffer, 8
+ftl_info_data_buffer:
+	.zero	8
+	.section	.bss.ftl_info_spare,"aw",@nobits
+	.align	6
+	.set	.LANCHOR193,. + 0
+	.type	ftl_info_spare, %object
+	.size	ftl_info_spare, 256
+ftl_info_spare:
+	.zero	256
+	.section	.bss.ftl_low_format_cur_blk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR69,. + 0
+	.type	ftl_low_format_cur_blk, %object
+	.size	ftl_low_format_cur_blk, 2
+ftl_low_format_cur_blk:
+	.zero	2
+	.section	.bss.ftl_power_lost_flag,"aw",@nobits
+	.set	.LANCHOR198,. + 0
+	.type	ftl_power_lost_flag, %object
+	.size	ftl_power_lost_flag, 1
+ftl_power_lost_flag:
+	.zero	1
+	.section	.bss.ftl_sblk_lpa_tbl,"aw",@nobits
+	.align	3
+	.set	.LANCHOR117,. + 0
+	.type	ftl_sblk_lpa_tbl, %object
+	.size	ftl_sblk_lpa_tbl, 8
+ftl_sblk_lpa_tbl:
+	.zero	8
+	.section	.bss.ftl_sblk_update_list,"aw",@nobits
+	.align	3
+	.set	.LANCHOR74,. + 0
+	.type	ftl_sblk_update_list, %object
+	.size	ftl_sblk_update_list, 16
+ftl_sblk_update_list:
+	.zero	16
+	.section	.bss.ftl_sblk_update_list_offset,"aw",@nobits
+	.align	1
+	.set	.LANCHOR123,. + 0
+	.type	ftl_sblk_update_list_offset, %object
+	.size	ftl_sblk_update_list_offset, 2
+ftl_sblk_update_list_offset:
+	.zero	2
+	.section	.bss.ftl_sblk_vpn,"aw",@nobits
+	.align	3
+	.set	.LANCHOR9,. + 0
+	.type	ftl_sblk_vpn, %object
+	.size	ftl_sblk_vpn, 8
+ftl_sblk_vpn:
+	.zero	8
+	.section	.bss.ftl_sblk_vpn_update_id,"aw",@nobits
+	.align	1
+	.set	.LANCHOR73,. + 0
+	.type	ftl_sblk_vpn_update_id, %object
+	.size	ftl_sblk_vpn_update_id, 2
+ftl_sblk_vpn_update_id:
+	.zero	2
+	.section	.bss.ftl_sys_info_first_write,"aw",@nobits
+	.set	.LANCHOR197,. + 0
+	.type	ftl_sys_info_first_write, %object
+	.size	ftl_sys_info_first_write, 1
+ftl_sys_info_first_write:
+	.zero	1
+	.section	.bss.ftl_tmp_buffer,"aw",@nobits
+	.align	3
+	.set	.LANCHOR190,. + 0
+	.type	ftl_tmp_buffer, %object
+	.size	ftl_tmp_buffer, 8
+ftl_tmp_buffer:
+	.zero	8
+	.section	.bss.ftl_tmp_spare,"aw",@nobits
+	.align	6
+	.set	.LANCHOR191,. + 0
+	.type	ftl_tmp_spare, %object
+	.size	ftl_tmp_spare, 256
+ftl_tmp_spare:
+	.zero	256
+	.section	.bss.ftl_vpn_update_count,"aw",@nobits
+	.align	1
+	.set	.LANCHOR121,. + 0
+	.type	ftl_vpn_update_count, %object
+	.size	ftl_vpn_update_count, 2
+ftl_vpn_update_count:
+	.zero	2
+	.section	.bss.g_block_align_addr,"aw",@nobits
+	.align	1
+	.set	.LANCHOR2,. + 0
+	.type	g_block_align_addr, %object
+	.size	g_block_align_addr, 2
+g_block_align_addr:
+	.zero	2
+	.section	.bss.g_buf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR56,. + 0
+	.type	g_buf, %object
+	.size	g_buf, 1024
+g_buf:
+	.zero	1024
+	.section	.bss.g_die_addr,"aw",@nobits
+	.align	2
+	.set	.LANCHOR148,. + 0
+	.type	g_die_addr, %object
+	.size	g_die_addr, 32
+g_die_addr:
+	.zero	32
+	.section	.bss.g_die_cs_idx,"aw",@nobits
+	.align	2
+	.set	.LANCHOR30,. + 0
+	.type	g_die_cs_idx, %object
+	.size	g_die_cs_idx, 8
+g_die_cs_idx:
+	.zero	8
+	.section	.bss.g_flash_3d_mlc_flag,"aw",@nobits
+	.set	.LANCHOR81,. + 0
+	.type	g_flash_3d_mlc_flag, %object
+	.size	g_flash_3d_mlc_flag, 1
+g_flash_3d_mlc_flag:
+	.zero	1
+	.section	.bss.g_flash_3d_tlc_flag,"aw",@nobits
+	.set	.LANCHOR84,. + 0
+	.type	g_flash_3d_tlc_flag, %object
+	.size	g_flash_3d_tlc_flag, 1
+g_flash_3d_tlc_flag:
+	.zero	1
+	.section	.bss.g_flash_blk_info,"aw",@nobits
+	.align	3
+	.set	.LANCHOR211,. + 0
+	.type	g_flash_blk_info, %object
+	.size	g_flash_blk_info, 4
+g_flash_blk_info:
+	.zero	4
+	.section	.bss.g_flash_cur_mode,"aw",@nobits
+	.align	3
+	.set	.LANCHOR34,. + 0
+	.type	g_flash_cur_mode, %object
+	.size	g_flash_cur_mode, 4
+g_flash_cur_mode:
+	.zero	4
+	.section	.bss.g_flash_interface_mode,"aw",@nobits
+	.set	.LANCHOR49,. + 0
+	.type	g_flash_interface_mode, %object
+	.size	g_flash_interface_mode, 1
+g_flash_interface_mode:
+	.zero	1
+	.section	.bss.g_flash_micron_3d_tlc_b05a,"aw",@nobits
+	.set	.LANCHOR124,. + 0
+	.type	g_flash_micron_3d_tlc_b05a, %object
+	.size	g_flash_micron_3d_tlc_b05a, 1
+g_flash_micron_3d_tlc_b05a:
+	.zero	1
+	.section	.bss.g_flash_micron_3d_tlc_b16a,"aw",@nobits
+	.set	.LANCHOR217,. + 0
+	.type	g_flash_micron_3d_tlc_b16a, %object
+	.size	g_flash_micron_3d_tlc_b16a, 1
+g_flash_micron_3d_tlc_b16a:
+	.zero	1
+	.section	.bss.g_flash_micron_3d_tlc_flag,"aw",@nobits
+	.set	.LANCHOR36,. + 0
+	.type	g_flash_micron_3d_tlc_flag, %object
+	.size	g_flash_micron_3d_tlc_flag, 1
+g_flash_micron_3d_tlc_flag:
+	.zero	1
+	.section	.bss.g_flash_multi_page_prog_en,"aw",@nobits
+	.set	.LANCHOR45,. + 0
+	.type	g_flash_multi_page_prog_en, %object
+	.size	g_flash_multi_page_prog_en, 1
+g_flash_multi_page_prog_en:
+	.zero	1
+	.section	.bss.g_flash_multi_page_read_en,"aw",@nobits
+	.set	.LANCHOR186,. + 0
+	.type	g_flash_multi_page_read_en, %object
+	.size	g_flash_multi_page_read_en, 1
+g_flash_multi_page_read_en:
+	.zero	1
+	.section	.bss.g_flash_page_buffer,"aw",@nobits
+	.align	3
+	.set	.LANCHOR176,. + 0
+	.type	g_flash_page_buffer, %object
+	.size	g_flash_page_buffer, 8
+g_flash_page_buffer:
+	.zero	8
+	.section	.bss.g_flash_reversd_blks,"aw",@nobits
+	.set	.LANCHOR216,. + 0
+	.type	g_flash_reversd_blks, %object
+	.size	g_flash_reversd_blks, 1
+g_flash_reversd_blks:
+	.zero	1
+	.section	.bss.g_flash_six_addr,"aw",@nobits
+	.set	.LANCHOR31,. + 0
+	.type	g_flash_six_addr, %object
+	.size	g_flash_six_addr, 1
+g_flash_six_addr:
+	.zero	1
+	.section	.bss.g_flash_slc_mode,"aw",@nobits
+	.set	.LANCHOR0,. + 0
+	.type	g_flash_slc_mode, %object
+	.size	g_flash_slc_mode, 1
+g_flash_slc_mode:
+	.zero	1
+	.section	.bss.g_flash_spare_buffer,"aw",@nobits
+	.align	3
+	.set	.LANCHOR175,. + 0
+	.type	g_flash_spare_buffer, %object
+	.size	g_flash_spare_buffer, 8
+g_flash_spare_buffer:
+	.zero	8
+	.section	.bss.g_flash_sys_spare_buffer,"aw",@nobits
+	.align	3
+	.set	.LANCHOR210,. + 0
+	.type	g_flash_sys_spare_buffer, %object
+	.size	g_flash_sys_spare_buffer, 8
+g_flash_sys_spare_buffer:
+	.zero	8
+	.section	.bss.g_flash_tmp_page_buffer,"aw",@nobits
+	.align	3
+	.set	.LANCHOR166,. + 0
+	.type	g_flash_tmp_page_buffer, %object
+	.size	g_flash_tmp_page_buffer, 8
+g_flash_tmp_page_buffer:
+	.zero	8
+	.section	.bss.g_flash_tmp_spare_buffer,"aw",@nobits
+	.align	3
+	.set	.LANCHOR168,. + 0
+	.type	g_flash_tmp_spare_buffer, %object
+	.size	g_flash_tmp_spare_buffer, 8
+g_flash_tmp_spare_buffer:
+	.zero	8
+	.section	.bss.g_flash_toggle_mode_en,"aw",@nobits
+	.set	.LANCHOR21,. + 0
+	.type	g_flash_toggle_mode_en, %object
+	.size	g_flash_toggle_mode_en, 1
+g_flash_toggle_mode_en:
+	.zero	1
+	.section	.bss.g_flash_ymtc_3d_tlc_flag,"aw",@nobits
+	.set	.LANCHOR37,. + 0
+	.type	g_flash_ymtc_3d_tlc_flag, %object
+	.size	g_flash_ymtc_3d_tlc_flag, 1
+g_flash_ymtc_3d_tlc_flag:
+	.zero	1
+	.section	.bss.g_ftl_info_blk,"aw",@nobits
+	.align	6
+	.set	.LANCHOR194,. + 0
+	.type	g_ftl_info_blk, %object
+	.size	g_ftl_info_blk, 4
+g_ftl_info_blk:
+	.zero	4
+	.section	.bss.g_gc_info,"aw",@nobits
+	.align	3
+	.set	.LANCHOR71,. + 0
+	.type	g_gc_info, %object
+	.size	g_gc_info, 2136
+g_gc_info:
+	.zero	2136
+	.section	.bss.g_idb_ecc_bits,"aw",@nobits
+	.set	.LANCHOR17,. + 0
+	.type	g_idb_ecc_bits, %object
+	.size	g_idb_ecc_bits, 1
+g_idb_ecc_bits:
+	.zero	1
+	.section	.bss.g_idb_slc_mode_enable,"aw",@nobits
+	.set	.LANCHOR19,. + 0
+	.type	g_idb_slc_mode_enable, %object
+	.size	g_idb_slc_mode_enable, 1
+g_idb_slc_mode_enable:
+	.zero	1
+	.section	.bss.g_lsb_page_tbl,"aw",@nobits
+	.align	2
+	.set	.LANCHOR3,. + 0
+	.type	g_lsb_page_tbl, %object
+	.size	g_lsb_page_tbl, 1024
+g_lsb_page_tbl:
+	.zero	1024
+	.section	.bss.g_maxRegNum,"aw",@nobits
+	.set	.LANCHOR26,. + 0
+	.type	g_maxRegNum, %object
+	.size	g_maxRegNum, 1
+g_maxRegNum:
+	.zero	1
+	.section	.bss.g_maxRetryCount,"aw",@nobits
+	.set	.LANCHOR169,. + 0
+	.type	g_maxRetryCount, %object
+	.size	g_maxRetryCount, 1
+g_maxRetryCount:
+	.zero	1
+	.section	.bss.g_msb_page_tbl,"aw",@nobits
+	.align	2
+	.set	.LANCHOR145,. + 0
+	.type	g_msb_page_tbl, %object
+	.size	g_msb_page_tbl, 2048
+g_msb_page_tbl:
+	.zero	2048
+	.section	.bss.g_nand_max_die,"aw",@nobits
+	.set	.LANCHOR18,. + 0
+	.type	g_nand_max_die, %object
+	.size	g_nand_max_die, 1
+g_nand_max_die:
+	.zero	1
+	.section	.bss.g_nand_opt_para,"aw",@nobits
+	.align	3
+	.set	.LANCHOR20,. + 0
+	.type	g_nand_opt_para, %object
+	.size	g_nand_opt_para, 32
+g_nand_opt_para:
+	.zero	32
+	.section	.bss.g_nandc_ecc_bits,"aw",@nobits
+	.set	.LANCHOR50,. + 0
+	.type	g_nandc_ecc_bits, %object
+	.size	g_nandc_ecc_bits, 1
+g_nandc_ecc_bits:
+	.zero	1
+	.section	.bss.g_nandc_tran_timeout,"aw",@nobits
+	.set	.LANCHOR167,. + 0
+	.type	g_nandc_tran_timeout, %object
+	.size	g_nandc_tran_timeout, 1
+g_nandc_tran_timeout:
+	.zero	1
+	.section	.bss.g_nandc_v6_master_info,"aw",@nobits
+	.align	3
+	.set	.LANCHOR53,. + 0
+	.type	g_nandc_v6_master_info, %object
+	.size	g_nandc_v6_master_info, 40
+g_nandc_v6_master_info:
+	.zero	40
+	.section	.bss.g_nandc_ver,"aw",@nobits
+	.set	.LANCHOR28,. + 0
+	.type	g_nandc_ver, %object
+	.size	g_nandc_ver, 1
+g_nandc_ver:
+	.zero	1
+	.section	.bss.g_one_pass_program,"aw",@nobits
+	.set	.LANCHOR82,. + 0
+	.type	g_one_pass_program, %object
+	.size	g_one_pass_program, 1
+g_one_pass_program:
+	.zero	1
+	.section	.bss.g_pm_spare,"aw",@nobits
+	.align	3
+	.set	.LANCHOR207,. + 0
+	.type	g_pm_spare, %object
+	.size	g_pm_spare, 8
+g_pm_spare:
+	.zero	8
+	.section	.bss.g_retryMode,"aw",@nobits
+	.set	.LANCHOR24,. + 0
+	.type	g_retryMode, %object
+	.size	g_retryMode, 1
+g_retryMode:
+	.zero	1
+	.section	.bss.g_slc_mode_addr2,"aw",@nobits
+	.set	.LANCHOR1,. + 0
+	.type	g_slc_mode_addr2, %object
+	.size	g_slc_mode_addr2, 1
+g_slc_mode_addr2:
+	.zero	1
+	.section	.bss.g_slc_mode_enable,"aw",@nobits
+	.type	g_slc_mode_enable, %object
+	.size	g_slc_mode_enable, 1
+g_slc_mode_enable:
+	.zero	1
+	.section	.bss.g_slc_page_num,"aw",@nobits
+	.align	1
+	.set	.LANCHOR147,. + 0
+	.type	g_slc_page_num, %object
+	.size	g_slc_page_num, 2
+g_slc_page_num:
+	.zero	2
+	.section	.bss.g_totle_phy_block,"aw",@nobits
+	.align	1
+	.set	.LANCHOR149,. + 0
+	.type	g_totle_phy_block, %object
+	.size	g_totle_phy_block, 2
+g_totle_phy_block:
+	.zero	2
+	.section	.bss.gc_des_ppa_tbl,"aw",@nobits
+	.align	3
+	.set	.LANCHOR164,. + 0
+	.type	gc_des_ppa_tbl, %object
+	.size	gc_des_ppa_tbl, 8
+gc_des_ppa_tbl:
+	.zero	8
+	.section	.bss.gc_free_slc_sblk_th,"aw",@nobits
+	.align	1
+	.set	.LANCHOR87,. + 0
+	.type	gc_free_slc_sblk_th, %object
+	.size	gc_free_slc_sblk_th, 2
+gc_free_slc_sblk_th:
+	.zero	2
+	.section	.bss.gc_lpa_tbl,"aw",@nobits
+	.align	3
+	.set	.LANCHOR162,. + 0
+	.type	gc_lpa_tbl, %object
+	.size	gc_lpa_tbl, 8
+gc_lpa_tbl:
+	.zero	8
+	.section	.bss.gc_mode,"aw",@nobits
+	.set	.LANCHOR85,. + 0
+	.type	gc_mode, %object
+	.size	gc_mode, 1
+gc_mode:
+	.zero	1
+	.section	.bss.gc_page_buf_id,"aw",@nobits
+	.align	3
+	.set	.LANCHOR83,. + 0
+	.type	gc_page_buf_id, %object
+	.size	gc_page_buf_id, 8
+gc_page_buf_id:
+	.zero	8
+	.section	.bss.gc_pre_ppa_tbl,"aw",@nobits
+	.align	3
+	.set	.LANCHOR163,. + 0
+	.type	gc_pre_ppa_tbl, %object
+	.size	gc_pre_ppa_tbl, 8
+gc_pre_ppa_tbl:
+	.zero	8
+	.section	.bss.gc_search_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR160,. + 0
+	.type	gc_search_count, %object
+	.size	gc_search_count, 4
+gc_search_count:
+	.zero	4
+	.section	.bss.gc_slc_cache_index,"aw",@nobits
+	.align	1
+	.set	.LANCHOR91,. + 0
+	.type	gc_slc_cache_index, %object
+	.size	gc_slc_cache_index, 2
+gc_slc_cache_index:
+	.zero	2
+	.section	.bss.gc_slc_data_index,"aw",@nobits
+	.align	1
+	.set	.LANCHOR90,. + 0
+	.type	gc_slc_data_index, %object
+	.size	gc_slc_data_index, 2
+gc_slc_data_index:
+	.zero	2
+	.section	.bss.gc_slc_mode_slc_vpn_th,"aw",@nobits
+	.align	1
+	.set	.LANCHOR161,. + 0
+	.type	gc_slc_mode_slc_vpn_th, %object
+	.size	gc_slc_mode_slc_vpn_th, 2
+gc_slc_mode_slc_vpn_th:
+	.zero	2
+	.section	.bss.gc_slc_mode_tlc_vpn_th,"aw",@nobits
+	.align	1
+	.set	.LANCHOR94,. + 0
+	.type	gc_slc_mode_tlc_vpn_th, %object
+	.size	gc_slc_mode_tlc_vpn_th, 2
+gc_slc_mode_tlc_vpn_th:
+	.zero	2
+	.section	.bss.gc_slc_mode_vpn_th,"aw",@nobits
+	.align	1
+	.set	.LANCHOR70,. + 0
+	.type	gc_slc_mode_vpn_th, %object
+	.size	gc_slc_mode_vpn_th, 2
+gc_slc_mode_vpn_th:
+	.zero	2
+	.section	.bss.gc_state,"aw",@nobits
+	.set	.LANCHOR159,. + 0
+	.type	gc_state, %object
+	.size	gc_state, 1
+gc_state:
+	.zero	1
+	.section	.bss.gc_tlc_mode_slc_vpn_th,"aw",@nobits
+	.align	1
+	.set	.LANCHOR102,. + 0
+	.type	gc_tlc_mode_slc_vpn_th, %object
+	.size	gc_tlc_mode_slc_vpn_th, 2
+gc_tlc_mode_slc_vpn_th:
+	.zero	2
+	.section	.bss.gc_tlc_mode_tlc_vpn_th,"aw",@nobits
+	.align	1
+	.set	.LANCHOR100,. + 0
+	.type	gc_tlc_mode_tlc_vpn_th, %object
+	.size	gc_tlc_mode_tlc_vpn_th, 2
+gc_tlc_mode_tlc_vpn_th:
+	.zero	2
+	.section	.bss.gc_valid_page_ppa,"aw",@nobits
+	.align	3
+	.set	.LANCHOR77,. + 0
+	.type	gc_valid_page_ppa, %object
+	.size	gc_valid_page_ppa, 8
+gc_valid_page_ppa:
+	.zero	8
+	.section	.bss.gc_xlc_data_index,"aw",@nobits
+	.align	1
+	.set	.LANCHOR92,. + 0
+	.type	gc_xlc_data_index, %object
+	.size	gc_xlc_data_index, 2
+gc_xlc_data_index:
+	.zero	2
+	.section	.bss.gc_xlc_search_index,"aw",@nobits
+	.align	1
+	.set	.LANCHOR96,. + 0
+	.type	gc_xlc_search_index, %object
+	.size	gc_xlc_search_index, 2
+gc_xlc_search_index:
+	.zero	2
+	.section	.bss.gp_blk_info,"aw",@nobits
+	.align	3
+	.set	.LANCHOR7,. + 0
+	.type	gp_blk_info, %object
+	.size	gp_blk_info, 8
+gp_blk_info:
+	.zero	8
+	.section	.bss.gp_data_slc_cache_head,"aw",@nobits
+	.align	3
+	.set	.LANCHOR89,. + 0
+	.type	gp_data_slc_cache_head, %object
+	.size	gp_data_slc_cache_head, 8
+gp_data_slc_cache_head:
+	.zero	8
+	.section	.bss.gp_data_slc_data_head,"aw",@nobits
+	.align	3
+	.set	.LANCHOR12,. + 0
+	.type	gp_data_slc_data_head, %object
+	.size	gp_data_slc_data_head, 8
+gp_data_slc_data_head:
+	.zero	8
+	.section	.bss.gp_data_xlc_data_head,"aw",@nobits
+	.align	3
+	.set	.LANCHOR88,. + 0
+	.type	gp_data_xlc_data_head, %object
+	.size	gp_data_xlc_data_head, 8
+gp_data_xlc_data_head:
+	.zero	8
+	.section	.bss.gp_flash_check_buf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR144,. + 0
+	.type	gp_flash_check_buf, %object
+	.size	gp_flash_check_buf, 8
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+	.zero	8
+	.section	.bss.gp_flash_info,"aw",@nobits
+	.align	3
+	.set	.LANCHOR27,. + 0
+	.type	gp_flash_info, %object
+	.size	gp_flash_info, 8
+gp_flash_info:
+	.zero	8
+	.section	.bss.gp_free_mix_head,"aw",@nobits
+	.align	3
+	.set	.LANCHOR108,. + 0
+	.type	gp_free_mix_head, %object
+	.size	gp_free_mix_head, 8
+gp_free_mix_head:
+	.zero	8
+	.section	.bss.gp_free_slc_head,"aw",@nobits
+	.align	3
+	.set	.LANCHOR104,. + 0
+	.type	gp_free_slc_head, %object
+	.size	gp_free_slc_head, 8
+gp_free_slc_head:
+	.zero	8
+	.section	.bss.gp_free_xlc_head,"aw",@nobits
+	.align	3
+	.set	.LANCHOR106,. + 0
+	.type	gp_free_xlc_head, %object
+	.size	gp_free_xlc_head, 8
+gp_free_xlc_head:
+	.zero	8
+	.section	.bss.gp_ftl_ext_info,"aw",@nobits
+	.align	3
+	.set	.LANCHOR10,. + 0
+	.type	gp_ftl_ext_info, %object
+	.size	gp_ftl_ext_info, 8
+gp_ftl_ext_info:
+	.zero	8
+	.section	.bss.gp_ftl_info,"aw",@nobits
+	.align	3
+	.set	.LANCHOR110,. + 0
+	.type	gp_ftl_info, %object
+	.size	gp_ftl_info, 8
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+	.zero	8
+	.section	.bss.gp_nand_para_info,"aw",@nobits
+	.align	3
+	.set	.LANCHOR16,. + 0
+	.type	gp_nand_para_info, %object
+	.size	gp_nand_para_info, 8
+gp_nand_para_info:
+	.zero	8
+	.section	.bss.gp_nandc,"aw",@nobits
+	.align	3
+	.set	.LANCHOR13,. + 0
+	.type	gp_nandc, %object
+	.size	gp_nandc, 8
+gp_nandc:
+	.zero	8
+	.section	.bss.gp_sblk_list_tbl,"aw",@nobits
+	.align	3
+	.set	.LANCHOR4,. + 0
+	.type	gp_sblk_list_tbl, %object
+	.size	gp_sblk_list_tbl, 8
+gp_sblk_list_tbl:
+	.zero	8
+	.section	.bss.idb_buf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR141,. + 0
+	.type	idb_buf, %object
+	.size	idb_buf, 8
+idb_buf:
+	.zero	8
+	.section	.bss.idb_last_lba,"aw",@nobits
+	.align	2
+	.set	.LANCHOR177,. + 0
+	.type	idb_last_lba, %object
+	.size	idb_last_lba, 4
+idb_last_lba:
+	.zero	4
+	.section	.bss.idb_need_write_back,"aw",@nobits
+	.align	2
+	.set	.LANCHOR142,. + 0
+	.type	idb_need_write_back, %object
+	.size	idb_need_write_back, 4
+idb_need_write_back:
+	.zero	4
+	.section	.bss.idb_write_enable,"aw",@nobits
+	.set	.LANCHOR143,. + 0
+	.type	idb_write_enable, %object
+	.size	idb_write_enable, 1
+idb_write_enable:
+	.zero	1
+	.section	.bss.lpa_hash,"aw",@nobits
+	.align	3
+	.set	.LANCHOR116,. + 0
+	.type	lpa_hash, %object
+	.size	lpa_hash, 512
+lpa_hash:
+	.zero	512
+	.section	.bss.lpa_hash_index,"aw",@nobits
+	.align	3
+	.set	.LANCHOR118,. + 0
+	.type	lpa_hash_index, %object
+	.size	lpa_hash_index, 8
+lpa_hash_index:
+	.zero	8
+	.section	.bss.nandc_ecc_sts,"aw",@nobits
+	.align	3
+	.type	nandc_ecc_sts, %object
+	.size	nandc_ecc_sts, 16
+nandc_ecc_sts:
+	.zero	16
+	.section	.bss.nandc_hw_seed,"aw",@nobits
+	.set	.LANCHOR51,. + 0
+	.type	nandc_hw_seed, %object
+	.size	nandc_hw_seed, 1
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+	.section	.bss.nandc_randomizer_en,"aw",@nobits
+	.set	.LANCHOR52,. + 0
+	.type	nandc_randomizer_en, %object
+	.size	nandc_randomizer_en, 1
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+	.zero	1
+	.section	.bss.p_free_buf_head,"aw",@nobits
+	.set	.LANCHOR57,. + 0
+	.type	p_free_buf_head, %object
+	.size	p_free_buf_head, 1
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+	.zero	1
+	.section	.bss.p_read_ahead_ext_buf,"aw",@nobits
+	.align	3
+	.type	p_read_ahead_ext_buf, %object
+	.size	p_read_ahead_ext_buf, 8
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+	.zero	8
+	.section	.bss.pm_first_write,"aw",@nobits
+	.set	.LANCHOR208,. + 0
+	.type	pm_first_write, %object
+	.size	pm_first_write, 1
+pm_first_write:
+	.zero	1
+	.section	.bss.pm_force_gc,"aw",@nobits
+	.align	2
+	.set	.LANCHOR151,. + 0
+	.type	pm_force_gc, %object
+	.size	pm_force_gc, 4
+pm_force_gc:
+	.zero	4
+	.section	.bss.pm_gc_enable,"aw",@nobits
+	.align	2
+	.set	.LANCHOR136,. + 0
+	.type	pm_gc_enable, %object
+	.size	pm_gc_enable, 4
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+	.zero	4
+	.section	.bss.pm_last_load_ram_id,"aw",@nobits
+	.set	.LANCHOR223,. + 0
+	.type	pm_last_load_ram_id, %object
+	.size	pm_last_load_ram_id, 1
+pm_last_load_ram_id:
+	.zero	1
+	.section	.bss.pm_last_update_ram_id,"aw",@nobits
+	.set	.LANCHOR139,. + 0
+	.type	pm_last_update_ram_id, %object
+	.size	pm_last_update_ram_id, 1
+pm_last_update_ram_id:
+	.zero	1
+	.section	.bss.pm_ram_info,"aw",@nobits
+	.align	3
+	.set	.LANCHOR138,. + 0
+	.type	pm_ram_info, %object
+	.size	pm_ram_info, 128
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+	.zero	128
+	.section	.bss.read_ahead_lpa,"aw",@nobits
+	.align	2
+	.set	.LANCHOR238,. + 0
+	.type	read_ahead_lpa, %object
+	.size	read_ahead_lpa, 4
+read_ahead_lpa:
+	.zero	4
+	.section	.bss.read_buf_count,"aw",@nobits
+	.set	.LANCHOR134,. + 0
+	.type	read_buf_count, %object
+	.size	read_buf_count, 1
+read_buf_count:
+	.zero	1
+	.section	.bss.read_buf_head,"aw",@nobits
+	.set	.LANCHOR133,. + 0
+	.type	read_buf_head, %object
+	.size	read_buf_head, 1
+read_buf_head:
+	.zero	1
+	.section	.bss.sblk_gc_write_completed_queue_head,"aw",@nobits
+	.set	.LANCHOR64,. + 0
+	.type	sblk_gc_write_completed_queue_head, %object
+	.size	sblk_gc_write_completed_queue_head, 1
+sblk_gc_write_completed_queue_head:
+	.zero	1
+	.section	.bss.sblk_queue_head,"aw",@nobits
+	.set	.LANCHOR60,. + 0
+	.type	sblk_queue_head, %object
+	.size	sblk_queue_head, 1
+sblk_queue_head:
+	.zero	1
+	.section	.bss.sblk_read_completed_queue_head,"aw",@nobits
+	.set	.LANCHOR63,. + 0
+	.type	sblk_read_completed_queue_head, %object
+	.size	sblk_read_completed_queue_head, 1
+sblk_read_completed_queue_head:
+	.zero	1
+	.section	.bss.sblk_write_completed_queue_head,"aw",@nobits
+	.set	.LANCHOR65,. + 0
+	.type	sblk_write_completed_queue_head, %object
+	.size	sblk_write_completed_queue_head, 1
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+	.zero	1
+	.section	.bss.slc_cache_sblk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR99,. + 0
+	.type	slc_cache_sblk, %object
+	.size	slc_cache_sblk, 2
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+	.section	.bss.slc_data_sblk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR97,. + 0
+	.type	slc_data_sblk, %object
+	.size	slc_data_sblk, 2
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+	.section	.bss.write_buf_count,"aw",@nobits
+	.set	.LANCHOR67,. + 0
+	.type	write_buf_count, %object
+	.size	write_buf_count, 1
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+	.set	.LANCHOR66,. + 0
+	.type	write_buf_head, %object
+	.size	write_buf_head, 1
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+	.section	.bss.write_commit_count,"aw",@nobits
+	.set	.LANCHOR129,. + 0
+	.type	write_commit_count, %object
+	.size	write_commit_count, 1
+write_commit_count:
+	.zero	1
+	.section	.bss.write_commit_head,"aw",@nobits
+	.set	.LANCHOR185,. + 0
+	.type	write_commit_head, %object
+	.size	write_commit_head, 1
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+	.zero	1
+	.section	.bss.xlc_data_sblk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR93,. + 0
+	.type	xlc_data_sblk, %object
+	.size	xlc_data_sblk, 2
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+	.section	.bss.zftl_print_list_count,"aw",@nobits
+	.align	1
+	.set	.LANCHOR109,. + 0
+	.type	zftl_print_list_count, %object
+	.size	zftl_print_list_count, 2
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+	.zero	2
+	.section	.data.g_nand_para_info,"aw",@progbits
+	.align	3
+	.set	.LANCHOR33,. + 0
+	.type	g_nand_para_info, %object
+	.size	g_nand_para_info, 32
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+	.section	.rodata.__func__.7104,"a",@progbits
+	.align	3
+	.set	.LANCHOR173,. + 0
+	.type	__func__.7104, %object
+	.size	__func__.7104, 19
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+	.string	"flash_read_page_en"
+	.section	.rodata.__func__.7165,"a",@progbits
+	.align	3
+	.set	.LANCHOR189,. + 0
+	.type	__func__.7165, %object
+	.size	__func__.7165, 19
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+	.string	"flash_prog_page_en"
+	.section	.rodata.__func__.7181,"a",@progbits
+	.align	3
+	.set	.LANCHOR44,. + 0
+	.type	__func__.7181, %object
+	.size	__func__.7181, 26
+__func__.7181:
+	.string	"flash_erase_duplane_block"
+	.section	.rodata.__func__.7192,"a",@progbits
+	.align	3
+	.set	.LANCHOR46,. + 0
+	.type	__func__.7192, %object
+	.size	__func__.7192, 21
+__func__.7192:
+	.string	"flash_erase_block_en"
+	.section	.rodata.__func__.7206,"a",@progbits
+	.align	3
+	.set	.LANCHOR29,. + 0
+	.type	__func__.7206, %object
+	.size	__func__.7206, 28
+__func__.7206:
+	.string	"flash_wait_device_ready_raw"
+	.section	.rodata.__func__.7230,"a",@progbits
+	.align	3
+	.set	.LANCHOR178,. + 0
+	.type	__func__.7230, %object
+	.size	__func__.7230, 26
+__func__.7230:
+	.string	"flash_start_tlc_page_prog"
+	.section	.rodata.__func__.7241,"a",@progbits
+	.align	3
+	.set	.LANCHOR179,. + 0
+	.type	__func__.7241, %object
+	.size	__func__.7241, 29
+__func__.7241:
+	.string	"flash_start_3d_mlc_page_prog"
+	.section	.rodata.__func__.7259,"a",@progbits
+	.align	3
+	.set	.LANCHOR180,. + 0
+	.type	__func__.7259, %object
+	.size	__func__.7259, 22
+__func__.7259:
+	.string	"flash_start_page_prog"
+	.section	.rodata.__func__.7270,"a",@progbits
+	.align	3
+	.set	.LANCHOR35,. + 0
+	.type	__func__.7270, %object
+	.size	__func__.7270, 22
+__func__.7270:
+	.string	"flash_start_page_read"
+	.section	.rodata.__func__.7283,"a",@progbits
+	.align	3
+	.set	.LANCHOR181,. + 0
+	.type	__func__.7283, %object
+	.size	__func__.7283, 31
+__func__.7283:
+	.string	"flash_complete_plane_page_read"
+	.section	.rodata.__func__.7295,"a",@progbits
+	.align	3
+	.set	.LANCHOR47,. + 0
+	.type	__func__.7295, %object
+	.size	__func__.7295, 23
+__func__.7295:
+	.string	"flash_start_plane_read"
+	.section	.rodata.__func__.7308,"a",@progbits
+	.align	3
+	.set	.LANCHOR182,. + 0
+	.type	__func__.7308, %object
+	.size	__func__.7308, 25
+__func__.7308:
+	.string	"flash_complete_page_read"
+	.section	.rodata.__func__.7723,"a",@progbits
+	.align	3
+	.set	.LANCHOR146,. + 0
+	.type	__func__.7723, %object
+	.size	__func__.7723, 20
+__func__.7723:
+	.string	"flash_die_info_init"
+	.section	.rodata.__func__.7733,"a",@progbits
+	.align	3
+	.set	.LANCHOR15,. + 0
+	.type	__func__.7733, %object
+	.size	__func__.7733, 22
+__func__.7733:
+	.string	"nand_flash_print_info"
+	.section	.rodata.__func__.7778,"a",@progbits
+	.align	3
+	.set	.LANCHOR213,. + 0
+	.type	__func__.7778, %object
+	.size	__func__.7778, 16
+__func__.7778:
+	.string	"nand_flash_init"
+	.section	.rodata.__func__.7801,"a",@progbits
+	.align	3
+	.set	.LANCHOR158,. + 0
+	.type	__func__.7801, %object
+	.size	__func__.7801, 11
+__func__.7801:
+	.string	"nandc_init"
+	.section	.rodata.__func__.7970,"a",@progbits
+	.align	3
+	.set	.LANCHOR59,. + 0
+	.type	__func__.7970, %object
+	.size	__func__.7970, 13
+__func__.7970:
+	.string	"buf_add_tail"
+	.section	.rodata.__func__.7983,"a",@progbits
+	.align	3
+	.set	.LANCHOR61,. + 0
+	.type	__func__.7983, %object
+	.size	__func__.7983, 10
+__func__.7983:
+	.string	"buf_alloc"
+	.section	.rodata.__func__.7997,"a",@progbits
+	.align	3
+	.set	.LANCHOR62,. + 0
+	.type	__func__.7997, %object
+	.size	__func__.7997, 16
+__func__.7997:
+	.string	"buf_remove_free"
+	.section	.rodata.__func__.8018,"a",@progbits
+	.align	3
+	.set	.LANCHOR212,. + 0
+	.type	__func__.8018, %object
+	.size	__func__.8018, 20
+__func__.8018:
+	.string	"flash_info_blk_init"
+	.section	.rodata.__func__.8033,"a",@progbits
+	.align	3
+	.set	.LANCHOR157,. + 0
+	.type	__func__.8033, %object
+	.size	__func__.8033, 21
+__func__.8033:
+	.string	"flash_info_data_init"
+	.section	.rodata.__func__.8055,"a",@progbits
+	.align	3
+	.set	.LANCHOR209,. + 0
+	.type	__func__.8055, %object
+	.size	__func__.8055, 17
+__func__.8055:
+	.string	"flash_info_flush"
+	.section	.rodata.__func__.8131,"a",@progbits
+	.align	3
+	.set	.LANCHOR150,. + 0
+	.type	__func__.8131, %object
+	.size	__func__.8131, 17
+__func__.8131:
+	.string	"lpa_rebuild_hash"
+	.section	.rodata.__func__.8181,"a",@progbits
+	.align	3
+	.set	.LANCHOR232,. + 0
+	.type	__func__.8181, %object
+	.size	__func__.8181, 17
+__func__.8181:
+	.string	"ftl_write_commit"
+	.section	.rodata.__func__.8199,"a",@progbits
+	.align	3
+	.set	.LANCHOR130,. + 0
+	.type	__func__.8199, %object
+	.size	__func__.8199, 14
+__func__.8199:
+	.string	"ftl_write_buf"
+	.section	.rodata.__func__.8244,"a",@progbits
+	.align	3
+	.set	.LANCHOR132,. + 0
+	.type	__func__.8244, %object
+	.size	__func__.8244, 18
+__func__.8244:
+	.string	"zftl_add_read_buf"
+	.section	.rodata.__func__.8277,"a",@progbits
+	.align	3
+	.set	.LANCHOR230,. + 0
+	.type	__func__.8277, %object
+	.size	__func__.8277, 10
+__func__.8277:
+	.string	"zftl_read"
+	.section	.rodata.__func__.8308,"a",@progbits
+	.align	3
+	.set	.LANCHOR242,. + 0
+	.type	__func__.8308, %object
+	.size	__func__.8308, 13
+__func__.8308:
+	.string	"_ftl_discard"
+	.section	.rodata.__func__.8454,"a",@progbits
+	.align	3
+	.set	.LANCHOR225,. + 0
+	.type	__func__.8454, %object
+	.size	__func__.8454, 12
+__func__.8454:
+	.string	"gc_recovery"
+	.section	.rodata.__func__.8464,"a",@progbits
+	.align	3
+	.set	.LANCHOR72,. + 0
+	.type	__func__.8464, %object
+	.size	__func__.8464, 12
+__func__.8464:
+	.string	"gc_add_sblk"
+	.section	.rodata.__func__.8511,"a",@progbits
+	.align	3
+	.set	.LANCHOR188,. + 0
+	.type	__func__.8511, %object
+	.size	__func__.8511, 21
+__func__.8511:
+	.string	"gc_check_data_one_wl"
+	.section	.rodata.__func__.8543,"a",@progbits
+	.align	3
+	.set	.LANCHOR226,. + 0
+	.type	__func__.8543, %object
+	.size	__func__.8543, 22
+__func__.8543:
+	.string	"gc_update_l2p_map_new"
+	.section	.rodata.__func__.8556,"a",@progbits
+	.align	3
+	.set	.LANCHOR78,. + 0
+	.type	__func__.8556, %object
+	.size	__func__.8556, 19
+__func__.8556:
+	.string	"gc_write_completed"
+	.section	.rodata.__func__.8586,"a",@progbits
+	.align	3
+	.set	.LANCHOR234,. + 0
+	.type	__func__.8586, %object
+	.size	__func__.8586, 16
+__func__.8586:
+	.string	"gc_do_copy_back"
+	.section	.rodata.__func__.8613,"a",@progbits
+	.align	3
+	.set	.LANCHOR127,. + 0
+	.type	__func__.8613, %object
+	.size	__func__.8613, 16
+__func__.8613:
+	.string	"gc_free_src_blk"
+	.section	.rodata.__func__.8657,"a",@progbits
+	.align	3
+	.set	.LANCHOR227,. + 0
+	.type	__func__.8657, %object
+	.size	__func__.8657, 16
+__func__.8657:
+	.string	"gc_scan_src_blk"
+	.section	.rodata.__func__.8718,"a",@progbits
+	.align	3
+	.set	.LANCHOR228,. + 0
+	.type	__func__.8718, %object
+	.size	__func__.8718, 20
+__func__.8718:
+	.string	"gc_scan_static_data"
+	.section	.rodata.__func__.8785,"a",@progbits
+	.align	3
+	.set	.LANCHOR237,. + 0
+	.type	__func__.8785, %object
+	.size	__func__.8785, 11
+__func__.8785:
+	.string	"zftl_do_gc"
+	.section	.rodata.__func__.8880,"a",@progbits
+	.align	3
+	.set	.LANCHOR5,. + 0
+	.type	__func__.8880, %object
+	.size	__func__.8880, 18
+__func__.8880:
+	.string	"_list_remove_node"
+	.section	.rodata.__func__.8905,"a",@progbits
+	.align	3
+	.set	.LANCHOR11,. + 0
+	.type	__func__.8905, %object
+	.size	__func__.8905, 23
+__func__.8905:
+	.string	"_list_update_data_list"
+	.section	.rodata.__func__.8980,"a",@progbits
+	.align	3
+	.set	.LANCHOR154,. + 0
+	.type	__func__.8980, %object
+	.size	__func__.8980, 20
+__func__.8980:
+	.string	"zftl_sblk_list_init"
+	.section	.rodata.__func__.9014,"a",@progbits
+	.align	3
+	.set	.LANCHOR196,. + 0
+	.type	__func__.9014, %object
+	.size	__func__.9014, 15
+__func__.9014:
+	.string	"ftl_info_flush"
+	.section	.rodata.__func__.9046,"a",@progbits
+	.align	3
+	.set	.LANCHOR135,. + 0
+	.type	__func__.9046, %object
+	.size	__func__.9046, 15
+__func__.9046:
+	.string	"ftl_alloc_sblk"
+	.section	.rodata.__func__.9088,"a",@progbits
+	.align	3
+	.set	.LANCHOR113,. + 0
+	.type	__func__.9088, %object
+	.size	__func__.9088, 18
+__func__.9088:
+	.string	"ftl_alloc_sys_blk"
+	.section	.rodata.__func__.9098,"a",@progbits
+	.align	3
+	.set	.LANCHOR114,. + 0
+	.type	__func__.9098, %object
+	.size	__func__.9098, 17
+__func__.9098:
+	.string	"ftl_free_sys_blk"
+	.section	.rodata.__func__.9133,"a",@progbits
+	.align	3
+	.set	.LANCHOR229,. + 0
+	.type	__func__.9133, %object
+	.size	__func__.9133, 14
+__func__.9133:
+	.string	"ftl_sblk_dump"
+	.section	.rodata.__func__.9157,"a",@progbits
+	.align	3
+	.set	.LANCHOR218,. + 0
+	.type	__func__.9157, %object
+	.size	__func__.9157, 16
+__func__.9157:
+	.string	"ftl_sysblk_dump"
+	.section	.rodata.__func__.9182,"a",@progbits
+	.align	3
+	.set	.LANCHOR219,. + 0
+	.type	__func__.9182, %object
+	.size	__func__.9182, 23
+__func__.9182:
+	.string	"ftl_open_sblk_recovery"
+	.section	.rodata.__func__.9215,"a",@progbits
+	.align	3
+	.set	.LANCHOR115,. + 0
+	.type	__func__.9215, %object
+	.size	__func__.9215, 23
+__func__.9215:
+	.string	"ftl_get_ppa_from_index"
+	.section	.rodata.__func__.9236,"a",@progbits
+	.align	3
+	.set	.LANCHOR231,. + 0
+	.type	__func__.9236, %object
+	.size	__func__.9236, 19
+__func__.9236:
+	.string	"ftl_update_l2p_map"
+	.section	.rodata.__func__.9255,"a",@progbits
+	.align	3
+	.set	.LANCHOR119,. + 0
+	.type	__func__.9255, %object
+	.size	__func__.9255, 22
+__func__.9255:
+	.string	"ftl_get_new_free_page"
+	.section	.rodata.__func__.9266,"a",@progbits
+	.align	3
+	.set	.LANCHOR120,. + 0
+	.type	__func__.9266, %object
+	.size	__func__.9266, 22
+__func__.9266:
+	.string	"ftl_ext_alloc_new_blk"
+	.section	.rodata.__func__.9292,"a",@progbits
+	.align	3
+	.set	.LANCHOR201,. + 0
+	.type	__func__.9292, %object
+	.size	__func__.9292, 19
+__func__.9292:
+	.string	"ftl_ext_info_flush"
+	.section	.rodata.__func__.9304,"a",@progbits
+	.align	3
+	.set	.LANCHOR202,. + 0
+	.type	__func__.9304, %object
+	.size	__func__.9304, 18
+__func__.9304:
+	.string	"ftl_ext_info_init"
+	.section	.rodata.__func__.9343,"a",@progbits
+	.align	3
+	.set	.LANCHOR203,. + 0
+	.type	__func__.9343, %object
+	.size	__func__.9343, 25
+__func__.9343:
+	.string	"ftl_low_format_data_init"
+	.section	.rodata.__func__.9358,"a",@progbits
+	.align	3
+	.set	.LANCHOR205,. + 0
+	.type	__func__.9358, %object
+	.size	__func__.9358, 15
+__func__.9358:
+	.string	"ftl_low_format"
+	.section	.rodata.__func__.9406,"a",@progbits
+	.align	3
+	.set	.LANCHOR192,. + 0
+	.type	__func__.9406, %object
+	.size	__func__.9406, 14
+__func__.9406:
+	.string	"ftl_prog_page"
+	.section	.rodata.__func__.9529,"a",@progbits
+	.align	3
+	.set	.LANCHOR183,. + 0
+	.type	__func__.9529, %object
+	.size	__func__.9529, 31
+__func__.9529:
+	.string	"queue_wait_first_req_completed"
+	.section	.rodata.__func__.9583,"a",@progbits
+	.align	3
+	.set	.LANCHOR184,. + 0
+	.type	__func__.9583, %object
+	.size	__func__.9583, 15
+__func__.9583:
+	.string	"sblk_prog_page"
+	.section	.rodata.__func__.9610,"a",@progbits
+	.align	3
+	.set	.LANCHOR187,. + 0
+	.type	__func__.9610, %object
+	.size	__func__.9610, 15
+__func__.9610:
+	.string	"sblk_read_page"
+	.section	.rodata.__func__.9680,"a",@progbits
+	.align	3
+	.set	.LANCHOR220,. + 0
+	.type	__func__.9680, %object
+	.size	__func__.9680, 16
+__func__.9680:
+	.string	"load_l2p_region"
+	.section	.rodata.__func__.9696,"a",@progbits
+	.align	3
+	.set	.LANCHOR156,. + 0
+	.type	__func__.9696, %object
+	.size	__func__.9696, 13
+__func__.9696:
+	.string	"pm_free_sblk"
+	.section	.rodata.__func__.9720,"a",@progbits
+	.align	3
+	.set	.LANCHOR222,. + 0
+	.type	__func__.9720, %object
+	.size	__func__.9720, 6
+__func__.9720:
+	.string	"pm_gc"
+	.section	.rodata.__func__.9736,"a",@progbits
+	.align	3
+	.set	.LANCHOR137,. + 0
+	.type	__func__.9736, %object
+	.size	__func__.9736, 17
+__func__.9736:
+	.string	"pm_alloc_new_blk"
+	.section	.rodata.__func__.9746,"a",@progbits
+	.align	3
+	.set	.LANCHOR206,. + 0
+	.type	__func__.9746, %object
+	.size	__func__.9746, 14
+__func__.9746:
+	.string	"pm_write_page"
+	.section	.rodata.__func__.9764,"a",@progbits
+	.align	3
+	.set	.LANCHOR140,. + 0
+	.type	__func__.9764, %object
+	.size	__func__.9764, 21
+__func__.9764:
+	.string	"pm_select_ram_region"
+	.section	.rodata._list_remove_node.str1.1,"aMS",@progbits,1
+.LC0:
+	.string	"\n!!!!! error @ func:%s - line:%d\n"
+	.section	.rodata.dump_buf_info.str1.1,"aMS",@progbits,1
+.LC41:
+	.string	"sblk_queue_head = %d\n"
+.LC42:
+	.string	"sblk_read_completed_queue_head = %d\n"
+.LC43:
+	.string	"sblk_gc_write_completed_queue_head = %d\n"
+.LC44:
+	.string	"sblk_write_completed_queue_head = %d\n"
+.LC45:
+	.string	"p_free_buf_head = %d\n"
+.LC46:
+	.string	"free_buf_count = %d\n"
+.LC47:
+	.string	"buf = %d, next=%d, flag=%d gc_write_flag=%d, lun_state=%d, op_status = %d lpa=%x, ppa=%x\n"
+	.section	.rodata.dump_ftl_info.str1.1,"aMS",@progbits,1
+.LC189:
+	.string	"free_buf_count: %d\n"
+.LC190:
+	.string	"g_ftl_info_blk blk:0x%x, index:0x%x, page:0x%x\n"
+.LC191:
+	.string	"ftl_ext_info_blk blk:0x%x, page:0x%x\n"
+.LC192:
+	.string	"ac_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
+.LC193:
+	.string	"tmp_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
+.LC194:
+	.string	"gc_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
+.LC195:
+	.string	"lpa:"
+.LC196:
+	.string	"vpn:"
+.LC197:
+	.string	"sblk:"
+.LC198:
+	.string	"lpa_hash:"
+.LC199:
+	.string	"lpa_hash_index:"
+	.section	.rodata.dump_pm_blk.str1.1,"aMS",@progbits,1
+.LC254:
+	.string	"pm l2p:"
+.LC255:
+	.string	"pm blk:"
+	.section	.rodata.dump_sblk_queue.str1.1,"aMS",@progbits,1
+.LC80:
+	.string	"dump_sblk_queue: %d\n"
+.LC81:
+	.string	"buf id= %d state = %d ppa = %x\n"
+	.section	.rodata.flash_complete_page_read.str1.1,"aMS",@progbits,1
+.LC139:
+	.string	"flash_complete_page_read %x %x error_ecc %d %d\n"
+	.section	.rodata.flash_ddr_tuning_read.str1.1,"aMS",@progbits,1
+.LC125:
+	.string	"%d flash_ddr_tuning_read %x ecc=%d\n"
+.LC126:
+	.string	"sync para %d\n"
+.LC127:
+	.string	"DDR mode Read error %x %x\n"
+.LC128:
+	.string	"SDR mode Read %x %x ecc:%x\n"
+	.section	.rodata.flash_erase_all.str1.1,"aMS",@progbits,1
+.LC35:
+	.string	"erase done: %x\n"
+	.section	.rodata.flash_erase_block_en.str1.1,"aMS",@progbits,1
+.LC33:
+	.string	"flash_erase_block %x %x %x\n"
+.LC34:
+	.string	"flash_erase_block %d block = %x status = %x\n"
+	.section	.rodata.flash_erase_duplane_block.str1.1,"aMS",@progbits,1
+.LC31:
+	.string	"flash_erase_duplane_block %x %x %x\n"
+.LC32:
+	.string	"flash_erase_duplane_block pageadd = %x status = %x\n"
+	.section	.rodata.flash_get_last_written_page.str1.1,"aMS",@progbits,1
+.LC131:
+	.string	"flash_get_last_written_page: %x %x %x\n"
+	.section	.rodata.flash_info_blk_init.str1.1,"aMS",@progbits,1
+.LC174:
+	.string	"...%d @ %s %d %p\n"
+.LC175:
+	.string	"no sys info %x\n"
+	.section	.rodata.flash_info_data_init.str1.1,"aMS",@progbits,1
+.LC97:
+	.string	"...%d @ %s\n"
+	.section	.rodata.flash_info_flush.str1.1,"aMS",@progbits,1
+.LC171:
+	.string	"finfo:"
+.LC172:
+	.string	"flash_info_flush id = %x, page = %x\n"
+.LC173:
+	.string	"sys_info_flush error:%x\n"
+	.section	.rodata.flash_mask_bad_block.str1.1,"aMS",@progbits,1
+.LC48:
+	.string	"flash_mask_bad_block %d %d\n"
+	.section	.rodata.flash_prog_page.str1.1,"aMS",@progbits,1
+.LC132:
+	.string	"flash_prog_page %x %x %x\n"
+.LC133:
+	.string	"flash_prog_page page_addr = %x status = %x\n"
+	.section	.rodata.flash_prog_page_en.str1.1,"aMS",@progbits,1
+.LC147:
+	.string	"flash_prog_page_en:%x %x %x\n"
+.LC148:
+	.string	"w d:"
+.LC149:
+	.string	"w s:"
+.LC150:
+	.string	"spare"
+.LC151:
+	.string	"data"
+.LC152:
+	.string	"write error: %x\n"
+	.section	.rodata.flash_read_id.str1.1,"aMS",@progbits,1
+.LC38:
+	.string	"No.%d FLASH ID:%x %x %x %x %x %x\n"
+	.section	.rodata.flash_read_otp_data.str1.1,"aMS",@progbits,1
+.LC39:
+	.string	"otp:%x %x %x %x\n"
+	.section	.rodata.flash_read_page_en.str1.1,"aMS",@progbits,1
+.LC129:
+	.string	"flash_read_page_en %x %x %x %x\n"
+.LC130:
+	.string	"flash_read_page_en %x %x error_ecc %d %d\n"
+	.section	.rodata.flash_set_interface_mode.str1.1,"aMS",@progbits,1
+.LC36:
+	.string	"nand sdr mode %x\n"
+.LC37:
+	.string	"nand ddr mode %x\n"
+	.section	.rodata.ftl_alloc_new_data_sblk.str1.1,"aMS",@progbits,1
+.LC232:
+	.string	"error gc_add_sblk: %x\n"
+	.section	.rodata.ftl_alloc_sblk.str1.1,"aMS",@progbits,1
+.LC79:
+	.string	"alloc sblk %x %d\n"
+	.section	.rodata.ftl_dump_write_open_sblk.str1.1,"aMS",@progbits,1
+.LC166:
+	.string	"ftl_sblk_dump_write = %x %d %d %d %d\n"
+.LC167:
+	.string	"blk= %x, page=%x, ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
+.LC168:
+	.string	"ftl_sblk_dump_write2 = %x %d %d %d\n"
+.LC169:
+	.string	"ftl_sblk_dump_write = %x %x\n"
+.LC170:
+	.string	"ftl_sblk_dump_write done = %x\n"
+	.section	.rodata.ftl_ext_info_init.str1.1,"aMS",@progbits,1
+.LC159:
+	.string	"%s %d %d %x %x\n"
+.LC160:
+	.string	"ext info hash %x error\n"
+.LC161:
+	.string	"%s %x %x %x\n"
+	.section	.rodata.ftl_free_sblk.str1.1,"aMS",@progbits,1
+.LC68:
+	.string	"swl_slc_free_mini_ec_blk sblk %x\n"
+	.section	.rodata.ftl_info_blk_init.str1.1,"aMS",@progbits,1
+.LC155:
+	.string	"%d %x @%d %x\n"
+.LC156:
+	.string	"ftl_info_blk_init %d %d %x\n"
+.LC157:
+	.string	"ftl info hash %x error\n"
+.LC158:
+	.string	"ink flag: %x\n"
+	.section	.rodata.ftl_info_flush.str1.1,"aMS",@progbits,1
+.LC154:
+	.string	"g_ftl_info_blk blk = %x, page = %x version = %d\n"
+	.section	.rodata.ftl_low_format.str1.1,"aMS",@progbits,1
+.LC162:
+	.string	"ftl_low_format %d\n"
+.LC163:
+	.string	"low format %d %d %d %d\n"
+	.section	.rodata.ftl_mask_bad_block.str1.1,"aMS",@progbits,1
+.LC66:
+	.string	"mask bad block:cs %x %x block: %x %x\n"
+	.section	.rodata.ftl_open_sblk_recovery.str1.1,"aMS",@progbits,1
+.LC177:
+	.string	"saved_active_page  = %x\n"
+.LC178:
+	.string	"saved_active_plane = %x\n"
+.LC179:
+	.string	"sblk = %x\n"
+.LC180:
+	.string	"phy_blk = %x %x\n"
+.LC181:
+	.string	"num_planes = %x\n"
+.LC182:
+	.string	"recovery blk=%x, page=%x, ppa = %x, status = %x, hash:%x\n"
+.LC183:
+	.string	"data:"
+.LC184:
+	.string	"sblk = %x, vpn0 = %d, vpn1 = %d\n"
+.LC185:
+	.string	"dump_write_lpa = %x %x %x %x\n"
+.LC186:
+	.string	"dump write new ppa = %x, last ppa = %x lpa = %x\n"
+.LC187:
+	.string	"dump write = %x %x %x\n"
+.LC188:
+	.string	"dump write hash update = %x %x %x\n"
+	.section	.rodata.ftl_re_low_format.str1.1,"aMS",@progbits,1
+.LC164:
+	.string	"re low format %d\n"
+	.section	.rodata.ftl_sblk_dump.str1.1,"aMS",@progbits,1
+.LC220:
+	.string	"ftl_sblk_dump = %x %d %d %d %d\n"
+.LC221:
+	.string	"ftl_sblk_dump = %x %x %x %x\n"
+.LC222:
+	.string	"page_addr = %x, lpa=%x vpn = %d\n"
+.LC223:
+	.string	"index= %x, lpa=%x\n"
+.LC224:
+	.string	"block = %x, vpn=%x check vpn = %x\n"
+	.section	.rodata.ftl_sysblk_dump.str1.1,"aMS",@progbits,1
+.LC176:
+	.string	"l2p:"
+	.section	.rodata.ftl_test_block.str1.1,"aMS",@progbits,1
+.LC153:
+	.string	"low format %d\n"
+	.section	.rodata.ftl_update_l2p_map.str1.1,"aMS",@progbits,1
+.LC228:
+	.string	"ftl_update_l2p_map: %x %x %x\n"
+.LC229:
+	.string	"ftl_update_l2p_map"
+.LC230:
+	.string	"lpa_tbl:"
+.LC231:
+	.string	"sblk %x vpn: %d %d\n"
+	.section	.rodata.ftl_vpn_decrement.str1.1,"aMS",@progbits,1
+.LC65:
+	.string	"ftl_vpn_decrement %x = %d, %d\n"
+	.section	.rodata.ftl_write_commit.str1.1,"aMS",@progbits,1
+.LC233:
+	.string	"%d read error: ppa:%x, lpa:%x, status:%x\n"
+	.section	.rodata.ftl_write_completed.str1.1,"aMS",@progbits,1
+.LC77:
+	.string	"ftl prog error =%x, lpa = %x, ppa= %x\n"
+.LC78:
+	.string	"ftl re prog: lpa = %x, ppa= %x\n"
+	.section	.rodata.gc_add_sblk.str1.1,"aMS",@progbits,1
+.LC49:
+	.string	"gc_add_sblk = %d, %d, %d, %d, %d, %d, %d\n"
+.LC50:
+	.string	"gc_add_sblk = %d, %d, %d\n"
+.LC51:
+	.string	"gc_add_sblk = %d, %d, %d,last update:%d, %d\n"
+.LC52:
+	.string	"gc_add_sblk = %d, %d, %d, %d, %d, %d\n"
+	.section	.rodata.gc_check_data_one_wl.str1.1,"aMS",@progbits,1
+.LC146:
+	.string	"err: ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
+	.section	.rodata.gc_do_copy_back.str1.1,"aMS",@progbits,1
+.LC234:
+	.string	"gc page in buf: lpa %x ppa = %x pageindex= %x\n"
+.LC235:
+	.string	"gc_do_copy_back: lpa %x des_ppa = %x %x gc_ppa= %x page_index= %d\n"
+	.section	.rodata.gc_free_bad_sblk.str1.1,"aMS",@progbits,1
+.LC67:
+	.string	"gc_free_bad_sblk 0x%x\n"
+	.section	.rodata.gc_free_src_blk.str1.1,"aMS",@progbits,1
+.LC69:
+	.string	"gc_free_src_blk = %x, vpn = %d\n"
+.LC70:
+	.string	"gc_free_src_blk %x, %d\n"
+	.section	.rodata.gc_free_temp_buf.str1.1,"aMS",@progbits,1
+.LC55:
+	.string	"%d gc_free_temp_buf buf id= %x\n"
+	.section	.rodata.gc_mark_bad_ppa.str1.1,"aMS",@progbits,1
+.LC53:
+	.string	"gc_mark_bad_ppa %d %x %x\n"
+	.section	.rodata.gc_recovery.str1.1,"aMS",@progbits,1
+.LC210:
+	.string	"ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
+.LC211:
+	.string	"ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
+.LC212:
+	.string	"gc_recovery: %x vpn = %x\n"
+	.section	.rodata.gc_scan_src_blk.str1.1,"aMS",@progbits,1
+.LC217:
+	.string	"gc_scan_src_blk = %x, vpn = %d\n"
+.LC218:
+	.string	"js hash error:%x %x %x\n"
+.LC219:
+	.string	"gc_scan_src_blk = %x, s vpn0 = %d, c vpn1 = %d\n"
+	.section	.rodata.gc_search_src_blk.str1.1,"aMS",@progbits,1
+.LC57:
+	.string	"zftl_get_gc_node cache = %x index = %d vpn = %x\n"
+.LC58:
+	.string	"gc_search_src_blk mode = %x, src mode = %x, count= %d %d\n"
+	.section	.rodata.gc_static_wearleveling.str1.1,"aMS",@progbits,1
+.LC85:
+	.string	"gc_static_wearleveling: min blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
+.LC86:
+	.string	"gc_static_wearleveling: min slc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
+.LC87:
+	.string	"gc_static_wearleveling: min tlc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
+.LC88:
+	.string	"gc_static_wearleveling: max slc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
+.LC89:
+	.string	"gc_static_wearleveling: max xlc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
+.LC90:
+	.string	"gc_static_wearleveling: slc blk: %x, tlc blk: %d avg slc ec: %d, avg tlc ec: %d \n"
+.LC91:
+	.string	"gc_static_wearleveling: min slc ec: %x, min tlc ec: %d max slc ec: %d, max tlc ec: %d; %d %d\n"
+.LC92:
+	.string	"swl add tlc gc = %x, %d, %d, %d, %d, %d\n"
+.LC93:
+	.string	"swl add slc gc  = %x, %d, %d, %d, %d, %d\n"
+	.section	.rodata.gc_update_l2p_map_new.str1.1,"aMS",@progbits,1
+.LC213:
+	.string	"gc_update_l2p_map_new sblk %x\n"
+.LC214:
+	.string	"gc_update_l2p_map_new: %x %x %x\n"
+.LC215:
+	.string	"lpa: %x %x %x\n"
+.LC216:
+	.string	"gc_update_l2p_map_new: %x vpn = %x vpn1 = %x done\n"
+	.section	.rodata.gc_write_completed.str1.1,"aMS",@progbits,1
+.LC54:
+	.string	"status: %x, ppa: %x\n"
+	.section	.rodata.hynix_get_read_retry_default.str1.1,"aMS",@progbits,1
+.LC105:
+	.string	"otp error! %d"
+.LC106:
+	.string	"rr"
+	.section	.rodata.hynix_read_retrial.str1.1,"aMS",@progbits,1
+.LC124:
+	.string	"hynix RR %d row=%x, count %d, status=%d\n"
+	.section	.rodata.idb_write_data.str1.1,"aMS",@progbits,1
+.LC135:
+	.string	"1 write_idblock fix data %x %x %x\n"
+.LC136:
+	.string	"write_idblock check fail! %x\n"
+.LC137:
+	.string	"write_idblock fail! %x\n"
+	.section	.rodata.load_l2p_region.str1.1,"aMS",@progbits,1
+.LC201:
+	.string	"region_id = %d, pm_max_region = %d\n"
+.LC202:
+	.string	"load_l2p_region no ppa = %x , %x, all setting 0xff....\n"
+.LC203:
+	.string	"load_l2p_region = %x,%x,%x, %x\n"
+.LC204:
+	.string	"pm_ppa:"
+.LC205:
+	.string	"spare:"
+	.section	.rodata.lpa_rebuild_hash.str1.1,"aMS",@progbits,1
+.LC84:
+	.string	"%s %d %d\n"
+	.section	.rodata.micron_read_retrial.str1.1,"aMS",@progbits,1
+.LC115:
+	.string	"MT %d row=%x,last status %d,status = %d\n"
+.LC116:
+	.string	"MT RR %d row=%x,count %d,status=%d\n"
+	.section	.rodata.nand_flash_print_info.str1.1,"aMS",@progbits,1
+.LC1:
+	.string	"...%s enter...\n"
+.LC2:
+	.string	"No.0 FLASH ID: %x %x %x %x %x %x\n"
+.LC3:
+	.string	"DiePerChip: %x\n"
+.LC4:
+	.string	"SectPerPage: %x\n"
+.LC5:
+	.string	"PagePerBlk: %x\n"
+.LC6:
+	.string	"Cell: %x\n"
+.LC7:
+	.string	"PlanePerDie: %x\n"
+.LC8:
+	.string	"BlkPerPlane: %x\n"
+.LC9:
+	.string	"die gap: %x\n"
+.LC10:
+	.string	"lsbMode: %x\n"
+.LC11:
+	.string	"ReadRetryMode: %x\n"
+.LC12:
+	.string	"ecc: %x\n"
+.LC13:
+	.string	"idb ecc: %x\n"
+.LC14:
+	.string	"OptMode: %x\n"
+.LC15:
+	.string	"g_nand_max_die: %x\n"
+.LC16:
+	.string	"Cache read enable: %x\n"
+.LC17:
+	.string	"Cache random read enable: %x\n"
+.LC18:
+	.string	"Cache prog enable: %x\n"
+.LC19:
+	.string	"multi read enable: %x\n"
+.LC20:
+	.string	"multi prog enable: %x\n"
+.LC21:
+	.string	"interleave enable: %x\n"
+.LC22:
+	.string	"read retry enable: %x\n"
+.LC23:
+	.string	"randomizer enable: %x\n"
+.LC24:
+	.string	"SDR enable: %x\n"
+.LC25:
+	.string	"ONFI enable: %x\n"
+.LC26:
+	.string	"TOGGLE enable: %x\n"
+.LC27:
+	.string	"g_flash_slc_mode: %x %x\n"
+.LC28:
+	.string	"MultiPlaneProgCmd: %x %x\n"
+.LC29:
+	.string	"MultiPlaneReadCmd: %x %x\n"
+.LC30:
+	.string	"g_flash_toggle_mode_en: %x\n"
+	.section	.rodata.nandc_init.str1.1,"aMS",@progbits,1
+.LC98:
+	.string	"...%s enter... %p\n"
+.LC99:
+	.string	"0:%x %x %x %x %x\n"
+.LC100:
+	.string	"g_nandc_ver...%d\n"
+	.section	.rodata.nandc_xfer.str1.1,"aMS",@progbits,1
+.LC112:
+	.string	"dqs data abort %x\n"
+.LC113:
+	.string	"dqs data timeout %x\n"
+.LC114:
+	.string	"xfer error %x\n"
+	.section	.rodata.nandc_xfer_done.str1.1,"aMS",@progbits,1
+.LC107:
+	.string	"flash_abort_clear = %d\n"
+.LC108:
+	.string	"%d mtrans_cnt = %d page_num = %d\n"
+.LC109:
+	.string	"%d flReg.d32=%x %x\n"
+.LC110:
+	.string	"nandc:"
+.LC111:
+	.string	"nandc_xfer_done read error %x\n"
+	.section	.rodata.pm_alloc_new_blk.str1.1,"aMS",@progbits,1
+.LC82:
+	.string	"blk %x is bad block\n"
+.LC83:
+	.string	"pm_alloc_new_blk: %x %x %x %x\n"
+	.section	.rodata.pm_free_sblk.str1.1,"aMS",@progbits,1
+.LC95:
+	.string	"GC PM block %x %x %x %d\n"
+.LC96:
+	.string	"ftl_free_no_use_map_blk %x %x %x %d\n"
+	.section	.rodata.pm_init.str1.1,"aMS",@progbits,1
+.LC206:
+	.string	"pm_init posr %x %x %x\n"
+.LC207:
+	.string	"pm_init recovery %x %x %x\n"
+.LC208:
+	.string	"pm_init hash %x error\n"
+	.section	.rodata.pm_log2phys.str1.1,"aMS",@progbits,1
+.LC209:
+	.string	"pm_log2phys  lpn = %d, max lpn = %d\n"
+	.section	.rodata.pm_ppa_update_check.str1.1,"aMS",@progbits,1
+.LC200:
+	.string	"%s w error lpn = %x, max ppa = %d\n"
+	.section	.rodata.pm_write_page.str1.1,"aMS",@progbits,1
+.LC165:
+	.string	"pm_write_page write error: %x\n"
+	.section	.rodata.print_ftl_debug_info.str1.1,"aMS",@progbits,1
+.LC71:
+	.string	"bad blk = %x, %x free blk: s:%x,t:%x,m:%x, data blk:s:%x,%x,t%x vpn: s:%x t:%x, max_vpn: %x\n"
+.LC72:
+	.string	"totle w: %d MB,r: %d MB %d dv:0x%X,poc:%d\n"
+.LC73:
+	.string	"gc xlc page: %d,gc slc page: %d, tmp w: %d MB\n"
+.LC74:
+	.string	"slc ec: %d,%d,%d,%d,%d,tlc ec: %d,%d,%d,%d,%d\n"
+.LC75:
+	.string	"gc th: tlc_tlc: %d tlc_slc: %d slc_slc: %d slc_tlc:%d free_th: %d\n"
+.LC76:
+	.string	"swl : %x %x %x %x %x %x\n"
+	.section	.rodata.print_gc_debug_info.str1.1,"aMS",@progbits,1
+.LC56:
+	.string	"gc: b:%x,p:%x,i:%x; free buf=%d %d free slc th: %d\n"
+	.section	.rodata.print_list_info.str1.1,"aMS",@progbits,1
+.LC63:
+	.string	"list count:%p %d\n"
+.LC64:
+	.string	"%d: node:%x %x %x %x, %d %d %d %d %d\n"
+	.section	.rodata.queue_wait_first_req_completed.str1.1,"aMS",@progbits,1
+.LC140:
+	.string	"read: %x %x %x %x\n"
+.LC141:
+	.string	"0set buf %d,status = %x, ppa = %x lun state = %d\n"
+.LC142:
+	.string	"prog end %x %x error_ecc %d %d\n"
+.LC143:
+	.string	"1set buf %d,status = %x, ppa = %x lun state = %d\n"
+.LC144:
+	.string	"dp prog end %x %x error_ecc %d %d\n"
+	.section	.rodata.random_seed,"a",@progbits
+	.align	3
+	.set	.LANCHOR55,. + 0
+	.type	random_seed, %object
+	.size	random_seed, 256
+random_seed:
+	.hword	22378
+	.hword	1512
+	.hword	25245
+	.hword	17827
+	.hword	25756
+	.hword	19440
+	.hword	9026
+	.hword	10030
+	.hword	29528
+	.hword	20467
+	.hword	29676
+	.hword	24432
+	.hword	31328
+	.hword	6872
+	.hword	13426
+	.hword	13842
+	.hword	8783
+	.hword	1108
+	.hword	782
+	.hword	28837
+	.hword	30729
+	.hword	9505
+	.hword	18676
+	.hword	23085
+	.hword	18730
+	.hword	1085
+	.hword	32609
+	.hword	14697
+	.hword	20858
+	.hword	15170
+	.hword	30365
+	.hword	1607
+	.hword	32298
+	.hword	4995
+	.hword	18905
+	.hword	1976
+	.hword	9592
+	.hword	20204
+	.hword	17443
+	.hword	13615
+	.hword	23330
+	.hword	29369
+	.hword	13947
+	.hword	9398
+	.hword	32398
+	.hword	8984
+	.hword	27600
+	.hword	21785
+	.hword	6019
+	.hword	6311
+	.hword	31598
+	.hword	30210
+	.hword	19327
+	.hword	13896
+	.hword	11347
+	.hword	27545
+	.hword	3107
+	.hword	26575
+	.hword	32270
+	.hword	19852
+	.hword	20601
+	.hword	8349
+	.hword	9290
+	.hword	29819
+	.hword	13579
+	.hword	3661
+	.hword	28676
+	.hword	27331
+	.hword	32574
+	.hword	8693
+	.hword	31253
+	.hword	9081
+	.hword	5399
+	.hword	6842
+	.hword	20087
+	.hword	5537
+	.hword	1274
+	.hword	11617
+	.hword	9530
+	.hword	4866
+	.hword	8035
+	.hword	23219
+	.hword	1178
+	.hword	23272
+	.hword	7383
+	.hword	18944
+	.hword	12488
+	.hword	12871
+	.hword	29340
+	.hword	20532
+	.hword	11022
+	.hword	22514
+	.hword	228
+	.hword	22363
+	.hword	24978
+	.hword	14584
+	.hword	12138
+	.hword	3092
+	.hword	17916
+	.hword	16863
+	.hword	14554
+	.hword	31457
+	.hword	29474
+	.hword	25311
+	.hword	24121
+	.hword	3684
+	.hword	28037
+	.hword	22865
+	.hword	22839
+	.hword	25217
+	.hword	13217
+	.hword	27186
+	.hword	14938
+	.hword	11180
+	.hword	29754
+	.hword	24180
+	.hword	15150
+	.hword	32455
+	.hword	20434
+	.hword	23848
+	.hword	29983
+	.hword	16120
+	.hword	14769
+	.hword	20041
+	.hword	29803
+	.hword	28406
+	.hword	17598
+	.hword	28087
+	.section	.rodata.rk_ftl_init.str1.1,"aMS",@progbits,1
+.LC251:
+	.string	"zftl_init %x\n"
+	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
+.LC101:
+	.string	"%s %p + 0x%x:"
+.LC102:
+	.string	"%x "
+.LC103:
+	.string	""
+.LC104:
+	.string	"%s\n"
+	.section	.rodata.samsung_14nm_mlc_rr,"a",@progbits
+	.align	3
+	.set	.LANCHOR171,. + 0
+	.type	samsung_14nm_mlc_rr, %object
+	.size	samsung_14nm_mlc_rr, 104
+samsung_14nm_mlc_rr:
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	-4
+	.byte	3
+	.byte	-4
+	.byte	-6
+	.byte	6
+	.byte	0
+	.byte	6
+	.byte	-10
+	.byte	-10
+	.byte	4
+	.byte	-10
+	.byte	16
+	.byte	12
+	.byte	-4
+	.byte	12
+	.byte	8
+	.byte	-16
+	.byte	10
+	.byte	-16
+	.byte	24
+	.byte	18
+	.byte	-14
+	.byte	18
+	.byte	-4
+	.byte	-22
+	.byte	-16
+	.byte	-22
+	.byte	-8
+	.byte	24
+	.byte	-9
+	.byte	24
+	.byte	8
+	.byte	-28
+	.byte	-4
+	.byte	-28
+	.byte	16
+	.byte	30
+	.byte	10
+	.byte	30
+	.byte	10
+	.byte	-34
+	.byte	6
+	.byte	-34
+	.byte	0
+	.byte	36
+	.byte	-8
+	.byte	36
+	.byte	-8
+	.byte	-40
+	.byte	-2
+	.byte	-40
+	.byte	-20
+	.byte	-46
+	.byte	-4
+	.byte	-46
+	.byte	-30
+	.byte	3
+	.byte	0
+	.byte	3
+	.byte	-3
+	.byte	-2
+	.byte	-4
+	.byte	-2
+	.byte	-6
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-10
+	.byte	-6
+	.byte	-8
+	.byte	-6
+	.byte	-14
+	.byte	-9
+	.byte	-8
+	.byte	-9
+	.byte	-18
+	.byte	-52
+	.byte	22
+	.byte	-52
+	.byte	10
+	.byte	42
+	.byte	4
+	.byte	42
+	.byte	4
+	.byte	48
+	.byte	-9
+	.byte	48
+	.byte	4
+	.byte	-58
+	.byte	12
+	.byte	-58
+	.byte	0
+	.byte	-64
+	.byte	-24
+	.byte	-64
+	.byte	-6
+	.byte	9
+	.byte	18
+	.byte	9
+	.byte	8
+	.section	.rodata.samsung_14nm_slc_rr,"a",@progbits
+	.align	3
+	.set	.LANCHOR170,. + 0
+	.type	samsung_14nm_slc_rr, %object
+	.size	samsung_14nm_slc_rr, 26
+samsung_14nm_slc_rr:
+	.byte	0
+	.byte	10
+	.byte	-10
+	.byte	20
+	.byte	-20
+	.byte	30
+	.byte	-30
+	.byte	40
+	.byte	-40
+	.byte	50
+	.byte	-50
+	.byte	60
+	.byte	-60
+	.byte	-70
+	.byte	-80
+	.byte	-90
+	.byte	-100
+	.byte	-110
+	.byte	-120
+	.byte	-9
+	.byte	70
+	.byte	80
+	.byte	90
+	.byte	-125
+	.byte	-115
+	.byte	100
+	.section	.rodata.samsung_read_retrial.str1.1,"aMS",@progbits,1
+.LC121:
+	.string	"samsung SRR %d row=%x, status=%d\n"
+.LC122:
+	.string	"samsung TRR %d row=%x, status=%d\n"
+.LC123:
+	.string	"samsung RR %d row=%x,count %d,status=%d\n"
+	.section	.rodata.sandisk_prog_test_bad_block.str1.1,"aMS",@progbits,1
+.LC40:
+	.string	"bad block test:%x %x\n"
+	.section	.rodata.sblk_mlc_dump_prog.str1.1,"aMS",@progbits,1
+.LC138:
+	.string	"sblk_mlc_dump_prog wl_addr= %x ppa = %x ppa = %x\n"
+	.section	.rodata.sblk_prog_page.str1.1,"aMS",@progbits,1
+.LC145:
+	.string	"sblk_prog_page ppa = %x, count = %d\n"
+	.section	.rodata.toshiba_15ref_value,"a",@progbits
+	.align	3
+	.set	.LANCHOR22,. + 0
+	.type	toshiba_15ref_value, %object
+	.size	toshiba_15ref_value, 95
+toshiba_15ref_value:
+	.byte	4
+	.byte	5
+	.byte	6
+	.byte	7
+	.byte	13
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	2
+	.byte	4
+	.byte	2
+	.byte	0
+	.byte	0
+	.byte	8
+	.byte	8
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	124
+	.byte	0
+	.byte	124
+	.byte	124
+	.byte	0
+	.byte	122
+	.byte	0
+	.byte	122
+	.byte	122
+	.byte	0
+	.byte	11
+	.byte	126
+	.byte	118
+	.byte	116
+	.byte	0
+	.byte	120
+	.byte	2
+	.byte	120
+	.byte	122
+	.byte	0
+	.byte	126
+	.byte	4
+	.byte	126
+	.byte	122
+	.byte	0
+	.byte	16
+	.byte	118
+	.byte	114
+	.byte	112
+	.byte	0
+	.byte	118
+	.byte	4
+	.byte	118
+	.byte	120
+	.byte	0
+	.byte	4
+	.byte	4
+	.byte	4
+	.byte	118
+	.byte	0
+	.byte	2
+	.byte	0
+	.byte	126
+	.byte	124
+	.byte	0
+	.byte	6
+	.byte	10
+	.byte	6
+	.byte	2
+	.byte	0
+	.byte	116
+	.byte	124
+	.byte	116
+	.byte	118
+	.byte	0
+	.byte	4
+	.byte	4
+	.byte	124
+	.byte	126
+	.byte	0
+	.byte	0
+	.byte	124
+	.byte	120
+	.byte	120
+	.byte	0
+	.byte	124
+	.byte	118
+	.byte	116
+	.byte	114
+	.byte	0
+	.section	.rodata.toshiba_3D_slc_value,"a",@progbits
+	.align	3
+	.set	.LANCHOR39,. + 0
+	.type	toshiba_3D_slc_value, %object
+	.size	toshiba_3D_slc_value, 11
+toshiba_3D_slc_value:
+	.byte	-117
+	.byte	0
+	.byte	-8
+	.byte	8
+	.byte	-16
+	.byte	-24
+	.byte	24
+	.byte	-40
+	.byte	40
+	.byte	-56
+	.byte	56
+	.section	.rodata.toshiba_3D_tlc_value,"a",@progbits
+	.align	3
+	.set	.LANCHOR38,. + 0
+	.type	toshiba_3D_tlc_value, %object
+	.size	toshiba_3D_tlc_value, 399
+toshiba_3D_tlc_value:
+	.byte	-119
+	.byte	-119
+	.byte	-119
+	.byte	-119
+	.byte	-118
+	.byte	-118
+	.byte	-118
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	5
+	.byte	-2
+	.byte	-1
+	.byte	0
+	.byte	-3
+	.byte	-2
+	.byte	6
+	.byte	-9
+	.byte	-12
+	.byte	-9
+	.byte	-7
+	.byte	-13
+	.byte	-12
+	.byte	-7
+	.byte	-6
+	.byte	-15
+	.byte	-15
+	.byte	-2
+	.byte	-12
+	.byte	-16
+	.byte	-6
+	.byte	-2
+	.byte	-19
+	.byte	-19
+	.byte	-6
+	.byte	-4
+	.byte	-12
+	.byte	-14
+	.byte	-2
+	.byte	-11
+	.byte	-23
+	.byte	-34
+	.byte	-4
+	.byte	-20
+	.byte	-22
+	.byte	-2
+	.byte	-7
+	.byte	-31
+	.byte	-30
+	.byte	-12
+	.byte	-20
+	.byte	-18
+	.byte	2
+	.byte	-15
+	.byte	-19
+	.byte	-36
+	.byte	-12
+	.byte	-28
+	.byte	-34
+	.byte	-6
+	.byte	-15
+	.byte	-11
+	.byte	2
+	.byte	-12
+	.byte	-8
+	.byte	-2
+	.byte	2
+	.byte	-3
+	.byte	-7
+	.byte	-10
+	.byte	-4
+	.byte	-8
+	.byte	-6
+	.byte	-6
+	.byte	-11
+	.byte	-27
+	.byte	-38
+	.byte	-16
+	.byte	-12
+	.byte	-2
+	.byte	2
+	.byte	-7
+	.byte	-31
+	.byte	-22
+	.byte	-4
+	.byte	-16
+	.byte	-22
+	.byte	-7
+	.byte	-31
+	.byte	-23
+	.byte	-22
+	.byte	-28
+	.byte	-28
+	.byte	-26
+	.byte	2
+	.byte	-7
+	.byte	-11
+	.byte	-14
+	.byte	-8
+	.byte	-12
+	.byte	-10
+	.byte	-10
+	.byte	-27
+	.byte	-25
+	.byte	-22
+	.byte	-20
+	.byte	-28
+	.byte	-22
+	.byte	-7
+	.byte	-23
+	.byte	-29
+	.byte	-34
+	.byte	-24
+	.byte	-32
+	.byte	-22
+	.byte	-10
+	.byte	-11
+	.byte	-29
+	.byte	-18
+	.byte	-12
+	.byte	-24
+	.byte	-22
+	.byte	6
+	.byte	1
+	.byte	-3
+	.byte	-6
+	.byte	0
+	.byte	-4
+	.byte	-2
+	.byte	10
+	.byte	-3
+	.byte	-7
+	.byte	-6
+	.byte	4
+	.byte	-4
+	.byte	-2
+	.byte	-10
+	.byte	-23
+	.byte	-39
+	.byte	-22
+	.byte	-19
+	.byte	-24
+	.byte	-18
+	.byte	-14
+	.byte	-23
+	.byte	-29
+	.byte	-30
+	.byte	-15
+	.byte	-30
+	.byte	-30
+	.byte	-7
+	.byte	-27
+	.byte	-35
+	.byte	-26
+	.byte	-15
+	.byte	-24
+	.byte	-26
+	.byte	6
+	.byte	-11
+	.byte	5
+	.byte	-2
+	.byte	-16
+	.byte	-16
+	.byte	-2
+	.byte	-2
+	.byte	-15
+	.byte	-15
+	.byte	-20
+	.byte	-8
+	.byte	-16
+	.byte	-18
+	.byte	6
+	.byte	5
+	.byte	-15
+	.byte	-2
+	.byte	-24
+	.byte	-28
+	.byte	-22
+	.byte	10
+	.byte	-15
+	.byte	-3
+	.byte	-30
+	.byte	-8
+	.byte	-24
+	.byte	-30
+	.byte	-10
+	.byte	-27
+	.byte	-19
+	.byte	-30
+	.byte	-12
+	.byte	-16
+	.byte	-10
+	.byte	14
+	.byte	-19
+	.byte	-3
+	.byte	-30
+	.byte	4
+	.byte	4
+	.byte	6
+	.byte	2
+	.byte	1
+	.byte	-3
+	.byte	-10
+	.byte	-8
+	.byte	-4
+	.byte	-6
+	.byte	-2
+	.byte	-15
+	.byte	-11
+	.byte	-26
+	.byte	-8
+	.byte	-20
+	.byte	-30
+	.byte	6
+	.byte	-19
+	.byte	-3
+	.byte	-46
+	.byte	0
+	.byte	0
+	.byte	2
+	.byte	6
+	.byte	9
+	.byte	5
+	.byte	2
+	.byte	4
+	.byte	8
+	.byte	6
+	.byte	8
+	.byte	9
+	.byte	9
+	.byte	6
+	.byte	8
+	.byte	8
+	.byte	6
+	.byte	10
+	.byte	13
+	.byte	9
+	.byte	6
+	.byte	8
+	.byte	12
+	.byte	10
+	.byte	2
+	.byte	5
+	.byte	1
+	.byte	-2
+	.byte	0
+	.byte	0
+	.byte	6
+	.byte	12
+	.byte	1
+	.byte	13
+	.byte	2
+	.byte	12
+	.byte	12
+	.byte	14
+	.byte	-12
+	.byte	-14
+	.byte	-20
+	.byte	-18
+	.byte	-16
+	.byte	-16
+	.byte	-14
+	.byte	-12
+	.byte	-10
+	.byte	-21
+	.byte	-14
+	.byte	-12
+	.byte	-12
+	.byte	-10
+	.byte	-12
+	.byte	-18
+	.byte	-22
+	.byte	-24
+	.byte	-18
+	.byte	-18
+	.byte	-18
+	.byte	-12
+	.byte	-14
+	.byte	-23
+	.byte	-20
+	.byte	-20
+	.byte	-20
+	.byte	-20
+	.byte	-12
+	.byte	-24
+	.byte	-24
+	.byte	-30
+	.byte	-24
+	.byte	-28
+	.byte	-28
+	.byte	-12
+	.byte	-26
+	.byte	-25
+	.byte	-34
+	.byte	-24
+	.byte	-24
+	.byte	-24
+	.byte	-12
+	.byte	-13
+	.byte	-26
+	.byte	-20
+	.byte	-14
+	.byte	-18
+	.byte	-18
+	.byte	-12
+	.byte	-15
+	.byte	-27
+	.byte	-22
+	.byte	-20
+	.byte	-24
+	.byte	-22
+	.byte	-12
+	.byte	-21
+	.byte	-28
+	.byte	-28
+	.byte	-24
+	.byte	-26
+	.byte	-24
+	.byte	20
+	.byte	16
+	.byte	6
+	.byte	10
+	.byte	16
+	.byte	12
+	.byte	12
+	.byte	16
+	.byte	16
+	.byte	8
+	.byte	8
+	.byte	12
+	.byte	12
+	.byte	12
+	.byte	18
+	.byte	18
+	.byte	10
+	.byte	8
+	.byte	14
+	.byte	14
+	.byte	14
+	.byte	16
+	.byte	14
+	.byte	6
+	.byte	6
+	.byte	12
+	.byte	14
+	.byte	8
+	.byte	20
+	.byte	18
+	.byte	8
+	.byte	6
+	.byte	14
+	.byte	14
+	.byte	10
+	.byte	20
+	.byte	20
+	.byte	6
+	.byte	10
+	.byte	10
+	.byte	12
+	.byte	12
+	.byte	10
+	.byte	13
+	.byte	5
+	.byte	2
+	.byte	14
+	.byte	8
+	.byte	6
+	.byte	6
+	.byte	13
+	.byte	9
+	.byte	4
+	.byte	14
+	.byte	10
+	.byte	10
+	.byte	10
+	.byte	13
+	.byte	9
+	.byte	6
+	.byte	8
+	.byte	12
+	.byte	10
+	.byte	2
+	.byte	5
+	.byte	1
+	.byte	-2
+	.byte	0
+	.byte	0
+	.byte	6
+	.byte	12
+	.byte	1
+	.byte	13
+	.byte	2
+	.byte	12
+	.byte	12
+	.byte	14
+	.section	.rodata.toshiba_3d_read_retrial.str1.1,"aMS",@progbits,1
+.LC117:
+	.string	"toshiba SRR %d row=%x, status=%d\n"
+.LC118:
+	.string	"toshiba TRR %d row=%x, status=%d\n"
+.LC119:
+	.string	"toshiba RR %d row=%x,count %d,status=%d\n"
+	.section	.rodata.toshiba_A19ref_value,"a",@progbits
+	.align	3
+	.set	.LANCHOR23,. + 0
+	.type	toshiba_A19ref_value, %object
+	.size	toshiba_A19ref_value, 45
+toshiba_A19ref_value:
+	.byte	4
+	.byte	5
+	.byte	6
+	.byte	7
+	.byte	13
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	4
+	.byte	4
+	.byte	124
+	.byte	126
+	.byte	0
+	.byte	0
+	.byte	124
+	.byte	120
+	.byte	120
+	.byte	0
+	.byte	124
+	.byte	118
+	.byte	116
+	.byte	114
+	.byte	0
+	.byte	8
+	.byte	8
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	11
+	.byte	126
+	.byte	118
+	.byte	116
+	.byte	0
+	.byte	16
+	.byte	118
+	.byte	114
+	.byte	112
+	.byte	0
+	.byte	2
+	.byte	0
+	.byte	126
+	.byte	124
+	.byte	0
+	.section	.rodata.toshiba_ref_value,"a",@progbits
+	.align	3
+	.set	.LANCHOR25,. + 0
+	.type	toshiba_ref_value, %object
+	.size	toshiba_ref_value, 8
+toshiba_ref_value:
+	.byte	0
+	.byte	4
+	.byte	124
+	.byte	120
+	.byte	116
+	.byte	8
+	.byte	12
+	.byte	112
+	.section	.rodata.ymtc_3D_slc_value,"a",@progbits
+	.align	3
+	.set	.LANCHOR43,. + 0
+	.type	ymtc_3D_slc_value, %object
+	.size	ymtc_3D_slc_value, 10
+ymtc_3D_slc_value:
+	.byte	0
+	.byte	-8
+	.byte	8
+	.byte	-16
+	.byte	-20
+	.byte	24
+	.byte	-26
+	.byte	40
+	.byte	-12
+	.byte	56
+	.section	.rodata.ymtc_3D_tlc_value,"a",@progbits
+	.align	3
+	.set	.LANCHOR42,. + 0
+	.type	ymtc_3D_tlc_value, %object
+	.size	ymtc_3D_tlc_value, 357
+ymtc_3D_tlc_value:
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	-10
+	.byte	-10
+	.byte	-6
+	.byte	-6
+	.byte	-2
+	.byte	2
+	.byte	2
+	.byte	-6
+	.byte	-6
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-6
+	.byte	-8
+	.byte	6
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	-2
+	.byte	-2
+	.byte	-2
+	.byte	-4
+	.byte	-4
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-11
+	.byte	-2
+	.byte	2
+	.byte	4
+	.byte	4
+	.byte	6
+	.byte	6
+	.byte	6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-8
+	.byte	-14
+	.byte	-6
+	.byte	-15
+	.byte	-11
+	.byte	2
+	.byte	-12
+	.byte	-8
+	.byte	-2
+	.byte	2
+	.byte	-3
+	.byte	-7
+	.byte	-10
+	.byte	-4
+	.byte	-8
+	.byte	-6
+	.byte	-18
+	.byte	-18
+	.byte	-14
+	.byte	-14
+	.byte	-10
+	.byte	-5
+	.byte	-5
+	.byte	-14
+	.byte	-14
+	.byte	-12
+	.byte	-12
+	.byte	-12
+	.byte	-13
+	.byte	-15
+	.byte	-2
+	.byte	-8
+	.byte	-8
+	.byte	-8
+	.byte	-8
+	.byte	-7
+	.byte	-7
+	.byte	-10
+	.byte	-10
+	.byte	-10
+	.byte	-12
+	.byte	-12
+	.byte	-13
+	.byte	-13
+	.byte	-14
+	.byte	-14
+	.byte	-14
+	.byte	-14
+	.byte	-14
+	.byte	-13
+	.byte	-18
+	.byte	-10
+	.byte	-6
+	.byte	-4
+	.byte	-4
+	.byte	-2
+	.byte	-1
+	.byte	-1
+	.byte	-14
+	.byte	-14
+	.byte	-14
+	.byte	-14
+	.byte	-14
+	.byte	-15
+	.byte	-21
+	.byte	-12
+	.byte	-11
+	.byte	-7
+	.byte	-7
+	.byte	-3
+	.byte	1
+	.byte	1
+	.byte	-8
+	.byte	-7
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-7
+	.byte	-9
+	.byte	4
+	.byte	-1
+	.byte	-1
+	.byte	-1
+	.byte	-1
+	.byte	-1
+	.byte	-1
+	.byte	-4
+	.byte	-3
+	.byte	-3
+	.byte	-5
+	.byte	-5
+	.byte	-7
+	.byte	-7
+	.byte	-8
+	.byte	-7
+	.byte	-7
+	.byte	-7
+	.byte	-7
+	.byte	-7
+	.byte	-12
+	.byte	-4
+	.byte	1
+	.byte	3
+	.byte	3
+	.byte	5
+	.byte	5
+	.byte	5
+	.byte	-8
+	.byte	-7
+	.byte	-7
+	.byte	-7
+	.byte	-7
+	.byte	-9
+	.byte	-15
+	.byte	2
+	.byte	-7
+	.byte	-11
+	.byte	-14
+	.byte	-8
+	.byte	-12
+	.byte	-10
+	.byte	6
+	.byte	1
+	.byte	-3
+	.byte	-6
+	.byte	0
+	.byte	-4
+	.byte	-2
+	.byte	10
+	.byte	-3
+	.byte	-7
+	.byte	-6
+	.byte	4
+	.byte	-4
+	.byte	-2
+	.byte	-10
+	.byte	-23
+	.byte	-39
+	.byte	-22
+	.byte	-19
+	.byte	-24
+	.byte	-18
+	.byte	-7
+	.byte	-27
+	.byte	-35
+	.byte	-26
+	.byte	-15
+	.byte	-24
+	.byte	-26
+	.byte	6
+	.byte	-11
+	.byte	5
+	.byte	-2
+	.byte	-16
+	.byte	-16
+	.byte	-2
+	.byte	-2
+	.byte	-15
+	.byte	-15
+	.byte	-20
+	.byte	-8
+	.byte	-16
+	.byte	-18
+	.byte	2
+	.byte	1
+	.byte	-3
+	.byte	-10
+	.byte	-8
+	.byte	-4
+	.byte	-6
+	.byte	-2
+	.byte	-15
+	.byte	-11
+	.byte	-26
+	.byte	-8
+	.byte	-20
+	.byte	-30
+	.byte	6
+	.byte	-19
+	.byte	-3
+	.byte	-46
+	.byte	0
+	.byte	0
+	.byte	2
+	.byte	6
+	.byte	9
+	.byte	5
+	.byte	2
+	.byte	4
+	.byte	8
+	.byte	6
+	.byte	8
+	.byte	9
+	.byte	9
+	.byte	6
+	.byte	8
+	.byte	8
+	.byte	6
+	.byte	10
+	.byte	13
+	.byte	9
+	.byte	6
+	.byte	8
+	.byte	12
+	.byte	10
+	.byte	2
+	.byte	5
+	.byte	1
+	.byte	-2
+	.byte	0
+	.byte	0
+	.byte	6
+	.byte	12
+	.byte	1
+	.byte	13
+	.byte	2
+	.byte	12
+	.byte	12
+	.byte	14
+	.byte	-12
+	.byte	-14
+	.byte	-20
+	.byte	-18
+	.byte	-16
+	.byte	-16
+	.byte	-14
+	.byte	-12
+	.byte	-10
+	.byte	-21
+	.byte	-14
+	.byte	-12
+	.byte	-12
+	.byte	-10
+	.byte	-12
+	.byte	-18
+	.byte	-22
+	.byte	-24
+	.byte	-18
+	.byte	-18
+	.byte	-18
+	.byte	-12
+	.byte	-14
+	.byte	-23
+	.byte	-20
+	.byte	-20
+	.byte	-20
+	.byte	-20
+	.byte	16
+	.byte	16
+	.byte	8
+	.byte	8
+	.byte	12
+	.byte	12
+	.byte	12
+	.byte	18
+	.byte	18
+	.byte	10
+	.byte	8
+	.byte	14
+	.byte	14
+	.byte	14
+	.byte	16
+	.byte	14
+	.byte	6
+	.byte	6
+	.byte	12
+	.byte	14
+	.byte	8
+	.byte	10
+	.byte	13
+	.byte	5
+	.byte	2
+	.byte	14
+	.byte	8
+	.byte	6
+	.byte	6
+	.byte	13
+	.byte	9
+	.byte	4
+	.byte	14
+	.byte	10
+	.byte	10
+	.byte	10
+	.byte	13
+	.byte	9
+	.byte	6
+	.byte	8
+	.byte	12
+	.byte	10
+	.byte	2
+	.byte	5
+	.byte	1
+	.byte	-2
+	.byte	0
+	.byte	0
+	.byte	6
+	.byte	12
+	.byte	1
+	.byte	13
+	.byte	2
+	.byte	12
+	.byte	12
+	.byte	14
+	.section	.rodata.ymtc_3d_read_retrial.str1.1,"aMS",@progbits,1
+.LC120:
+	.string	"YMTC RR %d row=%x,count %d,status=%d\n"
+	.section	.rodata.ymtc_flash_tlc_page_prog.str1.1,"aMS",@progbits,1
+.LC134:
+	.string	"ymtc_flash_tlc_page_prog page_addr = %x status = %x\n"
+	.section	.rodata.zftl_discard.str1.1,"aMS",@progbits,1
+.LC253:
+	.string	"ftl_discard:(%x, %x, %x, %x)\n"
+	.section	.rodata.zftl_do_gc.str1.1,"aMS",@progbits,1
+.LC236:
+	.string	"gc %d: %d %d %d %d %d %d %d\n"
+.LC237:
+	.string	"GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\n"
+.LC238:
+	.string	"gc free %x, %d\n"
+	.section	.rodata.zftl_gc_get_free_sblk.str1.1,"aMS",@progbits,1
+.LC59:
+	.string	"swl_tlc_free_mini_ec_blk alloc sblk %x\n"
+.LC60:
+	.string	"zftl_get_free_sblk %x %d, %p %d %d\n"
+.LC61:
+	.string	"zftl_gc_get_free_sblk %x %x %x, %d %d %d\n"
+	.section	.rodata.zftl_get_free_sblk.str1.1,"aMS",@progbits,1
+.LC62:
+	.string	"swl_slc_free_mini_ec_blk alloc sblk %x\n"
+	.section	.rodata.zftl_init.str1.1,"aMS",@progbits,1
+.LC239:
+	.string	"FTL version: 6.0.23 20201118"
+.LC240:
+	.string	"_c_user_data_density := %d\n"
+.LC241:
+	.string	"_c_totle_phy_density := %d\n"
+.LC242:
+	.string	"_c_totle_log_page := %d\n"
+.LC243:
+	.string	"_c_totle_data_density := %d\n"
+.LC244:
+	.string	"_c_ftl_pm_page_num := %d\n"
+.LC245:
+	.string	"_c_ftl_byte_pre_page := %d\n"
+.LC246:
+	.string	"_c_max_pm_sblk := %d\n"
+.LC247:
+	.string	"_min_slc_super_block := %d\n"
+.LC248:
+	.string	"_max_xlc_super_block := %d\n"
+.LC249:
+	.string	"gp_ftl_ext_info %p %p %p\n"
+.LC250:
+	.string	"flash info size: %d %d %d\n"
+	.section	.rodata.zftl_read.str1.1,"aMS",@progbits,1
+.LC225:
+	.string	"ftl_read %x %x %x\n"
+.LC226:
+	.string	"ftl_read refresh =%x, lpa = %x, ppa= %x\n"
+.LC227:
+	.string	"id=%d, status = %x, lpa = %x, ppa = %x spare = %x %x %x %x\n"
+	.section	.rodata.zftl_sblk_list_init.str1.1,"aMS",@progbits,1
+.LC94:
+	.string	"free blk vpn error: %x %x\n"
+	.section	.rodata.zftl_write.str1.1,"aMS",@progbits,1
+.LC252:
+	.string	"ftlwrite %x %x %x %x\n"
diff --git a/drivers/rknand/rknand.c b/drivers/rknand/rknand.c
index 49347d9a94..7461ec3bbf 100644
--- a/drivers/rknand/rknand.c
+++ b/drivers/rknand/rknand.c
@@ -191,9 +191,11 @@ static int rockchip_nand_probe(struct udevice *udev)
 		ndev->read = ftl_read;
 		ndev->write = ftl_write;
 		ndev->erase = ftl_discard;
+#ifndef CONFIG_SPL_BUILD
 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
 		flash_vendor_dev_ops_register(rkftl_nand_vendor_read,
 					      rkftl_nand_vendor_write);
+#endif
 #endif
 	}
 
@@ -202,10 +204,8 @@ static int rockchip_nand_probe(struct udevice *udev)
 
 static const struct blk_ops rknand_blk_ops = {
 	.read	= rknand_bread,
-#ifndef CONFIG_SPL_BUILD
 	.write	= rknand_bwrite,
 	.erase	= rknand_berase,
-#endif
 };
 
 static const struct udevice_id rockchip_nand_ids[] = {

commit d7965d03e29384eaf4a5a578b0c7a721036c988b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 26 10:39:23 2020 +0800

    pinctrl: rockchip: add SPL support
    
    CONFIG_OF_LIVE is always available in SPL and U-Boot.
    
    Use CONFIG_IS_ENABLED(OF_LIVE) to unwind as CONFIG_OF_LIVE
    in U-Boot and CONFIG_SPL_OF_LIVE in SPL.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I980579d54850ca7655b464688ba9e6bd35f24250

diff --git a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
index 07a4edd9a5..f1bfee2bb4 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
@@ -428,7 +428,7 @@ static int rockchip_pinctrl_set_state(struct udevice *dev,
 	int prop_len, param;
 	const u32 *data;
 	ofnode node;
-#ifdef CONFIG_OF_LIVE
+#if CONFIG_IS_ENABLED(OF_LIVE)
 	const struct device_node *np;
 	struct property *pp;
 #else
@@ -468,7 +468,7 @@ static int rockchip_pinctrl_set_state(struct udevice *dev,
 		node = ofnode_get_by_phandle(conf);
 		if (!ofnode_valid(node))
 			return -ENODEV;
-#ifdef CONFIG_OF_LIVE
+#if CONFIG_IS_ENABLED(OF_LIVE)
 		np = ofnode_to_np(node);
 		for (pp = np->properties; pp; pp = pp->next) {
 			prop_name = pp->name;

commit 186b00109f574a81b3617906c4d1eb5fc212dcc6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 25 14:40:56 2020 +0800

    rockchip: rk3568: place U-Boot at 10MB offset
    
    2~10MB region is for OP-TEE.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ic4d4beb9e42a2b17665102c811e59b5864cbc888

diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h
index d06cbb88a6..7cbe468849 100644
--- a/include/configs/rk3568_common.h
+++ b/include/configs/rk3568_common.h
@@ -19,9 +19,9 @@
 #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
-#define CONFIG_SYS_TEXT_BASE		0x00600000
-#define CONFIG_SYS_INIT_SP_ADDR		0x00800000
-#define CONFIG_SYS_LOAD_ADDR		0x00800800
+#define CONFIG_SYS_TEXT_BASE		0x00a00000
+#define CONFIG_SYS_INIT_SP_ADDR		0x00c00000
+#define CONFIG_SYS_LOAD_ADDR		0x00c00800
 #define CONFIG_SYS_BOOTM_LEN		(64 << 20)	/* 64M */
 #define COUNTER_FREQUENCY		24000000
 
@@ -51,11 +51,11 @@
 #define CONFIG_ROCKUSB_G_DNL_PID	0x350a
 
 #define ENV_MEM_LAYOUT_SETTINGS \
-	"scriptaddr=0x00500000\0" \
-	"pxefile_addr_r=0x00600000\0" \
+	"scriptaddr=0x00b00000\0" \
+	"pxefile_addr_r=0x00a00000\0" \
 	"fdt_addr_r=0x0a100000\0" \
 	"kernel_addr_no_bl32_r=0x00280000\0" \
-	"kernel_addr_r=0x00680000\0" \
+	"kernel_addr_r=0x00a80000\0" \
 	"kernel_addr_c=0x04080000\0" \
 	"ramdisk_addr_r=0x0a200000\0"
 

commit 39b9f515bcfc818f97d14ddffdb86218fccf930c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 25 15:16:19 2020 +0800

    spl: fit: update U-Boot entry point by image info
    
    Otherwise it depends on static value CONFIG_SYS_TEXT_BASE
    if the image node can't be found in "/fit-images".
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I103bd3467baaefb816ab34d7a2bf37547113e431

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 7147571ff9..1ad65006f4 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -725,6 +725,11 @@ static int spl_internal_load_simple_fit(struct spl_image_info *spl_image,
 			continue;
 
 		if (os_type == IH_OS_U_BOOT) {
+#if CONFIG_IS_ENABLED(ATF)
+			spl_image->entry_point_bl33 = image_info.load_addr;
+#elif CONFIG_IS_ENABLED(OPTEE)
+			spl_image->entry_point_os = image_info.load_addr;
+#endif
 			spl_fit_append_fdt(&image_info, info, sector,
 					   fit, images, base_offset);
 			spl_image->fdt_addr = image_info.fdt_addr;

commit 69a04b4fa54226f12c912d216a60e94bee286c0f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 25 16:02:29 2020 +0800

    spl: atf: traverse all "/fit-images" sub nodes
    
    Fix find sub nodes failed.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I2cb885028da9711a15f001fdd48e9d273cfd348a

diff --git a/common/spl/spl_atf.c b/common/spl/spl_atf.c
index 0a26e3cc01..da61658beb 100644
--- a/common/spl/spl_atf.c
+++ b/common/spl/spl_atf.c
@@ -119,7 +119,7 @@ void bl31_entry(uintptr_t bl31_entry, uintptr_t bl32_entry,
 
 static int spl_fit_images_find(void *blob, int os)
 {
-	int parent, node, ndepth;
+	int parent, node;
 	const void *data;
 
 	if (!blob)
@@ -129,19 +129,14 @@ static int spl_fit_images_find(void *blob, int os)
 	if (parent < 0)
 		return -FDT_ERR_NOTFOUND;
 
-	for (node = fdt_next_node(blob, parent, &ndepth);
-	     (node >= 0) && (ndepth > 0);
-	     node = fdt_next_node(blob, node, &ndepth)) {
-		if (ndepth != 1)
-			continue;
-
+	fdt_for_each_subnode(node, blob, parent) {
 		data = fdt_getprop(blob, node, FIT_OS_PROP, NULL);
 		if (!data)
 			continue;
 
 		if (genimg_get_os_id(data) == os)
 			return node;
-	};
+	}
 
 	return -FDT_ERR_NOTFOUND;
 }

commit 038c1ecaa2665c5ba50e0154fac605486f2e582e
Author: Shunqing Chen <csq@rock-chips.com>
Date:   Sat Mar 21 09:35:31 2020 +0800

    power: charge animation: energy enough auto exit uboot charge
    
    Change-Id: Ifa94783869c7cb35f819f3700c82bac7d00a7b05
    Signed-off-by: Shunqing Chen <csq@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 66b661158f..1735d97d18 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -90,6 +90,8 @@ static int charge_animation_ofdata_to_platdata(struct udevice *dev)
 	pdata->android_charge =
 		dev_read_u32_default(dev, "rockchip,android-charge-on", 0);
 
+	pdata->auto_exit_charge =
+		dev_read_u32_default(dev, "rockchip,uboot-exit-charge-auto", 0);
 	pdata->exit_charge_level =
 		dev_read_u32_default(dev, "rockchip,uboot-exit-charge-level", 0);
 	pdata->exit_charge_voltage =
@@ -114,6 +116,9 @@ static int charge_animation_ofdata_to_platdata(struct udevice *dev)
 	if (pdata->screen_on_voltage > pdata->exit_charge_voltage)
 		pdata->screen_on_voltage = pdata->exit_charge_voltage;
 
+	if (pdata->auto_exit_charge && !pdata->auto_wakeup_interval)
+		pdata->auto_wakeup_interval = 10;
+
 	debug("mode: uboot=%d, android=%d; exit: soc=%d%%, voltage=%dmv;\n"
 	      "lp_voltage=%d%%, screen_on=%dmv\n",
 	      pdata->uboot_charge, pdata->android_charge,
@@ -435,6 +440,7 @@ static int charge_animation_show(struct udevice *dev)
 	int i, charging = 1, ret;
 	int boot_mode;
 	int first_poll_fg = 1;
+	bool exit_charge = false;
 
 /*
  * Check sequence:
@@ -474,9 +480,31 @@ static int charge_animation_show(struct udevice *dev)
 		return 0;
 	}
 #endif
+	charging = fg_charger_get_chrg_online(dev);
+	/* Not charger online and low power, shutdown */
+	if (charging <= 0 && pdata->auto_exit_charge) {
+		soc = fuel_gauge_update_get_soc(fg);
+		voltage = fuel_gauge_get_voltage(fg);
+		if (soc < pdata->exit_charge_level) {
+			printf("soc(%d%%) < exit_charge_level(%d%%)\n",
+			       soc, pdata->exit_charge_level);
+			exit_charge = true;
+		}
+		if (voltage < pdata->exit_charge_voltage) {
+			printf("voltage(%d) < exit_charge_voltage(%d)\n",
+			       voltage, pdata->exit_charge_voltage);
+			exit_charge = true;
+		}
+		if (exit_charge) {
+			printf("Not charging and low power, Shutdown...\n");
+			show_idx = IMAGE_LOWPOWER_IDX(image_num);
+			charge_show_bmp(image[show_idx].name);
+			mdelay(1000);
+			pmic_shutdown(pmic);
+		}
+	}
 
 	/* Not charger online, exit */
-	charging = fg_charger_get_chrg_online(dev);
 	if (charging <= 0) {
 		printf("Exit charge: due to charger offline\n");
 		return 0;
@@ -584,6 +612,22 @@ static int charge_animation_show(struct udevice *dev)
 		first_poll_fg = 0;
 		local_irq_enable();
 
+		if (pdata->auto_exit_charge) {
+			/* Is able to boot now ? */
+			if (pdata->exit_charge_level &&
+			    soc >= pdata->exit_charge_level) {
+				printf("soc(%d%%) exit charge animation...\n",
+				       soc);
+				break;
+			}
+			if (pdata->exit_charge_voltage &&
+			    voltage >= pdata->exit_charge_voltage) {
+				printf("vol(%d) exit charge animation...\n",
+				       voltage);
+				break;
+			}
+		}
+
 show_images:
 		/*
 		 * Just for debug, otherwise there will be nothing output which
diff --git a/include/power/charge_animation.h b/include/power/charge_animation.h
index 9288718cf7..df68bc3eaa 100644
--- a/include/power/charge_animation.h
+++ b/include/power/charge_animation.h
@@ -11,6 +11,7 @@ struct charge_animation_pdata {
 	int android_charge;	/* android charge, 1: enable, 0: disable */
 	int uboot_charge;	/* u-boot charge, 1: enable, 0: disable */
 
+	int auto_exit_charge;	/* energy enough auto exit uboot charging*/
 	int exit_charge_voltage;/* lowest voltage allowed to exit charging */
 	int exit_charge_level;  /* lowest soc level allowed to exit charging */
 	int low_power_voltage;	/* below this voltage, force system into charge mode anyway */

commit 14aa40ff18c9b1358e249dccd2881740be35fa73
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Sep 27 10:14:24 2020 +0800

    scritps: fit: add "--burn-key-hash" support
    
    It sets "burn-key-hash = <0>" to "burn-key-hash = <1>" which
    enables SPL burn root-key hash to OTP.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I65f4b8f3603fff25d42b576b65ea86733d60ae56

diff --git a/scripts/fit.sh b/scripts/fit.sh
index 3f34ac5ac1..3b5da371f9 100755
--- a/scripts/fit.sh
+++ b/scripts/fit.sh
@@ -92,7 +92,7 @@ function check_its()
 function validate_arg()
 {
 	case $1 in
-		--no-check|--spl-new)
+		--no-check|--spl-new|--burn-key-hash)
 			shift=1
 			;;
 		--ini-trust|--ini-loader|--rollback-index-boot|--rollback-index-uboot|--boot_img|--version-uboot|--version-boot)
@@ -162,6 +162,10 @@ function fit_process_args()
 				arg_check_decimal $2
 				shift 2
 				;;
+			--burn-key-hash)
+				ARG_BURN_KEY_HASH="y"
+				shift 1
+				;;
 			*)
 				help
 				exit 1
@@ -224,6 +228,11 @@ function fit_gen_uboot_itb()
 			sed -i "s/rollback-index = ${VERSION}/rollback-index = <${ARG_ROLLBACK_IDX_UBOOT}>;/g" ${ITS_UBOOT}
 		fi
 
+		# burn-key-hash
+		if [ "${ARG_BURN_KEY_HASH}" == "y" ]; then
+			sed -i "s/burn-key-hash = <0>;/burn-key-hash = <1>;/g" ${ITS_UBOOT}
+		fi
+
 		# u-boot.dtb must contains rsa key
 		if ! fdtget -l ${UBOOT_DTB} /signature >/dev/null 2>&1 ; then
 			${MKIMAGE} -f ${ITS_UBOOT} -k ${KEY_DIR} -K ${UBOOT_DTB} -E -p ${OFFS_S_UBOOT} -r ${ITB_UBOOT} -v ${ARG_VER_UBOOT}
@@ -243,6 +252,14 @@ function fit_gen_uboot_itb()
 			fi
 		fi
 
+		# burn-key-hash read back check
+		if [ "${ARG_BURN_KEY_HASH}" == "y" ]; then
+			if [ "`fdtget -ti ${ITB_UBOOT} /configurations/conf burn-key-hash`" != "1" ]; then
+				echo "ERROR: Failed to set burn-key-hash for ${ITB_UBOOT}";
+				exit 1
+			fi
+		fi
+
 		# host check signature
 		if [ "${ARG_NO_CHECK}" != "y" ]; then
 			if [ "${ARG_SPL_NEW}" == "y" ]; then
@@ -434,6 +451,11 @@ function fit_msg_uboot()
 		MSG_VER=", version=${VERSION}"
 	fi
 
+	if [ "${ARG_BURN_KEY_HASH}" == "y" ]; then
+		echo "uboot.img: burn-key-hash=1"
+		echo
+	fi
+
 	if [ "${ARG_SPL_ROLLBACK_PROTECT}" == "y" ]; then
 		echo "Image(${MSG_SIGN}${MSG_VER}, rollback-index=${ARG_ROLLBACK_IDX_UBOOT}):  ${IMG_UBOOT} (with uboot, trust...) is ready"
 	else

commit 4129064579a453417d36f012e513316e0efbe4e4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Sep 27 10:13:29 2020 +0800

    scritps: fit: use more strict replace pattern for "rolback-index"
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Icfc23e1f7338842a565be5b691a8f14e003d1644

diff --git a/scripts/fit.sh b/scripts/fit.sh
index f86a6bdb96..3f34ac5ac1 100755
--- a/scripts/fit.sh
+++ b/scripts/fit.sh
@@ -210,6 +210,7 @@ function fit_gen_uboot_itb()
 			exit 1
 		fi
 
+		# rollback-index
 		if grep -q '^CONFIG_SPL_FIT_ROLLBACK_PROTECT=y' .config ; then
 			ARG_SPL_ROLLBACK_PROTECT="y"
 			if [ -z ${ARG_ROLLBACK_IDX_UBOOT} ]; then
@@ -219,8 +220,8 @@ function fit_gen_uboot_itb()
 		fi
 
 		if [ "${ARG_SPL_ROLLBACK_PROTECT}" == "y" ]; then
-			VERSION=`grep 'rollback-index' ${ITS_UBOOT} | awk -F '=' '{ printf $2 }' `
-			sed -i "s/${VERSION}/ <${ARG_ROLLBACK_IDX_UBOOT}>;/g" ${ITS_UBOOT}
+			VERSION=`grep 'rollback-index' ${ITS_UBOOT} | awk -F '=' '{ printf $2 }' | tr -d ' '`
+			sed -i "s/rollback-index = ${VERSION}/rollback-index = <${ARG_ROLLBACK_IDX_UBOOT}>;/g" ${ITS_UBOOT}
 		fi
 
 		# u-boot.dtb must contains rsa key
@@ -343,8 +344,8 @@ function fit_gen_boot_itb()
 		fi
 
 		if [ "${ARG_ROLLBACK_PROTECT}" == "y" ]; then
-			VERSION=`grep 'rollback-index' ${ITS_BOOT} | awk -F '=' '{ printf $2 }' `
-			sed -i "s/${VERSION}/ <${ARG_ROLLBACK_IDX_BOOT}>;/g" ${ITS_BOOT}
+			VERSION=`grep 'rollback-index' ${ITS_BOOT} | awk -F '=' '{ printf $2 }' | tr -d ' '`
+			sed -i "s/rollback-index = ${VERSION}/rollback-index = <${ARG_ROLLBACK_IDX_BOOT}>;/g" ${ITS_BOOT}
 		fi
 
 		${MKIMAGE} -f ${ITS_BOOT} -k ${KEY_DIR} -K ${UBOOT_DTB} -E -p ${OFFS_S_BOOT} -r ${ITB_BOOT} -v ${ARG_VER_BOOT}

commit 34b05be1cbeccd3d7050c60fbba214913ed4b661
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Sep 27 10:16:31 2020 +0800

    rockchip: make_fit_optee/atf: add "burn-key-hash = <0>".
    
    It is available when verified boot is enabled, to active
    this feature: ./make.sh ... --burn-key-hash
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I2224bae079f12d48609989b080b287dfe4fd2cb3

diff --git a/arch/arm/mach-rockchip/make_fit_atf.sh b/arch/arm/mach-rockchip/make_fit_atf.sh
index 258695c1b3..c8f851fd22 100755
--- a/arch/arm/mach-rockchip/make_fit_atf.sh
+++ b/arch/arm/mach-rockchip/make_fit_atf.sh
@@ -183,6 +183,7 @@ cat << EOF
 		conf {
 			description = "Rockchip armv8 with ATF";
 			rollback-index = <0x0>;
+			burn-key-hash = <0>;
 			firmware = "atf-1";
 			loadables = "uboot"${LOADABLE_ATF}${LOADABLE_OPTEE};
 			fdt = "fdt";
diff --git a/arch/arm/mach-rockchip/make_fit_optee.sh b/arch/arm/mach-rockchip/make_fit_optee.sh
index 6c499c5142..afc503bd8c 100755
--- a/arch/arm/mach-rockchip/make_fit_optee.sh
+++ b/arch/arm/mach-rockchip/make_fit_optee.sh
@@ -147,6 +147,7 @@ cat  << EOF
 		conf {
 			description = "Rockchip armv7 with OP-TEE";
 			rollback-index = <0x0>;
+			burn-key-hash = <0>;
 			firmware = "optee";
 			loadables = "uboot";
 			fdt = "fdt";

commit 00d11ef213f1c3a1d3496098a6e200c68e485c64
Author: Shunqing Chen <csq@rock-chips.com>
Date:   Wed Nov 25 08:26:44 2020 +0000

    pmic: rk8xx: support power key config from dts
    
    Signed-off-by: Shunqing Chen <csq@rock-chips.com>
    Change-Id: I4b2def4e5b171b2b46f26695e9cabec8a7b496e2

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index a0a2e80aed..ca952ea1a0 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -333,7 +333,7 @@ static void rk8xx_plug_out_handler(int irq, void *data)
 static int rk8xx_ofdata_to_platdata(struct udevice *dev)
 {
 	struct rk8xx_priv *rk8xx = dev_get_priv(dev);
-	u32 interrupt, phandle;
+	u32 interrupt, phandle, val;
 	int ret;
 
 	phandle = dev_read_u32_default(dev, "interrupt-parent", -ENODATA);
@@ -354,6 +354,22 @@ static int rk8xx_ofdata_to_platdata(struct udevice *dev)
 		return rk8xx->irq;
 	}
 
+	val = dev_read_u32_default(dev, "long-press-off-time-sec", 0);
+	if (val <= 6)
+		rk8xx->lp_off_time = RK8XX_LP_TIME_6S;
+	else if (val <= 8)
+		rk8xx->lp_off_time = RK8XX_LP_TIME_8S;
+	else if (val <= 10)
+		rk8xx->lp_off_time = RK8XX_LP_TIME_10S;
+	else
+		rk8xx->lp_off_time = RK8XX_LP_TIME_12S;
+
+	val = dev_read_u32_default(dev, "long-press-restart", 0);
+	if (val)
+		rk8xx->lp_action = RK8XX_LP_RESTART;
+	else
+		rk8xx->lp_action = RK8XX_LP_OFF;
+
 	return 0;
 }
 
@@ -424,6 +440,7 @@ static int rk8xx_probe(struct udevice *dev)
 	int ret = 0, i, show_variant;
 	uint8_t msb, lsb, id_msb, id_lsb;
 	uint8_t on_source = 0, off_source = 0;
+	uint8_t pwron_key = 0, lp_off_msk = 0, lp_act_msk = 0;
 	uint8_t power_en0, power_en1, power_en2, power_en3;
 	uint8_t value;
 
@@ -449,15 +466,23 @@ static int rk8xx_probe(struct udevice *dev)
 	switch (priv->variant) {
 	case RK808_ID:
 		show_variant = 0x808;	/* RK808 hardware ID is 0 */
+		pwron_key = RK8XX_DEVCTRL_REG;
+		lp_off_msk = RK8XX_LP_OFF_MSK;
 		break;
 	case RK805_ID:
 	case RK816_ID:
 		on_source = RK8XX_ON_SOURCE;
 		off_source = RK8XX_OFF_SOURCE;
+		pwron_key = RK8XX_DEVCTRL_REG;
+		lp_off_msk = RK8XX_LP_OFF_MSK;
+		lp_act_msk = RK8XX_LP_ACTION_MSK;
 		break;
 	case RK818_ID:
 		on_source = RK8XX_ON_SOURCE;
 		off_source = RK8XX_OFF_SOURCE;
+		pwron_key = RK8XX_DEVCTRL_REG;
+		lp_off_msk = RK8XX_LP_OFF_MSK;
+		lp_act_msk = RK8XX_LP_ACTION_MSK;
 		/* set current if no fuel gauge */
 		if (!ofnode_valid(dev_read_subnode(dev, "battery"))) {
 			init_current = rk818_init_current;
@@ -468,6 +493,9 @@ static int rk8xx_probe(struct udevice *dev)
 	case RK817_ID:
 		on_source = RK817_ON_SOURCE;
 		off_source = RK817_OFF_SOURCE;
+		pwron_key = RK817_PWRON_KEY;
+		lp_off_msk = RK8XX_LP_OFF_MSK;
+		lp_act_msk = RK8XX_LP_ACTION_MSK;
 		init_data = rk817_init_reg;
 		init_data_num = ARRAY_SIZE(rk817_init_reg);
 		power_en0 = pmic_reg_read(dev, RK817_POWER_EN0);
@@ -517,6 +545,16 @@ static int rk8xx_probe(struct udevice *dev)
 		       pmic_reg_read(dev, off_source));
 	printf("\n");
 
+	if (pwron_key) {
+		value = pmic_reg_read(dev, pwron_key);
+		value &= ~(lp_off_msk | lp_act_msk);
+		if (lp_off_msk)
+			value |= priv->lp_off_time;
+		if (lp_act_msk)
+			value |= priv->lp_action;
+		pmic_reg_write(dev, pwron_key, value);
+	}
+
 	ret = rk8xx_irq_chip_init(dev);
 	if (ret) {
 		printf("IRQ chip initial failed\n");
diff --git a/include/power/rk8xx_pmic.h b/include/power/rk8xx_pmic.h
index 4031456553..5f3bb30a37 100644
--- a/include/power/rk8xx_pmic.h
+++ b/include/power/rk8xx_pmic.h
@@ -216,6 +216,17 @@ enum {
 #define RK817_OFF_SOURCE	0xf6
 #define RK817_NUM_OF_REGS	0xff
 
+#define RK8XX_DEVCTRL_REG	0x4b
+#define RK817_PWRON_KEY		0xf7
+#define RK8XX_LP_ACTION_MSK	BIT(6)
+#define RK8XX_LP_OFF		(0 << 6)
+#define RK8XX_LP_RESTART	(1 << 6)
+#define RK8XX_LP_OFF_MSK	BIT(4) | BIT(5)
+#define RK8XX_LP_TIME_6S	(0 << 4)
+#define RK8XX_LP_TIME_8S	(1 << 4)
+#define RK8XX_LP_TIME_10S	(2 << 4)
+#define RK8XX_LP_TIME_12S	(3 << 4)
+
 /* IRQ definitions */
 #define RK8XX_IRQ_PWRON_FALL		0
 #define RK8XX_IRQ_PWRON_RISE		1
@@ -269,6 +280,8 @@ struct rk8xx_priv {
 	int variant;
 	int irq;
 	struct virq_chip *irq_chip;
+	int lp_off_time;
+	int lp_action;
 };
 
 int rk8xx_spl_configure_buck(struct udevice *pmic, int buck, int uvolt);

commit c91220724d4cb58fd54c61a0b871cda8492b16dd
Author: Weiwen Chen <cww@rock-chips.com>
Date:   Tue Nov 24 11:55:35 2020 +0800

    configs: rv1126-spi-nor-tb.config: update base on rv1126-spi-nor-tiny_defconfig
    
    Signed-off-by: Weiwen Chen <cww@rock-chips.com>
    Change-Id: Ib413a9480c007223ea406fa082d324302fe8a111

diff --git a/configs/rv1126-spi-nor-tb.config b/configs/rv1126-spi-nor-tb.config
index 069fe8f25f..5b30b46d09 100644
--- a/configs/rv1126-spi-nor-tb.config
+++ b/configs/rv1126-spi-nor-tb.config
@@ -1,63 +1,16 @@
-# CONFIG_ARM_CPU_SUSPEND is not set
-CONFIG_BASE_DEFCONFIG="rv1126_defconfig"
-# CONFIG_CMD_MMC is not set
-# CONFIG_CMD_NAND is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_TFTP_BOOTM is not set
-# CONFIG_CMD_TFTP_FLASH is not set
-# CONFIG_CMD_TFTPPUT is not set
-# CONFIG_DISPLAY is not set
-# CONFIG_DM_CHARGE_DISPLAY is not set
-# CONFIG_DM_ETH is not set
-# CONFIG_DM_ETH_PHY is not set
-# CONFIG_DM_FUEL_GAUGE is not set
-# CONFIG_DM_VIDEO is not set
-# CONFIG_FIT is not set
-# CONFIG_I2C_EDID is not set
-# CONFIG_LAVA_INFO is not set
+CONFIG_BASE_DEFCONFIG="rv1126-spi-nor-tiny_defconfig"
 CONFIG_LOADER_INI="RV1126MINIALL_SPI_NOR_TB.ini"
-# CONFIG_MMC_DW is not set
-# CONFIG_MTD_NAND_BBT_USING_FLASH is not set
-# CONFIG_MTD_SPI_NAND is not set
-# CONFIG_NAND is not set
-# CONFIG_NET is not set
 CONFIG_OF_U_BOOT_REMOVE_PROPS=""
-# CONFIG_OPTEE_CLIENT is not set
-# CONFIG_OPTEE_V2 is not set
-# CONFIG_PHYLIB is not set
-# CONFIG_REGEX is not set
-CONFIG_RKFW_BOOT_SECTOR=0xa000
-CONFIG_RKFW_TRUST_SECTOR=0x6000
-CONFIG_RKFW_U_BOOT_SECTOR=0x4000
-# CONFIG_ROCKCHIP_UIMAGE is not set
-# CONFIG_RSA is not set
-# CONFIG_SHA1 is not set
-# CONFIG_SHA256 is not set
-# CONFIG_SHA512 is not set
 # CONFIG_SPL_AB is not set
 # CONFIG_SPL_CRYPTO_SUPPORT is not set
 # CONFIG_SPL_DM_CRYPTO is not set
-CONFIG_SPL_FDT_ADDR=0x2600000
+CONFIG_SPL_EFI_PARTITION=y
+CONFIG_SPL_FIT_IMAGE_KB=320
 # CONFIG_SPL_HASH_SUPPORT is not set
-CONFIG_SPL_KERNEL_ADDR=0x608000
 CONFIG_SPL_KERNEL_BOOT=y
-CONFIG_SPL_KERNEL_COMPRESS_ADDR=0x4800000
-CONFIG_SPL_KERNEL_DECOM_LIMIT_SIZE=0x1ff8000
-# CONFIG_SPL_LIBDISK_SUPPORT is not set
-CONFIG_SPL_LOAD_RKFW=y
-# CONFIG_SPL_MMC_SUPPORT is not set
-# CONFIG_SPL_NAND_SUPPORT is not set
-CONFIG_SPL_RAMDISK_ADDR=0x2800000
-CONFIG_SPL_RAMDISK_COMPRESS_ADDR=0x5800000
-CONFIG_SPL_RAMDISK_DECOM_LIMIT_SIZE=0x3000000
-CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
 # CONFIG_SPL_ROCKCHIP_SECURE_OTP_V2 is not set
-CONFIG_SPL_SYS_MALLOC_F_LEN=0xc000
 CONFIG_SYS_MALLOC_F_LEN=0xc000
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x4000
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
-CONFIG_TEST_ROCKCHIP=y
+# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION is not set
 CONFIG_TPL_SYS_MALLOC_F_LEN=0xc000
 CONFIG_TRUST_INI="RV1126TOS_TB.ini"
-# CONFIG_VIDEO_BRIDGE is not set
-# CONFIG_VIDEO is not set

commit e336ce4ee5ef2987a9bbe744a80e85c309b2dceb
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Thu Aug 13 20:02:24 2020 +0800

    mtd: spinand: Add foresee devices
    
    Change-Id: I115ea19030edc2e83e877621f055555b481f98db
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/Makefile b/drivers/mtd/nand/spi/Makefile
index 9c670f5dee..0f7fbf6aac 100644
--- a/drivers/mtd/nand/spi/Makefile
+++ b/drivers/mtd/nand/spi/Makefile
@@ -1,4 +1,4 @@
 # SPDX-License-Identifier: GPL-2.0
 
-spinand-objs := core.o gigadevice.o macronix.o micron.o toshiba.o winbond.o dosilicon.o esmt.o xtx.o hyf.o fmsh.o
+spinand-objs := core.o gigadevice.o macronix.o micron.o toshiba.o winbond.o dosilicon.o esmt.o xtx.o hyf.o fmsh.o foresee.o
 obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index ca6c54c1af..82b1e76b10 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -825,6 +825,7 @@ static const struct spinand_manufacturer *spinand_manufacturers[] = {
 	&xtx_spinand_manufacturer,
 	&hyf_spinand_manufacturer,
 	&fmsh_spinand_manufacturer,
+	&foresee_spinand_manufacturer,
 };
 
 static int spinand_manufacturer_detect(struct spinand_device *spinand)
diff --git a/drivers/mtd/nand/spi/foresee.c b/drivers/mtd/nand/spi/foresee.c
new file mode 100644
index 0000000000..7ddce73a1a
--- /dev/null
+++ b/drivers/mtd/nand/spi/foresee.c
@@ -0,0 +1,113 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2020 Grandstream Networks, Inc
+ *
+ * Authors:
+ *	Carl <xjxia@grandstream.cn>
+ */
+
+#ifndef __UBOOT__
+#include <linux/device.h>
+#include <linux/kernel.h>
+#endif
+#include <linux/mtd/spinand.h>
+
+#define SPINAND_MFR_FORESEE		0xCD
+
+static SPINAND_OP_VARIANTS(read_cache_variants,
+		SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
+
+static SPINAND_OP_VARIANTS(write_cache_variants,
+		SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
+		SPINAND_PROG_LOAD(true, 0, NULL, 0));
+
+static SPINAND_OP_VARIANTS(update_cache_variants,
+		SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
+		SPINAND_PROG_LOAD(false, 0, NULL, 0));
+
+static int fsxxndxxg_ooblayout_ecc(struct mtd_info *mtd, int section,
+				   struct mtd_oob_region *region)
+{
+	if (section)
+		return -ERANGE;
+
+	region->offset = 64;
+	region->length = 64;
+
+	return 0;
+}
+
+static int fsxxndxxg_ooblayout_free(struct mtd_info *mtd, int section,
+				    struct mtd_oob_region *region)
+{
+	if (section)
+		return -ERANGE;
+
+	/* Reserve 1 bytes for the BBM. */
+	region->offset = 1;
+	region->length = 63;
+
+	return 0;
+}
+
+static const struct mtd_ooblayout_ops fsxxndxxg_ooblayout = {
+	.ecc = fsxxndxxg_ooblayout_ecc,
+	.rfree = fsxxndxxg_ooblayout_free,
+};
+
+static const struct spinand_info foresee_spinand_table[] = {
+	SPINAND_INFO("FS35ND01G-S1Y2", 0xEA,
+		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
+		     NAND_ECCREQ(4, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     0,
+		     SPINAND_ECCINFO(&fsxxndxxg_ooblayout, NULL)),
+};
+
+/**
+ * foresee_spinand_detect - initialize device related part in spinand_device
+ * struct if it is a foresee device.
+ * @spinand: SPI NAND device structure
+ */
+static int foresee_spinand_detect(struct spinand_device *spinand)
+{
+	u8 *id = spinand->id.data;
+	int ret;
+
+	/*
+	 * foresee SPI NAND read ID need a dummy byte,
+	 * so the first byte in raw_id is dummy.
+	 */
+	if (id[1] != SPINAND_MFR_FORESEE)
+		return 0;
+
+	ret = spinand_match_and_init(spinand, foresee_spinand_table,
+				     ARRAY_SIZE(foresee_spinand_table), id[2]);
+	if (ret)
+		return ret;
+
+	return 1;
+}
+
+static int foresee_spinand_init(struct spinand_device *spinand)
+{
+	return 0;
+}
+
+static const struct spinand_manufacturer_ops foresee_spinand_manuf_ops = {
+	.detect = foresee_spinand_detect,
+	.init = foresee_spinand_init,
+};
+
+const struct spinand_manufacturer foresee_spinand_manufacturer = {
+	.id = SPINAND_MFR_FORESEE,
+	.name = "foresee",
+	.ops = &foresee_spinand_manuf_ops,
+};
diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
index 4ef6778249..7050d90a1c 100644
--- a/include/linux/mtd/spinand.h
+++ b/include/linux/mtd/spinand.h
@@ -211,6 +211,7 @@ extern const struct spinand_manufacturer esmt_spinand_manufacturer;
 extern const struct spinand_manufacturer xtx_spinand_manufacturer;
 extern const struct spinand_manufacturer hyf_spinand_manufacturer;
 extern const struct spinand_manufacturer fmsh_spinand_manufacturer;
+extern const struct spinand_manufacturer foresee_spinand_manufacturer;
 
 /**
  * struct spinand_op_variants - SPI NAND operation variants

commit 5d4ebb14fc7bcb3f37fe7ba201c0670a6d56dc8b
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Nov 25 10:37:09 2020 +0800

    spl: modify the spl log
    
    Correct the log when bring up kernel with spl directly.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ic3204d8ddab37c3a5aac3488e209b3764e96a977

diff --git a/common/spl/spl.c b/common/spl/spl.c
index 5cfc1b445c..07a6d3f1f0 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -563,7 +563,9 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 		break;
 #if CONFIG_IS_ENABLED(ATF)
 	case IH_OS_ARM_TRUSTED_FIRMWARE:
-		printf("Jumping to U-Boot(0x%08lx) via ARM Trusted Firmware(0x%08lx)\n",
+		printf("Jumping to %s(0x%08lx) via ARM Trusted Firmware(0x%08lx)\n",
+		       spl_image.next_stage == SPL_NEXT_STAGE_UBOOT ? "U-Boot" :
+		       (spl_image.next_stage == SPL_NEXT_STAGE_KERNEL ? "Kernel" : "Unknown"),
 		       (ulong)spl_image.entry_point_bl33,
 		       (ulong)spl_image.entry_point);
 		spl_invoke_atf(&spl_image);
@@ -571,7 +573,9 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 #endif
 #if CONFIG_IS_ENABLED(OPTEE)
 	case IH_OS_OP_TEE:
-		printf("Jumping to U-Boot(0x%08lx) via OP-TEE(0x%08lx)\n",
+		printf("Jumping to %s(0x%08lx) via OP-TEE(0x%08lx)\n",
+		       spl_image.next_stage == SPL_NEXT_STAGE_UBOOT ? "U-Boot" :
+		       (spl_image.next_stage == SPL_NEXT_STAGE_KERNEL ? "Kernel" : "Unknown"),
 		       (ulong)spl_image.entry_point_os,
 		       (ulong)spl_image.entry_point);
 		spl_cleanup_before_jump(&spl_image);

commit 0838e4e69d5858be0f01d328f35f21ecfefa5636
Author: Sugar Zhang <sugar.zhang@rock-chips.com>
Date:   Wed Nov 25 11:24:06 2020 +0800

    rockchip: rv1126: Fix ram boot fail
    
    The OTP_S access is not allowed from the non-secure world.
    so, remove it for ramboot which have already done in trust.
    
    ram boot flow:
    
    usb boot -> trust/op-tee -> uboot -> kernel -> rootfs
    
    normal boot flow:
    
    spl boot -> trust/op-tee -> uboot -> kernel -> rootfs
    
    Fixes: 1ac424cf0325 ("rockchip: rv1126: Increase otp tRWH timing for stable read")
    Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
    Change-Id: I76ef84cb79ca29837cae01120296523804a75ff8

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126.c b/arch/arm/mach-rockchip/rv1126/rv1126.c
index a5627017b5..54b7196b6b 100644
--- a/arch/arm/mach-rockchip/rv1126/rv1126.c
+++ b/arch/arm/mach-rockchip/rv1126/rv1126.c
@@ -552,11 +552,11 @@ int arch_cpu_init(void)
 		writel(WDT_RESET_SRC_CLR, PMUGRF_RSTFUNC_CLR);
 	}
 
+#ifdef CONFIG_SPL_BUILD
 	/* set otp tRWH to 0x9 for stable read */
 	writel(0x9, OTP_NS_BASE + OTP_NVM_TRWH);
 	writel(0x9, OTP_S_BASE + OTP_NVM_TRWH);
 
-#ifdef CONFIG_SPL_BUILD
 	/*
 	 * Just set region 0 to unsecure.
 	 * (Note: only secure-world can access this register)

commit 65bd598f415b92d2165e52a757e70f85352eba25
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Nov 17 11:35:01 2020 +0800

    clk: rockchip: rk3568: set the ACLK_BUS to 150MHz in spl
    
    Since the mcu uses the ACLK_BUS clock and 150MHz is need as
    default clock rate.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I60c4603fa0c0b45667c6583992ea461fed18fcf5

diff --git a/drivers/clk/rockchip/clk_rk3568.c b/drivers/clk/rockchip/clk_rk3568.c
index e5c5a9ce45..effc6eeaad 100644
--- a/drivers/clk/rockchip/clk_rk3568.c
+++ b/drivers/clk/rockchip/clk_rk3568.c
@@ -2525,6 +2525,12 @@ static void rk3568_clk_init(struct rk3568_clk_priv *priv)
 			priv->gpll_hz = GPLL_HZ;
 	}
 
+#ifdef CONFIG_SPL_BUILD
+	ret = rk3568_bus_set_clk(priv, ACLK_BUS, 150000000);
+	if (ret)
+		printf("Fail to set the ACLK_BUS clock.\n");
+#endif
+
 	priv->ppll_hz = rk3568_pmu_pll_get_rate(priv, PPLL);
 	priv->hpll_hz = rk3568_pmu_pll_get_rate(priv, HPLL);
 }

commit 4623d13df7ba830d8f4a3fa119b1803ac15ec4a1
Author: Weiwen Chen <cww@rock-chips.com>
Date:   Tue Nov 24 15:16:00 2020 +0800

    spl: Kconfig: update SPL_KERNEL_BOOT_SECTOR depend on
    
    Signed-off-by: Weiwen Chen <cww@rock-chips.com>
    Change-Id: I0284e105960dd58690c779903c227c371a4611fc

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 8f2ff1a0d9..bc06b507c6 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -858,6 +858,7 @@ config SPL_KERNEL_BOOT
 config SPL_KERNEL_BOOT_SECTOR
 	hex "Sector address to load kernel in SPL"
 	depends on SPL_KERNEL_BOOT
+	depends on !SPL_LIBDISK_SUPPORT
 	default 0xa000
 
 if SPL_LOAD_RKFW

commit d3ae17134807e3395a4309e7796dfa6540ae7389
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Nov 24 16:02:59 2020 +0800

    configs: rk3568: use hardware crypto for SHA/RSA
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I92f802e3bf01d652d3376e8e75f569a69ec34b58

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index 7a6cf3cb84..cf741139f1 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -19,7 +19,9 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3568-evb"
 CONFIG_SMBIOS_PRODUCT_NAME=""
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
+CONFIG_FIT_HW_CRYPTO=y
 CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_HW_CRYPTO=y
 # CONFIG_SPL_SYS_DCACHE_OFF is not set
 CONFIG_BOOTDELAY=0
 CONFIG_CONSOLE_MUX=y
@@ -81,7 +83,9 @@ CONFIG_SPL_SYSCON=y
 CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_DM_CRYPTO=y
+CONFIG_SPL_DM_CRYPTO=y
 CONFIG_ROCKCHIP_CRYPTO_V2=y
+CONFIG_SPL_ROCKCHIP_CRYPTO_V2=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_ROCKCHIP_GPIO_V2=y
 CONFIG_SYS_I2C_ROCKCHIP=y
@@ -115,10 +119,10 @@ CONFIG_PHYLIB=y
 CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
-CONFIG_IO_DOMAIN=y
-CONFIG_ROCKCHIP_IO_DOMAIN=y
 CONFIG_DM_FUEL_GAUGE=y
 CONFIG_POWER_FG_RK817=y
+CONFIG_IO_DOMAIN=y
+CONFIG_ROCKCHIP_IO_DOMAIN=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y
@@ -158,7 +162,6 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x2207
 CONFIG_USB_GADGET_PRODUCT_NUM=0x350a
 CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_DISPLAY=y
-CONFIG_I2C_EDID=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_LIB_RAND=y
 CONFIG_SPL_TINY_MEMSET=y

commit 00fa57d80dc4f71594ebc7c14e714885f7064951
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Tue Nov 24 10:50:10 2020 +0800

    driver: crypto: mask CRYPTO_SYNC_LOCKSTEP_INT_ST flag
    
    This flag maybe abnormal trigger.
    
    Change-Id: Id398d1e8636c28b8cc42d950cafa5e2731a41b62
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/drivers/crypto/rockchip/crypto_v2.c b/drivers/crypto/rockchip/crypto_v2.c
index 0cf76627bc..aef4de95bd 100644
--- a/drivers/crypto/rockchip/crypto_v2.c
+++ b/drivers/crypto/rockchip/crypto_v2.c
@@ -233,7 +233,7 @@ static int rk_hash_direct_calc(void *hw_data, const u8 *data,
 	struct rk_hash_ctx *hash_ctx = priv->hw_ctx;
 	struct crypto_lli_desc *lli = &hash_ctx->data_lli;
 	int ret = -EINVAL;
-	u32 tmp = 0;
+	u32 tmp = 0, mask = 0;
 
 	assert(IS_ALIGNED((ulong)data, DATA_ADDR_ALIGIN_SIZE));
 	assert(is_last || IS_ALIGNED(data_len, DATA_LEN_ALIGIN_SIZE));
@@ -274,8 +274,11 @@ static int rk_hash_direct_calc(void *hw_data, const u8 *data,
 	crypto_write(tmp << CRYPTO_WRITE_MASK_SHIFT | tmp,
 		     CRYPTO_DMA_CTL);
 
+	/* mask CRYPTO_SYNC_LOCKSTEP_INT_ST flag */
+	mask = ~(mask | CRYPTO_SYNC_LOCKSTEP_INT_ST);
+
 	/* wait calc ok */
-	RK_WHILE_TIME_OUT(!crypto_read(CRYPTO_DMA_INT_ST),
+	RK_WHILE_TIME_OUT(!(crypto_read(CRYPTO_DMA_INT_ST) & mask),
 			  RK_CRYPTO_TIME_OUT, ret);
 
 	/* clear interrupt status */
diff --git a/include/rockchip/crypto_v2.h b/include/rockchip/crypto_v2.h
index f1e18beaa1..e17e6625b9 100644
--- a/include/rockchip/crypto_v2.h
+++ b/include/rockchip/crypto_v2.h
@@ -81,6 +81,8 @@ enum rk_hash_algo {
 
 /* Crypto DMA control registers*/
 #define	CRYPTO_DMA_INT_EN		0x0008
+#define	CRYPTO_NOSYNC_LOCKSTEP_INT_EN	_BIT(8)
+#define	CRYPTO_SYNC_LOCKSTEP_INT_EN	_BIT(7)
 #define	CRYPTO_ZERO_ERR_INT_EN		_BIT(6)
 #define	CRYPTO_LIST_ERR_INT_EN		_BIT(5)
 #define	CRYPTO_SRC_ERR_INT_EN		_BIT(4)
@@ -90,6 +92,7 @@ enum rk_hash_algo {
 #define	CRYPTO_LIST_DONE_INT_EN		_BIT(0)
 
 #define	CRYPTO_DMA_INT_ST		0x000C
+#define	CRYPTO_SYNC_LOCKSTEP_INT_ST	_BIT(7)
 #define	CRYPTO_ZERO_LEN_INT_ST		_BIT(6)
 #define	CRYPTO_LIST_ERR_INT_ST		_BIT(5)
 #define	CRYPTO_SRC_ERR_INT_ST		_BIT(4)

commit 94d677da26ce98dcfab43031083ff5df70db9ddc
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Thu Nov 12 17:05:58 2020 +0800

    rockchip: dts: rk3568: add and enable crypto node
    
    Change-Id: I1ca3dc64c23663a5b30fc369f287f391d17ca3f3
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/arch/arm/dts/rk3568-evb.dts b/arch/arm/dts/rk3568-evb.dts
index 87f672532d..03c9b31168 100644
--- a/arch/arm/dts/rk3568-evb.dts
+++ b/arch/arm/dts/rk3568-evb.dts
@@ -30,6 +30,10 @@
 	};
 };
 
+&crypto {
+	status = "okay";
+};
+
 &uart2 {
 	status = "okay";
 };
diff --git a/arch/arm/dts/rk3568-u-boot.dtsi b/arch/arm/dts/rk3568-u-boot.dtsi
index 2f12b7d856..001ea635b0 100644
--- a/arch/arm/dts/rk3568-u-boot.dtsi
+++ b/arch/arm/dts/rk3568-u-boot.dtsi
@@ -17,6 +17,10 @@
 	};
 };
 
+&crypto {
+	u-boot,dm-pre-reloc;
+};
+
 &uart2 {
 	clock-frequency = <24000000>;
 	u-boot,dm-spl;
diff --git a/arch/arm/dts/rk3568.dtsi b/arch/arm/dts/rk3568.dtsi
index 3b4a7b62e5..d7551cac8c 100644
--- a/arch/arm/dts/rk3568.dtsi
+++ b/arch/arm/dts/rk3568.dtsi
@@ -1870,6 +1870,15 @@
 		status = "disabled";
 	};
 
+	crypto: crypto@fe380000 {
+		compatible = "rockchip,rk3568-crypto";
+		reg = <0x0 0xfe380000 0x0 0x4000>;
+		clocks = <&cru CLK_CRYPTO_NS_CORE>, <&cru CLK_CRYPTO_NS_PKA>;
+		clock-names = "sclk_crypto", "apkclk_crypto";
+		clock-frequency = <150000000>, <300000000>;
+		status = "disabled";
+	};
+
 	i2s0_8ch: i2s@fe400000 {
 		compatible = "rockchip,rk3568-i2s-tdm";
 		reg = <0x0 0xfe400000 0x0 0x1000>;

commit 1d1195dd873295d785452ea0529842621559c352
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Thu Nov 12 16:57:45 2020 +0800

    configs: rk3568: enable crypto v2
    
    enable CONFIG_DM_CRYPTO
    enable CONFIG_ROCKCHIP_CRYPTO_V2
    
    Change-Id: I02be1839a60134bfc319fd695f5f878614b2e722
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index 2e606a12d4..7a6cf3cb84 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -80,6 +80,8 @@ CONFIG_SYSCON=y
 CONFIG_SPL_SYSCON=y
 CONFIG_CLK=y
 CONFIG_SPL_CLK=y
+CONFIG_DM_CRYPTO=y
+CONFIG_ROCKCHIP_CRYPTO_V2=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_ROCKCHIP_GPIO_V2=y
 CONFIG_SYS_I2C_ROCKCHIP=y

commit 7eea1823419f61e0c029a8cf7126101f5c6a0a1b
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Thu Nov 12 15:12:18 2020 +0800

    crypto: rockchip: support rk3568 without hwrng in crypto
    
    Change-Id: I557a05e0336fe6b80d903a48a2d088f165a4eeca
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/drivers/crypto/rockchip/crypto_v2.c b/drivers/crypto/rockchip/crypto_v2.c
index 973ea33074..0cf76627bc 100644
--- a/drivers/crypto/rockchip/crypto_v2.c
+++ b/drivers/crypto/rockchip/crypto_v2.c
@@ -87,6 +87,19 @@ typedef u32 paddr_t;
 
 fdt_addr_t crypto_base;
 
+static int hw_check_trng_exist(void)
+{
+	u32 tmp = 0, val = 0;
+
+	tmp = crypto_read(CRYPTO_RNG_SAMPLE_CNT);
+	crypto_write(50, CRYPTO_RNG_SAMPLE_CNT);
+
+	val = crypto_read(CRYPTO_RNG_SAMPLE_CNT);
+	crypto_write(tmp, CRYPTO_RNG_SAMPLE_CNT);
+
+	return val;
+}
+
 static void word2byte(u32 word, u8 *ch, u32 endian)
 {
 	/* 0: Big-Endian 1: Little-Endian */
@@ -383,7 +396,9 @@ static int rk_trng(u8 *trng, u32 len)
 
 static u32 rockchip_crypto_capability(struct udevice *dev)
 {
-	return CRYPTO_MD5 |
+	u32 val = 0;
+
+	val =  CRYPTO_MD5 |
 	       CRYPTO_SHA1 |
 	       CRYPTO_SHA256 |
 #if !defined(CONFIG_ROCKCHIP_RK1808)
@@ -393,8 +408,12 @@ static u32 rockchip_crypto_capability(struct udevice *dev)
 	       CRYPTO_RSA1024 |
 	       CRYPTO_RSA2048 |
 	       CRYPTO_RSA3072 |
-	       CRYPTO_RSA4096 |
-	       CRYPTO_TRNG;
+	       CRYPTO_RSA4096;
+
+	if (hw_check_trng_exist())
+		val |= CRYPTO_TRNG;
+
+	return val;
 }
 
 static int rockchip_crypto_sha_init(struct udevice *dev, sha_context *ctx)
@@ -670,6 +689,7 @@ static const struct udevice_id rockchip_crypto_ids[] = {
 	{ .compatible = "rockchip,rk1808-crypto" },
 	{ .compatible = "rockchip,rk3308-crypto" },
 	{ .compatible = "rockchip,rv1126-crypto" },
+	{ .compatible = "rockchip,rk3568-crypto" },
 	{ }
 };
 

commit c7955c9b040edf79d686ca4ad03107415537d0f8
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Thu Nov 12 14:54:21 2020 +0800

    cmd: crypto: trng: deal with some device without hwrng in crypto
    
    some platform hardware rng module is no longer belongs to crypto module
    such as rk3566/rk3568.
    
    Change-Id: I500ff110fc7ef2361024c4d9d39c8f89cb92f3f0
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/cmd/crypto.c b/cmd/crypto.c
index f99d015208..9ccc412883 100644
--- a/cmd/crypto.c
+++ b/cmd/crypto.c
@@ -295,7 +295,7 @@ static int do_crypto(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 #if !defined(CONFIG_ROCKCHIP_RK1808)
 	      CRYPTO_SHA512 |
 #endif
-	      CRYPTO_RSA2048 | CRYPTO_TRNG;
+	      CRYPTO_RSA2048;
 #endif
 	dev = crypto_get_device(cap);
 	if (!dev) {
@@ -386,11 +386,14 @@ static int do_crypto(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	}
 #endif
 
-	/* TRNG */
-	if (cap & CRYPTO_TRNG) {
+	dev = crypto_get_device(CRYPTO_TRNG);
+	if (dev) {
 		memset(hard_out, 0x00, sizeof(hard_out));
 		crypto_get_trng(dev, hard_out, sizeof(hard_out));
 		dump_hex("TRNG", hard_out, sizeof(hard_out));
+
+	} else {
+		printf("Can't find crypto device for CRYPTO_TRNG\n");
 	}
 
 	return 0;

commit a9e6d1e54472544a03b81a3ece738c0474dbe497
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Nov 23 17:18:20 2020 +0800

    spl: mtd_blk: redefine the mtd device name
    
    Redefine the mtd device name according to the defination in
    file blk.h:
    
    BLK_MTD_NAND            0
    BLK_MTD_SPI_NAND        1
    BLK_MTD_SPI_NOR         2
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I75df9f0405d351c61929ff65781bfd4a26f2a1a4

diff --git a/common/spl/spl_mtd_blk.c b/common/spl/spl_mtd_blk.c
index ba8dd33572..1c69252f7a 100644
--- a/common/spl/spl_mtd_blk.c
+++ b/common/spl/spl_mtd_blk.c
@@ -159,6 +159,6 @@ int spl_mtd_load_image(struct spl_image_info *spl_image,
 	return ret;
 }
 
-SPL_LOAD_IMAGE_METHOD("MTD1", 0, BOOT_DEVICE_MTD_BLK_NAND, spl_mtd_load_image);
-SPL_LOAD_IMAGE_METHOD("MTD2", 0, BOOT_DEVICE_MTD_BLK_SPI_NAND, spl_mtd_load_image);
-SPL_LOAD_IMAGE_METHOD("MTD3", 0, BOOT_DEVICE_MTD_BLK_SPI_NOR, spl_mtd_load_image);
+SPL_LOAD_IMAGE_METHOD("MTD0", 0, BOOT_DEVICE_MTD_BLK_NAND, spl_mtd_load_image);
+SPL_LOAD_IMAGE_METHOD("MTD1", 0, BOOT_DEVICE_MTD_BLK_SPI_NAND, spl_mtd_load_image);
+SPL_LOAD_IMAGE_METHOD("MTD2", 0, BOOT_DEVICE_MTD_BLK_SPI_NOR, spl_mtd_load_image);

commit 7ef28ab639fc3d71d45d7331fb84802c31fa976a
Author: David Wu <david.wu@rock-chips.com>
Date:   Mon Nov 9 15:52:21 2020 +0800

    i2c: rockchip: Clean ipd status if i2c transfer error
    
    If there was an i2c transfer error like iomux error,
    should clean the ipd status, it might cause kernel i2c
    irq error handing.
    
    [    0.690749] rk3x-i2c fdd40000.i2c: irq in STATE_IDLE, ipd = 0x10
    
    Change-Id: Ia127edada535288e9b984d6dc0dff813e6152eff
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/i2c/rk_i2c.c b/drivers/i2c/rk_i2c.c
index 612c007271..1631bd1340 100644
--- a/drivers/i2c/rk_i2c.c
+++ b/drivers/i2c/rk_i2c.c
@@ -148,6 +148,8 @@ static int rk_i2c_send_stop_bit(struct rk_i2c *i2c)
 
 static inline void rk_i2c_disable(struct rk_i2c *i2c)
 {
+	writel(0, &i2c->regs->ien);
+	writel(I2C_IPD_ALL_CLEAN, &i2c->regs->ipd);
 	writel(0, &i2c->regs->con);
 }
 

commit 8d0f4dce8f08dffbb18eb78b9468563cfc402fbf
Author: Mark Huang <huangjc@rock-chips.com>
Date:   Mon Nov 23 19:34:05 2020 +0800

    configs: rv1126-ab.config: no bootdelay to save boot time
    
    Change-Id: Ib3db29eafa1d81360c15f94f0b9264c64d8b56cc
    Signed-off-by: Mark Huang <huangjc@rock-chips.com>

diff --git a/configs/rv1126-ab.config b/configs/rv1126-ab.config
index e23ccf00b7..100ddbe3ba 100644
--- a/configs/rv1126-ab.config
+++ b/configs/rv1126-ab.config
@@ -5,7 +5,7 @@ CONFIG_AVB_LIBAVB_USER=y
 CONFIG_AVB_LIBAVB=y
 # CONFIG_AVB_VBMETA_PUBLIC_KEY_VALIDATE is not set
 CONFIG_BASE_DEFCONFIG="rv1126_defconfig"
-CONFIG_BOOTDELAY=1
+CONFIG_BOOTDELAY=0
 # CONFIG_CMD_ANDROID_AB_SELECT is not set
 CONFIG_RK_AVB_LIBAVB_USER=y
 # CONFIG_ROCKCHIP_PRELOADER_PUB_KEY is not set

commit e6cf5feaac2d19cfd8afd0f7c06a8dd0c73a3a28
Author: Shunqing Chen <csq@rock-chips.com>
Date:   Fri Nov 20 16:17:14 2020 +0800

    configs: rk3568: enable uboot charge
    
    Signed-off-by: Shunqing Chen <csq@rock-chips.com>
    Change-Id: I571541f315d689286d9caaa6fda19491702101ea

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index 49bb5d76bc..2e606a12d4 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -84,6 +84,7 @@ CONFIG_ROCKCHIP_GPIO=y
 CONFIG_ROCKCHIP_GPIO_V2=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y
+CONFIG_RK8XX_PWRKEY=y
 CONFIG_ADC_KEY=y
 CONFIG_MISC=y
 CONFIG_MMC_DW=y
@@ -114,12 +115,15 @@ CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_IO_DOMAIN=y
 CONFIG_ROCKCHIP_IO_DOMAIN=y
+CONFIG_DM_FUEL_GAUGE=y
+CONFIG_POWER_FG_RK817=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_REGULATOR_RK8XX=y
 CONFIG_DM_CHARGE_DISPLAY=y
+CONFIG_CHARGE_ANIMATION=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
@@ -151,6 +155,7 @@ CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
 CONFIG_USB_GADGET_VENDOR_NUM=0x2207
 CONFIG_USB_GADGET_PRODUCT_NUM=0x350a
 CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_DISPLAY=y
 CONFIG_I2C_EDID=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_LIB_RAND=y

commit 757632eec4beb3cd1de89f97fdee304abfdff965
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 11 08:31:30 2020 +0000

    rockchip: rk3568: enable GICV3
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I98e121cf4300631c04793c73e7af3bef1f1009d9

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index cc28c0bbd9..88628cb435 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -384,6 +384,7 @@ endif
 config ROCKCHIP_RK3568
 	bool "Support Rockchip RK3568"
 	select ARM64
+	select GICV3
 	select SPL
 	select SUPPORT_TPL
 	select SUPPORT_SPL

commit 2c36608a71d3520a0ee9917c82efb941098aa871
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Fri Nov 20 17:59:26 2020 +0800

    rockchip: rk3568: init core pvtpll ring length
    
    Change-Id: I2a7957ce1c2b38dec984c6b4f36392f92c185190
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c
index 695c8afa83..e1a1a2b15f 100644
--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
@@ -31,6 +31,9 @@ DECLARE_GLOBAL_DATA_PTR;
 #define SGRF_BASE		0xFDD18000
 #define SGRF_SOC_CON4		0x10
 
+#define CPU_GRF_BASE		0xfdc30000
+#define GRF_CORE_PVTPLL_CON0	(0x10)
+
 enum {
 	/* PMU_GRF_GPIO0C_IOMUX_L */
 	GPIO0C1_SHIFT		= 4,
@@ -745,6 +748,9 @@ int arch_cpu_init(void)
 	/* Disable eDP phy by default */
 	writel(0x00070007, EDP_PHY_GRF_CON10);
 	writel(0x0ff10ff1, EDP_PHY_GRF_CON0);
+
+	/* Set core pvtpll ring length */
+	writel(0x00ff002b, CPU_GRF_BASE + GRF_CORE_PVTPLL_CON0);
 #endif
 
 	return 0;

commit 666b2d1f244aa4569b3b7b7c6a8d606c20bcb3d9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Nov 20 21:10:47 2020 +0800

    rockchip: boot-mode: clean up rockchip_get_boot_mode()
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I4a11fa846a8fd74ecffe1ee0ac46ebdeaa2413a7

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index af35a70a46..a615d9086b 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -12,42 +12,62 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-/*
- * Generally, we have 3 ways to get reboot mode:
- *
- * 1. from bootloader_message which is defined in MISC partition;
- * 2. from CONFIG_ROCKCHIP_BOOT_MODE_REG which supports "reboot xxx" commands;
- * 3. from env "reboot_mode" which is added by U-Boot code(currently only when
- *    recovery key pressed);
- *
- * 1st and 2nd cases are static determined at system start and we check it once,
- * while 3th case is dynamically added by U-Boot code, so we have to check it
- * everytime.
- *
- * Recovery mode from:
- *	- MISC partition;
- *	- "reboot recovery" command;
- *	- recovery key pressed without usb attach;
- */
-
 enum {
 	PH = 0,	/* P: Priority, H: high, M: middle, L: low*/
 	PM,
 	PL,
 };
 
-int rockchip_get_boot_mode(void)
+static int misc_require_recovery(u32 bcb_offset)
 {
-	struct bootloader_message *bmsg = NULL;
+	struct bootloader_message *bmsg;
 	struct blk_desc *dev_desc;
-	disk_partition_t part_info;
-	uint32_t reg_boot_mode;
-	char *env_reboot_mode;
+	disk_partition_t part;
+	int cnt, recovery = 0;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("dev_desc is NULL!\n");
+		goto out;
+	}
+
+	if (part_get_info_by_name(dev_desc, PART_MISC, &part) < 0) {
+		printf("No misc partition\n");
+		goto out;
+	}
+
+	cnt = DIV_ROUND_UP(sizeof(struct bootloader_message), dev_desc->blksz);
+	bmsg = memalign(ARCH_DMA_MINALIGN, cnt * dev_desc->blksz);
+	if (blk_dread(dev_desc, part.start + bcb_offset, cnt, bmsg) != cnt)
+		recovery = 0;
+	else
+		recovery = !strcmp(bmsg->command, "boot-recovery");
+
+	free(bmsg);
+out:
+	return recovery;
+}
+
+/*
+ * There are three ways to get reboot-mode:
+ *
+ * No1. Android BCB which is defined in misc.img (0KB or 16KB offset)
+ * No2. CONFIG_ROCKCHIP_BOOT_MODE_REG that supports "reboot xxx" commands
+ * No3. Env variable "reboot_mode" which is added by U-Boot
+ *
+ * Recovery mode from:
+ *	- Android BCB in misc.img
+ *	- "reboot recovery" command
+ *	- recovery key pressed without usb attach
+ */
+int rockchip_get_boot_mode(void)
+{
 	static int boot_mode[] =		/* static */
 		{ -EINVAL, -EINVAL, -EINVAL };
 	static int bcb_offset = -EINVAL;	/* static */
+	uint32_t reg_boot_mode;
+	char *env_reboot_mode;
 	int clear_boot_reg = 0;
-	int ret, cnt;
 #ifdef CONFIG_ANDROID_BOOT_IMAGE
 	u32 offset = android_bcb_msg_sector_offset();
 #else
@@ -55,9 +75,7 @@ int rockchip_get_boot_mode(void)
 #endif
 
 	/*
-	 * Here, we mainly check for:
-	 * In rockusb_download(), that recovery key is pressed without
-	 * USB attach will do env_set("reboot_mode", "recovery");
+	 * Env variable "reboot_mode" which is added by U-Boot, reading ever time.
 	 */
 	env_reboot_mode = env_get("reboot_mode");
 	if (env_reboot_mode) {
@@ -77,23 +95,20 @@ int rockchip_get_boot_mode(void)
 	}
 
 	/*
-	 * Special handle:
-	 *    Once the BCB offset changes, reinitalize "boot_mode".
+	 * Android BCB special handle:
+	 *    Once the Android BCB offset changed, reinitalize "boot_mode[PM]".
 	 *
 	 * Background:
-	 *    1. there are two Android BCB at the 0x00 and 0x20 offset in
-	 *       misc.img to compatible legacy(0x20) SDK.
-	 *    2. android_bcb_msg_sector_offset() is for android image:
-	 *       return 0x20 if image version < 10, otherwise 0x00.
-	 *    3. If not android image, BCB at 0x20 is the valid one.
+	 *    1. there are two Android BCB at the 0KB(google) and 16KB(rk)
+	 *       offset in misc.img
+	 *    2. Android image: return 0KB offset if image version >= 10,
+	 *	 otherwise 16KB
+	 *    3. Not Android image: return 16KB offset, eg: FIT image.
 	 *
-	 * U-Boot can support booting both FIT & Android image, if FIT
-	 * boot flow enters here early than Android, the "boot_mode" is
-	 * set as BOOT_MODE_RECOVERY according to BCB at 0x20 offset.
-	 * After that, this function always return static variable "boot_mode"
-	 * as BOOT_MODE_RECOVERY even android(>=10) boot flow enter here.
+	 * To handle the cases of 16KB and 0KB, we reinitial boot_mode[PM] once
+	 * Android BCB is changed.
 	 *
-	 * PH and PL is from boot mode register, reading once.
+	 * PH and PL is from boot mode register and reading once.
 	 * PM is from misc.img and should be updated if BCB offset is changed.
 	 * Return the boot mode according to priority: PH > PM > PL.
 	 */
@@ -110,32 +125,10 @@ int rockchip_get_boot_mode(void)
 	else if (boot_mode[PL] != -EINVAL)
 		return boot_mode[PL];
 
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("dev_desc is NULL!\n");
-		return -ENODEV;
-	}
-
-	ret = part_get_info_by_name(dev_desc, PART_MISC, &part_info);
-	if (ret < 0) {
-		printf("No misc partition\n");
-		goto fallback;
-	}
-
-	cnt = DIV_ROUND_UP(sizeof(struct bootloader_message), dev_desc->blksz);
-	bmsg = memalign(ARCH_DMA_MINALIGN, cnt * dev_desc->blksz);
-	ret = blk_dread(dev_desc, part_info.start + bcb_offset, cnt, bmsg);
-	if (ret != cnt) {
-		free(bmsg);
-		return -EIO;
-	}
-
-fallback:
 	/*
 	 * Boot mode priority
 	 *
 	 * Anyway, we should set download boot mode as the highest priority, so:
-	 *
 	 * reboot loader/bootloader/fastboot > misc partition "recovery" > reboot xxx.
 	 */
 	reg_boot_mode = readl((void *)CONFIG_ROCKCHIP_BOOT_MODE_REG);
@@ -147,7 +140,7 @@ fallback:
 		printf("boot mode: bootloader\n");
 		boot_mode[PH] = BOOT_MODE_BOOTLOADER;
 		clear_boot_reg = 1;
-	} else if (bmsg && !strcmp(bmsg->command, "boot-recovery")) {
+	} else if (misc_require_recovery(bcb_offset)) {
 		printf("boot mode: recovery (misc)\n");
 		boot_mode[PM] = BOOT_MODE_RECOVERY;
 	} else {

commit ea8b124a0eccc3e61b57f2bad26c4dcfb5ec9683
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 19 17:12:31 2020 +0800

    rockchip: boot-mode: fix lost boot-mode from register
    
    PH and PL is from boot mode register, reading once.
    PM is from misc.img and should be updated if BCB offset is changed.
    Return the boot mode according to priority: PH > PM > PL.
    
    Fixes:
    (3aaa96e8af rockchip: boot-mode: reinitialize static variable "boot_mode")
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ibd577dd8ebfb0d4c36ac8b90e176d3b1103f347e

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index d31b763352..af35a70a46 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -29,6 +29,13 @@ DECLARE_GLOBAL_DATA_PTR;
  *	- "reboot recovery" command;
  *	- recovery key pressed without usb attach;
  */
+
+enum {
+	PH = 0,	/* P: Priority, H: high, M: middle, L: low*/
+	PM,
+	PL,
+};
+
 int rockchip_get_boot_mode(void)
 {
 	struct bootloader_message *bmsg = NULL;
@@ -36,8 +43,9 @@ int rockchip_get_boot_mode(void)
 	disk_partition_t part_info;
 	uint32_t reg_boot_mode;
 	char *env_reboot_mode;
-	static int boot_mode = -1;	/* static */
-	static int bcb_offset = -1;	/* static */
+	static int boot_mode[] =		/* static */
+		{ -EINVAL, -EINVAL, -EINVAL };
+	static int bcb_offset = -EINVAL;	/* static */
 	int clear_boot_reg = 0;
 	int ret, cnt;
 #ifdef CONFIG_ANDROID_BOOT_IMAGE
@@ -45,6 +53,29 @@ int rockchip_get_boot_mode(void)
 #else
 	u32 offset = BCB_MESSAGE_BLK_OFFSET;
 #endif
+
+	/*
+	 * Here, we mainly check for:
+	 * In rockusb_download(), that recovery key is pressed without
+	 * USB attach will do env_set("reboot_mode", "recovery");
+	 */
+	env_reboot_mode = env_get("reboot_mode");
+	if (env_reboot_mode) {
+		if (!strcmp(env_reboot_mode, "recovery-key")) {
+			printf("boot mode: recovery (key)\n");
+			return BOOT_MODE_RECOVERY;
+		} else if (!strcmp(env_reboot_mode, "recovery-usb")) {
+			printf("boot mode: recovery (usb)\n");
+			return BOOT_MODE_RECOVERY;
+		} else if (!strcmp(env_reboot_mode, "recovery")) {
+			printf("boot mode: recovery (env)\n");
+			return BOOT_MODE_RECOVERY;
+		} else if (!strcmp(env_reboot_mode, "fastboot")) {
+			printf("boot mode: fastboot\n");
+			return BOOT_MODE_BOOTLOADER;
+		}
+	}
+
 	/*
 	 * Special handle:
 	 *    Once the BCB offset changes, reinitalize "boot_mode".
@@ -61,36 +92,23 @@ int rockchip_get_boot_mode(void)
 	 * set as BOOT_MODE_RECOVERY according to BCB at 0x20 offset.
 	 * After that, this function always return static variable "boot_mode"
 	 * as BOOT_MODE_RECOVERY even android(>=10) boot flow enter here.
+	 *
+	 * PH and PL is from boot mode register, reading once.
+	 * PM is from misc.img and should be updated if BCB offset is changed.
+	 * Return the boot mode according to priority: PH > PM > PL.
 	 */
 	if (bcb_offset != offset) {
-		boot_mode = -1;
+		boot_mode[PM] = -EINVAL;
 		bcb_offset = offset;
 	}
 
-	/*
-	 * Here, we mainly check for:
-	 * In rockusb_download(), that recovery key is pressed without
-	 * USB attach will do env_set("reboot_mode", "recovery");
-	 */
-	env_reboot_mode = env_get("reboot_mode");
-	if (env_reboot_mode) {
-		if (!strcmp(env_reboot_mode, "recovery-key")) {
-			boot_mode = BOOT_MODE_RECOVERY;
-			printf("boot mode: recovery (key)\n");
-		} else if (!strcmp(env_reboot_mode, "recovery-usb")) {
-			boot_mode = BOOT_MODE_RECOVERY;
-			printf("boot mode: recovery (usb)\n");
-		} else if (!strcmp(env_reboot_mode, "recovery")) {
-			boot_mode = BOOT_MODE_RECOVERY;
-			printf("boot mode: recovery(env)\n");
-		} else if (!strcmp(env_reboot_mode, "fastboot")) {
-			boot_mode = BOOT_MODE_BOOTLOADER;
-			printf("boot mode: fastboot\n");
-		}
-	}
-
-	if (boot_mode != -1)
-		return boot_mode;
+	/* directly return if there is already valid mode */
+	if (boot_mode[PH] != -EINVAL)
+		return boot_mode[PH];
+	else if (boot_mode[PM] != -EINVAL)
+		return boot_mode[PM];
+	else if (boot_mode[PL] != -EINVAL)
+		return boot_mode[PL];
 
 	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {
@@ -106,9 +124,7 @@ int rockchip_get_boot_mode(void)
 
 	cnt = DIV_ROUND_UP(sizeof(struct bootloader_message), dev_desc->blksz);
 	bmsg = memalign(ARCH_DMA_MINALIGN, cnt * dev_desc->blksz);
-	ret = blk_dread(dev_desc,
-			part_info.start + bcb_offset,
-			cnt, bmsg);
+	ret = blk_dread(dev_desc, part_info.start + bcb_offset, cnt, bmsg);
 	if (ret != cnt) {
 		free(bmsg);
 		return -EIO;
@@ -125,49 +141,48 @@ fallback:
 	reg_boot_mode = readl((void *)CONFIG_ROCKCHIP_BOOT_MODE_REG);
 	if (reg_boot_mode == BOOT_LOADER) {
 		printf("boot mode: loader\n");
-		boot_mode = BOOT_MODE_LOADER;
+		boot_mode[PH] = BOOT_MODE_LOADER;
 		clear_boot_reg = 1;
 	} else if (reg_boot_mode == BOOT_FASTBOOT) {
 		printf("boot mode: bootloader\n");
-		boot_mode = BOOT_MODE_BOOTLOADER;
+		boot_mode[PH] = BOOT_MODE_BOOTLOADER;
 		clear_boot_reg = 1;
 	} else if (bmsg && !strcmp(bmsg->command, "boot-recovery")) {
 		printf("boot mode: recovery (misc)\n");
-		boot_mode = BOOT_MODE_RECOVERY;
-		clear_boot_reg = 1;
+		boot_mode[PM] = BOOT_MODE_RECOVERY;
 	} else {
 		switch (reg_boot_mode) {
 		case BOOT_NORMAL:
 			printf("boot mode: normal\n");
-			boot_mode = BOOT_MODE_NORMAL;
+			boot_mode[PL] = BOOT_MODE_NORMAL;
 			clear_boot_reg = 1;
 			break;
 		case BOOT_RECOVERY:
 			printf("boot mode: recovery (cmd)\n");
-			boot_mode = BOOT_MODE_RECOVERY;
+			boot_mode[PL] = BOOT_MODE_RECOVERY;
 			clear_boot_reg = 1;
 			break;
 		case BOOT_UMS:
 			printf("boot mode: ums\n");
-			boot_mode = BOOT_MODE_UMS;
+			boot_mode[PL] = BOOT_MODE_UMS;
 			clear_boot_reg = 1;
 			break;
 		case BOOT_CHARGING:
 			printf("boot mode: charging\n");
-			boot_mode = BOOT_MODE_CHARGING;
+			boot_mode[PL] = BOOT_MODE_CHARGING;
 			clear_boot_reg = 1;
 			break;
 		case BOOT_PANIC:
 			printf("boot mode: panic\n");
-			boot_mode = BOOT_MODE_PANIC;
+			boot_mode[PL] = BOOT_MODE_PANIC;
 			break;
 		case BOOT_WATCHDOG:
 			printf("boot mode: watchdog\n");
-			boot_mode = BOOT_MODE_WATCHDOG;
+			boot_mode[PL] = BOOT_MODE_WATCHDOG;
 			break;
 		default:
 			printf("boot mode: None\n");
-			boot_mode = BOOT_MODE_UNDEFINE;
+			boot_mode[PL] = BOOT_MODE_UNDEFINE;
 		}
 	}
 
@@ -178,7 +193,12 @@ fallback:
 	if (clear_boot_reg)
 		writel(BOOT_NORMAL, (void *)CONFIG_ROCKCHIP_BOOT_MODE_REG);
 
-	return boot_mode;
+	if (boot_mode[PH] != -EINVAL)
+		return boot_mode[PH];
+	else if (boot_mode[PM] != -EINVAL)
+		return boot_mode[PM];
+	else
+		return boot_mode[PL];
 }
 
 int setup_boot_mode(void)

commit 22edf95882729e3b9441e6de4b97a7160c663d7f
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Nov 20 09:09:10 2020 +0800

    mtd: spinand: Support W25N02KV
    
    Change-Id: Iaf4a50ce7bb0bb9978a05d339a34763445c09c84
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/winbond.c b/drivers/mtd/nand/spi/winbond.c
index cc320236d5..3431d895f5 100644
--- a/drivers/mtd/nand/spi/winbond.c
+++ b/drivers/mtd/nand/spi/winbond.c
@@ -16,6 +16,7 @@
 #define SPINAND_MFR_WINBOND		0xEF
 
 #define WINBOND_CFG_BUF_READ		BIT(3)
+#define WINBOND_STATUS_ECC_HAS_BITFLIPS_T	(3 << 4)
 
 static SPINAND_OP_VARIANTS(read_cache_variants,
 		SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
@@ -76,6 +77,74 @@ static int w25m02gv_select_target(struct spinand_device *spinand,
 	return spi_mem_exec_op(spinand->slave, &op);
 }
 
+static int w25n02kv_ooblayout_ecc(struct mtd_info *mtd, int section,
+				  struct mtd_oob_region *region)
+{
+	if (section)
+		return -ERANGE;
+
+	region->offset = 64;
+	region->length = 64;
+
+	return 0;
+}
+
+static int w25n02kv_ooblayout_free(struct mtd_info *mtd, int section,
+				   struct mtd_oob_region *region)
+{
+	if (section)
+		return -ERANGE;
+
+	/* Reserve 2 bytes for the BBM. */
+	region->offset = 2;
+	region->length = 62;
+
+	return 0;
+}
+
+static const struct mtd_ooblayout_ops w25n02kv_ooblayout = {
+	.ecc = w25n02kv_ooblayout_ecc,
+	.rfree = w25n02kv_ooblayout_free,
+};
+
+static int w25n02kv_ecc_get_status(struct spinand_device *spinand,
+				   u8 status)
+{
+	struct nand_device *nand = spinand_to_nand(spinand);
+	u8 mbf = 0;
+	struct spi_mem_op op = SPINAND_GET_FEATURE_OP(0x30, &mbf);
+
+	switch (status & STATUS_ECC_MASK) {
+	case STATUS_ECC_NO_BITFLIPS:
+		return 0;
+
+	case STATUS_ECC_UNCOR_ERROR:
+		return -EBADMSG;
+
+	case STATUS_ECC_HAS_BITFLIPS:
+	case WINBOND_STATUS_ECC_HAS_BITFLIPS_T:
+		/*
+		 * Let's try to retrieve the real maximum number of bitflips
+		 * in order to avoid forcing the wear-leveling layer to move
+		 * data around if it's not necessary.
+		 */
+		if (spi_mem_exec_op(spinand->slave, &op))
+			return nand->eccreq.strength;
+
+		mbf >>= 4;
+
+		if (WARN_ON(mbf > nand->eccreq.strength || !mbf))
+			return nand->eccreq.strength;
+
+		return mbf;
+
+	default:
+		break;
+	}
+
+	return -EINVAL;
+}
+
 static const struct spinand_info winbond_spinand_table[] = {
 	SPINAND_INFO("W25M02GV", 0xAB,
 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 2),
@@ -97,6 +166,19 @@ static const struct spinand_info winbond_spinand_table[] = {
 		     SPINAND_SELECT_TARGET(w25m02gv_select_target)),
 };
 
+/* Another set for the same id[2] devices in one series */
+static const struct spinand_info winbond_spinand_table2[] = {
+	SPINAND_INFO("W25N02KV", 0xAA,
+		     NAND_MEMORG(1, 2048, 64, 64, 2048, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     0,
+		     SPINAND_ECCINFO(&w25n02kv_ooblayout,
+				     w25n02kv_ecc_get_status)),
+};
+
 /**
  * winbond_spinand_detect - initialize device related part in spinand_device
  * struct if it is a Winbond device.
@@ -114,8 +196,15 @@ static int winbond_spinand_detect(struct spinand_device *spinand)
 	if (id[1] != SPINAND_MFR_WINBOND)
 		return 0;
 
-	ret = spinand_match_and_init(spinand, winbond_spinand_table,
-				     ARRAY_SIZE(winbond_spinand_table), id[2]);
+	if (id[2] == 0xAA && id[3] == 0x22)
+		ret = spinand_match_and_init(spinand, winbond_spinand_table2,
+					     ARRAY_SIZE(winbond_spinand_table),
+					     id[2]);
+	else
+		ret = spinand_match_and_init(spinand, winbond_spinand_table,
+					     ARRAY_SIZE(winbond_spinand_table),
+					     id[2]);
+
 	if (ret)
 		return ret;
 

commit b833c879cf982d487a089dbdfde83349ecf6b0be
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue Nov 17 15:35:20 2020 +0800

    rkflash: Support new spi flash
    
    1.Support W25N02KVZEIR
    2.Support GD25B512MEYIG, MX25U51245G
    
    Change-Id: Ia0181aa3fc6cbf17e2b0abd43dea80b5d9848d88
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/sfc_nand.c b/drivers/rkflash/sfc_nand.c
index 63281d11a1..263a9674c2 100644
--- a/drivers/rkflash/sfc_nand.c
+++ b/drivers/rkflash/sfc_nand.c
@@ -24,110 +24,112 @@ static u32 sfc_nand_get_ecc_status6(void);
 
 static struct nand_info spi_nand_tbl[] = {
 	/* TC58CVG0S0HxAIx */
-	{ 0x98C2, 4, 0x40, 1, 1024, 0x00, 18, 0x8, 0, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
+	{ 0x98, 0xC2, 0x00, 4, 0x40, 1, 1024, 0x00, 18, 0x8, 0, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
 	/* TC58CVG1S0HxAIx */
-	{ 0x98CB, 4, 0x40, 2, 1024, 0x00, 19, 0x8, 0, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
+	{ 0x98, 0xCB, 0x00, 4, 0x40, 2, 1024, 0x00, 19, 0x8, 0, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
 	/* TC58CVG2S0HRAIJ */
-	{ 0x98ED, 8, 0x40, 1, 2048, 0x0C, 20, 0x8, 0, { 0x04, 0x0C, 0x08, 0x10 }, &sfc_nand_get_ecc_status0 },
+	{ 0x98, 0xED, 0x00, 8, 0x40, 1, 2048, 0x0C, 20, 0x8, 0, { 0x04, 0x0C, 0x08, 0x10 }, &sfc_nand_get_ecc_status0 },
 	/* TC58CVG1S3HRAIJ */
-	{ 0x98EB, 4, 0x40, 1, 2048, 0x0C, 19, 0x8, 0, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
+	{ 0x98, 0xEB, 0x00, 4, 0x40, 1, 2048, 0x0C, 19, 0x8, 0, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
 	/* TC58CVG0S3HRAIJ */
-	{ 0x98E2, 4, 0x40, 1, 1024, 0x0C, 18, 0x8, 0, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
+	{ 0x98, 0xE2, 0x00, 4, 0x40, 1, 1024, 0x0C, 18, 0x8, 0, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
 
 	/* MX35LF1GE4AB */
-	{ 0xC212, 4, 0x40, 1, 1024, 0x0C, 18, 0x4, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
+	{ 0xC2, 0x12, 0x00, 4, 0x40, 1, 1024, 0x0C, 18, 0x4, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
 	/* MX35LF2GE4AB */
-	{ 0xC222, 4, 0x40, 2, 1024, 0x0C, 19, 0x4, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
+	{ 0xC2, 0x22, 0x00, 4, 0x40, 2, 1024, 0x0C, 19, 0x4, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
 	/* MX35LF2GE4AD */
-	{ 0xC226, 4, 0x40, 1, 2048, 0x0C, 19, 0x8, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
+	{ 0xC2, 0x26, 0x00, 4, 0x40, 1, 2048, 0x0C, 19, 0x8, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
 	/* MX35LF4GE4AD */
-	{ 0xC237, 8, 0x40, 1, 2048, 0x0C, 19, 0x8, 1, { 0x04, 0x08, 0x14, 0x18 }, &sfc_nand_get_ecc_status0 },
+	{ 0xC2, 0x37, 0x00, 8, 0x40, 1, 2048, 0x0C, 19, 0x8, 1, { 0x04, 0x08, 0x14, 0x18 }, &sfc_nand_get_ecc_status0 },
 	/* MT29F1G01ZAC */
-	{ 0x2C12, 4, 0x40, 1, 1024, 0x00, 18, 0x1, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
+	{ 0x2C, 0x12, 0x00, 4, 0x40, 1, 1024, 0x00, 18, 0x1, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
 
 	/* GD5F1GQ4UAYIG */
-	{ 0xC8F1, 4, 0x40, 1, 1024, 0x0C, 18, 0x8, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
+	{ 0xC8, 0xF1, 0x00, 4, 0x40, 1, 1024, 0x0C, 18, 0x8, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
 	/* GD5F1GQ4RB9IGR */
-	{ 0xC8D1, 4, 0x40, 1, 1024, 0x0C, 18, 0x8, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status3 },
+	{ 0xC8, 0xD1, 0x00, 4, 0x40, 1, 1024, 0x0C, 18, 0x8, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status3 },
 	/* GD5F2GQ40BY2GR */
-	{ 0xC8D2, 4, 0x40, 2, 1024, 0x0C, 19, 0x8, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status3 },
+	{ 0xC8, 0xD2, 0x00, 4, 0x40, 2, 1024, 0x0C, 19, 0x8, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status3 },
 	/* GD5F1GQ5UEYIG */
-	{ 0xC851, 4, 0x40, 1, 1024, 0x4C, 18, 0x4, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status2 },
+	{ 0xC8, 0x51, 0x00, 4, 0x40, 1, 1024, 0x4C, 18, 0x4, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status2 },
 	/* GD5F2GQ5UEYIG */
-	{ 0xC852, 4, 0x40, 1, 2048, 0x4C, 19, 0x4, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status2 },
+	{ 0xC8, 0x52, 0x00, 4, 0x40, 1, 2048, 0x4C, 19, 0x4, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status2 },
 	/* GD5F1GQ4R */
-	{ 0xC8C1, 4, 0x40, 1, 1024, 0x0C, 18, 0x8, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status3 },
+	{ 0xC8, 0xC1, 0x00, 4, 0x40, 1, 1024, 0x0C, 18, 0x8, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status3 },
 
 	/* W25N01GV */
-	{ 0xEFAA, 4, 0x40, 1, 1024, 0x4C, 18, 0x1, 0, { 0x04, 0x14, 0x24, 0xFF }, &sfc_nand_get_ecc_status1 },
+	{ 0xEF, 0xAA, 0x21, 4, 0x40, 1, 1024, 0x4C, 18, 0x1, 0, { 0x04, 0x14, 0x24, 0xFF }, &sfc_nand_get_ecc_status1 },
+	/* W25N02KVZEIR */
+	{ 0xEF, 0xAA, 0x22, 4, 0x40, 1, 2048, 0x4C, 19, 0x8, 0, { 0x04, 0x14, 0x24, 0xFF }, &sfc_nand_get_ecc_status0 },
 	/* W25N01GW */
-	{ 0xEFBA, 4, 0x40, 1, 1024, 0x4C, 18, 0x1, 0, { 0x04, 0x14, 0x24, 0xFF }, &sfc_nand_get_ecc_status1 },
+	{ 0xEF, 0xBA, 0x00, 4, 0x40, 1, 1024, 0x4C, 18, 0x1, 0, { 0x04, 0x14, 0x24, 0xFF }, &sfc_nand_get_ecc_status1 },
 
 	/* HYF2GQ4UAACAE */
-	{ 0xC952, 4, 0x40, 1, 2048, 0x4C, 19, 0xE, 1, { 0x04, 0x24, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
+	{ 0xC9, 0x52, 0x00, 4, 0x40, 1, 2048, 0x4C, 19, 0xE, 1, { 0x04, 0x24, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
 	/* HYF1GQ4UDACAE */
-	{ 0xC921, 4, 0x40, 1, 1024, 0x4C, 18, 0x4, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
+	{ 0xC9, 0x21, 0x00, 4, 0x40, 1, 1024, 0x4C, 18, 0x4, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
 	/* HYF1GQ4UPACAE */
-	{ 0xC9A1, 4, 0x40, 1, 1024, 0x4C, 18, 0x1, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
+	{ 0xC9, 0xA1, 0x00, 4, 0x40, 1, 1024, 0x4C, 18, 0x1, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
 	/* HYF2GQ4UDACAE */
-	{ 0xC922, 4, 0x40, 1, 2048, 0x4C, 19, 0x4, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
+	{ 0xC9, 0x22, 0x00, 4, 0x40, 1, 2048, 0x4C, 19, 0x4, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
 	/* HYF2GQ4UHCCAE */
-	{ 0xC95A, 4, 0x40, 1, 2048, 0x4C, 19, 0xE, 1, { 0x04, 0x24, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
+	{ 0xC9, 0x5A, 0x00, 4, 0x40, 1, 2048, 0x4C, 19, 0xE, 1, { 0x04, 0x24, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
 	/* HYF4GQ4UAACBE */
-	{ 0xC9D4, 8, 0x40, 1, 2048, 0x4C, 20, 0x4, 1, { 0x20, 0x40, 0x24, 0x44 }, &sfc_nand_get_ecc_status0 },
+	{ 0xC9, 0xD4, 0x00, 8, 0x40, 1, 2048, 0x4C, 20, 0x4, 1, { 0x20, 0x40, 0x24, 0x44 }, &sfc_nand_get_ecc_status0 },
 
 	/* FS35ND01G-S1 */
-	{ 0xCDB1, 4, 0x40, 1, 1024, 0x0C, 18, 0x4, 1, { 0x10, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status5 },
+	{ 0xCD, 0xB1, 0x00, 4, 0x40, 1, 1024, 0x0C, 18, 0x4, 1, { 0x10, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status5 },
 	/* FS35ND02G-S2 */
-	{ 0xCDA2, 4, 0x40, 1, 2048, 0x00, 19, 0x4, 0, { 0x10, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status5 },
+	{ 0xCD, 0xA2, 0x00, 4, 0x40, 1, 2048, 0x00, 19, 0x4, 0, { 0x10, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status5 },
 	/* FS35ND01G-S1Y2 */
-	{ 0xCDEA, 4, 0x40, 1, 1024, 0x4C, 18, 0x4, 0, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
+	{ 0xCD, 0xEA, 0x00, 4, 0x40, 1, 1024, 0x4C, 18, 0x4, 0, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
 	/* FS35ND02G-S3Y2 */
-	{ 0xCDEB, 4, 0x40, 1, 2048, 0x4C, 19, 0x4, 0, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
+	{ 0xCD, 0xEB, 0x00, 4, 0x40, 1, 2048, 0x4C, 19, 0x4, 0, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
 	/* FS35ND04G-S2Y2 1*4096 */
-	{ 0xCDEC, 4, 0x40, 2, 2048, 0x4C, 20, 0x4, 0, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
+	{ 0xCD, 0xEC, 0x00, 4, 0x40, 2, 2048, 0x4C, 20, 0x4, 0, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
 
 	/* DS35Q1GA-IB */
-	{ 0xE571, 4, 0x40, 1, 1024, 0x0C, 18, 0x4, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
+	{ 0xE5, 0x71, 0x00, 4, 0x40, 1, 1024, 0x0C, 18, 0x4, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
 	/* DS35Q2GA-IB */
-	{ 0xE572, 4, 0x40, 2, 1024, 0x0C, 19, 0x4, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
+	{ 0xE5, 0x72, 0x00, 4, 0x40, 2, 1024, 0x0C, 19, 0x4, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
 	/* DS35M1GA-1B */
-	{ 0xE521, 4, 0x40, 1, 1024, 0x0C, 18, 0x4, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
+	{ 0xE5, 0x21, 0x00, 4, 0x40, 1, 1024, 0x0C, 18, 0x4, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
 
 	/* EM73C044VCC-H */
-	{ 0xD522, 4, 0x40, 1, 1024, 0x0C, 18, 0x8, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
+	{ 0xD5, 0x22, 0x00, 4, 0x40, 1, 1024, 0x0C, 18, 0x8, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
 	/* EM73D044VCE-H */
-	{ 0xD520, 4, 0x40, 1, 2048, 0x0C, 19, 0x8, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
+	{ 0xD5, 0x20, 0x00, 4, 0x40, 1, 2048, 0x0C, 19, 0x8, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
 	/* EM73E044SNA-G */
-	{ 0xD503, 8, 0x40, 1, 2048, 0x4C, 20, 0x8, 1, { 0x04, 0x28, 0x08, 0x2C }, &sfc_nand_get_ecc_status0 },
+	{ 0xD5, 0x03, 0x00, 8, 0x40, 1, 2048, 0x4C, 20, 0x8, 1, { 0x04, 0x28, 0x08, 0x2C }, &sfc_nand_get_ecc_status0 },
 
 	/* XT26G02A */
-	{ 0x0BE2, 4, 0x40, 1, 2048, 0x4C, 19, 0x1, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status4 },
+	{ 0x0B, 0xE2, 0x00, 4, 0x40, 1, 2048, 0x4C, 19, 0x1, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status4 },
 	/* XT26G01A */
-	{ 0x0BE1, 4, 0x40, 1, 1024, 0x4C, 18, 0x1, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status4 },
+	{ 0x0B, 0xE1, 0x00, 4, 0x40, 1, 1024, 0x4C, 18, 0x1, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status4 },
 	/* XT26G04A */
-	{ 0x0BE3, 4, 0x80, 1, 2048, 0x4C, 20, 0x1, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status4 },
+	{ 0x0B, 0xE3, 0x00, 4, 0x80, 1, 2048, 0x4C, 20, 0x1, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status4 },
 	/* XT26G01B */
-	{ 0x0BF1, 4, 0x40, 1, 1024, 0x4C, 18, 0x1, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status4 },
+	{ 0x0B, 0xF1, 0x00, 4, 0x40, 1, 1024, 0x4C, 18, 0x1, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status4 },
 	/* XT26G02B */
-	{ 0x0BF2, 4, 0x40, 1, 2048, 0x4C, 19, 0x1, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status5 },
+	{ 0x0B, 0xF2, 0x00, 4, 0x40, 1, 2048, 0x4C, 19, 0x1, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status5 },
 
 	/* MT29F2G1ABA, XT26G02E, F50L2G41XA */
-	{ 0x2C24, 4, 0x40, 2, 1024, 0x4C, 19, 0x1, 1, { 0x20, 0x24, 0xFF, 0xFF }, &sfc_nand_get_ecc_status6 },
+	{ 0x2C, 0x24, 0x00, 4, 0x40, 2, 1024, 0x4C, 19, 0x1, 1, { 0x20, 0x24, 0xFF, 0xFF }, &sfc_nand_get_ecc_status6 },
 
 	/* FM25S01 */
-	{ 0xA1A1, 4, 0x40, 1, 1024, 0x4C, 18, 0x1, 0, { 0x00, 0x04, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
+	{ 0xA1, 0xA1, 0x00, 4, 0x40, 1, 1024, 0x4C, 18, 0x1, 0, { 0x00, 0x04, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
 	/* FM25S01A */
-	{ 0xA1E4, 4, 0x40, 1, 1024, 0x4C, 18, 0x1, 0, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
+	{ 0xA1, 0xE4, 0x00, 4, 0x40, 1, 1024, 0x4C, 18, 0x1, 0, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
 	/* FM25S02A */
-	{ 0xA1E5, 4, 0x40, 2, 1024, 0x4C, 19, 0x1, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
+	{ 0xA1, 0xE5, 0x00, 4, 0x40, 2, 1024, 0x4C, 19, 0x1, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
 
 	/* IS37SML01G1 */
-	{ 0xC821, 4, 0x40, 1, 1024, 0x00, 18, 0x1, 0, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
+	{ 0xC8, 0x21, 0x00, 4, 0x40, 1, 1024, 0x00, 18, 0x1, 0, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
 	/* F50L1G41LB */
-	{ 0xC801, 4, 0x40, 1, 1024, 0x4C, 18, 0x1, 0, { 0x14, 0x24, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
+	{ 0xC8, 0x01, 0x00, 4, 0x40, 1, 1024, 0x4C, 18, 0x1, 0, { 0x14, 0x24, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
 	/* ATO25D1GA */
-	{ 0x9B12, 4, 0x40, 1, 1024, 0x40, 18, 0x1, 1, { 0x14, 0x24, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
+	{ 0x9B, 0x12, 0x00, 4, 0x40, 1, 1024, 0x40, 18, 0x1, 1, { 0x14, 0x24, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
 };
 
 static struct nand_info *p_nand_info;
@@ -137,11 +139,16 @@ static struct SFNAND_DEV sfc_nand_dev;
 static struct nand_info *sfc_nand_get_info(u8 *nand_id)
 {
 	u32 i;
-	u32 id = (nand_id[0] << 8) | (nand_id[1] << 0);
 
 	for (i = 0; i < ARRAY_SIZE(spi_nand_tbl); i++) {
-		if (spi_nand_tbl[i].id == id)
+		if (spi_nand_tbl[i].id0 == nand_id[0] &&
+		    spi_nand_tbl[i].id1 == nand_id[1]) {
+			if (spi_nand_tbl[i].id2 &&
+			    spi_nand_tbl[i].id2 != nand_id[2])
+				continue;
+
 			return &spi_nand_tbl[i];
+		}
 	}
 
 	return NULL;
diff --git a/drivers/rkflash/sfc_nand.h b/drivers/rkflash/sfc_nand.h
index 5b3a2516ee..4c9ae1477f 100644
--- a/drivers/rkflash/sfc_nand.h
+++ b/drivers/rkflash/sfc_nand.h
@@ -93,7 +93,9 @@ struct nand_mega_area {
 };
 
 struct nand_info {
-	u32 id;
+	u8 id0;
+	u8 id1;
+	u8 id2;
 
 	u16 sec_per_page;
 	u16 page_per_blk;
diff --git a/drivers/rkflash/sfc_nor.c b/drivers/rkflash/sfc_nor.c
index c12b91d906..7d4c1db756 100644
--- a/drivers/rkflash/sfc_nor.c
+++ b/drivers/rkflash/sfc_nor.c
@@ -22,6 +22,9 @@ static struct flash_info spi_flash_tbl[] = {
 	{ 0xc84019, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x1C, 16, 6, 0 },
 	/* GD25Q512MC */
 	{ 0xc84020, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x3C, 17, 6, 0 },
+	/* GD25B512MEYIG */
+	{ 0xc8471A, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x3C, 17, 0, 0 },
+
 	/* W25Q64JVSSIQ */
 	{ 0xef4017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0 },
 	/* W25Q128FV and W25Q128JV*/
@@ -34,6 +37,9 @@ static struct flash_info spi_flash_tbl[] = {
 	{ 0xef6017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0 },
 	/* W25Q128JVSIM */
 	{ 0xef7018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 9, 0 },
+	/* W25Q256JVEM */
+	{ 0xef7019, 128, 8, 0x13, 0x12, 0x6C, 0x34, 0x21, 0xDC, 0x3C, 16, 9, 0 },
+
 	/* MX25L3233FM2I-08G */
 	{ 0xc22016, 128, 8, 0x03, 0x02, 0x6B, 0x38, 0x20, 0xD8, 0x0E, 13, 6, 0 },
 	/* MX25L6433F */
@@ -44,6 +50,9 @@ static struct flash_info spi_flash_tbl[] = {
 	{ 0xc22019, 128, 8, 0x13, 0x12, 0x6C, 0x38, 0x21, 0xDC, 0x3E, 16, 6, 0 },
 	/* MX25L51245GMI */
 	{ 0xc2201a, 128, 8, 0x13, 0x12, 0x6C, 0x38, 0x21, 0xDC, 0x3E, 17, 6, 0 },
+	/* MX25U51245G */
+	{ 0xc2253a, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x1E, 17, 6, 0 },
+
 	/* XM25QH32C */
 	{ 0x204016, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 13, 9, 0 },
 	/* XM25QH64B */
@@ -54,12 +63,14 @@ static struct flash_info spi_flash_tbl[] = {
 	{ 0x206019, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x1D, 16, 6, 0 },
 	/* XM25QH64A */
 	{ 0x207017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 0, 0 },
+
 	/* XT25F128A XM25QH128A */
 	{ 0x207018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 0, 0 },
 	/* XT25F64BSSIGU-5 */
 	{ 0x0b4017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 14, 9, 0 },
 	/* XT25F128BSSIGU */
 	{ 0x0b4018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 15, 9, 0 },
+
 	/* EN25QH64A */
 	{ 0x1c7017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 0, 0 },
 	/* EN25QH128A */
@@ -70,28 +81,30 @@ static struct flash_info spi_flash_tbl[] = {
 	{ 0x1c3816, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 13, 0, 0 },
 	/* EN25S64A */
 	{ 0x1c3817, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 0, 0 },
-	/* P25Q64H */
-	{ 0x856017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0 },
 	/* EN25QH256A */
 	{ 0x1c7019, 128, 8, 0x13, 0x12, 0x6C, 0x34, 0x21, 0xDC, 0x3C, 16, 0, 0 },
-	/* FM25Q64A */
-	{ 0xf83217, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 14, 9, 0 },
+
 	/* ZB25VQ64 */
 	{ 0x5e4017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0 },
 	/* ZB25VQ128 */
 	{ 0x5e4018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 9, 0 },
 	/* ZB25LQ128 */
 	{ 0x5e5018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 9, 0 },
-	/* 25Q256JVEM */
-	{ 0xef7019, 128, 8, 0x13, 0x12, 0x6C, 0x34, 0x21, 0xDC, 0x3C, 16, 9, 0 },
+
 	/* BH25Q128AS */
 	{ 0x684018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x04, 15, 9, 0 },
 	/* BH25Q64BS */
 	{ 0x684017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x04, 14, 9, 0 },
+
 	/* FM25Q128A */
 	{ 0xA14018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 9, 0 },
 	/* FM25Q64-SOB-T-G */
 	{ 0xA14017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0 },
+
+	/* FM25Q64A */
+	{ 0xf83217, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 14, 9, 0 },
+	/* P25Q64H */
+	{ 0x856017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0 },
 };
 
 static int snor_write_en(void)
@@ -325,7 +338,7 @@ int snor_prog_page(struct SFNOR_DEV *p_dev,
 	op.sfctrl.d32 = 0;
 	op.sfctrl.b.datalines = p_dev->prog_lines;
 	op.sfctrl.b.enbledma = 1;
-	if (p_dev->prog_cmd == CMD_PAGE_PROG_A4)
+	if (p_dev->prog_lines == DATA_LINES_X4)
 		op.sfctrl.b.addrlines = SFC_4BITS_LINE;
 
 	if (p_dev->addr_mode == ADDR_MODE_4BYTE)
@@ -597,7 +610,7 @@ static int snor_parse_flash_table(struct SFNOR_DEV *p_dev,
 		snor_flash_info_adjust(g_spi_flash_info);
 		p_dev->manufacturer = (g_spi_flash_info->id >> 16) & 0xFF;
 		p_dev->mem_type = (g_spi_flash_info->id >> 8) & 0xFF;
-		p_dev->capacity = 1 << ((g_spi_flash_info->id & 0xFF) - 9);
+		p_dev->capacity = 1 << g_spi_flash_info->density;
 		p_dev->blk_size = g_spi_flash_info->block_size;
 		p_dev->page_size = NOR_SECS_PAGE;
 		p_dev->read_cmd = g_spi_flash_info->read_cmd;

commit cd081a9734e770ed882a7039883c5bb97325ae79
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Nov 20 15:57:44 2020 +0800

    spl: rkfw: fix printing error message
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I4cfd0de01b826aaa21c7269e1b814e234670561a

diff --git a/common/spl/spl_rkfw.c b/common/spl/spl_rkfw.c
index de21b140ff..3c3ca3934a 100644
--- a/common/spl/spl_rkfw.c
+++ b/common/spl/spl_rkfw.c
@@ -244,7 +244,7 @@ static int rkfw_load_trust(struct spl_load_info *info, u32 image_sector,
 	}
 
 	if (i == try_count) {
-		printf("Can not find usable uboot\n");
+		printf("Can not find usable trust\n");
 		return -ENONET;
 	}
 

commit 2d25c32e077904ed34e65f00257be2f5d360d141
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 18 16:25:45 2020 +0800

    rockchip: dts: rk3568: Resync from kernel-4.19
    
    Resync from kernel-4.19:
    (2f153f1fa73c arm64: dts: rockchip: rk3568: add thermal-zone for pvtm)
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I36fdfc366f4d44f3226b6f8b35ee496701fe021e

diff --git a/arch/arm/dts/rk3568-pinctrl.dtsi b/arch/arm/dts/rk3568-pinctrl.dtsi
index 86009ff44e..427e5d1443 100644
--- a/arch/arm/dts/rk3568-pinctrl.dtsi
+++ b/arch/arm/dts/rk3568-pinctrl.dtsi
@@ -30,39 +30,24 @@
 				<1 RK_PA5 5 &pcfg_pull_none>;
 		};
 	};
-	audiopwmlout {
-		audiopwmlout_pins: audiopwmlout-pins {
+	audiopwmout {
+		audiopwmout_pins: audiopwmout-pins {
 			rockchip,pins =
 				/* audiopwmlout */
 				<1 RK_PA0 4 &pcfg_pull_none>,
-				/* audiopwmlout */
-				<1 RK_PA1 6 &pcfg_pull_none>;
-		};
-	};
-	audiopwmloutp {
-		audiopwmloutp_pins: audiopwmloutp-pins {
-			rockchip,pins =
-				/* audiopwmloutp */
-				<1 RK_PA0 6 &pcfg_pull_none>;
-		};
-	};
-	audiopwmrout {
-		audiopwmrout_pins: audiopwmrout-pins {
-			rockchip,pins =
 				/* audiopwmrout */
 				<1 RK_PA1 4 &pcfg_pull_none>;
 		};
 	};
-	audiopwmroutn {
-		audiopwmroutn_pins: audiopwmroutn-pins {
+	audiopwmoutdiff {
+		audiopwmoutdiff_pins: audiopwmoutdiff-pins {
 			rockchip,pins =
+				/* audiopwmloutn */
+				<1 RK_PA1 6 &pcfg_pull_none>,
+				/* audiopwmloutp */
+				<1 RK_PA0 6 &pcfg_pull_none>,
 				/* audiopwmroutn */
-				<1 RK_PA7 4 &pcfg_pull_none>;
-		};
-	};
-	audiopwmroutp {
-		audiopwmroutp_pins: audiopwmroutp-pins {
-			rockchip,pins =
+				<1 RK_PA7 4 &pcfg_pull_none>,
 				/* audiopwmroutp */
 				<1 RK_PA6 4 &pcfg_pull_none>;
 		};
@@ -384,19 +369,19 @@
 		};
 	};
 	eth0 {
-		eth0_pins: eth0-pins {
+		eth0_clkout_pins: eth0-clkout-pins {
 			rockchip,pins =
 				/* eth0_refclko25m */
 				<2 RK_PC1 2 &pcfg_pull_none>;
 		};
 	};
 	eth1 {
-		eth1m0_pins: eth1m0-pins {
+		eth1m0_clkout_pins: eth1m0-clkout-pins {
 			rockchip,pins =
 				/* eth1_refclko25mm0 */
 				<3 RK_PB0 3 &pcfg_pull_none>;
 		};
-		eth1m1_pins: eth1m1-pins {
+		eth1m1_clkout_pins: eth1m1-clkout-pins {
 			rockchip,pins =
 				/* eth1_refclko25mm1 */
 				<4 RK_PB3 3 &pcfg_pull_none>;
@@ -466,14 +451,34 @@
 		};
 	};
 	gmac0 {
-		gmac0_pins: gmac0-pins {
+		gmac0_miim_pins: gmac0-miim-pins {
 			rockchip,pins =
-				/* gmac0_mclkinout */
-				<2 RK_PC2 2 &pcfg_pull_none>,
 				/* gmac0_mdc */
 				<2 RK_PC3 2 &pcfg_pull_none>,
 				/* gmac0_mdio */
-				<2 RK_PC4 2 &pcfg_pull_none>,
+				<2 RK_PC4 2 &pcfg_pull_none>;
+		};
+		gmac0_rmii_pins: gmac0-rmii-pins {
+			rockchip,pins =
+				/* gmac0_mclkinout */
+				<2 RK_PC2 2 &pcfg_pull_none>,
+				/* gmac0_rxd0 */
+				<2 RK_PB6 1 &pcfg_pull_none>,
+				/* gmac0_rxd1 */
+				<2 RK_PB7 2 &pcfg_pull_none>,
+				/* gmac0_rxdvcrs */
+				<2 RK_PC0 2 &pcfg_pull_none>,
+				/* gmac0_rxer */
+				<2 RK_PC5 2 &pcfg_pull_none>,
+				/* gmac0_txd0 */
+				<2 RK_PB3 1 &pcfg_pull_none>,
+				/* gmac0_txd1 */
+				<2 RK_PB4 1 &pcfg_pull_none>,
+				/* gmac0_txen */
+				<2 RK_PB5 1 &pcfg_pull_none>;
+		};
+		gmac0_rgmii_pins: gmac0-rgmii-pins {
+			rockchip,pins =
 				/* gmac0_rxclk */
 				<2 RK_PA5 2 &pcfg_pull_none>,
 				/* gmac0_rxd0 */
@@ -486,31 +491,49 @@
 				<2 RK_PA4 2 &pcfg_pull_none>,
 				/* gmac0_rxdvcrs */
 				<2 RK_PC0 2 &pcfg_pull_none>,
-				/* gmac0_rxer */
-				<2 RK_PC5 2 &pcfg_pull_none>,
 				/* gmac0_txclk */
-				<2 RK_PB0 2 &pcfg_pull_none>,
+				<2 RK_PB0 2 &pcfg_pull_none_drv_level_15>,
 				/* gmac0_txd0 */
-				<2 RK_PB3 1 &pcfg_pull_none>,
+				<2 RK_PB3 1 &pcfg_pull_none_drv_level_15>,
 				/* gmac0_txd1 */
-				<2 RK_PB4 1 &pcfg_pull_none>,
+				<2 RK_PB4 1 &pcfg_pull_none_drv_level_15>,
 				/* gmac0_txd2 */
-				<2 RK_PA6 2 &pcfg_pull_none>,
+				<2 RK_PA6 2 &pcfg_pull_none_drv_level_15>,
 				/* gmac0_txd3 */
-				<2 RK_PA7 2 &pcfg_pull_none>,
+				<2 RK_PA7 2 &pcfg_pull_none_drv_level_15>,
 				/* gmac0_txen */
 				<2 RK_PB5 1 &pcfg_pull_none>;
 		};
 	};
 	gmac1 {
-		gmac1m0_pins: gmac1m0-pins {
+		gmac1m0_miim_pins: gmac1m0-miim-pins {
 			rockchip,pins =
-				/* gmac1_mclkinoutm0 */
-				<3 RK_PC0 3 &pcfg_pull_none>,
 				/* gmac1_mdcm0 */
 				<3 RK_PC4 3 &pcfg_pull_none>,
 				/* gmac1_mdiom0 */
-				<3 RK_PC5 3 &pcfg_pull_none>,
+				<3 RK_PC5 3 &pcfg_pull_none>;
+		};
+		gmac1m0_rmii_pins: gmac1m0-rmii-pins {
+			rockchip,pins =
+				/* gmac1_mclkinoutm0 */
+				<3 RK_PC0 3 &pcfg_pull_none>,
+				/* gmac1_rxd0m0 */
+				<3 RK_PB1 3 &pcfg_pull_none>,
+				/* gmac1_rxd1m0 */
+				<3 RK_PB2 3 &pcfg_pull_none>,
+				/* gmac1_rxdvcrsm0 */
+				<3 RK_PB3 3 &pcfg_pull_none>,
+				/* gmac1_rxerm0 */
+				<3 RK_PB4 3 &pcfg_pull_none>,
+				/* gmac1_txd0m0 */
+				<3 RK_PB5 3 &pcfg_pull_none>,
+				/* gmac1_txd1m0 */
+				<3 RK_PB6 3 &pcfg_pull_none>,
+				/* gmac1_txenm0 */
+				<3 RK_PB7 3 &pcfg_pull_none>;
+		};
+		gmac1m0_rgmii_pins: gmac1m0-rgmii-pins {
+			rockchip,pins =
 				/* gmac1_rxclkm0 */
 				<3 RK_PA7 3 &pcfg_pull_none>,
 				/* gmac1_rxd0m0 */
@@ -523,29 +546,47 @@
 				<3 RK_PA5 3 &pcfg_pull_none>,
 				/* gmac1_rxdvcrsm0 */
 				<3 RK_PB3 3 &pcfg_pull_none>,
-				/* gmac1_rxerm0 */
-				<3 RK_PB4 3 &pcfg_pull_none>,
 				/* gmac1_txclkm0 */
-				<3 RK_PA6 3 &pcfg_pull_none>,
+				<3 RK_PA6 3 &pcfg_pull_none_drv_level_15>,
 				/* gmac1_txd0m0 */
-				<3 RK_PB5 3 &pcfg_pull_none>,
+				<3 RK_PB5 3 &pcfg_pull_none_drv_level_15>,
 				/* gmac1_txd1m0 */
-				<3 RK_PB6 3 &pcfg_pull_none>,
+				<3 RK_PB6 3 &pcfg_pull_none_drv_level_15>,
 				/* gmac1_txd2m0 */
-				<3 RK_PA2 3 &pcfg_pull_none>,
+				<3 RK_PA2 3 &pcfg_pull_none_drv_level_15>,
 				/* gmac1_txd3m0 */
-				<3 RK_PA3 3 &pcfg_pull_none>,
+				<3 RK_PA3 3 &pcfg_pull_none_drv_level_15>,
 				/* gmac1_txenm0 */
 				<3 RK_PB7 3 &pcfg_pull_none>;
 		};
-		gmac1m1_pins: gmac1m1-pins {
+		gmac1m1_miim_pins: gmac1m1-miim-pins {
 			rockchip,pins =
-				/* gmac1_mclkinoutm1 */
-				<4 RK_PC1 3 &pcfg_pull_none>,
 				/* gmac1_mdcm1 */
 				<4 RK_PB6 3 &pcfg_pull_none>,
 				/* gmac1_mdiom1 */
-				<4 RK_PB7 3 &pcfg_pull_none>,
+				<4 RK_PB7 3 &pcfg_pull_none>;
+		};
+		gmac1m1_rmii_pins: gmac1m1-rmii-pins {
+			rockchip,pins =
+				/* gmac1_mclkinoutm1 */
+				<4 RK_PC1 3 &pcfg_pull_none>,
+				/* gmac1_rxd0m1 */
+				<4 RK_PA7 3 &pcfg_pull_none>,
+				/* gmac1_rxd1m1 */
+				<4 RK_PB0 3 &pcfg_pull_none>,
+				/* gmac1_rxdvcrsm1 */
+				<4 RK_PB1 3 &pcfg_pull_none>,
+				/* gmac1_rxerm1 */
+				<4 RK_PB2 3 &pcfg_pull_none>,
+				/* gmac1_txd0m1 */
+				<4 RK_PA4 3 &pcfg_pull_none>,
+				/* gmac1_txd1m1 */
+				<4 RK_PA5 3 &pcfg_pull_none>,
+				/* gmac1_txenm1 */
+				<4 RK_PA6 3 &pcfg_pull_none>;
+		};
+		gmac1m1_rgmii_pins: gmac1m1-rgmii-pins {
+			rockchip,pins =
 				/* gmac1_rxclkm1 */
 				<4 RK_PA3 3 &pcfg_pull_none>,
 				/* gmac1_rxd0m1 */
@@ -558,18 +599,16 @@
 				<4 RK_PA2 3 &pcfg_pull_none>,
 				/* gmac1_rxdvcrsm1 */
 				<4 RK_PB1 3 &pcfg_pull_none>,
-				/* gmac1_rxerm1 */
-				<4 RK_PB2 3 &pcfg_pull_none>,
 				/* gmac1_txclkm1 */
-				<4 RK_PA0 3 &pcfg_pull_none>,
+				<4 RK_PA0 3 &pcfg_pull_none_drv_level_15>,
 				/* gmac1_txd0m1 */
-				<4 RK_PA4 3 &pcfg_pull_none>,
+				<4 RK_PA4 3 &pcfg_pull_none_drv_level_15>,
 				/* gmac1_txd1m1 */
-				<4 RK_PA5 3 &pcfg_pull_none>,
+				<4 RK_PA5 3 &pcfg_pull_none_drv_level_15>,
 				/* gmac1_txd2m1 */
-				<3 RK_PD6 3 &pcfg_pull_none>,
+				<3 RK_PD6 3 &pcfg_pull_none_drv_level_15>,
 				/* gmac1_txd3m1 */
-				<3 RK_PD7 3 &pcfg_pull_none>,
+				<3 RK_PD7 3 &pcfg_pull_none_drv_level_15>,
 				/* gmac1_txenm1 */
 				<4 RK_PA6 3 &pcfg_pull_none>;
 		};
@@ -584,12 +623,12 @@
 		};
 	};
 	hdmitx {
-		hdmitxm0_pins: hdmitxm0-pins {
+		hdmitxm0_cec: hdmitxm0-cec {
 			rockchip,pins =
 				/* hdmitx_cecm0 */
 				<4 RK_PD1 1 &pcfg_pull_none>;
 		};
-		hdmitxm1_pins: hdmitxm1-pins {
+		hdmitxm1_cec: hdmitxm1-cec {
 			rockchip,pins =
 				/* hdmitx_cecm1 */
 				<0 RK_PC7 1 &pcfg_pull_none>;
@@ -1475,7 +1514,7 @@
 		sdmmc0_clk: sdmmc0-clk {
 			rockchip,pins =
 				/* sdmmc0_clk */
-				<2 RK_PA2 1 &pcfg_pull_up_drv_level_2>;
+				<2 RK_PA2 1 &pcfg_pull_up_drv_level_1>;
 		};
 		sdmmc0_cmd: sdmmc0-cmd {
 			rockchip,pins =
@@ -1495,23 +1534,23 @@
 		sdmmc1_bus4: sdmmc1-bus4 {
 			rockchip,pins =
 				/* sdmmc1_d0 */
-				<2 RK_PA3 1 &pcfg_pull_up_drv_level_2>,
+				<2 RK_PA3 1 &pcfg_pull_up_drv_level_5>,
 				/* sdmmc1_d1 */
-				<2 RK_PA4 1 &pcfg_pull_up_drv_level_2>,
+				<2 RK_PA4 1 &pcfg_pull_up_drv_level_5>,
 				/* sdmmc1_d2 */
-				<2 RK_PA5 1 &pcfg_pull_up_drv_level_2>,
+				<2 RK_PA5 1 &pcfg_pull_up_drv_level_5>,
 				/* sdmmc1_d3 */
-				<2 RK_PA6 1 &pcfg_pull_up_drv_level_2>;
+				<2 RK_PA6 1 &pcfg_pull_up_drv_level_5>;
 		};
 		sdmmc1_clk: sdmmc1-clk {
 			rockchip,pins =
 				/* sdmmc1_clk */
-				<2 RK_PB0 1 &pcfg_pull_up_drv_level_2>;
+				<2 RK_PB0 1 &pcfg_pull_up_drv_level_5>;
 		};
 		sdmmc1_cmd: sdmmc1-cmd {
 			rockchip,pins =
 				/* sdmmc1_cmd */
-				<2 RK_PA7 1 &pcfg_pull_up_drv_level_2>;
+				<2 RK_PA7 1 &pcfg_pull_up_drv_level_5>;
 		};
 		sdmmc1_det: sdmmc1-det {
 			rockchip,pins =
@@ -1526,23 +1565,23 @@
 		sdmmc2m0_bus4: sdmmc2m0-bus4 {
 			rockchip,pins =
 				/* sdmmc2_d0m0 */
-				<3 RK_PC6 3 &pcfg_pull_up_drv_level_2>,
+				<3 RK_PC6 3 &pcfg_pull_up_drv_level_5>,
 				/* sdmmc2_d1m0 */
-				<3 RK_PC7 3 &pcfg_pull_up_drv_level_2>,
+				<3 RK_PC7 3 &pcfg_pull_up_drv_level_5>,
 				/* sdmmc2_d2m0 */
-				<3 RK_PD0 3 &pcfg_pull_up_drv_level_2>,
+				<3 RK_PD0 3 &pcfg_pull_up_drv_level_5>,
 				/* sdmmc2_d3m0 */
-				<3 RK_PD1 3 &pcfg_pull_up_drv_level_2>;
+				<3 RK_PD1 3 &pcfg_pull_up_drv_level_5>;
 		};
 		sdmmc2m0_clk: sdmmc2m0-clk {
 			rockchip,pins =
 				/* sdmmc2_clkm0 */
-				<3 RK_PD3 3 &pcfg_pull_up_drv_level_2>;
+				<3 RK_PD3 3 &pcfg_pull_up_drv_level_5>;
 		};
 		sdmmc2m0_cmd: sdmmc2m0-cmd {
 			rockchip,pins =
 				/* sdmmc2_cmdm0 */
-				<3 RK_PD2 3 &pcfg_pull_up_drv_level_2>;
+				<3 RK_PD2 3 &pcfg_pull_up_drv_level_5>;
 		};
 		sdmmc2detm0: sdmmc2detm0 {
 			rockchip,pins =
@@ -1555,23 +1594,23 @@
 		sdmmc2m1_bus4: sdmmc2m1-bus4 {
 			rockchip,pins =
 				/* sdmmc2_d0m1 */
-				<3 RK_PA1 5 &pcfg_pull_up_drv_level_2>,
+				<3 RK_PA1 5 &pcfg_pull_up_drv_level_5>,
 				/* sdmmc2_d1m1 */
-				<3 RK_PA2 5 &pcfg_pull_up_drv_level_2>,
+				<3 RK_PA2 5 &pcfg_pull_up_drv_level_5>,
 				/* sdmmc2_d2m1 */
-				<3 RK_PA3 5 &pcfg_pull_up_drv_level_2>,
+				<3 RK_PA3 5 &pcfg_pull_up_drv_level_5>,
 				/* sdmmc2_d3m1 */
-				<3 RK_PA4 5 &pcfg_pull_up_drv_level_2>;
+				<3 RK_PA4 5 &pcfg_pull_up_drv_level_5>;
 		};
 		sdmmc2m1_clk: sdmmc2m1-clk {
 			rockchip,pins =
 				/* sdmmc2_clkm1 */
-				<3 RK_PA6 5 &pcfg_pull_up_drv_level_2>;
+				<3 RK_PA6 5 &pcfg_pull_up_drv_level_5>;
 		};
 		sdmmc2m1_cmd: sdmmc2m1-cmd {
 			rockchip,pins =
 				/* sdmmc2_cmdm1 */
-				<3 RK_PA5 5 &pcfg_pull_up_drv_level_2>;
+				<3 RK_PA5 5 &pcfg_pull_up_drv_level_5>;
 		};
 		sdmmc2detm1: sdmmc2detm1 {
 			rockchip,pins =
@@ -1620,6 +1659,18 @@
 			rockchip,pins =
 				<0 RK_PB6 2 &pcfg_pull_none>;
 		};
+		spi0clkm0_hs: spi0clkm0-hs {
+			rockchip,pins =
+				<0 RK_PB5 2 &pcfg_pull_up_drv_level_1>;
+		};
+		spi0misom0_hs: spi0misom0-hs {
+			rockchip,pins =
+				<0 RK_PC5 2 &pcfg_pull_up_drv_level_1>;
+		};
+		spi0mosim0_hs: spi0mosim0-hs {
+			rockchip,pins =
+				<0 RK_PB6 2 &pcfg_pull_up_drv_level_1>;
+		};
 		spi0clkm1: spi0clkm1 {
 			rockchip,pins =
 				<2 RK_PD3 3 &pcfg_pull_none>;
@@ -1636,6 +1687,18 @@
 			rockchip,pins =
 				<2 RK_PD1 3 &pcfg_pull_none>;
 		};
+		spi0clkm1_hs: spi0clkm1-hs {
+			rockchip,pins =
+				<2 RK_PD3 3 &pcfg_pull_up_drv_level_1>;
+		};
+		spi0misom1_hs: spi0misom1-hs {
+			rockchip,pins =
+				<2 RK_PD0 3 &pcfg_pull_up_drv_level_1>;
+		};
+		spi0mosim1_hs: spi0mosim1-hs {
+			rockchip,pins =
+				<2 RK_PD1 3 &pcfg_pull_up_drv_level_1>;
+		};
 	};
 	spi1 {
 		spi1clkm0: spi1clkm0 {
@@ -1658,6 +1721,18 @@
 			rockchip,pins =
 				<2 RK_PB7 4 &pcfg_pull_none>;
 		};
+		spi1clkm0_hs: spi1clkm0-hs {
+			rockchip,pins =
+				<2 RK_PB5 3 &pcfg_pull_up_drv_level_1>;
+		};
+		spi1misom0_hs: spi1misom0-hs {
+			rockchip,pins =
+				<2 RK_PB6 3 &pcfg_pull_up_drv_level_1>;
+		};
+		spi1mosim0_hs: spi1mosim0-hs {
+			rockchip,pins =
+				<2 RK_PB7 4 &pcfg_pull_up_drv_level_1>;
+		};
 		spi1clkm1: spi1clkm1 {
 			rockchip,pins =
 				<3 RK_PC3 3 &pcfg_pull_none>;
@@ -1674,6 +1749,18 @@
 			rockchip,pins =
 				<3 RK_PC1 3 &pcfg_pull_none>;
 		};
+		spi1clkm1_hs: spi1clkm1-hs {
+			rockchip,pins =
+				<3 RK_PC3 3 &pcfg_pull_up_drv_level_1>;
+		};
+		spi1misom1_hs: spi1misom1-hs {
+			rockchip,pins =
+				<3 RK_PC2 3 &pcfg_pull_up_drv_level_1>;
+		};
+		spi1mosim1_hs: spi1mosim1-hs {
+			rockchip,pins =
+				<3 RK_PC1 3 &pcfg_pull_up_drv_level_1>;
+		};
 	};
 	spi2 {
 		spi2clkm0: spi2clkm0 {
@@ -1696,6 +1783,18 @@
 			rockchip,pins =
 				<2 RK_PC3 4 &pcfg_pull_none>;
 		};
+		spi2clkm0_hs: spi2clkm0-hs {
+			rockchip,pins =
+				<2 RK_PC1 4 &pcfg_pull_up_drv_level_1>;
+		};
+		spi2misom0_hs: spi2misom0-hs {
+			rockchip,pins =
+				<2 RK_PC2 4 &pcfg_pull_up_drv_level_1>;
+		};
+		spi2mosim0_hs: spi2mosim0-hs {
+			rockchip,pins =
+				<2 RK_PC3 4 &pcfg_pull_up_drv_level_1>;
+		};
 		spi2clkm1: spi2clkm1 {
 			rockchip,pins =
 				<3 RK_PA0 3 &pcfg_pull_none>;
@@ -1716,6 +1815,18 @@
 			rockchip,pins =
 				<2 RK_PD6 3 &pcfg_pull_none>;
 		};
+		spi2clkm1_hs: spi2clkm1-hs {
+			rockchip,pins =
+				<3 RK_PA0 3 &pcfg_pull_up_drv_level_1>;
+		};
+		spi2misom1_hs: spi2misom1-hs {
+			rockchip,pins =
+				<2 RK_PD7 3 &pcfg_pull_up_drv_level_1>;
+		};
+		spi2mosim1_hs: spi2mosim1-hs {
+			rockchip,pins =
+				<2 RK_PD6 3 &pcfg_pull_up_drv_level_1>;
+		};
 	};
 	spi3 {
 		spi3clkm0: spi3clkm0 {
@@ -1738,6 +1849,18 @@
 			rockchip,pins =
 				<4 RK_PB2 4 &pcfg_pull_none>;
 		};
+		spi3clkm0_hs: spi3clkm0-hs {
+			rockchip,pins =
+				<4 RK_PB3 4 &pcfg_pull_up_drv_level_1>;
+		};
+		spi3misom0_hs: spi3misom0-hs {
+			rockchip,pins =
+				<4 RK_PB0 4 &pcfg_pull_up_drv_level_1>;
+		};
+		spi3mosim0_hs: spi3mosim0-hs {
+			rockchip,pins =
+				<4 RK_PB2 4 &pcfg_pull_up_drv_level_1>;
+		};
 		spi3clkm1: spi3clkm1 {
 			rockchip,pins =
 				<4 RK_PC2 2 &pcfg_pull_none>;
@@ -1758,8 +1881,23 @@
 			rockchip,pins =
 				<4 RK_PC3 2 &pcfg_pull_none>;
 		};
+		spi3clkm1_hs: spi3clkm1-hs {
+			rockchip,pins =
+				<4 RK_PC2 2 &pcfg_pull_up_drv_level_1>;
+		};
+		spi3misom1_hs: spi3misom1-hs {
+			rockchip,pins =
+				<4 RK_PC5 2 &pcfg_pull_up_drv_level_1>;
+		};
+		spi3mosim1_hs: spi3mosim1-hs {
+			rockchip,pins =
+				<4 RK_PC3 2 &pcfg_pull_up_drv_level_1>;
+		};
 	};
 	tsadc {
+		tsadc_gpio: tsadc-gpio {
+			rockchip,pins = <0 RK_PA1 0 &pcfg_pull_none>;
+		};
 		tsadcm0_pins: tsadcm0-pins {
 			rockchip,pins =
 				/* tsadc_shutm0 */
diff --git a/arch/arm/dts/rk3568.dtsi b/arch/arm/dts/rk3568.dtsi
index a462fdf9b1..3b4a7b62e5 100644
--- a/arch/arm/dts/rk3568.dtsi
+++ b/arch/arm/dts/rk3568.dtsi
@@ -7,6 +7,8 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/soc/rockchip,boot-mode.h>
+#include <dt-bindings/phy/phy.h>
 #include <dt-bindings/power/rk3568-power.h>
 
 / {
@@ -17,12 +19,23 @@
 	#size-cells = <2>;
 
 	aliases {
+		dsi0 = &dsi0;
+		dsi1 = &dsi1;
+		ethernet0 = &gmac0;
+		ethernet1 = &gmac1;
+		gpio0 = &gpio0;
+		gpio1 = &gpio1;
+		gpio2 = &gpio2;
+		gpio3 = &gpio3;
+		gpio4 = &gpio4;
 		i2c0 = &i2c0;
 		i2c1 = &i2c1;
 		i2c2 = &i2c2;
 		i2c3 = &i2c3;
 		i2c4 = &i2c4;
 		i2c5 = &i2c5;
+		lvds0 = &lvds0;
+		lvds1 = &lvds1;
 		serial0 = &uart0;
 		serial1 = &uart1;
 		serial2 = &uart2;
@@ -48,13 +61,17 @@
 			compatible = "arm,cortex-a55";
 			reg = <0x0 0x0>;
 			enable-method = "psci";
+			clocks = <&cru ARMCLK>;
+			operating-points-v2 = <&cpu0_opp_table>;
 		};
-#if 0
+
 		cpu1: cpu@100 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a55";
 			reg = <0x0 0x100>;
 			enable-method = "psci";
+			clocks = <&cru ARMCLK>;
+			operating-points-v2 = <&cpu0_opp_table>;
 		};
 
 		cpu2: cpu@200 {
@@ -62,6 +79,8 @@
 			compatible = "arm,cortex-a55";
 			reg = <0x0 0x200>;
 			enable-method = "psci";
+			clocks = <&cru ARMCLK>;
+			operating-points-v2 = <&cpu0_opp_table>;
 		};
 
 		cpu3: cpu@300 {
@@ -69,11 +88,43 @@
 			compatible = "arm,cortex-a55";
 			reg = <0x0 0x300>;
 			enable-method = "psci";
+			clocks = <&cru ARMCLK>;
+			operating-points-v2 = <&cpu0_opp_table>;
+		};
+	};
+
+	cpu0_opp_table: cpu0-opp-table {
+		compatible = "operating-points-v2";
+		opp-shared;
+
+		opp-408000000 {
+			opp-hz = /bits/ 64 <408000000>;
+			opp-microvolt = <1000000 1000000 1250000>;
+			clock-latency-ns = <40000>;
+		};
+		opp-600000000 {
+			opp-hz = /bits/ 64 <600000000>;
+			opp-microvolt = <1000000 1000000 1250000>;
+			clock-latency-ns = <40000>;
+		};
+		opp-816000000 {
+			opp-hz = /bits/ 64 <816000000>;
+			opp-microvolt = <1000000 1000000 1250000>;
+			clock-latency-ns = <40000>;
+			opp-suspend;
+		};
+		opp-1008000000 {
+			opp-hz = /bits/ 64 <1008000000>;
+			opp-microvolt = <1000000 1000000 1250000>;
+			clock-latency-ns = <40000>;
+		};
+		opp-1200000000 {
+			opp-hz = /bits/ 64 <1200000000>;
+			opp-microvolt = <1000000 1000000 1250000>;
+			clock-latency-ns = <40000>;
 		};
-#endif
 	};
 
-#if 0
 	arm-pmu {
 		compatible = "arm,cortex-a55-pmu", "arm,armv8-pmuv3";
 		interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH>,
@@ -82,13 +133,49 @@
 			     <GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
 	};
-#endif
+
+	display_subsystem: display-subsystem {
+		compatible = "rockchip,display-subsystem";
+		ports = <&vop_out>;
+	};
+
+	mpp_srv: mpp-srv {
+		compatible = "rockchip,mpp-service";
+		rockchip,taskqueue-count = <5>;
+		rockchip,resetgroup-count = <5>;
+		status = "disabled";
+	};
 
 	psci {
 		compatible = "arm,psci-1.0";
 		method = "smc";
 	};
 
+	thermal_zones: thermal-zones {
+		soc_thermal: soc-thermal {
+			polling-delay-passive = <20>; /* milliseconds */
+			polling-delay = <1000>; /* milliseconds */
+
+			thermal-sensors = <&tsadc 0>;
+			trips {
+				soc_crit: soc-crit {
+					/* millicelsius */
+					temperature = <115000>;
+					/* millicelsius */
+					hysteresis = <2000>;
+					type = "critical";
+				};
+			};
+		};
+
+		gpu_thermal: gpu-thermal {
+			polling-delay-passive = <20>; /* milliseconds */
+			polling-delay = <1000>; /* milliseconds */
+
+			thermal-sensors = <&tsadc 1>;
+		};
+	};
+
 	timer {
 		compatible = "arm,armv8-timer";
 		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
@@ -97,6 +184,20 @@
 			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
 	};
 
+	gmac0_clkin: external-gmac0-clock {
+		compatible = "fixed-clock";
+		clock-frequency = <125000000>;
+		clock-output-names = "gmac0_clkin";
+		#clock-cells = <0>;
+	};
+
+	gmac1_clkini: external-gmac1-clock {
+		compatible = "fixed-clock";
+		clock-frequency = <125000000>;
+		clock-output-names = "gmac1_clkin";
+		#clock-cells = <0>;
+	};
+
 	xin24m: xin24m {
 		compatible = "fixed-clock";
 		#clock-cells = <0>;
@@ -104,6 +205,51 @@
 		clock-output-names = "xin24m";
 	};
 
+	sata0: sata@fc000000 {
+		compatible = "snps,dwc-ahci";
+		reg = <0 0xfc000000 0 0x1000>;
+		clocks = <&cru ACLK_SATA0>, <&cru CLK_SATA0_PMALIVE>,
+			 <&cru CLK_SATA0_RXOOB>;
+		clock-names = "sata", "pmalive", "rxoob";
+		interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "hostc";
+		phys = <&combphy0_us PHY_TYPE_SATA>;
+		phy-names = "sata-phy";
+		ports-implemented = <0x1>;
+		power-domains = <&power RK3568_PD_PIPE>;
+		status = "disabled";
+	};
+
+	sata1: sata@fc400000 {
+		compatible = "snps,dwc-ahci";
+		reg = <0 0xfc400000 0 0x1000>;
+		clocks = <&cru ACLK_SATA1>, <&cru CLK_SATA1_PMALIVE>,
+			 <&cru CLK_SATA1_RXOOB>;
+		clock-names = "sata", "pmalive", "rxoob";
+		interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "hostc";
+		phys = <&combphy1_usq PHY_TYPE_SATA>;
+		phy-names = "sata-phy";
+		ports-implemented = <0x1>;
+		power-domains = <&power RK3568_PD_PIPE>;
+		status = "disabled";
+	};
+
+	sata2: sata@fc800000 {
+		compatible = "snps,dwc-ahci";
+		reg = <0 0xfc800000 0 0x1000>;
+		clocks = <&cru ACLK_SATA2>, <&cru CLK_SATA2_PMALIVE>,
+			 <&cru CLK_SATA2_RXOOB>;
+		clock-names = "sata", "pmalive", "rxoob";
+		interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "hostc";
+		phys = <&combphy2_psq PHY_TYPE_SATA>;
+		phy-names = "sata-phy";
+		ports-implemented = <0x1>;
+		power-domains = <&power RK3568_PD_PIPE>;
+		status = "disabled";
+	};
+
 	usbdrd30: usbdrd {
 		compatible = "rockchip,rk3568-dwc3", "rockchip,rk3399-dwc3";
 		clocks = <&cru CLK_USB3OTG0_REF>, <&cru CLK_USB3OTG0_SUSPEND>,
@@ -183,6 +329,7 @@
 			compatible = "arm,gic-v3-its";
 			msi-controller;
 			reg = <0x0 0xfd440000 0x0 0x20000>;
+			status = "disabled";
 		};
 	};
 
@@ -190,10 +337,11 @@
 		compatible = "generic-ehci";
 		reg = <0x0 0xfd800000 0x0 0x40000>;
 		interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru HCLK_USB2HOST0>, <&cru HCLK_USB2HOST0_ARB>;
-		clock-names = "usbhost", "arbiter";
+		clocks = <&cru HCLK_USB2HOST0>, <&cru HCLK_USB2HOST0_ARB>,
+			 <&cru PCLK_USB>, <&usb2phy1>;
+		clock-names = "usbhost", "arbiter", "pclk", "utmi";
 		phys = <&u2phy1_otg>;
-		phy-names = "usb";
+		phy-names = "usb2-phy";
 		status = "disabled";
 	};
 
@@ -201,10 +349,11 @@
 		compatible = "generic-ohci";
 		reg = <0x0 0xfd840000 0x0 0x40000>;
 		interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru HCLK_USB2HOST0>, <&cru HCLK_USB2HOST0_ARB>;
-		clock-names = "usbhost", "arbiter";
+		clocks = <&cru HCLK_USB2HOST0>, <&cru HCLK_USB2HOST0_ARB>,
+			 <&cru PCLK_USB>, <&usb2phy1>;
+		clock-names = "usbhost", "arbiter", "pclk", "utmi";
 		phys = <&u2phy1_otg>;
-		phy-names = "usb";
+		phy-names = "usb2-phy";
 		status = "disabled";
 	};
 
@@ -212,10 +361,11 @@
 		compatible = "generic-ehci";
 		reg = <0x0 0xfd880000 0x0 0x40000>;
 		interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru HCLK_USB2HOST1>, <&cru HCLK_USB2HOST1_ARB>;
-		clock-names = "usbhost", "arbiter";
+		clocks = <&cru HCLK_USB2HOST1>, <&cru HCLK_USB2HOST1_ARB>,
+			 <&cru PCLK_USB>, <&usb2phy1>;
+		clock-names = "usbhost", "arbiter", "pclk", "utmi";
 		phys = <&u2phy1_host>;
-		phy-names = "usb";
+		phy-names = "usb2-phy";
 		status = "disabled";
 	};
 
@@ -223,21 +373,36 @@
 		compatible = "generic-ohci";
 		reg = <0x0 0xfd8c0000 0x0 0x40000>;
 		interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru HCLK_USB2HOST1>, <&cru HCLK_USB2HOST1_ARB>;
-		clock-names = "usbhost", "arbiter";
+		clocks = <&cru HCLK_USB2HOST1>, <&cru HCLK_USB2HOST1_ARB>,
+			 <&cru PCLK_USB>, <&usb2phy1>;
+		clock-names = "usbhost", "arbiter", "pclk", "utmi";
 		phys = <&u2phy1_host>;
-		phy-names = "usb";
+		phy-names = "usb2-phy";
 		status = "disabled";
 	};
 
 	pmugrf: syscon@fdc20000 {
-		compatible = "rockchip,rk3568-grf", "syscon", "simple-mfd";
+		compatible = "rockchip,rk3568-pmugrf", "syscon", "simple-mfd";
 		reg = <0x0 0xfdc20000 0x0 0x10000>;
 
 		pmu_io_domains: io-domains {
 			compatible = "rockchip,rk3568-pmu-io-voltage-domain";
 			status = "disabled";
 		};
+
+		reboot_mode: reboot-mode {
+			compatible = "syscon-reboot-mode";
+			offset = <0x200>;
+			mode-bootloader = <BOOT_BL_DOWNLOAD>;
+			mode-charge = <BOOT_CHARGING>;
+			mode-fastboot = <BOOT_FASTBOOT>;
+			mode-loader = <BOOT_BL_DOWNLOAD>;
+			mode-normal = <BOOT_NORMAL>;
+			mode-recovery = <BOOT_RECOVERY>;
+			mode-ums = <BOOT_UMS>;
+			mode-panic = <BOOT_PANIC>;
+			mode-watchdog = <BOOT_WATCHDOG>;
+		};
 	};
 
 	pipegrf: syscon@fdc50000 {
@@ -253,6 +418,87 @@
 			compatible = "rockchip,rk3568-io-voltage-domain";
 			status = "disabled";
 		};
+
+		lvds0: lvds0 {
+			compatible = "rockchip,rk3568-lvds";
+			phys = <&video_phy0>;
+			phy-names = "phy";
+			status = "disabled";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+					#address-cells = <1>;
+					#size-cells = <0>;
+
+					lvds0_in_vp1: endpoint@0 {
+						reg = <0>;
+						remote-endpoint = <&vp1_out_lvds0>;
+					};
+
+					lvds0_in_vp2: endpoint@1 {
+						reg = <1>;
+						remote-endpoint = <&vp2_out_lvds0>;
+					};
+				};
+			};
+		};
+
+		lvds1: lvds1 {
+			compatible = "rockchip,rk3568-lvds";
+			phys = <&video_phy1>;
+			phy-names = "phy";
+			status = "disabled";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+					#address-cells = <1>;
+					#size-cells = <0>;
+
+					lvds1_in_vp1: endpoint@0 {
+						reg = <0>;
+						remote-endpoint = <&vp1_out_lvds1>;
+					};
+
+					lvds1_in_vp2: endpoint@1 {
+						reg = <1>;
+						remote-endpoint = <&vp2_out_lvds1>;
+					};
+				};
+			};
+		};
+
+		rgb: rgb {
+			compatible = "rockchip,rk3568-rgb";
+			pinctrl-names = "default";
+			pinctrl-0 = <&lcdc_ctl>;
+			status = "disabled";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+					#address-cells = <1>;
+					#size-cells = <0>;
+
+					rgb_in_vp2: endpoint@0 {
+						reg = <0>;
+						remote-endpoint = <&vp2_out_rgb>;
+					};
+				};
+
+			};
+		};
+
 	};
 
 	pipe_phy_grf0: syscon@fdc70000 {
@@ -280,6 +526,22 @@
 		reg = <0x0 0xfdca8000 0x0 0x8000>;
 	};
 
+	edp_phy: edp-phy@fdcb0000 {
+		compatible = "rockchip,rk3568-edp-phy";
+		reg = <0x0 0xfdcb0000 0x0 0x8000>;
+		clocks = <&pmucru XIN_OSC0_EDPPHY_G>, <&cru PCLK_EDPPHY_GRF>;
+		clock-names = "refclk", "pclk";
+		resets = <&cru SRST_P_EDPPHY_GRF>;
+		reset-names = "apb";
+		#phy-cells = <0>;
+		status = "disabled";
+	};
+
+	pcie30_phy_grf: syscon@fdcb8000 {
+		compatible = "rockchip,pcie30-phy-grf", "syscon";
+		reg = <0x0 0xfdcb8000 0x0 0x10000>;
+	};
+
 	pmucru: clock-controller@fdd00000 {
 		compatible = "rockchip,rk3568-pmucru";
 		reg = <0x0 0xfdd00000 0x0 0x1000>;
@@ -302,15 +564,17 @@
 			<&cru ACLK_BUS>, <&cru PCLK_BUS>,
 			<&cru ACLK_TOP_HIGH>, <&cru ACLK_TOP_LOW>,
 			<&cru HCLK_TOP>, <&cru PCLK_TOP>,
-			<&cru ACLK_PERIMID>, <&cru HCLK_PERIMID>;
+			<&cru ACLK_PERIMID>, <&cru HCLK_PERIMID>,
+			<&cru PLL_NPLL>;
 		assigned-clock-rates =
-			<32768>, <100000000>,
+			<32768>, <200000000>,
 			<100000000>, <1000000000>,
 			<1188000000>, <600000000>,
 			<150000000>, <100000000>,
 			<300000000>, <200000000>,
 			<150000000>, <100000000>,
-			<300000000>, <150000000>;
+			<300000000>, <150000000>,
+			<1200000000>;
 		assigned-clock-parents =
 			<&pmucru CLK_RTC32K_FRAC>;
 	};
@@ -400,28 +664,40 @@
 			/* These power domains are grouped by VD_NPU */
 			pd_npu@RK3568_PD_NPU {
 				reg = <RK3568_PD_NPU>;
+				clocks = <&cru ACLK_NPU_PRE>,
+					 <&cru HCLK_NPU_PRE>,
+					 <&cru PCLK_NPU_PRE>;
 				pm_qos = <&qos_npu>;
 			};
 			/* These power domains are grouped by VD_GPU */
 			pd_gpu@RK3568_PD_GPU {
 				reg = <RK3568_PD_GPU>;
+				clocks = <&cru ACLK_GPU_PRE>,
+					 <&cru PCLK_GPU_PRE>;
 				pm_qos = <&qos_gpu>;
 			};
 			/* These power domains are grouped by VD_LOGIC */
 			pd_vi@RK3568_PD_VI {
 				reg = <RK3568_PD_VI>;
+				clocks = <&cru HCLK_VI>,
+					 <&cru PCLK_VI>;
 				pm_qos = <&qos_isp>,
 					 <&qos_vicap0>,
 					 <&qos_vicap1>;
 			};
 			pd_vo@RK3568_PD_VO {
 				reg = <RK3568_PD_VO>;
+				clocks = <&cru HCLK_VO>,
+					 <&cru PCLK_VO>,
+					 <&cru ACLK_VOP_PRE>;
 				pm_qos = <&qos_hdcp>,
 					 <&qos_vop_m0>,
 					 <&qos_vop_m1>;
 			};
 			pd_rga@RK3568_PD_RGA {
 				reg = <RK3568_PD_RGA>;
+				clocks = <&cru HCLK_RGA_PRE>,
+					 <&cru PCLK_RGA_PRE>;
 				pm_qos = <&qos_ebc>,
 					 <&qos_iep>,
 					 <&qos_jpeg_dec>,
@@ -431,20 +707,24 @@
 			};
 			pd_vpu@RK3568_PD_VPU {
 				reg = <RK3568_PD_VPU>;
+				clocks = <&cru HCLK_VPU_PRE>;
 				pm_qos = <&qos_vpu>;
 			};
 			pd_rkvdec@RK3568_PD_RKVDEC {
+				clocks = <&cru HCLK_RKVDEC_PRE>;
 				reg = <RK3568_PD_RKVDEC>;
 				pm_qos = <&qos_rkvdec>;
 			};
 			pd_rkvenc@RK3568_PD_RKVENC {
 				reg = <RK3568_PD_RKVENC>;
+				clocks = <&cru HCLK_RKVENC_PRE>;
 				pm_qos = <&qos_rkvenc_rd_m0>,
 					 <&qos_rkvenc_rd_m1>,
 					 <&qos_rkvenc_wr_m0>;
 			};
 			pd_pipe@RK3568_PD_PIPE {
 				reg = <RK3568_PD_PIPE>;
+				clocks = <&cru PCLK_PIPE>;
 				pm_qos = <&qos_pcie2x1>,
 					 <&qos_pcie3x1>,
 					 <&qos_pcie3x2>,
@@ -457,6 +737,21 @@
 		};
 	};
 
+	pvtm@fde00000 {
+		compatible = "rockchip,rk3568-core-pvtm";
+		reg = <0x0 0xfde00000 0x0 0x100>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		pvtm@0 {
+			reg = <0>;
+			clocks = <&cru CLK_CORE_PVTM>, <&cru PCLK_CORE_PVTM>;
+			clock-names = "clk", "pclk";
+			resets = <&cru SRST_CORE_PVTM>, <&cru SRST_P_CORE_PVTM>;
+			reset-names = "rts", "rst-p";
+			thermal-zone = "soc-thermal";
+		};
+	};
+
 	gpu: gpu@fde60000 {
 		compatible = "arm,malit602", "arm,malit60x", "arm,malit6xx", "arm,mali-midgard";
 		reg = <0x0 0xfde60000 0x0 0x4000>;
@@ -506,6 +801,702 @@
 		};
 	};
 
+	pvtm@fde80000 {
+		compatible = "rockchip,rk3568-gpu-pvtm";
+		reg = <0x0 0xfde80000 0x0 0x100>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		pvtm@1 {
+			reg = <1>;
+			clocks = <&cru CLK_GPU_PVTM>, <&cru PCLK_GPU_PVTM>;
+			clock-names = "clk", "pclk";
+			resets = <&cru SRST_GPU_PVTM>, <&cru SRST_P_GPU_PVTM>;
+			reset-names = "rts", "rst-p";
+			thermal-zone = "gpu-thermal";
+		};
+	};
+
+	pvtm@fde90000 {
+		compatible = "rockchip,rk3568-npu-pvtm";
+		reg = <0x0 0xfde90000 0x0 0x100>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		pvtm@2 {
+			reg = <2>;
+			clocks = <&cru CLK_NPU_PVTM>, <&cru PCLK_NPU_PVTM>,
+				 <&cru HCLK_NPU_PRE>;
+			clock-names = "clk", "pclk", "hclk";
+			resets = <&cru SRST_NPU_PVTM>, <&cru SRST_P_NPU_PVTM>;
+			reset-names = "rts", "rst-p";
+			thermal-zone = "soc-thermal";
+		};
+	};
+
+	vdpu: vdpu@fdea0400 {
+		compatible = "rockchip,vpu-decoder-v2";
+		reg = <0x0 0xfdea0400 0x0 0x400>;
+		interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "irq_dec";
+		clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
+		clock-names = "aclk_vcodec", "hclk_vcodec";
+		resets = <&cru SRST_A_VPU>, <&cru SRST_H_VPU>;
+		reset-names = "video_a", "video_h";
+		iommus = <&vdpu_mmu>;
+		power-domains = <&power RK3568_PD_VPU>;
+		rockchip,srv = <&mpp_srv>;
+		rockchip,taskqueue-node = <0>;
+		rockchip,resetgroup-node = <0>;
+		status = "disabled";
+	};
+
+	vdpu_mmu: iommu@fdea0800 {
+		compatible = "rockchip,iommu-v2";
+		reg = <0x0 0xfdea0800 0x0 0x40>;
+		interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "vdpu_mmu";
+		clock-names = "aclk", "iface";
+		clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
+		power-domains = <&power RK3568_PD_VPU>;
+		#iommu-cells = <0>;
+		status = "disabled";
+	};
+
+	rk_rga: rk_rga@fdeb0000 {
+		compatible = "rockchip,rga2";
+		reg = <0x0 0xfdeb0000 0x0 0x1000>;
+		interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru CLK_RGA_CORE>;
+		clock-names = "aclk_rga", "hclk_rga", "clk_rga";
+		power-domains = <&power RK3568_PD_RGA>;
+		status = "disabled";
+	};
+
+	ebc: ebc@fdec0000 {
+		compatible = "rockchip,rk3568-ebc-tcon";
+		reg = <0x0 0xfdec0000 0x0 0x5000>;
+		interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_EBC>, <&cru DCLK_EBC>;
+		clock-names = "hclk", "dclk";
+		power-domains = <&power RK3568_PD_RGA>;
+		rockchip,grf = <&grf>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&ebc_pins>;
+		status = "disabled";
+	};
+
+	jpegd: jpegd@fded0000 {
+		compatible = "rockchip,rkv-jpeg-decoder-v1";
+		reg = <0x0 0xfded0000 0x0 0x400>;
+		interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_JDEC>, <&cru HCLK_JDEC>;
+		clock-names = "aclk_vcodec", "hclk_vcodec";
+		rockchip,normal-rates = <297000000>, <0>;
+		resets = <&cru SRST_A_JDEC>, <&cru SRST_H_JDEC>;
+		reset-names = "video_a", "video_h";
+		iommus = <&jpegd_mmu>;
+		rockchip,srv = <&mpp_srv>;
+		rockchip,taskqueue-node = <1>;
+		rockchip,resetgroup-node = <1>;
+		power-domains = <&power RK3568_PD_RGA>;
+		status = "disabled";
+	};
+
+	jpegd_mmu: iommu@fded0480 {
+		compatible = "rockchip,iommu-v2";
+		reg = <0x0 0xfded0480 0x0 0x40>;
+		interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "jpegd_mmu";
+		clock-names = "aclk", "iface";
+		clocks = <&cru ACLK_JDEC>, <&cru HCLK_JDEC>;
+		power-domains = <&power RK3568_PD_RGA>;
+		#iommu-cells = <0>;
+		status = "disabled";
+	};
+
+	vepu: vepu@fdee0000 {
+		compatible = "rockchip,vpu-encoder-v2";
+		reg = <0x0 0xfdee0000 0x0 0x400>;
+		interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_JENC>, <&cru HCLK_JENC>;
+		clock-names = "aclk_vcodec", "hclk_vcodec";
+		rockchip,normal-rates = <297000000>, <0>;
+		resets = <&cru SRST_A_JENC>, <&cru SRST_H_JENC>;
+		reset-names = "video_a", "video_h";
+		iommus = <&vepu_mmu>;
+		rockchip,srv = <&mpp_srv>;
+		rockchip,taskqueue-node = <2>;
+		rockchip,resetgroup-node = <2>;
+		power-domains = <&power RK3568_PD_RGA>;
+		status = "disabled";
+	};
+
+	vepu_mmu: iommu@fdee0800 {
+		compatible = "rockchip,iommu-v2";
+		reg = <0x0 0xfdee0800 0x0 0x40>;
+		interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "vepu_mmu";
+		clock-names = "aclk", "iface";
+		clocks = <&cru ACLK_JENC>, <&cru HCLK_JENC>;
+		power-domains = <&power RK3568_PD_RGA>;
+		#iommu-cells = <0>;
+		status = "disabled";
+	};
+
+	iep: iep@fdef0000 {
+		compatible = "rockchip,iep-v2";
+		reg = <0x0 0xfdef0000 0x0 0x500>;
+		interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>, <&cru CLK_IEP_CORE>;
+		clock-names = "aclk", "hclk", "sclk";
+		resets = <&cru SRST_A_IEP>, <&cru SRST_H_IEP>,
+			<&cru SRST_IEP_CORE>;
+		reset-names = "rst_a", "rst_h", "rst_s";
+		power-domains = <&power RK3568_PD_RGA>;
+		rockchip,srv = <&mpp_srv>;
+		rockchip,taskqueue-node = <5>;
+		rockchip,resetgroup-node = <5>;
+		iommus = <&iep_mmu>;
+		status = "disabled";
+	};
+
+	iep_mmu: iommu@fdef0800 {
+		compatible = "rockchip,iommu-v2";
+		reg = <0x0 0xfdef0800 0x0 0x100>;
+		interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "iep_mmu";
+		clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
+		clock-names = "aclk", "iface";
+		#iommu-cells = <0>;
+		power-domains = <&power RK3568_PD_RGA>;
+		//rockchip,disable-device-link-resume;
+		status = "disabled";
+	};
+
+	eink: eink@fdf00000 {
+		compatible = "rockchip,rk3568-eink-tcon";
+		reg = <0x0 0xfdf00000 0x0 0x74>;
+		interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru PCLK_EINK>, <&cru HCLK_EINK>;
+		clock-names = "pclk", "hclk";
+		status = "disabled";
+	};
+
+	rkvenc: rkvenc@fdf40000 {
+		compatible = "rockchip,rkv-encoder-v1";
+		reg = <0x0 0xfdf40000 0x0 0x400>;
+		interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "irq_enc";
+		clocks = <&cru ACLK_RKVENC>, <&cru HCLK_RKVENC>,
+			<&cru CLK_RKVENC_CORE>;
+		clock-names = "aclk_vcodec", "hclk_vcodec", "clk_core";
+		rockchip,normal-rates = <297000000>, <0>, <400000000>;
+		rockchip,advanced-rates = <297000000>, <0>, <500000000>;
+		rockchip,default-max-load = <2088960>;
+		resets = <&cru SRST_A_RKVENC>, <&cru SRST_H_RKVENC>,
+			<&cru SRST_RKVENC_CORE>;
+		reset-names = "video_a", "video_h", "video_core";
+		assigned-clocks = <&cru ACLK_RKVENC>, <&cru CLK_RKVENC_CORE>;
+		assigned-clock-rates = <297000000>, <297000000>;
+		iommus = <&rkvenc_mmu>;
+		node-name = "rkvenc";
+		rockchip,srv = <&mpp_srv>;
+		rockchip,taskqueue-node = <3>;
+		rockchip,resetgroup-node = <3>;
+		power-domains = <&power RK3568_PD_RKVENC>;
+		status = "disabled";
+	};
+
+	rkvenc_mmu: iommu@fdf40f00 {
+		compatible = "rockchip,iommu-v2";
+		reg = <0x0 0xfdf40f00 0x0 0x40>, <0x0 0xfdf40f40 0x0 0x40>;
+		interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
+			<GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "rkvenc_mmu0", "rkvenc_mmu1";
+		clocks = <&cru ACLK_RKVENC>, <&cru HCLK_RKVENC>;
+		clock-names = "aclk", "iface";
+		rockchip,disable-mmu-reset;
+		rockchip,enable-cmd-retry;
+		#iommu-cells = <0>;
+		power-domains = <&power RK3568_PD_RKVENC>;
+		status = "disabled";
+	};
+
+	rkvdec: rkvdec@fdf80200 {
+		compatible = "rockchip,rkv-decoder-v2";
+		reg = <0x0 0xfdf80200 0x0 0x400>;
+		interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "irq_dec";
+		clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>,
+			 <&cru CLK_RKVDEC_CA>, <&cru CLK_RKVDEC_CORE>,
+			 <&cru CLK_RKVDEC_HEVC_CA>;
+		clock-names = "aclk_vcodec", "hclk_vcodec","clk_cabac",
+			      "clk_core", "clk_hevc_cabac";
+		rockchip,normal-rates = <297000000>, <0>, <297000000>,
+					<297000000>, <400000000>;
+		rockchip,advanced-rates = <400000000>, <0>, <400000000>,
+					<400000000>, <500000000>;
+		rockchip,default-max-load = <2088960>;
+		resets = <&cru SRST_A_RKVDEC>, <&cru SRST_H_RKVDEC>,
+			 <&cru SRST_RKVDEC_CA>, <&cru SRST_RKVDEC_CORE>,
+			 <&cru SRST_RKVDEC_HEVC_CA>;
+		assigned-clocks = <&cru ACLK_RKVDEC>, <&cru CLK_RKVDEC_CA>,
+				  <&cru CLK_RKVDEC_CORE>, <&cru CLK_RKVDEC_HEVC_CA>;
+		assigned-clock-rates = <297000000>, <297000000>, <297000000>, <297000000>;
+		reset-names = "video_a", "video_h", "video_cabac",
+			      "video_core", "video_hevc_cabac";
+		power-domains = <&power RK3568_PD_RKVDEC>;
+		iommus = <&rkvdec_mmu>;
+		rockchip,srv = <&mpp_srv>;
+		rockchip,taskqueue-node = <4>;
+		rockchip,resetgroup-node = <4>;
+		status = "disabled";
+	};
+
+	rkvdec_mmu: iommu@fdf80800 {
+		compatible = "rockchip,iommu-v2";
+		reg = <0x0 0xfdf80800 0x0 0x40>, <0x0 0xfdf80840 0x0 0x40>;
+		interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "rkvdec_mmu";
+		clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>;
+		clock-names = "aclk", "iface";
+		power-domains = <&power RK3568_PD_RKVDEC>;
+		#iommu-cells = <0>;
+		status = "disabled";
+	};
+
+	mipi_csi2: mipi-csi2@fdfb0000 {
+		compatible = "rockchip,rk3568-mipi-csi2";
+		reg = <0x0 0xfdfb0000 0x0 0x10000>;
+		reg-names = "csihost_regs";
+		interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "csi-intr1", "csi-intr2";
+		clocks = <&cru PCLK_CSI2HOST1>, <&cru SRST_P_CSI2HOST1>;
+		clock-names = "pclk_csi2host", "srst_csihost_p";
+		power-domains = <&power RK3568_PD_VI>;
+		status = "disabled";
+	};
+
+	rkcif: rkcif@fdfe0000 {
+		compatible = "rockchip,rk3568-cif";
+		reg = <0x0 0xfdfe0000 0x0 0x8000>;
+		reg-names = "cif_regs";
+		interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "cif-intr";
+
+		clocks = <&cru ACLK_VICAP>, <&cru HCLK_VICAP>,
+			 <&cru DCLK_VICAP>, <&cru ICLK_VICAP_G>;
+		clock-names = "aclk_cif", "hclk_cif",
+			      "dclk_cif", "iclk_cif_g";
+		resets = <&cru SRST_A_VICAP>, <&cru SRST_H_VICAP>,
+			 <&cru SRST_D_VICAP>, <&cru SRST_P_VICAP>,
+			 <&cru SRST_I_VICAP>;
+		reset-names = "rst_cif_a", "rst_cif_h",
+			      "rst_cif_d", "rst_cif_p",
+			      "rst_cif_i";
+		assigned-clocks = <&cru DCLK_VICAP>;
+		assigned-clock-rates = <300000000>;
+		power-domains = <&power RK3568_PD_VI>;
+		rockchip,grf = <&grf>;
+		iommus = <&rkcif_mmu>;
+		status = "disabled";
+	};
+
+	rkcif_mmu: iommu@fdfe0800 {
+		compatible = "rockchip,iommu";
+		reg = <0x0 0xfdfe0800 0x0 0x100>;
+		interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "cif_mmu";
+		clocks = <&cru ACLK_VICAP>, <&cru HCLK_VICAP>;
+		clock-names = "aclk", "iface";
+		power-domains = <&power RK3568_PD_VI>;
+		#iommu-cells = <0>;
+		rockchip,disable-mmu-reset;
+		status = "disabled";
+	};
+
+	rkcif_dvp: rkcif_dvp {
+		compatible = "rockchip,rkcif-dvp";
+		rockchip,hw = <&rkcif>;
+		iommus = <&rkcif_mmu>;
+		status = "disabled";
+	};
+
+	rkcif_dvp_sditf: rkcif_dvp_sditf {
+		compatible = "rockchip,rkcif-sditf";
+		rockchip,cif = <&rkcif_dvp>;
+		status = "disabled";
+	};
+
+	rkcif_mipi_lvds: rkcif_mipi_lvds {
+		compatible = "rockchip,rkcif-mipi-lvds";
+		rockchip,hw = <&rkcif>;
+		iommus = <&rkcif_mmu>;
+		status = "disabled";
+	};
+
+	rkcif_mipi_lvds_sditf: rkcif_mipi_lvds_sditf {
+		compatible = "rockchip,rkcif-sditf";
+		rockchip,cif = <&rkcif_mipi_lvds>;
+		status = "disabled";
+	};
+
+	rkisp: rkisp@fdff0000 {
+		compatible = "rockchip,rk3568-rkisp";
+		reg = <0x0 0xfdff0000 0x0 0x10000>;
+		interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "mipi_irq", "mi_irq", "isp_irq";
+		clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>, <&cru CLK_ISP>;
+		clock-names = "aclk_isp", "hclk_isp", "clk_isp";
+		resets = <&cru SRST_ISP>, <&cru SRST_H_ISP>;
+		reset-names = "isp", "isp-h";
+		rockchip,grf = <&grf>;
+		power-domains = <&power RK3568_PD_VI>;
+		iommus = <&rkisp_mmu>;
+		status = "disabled";
+	};
+
+	rkisp_mmu: iommu@fdff1a00 {
+		compatible = "rockchip,iommu";
+		reg = <0x0 0xfdff1a00 0x0 0x100>;
+		interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "isp_mmu";
+		clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>;
+		clock-names = "aclk", "iface";
+		power-domains = <&power RK3568_PD_VI>;
+		#iommu-cells = <0>;
+		rockchip,disable-mmu-reset;
+		status = "disabled";
+	};
+
+	rkisp_vir0: rkisp-vir0 {
+		compatible = "rockchip,rkisp-vir";
+		rockchip,hw = <&rkisp>;
+		status = "disabled";
+	};
+
+	rkisp_vir1: rkisp-vir1 {
+		compatible = "rockchip,rkisp-vir";
+		rockchip,hw = <&rkisp>;
+		status = "disabled";
+	};
+
+	gmac1: ethernet@fe010000 {
+		compatible = "rockchip,rk3568-gmac", "snps,dwmac-4.20a";
+		reg = <0x0 0xfe010000 0x0 0x10000>;
+		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "macirq", "eth_wake_irq";
+		rockchip,grf = <&grf>;
+		clocks = <&cru SCLK_GMAC1>, <&cru SCLK_GMAC1_RX_TX>,
+			 <&cru SCLK_GMAC1_RX_TX>, <&cru CLK_MAC1_REFOUT>,
+			 <&cru ACLK_GMAC1>, <&cru PCLK_GMAC1>,
+			 <&cru SCLK_GMAC1_RX_TX>, <&cru CLK_GMAC1_PTP_REF>;
+		clock-names = "stmmaceth", "mac_clk_rx",
+			      "mac_clk_tx", "clk_mac_refout",
+			      "aclk_mac", "pclk_mac",
+			      "clk_mac_speed", "ptp_ref";
+		resets = <&cru SRST_A_GMAC1>;
+		reset-names = "stmmaceth";
+
+		snps,mixed-burst;
+		snps,tso;
+
+		snps,axi-config = <&gmac1_stmmac_axi_setup>;
+		snps,mtl-rx-config = <&gmac1_mtl_rx_setup>;
+		snps,mtl-tx-config = <&gmac1_mtl_tx_setup>;
+		status = "disabled";
+
+		mdio1: mdio {
+			compatible = "snps,dwmac-mdio";
+			#address-cells = <0x1>;
+			#size-cells = <0x0>;
+		};
+
+		gmac1_stmmac_axi_setup: stmmac-axi-config {
+			snps,wr_osr_lmt = <4>;
+			snps,rd_osr_lmt = <8>;
+			snps,blen = <0 0 0 0 16 8 4>;
+		};
+
+		gmac1_mtl_rx_setup: rx-queues-config {
+			snps,rx-queues-to-use = <1>;
+			queue0 {};
+		};
+
+		gmac1_mtl_tx_setup: tx-queues-config {
+			snps,tx-queues-to-use = <1>;
+			queue0 {};
+		};
+	};
+
+	vop: vop@fe040000 {
+		compatible = "rockchip,rk3568-vop";
+		reg = <0x0 0xfe040000 0x0 0x3000>;
+		reg-names = "regs";
+		rockchip,grf = <&grf>;
+		interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>, <&cru DCLK_VOP0>, <&cru DCLK_VOP1>, <&cru DCLK_VOP2>;
+		clock-names = "aclk_vop", "hclk_vop", "dclk_vp0", "dclk_vp1", "dclk_vp2";
+		iommus = <&vop_mmu>;
+		power-domains = <&power RK3568_PD_VO>;
+		status = "disabled";
+
+		vop_out: ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				reg = <0>;
+
+				vp0_out_dsi0: endpoint@0 {
+					reg = <0>;
+					remote-endpoint = <&dsi0_in_vp0>;
+				};
+
+				vp0_out_dsi1: endpoint@1 {
+					reg = <1>;
+					remote-endpoint = <&dsi1_in_vp0>;
+				};
+
+				vp0_out_edp: endpoint@2 {
+					reg = <2>;
+					remote-endpoint = <&edp_in_vp0>;
+				};
+
+				vp0_out_hdmi: endpoint@3 {
+					reg = <3>;
+					remote-endpoint = <&hdmi_in_vp0>;
+				};
+			};
+
+			port@1 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				reg = <1>;
+
+				vp1_out_dsi0: endpoint@0 {
+					reg = <0>;
+					remote-endpoint = <&dsi0_in_vp1>;
+				};
+
+				vp1_out_dsi1: endpoint@1 {
+					reg = <1>;
+					remote-endpoint = <&dsi1_in_vp1>;
+				};
+
+				vp1_out_edp: endpoint@2 {
+					reg = <2>;
+					remote-endpoint = <&edp_in_vp1>;
+				};
+
+				vp1_out_hdmi: endpoint@3 {
+					reg = <3>;
+					remote-endpoint = <&hdmi_in_vp1>;
+				};
+
+				vp1_out_lvds0: endpoint@4 {
+					reg = <4>;
+					remote-endpoint = <&lvds0_in_vp1>;
+				};
+
+				vp1_out_lvds1: endpoint@5 {
+					reg = <5>;
+					remote-endpoint = <&lvds1_in_vp1>;
+				};
+
+			};
+
+			port@2 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				reg = <2>;
+
+				vp2_out_lvds0: endpoint@0 {
+					reg = <0>;
+					remote-endpoint = <&lvds0_in_vp2>;
+				};
+
+				vp2_out_lvds1: endpoint@1 {
+					reg = <1>;
+					remote-endpoint = <&lvds1_in_vp2>;
+				};
+
+				vp2_out_rgb: endpoint@2 {
+					reg = <2>;
+					remote-endpoint = <&rgb_in_vp2>;
+				};
+			};
+		};
+	};
+
+	vop_mmu: iommu@fe043e00 {
+		compatible = "rockchip,iommu-v2";
+		reg = <0x0 0xfe043e00 0x0 0x100>, <0x0 0xfe043f00 0x0 0x100>;
+		interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "vop_mmu";
+		clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>;
+		clock-names = "aclk", "iface";
+		#iommu-cells = <0>;
+		status = "disabled";
+	};
+
+	dsi0: dsi@fe060000 {
+		compatible = "rockchip,rk3568-mipi-dsi";
+		reg = <0x0 0xfe060000 0x0 0x10000>;
+		interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru PCLK_DSITX_0>, <&cru HCLK_VO>, <&mipi_dphy0>;
+		clock-names = "pclk", "hclk", "hs_clk";
+		resets = <&cru SRST_P_DSITX_0>;
+		reset-names = "apb";
+		phys = <&mipi_dphy0>;
+		phy-names = "mipi_dphy";
+		power-domains = <&power RK3568_PD_VO>;
+		rockchip,grf = <&grf>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			dsi0_in: port@0 {
+				reg = <0>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				dsi0_in_vp0: endpoint@0 {
+					reg = <0>;
+					remote-endpoint = <&vp0_out_dsi0>;
+				};
+
+				dsi0_in_vp1: endpoint@1 {
+					reg = <1>;
+					remote-endpoint = <&vp1_out_dsi0>;
+				};
+			};
+		};
+	};
+
+	dsi1: dsi@fe070000 {
+		compatible = "rockchip,rk3568-mipi-dsi";
+		reg = <0x0 0xfe070000 0x0 0x10000>;
+		interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru PCLK_DSITX_1>, <&cru HCLK_VO>, <&mipi_dphy1>;
+		clock-names = "pclk", "hclk", "hs_clk";
+		resets = <&cru SRST_P_DSITX_1>;
+		reset-names = "apb";
+		phys = <&mipi_dphy1>;
+		phy-names = "mipi_dphy";
+		power-domains = <&power RK3568_PD_VO>;
+		rockchip,grf = <&grf>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			dsi1_in: port@0 {
+				reg = <0>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				dsi1_in_vp0: endpoint@0 {
+					reg = <0>;
+					remote-endpoint = <&vp0_out_dsi1>;
+				};
+
+				dsi1_in_vp1: endpoint@1 {
+					reg = <1>;
+					remote-endpoint = <&vp1_out_dsi1>;
+				};
+			};
+		};
+	};
+
+	hdmi: hdmi@fe0a0000 {
+		compatible = "rockchip,rk3568-dw-hdmi";
+		reg = <0x0 0xfe0a0000 0x0 0x20000>;
+		interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru PCLK_HDMI_HOST>,
+			 <&cru CLK_HDMI_SFR>,
+			 <&cru CLK_HDMI_CEC>,
+			 <&pmucru PLL_HPLL>,
+			 <&cru HCLK_VOP>;
+		clock-names = "iahb", "isfr", "cec", "ref", "hclk";
+		power-domains = <&power RK3568_PD_VO>;
+		reg-io-width = <4>;
+		rockchip,grf = <&grf>;
+		#sound-dai-cells = <0>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&hdmitx_scl &hdmitx_sda &hdmitxm0_cec>;
+		status = "disabled";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			hdmi_in: port {
+				reg = <0>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				hdmi_in_vp0: endpoint@0 {
+					reg = <0>;
+					remote-endpoint = <&vp0_out_hdmi>;
+				};
+				hdmi_in_vp1: endpoint@1 {
+					reg = <1>;
+					remote-endpoint = <&vp1_out_hdmi>;
+				};
+			};
+		};
+	};
+
+	edp: edp@fe0c0000 {
+		compatible = "rockchip,rk3568-edp";
+		reg = <0x0 0xfe0c0000 0x0 0x10000>;
+		interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&pmucru XIN_OSC0_EDPPHY_G>, <&cru PCLK_EDP_CTRL>,
+			 <&cru CLK_EDP_200M>, <&cru HCLK_VO>;
+		clock-names = "dp", "pclk", "spdif", "hclk";
+		resets = <&cru SRST_EDP_24M>, <&cru SRST_P_EDP_CTRL>;
+		reset-names = "dp", "apb";
+		phys = <&edp_phy>;
+		phy-names = "dp";
+		power-domains = <&power RK3568_PD_VO>;
+		status = "disabled";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			edp_in: port@0 {
+				reg = <0>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				edp_in_vp0: endpoint@0 {
+					reg = <0>;
+					remote-endpoint = <&vp0_out_edp>;
+				};
+
+				edp_in_vp1: endpoint@1 {
+					reg = <1>;
+					remote-endpoint = <&vp1_out_edp>;
+				};
+			};
+		};
+	};
+
 	qos_gpu: qos@fe128000 {
 		compatible = "syscon";
 		reg = <0x0 0xfe128000 0x0 0x20>;
@@ -656,6 +1647,165 @@
 		status = "disabled";
 	};
 
+	pcie2x1: pcie@fe260000 {
+		compatible = "rockchip,rk3568-pcie", "snps,dw-pcie";
+		#address-cells = <3>;
+		#size-cells = <2>;
+		bus-range = <0x0 0x1f>;
+		clocks = <&cru ACLK_PCIE20_MST>, <&cru ACLK_PCIE20_SLV>,
+			 <&cru ACLK_PCIE20_DBI>, <&cru PCLK_PCIE20>;
+		clock-names = "aclk_mst", "aclk_slv",
+			      "aclk_dbi", "pclk";
+		device_type = "pci";
+		interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "sys", "pmc", "msg", "legacy", "err";
+		linux,pci-domain = <0>;
+		num-ib-windows = <6>;
+		num-ob-windows = <2>;
+		max-link-speed = <2>;
+		msi-map = <0x0 &its 0x0 0x1000>;
+		num-lanes = <1>;
+		phys = <&combphy2_psq PHY_TYPE_PCIE>;
+		phy-names = "pcie-phy";
+		power-domains = <&power RK3568_PD_PIPE>;
+		ranges = <0x00000800 0x0 0x00000000 0x3 0x00000000 0x0 0x800000
+			  0x81000000 0x0 0x00800000 0x3 0x00800000 0x0 0x100000
+			  0x83000000 0x0 0x00900000 0x3 0x00900000 0x0 0x3f700000>;
+		reg = <0x3 0xc0000000 0x0 0x400000>,
+		      <0x0 0xfe260000 0x0 0x10000>;
+		reg-names = "pcie-dbi", "pcie-apb";
+		resets = <&cru SRST_PCIE20_POWERUP>;
+		reset-names = "pipe";
+		status = "disabled";
+	};
+
+	pcie3x1: pcie@fe270000 {
+		compatible = "rockchip,rk3568-pcie", "snps,dw-pcie";
+		#address-cells = <3>;
+		#size-cells = <2>;
+		bus-range = <0x0 0x1f>;
+		clocks = <&cru ACLK_PCIE30X1_MST>, <&cru ACLK_PCIE30X1_SLV>,
+			 <&cru ACLK_PCIE30X1_DBI>, <&cru PCLK_PCIE30X1>;
+		clock-names = "aclk_mst", "aclk_slv",
+			      "aclk_dbi", "pclk";
+		device_type = "pci";
+		interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "sys", "pmc", "msg", "legacy", "err";
+		linux,pci-domain = <1>;
+		num-ib-windows = <6>;
+		num-ob-windows = <2>;
+		max-link-speed = <3>;
+		msi-map = <0x0 &its 0x3000 0x1000>;
+		num-lanes = <1>;
+		phys = <&pcie30phy>;
+		phy-names = "pcie-phy";
+		power-domains = <&power RK3568_PD_PIPE>;
+		ranges = <0x00000800 0x0 0x40000000 0x3 0x40000000 0x0 0x800000
+			  0x81000000 0x0 0x40800000 0x3 0x40800000 0x0 0x100000
+			  0x83000000 0x0 0x40900000 0x3 0x40900000 0x0 0x3f700000>;
+		reg = <0x3 0xc0400000 0x0 0x400000>,
+		      <0x0 0xfe270000 0x0 0x10000>;
+		reg-names = "pcie-dbi", "pcie-apb";
+		resets = <&cru SRST_PCIE30X1_POWERUP>;
+		reset-names = "pipe";
+		/* rockchip,bifurcation; lane1 when using 1+1 */
+		status = "disabled";
+	};
+
+	pcie3x2: pcie@fe280000 {
+		compatible = "rockchip,rk3568-pcie", "snps,dw-pcie";
+		#address-cells = <3>;
+		#size-cells = <2>;
+		bus-range = <0x0 0x1f>;
+		clocks = <&cru ACLK_PCIE30X2_MST>, <&cru ACLK_PCIE30X2_SLV>,
+			 <&cru ACLK_PCIE30X2_DBI>, <&cru PCLK_PCIE30X2>;
+		clock-names = "aclk_mst", "aclk_slv",
+			      "aclk_dbi", "pclk";
+		device_type = "pci";
+		interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "sys", "pmc", "msg", "legacy", "err";
+		linux,pci-domain = <2>;
+		num-ib-windows = <6>;
+		num-ob-windows = <2>;
+		max-link-speed = <3>;
+		msi-map = <0x0 &its 0x2000 0x1000>;
+		num-lanes = <2>;
+		phys = <&pcie30phy>;
+		phy-names = "pcie-phy";
+		power-domains = <&power RK3568_PD_PIPE>;
+		ranges = <0x00000800 0x0 0x80000000 0x3 0x80000000 0x0 0x800000
+			  0x81000000 0x0 0x80800000 0x3 0x80800000 0x0 0x100000
+			  0x83000000 0x0 0x80900000 0x3 0x80900000 0x0 0x3f700000>;
+		reg = <0x3 0xc0800000 0x0 0x400000>,
+		      <0x0 0xfe280000 0x0 0x10000>;
+		reg-names = "pcie-dbi", "pcie-apb";
+		resets = <&cru SRST_PCIE30X2_POWERUP>;
+		reset-names = "pipe";
+		/* rockchip,bifurcation; lane0 when using 1+1 */
+		status = "disabled";
+	};
+
+	gmac0: ethernet@fe2a0000 {
+		compatible = "rockchip,rk3568-gmac", "snps,dwmac-4.20a";
+		reg = <0x0 0xfe2a0000 0x0 0x10000>;
+		interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "macirq", "eth_wake_irq";
+		rockchip,grf = <&grf>;
+		clocks = <&cru SCLK_GMAC0>, <&cru SCLK_GMAC0_RX_TX>,
+			 <&cru SCLK_GMAC0_RX_TX>, <&cru CLK_MAC0_REFOUT>,
+			 <&cru ACLK_GMAC0>, <&cru PCLK_GMAC0>,
+			 <&cru SCLK_GMAC0_RX_TX>, <&cru CLK_GMAC0_PTP_REF>;
+		clock-names = "stmmaceth", "mac_clk_rx",
+			      "mac_clk_tx", "clk_mac_refout",
+			      "aclk_mac", "pclk_mac",
+			      "clk_mac_speed", "ptp_ref";
+		resets = <&cru SRST_A_GMAC0>;
+		reset-names = "stmmaceth";
+
+		snps,mixed-burst;
+		snps,tso;
+
+		snps,axi-config = <&gmac0_stmmac_axi_setup>;
+		snps,mtl-rx-config = <&gmac0_mtl_rx_setup>;
+		snps,mtl-tx-config = <&gmac0_mtl_tx_setup>;
+		status = "disabled";
+
+		mdio0: mdio {
+			compatible = "snps,dwmac-mdio";
+			#address-cells = <0x1>;
+			#size-cells = <0x0>;
+		};
+
+		gmac0_stmmac_axi_setup: stmmac-axi-config {
+			snps,wr_osr_lmt = <4>;
+			snps,rd_osr_lmt = <8>;
+			snps,blen = <0 0 0 0 16 8 4>;
+		};
+
+		gmac0_mtl_rx_setup: rx-queues-config {
+			snps,rx-queues-to-use = <1>;
+			queue0 {};
+		};
+
+		gmac0_mtl_tx_setup: tx-queues-config {
+			snps,tx-queues-to-use = <1>;
+			queue0 {};
+		};
+	};
+
 	sdmmc0: dwmmc@fe2b0000 {
 		compatible = "rockchip,rk3568-dw-mshc",
 			     "rockchip,rk3288-dw-mshc";
@@ -701,8 +1851,8 @@
 		compatible = "rockchip,dwcmshc-sdhci", "snps,dwcmshc-sdhci";
 		reg = <0x0 0xfe310000 0x0 0x10000>;
 		interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
-		assigned-clocks = <&cru CCLK_EMMC>, <&cru BCLK_EMMC>, <&cru TCLK_EMMC>;
-		assigned-clock-rates = <200000000>, <200000000>, <24000000>;
+		assigned-clocks = <&cru BCLK_EMMC>, <&cru TCLK_EMMC>;
+		assigned-clock-rates = <200000000>, <24000000>;
 		clocks = <&cru CCLK_EMMC>, <&cru HCLK_EMMC>,
 			 <&cru ACLK_EMMC>, <&cru BCLK_EMMC>,
 			 <&cru TCLK_EMMC>;
@@ -733,6 +1883,7 @@
 		rockchip,cru = <&cru>;
 		rockchip,grf = <&grf>;
 		rockchip,playback-only;
+		#sound-dai-cells = <0>;
 		status = "disabled";
 	};
 
@@ -748,6 +1899,7 @@
 		reset-names = "tx-m", "rx-m";
 		rockchip,cru = <&cru>;
 		rockchip,grf = <&grf>;
+		#sound-dai-cells = <0>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&i2s1sclktxm0
 			     &i2s1sclkrxm0
@@ -775,6 +1927,7 @@
 		rockchip,cru = <&cru>;
 		rockchip,grf = <&grf>;
 		rockchip,clk-trcm = <1>;
+		#sound-dai-cells = <0>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&i2s2sclktxm0
 			     &i2s2lrcktxm0
@@ -795,6 +1948,7 @@
 		reset-names = "tx-m", "rx-m";
 		rockchip,cru = <&cru>;
 		rockchip,grf = <&grf>;
+		#sound-dai-cells = <0>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&i2s3sclkm0
 			     &i2s3lrckm0
@@ -810,17 +1964,33 @@
 		clock-names = "pdm_clk", "pdm_hclk";
 		dmas = <&dmac1 9>;
 		dma-names = "rx";
+		#sound-dai-cells = <0>;
+		status = "disabled";
+	};
+
+	vad: vad@fe450000 {
+		compatible = "rockchip,rk3568-vad";
+		reg = <0x0 0xfe450000 0x0 0x10000>;
+		reg-names = "vad";
+		clocks = <&cru HCLK_VAD>;
+		clock-names = "hclk";
+		interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
+		rockchip,audio-src = <0>;
+		rockchip,det-channel = <0>;
+		rockchip,mode = <0>;
+		#sound-dai-cells = <0>;
 		status = "disabled";
 	};
 
 	spdif_8ch: spdif@fe460000 {
-		compatible = "rockchip,rk3588-spdif";
+		compatible = "rockchip,rk3568-spdif";
 		reg = <0x0 0xfe460000 0x0 0x1000>;
 		interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
 		dmas = <&dmac1 1>;
 		dma-names = "tx";
 		clock-names = "mclk", "hclk";
 		clocks = <&cru MCLK_SPDIF_8CH>, <&cru HCLK_SPDIF_8CH>;
+		#sound-dai-cells = <0>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&spdifm0_pins>;
 		status = "disabled";
@@ -833,6 +2003,7 @@
 		clock-names = "clk", "hclk";
 		dmas = <&dmac1 8>;
 		dma-names = "tx";
+		#sound-dai-cells = <0>;
 		rockchip,sample-width-bits = <11>;
 		rockchip,interpolat-points = <1>;
 		status = "disabled";
@@ -841,13 +2012,15 @@
 	dig_acodec: codec-digital@fe478000 {
 		compatible = "rockchip,rk3568-codec-digital", "rockchip,codec-digital-v1";
 		reg = <0x0 0xfe478000 0x0 0x1000>;
-		clocks = <&cru CLK_ACDCDIG_ADC>, <&cru CLK_ACDCDIG_DAC>, <&cru HCLK_ACDCDIG>;
-		clock-names = "adc", "dac", "pclk";
+		clocks = <&cru CLK_ACDCDIG_ADC>, <&cru CLK_ACDCDIG_DAC>,
+			 <&cru CLK_ACDCDIG_I2C>, <&cru HCLK_ACDCDIG>;
+		clock-names = "adc", "dac", "i2c", "pclk";
 		pinctrl-names = "default";
 		pinctrl-0 = <&acodec_pins>;
 		resets = <&cru SRST_ACDCDIG>;
 		reset-names = "reset" ;
 		rockchip,grf = <&grf>;
+		#sound-dai-cells = <0>;
 		status = "disabled";
 	};
 
@@ -856,7 +2029,7 @@
 		reg = <0x0 0xfe530000 0x0 0x4000>;
 		interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
 			     <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru ACLK_DMAC0>;
+		clocks = <&cru ACLK_BUS>;
 		clock-names = "apb_pclk";
 		#dma-cells = <1>;
 		arm,pl330-periph-burst;
@@ -867,7 +2040,7 @@
 		reg = <0x0 0xfe550000 0x0 0x4000>;
 		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
 			     <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru ACLK_DMAC1>;
+		clocks = <&cru ACLK_BUS>;
 		clock-names = "apb_pclk";
 		#dma-cells = <1>;
 		arm,pl330-periph-burst;
@@ -980,7 +2153,8 @@
 	wdt: watchdog@fe600000 {
 		compatible = "snps,dw-wdt";
 		reg = <0x0 0xfe600000 0x0 0x100>;
-		clocks = <&cru PCLK_WDT_NS>;
+		clocks = <&cru TCLK_WDT_NS>, <&cru PCLK_WDT_NS>;
+		clock-names = "tclk", "pclk";
 		interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
 		status = "okay";
 	};
@@ -994,8 +2168,10 @@
 		clocks = <&cru CLK_SPI0>, <&cru PCLK_SPI0>;
 		clock-names = "spiclk", "apb_pclk";
 		dmas = <&dmac0 20>, <&dmac0 21>;
-		pinctrl-names = "default";
+		dma-names = "tx", "rx";
+		pinctrl-names = "default", "high_speed";
 		pinctrl-0 = <&spi0clkm0 &spi0cs0m0 &spi0cs1m0 &spi0misom0 &spi0mosim0>;
+		pinctrl-1 = <&spi0clkm0_hs &spi0cs0m0 &spi0cs1m0 &spi0misom0_hs &spi0mosim0_hs>;
 		status = "disabled";
 	};
 
@@ -1008,8 +2184,10 @@
 		clocks = <&cru CLK_SPI1>, <&cru PCLK_SPI1>;
 		clock-names = "spiclk", "apb_pclk";
 		dmas = <&dmac0 22>, <&dmac0 23>;
-		pinctrl-names = "default";
+		dma-names = "tx", "rx";
+		pinctrl-names = "default", "high_speed";
 		pinctrl-0 = <&spi1clkm0 &spi1cs0m0 &spi1cs1m0 &spi1misom0 &spi1mosim0>;
+		pinctrl-1 = <&spi1clkm0_hs &spi1cs0m0 &spi1cs1m0 &spi1misom0_hs &spi1mosim0_hs>;
 		status = "disabled";
 	};
 
@@ -1022,8 +2200,10 @@
 		clocks = <&cru CLK_SPI2>, <&cru PCLK_SPI2>;
 		clock-names = "spiclk", "apb_pclk";
 		dmas = <&dmac0 24>, <&dmac0 25>;
-		pinctrl-names = "default";
+		dma-names = "tx", "rx";
+		pinctrl-names = "default", "high_speed";
 		pinctrl-0 = <&spi2clkm0 &spi2cs0m0 &spi2cs1m0 &spi2misom0 &spi2mosim0>;
+		pinctrl-1 = <&spi2clkm0_hs &spi2cs0m0 &spi2cs1m0 &spi2misom0_hs &spi2mosim0_hs>;
 		status = "disabled";
 	};
 
@@ -1036,8 +2216,10 @@
 		clocks = <&cru CLK_SPI3>, <&cru PCLK_SPI3>;
 		clock-names = "spiclk", "apb_pclk";
 		dmas = <&dmac0 26>, <&dmac0 27>;
-		pinctrl-names = "default";
+		dma-names = "tx", "rx";
+		pinctrl-names = "default", "high_speed";
 		pinctrl-0 = <&spi3clkm0 &spi3cs0m0 &spi3cs1m0 &spi3misom0 &spi3mosim0>;
+		pinctrl-1 = <&spi3clkm0_hs &spi3cs0m0 &spi3cs1m0 &spi3misom0_hs &spi3mosim0_hs>;
 		status = "disabled";
 	};
 
@@ -1299,6 +2481,28 @@
 		status = "disabled";
 	};
 
+	tsadc: tsadc@fe710000 {
+		compatible = "rockchip,rk3568-tsadc";
+		reg = <0x0 0xfe710000 0x0 0x100>;
+		interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
+		rockchip,grf = <&grf>;
+		clocks = <&cru CLK_TSADC>, <&cru PCLK_TSADC>;
+		clock-names = "tsadc", "apb_pclk";
+		assigned-clocks = <&cru CLK_TSADC_TSEN>, <&cru CLK_TSADC>;
+		assigned-clock-rates = <17000000>, <700000>;
+		resets = <&cru SRST_TSADC>, <&cru SRST_P_TSADC>,
+			 <&cru SRST_TSADCPHY>;
+		reset-names = "tsadc", "tsadc-apb", "tsadc-phy";
+		#thermal-sensor-cells = <1>;
+		rockchip,hw-tshut-temp = <120000>;
+		rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
+		rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
+		pinctrl-names = "gpio", "otpout";
+		pinctrl-0 = <&tsadc_gpio>;
+		pinctrl-1 = <&tsadc_shutorg>;
+		status = "disabled";
+	};
+
 	saradc: saradc@fe720000 {
 		compatible = "rockchip,rk3568-saradc", "rockchip,rk3399-saradc";
 		reg = <0x0 0xfe720000 0x0 0x100>;
@@ -1311,12 +2515,28 @@
 		status = "disabled";
 	};
 
+	mailbox: mailbox@fe780000 {
+		compatible = "rockchip,rk3568-mailbox",
+			     "rockchip,rk3368-mailbox";
+		reg = <0x0 0xfe780000 0x0 0x1000>;
+		interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru PCLK_MAILBOX>;
+		clock-names = "pclk_mailbox";
+		#mbox-cells = <1>;
+		status = "disabled";
+	};
+
 	combphy0_us: phy@fe820000 {
 		compatible = "rockchip,rk3568-naneng-combphy";
 		reg = <0x0 0xfe820000 0x0 0x100>;
 		#phy-cells = <1>;
 		clocks = <&pmucru CLK_PCIEPHY0_REF>, <&cru PCLK_PIPEPHY0>;
 		clock-names = "refclk", "apbclk";
+		assigned-clocks = <&pmucru CLK_PCIEPHY0_REF>;
+		assigned-clock-rates = <24000000>;
 		resets = <&cru SRST_P_PIPEPHY0>, <&cru SRST_PIPEPHY0>;
 		reset-names = "combphy-apb", "combphy";
 		rockchip,pipe-grf = <&pipegrf>;
@@ -1330,7 +2550,9 @@
 		#phy-cells = <1>;
 		clocks = <&pmucru CLK_PCIEPHY1_REF>, <&cru PCLK_PIPEPHY1>;
 		clock-names = "refclk", "apbclk";
-		resets = <&cru SRST_P_PIPEPHY0>, <&cru SRST_PIPEPHY0>;
+		assigned-clocks = <&pmucru CLK_PCIEPHY1_REF>;
+		assigned-clock-rates = <24000000>;
+		resets = <&cru SRST_P_PIPEPHY1>, <&cru SRST_PIPEPHY1>;
 		reset-names = "combphy-apb", "combphy";
 		rockchip,pipe-grf = <&pipegrf>;
 		rockchip,pipe-phy-grf = <&pipe_phy_grf1>;
@@ -1343,6 +2565,8 @@
 		#phy-cells = <1>;
 		clocks = <&pmucru CLK_PCIEPHY2_REF>, <&cru PCLK_PIPEPHY2>;
 		clock-names = "refclk", "apbclk";
+		assigned-clocks = <&pmucru CLK_PCIEPHY2_REF>;
+		assigned-clock-rates = <24000000>;
 		resets = <&cru SRST_P_PIPEPHY2>, <&cru SRST_PIPEPHY2>;
 		reset-names = "combphy-apb", "combphy";
 		rockchip,pipe-grf = <&pipegrf>;
@@ -1350,6 +2574,75 @@
 		status = "disabled";
 	};
 
+	mipi_dphy0: mipi-dphy@fe850000 {
+		compatible = "rockchip,rk3568-mipi-dphy";
+		reg = <0x0 0xfe850000 0x0 0x10000>;
+		clocks = <&pmucru CLK_MIPIDSIPHY0_REF>, <&cru PCLK_MIPIDSIPHY0>;
+		clock-names = "ref", "pclk";
+		clock-output-names = "mipi_dphy_pll";
+		#clock-cells = <0>;
+		resets = <&cru SRST_P_MIPIDSIPHY0>;
+		reset-names = "apb";
+		power-domains = <&power RK3568_PD_VO>;
+		#phy-cells = <0>;
+		rockchip,grf = <&grf>;
+		status = "disabled";
+	};
+
+	video_phy0: video-phy@fe850000 {
+		compatible = "rockchip,rk3568-video-phy";
+		reg = <0x0 0xfe850000  0x0 0x10000>,
+		      <0x0 0xfe060000 0x0 0x10000>;
+		clocks = <&pmucru CLK_MIPIDSIPHY0_REF>,
+			 <&cru PCLK_MIPIDSIPHY0>, <&cru PCLK_DSITX_0>;
+		clock-names = "ref", "pclk_phy", "pclk_host";
+		#clock-cells = <0>;
+		resets = <&cru SRST_P_MIPIDSIPHY0>;
+		reset-names = "rst";
+		power-domains = <&power RK3568_PD_VO>;
+		#phy-cells = <0>;
+		status = "disabled";
+	};
+
+	mipi_dphy1: mipi-dphy@fe860000 {
+		compatible = "rockchip,rk3568-mipi-dphy";
+		reg = <0x0 0xfe860000 0x0 0x10000>;
+		clocks = <&pmucru CLK_MIPIDSIPHY1_REF>, <&cru PCLK_MIPIDSIPHY1>;
+		clock-names = "ref", "pclk";
+		clock-output-names = "mipi_dphy1_pll";
+		#clock-cells = <0>;
+		resets = <&cru SRST_P_MIPIDSIPHY1>;
+		reset-names = "apb";
+		power-domains = <&power RK3568_PD_VO>;
+		#phy-cells = <0>;
+		rockchip,grf = <&grf>;
+		status = "disabled";
+	};
+
+	video_phy1: video-phy@fe860000 {
+		compatible = "rockchip,rk3568-video-phy";
+		reg = <0x0 0xfe860000 0x0 0x10000>,
+		      <0x0 0xfe070000 0x0 0x10000>;
+		clocks = <&pmucru CLK_MIPIDSIPHY1_REF>,
+			 <&cru PCLK_MIPIDSIPHY1>, <&cru PCLK_DSITX_1>;
+		clock-names = "ref", "pclk_phy", "pclk_host";
+		#clock-cells = <0>;
+		resets = <&cru SRST_P_MIPIDSIPHY1>;
+		reset-names = "rst";
+		power-domains = <&power RK3568_PD_VO>;
+		#phy-cells = <0>;
+		status = "disabled";
+	};
+
+	csi_dphy: csi-dphy@fe870000 {
+		compatible = "rockchip,rk3568-csi-dphy";
+		reg = <0x0 0xfe870000 0x0 0x1000>;
+		clocks = <&cru PCLK_MIPICSIPHY>;
+		clock-names = "pclk";
+		rockchip,grf = <&grf>;
+		status = "disabled";
+	};
+
 	usb2phy0: usb2-phy@fe8a0000 {
 		compatible = "rockchip,rk3568-usb2phy";
 		reg = <0x0 0xfe8a0000 0x0 0x10000>;
@@ -1357,18 +2650,20 @@
 		clocks = <&pmucru CLK_USBPHY0_REF>;
 		clock-names = "phyclk";
 		#clock-cells = <0>;
+		assigned-clocks = <&cru USB480M>;
+		assigned-clock-parents = <&usb2phy0>;
 		clock-output-names = "usb480m_phy";
 		rockchip,usbgrf = <&usb2phy0_grf>;
 		status = "disabled";
 
 		u2phy0_host: host-port {
-		#phy-cells = <0>;
-		status = "disabled";
+			#phy-cells = <0>;
+			status = "disabled";
 		};
 
 		u2phy0_otg: otg-port {
-		#phy-cells = <0>;
-		status = "disabled";
+			#phy-cells = <0>;
+			status = "disabled";
 		};
 	};
 
@@ -1378,6 +2673,7 @@
 		interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&pmucru CLK_USBPHY1_REF>;
 		clock-names = "phyclk";
+		#clock-cells = <0>;
 		rockchip,usbgrf = <&usb2phy1_grf>;
 		status = "disabled";
 
@@ -1392,6 +2688,19 @@
 		};
 	};
 
+	pcie30phy: phy@fe8c0000 {
+		compatible = "rockchip,rk3568-pcie3-phy";
+		reg = <0x0 0xfe8c0000 0x0 0x20000>;
+		#phy-cells = <0>;
+		clocks = <&pmucru CLK_PCIE30PHY_REF_M>, <&pmucru CLK_PCIE30PHY_REF_N>,
+			 <&cru PCLK_PCIE30PHY>;
+		clock-names = "refclk_m", "refclk_n", "pclk";
+		resets = <&cru SRST_PCIE30PHY>;
+		reset-names = "phy";
+		rockchip,phy-grf = <&pcie30_phy_grf>;
+		status = "disabled";
+	};
+
 	pinctrl: pinctrl {
 		compatible = "rockchip,rk3568-pinctrl";
 		rockchip,grf = <&grf>;
@@ -1441,7 +2750,7 @@
 
 		gpio3: gpio@fe760000 {
 			compatible = "rockchip,gpio-bank";
-			reg = <0x0 0xfe750000 0x0 0x100>;
+			reg = <0x0 0xfe760000 0x0 0x100>;
 			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>;
 
diff --git a/include/dt-bindings/clock/rk3568-cru.h b/include/dt-bindings/clock/rk3568-cru.h
index 26ec41bbbb..236c792566 100644
--- a/include/dt-bindings/clock/rk3568-cru.h
+++ b/include/dt-bindings/clock/rk3568-cru.h
@@ -59,8 +59,10 @@
 #define PCLK_GPIO0		46
 #define PCLK_PMUPVTM		47
 #define PCLK_PWM0		48
+#define CLK_PDPMU		49
+#define SCLK_32K_IOE		50
 
-#define CLKPMU_NR_CLKS		(PCLK_PWM0 + 1)
+#define CLKPMU_NR_CLKS		(SCLK_32K_IOE + 1)
 
 /* cru-clocks indices */
 
@@ -290,7 +292,6 @@
 #define PCLK_HDCP		229
 #define PCLK_HDMI_HOST		230
 #define CLK_HDMI_SFR		231
-#define CLK_HDMI_CEC		231
 #define PCLK_DSITX_0		232
 #define PCLK_DSITX_1		233
 #define PCLK_EDP_CTRL		234
@@ -462,7 +463,15 @@
 #define SCLK_EMMC_DRV		400
 #define SCLK_EMMC_SAMPLE	401
 #define PCLK_EDPPHY_GRF		402
-#define PCLK_CORE_PVTM		403
+#define CLK_HDMI_CEC            403
+#define CLK_I2S0_8CH_TX		404
+#define CLK_I2S0_8CH_RX		405
+#define CLK_I2S1_8CH_TX		406
+#define CLK_I2S1_8CH_RX		407
+#define CLK_I2S2_2CH		408
+#define CLK_I2S3_2CH_TX		409
+#define CLK_I2S3_2CH_RX		410
+#define PCLK_CORE_PVTM		450
 
 #define CLK_NR_CLKS		(PCLK_CORE_PVTM + 1)
 
@@ -623,12 +632,42 @@
 
 /* cru_softrst_con10 */
 #define SRST_P_PCIE20		160
+#define SRST_PCIE20_POWERUP	161
+#define SRST_MSTR_ARESET_PCIE20	162
+#define SRST_SLV_ARESET_PCIE20	163
+#define SRST_DBI_ARESET_PCIE20	164
+#define SRST_BRESET_PCIE20	165
+#define SRST_PERST_PCIE20	166
+#define SRST_CORE_RST_PCIE20	167
+#define SRST_NSTICKY_RST_PCIE20	168
+#define SRST_STICKY_RST_PCIE20	169
+#define SRST_PWR_RST_PCIE20	170
 
 /* cru_softrst_con11 */
 #define SRST_P_PCIE30X1		176
+#define SRST_PCIE30X1_POWERUP	177
+#define SRST_M_ARESET_PCIE30X1	178
+#define SRST_S_ARESET_PCIE30X1	179
+#define SRST_D_ARESET_PCIE30X1	180
+#define SRST_BRESET_PCIE30X1	181
+#define SRST_PERST_PCIE30X1	182
+#define SRST_CORE_RST_PCIE30X1	183
+#define SRST_NSTC_RST_PCIE30X1	184
+#define SRST_STC_RST_PCIE30X1	185
+#define SRST_PWR_RST_PCIE30X1	186
 
 /* cru_softrst_con12 */
 #define SRST_P_PCIE30X2		192
+#define SRST_PCIE30X2_POWERUP	193
+#define SRST_M_ARESET_PCIE30X2	194
+#define SRST_S_ARESET_PCIE30X2	195
+#define SRST_D_ARESET_PCIE30X2	196
+#define SRST_BRESET_PCIE30X2	197
+#define SRST_PERST_PCIE30X2	198
+#define SRST_CORE_RST_PCIE30X2	199
+#define SRST_NSTC_RST_PCIE30X2	200
+#define SRST_STC_RST_PCIE30X2	201
+#define SRST_PWR_RST_PCIE30X2	202
 
 /* cru_softrst_con13 */
 #define SRST_A_PHP_NIU		208
diff --git a/include/dt-bindings/phy/phy.h b/include/dt-bindings/phy/phy.h
index 6c901930eb..d16e8755f6 100644
--- a/include/dt-bindings/phy/phy.h
+++ b/include/dt-bindings/phy/phy.h
@@ -15,5 +15,6 @@
 #define PHY_TYPE_PCIE		2
 #define PHY_TYPE_USB2		3
 #define PHY_TYPE_USB3		4
+#define PHY_TYPE_UFS		5
 
 #endif /* _DT_BINDINGS_PHY */
diff --git a/include/dt-bindings/soc/rockchip,boot-mode.h b/include/dt-bindings/soc/rockchip,boot-mode.h
index 1dfc4f4fa7..1436e1d326 100644
--- a/include/dt-bindings/soc/rockchip,boot-mode.h
+++ b/include/dt-bindings/soc/rockchip,boot-mode.h
@@ -1,7 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0 */
 #ifndef __ROCKCHIP_BOOT_MODE_H
 #define __ROCKCHIP_BOOT_MODE_H
 
-/* high 24 bits is tag, low 8 bits is type */
+/*high 24 bits is tag, low 8 bits is type*/
 #define REBOOT_FLAG		0x5242C300
 /* normal boot */
 #define BOOT_NORMAL		(REBOOT_FLAG + 0)
@@ -9,6 +10,10 @@
 #define BOOT_BL_DOWNLOAD	(REBOOT_FLAG + 1)
 /* enter recovery */
 #define BOOT_RECOVERY		(REBOOT_FLAG + 3)
+/* reboot by panic */
+#define BOOT_PANIC		(REBOOT_FLAG + 7)
+/* reboot by watchdog */
+#define BOOT_WATCHDOG		(REBOOT_FLAG + 8)
 /* enter fastboot mode */
 #define BOOT_FASTBOOT		(REBOOT_FLAG + 9)
 /* enter charging mode */

commit 6a71ec51e63f13fb27eae9bba4e85491cd4eefc5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 19 14:59:17 2020 +0800

    configs: remove rk3566.config
    
    rk3566.config is not ready to be used.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I1635dd9b0b86ddad4644bff58e3fa2337f7ebbe7

diff --git a/configs/rk3566.config b/configs/rk3566.config
deleted file mode 100644
index e695d41151..0000000000
--- a/configs/rk3566.config
+++ /dev/null
@@ -1,2 +0,0 @@
-CONFIG_BASE_DEFCONFIG="rk3568_defconfig"
-CONFIG_LOADER_INI="RK3566MINIALL.ini"

commit dbff1ed621b616f4155d1f2bf4881a86dcd51e4a
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Thu Nov 12 19:25:36 2020 +0800

    gpio: rockchip: get gpio bank from pinctrl device
    
    Change-Id: I0dd2bc1b61bfdfe8edfd79b3a794522499eaae5c
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/drivers/gpio/rk_gpio.c b/drivers/gpio/rk_gpio.c
index 1b1de01f19..e889f0bf7b 100644
--- a/drivers/gpio/rk_gpio.c
+++ b/drivers/gpio/rk_gpio.c
@@ -10,6 +10,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <dm/of_access.h>
 #include <syscon.h>
 #include <linux/errno.h>
 #include <asm/gpio.h>
@@ -18,9 +19,7 @@
 #include <dm/pinctrl.h>
 #include <dt-bindings/clock/rk3288-cru.h>
 
-enum {
-	ROCKCHIP_GPIOS_PER_BANK		= 32,
-};
+#include "../pinctrl/rockchip/pinctrl-rockchip.h"
 
 #define OFFSET_TO_BIT(bit)	(1UL << (bit))
 
@@ -128,28 +127,50 @@ static int rockchip_gpio_probe(struct udevice *dev)
 {
 	struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
 	struct rockchip_gpio_priv *priv = dev_get_priv(dev);
-	char *end;
-	int pins_num;
-	int ret;
+	struct rockchip_pinctrl_priv *pctrl_priv;
+	struct rockchip_pin_bank *bank;
+	char *end = NULL;
+	static int gpio;
+	int id = -1, ret;
 
 	priv->regs = dev_read_addr_ptr(dev);
 	ret = uclass_first_device_err(UCLASS_PINCTRL, &priv->pinctrl);
-	if (ret)
+	if (ret) {
+		dev_err(dev, "failed to get pinctrl device %d\n", ret);
 		return ret;
+	}
+
+	pctrl_priv = dev_get_priv(priv->pinctrl);
+	if (!pctrl_priv) {
+		dev_err(dev, "failed to get pinctrl priv\n");
+		return -EINVAL;
+	}
 
-	uc_priv->gpio_count = ROCKCHIP_GPIOS_PER_BANK;
 	end = strrchr(dev->name, '@');
-	priv->bank = trailing_strtoln(dev->name, end);
-	priv->name[0] = 'A' + priv->bank;
-	uc_priv->bank_name = priv->name;
-
-	pins_num = pinctrl_get_pins_count(priv->pinctrl);
-	if (pins_num <= 0) {
-		printf("%s: fail to get pins from pinctrl\n", __func__);
-	} else if ((priv->bank + 1) * ROCKCHIP_GPIOS_PER_BANK >= pins_num) {
-		uc_priv->gpio_count = pins_num - priv->bank * ROCKCHIP_GPIOS_PER_BANK;
+	if (end)
+		id = trailing_strtoln(dev->name, end);
+	else
+		dev_read_alias_seq(dev, &id);
+
+	if (id < 0)
+		id = gpio++;
+
+	if (id >= pctrl_priv->ctrl->nr_banks) {
+		dev_err(dev, "bank id invalid\n");
+		return -EINVAL;
 	}
 
+	bank = &pctrl_priv->ctrl->pin_banks[id];
+	if (bank->bank_num != id) {
+		dev_err(dev, "bank id mismatch with pinctrl\n");
+		return -EINVAL;
+	}
+
+	priv->bank = bank->bank_num;
+	uc_priv->gpio_count = bank->nr_pins;
+	uc_priv->gpio_base = bank->pin_base;
+	uc_priv->bank_name = bank->name;
+
 	return 0;
 }
 

commit e9c98b3baf99badb58b1fd35d39283da222a8e1e
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Thu Nov 12 19:54:38 2020 +0800

    gpio: rockchip: fix get gpio mux operation error return
    
    Change-Id: Ia225ae3acea2d2d2347870b3d6a20c4a7d22e7e9
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/drivers/gpio/rk_gpio.c b/drivers/gpio/rk_gpio.c
index f0146db320..1b1de01f19 100644
--- a/drivers/gpio/rk_gpio.c
+++ b/drivers/gpio/rk_gpio.c
@@ -109,11 +109,13 @@ static int rockchip_gpio_get_function(struct udevice *dev, unsigned offset)
 	int ret;
 
 	ret = pinctrl_get_gpio_mux(priv->pinctrl, priv->bank, offset);
-	if (ret)
+	if (ret < 0) {
+		dev_err(dev, "fail to get gpio mux %d\n", ret);
 		return ret;
+	}
 
 	/* If it's not 0, then it is not a GPIO */
-	if (ret)
+	if (ret > 0)
 		return GPIOF_FUNC;
 
 	is_output = READ_REG(&regs->swport_ddr) & OFFSET_TO_BIT(offset);

commit 8273b391c53c9901aa33a2317120105c8603771b
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Thu Nov 12 19:55:18 2020 +0800

    pinctrl: rockchip: a pin unrouted is invalid
    
    Change-Id: I706b23277f33768fc7c8bcfd06e6417fe3e8a0db
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
index 263d3b8386..07a4edd9a5 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
@@ -123,7 +123,7 @@ static int rockchip_get_mux(struct rockchip_pin_bank *bank, int pin)
 
 	if (bank->iomux[iomux_num].type & IOMUX_UNROUTED) {
 		debug("pin %d is unrouted\n", pin);
-		return 0;
+		return -ENOTSUPP;
 	}
 
 	if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY)

commit fdd74c32209b0d4cf8167e94a5dfa8a220106984
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Nov 12 17:03:13 2020 +0800

    clk: rockchip: rk3568: support ebc clk setting/getting rate
    
    Change-Id: Iecac8e56b2b5615b54c8969767053b6282fe6fb8
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3568.h b/arch/arm/include/asm/arch-rockchip/cru_rk3568.h
index 8c0f540414..2b562f0010 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3568.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3568.h
@@ -349,6 +349,13 @@ enum {
 	DCLK2_VOP_DIV_SHIFT		= 0,
 	DCLK2_VOP_DIV_MASK		= 0xff << DCLK2_VOP_DIV_SHIFT,
 
+	/* CRU_CLK_SEL43_CON */
+	DCLK_EBC_SEL_SHIFT		= 6,
+	DCLK_EBC_SEL_MASK		= 3 << DCLK_EBC_SEL_SHIFT,
+	DCLK_EBC_SEL_GPLL_400M		= 0,
+	DCLK_EBC_SEL_CPLL_333M,
+	DCLK_EBC_SEL_GPLL_200M,
+
 	/* CRU_CLK_SEL50_CON */
 	PCLK_BUS_SEL_SHIFT		= 4,
 	PCLK_BUS_SEL_MASK		= 3 << PCLK_BUS_SEL_SHIFT,
@@ -429,5 +436,9 @@ enum {
 	ACLK_TOP_HIGH_SEL_400M,
 	ACLK_TOP_HIGH_SEL_300M,
 	ACLK_TOP_HIGH_SEL_24M,
+
+	/* CRU_CLK_SEL79_CON */
+	CPLL_333M_DIV_SHIFT		= 0,
+	CPLL_333M_DIV_MASK		= 0x1f << CPLL_333M_DIV_SHIFT,
 };
 #endif
diff --git a/drivers/clk/rockchip/clk_rk3568.c b/drivers/clk/rockchip/clk_rk3568.c
index c34bfc5dd2..e5c5a9ce45 100644
--- a/drivers/clk/rockchip/clk_rk3568.c
+++ b/drivers/clk/rockchip/clk_rk3568.c
@@ -1900,6 +1900,50 @@ static ulong rk3568_gmac_tx_rx_set_clk(struct rk3568_clk_priv *priv,
 	return 0;
 }
 
+static ulong rk3568_ebc_get_clk(struct rk3568_clk_priv *priv, ulong clk_id)
+{
+	struct rk3568_cru *cru = priv->cru;
+	u32 con, div, p_rate;
+
+	con = readl(&cru->clksel_con[79]);
+	div = (con & CPLL_333M_DIV_MASK) >> CPLL_333M_DIV_SHIFT;
+	p_rate = DIV_TO_RATE(priv->cpll_hz, div);
+	if (clk_id == CPLL_333M)
+		return p_rate;
+
+	con = readl(&cru->clksel_con[43]);
+	div = (con & DCLK_EBC_SEL_MASK) >> DCLK_EBC_SEL_SHIFT;
+	switch (div) {
+	case DCLK_EBC_SEL_GPLL_400M:
+		return 400 * MHz;
+	case DCLK_EBC_SEL_CPLL_333M:
+		return p_rate;
+	case DCLK_EBC_SEL_GPLL_200M:
+		return 200 * MHz;
+	default:
+		return -ENOENT;
+	}
+}
+
+static ulong rk3568_ebc_set_clk(struct rk3568_clk_priv *priv,
+				ulong clk_id, ulong rate)
+{
+	struct rk3568_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->cpll_hz, rate);
+	assert(src_clk_div - 1 <= 31);
+	rk_clrsetreg(&cru->clksel_con[79],
+		     CPLL_333M_DIV_MASK,
+		     (src_clk_div - 1) << CPLL_333M_DIV_SHIFT);
+	if (clk_id == DCLK_EBC)
+		rk_clrsetreg(&cru->clksel_con[43],
+			     DCLK_EBC_SEL_MASK,
+			     DCLK_EBC_SEL_CPLL_333M << DCLK_EBC_SEL_SHIFT);
+
+	return rk3568_ebc_get_clk(priv, clk_id);
+}
+
 static ulong rk3568_clk_get_rate(struct clk *clk)
 {
 	struct rk3568_clk_priv *priv = dev_get_priv(clk->dev);
@@ -2017,6 +2061,10 @@ static ulong rk3568_clk_get_rate(struct clk *clk)
 	case CLK_GMAC1_PTP_REF:
 		rate = rk3568_gmac_ptp_ref_get_clk(priv, 1);
 		break;
+	case CPLL_333M:
+	case DCLK_EBC:
+		rate = rk3568_ebc_get_clk(priv, clk->id);
+		break;
 	case ACLK_SECURE_FLASH:
 	case ACLK_CRYPTO_NS:
 	case HCLK_SECURE_FLASH:
@@ -2153,6 +2201,10 @@ static ulong rk3568_clk_set_rate(struct clk *clk, ulong rate)
 	case CLK_GMAC1_PTP_REF:
 		rate = rk3568_gmac_ptp_ref_set_clk(priv, 1, rate);
 		break;
+	case CPLL_333M:
+	case DCLK_EBC:
+		rate = rk3568_ebc_set_clk(priv, clk->id, rate);
+		break;
 	case ACLK_SECURE_FLASH:
 	case ACLK_CRYPTO_NS:
 	case HCLK_SECURE_FLASH:
diff --git a/include/dt-bindings/clock/rk3568-cru.h b/include/dt-bindings/clock/rk3568-cru.h
index d06f8b085d..26ec41bbbb 100644
--- a/include/dt-bindings/clock/rk3568-cru.h
+++ b/include/dt-bindings/clock/rk3568-cru.h
@@ -73,6 +73,7 @@
 #define PLL_NPLL		6
 
 /* cru clocks */
+#define CPLL_333M		9
 #define ARMCLK			10
 #define USB480M			11
 #define ACLK_CORE_NIU2BUS	18

commit d181efcb7748ed34ddfe31d021bd7ffe12a0f1e1
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Nov 18 17:26:20 2020 +0800

    rockchip: rk3568: delete useless code
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Idf90798700f1128d275d0311ed50ed531acaa42c

diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c
index 42ab992521..695c8afa83 100644
--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
@@ -29,7 +29,6 @@ DECLARE_GLOBAL_DATA_PTR;
 #define CRU_BASE		0xfdd20000
 #define CRU_SOFTRST_CON26	0x468
 #define SGRF_BASE		0xFDD18000
-#define SGRF_SOC_CON3		0xc
 #define SGRF_SOC_CON4		0x10
 
 enum {
@@ -759,7 +758,6 @@ int spl_fit_standalone_release(uintptr_t entry_point)
 	udelay(100);
 	/* set the scr1 addr */
 	writel((0xffff0000) | (entry_point >> 16), GRF_BASE + GRF_SOC_CON4);
-	writel(0x20 << 16, SGRF_BASE + SGRF_SOC_CON3);
 	udelay(10);
 	/* release the scr1 */
 	writel(0x04000000, CRU_BASE + CRU_SOFTRST_CON26);

commit a741b19cf7cb71198a6985947084ab26cf1ce58b
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Aug 25 21:18:41 2020 +0800

    spl: fit: map the bad block table depending on the image's size
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I6a257327fce16c8bf5ce10c8cbae0b60e044eb88

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 8b534e3574..7147571ff9 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -9,9 +9,10 @@
 #include <boot_rkimg.h>
 #include <errno.h>
 #include <image.h>
-#include <linux/libfdt.h>
 #include <spl.h>
 #include <malloc.h>
+#include <mtd_blk.h>
+#include <linux/libfdt.h>
 
 #ifndef CONFIG_SYS_BOOTM_LEN
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)
@@ -419,6 +420,9 @@ static void *spl_fit_load_blob(struct spl_load_info *info,
 			align_len) & ~align_len);
 	sectors = get_aligned_image_size(info, size, 0);
 	count = info->read(info, sector, sectors, fit);
+#ifdef CONFIG_MTD_BLK
+	mtd_blk_map_fit(info->dev, sector, fit);
+#endif
 	debug("fit read sector %lx, sectors=%d, dst=%p, count=%lu\n",
 	      sector, sectors, fit, count);
 	if (count == 0)

commit 661bcdfeff3fd2195f5aa1c7658054e29aef1367
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Aug 25 21:14:14 2020 +0800

    mtd: mtd_blk: add mtd_blk_map_fit() to create map for fit image
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I0d0195f455ee9afb32676510fc077fe63ae5c7ad

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index 472e19978d..b54b23d1bd 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -9,6 +9,7 @@
 #include <boot_rkimg.h>
 #include <dm.h>
 #include <errno.h>
+#include <image.h>
 #include <malloc.h>
 #include <nand.h>
 #include <part.h>
@@ -140,6 +141,34 @@ void mtd_blk_map_partitions(struct blk_desc *desc)
 	}
 }
 
+void mtd_blk_map_fit(struct blk_desc *desc, ulong sector, void *fit)
+{
+	struct mtd_info *mtd = NULL;
+	int totalsize = 0;
+
+	if (desc->if_type != IF_TYPE_MTD)
+		return;
+
+	if (desc->devnum == BLK_MTD_NAND) {
+#if defined(CONFIG_NAND)
+		mtd = dev_get_priv(desc->bdev->parent);
+#endif
+	} else if (desc->devnum == BLK_MTD_SPI_NAND) {
+#if defined(CONFIG_MTD_SPI_NAND)
+		mtd = desc->bdev->priv;
+#endif
+	}
+
+#ifdef CONFIG_SPL_FIT
+	if (fit_get_totalsize(fit, &totalsize))
+		debug("Can not find /totalsize node.\n");
+#endif
+	if (mtd && totalsize) {
+		if (mtd_blk_map_table_init(desc, sector << 9, totalsize + (size_t)mtd->erasesize))
+			debug("Map block table fail.\n");
+	}
+}
+
 static __maybe_unused int mtd_map_read(struct mtd_info *mtd, loff_t offset,
 				       size_t *length, size_t *actual,
 				       loff_t lim, u_char *buffer)
diff --git a/include/mtd_blk.h b/include/mtd_blk.h
index eadea048db..e5e4b23ecf 100644
--- a/include/mtd_blk.h
+++ b/include/mtd_blk.h
@@ -16,5 +16,6 @@ int mtd_blk_map_table_init(struct blk_desc *desc,
 			   loff_t offset,
 			   size_t length);
 void mtd_blk_map_partitions(struct blk_desc *desc);
+void mtd_blk_map_fit(struct blk_desc *desc, ulong sector, void *fit);
 
 #endif

commit bccbe934302ee10296edd0aee04d02b539a04987
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Tue Nov 17 16:02:26 2020 +0800

    configs: rk3308: add tpl support
    
    Change-Id: Idd2b4f087d8d281edb750c6e65ac325b2729cd46
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index 947f1c06bc..ae25f7f4b9 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -9,8 +9,6 @@ CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 # CONFIG_USING_KERNEL_DTB is not set
-CONFIG_TPL_LIBCOMMON_SUPPORT=y
-CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_TARGET_EVB_RK3308=y
 CONFIG_SPL_STACK_R_ADDR=0xc00000
@@ -30,7 +28,7 @@ CONFIG_SPL_STACK_R=y
 CONFIG_SPL_RELOC_TEXT_BASE=0x3001000
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
-CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_TPL_TINY_FRAMEWORK=y
 # CONFIG_FASTBOOT is not set
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_CONSOLE is not set
@@ -55,10 +53,8 @@ CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_ISO_PARTITION is not set
 CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_SPL_OF_CONTROL=y
-CONFIG_TPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
-CONFIG_TPL_DM=y
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_CLK=y
@@ -77,6 +73,7 @@ CONFIG_REGULATOR_PWM=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
+CONFIG_TPL_RAM=y
 CONFIG_DM_RESET=y
 CONFIG_RKFLASH=y
 CONFIG_RKNANDC_NAND=y
@@ -86,6 +83,7 @@ CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF0C0000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_ROCKCHIP_UART_MUX_SEL_M=1
 CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
diff --git a/configs/rk3308_defconfig b/configs/rk3308_defconfig
index 542a3d4d17..50abe01fd9 100644
--- a/configs/rk3308_defconfig
+++ b/configs/rk3308_defconfig
@@ -8,8 +8,6 @@ CONFIG_ROCKCHIP_RK3308=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
-CONFIG_TPL_LIBCOMMON_SUPPORT=y
-CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_TARGET_EVB_RK3308=y
 CONFIG_SPL_STACK_R_ADDR=0xc00000
@@ -31,7 +29,7 @@ CONFIG_SPL_STACK_R=y
 CONFIG_SPL_RELOC_TEXT_BASE=0x3001000
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
-CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_TPL_TINY_FRAMEWORK=y
 # CONFIG_FASTBOOT is not set
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_CONSOLE is not set
@@ -55,10 +53,8 @@ CONFIG_CMD_PMIC=y
 # CONFIG_ISO_PARTITION is not set
 CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_SPL_OF_CONTROL=y
-CONFIG_TPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
-CONFIG_TPL_DM=y
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_CLK=y
@@ -93,6 +89,7 @@ CONFIG_DM_CHARGE_DISPLAY=y
 CONFIG_CHARGE_ANIMATION=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
+CONFIG_TPL_RAM=y
 CONFIG_DM_RESET=y
 CONFIG_RKFLASH=y
 CONFIG_RKNANDC_NAND=y
@@ -102,6 +99,7 @@ CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF0C0000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_ROCKCHIP_UART_MUX_SEL_M=1
 CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_SYSRESET=y
 CONFIG_DM_THERMAL=y

commit 379e9cabdea40f47dad0bcb38df5a8eaf8f67c90
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Tue Nov 17 15:55:45 2020 +0800

    drivers: ram: rk3308: add sdram_rk3308.c build
    
    Change-Id: I43079e6709d6eeb691eb73786bba7920c081b9c9
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 2cc5a06d0a..cc28c0bbd9 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -227,6 +227,22 @@ config ROCKCHIP_RK3308
 	  The Rockchip RK3308 is a ARM-based Soc which embeded with quad
 	  Cortex-A35 and highly integrated audio interfaces.
 
+if ROCKCHIP_RK3308
+
+config TPL_LDSCRIPT
+	default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
+
+config TPL_TEXT_BASE
+	default 0xfff81000
+
+config TPL_MAX_SIZE
+	default 12288
+
+config TPL_STACK
+	default 0xfff84000
+
+endif
+
 config ROCKCHIP_RK3328
 	bool "Support Rockchip RK3328"
 	select ARM64
@@ -535,6 +551,7 @@ config ROCKCHIP_STIMER_BASE
 	default 0x2000e000 if ROCKCHIP_RK3188
 	default 0x110d0020 if ROCKCHIP_RK322X
 	default 0xff810020 if ROCKCHIP_RK3288
+	default 0xff1b00a0 if ROCKCHIP_RK3308
 	default 0xff1d0020 if ROCKCHIP_RK3328
 	default 0xff830020 if ROCKCHIP_RK3368
 	default 0xff8680a0 if ROCKCHIP_RK3399
diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index c3f847b063..84fa5d6b69 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_ROCKCHIP_RK3128) += sdram_rk3128.o
 obj-$(CONFIG_ROCKCHIP_RK3188) += sdram_rk3188.o
 obj-$(CONFIG_ROCKCHIP_RK322X) += sdram_rk322x.o
 obj-$(CONFIG_ROCKCHIP_RK3288) += sdram_rk3288.o
+obj-$(CONFIG_ROCKCHIP_RK3308) += sdram_rv1108_pctl_phy.o sdram_rk3308.o
 obj-$(CONFIG_ROCKCHIP_RK3328) += sdram_rk3328.o sdram_pctl_px30.o sdram_phy_px30.o
 obj-$(CONFIG_ROCKCHIP_RK3399) += sdram_rk3399.o
 obj-$(CONFIG_ROCKCHIP_RK3568) += sdram_rk3568.o

commit 046cd380542c12e6b63524aee8d5613e86510c0b
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Nov 13 09:17:06 2020 +0800

    rockchip: rk3568: disable eDP phy to save power
    
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
    Change-Id: I4b94c5c28196f72c9d41efe7bdb9eb837eb6adf4

diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c
index 0a68f88467..42ab992521 100644
--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
@@ -20,6 +20,9 @@ DECLARE_GLOBAL_DATA_PTR;
 #define GRF_GPIO1C_DS_2		0x228
 #define GRF_GPIO1C_DS_3		0x22c
 #define GRF_SOC_CON4		0x510
+#define EDP_PHY_GRF_BASE	0xfdcb0000
+#define EDP_PHY_GRF_CON0	(EDP_PHY_GRF_BASE + 0x00)
+#define EDP_PHY_GRF_CON10	(EDP_PHY_GRF_BASE + 0x28)
 #define PMU_BASE_ADDR		0xfdd90000
 #define PMU_NOC_AUTO_CON0	(0x70)
 #define PMU_NOC_AUTO_CON1	(0x74)
@@ -739,6 +742,10 @@ int arch_cpu_init(void)
 	writel(0x3f3f0707, GRF_BASE + GRF_GPIO1C_DS_1);
 	writel(0x3f3f0707, GRF_BASE + GRF_GPIO1C_DS_2);
 	writel(0x3f3f0707, GRF_BASE + GRF_GPIO1C_DS_3);
+
+	/* Disable eDP phy by default */
+	writel(0x00070007, EDP_PHY_GRF_CON10);
+	writel(0x0ff10ff1, EDP_PHY_GRF_CON0);
 #endif
 
 	return 0;

commit b85730d9e9389540a99794c19663a4c862d8ee38
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Mon Nov 16 18:43:28 2020 +0800

    clk: rockchip: rv1126: Fix mask bits for gmac src clks
    
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
    Change-Id: I7f81a3e7586dcb85511502d3a329ac1cba7ccc8a

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rv1126.h b/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
index caafa35c4d..7ab80900c9 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
@@ -441,7 +441,7 @@ enum {
 
 	/* GRF_IOFUNC_CON1 */
 	GMAC_SRC_SEL_SHIFT	= 12,
-	GMAC_SRC_SEL_MASK	= 1 < GMAC_SRC_SEL_SHIFT,
+	GMAC_SRC_SEL_MASK	= 1 << GMAC_SRC_SEL_SHIFT,
 	GMAC_SRC_SEL_M0		= 0,
 	GMAC_SRC_SEL_M1,
 };
diff --git a/drivers/clk/rockchip/clk_rv1126.c b/drivers/clk/rockchip/clk_rv1126.c
index d1dd714485..f0d08023fc 100644
--- a/drivers/clk/rockchip/clk_rv1126.c
+++ b/drivers/clk/rockchip/clk_rv1126.c
@@ -1935,7 +1935,7 @@ static int rv1126_gmac_src_m0_set_parent(struct clk *clk, struct clk *parent)
 		rk_clrsetreg(&cru->gmac_con, GMAC_SRC_M0_SEL_MASK,
 			     GMAC_SRC_M0_SEL_INT << GMAC_SRC_M0_SEL_SHIFT);
 	else
-		rk_clrsetreg(&cru->gmac_con, GMAC_SRC_SEL_MASK,
+		rk_clrsetreg(&cru->gmac_con, GMAC_SRC_M0_SEL_MASK,
 			     GMAC_SRC_M0_SEL_EXT << GMAC_SRC_M0_SEL_SHIFT);
 
 	return 0;
@@ -1947,10 +1947,10 @@ static int rv1126_gmac_src_m1_set_parent(struct clk *clk, struct clk *parent)
 	struct rv1126_cru *cru = priv->cru;
 
 	if (parent->id == CLK_GMAC_DIV)
-		rk_clrsetreg(&cru->gmac_con, GMAC_SRC_M0_SEL_MASK,
+		rk_clrsetreg(&cru->gmac_con, GMAC_SRC_M1_SEL_MASK,
 			     GMAC_SRC_M1_SEL_INT << GMAC_SRC_M1_SEL_SHIFT);
 	else
-		rk_clrsetreg(&cru->gmac_con, GMAC_SRC_SEL_MASK,
+		rk_clrsetreg(&cru->gmac_con, GMAC_SRC_M1_SEL_MASK,
 			     GMAC_SRC_M1_SEL_EXT << GMAC_SRC_M1_SEL_SHIFT);
 
 	return 0;

commit a1a5fedba49a77a8915e264b7e1591517438db6e
Author: Ren Jianing <jianing.ren@rock-chips.com>
Date:   Mon Nov 16 20:54:03 2020 +0800

    configs: rk3568: enable dwc3 host port
    
    Signed-off-by: Ren Jianing <jianing.ren@rock-chips.com>
    Change-Id: I8272b1a405c4d558c4eec5f035f776b70dffa574

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index 804a749403..49bb5d76bc 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -85,6 +85,7 @@ CONFIG_ROCKCHIP_GPIO_V2=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y
 CONFIG_ADC_KEY=y
+CONFIG_MISC=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MMC_SDHCI=y
@@ -143,6 +144,7 @@ CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_OHCI_GENERIC=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_DWC3_GENERIC=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_MANUFACTURER="Rockchip"

commit 08d283a46e703cae2863e30311683df27b504eeb
Author: Ren Jianing <jianing.ren@rock-chips.com>
Date:   Mon Nov 16 17:28:49 2020 +0800

    rockchip: dts: rk3568: disable usb2 host by default
    
    If we enable usb2phy1 with dm-pre-reloc in uboot and disable it
    in kernel, the status of usb2phy1 will be "okay" and usb2phy1
    node will be put ahead of usb2phy0 which leads to vbus detect
    fail.
    
    Here is the error log:
      get syscon usbgrf failed
      rockchip_chg_get_type: get u2phy node failed: -19
    
    Signed-off-by: Ren Jianing <jianing.ren@rock-chips.com>
    Change-Id: I16c1ddd42bf1a2e7a98fc9cdf1509a62714c8b6b

diff --git a/arch/arm/dts/rk3568-u-boot.dtsi b/arch/arm/dts/rk3568-u-boot.dtsi
index 410d3280ce..2f12b7d856 100644
--- a/arch/arm/dts/rk3568-u-boot.dtsi
+++ b/arch/arm/dts/rk3568-u-boot.dtsi
@@ -38,11 +38,6 @@
 	status = "okay";
 };
 
-&usb2phy1_grf {
-	u-boot,dm-pre-reloc;
-	status = "okay";
-};
-
 &usbdrd30 {
 	u-boot,dm-pre-reloc;
 	status = "okay";
@@ -63,26 +58,6 @@
 	status = "okay";
 };
 
-&usb_host0_ehci {
-	u-boot,dm-pre-reloc;
-	status = "okay";
-};
-
-&usb_host0_ohci {
-	u-boot,dm-pre-reloc;
-	status = "okay";
-};
-
-&usb_host1_ehci {
-	u-boot,dm-pre-reloc;
-	status = "okay";
-};
-
-&usb_host1_ohci {
-	u-boot,dm-pre-reloc;
-	status = "okay";
-};
-
 &usb2phy0 {
 	u-boot,dm-pre-reloc;
 	status = "okay";
@@ -98,21 +73,6 @@
 	status = "okay";
 };
 
-&usb2phy1 {
-	u-boot,dm-pre-reloc;
-	status = "okay";
-};
-
-&u2phy1_otg {
-	u-boot,dm-pre-reloc;
-	status = "okay";
-};
-
-&u2phy1_host {
-	u-boot,dm-pre-reloc;
-	status = "okay";
-};
-
 &cru {
 	u-boot,dm-pre-reloc;
 	status = "okay";

commit 0934588e54b7337d0de1209d63df426e977dd7a1
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Nov 17 10:37:18 2020 +0800

    rockchip: rk3568: support bring-up the mcu
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ib992d4ebe078d8d8752f72c8a9824e85b5f24da2

diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c
index 9b816c8711..0a68f88467 100644
--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
@@ -26,9 +26,8 @@ DECLARE_GLOBAL_DATA_PTR;
 #define CRU_BASE		0xfdd20000
 #define CRU_SOFTRST_CON26	0x468
 #define SGRF_BASE		0xFDD18000
+#define SGRF_SOC_CON3		0xc
 #define SGRF_SOC_CON4		0x10
-#define GRF_FIREWALL_SLV_CON0	0x240
-#define GRF_FIREWALL_SLV_CON7	0x25c
 
 enum {
 	/* PMU_GRF_GPIO0C_IOMUX_L */
@@ -752,9 +751,9 @@ int spl_fit_standalone_release(uintptr_t entry_point)
 	writel(0x04000400, CRU_BASE + CRU_SOFTRST_CON26);
 	udelay(100);
 	/* set the scr1 addr */
-	writel(entry_point >> 16, GRF_BASE + GRF_SOC_CON4);
-	writel(0x1 << (16 + 15), SGRF_BASE + GRF_FIREWALL_SLV_CON0);
-	writel(0x3 << (16 + 1), SGRF_BASE + GRF_FIREWALL_SLV_CON7);
+	writel((0xffff0000) | (entry_point >> 16), GRF_BASE + GRF_SOC_CON4);
+	writel(0x20 << 16, SGRF_BASE + SGRF_SOC_CON3);
+	udelay(10);
 	/* release the scr1 */
 	writel(0x04000000, CRU_BASE + CRU_SOFTRST_CON26);
 

commit bb82cbf82dcec826c6dd338064c71edae239a75f
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Nov 17 10:20:15 2020 +0800

    rockchip: rv1126: hold a few time for mcu to capture the boot address
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: If30b429577e715d2851eaab1c0fa6a84f0ad8850

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126.c b/arch/arm/mach-rockchip/rv1126/rv1126.c
index ffdf0f4815..a5627017b5 100644
--- a/arch/arm/mach-rockchip/rv1126/rv1126.c
+++ b/arch/arm/mach-rockchip/rv1126/rv1126.c
@@ -702,6 +702,7 @@ int spl_fit_standalone_release(uintptr_t entry_point)
 	/* set the scr1 addr */
 	writel(entry_point, SGRF_BASE + SGRF_CON_SCR1_BOOT_ADDR);
 	writel(0x00ff00bf, SGRF_BASE + SGRF_SOC_CON3);
+	udelay(10);
 	/* release the scr1 */
 	writel(0x04000000, CRU_BASE + CRU_SOFTRST_CON02);
 

commit 8ec8d58eeb2a43c1d2630d9ef41fac2a7c482082
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Mon Nov 9 16:42:20 2020 +0800

    drivers: ram: rockchip: add rk3308 sdram driver
    
    Change-Id: I96160af2095ba21b440c6d3789349d8cbc4fea75
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
index 46288468f2..5dda2406d2 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
@@ -110,6 +110,8 @@ enum {
 	PLL_PD1_SHIFT		= 14,
 	PLL_PD_SHIFT		= 13,
 	PLL_PD_MASK		= 1 << PLL_PD_SHIFT,
+	PLLPD0_POWER_DOWN	= 1,
+	PLLPD0_NO_POWER_DOWN	= 0,
 	PLL_DSMPD_SHIFT		= 12,
 	PLL_DSMPD_MASK		= 1 << PLL_DSMPD_SHIFT,
 	PLL_LOCK_STATUS_SHIFT	= 10,
@@ -315,4 +317,475 @@ enum {
 
 check_member(rk3308_cru, emmc_con[1], 0x494);
 
+enum {	/* DPLL_CON0, VPLL0_CON0, VPLL1_CON0 */
+	POSTDIV1_SHIFT			= 12,
+	POSTDIV1_MASK			= 0x7 << POSTDIV1_SHIFT,
+	FBDIV_SHIFT			= 0,
+	FBDIV_MASK			= 0xfff << FBDIV_SHIFT,
+
+	/* DPLL_CON1, VPLL0_CON1, VPLL1_CON1 */
+	PLLPD0_SHIFT			= 13,
+	PLLPD0_MASK			= 1 << PLLPD0_SHIFT,
+	DSMPD_SHIFT			= 12,
+	DSMPD_MASK			= 1 << DSMPD_SHIFT,
+	INTEGER_MODE			= 1,
+	FRACTIONAL_MODE			= 0,
+	PLL_LOCK_SHIFT			= 10,
+	PLL_LOCK_MASK			= 0x1 << PLL_LOCK_SHIFT,
+	POSTDIV2_SHIFT			= 6,
+	POSTDIV2_MASK			= 0x7 << POSTDIV2_SHIFT,
+	REFDIV_SHIFT			= 0,
+	REFDIV_MASK			= 0x3f << REFDIV_SHIFT,
+
+	/* VPLL0_CON2, VPLL1_CON2 */
+	FRACDIV_SHIFT			= 0,
+	FRACDIV_MASK			= 0xffffff << FRACDIV_SHIFT,
+
+	/* CRU_MODE */
+	VPLL1_CLK_SEL_SHIFT		= 13,
+	VPLL1_CLK_SEL_MASK		= 0x1 << VPLL1_CLK_SEL_SHIFT,
+	VPLL1_CLK_SEL_WITHOUT_LVL_SHIFT	= 1,
+
+	VPLL0_CLK_SEL_SHIFT		= 12,
+	VPLL0_CLK_SEL_MASK		= 0x1 << VPLL0_CLK_SEL_SHIFT,
+	VPLL0_CLK_SEL_WITHOUT_LVL_SHIFT	= 1,
+
+	DPLL_CLK_SEL_SHIFT		= 11,
+	DPLL_CLK_SEL_MASK		= 0x1 << DPLL_CLK_SEL_SHIFT,
+	DPLL_CLK_SEL_WITHOUT_LVL_SHIFT	= 1,
+
+	APLL_CLK_SEL_SHIFT		= 10,
+	APLL_CLK_SEL_MASK		= 0x1 << APLL_CLK_SEL_SHIFT,
+	APLL_CLK_SEL_WITHOUT_LVL_SHIFT	= 1,
+
+	VPLL1_WORK_MODE_SHIFT		= 6,
+	VPLL1_WORK_MODE_MASK		= 0x3 << VPLL1_WORK_MODE_SHIFT,
+	VPLL1_WORK_MODE_XIN_OSC0	= 0,
+	VPLL1_WORK_MODE_PLL		= 1,
+	VPLL1_WORK_MODE_32K		= 2,
+
+	VPLL0_WORK_MODE_SHIFT		= 4,
+	VPLL0_WORK_MODE_MASK		= 0x3 << VPLL0_WORK_MODE_SHIFT,
+	VPLL0_WORK_MODE_XIN_OSC0	= 0,
+	VPLL0_WORK_MODE_PLL		= 1,
+	VPLL0_WORK_MODE_32K		= 2,
+
+	DPLL_WORK_MODE_SHIFT		= 2,
+	DPLL_WORK_MODE_MASK		= 0x3 << DPLL_WORK_MODE_SHIFT,
+	DPLL_WORK_MODE_XIN_OSC0		= 0,
+	DPLL_WORK_MODE_PLL		= 1,
+	DPLL_WORK_MODE_32K		= 2,
+
+	APLL_WORK_MODE_SHIFT		= 0,
+	APLL_WORK_MODE_MASK		= 0x3 << APLL_WORK_MODE_SHIFT,
+	APLL_WORK_MODE_XIN_OSC0		= 0,
+	APLL_WORK_MODE_PLL		= 1,
+
+	/* GLB_RST_CON */
+	WDT_GLB_SRST_CTRL_SHIFT		= 1,
+	WDT_GLB_SRST_CTRL		= 1,
+	TSADC_GLB_SRST_CTRL_SHIFT	= 0,
+	TSADC_GLB_SRST_CTRL		= 1,
+
+	/* CLKSEL_CON1 */
+	DDRPHY4X_PLL_CLK_SEL_SHIFT	= 6,
+	DDRPHY4X_PLL_CLK_SEL_MASK	= 0x3 << DDRPHY4X_PLL_CLK_SEL_SHIFT,
+	DDRPHY4X_PLL_CLK_SEL_DPLL	= 0,
+	DDRPHY4X_DIV_CON_SIHFT		= 0,
+	DDRPHY4X_DIV_CON_MASK		= 0x7 << DDRPHY4X_DIV_CON_SIHFT,
+	DDRPHY4X_DIV_CON		= 0,
+
+	/* CLKSEL_CON5 */
+	A_H_PCLK_BUS_PLL_SEL_SHIFT	= 6,
+	A_H_PCLK_BUS_PLL_SEL_MASK	= 0x3 << A_H_PCLK_BUS_PLL_SEL_SHIFT,
+	A_H_PCLK_BUS_PLL_SEL_DPLL	= 0,
+	A_H_PCLK_BUS_PLL_SEL_VPLL0	= 1,
+	A_H_PCLK_BUS_PLL_SEL_VPLL1	= 2,
+	ACLK_BUS_DIV_CON_SHIFT		= 0,
+	ACLK_BUS_DIV_CON_MASK		= 0x1f << ACLK_BUS_DIV_CON_SHIFT,
+	ACLK_BUS_DIV_CON_7		= 7,
+	ACLK_BUS_DIV_CON_5		= 5,
+	ACLK_BUS_DIV_CON_3		= 3,
+
+	/* CLKSEL_CON6 */
+	PCLK_BUS_DIV_CON_SHIFT		= 8,
+	PCLK_BUS_DIV_CON_MASK		= 0x1f << PCLK_BUS_DIV_CON_SHIFT,
+	PCLK_BUS_DIV_CON_31		= 31,
+	PCLK_BUS_DIV_CON_25		= 25,
+	PCLK_BUS_DIV_CON_15		= 15,
+	HCLK_BUS_DIV_CON_SHIFT		= 0,
+	HCLK_BUS_DIV_CON_MASK		= 0x1f << HCLK_BUS_DIV_CON_SHIFT,
+	HCLK_BUS_DIV_CON_15		= 15,
+	HCLK_BUS_DIV_CON_13		= 13,
+	HCLK_BUS_DIV_CON_11		= 11,
+	HCLK_BUS_DIV_CON_7		= 7,
+
+	/* CLKSEL_CON7 */
+	CLK_CRYPTO_APK_SEL_SHIFT	= 14,
+	CLK_CRYPTO_APK_SEL_MASK		= 0x3 << CLK_CRYPTO_APK_SEL_SHIFT,
+	CLK_CRYPTO_APK_SEL_DPLL		= 0,
+	CLK_CRYPTO_APK_DIV_SHIFT	= 8,
+	CLK_CRYPTO_APK_DIV_MASK		= 0x1f << CLK_CRYPTO_APK_DIV_SHIFT,
+	CLK_CRYPTO_APK_DIV_15		= 15,
+	CLK_CRYPTO_APK_DIV_13		= 13,
+	CLK_CRYPTO_APK_DIV_11		= 11,
+	CLK_CRYPTO_APK_DIV_7		= 7,
+	CLK_CRYPTO_PLL_SEL_SHIFT	= 6,
+	CLK_CRYPTO_PLL_SEL_MASK		= 0x3 << CLK_CRYPTO_PLL_SEL_SHIFT,
+	CLK_CRYPTO_PLL_SEL_DPLL		= 0,
+	CLK_CRYPTO_DIV_CON_SHIFT	= 0,
+	CLK_CRYPTO_DIV_CON_MASK		= 0x1f << CLK_CRYPTO_DIV_CON_SHIFT,
+	CLK_CRYPTO_DIV_CON_15		= 15,
+	CLK_CRYPTO_DIV_CON_13		= 13,
+	CLK_CRYPTO_DIV_CON_11		= 11,
+	CLK_CRYPTO_DIV_CON_7		= 7,
+
+	/* CLKSEL_CON8 */
+	DCLK_VOP_SEL_DCLK_VOP		= 0,
+	DCLK_VOP_DIV_CON_SHIFT		= 0,
+	DCLK_VOP_DIV_CON_MASK		= 0xff << DCLK_VOP_DIV_CON_SHIFT,
+	DCLK_VOP_DIV_CON_15		= 15,
+	DCLK_VOP_DIV_CON_11		= 11,
+
+	/* CLKSEL_CON10 */
+	CLK_UART0_PLL_SEL_SHIFT		= 13,
+	CLK_UART0_PLL_SEL_MASK		= 0x7 << CLK_UART0_PLL_SEL_SHIFT,
+	CLK_UART0_PLL_SEL_XIN_OSC0	= 4,
+	CLK_UART0_DIV_CON_SHIFT		= 0,
+	CLK_UART0_DIV_CON_MASK		= 0x1f << CLK_UART0_DIV_CON_SHIFT,
+	CLK_UART0_DIV_CON		= 0,
+	CLK_UART0_DIV_CON_15		= 15,
+
+	/* CLKSEL_CON13 */
+	CLK_UART1_PLL_SEL_SHIFT		= 13,
+	CLK_UART1_PLL_SEL_MASK		= 0x7 << CLK_UART1_PLL_SEL_SHIFT,
+	CLK_UART1_PLL_SEL_XIN_OSC0	= 4,
+	CLK_UART1_DIV_CON_SHIFT		= 0,
+	CLK_UART1_DIV_CON_MASK		= 0x1f << CLK_UART1_DIV_CON_SHIFT,
+	CLK_UART1_DIV_CON		= 0,
+	CLK_UART1_DIV_CON_15		= 15,
+
+	/* CLKSEL_CON16 */
+	CLK_UART2_PLL_SEL_SHIFT		= 13,
+	CLK_UART2_PLL_SEL_MASK		= 0x7 << CLK_UART2_PLL_SEL_SHIFT,
+	CLK_UART2_PLL_SEL_XIN_OSC0	= 4,
+	CLK_UART2_DIV_CON_SHIFT		= 0,
+	CLK_UART2_DIV_CON_MASK		= 0x1f << CLK_UART2_DIV_CON_SHIFT,
+	CLK_UART2_DIV_CON		= 0,
+	CLK_UART2_DIV_CON_15		= 15,
+
+	/* CLKSEL_CON19 */
+	CLK_UART3_PLL_SEL_SHIFT		= 13,
+	CLK_UART3_PLL_SEL_MASK		= 0x7 << CLK_UART3_PLL_SEL_SHIFT,
+	CLK_UART3_PLL_SEL_XIN_OSC0	= 4,
+	CLK_UART3_DIV_CON_SHIFT		= 0,
+	CLK_UART3_DIV_CON_MASK		= 0x1f << CLK_UART3_DIV_CON_SHIFT,
+	CLK_UART3_DIV_CON		= 0,
+	CLK_UART3_DIV_CON_15		= 15,
+
+	/* CLKSEL_CON22 */
+	CLK_UART4_PLL_SEL_SHIFT		= 13,
+	CLK_UART4_PLL_SEL_MASK		= 0x7 << CLK_UART4_PLL_SEL_SHIFT,
+	CLK_UART4_PLL_SEL_XIN_OSC0	= 4,
+	CLK_UART4_DIV_CON_SHIFT		= 0,
+	CLK_UART4_DIV_CON_MASK		= 0x1f << CLK_UART4_DIV_CON_SHIFT,
+	CLK_UART4_DIV_CON		= 0,
+	CLK_UART4_DIV_CON_15		= 15,
+
+	/* CLKSEL_CON25 */
+	CLK_I2C0_PLL_SEL_SHIFT		= 14,
+	CLK_I2C0_PLL_SEL_MASK		= 0x3 << CLK_I2C0_PLL_SEL_SHIFT,
+	CLK_I2C0_PLL_SEL_DPLL		= 0,
+	CLK_I2C0_DIV_CON_SHIFT		= 0,
+	CLK_I2C0_DIV_CON_MASK		= 0x7f << CLK_I2C0_DIV_CON_SHIFT,
+	CLK_I2C0_DIV_CON_7		= 7,
+	CLK_I2C0_DIV_CON_5		= 5,
+	CLK_I2C0_DIV_CON_3		= 3,
+
+	/* CLKSEL_CON26 */
+	CLK_I2C1_PLL_SEL_SHIFT		= 14,
+	CLK_I2C1_PLL_SEL_MASK		= 0x3 << CLK_I2C1_PLL_SEL_SHIFT,
+	CLK_I2C1_PLL_SEL_DPLL		= 0,
+	CLK_I2C1_DIV_CON_SHIFT		= 0,
+	CLK_I2C1_DIV_CON_MASK		= 0x7f << CLK_I2C1_DIV_CON_SHIFT,
+	CLK_I2C1_DIV_CON_7		= 7,
+	CLK_I2C1_DIV_CON_5		= 5,
+	CLK_I2C1_DIV_CON_3		= 3,
+
+	/* CLKSEL_CON27 */
+	CLK_I2C2_PLL_SEL_SHIFT		= 14,
+	CLK_I2C2_PLL_SEL_MASK		= 0x3 << CLK_I2C2_PLL_SEL_SHIFT,
+	CLK_I2C2_PLL_SEL_DPLL		= 0,
+	CLK_I2C2_DIV_CON_SHIFT		= 0,
+	CLK_I2C2_DIV_CON_MASK		= 0x7f << CLK_I2C2_DIV_CON_SHIFT,
+	CLK_I2C2_DIV_CON_7		= 7,
+	CLK_I2C2_DIV_CON_5		= 5,
+	CLK_I2C2_DIV_CON_3		= 3,
+
+	/* CLKSEL_CON28 */
+	CLK_I2C3_PLL_SEL_SHIFT		= 14,
+	CLK_I2C3_PLL_SEL_MASK		= 0x3 << CLK_I2C3_PLL_SEL_SHIFT,
+	CLK_I2C3_PLL_SEL_DPLL		= 0,
+	CLK_I2C3_DIV_CON_SHIFT		= 0,
+	CLK_I2C3_DIV_CON_MASK		= 0x7f << CLK_I2C3_DIV_CON_SHIFT,
+	CLK_I2C3_DIV_CON_7		= 7,
+	CLK_I2C3_DIV_CON_5		= 5,
+	CLK_I2C3_DIV_CON_3		= 3,
+
+	/* CLKSEL_CON29 */
+	CLK_PWM_DIV_CON_15		= 15,
+	CLK_PWM_DIV_CON_11		= 11,
+	CLK_PWM_DIV_CON_7		= 7,
+
+	/* CLKSEL_CON30 */
+	CLK_SPI0_PLL_SEL_SHIFT		= 14,
+	CLK_SPI0_PLL_SEL_MASK		= 0x3 << CLK_SPI0_PLL_SEL_SHIFT,
+	CLK_SPI0_PLL_SEL_DPLL		= 0,
+	CLK_SPI0_DIV_CON_SHIFT		= 0,
+	CLK_SPI0_DIV_CON_MASK		= 0x7f << CLK_SPI0_DIV_CON_SHIFT,
+	CLK_SPI0_DIV_CON_15		= 15,
+	CLK_SPI0_DIV_CON_11		= 11,
+	CLK_SPI0_DIV_CON_7		= 7,
+
+	/* CLKSEL_CON31 */
+	CLK_SPI1_PLL_SEL_SHIFT		= 14,
+	CLK_SPI1_PLL_SEL_MASK		= 0x3 << CLK_SPI1_PLL_SEL_SHIFT,
+	CLK_SPI1_PLL_SEL_DPLL		= 0,
+	CLK_SPI1_DIV_CON_SHIFT		= 0,
+	CLK_SPI1_DIV_CON_MASK		= 0x7f << CLK_SPI1_DIV_CON_SHIFT,
+	CLK_SPI1_DIV_CON_15		= 15,
+	CLK_SPI1_DIV_CON_11		= 11,
+	CLK_SPI1_DIV_CON_7		= 7,
+
+	/* CLKSEL_CON32 */
+	CLK_SPI2_PLL_SEL_SHIFT		= 14,
+	CLK_SPI2_PLL_SEL_MASK		= 0x3 << CLK_SPI2_PLL_SEL_SHIFT,
+	CLK_SPI2_PLL_SEL_DPLL		= 0,
+	CLK_SPI2_DIV_CON_SHIFT		= 0,
+	CLK_SPI2_DIV_CON_MASK		= 0x7f << CLK_SPI2_DIV_CON_SHIFT,
+	CLK_SPI2_DIV_CON_15		= 15,
+	CLK_SPI2_DIV_CON_11		= 11,
+	CLK_SPI2_DIV_CON_7		= 7,
+
+	/* CLKSEL_CON36 */
+	A_H_P_PERI_PLL_SEL_SHIFT	= 6,
+	A_H_P_PERI_PLL_SEL_MASK		= 0x3 << A_H_P_PERI_PLL_SEL_SHIFT,
+	A_H_P_PERI_PLL_SEL_DPLL		= 0,
+	ACLK_PERI_DIV_CON_SHIFT		= 0,
+	ACLK_PERI_DIV_CON_MASK		= 0x1f << ACLK_PERI_DIV_CON_SHIFT,
+	ACLK_PERI_DIV_CON_7		= 7,
+	ACLK_PERI_DIV_CON_5		= 5,
+	ACLK_PERI_DIV_CON_3		= 3,
+
+	/* CLKSEL_CON37 */
+	PCLK_PERI_DIV_CON_SHIFT		= 8,
+	PCLK_PERI_DIV_CON_MASK		= 0x1f << PCLK_PERI_DIV_CON_SHIFT,
+	PCLK_PERI_DIV_CON_31		= 31,
+	PCLK_PERI_DIV_CON_27		= 27,
+	PCLK_PERI_DIV_CON_23		= 23,
+	PCLK_PERI_DIV_CON_15		= 15,
+	HCLK_PERI_DIV_CON_SHIFT		= 0,
+	HCLK_PERI_DIV_CON_MASK		= 0x1f << HCLK_PERI_DIV_CON_SHIFT,
+	HCLK_PERI_DIV_CON_15		= 15,
+	HCLK_PERI_DIV_CON_13		= 13,
+	HCLK_PERI_DIV_CON_11		= 11,
+	HCLK_PERI_DIV_CON_7		= 7,
+
+	/* CLKSEL_CON38 */
+	CLK_NANDC_SEL50_SHIFT		= 15,
+	CLK_NANDC_SEL50_MASK		= 0x1 << CLK_NANDC_SEL50_SHIFT,
+	CLK_NANDC_SEL50_EVEN		= 0,
+	CLK_NANDC_SEL50_ALWAYS		= 1,
+	CLK_NANDC_PLL_SEL_SHIFT		= 6,
+	CLK_NANDC_PLL_SEL_MASK		= 0x3 << CLK_NANDC_PLL_SEL_SHIFT,
+	CLK_NANDC_PLL_SEL_DPLL		= 0,
+	CLK_NANDC_DIV_CON_SHIFT		= 0,
+	CLK_NANDC_DIV_CON_MASK		= 0x1f << CLK_NANDC_DIV_CON_SHIFT,
+	CLK_NANDC_DIV_CON_15		= 15,
+	CLK_NANDC_DIV_CON_13		= 13,
+	CLK_NANDC_DIV_CON_11		= 11,
+	CLK_NANDC_DIV_CON_7		= 7,
+
+	/* CLKSEL_CON39 */
+	CLK_SDMMC_SEL50_SHIFT		= 15,
+	CLK_SDMMC_SEL50_MASK		= 0x1 << CLK_SDMMC_SEL50_SHIFT,
+	CLK_SDMMC_SEL50_EVEN		= 0,
+	CLK_SDMMC_SEL50_ALWAYS		= 1,
+	CLK_SDMMC_PLL_SEL_SHIFT		= 8,
+	CLK_SDMMC_PLL_SEL_MASK		= 0x3 << CLK_SDMMC_PLL_SEL_SHIFT,
+	CLK_SDMMC_PLL_SEL_DPLL		= 0,
+	CLK_SDMMC_DIV_CON_SHIFT		= 0,
+	CLK_SDMMC_DIV_CON_MASK		= 0xff << CLK_SDMMC_DIV_CON_SHIFT,
+	CLK_SDMMC_DIV_CON_31		= 31,
+	CLK_SDMMC_DIV_CON_27		= 27,
+	CLK_SDMMC_DIV_CON_23		= 23,
+	CLK_SDMMC_DIV_CON_15		= 15,
+
+	/* CLKSEL_CON40 */
+	CLK_SDIO_SEL50_SHIFT		= 15,
+	CLK_SDIO_SEL50_MASK		= 0x1 << CLK_SDIO_SEL50_SHIFT,
+	CLK_SDIO_SEL50_EVEN		= 0,
+	CLK_SDIO_SEL50_ALWAYS		= 1,
+	CLK_SDIO_PLL_SEL_SHIFT		= 8,
+	CLK_SDIO_PLL_SEL_MASK		= 0x3 << CLK_SDIO_PLL_SEL_SHIFT,
+	CLK_SDIO_PLL_SEL_DPLL		= 0,
+	CLK_SDIO_DIV_CON_SHIFT		= 0,
+	CLK_SDIO_DIV_CON_MASK		= 0xff << CLK_SDIO_DIV_CON_SHIFT,
+	CLK_SDIO_DIV_CON_4		= 4,
+	CLK_SDIO_DIV_CON_3		= 3,
+	CLK_SDIO_DIV_CON_2		= 2,
+
+	/* CLKSEL_CON41 */
+	CLK_EMMC_SEL50_SHIFT		= 15,
+	CLK_EMMC_SEL50_MASK		= 0x1 << CLK_EMMC_SEL50_SHIFT,
+	CLK_EMMC_SEL50_EVEN		= 0,
+	CLK_EMMC_SEL50_ALWAYS		= 1,
+	CLK_EMMC_PLL_SEL_SHIFT		= 8,
+	CLK_EMMC_PLL_SEL_MASK		= 0x3 << CLK_EMMC_PLL_SEL_SHIFT,
+	CLK_EMMC_PLL_SEL_DPLL		= 0,
+	CLK_EMMC_DIV_CON_SHIFT		= 0,
+	CLK_EMMC_DIV_CON_MASK		= 0xff << CLK_EMMC_DIV_CON_SHIFT,
+	CLK_EMMC_DIV_CON_31		= 31,
+	CLK_EMMC_DIV_CON_27		= 27,
+	CLK_EMMC_DIV_CON_23		= 23,
+	CLK_EMMC_DIV_CON_15		= 15,
+
+	/* CLKSEL_CON42 */
+	CLK_SFC_PLL_SEL_SHIFT		= 14,
+	CLK_SFC_PLL_SEL_MASK		= 0x3 << CLK_SFC_PLL_SEL_SHIFT,
+	CLK_SFC_PLL_SEL_DPLL		= 0,
+	CLK_SFC_DIV_CON_SHIFT		= 0,
+	CLK_SFC_DIV_CON_MASK		= 0x7f << CLK_SFC_DIV_CON_SHIFT,
+	CLK_SFC_DIV_CON_65		= 65,
+	CLK_SFC_DIV_CON_53		= 53,
+	CLK_SFC_DIV_CON_49		= 49,
+	CLK_SFC_DIV_CON_31		= 31,
+
+	/* CLKSEL_CON43 */
+	RMII_CLK_SEL_SHIFT		= 15,
+	RMII_CLK_SEL_MASK		= 0x1 << RMII_CLK_SEL_SHIFT,
+	RMII_CLK_SEL_100M		= 1,
+	RMII_CLK_SEL_10M		= 0,
+	RMII_EXTCLKSRC_SEL_SHIFT	= 14,
+	RMII_EXTCLKSRC_SEL_MASK		= 0x1 << RMII_EXTCLKSRC_SEL_SHIFT,
+	RMII_EXTCLKSRC_SEL_CLK_MAC	= 0,
+	CLK_MAC_PLL_SEL_SHIFT		= 6,
+	CLK_MAC_PLL_SEL_MASK		= 0x3 << CLK_MAC_PLL_SEL_SHIFT,
+	CLK_MAC_PLL_SEL_DPLL		= 0,
+	CLK_MAC_DIV_CON_SHIFT		= 0,
+	CLK_MAC_DIV_CON_MASK		= 0x1f << CLK_MAC_DIV_CON_SHIFT,
+	CLK_MAC_DIV_CON_31		= 31,
+	CLK_MAC_DIV_CON_23		= 23,
+	CLK_MAC_DIV_CON_25		= 25,
+
+	/* CLKSEL_CON44 */
+	CLK_WIFI_SEL_SHIFT		= 7,
+	CLK_WIFI_SEL_MASK		= 0x1 << CLK_WIFI_SEL_SHIFT,
+	CLK_WIFI_SEL_CLK_WIFI		= 1,
+	CLK_WIFI_PLL_SEL_SHIFT		= 6,
+	CLK_WIFI_PLL_SEL_MASK		= 0x1 << CLK_WIFI_PLL_SEL_SHIFT,
+	CLK_WIFI_PLL_SEL_DPLL		= 0,
+	CLK_WIFI_DIV_CON_SHIFT		= 0,
+	CLK_WIFI_DIV_CON_MASK		= 0x3f << CLK_WIFI_DIV_CON_SHIFT,
+	CLK_WIFI_DIV_CON_39		= 39,
+	CLK_WIFI_DIV_CON_29		= 29,
+	CLK_WIFI_DIV_CON_49		= 49,
+	CLK_WIFI_DIV_CON_19		= 19,
+
+	/* CLKSEL_CON45 */
+	PCLK_AUDIO_DIV_CON_SHIFT	= 8,
+	PCLK_AUDIO_DIV_CON_MASK		= 0x1f << PCLK_AUDIO_DIV_CON_SHIFT,
+	PCLK_AUDIO_DIV_CON_9		= 9,
+	H_PCLK_AUDIO_PLL_SEL_SHIFT	= 6,
+	H_PCLK_AUDIO_PLL_SEL_MASK	= 0x3 << H_PCLK_AUDIO_PLL_SEL_SHIFT,
+	H_PCLK_AUDIO_PLL_SEL_VPLL0	= 0,
+	HCLK_AUDIO_DIV_CON_SHIFT	= 0,
+	HCLK_AUDIO_DIV_CON_MASK		= 0x1f << HCLK_AUDIO_DIV_CON_SHIFT,
+	HCLK_AUDIO_DIV_CON_9		= 9,
+
+	/* CLKSEL_CON46 */
+	CLK_PDM_SEL_SHIFT		= 15,
+	CLK_PDM_SEL_MASK		= 0x1 << CLK_PDM_SEL_SHIFT,
+	CLK_PDM_SEL_CLK_PDM		= 0,
+	CLK_PDM_PLL_SEL_SHIFT		= 8,
+	CLK_PDM_PLL_SEL_MASK		= 0x3 << CLK_PDM_PLL_SEL_SHIFT,
+	CLK_PDM_PLL_SEL_VPLL0		= 0,
+	CLK_PDM_DIV_CON_SHIFT		= 0,
+	CLK_PDM_DIV_CON_MASK		= 0x7f << CLK_PDM_DIV_CON_SHIFT,
+	CLK_PDM_DIV_CON_15		= 15,
+
+	/* CLKSEL_CON48 */
+	CLK_SPDIFTX_DIV_CON_SHIFT	= 0,
+	CLK_SPDIFTX_DIV_CON_MASK	= 0x7f << CLK_SPDIFTX_DIV_CON_SHIFT,
+	CLK_SPDIFTX_DIV_CON_15		= 15,
+
+	/* CLKSEL_CON52,CLKSEL_CON56,CLKSEL_CON60,CLKSEL_CON64 */
+	I2S_8CH_OUT_SEL_SHIFT		= 15,
+	I2S_8CH_OUT_SEL_MASK		= 0x1 << I2S_8CH_OUT_SEL_SHIFT,
+	I2S_8CH_OUT_SEL_TX_RX		= 0,
+	I2S_8CH_TX_RX_SEL_SHIFT		= 12,
+	I2S_8CH_TX_RX_SEL_MASK		= 0x1 << I2S_8CH_TX_RX_SEL_SHIFT,
+	I2S_8CH_TX_RX_SEL_TX		= 0,
+	I2S_8CH_TX_SEL_SHIFT		= 10,
+	I2S_8CH_TX_SEL_MASK		= 0x3 << I2S_8CH_TX_SEL_SHIFT,
+	I2S_8CH_TX_SEL_TX		= 0,
+	I2S_8CH_TX_PLL_SEL_SHIFT	= 8,
+	I2S_8CH_TX_PLL_SEL_MASK		= 0x3 << I2S_8CH_TX_PLL_SEL_SHIFT,
+	I2S_8CH_TX_PLL_SEL_VPLL1	= 1,
+	I2S_8CH_TX_DIV_CON_SHIFT	= 0,
+	I2S_8CH_TX_DIV_CON_MASK		= 0x7f << I2S_8CH_TX_DIV_CON_SHIFT,
+	I2S_8CH_TX_DIV_CON_17		= 17,
+
+	/* CLKSEL_CON54,CLKSEL_CON58,CLKSEL_CON62,CLKSEL_CON66 */
+	I2S_8CH_RX_TX_SEL_SHIFT		= 12,
+	I2S_8CH_RX_TX_SEL_MASK		= 0x1 << I2S_8CH_RX_TX_SEL_SHIFT,
+	I2S_8CH_RX_TX_SEL_RX		= 0,
+	I2S_8CH_RX_SEL_SHIFT		= 10,
+	I2S_8CH_RX_SEL_MASK		= 0x3 << I2S_8CH_RX_SEL_SHIFT,
+	I2S_8CH_RX_SEL_RX		= 0,
+	I2S_8CH_RX_PLL_SEL_SHIFT	= 8,
+	I2S_8CH_RX_PLL_SEL_MASK		= 0x3 << I2S_8CH_RX_PLL_SEL_SHIFT,
+	I2S_8CH_RX_PLL_SEL_VPLL0	= 0,
+	I2S_8CH_RX_DIV_CON_SHIFT	= 0,
+	I2S_8CH_RX_DIV_CON_MASK		= 0x7f << I2S_8CH_RX_DIV_CON_SHIFT,
+	I2S_8CH_RX_DIV_CON_19		= 19,
+
+	/* SOFTRST_CON1 */
+	PRESETN_DDRPHY_REQ_SHIFT	= 14,
+	PRESETN_DDRPHY_REQ_MASK		= 0x1 << PRESETN_DDRPHY_REQ_SHIFT,
+	PRESETN_DDRPHY_REQ_EN		= 1,
+	PRESETN_DDRPHY_REQ_DIS		= 0,
+
+	RESETN_DDRPHYDIV_REQ_SHIFT	= 13,
+	RESETN_DDRPHYDIV_REQ_MASK	= 0x1 << RESETN_DDRPHYDIV_REQ_SHIFT,
+	RESETN_DDRPHYDIV_REQ_EN		= 1,
+	RESETN_DDRPHYDIV_REQ_DIS	= 0,
+
+	RESETN_DDRPHY_REQ_SHIFT		= 12,
+	RESETN_DDRPHY_REQ_MASK		= 0x1 << RESETN_DDRPHY_REQ_SHIFT,
+	RESETN_DDRPHY_REQ_EN		= 1,
+	RESETN_DDRPHY_REQ_DIS		= 0,
+
+	PRESETN_DDRUPCTL_REQ_SHIFT	= 6,
+	PRESETN_DDRUPCTL_REQ_MASK	= 0x1 << PRESETN_DDRUPCTL_REQ_SHIFT,
+	PRESETN_DDRUPCTL_REQ_EN		= 1,
+	PRESETN_DDRUPCTL_REQ_DIS	= 0,
+
+	RESETN_DDRUPCTL_REQ_SHIFT	= 4,
+	RESETN_DDRUPCTL_REQ_MASK	= 0x1 << RESETN_DDRUPCTL_REQ_SHIFT,
+	RESETN_DDRUPCTL_REQ_EN		= 1,
+	RESETN_DDRUPCTL_REQ_DIS		= 0,
+
+	/* CLKGATE_CON4 */
+	CLK_PMU_PVTM_CLK_EN_SHIFT	= 4,
+	CLK_PMU_PVTM_CLK_EN_MASK	= 0x1 << CLK_PMU_PVTM_CLK_EN_SHIFT,
+	CLK_PMU_PVTM_CLK_EN		= 0,
+
+	/* SOFTRST_CON5 */
+	RESETN_PMU_PVTM_REQ_SHIFT	= 1,
+	RESETN_PMU_PVTM_REQ_MASK	= 0x1 << RESETN_PMU_PVTM_REQ_SHIFT,
+	RESETN_PMU_PVTM_REQ_ACT		= 1,
+	RESETN_PMU_PVTM_REQ_DIS		= 0,
+};
+
 #endif
diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3308.h b/arch/arm/include/asm/arch-rockchip/grf_rk3308.h
index bf241a4bd5..2d0663f4db 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rk3308.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3308.h
@@ -154,8 +154,8 @@ struct rk3308_grf {
 	unsigned int host0_status0;
 	unsigned int reserved31[(0x4a0 - 0x48C) / 4 - 1];
 	unsigned int mac_con0;
-	unsigned int upctrl_con0;
-	unsigned int upctrl_status0;
+	unsigned int upctl_con0;
+	unsigned int upctl_status0;
 	unsigned int reserved32[(0x500 - 0x4A8) / 4 - 1];
 	unsigned int os_reg0;
 	unsigned int os_reg1;
@@ -195,4 +195,40 @@ struct rk3308_sgrf {
 };
 check_member(rk3308_sgrf, fastboot_en, 0x20);
 
+enum {
+	/* GPIO1D_IOMUX */
+	GPIO1D1_SEL_SHIFT		= 2,
+	GPIO1D1_SEL_MASK		= 0x3 << GPIO1D1_SEL_SHIFT,
+	GPIO1D1_SEL_UART1_TX		= 1,
+	GPIO1D0_SEL_SHIFT		= 0,
+	GPIO1D0_SEL_MASK		= 0x3 << GPIO1D0_SEL_SHIFT,
+	GPIO1D1_SEL_UART1_RX		= 1,
+	/* GPIO4D_IOMUX */
+	GPIO4D3_SEL_SHIFT		= 6,
+	GPIO4D3_SEL_MASK		= 0x3 << GPIO4D3_SEL_SHIFT,
+	GPIO4D3_SEL_UART2_TXM1		= 2,
+	GPIO4D2_SEL_SHIFT		= 4,
+	GPIO4D2_SEL_MASK		= 0x3 << GPIO4D2_SEL_SHIFT,
+	GPIO4D2_SEL_UART2_RXM1		= 2,
+	/* UPCTL_CON0 */
+	CYSYREQ_UPCTL_DDRSTDBY_SHIFT	= 5,
+	CYSYREQ_UPCTL_DDRSTDBY_MASK	= 1 << CYSYREQ_UPCTL_DDRSTDBY_SHIFT,
+	CYSYREQ_UPCTL_DDRSTDBY_EN	= 1,
+	GRF_DDR_16BIT_EN_SHIFT		= 0,
+	GRF_DDR_16BIT_EN_MASK		= 1 << GRF_DDR_16BIT_EN_SHIFT,
+	GRF_DDR_16BIT_EN		= 1,
+	/* SOC_CON5 */
+	UART2_MULTI_IOFUNC_SEL_SHIFT	= 2,
+	UART2_MULTI_IOFUNC_SEL_MASK	= 0x3 << UART2_MULTI_IOFUNC_SEL_SHIFT,
+	UART2_MULTI_IOFUNC_SEL_M1	= 1,
+	/* SOC_CON12 */
+	NOC_MSCH_MAIN_PARTIAL_SHIFT	= 1,
+	NOC_MSCH_MAIN_PARTIAL_MASK	= 0x1 << NOC_MSCH_MAIN_PARTIAL_SHIFT,
+	NOC_MSCH_MAIN_PARTIAL_EN	= 1,
+	NOC_MSCH_MAINDDR3_SHIFT		= 0,
+	NOC_MSCH_MAINDDR3_MASK		= 0x1 << NOC_MSCH_MAINDDR3_SHIFT,
+	NOC_MSCH_MAINDDR3_EN		= 1,
+	NOC_MSCH_MAINDDR3_DIS		= 0,
+};
+
 #endif
diff --git a/arch/arm/include/asm/arch-rockchip/pmu_rk3308.h b/arch/arm/include/asm/arch-rockchip/pmu_rk3308.h
new file mode 100644
index 0000000000..6c25ec065c
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/pmu_rk3308.h
@@ -0,0 +1,71 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * Copyright (C) 2020 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _ASM_ARCH_PMU_RK3308_H
+#define _ASM_ARCH_PMU_RK3308_H
+struct rk3308_pmu {
+	u32 reserved0[4];
+	u32 wakeup_cfg2_lo;
+	u32 reserved1;
+	u32 pwrdn_con_lo;
+	u32 reserved2;
+	u32 pwrdn_st;
+	u32 pwrmode_core_con_lo;
+	u32 reserved3;
+	u32 pwrmode_common_con_lo;
+	u32 pwrmode_common_con_hi;
+	u32 sft_con_lo;
+	u32 sft_con_hi;
+	u32 int_con_lo;
+	u32 int_con_hi;
+	u32 int_st;
+	u32 reserved4[6];
+	u32 core_pwr_st;
+	u32 bus_idle_req_lo;
+	u32 reserved5;
+	u32 bus_idle_st;
+	u32 power_st;
+	u32 osc_cnt_lo;
+	u32 osc_cnt_hi;
+	u32 plllock_cnt_lo;
+	u32 plllock_cnt_hi;
+	u32 pllrst_cnt_lo;
+	u32 pllrst_cnt_hi;
+	u32 reserved6[2];
+	u32 ddrio_pwron_cnt_lo;
+	u32 ddrio_pwron_cnt_hi;
+	u32 wakeup_rst_clr_cnt_lo;
+	u32 wakeup_rst_clr_cnt_hi;
+	u32 ddr_sref_st;
+	u32 sys_reg0_lo;
+	u32 sys_reg0_hi;
+	u32 sys_reg1_lo;
+	u32 sys_reg1_hi;
+	u32 sys_reg2_lo;
+	u32 sys_reg2_hi;
+	u32 sys_reg3_lo;
+	u32 sys_reg3_hi;
+	u32 scu_pwrdn_cnt_lo;
+	u32 scu_pwrdn_cnt_hi;
+	u32 scu_pwrup_cnt_lo;
+	u32 scu_pwrup_cnt_hi;
+	u32 timeout_cnt_lo;
+	u32 timeout_cnt_hi;
+	u32 cpu0apm_con_lo;
+	u32 cpu1apm_con_lo;
+	u32 cpu2apm_con_lo;
+	u32 cpu3apm_con_lo;
+	u32 info_tx_con_lo;
+};
+
+check_member(rk3308_pmu, info_tx_con_lo, 0x00f0);
+enum { /* SFT_CON_LO */
+	DDR_IO_RET_CFG_SHIFT		= 8,
+	DDR_IO_RET_CFG_MASK		= 1 << DDR_IO_RET_CFG_SHIFT,
+	DDR_IO_RET_CFG			= 0,
+};
+
+#endif
+
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rk3308.h b/arch/arm/include/asm/arch-rockchip/sdram_rk3308.h
new file mode 100644
index 0000000000..d215bb2f0f
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/sdram_rk3308.h
@@ -0,0 +1,137 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * Copyright (C) 2020 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _ASM_ARCH_SDRAM_RK3308_H
+#define _ASM_ARCH_SDRAM_RK3308_H
+
+#include <ram.h>
+#include <asm/arch/cru_rk3308.h>
+#include <asm/arch/grf_rk3308.h>
+#include <asm/arch/pmu_rk3308.h>
+#include <asm/arch/sdram_common.h>
+#include <asm/arch/sdram_rv1108_pctl_phy.h>
+
+#define CG_EXIT_TH		(250)
+
+#define PATTERN			(0x5aa5f00f)
+
+struct rk3308_ddr_standby {
+	u32 con0;
+	u32 con1;
+	u32 status0;
+};
+
+struct rk3308_service_msch {
+	u32 id_coreid;
+	u32 id_revisionid;
+	u32 ddrconf;
+	u32 ddrtiming;
+	u32 ddrmode;
+	u32 readlatency;
+};
+
+enum {
+	/* ddr standby */
+	IDLE_TH_SHIFT				= 16,
+	/* can not gate msch clk */
+	MSCH_GATE_CLK_SHIFT			= 7,
+	MSCH_GATE_CLK_EN			= 1,
+
+	DDRPHY4X_GATE_SHIFT			= 6,
+	DDRPHY4X_GATE_EN			= 1,
+
+	UPCTL_CORE_CLK_GATE_SHIFT		= 5,
+	UPCTL_CORE_CLK_GATE_EN			= 1,
+
+	UPCTL_ACLK_GATE_SHIFT			= 4,
+	UPCTL_ACLK_GATE_EN			= 1,
+
+	CTL_IDLR_SHIFT				= 1,
+	CTL_IDLR_EN				= 1,
+
+	STDBY_EN_SHIFT				= 0,
+	STDBY_EN				= 1,
+
+	CG_EXIT_TH_SHIFT			= 16,
+
+	STDBY_STATUS_SHIFT			= 0,
+	STDBY_STATUS_MASK			= 0x7f << STDBY_STATUS_SHIFT,
+	ST_STDBY				= 0x10,
+};
+
+enum {
+	/* memory scheduler ddrtiming */
+	BWRATIO_HALF_BW				= 0x80000000,
+	BWRATIO_HALF_BW_DIS			= 0x0,
+
+	PHY_TX_DE_SKEW_SHIFT			= 3,
+	PHY_TX_DE_SKEW_EN			= 1,
+};
+
+struct dram_info {
+	struct rk3308_cru *cru;
+	struct rk3308_grf *grf;
+	struct rk3308_sgrf *sgrf;
+	struct rk3308_pmu *pmu;
+	struct ddr_phy *phy;
+	struct ddr_pctl *pctl;
+	struct rk3308_ddr_standby *standby;
+	struct rk3308_service_msch *service_msch;
+	struct ram_info info;
+};
+
+struct sdram_params {
+	u32 idle_pd;
+	u32 idle_sr;
+	u32 ddr_2t_en;
+	u32 stdby_idle;
+	struct ddr_config ddr_config_t;
+	struct ddr_timing ddr_timing_t;
+};
+
+struct rk3308_ddr_skew {
+	u32 a0_a1_skew[14];
+	u32 cs0_dm0_skew[22];
+};
+
+struct rk3308_ddr_gd {
+	struct sdram_head_info_v0 head_info;
+	struct rk3308_ddr_skew ddr_skew;
+};
+
+int check_rd_gate(struct dram_info *priv);
+void copy_to_reg(u32 *dest, const u32 *src, u32 n);
+void enable_low_power(struct dram_info *priv,
+		      struct sdram_params *params_priv);
+void ddr_cap_info(size_t size);
+void ddr_msch_cfg(struct dram_info *priv,
+		  struct sdram_params *params_priv);
+void ddr_msch_cfg_rbc(struct sdram_params *params_priv,
+		      struct dram_info *priv);
+void ddr_msch_get_max_col(struct dram_info *priv,
+			  struct ddr_schedule *sch_priv);
+void ddr_msch_get_max_row(struct dram_info *priv,
+			  struct ddr_schedule *sch_priv);
+void ddr_phy_skew_cfg(struct dram_info *priv);
+void ddr_phy_dqs_rx_dll_cfg(struct dram_info *priv, u32 freq);
+void enable_ddr_io_ret(struct dram_info *priv);
+void modify_data_training(struct dram_info *priv,
+			  struct sdram_params *params_priv);
+void move_to_config_state(struct dram_info *priv);
+void move_to_access_state(struct dram_info *priv);
+void pctl_cfg_grf(struct dram_info *priv,
+		  struct sdram_params *params_priv);
+void phy_pctrl_reset_cru(struct dram_info *priv);
+void print_dec(u32 n);
+void rkdclk_init(struct dram_info *priv,
+		 struct sdram_params *params_priv);
+int rv1108_sdram_init(struct dram_info *sdram_priv,
+		      struct sdram_params *params_priv);
+void set_bw_grf(struct dram_info *priv);
+void set_ds_odt(struct dram_info *priv,
+		struct sdram_params *params_priv);
+
+#endif
+
diff --git a/arch/arm/mach-rockchip/rk3308/rk3308.c b/arch/arm/mach-rockchip/rk3308/rk3308.c
index 3cd85005e7..f259fd8f83 100644
--- a/arch/arm/mach-rockchip/rk3308/rk3308.c
+++ b/arch/arm/mach-rockchip/rk3308/rk3308.c
@@ -1,15 +1,20 @@
+// SPDX-License-Identifier:     GPL-2.0+
 /*
- * Copyright (c) 2018 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
+ * Copyright (C) 2020 Rockchip Electronics Co., Ltd
  */
+
 #include <common.h>
+#include <ram.h>
 #include <asm/io.h>
+#include <asm/arch/boot_mode.h>
+#include <asm/arch/bootrom.h>
+#include <asm/arch/cru_rk3308.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/grf_rk3308.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/rk_atags.h>
 #include <asm/gpio.h>
+#include <asm/arch/sdram_common.h>
 #include <debug_uart.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -41,6 +46,8 @@ struct mm_region *mem_map = rk3308_mem_map;
 
 #define GRF_BASE	0xff000000
 #define SGRF_BASE	0xff2b0000
+#define CRU_BASE	0xff500000
+
 
 enum {
 
@@ -117,6 +124,11 @@ enum {
 	VCCIO3_1V8,
 };
 
+enum {
+	SND_GLB_WDT_RST		= BIT(3),
+	FST_GLB_WDT_RST		= BIT(2),
+};
+
 /*
  * The voltage of VCCIO3(which is the voltage domain of emmc/flash/sfc
  * interface) can indicated by GPIO0_A4 or io_vsel3. The SOC defaults
@@ -153,6 +165,93 @@ int rk_board_init(void)
 	return 0;
 }
 
+#define SERVICE_CPU_BASE		0xff5c0000
+#define SERVICE_VOICE_BASE		0xff5d0000
+#define SERVICE_LOGIC_BASE		0xff5d8000
+#define SERVICE_PERI_BASE		0xff5e0000
+#define SERVICE_CPU_ADDR		(SERVICE_CPU_BASE + 0x80)
+#define SERVICE_VOP_ADDR		(SERVICE_LOGIC_BASE + 0x100)
+#define SERVICE_DMAC0_ADDR		(SERVICE_LOGIC_BASE + 0x0)
+#define SERVICE_DMAC1_ADDR		(SERVICE_LOGIC_BASE + 0x80)
+#define SERVICE_CRYPTO_ADDR		(SERVICE_LOGIC_BASE + 0x180)
+#define SERVICE_VAD_ADDR		(SERVICE_VOICE_BASE + 0x80)
+#define SERVICE_EMMC_ADDR		(SERVICE_PERI_BASE + 0x80)
+#define SERVICE_GMAC_ADDR		(SERVICE_PERI_BASE + 0x100)
+#define SERVICE_NAND_ADDR		(SERVICE_PERI_BASE + 0x180)
+#define SERVICE_SDIO_ADDR		(SERVICE_PERI_BASE + 0x200)
+#define SERVICE_SDMMC_ADDR		(SERVICE_PERI_BASE + 0x280)
+#define SERVICE_SFC_ADDR		(SERVICE_PERI_BASE + 0x300)
+#define SERVICE_USB_HOST_ADDR		(SERVICE_PERI_BASE + 0x380)
+#define SERVICE_USB_OTG_ADDR		(SERVICE_PERI_BASE + 0x400)
+
+#define DOS_PRIORITY_OFFSET		0x8
+#define QOS_PRIORITY_P1_P0(p1, p0)	((((p1) & 0x3) << 8) |\
+					(((p0) & 0x3) << 0))
+
+enum {
+	IOVSEL4_SHIFT           = 4,
+	IOVSEL4_MASK            = BIT(4),
+	VCCIO4_3V3              = 0,
+	VCCIO4_1V8,
+};
+
+int arch_cpu_init(void)
+{
+#ifndef CONFIG_TPL_BUILD
+#ifdef CONFIG_SPL_BUILD
+	static struct rk3308_sgrf * const sgrf = (void *)SGRF_BASE;
+
+	/* Set CRYPTO SDMMC EMMC NAND SFC USB master bus to be secure access */
+	rk_clrreg(&sgrf->con_secure0, 0x2b83);
+#endif
+#else /* defined(CONFIG_TPL_BUILD) */
+	static struct rk3308_cru * const cru = (void *)CRU_BASE;
+	static struct rk3308_grf * const grf = (void *)GRF_BASE;
+	u32 glb_rst_st;
+
+	rk_clrsetreg(&grf->soc_con0, IOVSEL4_MASK, VCCIO4_3V3 << IOVSEL4_SHIFT);
+
+	glb_rst_st = readl(&cru->glb_rst_st);
+	writel(FST_GLB_WDT_RST | SND_GLB_WDT_RST, &cru->glb_rst_st);
+	if (glb_rst_st & (FST_GLB_WDT_RST | SND_GLB_WDT_RST))
+		writel(BOOT_WATCHDOG, CONFIG_ROCKCHIP_BOOT_MODE_REG);
+
+	writel(WDT_GLB_SRST_CTRL << WDT_GLB_SRST_CTRL_SHIFT |
+	       TSADC_GLB_SRST_CTRL << TSADC_GLB_SRST_CTRL_SHIFT,
+	       &cru->glb_rst_con);
+
+	writel(QOS_PRIORITY_P1_P0(1, 1),
+	       SERVICE_CPU_ADDR + DOS_PRIORITY_OFFSET);
+	writel(QOS_PRIORITY_P1_P0(3, 3),
+	       SERVICE_VOP_ADDR + DOS_PRIORITY_OFFSET);
+	writel(QOS_PRIORITY_P1_P0(2, 2),
+	       SERVICE_DMAC0_ADDR + DOS_PRIORITY_OFFSET);
+	writel(QOS_PRIORITY_P1_P0(2, 2),
+	       SERVICE_DMAC1_ADDR + DOS_PRIORITY_OFFSET);
+	writel(QOS_PRIORITY_P1_P0(2, 2),
+	       SERVICE_CRYPTO_ADDR + DOS_PRIORITY_OFFSET);
+	writel(QOS_PRIORITY_P1_P0(3, 3),
+	       SERVICE_VAD_ADDR + DOS_PRIORITY_OFFSET);
+	writel(QOS_PRIORITY_P1_P0(2, 2),
+	       SERVICE_EMMC_ADDR + DOS_PRIORITY_OFFSET);
+	writel(QOS_PRIORITY_P1_P0(2, 2),
+	       SERVICE_GMAC_ADDR + DOS_PRIORITY_OFFSET);
+	writel(QOS_PRIORITY_P1_P0(2, 2),
+	       SERVICE_NAND_ADDR + DOS_PRIORITY_OFFSET);
+	writel(QOS_PRIORITY_P1_P0(2, 2),
+	       SERVICE_SDIO_ADDR + DOS_PRIORITY_OFFSET);
+	writel(QOS_PRIORITY_P1_P0(2, 2),
+	       SERVICE_SDMMC_ADDR + DOS_PRIORITY_OFFSET);
+	writel(QOS_PRIORITY_P1_P0(2, 2),
+	       SERVICE_SFC_ADDR + DOS_PRIORITY_OFFSET);
+	writel(QOS_PRIORITY_P1_P0(2, 2),
+	       SERVICE_USB_HOST_ADDR + DOS_PRIORITY_OFFSET);
+	writel(QOS_PRIORITY_P1_P0(2, 2),
+	       SERVICE_USB_OTG_ADDR + DOS_PRIORITY_OFFSET);
+#endif
+	return 0;
+}
+
 #ifdef CONFIG_SPL_BUILD
 int rk_board_init_f(void)
 {
@@ -178,25 +277,85 @@ int rk_board_init_f(void)
 
 void board_debug_uart_init(void)
 {
+	static struct rk3308_cru * const cru = (void *)CRU_BASE;
 	static struct rk3308_grf * const grf = (void *)GRF_BASE;
 
+#if defined(CONFIG_DEBUG_UART_BASE)
+#if (CONFIG_DEBUG_UART_BASE == 0xFF0C0000)
+	/*select 24M clock to UART2 */
+	rk_clrsetreg(&cru->clksel_con[16],
+		     CLK_UART2_PLL_SEL_MASK | CLK_UART2_DIV_CON_MASK,
+		     CLK_UART2_PLL_SEL_XIN_OSC0 << CLK_UART2_PLL_SEL_SHIFT |
+		     CLK_UART2_DIV_CON << CLK_UART2_DIV_CON_SHIFT);
+
+#if (CONFIG_ROCKCHIP_UART_MUX_SEL_M == 0)
+	/* Enable early UART2 channel m0 on the rk3308 */
+	rk_clrsetreg(&grf->soc_con5, UART2_IO_SEL_MASK,
+		     UART2_IO_SEL_M0 << UART2_IO_SEL_SHIFT);
+	rk_clrsetreg(&grf->gpio1ch_iomux, GPIO1C7_MASK | GPIO1C6_MASK,
+		     GPIO1C7_UART2_TX_M0 << GPIO1C7_SHIFT |
+		     GPIO1C6_UART2_RX_M0 << GPIO1C6_SHIFT);
+
+#elif (CONFIG_ROCKCHIP_UART_MUX_SEL_M == 1)
 	/* Enable early UART2 channel m1 on the rk3308 */
 	rk_clrsetreg(&grf->soc_con5, UART2_IO_SEL_MASK,
 		     UART2_IO_SEL_M1 << UART2_IO_SEL_SHIFT);
-	rk_clrsetreg(&grf->gpio4d_iomux,
-		     GPIO4D3_MASK | GPIO4D2_MASK,
-		     GPIO4D2_UART2_RX_M1 << GPIO4D2_SHIFT |
-		     GPIO4D3_UART2_TX_M1 << GPIO4D3_SHIFT);
-}
-
-#if defined(CONFIG_SPL_BUILD)
-int arch_cpu_init(void)
-{
-	static struct rk3308_sgrf * const sgrf = (void *)SGRF_BASE;
-
-	/* Set CRYPTO SDMMC EMMC NAND SFC USB master bus to be secure access */
-	rk_clrreg(&sgrf->con_secure0, 0x2b83);
+	if (readl(BROM_BOOTSOURCE_ID_ADDR) != BROM_BOOTSOURCE_SD)
+		rk_clrsetreg(&grf->gpio4d_iomux,
+			     GPIO4D3_MASK | GPIO4D2_MASK,
+			     GPIO4D2_UART2_RX_M1 << GPIO4D2_SHIFT |
+			     GPIO4D3_UART2_TX_M1 << GPIO4D3_SHIFT);
+#else
+	#error "Please select M0 or M1 for uart2 !!!"
+#endif
 
-	return 0;
-}
+#elif (CONFIG_DEBUG_UART_BASE == 0xFF0E0000)
+	/*select 24M clock to UART4 */
+	rk_clrsetreg(&cru->clksel_con[22],
+		     CLK_UART4_PLL_SEL_MASK | CLK_UART4_DIV_CON_MASK,
+		     CLK_UART4_PLL_SEL_XIN_OSC0 << CLK_UART4_PLL_SEL_SHIFT |
+		     CLK_UART4_DIV_CON << CLK_UART4_DIV_CON_SHIFT);
+
+	rk_clrsetreg(&grf->gpio4b_iomux,
+		     GPIO4B1_SEL_MASK | GPIO4B0_SEL_MASK,
+		     GPIO4B1_SEL_UART4_TX << GPIO4B1_SEL_SHIFT |
+		     GPIO4B0_SEL_UART4_RX << GPIO4B0_SEL_SHIFT);
+#elif (CONFIG_DEBUG_UART_BASE == 0xFF0A0000)
+	/*select 24M clock to UART0 */
+	rk_clrsetreg(&cru->clksel_con[10],
+		     CLK_UART0_PLL_SEL_MASK | CLK_UART0_DIV_CON_MASK,
+		     CLK_UART0_PLL_SEL_XIN_OSC0 << CLK_UART0_PLL_SEL_SHIFT |
+		     CLK_UART0_DIV_CON << CLK_UART0_DIV_CON_SHIFT);
+
+	rk_clrsetreg(&grf->gpio2a_iomux,
+		     GPIO2A1_SEL_MASK | GPIO2A0_SEL_MASK,
+		     GPIO2A1_SEL_UART0_TX << GPIO2A1_SEL_SHIFT |
+		     GPIO2A0_SEL_UART0_RX << GPIO2A0_SEL_SHIFT);
+#elif (CONFIG_DEBUG_UART_BASE == 0xFF0B0000)
+	/*select 24M clock to UART1 */
+	rk_clrsetreg(&cru->clksel_con[13],
+		     CLK_UART1_PLL_SEL_MASK | CLK_UART1_DIV_CON_MASK,
+		     CLK_UART1_PLL_SEL_XIN_OSC0 << CLK_UART1_PLL_SEL_SHIFT |
+		     CLK_UART1_DIV_CON << CLK_UART1_DIV_CON_SHIFT);
+
+	rk_clrsetreg(&grf->gpio1d_iomux,
+		     GPIO1D1_SEL_MASK | GPIO1D0_SEL_MASK,
+		     GPIO1D1_SEL_UART1_TX << GPIO1D1_SEL_SHIFT |
+		     GPIO1D1_SEL_UART1_RX << GPIO1D0_SEL_SHIFT);
+#elif (CONFIG_DEBUG_UART_BASE == 0xFF0D0000)
+	/*select 24M clock to UART3 */
+	rk_clrsetreg(&cru->clksel_con[19],
+		     CLK_UART3_PLL_SEL_MASK | CLK_UART3_DIV_CON_MASK,
+		     CLK_UART3_PLL_SEL_XIN_OSC0 << CLK_UART3_PLL_SEL_SHIFT |
+		     CLK_UART3_DIV_CON << CLK_UART3_DIV_CON_SHIFT);
+
+	rk_clrsetreg(&grf->gpio3b_iomux,
+		     GPIO3B5_SEL_MASK | GPIO3B4_SEL_MASK,
+		     GPIO3B5_SEL_UART3_TX << GPIO3B5_SEL_SHIFT |
+		     GPIO3B4_SEL_UART3_RX << GPIO3B4_SEL_SHIFT);
+#else
+	#error "Please select proper uart as debug uart !!!"
 #endif
+#endif /* defined(CONFIG_DEBUG_UART_BASE) */
+}
+
diff --git a/drivers/ram/rockchip/sdram-rk3308-ddr-skew.inc b/drivers/ram/rockchip/sdram-rk3308-ddr-skew.inc
new file mode 100644
index 0000000000..2f681d833c
--- /dev/null
+++ b/drivers/ram/rockchip/sdram-rk3308-ddr-skew.inc
@@ -0,0 +1,59 @@
+{
+	.start_tag = 0x12345678,
+	.version_info = 0,
+	.gcpu_gen_freq = 0,
+	.g_d2_lp2_freq = (451 << 16) | 451,
+	.g_d3_lp3_freq = (589 << 16) | 0,
+	.g_d4_lp4_freq = 0x00000000,
+	.g_uart_info = (2 << 28) | (1 << 24) | 1500000,
+	.g_sr_pd_idle = (48 << 16) | 10,
+	.g_ch_info = 0 | 128,
+	.g_2t_info = 1,
+	.reserved11 = 0,
+	.reserved12 = 0,
+	.reserved13 = 0
+},
+{
+	{/*cmd,addr de-skew*/
+		0x22,
+		0x22,
+		0x21,
+		0x21,
+		0x21,
+		0x10,
+		0x21,
+		0x21,
+		0x13,
+		0x23,
+		0x10,
+		0x99,/*clk*/
+		0x03,
+		0x30,
+	},
+	{/*cs0 dq0~7,dm,dqs*/
+		0xaa,
+		0xaa,
+		0x88,
+		0xbb,
+		0x88,
+		0x88,
+		0x99,
+		0x88,
+		0x88,
+		0x7a,/*dqs0 rx tx*/
+		0xa,/*dqsb0  tx*/
+	/*cs0 dq8~15,dm,dqs*/
+		0x88,
+		0xaa,
+		0x99,
+		0x68,
+                0x89,
+		0x88,
+		0x99,
+		0x87,
+                0x89,
+		0x56,/*dqs1 rx tx*/
+		0x6,/*dqsb1  tx*/
+	},
+}
+
diff --git a/drivers/ram/rockchip/sdram_inc/rk3308/sdram-rk3308-ddr2-detect-393.inc b/drivers/ram/rockchip/sdram_inc/rk3308/sdram-rk3308-ddr2-detect-393.inc
new file mode 100644
index 0000000000..2bc4e95da3
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_inc/rk3308/sdram-rk3308-ddr2-detect-393.inc
@@ -0,0 +1,71 @@
+{
+	0,
+	0,
+	0,
+	0,
+	{
+		.ddr_type = 0x2,
+		.chn_cnt = 0x0,
+		.rank = 0x1,
+		.cs0_row = 0x0,
+		.cs1_row = 0x0,
+		.bank = 0x3,
+		.col = 0x0,
+		.dbw = 0x1,
+		.bw = 0x1
+	},
+	{
+		.freq = 393,
+		{
+			0x000000C4,
+			0x000000C8,
+			0x000001F4,
+			0x00000013,
+			0x80000013,
+			0x00000002,
+			0x00000081,
+			0x00010006,
+			0x00000003,
+			0x00000000,
+			0x00000006,
+			0x00000005,
+			0x00000012,
+			0x00000018,
+			0x00000006,
+			0x00000004,
+			0x00000003,
+			0x00000006,
+			0x00000003,
+			0x000000C8,
+			0x00000002,
+			0x00000008,
+			0x00000000,
+			0x00000000,
+			0x00000001,
+			0x00000001,
+			0x00000001,
+			0x00000003,
+			0x00000005,
+			0x00000000,
+			0x00000000,
+			0x00000000,
+			0x00000003,
+			0x00000000,
+			0x00000169
+		},
+		{
+			{
+				0x00001A63,
+				0x00000000,
+				0x00000000,
+				0x00000000
+			},
+			0x00000004,
+			0x00000060
+		},
+		{0x1028B14C},
+		0x00000018,
+		{0x000004A2},
+		0x00000015
+	}
+}
diff --git a/drivers/ram/rockchip/sdram_inc/rk3308/sdram-rk3308-ddr2-detect-451.inc b/drivers/ram/rockchip/sdram_inc/rk3308/sdram-rk3308-ddr2-detect-451.inc
new file mode 100644
index 0000000000..69394482c3
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_inc/rk3308/sdram-rk3308-ddr2-detect-451.inc
@@ -0,0 +1,71 @@
+{
+	0,
+	0,
+	0,
+	0,
+	{
+		.ddr_type = 0x2,
+		.chn_cnt = 0x0,
+		.rank = 0x1,
+		.cs0_row = 0x0,
+		.cs1_row = 0x0,
+		.bank = 0x3,
+		.col = 0x0,
+		.dbw = 0x1,
+		.bw = 0x1
+	},
+	{
+		.freq = 451,
+		{
+			0x000000E1,
+			0x000000C8,
+			0x000001F4,
+			0x00000016,
+			0x80000013,
+			0x00000002,
+			0x00000094,
+			0x00010007,
+			0x00000003,
+			0x00000000,
+			0x00000007,
+			0x00000006,
+			0x00000015,
+			0x0000001C,
+			0x00000007,
+			0x00000005,
+			0x00000004,
+			0x00000007,
+			0x00000004,
+			0x000000C8,
+			0x00000003,
+			0x0000000A,
+			0x00000000,
+			0x00000000,
+			0x00000001,
+			0x00000001,
+			0x00000001,
+			0x00000003,
+			0x00000006,
+			0x00000000,
+			0x00000000,
+			0x00000000,
+			0x00000003,
+			0x00000000,
+			0x00000227
+		},
+		{
+			{
+				0x00001C73,
+				0x00000000,
+				0x00000000,
+				0x00000000
+			},
+			0x00000004,
+			0x00000070
+		},
+		{0x1428D1CE},
+		0x00000019,
+		{0x000004F2},
+		0x00000015
+	}
+}
diff --git a/drivers/ram/rockchip/sdram_inc/rk3308/sdram-rk3308-ddr3-detect-393.inc b/drivers/ram/rockchip/sdram_inc/rk3308/sdram-rk3308-ddr3-detect-393.inc
new file mode 100644
index 0000000000..052750db17
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_inc/rk3308/sdram-rk3308-ddr3-detect-393.inc
@@ -0,0 +1,71 @@
+{
+	0,
+	0,
+	0,
+	0,
+	{
+		.ddr_type = 0x3,
+		.chn_cnt = 0x0,
+		.rank = 0x1,
+		.cs0_row = 0x0,
+		.cs1_row = 0x0,
+		.bank = 0x3,
+		.col = 0x0,
+		.dbw = 0x1,
+		.bw = 0x1
+	},
+	{
+		.freq = 393,
+		{
+			0x000000C4,
+			0x000000C8,
+			0x000001F4,
+			0x00000013,
+			0x80000013,
+			0x00000004,
+			0x00000076,
+			0x00000006,
+			0x00000003,
+			0x00000000,
+			0x00000006,
+			0x00000005,
+			0x0000000F,
+			0x00000015,
+			0x00000006,
+			0x00000004,
+			0x00000004,
+			0x00000006,
+			0x00000004,
+			0x00000200,
+			0x00000003,
+			0x0000000A,
+			0x00000040,
+			0x00002710,
+			0x00000001,
+			0x00000005,
+			0x00000005,
+			0x00000003,
+			0x0000000C,
+			0x00000028,
+			0x00000100,
+			0x00000000,
+			0x00000004,
+			0x00000000,
+			0x00000169
+		},
+		{
+			{
+				0x00000420,
+				0x00000000,
+				0x00000000,
+				0x00000000
+			},
+			0x00000004,
+			0x00000060
+		},
+		{0x1028B18A},
+		0x00000018,
+		{0x000004A2},
+		0x00000015
+	}
+}
diff --git a/drivers/ram/rockchip/sdram_inc/rk3308/sdram-rk3308-ddr3-detect-451.inc b/drivers/ram/rockchip/sdram_inc/rk3308/sdram-rk3308-ddr3-detect-451.inc
new file mode 100644
index 0000000000..81dd8dc63d
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_inc/rk3308/sdram-rk3308-ddr3-detect-451.inc
@@ -0,0 +1,71 @@
+{
+	0,
+	0,
+	0,
+	0,
+	{
+		.ddr_type = 0x3,
+		.chn_cnt = 0x0,
+		.rank = 0x1,
+		.cs0_row = 0x0,
+		.cs1_row = 0x0,
+		.bank = 0x3,
+		.col = 0x0,
+		.dbw = 0x1,
+		.bw = 0x1
+	},
+	{
+		.freq = 451,
+		{
+			0x000000E1,
+			0x000000C8,
+			0x000001F4,
+			0x00000016,
+			0x80000013,
+			0x00000004,
+			0x00000088,
+			0x00000008,
+			0x00000004,
+			0x00000000,
+			0x00000008,
+			0x00000006,
+			0x00000011,
+			0x00000019,
+			0x00000008,
+			0x00000004,
+			0x00000004,
+			0x00000007,
+			0x00000004,
+			0x00000200,
+			0x00000004,
+			0x0000000B,
+			0x00000040,
+			0x00002710,
+			0x00000001,
+			0x00000005,
+			0x00000005,
+			0x00000004,
+			0x0000000C,
+			0x0000002E,
+			0x00000100,
+			0x00000000,
+			0x00000005,
+			0x00000000,
+			0x000001A2
+		},
+		{
+			{
+				0x00000640,
+				0x00000000,
+				0x00000008,
+				0x00000000
+			},
+			0x00000004,
+			0x00000080
+		},
+		{0x1448E20C},
+		0x0000001B,
+		{0x000004B2},
+		0x00000015
+	}
+}
diff --git a/drivers/ram/rockchip/sdram_inc/rk3308/sdram-rk3308-ddr3-detect-589.inc b/drivers/ram/rockchip/sdram_inc/rk3308/sdram-rk3308-ddr3-detect-589.inc
new file mode 100644
index 0000000000..1f7722c7dc
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_inc/rk3308/sdram-rk3308-ddr3-detect-589.inc
@@ -0,0 +1,71 @@
+{
+	0,
+	0,
+	0,
+	0,
+	{
+		.ddr_type = 0x3,
+		.chn_cnt = 0x0,
+		.rank = 0x1,
+		.cs0_row = 0x0,
+		.cs1_row = 0x0,
+		.bank = 0x3,
+		.col = 0x0,
+		.dbw = 0x1,
+		.bw = 0x1
+	},
+	{
+		.freq = 589,
+		{
+			0x00000126,
+			0x000000C8,
+			0x000001F4,
+			0x0000001D,
+			0x80000013,
+			0x00000004,
+			0x000000B1,
+			0x0000000A,
+			0x00000005,
+			0x00000000,
+			0x0000000A,
+			0x00000007,
+			0x00000017,
+			0x00000021,
+			0x0000000A,
+			0x00000005,
+			0x00000005,
+			0x00000009,
+			0x00000005,
+			0x00000200,
+			0x00000005,
+			0x0000000F,
+			0x00000040,
+			0x00002710,
+			0x00000001,
+			0x00000006,
+			0x00000006,
+			0x00000004,
+			0x0000000C,
+			0x0000003B,
+			0x00000100,
+			0x00000000,
+			0x00000005,
+			0x00000000,
+			0x00000227
+		},
+		{
+			{
+				0x00000860,
+				0x00000000,
+				0x00000010,
+				0x00000000
+			},
+			0x00000004,
+			0x000000A0
+		},
+		{0x18492290},
+		0x0000001E,
+		{0x000004F2},
+		0x00000015
+	}
+}
diff --git a/drivers/ram/rockchip/sdram_inc/rk3308/sdram-rk3308-lpddr2-detect-393.inc b/drivers/ram/rockchip/sdram_inc/rk3308/sdram-rk3308-lpddr2-detect-393.inc
new file mode 100644
index 0000000000..a7142b7c7e
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_inc/rk3308/sdram-rk3308-lpddr2-detect-393.inc
@@ -0,0 +1,71 @@
+{
+	0,
+	0,
+	0,
+	0,
+	{
+		.ddr_type = 0x5,
+		.chn_cnt = 0x0,
+		.rank = 0x1,
+		.cs0_row = 0x0,
+		.cs1_row = 0x0,
+		.bank = 0x3,
+		.col = 0x0,
+		.dbw = 0x1,
+		.bw = 0x1
+	},
+	{
+		.freq = 393,
+		{
+			0x000000C4,
+			0x000000C8,
+			0x000001F4,
+			0x00000013,
+			0x80000013,
+			0x00000005,
+			0x00000053,
+			0x0002000B,
+			0x00000009,
+			0x00000000,
+			0x00000007,
+			0x00000004,
+			0x00000011,
+			0x0000001C,
+			0x0000000A,
+			0x00000004,
+			0x00000003,
+			0x00000006,
+			0x00000003,
+			0x00000057,
+			0x00000003,
+			0x00000000,
+			0x00000024,
+			0x00000000,
+			0x00000002,
+			0x00000001,
+			0x00000002,
+			0x00000003,
+			0x00000000,
+			0x00000000,
+			0x0000008E,
+			0x00000002,
+			0x00000006,
+			0x000001F4,
+			0xFFFF2634
+		},
+		{
+			{
+				0x00000000,
+				0x00000082,
+				0x00000005,
+				0x00000001
+			},
+			0x00000000,
+			0x00000070
+		},
+		{0x106502CE},
+		0x0000001C,
+		{0x00000000},
+		0xFFF8355C
+	}
+}
diff --git a/drivers/ram/rockchip/sdram_inc/rk3308/sdram-rk3308-lpddr2-detect-451.inc b/drivers/ram/rockchip/sdram_inc/rk3308/sdram-rk3308-lpddr2-detect-451.inc
new file mode 100644
index 0000000000..f8bae8c40b
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_inc/rk3308/sdram-rk3308-lpddr2-detect-451.inc
@@ -0,0 +1,71 @@
+{
+	0,
+	0,
+	0,
+	0,
+	{
+		.ddr_type = 0x5,
+		.chn_cnt = 0x0,
+		.rank = 0x1,
+		.cs0_row = 0x0,
+		.cs1_row = 0x0,
+		.bank = 0x3,
+		.col = 0x0,
+		.dbw = 0x1,
+		.bw = 0x1
+	},
+	{
+		.freq = 451,
+		{
+			0x000000E1,
+			0x000000C8,
+			0xFF2B0000,
+			0x00000016,
+			0x80000013,
+			0x00000005,
+			0x0000005F,
+			0x0002000D,
+			0x00000009,
+			0x00000000,
+			0x00000007,
+			0x00000004,
+			0x00000013,
+			0x00000020,
+			0x0000000B,
+			0x00000005,
+			0x00000004,
+			0x00000007,
+			0x00000004,
+			0x00000064,
+			0x00000004,
+			0x00000000,
+			0x00000029,
+			0x00000000,
+			0x00000002,
+			0x00000001,
+			0x00000002,
+			0x00000003,
+			0x00000000,
+			0x00000000,
+			0x000000A3,
+			0x00000002,
+			0x00000007,
+			0x000001F4,
+			0xFFFF2634
+		},
+		{
+			{
+				0x00000000,
+				0x000000A2,
+				0x00000005,
+				0x00000001
+			},
+			0x00000000,
+			0x00000070
+		},
+		{0x10652350},
+		0x0000001D,
+		{0x00000000},
+		0xFFF8355C
+	}
+}
diff --git a/drivers/ram/rockchip/sdram_rk3308.c b/drivers/ram/rockchip/sdram_rk3308.c
new file mode 100644
index 0000000000..49c56ae78b
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_rk3308.c
@@ -0,0 +1,880 @@
+// SPDX-License-Identifier:     GPL-2.0+
+/*
+ * Copyright (C) 2020 Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <debug_uart.h>
+#include <dm.h>
+#include <dt-structs.h>
+#include <ram.h>
+#include <regmap.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/rk_atags.h>
+#include <asm/arch/timer.h>
+#include <asm/arch/grf_rk3308.h>
+#include <asm/arch/sdram.h>
+#include <asm/arch/sdram_rk3308.h>
+#include <asm/arch/sdram_rv1108_pctl_phy.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define CRU_BASE		0xff500000
+#define GRF_BASE		0xff000000
+#define SGRF_BASE		0xff2b0000
+#define DDR_PHY_BASE		0xff530000
+#define DDR_PCTL_BASE		0xff010000
+#define DDR_STANDBY_BASE	0xff030000
+#define PMU_BASS_ADDR		0xff520000
+#define SERVICE_MSCH_BASE	0xff5c8000
+
+struct rk3308_ddr_gd ddr_gd = {
+#include	"sdram-rk3308-ddr-skew.inc"
+};
+
+struct sdram_params sdram_configs[] = {
+#if (CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE == 3)
+	#include "sdram_inc/rk3308/sdram-rk3308-ddr3-detect-589.inc"
+#elif (CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE == 2)
+	#include "sdram_inc/rk3308/sdram-rk3308-ddr2-detect-451.inc"
+#elif (CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE == 5)
+	#include "sdram_inc/rk3308/sdram-rk3308-lpddr2-detect-451.inc"
+#endif
+};
+
+#define DDR3_DDR2_ODT_DISABLE_FREQ	(666)
+
+#define DDR2_TRFC_256MBIT	(75)
+#define DDR2_TRFC_512MBIT	(105)
+#define DDR2_TRFC_1GBIT		(128)
+#define DDR2_TRFC_2GBIT		(195)
+#define DDR2_TRFC_4GBIT		(328)
+
+#define DDR3_TRFC_512MBIT	(90)
+#define DDR3_TRFC_1GBIT		(110)
+#define DDR3_TRFC_2GBIT		(160)
+#define DDR3_TRFC_4GBIT		(300)
+#define DDR3_TRFC_8GBIT		(350)
+
+#define LPDDR2_TRFC_8GBIT		(210) /*ns*/
+#define LPDDR2_TRFC_4GBIT		(130) /*ns*/
+#define LPDDR2_TREC_512MBIT		(90) /*ns*/
+
+void enable_ddr_io_ret(struct dram_info *priv)
+{
+	rk_clrsetreg(&priv->pmu->sft_con_lo, DDR_IO_RET_CFG_MASK,
+		     DDR_IO_RET_CFG << DDR_IO_RET_CFG_SHIFT);
+
+	rk_clrsetreg(&priv->grf->upctl_con0, GRF_DDR_16BIT_EN_MASK,
+		     GRF_DDR_16BIT_EN << GRF_DDR_16BIT_EN_SHIFT);
+}
+
+void pll_set(u32 pll_type, struct dram_info *priv,
+	     struct rockchip_pll_rate_table *pll_priv)
+{
+	/* pll power down */
+	rk_clrsetreg(&priv->cru->pll[pll_type].con1, PLLPD0_MASK,
+		     PLLPD0_POWER_DOWN << PLLPD0_SHIFT);
+	rk_clrsetreg(&priv->cru->pll[pll_type].con1,
+		     DSMPD_MASK, pll_priv->dsmpd << DSMPD_SHIFT);
+
+	/* set pll freq */
+	rk_clrsetreg(&priv->cru->pll[pll_type].con0,
+		     FBDIV_MASK | POSTDIV1_MASK,
+		     pll_priv->fbdiv << FBDIV_SHIFT |
+		     pll_priv->postdiv1 << POSTDIV1_SHIFT);
+	rk_clrsetreg(&priv->cru->pll[pll_type].con1,
+		     POSTDIV2_MASK | REFDIV_MASK,
+		     pll_priv->postdiv2 << POSTDIV2_SHIFT |
+		     pll_priv->refdiv << REFDIV_SHIFT);
+	writel(pll_priv->frac << FRACDIV_SHIFT,
+	       &priv->cru->pll[pll_type].con2);
+	/* pll power up */
+	rk_clrsetreg(&priv->cru->pll[pll_type].con1, PLLPD0_MASK,
+		     PLLPD0_NO_POWER_DOWN << PLLPD0_SHIFT);
+
+	/* wait until pll lock */
+	while (!(readl(&priv->cru->pll[pll_type].con1) &
+	       (1u << PLL_LOCK_SHIFT)))
+		udelay(1);
+}
+
+void rkdclk_init(struct dram_info *priv,
+		 struct sdram_params *params_priv)
+{
+	u32 ddr_pll_sel;
+	u32 ddr_phy_div_con;
+	u32 uart_div[5] = {15, 15, 15, 15, 15};
+	struct rockchip_pll_rate_table rk3308_pll_div;
+
+	/* DPLL VPLL0 VPLL1 mode in 24MHz*/
+	rk_clrsetreg(&priv->cru->mode, VPLL1_WORK_MODE_MASK,
+		     VPLL1_WORK_MODE_XIN_OSC0 << VPLL1_WORK_MODE_SHIFT);
+	rk_clrsetreg(&priv->cru->mode, VPLL0_WORK_MODE_MASK,
+		     VPLL0_WORK_MODE_XIN_OSC0 << VPLL0_WORK_MODE_SHIFT);
+	rk_clrsetreg(&priv->cru->mode, DPLL_WORK_MODE_MASK,
+		     DPLL_WORK_MODE_XIN_OSC0 << DPLL_WORK_MODE_SHIFT);
+
+	/* set PLL without level shift */
+	rk_clrsetreg(&priv->cru->mode, VPLL1_CLK_SEL_MASK,
+		     VPLL1_CLK_SEL_WITHOUT_LVL_SHIFT << VPLL1_CLK_SEL_SHIFT);
+	rk_clrsetreg(&priv->cru->mode, VPLL0_CLK_SEL_MASK,
+		     VPLL0_CLK_SEL_WITHOUT_LVL_SHIFT << VPLL0_CLK_SEL_SHIFT);
+	rk_clrsetreg(&priv->cru->mode, DPLL_CLK_SEL_MASK,
+		     DPLL_CLK_SEL_WITHOUT_LVL_SHIFT << DPLL_CLK_SEL_SHIFT);
+
+	/* set vpll1 in 903.168MHz vco = 1.806GHz */
+	rk3308_pll_div.refdiv = 2;
+	rk3308_pll_div.fbdiv = 150;
+	rk3308_pll_div.postdiv1 = 2;
+	rk3308_pll_div.postdiv2 = 1;
+	rk3308_pll_div.frac = 0x872B02;
+	rk3308_pll_div.dsmpd = 0;
+	pll_set(VPLL1, priv, &rk3308_pll_div);
+
+	if (params_priv->ddr_timing_t.freq == 393) {
+		/* set vpll0 in 786.432MHz vco = 3.146GHz */
+		rk3308_pll_div.refdiv = 2;
+		rk3308_pll_div.fbdiv = 262;
+		rk3308_pll_div.postdiv1 = 4;
+		rk3308_pll_div.postdiv2 = 1;
+		rk3308_pll_div.frac = 0x24DD2F;
+		rk3308_pll_div.dsmpd = 0;
+	} else {
+		/* set vpll0 in 1179.648MHz, vco = 2.359GHz*/
+		rk3308_pll_div.refdiv = 2;
+		rk3308_pll_div.fbdiv = 196;
+		rk3308_pll_div.postdiv1 = 2;
+		rk3308_pll_div.postdiv2 = 1;
+		rk3308_pll_div.frac = 0x9BA5E3;
+		rk3308_pll_div.dsmpd = 0;
+	}
+	pll_set(VPLL0, priv, &rk3308_pll_div);
+
+	if (params_priv->ddr_timing_t.freq == 800) {
+		ddr_pll_sel = 0;
+		ddr_phy_div_con = 0;
+	} else if (params_priv->ddr_timing_t.freq == 589) {
+		ddr_pll_sel = 1;
+		ddr_phy_div_con = 0;
+	} else if (params_priv->ddr_timing_t.freq == 451) {
+		ddr_pll_sel = 2;
+		ddr_phy_div_con = 0;
+	} else if (params_priv->ddr_timing_t.freq == 393) {
+		ddr_pll_sel = 1;
+		ddr_phy_div_con = 0;
+	} else if (params_priv->ddr_timing_t.freq == 294) {
+		ddr_pll_sel = 1;
+		ddr_phy_div_con = 1;
+	} else if (params_priv->ddr_timing_t.freq == 225) {
+		ddr_pll_sel = 2;
+		ddr_phy_div_con = 1;
+	} else {
+		printascii("err\n");
+		while (1)
+			;
+	}
+
+	/* dpll default set in 1300MHz */
+	if (params_priv->ddr_timing_t.freq == 800) {
+		/* set dpll in 1584 MHz ,vco=3.168G*/
+		rk3308_pll_div.refdiv = 1;
+		rk3308_pll_div.fbdiv = 132;
+		rk3308_pll_div.postdiv1 = 2;
+		rk3308_pll_div.postdiv2 = 1;
+		rk3308_pll_div.frac = 0;
+		rk3308_pll_div.dsmpd = 1;
+	} else {
+		/* 1300000000,vco = 1.3GHz */
+		rk3308_pll_div.refdiv = 6;
+		rk3308_pll_div.fbdiv = 325;
+		rk3308_pll_div.postdiv1 = 1;
+		rk3308_pll_div.postdiv2 = 1;
+		rk3308_pll_div.frac = 0;
+		rk3308_pll_div.dsmpd = 1;
+	}
+
+	pll_set(DPLL, priv, &rk3308_pll_div);
+
+	/* set ddrphy freq */
+	rk_clrsetreg(&priv->cru->clksel_con[1],
+		     DDRPHY4X_PLL_CLK_SEL_MASK | DDRPHY4X_DIV_CON_MASK,
+		     ddr_pll_sel << DDRPHY4X_PLL_CLK_SEL_SHIFT |
+		     ddr_phy_div_con << DDRPHY4X_DIV_CON_SIHFT);
+
+	/* set aclk_bus 216.7MHz */
+	rk_clrsetreg(&priv->cru->clksel_con[5],
+		     A_H_PCLK_BUS_PLL_SEL_MASK | ACLK_BUS_DIV_CON_MASK,
+		     A_H_PCLK_BUS_PLL_SEL_DPLL << A_H_PCLK_BUS_PLL_SEL_SHIFT |
+		     ACLK_BUS_DIV_CON_5 << ACLK_BUS_DIV_CON_SHIFT);
+	/* set pclk_bus 50MHz,hclk_bus 92.857MHz */
+	rk_clrsetreg(&priv->cru->clksel_con[6],
+		     PCLK_BUS_DIV_CON_MASK | HCLK_BUS_DIV_CON_MASK,
+		     PCLK_BUS_DIV_CON_25 << PCLK_BUS_DIV_CON_SHIFT |
+		     HCLK_BUS_DIV_CON_13 << HCLK_BUS_DIV_CON_SHIFT);
+	/* set crypto 92.857MHz,crypto_apk 92.857MHz */
+	rk_clrsetreg(&priv->cru->clksel_con[7],
+		     CLK_CRYPTO_APK_SEL_MASK | CLK_CRYPTO_APK_DIV_MASK |
+		     CLK_CRYPTO_PLL_SEL_MASK | CLK_CRYPTO_DIV_CON_MASK,
+		     CLK_CRYPTO_APK_SEL_DPLL << CLK_CRYPTO_APK_SEL_SHIFT |
+		     CLK_CRYPTO_APK_DIV_13 << CLK_CRYPTO_APK_DIV_SHIFT |
+		     CLK_CRYPTO_PLL_SEL_DPLL << CLK_CRYPTO_PLL_SEL_SHIFT |
+		     CLK_CRYPTO_DIV_CON_13 << CLK_CRYPTO_DIV_CON_SHIFT);
+	/* set aclk_peri 216.7MHz */
+	rk_clrsetreg(&priv->cru->clksel_con[36],
+		     A_H_P_PERI_PLL_SEL_MASK | ACLK_PERI_DIV_CON_MASK,
+		     A_H_P_PERI_PLL_SEL_DPLL << A_H_P_PERI_PLL_SEL_SHIFT |
+		     ACLK_PERI_DIV_CON_5 << ACLK_PERI_DIV_CON_SHIFT);
+	/* set hclk_peri 92.857MHz,pclk_peri 46.428MHz */
+	rk_clrsetreg(&priv->cru->clksel_con[37],
+		     PCLK_PERI_DIV_CON_MASK | HCLK_PERI_DIV_CON_MASK,
+		     PCLK_PERI_DIV_CON_27 << PCLK_PERI_DIV_CON_SHIFT |
+		     HCLK_PERI_DIV_CON_13 << HCLK_PERI_DIV_CON_SHIFT);
+	/* set NANDC 92.857MHz */
+	rk_clrsetreg(&priv->cru->clksel_con[38],
+		     CLK_NANDC_PLL_SEL_MASK |
+		     CLK_NANDC_DIV_CON_MASK,
+		     CLK_NANDC_PLL_SEL_DPLL << CLK_NANDC_PLL_SEL_SHIFT |
+		     CLK_NANDC_DIV_CON_13 << CLK_NANDC_DIV_CON_SHIFT);
+	/* set SDMMC 46.4/(internal freq_div 2)=23.2MHz */
+	rk_clrsetreg(&priv->cru->clksel_con[39],
+		     CLK_SDMMC_PLL_SEL_MASK |
+		     CLK_SDMMC_DIV_CON_MASK,
+		     CLK_SDMMC_PLL_SEL_DPLL << CLK_SDMMC_PLL_SEL_SHIFT |
+		     CLK_SDMMC_DIV_CON_27 << CLK_SDMMC_DIV_CON_SHIFT);
+	/* set emmc 46.4/(internal freq_div 2)=23.2MHz */
+	rk_clrsetreg(&priv->cru->clksel_con[41],
+		     CLK_EMMC_PLL_SEL_MASK |
+		     CLK_EMMC_DIV_CON_MASK,
+		     CLK_EMMC_PLL_SEL_DPLL << CLK_EMMC_PLL_SEL_SHIFT |
+		     CLK_EMMC_DIV_CON_27 << CLK_EMMC_DIV_CON_SHIFT);
+	/* set SFC 24.07/(internal freq_div 2)=12.0MHz */
+	rk_clrsetreg(&priv->cru->clksel_con[42],
+		     CLK_SFC_PLL_SEL_MASK | CLK_SFC_DIV_CON_MASK,
+		     CLK_SFC_PLL_SEL_DPLL << CLK_SFC_PLL_SEL_SHIFT |
+		     CLK_SFC_DIV_CON_53 << CLK_SFC_DIV_CON_SHIFT);
+#if defined(CONFIG_DPLL_FREQ_1200MHZ)
+	/*vco=1.2GHz*/
+	rk3308_pll_div.refdiv = 2;
+	rk3308_pll_div.fbdiv = 100;
+	rk3308_pll_div.postdiv1 = 1;
+	rk3308_pll_div.postdiv2 = 1;
+	rk3308_pll_div.frac = 0;
+
+	/* set dpll in 1200 MHz */
+	pll_set(DPLL, priv, &rk3308_pll_div);
+
+	/* set aclk_bus 200MHz */
+	rk_clrsetreg(&priv->cru->clksel_con[5],
+		     A_H_PCLK_BUS_PLL_SEL_MASK | ACLK_BUS_DIV_CON_MASK,
+		     A_H_PCLK_BUS_PLL_SEL_DPLL << A_H_PCLK_BUS_PLL_SEL_SHIFT |
+		     ACLK_BUS_DIV_CON_5 << ACLK_BUS_DIV_CON_SHIFT);
+	/* set pclk_bus 46.15MHz,hclk_bus 100MHz */
+	rk_clrsetreg(&priv->cru->clksel_con[6],
+		     PCLK_BUS_DIV_CON_MASK | HCLK_BUS_DIV_CON_MASK,
+		     PCLK_BUS_DIV_CON_25 << PCLK_BUS_DIV_CON_SHIFT |
+		     HCLK_BUS_DIV_CON_11 << HCLK_BUS_DIV_CON_SHIFT);
+	/* set crypto,crypto_apk 100MHz */
+	rk_clrsetreg(&priv->cru->clksel_con[7],
+		     CLK_CRYPTO_APK_SEL_MASK | CLK_CRYPTO_APK_DIV_MASK |
+		     CLK_CRYPTO_PLL_SEL_MASK | CLK_CRYPTO_DIV_CON_MASK,
+		     CLK_CRYPTO_APK_SEL_DPLL << CLK_CRYPTO_APK_SEL_SHIFT |
+		     CLK_CRYPTO_APK_DIV_11 << CLK_CRYPTO_APK_DIV_SHIFT |
+		     CLK_CRYPTO_PLL_SEL_DPLL << CLK_CRYPTO_PLL_SEL_SHIFT |
+		     CLK_CRYPTO_DIV_CON_11 << CLK_CRYPTO_DIV_CON_SHIFT);
+	/* set aclk_peri 200MHz */
+	rk_clrsetreg(&priv->cru->clksel_con[36],
+		     A_H_P_PERI_PLL_SEL_MASK | ACLK_PERI_DIV_CON_MASK,
+		     A_H_P_PERI_PLL_SEL_DPLL << A_H_P_PERI_PLL_SEL_SHIFT |
+		     ACLK_PERI_DIV_CON_5 << ACLK_PERI_DIV_CON_SHIFT);
+	/* set hclk_peri 100MHz,pclk_peri 50MHz */
+	rk_clrsetreg(&priv->cru->clksel_con[37],
+		     PCLK_PERI_DIV_CON_MASK | HCLK_PERI_DIV_CON_MASK,
+		     PCLK_PERI_DIV_CON_23 << PCLK_PERI_DIV_CON_SHIFT |
+		     HCLK_PERI_DIV_CON_11 << HCLK_PERI_DIV_CON_SHIFT);
+	/* set NANDC 100MHz */
+	rk_clrsetreg(&priv->cru->clksel_con[38],
+		     CLK_NANDC_PLL_SEL_MASK |
+		     CLK_NANDC_DIV_CON_MASK,
+		     CLK_NANDC_PLL_SEL_DPLL << CLK_NANDC_PLL_SEL_SHIFT |
+		     CLK_NANDC_DIV_CON_11 << CLK_NANDC_DIV_CON_SHIFT);
+	/* set SDMMC 50MHz */
+	rk_clrsetreg(&priv->cru->clksel_con[39],
+		     CLK_SDMMC_PLL_SEL_MASK |
+		     CLK_SDMMC_DIV_CON_MASK,
+		     CLK_SDMMC_PLL_SEL_DPLL << CLK_SDMMC_PLL_SEL_SHIFT |
+		     CLK_SDMMC_DIV_CON_23 << CLK_SDMMC_DIV_CON_SHIFT);
+	/* set emmc 50MHz */
+	rk_clrsetreg(&priv->cru->clksel_con[41],
+		     CLK_EMMC_PLL_SEL_MASK |
+		     CLK_EMMC_DIV_CON_MASK,
+		     CLK_EMMC_PLL_SEL_DPLL << CLK_EMMC_PLL_SEL_SHIFT |
+		     CLK_EMMC_DIV_CON_23 << CLK_EMMC_DIV_CON_SHIFT);
+	/* set SFC 24MHz */
+	rk_clrsetreg(&priv->cru->clksel_con[42],
+		     CLK_SFC_PLL_SEL_MASK | CLK_SFC_DIV_CON_MASK,
+		     CLK_SFC_PLL_SEL_DPLL << CLK_SFC_PLL_SEL_SHIFT |
+		     CLK_SFC_DIV_CON_49 << CLK_SFC_DIV_CON_SHIFT);
+
+#elif defined(CONFIG_DPLL_FREQ_748MHZ)
+	/*vco=1.5GHz*/
+	rk3308_pll_div.refdiv = 6;
+	rk3308_pll_div.fbdiv = 374;
+	rk3308_pll_div.postdiv1 = 2;
+	rk3308_pll_div.postdiv2 = 1;
+	rk3308_pll_div.frac = 0;
+
+	/* set dpll in 748 MHz */
+	pll_set(DPLL, priv, &rk3308_pll_div);
+
+	/* set aclk_bus 187MHz */
+	rk_clrsetreg(&priv->cru->clksel_con[5],
+		     A_H_PCLK_BUS_PLL_SEL_MASK | ACLK_BUS_DIV_CON_MASK,
+		     A_H_PCLK_BUS_PLL_SEL_DPLL << A_H_PCLK_BUS_PLL_SEL_SHIFT |
+		     ACLK_BUS_DIV_CON_3 << ACLK_BUS_DIV_CON_SHIFT);
+	/* set pclk_bus 46.75MHz,hclk_bus 93.5MHz */
+	rk_clrsetreg(&priv->cru->clksel_con[6],
+		     PCLK_BUS_DIV_CON_MASK | HCLK_BUS_DIV_CON_MASK,
+		     PCLK_BUS_DIV_CON_15 << PCLK_BUS_DIV_CON_SHIFT |
+		     HCLK_BUS_DIV_CON_7 << HCLK_BUS_DIV_CON_SHIFT);
+	/* set crypto,crypto_apk 93.5MHz */
+	rk_clrsetreg(&priv->cru->clksel_con[7],
+		     CLK_CRYPTO_APK_SEL_MASK | CLK_CRYPTO_APK_DIV_MASK |
+		     CLK_CRYPTO_PLL_SEL_MASK | CLK_CRYPTO_DIV_CON_MASK,
+		     CLK_CRYPTO_APK_SEL_DPLL << CLK_CRYPTO_APK_SEL_SHIFT |
+		     CLK_CRYPTO_APK_DIV_7 << CLK_CRYPTO_APK_DIV_SHIFT |
+		     CLK_CRYPTO_PLL_SEL_DPLL << CLK_CRYPTO_PLL_SEL_SHIFT |
+		     CLK_CRYPTO_DIV_CON_7 << CLK_CRYPTO_DIV_CON_SHIFT);
+	/* set aclk_peri 187MHz */
+	rk_clrsetreg(&priv->cru->clksel_con[36],
+		     A_H_P_PERI_PLL_SEL_MASK | ACLK_PERI_DIV_CON_MASK,
+		     A_H_P_PERI_PLL_SEL_DPLL << A_H_P_PERI_PLL_SEL_SHIFT |
+		     ACLK_PERI_DIV_CON_3 << ACLK_PERI_DIV_CON_SHIFT);
+	/* set hclk_peri 93.5MHz,pclk_peri 46.75MHz */
+	rk_clrsetreg(&priv->cru->clksel_con[37],
+		     PCLK_PERI_DIV_CON_MASK | HCLK_PERI_DIV_CON_MASK,
+		     PCLK_PERI_DIV_CON_15 << PCLK_PERI_DIV_CON_SHIFT |
+		     HCLK_PERI_DIV_CON_7 << HCLK_PERI_DIV_CON_SHIFT);
+	/* set NANDC 93.5MHz */
+	rk_clrsetreg(&priv->cru->clksel_con[38],
+		     CLK_NANDC_PLL_SEL_MASK |
+		     CLK_NANDC_DIV_CON_MASK,
+		     CLK_NANDC_SEL50_ALWAYS << CLK_NANDC_SEL50_SHIFT |
+		     CLK_NANDC_PLL_SEL_DPLL << CLK_NANDC_PLL_SEL_SHIFT |
+		     CLK_NANDC_DIV_CON_7 << CLK_NANDC_DIV_CON_SHIFT);
+	/* set NANDC 46.75MHz */
+	rk_clrsetreg(&priv->cru->clksel_con[39],
+		     CLK_SDMMC_PLL_SEL_MASK |
+		     CLK_SDMMC_DIV_CON_MASK,
+		     CLK_SDMMC_PLL_SEL_DPLL << CLK_SDMMC_PLL_SEL_SHIFT |
+		     CLK_SDMMC_DIV_CON_15 << CLK_SDMMC_DIV_CON_SHIFT);
+	/* set emmc 46.75MHz */
+	rk_clrsetreg(&priv->cru->clksel_con[41],
+		     CLK_EMMC_PLL_SEL_MASK |
+		     CLK_EMMC_DIV_CON_MASK,
+		     CLK_EMMC_PLL_SEL_DPLL << CLK_EMMC_PLL_SEL_SHIFT |
+		     CLK_EMMC_DIV_CON_15 << CLK_EMMC_DIV_CON_SHIFT);
+	/* set SFC 23.375MHz */
+	rk_clrsetreg(&priv->cru->clksel_con[42],
+		     CLK_SFC_PLL_SEL_MASK | CLK_SFC_DIV_CON_MASK,
+		     CLK_SFC_PLL_SEL_DPLL << CLK_SFC_PLL_SEL_SHIFT |
+		     CLK_SFC_DIV_CON_31 << CLK_SFC_DIV_CON_SHIFT);
+
+#endif
+	/* set spdif tx lower than 100Mhz */
+	rk_clrsetreg(&priv->cru->clksel_con[48],
+		     CLK_SPDIFTX_DIV_CON_MASK,
+		     CLK_SPDIFTX_DIV_CON_15 << CLK_SPDIFTX_DIV_CON_SHIFT);
+
+	if (UART_INFO_ID(ddr_gd.head_info.g_uart_info) < 5)
+		uart_div[UART_INFO_ID(ddr_gd.head_info.g_uart_info)] = 0;
+
+	/* set uart0~4 lower than 100Mhz */
+	rk_clrsetreg(&priv->cru->clksel_con[10],
+		     CLK_UART0_DIV_CON_MASK,
+		     uart_div[0] << CLK_UART0_DIV_CON_SHIFT);
+	rk_clrsetreg(&priv->cru->clksel_con[13],
+		     CLK_UART1_DIV_CON_MASK,
+		     uart_div[1] << CLK_UART1_DIV_CON_SHIFT);
+	rk_clrsetreg(&priv->cru->clksel_con[16],
+		     CLK_UART2_DIV_CON_MASK,
+		     uart_div[2] << CLK_UART2_DIV_CON_SHIFT);
+	rk_clrsetreg(&priv->cru->clksel_con[19],
+		     CLK_UART3_DIV_CON_MASK,
+		     uart_div[3] << CLK_UART3_DIV_CON_SHIFT);
+	rk_clrsetreg(&priv->cru->clksel_con[22],
+		     CLK_UART4_DIV_CON_MASK,
+		     uart_div[4] << CLK_UART4_DIV_CON_SHIFT);
+
+	/* pll clk in pll out */
+	rk_clrsetreg(&priv->cru->mode, VPLL1_WORK_MODE_MASK,
+		     VPLL1_WORK_MODE_PLL << VPLL1_WORK_MODE_SHIFT);
+	rk_clrsetreg(&priv->cru->mode, VPLL0_WORK_MODE_MASK,
+		     VPLL0_WORK_MODE_PLL << VPLL0_WORK_MODE_SHIFT);
+	rk_clrsetreg(&priv->cru->mode, DPLL_WORK_MODE_MASK,
+		     DPLL_WORK_MODE_PLL << DPLL_WORK_MODE_SHIFT);
+}
+
+void phy_pctrl_reset_cru(struct dram_info *priv)
+{
+	rk_clrsetreg(&priv->cru->softrst_con[1],
+		     PRESETN_DDRPHY_REQ_MASK | RESETN_DDRPHYDIV_REQ_MASK |
+		     RESETN_DDRPHY_REQ_MASK | PRESETN_DDRUPCTL_REQ_MASK |
+		     RESETN_DDRUPCTL_REQ_MASK,
+		     PRESETN_DDRPHY_REQ_EN << PRESETN_DDRPHY_REQ_SHIFT |
+		     RESETN_DDRPHYDIV_REQ_EN << RESETN_DDRPHYDIV_REQ_SHIFT |
+		     RESETN_DDRPHY_REQ_EN << RESETN_DDRPHY_REQ_SHIFT |
+		     PRESETN_DDRUPCTL_REQ_EN << PRESETN_DDRUPCTL_REQ_SHIFT |
+		     RESETN_DDRUPCTL_REQ_EN << RESETN_DDRUPCTL_REQ_SHIFT);
+	udelay(10);
+
+	rk_clrsetreg(&priv->cru->softrst_con[1],
+		     PRESETN_DDRPHY_REQ_MASK | RESETN_DDRPHYDIV_REQ_MASK |
+		     RESETN_DDRPHY_REQ_MASK,
+		     PRESETN_DDRPHY_REQ_DIS << PRESETN_DDRPHY_REQ_SHIFT |
+		     RESETN_DDRPHYDIV_REQ_DIS << RESETN_DDRPHYDIV_REQ_SHIFT |
+		     RESETN_DDRPHY_REQ_DIS << RESETN_DDRPHY_REQ_SHIFT);
+	udelay(10);
+
+	rk_clrsetreg(&priv->cru->softrst_con[1],
+		     PRESETN_DDRUPCTL_REQ_MASK | RESETN_DDRUPCTL_REQ_MASK,
+		     PRESETN_DDRUPCTL_REQ_DIS << PRESETN_DDRUPCTL_REQ_SHIFT |
+		     RESETN_DDRUPCTL_REQ_DIS << RESETN_DDRUPCTL_REQ_SHIFT);
+	udelay(10);
+}
+
+void pctl_cfg_grf(struct dram_info *priv,
+		  struct sdram_params *params_priv)
+{
+	if (params_priv->ddr_config_t.ddr_type == DDR3 ||
+	    params_priv->ddr_config_t.ddr_type == DDR2)
+		rk_clrsetreg(&priv->grf->soc_con12, NOC_MSCH_MAINDDR3_MASK,
+			     NOC_MSCH_MAINDDR3_EN << NOC_MSCH_MAINDDR3_SHIFT);
+	else
+		rk_clrsetreg(&priv->grf->soc_con12, NOC_MSCH_MAINDDR3_MASK,
+			     NOC_MSCH_MAINDDR3_DIS << NOC_MSCH_MAINDDR3_SHIFT);
+}
+
+void ddr_msch_cfg(struct dram_info *priv,
+		  struct sdram_params *params_priv)
+{
+	writel(BWRATIO_HALF_BW | params_priv->ddr_timing_t.noc_timing.d32,
+	       &priv->service_msch->ddrtiming);
+	writel(params_priv->ddr_timing_t.readlatency,
+	       &priv->service_msch->readlatency);
+}
+
+void ddr_msch_cfg_rbc(struct sdram_params *params_priv,
+		      struct dram_info *priv)
+{
+	int i = 0;
+
+	if (params_priv->ddr_config_t.bank == 3) {
+		/* bank = 8 */
+		if (params_priv->ddr_config_t.col == 10)
+			i = 1;
+		else if (params_priv->ddr_config_t.col == 11)
+			i = 2;
+		else
+			goto msch_err;
+
+	} else if (params_priv->ddr_config_t.bank == 2) {
+		/* bank = 4 */
+		i = 0;
+	} else {
+		goto msch_err;
+	}
+
+	writel(i, &priv->service_msch->ddrconf);
+	return;
+
+msch_err:
+	printascii("msch_err\n");
+	while (1)
+		;
+}
+
+void ddr_phy_skew_cfg(struct dram_info *priv)
+{
+	copy_to_reg(&priv->phy->phy_reg_ca_skew[0],
+		    &ddr_gd.ddr_skew.a0_a1_skew[0], 14 * 4);
+	copy_to_reg(&priv->phy->phy_reg_skew_cs0data[0],
+		    &ddr_gd.ddr_skew.cs0_dm0_skew[0], 22 * 4);
+
+	writel(PHY_TX_DE_SKEW_EN << PHY_TX_DE_SKEW_SHIFT,
+	       &priv->phy->phy_reg2);
+}
+
+void set_ds_odt(struct dram_info *priv,
+		struct sdram_params *params_priv)
+{
+	/* set phy drive resistance */
+	writel(PHY_RON_RTT_56OHM, &priv->phy->phy_reg11);
+	clrsetbits_le32(&priv->phy->phy_reg12, CMD_PRCOMP_MASK,
+			PHY_RON_RTT_56OHM << CMD_PRCOMP_SHIFT);
+
+	writel(PHY_RON_RTT_45OHM, &priv->phy->phy_reg16);
+	writel(PHY_RON_RTT_45OHM, &priv->phy->phy_reg18);
+	writel(PHY_RON_RTT_56OHM, &priv->phy->phy_reg20);
+	writel(PHY_RON_RTT_56OHM, &priv->phy->phy_reg2f);
+	writel(PHY_RON_RTT_56OHM, &priv->phy->phy_reg30);
+	writel(PHY_RON_RTT_56OHM, &priv->phy->phy_reg3f);
+	if (params_priv->ddr_config_t.ddr_type == LPDDR2) {
+		writel(PHY_RON_RTT_DISABLE, &priv->phy->phy_reg21);
+		writel(PHY_RON_RTT_DISABLE, &priv->phy->phy_reg2e);
+		writel(PHY_RON_RTT_DISABLE, &priv->phy->phy_reg31);
+		writel(PHY_RON_RTT_DISABLE, &priv->phy->phy_reg3e);
+	} else {
+		if (params_priv->ddr_timing_t.freq >
+		    DDR3_DDR2_ODT_DISABLE_FREQ) {
+			/*set phy odt*/
+			writel(PHY_RON_RTT_225OHM, &priv->phy->phy_reg21);
+			writel(PHY_RON_RTT_225OHM, &priv->phy->phy_reg2e);
+			writel(PHY_RON_RTT_225OHM, &priv->phy->phy_reg31);
+			writel(PHY_RON_RTT_225OHM, &priv->phy->phy_reg3e);
+		} else {
+			/*disable phy odt*/
+			writel(PHY_RON_RTT_DISABLE, &priv->phy->phy_reg21);
+			writel(PHY_RON_RTT_DISABLE, &priv->phy->phy_reg2e);
+			writel(PHY_RON_RTT_DISABLE, &priv->phy->phy_reg31);
+			writel(PHY_RON_RTT_DISABLE, &priv->phy->phy_reg3e);
+		}
+	}
+}
+
+void ddr_phy_dqs_rx_dll_cfg(struct dram_info *priv, u32 freq)
+{
+	if (freq > 736) {
+		/* 22.5 degree delay */
+		writel(LEFT_CHN_A_READ_DQS_22_5_DELAY, &priv->phy->phy_reg28);
+		writel(RIGHT_CHN_A_READ_DQS_22_5_DELAY, &priv->phy->phy_reg38);
+	} else if (freq > 441) {
+		/* 45 degree delay */
+		writel(LEFT_CHN_A_READ_DQS_45_DELAY, &priv->phy->phy_reg28);
+		writel(RIGHT_CHN_A_READ_DQS_45_DELAY, &priv->phy->phy_reg38);
+	}
+}
+
+void ddr_msch_get_max_col(struct dram_info *priv,
+			  struct ddr_schedule *sch_priv)
+{
+	writel(2, &priv->service_msch->ddrconf);
+	sch_priv->col = 11;
+	sch_priv->bank = 3;
+}
+
+void ddr_msch_get_max_row(struct dram_info *priv,
+			  struct ddr_schedule *sch_priv)
+{
+	writel(1, &priv->service_msch->ddrconf);
+	sch_priv->row = 15;
+	sch_priv->col = 10;
+	sch_priv->bank = 3;
+}
+
+void enable_ddr_standby(struct dram_info *priv,
+			struct sdram_params *params_priv)
+{
+	rk_clrsetreg(&priv->grf->upctl_con0, CYSYREQ_UPCTL_DDRSTDBY_MASK,
+		     CYSYREQ_UPCTL_DDRSTDBY_EN <<
+		     CYSYREQ_UPCTL_DDRSTDBY_SHIFT);
+
+	/* CG_EXIT_TH is equal phy dll lock time when we gate phy 4x clk */
+	writel(CG_EXIT_TH << CG_EXIT_TH_SHIFT, &priv->standby->con1);
+
+	if (params_priv->stdby_idle == 128) {
+		if (params_priv->ddr_timing_t.freq == 451)
+			params_priv->stdby_idle = 105;
+		else if (params_priv->ddr_timing_t.freq == 393)
+			params_priv->stdby_idle = 10;
+	}
+	writel(params_priv->stdby_idle << IDLE_TH_SHIFT |
+		DDRPHY4X_GATE_EN << DDRPHY4X_GATE_SHIFT |
+		UPCTL_CORE_CLK_GATE_EN << UPCTL_CORE_CLK_GATE_SHIFT |
+		UPCTL_ACLK_GATE_EN << UPCTL_ACLK_GATE_SHIFT |
+		CTL_IDLR_EN << CTL_IDLR_SHIFT |
+		STDBY_EN << STDBY_EN_SHIFT, &priv->standby->con0);
+
+	while (1) {
+		if ((readl(&priv->standby->status0) &
+		    STDBY_STATUS_MASK) == ST_STDBY) {
+			break;
+		}
+	}
+}
+
+void ddr_set_atags(void)
+{
+	struct tag_serial t_serial;
+
+	memset(&t_serial, 0, sizeof(struct tag_serial));
+#ifdef CONFIG_DRAM_INIT_BUILD
+	u32 uart_info;
+
+	t_serial.version = 0;
+	uart_info = ddr_gd.head_info.g_uart_info;
+	if (UART_INFO_ID(uart_info) >= MAX_UART_NUMBER_) {
+		t_serial.enable = 0;
+	} else {
+		t_serial.enable = 1;
+		t_serial.baudrate = UART_INFO_BAUD(uart_info);
+		t_serial.m_mode = UART_INFO_IOMUX(uart_info);
+		t_serial.id = UART_INFO_ID(uart_info);
+		if (UART_INFO_ID(uart_info) == 0)
+			t_serial.addr = UART0_BASE;
+		else if (UART_INFO_ID(uart_info) == 1)
+			t_serial.addr = UART1_BASE;
+		else if (UART_INFO_ID(uart_info) == 2)
+			t_serial.addr = UART2_BASE;
+		else if (UART_INFO_ID(uart_info) == 3)
+			t_serial.addr = UART3_BASE;
+		else
+			t_serial.addr = UART4_BASE;
+	}
+#else
+	/* set serial data to &t_serial */
+#if defined(CONFIG_DEBUG_UART_BASE)
+	t_serial.version = 0;
+	t_serial.enable = 1;
+	t_serial.addr = CONFIG_DEBUG_UART_BASE;
+	t_serial.baudrate = CONFIG_BAUDRATE;
+
+#if (CONFIG_DEBUG_UART_BASE == 0xFF0A0000)
+	/* uart0 as debug uart */
+	t_serial.m_mode = SERIAL_M_MODE_M0;
+	t_serial.id = 0;
+#elif (CONFIG_DEBUG_UART_BASE == 0xFF0B0000)
+	/* uart1 as debug uart */
+	t_serial.m_mode = SERIAL_M_MODE_M0;
+	t_serial.id = 1;
+#elif (CONFIG_DEBUG_UART_BASE == 0xFF0C0000)
+#if (CONFIG_ROCKCHIP_UART_MUX_SEL_M == 0)
+	t_serial.m_mode = SERIAL_M_MODE_M0;
+#elif (CONFIG_ROCKCHIP_UART_MUX_SEL_M == 1)
+	/* uart2 m1 as debug uart */
+	t_serial.m_mode = SERIAL_M_MODE_M1;
+#else
+	#error "Please select M0 or M1 for uart2 !!!"
+#endif
+	t_serial.id = 2;
+#elif (CONFIG_DEBUG_UART_BASE == 0xFF0D0000)
+	/* uart3 as debug uart */
+	t_serial.m_mode = SERIAL_M_MODE_M0;
+	t_serial.id = 3;
+#elif (CONFIG_DEBUG_UART_BASE == 0xFF0E0000)
+	/* uart4 as debug uart */
+	t_serial.m_mode = SERIAL_M_MODE_M0;
+	t_serial.id = 4;
+#else
+	#error "Please select proper uart as debug uart !!!"
+#endif
+
+#endif /* defined(CONFIG_DEBUG_UART_BASE) */
+#endif /* CONFIG_DRAM_INIT_BUILD */
+
+	/* First pre-loader must call it before atags_set_tag() */
+	atags_destroy();
+	atags_set_tag(ATAG_SERIAL,  &t_serial);
+}
+
+static void modify_sdram_params(struct dram_info *priv,
+				struct sdram_params *params_priv)
+{
+	u32 tmp = 0;
+	u32 bw = 1;
+	u32 nMHz = params_priv->ddr_timing_t.freq;
+
+	size_t	size = 1llu << (bw +
+		       params_priv->ddr_config_t.col +
+		       params_priv->ddr_config_t.cs0_row +
+		       params_priv->ddr_config_t.bank);
+
+	move_to_config_state(priv);
+	switch (params_priv->ddr_config_t.ddr_type) {
+	case DDR2:
+		if (size <= 0x4000000)
+			tmp = DDR2_TRFC_512MBIT;
+		else if (size <= 0x8000000)
+			tmp = DDR2_TRFC_1GBIT;
+		else if (size <= 0x10000000)
+			tmp = DDR2_TRFC_2GBIT;
+		else
+			tmp = DDR2_TRFC_4GBIT;
+
+		priv->pctl->trfc = (tmp * nMHz + 999) / 1000;
+		tmp = (((tmp + 10) * nMHz + 999) / 1000);
+		if (tmp < 200)
+			tmp = 200;
+		priv->pctl->texsr = tmp & 0x3FF;
+		break;
+	case DDR3:
+		if (size <= 0x4000000)
+			tmp = DDR3_TRFC_512MBIT;
+		else if (size <= 0x8000000)
+			tmp = DDR3_TRFC_1GBIT;
+		else if (size <= 0x10000000)
+			tmp = DDR3_TRFC_2GBIT;
+		else if (size <= 0x20000000)
+			tmp = DDR3_TRFC_4GBIT;
+		else
+			tmp = DDR3_TRFC_8GBIT;
+		priv->pctl->trfc = (tmp * nMHz + 999) / 1000;
+		break;
+	case LPDDR2:
+		if (size <= 0x4000000)
+			tmp = LPDDR2_TREC_512MBIT;
+		else if (size <= 0x20000000)
+			tmp = LPDDR2_TRFC_4GBIT;
+		else
+			tmp = LPDDR2_TRFC_8GBIT;
+
+		priv->pctl->trfc = (tmp * nMHz + 999) / 1000;
+		tmp = (((tmp + 10) * nMHz + 999) / 1000);
+		if (tmp < 2)
+			tmp = 2;
+		priv->pctl->texsr = tmp & 0x3FF;
+		break;
+	}
+	move_to_access_state(priv);
+}
+
+int check_rd_gate(struct dram_info *priv)
+{
+	u32 max_val = 0;
+	u32 min_val = 0xff;
+	u32 gate[2];
+
+	gate[0] = readl(&priv->phy->phy_regfb);
+	gate[1] = readl(&priv->phy->phy_regfc);
+	max_val = max(gate[0], gate[1]);
+	min_val = min(gate[0], gate[1]);
+
+	if (max_val > 0x80 || min_val < 0x20)
+		return -1;
+	else
+		return 0;
+}
+
+static u32 dram_test(u32 i, u32 dqs)
+{
+	for (phys_addr_t j = 4 * dqs; j < 0x2000; j += 8)
+		writel(PATTERN + i, j);
+
+	for (phys_addr_t j = 4 * dqs; j < 0x2000; j += 8)
+		if ((PATTERN + i) != readl(j))
+			return 1;
+
+	return 0;
+}
+
+/**
+ * modify_data_training() - Setting DQS gating calibration bypass,
+ * scanning data training range and then select center one.
+ */
+#define PHY_REG3C(n)		(0x10 * (n))
+
+void modify_data_training(struct dram_info *priv,
+			  struct sdram_params *params_priv)
+{
+	u32 value = 0;
+	u32 i = 0, dqs = 0;
+	u32 max_value = 0, min_value = 0;
+
+	writel(readl(&priv->phy->phy_regfb), &priv->phy->phy_reg2c);
+	writel(readl(&priv->phy->phy_regfc), &priv->phy->phy_reg3c);
+
+	/* DQS gating calibration bypass */
+	setbits_le32(&priv->phy->phy_reg2, BIT(1));
+
+	/* rk3308 only support DQS0, DQS1 */
+	for (dqs = 0; dqs < 2; dqs++) {
+		value = readl(&priv->phy->phy_regfb + dqs);
+		i = 0;
+		while (dram_test(i, dqs) == 0) {
+			i++;
+			writel(value + i,
+			       &priv->phy->phy_reg2c + PHY_REG3C(dqs));
+		}
+		max_value = value + i - 1;
+
+		i = 1;
+		writel(value - i, &priv->phy->phy_reg2c + PHY_REG3C(dqs));
+		while (dram_test(i, dqs) == 0) {
+			i++;
+			writel(value - i,
+			       &priv->phy->phy_reg2c + PHY_REG3C(dqs));
+		}
+		min_value = value - i + 1;
+
+		/* select center one as gate training result */
+		writel((max_value + min_value + 1) / 2,
+		       &priv->phy->phy_reg2c + PHY_REG3C(dqs));
+	}
+	printascii("REG2C: 0x");
+	printhex8(readl(&priv->phy->phy_reg2c));
+	printascii(", 0x");
+	printhex8(readl(&priv->phy->phy_reg3c));
+	printascii("\n");
+}
+
+void enable_low_power(struct dram_info *priv,
+		      struct sdram_params *params_priv)
+{
+	move_to_config_state(priv);
+
+	if (params_priv->idle_pd == 48 && params_priv->idle_sr == 10) {
+		if (params_priv->ddr_timing_t.freq == 451) {
+			params_priv->idle_sr = 28;
+			params_priv->idle_pd = 7;
+		} else if (params_priv->ddr_timing_t.freq == 393) {
+			params_priv->idle_sr = 31;
+			params_priv->idle_pd = 15;
+		}
+	}
+	clrsetbits_le32(&priv->pctl->mcfg, PD_IDLE_MASK,
+			params_priv->idle_pd << PD_IDLE_SHIFT);
+	clrsetbits_le32(&priv->pctl->mcfg1,
+			SR_IDLE_MASK | HW_EXIT_IDLE_EN_MASK,
+			params_priv->idle_sr | HW_EXIT_IDLE_EN);
+
+	/* uPCTL in low_power status because of auto self-refresh */
+	writel(GO_STATE, &priv->pctl->sctl);
+}
+
+int get_uart_config(void)
+{
+	return ddr_gd.head_info.g_uart_info;
+}
+
+int sdram_init(void)
+{
+	struct dram_info sdram_priv;
+	struct sdram_params *params = sdram_configs;
+
+	sdram_priv.cru = (void *)CRU_BASE;
+	sdram_priv.grf = (void *)GRF_BASE;
+	sdram_priv.sgrf = (void *)SGRF_BASE;
+	sdram_priv.phy = (void *)DDR_PHY_BASE;
+	sdram_priv.pctl = (void *)DDR_PCTL_BASE;
+	sdram_priv.standby = (void *)DDR_STANDBY_BASE;
+	sdram_priv.pmu = (void *)PMU_BASS_ADDR;
+	sdram_priv.service_msch = (void *)SERVICE_MSCH_BASE;
+	params->idle_pd = PD_INFO(ddr_gd.head_info.g_sr_pd_idle);
+	params->idle_sr = SR_INFO(ddr_gd.head_info.g_sr_pd_idle);
+	params->ddr_2t_en = DDR_2T_INFO(ddr_gd.head_info.g_2t_info);
+	params->stdby_idle = STANDBY_IDLE(ddr_gd.head_info.g_ch_info);
+
+	rv1108_sdram_init(&sdram_priv, params);
+
+	modify_sdram_params(&sdram_priv, params);
+
+	if (params->idle_pd != 0 && params->idle_sr != 0)
+		enable_ddr_standby(&sdram_priv, params);
+	ddr_set_atags();
+	printascii("OUT\n");
+
+	return 0;
+}

commit b86c816ccbe6d4003438ceed5bf981ce078ca1a9
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Mon Nov 9 16:22:14 2020 +0800

    drivers: ram: rockchip: rv1108: clean up the code
    
    Change-Id: I3446805fd9c320ddd49b9cb12df82943057ed9ee
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rv1108.h b/arch/arm/include/asm/arch-rockchip/sdram_rv1108.h
index 96591750ca..b6947523cb 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_rv1108.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_rv1108.h
@@ -51,18 +51,39 @@ struct dram_info {
 };
 
 struct sdram_params {
-	struct ddr_config ddr_config;
+	u32 ddr_2t_en;
+	struct ddr_config ddr_config_t;
 	struct pll_div dpll_init_cfg;
 	struct ddr_timing ddr_timing_t;
 };
 
+int check_rd_gate(struct dram_info *priv);
+void enable_low_power(struct dram_info *priv,
+		      struct sdram_params *params_priv);
+void ddr_msch_cfg(struct dram_info *priv,
+		  struct sdram_params *params_priv);
+void ddr_msch_cfg_rbc(struct sdram_params *params_priv,
+		      struct dram_info *priv);
+void ddr_msch_get_max_col(struct dram_info *priv,
+			  struct ddr_schedule *sch_priv);
+void ddr_msch_get_max_row(struct dram_info *priv,
+			  struct ddr_schedule *sch_priv);
+void ddr_phy_dqs_rx_dll_cfg(struct dram_info *priv, u32 freq);
+void ddr_phy_skew_cfg(struct dram_info *priv);
 void enable_ddr_io_ret(struct dram_info *priv);
+void modify_data_training(struct dram_info *priv,
+			  struct sdram_params *params_priv);
+void move_to_config_state(struct dram_info *priv);
+void pctl_cfg_grf(struct dram_info *priv,
+		  struct sdram_params *params_priv);
+void phy_pctrl_reset_cru(struct dram_info *priv);
 void rkdclk_init(struct dram_info *priv,
 		 struct sdram_params *params_priv);
-void phy_pctrl_reset_cru(struct dram_info *priv);
-void set_bw_grf(struct dram_info *priv);
-void pctl_cfg_grf(struct dram_info *priv);
 int rv1108_sdram_init(struct dram_info *sdram_priv,
 		      struct sdram_params *params_priv);
+void set_bw_grf(struct dram_info *priv);
+void set_ds_odt(struct dram_info *priv,
+		struct sdram_params *params_priv);
+
 
 #endif
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rv1108_pctl_phy.h b/arch/arm/include/asm/arch-rockchip/sdram_rv1108_pctl_phy.h
index d8bc6883ac..b7bb61921b 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_rv1108_pctl_phy.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_rv1108_pctl_phy.h
@@ -167,12 +167,12 @@ struct ddr_phy {
 	u32 reserved0;
 	u32 phy_reg5;
 	u32 phy_reg6;
-	u32 reserveds1[(0x24-0x1c)/4];
+	u32 reserveds1[(0x24 - 0x1c) / 4];
 	u32 phy_reg9;
-	u32 reserveds2[(0x2c-0x28)/4];
+	u32 reserveds2[(0x2c - 0x28) / 4];
 	u32 phy_regb;
 	u32 phy_regc;
-	u32 reserveds3[(0x44-0x34)/4];
+	u32 reserveds3[(0x44 - 0x34) / 4];
 	u32 phy_reg11;
 	u32 phy_reg12;
 	u32 phy_reg13;
@@ -181,42 +181,46 @@ struct ddr_phy {
 	u32 phy_reg16;
 	u32 phy_reg17;
 	u32 phy_reg18;
-	u32 reserveds5[(0x80-0x64)/4];
+	u32 reserveds5[(0x80 - 0x64) / 4];
 	u32 phy_reg20;
 	u32 phy_reg21;
-	u32 reserveds6[(0x98-0x88)/4];
+	u32 reserveds6[(0x98 - 0x88) / 4];
 	u32 phy_reg26;
 	u32 phy_reg27;
 	u32 phy_reg28;
-	u32 reserveds7[(0xac-0xa4)/4];
+	u32 reserveds7[(0xac - 0xa4) / 4];
 	u32 phy_reg2b;
-	u32 reserveds8[(0xb8-0xb0)/4];
+	u32 phy_reg2c;
+	u32 reserveds8[(0xb8 - 0xb4) / 4];
 	u32 phy_reg2e;
 	u32 phy_reg2f;
 	u32 phy_reg30;
 	u32 phy_reg31;
-	u32 reserveds9[(0xd8-0xc8)/4];
+	u32 reserveds9[(0xd8 - 0xc8) / 4];
 	u32 phy_reg36;
 	u32 phy_reg37;
 	u32 phy_reg38;
-	u32 reserveds10[(0xec-0xe4)/4];
+	u32 reserveds10[(0xec - 0xe4) / 4];
 	u32 phy_reg3b;
-	u32 reserveds11[(0xf8-0xf0)/4];
+	u32 phy_reg3c;
+	u32 reserveds11[(0xf8 - 0xf4) / 4];
 	u32 phy_reg3e;
 	u32 phy_reg3f;
-	u32 reserveds12[(0x1c0-0x100)/4];
-	u32 phy_reg_skew_cs0data[(0x218-0x1c0)/4];
-	u32 reserveds13[(0x28c-0x218)/4];
+	u32 reserveds12[(0x1c0 - 0x100) / 4];
+	u32 phy_reg_skew_cs0data[(0x218 - 0x1c0) / 4];
+	u32 reserveds13[(0x28c - 0x218) / 4];
 	u32 phy_vref;
-	u32 phy_regdll;/*dll bypass switch reg,0x290*/
-	u32 reserveds14[(0x2c0-0x294)/4];
-	u32 phy_reg_ca_skew[(0x2f8-0x2c0)/4];
-	u32 reserveds15[(0x300-0x2f8)/4];
-	u32 phy_reg_skew_cs1data[(0x358-0x300)/4];
-	u32 reserveds16[(0x3c0-0x358)/4];
+	/*dll bypass switch reg,0x290*/
+	u32 phy_regdll;
+	u32 reserveds14[(0x2c0 - 0x294) / 4];
+	u32 phy_reg_ca_skew[(0x2f8 - 0x2c0) / 4];
+	u32 reserveds15[(0x300 - 0x2f8) / 4];
+	u32 phy_reg_skew_cs1data[(0x358 - 0x300) / 4];
+	u32 reserveds16[(0x3c0 - 0x358) / 4];
 	u32 phy_regf0;
 	u32 phy_regf1;
-	u32 reserveds17[(0x3e8-0x3c8)/4];
+	u32 reserveds17[(0x3e4 - 0x3c8) / 4];
+	u32 phy_regf9;
 	u32 phy_regfa;
 	u32 phy_regfb;
 	u32 phy_regfc;
@@ -226,6 +230,29 @@ struct ddr_phy {
 };
 check_member(ddr_phy, phy_regff, 0x03fc);
 
+union noc_timing_t {
+	u32 d32;
+	struct {
+	unsigned acttoact : 6;
+	unsigned rdtomiss : 6;
+	unsigned wrtomiss : 6;
+	unsigned burstlen : 3;
+	unsigned rdtowr : 5;
+	unsigned wrtord : 5;
+	unsigned bwratio : 1;
+	} b;
+};
+
+union noc_activate_t {
+	u32 d32;
+	struct {
+	unsigned rrd : 4;
+	unsigned faw : 6;
+	unsigned fawbank : 1;
+	unsigned reserved : 21;
+	} b;
+};
+
 struct ddr_timing {
 	u32 freq;
 	struct pctl_timing {
@@ -270,9 +297,9 @@ struct ddr_timing {
 		u32 bl;
 		u32 cl_al;
 	} phy_timing;
-	u32 noc_timing;
+	union noc_timing_t noc_timing;
 	u32 readlatency;
-	u32 activate;
+	union noc_activate_t activate;
 	u32 devtodev;
 };
 
@@ -301,6 +328,12 @@ struct ddr_config {
 	u32 bw;
 };
 
+struct ddr_schedule {
+	u32 col;
+	u32 bank;
+	u32 row;
+};
+
 enum {
 	PHY_LOW_SPEED_MHZ		= 400,
 	/* PHY_REG0 */
@@ -320,7 +353,10 @@ enum {
 
 	/* PHY_REG1 */
 	MEMORY_SELECT_DDR3		= 0,
+	MEMORY_SELECT_DDR2		= 1,
+	MEMORY_SELECT_LPDDR2		= 2,
 	PHY_BL_8			= 1 << 2,
+	PHY_BL_4			= 0 << 2,
 
 	/* PHY_REG2 */
 	DQS_GATE_TRAINING_SEL_CS0	= 1 << 5,
@@ -354,6 +390,7 @@ enum {
 	LEFT_CHN_A_DQS_DLL_BYPASS_DIS	= 0,
 
 	/* DDRPHY_REG28 */
+	LEFT_CHN_A_READ_DQS_22_5_DELAY	= 1,
 	LEFT_CHN_A_READ_DQS_45_DELAY	= 2,
 
 	/* DDRPHY_REG36 */
@@ -368,6 +405,7 @@ enum {
 	RIGHT_CHN_A_DQS_DLL_BYPASS_DIS	= 0,
 
 	/* DDRPHY_REG38 */
+	RIGHT_CHN_A_READ_DQS_22_5_DELAY	= 1,
 	RIGHT_CHN_A_READ_DQS_45_DELAY	= 2,
 
 	/* PHY_REGDLL */
@@ -417,6 +455,10 @@ enum {
 	BANK_ADDR_MASK				= 0x7,
 	CMD_ADDR_SHIFT				= 4,
 	CMD_ADDR_MASK				= 0x1fff,
+	LPDDR23_MA_SHIFT			= 4,
+	LPDDR23_MA_MASK				= 0xff,
+	LPDDR23_OP_SHIFT			= 12,
+	LPDDR23_OP_MASK				= 0xff,
 	DDR3_DLL_RESET				= 1 << 8,
 	DESELECT_CMD				= 0x0,
 	PREA_CMD				= 0x1,
@@ -467,6 +509,9 @@ enum {
 	PARITY_INTR_EN				= 1,
 
 	/* PCTL_DFILPCFG0 */
+	DFI_LP_EN_PD				= 1,
+	DFI_LP_WAKEUP_PD_SHIFT			= 4,
+	DFI_LP_WAKEUP_PD_32_CYCLES		= 1,
 	DFI_LP_EN_SR_SHIFT			= 8,
 	DFI_LP_EN_SR				= 1,
 	DFI_LP_WAKEUP_SR_SHIFT			= 12,
@@ -490,23 +535,36 @@ enum {
 	/* PCTL_DFIODTCFG */
 	RANK0_ODT_WRITE_SEL_SHIFT		= 3,
 	RANK0_ODT_WRITE_SEL			= 1,
+	RANK0_ODT_WRITE_DIS			= 0,
 	RANK1_ODT_WRITE_SEL_SHIFT		= 11,
 	RANK1_ODT_WRITE_SEL			= 1,
+	RANK1_ODT_WRITE_DIS			= 0,
 
 	/* PCTL_DFIODTCFG1 */
 	ODT_LEN_BL8_W_SHIFT			= 16,
 	ODT_LEN_BL8_W				= 7,
+	ODT_LEN_BL8_W_0				= 0,
 
 	/* PCTL_MCFG */
 	MDDR_LPDDR23_CLOCK_STOP_IDLE_DIS	= 0 << 24,
+	LPDDR2_EN				= 3 << 22,
 	DDR3_EN					= 1 << 5,
+	DDR2_EN					= 0 << 5,
+	LPDDR2_S4				= 1 << 6,
 	MEM_BL_8				= 1,
+	MEM_BL_4				= 0,
+	MDDR_LPDDR2_BL_4			= 1 << 20,
+	MDDR_LPDDR2_BL_8			= 2 << 20,
 	TFAW_CFG_5_TDDR				= 1 << 18,
+	TFAW_CFG_6_TDDR				= 2 << 18,
 	PD_EXIT_SLOW_EXIT_MODE			= 0 << 17,
+	PD_EXIT_FAST_EXIT_MODE			= 1 << 17,
 	PD_TYPE_ACT_PD				= 1 << 16,
 	PD_IDLE_DISABLE				= 0 << 8,
 	PD_IDLE_MASK				= 0xff << 8,
 	PD_IDLE_SHIFT				= 8,
+	TWO_T_SHIFT				= 3,
+
 
 	/* PCTL_MCFG1 */
 	SR_IDLE_MASK				= 0xff,
diff --git a/drivers/ram/rockchip/sdram_rv1108.c b/drivers/ram/rockchip/sdram_rv1108.c
index 0d1e2f4a59..8e5e1d2f26 100644
--- a/drivers/ram/rockchip/sdram_rv1108.c
+++ b/drivers/ram/rockchip/sdram_rv1108.c
@@ -1,9 +1,10 @@
+// SPDX-License-Identifier:     GPL-2.0+
 /*
- * Copyright (C) 2018 Rockchip Electronics Co., Ltd
- * Author: Zhihuan He <huan.he@rock-chips.com>
- * SPDX-License-Identifier:	GPL-2.0+
+ * Copyright (C) 2020 Rockchip Electronics Co., Ltd
  */
+
 #include <common.h>
+#include <debug_uart.h>
 #include <dm.h>
 #include <dm/root.h>
 #include <dt-structs.h>
@@ -92,17 +93,87 @@ void phy_pctrl_reset_cru(struct dram_info *priv)
 	udelay(10);
 }
 
-void set_bw_grf(struct dram_info *priv)
+void pctl_cfg_grf(struct dram_info *priv,
+		  struct sdram_params *params_priv)
 {
-	rk_clrsetreg(&priv->grf->soc_con0,
-		     MSCH_MAINPARTIALPOP_MASK,
-		     MSCH_MAINPARTIALPOP);
+	writel(RK_SETBITS(MSCH_MAINDDR3 | MSCH_MAINPARTIALPOP),
+	       &priv->grf->soc_con0);
 }
 
-void pctl_cfg_grf(struct dram_info *priv)
+void ddr_msch_cfg(struct dram_info *priv,
+		  struct sdram_params *params_priv)
 {
-	writel(RK_SETBITS(MSCH_MAINDDR3 | MSCH_MAINPARTIALPOP),
-	       &priv->grf->soc_con0);
+	writel((readl(&priv->service_msch->ddrtiming) & BWRATIO_HALF_BW) |
+	       params_priv->ddr_timing_t.noc_timing.d32,
+	       &priv->service_msch->ddrtiming);
+	writel(params_priv->ddr_timing_t.readlatency,
+	       &priv->service_msch->readlatency);
+	writel(params_priv->ddr_timing_t.activate.d32,
+	       &priv->service_msch->activate);
+	writel(params_priv->ddr_timing_t.devtodev,
+	       &priv->service_msch->devtodev);
+}
+
+void ddr_msch_cfg_rbc(struct sdram_params *params_priv,
+		      struct dram_info *priv)
+{
+	int i = 0;
+
+	if (params_priv->ddr_config_t.col == 10)
+		i = 2;
+	else
+		i = 3;
+	writel(i, &priv->service_msch->ddrconf);
+}
+
+void ddr_phy_skew_cfg(struct dram_info *priv)
+{
+}
+
+void set_ds_odt(struct dram_info *priv,
+		struct sdram_params *params_priv)
+{
+	/* set phy drive impedance */
+	writel(PHY_RON_RTT_34OHM, &priv->phy->phy_reg11);
+	clrsetbits_le32(&priv->phy->phy_reg12, CMD_PRCOMP_MASK,
+			PHY_RON_RTT_34OHM << CMD_PRCOMP_SHIFT);
+
+	writel(PHY_RON_RTT_45OHM, &priv->phy->phy_reg16);
+	writel(PHY_RON_RTT_45OHM, &priv->phy->phy_reg18);
+	writel(PHY_RON_RTT_34OHM, &priv->phy->phy_reg20);
+	writel(PHY_RON_RTT_34OHM, &priv->phy->phy_reg2f);
+	writel(PHY_RON_RTT_34OHM, &priv->phy->phy_reg30);
+	writel(PHY_RON_RTT_34OHM, &priv->phy->phy_reg3f);
+
+	/*set phy odt*/
+	writel(PHY_RON_RTT_225OHM, &priv->phy->phy_reg21);
+	writel(PHY_RON_RTT_225OHM, &priv->phy->phy_reg2e);
+	writel(PHY_RON_RTT_225OHM, &priv->phy->phy_reg31);
+	writel(PHY_RON_RTT_225OHM, &priv->phy->phy_reg3e);
+}
+
+void ddr_phy_dqs_rx_dll_cfg(struct dram_info *priv, u32 freq)
+{
+	/* 45 degree delay */
+	writel(LEFT_CHN_A_READ_DQS_45_DELAY, &priv->phy->phy_reg28);
+	writel(RIGHT_CHN_A_READ_DQS_45_DELAY, &priv->phy->phy_reg38);
+}
+
+void ddr_msch_get_max_col(struct dram_info *priv,
+			  struct ddr_schedule *sch_priv)
+{
+	writel(1, &priv->service_msch->ddrconf);
+	sch_priv->col = 11;
+	sch_priv->bank = 3;
+}
+
+void ddr_msch_get_max_row(struct dram_info *priv,
+			  struct ddr_schedule *sch_priv)
+{
+	writel(1, &priv->service_msch->ddrconf);
+	sch_priv->row = 16;
+	sch_priv->col = 11;
+	sch_priv->bank = 3;
 }
 
 void *get_base_addr(unsigned int *reg, unsigned int offset)
@@ -112,6 +183,36 @@ void *get_base_addr(unsigned int *reg, unsigned int offset)
 	return (void *)p;
 }
 
+void modify_data_training(struct dram_info *priv,
+			  struct sdram_params *params_priv)
+{
+	printascii("REGFB: 0x");
+	printhex8(readl(&priv->phy->phy_regfb));
+	printascii(", 0x");
+	printhex8(readl(&priv->phy->phy_regfc));
+	printascii("\n");
+}
+
+int check_rd_gate(struct dram_info *priv)
+{
+	return 0;
+}
+
+void enable_low_power(struct dram_info *priv,
+		      struct sdram_params *params_priv)
+{
+	move_to_config_state(priv);
+
+	clrsetbits_le32(&priv->pctl->mcfg, PD_IDLE_MASK,
+			PD_IDLE << PD_IDLE_SHIFT);
+	clrsetbits_le32(&priv->pctl->mcfg1,
+			SR_IDLE_MASK | HW_EXIT_IDLE_EN_MASK,
+			SR_IDLE | HW_EXIT_IDLE_EN);
+
+	/* uPCTL in low_power status because of auto self-refresh */
+	writel(GO_STATE, &priv->pctl->sctl);
+}
+
 void get_ddr_param(struct dram_info *sdram_priv,
 		   struct ddr_param *ddr_param)
 {
diff --git a/drivers/ram/rockchip/sdram_rv1108_pctl_phy.c b/drivers/ram/rockchip/sdram_rv1108_pctl_phy.c
index ea730703f1..038690e50b 100644
--- a/drivers/ram/rockchip/sdram_rv1108_pctl_phy.c
+++ b/drivers/ram/rockchip/sdram_rv1108_pctl_phy.c
@@ -1,9 +1,10 @@
+// SPDX-License-Identifier:     GPL-2.0+
 /*
- * Copyright (C) 2018 Rockchip Electronics Co., Ltd
- * Author: Zhihuan He <huan.he@rock-chips.com>
- * SPDX-License-Identifier:	GPL-2.0+
+ * Copyright (C) 2020 Rockchip Electronics Co., Ltd
  */
+
 #include <common.h>
+#include <debug_uart.h>
 #include <dm.h>
 #include <dm/root.h>
 #include <dt-structs.h>
@@ -27,7 +28,7 @@
  * (due to 6K SRAM size limits), so these are hard-coded
  */
 
-static void copy_to_reg(u32 *dest, const u32 *src, u32 n)
+void copy_to_reg(u32 *dest, const u32 *src, u32 n)
 {
 	int i;
 
@@ -91,9 +92,7 @@ static void phy_dll_bypass_set(struct dram_info *priv, unsigned int freq)
 				&priv->phy->phy_regdll);
 	}
 
-	/* 45 degree delay */
-	writel(LEFT_CHN_A_READ_DQS_45_DELAY, &priv->phy->phy_reg28);
-	writel(RIGHT_CHN_A_READ_DQS_45_DELAY, &priv->phy->phy_reg38);
+	ddr_phy_dqs_rx_dll_cfg(priv, freq);
 }
 
 static void send_command(struct dram_info *priv,
@@ -108,49 +107,89 @@ static void send_command(struct dram_info *priv,
 static void memory_init(struct dram_info *priv,
 			struct sdram_params *params_priv)
 {
-	send_command(priv, RANK_SEL_CS0_CS1, DESELECT_CMD, 0);
-	udelay(1);
-	send_command(priv, RANK_SEL_CS0_CS1, PREA_CMD, 0);
-
-	send_command(priv, RANK_SEL_CS0_CS1, DESELECT_CMD, 0);
-	udelay(1);
-	send_command(priv, RANK_SEL_CS0_CS1, MRS_CMD,
-		     (MR2 & BANK_ADDR_MASK) << BANK_ADDR_SHIFT |
-		     (params_priv->ddr_timing_t.phy_timing.mr[2] &
-		     CMD_ADDR_MASK) << CMD_ADDR_SHIFT);
-
-	send_command(priv, RANK_SEL_CS0_CS1, MRS_CMD,
-		     (MR3 & BANK_ADDR_MASK) << BANK_ADDR_SHIFT |
-		     (params_priv->ddr_timing_t.phy_timing.mr[3] &
-		     CMD_ADDR_MASK) << CMD_ADDR_SHIFT);
-
-	send_command(priv, RANK_SEL_CS0_CS1, MRS_CMD,
-		     (MR1 & BANK_ADDR_MASK) << BANK_ADDR_SHIFT |
-		     (params_priv->ddr_timing_t.phy_timing.mr[1] &
-		     CMD_ADDR_MASK) << CMD_ADDR_SHIFT);
-
-	send_command(priv, RANK_SEL_CS0_CS1, MRS_CMD,
-		     (MR0 & BANK_ADDR_MASK) << BANK_ADDR_SHIFT |
-		     (params_priv->ddr_timing_t.phy_timing.mr[0] &
-		     CMD_ADDR_MASK) << CMD_ADDR_SHIFT | DDR3_DLL_RESET);
-
-	send_command(priv, RANK_SEL_CS0_CS1, ZQCL_CMD, 0);
-}
+	u32 mr0;
 
-static void set_bw(struct dram_info *priv,
-		   struct sdram_params *params_priv)
-{
-	if (readl(&params_priv->ddr_config.bw) == 1) {
-		clrsetbits_le32(&priv->pctl->ppcfg, PPMEM_EN_MASK, PPMEM_EN);
-		clrsetbits_le32(&priv->phy->phy_reg0, DQ_16BIT_EN_MASK,
-				DQ_16BIT_EN);
-		set_bw_grf(priv);
-		clrsetbits_le32(&priv->service_msch->ddrtiming,
-				BWRATIO_HALF_BW, BWRATIO_HALF_BW);
+	if (params_priv->ddr_config_t.ddr_type == DDR3 ||
+	    params_priv->ddr_config_t.ddr_type == DDR2) {
+		send_command(priv, RANK_SEL_CS0_CS1, DESELECT_CMD, 0);
+		udelay(1);
+		send_command(priv, RANK_SEL_CS0_CS1, PREA_CMD, 0);
+		send_command(priv, RANK_SEL_CS0_CS1, DESELECT_CMD, 0);
+		udelay(1);
+		send_command(priv, RANK_SEL_CS0_CS1, MRS_CMD,
+			     (MR2 & BANK_ADDR_MASK) << BANK_ADDR_SHIFT |
+			     (params_priv->ddr_timing_t.phy_timing.mr[2] &
+			     CMD_ADDR_MASK) << CMD_ADDR_SHIFT);
+
+		send_command(priv, RANK_SEL_CS0_CS1, MRS_CMD,
+			     (MR3 & BANK_ADDR_MASK) << BANK_ADDR_SHIFT |
+			     (params_priv->ddr_timing_t.phy_timing.mr[3] &
+			     CMD_ADDR_MASK) << CMD_ADDR_SHIFT);
+
+		send_command(priv, RANK_SEL_CS0_CS1, MRS_CMD,
+			     (MR1 & BANK_ADDR_MASK) << BANK_ADDR_SHIFT |
+			     (params_priv->ddr_timing_t.phy_timing.mr[1] &
+			     CMD_ADDR_MASK) << CMD_ADDR_SHIFT);
+
+		mr0 = params_priv->ddr_timing_t.phy_timing.mr[0];
+		if (params_priv->ddr_config_t.ddr_type == DDR3) {
+			send_command(priv, RANK_SEL_CS0_CS1, MRS_CMD,
+				     (MR0 & BANK_ADDR_MASK) << BANK_ADDR_SHIFT |
+				     (((mr0 | DDR3_DLL_RESET) &
+				       CMD_ADDR_MASK) << CMD_ADDR_SHIFT));
+
+			send_command(priv, RANK_SEL_CS0_CS1, ZQCL_CMD, 0);
+		} else {
+			send_command(priv, RANK_SEL_CS0_CS1, MRS_CMD,
+				     (MR0 & BANK_ADDR_MASK) << BANK_ADDR_SHIFT |
+				     (((mr0 | DDR3_DLL_RESET) &
+				       CMD_ADDR_MASK) << CMD_ADDR_SHIFT));
+			send_command(priv, RANK_SEL_CS0_CS1, PREA_CMD, 0);
+			send_command(priv, RANK_SEL_CS0_CS1, REF_CMD, 0);
+			send_command(priv, RANK_SEL_CS0_CS1, REF_CMD, 0);
+			send_command(priv, RANK_SEL_CS0_CS1, MRS_CMD,
+				     (MR0 & BANK_ADDR_MASK) <<
+				     BANK_ADDR_SHIFT |
+				     ((mr0 & CMD_ADDR_MASK) <<
+				      CMD_ADDR_SHIFT));
+		}
+	} else {
+		/* reset */
+		send_command(priv, RANK_SEL_CS0_CS1, MRS_CMD,
+			     (63 & LPDDR23_MA_MASK) << LPDDR23_MA_SHIFT |
+			     (0 & LPDDR23_OP_MASK) <<
+			     LPDDR23_OP_SHIFT);
+		/* tINIT5 */
+		udelay(10);
+		/* ZQ calibration Init */
+		send_command(priv, RANK_SEL_CS0, MRS_CMD,
+			     (10 & LPDDR23_MA_MASK) << LPDDR23_MA_SHIFT |
+			     (0xFF & LPDDR23_OP_MASK) <<
+			     LPDDR23_OP_SHIFT);
+		/* tZQINIT */
+		udelay(1);
+		send_command(priv, RANK_SEL_CS1, MRS_CMD,
+			     (10 & LPDDR23_MA_MASK) << LPDDR23_MA_SHIFT |
+			     (0xFF & LPDDR23_OP_MASK) <<
+			     LPDDR23_OP_SHIFT);
+		/* tZQINIT */
+		udelay(1);
+		send_command(priv, RANK_SEL_CS0_CS1, MRS_CMD,
+			     (1 & LPDDR23_MA_MASK) << LPDDR23_MA_SHIFT |
+			     (params_priv->ddr_timing_t.phy_timing.mr[1] &
+			     LPDDR23_OP_MASK) << LPDDR23_OP_SHIFT);
+		send_command(priv, RANK_SEL_CS0_CS1, MRS_CMD,
+			     (2 & LPDDR23_MA_MASK) << LPDDR23_MA_SHIFT |
+			     (params_priv->ddr_timing_t.phy_timing.mr[2] &
+			     LPDDR23_OP_MASK) << LPDDR23_OP_SHIFT);
+		send_command(priv, RANK_SEL_CS0_CS1, MRS_CMD,
+			     (3 & LPDDR23_MA_MASK) << LPDDR23_MA_SHIFT |
+			     (params_priv->ddr_timing_t.phy_timing.mr[3] &
+			     LPDDR23_OP_MASK) << LPDDR23_OP_SHIFT);
 	}
 }
 
-static void move_to_config_state(struct dram_info *priv)
+void move_to_config_state(struct dram_info *priv)
 {
 	unsigned int state;
 
@@ -181,7 +220,7 @@ static void move_to_config_state(struct dram_info *priv)
 	}
 }
 
-static void move_to_access_state(struct dram_info *priv)
+void move_to_access_state(struct dram_info *priv)
 {
 	unsigned int state;
 
@@ -218,6 +257,8 @@ static void pctl_cfg(struct dram_info *priv,
 		     struct sdram_params *params_priv)
 {
 	u32 reg;
+	u32 burstlen;
+	u32 bl_mddr_lpddr2;
 
 	/* DFI config */
 	writel(DFI_DATA_BYTE_DISABLE_EN << DFI_DATA_BYTE_DISABLE_EN_SHIFT |
@@ -229,10 +270,6 @@ static void pctl_cfg(struct dram_info *priv,
 	       &priv->pctl->dfistcfg1);
 	writel(PARITY_EN << PARITY_EN_SHIFT |
 	       PARITY_INTR_EN << PARITY_INTR_EN_SHIFT, &priv->pctl->dfistcfg2);
-	writel(DFI_LP_EN_SR << DFI_LP_EN_SR_SHIFT |
-	       DFI_LP_WAKEUP_SR_32_CYCLES << DFI_LP_WAKEUP_SR_SHIFT |
-	       DFI_TLP_RESP << DFI_TLP_RESP_SHIFT,
-	       &priv->pctl->dfilpcfg0);
 
 	writel(TPHYUPD_TYPE0, &priv->pctl->dfitphyupdtype0);
 	writel(TPHY_RDLAT, &priv->pctl->dfitphyrdlat);
@@ -244,116 +281,160 @@ static void pctl_cfg(struct dram_info *priv,
 	copy_to_reg(&priv->pctl->togcnt1u,
 		    &(params_priv->ddr_timing_t.pctl_timing.togcnt1u),
 		    sizeof(struct pctl_timing));
-
-	writel((RANK0_ODT_WRITE_SEL << RANK0_ODT_WRITE_SEL_SHIFT |
-	       RANK1_ODT_WRITE_SEL << RANK1_ODT_WRITE_SEL_SHIFT),
-	       &priv->pctl->dfiodtcfg);
-
-	writel(ODT_LEN_BL8_W << ODT_LEN_BL8_W_SHIFT,
-	       &priv->pctl->dfiodtcfg1);
-
-	reg = readl(&priv->pctl->tcl);
-	writel((reg - 1) / 2 - 1, &priv->pctl->dfitrddataen);
-	reg = readl(&priv->pctl->tcwl);
-	writel((reg - 1) / 2 - 1, &priv->pctl->dfitphywrlat);
-
-	writel(params_priv->ddr_timing_t.pctl_timing.trsth, &priv->pctl->trsth);
-	writel(MDDR_LPDDR23_CLOCK_STOP_IDLE_DIS | DDR3_EN | MEM_BL_8 |
-	       TFAW_CFG_5_TDDR | PD_EXIT_SLOW_EXIT_MODE |
-	       PD_TYPE_ACT_PD | PD_IDLE_DISABLE, &priv->pctl->mcfg);
-
-	pctl_cfg_grf(priv);
+	/*
+	 * rv1108 phy is 1:2 mode, noc_timing.b.burstlen
+	 * have divide by scheuler clock, so need to * 4
+	 */
+	burstlen = params_priv->ddr_timing_t.noc_timing.b.burstlen * 4;
+
+	if (params_priv->ddr_config_t.ddr_type == DDR3 ||
+	    params_priv->ddr_config_t.ddr_type == DDR2) {
+		writel((RANK0_ODT_WRITE_SEL << RANK0_ODT_WRITE_SEL_SHIFT |
+		       RANK1_ODT_WRITE_SEL << RANK1_ODT_WRITE_SEL_SHIFT),
+		       &priv->pctl->dfiodtcfg);
+
+		writel(ODT_LEN_BL8_W << ODT_LEN_BL8_W_SHIFT,
+		       &priv->pctl->dfiodtcfg1);
+
+		writel(params_priv->ddr_timing_t.pctl_timing.trsth,
+		       &priv->pctl->trsth);
+		if (params_priv->ddr_config_t.ddr_type == DDR3)
+			writel(MDDR_LPDDR23_CLOCK_STOP_IDLE_DIS | DDR3_EN |
+			       MEM_BL_8 | TFAW_CFG_5_TDDR |
+			       PD_EXIT_SLOW_EXIT_MODE | PD_TYPE_ACT_PD |
+			       PD_IDLE_DISABLE |
+			       params_priv->ddr_2t_en << TWO_T_SHIFT,
+			       &priv->pctl->mcfg);
+		else if (burstlen == 8)
+			writel(MDDR_LPDDR23_CLOCK_STOP_IDLE_DIS | DDR2_EN |
+			       MEM_BL_8 | TFAW_CFG_5_TDDR |
+			       PD_EXIT_SLOW_EXIT_MODE | PD_TYPE_ACT_PD |
+			       PD_IDLE_DISABLE |
+			       params_priv->ddr_2t_en << TWO_T_SHIFT,
+			       &priv->pctl->mcfg);
+		else
+			writel(MDDR_LPDDR23_CLOCK_STOP_IDLE_DIS | DDR2_EN |
+			       MEM_BL_4 | TFAW_CFG_5_TDDR |
+			       PD_EXIT_SLOW_EXIT_MODE | PD_TYPE_ACT_PD |
+			       PD_IDLE_DISABLE |
+			       params_priv->ddr_2t_en << TWO_T_SHIFT,
+			       &priv->pctl->mcfg);
+		writel(DFI_LP_EN_SR << DFI_LP_EN_SR_SHIFT |
+		       DFI_LP_WAKEUP_SR_32_CYCLES << DFI_LP_WAKEUP_SR_SHIFT |
+		       DFI_TLP_RESP << DFI_TLP_RESP_SHIFT,
+		       &priv->pctl->dfilpcfg0);
+
+		reg = readl(&priv->pctl->tcl);
+		writel((reg - 1) / 2 - 1, &priv->pctl->dfitrddataen);
+		reg = readl(&priv->pctl->tcwl);
+		writel((reg - 1) / 2 - 1, &priv->pctl->dfitphywrlat);
+	} else {
+		if (burstlen == 4)
+			bl_mddr_lpddr2 = MDDR_LPDDR2_BL_4;
+		else
+			bl_mddr_lpddr2 = MDDR_LPDDR2_BL_8;
+		writel((RANK0_ODT_WRITE_DIS << RANK0_ODT_WRITE_SEL_SHIFT |
+		       RANK1_ODT_WRITE_DIS << RANK1_ODT_WRITE_SEL_SHIFT),
+		       &priv->pctl->dfiodtcfg);
+
+		writel(ODT_LEN_BL8_W_0 << ODT_LEN_BL8_W_SHIFT,
+		       &priv->pctl->dfiodtcfg1);
+
+		writel(0, &priv->pctl->trsth);
+		writel(MDDR_LPDDR23_CLOCK_STOP_IDLE_DIS | LPDDR2_EN |
+			LPDDR2_S4 | bl_mddr_lpddr2 |
+		       TFAW_CFG_6_TDDR | PD_EXIT_FAST_EXIT_MODE |
+		       PD_TYPE_ACT_PD | PD_IDLE_DISABLE, &priv->pctl->mcfg);
+		writel(DFI_LP_EN_SR << DFI_LP_EN_SR_SHIFT |
+		       DFI_LP_WAKEUP_SR_32_CYCLES << DFI_LP_WAKEUP_SR_SHIFT |
+		       DFI_TLP_RESP << DFI_TLP_RESP_SHIFT |
+		       DFI_LP_WAKEUP_PD_32_CYCLES << DFI_LP_WAKEUP_PD_SHIFT |
+		       DFI_LP_EN_PD,
+		       &priv->pctl->dfilpcfg0);
+
+		reg = readl(&priv->pctl->tcl);
+		writel(reg / 2 - 1, &priv->pctl->dfitrddataen);
+		reg = readl(&priv->pctl->tcwl);
+		writel(reg / 2 - 1, &priv->pctl->dfitphywrlat);
+	}
+	pctl_cfg_grf(priv, params_priv);
 	setbits_le32(&priv->pctl->scfg, HW_LOW_POWER_EN);
+
+	/* only support x16 memory */
+	clrsetbits_le32(&priv->pctl->ppcfg, PPMEM_EN_MASK, PPMEM_EN);
 }
 
 static void phy_cfg(struct dram_info *priv,
 		    struct sdram_params *params_priv)
 {
-	writel((readl(&priv->service_msch->ddrtiming) & BWRATIO_HALF_BW)|
-	       params_priv->ddr_timing_t.noc_timing,
-	       &priv->service_msch->ddrtiming);
-	writel(params_priv->ddr_timing_t.readlatency,
-	       &priv->service_msch->readlatency);
-	writel(params_priv->ddr_timing_t.activate,
-	       &priv->service_msch->activate);
-	writel(params_priv->ddr_timing_t.devtodev,
-	       &priv->service_msch->devtodev);
-
-	writel(MEMORY_SELECT_DDR3 | PHY_BL_8, &priv->phy->phy_reg1);
+	u32 burstlen;
+
+	burstlen = params_priv->ddr_timing_t.noc_timing.b.burstlen * 4;
+	burstlen = (burstlen == 4) ? PHY_BL_4 : PHY_BL_8;
+	ddr_msch_cfg(priv, params_priv);
+	ddr_phy_skew_cfg(priv);
+	switch (params_priv->ddr_config_t.ddr_type) {
+	case DDR2:
+		writel(MEMORY_SELECT_DDR2 | PHY_BL_8, &priv->phy->phy_reg1);
+		break;
+	case DDR3:
+		writel(MEMORY_SELECT_DDR3 | PHY_BL_8, &priv->phy->phy_reg1);
+		break;
+	case LPDDR2:
+	default:
+		writel(MEMORY_SELECT_LPDDR2 | burstlen, &priv->phy->phy_reg1);
+		break;
+	}
 
 	writel(params_priv->ddr_timing_t.phy_timing.cl_al,
 	       &priv->phy->phy_regb);
 	writel(params_priv->ddr_timing_t.pctl_timing.tcwl,
 	       &priv->phy->phy_regc);
 
-	writel(PHY_RON_RTT_34OHM, &priv->phy->phy_reg11);
-	clrsetbits_le32(&priv->phy->phy_reg12, CMD_PRCOMP_MASK,
-			PHY_RON_RTT_34OHM << CMD_PRCOMP_SHIFT);
-	writel(PHY_RON_RTT_45OHM, &priv->phy->phy_reg16);
-	writel(PHY_RON_RTT_45OHM, &priv->phy->phy_reg18);
-	writel(PHY_RON_RTT_34OHM, &priv->phy->phy_reg20);
-	writel(PHY_RON_RTT_34OHM, &priv->phy->phy_reg2f);
-	writel(PHY_RON_RTT_34OHM, &priv->phy->phy_reg30);
-	writel(PHY_RON_RTT_34OHM, &priv->phy->phy_reg3f);
-	writel(PHY_RON_RTT_225OHM, &priv->phy->phy_reg21);
-	writel(PHY_RON_RTT_225OHM, &priv->phy->phy_reg2e);
-	writel(PHY_RON_RTT_225OHM, &priv->phy->phy_reg31);
-	writel(PHY_RON_RTT_225OHM, &priv->phy->phy_reg3e);
+	set_ds_odt(priv, params_priv);
+
+	/* only support x16 memory */
+	clrsetbits_le32(&priv->phy->phy_reg0, DQ_16BIT_EN_MASK,
+			DQ_16BIT_EN);
 }
 
 static void dram_cfg_rbc(struct dram_info *priv,
 			 struct sdram_params *params_priv)
 {
-	int i = 0;
-
 	move_to_config_state(priv);
-#if defined(CONFIG_ROCKCHIP_RV1108)
-	if (params_priv->ddr_config.col == 10)
-		i = 2;
-	else
-		i = 3;
-#elif defined(CONFIG_ROCKCHIP_RK3308)
-
-#endif
-	writel(i, &priv->service_msch->ddrconf);
+	ddr_msch_cfg_rbc(params_priv, priv);
 	move_to_access_state(priv);
 }
 
-static void enable_low_power(struct dram_info *priv)
-{
-	move_to_config_state(priv);
-
-	clrsetbits_le32(&priv->pctl->mcfg, PD_IDLE_MASK,
-			PD_IDLE << PD_IDLE_SHIFT);
-	clrsetbits_le32(&priv->pctl->mcfg1, SR_IDLE_MASK | HW_EXIT_IDLE_EN_MASK,
-			SR_IDLE | HW_EXIT_IDLE_EN);
-
-	/* uPCTL in low_power status because of auto self-refreh */
-	writel(GO_STATE, &priv->pctl->sctl);
-}
-
 static void data_training(struct dram_info *priv)
 {
 	u32 value;
 	u32 tmp = 0;
+	u32 tmp1 = 0;
+	u32 timeout = 1000;
 
 	/* disable auto refresh */
 	value = readl(&priv->pctl->trefi);
 	writel(UPD_REF, &priv->pctl->trefi);
 
-	writel(DQS_GATE_TRAINING_SEL_CS0 | DQS_GATE_TRAINING_DIS,
+	tmp1 = readl(&priv->phy->phy_reg2);
+
+	writel(DQS_GATE_TRAINING_SEL_CS0 | DQS_GATE_TRAINING_DIS | tmp1,
 	       &priv->phy->phy_reg2);
-	writel(DQS_GATE_TRAINING_SEL_CS0 | DQS_GATE_TRAINING_ACT,
+	writel(DQS_GATE_TRAINING_SEL_CS0 | DQS_GATE_TRAINING_ACT | tmp1,
 	       &priv->phy->phy_reg2);
 
-	/* delay untill data training done */
+		/* delay until data training done */
 	while (tmp != (CHN_A_HIGH_8BIT_TRAINING_DONE |
 	       CHN_A_LOW_8BIT_TRAINING_DONE)) {
 		udelay(1);
 		tmp = (readl(&priv->phy->phy_regff) & CHN_A_TRAINING_DONE_MASK);
+		timeout--;
+		if (!timeout)
+			break;
 	}
 
-	writel(DQS_GATE_TRAINING_SEL_CS0 | DQS_GATE_TRAINING_DIS,
+	writel(DQS_GATE_TRAINING_SEL_CS0 | DQS_GATE_TRAINING_DIS | tmp1,
 	       &priv->phy->phy_reg2);
 
 	send_command(priv, RANK_SEL_CS0_CS1, PREA_CMD, 0);
@@ -361,78 +442,165 @@ static void data_training(struct dram_info *priv)
 	writel(value | UPD_REF, &priv->pctl->trefi);
 }
 
-static u32 sdram_detect(struct dram_info *priv,
+static int sdram_detect(struct dram_info *priv,
 			struct sdram_params *params_priv)
 {
-	u32 row, col, row_max, col_max;
-	u32 test_addr;
+	u32 row, col, row_max, col_max, bank_max;
+	u32 bw = 1;
+	phys_addr_t test_addr;
+	struct ddr_schedule ddr_sch;
 
-	move_to_config_state(priv);
-#if defined(CONFIG_ROCKCHIP_RV1108)
-	writel(1, &priv->service_msch->ddrconf);
-	col_max = 11;
-	row_max = 16;
-#elif defined(CONFIG_ROCKCHIP_RK3308)
+	/* if col detect wrong,row needs initial */
+	row = 0;
 
-#endif
+	/* detect col */
+	move_to_config_state(priv);
+	ddr_msch_get_max_col(priv, &ddr_sch);
+	col_max = ddr_sch.col;
+	bank_max = ddr_sch.bank;
 	move_to_access_state(priv);
 
-	/* detect col */
 	for (col = col_max; col >= 10; col--) {
-		writel(0, SDRAM_BEGIN_ADDR);
-		test_addr = SDRAM_BEGIN_ADDR + (1u << (col +
-				params_priv->ddr_config.bw - 1u));
+		writel(0, CONFIG_SYS_SDRAM_BASE);
+		test_addr = (phys_addr_t)(CONFIG_SYS_SDRAM_BASE +
+		    (1ul << (col + bw - 1ul)));
 		writel(PATTERN, test_addr);
 		if ((readl(test_addr) == PATTERN) &&
-		    (readl(SDRAM_BEGIN_ADDR) == 0))
-				break;
+		    (readl(CONFIG_SYS_SDRAM_BASE) == 0))
+			break;
 	}
-	if (col <= 8)
+	if (col <= 9)
 		goto cap_err;
-	params_priv->ddr_config.col = col;
+	params_priv->ddr_config_t.col = col;
+
+	if (params_priv->ddr_config_t.ddr_type == DDR3) {
+		params_priv->ddr_config_t.bank = 3;
+	} else {
+		writel(0, CONFIG_SYS_SDRAM_BASE);
+		test_addr = (phys_addr_t)(CONFIG_SYS_SDRAM_BASE +
+		    (1ul << (bank_max + col_max +
+		    bw - 1ul)));
+		writel(PATTERN, test_addr);
+		if ((readl(test_addr) == PATTERN) &&
+		    (readl(CONFIG_SYS_SDRAM_BASE) == 0))
+			params_priv->ddr_config_t.bank = 3;
+		else
+			params_priv->ddr_config_t.bank = 2;
+	}
 
 	/* detect row */
-	col = col_max;
+	move_to_config_state(priv);
+	ddr_msch_get_max_row(priv, &ddr_sch);
+	move_to_access_state(priv);
+	col_max = ddr_sch.col;
+	row_max = ddr_sch.row;
+
 	for (row = row_max; row >= 12; row--) {
-		writel(0, SDRAM_BEGIN_ADDR);
-		test_addr = SDRAM_BEGIN_ADDR + (1u << (row +
-				params_priv->ddr_config.bank + col +
-				params_priv->ddr_config.bw - 1u));
+		writel(0, CONFIG_SYS_SDRAM_BASE);
+		test_addr = (phys_addr_t)(CONFIG_SYS_SDRAM_BASE +
+				(1ul << (row + bank_max +
+				col_max + bw - 1ul)));
+
 		writel(PATTERN, test_addr);
 		if ((readl(test_addr) == PATTERN) &&
-		    (readl(SDRAM_BEGIN_ADDR) == 0))
+		    (readl(CONFIG_SYS_SDRAM_BASE) == 0))
 			break;
 	}
 	if (row <= 11)
 		goto cap_err;
-	params_priv->ddr_config.cs0_row = row;
+	params_priv->ddr_config_t.cs0_row = row;
 	return 0;
 cap_err:
-	return 1;
+	return -EAGAIN;
 }
 
+#define DDR_VERSION	0x2
+
 static void sdram_all_config(struct dram_info *priv,
 			     struct sdram_params *params_priv)
 {
+	u32 version = DDR_VERSION;
 	u32 os_reg = 0;
-	u32 cs1_row = 0;
-
-	if (params_priv->ddr_config.rank > 1)
-		cs1_row = params_priv->ddr_config.cs1_row - 13;
-
-	os_reg = params_priv->ddr_config.ddr_type << SYS_REG_DDRTYPE_SHIFT |
-		 params_priv->ddr_config.chn_cnt << SYS_REG_NUM_CH_SHIFT |
-		 (params_priv->ddr_config.rank - 1) << SYS_REG_RANK_SHIFT(0) |
-		 (params_priv->ddr_config.col - 9) << SYS_REG_COL_SHIFT(0) |
-		 (params_priv->ddr_config.bank == 3 ? 0 : 1) <<
-		 SYS_REG_BK_SHIFT(0) |
-		 (params_priv->ddr_config.cs0_row - 13) <<
-		 SYS_REG_CS0_ROW_SHIFT(0) |
-		 cs1_row << SYS_REG_CS1_ROW_SHIFT(0) |
-		 params_priv->ddr_config.bw << SYS_REG_BW_SHIFT(0) |
-		 params_priv->ddr_config.dbw << SYS_REG_DBW_SHIFT(0);
+	u32 row_12 = 0;
+	u32 ddr_info = 0;
+	/* rk3308,rv1108 only support 1 channel, x16 ddr bus, x16 memory */
+	u32 chn_cnt = 0;
+	u32 rank = 1;
+	u32 bw = 1;
+	u32 dbw = 1;
+	size_t size = 0;
+	struct ddr_param ddr_param;
+
+	/* os_reg2 */
+	os_reg = (params_priv->ddr_config_t.ddr_type & SYS_REG_DDRTYPE_MASK) <<
+		 SYS_REG_DDRTYPE_SHIFT |
+		 (chn_cnt & SYS_REG_NUM_CH_MASK) <<
+		 SYS_REG_NUM_CH_SHIFT |
+		 ((rank - 1) & SYS_REG_RANK_MASK) <<
+		 SYS_REG_RANK_SHIFT(0) |
+		 ((params_priv->ddr_config_t.col - 9) & SYS_REG_COL_MASK) <<
+		 SYS_REG_COL_SHIFT(0) |
+		 ((params_priv->ddr_config_t.bank == 3 ? 0 : 1) &
+		 SYS_REG_BK_MASK) << SYS_REG_BK_SHIFT(0) |
+		 ((params_priv->ddr_config_t.cs0_row - 13) &
+		 SYS_REG_CS0_ROW_MASK) << SYS_REG_CS0_ROW_SHIFT(0) |
+		 (bw & SYS_REG_BW_MASK) <<
+		 SYS_REG_BW_SHIFT(0) |
+		 (dbw & SYS_REG_DBW_MASK) <<
+		 SYS_REG_DBW_SHIFT(0);
 
 	writel(os_reg, &priv->grf->os_reg2);
+
+	/* os_reg3 */
+	if (params_priv->ddr_config_t.cs0_row == 12)
+		row_12 = 1;
+	os_reg = (version & SYS_REG1_VERSION_MASK) <<
+		 SYS_REG1_VERSION_SHIFT | (row_12 &
+		 SYS_REG1_EXTEND_CS0_ROW_MASK) <<
+		 SYS_REG1_EXTEND_CS0_ROW_SHIFT(0);
+	writel(os_reg, &priv->grf->os_reg3);
+
+	printascii("In\n");
+	printdec(params_priv->ddr_timing_t.freq);
+	printascii("MHz\n");
+	switch (params_priv->ddr_config_t.ddr_type & SYS_REG_DDRTYPE_MASK) {
+	case 2:
+		printascii("DDR2\n");
+		break;
+	case 5:
+		printascii("LPDDR2\n");
+		break;
+	case 3:
+	default:
+		printascii("DDR3\n");
+		break;
+	}
+	printascii(" Col=");
+	printdec(params_priv->ddr_config_t.col);
+	printascii(" Bank=");
+	printdec(params_priv->ddr_config_t.bank);
+	printascii(" Row=");
+	printdec(params_priv->ddr_config_t.cs0_row);
+
+	size = 1llu << (bw +
+	       params_priv->ddr_config_t.col +
+	       params_priv->ddr_config_t.cs0_row +
+	       params_priv->ddr_config_t.bank);
+	ddr_info = size >> 20;
+	printascii(" Size=");
+	printdec(ddr_info);
+	printascii("MB\n");
+	printascii("msch:");
+	ddr_info = readl(&priv->service_msch->ddrconf);
+	printdec(ddr_info);
+	printascii("\n");
+
+	priv->info.base = CONFIG_SYS_SDRAM_BASE;
+	priv->info.size = size;
+	ddr_param.count = 1;
+	ddr_param.para[0] = priv->info.base;
+	ddr_param.para[1] = priv->info.size;
+	rockchip_setup_ddr_param(&ddr_param);
 }
 
 int rv1108_sdram_init(struct dram_info *sdram_priv,
@@ -445,23 +613,28 @@ int rv1108_sdram_init(struct dram_info *sdram_priv,
 	phy_dll_bypass_set(sdram_priv, params_priv->ddr_timing_t.freq);
 	pctl_cfg(sdram_priv, params_priv);
 	phy_cfg(sdram_priv, params_priv);
-
 	writel(POWER_UP_START, &sdram_priv->pctl->powctl);
 	while (!(readl(&sdram_priv->pctl->powstat) & POWER_UP_DONE))
 		;
 
 	memory_init(sdram_priv, params_priv);
+re_training:
 	move_to_config_state(sdram_priv);
-	set_bw(sdram_priv, params_priv);
 	data_training(sdram_priv);
 	move_to_access_state(sdram_priv);
 	if (sdram_detect(sdram_priv, params_priv)) {
 		while (1)
 			;
 	}
+	if (check_rd_gate(sdram_priv))
+		goto re_training;
+
+	/* workaround data training not in middle */
+	modify_data_training(sdram_priv, params_priv);
+
 	dram_cfg_rbc(sdram_priv, params_priv);
 	sdram_all_config(sdram_priv, params_priv);
-	enable_low_power(sdram_priv);
+	enable_low_power(sdram_priv, params_priv);
 
 	return 0;
 }

commit ad11931911215d18164616400081261330f95b4e
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Fri Sep 25 10:02:32 2020 +0800

    rockchip: tpl: add arch_cpu_init()
    
    The arch_cpu_init() should be called for cpu early init
    for tpl.
    
    Change-Id: I3aad0f284089d8523710a2d24daab44995fa148d
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk322x/rk322x.c b/arch/arm/mach-rockchip/rk322x/rk322x.c
index 57a3d59a44..8396eac7d0 100644
--- a/arch/arm/mach-rockchip/rk322x/rk322x.c
+++ b/arch/arm/mach-rockchip/rk322x/rk322x.c
@@ -17,6 +17,7 @@ const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
 	[BROM_BOOTSOURCE_SD] = "/dwmmc@30000000",
 };
 
+#ifndef CONFIG_TPL_BUILD
 int arch_cpu_init(void)
 {
 	static struct rk322x_grf * const grf = (void *)GRF_BASE;
@@ -49,6 +50,7 @@ int arch_cpu_init(void)
 
 	return 0;
 }
+#endif
 
 void board_debug_uart_init(void)
 {
diff --git a/arch/arm/mach-rockchip/rk3288/rk3288.c b/arch/arm/mach-rockchip/rk3288/rk3288.c
index 8fcc9c10c9..71e9868638 100644
--- a/arch/arm/mach-rockchip/rk3288/rk3288.c
+++ b/arch/arm/mach-rockchip/rk3288/rk3288.c
@@ -41,6 +41,7 @@ const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
 	[BROM_BOOTSOURCE_SD] = "/dwmmc@ff0c0000",
 };
 
+#ifndef CONFIG_TPL_BUILD
 #ifdef CONFIG_SPL_BUILD
 static void configure_l2ctlr(void)
 {
@@ -87,9 +88,9 @@ int arch_cpu_init(void)
 	writel(CPU_AXI_QOS_PRIORITY_LEVEL(2, 2), VIO0_VOP_QOS_BASE);
 	writel(CPU_AXI_QOS_PRIORITY_LEVEL(2, 2), VIO1_VOP_QOS_BASE);
 #endif
-
 	return 0;
 }
+#endif
 
 void board_debug_uart_init(void)
 {
diff --git a/arch/arm/mach-rockchip/rk3328/rk3328.c b/arch/arm/mach-rockchip/rk3328/rk3328.c
index 8ff075f46b..b16b4cee6c 100644
--- a/arch/arm/mach-rockchip/rk3328/rk3328.c
+++ b/arch/arm/mach-rockchip/rk3328/rk3328.c
@@ -47,6 +47,8 @@ const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
 	[BROM_BOOTSOURCE_EMMC] = "/rksdmmc@ff520000",
 	[BROM_BOOTSOURCE_SD] = "/rksdmmc@ff500000",
 };
+
+#ifndef CONFIG_TPL_BUILD
 int arch_cpu_init(void)
 {
 #ifdef CONFIG_SPL_BUILD
@@ -66,6 +68,7 @@ int arch_cpu_init(void)
 #endif
 	return 0;
 }
+#endif
 
 void board_debug_uart_init(void)
 {
diff --git a/arch/arm/mach-rockchip/rk3368/rk3368.c b/arch/arm/mach-rockchip/rk3368/rk3368.c
index 46e63c9d7f..cb79845d01 100644
--- a/arch/arm/mach-rockchip/rk3368/rk3368.c
+++ b/arch/arm/mach-rockchip/rk3368/rk3368.c
@@ -124,6 +124,73 @@ int arch_early_init_r(void)
 }
 #endif
 
+void board_debug_uart_init(void)
+{
+	/*
+	 * N.B.: This is called before the device-model has been
+	 *       initialised. For this reason, we can not access
+	 *       the GRF address range using the syscon API.
+	 */
+	struct rk3368_grf * const grf __maybe_unused =
+		(struct rk3368_grf * const)0xff770000;
+
+	enum {
+		/* UART0 */
+		GPIO2D1_MASK            = GENMASK(3, 2),
+		GPIO2D1_GPIO            = 0,
+		GPIO2D1_UART0_SOUT      = (1 << 2),
+
+		GPIO2D0_MASK            = GENMASK(1, 0),
+		GPIO2D0_GPIO            = 0,
+		GPIO2D0_UART0_SIN       = (1 << 0),
+
+		/* UART2 */
+		GPIO2A6_MASK		= GENMASK(13, 12),
+		GPIO2A6_GPIO		= 0,
+		GPIO2A6_UART0_SIN      = (1 << 13),
+		GPIO2A6_UART2_SIN	= (2 << 12),
+
+		GPIO2A5_MASK		= GENMASK(11, 10),
+		GPIO2A5_GPIO		= 0,
+		GPIO2A5_UART0_SOUT	 = (1 << 11),
+		GPIO2A5_UART2_SOUT      = (2 << 10),
+	};
+
+#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000)
+	/* Enable early UART0 on the RK3368 */
+	rk_clrsetreg(&grf->gpio2d_iomux,
+		     GPIO2D0_MASK, GPIO2D0_UART0_SIN);
+	rk_clrsetreg(&grf->gpio2d_iomux,
+		     GPIO2D1_MASK, GPIO2D1_UART0_SOUT);
+#elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff1c0000)
+	struct rk3368_pmu_grf * const pmugrf __maybe_unused =
+		(struct rk3368_pmu_grf * const)0xff738000;
+
+	enum {
+		/* UART4 */
+		GPIO0D2_MASK		= GENMASK(5, 4),
+		GPIO0D2_GPIO		= 0,
+		GPIO0D2_UART4_SOUT	= (3 << 4),
+
+		GPIO0D3_MASK		= GENMASK(7, 6),
+		GPIO0D3_GPIO		= 0,
+		GPIO0D3_UART4_SIN	= (3 << 6),
+	};
+
+	/* Enable early UART4 on the PX5 */
+	rk_clrsetreg(&pmugrf->gpio0d_iomux,
+		     GPIO0D2_MASK | GPIO0D3_MASK,
+		     GPIO0D2_UART4_SOUT | GPIO0D3_UART4_SIN);
+#elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff690000)
+	/* Enable early UART2 on the RK3368 */
+	rk_clrsetreg(&grf->gpio2a_iomux,
+		     GPIO2A6_MASK, GPIO2A6_UART2_SIN);
+	rk_clrsetreg(&grf->gpio2a_iomux,
+		     GPIO2A5_MASK, GPIO2A5_UART2_SOUT);
+#endif
+}
+
+#ifndef CONFIG_TPL_BUILD
 static void cpu_axi_qos_prority_level_config(void)
 {
 	u32 level;
@@ -218,72 +285,6 @@ static void sgrf_init(void)
 }
 #endif
 
-void board_debug_uart_init(void)
-{
-	/*
-	 * N.B.: This is called before the device-model has been
-	 *       initialised. For this reason, we can not access
-	 *       the GRF address range using the syscon API.
-	 */
-	struct rk3368_grf * const grf __maybe_unused =
-		(struct rk3368_grf * const)0xff770000;
-
-	enum {
-		/* UART0 */
-		GPIO2D1_MASK            = GENMASK(3, 2),
-		GPIO2D1_GPIO            = 0,
-		GPIO2D1_UART0_SOUT      = (1 << 2),
-
-		GPIO2D0_MASK            = GENMASK(1, 0),
-		GPIO2D0_GPIO            = 0,
-		GPIO2D0_UART0_SIN       = (1 << 0),
-
-		/* UART2 */
-		GPIO2A6_MASK		= GENMASK(13, 12),
-		GPIO2A6_GPIO		= 0,
-		GPIO2A6_UART0_SIN      = (1 << 13),
-		GPIO2A6_UART2_SIN	= (2 << 12),
-
-		GPIO2A5_MASK		= GENMASK(11, 10),
-		GPIO2A5_GPIO		= 0,
-		GPIO2A5_UART0_SOUT	 = (1 << 11),
-		GPIO2A5_UART2_SOUT      = (2 << 10),
-	};
-
-#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000)
-	/* Enable early UART0 on the RK3368 */
-	rk_clrsetreg(&grf->gpio2d_iomux,
-		     GPIO2D0_MASK, GPIO2D0_UART0_SIN);
-	rk_clrsetreg(&grf->gpio2d_iomux,
-		     GPIO2D1_MASK, GPIO2D1_UART0_SOUT);
-#elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff1c0000)
-	struct rk3368_pmu_grf * const pmugrf __maybe_unused =
-		(struct rk3368_pmu_grf * const)0xff738000;
-
-	enum {
-		/* UART4 */
-		GPIO0D2_MASK		= GENMASK(5, 4),
-		GPIO0D2_GPIO		= 0,
-		GPIO0D2_UART4_SOUT	= (3 << 4),
-
-		GPIO0D3_MASK		= GENMASK(7, 6),
-		GPIO0D3_GPIO		= 0,
-		GPIO0D3_UART4_SIN	= (3 << 6),
-	};
-
-	/* Enable early UART4 on the PX5 */
-	rk_clrsetreg(&pmugrf->gpio0d_iomux,
-		     GPIO0D2_MASK | GPIO0D3_MASK,
-		     GPIO0D2_UART4_SOUT | GPIO0D3_UART4_SIN);
-#elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff690000)
-	/* Enable early UART2 on the RK3368 */
-	rk_clrsetreg(&grf->gpio2a_iomux,
-		     GPIO2A6_MASK, GPIO2A6_UART2_SIN);
-	rk_clrsetreg(&grf->gpio2a_iomux,
-		     GPIO2A5_MASK, GPIO2A5_UART2_SOUT);
-#endif
-}
-
 int arch_cpu_init(void)
 {
 	/* DDR read latency config */
@@ -308,3 +309,4 @@ int arch_cpu_init(void)
 
 	return 0;
 }
+#endif
diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c
index 71f5f1fd84..f59b31e22a 100644
--- a/arch/arm/mach-rockchip/rk3399/rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
@@ -76,6 +76,7 @@ void rockchip_stimer_init(void)
 #define NIU_PERILP_NSP_ADDR	0xffad8188
 #define QOS_PRIORITY_LEVEL(h, l)	((((h) & 3) << 8) | ((l) & 3))
 
+#ifndef CONFIG_TPL_BUILD
 int arch_cpu_init(void)
 {
 	struct rk3399_pmugrf_regs *pmugrf = (void *)PMUGRF_BASE;
@@ -118,6 +119,7 @@ int arch_cpu_init(void)
 
 	return 0;
 }
+#endif
 
 void board_debug_uart_init(void)
 {
diff --git a/arch/arm/mach-rockchip/rv1126/rv1126.c b/arch/arm/mach-rockchip/rv1126/rv1126.c
index 5c1ae0b359..ffdf0f4815 100644
--- a/arch/arm/mach-rockchip/rv1126/rv1126.c
+++ b/arch/arm/mach-rockchip/rv1126/rv1126.c
@@ -536,6 +536,7 @@ void board_debug_uart_init(void)
 #endif /* CONFIG_DEBUG_UART_BASE && CONFIG_DEBUG_UART_BASE == ... */
 }
 
+#ifndef CONFIG_TPL_BUILD
 int arch_cpu_init(void)
 {
 	/*
@@ -688,9 +689,9 @@ int arch_cpu_init(void)
 	/* GPIO0_D6 pull down in default, pull up it for SPI Flash */
 	writel(((0x3 << 12) << 16) | (0x1 << 12), GRF1_GPIO0D_P);
 #endif
-
 	return 0;
 }
+#endif
 
 #ifdef CONFIG_SPL_BUILD
 int spl_fit_standalone_release(uintptr_t entry_point)
diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c
index a6676e483a..73e4ed386c 100644
--- a/arch/arm/mach-rockchip/tpl.c
+++ b/arch/arm/mach-rockchip/tpl.c
@@ -114,6 +114,11 @@ __weak void rockchip_stimer_init(void)
 	writel(1, CONFIG_ROCKCHIP_STIMER_BASE + 0x10);
 }
 
+__weak int arch_cpu_init(void)
+{
+	return 0;
+}
+
 void board_init_f(ulong dummy)
 {
 #if defined(CONFIG_SPL_FRAMEWORK) && !CONFIG_IS_ENABLED(TINY_FRAMEWORK)
@@ -122,6 +127,7 @@ void board_init_f(ulong dummy)
 #endif
 
 	rockchip_stimer_init();
+	arch_cpu_init();
 #define EARLY_DEBUG
 #ifdef EARLY_DEBUG
 	/*

commit 7329ce5782820c78ea75fd091d8d3cda9f7d6bbc
Author: Ren Jianing <jianing.ren@rock-chips.com>
Date:   Sat Nov 14 16:11:27 2020 +0800

    phy: rockchip-inno-usb2: fix some issues for rk3568 usb2 phy
    
    This patch fixes the following issues for rk3568 usb2 phy.
    
    1. Set utmi opmode to normal mode for rk3568 usb phy when usb
    phy enter suspend mode via usb phy grf. It can help to avoid
    the DM/DP floating and the line state be detected as 2'b11.
    
    2. Fix the offset of INT_STATUS_CLR. It can help to avoid
    triggering the linestate irq constantly.
    
    Signed-off-by: Ren Jianing <jianing.ren@rock-chips.com>
    Change-Id: Ic108e116d1473341b61743ec4244bc034a95f501

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index a6d8c8cf4f..99f6c33714 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -1058,7 +1058,7 @@ static const struct rockchip_usb2phy_cfg rk3568_phy_cfgs[] = {
 		.clkout_ctl	= { 0x0008, 4, 4, 1, 0 },
 		.port_cfgs	= {
 			[USB2PHY_PORT_OTG] = {
-				.phy_sus	= { 0x0000, 8, 0, 0, 0x1d1 },
+				.phy_sus	= { 0x0000, 8, 0, 0x052, 0x1d1 },
 				.bvalid_det_en	= { 0x0080, 2, 2, 0, 1 },
 				.bvalid_det_st	= { 0x0084, 2, 2, 0, 1 },
 				.bvalid_det_clr = { 0x0088, 2, 2, 0, 1 },
@@ -1066,23 +1066,23 @@ static const struct rockchip_usb2phy_cfg rk3568_phy_cfgs[] = {
 				.iddig_en	= { 0x0000, 9, 9, 0, 1 },
 				.idfall_det_en	= { 0x0080, 5, 5, 0, 1 },
 				.idfall_det_st	= { 0x0084, 5, 5, 0, 1 },
-				.idfall_det_clr = { 0x008c, 5, 5, 0, 1 },
+				.idfall_det_clr = { 0x0088, 5, 5, 0, 1 },
 				.idrise_det_en	= { 0x0080, 4, 4, 0, 1 },
 				.idrise_det_st	= { 0x0084, 4, 4, 0, 1 },
-				.idrise_det_clr = { 0x008c, 4, 4, 0, 1 },
+				.idrise_det_clr = { 0x0088, 4, 4, 0, 1 },
 				.ls_det_en	= { 0x0080, 0, 0, 0, 1 },
 				.ls_det_st	= { 0x0084, 0, 0, 0, 1 },
-				.ls_det_clr	= { 0x008c, 0, 0, 0, 1 },
+				.ls_det_clr	= { 0x0088, 0, 0, 0, 1 },
 				.utmi_avalid	= { 0x00c0, 10, 10, 0, 1 },
 				.utmi_bvalid	= { 0x00c0, 9, 9, 0, 1 },
 				.utmi_iddig	= { 0x00c0, 6, 6, 0, 1 },
 				.utmi_ls	= { 0x00c0, 5, 4, 0, 1 },
 			},
 			[USB2PHY_PORT_HOST] = {
-				.phy_sus	= { 0x0004, 8, 0, 0, 0x1d1 },
+				.phy_sus	= { 0x0004, 8, 0, 0x1d2, 0x1d1 },
 				.ls_det_en	= { 0x0080, 1, 1, 0, 1 },
 				.ls_det_st	= { 0x0084, 1, 1, 0, 1 },
-				.ls_det_clr	= { 0x008c, 1, 1, 0, 1 },
+				.ls_det_clr	= { 0x0088, 1, 1, 0, 1 },
 				.utmi_ls	= { 0x00c0, 17, 16, 0, 1 },
 				.utmi_hstdet	= { 0x00c0, 19, 19, 0, 1 }
 			}
@@ -1106,18 +1106,18 @@ static const struct rockchip_usb2phy_cfg rk3568_phy_cfgs[] = {
 		.clkout_ctl	= { 0x0008, 4, 4, 1, 0 },
 		.port_cfgs	= {
 			[USB2PHY_PORT_OTG] = {
-				.phy_sus	= { 0x0000, 8, 0, 0, 0x1d1 },
+				.phy_sus	= { 0x0000, 8, 0, 0x1d2, 0x1d1 },
 				.ls_det_en	= { 0x0080, 0, 0, 0, 1 },
 				.ls_det_st	= { 0x0084, 0, 0, 0, 1 },
-				.ls_det_clr	= { 0x008c, 0, 0, 0, 1 },
+				.ls_det_clr	= { 0x0088, 0, 0, 0, 1 },
 				.utmi_ls	= { 0x00c0, 5, 4, 0, 1 },
 				.utmi_hstdet	= { 0x00c0, 7, 7, 0, 1 }
 			},
 			[USB2PHY_PORT_HOST] = {
-				.phy_sus	= { 0x0004, 8, 0, 0, 0x1d1 },
+				.phy_sus	= { 0x0004, 8, 0, 0x1d2, 0x1d1 },
 				.ls_det_en	= { 0x0080, 1, 1, 0, 1 },
 				.ls_det_st	= { 0x0084, 1, 1, 0, 1 },
-				.ls_det_clr	= { 0x008c, 1, 1, 0, 1 },
+				.ls_det_clr	= { 0x0088, 1, 1, 0, 1 },
 				.utmi_ls	= { 0x00c0, 17, 16, 0, 1 },
 				.utmi_hstdet	= { 0x00c0, 19, 19, 0, 1 }
 			}

commit 802c460a7219f47df996a305062769d79a21cf25
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Mon Nov 16 10:01:15 2020 +0800

    clk: rockchip: rk3568: support ppll setting 200M
    
    Change-Id: If5d4d1994956a8e18f3208a22daee6efca80950b
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3568.c b/drivers/clk/rockchip/clk_rk3568.c
index 29ebe3dca7..c34bfc5dd2 100644
--- a/drivers/clk/rockchip/clk_rk3568.c
+++ b/drivers/clk/rockchip/clk_rk3568.c
@@ -57,7 +57,7 @@ static struct rockchip_pll_rate_table rk3568_pll_rates[] = {
 	RK3036_PLL_RATE(594000000, 1, 99, 4, 1, 1, 0),
 	RK3036_PLL_RATE(500000000, 1, 125, 6, 1, 1, 0),
 	RK3036_PLL_RATE(408000000, 1, 68, 2, 2, 1, 0),
-	RK3036_PLL_RATE(200000000, 1, 200, 6, 4, 1, 0),
+	RK3036_PLL_RATE(200000000, 1, 100, 6, 2, 1, 0),
 	RK3036_PLL_RATE(100000000, 1, 150, 6, 6, 1, 0),
 	{ /* sentinel */ },
 };
@@ -418,10 +418,14 @@ static ulong rk3568_pmuclk_set_rate(struct clk *clk, ulong rate)
 	case PLL_PPLL:
 		ret = rockchip_pll_set_rate(&rk3568_pll_clks[PPLL],
 					    priv->pmucru, PPLL, rate);
+		priv->ppll_hz = rockchip_pll_get_rate(&rk3568_pll_clks[PPLL],
+						      priv->pmucru, PPLL);
 		break;
 	case PLL_HPLL:
 		ret = rockchip_pll_set_rate(&rk3568_pll_clks[HPLL],
 					    priv->pmucru, HPLL, rate);
+		priv->hpll_hz = rockchip_pll_get_rate(&rk3568_pll_clks[HPLL],
+						      priv->pmucru, HPLL);
 		break;
 	case CLK_RTC_32K:
 	case CLK_RTC32K_FRAC:

commit 458cbae45a72fc78093c86e3941ca3bd3ff2ab7a
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Nov 14 10:38:58 2020 +0800

    power: rockchip-io-domain: Use private write for rk3568
    
    The i2c5 xfer went wrong because of io-domain was not right
    and was configured correctly in uboot to ensure that kernel
    was right before initializing the io-domain driver.
    
    Change-Id: Ic2f94952f7a851dc5b781af9f31bba2562b5a2b5
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/power/io-domain/rockchip-io-domain.c b/drivers/power/io-domain/rockchip-io-domain.c
index 53b3a448a6..349d2710c0 100644
--- a/drivers/power/io-domain/rockchip-io-domain.c
+++ b/drivers/power/io-domain/rockchip-io-domain.c
@@ -619,7 +619,7 @@ static int rockchip_iodomain_probe(struct udevice *dev)
 		supply->iod = priv;
 		supply->reg = reg;
 
-		ret = rockchip_iodomain_write(supply, uV);
+		ret = priv->write(supply, uV);
 		if (ret)
 			supply->reg = NULL;
 	}

commit ede15112c2acbdac24723f9952d925c169161654
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Nov 14 08:56:46 2020 +0000

    scripts: fit-msg.sh: read components image message
    
    Support get commit version of components image.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ic279ed457949a98693571ec2a8ff2cfac4e0469d

diff --git a/scripts/fit-msg.sh b/scripts/fit-msg.sh
new file mode 100755
index 0000000000..941e6f2570
--- /dev/null
+++ b/scripts/fit-msg.sh
@@ -0,0 +1,51 @@
+#!/bin/bash
+#
+# Copyright (c) 2020 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier: GPL-2.0
+#
+set -e
+
+function usage()
+{
+	echo
+	echo "usage:"
+	echo "    $0 -f [uboot.img]"
+	echo
+}
+
+function args_process()
+{
+	if [ $# -ne 2 ]; then
+		usage
+		exit 1
+	fi
+
+	while [ $# -gt 0 ]; do
+		case $1 in
+			-f)
+				IMG=$2
+				shift 2
+				;;
+			*)
+				usage
+				exit 1
+				;;
+		esac
+	done
+
+	if [ ! -f ${IMG} ]; then
+		echo "ERROR: No ${IMG}"
+		exit 1
+	fi
+}
+
+function image_msg()
+{
+	echo "[Commit version]:"
+	strings ${IMG} | grep '\-g[0-9,a-f][0-9,a-f][0-9,a-f][0-9,a-f][0-9,a-f][0-9,a-f][0-9,a-f]' | sort --uniq
+	strings ${IMG} | grep 'Built :' | sort --uniq
+}
+
+args_process $*
+image_msg

commit aa8e825b4b062f641e26d6f209d65c9f5f82a2f4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Nov 14 08:35:40 2020 +0000

    rockchip: rename fit.c => fit_misc.c
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I8afc870973d75f5e0e3bc968eaf6966f1696ac77

diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index dc9340848e..57e73452da 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -15,7 +15,7 @@ obj-tpl-y += tpl.o
 obj-spl-y += spl.o spl-boot-order.o
 
 ifndef CONFIG_TPL_BUILD
-obj-y += weak.o
+obj-$(CONFIG_$(SPL_)FIT) += fit_misc.o
 endif
 
 ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
diff --git a/arch/arm/mach-rockchip/weak.c b/arch/arm/mach-rockchip/fit_misc.c
similarity index 100%
rename from arch/arm/mach-rockchip/weak.c
rename to arch/arm/mach-rockchip/fit_misc.c

commit d4f6d8e395d7ca566a7c9179d5632ddf5e3b200b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Nov 14 08:23:32 2020 +0000

    scripts: android2fit.sh transform Android image to FIT image
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I0c448d101aa4912398efa528275119132f434f69

diff --git a/scripts/android2fit.sh b/scripts/android2fit.sh
new file mode 100755
index 0000000000..cb7d2c90d7
--- /dev/null
+++ b/scripts/android2fit.sh
@@ -0,0 +1,79 @@
+#!/bin/bash
+#
+# Copyright (c) 2020 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier: GPL-2.0
+#
+set -e
+
+OUT="out"
+
+function usage()
+{
+	echo
+	echo "usage:"
+	echo "    $0 -f [Android boot.img] -o [FIT boot.img]"
+	echo
+}
+
+function args_process()
+{
+	if [ $# -ne 4 ]; then
+		usage
+		exit 1
+	fi
+
+	while [ $# -gt 0 ]; do
+		case $1 in
+			-f)
+				BOOT_IMG=$2
+				shift 2
+				;;
+			-o)
+				FIT_IMG=$2
+				shift 2
+				;;
+			*)
+				usage
+				exit 1
+				;;
+		esac
+	done
+
+	if [ ! -f ${BOOT_IMG} ]; then
+		echo "ERROR: No ${ITB}"
+		exit 1
+	fi
+}
+
+function android2fit()
+{
+	if ! file ${BOOT_IMG} | grep "Android bootimg" ; then
+		echo "ERROR: ${BOOT_IMG} is not an Android Image"
+		file ${BOOT_IMG}
+		exit 1
+	fi
+
+	rm ${OUT}/ -rf
+	./scripts/unpack_bootimg --boot_img ${BOOT_IMG} --out ${OUT}/
+	./scripts/unpack_resource.sh ${OUT}/second  ${OUT}/
+	mv ${OUT}/second ${OUT}/resource
+
+	rm images/ -rf && mkdir -p images/
+	cp ${OUT}/kernel images/
+	cp ${OUT}/resource images/
+	cp ${OUT}/ramdisk images/
+	cp ${OUT}/rk-kernel.dtb images/
+	rm ${OUT}/ -rf
+
+	./make.sh fit
+	if [ "boot.img" != ${FIT_IMG} ]; then
+		mv boot.img ${FIT_IMG}
+	fi
+
+	echo "Transform OK: Android(${BOOT_IMG}) ==> FIT(${FIT_IMG}) is ready"
+	echo
+}
+
+args_process $*
+android2fit

commit 8db677370cf27854def936e9ad6f7d9fe4aae4e1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Nov 14 03:29:58 2020 +0000

    irq: irq-gpio-switch: add gpio alias name support
    
    Before the patch, we get gpio index(0,1,2..) depends on gpio
    fdt node name, such as: gpio0@..., gpio1@..., etc.
    
    But from RK3568, we add gpio alias to indicate gpio index
    information and index is removed from gpio node name, ie:
    gpio@fdd60000, gpio@fe740000, etc.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I56e45941f9572fbc6a5a5916896e12f6eff9dcf3

diff --git a/drivers/irq/irq-gpio-switch.c b/drivers/irq/irq-gpio-switch.c
index 2dc33404f8..e6dc3e65d3 100644
--- a/drivers/irq/irq-gpio-switch.c
+++ b/drivers/irq/irq-gpio-switch.c
@@ -42,6 +42,8 @@ static struct gpio_bank gpio_banks[GPIO_BANK_NUM] = {
 #endif
 };
 
+static const char *gpio_alias[GPIO_BANK_NUM];
+
 static int gpio_is_valid(u32 gpio)
 {
 	if ((gpio == EINVAL_GPIO) ||
@@ -80,60 +82,64 @@ static int __hard_gpio_to_irq(u32 gpio)
 
 static int __phandle_gpio_to_irq(u32 gpio_phandle, u32 offset)
 {
-	int irq_gpio, bank, ret = EINVAL_GPIO;
-	const char *name;
-	char *name_tok;
-	bool found;
-	int node;
-
-	node = fdt_node_offset_by_phandle(gd->fdt_blob, gpio_phandle);
+	const void *blob = gd->fdt_blob;
+	const char *gpio_name;
+	char alias_name[6];
+	int irq, node;
+	int i, bank;
+	bool found = false;
+
+	node = fdt_node_offset_by_phandle(blob, gpio_phandle);
 	if (node < 0) {
-		IRQ_E("Can't find node by gpio_phandle=%d, ret=%d\n",
-		      gpio_phandle, node);
+		IRQ_E("No gpio node by phandle(0x%x), ret=%d\n", gpio_phandle, node);
 		return EINVAL_GPIO;
 	}
 
-	name = fdt_get_name(gd->fdt_blob, node, NULL);
-	if (!name) {
-		IRQ_E("Can't find gpio bank for phandle=%d\n", gpio_phandle);
+	gpio_name = fdt_get_name(blob, node, NULL);
+	if (!gpio_name)
 		return EINVAL_GPIO;
-	}
 
-	name_tok = strdup(name);
-	if (!name_tok) {
-		IRQ_E("Strdup '%s' failed!\n", name);
-		return -ENOMEM;
+	for (bank = 0; bank < GPIO_BANK_NUM; bank++) {
+		if (!strstr(gpio_name, gpio_banks[bank].name)) {
+			found = true;
+			break;
+		}
 	}
 
-	name = strtok(name_tok, "@");
-	if (!name) {
-		IRQ_E("Can't strtok '@' for '%s'\n", name_tok);
-		goto out;
-	}
+	if (!found) {
+		/* initial getting all gpio alias */
+		if (!gpio_alias[0]) {
+			for (i = 0; i < GPIO_BANK_NUM; i++) {
+				snprintf(alias_name, 6, "gpio%d", i);
+				gpio_alias[i] = fdt_get_alias(blob, alias_name);
+				if (!gpio_alias[i]) {
+					IRQ_D("No gpio alias %s\n", alias_name);
+					return EINVAL_GPIO;
+				}
+			}
+		}
 
-	for (bank = 0; bank < ARRAY_SIZE(gpio_banks); bank++) {
-		if (!strcmp(gpio_banks[bank].name, name)) {
-			found = true;
-			break;
+		/* match alias ? */
+		for (bank = 0; bank < ARRAY_SIZE(gpio_banks); bank++) {
+			if (!strstr(gpio_alias[bank], gpio_name)) {
+				found = true;
+				break;
+			}
 		}
 	}
 
 	if (!found) {
-		IRQ_E("GPIO irq framework can't find '%s'\n", name);
-		goto out;
+		IRQ_E("IRQ Framework can't find: %s\n", gpio_name);
+		return EINVAL_GPIO;
 	}
 
 	IRQ_D("%s: gpio%d-%d\n", __func__, bank, offset);
-	irq_gpio = RK_IRQ_GPIO(bank, offset);
-	if (!gpio_is_valid(irq_gpio))
-		goto out;
 
-	free(name_tok);
-	return __hard_gpio_to_irq(irq_gpio);
+	irq = RK_IRQ_GPIO(bank, offset);
+	if (!gpio_is_valid(irq))
+		return EINVAL_GPIO;
 
-out:
-	free(name_tok);
-	return ret;
+	return __hard_gpio_to_irq(irq);
 }
 
 static int __irq_to_gpio(int irq)

commit 9d23fbe3b7ff738302bc92b8c367fad9584cda98
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 12 09:11:52 2020 +0000

    spl: fit: load kernel dtb if need
    
    kernel FDT is for U-Boot if there is not valid one from images,
    ie: resource.img, boot.img or recovery.img. It is put right
    after U-Boot FDT.
    
    This is used for U-disk bing up.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I348b6ea5736f46c091284c501e7e0f9c64cd2f78

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 59403c9883..8b534e3574 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -324,6 +324,21 @@ static int spl_fit_append_fdt(struct spl_image_info *spl_image,
 	ret = fdt_shrink_to_minimum(spl_image->fdt_addr, 8192);
 #endif
 
+	/*
+	 * If need, load kernel FDT right after U-Boot FDT.
+	 *
+	 * kernel FDT is for U-Boot if there is not valid one
+	 * from images, ie: resource.img, boot.img or recovery.img.
+	 */
+	node = fdt_subnode_offset(fit, images, FIT_KERNEL_FDT_PROP);
+	if (node < 0)
+		return ret;
+
+	image_info.load_addr =
+		(ulong)spl_image->fdt_addr + fdt_totalsize(spl_image->fdt_addr);
+	ret = spl_load_fit_image(info, sector, fit, base_offset, node,
+				 &image_info);
+
 	return ret;
 }
 
diff --git a/include/image.h b/include/image.h
index 95256925b5..93a3344e7c 100644
--- a/include/image.h
+++ b/include/image.h
@@ -933,6 +933,7 @@ int bootz_setup(ulong image, ulong *start, ulong *end);
 #define FIT_LOAD_PROP		"load"
 #define FIT_PRE_LOAD_PROP	"preload"
 #define FIT_ROLLBACK_PROP	"rollback-index"
+#define FIT_KERNEL_FDT_PROP	"kernel-fdt"
 
 /* configuration node */
 #define FIT_KERNEL_PROP		"kernel"

commit a14492767c59b1c96c4d0f2f743fcfea0eae3a14
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 12 09:03:34 2020 +0000

    rockchip: make_fit_atf/optee.sh: add "kernel-fdt" node
    
    kernel FDT is for U-Boot if there is not valid one from images,
    ie: resource.img, boot.img or recovery.img. It is put right
    after U-Boot FDT.
    
    This is used for U-disk bing up.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Iab1ddbbf3978a6b2fc08316bb136c43c0d2eef60

diff --git a/arch/arm/mach-rockchip/make_fit_atf.sh b/arch/arm/mach-rockchip/make_fit_atf.sh
index 4027aa7b74..258695c1b3 100755
--- a/arch/arm/mach-rockchip/make_fit_atf.sh
+++ b/arch/arm/mach-rockchip/make_fit_atf.sh
@@ -47,6 +47,22 @@ function generate_uboot_node()
 	echo "		};"
 }
 
+function generate_kfdt_node()
+{
+	if [ -f ${srctree}/dts/kern.dtb ]; then
+	echo "		kernel-fdt {
+			description = \"Kernel dtb\";
+			data = /incbin/(\"./dts/kern.dtb\");
+			type = \"flat_dt\";
+			arch = \"${ARCH}\";
+			compression = \"none\";
+			hash {
+				algo = \"sha256\";
+			};
+		};"
+	fi
+}
+
 function generate_bl31_node()
 {
 	NUM=1
@@ -147,6 +163,7 @@ EOF
 	generate_uboot_node
 	generate_bl31_node
 	generate_bl32_node
+	generate_kfdt_node
 
 cat << EOF
 		fdt {
diff --git a/arch/arm/mach-rockchip/make_fit_optee.sh b/arch/arm/mach-rockchip/make_fit_optee.sh
index 20200dea6f..6c499c5142 100755
--- a/arch/arm/mach-rockchip/make_fit_optee.sh
+++ b/arch/arm/mach-rockchip/make_fit_optee.sh
@@ -66,6 +66,19 @@ ${MCU_DIGEST}
 else
 	SIGN_IMAGES="			        sign-images = \"fdt\", \"firmware\", \"loadables\";"
 fi
+
+if [ -f ${srctree}/dts/kern.dtb ]; then
+	KFDT_NODE="		kernel-fdt {
+			description = \"Kernel dtb\";
+			data = /incbin/(\"./dts/kern.dtb\");
+			type = \"flat_dt\";
+			arch = \"${ARCH}\";
+			compression = \"none\";
+			hash {
+				algo = \"sha256\";
+			};
+		};"
+fi
 ########################################################################################################
 
 cat << EOF
@@ -124,6 +137,7 @@ cat << EOF
 			};
 		};
 EOF
+echo "${KFDT_NODE}"
 echo "${MCU_NODE}"
 cat  << EOF
 	};

commit 20647277f15bdc46fa4cc31d2b68c5b597d374fb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 9 21:58:33 2020 +0800

    rockchip: kernel-dtb: check mismatch of kernel dtb
    
    Simply check cru node to verify if this kernel dtb
    is belong to current platform.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I8c0b2181a2ca3cada72a9e18788de0bfdc9ba3c5

diff --git a/arch/arm/mach-rockchip/kernel_dtb.c b/arch/arm/mach-rockchip/kernel_dtb.c
index 87bc20f9d5..9293b1665c 100644
--- a/arch/arm/mach-rockchip/kernel_dtb.c
+++ b/arch/arm/mach-rockchip/kernel_dtb.c
@@ -217,6 +217,40 @@ static int mmc_dm_reinit(void)
 	return 0;
 }
 
+/*
+ * Simply check cru node:
+ * This kernel dtb is belong to current platform ?
+ */
+static int dtb_check_ok(void *fdt, void *ufdt)
+{
+	const char *compare[2] = { NULL, NULL, };
+	const char *compat;
+	void *blob = fdt;
+	int offset;
+	int i;
+
+	for (i = 0; i < 2; i++) {
+		for (offset = fdt_next_node(blob, 0, NULL);
+		     offset >= 0;
+		     offset = fdt_next_node(blob, offset, NULL)) {
+			compat = fdt_getprop(blob, offset, "compatible", NULL);
+			if (!compat)
+				continue;
+			debug("[%d] compat: %s\n", i, compat);
+			if (strstr(compat, "-cru")) {
+				compare[i] = compat;
+				blob = ufdt;
+				break;
+			}
+		}
+	}
+
+	if (compare[0] && compare[1])
+		return !memcmp(compare[0], compare[1], strlen(compare[0]));
+
+	return 0;
+}
+
 int init_kernel_dtb(void)
 {
 	ulong fdt_addr;
@@ -226,26 +260,39 @@ int init_kernel_dtb(void)
 	fdt_addr = env_get_ulong("fdt_addr_r", 16, 0);
 	if (!fdt_addr) {
 		printf("No Found FDT Load Address.\n");
-		return -1;
+		return -ENODEV;
 	}
 
 	ret = rockchip_read_dtb_file((void *)fdt_addr);
-	if (ret < 0) {
-		if (!fdt_check_header(gd->fdt_blob_kern)) {
-			fdt_addr = (ulong)memalign(ARCH_DMA_MINALIGN,
-					fdt_totalsize(gd->fdt_blob_kern));
-			if (!fdt_addr)
-				return -ENOMEM;
-
-			memcpy((void *)fdt_addr, gd->fdt_blob_kern,
-			       fdt_totalsize(gd->fdt_blob_kern));
-			printf("DTB: embedded kern.dtb\n");
+	if (!ret) {
+		if (!dtb_check_ok((void *)fdt_addr, (void *)gd->fdt_blob)) {
+			ret = -EINVAL;
+			printf("Kernel dtb mismatch this platform!\n");
 		} else {
-			printf("Failed to get kernel dtb, ret=%d\n", ret);
-			return ret;
+			goto dtb_okay;
+		}
+	}
+
+	if (!fdt_check_header(gd->fdt_blob_kern)) {
+		if (!dtb_check_ok((void *)gd->fdt_blob_kern, (void *)gd->fdt_blob)) {
+			printf("Embedded kernel dtb mismatch this platform!\n");
+			return -EINVAL;
 		}
+
+		fdt_addr = (ulong)memalign(ARCH_DMA_MINALIGN,
+				fdt_totalsize(gd->fdt_blob_kern));
+		if (!fdt_addr)
+			return -ENOMEM;
+
+		memcpy((void *)fdt_addr, gd->fdt_blob_kern,
+		       fdt_totalsize(gd->fdt_blob_kern));
+		printf("DTB: embedded kern.dtb\n");
+	} else {
+		printf("Failed to get kernel dtb, ret=%d\n", ret);
+		return ret;
 	}
 
+dtb_okay:
 	ufdt_blob = (void *)gd->fdt_blob;
 	gd->fdt_blob = (void *)fdt_addr;
 

commit d6e082ceff6cb15c7e73c8ac183186879318b02c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 11 12:28:07 2020 +0000

    common: board_f: print kern.dtb address
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I8f593632676cad3758c37d5a027932bc1302f0d5

diff --git a/common/board_f.c b/common/board_f.c
index 6036134382..6ba70ae13f 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -689,8 +689,13 @@ static int setup_reloc(void)
 	memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
 
 #ifndef CONFIG_SUPPORT_USBPLUG
-	printf("Relocation Offset: %08lx, fdt: %08lx\n",
+	printf("Relocation Offset: %08lx, fdt: %08lx ",
 	      gd->reloc_off, (ulong)gd->new_fdt);
+  #ifdef CONFIG_USING_KERNEL_DTB
+	if (!fdt_check_header((void *)gd->fdt_blob_kern))
+		printf("kfdt: %08lx", (ulong)gd->fdt_blob_kern);
+  #endif
+	puts("\n");
 #endif
 	debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
 	      gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),

commit cab35d601e94c8ae472933093f362d57f4d36c9d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Nov 14 04:15:07 2020 +0000

    make.sh: use "atf-1" to check uboot.img
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I49004f1dac8eaedd11c449ab7f6e6fba7c0605c4

diff --git a/make.sh b/make.sh
index 9308d14f9f..201d54df1b 100755
--- a/make.sh
+++ b/make.sh
@@ -727,7 +727,7 @@ function pack_fit_image()
 	${SCRIPT_FIT} ${ARG_LIST_FIT}
 
 	if [ "${ARM64_TRUSTZONE}" == "y" ]; then
-		if ! fdtget -l uboot.img /images/atf@1 >/dev/null 2>&1 ; then
+		if ! fdtget -l uboot.img /images/atf-1 >/dev/null 2>&1 ; then
 			echo -e "\nERROR: Invalid uboot.img, please install: \"pip install pyelftools\""
 			echo
 			exit 1

commit 7d70ffaeadf417c3cc7d51b61cfd6fb712cb5134
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Nov 14 04:12:45 2020 +0000

    rockchip: make_fit_atf.sh: use "-" instead of "@"
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I02b6a5f376184ea50c0db8714d225a1cd0cb39e1

diff --git a/arch/arm/mach-rockchip/make_fit_atf.sh b/arch/arm/mach-rockchip/make_fit_atf.sh
index 43a01bb392..4027aa7b74 100755
--- a/arch/arm/mach-rockchip/make_fit_atf.sh
+++ b/arch/arm/mach-rockchip/make_fit_atf.sh
@@ -53,12 +53,12 @@ function generate_bl31_node()
 	for NAME in `ls -l bl31_0x*.bin | sort --key=5 -nr | awk '{ print $9 }'`
 	do
 		ATF_LOAD_ADDR=`echo ${NAME} | awk -F "_" '{ printf $2 }' | awk -F "." '{ printf $1 }'`
-		# only atf@1 support compress
+		# only atf-1 support compress
 		if [ "${COMPRESSION}" == "gzip" -a ${NUM} -eq 1  ]; then
 			openssl dgst -sha256 -binary -out ${NAME}.digest ${NAME}
 			gzip -k -f -9 ${NAME}
 
-			echo "		atf@${NUM} {
+			echo "		atf-${NUM} {
 			description = \"ARM Trusted Firmware\";
 			data = /incbin/(\"./${NAME}${SUFFIX}\");
 			type = \"firmware\";
@@ -75,7 +75,7 @@ function generate_bl31_node()
 			};
 		};"
 		else
-			echo "		atf@${NUM} {
+			echo "		atf-${NUM} {
 			description = \"ARM Trusted Firmware\";
 			data = /incbin/(\"./${NAME}\");
 			type = \"firmware\";
@@ -90,7 +90,7 @@ function generate_bl31_node()
 		fi
 
 		if [ ${NUM} -gt 1 ]; then
-			LOADABLE_ATF=${LOADABLE_ATF}", \"atf@${NUM}\""
+			LOADABLE_ATF=${LOADABLE_ATF}", \"atf-${NUM}\""
 		fi
 		NUM=`expr ${NUM} + 1`
 	done
@@ -166,7 +166,7 @@ cat << EOF
 		conf {
 			description = "Rockchip armv8 with ATF";
 			rollback-index = <0x0>;
-			firmware = "atf@1";
+			firmware = "atf-1";
 			loadables = "uboot"${LOADABLE_ATF}${LOADABLE_OPTEE};
 			fdt = "fdt";
 			signature {

commit e4e3f4318df60077293d321c5048729a8bf85292
Author: David Wu <david.wu@rock-chips.com>
Date:   Thu Nov 12 09:16:46 2020 +0800

    net: gmac_rockchip: Add rmii support for rv1126
    
    Change-Id: I89401b89ff8fd3d9cca754d6f1c05dc76ef2cda6
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/net/gmac_rockchip.c b/drivers/net/gmac_rockchip.c
index 2e9dab280f..a6def5d086 100644
--- a/drivers/net/gmac_rockchip.c
+++ b/drivers/net/gmac_rockchip.c
@@ -712,6 +712,23 @@ static void rv1108_gmac_set_to_rmii(struct gmac_rockchip_platdata *pdata)
 		     RV1108_GMAC_PHY_INTF_SEL_RMII);
 }
 #else
+static void rv1126_set_to_rmii(struct gmac_rockchip_platdata *pdata)
+{
+	struct rv1126_grf *grf;
+
+	enum {
+		RV1126_GMAC_PHY_INTF_SEL_SHIFT = 4,
+		RV1126_GMAC_PHY_INTF_SEL_MASK  = GENMASK(6, 4),
+		RV1126_GMAC_PHY_INTF_SEL_RMII = BIT(6),
+	};
+
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
+	rk_clrsetreg(&grf->mac_con0,
+		     RV1126_GMAC_PHY_INTF_SEL_MASK,
+		     RV1126_GMAC_PHY_INTF_SEL_RMII);
+}
+
 static void rv1126_set_to_rgmii(struct gmac_rockchip_platdata *pdata)
 {
 	struct rv1126_grf *grf;
@@ -1012,6 +1029,7 @@ const struct rk_gmac_ops rv1126_gmac_ops = {
 
 	.fix_mac_speed = rv1126_set_rgmii_speed,
 	.set_to_rgmii = rv1126_set_to_rgmii,
+	.set_to_rmii = rv1126_set_to_rmii,
 };
 #endif
 

commit 9fb3fe4220cfea2034f6fdf2f8c05023da3336c3
Author: Weiwen Chen <cww@rock-chips.com>
Date:   Sat Nov 14 09:28:24 2020 +0800

    configs: rv1126: enable cmd mtd for spi nand erase/write/read
    
    Signed-off-by: Weiwen Chen <cww@rock-chips.com>
    Change-Id: Ie4eba0bba18d44bca12a80df0083d1bf018a74d2

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index 658d8a662a..7f9ae8c191 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -62,6 +62,7 @@ CONFIG_CMD_GPT=y
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_MTD=y
 CONFIG_CMD_NAND=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y

commit 3b2dd5de375e8ce0e0c9a9ffb2c5965a7582c4ea
Author: William Wu <william.wu@rock-chips.com>
Date:   Fri Nov 13 18:17:26 2020 +0800

    usb: dwc3: do not use 3.0 clock when operating in 2.0 mode
    
    In the 3.0 device core, if the core is programmed to operate in
    2.0 only, then setting the GUCTL1.DEV_FORCE_20_CLK_FOR_30_CLK makes
    the internal 2.0(utmi/ulpi) clock to be routed as the 3.0 (pipe)
    clock. Enabling this feature allows the pipe3 clock to be not-running
    when forcibly operating in 2.0 device mode.
    
    Change-Id: Ib93da14b5309ec094b952e03f8514817910fedfa
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 731971625d..29f455e10b 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -490,6 +490,16 @@ static int dwc3_core_init(struct dwc3 *dwc)
 	if (ret)
 		goto err0;
 
+	if (dwc->revision >= DWC3_REVISION_250A) {
+		reg = dwc3_readl(dwc->regs, DWC3_GUCTL1);
+
+		if (dwc->maximum_speed == USB_SPEED_HIGH ||
+		    dwc->maximum_speed == USB_SPEED_FULL)
+			reg |= DWC3_GUCTL1_DEV_FORCE_20_CLK_FOR_30_CLK;
+
+		dwc3_writel(dwc->regs, DWC3_GUCTL1, reg);
+	}
+
 	reg = dwc3_readl(dwc->regs, DWC3_GCTL);
 	reg &= ~DWC3_GCTL_SCALEDOWN_MASK;
 
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index b32bc010cd..a67c899436 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -162,6 +162,9 @@
 #define DWC3_GCTL_GBLHIBERNATIONEN	(1 << 1)
 #define DWC3_GCTL_DSBLCLKGTNG		(1 << 0)
 
+/* Global User Control 1 Register */
+#define DWC3_GUCTL1_DEV_FORCE_20_CLK_FOR_30_CLK BIT(26)
+
 /* Global USB2 PHY Configuration Register */
 #define DWC3_GUSB2PHYCFG_PHYSOFTRST	(1 << 31)
 #define DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS	(1 << 30)

commit cce972667a31f2c128a117f19b220f511b6f1698
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Nov 13 17:39:27 2020 +0800

    rockchip: rk3568: set the emmc drive strength to level 2
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ic515e9aa81448ac1abcf378e9f4cd9b08247bdde

diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c
index 3c66a9b13d..9b816c8711 100644
--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
@@ -13,6 +13,12 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #define PMUGRF_BASE		0xfdc20000
 #define GRF_BASE		0xfdc60000
+#define GRF_GPIO1B_DS_2		0x218
+#define GRF_GPIO1B_DS_3		0x21c
+#define GRF_GPIO1C_DS_0		0x220
+#define GRF_GPIO1C_DS_1		0x224
+#define GRF_GPIO1C_DS_2		0x228
+#define GRF_GPIO1C_DS_3		0x22c
 #define GRF_SOC_CON4		0x510
 #define PMU_BASE_ADDR		0xfdd90000
 #define PMU_NOC_AUTO_CON0	(0x70)
@@ -727,6 +733,13 @@ int arch_cpu_init(void)
 
 	/* Set the emmc to secure */
 	writel(((0x3 << 11) << 16) | (0x0 << 11), SGRF_BASE + SGRF_SOC_CON4);
+	/* set the emmc ds to level 2 */
+	writel(0x3f3f0707, GRF_BASE + GRF_GPIO1B_DS_2);
+	writel(0x3f3f0707, GRF_BASE + GRF_GPIO1B_DS_3);
+	writel(0x3f3f0707, GRF_BASE + GRF_GPIO1C_DS_0);
+	writel(0x3f3f0707, GRF_BASE + GRF_GPIO1C_DS_1);
+	writel(0x3f3f0707, GRF_BASE + GRF_GPIO1C_DS_2);
+	writel(0x3f3f0707, GRF_BASE + GRF_GPIO1C_DS_3);
 #endif
 
 	return 0;

commit 60238d95dcc1e024136a89d74d4a1e1daa10caff
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Nov 13 14:45:58 2020 +0800

    mmc: sdhci: rockchip: change tapnum to 16
    
    According to the test hadware testing.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I2750a7de9f79807256800868ae53d3fe4a23b2f1

diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index 375f3dfd9c..6cb9d246e7 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -48,9 +48,9 @@ DECLARE_GLOBAL_DATA_PTR;
 #define DWCMSHC_EMMC_DLL_START_POINT	16
 #define DWCMSHC_EMMC_DLL_INC		8
 #define DWCMSHC_EMMC_DLL_DLYENA		BIT(27)
-#define DLL_RXCLK_TAPNUM_DEFAULT	0x3
+#define DLL_TXCLK_TAPNUM_DEFAULT	0x10
 #define DLL_STRBIN_TAPNUM_DEFAULT	0x3
-#define DLL_RXCLK_TAPNUM_FROM_SW	BIT(24)
+#define DLL_TXCLK_TAPNUM_FROM_SW	BIT(24)
 #define DWCMSHC_EMMC_DLL_LOCKED		BIT(8)
 #define DWCMSHC_EMMC_DLL_TIMEOUT	BIT(9)
 #define DLL_RXCLK_NO_INVERTER		1
@@ -340,8 +340,8 @@ static int rk3568_sdhci_emmc_set_clock(struct sdhci_host *host, unsigned int clo
 		sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_RXCLK);
 
 		extra = DWCMSHC_EMMC_DLL_DLYENA |
-			DLL_RXCLK_TAPNUM_DEFAULT |
-			DLL_RXCLK_TAPNUM_FROM_SW;
+			DLL_TXCLK_TAPNUM_DEFAULT |
+			DLL_TXCLK_TAPNUM_FROM_SW;
 		sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_TXCLK);
 
 		extra = DWCMSHC_EMMC_DLL_DLYENA |

commit 258d2dcb26879538abc00fc64a8a34c45c046465
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Nov 13 09:22:12 2020 +0000

    env: Kconfig: add entry for ENV offset and size
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I8609519d0dc5519b57201406d1f7ae4948b0e9b3

diff --git a/env/Kconfig b/env/Kconfig
index 48cec9b8f8..1a18e2cf93 100644
--- a/env/Kconfig
+++ b/env/Kconfig
@@ -472,7 +472,7 @@ endif
 if ARCH_ROCKCHIP
 
 config ENV_OFFSET
-	hex
+	hex "Environment offset"
 	depends on !ENV_IS_IN_UBI
 	depends on !ENV_IS_NOWHERE
 	default 0x3f8000
@@ -480,7 +480,7 @@ config ENV_OFFSET
 	  Offset from the start of the device (or partition)
 
 config ENV_SIZE
-	hex
+	hex "Environment size"
 	default 0x8000
 	help
 	  Size of the environment storage area

commit 2c655b73ba11381aa2e2360b86b9544cbcb8789d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 12 13:12:09 2020 +0000

    lib: sysmem: update help of "sysmem_search" command
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ie747d258fa00301c488f5747cf729c242e4d6033

diff --git a/lib/sysmem.c b/lib/sysmem.c
index fc46b8943f..c2d510be56 100644
--- a/lib/sysmem.c
+++ b/lib/sysmem.c
@@ -831,5 +831,5 @@ U_BOOT_CMD(
 U_BOOT_CMD(
 	sysmem_search, 2, 1, do_sysmem_search,
 	"Search a available sysmem region",
-	"search_sysmem <size>"
+	"<size in hex>"
 );

commit ca319403be48fdd55bc4818d59c178851d53c498
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Thu Nov 12 17:58:01 2020 +0800

    configs: rk3568: Enable spinor
    
    Change-Id: I8c6ae405ad70a13e2ee8624c99db588d71fc33ed
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index 7865a8493c..804a749403 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -58,6 +58,7 @@ CONFIG_CMD_GPT=y
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_MTD=y
 CONFIG_CMD_NAND=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
@@ -98,7 +99,14 @@ CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
 CONFIG_SYS_NAND_U_BOOT_OFFS=0x8000
 CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND=0x10000
 CONFIG_MTD_SPI_NAND=y
+CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=20000000
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPI_FLASH_XMC=y
+CONFIG_SPI_FLASH_MTD=y
 CONFIG_PHYLIB=y
 CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y

commit 007849d805b9b34b128688b459be0152c328ff43
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Thu Nov 12 08:37:56 2020 +0800

    drivers: rockusb: add new idb feature for rk3568
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: Iee5ed01bb336a5b5994381fc8e734da3b87329fe

diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index 5816b8803d..3a4c1fcf61 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -564,6 +564,9 @@ static int rkusb_do_read_capacity(struct fsg_common *common,
 	    devnum == BLK_MTD_SPI_NAND))
 		buf[0] |= (1 << 6);
 
+#if defined(CONFIG_ROCKCHIP_RK3568)
+	buf[1] = BIT(0);
+#endif
 	/* Set data xfer size */
 	common->residue = len;
 	common->data_size_from_cmnd = len;

commit 9f408268dc2b2de8ad0948b9b15b36571236f8c0
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Nov 12 10:31:39 2020 +0800

    rockchip: rk3568: support rockchip_get_cru for rk3568
    
    Change-Id: I2029c26da80b5ed5cd18e154751688fd29862813
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3568/Makefile b/arch/arm/mach-rockchip/rk3568/Makefile
index a6a2f1798f..4e7d87cea4 100644
--- a/arch/arm/mach-rockchip/rk3568/Makefile
+++ b/arch/arm/mach-rockchip/rk3568/Makefile
@@ -8,3 +8,4 @@ ifneq ($(CONFIG_TPL_BUILD)$(CONFIG_TPL_TINY_FRAMEWORK),yy)
 obj-y += syscon_rk3568.o
 endif
 obj-y += rk3568.o
+obj-y += clk_rk3568.o
diff --git a/arch/arm/mach-rockchip/rk3568/clk_rk3568.c b/arch/arm/mach-rockchip/rk3568/clk_rk3568.c
new file mode 100644
index 0000000000..b98cb7a34a
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3568/clk_rk3568.c
@@ -0,0 +1,54 @@
+/*
+ * (C) Copyright 2020 Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk3568.h>
+
+int rockchip_get_clk(struct udevice **devp)
+{
+	return uclass_get_device_by_driver(UCLASS_CLK,
+			DM_GET_DRIVER(rockchip_rk3568_cru), devp);
+}
+
+void *rockchip_get_cru(void)
+{
+	struct rk3568_clk_priv *priv;
+	struct udevice *dev;
+	int ret;
+
+	ret = rockchip_get_clk(&dev);
+	if (ret)
+		return ERR_PTR(ret);
+
+	priv = dev_get_priv(dev);
+
+	return priv->cru;
+}
+
+static int rockchip_get_pmucruclk(struct udevice **devp)
+{
+	return uclass_get_device_by_driver(UCLASS_CLK,
+			DM_GET_DRIVER(rockchip_rk3568_pmucru), devp);
+}
+
+void *rockchip_get_pmucru(void)
+{
+	struct rk3568_pmuclk_priv *priv;
+	struct udevice *dev;
+	int ret;
+
+	ret = rockchip_get_pmucruclk(&dev);
+	if (ret)
+		return ERR_PTR(ret);
+
+	priv = dev_get_priv(dev);
+
+	return priv->pmucru;
+}
+

commit 8d74d6b7d3f5cdeccc51bcd26ea65ee93ac9ad3e
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Wed Nov 11 18:54:40 2020 +0800

    drivers: mmc: rockchip: rk3568: config rx clock no inverter for hs200
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: I426a5c3ee0899fbd54711e13550310f77f8abd3e

diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index c6f08f1041..375f3dfd9c 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -335,7 +335,8 @@ static int rk3568_sdhci_emmc_set_clock(struct sdhci_host *host, unsigned int clo
 			timeout--;
 		}
 
-		extra = DWCMSHC_EMMC_DLL_DLYENA;
+		extra = DWCMSHC_EMMC_DLL_DLYENA |
+			DLL_RXCLK_NO_INVERTER << DWCMSHC_EMMC_DLL_RXCLK_SRCSEL;
 		sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_RXCLK);
 
 		extra = DWCMSHC_EMMC_DLL_DLYENA |

commit b48cb5c290c9cd226a88c7e98627692b82e61125
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Nov 11 15:04:10 2020 +0800

    rockchip: dts: rk3568: set emmc bus width to 8
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ifdbe8ed76caa746070c3c5cf166573ffeb8d9645

diff --git a/arch/arm/dts/rk3568-u-boot.dtsi b/arch/arm/dts/rk3568-u-boot.dtsi
index 2b22755ca9..410d3280ce 100644
--- a/arch/arm/dts/rk3568-u-boot.dtsi
+++ b/arch/arm/dts/rk3568-u-boot.dtsi
@@ -167,6 +167,7 @@
 };
 
 &sdhci {
+	bus-width = <8>;
 	u-boot,dm-spl;
 	mmc-hs200-1_8v;
 	status = "okay";

commit 1ac424cf0325b3a9819344680459f8b059e138cd
Author: Sugar Zhang <sugar.zhang@rock-chips.com>
Date:   Tue Nov 10 09:07:14 2020 +0800

    rockchip: rv1126: Increase otp tRWH timing for stable read
    
    Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
    Change-Id: I42d57e6a9eaeb30e24b755821c7672ea9ffce56d

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126.c b/arch/arm/mach-rockchip/rv1126/rv1126.c
index ae7f304db2..5c1ae0b359 100644
--- a/arch/arm/mach-rockchip/rv1126/rv1126.c
+++ b/arch/arm/mach-rockchip/rv1126/rv1126.c
@@ -98,6 +98,9 @@ DECLARE_GLOBAL_DATA_PTR;
 #define WDT_RESET_SRC_CLR	BIT(1)
 #define GRF_IOFUNC_CON3		0xFF01026C
 #define GRF1_GPIO0D_P		0xFE010104
+#define OTP_NS_BASE		0xFF5C0000
+#define OTP_S_BASE		0xFF5D0000
+#define OTP_NVM_TRWH		0x28
 
 enum {
 	GPIO1A7_SHIFT		= 12,
@@ -548,6 +551,10 @@ int arch_cpu_init(void)
 		writel(WDT_RESET_SRC_CLR, PMUGRF_RSTFUNC_CLR);
 	}
 
+	/* set otp tRWH to 0x9 for stable read */
+	writel(0x9, OTP_NS_BASE + OTP_NVM_TRWH);
+	writel(0x9, OTP_S_BASE + OTP_NVM_TRWH);
+
 #ifdef CONFIG_SPL_BUILD
 	/*
 	 * Just set region 0 to unsecure.

commit 5a82dae5f566b55f19cad44226bbe862788f6167
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Tue Nov 10 16:36:06 2020 +0800

    rk3568_defconfig: enable rockchip-io-domain driver
    
    Change-Id: I5803b2fbd79ada441ff48c22f1a1511279bb014b
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index 16992dce9b..7865a8493c 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -103,6 +103,8 @@ CONFIG_PHYLIB=y
 CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
+CONFIG_IO_DOMAIN=y
+CONFIG_ROCKCHIP_IO_DOMAIN=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y

commit fcff2851be11810ba9a92137e560cafa9e155d01
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Tue Nov 10 16:34:13 2020 +0800

    power: io-domain: rockchip: fix rk3568 grf offset
    
    Change-Id: I1045ce0d942ea57e325bdf3b8aa4bc8c9023d9e8
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/drivers/power/io-domain/rockchip-io-domain.c b/drivers/power/io-domain/rockchip-io-domain.c
index edab918b58..53b3a448a6 100644
--- a/drivers/power/io-domain/rockchip-io-domain.c
+++ b/drivers/power/io-domain/rockchip-io-domain.c
@@ -58,9 +58,9 @@
 #define RK3399_PMUGRF_CON0_VSEL		BIT(8)
 #define RK3399_PMUGRF_VSEL_SUPPLY_NUM	9
 
-#define RK3568_PMU_GRF_IO_VSEL0		(0x0124)
-#define RK3568_PMU_GRF_IO_VSEL1		(0x0128)
-#define RK3568_PMU_GRF_IO_VSEL2		(0x012C)
+#define RK3568_PMU_GRF_IO_VSEL0		(0x0140)
+#define RK3568_PMU_GRF_IO_VSEL1		(0x0144)
+#define RK3568_PMU_GRF_IO_VSEL2		(0x0148)
 
 struct rockchip_iodomain_priv;
 
@@ -488,10 +488,10 @@ static const struct rockchip_iodomain_soc_data soc_data_rk3399_pmu = {
 };
 
 static const struct rockchip_iodomain_soc_data soc_data_rk3568_pmu = {
-	.grf_offset = 0x124,
+	.grf_offset = 0x140,
 	.supply_names = {
-		"pmuio0",
 		"pmuio1",
+		"pmuio2",
 		"vccio1",
 		"vccio2",
 		"vccio3",

commit 836c6892fa0534b6fcc1e6aaefa1eff16b94c4b2
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Mon Nov 9 16:22:34 2020 +0800

    pinctrl: rockchip: fix RK3568 for pull set
    
    Change-Id: I9fa739d65caf54067f8c61142ced44f9ad9d7313
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3568.c b/drivers/pinctrl/rockchip/pinctrl-rk3568.c
index c8115cb2d8..dc1451473c 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3568.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3568.c
@@ -106,7 +106,6 @@ static struct rockchip_mux_route_data rk3568_mux_route_data[] = {
 	MR_TOPGRF(RK_GPIO4, RK_PC2, RK_FUNC_4, 0x0314, RK_GENMASK_VAL(7, 6, 2)), /* PCIE30X2 IO mux selection M2 */
 };
 
-
 static int rk3568_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
 {
 	struct rockchip_pinctrl_priv *priv = bank->priv;
@@ -136,8 +135,8 @@ static int rk3568_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
 	return ret;
 }
 
-#define RK3568_PULL_GRF_OFFSET		0x20
-#define RK3568_PULL_PMU_OFFSET		0x80
+#define RK3568_PULL_PMU_OFFSET		0x20
+#define RK3568_PULL_GRF_OFFSET		0x80
 #define RK3568_PULL_BITS_PER_PIN	2
 #define RK3568_PULL_PINS_PER_REG	8
 #define RK3568_PULL_BANK_STRIDE		0x10
@@ -152,19 +151,15 @@ static void rk3568_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
 		*regmap = info->regmap_pmu;
 		*reg = RK3568_PULL_PMU_OFFSET;
 		*reg += bank->bank_num * RK3568_PULL_BANK_STRIDE;
-		*reg += ((pin_num / RK3568_PULL_PINS_PER_REG) * 4);
-
-		*bit = pin_num % RK3568_PULL_PINS_PER_REG;
-		*bit *= RK3568_PULL_BITS_PER_PIN;
 	} else {
 		*regmap = info->regmap_base;
 		*reg = RK3568_PULL_GRF_OFFSET;
 		*reg += (bank->bank_num - 1) * RK3568_PULL_BANK_STRIDE;
-		*reg += ((pin_num / RK3568_PULL_PINS_PER_REG) * 4);
-
-		*bit = (pin_num % RK3568_PULL_PINS_PER_REG);
-		*bit *= RK3568_PULL_BITS_PER_PIN;
 	}
+
+	*reg += ((pin_num / RK3568_PULL_PINS_PER_REG) * 4);
+	*bit = (pin_num % RK3568_PULL_PINS_PER_REG);
+	*bit *= RK3568_PULL_BITS_PER_PIN;
 }
 
 #define RK3568_DRV_PMU_OFFSET		0x70
@@ -183,19 +178,43 @@ static void rk3568_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
 	if (bank->bank_num == 0) {
 		*regmap = info->regmap_pmu;
 		*reg = RK3568_DRV_PMU_OFFSET;
-		*reg += ((pin_num / RK3568_DRV_PINS_PER_REG) * 4);
-
-		*bit = pin_num % RK3568_DRV_PINS_PER_REG;
-		*bit *= RK3568_DRV_BITS_PER_PIN;
 	} else {
 		*regmap = info->regmap_base;
 		*reg = RK3568_DRV_GRF_OFFSET;
 		*reg += (bank->bank_num - 1) * RK3568_DRV_BANK_STRIDE;
-		*reg += ((pin_num / RK3568_DRV_PINS_PER_REG) * 4);
+	}
+
+	*reg += ((pin_num / RK3568_DRV_PINS_PER_REG) * 4);
+	*bit = (pin_num % RK3568_DRV_PINS_PER_REG);
+	*bit *= RK3568_DRV_BITS_PER_PIN;
+}
+
+#define RK3568_SCHMITT_BITS_PER_PIN		2
+#define RK3568_SCHMITT_PINS_PER_REG		8
+#define RK3568_SCHMITT_BANK_STRIDE		0x10
+#define RK3568_SCHMITT_GRF_OFFSET		0xc0
+#define RK3568_SCHMITT_PMUGRF_OFFSET		0x30
 
-		*bit = (pin_num % RK3568_DRV_PINS_PER_REG);
-		*bit *= RK3568_DRV_BITS_PER_PIN;
+static int rk3568_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank,
+					   int pin_num, struct regmap **regmap,
+					   int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *info = bank->priv;
+
+	if (bank->bank_num == 0) {
+		*regmap = info->regmap_pmu;
+		*reg = RK3568_SCHMITT_PMUGRF_OFFSET;
+	} else {
+		*regmap = info->regmap_base;
+		*reg = RK3568_SCHMITT_GRF_OFFSET;
+		*reg += (bank->bank_num - 1) * RK3568_SCHMITT_BANK_STRIDE;
 	}
+
+	*reg += ((pin_num / RK3568_SCHMITT_PINS_PER_REG) * 4);
+	*bit = pin_num % RK3568_SCHMITT_PINS_PER_REG;
+	*bit *= RK3568_SCHMITT_BITS_PER_PIN;
+
+	return 0;
 }
 
 static int rk3568_set_pull(struct rockchip_pin_bank *bank,
@@ -233,16 +252,56 @@ static int rk3568_set_drive(struct rockchip_pin_bank *bank,
 	int reg;
 	u32 data;
 	u8 bit;
+	int drv = (1 << (strength + 1)) - 1;
+	int ret = 0;
 
 	rk3568_calc_drv_reg_and_bit(bank, pin_num, &regmap, &reg, &bit);
 
 	/* enable the write to the equivalent lower bits */
 	data = ((1 << RK3568_DRV_BITS_PER_PIN) - 1) << (bit + 16);
-	data |= (strength << bit);
+	data |= (drv << bit);
+
+	ret = regmap_write(regmap, reg, data);
+	if (ret)
+		return ret;
+
+	if (bank->bank_num == 1 && pin_num == 21)
+		reg = 0x0840;
+	else if (bank->bank_num == 2 && pin_num == 2)
+		reg = 0x0844;
+	else if (bank->bank_num == 2 && pin_num == 8)
+		reg = 0x0848;
+	else if (bank->bank_num == 3 && pin_num == 0)
+		reg = 0x084c;
+	else if (bank->bank_num == 3 && pin_num == 6)
+		reg = 0x0850;
+	else if (bank->bank_num == 4 && pin_num == 0)
+		reg = 0x0854;
+	else
+		return 0;
+
+	data = ((1 << RK3568_DRV_BITS_PER_PIN) - 1) << 16;
+	data |= drv;
 
 	return regmap_write(regmap, reg, data);
 }
 
+static int rk3568_set_schmitt(struct rockchip_pin_bank *bank,
+			      int pin_num, int enable)
+{
+	struct regmap *regmap;
+	int reg;
+	u32 data;
+	u8 bit;
+
+	rk3568_calc_schmitt_reg_and_bit(bank, pin_num, &regmap, &reg, &bit);
+
+	/* enable the write to the equivalent lower bits */
+	data = ((1 << RK3568_SCHMITT_BITS_PER_PIN) - 1) << (bit + 16);
+	data |= (enable << bit);
+
+	return regmap_write(regmap, reg, data);
+}
 static struct rockchip_pin_bank rk3568_pin_banks[] = {
 	PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", IOMUX_SOURCE_PMU | IOMUX_WIDTH_4BIT,
 			     IOMUX_SOURCE_PMU | IOMUX_WIDTH_4BIT,
@@ -277,6 +336,7 @@ static const struct rockchip_pin_ctrl rk3568_pin_ctrl = {
 	.set_mux		= rk3568_set_mux,
 	.set_pull		= rk3568_set_pull,
 	.set_drive		= rk3568_set_drive,
+	.set_schmitt		= rk3568_set_schmitt,
 };
 
 static const struct udevice_id rk3568_pinctrl_ids[] = {

commit e6251c431c89dde66f9131686782b0e3a6a942bc
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Nov 10 16:13:58 2020 +0800

    configs: rk3568: enable spl D-Cache
    
    Change-Id: I2d07f04e33fd1563e19b17ec6f3904149875be7b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index f0d434b277..16992dce9b 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -20,6 +20,7 @@ CONFIG_SMBIOS_PRODUCT_NAME=""
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_SPL_LOAD_FIT=y
+# CONFIG_SPL_SYS_DCACHE_OFF is not set
 CONFIG_BOOTDELAY=0
 CONFIG_CONSOLE_MUX=y
 CONFIG_SYS_CONSOLE_INFO_QUIET=y

commit 88bba81c6c9b0b0b61a2ae571fc0a04e96ee8637
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Nov 9 19:44:54 2020 +0800

    rockchip: dts: rk3568: Enable spi flash
    
    Change-Id: I36eb3471eb82e78db1bdd7114ce2bc30166e0e68
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/dts/rk3568-u-boot.dtsi b/arch/arm/dts/rk3568-u-boot.dtsi
index 2316ea3248..2b22755ca9 100644
--- a/arch/arm/dts/rk3568-u-boot.dtsi
+++ b/arch/arm/dts/rk3568-u-boot.dtsi
@@ -13,7 +13,7 @@
 
 	chosen {
 		stdout-path = &uart2;
-		u-boot,spl-boot-order = &sdhci;
+		u-boot,spl-boot-order = &sdhci, &spi_nand, &spi_nor;
 	};
 };
 

commit 70798a3509955c71a9030b5a6f4be58b930f5486
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Nov 9 19:30:44 2020 +0800

    configs: rk3568: Enable spi flash and raw nand
    
    Change-Id: Id69e4bdc3685a40826f2f13cb90cccc9cd960808
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index f4ca92debf..f0d434b277 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -12,6 +12,9 @@ CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_TARGET_EVB_RK3568=y
 CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3568-evb"
 CONFIG_SMBIOS_PRODUCT_NAME=""
 CONFIG_DEBUG_UART=y
@@ -30,6 +33,7 @@ CONFIG_SPL_SEPARATE_BSS=y
 CONFIG_SPL_SHA256_SUPPORT=y
 CONFIG_SPL_CRYPTO_SUPPORT=y
 CONFIG_SPL_HASH_SUPPORT=y
+CONFIG_SPL_MTD_SUPPORT=y
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
@@ -53,12 +57,14 @@ CONFIG_CMD_GPT=y
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_MISC is not set
 # CONFIG_CMD_CHARGE_DISPLAY is not set
+CONFIG_CMD_MTD_BLK=y
 # CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_ISO_PARTITION is not set
 CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
@@ -82,6 +88,15 @@ CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_SDMA=y
 CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_MTD=y
+CONFIG_MTD_BLK=y
+CONFIG_MTD_DEVICE=y
+CONFIG_NAND=y
+CONFIG_NAND_ROCKCHIP=y
+CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
+CONFIG_SYS_NAND_U_BOOT_OFFS=0x8000
+CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND=0x10000
+CONFIG_MTD_SPI_NAND=y
 CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_PHYLIB=y
 CONFIG_PHY=y
@@ -106,6 +121,7 @@ CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFE660000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_ROCKCHIP_SFC=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y

commit 69b42caea57374c26b552d7532464c1d21fb9165
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Nov 9 19:30:02 2020 +0800

    rockchip: rk3568: Support nand devices
    
    Change-Id: If8433d63e7f101f2f1837b6f613705b0ba18f72a
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h
index 1a8226cd4c..d06cbb88a6 100644
--- a/include/configs/rk3568_common.h
+++ b/include/configs/rk3568_common.h
@@ -11,7 +11,7 @@
 
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_TEXT_BASE		0x00000000
-#define CONFIG_SPL_MAX_SIZE		0x00020000
+#define CONFIG_SPL_MAX_SIZE		0x00028000
 #define CONFIG_SPL_BSS_START_ADDR	0x03fe0000
 #define CONFIG_SPL_BSS_MAX_SIZE		0x00002000
 #define CONFIG_SPL_STACK		0x03fe0000
@@ -31,6 +31,14 @@
 
 /* MMC/SD IP block */
 #define CONFIG_BOUNCE_BUFFER
+
+/* Nand */
+#define CONFIG_SYS_MAX_NAND_DEVICE	1
+#define CONFIG_SYS_NAND_ONFI_DETECTION
+#define CONFIG_SYS_NAND_PAGE_SIZE	2048
+#define CONFIG_SYS_NAND_PAGE_COUNT	64
+#define CONFIG_SYS_NAND_SIZE		(256 * 1024 * 1024)
+
 #define CONFIG_SUPPORT_EMMC_RPMB
 
 #define CONFIG_SYS_SDRAM_BASE		0

commit 801ca42bf678c1045031cd6e4398869361a20635
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Nov 10 10:00:37 2020 +0800

    clk: rockchip: rk3568: fix up the vpll register address
    
    Fix up the error description of TRM.
    
    Change-Id: Ie95482efea4e78505d361b5377ff4a23826d69e3
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3568.c b/drivers/clk/rockchip/clk_rk3568.c
index d7b4a851e2..29ebe3dca7 100644
--- a/drivers/clk/rockchip/clk_rk3568.c
+++ b/drivers/clk/rockchip/clk_rk3568.c
@@ -77,7 +77,7 @@ static struct rockchip_pll_clock rk3568_pll_clks[] = {
 		     RK3568_MODE_CON, 12, 10, 0, rk3568_pll_rates),
 	[PPLL] = PLL(pll_rk3328, PLL_PPLL, RK3568_PMU_PLL_CON(0),
 		     RK3568_PMU_MODE, 0, 10, 0, rk3568_pll_rates),
-	[HPLL] = PLL(pll_rk3328, PLL_HPLL, RK3568_PMU_PLL_CON(8),
+	[HPLL] = PLL(pll_rk3328, PLL_HPLL, RK3568_PMU_PLL_CON(16),
 		     RK3568_PMU_MODE, 2, 10, 0, rk3568_pll_rates),
 };
 
@@ -1654,7 +1654,7 @@ static ulong rk3568_dclk_vop_set_clk(struct rk3568_clk_priv *priv,
 	sel = (con & DCLK0_VOP_SEL_MASK) >> DCLK0_VOP_SEL_SHIFT;
 
 	if (sel == DCLK_VOP_SEL_HPLL) {
-		div = DIV_ROUND_UP(RK3568_VOP_PLL_LIMIT_FREQ, rate);
+		div = 1;
 		rk_clrsetreg(&cru->clksel_con[conid],
 			     DCLK0_VOP_DIV_MASK | DCLK0_VOP_SEL_MASK,
 			     (DCLK_VOP_SEL_HPLL << DCLK0_VOP_SEL_SHIFT) |

commit 125d49da417b3f291981c8b885622ecd94bbaed2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 9 20:29:59 2020 +0800

    scritps: fit-repack: clean coding style
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ic6284cd161eba58d1fad3f33f56eababbacca487

diff --git a/scripts/fit-repack.sh b/scripts/fit-repack.sh
index 044893f6e9..054c295c6c 100755
--- a/scripts/fit-repack.sh
+++ b/scripts/fit-repack.sh
@@ -59,11 +59,10 @@ function fit_repack()
 		exit 1
 	fi
 
-	IMAGE_BS=`ls -l ${IMAGE} | awk '{ print $5 }'`
-	ITB_SZ_KB=`expr ${IMAGE_BS} / ${COPIES} / 1024`
+	IMG_BS=`ls -l ${IMAGE} | awk '{ print $5 }'`
+	ITB_KB=`expr ${IMG_BS} / ${COPIES} / 1024`
 
-	rm -rf ${OUT}
-	mkdir -p ${OUT}
+	rm -rf ${OUT} && mkdir -p ${OUT}
 	${UNPACK} -f ${IMAGE} -o ${OUT}/
 	find ${DATA}/ -maxdepth 1 -type f | xargs cp -t ${OUT}/
 
@@ -73,7 +72,7 @@ function fit_repack()
 		for ((i = 0; i < ${COPIES}; i++));
 		do
 			cat ${ITB} >> ${IMAGE}
-			truncate -s %${ITB_SZ_KB}K ${IMAGE}
+			truncate -s %${ITB_KB}K ${IMAGE}
 		done
 	else
 		${MKIMAGE} -f ${ITS} -E -p ${OFFS} ${IMAGE}

commit 6b7fba5894f7b0f84d312215d6e51518907c14ed
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 9 19:45:19 2020 +0800

    make.sh: check pyelftools for 64-bit uboot.img
    
    arch/arm/mach-rockchip/decode_bl31.py depends on pyelftools.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ic7a0524df5b58472b5cb73e8b0c83a997426eb1b

diff --git a/make.sh b/make.sh
index 226f24431d..9308d14f9f 100755
--- a/make.sh
+++ b/make.sh
@@ -726,6 +726,14 @@ function pack_fit_image()
 	rm uboot.img trust*.img -rf
 	${SCRIPT_FIT} ${ARG_LIST_FIT}
 
+	if [ "${ARM64_TRUSTZONE}" == "y" ]; then
+		if ! fdtget -l uboot.img /images/atf@1 >/dev/null 2>&1 ; then
+			echo -e "\nERROR: Invalid uboot.img, please install: \"pip install pyelftools\""
+			echo
+			exit 1
+		fi
+	fi
+
 	echo "pack uboot.img okay! Input: ${INI_TRUST}"
 }
 

commit e475bd5dfda4565caed300507a432a05061c9ea9
Author: Ren Jianing <jianing.ren@rock-chips.com>
Date:   Tue Oct 27 10:58:12 2020 +0800

    phy: rockchip-inno-usb2: add usb2 phy support for rk3568
    
    RK3568 has two USB 2.0 PHYs, and each PHY has two ports, the
    OTG port of PHY0 support OTG mode with charging detection
    function, they are similar to previous Rockchip SoCs.
    
    However, there are three different designs for RK3568 USB 2.0 PHY.
    1. RK3568 uses independent USB GRF module for each USB 2.0 PHY.
    2. RK3568 accesses the registers of USB 2.0 PHY IP directly by APB.
    3. The two ports of USB 2.0 PHY share one interrupt.
    
    Signed-off-by: Ren Jianing <jianing.ren@rock-chips.com>
    Change-Id: Ia33d3de222a6c7f263290f4098d0a5e557a9d568

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index f067192b49..a6d8c8cf4f 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -8,8 +8,10 @@
 #include <dm.h>
 #include <dm/lists.h>
 #include <generic-phy.h>
-#include <syscon.h>
+#include <linux/ioport.h>
 #include <power/regulator.h>
+#include <regmap.h>
+#include <syscon.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 
@@ -150,18 +152,18 @@ struct rockchip_usb2phy_cfg {
 struct rockchip_usb2phy {
 	u8		dcd_retries;
 	u8		primary_retries;
-	void __iomem	*grf_base;
-	void __iomem	*usbgrf_base;
+	struct regmap	*grf_base;
+	struct regmap	*usbgrf_base;
 	struct udevice	*vbus_supply[USB2PHY_NUM_PORTS];
 	const struct rockchip_usb2phy_cfg	*phy_cfg;
 };
 
-static inline void __iomem *get_reg_base(struct rockchip_usb2phy *rphy)
+static inline struct regmap *get_reg_base(struct rockchip_usb2phy *rphy)
 {
 	return !rphy->usbgrf_base ? rphy->grf_base : rphy->usbgrf_base;
 }
 
-static inline int property_enable(void __iomem *base,
+static inline int property_enable(struct regmap *base,
 				  const struct usb2phy_reg *reg, bool en)
 {
 	u32 val, mask, tmp;
@@ -170,16 +172,16 @@ static inline int property_enable(void __iomem *base,
 	mask = GENMASK(reg->bitend, reg->bitstart);
 	val = (tmp << reg->bitstart) | (mask << U2PHY_BIT_WRITEABLE_SHIFT);
 
-	return writel(val, base + reg->offset);
+	return regmap_write(base, reg->offset, val);
 }
 
-static inline bool property_enabled(void __iomem *base,
+static inline bool property_enabled(struct regmap *base,
 				    const struct usb2phy_reg *reg)
 {
 	u32 tmp, orig;
 	u32 mask = GENMASK(reg->bitend, reg->bitstart);
 
-	orig = readl(base + reg->offset);
+	regmap_read(base, reg->offset, &orig);
 
 	tmp = (orig & mask) >> reg->bitstart;
 
@@ -205,7 +207,7 @@ static const char *chg_to_string(enum power_supply_type chg_type)
 static void rockchip_chg_enable_dcd(struct rockchip_usb2phy *rphy,
 				    bool en)
 {
-	void __iomem *base = get_reg_base(rphy);
+	struct regmap *base = get_reg_base(rphy);
 
 	property_enable(base, &rphy->phy_cfg->chg_det.rdm_pdwn_en, en);
 	property_enable(base, &rphy->phy_cfg->chg_det.idp_src_en, en);
@@ -214,7 +216,7 @@ static void rockchip_chg_enable_dcd(struct rockchip_usb2phy *rphy,
 static void rockchip_chg_enable_primary_det(struct rockchip_usb2phy *rphy,
 					    bool en)
 {
-	void __iomem *base = get_reg_base(rphy);
+	struct regmap *base = get_reg_base(rphy);
 
 	property_enable(base, &rphy->phy_cfg->chg_det.vdp_src_en, en);
 	property_enable(base, &rphy->phy_cfg->chg_det.idm_sink_en, en);
@@ -223,7 +225,7 @@ static void rockchip_chg_enable_primary_det(struct rockchip_usb2phy *rphy,
 static void rockchip_chg_enable_secondary_det(struct rockchip_usb2phy *rphy,
 					      bool en)
 {
-	void __iomem *base = get_reg_base(rphy);
+	struct regmap *base = get_reg_base(rphy);
 
 	property_enable(base, &rphy->phy_cfg->chg_det.vdm_src_en, en);
 	property_enable(base, &rphy->phy_cfg->chg_det.idp_sink_en, en);
@@ -232,13 +234,13 @@ static void rockchip_chg_enable_secondary_det(struct rockchip_usb2phy *rphy,
 static bool rockchip_chg_primary_det_retry(struct rockchip_usb2phy *rphy)
 {
 	bool vout = false;
+	struct regmap *base = get_reg_base(rphy);
 
 	while (rphy->primary_retries--) {
 		/* voltage source on DP, probe on DM */
 		rockchip_chg_enable_primary_det(rphy, true);
 		mdelay(CHG_PRIMARY_DET_TIME);
-		vout = property_enabled(rphy->grf_base,
-					&rphy->phy_cfg->chg_det.cp_det);
+		vout = property_enabled(base, &rphy->phy_cfg->chg_det.cp_det);
 		if (vout)
 			break;
 	}
@@ -253,7 +255,7 @@ int rockchip_chg_get_type(void)
 	enum power_supply_type chg_type;
 	struct rockchip_usb2phy *rphy;
 	struct udevice *udev;
-	void __iomem *base;
+	struct regmap *base;
 	bool is_dcd, vout;
 	int ret;
 
@@ -287,8 +289,7 @@ int rockchip_chg_get_type(void)
 		mdelay(CHG_DCD_POLL_TIME);
 
 		/* get data contact detection status */
-		is_dcd = property_enabled(rphy->grf_base,
-					  &rphy->phy_cfg->chg_det.dp_det);
+		is_dcd = property_enabled(base, &rphy->phy_cfg->chg_det.dp_det);
 
 		if (is_dcd || !rphy->dcd_retries) {
 			/*
@@ -302,8 +303,7 @@ int rockchip_chg_get_type(void)
 	}
 
 	mdelay(CHG_PRIMARY_DET_TIME);
-	vout = property_enabled(rphy->grf_base,
-				&rphy->phy_cfg->chg_det.cp_det);
+	vout = property_enabled(base, &rphy->phy_cfg->chg_det.cp_det);
 	rockchip_chg_enable_primary_det(rphy, false);
 	if (vout) {
 		/* stage 3, voltage source on DM, probe on DP */
@@ -331,8 +331,7 @@ int rockchip_chg_get_type(void)
 	}
 
 	mdelay(CHG_SECONDARY_DET_TIME);
-	vout = property_enabled(rphy->grf_base,
-				&rphy->phy_cfg->chg_det.dcp_det);
+	vout = property_enabled(base, &rphy->phy_cfg->chg_det.dcp_det);
 	/* stage 4, turn off voltage source */
 	rockchip_chg_enable_secondary_det(rphy, false);
 	if (vout)
@@ -365,7 +364,7 @@ void otg_phy_init(struct dwc2_udc *dev)
 	const struct rockchip_usb2phy_port_cfg *port_cfg;
 	struct rockchip_usb2phy *rphy;
 	struct udevice *udev;
-	void __iomem *base;
+	struct regmap *base;
 	int ret;
 
 	ret = uclass_get_device_by_name(UCLASS_PHY, "usb2-phy", &udev);
@@ -393,7 +392,7 @@ static struct udevice *rockchip_usb2phy_check_vbus(struct phy *phy)
 	struct udevice *parent = phy->dev->parent;
 	struct rockchip_usb2phy *rphy = dev_get_priv(parent);
 	const struct rockchip_usb2phy_port_cfg *port_cfg;
-	void __iomem *base = get_reg_base(rphy);
+	struct regmap *base = get_reg_base(rphy);
 	struct udevice *vbus = NULL;
 	bool iddig = true;
 
@@ -416,7 +415,7 @@ static int rockchip_usb2phy_init(struct phy *phy)
 	struct udevice *parent = phy->dev->parent;
 	struct rockchip_usb2phy *rphy = dev_get_priv(parent);
 	const struct rockchip_usb2phy_port_cfg *port_cfg;
-	void __iomem *base = get_reg_base(rphy);
+	struct regmap *base = get_reg_base(rphy);
 
 	if (phy->id == USB2PHY_PORT_OTG) {
 		port_cfg = &rphy->phy_cfg->port_cfgs[USB2PHY_PORT_OTG];
@@ -440,7 +439,7 @@ static int rockchip_usb2phy_exit(struct phy *phy)
 	struct udevice *parent = phy->dev->parent;
 	struct rockchip_usb2phy *rphy = dev_get_priv(parent);
 	const struct rockchip_usb2phy_port_cfg *port_cfg;
-	void __iomem *base = get_reg_base(rphy);
+	struct regmap *base = get_reg_base(rphy);
 
 	if (phy->id == USB2PHY_PORT_OTG) {
 		port_cfg = &rphy->phy_cfg->port_cfgs[USB2PHY_PORT_OTG];
@@ -546,31 +545,55 @@ static int rockchip_usb2phy_probe(struct udevice *dev)
 	const struct rockchip_usb2phy_cfg *phy_cfgs;
 	struct rockchip_usb2phy *rphy = dev_get_priv(dev);
 	struct udevice *parent = dev->parent;
+	struct udevice *syscon;
+	struct resource res;
 	u32 reg, index;
+	int ret;
 
 	if (!strncmp(parent->name, "root_driver", 11) &&
-	    dev_read_bool(dev, "rockchip,grf"))
-		rphy->grf_base = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	else
-		rphy->grf_base = (void __iomem *)dev_read_addr(parent);
+	    dev_read_bool(dev, "rockchip,grf")) {
+		ret = uclass_get_device_by_phandle(UCLASS_SYSCON, dev,
+						   "rockchip,grf", &syscon);
+		if (ret) {
+			dev_err(dev, "get syscon grf failed\n");
+			return ret;
+		}
+
+		rphy->grf_base = syscon_get_regmap(syscon);
+	} else {
+		rphy->grf_base = syscon_get_regmap(parent);
+	}
 
 	if (rphy->grf_base <= 0) {
-		dev_err(dev, "get syscon grf failed\n");
+		dev_err(dev, "get syscon grf regmap failed\n");
 		return -EINVAL;
 	}
 
 	if (dev_read_bool(dev, "rockchip,usbgrf")) {
-		rphy->usbgrf_base =
-			syscon_get_first_range(ROCKCHIP_SYSCON_USBGRF);
-		if (rphy->usbgrf_base <= 0) {
+		ret = uclass_get_device_by_phandle(UCLASS_SYSCON, dev,
+						   "rockchip,usbgrf", &syscon);
+		if (ret) {
 			dev_err(dev, "get syscon usbgrf failed\n");
+			return ret;
+		}
+
+		rphy->usbgrf_base = syscon_get_regmap(syscon);
+		if (rphy->usbgrf_base <= 0) {
+			dev_err(dev, "get syscon usbgrf regmap failed\n");
 			return -EINVAL;
 		}
 	} else {
 		rphy->usbgrf_base = NULL;
 	}
 
-	if (ofnode_read_u32(dev_ofnode(dev), "reg", &reg)) {
+	if (!strncmp(parent->name, "root_driver", 11)) {
+		ret = dev_read_resource(dev, 0, &res);
+		reg = res.start;
+	} else {
+		ret = ofnode_read_u32(dev_ofnode(dev), "reg", &reg);
+	}
+
+	if (ret) {
 		dev_err(dev, "could not read reg\n");
 		return -EINVAL;
 	}
@@ -605,12 +628,12 @@ static int rockchip_usb2phy_probe(struct udevice *dev)
 
 static int rk322x_usb2phy_tuning(struct rockchip_usb2phy *rphy)
 {
-	void __iomem *base = get_reg_base(rphy);
+	struct regmap *base = get_reg_base(rphy);
 	int ret = 0;
 
 	/* Open pre-emphasize in non-chirp state for PHY0 otg port */
 	if (rphy->phy_cfg->reg == 0x760)
-		ret = writel(0x00070004, base + 0x76c);
+		ret = regmap_write(base, 0x76c, 0x00070004);
 
 	return ret;
 }
@@ -1028,6 +1051,80 @@ static const struct rockchip_usb2phy_cfg rv1108_phy_cfgs[] = {
 	{ /* sentinel */ }
 };
 
+static const struct rockchip_usb2phy_cfg rk3568_phy_cfgs[] = {
+	{
+		.reg = 0xfe8a0000,
+		.num_ports	= 2,
+		.clkout_ctl	= { 0x0008, 4, 4, 1, 0 },
+		.port_cfgs	= {
+			[USB2PHY_PORT_OTG] = {
+				.phy_sus	= { 0x0000, 8, 0, 0, 0x1d1 },
+				.bvalid_det_en	= { 0x0080, 2, 2, 0, 1 },
+				.bvalid_det_st	= { 0x0084, 2, 2, 0, 1 },
+				.bvalid_det_clr = { 0x0088, 2, 2, 0, 1 },
+				.iddig_output	= { 0x0000, 10, 10, 0, 1 },
+				.iddig_en	= { 0x0000, 9, 9, 0, 1 },
+				.idfall_det_en	= { 0x0080, 5, 5, 0, 1 },
+				.idfall_det_st	= { 0x0084, 5, 5, 0, 1 },
+				.idfall_det_clr = { 0x008c, 5, 5, 0, 1 },
+				.idrise_det_en	= { 0x0080, 4, 4, 0, 1 },
+				.idrise_det_st	= { 0x0084, 4, 4, 0, 1 },
+				.idrise_det_clr = { 0x008c, 4, 4, 0, 1 },
+				.ls_det_en	= { 0x0080, 0, 0, 0, 1 },
+				.ls_det_st	= { 0x0084, 0, 0, 0, 1 },
+				.ls_det_clr	= { 0x008c, 0, 0, 0, 1 },
+				.utmi_avalid	= { 0x00c0, 10, 10, 0, 1 },
+				.utmi_bvalid	= { 0x00c0, 9, 9, 0, 1 },
+				.utmi_iddig	= { 0x00c0, 6, 6, 0, 1 },
+				.utmi_ls	= { 0x00c0, 5, 4, 0, 1 },
+			},
+			[USB2PHY_PORT_HOST] = {
+				.phy_sus	= { 0x0004, 8, 0, 0, 0x1d1 },
+				.ls_det_en	= { 0x0080, 1, 1, 0, 1 },
+				.ls_det_st	= { 0x0084, 1, 1, 0, 1 },
+				.ls_det_clr	= { 0x008c, 1, 1, 0, 1 },
+				.utmi_ls	= { 0x00c0, 17, 16, 0, 1 },
+				.utmi_hstdet	= { 0x00c0, 19, 19, 0, 1 }
+			}
+		},
+		.chg_det = {
+			.opmode		= { 0x0000, 3, 0, 5, 1 },
+			.cp_det		= { 0x00c0, 24, 24, 0, 1 },
+			.dcp_det	= { 0x00c0, 23, 23, 0, 1 },
+			.dp_det		= { 0x00c0, 25, 25, 0, 1 },
+			.idm_sink_en	= { 0x0008, 8, 8, 0, 1 },
+			.idp_sink_en	= { 0x0008, 7, 7, 0, 1 },
+			.idp_src_en	= { 0x0008, 9, 9, 0, 1 },
+			.rdm_pdwn_en	= { 0x0008, 10, 10, 0, 1 },
+			.vdm_src_en	= { 0x0008, 12, 12, 0, 1 },
+			.vdp_src_en	= { 0x0008, 11, 11, 0, 1 },
+		},
+	},
+	{
+		.reg = 0xfe8b0000,
+		.num_ports	= 2,
+		.clkout_ctl	= { 0x0008, 4, 4, 1, 0 },
+		.port_cfgs	= {
+			[USB2PHY_PORT_OTG] = {
+				.phy_sus	= { 0x0000, 8, 0, 0, 0x1d1 },
+				.ls_det_en	= { 0x0080, 0, 0, 0, 1 },
+				.ls_det_st	= { 0x0084, 0, 0, 0, 1 },
+				.ls_det_clr	= { 0x008c, 0, 0, 0, 1 },
+				.utmi_ls	= { 0x00c0, 5, 4, 0, 1 },
+				.utmi_hstdet	= { 0x00c0, 7, 7, 0, 1 }
+			},
+			[USB2PHY_PORT_HOST] = {
+				.phy_sus	= { 0x0004, 8, 0, 0, 0x1d1 },
+				.ls_det_en	= { 0x0080, 1, 1, 0, 1 },
+				.ls_det_st	= { 0x0084, 1, 1, 0, 1 },
+				.ls_det_clr	= { 0x008c, 1, 1, 0, 1 },
+				.utmi_ls	= { 0x00c0, 17, 16, 0, 1 },
+				.utmi_hstdet	= { 0x00c0, 19, 19, 0, 1 }
+			}
+		},
+	},
+	{ /* sentinel */ }
+};
 static const struct udevice_id rockchip_usb2phy_ids[] = {
 	{ .compatible = "rockchip,rk1808-usb2phy", .data = (ulong)&rk1808_phy_cfgs },
 	{ .compatible = "rockchip,rk3128-usb2phy", .data = (ulong)&rk312x_phy_cfgs },
@@ -1036,6 +1133,7 @@ static const struct udevice_id rockchip_usb2phy_ids[] = {
 	{ .compatible = "rockchip,rk3328-usb2phy", .data = (ulong)&rk3328_phy_cfgs },
 	{ .compatible = "rockchip,rk3368-usb2phy", .data = (ulong)&rk3368_phy_cfgs },
 	{ .compatible = "rockchip,rk3399-usb2phy", .data = (ulong)&rk3399_phy_cfgs },
+	{ .compatible = "rockchip,rk3568-usb2phy", .data = (ulong)&rk3568_phy_cfgs },
 	{ .compatible = "rockchip,rv1108-usb2phy", .data = (ulong)&rv1108_phy_cfgs },
 	{ }
 };

commit 3aaa96e8af28dc2847ab3d76da567079c5ed14d6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 9 17:14:16 2020 +0800

    rockchip: boot-mode: reinitialize static variable "boot_mode"
    
    Special handle:
       Once the BCB offset changes, reinitialize "boot_mode".
    
    Background:
       1. there are two Android BCB at the 0x00 and 0x20 offset in
          misc.img to compatible legacy(0x20) SDK.
       2. android_bcb_msg_sector_offset() is for android image:
          return 0x20 if image version < 10, otherwise 0x00.
       3. If not android image, BCB at 0x20 is the valid one.
    
    U-Boot can support booting both FIT & Android image, if FIT
    boot flow enters here early than Android, the "boot_mode" is
    set as BOOT_MODE_RECOVERY according to BCB at 0x20 offset.
    After that, this function always return static variable "boot_mode"
    as BOOT_MODE_RECOVERY even android(>=10) boot flow enter here.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I0ed05ba1b18447a58d3faff37ac50ecc79fab374

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index 505e9b31d8..d31b763352 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -37,13 +37,35 @@ int rockchip_get_boot_mode(void)
 	uint32_t reg_boot_mode;
 	char *env_reboot_mode;
 	static int boot_mode = -1;	/* static */
+	static int bcb_offset = -1;	/* static */
 	int clear_boot_reg = 0;
 	int ret, cnt;
 #ifdef CONFIG_ANDROID_BOOT_IMAGE
-	u32 bcb_offset = android_bcb_msg_sector_offset();
+	u32 offset = android_bcb_msg_sector_offset();
 #else
-	u32 bcb_offset = BCB_MESSAGE_BLK_OFFSET;
+	u32 offset = BCB_MESSAGE_BLK_OFFSET;
 #endif
+	/*
+	 * Special handle:
+	 *    Once the BCB offset changes, reinitalize "boot_mode".
+	 *
+	 * Background:
+	 *    1. there are two Android BCB at the 0x00 and 0x20 offset in
+	 *       misc.img to compatible legacy(0x20) SDK.
+	 *    2. android_bcb_msg_sector_offset() is for android image:
+	 *       return 0x20 if image version < 10, otherwise 0x00.
+	 *    3. If not android image, BCB at 0x20 is the valid one.
+	 *
+	 * U-Boot can support booting both FIT & Android image, if FIT
+	 * boot flow enters here early than Android, the "boot_mode" is
+	 * set as BOOT_MODE_RECOVERY according to BCB at 0x20 offset.
+	 * After that, this function always return static variable "boot_mode"
+	 * as BOOT_MODE_RECOVERY even android(>=10) boot flow enter here.
+	 */
+	if (bcb_offset != offset) {
+		boot_mode = -1;
+		bcb_offset = offset;
+	}
 
 	/*
 	 * Here, we mainly check for:

commit bec557fbbd2d5df929dd0804d2b7dbe8ad249fe5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 9 16:29:13 2020 +0800

    configs: rk3568: enable avb image support
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ib2a2d9550007d94c553807017cee6f26e8bd0ab6

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index 205bd04459..f4ca92debf 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -22,6 +22,7 @@ CONFIG_CONSOLE_MUX=y
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_ANDROID_AVB=y
 CONFIG_SPL_BOARD_INIT=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
@@ -131,3 +132,8 @@ CONFIG_SHA512=y
 CONFIG_LZ4=y
 CONFIG_SPL_GZIP=y
 CONFIG_ERRNO_STR=y
+CONFIG_AVB_LIBAVB=y
+CONFIG_AVB_LIBAVB_AB=y
+CONFIG_AVB_LIBAVB_ATX=y
+CONFIG_AVB_LIBAVB_USER=y
+CONFIG_RK_AVB_LIBAVB_USER=y

commit 253ea6c67d893ecdeafbdda3606b99c1307e2693
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 9 16:28:17 2020 +0800

    common: android: independent on optee client
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I5c124c7bfcdfd3c2972a5310046b633324e3bdf0

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index c68572ba31..1ef2925843 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -997,11 +997,12 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	uint8_t vboot_flag = 0;
 	disk_partition_t vbmeta_part_info;
 
+#ifdef CONFIG_OPTEE_CLIENT
 	if (trusty_read_vbootkey_enable_flag(&vboot_flag)) {
 		printf("Can't read vboot flag\n");
 		return -1;
 	}
-
+#endif
 	if (vboot_flag) {
 		printf("Vboot=1, SecureBoot enabled, AVB verify\n");
 		if (android_slot_verify(boot_partname, &load_address,

commit ae205b953a21b0dc78985e65f782864ac4219590
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 9 16:27:24 2020 +0800

    lib: avb: independent on optee client
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I1bab69baf97b5174024db25278cf30efafd3e34e

diff --git a/lib/avb/libavb_user/avb_ops_user.c b/lib/avb/libavb_user/avb_ops_user.c
index d51866a696..e1119c2363 100644
--- a/lib/avb/libavb_user/avb_ops_user.c
+++ b/lib/avb/libavb_user/avb_ops_user.c
@@ -252,8 +252,13 @@ static AvbIOResult read_rollback_index(AvbOps *ops,
 		}
 
 		return ret;
+#else
+		*out_rollback_index = 0;
+
+		return AVB_IO_RESULT_OK;
 #endif
 	}
+
 	return AVB_IO_RESULT_ERROR_IO;
 }
 
@@ -304,6 +309,10 @@ static AvbIOResult read_is_device_unlocked(AvbOps *ops, bool *out_is_unlocked)
 			printf("%s: trusty_read_lock_state failed\n", __FILE__);
 		}
 		return ret;
+#else
+		*out_is_unlocked = 1;
+
+		return AVB_IO_RESULT_OK;
 #endif
 	}
 	return AVB_IO_RESULT_ERROR_IO;
diff --git a/lib/avb/rk_avb_user/rk_avb_ops_user.c b/lib/avb/rk_avb_user/rk_avb_ops_user.c
index 89b98751f4..abc6bd40cb 100644
--- a/lib/avb/rk_avb_user/rk_avb_ops_user.c
+++ b/lib/avb/rk_avb_user/rk_avb_ops_user.c
@@ -370,13 +370,10 @@ out:
 int rk_avb_read_bootloader_locked_flag(uint8_t *flag)
 {
 #ifdef CONFIG_OPTEE_CLIENT
-	if (trusty_read_vbootkey_enable_flag(flag)) {
+	if (trusty_read_vbootkey_enable_flag(flag))
 		return -1;
-	}
-	return 0;
-#else
-	return -1;
 #endif
+	return 0;
 }
 
 #ifdef CONFIG_SUPPORT_EMMC_RPMB

commit 80b8cdeb0b2ea4efaf24dfe3b8c85777d7759af0
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Mon Nov 9 10:58:01 2020 +0800

    configs: rk3568: enable SDHCI SDMA
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: I1fa29a7d0349aa9ed0bb9a8f934061d1da093c52

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index e7e9ad16d6..205bd04459 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -79,6 +79,7 @@ CONFIG_ADC_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
 CONFIG_MMC_SDHCI_ROCKCHIP=y
 CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_PHYLIB=y

commit 311b34e2f1edac549a65b8b8e543ca74d04d01d1
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Mon Nov 9 10:54:46 2020 +0800

    dts: enable hs200 mode for rk3568
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: Ia6108713cf09372b35bbc0ae35ca179358a83362

diff --git a/arch/arm/dts/rk3568-u-boot.dtsi b/arch/arm/dts/rk3568-u-boot.dtsi
index d0192a910c..2316ea3248 100644
--- a/arch/arm/dts/rk3568-u-boot.dtsi
+++ b/arch/arm/dts/rk3568-u-boot.dtsi
@@ -168,6 +168,7 @@
 
 &sdhci {
 	u-boot,dm-spl;
+	mmc-hs200-1_8v;
 	status = "okay";
 };
 

commit 28b3b131e9688c079c6d4fffa8d58c245422460e
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Mon Nov 9 10:50:39 2020 +0800

    drivers: mmc: rockchip: fix phy dll config for hs200
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: Ie72f2414eca2856102e0a477668ec2729396cd25

diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index 28767f0088..c6f08f1041 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -38,10 +38,11 @@ DECLARE_GLOBAL_DATA_PTR;
 
 /* Rockchip specific Registers */
 #define DWCMSHC_EMMC_DLL_CTRL		0x800
-#define DWCMSHC_EMMC_DLL_TXCLK		0x804
-#define DWCMSHC_EMMC_DLL_RXCLK		0x808
+#define DWCMSHC_EMMC_DLL_RXCLK		0x804
+#define DWCMSHC_EMMC_DLL_TXCLK		0x808
 #define DWCMSHC_EMMC_DLL_STRBIN		0x80c
-#define DWCMSHC_EMMC_DLL_STATUS0	0x820
+#define DWCMSHC_EMMC_DLL_STATUS0	0x840
+#define DWCMSHC_EMMC_DLL_STATUS1	0x844
 #define DWCMSHC_EMMC_DLL_START		BIT(0)
 #define DWCMSHC_EMMC_DLL_RXCLK_SRCSEL	29
 #define DWCMSHC_EMMC_DLL_START_POINT	16
@@ -302,43 +303,52 @@ static int rk3568_emmc_phy_init(struct udevice *dev)
 	struct rockchip_sdhc *prv = dev_get_priv(dev);
 	struct sdhci_host *host = &prv->host;
 	u32 extra;
-	int timeout = 500;
-
-	sdhci_writel(host, BIT(1), DWCMSHC_EMMC_DLL_CTRL);
-	udelay(1);
-	sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_CTRL);
-	/* Init DLL settings */
-	extra = 0x5 << DWCMSHC_EMMC_DLL_START_POINT |
-		0x2 << DWCMSHC_EMMC_DLL_INC |
-		DWCMSHC_EMMC_DLL_START;
-	sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_CTRL);
-	while(1) {
-		if (timeout < 0)
-			return ETIMEDOUT;
-		if (sdhci_readl(host, DWCMSHC_EMMC_DLL_STATUS0) == DLL_LOCK_WO_TMOUT(extra))
-			break;
-		udelay(1);
-		timeout--;
-	}
 
-	/* FixMe: clk inverter? */
-	extra = DWCMSHC_EMMC_DLL_DLYENA |
-		DLL_RXCLK_NO_INVERTER << DWCMSHC_EMMC_DLL_RXCLK_SRCSEL;
+	extra = DLL_RXCLK_NO_INVERTER << DWCMSHC_EMMC_DLL_RXCLK_SRCSEL;
 	sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_RXCLK);
-	extra = DWCMSHC_EMMC_DLL_DLYENA |
-		DLL_RXCLK_TAPNUM_DEFAULT |
-		DLL_RXCLK_TAPNUM_FROM_SW;
-	sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_TXCLK);
-	extra = DWCMSHC_EMMC_DLL_DLYENA |
-		DLL_STRBIN_TAPNUM_DEFAULT;
-	sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_STRBIN);
-
 	return 0;
 }
 
 static int rk3568_sdhci_emmc_set_clock(struct sdhci_host *host, unsigned int clock)
 {
-	return rk3399_emmc_set_clock(host, clock);
+	u32 extra;
+	int timeout = 500, ret;
+
+	ret = rk3399_emmc_set_clock(host, clock);
+
+	if (clock >= 50 * 1000000) {
+		sdhci_writel(host, BIT(1), DWCMSHC_EMMC_DLL_CTRL);
+		udelay(1);
+		sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_CTRL);
+		/* Init DLL settings */
+		extra = 0x5 << DWCMSHC_EMMC_DLL_START_POINT |
+			0x2 << DWCMSHC_EMMC_DLL_INC |
+			DWCMSHC_EMMC_DLL_START;
+		sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_CTRL);
+
+		while (1) {
+			if (timeout < 0)
+				return -ETIMEDOUT;
+			if (DLL_LOCK_WO_TMOUT((sdhci_readl(host, DWCMSHC_EMMC_DLL_STATUS0))))
+				break;
+			udelay(1);
+			timeout--;
+		}
+
+		extra = DWCMSHC_EMMC_DLL_DLYENA;
+		sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_RXCLK);
+
+		extra = DWCMSHC_EMMC_DLL_DLYENA |
+			DLL_RXCLK_TAPNUM_DEFAULT |
+			DLL_RXCLK_TAPNUM_FROM_SW;
+		sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_TXCLK);
+
+		extra = DWCMSHC_EMMC_DLL_DLYENA |
+			DLL_STRBIN_TAPNUM_DEFAULT;
+		sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_STRBIN);
+	}
+
+	return ret;
 }
 
 static int rk3568_emmc_get_phy(struct udevice *dev)

commit 2cb6220e867a6067b5db1d22cc36f695145919e7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 9 09:25:59 2020 +0800

    Revert "configs: rk3568: disable DTBO"
    
    This reverts commit 08f4453d592868e75a8de69b20953fc95324d235.
    
    Change-Id: I1d37553bc3a90e4f08506a02428cb2ea750c7498

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index 2c767247dc..e7e9ad16d6 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -37,6 +37,7 @@ CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set
+CONFIG_CMD_DTIMG=y
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set

commit 713cdac3a78b5a7e9dae635116826b7feeeff3b0
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 9 10:06:44 2020 +0800

    common: android: allow failed to overly dtbo
    
    Restore main fdt if it's destroyed by fdt_overlay_apply()
    when overlay failed.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Id26085f2df89d208caadeb3c4ce33f21f896ee22

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index d2cae4681c..c68572ba31 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -797,9 +797,11 @@ int android_fdt_overlay_apply(void *fdt_addr)
 	struct blk_desc *dev_desc;
 	const char *part_boot;
 	disk_partition_t part_info;
+	char *fdt_backup;
 	char *part_dtbo;
 	char buf[32] = {0};
 	ulong fdt_dtbo = -1;
+	u32 totalsize;
 	int index = -1;
 	int ret;
 
@@ -843,6 +845,7 @@ int android_fdt_overlay_apply(void *fdt_addr)
 	ret = android_get_dtbo(&fdt_dtbo, (void *)hdr, &index, part_dtbo);
 	if (!ret) {
 		phys_size_t fdt_size;
+
 		/* Must incease size before overlay */
 		fdt_size = fdt_totalsize((void *)fdt_addr) +
 				fdt_totalsize((void *)fdt_dtbo);
@@ -853,6 +856,16 @@ int android_fdt_overlay_apply(void *fdt_addr)
 				       (phys_addr_t)fdt_addr,
 					fdt_size + CONFIG_SYS_FDT_PAD))
 			goto out;
+		/*
+		 * Backup main fdt in case of being destroyed by
+		 * fdt_overlay_apply() when it overlys failed.
+		 */
+		totalsize = fdt_totalsize(fdt_addr);
+		fdt_backup = malloc(totalsize);
+		if (!fdt_backup)
+			goto out;
+
+		memcpy(fdt_backup, fdt_addr, totalsize);
 		fdt_increase_size(fdt_addr, fdt_totalsize((void *)fdt_dtbo));
 		ret = fdt_overlay_apply(fdt_addr, (void *)fdt_dtbo);
 		if (!ret) {
@@ -860,8 +873,11 @@ int android_fdt_overlay_apply(void *fdt_addr)
 			env_update("bootargs", buf);
 			printf("ANDROID: fdt overlay OK\n");
 		} else {
+			memcpy(fdt_addr, fdt_backup, totalsize);
 			printf("ANDROID: fdt overlay failed, ret=%d\n", ret);
 		}
+
+		free(fdt_backup);
 	}
 
 out:

commit 2217694352664a64f5852f1f08719a8e87af78a5
Author: Weiwen Chen <cww@rock-chips.com>
Date:   Fri Nov 6 15:03:08 2020 +0800

    configs: rv1126: ethernet: enable random address
    
    Signed-off-by: Weiwen Chen <cww@rock-chips.com>
    Change-Id: I8a43f2479e339149f936daaf53f8730c31f2aa7b

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index ebdc3e918f..658d8a662a 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -83,6 +83,7 @@ CONFIG_SPL_DTB_MINIMUM=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_OF_U_BOOT_REMOVE_PROPS="interrupt-parent"
+CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y

commit 08f4453d592868e75a8de69b20953fc95324d235
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Nov 8 21:21:54 2020 +0800

    configs: rk3568: disable DTBO
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I194a2eadb16bffd75c8ab8b3c390bfb37873bec3

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index e7e9ad16d6..2c767247dc 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -37,7 +37,6 @@ CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set
-CONFIG_CMD_DTIMG=y
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set

commit d982a3cdf9587912d87dd7ef13d94f22ea9f7bc4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Nov 8 21:21:21 2020 +0800

    rockchip: chip info: add rk3568 support
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I08e347709d870c5c65265a31ccfb1ccd370ef606

diff --git a/arch/arm/mach-rockchip/chip_info.c b/arch/arm/mach-rockchip/chip_info.c
index aaddd0de94..90a22f2c63 100644
--- a/arch/arm/mach-rockchip/chip_info.c
+++ b/arch/arm/mach-rockchip/chip_info.c
@@ -63,6 +63,8 @@ static int rockchip_get_chip_info(unsigned int chip_info[])
 	chip_info[0] = 0x33333236;
 #elif defined(CONFIG_ROCKCHIP_PX30)
 	chip_info[0] = 0x50583330;
+#elif defined(CONFIG_ROCKCHIP_RK3568)
+	chip_info[0] = 0x33353638;
 #endif
 
 	return 0;

commit ee4d695f5eba37791a931efe0bd1b665b815dcd5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Nov 8 16:31:59 2020 +0800

    rockchip: make_fit_atf/optee: add "arch" property for fdt node
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I129f2cc7a395d48c83e5ab01fb12b73eda614ed3

diff --git a/arch/arm/mach-rockchip/make_fit_atf.sh b/arch/arm/mach-rockchip/make_fit_atf.sh
index 3acb3106fb..43a01bb392 100755
--- a/arch/arm/mach-rockchip/make_fit_atf.sh
+++ b/arch/arm/mach-rockchip/make_fit_atf.sh
@@ -153,6 +153,7 @@ cat << EOF
 			description = "U-Boot dtb";
 			data = /incbin/("./u-boot.dtb");
 			type = "flat_dt";
+			arch = "${ARCH}";
 			compression = "none";
 			hash {
 				algo = "sha256";
diff --git a/arch/arm/mach-rockchip/make_fit_optee.sh b/arch/arm/mach-rockchip/make_fit_optee.sh
index a24ab7f137..20200dea6f 100755
--- a/arch/arm/mach-rockchip/make_fit_optee.sh
+++ b/arch/arm/mach-rockchip/make_fit_optee.sh
@@ -117,6 +117,7 @@ cat << EOF
 			description = "U-Boot dtb";
 			data = /incbin/("./u-boot.dtb");
 			type = "flat_dt";
+			arch = "${ARCH}";
 			compression = "none";
 			hash {
 				algo = "sha256";

commit d41e2874c49bae8a6c9eb5f142a07d745de17f5c
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Sun Nov 8 20:28:41 2020 +0800

    clk: rockchip: rk3568: emmc support 52MHz
    
    Change-Id: I54841ec5c7a5030bbbf9fa5b6b6fdc742250a127
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3568.c b/drivers/clk/rockchip/clk_rk3568.c
index 088aba3f0c..d7b4a851e2 100644
--- a/drivers/clk/rockchip/clk_rk3568.c
+++ b/drivers/clk/rockchip/clk_rk3568.c
@@ -1527,6 +1527,7 @@ static ulong rk3568_emmc_set_clk(struct rk3568_clk_priv *priv, ulong rate)
 	case OSC_HZ:
 		src_clk = CCLK_EMMC_SEL_24M;
 		break;
+	case 52 * MHz:
 	case 50 * MHz:
 		src_clk = CCLK_EMMC_SEL_50M;
 		break;

commit d01aebd267a69098dbfd13e260d0f1d79dd8d5b4
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Sun Nov 8 19:14:29 2020 +0800

    clk: rockchip: rk3568: emmc support 400KHz
    
    Change-Id: I1b16a4ad2e67749e63eb1506c6c1462db3e6abbd
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3568.c b/drivers/clk/rockchip/clk_rk3568.c
index e00e607dbe..088aba3f0c 100644
--- a/drivers/clk/rockchip/clk_rk3568.c
+++ b/drivers/clk/rockchip/clk_rk3568.c
@@ -1539,6 +1539,7 @@ static ulong rk3568_emmc_set_clk(struct rk3568_clk_priv *priv, ulong rate)
 	case 200 * MHz:
 		src_clk = CCLK_EMMC_SEL_200M;
 		break;
+	case 400 * KHz:
 	case 375 * KHz:
 		src_clk = CCLK_EMMC_SEL_375K;
 		break;

commit 81e837fa840217f556b26dd51981d736d308ba48
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Nov 7 20:48:32 2020 +0800

    rockchip: spl: support pre-loader serial
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I082fae758a1e9dfb2b4c8b241b24bee396704922

diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index 2950b12c25..41271a56cf 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -167,7 +167,9 @@ void board_init_f(ulong dummy)
 	 * printhex8(0x1234);
 	 * printascii("string");
 	 */
-	debug_uart_init();
+	if (!gd->serial.using_pre_serial &&
+	    !(gd->flags & GD_FLG_DISABLE_CONSOLE))
+		debug_uart_init();
 	printascii("U-Boot SPL board init");
 #endif
 	gd->sys_start_tick = get_ticks();

commit b3561c89c7fa342d1fbd79111532d3da7fe79171
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Nov 6 18:07:23 2020 +0800

    scritps: spl.sh: support new idb pack
    
    Change-Id: I86d82c7358810aa7a7ee21133bdacf58716a5802
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/scripts/spl.sh b/scripts/spl.sh
index 327e7186ec..5037ec05fb 100755
--- a/scripts/spl.sh
+++ b/scripts/spl.sh
@@ -63,21 +63,34 @@ elif [ "${MAGIC}" == "RKPX30" ]; then
 	MAGIC="RK33"
 fi
 
+# tpl don't need replace MAGIC
+if grep -q '^NEWIDB=true' ${INI} ; then
+	ARG_NEWIDB="y"
+fi
+
 # replace
 if [ "${TPL_BIN}" != "" -a "${SPL_BIN}" != "" ]; then
-	cp ${TPL_BIN} tmp/u-boot-tpl.bin
-	cp ${SPL_BIN} tmp/u-boot-spl.bin
-	dd if=tmp/u-boot-tpl.bin of=tmp/tpl.bin bs=1 skip=4
+	if [ "${ARG_NEWIDB}" == "y" ]; then
+		cp ${TPL_BIN} tmp/tpl.bin
+	else
+		cp ${TPL_BIN} tmp/u-boot-tpl.bin
+		dd if=tmp/u-boot-tpl.bin of=tmp/tpl.bin bs=1 skip=4
+		sed -i "1s/^/${MAGIC:0:4}/" tmp/tpl.bin
+	fi
 
-	sed -i "1s/^/${MAGIC:0:4}/" tmp/tpl.bin
+	cp ${SPL_BIN} tmp/u-boot-spl.bin
 	sed -i "s/FlashData=.*$/FlashData=.\/tmp\/tpl.bin/"        ${TMP_INI}
 	sed -i "0,/Path1=.*/s/Path1=.*$/Path1=.\/tmp\/tpl.bin/"    ${TMP_INI}
 	sed -i "s/FlashBoot=.*$/FlashBoot=.\/tmp\/u-boot-spl.bin/" ${TMP_INI}
 	LABEL="TPL+SPL"
 elif [ "${TPL_BIN}" != "" ]; then
-	cp ${TPL_BIN} tmp/u-boot-tpl.bin
-	dd if=tmp/u-boot-tpl.bin of=tmp/tpl.bin bs=1 skip=4
-	sed -i "1s/^/${MAGIC:0:4}/" tmp/tpl.bin
+	if [ "${ARG_NEWIDB}" == "y" ]; then
+		cp ${TPL_BIN} tmp/tpl.bin
+	else
+		cp ${TPL_BIN} tmp/u-boot-tpl.bin
+		dd if=tmp/u-boot-tpl.bin of=tmp/tpl.bin bs=1 skip=4
+		sed -i "1s/^/${MAGIC:0:4}/" tmp/tpl.bin
+	fi
 	sed -i "s/FlashData=.*$/FlashData=.\/tmp\/tpl.bin/"        ${TMP_INI}
 	sed -i "0,/Path1=.*/s/Path1=.*$/Path1=.\/tmp\/tpl.bin/"    ${TMP_INI}
 	LABEL="TPL"

commit a80fd39692c4c07ee79156c7878d10fe86eee56b
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Nov 6 14:09:53 2020 +0800

    drivers: rkflash: Support new devices
    
    MT29F2G1ABA, F50L2G41XA, W25Q128JVSIM, ZB25LQ128, FM25Q64-SOB-T-G
    
    Change-Id: Idf09d96161130d4741e046acd9d520683c37213e
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/sfc_nand.c b/drivers/rkflash/sfc_nand.c
index ee77b1f225..63281d11a1 100644
--- a/drivers/rkflash/sfc_nand.c
+++ b/drivers/rkflash/sfc_nand.c
@@ -111,8 +111,16 @@ static struct nand_info spi_nand_tbl[] = {
 	{ 0x0BF1, 4, 0x40, 1, 1024, 0x4C, 18, 0x1, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status4 },
 	/* XT26G02B */
 	{ 0x0BF2, 4, 0x40, 1, 2048, 0x4C, 19, 0x1, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status5 },
-	/* XT26G02E */
-	{ 0x2C24, 4, 0x40, 1, 2048, 0x4C, 19, 0x1, 1, { 0x20, 0x24, 0xFF, 0xFF }, &sfc_nand_get_ecc_status6 },
+
+	/* MT29F2G1ABA, XT26G02E, F50L2G41XA */
+	{ 0x2C24, 4, 0x40, 2, 1024, 0x4C, 19, 0x1, 1, { 0x20, 0x24, 0xFF, 0xFF }, &sfc_nand_get_ecc_status6 },
+
+	/* FM25S01 */
+	{ 0xA1A1, 4, 0x40, 1, 1024, 0x4C, 18, 0x1, 0, { 0x00, 0x04, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
+	/* FM25S01A */
+	{ 0xA1E4, 4, 0x40, 1, 1024, 0x4C, 18, 0x1, 0, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
+	/* FM25S02A */
+	{ 0xA1E5, 4, 0x40, 2, 1024, 0x4C, 19, 0x1, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
 
 	/* IS37SML01G1 */
 	{ 0xC821, 4, 0x40, 1, 1024, 0x00, 18, 0x1, 0, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
@@ -120,8 +128,6 @@ static struct nand_info spi_nand_tbl[] = {
 	{ 0xC801, 4, 0x40, 1, 1024, 0x4C, 18, 0x1, 0, { 0x14, 0x24, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
 	/* ATO25D1GA */
 	{ 0x9B12, 4, 0x40, 1, 1024, 0x40, 18, 0x1, 1, { 0x14, 0x24, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
-	/* FM25S01 */
-	{ 0xA1A1, 4, 0x40, 1, 1024, 0x4C, 18, 0x1, 1, { 0x00, 0x04, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
 };
 
 static struct nand_info *p_nand_info;
@@ -652,13 +658,12 @@ u32 sfc_nand_prog_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
 	return ret;
 }
 
-u32 sfc_nand_read_page_raw(u8 cs, u32 addr, u32 *p_page_buf)
+u32 sfc_nand_read(u32 row, u32 *p_page_buf, u32 column, u32 len)
 {
 	int ret;
 	u32 plane;
 	struct rk_sfc_op op;
 	u32 ecc_result;
-	u32 page_size = SFC_NAND_SECTOR_FULL_SIZE * p_nand_info->sec_per_page;
 	u8 status;
 
 	op.sfcmd.d32 = 0;
@@ -668,7 +673,7 @@ u32 sfc_nand_read_page_raw(u8 cs, u32 addr, u32 *p_page_buf)
 
 	op.sfctrl.d32 = 0;
 
-	sfc_request(&op, addr, p_page_buf, 0);
+	sfc_request(&op, row, p_page_buf, 0);
 
 	if (sfc_nand_dev.read_lines == DATA_LINES_X4 &&
 	    p_nand_info->feature & FEA_SOFT_QOP_BIT &&
@@ -680,14 +685,16 @@ u32 sfc_nand_read_page_raw(u8 cs, u32 addr, u32 *p_page_buf)
 
 	op.sfcmd.d32 = 0;
 	op.sfcmd.b.cmd = sfc_nand_dev.page_read_cmd;
-	op.sfcmd.b.addrbits = SFC_ADDR_24BITS;
+	op.sfcmd.b.addrbits = SFC_ADDR_XBITS;
+	op.sfcmd.b.dummybits = 8;
 
 	op.sfctrl.d32 = 0;
 	op.sfctrl.b.datalines = sfc_nand_dev.read_lines;
+	op.sfctrl.b.addrbits = 16;
 
-	plane = p_nand_info->plane_per_die == 2 ? ((addr >> 6) & 0x1) << 12 : 0;
-	ret = sfc_request(&op, plane << 8, p_page_buf, page_size);
-	rkflash_print_dio("%s %x %x\n", __func__, addr, p_page_buf[0]);
+	plane = p_nand_info->plane_per_die == 2 ? ((row >> 6) & 0x1) << 12 : 0;
+	ret = sfc_request(&op, plane | column, p_page_buf, len);
+	rkflash_print_dio("%s %x %x\n", __func__, row, p_page_buf[0]);
 
 	if (ret != SFC_OK)
 		return SFC_NAND_HW_ERROR;
@@ -695,6 +702,13 @@ u32 sfc_nand_read_page_raw(u8 cs, u32 addr, u32 *p_page_buf)
 	return ecc_result;
 }
 
+u32 sfc_nand_read_page_raw(u8 cs, u32 addr, u32 *p_page_buf)
+{
+	u32 page_size = SFC_NAND_SECTOR_FULL_SIZE * p_nand_info->sec_per_page;
+
+	return sfc_nand_read(addr, p_page_buf, 0, page_size);
+}
+
 u32 sfc_nand_read_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
 {
 	u32 ret;
@@ -732,17 +746,17 @@ u32 sfc_nand_check_bad_block(u8 cs, u32 addr)
 {
 	u32 ret;
 	u32 data_size = p_nand_info->sec_per_page * SFC_NAND_SECTOR_SIZE;
+	u32 marker = 0;
 
-	ret = sfc_nand_read_page_raw(cs, addr, gp_page_buf);
+	ret = sfc_nand_read(addr, &marker, data_size, 2);
 
 	/* unify with mtd framework */
 	if (ret == SFC_NAND_ECC_ERROR)
-		rkflash_print_error("%s page= %x ret= %x data0= %x, spare0= %x\n",
-				    __func__, addr, ret, gp_page_buf[0],
-				    (gp_page_buf[data_size / 4] & 0xFF));
+		rkflash_print_error("%s page= %x ret= %x spare= %x\n",
+				    __func__, addr, ret, marker);
 
 	/* Original bad block */
-	if ((gp_page_buf[data_size / 4] & 0xFFFF) != 0xFFFF)
+	if ((u16)marker != 0xffff)
 		return true;
 
 	return false;
diff --git a/drivers/rkflash/sfc_nor.c b/drivers/rkflash/sfc_nor.c
index d1b48a5bde..c12b91d906 100644
--- a/drivers/rkflash/sfc_nor.c
+++ b/drivers/rkflash/sfc_nor.c
@@ -22,16 +22,18 @@ static struct flash_info spi_flash_tbl[] = {
 	{ 0xc84019, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x1C, 16, 6, 0 },
 	/* GD25Q512MC */
 	{ 0xc84020, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x3C, 17, 6, 0 },
-	/* 25Q64JVSSIQ */
+	/* W25Q64JVSSIQ */
 	{ 0xef4017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0 },
-	/* 25Q128FV and 25Q128JV*/
+	/* W25Q128FV and W25Q128JV*/
 	{ 0xef4018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 9, 0 },
-	/* 25Q256F/J */
+	/* W25Q256F/J */
 	{ 0xef4019, 128, 8, 0x13, 0x02, 0x6C, 0x32, 0x20, 0xD8, 0x3C, 16, 9, 0 },
-	/* 25Q256JWEQ*/
+	/* W25Q256JWEQ*/
 	{ 0xef6019, 128, 8, 0x13, 0x02, 0x6C, 0x32, 0x20, 0xD8, 0x3C, 16, 9, 0 },
-	/* 25Q64FWSSIG */
+	/* W25Q64FWSSIG */
 	{ 0xef6017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0 },
+	/* W25Q128JVSIM */
+	{ 0xef7018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 9, 0 },
 	/* MX25L3233FM2I-08G */
 	{ 0xc22016, 128, 8, 0x03, 0x02, 0x6B, 0x38, 0x20, 0xD8, 0x0E, 13, 6, 0 },
 	/* MX25L6433F */
@@ -78,6 +80,8 @@ static struct flash_info spi_flash_tbl[] = {
 	{ 0x5e4017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0 },
 	/* ZB25VQ128 */
 	{ 0x5e4018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 9, 0 },
+	/* ZB25LQ128 */
+	{ 0x5e5018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 9, 0 },
 	/* 25Q256JVEM */
 	{ 0xef7019, 128, 8, 0x13, 0x12, 0x6C, 0x34, 0x21, 0xDC, 0x3C, 16, 9, 0 },
 	/* BH25Q128AS */
@@ -86,6 +90,8 @@ static struct flash_info spi_flash_tbl[] = {
 	{ 0x684017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x04, 14, 9, 0 },
 	/* FM25Q128A */
 	{ 0xA14018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 9, 0 },
+	/* FM25Q64-SOB-T-G */
+	{ 0xA14017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0 },
 };
 
 static int snor_write_en(void)

commit 1b01cf5590f8d0b2270ffff5a656e38c5e3930ee
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Tue Nov 3 16:40:56 2020 +0800

    cmd: rockusb: reboot to boot ROM rockusb while using slc nand
    
    The rockusb in u-boot could not support BLK_MTD_NAND and
    BLK_MTD_SPI_NAND, need reboot to boot ROM.
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: I16d9f25d84322c9752e2e62451cd7b8c0aa16f02
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/cmd/rockusb.c b/cmd/rockusb.c
index fc65285f63..30e2b4ec78 100644
--- a/cmd/rockusb.c
+++ b/cmd/rockusb.c
@@ -170,6 +170,17 @@ static int do_rkusb(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 	if (rc < 0)
 		return CMD_RET_FAILURE;
 
+	if (g_rkusb->ums[0].block_dev.if_type == IF_TYPE_MTD &&
+	    g_rkusb->ums[0].block_dev.devnum == BLK_MTD_NAND) {
+#ifdef CONFIG_CMD_GO
+		pr_err("Enter bootrom rockusb...\n");
+		flushc();
+		run_command("rbrom", 0);
+#else
+		pr_err("rockusb: count not support loader upgrade!\n");
+#endif
+	}
+
 	controller_index = (unsigned int)(simple_strtoul(
 				usb_controller,	NULL, 0));
 	rc = usb_gadget_initialize(controller_index);

commit e66d4537dbd86d2c766c7745e41d41fd88ae2b83
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Oct 30 21:27:40 2020 +0800

    gadget: rockusb: Support rkusb_do_erase_force
    
    Change-Id: Ia18c5a8414411044a72858d83ccddec63ac83e70
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index 4bc2ac78a7..5816b8803d 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -9,6 +9,7 @@
 #include <asm/arch/boot_mode.h>
 #include <asm/arch/chip_info.h>
 #include <write_keybox.h>
+#include <linux/mtd/mtd.h>
 
 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
 #include <asm/arch/vendor.h>
@@ -20,6 +21,9 @@
 #define ROCKUSB_INTERFACE_SUB_CLASS	0x06
 #define ROCKUSB_INTERFACE_PROTOCOL	0x05
 
+#define ROCKCHIP_FLASH_BLOCK_SIZE	1024
+#define ROCKCHIP_FLASH_PAGE_SIZE	4
+
 static struct usb_interface_descriptor rkusb_intf_desc = {
 	.bLength		= USB_DT_INTERFACE_SIZE,
 	.bDescriptorType	= USB_DT_INTERFACE,
@@ -209,18 +213,34 @@ static int rkusb_do_test_bad_block(struct fsg_common *common,
 static int rkusb_do_read_flash_info(struct fsg_common *common,
 				    struct fsg_buffhd *bh)
 {
+	struct blk_desc *desc = &ums[common->lun].block_dev;
 	u8 *buf = (u8 *)bh->buf;
 	u32 len = sizeof(struct rk_flash_info);
 	struct rk_flash_info finfo = {
-		.block_size = 1024,
+		.block_size = ROCKCHIP_FLASH_BLOCK_SIZE,
 		.ecc_bits = 0,
-		.page_size = 4,
+		.page_size = ROCKCHIP_FLASH_PAGE_SIZE,
 		.access_time = 40,
 		.manufacturer = 0,
 		.flash_mask = 0
 	};
 
-	finfo.flash_size = (u32)ums[common->lun].block_dev.lba;
+	finfo.flash_size = (u32)desc->lba;
+
+	if (desc->if_type == IF_TYPE_MTD &&
+	    (desc->devnum == BLK_MTD_NAND ||
+	    desc->devnum == BLK_MTD_SPI_NAND)) {
+		struct mtd_info *mtd = (struct mtd_info *)desc->bdev->priv;
+
+		if (mtd) {
+			finfo.block_size = mtd->erasesize >> 9;
+			finfo.page_size = mtd->writesize >> 9;
+		}
+	}
+
+	debug("Flash info: block_size= %x page_size= %x\n", finfo.block_size,
+	      finfo.page_size);
+
 	if (finfo.flash_size)
 		finfo.flash_mask = 1;
 
@@ -293,6 +313,60 @@ out:
 	return rc;
 }
 
+static int rkusb_do_erase_force(struct fsg_common *common,
+				struct fsg_buffhd *bh)
+{
+	struct blk_desc *desc = &ums[common->lun].block_dev;
+	struct fsg_lun *curlun = &common->luns[common->lun];
+	u16 block_size = ROCKCHIP_FLASH_BLOCK_SIZE;
+	u32 lba, amount;
+	loff_t file_offset;
+	int rc;
+
+	lba = get_unaligned_be32(&common->cmnd[2]);
+	if (lba >= curlun->num_sectors) {
+		curlun->sense_data = SS_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE;
+		rc = -EINVAL;
+		goto out;
+	}
+
+	if (desc->if_type == IF_TYPE_MTD &&
+	    (desc->devnum == BLK_MTD_NAND ||
+	    desc->devnum == BLK_MTD_SPI_NAND)) {
+		struct mtd_info *mtd = (struct mtd_info *)desc->bdev->priv;
+
+		if (mtd)
+			block_size = mtd->erasesize >> 9;
+	}
+
+	file_offset = ((loff_t)lba) * block_size;
+	amount = get_unaligned_be16(&common->cmnd[7]) * block_size;
+
+	debug("%s lba= %x, nsec= %x\n", __func__, lba,
+	      (u32)get_unaligned_be16(&common->cmnd[7]));
+
+	if (unlikely(amount == 0)) {
+		curlun->sense_data = SS_INVALID_FIELD_IN_CDB;
+		rc = -EIO;
+		goto out;
+	}
+
+	/* Perform the erase */
+	rc = ums[common->lun].erase_sector(&ums[common->lun],
+					   file_offset,
+					   amount);
+	if (!rc) {
+		curlun->sense_data = SS_MEDIUM_NOT_PRESENT;
+		rc = -EIO;
+	}
+
+out:
+	common->data_dir = DATA_DIR_NONE;
+	bh->state = BUF_STATE_EMPTY;
+
+	return rc;
+}
+
 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
 static int rkusb_do_vs_write(struct fsg_common *common)
 {
@@ -464,11 +538,12 @@ static int rkusb_do_vs_read(struct fsg_common *common)
 #endif
 
 static int rkusb_do_read_capacity(struct fsg_common *common,
-				    struct fsg_buffhd *bh)
+				  struct fsg_buffhd *bh)
 {
 	u8 *buf = (u8 *)bh->buf;
 	u32 len = common->data_size;
 	enum if_type type = ums[common->lun].block_dev.if_type;
+	int devnum = ums[common->lun].block_dev.devnum;
 
 	/*
 	 * bit[0]: Direct LBA, 0: Disabled;
@@ -484,8 +559,14 @@ static int rkusb_do_read_capacity(struct fsg_common *common,
 	else
 		buf[0] = BIT(0) | BIT(4);
 
+	if (type == IF_TYPE_MTD &&
+	    (devnum == BLK_MTD_NAND ||
+	    devnum == BLK_MTD_SPI_NAND))
+		buf[0] |= (1 << 6);
+
 	/* Set data xfer size */
-	common->residue = common->data_size_from_cmnd = len;
+	common->residue = len;
+	common->data_size_from_cmnd = len;
 
 	return len;
 }
@@ -545,6 +626,11 @@ static int rkusb_cmd_process(struct fsg_common *common,
 		rc = RKUSB_RC_FINISHED;
 		break;
 
+	case RKUSB_ERASE_10_FORCE:
+		*reply = rkusb_do_erase_force(common, bh);
+		rc = RKUSB_RC_FINISHED;
+		break;
+
 	case RKUSB_LBA_READ_10:
 		rkusb_fixup_cbwcb(common, bh);
 		common->cmnd[0] = SC_READ_10;
@@ -603,7 +689,6 @@ static int rkusb_cmd_process(struct fsg_common *common,
 	case RKUSB_ERASE_10:
 	case RKUSB_WRITE_SPARE:
 	case RKUSB_READ_SPARE:
-	case RKUSB_ERASE_10_FORCE:
 	case RKUSB_GET_VERSION:
 	case RKUSB_ERASE_SYS_DISK:
 	case RKUSB_SDRAM_READ_10:

commit 3f04f6e376667e93106240c5f43f63ace99161e4
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Nov 5 16:15:06 2020 +0800

    rockchip: rk3568: fix compile error
    
    error: ‘CRU_SOFTRST_CON02’ undeclared (first use in this function)
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I64935d50646a1ca7d228308c11f2f95a2e2378bb

diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c
index 35dde6a52b..3c66a9b13d 100644
--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
@@ -743,7 +743,7 @@ int spl_fit_standalone_release(uintptr_t entry_point)
 	writel(0x1 << (16 + 15), SGRF_BASE + GRF_FIREWALL_SLV_CON0);
 	writel(0x3 << (16 + 1), SGRF_BASE + GRF_FIREWALL_SLV_CON7);
 	/* release the scr1 */
-	writel(0x04000000, CRU_BASE + CRU_SOFTRST_CON02);
+	writel(0x04000000, CRU_BASE + CRU_SOFTRST_CON26);
 
 	return 0;
 }

commit 8ae3c2c283dc0fc97e6965794e3956f0ea6620fa
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Nov 4 15:22:17 2020 +0800

    rockchip: rk3568: set the emmc to secure
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I415879f184b35352bb5a53afc40100242cbeaf33

diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c
index e0c055c82e..35dde6a52b 100644
--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
@@ -20,6 +20,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define CRU_BASE		0xfdd20000
 #define CRU_SOFTRST_CON26	0x468
 #define SGRF_BASE		0xFDD18000
+#define SGRF_SOC_CON4		0x10
 #define GRF_FIREWALL_SLV_CON0	0x240
 #define GRF_FIREWALL_SLV_CON7	0x25c
 
@@ -723,6 +724,9 @@ int arch_cpu_init(void)
 	 */
 	writel(0xffffffff, PMU_BASE_ADDR + PMU_NOC_AUTO_CON0);
 	writel(0x000f000f, PMU_BASE_ADDR + PMU_NOC_AUTO_CON1);
+
+	/* Set the emmc to secure */
+	writel(((0x3 << 11) << 16) | (0x0 << 11), SGRF_BASE + SGRF_SOC_CON4);
 #endif
 
 	return 0;

commit b3a7cb38db471164375939d015a6d83fcb74f967
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Nov 4 11:48:48 2020 +0800

    rockchip: rk3568: support spl_fit_standalone_release()
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Id61a82729074348f1879b32248f6640025773db6

diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c
index 461354afc4..e0c055c82e 100644
--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
@@ -13,9 +13,15 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #define PMUGRF_BASE		0xfdc20000
 #define GRF_BASE		0xfdc60000
+#define GRF_SOC_CON4		0x510
 #define PMU_BASE_ADDR		0xfdd90000
 #define PMU_NOC_AUTO_CON0	(0x70)
 #define PMU_NOC_AUTO_CON1	(0x74)
+#define CRU_BASE		0xfdd20000
+#define CRU_SOFTRST_CON26	0x468
+#define SGRF_BASE		0xFDD18000
+#define GRF_FIREWALL_SLV_CON0	0x240
+#define GRF_FIREWALL_SLV_CON7	0x25c
 
 enum {
 	/* PMU_GRF_GPIO0C_IOMUX_L */
@@ -721,3 +727,20 @@ int arch_cpu_init(void)
 
 	return 0;
 }
+
+#ifdef CONFIG_SPL_BUILD
+int spl_fit_standalone_release(uintptr_t entry_point)
+{
+	/* Reset the scr1 */
+	writel(0x04000400, CRU_BASE + CRU_SOFTRST_CON26);
+	udelay(100);
+	/* set the scr1 addr */
+	writel(entry_point >> 16, GRF_BASE + GRF_SOC_CON4);
+	writel(0x1 << (16 + 15), SGRF_BASE + GRF_FIREWALL_SLV_CON0);
+	writel(0x3 << (16 + 1), SGRF_BASE + GRF_FIREWALL_SLV_CON7);
+	/* release the scr1 */
+	writel(0x04000000, CRU_BASE + CRU_SOFTRST_CON02);
+
+	return 0;
+}
+#endif

commit 605de1ae64376281ae019d75cc99e274c421f7b3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 4 15:15:19 2020 +0800

    configs: add rk3566.config which bases on rk3568
    
    build command: ./make.sh rk3566
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Iea2a677b4cb6c2030320a9403b0113aa18341168

diff --git a/configs/rk3566.config b/configs/rk3566.config
new file mode 100644
index 0000000000..e695d41151
--- /dev/null
+++ b/configs/rk3566.config
@@ -0,0 +1,2 @@
+CONFIG_BASE_DEFCONFIG="rk3568_defconfig"
+CONFIG_LOADER_INI="RK3566MINIALL.ini"

commit 6a1e3c91edcaf0f83af2e489c8e04fdd24d06401
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Nov 3 11:56:37 2020 +0800

    cmd: boot_android: separate the avb & ab cmd
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I328a76af35481bdcad6b127dad9adc43843fcbd1

diff --git a/cmd/boot_android.c b/cmd/boot_android.c
index 01ee3c0332..4696c25915 100755
--- a/cmd/boot_android.c
+++ b/cmd/boot_android.c
@@ -82,70 +82,72 @@ U_BOOT_CMD(
 	"      the partition table. This is commonly the \"misc\" partition.\n"
 );
 
-#ifdef CONFIG_RK_AVB_LIBAVB_USER
-static int bootloader_message_read(struct android_bootloader_message *data)
+#ifdef CONFIG_ANDROID_AB
+int do_avb_init_ab_metadata(cmd_tbl_t *cmdtp, int flag,
+			    int argc, char * const argv[])
 {
 	AvbOps *ops;
-	char requested_partitions[] = "misc";
-	size_t out_num_read;
-	char *buffer;
+	AvbABData ab_data;
 
-	ops = avb_ops_user_new();
-	buffer = (char *)data;
+	memset(&ab_data, 0, sizeof(AvbABData));
+	debug("sizeof(AvbABData) = %d\n", (int)(size_t)sizeof(AvbABData));
+	if (argc != 1)
+		return CMD_RET_USAGE;
 
+	ops = avb_ops_user_new();
 	if (ops == NULL) {
 		printf("avb_ops_user_new() failed!\n");
 		return CMD_RET_FAILURE;
 	}
 
-	if (ops->read_from_partition(ops, requested_partitions,
-				     0, 2048, buffer,
-				     &out_num_read) != 0) {
-		printf("do avb read error!\n");
+	avb_ab_data_init(&ab_data);
+	if (ops->ab_ops->write_ab_metadata(ops->ab_ops, &ab_data) != 0) {
+		printf("do_avb_init_ab_metadata error!\n");
 		avb_ops_user_free(ops);
 		return CMD_RET_FAILURE;
 	}
 
+	printf("Initialize ab data to misc partition success.\n");
 	avb_ops_user_free(ops);
 
 	return CMD_RET_SUCCESS;
 }
 
-static int bootloader_message_write(struct android_bootloader_message *data)
+int do_avb_ab_mark_slot_active(cmd_tbl_t *cmdtp, int flag,
+			       int argc, char * const argv[])
 {
 	AvbOps *ops;
-	char requested_partitions[] = "misc";
-	char *buffer;
+	unsigned int slot_number;
 
-	ops = avb_ops_user_new();
-	buffer = (char *)data;
+	if (argc != 2)
+		return CMD_RET_USAGE;
 
+	ops = avb_ops_user_new();
 	if (ops == NULL) {
 		printf("avb_ops_user_new() failed!\n");
 		return CMD_RET_FAILURE;
 	}
 
-	if (ops->write_to_partition(ops, requested_partitions,
-				     0, 2048, buffer) != 0) {
-		printf("do avb write error!\n");
+	slot_number = simple_strtoul(argv[1], NULL, 16);
+	if (avb_ab_mark_slot_active(ops->ab_ops, slot_number) != 0) {
+		printf("avb_ab_mark_slot_active error!\n");
 		avb_ops_user_free(ops);
 		return CMD_RET_FAILURE;
 	}
 
+	printf("Mark slot %d active successfully.\n", slot_number);
 	avb_ops_user_free(ops);
 
 	return CMD_RET_SUCCESS;
 }
 
-int do_avb_init_ab_metadata(cmd_tbl_t *cmdtp, int flag,
-			    int argc, char * const argv[])
+int do_avb_ab_mark_slot_unbootable(cmd_tbl_t *cmdtp, int flag,
+				   int argc, char * const argv[])
 {
 	AvbOps *ops;
-	AvbABData ab_data;
+	unsigned int slot_number;
 
-	memset(&ab_data, 0, sizeof(AvbABData));
-	debug("sizeof(AvbABData) = %d\n", (int)(size_t)sizeof(AvbABData));
-	if (argc != 1)
+	if (argc != 2)
 		return CMD_RET_USAGE;
 
 	ops = avb_ops_user_new();
@@ -154,35 +156,21 @@ int do_avb_init_ab_metadata(cmd_tbl_t *cmdtp, int flag,
 		return CMD_RET_FAILURE;
 	}
 
-	avb_ab_data_init(&ab_data);
-	if (ops->ab_ops->write_ab_metadata(ops->ab_ops, &ab_data) != 0) {
-		printf("do_avb_init_ab_metadata error!\n");
+	slot_number = simple_strtoul(argv[1], NULL, 16);
+	if (avb_ab_mark_slot_unbootable(ops->ab_ops, slot_number) != 0) {
+		printf("do_avb_ab_mark_slot_unbootable error!\n");
 		avb_ops_user_free(ops);
 		return CMD_RET_FAILURE;
 	}
 
-	printf("Initialize ab data to misc partition success.\n");
+	printf("Mark slot %d unbootable successfully.\n", slot_number);
 	avb_ops_user_free(ops);
 
 	return CMD_RET_SUCCESS;
 }
 
-int do_avb_version(cmd_tbl_t *cmdtp, int flag, int argc,
-		   char * const argv[])
-{
-	const char *avb_version;
-
-	if (argc != 1)
-		return CMD_RET_USAGE;
-
-	avb_version = avb_version_string();
-	printf("Android avb version is %s.\n", avb_version);
-
-	return CMD_RET_SUCCESS;
-}
-
-int do_avb_ab_mark_slot_active(cmd_tbl_t *cmdtp, int flag,
-			       int argc, char * const argv[])
+int do_avb_ab_mark_slot_successful(cmd_tbl_t *cmdtp, int flag,
+				   int argc, char * const argv[])
 {
 	AvbOps *ops;
 	unsigned int slot_number;
@@ -197,25 +185,24 @@ int do_avb_ab_mark_slot_active(cmd_tbl_t *cmdtp, int flag,
 	}
 
 	slot_number = simple_strtoul(argv[1], NULL, 16);
-	if (avb_ab_mark_slot_active(ops->ab_ops, slot_number) != 0) {
-		printf("avb_ab_mark_slot_active error!\n");
+	if (avb_ab_mark_slot_successful(ops->ab_ops, slot_number) != 0) {
+		printf("do_avb_ab_mark_slot_successful error!\n");
 		avb_ops_user_free(ops);
 		return CMD_RET_FAILURE;
 	}
 
-	printf("Mark slot %d active successfully.\n", slot_number);
 	avb_ops_user_free(ops);
 
 	return CMD_RET_SUCCESS;
 }
 
-int do_avb_ab_mark_slot_unbootable(cmd_tbl_t *cmdtp, int flag,
-				   int argc, char * const argv[])
+int do_avb_read_ab_metadata(cmd_tbl_t *cmdtp, int flag,
+			    int argc, char * const argv[])
 {
 	AvbOps *ops;
-	unsigned int slot_number;
+	AvbABData ab_data;
 
-	if (argc != 2)
+	if (argc != 1)
 		return CMD_RET_USAGE;
 
 	ops = avb_ops_user_new();
@@ -224,26 +211,36 @@ int do_avb_ab_mark_slot_unbootable(cmd_tbl_t *cmdtp, int flag,
 		return CMD_RET_FAILURE;
 	}
 
-	slot_number = simple_strtoul(argv[1], NULL, 16);
-	if (avb_ab_mark_slot_unbootable(ops->ab_ops, slot_number) != 0) {
-		printf("do_avb_ab_mark_slot_unbootable error!\n");
+	if (ops->ab_ops->read_ab_metadata(ops->ab_ops, &ab_data) != 0) {
+		printf("do_avb_write_ab_metadata error!\n");
 		avb_ops_user_free(ops);
 		return CMD_RET_FAILURE;
 	}
 
-	printf("Mark slot %d unbootable successfully.\n", slot_number);
+	printf("Slot A information:\n");
+	printf("slot A: priority = %d, tries_remaining = %d,\
+	       successful_boot = %d\n",
+	       ab_data.slots[0].priority,
+	       ab_data.slots[0].tries_remaining,
+	       ab_data.slots[0].successful_boot);
+	printf("Slot B information:\n");
+	printf("slot B: priority = %d, tries_remaining = %d,\
+	       successful_boot = %d\n",
+	       ab_data.slots[1].priority,
+	       ab_data.slots[1].tries_remaining,
+	       ab_data.slots[1].successful_boot);
 	avb_ops_user_free(ops);
 
 	return CMD_RET_SUCCESS;
 }
 
-int do_avb_ab_mark_slot_successful(cmd_tbl_t *cmdtp, int flag,
-				   int argc, char * const argv[])
+int do_avb_write_ab_metadata(cmd_tbl_t *cmdtp, int flag,
+			     int argc, char * const argv[])
 {
 	AvbOps *ops;
-	unsigned int slot_number;
+	AvbABData ab_data;
 
-	if (argc != 2)
+	if (argc != 1)
 		return CMD_RET_USAGE;
 
 	ops = avb_ops_user_new();
@@ -252,9 +249,8 @@ int do_avb_ab_mark_slot_successful(cmd_tbl_t *cmdtp, int flag,
 		return CMD_RET_FAILURE;
 	}
 
-	slot_number = simple_strtoul(argv[1], NULL, 16);
-	if (avb_ab_mark_slot_successful(ops->ab_ops, slot_number) != 0) {
-		printf("do_avb_ab_mark_slot_successful error!\n");
+	if (ops->ab_ops->write_ab_metadata(ops->ab_ops, &ab_data) != 0) {
+		printf("do_avb_write_ab_metadata error!\n");
 		avb_ops_user_free(ops);
 		return CMD_RET_FAILURE;
 	}
@@ -263,6 +259,22 @@ int do_avb_ab_mark_slot_successful(cmd_tbl_t *cmdtp, int flag,
 
 	return CMD_RET_SUCCESS;
 }
+#endif
+
+#ifdef CONFIG_ANDROID_AVB
+int do_avb_version(cmd_tbl_t *cmdtp, int flag, int argc,
+		   char * const argv[])
+{
+	const char *avb_version;
+
+	if (argc != 1)
+		return CMD_RET_USAGE;
+
+	avb_version = avb_version_string();
+	printf("Android avb version is %s.\n", avb_version);
+
+	return CMD_RET_SUCCESS;
+}
 
 int do_avb_read_rollback_index(cmd_tbl_t *cmdtp, int flag,
 			       int argc, char * const argv[])
@@ -494,70 +506,6 @@ int do_avb_read(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return CMD_RET_SUCCESS;
 }
 
-int do_avb_read_ab_metadata(cmd_tbl_t *cmdtp, int flag,
-			    int argc, char * const argv[])
-{
-	AvbOps *ops;
-	AvbABData ab_data;
-
-	if (argc != 1)
-		return CMD_RET_USAGE;
-
-	ops = avb_ops_user_new();
-	if (ops == NULL) {
-		printf("avb_ops_user_new() failed!\n");
-		return CMD_RET_FAILURE;
-	}
-
-	if (ops->ab_ops->read_ab_metadata(ops->ab_ops, &ab_data) != 0) {
-		printf("do_avb_write_ab_metadata error!\n");
-		avb_ops_user_free(ops);
-		return CMD_RET_FAILURE;
-	}
-
-	printf("Slot A information:\n");
-	printf("slot A: priority = %d, tries_remaining = %d,\
-	       successful_boot = %d\n",
-	       ab_data.slots[0].priority,
-	       ab_data.slots[0].tries_remaining,
-	       ab_data.slots[0].successful_boot);
-	printf("Slot B information:\n");
-	printf("slot B: priority = %d, tries_remaining = %d,\
-	       successful_boot = %d\n",
-	       ab_data.slots[1].priority,
-	       ab_data.slots[1].tries_remaining,
-	       ab_data.slots[1].successful_boot);
-	avb_ops_user_free(ops);
-
-	return CMD_RET_SUCCESS;
-}
-
-int do_avb_write_ab_metadata(cmd_tbl_t *cmdtp, int flag,
-			     int argc, char * const argv[])
-{
-	AvbOps *ops;
-	AvbABData ab_data;
-
-	if (argc != 1)
-		return CMD_RET_USAGE;
-
-	ops = avb_ops_user_new();
-	if (ops == NULL) {
-		printf("avb_ops_user_new() failed!\n");
-		return CMD_RET_FAILURE;
-	}
-
-	if (ops->ab_ops->write_ab_metadata(ops->ab_ops, &ab_data) != 0) {
-		printf("do_avb_write_ab_metadata error!\n");
-		avb_ops_user_free(ops);
-		return CMD_RET_FAILURE;
-	}
-
-	avb_ops_user_free(ops);
-
-	return CMD_RET_SUCCESS;
-}
-
 int do_perm_attr_test(cmd_tbl_t *cmdtp, int flag,
 		      int argc, char * const argv[])
 {
@@ -623,197 +571,21 @@ int do_avb_verify_partition(cmd_tbl_t *cmdtp, int flag,
 
 	return CMD_RET_SUCCESS;
 }
-
-int do_avb_flow(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
-	char slot_partition[2][20] = {{0}, {0}};
-	unsigned long load_address;
-	AvbOps *ops;
-	const char *avb_version;
-	AvbSlotVerifyData *slot_data;
-	AvbSlotVerifyFlags flags;
-	const char *requested_partitions[] = {"boot", "system", NULL};
-	char *command_line;
-	bool unlocked;
-	const char *mode_cmdline = NULL;
-	char root_data[70] = "root=PARTUUID=";
-	char *vboot_state = "androidboot.verifiedbootstate=";
-	char avb_root_data[2000] = {0};
-	size_t guid_buf_size = 37;
-	char guid_buf[37];
-	char verify_flag;
-	char boot_slot_select[5];
-	struct android_bootloader_message data;
-	const char *fastboot_cmd = env_get("fastbootcmd");
-	AvbABFlowResult ab_result;
-
-	if (argc != 2)
-		return CMD_RET_USAGE;
-
-	bootloader_message_read(&data);
-	if (!strcmp("bootonce-bootloader", data.command)) {
-		memset(data.command, 0, sizeof(data.command));
-		bootloader_message_write(&data);
-		if (fastboot_cmd) {
-			printf("bootonce-bootloader!\n");
-			return run_command(fastboot_cmd, CMD_FLAG_ENV);
-		} else {
-			printf("The fastbootcmd is NULL!\n");
-			goto fail;
-		}
-	} else if (!strcmp("boot-recovery", data.command)) {
-		printf("Enter boot-recovery!\n");
-	} else if(!strcmp("boot-normal", data.command)) {
-		printf("Enter boot-normal!\n");
-		mode_cmdline = "skip_initramfs";
-	} else {
-		/*
-		 * Firstly, confirm if there is a command in misc partition in
-		 * previous cases, and then we need to confirm whether user has
-		 * requested to enter recovery mode by entering "reboot recovery"
-		 * command through adb or serial console.
-		 */
-		char *env_rebootmode = env_get("reboot_mode");
-
-		if (env_rebootmode && !strncmp("recovery", env_rebootmode, 8))
-			printf("Enter recovery mode by command 'reboot recovery'!\n");
-		else
-			mode_cmdline = "skip_initramfs";
-	}
-
-	avb_version = avb_version_string();
-	printf("Android avb version is %s.\n", avb_version);
-	ops = avb_ops_user_new();
-	if (ops == NULL) {
-		printf("avb_ops_user_new() failed!\n");
-		goto fail;
-	}
-
-	if (ops->read_is_device_unlocked(ops, &unlocked) != 0) {
-		printf("Error determining whether device is unlocked.\n");
-		unlocked = ANDROID_VBOOT_UNLOCK;
-		if (ops->write_is_device_unlocked(ops, &unlocked) != 0) {
-			printf("Can not write lock state!\n");
-			unlocked = ANDROID_VBOOT_LOCK;
-		}
-		if (ops->read_is_device_unlocked(ops, &unlocked) != 0) {
-			printf("Can not read lock state!\n");
-			unlocked = ANDROID_VBOOT_LOCK;
-		}
-	}
-
-	printf("read_is_device_unlocked() ops returned that device is %s\n",
-	       unlocked ? "UNLOCKED" : "LOCKED");
-
-	flags = AVB_SLOT_VERIFY_FLAGS_NONE;
-	if (unlocked)
-		flags |= AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR;
-
-	verify_flag = argv[1][0];
-	if (verify_flag == 'v') {
-		debug("start with verify!\n");
-		ab_result =
-		    avb_ab_flow(ops->ab_ops,
-				requested_partitions,
-				flags,
-				AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE,
-				&slot_data);
-		if ((ab_result != AVB_AB_FLOW_RESULT_OK) &&
-		    (ab_result !=
-		    AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR)) {
-			printf("avb_ab_flow() error!\n");
-			avb_ops_user_free(ops);
-			goto fail;
-		}
-
-		if (ab_result ==\
-		    AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR) {
-			strcat(avb_root_data, vboot_state);
-			strcat(avb_root_data, "orange");
-		} else if (ab_result == AVB_AB_FLOW_RESULT_OK) {
-			strcat(avb_root_data, vboot_state);
-			strcat(avb_root_data, "green");
-		}
-
-		command_line = android_assemble_cmdline(slot_data->ab_suffix,
-							mode_cmdline);
-		strcat(avb_root_data, " ");
-		strcat(avb_root_data, command_line);
-		strcat(avb_root_data, " ");
-		strcat(avb_root_data, slot_data->cmdline);
-		env_set("bootargs", avb_root_data);
-		load_address = CONFIG_SYS_LOAD_ADDR;
-		if (rk_avb_close_optee_client())
-			printf("Can not close optee client!\n");
-
-		memcpy((uint8_t*)load_address,
-		       slot_data->loaded_partitions->data,
-		       slot_data->loaded_partitions->data_size);
-		android_bootloader_boot_kernel(load_address);
-		avb_ops_user_free(ops);
-	} else if (verify_flag == 'n') {
-		load_address = CONFIG_SYS_LOAD_ADDR;
-		rk_avb_ab_slot_select(ops->ab_ops, boot_slot_select);
-		strcat(slot_partition[1], requested_partitions[1]);
-		printf("%s\n", slot_partition[1]);
-		ops->get_unique_guid_for_partition(ops,
-						   slot_partition[1],
-						   guid_buf,
-						   guid_buf_size);
-		strcat(root_data, guid_buf);
-		command_line = android_assemble_cmdline(boot_slot_select,
-							mode_cmdline);
-		strcat(root_data, " ");
-		strcat(root_data, command_line);
-		env_set("bootargs", root_data);
-		if (android_avb_boot_flow(load_address)) {
-			printf("Cannot boot the system, goto the fastboot!\n");
-			avb_ops_user_free(ops);
-			goto fail;
-		}
-		avb_ops_user_free(ops);
-	} else if (verify_flag == 'o') {
-		load_address = CONFIG_SYS_LOAD_ADDR;
-		strcat(slot_partition[1], requested_partitions[1]);
-		ops->get_unique_guid_for_partition(ops,
-						   slot_partition[1],
-						   guid_buf,
-						   guid_buf_size);
-		strcat(root_data, guid_buf);
-		command_line = android_assemble_cmdline(boot_slot_select,
-							mode_cmdline);
-		strcat(root_data, " ");
-		strcat(root_data, command_line);
-		env_set("bootargs", root_data);
-		if (android_boot_flow(load_address)) {
-			printf("Cannot boot the system, goto the fastboot!\n");
-			avb_ops_user_free(ops);
-			goto fail;
-		}
-		avb_ops_user_free(ops);
-	} else {
-		return CMD_RET_USAGE;
-	}
-
-	return CMD_RET_SUCCESS;
-fail:
-	if (fastboot_cmd == NULL) {
-		printf("fastboot_cmd is null, run default fastboot_cmd!\n");
-		fastboot_cmd = "fastboot usb 0";
-	}
-
-	return run_command(fastboot_cmd, CMD_FLAG_ENV);
-}
+#endif
 
 static cmd_tbl_t cmd_avb[] = {
+#ifdef CONFIG_ANDROID_AB
 	U_BOOT_CMD_MKENT(init, 1, 1, do_avb_init_ab_metadata, "", ""),
-	U_BOOT_CMD_MKENT(version, 1, 1, do_avb_version, "", ""),
 	U_BOOT_CMD_MKENT(slot_active, 2, 1,
 			 do_avb_ab_mark_slot_active, "", ""),
 	U_BOOT_CMD_MKENT(slot_unbootable, 2, 1,
 			 do_avb_ab_mark_slot_unbootable, "", ""),
 	U_BOOT_CMD_MKENT(slot_successful, 2, 1,
 			 do_avb_ab_mark_slot_successful, "", ""),
+	U_BOOT_CMD_MKENT(readabmisc, 1, 1, do_avb_read_ab_metadata, "", ""),
+#endif
+#ifdef CONFIG_ANDROID_AVB
+	U_BOOT_CMD_MKENT(version, 1, 1, do_avb_version, "", ""),
 	U_BOOT_CMD_MKENT(read_rollback, 2, 1,
 			 do_avb_read_rollback_index, "", ""),
 	U_BOOT_CMD_MKENT(write_rollback, 3, 1,
@@ -827,10 +599,9 @@ static cmd_tbl_t cmd_avb[] = {
 	U_BOOT_CMD_MKENT(part_guid, 2, 1,
 			 do_avb_get_get_unique_guid_for_partition, "", ""),
 	U_BOOT_CMD_MKENT(read, 4, 1, do_avb_read, "", ""),
-	U_BOOT_CMD_MKENT(readabmisc, 1, 1, do_avb_read_ab_metadata, "", ""),
 	U_BOOT_CMD_MKENT(perm_attr_test, 1, 1, do_perm_attr_test, "", ""),
 	U_BOOT_CMD_MKENT(verify, 3, 1, do_avb_verify_partition, "", ""),
-	U_BOOT_CMD_MKENT(flow, 2, 1, do_avb_flow, "", "")
+#endif
 };
 
 static int do_boot_avb(cmd_tbl_t *cmdtp,
@@ -871,6 +642,4 @@ U_BOOT_CMD(
 	"bootavb readabmisc\n"
 	"bootavb perm_attr_test\n"
 	"bootavb verify partition slot_cnt;partion name without '_a' or '_b'\n"
-	"bootavb flow v/n\n"
 );
-#endif

commit 08f7f19a21ccd4eb9d614366e1eb3d61483027c1
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Nov 3 11:48:51 2020 +0800

    lib: avb: separate the ab from the avb lib
    
    Open CONFIG_AVB_LIBAVB_USER & CONFIG_ANDROID_AB &
    CONFIG_AVB_LIBAVB_AB to enable ab.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I1611907b3cb82f72d5e706ed966ee98c7569d230

diff --git a/lib/Makefile b/lib/Makefile
index da4091438b..80d6dea30d 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -49,10 +49,9 @@ obj-$(CONFIG_OPTEE_CLIENT) += optee_clientApi/
 endif
 
 obj-$(CONFIG_$(SPL_TPL_)AVB_LIBAVB) += avb/libavb/
-obj-$(CONFIG_$(SPL_TPL_)AVB_LIBAVB_AB) += avb/libavb_ab/
 obj-$(CONFIG_$(SPL_TPL_)AVB_LIBAVB_ATX) += avb/libavb_atx/
 obj-$(CONFIG_$(SPL_TPL_)AVB_LIBAVB_USER) += avb/libavb_user/
-obj-$(CONFIG_$(SPL_TPL_)RK_AVB_LIBAVB_USER) += avb/rk_avb_user/
+obj-y += avb/rk_avb_user/
 
 obj-$(CONFIG_$(SPL_TPL_)RSA) += rsa/
 obj-$(CONFIG_SHA1) += sha1.o
diff --git a/lib/avb/libavb_user/avb_ops_user.c b/lib/avb/libavb_user/avb_ops_user.c
index 2ae6d3e884..d51866a696 100644
--- a/lib/avb/libavb_user/avb_ops_user.c
+++ b/lib/avb/libavb_user/avb_ops_user.c
@@ -484,19 +484,19 @@ AvbOps *avb_ops_user_new(void)
 
 	ops = calloc(1, sizeof(AvbOps));
 	if (!ops) {
-		avb_error("Error allocating memory for AvbOps.\n");
+		printf("Error allocating memory for AvbOps.\n");
 		goto out;
 	}
 	ops->ab_ops = calloc(1, sizeof(AvbABOps));
 	if (!ops->ab_ops) {
-		avb_error("Error allocating memory for AvbABOps.\n");
+		printf("Error allocating memory for AvbABOps.\n");
 		free(ops);
 		goto out;
 	}
 
 	ops->atx_ops = calloc(1, sizeof(AvbAtxOps));
 	if (!ops->atx_ops) {
-		avb_error("Error allocating memory for AvbAtxOps.\n");
+		printf("Error allocating memory for AvbAtxOps.\n");
 		free(ops->ab_ops);
 		free(ops);
 		goto out;
diff --git a/lib/avb/rk_avb_user/Makefile b/lib/avb/rk_avb_user/Makefile
index c636ea7eb3..9501c53170 100755
--- a/lib/avb/rk_avb_user/Makefile
+++ b/lib/avb/rk_avb_user/Makefile
@@ -1 +1,2 @@
-obj-y	+= rk_avb_ops_user.o
+obj-$(CONFIG_RK_AVB_LIBAVB_USER) += rk_avb_ops_user.o
+obj-$(CONFIG_AVB_LIBAVB_AB) += rk_ab_ops_user.o
diff --git a/lib/avb/rk_avb_user/rk_ab_ops_user.c b/lib/avb/rk_avb_user/rk_ab_ops_user.c
new file mode 100644
index 0000000000..43336dd6c7
--- /dev/null
+++ b/lib/avb/rk_avb_user/rk_ab_ops_user.c
@@ -0,0 +1,492 @@
+/*
+ * (C) Copyright 2020 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#include <common.h>
+#include <malloc.h>
+#include <mapmem.h>
+#include <errno.h>
+#include <command.h>
+#include <blk.h>
+#include <part.h>
+#include <android_avb/avb_ops_user.h>
+#include <android_avb/libavb_ab.h>
+#include <android_avb/rk_avb_ops_user.h>
+#include <boot_rkimg.h>
+
+static int safe_memcmp(const void *s1, const void *s2, size_t n)
+{
+	const unsigned char *us1 = s1;
+	const unsigned char *us2 = s2;
+	int result = 0;
+
+	if (0 == n)
+		return 0;
+
+	/*
+	 * Code snippet without data-dependent branch due to Nate Lawson
+	 * (nate@root.org) of Root Labs.
+	 */
+	while (n--)
+		result |= *us1++ ^ *us2++;
+
+	return result != 0;
+}
+
+static uint32_t htobe32(uint32_t in)
+{
+	union {
+		uint32_t word;
+		uint8_t bytes[4];
+	} ret;
+
+	ret.bytes[0] = (in >> 24) & 0xff;
+	ret.bytes[1] = (in >> 16) & 0xff;
+	ret.bytes[2] = (in >> 8) & 0xff;
+	ret.bytes[3] = in & 0xff;
+
+	return ret.word;
+}
+
+static uint32_t be32toh(uint32_t in)
+{
+	uint8_t *d = (uint8_t *)&in;
+	uint32_t ret;
+
+	ret = ((uint32_t)d[0]) << 24;
+	ret |= ((uint32_t)d[1]) << 16;
+	ret |= ((uint32_t)d[2]) << 8;
+	ret |= ((uint32_t)d[3]);
+
+	return ret;
+}
+
+static void slot_set_unbootable(AvbABSlotData* slot)
+{
+        slot->priority = 0;
+        slot->tries_remaining = 0;
+        slot->successful_boot = 0;
+}
+
+/* Ensure all unbootable and/or illegal states are marked as the
+ * canonical 'unbootable' state, e.g. priority=0, tries_remaining=0,
+ * and successful_boot=0.
+ */
+static void slot_normalize(AvbABSlotData* slot)
+{
+        if (slot->priority > 0) {
+                if (slot->tries_remaining == 0 && !slot->successful_boot) {
+                /* We've exhausted all tries -> unbootable. */
+                slot_set_unbootable(slot);
+        }
+        if (slot->tries_remaining > 0 && slot->successful_boot) {
+                /* Illegal state - avb_ab_mark_slot_successful() will clear
+                 * tries_remaining when setting successful_boot.
+                 */
+                slot_set_unbootable(slot);
+        }
+        } else {
+                slot_set_unbootable(slot);
+        }
+}
+
+/* Writes A/B metadata to disk only if it has changed - returns
+ * AVB_IO_RESULT_OK on success, error code otherwise.
+ */
+AvbIOResult save_metadata_if_changed(AvbABOps* ab_ops,
+                                     AvbABData* ab_data,
+                                     AvbABData* ab_data_orig)
+{
+        if (safe_memcmp(ab_data, ab_data_orig, sizeof(AvbABData)) != 0) {
+                debug("Writing A/B metadata to disk.\n");
+                return ab_ops->write_ab_metadata(ab_ops, ab_data);
+        }
+        return AVB_IO_RESULT_OK;
+}
+
+bool avb_ab_data_verify_and_byteswap(const AvbABData* src, AvbABData* dest) {
+        /* Ensure magic is correct. */
+        if (safe_memcmp(src->magic, AVB_AB_MAGIC, AVB_AB_MAGIC_LEN) != 0) {
+                printf("Magic is incorrect.\n");
+                return false;
+        }
+
+        memcpy(dest, src, sizeof(AvbABData));
+        dest->crc32 = be32toh(dest->crc32);
+
+        /* Ensure we don't attempt to access any fields if the major version
+         * is not supported.
+         */
+        if (dest->version_major > AVB_AB_MAJOR_VERSION) {
+                printf("No support for given major version.\n");
+                return false;
+        }
+
+        /* Bail if CRC32 doesn't match. */
+        if (dest->crc32 !=
+                crc32(0, (const uint8_t*)dest, sizeof(AvbABData) - sizeof(uint32_t))) {
+                printf("CRC32 does not match.\n");
+                return false;
+        }
+
+        return true;
+}
+
+void avb_ab_data_update_crc_and_byteswap(const AvbABData* src,
+                                         AvbABData* dest)
+{
+        memcpy(dest, src, sizeof(AvbABData));
+        dest->crc32 = htobe32(crc32(0, (const uint8_t*)dest, sizeof(AvbABData) - sizeof(uint32_t)));
+}
+
+void avb_ab_data_init(AvbABData* data)
+{
+        memset(data, '\0', sizeof(AvbABData));
+        memcpy(data->magic, AVB_AB_MAGIC, AVB_AB_MAGIC_LEN);
+        data->version_major = AVB_AB_MAJOR_VERSION;
+        data->version_minor = AVB_AB_MINOR_VERSION;
+        data->last_boot = 0;
+        data->slots[0].priority = AVB_AB_MAX_PRIORITY;
+        data->slots[0].tries_remaining = AVB_AB_MAX_TRIES_REMAINING;
+        data->slots[0].successful_boot = 0;
+        data->slots[1].priority = AVB_AB_MAX_PRIORITY - 1;
+        data->slots[1].tries_remaining = AVB_AB_MAX_TRIES_REMAINING;
+        data->slots[1].successful_boot = 0;
+}
+
+/* The AvbABData struct is stored 2048 bytes into the 'misc' partition
+ * following the 'struct bootloader_message' field. The struct is
+ * compatible with the guidelines in bootable/recovery/bootloader.h -
+ * e.g. it is stored in the |slot_suffix| field, starts with a
+ * NUL-byte, and is 32 bytes long.
+ */
+#define AB_METADATA_MISC_PARTITION_OFFSET 2048
+
+AvbIOResult avb_ab_data_read(AvbABOps* ab_ops, AvbABData* data)
+{
+        AvbOps* ops = ab_ops->ops;
+        AvbABData serialized;
+        AvbIOResult io_ret;
+        size_t num_bytes_read;
+
+        io_ret = ops->read_from_partition(ops,
+                                          "misc",
+                                          AB_METADATA_MISC_PARTITION_OFFSET,
+                                          sizeof(AvbABData),
+                                          &serialized,
+                                          &num_bytes_read);
+        if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+                return AVB_IO_RESULT_ERROR_OOM;
+        } else if (io_ret != AVB_IO_RESULT_OK ||
+                  num_bytes_read != sizeof(AvbABData)) {
+                printf("Error reading A/B metadata.\n");
+                return AVB_IO_RESULT_ERROR_IO;
+        }
+
+        if (!avb_ab_data_verify_and_byteswap(&serialized, data)) {
+                printf("Error validating A/B metadata from disk. "
+                          "Resetting and writing new A/B metadata to disk.\n");
+                avb_ab_data_init(data);
+                return avb_ab_data_write(ab_ops, data);
+        }
+
+        return AVB_IO_RESULT_OK;
+}
+
+AvbIOResult avb_ab_data_write(AvbABOps* ab_ops, const AvbABData* data)
+{
+        AvbOps* ops = ab_ops->ops;
+        AvbABData serialized;
+        AvbIOResult io_ret;
+
+        avb_ab_data_update_crc_and_byteswap(data, &serialized);
+        io_ret = ops->write_to_partition(ops,
+                                         "misc",
+                                         AB_METADATA_MISC_PARTITION_OFFSET,
+                                         sizeof(AvbABData),
+                                         &serialized);
+        if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+                return AVB_IO_RESULT_ERROR_OOM;
+        } else if (io_ret != AVB_IO_RESULT_OK) {
+                printf("Error writing A/B metadata.\n");
+                return AVB_IO_RESULT_ERROR_IO;
+        }
+        return AVB_IO_RESULT_OK;
+}
+
+/* Helper function to load metadata - returns AVB_IO_RESULT_OK on
+ * success, error code otherwise.
+ */
+AvbIOResult load_metadata(AvbABOps* ab_ops,
+                          AvbABData* ab_data,
+                          AvbABData* ab_data_orig) {
+        AvbIOResult io_ret;
+
+        io_ret = ab_ops->read_ab_metadata(ab_ops, ab_data);
+        if (io_ret != AVB_IO_RESULT_OK) {
+                printf("I/O error while loading A/B metadata.\n");
+                return io_ret;
+        }
+        *ab_data_orig = *ab_data;
+
+        /* Ensure data is normalized, e.g. illegal states will be marked as
+         * unbootable and all unbootable states are represented with
+         * (priority=0, tries_remaining=0, successful_boot=0).
+         */
+        slot_normalize(&ab_data->slots[0]);
+        slot_normalize(&ab_data->slots[1]);
+        return AVB_IO_RESULT_OK;
+}
+
+int rk_avb_read_slot_count(char *slot_count)
+{
+	*slot_count = SLOT_NUM;
+
+	return 0;
+}
+
+int rk_avb_read_slot_suffixes(char *slot_suffixes)
+{
+	memcpy(slot_suffixes, CURR_SYSTEM_SLOT_SUFFIX,
+	       strlen(CURR_SYSTEM_SLOT_SUFFIX));
+
+	return 0;
+}
+
+AvbIOResult avb_ab_mark_slot_active(AvbABOps* ab_ops,
+                                    unsigned int slot_number)
+{
+        AvbABData ab_data, ab_data_orig;
+        unsigned int other_slot_number;
+        AvbIOResult ret;
+
+        avb_assert(slot_number < 2);
+
+        ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
+        if (ret != AVB_IO_RESULT_OK) {
+                goto out;
+        }
+
+        /* Make requested slot top priority, unsuccessful, and with max tries. */
+        ab_data.slots[slot_number].priority = AVB_AB_MAX_PRIORITY;
+        ab_data.slots[slot_number].tries_remaining = AVB_AB_MAX_TRIES_REMAINING;
+        ab_data.slots[slot_number].successful_boot = 0;
+
+        /* Ensure other slot doesn't have as high a priority. */
+        other_slot_number = 1 - slot_number;
+        if (ab_data.slots[other_slot_number].priority == AVB_AB_MAX_PRIORITY) {
+                ab_data.slots[other_slot_number].priority = AVB_AB_MAX_PRIORITY - 1;
+        }
+
+        ret = AVB_IO_RESULT_OK;
+
+out:
+        if (ret == AVB_IO_RESULT_OK) {
+                ret = save_metadata_if_changed(ab_ops, &ab_data, &ab_data_orig);
+        }
+        return ret;
+}
+
+int rk_avb_set_slot_active(unsigned int *slot_number)
+{
+	AvbOps* ops;
+	ops = avb_ops_user_new();
+	int ret = 0;
+
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return -1;
+	}
+
+	debug("set_slot_active\n");
+	if (avb_ab_mark_slot_active(ops->ab_ops, *slot_number) != 0) {
+		printf("set_slot_active error!\n");
+		ret = -1;
+	}
+
+	avb_ops_user_free(ops);
+	return ret;
+}
+
+static bool slot_is_bootable(AvbABSlotData* slot) {
+	return (slot->priority > 0) && 
+	       (slot->successful_boot || (slot->tries_remaining > 0));
+}
+
+AvbABFlowResult rk_avb_ab_slot_select(AvbABOps* ab_ops,char* select_slot)
+{
+	AvbABFlowResult ret = AVB_AB_FLOW_RESULT_OK;
+	AvbIOResult io_ret = AVB_IO_RESULT_OK;
+	AvbABData ab_data;
+	size_t slot_index_to_boot;
+	static int last_slot_index = -1;
+
+	io_ret = ab_ops->read_ab_metadata(ab_ops, &ab_data);
+	if (io_ret != AVB_IO_RESULT_OK) {
+		printf("I/O error while loading A/B metadata.\n");
+		ret = AVB_AB_FLOW_RESULT_ERROR_IO;
+		goto out;
+	}
+	if (slot_is_bootable(&ab_data.slots[0]) && slot_is_bootable(&ab_data.slots[1])) {
+		if (ab_data.slots[1].priority > ab_data.slots[0].priority) {
+			slot_index_to_boot = 1;
+		} else {
+			slot_index_to_boot = 0;
+		}
+	} else if(slot_is_bootable(&ab_data.slots[0])) {
+		slot_index_to_boot = 0;
+	} else if(slot_is_bootable(&ab_data.slots[1])) {
+		slot_index_to_boot = 1;
+	} else {
+		printf("No bootable slots found.\n");
+		ret = AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS;
+		goto out;
+	}
+
+	if (slot_index_to_boot == 0) {
+		strcpy(select_slot, "_a");
+	} else if(slot_index_to_boot == 1) {
+		strcpy(select_slot, "_b");
+	}
+
+	if (last_slot_index != slot_index_to_boot) {
+		last_slot_index = slot_index_to_boot;
+		printf("A/B-slot: %s, successful: %d, tries-remain: %d\n",
+		       select_slot,
+		       ab_data.slots[slot_index_to_boot].successful_boot,
+		       ab_data.slots[slot_index_to_boot].tries_remaining);
+	}
+out:
+	return ret;
+}
+
+AvbIOResult avb_ab_mark_slot_unbootable(AvbABOps* ab_ops,
+                                        unsigned int slot_number)
+{
+        AvbABData ab_data, ab_data_orig;
+        AvbIOResult ret;
+
+        avb_assert(slot_number < 2);
+
+        ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
+        if (ret != AVB_IO_RESULT_OK) {
+                goto out;
+        }
+
+        slot_set_unbootable(&ab_data.slots[slot_number]);
+
+        ret = AVB_IO_RESULT_OK;
+
+out:
+        if (ret == AVB_IO_RESULT_OK) {
+                ret = save_metadata_if_changed(ab_ops, &ab_data, &ab_data_orig);
+        }
+        return ret;
+}
+
+AvbIOResult avb_ab_mark_slot_successful(AvbABOps* ab_ops,
+                                        unsigned int slot_number)
+{
+        AvbABData ab_data, ab_data_orig;
+        AvbIOResult ret;
+
+        avb_assert(slot_number < 2);
+
+        ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
+        if (ret != AVB_IO_RESULT_OK) {
+                goto out;
+        }
+
+        if (!slot_is_bootable(&ab_data.slots[slot_number])) {
+                printf("Cannot mark unbootable slot as successful.\n");
+                ret = AVB_IO_RESULT_OK;
+                goto out;
+        }
+
+        ab_data.slots[slot_number].tries_remaining = 0;
+        ab_data.slots[slot_number].successful_boot = 1;
+
+        ret = AVB_IO_RESULT_OK;
+
+out:
+        if (ret == AVB_IO_RESULT_OK) {
+                ret = save_metadata_if_changed(ab_ops, &ab_data, &ab_data_orig);
+        }
+        return ret;
+}
+
+int rk_get_lastboot(void)
+{
+
+	AvbIOResult io_ret = AVB_IO_RESULT_OK;
+	AvbABData ab_data;
+	int lastboot = -1;
+	AvbOps* ops;
+
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return -1;
+	}
+
+	io_ret = ops->ab_ops->read_ab_metadata(ops->ab_ops, &ab_data);
+	if (io_ret != AVB_IO_RESULT_OK) {
+		printf("I/O error while loading A/B metadata.\n");
+		goto out;
+	}
+
+	lastboot = ab_data.last_boot;
+out:
+	avb_ops_user_free(ops);
+
+	return lastboot;
+}
+
+int rk_avb_get_current_slot(char *select_slot)
+{
+	AvbOps* ops;
+	int ret = 0;
+
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return -1;
+	}
+
+	if (rk_avb_ab_slot_select(ops->ab_ops, select_slot) != 0) {
+#ifndef CONFIG_ANDROID_AVB
+		printf("###There is no bootable slot, bring up last_boot!###\n");
+		if (rk_get_lastboot() == 1)
+			memcpy(select_slot, "_b", 2);
+		else if(rk_get_lastboot() == 0)
+			memcpy(select_slot, "_a", 2);
+		else
+#endif
+			return -1;
+		ret = 0;
+	}
+
+	avb_ops_user_free(ops);
+	return ret;
+}
+
+int rk_avb_append_part_slot(const char *part_name, char *new_name)
+{
+	char slot_suffix[3] = {0};
+
+	if (!strcmp(part_name, "misc")) {
+		strcat(new_name, part_name);
+		return 0;
+	}
+
+	if (rk_avb_get_current_slot(slot_suffix)) {
+		printf("%s: failed to get slot suffix !\n", __func__);
+		return -1;
+	}
+
+	strcpy(new_name, part_name);
+	strcat(new_name, slot_suffix);
+
+	return 0;
+}
\ No newline at end of file
diff --git a/lib/avb/rk_avb_user/rk_avb_ops_user.c b/lib/avb/rk_avb_user/rk_avb_ops_user.c
index 63a3d10e19..89b98751f4 100644
--- a/lib/avb/rk_avb_user/rk_avb_ops_user.c
+++ b/lib/avb/rk_avb_user/rk_avb_ops_user.c
@@ -39,6 +39,7 @@ int rk_avb_get_pub_key(struct rk_pub_key *pub_key)
 
 	return 0;
 }
+
 int rk_avb_get_perm_attr_cer(uint8_t *cer, uint32_t size)
 {
 #ifdef CONFIG_OPTEE_CLIENT
@@ -65,142 +66,6 @@ int rk_avb_set_perm_attr_cer(uint8_t *cer, uint32_t size)
 #endif
 }
 
-int rk_avb_read_slot_count(char *slot_count)
-{
-	*slot_count = SLOT_NUM;
-
-	return 0;
-}
-
-int rk_avb_read_slot_suffixes(char *slot_suffixes)
-{
-	memcpy(slot_suffixes, CURR_SYSTEM_SLOT_SUFFIX,
-	       strlen(CURR_SYSTEM_SLOT_SUFFIX));
-
-	return 0;
-}
-
-int rk_avb_set_slot_active(unsigned int *slot_number)
-{
-	AvbOps* ops;
-	ops = avb_ops_user_new();
-	int ret = 0;
-
-	if (ops == NULL) {
-		printf("avb_ops_user_new() failed!\n");
-		return -1;
-	}
-
-	debug("set_slot_active\n");
-	if (avb_ab_mark_slot_active(ops->ab_ops, *slot_number) != 0) {
-		printf("set_slot_active error!\n");
-		ret = -1;
-	}
-
-	avb_ops_user_free(ops);
-	return ret;
-}
-
-static bool slot_is_bootable(AvbABSlotData* slot) {
-	return (slot->priority > 0) && 
-	       (slot->successful_boot || (slot->tries_remaining > 0));
-}
-
-AvbABFlowResult rk_avb_ab_slot_select(AvbABOps* ab_ops,char* select_slot)
-{
-	AvbABFlowResult ret = AVB_AB_FLOW_RESULT_OK;
-	AvbIOResult io_ret = AVB_IO_RESULT_OK;
-	AvbABData ab_data;
-	size_t slot_index_to_boot;
-	static int last_slot_index = -1;
-
-	io_ret = ab_ops->read_ab_metadata(ab_ops, &ab_data);
-	if (io_ret != AVB_IO_RESULT_OK) {
-		avb_error("I/O error while loading A/B metadata.\n");
-		ret = AVB_AB_FLOW_RESULT_ERROR_IO;
-		goto out;
-	}
-	if (slot_is_bootable(&ab_data.slots[0]) && slot_is_bootable(&ab_data.slots[1])) {
-		if (ab_data.slots[1].priority > ab_data.slots[0].priority) {
-			slot_index_to_boot = 1;
-		} else {
-			slot_index_to_boot = 0;
-		}
-	} else if(slot_is_bootable(&ab_data.slots[0])) {
-		slot_index_to_boot = 0;
-	} else if(slot_is_bootable(&ab_data.slots[1])) {
-		slot_index_to_boot = 1;
-	} else {
-		avb_error("No bootable slots found.\n");
-		ret = AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS;
-		goto out;
-	}
-
-	if (slot_index_to_boot == 0) {
-		strcpy(select_slot, "_a");
-	} else if(slot_index_to_boot == 1) {
-		strcpy(select_slot, "_b");
-	}
-
-	if (last_slot_index != slot_index_to_boot) {
-		last_slot_index = slot_index_to_boot;
-		printf("A/B-slot: %s, successful: %d, tries-remain: %d\n",
-		       select_slot,
-		       ab_data.slots[slot_index_to_boot].successful_boot,
-		       ab_data.slots[slot_index_to_boot].tries_remaining);
-	}
-out:
-	return ret;
-}
-
-int rk_avb_get_current_slot(char *select_slot)
-{
-	AvbOps* ops;
-	int ret = 0;
-
-	ops = avb_ops_user_new();
-	if (ops == NULL) {
-		printf("avb_ops_user_new() failed!\n");
-		return -1;
-	}
-
-	if (rk_avb_ab_slot_select(ops->ab_ops, select_slot) != 0) {
-#ifndef CONFIG_ANDROID_AVB
-		printf("###There is no bootable slot, bring up last_boot!###\n");
-		if (rk_get_lastboot() == 1)
-			memcpy(select_slot, "_b", 2);
-		else if(rk_get_lastboot() == 0)
-			memcpy(select_slot, "_a", 2);
-		else
-#endif
-			return -1;
-		ret = 0;
-	}
-
-	avb_ops_user_free(ops);
-	return ret;
-}
-
-int rk_avb_append_part_slot(const char *part_name, char *new_name)
-{
-	char slot_suffix[3] = {0};
-
-	if (!strcmp(part_name, "misc")) {
-		strcat(new_name, part_name);
-		return 0;
-	}
-
-	if (rk_avb_get_current_slot(slot_suffix)) {
-		printf("%s: failed to get slot suffix !\n", __func__);
-		return -1;
-	}
-
-	strcpy(new_name, part_name);
-	strcat(new_name, slot_suffix);
-
-	return 0;
-}
-
 int rk_avb_read_permanent_attributes(uint8_t *attributes, uint32_t size)
 {
 #ifdef CONFIG_OPTEE_CLIENT
@@ -774,33 +639,6 @@ int rk_generate_unlock_challenge(void *buffer, uint32_t *challenge_len)
 		return -1;
 }
 
-int rk_get_lastboot(void)
-{
-
-	AvbIOResult io_ret = AVB_IO_RESULT_OK;
-	AvbABData ab_data;
-	int lastboot = -1;
-	AvbOps* ops;
-
-	ops = avb_ops_user_new();
-	if (ops == NULL) {
-		printf("avb_ops_user_new() failed!\n");
-		return -1;
-	}
-
-	io_ret = ops->ab_ops->read_ab_metadata(ops->ab_ops, &ab_data);
-	if (io_ret != AVB_IO_RESULT_OK) {
-		avb_error("I/O error while loading A/B metadata.\n");
-		goto out;
-	}
-
-	lastboot = ab_data.last_boot;
-out:
-	avb_ops_user_free(ops);
-
-	return lastboot;
-}
-
 int rk_avb_init_ab_metadata(void)
 {
 	AvbOps *ops;

commit 338697c52fef7383476502a71eea6eb8f565a910
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Oct 30 21:21:56 2020 +0800

    mtd: mtd_blk: Support mtd_derase
    
    1.Support SPI Nand and SLC Nand in mtd case;
    2.Only support address and length erasesize aligned case;
    
    Change-Id: I8e76274677c153fb61616ebf320e1b86d5060439
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index 8c77fa7989..472e19978d 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -273,6 +273,48 @@ static __maybe_unused int mtd_map_write(struct mtd_info *mtd, loff_t offset,
 	return 0;
 }
 
+static __maybe_unused int mtd_map_erase(struct mtd_info *mtd, loff_t offset,
+					size_t length)
+{
+	struct erase_info ei;
+	loff_t pos, len;
+	int ret;
+
+	pos = offset;
+	len = length;
+
+	if ((pos & mtd->erasesize_mask) || (len & mtd->erasesize_mask)) {
+		pr_err("Attempt to erase non block-aligned data, pos= %llx, len= %llx\n",
+		       pos, len);
+
+		return -EINVAL;
+	}
+
+	while (len) {
+		if (mtd_block_isbad(mtd, pos) || mtd_block_isreserved(mtd, pos)) {
+			pr_debug("attempt to erase a bad/reserved block @%llx\n",
+				 pos);
+			pos += mtd->erasesize;
+			continue;
+		}
+
+		memset(&ei, 0, sizeof(struct erase_info));
+		ei.addr = pos;
+		ei.len  = mtd->erasesize;
+		ret = mtd_erase(mtd, &ei);
+		if (ret) {
+			pr_err("map_erase error %d while erasing %llx\n", ret,
+			       pos);
+			return ret;
+		}
+
+		pos += mtd->erasesize;
+		len -= mtd->erasesize;
+	}
+
+	return 0;
+}
+
 char *mtd_part_parse(void)
 {
 	char mtd_part_info_temp[MTD_SINGLE_PART_INFO_MAX_SIZE] = {0};
@@ -495,7 +537,35 @@ ulong mtd_dwrite(struct udevice *udev, lbaint_t start,
 ulong mtd_derase(struct udevice *udev, lbaint_t start,
 		 lbaint_t blkcnt)
 {
-	/* Not implemented */
+	struct blk_desc *desc = dev_get_uclass_platdata(udev);
+#if defined(CONFIG_NAND) || defined(CONFIG_MTD_SPI_NAND) || defined(CONFIG_SPI_FLASH_MTD)
+	loff_t off = (loff_t)(start * 512);
+	size_t len = blkcnt * 512;
+#endif
+	struct mtd_info *mtd;
+	int ret = 0;
+
+	if (!desc)
+		return ret;
+
+	mtd = desc->bdev->priv;
+	if (!mtd)
+		return 0;
+
+	pr_debug("mtd derase %s %lx %lx\n", mtd->name, start, blkcnt);
+
+	if (blkcnt == 0)
+		return 0;
+
+	if (desc->devnum == BLK_MTD_NAND ||
+	    desc->devnum == BLK_MTD_SPI_NAND) {
+		ret = mtd_map_erase(mtd, off, len);
+		if (ret)
+			return ret;
+	} else {
+		return 0;
+	}
+
 	return 0;
 }
 

commit edf57a9bb9a0c12ce9edd5a4d679fd050a3b19ab
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Nov 3 15:23:34 2020 +0800

    configs: evb-aarch32-rk3308: disable distro/ext2/ext4
    
    In order to decrease U-Boot size.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I5aff1f51da9090afbd9a0f83e3d0e6626c57e4c2

diff --git a/configs/evb-aarch32-rk3308_defconfig b/configs/evb-aarch32-rk3308_defconfig
index a7b2a4f312..a2731ee1e7 100644
--- a/configs/evb-aarch32-rk3308_defconfig
+++ b/configs/evb-aarch32-rk3308_defconfig
@@ -9,6 +9,7 @@ CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_TARGET_EVB_RK3308=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3308-evb"
 CONFIG_DEBUG_UART=y
+# CONFIG_DISTRO_DEFAULTS is not set
 CONFIG_ANDROID_BOOT_IMAGE=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
@@ -17,8 +18,10 @@ CONFIG_BOOTDELAY=0
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_HUSH_PARSER=y
 # CONFIG_FASTBOOT is not set
 # CONFIG_CMD_BDI is not set
+CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
@@ -31,13 +34,19 @@ CONFIG_CMD_GPT=y
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_PART=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PXE=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 # CONFIG_CMD_MISC is not set
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
 # CONFIG_DOS_PARTITION is not set
-# CONFIG_ISO_PARTITION is not set
 CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
@@ -83,6 +92,7 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x2207
 CONFIG_USB_GADGET_PRODUCT_NUM=0x330d
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
+# CONFIG_FAT_WRITE is not set
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y

commit cd49b93f91a3090c6f37a68149e02d4906085b5d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Nov 3 15:23:02 2020 +0800

    configs: evb-aarch32-rk3308: clean with make savedefconfig
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I26671a578cc65baeb59821c38379156b2a1c5118

diff --git a/configs/evb-aarch32-rk3308_defconfig b/configs/evb-aarch32-rk3308_defconfig
index 83844d77b5..a7b2a4f312 100644
--- a/configs/evb-aarch32-rk3308_defconfig
+++ b/configs/evb-aarch32-rk3308_defconfig
@@ -4,7 +4,6 @@ CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_ROCKCHIP_RK3308=y
 CONFIG_ARM64_BOOT_AARCH32=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
-CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 # CONFIG_USING_KERNEL_DTB is not set
 CONFIG_TARGET_EVB_RK3308=y
@@ -79,11 +78,11 @@ CONFIG_USB_EHCI_GENERIC=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_DWC2_OTG=y
-CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
 CONFIG_USB_GADGET_VENDOR_NUM=0x2207
 CONFIG_USB_GADGET_PRODUCT_NUM=0x330d
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y

commit 7b5df4cdfbfb411ebc0e3088c3f433956ee46410
Author: YouMin Chen <cym@rock-chips.com>
Date:   Mon Sep 28 16:07:25 2020 +0800

    rockchip: rk3568: enable TPL and select TPL_TINY_FRAMEWORK
    
    Change-Id: I488915ecfea6d073b5a812418987da847f747d4e
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index d73d3c2be1..2cc5a06d0a 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -369,7 +369,13 @@ config ROCKCHIP_RK3568
 	bool "Support Rockchip RK3568"
 	select ARM64
 	select SPL
+	select SUPPORT_TPL
 	select SUPPORT_SPL
+	select TPL_TINY_FRAMEWORK if TPL
+	select DEBUG_UART_BOARD_INIT
+	imply TPL
+	imply SPL
+	imply TPL_SERIAL_SUPPORT
 	help
 	  The Rockchip RK3568 is a ARM-based SoC with a quad-core Cortex-A55.
 
@@ -378,6 +384,12 @@ if ROCKCHIP_RK3568
 config TPL_LDSCRIPT
 	default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
 
+config TPL_TEXT_BASE
+	default 0xfdcc1000
+
+config TPL_MAX_SIZE
+	default 61440
+
 endif
 
 config ROCKCHIP_RK1808

commit 0ba8ddaa8c9f9bfb2ec4724fe7b7899ea4e2d9d6
Author: YouMin Chen <cym@rock-chips.com>
Date:   Fri Oct 23 16:01:21 2020 +0800

    rockchip: rk3568: add tpl build support
    
    Change-Id: I78ad59774d8f617d3e93a97ead222c735eb7f978
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index 2c5da35112..e7e9ad16d6 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -93,6 +93,10 @@ CONFIG_REGULATOR_RK8XX=y
 CONFIG_DM_CHARGE_DISPLAY=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
+CONFIG_ROCKCHIP_SDRAM_COMMON=y
+CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE=0
 CONFIG_DM_RESET=y
 CONFIG_SPL_DM_RESET=y
 CONFIG_SPL_RESET_ROCKCHIP=y

commit 547ad455e47b3267f3d9f0bde1971d718a889b41
Author: YouMin Chen <cym@rock-chips.com>
Date:   Tue Nov 3 10:30:11 2020 +0800

    drivers: ram: rockchip: add rk3568 sdram_init for build only
    
    Change-Id: I09a83b3192f4b332aad37f709949011f173a3dac
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index cf268a8f00..c3f847b063 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -14,6 +14,7 @@ obj-$(CONFIG_ROCKCHIP_RK322X) += sdram_rk322x.o
 obj-$(CONFIG_ROCKCHIP_RK3288) += sdram_rk3288.o
 obj-$(CONFIG_ROCKCHIP_RK3328) += sdram_rk3328.o sdram_pctl_px30.o sdram_phy_px30.o
 obj-$(CONFIG_ROCKCHIP_RK3399) += sdram_rk3399.o
+obj-$(CONFIG_ROCKCHIP_RK3568) += sdram_rk3568.o
 obj-$(CONFIG_ROCKCHIP_PX30) += sdram_px30.o sdram_pctl_px30.o sdram_phy_px30.o
 obj-$(CONFIG_ROCKCHIP_PX30) += rockchip_sdram.o
 obj-$(CONFIG_ROCKCHIP_RK1808) += rockchip_sdram.o
diff --git a/drivers/ram/rockchip/sdram_rk3568.c b/drivers/ram/rockchip/sdram_rk3568.c
new file mode 100644
index 0000000000..68999e0efb
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_rk3568.c
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * (C) Copyright 2020 Rockchip Electronics Co., Ltd.
+ */
+
+#include <common.h>
+#include <debug_uart.h>
+#include <dm.h>
+#include <ram.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/rk_atags.h>
+#include <asm/arch/cru_rk3568.h>
+#include <asm/arch/grf_rk3568.h>
+
+#ifdef CONFIG_TPL_BUILD
+#ifndef CONFIG_TPL_TINY_FRAMEWORK
+#error please defined CONFIG_TPL_TINY_FRAMEWORK for RK3568 !!!
+#endif
+#endif
+
+#ifdef CONFIG_TPL_BUILD
+
+/* return: 0 = success, other = fail */
+int sdram_init(void)
+{
+	return (-1);
+}
+#endif /* CONFIG_TPL_BUILD */

commit 25858e75900c0b71a0652cd3182ed3098624ff36
Author: YouMin Chen <cym@rock-chips.com>
Date:   Tue Nov 3 10:25:35 2020 +0800

    rockchip: rk3568: configure UART iomux in board_debug_uart_init
    
    Change-Id: I02dca611a7b15dc0161dc5e65a367b038645dd9a
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c
index 25c83100b5..461354afc4 100644
--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
@@ -11,10 +11,416 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#define PMUGRF_BASE		0xfdc20000
+#define GRF_BASE		0xfdc60000
 #define PMU_BASE_ADDR		0xfdd90000
 #define PMU_NOC_AUTO_CON0	(0x70)
 #define PMU_NOC_AUTO_CON1	(0x74)
 
+enum {
+	/* PMU_GRF_GPIO0C_IOMUX_L */
+	GPIO0C1_SHIFT		= 4,
+	GPIO0C1_MASK		= GENMASK(6, 4),
+	GPIO0C1_GPIO		= 0,
+	GPIO0C1_PWM2_M0,
+	GPIO0C1_NPU_AVS,
+	GPIO0C1_UART0_TX,
+	GPIO0C1_MCU_JTAGTDI,
+
+	GPIO0C0_SHIFT		= 0,
+	GPIO0C0_MASK		= GENMASK(2, 0),
+	GPIO0C0_GPIO		= 0,
+	GPIO0C0_PWM1_M0,
+	GPIO0C0_GPU_AVS,
+	GPIO0C0_UART0_RX,
+
+	/* PMU_GRF_GPIO0D_IOMUX_L */
+	GPIO0D1_SHIFT		= 4,
+	GPIO0D1_MASK		= GENMASK(6, 4),
+	GPIO0D1_GPIO		= 0,
+	GPIO0D1_UART2_TXM0,
+
+	GPIO0D0_SHIFT		= 0,
+	GPIO0D0_MASK		= GENMASK(2, 0),
+	GPIO0D0_GPIO		= 0,
+	GPIO0D0_UART2_RXM0,
+
+	/* PMU_GRF_SOC_CON0 */
+	UART0_IO_SEL_SHIFT	= 8,
+	UART0_IO_SEL_MASK	= GENMASK(9, 8),
+	UART0_IO_SEL_M0		= 0,
+	UART0_IO_SEL_M1,
+	UART0_IO_SEL_M2,
+};
+
+enum {
+	/* GRF_GPIO1A_IOMUX_L */
+	GPIO1A1_SHIFT		= 4,
+	GPIO1A1_MASK		= GENMASK(6, 4),
+	GPIO1A1_GPIO		= 0,
+	GPIO1A1_I2C3_SCLM0,
+	GPIO1A1_UART3_TXM0,
+	GPIO1A1_CAN1_TXM0,
+	GPIO1A1_AUDIOPWM_ROUT,
+	GPIO1A1_ACODEC_ADCCLK,
+	GPIO1A1_AUDIOPWM_LOUT,
+
+	GPIO1A0_SHIFT		= 0,
+	GPIO1A0_MASK		= GENMASK(2, 0),
+	GPIO1A0_GPIO		= 0,
+	GPIO1A0_I2C3_SDAM0,
+	GPIO1A0_UART3_RXM0,
+	GPIO1A0_CAN1_RXM0,
+	GPIO1A0_AUDIOPWM_LOUT,
+	GPIO1A0_ACODEC_ADCDATA,
+	GPIO1A0_AUDIOPWM_LOUTP,
+
+	/* GRF_GPIO1A_IOMUX_H */
+	GPIO1A6_SHIFT		= 8,
+	GPIO1A6_MASK		= GENMASK(10, 8),
+	GPIO1A6_GPIO		= 0,
+	GPIO1A6_I2S1_LRCKRXM0,
+	GPIO1A6_UART4_TXM0,
+	GPIO1A6_PDM_CLK0M0,
+	GPIO1A6_AUDIOPWM_ROUTP,
+
+	GPIO1A4_SHIFT		= 0,
+	GPIO1A4_MASK		= GENMASK(2, 0),
+	GPIO1A4_GPIO		= 0,
+	GPIO1A4_I2S1_SCLKRXM0,
+	GPIO1A4_UART4_RXM0,
+	GPIO1A4_PDM_CLK1M0,
+	GPIO1A4_SPDIF_TXM0,
+
+	/* GRF_GPIO1D_IOMUX_H */
+	GPIO1D6_SHIFT		= 8,
+	GPIO1D6_MASK		= GENMASK(10, 8),
+	GPIO1D6_GPIO		= 0,
+	GPIO1D6_SDMMC0_D1,
+	GPIO1D6_UART2_RXM1,
+	GPIO1D6_UART6_RXM1,
+	GPIO1D6_PWM9_M1,
+
+	GPIO1D5_SHIFT		= 4,
+	GPIO1D5_MASK		= GENMASK(6, 4),
+	GPIO1D5_GPIO		= 0,
+	GPIO1D5_SDMMC0_D0,
+	GPIO1D5_UART2_TXM1,
+	GPIO1D5_UART6_TXM1,
+	GPIO1D5_PWM8_M1,
+
+	/* GRF_GPIO2A_IOMUX_L */
+	GPIO2A3_SHIFT		= 12,
+	GPIO2A3_MASK		= GENMASK(14, 12),
+	GPIO2A3_GPIO		= 0,
+	GPIO2A3_SDMMC1_D0,
+	GPIO2A3_GMAC0_RXD2,
+	GPIO2A3_UART6_RXM0,
+
+	GPIO2A2_SHIFT		= 8,
+	GPIO2A2_MASK		= GENMASK(10, 8),
+	GPIO2A2_GPIO		= 0,
+	GPIO2A2_SDMMC0_CLK,
+	GPIO2A2_TEST_CLKOUT,
+	GPIO2A2_UART5_TXM0,
+	GPIO2A2_CAN0_RXM1,
+
+	GPIO2A1_SHIFT		= 4,
+	GPIO2A1_MASK		= GENMASK(6, 4),
+	GPIO2A1_GPIO		= 0,
+	GPIO2A1_SDMMC0_CMD,
+	GPIO2A1_PWM10_M1,
+	GPIO2A1_UART5_RXM0,
+	GPIO2A1_CAN0_TXM1,
+
+	/* GRF_GPIO2A_IOMUX_H */
+	GPIO2A7_SHIFT		= 12,
+	GPIO2A7_MASK		= GENMASK(14, 12),
+	GPIO2A7_GPIO		= 0,
+	GPIO2A7_SDMMC1_CMD,
+	GPIO2A7_GMAC0_TXD3,
+	GPIO2A7_UART9_RXM0,
+
+	GPIO2A6_SHIFT		= 8,
+	GPIO2A6_MASK		= GENMASK(10, 8),
+	GPIO2A6_GPIO		= 0,
+	GPIO2A6_SDMMC1_D3,
+	GPIO2A6_GMAC0_TXD2,
+	GPIO2A6_UART7_TXM0,
+
+	GPIO2A5_SHIFT		= 4,
+	GPIO2A5_MASK		= GENMASK(6, 4),
+	GPIO2A5_GPIO		= 0,
+	GPIO2A5_SDMMC1_D2,
+	GPIO2A5_GMAC0_RXCLK,
+	GPIO2A5_UART7_RXM0,
+
+	GPIO2A4_SHIFT		= 0,
+	GPIO2A4_MASK		= GENMASK(2, 0),
+	GPIO2A4_GPIO		= 0,
+	GPIO2A4_SDMMC1_D1,
+	GPIO2A4_GMAC0_RXD3,
+	GPIO2A4_UART6_TXM0,
+
+	/* GRF_GPIO2B_IOMUX_L */
+	GPIO2B3_SHIFT		= 12,
+	GPIO2B3_MASK		= GENMASK(14, 12),
+	GPIO2B3_GPIO		= 0,
+	GPIO2B3_GMAC0_TXD0,
+	GPIO2B3_UART1_RXM0,
+
+	GPIO2B0_SHIFT		= 0,
+	GPIO2B0_MASK		= GENMASK(2, 0),
+	GPIO2B0_GPIO		= 0,
+	GPIO2B0_SDMMC1_CLK,
+	GPIO2B0_GMAC0_TXCLK,
+	GPIO2B0_UART9_TXM0,
+
+	/* GRF_GPIO2B_IOMUX_H */
+	GPIO2B4_SHIFT		= 0,
+	GPIO2B4_MASK		= GENMASK(2, 0),
+	GPIO2B4_GPIO		= 0,
+	GPIO2B4_GMAC0_TXD1,
+	GPIO2B4_UART1_TXM0,
+
+	/* GRF_GPIO2C_IOMUX_H */
+	GPIO2C6_SHIFT		= 8,
+	GPIO2C6_MASK		= GENMASK(10, 8),
+	GPIO2C6_GPIO		= 0,
+	GPIO2C6_CLK32K_OUT1,
+	GPIO2C6_UART8_RXM0,
+	GPIO2C6_SPI1_CS1M0,
+
+	GPIO2C5_SHIFT		= 4,
+	GPIO2C5_MASK		= GENMASK(6, 4),
+	GPIO2C5_GPIO		= 0,
+	GPIO2C5_I2S2_SDIM0,
+	GPIO2C5_GMAC0_RXER,
+	GPIO2C5_UART8_TXM0,
+	GPIO2C5_SPI2_CS1M0,
+
+	/* GRF_GPIO2D_IOMUX_H */
+	GPIO2D7_SHIFT		= 12,
+	GPIO2D7_MASK		= GENMASK(14, 12),
+	GPIO2D7_GPIO		= 0,
+	GPIO2D7_LCDC_D7,
+	GPIO2D7_BT656_D7M0,
+	GPIO2D7_SPI2_MISOM1,
+	GPIO2D7_UART8_TXM1,
+	GPIO2D7_I2S1_SDO0M2,
+
+	/* GRF_GPIO3A_IOMUX_L */
+	GPIO3A0_SHIFT		= 0,
+	GPIO3A0_MASK		= GENMASK(2, 0),
+	GPIO3A0_GPIO		= 0,
+	GPIO3A0_LCDC_CLK,
+	GPIO3A0_BT656_CLKM0,
+	GPIO3A0_SPI2_CLKM1,
+	GPIO3A0_UART8_RXM1,
+	GPIO3A0_I2S1_SDO1M2,
+
+	/* GRF_GPIO3B_IOMUX_L */
+	GPIO3B2_SHIFT		= 8,
+	GPIO3B2_MASK		= GENMASK(10, 8),
+	GPIO3B2_GPIO		= 0,
+	GPIO3B2_LCDC_D17,
+	GPIO3B2_BT1120_D8,
+	GPIO3B2_GMAC1_RXD1M0,
+	GPIO3B2_UART4_TXM1,
+	GPIO3B2_PWM9_M0,
+
+	GPIO3B1_SHIFT		= 4,
+	GPIO3B1_MASK		= GENMASK(6, 4),
+	GPIO3B1_GPIO		= 0,
+	GPIO3B1_LCDC_D16,
+	GPIO3B1_BT1120_D7,
+	GPIO3B1_GMAC1_RXD0M0,
+	GPIO3B1_UART4_RXM1,
+	GPIO3B1_PWM8_M0,
+
+	/* GRF_GPIO3B_IOMUX_H */
+	GPIO3B7_SHIFT		= 12,
+	GPIO3B7_MASK		= GENMASK(14, 12),
+	GPIO3B7_GPIO		= 0,
+	GPIO3B7_LCDC_D22,
+	GPIO3B7_PWM12_M0,
+	GPIO3B7_GMAC1_TXENM0,
+	GPIO3B7_UART3_TXM1,
+	GPIO3B7_PDM_SDI2M2,
+
+	/* GRF_GPIO3C_IOMUX_L */
+	GPIO3C3_SHIFT		= 12,
+	GPIO3C3_MASK		= GENMASK(14, 12),
+	GPIO3C3_GPIO		= 0,
+	GPIO3C3_LCDC_DEN,
+	GPIO3C3_BT1120_D15,
+	GPIO3C3_SPI1_CLKM1,
+	GPIO3C3_UART5_RXM1,
+	GPIO3C3_I2S1_SCLKRXM,
+
+	GPIO3C2_SHIFT		= 8,
+	GPIO3C2_MASK		= GENMASK(10, 8),
+	GPIO3C2_GPIO		= 0,
+	GPIO3C2_LCDC_VSYNC,
+	GPIO3C2_BT1120_D14,
+	GPIO3C2_SPI1_MISOM1,
+	GPIO3C2_UART5_TXM1,
+	GPIO3C2_I2S1_SDO3M2,
+
+	GPIO3C0_SHIFT		= 0,
+	GPIO3C0_MASK		= GENMASK(2, 0),
+	GPIO3C0_GPIO		= 0,
+	GPIO3C0_LCDC_D23,
+	GPIO3C0_PWM13_M0,
+	GPIO3C0_GMAC1_MCLKINOUTM0,
+	GPIO3C0_UART3_RXM1,
+	GPIO3C0_PDM_SDI3M2,
+
+	/* GRF_GPIO3C_IOMUX_H */
+	GPIO3C5_SHIFT		= 4,
+	GPIO3C5_MASK		= GENMASK(6, 4),
+	GPIO3C5_GPIO		= 0,
+	GPIO3C5_PWM15_IRM0,
+	GPIO3C5_SPDIF_TXM1,
+	GPIO3C5_GMAC1_MDIOM0,
+	GPIO3C5_UART7_RXM1,
+	GPIO3C5_I2S1_LRCKRXM2,
+
+	GPIO3C4_SHIFT		= 0,
+	GPIO3C4_MASK		= GENMASK(2, 0),
+	GPIO3C4_GPIO		= 0,
+	GPIO3C4_PWM14_M0,
+	GPIO3C4_VOP_PWMM1,
+	GPIO3C4_GMAC1_MDCM0,
+	GPIO3C4_UART7_TXM1,
+	GPIO3C4_PDM_CLK1M2,
+
+	/* GRF_GPIO3D_IOMUX_H */
+	GPIO3D7_SHIFT		= 12,
+	GPIO3D7_MASK		= GENMASK(14, 12),
+	GPIO3D7_GPIO		= 0,
+	GPIO3D7_CIF_D9,
+	GPIO3D7_EBC_SDDO9,
+	GPIO3D7_GMAC1_TXD3M1,
+	GPIO3D7_UART1_RXM1,
+	GPIO3D7_PDM_SDI0M1,
+
+	GPIO3D6_SHIFT		= 8,
+	GPIO3D6_MASK		= GENMASK(10, 8),
+	GPIO3D6_GPIO		= 0,
+	GPIO3D6_CIF_D8,
+	GPIO3D6_EBC_SDDO8,
+	GPIO3D6_GMAC1_TXD2M1,
+	GPIO3D6_UART1_TXM1,
+	GPIO3D6_PDM_CLK0M1,
+
+	/* GRF_GPIO4A_IOMUX_L */
+	GPIO4A3_SHIFT		= 12,
+	GPIO4A3_MASK		= GENMASK(14, 12),
+	GPIO4A3_GPIO		= 0,
+	GPIO4A3_CIF_D13,
+	GPIO4A3_EBC_SDDO13,
+	GPIO4A3_GMAC1_RXCLKM1,
+	GPIO4A3_UART7_RXM2,
+	GPIO4A3_PDM_SDI3M1,
+
+	GPIO4A2_SHIFT		= 8,
+	GPIO4A2_MASK		= GENMASK(10, 8),
+	GPIO4A2_GPIO		= 0,
+	GPIO4A2_CIF_D12,
+	GPIO4A2_EBC_SDDO12,
+	GPIO4A2_GMAC1_RXD3M1,
+	GPIO4A2_UART7_TXM2,
+	GPIO4A2_PDM_SDI2M1,
+
+	/* GRF_GPIO4A_IOMUX_H */
+	GPIO4A5_SHIFT		= 4,
+	GPIO4A5_MASK		= GENMASK(6, 4),
+	GPIO4A5_GPIO		= 0,
+	GPIO4A5_CIF_D15,
+	GPIO4A5_EBC_SDDO15,
+	GPIO4A5_GMAC1_TXD1M1,
+	GPIO4A5_UART9_RXM2,
+	GPIO4A5_I2S2_LRCKRXM1,
+
+	GPIO4A4_SHIFT		= 0,
+	GPIO4A4_MASK		= GENMASK(2, 0),
+	GPIO4A4_GPIO		= 0,
+	GPIO4A4_CIF_D14,
+	GPIO4A4_EBC_SDDO14,
+	GPIO4A4_GMAC1_TXD0M1,
+	GPIO4A4_UART9_TXM2,
+	GPIO4A4_I2S2_LRCKTXM1,
+
+	/* GRF_GPIO4C_IOMUX_H */
+	GPIO4C6_SHIFT		= 8,
+	GPIO4C6_MASK		= GENMASK(10, 8),
+	GPIO4C6_GPIO		= 0,
+	GPIO4C6_PWM13_M1,
+	GPIO4C6_SPI3_CS0M1,
+	GPIO4C6_SATA0_ACTLED,
+	GPIO4C6_UART9_RXM1,
+	GPIO4C6_I2S3_SDIM1,
+
+	GPIO4C5_SHIFT		= 4,
+	GPIO4C5_MASK		= GENMASK(6, 4),
+	GPIO4C5_GPIO		= 0,
+	GPIO4C5_PWM12_M1,
+	GPIO4C5_SPI3_MISOM1,
+	GPIO4C5_SATA1_ACTLED,
+	GPIO4C5_UART9_TXM1,
+	GPIO4C5_I2S3_SDOM1,
+
+	/* GRF_IOFUNC_SEL3 */
+	UART4_IO_SEL_SHIFT	= 14,
+	UART4_IO_SEL_MASK	= GENMASK(14, 14),
+	UART4_IO_SEL_M0		= 0,
+	UART4_IO_SEL_M1,
+
+	UART3_IO_SEL_SHIFT	= 12,
+	UART3_IO_SEL_MASK	= GENMASK(12, 12),
+	UART3_IO_SEL_M0		= 0,
+	UART3_IO_SEL_M1,
+
+	UART2_IO_SEL_SHIFT	= 10,
+	UART2_IO_SEL_MASK	= GENMASK(11, 10),
+	UART2_IO_SEL_M0		= 0,
+	UART2_IO_SEL_M1,
+
+	UART1_IO_SEL_SHIFT	= 8,
+	UART1_IO_SEL_MASK	= GENMASK(8, 8),
+	UART1_IO_SEL_M0		= 0,
+	UART1_IO_SEL_M1,
+
+	/* GRF_IOFUNC_SEL4 */
+	UART9_IO_SEL_SHIFT	= 8,
+	UART9_IO_SEL_MASK	= GENMASK(9, 8),
+	UART9_IO_SEL_M0		= 0,
+	UART9_IO_SEL_M1,
+	UART9_IO_SEL_M2,
+
+	UART8_IO_SEL_SHIFT	= 6,
+	UART8_IO_SEL_MASK	= GENMASK(6, 6),
+	UART8_IO_SEL_M0		= 0,
+	UART8_IO_SEL_M1,
+
+	UART7_IO_SEL_SHIFT	= 4,
+	UART7_IO_SEL_MASK	= GENMASK(5, 4),
+	UART7_IO_SEL_M0		= 0,
+	UART7_IO_SEL_M1,
+	UART7_IO_SEL_M2,
+
+	UART6_IO_SEL_SHIFT	= 2,
+	UART6_IO_SEL_MASK	= GENMASK(2, 2),
+	UART6_IO_SEL_M0		= 0,
+	UART6_IO_SEL_M1,
+
+	UART5_IO_SEL_SHIFT	= 0,
+	UART5_IO_SEL_MASK	= GENMASK(0, 0),
+	UART5_IO_SEL_M0		= 0,
+	UART5_IO_SEL_M1,
+};
+
 static struct mm_region rk3568_mem_map[] = {
 	{
 		.virt = 0x0UL,
@@ -39,7 +445,267 @@ struct mm_region *mem_map = rk3568_mem_map;
 
 void board_debug_uart_init(void)
 {
+#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xfdd5000)
+	static struct rk3568_pmugrf * const pmugrf = (void *)PMUGRF_BASE;
+	/* UART0 M0 */
+	rk_clrsetreg(&pmugrf->pmu_soc_con0, UART0_IO_SEL_MASK,
+		     UART0_IO_SEL_M0 << UART0_IO_SEL_SHIFT);
+
+	/* Switch iomux */
+	rk_clrsetreg(&pmugrf->pmu_gpio0c_iomux_l,
+		     GPIO0C1_MASK | GPIO0C0_MASK,
+		     GPIO0C1_UART0_TX << GPIO0C1_SHIFT |
+		     GPIO0C0_UART0_RX << GPIO0C0_SHIFT);
+
+#elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xfe650000)
+	static struct rk3568_grf * const grf = (void *)GRF_BASE;
+
+#if defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 0)
+	/* UART1 M0 */
+	rk_clrsetreg(&grf->iofunc_sel3, UART1_IO_SEL_MASK,
+		     UART1_IO_SEL_M0 << UART1_IO_SEL_SHIFT);
+
+	/* Switch iomux */
+	rk_clrsetreg(&grf->gpio2b_iomux_l,
+		     GPIO2B3_MASK, GPIO2B3_UART1_RXM0 << GPIO2B3_SHIFT);
+	rk_clrsetreg(&grf->gpio2b_iomux_h,
+		     GPIO2B4_MASK, GPIO2B4_UART1_TXM0 << GPIO2B4_SHIFT);
+#else
+	/* UART1 M1 */
+	rk_clrsetreg(&grf->iofunc_sel3, UART1_IO_SEL_MASK,
+		     UART1_IO_SEL_M1 << UART1_IO_SEL_SHIFT);
+
+	/* Switch iomux */
+	rk_clrsetreg(&grf->gpio3d_iomux_h,
+		     GPIO3D7_MASK | GPIO3D6_MASK,
+		     GPIO3D7_UART1_RXM1 << GPIO3D7_SHIFT |
+		     GPIO3D6_UART1_TXM1 << GPIO3D6_SHIFT);
+#endif
+#elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xfe660000)
+	static struct rk3568_grf * const grf = (void *)GRF_BASE;
+
+#if defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 0)
+	static struct rk3568_pmugrf * const pmugrf = (void *)PMUGRF_BASE;
+	/* UART2 M0 */
+	rk_clrsetreg(&grf->iofunc_sel3, UART2_IO_SEL_MASK,
+		     UART2_IO_SEL_M0 << UART2_IO_SEL_SHIFT);
+
+	/* Switch iomux */
+	rk_clrsetreg(&pmugrf->pmu_gpio0d_iomux_l,
+		     GPIO0D1_MASK | GPIO0D0_MASK,
+		     GPIO0D1_UART2_TXM0 << GPIO0D1_SHIFT |
+		     GPIO0D0_UART2_RXM0 << GPIO0D0_SHIFT);
+#else
+	/* UART2 M1 */
+	rk_clrsetreg(&grf->iofunc_sel3, UART2_IO_SEL_MASK,
+		     UART2_IO_SEL_M1 << UART2_IO_SEL_SHIFT);
+
+	/* Switch iomux */
+	rk_clrsetreg(&grf->gpio1d_iomux_h,
+		     GPIO1D6_MASK | GPIO1D5_MASK,
+		     GPIO1D6_UART2_RXM1 << GPIO1D6_SHIFT |
+		     GPIO1D5_UART2_TXM1 << GPIO1D5_SHIFT);
+#endif
+#elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xfe670000)
+	static struct rk3568_grf * const grf = (void *)GRF_BASE;
+
+#if defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 0)
+	/* UART3 M0 */
+	rk_clrsetreg(&grf->iofunc_sel3, UART3_IO_SEL_MASK,
+		     UART3_IO_SEL_M0 << UART3_IO_SEL_SHIFT);
+
+	/* Switch iomux */
+	rk_clrsetreg(&grf->pmu_gpio1a_iomux_l,
+		     GPIO1A1_MASK | GPIO1A0_MASK,
+		     GPIO1A1_UART3_TXM0 << GPIO1A1_SHIFT |
+		     GPIO1A0_UART3_RXM0 << GPIO1A0_SHIFT);
+#else
+	/* UART3 M1 */
+	rk_clrsetreg(&grf->iofunc_sel3, UART3_IO_SEL_MASK,
+		     UART3_IO_SEL_M1 << UART3_IO_SEL_SHIFT);
+
+	/* Switch iomux */
+	rk_clrsetreg(&grf->gpio3b_iomux_h,
+		     GPIO3B7_MASK, GPIO3B7_UART3_TXM1 << GPIO3B7_SHIFT);
+	rk_clrsetreg(&grf->gpio3c_iomux_l,
+		     GPIO3C0_MASK, GPIO3C0_UART3_RXM1 << GPIO3C0_SHIFT);
+#endif
+#elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xfe680000)
+	static struct rk3568_grf * const grf = (void *)GRF_BASE;
+
+#if defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 0)
+	/* UART4 M0 */
+	rk_clrsetreg(&grf->iofunc_sel3, UART4_IO_SEL_MASK,
+		     UART4_IO_SEL_M0 << UART4_IO_SEL_SHIFT);
+
+	/* Switch iomux */
+	rk_clrsetreg(&grf->pmu_gpio1a_iomux_h,
+		     GPIO1A6_MASK | GPIO1A4_MASK,
+		     GPIO1A6_UART4_TXM0 << GPIO1A6_SHIFT |
+		     GPIO1A4_UART4_RXM0 << GPIO1A4_SHIFT);
+#else
+	/* UART4 M1 */
+	rk_clrsetreg(&grf->iofunc_sel3, UART4_IO_SEL_MASK,
+		     UART4_IO_SEL_M1 << UART4_IO_SEL_SHIFT);
+
+	/* Switch iomux */
+	rk_clrsetreg(&grf->gpio3b_iomux_l,
+		     GPIO3B2_MASK | GPIO3B1_MASK,
+		     GPIO3B2_UART4_TXM1 << GPIO3B2_SHIFT |
+		     GPIO3B1_UART4_RXM1 << GPIO3B1_SHIFT);
+#endif
+#elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xfe690000)
+	static struct rk3568_grf * const grf = (void *)GRF_BASE;
+
+#if defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 0)
+	/* UART5 M0 */
+	rk_clrsetreg(&grf->iofunc_sel4, UART5_IO_SEL_MASK,
+		     UART5_IO_SEL_M0 << UART5_IO_SEL_SHIFT);
+
+	/* Switch iomux */
+	rk_clrsetreg(&grf->pmu_gpio2a_iomux_l,
+		     GPIO2A2_MASK | GPIO2A1_MASK,
+		     GPIO2A2_UART5_TXM0 << GPIO2A2_SHIFT |
+		     GPIO2A1_UART5_RXM0 << GPIO2A1_SHIFT);
+#else
+	/* UART5 M1 */
+	rk_clrsetreg(&grf->iofunc_sel4, UART5_IO_SEL_MASK,
+		     UART5_IO_SEL_M1 << UART5_IO_SEL_SHIFT);
+
+	/* Switch iomux */
+	rk_clrsetreg(&grf->gpio3c_iomux_l,
+		     GPIO3C3_MASK | GPIO3C2_MASK,
+		     GPIO3C3_UART5_RXM1 << GPIO3C3_SHIFT |
+		     GPIO3C2_UART5_TXM1 << GPIO3C2_SHIFT);
+#endif
+#elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xfe6a0000)
+	static struct rk3568_grf * const grf = (void *)GRF_BASE;
+
+#if defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 0)
+	/* UART6 M0 */
+	rk_clrsetreg(&grf->iofunc_sel4, UART6_IO_SEL_MASK,
+		     UART6_IO_SEL_M0 << UART6_IO_SEL_SHIFT);
+
+	/* Switch iomux */
+	rk_clrsetreg(&grf->gpio2a_iomux_l,
+		     GPIO2A3_MASK, GPIO2A3_UART6_RXM0 << GPIO2A3_SHIFT);
+	rk_clrsetreg(&grf->gpio2a_iomux_h,
+		     GPIO2A4_MASK, GPIO2A4_UART6_TXM0 << GPIO2A4_SHIFT);
+#else
+	/* UART6 M1 */
+	rk_clrsetreg(&grf->iofunc_sel4, UART6_IO_SEL_MASK,
+		     UART6_IO_SEL_M1 << UART6_IO_SEL_SHIFT);
+
+	/* Switch iomux */
+	rk_clrsetreg(&grf->gpio1d_iomux_h,
+		     GPIO1D6_MASK | GPIO1D5_MASK,
+		     GPIO1D6_UART6_RXM1 << GPIO1D6_SHIFT |
+		     GPIO1D5_UART6_TXM1 << GPIO1D5_SHIFT);
+#endif
+#elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xfe6b0000)
+	static struct rk3568_grf * const grf = (void *)GRF_BASE;
+
+#if defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 0)
+	/* UART7 M0 */
+	rk_clrsetreg(&grf->iofunc_sel4, UART7_IO_SEL_MASK,
+		     UART7_IO_SEL_M0 << UART7_IO_SEL_SHIFT);
+
+	/* Switch iomux */
+	rk_clrsetreg(&grf->gpio2a_iomux_h,
+		     GPIO2A6_MASK | GPIO2A5_MASK,
+		     GPIO2A6_UART7_TXM0 << GPIO2A6_SHIFT |
+		     GPIO2A5_UART7_RXM0 << GPIO2A5_SHIFT);
+#elif defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 1)
+	/* UART7 M1 */
+	rk_clrsetreg(&grf->iofunc_sel4, UART7_IO_SEL_MASK,
+		     UART7_IO_SEL_M1 << UART7_IO_SEL_SHIFT);
+
+	/* Switch iomux */
+	rk_clrsetreg(&grf->gpio3c_iomux_h,
+		     GPIO3C5_MASK | GPIO3C4_MASK,
+		     GPIO3C5_UART7_RXM1 << GPIO3C5_SHIFT |
+		     GPIO3C4_UART7_TXM1 << GPIO3C4_SHIFT);
+#else
+	/* UART7 M2 */
+	rk_clrsetreg(&grf->iofunc_sel4, UART7_IO_SEL_MASK,
+		     UART7_IO_SEL_M2 << UART7_IO_SEL_SHIFT);
 
+	/* Switch iomux */
+	rk_clrsetreg(&grf->gpio4a_iomux_l,
+		     GPIO4A3_MASK | GPIO4A2_MASK,
+		     GPIO4A3_UART7_RXM2 << GPIO4A3_SHIFT |
+		     GPIO4A2_UART7_TXM2 << GPIO4A2_SHIFT);
+#endif
+#elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xfe6c0000)
+	static struct rk3568_grf * const grf = (void *)GRF_BASE;
+
+#if defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 0)
+	/* UART8 M0 */
+	rk_clrsetreg(&grf->iofunc_sel4, UART8_IO_SEL_MASK,
+		     UART8_IO_SEL_M0 << UART8_IO_SEL_SHIFT);
+
+	/* Switch iomux */
+	rk_clrsetreg(&grf->gpio2c_iomux_h,
+		     GPIO2C6_MASK | GPIO2C5_MASK,
+		     GPIO2C6_UART8_RXM0 << GPIO2C6_SHIFT |
+		     GPIO2C5_UART8_TXM0 << GPIO2C5_SHIFT);
+#else
+	/* UART8 M1 */
+	rk_clrsetreg(&grf->iofunc_sel4, UART8_IO_SEL_MASK,
+		     UART8_IO_SEL_M1 << UART8_IO_SEL_SHIFT);
+
+	/* Switch iomux */
+	rk_clrsetreg(&grf->gpio2d_iomux_h,
+		     GPIO2D7_MASK | GPIO3A0_MASK,
+		     GPIO2D7_UART8_TXM1 << GPIO2D7_SHIFT |
+		     GPIO3A0_UART8_RXM1 << GPIO3A0_SHIFT);
+#endif
+#elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xfe6d0000)
+	static struct rk3568_grf * const grf = (void *)GRF_BASE;
+
+#if defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 0)
+	/* UART9 M0 */
+	rk_clrsetreg(&grf->iofunc_sel4, UART9_IO_SEL_MASK,
+		     UART9_IO_SEL_M0 << UART9_IO_SEL_SHIFT);
+
+	/* Switch iomux */
+	rk_clrsetreg(&grf->gpio2a_iomux_h,
+		     GPIO2A7_MASK, GPIO2A7_UART9_RXM0 << GPIO2A7_SHIFT);
+	rk_clrsetreg(&grf->gpio2b_iomux_l,
+		     GPIO2B0_MASK, GPIO2B0_UART9_TXM0 << GPIO2B0_SHIFT);
+#elif defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+	(CONFIG_ROCKCHIP_UART_MUX_SEL_M == 1)
+	/* UART9 M1 */
+	rk_clrsetreg(&grf->iofunc_sel4, UART9_IO_SEL_MASK,
+		     UART9_IO_SEL_M1 << UART9_IO_SEL_SHIFT);
+
+	/* Switch iomux */
+	rk_clrsetreg(&grf->gpio4c_iomux_h,
+		     GPIO4C6_MASK | GPIO4C5_MASK,
+		     GPIO4C6_UART9_RXM1 << GPIO4C6_SHIFT |
+		     GPIO4C5_UART9_TXM1 << GPIO4C5_SHIFT);
+#else
+	/* UART9 M2 */
+	rk_clrsetreg(&grf->iofunc_sel4, UART9_IO_SEL_MASK,
+		     UART9_IO_SEL_M2 << UART9_IO_SEL_SHIFT);
+
+	/* Switch iomux */
+	rk_clrsetreg(&grf->gpio4a_iomux_h,
+		     GPIO4A5_MASK | GPIO4A4_MASK,
+		     GPIO4A5_UART9_RXM2 << GPIO4A5_SHIFT |
+		     GPIO4A4_UART9_TXM2 << GPIO4A4_SHIFT);
+#endif
+#endif
 }
 
 int arch_cpu_init(void)

commit 248bf3b22d0917fcfd7da41c7d9e908b1d64ba26
Author: YouMin Chen <cym@rock-chips.com>
Date:   Mon Sep 28 15:58:39 2020 +0800

    rockchip: rk3568: not need syscon_rk3568.c when build TPL_TINY_FRAMEWORK
    
    Change-Id: I8f9aaa04dbf225fe0e5848071359cb55033cef10
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3568/Makefile b/arch/arm/mach-rockchip/rk3568/Makefile
index ae677a78d7..a6a2f1798f 100644
--- a/arch/arm/mach-rockchip/rk3568/Makefile
+++ b/arch/arm/mach-rockchip/rk3568/Makefile
@@ -4,5 +4,7 @@
 # SPDX-License-Identifier:     GPL-2.0+
 #
 
+ifneq ($(CONFIG_TPL_BUILD)$(CONFIG_TPL_TINY_FRAMEWORK),yy)
 obj-y += syscon_rk3568.o
+endif
 obj-y += rk3568.o

commit df4d86e5a061029f05235b68a4e4140497aa3bcf
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 2 16:04:52 2020 +0800

    make.sh: build with python2
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I0d08c0275691590a5308c7917f1e2d273f15fab6

diff --git a/make.sh b/make.sh
index 267756fbc1..226f24431d 100755
--- a/make.sh
+++ b/make.sh
@@ -772,6 +772,6 @@ select_ini_file
 handle_args_late
 sub_commands
 clean_files
-make CROSS_COMPILE=${TOOLCHAIN_GCC} all --jobs=${JOB}
+make PYTHON=python2 CROSS_COMPILE=${TOOLCHAIN_GCC} all --jobs=${JOB}
 pack_images
 finish

commit daae0a01d6548c381f7126747a8ef273189b547e
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Sun Jan 21 18:34:57 2018 +0900

    UPSTREAM: host-tools: use python2 explicitly for shebang
    
    All of these host tools are apparently written for Python2,
    not Python3.
    
    Use 'python2' in the shebang line according to PEP 394
    (https://www.python.org/dev/peps/pep-0394/).
    
    Change-Id: Ie56e538b0f4a234fccb460adbfd863db0712a1b0
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Tao Huang <huangtao@rock-chips.com>
    (cherry picked from commit 94b13bbae90bfb94204b8fe9c531bc163e746a9f)

diff --git a/scripts/dtc/pylibfdt/setup.py b/scripts/dtc/pylibfdt/setup.py
index daf1089425..4f7cf042bf 100755
--- a/scripts/dtc/pylibfdt/setup.py
+++ b/scripts/dtc/pylibfdt/setup.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python2
 
 """
 setup.py file for SWIG libfdt
diff --git a/scripts/mailmapper b/scripts/mailmapper
index 922ada6f5f..78b23d152d 100755
--- a/scripts/mailmapper
+++ b/scripts/mailmapper
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python2
 #
 # Copyright (C) 2014, Masahiro Yamada <yamada.m@jp.panasonic.com>
 #
diff --git a/test/py/test.py b/test/py/test.py
index 74e560a4d3..4695079ef7 100755
--- a/test/py/test.py
+++ b/test/py/test.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python2
 
 # Copyright (c) 2015 Stephen Warren
 # Copyright (c) 2015-2016, NVIDIA CORPORATION. All rights reserved.
diff --git a/tools/buildman/buildman.py b/tools/buildman/buildman.py
index 607429df7b..f5c4b047d0 100755
--- a/tools/buildman/buildman.py
+++ b/tools/buildman/buildman.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python2
 #
 # Copyright (c) 2012 The Chromium OS Authors.
 #
diff --git a/tools/dtoc/dtoc.py b/tools/dtoc/dtoc.py
index ce7bc054e5..6eacfc90a0 100755
--- a/tools/dtoc/dtoc.py
+++ b/tools/dtoc/dtoc.py
@@ -1,4 +1,4 @@
-#!/usr/bin/python
+#!/usr/bin/env python2
 #
 # Copyright (C) 2016 Google, Inc
 # Written by Simon Glass <sjg@chromium.org>
diff --git a/tools/microcode-tool.py b/tools/microcode-tool.py
index 790c27e459..069d961d80 100755
--- a/tools/microcode-tool.py
+++ b/tools/microcode-tool.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python2
 #
 # Copyright (c) 2014 Google, Inc
 #
diff --git a/tools/patman/patman.py b/tools/patman/patman.py
index 4b3bc78745..7647440be5 100755
--- a/tools/patman/patman.py
+++ b/tools/patman/patman.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python2
 #
 # Copyright (c) 2011 The Chromium OS Authors.
 #
diff --git a/tools/rkmux.py b/tools/rkmux.py
index 39173359ca..11c192a073 100755
--- a/tools/rkmux.py
+++ b/tools/rkmux.py
@@ -1,4 +1,4 @@
-#!/usr/bin/python
+#!/usr/bin/env python2
 
 # Script to create enums from datasheet register tables
 #

commit 8a06f07044fd0a4fb5d2eb550dfafe24f402deac
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 2 21:28:55 2020 +0800

    configs: rockchip-usbplug: clean with make savedefconfig
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ib95e234a618f97d1338de779f2c16ae79b4620cb

diff --git a/configs/rockchip-usbplug_defconfig b/configs/rockchip-usbplug_defconfig
index 5d95b83fae..1954d39a67 100644
--- a/configs/rockchip-usbplug_defconfig
+++ b/configs/rockchip-usbplug_defconfig
@@ -85,7 +85,6 @@ CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xff570000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_DEBUG_UART_ALWAYS_MODE=y
 CONFIG_ROCKCHIP_SFC=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y

commit 40cb163baaae34907def0b45244f9cb150ed9621
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 2 21:28:27 2020 +0800

    configs: rv1126: clean with make savedefconfig
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I9b7baebd42392d858acb5893eb8bf6c0bdcb9692

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index 0dfda59706..ebdc3e918f 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -147,7 +147,6 @@ CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
 CONFIG_ROCKCHIP_SDRAM_COMMON=y
-CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE=3
 CONFIG_DM_RESET=y
 CONFIG_SPL_DM_RESET=y
 CONFIG_SPL_RESET_ROCKCHIP=y

commit 407f6521ad96317baf2c0aaa43bb5ac40ec0a45e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Sep 27 11:31:29 2020 +0800

    serial: Kconfig: default y for DEBUG_UART_ALWAYS
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ie40ee20335c4aaafe8e31c32438b78de41bc01fd

diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 102469a619..9aa54e0559 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -348,6 +348,7 @@ config DEBUG_UART_SKIP_INIT
 
 config DEBUG_UART_ALWAYS
 	bool "Always use debug UART mode"
+	default y if !ROCKCHIP_PX5
 	help
 	  Say y to always use debug UART, skip complicated console UART register.
 

commit 41b72d132ea1888085c951454347aa03002078f6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 2 18:46:29 2020 +0800

    configs: rk3568: update spl configure
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If0b52a9aa4b152c7ee90071a01081e1e4a64e935

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index a408ce902c..2c5da35112 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -5,8 +5,6 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x80000
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.sh"
 CONFIG_ROCKCHIP_RK3568=y
-CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
-CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_ROCKCHIP_FIT_IMAGE=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y
@@ -27,6 +25,7 @@ CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_BOARD_INIT=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_SPL_SEPARATE_BSS=y
 CONFIG_SPL_SHA256_SUPPORT=y
 CONFIG_SPL_CRYPTO_SUPPORT=y
 CONFIG_SPL_HASH_SUPPORT=y

commit 9771f062dd7b216d862bf1ce1d147a7c000fc49b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 2 18:44:04 2020 +0800

    configs: rk3568: clean up with make savedefconfig
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ifda63a1d968a36bce47dc1c116e6afce0a95bc10

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index d0d6bb886f..a408ce902c 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -17,7 +17,6 @@ CONFIG_SPL_LIBDISK_SUPPORT=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3568-evb"
 CONFIG_SMBIOS_PRODUCT_NAME=""
 CONFIG_DEBUG_UART=y
-CONFIG_ANDROID_BOOT_IMAGE=y
 CONFIG_FIT=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_BOOTDELAY=0
@@ -112,7 +111,6 @@ CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_OHCI_GENERIC=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
-CONFIG_USB_DWC3_GENERIC=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_MANUFACTURER="Rockchip"

commit a5aaa1e14d47f2f12a906110bbe2edd4bd670492
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Oct 17 12:14:11 2020 +0800

    common: fdt_support: remove earlycon if uart is disabled
    
    If uart is required to be disabled during power on, it would be
    not initialized by any pre-loader and U-Boot.
    
    If we don't remove earlycon from commandline, kernel hangs while
    using earlycon to putc/getc which may dead loop for waiting uart
    status. (It seems the root cause is baundrate is not initilalized)
    
    So let's remove earlycon from commandline.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I2edcf48cb4dd301f2e79d5e94b1477c55198708f

diff --git a/common/fdt_support.c b/common/fdt_support.c
index 1577c97c8f..948565a9da 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -22,6 +22,8 @@
 #include <linux/libfdt.h>
 #include <linux/types.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 /**
  * fdt_getprop_u32_default_node - Return a node's property or a default
  *
@@ -342,6 +344,22 @@ int fdt_chosen(void *fdt)
 				 * this for compatible with legacy parameter.txt
 				 */
 				env_delete("bootargs", "initrd=", 0);
+
+				/*
+				 * If uart is required to be disabled during
+				 * power on, it would be not initialized by
+				 * any pre-loader and U-Boot.
+				 *
+				 * If we don't remove earlycon from commandline,
+				 * kernel hangs while using earlycon to putc/getc
+				 * which may dead loop for waiting uart status.
+				 * (It seems the root cause is baundrate is not
+				 * initilalized)
+				 *
+				 * So let's remove earlycon from commandline.
+				 */
+				if (gd->flags & GD_FLG_DISABLE_CONSOLE)
+					env_delete("bootargs", "earlycon=", 0);
 			}
 #endif
 		}

commit 034db99592582995a0315dd043493a1c55b5eea3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Sep 27 16:47:48 2020 +0800

    dm: serial: support always use uart debug mode
    
    In this mode, uart debug is initialized depends on
    configuration from pre-loader or CONFIG_UART_DEBUG_.
    
    The serial is not care about dts "stdout-path" and
    not register into console framework any more. It's
    nice to use pre-loader serial and make serial easy
    to configure.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If4c68229d76b6f1710a35e3ef9a2a91cb306fa9c

diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S
index 8936439f18..4e34d28218 100644
--- a/arch/arm/lib/crt0.S
+++ b/arch/arm/lib/crt0.S
@@ -84,9 +84,8 @@ ENTRY(_main)
 	/* set up gd here, outside any C code */
 	mov	r9, r0
 	bl	board_init_f_init_reserve
-	bl	board_init_f_init_serial
+	bl	board_init_f_boot_flags
 
-	mov	r0, #0
 	bl	board_init_f
 
 #if ! defined(CONFIG_SPL_BUILD)
diff --git a/arch/arm/lib/crt0_64.S b/arch/arm/lib/crt0_64.S
index 8ed3087ed1..b8e3fa7327 100644
--- a/arch/arm/lib/crt0_64.S
+++ b/arch/arm/lib/crt0_64.S
@@ -101,9 +101,8 @@ ENTRY(_main)
 	/* set up gd here, outside any C code */
 	mov	x18, x0
 	bl	board_init_f_init_reserve
-	bl	board_init_f_init_serial
+	bl	board_init_f_boot_flags
 
-	mov	x0, #0
 	bl	board_init_f
 
 #if (defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD) && !defined(CONFIG_SPL_SKIP_RELOCATE)) || \
diff --git a/common/board_f.c b/common/board_f.c
index c4806872c1..6036134382 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -119,8 +119,8 @@ __weak void board_add_ram_info(int use_default)
 
 static int init_baud_rate(void)
 {
-	if (gd && gd->serial.using_pre_serial)
-		gd->baudrate = env_get_ulong("baudrate", 10, gd->serial.baudrate);
+	if (gd && gd->serial.baudrate)
+		gd->baudrate = gd->serial.baudrate;
 	else
 		gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE);
 
@@ -148,15 +148,22 @@ static int display_text_info(void)
 	return 0;
 }
 
-#if defined(CONFIG_ROCKCHIP_PRELOADER_SERIAL)
-static int announce_pre_serial(void)
+static int announce_serial(void)
 {
 	if (gd && gd->serial.using_pre_serial)
-		printf("PreSerial: %d\n", gd->serial.id);
+		printf("PreSerial: %d, ", gd->serial.id);
+	else
+		printf("Serial: ");
+
+#ifdef CONFIG_DEBUG_UART_ALWAYS
+	printf("raw");
+#else
+	printf("console");
+#endif
+	printf(", 0x%lx\n", gd->serial.addr);
 
 	return 0;
 }
-#endif
 
 static int announce_dram_init(void)
 {
@@ -861,9 +868,8 @@ static const init_fnc_t init_sequence_f[] = {
 #if defined(CONFIG_HARD_SPI)
 	init_func_spi,
 #endif
-#if defined(CONFIG_ROCKCHIP_PRELOADER_SERIAL)
-	announce_pre_serial,
-#endif
+	announce_serial,
+
 	announce_dram_init,
 	dram_init,		/* configure available RAM banks */
 #ifdef CONFIG_POST
@@ -954,10 +960,6 @@ void board_init_f(ulong boot_flags)
 	gd->flags = boot_flags;
 	gd->have_console = 0;
 
-#if defined(CONFIG_DISABLE_CONSOLE)
-	gd->flags |= GD_FLG_DISABLE_CONSOLE;
-#endif
-
 	if (initcall_run_list(init_sequence_f))
 		hang();
 
diff --git a/common/console.c b/common/console.c
index 63612fda08..4c25ae0fd0 100644
--- a/common/console.c
+++ b/common/console.c
@@ -408,10 +408,8 @@ int fprintf(int file, const char *fmt, ...)
 
 int getc(void)
 {
-#ifdef CONFIG_DISABLE_CONSOLE
-	if (gd->flags & GD_FLG_DISABLE_CONSOLE)
+	if (!gd || gd->flags & GD_FLG_DISABLE_CONSOLE)
 		return 0;
-#endif
 
 	if (!gd->have_console)
 		return 0;
@@ -436,10 +434,8 @@ int getc(void)
 
 int tstc(void)
 {
-#ifdef CONFIG_DISABLE_CONSOLE
-	if (gd->flags & GD_FLG_DISABLE_CONSOLE)
+	if (!gd || gd->flags & GD_FLG_DISABLE_CONSOLE)
 		return 0;
-#endif
 
 	if (!gd->have_console)
 		return 0;
@@ -460,10 +456,8 @@ int tstc(void)
 
 void flushc(void)
 {
-#ifdef CONFIG_DISABLE_CONSOLE
-	if (gd->flags & GD_FLG_DISABLE_CONSOLE)
+	if (!gd || gd->flags & GD_FLG_DISABLE_CONSOLE)
 		return;
-#endif
 
 	if (gd->flags & GD_FLG_DEVINIT)
 		fclear(stdout);
@@ -520,10 +514,8 @@ static inline void print_pre_console_buffer(int flushpoint) {}
 
 void putc(const char c)
 {
-#ifdef CONFIG_DISABLE_CONSOLE
 	if (!gd || gd->flags & GD_FLG_DISABLE_CONSOLE)
 		return;
-#endif
 
 #ifdef CONFIG_DEBUG_UART
 	/* if we don't have a console yet, use the debug UART */
diff --git a/common/init/board_init.c b/common/init/board_init.c
index 9269ca858d..3d83bbf8aa 100644
--- a/common/init/board_init.c
+++ b/common/init/board_init.c
@@ -130,10 +130,15 @@ void board_init_f_init_reserve(ulong base)
 }
 
 /*
- * Board-specific Platform code can init serial earlier if needed
+ * Board-specific Platform code can init boot flags if needed
  */
-__weak int board_init_f_init_serial(void)
+__weak int board_init_f_boot_flags(void)
 {
+	gd->baudrate = CONFIG_BAUDRATE;
+	gd->serial.baudrate = CONFIG_BAUDRATE;
+	gd->serial.addr = CONFIG_DEBUG_UART_BASE;
+	gd->serial.using_pre_serial = 0;
+
 	return 0;
 }
 
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index aeed538fa4..102469a619 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -346,6 +346,11 @@ config DEBUG_UART_SKIP_INIT
 	  Select this if the UART you want to use for debug output is already
 	  initialized by the time U-Boot starts its execution.
 
+config DEBUG_UART_ALWAYS
+	bool "Always use debug UART mode"
+	help
+	  Say y to always use debug UART, skip complicated console UART register.
+
 config ALTERA_JTAG_UART
 	bool "Altera JTAG UART support"
 	depends on DM_SERIAL
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index c702304e79..b4d1fa56bc 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -246,6 +246,12 @@ static inline void _debug_uart_init(void)
 	struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
 	int baud_divisor;
 
+	if (gd && gd->flags & GD_FLG_DISABLE_CONSOLE)
+		return;
+
+	if (gd && gd->serial.using_pre_serial)
+		return;
+
 	/*
 	 * We copy the code from above because it is already horribly messy.
 	 * Trying to refactor to nicely remove the duplication doesn't seem
@@ -266,13 +272,109 @@ static inline void _debug_uart_init(void)
 
 static inline void _debug_uart_putc(int ch)
 {
-	struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
+	struct NS16550 *com_port;
+
+	if (gd && gd->flags & GD_FLG_DISABLE_CONSOLE)
+		return;
+
+	if (gd && gd->serial.addr)
+		com_port = (struct NS16550 *)gd->serial.addr;
+	else
+		com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
 
 	while (!(serial_din(&com_port->lsr) & UART_LSR_THRE))
 		;
 	serial_dout(&com_port->thr, ch);
 }
 
+static inline int _debug_uart_getc(void)
+{
+	struct NS16550 *com_port;
+
+	if (gd && gd->flags & GD_FLG_DISABLE_CONSOLE)
+		return 0;
+
+	if (gd && gd->serial.addr)
+		com_port = (struct NS16550 *)gd->serial.addr;
+	else
+		com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
+
+	while (!(serial_din(&com_port->lsr) & UART_LSR_DR))
+		;
+
+	return serial_din(&com_port->rbr);
+}
+
+static inline int _debug_uart_tstc(int input)
+{
+	struct NS16550 *com_port;
+
+	if (gd && gd->flags & GD_FLG_DISABLE_CONSOLE)
+		return 0;
+
+	if (gd && gd->serial.addr)
+		com_port = (struct NS16550 *)gd->serial.addr;
+	else
+		com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
+
+	if (input)
+		return serial_din(&com_port->lsr) & UART_LSR_DR ? 1 : 0;
+	else
+		return serial_din(&com_port->lsr) & UART_LSR_THRE ? 0 : 1;
+}
+
+static inline int _debug_uart_clrc(void)
+{
+	struct NS16550 *com_port;
+
+	if (gd && gd->flags & GD_FLG_DISABLE_CONSOLE)
+		return 0;
+
+	if (gd && gd->serial.addr)
+		com_port = (struct NS16550 *)gd->serial.addr;
+	else
+		com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
+
+	/*
+	 * Wait fifo flush.
+	 *
+	 * UART_USR: bit2 trans_fifo_empty:
+	 *	0 = Transmit FIFO is not empty
+	 *	1 = Transmit FIFO is empty
+	 */
+	while (!(serial_din(&com_port->rbr + 0x1f) & 0x04))
+		;
+
+	return 0;
+}
+
+/* should use gd->baudrate, it can be updated by env callback: on_baudrate() */
+static inline int _debug_uart_setbrg(void)
+{
+	struct NS16550 *com_port;
+	int baud_divisor;
+
+	if (gd && gd->flags & GD_FLG_DISABLE_CONSOLE)
+		return 0;
+
+	if (gd && gd->serial.addr) {
+		com_port = (struct NS16550 *)gd->serial.addr;
+		baud_divisor = ns16550_calc_divisor(com_port,
+			CONFIG_DEBUG_UART_CLOCK, gd->baudrate);
+	} else {
+		com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
+		baud_divisor = ns16550_calc_divisor(com_port,
+			CONFIG_DEBUG_UART_CLOCK, CONFIG_BAUDRATE);
+	}
+
+	serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL);
+	serial_dout(&com_port->dll, baud_divisor & 0xff);
+	serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff);
+	serial_dout(&com_port->lcr, UART_LCRVAL);
+
+	return 0;
+}
+
 DEBUG_UART_FUNCS
 
 #endif
@@ -318,8 +420,15 @@ static int ns16550_serial_putc(struct udevice *dev, const char ch)
 {
 	struct NS16550 *const com_port = dev_get_priv(dev);
 
-	if (!(serial_in(&com_port->lsr) & UART_LSR_THRE))
-		return -EAGAIN;
+	/*
+	 * Use fifo function.
+	 *
+	 * UART_USR: bit1 trans_fifo_not_full:
+	 *	0 = Transmit FIFO is full;
+	 *	1 = Transmit FIFO is not full;
+	 */
+	while (!(serial_in(&com_port->rbr + 0x1f) & 0x02))
+		;
 	serial_out(ch, &com_port->thr);
 
 	/*
@@ -367,6 +476,23 @@ static int ns16550_serial_setbrg(struct udevice *dev, int baudrate)
 	return 0;
 }
 
+static int ns16550_serial_clear(struct udevice *dev)
+{
+	struct NS16550 *const com_port = dev_get_priv(dev);
+
+	/*
+	 * Wait fifo flush.
+	 *
+	 * UART_USR: bit2 trans_fifo_empty:
+	 *	0 = Transmit FIFO is not empty
+	 *	1 = Transmit FIFO is empty
+	 */
+	while (!(serial_in(&com_port->rbr + 0x1f) & 0x04))
+		;
+
+	return 0;
+}
+
 int ns16550_serial_probe(struct udevice *dev)
 {
 	struct NS16550 *const com_port = dev_get_priv(dev);
@@ -442,7 +568,7 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
 		if (!IS_ERR_VALUE(err))
 			plat->clock = err;
 	} else if (err != -ENOENT && err != -ENODEV && err != -ENOSYS) {
-		debug("ns16550 failed to get clock\n");
+		printf("ns16550 failed to get clock, err=%d\n", err);
 		return err;
 	}
 
@@ -467,8 +593,10 @@ const struct dm_serial_ops ns16550_serial_ops = {
 	.pending = ns16550_serial_pending,
 	.getc = ns16550_serial_getc,
 	.setbrg = ns16550_serial_setbrg,
+	.clear = ns16550_serial_clear,
 };
 
+#if CONFIG_IS_ENABLED(SERIAL_PRESENT)
 #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
 /*
  * Please consider existing compatible strings before adding a new
@@ -491,8 +619,6 @@ static const struct udevice_id ns16550_serial_ids[] = {
 };
 #endif /* OF_CONTROL && !OF_PLATDATA */
 
-#if CONFIG_IS_ENABLED(SERIAL_PRESENT)
-
 /* TODO(sjg@chromium.org): Integrate this into a macro like CONFIG_IS_ENABLED */
 #if !defined(CONFIG_TPL_BUILD) || defined(CONFIG_TPL_DM_SERIAL)
 U_BOOT_DRIVER(ns16550_serial) = {
diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c
index 2e5116f7ce..2c37643224 100644
--- a/drivers/serial/serial-uclass.c
+++ b/drivers/serial/serial-uclass.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <debug_uart.h>
 #include <dm.h>
 #include <environment.h>
 #include <errno.h>
@@ -27,6 +28,7 @@ static const unsigned long baudrate_table[] = CONFIG_SYS_BAUDRATE_TABLE;
 #error "Serial is required before relocation - define CONFIG_$(SPL_)SYS_MALLOC_F_LEN to make this work"
 #endif
 
+#ifndef CONFIG_DEBUG_UART_ALWAYS
 static int serial_check_stdout(const void *blob, struct udevice **devp)
 {
 	int node;
@@ -134,6 +136,9 @@ int serial_init(void)
 
 	return 0;
 }
+#else
+int serial_init(void) { return 0; }
+#endif
 
 /* Called after relocation */
 void serial_initialize(void)
@@ -184,6 +189,14 @@ static int __serial_tstc(struct udevice *dev)
 	return 1;
 }
 
+static void __serial_clear(struct udevice *dev)
+{
+	struct dm_serial_ops *ops = serial_get_ops(dev);
+
+	if (ops->clear)
+		ops->clear(dev);
+}
+
 #if CONFIG_IS_ENABLED(SERIAL_RX_BUFFER)
 static int _serial_tstc(struct udevice *dev)
 {
@@ -226,42 +239,108 @@ void serial_putc(char ch)
 {
 	if (gd->cur_serial_dev)
 		_serial_putc(gd->cur_serial_dev, ch);
+	else
+		printch(ch);
 }
 
 void serial_puts(const char *str)
 {
 	if (gd->cur_serial_dev)
 		_serial_puts(gd->cur_serial_dev, str);
+	else
+		printascii(str);
 }
 
 int serial_getc(void)
 {
-	if (!gd->cur_serial_dev)
-		return 0;
-
-	return _serial_getc(gd->cur_serial_dev);
+	if (gd->cur_serial_dev)
+		return _serial_getc(gd->cur_serial_dev);
+	else
+		return debug_uart_getc();
 }
 
 int serial_tstc(void)
 {
-	if (!gd->cur_serial_dev)
-		return 0;
-
-	return _serial_tstc(gd->cur_serial_dev);
+	if (gd->cur_serial_dev)
+		return _serial_tstc(gd->cur_serial_dev);
+	else
+		return debug_uart_tstc();
 }
 
 void serial_setbrg(void)
 {
 	struct dm_serial_ops *ops;
 
-	if (!gd->cur_serial_dev)
+	if (!gd->cur_serial_dev) {
+		debug_uart_setbrg();
 		return;
+	}
 
 	ops = serial_get_ops(gd->cur_serial_dev);
 	if (ops->setbrg)
 		ops->setbrg(gd->cur_serial_dev, gd->baudrate);
 }
 
+void serial_clear(void)
+{
+	if (gd->cur_serial_dev)
+		__serial_clear(gd->cur_serial_dev);
+	else
+		debug_uart_clrc();
+}
+
+void serial_dev_putc(struct udevice *dev, char ch)
+{
+	if (!dev)
+		return;
+
+	_serial_putc(dev, ch);
+}
+
+void serial_dev_puts(struct udevice *dev, const char *str)
+{
+	if (!dev)
+		return;
+
+	_serial_puts(dev, str);
+}
+
+int serial_dev_getc(struct udevice *dev)
+{
+	if (!dev)
+		return 0;
+
+	return _serial_getc(dev);
+}
+
+int serial_dev_tstc(struct udevice *dev)
+{
+	if (!dev)
+		return 0;
+
+	return _serial_tstc(dev);
+}
+
+void serial_dev_setbrg(struct udevice *dev, int baudrate)
+{
+	struct dm_serial_ops *ops;
+
+	if (!dev)
+		return;
+
+	ops = serial_get_ops(dev);
+	if (ops->setbrg)
+		ops->setbrg(dev, baudrate);
+}
+
+void serial_dev_clear(struct udevice *dev)
+{
+	if (!dev)
+		return;
+
+	__serial_clear(dev);
+}
+
 void serial_stdio_init(void)
 {
 }
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index e53200ae35..b27870655d 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -33,6 +33,7 @@ struct pm_ctx {
 
 struct pre_serial {
 	u32 using_pre_serial;
+	u32 enable;
 	u32 id;
 	u32 baudrate;
 	ulong addr;
diff --git a/include/common.h b/include/common.h
index 9e6e194b8f..c73aaf2654 100644
--- a/include/common.h
+++ b/include/common.h
@@ -149,7 +149,7 @@ void board_init_f_init_reserve(ulong base);
 /*
  * Board-specific Platform code can init serial earlier if needed
  */
-__weak int board_init_f_init_serial(void);
+__weak int board_init_f_boot_flags(void);
 
 /**
  * arch_setup_gd() - Set up the global_data pointer
diff --git a/include/debug_uart.h b/include/debug_uart.h
index 5aefafd601..578d000baf 100644
--- a/include/debug_uart.h
+++ b/include/debug_uart.h
@@ -76,6 +76,10 @@ static inline void board_debug_uart_init(void)
  * @ch:		Character to output
  */
 void printch(int ch);
+int debug_uart_getc(void);
+int debug_uart_tstc(void);
+int debug_uart_clrc(void);
+int debug_uart_setbrg(void);
 
 /**
  * printascii() - Output an ASCII string to the debug UART
@@ -145,6 +149,26 @@ void printdec(uint value);
 	{ \
 		_printch(ch); \
 	} \
+\
+	int debug_uart_getc(void)\
+	{ \
+		return _debug_uart_getc(); \
+	} \
+\
+	int debug_uart_tstc(void)\
+	{ \
+		return _debug_uart_tstc(true); \
+	} \
+\
+	int debug_uart_clrc(void)\
+	{ \
+		return _debug_uart_clrc(); \
+	} \
+\
+	int debug_uart_setbrg(void)\
+	{ \
+		return _debug_uart_setbrg(); \
+	} \
 \
 	void printascii(const char *str) \
 	{ \

commit 93586e70e11cc13874048813bfe419355418a177
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Sep 24 17:01:39 2020 +0800

    rockchip: board/spl: implement board_init_f_boot_flags()
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I6510f53c1a2713358ba6b5a40485c9e1aeee98dc

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 254fe9205f..bbd6b630e9 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -341,7 +341,8 @@ static void early_download(void)
 
 static void board_debug_init(void)
 {
-	if (!gd->serial.using_pre_serial)
+	if (!gd->serial.using_pre_serial &&
+	    !(gd->flags & GD_FLG_DISABLE_CONSOLE))
 		debug_uart_init();
 
 	if (tstc()) {
@@ -560,28 +561,44 @@ void cpu_secondary_init_r(void)
 }
 #endif
 
+int board_init_f_boot_flags(void)
+{
+	int boot_flags = 0;
+
+	/* pre-loader serial */
 #if defined(CONFIG_ROCKCHIP_PRELOADER_SERIAL) && \
     defined(CONFIG_ROCKCHIP_PRELOADER_ATAGS)
-int board_init_f_init_serial(void)
-{
-	struct tag *t = atags_get_tag(ATAG_SERIAL);
+	struct tag *t;
 
+	t = atags_get_tag(ATAG_SERIAL);
 	if (t) {
-		gd->serial.using_pre_serial = t->u.serial.enable;
+		gd->serial.using_pre_serial = 1;
+		gd->serial.enable = t->u.serial.enable;
 		gd->serial.baudrate = t->u.serial.baudrate;
 		gd->serial.addr = t->u.serial.addr;
 		gd->serial.id = t->u.serial.id;
-
-		debug("%s: enable=%d, addr=0x%lx, baudrate=%d, id=%d\n",
-		      __func__, gd->serial.using_pre_serial,
-		      gd->serial.addr, gd->serial.baudrate,
-		      gd->serial.id);
+		gd->baudrate = CONFIG_BAUDRATE;
+		if (!t->u.serial.enable)
+			boot_flags |= GD_FLG_DISABLE_CONSOLE;
+		debug("preloader: enable=%d, addr=0x%lx, baudrate=%d, id=%d\n",
+		      gd->serial.enable, gd->serial.addr,
+		      gd->serial.baudrate, gd->serial.id);
+	} else
+#endif
+	{
+		gd->baudrate = CONFIG_BAUDRATE;
+		gd->serial.baudrate = CONFIG_BAUDRATE;
+		gd->serial.addr = CONFIG_DEBUG_UART_BASE;
 	}
 
-	return 0;
-}
+	/* The highest priority to turn off (override) console */
+#if defined(CONFIG_DISABLE_CONSOLE)
+	boot_flags |= GD_FLG_DISABLE_CONSOLE;
 #endif
 
+	return boot_flags;
+}
+
 #if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
 #include <fdt_support.h>
 #include <usb.h>
diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index 9488413c14..2950b12c25 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -209,6 +209,45 @@ int board_fit_config_name_match(const char *name)
 }
 #endif
 
+int board_init_f_boot_flags(void)
+{
+	int boot_flags = 0;
+
+	/* pre-loader serial */
+#if defined(CONFIG_ROCKCHIP_PRELOADER_SERIAL) && \
+    defined(CONFIG_ROCKCHIP_PRELOADER_ATAGS)
+	struct tag *t;
+
+
+	t = atags_get_tag(ATAG_SERIAL);
+	if (t) {
+		gd->serial.using_pre_serial = 1;
+		gd->serial.enable = t->u.serial.enable;
+		gd->serial.baudrate = t->u.serial.baudrate;
+		gd->serial.addr = t->u.serial.addr;
+		gd->serial.id = t->u.serial.id;
+		gd->baudrate = t->u.serial.baudrate;
+		if (!t->u.serial.enable)
+			boot_flags |= GD_FLG_DISABLE_CONSOLE;
+		debug("preloader: enable=%d, addr=0x%x, baudrate=%d, id=%d\n",
+		      t->u.serial.enable, (u32)t->u.serial.addr,
+		      t->u.serial.baudrate, t->u.serial.id);
+	} else
+#endif
+	{
+		gd->baudrate = CONFIG_BAUDRATE;
+		gd->serial.baudrate = CONFIG_BAUDRATE;
+		gd->serial.addr = CONFIG_DEBUG_UART_BASE;
+	}
+
+	/* The highest priority to turn off (override) console */
+#if defined(CONFIG_DISABLE_CONSOLE)
+	boot_flags |= GD_FLG_DISABLE_CONSOLE;
+#endif
+
+	return boot_flags;
+}
+
 #ifdef CONFIG_SPL_BOARD_INIT
 __weak int rk_spl_board_init(void)
 {

commit 6a1649e26da7ec1c4cd98491fa9149bcf59e7230
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 6 20:06:37 2020 +0800

    core: node: remove unused API
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I797cb2f594865ab9310651183bf98b8112fe429e

diff --git a/drivers/core/of_access.c b/drivers/core/of_access.c
index c8c3ab8297..db2f64bd56 100644
--- a/drivers/core/of_access.c
+++ b/drivers/core/of_access.c
@@ -29,8 +29,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define PROP_HIDE_MAGIC		1
-
 /* list of struct alias_prop aliases */
 LIST_HEAD(aliases_lookup);
 
@@ -173,40 +171,6 @@ const void *of_get_property(const struct device_node *np, const char *name,
 	return pp ? pp->value : NULL;
 }
 
-const char *of_hide_property(struct device_node *np, const char *name)
-{
-	struct property *pp;
-
-	if (!np)
-		return NULL;
-
-	for (pp = np->properties; pp; pp = pp->next) {
-		if (strcmp(pp->name, name) == 0) {
-			pp->name[0] += PROP_HIDE_MAGIC;
-			return (const char *)pp->name;
-		}
-	}
-
-	return NULL;
-}
-
-int of_present_property(struct device_node *np, const char *name)
-{
-	struct property *pp;
-
-	if (!np)
-		return -FDT_ERR_NOTFOUND;
-
-	for (pp = np->properties; pp; pp = pp->next) {
-		if (strcmp(pp->name, name) == 0) {
-			pp->name[0] -= PROP_HIDE_MAGIC;
-			break;
-		}
-	}
-
-	return 0;
-}
-
 static const char *of_prop_next_string(struct property *prop, const char *cur)
 {
 	const void *curv = cur;
@@ -900,17 +864,5 @@ struct device_node *of_alias_dump(void)
 
 struct device_node *of_get_stdout(void)
 {
-	struct device_node *np;
-
-	if (gd && gd->serial.using_pre_serial) {
-		np = of_alias_get_dev("serial", gd->serial.id);
-		if (!np)
-			printf("Can't find alias serial%d\n", gd->serial.id);
-		else
-			debug("Find alias serial: %s\n", np->full_name);
-
-		of_stdout = np;
-	}
-
 	return of_stdout;
 }
diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index 8d10e7a97f..992dd573a2 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -512,24 +512,6 @@ const void *ofnode_get_property(ofnode node, const char *propname, int *lenp)
 				   propname, lenp);
 }
 
-const char *ofnode_hide_property(ofnode node, const char *propname)
-{
-	if (ofnode_is_np(node))
-		return of_hide_property((struct device_node *)ofnode_to_np(node),
-					propname);
-	else
-		return NULL;
-}
-
-int ofnode_present_property(ofnode node, const char *propname)
-{
-	if (ofnode_is_np(node))
-		return of_present_property((struct device_node *)ofnode_to_np(node),
-					   propname);
-	else
-		return -ENOSYS;
-}
-
 bool ofnode_is_available(ofnode node)
 {
 	if (ofnode_is_np(node))
diff --git a/drivers/core/read.c b/drivers/core/read.c
index 83da74c422..2692113853 100644
--- a/drivers/core/read.c
+++ b/drivers/core/read.c
@@ -154,16 +154,6 @@ const void *dev_read_prop(struct udevice *dev, const char *propname, int *lenp)
 	return ofnode_get_property(dev_ofnode(dev), propname, lenp);
 }
 
-const char *dev_hide_prop(struct udevice *dev, const char *propname)
-{
-	return ofnode_hide_property(dev_ofnode(dev), propname);
-}
-
-int dev_present_prop(struct udevice *dev, const char *propname)
-{
-	return ofnode_present_property(dev_ofnode(dev), propname);
-}
-
 int dev_read_alias_seq(struct udevice *dev, int *devnump)
 {
 	ofnode node = dev_ofnode(dev);
diff --git a/include/dm/of_access.h b/include/dm/of_access.h
index fd72340fd0..48baad5ef9 100644
--- a/include/dm/of_access.h
+++ b/include/dm/of_access.h
@@ -104,24 +104,6 @@ struct property *of_find_property(const struct device_node *np,
 const void *of_get_property(const struct device_node *np, const char *name,
 			    int *lenp);
 
-/**
- * of_hide_property() - hide a property
- *
- * @np: Pointer to device node holding property
- * @name: Name of property to hide
- * @return hidden name if ok, otherwise NULL
- */
-const char *of_hide_property(struct device_node *np, const char *name);
-
-/**
- * of_present_property() - present a property hidden before
- *
- * @np: Pointer to device node holding property
- * @name: Hidden name of property
- * @return 0 if ok, otherwise failed
- */
-int of_present_property(struct device_node *np, const char *name);
-
 /**
  * of_device_is_compatible() - Check if the node matches given constraints
  * @device: pointer to node
diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index 27d177786b..8a4291a6ad 100644
--- a/include/dm/ofnode.h
+++ b/include/dm/ofnode.h
@@ -540,24 +540,6 @@ int ofnode_decode_display_timing(ofnode node, int index,
  */
 const void *ofnode_get_property(ofnode node, const char *propname, int *lenp);
 
-/**
- * ofnode_hide_property() - hide a property
- *
- * @np: Pointer to device node holding property
- * @name: Name of property to hide
- * @return hidden name if ok, otherwise NULL
- */
-const char *ofnode_hide_property(ofnode node, const char *propname);
-
-/**
- * ofnode_present_property() - present a property hidden before
- *
- * @np: Pointer to device node holding property
- * @name: Hidden name of property
- * @return 0 if ok, otherwise failed
- */
-int ofnode_present_property(ofnode node, const char *propname);
-
 /**
  * ofnode_is_available() - check if a node is marked available
  *
diff --git a/include/dm/read.h b/include/dm/read.h
index 9a5820c9de..0a78d04815 100644
--- a/include/dm/read.h
+++ b/include/dm/read.h
@@ -319,24 +319,6 @@ int dev_read_phandle(struct udevice *dev);
  */
 const void *dev_read_prop(struct udevice *dev, const char *propname, int *lenp);
 
-/**
- * dev_hide_prop() - hide a property
- *
- * @np: Pointer to device node holding property
- * @name: Name of property to hide
- * @return hidden name if ok, otherwise NULL
- */
-const char *dev_hide_prop(struct udevice *dev, const char *propname);
-
-/**
- * dev_present_prop() - present a property hidden before
- *
- * @np: Pointer to device node holding property
- * @name: Hidden name of property
- * @return 0 if ok, otherwise failed
- */
-int dev_present_prop(struct udevice *dev, const char *propname);
-
 /**
  * dev_read_alias_seq() - Get the alias sequence number of a node
  *

commit 8c22eae69199c4ebcf5536ea94fcb34828de0425
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 6 19:37:48 2020 +0800

    dm: serial/16550: rollback to upstream version
    
    rollback to: 02234e4 UPSTREAM: usbtty: fix typos
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I84296fad2b06823afc77477ef4ef11a2f801960a

diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 9ee08c7cc9..aeed538fa4 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -346,11 +346,6 @@ config DEBUG_UART_SKIP_INIT
 	  Select this if the UART you want to use for debug output is already
 	  initialized by the time U-Boot starts its execution.
 
-config DEBUG_UART_ALWAYS_MODE
-	bool "Always use debug UART mode"
-	help
-	  Select this to always use debug UART, skip complicated console UART register.
-
 config ALTERA_JTAG_UART
 	bool "Altera JTAG UART support"
 	depends on DM_SERIAL
@@ -536,7 +531,7 @@ config STM32X7_SERIAL
 
 config MPC8XX_CONS
 	bool "Console driver for MPC8XX"
-	depends on MPC8xx
+	depends on 8xx
 	default y
 
 choice
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index 36e7c8911a..c702304e79 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -88,7 +88,7 @@ static inline int serial_in_shift(void *addr, int shift)
 #ifdef CONFIG_DM_SERIAL
 
 #ifndef CONFIG_SYS_NS16550_CLK
-#define CONFIG_SYS_NS16550_CLK  24000000
+#define CONFIG_SYS_NS16550_CLK  0
 #endif
 
 static void ns16550_writeb(NS16550_t port, int offset, int value)
@@ -254,13 +254,6 @@ static inline void _debug_uart_init(void)
 	 */
 	baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
 					    CONFIG_BAUDRATE);
-
-	if (gd && gd->serial.using_pre_serial) {
-		com_port = (struct NS16550 *)gd->serial.addr;
-		baud_divisor = ns16550_calc_divisor(com_port,
-			CONFIG_DEBUG_UART_CLOCK, gd->serial.baudrate);
-	}
-
 	serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER);
 	serial_dout(&com_port->mcr, UART_MCRVAL);
 	serial_dout(&com_port->fcr, UART_FCR_DEFVAL);
@@ -275,9 +268,6 @@ static inline void _debug_uart_putc(int ch)
 {
 	struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
 
-	if (gd && gd->serial.using_pre_serial)
-		com_port = (struct NS16550 *)gd->serial.addr;
-
 	while (!(serial_din(&com_port->lsr) & UART_LSR_THRE))
 		;
 	serial_dout(&com_port->thr, ch);
@@ -298,13 +288,6 @@ static inline void _debug_uart_init(void)
 
 	baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
 					    CONFIG_BAUDRATE);
-
-	if (gd && gd->serial.using_pre_serial) {
-		com_port = (struct NS16550 *)gd->serial.addr;
-		baud_divisor = ns16550_calc_divisor(com_port,
-			CONFIG_DEBUG_UART_CLOCK, gd->serial.baudrate);
-	}
-
 	serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER);
 	serial_dout(&com_port->mdr1, 0x7);
 	serial_dout(&com_port->mcr, UART_MCRVAL);
@@ -321,9 +304,6 @@ static inline void _debug_uart_putc(int ch)
 {
 	struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
 
-	if (gd && gd->serial.using_pre_serial)
-		com_port = (struct NS16550 *)gd->serial.addr;
-
 	while (!(serial_din(&com_port->lsr) & UART_LSR_THRE))
 		;
 	serial_dout(&com_port->thr, ch);
@@ -338,20 +318,8 @@ static int ns16550_serial_putc(struct udevice *dev, const char ch)
 {
 	struct NS16550 *const com_port = dev_get_priv(dev);
 
-#ifdef CONFIG_ARCH_ROCKCHIP
-	/*
-	 * Use fifo function.
-	 *
-	 * UART_USR: bit1 trans_fifo_not_full:
-	 *	0 = Transmit FIFO is full;
-	 *	1 = Transmit FIFO is not full;
-	 */
-	while (!(serial_in(&com_port->rbr + 0x1f) & 0x02))
-		;
-#else
 	if (!(serial_in(&com_port->lsr) & UART_LSR_THRE))
 		return -EAGAIN;
-#endif
 	serial_out(ch, &com_port->thr);
 
 	/*
@@ -399,24 +367,6 @@ static int ns16550_serial_setbrg(struct udevice *dev, int baudrate)
 	return 0;
 }
 
-static int ns16550_serial_clear(struct udevice *dev)
-{
-#ifdef CONFIG_ARCH_ROCKCHIP
-	struct NS16550 *const com_port = dev_get_priv(dev);
-
-	/*
-	 * Wait fifo flush.
-	 *
-	 * UART_USR: bit2 trans_fifo_empty:
-	 *	0 = Transmit FIFO is not empty
-	 *	1 = Transmit FIFO is empty
-	 */
-	while (!(serial_in(&com_port->rbr + 0x1f) & 0x04))
-		;
-#endif
-	return 0;
-}
-
 int ns16550_serial_probe(struct udevice *dev)
 {
 	struct NS16550 *const com_port = dev_get_priv(dev);
@@ -480,10 +430,6 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
 	plat->base = addr;
 #else
-
-	if (gd && gd->serial.using_pre_serial && gd->serial.id == dev->req_seq)
-		addr = gd->serial.addr;
-
 	plat->base = (unsigned long)map_physmem(addr, 0, MAP_NOCACHE);
 #endif
 
@@ -496,7 +442,7 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
 		if (!IS_ERR_VALUE(err))
 			plat->clock = err;
 	} else if (err != -ENOENT && err != -ENODEV && err != -ENOSYS) {
-		printf("ns16550 failed to get clock, err=%d\n", err);
+		debug("ns16550 failed to get clock\n");
 		return err;
 	}
 
@@ -521,10 +467,8 @@ const struct dm_serial_ops ns16550_serial_ops = {
 	.pending = ns16550_serial_pending,
 	.getc = ns16550_serial_getc,
 	.setbrg = ns16550_serial_setbrg,
-	.clear = ns16550_serial_clear,
 };
 
-#if CONFIG_IS_ENABLED(SERIAL_PRESENT)
 #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
 /*
  * Please consider existing compatible strings before adding a new
@@ -547,6 +491,8 @@ static const struct udevice_id ns16550_serial_ids[] = {
 };
 #endif /* OF_CONTROL && !OF_PLATDATA */
 
+#if CONFIG_IS_ENABLED(SERIAL_PRESENT)
+
 /* TODO(sjg@chromium.org): Integrate this into a macro like CONFIG_IS_ENABLED */
 #if !defined(CONFIG_TPL_BUILD) || defined(CONFIG_TPL_DM_SERIAL)
 U_BOOT_DRIVER(ns16550_serial) = {
diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c
index 16b9e02827..2e5116f7ce 100644
--- a/drivers/serial/serial-uclass.c
+++ b/drivers/serial/serial-uclass.c
@@ -15,7 +15,6 @@
 #include <dm/lists.h>
 #include <dm/device-internal.h>
 #include <dm/of_access.h>
-#include <dm/uclass-internal.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -28,7 +27,6 @@ static const unsigned long baudrate_table[] = CONFIG_SYS_BAUDRATE_TABLE;
 #error "Serial is required before relocation - define CONFIG_$(SPL_)SYS_MALLOC_F_LEN to make this work"
 #endif
 
-#ifndef CONFIG_DEBUG_UART_ALWAYS_MODE
 static int serial_check_stdout(const void *blob, struct udevice **devp)
 {
 	int node;
@@ -56,23 +54,6 @@ static int serial_check_stdout(const void *blob, struct udevice **devp)
 	}
 	if (node < 0)
 		node = fdt_path_offset(blob, "console");
-
-	if (gd && gd->serial.using_pre_serial) {
-		const char *serial_path;
-		char serial[12];
-
-		snprintf(serial, 12, "serial%d", gd->serial.id);
-		serial_path = fdt_get_alias(blob, serial);
-		if (serial_path) {
-			debug("Find alias %s, path: %s\n", serial, serial_path);
-			node = fdt_path_offset(blob, serial_path);
-			if (node < 0)
-				printf("Can't find %s by path\n", serial);
-		} else {
-			printf("Can't find alias %s\n", serial);
-		}
-	}
-
 	if (!uclass_get_device_by_of_offset(UCLASS_SERIAL, node, devp))
 		return 0;
 
@@ -88,72 +69,11 @@ static int serial_check_stdout(const void *blob, struct udevice **devp)
 
 	return -ENODEV;
 }
-#endif
-
-#if defined(CONFIG_OF_LIVE) && !defined(CONFIG_DEBUG_UART_ALWAYS_MODE)
-/*
- * Hide and present pinctrl prop int live device tree
- *
- * 1. We bind all serial nodes including UART debug node from kernel dtb.
- *
- * 2. On some rockchip platforms, UART debug and SDMMC pin are multiplex.
- *    Without this, iomux is switched from SDMMC => UART debug at this time.
- *
- * 3. We may switch to UART debug iomux after SDMMC boot failed to print log
- *    by console record mechanism.
- */
-static void serial_console_hide_prop(char **p1, char **p2)
-{
-	struct udevice *dev;
-
-	if (!of_live_active())
-		return;
-
-	for (uclass_find_first_device(UCLASS_SERIAL, &dev);
-	     dev;
-	     uclass_find_next_device(&dev)) {
-		if (dev_read_bool(dev, "u-boot,dm-pre-reloc") ||
-		    dev_read_bool(dev, "u-boot,dm-spl"))
-			continue;
-
-		if (gd->cur_serial_dev->req_seq == dev->req_seq) {
-			*p1 = (char *)dev_hide_prop(dev, "pinctrl-names");
-			*p2 = (char *)dev_hide_prop(dev, "pinctrl-0");
-		}
-	}
-}
 
-static void serial_console_present_prop(char *p1, char *p2)
-{
-	struct udevice *dev;
-
-	if (!of_live_active() || !p1 || !p2)
-		return;
-
-	for (uclass_find_first_device(UCLASS_SERIAL, &dev);
-	     dev;
-	     uclass_find_next_device(&dev)) {
-		if (dev_read_bool(dev, "u-boot,dm-pre-reloc") ||
-		    dev_read_bool(dev, "u-boot,dm-spl"))
-			continue;
-
-		if (gd->cur_serial_dev->req_seq == dev->req_seq) {
-			dev_present_prop(dev, p1);
-			dev_present_prop(dev, p2);
-		}
-	}
-}
-#else
-static inline void serial_console_hide_prop(char **p1, char **p2) {}
-static inline void serial_console_present_prop(char *p1, char *p2) {}
-#endif
-
-#ifndef CONFIG_DEBUG_UART_ALWAYS_MODE
 static void serial_find_console_or_panic(void)
 {
 	const void *blob = gd->fdt_blob;
 	struct udevice *dev;
-	char *p1 = NULL, *p2 = NULL;
 
 	if (CONFIG_IS_ENABLED(OF_PLATDATA)) {
 		uclass_first_device(UCLASS_SERIAL, &dev);
@@ -166,27 +86,11 @@ static void serial_find_console_or_panic(void)
 		if (of_live_active()) {
 			struct device_node *np = of_get_stdout();
 
-			serial_console_hide_prop(&p1, &p2);
 			if (np && !uclass_get_device_by_ofnode(UCLASS_SERIAL,
 					np_to_ofnode(np), &dev)) {
-				serial_console_present_prop(p1, p2);
 				gd->cur_serial_dev = dev;
 				return;
 			}
-
-			/*
-			 * If the console is not marked to be bound, bind it
-			 * anyway.
-			 */
-			if (!lists_bind_fdt(gd->dm_root, np_to_ofnode(np),
-					    &dev)) {
-				serial_console_hide_prop(&p1, &p2);
-				if (!device_probe(dev)) {
-					serial_console_present_prop(p1, p2);
-					gd->cur_serial_dev = dev;
-					return;
-				}
-			}
 		} else {
 			if (!serial_check_stdout(blob, &dev)) {
 				gd->cur_serial_dev = dev;
@@ -230,9 +134,6 @@ int serial_init(void)
 
 	return 0;
 }
-#else
-int serial_init(void) { return 0; }
-#endif
 
 /* Called after relocation */
 void serial_initialize(void)
@@ -283,14 +184,6 @@ static int __serial_tstc(struct udevice *dev)
 	return 1;
 }
 
-static void __serial_clear(struct udevice *dev)
-{
-	struct dm_serial_ops *ops = serial_get_ops(dev);
-
-	if (ops->clear)
-		ops->clear(dev);
-}
-
 #if CONFIG_IS_ENABLED(SERIAL_RX_BUFFER)
 static int _serial_tstc(struct udevice *dev)
 {
@@ -369,66 +262,6 @@ void serial_setbrg(void)
 		ops->setbrg(gd->cur_serial_dev, gd->baudrate);
 }
 
-void serial_clear(void)
-{
-	if (!gd->cur_serial_dev)
-		return;
-
-	__serial_clear(gd->cur_serial_dev);
-}
-
-void serial_dev_putc(struct udevice *dev, char ch)
-{
-	if (!dev)
-		return;
-
-	_serial_putc(dev, ch);
-}
-
-void serial_dev_puts(struct udevice *dev, const char *str)
-{
-	if (!dev)
-		return;
-
-	_serial_puts(dev, str);
-}
-
-int serial_dev_getc(struct udevice *dev)
-{
-	if (!dev)
-		return 0;
-
-	return _serial_getc(dev);
-}
-
-int serial_dev_tstc(struct udevice *dev)
-{
-	if (!dev)
-		return 0;
-
-	return _serial_tstc(dev);
-}
-
-void serial_dev_setbrg(struct udevice *dev, int baudrate)
-{
-	struct dm_serial_ops *ops;
-
-	if (!dev)
-		return;
-
-	ops = serial_get_ops(dev);
-	if (ops->setbrg)
-		ops->setbrg(dev, baudrate);
-}
-
-void serial_dev_clear(struct udevice *dev)
-{
-	if (!dev)
-		return;
-
-	__serial_clear(dev);
-}
-
 void serial_stdio_init(void)
 {
 }

commit e6b325265d3c8b7c005b63da7e6e6d6c05da6898
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 2 18:30:00 2020 +0800

    rockchip: dts: rk3568: update configure
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I48744f026ec967ab1053cb14041bade833121028

diff --git a/arch/arm/dts/rk3568-u-boot.dtsi b/arch/arm/dts/rk3568-u-boot.dtsi
index 4639f27cea..d0192a910c 100644
--- a/arch/arm/dts/rk3568-u-boot.dtsi
+++ b/arch/arm/dts/rk3568-u-boot.dtsi
@@ -13,12 +13,13 @@
 
 	chosen {
 		stdout-path = &uart2;
+		u-boot,spl-boot-order = &sdhci;
 	};
 };
 
 &uart2 {
 	clock-frequency = <24000000>;
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 	status = "okay";
 };
 
@@ -156,17 +157,17 @@
 };
 
 &sdmmc0 {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 	status = "okay";
 };
 
 &sdmmc1 {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 	status = "okay";
 };
 
 &sdhci {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 	status = "okay";
 };
 

commit 5033f049cb7d6edb2ae1ea1c782bca216b203aec
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 2 18:28:00 2020 +0800

    rockchip: rk3568: add irq definitions
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I13b662eff5a86b8fe021612130e50b9c3e783105

diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h
index bf5dcdcbf4..1a8226cd4c 100644
--- a/include/configs/rk3568_common.h
+++ b/include/configs/rk3568_common.h
@@ -27,6 +27,7 @@
 
 #define GICD_BASE			0xfd400000
 #define GICR_BASE			0xfd460000
+#define GICC_BASE			0xfd800000
 
 /* MMC/SD IP block */
 #define CONFIG_BOUNCE_BUFFER
@@ -44,7 +45,7 @@
 #define ENV_MEM_LAYOUT_SETTINGS \
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
-	"fdt_addr_r=0x01f00000\0" \
+	"fdt_addr_r=0x0a100000\0" \
 	"kernel_addr_no_bl32_r=0x00280000\0" \
 	"kernel_addr_r=0x00680000\0" \
 	"kernel_addr_c=0x04080000\0" \
@@ -58,6 +59,11 @@
 	ROCKCHIP_DEVICE_SETTINGS \
 	RKIMG_DET_BOOTDEV \
 	BOOTENV
+
+#undef RKIMG_BOOTCOMMAND
+#define RKIMG_BOOTCOMMAND		\
+	"boot_fit;"			\
+	"boot_android ${devtype} ${devnum};"
 #endif
 
 /* rockchip ohci host driver */
diff --git a/include/irq-platform.h b/include/irq-platform.h
index 288a964e01..a460dbbd52 100644
--- a/include/irq-platform.h
+++ b/include/irq-platform.h
@@ -220,6 +220,26 @@
 #define IRQ_GPIO3			69
 #define IRQ_GPIO4			70
 
+#elif defined(CONFIG_ROCKCHIP_RK3568)
+#define GPIO0_PHYS			0xfdd60000
+#define GPIO1_PHYS			0xfe740000
+#define GPIO2_PHYS			0xfe750000
+#define GPIO3_PHYS			0xfe760000
+#define GPIO4_PHYS			0xfe770000
+
+#define GIC_IRQS_NR			(5 * 32)
+#define GPIO_IRQS_NR			(5 * 32)
+
+#define GPIO_BANK_NUM			5
+#define GPIO_BANK_PINS			32
+
+#define IRQ_TIMER0			141
+#define IRQ_GPIO0			65
+#define IRQ_GPIO1			66
+#define IRQ_GPIO2			67
+#define IRQ_GPIO3			68
+#define IRQ_GPIO4			69
+
 #else
 "Missing define RIQ relative things"
 #endif
diff --git a/include/rk_timer_irq.h b/include/rk_timer_irq.h
index 93d7450f6f..5a17eedf68 100644
--- a/include/rk_timer_irq.h
+++ b/include/rk_timer_irq.h
@@ -63,6 +63,10 @@
 #elif defined(CONFIG_ROCKCHIP_RV1126)
 #define TIMER_BASE		(0xFF660000 + 0x20)	/* TIMER 1 */
 #define TIMER_IRQ		IRQ_TIMER1
+#elif defined(CONFIG_ROCKCHIP_RK3568)
+/* Only timer0 can wakeup system suspend */
+#define TIMER_BASE		(0xFE5F0000 + 0x00)	/* TIMER 1 */
+#define TIMER_IRQ		IRQ_TIMER0
 #else
 "Missing definitions of timer module test"
 #endif

commit 9e8632b7221524b7e7d5cc9828ecae0b2abef41b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 2 18:19:14 2020 +0800

    rockchip: rk3568: select board late init
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I439694cd01c0d2c8fef8e84b0321dd1cbdd0150c

diff --git a/arch/arm/mach-rockchip/rk3568/Kconfig b/arch/arm/mach-rockchip/rk3568/Kconfig
index e65c6032a4..7027e74aec 100644
--- a/arch/arm/mach-rockchip/rk3568/Kconfig
+++ b/arch/arm/mach-rockchip/rk3568/Kconfig
@@ -2,6 +2,7 @@ if ROCKCHIP_RK3568
 
 config TARGET_EVB_RK3568
 	bool "EVB_RK3568"
+	select BOARD_LATE_INIT
 	help
 	  RK3568 EVB is a evaluation board for Rockchp RK3568.
 

commit 858bd926c5b58bbf80e0ccce5ffda29bdf3978b8
Author: Ren Jianing <jianing.ren@rock-chips.com>
Date:   Sat Oct 31 22:07:23 2020 +0800

    configs: rk3568: add USB support
    
    Signed-off-by: Ren Jianing <jianing.ren@rock-chips.com>
    Change-Id: Id49e056ad30c4cef2eea22a7eb4ea4992318b9c4

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
index c1d2ff7dee..d0d6bb886f 100644
--- a/configs/rk3568_defconfig
+++ b/configs/rk3568_defconfig
@@ -33,6 +33,10 @@ CONFIG_SPL_CRYPTO_SUPPORT=y
 CONFIG_SPL_HASH_SUPPORT=y
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_FASTBOOT_BUF_ADDR=0x800800
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set
 CONFIG_CMD_DTIMG=y
@@ -50,6 +54,8 @@ CONFIG_CMD_GPT=y
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_MISC is not set
@@ -79,6 +85,7 @@ CONFIG_MMC_SDHCI_ROCKCHIP=y
 CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_PHYLIB=y
 CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
@@ -96,6 +103,22 @@ CONFIG_DEBUG_UART_BASE=0xFE660000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x350a
+CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_I2C_EDID=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_LIB_RAND=y
diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h
index 72dd354ccc..bf5dcdcbf4 100644
--- a/include/configs/rk3568_common.h
+++ b/include/configs/rk3568_common.h
@@ -60,4 +60,8 @@
 	BOOTENV
 #endif
 
+/* rockchip ohci host driver */
+#define CONFIG_USB_OHCI_NEW
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	1
+
 #endif

commit ff0e8415ac9efacd9a3f526e8e887c879a483441
Author: Ren Jianing <jianing.ren@rock-chips.com>
Date:   Sat Oct 31 22:10:08 2020 +0800

    rockchip: rk3568: add <asm/io.h> head file include
    
    Signed-off-by: Ren Jianing <jianing.ren@rock-chips.com>
    Change-Id: Iadb23cf053e21983d89361e0fb81f16ca7bb129c

diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c
index 17b4760a15..25c83100b5 100644
--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
@@ -5,6 +5,7 @@
  */
 #include <common.h>
 #include <asm/armv8/mmu.h>
+#include <asm/io.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/grf_rk3568.h>
 

commit 782f7efb2c4e6292e8600e55f067e647a42650eb
Author: Ren Jianing <jianing.ren@rock-chips.com>
Date:   Sat Oct 31 22:01:35 2020 +0800

    rockchip: dts: rk3568: add usb support
    
    Signed-off-by: Ren Jianing <jianing.ren@rock-chips.com>
    Change-Id: I4acec12353ba525873ba6771ced9e83305ef4874

diff --git a/arch/arm/dts/rk3568-u-boot.dtsi b/arch/arm/dts/rk3568-u-boot.dtsi
index 27bcc9514c..4639f27cea 100644
--- a/arch/arm/dts/rk3568-u-boot.dtsi
+++ b/arch/arm/dts/rk3568-u-boot.dtsi
@@ -32,6 +32,86 @@
 	status = "okay";
 };
 
+&usb2phy0_grf {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&usb2phy1_grf {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&usbdrd30 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&usbdrd_dwc3 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&usbhost30 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&usbhost_dwc3 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&usb_host0_ehci {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&usb_host0_ohci {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&usb_host1_ehci {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&usb_host1_ohci {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&usb2phy0 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&u2phy0_otg {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&u2phy0_host {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&usb2phy1 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&u2phy1_otg {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&u2phy1_host {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 &cru {
 	u-boot,dm-pre-reloc;
 	status = "okay";

commit 19111912c0d5fb8eebcafce3850dcdc7bbac8cd6
Author: Ren Jianing <jianing.ren@rock-chips.com>
Date:   Sat Oct 31 21:53:30 2020 +0800

    rockchip: rk3568: add dwc3 board init
    
    Signed-off-by: Ren Jianing <jianing.ren@rock-chips.com>
    Change-Id: Ie1c642019fa5eb19c9698aaee01d0a27d50c3478

diff --git a/board/rockchip/evb_rk3568/evb_rk3568.c b/board/rockchip/evb_rk3568/evb_rk3568.c
index b1868b335e..781d848374 100644
--- a/board/rockchip/evb_rk3568/evb_rk3568.c
+++ b/board/rockchip/evb_rk3568/evb_rk3568.c
@@ -5,6 +5,29 @@
  */
 
 #include <common.h>
+#include <dwc3-uboot.h>
+#include <usb.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#ifdef CONFIG_USB_DWC3
+static struct dwc3_device dwc3_device_data = {
+	.maximum_speed = USB_SPEED_HIGH,
+	.base = 0xfcc00000,
+	.dr_mode = USB_DR_MODE_PERIPHERAL,
+	.index = 0,
+	.dis_u2_susphy_quirk = 1,
+	.usb2_phyif_utmi_width = 16,
+};
+
+int usb_gadget_handle_interrupts(void)
+{
+	dwc3_uboot_handle_interrupt(0);
+	return 0;
+}
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+	return dwc3_uboot_init(&dwc3_device_data);
+}
+#endif

commit 424749024a659dec0eef4644375335633b0bf406
Author: Ren Jianing <jianing.ren@rock-chips.com>
Date:   Tue Oct 27 10:05:01 2020 +0800

    rockchip: dts: rk3568: add usb2 phy nodes
    
    Signed-off-by: Ren Jianing <jianing.ren@rock-chips.com>
    Change-Id: Ib0815580ed2a851598800ac5ef235b313143c00f

diff --git a/arch/arm/dts/rk3568.dtsi b/arch/arm/dts/rk3568.dtsi
index 52eb87bea0..a462fdf9b1 100644
--- a/arch/arm/dts/rk3568.dtsi
+++ b/arch/arm/dts/rk3568.dtsi
@@ -120,6 +120,8 @@
 			reg = <0x0 0xfcc00000 0x0 0x400000>;
 			interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
 			dr_mode = "otg";
+			phys = <&u2phy0_otg>;
+			phy-names = "usb2-phy";
 			phy_type = "utmi_wide";
 			power-domains = <&power RK3568_PD_PIPE>;
 			resets = <&cru SRST_USB3OTG0>;
@@ -150,6 +152,8 @@
 			reg = <0x0 0xfd000000 0x0 0x400000>;
 			interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
 			dr_mode = "host";
+			phys = <&u2phy0_host>;
+			phy-names = "usb2-phy";
 			phy_type = "utmi_wide";
 			power-domains = <&power RK3568_PD_PIPE>;
 			resets = <&cru SRST_USB3OTG1>;
@@ -188,6 +192,8 @@
 		interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru HCLK_USB2HOST0>, <&cru HCLK_USB2HOST0_ARB>;
 		clock-names = "usbhost", "arbiter";
+		phys = <&u2phy1_otg>;
+		phy-names = "usb";
 		status = "disabled";
 	};
 
@@ -197,6 +203,8 @@
 		interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru HCLK_USB2HOST0>, <&cru HCLK_USB2HOST0_ARB>;
 		clock-names = "usbhost", "arbiter";
+		phys = <&u2phy1_otg>;
+		phy-names = "usb";
 		status = "disabled";
 	};
 
@@ -206,6 +214,8 @@
 		interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru HCLK_USB2HOST1>, <&cru HCLK_USB2HOST1_ARB>;
 		clock-names = "usbhost", "arbiter";
+		phys = <&u2phy1_host>;
+		phy-names = "usb";
 		status = "disabled";
 	};
 
@@ -215,6 +225,8 @@
 		interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru HCLK_USB2HOST1>, <&cru HCLK_USB2HOST1_ARB>;
 		clock-names = "usbhost", "arbiter";
+		phys = <&u2phy1_host>;
+		phy-names = "usb";
 		status = "disabled";
 	};
 
@@ -258,6 +270,16 @@
 		reg = <0x0 0xfdc90000 0x0 0x1000>;
 	};
 
+	usb2phy0_grf: syscon@fdca0000 {
+		compatible = "rockchip,rk3568-usb2phy-grf", "syscon";
+		reg = <0x0 0xfdca0000 0x0 0x8000>;
+	};
+
+	usb2phy1_grf: syscon@fdca8000 {
+		compatible = "rockchip,rk3568-usb2phy-grf", "syscon";
+		reg = <0x0 0xfdca8000 0x0 0x8000>;
+	};
+
 	pmucru: clock-controller@fdd00000 {
 		compatible = "rockchip,rk3568-pmucru";
 		reg = <0x0 0xfdd00000 0x0 0x1000>;
@@ -1328,6 +1350,48 @@
 		status = "disabled";
 	};
 
+	usb2phy0: usb2-phy@fe8a0000 {
+		compatible = "rockchip,rk3568-usb2phy";
+		reg = <0x0 0xfe8a0000 0x0 0x10000>;
+		interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&pmucru CLK_USBPHY0_REF>;
+		clock-names = "phyclk";
+		#clock-cells = <0>;
+		clock-output-names = "usb480m_phy";
+		rockchip,usbgrf = <&usb2phy0_grf>;
+		status = "disabled";
+
+		u2phy0_host: host-port {
+		#phy-cells = <0>;
+		status = "disabled";
+		};
+
+		u2phy0_otg: otg-port {
+		#phy-cells = <0>;
+		status = "disabled";
+		};
+	};
+
+	usb2phy1: usb2-phy@fe8b0000 {
+		compatible = "rockchip,rk3568-usb2phy";
+		reg = <0x0 0xfe8b0000 0x0 0x10000>;
+		interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&pmucru CLK_USBPHY1_REF>;
+		clock-names = "phyclk";
+		rockchip,usbgrf = <&usb2phy1_grf>;
+		status = "disabled";
+
+		u2phy1_host: host-port {
+			#phy-cells = <0>;
+			status = "disabled";
+		};
+
+		u2phy1_otg: otg-port {
+			#phy-cells = <0>;
+			status = "disabled";
+		};
+	};
+
 	pinctrl: pinctrl {
 		compatible = "rockchip,rk3568-pinctrl";
 		rockchip,grf = <&grf>;

commit 912fa0754af86df2eb92aa34deb06c047958374e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Oct 25 10:05:26 2020 +0800

    common: board_f.c: add fpga init call
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I5fb507094207b14ad64cf3dee646aaac177bf43d

diff --git a/common/board_f.c b/common/board_f.c
index c88691439b..c4806872c1 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -250,6 +250,11 @@ static int setup_mon_len(void)
 	return 0;
 }
 
+__weak int arch_fpga_init(void)
+{
+	return 0;
+}
+
 __weak int arch_cpu_init(void)
 {
 	return 0;
@@ -808,6 +813,7 @@ static const init_fnc_t init_sequence_f[] = {
 #if defined(CONFIG_HAVE_FSP)
 	arch_fsp_init,
 #endif
+	arch_fpga_init,
 	arch_cpu_init,		/* basic arch cpu dependent setup */
 	mach_cpu_init,		/* SoC/machine dependent CPU setup */
 	initf_dm,
diff --git a/include/common.h b/include/common.h
index b6b8c374fe..9e6e194b8f 100644
--- a/include/common.h
+++ b/include/common.h
@@ -523,6 +523,8 @@ int	is_core_valid (unsigned int);
  */
 int arch_cpu_init(void);
 
+int arch_fpga_init(void);
+
 void s_init(void);
 
 int	checkcpu      (void);

commit ae7a3dc0b2dd26fb6fd3e6c047ad8e81c3d7d677
Author: Mark Huang <huangjc@rock-chips.com>
Date:   Fri Oct 30 17:03:46 2020 +0800

    configs: rv1126-ab.config: save image size for ab
    
    Change-Id: I238597cddc0ee24f5526381de0935b08038bc686
    Signed-off-by: Mark Huang <huangjc@rock-chips.com>

diff --git a/configs/rv1126-ab.config b/configs/rv1126-ab.config
index 64270d4f4d..e23ccf00b7 100644
--- a/configs/rv1126-ab.config
+++ b/configs/rv1126-ab.config
@@ -9,3 +9,4 @@ CONFIG_BOOTDELAY=1
 # CONFIG_CMD_ANDROID_AB_SELECT is not set
 CONFIG_RK_AVB_LIBAVB_USER=y
 # CONFIG_ROCKCHIP_PRELOADER_PUB_KEY is not set
+CONFIG_SPL_FIT_IMAGE_KB=1088

commit d0b42c4f6e2fa606d8e989d31ab5305deb02cf40
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Oct 30 16:42:24 2020 +0800

    configs: rv1126: enable hash verify for android image
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I4d61653b1d89ff027e8d4b0809981f2bf1a6134c

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index b2781a6272..0dfda59706 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -34,6 +34,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y
 CONFIG_ANDROID_BOOTLOADER=y
 # CONFIG_ANDROID_WRITE_KEYBOX is not set
 # CONFIG_ANDROID_KEYMASTER_CA is not set
+CONFIG_ANDROID_BOOT_IMAGE_HASH=y
 CONFIG_SPL_BOARD_INIT=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set

commit cc0848dfb95a707f16e72bd34a3acb7329dcf4d9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Oct 30 16:23:01 2020 +0800

    common: android: simplify image verify/un-verify
    
    Support hash verify if header version < 3.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I2ade1a50aa26cd94c4464c25c86836421d973f00

diff --git a/common/image-android.c b/common/image-android.c
index e5ba457f49..d141964672 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -477,6 +477,29 @@ crypto_calc:
 	return 0;
 }
 
+static int images_load_verify(struct andr_img_hdr *hdr, ulong part_start,
+			      void *ram_base, struct udevice *crypto)
+{
+	/* load, never change order ! */
+	if (image_load(IMG_KERNEL, hdr, part_start, ram_base, crypto))
+		return -1;
+	if (image_load(IMG_RAMDISK, hdr, part_start, ram_base, crypto))
+		return -1;
+	if (image_load(IMG_SECOND, hdr, part_start, ram_base, crypto))
+		return -1;
+	if (hdr->header_version > 0) {
+		if (image_load(IMG_RECOVERY_DTBO, hdr, part_start,
+			       ram_base, crypto))
+			return -1;
+	}
+	if (hdr->header_version > 1) {
+		if (image_load(IMG_DTB, hdr, part_start, ram_base, crypto))
+			return -1;
+	}
+
+	return 0;
+}
+
 /*
  * @ram_base: !NULL means require memcpy for an exist full android image.
  */
@@ -486,6 +509,7 @@ static int android_image_separate(struct andr_img_hdr *hdr,
 				  void *ram_base)
 {
 	ulong bstart;
+	int ret;
 
 	if (android_image_check_header(hdr)) {
 		printf("Bad android image header\n");
@@ -500,76 +524,55 @@ static int android_image_separate(struct andr_img_hdr *hdr,
 	 * 1. Load images to their individual target ram position
 	 *    in order to disable fdt/ramdisk relocation.
 	 */
-#if defined(CONFIG_DM_CRYPTO) && defined(CONFIG_ANDROID_BOOT_IMAGE_HASH)
-	struct udevice *dev;
-	sha_context ctx;
-	uchar hash[20];
-
-	ctx.length = 0;
-	ctx.algo = CRYPTO_SHA1;
-	dev = crypto_get_device(ctx.algo);
-	if (!dev) {
-		printf("Can't find crypto device for SHA1 capability\n");
-		return -ENODEV;
-	}
 
-	/* v1 & v2: requires total length before sha init */
-	ctx.length += hdr->kernel_size + sizeof(hdr->kernel_size) +
-		      hdr->ramdisk_size + sizeof(hdr->ramdisk_size) +
-		      hdr->second_size + sizeof(hdr->second_size);
-	if (hdr->header_version > 0)
-		ctx.length += hdr->recovery_dtbo_size +
-					sizeof(hdr->recovery_dtbo_size);
-	if (hdr->header_version > 1)
-		ctx.length += hdr->dtb_size + sizeof(hdr->dtb_size);
-
-	/* load, never change order ! */
-	if (image_load(IMG_RK_DTB,  hdr, bstart, ram_base, NULL))
+	/* load rk-kernel.dtb alone */
+	if (image_load(IMG_RK_DTB, hdr, bstart, ram_base, NULL))
 		return -1;
 
-	crypto_sha_init(dev, &ctx);
-	if (image_load(IMG_KERNEL,  hdr, bstart, ram_base, dev))
-		return -1;
-	if (image_load(IMG_RAMDISK, hdr, bstart, ram_base, dev))
-		return -1;
-	if (image_load(IMG_SECOND,  hdr, bstart, ram_base, dev))
-		return -1;
-	if (hdr->header_version > 0) {
-		if (image_load(IMG_RECOVERY_DTBO, hdr, bstart, ram_base, dev))
-			return -1;
-	}
-	if (hdr->header_version > 1) {
-		if (image_load(IMG_DTB, hdr, bstart, ram_base, dev))
-			return -1;
-	}
-
-	crypto_sha_final(dev, &ctx, hash);
-	if (memcmp(hash, hdr->id, 20)) {
-		print_hash("Hash from header", (u8 *)hdr->id, 20);
-		print_hash("Hash real", (u8 *)hash, 20);
-		return -EBADFD;
-	} else {
-		printf("Image hash OK\n");
-	}
+#if defined(CONFIG_DM_CRYPTO) && defined(CONFIG_ANDROID_BOOT_IMAGE_HASH)
+	if (hdr->header_version < 3) {
+		struct udevice *dev;
+		sha_context ctx;
+		uchar hash[20];
+
+		ctx.length = 0;
+		ctx.algo = CRYPTO_SHA1;
+		dev = crypto_get_device(ctx.algo);
+		if (!dev) {
+			printf("Can't find crypto device for SHA1\n");
+			return -ENODEV;
+		}
 
-#else /* !(CONFIG_DM_CRYPTO && CONFIG_ANDROID_BOOT_IMAGE_HASH) */
-	if (image_load(IMG_RK_DTB,  hdr, bstart, ram_base, NULL))
-		return -1;
-	if (image_load(IMG_KERNEL,  hdr, bstart, ram_base, NULL))
-		return -1;
-	if (image_load(IMG_RAMDISK, hdr, bstart, ram_base, NULL))
-		return -1;
-	if (image_load(IMG_SECOND,  hdr, bstart, ram_base, NULL))
-		return -1;
-	if (hdr->header_version > 0) {
-		if (image_load(IMG_RECOVERY_DTBO, hdr, bstart, ram_base, NULL))
-			return -1;
-	}
-	if (hdr->header_version > 1) {
-		if (image_load(IMG_DTB, hdr, bstart, ram_base, NULL))
-			return -1;
-	}
+		/* v1 & v2: requires total length before sha init */
+		ctx.length += hdr->kernel_size + sizeof(hdr->kernel_size) +
+			      hdr->ramdisk_size + sizeof(hdr->ramdisk_size) +
+			      hdr->second_size + sizeof(hdr->second_size);
+		if (hdr->header_version > 0)
+			ctx.length += hdr->recovery_dtbo_size +
+						sizeof(hdr->recovery_dtbo_size);
+		if (hdr->header_version > 1)
+			ctx.length += hdr->dtb_size + sizeof(hdr->dtb_size);
+
+		crypto_sha_init(dev, &ctx);
+		ret = images_load_verify(hdr, bstart, ram_base, dev);
+		if (ret)
+			return ret;
+		crypto_sha_final(dev, &ctx, hash);
+
+		if (memcmp(hash, hdr->id, 20)) {
+			print_hash("Hash from header", (u8 *)hdr->id, 20);
+			print_hash("Hash real", (u8 *)hash, 20);
+			return -EBADFD;
+		} else {
+			printf("ANDROID: Hash OK\n");
+		}
+	} else
 #endif
+	{
+		ret = images_load_verify(hdr, bstart, ram_base, NULL);
+		if (ret)
+			return ret;
+	}
 
 	/* 2. Disable fdt/ramdisk relocation, it saves boot time */
 	env_set("bootm-no-reloc", "y");

commit 507e69009b9ebeeca417886b75b9b1e87541ebb3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Oct 30 15:15:34 2020 +0800

    lib: rsa-verify: require np/c factor if using hardware decrypt
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I2c5a68e86a04f4c65719521ac9aac62297432beb

diff --git a/lib/rsa/rsa-verify.c b/lib/rsa/rsa-verify.c
index 61e48eee5f..8fb3726327 100644
--- a/lib/rsa/rsa-verify.c
+++ b/lib/rsa/rsa-verify.c
@@ -463,6 +463,8 @@ static int rsa_verify_with_keynode(struct image_sign_info *info,
 		return -EFAULT;
 	}
 
+#if !defined(USE_HOSTCC)
+#if CONFIG_IS_ENABLED(FIT_HW_CRYPTO)
 #ifdef CONFIG_ROCKCHIP_CRYPTO_V1
 	prop.factor_c = fdt_getprop(blob, node, "rsa,c", NULL);
 	if (!prop.factor_c)
@@ -471,6 +473,8 @@ static int rsa_verify_with_keynode(struct image_sign_info *info,
 	prop.factor_np = fdt_getprop(blob, node, "rsa,np", NULL);
 	if (!prop.factor_np)
 		return -EFAULT;
+#endif
+#endif
 #endif
 	ret = rsa_verify_key(info, &prop, sig, sig_len, hash,
 			     info->crypto->key_len);

commit d6babb00c3837380f5df8c5c6bc5403bb6302727
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Oct 30 16:13:08 2020 +0800

    scripts: fit: support "--boot_img_dir" args for boot.img
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I2b1648a673492cade1c0a3f499f46f1ff072251a

diff --git a/scripts/fit.sh b/scripts/fit.sh
index 6bbd078e74..f86a6bdb96 100755
--- a/scripts/fit.sh
+++ b/scripts/fit.sh
@@ -493,7 +493,7 @@ function fit_generate_uboot_boot()
 fit_process_args $*
 if [ ! -z "${ARG_VALIDATE}" ]; then
 	validate_arg ${ARG_VALIDATE}
-elif [ ! -z "${ARG_BOOT_IMG}" ]; then
+elif [ ! -z "${ARG_BOOT_IMG}" -o ! -z "${ARG_BOOT_IMG_DIR}" ]; then
 	fit_generate_uboot_boot
 else
 	fit_generate_uboot

commit 1040f70ad73d7bb1b71061e4a69bf28c88dd7371
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Fri Oct 23 15:47:46 2020 +0800

    rockchip: rv1126: tpl: add ddr3 16bit support
    
    This patch auto detect BW16 constitute by byte0 and byte2 or
    byte0 and byte3.
    
    Change-Id: I22a8fa70db1d996573004320196c0892d5380f64
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
index dc45bf9a67..b55ecfa69a 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -2445,9 +2445,24 @@ static int sdram_init_detect(struct dram_info *dram,
 	u32 ret;
 	u32 sys_reg = 0;
 	u32 sys_reg3 = 0;
+	struct sdram_head_info_index_v2 *index =
+		(struct sdram_head_info_index_v2 *)common_info;
+	struct dq_map_info *map_info;
 
-	if (sdram_init_(dram, sdram_params, 0) != 0)
-		return -1;
+	map_info = (struct dq_map_info *)((void *)common_info +
+		index->dq_map_index.offset * 4);
+
+	if (sdram_init_(dram, sdram_params, 0)) {
+		if (sdram_params->base.dramtype == DDR3) {
+			clrsetbits_le32(&map_info->byte_map[0], 0xff << 24,
+					((0x1 << 6) | (0x3 << 4) | (0x2 << 2) |
+					(0x0 << 0)) << 24);
+			if (sdram_init_(dram, sdram_params, 0))
+				return -1;
+		} else {
+			return -1;
+		}
+	}
 
 	if (sdram_params->base.dramtype == DDR3) {
 		writel(PATTERN, CONFIG_SYS_SDRAM_BASE);

commit 651b0d0dfc227963b3463eb0da4a9ce5a30e28a9
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Oct 30 14:59:31 2020 +0800

    common: android: move crypto_sha_init() after load IMG_RK_DTB
    
    We call crypto to verify dtb alone, so move the crypto_sha_init()
    after load IMG_RK_DTB when begin another hash verification.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I12f36172a5d03fa8baa0236503be5627fa18adf0

diff --git a/common/image-android.c b/common/image-android.c
index 6933abddfd..e5ba457f49 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -523,11 +523,11 @@ static int android_image_separate(struct andr_img_hdr *hdr,
 	if (hdr->header_version > 1)
 		ctx.length += hdr->dtb_size + sizeof(hdr->dtb_size);
 
-	crypto_sha_init(dev, &ctx);
-
 	/* load, never change order ! */
 	if (image_load(IMG_RK_DTB,  hdr, bstart, ram_base, NULL))
 		return -1;
+
+	crypto_sha_init(dev, &ctx);
 	if (image_load(IMG_KERNEL,  hdr, bstart, ram_base, dev))
 		return -1;
 	if (image_load(IMG_RAMDISK, hdr, bstart, ram_base, dev))

commit 1817f8c289ab31577a1ba7762a27ac275f96c110
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Fri Oct 30 09:58:59 2020 +0800

    common: android: crypto v2 hash need length in crypto_sha_init
    
    if not set ctx.length, you will get zero length hash value.
    
    Change-Id: I9e653c845a36b4caea986c328c48ea8b2835da75
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/common/image-android.c b/common/image-android.c
index 88674ae1d6..6933abddfd 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -513,8 +513,7 @@ static int android_image_separate(struct andr_img_hdr *hdr,
 		return -ENODEV;
 	}
 
-  #ifdef CONFIG_ROCKCHIP_CRYPTO_V1
-	/* v1: requires total length before sha init */
+	/* v1 & v2: requires total length before sha init */
 	ctx.length += hdr->kernel_size + sizeof(hdr->kernel_size) +
 		      hdr->ramdisk_size + sizeof(hdr->ramdisk_size) +
 		      hdr->second_size + sizeof(hdr->second_size);
@@ -523,7 +522,7 @@ static int android_image_separate(struct andr_img_hdr *hdr,
 					sizeof(hdr->recovery_dtbo_size);
 	if (hdr->header_version > 1)
 		ctx.length += hdr->dtb_size + sizeof(hdr->dtb_size);
-  #endif
+
 	crypto_sha_init(dev, &ctx);
 
 	/* load, never change order ! */

commit c48f1acf4af0aac8c7c1c105713595498d466684
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Mon Aug 17 16:42:34 2020 +0800

    crypto: rockchip: modify crypto hash cache support for crypto v1&v2
    
    Change-Id: I6e0604bf02908269ab021714378b66ed712fdc06
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/drivers/crypto/rockchip/Makefile b/drivers/crypto/rockchip/Makefile
index d47e68a84f..761d0862eb 100644
--- a/drivers/crypto/rockchip/Makefile
+++ b/drivers/crypto/rockchip/Makefile
@@ -4,9 +4,9 @@
 #  Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
 #
 
-obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_CRYPTO_V1) += crypto_v1.o
-obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_CRYPTO_V2) += crypto_v2.o
+obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_CRYPTO_V1) += crypto_v1.o crypto_hash_cache.o
+obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_CRYPTO_V2) += crypto_v2.o crypto_hash_cache.o
 
 ifeq ($(CONFIG_$(SPL_TPL_)ROCKCHIP_CRYPTO_V2)$(CONFIG_$(SPL_TPL_)ROCKCHIP_RSA), yy)
 obj-y += crypto_v2_pka.o crypto_v2_util.o
-endif
\ No newline at end of file
+endif
diff --git a/drivers/crypto/rockchip/crypto_hash_cache.c b/drivers/crypto/rockchip/crypto_hash_cache.c
new file mode 100644
index 0000000000..409038ead5
--- /dev/null
+++ b/drivers/crypto/rockchip/crypto_hash_cache.c
@@ -0,0 +1,193 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2020 Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <crypto.h>
+
+#include <rockchip/crypto_hash_cache.h>
+
+static int hash_cache_calc(struct crypto_hash_cache *hash_cache, const u8 *data,
+			   u32 data_len, u8 is_last)
+{
+	crypto_hash_calc direct_calc = hash_cache->direct_calc;
+	int ret = 0;
+
+	if (!hash_cache->cache) {
+		hash_cache->cache = (u8 *)memalign(CONFIG_SYS_CACHELINE_SIZE,
+						   HASH_CACHE_SIZE);
+		if (!hash_cache->cache)
+			goto error;
+
+		hash_cache->cache_size = 0;
+	}
+
+	while (1) {
+		u32 tmp_len = 0;
+
+		if (hash_cache->cache_size + data_len <= HASH_CACHE_SIZE) {
+			/* copy to cache */
+			debug("%s, %d: copy to cache %u\n",
+			      __func__, __LINE__, data_len);
+			memcpy(hash_cache->cache + hash_cache->cache_size, data,
+			       data_len);
+			hash_cache->cache_size += data_len;
+
+			/* if last one calc cache immediately */
+			if (is_last) {
+				debug("%s, %d: last one calc cache %u\n",
+				      __func__, __LINE__,
+				      hash_cache->cache_size);
+
+				ret = direct_calc(hash_cache->user_data,
+						  hash_cache->cache,
+						  hash_cache->cache_size,
+						  &hash_cache->is_started,
+						  is_last);
+				if (ret)
+					goto error;
+			}
+			break;
+		}
+
+		/* 1. make cache be full */
+		/* 2. calc cache */
+		tmp_len = HASH_CACHE_SIZE - hash_cache->cache_size;
+		debug("%s, %d: make cache be full %u\n",
+		      __func__, __LINE__, tmp_len);
+		memcpy(hash_cache->cache + hash_cache->cache_size,
+		       data, tmp_len);
+
+		ret = direct_calc(hash_cache->user_data, hash_cache->cache,
+				  HASH_CACHE_SIZE, &hash_cache->is_started, 0);
+		if (ret)
+			goto error;
+
+		data += tmp_len;
+		data_len -= tmp_len;
+		hash_cache->cache_size = 0;
+	}
+
+	return ret;
+error:
+	return -EINVAL;
+}
+
+void crypto_flush_cacheline(ulong addr, ulong size)
+{
+	ulong alignment = CONFIG_SYS_CACHELINE_SIZE;
+	ulong aligned_input, aligned_len;
+
+	/* Must flush dcache before crypto DMA fetch data region */
+	aligned_input = round_down(addr, alignment);
+	aligned_len = round_up(size + (addr - aligned_input), alignment);
+	flush_cache(aligned_input, aligned_len);
+}
+
+struct crypto_hash_cache *crypto_hash_cache_alloc(crypto_hash_calc direct_calc,
+						  void *user_data, u32 total,
+						  u32 data_align, u32 len_align)
+{
+	struct crypto_hash_cache *hash_cache = NULL;
+
+	if (!direct_calc)
+		return NULL;
+
+	hash_cache = malloc(sizeof(struct crypto_hash_cache));
+	if (!hash_cache)
+		return NULL;
+
+	memset(hash_cache, 0x00, sizeof(*hash_cache));
+
+	hash_cache->direct_calc = direct_calc;
+	hash_cache->user_data   = user_data;
+	hash_cache->data_align  = data_align;
+	hash_cache->len_align   = len_align;
+	hash_cache->left_len	= total;
+
+	return hash_cache;
+}
+
+void crypto_hash_cache_free(struct crypto_hash_cache *hash_cache)
+{
+	if (!hash_cache)
+		return;
+
+	if (hash_cache->cache)
+		free(hash_cache->cache);
+
+	free(hash_cache);
+}
+
+int crypto_hash_update_with_cache(struct crypto_hash_cache *hash_cache,
+				  const u8 *data, u32 data_len)
+{
+	crypto_hash_calc direct_calc = hash_cache->direct_calc;
+	const u8 *direct_data = NULL, *cache_data = NULL;
+	u32 direct_data_len = 0, cache_data_len = 0;
+	u8 is_last = 0;
+	int ret = 0;
+
+	if (hash_cache->left_len < data_len)
+		goto error;
+
+	is_last = hash_cache->left_len == data_len ? 1 : 0;
+
+	if (!hash_cache->use_cache &&
+	    IS_ALIGNED((ulong)data, hash_cache->data_align)) {
+		direct_data = data;
+		if (IS_ALIGNED(data_len, hash_cache->len_align) || is_last) {
+			/* calc all directly */
+			debug("%s, %d: calc all directly\n",
+			      __func__, __LINE__);
+			direct_data_len = data_len;
+		} else {
+			/* calc some directly calc some in cache */
+			debug("%s, %d: calc some directly calc some in cache\n",
+			      __func__, __LINE__);
+			direct_data_len = round_down((ulong)data_len,
+						     hash_cache->len_align);
+			cache_data = direct_data + direct_data_len;
+			cache_data_len = data_len % hash_cache->len_align;
+			hash_cache->use_cache = 1;
+		}
+	} else {
+		/* calc all in cache */
+		debug("%s, %d: calc all in cache\n", __func__, __LINE__);
+		cache_data = data;
+		cache_data_len = data_len;
+		hash_cache->use_cache = 1;
+	}
+
+	if (direct_data_len) {
+		debug("%s, %d: calc direct data %u\n",
+		      __func__, __LINE__, direct_data_len);
+		ret = direct_calc(hash_cache->user_data,
+				  direct_data, direct_data_len,
+				  &hash_cache->is_started, is_last);
+		if (ret)
+			goto error;
+		hash_cache->left_len -= direct_data_len;
+	}
+
+	if (cache_data_len) {
+		debug("%s, %d: calc cache data %u\n",
+		      __func__, __LINE__, cache_data_len);
+		ret = hash_cache_calc(hash_cache, cache_data,
+				      cache_data_len, is_last);
+		if (ret)
+			goto error;
+		hash_cache->left_len -= cache_data_len;
+	}
+
+	return 0;
+error:
+	if (hash_cache->cache) {
+		free(hash_cache->cache);
+		hash_cache->cache = NULL;
+	}
+
+	return -EINVAL;
+}
diff --git a/drivers/crypto/rockchip/crypto_v1.c b/drivers/crypto/rockchip/crypto_v1.c
index 8a94299d2a..4ac2a26a16 100644
--- a/drivers/crypto/rockchip/crypto_v1.c
+++ b/drivers/crypto/rockchip/crypto_v1.c
@@ -7,14 +7,23 @@
 #include <clk.h>
 #include <crypto.h>
 #include <dm.h>
+#include <rockchip/crypto_hash_cache.h>
 #include <rockchip/crypto_v1.h>
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/clock.h>
 
 #define CRYPTO_V1_DEFAULT_RATE		100000000
+/* crypto timeout 500ms, must support more than 32M data per times*/
+#define HASH_UPDATE_LIMIT	(32 * 1024 * 1024)
+#define RK_CRYPTO_TIME_OUT	500000
+
+#define LLI_ADDR_ALIGIN_SIZE	8
+#define DATA_ADDR_ALIGIN_SIZE	8
+#define DATA_LEN_ALIGIN_SIZE	64
 
 struct rockchip_crypto_priv {
+	struct crypto_hash_cache	*hash_cache;
 	struct rk_crypto_reg *reg;
 	struct clk clk;
 	sha_context *ctx;
@@ -34,6 +43,36 @@ static u32 rockchip_crypto_capability(struct udevice *dev)
 	       CRYPTO_RSA2048;
 }
 
+static int rk_hash_direct_calc(void *hw_data, const u8 *data,
+			       u32 data_len, u8 *started_flag, u8 is_last)
+{
+	struct rockchip_crypto_priv *priv = hw_data;
+	struct rk_crypto_reg *reg = priv->reg;
+
+	if (!data_len)
+		return -EINVAL;
+
+	/* Must flush dcache before crypto DMA fetch data region */
+	crypto_flush_cacheline((ulong)data, data_len);
+
+	/* Hash Done Interrupt */
+	writel(HASH_DONE_INT, &reg->crypto_intsts);
+
+	/* Set data base and length */
+	writel((u32)(ulong)data, &reg->crypto_hrdmas);
+	writel((data_len + 3) >> 2, &reg->crypto_hrdmal);
+
+	/* Write 1 to start. When finishes, the core will clear it */
+	rk_setreg(&reg->crypto_ctrl, HASH_START);
+
+	/* Wait last complete */
+	do {} while (readl(&reg->crypto_ctrl) & HASH_START);
+
+	priv->length += data_len;
+
+	return 0;
+}
+
 static int rockchip_crypto_sha_init(struct udevice *dev, sha_context *ctx)
 {
 	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
@@ -48,6 +87,13 @@ static int rockchip_crypto_sha_init(struct udevice *dev, sha_context *ctx)
 		return -EINVAL;
 	}
 
+	priv->hash_cache = crypto_hash_cache_alloc(rk_hash_direct_calc,
+						   priv, ctx->length,
+						   DATA_ADDR_ALIGIN_SIZE,
+						   DATA_LEN_ALIGIN_SIZE);
+	if (!priv->hash_cache)
+		return -EFAULT;
+
 	priv->ctx = ctx;
 	priv->length = 0;
 	writel(ctx->length, &reg->crypto_hash_msg_len);
@@ -97,40 +143,32 @@ static int rockchip_crypto_sha_update(struct udevice *dev,
 				      u32 *input, u32 len)
 {
 	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
-	struct rk_crypto_reg *reg = priv->reg;
-	ulong aligned_input, aligned_len;
+	int ret = -EINVAL, i;
+	u8 *p;
 
-	if (!len)
-		return -EINVAL;
+	if (!input || !len)
+		goto exit;
 
-	priv->length += len;
-	if ((priv->length != priv->ctx->length) && !IS_ALIGNED(len, 4)) {
-		printf("Crypto-v1: require update data length 4-byte "
-		       "aligned(0x%08lx - 0x%08lx)\n",
-		       (ulong)input, (ulong)input + len);
-		return -EINVAL;
-	}
-
-	/* Must flush dcache before crypto DMA fetch data region */
-	aligned_input = round_down((ulong)input, CONFIG_SYS_CACHELINE_SIZE);
-	aligned_len = round_up(len + ((ulong)input - aligned_input),
-			       CONFIG_SYS_CACHELINE_SIZE);
-	flush_cache(aligned_input, aligned_len);
-
-	/* Wait last complete */
-	do {} while (readl(&reg->crypto_ctrl) & HASH_START);
+	p = (u8 *)input;
 
-	/* Hash Done Interrupt */
-	writel(HASH_DONE_INT, &reg->crypto_intsts);
+	for (i = 0; i < len / HASH_UPDATE_LIMIT; i++, p += HASH_UPDATE_LIMIT) {
+		ret = crypto_hash_update_with_cache(priv->hash_cache, p,
+						    HASH_UPDATE_LIMIT);
+		if (ret)
+			goto exit;
+	}
 
-	/* Set data base and length */
-	writel((u32)(ulong)input, &reg->crypto_hrdmas);
-	writel((len + 3) >> 2, &reg->crypto_hrdmal);
+	if (len % HASH_UPDATE_LIMIT)
+		ret = crypto_hash_update_with_cache(priv->hash_cache, p,
+						    len % HASH_UPDATE_LIMIT);
 
-	/* Write 1 to start. When finishes, the core will clear it */
-	rk_setreg(&reg->crypto_ctrl, HASH_START);
+exit:
+	if (ret) {
+		crypto_hash_cache_free(priv->hash_cache);
+		priv->hash_cache = NULL;
+	}
 
-	return 0;
+	return ret;
 }
 
 static int rockchip_crypto_sha_final(struct udevice *dev,
@@ -139,13 +177,15 @@ static int rockchip_crypto_sha_final(struct udevice *dev,
 	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
 	struct rk_crypto_reg *reg = priv->reg;
 	u32 *buf = (u32 *)output;
+	int ret = 0;
 	u32 nbits;
 	int i;
 
 	if (priv->length != ctx->length) {
-		printf("Crypto-v1: data total length(0x%08x) != init length(0x%08x)!\n",
+		printf("total length(0x%08x) != init length(0x%08x)!\n",
 		       priv->length, ctx->length);
-		return -EIO;
+		ret = -EIO;
+		goto exit;
 	}
 
 	/* Wait last complete */
@@ -159,7 +199,10 @@ static int rockchip_crypto_sha_final(struct udevice *dev,
 	for (i = 0; i < BITS2WORD(nbits); i++)
 		buf[i] = readl(&reg->crypto_hash_dout[i]);
 
-	return 0;
+exit:
+	crypto_hash_cache_free(priv->hash_cache);
+	priv->hash_cache = NULL;
+	return ret;
 }
 
 #if CONFIG_IS_ENABLED(ROCKCHIP_RSA)
diff --git a/drivers/crypto/rockchip/crypto_v2.c b/drivers/crypto/rockchip/crypto_v2.c
index c322b67ca0..973ea33074 100644
--- a/drivers/crypto/rockchip/crypto_v2.c
+++ b/drivers/crypto/rockchip/crypto_v2.c
@@ -10,9 +10,44 @@
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/clock.h>
+#include <rockchip/crypto_hash_cache.h>
 #include <rockchip/crypto_v2.h>
 #include <rockchip/crypto_v2_pka.h>
 
+#define	RK_HASH_CTX_MAGIC		0x1A1A1A1A
+
+#define CRYPTO_TRNG_MAX			32
+
+enum endian_mode {
+	BIG_ENDIAN = 0,
+	LITTLE_ENDIAN
+};
+
+enum clk_type {
+	CLK = 0,
+	HCLK
+};
+
+struct crypto_lli_desc {
+	u32 src_addr;
+	u32 src_len;
+	u32 dst_addr;
+	u32 dst_len;
+	u32 user_define;
+	u32 reserve;
+	u32 dma_ctrl;
+	u32 next_addr;
+};
+
+struct rk_hash_ctx {
+	struct crypto_lli_desc		data_lli;	/* lli desc */
+	struct crypto_hash_cache	*hash_cache;
+	u32				magic;		/* to check ctx */
+	u32				algo;		/* hash algo */
+	u8				digest_size;	/* hash out length */
+	u8				reserved[3];
+};
+
 struct rockchip_crypto_priv {
 	fdt_addr_t reg;
 	struct clk clk;
@@ -73,16 +108,6 @@ static void word2byte(u32 word, u8 *ch, u32 endian)
 	}
 }
 
-static void rk_flush_cache_align(ulong addr, ulong size, ulong alignment)
-{
-	ulong aligned_input, aligned_len;
-
-	/* Must flush dcache before crypto DMA fetch data region */
-	aligned_input = round_down(addr, alignment);
-	aligned_len = round_up(size + (addr - aligned_input), alignment);
-	flush_cache(aligned_input, aligned_len);
-}
-
 static inline void clear_hash_out_reg(void)
 {
 	int i;
@@ -117,13 +142,12 @@ static void hw_hash_clean_ctx(struct rk_hash_ctx *ctx)
 	assert(ctx);
 	assert(ctx->magic == RK_HASH_CTX_MAGIC);
 
-	if (ctx->cache)
-		free(ctx->cache);
+	crypto_hash_cache_free(ctx->hash_cache);
 
 	memset(ctx, 0x00, sizeof(*ctx));
 }
 
-int rk_hash_init(void *hw_ctx, u32 algo, u32 length)
+static int rk_hash_init(void *hw_ctx, u32 algo)
 {
 	struct rk_hash_ctx *tmp_ctx = (struct rk_hash_ctx *)hw_ctx;
 	u32 reg_ctrl = 0;
@@ -132,8 +156,6 @@ int rk_hash_init(void *hw_ctx, u32 algo, u32 length)
 	if (!tmp_ctx)
 		return -EINVAL;
 
-	memset(tmp_ctx, 0x00, sizeof(*tmp_ctx));
-
 	reg_ctrl = CRYPTO_SW_CC_RESET;
 	crypto_write(reg_ctrl | (reg_ctrl << CRYPTO_WRITE_MASK_SHIFT),
 		     CRYPTO_RST_CTL);
@@ -182,7 +204,6 @@ int rk_hash_init(void *hw_ctx, u32 algo, u32 length)
 	crypto_write(CRYPTO_SRC_ITEM_INT_EN, CRYPTO_DMA_INT_EN);
 
 	tmp_ctx->magic = RK_HASH_CTX_MAGIC;
-	tmp_ctx->left_len = length;
 
 	return 0;
 exit:
@@ -192,9 +213,12 @@ exit:
 	return ret;
 }
 
-static int rk_hash_direct_calc(struct crypto_lli_desc *lli, const u8 *data,
+static int rk_hash_direct_calc(void *hw_data, const u8 *data,
 			       u32 data_len, u8 *started_flag, u8 is_last)
 {
+	struct rockchip_crypto_priv *priv = hw_data;
+	struct rk_hash_ctx *hash_ctx = priv->hw_ctx;
+	struct crypto_lli_desc *lli = &hash_ctx->data_lli;
 	int ret = -EINVAL;
 	u32 tmp = 0;
 
@@ -230,9 +254,8 @@ static int rk_hash_direct_calc(struct crypto_lli_desc *lli, const u8 *data,
 	}
 
 	/* flush cache */
-	rk_flush_cache_align((ulong)lli, sizeof(*lli),
-			     CONFIG_SYS_CACHELINE_SIZE);
-	rk_flush_cache_align((ulong)data, data_len, CONFIG_SYS_CACHELINE_SIZE);
+	crypto_flush_cacheline((ulong)lli, sizeof(*lli));
+	crypto_flush_cacheline((ulong)data, data_len);
 
 	/* start calculate */
 	crypto_write(tmp << CRYPTO_WRITE_MASK_SHIFT | tmp,
@@ -253,153 +276,32 @@ static int rk_hash_direct_calc(struct crypto_lli_desc *lli, const u8 *data,
 		goto exit;
 	}
 
+	priv->length += data_len;
 exit:
 	return ret;
 }
 
-static int rk_hash_cache_calc(struct rk_hash_ctx *tmp_ctx, const u8 *data,
-			      u32 data_len, u8 is_last)
-{
-	u32 left_len;
-	int ret = 0;
-
-	if (!tmp_ctx->cache) {
-		tmp_ctx->cache = (u8 *)memalign(DATA_ADDR_ALIGIN_SIZE,
-						HASH_CACHE_SIZE);
-		if (!tmp_ctx->cache)
-			goto error;
-
-		tmp_ctx->cache_size = 0;
-	}
-
-	left_len = tmp_ctx->left_len;
-
-	while (1) {
-		u32 tmp_len = 0;
-
-		if (tmp_ctx->cache_size + data_len <= HASH_CACHE_SIZE) {
-			/* copy to cache */
-			debug("%s, %d: copy to cache %u\n",
-			      __func__, __LINE__, data_len);
-			memcpy(tmp_ctx->cache + tmp_ctx->cache_size, data,
-			       data_len);
-			tmp_ctx->cache_size += data_len;
-
-			/* if last one calc cache immediately */
-			if (is_last) {
-				debug("%s, %d: last one calc cache %u\n",
-				      __func__, __LINE__, tmp_ctx->cache_size);
-				ret = rk_hash_direct_calc(&tmp_ctx->data_lli,
-							  tmp_ctx->cache,
-							  tmp_ctx->cache_size,
-							  &tmp_ctx->is_started,
-							  is_last);
-				if (ret)
-					goto error;
-			}
-			left_len -= data_len;
-			break;
-		}
-
-		/* 1. make cache be full */
-		/* 2. calc cache */
-		tmp_len = HASH_CACHE_SIZE - tmp_ctx->cache_size;
-		debug("%s, %d: make cache be full %u\n",
-		      __func__, __LINE__, tmp_len);
-		memcpy(tmp_ctx->cache + tmp_ctx->cache_size, data, tmp_len);
-
-		ret = rk_hash_direct_calc(&tmp_ctx->data_lli,
-					  tmp_ctx->cache,
-					  HASH_CACHE_SIZE,
-					  &tmp_ctx->is_started,
-					  0);
-		if (ret)
-			goto error;
-
-		data += tmp_len;
-		data_len -= tmp_len;
-		left_len -= tmp_len;
-		tmp_ctx->cache_size = 0;
-	}
-
-	return ret;
-error:
-	return -EINVAL;
-}
-
 int rk_hash_update(void *ctx, const u8 *data, u32 data_len)
 {
 	struct rk_hash_ctx *tmp_ctx = (struct rk_hash_ctx *)ctx;
-	const u8 *direct_data = NULL, *cache_data = NULL;
-	u32 direct_data_len = 0, cache_data_len = 0;
-	int ret = 0;
-	u8 is_last = 0;
+	int ret = -EINVAL;
 
 	debug("\n");
 	if (!tmp_ctx || !data)
-		goto error;
+		goto exit;
 
 	if (tmp_ctx->digest_size == 0 || tmp_ctx->magic != RK_HASH_CTX_MAGIC)
-		goto error;
-
-	if (tmp_ctx->left_len < data_len)
-		goto error;
-
-	is_last = tmp_ctx->left_len == data_len ? 1 : 0;
-
-	if (!tmp_ctx->use_cache &&
-	    IS_ALIGNED((ulong)data, DATA_ADDR_ALIGIN_SIZE)) {
-		direct_data = data;
-		if (IS_ALIGNED(data_len, DATA_LEN_ALIGIN_SIZE) || is_last) {
-			/* calc all directly */
-			debug("%s, %d: calc all directly\n",
-			      __func__, __LINE__);
-			direct_data_len = data_len;
-		} else {
-			/* calc some directly calc some in cache */
-			debug("%s, %d: calc some directly calc some in cache\n",
-			      __func__, __LINE__);
-			direct_data_len = round_down((ulong)data_len,
-						     DATA_LEN_ALIGIN_SIZE);
-			cache_data = direct_data + direct_data_len;
-			cache_data_len = data_len % DATA_LEN_ALIGIN_SIZE;
-			tmp_ctx->use_cache = 1;
-		}
-	} else {
-		/* calc all in cache */
-		debug("%s, %d: calc all in cache\n", __func__, __LINE__);
-		cache_data = data;
-		cache_data_len = data_len;
-		tmp_ctx->use_cache = 1;
-	}
+		goto exit;
 
-	if (direct_data_len) {
-		debug("%s, %d: calc direct data %u\n",
-		      __func__, __LINE__, direct_data_len);
-		ret = rk_hash_direct_calc(&tmp_ctx->data_lli, direct_data,
-					  direct_data_len,
-					  &tmp_ctx->is_started, is_last);
-		if (ret)
-			goto error;
-		tmp_ctx->left_len -= direct_data_len;
-	}
+	ret = crypto_hash_update_with_cache(tmp_ctx->hash_cache,
+					    data, data_len);
 
-	if (cache_data_len) {
-		debug("%s, %d: calc cache data %u\n",
-		      __func__, __LINE__, cache_data_len);
-		ret = rk_hash_cache_calc(tmp_ctx, cache_data,
-					 cache_data_len, is_last);
-		if (ret)
-			goto error;
-		tmp_ctx->left_len -= cache_data_len;
-	}
-
-	return ret;
-error:
+exit:
 	/* free lli list */
-	hw_hash_clean_ctx(tmp_ctx);
+	if (ret)
+		hw_hash_clean_ctx(tmp_ctx);
 
-	return -EINVAL;
+	return ret;
 }
 
 int rk_hash_final(void *ctx, u8 *digest, size_t len)
@@ -439,8 +341,6 @@ int rk_hash_final(void *ctx, u8 *digest, size_t len)
 	crypto_write(CRYPTO_WRITE_MASK_ALL | 0, CRYPTO_HASH_CTL);
 
 exit:
-	/* free lli list */
-	hw_hash_clean_ctx(tmp_ctx);
 
 	return ret;
 }
@@ -500,13 +400,23 @@ static u32 rockchip_crypto_capability(struct udevice *dev)
 static int rockchip_crypto_sha_init(struct udevice *dev, sha_context *ctx)
 {
 	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
+	struct rk_hash_ctx *hash_ctx = priv->hw_ctx;
 
 	if (!ctx)
 		return -EINVAL;
 
-	memset(priv->hw_ctx, 0x00, sizeof(struct rk_hash_ctx));
+	memset(hash_ctx, 0x00, sizeof(*hash_ctx));
 
-	return rk_hash_init(priv->hw_ctx, ctx->algo, ctx->length);
+	priv->length = 0;
+
+	hash_ctx->hash_cache = crypto_hash_cache_alloc(rk_hash_direct_calc,
+						       priv, ctx->length,
+						       DATA_ADDR_ALIGIN_SIZE,
+						       DATA_LEN_ALIGIN_SIZE);
+	if (!hash_ctx->hash_cache)
+		return -EFAULT;
+
+	return rk_hash_init(hash_ctx, ctx->algo);
 }
 
 static int rockchip_crypto_sha_update(struct udevice *dev,
@@ -539,10 +449,22 @@ static int rockchip_crypto_sha_final(struct udevice *dev,
 {
 	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
 	u32 nbits;
+	int ret;
 
 	nbits = crypto_algo_nbits(ctx->algo);
 
-	return rk_hash_final(priv->hw_ctx, (u8 *)output, BITS2BYTE(nbits));
+	if (priv->length != ctx->length) {
+		printf("total length(0x%08x) != init length(0x%08x)!\n",
+		       priv->length, ctx->length);
+		ret = -EIO;
+		goto exit;
+	}
+
+	ret = rk_hash_final(priv->hw_ctx, (u8 *)output, BITS2BYTE(nbits));
+
+exit:
+	hw_hash_clean_ctx(priv->hw_ctx);
+	return ret;
 }
 
 #if CONFIG_IS_ENABLED(ROCKCHIP_RSA)
diff --git a/include/rockchip/crypto_hash_cache.h b/include/rockchip/crypto_hash_cache.h
new file mode 100644
index 0000000000..388007086b
--- /dev/null
+++ b/include/rockchip/crypto_hash_cache.h
@@ -0,0 +1,37 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2020 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _CRYPTO_HASH_CACHE_H_
+#define _CRYPTO_HASH_CACHE_H_
+
+#define	HASH_CACHE_SIZE		8192
+#define	CIPHER_CACHE_SIZE	8192
+
+typedef int (*crypto_hash_calc)(void *hw_data, const u8 *data, u32 data_len,
+				u8 *started_flag, u8 is_last);
+
+struct crypto_hash_cache {
+	crypto_hash_calc	direct_calc;	/* hardware hash callback*/
+	void			*user_data;
+	void			*cache;		/* virt addr for hash src data*/
+	u32			cache_size;	/* data in cached size */
+	u32			data_align;
+	u32			len_align;
+	u32			left_len;	/* left data to calc */
+	u8			is_started;	/* start or restart */
+	u8			use_cache;	/* is use cache or not*/
+	u8			reserved[2];
+};
+
+struct crypto_hash_cache *crypto_hash_cache_alloc(crypto_hash_calc direct_calc,
+						  void *user_data, u32 total,
+						  u32 data_align,
+						  u32 len_align);
+void crypto_hash_cache_free(struct crypto_hash_cache *hash_cache);
+int crypto_hash_update_with_cache(struct crypto_hash_cache *hash_cache,
+				  const u8 *data, u32 data_len);
+void crypto_flush_cacheline(ulong addr, ulong size);
+
+#endif
diff --git a/include/rockchip/crypto_v2.h b/include/rockchip/crypto_v2.h
index db37b4c748..f1e18beaa1 100644
--- a/include/rockchip/crypto_v2.h
+++ b/include/rockchip/crypto_v2.h
@@ -44,9 +44,6 @@ enum rk_hash_algo {
 #define	RK_MODE_ENCRYPT			0
 #define	RK_MODE_DECRYPT			1
 
-#define	HASH_CACHE_SIZE			8192
-#define	CIPHER_CACHE_SIZE		8192
-
 #define	_SBF(s,	v)			((v) <<	(s))
 #define	_BIT(b)				_SBF(b,	1)
 
@@ -556,44 +553,6 @@ enum rk_hash_algo {
 #define LLI_USER_PRIVACY_KEY		_BIT(7)
 #define LLI_USER_ROOT_KEY		_BIT(8)
 
-#define CRYPTO_TRNG_MAX			32
-
-enum endian_mode {
-	BIG_ENDIAN = 0,
-	LITTLE_ENDIAN
-};
-
-enum clk_type {
-	CLK = 0,
-	HCLK
-};
-
-struct crypto_lli_desc {
-	u32 src_addr;
-	u32 src_len;
-	u32 dst_addr;
-	u32 dst_len;
-	u32 user_define;
-	u32 reserve;
-	u32 dma_ctrl;
-	u32 next_addr;
-};
-
-struct rk_hash_ctx {
-	struct crypto_lli_desc data_lli;/* lli desc */
-	void	*cache;			/* virt addr for hash src data*/
-	u32	cache_size;		/* data in cached size */
-	u32	left_len;		/* left data to calc */
-	u32	magic;			/* to check ctx */
-	u32	algo;			/* hash algo */
-	u8	digest_size;		/* hash out length */
-	u8	is_started;		/* choose use start or restart */
-	u8	use_cache;		/* is use cache or not*/
-	u8	reserved;
-};
-
-#define	RK_HASH_CTX_MAGIC		0x1A1A1A1A
-
 extern fdt_addr_t crypto_base;
 
 static inline u32 crypto_read(u32 offset)

commit 66d05910410d77245cb325d8135ed7e3cde0ad79
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Oct 25 10:16:53 2020 +0800

    rockchip: add fpga ram/mmc support
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I4ff84dc3a2072b7f9c31405d45394538ce3f73f6

diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 1169ea7dfd..dc9340848e 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -44,6 +44,7 @@ obj-$(CONFIG_ROCKCHIP_SMCCC) += rockchip_smccc.o
 obj-$(CONFIG_ROCKCHIP_VENDOR_PARTITION) += vendor.o
 obj-$(CONFIG_ROCKCHIP_RESOURCE_IMAGE) += resource_img.o
 obj-$(CONFIG_ROCKCHIP_DEBUGGER) += rockchip_debugger.o
+obj-$(CONFIG_FPGA_ROCKCHIP) += fpga.o
 endif
 
 obj-$(CONFIG_RAM) += param.o
diff --git a/arch/arm/mach-rockchip/fpga.c b/arch/arm/mach-rockchip/fpga.c
new file mode 100644
index 0000000000..39938299c8
--- /dev/null
+++ b/arch/arm/mach-rockchip/fpga.c
@@ -0,0 +1,101 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2020 Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <ram.h>
+#include <asm/io.h>
+#include <asm/arch/param.h>
+#include <asm/arch/rk_atags.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static void fpga_init_atags(void)
+{
+#ifdef CONFIG_FPGA_RAM
+	struct tag_ram_partition t_ram_part;
+#endif
+	struct tag_bootdev t_bootdev;
+	struct tag_ddr_mem t_ddrmem;
+	struct tag_serial t_serial;
+	struct tag_tos_mem t_tos;
+#if defined(CONFIG_ARM64) || defined(CONFIG_ARM64_BOOT_AARCH32)
+	struct tag_atf_mem t_atf;
+#endif
+	/* destroy ! */
+	atags_destroy();
+
+	/* serial */
+	memset(&t_serial, 0, sizeof(t_serial));
+	t_serial.version = 0;
+	t_serial.enable = 1;
+	t_serial.addr = CONFIG_DEBUG_UART_BASE;
+	t_serial.baudrate = CONFIG_BAUDRATE;
+	t_serial.m_mode = 0;
+	t_serial.id = 2;
+	atags_set_tag(ATAG_SERIAL, &t_serial);
+
+	/* ddr memory */
+	memset(&t_ddrmem, 0, sizeof(t_ddrmem));
+	t_ddrmem.version = 0;
+	t_ddrmem.count = 1;
+	t_ddrmem.bank[0] = CONFIG_SYS_SDRAM_BASE;
+	t_ddrmem.bank[1] = SZ_1G;
+	atags_set_tag(ATAG_DDR_MEM, &t_ddrmem);
+
+	/* bootdev */
+	memset(&t_bootdev, 0, sizeof(t_bootdev));
+	t_bootdev.version = 0;
+#ifdef CONFIG_FPGA_RAM
+	t_bootdev.devtype = BOOT_TYPE_RAM;
+#else
+	t_bootdev.devtype = BOOT_TYPE_EMMC;
+#endif
+	t_bootdev.devnum = 0;
+	t_bootdev.sdupdate = 0;
+	atags_set_tag(ATAG_BOOTDEV, &t_bootdev);
+
+	/* atf */
+#if defined(CONFIG_ARM64) || defined(CONFIG_ARM64_BOOT_AARCH32)
+	memset(&t_atf, 0, sizeof(t_atf));
+	t_atf.version = 0;
+	t_atf.phy_addr = CONFIG_SYS_SDRAM_BASE;
+	t_atf.size = SZ_1M;
+	t_atf.flags = 0;
+	atags_set_tag(ATAG_ATF_MEM, &t_atf);
+#endif
+
+	/* op-tee */
+	memset(&t_tos, 0, sizeof(t_tos));
+	t_tos.version = 0;
+	strcpy(t_tos.tee_mem.name, "op-tee");
+#ifdef CONFIG_ARM64
+	t_tos.tee_mem.phy_addr = SZ_2M;
+	t_tos.tee_mem.size = SZ_4M;
+#else
+	t_tos.tee_mem.phy_addr = 0x8400000; /* 132M offset */
+	t_tos.tee_mem.size = 0x1e00000;     /* 30M size */
+#endif
+	t_tos.tee_mem.flags = 1;
+	atags_set_tag(ATAG_TOS_MEM, &t_tos);
+
+#ifdef CONFIG_FPGA_RAM
+	/* ram part */
+	memset(&t_ram_part, 0, sizeof(t_ram_part));
+	t_ram_part.version = 0;
+	t_ram_part.count = 1;
+	strcpy(t_ram_part.part[0].name, "boot");
+	t_ram_part.part[0].start = 0x4000000;	/* 64M offset */
+	t_ram_part.part[0].size  = 0x2000000;	/* 32M size */
+	atags_set_tag(ATAG_RAM_PARTITION, &t_ram_part);
+#endif
+}
+
+int arch_fpga_init(void)
+{
+	fpga_init_atags();
+
+	return 0;
+}
diff --git a/arch/arm/mach-rockchip/rk_atags.c b/arch/arm/mach-rockchip/rk_atags.c
index df9b05bdd0..faa9c1a379 100644
--- a/arch/arm/mach-rockchip/rk_atags.c
+++ b/arch/arm/mach-rockchip/rk_atags.c
@@ -186,7 +186,7 @@ int atags_set_tag(u32 magic, void *tagdata)
 	u32 length, size = 0, hash;
 	struct tag *t = (struct tag *)ATAGS_PHYS_BASE;
 
-#ifndef CONFIG_TPL_BUILD
+#if !defined(CONFIG_TPL_BUILD) && !defined(CONFIG_FPGA_ROCKCHIP)
 	if (!atags_is_available())
 		return -EPERM;
 #endif

commit 73a2b1f65243eae0940bf1bea0ade77b8b8985d8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Oct 28 21:05:15 2020 +0800

    driver: fpga: add rockchip support
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I52b089453383f9b48693c1cae3e0a97a5cf2339f

diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index 6b2c866319..2dc4bd5ad3 100644
--- a/drivers/fpga/Kconfig
+++ b/drivers/fpga/Kconfig
@@ -45,4 +45,19 @@ config FPGA_ZYNQMPPL
 	  Enable FPGA driver for loading bitstream in BIT and BIN format
 	  on Xilinx Zynq UltraScale+ (ZynqMP) device.
 
+config FPGA_ROCKCHIP
+	bool "Enable Rockchip FPGA drivers"
+	depends on ARCH_ROCKCHIP
+	help
+	  Enale Rockchip FPGA specific functions.
+
+config FPGA_MMC
+	bool "FPGA board with MMC"
+	depends on FPGA_ROCKCHIP
+
+config FPGA_RAM
+	bool "FPGA board with RAM"
+	depends on FPGA_ROCKCHIP
+	select DM_RAMDISK
+	select RAMDISK_RO
 endmenu

commit 2d11b8685e3a5d2bd1609865b0198f56dcc8e23d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Oct 25 13:42:11 2020 +0800

    make/fit.sh: simplify and support sign uboot.img only
    
    Remove some unnecessary args.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I03c8a59f76bb79af07af399ad4cf479d7258cec5

diff --git a/make.sh b/make.sh
index a592e50080..267756fbc1 100755
--- a/make.sh
+++ b/make.sh
@@ -209,8 +209,8 @@ function process_args()
 				ARG_UBOOT_SIZE="--size $2 $3"
 				shift 3
 				;;
-			--no-pack)  # FIT: build but not pack image
-				ARG_NO_PACK="y"
+			--raw-compile)  # FIT: build but not pack image
+				ARG_RAW_COMPILE="y"
 				shift 1
 				;;
 			--no-uboot) # FIT: pack uboot.img without u-boot
@@ -230,7 +230,7 @@ function process_args()
 				;;
 			*)
 				#1. FIT scripts args
-				NUM=$(${SCRIPT_FIT} --arg-check $1)
+				NUM=$(${SCRIPT_FIT} --args $1)
 				if  [ ${NUM} -ne 0 ]; then
 					[ ${NUM} -eq 1 ] && ARG_LIST_FIT="${ARG_LIST_FIT} $1"
 					[ ${NUM} -eq 2 ] && ARG_LIST_FIT="${ARG_LIST_FIT} $1 $2"
@@ -480,7 +480,7 @@ function sub_commands()
 			;;
 		fit)
 			# Non-secure
-			${SCRIPT_FIT} --uboot-itb --boot-itb --no-vboot ${ARG_LIST_FIT}
+			${SCRIPT_FIT} --boot_img_dir images/ ${ARG_LIST_FIT}
 			exit 0
 			;;
 		uboot)
@@ -723,15 +723,10 @@ function pack_fit_image()
 		touch u-boot-nodtb.bin u-boot.dtb
 	fi
 
-	# Verified boot=1:  must build both uboot.img and boot.img
-	# Verified boot=0:  build uboot.img
-	if grep -q '^CONFIG_FIT_SIGNATURE=y' .config ; then
-		${SCRIPT_FIT} --uboot-itb --boot-itb ${ARG_LIST_FIT}
-	else
-		rm uboot.img trust*.img -f
-		${SCRIPT_FIT} --uboot-itb --no-vboot --no-rebuild ${ARG_LIST_FIT}
-		echo "pack uboot.img okay! Input: ${INI_TRUST}"
-	fi
+	rm uboot.img trust*.img -rf
+	${SCRIPT_FIT} ${ARG_LIST_FIT}
+
+	echo "pack uboot.img okay! Input: ${INI_TRUST}"
 }
 
 function handle_args_late()
@@ -747,16 +742,14 @@ function clean_files()
 
 function pack_images()
 {
-	if [ "${ARG_NO_PACK}" == "y" ]; then
-		return
-	fi
-
-	if [ "${PLAT_TYPE}" == "RKFW" ]; then
-		pack_uboot_image
-		pack_trust_image
-		pack_loader_image
-	elif [ "${PLAT_TYPE}" == "FIT" ]; then
-		pack_fit_image ${ARG_LIST_FIT}
+	if [ "${ARG_RAW_COMPILE}" != "y" ]; then
+		if [ "${PLAT_TYPE}" == "FIT" ]; then
+			pack_fit_image ${ARG_LIST_FIT}
+		else
+			pack_uboot_image
+			pack_trust_image
+			pack_loader_image
+		fi
 	fi
 }
 
diff --git a/scripts/fit.sh b/scripts/fit.sh
index e095f8ce40..6bbd078e74 100755
--- a/scripts/fit.sh
+++ b/scripts/fit.sh
@@ -55,14 +55,10 @@ function help()
 	echo "    --version-boot          <decimal integer>"
 	echo "    --ini-trust"
 	echo "    --ini-loader"
-	echo "    --no-vboot"
 	echo "    --no-check"
-	echo "    --no-rebuild"
 	echo "    --spl-new"
-	echo "    --uboot-itb"
-	echo "    --boot-itb"
 	echo "    --boot_img"
-	echo "    --arg-check"
+	echo "    --args"
 	echo
 }
 
@@ -96,7 +92,7 @@ function check_its()
 function validate_arg()
 {
 	case $1 in
-		--uboot-itb|--boot-itb|--no-vboot|--no-rebuild|--no-check|--spl-new)
+		--no-check|--spl-new)
 			shift=1
 			;;
 		--ini-trust|--ini-loader|--rollback-index-boot|--rollback-index-uboot|--boot_img|--version-uboot|--version-boot)
@@ -118,25 +114,17 @@ function fit_process_args()
 
 	while [ $# -gt 0 ]; do
 		case $1 in
-			--arg-check)
+			--args)
 				ARG_VALIDATE=$2
 				shift 2
 				;;
-			--uboot-itb)
-				ARG_PACK_UBOOT="y"
-				shift 1
-				;;
-			--boot-itb)
-				ARG_PACK_BOOT="y"
-				shift 1
-				;;
-			--no-vboot)     # Force to build non-vboot image
-				ARG_NO_VBOOT="y"
-				shift 1
+			--boot_img)     # boot.img
+				ARG_BOOT_IMG=$2
+				shift 2
 				;;
-			--no-rebuild)   # No rebuild with "./make.sh"
-				ARG_NO_REBUILD="y"
-				shift 1
+			--boot_img_dir) # boot.img components directory
+				ARG_BOOT_IMG_DIR=$2
+				shift 2
 				;;
 			--no-check)     # No hostcc fit signature check
 				ARG_NO_CHECK="y"
@@ -164,10 +152,6 @@ function fit_process_args()
 				arg_check_decimal $2
 				shift 2
 				;;
-			--boot_img)     # external boot.img
-				ARG_EXT_BOOT=$2
-				shift 2
-				;;
 			--version-uboot)
 				ARG_VER_UBOOT=$2
 				arg_check_decimal $2
@@ -184,17 +168,19 @@ function fit_process_args()
 				;;
 		esac
 	done
+
+	if grep -q '^CONFIG_FIT_SIGNATURE=y' .config ; then
+		ARG_SIGN="y"
+	fi
 }
 
-function fit_rebuild()
+function fit_raw_compile()
 {
 	# Verified-boot: should rebuild code but don't need to repack images.
-	if [ "${ARG_NO_REBUILD}" != "y" ]; then
-		./make.sh --no-pack # Build but not pack loader/trust/uboot, etc.
+	if [ "${ARG_SIGN}" == "y" ]; then
+		./make.sh --raw-compile
 	fi
-
-	rm ${FIT_DIR} -rf
-	mkdir -p ${FIT_DIR}
+	rm ${FIT_DIR} -rf && mkdir -p ${FIT_DIR}
 }
 
 function fit_gen_uboot_itb()
@@ -202,7 +188,7 @@ function fit_gen_uboot_itb()
 	./make.sh itb ${ARG_INI_TRUST} >/dev/null 2>&1
 	check_its ${ITS_UBOOT}
 
-	if [ "${ARG_NO_VBOOT}" == "y" ]; then
+	if [ "${ARG_SIGN}" != "y" ]; then
 		${MKIMAGE} -f ${ITS_UBOOT} -E -p ${OFFS_NS_UBOOT} ${ITB_UBOOT} -v ${ARG_VER_UBOOT}
 		if [ "${ARG_SPL_NEW}" == "y" ]; then
 			./make.sh --spl ${ARG_INI_LOADER}
@@ -240,7 +226,7 @@ function fit_gen_uboot_itb()
 		# u-boot.dtb must contains rsa key
 		if ! fdtget -l ${UBOOT_DTB} /signature >/dev/null 2>&1 ; then
 			${MKIMAGE} -f ${ITS_UBOOT} -k ${KEY_DIR} -K ${UBOOT_DTB} -E -p ${OFFS_S_UBOOT} -r ${ITB_UBOOT} -v ${ARG_VER_UBOOT}
-			echo "Adding RSA public key into ${UBOOT_DTB}"
+			echo "## Adding RSA public key into ${UBOOT_DTB}"
 		fi
 
 		# Pack
@@ -308,8 +294,8 @@ function fit_gen_uboot_itb()
 
 function fit_gen_boot_itb()
 {
-	if [ ! -z ${ARG_EXT_BOOT} ]; then
-		${FIT_UNPACK} -f ${ARG_EXT_BOOT} -o ${FIT_DIR}/unpack
+	if [ ! -z ${ARG_BOOT_IMG} ]; then
+		${FIT_UNPACK} -f ${ARG_BOOT_IMG} -o ${FIT_DIR}/unpack
 		ITS_BOOT="${FIT_DIR}/unpack/image.its"
 	else
 		compression=`awk -F"," '/COMPRESSION=/  { printf $1 }' ${ARG_INI_TRUST} | tr -d ' ' | cut -c 13-`
@@ -320,7 +306,7 @@ function fit_gen_boot_itb()
 		check_its ${ITS_BOOT}
 	fi
 
-	if [ "${ARG_NO_VBOOT}" == "y" ]; then
+	if [ "${ARG_SIGN}" != "y" ]; then
 		${MKIMAGE} -f ${ITS_BOOT} -E -p ${OFFS_NS_BOOT} ${ITB_BOOT} -v ${ARG_VER_BOOT}
 	else
 		if [ ! -f ${RSA_PRI_KEY}  ]; then
@@ -436,7 +422,7 @@ function fit_gen_boot_img()
 
 function fit_msg_uboot()
 {
-	if [ "${ARG_NO_VBOOT}" == "y" ]; then
+	if [ "${ARG_SIGN}" != "y" ]; then
 		MSG_SIGN="no-signed"
 	else
 		MSG_SIGN="signed"
@@ -456,7 +442,7 @@ function fit_msg_uboot()
 
 function fit_msg_boot()
 {
-	if [ "${ARG_NO_VBOOT}" == "y" ]; then
+	if [ "${ARG_SIGN}" != "y" ]; then
 		MSG_SIGN="no-signed"
 	else
 		MSG_SIGN="signed"
@@ -480,18 +466,18 @@ function fit_msg_loader()
 	echo "Image(no-signed):  ${LOADER} (with spl, ddr, usbplug) is ready"
 }
 
-function fit_vboot_uboot()
+function fit_generate_uboot()
 {
-	fit_rebuild
+	fit_raw_compile
 	fit_gen_uboot_itb
 	fit_gen_uboot_img
 	echo
 	fit_msg_uboot
 }
 
-function fit_vboot()
+function fit_generate_uboot_boot()
 {
-	fit_rebuild
+	fit_raw_compile
 	fit_gen_boot_itb
 	fit_gen_boot_img
 	fit_gen_uboot_itb
@@ -507,11 +493,9 @@ function fit_vboot()
 fit_process_args $*
 if [ ! -z "${ARG_VALIDATE}" ]; then
 	validate_arg ${ARG_VALIDATE}
-elif [ "${ARG_PACK_UBOOT}${ARG_PACK_BOOT}" == "yy" ]; then
-	fit_vboot
-elif [ "${ARG_PACK_UBOOT}" == "y" ]; then
-	fit_vboot_uboot
-elif [ "${ARG_PACK_BOOT}" == "y" ]; then
-	fit_vboot_boot
+elif [ ! -z "${ARG_BOOT_IMG}" ]; then
+	fit_generate_uboot_boot
+else
+	fit_generate_uboot
 fi
 

commit 811f8a32ef127dc0fab7c2e9afc35e39ad814140
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Oct 25 11:22:02 2020 +0800

    rockchip: make_fit_boot: support generate arm64 boot.img
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ic21f0f642aed40bc005048be2fe898af88ccf023

diff --git a/arch/arm/mach-rockchip/make_fit_args.sh b/arch/arm/mach-rockchip/make_fit_args.sh
index 7712d6e21b..2e35cd63f9 100755
--- a/arch/arm/mach-rockchip/make_fit_args.sh
+++ b/arch/arm/mach-rockchip/make_fit_args.sh
@@ -21,8 +21,10 @@ function help()
 	echo "    arg                 type       output variable       description"
 	echo "--------------------------------------------------------------------------------------------"
 	echo "    -c [comp]     ==>   <string>   COMPRESSION           set compression: \"none\", \"gzip\""
-	echo "    -m [offset]   ==>   <hex>      MCU_LOAD_ADDR         set mcu.bin offset address"
-	echo "    -t [offset]   ==>   <hex>      TEE_LOAD_ADDR         set tee.bin offset address"
+	echo "    -m [offset]   ==>   <hex>      MCU_LOAD_ADDR         set mcu.bin load address"
+	echo "    -t [offset]   ==>   <hex>      TEE_LOAD_ADDR         set tee.bin load address"
+	echo "    (none)        ==>   <hex>      UBOOT_LOAD_ADDR       set U-Boot load address"
+	echo "    (none)        ==>   <string>   ARCH                  set arch: \"arm\", \"arm64\""
 	echo
 }
 
@@ -61,6 +63,11 @@ fi
 # Base
 DARM_BASE=`sed -n "/CONFIG_SYS_SDRAM_BASE=/s/CONFIG_SYS_SDRAM_BASE=//p" ${srctree}/include/autoconf.mk|tr -d '\r'`
 UBOOT_LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${srctree}/include/autoconf.mk|tr -d '\r'`
+if grep -q '^CONFIG_ARM64=y' .config ; then
+	ARCH="arm64"
+else
+	ARCH="arm"
+fi
 
 # tee
 if [ ! -z "${TEE_OFFSET}" ]; then
diff --git a/arch/arm/mach-rockchip/make_fit_boot.sh b/arch/arm/mach-rockchip/make_fit_boot.sh
index 69a72348ed..0c5993e455 100755
--- a/arch/arm/mach-rockchip/make_fit_boot.sh
+++ b/arch/arm/mach-rockchip/make_fit_boot.sh
@@ -8,6 +8,10 @@
 # Process args and auto set variables
 source ./${srctree}/arch/arm/mach-rockchip/make_fit_args.sh
 
+if [ ! -f ${srctree}/images/ramdisk ]; then
+	touch ${srctree}/images/ramdisk
+fi
+
 if [ "${COMPRESSION}" == "gzip" ]; then
 	gzip -k -f -9 ${srctree}/images/kernel
 	gzip -k -f -9 ${srctree}/images/ramdisk
@@ -35,7 +39,7 @@ cat << EOF
 		fdt {
 			data = /incbin/("./images/rk-kernel.dtb");
 			type = "flat_dt";
-			arch = "arm";
+			arch = "${ARCH}";
 			compression = "none";
 			load  = <0xffffff00>;
 			hash {
@@ -49,7 +53,7 @@ echo "			data = /incbin/(\"./images/kernel${SUFFIX}\");"
 echo "			compression = \"${COMPRESSION}\";"
 cat << EOF
 			type = "kernel";
-			arch = "arm";
+			arch = "${ARCH}";
 			os = "linux";
 			entry = <0xffffff01>;
 			load  = <0xffffff01>;
@@ -64,7 +68,7 @@ echo "			data = /incbin/(\"./images/ramdisk${SUFFIX}\");"
 echo "			compression = \"${COMPRESSION}\";"
 cat << EOF
 			type = "ramdisk";
-			arch = "arm";
+			arch = "${ARCH}";
 			os = "linux";
 			load  = <0xffffff02>;
 			hash {
@@ -75,7 +79,7 @@ cat << EOF
 		resource {
 			data = /incbin/("./images/resource");
 			type = "multi";
-			arch = "arm";
+			arch = "${ARCH}";
 			compression = "none";
 			hash {
 				algo = "sha256";

commit c4e6abcd5e33b08affcf6b9eb33af1294e1443a5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Oct 25 10:42:15 2020 +0800

    scripts: rkpatch: update patch order
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I3bdfe4d05a9985e22fa5bac790d823f5ff4325ec

diff --git a/scripts/rkpatch.sh b/scripts/rkpatch.sh
index 3e53f69a06..a43fdbe499 100755
--- a/scripts/rkpatch.sh
+++ b/scripts/rkpatch.sh
@@ -8,16 +8,17 @@
 case $1 in
 --help|-help|help|--h|-h|debug|'')
 	echo
+	echo "    0. set CONFIG_BOOTDELAY=0"
 	echo "    1. lib/initcall.c debug() -> printf()"
 	echo "    2. common/board_r.c and common/board_f.c debug() -> printf()"
 	echo "    3. global #define DEBUG"
 	echo "    4. enable CONFIG_ROCKCHIP_DEBUGGER"
-	echo "    5. enable CONFIG_ROCKCHIP_CRC"
+	echo "    5. set CONFIG_BOOTDELAY=5"
 	echo "    6. enable CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP"
-	echo "    7. enable CONFIG_ROCKCHIP_CRASH_DUMP"
-	echo "    8. set CONFIG_BOOTDELAY=5"
-	echo "    9. armv7 start.S: print entry warning"
-	echo "   10. armv8 start.S: print entry warning"
+	echo "    7. armv7 start.S: print entry warning"
+	echo "    8. armv8 start.S: print entry warning"
+	echo "    9. enable CONFIG_ROCKCHIP_CRASH_DUMP"
+	echo "   10. enable CONFIG_ROCKCHIP_CRC"
 	echo "   11. firmware bootflow debug() -> printf()"
 	echo "   12. bootstage timing report"
 	echo "   13. starting kernel halt dump"
@@ -32,6 +33,10 @@ case $1 in
 	grep '^CONFIG_ROCKCHIP_CRASH_DUMP=y' .config > /dev/null \
 	&& echo "    CONFIG_ROCKCHIP_CRASH_DUMP"
 	;;
+0)
+	sed -i 's/^CONFIG_BOOTDELAY=5/CONFIG_BOOTDELAY=0/g' .config
+	echo "DEBUG [0]: CONFIG_BOOTDELAY is 0s"
+	;;
 1)
 	sed -i 's/\<debug\>/printf/g' lib/initcall.c
 	sed -i 's/ifdef DEBUG/if 1/g' lib/initcall.c
@@ -51,30 +56,30 @@ case $1 in
 	echo "DEBUG [4]: CONFIG_ROCKCHIP_DEBUGGER is enabled"
 	;;
 5)
-	sed -i 's/\# CONFIG_ROCKCHIP_CRC is not set/CONFIG_ROCKCHIP_CRC=y/g' .config
-	echo "DEBUG [5]: CONFIG_ROCKCHIP_CRC is enabled"
+	sed -i 's/^CONFIG_BOOTDELAY=0/CONFIG_BOOTDELAY=5/g' .config
+	echo "DEBUG [5]: CONFIG_BOOTDELAY is 5s"
 	;;
 6)
 	sed -i 's/\# CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP is not set/CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP=y/g' .config
 	echo "DEBUG [6]: CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP is enabled"
 	;;
 7)
-	sed -i 's/\# CONFIG_ROCKCHIP_CRASH_DUMP is not set/CONFIG_ROCKCHIP_CRASH_DUMP=y/g' .config
-	echo "DEBUG [7]: CONFIG_ROCKCHIP_CRASH_DUMP is enabled"
+	sed -i '/save_boot_params_ret:/a\ldr r0, =CONFIG_DEBUG_UART_BASE\nmov r1, #100\nloop:\nmov r2, #0x55\nstr r2, [r0]\nsub r1, r1, #1\ncmp r1, #0\nbne loop\ndsb' \
+	./arch/arm/cpu/armv7/start.S
+	echo "DEBUG [7]: armv7 start.S entry warning 'UUUU...'"
 	;;
 8)
-	sed -i 's/^CONFIG_BOOTDELAY=0/CONFIG_BOOTDELAY=5/g' .config
-	echo "DEBUG [8]: CONFIG_BOOTDELAY is 5s"
+	sed -i '/save_boot_params_ret:/a\ldr x0, =CONFIG_DEBUG_UART_BASE\nmov x1, #100\nloop:\nmov x2, #0x55\nstr x2, [x0]\nsub x1, x1, #1\ncmp x1, #0\nb.ne loop\ndsb sy' \
+	./arch/arm/cpu/armv8/start.S
+	echo "DEBUG [8]: armv8 start.S entry warning 'UUUU...'"
 	;;
 9)
-	sed -i '/save_boot_params_ret:/a\ldr r0, =CONFIG_DEBUG_UART_BASE\nmov r1, #100\nloop:\nmov r2, #0x55\nstr r2, [r0]\nsub r1, r1, #1\ncmp r1, #0\nbne loop\ndsb' \
-	./arch/arm/cpu/armv7/start.S
-	echo "DEBUG [9]: armv7 start.S entry warning 'UUUU...'"
+	sed -i 's/\# CONFIG_ROCKCHIP_CRASH_DUMP is not set/CONFIG_ROCKCHIP_CRASH_DUMP=y/g' .config
+	echo "DEBUG [9]: CONFIG_ROCKCHIP_CRASH_DUMP is enabled"
 	;;
 10)
-	sed -i '/save_boot_params_ret:/a\ldr x0, =CONFIG_DEBUG_UART_BASE\nmov x1, #100\nloop:\nmov x2, #0x55\nstr x2, [x0]\nsub x1, x1, #1\ncmp x1, #0\nb.ne loop\ndsb sy' \
-	./arch/arm/cpu/armv8/start.S
-	echo "DEBUG [10]: armv8 start.S entry warning 'UUUU...'"
+	sed -i 's/\# CONFIG_ROCKCHIP_CRC is not set/CONFIG_ROCKCHIP_CRC=y/g' .config
+	echo "DEBUG [10]: CONFIG_ROCKCHIP_CRC is enabled"
 	;;
 11)
 	sed -i 's/\<debug\>/printf/g' common/fdt_support.c

commit 275a49e3fb7abac607d121d6d4555867d44b7128
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 26 10:14:45 2020 +0800

    irq: gicv3: use cpu interface system registers for gicc read/write
    
    RK3568 only support cpu interface system registers access.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ie89380e49ee61afe57560dcc4eba6233f2aca3f2

diff --git a/drivers/irq/irq-gic.c b/drivers/irq/irq-gic.c
index f8b8a0dc71..e22562fea3 100644
--- a/drivers/irq/irq-gic.c
+++ b/drivers/irq/irq-gic.c
@@ -230,15 +230,24 @@ static int gic_irq_get(void)
 static int gic_irq_suspend(void)
 {
 	int irq_nr, i, irq;
-
+#ifndef CONFIG_GICV2
+	u32 reg;
+#endif
 	/* irq nr */
 	irq_nr = ((gicd_readl(GICD_TYPER) & 0x1f) + 1) * 32;
 	if (irq_nr > 1020)
 		irq_nr = 1020;
 
 	/* GICC save */
+#ifdef CONFIG_GICV2
 	gicc_save.ctlr = gicc_readl(GICC_CTLR);
 	gicc_save.pmr = gicc_readl(GICC_PMR);
+#else
+	asm volatile("mrs %0, " __stringify(ICC_CTLR_EL1) : "=r" (reg));
+	gicc_save.ctlr = reg;
+	asm volatile("mrs %0, " __stringify(ICC_PMR_EL1) : "=r" (reg));
+	gicc_save.pmr = reg;
+#endif
 
 	/* GICD save */
 	gicd_save.ctlr = gicd_readl(GICD_CTLR);
@@ -275,13 +284,20 @@ static int gic_irq_suspend(void)
 static int gic_irq_resume(void)
 {
 	int irq_nr, i, irq;
-
+#ifndef CONFIG_GICV2
+	u32 reg;
+#endif
 	irq_nr = ((gicd_readl(GICD_TYPER) & 0x1f) + 1) * 32;
 	if (irq_nr > 1020)
 		irq_nr = 1020;
 
 	/* Disable ctrl register */
+#ifdef CONFIG_GICV2
 	gicc_writel(0, GICC_CTLR);
+#else
+	reg = 0;
+	asm volatile("msr " __stringify(ICC_CTLR_EL1) ", %0" : : "r" (reg));
+#endif
 	gicd_writel(0, GICD_CTLR);
 	dsb();
 
@@ -315,8 +331,15 @@ static int gic_irq_resume(void)
 			    GICD_ISPENDRn + IRQ_REG_X32(irq));
 
 	dsb();
+#ifdef CONFIG_GICV2
 	gicc_writel(gicc_save.pmr, GICC_PMR);
 	gicc_writel(gicc_save.ctlr, GICC_CTLR);
+#else
+	reg = gicc_save.pmr;
+	asm volatile("msr " __stringify(ICC_PMR_EL1) ", %0" : : "r" (reg));
+	reg = gicc_save.ctlr;
+	asm volatile("msr " __stringify(ICC_CTLR_EL1) ", %0" : : "r" (reg));
+#endif
 	gicd_writel(gicd_save.ctlr, GICD_CTLR);
 	dsb();
 

commit 3582f7fa15304e6b13e666fc6ba42ccb23c88b05
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Oct 25 10:19:21 2020 +0800

    ram: Kconfig: select RKPARM_PARTITION by RAMDISK_RO
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Idb6ff31bf8ca4f9bf9a8fb5f0fb447236a9f8e76

diff --git a/drivers/ram/Kconfig b/drivers/ram/Kconfig
index b45def497d..2f8b430b2a 100644
--- a/drivers/ram/Kconfig
+++ b/drivers/ram/Kconfig
@@ -35,16 +35,17 @@ config STM32_SDRAM
 	  This driver is for the sdram memory interface with the FMC.
 
 config DM_RAMDISK
-        bool "Enable Driver Model for RAMDISK drivers"
-        depends on DM
-        help
-          This enables the Ramdisk uclass support. These appear as block devices
-          in U-Boot.
+	bool "Enable Driver Model for RAMDISK drivers"
+	depends on DM
+	help
+	  This enables the Ramdisk uclass support. These appear as block devices
+	  in U-Boot.
 
 config RAMDISK_RO
-        bool "Enable read only ramdisk support"
-        depends on DM_RAMDISK && RKPARM_PARTITION
-        help
-          This enables the read only ramdisk support.
+	bool "Enable read only ramdisk support"
+	depends on DM_RAMDISK
+	select RKPARM_PARTITION
+	help
+	  This enables the read only ramdisk support.
 
 source "drivers/ram/rockchip/Kconfig"

commit b7b235505b2e037a3d04fc4315c4b6c414cba9bd
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Oct 26 17:37:31 2020 +0800

    mmc: sdhci: support new phy IP
    
    The new phy IP is designed by rockchip.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I5a84bcc6fff7aaf0bc848cdb70b78a57f471e51e

diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index cdcb9f49c2..28767f0088 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -36,6 +36,30 @@ DECLARE_GLOBAL_DATA_PTR;
 #define PHYCTRL_FREQSEL_100M            0x2
 #define PHYCTRL_FREQSEL_150M            0x3
 
+/* Rockchip specific Registers */
+#define DWCMSHC_EMMC_DLL_CTRL		0x800
+#define DWCMSHC_EMMC_DLL_TXCLK		0x804
+#define DWCMSHC_EMMC_DLL_RXCLK		0x808
+#define DWCMSHC_EMMC_DLL_STRBIN		0x80c
+#define DWCMSHC_EMMC_DLL_STATUS0	0x820
+#define DWCMSHC_EMMC_DLL_START		BIT(0)
+#define DWCMSHC_EMMC_DLL_RXCLK_SRCSEL	29
+#define DWCMSHC_EMMC_DLL_START_POINT	16
+#define DWCMSHC_EMMC_DLL_INC		8
+#define DWCMSHC_EMMC_DLL_DLYENA		BIT(27)
+#define DLL_RXCLK_TAPNUM_DEFAULT	0x3
+#define DLL_STRBIN_TAPNUM_DEFAULT	0x3
+#define DLL_RXCLK_TAPNUM_FROM_SW	BIT(24)
+#define DWCMSHC_EMMC_DLL_LOCKED		BIT(8)
+#define DWCMSHC_EMMC_DLL_TIMEOUT	BIT(9)
+#define DLL_RXCLK_NO_INVERTER		1
+#define DLL_RXCLK_INVERTER		0
+#define DWCMSHC_ENHANCED_STROBE		BIT(8)
+#define DLL_LOCK_WO_TMOUT(x) \
+	((((x) & DWCMSHC_EMMC_DLL_LOCKED) == DWCMSHC_EMMC_DLL_LOCKED) && \
+	(((x) & DWCMSHC_EMMC_DLL_TIMEOUT) == 0))
+#define ROCKCHIP_MAX_CLKS		3
+
 struct rockchip_sdhc_plat {
 #if CONFIG_IS_ENABLED(OF_PLATDATA)
 	struct dtd_rockchip_rk3399_sdhci_5_1 dtplat;
@@ -273,6 +297,55 @@ static int rk3399_sdhci_emmc_set_clock(struct sdhci_host *host, unsigned int clo
 	return 0;
 }
 
+static int rk3568_emmc_phy_init(struct udevice *dev)
+{
+	struct rockchip_sdhc *prv = dev_get_priv(dev);
+	struct sdhci_host *host = &prv->host;
+	u32 extra;
+	int timeout = 500;
+
+	sdhci_writel(host, BIT(1), DWCMSHC_EMMC_DLL_CTRL);
+	udelay(1);
+	sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_CTRL);
+	/* Init DLL settings */
+	extra = 0x5 << DWCMSHC_EMMC_DLL_START_POINT |
+		0x2 << DWCMSHC_EMMC_DLL_INC |
+		DWCMSHC_EMMC_DLL_START;
+	sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_CTRL);
+	while(1) {
+		if (timeout < 0)
+			return ETIMEDOUT;
+		if (sdhci_readl(host, DWCMSHC_EMMC_DLL_STATUS0) == DLL_LOCK_WO_TMOUT(extra))
+			break;
+		udelay(1);
+		timeout--;
+	}
+
+	/* FixMe: clk inverter? */
+	extra = DWCMSHC_EMMC_DLL_DLYENA |
+		DLL_RXCLK_NO_INVERTER << DWCMSHC_EMMC_DLL_RXCLK_SRCSEL;
+	sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_RXCLK);
+	extra = DWCMSHC_EMMC_DLL_DLYENA |
+		DLL_RXCLK_TAPNUM_DEFAULT |
+		DLL_RXCLK_TAPNUM_FROM_SW;
+	sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_TXCLK);
+	extra = DWCMSHC_EMMC_DLL_DLYENA |
+		DLL_STRBIN_TAPNUM_DEFAULT;
+	sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_STRBIN);
+
+	return 0;
+}
+
+static int rk3568_sdhci_emmc_set_clock(struct sdhci_host *host, unsigned int clock)
+{
+	return rk3399_emmc_set_clock(host, clock);
+}
+
+static int rk3568_emmc_get_phy(struct udevice *dev)
+{
+	return 0;
+}
+
 static int arasan_sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
 {
 	struct rockchip_sdhc *priv =
@@ -387,11 +460,21 @@ static const struct sdhci_data arasan_data = {
 	.emmc_phy_init = rk3399_emmc_phy_init,
 };
 
+static const struct sdhci_data snps_data = {
+	.emmc_set_clock = rk3568_sdhci_emmc_set_clock,
+	.get_phy = rk3568_emmc_get_phy,
+	.emmc_phy_init = rk3568_emmc_phy_init,
+};
+
 static const struct udevice_id arasan_sdhci_ids[] = {
 	{
 		.compatible = "arasan,sdhci-5.1",
 		.data = (ulong)&arasan_data,
 	},
+	{
+		.compatible = "snps,dwcmshc-sdhci",
+		.data = (ulong)&snps_data,
+	},
 	{ }
 };
 

commit 05f3b0ab30b5434cfe10329c1a7cdbc7ee77b71a
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Oct 26 17:22:50 2020 +0800

    mmc: sdhci: clean up the phy code
    
    Different platform has different phy IP, distinguish them by
    the compatible data.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Iaf78eee8abe7e9cd91c1edcd42fd65a611c3b0be

diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index 2852fa71f2..cdcb9f49c2 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -22,6 +22,19 @@
 DECLARE_GLOBAL_DATA_PTR;
 /* 400KHz is max freq for card ID etc. Use that as min */
 #define EMMC_MIN_FREQ	400000
+#define KHz	(1000)
+#define MHz	(1000 * KHz)
+
+#define PHYCTRL_CALDONE_MASK		0x1
+#define PHYCTRL_CALDONE_SHIFT		0x6
+#define PHYCTRL_CALDONE_DONE		0x1
+#define PHYCTRL_DLLRDY_MASK		0x1
+#define PHYCTRL_DLLRDY_SHIFT		0x5
+#define PHYCTRL_DLLRDY_DONE		0x1
+#define PHYCTRL_FREQSEL_200M            0x0
+#define PHYCTRL_FREQSEL_50M             0x1
+#define PHYCTRL_FREQSEL_100M            0x2
+#define PHYCTRL_FREQSEL_150M            0x3
 
 struct rockchip_sdhc_plat {
 #if CONFIG_IS_ENABLED(OF_PLATDATA)
@@ -39,26 +52,22 @@ struct rockchip_emmc_phy {
 
 struct rockchip_sdhc {
 	struct sdhci_host host;
+	struct udevice *dev;
 	void *base;
 	struct rockchip_emmc_phy *phy;
 	struct clk emmc_clk;
 };
 
-#define PHYCTRL_CALDONE_MASK		0x1
-#define PHYCTRL_CALDONE_SHIFT		0x6
-#define PHYCTRL_CALDONE_DONE		0x1
-
-#define PHYCTRL_DLLRDY_MASK		0x1
-#define PHYCTRL_DLLRDY_SHIFT		0x5
-#define PHYCTRL_DLLRDY_DONE		0x1
-
-#define PHYCTRL_FREQSEL_200M            0x0
-#define PHYCTRL_FREQSEL_50M             0x1
-#define PHYCTRL_FREQSEL_100M            0x2
-#define PHYCTRL_FREQSEL_150M            0x3
+struct sdhci_data {
+	int (*emmc_set_clock)(struct sdhci_host *host, unsigned int clock);
+	int (*emmc_phy_init)(struct udevice *dev);
+	int (*get_phy)(struct udevice *dev);
+};
 
-#define KHz	(1000)
-#define MHz	(1000 * KHz)
+static int rk3399_emmc_phy_init(struct udevice *dev)
+{
+	return 0;
+}
 
 static void rk3399_emmc_phy_power_on(struct rockchip_emmc_phy *phy, u32 clock)
 {
@@ -124,7 +133,7 @@ static void rk3399_emmc_phy_power_off(struct rockchip_emmc_phy *phy)
 	writel(RK_CLRSETBITS(1 << 1, 0), &phy->emmcphy_con[6]);
 }
 
-static int rk3399_sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
+static int rk3399_emmc_set_clock(struct sdhci_host *host, unsigned int clock)
 {
 	unsigned int div, clk = 0, timeout;
 	unsigned int input_clk;
@@ -218,29 +227,7 @@ static int rk3399_sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
 	return 0;
 }
 
-static int arasan_sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
-{
-	struct rockchip_sdhc *priv =
-			container_of(host, struct rockchip_sdhc, host);
-	int cycle_phy = host->clock != clock &&
-			clock > EMMC_MIN_FREQ;
-
-	if (cycle_phy)
-		rk3399_emmc_phy_power_off(priv->phy);
-
-	rk3399_sdhci_set_clock(host, clock);
-
-	if (cycle_phy)
-		rk3399_emmc_phy_power_on(priv->phy, clock);
-
-	return 0;
-}
-
-static struct sdhci_ops arasan_sdhci_ops = {
-	.set_clock	= arasan_sdhci_set_clock,
-};
-
-static int arasan_get_phy(struct udevice *dev)
+static int rk3399_emmc_get_phy(struct udevice *dev)
 {
 	struct rockchip_sdhc *priv = dev_get_priv(dev);
 
@@ -268,8 +255,42 @@ static int arasan_get_phy(struct udevice *dev)
 	return 0;
 }
 
+static int rk3399_sdhci_emmc_set_clock(struct sdhci_host *host, unsigned int clock)
+{
+	struct rockchip_sdhc *priv =
+			container_of(host, struct rockchip_sdhc, host);
+	int cycle_phy = host->clock != clock &&
+			clock > EMMC_MIN_FREQ;
+
+	if (cycle_phy)
+		rk3399_emmc_phy_power_off(priv->phy);
+
+	rk3399_emmc_set_clock(host, clock);
+
+	if (cycle_phy)
+		rk3399_emmc_phy_power_on(priv->phy, clock);
+
+	return 0;
+}
+
+static int arasan_sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
+{
+	struct rockchip_sdhc *priv =
+			container_of(host, struct rockchip_sdhc, host);
+	struct sdhci_data *data = (struct sdhci_data *)dev_get_driver_data(priv->dev);
+	if (!data)
+		return -EINVAL;
+
+	return data->emmc_set_clock(host, clock);
+}
+
+static struct sdhci_ops arasan_sdhci_ops = {
+	.set_clock	= arasan_sdhci_set_clock,
+};
+
 static int arasan_sdhci_probe(struct udevice *dev)
 {
+	struct sdhci_data *data = (struct sdhci_data *)dev_get_driver_data(dev);
 	struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
 	struct rockchip_sdhc_plat *plat = dev_get_platdata(dev);
 	struct rockchip_sdhc *prv = dev_get_priv(dev);
@@ -311,7 +332,12 @@ static int arasan_sdhci_probe(struct udevice *dev)
 	}
 
 	prv->emmc_clk = clk;
-	ret = arasan_get_phy(dev);
+	prv->dev = dev;
+	ret = data->get_phy(dev);
+	if (ret)
+		return ret;
+
+	ret = data->emmc_phy_init(dev);
 	if (ret)
 		return ret;
 
@@ -355,8 +381,17 @@ static int rockchip_sdhci_bind(struct udevice *dev)
 	return sdhci_bind(dev, &plat->mmc, &plat->cfg);
 }
 
+static const struct sdhci_data arasan_data = {
+	.emmc_set_clock = rk3399_sdhci_emmc_set_clock,
+	.get_phy = rk3399_emmc_get_phy,
+	.emmc_phy_init = rk3399_emmc_phy_init,
+};
+
 static const struct udevice_id arasan_sdhci_ids[] = {
-	{ .compatible = "arasan,sdhci-5.1" },
+	{
+		.compatible = "arasan,sdhci-5.1",
+		.data = (ulong)&arasan_data,
+	},
 	{ }
 };
 

commit 71be53464f41e6fc93a6732d82d84caf5a37c8cf
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Mon Oct 26 10:34:09 2020 +0800

    rockchip: rk3568: open or gate clocks automatically when perform idle
    
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
    Change-Id: Ifb57c2f04d75a0ca925d96c423784678a609ce46

diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c
index 32adf89d12..17b4760a15 100644
--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
@@ -10,6 +10,10 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#define PMU_BASE_ADDR		0xfdd90000
+#define PMU_NOC_AUTO_CON0	(0x70)
+#define PMU_NOC_AUTO_CON1	(0x74)
+
 static struct mm_region rk3568_mem_map[] = {
 	{
 		.virt = 0x0UL,
@@ -39,5 +43,14 @@ void board_debug_uart_init(void)
 
 int arch_cpu_init(void)
 {
+#ifdef CONFIG_SPL_BUILD
+	/*
+	 * When perform idle operation, corresponding clock can
+	 * be opened or gated automatically.
+	 */
+	writel(0xffffffff, PMU_BASE_ADDR + PMU_NOC_AUTO_CON0);
+	writel(0x000f000f, PMU_BASE_ADDR + PMU_NOC_AUTO_CON1);
+#endif
+
 	return 0;
 }

commit 16a623134fd403aa91c106e7a328edeb74632916
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Sep 8 15:19:44 2020 +0800

    lib: avb: update ops functions
    
    1.read_from_partition: support read vbmeta from the partition tail.
    2.validate_public_key_for_partition: support this function
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I5372848a9339b10f5b1a66e92f5217a0a3122392

diff --git a/lib/avb/libavb_user/avb_ops_user.c b/lib/avb/libavb_user/avb_ops_user.c
index 6761c40b72..2ae6d3e884 100644
--- a/lib/avb/libavb_user/avb_ops_user.c
+++ b/lib/avb/libavb_user/avb_ops_user.c
@@ -32,6 +32,7 @@
 #include <mmc.h>
 #include <blk.h>
 #include <part.h>
+#include <stdio.h>
 #include <android_avb/avb_ops_user.h>
 #include <android_avb/libavb_ab.h>
 #include <android_avb/avb_atx_validate.h>
@@ -67,6 +68,27 @@ static void byte_to_block(int64_t *offset,
 	}
 }
 
+static AvbIOResult get_size_of_partition(AvbOps *ops,
+					 const char *partition,
+					 uint64_t *out_size_in_bytes)
+{
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: Could not find device\n", __func__);
+		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
+	}
+
+	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0) {
+		printf("Could not find \"%s\" partition\n", partition);
+		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
+	}
+	*out_size_in_bytes = (part_info.size) * 512;
+	return AVB_IO_RESULT_OK;
+}
+
 static AvbIOResult read_from_partition(AvbOps *ops,
 				       const char *partition,
 				       int64_t offset,
@@ -77,6 +99,17 @@ static AvbIOResult read_from_partition(AvbOps *ops,
 	struct blk_desc *dev_desc;
 	lbaint_t offset_blk, blkcnt;
 	disk_partition_t part_info;
+	uint64_t partition_size;
+
+	if (offset < 0) {
+		if (get_size_of_partition(ops, partition, &partition_size))
+			return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
+
+		if (-offset > partition_size)
+			return AVB_IO_RESULT_ERROR_RANGE_OUTSIDE_PARTITION;
+
+		offset = partition_size - (-offset);
+	}
 
 	byte_to_block(&offset, &num_bytes, &offset_blk, &blkcnt);
 	dev_desc = rockchip_get_bootdev();
@@ -290,27 +323,6 @@ static AvbIOResult write_is_device_unlocked(AvbOps *ops, bool *out_is_unlocked)
 	return AVB_IO_RESULT_ERROR_IO;
 }
 
-static AvbIOResult get_size_of_partition(AvbOps *ops,
-					 const char *partition,
-					 uint64_t *out_size_in_bytes)
-{
-	struct blk_desc *dev_desc;
-	disk_partition_t part_info;
-
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: Could not find device\n", __func__);
-		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
-	}
-
-	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0) {
-		printf("Could not find \"%s\" partition\n", partition);
-		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
-	}
-	*out_size_in_bytes = (part_info.size) * 512;
-	return AVB_IO_RESULT_OK;
-}
-
 static AvbIOResult get_unique_guid_for_partition(AvbOps *ops,
 						 const char *partition,
 						 char *guid_buf,
@@ -438,6 +450,34 @@ static AvbIOResult get_preloaded_partition(AvbOps* ops,
 }
 #endif
 
+AvbIOResult validate_public_key_for_partition(AvbOps *ops,
+					      const char *partition,
+					      const uint8_t *public_key_data,
+					      size_t public_key_length,
+					      const uint8_t *public_key_metadata,
+					      size_t public_key_metadata_length,
+					      bool *out_is_trusted,
+					      uint32_t *out_rollback_index_location)
+{
+/* remain AVB_VBMETA_PUBLIC_KEY_VALIDATE to compatible legacy code */
+#if defined(CONFIG_AVB_VBMETA_PUBLIC_KEY_VALIDATE) || \
+    defined(AVB_VBMETA_PUBLIC_KEY_VALIDATE)
+	if (out_is_trusted) {
+		avb_atx_validate_vbmeta_public_key(ops,
+						   public_key_data,
+						   public_key_length,
+						   public_key_metadata,
+						   public_key_metadata_length,
+						   out_is_trusted);
+	}
+#else
+	if (out_is_trusted)
+		*out_is_trusted = true;
+#endif
+	*out_rollback_index_location = 0;
+	return AVB_IO_RESULT_OK;
+}
+
 AvbOps *avb_ops_user_new(void)
 {
 	AvbOps *ops;
@@ -476,6 +516,7 @@ AvbOps *avb_ops_user_new(void)
 #ifdef CONFIG_ANDROID_BOOT_IMAGE
 	ops->get_preloaded_partition = get_preloaded_partition;
 #endif
+	ops->validate_public_key_for_partition = validate_public_key_for_partition;
 	ops->ab_ops->read_ab_metadata = avb_ab_data_read;
 	ops->ab_ops->write_ab_metadata = avb_ab_data_write;
 	ops->atx_ops->read_permanent_attributes = avb_read_perm_attr;

commit beeaf83f44795c4adb4e6b4b86003789b21db70a
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Sep 8 15:16:36 2020 +0800

    common: android: support AVB_SLOT_VERIFY_FLAGS_NO_VBMETA_PARTITION
    
    Usually, the recovery is updated alone, so attach the vbmeta to its tail.
    Pass AVB_SLOT_VERIFY_FLAGS_NO_VBMETA_PARTITION to verify the recovery.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Iaea6c8cd06f02ce946a84f8f568a7b91ef6dd40a
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index a793da3daf..d2cae4681c 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -489,6 +489,7 @@ static AvbSlotVerifyResult android_slot_verify(char *boot_partname,
 	size_t slot_index_to_boot = 0;
 	char verify_state[38] = {0};
 	char can_boot = 1;
+	char retry_no_vbmeta_partition = 1;
 	unsigned long load_address = *android_load_address;
 	struct andr_img_hdr *hdr;
 
@@ -521,6 +522,10 @@ static AvbSlotVerifyResult android_slot_verify(char *boot_partname,
 	else
 		slot_index_to_boot = 0;
 
+	if (strcmp(boot_partname, "recovery") == 0)
+		flags |= AVB_SLOT_VERIFY_FLAGS_NO_VBMETA_PARTITION;
+
+retry_verify:
 	verify_result =
 	avb_slot_verify(ops,
 			requested_partitions,
@@ -557,6 +562,16 @@ static AvbSlotVerifyResult android_slot_verify(char *boot_partname,
 		break;
 	}
 
+	if (verify_result != AVB_SLOT_VERIFY_RESULT_OK &&
+	    verify_result != AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED) {
+		if (retry_no_vbmeta_partition && strcmp(boot_partname, "recovery") == 0) {
+			printf("Verify recovery with vbmeta.\n");
+			flags &= ~AVB_SLOT_VERIFY_FLAGS_NO_VBMETA_PARTITION;
+			retry_no_vbmeta_partition = 0;
+			goto retry_verify;
+		}
+	}
+
 	if (!slot_data[0]) {
 		can_boot = 0;
 		goto out;

commit 392d4cef3452732b496631a4b4454bca2fa1d3e8
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Mon Oct 26 10:56:32 2020 +0800

    clk: rockchip: rk3568: update the clk config
    
    modify the cpll and gpll register.
    support Hpll set/get rate.
    
    Change-Id: I46b372078435bc70a34d1402d43ce2431110ddbd
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3568.c b/drivers/clk/rockchip/clk_rk3568.c
index ed636cc0bb..e00e607dbe 100644
--- a/drivers/clk/rockchip/clk_rk3568.c
+++ b/drivers/clk/rockchip/clk_rk3568.c
@@ -67,9 +67,9 @@ static struct rockchip_pll_clock rk3568_pll_clks[] = {
 		     RK3568_MODE_CON, 0, 10, 0, rk3568_pll_rates),
 	[DPLL] = PLL(pll_rk3328, PLL_DPLL, RK3568_PLL_CON(8),
 		     RK3568_MODE_CON, 2, 10, 0, NULL),
-	[CPLL] = PLL(pll_rk3328, PLL_CPLL, RK3568_PLL_CON(16),
+	[CPLL] = PLL(pll_rk3328, PLL_CPLL, RK3568_PLL_CON(24),
 		     RK3568_MODE_CON, 4, 10, 0, rk3568_pll_rates),
-	[GPLL] = PLL(pll_rk3328, PLL_HPLL, RK3568_PLL_CON(24),
+	[GPLL] = PLL(pll_rk3328, PLL_HPLL, RK3568_PLL_CON(16),
 		     RK3568_MODE_CON, 6, 10, 0, rk3568_pll_rates),
 	[NPLL] = PLL(pll_rk3328, PLL_NPLL, RK3568_PLL_CON(32),
 		     RK3568_MODE_CON, 10, 10, 0, rk3568_pll_rates),
@@ -379,6 +379,10 @@ static ulong rk3568_pmuclk_get_rate(struct clk *clk)
 		rate = rockchip_pll_get_rate(&rk3568_pll_clks[PPLL],
 					     priv->pmucru, PPLL);
 		break;
+	case PLL_HPLL:
+		rate = rockchip_pll_get_rate(&rk3568_pll_clks[HPLL],
+					     priv->pmucru, HPLL);
+		break;
 	case CLK_RTC_32K:
 	case CLK_RTC32K_FRAC:
 		rate = rk3568_rtc32k_get_pmuclk(priv);
@@ -415,6 +419,10 @@ static ulong rk3568_pmuclk_set_rate(struct clk *clk, ulong rate)
 		ret = rockchip_pll_set_rate(&rk3568_pll_clks[PPLL],
 					    priv->pmucru, PPLL, rate);
 		break;
+	case PLL_HPLL:
+		ret = rockchip_pll_set_rate(&rk3568_pll_clks[HPLL],
+					    priv->pmucru, HPLL, rate);
+		break;
 	case CLK_RTC_32K:
 	case CLK_RTC32K_FRAC:
 		ret = rk3568_rtc32k_set_pmuclk(priv, rate);

commit b50fa2962f511b63d6ca1d326dfa819d285753ee
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Oct 23 13:01:13 2020 +0800

    rockchip: dts: rk3568: Add flash devices to sfc node
    
    Change-Id: Icf0f4ac350dca388e91a6bf443c72422c4b95dd0
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/dts/rk3568-u-boot.dtsi b/arch/arm/dts/rk3568-u-boot.dtsi
index c37f435ec8..27bcc9514c 100644
--- a/arch/arm/dts/rk3568-u-boot.dtsi
+++ b/arch/arm/dts/rk3568-u-boot.dtsi
@@ -42,6 +42,34 @@
 	status = "okay";
 };
 
+&sfc {
+	u-boot,dm-spl;
+	/delete-property/ assigned-clocks;
+	/delete-property/ assigned-clock-rates;
+	status = "okay";
+
+	#address-cells = <1>;
+	#size-cells = <0>;
+	spi_nand: flash@0 {
+		u-boot,dm-spl;
+		compatible = "spi-nand";
+		reg = <0>;
+		spi-tx-bus-width = <1>;
+		spi-rx-bus-width = <4>;
+		spi-max-frequency = <96000000>;
+	};
+
+	spi_nor: flash@1 {
+		u-boot,dm-spl;
+		compatible = "jedec,spi-nor";
+		label = "sfc_nor";
+		reg = <0>;
+		spi-tx-bus-width = <1>;
+		spi-rx-bus-width = <4>;
+		spi-max-frequency = <100000000>;
+	};
+};
+
 &saradc {
 	u-boot,dm-spl;
 	status = "okay";

commit cf85037cdc17ec241a765291ae2f401ee8c3ee4a
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Oct 23 13:00:26 2020 +0800

    rockchip: dts: rk3568: Add sfc node
    
    Change-Id: Id9df11a15d16dcf39b5415674224431d277bd8e4
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/dts/rk3568.dtsi b/arch/arm/dts/rk3568.dtsi
index 4730b099d0..52eb87bea0 100644
--- a/arch/arm/dts/rk3568.dtsi
+++ b/arch/arm/dts/rk3568.dtsi
@@ -664,6 +664,17 @@
 		status = "disabled";
 	};
 
+	sfc: sfc@fe300000 {
+		compatible = "rockchip,sfc";
+		reg = <0x0 0xfe300000 0x0 0x4000>;
+		interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
+		clock-names = "clk_sfc", "hclk_sfc";
+		assigned-clocks = <&cru SCLK_SFC>;
+		assigned-clock-rates = <100000000>;
+		status = "disabled";
+	};
+
 	sdhci: sdhci@fe310000 {
 		compatible = "rockchip,dwcmshc-sdhci", "snps,dwcmshc-sdhci";
 		reg = <0x0 0xfe310000 0x0 0x10000>;

commit 516562c2d367e65e9d89296c7c8fa60d96fc39ed
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Oct 23 14:53:49 2020 +0800

    spl: mtd_blk: support get image sector address by part info
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I85d5433ce165a8b027e485c694315c492467c6d9

diff --git a/common/spl/spl_mtd_blk.c b/common/spl/spl_mtd_blk.c
index 6947d1d6bb..ba8dd33572 100644
--- a/common/spl/spl_mtd_blk.c
+++ b/common/spl/spl_mtd_blk.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <blk.h>
+#include <boot_rkimg.h>
 #include <dm.h>
 #include <errno.h>
 #include <image.h>
@@ -105,17 +106,24 @@ int spl_mtd_load_image(struct spl_image_info *spl_image,
 	struct image_header *header;
 	struct blk_desc *desc;
 	int ret = -1;
+	lbaint_t image_sector = CONFIG_MTD_BLK_U_BOOT_OFFS;
 
 	desc = find_mtd_device(spl_mtd_get_device_index(bootdev->boot_device));
 	if (!desc)
 		return -ENODEV;
 #ifdef CONFIG_SPL_LIBDISK_SUPPORT
+	disk_partition_t info;
+
 	mtd_blk_map_partitions(desc);
+	ret = part_get_info_by_name(desc, PART_UBOOT, &info);
+	if (ret > 0)
+		image_sector = info.start;
+
 #endif
 	if (IS_ENABLED(CONFIG_SPL_LOAD_FIT)) {
 		header = (struct image_header *)(CONFIG_SYS_TEXT_BASE -
 					 sizeof(struct image_header));
-		ret = blk_dread(desc, CONFIG_MTD_BLK_U_BOOT_OFFS, 1, header);
+		ret = blk_dread(desc, image_sector, 1, header);
 		if (ret != 1)
 			return -ENODEV;
 
@@ -134,7 +142,7 @@ int spl_mtd_load_image(struct spl_image_info *spl_image,
 			load.read = mtd_spl_load_read;
 
 			ret = spl_load_simple_fit(spl_image, &load,
-						  CONFIG_MTD_BLK_U_BOOT_OFFS,
+						  image_sector,
 						  header);
 		}
 	}

commit 46e7ba36f642cf0ca1abb46bd6a060139c63574f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Oct 23 17:39:27 2020 +0800

    make.sh: compatible make_fit_atf.py and make_fit_atf.sh
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ia0ec8373d1a6aaf4a68bea7eafbc0f63a050f9b4

diff --git a/make.sh b/make.sh
index 02d2616a49..a592e50080 100755
--- a/make.sh
+++ b/make.sh
@@ -641,7 +641,11 @@ function pack_uboot_itb_image()
 		cp ${SPL_FIT_SOURCE} u-boot.its
 	else
 		SPL_FIT_GENERATOR=`sed -n "/CONFIG_SPL_FIT_GENERATOR=/s/CONFIG_SPL_FIT_GENERATOR=//p" .config | tr -d '""'`
-		${SPL_FIT_GENERATOR} ${TEE_ARG} ${COMPRESSION_ARG} ${MCU_ARG} > u-boot.its
+		if [[ ${SPL_FIT_GENERATOR} == *.py ]]; then
+			${SPL_FIT_GENERATOR} u-boot.dtb > u-boot.its
+		else
+			${SPL_FIT_GENERATOR} ${TEE_ARG} ${COMPRESSION_ARG} ${MCU_ARG} > u-boot.its
+		fi
 	fi
 
 	./tools/mkimage -f u-boot.its -E u-boot.itb

commit 767626d1ad8aad2035da5d725b98ddefde90881b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Oct 23 17:34:01 2020 +0800

    rockchip: make_fit_atf.sh: fix typo
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I15230673c8a1de36dcf5105a73f8a3335e3921e8

diff --git a/arch/arm/mach-rockchip/make_fit_atf.sh b/arch/arm/mach-rockchip/make_fit_atf.sh
index dcf4785607..3acb3106fb 100755
--- a/arch/arm/mach-rockchip/make_fit_atf.sh
+++ b/arch/arm/mach-rockchip/make_fit_atf.sh
@@ -8,7 +8,7 @@
 # Process args and auto set variables
 source ./${srctree}/arch/arm/mach-rockchip/make_fit_args.sh
 
-rm -f ${srctree}/*.digest ${srctree}/*.bin.gz ${srctree}/bl31_0x*.gz
+rm -f ${srctree}/*.digest ${srctree}/*.bin.gz ${srctree}/bl31_0x*.bin
 ${srctree}/arch/arm/mach-rockchip/decode_bl31.py
 
 if [ "${COMPRESSION}" == "gzip" ]; then

commit 407bd0fb9be5c32a988b04240d6177c9227a0432
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Oct 23 15:57:16 2020 +0800

    make.sh: rm bl31.elf and tee.bin before packing itb
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Iafc924a8d559f0ed12a8fbf2a127ff23898803ec

diff --git a/make.sh b/make.sh
index b04a8f7d32..02d2616a49 100755
--- a/make.sh
+++ b/make.sh
@@ -595,6 +595,7 @@ function pack_uboot_itb_image()
 	if [ "${ARM64_TRUSTZONE}" == "y" ]; then
 		BL31_ELF=`sed -n '/_bl31_/s/PATH=//p' ${INI} | tr -d '\r'`
 		BL32_BIN=`sed -n '/_bl32_/s/PATH=//p' ${INI} | tr -d '\r'`
+		rm bl31.elf tee.bin -rf
 		cp ${RKBIN}/${BL31_ELF} bl31.elf
 		if grep BL32_OPTION -A 1 ${INI} | grep SEC=1 ; then
 			cp ${RKBIN}/${BL32_BIN} tee.bin

commit d2a405ffec2b87fa6e5fdfed59dfd3b09517a38a
Author: Sugar Zhang <sugar.zhang@rock-chips.com>
Date:   Sun Sep 27 11:43:44 2020 +0800

    configs: rv1126: Enable otp
    
    Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
    Change-Id: I9066f7f51a305a9fbcb2291c3c081942d4128975

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index 93153cc009..b2781a6272 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -101,6 +101,7 @@ CONFIG_MISC=y
 CONFIG_SPL_MISC=y
 CONFIG_MISC_DECOMPRESS=y
 CONFIG_SPL_MISC_DECOMPRESS=y
+CONFIG_ROCKCHIP_OTP=y
 CONFIG_ROCKCHIP_HW_DECOMPRESS=y
 CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS=y
 CONFIG_SPL_ROCKCHIP_SECURE_OTP_V2=y

commit d3cb8b064eed7a38b0c647cb286dc563e6df9a30
Author: Sugar Zhang <sugar.zhang@rock-chips.com>
Date:   Sun Sep 27 11:41:10 2020 +0800

    rockchip: board: Add support for cpu-id parsed from otp
    
    Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
    Change-Id: I27350a847dd13cc7d1eb0cad481adccfead23bce

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index dc58936dac..254fe9205f 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -125,22 +125,28 @@ static int rockchip_set_serialno(void)
 		env_set("serial#", serialno_str);
 	} else {
 #endif
-#ifdef CONFIG_ROCKCHIP_EFUSE
+#if defined(CONFIG_ROCKCHIP_EFUSE) || defined(CONFIG_ROCKCHIP_OTP)
 		struct udevice *dev;
 
 		/* retrieve the device */
-		ret = uclass_get_device_by_driver(UCLASS_MISC,
-						  DM_GET_DRIVER(rockchip_efuse),
-						  &dev);
+		if (IS_ENABLED(CONFIG_ROCKCHIP_EFUSE))
+			ret = uclass_get_device_by_driver(UCLASS_MISC,
+							  DM_GET_DRIVER(rockchip_efuse),
+							  &dev);
+		else
+			ret = uclass_get_device_by_driver(UCLASS_MISC,
+							  DM_GET_DRIVER(rockchip_otp),
+							  &dev);
+
 		if (ret) {
-			printf("%s: could not find efuse device\n", __func__);
+			printf("%s: could not find efuse/otp device\n", __func__);
 			return ret;
 		}
 
 		/* read the cpu_id range from the efuses */
 		ret = misc_read(dev, CPUID_OFF, &cpuid, sizeof(cpuid));
 		if (ret) {
-			printf("%s: read cpuid from efuses failed, ret=%d\n",
+			printf("%s: read cpuid from efuse/otp failed, ret=%d\n",
 			       __func__, ret);
 			return ret;
 		}

commit a4c57e8a07c4c5a8dde85a50b2506600ebf3af2f
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Tue Sep 29 17:53:27 2020 +0800

    rockchip: otp: Add support for rv1126
    
    This adds the necessary data for handling otp on the rv1126.
    
    Change-Id: Ie78ad04861ee8dca506f0bb7b851570b360694de
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/misc/rockchip-otp.c b/drivers/misc/rockchip-otp.c
index 2e3d11eb7e..f3b6c69bbf 100644
--- a/drivers/misc/rockchip-otp.c
+++ b/drivers/misc/rockchip-otp.c
@@ -9,9 +9,15 @@
 #include <dm.h>
 #include <linux/bitops.h>
 #include <linux/delay.h>
+#include <linux/iopoll.h>
 #include <misc.h>
 #include <rockchip-otp.h>
 
+struct otp_data {
+	int (*init)(struct udevice *dev);
+	int (*read)(struct udevice *dev, int offset, void *buf, int size);
+};
+
 static int rockchip_otp_wait_status(struct rockchip_otp_platdata *otp,
 				    u32 flag)
 {
@@ -91,16 +97,65 @@ read_end:
 	return ret;
 }
 
+static int rockchip_rv1126_otp_init(struct udevice *dev)
+{
+	struct rockchip_otp_platdata *otp = dev_get_platdata(dev);
+	u32 status = 0;
+	int ret;
+
+	writel(0x0, otp->base + RV1126_OTP_NVM_CEB);
+	ret = readl_poll_timeout(otp->base + RV1126_OTP_NVM_ST, status,
+				 status & 0x1, OTPC_TIMEOUT);
+	if (ret < 0) {
+		printf("%s timeout during set ceb\n", __func__);
+		return ret;
+	}
+
+	writel(0x1, otp->base + RV1126_OTP_NVM_RSTB);
+	ret = readl_poll_timeout(otp->base + RV1126_OTP_NVM_ST, status,
+				 status & 0x4, OTPC_TIMEOUT);
+	if (ret < 0) {
+		printf("%s timeout during set rstb\n", __func__);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int rockchip_rv1126_otp_read(struct udevice *dev, int offset, void *buf,
+				    int size)
+{
+	struct rockchip_otp_platdata *otp = dev_get_platdata(dev);
+	u32 status = 0;
+	u8 *buffer = buf;
+	int ret = 0;
+
+	while (size--) {
+		writel(offset++, otp->base + RV1126_OTP_NVM_RADDR);
+		writel(0x1, otp->base + RV1126_OTP_NVM_RSTART);
+		ret = readl_poll_timeout(otp->base + RV1126_OTP_READ_ST,
+					 status, status == 0, OTPC_TIMEOUT);
+		if (ret < 0) {
+			printf("%s timeout during read setup\n", __func__);
+			return ret;
+		}
+
+		*buffer++ = readb(otp->base + RV1126_OTP_NVM_RDATA);
+	}
+
+	return 0;
+}
+
 static int rockchip_otp_read(struct udevice *dev, int offset,
 			     void *buf, int size)
 {
-	OTP_READ otp_read = NULL;
+	struct otp_data *data;
 
-	otp_read = (OTP_READ)dev_get_driver_data(dev);
-	if (!otp_read)
+	data = (struct otp_data *)dev_get_driver_data(dev);
+	if (!data)
 		return -ENOSYS;
 
-	return (*otp_read)(dev, offset, buf, size);
+	return data->read(dev, offset, buf, size);
 }
 
 static const struct misc_ops rockchip_otp_ops = {
@@ -116,14 +171,41 @@ static int rockchip_otp_ofdata_to_platdata(struct udevice *dev)
 	return 0;
 }
 
+static int rockchip_otp_probe(struct udevice *dev)
+{
+	struct otp_data *data;
+
+	data = (struct otp_data *)dev_get_driver_data(dev);
+	if (!data)
+		return -EINVAL;
+
+	if (data->init)
+		return data->init(dev);
+
+	return 0;
+}
+
+static const struct otp_data px30_data = {
+	.read = rockchip_px30_otp_read,
+};
+
+static const struct otp_data rv1126_data = {
+	.init = rockchip_rv1126_otp_init,
+	.read = rockchip_rv1126_otp_read,
+};
+
 static const struct udevice_id rockchip_otp_ids[] = {
 	{
 		.compatible = "rockchip,px30-otp",
-		.data = (ulong)&rockchip_px30_otp_read,
+		.data = (ulong)&px30_data,
 	},
 	{
 		.compatible = "rockchip,rk3308-otp",
-		.data = (ulong)&rockchip_px30_otp_read,
+		.data = (ulong)&px30_data,
+	},
+	{
+		.compatible = "rockchip,rv1126-otp",
+		.data = (ulong)&rv1126_data,
 	},
 	{}
 };
@@ -135,4 +217,5 @@ U_BOOT_DRIVER(rockchip_otp) = {
 	.ops = &rockchip_otp_ops,
 	.ofdata_to_platdata = rockchip_otp_ofdata_to_platdata,
 	.platdata_auto_alloc_size = sizeof(struct rockchip_otp_platdata),
+	.probe = rockchip_otp_probe,
 };
diff --git a/include/rockchip-otp.h b/include/rockchip-otp.h
index 71fbbf5fb7..5a496c58ab 100644
--- a/include/rockchip-otp.h
+++ b/include/rockchip-otp.h
@@ -42,7 +42,20 @@
 
 #define OTPC_TIMEOUT			10000
 
-typedef int (*OTP_READ)(struct udevice *dev, int offset, void *buf, int size);
+#define RV1126_OTP_NVM_CEB		0x00
+#define RV1126_OTP_NVM_RSTB		0x04
+#define RV1126_OTP_NVM_ST		0x18
+#define RV1126_OTP_NVM_RADDR		0x1C
+#define RV1126_OTP_NVM_RSTART		0x20
+#define RV1126_OTP_NVM_RDATA		0x24
+#define RV1126_OTP_NVM_TRWH		0x28
+#define RV1126_OTP_READ_ST		0x30
+#define RV1126_OTP_NVM_PRADDR		0x34
+#define RV1126_OTP_NVM_PRLEN		0x38
+#define RV1126_OTP_NVM_PRDATA		0x3c
+#define RV1126_OTP_NVM_FAILTIME		0x40
+#define RV1126_OTP_NVM_PRSTART		0x44
+#define RV1126_OTP_NVM_PRSTATE		0x48
 
 struct rockchip_otp_platdata {
 	void __iomem *base;

commit 230491661df12761fddf3e4ed2172e15fd04657d
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Fri Oct 23 10:30:48 2020 +0800

    io-domain: rockchip: add rk3568 support
    
    Change-Id: Ic3a984043e82bd65957239acc25de79e00e1a6b8
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/drivers/power/io-domain/rockchip-io-domain.c b/drivers/power/io-domain/rockchip-io-domain.c
index e3dedddc5a..edab918b58 100644
--- a/drivers/power/io-domain/rockchip-io-domain.c
+++ b/drivers/power/io-domain/rockchip-io-domain.c
@@ -58,6 +58,10 @@
 #define RK3399_PMUGRF_CON0_VSEL		BIT(8)
 #define RK3399_PMUGRF_VSEL_SUPPLY_NUM	9
 
+#define RK3568_PMU_GRF_IO_VSEL0		(0x0124)
+#define RK3568_PMU_GRF_IO_VSEL1		(0x0128)
+#define RK3568_PMU_GRF_IO_VSEL2		(0x012C)
+
 struct rockchip_iodomain_priv;
 
 /**
@@ -79,6 +83,7 @@ struct rockchip_iodomain_priv {
 	struct regmap *regmap_base;
 	struct rockchip_iodomain_soc_data *sdata;
 	struct rockchip_iodomain_supply supplies[MAX_SUPPLIES];
+	int (*write)(struct rockchip_iodomain_supply *supply, int uV);
 };
 
 static int rockchip_ofdata_to_platdata(struct udevice *dev)
@@ -97,6 +102,47 @@ static int rockchip_ofdata_to_platdata(struct udevice *dev)
 	return 0;
 }
 
+static int rk3568_pmu_iodomain_write(struct rockchip_iodomain_supply *supply,
+				     int uV)
+{
+	struct rockchip_iodomain_priv *priv = supply->iod;
+	struct regmap *regmap = priv->regmap_base;
+	u32 is_3v3 = uV > MAX_VOLTAGE_1_8;
+	u32 val0, val1;
+	int b;
+
+	switch (supply->idx) {
+	case 0: /* pmuio1 */
+	case 1: /* pmuio2 */
+		b = supply->idx;
+		val0 = BIT(16 + b) | (is_3v3 ? 0 : BIT(b));
+		b = supply->idx + 4;
+		val1 = BIT(16 + b) | (is_3v3 ? BIT(b) : 0);
+
+		regmap_write(regmap, RK3568_PMU_GRF_IO_VSEL2, val0);
+		regmap_write(regmap, RK3568_PMU_GRF_IO_VSEL2, val1);
+		break;
+	case 2: /* vccio1 */
+	case 3: /* vccio2 */
+	case 4: /* vccio3 */
+	case 5: /* vccio4 */
+	case 6: /* vccio5 */
+	case 7: /* vccio6 */
+	case 8: /* vccio7 */
+		b = supply->idx - 1;
+		val0 = BIT(16 + b) | (is_3v3 ? 0 : BIT(b));
+		val1 = BIT(16 + b) | (is_3v3 ? BIT(b) : 0);
+
+		regmap_write(regmap, RK3568_PMU_GRF_IO_VSEL0, val0);
+		regmap_write(regmap, RK3568_PMU_GRF_IO_VSEL1, val1);
+		break;
+	default:
+		return -EINVAL;
+	};
+
+	return 0;
+}
+
 static int rockchip_iodomain_write(struct rockchip_iodomain_supply *supply,
 				   int uV)
 {
@@ -441,6 +487,21 @@ static const struct rockchip_iodomain_soc_data soc_data_rk3399_pmu = {
 	.init = rk3399_pmu_iodomain_init,
 };
 
+static const struct rockchip_iodomain_soc_data soc_data_rk3568_pmu = {
+	.grf_offset = 0x124,
+	.supply_names = {
+		"pmuio0",
+		"pmuio1",
+		"vccio1",
+		"vccio2",
+		"vccio3",
+		"vccio4",
+		"vccio5",
+		"vccio6",
+		"vccio7",
+	},
+};
+
 static const struct rockchip_iodomain_soc_data soc_data_rv1108 = {
 	.grf_offset = 0x404,
 	.supply_names = {
@@ -521,6 +582,10 @@ static int rockchip_iodomain_probe(struct udevice *dev)
 
 	sdata = (struct rockchip_iodomain_soc_data *)dev_get_driver_data(dev);
 	priv->sdata = sdata;
+	if (sdata == &soc_data_rk3568_pmu)
+		priv->write = rk3568_pmu_iodomain_write;
+	else
+		priv->write = rockchip_iodomain_write;
 
 	if (!priv->regmap_base)
 		return -1;
@@ -614,6 +679,10 @@ static const struct udevice_id rockchip_iodomain_match[] = {
 		.compatible = "rockchip,rk3399-pmu-io-voltage-domain",
 		.data = (ulong)&soc_data_rk3399_pmu
 	},
+	{
+		.compatible = "rockchip,rk3568-pmu-io-voltage-domain",
+		.data = (ulong)&soc_data_rk3568_pmu
+	},
 	{
 		.compatible = "rockchip,rv1108-io-voltage-domain",
 		.data = (ulong)&soc_data_rv1108

commit 3f4af2112bb81b2fbb68ef998edfe7ada6be0b93
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Fri Oct 23 09:45:06 2020 +0800

    pinctrl: rockchip: add rk3568 support
    
    Change-Id: Ie8c3d6f6a3909ab481241b98d3af55b26c38accc
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/drivers/pinctrl/rockchip/Makefile b/drivers/pinctrl/rockchip/Makefile
index 308b438ff0..0b1c428d99 100644
--- a/drivers/pinctrl/rockchip/Makefile
+++ b/drivers/pinctrl/rockchip/Makefile
@@ -12,5 +12,6 @@ obj-y += pinctrl-rockchip-core.o
 #obj-$(CONFIG_ROCKCHIP_RK3328) += pinctrl-rk3328.o
 #obj-$(CONFIG_ROCKCHIP_RK3368) += pinctrl-rk3368.o
 #obj-$(CONFIG_ROCKCHIP_RK3399) += pinctrl-rk3399.o
+obj-$(CONFIG_ROCKCHIP_RK3568) += pinctrl-rk3568.o
 #obj-$(CONFIG_ROCKCHIP_RV1108) += pinctrl-rv1108.o
 obj-$(CONFIG_ROCKCHIP_RV1126) += pinctrl-rv1126.o
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3568.c b/drivers/pinctrl/rockchip/pinctrl-rk3568.c
new file mode 100644
index 0000000000..c8115cb2d8
--- /dev/null
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3568.c
@@ -0,0 +1,300 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2020 Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <regmap.h>
+#include <syscon.h>
+
+#include "pinctrl-rockchip.h"
+
+static struct rockchip_mux_route_data rk3568_mux_route_data[] = {
+	MR_TOPGRF(RK_GPIO0, RK_PB3, RK_FUNC_2, 0x0300, RK_GENMASK_VAL(0, 0, 0)), /* CAN0 IO mux selection M0 */
+	MR_TOPGRF(RK_GPIO2, RK_PA1, RK_FUNC_4, 0x0300, RK_GENMASK_VAL(0, 0, 1)), /* CAN0 IO mux selection M1 */
+	MR_TOPGRF(RK_GPIO1, RK_PA1, RK_FUNC_3, 0x0300, RK_GENMASK_VAL(2, 2, 0)), /* CAN1 IO mux selection M0 */
+	MR_TOPGRF(RK_GPIO4, RK_PC3, RK_FUNC_3, 0x0300, RK_GENMASK_VAL(2, 2, 1)), /* CAN1 IO mux selection M1 */
+	MR_TOPGRF(RK_GPIO4, RK_PB5, RK_FUNC_3, 0x0300, RK_GENMASK_VAL(4, 4, 0)), /* CAN2 IO mux selection M0 */
+	MR_TOPGRF(RK_GPIO2, RK_PB2, RK_FUNC_4, 0x0300, RK_GENMASK_VAL(4, 4, 1)), /* CAN2 IO mux selection M1 */
+	MR_TOPGRF(RK_GPIO4, RK_PC4, RK_FUNC_1, 0x0300, RK_GENMASK_VAL(6, 6, 0)), /* EDPDP_HPDIN IO mux selection M0 */
+	MR_TOPGRF(RK_GPIO0, RK_PC2, RK_FUNC_2, 0x0300, RK_GENMASK_VAL(6, 6, 1)), /* EDPDP_HPDIN IO mux selection M1 */
+	MR_TOPGRF(RK_GPIO3, RK_PC0, RK_FUNC_3, 0x0300, RK_GENMASK_VAL(8, 8, 0)), /* GMAC1 IO mux selection M0 */
+	MR_TOPGRF(RK_GPIO4, RK_PC1, RK_FUNC_3, 0x0300, RK_GENMASK_VAL(8, 8, 1)), /* GMAC1 IO mux selection M1 */
+	MR_TOPGRF(RK_GPIO4, RK_PD1, RK_FUNC_1, 0x0300, RK_GENMASK_VAL(10, 10, 0)), /* HDMITX IO mux selection M0 */
+	MR_TOPGRF(RK_GPIO0, RK_PC7, RK_FUNC_1, 0x0300, RK_GENMASK_VAL(10, 10, 1)), /* HDMITX IO mux selection M1 */
+	MR_TOPGRF(RK_GPIO0, RK_PB6, RK_FUNC_1, 0x0300, RK_GENMASK_VAL(14, 14, 0)), /* I2C2 IO mux selection M0 */
+	MR_TOPGRF(RK_GPIO4, RK_PB4, RK_FUNC_1, 0x0300, RK_GENMASK_VAL(14, 14, 1)), /* I2C2 IO mux selection M1 */
+	MR_TOPGRF(RK_GPIO1, RK_PA0, RK_FUNC_1, 0x0304, RK_GENMASK_VAL(0, 0, 0)), /* I2C3 IO mux selection M0 */
+	MR_TOPGRF(RK_GPIO3, RK_PB6, RK_FUNC_4, 0x0304, RK_GENMASK_VAL(0, 0, 1)), /* I2C3 IO mux selection M1 */
+	MR_TOPGRF(RK_GPIO4, RK_PB2, RK_FUNC_1, 0x0304, RK_GENMASK_VAL(2, 2, 0)), /* I2C4 IO mux selection M0 */
+	MR_TOPGRF(RK_GPIO2, RK_PB1, RK_FUNC_2, 0x0304, RK_GENMASK_VAL(2, 2, 1)), /* I2C4 IO mux selection M1 */
+	MR_TOPGRF(RK_GPIO3, RK_PB4, RK_FUNC_4, 0x0304, RK_GENMASK_VAL(4, 4, 0)), /* I2C5 IO mux selection M0 */
+	MR_TOPGRF(RK_GPIO4, RK_PD0, RK_FUNC_2, 0x0304, RK_GENMASK_VAL(4, 4, 1)), /* I2C5 IO mux selection M1 */
+	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0304, RK_GENMASK_VAL(6, 6, 0)), /* PWM4 IO mux selection M0 */
+	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0304, RK_GENMASK_VAL(6, 6, 1)), /* PWM4 IO mux selection M1 */
+	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0304, RK_GENMASK_VAL(8, 8, 0)), /* PWM5 IO mux selection M0 */
+	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0304, RK_GENMASK_VAL(8, 8, 1)), /* PWM5 IO mux selection M1 */
+	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0304, RK_GENMASK_VAL(10, 10, 0)), /* PWM6 IO mux selection M0 */
+	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0304, RK_GENMASK_VAL(10, 10, 1)), /* PWM6 IO mux selection M1 */
+	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0304, RK_GENMASK_VAL(12, 12, 0)), /* PWM7 IO mux selection M0 */
+	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0304, RK_GENMASK_VAL(12, 12, 1)), /* PWM7 IO mux selection M1 */
+	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0304, RK_GENMASK_VAL(14, 14, 0)), /* PWM8 IO mux selection M0 */
+	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0304, RK_GENMASK_VAL(14, 14, 1)), /* PWM8 IO mux selection M1 */
+	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(0, 0, 0)), /* PWM9 IO mux selection M0 */
+	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(0, 0, 1)), /* PWM9 IO mux selection M1 */
+	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(2, 2, 0)), /* PWM10 IO mux selection M0 */
+	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(2, 2, 1)), /* PWM10 IO mux selection M1 */
+	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(4, 4, 0)), /* PWM11 IO mux selection M0 */
+	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(4, 4, 1)), /* PWM11 IO mux selection M1 */
+	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(6, 6, 0)), /* PWM12 IO mux selection M0 */
+	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(6, 6, 1)), /* PWM12 IO mux selection M1 */
+	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(8, 8, 0)), /* PWM13 IO mux selection M0 */
+	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(8, 8, 1)), /* PWM13 IO mux selection M1 */
+	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(10, 10, 0)), /* PWM14 IO mux selection M0 */
+	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(10, 10, 1)), /* PWM14 IO mux selection M1 */
+	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(12, 12, 0)), /* PWM15 IO mux selection M0 */
+	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0308, RK_GENMASK_VAL(12, 12, 1)), /* PWM15 IO mux selection M1 */
+	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_3, 0x0308, RK_GENMASK_VAL(14, 14, 0)), /* SDMMC2 IO mux selection M0 */
+	MR_TOPGRF(RK_GPIO3, RK_PA5, RK_FUNC_5, 0x0308, RK_GENMASK_VAL(14, 14, 1)), /* SDMMC2 IO mux selection M1 */
+	MR_TOPGRF(RK_GPIO0, RK_PB5, RK_FUNC_2, 0x030c, RK_GENMASK_VAL(0, 0, 0)), /* SPI0 IO mux selection M0 */
+	MR_TOPGRF(RK_GPIO2, RK_PD3, RK_FUNC_3, 0x030c, RK_GENMASK_VAL(0, 0, 1)), /* SPI0 IO mux selection M1 */
+	MR_TOPGRF(RK_GPIO2, RK_PB5, RK_FUNC_3, 0x030c, RK_GENMASK_VAL(2, 2, 0)), /* SPI1 IO mux selection M0 */
+	MR_TOPGRF(RK_GPIO3, RK_PC3, RK_FUNC_3, 0x030c, RK_GENMASK_VAL(2, 2, 1)), /* SPI1 IO mux selection M1 */
+	MR_TOPGRF(RK_GPIO2, RK_PC1, RK_FUNC_4, 0x030c, RK_GENMASK_VAL(4, 4, 0)), /* SPI2 IO mux selection M0 */
+	MR_TOPGRF(RK_GPIO3, RK_PA0, RK_FUNC_3, 0x030c, RK_GENMASK_VAL(4, 4, 1)), /* SPI2 IO mux selection M1 */
+	MR_TOPGRF(RK_GPIO4, RK_PB3, RK_FUNC_4, 0x030c, RK_GENMASK_VAL(6, 6, 0)), /* SPI3 IO mux selection M0 */
+	MR_TOPGRF(RK_GPIO4, RK_PC2, RK_FUNC_2, 0x030c, RK_GENMASK_VAL(6, 6, 1)), /* SPI3 IO mux selection M1 */
+	MR_TOPGRF(RK_GPIO2, RK_PB4, RK_FUNC_2, 0x030c, RK_GENMASK_VAL(8, 8, 0)), /* UART1 IO mux selection M0 */
+	MR_TOPGRF(RK_GPIO0, RK_PD1, RK_FUNC_1, 0x030c, RK_GENMASK_VAL(8, 8, 1)), /* UART1 IO mux selection M1 */
+	MR_TOPGRF(RK_GPIO0, RK_PD1, RK_FUNC_1, 0x030c, RK_GENMASK_VAL(10, 10, 0)), /* UART2 IO mux selection M0 */
+	MR_TOPGRF(RK_GPIO1, RK_PD5, RK_FUNC_2, 0x030c, RK_GENMASK_VAL(10, 10, 1)), /* UART2 IO mux selection M1 */
+	MR_TOPGRF(RK_GPIO1, RK_PA1, RK_FUNC_2, 0x030c, RK_GENMASK_VAL(12, 12, 0)), /* UART3 IO mux selection M0 */
+	MR_TOPGRF(RK_GPIO3, RK_PB7, RK_FUNC_4, 0x030c, RK_GENMASK_VAL(12, 12, 1)), /* UART3 IO mux selection M1 */
+	MR_TOPGRF(RK_GPIO1, RK_PA6, RK_FUNC_2, 0x030c, RK_GENMASK_VAL(14, 14, 0)), /* UART4 IO mux selection M0 */
+	MR_TOPGRF(RK_GPIO3, RK_PB2, RK_FUNC_4, 0x030c, RK_GENMASK_VAL(14, 14, 1)), /* UART4 IO mux selection M1 */
+	MR_TOPGRF(RK_GPIO2, RK_PA2, RK_FUNC_3, 0x0310, RK_GENMASK_VAL(0, 0, 0)), /* UART5 IO mux selection M0 */
+	MR_TOPGRF(RK_GPIO3, RK_PC2, RK_FUNC_4, 0x0310, RK_GENMASK_VAL(0, 0, 1)), /* UART5 IO mux selection M1 */
+	MR_TOPGRF(RK_GPIO2, RK_PA4, RK_FUNC_3, 0x0310, RK_GENMASK_VAL(2, 2, 0)), /* UART6 IO mux selection M0 */
+	MR_TOPGRF(RK_GPIO1, RK_PD5, RK_FUNC_3, 0x0310, RK_GENMASK_VAL(2, 2, 1)), /* UART6 IO mux selection M1 */
+	MR_TOPGRF(RK_GPIO2, RK_PA6, RK_FUNC_3, 0x0310, RK_GENMASK_VAL(5, 4, 0)), /* UART7 IO mux selection M0 */
+	MR_TOPGRF(RK_GPIO3, RK_PC4, RK_FUNC_4, 0x0310, RK_GENMASK_VAL(5, 4, 1)), /* UART7 IO mux selection M1 */
+	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x0310, RK_GENMASK_VAL(5, 4, 2)), /* UART7 IO mux selection M2 */
+	MR_TOPGRF(RK_GPIO2, RK_PC5, RK_FUNC_3, 0x0310, RK_GENMASK_VAL(6, 6, 0)), /* UART8 IO mux selection M0 */
+	MR_TOPGRF(RK_GPIO2, RK_PD7, RK_FUNC_4, 0x0310, RK_GENMASK_VAL(6, 6, 1)), /* UART8 IO mux selection M1 */
+	MR_TOPGRF(RK_GPIO2, RK_PB0, RK_FUNC_3, 0x0310, RK_GENMASK_VAL(9, 8, 0)), /* UART9 IO mux selection M0 */
+	MR_TOPGRF(RK_GPIO4, RK_PC5, RK_FUNC_4, 0x0310, RK_GENMASK_VAL(9, 8, 1)), /* UART9 IO mux selection M1 */
+	MR_TOPGRF(RK_GPIO4, RK_PA4, RK_FUNC_4, 0x0310, RK_GENMASK_VAL(9, 8, 2)), /* UART9 IO mux selection M2 */
+	MR_TOPGRF(RK_GPIO1, RK_PA2, RK_FUNC_1, 0x0310, RK_GENMASK_VAL(11, 10, 0)), /* I2S1 IO mux selection M0 */
+	MR_TOPGRF(RK_GPIO3, RK_PC6, RK_FUNC_4, 0x0310, RK_GENMASK_VAL(11, 10, 1)), /* I2S1 IO mux selection M1 */
+	MR_TOPGRF(RK_GPIO2, RK_PD0, RK_FUNC_5, 0x0310, RK_GENMASK_VAL(11, 10, 2)), /* I2S1 IO mux selection M2 */
+	MR_TOPGRF(RK_GPIO2, RK_PC1, RK_FUNC_1, 0x0310, RK_GENMASK_VAL(12, 12, 0)), /* I2S2 IO mux selection M0 */
+	MR_TOPGRF(RK_GPIO4, RK_PB6, RK_FUNC_5, 0x0310, RK_GENMASK_VAL(12, 12, 1)), /* I2S2 IO mux selection M1 */
+	MR_TOPGRF(RK_GPIO3, RK_PA2, RK_FUNC_4, 0x0310, RK_GENMASK_VAL(14, 14, 0)), /* I2S3 IO mux selection M0 */
+	MR_TOPGRF(RK_GPIO4, RK_PC2, RK_FUNC_5, 0x0310, RK_GENMASK_VAL(14, 14, 1)), /* I2S3 IO mux selection M1 */
+	MR_TOPGRF(RK_GPIO1, RK_PA6, RK_FUNC_3, 0x0314, RK_GENMASK_VAL(0, 0, 0)), /* PDM IO mux selection M0 */
+	MR_TOPGRF(RK_GPIO3, RK_PD6, RK_FUNC_5, 0x0314, RK_GENMASK_VAL(0, 0, 1)), /* PDM IO mux selection M1 */
+	MR_TOPGRF(RK_GPIO0, RK_PA5, RK_FUNC_3, 0x0314, RK_GENMASK_VAL(3, 2, 0)), /* PCIE20 IO mux selection M0 */
+	MR_TOPGRF(RK_GPIO2, RK_PD0, RK_FUNC_4, 0x0314, RK_GENMASK_VAL(3, 2, 1)), /* PCIE20 IO mux selection M1 */
+	MR_TOPGRF(RK_GPIO1, RK_PB0, RK_FUNC_4, 0x0314, RK_GENMASK_VAL(3, 2, 2)), /* PCIE20 IO mux selection M2 */
+	MR_TOPGRF(RK_GPIO0, RK_PA4, RK_FUNC_3, 0x0314, RK_GENMASK_VAL(5, 4, 0)), /* PCIE30X1 IO mux selection M0 */
+	MR_TOPGRF(RK_GPIO2, RK_PD2, RK_FUNC_4, 0x0314, RK_GENMASK_VAL(5, 4, 1)), /* PCIE30X1 IO mux selection M1 */
+	MR_TOPGRF(RK_GPIO1, RK_PA5, RK_FUNC_4, 0x0314, RK_GENMASK_VAL(5, 4, 2)), /* PCIE30X1 IO mux selection M2 */
+	MR_TOPGRF(RK_GPIO0, RK_PA6, RK_FUNC_2, 0x0314, RK_GENMASK_VAL(7, 6, 0)), /* PCIE30X2 IO mux selection M0 */
+	MR_TOPGRF(RK_GPIO2, RK_PD4, RK_FUNC_4, 0x0314, RK_GENMASK_VAL(7, 6, 1)), /* PCIE30X2 IO mux selection M1 */
+	MR_TOPGRF(RK_GPIO4, RK_PC2, RK_FUNC_4, 0x0314, RK_GENMASK_VAL(7, 6, 2)), /* PCIE30X2 IO mux selection M2 */
+};
+
+
+static int rk3568_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	int iomux_num = (pin / 8);
+	struct regmap *regmap;
+	int reg, ret, mask;
+	u8 bit;
+	u32 data;
+
+	debug("setting mux of GPIO%d-%d to %d\n", bank->bank_num, pin, mux);
+
+	if (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
+		regmap = priv->regmap_pmu;
+	else
+		regmap = priv->regmap_base;
+
+	reg = bank->iomux[iomux_num].offset;
+	if ((pin % 8) >= 4)
+		reg += 0x4;
+	bit = (pin % 4) * 4;
+	mask = 0xf;
+
+	data = (mask << (bit + 16));
+	data |= (mux & mask) << bit;
+	ret = regmap_write(regmap, reg, data);
+
+	return ret;
+}
+
+#define RK3568_PULL_GRF_OFFSET		0x20
+#define RK3568_PULL_PMU_OFFSET		0x80
+#define RK3568_PULL_BITS_PER_PIN	2
+#define RK3568_PULL_PINS_PER_REG	8
+#define RK3568_PULL_BANK_STRIDE		0x10
+
+static void rk3568_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
+					 int pin_num, struct regmap **regmap,
+					 int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *info = bank->priv;
+
+	if (bank->bank_num == 0) {
+		*regmap = info->regmap_pmu;
+		*reg = RK3568_PULL_PMU_OFFSET;
+		*reg += bank->bank_num * RK3568_PULL_BANK_STRIDE;
+		*reg += ((pin_num / RK3568_PULL_PINS_PER_REG) * 4);
+
+		*bit = pin_num % RK3568_PULL_PINS_PER_REG;
+		*bit *= RK3568_PULL_BITS_PER_PIN;
+	} else {
+		*regmap = info->regmap_base;
+		*reg = RK3568_PULL_GRF_OFFSET;
+		*reg += (bank->bank_num - 1) * RK3568_PULL_BANK_STRIDE;
+		*reg += ((pin_num / RK3568_PULL_PINS_PER_REG) * 4);
+
+		*bit = (pin_num % RK3568_PULL_PINS_PER_REG);
+		*bit *= RK3568_PULL_BITS_PER_PIN;
+	}
+}
+
+#define RK3568_DRV_PMU_OFFSET		0x70
+#define RK3568_DRV_GRF_OFFSET		0x200
+#define RK3568_DRV_BITS_PER_PIN		8
+#define RK3568_DRV_PINS_PER_REG		2
+#define RK3568_DRV_BANK_STRIDE		0x40
+
+static void rk3568_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
+					int pin_num, struct regmap **regmap,
+					int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *info = bank->priv;
+
+	/* The first 32 pins of the first bank are located in PMU */
+	if (bank->bank_num == 0) {
+		*regmap = info->regmap_pmu;
+		*reg = RK3568_DRV_PMU_OFFSET;
+		*reg += ((pin_num / RK3568_DRV_PINS_PER_REG) * 4);
+
+		*bit = pin_num % RK3568_DRV_PINS_PER_REG;
+		*bit *= RK3568_DRV_BITS_PER_PIN;
+	} else {
+		*regmap = info->regmap_base;
+		*reg = RK3568_DRV_GRF_OFFSET;
+		*reg += (bank->bank_num - 1) * RK3568_DRV_BANK_STRIDE;
+		*reg += ((pin_num / RK3568_DRV_PINS_PER_REG) * 4);
+
+		*bit = (pin_num % RK3568_DRV_PINS_PER_REG);
+		*bit *= RK3568_DRV_BITS_PER_PIN;
+	}
+}
+
+static int rk3568_set_pull(struct rockchip_pin_bank *bank,
+			   int pin_num, int pull)
+{
+	struct regmap *regmap;
+	int reg, ret;
+	u8 bit, type;
+	u32 data;
+
+	if (pull == PIN_CONFIG_BIAS_PULL_PIN_DEFAULT)
+		return -ENOTSUPP;
+
+	rk3568_calc_pull_reg_and_bit(bank, pin_num, &regmap, &reg, &bit);
+	type = bank->pull_type[pin_num / 8];
+	ret = rockchip_translate_pull_value(type, pull);
+	if (ret < 0) {
+		debug("unsupported pull setting %d\n", pull);
+		return ret;
+	}
+
+	/* enable the write to the equivalent lower bits */
+	data = ((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << (bit + 16);
+
+	data |= (ret << bit);
+	ret = regmap_write(regmap, reg, data);
+
+	return ret;
+}
+
+static int rk3568_set_drive(struct rockchip_pin_bank *bank,
+			    int pin_num, int strength)
+{
+	struct regmap *regmap;
+	int reg;
+	u32 data;
+	u8 bit;
+
+	rk3568_calc_drv_reg_and_bit(bank, pin_num, &regmap, &reg, &bit);
+
+	/* enable the write to the equivalent lower bits */
+	data = ((1 << RK3568_DRV_BITS_PER_PIN) - 1) << (bit + 16);
+	data |= (strength << bit);
+
+	return regmap_write(regmap, reg, data);
+}
+
+static struct rockchip_pin_bank rk3568_pin_banks[] = {
+	PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", IOMUX_SOURCE_PMU | IOMUX_WIDTH_4BIT,
+			     IOMUX_SOURCE_PMU | IOMUX_WIDTH_4BIT,
+			     IOMUX_SOURCE_PMU | IOMUX_WIDTH_4BIT,
+			     IOMUX_SOURCE_PMU | IOMUX_WIDTH_4BIT),
+	PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1", IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT),
+	PIN_BANK_IOMUX_FLAGS(2, 32, "gpio2", IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT),
+	PIN_BANK_IOMUX_FLAGS(3, 32, "gpio3", IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT),
+	PIN_BANK_IOMUX_FLAGS(4, 32, "gpio4", IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT),
+};
+
+static const struct rockchip_pin_ctrl rk3568_pin_ctrl = {
+	.pin_banks		= rk3568_pin_banks,
+	.nr_banks		= ARRAY_SIZE(rk3568_pin_banks),
+	.nr_pins		= 160,
+	.grf_mux_offset		= 0x0,
+	.pmu_mux_offset		= 0x0,
+	.iomux_routes		= rk3568_mux_route_data,
+	.niomux_routes		= ARRAY_SIZE(rk3568_mux_route_data),
+	.set_mux		= rk3568_set_mux,
+	.set_pull		= rk3568_set_pull,
+	.set_drive		= rk3568_set_drive,
+};
+
+static const struct udevice_id rk3568_pinctrl_ids[] = {
+	{
+		.compatible = "rockchip,rk3568-pinctrl",
+		.data = (ulong)&rk3568_pin_ctrl
+	},
+	{ }
+};
+
+U_BOOT_DRIVER(pinctrl_rk3568) = {
+	.name		= "rockchip_rk3568_pinctrl",
+	.id		= UCLASS_PINCTRL,
+	.of_match	= rk3568_pinctrl_ids,
+	.priv_auto_alloc_size = sizeof(struct rockchip_pinctrl_priv),
+	.ops		= &rockchip_pinctrl_ops,
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	.bind		= dm_scan_fdt_dev,
+#endif
+	.probe		= rockchip_pinctrl_probe,
+};

commit e8885e2486caea6bd420f2af4751e670a43357f1
Author: CanYang He <hcy@rock-chips.com>
Date:   Fri Oct 23 11:17:28 2020 +0800

    drivers: ram: rv1126: dram 32bit interface use pageclose
    
    after system test, 32bit interface use pageclose can improve
    performance, 16bit interface not improve.
    
    Change-Id: Iecac7aae1e5f8ec4f162200d80be16f1b91180f5
    Signed-off-by: CanYang He <hcy@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
index 052208ae2e..dc45bf9a67 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -2194,6 +2194,12 @@ static int sdram_init_(struct dram_info *dram,
 	pctl_cfg(dram->pctl, &sdram_params->pctl_regs,
 		 dram->sr_idle, dram->pd_idle);
 
+	if (sdram_params->ch.cap_info.bw == 2)
+		/* 32bit interface use pageclose */
+		setbits_le32(pctl_base + DDR_PCTL2_SCHED, 1 << 2);
+	else
+		clrbits_le32(pctl_base + DDR_PCTL2_SCHED, 1 << 2);
+
 #ifdef CONFIG_ROCKCHIP_DRAM_EXTENDED_TEMP_SUPPORT
 	u32 tmp, trefi;
 

commit da1862e9657d9dc108ff0bf47945f5ea395ab4d6
Author: YouMin Chen <cym@rock-chips.com>
Date:   Thu Oct 22 18:06:06 2020 +0800

    drivers: ram: rv1126: fix the timing about noc burstpenalty
    
    Change-Id: I1ce56c57f8798dfc4fbefd68d47fbe97de6c390a
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
index b949b41b01..052208ae2e 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -2014,7 +2014,7 @@ static void update_noc_timing(struct dram_info *dram,
 		sdram_params->ch.noc_timings.ddrmode.b.burstsize = 3;
 
 	sdram_params->ch.noc_timings.ddrtimingc0.b.burstpenalty =
-		(bw == 32) ? 2 : ((bw == 16) ? 4 : 8);
+		(bl * bw / 8) > 16 ? (bl / 4) : (16 / (bl * bw / 8)) * bl / 4;
 
 	if (sdram_params->base.dramtype == LPDDR4) {
 		sdram_params->ch.noc_timings.ddrmode.b.mwrsize =

commit 656558394a595f9e246015c7013f7147f78e763c
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Oct 23 14:17:29 2020 +0800

    cmd: bootfit: add slot info to bootargs
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Iac5eb54568c03239183425ef8ac9c51f7d774cd6

diff --git a/cmd/bootfit.c b/cmd/bootfit.c
index 827848c388..25b088bd10 100644
--- a/cmd/bootfit.c
+++ b/cmd/bootfit.c
@@ -95,6 +95,14 @@ static int do_boot_fit(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 	printf("at %s with size 0x%08lx\n", fit_addr, size);
 
 #ifdef CONFIG_ANDROID_AB
+	char slot_suffix[3] = {0};
+	char slot_info[21] = "android_slotsufix=";
+
+	if (ab_get_slot_suffix(slot_suffix))
+		goto out;
+
+	strcat(slot_info, slot_suffix);
+	env_update("bootargs", slot_info);
 	ab_update_root_uuid();
 	if (ab_decrease_tries())
 		printf("Decrease ab tries count fail!\n");

commit d2fb2f92b0046a3d9c67de4fd5e8df781b115617
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Oct 22 15:54:13 2020 +0800

    configs: add rk3568_defconfig
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I2b0efd05fbedb0098db92405824536591fb79a6b

diff --git a/configs/rk3568_defconfig b/configs/rk3568_defconfig
new file mode 100644
index 0000000000..c1d2ff7dee
--- /dev/null
+++ b/configs/rk3568_defconfig
@@ -0,0 +1,108 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x80000
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.sh"
+CONFIG_ROCKCHIP_RK3568=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_ROCKCHIP_FIT_IMAGE=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_TARGET_EVB_RK3568=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3568-evb"
+CONFIG_SMBIOS_PRODUCT_NAME=""
+CONFIG_DEBUG_UART=y
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_FIT=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_BOOTDELAY=0
+CONFIG_CONSOLE_MUX=y
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_SPL_BOARD_INIT=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_SPL_SHA256_SUPPORT=y
+CONFIG_SPL_CRYPTO_SUPPORT=y
+CONFIG_SPL_HASH_SUPPORT=y
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set
+CONFIG_CMD_DTIMG=y
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_LZMADEC is not set
+# CONFIG_CMD_UNZIP is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPT=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_ITEST is not set
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_MISC is not set
+# CONFIG_CMD_CHARGE_DISPLAY is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+# CONFIG_NET_TFTP_VARS is not set
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_ROCKCHIP_GPIO_V2=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_ADC_KEY=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_SF_DEFAULT_SPEED=20000000
+CONFIG_PHYLIB=y
+CONFIG_PHY=y
+CONFIG_PINCTRL=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_DM_CHARGE_DISPLAY=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_SPL_DM_RESET=y
+CONFIG_SPL_RESET_ROCKCHIP=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0xFE660000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYSRESET=y
+CONFIG_I2C_EDID=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_LIB_RAND=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_RSA=y
+CONFIG_SPL_RSA=y
+CONFIG_SHA512=y
+CONFIG_LZ4=y
+CONFIG_SPL_GZIP=y
+CONFIG_ERRNO_STR=y

commit 7e26af3867078dd5ef0709f27ed7a74afa7aa6a2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Oct 22 15:53:14 2020 +0800

    rockchip: add rk3568 SoC support
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I2e163b93d4ec5a60f1ff9c589626d3ccd994f854

diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3568.h b/arch/arm/include/asm/arch-rockchip/grf_rk3568.h
new file mode 100644
index 0000000000..1b672e7348
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3568.h
@@ -0,0 +1,399 @@
+/*
+ * (C) Copyright 2020 Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#ifndef _ASM_ARCH_GRF_RK3568_H
+#define _ASM_ARCH_GRF_RK3568_H
+
+#include <common.h>
+
+struct rk3568_grf {
+	unsigned int gpio1a_iomux_l;
+	unsigned int gpio1a_iomux_h;
+	unsigned int gpio1b_iomux_l;
+	unsigned int gpio1b_iomux_h;
+	unsigned int gpio1c_iomux_l;
+	unsigned int gpio1c_iomux_h;
+	unsigned int gpio1d_iomux_l;
+	unsigned int gpio1d_iomux_h;
+	unsigned int gpio2a_iomux_l;
+	unsigned int gpio2a_iomux_h;
+	unsigned int gpio2b_iomux_l;
+	unsigned int gpio2b_iomux_h;
+	unsigned int gpio2c_iomux_l;
+	unsigned int gpio2c_iomux_h;
+	unsigned int gpio2d_iomux_l;
+	unsigned int gpio2d_iomux_h;
+	unsigned int gpio3a_iomux_l;
+	unsigned int gpio3a_iomux_h;
+	unsigned int gpio3b_iomux_l;
+	unsigned int gpio3b_iomux_h;
+	unsigned int gpio3c_iomux_l;
+	unsigned int gpio3c_iomux_h;
+	unsigned int gpio3d_iomux_l;
+	unsigned int gpio3d_iomux_h;
+	unsigned int gpio4a_iomux_l;
+	unsigned int gpio4a_iomux_h;
+	unsigned int gpio4b_iomux_l;
+	unsigned int gpio4b_iomux_h;
+	unsigned int gpio4c_iomux_l;
+	unsigned int gpio4c_iomux_h;
+	unsigned int gpio4d_iomux_l;
+	unsigned int reserved0[(0x0080 - 0x0078) / 4 - 1];
+	unsigned int gpio1a_p;
+	unsigned int gpio1b_p;
+	unsigned int gpio1c_p;
+	unsigned int gpio1d_p;
+	unsigned int gpio2a_p;
+	unsigned int gpio2b_p;
+	unsigned int gpio2c_p;
+	unsigned int gpio2d_p;
+	unsigned int gpio3a_p;
+	unsigned int gpio3b_p;
+	unsigned int gpio3c_p;
+	unsigned int gpio3d_p;
+	unsigned int gpio4a_p;
+	unsigned int gpio4b_p;
+	unsigned int gpio4c_p;
+	unsigned int gpio4d_p;
+	unsigned int gpio1a_ie;
+	unsigned int gpio1b_ie;
+	unsigned int gpio1c_ie;
+	unsigned int gpio1d_ie;
+	unsigned int gpio2a_ie;
+	unsigned int gpio2b_ie;
+	unsigned int gpio2c_ie;
+	unsigned int gpio2d_ie;
+	unsigned int gpio3a_ie;
+	unsigned int gpio3b_ie;
+	unsigned int gpio3c_ie;
+	unsigned int gpio3d_ie;
+	unsigned int gpio4a_ie;
+	unsigned int gpio4b_ie;
+	unsigned int gpio4c_ie;
+	unsigned int gpio4d_ie;
+	unsigned int gpio1a_opd;
+	unsigned int gpio1b_opd;
+	unsigned int gpio1c_opd;
+	unsigned int gpio1d_opd;
+	unsigned int gpio2a_opd;
+	unsigned int gpio2b_opd;
+	unsigned int gpio2c_opd;
+	unsigned int gpio2d_opd;
+	unsigned int gpio3a_opd;
+	unsigned int gpio3b_opd;
+	unsigned int gpio3c_opd;
+	unsigned int gpio3d_opd;
+	unsigned int gpio4a_opd;
+	unsigned int gpio4b_opd;
+	unsigned int gpio4c_opd;
+	unsigned int gpio4d_opd;
+	unsigned int gpio1a_sus;
+	unsigned int gpio1b_sus;
+	unsigned int gpio1c_sus;
+	unsigned int gpio1d_sus;
+	unsigned int gpio2a_sus;
+	unsigned int gpio2b_sus;
+	unsigned int gpio2c_sus;
+	unsigned int gpio2d_sus;
+	unsigned int gpio3a_sus;
+	unsigned int gpio3b_sus;
+	unsigned int gpio3c_sus;
+	unsigned int gpio3d_sus;
+	unsigned int gpio4a_sus;
+	unsigned int gpio4b_sus;
+	unsigned int gpio4c_sus;
+	unsigned int gpio4d_sus;
+	unsigned int gpio1a_sl;
+	unsigned int gpio1b_sl;
+	unsigned int gpio1c_sl;
+	unsigned int gpio1d_sl;
+	unsigned int gpio2a_sl;
+	unsigned int gpio2b_sl;
+	unsigned int gpio2c_sl;
+	unsigned int gpio2d_sl;
+	unsigned int gpio3a_sl;
+	unsigned int gpio3b_sl;
+	unsigned int gpio3c_sl;
+	unsigned int gpio3d_sl;
+	unsigned int gpio4a_sl;
+	unsigned int gpio4b_sl;
+	unsigned int gpio4c_sl;
+	unsigned int gpio4d_sl;
+	unsigned int reserved1[(0x0200 - 0x01bc) / 4 - 1];
+	unsigned int gpio1a_ds_0;
+	unsigned int gpio1a_ds_1;
+	unsigned int gpio1a_ds_2;
+	unsigned int gpio1a_ds_3;
+	unsigned int gpio1b_ds_0;
+	unsigned int gpio1b_ds_1;
+	unsigned int gpio1b_ds_2;
+	unsigned int gpio1b_ds_3;
+	unsigned int gpio1c_ds_0;
+	unsigned int gpio1c_ds_1;
+	unsigned int gpio1c_ds_2;
+	unsigned int gpio1c_ds_3;
+	unsigned int gpio1d_ds_0;
+	unsigned int gpio1d_ds_1;
+	unsigned int gpio1d_ds_2;
+	unsigned int gpio1d_ds_3;
+	unsigned int gpio2a_ds_0;
+	unsigned int gpio2a_ds_1;
+	unsigned int gpio2a_ds_2;
+	unsigned int gpio2a_ds_3;
+	unsigned int gpio2b_ds_0;
+	unsigned int gpio2b_ds_1;
+	unsigned int gpio2b_ds_2;
+	unsigned int gpio2b_ds_3;
+	unsigned int gpio2c_ds_0;
+	unsigned int gpio2c_ds_1;
+	unsigned int gpio2c_ds_2;
+	unsigned int gpio2c_ds_3;
+	unsigned int gpio2d_ds_0;
+	unsigned int gpio2d_ds_1;
+	unsigned int gpio2d_ds_2;
+	unsigned int gpio2d_ds_3;
+	unsigned int gpio3a_ds_0;
+	unsigned int gpio3a_ds_1;
+	unsigned int gpio3a_ds_2;
+	unsigned int gpio3a_ds_3;
+	unsigned int gpio3b_ds_0;
+	unsigned int gpio3b_ds_1;
+	unsigned int gpio3b_ds_2;
+	unsigned int gpio3b_ds_3;
+	unsigned int gpio3c_ds_0;
+	unsigned int gpio3c_ds_1;
+	unsigned int gpio3c_ds_2;
+	unsigned int gpio3c_ds_3;
+	unsigned int gpio3d_ds_0;
+	unsigned int gpio3d_ds_1;
+	unsigned int gpio3d_ds_2;
+	unsigned int gpio3d_ds_3;
+	unsigned int gpio4a_ds_0;
+	unsigned int gpio4a_ds_1;
+	unsigned int gpio4a_ds_2;
+	unsigned int gpio4a_ds_3;
+	unsigned int gpio4b_ds_0;
+	unsigned int gpio4b_ds_1;
+	unsigned int gpio4b_ds_2;
+	unsigned int gpio4b_ds_3;
+	unsigned int gpio4c_ds_0;
+	unsigned int gpio4c_ds_1;
+	unsigned int gpio4c_ds_2;
+	unsigned int gpio4c_ds_3;
+	unsigned int gpio4d_ds_0;
+	unsigned int gpio4d_ds_1;
+	unsigned int gpio4d_ds_2;
+	unsigned int gpio4d_ds_3;
+	unsigned int iofunc_sel0;
+	unsigned int iofunc_sel1;
+	unsigned int iofunc_sel2;
+	unsigned int iofunc_sel3;
+	unsigned int iofunc_sel4;
+	unsigned int iofunc_sel5;
+	unsigned int reserved2[(0x0340 - 0x0314) / 4 - 1];
+	unsigned int vi_con0;
+	unsigned int vi_con1;
+	unsigned int vi_status0;
+	unsigned int reserved3[(0x0360 - 0x0348) / 4 - 1];
+	unsigned int vo_con0;
+	unsigned int vo_con1;
+	unsigned int vo_con2;
+	unsigned int vo_con3;
+	unsigned int reserved4[(0x0380 - 0x036c) / 4 - 1];
+	unsigned int mac0_con0;
+	unsigned int mac0_con1;
+	unsigned int mac1_con0;
+	unsigned int mac1_con1;
+	unsigned int reserved5[(0x03a0 - 0x038c) / 4 - 1];
+	unsigned int biu_con0;
+	unsigned int biu_con1;
+	unsigned int biu_con2;
+	unsigned int reserved6[(0x03c0 - 0x03a8) / 4 - 1];
+	unsigned int gic_con0;
+	unsigned int gic_con1;
+	unsigned int gic_con2;
+	unsigned int reserved7[(0x03f0 - 0x03c8) / 4 - 1];
+	unsigned int gpu_con0;
+	unsigned int gpu_con1;
+	unsigned int reserved8[(0x0400 - 0x03f4) / 4 - 1];
+	unsigned int cpu_con0;
+	unsigned int reserved9[(0x0420 - 0x0400) / 4 - 1];
+	unsigned int cpu_status0;
+	unsigned int reserved10[(0x0500 - 0x0420) / 4 - 1];
+	unsigned int soc_con0;
+	unsigned int soc_con1;
+	unsigned int soc_con2;
+	unsigned int soc_con3;
+	unsigned int reserved11[(0x0514 - 0x050c) / 4 - 1];
+	unsigned int soc_con5;
+	unsigned int soc_con6;
+	unsigned int reserved12[(0x0580 - 0x0518) / 4 - 1];
+	unsigned int soc_status0;
+	unsigned int reserved13[(0x05c0 - 0x0580) / 4 - 1];
+	unsigned int ram_con;
+	unsigned int core_ram_con;
+	unsigned int reserved14[(0x0600 - 0x05c4) / 4 - 1];
+	unsigned int tsadc_con;
+	unsigned int reserved15[(0x0610 - 0x0600) / 4 - 1];
+	unsigned int saradc_con;
+	unsigned int reserved16[(0x0700 - 0x0610) / 4 - 1];
+	unsigned int gpupvtpll_con0;
+	unsigned int gpupvtpll_con1;
+	unsigned int gpupvtpll_con2;
+	unsigned int gpupvtpll_con3;
+	unsigned int reserved17[(0x0740 - 0x070c) / 4 - 1];
+	unsigned int npupvtpll_con0;
+	unsigned int npupvtpll_con1;
+	unsigned int npupvtpll_con2;
+	unsigned int npupvtpll_con3;
+	unsigned int reserved18[(0x0800 - 0x074c) / 4 - 1];
+	unsigned int chip_id;
+	unsigned int reserved19[(0x0840 - 0x0800) / 4 - 1];
+	unsigned int gpio1c5_ds;
+	unsigned int gpio2a2_ds;
+	unsigned int gpio2b0_ds;
+	unsigned int gpio3a0_ds;
+	unsigned int gpio3a6_ds;
+	unsigned int gpio4a0_ds;
+	unsigned int reserved20[(0x0900 - 0x0854) / 4 - 1];
+	unsigned int dmac0_con0;
+	unsigned int dmac0_con1;
+	unsigned int dmac0_con2;
+	unsigned int dmac0_con3;
+	unsigned int dmac0_con4;
+	unsigned int dmac0_con5;
+	unsigned int dmac0_con6;
+	unsigned int dmac0_con7;
+	unsigned int dmac0_con8;
+	unsigned int dmac0_con9;
+	unsigned int reserved21[(0x0940 - 0x0924) / 4 - 1];
+	unsigned int dmac1_con0;
+	unsigned int dmac1_con1;
+	unsigned int dmac1_con2;
+	unsigned int dmac1_con3;
+	unsigned int dmac1_con4;
+	unsigned int dmac1_con5;
+	unsigned int dmac1_con6;
+	unsigned int dmac1_con7;
+	unsigned int dmac1_con8;
+	unsigned int dmac1_con9;
+};
+
+check_member(rk3568_grf, dmac1_con9, 0x0964);
+
+struct rk3568_pmugrf {
+	unsigned int pmu_gpio0a_iomux_l;
+	unsigned int pmu_gpio0a_iomux_h;
+	unsigned int pmu_gpio0b_iomux_l;
+	unsigned int pmu_gpio0b_iomux_h;
+	unsigned int pmu_gpio0c_iomux_l;
+	unsigned int pmu_gpio0c_iomux_h;
+	unsigned int pmu_gpio0d_iomux_l;
+	unsigned int reserved0[(0x0020 - 0x0018) / 4 - 1];
+	unsigned int pmu_gpio0a_p;
+	unsigned int pmu_gpio0b_p;
+	unsigned int pmu_gpio0c_p;
+	unsigned int pmu_gpio0d_p;
+	unsigned int pmu_gpio0a_ie;
+	unsigned int pmu_gpio0b_ie;
+	unsigned int pmu_gpio0c_ie;
+	unsigned int pmu_gpio0d_ie;
+	unsigned int pmu_gpio0a_opd;
+	unsigned int pmu_gpio0b_opd;
+	unsigned int pmu_gpio0c_opd;
+	unsigned int pmu_gpio0d_opd;
+	unsigned int pmu_gpio0a_sus;
+	unsigned int pmu_gpio0b_sus;
+	unsigned int pmu_gpio0c_sus;
+	unsigned int pmu_gpio0d_sus;
+	unsigned int pmu_gpio0a_sl;
+	unsigned int pmu_gpio0b_sl;
+	unsigned int pmu_gpio0c_sl;
+	unsigned int pmu_gpio0d_sl;
+	unsigned int pmu_gpio0a_ds_0;
+	unsigned int pmu_gpio0a_ds_1;
+	unsigned int pmu_gpio0a_ds_2;
+	unsigned int pmu_gpio0a_ds_3;
+	unsigned int pmu_gpio0b_ds_0;
+	unsigned int pmu_gpio0b_ds_1;
+	unsigned int pmu_gpio0b_ds_2;
+	unsigned int pmu_gpio0b_ds_3;
+	unsigned int pmu_gpio0c_ds_0;
+	unsigned int pmu_gpio0c_ds_1;
+	unsigned int pmu_gpio0c_ds_2;
+	unsigned int pmu_gpio0c_ds_3;
+	unsigned int pmu_gpio0d_ds_0;
+	unsigned int pmu_gpio0d_ds_1;
+	unsigned int pmu_gpio0d_ds_2;
+	unsigned int pmu_gpio0d_ds_3;
+	unsigned int reserved1[(0x0100 - 0x00ac) / 4 - 1];
+	unsigned int pmu_soc_con0;
+	unsigned int pmu_soc_con1;
+	unsigned int pmu_soc_con2;
+	unsigned int pmu_soc_con3;
+	unsigned int pmu_soc_con4;
+	unsigned int pmu_soc_con5;
+	unsigned int reserved2[(0x0124 - 0x0114) / 4 - 1];
+	unsigned int pmu_io_vsel0;
+	unsigned int pmu_io_vsel1;
+	unsigned int pmu_io_vsel2;
+	unsigned int reserved3[(0x0180 - 0x012c) / 4 - 1];
+	unsigned int pmu_dll_con0;
+	unsigned int reserved4[(0x0200 - 0x0180) / 4 - 1];
+	unsigned int pmu_os_reg0;
+	unsigned int pmu_os_reg1;
+	unsigned int pmu_os_reg2;
+	unsigned int pmu_os_reg3;
+	unsigned int pmu_os_reg4;
+	unsigned int pmu_os_reg5;
+	unsigned int pmu_os_reg6;
+	unsigned int pmu_os_reg7;
+	unsigned int pmu_os_reg8;
+	unsigned int pmu_os_reg9;
+	unsigned int pmu_os_reg10;
+	unsigned int pmu_os_reg11;
+	unsigned int pmu_reset_function_status;
+	unsigned int pmu_reset_function_clr;
+	unsigned int reserved5[(0x0380 - 0x0234) / 4 - 1];
+	unsigned int pmu_sig_detect_con;
+	unsigned int reserved6[(0x0390 - 0x0380) / 4 - 1];
+	unsigned int pmu_sig_detect_status;
+	unsigned int reserved7[(0x03a0 - 0x0390) / 4 - 1];
+	unsigned int pmu_sig_detect_status_clear;
+	unsigned int reserved8[(0x03b0 - 0x03a0) / 4 - 1];
+	unsigned int pmu_sdmmc_det_counter;
+};
+
+check_member(rk3568_pmugrf, pmu_sdmmc_det_counter, 0x03b0);
+
+struct rk3568_ddrgrf {
+	unsigned int ddr_con0;
+	unsigned int ddr_con1;
+	unsigned int ddr_con2;
+	unsigned int ddr_con3;
+	unsigned int ddr_con4;
+	unsigned int ddr_split_con;
+	unsigned int reserved0[(0x0020 - 0x0014) / 4 - 1];
+	unsigned int ddr_lp_con;
+	unsigned int reserved1[(0x0100 - 0x0020) / 4 - 1];
+	unsigned int ddr_status0;
+	unsigned int ddr_status1;
+	unsigned int ddr_status2;
+	unsigned int ddr_status3;
+	unsigned int ddr_status4;
+	unsigned int ddr_status5;
+	unsigned int ddr_status6;
+	unsigned int ddr_status7;
+	unsigned int ddr_status8;
+	unsigned int ddr_status9;
+	unsigned int reserved2[(0x0130 - 0x0124) / 4 - 1];
+	unsigned int ddr_status10;
+	unsigned int ddr_status11;
+	unsigned int ddr_status12;
+};
+
+check_member(rk3568_ddrgrf, ddr_status12, 0x0138);
+
+#endif
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 9df0a690a2..d73d3c2be1 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -365,6 +365,21 @@ config TPL_STACK
 
 endif
 
+config ROCKCHIP_RK3568
+	bool "Support Rockchip RK3568"
+	select ARM64
+	select SPL
+	select SUPPORT_SPL
+	help
+	  The Rockchip RK3568 is a ARM-based SoC with a quad-core Cortex-A55.
+
+if ROCKCHIP_RK3568
+
+config TPL_LDSCRIPT
+	default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
+
+endif
+
 config ROCKCHIP_RK1808
 	bool "Support Rockchip RK1808"
 	select ARM64
@@ -489,6 +504,7 @@ config ROCKCHIP_BOOT_MODE_REG
 	default 0xff1005c8 if ROCKCHIP_RK3328
 	default 0xff738200 if ROCKCHIP_RK3368
 	default 0xff320300 if ROCKCHIP_RK3399
+	default 0xfdc20200 if ROCKCHIP_RK3568
 	default 0xfe020200 if ROCKCHIP_RK1808
 	default 0x10300580 if ROCKCHIP_RV1108
 	default 0xfe020200 if ROCKCHIP_RV1126
@@ -510,6 +526,7 @@ config ROCKCHIP_STIMER_BASE
 	default 0xff1d0020 if ROCKCHIP_RK3328
 	default 0xff830020 if ROCKCHIP_RK3368
 	default 0xff8680a0 if ROCKCHIP_RK3399
+	default 0xfdd1c020 if ROCKCHIP_RK3568
 	default 0x10350020 if ROCKCHIP_RV1108
 	default 0xff670020 if ROCKCHIP_RV1126
 	default 0
@@ -529,6 +546,7 @@ config ROCKCHIP_IRAM_START_ADDR
 	default 0xff091000 if ROCKCHIP_RK3328
 	default 0xff8c0000 if ROCKCHIP_RK3368
 	default 0xff8c0000 if ROCKCHIP_RK3399
+	default 0xfdcc0000 if ROCKCHIP_RK3568
 	default 0x10080000 if ROCKCHIP_RV1108
 	default 0xff700000 if ROCKCHIP_RV1126
 	default 0
@@ -763,6 +781,7 @@ source "arch/arm/mach-rockchip/rk3308/Kconfig"
 source "arch/arm/mach-rockchip/rk3328/Kconfig"
 source "arch/arm/mach-rockchip/rk3368/Kconfig"
 source "arch/arm/mach-rockchip/rk3399/Kconfig"
+source "arch/arm/mach-rockchip/rk3568/Kconfig"
 source "arch/arm/mach-rockchip/rk1808/Kconfig"
 source "arch/arm/mach-rockchip/rv1108/Kconfig"
 source "arch/arm/mach-rockchip/rv1126/Kconfig"
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 47c5796a76..1169ea7dfd 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -63,6 +63,7 @@ obj-$(CONFIG_ROCKCHIP_RK3308) += rk3308/
 obj-$(CONFIG_ROCKCHIP_RK3328) += rk3328/
 obj-$(CONFIG_ROCKCHIP_RK3368) += rk3368/
 obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399/
+obj-$(CONFIG_ROCKCHIP_RK3568) += rk3568/
 obj-$(CONFIG_ROCKCHIP_RK1808) += rk1808/
 obj-$(CONFIG_ROCKCHIP_RV1108) += rv1108/
 obj-$(CONFIG_ROCKCHIP_RV1126) += rv1126/
diff --git a/arch/arm/mach-rockchip/rk3568/Kconfig b/arch/arm/mach-rockchip/rk3568/Kconfig
new file mode 100644
index 0000000000..e65c6032a4
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3568/Kconfig
@@ -0,0 +1,16 @@
+if ROCKCHIP_RK3568
+
+config TARGET_EVB_RK3568
+	bool "EVB_RK3568"
+	help
+	  RK3568 EVB is a evaluation board for Rockchp RK3568.
+
+config SYS_SOC
+	default "rockchip"
+
+config SYS_MALLOC_F_LEN
+	default 0x400
+
+source board/rockchip/evb_rk3568/Kconfig
+
+endif
diff --git a/arch/arm/mach-rockchip/rk3568/Makefile b/arch/arm/mach-rockchip/rk3568/Makefile
new file mode 100644
index 0000000000..ae677a78d7
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3568/Makefile
@@ -0,0 +1,8 @@
+#
+# (C) Copyright 2020 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y += syscon_rk3568.o
+obj-y += rk3568.o
diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c
new file mode 100644
index 0000000000..32adf89d12
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2020 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#include <common.h>
+#include <asm/armv8/mmu.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/grf_rk3568.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static struct mm_region rk3568_mem_map[] = {
+	{
+		.virt = 0x0UL,
+		.phys = 0x0UL,
+		.size = 0xf0000000UL,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+			 PTE_BLOCK_INNER_SHARE
+	}, {
+		.virt = 0xf0000000UL,
+		.phys = 0xf0000000UL,
+		.size = 0x10000000UL,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+			 PTE_BLOCK_NON_SHARE |
+			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
+	}, {
+		/* List terminator */
+		0,
+	}
+};
+
+struct mm_region *mem_map = rk3568_mem_map;
+
+void board_debug_uart_init(void)
+{
+
+}
+
+int arch_cpu_init(void)
+{
+	return 0;
+}
diff --git a/arch/arm/mach-rockchip/rk3568/syscon_rk3568.c b/arch/arm/mach-rockchip/rk3568/syscon_rk3568.c
new file mode 100644
index 0000000000..6b4f0242e8
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3568/syscon_rk3568.c
@@ -0,0 +1,25 @@
+/*
+ * (C) Copyright 2020 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+
+static const struct udevice_id rk3568_syscon_ids[] = {
+	{ .compatible = "rockchip,rk3568-grf", .data = ROCKCHIP_SYSCON_GRF },
+	{ .compatible = "rockchip,rk3568-pmugrf", .data = ROCKCHIP_SYSCON_PMUGRF },
+	{ }
+};
+
+U_BOOT_DRIVER(syscon_rk3568) = {
+	.name = "rk3568_syscon",
+	.id = UCLASS_SYSCON,
+	.of_match = rk3568_syscon_ids,
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	.bind = dm_scan_fdt_dev,
+#endif
+};
diff --git a/board/rockchip/evb_rk3568/Kconfig b/board/rockchip/evb_rk3568/Kconfig
new file mode 100644
index 0000000000..f3d3a7e111
--- /dev/null
+++ b/board/rockchip/evb_rk3568/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_EVB_RK3568
+
+config SYS_BOARD
+	default "evb_rk3568"
+
+config SYS_VENDOR
+	default "rockchip"
+
+config SYS_CONFIG_NAME
+	default "evb_rk3568"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+
+endif
diff --git a/board/rockchip/evb_rk3568/Makefile b/board/rockchip/evb_rk3568/Makefile
new file mode 100644
index 0000000000..7fe184a67d
--- /dev/null
+++ b/board/rockchip/evb_rk3568/Makefile
@@ -0,0 +1,7 @@
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+# Copyright (c) 2020 Rockchip Electronics Co., Ltd
+#
+
+obj-y	+= evb_rk3568.o
diff --git a/board/rockchip/evb_rk3568/evb_rk3568.c b/board/rockchip/evb_rk3568/evb_rk3568.c
new file mode 100644
index 0000000000..b1868b335e
--- /dev/null
+++ b/board/rockchip/evb_rk3568/evb_rk3568.c
@@ -0,0 +1,10 @@
+/*
+ * SPDX-License-Identifier:     GPL-2.0+
+ *
+ * (C) Copyright 2020 Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
diff --git a/include/configs/evb_rk3568.h b/include/configs/evb_rk3568.h
new file mode 100644
index 0000000000..03eca0ed44
--- /dev/null
+++ b/include/configs/evb_rk3568.h
@@ -0,0 +1,25 @@
+/*
+ * SPDX-License-Identifier:     GPL-2.0+
+ *
+ * Copyright (c) 2020 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef __CONFIGS_RK3568_EVB_H
+#define __CONFIGS_RK3568_EVB_H
+
+#include <configs/rk3568_common.h>
+
+#ifndef CONFIG_SPL_BUILD
+
+#undef ROCKCHIP_DEVICE_SETTINGS
+#define ROCKCHIP_DEVICE_SETTINGS \
+		"stdout=serial,vidconsole\0" \
+		"stderr=serial,vidconsole\0"
+
+#define CONFIG_SYS_MMC_ENV_DEV		0
+
+#undef CONFIG_BOOTCOMMAND
+#define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
+#endif
+
+#endif
diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h
new file mode 100644
index 0000000000..72dd354ccc
--- /dev/null
+++ b/include/configs/rk3568_common.h
@@ -0,0 +1,63 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2020 Rockchip Electronics Co., Ltd
+ *
+ */
+
+#ifndef __CONFIG_RK3568_COMMON_H
+#define __CONFIG_RK3568_COMMON_H
+
+#include "rockchip-common.h"
+
+#define CONFIG_SPL_FRAMEWORK
+#define CONFIG_SPL_TEXT_BASE		0x00000000
+#define CONFIG_SPL_MAX_SIZE		0x00020000
+#define CONFIG_SPL_BSS_START_ADDR	0x03fe0000
+#define CONFIG_SPL_BSS_MAX_SIZE		0x00002000
+#define CONFIG_SPL_STACK		0x03fe0000
+
+#define CONFIG_SYS_MALLOC_LEN		(32 << 20)
+#define CONFIG_SYS_CBSIZE		1024
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_SYS_TEXT_BASE		0x00600000
+#define CONFIG_SYS_INIT_SP_ADDR		0x00800000
+#define CONFIG_SYS_LOAD_ADDR		0x00800800
+#define CONFIG_SYS_BOOTM_LEN		(64 << 20)	/* 64M */
+#define COUNTER_FREQUENCY		24000000
+
+#define GICD_BASE			0xfd400000
+#define GICR_BASE			0xfd460000
+
+/* MMC/SD IP block */
+#define CONFIG_BOUNCE_BUFFER
+#define CONFIG_SUPPORT_EMMC_RPMB
+
+#define CONFIG_SYS_SDRAM_BASE		0
+#define SDRAM_MAX_SIZE			0xf0000000
+#define CONFIG_PREBOOT
+
+#ifndef CONFIG_SPL_BUILD
+/* usb mass storage */
+#define CONFIG_USB_FUNCTION_MASS_STORAGE
+#define CONFIG_ROCKUSB_G_DNL_PID	0x350a
+
+#define ENV_MEM_LAYOUT_SETTINGS \
+	"scriptaddr=0x00500000\0" \
+	"pxefile_addr_r=0x00600000\0" \
+	"fdt_addr_r=0x01f00000\0" \
+	"kernel_addr_no_bl32_r=0x00280000\0" \
+	"kernel_addr_r=0x00680000\0" \
+	"kernel_addr_c=0x04080000\0" \
+	"ramdisk_addr_r=0x0a200000\0"
+
+#include <config_distro_bootcmd.h>
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	ENV_MEM_LAYOUT_SETTINGS \
+	"partitions=" PARTS_DEFAULT \
+	ROCKCHIP_DEVICE_SETTINGS \
+	RKIMG_DET_BOOTDEV \
+	BOOTENV
+#endif
+
+#endif

commit be7064f8f7476270a14d9e0152598e7ea6b7f42c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Oct 22 15:33:14 2020 +0800

    rockchip: dts: rk3568: add basic dtsi/dts
    
    Sync from kernel-4.19:
    (85abcd6 phy: phy-rockchip-snps-pcie3: Initial support)
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I474a6f5bfdaf5f78655a121ac9dc08e3708de226

diff --git a/arch/arm/dts/rk3568-evb.dts b/arch/arm/dts/rk3568-evb.dts
new file mode 100644
index 0000000000..87f672532d
--- /dev/null
+++ b/arch/arm/dts/rk3568-evb.dts
@@ -0,0 +1,35 @@
+/*
+ * SPDX-License-Identifier:     GPL-2.0+
+ *
+ * (C) Copyright 2020 Rockchip Electronics Co., Ltd
+ */
+
+/dts-v1/;
+#include "rk3568.dtsi"
+#include "rk3568-u-boot.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Rockchip RK3568 Evaluation Board";
+	compatible = "rockchip,rk3568-evb", "rockchip,rk3568";
+
+	adc-keys {
+		compatible = "adc-keys";
+		io-channels = <&saradc 0>;
+		io-channel-names = "buttons";
+		keyup-threshold-microvolt = <1800000>;
+		u-boot,dm-spl;
+		status = "okay";
+
+		volumeup-key {
+			u-boot,dm-spl;
+			linux,code = <KEY_VOLUMEUP>;
+			label = "volume up";
+			press-threshold-microvolt = <9>;
+		};
+	};
+};
+
+&uart2 {
+	status = "okay";
+};
diff --git a/arch/arm/dts/rk3568-pinctrl.dtsi b/arch/arm/dts/rk3568-pinctrl.dtsi
new file mode 100644
index 0000000000..86009ff44e
--- /dev/null
+++ b/arch/arm/dts/rk3568-pinctrl.dtsi
@@ -0,0 +1,2037 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 Rockchip Electronics Co., Ltd.
+ */
+
+#include <dt-bindings/pinctrl/rockchip.h>
+#include "rockchip-pinconf.dtsi"
+
+/*
+ * This file is auto generated by pin2dts tool, please keep these code
+ * by adding changes at end of this file.
+ */
+&pinctrl {
+	acodec {
+		acodec_pins: acodec-pins {
+			rockchip,pins =
+				/* acodec_adc_sync */
+				<1 RK_PB1 5 &pcfg_pull_none>,
+				/* acodec_adcclk */
+				<1 RK_PA1 5 &pcfg_pull_none>,
+				/* acodec_adcdata */
+				<1 RK_PA0 5 &pcfg_pull_none>,
+				/* acodec_dac_datal */
+				<1 RK_PA7 5 &pcfg_pull_none>,
+				/* acodec_dac_datar */
+				<1 RK_PB0 5 &pcfg_pull_none>,
+				/* acodec_dacclk */
+				<1 RK_PA3 5 &pcfg_pull_none>,
+				/* acodec_dacsync */
+				<1 RK_PA5 5 &pcfg_pull_none>;
+		};
+	};
+	audiopwmlout {
+		audiopwmlout_pins: audiopwmlout-pins {
+			rockchip,pins =
+				/* audiopwmlout */
+				<1 RK_PA0 4 &pcfg_pull_none>,
+				/* audiopwmlout */
+				<1 RK_PA1 6 &pcfg_pull_none>;
+		};
+	};
+	audiopwmloutp {
+		audiopwmloutp_pins: audiopwmloutp-pins {
+			rockchip,pins =
+				/* audiopwmloutp */
+				<1 RK_PA0 6 &pcfg_pull_none>;
+		};
+	};
+	audiopwmrout {
+		audiopwmrout_pins: audiopwmrout-pins {
+			rockchip,pins =
+				/* audiopwmrout */
+				<1 RK_PA1 4 &pcfg_pull_none>;
+		};
+	};
+	audiopwmroutn {
+		audiopwmroutn_pins: audiopwmroutn-pins {
+			rockchip,pins =
+				/* audiopwmroutn */
+				<1 RK_PA7 4 &pcfg_pull_none>;
+		};
+	};
+	audiopwmroutp {
+		audiopwmroutp_pins: audiopwmroutp-pins {
+			rockchip,pins =
+				/* audiopwmroutp */
+				<1 RK_PA6 4 &pcfg_pull_none>;
+		};
+	};
+	bt656 {
+		bt656m0_pins: bt656m0-pins {
+			rockchip,pins =
+				/* bt656_clkm0 */
+				<3 RK_PA0 2 &pcfg_pull_none>,
+				/* bt656_d0m0 */
+				<2 RK_PD0 2 &pcfg_pull_none>,
+				/* bt656_d1m0 */
+				<2 RK_PD1 2 &pcfg_pull_none>,
+				/* bt656_d2m0 */
+				<2 RK_PD2 2 &pcfg_pull_none>,
+				/* bt656_d3m0 */
+				<2 RK_PD3 2 &pcfg_pull_none>,
+				/* bt656_d4m0 */
+				<2 RK_PD4 2 &pcfg_pull_none>,
+				/* bt656_d5m0 */
+				<2 RK_PD5 2 &pcfg_pull_none>,
+				/* bt656_d6m0 */
+				<2 RK_PD6 2 &pcfg_pull_none>,
+				/* bt656_d7m0 */
+				<2 RK_PD7 2 &pcfg_pull_none>;
+		};
+		bt656m1_pins: bt656m1-pins {
+			rockchip,pins =
+				/* bt656_clkm1 */
+				<4 RK_PB4 5 &pcfg_pull_none>,
+				/* bt656_d0m1 */
+				<3 RK_PC6 5 &pcfg_pull_none>,
+				/* bt656_d1m1 */
+				<3 RK_PC7 5 &pcfg_pull_none>,
+				/* bt656_d2m1 */
+				<3 RK_PD0 5 &pcfg_pull_none>,
+				/* bt656_d3m1 */
+				<3 RK_PD1 5 &pcfg_pull_none>,
+				/* bt656_d4m1 */
+				<3 RK_PD2 5 &pcfg_pull_none>,
+				/* bt656_d5m1 */
+				<3 RK_PD3 5 &pcfg_pull_none>,
+				/* bt656_d6m1 */
+				<3 RK_PD4 5 &pcfg_pull_none>,
+				/* bt656_d7m1 */
+				<3 RK_PD5 5 &pcfg_pull_none>;
+		};
+	};
+	bt1120 {
+		bt1120_pins: bt1120-pins {
+			rockchip,pins =
+				/* bt1120_clk */
+				<3 RK_PA6 2 &pcfg_pull_none>,
+				/* bt1120_d0 */
+				<3 RK_PA1 2 &pcfg_pull_none>,
+				/* bt1120_d1 */
+				<3 RK_PA2 2 &pcfg_pull_none>,
+				/* bt1120_d2 */
+				<3 RK_PA3 2 &pcfg_pull_none>,
+				/* bt1120_d3 */
+				<3 RK_PA4 2 &pcfg_pull_none>,
+				/* bt1120_d4 */
+				<3 RK_PA5 2 &pcfg_pull_none>,
+				/* bt1120_d5 */
+				<3 RK_PA7 2 &pcfg_pull_none>,
+				/* bt1120_d6 */
+				<3 RK_PB0 2 &pcfg_pull_none>,
+				/* bt1120_d7 */
+				<3 RK_PB1 2 &pcfg_pull_none>,
+				/* bt1120_d8 */
+				<3 RK_PB2 2 &pcfg_pull_none>,
+				/* bt1120_d9 */
+				<3 RK_PB3 2 &pcfg_pull_none>,
+				/* bt1120_d10 */
+				<3 RK_PB4 2 &pcfg_pull_none>,
+				/* bt1120_d11 */
+				<3 RK_PB5 2 &pcfg_pull_none>,
+				/* bt1120_d12 */
+				<3 RK_PB6 2 &pcfg_pull_none>,
+				/* bt1120_d13 */
+				<3 RK_PC1 2 &pcfg_pull_none>,
+				/* bt1120_d14 */
+				<3 RK_PC2 2 &pcfg_pull_none>,
+				/* bt1120_d15 */
+				<3 RK_PC3 2 &pcfg_pull_none>;
+		};
+	};
+	cam {
+		cam_pins: cam-pins {
+			rockchip,pins =
+				/* cam_clkout0 */
+				<4 RK_PA7 1 &pcfg_pull_none>,
+				/* cam_clkout1 */
+				<4 RK_PB0 1 &pcfg_pull_none>;
+		};
+	};
+	can0 {
+		can0m0_pins: can0m0-pins {
+			rockchip,pins =
+				/* can0_rxm0 */
+				<0 RK_PB4 2 &pcfg_pull_none>,
+				/* can0_txm0 */
+				<0 RK_PB3 2 &pcfg_pull_none>;
+		};
+		can0m1_pins: can0m1-pins {
+			rockchip,pins =
+				/* can0_rxm1 */
+				<2 RK_PA2 4 &pcfg_pull_none>,
+				/* can0_txm1 */
+				<2 RK_PA1 4 &pcfg_pull_none>;
+		};
+	};
+	can1 {
+		can1m0_pins: can1m0-pins {
+			rockchip,pins =
+				/* can1_rxm0 */
+				<1 RK_PA0 3 &pcfg_pull_none>,
+				/* can1_txm0 */
+				<1 RK_PA1 3 &pcfg_pull_none>;
+		};
+		can1m1_pins: can1m1-pins {
+			rockchip,pins =
+				/* can1_rxm1 */
+				<4 RK_PC2 3 &pcfg_pull_none>,
+				/* can1_txm1 */
+				<4 RK_PC3 3 &pcfg_pull_none>;
+		};
+	};
+	can2 {
+		can2m0_pins: can2m0-pins {
+			rockchip,pins =
+				/* can2_rxm0 */
+				<4 RK_PB4 3 &pcfg_pull_none>,
+				/* can2_txm0 */
+				<4 RK_PB5 3 &pcfg_pull_none>;
+		};
+		can2m1_pins: can2m1-pins {
+			rockchip,pins =
+				/* can2_rxm1 */
+				<2 RK_PB1 4 &pcfg_pull_none>,
+				/* can2_txm1 */
+				<2 RK_PB2 4 &pcfg_pull_none>;
+		};
+	};
+	cif {
+		cif_dvp_ctl: cif-dvp_ctl {
+			rockchip,pins =
+				/* cif_clkin */
+				<4 RK_PC1 1 &pcfg_pull_none>,
+				/* cif_clkout */
+				<4 RK_PC0 1 &pcfg_pull_none>,
+				/* cif_d0 */
+				<3 RK_PC6 1 &pcfg_pull_none>,
+				/* cif_d1 */
+				<3 RK_PC7 1 &pcfg_pull_none>,
+				/* cif_d2 */
+				<3 RK_PD0 1 &pcfg_pull_none>,
+				/* cif_d3 */
+				<3 RK_PD1 1 &pcfg_pull_none>,
+				/* cif_d4 */
+				<3 RK_PD2 1 &pcfg_pull_none>,
+				/* cif_d5 */
+				<3 RK_PD3 1 &pcfg_pull_none>,
+				/* cif_d6 */
+				<3 RK_PD4 1 &pcfg_pull_none>,
+				/* cif_d7 */
+				<3 RK_PD5 1 &pcfg_pull_none>,
+				/* cif_d8 */
+				<3 RK_PD6 1 &pcfg_pull_none>,
+				/* cif_d9 */
+				<3 RK_PD7 1 &pcfg_pull_none>,
+				/* cif_d10 */
+				<4 RK_PA0 1 &pcfg_pull_none>,
+				/* cif_d11 */
+				<4 RK_PA1 1 &pcfg_pull_none>,
+				/* cif_d12 */
+				<4 RK_PA2 1 &pcfg_pull_none>,
+				/* cif_d13 */
+				<4 RK_PA3 1 &pcfg_pull_none>,
+				/* cif_d14 */
+				<4 RK_PA4 1 &pcfg_pull_none>,
+				/* cif_d15 */
+				<4 RK_PA5 1 &pcfg_pull_none>,
+				/* cif_href */
+				<4 RK_PB6 1 &pcfg_pull_none>,
+				/* cif_vsync */
+				<4 RK_PB7 1 &pcfg_pull_none>;
+		};
+	};
+	clk32k {
+		clk32k_pins: clk32k-pins {
+			rockchip,pins =
+				/* clk32k_in */
+				<0 RK_PB0 1 &pcfg_pull_none>,
+				/* clk32k_out0 */
+				<0 RK_PB0 2 &pcfg_pull_none>,
+				/* clk32k_out1 */
+				<2 RK_PC6 1 &pcfg_pull_none>;
+		};
+	};
+	cpu {
+		cpu_pins: cpu-pins {
+			rockchip,pins =
+				/* cpu_avs */
+				<0 RK_PB7 2 &pcfg_pull_none>;
+		};
+	};
+	ebc {
+		ebc_pins: ebc-pins {
+			rockchip,pins =
+				/* ebc_gdclk */
+				<4 RK_PC0 2 &pcfg_pull_none>,
+				/* ebc_gdoe */
+				<4 RK_PB3 2 &pcfg_pull_none>,
+				/* ebc_gdsp */
+				<4 RK_PB4 2 &pcfg_pull_none>,
+				/* ebc_sdce0 */
+				<4 RK_PA6 2 &pcfg_pull_none>,
+				/* ebc_sdce1 */
+				<4 RK_PA7 2 &pcfg_pull_none>,
+				/* ebc_sdce2 */
+				<4 RK_PB0 2 &pcfg_pull_none>,
+				/* ebc_sdce3 */
+				<4 RK_PB1 2 &pcfg_pull_none>,
+				/* ebc_sdclk */
+				<4 RK_PC1 2 &pcfg_pull_none>,
+				/* ebc_sddo0 */
+				<3 RK_PC6 2 &pcfg_pull_none>,
+				/* ebc_sddo1 */
+				<3 RK_PC7 2 &pcfg_pull_none>,
+				/* ebc_sddo2 */
+				<3 RK_PD0 2 &pcfg_pull_none>,
+				/* ebc_sddo3 */
+				<3 RK_PD1 2 &pcfg_pull_none>,
+				/* ebc_sddo4 */
+				<3 RK_PD2 2 &pcfg_pull_none>,
+				/* ebc_sddo5 */
+				<3 RK_PD3 2 &pcfg_pull_none>,
+				/* ebc_sddo6 */
+				<3 RK_PD4 2 &pcfg_pull_none>,
+				/* ebc_sddo7 */
+				<3 RK_PD5 2 &pcfg_pull_none>,
+				/* ebc_sddo8 */
+				<3 RK_PD6 2 &pcfg_pull_none>,
+				/* ebc_sddo9 */
+				<3 RK_PD7 2 &pcfg_pull_none>,
+				/* ebc_sddo10 */
+				<4 RK_PA0 2 &pcfg_pull_none>,
+				/* ebc_sddo11 */
+				<4 RK_PA1 2 &pcfg_pull_none>,
+				/* ebc_sddo12 */
+				<4 RK_PA2 2 &pcfg_pull_none>,
+				/* ebc_sddo13 */
+				<4 RK_PA3 2 &pcfg_pull_none>,
+				/* ebc_sddo14 */
+				<4 RK_PA4 2 &pcfg_pull_none>,
+				/* ebc_sddo15 */
+				<4 RK_PA5 2 &pcfg_pull_none>,
+				/* ebc_sdle */
+				<4 RK_PB6 2 &pcfg_pull_none>,
+				/* ebc_sdoe */
+				<4 RK_PB7 2 &pcfg_pull_none>,
+				/* ebc_sdshr */
+				<4 RK_PB5 2 &pcfg_pull_none>,
+				/* ebc_vcom */
+				<4 RK_PB2 2 &pcfg_pull_none>;
+		};
+	};
+	edpdp {
+		edpdpm0_pins: edpdpm0-pins {
+			rockchip,pins =
+				/* edpdp_hpdinm0 */
+				<4 RK_PC4 1 &pcfg_pull_none>;
+		};
+		edpdpm1_pins: edpdpm1-pins {
+			rockchip,pins =
+				/* edpdp_hpdinm1 */
+				<0 RK_PC2 2 &pcfg_pull_none>;
+		};
+	};
+	emmc {
+		emmc_rstnout: emmc-rstnout {
+			rockchip,pins =
+				/* emmc_rstn */
+				<1 RK_PC7 1 &pcfg_pull_none>;
+		};
+		emmc_bus8: emmc-bus8 {
+			rockchip,pins =
+				/* emmc_d0 */
+				<1 RK_PB4 1 &pcfg_pull_up_drv_level_2>,
+				/* emmc_d1 */
+				<1 RK_PB5 1 &pcfg_pull_up_drv_level_2>,
+				/* emmc_d2 */
+				<1 RK_PB6 1 &pcfg_pull_up_drv_level_2>,
+				/* emmc_d3 */
+				<1 RK_PB7 1 &pcfg_pull_up_drv_level_2>,
+				/* emmc_d4 */
+				<1 RK_PC0 1 &pcfg_pull_up_drv_level_2>,
+				/* emmc_d5 */
+				<1 RK_PC1 1 &pcfg_pull_up_drv_level_2>,
+				/* emmc_d6 */
+				<1 RK_PC2 1 &pcfg_pull_up_drv_level_2>,
+				/* emmc_d7 */
+				<1 RK_PC3 1 &pcfg_pull_up_drv_level_2>;
+		};
+		emmc_clk: emmc-clk {
+			rockchip,pins =
+				/* emmc_clkout */
+				<1 RK_PC5 1 &pcfg_pull_up_drv_level_2>;
+		};
+		emmc_cmd: emmc-cmd {
+			rockchip,pins =
+				/* emmc_cmd */
+				<1 RK_PC4 1 &pcfg_pull_up_drv_level_2>;
+		};
+		emmc_datastrobe: emmc-datastrobe {
+			rockchip,pins =
+				<1 RK_PC6 1 &pcfg_pull_none>;
+		};
+	};
+	eth0 {
+		eth0_pins: eth0-pins {
+			rockchip,pins =
+				/* eth0_refclko25m */
+				<2 RK_PC1 2 &pcfg_pull_none>;
+		};
+	};
+	eth1 {
+		eth1m0_pins: eth1m0-pins {
+			rockchip,pins =
+				/* eth1_refclko25mm0 */
+				<3 RK_PB0 3 &pcfg_pull_none>;
+		};
+		eth1m1_pins: eth1m1-pins {
+			rockchip,pins =
+				/* eth1_refclko25mm1 */
+				<4 RK_PB3 3 &pcfg_pull_none>;
+		};
+	};
+	flash {
+		flash_pins: flash-pins {
+			rockchip,pins =
+				/* flash_ale */
+				<1 RK_PD0 2 &pcfg_pull_none>,
+				/* flash_cle */
+				<1 RK_PC6 3 &pcfg_pull_none>,
+				/* flash_cs0n */
+				<1 RK_PD3 2 &pcfg_pull_none>,
+				/* flash_cs1n */
+				<1 RK_PD4 2 &pcfg_pull_none>,
+				/* flash_d0 */
+				<1 RK_PB4 2 &pcfg_pull_none>,
+				/* flash_d1 */
+				<1 RK_PB5 2 &pcfg_pull_none>,
+				/* flash_d2 */
+				<1 RK_PB6 2 &pcfg_pull_none>,
+				/* flash_d3 */
+				<1 RK_PB7 2 &pcfg_pull_none>,
+				/* flash_d4 */
+				<1 RK_PC0 2 &pcfg_pull_none>,
+				/* flash_d5 */
+				<1 RK_PC1 2 &pcfg_pull_none>,
+				/* flash_d6 */
+				<1 RK_PC2 2 &pcfg_pull_none>,
+				/* flash_d7 */
+				<1 RK_PC3 2 &pcfg_pull_none>,
+				/* flash_dqs */
+				<1 RK_PC5 2 &pcfg_pull_none>,
+				/* flash_rdn */
+				<1 RK_PD2 2 &pcfg_pull_none>,
+				/* flash_rdy */
+				<1 RK_PD1 2 &pcfg_pull_none>,
+				/* flash_volsel */
+				<0 RK_PA7 1 &pcfg_pull_none>,
+				/* flash_wpn */
+				<1 RK_PC7 3 &pcfg_pull_none>,
+				/* flash_wrn */
+				<1 RK_PC4 2 &pcfg_pull_none>;
+		};
+	};
+	fspi {
+		fspi_pins: fspi-pins {
+			rockchip,pins =
+				/* fspi_clk */
+				<1 RK_PD0 1 &pcfg_pull_none>,
+				/* fspi_cs0n */
+				<1 RK_PD3 1 &pcfg_pull_none>,
+				/* fspi_d0 */
+				<1 RK_PD1 1 &pcfg_pull_none>,
+				/* fspi_d1 */
+				<1 RK_PD2 1 &pcfg_pull_none>,
+				/* fspi_d2 */
+				<1 RK_PC7 2 &pcfg_pull_none>,
+				/* fspi_d3 */
+				<1 RK_PD4 1 &pcfg_pull_none>;
+		};
+		fspi_cs1: fspi-cs1 {
+			rockchip,pins =
+				/* fspi_cs1n */
+				<1 RK_PC6 2 &pcfg_pull_up>;
+		};
+	};
+	gmac0 {
+		gmac0_pins: gmac0-pins {
+			rockchip,pins =
+				/* gmac0_mclkinout */
+				<2 RK_PC2 2 &pcfg_pull_none>,
+				/* gmac0_mdc */
+				<2 RK_PC3 2 &pcfg_pull_none>,
+				/* gmac0_mdio */
+				<2 RK_PC4 2 &pcfg_pull_none>,
+				/* gmac0_rxclk */
+				<2 RK_PA5 2 &pcfg_pull_none>,
+				/* gmac0_rxd0 */
+				<2 RK_PB6 1 &pcfg_pull_none>,
+				/* gmac0_rxd1 */
+				<2 RK_PB7 2 &pcfg_pull_none>,
+				/* gmac0_rxd2 */
+				<2 RK_PA3 2 &pcfg_pull_none>,
+				/* gmac0_rxd3 */
+				<2 RK_PA4 2 &pcfg_pull_none>,
+				/* gmac0_rxdvcrs */
+				<2 RK_PC0 2 &pcfg_pull_none>,
+				/* gmac0_rxer */
+				<2 RK_PC5 2 &pcfg_pull_none>,
+				/* gmac0_txclk */
+				<2 RK_PB0 2 &pcfg_pull_none>,
+				/* gmac0_txd0 */
+				<2 RK_PB3 1 &pcfg_pull_none>,
+				/* gmac0_txd1 */
+				<2 RK_PB4 1 &pcfg_pull_none>,
+				/* gmac0_txd2 */
+				<2 RK_PA6 2 &pcfg_pull_none>,
+				/* gmac0_txd3 */
+				<2 RK_PA7 2 &pcfg_pull_none>,
+				/* gmac0_txen */
+				<2 RK_PB5 1 &pcfg_pull_none>;
+		};
+	};
+	gmac1 {
+		gmac1m0_pins: gmac1m0-pins {
+			rockchip,pins =
+				/* gmac1_mclkinoutm0 */
+				<3 RK_PC0 3 &pcfg_pull_none>,
+				/* gmac1_mdcm0 */
+				<3 RK_PC4 3 &pcfg_pull_none>,
+				/* gmac1_mdiom0 */
+				<3 RK_PC5 3 &pcfg_pull_none>,
+				/* gmac1_rxclkm0 */
+				<3 RK_PA7 3 &pcfg_pull_none>,
+				/* gmac1_rxd0m0 */
+				<3 RK_PB1 3 &pcfg_pull_none>,
+				/* gmac1_rxd1m0 */
+				<3 RK_PB2 3 &pcfg_pull_none>,
+				/* gmac1_rxd2m0 */
+				<3 RK_PA4 3 &pcfg_pull_none>,
+				/* gmac1_rxd3m0 */
+				<3 RK_PA5 3 &pcfg_pull_none>,
+				/* gmac1_rxdvcrsm0 */
+				<3 RK_PB3 3 &pcfg_pull_none>,
+				/* gmac1_rxerm0 */
+				<3 RK_PB4 3 &pcfg_pull_none>,
+				/* gmac1_txclkm0 */
+				<3 RK_PA6 3 &pcfg_pull_none>,
+				/* gmac1_txd0m0 */
+				<3 RK_PB5 3 &pcfg_pull_none>,
+				/* gmac1_txd1m0 */
+				<3 RK_PB6 3 &pcfg_pull_none>,
+				/* gmac1_txd2m0 */
+				<3 RK_PA2 3 &pcfg_pull_none>,
+				/* gmac1_txd3m0 */
+				<3 RK_PA3 3 &pcfg_pull_none>,
+				/* gmac1_txenm0 */
+				<3 RK_PB7 3 &pcfg_pull_none>;
+		};
+		gmac1m1_pins: gmac1m1-pins {
+			rockchip,pins =
+				/* gmac1_mclkinoutm1 */
+				<4 RK_PC1 3 &pcfg_pull_none>,
+				/* gmac1_mdcm1 */
+				<4 RK_PB6 3 &pcfg_pull_none>,
+				/* gmac1_mdiom1 */
+				<4 RK_PB7 3 &pcfg_pull_none>,
+				/* gmac1_rxclkm1 */
+				<4 RK_PA3 3 &pcfg_pull_none>,
+				/* gmac1_rxd0m1 */
+				<4 RK_PA7 3 &pcfg_pull_none>,
+				/* gmac1_rxd1m1 */
+				<4 RK_PB0 3 &pcfg_pull_none>,
+				/* gmac1_rxd2m1 */
+				<4 RK_PA1 3 &pcfg_pull_none>,
+				/* gmac1_rxd3m1 */
+				<4 RK_PA2 3 &pcfg_pull_none>,
+				/* gmac1_rxdvcrsm1 */
+				<4 RK_PB1 3 &pcfg_pull_none>,
+				/* gmac1_rxerm1 */
+				<4 RK_PB2 3 &pcfg_pull_none>,
+				/* gmac1_txclkm1 */
+				<4 RK_PA0 3 &pcfg_pull_none>,
+				/* gmac1_txd0m1 */
+				<4 RK_PA4 3 &pcfg_pull_none>,
+				/* gmac1_txd1m1 */
+				<4 RK_PA5 3 &pcfg_pull_none>,
+				/* gmac1_txd2m1 */
+				<3 RK_PD6 3 &pcfg_pull_none>,
+				/* gmac1_txd3m1 */
+				<3 RK_PD7 3 &pcfg_pull_none>,
+				/* gmac1_txenm1 */
+				<4 RK_PA6 3 &pcfg_pull_none>;
+		};
+	};
+	gpu {
+		gpu_pins: gpu-pins {
+			rockchip,pins =
+				/* gpu_avs */
+				<0 RK_PC0 2 &pcfg_pull_none>,
+				/* gpu_pwren */
+				<0 RK_PA6 4 &pcfg_pull_none>;
+		};
+	};
+	hdmitx {
+		hdmitxm0_pins: hdmitxm0-pins {
+			rockchip,pins =
+				/* hdmitx_cecm0 */
+				<4 RK_PD1 1 &pcfg_pull_none>;
+		};
+		hdmitxm1_pins: hdmitxm1-pins {
+			rockchip,pins =
+				/* hdmitx_cecm1 */
+				<0 RK_PC7 1 &pcfg_pull_none>;
+		};
+		hdmitx_scl: hdmitx-scl {
+			rockchip,pins =
+				<4 RK_PC7 1 &pcfg_pull_none>;
+		};
+		hdmitx_sda: hdmitx-sda {
+			rockchip,pins =
+				<4 RK_PD0 1 &pcfg_pull_none>;
+		};
+	};
+	i2c0 {
+		i2c0_xfer: i2c0-xfer {
+			rockchip,pins =
+				/* i2c0_scl */
+				<0 RK_PB1 1 &pcfg_pull_none_smt>,
+				/* i2c0_sda */
+				<0 RK_PB2 1 &pcfg_pull_none_smt>;
+		};
+	};
+	i2c1 {
+		i2c1_xfer: i2c1-xfer {
+			rockchip,pins =
+				/* i2c1_scl */
+				<0 RK_PB3 1 &pcfg_pull_none_smt>,
+				/* i2c1_sda */
+				<0 RK_PB4 1 &pcfg_pull_none_smt>;
+		};
+	};
+	i2c2 {
+		i2c2m0_xfer: i2c2m0-xfer {
+			rockchip,pins =
+				/* i2c2_sclm0 */
+				<0 RK_PB5 1 &pcfg_pull_none_smt>,
+				/* i2c2_sdam0 */
+				<0 RK_PB6 1 &pcfg_pull_none_smt>;
+		};
+		i2c2m1_xfer: i2c2m1-xfer {
+			rockchip,pins =
+				/* i2c2_sclm1 */
+				<4 RK_PB5 1 &pcfg_pull_none_smt>,
+				/* i2c2_sdam1 */
+				<4 RK_PB4 1 &pcfg_pull_none_smt>;
+		};
+	};
+	i2c3 {
+		i2c3m0_xfer: i2c3m0-xfer {
+			rockchip,pins =
+				/* i2c3_sclm0 */
+				<1 RK_PA1 1 &pcfg_pull_none_smt>,
+				/* i2c3_sdam0 */
+				<1 RK_PA0 1 &pcfg_pull_none_smt>;
+		};
+		i2c3m1_xfer: i2c3m1-xfer {
+			rockchip,pins =
+				/* i2c3_sclm1 */
+				<3 RK_PB5 4 &pcfg_pull_none_smt>,
+				/* i2c3_sdam1 */
+				<3 RK_PB6 4 &pcfg_pull_none_smt>;
+		};
+	};
+	i2c4 {
+		i2c4m0_xfer: i2c4m0-xfer {
+			rockchip,pins =
+				/* i2c4_sclm0 */
+				<4 RK_PB3 1 &pcfg_pull_none_smt>,
+				/* i2c4_sdam0 */
+				<4 RK_PB2 1 &pcfg_pull_none_smt>;
+		};
+		i2c4m1_xfer: i2c4m1-xfer {
+			rockchip,pins =
+				/* i2c4_sclm1 */
+				<2 RK_PB2 2 &pcfg_pull_none_smt>,
+				/* i2c4_sdam1 */
+				<2 RK_PB1 2 &pcfg_pull_none_smt>;
+		};
+	};
+	i2c5 {
+		i2c5m0_xfer: i2c5m0-xfer {
+			rockchip,pins =
+				/* i2c5_sclm0 */
+				<3 RK_PB3 4 &pcfg_pull_none_smt>,
+				/* i2c5_sdam0 */
+				<3 RK_PB4 4 &pcfg_pull_none_smt>;
+		};
+		i2c5m1_xfer: i2c5m1-xfer {
+			rockchip,pins =
+				/* i2c5_sclm1 */
+				<4 RK_PC7 2 &pcfg_pull_none_smt>,
+				/* i2c5_sdam1 */
+				<4 RK_PD0 2 &pcfg_pull_none_smt>;
+		};
+	};
+	i2s1 {
+		i2s1lrckrxm0: i2s1lrckrxm0 {
+			rockchip,pins =
+				<1 RK_PA6 1 &pcfg_pull_none>;
+		};
+		i2s1lrcktxm0: i2s1lrcktxm0 {
+			rockchip,pins =
+				<1 RK_PA5 1 &pcfg_pull_none>;
+		};
+		i2s1mclkm0: i2s1mclkm0 {
+			rockchip,pins =
+				<1 RK_PA2 1 &pcfg_pull_none>;
+		};
+		i2s1sclkrxm0: i2s1sclkrxm0 {
+			rockchip,pins =
+				<1 RK_PA4 1 &pcfg_pull_none>;
+		};
+		i2s1sclktxm0: i2s1sclktxm0 {
+			rockchip,pins =
+				<1 RK_PA3 1 &pcfg_pull_none>;
+		};
+		i2s1sdi0m0: i2s1sdi0m0 {
+			rockchip,pins =
+				<1 RK_PB3 1 &pcfg_pull_none>;
+		};
+		i2s1sdi1m0: i2s1sdi1m0 {
+			rockchip,pins =
+				<1 RK_PB2 2 &pcfg_pull_none>;
+		};
+		i2s1sdi2m0: i2s1sdi2m0 {
+			rockchip,pins =
+				<1 RK_PB1 2 &pcfg_pull_none>;
+		};
+		i2s1sdi3m0: i2s1sdi3m0 {
+			rockchip,pins =
+				<1 RK_PB0 2 &pcfg_pull_none>;
+		};
+		i2s1sdo0m0: i2s1sdo0m0 {
+			rockchip,pins =
+				<1 RK_PA7 1 &pcfg_pull_none>;
+		};
+		i2s1sdo1m0: i2s1sdo1m0 {
+			rockchip,pins =
+				<1 RK_PB0 1 &pcfg_pull_none>;
+		};
+		i2s1sdo2m0: i2s1sdo2m0 {
+			rockchip,pins =
+				<1 RK_PB1 1 &pcfg_pull_none>;
+		};
+		i2s1sdo3m0: i2s1sdo3m0 {
+			rockchip,pins =
+				<1 RK_PB2 1 &pcfg_pull_none>;
+		};
+		i2s1lrckrxm1: i2s1lrckrxm1 {
+			rockchip,pins =
+				<4 RK_PA7 5 &pcfg_pull_none>;
+		};
+		i2s1lrcktxm1: i2s1lrcktxm1 {
+			rockchip,pins =
+				<3 RK_PD0 4 &pcfg_pull_none>;
+		};
+		i2s1mclkm1: i2s1mclkm1 {
+			rockchip,pins =
+				<3 RK_PC6 4 &pcfg_pull_none>;
+		};
+		i2s1sclkrxm1: i2s1sclkrxm1 {
+			rockchip,pins =
+				<4 RK_PA6 5 &pcfg_pull_none>;
+		};
+		i2s1sclktxm1: i2s1sclktxm1 {
+			rockchip,pins =
+				<3 RK_PC7 4 &pcfg_pull_none>;
+		};
+		i2s1sdi0m1: i2s1sdi0m1 {
+			rockchip,pins =
+				<3 RK_PD2 4 &pcfg_pull_none>;
+		};
+		i2s1sdi1m1: i2s1sdi1m1 {
+			rockchip,pins =
+				<3 RK_PD3 4 &pcfg_pull_none>;
+		};
+		i2s1sdi2m1: i2s1sdi2m1 {
+			rockchip,pins =
+				<3 RK_PD4 4 &pcfg_pull_none>;
+		};
+		i2s1sdi3m1: i2s1sdi3m1 {
+			rockchip,pins =
+				<3 RK_PD5 4 &pcfg_pull_none>;
+		};
+		i2s1sdo0m1: i2s1sdo0m1 {
+			rockchip,pins =
+				<3 RK_PD1 4 &pcfg_pull_none>;
+		};
+		i2s1sdo1m1: i2s1sdo1m1 {
+			rockchip,pins =
+				<4 RK_PB0 5 &pcfg_pull_none>;
+		};
+		i2s1sdo2m1: i2s1sdo2m1 {
+			rockchip,pins =
+				<4 RK_PB1 4 &pcfg_pull_none>;
+		};
+		i2s1lrckrxm2: i2s1lrckrxm2 {
+			rockchip,pins =
+				<3 RK_PC5 5 &pcfg_pull_none>;
+		};
+		i2s1lrcktxm2: i2s1lrcktxm2 {
+			rockchip,pins =
+				<2 RK_PD2 5 &pcfg_pull_none>;
+		};
+		i2s1mclkm2: i2s1mclkm2 {
+			rockchip,pins =
+				<2 RK_PD0 5 &pcfg_pull_none>;
+		};
+		i2s1sclktxm2: i2s1sclktxm2 {
+			rockchip,pins =
+				<2 RK_PD1 5 &pcfg_pull_none>;
+		};
+		i2s1sdi0m2: i2s1sdi0m2 {
+			rockchip,pins =
+				<2 RK_PD3 5 &pcfg_pull_none>;
+		};
+		i2s1sdi1m2: i2s1sdi1m2 {
+			rockchip,pins =
+				<2 RK_PD4 5 &pcfg_pull_none>;
+		};
+		i2s1sdi2m2: i2s1sdi2m2 {
+			rockchip,pins =
+				<2 RK_PD5 5 &pcfg_pull_none>;
+		};
+		i2s1sdi3m2: i2s1sdi3m2 {
+			rockchip,pins =
+				<2 RK_PD6 5 &pcfg_pull_none>;
+		};
+		i2s1sdo0m2: i2s1sdo0m2 {
+			rockchip,pins =
+				<2 RK_PD7 5 &pcfg_pull_none>;
+		};
+		i2s1sdo1m2: i2s1sdo1m2 {
+			rockchip,pins =
+				<3 RK_PA0 5 &pcfg_pull_none>;
+		};
+		i2s1sdo2m2: i2s1sdo2m2 {
+			rockchip,pins =
+				<3 RK_PC1 5 &pcfg_pull_none>;
+		};
+		i2s1sdo3m2: i2s1sdo3m2 {
+			rockchip,pins =
+				<3 RK_PC2 5 &pcfg_pull_none>;
+		};
+		i2s1_sclkrxm: i2s1-sclkrxm {
+			rockchip,pins =
+				<3 RK_PC3 5 &pcfg_pull_none>;
+		};
+		i2s1_sdo3m: i2s1-sdo3m {
+			rockchip,pins =
+				<4 RK_PB5 4 &pcfg_pull_none>;
+		};
+	};
+	i2s2 {
+		i2s2lrckrxm0: i2s2lrckrxm0 {
+			rockchip,pins =
+				<2 RK_PC0 1 &pcfg_pull_none>;
+		};
+		i2s2lrcktxm0: i2s2lrcktxm0 {
+			rockchip,pins =
+				<2 RK_PC3 1 &pcfg_pull_none>;
+		};
+		i2s2mclkm0: i2s2mclkm0 {
+			rockchip,pins =
+				<2 RK_PC1 1 &pcfg_pull_none>;
+		};
+		i2s2sclkrxm0: i2s2sclkrxm0 {
+			rockchip,pins =
+				<2 RK_PB7 1 &pcfg_pull_none>;
+		};
+		i2s2sclktxm0: i2s2sclktxm0 {
+			rockchip,pins =
+				<2 RK_PC2 1 &pcfg_pull_none>;
+		};
+		i2s2sdim0: i2s2sdim0 {
+			rockchip,pins =
+				<2 RK_PC5 1 &pcfg_pull_none>;
+		};
+		i2s2sdom0: i2s2sdom0 {
+			rockchip,pins =
+				<2 RK_PC4 1 &pcfg_pull_none>;
+		};
+		i2s2lrckrxm1: i2s2lrckrxm1 {
+			rockchip,pins =
+				<4 RK_PA5 5 &pcfg_pull_none>;
+		};
+		i2s2lrcktxm1: i2s2lrcktxm1 {
+			rockchip,pins =
+				<4 RK_PA4 5 &pcfg_pull_none>;
+		};
+		i2s2mclkm1: i2s2mclkm1 {
+			rockchip,pins =
+				<4 RK_PB6 5 &pcfg_pull_none>;
+		};
+		i2s2sclkrxm1: i2s2sclkrxm1 {
+			rockchip,pins =
+				<4 RK_PC1 5 &pcfg_pull_none>;
+		};
+		i2s2sclktxm1: i2s2sclktxm1 {
+			rockchip,pins =
+				<4 RK_PB7 4 &pcfg_pull_none>;
+		};
+		i2s2sdim1: i2s2sdim1 {
+			rockchip,pins =
+				<4 RK_PB2 5 &pcfg_pull_none>;
+		};
+		i2s2sdom1: i2s2sdom1 {
+			rockchip,pins =
+				<4 RK_PB3 5 &pcfg_pull_none>;
+		};
+	};
+	i2s3 {
+		i2s3lrckm0: i2s3lrckm0 {
+			rockchip,pins =
+				<3 RK_PA4 4 &pcfg_pull_none>;
+		};
+		i2s3mclkm0: i2s3mclkm0 {
+			rockchip,pins =
+				<3 RK_PA2 4 &pcfg_pull_none>;
+		};
+		i2s3sclkm0: i2s3sclkm0 {
+			rockchip,pins =
+				<3 RK_PA3 4 &pcfg_pull_none>;
+		};
+		i2s3sdim0: i2s3sdim0 {
+			rockchip,pins =
+				<3 RK_PA6 4 &pcfg_pull_none>;
+		};
+		i2s3sdom0: i2s3sdom0 {
+			rockchip,pins =
+				<3 RK_PA5 4 &pcfg_pull_none>;
+		};
+		i2s3lrckm1: i2s3lrckm1 {
+			rockchip,pins =
+				<4 RK_PC4 5 &pcfg_pull_none>;
+		};
+		i2s3mclkm1: i2s3mclkm1 {
+			rockchip,pins =
+				<4 RK_PC2 5 &pcfg_pull_none>;
+		};
+		i2s3sclkm1: i2s3sclkm1 {
+			rockchip,pins =
+				<4 RK_PC3 5 &pcfg_pull_none>;
+		};
+		i2s3sdim1: i2s3sdim1 {
+			rockchip,pins =
+				<4 RK_PC6 5 &pcfg_pull_none>;
+		};
+		i2s3sdom1: i2s3sdom1 {
+			rockchip,pins =
+				<4 RK_PC5 5 &pcfg_pull_none>;
+		};
+	};
+	isp {
+		isp_pins: isp-pins {
+			rockchip,pins =
+				/* isp_flashtrigin */
+				<4 RK_PB4 4 &pcfg_pull_none>,
+				/* isp_flashtrigout */
+				<4 RK_PA6 1 &pcfg_pull_none>,
+				/* isp_prelighttrig */
+				<4 RK_PB1 1 &pcfg_pull_none>;
+		};
+	};
+	jtag {
+		jtag_pins: jtag-pins {
+			rockchip,pins =
+				/* jtag_tck */
+				<1 RK_PD7 2 &pcfg_pull_none>,
+				/* jtag_tms */
+				<2 RK_PA0 2 &pcfg_pull_none>;
+		};
+	};
+	lcdc {
+		lcdc_ctl: lcdc-ctl {
+			rockchip,pins =
+				/* lcdc_clk */
+				<3 RK_PA0 1 &pcfg_pull_none>,
+				/* lcdc_d0 */
+				<2 RK_PD0 1 &pcfg_pull_none>,
+				/* lcdc_d1 */
+				<2 RK_PD1 1 &pcfg_pull_none>,
+				/* lcdc_d2 */
+				<2 RK_PD2 1 &pcfg_pull_none>,
+				/* lcdc_d3 */
+				<2 RK_PD3 1 &pcfg_pull_none>,
+				/* lcdc_d4 */
+				<2 RK_PD4 1 &pcfg_pull_none>,
+				/* lcdc_d5 */
+				<2 RK_PD5 1 &pcfg_pull_none>,
+				/* lcdc_d6 */
+				<2 RK_PD6 1 &pcfg_pull_none>,
+				/* lcdc_d7 */
+				<2 RK_PD7 1 &pcfg_pull_none>,
+				/* lcdc_d8 */
+				<3 RK_PA1 1 &pcfg_pull_none>,
+				/* lcdc_d9 */
+				<3 RK_PA2 1 &pcfg_pull_none>,
+				/* lcdc_d10 */
+				<3 RK_PA3 1 &pcfg_pull_none>,
+				/* lcdc_d11 */
+				<3 RK_PA4 1 &pcfg_pull_none>,
+				/* lcdc_d12 */
+				<3 RK_PA5 1 &pcfg_pull_none>,
+				/* lcdc_d13 */
+				<3 RK_PA6 1 &pcfg_pull_none>,
+				/* lcdc_d14 */
+				<3 RK_PA7 1 &pcfg_pull_none>,
+				/* lcdc_d15 */
+				<3 RK_PB0 1 &pcfg_pull_none>,
+				/* lcdc_d16 */
+				<3 RK_PB1 1 &pcfg_pull_none>,
+				/* lcdc_d17 */
+				<3 RK_PB2 1 &pcfg_pull_none>,
+				/* lcdc_d18 */
+				<3 RK_PB3 1 &pcfg_pull_none>,
+				/* lcdc_d19 */
+				<3 RK_PB4 1 &pcfg_pull_none>,
+				/* lcdc_d20 */
+				<3 RK_PB5 1 &pcfg_pull_none>,
+				/* lcdc_d21 */
+				<3 RK_PB6 1 &pcfg_pull_none>,
+				/* lcdc_d22 */
+				<3 RK_PB7 1 &pcfg_pull_none>,
+				/* lcdc_d23 */
+				<3 RK_PC0 1 &pcfg_pull_none>,
+				/* lcdc_den */
+				<3 RK_PC3 1 &pcfg_pull_none>,
+				/* lcdc_hsync */
+				<3 RK_PC1 1 &pcfg_pull_none>,
+				/* lcdc_vsync */
+				<3 RK_PC2 1 &pcfg_pull_none>;
+		};
+	};
+	mcu {
+		mcu_pins: mcu-pins {
+			rockchip,pins =
+				/* mcu_jtagtck */
+				<0 RK_PB4 4 &pcfg_pull_none>,
+				/* mcu_jtagtdi */
+				<0 RK_PC1 4 &pcfg_pull_none>,
+				/* mcu_jtagtdo */
+				<0 RK_PB3 4 &pcfg_pull_none>,
+				/* mcu_jtagtms */
+				<0 RK_PC2 4 &pcfg_pull_none>,
+				/* mcu_jtagtrstn */
+				<0 RK_PC3 4 &pcfg_pull_none>;
+		};
+	};
+	npu {
+		npu_pins: npu-pins {
+			rockchip,pins =
+				/* npu_avs */
+				<0 RK_PC1 2 &pcfg_pull_none>;
+		};
+	};
+	pcie20 {
+		pcie20m0_pins: pcie20m0-pins {
+			rockchip,pins =
+				/* pcie20_clkreqnm0 */
+				<0 RK_PA5 3 &pcfg_pull_none>,
+				/* pcie20_perstnm0 */
+				<0 RK_PB6 3 &pcfg_pull_none>,
+				/* pcie20_wakenm0 */
+				<0 RK_PB5 3 &pcfg_pull_none>;
+		};
+		pcie20m1_pins: pcie20m1-pins {
+			rockchip,pins =
+				/* pcie20_clkreqnm1 */
+				<2 RK_PD0 4 &pcfg_pull_none>,
+				/* pcie20_perstnm1 */
+				<3 RK_PC1 4 &pcfg_pull_none>,
+				/* pcie20_wakenm1 */
+				<2 RK_PD1 4 &pcfg_pull_none>;
+		};
+		pcie20m2_pins: pcie20m2-pins {
+			rockchip,pins =
+				/* pcie20_clkreqnm2 */
+				<1 RK_PB0 4 &pcfg_pull_none>,
+				/* pcie20_perstnm2 */
+				<1 RK_PB2 4 &pcfg_pull_none>,
+				/* pcie20_wakenm2 */
+				<1 RK_PB1 4 &pcfg_pull_none>;
+		};
+		pcie20_buttonrstn: pcie20-buttonrstn {
+			rockchip,pins =
+				<0 RK_PB4 3 &pcfg_pull_none>;
+		};
+	};
+	pcie30x1 {
+		pcie30x1m0_pins: pcie30x1m0-pins {
+			rockchip,pins =
+				/* pcie30x1_clkreqnm0 */
+				<0 RK_PA4 3 &pcfg_pull_none>,
+				/* pcie30x1_perstnm0 */
+				<0 RK_PC3 3 &pcfg_pull_none>,
+				/* pcie30x1_wakenm0 */
+				<0 RK_PC2 3 &pcfg_pull_none>;
+		};
+		pcie30x1m1_pins: pcie30x1m1-pins {
+			rockchip,pins =
+				/* pcie30x1_clkreqnm1 */
+				<2 RK_PD2 4 &pcfg_pull_none>,
+				/* pcie30x1_perstnm1 */
+				<3 RK_PA1 4 &pcfg_pull_none>,
+				/* pcie30x1_wakenm1 */
+				<2 RK_PD3 4 &pcfg_pull_none>;
+		};
+		pcie30x1m2_pins: pcie30x1m2-pins {
+			rockchip,pins =
+				/* pcie30x1_clkreqnm2 */
+				<1 RK_PA5 4 &pcfg_pull_none>,
+				/* pcie30x1_perstnm2 */
+				<1 RK_PA2 4 &pcfg_pull_none>,
+				/* pcie30x1_wakenm2 */
+				<1 RK_PA3 4 &pcfg_pull_none>;
+		};
+		pcie30x1_buttonrstn: pcie30x1-buttonrstn {
+			rockchip,pins =
+				<0 RK_PB3 3 &pcfg_pull_none>;
+		};
+	};
+	pcie30x2 {
+		pcie30x2m0_pins: pcie30x2m0-pins {
+			rockchip,pins =
+				/* pcie30x2_clkreqnm0 */
+				<0 RK_PA6 2 &pcfg_pull_none>,
+				/* pcie30x2_perstnm0 */
+				<0 RK_PC6 3 &pcfg_pull_none>,
+				/* pcie30x2_wakenm0 */
+				<0 RK_PC5 3 &pcfg_pull_none>;
+		};
+		pcie30x2m1_pins: pcie30x2m1-pins {
+			rockchip,pins =
+				/* pcie30x2_clkreqnm1 */
+				<2 RK_PD4 4 &pcfg_pull_none>,
+				/* pcie30x2_perstnm1 */
+				<2 RK_PD6 4 &pcfg_pull_none>,
+				/* pcie30x2_wakenm1 */
+				<2 RK_PD5 4 &pcfg_pull_none>;
+		};
+		pcie30x2m2_pins: pcie30x2m2-pins {
+			rockchip,pins =
+				/* pcie30x2_clkreqnm2 */
+				<4 RK_PC2 4 &pcfg_pull_none>,
+				/* pcie30x2_perstnm2 */
+				<4 RK_PC4 4 &pcfg_pull_none>,
+				/* pcie30x2_wakenm2 */
+				<4 RK_PC3 4 &pcfg_pull_none>;
+		};
+		pcie30x2_buttonrstn: pcie30x2-buttonrstn {
+			rockchip,pins =
+				<0 RK_PB0 3 &pcfg_pull_none>;
+		};
+	};
+	pdm {
+		pdmm0_clk: pdmm0-clk {
+			rockchip,pins =
+				/* pdm_clk0m0 */
+				<1 RK_PA6 3 &pcfg_pull_none>;
+		};
+		pdmclk1m0: pdmclk1m0 {
+			rockchip,pins =
+				<1 RK_PA4 3 &pcfg_pull_none>;
+		};
+		pdmsdi0m0: pdmsdi0m0 {
+			rockchip,pins =
+				<1 RK_PB3 2 &pcfg_pull_none>;
+		};
+		pdmsdi1m0: pdmsdi1m0 {
+			rockchip,pins =
+				<1 RK_PB2 3 &pcfg_pull_none>;
+		};
+		pdmsdi2m0: pdmsdi2m0 {
+			rockchip,pins =
+				<1 RK_PB1 3 &pcfg_pull_none>;
+		};
+		pdmsdi3m0: pdmsdi3m0 {
+			rockchip,pins =
+				<1 RK_PB0 3 &pcfg_pull_none>;
+		};
+		pdmm1_clk: pdmm1-clk {
+			rockchip,pins =
+				/* pdm_clk0m1 */
+				<3 RK_PD6 5 &pcfg_pull_none>;
+		};
+		pdmclk1m1: pdmclk1m1 {
+			rockchip,pins =
+				<4 RK_PA0 4 &pcfg_pull_none>;
+		};
+		pdmsdi0m1: pdmsdi0m1 {
+			rockchip,pins =
+				<3 RK_PD7 5 &pcfg_pull_none>;
+		};
+		pdmsdi1m1: pdmsdi1m1 {
+			rockchip,pins =
+				<4 RK_PA1 4 &pcfg_pull_none>;
+		};
+		pdmsdi2m1: pdmsdi2m1 {
+			rockchip,pins =
+				<4 RK_PA2 5 &pcfg_pull_none>;
+		};
+		pdmsdi3m1: pdmsdi3m1 {
+			rockchip,pins =
+				<4 RK_PA3 5 &pcfg_pull_none>;
+		};
+		pdmclk1m2: pdmclk1m2 {
+			rockchip,pins =
+				<3 RK_PC4 5 &pcfg_pull_none>;
+		};
+		pdmsdi0m2: pdmsdi0m2 {
+			rockchip,pins =
+				<3 RK_PB3 5 &pcfg_pull_none>;
+		};
+		pdmsdi1m2: pdmsdi1m2 {
+			rockchip,pins =
+				<3 RK_PB4 5 &pcfg_pull_none>;
+		};
+		pdmsdi2m2: pdmsdi2m2 {
+			rockchip,pins =
+				<3 RK_PB7 5 &pcfg_pull_none>;
+		};
+		pdmsdi3m2: pdmsdi3m2 {
+			rockchip,pins =
+				<3 RK_PC0 5 &pcfg_pull_none>;
+		};
+	};
+	pmic {
+		pmic_pins: pmic-pins {
+			rockchip,pins =
+				/* pmic_sleep */
+				<0 RK_PA2 1 &pcfg_pull_none>;
+		};
+	};
+	pmu {
+		pmu_pins: pmu-pins {
+			rockchip,pins =
+				/* pmu_debug0 */
+				<0 RK_PA5 4 &pcfg_pull_none>,
+				/* pmu_debug1 */
+				<0 RK_PA6 3 &pcfg_pull_none>,
+				/* pmu_debug2 */
+				<0 RK_PC4 4 &pcfg_pull_none>,
+				/* pmu_debug3 */
+				<0 RK_PC5 4 &pcfg_pull_none>,
+				/* pmu_debug4 */
+				<0 RK_PC6 4 &pcfg_pull_none>,
+				/* pmu_debug5 */
+				<0 RK_PC7 4 &pcfg_pull_none>;
+		};
+	};
+	pwm0 {
+		pwm0m0_pins: pwm0m0-pins {
+			rockchip,pins =
+				/* pwm0_m0 */
+				<0 RK_PB7 1 &pcfg_pull_none>;
+		};
+		pwm0m1_pins: pwm0m1-pins {
+			rockchip,pins =
+				/* pwm0_m1 */
+				<0 RK_PC7 2 &pcfg_pull_none>;
+		};
+	};
+	pwm1 {
+		pwm1m0_pins: pwm1m0-pins {
+			rockchip,pins =
+				/* pwm1_m0 */
+				<0 RK_PC0 1 &pcfg_pull_none>;
+		};
+		pwm1m1_pins: pwm1m1-pins {
+			rockchip,pins =
+				/* pwm1_m1 */
+				<0 RK_PB5 4 &pcfg_pull_none>;
+		};
+	};
+	pwm2 {
+		pwm2m0_pins: pwm2m0-pins {
+			rockchip,pins =
+				/* pwm2_m0 */
+				<0 RK_PC1 1 &pcfg_pull_none>;
+		};
+		pwm2m1_pins: pwm2m1-pins {
+			rockchip,pins =
+				/* pwm2_m1 */
+				<0 RK_PB6 4 &pcfg_pull_none>;
+		};
+	};
+	pwm3 {
+		pwm3_pins: pwm3-pins {
+			rockchip,pins =
+				/* pwm3_ir */
+				<0 RK_PC2 1 &pcfg_pull_none>;
+		};
+	};
+	pwm4 {
+		pwm4_pins: pwm4-pins {
+			rockchip,pins =
+				/* pwm4 */
+				<0 RK_PC3 1 &pcfg_pull_none>;
+		};
+	};
+	pwm5 {
+		pwm5_pins: pwm5-pins {
+			rockchip,pins =
+				/* pwm5 */
+				<0 RK_PC4 1 &pcfg_pull_none>;
+		};
+	};
+	pwm6 {
+		pwm6_pins: pwm6-pins {
+			rockchip,pins =
+				/* pwm6 */
+				<0 RK_PC5 1 &pcfg_pull_none>;
+		};
+	};
+	pwm7 {
+		pwm7_pins: pwm7-pins {
+			rockchip,pins =
+				/* pwm7_ir */
+				<0 RK_PC6 1 &pcfg_pull_none>;
+		};
+	};
+	pwm8 {
+		pwm8m0_pins: pwm8m0-pins {
+			rockchip,pins =
+				/* pwm8_m0 */
+				<3 RK_PB1 5 &pcfg_pull_none>;
+		};
+		pwm8m1_pins: pwm8m1-pins {
+			rockchip,pins =
+				/* pwm8_m1 */
+				<1 RK_PD5 4 &pcfg_pull_none>;
+		};
+	};
+	pwm9 {
+		pwm9m0_pins: pwm9m0-pins {
+			rockchip,pins =
+				/* pwm9_m0 */
+				<3 RK_PB2 5 &pcfg_pull_none>;
+		};
+		pwm9m1_pins: pwm9m1-pins {
+			rockchip,pins =
+				/* pwm9_m1 */
+				<1 RK_PD6 4 &pcfg_pull_none>;
+		};
+	};
+	pwm10 {
+		pwm10m0_pins: pwm10m0-pins {
+			rockchip,pins =
+				/* pwm10_m0 */
+				<3 RK_PB5 5 &pcfg_pull_none>;
+		};
+		pwm10m1_pins: pwm10m1-pins {
+			rockchip,pins =
+				/* pwm10_m1 */
+				<2 RK_PA1 2 &pcfg_pull_none>;
+		};
+	};
+	pwm11 {
+		pwm11m0_pins: pwm11m0-pins {
+			rockchip,pins =
+				/* pwm11_irm0 */
+				<3 RK_PB6 5 &pcfg_pull_none>;
+		};
+		pwm11m1_pins: pwm11m1-pins {
+			rockchip,pins =
+				/* pwm11_irm1 */
+				<4 RK_PC0 3 &pcfg_pull_none>;
+		};
+	};
+	pwm12 {
+		pwm12m0_pins: pwm12m0-pins {
+			rockchip,pins =
+				/* pwm12_m0 */
+				<3 RK_PB7 2 &pcfg_pull_none>;
+		};
+		pwm12m1_pins: pwm12m1-pins {
+			rockchip,pins =
+				/* pwm12_m1 */
+				<4 RK_PC5 1 &pcfg_pull_none>;
+		};
+	};
+	pwm13 {
+		pwm13m0_pins: pwm13m0-pins {
+			rockchip,pins =
+				/* pwm13_m0 */
+				<3 RK_PC0 2 &pcfg_pull_none>;
+		};
+		pwm13m1_pins: pwm13m1-pins {
+			rockchip,pins =
+				/* pwm13_m1 */
+				<4 RK_PC6 1 &pcfg_pull_none>;
+		};
+	};
+	pwm14 {
+		pwm14m0_pins: pwm14m0-pins {
+			rockchip,pins =
+				/* pwm14_m0 */
+				<3 RK_PC4 1 &pcfg_pull_none>;
+		};
+		pwm14m1_pins: pwm14m1-pins {
+			rockchip,pins =
+				/* pwm14_m1 */
+				<4 RK_PC2 1 &pcfg_pull_none>;
+		};
+	};
+	pwm15 {
+		pwm15m0_pins: pwm15m0-pins {
+			rockchip,pins =
+				/* pwm15_irm0 */
+				<3 RK_PC5 1 &pcfg_pull_none>;
+		};
+		pwm15m1_pins: pwm15m1-pins {
+			rockchip,pins =
+				/* pwm15_irm1 */
+				<4 RK_PC3 1 &pcfg_pull_none>;
+		};
+	};
+	refclk {
+		refclk_pins: refclk-pins {
+			rockchip,pins =
+				/* refclk_ou */
+				<0 RK_PA0 1 &pcfg_pull_none>;
+		};
+	};
+	sata {
+		sata_pins: sata-pins {
+			rockchip,pins =
+				/* sata_cpdet */
+				<0 RK_PA4 2 &pcfg_pull_none>,
+				/* sata_cppod */
+				<0 RK_PA6 1 &pcfg_pull_none>,
+				/* sata_mpswitch */
+				<0 RK_PA5 2 &pcfg_pull_none>;
+		};
+	};
+	sata0 {
+		sata0_pins: sata0-pins {
+			rockchip,pins =
+				/* sata0_actled */
+				<4 RK_PC6 3 &pcfg_pull_none>;
+		};
+	};
+	sata1 {
+		sata1_pins: sata1-pins {
+			rockchip,pins =
+				/* sata1_actled */
+				<4 RK_PC5 3 &pcfg_pull_none>;
+		};
+	};
+	sata2 {
+		sata2_pins: sata2-pins {
+			rockchip,pins =
+				/* sata2_actled */
+				<4 RK_PC4 3 &pcfg_pull_none>;
+		};
+	};
+	scr {
+		scr_pins: scr-pins {
+			rockchip,pins =
+				/* scr_clk */
+				<1 RK_PA2 3 &pcfg_pull_none>,
+				/* scr_det */
+				<1 RK_PA7 3 &pcfg_pull_none>,
+				/* scr_io */
+				<1 RK_PA3 3 &pcfg_pull_none>,
+				/* scr_rst */
+				<1 RK_PA5 3 &pcfg_pull_none>;
+		};
+	};
+	sdmmc0 {
+		sdmmc0_bus4: sdmmc0-bus4 {
+			rockchip,pins =
+				/* sdmmc0_d0 */
+				<1 RK_PD5 1 &pcfg_pull_up_drv_level_2>,
+				/* sdmmc0_d1 */
+				<1 RK_PD6 1 &pcfg_pull_up_drv_level_2>,
+				/* sdmmc0_d2 */
+				<1 RK_PD7 1 &pcfg_pull_up_drv_level_2>,
+				/* sdmmc0_d3 */
+				<2 RK_PA0 1 &pcfg_pull_up_drv_level_2>;
+		};
+		sdmmc0_clk: sdmmc0-clk {
+			rockchip,pins =
+				/* sdmmc0_clk */
+				<2 RK_PA2 1 &pcfg_pull_up_drv_level_2>;
+		};
+		sdmmc0_cmd: sdmmc0-cmd {
+			rockchip,pins =
+				/* sdmmc0_cmd */
+				<2 RK_PA1 1 &pcfg_pull_up_drv_level_2>;
+		};
+		sdmmc0_det: sdmmc0-det {
+			rockchip,pins =
+				<0 RK_PA4 1 &pcfg_pull_none>;
+		};
+		sdmmc0_pwren: sdmmc0-pwren {
+			rockchip,pins =
+				<0 RK_PA5 1 &pcfg_pull_none>;
+		};
+	};
+	sdmmc1 {
+		sdmmc1_bus4: sdmmc1-bus4 {
+			rockchip,pins =
+				/* sdmmc1_d0 */
+				<2 RK_PA3 1 &pcfg_pull_up_drv_level_2>,
+				/* sdmmc1_d1 */
+				<2 RK_PA4 1 &pcfg_pull_up_drv_level_2>,
+				/* sdmmc1_d2 */
+				<2 RK_PA5 1 &pcfg_pull_up_drv_level_2>,
+				/* sdmmc1_d3 */
+				<2 RK_PA6 1 &pcfg_pull_up_drv_level_2>;
+		};
+		sdmmc1_clk: sdmmc1-clk {
+			rockchip,pins =
+				/* sdmmc1_clk */
+				<2 RK_PB0 1 &pcfg_pull_up_drv_level_2>;
+		};
+		sdmmc1_cmd: sdmmc1-cmd {
+			rockchip,pins =
+				/* sdmmc1_cmd */
+				<2 RK_PA7 1 &pcfg_pull_up_drv_level_2>;
+		};
+		sdmmc1_det: sdmmc1-det {
+			rockchip,pins =
+				<2 RK_PB2 1 &pcfg_pull_none>;
+		};
+		sdmmc1_pwren: sdmmc1-pwren {
+			rockchip,pins =
+				<2 RK_PB1 1 &pcfg_pull_none>;
+		};
+	};
+	sdmmc2 {
+		sdmmc2m0_bus4: sdmmc2m0-bus4 {
+			rockchip,pins =
+				/* sdmmc2_d0m0 */
+				<3 RK_PC6 3 &pcfg_pull_up_drv_level_2>,
+				/* sdmmc2_d1m0 */
+				<3 RK_PC7 3 &pcfg_pull_up_drv_level_2>,
+				/* sdmmc2_d2m0 */
+				<3 RK_PD0 3 &pcfg_pull_up_drv_level_2>,
+				/* sdmmc2_d3m0 */
+				<3 RK_PD1 3 &pcfg_pull_up_drv_level_2>;
+		};
+		sdmmc2m0_clk: sdmmc2m0-clk {
+			rockchip,pins =
+				/* sdmmc2_clkm0 */
+				<3 RK_PD3 3 &pcfg_pull_up_drv_level_2>;
+		};
+		sdmmc2m0_cmd: sdmmc2m0-cmd {
+			rockchip,pins =
+				/* sdmmc2_cmdm0 */
+				<3 RK_PD2 3 &pcfg_pull_up_drv_level_2>;
+		};
+		sdmmc2detm0: sdmmc2detm0 {
+			rockchip,pins =
+				<3 RK_PD4 3 &pcfg_pull_none>;
+		};
+		sdmmc2pwrenm0: sdmmc2pwrenm0 {
+			rockchip,pins =
+				<3 RK_PD5 3 &pcfg_pull_none>;
+		};
+		sdmmc2m1_bus4: sdmmc2m1-bus4 {
+			rockchip,pins =
+				/* sdmmc2_d0m1 */
+				<3 RK_PA1 5 &pcfg_pull_up_drv_level_2>,
+				/* sdmmc2_d1m1 */
+				<3 RK_PA2 5 &pcfg_pull_up_drv_level_2>,
+				/* sdmmc2_d2m1 */
+				<3 RK_PA3 5 &pcfg_pull_up_drv_level_2>,
+				/* sdmmc2_d3m1 */
+				<3 RK_PA4 5 &pcfg_pull_up_drv_level_2>;
+		};
+		sdmmc2m1_clk: sdmmc2m1-clk {
+			rockchip,pins =
+				/* sdmmc2_clkm1 */
+				<3 RK_PA6 5 &pcfg_pull_up_drv_level_2>;
+		};
+		sdmmc2m1_cmd: sdmmc2m1-cmd {
+			rockchip,pins =
+				/* sdmmc2_cmdm1 */
+				<3 RK_PA5 5 &pcfg_pull_up_drv_level_2>;
+		};
+		sdmmc2detm1: sdmmc2detm1 {
+			rockchip,pins =
+				<3 RK_PA7 4 &pcfg_pull_none>;
+		};
+		sdmmc2pwrenm1: sdmmc2pwrenm1 {
+			rockchip,pins =
+				<3 RK_PB0 4 &pcfg_pull_none>;
+		};
+	};
+	spdif {
+		spdifm0_pins: spdifm0-pins {
+			rockchip,pins =
+				/* spdif_txm0 */
+				<1 RK_PA4 4 &pcfg_pull_none>;
+		};
+		spdifm1_pins: spdifm1-pins {
+			rockchip,pins =
+				/* spdif_txm1 */
+				<3 RK_PC5 2 &pcfg_pull_none>;
+		};
+		spdifm2_pins: spdifm2-pins {
+			rockchip,pins =
+				/* spdif_txm2 */
+				<4 RK_PC4 2 &pcfg_pull_none>;
+		};
+	};
+	spi0 {
+		spi0clkm0: spi0clkm0 {
+			rockchip,pins =
+				<0 RK_PB5 2 &pcfg_pull_none>;
+		};
+		spi0cs0m0: spi0cs0m0 {
+			rockchip,pins =
+				<0 RK_PC6 2 &pcfg_pull_none>;
+		};
+		spi0cs1m0: spi0cs1m0 {
+			rockchip,pins =
+				<0 RK_PC4 2 &pcfg_pull_none>;
+		};
+		spi0misom0: spi0misom0 {
+			rockchip,pins =
+				<0 RK_PC5 2 &pcfg_pull_none>;
+		};
+		spi0mosim0: spi0mosim0 {
+			rockchip,pins =
+				<0 RK_PB6 2 &pcfg_pull_none>;
+		};
+		spi0clkm1: spi0clkm1 {
+			rockchip,pins =
+				<2 RK_PD3 3 &pcfg_pull_none>;
+		};
+		spi0cs0m1: spi0cs0m1 {
+			rockchip,pins =
+				<2 RK_PD2 3 &pcfg_pull_none>;
+		};
+		spi0misom1: spi0misom1 {
+			rockchip,pins =
+				<2 RK_PD0 3 &pcfg_pull_none>;
+		};
+		spi0mosim1: spi0mosim1 {
+			rockchip,pins =
+				<2 RK_PD1 3 &pcfg_pull_none>;
+		};
+	};
+	spi1 {
+		spi1clkm0: spi1clkm0 {
+			rockchip,pins =
+				<2 RK_PB5 3 &pcfg_pull_none>;
+		};
+		spi1cs0m0: spi1cs0m0 {
+			rockchip,pins =
+				<2 RK_PC0 4 &pcfg_pull_none>;
+		};
+		spi1cs1m0: spi1cs1m0 {
+			rockchip,pins =
+				<2 RK_PC6 3 &pcfg_pull_none>;
+		};
+		spi1misom0: spi1misom0 {
+			rockchip,pins =
+				<2 RK_PB6 3 &pcfg_pull_none>;
+		};
+		spi1mosim0: spi1mosim0 {
+			rockchip,pins =
+				<2 RK_PB7 4 &pcfg_pull_none>;
+		};
+		spi1clkm1: spi1clkm1 {
+			rockchip,pins =
+				<3 RK_PC3 3 &pcfg_pull_none>;
+		};
+		spi1cs0m1: spi1cs0m1 {
+			rockchip,pins =
+				<3 RK_PA1 3 &pcfg_pull_none>;
+		};
+		spi1misom1: spi1misom1 {
+			rockchip,pins =
+				<3 RK_PC2 3 &pcfg_pull_none>;
+		};
+		spi1mosim1: spi1mosim1 {
+			rockchip,pins =
+				<3 RK_PC1 3 &pcfg_pull_none>;
+		};
+	};
+	spi2 {
+		spi2clkm0: spi2clkm0 {
+			rockchip,pins =
+				<2 RK_PC1 4 &pcfg_pull_none>;
+		};
+		spi2cs0m0: spi2cs0m0 {
+			rockchip,pins =
+				<2 RK_PC4 4 &pcfg_pull_none>;
+		};
+		spi2cs1m0: spi2cs1m0 {
+			rockchip,pins =
+				<2 RK_PC5 4 &pcfg_pull_none>;
+		};
+		spi2misom0: spi2misom0 {
+			rockchip,pins =
+				<2 RK_PC2 4 &pcfg_pull_none>;
+		};
+		spi2mosim0: spi2mosim0 {
+			rockchip,pins =
+				<2 RK_PC3 4 &pcfg_pull_none>;
+		};
+		spi2clkm1: spi2clkm1 {
+			rockchip,pins =
+				<3 RK_PA0 3 &pcfg_pull_none>;
+		};
+		spi2cs0m1: spi2cs0m1 {
+			rockchip,pins =
+				<2 RK_PD5 3 &pcfg_pull_none>;
+		};
+		spi2cs1m1: spi2cs1m1 {
+			rockchip,pins =
+				<2 RK_PD4 3 &pcfg_pull_none>;
+		};
+		spi2misom1: spi2misom1 {
+			rockchip,pins =
+				<2 RK_PD7 3 &pcfg_pull_none>;
+		};
+		spi2mosim1: spi2mosim1 {
+			rockchip,pins =
+				<2 RK_PD6 3 &pcfg_pull_none>;
+		};
+	};
+	spi3 {
+		spi3clkm0: spi3clkm0 {
+			rockchip,pins =
+				<4 RK_PB3 4 &pcfg_pull_none>;
+		};
+		spi3cs0m0: spi3cs0m0 {
+			rockchip,pins =
+				<4 RK_PA6 4 &pcfg_pull_none>;
+		};
+		spi3cs1m0: spi3cs1m0 {
+			rockchip,pins =
+				<4 RK_PA7 4 &pcfg_pull_none>;
+		};
+		spi3misom0: spi3misom0 {
+			rockchip,pins =
+				<4 RK_PB0 4 &pcfg_pull_none>;
+		};
+		spi3mosim0: spi3mosim0 {
+			rockchip,pins =
+				<4 RK_PB2 4 &pcfg_pull_none>;
+		};
+		spi3clkm1: spi3clkm1 {
+			rockchip,pins =
+				<4 RK_PC2 2 &pcfg_pull_none>;
+		};
+		spi3cs0m1: spi3cs0m1 {
+			rockchip,pins =
+				<4 RK_PC6 2 &pcfg_pull_none>;
+		};
+		spi3cs1m1: spi3cs1m1 {
+			rockchip,pins =
+				<4 RK_PD1 2 &pcfg_pull_none>;
+		};
+		spi3misom1: spi3misom1 {
+			rockchip,pins =
+				<4 RK_PC5 2 &pcfg_pull_none>;
+		};
+		spi3mosim1: spi3mosim1 {
+			rockchip,pins =
+				<4 RK_PC3 2 &pcfg_pull_none>;
+		};
+	};
+	tsadc {
+		tsadcm0_pins: tsadcm0-pins {
+			rockchip,pins =
+				/* tsadc_shutm0 */
+				<0 RK_PA1 1 &pcfg_pull_none>;
+		};
+		tsadcm1_pins: tsadcm1-pins {
+			rockchip,pins =
+				/* tsadc_shutm1 */
+				<0 RK_PA2 2 &pcfg_pull_none>;
+		};
+		tsadc_shutorg: tsadc-shutorg {
+			rockchip,pins =
+				<0 RK_PA1 2 &pcfg_pull_none>;
+		};
+	};
+	uart0 {
+		uart0_xfer: uart0-xfer {
+			rockchip,pins =
+				/* uart0_rx */
+				<0 RK_PC0 3 &pcfg_pull_up>,
+				/* uart0_tx */
+				<0 RK_PC1 3 &pcfg_pull_up>;
+		};
+		uart0_ctsn: uart0-ctsn {
+			rockchip,pins =
+				<0 RK_PC7 3 &pcfg_pull_none>;
+		};
+		uart0_rtsn: uart0-rtsn {
+			rockchip,pins =
+				<0 RK_PC4 3 &pcfg_pull_none>;
+		};
+	};
+	uart1 {
+		uart1m0_xfer: uart1m0-xfer {
+			rockchip,pins =
+				/* uart1_rxm0 */
+				<2 RK_PB3 2 &pcfg_pull_up>,
+				/* uart1_txm0 */
+				<2 RK_PB4 2 &pcfg_pull_up>;
+		};
+		uart1ctsnm0: uart1ctsnm0 {
+			rockchip,pins =
+				<2 RK_PB6 2 &pcfg_pull_none>;
+		};
+		uart1rtsnm0: uart1rtsnm0 {
+			rockchip,pins =
+				<2 RK_PB5 2 &pcfg_pull_none>;
+		};
+		uart1m1_xfer: uart1m1-xfer {
+			rockchip,pins =
+				/* uart1_rxm1 */
+				<3 RK_PD7 4 &pcfg_pull_up>,
+				/* uart1_txm1 */
+				<3 RK_PD6 4 &pcfg_pull_up>;
+		};
+		uart1ctsnm1: uart1ctsnm1 {
+			rockchip,pins =
+				<4 RK_PC1 4 &pcfg_pull_none>;
+		};
+		uart1rtsnm1: uart1rtsnm1 {
+			rockchip,pins =
+				<4 RK_PB6 4 &pcfg_pull_none>;
+		};
+	};
+	uart2 {
+		uart2m0_xfer: uart2m0-xfer {
+			rockchip,pins =
+				/* uart2_rxm0 */
+				<0 RK_PD0 1 &pcfg_pull_up>,
+				/* uart2_txm0 */
+				<0 RK_PD1 1 &pcfg_pull_up>;
+		};
+		uart2m1_xfer: uart2m1-xfer {
+			rockchip,pins =
+				/* uart2_rxm1 */
+				<1 RK_PD6 2 &pcfg_pull_up>,
+				/* uart2_txm1 */
+				<1 RK_PD5 2 &pcfg_pull_up>;
+		};
+	};
+	uart3 {
+		uart3m0_xfer: uart3m0-xfer {
+			rockchip,pins =
+				/* uart3_rxm0 */
+				<1 RK_PA0 2 &pcfg_pull_up>,
+				/* uart3_txm0 */
+				<1 RK_PA1 2 &pcfg_pull_up>;
+		};
+		uart3ctsnm0: uart3ctsnm0 {
+			rockchip,pins =
+				<1 RK_PA3 2 &pcfg_pull_none>;
+		};
+		uart3rtsnm0: uart3rtsnm0 {
+			rockchip,pins =
+				<1 RK_PA2 2 &pcfg_pull_none>;
+		};
+		uart3m1_xfer: uart3m1-xfer {
+			rockchip,pins =
+				/* uart3_rxm1 */
+				<3 RK_PC0 4 &pcfg_pull_up>,
+				/* uart3_txm1 */
+				<3 RK_PB7 4 &pcfg_pull_up>;
+		};
+	};
+	uart4 {
+		uart4m0_xfer: uart4m0-xfer {
+			rockchip,pins =
+				/* uart4_rxm0 */
+				<1 RK_PA4 2 &pcfg_pull_up>,
+				/* uart4_txm0 */
+				<1 RK_PA6 2 &pcfg_pull_up>;
+		};
+		uart4ctsnm0: uart4ctsnm0 {
+			rockchip,pins =
+				<1 RK_PA7 2 &pcfg_pull_none>;
+		};
+		uart4rtsnm0: uart4rtsnm0 {
+			rockchip,pins =
+				<1 RK_PA5 2 &pcfg_pull_none>;
+		};
+		uart4m1_xfer: uart4m1-xfer {
+			rockchip,pins =
+				/* uart4_rxm1 */
+				<3 RK_PB1 4 &pcfg_pull_up>,
+				/* uart4_txm1 */
+				<3 RK_PB2 4 &pcfg_pull_up>;
+		};
+	};
+	uart5 {
+		uart5m0_xfer: uart5m0-xfer {
+			rockchip,pins =
+				/* uart5_rxm0 */
+				<2 RK_PA1 3 &pcfg_pull_up>,
+				/* uart5_txm0 */
+				<2 RK_PA2 3 &pcfg_pull_up>;
+		};
+		uart5ctsnm0: uart5ctsnm0 {
+			rockchip,pins =
+				<1 RK_PD7 3 &pcfg_pull_none>;
+		};
+		uart5rtsnm0: uart5rtsnm0 {
+			rockchip,pins =
+				<2 RK_PA0 3 &pcfg_pull_none>;
+		};
+		uart5m1_xfer: uart5m1-xfer {
+			rockchip,pins =
+				/* uart5_rxm1 */
+				<3 RK_PC3 4 &pcfg_pull_up>,
+				/* uart5_txm1 */
+				<3 RK_PC2 4 &pcfg_pull_up>;
+		};
+	};
+	uart6 {
+		uart6m0_xfer: uart6m0-xfer {
+			rockchip,pins =
+				/* uart6_rxm0 */
+				<2 RK_PA3 3 &pcfg_pull_up>,
+				/* uart6_txm0 */
+				<2 RK_PA4 3 &pcfg_pull_up>;
+		};
+		uart6ctsnm0: uart6ctsnm0 {
+			rockchip,pins =
+				<2 RK_PC0 3 &pcfg_pull_none>;
+		};
+		uart6rtsnm0: uart6rtsnm0 {
+			rockchip,pins =
+				<2 RK_PB7 3 &pcfg_pull_none>;
+		};
+		uart6m1_xfer: uart6m1-xfer {
+			rockchip,pins =
+				/* uart6_rxm1 */
+				<1 RK_PD6 3 &pcfg_pull_up>,
+				/* uart6_txm1 */
+				<1 RK_PD5 3 &pcfg_pull_up>;
+		};
+	};
+	uart7 {
+		uart7m0_xfer: uart7m0-xfer {
+			rockchip,pins =
+				/* uart7_rxm0 */
+				<2 RK_PA5 3 &pcfg_pull_up>,
+				/* uart7_txm0 */
+				<2 RK_PA6 3 &pcfg_pull_up>;
+		};
+		uart7ctsnm0: uart7ctsnm0 {
+			rockchip,pins =
+				<2 RK_PC2 3 &pcfg_pull_none>;
+		};
+		uart7rtsnm0: uart7rtsnm0 {
+			rockchip,pins =
+				<2 RK_PC1 3 &pcfg_pull_none>;
+		};
+		uart7m1_xfer: uart7m1-xfer {
+			rockchip,pins =
+				/* uart7_rxm1 */
+				<3 RK_PC5 4 &pcfg_pull_up>,
+				/* uart7_txm1 */
+				<3 RK_PC4 4 &pcfg_pull_up>;
+		};
+		uart7m2_xfer: uart7m2-xfer {
+			rockchip,pins =
+				/* uart7_rxm2 */
+				<4 RK_PA3 4 &pcfg_pull_up>,
+				/* uart7_txm2 */
+				<4 RK_PA2 4 &pcfg_pull_up>;
+		};
+	};
+	uart8 {
+		uart8m0_xfer: uart8m0-xfer {
+			rockchip,pins =
+				/* uart8_rxm0 */
+				<2 RK_PC6 2 &pcfg_pull_up>,
+				/* uart8_txm0 */
+				<2 RK_PC5 3 &pcfg_pull_up>;
+		};
+		uart8ctsnm0: uart8ctsnm0 {
+			rockchip,pins =
+				<2 RK_PB2 3 &pcfg_pull_none>;
+		};
+		uart8rtsnm0: uart8rtsnm0 {
+			rockchip,pins =
+				<2 RK_PB1 3 &pcfg_pull_none>;
+		};
+		uart8m1_xfer: uart8m1-xfer {
+			rockchip,pins =
+				/* uart8_rxm1 */
+				<3 RK_PA0 4 &pcfg_pull_up>,
+				/* uart8_txm1 */
+				<2 RK_PD7 4 &pcfg_pull_up>;
+		};
+	};
+	uart9 {
+		uart9m0_xfer: uart9m0-xfer {
+			rockchip,pins =
+				/* uart9_rxm0 */
+				<2 RK_PA7 3 &pcfg_pull_up>,
+				/* uart9_txm0 */
+				<2 RK_PB0 3 &pcfg_pull_up>;
+		};
+		uart9ctsnm0: uart9ctsnm0 {
+			rockchip,pins =
+				<2 RK_PC4 3 &pcfg_pull_none>;
+		};
+		uart9rtsnm0: uart9rtsnm0 {
+			rockchip,pins =
+				<2 RK_PC3 3 &pcfg_pull_none>;
+		};
+		uart9m1_xfer: uart9m1-xfer {
+			rockchip,pins =
+				/* uart9_rxm1 */
+				<4 RK_PC6 4 &pcfg_pull_up>,
+				/* uart9_txm1 */
+				<4 RK_PC5 4 &pcfg_pull_up>;
+		};
+		uart9m2_xfer: uart9m2-xfer {
+			rockchip,pins =
+				/* uart9_rxm2 */
+				<4 RK_PA5 4 &pcfg_pull_up>,
+				/* uart9_txm2 */
+				<4 RK_PA4 4 &pcfg_pull_up>;
+		};
+	};
+	vop {
+		vopm0_pins: vopm0-pins {
+			rockchip,pins =
+				/* vop_pwmm0 */
+				<0 RK_PC3 2 &pcfg_pull_none>;
+		};
+		vopm1_pins: vopm1-pins {
+			rockchip,pins =
+				/* vop_pwmm1 */
+				<3 RK_PC4 2 &pcfg_pull_none>;
+		};
+	};
+};
diff --git a/arch/arm/dts/rk3568-u-boot.dtsi b/arch/arm/dts/rk3568-u-boot.dtsi
new file mode 100644
index 0000000000..c37f435ec8
--- /dev/null
+++ b/arch/arm/dts/rk3568-u-boot.dtsi
@@ -0,0 +1,64 @@
+/*
+ * (C) Copyright 2020 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+/ {
+	aliases {
+		mmc0 = &sdhci;
+		mmc1 = &sdmmc0;
+		mmc2 = &sdmmc1;
+	};
+
+	chosen {
+		stdout-path = &uart2;
+	};
+};
+
+&uart2 {
+	clock-frequency = <24000000>;
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&grf {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&pmugrf {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&cru {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&pmucru {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&saradc {
+	u-boot,dm-spl;
+	status = "okay";
+};
+
+&sdmmc0 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&sdmmc1 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&sdhci {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
diff --git a/arch/arm/dts/rk3568.dtsi b/arch/arm/dts/rk3568.dtsi
new file mode 100644
index 0000000000..4730b099d0
--- /dev/null
+++ b/arch/arm/dts/rk3568.dtsi
@@ -0,0 +1,1395 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 Rockchip Electronics Co., Ltd.
+ */
+
+#include <dt-bindings/clock/rk3568-cru.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/power/rk3568-power.h>
+
+/ {
+	compatible = "rockchip,rk3568";
+
+	interrupt-parent = <&gic>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	aliases {
+		i2c0 = &i2c0;
+		i2c1 = &i2c1;
+		i2c2 = &i2c2;
+		i2c3 = &i2c3;
+		i2c4 = &i2c4;
+		i2c5 = &i2c5;
+		serial0 = &uart0;
+		serial1 = &uart1;
+		serial2 = &uart2;
+		serial3 = &uart3;
+		serial4 = &uart4;
+		serial5 = &uart5;
+		serial6 = &uart6;
+		serial7 = &uart7;
+		serial8 = &uart8;
+		serial9 = &uart9;
+		spi0 = &spi0;
+		spi1 = &spi1;
+		spi2 = &spi2;
+		spi3 = &spi3;
+	};
+
+	cpus {
+		#address-cells = <2>;
+		#size-cells = <0>;
+
+		cpu0: cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a55";
+			reg = <0x0 0x0>;
+			enable-method = "psci";
+		};
+#if 0
+		cpu1: cpu@100 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a55";
+			reg = <0x0 0x100>;
+			enable-method = "psci";
+		};
+
+		cpu2: cpu@200 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a55";
+			reg = <0x0 0x200>;
+			enable-method = "psci";
+		};
+
+		cpu3: cpu@300 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a55";
+			reg = <0x0 0x300>;
+			enable-method = "psci";
+		};
+#endif
+	};
+
+#if 0
+	arm-pmu {
+		compatible = "arm,cortex-a55-pmu", "arm,armv8-pmuv3";
+		interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
+	};
+#endif
+
+	psci {
+		compatible = "arm,psci-1.0";
+		method = "smc";
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+	};
+
+	xin24m: xin24m {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <24000000>;
+		clock-output-names = "xin24m";
+	};
+
+	usbdrd30: usbdrd {
+		compatible = "rockchip,rk3568-dwc3", "rockchip,rk3399-dwc3";
+		clocks = <&cru CLK_USB3OTG0_REF>, <&cru CLK_USB3OTG0_SUSPEND>,
+			 <&cru ACLK_USB3OTG0>;
+		clock-names = "ref_clk", "suspend_clk",
+			      "bus_clk";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+		status = "disabled";
+
+		usbdrd_dwc3: dwc3@fcc00000 {
+			compatible = "snps,dwc3";
+			reg = <0x0 0xfcc00000 0x0 0x400000>;
+			interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
+			dr_mode = "otg";
+			phy_type = "utmi_wide";
+			power-domains = <&power RK3568_PD_PIPE>;
+			resets = <&cru SRST_USB3OTG0>;
+			reset-names = "usb3-otg";
+			snps,dis_enblslpm_quirk;
+			snps,dis-u2-freeclk-exists-quirk;
+			snps,dis_u2_susphy_quirk;
+			snps,dis-del-phy-power-chg-quirk;
+			snps,dis-tx-ipgap-linecheck-quirk;
+			snps,xhci-trb-ent-quirk;
+			status = "disabled";
+		};
+	};
+
+	usbhost30: usbhost {
+		compatible = "rockchip,rk3568-dwc3", "rockchip,rk3399-dwc3";
+		clocks = <&cru CLK_USB3OTG1_REF>, <&cru CLK_USB3OTG1_SUSPEND>,
+			 <&cru ACLK_USB3OTG1>;
+		clock-names = "ref_clk", "suspend_clk",
+			      "bus_clk";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+		status = "disabled";
+
+		usbhost_dwc3: dwc3@fd000000 {
+			compatible = "snps,dwc3";
+			reg = <0x0 0xfd000000 0x0 0x400000>;
+			interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
+			dr_mode = "host";
+			phy_type = "utmi_wide";
+			power-domains = <&power RK3568_PD_PIPE>;
+			resets = <&cru SRST_USB3OTG1>;
+			reset-names = "usb3-host";
+			snps,dis_enblslpm_quirk;
+			snps,dis-u2-freeclk-exists-quirk;
+			snps,dis_u2_susphy_quirk;
+			snps,dis-del-phy-power-chg-quirk;
+			snps,dis-tx-ipgap-linecheck-quirk;
+			snps,xhci-trb-ent-quirk;
+			status = "disabled";
+		};
+	};
+
+	gic: interrupt-controller@fd400000 {
+		compatible = "arm,gic-v3";
+		#interrupt-cells = <3>;
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+		interrupt-controller;
+
+		reg = <0x0 0xfd400000 0 0x10000>, /* GICD */
+		      <0x0 0xfd460000 0 0xc0000>; /* GICR */
+		interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
+		its: interrupt-controller@fd440000 {
+			compatible = "arm,gic-v3-its";
+			msi-controller;
+			reg = <0x0 0xfd440000 0x0 0x20000>;
+		};
+	};
+
+	usb_host0_ehci: usb@fd800000 {
+		compatible = "generic-ehci";
+		reg = <0x0 0xfd800000 0x0 0x40000>;
+		interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_USB2HOST0>, <&cru HCLK_USB2HOST0_ARB>;
+		clock-names = "usbhost", "arbiter";
+		status = "disabled";
+	};
+
+	usb_host0_ohci: usb@fd840000 {
+		compatible = "generic-ohci";
+		reg = <0x0 0xfd840000 0x0 0x40000>;
+		interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_USB2HOST0>, <&cru HCLK_USB2HOST0_ARB>;
+		clock-names = "usbhost", "arbiter";
+		status = "disabled";
+	};
+
+	usb_host1_ehci: usb@fd880000 {
+		compatible = "generic-ehci";
+		reg = <0x0 0xfd880000 0x0 0x40000>;
+		interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_USB2HOST1>, <&cru HCLK_USB2HOST1_ARB>;
+		clock-names = "usbhost", "arbiter";
+		status = "disabled";
+	};
+
+	usb_host1_ohci: usb@fd8c0000 {
+		compatible = "generic-ohci";
+		reg = <0x0 0xfd8c0000 0x0 0x40000>;
+		interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_USB2HOST1>, <&cru HCLK_USB2HOST1_ARB>;
+		clock-names = "usbhost", "arbiter";
+		status = "disabled";
+	};
+
+	pmugrf: syscon@fdc20000 {
+		compatible = "rockchip,rk3568-grf", "syscon", "simple-mfd";
+		reg = <0x0 0xfdc20000 0x0 0x10000>;
+
+		pmu_io_domains: io-domains {
+			compatible = "rockchip,rk3568-pmu-io-voltage-domain";
+			status = "disabled";
+		};
+	};
+
+	pipegrf: syscon@fdc50000 {
+		compatible = "rockchip,rk3568-pipegrf", "syscon";
+		reg = <0x0 0xfdc50000 0x0 0x1000>;
+	};
+
+	grf: syscon@fdc60000 {
+		compatible = "rockchip,rk3568-grf", "syscon", "simple-mfd";
+		reg = <0x0 0xfdc60000 0x0 0x10000>;
+
+		io_domains: io-domains {
+			compatible = "rockchip,rk3568-io-voltage-domain";
+			status = "disabled";
+		};
+	};
+
+	pipe_phy_grf0: syscon@fdc70000 {
+		compatible = "rockchip,pipe-phy-grf", "syscon";
+		reg = <0x0 0xfdc70000 0x0 0x1000>;
+	};
+
+	pipe_phy_grf1: syscon@fdc80000 {
+		compatible = "rockchip,pipe-phy-grf", "syscon";
+		reg = <0x0 0xfdc80000 0x0 0x1000>;
+	};
+
+	pipe_phy_grf2: syscon@fdc90000 {
+		compatible = "rockchip,pipe-phy-grf", "syscon";
+		reg = <0x0 0xfdc90000 0x0 0x1000>;
+	};
+
+	pmucru: clock-controller@fdd00000 {
+		compatible = "rockchip,rk3568-pmucru";
+		reg = <0x0 0xfdd00000 0x0 0x1000>;
+		rockchip,grf = <&grf>;
+		#clock-cells = <1>;
+		#reset-cells = <1>;
+	};
+
+	cru: clock-controller@fdd20000 {
+		compatible = "rockchip,rk3568-cru";
+		reg = <0x0 0xfdd20000 0x0 0x1000>;
+		rockchip,grf = <&grf>;
+		#clock-cells = <1>;
+		#reset-cells = <1>;
+
+		assigned-clocks =
+			<&pmucru CLK_RTC_32K>, <&pmucru PLL_PPLL>,
+			<&pmucru PCLK_PMU>, <&cru PLL_CPLL>,
+			<&cru PLL_GPLL>, <&cru ARMCLK>,
+			<&cru ACLK_BUS>, <&cru PCLK_BUS>,
+			<&cru ACLK_TOP_HIGH>, <&cru ACLK_TOP_LOW>,
+			<&cru HCLK_TOP>, <&cru PCLK_TOP>,
+			<&cru ACLK_PERIMID>, <&cru HCLK_PERIMID>;
+		assigned-clock-rates =
+			<32768>, <100000000>,
+			<100000000>, <1000000000>,
+			<1188000000>, <600000000>,
+			<150000000>, <100000000>,
+			<300000000>, <200000000>,
+			<150000000>, <100000000>,
+			<300000000>, <150000000>;
+		assigned-clock-parents =
+			<&pmucru CLK_RTC32K_FRAC>;
+	};
+
+	i2c0: i2c@fdd40000 {
+		compatible = "rockchip,rk3399-i2c";
+		reg = <0x0 0xfdd40000 0x0 0x1000>;
+		clocks = <&pmucru CLK_I2C0>, <&pmucru PCLK_I2C0>;
+		clock-names = "i2c", "pclk";
+		interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c0_xfer>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	uart0: serial@fdd50000 {
+		compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xfdd50000 0x0 0x100>;
+		interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&pmucru SCLK_UART0>, <&pmucru PCLK_UART0>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac0 0>, <&dmac0 1>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart0_xfer>;
+		status = "disabled";
+	};
+
+	pwm0: pwm@fdd70000 {
+		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xfdd70000 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm0m0_pins>;
+		clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm1: pwm@fdd70010 {
+		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xfdd70010 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm1m0_pins>;
+		clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm2: pwm@fdd70020 {
+		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xfdd70020 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm2m0_pins>;
+		clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm3: pwm@fdd70030 {
+		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xfdd70030 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm3_pins>;
+		clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pmu: power-management@fdd90000 {
+		compatible = "rockchip,rk3568-pmu", "syscon", "simple-mfd";
+		reg = <0x0 0xfdd90000 0x0 0x1000>;
+
+		power: power-controller {
+			compatible = "rockchip,rk3568-power-controller";
+			#power-domain-cells = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "okay";
+
+			/* These power domains are grouped by VD_NPU */
+			pd_npu@RK3568_PD_NPU {
+				reg = <RK3568_PD_NPU>;
+				pm_qos = <&qos_npu>;
+			};
+			/* These power domains are grouped by VD_GPU */
+			pd_gpu@RK3568_PD_GPU {
+				reg = <RK3568_PD_GPU>;
+				pm_qos = <&qos_gpu>;
+			};
+			/* These power domains are grouped by VD_LOGIC */
+			pd_vi@RK3568_PD_VI {
+				reg = <RK3568_PD_VI>;
+				pm_qos = <&qos_isp>,
+					 <&qos_vicap0>,
+					 <&qos_vicap1>;
+			};
+			pd_vo@RK3568_PD_VO {
+				reg = <RK3568_PD_VO>;
+				pm_qos = <&qos_hdcp>,
+					 <&qos_vop_m0>,
+					 <&qos_vop_m1>;
+			};
+			pd_rga@RK3568_PD_RGA {
+				reg = <RK3568_PD_RGA>;
+				pm_qos = <&qos_ebc>,
+					 <&qos_iep>,
+					 <&qos_jpeg_dec>,
+					 <&qos_jpeg_enc>,
+					 <&qos_rga_rd>,
+					 <&qos_rga_wr>;
+			};
+			pd_vpu@RK3568_PD_VPU {
+				reg = <RK3568_PD_VPU>;
+				pm_qos = <&qos_vpu>;
+			};
+			pd_rkvdec@RK3568_PD_RKVDEC {
+				reg = <RK3568_PD_RKVDEC>;
+				pm_qos = <&qos_rkvdec>;
+			};
+			pd_rkvenc@RK3568_PD_RKVENC {
+				reg = <RK3568_PD_RKVENC>;
+				pm_qos = <&qos_rkvenc_rd_m0>,
+					 <&qos_rkvenc_rd_m1>,
+					 <&qos_rkvenc_wr_m0>;
+			};
+			pd_pipe@RK3568_PD_PIPE {
+				reg = <RK3568_PD_PIPE>;
+				pm_qos = <&qos_pcie2x1>,
+					 <&qos_pcie3x1>,
+					 <&qos_pcie3x2>,
+					 <&qos_sata0>,
+					 <&qos_sata1>,
+					 <&qos_sata2>,
+					 <&qos_usb3_0>,
+					 <&qos_usb3_1>;
+			};
+		};
+	};
+
+	gpu: gpu@fde60000 {
+		compatible = "arm,malit602", "arm,malit60x", "arm,malit6xx", "arm,mali-midgard";
+		reg = <0x0 0xfde60000 0x0 0x4000>;
+
+		interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "GPU", "MMU", "JOB";
+
+		upthreshold = <40>;
+		downdifferential = <10>;
+
+		clocks = <&cru CLK_GPU>;
+		clock-names = "clk_mali";
+		power-domains = <&power RK3568_PD_GPU>;
+		#cooling-cells = <2>;
+		operating-points-v2 = <&gpu_opp_table>;
+
+		status = "disabled";
+		power_model {
+			compatible = "arm,mali-simple-power-model";
+			static-coefficient = <411000>;
+			dynamic-coefficient = <733>;
+			ts = <32000 4700 (-80) 2>;
+			thermal-zone = "gpu-thermal";
+		};
+	};
+
+	gpu_opp_table: opp-table2 {
+		compatible = "operating-points-v2";
+
+		opp-200000000 {
+			opp-hz = /bits/ 64 <200000000>;
+			opp-microvolt = <1000000>;
+		};
+		opp-300000000 {
+			opp-hz = /bits/ 64 <300000000>;
+			opp-microvolt = <1000000>;
+		};
+		opp-400000000 {
+			opp-hz = /bits/ 64 <400000000>;
+			opp-microvolt = <1000000>;
+		};
+		opp-600000000 {
+			opp-hz = /bits/ 64 <600000000>;
+			opp-microvolt = <1000000>;
+		};
+	};
+
+	qos_gpu: qos@fe128000 {
+		compatible = "syscon";
+		reg = <0x0 0xfe128000 0x0 0x20>;
+	};
+
+	qos_rkvenc_rd_m0: qos@fe138080 {
+		compatible = "syscon";
+		reg = <0x0 0xfe138080 0x0 0x20>;
+	};
+
+	qos_rkvenc_rd_m1: qos@fe138100 {
+		compatible = "syscon";
+		reg = <0x0 0xfe138100 0x0 0x20>;
+	};
+
+	qos_rkvenc_wr_m0: qos@fe138180 {
+		compatible = "syscon";
+		reg = <0x0 0xfe138180 0x0 0x20>;
+	};
+
+	qos_isp: qos@fe148000 {
+		compatible = "syscon";
+		reg = <0x0 0xfe148000 0x0 0x20>;
+	};
+
+	qos_vicap0: qos@fe148080 {
+		compatible = "syscon";
+		reg = <0x0 0xfe148080 0x0 0x20>;
+	};
+
+	qos_vicap1: qos@fe148100 {
+		compatible = "syscon";
+		reg = <0x0 0xfe148100 0x0 0x20>;
+	};
+
+	qos_vpu: qos@fe150000 {
+		compatible = "syscon";
+		reg = <0x0 0xfe150000 0x0 0x20>;
+	};
+
+	qos_ebc: qos@fe158000 {
+		compatible = "syscon";
+		reg = <0x0 0xfe158000 0x0 0x20>;
+	};
+
+	qos_iep: qos@fe158100 {
+		compatible = "syscon";
+		reg = <0x0 0xfe158100 0x0 0x20>;
+	};
+
+	qos_jpeg_dec: qos@fe158180 {
+		compatible = "syscon";
+		reg = <0x0 0xfe158180 0x0 0x20>;
+	};
+
+	qos_jpeg_enc: qos@fe158200 {
+		compatible = "syscon";
+		reg = <0x0 0xfe158200 0x0 0x20>;
+	};
+
+	qos_rga_rd: qos@fe158280 {
+		compatible = "syscon";
+		reg = <0x0 0xfe158280 0x0 0x20>;
+	};
+
+	qos_rga_wr: qos@fe158300 {
+		compatible = "syscon";
+		reg = <0x0 0xfe158300 0x0 0x20>;
+	};
+
+	qos_npu: qos@fe180000 {
+		compatible = "syscon";
+		reg = <0x0 0xfe180000 0x0 0x20>;
+	};
+
+	qos_pcie2x1: qos@fe190000 {
+		compatible = "syscon";
+		reg = <0x0 0xfe190000 0x0 0x20>;
+	};
+
+	qos_pcie3x1: qos@fe190080 {
+		compatible = "syscon";
+		reg = <0x0 0xfe190080 0x0 0x20>;
+	};
+
+	qos_pcie3x2: qos@fe190100 {
+		compatible = "syscon";
+		reg = <0x0 0xfe190100 0x0 0x20>;
+	};
+
+	qos_sata0: qos@fe190200 {
+		compatible = "syscon";
+		reg = <0x0 0xfe190200 0x0 0x20>;
+	};
+
+	qos_sata1: qos@fe190280 {
+		compatible = "syscon";
+		reg = <0x0 0xfe190280 0x0 0x20>;
+	};
+
+	qos_sata2: qos@fe190300 {
+		compatible = "syscon";
+		reg = <0x0 0xfe190300 0x0 0x20>;
+	};
+
+	qos_usb3_0: qos@fe190380 {
+		compatible = "syscon";
+		reg = <0x0 0xfe190380 0x0 0x20>;
+	};
+
+	qos_usb3_1: qos@fe190400 {
+		compatible = "syscon";
+		reg = <0x0 0xfe190400 0x0 0x20>;
+	};
+
+	qos_rkvdec: qos@fe198000 {
+		compatible = "syscon";
+		reg = <0x0 0xfe198000 0x0 0x20>;
+	};
+
+	qos_hdcp: qos@fe1a8000 {
+		compatible = "syscon";
+		reg = <0x0 0xfe1a8000 0x0 0x20>;
+	};
+
+	qos_vop_m0: qos@fe1a8080 {
+		compatible = "syscon";
+		reg = <0x0 0xfe1a8080 0x0 0x20>;
+	};
+
+	qos_vop_m1: qos@fe1a8100 {
+		compatible = "syscon";
+		reg = <0x0 0xfe1a8100 0x0 0x20>;
+	};
+
+	sdmmc2: dwmmc@fe000000 {
+		compatible = "rockchip,rk3568-dw-mshc",
+			     "rockchip,rk3288-dw-mshc";
+		reg = <0x0 0xfe000000 0x0 0x4000>;
+		interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
+		max-frequency = <150000000>;
+		clocks = <&cru HCLK_SDMMC2>, <&cru CLK_SDMMC2>,
+			 <&cru SCLK_SDMMC2_DRV>, <&cru SCLK_SDMMC2_SAMPLE>;
+		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
+		fifo-depth = <0x100>;
+		resets = <&cru SRST_SDMMC2>;
+		reset-names = "reset";
+		status = "disabled";
+	};
+
+	sdmmc0: dwmmc@fe2b0000 {
+		compatible = "rockchip,rk3568-dw-mshc",
+			     "rockchip,rk3288-dw-mshc";
+		reg = <0x0 0xfe2b0000 0x0 0x4000>;
+		interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
+		max-frequency = <150000000>;
+		clocks = <&cru HCLK_SDMMC0>, <&cru CLK_SDMMC0>,
+			 <&cru SCLK_SDMMC0_DRV>, <&cru SCLK_SDMMC0_SAMPLE>;
+		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
+		fifo-depth = <0x100>;
+		resets = <&cru SRST_SDMMC0>;
+		reset-names = "reset";
+		status = "disabled";
+	};
+
+	sdmmc1: dwmmc@fe2c0000 {
+		compatible = "rockchip,rk3568-dw-mshc",
+			     "rockchip,rk3288-dw-mshc";
+		reg = <0x0 0xfe2c0000 0x0 0x4000>;
+		interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
+		max-frequency = <150000000>;
+		clocks = <&cru HCLK_SDMMC1>, <&cru CLK_SDMMC1>,
+			 <&cru SCLK_SDMMC1_DRV>, <&cru SCLK_SDMMC1_SAMPLE>;
+		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
+		fifo-depth = <0x100>;
+		resets = <&cru SRST_SDMMC1>;
+		reset-names = "reset";
+		status = "disabled";
+	};
+
+	sdhci: sdhci@fe310000 {
+		compatible = "rockchip,dwcmshc-sdhci", "snps,dwcmshc-sdhci";
+		reg = <0x0 0xfe310000 0x0 0x10000>;
+		interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+		assigned-clocks = <&cru CCLK_EMMC>, <&cru BCLK_EMMC>, <&cru TCLK_EMMC>;
+		assigned-clock-rates = <200000000>, <200000000>, <24000000>;
+		clocks = <&cru CCLK_EMMC>, <&cru HCLK_EMMC>,
+			 <&cru ACLK_EMMC>, <&cru BCLK_EMMC>,
+			 <&cru TCLK_EMMC>;
+		clock-names = "core", "bus", "axi", "block", "timer";
+		status = "disabled";
+	};
+
+	nandc0: nandc@fe330000 {
+		compatible = "rockchip,rk-nandc";
+		reg = <0x0 0xfe330000 0x0 0x4000>;
+		interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
+		nandc_id = <0>;
+		clocks = <&cru NCLK_NANDC>, <&cru HCLK_NANDC>;
+		clock-names = "clk_nandc", "hclk_nandc";
+		status = "disabled";
+	};
+
+	i2s0_8ch: i2s@fe400000 {
+		compatible = "rockchip,rk3568-i2s-tdm";
+		reg = <0x0 0xfe400000 0x0 0x1000>;
+		interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru MCLK_I2S0_8CH_TX>, <&cru MCLK_I2S0_8CH_RX>, <&cru HCLK_I2S0_8CH>;
+		clock-names = "mclk_tx", "mclk_rx", "hclk";
+		dmas = <&dmac1 0>;
+		dma-names = "tx";
+		resets = <&cru SRST_M_I2S0_8CH_TX>, <&cru SRST_M_I2S0_8CH_RX>;
+		reset-names = "tx-m", "rx-m";
+		rockchip,cru = <&cru>;
+		rockchip,grf = <&grf>;
+		rockchip,playback-only;
+		status = "disabled";
+	};
+
+	i2s1_8ch: i2s@fe410000 {
+		compatible = "rockchip,rk3568-i2s-tdm";
+		reg = <0x0 0xfe410000 0x0 0x1000>;
+		interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru MCLK_I2S1_8CH_TX>, <&cru MCLK_I2S1_8CH_RX>, <&cru HCLK_I2S1_8CH>;
+		clock-names = "mclk_tx", "mclk_rx", "hclk";
+		dmas = <&dmac1 2>, <&dmac1 3>;
+		dma-names = "tx", "rx";
+		resets = <&cru SRST_M_I2S1_8CH_TX>, <&cru SRST_M_I2S1_8CH_RX>;
+		reset-names = "tx-m", "rx-m";
+		rockchip,cru = <&cru>;
+		rockchip,grf = <&grf>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2s1sclktxm0
+			     &i2s1sclkrxm0
+			     &i2s1lrcktxm0
+			     &i2s1lrckrxm0
+			     &i2s1sdi0m0
+			     &i2s1sdi1m0
+			     &i2s1sdi2m0
+			     &i2s1sdi3m0
+			     &i2s1sdo0m0
+			     &i2s1sdo1m0
+			     &i2s1sdo2m0
+			     &i2s1sdo3m0>;
+		status = "disabled";
+	};
+
+	i2s2_2ch: i2s@fe420000 {
+		compatible = "rockchip,rk3568-i2s-tdm";
+		reg = <0x0 0xfe420000 0x0 0x1000>;
+		interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru MCLK_I2S2_2CH>, <&cru MCLK_I2S2_2CH>, <&cru HCLK_I2S2_2CH>;
+		clock-names = "mclk_tx", "mclk_rx", "hclk";
+		dmas = <&dmac1 4>, <&dmac1 5>;
+		dma-names = "tx", "rx";
+		rockchip,cru = <&cru>;
+		rockchip,grf = <&grf>;
+		rockchip,clk-trcm = <1>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2s2sclktxm0
+			     &i2s2lrcktxm0
+			     &i2s2sdim0
+			     &i2s2sdom0>;
+		status = "disabled";
+	};
+
+	i2s3_2ch: i2s@fe430000 {
+		compatible = "rockchip,rk3568-i2s-tdm";
+		reg = <0x0 0xfe430000 0x0 0x1000>;
+		interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru MCLK_I2S3_2CH_TX>, <&cru MCLK_I2S3_2CH_RX>, <&cru HCLK_I2S3_2CH>;
+		clock-names = "mclk_tx", "mclk_rx", "hclk";
+		dmas = <&dmac1 6>, <&dmac1 7>;
+		dma-names = "tx", "rx";
+		resets = <&cru SRST_M_I2S3_2CH_TX>, <&cru SRST_M_I2S3_2CH_RX>;
+		reset-names = "tx-m", "rx-m";
+		rockchip,cru = <&cru>;
+		rockchip,grf = <&grf>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2s3sclkm0
+			     &i2s3lrckm0
+			     &i2s3sdim0
+			     &i2s3sdom0>;
+		status = "disabled";
+	};
+
+	pdm: pdm@fe440000 {
+		compatible = "rockchip,rk3568-pdm", "rockchip,pdm";
+		reg = <0x0 0xfe440000 0x0 0x1000>;
+		clocks = <&cru MCLK_PDM>, <&cru HCLK_PDM>;
+		clock-names = "pdm_clk", "pdm_hclk";
+		dmas = <&dmac1 9>;
+		dma-names = "rx";
+		status = "disabled";
+	};
+
+	spdif_8ch: spdif@fe460000 {
+		compatible = "rockchip,rk3588-spdif";
+		reg = <0x0 0xfe460000 0x0 0x1000>;
+		interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
+		dmas = <&dmac1 1>;
+		dma-names = "tx";
+		clock-names = "mclk", "hclk";
+		clocks = <&cru MCLK_SPDIF_8CH>, <&cru HCLK_SPDIF_8CH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&spdifm0_pins>;
+		status = "disabled";
+	};
+
+	audpwm: audpwm@fe470000 {
+		compatible = "rockchip,rk3568-audio-pwm", "rockchip,audio-pwm-v1";
+		reg = <0x0 0xfe470000 0x0 0x1000>;
+		clocks = <&cru SCLK_AUDPWM>, <&cru HCLK_AUDPWM>;
+		clock-names = "clk", "hclk";
+		dmas = <&dmac1 8>;
+		dma-names = "tx";
+		rockchip,sample-width-bits = <11>;
+		rockchip,interpolat-points = <1>;
+		status = "disabled";
+	};
+
+	dig_acodec: codec-digital@fe478000 {
+		compatible = "rockchip,rk3568-codec-digital", "rockchip,codec-digital-v1";
+		reg = <0x0 0xfe478000 0x0 0x1000>;
+		clocks = <&cru CLK_ACDCDIG_ADC>, <&cru CLK_ACDCDIG_DAC>, <&cru HCLK_ACDCDIG>;
+		clock-names = "adc", "dac", "pclk";
+		pinctrl-names = "default";
+		pinctrl-0 = <&acodec_pins>;
+		resets = <&cru SRST_ACDCDIG>;
+		reset-names = "reset" ;
+		rockchip,grf = <&grf>;
+		status = "disabled";
+	};
+
+	dmac0: dmac@fe530000 {
+		compatible = "arm,pl330", "arm,primecell";
+		reg = <0x0 0xfe530000 0x0 0x4000>;
+		interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_DMAC0>;
+		clock-names = "apb_pclk";
+		#dma-cells = <1>;
+		arm,pl330-periph-burst;
+	};
+
+	dmac1: dmac@fe550000 {
+		compatible = "arm,pl330", "arm,primecell";
+		reg = <0x0 0xfe550000 0x0 0x4000>;
+		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_DMAC1>;
+		clock-names = "apb_pclk";
+		#dma-cells = <1>;
+		arm,pl330-periph-burst;
+	};
+
+	can0: can@fe570000 {
+		compatible = "rockchip,canfd-1.0";
+		reg = <0x0 0xfe570000 0x0 0x1000>;
+		interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru CLK_CAN0>, <&cru PCLK_CAN0>;
+		clock-names = "baudclk", "apb_pclk";
+		resets = <&cru SRST_CAN0>, <&cru SRST_P_CAN0>;
+		reset-names = "can", "can-apb";
+		tx-fifo-depth = <1>;
+		rx-fifo-depth = <6>;
+		status = "disabled";
+	};
+
+	can1: can@fe580000 {
+		compatible = "rockchip,canfd-1.0";
+		reg = <0x0 0xfe580000 0x0 0x1000>;
+		interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru CLK_CAN1>, <&cru PCLK_CAN1>;
+		clock-names = "baudclk", "apb_pclk";
+		resets = <&cru SRST_CAN1>, <&cru SRST_P_CAN1>;
+		reset-names = "can", "can-apb";
+		tx-fifo-depth = <1>;
+		rx-fifo-depth = <6>;
+		status = "disabled";
+	};
+
+	can2: can@fe590000 {
+		compatible = "rockchip,canfd-1.0";
+		reg = <0x0 0xfe590000 0x0 0x1000>;
+		interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru CLK_CAN2>, <&cru PCLK_CAN2>;
+		clock-names = "baudclk", "apb_pclk";
+		resets = <&cru SRST_CAN2>, <&cru SRST_P_CAN2>;
+		reset-names = "can", "can-apb";
+		tx-fifo-depth = <1>;
+		rx-fifo-depth = <6>;
+		status = "disabled";
+	};
+
+	i2c1: i2c@fe5a0000 {
+		compatible = "rockchip,rk3399-i2c";
+		reg = <0x0 0xfe5a0000 0x0 0x1000>;
+		clocks = <&cru CLK_I2C1>, <&cru PCLK_I2C1>;
+		clock-names = "i2c", "pclk";
+		interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c1_xfer>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	i2c2: i2c@fe5b0000 {
+		compatible = "rockchip,rk3399-i2c";
+		reg = <0x0 0xfe5b0000 0x0 0x1000>;
+		clocks = <&cru CLK_I2C2>, <&cru PCLK_I2C2>;
+		clock-names = "i2c", "pclk";
+		interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c2m0_xfer>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	i2c3: i2c@fe5c0000 {
+		compatible = "rockchip,rk3399-i2c";
+		reg = <0x0 0xfe5c0000 0x0 0x1000>;
+		clocks = <&cru CLK_I2C3>, <&cru PCLK_I2C3>;
+		clock-names = "i2c", "pclk";
+		interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c3m0_xfer>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	i2c4: i2c@fe5d0000 {
+		compatible = "rockchip,rk3399-i2c";
+		reg = <0x0 0xfe5d0000 0x0 0x1000>;
+		clocks = <&cru CLK_I2C4>, <&cru PCLK_I2C4>;
+		clock-names = "i2c", "pclk";
+		interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c4m0_xfer>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	i2c5: i2c@fe5e0000 {
+		compatible = "rockchip,rk3399-i2c";
+		reg = <0x0 0xfe5e0000 0x0 0x1000>;
+		clocks = <&cru CLK_I2C5>, <&cru PCLK_I2C5>;
+		clock-names = "i2c", "pclk";
+		interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c5m0_xfer>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	wdt: watchdog@fe600000 {
+		compatible = "snps,dw-wdt";
+		reg = <0x0 0xfe600000 0x0 0x100>;
+		clocks = <&cru PCLK_WDT_NS>;
+		interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
+		status = "okay";
+	};
+
+	spi0: spi@fe610000 {
+		compatible = "rockchip,rk3568-spi", "rockchip,rk3066-spi";
+		reg = <0x0 0xfe610000 0x0 0x1000>;
+		interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&cru CLK_SPI0>, <&cru PCLK_SPI0>;
+		clock-names = "spiclk", "apb_pclk";
+		dmas = <&dmac0 20>, <&dmac0 21>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&spi0clkm0 &spi0cs0m0 &spi0cs1m0 &spi0misom0 &spi0mosim0>;
+		status = "disabled";
+	};
+
+	spi1: spi@fe620000 {
+		compatible = "rockchip,rk3568-spi", "rockchip,rk3066-spi";
+		reg = <0x0 0xfe620000 0x0 0x1000>;
+		interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&cru CLK_SPI1>, <&cru PCLK_SPI1>;
+		clock-names = "spiclk", "apb_pclk";
+		dmas = <&dmac0 22>, <&dmac0 23>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&spi1clkm0 &spi1cs0m0 &spi1cs1m0 &spi1misom0 &spi1mosim0>;
+		status = "disabled";
+	};
+
+	spi2: spi@fe630000 {
+		compatible = "rockchip,rk3568-spi", "rockchip,rk3066-spi";
+		reg = <0x0 0xfe630000 0x0 0x1000>;
+		interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&cru CLK_SPI2>, <&cru PCLK_SPI2>;
+		clock-names = "spiclk", "apb_pclk";
+		dmas = <&dmac0 24>, <&dmac0 25>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&spi2clkm0 &spi2cs0m0 &spi2cs1m0 &spi2misom0 &spi2mosim0>;
+		status = "disabled";
+	};
+
+	spi3: spi@fe640000 {
+		compatible = "rockchip,rk3568-spi", "rockchip,rk3066-spi";
+		reg = <0x0 0xfe640000 0x0 0x1000>;
+		interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&cru CLK_SPI3>, <&cru PCLK_SPI3>;
+		clock-names = "spiclk", "apb_pclk";
+		dmas = <&dmac0 26>, <&dmac0 27>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&spi3clkm0 &spi3cs0m0 &spi3cs1m0 &spi3misom0 &spi3mosim0>;
+		status = "disabled";
+	};
+
+	uart1: serial@fe650000 {
+		compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xfe650000 0x0 0x100>;
+		interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac0 2>, <&dmac0 3>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart1m0_xfer>;
+		status = "disabled";
+	};
+
+	uart2: serial@fe660000 {
+		compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xfe660000 0x0 0x100>;
+		interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac0 4>, <&dmac0 5>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart2m0_xfer>;
+		status = "disabled";
+	};
+
+	uart3: serial@fe670000 {
+		compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xfe670000 0x0 0x100>;
+		interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac0 6>, <&dmac0 7>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart3m0_xfer>;
+		status = "disabled";
+	};
+
+	uart4: serial@fe680000 {
+		compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xfe680000 0x0 0x100>;
+		interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac0 8>, <&dmac0 9>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart4m0_xfer>;
+		status = "disabled";
+	};
+
+	uart5: serial@fe690000 {
+		compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xfe690000 0x0 0x100>;
+		interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART5>, <&cru PCLK_UART5>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac0 10>, <&dmac0 11>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart5m0_xfer>;
+		status = "disabled";
+	};
+
+	uart6: serial@fe6a0000 {
+		compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xfe6a0000 0x0 0x100>;
+		interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART6>, <&cru PCLK_UART6>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac0 12>, <&dmac0 13>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart6m0_xfer>;
+		status = "disabled";
+	};
+
+	uart7: serial@fe6b0000 {
+		compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xfe6b0000 0x0 0x100>;
+		interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART7>, <&cru PCLK_UART7>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac0 14>, <&dmac0 15>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart7m0_xfer>;
+		status = "disabled";
+	};
+
+	uart8: serial@fe6c0000 {
+		compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xfe6c0000 0x0 0x100>;
+		interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART8>, <&cru PCLK_UART8>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac0 16>, <&dmac0 17>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart8m0_xfer>;
+		status = "disabled";
+	};
+
+	uart9: serial@fe6d0000 {
+		compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xfe6d0000 0x0 0x100>;
+		interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART9>, <&cru PCLK_UART9>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac0 18>, <&dmac0 19>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart9m0_xfer>;
+		status = "disabled";
+	};
+
+	pwm4: pwm@fe6e0000 {
+		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xfe6e0000 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm4_pins>;
+		clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm5: pwm@fe6e0010 {
+		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xfe6e0010 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm5_pins>;
+		clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm6: pwm@fe6e0020 {
+		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xfe6e0020 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm6_pins>;
+		clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm7: pwm@fe6e0030 {
+		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xfe6e0030 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm7_pins>;
+		clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm8: pwm@fe6f0000 {
+		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xfe6f0000 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm8m0_pins>;
+		clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm9: pwm@fe6f0010 {
+		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xfe6f0010 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm9m0_pins>;
+		clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm10: pwm@fe6f0020 {
+		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xfe6f0020 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm10m0_pins>;
+		clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm11: pwm@fe6f0030 {
+		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xfe6f0030 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm11m0_pins>;
+		clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm12: pwm@fe700000 {
+		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xfe700000 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm12m0_pins>;
+		clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm13: pwm@fe700010 {
+		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xfe700010 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm13m0_pins>;
+		clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm14: pwm@fe700020 {
+		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xfe700020 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm14m0_pins>;
+		clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm15: pwm@fe700030 {
+		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xfe700030 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm15m0_pins>;
+		clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	saradc: saradc@fe720000 {
+		compatible = "rockchip,rk3568-saradc", "rockchip,rk3399-saradc";
+		reg = <0x0 0xfe720000 0x0 0x100>;
+		interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
+		#io-channel-cells = <1>;
+		clocks = <&cru CLK_SARADC>, <&cru PCLK_SARADC>;
+		clock-names = "saradc", "apb_pclk";
+		resets = <&cru SRST_P_SARADC>;
+		reset-names = "saradc-apb";
+		status = "disabled";
+	};
+
+	combphy0_us: phy@fe820000 {
+		compatible = "rockchip,rk3568-naneng-combphy";
+		reg = <0x0 0xfe820000 0x0 0x100>;
+		#phy-cells = <1>;
+		clocks = <&pmucru CLK_PCIEPHY0_REF>, <&cru PCLK_PIPEPHY0>;
+		clock-names = "refclk", "apbclk";
+		resets = <&cru SRST_P_PIPEPHY0>, <&cru SRST_PIPEPHY0>;
+		reset-names = "combphy-apb", "combphy";
+		rockchip,pipe-grf = <&pipegrf>;
+		rockchip,pipe-phy-grf = <&pipe_phy_grf0>;
+		status = "disabled";
+	};
+
+	combphy1_usq: phy@fe830000 {
+		compatible = "rockchip,rk3568-naneng-combphy";
+		reg = <0x0 0xfe830000 0x0 0x100>;
+		#phy-cells = <1>;
+		clocks = <&pmucru CLK_PCIEPHY1_REF>, <&cru PCLK_PIPEPHY1>;
+		clock-names = "refclk", "apbclk";
+		resets = <&cru SRST_P_PIPEPHY0>, <&cru SRST_PIPEPHY0>;
+		reset-names = "combphy-apb", "combphy";
+		rockchip,pipe-grf = <&pipegrf>;
+		rockchip,pipe-phy-grf = <&pipe_phy_grf1>;
+		status = "disabled";
+	};
+
+	combphy2_psq: phy@fe840000 {
+		compatible = "rockchip,rk3568-naneng-combphy";
+		reg = <0x0 0xfe840000 0x0 0x100>;
+		#phy-cells = <1>;
+		clocks = <&pmucru CLK_PCIEPHY2_REF>, <&cru PCLK_PIPEPHY2>;
+		clock-names = "refclk", "apbclk";
+		resets = <&cru SRST_P_PIPEPHY2>, <&cru SRST_PIPEPHY2>;
+		reset-names = "combphy-apb", "combphy";
+		rockchip,pipe-grf = <&pipegrf>;
+		rockchip,pipe-phy-grf = <&pipe_phy_grf2>;
+		status = "disabled";
+	};
+
+	pinctrl: pinctrl {
+		compatible = "rockchip,rk3568-pinctrl";
+		rockchip,grf = <&grf>;
+		rockchip,pmu = <&pmugrf>;
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		gpio0: gpio@fdd60000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x0 0xfdd60000 0x0 0x100>;
+			interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&pmucru PCLK_GPIO0>, <&pmucru DBCLK_GPIO0>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+			gpio-ranges = <&pinctrl 0 0 32>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio1: gpio@fe740000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x0 0xfe740000 0x0 0x100>;
+			interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+			gpio-ranges = <&pinctrl 0 32 32>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio2: gpio@fe750000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x0 0xfe750000 0x0 0x100>;
+			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+			gpio-ranges = <&pinctrl 0 64 32>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio3: gpio@fe760000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x0 0xfe750000 0x0 0x100>;
+			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+			gpio-ranges = <&pinctrl 0 96 32>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio4: gpio@fe770000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x0 0xfe770000 0x0 0x100>;
+			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+			gpio-ranges = <&pinctrl 0 128 32>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+	};
+};
+
+#include "rk3568-pinctrl.dtsi"
diff --git a/arch/arm/dts/rockchip-pinconf.dtsi b/arch/arm/dts/rockchip-pinconf.dtsi
index c13d024019..ad98cd15ea 100644
--- a/arch/arm/dts/rockchip-pinconf.dtsi
+++ b/arch/arm/dts/rockchip-pinconf.dtsi
@@ -17,66 +17,82 @@
 	};
 
 	pcfg_pull_none_drv_level_0: pcfg-pull-none-drv-level-0 {
+		bias-disable;
 		drive-strength = <0>;
 	};
 
 	pcfg_pull_none_drv_level_1: pcfg-pull-none-drv-level-1 {
+		bias-disable;
 		drive-strength = <1>;
 	};
 
 	pcfg_pull_none_drv_level_2: pcfg-pull-none-drv-level-2 {
+		bias-disable;
 		drive-strength = <2>;
 	};
 
 	pcfg_pull_none_drv_level_3: pcfg-pull-none-drv-level-3 {
+		bias-disable;
 		drive-strength = <3>;
 	};
 
 	pcfg_pull_none_drv_level_4: pcfg-pull-none-drv-level-4 {
+		bias-disable;
 		drive-strength = <4>;
 	};
 
 	pcfg_pull_none_drv_level_5: pcfg-pull-none-drv-level-5 {
+		bias-disable;
 		drive-strength = <5>;
 	};
 
 	pcfg_pull_none_drv_level_6: pcfg-pull-none-drv-level-6 {
+		bias-disable;
 		drive-strength = <6>;
 	};
 
 	pcfg_pull_none_drv_level_7: pcfg-pull-none-drv-level-7 {
+		bias-disable;
 		drive-strength = <7>;
 	};
 
 	pcfg_pull_none_drv_level_8: pcfg-pull-none-drv-level-8 {
+		bias-disable;
 		drive-strength = <8>;
 	};
 
 	pcfg_pull_none_drv_level_9: pcfg-pull-none-drv-level-9 {
+		bias-disable;
 		drive-strength = <9>;
 	};
 
 	pcfg_pull_none_drv_level_10: pcfg-pull-none-drv-level-10 {
+		bias-disable;
 		drive-strength = <10>;
 	};
 
 	pcfg_pull_none_drv_level_11: pcfg-pull-none-drv-level-11 {
+		bias-disable;
 		drive-strength = <11>;
 	};
 
 	pcfg_pull_none_drv_level_12: pcfg-pull-none-drv-level-12 {
+		bias-disable;
 		drive-strength = <12>;
 	};
 
 	pcfg_pull_none_drv_level_13: pcfg-pull-none-drv-level-13 {
+		bias-disable;
 		drive-strength = <13>;
 	};
 
 	pcfg_pull_none_drv_level_14: pcfg-pull-none-drv-level-14 {
+		bias-disable;
 		drive-strength = <14>;
 	};
 
 	pcfg_pull_none_drv_level_15: pcfg-pull-none-drv-level-15 {
+		bias-disable;
 		drive-strength = <15>;
 	};
 
@@ -165,78 +181,78 @@
 		drive-strength = <0>;
 	};
 
-	pcfg_pull_down_drv_level_1: pcfg-pull-up-drv-level-1 {
-		bias-pull-up;
+	pcfg_pull_down_drv_level_1: pcfg-pull-down-drv-level-1 {
+		bias-pull-down;
 		drive-strength = <1>;
 	};
 
-	pcfg_pull_down_drv_level_2: pcfg-pull-up-drv-level-2 {
-		bias-pull-up;
+	pcfg_pull_down_drv_level_2: pcfg-pull-down-drv-level-2 {
+		bias-pull-down;
 		drive-strength = <2>;
 	};
 
-	pcfg_pull_down_drv_level_3: pcfg-pull-up-drv-level-3 {
-		bias-pull-up;
+	pcfg_pull_down_drv_level_3: pcfg-pull-down-drv-level-3 {
+		bias-pull-down;
 		drive-strength = <3>;
 	};
 
-	pcfg_pull_down_drv_level_4: pcfg-pull-up-drv-level-4 {
-		bias-pull-up;
+	pcfg_pull_down_drv_level_4: pcfg-pull-down-drv-level-4 {
+		bias-pull-down;
 		drive-strength = <4>;
 	};
 
-	pcfg_pull_down_drv_level_5: pcfg-pull-up-drv-level-5 {
-		bias-pull-up;
+	pcfg_pull_down_drv_level_5: pcfg-pull-down-drv-level-5 {
+		bias-pull-down;
 		drive-strength = <5>;
 	};
 
-	pcfg_pull_down_drv_level_6: pcfg-pull-up-drv-level-6 {
-		bias-pull-up;
+	pcfg_pull_down_drv_level_6: pcfg-pull-down-drv-level-6 {
+		bias-pull-down;
 		drive-strength = <6>;
 	};
 
-	pcfg_pull_down_drv_level_7: pcfg-pull-up-drv-level-7 {
-		bias-pull-up;
+	pcfg_pull_down_drv_level_7: pcfg-pull-down-drv-level-7 {
+		bias-pull-down;
 		drive-strength = <7>;
 	};
 
-	pcfg_pull_down_drv_level_8: pcfg-pull-up-drv-level-8 {
-		bias-pull-up;
+	pcfg_pull_down_drv_level_8: pcfg-pull-down-drv-level-8 {
+		bias-pull-down;
 		drive-strength = <8>;
 	};
 
-	pcfg_pull_down_drv_level_9: pcfg-pull-up-drv-level-9 {
-		bias-pull-up;
+	pcfg_pull_down_drv_level_9: pcfg-pull-down-drv-level-9 {
+		bias-pull-down;
 		drive-strength = <9>;
 	};
 
-	pcfg_pull_down_drv_level_10: pcfg-pull-up-drv-level-10 {
-		bias-pull-up;
+	pcfg_pull_down_drv_level_10: pcfg-pull-down-drv-level-10 {
+		bias-pull-down;
 		drive-strength = <10>;
 	};
 
-	pcfg_pull_down_drv_level_11: pcfg-pull-up-drv-level-11 {
-		bias-pull-up;
+	pcfg_pull_down_drv_level_11: pcfg-pull-down-drv-level-11 {
+		bias-pull-down;
 		drive-strength = <11>;
 	};
 
-	pcfg_pull_down_drv_level_12: pcfg-pull-up-drv-level-12 {
-		bias-pull-up;
+	pcfg_pull_down_drv_level_12: pcfg-pull-down-drv-level-12 {
+		bias-pull-down;
 		drive-strength = <12>;
 	};
 
-	pcfg_pull_down_drv_level_13: pcfg-pull-up-drv-level-13 {
-		bias-pull-up;
+	pcfg_pull_down_drv_level_13: pcfg-pull-down-drv-level-13 {
+		bias-pull-down;
 		drive-strength = <13>;
 	};
 
-	pcfg_pull_down_drv_level_14: pcfg-pull-up-drv-level-14 {
-		bias-pull-up;
+	pcfg_pull_down_drv_level_14: pcfg-pull-down-drv-level-14 {
+		bias-pull-down;
 		drive-strength = <14>;
 	};
 
-	pcfg_pull_down_drv_level_15: pcfg-pull-up-drv-level-15 {
-		bias-pull-up;
+	pcfg_pull_down_drv_level_15: pcfg-pull-down-drv-level-15 {
+		bias-pull-down;
 		drive-strength = <15>;
 	};
 
@@ -255,6 +271,12 @@
 		input-schmitt-enable;
 	};
 
+	pcfg_pull_none_drv_level_0_smt: pcfg-pull-none-drv-level-0-smt {
+		bias-disable;
+		drive-strength = <0>;
+		input-schmitt-enable;
+	};
+
 	pcfg_output_high: pcfg-output-high {
 		output-high;
 	};
diff --git a/include/dt-bindings/clock/rk3568-cru.h b/include/dt-bindings/clock/rk3568-cru.h
index 7f9290809c..d06f8b085d 100644
--- a/include/dt-bindings/clock/rk3568-cru.h
+++ b/include/dt-bindings/clock/rk3568-cru.h
@@ -157,7 +157,7 @@
 #define SCLK_AUDPWM_SRC		97
 #define SCLK_AUDPWM_FRAC	98
 #define SCLK_AUDPWM		99
-#define HCLK_ACDCDIG_I2C	100
+#define HCLK_ACDCDIG		100
 #define CLK_ACDCDIG_I2C		101
 #define CLK_ACDCDIG_DAC		102
 #define CLK_ACDCDIG_ADC		103
diff --git a/include/dt-bindings/power/rk3568-power.h b/include/dt-bindings/power/rk3568-power.h
new file mode 100644
index 0000000000..6cc1af1a9d
--- /dev/null
+++ b/include/dt-bindings/power/rk3568-power.h
@@ -0,0 +1,32 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __DT_BINDINGS_POWER_RK3568_POWER_H__
+#define __DT_BINDINGS_POWER_RK3568_POWER_H__
+
+/* VD_CORE */
+#define RK3568_PD_CPU_0		0
+#define RK3568_PD_CPU_1		1
+#define RK3568_PD_CPU_2		2
+#define RK3568_PD_CPU_3		3
+#define RK3568_PD_CORE_ALIVE	4
+
+/* VD_PMU */
+#define RK3568_PD_PMU		5
+
+/* VD_NPU */
+#define RK3568_PD_NPU		6
+
+/* VD_GPU */
+#define RK3568_PD_GPU		7
+
+/* VD_LOGIC */
+#define RK3568_PD_VI		8
+#define RK3568_PD_VO		9
+#define RK3568_PD_RGA		10
+#define RK3568_PD_VPU		11
+#define RK3568_PD_CENTER	12
+#define RK3568_PD_RKVDEC	13
+#define RK3568_PD_RKVENC	14
+#define RK3568_PD_PIPE		15
+#define RK3568_PD_LOGIC_ALIVE	16
+
+#endif

commit 417bebc456dfb0abdddaf8e66d84ac36c03a95b7
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Mon Sep 14 11:03:46 2020 +0800

    clk: rockchip: rk3568: Add clock driver
    
    Add basic clock for rk3568 which including cpu, bus, mmc,
    i2c, pwm, gmac ...clocks init.
    
    Change-Id: I4119f10897d06befa4a39198b3724dc515d416e3
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3568.h b/arch/arm/include/asm/arch-rockchip/cru_rk3568.h
new file mode 100644
index 0000000000..8c0f540414
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3568.h
@@ -0,0 +1,433 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2020 Rockchip Electronics Co. Ltd.
+ * Author: Elaine Zhang <zhangqing@rock-chips.com>
+ */
+
+#ifndef _ASM_ARCH_CRU_RK3568_H
+#define _ASM_ARCH_CRU_RK3568_H
+
+#define MHz		1000000
+#define KHz		1000
+#define OSC_HZ		(24 * MHz)
+
+#define APLL_HZ		(1008 * MHz)
+#define GPLL_HZ		(1188 * MHz)
+#define CPLL_HZ		(1000 * MHz)
+#define PPLL_HZ		(100 * MHz)
+
+/* RK3568 pll id */
+enum rk3568_pll_id {
+	APLL,
+	DPLL,
+	CPLL,
+	GPLL,
+	NPLL,
+	VPLL,
+	PPLL,
+	HPLL,
+	PLL_COUNT,
+};
+
+struct rk3568_clk_info {
+	unsigned long id;
+	char *name;
+	bool is_cru;
+};
+
+/* Private data for the clock driver - used by rockchip_get_cru() */
+struct rk3568_pmuclk_priv {
+	struct rk3568_pmucru *pmucru;
+	ulong ppll_hz;
+	ulong hpll_hz;
+};
+
+struct rk3568_clk_priv {
+	struct rk3568_cru *cru;
+	struct rk3568_grf *grf;
+	ulong ppll_hz;
+	ulong hpll_hz;
+	ulong gpll_hz;
+	ulong cpll_hz;
+	ulong npll_hz;
+	ulong vpll_hz;
+	ulong armclk_hz;
+	ulong armclk_enter_hz;
+	ulong armclk_init_hz;
+	bool sync_kernel;
+	bool set_armclk_rate;
+};
+
+struct rk3568_pll {
+	unsigned int con0;
+	unsigned int con1;
+	unsigned int con2;
+	unsigned int con3;
+	unsigned int con4;
+	unsigned int reserved0[3];
+};
+
+struct rk3568_pmucru {
+	struct rk3568_pll pll[2];/* Address Offset: 0x0000 */
+	unsigned int reserved0[16];/* Address Offset: 0x0040 */
+	unsigned int mode_con00;/* Address Offset: 0x0080 */
+	unsigned int reserved1[31];/* Address Offset: 0x0084 */
+	unsigned int pmu_clksel_con[10];/* Address Offset: 0x0100 */
+	unsigned int reserved2[22];/* Address Offset: 0x0128 */
+	unsigned int pmu_clkgate_con[3];/* Address Offset: 0x0180 */
+	unsigned int reserved3[29];/* Address Offset: 0x018C */
+	unsigned int pmu_softrst_con[1];/* Address Offset: 0x0200 */
+};
+
+check_member(rk3568_pmucru, mode_con00, 0x80);
+check_member(rk3568_pmucru, pmu_softrst_con[0], 0x200);
+
+struct rk3568_cru {
+	struct rk3568_pll pll[6];
+	unsigned int mode_con00;/* Address Offset: 0x00C0 */
+	unsigned int misc_con[3];/* Address Offset: 0x00C4 */
+	unsigned int glb_cnt_th;/* Address Offset: 0x00D0 */
+	unsigned int glb_srst_fst;/* Address Offset: 0x00D4 */
+	unsigned int glb_srsr_snd; /* Address Offset: 0x00D8 */
+	unsigned int glb_rst_con;/* Address Offset: 0x00DC */
+	unsigned int glb_rst_st;/* Address Offset: 0x00E0 */
+	unsigned int reserved0[7];/* Address Offset: 0x00E4 */
+	unsigned int clksel_con[85]; /* Address Offset: 0x0100 */
+	unsigned int reserved1[43];/* Address Offset: 0x0254 */
+	unsigned int clkgate_con[36];/* Address Offset: 0x0300 */
+	unsigned int reserved2[28]; /* Address Offset: 0x0390 */
+	unsigned int softrst_con[30];/* Address Offset: 0x0400 */
+	unsigned int reserved3[2];/* Address Offset: 0x0478 */
+	unsigned int ssgtbl[32];/* Address Offset: 0x0480 */
+	unsigned int reserved4[32];/* Address Offset: 0x0500 */
+	unsigned int sdmmc0_con[2];/* Address Offset: 0x0580 */
+	unsigned int sdmmc1_con[2];/* Address Offset: 0x058C */
+	unsigned int sdmmc2_con[2];/* Address Offset: 0x0590 */
+	unsigned int emmc_con[2];/* Address Offset: 0x0598 */
+};
+
+check_member(rk3568_cru, mode_con00, 0xc0);
+check_member(rk3568_cru, softrst_con[0], 0x400);
+
+struct pll_rate_table {
+	unsigned long rate;
+	unsigned int fbdiv;
+	unsigned int postdiv1;
+	unsigned int refdiv;
+	unsigned int postdiv2;
+	unsigned int dsmpd;
+	unsigned int frac;
+};
+
+#define RK3568_PMU_MODE			0x80
+#define RK3568_PMU_PLL_CON(x)		((x) * 0x4)
+#define RK3568_PLL_CON(x)		((x) * 0x4)
+#define RK3568_MODE_CON			0xc0
+
+enum {
+	/* CRU_PMU_CLK_SEL0_CON */
+	RTC32K_SEL_SHIFT		= 6,
+	RTC32K_SEL_MASK			= 0x3 << RTC32K_SEL_SHIFT,
+	RTC32K_SEL_PMUPVTM		= 0,
+	RTC32K_SEL_OSC1_32K,
+	RTC32K_SEL_OSC0_DIV32K,
+
+	/* CRU_PMU_CLK_SEL1_CON */
+	RTC32K_FRAC_NUMERATOR_SHIFT	= 16,
+	RTC32K_FRAC_NUMERATOR_MASK	= 0xffff << 16,
+	RTC32K_FRAC_DENOMINATOR_SHIFT	= 0,
+	RTC32K_FRAC_DENOMINATOR_MASK	= 0xffff,
+
+	/* CRU_PMU_CLK_SEL2_CON */
+	PCLK_PDPMU_SEL_SHIFT		= 15,
+	PCLK_PDPMU_SEL_MASK		= 1 << PCLK_PDPMU_SEL_SHIFT,
+	PCLK_PDPMU_SEL_PPLL		= 0,
+	PCLK_PDPMU_SEL_GPLL,
+	PCLK_PDPMU_DIV_SHIFT		= 0,
+	PCLK_PDPMU_DIV_MASK		= 0x1f,
+
+	/* CRU_PMU_CLK_SEL3_CON */
+	CLK_I2C0_DIV_SHIFT		= 0,
+	CLK_I2C0_DIV_MASK		= 0x7f,
+
+	/* CRU_PMU_CLK_SEL6_CON */
+	CLK_PWM0_SEL_SHIFT		= 7,
+	CLK_PWM0_SEL_MASK		= 1 << CLK_PWM0_SEL_SHIFT,
+	CLK_PWM0_SEL_XIN24M		= 0,
+	CLK_PWM0_SEL_PPLL,
+	CLK_PWM0_DIV_SHIFT		= 0,
+	CLK_PWM0_DIV_MASK		= 0x7f,
+
+	/* CRU_CLK_SEL0_CON */
+	CLK_CORE_PRE_SEL_SHIFT		= 7,
+	CLK_CORE_PRE_SEL_MASK		= 1 << CLK_CORE_PRE_SEL_SHIFT,
+	CLK_CORE_PRE_SEL_SRC		= 0,
+	CLK_CORE_PRE_SEL_APLL,
+
+	/* CRU_CLK_SEL2_CON */
+	SCLK_CORE_PRE_SEL_SHIFT		= 15,
+	SCLK_CORE_PRE_SEL_MASK		= 1 << SCLK_CORE_PRE_SEL_SHIFT,
+	SCLK_CORE_PRE_SEL_SRC		= 0,
+	SCLK_CORE_PRE_SEL_NPLL,
+	SCLK_CORE_SRC_SEL_SHIFT		= 8,
+	SCLK_CORE_SRC_SEL_MASK		= 3 << SCLK_CORE_SRC_SEL_SHIFT,
+	SCLK_CORE_SRC_SEL_APLL		= 0,
+	SCLK_CORE_SRC_SEL_GPLL,
+	SCLK_CORE_SRC_SEL_NPLL,
+	SCLK_CORE_SRC_DIV_SHIFT		= 0,
+	SCLK_CORE_SRC_DIV_MASK		= 0x1f << SCLK_CORE_SRC_DIV_SHIFT,
+
+	/* CRU_CLK_SEL3_CON */
+	GICCLK_CORE_DIV_SHIFT		= 8,
+	GICCLK_CORE_DIV_MASK		= 0x1f << GICCLK_CORE_DIV_SHIFT,
+	ATCLK_CORE_DIV_SHIFT		= 0,
+	ATCLK_CORE_DIV_MASK		= 0x1f << ATCLK_CORE_DIV_SHIFT,
+
+	/* CRU_CLK_SEL4_CON */
+	PERIPHCLK_CORE_PRE_DIV_SHIFT	= 8,
+	PERIPHCLK_CORE_PRE_DIV_MASK	= 0x1f << PERIPHCLK_CORE_PRE_DIV_SHIFT,
+	PCLK_CORE_PRE_DIV_SHIFT		= 0,
+	PCLK_CORE_PRE_DIV_MASK		= 0x1f << PCLK_CORE_PRE_DIV_SHIFT,
+
+	/* CRU_CLK_SEL5_CON */
+	ACLK_CORE_NIU2BUS_SEL_SHIFT	= 14,
+	ACLK_CORE_NIU2BUS_SEL_MASK	= 0x3 << ACLK_CORE_NIU2BUS_SEL_SHIFT,
+	ACLK_CORE_NDFT_DIV_SHIFT	= 8,
+	ACLK_CORE_NDFT_DIV_MASK		= 0x1f << ACLK_CORE_NDFT_DIV_SHIFT,
+
+	/* CRU_CLK_SEL10_CON */
+	HCLK_PERIMID_SEL_SHIFT		= 6,
+	HCLK_PERIMID_SEL_MASK		= 3 << HCLK_PERIMID_SEL_SHIFT,
+	HCLK_PERIMID_SEL_150M		= 0,
+	HCLK_PERIMID_SEL_100M,
+	HCLK_PERIMID_SEL_75M,
+	HCLK_PERIMID_SEL_24M,
+	ACLK_PERIMID_SEL_SHIFT		= 4,
+	ACLK_PERIMID_SEL_MASK		= 3 << ACLK_PERIMID_SEL_SHIFT,
+	ACLK_PERIMID_SEL_300M		= 0,
+	ACLK_PERIMID_SEL_200M,
+	ACLK_PERIMID_SEL_100M,
+	ACLK_PERIMID_SEL_24M,
+
+	/* CRU_CLK_SEL27_CON */
+	CLK_CRYPTO_PKA_SEL_SHIFT	= 6,
+	CLK_CRYPTO_PKA_SEL_MASK		= 3 << CLK_CRYPTO_PKA_SEL_SHIFT,
+	CLK_CRYPTO_PKA_SEL_300M		= 0,
+	CLK_CRYPTO_PKA_SEL_200M,
+	CLK_CRYPTO_PKA_SEL_100M,
+	CLK_CRYPTO_CORE_SEL_SHIFT	= 4,
+	CLK_CRYPTO_CORE_SEL_MASK	= 3 << CLK_CRYPTO_CORE_SEL_SHIFT,
+	CLK_CRYPTO_CORE_SEL_200M	= 0,
+	CLK_CRYPTO_CORE_SEL_150M,
+	CLK_CRYPTO_CORE_SEL_100M,
+	HCLK_SECURE_FLASH_SEL_SHIFT	= 2,
+	HCLK_SECURE_FLASH_SEL_MASK	= 3 << HCLK_SECURE_FLASH_SEL_SHIFT,
+	HCLK_SECURE_FLASH_SEL_150M	= 0,
+	HCLK_SECURE_FLASH_SEL_100M,
+	HCLK_SECURE_FLASH_SEL_75M,
+	HCLK_SECURE_FLASH_SEL_24M,
+	ACLK_SECURE_FLASH_SEL_SHIFT	= 0,
+	ACLK_SECURE_FLASH_SEL_MASK	= 3 << ACLK_SECURE_FLASH_SEL_SHIFT,
+	ACLK_SECURE_FLASH_SEL_200M	= 0,
+	ACLK_SECURE_FLASH_SEL_150M,
+	ACLK_SECURE_FLASH_SEL_100M,
+	ACLK_SECURE_FLASH_SEL_24M,
+
+	/* CRU_CLK_SEL28_CON */
+	CCLK_EMMC_SEL_SHIFT		= 12,
+	CCLK_EMMC_SEL_MASK		= 7 << CCLK_EMMC_SEL_SHIFT,
+	CCLK_EMMC_SEL_24M		= 0,
+	CCLK_EMMC_SEL_200M,
+	CCLK_EMMC_SEL_150M,
+	CCLK_EMMC_SEL_100M,
+	CCLK_EMMC_SEL_50M,
+	CCLK_EMMC_SEL_375K,
+	BCLK_EMMC_SEL_SHIFT		= 8,
+	BCLK_EMMC_SEL_MASK		= 3 << BCLK_EMMC_SEL_SHIFT,
+	BCLK_EMMC_SEL_200M		= 0,
+	BCLK_EMMC_SEL_150M,
+	BCLK_EMMC_SEL_125M,
+	SCLK_SFC_SEL_SHIFT		= 4,
+	SCLK_SFC_SEL_MASK		= 7 << SCLK_SFC_SEL_SHIFT,
+	SCLK_SFC_SEL_24M		= 0,
+	SCLK_SFC_SEL_50M,
+	SCLK_SFC_SEL_75M,
+	SCLK_SFC_SEL_100M,
+	SCLK_SFC_SEL_125M,
+	SCLK_SFC_SEL_150M,
+	NCLK_NANDC_SEL_SHIFT		= 0,
+	NCLK_NANDC_SEL_MASK		= 3 << NCLK_NANDC_SEL_SHIFT,
+	NCLK_NANDC_SEL_200M		= 0,
+	NCLK_NANDC_SEL_150M,
+	NCLK_NANDC_SEL_100M,
+	NCLK_NANDC_SEL_24M,
+
+	/* CRU_CLK_SEL30_CON */
+	CLK_SDMMC1_SEL_SHIFT		= 12,
+	CLK_SDMMC1_SEL_MASK		= 7 << CLK_SDMMC1_SEL_SHIFT,
+	CLK_SDMMC0_SEL_SHIFT		= 8,
+	CLK_SDMMC0_SEL_MASK		= 7 << CLK_SDMMC0_SEL_SHIFT,
+	CLK_SDMMC_SEL_24M		= 0,
+	CLK_SDMMC_SEL_400M,
+	CLK_SDMMC_SEL_300M,
+	CLK_SDMMC_SEL_100M,
+	CLK_SDMMC_SEL_50M,
+	CLK_SDMMC_SEL_750K,
+
+	/* CRU_CLK_SEL31_CON */
+	CLK_MAC0_OUT_SEL_SHIFT		= 14,
+	CLK_MAC0_OUT_SEL_MASK		= 3 << CLK_MAC0_OUT_SEL_SHIFT,
+	CLK_MAC0_OUT_SEL_125M		= 0,
+	CLK_MAC0_OUT_SEL_50M,
+	CLK_MAC0_OUT_SEL_25M,
+	CLK_MAC0_OUT_SEL_24M,
+	CLK_GMAC0_PTP_REF_SEL_SHIFT	= 12,
+	CLK_GMAC0_PTP_REF_SEL_MASK	= 3 << CLK_GMAC0_PTP_REF_SEL_SHIFT,
+	CLK_GMAC0_PTP_REF_SEL_62_5M	= 0,
+	CLK_GMAC0_PTP_REF_SEL_100M,
+	CLK_GMAC0_PTP_REF_SEL_50M,
+	CLK_GMAC0_PTP_REF_SEL_24M,
+	CLK_MAC0_2TOP_SEL_SHIFT		= 8,
+	CLK_MAC0_2TOP_SEL_MASK		= 3 << CLK_MAC0_2TOP_SEL_SHIFT,
+	CLK_MAC0_2TOP_SEL_125M		= 0,
+	CLK_MAC0_2TOP_SEL_50M,
+	CLK_MAC0_2TOP_SEL_25M,
+	CLK_MAC0_2TOP_SEL_PPLL,
+	RGMII0_CLK_SEL_SHIFT		= 4,
+	RGMII0_CLK_SEL_MASK		= 3 << RGMII0_CLK_SEL_SHIFT,
+	RGMII0_CLK_SEL_125M		= 0,
+	RGMII0_CLK_SEL_125M_1,
+	RGMII0_CLK_SEL_2_5M,
+	RGMII0_CLK_SEL_25M,
+	RMII0_CLK_SEL_SHIFT		= 3,
+	RMII0_CLK_SEL_MASK		= 1 << RMII0_CLK_SEL_SHIFT,
+	RMII0_CLK_SEL_2_5M		= 0,
+	RMII0_CLK_SEL_25M,
+	RMII0_EXTCLK_SEL_SHIFT		= 2,
+	RMII0_EXTCLK_SEL_MASK		= 1 << RMII0_EXTCLK_SEL_SHIFT,
+	RMII0_EXTCLK_SEL_MAC0_TOP	= 0,
+	RMII0_EXTCLK_SEL_IO,
+	RMII0_MODE_SHIFT		= 0,
+	RMII0_MODE_MASK			= 3 << RMII0_MODE_SHIFT,
+	RMII0_MODE_SEL_RGMII		= 0,
+	RMII0_MODE_SEL_RMII,
+	RMII0_MODE_SEL_GMII,
+
+	/* CRU_CLK_SEL32_CON */
+	CLK_SDMMC2_SEL_SHIFT		= 8,
+	CLK_SDMMC2_SEL_MASK		= 7 << CLK_SDMMC2_SEL_SHIFT,
+
+	/* CRU_CLK_SEL38_CON */
+	ACLK_VOP_PRE_SEL_SHIFT		= 6,
+	ACLK_VOP_PRE_SEL_MASK		= 3 << ACLK_VOP_PRE_SEL_SHIFT,
+	ACLK_VOP_PRE_SEL_CPLL		= 0,
+	ACLK_VOP_PRE_SEL_GPLL,
+	ACLK_VOP_PRE_SEL_HPLL,
+	ACLK_VOP_PRE_SEL_VPLL,
+	ACLK_VOP_PRE_DIV_SHIFT		= 0,
+	ACLK_VOP_PRE_DIV_MASK		= 0x1f << ACLK_VOP_PRE_DIV_SHIFT,
+
+	/* CRU_CLK_SEL39_CON */
+	DCLK0_VOP_SEL_SHIFT		= 10,
+	DCLK0_VOP_SEL_MASK		= 3 << DCLK0_VOP_SEL_SHIFT,
+	DCLK_VOP_SEL_HPLL		= 0,
+	DCLK_VOP_SEL_VPLL,
+	DCLK_VOP_SEL_GPLL,
+	DCLK_VOP_SEL_CPLL,
+	DCLK0_VOP_DIV_SHIFT		= 0,
+	DCLK0_VOP_DIV_MASK		= 0xff << DCLK0_VOP_DIV_SHIFT,
+
+	/* CRU_CLK_SEL40_CON */
+	DCLK1_VOP_SEL_SHIFT		= 10,
+	DCLK1_VOP_SEL_MASK		= 3 << DCLK1_VOP_SEL_SHIFT,
+	DCLK1_VOP_DIV_SHIFT		= 0,
+	DCLK1_VOP_DIV_MASK		= 0xff << DCLK1_VOP_DIV_SHIFT,
+
+	/* CRU_CLK_SEL41_CON */
+	DCLK2_VOP_SEL_SHIFT		= 10,
+	DCLK2_VOP_SEL_MASK		= 3 << DCLK2_VOP_SEL_SHIFT,
+	DCLK2_VOP_DIV_SHIFT		= 0,
+	DCLK2_VOP_DIV_MASK		= 0xff << DCLK2_VOP_DIV_SHIFT,
+
+	/* CRU_CLK_SEL50_CON */
+	PCLK_BUS_SEL_SHIFT		= 4,
+	PCLK_BUS_SEL_MASK		= 3 << PCLK_BUS_SEL_SHIFT,
+	PCLK_BUS_SEL_100M		= 0,
+	PCLK_BUS_SEL_75M,
+	PCLK_BUS_SEL_50M,
+	PCLK_BUS_SEL_24M,
+	ACLK_BUS_SEL_SHIFT		= 0,
+	ACLK_BUS_SEL_MASK		= 3 << ACLK_BUS_SEL_SHIFT,
+	ACLK_BUS_SEL_200M		= 0,
+	ACLK_BUS_SEL_150M,
+	ACLK_BUS_SEL_100M,
+	ACLK_BUS_SEL_24M,
+
+	/* CRU_CLK_SEL51_CON */
+	CLK_TSADC_DIV_SHIFT		= 8,
+	CLK_TSADC_DIV_MASK		= 0x7f << CLK_TSADC_DIV_SHIFT,
+	CLK_TSADC_TSEN_SEL_SHIFT	= 4,
+	CLK_TSADC_TSEN_SEL_MASK		= 0x3 << CLK_TSADC_TSEN_SEL_SHIFT,
+	CLK_TSADC_TSEN_SEL_24M		= 0,
+	CLK_TSADC_TSEN_SEL_100M,
+	CLK_TSADC_TSEN_SEL_CPLL_100M,
+	CLK_TSADC_TSEN_DIV_SHIFT	= 0,
+	CLK_TSADC_TSEN_DIV_MASK		= 0x7 << CLK_TSADC_TSEN_DIV_SHIFT,
+
+	/* CRU_CLK_SEL71_CON */
+	CLK_I2C_SEL_SHIFT		= 8,
+	CLK_I2C_SEL_MASK		= 3 << CLK_I2C_SEL_SHIFT,
+	CLK_I2C_SEL_200M		= 0,
+	CLK_I2C_SEL_100M,
+	CLK_I2C_SEL_24M,
+	CLK_I2C_SEL_CPLL_100M,
+
+	/* CRU_CLK_SEL72_CON */
+	CLK_PWM3_SEL_SHIFT		= 12,
+	CLK_PWM3_SEL_MASK		= 3 << CLK_PWM3_SEL_SHIFT,
+	CLK_PWM2_SEL_SHIFT		= 10,
+	CLK_PWM2_SEL_MASK		= 3 << CLK_PWM2_SEL_SHIFT,
+	CLK_PWM1_SEL_SHIFT		= 8,
+	CLK_PWM1_SEL_MASK		= 3 << CLK_PWM1_SEL_SHIFT,
+	CLK_PWM_SEL_100M		= 0,
+	CLK_PWM_SEL_24M,
+	CLK_PWM_SEL_CPLL_100M,
+	CLK_SPI3_SEL_SHIFT		= 6,
+	CLK_SPI3_SEL_MASK		= 3 << CLK_SPI3_SEL_SHIFT,
+	CLK_SPI2_SEL_SHIFT		= 4,
+	CLK_SPI2_SEL_MASK		= 3 << CLK_SPI2_SEL_SHIFT,
+	CLK_SPI1_SEL_SHIFT		= 2,
+	CLK_SPI1_SEL_MASK		= 3 << CLK_SPI1_SEL_SHIFT,
+	CLK_SPI0_SEL_SHIFT		= 0,
+	CLK_SPI0_SEL_MASK		= 3 << CLK_SPI0_SEL_SHIFT,
+	CLK_SPI_SEL_200M		= 0,
+	CLK_SPI_SEL_24M,
+	CLK_SPI_SEL_CPLL_100M,
+
+	/* CRU_CLK_SEL73_CON */
+	PCLK_TOP_SEL_SHIFT		= 12,
+	PCLK_TOP_SEL_MASK		= 3 << PCLK_TOP_SEL_SHIFT,
+	PCLK_TOP_SEL_100M		= 0,
+	PCLK_TOP_SEL_75M,
+	PCLK_TOP_SEL_50M,
+	PCLK_TOP_SEL_24M,
+	HCLK_TOP_SEL_SHIFT		= 8,
+	HCLK_TOP_SEL_MASK		= 3 << HCLK_TOP_SEL_SHIFT,
+	HCLK_TOP_SEL_150M		= 0,
+	HCLK_TOP_SEL_100M,
+	HCLK_TOP_SEL_75M,
+	HCLK_TOP_SEL_24M,
+	ACLK_TOP_LOW_SEL_SHIFT		= 4,
+	ACLK_TOP_LOW_SEL_MASK		= 3 << ACLK_TOP_LOW_SEL_SHIFT,
+	ACLK_TOP_LOW_SEL_400M		= 0,
+	ACLK_TOP_LOW_SEL_300M,
+	ACLK_TOP_LOW_SEL_200M,
+	ACLK_TOP_LOW_SEL_24M,
+	ACLK_TOP_HIGH_SEL_SHIFT		= 0,
+	ACLK_TOP_HIGH_SEL_MASK		= 3 << ACLK_TOP_HIGH_SEL_SHIFT,
+	ACLK_TOP_HIGH_SEL_500M		= 0,
+	ACLK_TOP_HIGH_SEL_400M,
+	ACLK_TOP_HIGH_SEL_300M,
+	ACLK_TOP_HIGH_SEL_24M,
+};
+#endif
diff --git a/drivers/clk/rockchip/Makefile b/drivers/clk/rockchip/Makefile
index 220dc91a0d..dc773c84b9 100644
--- a/drivers/clk/rockchip/Makefile
+++ b/drivers/clk/rockchip/Makefile
@@ -17,5 +17,6 @@ obj-$(CONFIG_ROCKCHIP_RK3308) += clk_rk3308.o
 obj-$(CONFIG_ROCKCHIP_RK3328) += clk_rk3328.o
 obj-$(CONFIG_ROCKCHIP_RK3368) += clk_rk3368.o
 obj-$(CONFIG_ROCKCHIP_RK3399) += clk_rk3399.o
+obj-$(CONFIG_ROCKCHIP_RK3568) += clk_rk3568.o
 obj-$(CONFIG_ROCKCHIP_RV1108) += clk_rv1108.o
 obj-$(CONFIG_ROCKCHIP_RV1126) += clk_rv1126.o
diff --git a/drivers/clk/rockchip/clk_rk3568.c b/drivers/clk/rockchip/clk_rk3568.c
new file mode 100644
index 0000000000..ed636cc0bb
--- /dev/null
+++ b/drivers/clk/rockchip/clk_rk3568.c
@@ -0,0 +1,2621 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd
+ * Author: Elaine Zhang <zhangqing@rock-chips.com>
+ */
+
+#include <common.h>
+#include <bitfield.h>
+#include <clk-uclass.h>
+#include <dm.h>
+#include <errno.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk3568.h>
+#include <asm/arch/hardware.h>
+#include <asm/io.h>
+#include <dm/lists.h>
+#include <dt-bindings/clock/rk3568-cru.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define RK3568_CPUCLK_RATE(_rate, _aclk_div, _pclk_div)		\
+{								\
+	.rate	= _rate##U,					\
+	.aclk_div = _aclk_div,					\
+	.pclk_div = _pclk_div,					\
+}
+
+#define DIV_TO_RATE(input_rate, div)    ((input_rate) / ((div) + 1))
+
+static struct rockchip_cpu_rate_table rk3568_cpu_rates[] = {
+	RK3568_CPUCLK_RATE(1416000000, 1, 5),
+	RK3568_CPUCLK_RATE(1296000000, 1, 5),
+	RK3568_CPUCLK_RATE(1200000000, 1, 3),
+	RK3568_CPUCLK_RATE(1104000000, 1, 3),
+	RK3568_CPUCLK_RATE(1008000000, 1, 3),
+	RK3568_CPUCLK_RATE(912000000, 1, 3),
+	RK3568_CPUCLK_RATE(816000000, 1, 3),
+	RK3568_CPUCLK_RATE(600000000, 1, 1),
+	RK3568_CPUCLK_RATE(408000000, 1, 1),
+	{ /* sentinel */ },
+};
+
+static struct rockchip_pll_rate_table rk3568_pll_rates[] = {
+	/* _mhz, _refdiv, _fbdiv, _postdiv1, _postdiv2, _dsmpd, _frac */
+	RK3036_PLL_RATE(1608000000, 1, 67, 1, 1, 1, 0),
+	RK3036_PLL_RATE(1416000000, 1, 118, 2, 1, 1, 0),
+	RK3036_PLL_RATE(1296000000, 1, 108, 2, 1, 1, 0),
+	RK3036_PLL_RATE(1200000000, 1, 100, 2, 1, 1, 0),
+	RK3036_PLL_RATE(1188000000, 1, 99, 2, 1, 1, 0),
+	RK3036_PLL_RATE(1104000000, 1, 92, 2, 1, 1, 0),
+	RK3036_PLL_RATE(1008000000, 1, 84, 2, 1, 1, 0),
+	RK3036_PLL_RATE(1000000000, 3, 250, 2, 1, 1, 0),
+	RK3036_PLL_RATE(912000000, 1, 76, 2, 1, 1, 0),
+	RK3036_PLL_RATE(816000000, 1, 68, 2, 1, 1, 0),
+	RK3036_PLL_RATE(600000000, 1, 100, 4, 1, 1, 0),
+	RK3036_PLL_RATE(594000000, 1, 99, 4, 1, 1, 0),
+	RK3036_PLL_RATE(500000000, 1, 125, 6, 1, 1, 0),
+	RK3036_PLL_RATE(408000000, 1, 68, 2, 2, 1, 0),
+	RK3036_PLL_RATE(200000000, 1, 200, 6, 4, 1, 0),
+	RK3036_PLL_RATE(100000000, 1, 150, 6, 6, 1, 0),
+	{ /* sentinel */ },
+};
+
+static struct rockchip_pll_clock rk3568_pll_clks[] = {
+	[APLL] = PLL(pll_rk3328, PLL_APLL, RK3568_PLL_CON(0),
+		     RK3568_MODE_CON, 0, 10, 0, rk3568_pll_rates),
+	[DPLL] = PLL(pll_rk3328, PLL_DPLL, RK3568_PLL_CON(8),
+		     RK3568_MODE_CON, 2, 10, 0, NULL),
+	[CPLL] = PLL(pll_rk3328, PLL_CPLL, RK3568_PLL_CON(16),
+		     RK3568_MODE_CON, 4, 10, 0, rk3568_pll_rates),
+	[GPLL] = PLL(pll_rk3328, PLL_HPLL, RK3568_PLL_CON(24),
+		     RK3568_MODE_CON, 6, 10, 0, rk3568_pll_rates),
+	[NPLL] = PLL(pll_rk3328, PLL_NPLL, RK3568_PLL_CON(32),
+		     RK3568_MODE_CON, 10, 10, 0, rk3568_pll_rates),
+	[VPLL] = PLL(pll_rk3328, PLL_VPLL, RK3568_PLL_CON(40),
+		     RK3568_MODE_CON, 12, 10, 0, rk3568_pll_rates),
+	[PPLL] = PLL(pll_rk3328, PLL_PPLL, RK3568_PMU_PLL_CON(0),
+		     RK3568_PMU_MODE, 0, 10, 0, rk3568_pll_rates),
+	[HPLL] = PLL(pll_rk3328, PLL_HPLL, RK3568_PMU_PLL_CON(8),
+		     RK3568_PMU_MODE, 2, 10, 0, rk3568_pll_rates),
+};
+
+#if (!IS_ENABLED(CONFIG_SPL_BUILD))
+#define RK3568_CLK_DUMP(_id, _name, _iscru)	\
+{						\
+	.id = _id,				\
+	.name = _name,				\
+	.is_cru = _iscru,			\
+}
+
+static const struct rk3568_clk_info clks_dump[] = {
+	RK3568_CLK_DUMP(PLL_APLL, "apll", true),
+	RK3568_CLK_DUMP(PLL_DPLL, "dpll", true),
+	RK3568_CLK_DUMP(PLL_GPLL, "gpll", true),
+	RK3568_CLK_DUMP(PLL_CPLL, "cpll", true),
+	RK3568_CLK_DUMP(PLL_NPLL, "npll", true),
+	RK3568_CLK_DUMP(PLL_VPLL, "vpll", true),
+	RK3568_CLK_DUMP(PLL_HPLL, "hpll", false),
+	RK3568_CLK_DUMP(PLL_PPLL, "ppll", false),
+	RK3568_CLK_DUMP(ARMCLK, "armclk", true),
+	RK3568_CLK_DUMP(ACLK_BUS, "aclk_bus", true),
+	RK3568_CLK_DUMP(PCLK_BUS, "pclk_bus", true),
+	RK3568_CLK_DUMP(ACLK_TOP_HIGH, "aclk_top_high", true),
+	RK3568_CLK_DUMP(ACLK_TOP_LOW, "aclk_top_low", true),
+	RK3568_CLK_DUMP(HCLK_TOP, "hclk_top", true),
+	RK3568_CLK_DUMP(PCLK_TOP, "pclk_top", true),
+	RK3568_CLK_DUMP(ACLK_PERIMID, "aclk_perimid", true),
+	RK3568_CLK_DUMP(HCLK_PERIMID, "hclk_perimid", true),
+	RK3568_CLK_DUMP(PCLK_PMU, "pclk_pmu", false),
+};
+#endif
+
+static ulong rk3568_pmu_pll_set_rate(struct rk3568_clk_priv *priv,
+				     ulong pll_id, ulong rate)
+{
+	struct udevice *pmucru_dev;
+	struct rk3568_pmuclk_priv *pmu_priv;
+	int ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_CLK,
+					  DM_GET_DRIVER(rockchip_rk3568_pmucru),
+					  &pmucru_dev);
+	if (ret) {
+		printf("%s: could not find pmucru device\n", __func__);
+		return ret;
+	}
+	pmu_priv = dev_get_priv(pmucru_dev);
+
+	rockchip_pll_set_rate(&rk3568_pll_clks[pll_id],
+			      pmu_priv->pmucru, pll_id, rate);
+
+	return 0;
+}
+
+static ulong rk3568_pmu_pll_get_rate(struct rk3568_clk_priv *priv,
+				     ulong pll_id)
+{
+	struct udevice *pmucru_dev;
+	struct rk3568_pmuclk_priv *pmu_priv;
+	int ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_CLK,
+					  DM_GET_DRIVER(rockchip_rk3568_pmucru),
+					  &pmucru_dev);
+	if (ret) {
+		printf("%s: could not find pmucru device\n", __func__);
+		return ret;
+	}
+	pmu_priv = dev_get_priv(pmucru_dev);
+
+	return rockchip_pll_get_rate(&rk3568_pll_clks[pll_id],
+				      pmu_priv->pmucru, pll_id);
+}
+
+/*
+ *
+ * rational_best_approximation(31415, 10000,
+ *		(1 << 8) - 1, (1 << 5) - 1, &n, &d);
+ *
+ * you may look at given_numerator as a fixed point number,
+ * with the fractional part size described in given_denominator.
+ *
+ * for theoretical background, see:
+ * http://en.wikipedia.org/wiki/Continued_fraction
+ */
+static void rational_best_approximation(unsigned long given_numerator,
+					unsigned long given_denominator,
+					unsigned long max_numerator,
+					unsigned long max_denominator,
+					unsigned long *best_numerator,
+					unsigned long *best_denominator)
+{
+	unsigned long n, d, n0, d0, n1, d1;
+
+	n = given_numerator;
+	d = given_denominator;
+	n0 = 0;
+	d1 = 0;
+	n1 = 1;
+	d0 = 1;
+	for (;;) {
+		unsigned long t, a;
+
+		if (n1 > max_numerator || d1 > max_denominator) {
+			n1 = n0;
+			d1 = d0;
+			break;
+		}
+		if (d == 0)
+			break;
+		t = d;
+		a = n / d;
+		d = n % d;
+		n = t;
+		t = n0 + a * n1;
+		n0 = n1;
+		n1 = t;
+		t = d0 + a * d1;
+		d0 = d1;
+		d1 = t;
+	}
+	*best_numerator = n1;
+	*best_denominator = d1;
+}
+
+static ulong rk3568_rtc32k_get_pmuclk(struct rk3568_pmuclk_priv *priv)
+{
+	struct rk3568_pmucru *pmucru = priv->pmucru;
+	unsigned long m, n;
+	u32 fracdiv;
+
+	fracdiv = readl(&pmucru->pmu_clksel_con[1]);
+	m = fracdiv & RTC32K_FRAC_NUMERATOR_MASK;
+	m >>= RTC32K_FRAC_NUMERATOR_SHIFT;
+	n = fracdiv & RTC32K_FRAC_DENOMINATOR_MASK;
+	n >>= RTC32K_FRAC_DENOMINATOR_SHIFT;
+
+	return OSC_HZ * m / n;
+}
+
+static ulong rk3568_rtc32k_set_pmuclk(struct rk3568_pmuclk_priv *priv,
+				      ulong rate)
+{
+	struct rk3568_pmucru *pmucru = priv->pmucru;
+	unsigned long m, n, val;
+
+	rk_clrsetreg(&pmucru->pmu_clksel_con[0], RTC32K_SEL_MASK,
+		     RTC32K_SEL_OSC0_DIV32K << RTC32K_SEL_SHIFT);
+
+	rational_best_approximation(rate, OSC_HZ,
+				    GENMASK(16 - 1, 0),
+				    GENMASK(16 - 1, 0),
+				    &m, &n);
+	val = m << RTC32K_FRAC_NUMERATOR_SHIFT | n;
+	writel(val, &pmucru->pmu_clksel_con[1]);
+
+	return rk3568_rtc32k_get_pmuclk(priv);
+}
+
+static ulong rk3568_i2c_get_pmuclk(struct rk3568_pmuclk_priv *priv,
+				   ulong clk_id)
+{
+	struct rk3568_pmucru *pmucru = priv->pmucru;
+	u32 div, con;
+
+	switch (clk_id) {
+	case CLK_I2C0:
+		con = readl(&pmucru->pmu_clksel_con[3]);
+		div = (con & CLK_I2C0_DIV_MASK) >> CLK_I2C0_DIV_SHIFT;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(priv->ppll_hz, div);
+}
+
+static ulong rk3568_i2c_set_pmuclk(struct rk3568_pmuclk_priv *priv,
+				   ulong clk_id, ulong rate)
+{
+	struct rk3568_pmucru *pmucru = priv->pmucru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->ppll_hz, rate);
+	assert(src_clk_div - 1 <= 127);
+
+	switch (clk_id) {
+	case CLK_I2C0:
+		rk_clrsetreg(&pmucru->pmu_clksel_con[3], CLK_I2C0_DIV_MASK,
+			     (src_clk_div - 1) << CLK_I2C0_DIV_SHIFT);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return rk3568_i2c_get_pmuclk(priv, clk_id);
+}
+
+static ulong rk3568_pwm_get_pmuclk(struct rk3568_pmuclk_priv *priv,
+				   ulong clk_id)
+{
+	struct rk3568_pmucru *pmucru = priv->pmucru;
+	u32 div, sel, con, parent;
+
+	switch (clk_id) {
+	case CLK_PWM0:
+		con = readl(&pmucru->pmu_clksel_con[6]);
+		sel = (con & CLK_PWM0_SEL_MASK) >> CLK_PWM0_SEL_SHIFT;
+		div = (con & CLK_PWM0_DIV_MASK) >> CLK_PWM0_DIV_SHIFT;
+		if (sel == CLK_PWM0_SEL_XIN24M)
+			parent = OSC_HZ;
+		else
+			parent = priv->ppll_hz;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rk3568_pwm_set_pmuclk(struct rk3568_pmuclk_priv *priv,
+				   ulong clk_id, ulong rate)
+{
+	struct rk3568_pmucru *pmucru = priv->pmucru;
+	int src_clk_div;
+
+	switch (clk_id) {
+	case CLK_PWM0:
+		if (rate == OSC_HZ) {
+			rk_clrsetreg(&pmucru->pmu_clksel_con[6],
+				     CLK_PWM0_SEL_MASK | CLK_PWM0_DIV_MASK,
+				     (CLK_PWM0_SEL_XIN24M <<
+				      CLK_PWM0_SEL_SHIFT) |
+				     0 << CLK_PWM0_SEL_SHIFT);
+		} else {
+			src_clk_div = DIV_ROUND_UP(priv->ppll_hz, rate);
+			assert(src_clk_div - 1 <= 127);
+			rk_clrsetreg(&pmucru->pmu_clksel_con[6],
+				     CLK_PWM0_DIV_MASK | CLK_PWM0_DIV_MASK,
+				     (CLK_PWM0_SEL_PPLL << CLK_PWM0_SEL_SHIFT) |
+				     (src_clk_div - 1) << CLK_PWM0_DIV_SHIFT);
+		}
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return rk3568_pwm_get_pmuclk(priv, clk_id);
+}
+
+static ulong rk3568_pmu_get_pmuclk(struct rk3568_pmuclk_priv *priv)
+{
+	struct rk3568_pmucru *pmucru = priv->pmucru;
+	u32 div, con, sel, parent;
+
+	con = readl(&pmucru->pmu_clksel_con[2]);
+	sel = (con & PCLK_PDPMU_SEL_MASK) >> PCLK_PDPMU_SEL_SHIFT;
+	div = (con & PCLK_PDPMU_DIV_MASK) >> PCLK_PDPMU_DIV_SHIFT;
+	if (sel)
+		parent = GPLL_HZ;
+	else
+		parent = priv->ppll_hz;
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rk3568_pmu_set_pmuclk(struct rk3568_pmuclk_priv *priv,
+				   ulong rate)
+{
+	struct rk3568_pmucru *pmucru = priv->pmucru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->ppll_hz, rate);
+	assert(src_clk_div - 1 <= 31);
+
+	rk_clrsetreg(&pmucru->pmu_clksel_con[2],
+		     PCLK_PDPMU_DIV_MASK | PCLK_PDPMU_SEL_MASK,
+		     (PCLK_PDPMU_SEL_PPLL << PCLK_PDPMU_SEL_SHIFT) |
+		     ((src_clk_div - 1) << PCLK_PDPMU_DIV_SHIFT));
+
+	return rk3568_pmu_get_pmuclk(priv);
+}
+
+static ulong rk3568_pmuclk_get_rate(struct clk *clk)
+{
+	struct rk3568_pmuclk_priv *priv = dev_get_priv(clk->dev);
+	ulong rate = 0;
+
+	if (!priv->ppll_hz) {
+		printf("%s ppll=%lu\n", __func__, priv->ppll_hz);
+		return -ENOENT;
+	}
+
+	debug("%s %ld\n", __func__, clk->id);
+	switch (clk->id) {
+	case PLL_PPLL:
+		rate = rockchip_pll_get_rate(&rk3568_pll_clks[PPLL],
+					     priv->pmucru, PPLL);
+		break;
+	case CLK_RTC_32K:
+	case CLK_RTC32K_FRAC:
+		rate = rk3568_rtc32k_get_pmuclk(priv);
+		break;
+	case CLK_I2C0:
+		rate = rk3568_i2c_get_pmuclk(priv, clk->id);
+		break;
+	case CLK_PWM0:
+		rate = rk3568_pwm_get_pmuclk(priv, clk->id);
+		break;
+	case PCLK_PMU:
+		rate = rk3568_pmu_get_pmuclk(priv);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return rate;
+}
+
+static ulong rk3568_pmuclk_set_rate(struct clk *clk, ulong rate)
+{
+	struct rk3568_pmuclk_priv *priv = dev_get_priv(clk->dev);
+	ulong ret = 0;
+
+	if (!priv->ppll_hz) {
+		printf("%s ppll=%lu\n", __func__, priv->ppll_hz);
+		return -ENOENT;
+	}
+
+	debug("%s %ld %ld\n", __func__, clk->id, rate);
+	switch (clk->id) {
+	case PLL_PPLL:
+		ret = rockchip_pll_set_rate(&rk3568_pll_clks[PPLL],
+					    priv->pmucru, PPLL, rate);
+		break;
+	case CLK_RTC_32K:
+	case CLK_RTC32K_FRAC:
+		ret = rk3568_rtc32k_set_pmuclk(priv, rate);
+		break;
+	case CLK_I2C0:
+		ret = rk3568_i2c_set_pmuclk(priv, clk->id, rate);
+		break;
+	case CLK_PWM0:
+		ret = rk3568_pwm_set_pmuclk(priv, clk->id, rate);
+		break;
+	case PCLK_PMU:
+		ret = rk3568_pmu_set_pmuclk(priv, rate);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+}
+
+static int rk3568_rtc32k_set_parent(struct clk *clk, struct clk *parent)
+{
+	struct rk3568_pmuclk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3568_pmucru *pmucru = priv->pmucru;
+
+	if (parent->id == CLK_RTC32K_FRAC)
+		rk_clrsetreg(&pmucru->pmu_clksel_con[0], RTC32K_SEL_MASK,
+			     RTC32K_SEL_OSC0_DIV32K << RTC32K_SEL_SHIFT);
+	else
+		rk_clrsetreg(&pmucru->pmu_clksel_con[0], RTC32K_SEL_MASK,
+			     RTC32K_SEL_OSC1_32K << RTC32K_SEL_SHIFT);
+
+	return 0;
+}
+
+static int rk3568_pmuclk_set_parent(struct clk *clk, struct clk *parent)
+{
+	switch (clk->id) {
+	case CLK_RTC_32K:
+		return rk3568_rtc32k_set_parent(clk, parent);
+	default:
+		return -ENOENT;
+	}
+}
+
+static struct clk_ops rk3568_pmuclk_ops = {
+	.get_rate = rk3568_pmuclk_get_rate,
+	.set_rate = rk3568_pmuclk_set_rate,
+	.set_parent = rk3568_pmuclk_set_parent,
+};
+
+static int rk3568_pmuclk_probe(struct udevice *dev)
+{
+	struct rk3568_pmuclk_priv *priv = dev_get_priv(dev);
+	int ret = 0;
+
+	if (priv->ppll_hz != PPLL_HZ) {
+		ret = rockchip_pll_set_rate(&rk3568_pll_clks[PPLL],
+					    priv->pmucru,
+					    PPLL, PPLL_HZ);
+		if (!ret)
+			priv->ppll_hz = PPLL_HZ;
+	}
+
+	return 0;
+}
+
+static int rk3568_pmuclk_ofdata_to_platdata(struct udevice *dev)
+{
+	struct rk3568_pmuclk_priv *priv = dev_get_priv(dev);
+
+	priv->pmucru = dev_read_addr_ptr(dev);
+
+	return 0;
+}
+
+static int rk3568_pmuclk_bind(struct udevice *dev)
+{
+	int ret = 0;
+	struct udevice *sf_child;
+	struct softreset_reg *sf_priv;
+
+	ret = device_bind_driver_to_node(dev, "rockchip_reset",
+					 "reset", dev_ofnode(dev),
+					 &sf_child);
+	if (ret) {
+		debug("Warning: No rockchip reset driver: ret=%d\n", ret);
+	} else {
+		sf_priv = malloc(sizeof(struct softreset_reg));
+		sf_priv->sf_reset_offset = offsetof(struct rk3568_pmucru,
+						    pmu_softrst_con[0]);
+		sf_priv->sf_reset_num = 1;
+		sf_child->priv = sf_priv;
+	}
+
+	return 0;
+}
+
+static const struct udevice_id rk3568_pmuclk_ids[] = {
+	{ .compatible = "rockchip,rk3568-pmucru" },
+	{ }
+};
+
+U_BOOT_DRIVER(rockchip_rk3568_pmucru) = {
+	.name		= "rockchip_rk3568_pmucru",
+	.id		= UCLASS_CLK,
+	.of_match	= rk3568_pmuclk_ids,
+	.priv_auto_alloc_size = sizeof(struct rk3568_pmuclk_priv),
+	.ofdata_to_platdata = rk3568_pmuclk_ofdata_to_platdata,
+	.ops		= &rk3568_pmuclk_ops,
+	.bind		= rk3568_pmuclk_bind,
+	.probe		= rk3568_pmuclk_probe,
+};
+
+static int rk3568_armclk_set_clk(struct rk3568_clk_priv *priv, ulong hz)
+{
+	struct rk3568_cru *cru = priv->cru;
+	const struct rockchip_cpu_rate_table *rate;
+	ulong old_rate;
+
+	rate = rockchip_get_cpu_settings(rk3568_cpu_rates, hz);
+	if (!rate) {
+		printf("%s unsupported rate\n", __func__);
+		return -EINVAL;
+	}
+
+	rk_clrsetreg(&cru->clksel_con[0],
+		     CLK_CORE_PRE_SEL_MASK,
+		     (CLK_CORE_PRE_SEL_SRC << CLK_CORE_PRE_SEL_SHIFT));
+	rk_clrsetreg(&cru->clksel_con[2],
+		     SCLK_CORE_PRE_SEL_MASK |
+		     SCLK_CORE_SRC_SEL_MASK |
+		     SCLK_CORE_SRC_DIV_MASK,
+		     (SCLK_CORE_PRE_SEL_SRC <<
+		      SCLK_CORE_PRE_SEL_SHIFT) |
+		     (SCLK_CORE_SRC_SEL_APLL <<
+		      SCLK_CORE_SRC_SEL_SHIFT) |
+		     (1 << SCLK_CORE_SRC_DIV_SHIFT));
+
+	/*
+	 * set up dependent divisors for DBG and ACLK clocks.
+	 */
+	old_rate = rockchip_pll_get_rate(&rk3568_pll_clks[APLL],
+					 priv->cru, APLL);
+	if (old_rate > hz) {
+		if (rockchip_pll_set_rate(&rk3568_pll_clks[APLL],
+					  priv->cru, APLL, hz))
+			return -EINVAL;
+		rk_clrsetreg(&cru->clksel_con[3],
+			     GICCLK_CORE_DIV_MASK | ATCLK_CORE_DIV_MASK,
+			     rate->pclk_div << GICCLK_CORE_DIV_SHIFT |
+			     rate->pclk_div << ATCLK_CORE_DIV_SHIFT);
+		rk_clrsetreg(&cru->clksel_con[4],
+			     PERIPHCLK_CORE_PRE_DIV_MASK |
+			     PCLK_CORE_PRE_DIV_MASK,
+			     rate->pclk_div << PCLK_CORE_PRE_DIV_SHIFT |
+			     rate->pclk_div << PERIPHCLK_CORE_PRE_DIV_SHIFT);
+		rk_clrsetreg(&cru->clksel_con[5],
+			     ACLK_CORE_NDFT_DIV_MASK,
+			     rate->aclk_div << ACLK_CORE_NDFT_DIV_SHIFT);
+	} else if (old_rate < hz) {
+		rk_clrsetreg(&cru->clksel_con[3],
+			     GICCLK_CORE_DIV_MASK | ATCLK_CORE_DIV_MASK,
+			     rate->pclk_div << GICCLK_CORE_DIV_SHIFT |
+			     rate->pclk_div << ATCLK_CORE_DIV_SHIFT);
+		rk_clrsetreg(&cru->clksel_con[4],
+			     PERIPHCLK_CORE_PRE_DIV_MASK |
+			     PCLK_CORE_PRE_DIV_MASK,
+			     rate->pclk_div << PCLK_CORE_PRE_DIV_SHIFT |
+			     rate->pclk_div << PERIPHCLK_CORE_PRE_DIV_SHIFT);
+		rk_clrsetreg(&cru->clksel_con[5],
+			     ACLK_CORE_NDFT_DIV_MASK,
+			     rate->aclk_div << ACLK_CORE_NDFT_DIV_SHIFT);
+		if (rockchip_pll_set_rate(&rk3568_pll_clks[APLL],
+					  priv->cru, APLL, hz))
+			return -EINVAL;
+	}
+
+	return 0;
+}
+
+static ulong rk3568_bus_get_clk(struct rk3568_clk_priv *priv, ulong clk_id)
+{
+	struct rk3568_cru *cru = priv->cru;
+	u32 con, sel, rate;
+
+	switch (clk_id) {
+	case ACLK_BUS:
+		con = readl(&cru->clksel_con[50]);
+		sel = (con & ACLK_BUS_SEL_MASK) >> ACLK_BUS_SEL_SHIFT;
+		if (sel == ACLK_BUS_SEL_200M)
+			rate = 200 * MHz;
+		else if (sel == ACLK_BUS_SEL_150M)
+			rate = 150 * MHz;
+		else if (sel == ACLK_BUS_SEL_100M)
+			rate = 100 * MHz;
+		else
+			rate = OSC_HZ;
+		break;
+	case PCLK_BUS:
+		con = readl(&cru->clksel_con[50]);
+		sel = (con & PCLK_BUS_SEL_MASK) >> PCLK_BUS_SEL_SHIFT;
+		if (sel == PCLK_BUS_SEL_100M)
+			rate = 100 * MHz;
+		else if (sel == PCLK_BUS_SEL_75M)
+			rate = 75 * MHz;
+		else if (sel == PCLK_BUS_SEL_50M)
+			rate = 50 * MHz;
+		else
+			rate = OSC_HZ;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return rate;
+}
+
+static ulong rk3568_bus_set_clk(struct rk3568_clk_priv *priv,
+				ulong clk_id, ulong rate)
+{
+	struct rk3568_cru *cru = priv->cru;
+	int src_clk;
+
+	switch (clk_id) {
+	case ACLK_BUS:
+		if (rate == 200 * MHz)
+			src_clk = ACLK_BUS_SEL_200M;
+		else if (rate == 150 * MHz)
+			src_clk = ACLK_BUS_SEL_150M;
+		else if (rate == 100 * MHz)
+			src_clk = ACLK_BUS_SEL_100M;
+		else
+			src_clk = ACLK_BUS_SEL_24M;
+		rk_clrsetreg(&cru->clksel_con[50],
+			     ACLK_BUS_SEL_MASK,
+			     src_clk << ACLK_BUS_SEL_SHIFT);
+		break;
+	case PCLK_BUS:
+		if (rate == 100 * MHz)
+			src_clk = PCLK_BUS_SEL_100M;
+		else if (rate == 75 * MHz)
+			src_clk = PCLK_BUS_SEL_75M;
+		else if (rate == 50 * MHz)
+			src_clk = PCLK_BUS_SEL_50M;
+		else
+			src_clk = PCLK_BUS_SEL_24M;
+		rk_clrsetreg(&cru->clksel_con[50],
+			     PCLK_BUS_SEL_MASK,
+			     src_clk << PCLK_BUS_SEL_SHIFT);
+		break;
+
+	default:
+		printf("do not support this bus freq\n");
+		return -EINVAL;
+	}
+
+	return rk3568_bus_get_clk(priv, clk_id);
+}
+
+static ulong rk3568_perimid_get_clk(struct rk3568_clk_priv *priv, ulong clk_id)
+{
+	struct rk3568_cru *cru = priv->cru;
+	u32 con, sel, rate;
+
+	switch (clk_id) {
+	case ACLK_PERIMID:
+		con = readl(&cru->clksel_con[10]);
+		sel = (con & ACLK_PERIMID_SEL_MASK) >> ACLK_PERIMID_SEL_SHIFT;
+		if (sel == ACLK_PERIMID_SEL_300M)
+			rate = 300 * MHz;
+		else if (sel == ACLK_PERIMID_SEL_200M)
+			rate = 200 * MHz;
+		else if (sel == ACLK_PERIMID_SEL_100M)
+			rate = 100 * MHz;
+		else
+			rate = OSC_HZ;
+		break;
+	case HCLK_PERIMID:
+		con = readl(&cru->clksel_con[10]);
+		sel = (con & HCLK_PERIMID_SEL_MASK) >> HCLK_PERIMID_SEL_SHIFT;
+		if (sel == HCLK_PERIMID_SEL_150M)
+			rate = 150 * MHz;
+		else if (sel == HCLK_PERIMID_SEL_100M)
+			rate = 100 * MHz;
+		else if (sel == HCLK_PERIMID_SEL_75M)
+			rate = 75 * MHz;
+		else
+			rate = OSC_HZ;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return rate;
+}
+
+static ulong rk3568_perimid_set_clk(struct rk3568_clk_priv *priv,
+				    ulong clk_id, ulong rate)
+{
+	struct rk3568_cru *cru = priv->cru;
+	int src_clk;
+
+	switch (clk_id) {
+	case ACLK_PERIMID:
+		if (rate == 300 * MHz)
+			src_clk = ACLK_PERIMID_SEL_300M;
+		else if (rate == 200 * MHz)
+			src_clk = ACLK_PERIMID_SEL_200M;
+		else if (rate == 100 * MHz)
+			src_clk = ACLK_PERIMID_SEL_100M;
+		else
+			src_clk = ACLK_PERIMID_SEL_24M;
+		rk_clrsetreg(&cru->clksel_con[10],
+			     ACLK_PERIMID_SEL_MASK,
+			     src_clk << ACLK_PERIMID_SEL_SHIFT);
+		break;
+	case HCLK_PERIMID:
+		if (rate == 150 * MHz)
+			src_clk = HCLK_PERIMID_SEL_150M;
+		else if (rate == 100 * MHz)
+			src_clk = HCLK_PERIMID_SEL_100M;
+		else if (rate == 75 * MHz)
+			src_clk = HCLK_PERIMID_SEL_75M;
+		else
+			src_clk = HCLK_PERIMID_SEL_24M;
+		rk_clrsetreg(&cru->clksel_con[10],
+			     HCLK_PERIMID_SEL_MASK,
+			     src_clk << HCLK_PERIMID_SEL_SHIFT);
+		break;
+
+	default:
+		printf("do not support this permid freq\n");
+		return -EINVAL;
+	}
+
+	return rk3568_perimid_get_clk(priv, clk_id);
+}
+
+static ulong rk3568_top_get_clk(struct rk3568_clk_priv *priv, ulong clk_id)
+{
+	struct rk3568_cru *cru = priv->cru;
+	u32 con, sel, rate;
+
+	switch (clk_id) {
+	case ACLK_TOP_HIGH:
+		con = readl(&cru->clksel_con[73]);
+		sel = (con & ACLK_TOP_HIGH_SEL_MASK) >> ACLK_TOP_HIGH_SEL_SHIFT;
+		if (sel == ACLK_TOP_HIGH_SEL_500M)
+			rate = 500 * MHz;
+		else if (sel == ACLK_TOP_HIGH_SEL_400M)
+			rate = 400 * MHz;
+		else if (sel == ACLK_TOP_HIGH_SEL_300M)
+			rate = 300 * MHz;
+		else
+			rate = OSC_HZ;
+		break;
+	case ACLK_TOP_LOW:
+		con = readl(&cru->clksel_con[73]);
+		sel = (con & ACLK_TOP_LOW_SEL_MASK) >> ACLK_TOP_LOW_SEL_SHIFT;
+		if (sel == ACLK_TOP_LOW_SEL_400M)
+			rate = 400 * MHz;
+		else if (sel == ACLK_TOP_LOW_SEL_300M)
+			rate = 300 * MHz;
+		else if (sel == ACLK_TOP_LOW_SEL_200M)
+			rate = 200 * MHz;
+		else
+			rate = OSC_HZ;
+		break;
+	case HCLK_TOP:
+		con = readl(&cru->clksel_con[73]);
+		sel = (con & HCLK_TOP_SEL_MASK) >> HCLK_TOP_SEL_SHIFT;
+		if (sel == HCLK_TOP_SEL_150M)
+			rate = 150 * MHz;
+		else if (sel == HCLK_TOP_SEL_100M)
+			rate = 100 * MHz;
+		else if (sel == HCLK_TOP_SEL_75M)
+			rate = 75 * MHz;
+		else
+			rate = OSC_HZ;
+		break;
+	case PCLK_TOP:
+		con = readl(&cru->clksel_con[73]);
+		sel = (con & PCLK_TOP_SEL_MASK) >> PCLK_TOP_SEL_SHIFT;
+		if (sel == PCLK_TOP_SEL_100M)
+			rate = 100 * MHz;
+		else if (sel == PCLK_TOP_SEL_75M)
+			rate = 75 * MHz;
+		else if (sel == PCLK_TOP_SEL_50M)
+			rate = 50 * MHz;
+		else
+			rate = OSC_HZ;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return rate;
+}
+
+static ulong rk3568_top_set_clk(struct rk3568_clk_priv *priv,
+				ulong clk_id, ulong rate)
+{
+	struct rk3568_cru *cru = priv->cru;
+	int src_clk;
+
+	switch (clk_id) {
+	case ACLK_TOP_HIGH:
+		if (rate == 500 * MHz)
+			src_clk = ACLK_TOP_HIGH_SEL_500M;
+		else if (rate == 400 * MHz)
+			src_clk = ACLK_TOP_HIGH_SEL_400M;
+		else if (rate == 300 * MHz)
+			src_clk = ACLK_TOP_HIGH_SEL_300M;
+		else
+			src_clk = ACLK_TOP_HIGH_SEL_24M;
+		rk_clrsetreg(&cru->clksel_con[73],
+			     ACLK_TOP_HIGH_SEL_MASK,
+			     src_clk << ACLK_TOP_HIGH_SEL_SHIFT);
+		break;
+	case ACLK_TOP_LOW:
+		if (rate == 400 * MHz)
+			src_clk = ACLK_TOP_LOW_SEL_400M;
+		else if (rate == 300 * MHz)
+			src_clk = ACLK_TOP_LOW_SEL_300M;
+		else if (rate == 200 * MHz)
+			src_clk = ACLK_TOP_LOW_SEL_200M;
+		else
+			src_clk = ACLK_TOP_LOW_SEL_24M;
+		rk_clrsetreg(&cru->clksel_con[73],
+			     ACLK_TOP_LOW_SEL_MASK,
+			     src_clk << ACLK_TOP_LOW_SEL_SHIFT);
+		break;
+	case HCLK_TOP:
+		if (rate == 150 * MHz)
+			src_clk = HCLK_TOP_SEL_150M;
+		else if (rate == 100 * MHz)
+			src_clk = HCLK_TOP_SEL_100M;
+		else if (rate == 75 * MHz)
+			src_clk = HCLK_TOP_SEL_75M;
+		else
+			src_clk = HCLK_TOP_SEL_24M;
+		rk_clrsetreg(&cru->clksel_con[73],
+			     HCLK_TOP_SEL_MASK,
+			     src_clk << HCLK_TOP_SEL_SHIFT);
+		break;
+	case PCLK_TOP:
+		if (rate == 100 * MHz)
+			src_clk = PCLK_TOP_SEL_100M;
+		else if (rate == 75 * MHz)
+			src_clk = PCLK_TOP_SEL_75M;
+		else if (rate == 50 * MHz)
+			src_clk = PCLK_TOP_SEL_50M;
+		else
+			src_clk = PCLK_TOP_SEL_24M;
+		rk_clrsetreg(&cru->clksel_con[73],
+			     PCLK_TOP_SEL_MASK,
+			     src_clk << PCLK_TOP_SEL_SHIFT);
+		break;
+
+	default:
+		printf("do not support this permid freq\n");
+		return -EINVAL;
+	}
+
+	return rk3568_top_get_clk(priv, clk_id);
+}
+
+static ulong rk3568_i2c_get_clk(struct rk3568_clk_priv *priv, ulong clk_id)
+{
+	struct rk3568_cru *cru = priv->cru;
+	u32 sel, con;
+	ulong rate;
+
+	switch (clk_id) {
+	case CLK_I2C1:
+	case CLK_I2C2:
+	case CLK_I2C3:
+	case CLK_I2C4:
+	case CLK_I2C5:
+		con = readl(&cru->clksel_con[71]);
+		sel = (con & CLK_I2C_SEL_MASK) >> CLK_I2C_SEL_SHIFT;
+		if (sel == CLK_I2C_SEL_200M)
+			rate = 200 * MHz;
+		else if (sel == CLK_I2C_SEL_100M)
+			rate = 100 * MHz;
+		else if (sel == CLK_I2C_SEL_CPLL_100M)
+			rate = 100 * MHz;
+		else
+			rate = OSC_HZ;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return rate;
+}
+
+static ulong rk3568_i2c_set_clk(struct rk3568_clk_priv *priv, ulong clk_id,
+				ulong rate)
+{
+	struct rk3568_cru *cru = priv->cru;
+	int src_clk;
+
+	if (rate == 200 * MHz)
+		src_clk = CLK_I2C_SEL_200M;
+	else if (rate == 100 * MHz)
+		src_clk = CLK_I2C_SEL_100M;
+	else
+		src_clk = CLK_I2C_SEL_24M;
+
+	switch (clk_id) {
+	case CLK_I2C1:
+	case CLK_I2C2:
+	case CLK_I2C3:
+	case CLK_I2C4:
+	case CLK_I2C5:
+		rk_clrsetreg(&cru->clksel_con[71], CLK_I2C_SEL_MASK,
+			     src_clk << CLK_I2C_SEL_SHIFT);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return rk3568_i2c_get_clk(priv, clk_id);
+}
+
+static ulong rk3568_spi_get_clk(struct rk3568_clk_priv *priv, ulong clk_id)
+{
+	struct rk3568_cru *cru = priv->cru;
+	u32 sel, con;
+
+	con = readl(&cru->clksel_con[72]);
+
+	switch (clk_id) {
+	case CLK_SPI0:
+		sel = (con & CLK_SPI0_SEL_MASK) >> CLK_SPI0_SEL_SHIFT;
+		break;
+	case CLK_SPI1:
+		sel = (con & CLK_SPI1_SEL_MASK) >> CLK_SPI1_SEL_SHIFT;
+		break;
+	case CLK_SPI2:
+		sel = (con & CLK_SPI2_SEL_MASK) >> CLK_SPI2_SEL_SHIFT;
+		break;
+	case CLK_SPI3:
+		sel = (con & CLK_SPI3_SEL_MASK) >> CLK_SPI3_SEL_SHIFT;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	switch (sel) {
+	case CLK_SPI_SEL_200M:
+		return 200 * MHz;
+	case CLK_SPI_SEL_24M:
+		return OSC_HZ;
+	case CLK_SPI_SEL_CPLL_100M:
+		return 100 * MHz;
+	default:
+		return -ENOENT;
+	}
+}
+
+static ulong rk3568_spi_set_clk(struct rk3568_clk_priv *priv,
+				ulong clk_id, ulong rate)
+{
+	struct rk3568_cru *cru = priv->cru;
+	int src_clk;
+
+	if (rate == 200 * MHz)
+		src_clk = CLK_SPI_SEL_200M;
+	else if (rate == 100 * MHz)
+		src_clk = CLK_SPI_SEL_CPLL_100M;
+	else
+		src_clk = CLK_SPI_SEL_24M;
+
+	switch (clk_id) {
+	case CLK_SPI0:
+		rk_clrsetreg(&cru->clksel_con[72],
+			     CLK_SPI0_SEL_MASK,
+			     src_clk << CLK_SPI0_SEL_SHIFT);
+		break;
+	case CLK_SPI1:
+		rk_clrsetreg(&cru->clksel_con[72],
+			     CLK_SPI1_SEL_MASK,
+			     src_clk << CLK_SPI1_SEL_SHIFT);
+		break;
+	case CLK_SPI2:
+		rk_clrsetreg(&cru->clksel_con[72],
+			     CLK_SPI2_SEL_MASK,
+			     src_clk << CLK_SPI2_SEL_SHIFT);
+		break;
+	case CLK_SPI3:
+		rk_clrsetreg(&cru->clksel_con[72],
+			     CLK_SPI3_SEL_MASK,
+			     src_clk << CLK_SPI3_SEL_SHIFT);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return rk3568_spi_get_clk(priv, clk_id);
+}
+
+static ulong rk3568_pwm_get_clk(struct rk3568_clk_priv *priv, ulong clk_id)
+{
+	struct rk3568_cru *cru = priv->cru;
+	u32 sel, con;
+
+	con = readl(&cru->clksel_con[72]);
+
+	switch (clk_id) {
+	case CLK_PWM1:
+		sel = (con & CLK_PWM1_SEL_MASK) >> CLK_PWM3_SEL_SHIFT;
+		break;
+	case CLK_PWM2:
+		sel = (con & CLK_PWM2_SEL_MASK) >> CLK_PWM2_SEL_SHIFT;
+		break;
+	case CLK_PWM3:
+		sel = (con & CLK_PWM3_SEL_MASK) >> CLK_PWM3_SEL_SHIFT;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	switch (sel) {
+	case CLK_PWM_SEL_100M:
+		return 100 * MHz;
+	case CLK_PWM_SEL_24M:
+		return OSC_HZ;
+	case CLK_PWM_SEL_CPLL_100M:
+		return 100 * MHz;
+	default:
+		return -ENOENT;
+	}
+}
+
+static ulong rk3568_pwm_set_clk(struct rk3568_clk_priv *priv,
+				ulong clk_id, ulong rate)
+{
+	struct rk3568_cru *cru = priv->cru;
+	int src_clk;
+
+	if (rate == 100 * MHz)
+		src_clk = CLK_PWM_SEL_100M;
+	else
+		src_clk = CLK_PWM_SEL_24M;
+
+	switch (clk_id) {
+	case CLK_PWM1:
+		rk_clrsetreg(&cru->clksel_con[72],
+			     CLK_PWM1_SEL_MASK,
+			     src_clk << CLK_PWM1_SEL_SHIFT);
+		break;
+	case CLK_PWM2:
+		rk_clrsetreg(&cru->clksel_con[72],
+			     CLK_PWM2_SEL_MASK,
+			     src_clk << CLK_PWM2_SEL_SHIFT);
+		break;
+	case CLK_PWM3:
+		rk_clrsetreg(&cru->clksel_con[72],
+			     CLK_PWM3_SEL_MASK,
+			     src_clk << CLK_PWM3_SEL_SHIFT);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return rk3568_pwm_get_clk(priv, clk_id);
+}
+
+static ulong rk3568_adc_get_clk(struct rk3568_clk_priv *priv, ulong clk_id)
+{
+	struct rk3568_cru *cru = priv->cru;
+	u32 div, sel, con, prate;
+
+	switch (clk_id) {
+	case CLK_SARADC:
+		return OSC_HZ;
+	case CLK_TSADC_TSEN:
+		con = readl(&cru->clksel_con[51]);
+		div = (con & CLK_TSADC_TSEN_DIV_MASK) >>
+		      CLK_TSADC_TSEN_DIV_SHIFT;
+		sel = (con & CLK_TSADC_TSEN_SEL_MASK) >>
+		      CLK_TSADC_TSEN_SEL_SHIFT;
+		if (sel == CLK_TSADC_TSEN_SEL_24M)
+			prate = OSC_HZ;
+		else
+			prate = 100 * MHz;
+		return DIV_TO_RATE(prate, div);
+	case CLK_TSADC:
+		con = readl(&cru->clksel_con[51]);
+		div = (con & CLK_TSADC_DIV_MASK) >> CLK_TSADC_DIV_SHIFT;
+		prate = rk3568_adc_get_clk(priv, CLK_TSADC_TSEN);
+		return DIV_TO_RATE(prate, div);
+	default:
+		return -ENOENT;
+	}
+}
+
+static ulong rk3568_adc_set_clk(struct rk3568_clk_priv *priv,
+				ulong clk_id, ulong rate)
+{
+	struct rk3568_cru *cru = priv->cru;
+	int src_clk_div;
+	ulong prate = 0;
+
+	switch (clk_id) {
+	case CLK_SARADC:
+		return OSC_HZ;
+	case CLK_TSADC_TSEN:
+		if (!(OSC_HZ % rate)) {
+			src_clk_div = DIV_ROUND_UP(OSC_HZ, rate);
+			assert(src_clk_div - 1 <= 7);
+			rk_clrsetreg(&cru->clksel_con[51],
+				     CLK_TSADC_TSEN_SEL_MASK |
+				     CLK_TSADC_TSEN_DIV_MASK,
+				     (CLK_TSADC_TSEN_SEL_24M <<
+				      CLK_TSADC_TSEN_SEL_SHIFT) |
+				     (src_clk_div - 1) <<
+				     CLK_TSADC_TSEN_DIV_SHIFT);
+		} else {
+			src_clk_div = DIV_ROUND_UP(100 * MHz, rate);
+			assert(src_clk_div - 1 <= 7);
+			rk_clrsetreg(&cru->clksel_con[51],
+				     CLK_TSADC_TSEN_SEL_MASK |
+				     CLK_TSADC_TSEN_DIV_MASK,
+				     (CLK_TSADC_TSEN_SEL_100M <<
+				      CLK_TSADC_TSEN_SEL_SHIFT) |
+				     (src_clk_div - 1) <<
+				     CLK_TSADC_TSEN_DIV_SHIFT);
+		}
+		break;
+	case CLK_TSADC:
+			prate = rk3568_adc_get_clk(priv, CLK_TSADC_TSEN);
+			src_clk_div = DIV_ROUND_UP(prate, rate);
+			assert(src_clk_div - 1 <= 128);
+			rk_clrsetreg(&cru->clksel_con[51],
+				     CLK_TSADC_DIV_MASK,
+				     (src_clk_div - 1) << CLK_TSADC_DIV_SHIFT);
+		break;
+	default:
+		return -ENOENT;
+	}
+	return rk3568_adc_get_clk(priv, clk_id);
+}
+
+static ulong rk3568_crypto_get_rate(struct rk3568_clk_priv *priv, ulong clk_id)
+{
+	struct rk3568_cru *cru = priv->cru;
+	u32 sel, con;
+
+	switch (clk_id) {
+	case ACLK_SECURE_FLASH:
+	case ACLK_CRYPTO_NS:
+		con = readl(&cru->clksel_con[27]);
+		sel = (con & ACLK_SECURE_FLASH_SEL_MASK) >>
+		      ACLK_SECURE_FLASH_SEL_SHIFT;
+		if (sel == ACLK_SECURE_FLASH_SEL_200M)
+			return 200 * MHz;
+		else if (sel == ACLK_SECURE_FLASH_SEL_150M)
+			return 150 * MHz;
+		else if (sel == ACLK_SECURE_FLASH_SEL_100M)
+			return 100 * MHz;
+		else
+			return 24 * MHz;
+	case HCLK_SECURE_FLASH:
+	case HCLK_CRYPTO_NS:
+	case CLK_CRYPTO_NS_RNG:
+		con = readl(&cru->clksel_con[27]);
+		sel = (con & HCLK_SECURE_FLASH_SEL_MASK) >>
+		      HCLK_SECURE_FLASH_SEL_SHIFT;
+		if (sel == HCLK_SECURE_FLASH_SEL_150M)
+			return 150 * MHz;
+		else if (sel == HCLK_SECURE_FLASH_SEL_100M)
+			return 100 * MHz;
+		else if (sel == HCLK_SECURE_FLASH_SEL_75M)
+			return 75 * MHz;
+		else
+			return 24 * MHz;
+	case CLK_CRYPTO_NS_CORE:
+		con = readl(&cru->clksel_con[27]);
+		sel = (con & CLK_CRYPTO_CORE_SEL_MASK) >>
+		      CLK_CRYPTO_CORE_SEL_SHIFT;
+		if (sel == CLK_CRYPTO_CORE_SEL_200M)
+			return 200 * MHz;
+		else if (sel == CLK_CRYPTO_CORE_SEL_150M)
+			return 150 * MHz;
+		else
+			return 100 * MHz;
+	case CLK_CRYPTO_NS_PKA:
+		con = readl(&cru->clksel_con[27]);
+		sel = (con & CLK_CRYPTO_PKA_SEL_MASK) >>
+		      CLK_CRYPTO_PKA_SEL_SHIFT;
+		if (sel == CLK_CRYPTO_PKA_SEL_300M)
+			return 300 * MHz;
+		else if (sel == CLK_CRYPTO_PKA_SEL_200M)
+			return 200 * MHz;
+		else
+			return 100 * MHz;
+	default:
+		return -ENOENT;
+	}
+}
+
+static ulong rk3568_crypto_set_rate(struct rk3568_clk_priv *priv,
+				    ulong clk_id, ulong rate)
+{
+	struct rk3568_cru *cru = priv->cru;
+	u32 src_clk, mask, shift;
+
+	switch (clk_id) {
+	case ACLK_SECURE_FLASH:
+	case ACLK_CRYPTO_NS:
+		mask = ACLK_SECURE_FLASH_SEL_MASK;
+		shift = ACLK_SECURE_FLASH_SEL_SHIFT;
+		if (rate == 200 * MHz)
+			src_clk = ACLK_SECURE_FLASH_SEL_200M;
+		else if (rate == 150 * MHz)
+			src_clk = ACLK_SECURE_FLASH_SEL_150M;
+		else if (rate == 100 * MHz)
+			src_clk = ACLK_SECURE_FLASH_SEL_100M;
+		else
+			src_clk = ACLK_SECURE_FLASH_SEL_24M;
+		break;
+	case HCLK_SECURE_FLASH:
+	case HCLK_CRYPTO_NS:
+	case CLK_CRYPTO_NS_RNG:
+		mask = HCLK_SECURE_FLASH_SEL_MASK;
+		shift = HCLK_SECURE_FLASH_SEL_SHIFT;
+		if (rate == 150 * MHz)
+			src_clk = HCLK_SECURE_FLASH_SEL_150M;
+		else if (rate == 100 * MHz)
+			src_clk = HCLK_SECURE_FLASH_SEL_100M;
+		else if (rate == 75 * MHz)
+			src_clk = HCLK_SECURE_FLASH_SEL_75M;
+		else
+			src_clk = HCLK_SECURE_FLASH_SEL_24M;
+		break;
+	case CLK_CRYPTO_NS_CORE:
+		mask = CLK_CRYPTO_CORE_SEL_MASK;
+		shift = CLK_CRYPTO_CORE_SEL_SHIFT;
+		if (rate == 200 * MHz)
+			src_clk = CLK_CRYPTO_CORE_SEL_200M;
+		else if (rate == 150 * MHz)
+			src_clk = CLK_CRYPTO_CORE_SEL_150M;
+		else
+			src_clk = CLK_CRYPTO_CORE_SEL_100M;
+		break;
+	case CLK_CRYPTO_NS_PKA:
+		mask = CLK_CRYPTO_PKA_SEL_MASK;
+		shift = CLK_CRYPTO_PKA_SEL_SHIFT;
+		if (rate == 300 * MHz)
+			src_clk = CLK_CRYPTO_PKA_SEL_300M;
+		else if (rate == 200 * MHz)
+			src_clk = CLK_CRYPTO_PKA_SEL_200M;
+		else
+			src_clk = CLK_CRYPTO_PKA_SEL_100M;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	rk_clrsetreg(&cru->clksel_con[27], mask, src_clk << shift);
+
+	return rk3568_crypto_get_rate(priv, clk_id);
+}
+
+static ulong rk3568_sdmmc_get_clk(struct rk3568_clk_priv *priv, ulong clk_id)
+{
+	struct rk3568_cru *cru = priv->cru;
+	u32 sel, con;
+
+	switch (clk_id) {
+	case CLK_SDMMC0:
+		con = readl(&cru->clksel_con[30]);
+		sel = (con & CLK_SDMMC0_SEL_MASK) >> CLK_SDMMC0_SEL_SHIFT;
+		break;
+	case CLK_SDMMC1:
+		con = readl(&cru->clksel_con[30]);
+		sel = (con & CLK_SDMMC1_SEL_MASK) >> CLK_SDMMC1_SEL_SHIFT;
+		break;
+	case CLK_SDMMC2:
+		con = readl(&cru->clksel_con[32]);
+		sel = (con & CLK_SDMMC2_SEL_MASK) >> CLK_SDMMC2_SEL_SHIFT;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	switch (sel) {
+	case CLK_SDMMC_SEL_24M:
+		return OSC_HZ;
+	case CLK_SDMMC_SEL_400M:
+		return 400 * MHz;
+	case CLK_SDMMC_SEL_300M:
+		return 300 * MHz;
+	case CLK_SDMMC_SEL_100M:
+		return 100 * MHz;
+	case CLK_SDMMC_SEL_50M:
+		return 50 * MHz;
+	case CLK_SDMMC_SEL_750K:
+		return 750 * KHz;
+	default:
+		return -ENOENT;
+	}
+}
+
+static ulong rk3568_sdmmc_set_clk(struct rk3568_clk_priv *priv,
+				  ulong clk_id, ulong rate)
+{
+	struct rk3568_cru *cru = priv->cru;
+	int src_clk;
+
+	switch (rate) {
+	case OSC_HZ:
+		src_clk = CLK_SDMMC_SEL_24M;
+		break;
+	case 400 * MHz:
+		src_clk = CLK_SDMMC_SEL_400M;
+		break;
+	case 300 * MHz:
+		src_clk = CLK_SDMMC_SEL_300M;
+		break;
+	case 100 * MHz:
+		src_clk = CLK_SDMMC_SEL_100M;
+		break;
+	case 50 * MHz:
+		src_clk = CLK_SDMMC_SEL_50M;
+		break;
+	case 750 * KHz:
+		src_clk = CLK_SDMMC_SEL_750K;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	switch (clk_id) {
+	case CLK_SDMMC0:
+		rk_clrsetreg(&cru->clksel_con[30],
+			     CLK_SDMMC0_SEL_MASK,
+			     src_clk << CLK_SDMMC0_SEL_SHIFT);
+		break;
+	case CLK_SDMMC1:
+		rk_clrsetreg(&cru->clksel_con[30],
+			     CLK_SDMMC1_SEL_MASK,
+			     src_clk << CLK_SDMMC1_SEL_SHIFT);
+		break;
+	case CLK_SDMMC2:
+		rk_clrsetreg(&cru->clksel_con[32],
+			     CLK_SDMMC2_SEL_MASK,
+			     src_clk << CLK_SDMMC2_SEL_SHIFT);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return rk3568_sdmmc_get_clk(priv, clk_id);
+}
+
+static ulong rk3568_sfc_get_clk(struct rk3568_clk_priv *priv)
+{
+	struct rk3568_cru *cru = priv->cru;
+	u32 sel, con;
+
+	con = readl(&cru->clksel_con[28]);
+	sel = (con & SCLK_SFC_SEL_MASK) >> SCLK_SFC_SEL_SHIFT;
+	switch (sel) {
+	case SCLK_SFC_SEL_24M:
+		return OSC_HZ;
+	case SCLK_SFC_SEL_50M:
+		return 50 * MHz;
+	case SCLK_SFC_SEL_75M:
+		return 75 * MHz;
+	case SCLK_SFC_SEL_100M:
+		return 100 * MHz;
+	case SCLK_SFC_SEL_125M:
+		return 125 * MHz;
+	case SCLK_SFC_SEL_150M:
+		return 150 * KHz;
+	default:
+		return -ENOENT;
+	}
+}
+
+static ulong rk3568_sfc_set_clk(struct rk3568_clk_priv *priv, ulong rate)
+{
+	struct rk3568_cru *cru = priv->cru;
+	int src_clk;
+
+	switch (rate) {
+	case OSC_HZ:
+		src_clk = SCLK_SFC_SEL_24M;
+		break;
+	case 50 * MHz:
+		src_clk = SCLK_SFC_SEL_50M;
+		break;
+	case 75 * MHz:
+		src_clk = SCLK_SFC_SEL_75M;
+		break;
+	case 100 * MHz:
+		src_clk = SCLK_SFC_SEL_100M;
+		break;
+	case 125 * MHz:
+		src_clk = SCLK_SFC_SEL_125M;
+		break;
+	case 150 * KHz:
+		src_clk = SCLK_SFC_SEL_150M;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	rk_clrsetreg(&cru->clksel_con[28],
+		     SCLK_SFC_SEL_MASK,
+		     src_clk << SCLK_SFC_SEL_SHIFT);
+
+	return rk3568_sfc_get_clk(priv);
+}
+
+static ulong rk3568_nand_get_clk(struct rk3568_clk_priv *priv)
+{
+	struct rk3568_cru *cru = priv->cru;
+	u32 sel, con;
+
+	con = readl(&cru->clksel_con[28]);
+	sel = (con & NCLK_NANDC_SEL_MASK) >> NCLK_NANDC_SEL_SHIFT;
+	switch (sel) {
+	case NCLK_NANDC_SEL_200M:
+		return 200 * MHz;
+	case NCLK_NANDC_SEL_150M:
+		return 150 * MHz;
+	case NCLK_NANDC_SEL_100M:
+		return 100 * MHz;
+	case NCLK_NANDC_SEL_24M:
+		return OSC_HZ;
+	default:
+		return -ENOENT;
+	}
+}
+
+static ulong rk3568_nand_set_clk(struct rk3568_clk_priv *priv, ulong rate)
+{
+	struct rk3568_cru *cru = priv->cru;
+	int src_clk;
+
+	switch (rate) {
+	case OSC_HZ:
+		src_clk = NCLK_NANDC_SEL_24M;
+		break;
+	case 100 * MHz:
+		src_clk = NCLK_NANDC_SEL_100M;
+		break;
+	case 150 * MHz:
+		src_clk = NCLK_NANDC_SEL_150M;
+		break;
+	case 200 * MHz:
+		src_clk = NCLK_NANDC_SEL_200M;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	rk_clrsetreg(&cru->clksel_con[28],
+		     NCLK_NANDC_SEL_MASK,
+		     src_clk << NCLK_NANDC_SEL_SHIFT);
+
+	return rk3568_nand_get_clk(priv);
+}
+
+static ulong rk3568_emmc_get_clk(struct rk3568_clk_priv *priv)
+{
+	struct rk3568_cru *cru = priv->cru;
+	u32 sel, con;
+
+	con = readl(&cru->clksel_con[28]);
+	sel = (con & CCLK_EMMC_SEL_MASK) >> CCLK_EMMC_SEL_SHIFT;
+	switch (sel) {
+	case CCLK_EMMC_SEL_200M:
+		return 200 * MHz;
+	case CCLK_EMMC_SEL_150M:
+		return 150 * MHz;
+	case CCLK_EMMC_SEL_100M:
+		return 100 * MHz;
+	case CCLK_EMMC_SEL_50M:
+		return 50 * MHz;
+	case CCLK_EMMC_SEL_375K:
+		return 375 * KHz;
+	case CCLK_EMMC_SEL_24M:
+		return OSC_HZ;
+	default:
+		return -ENOENT;
+	}
+}
+
+static ulong rk3568_emmc_set_clk(struct rk3568_clk_priv *priv, ulong rate)
+{
+	struct rk3568_cru *cru = priv->cru;
+	int src_clk;
+
+	switch (rate) {
+	case OSC_HZ:
+		src_clk = CCLK_EMMC_SEL_24M;
+		break;
+	case 50 * MHz:
+		src_clk = CCLK_EMMC_SEL_50M;
+		break;
+	case 100 * MHz:
+		src_clk = CCLK_EMMC_SEL_100M;
+		break;
+	case 150 * MHz:
+		src_clk = CCLK_EMMC_SEL_150M;
+		break;
+	case 200 * MHz:
+		src_clk = CCLK_EMMC_SEL_200M;
+		break;
+	case 375 * KHz:
+		src_clk = CCLK_EMMC_SEL_375K;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	rk_clrsetreg(&cru->clksel_con[28],
+		     CCLK_EMMC_SEL_MASK,
+		     src_clk << CCLK_EMMC_SEL_SHIFT);
+
+	return rk3568_emmc_get_clk(priv);
+}
+
+static ulong rk3568_aclk_vop_get_clk(struct rk3568_clk_priv *priv)
+{
+	struct rk3568_cru *cru = priv->cru;
+	u32 div, sel, con, parent;
+
+	con = readl(&cru->clksel_con[38]);
+	div = (con & ACLK_VOP_PRE_DIV_MASK) >> ACLK_VOP_PRE_DIV_SHIFT;
+	sel = (con & ACLK_VOP_PRE_SEL_MASK) >> ACLK_VOP_PRE_SEL_SHIFT;
+	if (sel == ACLK_VOP_PRE_SEL_GPLL)
+		parent = priv->gpll_hz;
+	else if (sel == ACLK_VOP_PRE_SEL_CPLL)
+		parent = priv->cpll_hz;
+	else if (sel == ACLK_VOP_PRE_SEL_VPLL)
+		parent = priv->vpll_hz;
+	else
+		parent = priv->hpll_hz;
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rk3568_aclk_vop_set_clk(struct rk3568_clk_priv *priv, ulong rate)
+{
+	struct rk3568_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);
+	assert(src_clk_div - 1 <= 31);
+	rk_clrsetreg(&cru->clksel_con[38],
+		     ACLK_VOP_PRE_SEL_MASK | ACLK_VOP_PRE_DIV_MASK,
+		     ACLK_VOP_PRE_SEL_GPLL << ACLK_VOP_PRE_SEL_SHIFT |
+		     (src_clk_div - 1) << ACLK_VOP_PRE_DIV_SHIFT);
+
+	return rk3568_aclk_vop_get_clk(priv);
+}
+
+static ulong rk3568_dclk_vop_get_clk(struct rk3568_clk_priv *priv, ulong clk_id)
+{
+	struct rk3568_cru *cru = priv->cru;
+	u32 conid, div, sel, con, parent;
+
+	switch (clk_id) {
+	case DCLK_VOP0:
+		conid = 39;
+		break;
+	case DCLK_VOP1:
+		conid = 40;
+		break;
+	case DCLK_VOP2:
+		conid = 41;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	con = readl(&cru->clksel_con[conid]);
+	div = (con & DCLK0_VOP_DIV_MASK) >> DCLK0_VOP_DIV_SHIFT;
+	sel = (con & DCLK0_VOP_SEL_MASK) >> DCLK0_VOP_SEL_SHIFT;
+	if (sel == DCLK_VOP_SEL_HPLL)
+		parent = rk3568_pmu_pll_get_rate(priv, HPLL);
+	else if (sel == DCLK_VOP_SEL_VPLL)
+		parent = rockchip_pll_get_rate(&rk3568_pll_clks[VPLL],
+					       priv->cru, VPLL);
+	else if (sel == DCLK_VOP_SEL_GPLL)
+		parent = priv->gpll_hz;
+	else if (sel == DCLK_VOP_SEL_CPLL)
+		parent = priv->cpll_hz;
+	else
+		return -ENOENT;
+
+	return DIV_TO_RATE(parent, div);
+}
+
+#define RK3568_VOP_PLL_LIMIT_FREQ 600000000
+
+static ulong rk3568_dclk_vop_set_clk(struct rk3568_clk_priv *priv,
+				     ulong clk_id, ulong rate)
+{
+	struct rk3568_cru *cru = priv->cru;
+	ulong pll_rate, now, best_rate = 0;
+	u32 i, conid, con, sel, div, best_div = 0, best_sel = 0;
+
+	switch (clk_id) {
+	case DCLK_VOP0:
+		conid = 39;
+		break;
+	case DCLK_VOP1:
+		conid = 40;
+		break;
+	case DCLK_VOP2:
+		conid = 41;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	con = readl(&cru->clksel_con[conid]);
+	sel = (con & DCLK0_VOP_SEL_MASK) >> DCLK0_VOP_SEL_SHIFT;
+
+	if (sel == DCLK_VOP_SEL_HPLL) {
+		div = DIV_ROUND_UP(RK3568_VOP_PLL_LIMIT_FREQ, rate);
+		rk_clrsetreg(&cru->clksel_con[conid],
+			     DCLK0_VOP_DIV_MASK | DCLK0_VOP_SEL_MASK,
+			     (DCLK_VOP_SEL_HPLL << DCLK0_VOP_SEL_SHIFT) |
+			     ((div - 1) << DCLK0_VOP_DIV_SHIFT));
+		rk3568_pmu_pll_set_rate(priv, HPLL, div * rate);
+	} else if (sel == DCLK_VOP_SEL_VPLL) {
+		div = DIV_ROUND_UP(RK3568_VOP_PLL_LIMIT_FREQ, rate);
+		rk_clrsetreg(&cru->clksel_con[conid],
+			     DCLK0_VOP_DIV_MASK | DCLK0_VOP_SEL_MASK,
+			     (DCLK_VOP_SEL_VPLL << DCLK0_VOP_SEL_SHIFT) |
+			     ((div - 1) << DCLK0_VOP_DIV_SHIFT));
+		rockchip_pll_set_rate(&rk3568_pll_clks[VPLL],
+				      priv->cru, VPLL, div * rate);
+	} else {
+		for (i = 0; i <= DCLK_VOP_SEL_CPLL; i++) {
+			switch (i) {
+			case DCLK_VOP_SEL_GPLL:
+				pll_rate = priv->gpll_hz;
+				break;
+			case DCLK_VOP_SEL_CPLL:
+				pll_rate = priv->cpll_hz;
+				break;
+			default:
+				printf("do not support this vop pll sel\n");
+				return -EINVAL;
+			}
+
+			div = DIV_ROUND_UP(pll_rate, rate);
+			if (div > 255)
+				continue;
+			now = pll_rate / div;
+			if (abs(rate - now) < abs(rate - best_rate)) {
+				best_rate = now;
+				best_div = div;
+				best_sel = i;
+			}
+			debug("p_rate=%lu, best_rate=%lu, div=%u, sel=%u\n",
+			      pll_rate, best_rate, best_div, best_sel);
+		}
+
+		if (best_rate) {
+			rk_clrsetreg(&cru->clksel_con[conid],
+				     DCLK0_VOP_DIV_MASK | DCLK0_VOP_SEL_MASK,
+				     best_sel << DCLK0_VOP_SEL_SHIFT |
+				     (best_div - 1) << DCLK0_VOP_DIV_SHIFT);
+		} else {
+			printf("do not support this vop freq %lu\n", rate);
+			return -EINVAL;
+		}
+	}
+	return rk3568_dclk_vop_get_clk(priv, clk_id);
+}
+
+static ulong rk3568_gmac_src_get_clk(struct rk3568_clk_priv *priv,
+				     ulong mac_id)
+{
+	struct rk3568_cru *cru = priv->cru;
+	u32 sel, con;
+
+	con = readl(&cru->clksel_con[31 + mac_id * 2]);
+	sel = (con & CLK_MAC0_2TOP_SEL_MASK) >> CLK_MAC0_2TOP_SEL_SHIFT;
+
+	switch (sel) {
+	case CLK_MAC0_2TOP_SEL_125M:
+		return 125 * MHz;
+	case CLK_MAC0_2TOP_SEL_50M:
+		return 50 * MHz;
+	case CLK_MAC0_2TOP_SEL_25M:
+		return 25 * MHz;
+	case CLK_MAC0_2TOP_SEL_PPLL:
+		return rk3568_pmu_pll_get_rate(priv, HPLL);
+	default:
+		return -ENOENT;
+	}
+}
+
+static ulong rk3568_gmac_src_set_clk(struct rk3568_clk_priv *priv,
+				     ulong mac_id, ulong rate)
+{
+	struct rk3568_cru *cru = priv->cru;
+	int src_clk;
+
+	switch (rate) {
+	case 125 * MHz:
+		src_clk = CLK_MAC0_2TOP_SEL_125M;
+		break;
+	case 50 * MHz:
+		src_clk = CLK_MAC0_2TOP_SEL_50M;
+		break;
+	case 25 * MHz:
+		src_clk = CLK_MAC0_2TOP_SEL_25M;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	rk_clrsetreg(&cru->clksel_con[31 + mac_id * 2],
+		     CLK_MAC0_2TOP_SEL_MASK,
+		     src_clk << CLK_MAC0_2TOP_SEL_SHIFT);
+
+	return rk3568_gmac_src_get_clk(priv, mac_id);
+}
+
+static ulong rk3568_gmac_out_get_clk(struct rk3568_clk_priv *priv,
+				     ulong mac_id)
+{
+	struct rk3568_cru *cru = priv->cru;
+	u32 sel, con;
+
+	con = readl(&cru->clksel_con[31 + mac_id * 2]);
+	sel = (con & CLK_MAC0_OUT_SEL_MASK) >> CLK_MAC0_OUT_SEL_SHIFT;
+
+	switch (sel) {
+	case CLK_MAC0_OUT_SEL_125M:
+		return 125 * MHz;
+	case CLK_MAC0_OUT_SEL_50M:
+		return 50 * MHz;
+	case CLK_MAC0_OUT_SEL_25M:
+		return 25 * MHz;
+	case CLK_MAC0_OUT_SEL_24M:
+		return OSC_HZ;
+	default:
+		return -ENOENT;
+	}
+}
+
+static ulong rk3568_gmac_out_set_clk(struct rk3568_clk_priv *priv,
+				     ulong mac_id, ulong rate)
+{
+	struct rk3568_cru *cru = priv->cru;
+	int src_clk;
+
+	switch (rate) {
+	case 125 * MHz:
+		src_clk = CLK_MAC0_OUT_SEL_125M;
+		break;
+	case 50 * MHz:
+		src_clk = CLK_MAC0_OUT_SEL_50M;
+		break;
+	case 25 * MHz:
+		src_clk = CLK_MAC0_OUT_SEL_25M;
+		break;
+	case 24 * MHz:
+		src_clk = CLK_MAC0_OUT_SEL_24M;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	rk_clrsetreg(&cru->clksel_con[31 + mac_id * 2],
+		     CLK_MAC0_OUT_SEL_MASK,
+		     src_clk << CLK_MAC0_OUT_SEL_SHIFT);
+
+	return rk3568_gmac_out_get_clk(priv, mac_id);
+}
+
+static ulong rk3568_gmac_ptp_ref_get_clk(struct rk3568_clk_priv *priv,
+					 ulong mac_id)
+{
+	struct rk3568_cru *cru = priv->cru;
+	u32 sel, con;
+
+	con = readl(&cru->clksel_con[31 + mac_id * 2]);
+	sel = (con & CLK_GMAC0_PTP_REF_SEL_MASK) >> CLK_GMAC0_PTP_REF_SEL_SHIFT;
+
+	switch (sel) {
+	case CLK_GMAC0_PTP_REF_SEL_62_5M:
+		return 62500 * KHz;
+	case CLK_GMAC0_PTP_REF_SEL_100M:
+		return 100 * MHz;
+	case CLK_GMAC0_PTP_REF_SEL_50M:
+		return 50 * MHz;
+	case CLK_GMAC0_PTP_REF_SEL_24M:
+		return OSC_HZ;
+	default:
+		return -ENOENT;
+	}
+}
+
+static ulong rk3568_gmac_ptp_ref_set_clk(struct rk3568_clk_priv *priv,
+					 ulong mac_id, ulong rate)
+{
+	struct rk3568_cru *cru = priv->cru;
+	int src_clk;
+
+	switch (rate) {
+	case 62500 * KHz:
+		src_clk = CLK_GMAC0_PTP_REF_SEL_62_5M;
+		break;
+	case 100 * MHz:
+		src_clk = CLK_GMAC0_PTP_REF_SEL_100M;
+		break;
+	case 50 * MHz:
+		src_clk = CLK_GMAC0_PTP_REF_SEL_50M;
+		break;
+	case 24 * MHz:
+		src_clk = CLK_GMAC0_PTP_REF_SEL_24M;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	rk_clrsetreg(&cru->clksel_con[31 + mac_id * 2],
+		     CLK_GMAC0_PTP_REF_SEL_MASK,
+		     src_clk << CLK_GMAC0_PTP_REF_SEL_SHIFT);
+
+	return rk3568_gmac_ptp_ref_get_clk(priv, mac_id);
+}
+
+static ulong rk3568_gmac_tx_rx_set_clk(struct rk3568_clk_priv *priv,
+				       ulong mac_id, ulong rate)
+{
+	struct rk3568_cru *cru = priv->cru;
+	u32 con, sel, div_sel;
+
+	con = readl(&cru->clksel_con[31 + mac_id * 2]);
+	sel = (con & RMII0_MODE_MASK) >> RMII0_MODE_SHIFT;
+
+	if (sel == RMII0_MODE_SEL_RGMII) {
+		if (rate == 2500000)
+			div_sel = RGMII0_CLK_SEL_2_5M;
+		else if (rate == 25000000)
+			div_sel = RGMII0_CLK_SEL_25M;
+		else
+			div_sel = RGMII0_CLK_SEL_125M;
+		rk_clrsetreg(&cru->clksel_con[31 + mac_id * 2],
+			     RGMII0_CLK_SEL_MASK,
+			     div_sel << RGMII0_CLK_SEL_SHIFT);
+	} else if (sel == RMII0_MODE_SEL_RMII) {
+		if (rate == 2500000)
+			div_sel = RMII0_CLK_SEL_2_5M;
+		else
+			div_sel = RMII0_CLK_SEL_25M;
+		rk_clrsetreg(&cru->clksel_con[31 + mac_id * 2],
+			     RMII0_CLK_SEL_MASK,
+			     div_sel << RMII0_CLK_SEL_SHIFT);
+	}
+
+	return 0;
+}
+
+static ulong rk3568_clk_get_rate(struct clk *clk)
+{
+	struct rk3568_clk_priv *priv = dev_get_priv(clk->dev);
+	ulong rate = 0;
+
+	if (!priv->gpll_hz) {
+		printf("%s gpll=%lu\n", __func__, priv->gpll_hz);
+		return -ENOENT;
+	}
+
+	switch (clk->id) {
+	case PLL_APLL:
+	case ARMCLK:
+		rate = rockchip_pll_get_rate(&rk3568_pll_clks[APLL], priv->cru,
+					     APLL);
+		break;
+	case PLL_CPLL:
+		rate = rockchip_pll_get_rate(&rk3568_pll_clks[CPLL], priv->cru,
+					     CPLL);
+		break;
+	case PLL_GPLL:
+		rate = rockchip_pll_get_rate(&rk3568_pll_clks[GPLL], priv->cru,
+					     GPLL);
+		break;
+	case PLL_NPLL:
+		rate = rockchip_pll_get_rate(&rk3568_pll_clks[NPLL], priv->cru,
+					     NPLL);
+		break;
+	case PLL_VPLL:
+		rate = rockchip_pll_get_rate(&rk3568_pll_clks[VPLL], priv->cru,
+					     VPLL);
+		break;
+	case PLL_DPLL:
+		rate = rockchip_pll_get_rate(&rk3568_pll_clks[DPLL], priv->cru,
+					     DPLL);
+		break;
+	case ACLK_BUS:
+	case PCLK_BUS:
+		rate = rk3568_bus_get_clk(priv, clk->id);
+		break;
+	case ACLK_PERIMID:
+	case HCLK_PERIMID:
+		rate = rk3568_perimid_get_clk(priv, clk->id);
+		break;
+	case ACLK_TOP_HIGH:
+	case ACLK_TOP_LOW:
+	case HCLK_TOP:
+	case PCLK_TOP:
+		rate = rk3568_top_get_clk(priv, clk->id);
+		break;
+	case CLK_I2C1:
+	case CLK_I2C2:
+	case CLK_I2C3:
+	case CLK_I2C4:
+	case CLK_I2C5:
+		rate = rk3568_i2c_get_clk(priv, clk->id);
+		break;
+	case CLK_SPI0:
+	case CLK_SPI1:
+	case CLK_SPI2:
+	case CLK_SPI3:
+		rate = rk3568_spi_get_clk(priv, clk->id);
+		break;
+	case CLK_PWM1:
+	case CLK_PWM2:
+	case CLK_PWM3:
+		rate = rk3568_pwm_get_clk(priv, clk->id);
+		break;
+	case CLK_SARADC:
+	case CLK_TSADC_TSEN:
+	case CLK_TSADC:
+		rate = rk3568_adc_get_clk(priv, clk->id);
+		break;
+	case CLK_SDMMC0:
+	case CLK_SDMMC1:
+	case CLK_SDMMC2:
+		rate = rk3568_sdmmc_get_clk(priv, clk->id);
+		break;
+	case SCLK_SFC:
+		rate = rk3568_sfc_get_clk(priv);
+		break;
+	case NCLK_NANDC:
+		rate = rk3568_nand_get_clk(priv);
+		break;
+	case CCLK_EMMC:
+		rate = rk3568_emmc_get_clk(priv);
+		break;
+	case ACLK_VOP:
+		rate = rk3568_aclk_vop_get_clk(priv);
+		break;
+	case DCLK_VOP0:
+	case DCLK_VOP1:
+	case DCLK_VOP2:
+		rate = rk3568_dclk_vop_get_clk(priv, clk->id);
+		break;
+	case SCLK_GMAC0:
+	case CLK_MAC0_2TOP:
+	case CLK_MAC0_REFOUT:
+		rate = rk3568_gmac_src_get_clk(priv, 0);
+		break;
+	case CLK_MAC0_OUT:
+		rate = rk3568_gmac_out_get_clk(priv, 0);
+		break;
+	case CLK_GMAC0_PTP_REF:
+		rate = rk3568_gmac_ptp_ref_get_clk(priv, 0);
+		break;
+	case SCLK_GMAC1:
+	case CLK_MAC1_2TOP:
+	case CLK_MAC1_REFOUT:
+		rate = rk3568_gmac_src_get_clk(priv, 1);
+		break;
+	case CLK_MAC1_OUT:
+		rate = rk3568_gmac_out_get_clk(priv, 1);
+		break;
+	case CLK_GMAC1_PTP_REF:
+		rate = rk3568_gmac_ptp_ref_get_clk(priv, 1);
+		break;
+	case ACLK_SECURE_FLASH:
+	case ACLK_CRYPTO_NS:
+	case HCLK_SECURE_FLASH:
+	case HCLK_CRYPTO_NS:
+	case CLK_CRYPTO_NS_RNG:
+	case CLK_CRYPTO_NS_CORE:
+	case CLK_CRYPTO_NS_PKA:
+		rate = rk3568_crypto_get_rate(priv, clk->id);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return rate;
+};
+
+static ulong rk3568_clk_set_rate(struct clk *clk, ulong rate)
+{
+	struct rk3568_clk_priv *priv = dev_get_priv(clk->dev);
+	ulong ret = 0;
+
+	if (!priv->gpll_hz) {
+		printf("%s gpll=%lu\n", __func__, priv->gpll_hz);
+		return -ENOENT;
+	}
+
+	switch (clk->id) {
+	case PLL_APLL:
+	case ARMCLK:
+		if (priv->armclk_hz)
+			rk3568_armclk_set_clk(priv, rate);
+		priv->armclk_hz = rate;
+		break;
+	case PLL_CPLL:
+		ret = rockchip_pll_set_rate(&rk3568_pll_clks[CPLL], priv->cru,
+					    CPLL, rate);
+		break;
+	case PLL_GPLL:
+		ret = rockchip_pll_set_rate(&rk3568_pll_clks[GPLL], priv->cru,
+					    GPLL, rate);
+		break;
+	case PLL_NPLL:
+		ret = rockchip_pll_set_rate(&rk3568_pll_clks[NPLL], priv->cru,
+					    NPLL, rate);
+		break;
+	case PLL_VPLL:
+		ret = rockchip_pll_set_rate(&rk3568_pll_clks[VPLL], priv->cru,
+					    VPLL, rate);
+		break;
+	case ACLK_BUS:
+	case PCLK_BUS:
+		rate = rk3568_bus_set_clk(priv, clk->id, rate);
+		break;
+	case ACLK_PERIMID:
+	case HCLK_PERIMID:
+		rate = rk3568_perimid_set_clk(priv, clk->id, rate);
+		break;
+	case ACLK_TOP_HIGH:
+	case ACLK_TOP_LOW:
+	case HCLK_TOP:
+	case PCLK_TOP:
+		rate = rk3568_top_set_clk(priv, clk->id, rate);
+		break;
+	case CLK_I2C1:
+	case CLK_I2C2:
+	case CLK_I2C3:
+	case CLK_I2C4:
+	case CLK_I2C5:
+		rate = rk3568_i2c_set_clk(priv, clk->id, rate);
+		break;
+	case CLK_SPI0:
+	case CLK_SPI1:
+	case CLK_SPI2:
+	case CLK_SPI3:
+		rate = rk3568_spi_set_clk(priv, clk->id, rate);
+		break;
+	case CLK_PWM1:
+	case CLK_PWM2:
+	case CLK_PWM3:
+		rate = rk3568_pwm_set_clk(priv, clk->id, rate);
+		break;
+	case CLK_SARADC:
+	case CLK_TSADC_TSEN:
+	case CLK_TSADC:
+		rate = rk3568_adc_set_clk(priv, clk->id, rate);
+		break;
+	case CLK_SDMMC0:
+	case CLK_SDMMC1:
+	case CLK_SDMMC2:
+		rate = rk3568_sdmmc_set_clk(priv, clk->id, rate);
+		break;
+	case SCLK_SFC:
+		rate = rk3568_sfc_set_clk(priv, rate);
+		break;
+	case NCLK_NANDC:
+		rate = rk3568_nand_set_clk(priv, rate);
+		break;
+	case CCLK_EMMC:
+		rate = rk3568_emmc_set_clk(priv, rate);
+		break;
+	case ACLK_VOP:
+		rate = rk3568_aclk_vop_set_clk(priv, rate);
+		break;
+	case DCLK_VOP0:
+	case DCLK_VOP1:
+	case DCLK_VOP2:
+		rate = rk3568_dclk_vop_set_clk(priv, clk->id, rate);
+		break;
+	case SCLK_GMAC0:
+	case CLK_MAC0_2TOP:
+	case CLK_MAC0_REFOUT:
+		rate = rk3568_gmac_src_set_clk(priv, 0, rate);
+		break;
+	case CLK_MAC0_OUT:
+		rate = rk3568_gmac_out_set_clk(priv, 0, rate);
+		break;
+	case SCLK_GMAC0_RX_TX:
+		rate = rk3568_gmac_tx_rx_set_clk(priv, 0, rate);
+		break;
+	case CLK_GMAC0_PTP_REF:
+		rate = rk3568_gmac_ptp_ref_set_clk(priv, 0, rate);
+		break;
+	case SCLK_GMAC1:
+	case CLK_MAC1_2TOP:
+	case CLK_MAC1_REFOUT:
+		rate = rk3568_gmac_src_set_clk(priv, 1, rate);
+		break;
+	case CLK_MAC1_OUT:
+		rate = rk3568_gmac_out_set_clk(priv, 1, rate);
+		break;
+	case SCLK_GMAC1_RX_TX:
+		rate = rk3568_gmac_tx_rx_set_clk(priv, 1, rate);
+		break;
+	case CLK_GMAC1_PTP_REF:
+		rate = rk3568_gmac_ptp_ref_set_clk(priv, 1, rate);
+		break;
+	case ACLK_SECURE_FLASH:
+	case ACLK_CRYPTO_NS:
+	case HCLK_SECURE_FLASH:
+	case HCLK_CRYPTO_NS:
+	case CLK_CRYPTO_NS_RNG:
+	case CLK_CRYPTO_NS_CORE:
+	case CLK_CRYPTO_NS_PKA:
+		rate = rk3568_crypto_set_rate(priv, clk->id, rate);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+};
+
+#define ROCKCHIP_MMC_DELAY_SEL		BIT(10)
+#define ROCKCHIP_MMC_DEGREE_MASK	0x3
+#define ROCKCHIP_MMC_DELAYNUM_OFFSET	2
+#define ROCKCHIP_MMC_DELAYNUM_MASK	(0xff << ROCKCHIP_MMC_DELAYNUM_OFFSET)
+
+#define PSECS_PER_SEC 1000000000000LL
+/*
+ * Each fine delay is between 44ps-77ps. Assume each fine delay is 60ps to
+ * simplify calculations. So 45degs could be anywhere between 33deg and 57.8deg.
+ */
+#define ROCKCHIP_MMC_DELAY_ELEMENT_PSEC 60
+
+int rk3568_mmc_get_phase(struct clk *clk)
+{
+	struct rk3568_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3568_cru *cru = priv->cru;
+	u32 raw_value, delay_num;
+	u16 degrees = 0;
+	ulong rate;
+
+	rate = rk3568_clk_get_rate(clk);
+	if (rate < 0)
+		return rate;
+
+	if (clk->id == SCLK_EMMC_SAMPLE)
+		raw_value = readl(&cru->emmc_con[1]);
+	else if (clk->id == SCLK_SDMMC0_SAMPLE)
+		raw_value = readl(&cru->sdmmc0_con[1]);
+	else if (clk->id == SCLK_SDMMC1_SAMPLE)
+		raw_value = readl(&cru->sdmmc1_con[1]);
+	else
+		raw_value = readl(&cru->sdmmc2_con[1]);
+
+	raw_value >>= 1;
+	degrees = (raw_value & ROCKCHIP_MMC_DEGREE_MASK) * 90;
+
+	if (raw_value & ROCKCHIP_MMC_DELAY_SEL) {
+		/* degrees/delaynum * 10000 */
+		unsigned long factor = (ROCKCHIP_MMC_DELAY_ELEMENT_PSEC / 10) *
+					36 * (rate / 1000000);
+
+		delay_num = (raw_value & ROCKCHIP_MMC_DELAYNUM_MASK);
+		delay_num >>= ROCKCHIP_MMC_DELAYNUM_OFFSET;
+		degrees += DIV_ROUND_CLOSEST(delay_num * factor, 10000);
+	}
+
+	return degrees % 360;
+}
+
+int rk3568_mmc_set_phase(struct clk *clk, u32 degrees)
+{
+	struct rk3568_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3568_cru *cru = priv->cru;
+	u8 nineties, remainder, delay_num;
+	u32 raw_value, delay;
+	ulong rate;
+
+	rate = rk3568_clk_get_rate(clk);
+	if (rate < 0)
+		return rate;
+
+	nineties = degrees / 90;
+	remainder = (degrees % 90);
+
+	/*
+	 * Convert to delay; do a little extra work to make sure we
+	 * don't overflow 32-bit / 64-bit numbers.
+	 */
+	delay = 10000000; /* PSECS_PER_SEC / 10000 / 10 */
+	delay *= remainder;
+	delay = DIV_ROUND_CLOSEST(delay, (rate / 1000) * 36 *
+				  (ROCKCHIP_MMC_DELAY_ELEMENT_PSEC / 10));
+
+	delay_num = (u8)min_t(u32, delay, 255);
+
+	raw_value = delay_num ? ROCKCHIP_MMC_DELAY_SEL : 0;
+	raw_value |= delay_num << ROCKCHIP_MMC_DELAYNUM_OFFSET;
+	raw_value |= nineties;
+
+	raw_value <<= 1;
+	if (clk->id == SCLK_EMMC_SAMPLE)
+		writel(raw_value | 0xffff0000, &cru->emmc_con[1]);
+	else if (clk->id == SCLK_SDMMC0_SAMPLE)
+		writel(raw_value | 0xffff0000, &cru->sdmmc0_con[1]);
+	else if (clk->id == SCLK_SDMMC1_SAMPLE)
+		writel(raw_value | 0xffff0000, &cru->sdmmc1_con[1]);
+	else
+		writel(raw_value | 0xffff0000, &cru->sdmmc2_con[1]);
+
+	debug("mmc set_phase(%d) delay_nums=%u reg=%#x actual_degrees=%d\n",
+	      degrees, delay_num, raw_value, rk3568_mmc_get_phase(clk));
+
+	return 0;
+}
+
+static int rk3568_clk_get_phase(struct clk *clk)
+{
+	int ret;
+
+	debug("%s %ld\n", __func__, clk->id);
+	switch (clk->id) {
+	case SCLK_EMMC_SAMPLE:
+	case SCLK_SDMMC0_SAMPLE:
+	case SCLK_SDMMC1_SAMPLE:
+	case SCLK_SDMMC2_SAMPLE:
+		ret = rk3568_mmc_get_phase(clk);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+}
+
+static int rk3568_clk_set_phase(struct clk *clk, int degrees)
+{
+	int ret;
+
+	debug("%s %ld\n", __func__, clk->id);
+	switch (clk->id) {
+	case SCLK_EMMC_SAMPLE:
+	case SCLK_SDMMC0_SAMPLE:
+	case SCLK_SDMMC1_SAMPLE:
+	case SCLK_SDMMC2_SAMPLE:
+		ret = rk3568_mmc_set_phase(clk, degrees);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+}
+
+#if (IS_ENABLED(OF_CONTROL)) || (!IS_ENABLED(OF_PLATDATA))
+static int rk3568_gmac0_src_set_parent(struct clk *clk, struct clk *parent)
+{
+	struct rk3568_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3568_cru *cru = priv->cru;
+
+	if (parent->id == CLK_MAC0_2TOP)
+		rk_clrsetreg(&cru->clksel_con[31],
+			     RMII0_EXTCLK_SEL_MASK,
+			     RMII0_EXTCLK_SEL_MAC0_TOP <<
+			     RMII0_EXTCLK_SEL_SHIFT);
+	else
+		rk_clrsetreg(&cru->clksel_con[31],
+			     RMII0_EXTCLK_SEL_MASK,
+			     RMII0_EXTCLK_SEL_IO << RMII0_EXTCLK_SEL_SHIFT);
+	return 0;
+}
+
+static int rk3568_gmac1_src_set_parent(struct clk *clk, struct clk *parent)
+{
+	struct rk3568_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3568_cru *cru = priv->cru;
+
+	if (parent->id == CLK_MAC1_2TOP)
+		rk_clrsetreg(&cru->clksel_con[33],
+			     RMII0_EXTCLK_SEL_MASK,
+			     RMII0_EXTCLK_SEL_MAC0_TOP <<
+			     RMII0_EXTCLK_SEL_SHIFT);
+	else
+		rk_clrsetreg(&cru->clksel_con[33],
+			     RMII0_EXTCLK_SEL_MASK,
+			     RMII0_EXTCLK_SEL_IO << RMII0_EXTCLK_SEL_SHIFT);
+	return 0;
+}
+
+static int rk3568_gmac0_tx_rx_set_parent(struct clk *clk, struct clk *parent)
+{
+	struct rk3568_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3568_cru *cru = priv->cru;
+
+	if (parent->id == SCLK_GMAC0_RGMII_SPEED)
+		rk_clrsetreg(&cru->clksel_con[31],
+			     RMII0_MODE_MASK,
+			     RMII0_MODE_SEL_RGMII << RMII0_MODE_SHIFT);
+	else if (parent->id == SCLK_GMAC0_RMII_SPEED)
+		rk_clrsetreg(&cru->clksel_con[31],
+			     RMII0_MODE_MASK,
+			     RMII0_MODE_SEL_RMII << RMII0_MODE_SHIFT);
+	else
+		rk_clrsetreg(&cru->clksel_con[31],
+			     RMII0_MODE_MASK,
+			     RMII0_MODE_SEL_GMII << RMII0_MODE_SHIFT);
+
+	return 0;
+}
+
+static int rk3568_gmac1_tx_rx_set_parent(struct clk *clk, struct clk *parent)
+{
+	struct rk3568_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3568_cru *cru = priv->cru;
+
+	if (parent->id == SCLK_GMAC1_RGMII_SPEED)
+		rk_clrsetreg(&cru->clksel_con[33],
+			     RMII0_MODE_MASK,
+			     RMII0_MODE_SEL_RGMII << RMII0_MODE_SHIFT);
+	else if (parent->id == SCLK_GMAC1_RMII_SPEED)
+		rk_clrsetreg(&cru->clksel_con[33],
+			     RMII0_MODE_MASK,
+			     RMII0_MODE_SEL_RMII << RMII0_MODE_SHIFT);
+	else
+		rk_clrsetreg(&cru->clksel_con[33],
+			     RMII0_MODE_MASK,
+			     RMII0_MODE_SEL_GMII << RMII0_MODE_SHIFT);
+
+	return 0;
+}
+
+static int __maybe_unused rk3568_dclk_vop_set_parent(struct clk *clk,
+						     struct clk *parent)
+{
+	struct rk3568_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3568_cru *cru = priv->cru;
+	u32 con_id;
+
+	switch (clk->id) {
+	case DCLK_VOP0:
+		con_id = 39;
+		break;
+	case DCLK_VOP1:
+		con_id = 40;
+		break;
+	case DCLK_VOP2:
+		con_id = 41;
+		break;
+	default:
+		return -EINVAL;
+	}
+	if (parent->id == PLL_VPLL) {
+		rk_clrsetreg(&cru->clksel_con[con_id], DCLK0_VOP_SEL_MASK,
+			     DCLK_VOP_SEL_VPLL << DCLK0_VOP_SEL_SHIFT);
+	} else {
+		rk_clrsetreg(&cru->clksel_con[con_id], DCLK0_VOP_SEL_MASK,
+			     DCLK_VOP_SEL_HPLL << DCLK0_VOP_SEL_SHIFT);
+	}
+
+	return 0;
+}
+
+static int rk3568_clk_set_parent(struct clk *clk, struct clk *parent)
+{
+	switch (clk->id) {
+	case SCLK_GMAC0:
+		return rk3568_gmac0_src_set_parent(clk, parent);
+	case SCLK_GMAC1:
+		return rk3568_gmac1_src_set_parent(clk, parent);
+	case SCLK_GMAC0_RX_TX:
+		return rk3568_gmac0_tx_rx_set_parent(clk, parent);
+	case SCLK_GMAC1_RX_TX:
+		return rk3568_gmac1_tx_rx_set_parent(clk, parent);
+	case DCLK_VOP0:
+	case DCLK_VOP1:
+	case DCLK_VOP2:
+		return rk3568_dclk_vop_set_parent(clk, parent);
+	default:
+		return -ENOENT;
+	}
+
+	return 0;
+}
+#endif
+
+static struct clk_ops rk3568_clk_ops = {
+	.get_rate = rk3568_clk_get_rate,
+	.set_rate = rk3568_clk_set_rate,
+	.get_phase = rk3568_clk_get_phase,
+	.set_phase = rk3568_clk_set_phase,
+#if (IS_ENABLED(OF_CONTROL)) || (!IS_ENABLED(OF_PLATDATA))
+	.set_parent = rk3568_clk_set_parent,
+#endif
+};
+
+static void rk3568_clk_init(struct rk3568_clk_priv *priv)
+{
+	int ret;
+
+	priv->sync_kernel = false;
+	if (!priv->armclk_enter_hz) {
+		priv->armclk_enter_hz =
+			rockchip_pll_get_rate(&rk3568_pll_clks[APLL],
+					      priv->cru, APLL);
+		priv->armclk_init_hz = priv->armclk_enter_hz;
+	}
+
+	if (priv->armclk_init_hz != APLL_HZ) {
+		ret = rk3568_armclk_set_clk(priv, APLL_HZ);
+		if (!ret)
+			priv->armclk_init_hz = APLL_HZ;
+	}
+	if (priv->cpll_hz != CPLL_HZ) {
+		ret = rockchip_pll_set_rate(&rk3568_pll_clks[CPLL], priv->cru,
+					    CPLL, CPLL_HZ);
+		if (!ret)
+			priv->cpll_hz = CPLL_HZ;
+	}
+	if (priv->gpll_hz != GPLL_HZ) {
+		ret = rockchip_pll_set_rate(&rk3568_pll_clks[GPLL], priv->cru,
+					    GPLL, GPLL_HZ);
+		if (!ret)
+			priv->gpll_hz = GPLL_HZ;
+	}
+
+	priv->ppll_hz = rk3568_pmu_pll_get_rate(priv, PPLL);
+	priv->hpll_hz = rk3568_pmu_pll_get_rate(priv, HPLL);
+}
+
+static int rk3568_clk_probe(struct udevice *dev)
+{
+	struct rk3568_clk_priv *priv = dev_get_priv(dev);
+	int ret;
+
+	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	if (IS_ERR(priv->grf))
+		return PTR_ERR(priv->grf);
+
+	rk3568_clk_init(priv);
+
+	/* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
+	ret = clk_set_defaults(dev);
+	if (ret)
+		debug("%s clk_set_defaults failed %d\n", __func__, ret);
+	else
+		priv->sync_kernel = true;
+
+	return 0;
+}
+
+static int rk3568_clk_ofdata_to_platdata(struct udevice *dev)
+{
+	struct rk3568_clk_priv *priv = dev_get_priv(dev);
+
+	priv->cru = dev_read_addr_ptr(dev);
+
+	return 0;
+}
+
+static int rk3568_clk_bind(struct udevice *dev)
+{
+	int ret;
+	struct udevice *sys_child, *sf_child;
+	struct sysreset_reg *priv;
+	struct softreset_reg *sf_priv;
+
+	/* The reset driver does not have a device node, so bind it here */
+	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
+				 &sys_child);
+	if (ret) {
+		debug("Warning: No sysreset driver: ret=%d\n", ret);
+	} else {
+		priv = malloc(sizeof(struct sysreset_reg));
+		priv->glb_srst_fst_value = offsetof(struct rk3568_cru,
+						    glb_srst_fst);
+		priv->glb_srst_snd_value = offsetof(struct rk3568_cru,
+						    glb_srsr_snd);
+		sys_child->priv = priv;
+	}
+
+	ret = device_bind_driver_to_node(dev, "rockchip_reset", "reset",
+					 dev_ofnode(dev), &sf_child);
+	if (ret) {
+		debug("Warning: No rockchip reset driver: ret=%d\n", ret);
+	} else {
+		sf_priv = malloc(sizeof(struct softreset_reg));
+		sf_priv->sf_reset_offset = offsetof(struct rk3568_cru,
+						    softrst_con[0]);
+		sf_priv->sf_reset_num = 30;
+		sf_child->priv = sf_priv;
+	}
+
+	return 0;
+}
+
+static const struct udevice_id rk3568_clk_ids[] = {
+	{ .compatible = "rockchip,rk3568-cru" },
+	{ }
+};
+
+U_BOOT_DRIVER(rockchip_rk3568_cru) = {
+	.name		= "rockchip_rk3568_cru",
+	.id		= UCLASS_CLK,
+	.of_match	= rk3568_clk_ids,
+	.priv_auto_alloc_size = sizeof(struct rk3568_clk_priv),
+	.ofdata_to_platdata = rk3568_clk_ofdata_to_platdata,
+	.ops		= &rk3568_clk_ops,
+	.bind		= rk3568_clk_bind,
+	.probe		= rk3568_clk_probe,
+};
+
+#if (!IS_ENABLED(CONFIG_SPL_BUILD))
+/**
+ * soc_clk_dump() - Print clock frequencies
+ * Returns zero on success
+ *
+ * Implementation for the clk dump command.
+ */
+int soc_clk_dump(void)
+{
+	struct udevice *cru_dev, *pmucru_dev;
+	struct rk3568_clk_priv *priv;
+	const struct rk3568_clk_info *clk_dump;
+	struct clk clk;
+	unsigned long clk_count = ARRAY_SIZE(clks_dump);
+	unsigned long rate;
+	int i, ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_CLK,
+					  DM_GET_DRIVER(rockchip_rk3568_cru),
+					  &cru_dev);
+	if (ret) {
+		printf("%s failed to get cru device\n", __func__);
+		return ret;
+	}
+
+	ret = uclass_get_device_by_driver(UCLASS_CLK,
+					  DM_GET_DRIVER(rockchip_rk3568_pmucru),
+					  &pmucru_dev);
+	if (ret) {
+		printf("%s failed to get pmucru device\n", __func__);
+		return ret;
+	}
+
+	priv = dev_get_priv(cru_dev);
+	printf("CLK: (%s. arm: enter %lu KHz, init %lu KHz, kernel %lu%s)\n",
+	       priv->sync_kernel ? "sync kernel" : "uboot",
+	       priv->armclk_enter_hz / 1000,
+	       priv->armclk_init_hz / 1000,
+	       priv->set_armclk_rate ? priv->armclk_hz / 1000 : 0,
+	       priv->set_armclk_rate ? " KHz" : "N/A");
+	for (i = 0; i < clk_count; i++) {
+		clk_dump = &clks_dump[i];
+		if (clk_dump->name) {
+			clk.id = clk_dump->id;
+			if (clk_dump->is_cru)
+				ret = clk_request(cru_dev, &clk);
+			else
+				ret = clk_request(pmucru_dev, &clk);
+			if (ret < 0)
+				return ret;
+
+			rate = clk_get_rate(&clk);
+			clk_free(&clk);
+			if (i == 0) {
+				if (rate < 0)
+					printf("  %s %s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("  %s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
+			} else {
+				if (rate < 0)
+					printf("  %s %s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("  %s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
+			}
+		}
+	}
+
+	return 0;
+}
+#endif

commit 6b7c0aa59e7763ce34b2f17d13496a0a4327e956
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Mon Oct 12 14:50:28 2020 +0800

    rockchip: dts: rk3568: sync from kernel
    
    sync from: ac723c clk: rockchip: rk3568: Replace RKNN with NPU
    
    Change-Id: I24084626ef787f6fb7cbb8875365eb31fbea3541
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/include/dt-bindings/clock/rk3568-cru.h b/include/dt-bindings/clock/rk3568-cru.h
index 176e124512..7f9290809c 100644
--- a/include/dt-bindings/clock/rk3568-cru.h
+++ b/include/dt-bindings/clock/rk3568-cru.h
@@ -97,8 +97,8 @@
 #define HCLK_NPU_PRE		37
 #define PCLK_NPU_PRE		38
 #define ACLK_NPU_PRE		39
-#define ACLK_RKNN		40
-#define HCLK_RKNN		41
+#define ACLK_NPU		40
+#define HCLK_NPU		41
 #define PCLK_NPU_PVTM		42
 #define CLK_NPU_PVTM		43
 #define CLK_NPU_PVTM_CORE	44
@@ -460,8 +460,10 @@
 #define SCLK_SDMMC2_SAMPLE	399
 #define SCLK_EMMC_DRV		400
 #define SCLK_EMMC_SAMPLE	401
+#define PCLK_EDPPHY_GRF		402
+#define PCLK_CORE_PVTM		403
 
-#define CLK_NR_CLKS		(SCLK_EMMC_SAMPLE + 1)
+#define CLK_NR_CLKS		(PCLK_CORE_PVTM + 1)
 
 /* pmu soft-reset indices */
 /* pmucru_softrst_con0 */
@@ -521,8 +523,8 @@
 #define SRST_A_NPU_NIU		40
 #define SRST_H_NPU_NIU		41
 #define SRST_P_NPU_NIU		42
-#define SRST_A_RKNN		43
-#define SRST_H_RKNN		44
+#define SRST_A_NPU		43
+#define SRST_H_NPU		44
 #define SRST_P_NPU_PVTM		45
 #define SRST_NPU_PVTM		46
 #define SRST_NPU_PVTPLL		47

commit c42dfcf531909ea49582a8707af0455e23829b04
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Oct 22 17:41:13 2020 +0800

    cmd: boot fit: support a/b system
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I37452ec5ce107f864594c94411dc59a422c7cf47

diff --git a/cmd/bootfit.c b/cmd/bootfit.c
index bffbbb4374..827848c388 100644
--- a/cmd/bootfit.c
+++ b/cmd/bootfit.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <android_ab.h>
 #include <bootm.h>
 #include <boot_rkimg.h>
 #include <image.h>
@@ -93,6 +94,12 @@ static int do_boot_fit(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 
 	printf("at %s with size 0x%08lx\n", fit_addr, size);
 
+#ifdef CONFIG_ANDROID_AB
+	ab_update_root_uuid();
+	if (ab_decrease_tries())
+		printf("Decrease ab tries count fail!\n");
+#endif
+
 	ret = do_bootm_states(NULL, 0, ARRAY_SIZE(bootm_args), bootm_args,
 		BOOTM_STATE_START |
 		BOOTM_STATE_FINDOS | BOOTM_STATE_FINDOTHER |

commit cee2fb0e571126da826f48b2280c4ecd37f5c9b4
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Sep 29 16:47:22 2020 +0800

    common: android_ab: move the ab functions to android_ab.c
    
    Move the ab functions to android_ab.c and add "ab_" prefix to
    api function.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I4527a0c957aa7853a1b75d456ca3fabaf80c1c57

diff --git a/common/android_ab.c b/common/android_ab.c
index 6ff1e32d54..a80dc088eb 100644
--- a/common/android_ab.c
+++ b/common/android_ab.c
@@ -7,8 +7,12 @@
 #include <android_ab.h>
 
 #include <android_bootloader_message.h>
+#include <android_image.h>
+#include <boot_rkimg.h>
 #include <common.h>
 #include <malloc.h>
+#include <android_avb/avb_ops_user.h>
+#include <android_avb/rk_avb_ops_user.h>
 #include <u-boot/crc.h>
 #include <boot_rkimg.h>
 
@@ -332,3 +336,172 @@ int write_misc_virtual_ab_message(struct misc_virtual_ab_message *message)
 
 	return 0;
 }
+
+int ab_is_support_dynamic_partition(struct blk_desc *dev_desc)
+{
+	disk_partition_t super_part_info;
+	disk_partition_t boot_part_info;
+	int part_num;
+	int is_dp = 0;
+	char *super_dp = NULL;
+	char *super_info = "androidboot.super_partition=";
+
+	memset(&super_part_info, 0x0, sizeof(super_part_info));
+	part_num = part_get_info_by_name(dev_desc, ANDROID_PARTITION_SUPER,
+					 &super_part_info);
+	if (part_num < 0) {
+		memset(&boot_part_info, 0x0, sizeof(boot_part_info));
+		part_num = part_get_info_by_name(dev_desc, ANDROID_PARTITION_BOOT,
+						 &boot_part_info);
+		if (part_num < 0) {
+			is_dp = 0;
+		} else {
+			andr_img_hdr hdr;
+			ulong hdr_blocks = sizeof(struct andr_img_hdr) /
+			boot_part_info.blksz;
+
+			memset(&hdr, 0x0, sizeof(hdr));
+			if (blk_dread(dev_desc, boot_part_info.start, hdr_blocks, &hdr) !=
+				hdr_blocks) {
+				is_dp = 0;
+			} else {
+				debug("hdr cmdline=%s\n", hdr.cmdline);
+				super_dp = strstr(hdr.cmdline, super_info);
+				if (super_dp)
+					is_dp = 1;
+				else
+					is_dp = 0;
+			}
+		}
+	} else {
+		debug("Find super partition, the firmware support dynamic partition\n");
+		is_dp = 1;
+	}
+
+	debug("%s is_dp=%d\n", __func__, is_dp);
+	return is_dp;
+}
+
+static int get_partition_unique_uuid(char *partition,
+				     char *guid_buf,
+				     size_t guid_buf_size)
+{
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: Could not find device\n", __func__);
+		return -1;
+	}
+
+	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0) {
+		printf("Could not find \"%s\" partition\n", partition);
+		return -1;
+	}
+
+	if (guid_buf && guid_buf_size > 0)
+		memcpy(guid_buf, part_info.uuid, guid_buf_size);
+
+	return 0;
+}
+
+void ab_update_root_uuid(void)
+{
+	/*
+	 * In android a/b & avb process, the system.img is mandory and the
+	 * "root=" will be added in vbmeta.img.
+	 *
+	 * In linux a/b & avb process, the system is NOT mandory and the
+	 * "root=" will not be added in vbmeta.img but in kernel dts bootargs.
+	 * (Parsed and dropped late, i.e. "root=" is not available now/always).
+	 *
+	 * To compatible with the above two processes, test the existence of
+	 * "root=" and create it for linux ab & avb.
+	 */
+	char root_partuuid[70] = "root=PARTUUID=";
+	char *boot_args = env_get("bootargs");
+	char guid_buf[UUID_SIZE] = {0};
+	struct blk_desc *dev_desc;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: Could not find device\n", __func__);
+		return;
+	}
+
+	if (ab_is_support_dynamic_partition(dev_desc))
+		return;
+
+	if (!strstr(boot_args, "root=")) {
+		get_partition_unique_uuid(ANDROID_PARTITION_SYSTEM,
+					  guid_buf, UUID_SIZE);
+		strcat(root_partuuid, guid_buf);
+		env_update("bootargs", root_partuuid);
+	}
+}
+
+int ab_get_slot_suffix(char *slot_suffix)
+{
+	/* TODO: get from pre-loader or misc partition */
+	if (rk_avb_get_current_slot(slot_suffix)) {
+		printf("rk_avb_get_current_slot() failed\n");
+		return -1;
+	}
+
+	if (slot_suffix[0] != '_') {
+#ifndef CONFIG_ANDROID_AVB
+		printf("###There is no bootable slot, bring up lastboot!###\n");
+		if (rk_get_lastboot() == 1)
+			memcpy(slot_suffix, "_b", 2);
+		else if (rk_get_lastboot() == 0)
+			memcpy(slot_suffix, "_a", 2);
+		else
+#endif
+			return -1;
+	}
+
+	return 0;
+}
+
+int ab_decrease_tries(void)
+{
+	AvbABData ab_data_orig;
+	AvbABData ab_data;
+	char slot_suffix[3] = {0};
+	AvbOps *ops;
+	size_t slot_index = 0;
+
+	if (ab_get_slot_suffix(slot_suffix))
+		return -1;
+
+	if (!strncmp(slot_suffix, "_a", 2))
+		slot_index = 0;
+	else if (!strncmp(slot_suffix, "_b", 2))
+		slot_index = 1;
+	else
+		slot_index = 0;
+
+	ops = avb_ops_user_new();
+	if (!ops) {
+		printf("avb_ops_user_new() failed!\n");
+		return -1;
+	}
+
+	if (load_metadata(ops->ab_ops, &ab_data, &ab_data_orig)) {
+		printf("Can not load metadata\n");
+		return -1;
+	}
+
+	/* ... and decrement tries remaining, if applicable. */
+	if (!ab_data.slots[slot_index].successful_boot &&
+	    ab_data.slots[slot_index].tries_remaining > 0)
+		ab_data.slots[slot_index].tries_remaining -= 1;
+
+	if (save_metadata_if_changed(ops->ab_ops, &ab_data, &ab_data_orig)) {
+		printf("Can not save metadata\n");
+		return -1;
+	}
+
+	return 0;
+}
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 2a638e9c7e..a793da3daf 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -10,6 +10,7 @@
 #include <android_avb/avb_ops_user.h>
 #include <android_avb/rk_avb_ops_user.h>
 #include <android_image.h>
+#include <android_ab.h>
 #include <bootm.h>
 #include <asm/arch/hotkey.h>
 #include <cli.h>
@@ -30,183 +31,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#ifdef CONFIG_ANDROID_AB
-static int is_support_dynamic_partition(struct blk_desc *dev_desc)
-{
-	disk_partition_t super_part_info;
-	disk_partition_t boot_part_info;
-	int part_num;
-	int is_dp = 0;
-	char *super_dp = NULL;
-	char *super_info = "androidboot.super_partition=";
-
-	memset(&super_part_info, 0x0, sizeof(super_part_info));
-	part_num = part_get_info_by_name(dev_desc, ANDROID_PARTITION_SUPER,
-					 &super_part_info);
-	if (part_num < 0) {
-		memset(&boot_part_info, 0x0, sizeof(boot_part_info));
-		part_num = part_get_info_by_name(dev_desc, ANDROID_PARTITION_BOOT,
-					 &boot_part_info);
-		if (part_num < 0) {
-			is_dp = 0;
-		} else {
-			andr_img_hdr hdr;
-			ulong hdr_blocks = sizeof(struct andr_img_hdr) /
-			boot_part_info.blksz;
-
-			memset(&hdr, 0x0, sizeof(hdr));
-			if (blk_dread(dev_desc, boot_part_info.start, hdr_blocks, &hdr) !=
-				hdr_blocks) {
-				is_dp = 0;
-			} else {
-				debug("hdr cmdline=%s\n", hdr.cmdline);
-				super_dp = strstr(hdr.cmdline, super_info);
-				if (super_dp != NULL) {
-					is_dp = 1;
-				} else {
-					is_dp = 0;
-				}
-			}
-		}
-	} else {
-		debug("Find super partition, the firmware support dynamic partition\n");
-		is_dp = 1;
-	}
-
-	debug("%s is_dp=%d\n", __func__, is_dp);
-	return is_dp;
-}
-
-static int get_partition_unique_uuid(char *partition,
-				     char *guid_buf,
-				     size_t guid_buf_size)
-{
-	struct blk_desc *dev_desc;
-	disk_partition_t part_info;
-
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: Could not find device\n", __func__);
-		return -1;
-	}
-
-	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0) {
-		printf("Could not find \"%s\" partition\n", partition);
-		return -1;
-	}
-
-	if (guid_buf && guid_buf_size > 0)
-		memcpy(guid_buf, part_info.uuid, guid_buf_size);
-
-	return 0;
-}
-
-static void update_root_uuid_if_android_ab(void)
-{
-	/*
-	 * In android a/b & avb process, the system.img is mandory and the
-	 * "root=" will be added in vbmeta.img.
-	 *
-	 * In linux a/b & avb process, the system is NOT mandory and the
-	 * "root=" will not be added in vbmeta.img but in kernel dts bootargs.
-	 * (Parsed and droped late, i.e. "root=" is not available now/always).
-	 *
-	 * To compatible with the above two processes, test the existence of
-	 * "root=" and create it for linux ab & avb.
-	 */
-	char root_partuuid[70] = "root=PARTUUID=";
-	char *boot_args = env_get("bootargs");
-	char guid_buf[UUID_SIZE] = {0};
-	struct blk_desc *dev_desc;
-
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: Could not find device\n", __func__);
-		return;
-	}
-
-	if (is_support_dynamic_partition(dev_desc)) {
-		return;
-	}
-
-	if (!strstr(boot_args, "root=")) {
-		get_partition_unique_uuid(ANDROID_PARTITION_SYSTEM,
-					  guid_buf, UUID_SIZE);
-		strcat(root_partuuid, guid_buf);
-		env_update("bootargs", root_partuuid);
-	}
-}
-
-static int get_slot_suffix_if_android_ab(char *slot_suffix)
-{
-	/* TODO: get from pre-loader or misc partition */
-	if (rk_avb_get_current_slot(slot_suffix)) {
-		printf("rk_avb_get_current_slot() failed\n");
-		return -1;
-	}
-
-	if (slot_suffix[0] != '_') {
-#ifndef CONFIG_ANDROID_AVB
-		printf("###There is no bootable slot, bring up lastboot!###\n");
-		if (rk_get_lastboot() == 1)
-			memcpy(slot_suffix, "_b", 2);
-		else if (rk_get_lastboot() == 0)
-			memcpy(slot_suffix, "_a", 2);
-		else
-#endif
-			return -1;
-	}
-
-	return 0;
-}
-
-static int decrease_tries_if_android_ab(void)
-{
-	AvbABData ab_data_orig;
-	AvbABData ab_data;
-	char slot_suffix[3] = {0};
-	AvbOps *ops;
-	size_t slot_index = 0;
-
-	if (get_slot_suffix_if_android_ab(slot_suffix))
-		return -1;
-
-	if (!strncmp(slot_suffix, "_a", 2))
-		slot_index = 0;
-	else if (!strncmp(slot_suffix, "_b", 2))
-		slot_index = 1;
-	else
-		slot_index = 0;
-
-	ops = avb_ops_user_new();
-	if (!ops) {
-		printf("avb_ops_user_new() failed!\n");
-		return -1;
-	}
-
-	if (load_metadata(ops->ab_ops, &ab_data, &ab_data_orig)) {
-		printf("Can not load metadata\n");
-		return -1;
-	}
-
-	/* ... and decrement tries remaining, if applicable. */
-	if (!ab_data.slots[slot_index].successful_boot &&
-	    ab_data.slots[slot_index].tries_remaining > 0)
-		ab_data.slots[slot_index].tries_remaining -= 1;
-
-	if (save_metadata_if_changed(ops->ab_ops, &ab_data, &ab_data_orig)) {
-		printf("Can not save metadata\n");
-		return -1;
-	}
-
-	return 0;
-}
-#else
-static inline void update_root_uuid_if_android_ab(void) {}
-static int get_slot_suffix_if_android_ab(char *slot_suffix) { return 0; }
-static inline int decrease_tries_if_android_ab(void) { return 0; }
-#endif
-
 #if defined(CONFIG_ANDROID_AB) && defined(CONFIG_ANDROID_AVB)
 static void reset_cpu_if_android_ab(void)
 {
@@ -1094,11 +918,11 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	}
 
 	printf("ANDROID: reboot reason: \"%s\"\n", android_boot_mode_str(mode));
-
+#ifdef CONFIG_ANDROID_AB
 	/* Get current slot_suffix */
-	if (get_slot_suffix_if_android_ab(slot_suffix))
+	if (ab_get_slot_suffix(slot_suffix))
 		return -1;
-
+#endif
 	switch (mode) {
 	case ANDROID_BOOT_MODE_NORMAL:
 		/* In normal mode, we load the kernel from "boot" but append
@@ -1115,7 +939,7 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 		* and then Android's first-stage init in ramdisk
 		* will skip recovery and boot normal Android.
 		*/
-		if (is_support_dynamic_partition(dev_desc)) {
+		if (ab_is_support_dynamic_partition(dev_desc)) {
 			mode_cmdline = "androidboot.force_normal_boot=1";
 		} else {
 			mode_cmdline = "skip_initramfs";
@@ -1193,7 +1017,10 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 		return -1;
 	}
 #endif
-	update_root_uuid_if_android_ab();
+
+#ifdef CONFIG_ANDROID_AB
+	ab_update_root_uuid();
+#endif
 
 	/* Set Android root variables. */
 	env_set_ulong("android_root_devnum", dev_desc->devnum);
@@ -1230,8 +1057,10 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 		printf("Close optee client failed!\n");
 #endif
 
-	if (decrease_tries_if_android_ab())
+#ifdef CONFIG_ANDROID_AB
+	if (ab_decrease_tries())
 		printf("Decrease ab tries count fail!\n");
+#endif
 
 	android_bootloader_boot_kernel(load_address);
 
diff --git a/include/android_ab.h b/include/android_ab.h
index 47e88b041c..921407b0f2 100644
--- a/include/android_ab.h
+++ b/include/android_ab.h
@@ -46,4 +46,10 @@ int android_ab_select(struct blk_desc *dev_desc, disk_partition_t *part_info);
 /* Read or write the Virtual A/B message from 32KB offset in /misc.*/
 int read_misc_virtual_ab_message(struct misc_virtual_ab_message *message);
 int write_misc_virtual_ab_message(struct misc_virtual_ab_message *message);
+
+void ab_update_root_uuid(void);
+int ab_get_slot_suffix(char *slot_suffix);
+int ab_is_support_dynamic_partition(struct blk_desc *dev_desc);
+int ab_decrease_tries(void);
+
 #endif

commit cf87ffd3512c5769d231e5b0962577a734fb237a
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Sep 29 16:40:36 2020 +0800

    include: android_image: move some android common definitions to this file
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ia0da707408bcd43b50b49cef89495af7f9d97cd7

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 41b5682252..2a638e9c7e 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -30,28 +30,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define ANDROID_PARTITION_BOOT "boot"
-#define ANDROID_PARTITION_VENDOR_BOOT "vendor_boot"
-#define ANDROID_PARTITION_MISC "misc"
-#define ANDROID_PARTITION_OEM  "oem"
-#define ANDROID_PARTITION_RECOVERY  "recovery"
-#define ANDROID_PARTITION_SYSTEM "system"
-#define ANDROID_PARTITION_VBMETA "vbmeta"
-#define ANDROID_PARTITION_SUPER "super"
-
-
-#define ANDROID_ARG_SLOT_SUFFIX "androidboot.slot_suffix="
-#define ANDROID_ARG_ROOT "root="
-#define ANDROID_ARG_SERIALNO "androidboot.serialno="
-#define ANDROID_VERIFY_STATE "androidboot.verifiedbootstate="
-#ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
-#define ANDROID_ARG_FDT_FILENAME "rk-kernel.dtb"
-#else
-#define ANDROID_ARG_FDT_FILENAME "kernel.dtb"
-#endif
-#define OEM_UNLOCK_ARG_SIZE 30
-#define UUID_SIZE 37
-
 #ifdef CONFIG_ANDROID_AB
 static int is_support_dynamic_partition(struct blk_desc *dev_desc)
 {
diff --git a/include/android_image.h b/include/android_image.h
index bb32dce861..421685372e 100644
--- a/include/android_image.h
+++ b/include/android_image.h
@@ -11,6 +11,27 @@
 #ifndef _ANDROID_IMAGE_H_
 #define _ANDROID_IMAGE_H_
 
+#define ANDROID_PARTITION_BOOT "boot"
+#define ANDROID_PARTITION_VENDOR_BOOT "vendor_boot"
+#define ANDROID_PARTITION_MISC "misc"
+#define ANDROID_PARTITION_OEM  "oem"
+#define ANDROID_PARTITION_RECOVERY  "recovery"
+#define ANDROID_PARTITION_SYSTEM "system"
+#define ANDROID_PARTITION_VBMETA "vbmeta"
+#define ANDROID_PARTITION_SUPER "super"
+
+#define ANDROID_ARG_SLOT_SUFFIX "androidboot.slot_suffix="
+#define ANDROID_ARG_ROOT "root="
+#define ANDROID_ARG_SERIALNO "androidboot.serialno="
+#define ANDROID_VERIFY_STATE "androidboot.verifiedbootstate="
+#ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
+#define ANDROID_ARG_FDT_FILENAME "rk-kernel.dtb"
+#else
+#define ANDROID_ARG_FDT_FILENAME "kernel.dtb"
+#endif
+#define OEM_UNLOCK_ARG_SIZE 30
+#define UUID_SIZE 37
+
 #define ANDR_BOOT_MAGIC "ANDROID!"
 #define VENDOR_BOOT_MAGIC "VNDRBOOT"
 #define ANDR_BOOT_MAGIC_SIZE 8

commit edb7fa0ede4f787df0a281bb9c4be72b6c392c67
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Oct 22 18:03:41 2020 +0800

    configs: rk3308-aarch32: disable distro/ext2/ext4/fat-write
    
    In order to decrease u-boot.bin size.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ia7ef7f535ed1a9c17492d55fa21c41bf3e10a710

diff --git a/configs/rk3308-aarch32_defconfig b/configs/rk3308-aarch32_defconfig
index 1a57831ca6..905fc81038 100644
--- a/configs/rk3308-aarch32_defconfig
+++ b/configs/rk3308-aarch32_defconfig
@@ -8,6 +8,7 @@ CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_TARGET_EVB_RK3308=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3308-evb"
 CONFIG_DEBUG_UART=y
+# CONFIG_DISTRO_DEFAULTS is not set
 CONFIG_ANDROID_BOOT_IMAGE=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
@@ -16,9 +17,11 @@ CONFIG_BOOTDELAY=0
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_HUSH_PARSER=y
 # CONFIG_FASTBOOT is not set
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_CONSOLE is not set
+CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
@@ -31,12 +34,18 @@ CONFIG_CMD_GPT=y
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_PART=y
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PXE=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 # CONFIG_CMD_LED is not set
 # CONFIG_CMD_MISC is not set
 CONFIG_CMD_PMIC=y
-# CONFIG_ISO_PARTITION is not set
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
 CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
@@ -94,10 +103,10 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x2207
 CONFIG_USB_GADGET_PRODUCT_NUM=0x330d
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
+# CONFIG_FAT_WRITE is not set
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_LZ4=y
 CONFIG_LZO=y
 CONFIG_ERRNO_STR=y
 # CONFIG_EFI_LOADER is not set
-CONFIG_TEST_ROCKCHIP=y

commit e6124e0d48e577195888b86ec205729f534749ff
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Oct 22 18:02:21 2020 +0800

    configs: rk3308-aarch32: update with make savedefconfig
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If540f32fca16a90f8a03c10ebb1506a04420d317

diff --git a/configs/rk3308-aarch32_defconfig b/configs/rk3308-aarch32_defconfig
index d7ba62746d..1a57831ca6 100644
--- a/configs/rk3308-aarch32_defconfig
+++ b/configs/rk3308-aarch32_defconfig
@@ -4,7 +4,6 @@ CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_ROCKCHIP_RK3308=y
 CONFIG_ARM64_BOOT_AARCH32=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
-CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_TARGET_EVB_RK3308=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3308-evb"
@@ -55,11 +54,11 @@ CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_PHY=y
-CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
 CONFIG_POWER_FG_RK816=y
@@ -90,11 +89,11 @@ CONFIG_DM_THERMAL=y
 CONFIG_ROCKCHIP_THERMAL=y
 CONFIG_USB=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_DWC2_OTG=y
-CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
 CONFIG_USB_GADGET_VENDOR_NUM=0x2207
 CONFIG_USB_GADGET_PRODUCT_NUM=0x330d
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_LZ4=y

commit 295b646621dfb614a6ec6cb7a8f32122e325168a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Oct 17 18:02:56 2020 +0800

    spl: fit: print ATF and U-Boot load address
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I0b732934c1aa63ed6e849d85bd77fa8ec1f622b3

diff --git a/common/spl/spl.c b/common/spl/spl.c
index 55a550322b..5cfc1b445c 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -563,7 +563,9 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 		break;
 #if CONFIG_IS_ENABLED(ATF)
 	case IH_OS_ARM_TRUSTED_FIRMWARE:
-		printf("Jumping to U-Boot via ARM Trusted Firmware\n");
+		printf("Jumping to U-Boot(0x%08lx) via ARM Trusted Firmware(0x%08lx)\n",
+		       (ulong)spl_image.entry_point_bl33,
+		       (ulong)spl_image.entry_point);
 		spl_invoke_atf(&spl_image);
 		break;
 #endif

commit 3db2d9fdeb3bcf5ef89d54fd1cbe180edc9ffec9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Oct 17 17:13:11 2020 +0800

    rockchip: weak: support soft gunzip image
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I645627b9e6c1e027be9532f25f3da7bc1e7b6928

diff --git a/arch/arm/mach-rockchip/weak.c b/arch/arm/mach-rockchip/weak.c
index 4aafe715ae..f0488fbff8 100644
--- a/arch/arm/mach-rockchip/weak.c
+++ b/arch/arm/mach-rockchip/weak.c
@@ -21,7 +21,6 @@ DECLARE_GLOBAL_DATA_PTR;
  * Override __weak board_fit_image_post_process() for SPL & U-Boot proper.
  */
 #if CONFIG_IS_ENABLED(FIT_IMAGE_POST_PROCESS)
-#if CONFIG_IS_ENABLED(MISC_DECOMPRESS)
 
 #define FIT_UNCOMP_HASH_NODENAME	"digest"
 static int fit_image_check_uncomp_hash(const void *fit, int parent_noffset,
@@ -43,10 +42,13 @@ static int fit_image_check_uncomp_hash(const void *fit, int parent_noffset,
 	return 0;
 }
 
-static int fit_hw_gunzip(void *fit, int node, ulong *load_addr,
-			 ulong **src_addr, size_t *src_len)
+#if CONFIG_IS_ENABLED(MISC_DECOMPRESS) || CONFIG_IS_ENABLED(GZIP)
+static int fit_gunzip_image(void *fit, int node, ulong *load_addr,
+			    ulong **src_addr, size_t *src_len)
 {
+#if CONFIG_IS_ENABLED(MISC_DECOMPRESS)
 	const void *prop;
+#endif
 	u64 len = *src_len;
 	int ret;
 	u8 comp;
@@ -62,9 +64,18 @@ static int fit_hw_gunzip(void *fit, int node, ulong *load_addr,
 	if (fit_image_check_type(fit, node, IH_TYPE_KERNEL))
 		return 0;
 #endif
+	/*
+	 * For smaller spl size, we don't use misc_decompress_process()
+	 * inside the gunzip().
+	 */
+#if CONFIG_IS_ENABLED(MISC_DECOMPRESS)
 	ret = misc_decompress_process((ulong)(*load_addr),
 				      (ulong)(*src_addr), (ulong)(*src_len),
 				      DECOM_GZIP, false, &len);
+#else
+	ret = gunzip((void *)(*load_addr), ALIGN(len, SZ_1M),
+		     (void *)(*src_addr), (void *)(&len));
+#endif
 	if (ret) {
 		printf("%s: decompress error, ret=%d\n",
 		       fdt_get_name(fit, node, NULL), ret);
@@ -81,12 +92,14 @@ static int fit_hw_gunzip(void *fit, int node, ulong *load_addr,
 	*src_addr = (ulong *)*load_addr;
 	*src_len = len;
 
+#if CONFIG_IS_ENABLED(MISC_DECOMPRESS)
 	/* mark for misc_decompress_cleanup() */
 	prop = fdt_getprop(fit, node, "decomp-async", NULL);
 	if (prop)
 		misc_decompress_async(comp);
 	else
 		misc_decompress_sync(comp);
+#endif
 
 	return 0;
 }
@@ -95,8 +108,8 @@ static int fit_hw_gunzip(void *fit, int node, ulong *load_addr,
 void board_fit_image_post_process(void *fit, int node, ulong *load_addr,
 				  ulong **src_addr, size_t *src_len)
 {
-#if CONFIG_IS_ENABLED(ROCKCHIP_HW_DECOMPRESS)
-	fit_hw_gunzip(fit, node, load_addr, src_addr, src_len);
+#if CONFIG_IS_ENABLED(MISC_DECOMPRESS) || CONFIG_IS_ENABLED(GZIP)
+	fit_gunzip_image(fit, node, load_addr, src_addr, src_len);
 #endif
 
 #if CONFIG_IS_ENABLED(USING_KERNEL_DTB)

commit c3723ef33701fcaeee0322de64b8ea306409662e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Oct 17 17:10:53 2020 +0800

    clk: rockchip: rk3399: support crypto clk set/get in SPL
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I159d062320ca523e8dc4f0dcce94a619692481f3

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index cc805f202d..cce0b489a5 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -1002,7 +1002,6 @@ static ulong rk3399_tsadc_set_clk(struct rk3399_cru *cru, uint hz)
 	return rk3399_tsadc_get_clk(cru);
 }
 
-#ifndef CONFIG_SPL_BUILD
 static ulong rk3399_crypto_get_clk(struct rk3399_clk_priv *priv, ulong clk_id)
 {
 	struct rk3399_cru *cru = priv->cru;
@@ -1060,6 +1059,7 @@ static ulong rk3399_crypto_set_clk(struct rk3399_clk_priv *priv, ulong clk_id,
 	return rk3399_crypto_get_clk(priv, clk_id);
 }
 
+#ifndef CONFIG_SPL_BUILD
 static ulong rk3399_peri_get_clk(struct rk3399_clk_priv *priv, ulong clk_id)
 {
 	struct rk3399_cru *cru = priv->cru;
@@ -1184,11 +1184,11 @@ static ulong rk3399_clk_get_rate(struct clk *clk)
 	case SCLK_TSADC:
 		rate = rk3399_tsadc_get_clk(priv->cru);
 		break;
-#ifndef CONFIG_SPL_BUILD
 	case SCLK_CRYPTO0:
 	case SCLK_CRYPTO1:
 		rate = rk3399_crypto_get_clk(priv, clk->id);
 		break;
+#ifndef CONFIG_SPL_BUILD
 	case ACLK_PERIHP:
 	case HCLK_PERIHP:
 	case PCLK_PERIHP:
@@ -1275,12 +1275,10 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_TSADC:
 		ret = rk3399_tsadc_set_clk(priv->cru, rate);
 		break;
-#ifndef CONFIG_SPL_BUILD
 	case SCLK_CRYPTO0:
 	case SCLK_CRYPTO1:
 		ret = rk3399_crypto_set_clk(priv, clk->id, rate);
 		break;
-#endif
 	default:
 		return -ENOENT;
 	}

commit 9b6b8f53f4d938a84adfafa652e4e7a00876bbfb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Oct 17 09:27:36 2020 +0800

    make.sh: show elf source of nm command
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I632ee35b42326516a0611878899335d338011e32

diff --git a/make.sh b/make.sh
index 6f577c6df1..b04a8f7d32 100755
--- a/make.sh
+++ b/make.sh
@@ -456,6 +456,7 @@ function sub_commands()
 	case ${CMD} in
 		elf|nm)
 			if [ "${CMD}" == "nm" ]; then
+				echo -e "\n${ELF}:     file format elf\n"
 				${TOOLCHAIN_NM} -r --size ${ELF} | less
 			else
 				if [ "${CMD}" == "elf" -a "${ARG}" == "elf" ]; then

commit cb718016c1e37e49e626509674d66e3407567825
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Oct 16 18:13:04 2020 +0800

    make.sh: support pack fit uboot.img for armv8
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ieacddba103b0d072de84af9764e5f69e87126e83

diff --git a/make.sh b/make.sh
index 413eb4dc2f..6f577c6df1 100755
--- a/make.sh
+++ b/make.sh
@@ -593,9 +593,13 @@ function pack_uboot_itb_image()
 
 	if [ "${ARM64_TRUSTZONE}" == "y" ]; then
 		BL31_ELF=`sed -n '/_bl31_/s/PATH=//p' ${INI} | tr -d '\r'`
+		BL32_BIN=`sed -n '/_bl32_/s/PATH=//p' ${INI} | tr -d '\r'`
 		cp ${RKBIN}/${BL31_ELF} bl31.elf
-		make CROSS_COMPILE=${TOOLCHAIN_GCC} u-boot.itb
-		echo "pack u-boot.itb okay! Input: ${INI}"
+		if grep BL32_OPTION -A 1 ${INI} | grep SEC=1 ; then
+			cp ${RKBIN}/${BL32_BIN} tee.bin
+			TEE_OFFSET=`grep BL32_OPTION -A 3 ${INI} | grep ADDR= | awk -F "=" '{ printf $2 }' | tr -d '\r'`
+			TEE_ARG="-t ${TEE_OFFSET}"
+		fi
 	else
 		# TOS
 		TOS=`sed -n "/TOS=/s/TOS=//p" ${INI} | tr -d '\r'`
@@ -613,6 +617,7 @@ function pack_uboot_itb_image()
 		if [ "${TEE_OFFSET}" == "" ]; then
 			TEE_OFFSET=0x8400000
 		fi
+		TEE_ARG="-t ${TEE_OFFSET}"
 
 		# MCU
 		MCU_ENABLED=`awk -F"," '/MCU=/ { printf $3 }' ${INI} | tr -d ' '`
@@ -620,29 +625,25 @@ function pack_uboot_itb_image()
 			MCU=`awk -F"," '/MCU=/  { printf $1 }' ${INI} | tr -d ' ' | cut -c 5-`
 			cp ${RKBIN}/${MCU} mcu.bin
 			MCU_OFFSET=`awk -F"," '/MCU=/ { printf $2 }' ${INI} | tr -d ' '`
+			MCU_ARG="-m ${MCU_OFFSET}"
 		fi
+	fi
 
-		COMPRESSION=`awk -F"," '/COMPRESSION=/  { printf $1 }' ${INI} | tr -d ' ' | cut -c 13-`
-		if [ -z "${COMPRESSION}" ]; then
-			COMPRESSION="none"
-		fi
-
-		# its
-		SPL_FIT_SOURCE=`sed -n "/CONFIG_SPL_FIT_SOURCE=/s/CONFIG_SPL_FIT_SOURCE=//p" .config | tr -d '""'`
-		if [ ! -z ${SPL_FIT_SOURCE} ]; then
-			cp ${SPL_FIT_SOURCE} u-boot.its
-		else
-			SPL_FIT_GENERATOR=`sed -n "/CONFIG_SPL_FIT_GENERATOR=/s/CONFIG_SPL_FIT_GENERATOR=//p" .config | tr -d '""'`
-			if [ ! -z ${MCU_OFFSET} ]; then
-				${SPL_FIT_GENERATOR} -t ${TEE_OFFSET} -c ${COMPRESSION} -m ${MCU_OFFSET} > u-boot.its
-			else
-				${SPL_FIT_GENERATOR} -t ${TEE_OFFSET} -c ${COMPRESSION} > u-boot.its
-			fi
-		fi
+	COMPRESSION=`awk -F"," '/COMPRESSION=/  { printf $1 }' ${INI} | tr -d ' ' | cut -c 13-`
+	if [ ! -z "${COMPRESSION}" -a "${COMPRESSION}" != "none" ]; then
+		COMPRESSION_ARG="-c ${COMPRESSION}"
+	fi
 
-		./tools/mkimage -f u-boot.its -E u-boot.itb
-		echo "pack u-boot.itb okay! Input: ${INI}"
+	SPL_FIT_SOURCE=`sed -n "/CONFIG_SPL_FIT_SOURCE=/s/CONFIG_SPL_FIT_SOURCE=//p" .config | tr -d '""'`
+	if [ ! -z ${SPL_FIT_SOURCE} ]; then
+		cp ${SPL_FIT_SOURCE} u-boot.its
+	else
+		SPL_FIT_GENERATOR=`sed -n "/CONFIG_SPL_FIT_GENERATOR=/s/CONFIG_SPL_FIT_GENERATOR=//p" .config | tr -d '""'`
+		${SPL_FIT_GENERATOR} ${TEE_ARG} ${COMPRESSION_ARG} ${MCU_ARG} > u-boot.its
 	fi
+
+	./tools/mkimage -f u-boot.its -E u-boot.itb
+	echo "pack u-boot.itb okay! Input: ${INI}"
 	echo
 }
 

commit 392231a73222affbafb5f1ddb9fb939dca64649a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Oct 16 16:03:04 2020 +0800

    rockchip: add make_fit_atf.sh for armv8 to generate u-boot.itb
    
    Add support:
            - decode bl31.elf to binary;
            - include tee.bin dynamically;
            - none or gzip compression;
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I483cb81b6ab05a89fd0df3a2a7d95e6ff3ad6636

diff --git a/arch/arm/mach-rockchip/decode_bl31.py b/arch/arm/mach-rockchip/decode_bl31.py
new file mode 100755
index 0000000000..45806f3885
--- /dev/null
+++ b/arch/arm/mach-rockchip/decode_bl31.py
@@ -0,0 +1,34 @@
+#!/usr/bin/env python2
+#
+# Copyright (C) 2020 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+"""
+A script to decode bl31.elf to binary
+"""
+
+# pip install pyelftools
+from elftools.elf.elffile import ELFFile
+
+ELF_SEG_P_TYPE='p_type'
+ELF_SEG_P_PADDR='p_paddr'
+
+def generate_atf_binary(bl31_file_name):
+    with open(bl31_file_name) as bl31_file:
+        bl31 = ELFFile(bl31_file)
+        num = bl31.num_segments()
+        for i in range(num):
+            seg = bl31.get_segment(i)
+            if ('PT_LOAD' == seg.__getitem__(ELF_SEG_P_TYPE)):
+                paddr = seg.__getitem__(ELF_SEG_P_PADDR)
+                file_name = 'bl31_0x%08x.bin' % paddr
+                with open(file_name, "wb") as atf:
+                    atf.write(seg.data());
+
+def main():
+    bl31_elf="./bl31.elf"
+    generate_atf_binary(bl31_elf);
+
+if __name__ == "__main__":
+    main()
diff --git a/arch/arm/mach-rockchip/make_fit_atf.sh b/arch/arm/mach-rockchip/make_fit_atf.sh
new file mode 100755
index 0000000000..dcf4785607
--- /dev/null
+++ b/arch/arm/mach-rockchip/make_fit_atf.sh
@@ -0,0 +1,180 @@
+#!/bin/bash
+#
+# Copyright (C) 2020 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+# Process args and auto set variables
+source ./${srctree}/arch/arm/mach-rockchip/make_fit_args.sh
+
+rm -f ${srctree}/*.digest ${srctree}/*.bin.gz ${srctree}/bl31_0x*.gz
+${srctree}/arch/arm/mach-rockchip/decode_bl31.py
+
+if [ "${COMPRESSION}" == "gzip" ]; then
+	SUFFIX=".gz"
+else
+	COMPRESSION="none"
+	SUFFIX=
+fi
+
+function generate_uboot_node()
+{
+	echo "		uboot {
+			description = \"U-Boot(64-bit)\";
+			data = /incbin/(\"./u-boot-nodtb.bin${SUFFIX}\");
+			type = \"standalone\";
+			arch = \"arm64\";
+			os = \"U-Boot\";
+			compression = \"${COMPRESSION}\";
+			load = <"${UBOOT_LOAD_ADDR}">;
+			hash {
+				algo = \"sha256\";
+			};"
+	if [ "${COMPRESSION}" == "gzip" ]; then
+		echo "			digest {
+				value = /incbin/(\"./u-boot-nodtb.bin.digest\");
+				algo = \"sha256\";
+			};"
+		openssl dgst -sha256 -binary -out u-boot-nodtb.bin.digest u-boot-nodtb.bin
+		UBOOT_SZ=`ls -l u-boot-nodtb.bin | awk '{ print $5 }'`
+		if [ ${UBOOT_SZ} -gt 0 ]; then
+			gzip -k -f -9 ${srctree}/u-boot-nodtb.bin
+		else
+			touch ${srctree}/u-boot-nodtb.bin.gz
+		fi
+	fi
+	echo "		};"
+}
+
+function generate_bl31_node()
+{
+	NUM=1
+	for NAME in `ls -l bl31_0x*.bin | sort --key=5 -nr | awk '{ print $9 }'`
+	do
+		ATF_LOAD_ADDR=`echo ${NAME} | awk -F "_" '{ printf $2 }' | awk -F "." '{ printf $1 }'`
+		# only atf@1 support compress
+		if [ "${COMPRESSION}" == "gzip" -a ${NUM} -eq 1  ]; then
+			openssl dgst -sha256 -binary -out ${NAME}.digest ${NAME}
+			gzip -k -f -9 ${NAME}
+
+			echo "		atf@${NUM} {
+			description = \"ARM Trusted Firmware\";
+			data = /incbin/(\"./${NAME}${SUFFIX}\");
+			type = \"firmware\";
+			arch = \"arm64\";
+			os = \"arm-trusted-firmware\";
+			compression = \"${COMPRESSION}\";
+			load = <"${ATF_LOAD_ADDR}">;
+			hash {
+				algo = \"sha256\";
+			};
+			digest {
+				value = /incbin/(\"./${NAME}.digest\");
+				algo = \"sha256\";
+			};
+		};"
+		else
+			echo "		atf@${NUM} {
+			description = \"ARM Trusted Firmware\";
+			data = /incbin/(\"./${NAME}\");
+			type = \"firmware\";
+			arch = \"arm64\";
+			os = \"arm-trusted-firmware\";
+			compression = \"none\";
+			load = <"${ATF_LOAD_ADDR}">;
+			hash {
+				algo = \"sha256\";
+			};
+		};"
+		fi
+
+		if [ ${NUM} -gt 1 ]; then
+			LOADABLE_ATF=${LOADABLE_ATF}", \"atf@${NUM}\""
+		fi
+		NUM=`expr ${NUM} + 1`
+	done
+}
+
+function generate_bl32_node()
+{
+	if [ -z ${TEE_LOAD_ADDR} ]; then
+		return
+	fi
+
+	echo "		optee {
+			description = \"OP-TEE\";
+			data = /incbin/(\"./tee.bin${SUFFIX}\");
+			type = \"firmware\";
+			arch = \"arm64\";
+			os = \"op-tee\";
+			compression = \"${COMPRESSION}\";
+			load = <"0x${TEE_LOAD_ADDR}">;
+			hash {
+				algo = \"sha256\";
+			};"
+	if [ "${COMPRESSION}" == "gzip" ]; then
+		echo "			digest {
+				value = /incbin/(\"./tee.bin.digest\");
+				algo = \"sha256\";
+			};"
+		openssl dgst -sha256 -binary -out tee.bin.digest tee.bin
+		gzip -k -f -9 tee.bin
+	fi
+
+	LOADABLE_OPTEE=", \"optee\""
+	echo "		};"
+}
+########################################################################################################
+
+cat << EOF
+/*
+ * Copyright (C) 2020 Rockchip Electronic Co.,Ltd
+ *
+ * Simple U-boot fit source file containing ATF/OP-TEE/U-Boot/dtb
+ */
+
+/dts-v1/;
+
+/ {
+	description = "FIT Image with ATF/OP-TEE/U-Boot";
+	#address-cells = <1>;
+
+	images {
+EOF
+
+	# generate nodes dynamically
+	generate_uboot_node
+	generate_bl31_node
+	generate_bl32_node
+
+cat << EOF
+		fdt {
+			description = "U-Boot dtb";
+			data = /incbin/("./u-boot.dtb");
+			type = "flat_dt";
+			compression = "none";
+			hash {
+				algo = "sha256";
+			};
+		};
+	};
+
+	configurations {
+		default = "conf";
+		conf {
+			description = "Rockchip armv8 with ATF";
+			rollback-index = <0x0>;
+			firmware = "atf@1";
+			loadables = "uboot"${LOADABLE_ATF}${LOADABLE_OPTEE};
+			fdt = "fdt";
+			signature {
+				algo = "sha256,rsa2048";
+				padding = "pss";
+				key-name-hint = "dev";
+				sign-images = "fdt", "firmware", "loadables";
+			};
+		};
+	};
+};
+EOF

commit 9e84e21cf425a2b65f13618758c50ce73c0db925
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Oct 16 16:00:28 2020 +0800

    configs: rv1126: use make_fit_optee.sh as fit generator
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I31237cbcefcd62a0abbe7a549f46ad41f646ac55

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh b/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh
deleted file mode 100755
index a24ab7f137..0000000000
--- a/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh
+++ /dev/null
@@ -1,152 +0,0 @@
-#!/bin/bash
-#
-# Copyright (C) 2020 Rockchip Electronics Co., Ltd
-#
-# SPDX-License-Identifier:     GPL-2.0+
-#
-
-# Process args and auto set variables
-source ./${srctree}/arch/arm/mach-rockchip/make_fit_args.sh
-
-rm -f ${srctree}/*.digest ${srctree}/*.bin.gz
-
-if [ "${COMPRESSION}" == "gzip" ]; then
-	SUFFIX=".gz"
-else
-	COMPRESSION="none"
-	SUFFIX=
-fi
-
-# digest
-if [ "${COMPRESSION}" == "gzip" ]; then
-	openssl dgst -sha256 -binary -out ${srctree}/u-boot-nodtb.digest ${srctree}/u-boot-nodtb.bin
-	openssl dgst -sha256 -binary -out ${srctree}/tee.digest ${srctree}/tee.bin
-	gzip -k -f -9 ${srctree}/tee.bin
-	UBOOT_SZ=`ls -l u-boot-nodtb.bin | awk '{ print $5 }'`
-	if [ ${UBOOT_SZ} -gt 0 ]; then
-		gzip -k -f -9 ${srctree}/u-boot-nodtb.bin
-	else
-		touch ${srctree}/u-boot-nodtb.bin.gz
-	fi
-	if [ ! -z "${MCU_LOAD_ADDR}" ]; then
-		openssl dgst -sha256 -binary -out ${srctree}/mcu.digest ${srctree}/mcu.bin
-		gzip -k -f -9 ${srctree}/mcu.bin
-	fi
-
-	UBOOT_DIGEST="			digest {
-				value = /incbin/(\"./u-boot-nodtb.digest\");
-				algo = \"sha256\";
-			};"
-	TEE_DIGEST="			digest {
-				value = /incbin/(\"./tee.digest\");
-				algo = \"sha256\";
-			};"
-	MCU_DIGEST="			digest {
-				value = /incbin/(\"./mcu.digest\");
-				algo = \"sha256\";
-			};"
-fi
-
-# mcu
-if [ ! -z "${MCU_LOAD_ADDR}" ]; then
-	MCU_NODE="		mcu {
-			description = \"mcu\";
-			type = \"standalone\";
-			arch = \"riscv\";
-			data = /incbin/(\"./mcu.bin${SUFFIX}\");
-			compression = \"${COMPRESSION}\";
-			load = <0x"${MCU_LOAD_ADDR}">;
-			hash {
-				algo = \"sha256\";
-			};
-${MCU_DIGEST}
-		};"
-	MCU_STANDALONE="			standalone = \"mcu\";"
-	SIGN_IMAGES="			        sign-images = \"fdt\", \"firmware\", \"loadables\", \"standalone\";"
-else
-	SIGN_IMAGES="			        sign-images = \"fdt\", \"firmware\", \"loadables\";"
-fi
-########################################################################################################
-
-cat << EOF
-/*
- * Copyright (C) 2020 Rockchip Electronic Co.,Ltd
- *
- * Simple U-boot fit source file containing U-Boot, dtb and optee
- */
-
-/dts-v1/;
-
-/ {
-	description = "FIT Image with U-Boot/OP-TEE/MCU";
-	#address-cells = <1>;
-
-	images {
-		uboot {
-			description = "U-Boot (32-bit)";
-			data = /incbin/("./u-boot-nodtb.bin${SUFFIX}");
-			type = "standalone";
-			arch = "arm";
-			os = "U-Boot";
-			compression = "${COMPRESSION}";
-			load = <${UBOOT_LOAD_ADDR}>;
-			hash {
-				algo = "sha256";
-			};
-EOF
-echo "${UBOOT_DIGEST}"
-cat << EOF
-		};
-		optee {
-			description = "OP-TEE";
-			data = /incbin/("./tee.bin${SUFFIX}");
-			type = "firmware";
-			arch = "arm";
-			os = "op-tee";
-			compression = "${COMPRESSION}";
-			load = <0x${TEE_LOAD_ADDR}>;
-			entry = <0x${TEE_LOAD_ADDR}>;
-			hash {
-				algo = "sha256";
-			};
-EOF
-echo "${TEE_DIGEST}"
-cat << EOF
-		};
-		fdt {
-			description = "U-Boot dtb";
-			data = /incbin/("./u-boot.dtb");
-			type = "flat_dt";
-			compression = "none";
-			hash {
-				algo = "sha256";
-			};
-		};
-EOF
-echo "${MCU_NODE}"
-cat  << EOF
-	};
-
-	configurations {
-		default = "conf";
-		conf {
-			description = "Rockchip armv7 with OP-TEE";
-			rollback-index = <0x0>;
-			firmware = "optee";
-			loadables = "uboot";
-			fdt = "fdt";
-EOF
-echo "${MCU_STANDALONE}"
-cat  << EOF
-			signature {
-				algo = "sha256,rsa2048";
-				padding = "pss";
-				key-name-hint = "dev";
-EOF
-echo "${SIGN_IMAGES}"
-cat  << EOF
-			};
-		};
-	};
-};
-EOF
diff --git a/configs/rv1126-spi-nor-tiny_defconfig b/configs/rv1126-spi-nor-tiny_defconfig
index 8ad911b85c..97307d2e23 100644
--- a/configs/rv1126-spi-nor-tiny_defconfig
+++ b/configs/rv1126-spi-nor-tiny_defconfig
@@ -3,7 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x80000
-CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh"
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
 CONFIG_ROCKCHIP_RV1126=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 # CONFIG_SPL_MMC_SUPPORT is not set
diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index 0d717ea70a..93153cc009 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -3,7 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x80000
-CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh"
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
 CONFIG_ROCKCHIP_RV1126=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_ROCKCHIP_FIT_IMAGE=y

commit 65a17145ae17eb7de56005806c2923939bde58fb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Oct 16 15:59:45 2020 +0800

    rockchip: make_fit_optee.sh: sync from rv1126_make_fit.sh
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Iaa3dc834b9e49e025d9feed1c03965ef2f1a4f35

diff --git a/arch/arm/mach-rockchip/make_fit_optee.sh b/arch/arm/mach-rockchip/make_fit_optee.sh
index e4f5eee2b2..a24ab7f137 100755
--- a/arch/arm/mach-rockchip/make_fit_optee.sh
+++ b/arch/arm/mach-rockchip/make_fit_optee.sh
@@ -1,8 +1,76 @@
 #!/bin/bash
+#
+# Copyright (C) 2020 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+# Process args and auto set variables
+source ./${srctree}/arch/arm/mach-rockchip/make_fit_args.sh
+
+rm -f ${srctree}/*.digest ${srctree}/*.bin.gz
+
+if [ "${COMPRESSION}" == "gzip" ]; then
+	SUFFIX=".gz"
+else
+	COMPRESSION="none"
+	SUFFIX=
+fi
+
+# digest
+if [ "${COMPRESSION}" == "gzip" ]; then
+	openssl dgst -sha256 -binary -out ${srctree}/u-boot-nodtb.digest ${srctree}/u-boot-nodtb.bin
+	openssl dgst -sha256 -binary -out ${srctree}/tee.digest ${srctree}/tee.bin
+	gzip -k -f -9 ${srctree}/tee.bin
+	UBOOT_SZ=`ls -l u-boot-nodtb.bin | awk '{ print $5 }'`
+	if [ ${UBOOT_SZ} -gt 0 ]; then
+		gzip -k -f -9 ${srctree}/u-boot-nodtb.bin
+	else
+		touch ${srctree}/u-boot-nodtb.bin.gz
+	fi
+	if [ ! -z "${MCU_LOAD_ADDR}" ]; then
+		openssl dgst -sha256 -binary -out ${srctree}/mcu.digest ${srctree}/mcu.bin
+		gzip -k -f -9 ${srctree}/mcu.bin
+	fi
+
+	UBOOT_DIGEST="			digest {
+				value = /incbin/(\"./u-boot-nodtb.digest\");
+				algo = \"sha256\";
+			};"
+	TEE_DIGEST="			digest {
+				value = /incbin/(\"./tee.digest\");
+				algo = \"sha256\";
+			};"
+	MCU_DIGEST="			digest {
+				value = /incbin/(\"./mcu.digest\");
+				algo = \"sha256\";
+			};"
+fi
+
+# mcu
+if [ ! -z "${MCU_LOAD_ADDR}" ]; then
+	MCU_NODE="		mcu {
+			description = \"mcu\";
+			type = \"standalone\";
+			arch = \"riscv\";
+			data = /incbin/(\"./mcu.bin${SUFFIX}\");
+			compression = \"${COMPRESSION}\";
+			load = <0x"${MCU_LOAD_ADDR}">;
+			hash {
+				algo = \"sha256\";
+			};
+${MCU_DIGEST}
+		};"
+	MCU_STANDALONE="			standalone = \"mcu\";"
+	SIGN_IMAGES="			        sign-images = \"fdt\", \"firmware\", \"loadables\", \"standalone\";"
+else
+	SIGN_IMAGES="			        sign-images = \"fdt\", \"firmware\", \"loadables\";"
+fi
+########################################################################################################
 
 cat << EOF
 /*
- * Copyright (C) 2017 Rockchip Electronic Co.,Ltd
+ * Copyright (C) 2020 Rockchip Electronic Co.,Ltd
  *
  * Simple U-boot fit source file containing U-Boot, dtb and optee
  */
@@ -10,77 +78,73 @@ cat << EOF
 /dts-v1/;
 
 / {
-	description = "Simple image with OP-TEE support";
+	description = "FIT Image with U-Boot/OP-TEE/MCU";
 	#address-cells = <1>;
 
 	images {
-		uboot@1 {
-			description = "U-Boot";
-			image = "u-boot-nodtb.bin";
-			data = /incbin/("./u-boot-nodtb.bin");
+		uboot {
+			description = "U-Boot (32-bit)";
+			data = /incbin/("./u-boot-nodtb.bin${SUFFIX}");
 			type = "standalone";
-			os = "U-Boot";
 			arch = "arm";
-			compression = "none";
-EOF
-
-OUTDIR=$PWD
-DARM_BASE=`sed -n "/CONFIG_SYS_SDRAM_BASE=/s/CONFIG_SYS_SDRAM_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
-UBOOT_BASE=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
-echo "			load = <"$UBOOT_BASE">;"
-cat << EOF
-			hash@1 {
+			os = "U-Boot";
+			compression = "${COMPRESSION}";
+			load = <${UBOOT_LOAD_ADDR}>;
+			hash {
 				algo = "sha256";
 			};
+EOF
+echo "${UBOOT_DIGEST}"
+cat << EOF
 		};
-		optee@1 {
+		optee {
 			description = "OP-TEE";
-			image = "tee.bin";
-			data = /incbin/("./tee.bin");
+			data = /incbin/("./tee.bin${SUFFIX}");
 			type = "firmware";
 			arch = "arm";
 			os = "op-tee";
-			compression = "none";
-EOF
-
-if [ -z "$1" -o ! -z "$(echo $1 | sed 's/[x, X, 0-9, a-f, A-F]//g')" ]; then
-	TEE_OFFSET=0x8400000
-else
-	TEE_OFFSET=$1
-fi
-TEE_LOAD_ADDR=$((DARM_BASE+TEE_OFFSET))
-TEE_LOAD_ADDR=$(echo "obase=16;${TEE_LOAD_ADDR}"|bc)
-echo "			load = <0x"$TEE_LOAD_ADDR">;"
-echo "			entry = <0x"$TEE_LOAD_ADDR">;"
-cat << EOF
-			hash@1 {
+			compression = "${COMPRESSION}";
+			load = <0x${TEE_LOAD_ADDR}>;
+			entry = <0x${TEE_LOAD_ADDR}>;
+			hash {
 				algo = "sha256";
 			};
+EOF
+echo "${TEE_DIGEST}"
+cat << EOF
 		};
-		fdt@1 {
+		fdt {
 			description = "U-Boot dtb";
-			image = "u-boot.dtb";
 			data = /incbin/("./u-boot.dtb");
 			type = "flat_dt";
 			compression = "none";
-			hash@1 {
+			hash {
 				algo = "sha256";
 			};
 		};
+EOF
+echo "${MCU_NODE}"
+cat  << EOF
 	};
 
 	configurations {
-		default = "conf@1";
-		conf@1 {
+		default = "conf";
+		conf {
 			description = "Rockchip armv7 with OP-TEE";
 			rollback-index = <0x0>;
-			firmware = "optee@1";
-			loadables = "uboot@1";
-			fdt = "fdt@1";
-			signature@1 {
+			firmware = "optee";
+			loadables = "uboot";
+			fdt = "fdt";
+EOF
+echo "${MCU_STANDALONE}"
+cat  << EOF
+			signature {
 				algo = "sha256,rsa2048";
+				padding = "pss";
 				key-name-hint = "dev";
-				sign-images = "fdt", "firmware", "loadables";
+EOF
+echo "${SIGN_IMAGES}"
+cat  << EOF
 			};
 		};
 	};

commit c45a6d11b548e5a9c59ffa944dbe969ece3a1d3c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Oct 16 15:55:06 2020 +0800

    rockchip: rv1126: fit: clean coding style
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ibfba9e70d3d5bcae8bd6850ab546edc736f56ba4

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh b/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh
index e343105ac1..a24ab7f137 100755
--- a/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh
+++ b/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh
@@ -8,10 +8,16 @@
 # Process args and auto set variables
 source ./${srctree}/arch/arm/mach-rockchip/make_fit_args.sh
 
-# compression
-rm -f ${srctree}/mcu.digest ${srctree}/u-boot-nodtb.digest ${srctree}/tee.digest
-rm -f ${srctree}/u-boot-nodtb.bin.gz ${srctree}/tee.bin.gz ${srctree}/mcu.bin.gz
+rm -f ${srctree}/*.digest ${srctree}/*.bin.gz
 
+if [ "${COMPRESSION}" == "gzip" ]; then
+	SUFFIX=".gz"
+else
+	COMPRESSION="none"
+	SUFFIX=
+fi
+
+# digest
 if [ "${COMPRESSION}" == "gzip" ]; then
 	openssl dgst -sha256 -binary -out ${srctree}/u-boot-nodtb.digest ${srctree}/u-boot-nodtb.bin
 	openssl dgst -sha256 -binary -out ${srctree}/tee.digest ${srctree}/tee.bin
@@ -27,35 +33,15 @@ if [ "${COMPRESSION}" == "gzip" ]; then
 		gzip -k -f -9 ${srctree}/mcu.bin
 	fi
 
-	SUFFIX=".gz"
-else
-	COMPRESSION="none"
-	SUFFIX=
-fi
-
-# u-boot and tee
-UBOOT_BODY="			data = /incbin/(\"./u-boot-nodtb.bin${SUFFIX}\");
-			compression = \"${COMPRESSION}\";
-			load = <"${UBOOT_LOAD_ADDR}">;"
-
-TEE_BODY="			data = /incbin/(\"./tee.bin${SUFFIX}\");
-			compression = \"${COMPRESSION}\";
-			load = <0x"${TEE_LOAD_ADDR}">;
-			entry = <0x"${TEE_LOAD_ADDR}">;"
-
-# digest
-if [ "${COMPRESSION}" != "none" ]; then
-UBOOT_DIGEST="			digest {
+	UBOOT_DIGEST="			digest {
 				value = /incbin/(\"./u-boot-nodtb.digest\");
 				algo = \"sha256\";
 			};"
-
-TEE_DIGEST="			digest {
+	TEE_DIGEST="			digest {
 				value = /incbin/(\"./tee.digest\");
 				algo = \"sha256\";
 			};"
-
-MCU_DIGEST="			digest {
+	MCU_DIGEST="			digest {
 				value = /incbin/(\"./mcu.digest\");
 				algo = \"sha256\";
 			};"
@@ -63,7 +49,7 @@ fi
 
 # mcu
 if [ ! -z "${MCU_LOAD_ADDR}" ]; then
-MCU_BODY="		mcu {
+	MCU_NODE="		mcu {
 			description = \"mcu\";
 			type = \"standalone\";
 			arch = \"riscv\";
@@ -75,17 +61,11 @@ MCU_BODY="		mcu {
 			};
 ${MCU_DIGEST}
 		};"
-
-MCU_STANDALONE="			standalone = \"mcu\";"
-fi
-
-# /configurations/conf
-if [ ! -z "${MCU_LOAD_ADDR}" ]; then
-SIGN_IMAGES="			        sign-images = \"fdt\", \"firmware\", \"loadables\", \"standalone\";"
+	MCU_STANDALONE="			standalone = \"mcu\";"
+	SIGN_IMAGES="			        sign-images = \"fdt\", \"firmware\", \"loadables\", \"standalone\";"
 else
-SIGN_IMAGES="			        sign-images = \"fdt\", \"firmware\", \"loadables\";"
+	SIGN_IMAGES="			        sign-images = \"fdt\", \"firmware\", \"loadables\";"
 fi
-
 ########################################################################################################
 
 cat << EOF
@@ -103,30 +83,35 @@ cat << EOF
 
 	images {
 		uboot {
-			description = "U-Boot";
+			description = "U-Boot (32-bit)";
+			data = /incbin/("./u-boot-nodtb.bin${SUFFIX}");
 			type = "standalone";
-			os = "U-Boot";
 			arch = "arm";
-EOF
-echo "${UBOOT_BODY}"
-echo "${UBOOT_DIGEST}"
-cat << EOF
+			os = "U-Boot";
+			compression = "${COMPRESSION}";
+			load = <${UBOOT_LOAD_ADDR}>;
 			hash {
 				algo = "sha256";
 			};
+EOF
+echo "${UBOOT_DIGEST}"
+cat << EOF
 		};
 		optee {
 			description = "OP-TEE";
+			data = /incbin/("./tee.bin${SUFFIX}");
 			type = "firmware";
 			arch = "arm";
 			os = "op-tee";
-EOF
-echo "${TEE_BODY}"
-echo "${TEE_DIGEST}"
-cat << EOF
+			compression = "${COMPRESSION}";
+			load = <0x${TEE_LOAD_ADDR}>;
+			entry = <0x${TEE_LOAD_ADDR}>;
 			hash {
 				algo = "sha256";
 			};
+EOF
+echo "${TEE_DIGEST}"
+cat << EOF
 		};
 		fdt {
 			description = "U-Boot dtb";
@@ -138,14 +123,14 @@ cat << EOF
 			};
 		};
 EOF
-echo "${MCU_BODY}"
+echo "${MCU_NODE}"
 cat  << EOF
 	};
 
 	configurations {
 		default = "conf";
 		conf {
-			description = "RV1126 U-Boot FIT";
+			description = "Rockchip armv7 with OP-TEE";
 			rollback-index = <0x0>;
 			firmware = "optee";
 			loadables = "uboot";

commit a9c93f9d80a088359d8c2b7da7b3b15fa10d8243
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Oct 16 16:01:40 2020 +0800

    rockchip: make_fit_args: support make u-boot.itb command
    
    The command pass board dtb as arg1.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ie96ad09665698904978caca82ec38843930ed09e

diff --git a/arch/arm/mach-rockchip/make_fit_args.sh b/arch/arm/mach-rockchip/make_fit_args.sh
index d52efff84e..7712d6e21b 100755
--- a/arch/arm/mach-rockchip/make_fit_args.sh
+++ b/arch/arm/mach-rockchip/make_fit_args.sh
@@ -23,48 +23,44 @@ function help()
 	echo "    -c [comp]     ==>   <string>   COMPRESSION           set compression: \"none\", \"gzip\""
 	echo "    -m [offset]   ==>   <hex>      MCU_LOAD_ADDR         set mcu.bin offset address"
 	echo "    -t [offset]   ==>   <hex>      TEE_LOAD_ADDR         set tee.bin offset address"
-	echo "    -u            ==>   -          UBOOT_LOAD_ADDR       auto get CONFIG_SYS_TEXT_BASE address"
 	echo
 }
 
-if [ -z $1 ]; then
-	help
-	exit
+if [ $# -eq 1 ]; then
+	# default
+	TEE_OFFSET=0x08400000
+else
+	# args
+	while [ $# -gt 0 ]; do
+		case $1 in
+			--help|-help|help|--h|-h)
+				help
+				exit
+				;;
+			-c)
+				COMPRESSION=$2
+				shift 2
+				;;
+			-m)
+				MCU_OFFSET=$2
+				shift 2
+				;;
+			-t)
+				TEE_OFFSET=$2
+				shift 2
+				;;
+			*)
+				echo "Invalid arg: $1"
+				help
+				exit 1
+				;;
+		esac
+	done
 fi
 
-# args
-while [ $# -gt 0 ]; do
-	case $1 in
-		--help|-help|help|--h|-h)
-			help
-			exit
-			;;
-		-c)
-			COMPRESSION=$2
-			shift 2
-			;;
-		-m)
-			MCU_OFFSET=$2
-			shift 2
-			;;
-		-t)
-			TEE_OFFSET=$2
-			shift 2
-			;;
-		-u)
-			UBOOT_LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${srctree}/include/autoconf.mk|tr -d '\r'`
-			shift 1
-			;;
-		*)
-			echo "Invalid arg: $1"
-			help
-			exit 1
-			;;
-	esac
-done
-
 # Base
 DARM_BASE=`sed -n "/CONFIG_SYS_SDRAM_BASE=/s/CONFIG_SYS_SDRAM_BASE=//p" ${srctree}/include/autoconf.mk|tr -d '\r'`
+UBOOT_LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${srctree}/include/autoconf.mk|tr -d '\r'`
 
 # tee
 if [ ! -z "${TEE_OFFSET}" ]; then
diff --git a/make.sh b/make.sh
index 6982e711aa..413eb4dc2f 100755
--- a/make.sh
+++ b/make.sh
@@ -634,9 +634,9 @@ function pack_uboot_itb_image()
 		else
 			SPL_FIT_GENERATOR=`sed -n "/CONFIG_SPL_FIT_GENERATOR=/s/CONFIG_SPL_FIT_GENERATOR=//p" .config | tr -d '""'`
 			if [ ! -z ${MCU_OFFSET} ]; then
-				${SPL_FIT_GENERATOR} -u -t ${TEE_OFFSET} -c ${COMPRESSION} -m ${MCU_OFFSET} > u-boot.its
+				${SPL_FIT_GENERATOR} -t ${TEE_OFFSET} -c ${COMPRESSION} -m ${MCU_OFFSET} > u-boot.its
 			else
-				${SPL_FIT_GENERATOR} -u -t ${TEE_OFFSET} -c ${COMPRESSION} > u-boot.its
+				${SPL_FIT_GENERATOR} -t ${TEE_OFFSET} -c ${COMPRESSION} > u-boot.its
 			fi
 		fi
 

commit 45dfd9925e2c37c5535320c9e467c9d176f4a087
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Oct 16 15:51:51 2020 +0800

    rockchip: make_fit_atf.py: remove '@1' of nodes
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I9a398826213dd66df58aeac985146997e085f7d1

diff --git a/arch/arm/mach-rockchip/make_fit_atf.py b/arch/arm/mach-rockchip/make_fit_atf.py
index 609c706909..27b6ef7597 100755
--- a/arch/arm/mach-rockchip/make_fit_atf.py
+++ b/arch/arm/mach-rockchip/make_fit_atf.py
@@ -37,7 +37,7 @@ DT_HEADER="""/*
 	#address-cells = <1>;
 
 	images {
-		uboot@1 {
+		uboot {
 			description = "U-Boot (64-bit)";
 			data = /incbin/("u-boot-nodtb.bin");
 			type = "standalone";
@@ -45,14 +45,14 @@ DT_HEADER="""/*
 			arch = "arm64";
 			compression = "none";
 			load = <0x%08x>;
-			hash@1 {
+			hash {
 				algo = "sha256";
 			};
 		};
 """
 
 DT_IMAGES_NODE_END="""
-    };
+	};
 """
 
 DT_END="""
@@ -74,7 +74,7 @@ def append_atf_node(file, atf_index, phy_addr):
     print >> file, '\t\t\tload = <0x%08x>;' % phy_addr
     if atf_index == 1:
         print >> file, '\t\t\tentry = <0x%08x>;' % phy_addr
-    print >> file, '\t\t\thash@1 {'
+    print >> file, '\t\t\thash {'
     print >> file, '\t\t\t\talgo = "sha256";'
     print >> file, '\t\t\t};'
     print >> file, '\t\t};'
@@ -87,13 +87,13 @@ def append_fdt_node(file, dtbs):
     cnt = 1
     for dtb in dtbs:
         dtname = os.path.basename(dtb)
-        print >> file, '\t\tfdt@%d {' % cnt
+        print >> file, '\t\tfdt {'
         print >> file, '\t\t\tdescription = "U-Boot device tree blob";'
         print >> file, '\t\t\tdata = /incbin/("u-boot.dtb");'
         print >> file, '\t\t\ttype = "flat_dt";'
         print >> file, '\t\t\tarch = "arm64";'
         print >> file, '\t\t\tcompression = "none";'
-        print >> file, '\t\t\thash@1 {'
+        print >> file, '\t\t\thash {'
         print >> file, '\t\t\t\talgo = "sha256";'
         print >> file, '\t\t\t};'
         print >> file, '\t\t};'
@@ -101,20 +101,21 @@ def append_fdt_node(file, dtbs):
         cnt = cnt + 1
 
 def append_conf_section(file, cnt, dtname, atf_cnt):
-    print >> file, '\t\tconfig@%d {' % cnt
+    print >> file, '\t\tconfig {'
     print >> file, '\t\t\tdescription = "Rockchip armv8 with ATF";'
     print >> file, '\t\t\trollback-index = <0x0>;'
     print >> file, '\t\t\tfirmware = "atf@1";'
-    print >> file, '\t\t\tloadables = "uboot@1",',
+    print >> file, '\t\t\tloadables = "uboot",',
     for i in range(1, atf_cnt):
         print >> file, '"atf@%d"' % (i+1),
         if i != (atf_cnt - 1):
             print >> file, ',',
         else:
             print >> file, ';'
-    print >> file, '\t\t\tfdt = "fdt@1";'
-    print >> file, '\t\t\tsignature@1 {'
+    print >> file, '\t\t\tfdt = "fdt";'
+    print >> file, '\t\t\tsignature {'
     print >> file, '\t\t\t\talgo = "sha256,rsa2048";'
+    print >> file, '\t\t\t\tpadding = "pss";'
     print >> file, '\t\t\t\tkey-name-hint = "dev";'
     print >> file, '\t\t\t\tsign-images = "fdt", "firmware", "loadables";'
     print >> file, '\t\t\t};'
@@ -127,7 +128,7 @@ def append_conf_node(file, dtbs, atf_cnt):
     """
     cnt = 1
     print >> file, '\tconfigurations {'
-    print >> file, '\t\tdefault = "config@1";'
+    print >> file, '\t\tdefault = "config";'
     for dtb in dtbs:
         dtname = os.path.basename(dtb)
         append_conf_section(file, cnt, dtname, atf_cnt)

commit 6524556d8da93325a63b5fc9335f7ffeecf79d52
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Thu Oct 15 19:54:08 2020 +0800

    mtd: mtd_blk: Fix the way to get Nand mtd_info
    
    Change-Id: I6e47180db41242a92ac74083d5984bcb06d92e9c
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index 8f2f073968..8c77fa7989 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -15,6 +15,9 @@
 #include <spi.h>
 #include <dm/device-internal.h>
 #include <linux/mtd/spi-nor.h>
+#ifdef CONFIG_NAND
+#include <linux/mtd/nand.h>
+#endif
 
 #define MTD_PART_NAND_HEAD		"mtdparts="
 #define MTD_ROOT_PART_NUM		"ubi.mtd="
@@ -38,14 +41,13 @@ int mtd_blk_map_table_init(struct blk_desc *desc,
 	if (!desc)
 		return -ENODEV;
 
-	if (desc->devnum == BLK_MTD_NAND) {
-#if defined(CONFIG_NAND)
-		mtd = dev_get_priv(desc->bdev->parent);
-#endif
-	} else if (desc->devnum == BLK_MTD_SPI_NAND) {
-#if defined(CONFIG_MTD_SPI_NAND)
+	switch (desc->devnum) {
+	case BLK_MTD_NAND:
+	case BLK_MTD_SPI_NAND:
 		mtd = desc->bdev->priv;
-#endif
+		break;
+	default:
+		break;
 	}
 
 	if (!mtd) {
@@ -54,6 +56,8 @@ int mtd_blk_map_table_init(struct blk_desc *desc,
 		blk_total = (mtd->size + mtd->erasesize - 1) >> mtd->erasesize_shift;
 		if (!mtd_map_blk_table) {
 			mtd_map_blk_table = (int *)malloc(blk_total * sizeof(int));
+			if (!mtd_map_blk_table)
+				return -ENOMEM;
 			for (i = 0; i < blk_total; i++)
 				mtd_map_blk_table[i] = MTD_BLK_TABLE_BLOCK_UNKNOWN;
 		}
@@ -374,19 +378,9 @@ ulong mtd_dread(struct udevice *udev, lbaint_t start,
 	pr_debug("mtd dread %s %lx %lx\n", mtd->name, start, blkcnt);
 
 	if (desc->devnum == BLK_MTD_NAND) {
-#if defined(CONFIG_NAND) && !defined(CONFIG_SPL_BUILD)
-		mtd = dev_get_priv(udev->parent);
-		if (!mtd)
-			return 0;
-
-		ret = nand_read_skip_bad(mtd, off, &rwsize,
-					 NULL, mtd->size,
-					 (u_char *)(dst));
-#else
 		ret = mtd_map_read(mtd, off, &rwsize,
 				   NULL, mtd->size,
 				   (u_char *)(dst));
-#endif
 		if (!ret)
 			return blkcnt;
 		else
@@ -507,22 +501,34 @@ ulong mtd_derase(struct udevice *udev, lbaint_t start,
 
 static int mtd_blk_probe(struct udevice *udev)
 {
-	struct mtd_info *mtd = dev_get_uclass_priv(udev->parent);
+	struct mtd_info *mtd;
 	struct blk_desc *desc = dev_get_uclass_platdata(udev);
-	int ret, i;
+	int ret, i = 0;
+
+	mtd = dev_get_uclass_priv(udev->parent);
+	if (mtd->type == MTD_NANDFLASH && desc->devnum == BLK_MTD_NAND) {
+#ifndef CONFIG_SPL_BUILD
+		mtd = dev_get_priv(udev->parent);
+#endif
+	}
 
 	desc->bdev->priv = mtd;
 	sprintf(desc->vendor, "0x%.4x", 0x2207);
 	memcpy(desc->product, mtd->name, strlen(mtd->name));
 	memcpy(desc->revision, "V1.00", sizeof("V1.00"));
 	if (mtd->type == MTD_NANDFLASH) {
+#ifdef CONFIG_NAND
 		if (desc->devnum == BLK_MTD_NAND)
-			mtd = dev_get_priv(udev->parent);
+			i = NAND_BBT_SCAN_MAXBLOCKS;
+		else if (desc->devnum == BLK_MTD_SPI_NAND)
+			i = NANDDEV_BBT_SCAN_MAXBLOCKS;
+#endif
+
 		/*
 		 * Find the first useful block in the end,
 		 * and it is the end lba of the nand storage.
 		 */
-		for (i = 0; i < (mtd->size / mtd->erasesize); i++) {
+		for (; i < (mtd->size / mtd->erasesize); i++) {
 			ret =  mtd_block_isbad(mtd,
 					       mtd->size - mtd->erasesize * (i + 1));
 			if (!ret) {

commit 6f8d5ecc096aabe23f5a91e832e62c2f37158a23
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Thu Oct 15 18:11:18 2020 +0800

    spl: nand: add mtd erase size config for mtd blk
    
    The mtd blk need mtd erase size to check bad block.x
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: If1bca0ce442599be41f3fd12638529018885f3e0
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/raw/rockchip_nand_spl.c b/drivers/mtd/nand/raw/rockchip_nand_spl.c
index a1e2c26e64..5e1f300df2 100644
--- a/drivers/mtd/nand/raw/rockchip_nand_spl.c
+++ b/drivers/mtd/nand/raw/rockchip_nand_spl.c
@@ -85,7 +85,10 @@ struct rk_nand {
 	struct mtd_info *mtd;
 };
 
-struct rk_nand *g_rk_nand;
+static struct rk_nand *g_rk_nand;
+static u32 nand_page_size;
+static u32 nand_page_num;
+static u32 nand_block_num;
 
 static void nandc_init(struct rk_nand *rknand)
 {
@@ -176,7 +179,7 @@ static int nandc_read_page(unsigned int page, uint8_t *buf)
 	unsigned int max_bitflips = 0;
 	int ret, step, bch_st, ecc_step;
 
-	ecc_step = CONFIG_SYS_NAND_PAGE_SIZE / 1024;
+	ecc_step = nand_page_size / 1024;
 	rockchip_nand_select_chip(g_rk_nand->regs, 0);
 	rockchip_nand_read_page(g_rk_nand->regs, page, 0);
 	rockchip_nand_wait_dev_ready(g_rk_nand->regs);
@@ -220,8 +223,7 @@ static int is_badblock(unsigned int page)
 
 	if (nandc_read_page(page, g_rk_nand->databuf) == -1) {
 		rockchip_nand_select_chip(regs, 0);
-		rockchip_nand_read_page(regs, page,
-					CONFIG_SYS_NAND_PAGE_SIZE);
+		rockchip_nand_read_page(regs, page, nand_page_size);
 		rockchip_nand_wait_dev_ready(regs);
 		for (i = 0; i < 8; i++) {
 			bad = readb(bank_base);
@@ -263,7 +265,7 @@ static const struct udevice_id rockchip_nandc_ids[] = {
 
 static int spl_nand_block_isbad(struct mtd_info *mtd, loff_t ofs)
 {
-	return is_badblock(ofs / CONFIG_SYS_NAND_PAGE_SIZE);
+	return is_badblock((u32)ofs / nand_page_size);
 }
 
 static int spl_nand_read_page(struct mtd_info *mtd, loff_t from, size_t len,
@@ -271,20 +273,19 @@ static int spl_nand_read_page(struct mtd_info *mtd, loff_t from, size_t len,
 {
 	int read_size, offset, read_len;
 	unsigned int page;
-	unsigned int max_pages = CONFIG_SYS_NAND_SIZE /
-				CONFIG_SYS_NAND_PAGE_SIZE;
+	unsigned int max_pages = nand_page_num * nand_block_num;
 
 	/* Convert to page number */
-	page = from / CONFIG_SYS_NAND_PAGE_SIZE;
-	offset = from & (CONFIG_SYS_NAND_PAGE_SIZE - 1);
+	page = (u32)from / nand_page_size;
+	offset = from & (nand_page_size - 1);
 	read_len = len;
 	*retlen = 0;
 
 	while (read_len) {
-		read_size = CONFIG_SYS_NAND_PAGE_SIZE - offset;
+		read_size = nand_page_size - offset;
 		if (read_size > read_len)
 			read_size = read_len;
-		if (offset || read_size < CONFIG_SYS_NAND_PAGE_SIZE) {
+		if (offset || read_size < nand_page_size) {
 			if (nandc_read_page(page, g_rk_nand->databuf) < 0)
 				return -EIO;
 			memcpy(buf, g_rk_nand->databuf + offset, read_size);
@@ -313,6 +314,7 @@ static int rockchip_nandc_probe(struct udevice *dev)
 	fdt_addr_t regs;
 	int ret = -ENODEV;
 	int node;
+	u8 *id;
 
 	g_rk_nand = rknand;
 	rknand->dev = dev;
@@ -340,24 +342,53 @@ static int rockchip_nandc_probe(struct udevice *dev)
 	nandc_init(g_rk_nand);
 	read_flash_id(g_rk_nand, g_rk_nand->id);
 
-	if (g_rk_nand->id[0] == g_rk_nand->id[1])
+	id = g_rk_nand->id;
+	if (id[0] == id[1])
 		return -ENODEV;
 
-	if (g_rk_nand->id[1] == 0xA1 || g_rk_nand->id[1] == 0xF1 ||
-	    g_rk_nand->id[1] == 0xD1 || g_rk_nand->id[1] == 0xAA ||
-	    g_rk_nand->id[1] == 0xDA || g_rk_nand->id[1] == 0xAC ||
-	    g_rk_nand->id[1] == 0xDC || g_rk_nand->id[1] == 0xA3 ||
-	    g_rk_nand->id[1] == 0xD3 || g_rk_nand->id[1] == 0x95 ||
-	    g_rk_nand->id[1] == 0x48) {
+	if (id[1] == 0xA1 || id[1] == 0xF1 ||
+	    id[1] == 0xD1 || id[1] == 0xAA ||
+	    id[1] == 0xDA || id[1] == 0xAC ||
+	    id[1] == 0xDC || id[1] == 0xA3 ||
+	    id[1] == 0xD3 || id[1] == 0x95 ||
+	    id[1] == 0x48) {
+		nand_page_size = 2048;
+		nand_page_num = 64;
+		nand_block_num = 1024;
+		if (id[1] == 0xDC) {
+			if ((id[0] == 0x2C && id[3] == 0xA6) ||
+			    (id[0] == 0xC2 && id[3] == 0xA2)) {
+				nand_page_size = 4096;
+				nand_block_num = 2048;
+			} else if (id[0] == 0x98 && id[3] == 0x26) {
+				nand_page_size = 4096;
+				nand_block_num = 2048;
+			} else {
+				nand_block_num = 4096;
+			}
+		} else if (id[1] == 0xDA) {
+			nand_block_num = 2048;
+		} else if (id[1] == 0x48) {
+			nand_page_size = 4096;
+			nand_page_num = 128;
+			nand_block_num = 4096;
+		} else if (id[1] == 0xD3) {
+			nand_page_size = 4096;
+			nand_block_num = 4096;
+		}
+
 		g_rk_nand->chipnr = 1;
-		g_rk_nand->databuf = kzalloc(CONFIG_SYS_NAND_PAGE_SIZE,
-					     GFP_KERNEL);
+		g_rk_nand->databuf = kzalloc(nand_page_size, GFP_KERNEL);
 		if (!g_rk_nand)
 			return -ENOMEM;
 		mtd->_block_isbad = spl_nand_block_isbad;
 		mtd->_read = spl_nand_read_page;
-		mtd->size = CONFIG_SYS_NAND_SIZE;
-		mtd->writesize = CONFIG_SYS_NAND_PAGE_SIZE;
+		mtd->size = (size_t)nand_page_size * nand_page_num *
+			    nand_block_num;
+		mtd->writesize = nand_page_size;
+		mtd->erasesize = nand_page_size * nand_page_num;
+		mtd->erasesize_shift = ffs(mtd->erasesize) - 1;
+		mtd->erasesize_mask = (1 << mtd->erasesize_shift) - 1;
 		mtd->type = MTD_NANDFLASH;
 		mtd->dev = rknand->dev;
 		mtd->priv = rknand;
@@ -431,6 +462,8 @@ void board_nand_init(void)
 		return;
 
 	initialized = 1;
+	nand_page_size = CONFIG_SYS_NAND_PAGE_SIZE;
+	nand_page_num = CONFIG_SYS_NAND_PAGE_COUNT;
 
 	if (g_rk_nand)
 		return;
@@ -455,7 +488,7 @@ void board_nand_init(void)
 
 	g_rk_nand = kzalloc(sizeof(*g_rk_nand), GFP_KERNEL);
 	g_rk_nand->regs = (void *)regs;
-	g_rk_nand->databuf = kzalloc(CONFIG_SYS_NAND_PAGE_SIZE, GFP_KERNEL);
+	g_rk_nand->databuf = kzalloc(nand_page_size, GFP_KERNEL);
 	nandc_init(g_rk_nand);
 	read_flash_id(g_rk_nand, g_rk_nand->id);
 
@@ -483,25 +516,25 @@ int nand_spl_load_image(u32 offs, u32 size, void *buf)
 	int i;
 	unsigned int page;
 	unsigned int maxpages = CONFIG_SYS_NAND_SIZE /
-				CONFIG_SYS_NAND_PAGE_SIZE;
+				nand_page_size;
 
 	/* Convert to page number */
-	page = offs / CONFIG_SYS_NAND_PAGE_SIZE;
+	page = offs / nand_page_size;
 	i = 0;
 
-	size = roundup(size, CONFIG_SYS_NAND_PAGE_SIZE);
-	while (i < size / CONFIG_SYS_NAND_PAGE_SIZE) {
+	size = roundup(size, nand_page_size);
+	while (i < size / nand_page_size) {
 		/*
 		 * Check if we have crossed a block boundary, and if so
 		 * check for bad block.
 		 */
-		if (!(page % CONFIG_SYS_NAND_PAGE_COUNT)) {
+		if (!(page % nand_page_size)) {
 			/*
 			 * Yes, new block. See if this block is good. If not,
 			 * loop until we find a good block.
 			 */
 			while (is_badblock(page)) {
-				page = page + CONFIG_SYS_NAND_PAGE_COUNT;
+				page = page + nand_page_size;
 				/* Check i we've reached the end of flash. */
 				if (page >= maxpages)
 					return -EIO;
@@ -513,7 +546,7 @@ int nand_spl_load_image(u32 offs, u32 size, void *buf)
 
 		page++;
 		i++;
-		buf = buf + CONFIG_SYS_NAND_PAGE_SIZE;
+		buf = buf + nand_page_size;
 	}
 	return 0;
 }

commit 3ac03e839f717bde5e0faf0290e872fffcfa4861
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Thu Oct 15 16:02:17 2020 +0800

    mtd: spinand: Support FM25S02A
    
    Change-Id: I855a01500977285c4b8eb09ec1c013a4cdb5636e
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/fmsh.c b/drivers/mtd/nand/spi/fmsh.c
index 8dcb9f7847..8ea157bcd7 100644
--- a/drivers/mtd/nand/spi/fmsh.c
+++ b/drivers/mtd/nand/spi/fmsh.c
@@ -63,6 +63,14 @@ static const struct spinand_info fmsh_spinand_table[] = {
 					      &update_cache_variants),
 		     0,
 		     SPINAND_ECCINFO(&fm25s01a_ooblayout, NULL)),
+	SPINAND_INFO("FM25S02A", 0xE5,
+		     NAND_MEMORG(1, 2048, 64, 64, 2048, 1, 1, 1),
+		     NAND_ECCREQ(1, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     0,
+		     SPINAND_ECCINFO(&fm25s01a_ooblayout, NULL)),
 };
 
 /**

commit ea89190d3a7cd90abad7387552a9f19c42912fdf
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue Oct 13 19:30:05 2020 +0800

    rockchip: vendor: Deinit bootdev_type if initial process fail
    
    Change-Id: I1da43b5e576bfc3410c30794986975f2cb0ee092
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/vendor.c b/arch/arm/mach-rockchip/vendor.c
index d6703fb9b4..156f19a902 100644
--- a/arch/arm/mach-rockchip/vendor.c
+++ b/arch/arm/mach-rockchip/vendor.c
@@ -473,7 +473,8 @@ int vendor_storage_init(void)
 	buffer = (u8 *)malloc(size);
 	if (!buffer) {
 		printf("[Vendor ERROR]:Malloc failed!\n");
-		return -ENOMEM;
+		ret = -ENOMEM;
+		goto out;
 	}
 	/* Pointer initialization */
 	vendor_info.hdr = (struct vendor_hdr *)buffer;
@@ -483,8 +484,10 @@ int vendor_storage_init(void)
 	vendor_info.version2 = (u32 *)(buffer + version2_offset);
 
 #ifdef CONFIG_MTD_BLK
-	if (dev_desc->if_type == IF_TYPE_MTD)
-		return mtd_vendor_storage_init(dev_desc);
+	if (dev_desc->if_type == IF_TYPE_MTD) {
+		ret = mtd_vendor_storage_init(dev_desc);
+		goto out;
+	}
 #endif
 
 	/* Find valid and up-to-date one from (vendor0 - vendor3) */
@@ -533,6 +536,9 @@ int vendor_storage_init(void)
 	debug("[Vendor INFO]:ret=%d.\n", ret);
 
 out:
+	if (ret)
+		bootdev_type = 0;
+
 	return ret;
 }
 

commit a04950ce794f4bad49d6e0eb40145cdc1486f4b5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 12 14:39:27 2020 +0800

    rockchip: rv1126: init QoS for ramboot
    
    There is not SPL for ramboot, let's init QoS for it.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ib6221122c44702cb4f287bad721316751478be71

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126.c b/arch/arm/mach-rockchip/rv1126/rv1126.c
index e3269e6687..ae7f304db2 100644
--- a/arch/arm/mach-rockchip/rv1126/rv1126.c
+++ b/arch/arm/mach-rockchip/rv1126/rv1126.c
@@ -535,7 +535,10 @@ void board_debug_uart_init(void)
 
 int arch_cpu_init(void)
 {
-#ifdef CONFIG_SPL_BUILD
+	/*
+	 * CONFIG_DM_RAMDISK: for ramboot that without SPL.
+	 */
+#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_DM_RAMDISK)
 	int delay;
 
 	/* write BOOT_WATCHDOG to boot mode register, if reset by wdt */
@@ -545,8 +548,13 @@ int arch_cpu_init(void)
 		writel(WDT_RESET_SRC_CLR, PMUGRF_RSTFUNC_CLR);
 	}
 
-	/* Just set region 0 to unsecure */
+#ifdef CONFIG_SPL_BUILD
+	/*
+	 * Just set region 0 to unsecure.
+	 * (Note: only secure-world can access this register)
+	 */
 	writel(0, FIREWALL_APB_BASE + FW_DDR_CON_REG);
+#endif
 
 	/* disable force jtag mux route to both group0 and group1 */
 	writel(0x00300000, GRF_IOFUNC_CON3);
@@ -668,6 +676,7 @@ int arch_cpu_init(void)
 	/* hold pmugrf's io reset */
 	writel(0x1 << 7 | 1 << 23, PMUGRF_SOC_CON1);
 #endif
+
 #if defined(CONFIG_ROCKCHIP_SFC) && (defined(CONFIG_SPL_BUILD) || defined(CONFIG_SUPPORT_USBPLUG))
 	/* GPIO0_D6 pull down in default, pull up it for SPI Flash */
 	writel(((0x3 << 12) << 16) | (0x1 << 12), GRF1_GPIO0D_P);

commit 9a4028eb5b7af5c1b96c17d1222483138abf7ae1
Author: Sugar Zhang <sugar.zhang@rock-chips.com>
Date:   Mon Oct 12 11:48:11 2020 +0800

    rockchip: rv1126: Set BOOT_WATCHDOG flag if reset by WDT
    
    Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
    Change-Id: Ia3d437c33ae9a7d3f666df70c484e1e6b28a90e5

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126.c b/arch/arm/mach-rockchip/rv1126/rv1126.c
index 4da36d2f85..e3269e6687 100644
--- a/arch/arm/mach-rockchip/rv1126/rv1126.c
+++ b/arch/arm/mach-rockchip/rv1126/rv1126.c
@@ -5,6 +5,7 @@
  */
 #include <common.h>
 #include <asm/io.h>
+#include <asm/arch/boot_mode.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/grf_rv1126.h>
 
@@ -91,6 +92,10 @@ DECLARE_GLOBAL_DATA_PTR;
 #define SGRF_SOC_CON3		0x00c
 #define CRU_SOFTRST_CON11	0xFF49032C
 #define PMUGRF_SOC_CON1		0xFE020104
+#define PMUGRF_RSTFUNC_STATUS	0xFE020230
+#define PMUGRF_RSTFUNC_CLR	0xFE020234
+#define WDT_RESET_SRC		BIT(1)
+#define WDT_RESET_SRC_CLR	BIT(1)
 #define GRF_IOFUNC_CON3		0xFF01026C
 #define GRF1_GPIO0D_P		0xFE010104
 
@@ -533,6 +538,13 @@ int arch_cpu_init(void)
 #ifdef CONFIG_SPL_BUILD
 	int delay;
 
+	/* write BOOT_WATCHDOG to boot mode register, if reset by wdt */
+	if (readl(PMUGRF_RSTFUNC_STATUS) & WDT_RESET_SRC) {
+		writel(BOOT_WATCHDOG, CONFIG_ROCKCHIP_BOOT_MODE_REG);
+		/* clear flag for reset by wdt trigger */
+		writel(WDT_RESET_SRC_CLR, PMUGRF_RSTFUNC_CLR);
+	}
+
 	/* Just set region 0 to unsecure */
 	writel(0, FIREWALL_APB_BASE + FW_DDR_CON_REG);
 

commit b444b7fa1e7e3f070b67735d24c98b0c291d1634
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Sep 27 11:29:57 2020 +0800

    rockchip: rv1126: fix typo
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If26223219d3f0e3d6ca37b6bc0c740411a87fe01

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126.c b/arch/arm/mach-rockchip/rv1126/rv1126.c
index fa0428364e..4da36d2f85 100644
--- a/arch/arm/mach-rockchip/rv1126/rv1126.c
+++ b/arch/arm/mach-rockchip/rv1126/rv1126.c
@@ -369,6 +369,7 @@ void board_debug_uart_init(void)
 
 #elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff410000)
 	static struct rv1126_pmugrf * const pmugrf = (void *)PMUGRF_BASE;
+	static struct rv1126_grf * const grf = (void *)GRF_BASE;
 #if defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
     (CONFIG_ROCKCHIP_UART_MUX_SEL_M == 0)
 	/* UART1 M0 */
@@ -386,7 +387,7 @@ void board_debug_uart_init(void)
 		     UART1_IO_SEL_M1 << UART1_IO_SEL_SHIFT);
 
 	/* Switch iomux */
-	rk_clrsetreg(&topgrf->gpio1d_iomux_l,
+	rk_clrsetreg(&grf->gpio1d_iomux_l,
 		     GPIO1D1_MASK | GPIO1D0_MASK,
 		     GPIO1D1_UART1_RX_M1 << GPIO1D1_SHIFT |
 		     GPIO1D0_UART1_TX_M1 << GPIO1D0_SHIFT);

commit e7498cb05b7a0149f0bac78760224dc4bfa032eb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Sep 28 14:44:15 2020 +0800

    common: android: show ramdisk size of boot and vendor-boot
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ia8eca7010989e64d10b09628a12bcfc5aaeb988c

diff --git a/common/image-android.c b/common/image-android.c
index 4e2bc62af0..88674ae1d6 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -251,9 +251,14 @@ int android_image_get_ramdisk(const struct andr_img_hdr *hdr,
 	*rd_data = ramdisk_addr_r;
 	*rd_len = hdr->ramdisk_size;
 
-	printf("RAM disk load addr 0x%08lx size %u KiB\n",
-	       *rd_data, DIV_ROUND_UP(hdr->ramdisk_size, 1024));
+	printf("RAM disk load addr 0x%08lx ", *rd_data);
 
+	if (hdr->header_version < 3)
+		printf("size %u KiB\n", DIV_ROUND_UP(hdr->ramdisk_size, 1024));
+	else
+		printf("size: boot %u KiB, vendor-boot %u KiB\n",
+		       DIV_ROUND_UP(hdr->boot_ramdisk_size, 1024),
+		       DIV_ROUND_UP(hdr->vendor_ramdisk_size, 1024));
 	return 0;
 }
 
@@ -920,6 +925,7 @@ static int populate_boot_info(const struct boot_img_hdr_v3 *boot_hdr,
 	/* don't use vendor_hdr->kernel_addr, we prefer "hdr + hdr->page_size" */
 	hdr->kernel_addr = ANDROID_IMAGE_DEFAULT_KERNEL_ADDR;
 	/* generic ramdisk: immediately following the vendor ramdisk */
+	hdr->boot_ramdisk_size = boot_hdr->ramdisk_size;
 	hdr->ramdisk_size = boot_hdr->ramdisk_size +
 				vendor_hdr->vendor_ramdisk_size;
 	/* actually, useless */
diff --git a/include/android_image.h b/include/android_image.h
index a738089631..bb32dce861 100644
--- a/include/android_image.h
+++ b/include/android_image.h
@@ -85,6 +85,7 @@ struct andr_img_hdr {
      * we have to partly merge fields from boot_img_hdr_v3 and vendor_boot_img_hdr_v3
      * into this structure to compatible with boot_img_hdr_v012.
      */
+    u32 boot_ramdisk_size;   /* size in bytes */
     u32 vendor_ramdisk_size; /* size in bytes */
     u32 vendor_page_size;
     u32 vendor_header_version;

commit 9f568152b61a6e397f6f66f00f75b52fd1c37dc2
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Sep 25 15:17:06 2020 +0800

    rkflash: Fix last data block vpn has been modify issue
    
    Change-Id: Ie3aa7140c368693ddd18a53225975ec2fd6ce141
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/rk_sftl_arm_v7.S b/drivers/rkflash/rk_sftl_arm_v7.S
index 1113098210..741fe7164f 100644
--- a/drivers/rkflash/rk_sftl_arm_v7.S
+++ b/drivers/rkflash/rk_sftl_arm_v7.S
@@ -2,7 +2,7 @@
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:    GPL-2.0
- * date: 2019-10-28
+ * date: 2020-09-25
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -58,32 +58,6 @@ l2p_addr_tran.isra.0:
 .L3:
 	.word	.LANCHOR0
 	.size	l2p_addr_tran.isra.0, .-l2p_addr_tran.isra.0
-	.section	.text.ftl_set_blk_mode.part.6,"ax",%progbits
-	.align	1
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_set_blk_mode.part.6, %function
-ftl_set_blk_mode.part.6:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L6
-	lsrs	r1, r0, #5
-	and	r0, r0, #31
-	ldr	r2, [r3]
-	movs	r3, #1
-	lsl	r0, r3, r0
-	ldr	r3, [r2, r1, lsl #2]
-	orrs	r3, r3, r0
-	str	r3, [r2, r1, lsl #2]
-	bx	lr
-.L7:
-	.align	2
-.L6:
-	.word	.LANCHOR1
-	.size	ftl_set_blk_mode.part.6, .-ftl_set_blk_mode.part.6
 	.section	.text.Ftl_log2,"ax",%progbits
 	.align	1
 	.global	Ftl_log2
@@ -98,17 +72,17 @@ Ftl_log2:
 	@ link register save eliminated.
 	movs	r1, #0
 	movs	r2, #1
-.L9:
+.L6:
 	cmp	r2, r0
 	uxth	r3, r1
 	add	r1, r1, #1
-	bls	.L10
+	bls	.L7
 	subs	r0, r3, #1
 	uxth	r0, r0
 	bx	lr
-.L10:
+.L7:
 	lsls	r2, r2, #1
-	b	.L9
+	b	.L6
 	.size	Ftl_log2, .-Ftl_log2
 	.section	.text.FtlPrintInfo,"ax",%progbits
 	.align	1
@@ -136,38 +110,38 @@ FtlSysBlkNumInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L13
+	ldr	r3, .L10
 	cmp	r0, #24
 	it	cc
 	movcc	r0, #24
-	ldr	r2, .L13+4
+	ldr	r2, .L10+4
 	str	r0, [r3]
-	ldr	r3, .L13+8
+	ldr	r3, .L10+8
 	ldrh	r3, [r3]
 	muls	r3, r0, r3
 	str	r3, [r2]
-	ldr	r2, .L13+12
+	ldr	r2, .L10+12
 	ldrh	r2, [r2]
 	subs	r0, r2, r0
-	ldr	r2, .L13+16
+	ldr	r2, .L10+16
 	strh	r0, [r2]	@ movhi
 	movs	r0, #0
-	ldr	r2, .L13+20
+	ldr	r2, .L10+20
 	ldr	r2, [r2]
 	subs	r3, r2, r3
-	ldr	r2, .L13+24
+	ldr	r2, .L10+24
 	str	r3, [r2]
 	bx	lr
-.L14:
+.L11:
 	.align	2
-.L13:
-	.word	.LANCHOR2
-	.word	.LANCHOR4
+.L10:
+	.word	.LANCHOR1
 	.word	.LANCHOR3
-	.word	.LANCHOR6
+	.word	.LANCHOR2
 	.word	.LANCHOR5
-	.word	.LANCHOR8
+	.word	.LANCHOR4
 	.word	.LANCHOR7
+	.word	.LANCHOR6
 	.size	FtlSysBlkNumInit, .-FtlSysBlkNumInit
 	.global	__aeabi_idiv
 	.section	.text.FtlConstantsInit,"ax",%progbits
@@ -184,35 +158,35 @@ FtlConstantsInit:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r3, r0
 	ldrh	r4, [r0]
-	ldr	r2, .L26
+	ldr	r2, .L23
 	ldrh	r5, [r0, #2]
 	ldrh	r7, [r3, #14]
 	strh	r4, [r2]	@ movhi
-	ldr	r2, .L26+4
+	ldr	r2, .L23+4
 	ldrh	ip, [r0, #4]
 	cmp	r7, #4
-	ldr	r0, .L26+8
+	ldr	r0, .L23+8
 	strh	r5, [r2]	@ movhi
-	ldr	r1, .L26+12
+	ldr	r1, .L23+12
 	ldrh	r2, [r3, #6]
-	ldr	r6, .L26+16
+	ldr	r6, .L23+16
 	strh	ip, [r0]	@ movhi
 	strh	r2, [r1]	@ movhi
 	strh	r7, [r6]	@ movhi
-	bne	.L16
+	bne	.L13
 	lsrs	r2, r2, #1
 	strh	r2, [r1]	@ movhi
 	movs	r2, #8
 	strh	r2, [r6]	@ movhi
-.L17:
-	ldr	r7, .L26+20
+.L14:
+	ldr	r7, .L23+20
 	movs	r2, #0
-.L18:
+.L15:
 	strb	r2, [r2, r7]
 	adds	r2, r2, #1
 	cmp	r2, #32
-	bne	.L18
-	ldr	r2, .L26+24
+	bne	.L15
+	ldr	r2, .L23+24
 	cmp	r4, #1
 	mov	r7, #5
 	ldrh	r0, [r0]
@@ -222,37 +196,37 @@ FtlConstantsInit:
 	it	eq
 	strheq	r4, [r2]	@ movhi
 	mov	r4, #640
-	ldr	r2, .L26+28
+	ldr	r2, .L23+28
 	smulbb	r5, r5, r0
-	ldr	r7, .L26+32
+	ldr	r7, .L23+32
 	strh	r4, [r2]	@ movhi
 	uxth	r5, r5
 	ldrh	r4, [r1]
-	ldr	r2, .L26+36
+	ldr	r2, .L23+36
 	strh	ip, [r7]	@ movhi
-	ldr	r7, .L26+40
+	ldr	r7, .L23+40
 	smulbb	r0, r0, r4
 	strh	r5, [r2]	@ movhi
-	ldr	r2, .L26+44
+	ldr	r2, .L23+44
 	uxth	r0, r0
 	strh	r0, [r2]	@ movhi
 	bl	Ftl_log2
 	ldr	r3, [sp, #4]
-	ldr	r2, .L26+48
+	ldr	r2, .L23+48
 	ldrh	fp, [r6]
 	ldrh	r8, [r3, #12]
 	strh	r0, [r2]	@ movhi
-	ldr	r2, .L26+52
+	ldr	r2, .L23+52
 	mov	r0, fp
 	strh	r8, [r7]	@ movhi
 	smulbb	r1, r5, r8
-	ldr	r6, .L26+56
+	ldr	r6, .L23+56
 	strh	r8, [r2]	@ movhi
-	ldr	r2, .L26+60
+	ldr	r2, .L23+60
 	strh	r1, [r2]	@ movhi
 	bl	Ftl_log2
 	lsl	r2, fp, #9
-	ldr	r1, .L26+64
+	ldr	r1, .L23+64
 	ldr	r3, [sp, #4]
 	mov	r10, r0
 	uxth	r2, r2
@@ -260,25 +234,25 @@ FtlConstantsInit:
 	mov	r0, #5120
 	strh	r2, [r1]	@ movhi
 	lsrs	r2, r2, #8
-	ldr	r1, .L26+68
+	ldr	r1, .L23+68
 	strh	r2, [r1]	@ movhi
 	mul	r1, r8, fp
 	ldrh	r2, [r3, #20]
-	ldr	r3, .L26+72
+	ldr	r3, .L23+72
 	strh	r2, [r3]	@ movhi
 	mul	r3, r4, r5
-	ldr	r2, .L26+76
+	ldr	r2, .L23+76
 	lsls	r4, r4, #6
 	str	r3, [r2]
 	mul	r3, fp, r3
-	ldr	r2, .L26+80
+	ldr	r2, .L23+80
 	mul	r3, r8, r3
-	ldr	r8, .L26+116
+	ldr	r8, .L23+116
 	asrs	r3, r3, #11
 	str	r3, [r2]
 	bl	__aeabi_idiv
 	uxth	r0, r0
-	ldr	r2, .L26+84
+	ldr	r2, .L23+84
 	mov	r1, r5
 	cmp	r0, #4
 	itet	ls
@@ -289,11 +263,11 @@ FtlConstantsInit:
 	asr	r3, r3, r10
 	add	r10, r10, #9
 	asr	r4, r4, r10
-	ldr	r10, .L26+120
+	ldr	r10, .L23+120
 	adds	r3, r3, #2
 	ldrh	r0, [r8]
 	strh	r3, [r2]	@ movhi
-	ldr	r3, .L26+88
+	ldr	r3, .L23+88
 	strh	r4, [r3]	@ movhi
 	uxth	r4, r4
 	mul	r3, r5, r4
@@ -301,7 +275,7 @@ FtlConstantsInit:
 	str	r3, [r10]
 	bl	__aeabi_uidiv
 	uxtah	r0, r4, r0
-	ldr	r4, .L26+92
+	ldr	r4, .L23+92
 	cmp	r5, #1
 	it	eq
 	addeq	r0, r0, #4
@@ -310,9 +284,9 @@ FtlConstantsInit:
 	bl	FtlSysBlkNumInit
 	ldr	r2, [r4]
 	movs	r0, #0
-	ldr	r3, .L26+96
+	ldr	r3, .L23+96
 	str	r2, [r3]
-	ldr	r3, .L26+100
+	ldr	r3, .L23+100
 	ldr	r2, [r3]
 	ldrh	r3, [r7]
 	lsls	r2, r2, #2
@@ -320,13 +294,13 @@ FtlConstantsInit:
 	ldrh	r2, [r6]
 	adds	r2, r2, #9
 	lsrs	r3, r3, r2
-	ldr	r2, .L26+104
+	ldr	r2, .L23+104
 	adds	r3, r3, #2
 	strh	r3, [r2]	@ movhi
 	movs	r2, #32
-	ldr	r3, .L26+108
+	ldr	r3, .L23+108
 	strh	r2, [r3]	@ movhi
-	ldr	r3, .L26+112
+	ldr	r3, .L23+112
 	str	r0, [r3]
 	ldrh	r3, [r8]
 	adds	r3, r3, #3
@@ -337,50 +311,50 @@ FtlConstantsInit:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L16:
+.L13:
 	cmp	r7, #8
-	bne	.L17
+	bne	.L14
 	cmp	ip, #1
 	itttt	eq
 	lsreq	r2, r2, #1
 	strheq	r2, [r1]	@ movhi
 	moveq	r2, #2
 	strheq	r2, [r0]	@ movhi
-	b	.L17
-.L27:
+	b	.L14
+.L24:
 	.align	2
-.L26:
+.L23:
+	.word	.LANCHOR8
 	.word	.LANCHOR9
 	.word	.LANCHOR10
+	.word	.LANCHOR5
 	.word	.LANCHOR11
-	.word	.LANCHOR6
 	.word	.LANCHOR12
 	.word	.LANCHOR13
+	.word	.LANCHOR15
 	.word	.LANCHOR14
+	.word	.LANCHOR2
+	.word	.LANCHOR18
 	.word	.LANCHOR16
-	.word	.LANCHOR15
-	.word	.LANCHOR3
-	.word	.LANCHOR19
 	.word	.LANCHOR17
-	.word	.LANCHOR18
+	.word	.LANCHOR19
+	.word	.LANCHOR21
 	.word	.LANCHOR20
 	.word	.LANCHOR22
-	.word	.LANCHOR21
 	.word	.LANCHOR23
 	.word	.LANCHOR24
+	.word	.LANCHOR7
 	.word	.LANCHOR25
-	.word	.LANCHOR8
-	.word	.LANCHOR26
+	.word	.LANCHOR27
 	.word	.LANCHOR28
-	.word	.LANCHOR29
-	.word	.LANCHOR2
+	.word	.LANCHOR1
+	.word	.LANCHOR30
+	.word	.LANCHOR6
 	.word	.LANCHOR31
-	.word	.LANCHOR7
 	.word	.LANCHOR32
 	.word	.LANCHOR33
-	.word	.LANCHOR34
-	.word	.LANCHOR27
-	.word	.LANCHOR30
+	.word	.LANCHOR26
+	.word	.LANCHOR29
 	.size	FtlConstantsInit, .-FtlConstantsInit
 	.section	.text.IsBlkInVendorPart,"ax",%progbits
 	.align	1
@@ -394,32 +368,32 @@ IsBlkInVendorPart:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L35
+	ldr	r3, .L32
 	ldrh	r3, [r3]
-	cbz	r3, .L34
-	ldr	r3, .L35+4
-	ldr	r2, .L35+8
+	cbz	r3, .L31
+	ldr	r3, .L32+4
+	ldr	r2, .L32+8
 	ldr	r3, [r3]
 	ldrh	r2, [r2]
 	add	r2, r3, r2, lsl #1
-.L30:
+.L27:
 	cmp	r3, r2
-	bne	.L31
-.L34:
+	bne	.L28
+.L31:
 	movs	r0, #0
 	bx	lr
-.L31:
+.L28:
 	ldrh	r1, [r3], #2
 	cmp	r0, r1
-	bne	.L30
+	bne	.L27
 	movs	r0, #1
 	bx	lr
-.L36:
+.L33:
 	.align	2
-.L35:
+.L32:
+	.word	.LANCHOR34
 	.word	.LANCHOR35
-	.word	.LANCHOR36
-	.word	.LANCHOR27
+	.word	.LANCHOR26
 	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
 	.section	.text.FtlCacheWriteBack,"ax",%progbits
 	.align	1
@@ -448,13 +422,13 @@ sftl_get_density:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L39
+	ldr	r3, .L36
 	ldr	r0, [r3]
 	bx	lr
-.L40:
+.L37:
 	.align	2
-.L39:
-	.word	.LANCHOR34
+.L36:
+	.word	.LANCHOR33
 	.size	sftl_get_density, .-sftl_get_density
 	.global	__aeabi_uidivmod
 	.section	.text.FtlBbmMapBadBlock,"ax",%progbits
@@ -468,14 +442,14 @@ sftl_get_density:
 FtlBbmMapBadBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L42
+	ldr	r3, .L39
 	push	{r0, r1, r2, r4, r5, r6, r7, lr}
 	mov	r5, r0
 	ldrh	r4, [r3]
 	mov	r1, r4
 	bl	__aeabi_uidiv
 	mov	r1, r4
-	ldr	r4, .L42+4
+	ldr	r4, .L39+4
 	uxth	r6, r0
 	mov	r0, r5
 	bl	__aeabi_uidivmod
@@ -492,7 +466,7 @@ FtlBbmMapBadBlock:
 	mov	r2, r6
 	str	r0, [sp]
 	mov	r1, r5
-	ldr	r0, .L42+8
+	ldr	r0, .L39+8
 	bl	printf
 	ldrh	r3, [r4, #6]
 	movs	r0, #0
@@ -501,11 +475,11 @@ FtlBbmMapBadBlock:
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, pc}
-.L43:
+.L40:
 	.align	2
-.L42:
-	.word	.LANCHOR17
-	.word	.LANCHOR37
+.L39:
+	.word	.LANCHOR16
+	.word	.LANCHOR36
 	.word	.LC0
 	.size	FtlBbmMapBadBlock, .-FtlBbmMapBadBlock
 	.section	.text.FtlBbmIsBadBlock,"ax",%progbits
@@ -519,7 +493,7 @@ FtlBbmMapBadBlock:
 FtlBbmIsBadBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L45
+	ldr	r3, .L42
 	push	{r4, r5, r6, lr}
 	mov	r6, r0
 	ldrh	r5, [r3]
@@ -529,7 +503,7 @@ FtlBbmIsBadBlock:
 	uxth	r4, r1
 	mov	r1, r5
 	bl	__aeabi_uidiv
-	ldr	r3, .L45+4
+	ldr	r3, .L42+4
 	uxth	r0, r0
 	lsrs	r2, r4, #5
 	and	r4, r4, #31
@@ -539,11 +513,11 @@ FtlBbmIsBadBlock:
 	lsrs	r0, r0, r4
 	and	r0, r0, #1
 	pop	{r4, r5, r6, pc}
-.L46:
+.L43:
 	.align	2
-.L45:
-	.word	.LANCHOR17
-	.word	.LANCHOR37
+.L42:
+	.word	.LANCHOR16
+	.word	.LANCHOR36
 	.size	FtlBbmIsBadBlock, .-FtlBbmIsBadBlock
 	.section	.text.FtlBbtInfoPrint,"ax",%progbits
 	.align	1
@@ -572,12 +546,12 @@ V2P_block:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r5, r1
-	ldr	r3, .L49
+	ldr	r3, .L46
 	mov	r7, r0
 	ldrh	r6, [r3]
 	mov	r1, r6
 	bl	__aeabi_uidiv
-	ldr	r3, .L49+4
+	ldr	r3, .L46+4
 	smulbb	r5, r6, r5
 	mov	r1, r6
 	ldrh	r4, [r3]
@@ -588,11 +562,11 @@ V2P_block:
 	add	r0, r0, r4
 	uxth	r0, r0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L50:
+.L47:
 	.align	2
-.L49:
-	.word	.LANCHOR11
-	.word	.LANCHOR17
+.L46:
+	.word	.LANCHOR10
+	.word	.LANCHOR16
 	.size	V2P_block, .-V2P_block
 	.section	.text.P2V_plane,"ax",%progbits
 	.align	1
@@ -605,11 +579,11 @@ V2P_block:
 P2V_plane:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L52
+	ldr	r3, .L49
 	push	{r4, r5, r6, lr}
 	mov	r6, r0
 	ldrh	r5, [r3]
-	ldr	r3, .L52+4
+	ldr	r3, .L49+4
 	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
 	smulbb	r4, r0, r5
@@ -619,11 +593,11 @@ P2V_plane:
 	add	r1, r1, r4
 	uxth	r0, r1
 	pop	{r4, r5, r6, pc}
-.L53:
+.L50:
 	.align	2
-.L52:
-	.word	.LANCHOR11
-	.word	.LANCHOR17
+.L49:
+	.word	.LANCHOR10
+	.word	.LANCHOR16
 	.size	P2V_plane, .-P2V_plane
 	.section	.text.P2V_block_in_plane,"ax",%progbits
 	.align	1
@@ -637,20 +611,20 @@ P2V_block_in_plane:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L55
+	ldr	r3, .L52
 	ldrh	r1, [r3]
 	bl	__aeabi_uidivmod
-	ldr	r3, .L55+4
+	ldr	r3, .L52+4
 	uxth	r0, r1
 	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
 	uxth	r0, r0
 	pop	{r3, pc}
-.L56:
+.L53:
 	.align	2
-.L55:
-	.word	.LANCHOR17
-	.word	.LANCHOR11
+.L52:
+	.word	.LANCHOR16
+	.word	.LANCHOR10
 	.size	P2V_block_in_plane, .-P2V_block_in_plane
 	.section	.text.ftl_cmp_data_ver,"ax",%progbits
 	.align	1
@@ -665,14 +639,14 @@ ftl_cmp_data_ver:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	cmp	r0, r1
-	bls	.L58
+	bls	.L55
 	subs	r0, r0, r1
 	cmp	r0, #-2147483648
 	ite	hi
 	movhi	r0, #0
 	movls	r0, #1
 	bx	lr
-.L58:
+.L55:
 	subs	r0, r1, r0
 	cmp	r0, #-2147483648
 	ite	ls
@@ -692,15 +666,15 @@ FtlFreeSysBlkQueueEmpty:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L61
+	ldr	r3, .L58
 	ldrh	r0, [r3, #6]
 	clz	r0, r0
 	lsrs	r0, r0, #5
 	bx	lr
-.L62:
+.L59:
 	.align	2
-.L61:
-	.word	.LANCHOR38
+.L58:
+	.word	.LANCHOR37
 	.size	FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty
 	.section	.text.FtlFreeSysBlkQueueFull,"ax",%progbits
 	.align	1
@@ -714,16 +688,16 @@ FtlFreeSysBlkQueueFull:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L64
+	ldr	r3, .L61
 	ldrh	r0, [r3, #6]
 	sub	r3, r0, #1024
 	rsbs	r0, r3, #0
 	adcs	r0, r0, r3
 	bx	lr
-.L65:
+.L62:
 	.align	2
-.L64:
-	.word	.LANCHOR38
+.L61:
+	.word	.LANCHOR37
 	.size	FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull
 	.section	.text.FtlFreeSysBLkSort,"ax",%progbits
 	.align	1
@@ -736,28 +710,28 @@ FtlFreeSysBlkQueueFull:
 FtlFreeSysBLkSort:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L75
+	ldr	r3, .L72
 	push	{r4, r5, r6, lr}
 	ldrh	r2, [r3, #6]
-	cbz	r2, .L66
-	ldr	r2, .L75+4
+	cbz	r2, .L63
+	ldr	r2, .L72+4
 	movs	r6, #0
 	ldrh	r1, [r3, #2]
 	mov	r5, r6
 	ldrh	r4, [r2, #28]
 	ldrh	r2, [r3, #4]
 	and	r4, r4, #31
-.L68:
+.L65:
 	uxth	r0, r6
 	adds	r6, r6, #1
 	cmp	r4, r0
-	bgt	.L69
-	cbz	r5, .L66
+	bgt	.L66
+	cbz	r5, .L63
 	strh	r1, [r3, #2]	@ movhi
 	strh	r2, [r3, #4]	@ movhi
-.L66:
+.L63:
 	pop	{r4, r5, r6, pc}
-.L69:
+.L66:
 	adds	r0, r1, #4
 	adds	r1, r1, #1
 	ldrh	r5, [r3, r0, lsl #1]
@@ -767,12 +741,12 @@ FtlFreeSysBLkSort:
 	movs	r5, #1
 	add	r2, r2, r5
 	ubfx	r2, r2, #0, #10
-	b	.L68
-.L76:
+	b	.L65
+.L73:
 	.align	2
-.L75:
+.L72:
+	.word	.LANCHOR37
 	.word	.LANCHOR38
-	.word	.LANCHOR39
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
 	.section	.text.IsInFreeQueue,"ax",%progbits
 	.align	1
@@ -785,35 +759,35 @@ FtlFreeSysBLkSort:
 IsInFreeQueue:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L83
+	ldr	r3, .L80
 	push	{r4, r5, lr}
 	ldrh	r4, [r3, #6]
 	cmp	r4, #1024
-	beq	.L81
+	beq	.L78
 	ldrh	r5, [r3, #2]
 	movs	r1, #0
-.L79:
+.L76:
 	cmp	r1, r4
-	bcc	.L80
-.L81:
+	bcc	.L77
+.L78:
 	movs	r0, #0
 	pop	{r4, r5, pc}
-.L80:
+.L77:
 	adds	r2, r1, r5
 	ubfx	r2, r2, #0, #10
 	adds	r2, r2, #4
 	ldrh	r2, [r3, r2, lsl #1]
 	cmp	r2, r0
-	beq	.L82
+	beq	.L79
 	adds	r1, r1, #1
-	b	.L79
-.L82:
+	b	.L76
+.L79:
 	movs	r0, #1
 	pop	{r4, r5, pc}
-.L84:
+.L81:
 	.align	2
-.L83:
-	.word	.LANCHOR38
+.L80:
+	.word	.LANCHOR37
 	.size	IsInFreeQueue, .-IsInFreeQueue
 	.section	.text.insert_data_list,"ax",%progbits
 	.align	1
@@ -826,12 +800,12 @@ IsInFreeQueue:
 insert_data_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L100
+	ldr	r3, .L97
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	ldrh	r8, [r3]
 	cmp	r8, r0
-	bls	.L87
-	ldr	r3, .L100+4
+	bls	.L84
+	ldr	r3, .L97+4
 	movs	r5, #6
 	muls	r5, r0, r5
 	ldr	r4, [r3]
@@ -839,85 +813,85 @@ insert_data_list:
 	adds	r1, r4, r5
 	strh	r3, [r1, #2]	@ movhi
 	strh	r3, [r4, r5]	@ movhi
-	ldr	r3, .L100+8
+	ldr	r3, .L97+8
 	ldr	ip, [r3]
 	cmp	ip, #0
-	bne	.L88
-.L99:
+	bne	.L85
+.L96:
 	str	r1, [r3]
-.L87:
+.L84:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L88:
-	ldr	r3, .L100+12
+.L85:
+	ldr	r3, .L97+12
 	ldrh	r6, [r1, #4]
 	ldr	r10, [r3]
 	ldrh	r3, [r10, r0, lsl #1]
-	cbz	r6, .L95
+	cbz	r6, .L92
 	muls	r6, r3, r6
-.L89:
+.L86:
 	sub	r2, ip, r4
 	movs	r7, #0
 	asrs	r3, r2, #1
-	ldr	r2, .L100+16
+	ldr	r2, .L97+16
 	muls	r2, r3, r2
 	mov	r3, ip
 	uxth	r2, r2
-.L93:
+.L90:
 	adds	r7, r7, #1
 	uxth	r7, r7
 	cmp	r8, r7
-	bcc	.L87
+	bcc	.L84
 	cmp	r2, r0
-	beq	.L87
+	beq	.L84
 	ldrh	lr, [r3, #4]
 	cmp	lr, #0
-	beq	.L91
+	beq	.L88
 	ldrh	fp, [r10, r2, lsl #1]
 	mul	lr, lr, fp
 	cmp	r6, lr
-	bls	.L91
+	bls	.L88
 	ldrh	lr, [r3]
 	movw	fp, #65535
 	cmp	lr, fp
-	bne	.L92
+	bne	.L89
 	strh	r2, [r1, #2]	@ movhi
 	strh	r0, [r3]	@ movhi
-	ldr	r3, .L100+20
-	b	.L99
-.L95:
-	mov	r6, #-1
-	b	.L89
+	ldr	r3, .L97+20
+	b	.L96
 .L92:
+	mov	r6, #-1
+	b	.L86
+.L89:
 	movs	r3, #6
 	mov	r2, lr
 	mla	r3, r3, lr, r4
-	b	.L93
-.L91:
+	b	.L90
+.L88:
 	strh	r2, [r4, r5]	@ movhi
 	cmp	r3, ip
 	ldrh	r2, [r3, #2]
 	strh	r2, [r1, #2]	@ movhi
-	bne	.L94
+	bne	.L91
 	strh	r0, [r3, #2]	@ movhi
-	ldr	r3, .L100+8
-	b	.L99
-.L94:
+	ldr	r3, .L97+8
+	b	.L96
+.L91:
 	ldrh	r1, [r3, #2]
 	movs	r2, #6
 	muls	r2, r1, r2
 	strh	r0, [r4, r2]	@ movhi
 	strh	r0, [r3, #2]	@ movhi
-	b	.L87
-.L101:
+	b	.L84
+.L98:
 	.align	2
-.L100:
-	.word	.LANCHOR5
+.L97:
+	.word	.LANCHOR4
+	.word	.LANCHOR39
 	.word	.LANCHOR40
 	.word	.LANCHOR41
-	.word	.LANCHOR42
 	.word	-1431655765
-	.word	.LANCHOR43
+	.word	.LANCHOR42
 	.size	insert_data_list, .-insert_data_list
 	.section	.text.INSERT_DATA_LIST,"ax",%progbits
 	.align	1
@@ -932,28 +906,28 @@ INSERT_DATA_LIST:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	insert_data_list
-	ldr	r2, .L104
+	ldr	r2, .L101
 	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L104+4
+	ldr	r2, .L101+4
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bcs	.L102
+	bcs	.L99
 	movs	r2, #214
-	ldr	r1, .L104+8
-	ldr	r0, .L104+12
+	ldr	r1, .L101+8
+	ldr	r0, .L101+12
 	pop	{r3, lr}
 	b	printf
-.L102:
+.L99:
 	pop	{r3, pc}
-.L105:
+.L102:
 	.align	2
-.L104:
+.L101:
+	.word	.LANCHOR43
+	.word	.LANCHOR4
 	.word	.LANCHOR44
-	.word	.LANCHOR5
-	.word	.LANCHOR45
 	.word	.LC1
 	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
 	.section	.text.insert_free_list,"ax",%progbits
@@ -970,48 +944,48 @@ insert_free_list:
 	movw	r1, #65535
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	cmp	r0, r1
-	beq	.L107
-	ldr	r3, .L113
+	beq	.L104
+	ldr	r3, .L110
 	mov	r10, #6
 	mul	r7, r10, r0
 	ldr	r4, [r3]
-	ldr	r3, .L113+4
+	ldr	r3, .L110+4
 	adds	r5, r4, r7
 	ldr	r6, [r3]
 	mov	lr, r3
 	strh	r1, [r5, #2]	@ movhi
 	strh	r1, [r4, r7]	@ movhi
-	cbnz	r6, .L108
+	cbnz	r6, .L105
 	str	r5, [r3]
-.L107:
+.L104:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L108:
-	ldr	r3, .L113+8
+.L105:
+	ldr	r3, .L110+8
 	subs	r2, r6, r4
 	mov	fp, r1
 	ldr	ip, [r3]
 	asrs	r3, r2, #1
-	ldr	r2, .L113+12
+	ldr	r2, .L110+12
 	ldrh	r8, [ip, r0, lsl #1]
 	muls	r2, r3, r2
 	mov	r3, r6
 	uxth	r2, r2
-.L111:
+.L108:
 	ldrh	r1, [ip, r2, lsl #1]
 	cmp	r1, r8
-	bcs	.L109
+	bcs	.L106
 	ldrh	r1, [r3]
 	cmp	r1, fp
-	bne	.L110
+	bne	.L107
 	strh	r2, [r5, #2]	@ movhi
 	strh	r0, [r3]	@ movhi
-	b	.L107
-.L110:
+	b	.L104
+.L107:
 	mla	r3, r10, r1, r4
 	mov	r2, r1
-	b	.L111
-.L109:
+	b	.L108
+.L106:
 	ldrh	r1, [r3, #2]
 	cmp	r3, r6
 	strh	r1, [r5, #2]	@ movhi
@@ -1026,13 +1000,13 @@ insert_free_list:
 	itt	ne
 	strhne	r0, [r4, r2]	@ movhi
 	strhne	r0, [r3, #2]	@ movhi
-	b	.L107
-.L114:
+	b	.L104
+.L111:
 	.align	2
-.L113:
-	.word	.LANCHOR40
+.L110:
+	.word	.LANCHOR39
+	.word	.LANCHOR45
 	.word	.LANCHOR46
-	.word	.LANCHOR47
 	.word	-1431655765
 	.size	insert_free_list, .-insert_free_list
 	.section	.text.INSERT_FREE_LIST,"ax",%progbits
@@ -1048,28 +1022,28 @@ INSERT_FREE_LIST:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	insert_free_list
-	ldr	r2, .L117
+	ldr	r2, .L114
 	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L117+4
+	ldr	r2, .L114+4
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bcs	.L115
+	bcs	.L112
 	movs	r2, #207
-	ldr	r1, .L117+8
-	ldr	r0, .L117+12
+	ldr	r1, .L114+8
+	ldr	r0, .L114+12
 	pop	{r3, lr}
 	b	printf
-.L115:
+.L112:
 	pop	{r3, pc}
-.L118:
+.L115:
 	.align	2
-.L117:
+.L114:
+	.word	.LANCHOR47
+	.word	.LANCHOR4
 	.word	.LANCHOR48
-	.word	.LANCHOR5
-	.word	.LANCHOR49
 	.word	.LC1
 	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
 	.section	.text.List_remove_node,"ax",%progbits
@@ -1085,7 +1059,7 @@ List_remove_node:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r6, #6
-	ldr	r5, .L125
+	ldr	r5, .L122
 	muls	r6, r1, r6
 	movw	r3, #65535
 	mov	r8, r0
@@ -1093,20 +1067,20 @@ List_remove_node:
 	adds	r4, r7, r6
 	ldrh	r2, [r4, #2]
 	cmp	r2, r3
-	bne	.L120
+	bne	.L117
 	ldr	r3, [r0]
 	cmp	r4, r3
-	beq	.L120
+	beq	.L117
 	mov	r2, #372
-	ldr	r1, .L125+4
-	ldr	r0, .L125+8
+	ldr	r1, .L122+4
+	ldr	r0, .L122+8
 	bl	printf
-.L120:
+.L117:
 	ldr	r3, [r8]
 	movw	r1, #65535
 	cmp	r4, r3
 	ldrh	r3, [r7, r6]
-	bne	.L121
+	bne	.L118
 	cmp	r3, r1
 	ittee	ne
 	ldrne	r0, [r5]
@@ -1117,24 +1091,24 @@ List_remove_node:
 	mlane	r3, r2, r3, r0
 	strne	r3, [r8]
 	strhne	r1, [r3, #2]	@ movhi
-.L123:
+.L120:
 	movw	r3, #65535
 	movs	r0, #0
 	strh	r3, [r7, r6]	@ movhi
 	strh	r3, [r4, #2]	@ movhi
 	pop	{r4, r5, r6, r7, r8, pc}
-.L121:
+.L118:
 	cmp	r3, r1
 	ldrh	r1, [r4, #2]
-	bne	.L124
+	bne	.L121
 	cmp	r1, r3
-	beq	.L123
+	beq	.L120
 	movs	r2, #6
 	ldr	r0, [r5]
 	muls	r1, r2, r1
 	strh	r3, [r0, r1]	@ movhi
-	b	.L123
-.L124:
+	b	.L120
+.L121:
 	ldr	r0, [r5]
 	movs	r2, #6
 	mla	r5, r2, r3, r0
@@ -1142,12 +1116,12 @@ List_remove_node:
 	ldrh	r1, [r4, #2]
 	muls	r2, r1, r2
 	strh	r3, [r0, r2]	@ movhi
-	b	.L123
-.L126:
+	b	.L120
+.L123:
 	.align	2
-.L125:
-	.word	.LANCHOR40
-	.word	.LANCHOR50
+.L122:
+	.word	.LANCHOR39
+	.word	.LANCHOR49
 	.word	.LC1
 	.size	List_remove_node, .-List_remove_node
 	.section	.text.List_pop_index_node,"ax",%progbits
@@ -1163,15 +1137,15 @@ List_pop_index_node:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	ldr	r3, [r0]
 	push	{r4, r5, r6, lr}
-	cbz	r3, .L133
-	ldr	r2, .L134
+	cbz	r3, .L130
+	ldr	r2, .L131
 	movw	r5, #65535
 	movs	r6, #6
 	ldr	r2, [r2]
+.L126:
+	cbnz	r1, .L127
 .L129:
-	cbnz	r1, .L130
-.L132:
-	ldr	r4, .L134+4
+	ldr	r4, .L131+4
 	subs	r3, r3, r2
 	asrs	r3, r3, #1
 	muls	r4, r3, r4
@@ -1179,21 +1153,21 @@ List_pop_index_node:
 	bl	List_remove_node
 	uxth	r0, r4
 	pop	{r4, r5, r6, pc}
-.L130:
+.L127:
 	ldrh	r4, [r3]
 	cmp	r4, r5
-	beq	.L132
+	beq	.L129
 	subs	r1, r1, #1
 	mla	r3, r6, r4, r2
 	uxth	r1, r1
-	b	.L129
-.L133:
+	b	.L126
+.L130:
 	movw	r0, #65535
 	pop	{r4, r5, r6, pc}
-.L135:
+.L132:
 	.align	2
-.L134:
-	.word	.LANCHOR40
+.L131:
+	.word	.LANCHOR39
 	.word	-1431655765
 	.size	List_pop_index_node, .-List_pop_index_node
 	.section	.text.List_pop_head_node,"ax",%progbits
@@ -1222,39 +1196,39 @@ List_pop_head_node:
 List_get_gc_head_node:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L143
+	ldr	r3, .L140
 	push	{r4, lr}
 	ldr	r3, [r3]
-	cbz	r3, .L142
-	ldr	r2, .L143+4
+	cbz	r3, .L139
+	ldr	r2, .L140+4
 	movs	r4, #6
 	ldr	r1, [r2]
 	movw	r2, #65535
-.L139:
-	cbz	r0, .L140
+.L136:
+	cbz	r0, .L137
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bne	.L141
-.L142:
+	bne	.L138
+.L139:
 	movw	r0, #65535
 	pop	{r4, pc}
-.L141:
+.L138:
 	subs	r0, r0, #1
 	mla	r3, r4, r3, r1
 	uxth	r0, r0
-	b	.L139
-.L140:
-	ldr	r0, .L143+8
+	b	.L136
+.L137:
+	ldr	r0, .L140+8
 	subs	r3, r3, r1
 	asrs	r3, r3, #1
 	muls	r3, r0, r3
 	uxth	r0, r3
 	pop	{r4, pc}
-.L144:
+.L141:
 	.align	2
-.L143:
-	.word	.LANCHOR41
+.L140:
 	.word	.LANCHOR40
+	.word	.LANCHOR39
 	.word	-1431655765
 	.size	List_get_gc_head_node, .-List_get_gc_head_node
 	.section	.text.List_update_data_list,"ax",%progbits
@@ -1268,61 +1242,61 @@ List_get_gc_head_node:
 List_update_data_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L156
+	ldr	r3, .L153
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L147
-	ldr	r3, .L156+4
+	beq	.L144
+	ldr	r3, .L153+4
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L147
-	ldr	r3, .L156+8
+	beq	.L144
+	ldr	r3, .L153+8
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L147
-	ldr	r7, .L156+12
+	beq	.L144
+	ldr	r7, .L153+12
 	movs	r6, #6
-	ldr	r3, .L156+16
+	ldr	r3, .L153+16
 	muls	r6, r0, r6
 	ldr	fp, [r7]
 	ldr	r3, [r3]
 	add	r10, fp, r6
 	cmp	r10, r3
-	beq	.L147
-	ldr	r3, .L156+20
+	beq	.L144
+	ldr	r3, .L153+20
 	ldrh	r5, [r10, #4]
 	ldr	r2, [r3]
 	mov	r8, r3
 	ldrh	r2, [r2, r0, lsl #1]
 	cmp	r5, #0
-	beq	.L154
+	beq	.L151
 	muls	r5, r2, r5
-.L149:
+.L146:
 	ldrh	r3, [r10, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L150
+	bne	.L147
 	ldrh	r2, [fp, r6]
 	cmp	r2, r3
-	bne	.L150
+	bne	.L147
 	movw	r2, #463
-	ldr	r1, .L156+24
-	ldr	r0, .L156+28
+	ldr	r1, .L153+24
+	ldr	r0, .L153+28
 	bl	printf
-.L150:
+.L147:
 	ldrh	r3, [r10, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L151
+	bne	.L148
 	ldrh	r2, [fp, r6]
 	cmp	r2, r3
-	beq	.L147
-.L151:
+	beq	.L144
+.L148:
 	movs	r2, #6
 	muls	r2, r3, r2
-	ldr	r3, .L156+32
+	ldr	r3, .L153+32
 	asrs	r1, r2, #1
 	muls	r3, r1, r3
 	ldr	r1, [r8]
@@ -1330,49 +1304,49 @@ List_update_data_list:
 	ldr	r1, [r7]
 	add	r2, r2, r1
 	ldrh	r3, [r2, #4]
-	cbz	r3, .L155
+	cbz	r3, .L152
 	muls	r3, r0, r3
-.L152:
+.L149:
 	cmp	r5, r3
-	bcs	.L147
-	ldr	r5, .L156+36
+	bcs	.L144
+	ldr	r5, .L153+36
 	mov	r1, r4
-	ldr	r0, .L156+16
+	ldr	r0, .L153+16
 	bl	List_remove_node
 	ldrh	r3, [r5]
-	cbnz	r3, .L153
+	cbnz	r3, .L150
 	mov	r2, #474
-	ldr	r1, .L156+24
-	ldr	r0, .L156+28
+	ldr	r1, .L153+24
+	ldr	r0, .L153+28
 	bl	printf
-.L153:
+.L150:
 	ldrh	r3, [r5]
 	mov	r0, r4
 	subs	r3, r3, #1
 	strh	r3, [r5]	@ movhi
 	bl	INSERT_DATA_LIST
-.L147:
+.L144:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L154:
+.L151:
 	mov	r5, #-1
-	b	.L149
-.L155:
+	b	.L146
+.L152:
 	mov	r3, #-1
-	b	.L152
-.L157:
+	b	.L149
+.L154:
 	.align	2
-.L156:
+.L153:
+	.word	.LANCHOR50
 	.word	.LANCHOR51
 	.word	.LANCHOR52
-	.word	.LANCHOR53
+	.word	.LANCHOR39
 	.word	.LANCHOR40
 	.word	.LANCHOR41
-	.word	.LANCHOR42
-	.word	.LANCHOR54
+	.word	.LANCHOR53
 	.word	.LC1
 	.word	-1431655765
-	.word	.LANCHOR44
+	.word	.LANCHOR43
 	.size	List_update_data_list, .-List_update_data_list
 	.section	.text.select_l2p_ram_region,"ax",%progbits
 	.align	1
@@ -1387,83 +1361,83 @@ select_l2p_ram_region:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r1, #0
-	ldr	r3, .L168
+	ldr	r3, .L165
 	movs	r0, #12
 	movw	r5, #65535
 	ldrh	r2, [r3]
-	ldr	r3, .L168+4
+	ldr	r3, .L165+4
 	ldr	r3, [r3]
-.L159:
+.L156:
 	uxth	r4, r1
 	cmp	r4, r2
-	bcc	.L161
+	bcc	.L158
 	mov	r4, r2
 	movs	r1, #0
 	mov	r6, #-2147483648
 	movs	r7, #12
-.L162:
+.L159:
 	uxth	r5, r1
 	cmp	r5, r2
-	bcc	.L164
+	bcc	.L161
 	cmp	r4, r2
-	bcc	.L160
-	ldr	r1, .L168+8
+	bcc	.L157
+	ldr	r1, .L165+8
 	mov	r4, r2
 	mov	r0, #-1
 	ldrh	r7, [r1]
 	movs	r1, #0
-.L165:
+.L162:
 	uxth	r5, r1
 	cmp	r5, r2
-	bcc	.L167
+	bcc	.L164
 	cmp	r4, r2
-	bcc	.L160
+	bcc	.L157
 	movw	r2, #789
-	ldr	r1, .L168+12
-	ldr	r0, .L168+16
+	ldr	r1, .L165+12
+	ldr	r0, .L165+16
 	bl	printf
-	b	.L160
-.L161:
+	b	.L157
+.L158:
 	adds	r1, r1, #1
 	mla	r6, r0, r1, r3
 	ldrh	r6, [r6, #-12]
 	cmp	r6, r5
-	bne	.L159
-.L160:
+	bne	.L156
+.L157:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, pc}
-.L164:
+.L161:
 	mla	r0, r7, r1, r3
 	ldr	r0, [r0, #4]
 	cmp	r0, #0
-	blt	.L163
+	blt	.L160
 	cmp	r6, r0
 	itt	hi
 	movhi	r6, r0
 	movhi	r4, r5
-.L163:
+.L160:
 	adds	r1, r1, #1
-	b	.L162
-.L167:
+	b	.L159
+.L164:
 	ldr	r6, [r3, #4]
 	cmp	r0, r6
-	bls	.L166
+	bls	.L163
 	ldrh	ip, [r3]
 	cmp	ip, r7
 	itt	ne
 	movne	r0, r6
 	movne	r4, r5
-.L166:
+.L163:
 	adds	r1, r1, #1
 	adds	r3, r3, #12
-	b	.L165
-.L169:
+	b	.L162
+.L166:
 	.align	2
-.L168:
-	.word	.LANCHOR33
+.L165:
+	.word	.LANCHOR32
+	.word	.LANCHOR54
 	.word	.LANCHOR55
 	.word	.LANCHOR56
-	.word	.LANCHOR57
 	.word	.LC1
 	.size	select_l2p_ram_region, .-select_l2p_ram_region
 	.section	.text.FtlUpdateVaildLpn,"ax",%progbits
@@ -1477,106 +1451,50 @@ select_l2p_ram_region:
 FtlUpdateVaildLpn:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L180
+	ldr	r2, .L177
 	push	{r4, r5, r6, lr}
 	mov	r1, r2
 	ldrh	r3, [r2]
 	cmp	r3, #4
-	bhi	.L171
-	cbnz	r0, .L171
+	bhi	.L168
+	cbnz	r0, .L168
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
 	pop	{r4, r5, r6, pc}
-.L171:
+.L168:
 	movs	r3, #0
-	ldr	r0, .L180+4
+	ldr	r0, .L177+4
 	strh	r3, [r1]	@ movhi
 	movw	r6, #65535
-	ldr	r1, .L180+8
+	ldr	r1, .L177+8
 	ldrh	r4, [r0]
 	mov	r0, r3
-	ldr	r2, .L180+12
+	ldr	r2, .L177+12
 	ldr	r1, [r1]
 	str	r3, [r2]
 	add	r4, r1, r4, lsl #1
-.L172:
+.L169:
 	cmp	r1, r4
-	bne	.L174
-	cbz	r3, .L170
+	bne	.L171
+	cbz	r3, .L167
 	str	r0, [r2]
-.L170:
+.L167:
 	pop	{r4, r5, r6, pc}
-.L174:
+.L171:
 	ldrh	r5, [r1], #2
 	cmp	r5, r6
 	itt	ne
 	addne	r0, r0, r5
 	movne	r3, #1
-	b	.L172
-.L181:
+	b	.L169
+.L178:
 	.align	2
-.L180:
+.L177:
+	.word	.LANCHOR57
+	.word	.LANCHOR4
+	.word	.LANCHOR41
 	.word	.LANCHOR58
-	.word	.LANCHOR5
-	.word	.LANCHOR42
-	.word	.LANCHOR59
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
-	.section	.text.ftl_set_blk_mode,"ax",%progbits
-	.align	1
-	.global	ftl_set_blk_mode
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_set_blk_mode, %function
-ftl_set_blk_mode:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	mov	r3, r0
-	cbz	r1, .L183
-	b	ftl_set_blk_mode.part.6
-.L183:
-	ldr	r2, .L184
-	lsrs	r0, r0, #5
-	and	r3, r3, #31
-	ldr	r1, [r2]
-	movs	r2, #1
-	lsl	r3, r2, r3
-	ldr	r2, [r1, r0, lsl #2]
-	bic	r2, r2, r3
-	str	r2, [r1, r0, lsl #2]
-	bx	lr
-.L185:
-	.align	2
-.L184:
-	.word	.LANCHOR1
-	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
-	.section	.text.ftl_get_blk_mode,"ax",%progbits
-	.align	1
-	.global	ftl_get_blk_mode
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_get_blk_mode, %function
-ftl_get_blk_mode:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L187
-	lsrs	r2, r0, #5
-	and	r0, r0, #31
-	ldr	r3, [r3]
-	ldr	r3, [r3, r2, lsl #2]
-	lsr	r0, r3, r0
-	and	r0, r0, #1
-	bx	lr
-.L188:
-	.align	2
-.L187:
-	.word	.LANCHOR1
-	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
 	.section	.text.ftl_sb_update_avl_pages,"ax",%progbits
 	.align	1
 	.global	ftl_sb_update_avl_pages
@@ -1592,14 +1510,14 @@ ftl_sb_update_avl_pages:
 	push	{r4, r5, r6, lr}
 	strh	r3, [r0, #4]	@ movhi
 	movw	r6, #65535
-	ldr	r3, .L196
+	ldr	r3, .L186
 	ldrh	r4, [r3]
 	add	r3, r0, r2, lsl #1
 	adds	r3, r3, #14
-.L190:
+.L180:
 	cmp	r2, r4
-	bcc	.L192
-	ldr	r3, .L196+4
+	bcc	.L182
+	ldr	r3, .L186+4
 	add	r5, r0, #16
 	movw	r6, #65535
 	ldrh	r3, [r3]
@@ -1607,12 +1525,12 @@ ftl_sb_update_avl_pages:
 	subs	r1, r3, r1
 	movs	r3, #0
 	uxth	r1, r1
-.L193:
+.L183:
 	uxth	r2, r3
 	cmp	r4, r2
-	bhi	.L195
+	bhi	.L185
 	pop	{r4, r5, r6, pc}
-.L192:
+.L182:
 	ldrh	r5, [r3, #2]!
 	adds	r2, r2, #1
 	uxth	r2, r2
@@ -1621,8 +1539,8 @@ ftl_sb_update_avl_pages:
 	ldrhne	r5, [r0, #4]
 	addne	r5, r5, #1
 	strhne	r5, [r0, #4]	@ movhi
-	b	.L190
-.L195:
+	b	.L180
+.L185:
 	ldrh	r2, [r5], #2
 	adds	r3, r3, #1
 	cmp	r2, r6
@@ -1630,12 +1548,12 @@ ftl_sb_update_avl_pages:
 	ldrhne	r2, [r0, #4]
 	addne	r2, r2, r1
 	strhne	r2, [r0, #4]	@ movhi
-	b	.L193
-.L197:
+	b	.L183
+.L187:
 	.align	2
-.L196:
-	.word	.LANCHOR3
-	.word	.LANCHOR19
+.L186:
+	.word	.LANCHOR2
+	.word	.LANCHOR18
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
 	.section	.text.FtlSlcSuperblockCheck,"ax",%progbits
 	.align	1
@@ -1650,24 +1568,24 @@ FtlSlcSuperblockCheck:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	ldrh	r3, [r0, #4]
 	push	{r4, r5, lr}
-	cbz	r3, .L198
+	cbz	r3, .L188
 	ldrh	r2, [r0]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L198
+	beq	.L188
 	ldrb	r2, [r0, #6]	@ zero_extendqisi2
 	movs	r5, #0
 	adds	r2, r2, #8
 	ldrh	r1, [r0, r2, lsl #1]
-	ldr	r2, .L204
+	ldr	r2, .L194
 	ldrh	r4, [r2]
 	mov	r2, r3
-.L201:
+.L191:
 	cmp	r1, r2
-	beq	.L203
-.L198:
+	beq	.L193
+.L188:
 	pop	{r4, r5, pc}
-.L203:
+.L193:
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	uxtb	r3, r3
@@ -1681,11 +1599,11 @@ FtlSlcSuperblockCheck:
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r1, [r0, r3, lsl #1]
-	b	.L201
-.L205:
+	b	.L191
+.L195:
 	.align	2
-.L204:
-	.word	.LANCHOR3
+.L194:
+	.word	.LANCHOR2
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
 	.section	.text.make_superblock,"ax",%progbits
 	.align	1
@@ -1698,32 +1616,32 @@ FtlSlcSuperblockCheck:
 make_superblock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L212
+	ldr	r3, .L202
 	ldrh	r2, [r0]
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L207
-	movw	r2, #2148
-	ldr	r1, .L212+4
-	ldr	r0, .L212+8
+	bcc	.L197
+	movw	r2, #2150
+	ldr	r1, .L202+4
+	ldr	r0, .L202+8
 	bl	printf
-.L207:
-	ldr	r3, .L212+12
+.L197:
+	ldr	r3, .L202+12
 	add	r6, r4, #16
-	ldr	r10, .L212+24
+	ldr	r10, .L202+24
 	movw	r7, #65535
 	movs	r5, #0
 	ldrh	r8, [r3]
 	strh	r5, [r4, #4]	@ movhi
 	strb	r5, [r4, #7]
-.L208:
+.L198:
 	uxth	r3, r5
 	ldrh	r1, [r4]
 	cmp	r8, r3
-	bhi	.L210
-	ldr	r2, .L212+16
+	bhi	.L200
+	ldr	r2, .L202+16
 	movs	r0, #0
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r2]
@@ -1731,7 +1649,7 @@ make_superblock:
 	strh	r3, [r4, #4]	@ movhi
 	movs	r3, #0
 	strb	r3, [r4, #9]
-	ldr	r3, .L212+20
+	ldr	r3, .L202+20
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r1, lsl #1]
 	movw	r3, #10000
@@ -1740,31 +1658,31 @@ make_superblock:
 	movhi	r3, #1
 	strbhi	r3, [r4, #9]
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L210:
+.L200:
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
 	strh	r7, [r6]	@ movhi
 	mov	fp, r0
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L209
+	cbnz	r0, .L199
 	strh	fp, [r6]	@ movhi
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	strb	r3, [r4, #7]
-.L209:
+.L199:
 	adds	r5, r5, #1
 	adds	r6, r6, #2
-	b	.L208
-.L213:
+	b	.L198
+.L203:
 	.align	2
-.L212:
-	.word	.LANCHOR5
-	.word	.LANCHOR60
+.L202:
+	.word	.LANCHOR4
+	.word	.LANCHOR59
 	.word	.LC1
-	.word	.LANCHOR3
-	.word	.LANCHOR19
-	.word	.LANCHOR47
-	.word	.LANCHOR13
+	.word	.LANCHOR2
+	.word	.LANCHOR18
+	.word	.LANCHOR46
+	.word	.LANCHOR12
 	.size	make_superblock, .-make_superblock
 	.section	.text.update_multiplier_value,"ax",%progbits
 	.align	1
@@ -1779,50 +1697,50 @@ update_multiplier_value:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
 	movs	r5, #0
-	ldr	r3, .L220
+	ldr	r3, .L210
 	mov	r6, r0
 	mov	r4, r5
-	ldr	r10, .L220+12
+	ldr	r10, .L210+12
 	ldrh	r7, [r3]
-	ldr	r3, .L220+4
+	ldr	r3, .L210+4
 	ldrh	r8, [r3]
-.L215:
+.L205:
 	uxth	r3, r5
 	cmp	r7, r3
-	bhi	.L217
-	cbz	r4, .L219
+	bhi	.L207
+	cbz	r4, .L209
 	mov	r1, r4
 	mov	r0, #32768
 	bl	__aeabi_idiv
-.L218:
-	ldr	r3, .L220+8
+.L208:
+	ldr	r3, .L210+8
 	movs	r2, #6
 	ldr	r3, [r3]
 	mla	r6, r2, r6, r3
 	strh	r0, [r6, #4]	@ movhi
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L217:
+.L207:
 	mov	r1, r6
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L216
+	cbnz	r0, .L206
 	add	r4, r4, r8
 	uxth	r4, r4
-.L216:
+.L206:
 	adds	r5, r5, #1
-	b	.L215
-.L219:
+	b	.L205
+.L209:
 	mov	r0, r4
-	b	.L218
-.L221:
+	b	.L208
+.L211:
 	.align	2
-.L220:
-	.word	.LANCHOR3
-	.word	.LANCHOR19
-	.word	.LANCHOR40
-	.word	.LANCHOR13
+.L210:
+	.word	.LANCHOR2
+	.word	.LANCHOR18
+	.word	.LANCHOR39
+	.word	.LANCHOR12
 	.size	update_multiplier_value, .-update_multiplier_value
 	.section	.text.GetFreeBlockMinEraseCount,"ax",%progbits
 	.align	1
@@ -1836,28 +1754,28 @@ GetFreeBlockMinEraseCount:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L225
+	ldr	r3, .L215
 	ldr	r0, [r3]
-	cbz	r0, .L223
-	ldr	r3, .L225+4
+	cbz	r0, .L213
+	ldr	r3, .L215+4
 	ldr	r3, [r3]
 	subs	r0, r0, r3
-	ldr	r3, .L225+8
+	ldr	r3, .L215+8
 	asrs	r0, r0, #1
 	muls	r0, r3, r0
-	ldr	r3, .L225+12
+	ldr	r3, .L215+12
 	ldr	r3, [r3]
 	uxth	r0, r0
 	ldrh	r0, [r3, r0, lsl #1]
-.L223:
+.L213:
 	bx	lr
-.L226:
+.L216:
 	.align	2
-.L225:
-	.word	.LANCHOR46
-	.word	.LANCHOR40
+.L215:
+	.word	.LANCHOR45
+	.word	.LANCHOR39
 	.word	-1431655765
-	.word	.LANCHOR47
+	.word	.LANCHOR46
 	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
 	.section	.text.GetFreeBlockMaxEraseCount,"ax",%progbits
 	.align	1
@@ -1870,11 +1788,11 @@ GetFreeBlockMinEraseCount:
 GetFreeBlockMaxEraseCount:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L235
+	ldr	r3, .L225
 	push	{r4, r5, r6, lr}
 	ldr	r3, [r3]
-	cbz	r3, .L233
-	ldr	r2, .L235+4
+	cbz	r3, .L223
+	ldr	r2, .L225+4
 	movs	r5, #6
 	movw	r6, #65535
 	ldrh	r2, [r2]
@@ -1883,42 +1801,42 @@ GetFreeBlockMaxEraseCount:
 	cmp	r0, r2
 	it	gt
 	uxthgt	r0, r2
-	ldr	r2, .L235+8
+	ldr	r2, .L225+8
 	ldr	r1, [r2]
-	ldr	r2, .L235+12
+	ldr	r2, .L225+12
 	subs	r3, r3, r1
 	asrs	r3, r3, #1
 	muls	r3, r2, r3
 	movs	r2, #0
 	uxth	r3, r3
-.L230:
+.L220:
 	uxth	r4, r2
 	cmp	r0, r4
-	bls	.L232
+	bls	.L222
 	mul	r4, r5, r3
 	adds	r2, r2, #1
 	ldrh	r4, [r1, r4]
 	cmp	r4, r6
-	bne	.L234
-.L232:
-	ldr	r2, .L235+16
+	bne	.L224
+.L222:
+	ldr	r2, .L225+16
 	ldr	r2, [r2]
 	ldrh	r0, [r2, r3, lsl #1]
 	pop	{r4, r5, r6, pc}
-.L234:
+.L224:
 	mov	r3, r4
-	b	.L230
-.L233:
+	b	.L220
+.L223:
 	mov	r0, r3
 	pop	{r4, r5, r6, pc}
-.L236:
+.L226:
 	.align	2
-.L235:
-	.word	.LANCHOR46
-	.word	.LANCHOR48
-	.word	.LANCHOR40
-	.word	-1431655765
+.L225:
+	.word	.LANCHOR45
 	.word	.LANCHOR47
+	.word	.LANCHOR39
+	.word	-1431655765
+	.word	.LANCHOR46
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
 	.section	.text.free_data_superblock,"ax",%progbits
 	.align	1
@@ -1934,19 +1852,19 @@ free_data_superblock:
 	movw	r2, #65535
 	push	{r3, lr}
 	cmp	r0, r2
-	beq	.L238
-	ldr	r2, .L239
+	beq	.L228
+	ldr	r2, .L229
 	movs	r1, #0
 	ldr	r2, [r2]
 	strh	r1, [r2, r0, lsl #1]	@ movhi
 	bl	INSERT_FREE_LIST
-.L238:
+.L228:
 	movs	r0, #0
 	pop	{r3, pc}
-.L240:
+.L230:
 	.align	2
-.L239:
-	.word	.LANCHOR42
+.L229:
+	.word	.LANCHOR41
 	.size	free_data_superblock, .-free_data_superblock
 	.section	.text.get_new_active_ppa,"ax",%progbits
 	.align	1
@@ -1964,45 +1882,45 @@ get_new_active_ppa:
 	movw	r3, #65535
 	mov	r4, r0
 	cmp	r2, r3
-	bne	.L242
-	movw	r2, #2781
-	ldr	r1, .L256
-	ldr	r0, .L256+4
+	bne	.L232
+	movw	r2, #2785
+	ldr	r1, .L246
+	ldr	r0, .L246+4
 	bl	printf
-.L242:
-	ldr	r6, .L256+8
+.L232:
+	ldr	r6, .L246+8
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r6]
 	cmp	r2, r3
-	bne	.L243
-	movw	r2, #2782
-	ldr	r1, .L256
-	ldr	r0, .L256+4
+	bne	.L233
+	movw	r2, #2786
+	ldr	r1, .L246
+	ldr	r0, .L246+4
 	bl	printf
-.L243:
+.L233:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L244
-	movw	r2, #2783
-	ldr	r1, .L256
-	ldr	r0, .L256+4
+	cbnz	r3, .L234
+	movw	r2, #2787
+	ldr	r1, .L246
+	ldr	r0, .L246+4
 	bl	printf
-.L244:
+.L234:
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	movs	r3, #0
 	strb	r3, [r4, #10]
 	movw	r5, #65535
 	adds	r2, r2, #8
 	ldrh	r0, [r4, r2, lsl #1]
-	ldr	r2, .L256+12
+	ldr	r2, .L246+12
 	ldrh	r1, [r2]
 	mov	r2, r3
-.L245:
+.L235:
 	cmp	r0, r5
-	beq	.L247
+	beq	.L237
 	ldrh	r5, [r4, #2]
 	ldrh	r6, [r6]
 	cmp	r5, r6
-	bcs	.L251
+	bcs	.L241
 	ldrh	r2, [r4, #4]
 	orr	r5, r5, r0, lsl #10
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
@@ -2010,7 +1928,7 @@ get_new_active_ppa:
 	subs	r2, r2, #1
 	uxth	r2, r2
 	strh	r2, [r4, #4]	@ movhi
-.L250:
+.L240:
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r1, r3
@@ -2022,20 +1940,20 @@ get_new_active_ppa:
 	add	r7, r3, #8
 	ldrh	r7, [r4, r7, lsl #1]
 	cmp	r7, r0
-	beq	.L250
+	beq	.L240
 	strb	r3, [r4, #6]
 	ldrh	r3, [r4, #2]
 	cmp	r3, r6
-	bne	.L241
-	cbz	r2, .L241
-	movw	r2, #2806
-	ldr	r1, .L256
-	ldr	r0, .L256+4
+	bne	.L231
+	cbz	r2, .L231
+	movw	r2, #2810
+	ldr	r1, .L246
+	ldr	r0, .L246+4
 	bl	printf
-.L241:
+.L231:
 	mov	r0, r5
 	pop	{r3, r4, r5, r6, r7, pc}
-.L247:
+.L237:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	uxtb	r3, r3
@@ -2049,17 +1967,17 @@ get_new_active_ppa:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r0, [r4, r3, lsl #1]
-	b	.L245
-.L251:
+	b	.L235
+.L241:
 	movw	r5, #65535
-	b	.L241
-.L257:
+	b	.L231
+.L247:
 	.align	2
-.L256:
-	.word	.LANCHOR61
+.L246:
+	.word	.LANCHOR60
 	.word	.LC1
-	.word	.LANCHOR19
-	.word	.LANCHOR3
+	.word	.LANCHOR18
+	.word	.LANCHOR2
 	.size	get_new_active_ppa, .-get_new_active_ppa
 	.section	.text.FtlGcBufInit,"ax",%progbits
 	.align	1
@@ -2074,54 +1992,54 @@ FtlGcBufInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #0
-	ldr	r1, .L263
+	ldr	r1, .L253
 	mov	fp, #1
-	ldr	r2, .L263+4
+	ldr	r2, .L253+4
 	ldr	r5, [r1]
-	ldr	r1, .L263+8
+	ldr	r1, .L253+8
 	str	r3, [r2]
-	ldr	r2, .L263+12
+	ldr	r2, .L253+12
 	mov	r0, r5
 	ldr	r1, [r1]
 	ldrh	r2, [r2]
 	str	r1, [sp, #4]
-	ldr	r1, .L263+16
+	ldr	r1, .L253+16
 	ldrh	r1, [r1]
 	str	r1, [sp]
-	ldr	r1, .L263+20
+	ldr	r1, .L253+20
 	ldr	r10, [r1]
-	ldr	r1, .L263+24
+	ldr	r1, .L253+24
 	ldrh	r7, [r1]
-	ldr	r1, .L263+28
+	ldr	r1, .L253+28
 	ldr	r4, [r1]
 	movs	r1, #12
 	mla	r1, r2, r1, r1
 	adds	r4, r4, #8
 	add	r8, r5, r1
 	mov	r1, r3
-.L259:
+.L249:
 	adds	r0, r0, #12
 	ldr	r6, [sp]
 	cmp	r0, r8
 	add	ip, r3, r7
 	add	r4, r4, #20
 	add	lr, r1, r6
-	bne	.L260
-	ldr	r3, .L263+32
+	bne	.L250
+	ldr	r3, .L253+32
 	mov	lr, #12
 	mov	r8, #0
 	ldr	r0, [r3]
-	ldr	r3, .L263+8
+	ldr	r3, .L253+8
 	ldr	r4, [r3]
-	ldr	r3, .L263+20
+	ldr	r3, .L253+20
 	ldr	ip, [r3]
-.L261:
+.L251:
 	cmp	r2, r0
-	bcc	.L262
+	bcc	.L252
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L260:
+.L250:
 	bic	r1, r1, #3
 	bic	r3, r3, #3
 	mov	r6, r1
@@ -2135,8 +2053,8 @@ FtlGcBufInit:
 	str	r3, [r4, #-16]
 	mov	r3, ip
 	str	r6, [r4, #-20]
-	b	.L259
-.L262:
+	b	.L249
+.L252:
 	ldr	r3, [sp]
 	mul	r10, lr, r2
 	muls	r3, r2, r3
@@ -2151,19 +2069,19 @@ FtlGcBufInit:
 	bic	r3, r3, #3
 	add	r3, r3, ip
 	str	r3, [r1, #4]
-	b	.L261
-.L264:
+	b	.L251
+.L254:
 	.align	2
-.L263:
-	.word	.LANCHOR63
+.L253:
 	.word	.LANCHOR62
+	.word	.LANCHOR61
+	.word	.LANCHOR63
+	.word	.LANCHOR2
+	.word	.LANCHOR22
 	.word	.LANCHOR64
-	.word	.LANCHOR3
 	.word	.LANCHOR23
 	.word	.LANCHOR65
-	.word	.LANCHOR24
 	.word	.LANCHOR66
-	.word	.LANCHOR67
 	.size	FtlGcBufInit, .-FtlGcBufInit
 	.section	.text.FtlGcBufFree,"ax",%progbits
 	.align	1
@@ -2176,43 +2094,43 @@ FtlGcBufInit:
 FtlGcBufFree:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L272
+	ldr	r3, .L262
 	mov	ip, #12
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
 	mov	fp, #20
 	mov	lr, r4
 	ldr	r7, [r3]
-	ldr	r3, .L272+4
+	ldr	r3, .L262+4
 	ldr	r5, [r3]
-.L266:
+.L256:
 	uxth	r3, r4
 	cmp	r1, r3
-	bls	.L265
+	bls	.L255
 	mla	r8, fp, r3, r0
 	movs	r2, #0
-.L267:
+.L257:
 	uxth	r3, r2
 	cmp	r7, r3
-	bls	.L268
+	bls	.L258
 	mul	r3, ip, r3
 	ldr	r6, [r8, #8]
 	adds	r2, r2, #1
 	add	r10, r5, r3
 	ldr	r3, [r5, r3]
 	cmp	r3, r6
-	bne	.L267
+	bne	.L257
 	str	lr, [r10, #8]
-.L268:
+.L258:
 	adds	r4, r4, #1
-	b	.L266
-.L265:
+	b	.L256
+.L255:
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L273:
+.L263:
 	.align	2
-.L272:
-	.word	.LANCHOR67
-	.word	.LANCHOR63
+.L262:
+	.word	.LANCHOR66
+	.word	.LANCHOR62
 	.size	FtlGcBufFree, .-FtlGcBufFree
 	.section	.text.FtlGcBufAlloc,"ax",%progbits
 	.align	1
@@ -2225,45 +2143,45 @@ FtlGcBufFree:
 FtlGcBufAlloc:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L281
+	ldr	r3, .L271
 	movs	r2, #0
 	push	{r4, r5, r6, r7, r8, r10, lr}
 	mov	ip, #12
 	movs	r7, #1
 	mov	lr, #20
 	ldr	r4, [r3]
-	ldr	r3, .L281+4
+	ldr	r3, .L271+4
 	ldr	r5, [r3]
-.L275:
+.L265:
 	uxth	r8, r2
 	cmp	r1, r8
-	bhi	.L279
+	bhi	.L269
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L279:
+.L269:
 	mov	r10, #0
-.L276:
+.L266:
 	uxth	r3, r10
 	cmp	r4, r3
-	bls	.L277
+	bls	.L267
 	mla	r3, ip, r3, r5
 	add	r10, r10, #1
 	ldr	r6, [r3, #8]
 	cmp	r6, #0
-	bne	.L276
+	bne	.L266
 	mla	r8, lr, r8, r0
 	str	r7, [r3, #8]
 	ldr	r6, [r3]
 	ldr	r3, [r3, #4]
 	str	r6, [r8, #8]
 	str	r3, [r8, #12]
-.L277:
+.L267:
 	adds	r2, r2, #1
-	b	.L275
-.L282:
+	b	.L265
+.L272:
 	.align	2
-.L281:
-	.word	.LANCHOR67
-	.word	.LANCHOR63
+.L271:
+	.word	.LANCHOR66
+	.word	.LANCHOR62
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
 	.section	.text.IsBlkInGcList,"ax",%progbits
 	.align	1
@@ -2277,27 +2195,27 @@ IsBlkInGcList:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L288
-	ldr	r2, .L288+4
+	ldr	r3, .L278
+	ldr	r2, .L278+4
 	ldr	r3, [r3]
 	ldrh	r2, [r2]
 	add	r2, r3, r2, lsl #1
-.L284:
+.L274:
 	cmp	r3, r2
-	bne	.L286
+	bne	.L276
 	movs	r0, #0
 	bx	lr
-.L286:
+.L276:
 	ldrh	r1, [r3], #2
 	cmp	r1, r0
-	bne	.L284
+	bne	.L274
 	movs	r0, #1
 	bx	lr
-.L289:
+.L279:
 	.align	2
-.L288:
+.L278:
+	.word	.LANCHOR67
 	.word	.LANCHOR68
-	.word	.LANCHOR69
 	.size	IsBlkInGcList, .-IsBlkInGcList
 	.section	.text.FtlGcUpdatePage,"ax",%progbits
 	.align	1
@@ -2312,35 +2230,35 @@ FtlGcUpdatePage:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r5, r0
-	ldr	r4, .L294
+	ldr	r4, .L284
 	ubfx	r0, r0, #10, #16
 	mov	r6, r1
 	mov	r7, r2
 	bl	P2V_block_in_plane
-	ldr	r3, .L294+4
+	ldr	r3, .L284+4
 	ldrh	r1, [r4]
 	ldr	r2, [r3]
 	movs	r3, #0
-.L291:
+.L281:
 	uxth	ip, r3
 	cmp	ip, r1
-	bcc	.L293
-	bne	.L292
+	bcc	.L283
+	bne	.L282
 	strh	r0, [r2, ip, lsl #1]	@ movhi
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	b	.L292
-.L293:
+	b	.L282
+.L283:
 	adds	r3, r3, #1
 	add	ip, r2, r3, lsl #1
 	ldrh	ip, [ip, #-2]
 	cmp	ip, r0
-	bne	.L291
-.L292:
-	ldr	r2, .L294+8
+	bne	.L281
+.L282:
+	ldr	r2, .L284+8
 	movs	r0, #12
-	ldr	r1, .L294+12
+	ldr	r1, .L284+12
 	ldrh	r3, [r2]
 	ldr	r1, [r1]
 	muls	r0, r3, r0
@@ -2351,13 +2269,13 @@ FtlGcUpdatePage:
 	str	r5, [r1, r0]
 	strh	r3, [r2]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.L295:
+.L285:
 	.align	2
-.L294:
-	.word	.LANCHOR69
+.L284:
 	.word	.LANCHOR68
+	.word	.LANCHOR67
+	.word	.LANCHOR69
 	.word	.LANCHOR70
-	.word	.LANCHOR71
 	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
 	.section	.text.FtlGcRefreshBlock,"ax",%progbits
 	.align	1
@@ -2371,31 +2289,31 @@ FtlGcRefreshBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, lr}
-	ldr	r4, .L299
+	ldr	r4, .L289
 	ldrh	r5, [r4]
 	cmp	r5, r0
-	beq	.L297
-	ldr	r3, .L299+4
+	beq	.L287
+	ldr	r3, .L289+4
 	ldrh	r1, [r3]
 	cmp	r0, r1
-	beq	.L297
+	beq	.L287
 	movw	r2, #65535
 	cmp	r5, r2
-	bne	.L298
+	bne	.L288
 	strh	r0, [r4]	@ movhi
-.L297:
+.L287:
 	movs	r0, #0
 	pop	{r4, r5, pc}
-.L298:
+.L288:
 	cmp	r1, r2
 	it	eq
 	strheq	r0, [r3]	@ movhi
-	b	.L297
-.L300:
+	b	.L287
+.L290:
 	.align	2
-.L299:
-	.word	.LANCHOR72
-	.word	.LANCHOR73
+.L289:
+	.word	.LANCHOR71
+	.word	.LANCHOR72
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
 	.section	.text.FtlGcMarkBadPhyBlk,"ax",%progbits
 	.align	1
@@ -2412,35 +2330,35 @@ FtlGcMarkBadPhyBlk:
 	mov	r4, r0
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-	ldr	r2, .L305
+	ldr	r2, .L295
 	movs	r1, #0
-	ldr	r5, .L305+4
+	ldr	r5, .L295+4
 	ldrh	r3, [r2]
-.L302:
+.L292:
 	uxth	r0, r1
 	cmp	r3, r0
-	bhi	.L304
+	bhi	.L294
 	cmp	r3, #15
 	itttt	ls
 	addls	r1, r3, #1
 	strhls	r1, [r2]	@ movhi
-	ldrls	r2, .L305+4
+	ldrls	r2, .L295+4
 	strhls	r4, [r2, r3, lsl #1]	@ movhi
-	b	.L303
-.L304:
+	b	.L293
+.L294:
 	adds	r1, r1, #1
 	add	r0, r5, r1, lsl #1
 	ldrh	r0, [r0, #-2]
 	cmp	r0, r4
-	bne	.L302
-.L303:
+	bne	.L292
+.L293:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L306:
+.L296:
 	.align	2
-.L305:
+.L295:
+	.word	.LANCHOR73
 	.word	.LANCHOR74
-	.word	.LANCHOR75
 	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
 	.section	.text.FtlGcReFreshBadBlk,"ax",%progbits
 	.align	1
@@ -2453,22 +2371,22 @@ FtlGcMarkBadPhyBlk:
 FtlGcReFreshBadBlk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L313
+	ldr	r3, .L303
 	push	{r4, lr}
 	ldrh	r3, [r3]
-	cbz	r3, .L308
-	ldr	r2, .L313+4
+	cbz	r3, .L298
+	ldr	r2, .L303+4
 	ldrh	r1, [r2]
 	movw	r2, #65535
 	cmp	r1, r2
-	bne	.L308
-	ldr	r4, .L313+8
+	bne	.L298
+	ldr	r4, .L303+8
 	ldrh	r2, [r4]
 	cmp	r2, r3
 	itt	cs
 	movcs	r3, #0
 	strhcs	r3, [r4]	@ movhi
-	ldr	r3, .L313+12
+	ldr	r3, .L303+12
 	ldrh	r2, [r4]
 	ldrh	r0, [r3, r2, lsl #1]
 	bl	P2V_block_in_plane
@@ -2476,16 +2394,16 @@ FtlGcReFreshBadBlk:
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-.L308:
+.L298:
 	movs	r0, #0
 	pop	{r4, pc}
-.L314:
+.L304:
 	.align	2
-.L313:
-	.word	.LANCHOR74
-	.word	.LANCHOR72
-	.word	.LANCHOR76
+.L303:
+	.word	.LANCHOR73
+	.word	.LANCHOR71
 	.word	.LANCHOR75
+	.word	.LANCHOR74
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
 	.section	.text.ftl_malloc,"ax",%progbits
 	.align	1
@@ -2535,48 +2453,48 @@ rknand_print_hex:
 	mov	r10, r3
 	mov	r5, r6
 	mov	r4, r6
-.L318:
+.L308:
 	cmp	r4, r10
-	bcc	.L324
-	ldr	r0, .L327
+	bcc	.L314
+	ldr	r0, .L317
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
 	b	printf
-.L324:
-	cbnz	r5, .L319
+.L314:
+	cbnz	r5, .L309
 	mov	r2, r6
 	mov	r1, fp
-	ldr	r0, .L327+4
+	ldr	r0, .L317+4
 	bl	printf
-.L319:
+.L309:
 	cmp	r8, #4
-	bne	.L320
+	bne	.L310
 	ldr	r1, [r7, r4, lsl #2]
-.L326:
-	ldr	r0, .L327+8
-.L325:
+.L316:
+	ldr	r0, .L317+8
+.L315:
 	adds	r5, r5, #1
 	bl	printf
 	cmp	r5, #15
-	bls	.L323
+	bls	.L313
 	movs	r5, #0
-	ldr	r0, .L327
+	ldr	r0, .L317
 	bl	printf
-.L323:
+.L313:
 	adds	r4, r4, #1
 	add	r6, r6, r8
-	b	.L318
-.L320:
+	b	.L308
+.L310:
 	cmp	r8, #2
-	bne	.L322
+	bne	.L312
 	ldrh	r1, [r7, r4, lsl #1]
-	b	.L326
-.L322:
+	b	.L316
+.L312:
 	ldrb	r1, [r7, r4]	@ zero_extendqisi2
-	ldr	r0, .L327+12
-	b	.L325
-.L328:
+	ldr	r0, .L317+12
+	b	.L315
+.L318:
 	.align	2
-.L327:
+.L317:
 	.word	.LC5
 	.word	.LC2
 	.word	.LC3
@@ -2595,41 +2513,41 @@ FlashEraseBlocks:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-	ldr	r6, .L345
+	ldr	r6, .L335
 	add	r8, r0, #4
 	movs	r7, #0
-	ldr	fp, .L345+20
+	ldr	fp, .L335+20
 	ldrh	r10, [r6, #12]
 	str	r2, [sp]
 	lsl	r3, r10, #3
 	str	r3, [sp, #4]
-.L330:
+.L320:
 	ldr	r3, [sp]
 	cmp	r7, r3
-	beq	.L344
+	beq	.L334
 	add	r2, sp, #8
 	add	r1, sp, #12
 	ldr	r0, [r8]
 	bl	l2p_addr_tran.isra.0
 	ldr	r5, [sp, #8]
-	cbnz	r5, .L331
+	cbnz	r5, .L321
 	ldr	r2, [sp, #12]
 	ldr	r3, [sp, #4]
 	cmp	r3, r2
-	bls	.L331
-	ldr	r6, .L345+4
-	ldr	r7, .L345+8
-.L332:
+	bls	.L321
+	ldr	r6, .L335+4
+	ldr	r7, .L335+8
+.L322:
 	ldr	r3, [sp]
 	adds	r4, r4, #20
 	cmp	r5, r3
-	bne	.L333
-.L344:
+	bne	.L323
+.L334:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L333:
+.L323:
 	mov	r3, #-1
 	ldr	r2, [sp, #12]
 	str	r3, [r4, #-20]
@@ -2640,50 +2558,50 @@ FlashEraseBlocks:
 	movs	r3, #16
 	movs	r2, #4
 	ldr	r1, [r4, #-12]
-	ldr	r0, .L345+12
+	ldr	r0, .L335+12
 	bl	rknand_print_hex
 	movs	r3, #4
 	ldr	r1, [r4, #-8]
 	mov	r2, r3
-	ldr	r0, .L345+16
+	ldr	r0, .L335+16
 	bl	rknand_print_hex
-	b	.L332
-.L331:
+	b	.L322
+.L321:
 	ldr	r2, [fp, #4]
 	uxtb	r0, r5
 	ldr	r1, [sp, #12]
 	blx	r2
-	cbnz	r0, .L334
+	cbnz	r0, .L324
 	str	r0, [r8, #-4]
-.L335:
+.L325:
 	ldrh	r2, [r6, #14]
 	cmp	r2, #4
-	bne	.L337
+	bne	.L327
 	ldr	r1, [sp, #12]
 	ldr	r2, [fp, #4]
 	ldrb	r0, [sp, #8]	@ zero_extendqisi2
 	add	r1, r1, r10
 	blx	r2
-	cbz	r0, .L337
+	cbz	r0, .L327
 	mov	r2, #-1
 	str	r2, [r8, #-4]
-.L337:
+.L327:
 	adds	r7, r7, #1
 	add	r8, r8, #20
-	b	.L330
-.L334:
+	b	.L320
+.L324:
 	mov	r2, #-1
 	str	r2, [r8, #-4]
-	b	.L335
-.L346:
+	b	.L325
+.L336:
 	.align	2
-.L345:
+.L335:
 	.word	.LANCHOR0
-	.word	.LANCHOR77
+	.word	.LANCHOR76
 	.word	.LC6
 	.word	.LC7
 	.word	.LC8
-	.word	.LANCHOR78
+	.word	.LANCHOR77
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
 	.section	.text.FtlFreeSysBlkQueueIn,"ax",%progbits
 	.align	1
@@ -2702,14 +2620,14 @@ FtlFreeSysBlkQueueIn:
 	push	{r4, r5, r6, lr}
 	mov	r5, r0
 	cmp	r3, r2
-	bhi	.L347
-	ldr	r4, .L356
+	bhi	.L337
+	ldr	r4, .L346
 	ldrh	r3, [r4, #6]
 	cmp	r3, #1024
-	beq	.L347
-	cbz	r1, .L349
+	beq	.L337
+	cbz	r1, .L339
 	bl	P2V_block_in_plane
-	ldr	r3, .L356+4
+	ldr	r3, .L346+4
 	mov	r6, r0
 	movs	r2, #1
 	mov	r1, r2
@@ -2717,16 +2635,16 @@ FtlFreeSysBlkQueueIn:
 	lsls	r3, r5, #10
 	str	r3, [r0, #4]
 	bl	FlashEraseBlocks
-	ldr	r3, .L356+8
+	ldr	r3, .L346+8
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r6, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r6, lsl #1]	@ movhi
-	ldr	r2, .L356+12
+	ldr	r2, .L346+12
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
-.L349:
+.L339:
 	ldrh	r3, [r4, #6]
 	adds	r3, r3, #1
 	strh	r3, [r4, #6]	@ movhi
@@ -2736,15 +2654,15 @@ FtlFreeSysBlkQueueIn:
 	ubfx	r3, r3, #0, #10
 	strh	r5, [r4, r2, lsl #1]	@ movhi
 	strh	r3, [r4, #4]	@ movhi
-.L347:
+.L337:
 	pop	{r4, r5, r6, pc}
-.L357:
+.L347:
 	.align	2
-.L356:
-	.word	.LANCHOR38
+.L346:
+	.word	.LANCHOR37
+	.word	.LANCHOR78
+	.word	.LANCHOR46
 	.word	.LANCHOR79
-	.word	.LANCHOR47
-	.word	.LANCHOR80
 	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
 	.section	.text.FtlFreeSysBlkQueueOut,"ax",%progbits
 	.align	1
@@ -2758,9 +2676,9 @@ FtlFreeSysBlkQueueOut:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	ldr	r4, .L363
+	ldr	r4, .L353
 	ldrh	r2, [r4, #6]
-	cbz	r2, .L362
+	cbz	r2, .L352
 	ldrh	r3, [r4, #2]
 	subs	r2, r2, #1
 	strh	r2, [r4, #6]	@ movhi
@@ -2771,39 +2689,39 @@ FtlFreeSysBlkQueueOut:
 	ldrh	r5, [r4, r1, lsl #1]
 	strh	r3, [r4, #2]	@ movhi
 	mov	r1, r2
-	ldr	r3, .L363+4
+	ldr	r3, .L353+4
 	ldr	r0, [r3]
 	lsls	r3, r5, #10
 	str	r3, [r0, #4]
 	bl	FlashEraseBlocks
-	ldr	r2, .L363+8
+	ldr	r2, .L353+8
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
-.L359:
+.L349:
 	subs	r3, r5, #1
 	movw	r2, #65533
 	uxth	r3, r3
 	cmp	r3, r2
-	bls	.L360
+	bls	.L350
 	ldrh	r2, [r4, #6]
 	mov	r1, r5
-	ldr	r0, .L363+12
+	ldr	r0, .L353+12
 	bl	printf
-.L361:
-	b	.L361
-.L362:
+.L351:
+	b	.L351
+.L352:
 	movw	r5, #65535
-	b	.L359
-.L360:
+	b	.L349
+.L350:
 	mov	r0, r5
 	pop	{r3, r4, r5, pc}
-.L364:
+.L354:
 	.align	2
-.L363:
-	.word	.LANCHOR38
+.L353:
+	.word	.LANCHOR37
+	.word	.LANCHOR78
 	.word	.LANCHOR79
-	.word	.LANCHOR80
 	.word	.LC9
 	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
 	.section	.text.ftl_map_blk_alloc_new_blk,"ax",%progbits
@@ -2822,16 +2740,16 @@ ftl_map_blk_alloc_new_blk:
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r4, r0
 	movs	r3, #0
-.L366:
+.L356:
 	uxth	r5, r3
 	cmp	r5, r1
-	bcs	.L369
+	bcs	.L359
 	mov	r7, r2
 	adds	r3, r3, #1
 	ldrh	r6, [r7]
 	adds	r2, r2, #2
 	cmp	r6, #0
-	bne	.L366
+	bne	.L356
 	bl	FtlFreeSysBlkQueueOut
 	subs	r3, r0, #1
 	movw	r2, #65533
@@ -2839,14 +2757,14 @@ ftl_map_blk_alloc_new_blk:
 	mov	r1, r0
 	strh	r0, [r7]	@ movhi
 	cmp	r3, r2
-	bls	.L367
-	ldr	r3, .L373
-	ldr	r0, .L373+4
+	bls	.L357
+	ldr	r3, .L363
+	ldr	r0, .L363+4
 	ldrh	r2, [r3, #6]
 	bl	printf
-.L368:
-	b	.L368
-.L367:
+.L358:
+	b	.L358
+.L357:
 	ldr	r3, [r4, #28]
 	strh	r6, [r4, #2]	@ movhi
 	strh	r5, [r4]	@ movhi
@@ -2855,23 +2773,23 @@ ftl_map_blk_alloc_new_blk:
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-.L369:
+.L359:
 	ldrh	r3, [r4, #10]
 	cmp	r3, r5
-	bhi	.L371
+	bhi	.L361
 	movw	r2, #578
-	ldr	r1, .L373+8
-	ldr	r0, .L373+12
+	ldr	r1, .L363+8
+	ldr	r0, .L363+12
 	bl	printf
-.L371:
+.L361:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L374:
+.L364:
 	.align	2
-.L373:
-	.word	.LANCHOR38
+.L363:
+	.word	.LANCHOR37
 	.word	.LC10
-	.word	.LANCHOR81
+	.word	.LANCHOR80
 	.word	.LC1
 	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
 	.section	.text.ftl_memset,"ax",%progbits
@@ -2899,102 +2817,102 @@ ftl_memset:
 FtlMemInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L381
+	ldr	r3, .L371
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r2, .L381+4
+	ldr	r2, .L371+4
 	movs	r6, #12
 	str	r4, [r3]
-	ldr	r3, .L381+8
-	ldr	r5, .L381+12
-	ldr	r10, .L381+292
+	ldr	r3, .L371+8
+	ldr	r5, .L371+12
+	ldr	r10, .L371+292
 	str	r4, [r3]
-	ldr	r3, .L381+16
+	ldr	r3, .L371+16
 	ldrh	r0, [r5]
-	ldr	r8, .L381+296
+	ldr	r8, .L371+296
 	str	r4, [r3]
-	ldr	r3, .L381+20
+	ldr	r3, .L371+20
 	lsls	r0, r0, #1
-	ldr	fp, .L381+300
+	ldr	fp, .L371+300
 	str	r4, [r3]
-	ldr	r3, .L381+24
+	ldr	r3, .L371+24
 	str	r4, [r3]
-	ldr	r3, .L381+28
+	ldr	r3, .L371+28
 	str	r4, [r3]
-	ldr	r3, .L381+32
+	ldr	r3, .L371+32
 	str	r4, [r3]
-	ldr	r3, .L381+36
+	ldr	r3, .L371+36
 	str	r4, [r3]
-	ldr	r3, .L381+40
+	ldr	r3, .L371+40
 	str	r4, [r3]
-	ldr	r3, .L381+44
+	ldr	r3, .L371+44
 	str	r4, [r3]
-	ldr	r3, .L381+48
+	ldr	r3, .L371+48
 	str	r4, [r3]
-	ldr	r3, .L381+52
+	ldr	r3, .L371+52
 	str	r4, [r3]
-	ldr	r3, .L381+56
+	ldr	r3, .L371+56
 	str	r4, [r3]
-	ldr	r3, .L381+60
+	ldr	r3, .L371+60
 	str	r4, [r3]
-	ldr	r3, .L381+64
+	ldr	r3, .L371+64
 	str	r4, [r3]
 	movw	r3, #65535
 	str	r3, [r2]
-	ldr	r2, .L381+68
+	ldr	r2, .L371+68
 	str	r4, [r2]
-	ldr	r2, .L381+72
+	ldr	r2, .L371+72
 	str	r4, [r2]
-	ldr	r2, .L381+76
+	ldr	r2, .L371+76
 	str	r4, [r2]
-	ldr	r2, .L381+80
+	ldr	r2, .L371+80
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L381+84
+	ldr	r2, .L371+84
 	strh	r3, [r2]	@ movhi
 	movs	r2, #32
-	ldr	r3, .L381+88
+	ldr	r3, .L371+88
 	strh	r2, [r3]	@ movhi
 	movs	r2, #128
-	ldr	r3, .L381+92
+	ldr	r3, .L371+92
 	strh	r2, [r3]	@ movhi
-	ldr	r3, .L381+96
+	ldr	r3, .L371+96
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L381+100
+	ldr	r3, .L371+100
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L381+104
+	ldr	r3, .L371+104
 	strh	r4, [r3]	@ movhi
 	bl	ftl_malloc
-	ldr	r3, .L381+108
+	ldr	r3, .L371+108
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	movs	r5, #20
 	muls	r0, r6, r0
 	bl	ftl_malloc
-	ldr	r3, .L381+112
+	ldr	r3, .L371+112
 	str	r0, [r3]
 	ldrh	r3, [r10]
 	muls	r5, r3, r5
 	lsls	r7, r5, #2
 	mov	r0, r7
 	bl	ftl_malloc
-	ldr	r3, .L381+116
+	ldr	r3, .L371+116
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L381+120
+	ldr	r3, .L371+120
 	str	r0, [r3]
 	mov	r0, r7
 	bl	ftl_malloc
-	ldr	r3, .L381+124
-	ldr	r7, .L381+128
+	ldr	r3, .L371+124
+	ldr	r7, .L371+128
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L381+132
+	ldr	r3, .L371+132
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L381+136
+	ldr	r3, .L371+136
 	ldrh	r5, [r7]
 	str	r0, [r3]
 	ldrh	r3, [r10]
@@ -3003,166 +2921,160 @@ FtlMemInit:
 	adds	r3, r3, #1
 	str	r3, [r8]
 	bl	ftl_malloc
-	ldr	r3, .L381+140
+	ldr	r3, .L371+140
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L381+144
+	ldr	r3, .L371+144
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L381+148
+	ldr	r3, .L371+148
 	str	r0, [r3]
 	ldr	r0, [r8]
 	muls	r0, r5, r0
 	bl	ftl_malloc
-	ldr	r3, .L381+152
+	ldr	r3, .L371+152
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L381+156
+	ldr	r3, .L371+156
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L381+160
+	ldr	r3, .L371+160
 	str	r0, [r3]
 	ldr	r0, [r8]
 	muls	r0, r6, r0
 	bl	ftl_malloc
-	ldr	r3, .L381+164
+	ldr	r3, .L371+164
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L381+168
+	ldr	r3, .L371+168
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L381+172
+	ldr	r3, .L371+172
 	str	r0, [r3]
-	ldr	r3, .L381+176
+	ldr	r3, .L371+176
 	ldrh	r0, [r3]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L381+180
+	ldr	r3, .L371+180
 	ldrh	r5, [r10]
-	ldr	r10, .L381+304
+	ldr	r10, .L371+304
 	str	r0, [r3]
 	ldrh	r3, [fp]
 	muls	r5, r3, r5
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L381+184
+	ldr	r3, .L371+184
 	str	r0, [r3]
 	lsls	r0, r5, #2
-	ldr	r5, .L381+188
+	ldr	r5, .L371+188
 	bl	ftl_malloc
-	ldr	r3, .L381+192
+	ldr	r3, .L371+192
 	str	r0, [r3]
 	ldrh	r3, [fp]
 	ldr	r0, [r8]
-	ldr	r8, .L381+308
+	ldr	r8, .L371+308
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L381+196
+	ldr	r3, .L371+196
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	uxth	r0, r0
 	strh	r0, [r8]	@ movhi
 	bl	ftl_malloc
-	ldr	r3, .L381+200
+	ldr	r3, .L371+200
 	str	r0, [r3]
 	ldrh	r3, [r8]
-	ldr	r0, .L381+204
+	ldr	r0, .L371+204
 	addw	r3, r3, #547
 	lsrs	r3, r3, #9
 	and	r0, r0, r3, lsl #9
 	strh	r3, [r8]	@ movhi
 	bl	ftl_malloc
-	ldr	r3, .L381+208
+	ldr	r3, .L371+208
 	str	r0, [r3]
 	adds	r0, r0, #32
-	ldr	r3, .L381+212
+	ldr	r3, .L371+212
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L381+216
+	ldr	r3, .L371+216
 	str	r0, [r3]
 	ldr	r3, [r10]
 	lsl	r8, r3, #1
 	mov	r0, r8
 	bl	ftl_malloc
-	ldr	r3, .L381+220
+	ldr	r3, .L371+220
 	str	r0, [r3]
 	mov	r0, r8
 	bl	ftl_malloc
-	ldr	r3, .L381+224
-	ldr	r8, .L381+312
-	str	r0, [r3]
-	ldrh	r0, [r5]
-	lsrs	r0, r0, #3
-	adds	r0, r0, #4
-	bl	ftl_malloc
-	ldr	r3, .L381+228
+	ldr	r8, .L371+312
+	ldr	r3, .L371+224
 	str	r0, [r3]
 	ldrh	r0, [r8]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L381+232
+	ldr	r3, .L371+228
 	str	r0, [r3]
 	ldrh	r0, [r8]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L381+236
+	ldr	r3, .L371+232
 	str	r0, [r3]
 	ldrh	r0, [r8]
-	ldr	r8, .L381+316
+	ldr	r8, .L371+316
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L381+240
+	ldr	r3, .L371+236
 	str	r0, [r3]
 	ldrh	r0, [r8]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
 	ldrh	r2, [r8]
 	mov	r1, r4
-	ldr	r3, .L381+244
-	ldr	r4, .L381+248
+	ldr	r3, .L371+240
+	ldr	r4, .L371+244
 	lsls	r2, r2, #2
 	str	r0, [r3]
 	bl	ftl_memset
-	ldr	r3, .L381+252
+	ldr	r3, .L371+248
 	ldrh	r0, [r3]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L381+256
+	ldr	r3, .L371+252
 	str	r0, [r3]
 	ldr	r0, [r10]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L381+260
+	ldr	r3, .L371+256
 	str	r0, [r3]
 	ldrh	r0, [r4]
 	muls	r0, r6, r0
-	ldr	r6, .L381+264
+	ldr	r6, .L371+260
 	bl	ftl_malloc
-	ldr	r3, .L381+268
+	ldr	r3, .L371+264
 	str	r0, [r3]
 	ldrh	r3, [r4]
 	ldrh	r0, [r7]
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L381+272
+	ldr	r3, .L371+268
 	str	r0, [r3]
 	movs	r0, #6
 	ldrh	r3, [r5]
-	ldr	r5, .L381+276
+	ldr	r5, .L371+272
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L381+280
+	ldr	r3, .L371+276
 	str	r0, [r3]
-	ldr	r3, .L381+284
+	ldr	r3, .L371+280
 	ldrh	r0, [r3]
 	ldrh	r3, [r6]
 	adds	r0, r0, #31
@@ -3173,20 +3085,32 @@ FtlMemInit:
 	bl	ftl_malloc
 	ldrh	r1, [r5]
 	movs	r2, #1
-	ldr	r3, .L381+288
+	ldr	r3, .L371+284
 	ldrh	r6, [r6]
 	lsls	r1, r1, #2
 	mov	r4, r3
 	str	r0, [r4, #28]!
 	mov	r0, r1
-	b	.L382
-.L383:
+.L367:
+	cmp	r2, r6
+	bcc	.L368
+	add	r3, r3, r2, lsl #2
+	ldr	r2, .L371+288
+	movs	r1, #0
+	adds	r3, r3, #24
+.L369:
+	cmp	r3, r2
+	bne	.L370
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L372:
 	.align	2
-.L381:
+.L371:
+	.word	.LANCHOR81
+	.word	.LANCHOR95
 	.word	.LANCHOR82
-	.word	.LANCHOR96
+	.word	.LANCHOR20
 	.word	.LANCHOR83
-	.word	.LANCHOR21
 	.word	.LANCHOR84
 	.word	.LANCHOR85
 	.word	.LANCHOR86
@@ -3194,102 +3118,84 @@ FtlMemInit:
 	.word	.LANCHOR88
 	.word	.LANCHOR89
 	.word	.LANCHOR90
+	.word	.LANCHOR79
 	.word	.LANCHOR91
-	.word	.LANCHOR80
 	.word	.LANCHOR92
 	.word	.LANCHOR93
 	.word	.LANCHOR94
-	.word	.LANCHOR95
+	.word	.LANCHOR96
 	.word	.LANCHOR97
 	.word	.LANCHOR98
-	.word	.LANCHOR99
+	.word	.LANCHOR71
 	.word	.LANCHOR72
-	.word	.LANCHOR73
+	.word	.LANCHOR99
 	.word	.LANCHOR100
 	.word	.LANCHOR101
+	.word	.LANCHOR73
+	.word	.LANCHOR75
+	.word	.LANCHOR67
+	.word	.LANCHOR70
 	.word	.LANCHOR102
-	.word	.LANCHOR74
-	.word	.LANCHOR76
-	.word	.LANCHOR68
-	.word	.LANCHOR71
 	.word	.LANCHOR103
 	.word	.LANCHOR104
+	.word	.LANCHOR22
+	.word	.LANCHOR78
+	.word	.LANCHOR65
 	.word	.LANCHOR105
-	.word	.LANCHOR23
-	.word	.LANCHOR79
-	.word	.LANCHOR66
 	.word	.LANCHOR106
 	.word	.LANCHOR107
+	.word	.LANCHOR63
 	.word	.LANCHOR108
-	.word	.LANCHOR64
 	.word	.LANCHOR109
+	.word	.LANCHOR62
 	.word	.LANCHOR110
-	.word	.LANCHOR63
 	.word	.LANCHOR111
+	.word	.LANCHOR11
 	.word	.LANCHOR112
-	.word	.LANCHOR12
 	.word	.LANCHOR113
+	.word	.LANCHOR5
 	.word	.LANCHOR114
-	.word	.LANCHOR6
-	.word	.LANCHOR115
-	.word	.LANCHOR65
-	.word	.LANCHOR117
+	.word	.LANCHOR64
+	.word	.LANCHOR116
 	.word	33553920
+	.word	.LANCHOR117
+	.word	.LANCHOR46
+	.word	.LANCHOR41
 	.word	.LANCHOR118
-	.word	.LANCHOR47
-	.word	.LANCHOR42
 	.word	.LANCHOR119
+	.word	.LANCHOR35
 	.word	.LANCHOR120
-	.word	.LANCHOR1
-	.word	.LANCHOR36
 	.word	.LANCHOR121
 	.word	.LANCHOR122
-	.word	.LANCHOR123
-	.word	.LANCHOR33
 	.word	.LANCHOR32
+	.word	.LANCHOR31
+	.word	.LANCHOR123
 	.word	.LANCHOR124
+	.word	.LANCHOR9
+	.word	.LANCHOR54
 	.word	.LANCHOR125
-	.word	.LANCHOR10
-	.word	.LANCHOR55
 	.word	.LANCHOR126
-	.word	.LANCHOR127
-	.word	.LANCHOR40
-	.word	.LANCHOR17
-	.word	.LANCHOR37
-	.word	.LANCHOR3
-	.word	.LANCHOR67
-	.word	.LANCHOR24
-	.word	.LANCHOR30
-	.word	.LANCHOR116
+	.word	.LANCHOR39
+	.word	.LANCHOR16
+	.word	.LANCHOR36
+	.word	.LANCHOR36+56
+	.word	.LANCHOR2
+	.word	.LANCHOR66
+	.word	.LANCHOR23
+	.word	.LANCHOR29
+	.word	.LANCHOR115
+	.word	.LANCHOR26
 	.word	.LANCHOR27
-	.word	.LANCHOR28
-.L382:
-.L377:
-	cmp	r2, r6
-	bcc	.L378
-	add	r3, r3, r2, lsl #2
-	ldr	r2, .L384
-	movs	r1, #0
-	adds	r3, r3, #24
-.L379:
-	cmp	r3, r2
-	bne	.L380
-	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L378:
+.L368:
 	ldr	r5, [r3, #28]
 	adds	r2, r2, #1
 	add	r5, r5, r0
 	add	r0, r0, r1
 	str	r5, [r4, #4]!
-	b	.L377
-.L380:
+	b	.L367
+.L370:
 	str	r1, [r3, #4]!
-	b	.L379
-.L385:
-	.align	2
-.L384:
-	.word	.LANCHOR37+56
+	b	.L369
 	.size	FtlMemInit, .-FtlMemInit
 	.section	.text.FtlBbt2Bitmap,"ax",%progbits
 	.align	1
@@ -3302,32 +3208,32 @@ FtlMemInit:
 FtlBbt2Bitmap:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L392
+	ldr	r3, .L379
 	push	{r4, r5, r6, r7, r8, lr}
 	mov	r5, r0
-	ldr	r7, .L392+4
+	ldr	r7, .L379+4
 	mov	r6, r1
 	subs	r4, r5, #2
 	addw	r5, r5, #1022
 	ldrh	r2, [r3]
 	movs	r1, #0
-	ldr	r8, .L392+12
+	ldr	r8, .L379+12
 	mov	r0, r6
 	lsls	r2, r2, #2
 	bl	ftl_memset
-.L389:
+.L376:
 	ldrh	r3, [r4, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L386
+	beq	.L373
 	ldrh	r2, [r7]
 	cmp	r2, r3
-	bhi	.L388
+	bhi	.L375
 	movs	r2, #74
 	mov	r1, r8
-	ldr	r0, .L392+8
+	ldr	r0, .L379+8
 	bl	printf
-.L388:
+.L375:
 	ldrh	r3, [r4, #2]!
 	movs	r2, #1
 	cmp	r5, r4
@@ -3337,16 +3243,16 @@ FtlBbt2Bitmap:
 	ldr	r2, [r6, r1, lsl #2]
 	orr	r2, r2, r3
 	str	r2, [r6, r1, lsl #2]
-	bne	.L389
-.L386:
+	bne	.L376
+.L373:
 	pop	{r4, r5, r6, r7, r8, pc}
-.L393:
+.L380:
 	.align	2
-.L392:
-	.word	.LANCHOR127
-	.word	.LANCHOR17
+.L379:
+	.word	.LANCHOR126
+	.word	.LANCHOR16
 	.word	.LC1
-	.word	.LANCHOR128
+	.word	.LANCHOR127
 	.size	FtlBbt2Bitmap, .-FtlBbt2Bitmap
 	.section	.text.FtlBbtMemInit,"ax",%progbits
 	.align	1
@@ -3360,7 +3266,7 @@ FtlBbtMemInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r0, .L395
+	ldr	r0, .L382
 	movw	r3, #65535
 	movs	r2, #16
 	movs	r1, #255
@@ -3369,10 +3275,10 @@ FtlBbtMemInit:
 	strh	r3, [r0, #6]	@ movhi
 	adds	r0, r0, #12
 	b	ftl_memset
-.L396:
+.L383:
 	.align	2
-.L395:
-	.word	.LANCHOR37
+.L382:
+	.word	.LANCHOR36
 	.size	FtlBbtMemInit, .-FtlBbtMemInit
 	.section	.text.FtlFreeSysBlkQueueInit,"ax",%progbits
 	.align	1
@@ -3385,7 +3291,7 @@ FtlBbtMemInit:
 FtlFreeSysBlkQueueInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L398
+	ldr	r3, .L385
 	mov	r2, #2048
 	push	{r4, lr}
 	movs	r4, #0
@@ -3398,10 +3304,10 @@ FtlFreeSysBlkQueueInit:
 	bl	ftl_memset
 	mov	r0, r4
 	pop	{r4, pc}
-.L399:
+.L386:
 	.align	2
-.L398:
-	.word	.LANCHOR38
+.L385:
+	.word	.LANCHOR37
 	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
 	.section	.text.ftl_free_no_use_map_blk,"ax",%progbits
 	.align	1
@@ -3425,12 +3331,12 @@ ftl_free_no_use_map_blk:
 	mov	r0, r5
 	bl	ftl_memset
 	movs	r3, #0
-.L401:
+.L388:
 	ldrh	r1, [r4, #6]
 	uxth	r2, r3
 	cmp	r1, r2
-	bhi	.L405
-	ldr	r3, .L420
+	bhi	.L392
+	ldr	r3, .L407
 	movs	r6, #0
 	mov	r10, r6
 	ldrh	r2, [r3]
@@ -3438,59 +3344,59 @@ ftl_free_no_use_map_blk:
 	strh	r2, [r5, r3, lsl #1]	@ movhi
 	mov	r2, r6
 	ldrh	fp, [r5]
-.L406:
+.L393:
 	ldrh	r3, [r4, #10]
 	uxth	ip, r6
 	cmp	r3, ip
-	bhi	.L410
+	bhi	.L397
 	mov	r0, r10
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L405:
+.L392:
 	uxth	r2, r3
 	ldr	r1, [r6, r2, lsl #2]
 	movs	r2, #0
 	ubfx	r1, r1, #10, #16
-.L402:
+.L389:
 	ldrh	ip, [r4, #10]
 	uxth	r0, r2
 	cmp	ip, r0
-	bhi	.L404
+	bhi	.L391
 	adds	r3, r3, #1
-	b	.L401
-.L404:
+	b	.L388
+.L391:
 	uxth	r0, r2
 	ldrh	ip, [r7, r0, lsl #1]
 	cmp	ip, r1
-	bne	.L403
-	cbz	r1, .L403
+	bne	.L390
+	cbz	r1, .L390
 	ldrh	ip, [r5, r0, lsl #1]
 	add	ip, ip, #1
 	strh	ip, [r5, r0, lsl #1]	@ movhi
-.L403:
+.L390:
 	adds	r2, r2, #1
-	b	.L402
-.L410:
+	b	.L389
+.L397:
 	uxth	r1, r6
 	ldrh	r3, [r5, r1, lsl #1]
 	lsl	r8, r1, #1
 	cmp	fp, r3
-	bls	.L407
+	bls	.L394
 	ldrh	r0, [r7, r1, lsl #1]
 	add	r8, r8, r7
-	cbnz	r0, .L408
-.L409:
+	cbnz	r0, .L395
+.L396:
 	adds	r6, r6, #1
-	b	.L406
-.L407:
+	b	.L393
+.L394:
 	cmp	r3, #0
-	bne	.L409
+	bne	.L396
 	ldrh	r0, [r7, r1, lsl #1]
 	add	r8, r8, r7
 	cmp	r0, #0
-	beq	.L409
-.L411:
+	beq	.L396
+.L398:
 	movs	r1, #1
 	str	r2, [sp, #4]
 	bl	FtlFreeSysBlkQueueIn
@@ -3499,17 +3405,17 @@ ftl_free_no_use_map_blk:
 	ldrh	r3, [r4, #8]
 	subs	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	b	.L409
-.L408:
+	b	.L396
+.L395:
 	mov	r10, ip
 	mov	fp, r3
 	cmp	r3, #0
-	beq	.L411
-	b	.L409
-.L421:
+	beq	.L398
+	b	.L396
+.L408:
 	.align	2
-.L420:
-	.word	.LANCHOR20
+.L407:
+	.word	.LANCHOR19
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.section	.text.FtlL2PDataInit,"ax",%progbits
 	.align	1
@@ -3524,14 +3430,14 @@ FtlL2PDataInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r1, #0
-	ldr	r5, .L425
-	ldr	r4, .L425+4
+	ldr	r5, .L412
+	ldr	r4, .L412+4
 	ldr	r2, [r5]
-	ldr	r7, .L425+8
-	ldr	r6, .L425+12
+	ldr	r7, .L412+8
+	ldr	r6, .L412+12
 	ldr	r0, [r4]
 	lsls	r2, r2, #1
-	ldr	r8, .L425+44
+	ldr	r8, .L412+44
 	bl	ftl_memset
 	ldrh	r3, [r7]
 	movs	r1, #255
@@ -3539,7 +3445,7 @@ FtlL2PDataInit:
 	ldr	r0, [r8]
 	muls	r2, r3, r2
 	bl	ftl_memset
-	ldr	r3, .L425+16
+	ldr	r3, .L412+16
 	movw	r0, #65535
 	ldrh	r1, [r6]
 	ldr	ip, [r8]
@@ -3550,59 +3456,59 @@ FtlL2PDataInit:
 	adds	r1, r2, r3
 	movs	r3, #0
 	mov	lr, r3
-.L423:
+.L410:
 	adds	r2, r2, #12
 	adds	r6, r3, r7
 	cmp	r2, r1
-	bne	.L424
-	ldr	r3, .L425+20
+	bne	.L411
+	ldr	r3, .L412+20
 	ldr	r2, [r5]
 	strh	r0, [r3, #2]	@ movhi
 	strh	r2, [r3, #10]	@ movhi
 	movw	r2, #61634
 	strh	r2, [r3, #4]	@ movhi
-	ldr	r2, .L425+24
+	ldr	r2, .L412+24
 	strh	r0, [r3]	@ movhi
 	ldrh	r2, [r2]
 	strh	r2, [r3, #8]	@ movhi
-	ldr	r2, .L425+28
+	ldr	r2, .L412+28
 	ldrh	r2, [r2]
 	strh	r2, [r3, #6]	@ movhi
-	ldr	r2, .L425+32
+	ldr	r2, .L412+32
 	ldr	r2, [r2]
 	str	r2, [r3, #12]
-	ldr	r2, .L425+36
+	ldr	r2, .L412+36
 	ldr	r2, [r2]
 	str	r2, [r3, #16]
 	ldr	r2, [r4]
 	str	r2, [r3, #20]
-	ldr	r2, .L425+40
+	ldr	r2, .L412+40
 	ldr	r2, [r2]
 	str	r2, [r3, #24]
 	pop	{r4, r5, r6, r7, r8, pc}
-.L424:
+.L411:
 	bic	r3, r3, #3
 	str	lr, [r2, #-8]
 	add	r3, r3, ip
 	strh	r0, [r2, #-12]	@ movhi
 	str	r3, [r2, #-4]
 	mov	r3, r6
-	b	.L423
-.L426:
+	b	.L410
+.L413:
 	.align	2
-.L425:
-	.word	.LANCHOR30
-	.word	.LANCHOR120
-	.word	.LANCHOR23
-	.word	.LANCHOR33
-	.word	.LANCHOR55
-	.word	.LANCHOR129
-	.word	.LANCHOR130
-	.word	.LANCHOR32
+.L412:
+	.word	.LANCHOR29
 	.word	.LANCHOR119
-	.word	.LANCHOR125
-	.word	.LANCHOR124
-	.word	.LANCHOR126
+	.word	.LANCHOR22
+	.word	.LANCHOR32
+	.word	.LANCHOR54
+	.word	.LANCHOR128
+	.word	.LANCHOR129
+	.word	.LANCHOR31
+	.word	.LANCHOR118
+	.word	.LANCHOR124
+	.word	.LANCHOR123
+	.word	.LANCHOR125
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
 	.section	.text.FtlVariablesInit,"ax",%progbits
 	.align	1
@@ -3617,65 +3523,65 @@ FtlVariablesInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movw	r2, #65535
-	ldr	r3, .L428
+	ldr	r3, .L415
 	movs	r4, #0
 	mov	r1, r4
-	ldr	r5, .L428+4
+	ldr	r5, .L415+4
 	strh	r2, [r3]	@ movhi
 	mov	r2, #-1
-	ldr	r3, .L428+8
+	ldr	r3, .L415+8
 	str	r4, [r3]
-	ldr	r3, .L428+12
+	ldr	r3, .L415+12
 	str	r4, [r3]
-	ldr	r3, .L428+16
+	ldr	r3, .L415+16
 	str	r2, [r3]
-	ldr	r3, .L428+20
+	ldr	r3, .L415+20
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L428+24
+	ldr	r3, .L415+24
 	ldrh	r2, [r3]
-	ldr	r3, .L428+28
+	ldr	r3, .L415+28
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L428+32
+	ldr	r3, .L415+32
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L428+36
+	ldr	r3, .L415+36
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	mov	r1, r4
 	movs	r2, #48
-	ldr	r0, .L428+40
+	ldr	r0, .L415+40
 	bl	ftl_memset
 	mov	r2, #512
 	mov	r1, r4
-	ldr	r0, .L428+44
+	ldr	r0, .L415+44
 	bl	ftl_memset
 	bl	FtlGcBufInit
 	bl	FtlL2PDataInit
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L429:
+.L416:
 	.align	2
-.L428:
+.L415:
+	.word	.LANCHOR130
+	.word	.LANCHOR5
 	.word	.LANCHOR131
-	.word	.LANCHOR6
 	.word	.LANCHOR132
 	.word	.LANCHOR133
-	.word	.LANCHOR134
+	.word	.LANCHOR34
+	.word	.LANCHOR26
 	.word	.LANCHOR35
-	.word	.LANCHOR27
-	.word	.LANCHOR36
-	.word	.LANCHOR47
-	.word	.LANCHOR117
-	.word	.LANCHOR39
-	.word	.LANCHOR135
+	.word	.LANCHOR46
+	.word	.LANCHOR116
+	.word	.LANCHOR38
+	.word	.LANCHOR134
 	.size	FtlVariablesInit, .-FtlVariablesInit
 	.section	.text.SupperBlkListInit,"ax",%progbits
 	.align	1
@@ -3690,10 +3596,10 @@ SupperBlkListInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r2, #6
-	ldr	r3, .L441
+	ldr	r3, .L428
 	movs	r1, #0
 	movs	r4, #0
-	ldr	r6, .L441+4
+	ldr	r6, .L428+4
 	mov	r8, r4
 	ldrh	r3, [r3]
 	mov	r5, r4
@@ -3701,135 +3607,135 @@ SupperBlkListInit:
 	mov	r10, r6
 	muls	r2, r3, r2
 	bl	ftl_memset
-	ldr	r3, .L441+8
-	ldr	r2, .L441+12
+	ldr	r3, .L428+8
+	ldr	r2, .L428+12
 	str	r4, [r3]
-	ldr	r3, .L441+16
+	ldr	r3, .L428+16
 	strh	r4, [r2]	@ movhi
 	str	r2, [sp, #4]
 	str	r4, [r3]
-	ldr	r3, .L441+20
+	ldr	r3, .L428+20
 	str	r4, [r3]
-	ldr	r3, .L441+24
+	ldr	r3, .L428+24
 	mov	fp, r3
 	strh	r4, [r3]	@ movhi
-.L431:
-	ldr	r3, .L441+28
+.L418:
+	ldr	r3, .L428+28
 	uxth	r7, r4
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	bcs	.L438
-	ldr	r3, .L441+32
+	bcs	.L425
+	ldr	r3, .L428+32
 	ldrh	r2, [r3]
-	ldr	r3, .L441+36
+	ldr	r3, .L428+36
 	ldrh	r3, [r3]
 	str	r3, [sp]
 	movs	r3, #0
 	mov	r6, r3
-	b	.L439
-.L433:
+	b	.L426
+.L420:
 	str	r2, [sp, #12]
 	mov	r1, r7
-	ldr	r2, .L441+40
+	ldr	r2, .L428+40
 	str	r3, [sp, #8]
 	ldrb	r0, [r2, r3]	@ zero_extendqisi2
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #12]
-	cbnz	r0, .L432
+	cbnz	r0, .L419
 	ldr	r1, [sp]
 	add	r6, r6, r1
 	uxth	r6, r6
-.L432:
+.L419:
 	adds	r3, r3, #1
-.L439:
+.L426:
 	uxth	r1, r3
 	cmp	r2, r1
-	bhi	.L433
+	bhi	.L420
 	uxth	r3, r4
-	cbz	r6, .L434
+	cbz	r6, .L421
 	mov	r1, r6
 	str	r3, [sp]
 	mov	r0, #32768
 	bl	__aeabi_idiv
 	ldr	r3, [sp]
 	uxth	r6, r0
-.L435:
+.L422:
 	ldr	r1, [r10]
 	movs	r2, #6
 	mla	r2, r2, r3, r1
 	strh	r6, [r2, #4]	@ movhi
-	ldr	r2, .L441+44
+	ldr	r2, .L428+44
 	ldrh	r2, [r2]
 	cmp	r2, r7
-	beq	.L436
-	ldr	r2, .L441+48
+	beq	.L423
+	ldr	r2, .L428+48
 	ldrh	r2, [r2]
 	cmp	r2, r7
-	beq	.L436
-	ldr	r2, .L441+52
+	beq	.L423
+	ldr	r2, .L428+52
 	ldrh	r2, [r2]
 	cmp	r2, r7
-	beq	.L436
-	ldr	r2, .L441+56
+	beq	.L423
+	ldr	r2, .L428+56
 	ldr	r2, [r2]
 	ldrh	r3, [r2, r3, lsl #1]
-	cbnz	r3, .L437
+	cbnz	r3, .L424
 	add	r8, r8, #1
 	mov	r0, r7
 	uxth	r8, r8
 	bl	INSERT_FREE_LIST
-.L436:
+.L423:
 	adds	r4, r4, #1
-	b	.L431
-.L434:
-	ldr	r2, .L441+56
+	b	.L418
+.L421:
+	ldr	r2, .L428+56
 	movw	r1, #65535
 	ldr	r2, [r2]
 	strh	r1, [r2, r3, lsl #1]	@ movhi
-	b	.L435
-.L437:
+	b	.L422
+.L424:
 	adds	r5, r5, #1
 	mov	r0, r7
 	uxth	r5, r5
 	bl	INSERT_DATA_LIST
-	b	.L436
-.L438:
+	b	.L423
+.L425:
 	ldr	r2, [sp, #4]
 	strh	r8, [fp]	@ movhi
 	strh	r5, [r2]	@ movhi
 	add	r5, r5, r8
 	cmp	r5, r3
-	ble	.L440
-	movw	r2, #2210
-	ldr	r1, .L441+60
-	ldr	r0, .L441+64
+	ble	.L427
+	movw	r2, #2212
+	ldr	r1, .L428+60
+	ldr	r0, .L428+64
 	bl	printf
-.L440:
+.L427:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L442:
+.L429:
 	.align	2
-.L441:
-	.word	.LANCHOR6
-	.word	.LANCHOR40
-	.word	.LANCHOR46
-	.word	.LANCHOR44
-	.word	.LANCHOR41
-	.word	.LANCHOR43
-	.word	.LANCHOR48
+.L428:
 	.word	.LANCHOR5
-	.word	.LANCHOR3
-	.word	.LANCHOR19
-	.word	.LANCHOR13
+	.word	.LANCHOR39
+	.word	.LANCHOR45
+	.word	.LANCHOR43
+	.word	.LANCHOR40
+	.word	.LANCHOR42
+	.word	.LANCHOR47
+	.word	.LANCHOR4
+	.word	.LANCHOR2
+	.word	.LANCHOR18
+	.word	.LANCHOR12
+	.word	.LANCHOR50
 	.word	.LANCHOR51
 	.word	.LANCHOR52
-	.word	.LANCHOR53
-	.word	.LANCHOR42
-	.word	.LANCHOR136
+	.word	.LANCHOR41
+	.word	.LANCHOR135
 	.word	.LC1
 	.size	SupperBlkListInit, .-SupperBlkListInit
 	.section	.text.FtlGcPageVarInit,"ax",%progbits
@@ -3843,16 +3749,16 @@ SupperBlkListInit:
 FtlGcPageVarInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L444
+	ldr	r2, .L431
 	movs	r3, #0
 	push	{r4, lr}
 	movs	r1, #255
-	ldr	r4, .L444+4
+	ldr	r4, .L431+4
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L444+8
+	ldr	r2, .L431+8
 	strh	r3, [r2]	@ movhi
 	ldrh	r2, [r4]
-	ldr	r3, .L444+12
+	ldr	r3, .L431+12
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
@@ -3860,19 +3766,19 @@ FtlGcPageVarInit:
 	movs	r2, #12
 	movs	r1, #255
 	muls	r2, r3, r2
-	ldr	r3, .L444+16
+	ldr	r3, .L431+16
 	ldr	r0, [r3]
 	bl	ftl_memset
 	pop	{r4, lr}
 	b	FtlGcBufInit
-.L445:
+.L432:
 	.align	2
-.L444:
+.L431:
+	.word	.LANCHOR68
+	.word	.LANCHOR20
 	.word	.LANCHOR69
-	.word	.LANCHOR21
+	.word	.LANCHOR67
 	.word	.LANCHOR70
-	.word	.LANCHOR68
-	.word	.LANCHOR71
 	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
 	.section	.text.FlashGetBadBlockList,"ax",%progbits
 	.align	1
@@ -3891,40 +3797,40 @@ FlashGetBadBlockList:
 	movs	r1, #255
 	mov	r4, r0
 	bl	ftl_memset
-	ldr	r3, .L453
+	ldr	r3, .L440
 	mov	r1, r5
 	mov	r0, r4
 	ldr	r3, [r3]
 	blx	r3
 	uxth	r0, r0
 	cmp	r0, #50
-	bls	.L447
+	bls	.L434
 	mov	r2, #256
 	movs	r1, #255
 	mov	r0, r4
 	bl	ftl_memset
 	movs	r0, #0
-.L447:
-	ldr	r3, .L453+4
+.L434:
+	ldr	r3, .L440+4
 	ldrh	r3, [r3, #14]
 	cmp	r3, #4
-	bne	.L452
+	bne	.L439
 	add	r1, r4, r0, lsl #1
 	mov	r3, r4
-.L449:
+.L436:
 	cmp	r3, r1
-	bne	.L450
-.L452:
+	bne	.L437
+.L439:
 	pop	{r3, r4, r5, pc}
-.L450:
+.L437:
 	ldrh	r2, [r3]
 	lsrs	r2, r2, #1
 	strh	r2, [r3], #2	@ movhi
-	b	.L449
-.L454:
+	b	.L436
+.L441:
 	.align	2
-.L453:
-	.word	.LANCHOR78
+.L440:
+	.word	.LANCHOR77
 	.word	.LANCHOR0
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
 	.section	.text.ftl_memcpy,"ax",%progbits
@@ -3954,48 +3860,48 @@ FlashReadPages:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	fp, r1
-	ldr	r3, .L496
+	ldr	r3, .L483
 	mov	r4, r0
 	mov	r10, #0
 	ldrh	r2, [r3, #12]
 	str	r3, [sp, #4]
 	str	r2, [sp]
-.L457:
+.L444:
 	cmp	r10, fp
-	bne	.L471
+	bne	.L458
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L471:
+.L458:
 	ldr	r3, [r4, #8]
-	cbz	r3, .L458
+	cbz	r3, .L445
 	ldr	r3, [r4, #12]
-	cbnz	r3, .L459
-.L458:
+	cbnz	r3, .L446
+.L445:
 	movs	r2, #90
-	ldr	r1, .L496+4
-	ldr	r0, .L496+8
+	ldr	r1, .L483+4
+	ldr	r0, .L483+8
 	bl	printf
-.L459:
+.L446:
 	add	r2, sp, #8
 	add	r1, sp, #12
 	ldr	r0, [r4, #4]
 	bl	l2p_addr_tran.isra.0
 	ldr	r0, [sp, #8]
 	cmp	r0, #3
-	bls	.L460
+	bls	.L447
 	mov	r3, #-1
 	str	r3, [r4]
-.L461:
+.L448:
 	add	r10, r10, #1
 	adds	r4, r4, #20
-	b	.L457
-.L460:
+	b	.L444
+.L447:
 	ldr	r5, [r4, #8]
 	uxtb	r0, r0
-	ldr	r8, .L496+32
-	ldr	r7, .L496+12
+	ldr	r8, .L483+32
+	ldr	r7, .L483+12
 	tst	r5, #63
 	ldr	r3, [r4, #12]
 	it	ne
@@ -4008,7 +3914,7 @@ FlashReadPages:
 	str	r0, [r4]
 	ldrh	r3, [r3, #14]
 	cmp	r3, #4
-	bne	.L464
+	bne	.L451
 	ldr	r0, [sp]
 	add	r2, r5, #2048
 	ldr	r3, [r4, #12]
@@ -4019,76 +3925,76 @@ FlashReadPages:
 	ldrb	r0, [sp, #8]	@ zero_extendqisi2
 	blx	r7
 	adds	r1, r0, #1
-	beq	.L465
+	beq	.L452
 	ldr	r3, [r4, #12]
 	ldr	r2, [r3, #12]
 	adds	r2, r2, #1
-	bne	.L466
+	bne	.L453
 	ldr	r2, [r3, #8]
 	adds	r2, r2, #1
-	bne	.L466
+	bne	.L453
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L466
-.L465:
+	beq	.L453
+.L452:
 	mov	r3, #-1
 	str	r3, [r4]
-.L466:
+.L453:
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L467
+	beq	.L454
 	cmp	r0, #256
 	it	eq
 	streq	r0, [r4]
-.L467:
+.L454:
 	ldr	r3, [r4]
 	adds	r2, r3, #1
-	beq	.L468
+	beq	.L455
 	cmp	r3, #256
-	bne	.L464
-.L468:
+	bne	.L451
+.L455:
 	ldr	r1, [r4, #4]
 	ldr	r2, [sp, #12]
-	ldr	r0, .L496+16
+	ldr	r0, .L483+16
 	bl	printf
 	ldr	r1, [r4, #8]
-	cbz	r1, .L470
+	cbz	r1, .L457
 	movs	r3, #4
-	ldr	r0, .L496+20
+	ldr	r0, .L483+20
 	mov	r2, r3
 	bl	rknand_print_hex
-.L470:
+.L457:
 	ldr	r1, [r4, #12]
-	cbz	r1, .L464
+	cbz	r1, .L451
 	movs	r3, #4
-	ldr	r0, .L496+24
+	ldr	r0, .L483+24
 	mov	r2, r3
 	bl	rknand_print_hex
-.L464:
+.L451:
 	ldr	r3, [r8]
 	cmp	r5, r3
-	bne	.L461
+	bne	.L448
 	ldr	r0, [r4, #8]
 	cmp	r5, r0
-	beq	.L461
-	ldr	r3, .L496+28
+	beq	.L448
+	ldr	r3, .L483+28
 	mov	r1, r5
 	ldrh	r2, [r3]
 	lsls	r2, r2, #9
 	bl	ftl_memcpy
-	b	.L461
-.L497:
+	b	.L448
+.L484:
 	.align	2
-.L496:
+.L483:
 	.word	.LANCHOR0
-	.word	.LANCHOR137
+	.word	.LANCHOR136
 	.word	.LC1
-	.word	.LANCHOR78
+	.word	.LANCHOR77
 	.word	.LC11
 	.word	.LC12
 	.word	.LC13
-	.word	.LANCHOR12
-	.word	.LANCHOR111
+	.word	.LANCHOR11
+	.word	.LANCHOR110
 	.size	FlashReadPages, .-FlashReadPages
 	.section	.text.FtlLoadFactoryBbt,"ax",%progbits
 	.align	1
@@ -4101,36 +4007,36 @@ FlashReadPages:
 FtlLoadFactoryBbt:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L508
+	ldr	r3, .L495
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r6, #0
-	ldr	r5, .L508+4
+	ldr	r5, .L495+4
 	ldr	r3, [r3]
-	ldr	r7, .L508+8
-	ldr	r10, .L508+20
+	ldr	r7, .L495+8
+	ldr	r10, .L495+20
 	str	r3, [r5, #8]
-	ldr	r3, .L508+12
+	ldr	r3, .L495+12
 	ldr	r8, [r3]
 	str	r8, [r5, #12]
-.L499:
-	ldr	r3, .L508+16
+.L486:
+	ldr	r3, .L495+16
 	ldrh	r3, [r3]
 	cmp	r6, r3
-	bcc	.L504
+	bcc	.L491
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L504:
+.L491:
 	ldrh	r4, [r10]
 	movw	r3, #65535
-	ldr	fp, .L508+4
+	ldr	fp, .L495+4
 	strh	r3, [r7, #2]!	@ movhi
 	subs	r4, r4, #1
 	uxth	r4, r4
-.L500:
+.L487:
 	ldrh	r3, [r10]
 	sub	r2, r3, #15
 	cmp	r2, r4
-	bgt	.L502
+	bgt	.L489
 	mla	r3, r6, r3, r4
 	movs	r2, #1
 	mov	r1, r2
@@ -4140,28 +4046,28 @@ FtlLoadFactoryBbt:
 	bl	FlashReadPages
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L501
+	beq	.L488
 	ldrh	r2, [r8]
 	movw	r3, #61664
 	cmp	r2, r3
-	bne	.L501
+	bne	.L488
 	strh	r4, [r7]	@ movhi
-.L502:
+.L489:
 	adds	r6, r6, #1
-	b	.L499
-.L501:
+	b	.L486
+.L488:
 	subs	r4, r4, #1
 	uxth	r4, r4
-	b	.L500
-.L509:
+	b	.L487
+.L496:
 	.align	2
-.L508:
-	.word	.LANCHOR106
-	.word	.LANCHOR138
-	.word	.LANCHOR37+10
-	.word	.LANCHOR114
-	.word	.LANCHOR10
-	.word	.LANCHOR17
+.L495:
+	.word	.LANCHOR105
+	.word	.LANCHOR137
+	.word	.LANCHOR36+10
+	.word	.LANCHOR113
+	.word	.LANCHOR9
+	.word	.LANCHOR16
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
 	.section	.text.FtlGetLastWrittenPage,"ax",%progbits
 	.align	1
@@ -4177,17 +4083,17 @@ FtlGetLastWrittenPage:
 	cmp	r1, #1
 	push	{r4, r5, r6, r7, r8, lr}
 	it	eq
-	ldreq	r3, .L522
+	ldreq	r3, .L509
 	sub	sp, sp, #88
 	lsl	r7, r0, #10
 	mov	r2, r1
 	it	ne
-	ldrne	r3, .L522+4
+	ldrne	r3, .L509+4
 	mov	r6, r1
 	add	r0, sp, #4
 	movs	r1, #1
 	ldrh	r5, [r3]
-	ldr	r3, .L522+8
+	ldr	r3, .L509+8
 	subs	r5, r5, #1
 	ldr	r3, [r3]
 	sxth	r5, r5
@@ -4199,17 +4105,17 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	bne	.L513
+	bne	.L500
 	mov	r8, #0
-.L514:
+.L501:
 	cmp	r8, r5
-	ble	.L517
-.L513:
+	ble	.L504
+.L500:
 	mov	r0, r5
 	add	sp, sp, #88
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L517:
+.L504:
 	add	r3, r8, r5
 	mov	r2, r6
 	add	r3, r3, r3, lsr #31
@@ -4222,26 +4128,26 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	bne	.L515
+	bne	.L502
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
-	bne	.L515
+	bne	.L502
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
-	beq	.L515
+	beq	.L502
 	subs	r4, r4, #1
 	sxth	r5, r4
-	b	.L514
-.L515:
+	b	.L501
+.L502:
 	adds	r4, r4, #1
 	sxth	r8, r4
-	b	.L514
-.L523:
+	b	.L501
+.L510:
 	.align	2
-.L522:
-	.word	.LANCHOR20
+.L509:
 	.word	.LANCHOR19
-	.word	.LANCHOR112
+	.word	.LANCHOR18
+	.word	.LANCHOR111
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
 	.section	.text.FtlScanSysBlk,"ax",%progbits
 	.align	1
@@ -4256,69 +4162,69 @@ FtlScanSysBlk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r5, .L605
+	ldr	r5, .L592
 	sub	sp, sp, #32
 	mov	r1, r4
-	ldr	r3, .L605+4
+	ldr	r3, .L592+4
 	ldr	r2, [r5]
-	ldr	r6, .L605+8
+	ldr	r6, .L592+8
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L605+12
+	ldr	r3, .L592+12
 	lsls	r2, r2, #2
 	strh	r4, [r6]	@ movhi
-	ldr	r7, .L605+16
+	ldr	r7, .L592+16
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldr	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L605+20
+	ldr	r3, .L592+20
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r7]
 	mov	r1, r4
-	ldr	r3, .L605+24
+	ldr	r3, .L592+24
 	lsls	r2, r2, #2
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r7]
 	mov	r1, r4
-	ldr	r3, .L605+28
+	ldr	r3, .L592+28
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	movs	r2, #16
 	movs	r1, #255
-	ldr	r0, .L605+32
+	ldr	r0, .L592+32
 	bl	ftl_memset
-	ldr	r3, .L605+36
+	ldr	r3, .L592+36
 	str	r6, [sp, #12]
 	str	r5, [sp, #16]
 	ldrh	r3, [r3]
 	str	r3, [sp, #4]
-.L525:
-	ldr	r3, .L605+40
+.L512:
+	ldr	r3, .L592+40
 	ldr	r2, [sp, #4]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bls	.L566
-	ldr	r3, .L605+44
+	bls	.L553
+	ldr	r3, .L592+44
 	movs	r5, #0
-	ldr	r1, .L605+48
+	ldr	r1, .L592+48
 	mov	fp, r5
 	movs	r7, #20
 	ldrh	r8, [r3]
-	ldr	r3, .L605+52
+	ldr	r3, .L592+52
 	ldr	r2, [r1]
-	ldr	r1, .L605+56
+	ldr	r1, .L592+56
 	ldr	r6, [r3]
-	ldr	r3, .L605+60
+	ldr	r3, .L592+60
 	str	r2, [sp, #8]
 	ldrh	r10, [r1]
 	ldr	r3, [r3]
-	ldr	r2, .L605+64
-	b	.L567
-.L527:
+	ldr	r2, .L592+64
+	b	.L554
+.L514:
 	ldrb	r0, [r2, r5]	@ zero_extendqisi2
 	ldr	r1, [sp, #4]
 	str	r3, [sp, #28]
@@ -4328,7 +4234,7 @@ FtlScanSysBlk:
 	bl	FtlBbmIsBadBlock
 	ldr	r2, [sp, #24]
 	ldr	r3, [sp, #28]
-	cbnz	r0, .L526
+	cbnz	r0, .L513
 	ldr	r1, [sp, #20]
 	mla	r0, r7, fp, r6
 	ldr	r4, [sp, #8]
@@ -4341,31 +4247,31 @@ FtlScanSysBlk:
 	str	r1, [r0, #12]
 	add	r1, fp, #1
 	uxth	fp, r1
-.L526:
+.L513:
 	adds	r5, r5, #1
-.L567:
+.L554:
 	uxth	r1, r5
 	cmp	r8, r1
-	bhi	.L527
+	bhi	.L514
 	cmp	fp, #0
-	bne	.L528
-.L565:
+	bne	.L515
+.L552:
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	str	r3, [sp, #4]
-	b	.L525
-.L528:
+	b	.L512
+.L515:
 	movs	r7, #0
 	movs	r2, #1
 	mov	r1, fp
 	mov	r0, r6
 	bl	FlashReadPages
-.L529:
+.L516:
 	uxth	r3, r7
 	cmp	fp, r3
-	bls	.L565
-	ldr	r3, .L605+52
+	bls	.L552
+	ldr	r3, .L592+52
 	mov	r8, #20
 	mul	r8, r8, r7
 	ldr	r3, [r3]
@@ -4375,10 +4281,10 @@ FtlScanSysBlk:
 	ldr	r6, [r2, #12]
 	adds	r3, r3, #1
 	ubfx	r5, r5, #10, #16
-	bne	.L532
+	bne	.L519
 	mov	r10, #16
-.L534:
-	ldr	r3, .L605+52
+.L521:
+	ldr	r3, .L592+52
 	movs	r2, #1
 	mov	r1, r2
 	ldr	r0, [r3]
@@ -4390,83 +4296,83 @@ FtlScanSysBlk:
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	ldr	r3, .L605+52
+	ldr	r3, .L592+52
 	ldr	r3, [r3]
-	bne	.L531
+	bne	.L518
 	mov	r2, #-1
 	str	r2, [r3, r8]
-	ldr	r3, .L605+52
+	ldr	r3, .L592+52
 	ldr	r3, [r3]
 	ldr	r3, [r3, r8]
 	cmp	r3, r2
-	bne	.L532
-.L533:
+	bne	.L519
+.L520:
 	movs	r1, #1
-	b	.L604
-.L531:
+	b	.L591
+.L518:
 	ldr	r3, [r3, r8]
 	adds	r3, r3, #1
-	bne	.L532
+	bne	.L519
 	add	r10, r10, #-1
 	uxth	r10, r10
 	cmp	r10, #0
-	bne	.L534
-	b	.L533
-.L532:
-	ldr	r3, .L605+68
+	bne	.L521
+	b	.L520
+.L519:
+	ldr	r3, .L592+68
 	ldr	r2, [r3]
 	ldr	r3, [r6, #4]
 	adds	r1, r2, #1
-	beq	.L535
+	beq	.L522
 	cmp	r2, r3
-	bhi	.L536
-.L535:
+	bhi	.L523
+.L522:
 	adds	r2, r3, #1
 	ittt	ne
-	ldrne	r1, .L605+68
+	ldrne	r1, .L592+68
 	addne	r2, r3, #1
 	strne	r2, [r1]
-.L536:
+.L523:
 	ldrh	r2, [r6]
 	movw	r1, #61604
 	cmp	r2, r1
-	beq	.L538
-	bhi	.L539
+	beq	.L525
+	bhi	.L526
 	movw	r3, #61574
 	cmp	r2, r3
-	beq	.L540
-.L537:
+	beq	.L527
+.L524:
 	adds	r7, r7, #1
-	b	.L529
-.L539:
+	b	.L516
+.L526:
 	movw	r3, #61634
 	cmp	r2, r3
-	beq	.L541
+	beq	.L528
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L537
+	bne	.L524
 	movs	r1, #0
-.L604:
+.L591:
 	mov	r0, r5
 	bl	FtlFreeSysBlkQueueIn
-	b	.L537
-.L541:
-	ldr	r3, .L605+8
+	b	.L524
+.L528:
+	ldr	r3, .L592+8
 	ldrh	r2, [r3]
-	ldr	r3, .L605
+	ldr	r3, .L592
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bls	.L543
+	bls	.L530
 	movw	r2, #1225
-	ldr	r1, .L605+72
-	ldr	r0, .L605+76
+	ldr	r1, .L592+72
+	ldr	r0, .L592+76
 	bl	printf
-.L543:
+.L530:
 	ldr	r3, [sp, #16]
 	ldr	r2, [sp, #12]
 	ldr	r1, [r3]
 	ldrh	r0, [r2]
-	ldr	r2, .L605+12
+	ldr	r2, .L592+12
 	uxth	r10, r1
 	ldr	ip, [r2]
 	add	r3, r10, #-1
@@ -4474,61 +4380,61 @@ FtlScanSysBlk:
 	add	r10, r10, #-1
 	sxth	r3, r3
 	sxth	r10, r10
-.L544:
+.L531:
 	cmp	r3, r10
-	bgt	.L550
+	bgt	.L537
 	cmp	r3, #0
-	bge	.L582
-	b	.L537
-.L550:
+	bge	.L569
+	b	.L524
+.L537:
 	ldr	r2, [ip, r3, lsl #2]
 	add	r8, ip, r3, lsl #2
 	ldr	r4, [r6, #4]
 	cmp	r4, r2
-	bls	.L545
+	bls	.L532
 	ldr	r2, [ip]
-	cbnz	r2, .L546
+	cbnz	r2, .L533
 	cmp	r1, r0
 	ittt	ne
-	ldrne	r2, .L605+8
+	ldrne	r2, .L592+8
 	addne	r0, r0, #1
 	strhne	r0, [r2]	@ movhi
-.L546:
-	ldr	r2, .L605+20
+.L533:
+	ldr	r2, .L592+20
 	uxth	r10, r3
 	ldr	r0, [r2]
 	movs	r2, #0
-.L547:
+.L534:
 	uxth	lr, r2
 	sxth	r1, r2
 	cmp	r10, lr
-	bhi	.L548
+	bhi	.L535
 	ldr	r2, [r6, #4]
 	cmp	r3, #0
 	str	r2, [r8]
 	strh	r5, [r0, r3, lsl #1]	@ movhi
-	blt	.L537
-	ldr	r2, .L605+8
+	blt	.L524
+	ldr	r2, .L592+8
 	ldrh	r0, [r2]
-	ldr	r2, .L605
+	ldr	r2, .L592
 	ldr	r2, [r2]
 	subs	r2, r2, r0
 	subs	r2, r2, #1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L537
-.L582:
-	ldr	r2, .L605+8
+	bgt	.L524
+.L569:
+	ldr	r2, .L592+8
 	adds	r0, r0, #1
 	strh	r0, [r2]	@ movhi
 	ldr	r2, [r6, #4]
 	str	r2, [ip, r3, lsl #2]
-	ldr	r2, .L605+20
-.L602:
+	ldr	r2, .L592+20
+.L589:
 	ldr	r2, [r2]
 	strh	r5, [r2, r3, lsl #1]	@ movhi
-	b	.L537
-.L548:
+	b	.L524
+.L535:
 	add	lr, ip, r1, lsl #2
 	adds	r2, r2, #1
 	ldr	r4, [lr, #4]
@@ -4536,100 +4442,100 @@ FtlScanSysBlk:
 	ldrh	lr, [lr, #2]
 	str	r4, [ip, r1, lsl #2]
 	strh	lr, [r0, r1, lsl #1]	@ movhi
-	b	.L547
-.L545:
+	b	.L534
+.L532:
 	subs	r3, r3, #1
 	sxth	r3, r3
-	b	.L544
-.L606:
+	b	.L531
+.L593:
 	.align	2
-.L605:
-	.word	.LANCHOR30
+.L592:
+	.word	.LANCHOR29
+	.word	.LANCHOR34
+	.word	.LANCHOR129
+	.word	.LANCHOR124
+	.word	.LANCHOR26
+	.word	.LANCHOR118
+	.word	.LANCHOR121
 	.word	.LANCHOR35
-	.word	.LANCHOR130
-	.word	.LANCHOR125
-	.word	.LANCHOR27
-	.word	.LANCHOR119
-	.word	.LANCHOR122
-	.word	.LANCHOR36
-	.word	.LANCHOR139
+	.word	.LANCHOR138
+	.word	.LANCHOR4
 	.word	.LANCHOR5
-	.word	.LANCHOR6
-	.word	.LANCHOR3
-	.word	.LANCHOR65
-	.word	.LANCHOR103
-	.word	.LANCHOR24
+	.word	.LANCHOR2
 	.word	.LANCHOR64
-	.word	.LANCHOR13
-	.word	.LANCHOR82
-	.word	.LANCHOR140
+	.word	.LANCHOR102
+	.word	.LANCHOR23
+	.word	.LANCHOR63
+	.word	.LANCHOR12
+	.word	.LANCHOR81
+	.word	.LANCHOR139
 	.word	.LC1
-.L540:
-	ldr	r8, .L607+12
-	ldr	r10, .L607+20
+.L527:
+	ldr	r8, .L594+12
+	ldr	r10, .L594+20
 	ldrh	r2, [r8]
 	ldrh	r3, [r10]
 	cmp	r2, r3
-	bls	.L553
+	bls	.L540
 	movw	r2, #1266
-	ldr	r1, .L607
-	ldr	r0, .L607+4
+	ldr	r1, .L594
+	ldr	r0, .L594+4
 	bl	printf
-.L553:
-	ldr	r2, .L607+8
+.L540:
+	ldr	r2, .L594+8
 	ldrh	lr, [r10]
 	ldrh	ip, [r8]
 	ldr	r0, [r2]
 	add	r10, lr, #-1
 	sxth	r3, r10
 	sub	r10, r10, ip
-.L554:
+.L541:
 	cmp	r3, r10
-	ble	.L559
+	ble	.L546
 	ldr	r1, [r6, #4]
 	add	r8, r0, r3, lsl #2
 	ldr	r2, [r0, r3, lsl #2]
 	cmp	r1, r2
-	bls	.L555
+	bls	.L542
 	ldr	r2, [r0]
-	cbnz	r2, .L556
+	cbnz	r2, .L543
 	cmp	lr, ip
 	ittt	ne
-	ldrne	r2, .L607+12
+	ldrne	r2, .L594+12
 	addne	ip, ip, #1
 	strhne	ip, [r2]	@ movhi
-.L556:
-	ldr	r2, .L607+16
+.L543:
+	ldr	r2, .L594+16
 	uxth	r10, r3
 	ldr	ip, [r2]
 	movs	r2, #0
-.L557:
+.L544:
 	uxth	lr, r2
 	sxth	r1, r2
 	cmp	r10, lr
-	bhi	.L558
+	bhi	.L545
 	ldr	r2, [r6, #4]
 	str	r2, [r8]
 	strh	r5, [ip, r3, lsl #1]	@ movhi
-.L559:
+.L546:
 	cmp	r3, #0
-	blt	.L537
-	ldr	r2, .L607+20
-	ldr	ip, .L607+12
+	blt	.L524
+	ldr	r2, .L594+20
+	ldr	ip, .L594+12
 	ldrh	r2, [r2]
 	ldrh	r1, [ip]
 	subs	r2, r2, #1
 	subs	r2, r2, r1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L537
+	bgt	.L524
 	ldr	r2, [r6, #4]
 	adds	r1, r1, #1
 	strh	r1, [ip]	@ movhi
 	str	r2, [r0, r3, lsl #2]
-	ldr	r2, .L607+16
-	b	.L602
-.L558:
+	ldr	r2, .L594+16
+	b	.L589
+.L545:
 	add	lr, r0, r1, lsl #2
 	adds	r2, r2, #1
 	ldr	r4, [lr, #4]
@@ -4637,88 +4543,88 @@ FtlScanSysBlk:
 	ldrh	lr, [lr, #2]
 	str	r4, [r0, r1, lsl #2]
 	strh	lr, [ip, r1, lsl #1]	@ movhi
-	b	.L557
-.L555:
+	b	.L544
+.L542:
 	subs	r3, r3, #1
 	sxth	r3, r3
-	b	.L554
-.L538:
-	ldr	r8, .L607+40
+	b	.L541
+.L525:
+	ldr	r8, .L594+40
 	movw	r2, #65535
 	ldrh	r1, [r8]
 	cmp	r1, r2
-	bne	.L561
-.L603:
+	bne	.L548
+.L590:
 	strh	r5, [r8]	@ movhi
 	str	r3, [r8, #8]
-	b	.L537
-.L561:
+	b	.L524
+.L548:
 	ldrh	r0, [r8, #4]
 	cmp	r0, r2
-	beq	.L562
+	beq	.L549
 	movs	r1, #1
 	bl	FtlFreeSysBlkQueueIn
-.L562:
+.L549:
 	ldr	r3, [r6, #4]
 	ldr	r2, [r8, #8]
 	cmp	r2, r3
-	bcs	.L563
+	bcs	.L550
 	ldrh	r2, [r8]
 	strh	r2, [r8, #4]	@ movhi
-	b	.L603
-.L563:
+	b	.L590
+.L550:
 	strh	r5, [r8, #4]	@ movhi
-	b	.L537
-.L566:
-	ldr	r3, .L607+24
+	b	.L524
+.L553:
+	ldr	r3, .L594+24
 	ldr	r2, [r3]
 	ldrh	r3, [r2]
-	cbz	r3, .L568
-.L571:
-	ldr	r3, .L607+16
+	cbz	r3, .L555
+.L558:
+	ldr	r3, .L594+16
 	ldr	r4, [r3]
 	ldrh	r2, [r4]
 	cmp	r2, #0
-	beq	.L569
-.L570:
-	ldr	r3, .L607+28
+	beq	.L556
+.L557:
+	ldr	r3, .L594+28
 	ldrh	r2, [r3]
-	ldr	r3, .L607+32
+	ldr	r3, .L594+32
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bls	.L601
+	bls	.L588
 	movw	r2, #1391
-	ldr	r1, .L607
-	ldr	r0, .L607+4
+	ldr	r1, .L594
+	ldr	r0, .L594+4
 	bl	printf
-.L601:
+.L588:
 	movs	r0, #0
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L568:
-	ldr	r1, .L607+28
+.L555:
+	ldr	r1, .L594+28
 	ldrh	r1, [r1]
 	cmp	r1, #0
-	beq	.L571
-	ldr	r5, .L607+32
+	beq	.L558
+	ldr	r5, .L594+32
 	ldr	r0, [r5]
-.L572:
+.L559:
 	sxth	r1, r3
 	cmp	r1, r0
-	bcs	.L571
+	bcs	.L558
 	ldrh	r4, [r2, r1, lsl #1]
 	adds	r3, r3, #1
 	cmp	r4, #0
-	beq	.L572
-	ldr	r3, .L607+36
+	beq	.L559
+	ldr	r3, .L594+36
 	movs	r6, #0
 	ldr	r0, [r3]
 	mov	r3, r1
-.L573:
+.L560:
 	ldr	r4, [r5]
 	cmp	r3, r4
-	bcs	.L571
+	bcs	.L558
 	ldrh	r7, [r2, r3, lsl #1]
 	subs	r4, r3, r1
 	strh	r7, [r2, r4, lsl #1]	@ movhi
@@ -4727,30 +4633,30 @@ FtlScanSysBlk:
 	strh	r6, [r2, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	sxth	r3, r3
-	b	.L573
-.L569:
-	ldr	r3, .L607+12
+	b	.L560
+.L556:
+	ldr	r3, .L594+12
 	ldrh	r3, [r3]
 	cmp	r3, #0
-	beq	.L570
-	ldr	r5, .L607+20
+	beq	.L557
+	ldr	r5, .L594+20
 	ldrh	r1, [r5]
-.L578:
+.L565:
 	sxth	r3, r2
 	cmp	r3, r1
 	mov	r6, r3
-	bge	.L570
+	bge	.L557
 	ldrh	r0, [r4, r3, lsl #1]
 	adds	r2, r2, #1
 	cmp	r0, #0
-	beq	.L578
-	ldr	r2, .L607+8
+	beq	.L565
+	ldr	r2, .L594+8
 	movs	r0, #0
 	ldr	r2, [r2]
-.L579:
+.L566:
 	ldrh	r1, [r5]
 	cmp	r3, r1
-	bge	.L570
+	bge	.L557
 	ldrh	r7, [r4, r3, lsl #1]
 	subs	r1, r3, r6
 	strh	r7, [r4, r1, lsl #1]	@ movhi
@@ -4759,21 +4665,21 @@ FtlScanSysBlk:
 	adds	r1, r3, #1
 	strh	r0, [r4, r3, lsl #1]	@ movhi
 	sxth	r3, r1
-	b	.L579
-.L608:
+	b	.L566
+.L595:
 	.align	2
-.L607:
-	.word	.LANCHOR140
+.L594:
+	.word	.LANCHOR139
 	.word	.LC1
-	.word	.LANCHOR122
+	.word	.LANCHOR121
+	.word	.LANCHOR34
 	.word	.LANCHOR35
-	.word	.LANCHOR36
-	.word	.LANCHOR27
-	.word	.LANCHOR119
-	.word	.LANCHOR130
-	.word	.LANCHOR30
-	.word	.LANCHOR125
-	.word	.LANCHOR139
+	.word	.LANCHOR26
+	.word	.LANCHOR118
+	.word	.LANCHOR129
+	.word	.LANCHOR29
+	.word	.LANCHOR124
+	.word	.LANCHOR138
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
 	.section	.text.FtlLoadBbt,"ax",%progbits
 	.align	1
@@ -4787,24 +4693,24 @@ FtlLoadBbt:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	ldr	r8, .L638+40
-	ldr	r4, .L638
+	ldr	r8, .L625+40
+	ldr	r4, .L625
 	ldr	r3, [r8]
-	ldr	r7, .L638+4
+	ldr	r7, .L625+4
 	mov	r10, r4
 	str	r3, [r4, #8]
-	ldr	r3, .L638+8
+	ldr	r3, .L625+8
 	ldr	r6, [r3]
 	str	r6, [r4, #12]
 	bl	FtlBbtMemInit
 	ldrh	r5, [r7]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L610:
+.L597:
 	ldrh	r3, [r7]
 	subs	r3, r3, #15
 	cmp	r3, r5
-	bgt	.L613
+	bgt	.L600
 	lsls	r3, r5, #10
 	movs	r2, #1
 	mov	r1, r2
@@ -4813,7 +4719,7 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	bne	.L611
+	bne	.L598
 	ldr	r3, [r4, #4]
 	movs	r2, #1
 	mov	r1, r2
@@ -4821,101 +4727,101 @@ FtlLoadBbt:
 	adds	r3, r3, #1
 	str	r3, [r4, #4]
 	bl	FlashReadPages
-.L611:
+.L598:
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L612
+	beq	.L599
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L612
-	ldr	r3, .L638+12
+	bne	.L599
+	ldr	r3, .L625+12
 	ldr	r2, [r6, #4]
 	strh	r5, [r3]	@ movhi
 	str	r2, [r3, #8]
 	ldrh	r2, [r6, #8]
 	strh	r2, [r3, #4]	@ movhi
-.L613:
-	ldr	r5, .L638+12
+.L600:
+	ldr	r5, .L625+12
 	movw	r2, #65535
 	ldrh	r3, [r5]
 	cmp	r3, r2
-	beq	.L627
+	beq	.L614
 	ldrh	r3, [r5, #4]
 	cmp	r3, r2
-	beq	.L617
+	beq	.L604
 	lsls	r3, r3, #10
 	movs	r2, #1
 	mov	r1, r2
-	ldr	r0, .L638
+	ldr	r0, .L625
 	str	r3, [r4, #4]
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L617
+	beq	.L604
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L617
+	bne	.L604
 	ldr	r3, [r6, #4]
 	ldr	r2, [r5, #8]
 	cmp	r3, r2
-	bls	.L617
+	bls	.L604
 	ldrh	r2, [r5, #4]
 	str	r3, [r5, #8]
 	ldrh	r3, [r6, #8]
 	strh	r2, [r5]	@ movhi
 	strh	r3, [r5, #4]	@ movhi
-.L617:
-	ldr	r10, .L638
+.L604:
+	ldr	r10, .L625
 	movs	r1, #1
 	ldrh	r0, [r5]
 	bl	FtlGetLastWrittenPage
 	sxth	r7, r0
 	adds	r0, r0, #1
 	strh	r0, [r5, #2]	@ movhi
-.L619:
+.L606:
 	cmp	r7, #0
-	bge	.L622
+	bge	.L609
 	movs	r2, #251
-	ldr	r1, .L638+16
-	ldr	r0, .L638+20
+	ldr	r1, .L625+16
+	ldr	r0, .L625+20
 	bl	printf
-.L621:
+.L608:
 	ldrh	r3, [r6, #10]
 	ldrh	r0, [r6, #12]
 	strh	r3, [r5, #6]	@ movhi
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L624
-	ldr	r3, .L638+24
+	beq	.L611
+	ldr	r3, .L625+24
 	ldr	r2, [r3]
 	cmp	r0, r2
-	beq	.L624
-	ldr	r3, .L638+28
+	beq	.L611
+	ldr	r3, .L625+28
 	ldrh	r3, [r3]
 	lsrs	r3, r3, #2
 	cmp	r2, r3
-	bcs	.L624
+	bcs	.L611
 	cmp	r0, r3
-	bcs	.L624
+	bcs	.L611
 	bl	FtlSysBlkNumInit
-.L624:
-	ldr	r6, .L638+32
+.L611:
+	ldr	r6, .L625+32
 	movs	r5, #0
-	ldr	r7, .L638+36
-	ldr	r8, .L638+44
-.L625:
+	ldr	r7, .L625+36
+	ldr	r8, .L625+44
+.L612:
 	ldrh	r3, [r7]
 	cmp	r5, r3
-	bcc	.L626
+	bcc	.L613
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L612:
+.L599:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L610
-.L622:
+	b	.L597
+.L609:
 	ldrh	r3, [r5]
 	movs	r2, #1
 	mov	r1, r2
@@ -4927,16 +4833,16 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L620
+	beq	.L607
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	beq	.L621
-.L620:
+	beq	.L608
+.L607:
 	subs	r7, r7, #1
 	sxth	r7, r7
-	b	.L619
-.L626:
+	b	.L606
+.L613:
 	ldrh	r2, [r8]
 	ldr	r1, [r4, #8]
 	ldr	r0, [r6, #4]!
@@ -4944,25 +4850,25 @@ FtlLoadBbt:
 	mla	r1, r5, r2, r1
 	adds	r5, r5, #1
 	bl	ftl_memcpy
-	b	.L625
-.L627:
+	b	.L612
+.L614:
 	mov	r0, #-1
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L639:
+.L626:
 	.align	2
-.L638:
-	.word	.LANCHOR138
-	.word	.LANCHOR17
-	.word	.LANCHOR114
-	.word	.LANCHOR37
-	.word	.LANCHOR141
+.L625:
+	.word	.LANCHOR137
+	.word	.LANCHOR16
+	.word	.LANCHOR113
+	.word	.LANCHOR36
+	.word	.LANCHOR140
 	.word	.LC1
-	.word	.LANCHOR2
-	.word	.LANCHOR6
-	.word	.LANCHOR37+24
-	.word	.LANCHOR10
-	.word	.LANCHOR106
-	.word	.LANCHOR127
+	.word	.LANCHOR1
+	.word	.LANCHOR5
+	.word	.LANCHOR36+24
+	.word	.LANCHOR9
+	.word	.LANCHOR105
+	.word	.LANCHOR126
 	.size	FtlLoadBbt, .-FtlLoadBbt
 	.section	.text.FlashProgPages,"ax",%progbits
 	.align	1
@@ -4975,32 +4881,28 @@ FtlLoadBbt:
 FlashProgPages:
 	@ args = 0, pretend = 0, frame = 48
 	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L665
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #48
-	str	r3, [sp, #12]
+	ldr	fp, .L665+52
 	mov	r10, r1
 	mov	r4, r0
 	mov	r5, r0
-	ldr	r3, .L681
-	mov	r8, #0
-	ldr	fp, .L681+52
-	str	r2, [sp, #8]
 	ldrh	r3, [r3, #12]
-	str	r3, [sp]
-	lsls	r3, r3, #3
+	mov	r8, #0
+	str	r2, [sp, #12]
 	str	r3, [sp, #4]
-.L641:
+	lsls	r3, r3, #3
+	str	r3, [sp, #8]
+.L628:
 	cmp	r8, r10
-	bne	.L654
-	ldr	r3, [sp, #12]
-	cmp	r3, #0
-	beq	.L673
-	ldr	r6, .L681+4
+	bne	.L641
+	ldr	r6, .L665+4
 	movs	r5, #0
-.L656:
+.L642:
 	cmp	r8, r5
-	beq	.L673
-	ldr	r7, .L681+8
+	beq	.L663
+	ldr	r7, .L665+8
 	movs	r1, #0
 	ldr	r2, [r6]
 	add	r0, sp, #28
@@ -5009,88 +4911,88 @@ FlashProgPages:
 	str	r1, [r3]
 	ldr	r1, [r4, #4]
 	str	r2, [sp, #36]
-	ldr	r2, [sp, #8]
+	ldr	r2, [sp, #12]
 	str	r1, [sp, #32]
 	movs	r1, #1
 	str	r3, [sp, #40]
 	bl	FlashReadPages
 	ldr	r10, [sp, #28]
 	cmp	r10, #-1
-	bne	.L657
+	bne	.L643
 	ldr	r1, [r4, #4]
-	ldr	r0, .L681+12
+	ldr	r0, .L665+12
 	bl	printf
 	str	r10, [r4]
-.L657:
+.L643:
 	ldr	r10, [sp, #28]
 	cmp	r10, #256
-	bne	.L658
+	bne	.L644
 	ldr	r1, [r4, #4]
-	ldr	r0, .L681+16
+	ldr	r0, .L665+16
 	bl	printf
 	str	r10, [r4]
-.L658:
+.L644:
 	ldr	r3, [r4, #12]
-	cbz	r3, .L659
+	cbz	r3, .L645
 	ldr	r2, [r3]
 	ldr	r3, [r7]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L659
+	beq	.L645
 	ldr	r1, [r4, #4]
-	ldr	r0, .L681+20
+	ldr	r0, .L665+20
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4]
-.L659:
+.L645:
 	ldr	r3, [r4, #8]
-	cbz	r3, .L660
+	cbz	r3, .L646
 	ldr	r2, [r3]
 	ldr	r3, [r6]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L660
+	beq	.L646
 	ldr	r1, [r4, #4]
-	ldr	r0, .L681+24
+	ldr	r0, .L665+24
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4]
-.L660:
+.L646:
 	adds	r5, r5, #1
 	adds	r4, r4, #20
-	b	.L656
-.L654:
+	b	.L642
+.L641:
 	ldr	r3, [r5, #8]
-	cbz	r3, .L642
+	cbz	r3, .L629
 	ldr	r3, [r5, #12]
-	cbnz	r3, .L643
-.L642:
+	cbnz	r3, .L630
+.L629:
 	movs	r2, #142
-	ldr	r1, .L681+28
-	ldr	r0, .L681+32
+	ldr	r1, .L665+28
+	ldr	r0, .L665+32
 	bl	printf
-.L643:
+.L630:
 	add	r2, sp, #20
 	add	r1, sp, #24
 	ldr	r0, [r5, #4]
 	bl	l2p_addr_tran.isra.0
 	ldr	r6, [sp, #20]
 	cmp	r6, #3
-	bls	.L644
-.L680:
+	bls	.L631
+.L664:
 	mov	r3, #-1
 	str	r3, [r5]
-	b	.L645
-.L644:
-	cbnz	r6, .L646
+	b	.L632
+.L631:
+	cbnz	r6, .L633
 	ldr	r3, [sp, #24]
-	ldr	r2, [sp, #4]
+	ldr	r2, [sp, #8]
 	cmp	r2, r3
-	bls	.L646
-	ldr	r5, .L681+28
-	ldr	r7, .L681+36
-	b	.L679
-.L648:
+	bls	.L633
+	ldr	r5, .L665+28
+	ldr	r7, .L665+36
+	b	.L662
+.L635:
 	mov	r3, #-1
 	ldr	r2, [r4, #-16]
 	str	r3, [r4, #-20]
@@ -5101,50 +5003,50 @@ FlashProgPages:
 	movs	r3, #16
 	movs	r2, #4
 	ldr	r1, [r4, #-12]
-	ldr	r0, .L681+40
+	ldr	r0, .L665+40
 	bl	rknand_print_hex
 	movs	r3, #4
 	ldr	r1, [r4, #-8]
 	mov	r2, r3
-	ldr	r0, .L681+44
+	ldr	r0, .L665+44
 	bl	rknand_print_hex
-.L679:
+.L662:
 	cmp	r6, r10
 	add	r4, r4, #20
-	bne	.L648
-.L673:
+	bne	.L635
+.L663:
 	movs	r0, #0
 	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L646:
+.L633:
 	ldr	r1, [r5, #8]
 	lsls	r3, r1, #26
-	beq	.L662
-	ldr	r3, .L681+4
+	beq	.L649
+	ldr	r3, .L665+4
 	ldr	r6, [r3]
 	cmp	r1, r6
-	beq	.L649
-	ldr	r3, .L681+48
+	beq	.L636
+	ldr	r3, .L665+48
 	mov	r0, r6
 	ldrh	r2, [r3]
 	lsls	r2, r2, #9
 	bl	ftl_memcpy
-.L649:
+.L636:
 	ldr	r3, [r5, #12]
 	mov	r2, r6
 	ldr	r1, [sp, #24]
 	ldrb	r0, [sp, #20]	@ zero_extendqisi2
 	ldr	r7, [fp, #8]
 	blx	r7
-	cbnz	r0, .L650
+	cbnz	r0, .L637
 	str	r0, [r5]
-.L651:
-	ldr	r3, .L681
+.L638:
+	ldr	r3, .L665
 	ldrh	r3, [r3, #14]
 	cmp	r3, #4
-	bne	.L645
-	ldr	r0, [sp]
+	bne	.L632
+	ldr	r0, [sp, #4]
 	add	r2, r6, #2048
 	ldr	r3, [r5, #12]
 	ldr	r1, [sp, #24]
@@ -5154,35 +5056,35 @@ FlashProgPages:
 	ldrb	r0, [sp, #20]	@ zero_extendqisi2
 	blx	r6
 	cmp	r0, #0
-	bne	.L680
-.L645:
+	bne	.L664
+.L632:
 	add	r8, r8, #1
 	adds	r5, r5, #20
-	b	.L641
-.L662:
+	b	.L628
+.L649:
 	mov	r6, r1
-	b	.L649
-.L650:
+	b	.L636
+.L637:
 	mov	r3, #-1
 	str	r3, [r5]
-	b	.L651
-.L682:
+	b	.L638
+.L666:
 	.align	2
-.L681:
+.L665:
 	.word	.LANCHOR0
-	.word	.LANCHOR111
-	.word	.LANCHOR113
+	.word	.LANCHOR110
+	.word	.LANCHOR112
 	.word	.LC14
 	.word	.LC15
 	.word	.LC16
 	.word	.LC17
-	.word	.LANCHOR142
+	.word	.LANCHOR141
 	.word	.LC1
 	.word	.LC6
 	.word	.LC7
 	.word	.LC8
-	.word	.LANCHOR12
-	.word	.LANCHOR78
+	.word	.LANCHOR11
+	.word	.LANCHOR77
 	.size	FlashProgPages, .-FlashProgPages
 	.section	.text.FtlLowFormatEraseBlock,"ax",%progbits
 	.align	1
@@ -5195,133 +5097,133 @@ FlashProgPages:
 FtlLowFormatEraseBlock:
 	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L726
+	ldr	r3, .L710
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #32
-	ldr	r7, .L726+4
+	ldr	r7, .L710+4
 	mov	r8, #0
 	mov	r6, r1
 	mov	r5, r8
 	str	r0, [r3]
 	mov	r4, r8
-	ldr	r3, .L726+8
+	ldr	r3, .L710+8
 	mov	fp, #20
 	ldr	r10, [r7]
 	str	r0, [sp, #4]
 	ldrh	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L726+12
+	ldr	r3, .L710+12
 	ldr	r3, [r3]
 	str	r3, [sp, #16]
-	ldr	r3, .L726+16
+	ldr	r3, .L710+16
 	ldr	r3, [r3]
 	str	r3, [sp, #20]
-	ldr	r3, .L726+20
+	ldr	r3, .L710+20
 	ldrh	r3, [r3]
 	str	r3, [sp, #24]
-.L684:
+.L668:
 	ldr	r3, [sp, #12]
 	uxth	r2, r8
 	cmp	r3, r2
-	bhi	.L688
+	bhi	.L672
 	cmp	r5, #0
-	beq	.L683
+	beq	.L667
 	mov	r0, r10
 	mov	r8, #0
 	mov	r10, #20
 	mov	r2, r5
 	movs	r1, #0
 	bl	FlashEraseBlocks
-.L691:
+.L675:
 	uxth	r3, r8
 	cmp	r5, r3
-	bhi	.L693
+	bhi	.L677
 	cmp	r6, #0
-	beq	.L709
-	ldr	r3, .L726+24
+	beq	.L693
+	ldr	r3, .L710+24
 	mov	r10, #1
 	ldrh	r3, [r3]
 	str	r3, [sp, #8]
-.L694:
+.L678:
 	movs	r7, #0
-.L703:
-	ldr	r3, .L726+8
+.L687:
+	ldr	r3, .L710+8
 	mov	r8, #0
 	mov	r5, r8
 	ldrh	r3, [r3]
 	str	r3, [sp, #16]
-	ldr	r3, .L726+4
+	ldr	r3, .L710+4
 	ldr	fp, [r3]
-	ldr	r3, .L726+28
+	ldr	r3, .L710+28
 	ldr	r3, [r3]
 	str	r3, [sp, #20]
-	ldr	r3, .L726+12
+	ldr	r3, .L710+12
 	ldr	r3, [r3]
 	str	r3, [sp, #24]
-	ldr	r3, .L726+20
+	ldr	r3, .L710+20
 	ldrh	r3, [r3]
 	str	r3, [sp, #28]
-.L695:
+.L679:
 	ldr	r3, [sp, #16]
 	uxth	r2, r8
 	cmp	r3, r2
-	bhi	.L698
-	cbz	r5, .L683
+	bhi	.L682
+	cbz	r5, .L667
 	mov	r0, fp
-	ldr	fp, .L726+4
+	ldr	fp, .L710+4
 	movs	r3, #1
 	mov	r2, r10
 	mov	r1, r5
 	mov	r8, #0
 	bl	FlashProgPages
 	movs	r3, #20
-.L700:
+.L684:
 	uxth	r2, r8
 	cmp	r5, r2
-	bhi	.L702
+	bhi	.L686
 	adds	r7, r7, #1
 	ldr	r2, [sp, #8]
 	uxth	r3, r7
 	cmp	r2, r3
-	bhi	.L703
-	ldr	r8, .L726+4
+	bhi	.L687
+	ldr	r8, .L710+4
 	movs	r7, #0
 	mov	fp, #20
-.L704:
+.L688:
 	uxth	r3, r7
 	cmp	r5, r3
-	bhi	.L706
+	bhi	.L690
 	ldr	r3, [sp, #4]
 	cmp	r3, #63
-	bls	.L707
-	cbz	r6, .L683
-.L707:
-	ldr	r3, .L726+4
+	bls	.L691
+	cbz	r6, .L667
+.L691:
+	ldr	r3, .L710+4
 	mov	r2, r5
 	mov	r1, r10
 	ldr	r0, [r3]
 	bl	FlashEraseBlocks
-.L683:
+.L667:
 	mov	r0, r4
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L688:
+.L672:
 	mul	r2, fp, r8
 	movs	r3, #0
 	ldr	r1, [sp, #4]
 	str	r3, [r10, r2]
-	ldr	r3, .L726+32
+	ldr	r3, .L710+32
 	ldrb	r0, [r3, r8]	@ zero_extendqisi2
 	bl	V2P_block
 	str	r0, [sp, #8]
-	cbz	r6, .L685
+	cbz	r6, .L669
 	bl	IsBlkInVendorPart
-	cbnz	r0, .L686
-.L685:
+	cbnz	r0, .L670
+.L669:
 	ldr	r0, [sp, #8]
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L687
+	cbnz	r0, .L671
 	ldr	r3, [sp, #8]
 	mla	r1, fp, r5, r10
 	lsls	r2, r3, #10
@@ -5336,50 +5238,50 @@ FtlLowFormatEraseBlock:
 	bic	r2, r2, #3
 	add	r2, r2, r3
 	str	r2, [r1, #12]
-.L686:
+.L670:
 	add	r8, r8, #1
-	b	.L684
-.L687:
+	b	.L668
+.L671:
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L686
-.L693:
+	b	.L670
+.L677:
 	mul	r3, r10, r8
 	ldr	r2, [r7]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
 	adds	r3, r3, #1
-	bne	.L692
+	bne	.L676
 	ldr	r0, [r1, #4]
 	adds	r4, r4, #1
 	uxth	r4, r4
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.L692:
+.L676:
 	add	r8, r8, #1
-	b	.L691
-.L709:
+	b	.L675
+.L693:
 	movs	r3, #2
 	mov	r10, r6
 	str	r3, [sp, #8]
-	b	.L694
-.L698:
+	b	.L678
+.L682:
 	movs	r3, #20
 	ldr	r1, [sp, #4]
 	mul	r2, r3, r8
 	movs	r3, #0
 	str	r3, [fp, r2]
-	ldr	r3, .L726+32
+	ldr	r3, .L710+32
 	ldrb	r0, [r3, r8]	@ zero_extendqisi2
 	bl	V2P_block
 	str	r0, [sp, #12]
-	cbz	r6, .L696
+	cbz	r6, .L680
 	bl	IsBlkInVendorPart
-	cbnz	r0, .L697
-.L696:
+	cbnz	r0, .L681
+.L680:
 	ldr	r0, [sp, #12]
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L697
+	cbnz	r0, .L681
 	movs	r3, #20
 	mla	r1, r3, r5, fp
 	ldr	r3, [sp, #12]
@@ -5395,15 +5297,15 @@ FtlLowFormatEraseBlock:
 	bic	r2, r2, #3
 	add	r2, r2, r3
 	str	r2, [r1, #12]
-.L697:
+.L681:
 	add	r8, r8, #1
-	b	.L695
-.L702:
+	b	.L679
+.L686:
 	mul	r2, r3, r8
 	ldr	r1, [fp]
 	adds	r0, r1, r2
 	ldr	r2, [r1, r2]
-	cbz	r2, .L701
+	cbz	r2, .L685
 	ldr	r0, [r0, #4]
 	adds	r4, r4, #1
 	str	r3, [sp, #12]
@@ -5411,35 +5313,35 @@ FtlLowFormatEraseBlock:
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
 	ldr	r3, [sp, #12]
-.L701:
+.L685:
 	add	r8, r8, #1
-	b	.L700
-.L706:
-	cbz	r6, .L705
+	b	.L684
+.L690:
+	cbz	r6, .L689
 	mul	r3, fp, r7
 	ldr	r2, [r8]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
-	cbnz	r3, .L705
+	cbnz	r3, .L689
 	ldr	r0, [r1, #4]
 	movs	r1, #1
 	ubfx	r0, r0, #10, #16
 	bl	FtlFreeSysBlkQueueIn
-.L705:
+.L689:
 	adds	r7, r7, #1
-	b	.L704
-.L727:
+	b	.L688
+.L711:
 	.align	2
-.L726:
-	.word	.LANCHOR99
-	.word	.LANCHOR79
-	.word	.LANCHOR3
-	.word	.LANCHOR110
-	.word	.LANCHOR115
-	.word	.LANCHOR24
-	.word	.LANCHOR20
+.L710:
+	.word	.LANCHOR98
+	.word	.LANCHOR78
+	.word	.LANCHOR2
 	.word	.LANCHOR109
-	.word	.LANCHOR13
+	.word	.LANCHOR114
+	.word	.LANCHOR23
+	.word	.LANCHOR19
+	.word	.LANCHOR108
+	.word	.LANCHOR12
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
 	.section	.text.FlashTestBlk,"ax",%progbits
 	.align	1
@@ -5456,8 +5358,8 @@ FlashTestBlk:
 	push	{r4, r5, lr}
 	mov	r5, r0
 	sub	sp, sp, #92
-	bls	.L731
-	ldr	r4, .L733
+	bls	.L715
+	ldr	r4, .L717
 	add	r0, sp, #24
 	movs	r2, #32
 	movs	r1, #165
@@ -5481,7 +5383,7 @@ FlashTestBlk:
 	mov	r1, r3
 	bl	FlashProgPages
 	ldr	r3, [sp, #4]
-	cbnz	r3, .L732
+	cbnz	r3, .L716
 	adds	r3, r5, #1
 	add	r0, sp, #4
 	str	r3, [sp, #8]
@@ -5494,27 +5396,27 @@ FlashTestBlk:
 	it	ne
 	movne	r4, #1
 	negs	r4, r4
-.L730:
+.L714:
 	movs	r2, #1
 	movs	r1, #0
 	add	r0, sp, #4
 	str	r5, [sp, #8]
 	bl	FlashEraseBlocks
-.L728:
+.L712:
 	mov	r0, r4
 	add	sp, sp, #92
 	@ sp needed
 	pop	{r4, r5, pc}
-.L732:
+.L716:
 	mov	r4, #-1
-	b	.L730
-.L731:
+	b	.L714
+.L715:
 	movs	r4, #0
-	b	.L728
-.L734:
+	b	.L712
+.L718:
 	.align	2
-.L733:
-	.word	.LANCHOR112
+.L717:
+	.word	.LANCHOR111
 	.size	FlashTestBlk, .-FlashTestBlk
 	.section	.text.FtlBbmTblFlush,"ax",%progbits
 	.align	1
@@ -5529,28 +5431,28 @@ FtlBbmTblFlush:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r1, #0
-	ldr	r7, .L749
+	ldr	r7, .L733
 	movs	r4, #0
-	ldr	r5, .L749+4
+	ldr	r5, .L733+4
 	ldr	r3, [r7]
-	ldr	fp, .L749+52
-	ldr	r6, .L749+8
+	ldr	fp, .L733+52
+	ldr	r6, .L733+8
 	str	r3, [r5, #12]
-	ldr	r3, .L749+12
+	ldr	r3, .L733+12
 	ldr	r0, [fp]
-	ldr	r8, .L749+56
+	ldr	r8, .L733+56
 	ldrh	r2, [r3]
 	str	r0, [r5, #8]
 	bl	ftl_memset
 	str	r7, [sp, #12]
-	ldr	r7, .L749+16
-.L736:
+	ldr	r7, .L733+16
+.L720:
 	ldrh	r3, [r7]
 	cmp	r4, r3
-	blt	.L737
+	blt	.L721
 	ldr	r6, [r5, #12]
 	movs	r2, #16
-	ldr	r4, .L749+20
+	ldr	r4, .L733+20
 	movs	r1, #255
 	movs	r7, #0
 	mov	r0, r6
@@ -5567,13 +5469,13 @@ FtlBbmTblFlush:
 	strh	r3, [r6, #8]	@ movhi
 	ldrh	r3, [r4, #6]
 	strh	r3, [r6, #10]	@ movhi
-	ldr	r3, .L749+24
+	ldr	r3, .L733+24
 	ldr	r3, [r3]
 	strh	r3, [r6, #12]	@ movhi
-	ldr	r3, .L749+28
+	ldr	r3, .L733+28
 	ldr	r3, [r3]
 	strh	r3, [r6, #14]	@ movhi
-.L738:
+.L722:
 	ldr	r3, [fp]
 	ldrh	r2, [r4, #2]
 	ldrh	r1, [r4]
@@ -5588,14 +5490,14 @@ FtlBbmTblFlush:
 	str	r3, [r5, #4]
 	ldrh	r3, [r4, #4]
 	str	r0, [sp]
-	ldr	r0, .L749+32
+	ldr	r0, .L733+32
 	bl	printf
-	ldr	r3, .L749+36
+	ldr	r3, .L733+36
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	blt	.L739
+	blt	.L723
 	ldr	r3, [r4, #8]
 	mov	r1, #0	@ movhi
 	ldrh	r2, [r4]
@@ -5606,7 +5508,7 @@ FtlBbmTblFlush:
 	strh	r2, [r6, #8]	@ movhi
 	ldrh	r3, [r4, #4]
 	strh	r2, [r4, #4]	@ movhi
-	ldr	r2, .L749+40
+	ldr	r2, .L733+40
 	strh	r3, [r4]	@ movhi
 	lsls	r3, r3, #10
 	ldr	r0, [r2]
@@ -5615,9 +5517,9 @@ FtlBbmTblFlush:
 	mov	r1, r2
 	str	r3, [r0, #4]
 	bl	FlashEraseBlocks
-.L739:
+.L723:
 	movs	r3, #1
-	ldr	r0, .L749+4
+	ldr	r0, .L733+4
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
@@ -5626,21 +5528,21 @@ FtlBbmTblFlush:
 	strh	r3, [r10, #2]	@ movhi
 	ldr	r3, [r5]
 	adds	r2, r3, #1
-	bne	.L740
+	bne	.L724
 	adds	r7, r7, #1
 	ldr	r1, [r5, #4]
 	uxth	r7, r7
-	ldr	r0, .L749+44
+	ldr	r0, .L733+44
 	bl	printf
 	cmp	r7, #3
-	bls	.L738
+	bls	.L722
 	mov	r2, r7
 	ldr	r1, [r5, #4]
-	ldr	r0, .L749+48
+	ldr	r0, .L733+48
 	bl	printf
-.L742:
-	b	.L742
-.L737:
+.L726:
+	b	.L726
+.L721:
 	ldrh	r2, [r8]
 	ldr	r3, [r5, #8]
 	ldr	r1, [r6, #4]!
@@ -5649,35 +5551,35 @@ FtlBbmTblFlush:
 	adds	r4, r4, #1
 	add	r0, r3, r0, lsl #2
 	bl	ftl_memcpy
-	b	.L736
-.L740:
+	b	.L720
+.L724:
 	add	r8, r8, #1
 	cmp	r8, #1
-	beq	.L738
+	beq	.L722
 	cmp	r3, #256
-	beq	.L738
+	beq	.L722
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L750:
+.L734:
 	.align	2
-.L749:
-	.word	.LANCHOR114
-	.word	.LANCHOR138
-	.word	.LANCHOR37+24
-	.word	.LANCHOR23
-	.word	.LANCHOR10
-	.word	.LANCHOR37
-	.word	.LANCHOR2
-	.word	.LANCHOR143
+.L733:
+	.word	.LANCHOR113
+	.word	.LANCHOR137
+	.word	.LANCHOR36+24
+	.word	.LANCHOR22
+	.word	.LANCHOR9
+	.word	.LANCHOR36
+	.word	.LANCHOR1
+	.word	.LANCHOR142
 	.word	.LC18
-	.word	.LANCHOR20
-	.word	.LANCHOR79
+	.word	.LANCHOR19
+	.word	.LANCHOR78
 	.word	.LC19
 	.word	.LC20
-	.word	.LANCHOR106
-	.word	.LANCHOR127
+	.word	.LANCHOR105
+	.word	.LANCHOR126
 	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
 	.section	.text.allocate_data_superblock,"ax",%progbits
 	.align	1
@@ -5692,272 +5594,260 @@ allocate_data_superblock:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-.L752:
-	ldr	r3, .L791
-	ldr	r8, .L791+68
+	ldr	r10, .L774
+.L736:
+	ldr	r3, .L774
+	ldr	r8, .L774+80
+	ldr	r7, .L774+4
 	ldrh	r3, [r3]
-	ldr	r10, .L791+72
 	ldrh	r2, [r8]
 	add	r3, r3, r2
-	ldrh	r2, [r10]
+	ldrh	r2, [r7]
 	cmp	r3, r2
-	ble	.L753
-	mov	r2, #2656
-	ldr	r1, .L791+4
-	ldr	r0, .L791+8
+	ble	.L737
+	movw	r2, #2660
+	ldr	r1, .L774+8
+	ldr	r0, .L774+12
 	bl	printf
-.L753:
-	ldr	r3, .L791+12
+.L737:
+	ldr	r3, .L774+16
 	cmp	r4, r3
-	bne	.L779
-	ldr	r3, .L791
-	ldr	r2, .L791+16
-	ldrh	r3, [r3]
+	bne	.L763
+	ldr	r2, .L774+20
+	ldrh	r3, [r10]
 	ldr	r2, [r2]
 	lsrs	r1, r3, #1
 	muls	r2, r3, r2
 	adds	r1, r1, #1
 	add	r1, r1, r2, lsr #2
 	uxth	r1, r1
-	cbz	r1, .L754
+	cbz	r1, .L738
 	subs	r1, r1, #1
 	uxth	r1, r1
-.L754:
-	ldr	r0, .L791+20
+.L738:
+	ldr	r0, .L774+24
 	bl	List_pop_index_node
-	ldr	r3, .L791
+	ldrh	r3, [r10]
 	mov	r5, r0
-	uxth	r7, r0
-	ldrh	r3, [r3]
-	cbnz	r3, .L755
-	movw	r2, #2665
-	ldr	r1, .L791+4
-	ldr	r0, .L791+8
+	uxth	fp, r0
+	cbnz	r3, .L739
+	movw	r2, #2669
+	ldr	r1, .L774+8
+	ldr	r0, .L774+12
 	bl	printf
-.L755:
-	ldr	r3, .L791
-	ldr	r2, .L791
-	ldrh	r3, [r3]
-	subs	r3, r3, #1
-	strh	r3, [r2]	@ movhi
+.L739:
 	ldrh	r3, [r10]
-	cmp	r3, r7
-	bls	.L752
+	subs	r3, r3, #1
+	strh	r3, [r10]	@ movhi
+	ldrh	r3, [r7]
+	cmp	r3, fp
+	bls	.L736
 	uxth	r5, r5
 	lsls	r3, r5, #1
 	str	r3, [sp]
-	ldr	r3, .L791+24
+	ldr	r3, .L774+28
 	ldr	r3, [r3]
 	ldrh	r6, [r3, r5, lsl #1]
 	cmp	r6, #0
-	bne	.L752
-	strh	r7, [r4]	@ movhi
+	bne	.L736
+	strh	fp, [r4]	@ movhi
 	mov	r0, r4
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L757
-	ldr	r3, .L791+24
+	cbnz	r3, .L741
+	ldr	r3, .L774+28
 	movw	r2, #65535
-	mov	r0, r7
+	mov	r0, fp
 	ldr	r3, [r3]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
 	bl	INSERT_DATA_LIST
-	ldr	r3, .L791
 	ldrh	r2, [r8]
-	ldrh	r3, [r3]
+	ldrh	r3, [r10]
 	add	r3, r3, r2
-	ldrh	r2, [r10]
+	ldrh	r2, [r7]
 	cmp	r3, r2
-	ble	.L752
-	movw	r2, #2679
-	ldr	r1, .L791+4
-	ldr	r0, .L791+8
+	ble	.L736
+	movw	r2, #2683
+	ldr	r1, .L774+8
+	ldr	r0, .L774+12
 	bl	printf
-	b	.L752
-.L779:
+	b	.L736
+.L763:
 	movs	r1, #0
-	b	.L754
-.L757:
-	ldr	r3, .L791
+	b	.L738
+.L741:
 	ldrh	r2, [r8]
-	ldrh	r3, [r3]
+	ldrh	r3, [r10]
 	add	r3, r3, r2
-	ldrh	r2, [r10]
+	ldrh	r2, [r7]
 	cmp	r3, r2
-	ble	.L759
-	movw	r2, #2682
-	ldr	r1, .L791+4
-	ldr	r0, .L791+8
+	ble	.L743
+	movw	r2, #2686
+	ldr	r1, .L774+8
+	ldr	r0, .L774+12
 	bl	printf
-.L759:
-	ldr	r3, .L791+28
+.L743:
+	ldr	r3, .L774+32
 	add	lr, r4, #16
-	ldr	r2, .L791+32
+	ldr	r2, .L774+36
 	mov	r8, #0
 	ldr	ip, [r3]
 	ldrh	r0, [r2]
 	movs	r2, #20
+	str	r2, [sp, #4]
 	mov	r3, ip
 	mla	r0, r2, r0, ip
-.L760:
+.L744:
 	cmp	r0, r3
-	bne	.L762
-	cbnz	r6, .L763
-	movw	r2, #2693
-	ldr	r1, .L791+4
-	ldr	r0, .L791+8
+	bne	.L746
+	cbnz	r6, .L747
+	movw	r2, #2697
+	ldr	r1, .L774+8
+	ldr	r0, .L774+12
 	bl	printf
-.L763:
-	ldr	r3, .L791+36
+.L747:
+	ldr	r3, .L774+40
 	ldrh	r3, [r3]
-	cmp	r3, r7
-	bne	.L764
-	movw	r2, #2695
-	ldr	r1, .L791+4
-	ldr	r0, .L791+8
+	cmp	r3, fp
+	bne	.L748
+	movw	r2, #2699
+	ldr	r1, .L774+8
+	ldr	r0, .L774+12
 	bl	printf
-.L764:
-	ldrb	r2, [r4, #8]	@ zero_extendqisi2
-	ldr	r3, .L791+40
-	ldr	fp, .L791+76
-	ldr	r8, .L791+80
-	ldr	r1, [r3]
-	cmp	r2, #0
-	bne	.L765
-	ldrh	r2, [r1, r5, lsl #1]
-	cmp	r2, #0
-	beq	.L766
-	ldr	r0, .L791+44
-	ldrh	r0, [r0]
-	add	r2, r2, r0
-.L789:
-	strh	r2, [r1, r5, lsl #1]	@ movhi
-	mov	r0, r7
-	ldr	r2, [fp]
-	movs	r1, #0
-	str	r3, [sp, #4]
-	adds	r2, r2, #1
-	str	r2, [fp]
-	bl	ftl_set_blk_mode
-.L790:
-	ldr	r3, [sp, #4]
-	ldr	r0, [fp]
-	ldr	r3, [r3]
-	ldrh	r1, [r3, r5, lsl #1]
-	ldr	r3, .L791+48
-	ldr	r2, [r3]
-	cmp	r1, r2
-	it	hi
-	strhi	r1, [r3]
-	ldr	r3, .L791+44
-	ldrh	r1, [r10]
-	ldrh	r2, [r3]
-	ldr	r3, [r8]
-	mla	r0, r0, r2, r3
-	bl	__aeabi_uidiv
-	ldr	r3, .L791+52
-	ldr	ip, .L791+84
+.L748:
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	ldr	r0, .L774+44
+	ldr	ip, .L774+84
+	ldr	r1, .L774+48
+	ldr	r2, .L774+52
+	ldr	lr, [r0]
+	cmp	r3, #0
+	bne	.L749
+	ldrh	r3, [lr, r5, lsl #1]
+	cmp	r3, #0
+	beq	.L750
+	ldrh	r8, [ip]
+	add	r3, r3, r8
+.L773:
+	strh	r3, [lr, r5, lsl #1]	@ movhi
+	ldr	r3, [r1]
+	adds	r3, r3, #1
+	str	r3, [r1]
+.L752:
+	ldr	r3, [r0]
+	ldr	r0, .L774+56
+	ldrh	lr, [r3, r5, lsl #1]
+	ldr	r3, [r0]
+	cmp	lr, r3
+	ldr	r3, [r2]
+	it	hi
+	strhi	lr, [r0]
+	ldrh	r0, [ip]
+	ldr	ip, [r1]
+	ldrh	r1, [r7]
+	ldr	r7, .L774+60
+	mla	r0, ip, r0, r3
+	bl	__aeabi_uidiv
+	ldr	r3, .L774+64
 	str	r0, [r3]
-	ldr	r3, .L791+56
+	ldr	r3, .L774+68
 	ldr	r2, [r3]
 	ldr	r3, [r2, #16]
 	adds	r3, r3, #1
 	str	r3, [r2, #16]
 	movs	r2, #20
-	ldr	r3, .L791+28
+	ldr	r3, .L774+32
 	ldr	r0, [r3]
 	adds	r3, r0, #4
 	mla	r2, r2, r6, r0
 	adds	r2, r2, #24
-.L770:
+.L754:
 	adds	r3, r3, #20
 	cmp	r2, r3
-	bne	.L771
+	bne	.L755
+	movs	r7, #0
 	mov	r2, r6
+	mov	r8, r7
 	ldrb	r1, [r4, #8]	@ zero_extendqisi2
-	mov	r8, #0
 	bl	FlashEraseBlocks
-	mov	r10, r8
-	movs	r3, #20
-.L772:
-	uxth	r2, r8
-	cmp	r6, r2
-	bhi	.L774
-	cmp	r10, #0
-	beq	.L775
-	mov	r0, r7
+.L756:
+	uxth	r3, r7
+	cmp	r6, r3
+	bhi	.L758
+	cmp	r8, #0
+	beq	.L759
+	mov	r0, fp
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L775:
+.L759:
 	ldrb	r2, [r4, #7]	@ zero_extendqisi2
 	cmp	r2, #0
-	bne	.L776
-	ldr	r3, .L791+24
+	bne	.L760
+	ldr	r3, .L774+28
 	movw	r2, #65535
 	ldr	r3, [r3]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
-	b	.L752
-.L762:
+	b	.L736
+.L746:
 	ldrh	r1, [lr], #2
-	movw	fp, #65535
+	movw	r2, #65535
 	str	r8, [r3, #8]
 	str	r8, [r3, #12]
-	cmp	r1, fp
-	beq	.L761
-	mla	fp, r2, r6, ip
-	adds	r6, r6, #1
+	cmp	r1, r2
+	beq	.L745
+	ldr	r2, [sp, #4]
 	lsls	r1, r1, #10
+	mla	r2, r2, r6, ip
+	adds	r6, r6, #1
 	uxth	r6, r6
-	str	r1, [fp, #4]
-.L761:
+	str	r1, [r2, #4]
+.L745:
 	adds	r3, r3, #20
-	b	.L760
-.L766:
-	movs	r2, #2
-	b	.L789
-.L765:
-	ldrh	r2, [r1, r5, lsl #1]
-	mov	r0, r7
-	str	r3, [sp, #4]
-	adds	r2, r2, #1
-	strh	r2, [r1, r5, lsl #1]	@ movhi
-	ldr	r2, [r8]
-	adds	r2, r2, #1
-	str	r2, [r8]
-	bl	ftl_set_blk_mode.part.6
-	b	.L790
-.L771:
+	b	.L744
+.L750:
+	movs	r3, #2
+	b	.L773
+.L749:
+	ldrh	r3, [lr, r5, lsl #1]
+	adds	r3, r3, #1
+	strh	r3, [lr, r5, lsl #1]	@ movhi
+	ldr	r3, [r2]
+	adds	r3, r3, #1
+	str	r3, [r2]
+	b	.L752
+.L755:
 	ldr	r1, [r3, #-20]
-	and	r1, r1, ip
+	ands	r1, r1, r7
 	str	r1, [r3, #-20]
-	b	.L770
-.L774:
-	ldr	r1, .L791+28
-	mul	r2, r3, r8
-	ldr	r1, [r1]
-	ldr	fp, [r1, r2]
-	adds	r0, r1, r2
-	cmp	fp, #-1
-	bne	.L773
-	ldr	r0, [r0, #4]
-	add	r10, r10, #1
-	str	r3, [sp, #4]
+	b	.L754
+.L758:
+	ldr	r2, .L774+32
+	movs	r3, #20
+	muls	r3, r7, r3
+	ldr	r2, [r2]
+	adds	r1, r2, r3
+	ldr	r2, [r2, r3]
+	adds	r3, r2, #1
+	bne	.L757
+	ldr	r0, [r1, #4]
+	add	r8, r8, #1
+	str	r2, [sp, #4]
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-	add	r2, r4, r8, lsl #1
-	ldr	r3, [sp, #4]
-	strh	fp, [r2, #16]	@ movhi
-	ldrb	r2, [r4, #7]	@ zero_extendqisi2
-	subs	r2, r2, #1
-	strb	r2, [r4, #7]
-.L773:
-	add	r8, r8, #1
-	b	.L772
-.L776:
-	ldr	r3, .L791+60
-	ldr	r1, .L791+64
+	ldr	r2, [sp, #4]
+	add	r3, r4, r7, lsl #1
+	strh	r2, [r3, #16]	@ movhi
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	subs	r3, r3, #1
+	strb	r3, [r4, #7]
+.L757:
+	adds	r7, r7, #1
+	b	.L756
+.L760:
+	ldr	r3, .L774+72
+	ldr	r1, .L774+76
 	ldrh	r3, [r3]
-	strh	r7, [r4]	@ movhi
+	strh	fp, [r4]	@ movhi
 	smulbb	r3, r3, r2
 	movs	r2, #0
 	strh	r2, [r4, #2]	@ movhi
@@ -5968,49 +5858,49 @@ allocate_data_superblock:
 	str	r2, [r4, #12]
 	adds	r2, r2, #1
 	str	r2, [r1]
-	ldr	r2, .L791+24
+	ldr	r2, .L774+28
 	ldr	r1, [sp]
 	ldr	r2, [r2]
 	strh	r3, [r2, r1]	@ movhi
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L777
+	cbz	r3, .L761
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L778
-.L777:
-	movw	r2, #2748
-	ldr	r1, .L791+4
-	ldr	r0, .L791+8
+	cbnz	r3, .L762
+.L761:
+	mov	r2, #2752
+	ldr	r1, .L774+8
+	ldr	r0, .L774+12
 	bl	printf
-.L778:
+.L762:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L792:
+.L775:
 	.align	2
-.L791:
-	.word	.LANCHOR48
-	.word	.LANCHOR144
-	.word	.LC1
-	.word	.LANCHOR53
-	.word	.LANCHOR95
-	.word	.LANCHOR46
-	.word	.LANCHOR42
-	.word	.LANCHOR79
-	.word	.LANCHOR3
-	.word	.LANCHOR145
+.L774:
 	.word	.LANCHOR47
-	.word	.LANCHOR14
-	.word	.LANCHOR92
+	.word	.LANCHOR4
 	.word	.LANCHOR143
-	.word	.LANCHOR118
-	.word	.LANCHOR19
-	.word	.LANCHOR82
-	.word	.LANCHOR44
-	.word	.LANCHOR5
+	.word	.LC1
+	.word	.LANCHOR52
+	.word	.LANCHOR94
+	.word	.LANCHOR45
+	.word	.LANCHOR41
+	.word	.LANCHOR78
+	.word	.LANCHOR2
+	.word	.LANCHOR144
+	.word	.LANCHOR46
+	.word	.LANCHOR89
 	.word	.LANCHOR90
 	.word	.LANCHOR91
 	.word	-1024
+	.word	.LANCHOR142
+	.word	.LANCHOR117
+	.word	.LANCHOR18
+	.word	.LANCHOR81
+	.word	.LANCHOR43
+	.word	.LANCHOR13
 	.size	allocate_data_superblock, .-allocate_data_superblock
 	.section	.text.FtlGcFreeBadSuperBlk,"ax",%progbits
 	.align	1
@@ -6025,43 +5915,43 @@ FtlGcFreeBadSuperBlk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, r0
-	ldr	r4, .L805
+	ldr	r4, .L788
 	ldrh	r3, [r4]
-	cbz	r3, .L794
-	ldr	r8, .L805+12
+	cbz	r3, .L777
+	ldr	r8, .L788+12
 	movs	r7, #0
-.L795:
-	ldr	r3, .L805+4
+.L778:
+	ldr	r3, .L788+4
 	ldrh	r2, [r3]
 	uxth	r3, r7
 	cmp	r2, r3
-	bhi	.L801
+	bhi	.L784
 	bl	FtlGcReFreshBadBlk
-.L794:
+.L777:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L801:
-	ldr	r2, .L805+8
+.L784:
+	ldr	r2, .L788+8
 	uxth	r3, r7
 	mov	r1, r10
 	mov	fp, #0
 	ldrb	r0, [r2, r3]	@ zero_extendqisi2
 	bl	V2P_block
 	mov	r1, r0
-.L796:
+.L779:
 	ldrh	r3, [r4]
 	uxth	r5, fp
 	cmp	r3, r5
-	bhi	.L800
+	bhi	.L783
 	adds	r7, r7, #1
-	b	.L795
-.L800:
+	b	.L778
+.L783:
 	uxth	r6, fp
 	ldrh	r3, [r8, r6, lsl #1]
 	cmp	r3, r1
-	bne	.L797
+	bne	.L780
 	mov	r0, r1
 	str	r1, [sp, #4]
 	bl	FtlBbmMapBadBlock
@@ -6069,27 +5959,27 @@ FtlGcFreeBadSuperBlk:
 	ldrh	r2, [r4]
 	add	r3, r8, r6, lsl #1
 	ldr	r1, [sp, #4]
-.L798:
+.L781:
 	cmp	r5, r2
-	bcc	.L799
+	bcc	.L782
 	subs	r2, r2, #1
 	strh	r2, [r4]	@ movhi
-.L797:
+.L780:
 	add	fp, fp, #1
-	b	.L796
-.L799:
+	b	.L779
+.L782:
 	ldrh	r0, [r3, #2]!
 	adds	r5, r5, #1
 	uxth	r5, r5
 	strh	r0, [r3, #-2]	@ movhi
-	b	.L798
-.L806:
+	b	.L781
+.L789:
 	.align	2
-.L805:
+.L788:
+	.word	.LANCHOR73
+	.word	.LANCHOR2
+	.word	.LANCHOR12
 	.word	.LANCHOR74
-	.word	.LANCHOR3
-	.word	.LANCHOR13
-	.word	.LANCHOR75
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
 	.section	.text.update_vpc_list,"ax",%progbits
 	.align	1
@@ -6104,41 +5994,41 @@ update_vpc_list:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	mov	r4, r0
-	ldr	r3, .L819
+	ldr	r3, .L802
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	bne	.L808
-	ldr	r3, .L819+4
+	bne	.L791
+	ldr	r3, .L802+4
 	ldrh	r2, [r3]
 	cmp	r2, r0
 	itt	eq
 	movweq	r2, #65535
 	strheq	r2, [r3]	@ movhi
-	ldr	r3, .L819+8
+	ldr	r3, .L802+8
 	ldrh	r2, [r3]
 	cmp	r2, r0
 	itt	eq
 	movweq	r2, #65535
 	strheq	r2, [r3]	@ movhi
-	ldr	r3, .L819+12
+	ldr	r3, .L802+12
 	ldrh	r2, [r3]
 	cmp	r2, r0
-	bne	.L811
+	bne	.L794
 	movw	r2, #65535
 	strh	r2, [r3]	@ movhi
-.L812:
-	ldr	r5, .L819+16
+.L795:
+	ldr	r5, .L802+16
 	mov	r1, r4
-	ldr	r0, .L819+20
+	ldr	r0, .L802+20
 	bl	List_remove_node
 	ldrh	r3, [r5]
-	cbnz	r3, .L814
-	movw	r2, #2824
-	ldr	r1, .L819+24
-	ldr	r0, .L819+28
+	cbnz	r3, .L797
+	movw	r2, #2828
+	ldr	r1, .L802+24
+	ldr	r0, .L802+28
 	bl	printf
-.L814:
+.L797:
 	ldrh	r3, [r5]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -6146,56 +6036,56 @@ update_vpc_list:
 	bl	free_data_superblock
 	mov	r0, r4
 	bl	FtlGcFreeBadSuperBlk
-	ldr	r3, .L819+32
+	ldr	r3, .L802+32
 	ldrh	r2, [r5]
 	ldrh	r3, [r3]
 	add	r3, r3, r2
-	ldr	r2, .L819+36
+	ldr	r2, .L802+36
 	ldrh	r2, [r2]
 	cmp	r3, r2
-	ble	.L818
-	movw	r2, #2827
-	ldr	r1, .L819+24
-	ldr	r0, .L819+28
+	ble	.L801
+	movw	r2, #2831
+	ldr	r1, .L802+24
+	ldr	r0, .L802+28
 	bl	printf
-.L818:
+.L801:
 	movs	r0, #1
 	pop	{r3, r4, r5, pc}
-.L811:
-	ldr	r3, .L819+40
+.L794:
+	ldr	r3, .L802+40
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L817
-	ldr	r3, .L819+44
+	beq	.L800
+	ldr	r3, .L802+44
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L817
-	ldr	r3, .L819+48
+	beq	.L800
+	ldr	r3, .L802+48
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L812
-.L817:
+	bne	.L795
+.L800:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L808:
+.L791:
 	bl	List_update_data_list
-	b	.L817
-.L820:
+	b	.L800
+.L803:
 	.align	2
-.L819:
-	.word	.LANCHOR42
+.L802:
+	.word	.LANCHOR41
+	.word	.LANCHOR71
 	.word	.LANCHOR72
-	.word	.LANCHOR73
+	.word	.LANCHOR144
+	.word	.LANCHOR43
+	.word	.LANCHOR40
 	.word	.LANCHOR145
-	.word	.LANCHOR44
-	.word	.LANCHOR41
-	.word	.LANCHOR146
 	.word	.LC1
-	.word	.LANCHOR48
-	.word	.LANCHOR5
+	.word	.LANCHOR47
+	.word	.LANCHOR4
+	.word	.LANCHOR50
 	.word	.LANCHOR51
 	.word	.LANCHOR52
-	.word	.LANCHOR53
 	.size	update_vpc_list, .-update_vpc_list
 	.section	.text.decrement_vpc_count,"ax",%progbits
 	.align	1
@@ -6212,47 +6102,47 @@ decrement_vpc_count:
 	push	{r4, r5, r6, lr}
 	cmp	r0, r3
 	mov	r4, r0
-	beq	.L822
-	ldr	r5, .L830
+	beq	.L805
+	ldr	r5, .L813
 	ldr	r3, [r5]
 	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L823
+	cbnz	r2, .L806
 	mov	r1, r0
-	ldr	r0, .L830+4
+	ldr	r0, .L813+4
 	bl	printf
 	ldr	r3, [r5]
 	ldrh	r5, [r3, r4, lsl #1]
-	cbz	r5, .L824
-.L828:
+	cbz	r5, .L807
+.L811:
 	movs	r5, #0
-.L821:
+.L804:
 	mov	r0, r5
 	pop	{r4, r5, r6, pc}
-.L824:
-	movw	r2, #2842
-.L829:
-	ldr	r1, .L830+8
-	ldr	r0, .L830+12
+.L807:
+	movw	r2, #2846
+.L812:
+	ldr	r1, .L813+8
+	ldr	r0, .L813+12
 	bl	printf
-	b	.L821
-.L823:
+	b	.L804
+.L806:
 	subs	r2, r2, #1
 	strh	r2, [r3, r0, lsl #1]	@ movhi
-.L822:
-	ldr	r6, .L830+16
+.L805:
+	ldr	r6, .L813+16
 	movw	r3, #65535
 	ldrh	r0, [r6]
 	cmp	r0, r3
-	bne	.L826
+	bne	.L809
 	strh	r4, [r6]	@ movhi
-	b	.L828
-.L826:
+	b	.L811
+.L809:
 	cmp	r4, r0
-	beq	.L828
+	beq	.L811
 	bl	update_vpc_list
-	ldr	r3, .L830+20
+	ldr	r3, .L813+20
 	adds	r5, r0, #0
-	ldr	r2, .L830+24
+	ldr	r2, .L813+24
 	it	ne
 	movne	r5, #1
 	strh	r4, [r6]	@ movhi
@@ -6260,28 +6150,28 @@ decrement_vpc_count:
 	ldr	r2, [r2]
 	subs	r3, r3, r2
 	asrs	r2, r3, #1
-	ldr	r3, .L830+28
+	ldr	r3, .L813+28
 	muls	r3, r2, r3
-	ldr	r2, .L830
+	ldr	r2, .L813
 	ldr	r2, [r2]
 	uxth	r1, r3
 	ldrh	r2, [r2, r1, lsl #1]
 	cmp	r2, #0
-	bne	.L821
+	bne	.L804
 	cmp	r4, r1
-	beq	.L821
-	movw	r2, #2858
-	b	.L829
-.L831:
+	beq	.L804
+	movw	r2, #2862
+	b	.L812
+.L814:
 	.align	2
-.L830:
-	.word	.LANCHOR42
+.L813:
+	.word	.LANCHOR41
 	.word	.LC21
-	.word	.LANCHOR147
+	.word	.LANCHOR146
 	.word	.LC1
-	.word	.LANCHOR131
-	.word	.LANCHOR41
+	.word	.LANCHOR130
 	.word	.LANCHOR40
+	.word	.LANCHOR39
 	.word	-1431655765
 	.size	decrement_vpc_count, .-decrement_vpc_count
 	.section	.text.FtlSuperblockPowerLostFix,"ax",%progbits
@@ -6298,14 +6188,14 @@ FtlSuperblockPowerLostFix:
 	push	{r4, r5, r6, r7, r8, lr}
 	mov	r3, #-1
 	sub	sp, sp, #24
-	ldr	r2, .L845
+	ldr	r2, .L828
 	movs	r6, #0
 	mov	r4, r0
 	str	r3, [sp, #20]
-	ldr	r3, .L845+4
+	ldr	r3, .L828+4
 	ldr	r5, [r2]
 	mvn	r2, #2
-	ldr	r8, .L845+16
+	ldr	r8, .L828+16
 	ldr	r3, [r3]
 	str	r5, [sp, #16]
 	str	r3, [sp, #12]
@@ -6326,18 +6216,18 @@ FtlSuperblockPowerLostFix:
 	ite	eq
 	moveq	r7, #6
 	movne	r7, #7
-.L838:
+.L821:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L834
-.L835:
-	ldr	r3, .L845+8
+	cbnz	r3, .L817
+.L818:
+	ldr	r3, .L828+8
 	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
-	ldr	r3, .L845+12
+	ldr	r3, .L828+12
 	ldrh	r3, [r3]
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
@@ -6346,12 +6236,12 @@ FtlSuperblockPowerLostFix:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L834:
+.L817:
 	mov	r0, r4
 	bl	get_new_active_ppa
 	str	r0, [sp, #8]
 	adds	r0, r0, #1
-	beq	.L835
+	beq	.L818
 	ldr	r3, [r8]
 	movs	r1, #1
 	add	r0, sp, #4
@@ -6367,16 +6257,16 @@ FtlSuperblockPowerLostFix:
 	ldrh	r0, [r4]
 	bl	decrement_vpc_count
 	subs	r7, r7, #1
-	bne	.L838
-	b	.L835
-.L846:
+	bne	.L821
+	b	.L818
+.L829:
 	.align	2
-.L845:
-	.word	.LANCHOR114
-	.word	.LANCHOR106
-	.word	.LANCHOR42
-	.word	.LANCHOR19
-	.word	.LANCHOR83
+.L828:
+	.word	.LANCHOR113
+	.word	.LANCHOR105
+	.word	.LANCHOR41
+	.word	.LANCHOR18
+	.word	.LANCHOR82
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
 	.section	.text.FtlMakeBbt,"ax",%progbits
 	.align	1
@@ -6391,61 +6281,61 @@ FtlMakeBbt:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r6, #0
-	ldr	r7, .L866
+	ldr	r7, .L849
 	bl	FtlBbtMemInit
 	sub	r8, r7, #18
 	bl	FtlLoadFactoryBbt
-.L848:
-	ldr	r3, .L866+4
+.L831:
+	ldr	r3, .L849+4
 	ldrh	r3, [r3]
 	cmp	r6, r3
-	bcc	.L854
-	ldr	r5, .L866+8
+	bcc	.L837
+	ldr	r5, .L849+8
 	movs	r4, #0
-.L855:
+.L838:
 	ldrh	r3, [r5]
 	uxth	r0, r4
 	adds	r4, r4, #1
 	cmp	r3, r0
-	bhi	.L856
-	ldr	r4, .L866+12
+	bhi	.L839
+	ldr	r4, .L849+12
 	movw	r6, #65535
 	ldrh	r5, [r4, #12]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L857:
+.L840:
 	ldrh	r3, [r4, #12]
 	subs	r3, r3, #47
 	cmp	r3, r5
-	bgt	.L861
+	bgt	.L844
 	mov	r0, r5
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L858
+	beq	.L841
 	mov	r0, r5
 	bl	FlashTestBlk
 	cmp	r0, #0
-	beq	.L859
+	beq	.L842
 	mov	r0, r5
 	bl	FtlBbmMapBadBlock
-.L858:
+.L841:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L857
-.L854:
-	ldr	r3, .L866+16
-	ldr	r5, .L866+20
+	b	.L840
+.L837:
+	ldr	r3, .L849+16
+	ldr	r5, .L849+20
 	ldrh	r2, [r8, #2]!
-	ldr	r4, .L866+24
+	ldr	r4, .L849+24
 	ldr	r0, [r3]
 	movw	r3, #65535
 	ldr	r10, [r5]
 	cmp	r2, r3
 	mov	fp, r4
-	ldr	r3, .L866+28
+	ldr	r3, .L849+28
 	str	r0, [r4, #8]
 	str	r10, [r4, #12]
-	beq	.L849
+	beq	.L832
 	ldrh	r5, [r3]
 	mov	r0, r4
 	str	r3, [sp]
@@ -6462,13 +6352,13 @@ FtlMakeBbt:
 	adds	r2, r2, #7
 	asrs	r2, r2, #3
 	bl	ftl_memcpy
-.L850:
+.L833:
 	uxth	r0, r5
 	adds	r6, r6, #1
 	adds	r7, r7, #4
 	bl	FtlBbmMapBadBlock
-	b	.L848
-.L849:
+	b	.L831
+.L832:
 	mov	r1, r6
 	str	r3, [sp]
 	bl	FlashGetBadBlockList
@@ -6480,21 +6370,21 @@ FtlMakeBbt:
 	ldrh	r4, [r3]
 	subs	r4, r4, #1
 	uxth	r4, r4
-.L851:
+.L834:
 	ldr	r3, [sp]
 	ldrh	r0, [r3]
 	smlabb	r0, r0, r6, r4
 	uxth	r0, r0
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L852
+	beq	.L835
 	ldr	r3, [sp, #4]
 	movs	r2, #16
 	movs	r1, #0
 	strh	r4, [r8]	@ movhi
 	ldr	r0, [r3]
 	bl	ftl_memset
-	ldr	r3, .L866+16
+	ldr	r3, .L849+16
 	mov	r2, #4096
 	movs	r1, #0
 	ldr	r0, [r3]
@@ -6512,42 +6402,42 @@ FtlMakeBbt:
 	mla	r5, r6, r5, r3
 	lsls	r3, r5, #10
 	str	r3, [fp, #4]
-	ldr	r3, .L866+32
+	ldr	r3, .L849+32
 	ldrh	r2, [r3]
 	lsls	r2, r2, #2
 	bl	ftl_memcpy
 	movs	r2, #1
-	ldr	r0, .L866+24
+	ldr	r0, .L849+24
 	mov	r1, r2
 	bl	FlashEraseBlocks
 	movs	r3, #1
-	ldr	r0, .L866+24
+	ldr	r0, .L849+24
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
 	ldr	r3, [fp]
 	adds	r3, r3, #1
-	bne	.L850
+	bne	.L833
 	uxth	r0, r5
 	bl	FtlBbmMapBadBlock
-	b	.L851
-.L852:
+	b	.L834
+.L835:
 	subs	r4, r4, #1
 	uxth	r4, r4
-	b	.L851
-.L856:
+	b	.L834
+.L839:
 	bl	FtlBbmMapBadBlock
-	b	.L855
-.L859:
+	b	.L838
+.L842:
 	ldrh	r3, [r4]
 	cmp	r3, r6
-	bne	.L860
+	bne	.L843
 	strh	r5, [r4]	@ movhi
-	b	.L858
-.L860:
+	b	.L841
+.L843:
 	strh	r5, [r4, #4]	@ movhi
-.L861:
-	ldr	r3, .L866+36
+.L844:
+	ldr	r3, .L849+36
 	movs	r5, #0
 	str	r5, [r4, #8]
 	movs	r1, #1
@@ -6579,19 +6469,19 @@ FtlMakeBbt:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L867:
+.L850:
 	.align	2
-.L866:
-	.word	.LANCHOR37+28
-	.word	.LANCHOR10
-	.word	.LANCHOR25
-	.word	.LANCHOR37
-	.word	.LANCHOR106
-	.word	.LANCHOR114
-	.word	.LANCHOR138
-	.word	.LANCHOR17
-	.word	.LANCHOR127
-	.word	.LANCHOR79
+.L849:
+	.word	.LANCHOR36+28
+	.word	.LANCHOR9
+	.word	.LANCHOR24
+	.word	.LANCHOR36
+	.word	.LANCHOR105
+	.word	.LANCHOR113
+	.word	.LANCHOR137
+	.word	.LANCHOR16
+	.word	.LANCHOR126
+	.word	.LANCHOR78
 	.size	FtlMakeBbt, .-FtlMakeBbt
 	.section	.text.ftl_memcmp,"ax",%progbits
 	.align	1
@@ -6618,24 +6508,24 @@ ftl_memcmp:
 js_hash:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L872
+	ldr	r3, .L855
 	add	r1, r1, r0
 	push	{r4, lr}
-.L870:
+.L853:
 	cmp	r0, r1
-	bne	.L871
+	bne	.L854
 	mov	r0, r3
 	pop	{r4, pc}
-.L871:
+.L854:
 	lsrs	r2, r3, #2
 	ldrb	r4, [r0], #1	@ zero_extendqisi2
 	add	r2, r2, r3, lsl #5
 	add	r2, r2, r4
 	eors	r3, r3, r2
-	b	.L870
-.L873:
+	b	.L853
+.L856:
 	.align	2
-.L872:
+.L855:
 	.word	1204201446
 	.size	js_hash, .-js_hash
 	.section	.text.Ftl_write_map_blk_to_last_page,"ax",%progbits
@@ -6655,14 +6545,14 @@ Ftl_write_map_blk_to_last_page:
 	mov	r4, r0
 	ldr	r5, [r0, #12]
 	cmp	r3, r2
-	bne	.L875
+	bne	.L858
 	ldrh	r3, [r0, #8]
-	cbz	r3, .L876
+	cbz	r3, .L859
 	movw	r2, #641
-	ldr	r1, .L884
-	ldr	r0, .L884+4
+	ldr	r1, .L867
+	ldr	r0, .L867+4
 	bl	printf
-.L876:
+.L859:
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
@@ -6674,20 +6564,20 @@ Ftl_write_map_blk_to_last_page:
 	ldr	r3, [r4, #28]
 	adds	r3, r3, #1
 	str	r3, [r4, #28]
-.L877:
+.L860:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L875:
+.L858:
 	ldrh	r7, [r5, r3, lsl #1]
 	movs	r1, #255
 	ldrh	r3, [r0, #2]
-	ldr	r6, .L884+8
-	ldr	r10, .L884+24
+	ldr	r6, .L867+8
+	ldr	r10, .L867+24
 	ldr	r8, [r0, #24]
 	orr	r3, r3, r7, lsl #10
 	ldr	r0, [r10]
 	str	r3, [r6, #4]
-	ldr	r3, .L884+12
+	ldr	r3, .L867+12
 	str	r0, [r6, #8]
 	ldr	r5, [r3]
 	ldr	r3, [r4, #28]
@@ -6698,7 +6588,7 @@ Ftl_write_map_blk_to_last_page:
 	ldrh	r3, [r4, #4]
 	strh	r7, [r5, #2]	@ movhi
 	strh	r3, [r5]	@ movhi
-	ldr	r3, .L884+16
+	ldr	r3, .L867+16
 	ldrh	r2, [r3]
 	lsls	r2, r2, #3
 	bl	ftl_memset
@@ -6706,11 +6596,11 @@ Ftl_write_map_blk_to_last_page:
 	movs	r3, #0
 	ldr	r1, [r10]
 	mov	r2, r3
-.L878:
+.L861:
 	uxth	r0, r3
 	cmp	ip, r0
-	bhi	.L880
-	ldr	r3, .L884+20
+	bhi	.L863
+	ldr	r3, .L867+20
 	ldr	r0, [r6, #8]
 	ldrh	r1, [r3]
 	bl	js_hash
@@ -6718,37 +6608,37 @@ Ftl_write_map_blk_to_last_page:
 	str	r0, [r5, #12]
 	movs	r3, #0
 	mov	r1, r2
-	ldr	r0, .L884+8
+	ldr	r0, .L867+8
 	bl	FlashProgPages
 	ldrh	r3, [r4, #2]
 	mov	r0, r4
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	bl	ftl_map_blk_gc
-	b	.L877
-.L880:
+	b	.L860
+.L863:
 	ldr	r0, [r8, r3, lsl #2]
 	cmp	r7, r0, lsr #10
-	bne	.L879
+	bne	.L862
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r3, [r1, r2, lsl #3]
 	add	lr, r1, r2, lsl #3
 	ldr	r0, [r8, r3, lsl #2]
 	str	r0, [lr, #4]
-.L879:
+.L862:
 	adds	r3, r3, #1
-	b	.L878
-.L885:
+	b	.L861
+.L868:
 	.align	2
-.L884:
-	.word	.LANCHOR148
+.L867:
+	.word	.LANCHOR147
 	.word	.LC1
-	.word	.LANCHOR138
-	.word	.LANCHOR114
-	.word	.LANCHOR20
-	.word	.LANCHOR23
-	.word	.LANCHOR106
+	.word	.LANCHOR137
+	.word	.LANCHOR113
+	.word	.LANCHOR19
+	.word	.LANCHOR22
+	.word	.LANCHOR105
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
 	.section	.text.FtlMapWritePage,"ax",%progbits
 	.align	1
@@ -6763,13 +6653,13 @@ FtlMapWritePage:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-	ldr	r8, .L910+32
+	ldr	r8, .L893+32
 	mov	r7, r1
 	movs	r6, #0
 	str	r2, [sp]
 	mov	fp, r8
-.L887:
-	ldr	r2, .L910
+.L870:
+	ldr	r2, .L893
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
@@ -6777,44 +6667,44 @@ FtlMapWritePage:
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	bge	.L888
+	bge	.L871
 	ldrh	r2, [r4]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L889
-.L888:
+	bne	.L872
+.L871:
 	mov	r0, r4
 	bl	Ftl_write_map_blk_to_last_page
-.L889:
+.L872:
 	ldrh	r2, [r4]
 	ldr	r3, [r4, #12]
 	ldrh	r3, [r3, r2, lsl #1]
-	cbnz	r3, .L890
+	cbnz	r3, .L873
 	mov	r2, #700
-	ldr	r1, .L910+4
-	ldr	r0, .L910+8
+	ldr	r1, .L893+4
+	ldr	r0, .L893+8
 	bl	printf
-.L890:
+.L873:
 	ldrh	r2, [r4]
 	ldrh	r3, [r4, #10]
 	cmp	r2, r3
-	bcc	.L891
+	bcc	.L874
 	movw	r2, #701
-	ldr	r1, .L910+4
-	ldr	r0, .L910+8
+	ldr	r1, .L893+4
+	ldr	r0, .L893+8
 	bl	printf
-.L891:
+.L874:
 	ldrh	r2, [r4]
 	movs	r1, #0
 	ldr	r3, [r4, #12]
-	ldr	r5, .L910+12
+	ldr	r5, .L893+12
 	ldrh	r3, [r3, r2, lsl #1]
 	ldrh	r2, [r4, #2]
 	str	r3, [sp, #4]
 	orr	r2, r2, r3, lsl #10
 	ldr	r3, [sp]
 	str	r2, [r5, #4]
-	ldr	r2, .L910+16
+	ldr	r2, .L893+16
 	str	r3, [r5, #8]
 	ldr	r0, [r2]
 	movs	r2, #16
@@ -6827,7 +6717,7 @@ FtlMapWritePage:
 	str	r1, [r10, #4]
 	ldrh	r1, [r4, #4]
 	strh	r3, [r10, #2]	@ movhi
-	ldr	r3, .L910+20
+	ldr	r3, .L893+20
 	strh	r1, [r10]	@ movhi
 	strh	r7, [r10, #8]	@ movhi
 	ldrh	r1, [r3]
@@ -6844,10 +6734,10 @@ FtlMapWritePage:
 	uxth	r2, r2
 	adds	r3, r1, #1
 	strh	r2, [r4, #2]	@ movhi
-	bne	.L892
+	bne	.L875
 	ldr	r1, [r5, #4]
 	adds	r6, r6, #1
-	ldr	r0, .L910+24
+	ldr	r0, .L893+24
 	uxth	r6, r6
 	bl	printf
 	ldrh	r2, [r4, #2]
@@ -6857,49 +6747,49 @@ FtlMapWritePage:
 	addls	r2, r2, #-1
 	strhls	r2, [r4, #2]	@ movhi
 	cmp	r6, #3
-	bls	.L894
+	bls	.L877
 	mov	r2, r6
 	ldr	r1, [r5, #4]
-	ldr	r0, .L910+28
+	ldr	r0, .L893+28
 	bl	printf
-.L895:
-	b	.L895
-.L894:
+.L878:
+	b	.L878
+.L877:
 	ldr	r3, [r4, #32]
 	cmp	r3, #0
-	beq	.L887
-.L909:
-	b	.L909
+	beq	.L870
 .L892:
+	b	.L892
+.L875:
 	cmp	r2, #1
-	beq	.L898
+	beq	.L881
 	cmp	r1, #256
-	beq	.L898
+	beq	.L881
 	ldr	r0, [r4, #36]
-	cbz	r0, .L899
-.L898:
+	cbz	r0, .L882
+.L881:
 	movs	r3, #0
 	str	r3, [r4, #36]
-	b	.L887
-.L899:
+	b	.L870
+.L882:
 	ldr	r2, [r5, #4]
 	ldr	r3, [r4, #24]
 	str	r2, [r3, r7, lsl #2]
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L911:
+.L894:
 	.align	2
-.L910:
-	.word	.LANCHOR88
-	.word	.LANCHOR149
+.L893:
+	.word	.LANCHOR87
+	.word	.LANCHOR148
 	.word	.LC1
-	.word	.LANCHOR138
-	.word	.LANCHOR114
-	.word	.LANCHOR23
+	.word	.LANCHOR137
+	.word	.LANCHOR113
+	.word	.LANCHOR22
 	.word	.LC22
 	.word	.LC23
-	.word	.LANCHOR20
+	.word	.LANCHOR19
 	.size	FtlMapWritePage, .-FtlMapWritePage
 	.section	.text.load_l2p_region,"ax",%progbits
 	.align	1
@@ -6912,31 +6802,31 @@ FtlMapWritePage:
 load_l2p_region:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L919
+	ldr	r3, .L902
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r5, r0
 	mov	r10, r1
 	ldrh	r2, [r3]
 	str	r3, [sp, #4]
 	cmp	r2, r0
-	bcs	.L913
+	bcs	.L896
 	movw	r2, #485
-	ldr	r1, .L919+4
-	ldr	r0, .L919+8
+	ldr	r1, .L902+4
+	ldr	r0, .L902+8
 	bl	printf
-.L913:
-	ldr	fp, .L919+48
+.L896:
+	ldr	fp, .L902+48
 	movs	r4, #12
-	ldr	r7, .L919+12
+	ldr	r7, .L902+12
 	ldr	r3, [fp]
 	ldr	r8, [r3, r5, lsl #2]
 	cmp	r8, #0
-	bne	.L914
+	bne	.L897
 	mul	r4, r4, r10
 	ldr	r2, [r7]
 	movs	r1, #255
 	adds	r0, r2, r4
-	ldr	r2, .L919+16
+	ldr	r2, .L902+16
 	ldr	r0, [r0, #8]
 	ldrh	r2, [r2]
 	bl	ftl_memset
@@ -6944,21 +6834,21 @@ load_l2p_region:
 	adds	r1, r2, r4
 	strh	r5, [r2, r4]	@ movhi
 	str	r8, [r1, #4]
-.L915:
+.L898:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L914:
+.L897:
 	mul	r4, r4, r10
 	ldr	r2, [r7]
-	ldr	r6, .L919+20
+	ldr	r6, .L902+20
 	add	r2, r2, r4
 	mov	r0, r6
 	ldr	r2, [r2, #8]
 	str	r8, [r6, #4]
 	str	r2, [r6, #8]
-	ldr	r2, .L919+24
+	ldr	r2, .L902+24
 	ldr	r2, [r2]
 	str	r2, [r6, #12]
 	movs	r2, #1
@@ -6967,68 +6857,68 @@ load_l2p_region:
 	ldr	r10, [r6, #12]
 	ldrh	r2, [r10, #8]
 	cmp	r2, r5
-	beq	.L916
+	beq	.L899
 	mov	r2, r8
 	mov	r1, r5
-	ldr	r0, .L919+28
+	ldr	r0, .L902+28
 	bl	printf
 	movs	r3, #4
 	ldr	r1, [r6, #12]
 	mov	r2, r3
-	ldr	r0, .L919+32
+	ldr	r0, .L902+32
 	bl	rknand_print_hex
 	ldr	r3, [sp, #4]
 	movs	r2, #4
 	ldr	r1, [fp]
-	ldr	r0, .L919+36
+	ldr	r0, .L902+36
 	ldrh	r3, [r3]
 	bl	rknand_print_hex
-.L917:
+.L900:
 	ldrh	r3, [r10, #8]
 	cmp	r3, r5
-	beq	.L918
+	beq	.L901
 	mov	r2, #508
-	ldr	r1, .L919+4
-	ldr	r0, .L919+8
+	ldr	r1, .L902+4
+	ldr	r0, .L902+8
 	bl	printf
-.L918:
+.L901:
 	ldr	r3, [r7]
 	movs	r1, #0
 	adds	r2, r3, r4
 	str	r1, [r2, #4]
 	strh	r5, [r3, r4]	@ movhi
-	b	.L915
-.L916:
+	b	.L898
+.L899:
 	ldr	r2, [r6]
 	cmp	r2, #256
-	bne	.L917
+	bne	.L900
 	mov	r2, r8
 	mov	r1, r5
-	ldr	r0, .L919+40
+	ldr	r0, .L902+40
 	bl	printf
 	ldr	r3, [r7]
 	mov	r1, r5
-	ldr	r0, .L919+44
+	ldr	r0, .L902+44
 	add	r3, r3, r4
 	ldr	r2, [r3, #8]
 	bl	FtlMapWritePage
-	b	.L917
-.L920:
+	b	.L900
+.L903:
 	.align	2
-.L919:
-	.word	.LANCHOR32
-	.word	.LANCHOR150
+.L902:
+	.word	.LANCHOR31
+	.word	.LANCHOR149
 	.word	.LC1
-	.word	.LANCHOR55
-	.word	.LANCHOR23
-	.word	.LANCHOR138
-	.word	.LANCHOR114
+	.word	.LANCHOR54
+	.word	.LANCHOR22
+	.word	.LANCHOR137
+	.word	.LANCHOR113
 	.word	.LC24
 	.word	.LC13
 	.word	.LC25
 	.word	.LC26
-	.word	.LANCHOR129
-	.word	.LANCHOR124
+	.word	.LANCHOR128
+	.word	.LANCHOR123
 	.size	load_l2p_region, .-load_l2p_region
 	.section	.text.ftl_map_blk_gc,"ax",%progbits
 	.align	1
@@ -7051,13 +6941,13 @@ ftl_map_blk_gc:
 	ldrh	r2, [r4, #8]
 	subs	r3, r3, #5
 	cmp	r2, r3
-	blt	.L922
+	blt	.L905
 	uxth	r0, r0
 	ldrh	r8, [r5, r0, lsl #1]
 	cmp	r8, #0
-	beq	.L922
+	beq	.L905
 	ldr	r3, [r4, #32]
-	cbnz	r3, .L922
+	cbnz	r3, .L905
 	movs	r2, #1
 	str	r2, [r4, #32]
 	strh	r3, [r5, r0, lsl #1]	@ movhi
@@ -7065,39 +6955,39 @@ ftl_map_blk_gc:
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	ldr	r3, .L937
+	ldr	r3, .L920
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L923
+	bcc	.L906
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L923:
-	ldr	r5, .L937+4
+.L906:
+	ldr	r5, .L920+4
 	movs	r6, #0
-.L924:
+.L907:
 	ldrh	r3, [r4, #6]
 	uxth	r10, r6
 	cmp	r3, r10
-	bhi	.L931
+	bhi	.L914
 	movs	r1, #1
 	mov	r0, r8
 	bl	FtlFreeSysBlkQueueIn
 	movs	r3, #0
 	str	r3, [r4, #32]
-.L922:
-	ldr	r3, .L937
+.L905:
+	ldr	r3, .L920
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L932
+	bcc	.L915
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L932:
+.L915:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L931:
+.L914:
 	ldr	r3, [sp]
 	uxth	fp, r6
 	add	r3, r3, fp, lsl #2
@@ -7105,58 +6995,58 @@ ftl_map_blk_gc:
 	ldr	r3, [sp]
 	ldr	r2, [r3, fp, lsl #2]
 	cmp	r8, r2, lsr #10
-	bne	.L925
-	ldr	r3, .L937+8
+	bne	.L908
+	ldr	r3, .L920+8
 	str	r2, [r5, #4]
 	movs	r2, #1
-	ldr	r0, .L937+4
+	ldr	r0, .L920+4
 	ldr	r1, [r3]
 	str	r1, [r5, #8]
-	ldr	r1, .L937+12
+	ldr	r1, .L920+12
 	ldr	r7, [r1]
 	mov	r1, r2
 	str	r7, [r5, #12]
 	bl	FlashReadPages
 	ldrh	r2, [r7, #8]
 	cmp	r2, r10
-	beq	.L926
+	beq	.L909
 	movw	r2, #611
-	ldr	r1, .L937+16
-	ldr	r0, .L937+20
+	ldr	r1, .L920+16
+	ldr	r0, .L920+20
 	bl	printf
-.L926:
+.L909:
 	ldr	r2, [r5]
 	adds	r2, r2, #1
-	bne	.L927
-.L929:
+	bne	.L910
+.L912:
 	ldr	r2, [sp, #4]
 	movs	r3, #0
 	str	r3, [r2]
-.L928:
-	b	.L928
-.L927:
+.L911:
+	b	.L911
+.L910:
 	ldrh	r2, [r7, #8]
 	cmp	r2, r10
-	bne	.L929
+	bne	.L912
 	ldrh	r1, [r7]
 	ldrh	r2, [r4, #4]
 	cmp	r1, r2
-	bne	.L929
+	bne	.L912
 	ldr	r2, [r5, #8]
 	mov	r1, fp
 	mov	r0, r4
 	bl	FtlMapWritePage
-.L925:
+.L908:
 	adds	r6, r6, #1
-	b	.L924
-.L938:
+	b	.L907
+.L921:
 	.align	2
-.L937:
-	.word	.LANCHOR20
-	.word	.LANCHOR138
-	.word	.LANCHOR107
-	.word	.LANCHOR114
-	.word	.LANCHOR151
+.L920:
+	.word	.LANCHOR19
+	.word	.LANCHOR137
+	.word	.LANCHOR106
+	.word	.LANCHOR113
+	.word	.LANCHOR150
 	.word	.LC1
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
 	.section	.text.flush_l2p_region,"ax",%progbits
@@ -7172,9 +7062,9 @@ flush_l2p_region:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #12
-	ldr	r5, .L940
+	ldr	r5, .L923
 	muls	r4, r0, r4
-	ldr	r0, .L940+4
+	ldr	r0, .L923+4
 	ldr	r3, [r5]
 	adds	r2, r3, r4
 	ldrh	r1, [r3, r4]
@@ -7187,11 +7077,11 @@ flush_l2p_region:
 	bic	r3, r3, #-2147483648
 	str	r3, [r4, #4]
 	pop	{r3, r4, r5, pc}
-.L941:
+.L924:
 	.align	2
-.L940:
-	.word	.LANCHOR55
-	.word	.LANCHOR129
+.L923:
+	.word	.LANCHOR54
+	.word	.LANCHOR128
 	.size	flush_l2p_region, .-flush_l2p_region
 	.section	.text.l2p_flush,"ax",%progbits
 	.align	1
@@ -7206,32 +7096,32 @@ l2p_flush:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
 	movs	r4, #0
-	ldr	r5, .L946
-	ldr	r6, .L946+4
-.L943:
+	ldr	r5, .L929
+	ldr	r6, .L929+4
+.L926:
 	ldrh	r3, [r5]
 	uxth	r0, r4
 	cmp	r3, r0
-	bhi	.L945
+	bhi	.L928
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L945:
+.L928:
 	ldr	r2, [r6]
 	uxth	r3, r4
 	movs	r1, #12
 	mla	r3, r1, r3, r2
 	ldr	r3, [r3, #4]
 	cmp	r3, #0
-	bge	.L944
+	bge	.L927
 	bl	flush_l2p_region
-.L944:
+.L927:
 	adds	r4, r4, #1
-	b	.L943
-.L947:
+	b	.L926
+.L930:
 	.align	2
-.L946:
-	.word	.LANCHOR33
-	.word	.LANCHOR55
+.L929:
+	.word	.LANCHOR32
+	.word	.LANCHOR54
 	.size	l2p_flush, .-l2p_flush
 	.section	.text.log2phys,"ax",%progbits
 	.align	1
@@ -7246,36 +7136,36 @@ log2phys:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r7, r2
-	ldr	r4, .L961
+	ldr	r4, .L944
 	mov	r10, r0
 	mov	r5, r1
-	ldr	r3, .L961+4
+	ldr	r3, .L944+4
 	ldr	r2, [r4]
 	ldrh	fp, [r3]
 	cmp	r0, r2
-	bcc	.L949
+	bcc	.L932
 	movw	r2, #813
-	ldr	r1, .L961+8
-	ldr	r0, .L961+12
+	ldr	r1, .L944+8
+	ldr	r0, .L944+12
 	bl	printf
-.L949:
+.L932:
 	ldr	r3, [r4]
 	cmp	r10, r3
-	bcs	.L950
-	ldr	r3, .L961+16
+	bcs	.L933
+	ldr	r3, .L944+16
 	add	fp, fp, #7
 	lsr	r6, r10, fp
 	movs	r2, #0
 	ldrh	r1, [r3]
 	uxth	r6, r6
-	ldr	r3, .L961+20
+	ldr	r3, .L944+20
 	ldr	r0, [r3]
 	mov	r8, r3
 	movs	r3, #12
-.L951:
+.L934:
 	uxth	r4, r2
 	cmp	r4, r1
-	bcc	.L956
+	bcc	.L939
 	str	r3, [sp, #4]
 	bl	select_l2p_ram_region
 	ldr	r3, [sp, #4]
@@ -7286,31 +7176,31 @@ log2phys:
 	ldrh	r2, [r2, r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L957
+	beq	.L940
 	ldr	r3, [r1, #4]
 	cmp	r3, #0
-	bge	.L957
+	bge	.L940
 	bl	flush_l2p_region
-.L957:
+.L940:
 	mov	r1, r4
 	mov	r0, r6
 	bl	load_l2p_region
-	b	.L953
-.L950:
+	b	.L936
+.L933:
 	mov	r0, #-1
-	cbnz	r7, .L948
+	cbnz	r7, .L931
 	str	r0, [r5]
-.L948:
+.L931:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L956:
+.L939:
 	adds	r2, r2, #1
 	mla	ip, r3, r2, r0
 	ldrh	ip, [ip, #-12]
 	cmp	ip, r6
-	bne	.L951
-.L953:
+	bne	.L934
+.L936:
 	movs	r0, #1
 	ldr	r2, [r8]
 	lsl	r0, r0, fp
@@ -7319,42 +7209,42 @@ log2phys:
 	and	r0, r0, r10
 	uxth	r0, r0
 	mla	r3, r3, r4, r2
-	cbnz	r7, .L954
+	cbnz	r7, .L937
 	ldr	r3, [r3, #8]
 	ldr	r3, [r3, r0, lsl #2]
 	str	r3, [r5]
-.L955:
+.L938:
 	ldr	r2, [r8]
 	movs	r3, #12
 	mla	r4, r3, r4, r2
 	ldr	r3, [r4, #4]
 	adds	r2, r3, #1
-	beq	.L959
+	beq	.L942
 	adds	r3, r3, #1
 	str	r3, [r4, #4]
-.L959:
+.L942:
 	movs	r0, #0
-	b	.L948
-.L954:
+	b	.L931
+.L937:
 	ldr	r1, [r5]
 	ldr	r2, [r3, #8]
 	str	r1, [r2, r0, lsl #2]
 	ldr	r2, [r3, #4]
 	orr	r2, r2, #-2147483648
 	str	r2, [r3, #4]
-	ldr	r3, .L961+24
+	ldr	r3, .L944+24
 	strh	r6, [r3]	@ movhi
-	b	.L955
-.L962:
+	b	.L938
+.L945:
 	.align	2
-.L961:
+.L944:
+	.word	.LANCHOR151
+	.word	.LANCHOR21
 	.word	.LANCHOR152
-	.word	.LANCHOR22
-	.word	.LANCHOR153
 	.word	.LC1
-	.word	.LANCHOR33
+	.word	.LANCHOR32
+	.word	.LANCHOR54
 	.word	.LANCHOR55
-	.word	.LANCHOR56
 	.size	log2phys, .-log2phys
 	.section	.text.FtlReUsePrevPpa,"ax",%progbits
 	.align	1
@@ -7369,22 +7259,22 @@ FtlReUsePrevPpa:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r6, r0
-	ldr	r5, .L973
+	ldr	r5, .L956
 	ubfx	r0, r1, #10, #16
 	str	r1, [sp, #4]
 	bl	P2V_block_in_plane
 	ldr	r2, [r5]
 	mov	r7, r0
 	ldrh	r3, [r2, r0, lsl #1]
-	cbnz	r3, .L964
-	ldr	r2, .L973+4
+	cbnz	r3, .L947
+	ldr	r2, .L956+4
 	ldr	r4, [r2]
 	cmp	r4, #0
-	beq	.L965
-	ldr	r2, .L973+8
+	beq	.L948
+	ldr	r2, .L956+8
 	movw	lr, #65535
-	ldr	ip, .L973+24
-	ldr	r0, .L973+12
+	ldr	ip, .L956+24
+	ldr	r0, .L956+12
 	ldr	r2, [r2]
 	ldrh	r1, [r0]
 	mov	r8, r0
@@ -7393,22 +7283,22 @@ FtlReUsePrevPpa:
 	mul	r4, ip, r4
 	mov	ip, #6
 	uxth	r4, r4
-.L966:
+.L949:
 	uxth	r0, r3
 	cmp	r1, r0
-	bls	.L965
+	bls	.L948
 	cmp	r4, r7
-	bne	.L967
+	bne	.L950
 	mov	r1, r4
-	ldr	r0, .L973+4
+	ldr	r0, .L956+4
 	bl	List_remove_node
 	ldrh	r3, [r8]
-	cbnz	r3, .L968
-	movw	r2, #1733
-	ldr	r1, .L973+16
-	ldr	r0, .L973+20
+	cbnz	r3, .L951
+	movw	r2, #1735
+	ldr	r1, .L956+16
+	ldr	r0, .L956+20
 	bl	printf
-.L968:
+.L951:
 	ldrh	r3, [r8]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -7416,17 +7306,17 @@ FtlReUsePrevPpa:
 	bl	INSERT_DATA_LIST
 	ldr	r2, [r5]
 	ldrh	r3, [r2, r7, lsl #1]
-.L964:
+.L947:
 	adds	r3, r3, #1
 	strh	r3, [r2, r7, lsl #1]	@ movhi
-	b	.L965
-.L967:
+	b	.L948
+.L950:
 	mul	r4, ip, r4
 	adds	r3, r3, #1
 	ldrh	r4, [r2, r4]
 	cmp	r4, lr
-	bne	.L966
-.L965:
+	bne	.L949
+.L948:
 	movs	r2, #1
 	add	r1, sp, #4
 	mov	r0, r6
@@ -7434,14 +7324,14 @@ FtlReUsePrevPpa:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L974:
+.L957:
 	.align	2
-.L973:
-	.word	.LANCHOR42
-	.word	.LANCHOR46
-	.word	.LANCHOR40
-	.word	.LANCHOR48
-	.word	.LANCHOR154
+.L956:
+	.word	.LANCHOR41
+	.word	.LANCHOR45
+	.word	.LANCHOR39
+	.word	.LANCHOR47
+	.word	.LANCHOR153
 	.word	.LC1
 	.word	-1431655765
 	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
@@ -7462,144 +7352,144 @@ FtlRecoverySuperblock:
 	mov	r8, r0
 	sub	sp, sp, #48
 	cmp	r3, r2
-	beq	.L1107
+	beq	.L1090
 	ldrh	r3, [r0, #2]
 	str	r3, [sp, #4]
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	ldr	r1, [sp, #4]
 	str	r3, [sp, #20]
-	ldr	r3, .L1116
+	ldr	r3, .L1099
 	ldrh	r3, [r3]
 	cmp	r3, r1
 	mov	r3, #0
-	bne	.L978
+	bne	.L961
 	strh	r3, [r0, #4]	@ movhi
-.L1114:
+.L1097:
 	strb	r3, [r8, #6]
-.L1107:
+.L1090:
 	movs	r0, #0
 	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L978:
+.L961:
 	ldrh	r0, [r0, #16]
-.L979:
+.L962:
 	cmp	r0, r2
 	uxth	r5, r3
 	add	r3, r3, #1
-	beq	.L980
+	beq	.L963
 	movs	r1, #1
 	bl	FtlGetLastWrittenPage
 	mov	r4, r0
 	adds	r0, r0, #1
-	beq	.L981
-	ldr	r3, .L1116+4
+	beq	.L964
+	ldr	r3, .L1099+4
 	movs	r2, #0
 	mov	r5, r2
 	movw	fp, #65535
 	mov	r10, #20
 	ldrh	ip, [r3]
-	ldr	r3, .L1116+8
+	ldr	r3, .L1099+8
 	ldr	r0, [r3]
-	ldr	r3, .L1116+12
+	ldr	r3, .L1099+12
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
-	ldr	r3, .L1116+16
+	ldr	r3, .L1099+16
 	ldrh	r7, [r3]
-	ldr	r3, .L1116+20
+	ldr	r3, .L1099+20
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L1116+24
+	ldr	r3, .L1099+24
 	ldrh	lr, [r3]
 	add	r3, r8, #16
 	str	r3, [sp, #16]
 	str	r3, [sp]
-.L982:
+.L965:
 	uxth	r3, r2
 	cmp	ip, r3
-	bhi	.L986
+	bhi	.L969
 	movs	r2, #0
 	mov	r1, r5
 	bl	FlashReadPages
-	ldr	r2, .L1116+28
+	ldr	r2, .L1099+28
 	uxth	r1, r4
 	movw	fp, #65535
 	str	r1, [sp, #12]
 	ldr	r3, [r2]
 	subs	r3, r3, #1
 	str	r3, [sp]
-	ldr	r3, .L1116+8
+	ldr	r3, .L1099+8
 	ldr	r10, [r3]
 	movs	r3, #0
 	mov	r7, r10
-.L987:
+.L970:
 	uxth	r1, r3
 	cmp	r5, r1
-	bhi	.L992
-	bne	.L990
+	bhi	.L975
+	bne	.L973
 	adds	r3, r4, #1
 	uxth	r3, r3
 	str	r3, [sp, #8]
-.L1108:
+.L1091:
 	ldr	r0, [r10, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_plane
-	ldr	r3, .L1116
+	ldr	r3, .L1099
 	mov	r10, r0
 	ldr	r2, [sp, #8]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bne	.L994
+	bne	.L977
 	ldrh	r3, [sp, #8]
 	strh	r3, [r8, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [r8, #6]
 	strh	r3, [r8, #4]	@ movhi
-.L994:
+.L977:
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #4]
 	cmp	r3, r2
-	bne	.L995
+	bne	.L978
 	ldr	r3, [sp, #20]
 	cmp	r10, r3
-	bne	.L995
+	bne	.L978
 	ldr	r1, [sp, #8]
 	mov	r2, r10
-.L1115:
+.L1098:
 	mov	r0, r8
 	bl	ftl_sb_update_avl_pages
-	b	.L1107
-.L980:
+	b	.L1090
+.L963:
 	uxth	r1, r3
 	adds	r1, r1, #8
 	ldrh	r0, [r8, r1, lsl #1]
-	b	.L979
-.L981:
+	b	.L962
+.L964:
 	ldr	r3, [sp, #4]
-	cbz	r3, .L983
-	mov	r2, #1800
-	ldr	r1, .L1116+32
-	ldr	r0, .L1116+36
+	cbz	r3, .L966
+	movw	r2, #1802
+	ldr	r1, .L1099+32
+	ldr	r0, .L1099+36
 	bl	printf
-.L983:
+.L966:
 	ldr	r3, [sp, #20]
-	cbz	r3, .L984
+	cbz	r3, .L967
 	cmp	r5, r3
-	beq	.L984
-	movw	r2, #1801
-	ldr	r1, .L1116+32
-	ldr	r0, .L1116+36
+	beq	.L967
+	movw	r2, #1803
+	ldr	r1, .L1099+32
+	ldr	r0, .L1099+36
 	bl	printf
-.L984:
+.L967:
 	movs	r3, #0
 	strh	r3, [r8, #2]	@ movhi
-	b	.L1114
-.L986:
+	b	.L1097
+.L969:
 	ldr	r1, [sp]
 	ldrh	r3, [r1], #2
 	cmp	r3, fp
 	str	r1, [sp]
-	beq	.L985
+	beq	.L968
 	mla	r1, r10, r5, r0
 	ldr	r6, [sp, #8]
 	orr	r3, r4, r3, lsl #10
@@ -7615,53 +7505,53 @@ FtlRecoverySuperblock:
 	bic	r3, r3, #3
 	add	r3, r3, r6
 	str	r3, [r1, #12]
-.L985:
+.L968:
 	adds	r2, r2, #1
-	b	.L982
-.L992:
+	b	.L965
+.L975:
 	ldr	r1, [r7]
-	cbnz	r1, .L988
+	cbnz	r1, .L971
 	ldr	r1, [r7, #12]
 	ldr	r6, [r1, #4]
 	str	r1, [sp, #8]
 	adds	r1, r6, #1
-	beq	.L989
+	beq	.L972
 	ldr	r1, [r2]
 	mov	r0, r6
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L989
+	cbz	r0, .L972
 	adds	r6, r6, #1
 	str	r6, [r2]
-.L989:
+.L972:
 	ldr	r1, [sp, #8]
 	ldr	r1, [r1]
 	adds	r1, r1, #1
-	bne	.L991
-.L990:
+	bne	.L974
+.L973:
 	uxth	r2, r4
 	uxth	r3, r3
 	str	r2, [sp, #8]
 	movs	r2, #20
 	mla	r10, r2, r3, r10
-	b	.L1108
-.L988:
+	b	.L1091
+.L971:
 	ldr	fp, [sp, #12]
-.L991:
+.L974:
 	adds	r3, r3, #1
 	adds	r7, r7, #20
-	b	.L987
-.L995:
+	b	.L970
+.L978:
 	movw	r3, #65535
 	cmp	fp, r3
-	bne	.L996
+	bne	.L979
 	ldrb	r3, [r8, #8]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L997
-.L996:
-	ldr	r3, .L1116+40
+	bne	.L980
+.L979:
+	ldr	r3, .L1099+40
 	uxth	r6, r4
 	uxth	r4, r4
-	ldr	r7, .L1116+8
+	ldr	r7, .L1099+8
 	ldr	r2, [r3]
 	adds	r2, r2, #1
 	itt	eq
@@ -7674,10 +7564,10 @@ FtlRecoverySuperblock:
 	subgt	r4, r6, #7
 	ldrle	r4, [sp, #4]
 	uxthgt	r4, r4
-.L1000:
+.L983:
 	cmp	r4, r6
-	bhi	.L1010
-	ldr	r3, .L1116+4
+	bhi	.L993
+	ldr	r3, .L1099+4
 	movw	lr, #65535
 	ldr	r0, [r7]
 	mov	ip, #20
@@ -7686,74 +7576,74 @@ FtlRecoverySuperblock:
 	str	r3, [sp, #12]
 	movs	r3, #0
 	mov	r5, r3
-	b	.L1011
-.L1002:
+	b	.L994
+.L985:
 	ldr	r1, [sp, #12]
 	ldrh	r2, [r1], #2
 	cmp	r2, lr
 	str	r1, [sp, #12]
-	beq	.L1001
+	beq	.L984
 	mla	r1, ip, r5, r0
 	adds	r5, r5, #1
 	orr	r2, r4, r2, lsl #10
 	uxth	r5, r5
 	str	r2, [r1, #4]
-.L1001:
+.L984:
 	adds	r3, r3, #1
-.L1011:
+.L994:
 	uxth	r2, r3
 	cmp	fp, r2
-	bhi	.L1002
+	bhi	.L985
 	mov	r1, r5
 	movs	r2, #0
 	bl	FlashReadPages
-	ldr	r3, .L1116+40
+	ldr	r3, .L1099+40
 	movs	r1, #20
 	movs	r0, #0
 	movw	ip, #65535
 	ldr	r2, [r3]
 	ldr	r3, [r7]
 	mla	r5, r1, r5, r3
-.L1003:
+.L986:
 	cmp	r5, r3
-	bne	.L1008
-	cbz	r0, .L1009
-	ldr	r3, .L1116+40
+	bne	.L991
+	cbz	r0, .L992
+	ldr	r3, .L1099+40
 	str	r2, [r3]
-.L1009:
+.L992:
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L1000
-.L1117:
+	b	.L983
+.L1100:
 	.align	2
-.L1116:
-	.word	.LANCHOR19
-	.word	.LANCHOR3
-	.word	.LANCHOR103
+.L1099:
+	.word	.LANCHOR18
+	.word	.LANCHOR2
+	.word	.LANCHOR102
+	.word	.LANCHOR63
+	.word	.LANCHOR22
 	.word	.LANCHOR64
 	.word	.LANCHOR23
-	.word	.LANCHOR65
-	.word	.LANCHOR24
-	.word	.LANCHOR83
-	.word	.LANCHOR155
+	.word	.LANCHOR82
+	.word	.LANCHOR154
 	.word	.LC1
-	.word	.LANCHOR134
-.L1008:
+	.word	.LANCHOR133
+.L991:
 	ldr	r1, [r3]
 	cmp	r1, #0
-	beq	.L1004
-	cbz	r0, .L997
-.L1109:
-	ldr	r3, .L1118
+	beq	.L987
+	cbz	r0, .L980
+.L1092:
+	ldr	r3, .L1101
 	str	r2, [r3]
-.L997:
+.L980:
 	ldr	fp, [sp, #4]
 	movs	r2, #1
-	ldr	r6, .L1118+4
-	ldr	r3, .L1118+8
+	ldr	r6, .L1101+4
+	ldr	r3, .L1101+8
 	strh	r2, [r3]	@ movhi
-.L1012:
-	ldr	r3, .L1118+12
+.L995:
+	ldr	r3, .L1101+12
 	movw	lr, #65535
 	ldr	r0, [r6]
 	movs	r7, #20
@@ -7761,64 +7651,64 @@ FtlRecoverySuperblock:
 	ldrh	r4, [r3]
 	movs	r3, #0
 	str	r3, [sp, #12]
-.L1013:
+.L996:
 	uxth	r2, r3
 	cmp	r4, r2
-	bhi	.L1015
+	bhi	.L998
 	movs	r2, #0
 	ldr	r1, [sp, #12]
 	bl	FlashReadPages
 	movs	r3, #0
-.L1113:
+.L1096:
 	str	r3, [sp, #24]
 	ldr	r2, [sp, #12]
 	ldrh	r3, [sp, #24]
 	cmp	r2, r3
-	bhi	.L1044
-	ldr	r3, .L1118+16
+	bhi	.L1027
+	ldr	r3, .L1101+16
 	add	fp, fp, #1
 	uxth	fp, fp
 	ldrh	r3, [r3]
 	cmp	r3, fp
-	bne	.L1012
-	ldr	r2, .L1118+12
+	bne	.L995
+	ldr	r2, .L1101+12
 	movw	r0, #65535
 	movs	r3, #0
 	strh	fp, [r8, #2]	@ movhi
 	strh	r3, [r8, #4]	@ movhi
 	ldrh	r2, [r2]
-.L1045:
+.L1028:
 	uxth	r1, r3
 	cmp	r1, r2
-	bcs	.L1107
+	bcs	.L1090
 	ldr	r1, [sp, #16]
 	ldrh	r4, [r1], #2
 	cmp	r4, r0
 	str	r1, [sp, #16]
 	add	r1, r3, #1
-	bne	.L1114
+	bne	.L1097
 	mov	r3, r1
-	b	.L1045
-.L1004:
+	b	.L1028
+.L987:
 	ldr	r1, [r3, #12]
 	ldrh	lr, [r1]
 	cmp	lr, ip
-	beq	.L1007
+	beq	.L990
 	ldr	r1, [r1, #4]
 	cmp	r1, #-1
 	itt	ne
 	movne	r2, r1
 	movne	r0, #1
-.L1007:
+.L990:
 	adds	r3, r3, #20
-	b	.L1003
-.L1010:
+	b	.L986
+.L993:
 	mov	r2, #-1
-	b	.L1109
-.L1015:
+	b	.L1092
+.L998:
 	ldrh	r2, [r1], #2
 	cmp	r2, lr
-	beq	.L1014
+	beq	.L997
 	ldr	r5, [sp, #12]
 	orr	r2, fp, r2, lsl #10
 	mla	ip, r7, r5, r0
@@ -7827,10 +7717,10 @@ FtlRecoverySuperblock:
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r2, [sp, #12]
-.L1014:
+.L997:
 	adds	r3, r3, #1
-	b	.L1013
-.L1044:
+	b	.L996
+.L1027:
 	ldr	r3, [sp, #24]
 	movs	r5, #20
 	muls	r5, r3, r5
@@ -7843,45 +7733,45 @@ FtlRecoverySuperblock:
 	bl	P2V_plane
 	ldr	r3, [sp, #4]
 	cmp	fp, r3
-	bcc	.L1017
+	bcc	.L1000
 	ldr	r3, [sp, #28]
-	bne	.L1018
+	bne	.L1001
 	ldr	r2, [sp, #20]
 	cmp	r2, r0
-	bhi	.L1017
-.L1018:
+	bhi	.L1000
+.L1001:
 	ldr	r2, [sp, #8]
 	cmp	fp, r2
-	bne	.L1019
+	bne	.L1002
 	cmp	r10, r0
-	beq	.L1020
-.L1019:
+	beq	.L1003
+.L1002:
 	ldr	r3, [r3, r5]
 	adds	r3, r3, #1
-	beq	.L1021
+	beq	.L1004
 	ldr	r3, [r7, #12]
 	movw	r2, #61589
 	ldrh	r1, [r3]
 	cmp	r1, r2
-	beq	.L1022
+	beq	.L1005
 	ldrh	r0, [r8]
-.L1110:
+.L1093:
 	bl	decrement_vpc_count
-	b	.L1017
-.L1022:
+	b	.L1000
+.L1005:
 	ldr	r2, [r3, #4]
 	str	r2, [sp]
 	adds	r2, r2, #1
-	beq	.L1023
-	ldr	r2, .L1118+20
+	beq	.L1006
+	ldr	r2, .L1101+20
 	ldr	r0, [sp]
 	ldr	r1, [r2]
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L1023
+	cbz	r0, .L1006
 	ldr	r1, [sp]
 	adds	r1, r1, #1
 	str	r1, [r2]
-.L1023:
+.L1006:
 	ldr	r4, [r3, #8]
 	add	r1, sp, #40
 	ldr	r3, [r3, #12]
@@ -7889,17 +7779,17 @@ FtlRecoverySuperblock:
 	mov	r0, r4
 	str	r3, [sp, #36]
 	bl	log2phys
-	ldr	r3, .L1118
+	ldr	r3, .L1101
 	ldr	r1, [r3]
 	adds	r3, r1, #1
-	beq	.L1024
+	beq	.L1007
 	ldr	r0, [sp]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1024
+	beq	.L1007
 	ldr	r3, [sp, #36]
 	adds	r7, r3, #1
-	beq	.L1025
+	beq	.L1008
 	ldr	r0, [r6]
 	movs	r2, #0
 	movs	r1, #1
@@ -7911,157 +7801,157 @@ FtlRecoverySuperblock:
 	ldr	r1, [r2, r5]
 	adds	r3, r2, r5
 	adds	r1, r1, #1
-	bne	.L1026
-.L1027:
+	bne	.L1009
+.L1010:
 	mov	r3, #-1
 	str	r3, [sp, #36]
-.L1034:
+.L1017:
 	ldr	r7, [sp, #36]
 	adds	r0, r7, #1
-	beq	.L1017
-.L1048:
+	beq	.L1000
+.L1031:
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L1118+24
+	ldr	r3, .L1101+24
 	mov	r4, r0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bhi	.L1040
-	movw	r2, #2057
-	ldr	r1, .L1118+28
-	ldr	r0, .L1118+32
+	bhi	.L1023
+	movw	r2, #2059
+	ldr	r1, .L1101+28
+	ldr	r0, .L1101+32
 	bl	printf
-.L1040:
-	ldr	r3, .L1118+36
+.L1023:
+	ldr	r3, .L1101+36
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
 	cmp	r3, #0
-	beq	.L1041
+	beq	.L1024
 	mov	r0, r4
-	b	.L1110
-.L1025:
+	b	.L1093
+.L1008:
 	ldr	r3, [sp, #44]
 	ldr	r2, [sp, #40]
 	cmp	r2, r3
-	bne	.L1017
+	bne	.L1000
 	movs	r2, #1
 	add	r1, sp, #36
 	mov	r0, r4
 	bl	log2phys
-.L1017:
+.L1000:
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	b	.L1113
-.L1026:
+	b	.L1096
+.L1009:
 	ldr	r1, [r7, #8]
 	cmp	r4, r1
-	bne	.L1027
-	ldr	r0, .L1118
+	bne	.L1010
+	ldr	r0, .L1101
 	ldr	r1, [r7, #4]
 	ldr	r0, [r0]
 	str	r1, [sp, #28]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1027
+	beq	.L1010
 	ldr	r1, [sp, #40]
 	ldr	r0, [sp, #44]
 	cmp	r1, r0
-	bne	.L1029
-.L1032:
+	bne	.L1012
+.L1015:
 	ldr	r1, [sp, #36]
 	mov	r0, r4
 	bl	FtlReUsePrevPpa
-	b	.L1027
-.L1029:
+	b	.L1010
+.L1012:
 	ldr	r0, [sp, #36]
 	cmp	r1, r0
-	beq	.L1027
+	beq	.L1010
 	adds	r0, r1, #1
-	beq	.L1030
+	beq	.L1013
 	str	r1, [r3, #4]
 	movs	r2, #0
 	movs	r1, #1
 	mov	r0, r3
 	ldr	r7, [r3, #12]
 	bl	FlashReadPages
-.L1031:
+.L1014:
 	ldr	r3, [r6]
 	ldr	r3, [r3, r5]
 	adds	r3, r3, #1
-	beq	.L1032
+	beq	.L1015
 	ldr	r3, [r7, #4]
-	ldr	r2, .L1118
+	ldr	r2, .L1101
 	mov	r1, r3
 	ldr	r0, [r2]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1032
+	beq	.L1015
 	mov	r1, r3
 	ldr	r0, [sp, #28]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1027
-	b	.L1032
-.L1030:
+	beq	.L1010
+	b	.L1015
+.L1013:
 	str	r1, [r2, r5]
-	b	.L1031
-.L1024:
+	b	.L1014
+.L1007:
 	ldr	r3, [sp, #44]
 	ldr	r2, [sp, #40]
 	cmp	r2, r3
-	beq	.L1034
+	beq	.L1017
 	ldr	r1, [sp, #36]
 	adds	r7, r1, #1
-	beq	.L1036
-	ldr	r3, .L1118+40
+	beq	.L1019
+	ldr	r3, .L1101+40
 	ldr	r3, [r3]
 	cmp	r3, r1, lsr #10
-	bhi	.L1036
-	ldr	r0, .L1118+44
-.L1112:
+	bhi	.L1019
+	ldr	r0, .L1101+44
+.L1095:
 	bl	printf
-	b	.L1017
-.L1119:
+	b	.L1000
+.L1102:
 	.align	2
-.L1118:
-	.word	.LANCHOR134
-	.word	.LANCHOR103
-	.word	.LANCHOR156
-	.word	.LANCHOR3
-	.word	.LANCHOR19
-	.word	.LANCHOR83
-	.word	.LANCHOR5
+.L1101:
+	.word	.LANCHOR133
+	.word	.LANCHOR102
 	.word	.LANCHOR155
+	.word	.LANCHOR2
+	.word	.LANCHOR18
+	.word	.LANCHOR82
+	.word	.LANCHOR4
+	.word	.LANCHOR154
 	.word	.LC1
-	.word	.LANCHOR42
-	.word	.LANCHOR8
+	.word	.LANCHOR41
+	.word	.LANCHOR7
 	.word	.LC27
-.L1036:
+.L1019:
 	movs	r2, #1
 	add	r1, sp, #44
 	mov	r0, r4
 	bl	log2phys
 	ldr	r7, [sp, #40]
 	adds	r5, r7, #1
-	beq	.L1034
+	beq	.L1017
 	ldr	r3, [sp, #36]
 	cmp	r7, r3
-	beq	.L1048
+	beq	.L1031
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L1120
+	ldr	r3, .L1103
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L1039
-	ldr	r3, .L1120+4
+	beq	.L1022
+	ldr	r3, .L1103+4
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L1039
-	ldr	r3, .L1120+8
+	beq	.L1022
+	ldr	r3, .L1103+8
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L1034
-.L1039:
+	bne	.L1017
+.L1022:
 	ldr	r0, [r6]
 	movs	r2, #0
 	movs	r1, #1
@@ -8071,64 +7961,64 @@ FtlRecoverySuperblock:
 	ldr	r3, [r6]
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L1034
+	beq	.L1017
 	ldr	r1, [r5, #4]
 	ldr	r0, [sp]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	bne	.L1034
+	bne	.L1017
 	movs	r2, #1
 	add	r1, sp, #40
 	mov	r0, r4
 	bl	log2phys
-	b	.L1034
-.L1041:
+	b	.L1017
+.L1024:
 	mov	r1, r4
-	ldr	r0, .L1120+12
-	b	.L1112
-.L1021:
-	ldr	r3, .L1120+16
+	ldr	r0, .L1103+12
+	b	.L1095
+.L1004:
+	ldr	r3, .L1103+16
 	ldr	r3, [r3]
 	cmp	r3, #31
-	bhi	.L1042
-	ldr	r2, .L1120+20
+	bhi	.L1025
+	ldr	r2, .L1103+20
 	str	r4, [r2, r3, lsl #2]
 	adds	r3, r3, #1
-	ldr	r2, .L1120+16
+	ldr	r2, .L1103+16
 	str	r3, [r2]
-.L1042:
+.L1025:
 	ldrh	r0, [r8]
 	bl	decrement_vpc_count
-	ldr	r3, .L1120+24
+	ldr	r3, .L1103+24
 	ldr	r2, [r3]
 	adds	r1, r2, #1
-	bne	.L1043
+	bne	.L1026
 	ldr	r2, [sp]
-.L1111:
+.L1094:
 	str	r2, [r3]
-	b	.L1017
-.L1043:
+	b	.L1000
+.L1026:
 	ldr	r1, [sp]
 	cmp	r1, r2
-	bcs	.L1017
+	bcs	.L1000
 	mov	r2, r1
-	b	.L1111
-.L1020:
+	b	.L1094
+.L1003:
 	strb	r10, [r8, #6]
 	mov	r2, r10
 	strh	fp, [r8, #2]	@ movhi
 	mov	r1, fp
-	b	.L1115
-.L1121:
+	b	.L1098
+.L1104:
 	.align	2
-.L1120:
+.L1103:
+	.word	.LANCHOR50
 	.word	.LANCHOR51
 	.word	.LANCHOR52
-	.word	.LANCHOR53
 	.word	.LC28
+	.word	.LANCHOR156
 	.word	.LANCHOR157
-	.word	.LANCHOR158
-	.word	.LANCHOR134
+	.word	.LANCHOR133
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
 	.section	.text.ftl_check_vpc,"ax",%progbits
 	.align	1
@@ -8143,56 +8033,56 @@ ftl_check_vpc:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r6, .L1146
-	ldr	r5, .L1146+4
-	ldr	r1, .L1146+8
-	ldr	r0, .L1146+12
+	ldr	r6, .L1129
+	ldr	r5, .L1129+4
+	ldr	r1, .L1129+8
+	ldr	r0, .L1129+12
 	bl	printf
 	mov	r2, #8192
 	movs	r1, #0
-	ldr	r0, .L1146+4
+	ldr	r0, .L1129+4
 	bl	ftl_memset
-.L1123:
+.L1106:
 	ldr	r3, [r6]
 	cmp	r4, r3
-	bcc	.L1125
-	ldr	r10, .L1146+48
+	bcc	.L1108
+	ldr	r10, .L1129+48
 	movs	r4, #0
-	ldr	r7, .L1146+16
+	ldr	r7, .L1129+16
 	mov	r6, r4
-.L1126:
+.L1109:
 	ldrh	r2, [r10]
 	uxth	r3, r4
 	cmp	r2, r3
-	bhi	.L1128
-	ldr	r3, .L1146+20
+	bhi	.L1111
+	ldr	r3, .L1129+20
 	ldr	r4, [r3]
-	cbz	r4, .L1129
-	ldr	r3, .L1146+24
+	cbz	r4, .L1112
+	ldr	r3, .L1129+24
 	mov	r8, #0
-	ldr	r5, .L1146+28
-	ldr	r10, .L1146+16
+	ldr	r5, .L1129+28
+	ldr	r10, .L1129+16
 	ldrh	r7, [r3]
 	ldr	r3, [r5]
-	ldr	fp, .L1146+4
+	ldr	fp, .L1129+4
 	subs	r4, r4, r3
-	ldr	r3, .L1146+32
+	ldr	r3, .L1129+32
 	asrs	r4, r4, #1
 	muls	r4, r3, r4
 	uxth	r4, r4
-.L1130:
+.L1113:
 	uxth	r3, r8
 	cmp	r7, r3
-	bls	.L1129
+	bls	.L1112
 	ldr	r3, [r10]
 	ldrh	r2, [r3, r4, lsl #1]
-	cbz	r2, .L1131
+	cbz	r2, .L1114
 	movs	r6, #1
 	ldrh	r3, [fp, r4, lsl #1]
 	mov	r1, r4
-	ldr	r0, .L1146+36
+	ldr	r0, .L1129+36
 	bl	printf
-.L1131:
+.L1114:
 	movs	r3, #6
 	ldr	r2, [r5]
 	muls	r4, r3, r4
@@ -8200,72 +8090,72 @@ ftl_check_vpc:
 	add	r8, r8, #1
 	ldrh	r4, [r2, r4]
 	cmp	r4, r3
-	bne	.L1130
-.L1129:
-	cbz	r6, .L1122
-	movw	r2, #2383
-	ldr	r1, .L1146+8
-	ldr	r0, .L1146+40
+	bne	.L1113
+.L1112:
+	cbz	r6, .L1105
+	movw	r2, #2387
+	ldr	r1, .L1129+8
+	ldr	r0, .L1129+40
 	bl	printf
-.L1122:
+.L1105:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1125:
+.L1108:
 	movs	r2, #0
 	add	r1, sp, #4
 	mov	r0, r4
 	bl	log2phys
 	ldr	r0, [sp, #4]
 	adds	r3, r0, #1
-	beq	.L1124
+	beq	.L1107
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r5, r0, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r5, r0, lsl #1]	@ movhi
-.L1124:
+.L1107:
 	adds	r4, r4, #1
-	b	.L1123
-.L1128:
+	b	.L1106
+.L1111:
 	ldr	r3, [r7]
 	uxth	r5, r4
-	ldr	r8, .L1146+4
+	ldr	r8, .L1129+4
 	ldrh	r2, [r3, r5, lsl #1]
 	ldrh	r3, [r8, r5, lsl #1]
 	cmp	r2, r3
-	beq	.L1127
+	beq	.L1110
 	mov	r1, r5
-	ldr	r0, .L1146+44
+	ldr	r0, .L1129+44
 	bl	printf
 	ldr	r3, [r7]
 	movw	r2, #65535
 	ldrh	r3, [r3, r5, lsl #1]
 	cmp	r3, r2
-	beq	.L1127
+	beq	.L1110
 	ldrh	r2, [r8, r5, lsl #1]
 	cmp	r2, r3
 	it	hi
 	movhi	r6, #1
-.L1127:
+.L1110:
 	adds	r4, r4, #1
-	b	.L1126
-.L1147:
+	b	.L1109
+.L1130:
 	.align	2
-.L1146:
-	.word	.LANCHOR152
+.L1129:
+	.word	.LANCHOR151
 	.word	check_vpc_table
-	.word	.LANCHOR159
+	.word	.LANCHOR158
 	.word	.LC29
-	.word	.LANCHOR42
-	.word	.LANCHOR46
-	.word	.LANCHOR48
-	.word	.LANCHOR40
+	.word	.LANCHOR41
+	.word	.LANCHOR45
+	.word	.LANCHOR47
+	.word	.LANCHOR39
 	.word	-1431655765
 	.word	.LC31
 	.word	.LC1
 	.word	.LC30
-	.word	.LANCHOR5
+	.word	.LANCHOR4
 	.size	ftl_check_vpc, .-ftl_check_vpc
 	.section	.text.ftl_scan_all_data,"ax",%progbits
 	.align	1
@@ -8280,60 +8170,60 @@ ftl_scan_all_data:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r5, #0
-	ldr	r7, .L1162
+	ldr	r7, .L1145
 	sub	sp, sp, #32
 	movs	r1, #0
-	ldr	r8, .L1162+24
-	ldr	r0, .L1162+4
+	ldr	r8, .L1145+24
+	ldr	r0, .L1145+4
 	bl	printf
-.L1149:
+.L1132:
 	ldr	r3, [r7]
 	cmp	r5, r3
-	bcc	.L1155
+	bcc	.L1138
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1155:
+.L1138:
 	movs	r2, #0
 	add	r1, sp, #28
 	mov	r0, r5
 	bl	log2phys
 	ubfx	r3, r5, #0, #11
-	cbnz	r3, .L1150
+	cbnz	r3, .L1133
 	ldr	r2, [sp, #28]
 	mov	r1, r5
 	mov	r0, r8
 	bl	printf
-.L1150:
+.L1133:
 	ldr	r3, [sp, #28]
 	adds	r2, r3, #1
-	beq	.L1152
-	ldr	r4, .L1162+8
+	beq	.L1135
+	ldr	r4, .L1145+8
 	movs	r2, #0
 	movs	r1, #1
 	str	r3, [r4, #4]
 	mov	r0, r4
-	ldr	r3, .L1162+12
+	ldr	r3, .L1145+12
 	str	r5, [r4, #16]
 	str	r2, [r4]
 	ldr	r3, [r3]
 	str	r3, [r4, #8]
-	ldr	r3, .L1162+16
+	ldr	r3, .L1145+16
 	ldr	r6, [r3]
 	str	r6, [r4, #12]
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	cmp	r3, #256
-	beq	.L1153
+	beq	.L1136
 	adds	r3, r3, #1
-	beq	.L1153
+	beq	.L1136
 	ldr	r3, [r6, #8]
 	cmp	r5, r3
-	beq	.L1152
-.L1153:
+	beq	.L1135
+.L1136:
 	ldr	r2, [r4, #8]
 	ldr	r3, [r4, #12]
-	ldr	r0, .L1162+20
+	ldr	r0, .L1145+20
 	ldr	r1, [r2, #4]
 	str	r1, [sp, #16]
 	mov	r1, r5
@@ -8348,17 +8238,17 @@ ftl_scan_all_data:
 	ldr	r2, [r4, #4]
 	ldr	r3, [r3]
 	bl	printf
-.L1152:
+.L1135:
 	adds	r5, r5, #1
-	b	.L1149
-.L1163:
+	b	.L1132
+.L1146:
 	.align	2
-.L1162:
-	.word	.LANCHOR152
+.L1145:
+	.word	.LANCHOR151
 	.word	.LC32
-	.word	.LANCHOR138
-	.word	.LANCHOR106
-	.word	.LANCHOR114
+	.word	.LANCHOR137
+	.word	.LANCHOR105
+	.word	.LANCHOR113
 	.word	.LC34
 	.word	.LC33
 	.size	ftl_scan_all_data, .-ftl_scan_all_data
@@ -8373,7 +8263,7 @@ ftl_scan_all_data:
 FtlGcScanTempBlk:
 	@ args = 0, pretend = 0, frame = 48
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1196
+	ldr	r3, .L1179
 	movw	r2, #65535
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #48
@@ -8381,29 +8271,29 @@ FtlGcScanTempBlk:
 	ldrh	r5, [r3]
 	str	r3, [sp, #20]
 	cmp	r5, r2
-	beq	.L1186
-	cbnz	r5, .L1165
-.L1166:
+	beq	.L1169
+	cbnz	r5, .L1148
+.L1149:
 	bl	FtlGcPageVarInit
-	b	.L1167
-.L1186:
+	b	.L1150
+.L1169:
 	movs	r5, #0
-.L1165:
-	ldr	r3, .L1196+4
+.L1148:
+	ldr	r3, .L1179+4
 	ldrh	r3, [r3]
 	cmp	r3, r1
-	beq	.L1166
-.L1167:
-	ldr	fp, .L1196+56
-.L1183:
+	beq	.L1149
+.L1150:
+	ldr	fp, .L1179+56
+.L1166:
 	ldrh	r2, [r4]
 	movs	r3, #0
 	strb	r3, [r4, #8]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1168
-.L1185:
-	ldr	r3, .L1196+8
+	beq	.L1151
+.L1168:
+	ldr	r3, .L1179+8
 	movs	r2, #0
 	ldr	r0, [fp]
 	mov	r10, r2
@@ -8411,38 +8301,38 @@ FtlGcScanTempBlk:
 	mov	r8, #20
 	ldrh	r3, [r3]
 	str	r3, [sp, #8]
-	ldr	r3, .L1196+12
+	ldr	r3, .L1179+12
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L1196+16
+	ldr	r3, .L1179+16
 	ldrh	r3, [r3]
 	str	r3, [sp, #16]
-	ldr	r3, .L1196+20
+	ldr	r3, .L1179+20
 	ldr	r7, [r3]
-	ldr	r3, .L1196+24
+	ldr	r3, .L1179+24
 	ldrh	ip, [r3]
 	add	r3, r4, #16
 	str	r3, [sp, #4]
-.L1169:
+.L1152:
 	ldr	r1, [sp, #8]
 	uxth	r3, r2
 	cmp	r1, r3
-	bhi	.L1171
+	bhi	.L1154
 	mov	r8, #0
 	movs	r2, #0
 	mov	r1, r10
 	bl	FlashReadPages
-.L1172:
+.L1155:
 	uxth	r3, r8
 	cmp	r10, r3
-	bhi	.L1184
-	ldr	r3, .L1196+4
+	bhi	.L1167
+	ldr	r3, .L1179+4
 	adds	r5, r5, #1
 	uxth	r5, r5
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	bhi	.L1185
-.L1168:
+	bhi	.L1168
+.L1151:
 	ldr	r2, [sp, #20]
 	movw	r3, #65535
 	mov	r0, r4
@@ -8456,12 +8346,12 @@ FtlGcScanTempBlk:
 	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1171:
+.L1154:
 	ldr	r1, [sp, #4]
 	ldrh	r3, [r1], #2
 	cmp	r3, lr
 	str	r1, [sp, #4]
-	beq	.L1170
+	beq	.L1153
 	mla	r1, r8, r10, r0
 	orr	r3, r5, r3, lsl #10
 	str	r3, [r1, #4]
@@ -8478,10 +8368,10 @@ FtlGcScanTempBlk:
 	str	r3, [r1, #12]
 	add	r3, r10, #1
 	uxth	r10, r3
-.L1170:
+.L1153:
 	adds	r2, r2, #1
-	b	.L1169
-.L1184:
+	b	.L1152
+.L1167:
 	movs	r3, #20
 	ldr	r2, [fp]
 	mul	r3, r3, r8
@@ -8491,18 +8381,18 @@ FtlGcScanTempBlk:
 	ldr	r7, [r1, #12]
 	str	r0, [sp, #4]
 	cmp	r6, #0
-	bne	.L1173
+	bne	.L1156
 	ldrh	r1, [r7]
 	movw	r2, #65535
 	cmp	r1, r2
-	beq	.L1194
-	ldr	r2, .L1196+28
+	beq	.L1177
+	ldr	r2, .L1179+28
 	ldr	r0, [r7, #8]
 	ldr	r2, [r2]
 	cmp	r0, r2
-	bls	.L1175
-.L1194:
-	ldr	r3, .L1196+32
+	bls	.L1158
+.L1177:
+	ldr	r3, .L1179+32
 	movs	r1, #0
 	ldrh	r2, [r4]
 	movs	r5, #0
@@ -8510,13 +8400,13 @@ FtlGcScanTempBlk:
 	strh	r1, [r3, r2, lsl #1]	@ movhi
 	ldrh	r0, [r4]
 	bl	INSERT_FREE_LIST
-	ldr	r2, .L1196+36
+	ldr	r2, .L1179+36
 	movw	r3, #65535
 	strh	r3, [r4]	@ movhi
 	strh	r3, [r2]	@ movhi
 	bl	FtlGcPageVarInit
-	b	.L1183
-.L1175:
+	b	.L1166
+.L1158:
 	mov	r2, r6
 	add	r1, sp, #24
 	str	r3, [sp, #8]
@@ -8525,74 +8415,74 @@ FtlGcScanTempBlk:
 	ldr	r1, [sp, #24]
 	ldr	r3, [sp, #8]
 	cmp	r2, r1
-	beq	.L1177
-.L1179:
+	beq	.L1160
+.L1162:
 	ldr	r2, [r7, #8]
-.L1195:
+.L1178:
 	ldr	r1, [sp, #4]
 	add	r8, r8, #1
 	ldr	r0, [r7, #12]
 	bl	FtlGcUpdatePage
-	b	.L1172
-.L1177:
+	b	.L1155
+.L1160:
 	str	r3, [sp, #8]
 	adds	r3, r2, #1
-	beq	.L1179
+	beq	.L1162
 	str	r2, [sp, #32]
 	movs	r1, #1
-	ldr	r2, .L1196+40
+	ldr	r2, .L1179+40
 	add	r0, sp, #28
 	ldr	r2, [r2]
 	str	r2, [sp, #36]
-	ldr	r2, .L1196+44
+	ldr	r2, .L1179+44
 	ldr	r2, [r2]
 	str	r2, [sp, #40]
 	mov	r2, r6
 	bl	FlashReadPages
-	ldr	r2, .L1196+48
+	ldr	r2, .L1179+48
 	ldr	r1, [fp]
 	ldr	r3, [sp, #8]
 	ldrh	r2, [r2]
 	ldr	r0, [sp, #36]
 	add	ip, r3, r1
 	lsls	r2, r2, #7
-.L1180:
+.L1163:
 	cmp	r6, r2
-	beq	.L1179
+	beq	.L1162
 	ldr	r1, [ip, #8]
 	ldr	r3, [r0, r6, lsl #2]
 	ldr	r1, [r1, r6, lsl #2]
 	cmp	r1, r3
-	beq	.L1181
+	beq	.L1164
 	ldr	r2, [sp, #32]
 	ldrh	r1, [r4]
-	ldr	r0, .L1196+52
+	ldr	r0, .L1179+52
 	bl	printf
-	b	.L1194
-.L1181:
+	b	.L1177
+.L1164:
 	adds	r6, r6, #1
-	b	.L1180
-.L1173:
+	b	.L1163
+.L1156:
 	mov	r2, #-1
-	b	.L1195
-.L1197:
+	b	.L1178
+.L1180:
 	.align	2
-.L1196:
-	.word	.LANCHOR160
-	.word	.LANCHOR19
-	.word	.LANCHOR3
+.L1179:
+	.word	.LANCHOR159
+	.word	.LANCHOR18
+	.word	.LANCHOR2
+	.word	.LANCHOR63
+	.word	.LANCHOR22
 	.word	.LANCHOR64
 	.word	.LANCHOR23
-	.word	.LANCHOR65
-	.word	.LANCHOR24
-	.word	.LANCHOR152
-	.word	.LANCHOR42
-	.word	.LANCHOR145
-	.word	.LANCHOR110
-	.word	.LANCHOR115
-	.word	.LANCHOR12
+	.word	.LANCHOR151
+	.word	.LANCHOR41
+	.word	.LANCHOR144
+	.word	.LANCHOR109
+	.word	.LANCHOR114
+	.word	.LANCHOR11
 	.word	.LC35
-	.word	.LANCHOR103
+	.word	.LANCHOR102
 	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
 	.section	.text.FtlVendorPartWrite,"ax",%progbits
 	.align	1
@@ -8605,7 +8495,7 @@ FtlGcScanTempBlk:
 FtlVendorPartWrite:
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1210
+	ldr	r3, .L1193
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #104
 	str	r2, [sp]
@@ -8614,26 +8504,26 @@ FtlVendorPartWrite:
 	mov	r5, r1
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1206
-	ldr	r3, .L1210+4
+	bhi	.L1189
+	ldr	r3, .L1193+4
 	mov	r8, #0
 	ldrh	r6, [r3]
 	lsr	r6, r0, r6
 	lsl	fp, r6, #2
-.L1200:
-	cbnz	r5, .L1205
-.L1198:
+.L1183:
+	cbnz	r5, .L1188
+.L1181:
 	mov	r0, r8
 	add	sp, sp, #104
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1205:
-	ldr	r3, .L1210+8
+.L1188:
+	ldr	r3, .L1193+8
 	mov	r0, r7
-	ldr	r10, .L1210+24
+	ldr	r10, .L1193+24
 	ldr	r3, [r3]
 	ldr	r2, [r3, fp]
-	ldr	r3, .L1210+12
+	ldr	r3, .L1193+12
 	str	r2, [sp, #12]
 	ldrh	r3, [r3]
 	mov	r1, r3
@@ -8647,9 +8537,9 @@ FtlVendorPartWrite:
 	cmp	r5, r4
 	it	cc
 	uxthcc	r4, r5
-	cbz	r2, .L1202
+	cbz	r2, .L1185
 	cmp	r4, r3
-	beq	.L1202
+	beq	.L1185
 	ldr	r3, [r10]
 	add	r0, sp, #20
 	str	r2, [sp, #24]
@@ -8659,7 +8549,7 @@ FtlVendorPartWrite:
 	add	r3, sp, #40
 	str	r3, [sp, #32]
 	bl	FlashReadPages
-.L1203:
+.L1186:
 	lsls	r3, r4, #9
 	ldr	r0, [r10]
 	subs	r5, r5, r4
@@ -8672,7 +8562,7 @@ FtlVendorPartWrite:
 	bl	ftl_memcpy
 	ldr	r2, [r10]
 	mov	r1, r6
-	ldr	r0, .L1210+16
+	ldr	r0, .L1193+16
 	adds	r6, r6, #1
 	bl	FtlMapWritePage
 	ldr	r3, [sp]
@@ -8683,27 +8573,27 @@ FtlVendorPartWrite:
 	ldr	r3, [sp, #8]
 	add	r2, r2, r3
 	str	r2, [sp]
-	b	.L1200
-.L1202:
-	ldr	r3, .L1210+20
+	b	.L1183
+.L1185:
+	ldr	r3, .L1193+20
 	movs	r1, #0
 	ldr	r0, [r10]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-	b	.L1203
-.L1206:
+	b	.L1186
+.L1189:
 	mov	r8, #-1
-	b	.L1198
-.L1211:
+	b	.L1181
+.L1194:
 	.align	2
-.L1210:
-	.word	.LANCHOR16
+.L1193:
+	.word	.LANCHOR15
+	.word	.LANCHOR21
+	.word	.LANCHOR122
+	.word	.LANCHOR11
+	.word	.LANCHOR160
 	.word	.LANCHOR22
-	.word	.LANCHOR123
-	.word	.LANCHOR12
-	.word	.LANCHOR161
-	.word	.LANCHOR23
-	.word	.LANCHOR108
+	.word	.LANCHOR107
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.section	.text.Ftl_save_ext_data,"ax",%progbits
 	.align	1
@@ -8717,72 +8607,72 @@ Ftl_save_ext_data:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L1214
-	ldr	r3, .L1214+4
+	ldr	r2, .L1197
+	ldr	r3, .L1197+4
 	ldr	r1, [r2]
 	cmp	r1, r3
-	bne	.L1212
-	ldr	r3, .L1214+8
+	bne	.L1195
+	ldr	r3, .L1197+8
 	movs	r1, #1
 	movs	r0, #0
 	str	r3, [r2, #4]
-	ldr	r3, .L1214+12
+	ldr	r3, .L1197+12
 	ldr	r3, [r3]
 	str	r3, [r2, #88]
-	ldr	r3, .L1214+16
+	ldr	r3, .L1197+16
 	ldr	r3, [r3]
 	str	r3, [r2, #92]
-	ldr	r3, .L1214+20
+	ldr	r3, .L1197+20
 	ldr	r3, [r3]
 	str	r3, [r2, #8]
-	ldr	r3, .L1214+24
+	ldr	r3, .L1197+24
 	ldr	r3, [r3]
 	str	r3, [r2, #12]
-	ldr	r3, .L1214+28
+	ldr	r3, .L1197+28
 	ldr	r3, [r3]
 	str	r3, [r2, #16]
-	ldr	r3, .L1214+32
+	ldr	r3, .L1197+32
 	ldr	r3, [r3]
 	str	r3, [r2, #20]
-	ldr	r3, .L1214+36
+	ldr	r3, .L1197+36
 	ldr	r3, [r3]
 	str	r3, [r2, #28]
-	ldr	r3, .L1214+40
+	ldr	r3, .L1197+40
 	ldr	r3, [r3]
 	str	r3, [r2, #32]
-	ldr	r3, .L1214+44
+	ldr	r3, .L1197+44
 	ldr	r3, [r3]
 	str	r3, [r2, #36]
-	ldr	r3, .L1214+48
+	ldr	r3, .L1197+48
 	ldr	r3, [r3]
 	str	r3, [r2, #40]
-	ldr	r3, .L1214+52
+	ldr	r3, .L1197+52
 	ldr	r3, [r3]
 	str	r3, [r2, #44]
-	ldr	r3, .L1214+56
+	ldr	r3, .L1197+56
 	ldr	r3, [r3]
 	str	r3, [r2, #48]
 	b	FtlVendorPartWrite
-.L1212:
+.L1195:
 	bx	lr
-.L1215:
+.L1198:
 	.align	2
-.L1214:
-	.word	.LANCHOR135
+.L1197:
+	.word	.LANCHOR134
 	.word	1179929683
-	.word	1342177352
+	.word	1342177365
+	.word	.LANCHOR161
 	.word	.LANCHOR162
-	.word	.LANCHOR163
+	.word	.LANCHOR83
 	.word	.LANCHOR84
-	.word	.LANCHOR85
-	.word	.LANCHOR89
 	.word	.LANCHOR88
-	.word	.LANCHOR91
-	.word	.LANCHOR80
-	.word	.LANCHOR86
 	.word	.LANCHOR87
+	.word	.LANCHOR90
+	.word	.LANCHOR79
+	.word	.LANCHOR85
+	.word	.LANCHOR86
+	.word	.LANCHOR91
 	.word	.LANCHOR92
-	.word	.LANCHOR93
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
 	.section	.text.FtlEctTblFlush,"ax",%progbits
 	.align	1
@@ -8795,7 +8685,7 @@ Ftl_save_ext_data:
 FtlEctTblFlush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L1221
+	ldr	r2, .L1204
 	push	{r3, lr}
 	ldrh	r3, [r2]
 	cmp	r3, #31
@@ -8804,22 +8694,22 @@ FtlEctTblFlush:
 	movhi	r3, #32
 	strhls	r3, [r2]	@ movhi
 	movls	r3, #1
-	ldr	r2, .L1221+4
-	cbnz	r0, .L1218
+	ldr	r2, .L1204+4
+	cbnz	r0, .L1201
 	ldr	r1, [r2]
 	ldr	r0, [r1, #20]
 	ldr	r1, [r1, #16]
 	add	r3, r3, r0
 	cmp	r1, r3
-	bcc	.L1219
-.L1218:
+	bcc	.L1202
+.L1201:
 	ldr	r2, [r2]
 	movs	r0, #64
 	ldr	r3, [r2, #16]
 	str	r3, [r2, #20]
-	ldr	r3, .L1221+8
+	ldr	r3, .L1204+8
 	str	r3, [r2]
-	ldr	r3, .L1221+12
+	ldr	r3, .L1204+12
 	ldrh	r1, [r3]
 	lsls	r3, r1, #9
 	str	r3, [r2, #12]
@@ -8830,16 +8720,16 @@ FtlEctTblFlush:
 	str	r3, [r2, #4]
 	bl	FtlVendorPartWrite
 	bl	Ftl_save_ext_data
-.L1219:
+.L1202:
 	movs	r0, #0
 	pop	{r3, pc}
-.L1222:
+.L1205:
 	.align	2
-.L1221:
-	.word	.LANCHOR164
-	.word	.LANCHOR118
+.L1204:
+	.word	.LANCHOR163
+	.word	.LANCHOR117
 	.word	1112818501
-	.word	.LANCHOR116
+	.word	.LANCHOR115
 	.size	FtlEctTblFlush, .-FtlEctTblFlush
 	.section	.text.sftl_vendor_write,"ax",%progbits
 	.align	1
@@ -8867,7 +8757,7 @@ sftl_vendor_write:
 FtlVendorPartRead:
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1234
+	ldr	r3, .L1217
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, r2
 	adds	r2, r0, r1
@@ -8876,28 +8766,28 @@ FtlVendorPartRead:
 	mov	r6, r1
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1233
-	ldr	r3, .L1234+4
+	bhi	.L1216
+	ldr	r3, .L1217+4
 	mov	r8, #0
-	ldr	fp, .L1234+28
+	ldr	fp, .L1217+28
 	ldrh	r5, [r3]
 	lsr	r5, r0, r5
 	lsls	r3, r5, #2
 	str	r3, [sp]
-.L1226:
-	cbnz	r6, .L1232
-.L1224:
+.L1209:
+	cbnz	r6, .L1215
+.L1207:
 	mov	r0, r8
 	add	sp, sp, #104
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1232:
-	ldr	r3, .L1234+8
+.L1215:
+	ldr	r3, .L1217+8
 	mov	r0, r7
 	ldr	r2, [sp]
 	ldr	r3, [r3]
 	ldr	r3, [r3, r2]
-	ldr	r2, .L1234+12
+	ldr	r2, .L1217+12
 	str	r3, [sp, #8]
 	ldrh	r4, [r2]
 	mov	r1, r4
@@ -8912,7 +8802,7 @@ FtlVendorPartRead:
 	lsls	r2, r4, #9
 	str	r2, [sp, #8]
 	cmp	r3, #0
-	beq	.L1228
+	beq	.L1211
 	ldr	r2, [fp]
 	add	r0, sp, #20
 	str	r3, [sp, #24]
@@ -8926,28 +8816,28 @@ FtlVendorPartRead:
 	ldr	r2, [sp, #20]
 	ldr	r3, [sp, #12]
 	adds	r2, r2, #1
-	ldr	r2, .L1234+16
+	ldr	r2, .L1217+16
 	it	eq
 	moveq	r8, #-1
 	ldr	r2, [r2]
 	cmp	r2, #256
-	bne	.L1230
+	bne	.L1213
 	mov	r2, r3
 	mov	r1, r5
-	ldr	r0, .L1234+20
+	ldr	r0, .L1217+20
 	bl	printf
 	ldr	r2, [fp]
 	mov	r1, r5
-	ldr	r0, .L1234+24
+	ldr	r0, .L1217+24
 	bl	FtlMapWritePage
-.L1230:
+.L1213:
 	ldr	r1, [fp]
 	lsls	r2, r4, #9
 	ldr	r3, [sp, #4]
 	mov	r0, r10
 	add	r1, r1, r3, lsl #9
 	bl	ftl_memcpy
-.L1231:
+.L1214:
 	ldr	r3, [sp, #8]
 	adds	r5, r5, #1
 	subs	r6, r6, r4
@@ -8956,27 +8846,27 @@ FtlVendorPartRead:
 	ldr	r3, [sp]
 	adds	r3, r3, #4
 	str	r3, [sp]
-	b	.L1226
-.L1228:
+	b	.L1209
+.L1211:
 	lsls	r2, r4, #9
 	mov	r1, r3
 	mov	r0, r10
 	bl	ftl_memset
-	b	.L1231
-.L1233:
+	b	.L1214
+.L1216:
 	mov	r8, #-1
-	b	.L1224
-.L1235:
+	b	.L1207
+.L1218:
 	.align	2
-.L1234:
-	.word	.LANCHOR16
-	.word	.LANCHOR22
-	.word	.LANCHOR123
-	.word	.LANCHOR12
-	.word	.LANCHOR138
-	.word	.LC36
-	.word	.LANCHOR161
-	.word	.LANCHOR108
+.L1217:
+	.word	.LANCHOR15
+	.word	.LANCHOR21
+	.word	.LANCHOR122
+	.word	.LANCHOR11
+	.word	.LANCHOR137
+	.word	.LC36
+	.word	.LANCHOR160
+	.word	.LANCHOR107
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
 	.section	.text.FtlLoadEctTbl,"ax",%progbits
 	.align	1
@@ -8991,32 +8881,32 @@ FtlLoadEctTbl:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r0, #64
-	ldr	r4, .L1238
-	ldr	r5, .L1238+4
+	ldr	r4, .L1221
+	ldr	r5, .L1221+4
 	ldr	r2, [r4]
 	ldrh	r1, [r5]
 	bl	FtlVendorPartRead
 	ldr	r3, [r4]
 	ldr	r2, [r3]
-	ldr	r3, .L1238+8
+	ldr	r3, .L1221+8
 	cmp	r2, r3
-	beq	.L1237
-	ldr	r1, .L1238+12
-	ldr	r0, .L1238+16
+	beq	.L1220
+	ldr	r1, .L1221+12
+	ldr	r0, .L1221+16
 	bl	printf
 	ldrh	r2, [r5]
 	movs	r1, #0
 	ldr	r0, [r4]
 	lsls	r2, r2, #9
 	bl	ftl_memset
-.L1237:
+.L1220:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L1239:
+.L1222:
 	.align	2
-.L1238:
-	.word	.LANCHOR118
-	.word	.LANCHOR116
+.L1221:
+	.word	.LANCHOR117
+	.word	.LANCHOR115
 	.word	1112818501
 	.word	.LC37
 	.word	.LC38
@@ -9034,93 +8924,93 @@ Ftl_load_ext_data:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r1, #1
-	ldr	r4, .L1243
+	ldr	r4, .L1226
 	movs	r0, #0
-	ldr	r5, .L1243+4
+	ldr	r5, .L1226+4
 	mov	r2, r4
 	bl	FtlVendorPartRead
 	ldr	r3, [r4]
 	cmp	r3, r5
-	beq	.L1241
+	beq	.L1224
 	mov	r2, #512
 	movs	r1, #0
 	mov	r0, r4
 	bl	ftl_memset
 	str	r5, [r4]
-.L1241:
+.L1224:
 	ldr	r3, [r4]
 	cmp	r3, r5
-	ldr	r3, .L1243+8
-	bne	.L1242
+	ldr	r3, .L1226+8
+	bne	.L1225
 	ldr	r1, [r4, #88]
-	ldr	r2, .L1243+12
+	ldr	r2, .L1226+12
 	str	r1, [r2]
 	ldr	r1, [r4, #92]
-	ldr	r2, .L1243+16
+	ldr	r2, .L1226+16
 	str	r1, [r2]
 	ldr	r1, [r4, #8]
-	ldr	r2, .L1243+20
+	ldr	r2, .L1226+20
 	str	r1, [r2]
 	ldr	r1, [r4, #12]
-	ldr	r2, .L1243+24
+	ldr	r2, .L1226+24
 	str	r1, [r2]
 	ldr	r1, [r4, #16]
-	ldr	r2, .L1243+28
+	ldr	r2, .L1226+28
 	str	r1, [r2]
 	ldr	r1, [r4, #20]
-	ldr	r2, .L1243+32
+	ldr	r2, .L1226+32
 	str	r1, [r2]
 	ldr	r2, [r4, #28]
 	ldr	r1, [r4, #32]
 	str	r2, [r3]
-	ldr	r2, .L1243+36
+	ldr	r2, .L1226+36
 	str	r1, [r2]
 	ldr	r1, [r4, #36]
-	ldr	r2, .L1243+40
+	ldr	r2, .L1226+40
 	str	r1, [r2]
 	ldr	r1, [r4, #40]
-	ldr	r2, .L1243+44
+	ldr	r2, .L1226+44
 	str	r1, [r2]
 	ldr	r1, [r4, #44]
-	ldr	r2, .L1243+48
+	ldr	r2, .L1226+48
 	str	r1, [r2]
 	ldr	r1, [r4, #48]
-	ldr	r2, .L1243+52
+	ldr	r2, .L1226+52
 	str	r1, [r2]
-.L1242:
-	ldr	r1, .L1243+56
-	ldr	r2, .L1243+60
+.L1225:
+	ldr	r1, .L1226+56
+	ldr	r2, .L1226+60
 	ldr	r3, [r3]
 	ldr	r0, [r1]
 	ldrh	r2, [r2]
-	ldr	r1, .L1243+64
+	ldr	r1, .L1226+64
 	mla	r0, r0, r2, r3
 	ldrh	r1, [r1]
 	bl	__aeabi_uidiv
-	ldr	r3, .L1243+68
+	ldr	r3, .L1226+68
 	str	r0, [r3]
 	pop	{r3, r4, r5, pc}
-.L1244:
+.L1227:
 	.align	2
-.L1243:
-	.word	.LANCHOR135
+.L1226:
+	.word	.LANCHOR134
 	.word	1179929683
-	.word	.LANCHOR91
+	.word	.LANCHOR90
+	.word	.LANCHOR161
 	.word	.LANCHOR162
-	.word	.LANCHOR163
+	.word	.LANCHOR83
 	.word	.LANCHOR84
-	.word	.LANCHOR85
-	.word	.LANCHOR89
 	.word	.LANCHOR88
-	.word	.LANCHOR80
-	.word	.LANCHOR86
 	.word	.LANCHOR87
+	.word	.LANCHOR79
+	.word	.LANCHOR85
+	.word	.LANCHOR86
+	.word	.LANCHOR91
 	.word	.LANCHOR92
-	.word	.LANCHOR93
-	.word	.LANCHOR90
-	.word	.LANCHOR14
-	.word	.LANCHOR5
-	.word	.LANCHOR143
+	.word	.LANCHOR89
+	.word	.LANCHOR13
+	.word	.LANCHOR4
+	.word	.LANCHOR142
 	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
 	.section	.text.sftl_vendor_read,"ax",%progbits
 	.align	1
@@ -9152,30 +9042,30 @@ FtlMapBlkWriteDump_data:
 	mov	r4, r0
 	ldr	r3, [r0, #36]
 	cmp	r3, #0
-	beq	.L1246
+	beq	.L1229
 	movs	r3, #0
-	ldr	r5, .L1258
+	ldr	r5, .L1241
 	str	r3, [r0, #36]
-	ldr	r3, .L1258+4
+	ldr	r3, .L1241+4
 	ldrh	r6, [r0, #6]
 	mov	r7, r5
 	ldr	r10, [r0, #24]
 	ldr	r3, [r3]
 	str	r3, [r5, #8]
-	ldr	r3, .L1258+8
+	ldr	r3, .L1241+8
 	ldr	r8, [r3]
 	ldrh	r3, [r0, #2]
 	str	r8, [r5, #12]
-	cbz	r3, .L1248
-	ldr	r2, .L1258+12
+	cbz	r3, .L1231
+	ldr	r2, .L1241+12
 	ldrh	r2, [r2]
 	subs	r2, r2, #1
 	cmp	r3, r2
-	bge	.L1248
+	bge	.L1231
 	ldrh	r2, [r0]
 	movw	r1, #65535
 	cmp	r2, r1
-	beq	.L1248
+	beq	.L1231
 	ldr	r1, [r0, #12]
 	subs	r3, r3, #1
 	mov	r0, r5
@@ -9187,49 +9077,49 @@ FtlMapBlkWriteDump_data:
 	bl	FlashReadPages
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L1248
+	beq	.L1231
 	ldr	r3, [r4, #24]
 	ldrh	r1, [r8, #8]
 	ldr	r2, [r3, r1, lsl #2]
 	ldr	r3, [r5, #4]
 	cmp	r2, r3
-	bne	.L1248
+	bne	.L1231
 	ldr	r2, [r5, #8]
-.L1257:
+.L1240:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
 	b	FtlMapWritePage
-.L1248:
+.L1231:
 	subs	r6, r6, #1
 	uxth	r6, r6
 	ldr	r3, [r10, r6, lsl #2]
 	str	r3, [r7, #4]
-	cbz	r3, .L1249
+	cbz	r3, .L1232
 	movs	r2, #1
-	ldr	r0, .L1258
+	ldr	r0, .L1241
 	mov	r1, r2
 	bl	FlashReadPages
-.L1250:
+.L1233:
 	ldr	r2, [r7, #8]
 	mov	r1, r6
-	b	.L1257
-.L1249:
-	ldr	r3, .L1258+16
+	b	.L1240
+.L1232:
+	ldr	r3, .L1241+16
 	movs	r1, #255
 	ldr	r0, [r7, #8]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-	b	.L1250
-.L1246:
+	b	.L1233
+.L1229:
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L1259:
+.L1242:
 	.align	2
-.L1258:
-	.word	.LANCHOR138
-	.word	.LANCHOR107
-	.word	.LANCHOR114
-	.word	.LANCHOR20
-	.word	.LANCHOR23
+.L1241:
+	.word	.LANCHOR137
+	.word	.LANCHOR106
+	.word	.LANCHOR113
+	.word	.LANCHOR19
+	.word	.LANCHOR22
 	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
 	.section	.text.FtlVpcTblFlush,"ax",%progbits
 	.align	1
@@ -9243,35 +9133,36 @@ FtlVpcTblFlush:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r10, #0
-	ldr	r5, .L1275
-	ldr	r3, .L1275+4
-	ldr	fp, .L1275+76
-	ldr	r6, .L1275+8
-	ldr	r7, [r3]
-	ldr	r0, [fp]
-	ldrh	r3, [r5]
-	str	r7, [r6, #12]
+	mov	r8, #0
+	ldr	r3, .L1258
+	ldr	r5, .L1258+4
+	ldr	fp, .L1258+72
+	ldr	r0, [r3]
+	ldr	r6, .L1258+8
+	ldr	r7, [fp]
+	ldrh	r2, [r5]
 	str	r0, [r6, #8]
-	strh	r3, [r7, #2]	@ movhi
-	movw	r3, #61604
-	ldr	r4, .L1275+12
-	strh	r3, [r7]	@ movhi
-	ldr	r2, .L1275+16
-	ldr	r3, [r5, #8]
-	ldr	ip, .L1275+80
-	str	r10, [r7, #8]
-	str	r3, [r7, #4]
+	str	r7, [r6, #12]
+	strh	r2, [r7, #2]	@ movhi
+	movw	r2, #61604
+	strh	r2, [r7]	@ movhi
+	ldr	r2, [r5, #8]
+	ldr	r4, .L1258+12
+	ldr	ip, .L1258+76
+	str	r2, [r7, #4]
+	ldr	r2, .L1258+16
+	str	r8, [r7, #8]
+	str	r8, [r7, #12]
 	stm	r4, {r2, ip}
 	ldrh	r2, [r5, #6]
-	str	r10, [r7, #12]
-	ldr	r8, .L1275+84
+	str	r3, [sp]
+	ldr	r10, .L1258+80
 	strh	r2, [r4, #8]	@ movhi
-	ldr	r2, .L1275+20
-	ldr	r3, .L1275+24
+	ldr	r2, .L1258+20
+	ldr	r3, .L1258+24
 	ldrh	r2, [r2]
 	strb	r2, [r4, #10]
-	ldr	r2, .L1275+28
+	ldr	r2, .L1258+28
 	ldrh	r1, [r2]
 	ldrh	ip, [r2, #2]
 	strh	r1, [r4, #14]	@ movhi
@@ -9279,17 +9170,17 @@ FtlVpcTblFlush:
 	ldrb	r2, [r2, #8]	@ zero_extendqisi2
 	strb	r2, [r4, #11]
 	orr	r1, r1, ip, lsl #6
-	ldr	r2, .L1275+32
+	ldr	r2, .L1258+32
 	strh	r1, [r4, #16]	@ movhi
 	ldrh	r1, [r2]
 	ldrh	ip, [r2, #2]
 	strh	r1, [r4, #18]	@ movhi
 	ldrb	r1, [r2, #6]	@ zero_extendqisi2
 	ldrb	r2, [r2, #8]	@ zero_extendqisi2
-	strb	r2, [r4, #12]
 	orr	r1, r1, ip, lsl #6
-	ldr	r2, .L1275+36
 	strh	r1, [r4, #20]	@ movhi
+	strb	r2, [r4, #12]
+	ldr	r2, .L1258+36
 	ldrh	r1, [r2]
 	ldrh	ip, [r2, #2]
 	strh	r1, [r4, #22]	@ movhi
@@ -9297,88 +9188,75 @@ FtlVpcTblFlush:
 	ldrb	r2, [r2, #8]	@ zero_extendqisi2
 	strb	r2, [r4, #13]
 	orr	r1, r1, ip, lsl #6
-	ldr	r2, .L1275+40
+	ldr	r2, .L1258+40
 	strh	r1, [r4, #24]	@ movhi
 	movs	r1, #255
 	ldr	r2, [r2]
 	str	r2, [r4, #32]
-	ldr	r2, [r8]
+	ldr	r2, [r10]
 	str	r2, [r4, #40]
-	ldr	r2, .L1275+44
+	ldr	r2, .L1258+44
 	ldr	r2, [r2]
 	str	r2, [r4, #36]
 	ldrh	r2, [r3]
 	bl	ftl_memset
 	mov	r1, r4
-	ldr	r4, .L1275+48
 	movs	r2, #48
 	ldr	r0, [r6, #8]
+	movw	r4, #65535
 	bl	ftl_memcpy
-	ldrh	r2, [r4]
+	ldr	r2, .L1258+48
 	ldr	r0, [r6, #8]
-	ldr	r1, .L1275+52
-	lsls	r2, r2, #1
+	ldr	r1, .L1258+52
+	ldrh	r2, [r2]
 	adds	r0, r0, #48
 	ldr	r1, [r1]
+	lsls	r2, r2, #1
 	bl	ftl_memcpy
-	ldrh	r0, [r4]
-	ldr	r1, .L1275+56
-	ldr	r4, [r6, #8]
-	lsrs	r2, r0, #3
-	adds	r0, r0, #24
-	lsls	r0, r0, #1
-	ldr	r1, [r1]
-	adds	r2, r2, #4
-	bic	r0, r0, #3
-	add	r0, r0, r4
-	mov	r4, r10
-	bl	ftl_memcpy
-	mov	r0, r10
-	ldr	r10, .L1275+4
+	mov	r0, r8
 	bl	FtlUpdateVaildLpn
-	movw	r3, #65535
-	str	r3, [sp]
-	ldr	r3, .L1275+24
+	ldr	r3, .L1258+24
 	str	r3, [sp, #4]
-.L1261:
-	ldr	r3, [fp]
+.L1244:
+	ldr	r3, [sp]
 	ldrh	r1, [r5, #2]
 	ldrh	r2, [r5]
+	ldr	r3, [r3]
 	str	r3, [r6, #8]
-	ldr	r3, [r10]
+	ldr	r3, [fp]
 	str	r3, [r6, #12]
 	orr	r3, r1, r2, lsl #10
 	str	r3, [r6, #4]
-	ldr	r3, .L1275+60
+	ldr	r3, .L1258+56
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r1, r3
-	blt	.L1262
-	ldrh	r3, [r5, #4]
-	strh	r2, [r5, #4]	@ movhi
-	str	r3, [sp]
+	blt	.L1245
 	movs	r3, #0
+	ldrh	r4, [r5, #4]
 	strh	r3, [r5, #2]	@ movhi
+	strh	r2, [r5, #4]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, [r8]
+	ldr	r3, [r10]
 	strh	r0, [r5]	@ movhi
 	adds	r2, r3, #1
 	str	r3, [r5, #8]
-	str	r2, [r8]
+	str	r2, [r10]
 	lsls	r2, r0, #10
 	str	r2, [r6, #4]
 	str	r3, [r7, #4]
 	strh	r0, [r7, #2]	@ movhi
-.L1262:
+.L1245:
 	ldr	r3, [sp, #4]
-	ldr	r0, [fp]
 	ldrh	r1, [r3]
+	ldr	r3, [sp]
+	ldr	r0, [r3]
 	bl	js_hash
 	movs	r3, #1
 	str	r0, [r7, #12]
 	mov	r2, r3
 	mov	r1, r3
-	ldr	r0, .L1275+8
+	ldr	r0, .L1258+8
 	bl	FlashProgPages
 	ldrh	r3, [r5, #2]
 	ldr	r2, [r6]
@@ -9386,73 +9264,71 @@ FtlVpcTblFlush:
 	uxth	r3, r3
 	adds	r1, r2, #1
 	strh	r3, [r5, #2]	@ movhi
-	bne	.L1263
+	bne	.L1246
 	cmp	r3, #1
-	bne	.L1264
+	bne	.L1247
 	movw	r2, #1138
-	ldr	r1, .L1275+64
-	ldr	r0, .L1275+68
+	ldr	r1, .L1258+60
+	ldr	r0, .L1258+64
 	bl	printf
-.L1264:
+.L1247:
 	ldrh	r3, [r5, #2]
-	adds	r4, r4, #1
-	uxth	r4, r4
+	add	r8, r8, #1
+	uxth	r8, r8
 	cmp	r3, #1
 	itttt	eq
-	ldreq	r3, .L1275+60
+	ldreq	r3, .L1258+56
 	ldrheq	r3, [r3]
 	addeq	r3, r3, #-1
 	strheq	r3, [r5, #2]	@ movhi
-	cmp	r4, #3
-	bls	.L1261
-	mov	r2, r4
+	cmp	r8, #3
+	bls	.L1244
+	mov	r2, r8
 	ldr	r1, [r6, #4]
-	ldr	r0, .L1275+72
+	ldr	r0, .L1258+68
 	bl	printf
-.L1267:
-	b	.L1267
-.L1263:
+.L1250:
+	b	.L1250
+.L1246:
 	cmp	r3, #1
-	beq	.L1261
+	beq	.L1244
 	cmp	r2, #256
-	beq	.L1261
-	ldr	r2, [sp]
+	beq	.L1244
 	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L1268
+	cmp	r4, r3
+	beq	.L1251
 	movs	r1, #1
-	mov	r0, r2
+	mov	r0, r4
 	bl	FtlFreeSysBlkQueueIn
-.L1268:
+.L1251:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1276:
+.L1259:
 	.align	2
-.L1275:
-	.word	.LANCHOR139
-	.word	.LANCHOR114
+.L1258:
+	.word	.LANCHOR105
 	.word	.LANCHOR138
-	.word	.LANCHOR39
+	.word	.LANCHOR137
+	.word	.LANCHOR38
 	.word	1179929683
-	.word	.LANCHOR10
-	.word	.LANCHOR23
+	.word	.LANCHOR9
+	.word	.LANCHOR22
+	.word	.LANCHOR50
 	.word	.LANCHOR51
 	.word	.LANCHOR52
-	.word	.LANCHOR53
-	.word	.LANCHOR90
-	.word	.LANCHOR83
-	.word	.LANCHOR5
-	.word	.LANCHOR42
-	.word	.LANCHOR1
-	.word	.LANCHOR20
-	.word	.LANCHOR165
+	.word	.LANCHOR89
+	.word	.LANCHOR82
+	.word	.LANCHOR4
+	.word	.LANCHOR41
+	.word	.LANCHOR19
+	.word	.LANCHOR164
 	.word	.LC1
 	.word	.LC39
-	.word	.LANCHOR106
-	.word	1342177352
-	.word	.LANCHOR82
+	.word	.LANCHOR113
+	.word	1342177365
+	.word	.LANCHOR81
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
 	.section	.text.FtlSysFlush,"ax",%progbits
 	.align	1
@@ -9485,18 +9361,18 @@ sftl_deinit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L1280
+	ldr	r3, .L1263
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L1279
+	bne	.L1262
 	bl	FtlSysFlush
-.L1279:
+.L1262:
 	movs	r0, #0
 	pop	{r3, pc}
-.L1281:
+.L1264:
 	.align	2
-.L1280:
-	.word	.LANCHOR166
+.L1263:
+	.word	.LANCHOR165
 	.size	sftl_deinit, .-sftl_deinit
 	.section	.text.FtlDiscard,"ax",%progbits
 	.align	1
@@ -9509,94 +9385,98 @@ sftl_deinit:
 FtlDiscard:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1297
-	adds	r2, r0, r1
+	ldr	r3, .L1282
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	mov	r7, r0
-	mov	r5, r1
+	mov	r6, r0
+	mov	r4, r1
 	ldr	r3, [r3]
-	cmp	r2, r3
-	bhi	.L1290
+	cmp	r3, r0
+	bls	.L1275
+	cmp	r3, r1
+	bcc	.L1275
+	adds	r2, r0, r1
+	cmp	r3, r2
+	bcc	.L1275
 	cmp	r1, #31
-	bhi	.L1284
-.L1289:
+	bhi	.L1267
+.L1272:
 	movs	r0, #0
-.L1282:
+.L1265:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1284:
-	ldr	r8, .L1297+12
-	ldrh	r4, [r8]
-	mov	r1, r4
+.L1267:
+	ldr	r8, .L1282+12
+	ldrh	r5, [r8]
+	mov	r1, r5
 	bl	__aeabi_uidiv
-	smulbb	r3, r0, r4
-	mov	r6, r0
-	subs	r7, r7, r3
-	uxth	r7, r7
-	cbz	r7, .L1285
-	subs	r4, r4, r7
-	adds	r6, r6, #1
-	cmp	r4, r5
+	smulbb	r3, r0, r5
+	mov	r7, r0
+	subs	r6, r6, r3
+	uxth	r6, r6
+	cbz	r6, .L1268
+	subs	r5, r5, r6
+	adds	r7, r7, #1
+	cmp	r5, r4
 	it	cs
-	movcs	r4, r5
-	uxth	r4, r4
-	subs	r5, r5, r4
-.L1285:
-	ldr	r4, .L1297+4
+	movcs	r5, r4
+	uxth	r5, r5
+	subs	r4, r4, r5
+.L1268:
+	ldr	r5, .L1282+4
 	mov	r3, #-1
-	ldr	r7, .L1297+8
+	ldr	r6, .L1282+8
 	str	r3, [sp, #4]
-.L1286:
+.L1269:
 	ldrh	r3, [r8]
-	cmp	r5, r3
-	bcs	.L1288
-	ldr	r3, .L1297+4
+	cmp	r4, r3
+	bcs	.L1271
+	ldr	r3, .L1282+4
 	ldr	r2, [r3]
 	cmp	r2, #32
-	bls	.L1289
+	bls	.L1272
 	movs	r4, #0
 	str	r4, [r3]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L1289
-.L1288:
+	b	.L1272
+.L1271:
 	movs	r2, #0
 	mov	r1, sp
-	mov	r0, r6
+	mov	r0, r7
 	bl	log2phys
 	ldr	r3, [sp]
 	adds	r3, r3, #1
-	beq	.L1287
-	ldr	r3, [r4]
+	beq	.L1270
+	ldr	r3, [r5]
 	movs	r2, #1
 	add	r1, sp, #4
-	mov	r0, r6
+	mov	r0, r7
 	adds	r3, r3, #1
-	str	r3, [r4]
-	ldr	r3, [r7]
+	str	r3, [r5]
+	ldr	r3, [r6]
 	adds	r3, r3, #1
-	str	r3, [r7]
+	str	r3, [r6]
 	bl	log2phys
 	ldr	r0, [sp]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L1287:
+.L1270:
 	ldrh	r3, [r8]
-	adds	r6, r6, #1
-	subs	r5, r5, r3
-	b	.L1286
-.L1290:
+	adds	r7, r7, #1
+	subs	r4, r4, r3
+	b	.L1269
+.L1275:
 	mov	r0, #-1
-	b	.L1282
-.L1298:
+	b	.L1265
+.L1283:
 	.align	2
-.L1297:
-	.word	.LANCHOR34
-	.word	.LANCHOR167
-	.word	.LANCHOR86
-	.word	.LANCHOR12
+.L1282:
+	.word	.LANCHOR33
+	.word	.LANCHOR166
+	.word	.LANCHOR85
+	.word	.LANCHOR11
 	.size	FtlDiscard, .-FtlDiscard
 	.section	.text.allocate_new_data_superblock,"ax",%progbits
 	.align	1
@@ -9609,47 +9489,47 @@ FtlDiscard:
 allocate_new_data_superblock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1309
+	ldr	r3, .L1294
 	push	{r4, r5, r6, lr}
 	mov	r6, r0
 	ldrh	r4, [r0]
 	ldrh	r3, [r3]
 	cmp	r3, r4
-	bcs	.L1300
-	movw	r2, #2755
-	ldr	r1, .L1309+4
-	ldr	r0, .L1309+8
+	bcs	.L1285
+	movw	r2, #2759
+	ldr	r1, .L1294+4
+	ldr	r0, .L1294+8
 	bl	printf
-.L1300:
+.L1285:
 	movw	r3, #65535
 	cmp	r4, r3
-	beq	.L1301
-	ldr	r3, .L1309+12
+	beq	.L1286
+	ldr	r3, .L1294+12
 	mov	r0, r4
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
-	cbz	r3, .L1302
+	cbz	r3, .L1287
 	bl	INSERT_DATA_LIST
-.L1301:
-	ldr	r5, .L1309+16
+.L1286:
+	ldr	r5, .L1294+16
 	movw	r2, #65535
 	movs	r3, #1
 	strb	r3, [r6, #8]
 	ldrh	r0, [r5]
 	cmp	r0, r2
-	beq	.L1303
+	beq	.L1288
 	cmp	r4, r0
-	bne	.L1304
-	ldr	r3, .L1309+12
+	bne	.L1289
+	ldr	r3, .L1294+12
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L1305
-.L1304:
+	cbz	r3, .L1290
+.L1289:
 	bl	update_vpc_list
-.L1305:
+.L1290:
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.L1303:
+.L1288:
 	mov	r0, r6
 	bl	allocate_data_superblock
 	bl	l2p_flush
@@ -9658,17 +9538,17 @@ allocate_new_data_superblock:
 	bl	FtlVpcTblFlush
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L1302:
+.L1287:
 	bl	INSERT_FREE_LIST
-	b	.L1301
-.L1310:
+	b	.L1286
+.L1295:
 	.align	2
-.L1309:
-	.word	.LANCHOR5
-	.word	.LANCHOR168
+.L1294:
+	.word	.LANCHOR4
+	.word	.LANCHOR167
 	.word	.LC1
-	.word	.LANCHOR42
-	.word	.LANCHOR131
+	.word	.LANCHOR41
+	.word	.LANCHOR130
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
 	.section	.text.FtlProgPages,"ax",%progbits
 	.align	1
@@ -9683,31 +9563,31 @@ FtlProgPages:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r6, #0
-	ldr	r10, .L1330+20
+	ldr	r10, .L1315+20
 	mov	r5, r3
 	movs	r2, #0
 	mov	r4, r0
-	ldr	fp, .L1330
+	ldr	fp, .L1315
 	mov	r8, r1
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
 	bl	FlashProgPages
-.L1312:
+.L1297:
 	cmp	r6, r8
-	bne	.L1319
-	ldr	r3, .L1330
+	bne	.L1304
+	ldr	r3, .L1315
 	ldrb	r2, [r5, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1311
+	bcc	.L1296
 	mov	r2, #1000
-	ldr	r1, .L1330+4
-	ldr	r0, .L1330+8
+	ldr	r1, .L1315+4
+	ldr	r0, .L1315+8
 	bl	printf
-.L1311:
+.L1296:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1314:
+.L1299:
 	ldr	r1, [r4, #4]
 	mov	r0, r10
 	bl	printf
@@ -9716,10 +9596,10 @@ FtlProgPages:
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
 	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1313
+	cbnz	r3, .L1298
 	mov	r0, r5
 	bl	allocate_new_data_superblock
-.L1313:
+.L1298:
 	mov	r0, r5
 	bl	get_new_active_ppa
 	movs	r2, #0
@@ -9729,21 +9609,21 @@ FtlProgPages:
 	ldrb	r3, [r5, #9]	@ zero_extendqisi2
 	mov	r0, r4
 	bl	FlashProgPages
-.L1319:
+.L1304:
 	ldr	r2, [r4]
 	adds	r3, r2, #1
-	beq	.L1314
+	beq	.L1299
 	cmp	r2, #256
-	beq	.L1314
+	beq	.L1299
 	ldrb	r2, [r5, #6]	@ zero_extendqisi2
 	ldrh	r3, [fp]
 	cmp	r2, r3
-	bcc	.L1315
+	bcc	.L1300
 	movw	r2, #985
-	ldr	r1, .L1330+4
-	ldr	r0, .L1330+8
+	ldr	r1, .L1315+4
+	ldr	r0, .L1315+8
 	bl	printf
-.L1315:
+.L1300:
 	ldr	r3, [r4, #4]
 	add	r1, sp, #16
 	movs	r2, #1
@@ -9758,28 +9638,28 @@ FtlProgPages:
 	ldr	r3, [sp, #4]
 	mov	r7, r0
 	adds	r3, r3, #1
-	beq	.L1316
-	ldr	r3, .L1330+12
+	beq	.L1301
+	ldr	r3, .L1315+12
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L1317
+	cbnz	r2, .L1302
 	mov	r1, r0
-	ldr	r0, .L1330+16
+	ldr	r0, .L1315+16
 	bl	printf
-.L1317:
+.L1302:
 	mov	r0, r7
 	bl	decrement_vpc_count
-.L1316:
+.L1301:
 	adds	r6, r6, #1
 	adds	r4, r4, #20
-	b	.L1312
-.L1331:
+	b	.L1297
+.L1316:
 	.align	2
-.L1330:
-	.word	.LANCHOR3
-	.word	.LANCHOR169
+.L1315:
+	.word	.LANCHOR2
+	.word	.LANCHOR168
 	.word	.LC1
-	.word	.LANCHOR42
+	.word	.LANCHOR41
 	.word	.LC41
 	.word	.LC40
 	.size	FtlProgPages, .-FtlProgPages
@@ -9796,66 +9676,66 @@ FtlGcFreeTempBlock:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movw	r3, #65535
-	ldr	r4, .L1347
+	ldr	r4, .L1332
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	beq	.L1333
-	ldr	r3, .L1347+4
+	beq	.L1318
+	ldr	r3, .L1332+4
 	mov	r0, r4
 	ldrh	r1, [r3]
 	bl	FtlGcScanTempBlk
 	str	r0, [sp, #12]
-.L1333:
-	ldr	r3, .L1347+8
+.L1318:
+	ldr	r3, .L1332+8
 	movs	r2, #0
 	str	r2, [r3]
 	movw	r3, #65535
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	beq	.L1335
-	ldr	r6, .L1347+4
+	beq	.L1320
+	ldr	r6, .L1332+4
 	ldrb	r0, [r4, #7]	@ zero_extendqisi2
-	ldr	r5, .L1347+12
+	ldr	r5, .L1332+12
 	ldrh	r2, [r6]
 	ldrh	r1, [r5]
 	muls	r2, r0, r2
 	cmp	r1, r2
-	beq	.L1336
+	beq	.L1321
 	movs	r2, #164
-	ldr	r1, .L1347+16
-	ldr	r0, .L1347+20
+	ldr	r1, .L1332+16
+	ldr	r0, .L1332+20
 	bl	printf
-.L1336:
+.L1321:
 	ldrh	r6, [r6]
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	ldr	r2, .L1347+24
+	ldr	r2, .L1332+24
 	ldrh	r0, [r4]
-	ldr	fp, .L1347+56
+	ldr	fp, .L1332+56
 	smulbb	r3, r3, r6
 	ldr	r1, [r2]
 	movs	r6, #0
 	mov	r10, r2
 	strh	r3, [r1, r0, lsl #1]	@ movhi
-	ldr	r1, .L1347+28
+	ldr	r1, .L1332+28
 	ldrh	r3, [r5]
 	ldr	r0, [r1]
 	add	r3, r3, r0
 	str	r3, [r1]
-.L1337:
+.L1322:
 	ldrh	r2, [r5]
 	uxth	r3, r6
 	cmp	r2, r3
-	bhi	.L1341
+	bhi	.L1326
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	ldrh	r0, [r4]
 	ldr	r3, [r10]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	beq	.L1342
+	beq	.L1327
 	bl	INSERT_DATA_LIST
-.L1343:
-	ldr	r2, .L1347+32
+.L1328:
+	ldr	r2, .L1332+32
 	movs	r3, #0
 	movw	r6, #65535
 	strh	r3, [r5]	@ movhi
@@ -9863,38 +9743,38 @@ FtlGcFreeTempBlock:
 	strh	r3, [r2]	@ movhi
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	ldr	r3, .L1347+36
+	ldr	r3, .L1332+36
 	strh	r6, [r3]	@ movhi
-	ldr	r3, .L1347+40
+	ldr	r3, .L1332+40
 	ldrh	r2, [r3]
-	ldr	r3, .L1347+44
+	ldr	r3, .L1332+44
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, asr #2
 	ittt	gt
-	ldrgt	r3, .L1347+48
+	ldrgt	r3, .L1332+48
 	movgt	r2, #20
 	strhgt	r2, [r3]	@ movhi
-.L1335:
+.L1320:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1341:
+.L1326:
 	uxth	r3, r6
 	mov	r8, #12
 	ldr	r2, [fp]
 	mul	r8, r8, r3
-	ldr	r3, .L1347+52
+	ldr	r3, .L1332+52
 	ldr	r3, [r3]
 	add	r7, r3, r8
 	ldr	r0, [r7, #8]
 	cmp	r0, r2
-	bcc	.L1338
-.L1345:
+	bcc	.L1323
+.L1330:
 	ldrh	r0, [r4]
-	b	.L1346
-.L1338:
+	b	.L1331
+.L1323:
 	movs	r2, #0
 	add	r1, sp, #12
 	str	r3, [sp, #4]
@@ -9903,7 +9783,7 @@ FtlGcFreeTempBlock:
 	ldr	r2, [sp, #12]
 	ldr	r0, [r3, r8]
 	cmp	r0, r2
-	bne	.L1340
+	bne	.L1325
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	movs	r2, #1
@@ -9912,37 +9792,37 @@ FtlGcFreeTempBlock:
 	ldr	r0, [r7, #8]
 	bl	log2phys
 	mov	r0, r8
-.L1346:
+.L1331:
 	bl	decrement_vpc_count
-	b	.L1339
-.L1340:
+	b	.L1324
+.L1325:
 	ldr	r3, [r7, #4]
 	cmp	r2, r3
-	bne	.L1345
-.L1339:
+	bne	.L1330
+.L1324:
 	adds	r6, r6, #1
-	b	.L1337
-.L1342:
+	b	.L1322
+.L1327:
 	bl	INSERT_FREE_LIST
-	b	.L1343
-.L1348:
+	b	.L1328
+.L1333:
 	.align	2
-.L1347:
-	.word	.LANCHOR53
-	.word	.LANCHOR19
-	.word	.LANCHOR133
-	.word	.LANCHOR70
-	.word	.LANCHOR170
-	.word	.LC1
-	.word	.LANCHOR42
-	.word	.LANCHOR84
+.L1332:
+	.word	.LANCHOR52
+	.word	.LANCHOR18
+	.word	.LANCHOR132
 	.word	.LANCHOR69
-	.word	.LANCHOR145
-	.word	.LANCHOR48
-	.word	.LANCHOR171
-	.word	.LANCHOR100
-	.word	.LANCHOR71
-	.word	.LANCHOR152
+	.word	.LANCHOR169
+	.word	.LC1
+	.word	.LANCHOR41
+	.word	.LANCHOR83
+	.word	.LANCHOR68
+	.word	.LANCHOR144
+	.word	.LANCHOR47
+	.word	.LANCHOR170
+	.word	.LANCHOR99
+	.word	.LANCHOR70
+	.word	.LANCHOR151
 	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
 	.section	.text.FtlGcPageRecovery,"ax",%progbits
 	.align	1
@@ -9956,31 +9836,31 @@ FtlGcPageRecovery:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	ldr	r4, .L1351
-	ldr	r5, .L1351+4
+	ldr	r4, .L1336
+	ldr	r5, .L1336+4
 	ldrh	r1, [r4]
 	mov	r0, r5
 	bl	FtlGcScanTempBlk
 	ldrh	r2, [r5, #2]
 	ldrh	r3, [r4]
 	cmp	r2, r3
-	bcc	.L1349
-	ldr	r0, .L1351+8
+	bcc	.L1334
+	ldr	r0, .L1336+8
 	bl	FtlMapBlkWriteDump_data
 	movs	r0, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r3, .L1351+12
+	ldr	r3, .L1336+12
 	movs	r2, #0
 	str	r2, [r3]
-.L1349:
+.L1334:
 	pop	{r3, r4, r5, pc}
-.L1352:
+.L1337:
 	.align	2
-.L1351:
-	.word	.LANCHOR19
-	.word	.LANCHOR53
-	.word	.LANCHOR129
-	.word	.LANCHOR133
+.L1336:
+	.word	.LANCHOR18
+	.word	.LANCHOR52
+	.word	.LANCHOR128
+	.word	.LANCHOR132
 	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
 	.section	.text.FtlPowerLostRecovery,"ax",%progbits
 	.align	1
@@ -9995,13 +9875,13 @@ FtlPowerLostRecovery:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #0
-	ldr	r5, .L1354
-	ldr	r3, .L1354+4
+	ldr	r5, .L1339
+	ldr	r3, .L1339+4
 	mov	r0, r5
 	str	r4, [r3]
 	bl	FtlRecoverySuperblock
 	mov	r0, r5
-	ldr	r5, .L1354+8
+	ldr	r5, .L1339+8
 	bl	FtlSlcSuperblockCheck
 	mov	r0, r5
 	bl	FtlRecoverySuperblock
@@ -10012,12 +9892,12 @@ FtlPowerLostRecovery:
 	bl	decrement_vpc_count
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L1355:
+.L1340:
 	.align	2
-.L1354:
+.L1339:
+	.word	.LANCHOR50
+	.word	.LANCHOR156
 	.word	.LANCHOR51
-	.word	.LANCHOR157
-	.word	.LANCHOR52
 	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
 	.section	.text.Ftl_gc_temp_data_write_back,"ax",%progbits
 	.align	1
@@ -10032,32 +9912,32 @@ Ftl_gc_temp_data_write_back:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r3, #0
-	ldr	r4, .L1364
+	ldr	r4, .L1349
 	movs	r6, #0
 	movs	r7, #20
 	mov	r2, r3
-	ldr	r5, .L1364+4
+	ldr	r5, .L1349+4
 	ldr	r1, [r4]
 	ldr	r0, [r5]
 	bl	FlashProgPages
-.L1357:
+.L1342:
 	ldr	r1, [r4]
 	uxth	r3, r6
 	cmp	r1, r3
-	bhi	.L1360
+	bhi	.L1345
 	ldr	r0, [r5]
 	bl	FtlGcBufFree
-	ldr	r3, .L1364+8
+	ldr	r3, .L1349+8
 	movs	r0, #0
 	str	r0, [r4]
 	ldrh	r3, [r3, #4]
-	cbnz	r3, .L1356
+	cbnz	r3, .L1341
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
 	movs	r0, #1
-.L1356:
+.L1341:
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1360:
+.L1345:
 	muls	r3, r7, r3
 	ldr	r2, [r5]
 	adds	r6, r6, #1
@@ -10070,13 +9950,13 @@ Ftl_gc_temp_data_write_back:
 	ldrne	r2, [r0, #8]
 	ldr	r0, [r0, #12]
 	bl	FtlGcUpdatePage
-	b	.L1357
-.L1365:
+	b	.L1342
+.L1350:
 	.align	2
-.L1364:
-	.word	.LANCHOR62
-	.word	.LANCHOR104
-	.word	.LANCHOR53
+.L1349:
+	.word	.LANCHOR61
+	.word	.LANCHOR103
+	.word	.LANCHOR52
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
 	.section	.text.Ftl_get_new_temp_ppa,"ax",%progbits
 	.align	1
@@ -10091,37 +9971,37 @@ Ftl_get_new_temp_ppa:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movw	r3, #65535
-	ldr	r4, .L1369
+	ldr	r4, .L1354
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	beq	.L1367
+	beq	.L1352
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1368
-.L1367:
+	cbnz	r3, .L1353
+.L1352:
 	movs	r0, #0
 	movs	r5, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r0, .L1369
+	ldr	r0, .L1354
 	strb	r5, [r4, #8]
 	bl	allocate_data_superblock
-	ldr	r3, .L1369+4
+	ldr	r3, .L1354+4
 	strh	r5, [r3]	@ movhi
-	ldr	r3, .L1369+8
+	ldr	r3, .L1354+8
 	strh	r5, [r3]	@ movhi
 	bl	l2p_flush
 	mov	r0, r5
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1368:
-	ldr	r0, .L1369
+.L1353:
+	ldr	r0, .L1354
 	pop	{r3, r4, r5, lr}
 	b	get_new_active_ppa
-.L1370:
+.L1355:
 	.align	2
-.L1369:
-	.word	.LANCHOR53
+.L1354:
+	.word	.LANCHOR52
+	.word	.LANCHOR68
 	.word	.LANCHOR69
-	.word	.LANCHOR70
 	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
 	.section	.text.rk_ftl_garbage_collect,"ax",%progbits
 	.align	1
@@ -10134,188 +10014,188 @@ Ftl_get_new_temp_ppa:
 rk_ftl_garbage_collect:
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1461
+	ldr	r3, .L1446
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #48
 	str	r0, [sp, #28]
 	ldr	r0, [r3]
 	cmp	r0, #0
-	bne	.L1428
-	ldr	r3, .L1461+4
+	bne	.L1413
+	ldr	r3, .L1446+4
 	ldrh	r3, [r3]
 	cmp	r3, #47
-	bls	.L1371
-	ldr	r3, .L1461+8
+	bls	.L1356
+	ldr	r3, .L1446+8
 	movw	r4, #65535
 	ldrh	r0, [r3]
 	cmp	r0, r4
-	beq	.L1373
-	ldr	r1, .L1461+12
+	beq	.L1358
+	ldr	r1, .L1446+12
 	ldrh	r2, [r1]
 	cmp	r2, r4
 	itt	eq
 	strheq	r0, [r1]	@ movhi
 	strheq	r2, [r3]	@ movhi
-.L1373:
+.L1358:
 	ldr	r3, [sp, #28]
 	cmp	r3, #0
-	bne	.L1430
-	ldr	r3, .L1461+16
+	bne	.L1415
+	ldr	r3, .L1446+16
 	ldrh	r3, [r3]
 	cmp	r3, #24
-	bhi	.L1431
-	ldr	r2, .L1461+20
+	bhi	.L1416
+	ldr	r2, .L1446+20
 	cmp	r3, #16
 	ldrh	r4, [r2]
-	bls	.L1376
+	bls	.L1361
 	lsrs	r4, r4, #5
-.L1375:
-	ldr	r2, .L1461+24
+.L1360:
+	ldr	r2, .L1446+24
 	ldrh	r1, [r2]
 	cmp	r1, r3
 	mov	r1, r2
-	bcs	.L1379
-	ldr	r3, .L1461+28
+	bcs	.L1364
+	ldr	r3, .L1446+28
 	movw	r0, #65535
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L1380
-	ldr	r0, .L1461+12
+	bne	.L1365
+	ldr	r0, .L1446+12
 	ldrh	r0, [r0]
 	cmp	r0, r3
-	bne	.L1380
-	ldr	r3, .L1461+32
+	bne	.L1365
+	ldr	r3, .L1446+32
 	ldrh	r0, [r3]
-	cbnz	r0, .L1381
-	ldr	r3, .L1461+36
-	ldr	r4, .L1461+40
+	cbnz	r0, .L1366
+	ldr	r3, .L1446+36
+	ldr	r4, .L1446+40
 	ldr	r3, [r3]
 	ldr	r4, [r4]
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, lsr #2
-	bcs	.L1382
-.L1381:
-	ldr	r3, .L1461+44
+	bcs	.L1367
+.L1366:
+	ldr	r3, .L1446+44
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r1]	@ movhi
-.L1383:
-	ldr	r3, .L1461+48
+.L1368:
+	ldr	r3, .L1446+48
 	movs	r2, #0
 	str	r2, [r3]
-.L1371:
+.L1356:
 	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1376:
+.L1361:
 	cmp	r3, #12
-	bls	.L1377
+	bls	.L1362
 	lsrs	r4, r4, #4
-	b	.L1375
-.L1377:
+	b	.L1360
+.L1362:
 	cmp	r3, #8
-	bls	.L1375
+	bls	.L1360
 	lsrs	r4, r4, #2
-	b	.L1375
-.L1431:
+	b	.L1360
+.L1416:
 	movs	r4, #1
-	b	.L1375
-.L1382:
+	b	.L1360
+.L1367:
 	movs	r3, #18
 	strh	r3, [r2]	@ movhi
-	b	.L1383
-.L1380:
-	ldr	r3, .L1461+44
+	b	.L1368
+.L1365:
+	ldr	r3, .L1446+44
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r1]	@ movhi
-.L1379:
-	ldr	r3, .L1461+52
+.L1364:
+	ldr	r3, .L1446+52
 	ldrh	r3, [r3]
-	cbz	r3, .L1374
+	cbz	r3, .L1359
 	adds	r4, r4, #32
 	uxth	r4, r4
-.L1374:
-	ldr	r5, .L1461+56
+.L1359:
+	ldr	r5, .L1446+56
 	movw	r3, #65535
 	ldrh	r2, [r5]
 	cmp	r2, r3
-	bne	.L1386
-	ldr	r3, .L1461+12
+	bne	.L1371
+	ldr	r3, .L1446+12
 	ldrh	r1, [r3]
 	cmp	r1, r2
-	beq	.L1387
-	ldr	r0, .L1461+60
+	beq	.L1372
+	ldr	r0, .L1446+60
 	ldr	r0, [r0]
 	ldrh	r1, [r0, r1, lsl #1]
-	cbnz	r1, .L1388
+	cbnz	r1, .L1373
 	strh	r2, [r3]	@ movhi
-.L1388:
+.L1373:
 	ldrh	r2, [r3]
 	strh	r2, [r5]	@ movhi
 	movw	r2, #65535
 	strh	r2, [r3]	@ movhi
-.L1387:
+.L1372:
 	ldrh	r0, [r5]
 	movw	r6, #65535
 	movs	r3, #0
 	strb	r3, [r5, #8]
 	cmp	r0, r6
-	beq	.L1386
+	beq	.L1371
 	bl	IsBlkInGcList
-	cbz	r0, .L1390
+	cbz	r0, .L1375
 	strh	r6, [r5]	@ movhi
-.L1390:
+.L1375:
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1386
-	ldr	r0, .L1461+56
+	beq	.L1371
+	ldr	r0, .L1446+56
 	bl	make_superblock
-	ldr	r2, .L1461+64
+	ldr	r2, .L1446+64
 	movs	r3, #0
 	strh	r3, [r5, #2]	@ movhi
 	strb	r3, [r5, #6]
 	strh	r3, [r2]	@ movhi
-	ldr	r3, .L1461+60
+	ldr	r3, .L1446+60
 	ldrh	r2, [r5]
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r2, lsl #1]
-	ldr	r3, .L1461+68
+	ldr	r3, .L1446+68
 	strh	r2, [r3]	@ movhi
-.L1386:
-	ldr	r2, .L1461+72
+.L1371:
+	ldr	r2, .L1446+72
 	ldrh	r3, [r5]
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L1391
-	ldr	r2, .L1461+76
+	beq	.L1376
+	ldr	r2, .L1446+76
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L1391
-	ldr	r2, .L1461+28
+	beq	.L1376
+	ldr	r2, .L1446+28
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bne	.L1392
-.L1391:
+	bne	.L1377
+.L1376:
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.L1392:
-	ldr	r5, .L1461+56
+.L1377:
+	ldr	r5, .L1446+56
 	mov	r6, r5
-.L1427:
+.L1412:
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1393
-	ldr	fp, .L1461+88
+	bne	.L1378
+	ldr	fp, .L1446+88
 	movs	r2, #0
-	ldr	r3, .L1461+48
+	ldr	r3, .L1446+48
 	mov	r8, fp
 	str	r2, [r3]
-.L1394:
+.L1379:
 	ldrh	r7, [fp]
 	mov	r0, r7
 	bl	List_get_gc_head_node
@@ -10323,15 +10203,15 @@ rk_ftl_garbage_collect:
 	movw	r1, #65535
 	cmp	r3, r1
 	strh	r3, [r6]	@ movhi
-	bne	.L1395
+	bne	.L1380
 	movs	r3, #0
 	movs	r0, #8
 	strh	r3, [fp]	@ movhi
-	b	.L1371
-.L1430:
+	b	.L1356
+.L1415:
 	movs	r4, #1
-	b	.L1374
-.L1395:
+	b	.L1359
+.L1380:
 	str	r0, [sp, #16]
 	mov	r0, r3
 	str	r3, [sp, #12]
@@ -10339,142 +10219,142 @@ rk_ftl_garbage_collect:
 	bl	IsBlkInGcList
 	ldr	r3, [sp, #12]
 	ldr	r2, [sp, #16]
-	cbz	r0, .L1396
+	cbz	r0, .L1381
 	strh	r7, [fp]	@ movhi
-	b	.L1394
-.L1396:
+	b	.L1379
+.L1381:
 	uxth	r0, r2
-	ldr	r2, .L1461+20
-	ldr	r10, .L1461+60
+	ldr	r2, .L1446+20
+	ldr	r10, .L1446+60
 	uxth	r7, r7
 	ldrh	lr, [r2]
-	ldr	r2, .L1461+80
+	ldr	r2, .L1446+80
 	ldr	r1, [r10]
 	strh	r7, [fp]	@ movhi
 	ldrh	r2, [r2]
 	ldrh	ip, [r1, r0, lsl #1]
 	mul	r2, r2, lr
 	cmp	ip, r2, asr #1
-	bgt	.L1398
+	bgt	.L1383
 	cmp	r7, #48
-	bls	.L1399
+	bls	.L1384
 	cmp	ip, #8
-	bls	.L1399
-	ldr	r7, .L1461+84
+	bls	.L1384
+	ldr	r7, .L1446+84
 	ldrh	r7, [r7]
 	cmp	r7, #35
-	bhi	.L1399
-.L1398:
+	bhi	.L1384
+.L1383:
 	movs	r7, #0
 	strh	r7, [r8]	@ movhi
-.L1399:
+.L1384:
 	ldrh	r1, [r1, r0, lsl #1]
 	cmp	r2, r1
-	bgt	.L1400
+	bgt	.L1385
 	ldrh	r2, [r8]
 	cmp	r2, #3
-	bhi	.L1400
+	bhi	.L1385
 	movw	r3, #65535
 	strh	r3, [r6]	@ movhi
 	movs	r3, #0
 	strh	r3, [r8]	@ movhi
-.L1460:
-	ldr	r3, .L1461+32
+.L1445:
+	ldr	r3, .L1446+32
 	ldrh	r0, [r3]
-	b	.L1371
-.L1400:
-	cbnz	r1, .L1401
+	b	.L1356
+.L1385:
+	cbnz	r1, .L1386
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	ldrh	r3, [r8]
 	adds	r3, r3, #1
 	strh	r3, [r8]	@ movhi
-	b	.L1394
-.L1462:
+	b	.L1379
+.L1447:
 	.align	2
-.L1461:
+.L1446:
+	.word	.LANCHOR93
+	.word	.LANCHOR43
+	.word	.LANCHOR72
+	.word	.LANCHOR71
+	.word	.LANCHOR47
+	.word	.LANCHOR18
+	.word	.LANCHOR99
+	.word	.LANCHOR52
+	.word	.LANCHOR171
+	.word	.LANCHOR151
+	.word	.LANCHOR58
+	.word	.LANCHOR170
 	.word	.LANCHOR94
-	.word	.LANCHOR44
 	.word	.LANCHOR73
-	.word	.LANCHOR72
-	.word	.LANCHOR48
-	.word	.LANCHOR19
-	.word	.LANCHOR100
-	.word	.LANCHOR53
+	.word	.LANCHOR144
+	.word	.LANCHOR41
 	.word	.LANCHOR172
-	.word	.LANCHOR152
-	.word	.LANCHOR59
-	.word	.LANCHOR171
-	.word	.LANCHOR95
-	.word	.LANCHOR74
-	.word	.LANCHOR145
-	.word	.LANCHOR42
 	.word	.LANCHOR173
-	.word	.LANCHOR174
+	.word	.LANCHOR50
 	.word	.LANCHOR51
-	.word	.LANCHOR52
-	.word	.LANCHOR3
-	.word	.LANCHOR69
-	.word	.LANCHOR102
-.L1401:
+	.word	.LANCHOR2
+	.word	.LANCHOR68
+	.word	.LANCHOR101
+.L1386:
 	movs	r2, #0
 	strb	r2, [r6, #8]
-	ldr	r2, .L1463
+	ldr	r2, .L1448
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bne	.L1402
+	bne	.L1387
 	movw	r2, #717
-	ldr	r1, .L1463+4
-	ldr	r0, .L1463+8
+	ldr	r1, .L1448+4
+	ldr	r0, .L1448+8
 	bl	printf
-.L1402:
-	ldr	r3, .L1463+12
+.L1387:
+	ldr	r3, .L1448+12
 	ldrh	r2, [r6]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1403
+	bne	.L1388
 	movw	r2, #718
-	ldr	r1, .L1463+4
-	ldr	r0, .L1463+8
+	ldr	r1, .L1448+4
+	ldr	r0, .L1448+8
 	bl	printf
-.L1403:
-	ldr	r3, .L1463+16
+.L1388:
+	ldr	r3, .L1448+16
 	ldrh	r2, [r6]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1404
+	bne	.L1389
 	movw	r2, #719
-	ldr	r1, .L1463+4
-	ldr	r0, .L1463+8
+	ldr	r1, .L1448+4
+	ldr	r0, .L1448+8
 	bl	printf
-.L1404:
+.L1389:
 	mov	r0, r5
 	bl	make_superblock
-	ldr	r2, .L1463+20
+	ldr	r2, .L1448+20
 	movs	r3, #0
 	ldrh	r1, [r6]
 	strh	r3, [r2]	@ movhi
 	ldr	r2, [r10]
 	ldrh	r1, [r2, r1, lsl #1]
-	ldr	r2, .L1463+24
+	ldr	r2, .L1448+24
 	strh	r3, [r6, #2]	@ movhi
 	strb	r3, [r6, #6]
 	strh	r1, [r2]	@ movhi
-.L1393:
-	ldr	r3, .L1463+28
+.L1378:
+	ldr	r3, .L1448+28
 	movs	r2, #1
 	str	r2, [r3]
-	ldr	r3, .L1463+32
+	ldr	r3, .L1448+32
 	ldrh	r3, [r3]
 	str	r3, [sp, #16]
 	ldr	r3, [sp, #28]
-	cbz	r3, .L1405
-	ldr	r3, .L1463+36
+	cbz	r3, .L1390
+	ldr	r3, .L1448+36
 	ldr	r2, [sp, #16]
 	ldrh	r1, [r6]
 	ldrh	r3, [r3]
 	muls	r3, r2, r3
-	ldr	r2, .L1463+40
+	ldr	r2, .L1448+40
 	ldr	r2, [r2]
 	ldrh	r2, [r2, r1, lsl #1]
 	subs	r3, r3, r2
@@ -10482,10 +10362,10 @@ rk_ftl_garbage_collect:
 	addmi	r3, r3, #3
 	add	r4, r4, r3, asr #2
 	uxth	r4, r4
-.L1405:
+.L1390:
 	ldrh	r3, [r6, #2]
 	ldr	r1, [sp, #16]
-	ldr	fp, .L1463+64
+	ldr	fp, .L1448+64
 	adds	r2, r3, r4
 	cmp	r2, r1
 	itt	gt
@@ -10495,27 +10375,27 @@ rk_ftl_garbage_collect:
 	it	gt
 	uxthgt	r4, r4
 	str	r3, [sp, #24]
-.L1408:
+.L1393:
 	ldrh	r3, [sp, #24]
 	cmp	r4, r3
-	bls	.L1416
-	ldr	r3, .L1463+36
+	bls	.L1401
+	ldr	r3, .L1448+36
 	movw	r10, #65535
 	ldrh	r1, [r5, #2]
 	mov	ip, #20
 	ldr	r0, [fp]
 	ldrh	lr, [r3]
 	ldr	r3, [sp, #24]
-	ldr	r7, .L1463+44
+	ldr	r7, .L1448+44
 	adds	r3, r1, r3
 	str	r3, [sp, #20]
 	movs	r3, #0
 	str	r3, [sp, #12]
-	b	.L1417
-.L1410:
+	b	.L1402
+.L1395:
 	ldrh	r2, [r7, #2]!
 	cmp	r2, r10
-	beq	.L1409
+	beq	.L1394
 	ldr	r1, [sp, #12]
 	mla	r8, ip, r1, r0
 	ldr	r1, [sp, #20]
@@ -10525,27 +10405,27 @@ rk_ftl_garbage_collect:
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r2, [sp, #12]
-.L1409:
+.L1394:
 	adds	r3, r3, #1
-.L1417:
+.L1402:
 	uxth	r2, r3
 	cmp	lr, r2
-	bhi	.L1410
+	bhi	.L1395
 	ldrb	r2, [r5, #8]	@ zero_extendqisi2
 	ldr	r1, [sp, #12]
 	bl	FlashReadPages
 	movs	r3, #0
-.L1459:
+.L1444:
 	str	r3, [sp, #20]
 	ldr	r2, [sp, #12]
 	ldrh	r3, [sp, #20]
 	cmp	r2, r3
-	bhi	.L1415
+	bhi	.L1400
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
 	str	r3, [sp, #24]
-	b	.L1408
-.L1415:
+	b	.L1393
+.L1400:
 	ldr	r3, [sp, #20]
 	movs	r7, #20
 	muls	r7, r3, r7
@@ -10553,20 +10433,20 @@ rk_ftl_garbage_collect:
 	adds	r2, r3, r7
 	ldr	r3, [r3, r7]
 	adds	r3, r3, #1
-	beq	.L1412
+	beq	.L1397
 	ldr	r8, [r2, #12]
 	movw	r3, #61589
 	ldrh	r2, [r8]
 	cmp	r2, r3
-	bne	.L1412
+	bne	.L1397
 	ldr	r10, [r8, #8]
 	cmp	r10, #-1
-	bne	.L1413
+	bne	.L1398
 	movw	r2, #753
-	ldr	r1, .L1463+4
-	ldr	r0, .L1463+8
+	ldr	r1, .L1448+4
+	ldr	r0, .L1448+8
 	bl	printf
-.L1413:
+.L1398:
 	movs	r2, #0
 	add	r1, sp, #40
 	mov	r0, r10
@@ -10576,10 +10456,10 @@ rk_ftl_garbage_collect:
 	add	r0, r0, r7
 	ldr	r2, [r0, #4]
 	cmp	r2, r3
-	bne	.L1412
-	ldr	r2, .L1463+20
-	ldr	r10, .L1463+60
-	ldr	r1, .L1463+48
+	bne	.L1397
+	ldr	r2, .L1448+20
+	ldr	r10, .L1448+60
+	ldr	r1, .L1448+48
 	ldrh	r3, [r2]
 	str	r1, [sp, #36]
 	adds	r3, r3, #1
@@ -10601,7 +10481,7 @@ rk_ftl_garbage_collect:
 	ldr	r0, [fp]
 	mla	r2, r1, r3, r2
 	add	r0, r0, r7
-	ldr	r7, .L1463+16
+	ldr	r7, .L1448+16
 	ldr	r1, [r0, #8]
 	adds	r3, r3, #1
 	str	r1, [r2, #8]
@@ -10612,7 +10492,7 @@ rk_ftl_garbage_collect:
 	str	r2, [r8, #12]
 	ldrh	r2, [r7]
 	strh	r2, [r8, #2]	@ movhi
-	ldr	r2, .L1463+52
+	ldr	r2, .L1448+52
 	str	r3, [r10]
 	ldr	r2, [r2]
 	str	r2, [r8, #4]
@@ -10620,105 +10500,105 @@ rk_ftl_garbage_collect:
 	ldrb	r2, [r7, #7]	@ zero_extendqisi2
 	ldr	r3, [r10]
 	cmp	r2, r3
-	beq	.L1414
+	beq	.L1399
 	ldrh	r3, [r7, #4]
-	cbnz	r3, .L1412
-.L1414:
+	cbnz	r3, .L1397
+.L1399:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	r0, .L1412
-	ldr	r3, .L1463+28
+	cbz	r0, .L1397
+	ldr	r3, .L1448+28
 	movs	r2, #0
 	movw	r1, #65535
 	str	r2, [r3]
-	ldr	r3, .L1463+56
+	ldr	r3, .L1448+56
 	strh	r1, [r3]	@ movhi
 	strh	r2, [r3, #2]	@ movhi
-	b	.L1460
-.L1412:
+	b	.L1445
+.L1397:
 	ldr	r3, [sp, #20]
 	adds	r3, r3, #1
-	b	.L1459
-.L1416:
+	b	.L1444
+.L1401:
 	ldrh	r3, [r5, #2]
 	add	r4, r4, r3
 	ldr	r3, [sp, #16]
 	uxth	r4, r4
 	cmp	r3, r4
 	strh	r4, [r5, #2]	@ movhi
-	bhi	.L1418
-	ldr	r3, .L1463+60
+	bhi	.L1403
+	ldr	r3, .L1448+60
 	ldr	r3, [r3]
-	cbz	r3, .L1419
+	cbz	r3, .L1404
 	bl	Ftl_gc_temp_data_write_back
-	cbz	r0, .L1419
-	ldr	r3, .L1463+28
+	cbz	r0, .L1404
+	ldr	r3, .L1448+28
 	movs	r2, #0
 	str	r2, [r3]
-	b	.L1460
-.L1464:
+	b	.L1445
+.L1449:
 	.align	2
-.L1463:
-	.word	.LANCHOR51
-	.word	.LANCHOR175
+.L1448:
+	.word	.LANCHOR50
+	.word	.LANCHOR174
 	.word	.LC1
+	.word	.LANCHOR51
 	.word	.LANCHOR52
-	.word	.LANCHOR53
+	.word	.LANCHOR172
 	.word	.LANCHOR173
-	.word	.LANCHOR174
-	.word	.LANCHOR94
-	.word	.LANCHOR19
-	.word	.LANCHOR3
-	.word	.LANCHOR42
-	.word	.LANCHOR145+14
-	.word	.LANCHOR104
-	.word	.LANCHOR83
-	.word	.LANCHOR145
-	.word	.LANCHOR62
-	.word	.LANCHOR66
-.L1419:
-	ldr	r3, .L1465
+	.word	.LANCHOR93
+	.word	.LANCHOR18
+	.word	.LANCHOR2
+	.word	.LANCHOR41
+	.word	.LANCHOR144+14
+	.word	.LANCHOR103
+	.word	.LANCHOR82
+	.word	.LANCHOR144
+	.word	.LANCHOR61
+	.word	.LANCHOR65
+.L1404:
+	ldr	r3, .L1450
 	ldrh	r4, [r3]
 	cmp	r4, #0
-	bne	.L1420
-	ldr	r8, .L1465+28
+	bne	.L1405
+	ldr	r8, .L1450+28
 	ldrh	r1, [r5]
 	ldr	r3, [r8]
 	ldrh	r3, [r3, r1, lsl #1]
 	cmp	r3, #0
-	beq	.L1420
-	ldr	r0, .L1465+4
-	ldr	r10, .L1465+32
+	beq	.L1405
+	ldr	r0, .L1450+4
+	ldr	r10, .L1450+32
 	ldrh	r2, [r5, #2]
 	ldrh	r0, [r0]
 	str	r3, [sp]
 	mov	r3, r4
 	str	r0, [sp, #4]
-	ldr	r0, .L1465+8
+	ldr	r0, .L1450+8
 	bl	printf
-.L1421:
+.L1406:
 	ldr	r3, [r10]
 	cmp	r4, r3
-	bcs	.L1423
+	bcs	.L1408
 	movs	r2, #0
 	add	r1, sp, #44
 	mov	r0, r4
 	bl	log2phys
 	ldr	r7, [sp, #44]
 	adds	r3, r7, #1
-	beq	.L1422
+	beq	.L1407
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r5]
 	cmp	r3, r0
-	bne	.L1422
+	bne	.L1407
 	mov	r2, r7
 	mov	r1, r4
-	ldr	r0, .L1465+12
+	ldr	r0, .L1450+12
 	bl	printf
-.L1423:
+.L1408:
 	ldr	r3, [r10]
 	cmp	r4, r3
-	bcc	.L1420
+	bcc	.L1405
 	ldrh	r2, [r5]
 	movs	r1, #0
 	ldr	r3, [r8]
@@ -10727,44 +10607,44 @@ rk_ftl_garbage_collect:
 	bl	update_vpc_list
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1420:
+.L1405:
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.L1418:
-	ldr	r3, .L1465+16
+.L1403:
+	ldr	r3, .L1450+16
 	movs	r2, #0
 	str	r2, [r3]
-	ldr	r3, .L1465+20
+	ldr	r3, .L1450+20
 	ldrh	r0, [r3]
 	cmp	r0, #2
-	bhi	.L1426
-	ldr	r3, .L1465+24
+	bhi	.L1411
+	ldr	r3, .L1450+24
 	ldrh	r4, [r3]
-	b	.L1427
-.L1422:
+	b	.L1412
+.L1407:
 	adds	r4, r4, #1
-	b	.L1421
-.L1426:
+	b	.L1406
+.L1411:
 	adds	r0, r0, #1
-	b	.L1371
-.L1428:
+	b	.L1356
+.L1413:
 	movs	r0, #0
-	b	.L1371
-.L1466:
+	b	.L1356
+.L1451:
 	.align	2
-.L1465:
+.L1450:
+	.word	.LANCHOR172
 	.word	.LANCHOR173
-	.word	.LANCHOR174
 	.word	.LC42
 	.word	.LC43
-	.word	.LANCHOR94
-	.word	.LANCHOR48
-	.word	.LANCHOR19
-	.word	.LANCHOR42
-	.word	.LANCHOR152
-	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
-	.section	.text.FtlRead,"ax",%progbits
-	.align	1
+	.word	.LANCHOR93
+	.word	.LANCHOR47
+	.word	.LANCHOR18
+	.word	.LANCHOR41
+	.word	.LANCHOR151
+	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
+	.section	.text.FtlRead,"ax",%progbits
+	.align	1
 	.global	FtlRead
 	.syntax unified
 	.thumb
@@ -10777,291 +10657,300 @@ FtlRead:
 	cmp	r0, #16
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #56
-	mov	r6, r1
-	mov	r8, r3
-	str	r2, [sp, #24]
-	bne	.L1468
+	mov	r5, r1
+	mov	r10, r3
+	str	r2, [sp, #4]
+	bne	.L1453
 	mov	r2, r3
-	ldr	r1, [sp, #24]
-	add	r0, r6, #256
+	ldr	r1, [sp, #4]
+	add	r0, r5, #256
 	bl	FtlVendorPartRead
-	str	r0, [sp, #4]
-.L1467:
-	ldr	r0, [sp, #4]
+	mov	r4, r0
+.L1452:
+	mov	r0, r4
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1468:
-	ldr	r3, [sp, #24]
-	adds	r3, r1, r3
-	str	r3, [sp, #12]
-	ldr	r3, .L1500
-	ldr	r2, [sp, #12]
+.L1453:
+	ldr	r3, .L1487
 	ldr	r3, [r3]
+	cmp	r1, r3
+	bcs	.L1476
+	ldr	r2, [sp, #4]
 	cmp	r2, r3
-	bhi	.L1489
-	ldr	r3, .L1500+4
-	ldr	r3, [r3]
-	adds	r4, r3, #1
-	beq	.L1490
-	ldr	r3, .L1500+8
-	mov	r0, r6
-	movs	r7, #0
-	mov	r5, r7
+	bhi	.L1476
+	adds	r2, r1, r2
+	cmp	r3, r2
+	str	r2, [sp, #12]
+	bcc	.L1476
+	ldr	r3, .L1487+4
+	ldr	r4, [r3]
+	adds	r6, r4, #1
+	beq	.L1452
+	ldr	r3, .L1487+8
+	mov	r0, r5
+	mov	r8, #0
+	mov	r7, r8
 	ldrh	r4, [r3]
 	mov	r1, r4
 	bl	__aeabi_uidiv
 	ldr	r3, [sp, #12]
 	mov	r1, r4
 	str	r0, [sp, #16]
+	mov	r4, r8
 	subs	r0, r3, #1
 	bl	__aeabi_uidiv
 	ldr	r3, [sp, #16]
-	ldr	r2, .L1500+12
-	ldr	r1, [sp, #24]
+	ldr	r2, .L1487+12
+	ldr	r1, [sp, #4]
 	rsb	r3, r3, #1
-	ldr	r4, [sp, #16]
+	ldr	r6, [sp, #16]
 	add	r3, r3, r0
 	str	r0, [sp, #20]
 	str	r3, [sp, #8]
 	ldr	r3, [r2]
-	str	r7, [sp, #32]
-	str	r7, [sp, #28]
+	str	r8, [sp, #28]
+	str	r8, [sp, #24]
 	add	r3, r3, r1
 	ldr	r1, [sp, #8]
 	str	r3, [r2]
-	ldr	r2, .L1500+16
-	str	r7, [sp, #4]
+	ldr	r2, .L1487+16
 	ldr	r3, [r2]
 	add	r3, r3, r1
 	str	r3, [r2]
-.L1470:
+.L1455:
 	ldr	r3, [sp, #8]
-	cbnz	r3, .L1487
-	ldr	r3, .L1500+20
+	cbnz	r3, .L1472
+	ldr	r3, .L1487+20
 	ldrh	r3, [r3]
-	cbnz	r3, .L1488
-	ldr	r3, .L1500+24
+	cbnz	r3, .L1473
+	ldr	r3, .L1487+24
 	ldrh	r3, [r3]
 	cmp	r3, #31
-	bhi	.L1467
-.L1488:
+	bhi	.L1452
+.L1473:
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
-	b	.L1467
-.L1487:
+	b	.L1452
+.L1472:
 	movs	r2, #0
 	add	r1, sp, #52
-	mov	r0, r4
+	mov	r0, r6
 	bl	log2phys
 	ldr	r3, [sp, #52]
 	adds	r0, r3, #1
-	bne	.L1471
-	ldr	fp, .L1500+8
-	mov	r10, #0
-.L1472:
-	ldrh	r0, [fp]
-	cmp	r10, r0
-	bcc	.L1474
-.L1475:
+	bne	.L1456
+	ldr	r3, .L1487+8
+	mov	fp, #0
+.L1457:
+	ldrh	r0, [r3]
+	cmp	fp, r0
+	bcc	.L1459
+.L1460:
 	ldr	r3, [sp, #8]
-	adds	r4, r4, #1
+	adds	r6, r6, #1
 	subs	r3, r3, #1
 	str	r3, [sp, #8]
-	beq	.L1479
-	ldr	r3, .L1500+28
+	beq	.L1464
+	ldr	r3, .L1487+28
 	ldrh	r3, [r3]
-	cmp	r5, r3, lsl #2
-	bne	.L1470
-.L1479:
-	cmp	r5, #0
-	beq	.L1470
-	ldr	r3, .L1500+32
+	cmp	r7, r3, lsl #2
+	bne	.L1455
+.L1464:
+	cmp	r7, #0
+	beq	.L1455
+	ldr	r3, .L1487+32
 	movs	r2, #0
-	mov	r1, r5
-	mov	r10, #0
+	mov	r1, r7
+	mov	fp, #0
 	ldr	r0, [r3]
 	bl	FlashReadPages
-	lsls	r3, r7, #9
+	lsl	r3, r8, #9
 	str	r3, [sp, #44]
-	ldr	r3, [sp, #28]
+	ldr	r3, [sp, #24]
 	lsls	r3, r3, #9
 	str	r3, [sp, #36]
-	ldr	r3, [sp, #32]
+	ldr	r3, [sp, #28]
 	lsls	r3, r3, #9
 	str	r3, [sp, #40]
-.L1486:
+.L1471:
 	movs	r3, #20
-	mul	fp, r3, r10
-	ldr	r3, .L1500+32
+	mul	r3, r3, fp
+	str	r3, [sp, #32]
+	ldr	r3, .L1487+32
 	ldr	r2, [r3]
+	ldr	r3, [sp, #32]
+	add	r2, r2, r3
 	ldr	r3, [sp, #16]
-	add	r2, r2, fp
 	ldr	r1, [r2, #16]
 	cmp	r3, r1
-	bne	.L1481
+	bne	.L1466
 	ldr	r1, [r2, #8]
-	ldr	r2, .L1500+36
+	ldr	r2, .L1487+36
 	ldr	r2, [r2]
 	cmp	r1, r2
-	bne	.L1482
+	bne	.L1467
 	ldr	r3, [sp, #36]
-	mov	r0, r8
+	mov	r0, r10
 	ldr	r2, [sp, #40]
 	add	r1, r1, r3
-.L1499:
+.L1486:
 	bl	ftl_memcpy
-.L1482:
-	ldr	r3, .L1500+32
+.L1467:
+	ldr	r3, .L1487+32
+	ldr	r2, [sp, #32]
 	ldr	r3, [r3]
-	add	r2, r3, fp
-	ldr	r3, [r3, fp]
+	adds	r2, r3, r2
 	ldr	r0, [r2, #12]
 	ldr	r1, [r2, #16]
 	ldr	r0, [r0, #8]
 	cmp	r1, r0
 	itttt	ne
-	ldrne	r0, .L1500+40
+	ldrne	r0, .L1487+40
 	ldrne	r1, [r0, #72]
 	addne	r1, r1, #1
 	strne	r1, [r0, #72]
+	ldr	r1, [sp, #32]
+	ldr	r3, [r3, r1]
 	adds	r1, r3, #1
-	bne	.L1484
-	ldr	r1, .L1500+40
-	str	r3, [sp, #4]
+	bne	.L1469
+	ldr	r1, .L1487+40
+	mov	r4, r3
 	ldr	r2, [r1, #72]
 	adds	r2, r2, #1
 	str	r2, [r1, #72]
-.L1485:
-	add	r10, r10, #1
-	cmp	r5, r10
-	bne	.L1486
-	movs	r5, #0
-	b	.L1470
-.L1474:
-	mla	r0, r0, r4, r10
-	cmp	r6, r0
-	bhi	.L1473
-	ldr	r3, [sp, #12]
-	cmp	r3, r0
-	bls	.L1473
-	subs	r0, r0, r6
+.L1470:
+	add	fp, fp, #1
+	cmp	r7, fp
+	bne	.L1471
+	movs	r7, #0
+	b	.L1455
+.L1459:
+	mla	r0, r0, r6, fp
+	cmp	r5, r0
+	bhi	.L1458
+	ldr	r2, [sp, #12]
+	cmp	r2, r0
+	bls	.L1458
+	subs	r0, r0, r5
 	mov	r2, #512
 	movs	r1, #0
-	add	r0, r8, r0, lsl #9
+	add	r0, r10, r0, lsl #9
+	str	r3, [sp, #32]
 	bl	ftl_memset
-.L1473:
-	add	r10, r10, #1
-	b	.L1472
-.L1471:
-	ldr	r2, .L1500+32
-	mov	r10, #20
+	ldr	r3, [sp, #32]
+.L1458:
+	add	fp, fp, #1
+	b	.L1457
+.L1456:
+	ldr	r2, .L1487+32
+	mov	fp, #20
 	ldr	r2, [r2]
-	mla	r10, r10, r5, r2
-	str	r3, [r10, #4]
+	mla	fp, fp, r7, r2
+	str	r3, [fp, #4]
 	ldr	r3, [sp, #16]
-	cmp	r4, r3
-	ldr	r3, .L1500+8
-	bne	.L1476
-	ldr	r2, .L1500+36
-	mov	r0, r6
-	ldrh	fp, [r3]
+	cmp	r6, r3
+	ldr	r3, .L1487+8
+	bne	.L1461
+	ldr	r2, .L1487+36
+	mov	r0, r5
+	ldrh	r3, [r3]
 	ldr	r2, [r2]
-	mov	r1, fp
-	str	r2, [r10, #8]
+	mov	r1, r3
+	str	r3, [sp, #28]
+	str	r2, [fp, #8]
 	bl	__aeabi_uidivmod
-	ldr	r2, [sp, #24]
-	sub	r3, fp, r1
-	str	r1, [sp, #28]
-	cmp	r3, r2
+	ldr	r3, [sp, #28]
+	str	r1, [sp, #24]
+	subs	r2, r3, r1
+	ldr	r1, [sp, #4]
+	cmp	r2, r1
 	it	cs
-	movcs	r3, r2
-	cmp	fp, r3
-	str	r3, [sp, #32]
-	bne	.L1477
-	str	r8, [r10, #8]
-.L1477:
-	ldr	r3, .L1500+44
-	ldr	r2, .L1500+48
-	str	r4, [r10, #16]
+	movcs	r2, r1
+	cmp	r3, r2
+	str	r2, [sp, #28]
+	bne	.L1462
+	str	r10, [fp, #8]
+.L1462:
+	ldr	r3, .L1487+44
+	ldr	r2, .L1487+48
+	str	r6, [fp, #16]
 	ldrh	r3, [r3]
 	ldr	r2, [r2]
-	muls	r3, r5, r3
-	adds	r5, r5, #1
+	muls	r3, r7, r3
+	adds	r7, r7, #1
 	bic	r3, r3, #3
 	add	r3, r3, r2
-	str	r3, [r10, #12]
-	b	.L1475
-.L1476:
+	str	r3, [fp, #12]
+	b	.L1460
+.L1461:
 	ldr	r2, [sp, #20]
-	cmp	r4, r2
-	bne	.L1478
-	ldr	r2, .L1500+52
+	cmp	r6, r2
+	bne	.L1463
+	ldr	r2, .L1487+52
 	ldr	r1, [sp, #12]
 	ldr	r2, [r2]
-	str	r2, [r10, #8]
+	str	r2, [fp, #8]
 	ldrh	r2, [r3]
-	mul	r3, r2, r4
-	subs	r7, r1, r3
-	cmp	r2, r7
-	bne	.L1477
-.L1498:
-	subs	r3, r3, r6
-	add	r3, r8, r3, lsl #9
-	str	r3, [r10, #8]
-	b	.L1477
-.L1478:
+	mul	r3, r2, r6
+	sub	r8, r1, r3
+	cmp	r2, r8
+	bne	.L1462
+.L1485:
+	subs	r3, r3, r5
+	add	r3, r10, r3, lsl #9
+	str	r3, [fp, #8]
+	b	.L1462
+.L1463:
 	ldrh	r3, [r3]
-	muls	r3, r4, r3
-	b	.L1498
-.L1481:
+	muls	r3, r6, r3
+	b	.L1485
+.L1466:
 	ldr	r3, [sp, #20]
 	cmp	r3, r1
-	bne	.L1482
-	ldr	r3, .L1500+52
+	bne	.L1467
+	ldr	r3, .L1487+52
 	ldr	r1, [r2, #8]
 	ldr	r2, [r3]
 	cmp	r1, r2
-	bne	.L1482
-	ldr	r2, .L1500+8
+	bne	.L1467
+	ldr	r2, .L1487+8
 	ldr	r3, [sp, #20]
 	ldrh	r0, [r2]
 	ldr	r2, [sp, #44]
 	muls	r0, r3, r0
-	subs	r0, r0, r6
-	add	r0, r8, r0, lsl #9
-	b	.L1499
-.L1484:
+	subs	r0, r0, r5
+	add	r0, r10, r0, lsl #9
+	b	.L1486
+.L1469:
 	cmp	r3, #256
-	bne	.L1485
+	bne	.L1470
 	ldr	r0, [r2, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-	b	.L1485
-.L1489:
-	mov	r3, #-1
-.L1490:
-	str	r3, [sp, #4]
-	b	.L1467
-.L1501:
+	b	.L1470
+.L1476:
+	mov	r4, #-1
+	b	.L1452
+.L1488:
 	.align	2
-.L1500:
-	.word	.LANCHOR34
-	.word	.LANCHOR166
-	.word	.LANCHOR12
-	.word	.LANCHOR163
-	.word	.LANCHOR89
-	.word	.LANCHOR74
-	.word	.LANCHOR48
-	.word	.LANCHOR3
-	.word	.LANCHOR103
+.L1487:
+	.word	.LANCHOR33
+	.word	.LANCHOR165
+	.word	.LANCHOR11
+	.word	.LANCHOR162
+	.word	.LANCHOR88
+	.word	.LANCHOR73
+	.word	.LANCHOR47
+	.word	.LANCHOR2
+	.word	.LANCHOR102
+	.word	.LANCHOR108
+	.word	.LANCHOR134
+	.word	.LANCHOR23
+	.word	.LANCHOR114
 	.word	.LANCHOR109
-	.word	.LANCHOR135
-	.word	.LANCHOR24
-	.word	.LANCHOR115
-	.word	.LANCHOR110
 	.size	FtlRead, .-FtlRead
 	.section	.text.sftl_read,"ax",%progbits
 	.align	1
@@ -11095,35 +10984,39 @@ FtlWrite:
 	cmp	r0, #16
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #72
-	mov	fp, r1
-	str	r2, [sp, #20]
-	str	r3, [sp, #16]
-	bne	.L1504
+	mov	r10, r1
+	str	r2, [sp, #16]
+	str	r3, [sp, #20]
+	bne	.L1491
 	mov	r2, r3
-	ldr	r1, [sp, #20]
-	add	r0, fp, #256
+	ldr	r1, [sp, #16]
+	add	r0, r10, #256
 	bl	FtlVendorPartWrite
-.L1503:
+.L1490:
 	add	sp, sp, #72
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1504:
-	ldr	r3, [sp, #20]
-	adds	r4, r1, r3
-	ldr	r3, .L1548
+.L1491:
+	ldr	r3, .L1537
 	ldr	r3, [r3]
-	cmp	r4, r3
-	bhi	.L1537
-	ldr	r3, .L1548+4
+	cmp	r1, r3
+	bcs	.L1526
+	ldr	r2, [sp, #16]
+	cmp	r2, r3
+	bhi	.L1526
+	adds	r4, r1, r2
+	cmp	r3, r4
+	bcc	.L1526
+	ldr	r3, .L1537+4
 	ldr	r0, [r3]
 	adds	r1, r0, #1
-	beq	.L1503
-	ldr	r3, .L1548+8
+	beq	.L1490
+	ldr	r3, .L1537+8
 	mov	r2, #2048
-	mov	r0, fp
-	ldr	r7, .L1548+12
+	mov	r0, r10
+	ldr	r7, .L1537+12
 	str	r2, [r3]
-	ldr	r3, .L1548+16
+	ldr	r3, .L1537+16
 	ldrh	r5, [r3]
 	mov	r1, r5
 	bl	__aeabi_uidiv
@@ -11132,10 +11025,10 @@ FtlWrite:
 	subs	r0, r4, #1
 	bl	__aeabi_uidiv
 	ldr	r2, [sp, #12]
-	ldr	r1, [sp, #20]
+	ldr	r1, [sp, #16]
 	ldr	r5, [sp, #12]
 	subs	r3, r0, r2
-	ldr	r2, .L1548+20
+	ldr	r2, .L1537+20
 	str	r3, [sp, #32]
 	adds	r3, r3, #1
 	str	r3, [sp, #8]
@@ -11144,39 +11037,39 @@ FtlWrite:
 	add	r3, r3, r1
 	ldr	r1, [sp, #8]
 	str	r3, [r2]
-	ldr	r2, .L1548+24
+	ldr	r2, .L1537+24
 	ldr	r3, [r2]
 	add	r3, r3, r1
 	str	r3, [r2]
-.L1506:
+.L1493:
 	ldr	r3, [sp, #8]
-	cbnz	r3, .L1532
-	ldr	r5, .L1548+28
+	cbnz	r3, .L1519
+	ldr	r5, .L1537+28
 	mov	r0, r3
 	ldr	r1, [sp, #32]
 	bl	rk_ftl_garbage_collect
 	ldrh	r2, [r5]
 	cmp	r2, #5
-	bls	.L1533
-.L1535:
+	bls	.L1520
+.L1522:
 	movs	r0, #0
-	b	.L1503
-.L1532:
-	ldr	r4, .L1548+32
+	b	.L1490
+.L1519:
+	ldr	r4, .L1537+32
 	ldrb	r2, [r7, #6]	@ zero_extendqisi2
 	ldrh	r3, [r4]
 	cmp	r2, r3
-	bcc	.L1507
+	bcc	.L1494
 	movw	r2, #1041
-	ldr	r1, .L1548+36
-	ldr	r0, .L1548+40
+	ldr	r1, .L1537+36
+	ldr	r0, .L1537+40
 	bl	printf
-.L1507:
+.L1494:
 	ldrh	r3, [r7, #4]
-	cbnz	r3, .L1508
+	cbnz	r3, .L1495
 	mov	r0, r7
 	bl	allocate_new_data_superblock
-.L1508:
+.L1495:
 	ldrb	r3, [r7, #7]	@ zero_extendqisi2
 	ldrh	r2, [r7, #4]
 	lsls	r3, r3, #2
@@ -11191,22 +11084,22 @@ FtlWrite:
 	str	r3, [sp, #44]
 	ldrh	r3, [r4]
 	cmp	r2, r3
-	bcc	.L1509
+	bcc	.L1496
 	movw	r2, #1074
-	ldr	r1, .L1548+36
-	ldr	r0, .L1548+40
+	ldr	r1, .L1537+36
+	ldr	r0, .L1537+40
 	bl	printf
-.L1509:
-	ldr	r8, .L1548+44
+.L1496:
+	ldr	r8, .L1537+44
 	movs	r3, #0
 	str	r3, [sp, #4]
-.L1510:
+.L1497:
 	ldr	r3, [sp, #4]
 	ldr	r2, [sp, #44]
 	cmp	r3, r2
-	bne	.L1530
-.L1511:
-	ldr	r0, .L1548+44
+	bne	.L1517
+.L1498:
+	ldr	r0, .L1537+44
 	mov	r3, r7
 	movs	r2, #0
 	ldr	r1, [sp, #4]
@@ -11215,21 +11108,21 @@ FtlWrite:
 	ldr	r3, [sp, #4]
 	ldr	r2, [sp, #8]
 	cmp	r3, r2
-	bls	.L1531
+	bls	.L1518
 	mov	r2, #1152
-	ldr	r1, .L1548+36
-	ldr	r0, .L1548+40
+	ldr	r1, .L1537+36
+	ldr	r0, .L1537+40
 	bl	printf
-.L1531:
+.L1518:
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #4]
 	subs	r3, r3, r2
 	str	r3, [sp, #8]
-	b	.L1506
-.L1530:
+	b	.L1493
+.L1517:
 	ldrh	r3, [r7, #4]
 	cmp	r3, #0
-	beq	.L1511
+	beq	.L1498
 	movs	r2, #0
 	add	r1, sp, #48
 	mov	r0, r5
@@ -11237,7 +11130,7 @@ FtlWrite:
 	bl	log2phys
 	mov	r0, r7
 	bl	get_new_active_ppa
-	ldr	r2, .L1548+48
+	ldr	r2, .L1537+48
 	ldr	r1, [sp, #4]
 	ldr	r3, [sp, #4]
 	ldrh	r2, [r2]
@@ -11249,107 +11142,107 @@ FtlWrite:
 	bic	r1, r1, #3
 	str	r5, [r3, #16]
 	str	r1, [sp, #36]
-	ldr	r1, .L1548+52
+	ldr	r1, .L1537+52
 	ldr	r0, [sp, #36]
 	ldr	r1, [r1]
-	add	r10, r1, r0
+	add	fp, r1, r0
 	str	r1, [sp, #40]
-	str	r10, [r3, #12]
+	str	fp, [r3, #12]
 	movs	r1, #0
-	mov	r0, r10
+	mov	r0, fp
 	bl	ftl_memset
 	ldr	r3, [sp, #12]
-	ldr	r2, .L1548+16
+	ldr	r2, .L1537+16
 	cmp	r5, r3
-	beq	.L1512
+	beq	.L1499
 	ldr	r3, [sp, #28]
 	cmp	r5, r3
-	bne	.L1543
+	bne	.L1532
 	ldrh	r2, [r2]
-	ldr	r3, [sp, #20]
+	ldr	r3, [sp, #16]
 	smulbb	r2, r2, r5
-	add	r4, fp, r3
+	add	r4, r10, r3
 	movs	r3, #0
 	str	r3, [sp, #24]
 	subs	r4, r4, r2
 	uxth	r4, r4
-	b	.L1515
-.L1512:
+	b	.L1502
+.L1499:
 	ldrh	r4, [r2]
-	mov	r0, fp
+	mov	r0, r10
 	mov	r1, r4
 	bl	__aeabi_uidivmod
-	ldr	r3, [sp, #20]
+	ldr	r3, [sp, #16]
 	subs	r4, r4, r1
 	str	r1, [sp, #24]
 	cmp	r4, r3
 	it	cs
 	movcs	r4, r3
-.L1515:
-	ldr	r3, .L1548+16
+.L1502:
+	ldr	r3, .L1537+16
 	ldrh	r3, [r3]
 	cmp	r4, r3
 	ldr	r3, [sp, #12]
-	bne	.L1516
+	bne	.L1503
 	cmp	r5, r3
 	ldr	r3, [r8]
 	add	r6, r6, r3
-	bne	.L1517
-	ldr	r3, [sp, #16]
-.L1545:
+	bne	.L1504
+	ldr	r3, [sp, #20]
+.L1534:
 	str	r3, [r6, #8]
-	b	.L1518
-.L1517:
+	b	.L1505
+.L1504:
 	muls	r4, r5, r4
-	ldr	r3, [sp, #16]
-	sub	r4, r4, fp
+	ldr	r3, [sp, #20]
+	sub	r4, r4, r10
 	add	r4, r3, r4, lsl #9
 	str	r4, [r6, #8]
-.L1518:
-	ldr	r3, .L1548+32
+.L1505:
+	ldr	r3, .L1537+32
 	ldrb	r2, [r7, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1527
+	bcc	.L1514
 	movw	r2, #1143
-	ldr	r1, .L1548+36
-	ldr	r0, .L1548+40
+	ldr	r1, .L1537+36
+	ldr	r0, .L1537+40
 	bl	printf
-.L1527:
+.L1514:
 	ldr	r2, [sp, #40]
 	movw	r3, #61589
 	ldr	r1, [sp, #36]
 	strh	r3, [r2, r1]	@ movhi
-	ldr	r2, .L1548+56
-	str	r5, [r10, #8]
+	ldr	r2, .L1537+56
+	str	r5, [fp, #8]
 	adds	r5, r5, #1
 	ldr	r3, [r2]
-	str	r3, [r10, #4]
+	str	r3, [fp, #4]
 	adds	r3, r3, #1
 	adds	r1, r3, #1
 	it	eq
 	moveq	r3, #0
 	str	r3, [r2]
 	ldr	r3, [sp, #48]
-	str	r3, [r10, #12]
+	str	r3, [fp, #12]
 	ldrh	r3, [r7]
-	strh	r3, [r10, #2]	@ movhi
+	strh	r3, [fp, #2]	@ movhi
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
 	str	r3, [sp, #4]
-	b	.L1510
-.L1516:
+	b	.L1497
+.L1503:
 	cmp	r5, r3
 	ldr	r3, [r8]
 	ite	eq
-	ldreq	r2, .L1548+60
-	ldrne	r2, .L1548+64
+	ldreq	r2, .L1537+60
+	ldrne	r2, .L1537+64
 	add	r3, r3, r6
 	ldr	r2, [r2]
 	str	r2, [r3, #8]
 	ldr	r3, [sp, #48]
 	adds	r2, r3, #1
-	beq	.L1521
+	beq	.L1508
 	str	r3, [sp, #56]
 	movs	r1, #1
 	ldr	r3, [r8]
@@ -11364,125 +11257,124 @@ FtlWrite:
 	bl	FlashReadPages
 	ldr	r3, [sp, #52]
 	adds	r0, r3, #1
-	bne	.L1522
-	ldr	r1, .L1548+68
-	ldr	r0, .L1548+72
+	bne	.L1509
+	ldr	r1, .L1537+68
+	ldr	r0, .L1537+72
 	ldr	r2, [r1, #72]
 	adds	r2, r2, #1
 	str	r2, [r1, #72]
 	mov	r2, r5
-	ldr	r1, [r10, #8]
+	ldr	r1, [fp, #8]
 	bl	printf
-.L1525:
+.L1512:
 	ldr	r3, [sp, #12]
 	lsls	r2, r4, #9
 	cmp	r5, r3
-	bne	.L1526
+	bne	.L1513
 	ldr	r3, [r8]
-	ldr	r1, [sp, #16]
+	ldr	r1, [sp, #20]
 	add	r6, r6, r3
 	ldr	r3, [sp, #24]
 	ldr	r0, [r6, #8]
 	add	r0, r0, r3, lsl #9
-.L1546:
+.L1535:
 	bl	ftl_memcpy
-	b	.L1518
-.L1522:
-	ldr	r1, [r10, #8]
+	b	.L1505
+.L1509:
+	ldr	r1, [fp, #8]
 	cmp	r5, r1
-	beq	.L1524
-	ldr	r2, .L1548+68
-	ldr	r0, .L1548+76
+	beq	.L1511
+	ldr	r2, .L1537+68
+	ldr	r0, .L1537+76
 	ldr	r3, [r2, #72]
 	adds	r3, r3, #1
 	str	r3, [r2, #72]
 	mov	r2, r5
 	bl	printf
-.L1524:
-	ldr	r3, [r10, #8]
+.L1511:
+	ldr	r3, [fp, #8]
 	cmp	r5, r3
-	beq	.L1525
+	beq	.L1512
 	mov	r2, #1128
-	ldr	r1, .L1548+36
-	ldr	r0, .L1548+40
+	ldr	r1, .L1537+36
+	ldr	r0, .L1537+40
 	bl	printf
-	b	.L1525
-.L1521:
-	ldr	r3, [r8]
-	movs	r1, #0
-	ldr	r2, .L1548+80
-	add	r3, r3, r6
-	ldrh	r2, [r2]
-	ldr	r0, [r3, #8]
-	bl	ftl_memset
-	b	.L1525
-.L1549:
+	b	.L1512
+.L1538:
 	.align	2
-.L1548:
-	.word	.LANCHOR34
-	.word	.LANCHOR166
+.L1537:
+	.word	.LANCHOR33
+	.word	.LANCHOR165
+	.word	.LANCHOR175
+	.word	.LANCHOR50
+	.word	.LANCHOR11
+	.word	.LANCHOR161
+	.word	.LANCHOR84
+	.word	.LANCHOR47
+	.word	.LANCHOR2
 	.word	.LANCHOR176
-	.word	.LANCHOR51
-	.word	.LANCHOR12
-	.word	.LANCHOR162
-	.word	.LANCHOR85
-	.word	.LANCHOR48
-	.word	.LANCHOR3
-	.word	.LANCHOR177
 	.word	.LC1
-	.word	.LANCHOR105
-	.word	.LANCHOR24
-	.word	.LANCHOR115
-	.word	.LANCHOR83
+	.word	.LANCHOR104
+	.word	.LANCHOR23
+	.word	.LANCHOR114
+	.word	.LANCHOR82
+	.word	.LANCHOR108
 	.word	.LANCHOR109
-	.word	.LANCHOR110
-	.word	.LANCHOR135
+	.word	.LANCHOR134
 	.word	.LC44
 	.word	.LC45
-	.word	.LANCHOR23
-.L1526:
-	ldr	r3, .L1550
+.L1508:
+	ldr	r3, [r8]
+	movs	r1, #0
+	ldr	r2, .L1539
+	add	r3, r3, r6
+	ldrh	r2, [r2]
+	ldr	r0, [r3, #8]
+	bl	ftl_memset
+	b	.L1512
+.L1513:
+	ldr	r3, .L1539+4
 	ldrh	r1, [r3]
 	ldr	r3, [r8]
 	muls	r1, r5, r1
 	add	r6, r6, r3
-	ldr	r3, [sp, #16]
+	ldr	r3, [sp, #20]
 	ldr	r0, [r6, #8]
-	sub	r1, r1, fp
+	sub	r1, r1, r10
 	add	r1, r3, r1, lsl #9
-	b	.L1546
-.L1543:
+	b	.L1535
+.L1532:
 	ldr	r3, [r8]
 	add	r6, r6, r3
 	ldrh	r3, [r2]
-	ldr	r2, [sp, #16]
+	ldr	r2, [sp, #20]
 	muls	r3, r5, r3
-	sub	r3, r3, fp
+	sub	r3, r3, r10
 	add	r3, r2, r3, lsl #9
-	b	.L1545
-.L1533:
-	ldr	r6, .L1550+4
+	b	.L1534
+.L1520:
+	ldr	r6, .L1539+8
 	mov	r4, #256
-	ldr	r7, .L1550+8
-.L1536:
+	ldr	r7, .L1539+12
+.L1523:
 	ldrh	r3, [r6]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1534
+	bne	.L1521
 	ldrh	r2, [r7]
 	cmp	r2, r3
-	bne	.L1534
+	bne	.L1521
 	movs	r0, #0
 	bl	List_get_gc_head_node
 	uxth	r0, r0
 	bl	FtlGcRefreshBlock
-.L1534:
-	ldr	r2, .L1550+12
+.L1521:
+	ldr	r2, .L1539+16
 	movs	r3, #128
 	movs	r1, #1
 	mov	r0, r1
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L1550+16
+	ldr	r2, .L1539+20
 	strh	r3, [r2]	@ movhi
 	bl	rk_ftl_garbage_collect
 	movs	r1, #1
@@ -11490,21 +11382,22 @@ FtlWrite:
 	bl	rk_ftl_garbage_collect
 	ldrh	r3, [r5]
 	cmp	r3, #2
-	bhi	.L1535
+	bhi	.L1522
 	subs	r4, r4, #1
-	bne	.L1536
-	b	.L1535
-.L1537:
+	bne	.L1523
+	b	.L1522
+.L1526:
 	mov	r0, #-1
-	b	.L1503
-.L1551:
+	b	.L1490
+.L1540:
 	.align	2
-.L1550:
-	.word	.LANCHOR12
-	.word	.LANCHOR145
-	.word	.LANCHOR72
-	.word	.LANCHOR101
+.L1539:
+	.word	.LANCHOR22
+	.word	.LANCHOR11
+	.word	.LANCHOR144
+	.word	.LANCHOR71
 	.word	.LANCHOR100
+	.word	.LANCHOR99
 	.size	FtlWrite, .-FtlWrite
 	.section	.text.sftl_gc,"ax",%progbits
 	.align	1
@@ -11535,16 +11428,16 @@ FtlLoadSysInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r1, #0
-	ldr	r8, .L1583+144
+	ldr	r8, .L1572+140
 	sub	sp, sp, #24
-	ldr	r7, .L1583
+	ldr	r7, .L1572
 	ldr	r3, [r8]
-	ldr	r4, .L1583+4
-	ldr	fp, .L1583+148
+	ldr	r4, .L1572+4
+	ldr	fp, .L1572+144
 	ldrh	r2, [r7]
-	ldr	r5, .L1583+8
+	ldr	r5, .L1572+8
 	str	r3, [r4, #8]
-	ldr	r6, .L1583+12
+	ldr	r6, .L1572+12
 	ldr	r3, [fp]
 	lsls	r2, r2, #1
 	ldr	r0, [r5]
@@ -11554,33 +11447,33 @@ FtlLoadSysInfo:
 	movw	r3, #65535
 	str	r5, [sp, #16]
 	cmp	r0, r3
-	bne	.L1554
-.L1565:
+	bne	.L1543
+.L1554:
 	mov	r0, #-1
-.L1553:
+.L1542:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1554:
+.L1543:
 	movs	r1, #1
 	bl	FtlGetLastWrittenPage
 	ldrsh	r10, [r6]
 	sxth	r5, r0
 	adds	r0, r0, #1
 	strh	r0, [r6, #2]	@ movhi
-.L1556:
+.L1545:
 	cmp	r5, #0
-	bge	.L1562
-	movw	r2, #1465
-	ldr	r1, .L1583+16
-	ldr	r0, .L1583+20
+	bge	.L1551
+	movw	r2, #1467
+	ldr	r1, .L1572+16
+	ldr	r0, .L1572+20
 	bl	printf
-	b	.L1561
-.L1562:
+	b	.L1550
+.L1551:
 	orr	r3, r5, r10, lsl #10
 	movs	r2, #1
 	mov	r1, r2
-	ldr	r0, .L1583+4
+	ldr	r0, .L1572+4
 	str	r3, [r4, #4]
 	ldr	r3, [r8]
 	str	r3, [r4, #8]
@@ -11588,141 +11481,130 @@ FtlLoadSysInfo:
 	ldr	r3, [r4, #12]
 	ldr	r3, [r3, #12]
 	str	r3, [sp, #20]
-	cbz	r3, .L1557
+	cbz	r3, .L1546
 	ldr	r2, [r4]
 	adds	r2, r2, #1
-	beq	.L1557
-	ldr	r2, .L1583+24
+	beq	.L1546
+	ldr	r2, .L1572+24
 	ldr	r0, [r4, #8]
 	ldrh	r1, [r2]
 	bl	js_hash
 	ldr	r3, [sp, #20]
 	cmp	r3, r0
-	beq	.L1557
+	beq	.L1546
 	str	r0, [sp, #8]
 	mov	r2, r10
 	str	r3, [sp, #4]
 	ldrh	r3, [r6, #4]
-	ldr	r1, .L1583+16
-	ldr	r0, .L1583+28
+	ldr	r1, .L1572+16
+	ldr	r0, .L1572+28
 	str	r3, [sp]
 	mov	r3, r5
 	bl	printf
-	cbnz	r5, .L1558
+	cbnz	r5, .L1547
 	ldrh	r3, [r6, #4]
 	cmp	r10, r3
-	beq	.L1558
+	beq	.L1547
 	sxth	r10, r3
-	ldr	r3, .L1583+32
+	ldr	r3, .L1572+32
 	ldrh	r5, [r3]
-.L1560:
+.L1549:
 	subs	r5, r5, #1
 	sxth	r5, r5
-	b	.L1556
-.L1558:
+	b	.L1545
+.L1547:
 	mov	r3, #-1
 	str	r3, [r4]
-.L1557:
+.L1546:
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L1560
+	beq	.L1549
 	ldr	r3, [r8]
-	ldr	r2, .L1583+36
+	ldr	r2, .L1572+36
 	ldr	r3, [r3]
 	cmp	r3, r2
-	bne	.L1560
+	bne	.L1549
 	ldr	r3, [fp]
 	ldrh	r2, [r3]
 	movw	r3, #61604
 	cmp	r2, r3
-	bne	.L1560
-.L1561:
-	ldr	r2, .L1583+24
+	bne	.L1549
+.L1550:
+	ldr	r2, .L1572+24
 	ldrh	r3, [r7]
 	ldrh	r2, [r2]
 	adds	r3, r3, #24
 	cmp	r2, r3, lsl #1
-	bcs	.L1564
-	movw	r2, #1467
-	ldr	r1, .L1583+16
-	ldr	r0, .L1583+20
+	bcs	.L1553
+	movw	r2, #1469
+	ldr	r1, .L1572+16
+	ldr	r0, .L1572+20
 	bl	printf
-.L1564:
-	ldr	r5, .L1583+40
+.L1553:
+	ldr	r5, .L1572+40
 	movs	r2, #48
 	ldr	r1, [r4, #8]
 	mov	r0, r5
 	bl	ftl_memcpy
 	ldrh	r2, [r7]
 	ldr	r1, [r4, #8]
+	mov	r4, r5
 	ldr	r3, [sp, #16]
 	lsls	r2, r2, #1
 	adds	r1, r1, #48
 	ldr	r0, [r3]
 	bl	ftl_memcpy
-	ldrh	r1, [r7]
-	ldr	r3, [r4, #8]
-	mov	r4, r5
-	lsrs	r2, r1, #3
-	adds	r1, r1, #24
-	lsls	r1, r1, #1
-	adds	r2, r2, #4
-	bic	r1, r1, #3
-	add	r1, r1, r3
-	ldr	r3, .L1583+44
-	ldr	r0, [r3]
-	bl	ftl_memcpy
 	ldr	r2, [r5]
-	ldr	r3, .L1583+36
+	ldr	r3, .L1572+36
 	cmp	r2, r3
-	bne	.L1565
-	ldr	r3, .L1583+48
+	bne	.L1554
+	ldr	r3, .L1572+44
 	ldrb	r2, [r4, #10]	@ zero_extendqisi2
 	ldrh	r5, [r5, #8]
 	ldrh	r3, [r3]
 	strh	r5, [r6, #6]	@ movhi
 	cmp	r2, r3
-	bne	.L1565
-	ldr	r3, .L1583+52
-	ldr	r2, .L1583+56
+	bne	.L1554
+	ldr	r3, .L1572+48
+	ldr	r2, .L1572+52
 	str	r5, [r3]
-	ldr	r3, .L1583+60
+	ldr	r3, .L1572+56
 	ldrh	r3, [r3]
 	muls	r3, r5, r3
 	str	r3, [r2]
-	ldr	r2, .L1583+64
+	ldr	r2, .L1572+60
 	ldrh	r2, [r2]
 	muls	r3, r2, r3
-	ldr	r2, .L1583+68
+	ldr	r2, .L1572+64
 	str	r3, [r2]
-	ldr	r3, .L1583+72
+	ldr	r3, .L1572+68
 	ldr	r6, [r3]
-	ldr	r3, .L1583+76
+	ldr	r3, .L1572+72
 	ldrh	r0, [r3, #6]
-	ldr	r3, .L1583+80
+	ldr	r3, .L1572+76
 	subs	r0, r6, r0
 	ldrh	r1, [r3]
 	subs	r0, r0, r5
 	bl	__aeabi_uidiv
-	ldr	r3, .L1583+84
+	ldr	r3, .L1572+80
 	cmp	r5, r6
 	strh	r0, [r3]	@ movhi
-	bls	.L1566
-	movw	r2, #1489
-	ldr	r1, .L1583+16
-	ldr	r0, .L1583+20
+	bls	.L1555
+	movw	r2, #1491
+	ldr	r1, .L1572+16
+	ldr	r0, .L1572+20
 	bl	printf
-.L1566:
+.L1555:
 	ldrh	r2, [r4, #16]
-	ldr	r3, .L1583+88
+	ldr	r3, .L1572+84
 	ldrh	ip, [r4, #14]
-	ldr	r7, .L1583+92
+	ldr	r7, .L1572+88
 	lsrs	r1, r2, #6
 	and	r2, r2, #63
 	strb	r2, [r3, #6]
 	ldrb	r2, [r4, #11]	@ zero_extendqisi2
 	strh	r1, [r3, #2]	@ movhi
-	ldr	r1, .L1583+96
+	ldr	r1, .L1572+92
 	strb	r2, [r3, #8]
 	ldrh	r2, [r4, #18]
 	strh	ip, [r3]	@ movhi
@@ -11741,7 +11623,7 @@ FtlLoadSysInfo:
 	strh	r5, [r1, #2]	@ movhi
 	ldrh	r5, [r4, #22]
 	strb	r2, [r1, #8]
-	ldr	r2, .L1583+100
+	ldr	r2, .L1572+96
 	strh	r5, [r2]	@ movhi
 	ldrh	r5, [r4, #24]
 	lsrs	r6, r5, #6
@@ -11751,31 +11633,31 @@ FtlLoadSysInfo:
 	strh	r6, [r2, #2]	@ movhi
 	ldr	r6, [r4, #32]
 	strb	r5, [r2, #8]
-	ldr	r5, .L1583+104
+	ldr	r5, .L1572+100
 	str	r3, [r5]
-	ldr	r5, .L1583+108
+	ldr	r5, .L1572+104
 	str	r3, [r5]
-	ldr	r5, .L1583+112
+	ldr	r5, .L1572+108
 	str	r3, [r5]
-	ldr	r5, .L1583+116
+	ldr	r5, .L1572+112
 	str	r3, [r5]
-	ldr	r5, .L1583+120
+	ldr	r5, .L1572+116
 	str	r6, [r5]
 	mov	r6, r1
-	ldr	r5, .L1583+124
+	ldr	r5, .L1572+120
 	str	r3, [r5]
-	ldr	r5, .L1583+128
+	ldr	r5, .L1572+124
 	str	r3, [r5]
-	ldr	r5, .L1583+132
+	ldr	r5, .L1572+128
 	ldr	lr, [r4, #40]
 	str	r3, [r5]
-	ldr	r3, .L1583+136
+	ldr	r3, .L1572+132
 	ldr	r5, [r3]
 	cmp	lr, r5
 	mov	r5, r2
 	it	hi
 	strhi	lr, [r3]
-	ldr	r3, .L1583+140
+	ldr	r3, .L1572+136
 	ldr	r2, [r4, #36]
 	ldr	r1, [r3]
 	cmp	r2, r1
@@ -11783,74 +11665,73 @@ FtlLoadSysInfo:
 	strhi	r2, [r3]
 	movw	r3, #65535
 	cmp	ip, r3
-	beq	.L1569
-	ldr	r0, .L1583+88
+	beq	.L1558
+	ldr	r0, .L1572+84
 	bl	make_superblock
-.L1569:
+.L1558:
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1570
-	ldr	r0, .L1583+96
+	beq	.L1559
+	ldr	r0, .L1572+92
 	bl	make_superblock
-.L1570:
+.L1559:
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1571
-	ldr	r0, .L1583+100
+	beq	.L1560
+	ldr	r0, .L1572+96
 	bl	make_superblock
-.L1571:
+.L1560:
 	ldrh	r2, [r7]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1572
-	ldr	r0, .L1583+92
+	beq	.L1561
+	ldr	r0, .L1572+88
 	bl	make_superblock
-.L1572:
+.L1561:
 	movs	r0, #0
-	b	.L1553
-.L1584:
+	b	.L1542
+.L1573:
 	.align	2
-.L1583:
-	.word	.LANCHOR5
+.L1572:
+	.word	.LANCHOR4
+	.word	.LANCHOR137
+	.word	.LANCHOR41
 	.word	.LANCHOR138
-	.word	.LANCHOR42
-	.word	.LANCHOR139
-	.word	.LANCHOR178
+	.word	.LANCHOR177
 	.word	.LC1
-	.word	.LANCHOR23
+	.word	.LANCHOR22
 	.word	.LC46
-	.word	.LANCHOR20
-	.word	1179929683
-	.word	.LANCHOR39
-	.word	.LANCHOR1
-	.word	.LANCHOR10
-	.word	.LANCHOR179
-	.word	.LANCHOR152
 	.word	.LANCHOR19
-	.word	.LANCHOR12
-	.word	.LANCHOR34
-	.word	.LANCHOR7
-	.word	.LANCHOR37
-	.word	.LANCHOR3
-	.word	.LANCHOR171
+	.word	1179929683
+	.word	.LANCHOR38
+	.word	.LANCHOR9
+	.word	.LANCHOR178
+	.word	.LANCHOR151
+	.word	.LANCHOR18
+	.word	.LANCHOR11
+	.word	.LANCHOR33
+	.word	.LANCHOR6
+	.word	.LANCHOR36
+	.word	.LANCHOR2
+	.word	.LANCHOR170
+	.word	.LANCHOR50
+	.word	.LANCHOR144
 	.word	.LANCHOR51
-	.word	.LANCHOR145
 	.word	.LANCHOR52
-	.word	.LANCHOR53
+	.word	.LANCHOR83
 	.word	.LANCHOR84
-	.word	.LANCHOR85
-	.word	.LANCHOR89
 	.word	.LANCHOR88
+	.word	.LANCHOR87
+	.word	.LANCHOR89
 	.word	.LANCHOR90
 	.word	.LANCHOR91
-	.word	.LANCHOR92
-	.word	.LANCHOR87
+	.word	.LANCHOR86
+	.word	.LANCHOR81
 	.word	.LANCHOR82
-	.word	.LANCHOR83
-	.word	.LANCHOR106
-	.word	.LANCHOR114
+	.word	.LANCHOR105
+	.word	.LANCHOR113
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
 	.section	.text.FtlMapTblRecovery,"ax",%progbits
 	.align	1
@@ -11872,7 +11753,7 @@ FtlMapTblRecovery:
 	movs	r7, #0
 	str	r3, [sp, #8]
 	ldr	r3, [r0, #16]
-	ldr	r6, .L1626
+	ldr	r6, .L1615
 	str	r3, [sp, #24]
 	ldrh	r3, [r0, #6]
 	str	r3, [sp, #12]
@@ -11882,13 +11763,13 @@ FtlMapTblRecovery:
 	ldr	r3, [sp, #12]
 	lsls	r2, r3, #2
 	bl	ftl_memset
-	ldr	r3, .L1626+4
+	ldr	r3, .L1615+4
 	str	r7, [r4, #32]
 	str	r7, [r4, #28]
 	ldr	r2, [r3]
 	str	r3, [sp, #20]
 	str	r2, [r6, #8]
-	ldr	r2, .L1626+8
+	ldr	r2, .L1615+8
 	ldr	fp, [r2]
 	movw	r2, #65535
 	str	fp, [r6, #12]
@@ -11896,20 +11777,20 @@ FtlMapTblRecovery:
 	strh	r2, [r4, #2]	@ movhi
 	movs	r2, #1
 	str	r2, [r4, #36]
-.L1586:
+.L1575:
 	ldr	r3, [sp, #16]
 	sxth	r5, r7
 	cmp	r5, r3
-	bge	.L1605
+	bge	.L1594
 	ldr	r3, [sp, #16]
 	subs	r3, r3, #1
 	cmp	r5, r3
-	bne	.L1587
+	bne	.L1576
 	movs	r1, #1
 	ldrh	r0, [r8, r5, lsl #1]
 	bl	FtlGetLastWrittenPage
 	sxth	r3, r0
-	ldr	r6, .L1626
+	ldr	r6, .L1615
 	add	r10, r8, r5, lsl #1
 	strh	r7, [r4]	@ movhi
 	str	r3, [sp, #16]
@@ -11919,22 +11800,22 @@ FtlMapTblRecovery:
 	strh	r0, [r4, #2]	@ movhi
 	ldr	r3, [r3, r5, lsl #2]
 	str	r3, [r4, #28]
-.L1588:
+.L1577:
 	ldr	r3, [sp, #16]
 	sxth	r8, r7
 	cmp	r8, r3
-	ble	.L1591
-.L1605:
+	ble	.L1580
+.L1594:
 	mov	r0, r4
 	bl	ftl_free_no_use_map_blk
-	ldr	r3, .L1626+12
+	ldr	r3, .L1615+12
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1593
+	bne	.L1582
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L1593:
+.L1582:
 	mov	r0, r4
 	bl	ftl_map_blk_gc
 	mov	r0, r4
@@ -11943,9 +11824,9 @@ FtlMapTblRecovery:
 	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1591:
+.L1580:
 	ldrh	r2, [r10]
-	ldr	r0, .L1626
+	ldr	r0, .L1615
 	orr	r2, r8, r2, lsl #10
 	str	r2, [r6, #4]
 	movs	r2, #1
@@ -11954,34 +11835,34 @@ FtlMapTblRecovery:
 	ldr	r2, [r6, #12]
 	ldr	r2, [r2, #12]
 	str	r2, [sp, #20]
-	cbz	r2, .L1589
+	cbz	r2, .L1578
 	ldr	r1, [r6]
 	adds	r1, r1, #1
-	beq	.L1589
-	ldr	r3, .L1626+16
+	beq	.L1578
+	ldr	r3, .L1615+16
 	ldr	r0, [r6, #8]
 	ldrh	r1, [r3]
 	bl	js_hash
 	ldr	r2, [sp, #20]
 	cmp	r2, r0
-	beq	.L1589
+	beq	.L1578
 	str	r0, [sp, #4]
 	mov	r3, r8
 	str	r2, [sp]
 	mov	r2, r5
-	ldr	r1, .L1626+20
-	ldr	r0, .L1626+24
+	ldr	r1, .L1615+20
+	ldr	r0, .L1615+24
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r6]
-.L1589:
+.L1578:
 	ldr	r3, [r6]
 	adds	r3, r3, #1
-	beq	.L1590
+	beq	.L1579
 	ldrh	r3, [fp, #8]
 	ldr	r2, [sp, #12]
 	cmp	r2, r3
-	bls	.L1590
+	bls	.L1579
 	ldrh	r1, [fp]
 	ldrh	r2, [r4, #4]
 	cmp	r1, r2
@@ -11989,15 +11870,15 @@ FtlMapTblRecovery:
 	ldreq	r2, [r6, #4]
 	ldreq	r1, [sp, #8]
 	streq	r2, [r1, r3, lsl #2]
-.L1590:
+.L1579:
 	adds	r7, r7, #1
-	b	.L1588
-.L1587:
+	b	.L1577
+.L1576:
 	ldr	r3, [sp, #20]
-	ldr	r10, .L1626+12
+	ldr	r10, .L1615+12
 	ldrh	r2, [r8, r5, lsl #1]
 	ldr	r3, [r3]
-	ldr	r0, .L1626
+	ldr	r0, .L1615
 	str	r3, [r6, #8]
 	add	r3, r8, r5, lsl #1
 	str	r3, [sp, #28]
@@ -12010,25 +11891,25 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	r3, [r6]
 	adds	r3, r3, #1
-	beq	.L1607
+	beq	.L1596
 	ldrh	r2, [fp]
 	ldrh	r3, [r4, #4]
 	cmp	r2, r3
-	bne	.L1607
+	bne	.L1596
 	ldrh	r2, [fp, #8]
 	movw	r3, #64245
 	cmp	r2, r3
-	beq	.L1595
-.L1607:
-	mov	r10, #0
+	beq	.L1584
 .L1596:
-	ldr	r2, .L1626+12
+	mov	r10, #0
+.L1585:
+	ldr	r2, .L1615+12
 	sxth	r3, r10
 	ldrh	r2, [r2]
 	cmp	r3, r2
-	bge	.L1603
+	bge	.L1592
 	ldr	r2, [sp, #28]
-	ldr	r0, .L1626
+	ldr	r0, .L1615
 	str	r3, [sp, #36]
 	ldrh	r2, [r2]
 	orr	r2, r3, r2, lsl #10
@@ -12039,34 +11920,34 @@ FtlMapTblRecovery:
 	ldr	r2, [r6, #12]
 	ldr	r2, [r2, #12]
 	str	r2, [sp, #32]
-	cbz	r2, .L1600
+	cbz	r2, .L1589
 	ldr	r1, [r6]
 	adds	r1, r1, #1
-	beq	.L1600
-	ldr	r1, .L1626+16
+	beq	.L1589
+	ldr	r1, .L1615+16
 	ldr	r0, [r6, #8]
 	ldrh	r1, [r1]
 	bl	js_hash
 	ldr	r2, [sp, #32]
 	cmp	r2, r0
-	beq	.L1600
+	beq	.L1589
 	str	r0, [sp, #4]
 	str	r2, [sp]
 	mov	r2, r5
 	ldr	r3, [sp, #36]
-	ldr	r1, .L1626+20
-	ldr	r0, .L1626+28
+	ldr	r1, .L1615+20
+	ldr	r0, .L1615+28
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r6]
-.L1600:
+.L1589:
 	ldr	r3, [r6]
 	adds	r3, r3, #1
-	beq	.L1601
+	beq	.L1590
 	ldrh	r3, [fp, #8]
 	ldr	r2, [sp, #12]
 	cmp	r2, r3
-	bls	.L1601
+	bls	.L1590
 	ldrh	r1, [fp]
 	ldrh	r2, [r4, #4]
 	cmp	r1, r2
@@ -12074,45 +11955,45 @@ FtlMapTblRecovery:
 	ldreq	r2, [r6, #4]
 	ldreq	r1, [sp, #8]
 	streq	r2, [r1, r3, lsl #2]
-.L1601:
+.L1590:
 	add	r10, r10, #1
-	b	.L1596
-.L1595:
+	b	.L1585
+.L1584:
 	ldr	r3, [sp, #20]
 	movs	r1, #0
 	ldrh	r2, [r10]
 	ldr	r0, [r3]
 	add	lr, r2, #-1
-.L1597:
+.L1586:
 	sxth	r3, r1
 	cmp	r3, lr
-	blt	.L1599
-.L1603:
+	blt	.L1588
+.L1592:
 	adds	r7, r7, #1
-	b	.L1586
-.L1599:
+	b	.L1575
+.L1588:
 	lsls	r5, r3, #3
 	ldr	r3, [r0, r3, lsl #3]
 	ldr	r2, [sp, #12]
 	uxth	ip, r3
 	cmp	r2, ip
-	bls	.L1598
+	bls	.L1587
 	add	r5, r5, r0
 	ldr	r2, [sp, #8]
 	ldr	r5, [r5, #4]
 	str	r5, [r2, ip, lsl #2]
-.L1598:
+.L1587:
 	adds	r1, r1, #1
-	b	.L1597
-.L1627:
+	b	.L1586
+.L1616:
 	.align	2
-.L1626:
-	.word	.LANCHOR138
-	.word	.LANCHOR106
-	.word	.LANCHOR114
-	.word	.LANCHOR20
-	.word	.LANCHOR23
-	.word	.LANCHOR180
+.L1615:
+	.word	.LANCHOR137
+	.word	.LANCHOR105
+	.word	.LANCHOR113
+	.word	.LANCHOR19
+	.word	.LANCHOR22
+	.word	.LANCHOR179
 	.word	.LC47
 	.word	.LC48
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
@@ -12128,44 +12009,44 @@ FtlLoadVonderInfo:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L1629
-	ldr	r0, .L1629+4
+	ldr	r3, .L1618
+	ldr	r0, .L1618+4
 	ldrh	r3, [r3]
 	strh	r3, [r0, #10]	@ movhi
 	movw	r3, #61574
 	strh	r3, [r0, #4]	@ movhi
-	ldr	r3, .L1629+8
+	ldr	r3, .L1618+8
 	ldrh	r3, [r3]
 	strh	r3, [r0, #8]	@ movhi
-	ldr	r3, .L1629+12
+	ldr	r3, .L1618+12
 	ldrh	r3, [r3]
 	strh	r3, [r0, #6]	@ movhi
-	ldr	r3, .L1629+16
+	ldr	r3, .L1618+16
 	ldr	r3, [r3]
 	str	r3, [r0, #12]
-	ldr	r3, .L1629+20
+	ldr	r3, .L1618+20
 	ldr	r3, [r3]
 	str	r3, [r0, #16]
-	ldr	r3, .L1629+24
+	ldr	r3, .L1618+24
 	ldr	r3, [r3]
 	str	r3, [r0, #20]
-	ldr	r3, .L1629+28
+	ldr	r3, .L1618+28
 	ldr	r3, [r3]
 	str	r3, [r0, #24]
 	bl	FtlMapTblRecovery
 	movs	r0, #0
 	pop	{r3, pc}
-.L1630:
+.L1619:
 	.align	2
-.L1629:
+.L1618:
+	.word	.LANCHOR26
+	.word	.LANCHOR160
+	.word	.LANCHOR34
 	.word	.LANCHOR27
-	.word	.LANCHOR161
 	.word	.LANCHOR35
-	.word	.LANCHOR28
-	.word	.LANCHOR36
-	.word	.LANCHOR122
 	.word	.LANCHOR121
-	.word	.LANCHOR123
+	.word	.LANCHOR120
+	.word	.LANCHOR122
 	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
 	.section	.text.FtlLoadMapInfo,"ax",%progbits
 	.align	1
@@ -12180,14 +12061,14 @@ FtlLoadMapInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	FtlL2PDataInit
-	ldr	r0, .L1632
+	ldr	r0, .L1621
 	bl	FtlMapTblRecovery
 	movs	r0, #0
 	pop	{r3, pc}
-.L1633:
+.L1622:
 	.align	2
-.L1632:
-	.word	.LANCHOR129
+.L1621:
+	.word	.LANCHOR128
 	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
 	.section	.text.FtlSysBlkInit,"ax",%progbits
 	.align	1
@@ -12202,27 +12083,27 @@ FtlSysBlkInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r3, #0
-	ldr	r4, .L1647
+	ldr	r4, .L1636
 	strh	r3, [r4]	@ movhi
-	ldr	r3, .L1647+4
+	ldr	r3, .L1636+4
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlScanSysBlk
-	ldr	r3, .L1647+8
+	ldr	r3, .L1636+8
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1635
-.L1637:
+	bne	.L1624
+.L1626:
 	mov	r6, #-1
-.L1634:
+.L1623:
 	mov	r0, r6
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1635:
+.L1624:
 	bl	FtlLoadSysInfo
 	mov	r6, r0
 	cmp	r0, #0
-	bne	.L1637
+	bne	.L1626
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -12232,40 +12113,40 @@ FtlSysBlkInit:
 	bl	FtlPowerLostRecovery
 	movs	r0, #1
 	bl	FtlUpdateVaildLpn
-	ldr	r3, .L1647+12
+	ldr	r3, .L1636+12
 	movs	r0, #12
 	ldrh	r1, [r3]
-	ldr	r3, .L1647+16
+	ldr	r3, .L1636+16
 	ldr	r2, [r3]
 	mov	r3, r6
-.L1638:
+.L1627:
 	cmp	r3, r1
-	bge	.L1643
+	bge	.L1632
 	mla	r5, r0, r3, r2
 	ldr	r5, [r5, #4]
 	cmp	r5, #0
-	bge	.L1639
-.L1643:
-	ldr	r0, .L1647+20
+	bge	.L1628
+.L1632:
+	ldr	r0, .L1636+20
 	cmp	r3, r1
 	ldr	r2, [r0]
 	add	r2, r2, #32
 	str	r2, [r0]
-	bge	.L1645
-.L1640:
-	ldr	r5, .L1647+24
-	ldr	r4, .L1647+28
+	bge	.L1634
+.L1629:
+	ldr	r5, .L1636+24
+	ldr	r4, .L1636+28
 	mov	r0, r5
 	bl	FtlSuperblockPowerLostFix
 	mov	r0, r4
 	bl	FtlSuperblockPowerLostFix
-	ldr	r3, .L1647+32
+	ldr	r3, .L1636+32
 	ldrh	r1, [r5]
 	ldrh	r0, [r5, #4]
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
-	ldr	r0, .L1647+36
+	ldr	r0, .L1636+36
 	strh	r3, [r2, r1, lsl #1]	@ movhi
 	ldrh	r7, [r4, #4]
 	ldrh	r3, [r0]
@@ -12281,38 +12162,38 @@ FtlSysBlkInit:
 	strb	r3, [r4, #6]
 	strh	r3, [r4, #4]	@ movhi
 	strh	r2, [r4, #2]	@ movhi
-	ldr	r2, .L1647+40
+	ldr	r2, .L1636+40
 	ldrh	r3, [r2, #30]
 	adds	r3, r3, #1
 	strh	r3, [r2, #30]	@ movhi
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1646:
+.L1635:
 	bl	FtlVpcTblFlush
-	b	.L1634
-.L1639:
+	b	.L1623
+.L1628:
 	adds	r3, r3, #1
-	b	.L1638
-.L1645:
+	b	.L1627
+.L1634:
 	ldrh	r3, [r4]
 	cmp	r3, #0
-	bne	.L1640
+	bne	.L1629
 	bl	l2p_flush
-	b	.L1646
-.L1648:
+	b	.L1635
+.L1637:
 	.align	2
-.L1647:
-	.word	.LANCHOR156
-	.word	.LANCHOR4
-	.word	.LANCHOR139
-	.word	.LANCHOR33
-	.word	.LANCHOR55
-	.word	.LANCHOR83
+.L1636:
+	.word	.LANCHOR155
+	.word	.LANCHOR3
+	.word	.LANCHOR138
+	.word	.LANCHOR32
+	.word	.LANCHOR54
+	.word	.LANCHOR82
+	.word	.LANCHOR50
 	.word	.LANCHOR51
-	.word	.LANCHOR52
-	.word	.LANCHOR42
-	.word	.LANCHOR19
-	.word	.LANCHOR39
+	.word	.LANCHOR41
+	.word	.LANCHOR18
+	.word	.LANCHOR38
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.section	.text.ftl_low_format,"ax",%progbits
 	.align	1
@@ -12327,255 +12208,246 @@ ftl_low_format:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #0
-	ldr	r2, .L1673
-	ldr	r6, .L1673+4
+	ldr	r2, .L1662
+	ldr	r4, .L1662+4
 	str	r3, [r2]
-	ldr	r5, .L1673+8
-	ldr	r2, .L1673+12
-	ldrh	r0, [r6]
+	ldr	r5, .L1662+8
+	ldr	r2, .L1662+12
+	mov	r8, r4
+	ldrh	r0, [r4]
 	str	r3, [r5]
 	str	r3, [r2]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	r0, .L1650
+	cbz	r0, .L1639
 	bl	FtlMakeBbt
-.L1650:
-	ldr	r3, .L1673+16
-	ldr	r2, .L1673+20
-	ldr	ip, .L1673+104
+.L1639:
+	ldr	r3, .L1662+16
+	ldr	r2, .L1662+20
+	ldr	r7, .L1662+24
 	ldrh	r1, [r3]
 	ldr	r4, [r2]
-	ldr	r2, .L1673+24
+	ldr	r2, .L1662+28
 	str	r3, [sp, #4]
 	lsls	r1, r1, #7
-	ldr	r7, [r2]
+	ldr	r6, [r2]
 	movs	r2, #0
-.L1651:
+.L1640:
 	uxth	r3, r2
 	adds	r2, r2, #1
 	cmp	r3, r1
-	blt	.L1652
-	ldr	r3, .L1673+28
-	movs	r7, #0
-	ldr	r10, .L1673+108
-	ldrh	r4, [r3]
-	mov	r8, r3
-	mov	fp, r10
-.L1653:
-	ldrh	r3, [r10]
+	blt	.L1641
+	ldr	r7, .L1662+32
+	mov	r10, #0
+	ldr	r6, .L1662+36
+	ldrh	r4, [r7]
+	mov	fp, r6
+.L1642:
+	ldrh	r3, [r6]
 	cmp	r3, r4
-	bhi	.L1654
-	ldr	r4, .L1673+32
-	subs	r3, r7, #2
-	ldrh	r1, [r4]
+	bhi	.L1643
+	ldr	r6, .L1662+40
+	sub	r3, r10, #2
+	ldrh	r1, [r6]
 	cmp	r3, r1, lsl #1
-	bgt	.L1655
-.L1659:
-	movs	r6, #0
-	mov	r7, r6
-.L1656:
-	ldrh	r3, [r8]
-	uxth	r0, r6
-	adds	r6, r6, #1
+	bgt	.L1644
+.L1648:
+	movs	r4, #0
+	mov	r8, r4
+.L1645:
+	ldrh	r3, [r7]
+	uxth	r0, r4
+	adds	r4, r4, #1
 	cmp	r3, r0
-	bhi	.L1660
+	bhi	.L1649
 	ldrh	r2, [fp]
-	ldr	r3, .L1673+36
-	ldrh	r4, [r4]
-	ldr	r6, .L1673+40
+	ldr	r3, .L1662+44
+	ldrh	r4, [r6]
+	ldr	r6, .L1662+48
 	str	r2, [r3]
-	ldr	r3, .L1673+44
+	ldr	r3, .L1662+52
 	mov	r1, r4
+	ldr	r7, .L1662+56
 	ldr	r2, [r3]
 	mov	r0, r2
 	str	r2, [sp, #12]
 	bl	__aeabi_uidiv
 	ubfx	r10, r0, #5, #16
 	mov	r3, r0
-	str	r0, [r6]
 	add	r1, r10, #36
-	ldr	r0, .L1673+48
-	strh	r1, [r0]	@ movhi
+	str	r0, [r7]
+	strh	r1, [r6]	@ movhi
 	movs	r1, #24
 	muls	r1, r4, r1
-	str	r0, [sp]
-	cmp	r7, r1
-	ble	.L1661
+	cmp	r8, r1
+	ble	.L1650
 	ldr	r2, [sp, #12]
 	mov	r1, r4
-	str	r3, [sp, #8]
-	subs	r0, r2, r7
+	str	r0, [sp, #8]
+	sub	r0, r2, r8
 	bl	__aeabi_uidiv
-	ldr	r3, [sp]
-	str	r0, [r6]
+	ldr	r3, [sp, #8]
+	str	r0, [r7]
 	lsrs	r0, r0, #5
 	adds	r0, r0, #24
-	strh	r0, [r3]	@ movhi
-	ldr	r3, [sp, #8]
-.L1661:
-	ldr	r2, .L1673+52
+	strh	r0, [r6]	@ movhi
+.L1650:
+	ldr	r2, .L1662+60
 	ldrh	r2, [r2]
-	cbz	r2, .L1663
-	ldr	r1, .L1673+48
-	ldrh	r0, [r1]
-	add	r0, r0, r2, lsr #1
-	strh	r0, [r1]	@ movhi
-	mul	r0, r4, r2
-	cmp	r7, r0
+	cbz	r2, .L1652
+	ldrh	r1, [r6]
+	add	r1, r1, r2, lsr #1
+	strh	r1, [r6]	@ movhi
+	mul	r1, r4, r2
+	cmp	r8, r1
 	itttt	lt
 	addlt	r2, r2, #32
-	strlt	r3, [r6]
+	strlt	r3, [r7]
 	addlt	r2, r2, r10
-	strhlt	r2, [r1]	@ movhi
-.L1663:
-	ldr	r3, [sp]
-	ldr	r7, .L1673+56
-	ldr	r10, .L1673+112
-	ldrh	r2, [r3]
-	ldr	r3, [r6]
+	strhlt	r2, [r6]	@ movhi
+.L1652:
+	ldrh	r2, [r6]
+	ldr	r3, [r7]
+	ldr	r6, .L1662+64
 	subs	r3, r3, r2
 	muls	r4, r3, r4
-	ldr	r3, .L1673+60
+	ldr	r3, .L1662+68
 	ldrh	r3, [r3]
-	str	r4, [r7]
+	str	r4, [r6]
 	muls	r4, r3, r4
 	ldr	r3, [sp, #4]
 	ldrh	r3, [r3]
-	str	r4, [r6]
-	ldr	r6, .L1673+64
+	str	r4, [r7]
+	ldr	r7, .L1662+72
 	muls	r4, r3, r4
-	ldr	r3, .L1673+68
+	ldr	r3, .L1662+76
 	str	r4, [r3]
-	movw	r4, #65535
 	bl	FtlBbmTblFlush
 	ldrh	r2, [fp]
 	movs	r1, #0
-	ldr	r0, [r10]
+	ldr	r0, [r7]
+	ldr	r4, .L1662+80
 	lsls	r2, r2, #1
+	mov	r10, r4
 	bl	ftl_memset
-	ldr	r2, .L1673+72
+	ldr	r2, .L1662+84
 	movs	r3, #0
-	strh	r3, [r6, #2]	@ movhi
-	movs	r1, #255
-	strb	r3, [r6, #6]
+	movw	r1, #65535
+	strh	r3, [r4, #2]	@ movhi
+	mov	r8, r1
+	strb	r3, [r4, #6]
 	str	r3, [r2]
-	ldr	r2, .L1673+76
-	strh	r3, [r6]	@ movhi
+	ldr	r2, .L1662+88
+	strh	r3, [r4]	@ movhi
 	strh	r3, [r2, #2]	@ movhi
 	strb	r3, [r2, #6]
 	strb	r3, [r2, #8]
 	movs	r3, #1
-	strh	r4, [r2]	@ movhi
-	ldrh	r2, [r8]
-	mov	r8, r10
-	strb	r3, [r6, #8]
-	mov	r10, r6
-	ldr	r3, .L1673+80
-	lsrs	r2, r2, #3
-	ldr	r0, [r3]
-	bl	ftl_memset
-.L1665:
+	strh	r1, [r2]	@ movhi
+	strb	r3, [r4, #8]
+.L1654:
 	mov	r0, r10
 	bl	make_superblock
-	ldrb	r3, [r6, #7]	@ zero_extendqisi2
-	ldrh	r2, [r6]
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	ldrh	r2, [r4]
 	cmp	r3, #0
-	bne	.L1666
-	ldr	r3, [r8]
-	strh	r4, [r3, r2, lsl #1]	@ movhi
-	ldrh	r3, [r6]
+	bne	.L1655
+	ldr	r3, [r7]
+	strh	r8, [r3, r2, lsl #1]	@ movhi
+	ldrh	r3, [r4]
 	adds	r3, r3, #1
-	strh	r3, [r6]	@ movhi
-	b	.L1665
-.L1652:
+	strh	r3, [r4]	@ movhi
+	b	.L1654
+.L1641:
 	mvns	r0, r3
 	orr	r0, r3, r0, lsl #16
 	str	r0, [r4, r3, lsl #2]
-	str	ip, [r7, r3, lsl #2]
-	b	.L1651
-.L1654:
+	str	r7, [r6, r3, lsl #2]
+	b	.L1640
+.L1643:
 	mov	r0, r4
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
 	adds	r4, r4, #1
-	add	r7, r7, r0
-	uxth	r7, r7
+	add	r10, r10, r0
+	uxth	r10, r10
 	uxth	r4, r4
-	b	.L1653
-.L1655:
-	mov	r0, r7
+	b	.L1642
+.L1644:
+	mov	r0, r10
 	bl	__aeabi_uidiv
-	ldr	r3, .L1673+84
+	ldr	r3, .L1662+92
 	ldr	r3, [r3]
 	add	r0, r0, r3
 	uxth	r0, r0
 	bl	FtlSysBlkNumInit
-	ldrh	r0, [r6]
+	ldrh	r0, [r8]
 	bl	FtlFreeSysBlkQueueInit
-	ldrh	r6, [r8]
-.L1657:
+	ldrh	r4, [r7]
+.L1646:
 	ldrh	r3, [fp]
-	cmp	r3, r6
-	bls	.L1659
-	mov	r0, r6
+	cmp	r3, r4
+	bls	.L1648
+	mov	r0, r4
 	movs	r1, #1
-	adds	r6, r6, #1
+	adds	r4, r4, #1
 	bl	FtlLowFormatEraseBlock
-	uxth	r6, r6
-	b	.L1657
-.L1660:
+	uxth	r4, r4
+	b	.L1646
+.L1649:
 	movs	r1, #0
 	bl	FtlLowFormatEraseBlock
-	add	r7, r7, r0
-	uxth	r7, r7
-	b	.L1656
-.L1666:
+	add	r8, r8, r0
+	uxth	r8, r8
+	b	.L1645
+.L1655:
 	ldr	r3, [r5]
-	ldrh	r1, [r6, #4]
-	ldr	r4, .L1673+88
-	str	r3, [r6, #12]
+	movw	r8, #65535
+	ldrh	r1, [r4, #4]
+	str	r3, [r4, #12]
 	adds	r3, r3, #1
 	str	r3, [r5]
-	ldr	r3, [r8]
-	mov	r10, r4
+	ldr	r3, [r7]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	movs	r3, #0
-	strh	r3, [r4, #2]	@ movhi
-	strb	r3, [r4, #6]
-	ldrh	r3, [r6]
-	movw	r6, #65535
-	adds	r3, r3, #1
-	strh	r3, [r4]	@ movhi
-	movs	r3, #1
-	strb	r3, [r4, #8]
-.L1667:
+	movs	r2, #0
+	ldr	r3, .L1662+96
+	strh	r2, [r3, #2]	@ movhi
+	mov	r10, r3
+	strb	r2, [r3, #6]
+	ldrh	r2, [r4]
+	mov	r4, r3
+	adds	r2, r2, #1
+	strh	r2, [r3]	@ movhi
+	movs	r2, #1
+	strb	r2, [r3, #8]
+.L1656:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r4]
-	cbnz	r3, .L1668
-	ldr	r3, [r8]
-	strh	r6, [r3, r2, lsl #1]	@ movhi
+	cbnz	r3, .L1657
+	ldr	r3, [r7]
+	strh	r8, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	b	.L1667
-.L1668:
+	b	.L1656
+.L1657:
 	ldr	r3, [r5]
 	ldrh	r1, [r4, #4]
 	str	r3, [r4, #12]
 	adds	r3, r3, #1
 	str	r3, [r5]
 	movw	r4, #65535
-	ldr	r3, [r8]
+	ldr	r3, [r7]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L1673+92
+	ldr	r3, .L1662+100
 	strh	r4, [r3]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L1673+96
+	ldr	r3, .L1662+104
 	movs	r2, #0
 	strh	r2, [r3, #2]	@ movhi
-	ldr	r2, [r7]
+	ldr	r2, [r6]
 	strh	r0, [r3]	@ movhi
 	strh	r4, [r3, #4]	@ movhi
 	strh	r2, [r3, #6]	@ movhi
@@ -12585,47 +12457,46 @@ ftl_low_format:
 	str	r2, [r5]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	r0, .L1669
-	ldr	r3, .L1673+100
+	cbnz	r0, .L1658
+	ldr	r3, .L1662+108
 	movs	r2, #1
 	str	r2, [r3]
-.L1669:
+.L1658:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1674:
+.L1663:
 	.align	2
-.L1673:
-	.word	.LANCHOR83
-	.word	.LANCHOR4
+.L1662:
 	.word	.LANCHOR82
-	.word	.LANCHOR143
-	.word	.LANCHOR12
+	.word	.LANCHOR3
+	.word	.LANCHOR81
+	.word	.LANCHOR142
+	.word	.LANCHOR11
+	.word	.LANCHOR108
+	.word	168778952
 	.word	.LANCHOR109
-	.word	.LANCHOR110
+	.word	.LANCHOR4
 	.word	.LANCHOR5
-	.word	.LANCHOR3
-	.word	.LANCHOR99
-	.word	.LANCHOR152
-	.word	.LANCHOR7
-	.word	.LANCHOR171
-	.word	.LANCHOR15
-	.word	.LANCHOR179
-	.word	.LANCHOR19
+	.word	.LANCHOR2
+	.word	.LANCHOR98
+	.word	.LANCHOR170
+	.word	.LANCHOR6
+	.word	.LANCHOR151
+	.word	.LANCHOR14
+	.word	.LANCHOR178
+	.word	.LANCHOR18
+	.word	.LANCHOR41
+	.word	.LANCHOR33
+	.word	.LANCHOR50
+	.word	.LANCHOR58
+	.word	.LANCHOR144
+	.word	.LANCHOR30
 	.word	.LANCHOR51
-	.word	.LANCHOR34
-	.word	.LANCHOR59
-	.word	.LANCHOR145
-	.word	.LANCHOR1
-	.word	.LANCHOR31
 	.word	.LANCHOR52
-	.word	.LANCHOR53
-	.word	.LANCHOR139
-	.word	.LANCHOR166
-	.word	168778952
-	.word	.LANCHOR6
-	.word	.LANCHOR42
+	.word	.LANCHOR138
+	.word	.LANCHOR165
 	.size	ftl_low_format, .-ftl_low_format
 	.section	.text.sftl_init,"ax",%progbits
 	.align	1
@@ -12640,46 +12511,46 @@ sftl_init:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
 	mov	r3, #-1
-	ldr	r4, .L1687
+	ldr	r4, .L1676
 	movs	r6, #0
-	ldr	r1, .L1687+4
-	ldr	r0, .L1687+8
+	ldr	r1, .L1676+4
+	ldr	r0, .L1676+8
 	str	r3, [r4]
 	bl	printf
-	ldr	r0, .L1687+12
+	ldr	r0, .L1676+12
 	bl	FtlConstantsInit
-	ldr	r5, .L1687+16
+	ldr	r5, .L1676+16
 	bl	FtlMemInit
 	bl	FtlVariablesInit
-	ldr	r3, .L1687+20
+	ldr	r3, .L1676+20
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
-.L1676:
+.L1665:
 	bl	FtlLoadBbt
-	cbz	r0, .L1677
-.L1686:
+	cbz	r0, .L1666
+.L1675:
 	ldr	r3, [r5]
 	cmp	r3, #1
-	bne	.L1676
+	bne	.L1665
 	str	r6, [r5]
 	bl	ftl_low_format
-	b	.L1676
-.L1677:
+	b	.L1665
+.L1666:
 	bl	FtlSysBlkInit
 	cmp	r0, #0
-	bne	.L1686
+	bne	.L1675
 	movs	r3, #1
 	str	r3, [r4]
 	pop	{r4, r5, r6, pc}
-.L1688:
+.L1677:
 	.align	2
-.L1687:
-	.word	.LANCHOR166
+.L1676:
+	.word	.LANCHOR165
 	.word	.LC49
 	.word	.LC38
 	.word	.LANCHOR0
-	.word	.LANCHOR181
-	.word	.LANCHOR4
+	.word	.LANCHOR180
+	.word	.LANCHOR3
 	.size	sftl_init, .-sftl_init
 	.section	.text.FtlWriteToIDB,"ax",%progbits
 	.align	1
@@ -12690,416 +12561,411 @@ sftl_init:
 	.fpu softvfp
 	.type	FtlWriteToIDB, %function
 FtlWriteToIDB:
-	@ args = 0, pretend = 0, frame = 104
+	@ args = 0, pretend = 0, frame = 96
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	add	r8, r1, r0
-	add	r10, r8, #-1
-	sub	sp, sp, #112
-	cmp	r10, #63
+	adds	r7, r1, r0
+	add	r8, r7, #-1
+	sub	sp, sp, #104
+	cmp	r8, #63
 	mov	r4, r0
-	mov	r6, r1
-	mov	r7, r2
-	ldr	r5, .L1759
-	bls	.L1690
+	mov	r5, r1
+	mov	r6, r2
+	ldr	r10, .L1746+16
+	bls	.L1679
 	cmp	r0, #576
-	bcc	.L1691
-.L1690:
-	ldr	r3, [r5]
-	cbnz	r3, .L1692
-.L1758:
+	bcc	.L1680
+.L1679:
+	ldr	r3, [r10]
+	cbnz	r3, .L1681
+.L1745:
 	movs	r4, #0
-	b	.L1689
-.L1692:
-	ldr	r3, .L1759+4
-	ldr	r3, [r3]
-	ldr	r2, [r3]
-	str	r3, [sp, #12]
-	ldr	r3, .L1759+8
+	b	.L1678
+.L1681:
+	ldr	r3, .L1746
+	ldr	fp, [r3]
+	ldr	r3, .L1746+4
+	ldr	r2, [fp]
 	cmp	r2, r3
-	bne	.L1694
-	ldr	r3, .L1759+12
+	bne	.L1683
+	ldr	r3, .L1746+8
+	add	r0, fp, #260096
 	movs	r2, #0
 	ldrh	r1, [r3, #10]
-	ldr	r3, [sp, #12]
-	add	r0, r3, #262144
-	movw	r3, #65535
-.L1698:
-	ldr	r4, [r0, #-4]
-	cbnz	r4, .L1695
-	ldr	r4, [sp, #12]
-	subs	r3, r3, #1
-	ldr	r4, [r4, r2, lsl #2]
+	movw	r3, #65023
+.L1687:
+	ldr	r4, [r0, #-4]!
+	cbnz	r4, .L1684
+	ldr	r4, [fp, r2, lsl #2]
 	adds	r2, r2, #1
 	cmp	r2, #4096
+	add	r3, r3, #-1
 	it	hi
 	movhi	r2, #0
 	cmp	r3, #4096
-	str	r4, [r0, #-4]!
-	bne	.L1698
+	str	r4, [r0, #2048]
+	bne	.L1687
 	mov	r3, #512
-	b	.L1755
-.L1695:
+	b	.L1742
+.L1684:
 	adds	r3, r3, #127
 	lsrs	r3, r3, #7
-.L1755:
-	str	r3, [sp, #16]
+.L1742:
+	str	r3, [sp, #8]
 	lsls	r1, r1, #2
-	ldr	r3, [sp, #16]
+	ldr	r3, [sp, #8]
 	uxth	r1, r1
-	ldr	r4, .L1759+16
 	adds	r0, r3, #4
 	bl	__aeabi_uidiv
 	adds	r3, r0, #1
-	str	r3, [sp, #24]
-	ldr	r3, [sp, #16]
+	ldr	r1, [sp, #8]
+	mov	r2, r3
+	ldr	r0, .L1746+12
+	str	r3, [sp, #16]
+	bl	printf
+	ldr	r3, [sp, #8]
 	lsls	r3, r3, #7
-	str	r3, [sp, #36]
+	str	r3, [sp, #32]
 	movs	r3, #0
-	mov	r10, r3
 	str	r3, [sp, #20]
-.L1720:
-	ldr	r3, .L1759+20
+.L1744:
+	str	r3, [sp, #12]
+	ldr	r2, [sp, #12]
+	ldr	r3, [sp, #16]
+	add	r3, r3, r2
+	cmp	r3, #8
+	str	r3, [sp, #28]
+	bls	.L1710
+	ldr	r3, [sp, #20]
+	cbnz	r3, .L1711
+.L1683:
+	mov	r3, #-1
+	str	r3, [sp, #8]
+.L1711:
+	ldr	r3, .L1746+16
+	movs	r2, #0
+	ldr	r4, [sp, #8]
+	str	r2, [r3]
+	ldr	r3, .L1746
+	ldr	r0, [r3]
+	bl	free
+	ldr	r3, .L1746+20
+	ldr	r0, [r3]
+	bl	free
+.L1678:
+	mov	r0, r4
+	add	sp, sp, #104
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1710:
+	ldr	r3, .L1746+20
 	mov	r2, #512
 	movs	r1, #0
 	ldr	r0, [r3]
 	bl	memset
-	ldr	r3, .L1759+12
-	ldrh	r6, [r3, #10]
-	ldr	r3, [r4, #16]
-	mul	fp, r10, r6
-	cmp	r3, #0
-	beq	.L1728
-	ldr	r3, [r4, #20]
+	ldr	r3, .L1746+8
+	ldrh	r5, [r3, #10]
+	ldr	r3, [sp, #12]
+	muls	r3, r5, r3
+	str	r3, [sp, #24]
+	ldr	r3, .L1746+24
+	ldr	r2, [r3, #16]
+	cmp	r2, #0
+	beq	.L1718
+	ldr	r3, [r3, #20]
 	cmp	r3, #0
 	ite	eq
-	moveq	r3, #6
-	movne	r3, #9
-.L1756:
-	str	r3, [sp, #28]
-	mov	r1, fp
-	ldr	r3, .L1759+16
-	movs	r0, #0
-	ldr	r3, [r3, #4]
-	blx	r3
-	ldr	r3, [sp, #24]
-	cmp	r3, #1
-	beq	.L1700
-	ldr	r3, .L1759+16
-	add	r1, r6, fp
+	moveq	r6, #6
+	movne	r6, #9
+.L1689:
+	ldr	r7, [sp, #24]
+	movs	r4, #0
+	ldr	r8, .L1746+24
+.L1690:
+	mov	r1, r7
+	ldr	r3, [r8, #4]
 	movs	r0, #0
-	ldr	r3, [r3, #4]
+	adds	r4, r4, #1
 	blx	r3
-.L1700:
-	ldr	r3, [sp, #28]
-	cmp	r3, #9
-	bne	.L1730
-	ldr	r3, .L1759+20
+	ldr	r3, [sp, #16]
+	add	r7, r7, r5
+	cmp	r3, r4
+	bhi	.L1690
+	cmp	r6, #9
+	bne	.L1720
+	ldr	r3, .L1746+20
 	mov	r2, #1024
 	movs	r1, #0
-	ldr	r5, [r3]
-	mov	r0, r5
+	ldr	r4, [r3]
+	mov	r0, r4
 	bl	ftl_memset
 	movs	r2, #4
-	ldr	r3, .L1759+24
-	strb	r2, [r5, #17]
+	ldr	r3, .L1746+28
+	strb	r2, [r4, #17]
 	movs	r1, #12
-	ldr	r2, .L1759+12
-	adds	r0, r5, r1
-	str	r3, [r5]
+	ldr	r2, .L1746+8
+	adds	r0, r4, r1
+	str	r3, [r4]
 	movs	r3, #0
-	str	r1, [r5, #4]
+	str	r1, [r4, #4]
 	ldrh	r2, [r2, #10]
-	str	r3, [r5, #12]
-	strb	r3, [r5, #16]
-	strh	r2, [r5, #18]	@ movhi
+	str	r3, [r4, #12]
+	strb	r3, [r4, #16]
+	strh	r2, [r4, #18]	@ movhi
 	movs	r2, #16
-	strb	r3, [r5, #20]
-	strb	r2, [r5, #21]
-	strh	r3, [r5, #22]	@ movhi
+	strb	r3, [r4, #20]
+	strb	r2, [r4, #21]
+	strh	r3, [r4, #22]	@ movhi
 	bl	js_hash
-	str	r0, [r5, #8]
-.L1701:
-	ldr	r3, [sp, #24]
-	mov	r8, fp
-	muls	r3, r6, r3
-	movs	r6, #0
+	str	r0, [r4, #8]
+.L1691:
+	ldr	r3, [sp, #16]
+	mov	r10, fp
+	ldr	r8, .L1746+24
+	muls	r3, r5, r3
+	movs	r5, #0
+	str	r3, [sp, #36]
+.L1692:
+	ldr	r3, [sp, #36]
+	cmp	r5, r3
+	beq	.L1699
+	cmp	r6, #9
+	ite	ne
+	lslne	r3, r5, #2
+	addeq	r3, r5, #1
 	str	r3, [sp, #40]
-	ldr	r3, [sp, #12]
-	str	r3, [sp, #32]
-.L1702:
-	ldr	r3, [sp, #40]
-	cmp	r6, r3
-	beq	.L1709
-	ldr	r3, [sp, #28]
-	cmp	r3, #9
-	itet	ne
-	addne	r3, fp, r6
-	addeq	r3, r8, #1
-	lslne	r3, r3, #2
-	str	r3, [sp, #48]
 	movw	r3, #61424
-	str	r3, [sp, #52]
-	cmp	r6, #0
-	bne	.L1705
-	ldr	r3, [sp, #28]
-	cmp	r3, #9
-	bne	.L1705
-	ldr	r3, [r4, #16]
+	str	r3, [sp, #44]
+	cmp	r5, #0
+	bne	.L1695
+	cmp	r6, #9
+	bne	.L1695
+	ldr	r3, [r8, #16]
 	movs	r0, #70
 	blx	r3
-	add	r3, sp, #48
-	mov	r2, r5
-	mov	r1, fp
-	mov	r0, r6
-	ldr	r7, [r4, #8]
+	ldr	r7, [r8, #8]
+	add	r3, sp, #40
+	mov	r2, r4
+	ldr	r1, [sp, #24]
+	mov	r0, r5
 	blx	r7
-	ldr	r2, .L1759+12
-	str	r0, [sp, #44]
-	ldr	r3, [r4, #16]
+	ldr	r2, .L1746+8
+	mov	r7, r0
+	ldr	r3, [r8, #16]
 	ldrb	r0, [r2, #22]	@ zero_extendqisi2
 	blx	r3
-	ldr	r2, [sp, #44]
-	adds	r2, r2, #1
-	bne	.L1706
-.L1709:
-	ldr	r3, .L1759+20
-	ldr	r2, [r4, #16]
-	ldr	r6, [r3]
-	ldr	r3, .L1759+12
-	ldrb	r3, [r3, #14]	@ zero_extendqisi2
-	str	r3, [sp, #28]
-	ldr	r3, .L1759+12
+	adds	r7, r7, #1
+	bne	.L1696
+.L1699:
+	ldr	r3, .L1746+20
+	ldr	r7, [r3]
+	ldr	r3, .L1746+8
+	ldrb	r2, [r3, #14]	@ zero_extendqisi2
 	ldrh	r3, [r3, #10]
-	mul	r8, r10, r3
-	cmp	r2, #0
-	bne	.L1707
-	mov	fp, #6
-.L1708:
-	ldr	r2, [sp, #24]
-	movs	r5, #0
+	str	r2, [sp, #24]
+	ldr	r2, [sp, #12]
+	mul	r10, r3, r2
+	ldr	r2, .L1746+24
+	ldr	r1, [r2, #16]
+	cmp	r1, #0
+	bne	.L1697
+	mov	r8, #6
+.L1698:
+	ldr	r2, [sp, #16]
+	movs	r4, #0
+	ldr	r5, .L1746+24
 	muls	r3, r2, r3
-	str	r3, [sp, #32]
-.L1711:
-	ldr	r3, [sp, #32]
-	cmp	r5, r3
-	beq	.L1715
-	cmp	r5, #0
-	bne	.L1712
-	cmp	fp, #9
-	bne	.L1712
-	ldr	r3, [r4, #16]
+	str	r3, [sp, #36]
+.L1701:
+	ldr	r3, [sp, #36]
+	cmp	r4, r3
+	beq	.L1705
+	cmp	r4, #0
+	bne	.L1702
+	cmp	r8, #9
+	bne	.L1702
+	ldr	r3, [r5, #16]
 	movs	r0, #70
 	blx	r3
-	ldr	r3, [r4, #20]
+	ldr	r3, [r5, #20]
 	movs	r0, #2
 	blx	r3
-	mov	r2, r6
-	mov	r1, r8
-	add	r3, sp, #48
-	mov	r0, r5
-	ldr	r7, [r4, #12]
-	blx	r7
-	ldr	r3, [r4, #20]
-	ldr	r0, [sp, #28]
+	mov	r2, r7
+	mov	r1, r10
+	add	r3, sp, #40
+	mov	r0, r4
+	ldr	r6, [r5, #12]
+	blx	r6
+	ldr	r3, [r5, #20]
+	ldr	r0, [sp, #24]
 	blx	r3
-	ldr	r2, .L1759+12
-	ldr	r3, [r4, #16]
+	ldr	r2, .L1746+8
+	ldr	r3, [r5, #16]
 	ldrb	r0, [r2, #22]	@ zero_extendqisi2
 	blx	r3
-	ldr	r3, [r6]
-	ldr	r2, .L1759+24
+	ldr	r3, [r7]
+	ldr	r2, .L1746+28
 	cmp	r3, r2
-	beq	.L1713
-.L1715:
-	ldr	r3, .L1759+20
-	movs	r5, #0
-	ldr	r1, [sp, #12]
+	beq	.L1703
+.L1705:
+	ldr	r3, .L1746+20
+	mov	r1, fp
+	movs	r4, #0
 	ldr	r0, [r3]
-.L1714:
-	mov	r8, r1
-	ldr	r2, [r0, r5, lsl #2]
-	ldr	r3, [r8]
-	lsls	r6, r5, #2
+.L1704:
+	mov	r6, r1
+	ldr	r2, [r0, r4, lsl #2]
+	ldr	r3, [r6]
+	lsls	r5, r4, #2
 	adds	r1, r1, #4
 	cmp	r2, r3
-	beq	.L1717
+	beq	.L1707
 	mov	r2, #512
 	movs	r1, #0
 	bl	memset
-	ldr	r3, .L1759+20
-	mov	r1, r10
-	ldr	r0, .L1759+28
+	ldr	r3, .L1746+20
+	ldr	r1, [sp, #12]
+	ldr	r0, .L1746+32
 	ldr	r2, [r3]
-	str	r5, [sp]
-	ldr	r3, [r8]
-	ldr	r2, [r2, r6]
+	str	r4, [sp]
+	ldr	r3, [r6]
+	ldr	r2, [r2, r5]
 	bl	printf
-	ldr	r3, .L1759+12
+	ldr	r3, .L1746+8
 	movs	r0, #0
+	ldr	r2, [sp, #12]
 	ldrh	r1, [r3, #10]
-	ldr	r3, [r4, #4]
-	mul	r1, r10, r1
+	ldr	r3, .L1746+24
+	muls	r2, r1, r2
+	ldr	r3, [r3, #4]
+	mov	r1, r2
 	blx	r3
+.L1708:
+	ldr	r3, [sp, #28]
+	b	.L1744
 .L1718:
-	ldr	r3, [sp, #24]
-	add	r10, r10, r3
-	cmp	r10, #7
-	bls	.L1720
-	ldr	r3, [sp, #20]
-	cbnz	r3, .L1721
-.L1694:
-	mov	r3, #-1
-	str	r3, [sp, #16]
-.L1721:
-	ldr	r3, .L1759
-	movs	r2, #0
-	ldr	r4, [sp, #16]
-	str	r2, [r3]
-	ldr	r3, .L1759+4
-	ldr	r0, [r3]
-	bl	free
-	ldr	r3, .L1759+20
-	ldr	r0, [r3]
-	bl	free
-.L1689:
-	mov	r0, r4
-	add	sp, sp, #112
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1728:
-	movs	r3, #6
-	b	.L1756
-.L1730:
-	movs	r5, #0
-	b	.L1701
-.L1705:
-	add	r3, sp, #48
-	ldr	r2, [sp, #32]
-	mov	r1, r8
+	movs	r6, #6
+	b	.L1689
+.L1720:
+	movs	r4, #0
+	b	.L1691
+.L1695:
+	ldr	r1, [sp, #24]
+	add	r3, sp, #40
+	ldr	r7, [r8, #8]
+	mov	r2, r10
 	movs	r0, #0
-	ldr	r7, [r4, #8]
+	add	r1, r1, r5
 	blx	r7
 	adds	r0, r0, #1
-	beq	.L1709
-	ldr	r3, [sp, #32]
-	add	r3, r3, #2048
-	str	r3, [sp, #32]
-.L1706:
-	adds	r6, r6, #1
-	add	r8, r8, #1
-	b	.L1702
-.L1707:
-	ldr	r2, [r4, #20]
+	beq	.L1699
+	add	r10, r10, #2048
+.L1696:
+	adds	r5, r5, #1
+	b	.L1692
+.L1697:
+	ldr	r2, [r2, #20]
 	cmp	r2, #0
 	ite	eq
-	moveq	fp, #6
-	movne	fp, #9
-	b	.L1708
-.L1712:
-	add	r3, sp, #48
-	mov	r2, r6
-	add	r1, r8, r5
+	moveq	r8, #6
+	movne	r8, #9
+	b	.L1698
+.L1702:
+	add	r3, sp, #40
+	mov	r2, r7
+	add	r1, r10, r4
 	movs	r0, #0
-	ldr	r7, [r4, #12]
-	blx	r7
+	ldr	r6, [r5, #12]
+	blx	r6
 	adds	r0, r0, #1
-	beq	.L1715
-	ldr	r2, [sp, #52]
+	beq	.L1705
+	ldr	r2, [sp, #44]
 	movw	r3, #61424
 	cmp	r2, r3
-	bne	.L1715
-	add	r6, r6, #2048
-.L1713:
-	adds	r5, r5, #1
+	bne	.L1705
+	add	r7, r7, #2048
+.L1703:
+	adds	r4, r4, #1
+	b	.L1701
+.L1707:
+	ldr	r3, [sp, #32]
+	adds	r4, r4, #1
+	cmp	r4, r3
+	bne	.L1704
+	ldr	r3, [sp, #20]
+	adds	r3, r3, #1
+	cmp	r3, #5
+	str	r3, [sp, #20]
+	bls	.L1708
 	b	.L1711
-.L1760:
+.L1747:
 	.align	2
-.L1759:
+.L1746:
 	.word	.LANCHOR182
-	.word	.LANCHOR183
 	.word	-52655045
 	.word	.LANCHOR0
-	.word	.LANCHOR78
-	.word	.LANCHOR184
-	.word	1179535694
 	.word	.LC50
-.L1717:
-	ldr	r3, [sp, #36]
-	adds	r5, r5, #1
-	cmp	r5, r3
-	bne	.L1714
-	ldr	r3, [sp, #20]
-	adds	r3, r3, #1
-	cmp	r3, #5
-	str	r3, [sp, #20]
-	bls	.L1718
-	b	.L1721
-.L1691:
+	.word	.LANCHOR181
+	.word	.LANCHOR183
+	.word	.LANCHOR77
+	.word	1179535694
+	.word	.LC51
+.L1680:
 	cmp	r0, #64
-	bne	.L1722
-	ldr	fp, .L1761+4
+	bne	.L1712
+	ldr	fp, .L1748+4
 	mov	r0, #262144
 	bl	ftl_malloc
 	str	r0, [fp]
 	mov	r0, #262144
 	bl	ftl_malloc
-	ldr	r3, .L1761
+	ldr	r3, .L1748
 	str	r0, [r3]
 	ldr	r3, [fp]
-	cbz	r3, .L1723
-	cbz	r0, .L1723
+	cbz	r3, .L1713
+	cbz	r0, .L1713
 	movs	r2, #1
 	movs	r1, #0
-	str	r2, [r5]
+	str	r2, [r10]
 	mov	r0, r3
 	mov	r2, #262144
 	bl	ftl_memset
-.L1722:
-	ldr	r3, [r5]
+.L1712:
+	ldr	r3, [r10]
 	cmp	r3, #0
-	beq	.L1758
-	ldr	r3, .L1761+4
+	beq	.L1745
+	ldr	r3, .L1748+4
 	cmp	r4, #63
-	iteee	hi
-	ldrhi	r5, .L1761+8
-	rsbls	r4, r4, #64
-	subls	r6, r6, r4
-	addls	r7, r7, r4, lsl #9
-	ldr	r1, [r3]
-	mov	r2, #262144
-	it	hi
-	addhi	r5, r5, r4
-	ldr	r0, .L1761+12
-	ite	ls
-	movls	r5, r1
-	addhi	r5, r1, r5, lsl #9
-	cmp	r10, #576
+	itett	ls
+	rsbls	r1, r4, #64
+	movhi	r1, r6
+	subls	r5, r5, r1
+	addls	r1, r6, r1, lsl #9
+	ldr	r0, [r3]
+	ittt	hi
+	ldrhi	r3, .L1748+8
+	addhi	r3, r3, r4
+	addhi	r0, r0, r3, lsl #9
+	cmp	r8, #576
 	itt	cs
-	subcs	r6, r6, r8
-	subcs	r6, r6, #446
-	mov	r3, r5
-	str	r6, [sp]
-	bl	printf
-	lsls	r2, r6, #9
-	mov	r1, r7
-	mov	r0, r5
+	subcs	r5, r5, r7
+	subcs	r5, r5, #446
+	lsls	r2, r5, #9
 	bl	ftl_memcpy
-	b	.L1758
-.L1723:
-	ldr	r1, .L1761+16
-	ldr	r0, .L1761+20
+	b	.L1745
+.L1713:
+	ldr	r1, .L1748+12
+	ldr	r0, .L1748+16
 	bl	printf
-	b	.L1722
-.L1762:
+	b	.L1712
+.L1749:
 	.align	2
-.L1761:
-	.word	.LANCHOR184
+.L1748:
 	.word	.LANCHOR183
+	.word	.LANCHOR182
 	.word	8388544
+	.word	.LANCHOR184
 	.word	.LC52
-	.word	.LANCHOR185
-	.word	.LC51
 	.size	FtlWriteToIDB, .-FtlWriteToIDB
 	.section	.text.sftl_write,"ax",%progbits
 	.align	1
@@ -13118,24 +12984,24 @@ sftl_write:
 	mov	r5, r2
 	add	r6, r6, r4
 	bl	FtlWriteToIDB
-.L1764:
+.L1751:
 	cmp	r4, #256
 	sub	r1, r6, r4
 	mov	r3, r5
-	bhi	.L1766
+	bhi	.L1753
 	mov	r2, r4
 	movs	r0, #0
 	pop	{r4, r5, r6, lr}
 	b	FtlWrite
-.L1766:
+.L1753:
 	mov	r2, #256
 	movs	r0, #0
 	bl	FtlWrite
-	cbnz	r0, .L1763
+	cbnz	r0, .L1750
 	add	r5, r5, #131072
 	sub	r4, r4, #256
-	b	.L1764
-.L1763:
+	b	.L1751
+.L1750:
 	pop	{r4, r5, r6, pc}
 	.size	sftl_write, .-sftl_write
 	.global	g_nand_ops
@@ -13218,7 +13084,6 @@ sftl_write:
 	.global	p_map_block_ver_table
 	.global	p_map_block_valid_page_count
 	.global	p_map_block_table
-	.global	p_blk_mode_table
 	.global	p_valid_page_count_check_table
 	.global	p_valid_page_count_table
 	.global	g_totle_swl_count
@@ -13290,245 +13155,245 @@ sftl_write:
 	.global	c_ftl_nand_type
 	.section	.bss.DeviceCapacity,"aw",%nobits
 	.align	2
-	.set	.LANCHOR26,. + 0
+	.set	.LANCHOR25,. + 0
 	.type	DeviceCapacity, %object
 	.size	DeviceCapacity, 4
 DeviceCapacity:
 	.space	4
 	.section	.bss.FtlUpdateVaildLpnCount,"aw",%nobits
 	.align	1
-	.set	.LANCHOR58,. + 0
+	.set	.LANCHOR57,. + 0
 	.type	FtlUpdateVaildLpnCount, %object
 	.size	FtlUpdateVaildLpnCount, 2
 FtlUpdateVaildLpnCount:
 	.space	2
 	.section	.bss.c_ftl_nand_bbm_buf_size,"aw",%nobits
 	.align	1
-	.set	.LANCHOR127,. + 0
+	.set	.LANCHOR126,. + 0
 	.type	c_ftl_nand_bbm_buf_size, %object
 	.size	c_ftl_nand_bbm_buf_size, 2
 c_ftl_nand_bbm_buf_size:
 	.space	2
 	.section	.bss.c_ftl_nand_blk_pre_plane,"aw",%nobits
 	.align	1
-	.set	.LANCHOR6,. + 0
+	.set	.LANCHOR5,. + 0
 	.type	c_ftl_nand_blk_pre_plane, %object
 	.size	c_ftl_nand_blk_pre_plane, 2
 c_ftl_nand_blk_pre_plane:
 	.space	2
 	.section	.bss.c_ftl_nand_blks_per_die,"aw",%nobits
 	.align	1
-	.set	.LANCHOR17,. + 0
+	.set	.LANCHOR16,. + 0
 	.type	c_ftl_nand_blks_per_die, %object
 	.size	c_ftl_nand_blks_per_die, 2
 c_ftl_nand_blks_per_die:
 	.space	2
 	.section	.bss.c_ftl_nand_blks_per_die_shift,"aw",%nobits
 	.align	1
-	.set	.LANCHOR18,. + 0
+	.set	.LANCHOR17,. + 0
 	.type	c_ftl_nand_blks_per_die_shift, %object
 	.size	c_ftl_nand_blks_per_die_shift, 2
 c_ftl_nand_blks_per_die_shift:
 	.space	2
 	.section	.bss.c_ftl_nand_byte_pre_oob,"aw",%nobits
 	.align	1
-	.set	.LANCHOR24,. + 0
+	.set	.LANCHOR23,. + 0
 	.type	c_ftl_nand_byte_pre_oob, %object
 	.size	c_ftl_nand_byte_pre_oob, 2
 c_ftl_nand_byte_pre_oob:
 	.space	2
 	.section	.bss.c_ftl_nand_byte_pre_page,"aw",%nobits
 	.align	1
-	.set	.LANCHOR23,. + 0
+	.set	.LANCHOR22,. + 0
 	.type	c_ftl_nand_byte_pre_page, %object
 	.size	c_ftl_nand_byte_pre_page, 2
 c_ftl_nand_byte_pre_page:
 	.space	2
 	.section	.bss.c_ftl_nand_data_blks_per_plane,"aw",%nobits
 	.align	1
-	.set	.LANCHOR5,. + 0
+	.set	.LANCHOR4,. + 0
 	.type	c_ftl_nand_data_blks_per_plane, %object
 	.size	c_ftl_nand_data_blks_per_plane, 2
 c_ftl_nand_data_blks_per_plane:
 	.space	2
 	.section	.bss.c_ftl_nand_data_op_blks_per_plane,"aw",%nobits
 	.align	1
-	.set	.LANCHOR171,. + 0
+	.set	.LANCHOR170,. + 0
 	.type	c_ftl_nand_data_op_blks_per_plane, %object
 	.size	c_ftl_nand_data_op_blks_per_plane, 2
 c_ftl_nand_data_op_blks_per_plane:
 	.space	2
 	.section	.bss.c_ftl_nand_die_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR10,. + 0
+	.set	.LANCHOR9,. + 0
 	.type	c_ftl_nand_die_num, %object
 	.size	c_ftl_nand_die_num, 2
 c_ftl_nand_die_num:
 	.space	2
 	.section	.bss.c_ftl_nand_ext_blk_pre_plane,"aw",%nobits
 	.align	1
-	.set	.LANCHOR15,. + 0
+	.set	.LANCHOR14,. + 0
 	.type	c_ftl_nand_ext_blk_pre_plane, %object
 	.size	c_ftl_nand_ext_blk_pre_plane, 2
 c_ftl_nand_ext_blk_pre_plane:
 	.space	2
 	.section	.bss.c_ftl_nand_init_sys_blks_per_plane,"aw",%nobits
 	.align	2
-	.set	.LANCHOR31,. + 0
+	.set	.LANCHOR30,. + 0
 	.type	c_ftl_nand_init_sys_blks_per_plane, %object
 	.size	c_ftl_nand_init_sys_blks_per_plane, 4
 c_ftl_nand_init_sys_blks_per_plane:
 	.space	4
 	.section	.bss.c_ftl_nand_l2pmap_ram_region_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR33,. + 0
+	.set	.LANCHOR32,. + 0
 	.type	c_ftl_nand_l2pmap_ram_region_num, %object
 	.size	c_ftl_nand_l2pmap_ram_region_num, 2
 c_ftl_nand_l2pmap_ram_region_num:
 	.space	2
 	.section	.bss.c_ftl_nand_map_blks_per_plane,"aw",%nobits
 	.align	1
-	.set	.LANCHOR29,. + 0
+	.set	.LANCHOR28,. + 0
 	.type	c_ftl_nand_map_blks_per_plane, %object
 	.size	c_ftl_nand_map_blks_per_plane, 2
 c_ftl_nand_map_blks_per_plane:
 	.space	2
 	.section	.bss.c_ftl_nand_map_region_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR32,. + 0
+	.set	.LANCHOR31,. + 0
 	.type	c_ftl_nand_map_region_num, %object
 	.size	c_ftl_nand_map_region_num, 2
 c_ftl_nand_map_region_num:
 	.space	2
 	.section	.bss.c_ftl_nand_max_data_blks,"aw",%nobits
 	.align	2
-	.set	.LANCHOR7,. + 0
+	.set	.LANCHOR6,. + 0
 	.type	c_ftl_nand_max_data_blks, %object
 	.size	c_ftl_nand_max_data_blks, 4
 c_ftl_nand_max_data_blks:
 	.space	4
 	.section	.bss.c_ftl_nand_max_map_blks,"aw",%nobits
 	.align	2
-	.set	.LANCHOR30,. + 0
+	.set	.LANCHOR29,. + 0
 	.type	c_ftl_nand_max_map_blks, %object
 	.size	c_ftl_nand_max_map_blks, 4
 c_ftl_nand_max_map_blks:
 	.space	4
 	.section	.bss.c_ftl_nand_max_sys_blks,"aw",%nobits
 	.align	2
-	.set	.LANCHOR4,. + 0
+	.set	.LANCHOR3,. + 0
 	.type	c_ftl_nand_max_sys_blks, %object
 	.size	c_ftl_nand_max_sys_blks, 4
 c_ftl_nand_max_sys_blks:
 	.space	4
 	.section	.bss.c_ftl_nand_max_vendor_blks,"aw",%nobits
 	.align	1
-	.set	.LANCHOR27,. + 0
+	.set	.LANCHOR26,. + 0
 	.type	c_ftl_nand_max_vendor_blks, %object
 	.size	c_ftl_nand_max_vendor_blks, 2
 c_ftl_nand_max_vendor_blks:
 	.space	2
 	.section	.bss.c_ftl_nand_page_pre_blk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR19,. + 0
+	.set	.LANCHOR18,. + 0
 	.type	c_ftl_nand_page_pre_blk, %object
 	.size	c_ftl_nand_page_pre_blk, 2
 c_ftl_nand_page_pre_blk:
 	.space	2
 	.section	.bss.c_ftl_nand_page_pre_slc_blk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR20,. + 0
+	.set	.LANCHOR19,. + 0
 	.type	c_ftl_nand_page_pre_slc_blk, %object
 	.size	c_ftl_nand_page_pre_slc_blk, 2
 c_ftl_nand_page_pre_slc_blk:
 	.space	2
 	.section	.bss.c_ftl_nand_page_pre_super_blk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR21,. + 0
+	.set	.LANCHOR20,. + 0
 	.type	c_ftl_nand_page_pre_super_blk, %object
 	.size	c_ftl_nand_page_pre_super_blk, 2
 c_ftl_nand_page_pre_super_blk:
 	.space	2
 	.section	.bss.c_ftl_nand_planes_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR3,. + 0
+	.set	.LANCHOR2,. + 0
 	.type	c_ftl_nand_planes_num, %object
 	.size	c_ftl_nand_planes_num, 2
 c_ftl_nand_planes_num:
 	.space	2
 	.section	.bss.c_ftl_nand_planes_per_die,"aw",%nobits
 	.align	1
-	.set	.LANCHOR11,. + 0
+	.set	.LANCHOR10,. + 0
 	.type	c_ftl_nand_planes_per_die, %object
 	.size	c_ftl_nand_planes_per_die, 2
 c_ftl_nand_planes_per_die:
 	.space	2
 	.section	.bss.c_ftl_nand_reserved_blks,"aw",%nobits
 	.align	1
-	.set	.LANCHOR25,. + 0
+	.set	.LANCHOR24,. + 0
 	.type	c_ftl_nand_reserved_blks, %object
 	.size	c_ftl_nand_reserved_blks, 2
 c_ftl_nand_reserved_blks:
 	.space	2
 	.section	.bss.c_ftl_nand_sec_pre_page,"aw",%nobits
 	.align	1
-	.set	.LANCHOR12,. + 0
+	.set	.LANCHOR11,. + 0
 	.type	c_ftl_nand_sec_pre_page, %object
 	.size	c_ftl_nand_sec_pre_page, 2
 c_ftl_nand_sec_pre_page:
 	.space	2
 	.section	.bss.c_ftl_nand_sec_pre_page_shift,"aw",%nobits
 	.align	1
-	.set	.LANCHOR22,. + 0
+	.set	.LANCHOR21,. + 0
 	.type	c_ftl_nand_sec_pre_page_shift, %object
 	.size	c_ftl_nand_sec_pre_page_shift, 2
 c_ftl_nand_sec_pre_page_shift:
 	.space	2
 	.section	.bss.c_ftl_nand_sys_blks_per_plane,"aw",%nobits
 	.align	2
-	.set	.LANCHOR2,. + 0
+	.set	.LANCHOR1,. + 0
 	.type	c_ftl_nand_sys_blks_per_plane, %object
 	.size	c_ftl_nand_sys_blks_per_plane, 4
 c_ftl_nand_sys_blks_per_plane:
 	.space	4
 	.section	.bss.c_ftl_nand_totle_phy_blks,"aw",%nobits
 	.align	2
-	.set	.LANCHOR8,. + 0
+	.set	.LANCHOR7,. + 0
 	.type	c_ftl_nand_totle_phy_blks, %object
 	.size	c_ftl_nand_totle_phy_blks, 4
 c_ftl_nand_totle_phy_blks:
 	.space	4
 	.section	.bss.c_ftl_nand_type,"aw",%nobits
 	.align	1
-	.set	.LANCHOR9,. + 0
+	.set	.LANCHOR8,. + 0
 	.type	c_ftl_nand_type, %object
 	.size	c_ftl_nand_type, 2
 c_ftl_nand_type:
 	.space	2
 	.section	.bss.c_ftl_nand_vendor_region_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR28,. + 0
+	.set	.LANCHOR27,. + 0
 	.type	c_ftl_nand_vendor_region_num, %object
 	.size	c_ftl_nand_vendor_region_num, 2
 c_ftl_nand_vendor_region_num:
 	.space	2
 	.section	.bss.c_ftl_vendor_part_size,"aw",%nobits
 	.align	1
-	.set	.LANCHOR16,. + 0
+	.set	.LANCHOR15,. + 0
 	.type	c_ftl_vendor_part_size, %object
 	.size	c_ftl_vendor_part_size, 2
 c_ftl_vendor_part_size:
 	.space	2
 	.section	.bss.c_gc_page_buf_num,"aw",%nobits
 	.align	2
-	.set	.LANCHOR67,. + 0
+	.set	.LANCHOR66,. + 0
 	.type	c_gc_page_buf_num, %object
 	.size	c_gc_page_buf_num, 4
 c_gc_page_buf_num:
 	.space	4
 	.section	.bss.c_mlc_erase_count_value,"aw",%nobits
 	.align	1
-	.set	.LANCHOR14,. + 0
+	.set	.LANCHOR13,. + 0
 	.type	c_mlc_erase_count_value, %object
 	.size	c_mlc_erase_count_value, 2
 c_mlc_erase_count_value:
@@ -13541,294 +13406,294 @@ check_vpc_table:
 	.space	16384
 	.section	.bss.ftl_gc_temp_power_lost_recovery_flag,"aw",%nobits
 	.align	2
-	.set	.LANCHOR133,. + 0
+	.set	.LANCHOR132,. + 0
 	.type	ftl_gc_temp_power_lost_recovery_flag, %object
 	.size	ftl_gc_temp_power_lost_recovery_flag, 4
 ftl_gc_temp_power_lost_recovery_flag:
 	.space	4
 	.section	.bss.gBbtInfo,"aw",%nobits
 	.align	2
-	.set	.LANCHOR37,. + 0
+	.set	.LANCHOR36,. + 0
 	.type	gBbtInfo, %object
 	.size	gBbtInfo, 60
 gBbtInfo:
 	.space	60
 	.section	.bss.gL2pMapInfo,"aw",%nobits
 	.align	2
-	.set	.LANCHOR129,. + 0
+	.set	.LANCHOR128,. + 0
 	.type	gL2pMapInfo, %object
 	.size	gL2pMapInfo, 44
 gL2pMapInfo:
 	.space	44
 	.section	.bss.gSysFreeQueue,"aw",%nobits
 	.align	1
-	.set	.LANCHOR38,. + 0
+	.set	.LANCHOR37,. + 0
 	.type	gSysFreeQueue, %object
 	.size	gSysFreeQueue, 2056
 gSysFreeQueue:
 	.space	2056
 	.section	.bss.gSysInfo,"aw",%nobits
 	.align	2
-	.set	.LANCHOR139,. + 0
+	.set	.LANCHOR138,. + 0
 	.type	gSysInfo, %object
 	.size	gSysInfo, 16
 gSysInfo:
 	.space	16
 	.section	.bss.gVendorBlkInfo,"aw",%nobits
 	.align	2
-	.set	.LANCHOR161,. + 0
+	.set	.LANCHOR160,. + 0
 	.type	gVendorBlkInfo, %object
 	.size	gVendorBlkInfo, 44
 gVendorBlkInfo:
 	.space	44
 	.section	.bss.g_GlobalDataVersion,"aw",%nobits
 	.align	2
-	.set	.LANCHOR83,. + 0
+	.set	.LANCHOR82,. + 0
 	.type	g_GlobalDataVersion, %object
 	.size	g_GlobalDataVersion, 4
 g_GlobalDataVersion:
 	.space	4
 	.section	.bss.g_GlobalSysVersion,"aw",%nobits
 	.align	2
-	.set	.LANCHOR82,. + 0
+	.set	.LANCHOR81,. + 0
 	.type	g_GlobalSysVersion, %object
 	.size	g_GlobalSysVersion, 4
 g_GlobalSysVersion:
 	.space	4
 	.section	.bss.g_MaxLbaSector,"aw",%nobits
 	.align	2
-	.set	.LANCHOR34,. + 0
+	.set	.LANCHOR33,. + 0
 	.type	g_MaxLbaSector, %object
 	.size	g_MaxLbaSector, 4
 g_MaxLbaSector:
 	.space	4
 	.section	.bss.g_MaxLbn,"aw",%nobits
 	.align	2
-	.set	.LANCHOR179,. + 0
+	.set	.LANCHOR178,. + 0
 	.type	g_MaxLbn, %object
 	.size	g_MaxLbn, 4
 g_MaxLbn:
 	.space	4
 	.section	.bss.g_MaxLpn,"aw",%nobits
 	.align	2
-	.set	.LANCHOR152,. + 0
+	.set	.LANCHOR151,. + 0
 	.type	g_MaxLpn, %object
 	.size	g_MaxLpn, 4
 g_MaxLpn:
 	.space	4
 	.section	.bss.g_VaildLpn,"aw",%nobits
 	.align	2
-	.set	.LANCHOR59,. + 0
+	.set	.LANCHOR58,. + 0
 	.type	g_VaildLpn, %object
 	.size	g_VaildLpn, 4
 g_VaildLpn:
 	.space	4
 	.section	.bss.g_active_superblock,"aw",%nobits
 	.align	2
-	.set	.LANCHOR51,. + 0
+	.set	.LANCHOR50,. + 0
 	.type	g_active_superblock, %object
 	.size	g_active_superblock, 48
 g_active_superblock:
 	.space	48
 	.section	.bss.g_buffer_superblock,"aw",%nobits
 	.align	2
-	.set	.LANCHOR52,. + 0
+	.set	.LANCHOR51,. + 0
 	.type	g_buffer_superblock, %object
 	.size	g_buffer_superblock, 48
 g_buffer_superblock:
 	.space	48
 	.section	.bss.g_cur_erase_blk,"aw",%nobits
 	.align	2
-	.set	.LANCHOR99,. + 0
+	.set	.LANCHOR98,. + 0
 	.type	g_cur_erase_blk, %object
 	.size	g_cur_erase_blk, 4
 g_cur_erase_blk:
 	.space	4
 	.section	.bss.g_ect_tbl_info_size,"aw",%nobits
 	.align	1
-	.set	.LANCHOR116,. + 0
+	.set	.LANCHOR115,. + 0
 	.type	g_ect_tbl_info_size, %object
 	.size	g_ect_tbl_info_size, 2
 g_ect_tbl_info_size:
 	.space	2
 	.section	.bss.g_ect_tbl_power_up_flush,"aw",%nobits
 	.align	1
-	.set	.LANCHOR164,. + 0
+	.set	.LANCHOR163,. + 0
 	.type	g_ect_tbl_power_up_flush, %object
 	.size	g_ect_tbl_power_up_flush, 2
 g_ect_tbl_power_up_flush:
 	.space	2
 	.section	.bss.g_ftl_nand_free_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR176,. + 0
+	.set	.LANCHOR175,. + 0
 	.type	g_ftl_nand_free_count, %object
 	.size	g_ftl_nand_free_count, 4
 g_ftl_nand_free_count:
 	.space	4
 	.section	.bss.g_gc_bad_block_gc_index,"aw",%nobits
 	.align	1
-	.set	.LANCHOR76,. + 0
+	.set	.LANCHOR75,. + 0
 	.type	g_gc_bad_block_gc_index, %object
 	.size	g_gc_bad_block_gc_index, 2
 g_gc_bad_block_gc_index:
 	.space	2
 	.section	.bss.g_gc_bad_block_temp_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR74,. + 0
+	.set	.LANCHOR73,. + 0
 	.type	g_gc_bad_block_temp_num, %object
 	.size	g_gc_bad_block_temp_num, 2
 g_gc_bad_block_temp_num:
 	.space	2
 	.section	.bss.g_gc_bad_block_temp_tbl,"aw",%nobits
 	.align	1
-	.set	.LANCHOR75,. + 0
+	.set	.LANCHOR74,. + 0
 	.type	g_gc_bad_block_temp_tbl, %object
 	.size	g_gc_bad_block_temp_tbl, 34
 g_gc_bad_block_temp_tbl:
 	.space	34
 	.section	.bss.g_gc_blk_index,"aw",%nobits
 	.align	1
-	.set	.LANCHOR102,. + 0
+	.set	.LANCHOR101,. + 0
 	.type	g_gc_blk_index, %object
 	.size	g_gc_blk_index, 2
 g_gc_blk_index:
 	.space	2
 	.section	.bss.g_gc_blk_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR69,. + 0
+	.set	.LANCHOR68,. + 0
 	.type	g_gc_blk_num, %object
 	.size	g_gc_blk_num, 2
 g_gc_blk_num:
 	.space	2
 	.section	.bss.g_gc_cur_blk_max_valid_pages,"aw",%nobits
 	.align	1
-	.set	.LANCHOR174,. + 0
+	.set	.LANCHOR173,. + 0
 	.type	g_gc_cur_blk_max_valid_pages, %object
 	.size	g_gc_cur_blk_max_valid_pages, 2
 g_gc_cur_blk_max_valid_pages:
 	.space	2
 	.section	.bss.g_gc_cur_blk_valid_pages,"aw",%nobits
 	.align	1
-	.set	.LANCHOR173,. + 0
+	.set	.LANCHOR172,. + 0
 	.type	g_gc_cur_blk_valid_pages, %object
 	.size	g_gc_cur_blk_valid_pages, 2
 g_gc_cur_blk_valid_pages:
 	.space	2
 	.section	.bss.g_gc_free_blk_threshold,"aw",%nobits
 	.align	1
-	.set	.LANCHOR100,. + 0
+	.set	.LANCHOR99,. + 0
 	.type	g_gc_free_blk_threshold, %object
 	.size	g_gc_free_blk_threshold, 2
 g_gc_free_blk_threshold:
 	.space	2
 	.section	.bss.g_gc_head_data_block,"aw",%nobits
 	.align	2
-	.set	.LANCHOR96,. + 0
+	.set	.LANCHOR95,. + 0
 	.type	g_gc_head_data_block, %object
 	.size	g_gc_head_data_block, 4
 g_gc_head_data_block:
 	.space	4
 	.section	.bss.g_gc_head_data_block_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR97,. + 0
+	.set	.LANCHOR96,. + 0
 	.type	g_gc_head_data_block_count, %object
 	.size	g_gc_head_data_block_count, 4
 g_gc_head_data_block_count:
 	.space	4
 	.section	.bss.g_gc_merge_free_blk_threshold,"aw",%nobits
 	.align	1
-	.set	.LANCHOR101,. + 0
+	.set	.LANCHOR100,. + 0
 	.type	g_gc_merge_free_blk_threshold, %object
 	.size	g_gc_merge_free_blk_threshold, 2
 g_gc_merge_free_blk_threshold:
 	.space	2
 	.section	.bss.g_gc_next_blk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR72,. + 0
+	.set	.LANCHOR71,. + 0
 	.type	g_gc_next_blk, %object
 	.size	g_gc_next_blk, 2
 g_gc_next_blk:
 	.space	2
 	.section	.bss.g_gc_next_blk_1,"aw",%nobits
 	.align	1
-	.set	.LANCHOR73,. + 0
+	.set	.LANCHOR72,. + 0
 	.type	g_gc_next_blk_1, %object
 	.size	g_gc_next_blk_1, 2
 g_gc_next_blk_1:
 	.space	2
 	.section	.bss.g_gc_num_req,"aw",%nobits
 	.align	2
-	.set	.LANCHOR62,. + 0
+	.set	.LANCHOR61,. + 0
 	.type	g_gc_num_req, %object
 	.size	g_gc_num_req, 4
 g_gc_num_req:
 	.space	4
 	.section	.bss.g_gc_page_offset,"aw",%nobits
 	.align	1
-	.set	.LANCHOR70,. + 0
+	.set	.LANCHOR69,. + 0
 	.type	g_gc_page_offset, %object
 	.size	g_gc_page_offset, 2
 g_gc_page_offset:
 	.space	2
 	.section	.bss.g_gc_skip_write_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR98,. + 0
+	.set	.LANCHOR97,. + 0
 	.type	g_gc_skip_write_count, %object
 	.size	g_gc_skip_write_count, 4
 g_gc_skip_write_count:
 	.space	4
 	.section	.bss.g_gc_superblock,"aw",%nobits
 	.align	2
-	.set	.LANCHOR145,. + 0
+	.set	.LANCHOR144,. + 0
 	.type	g_gc_superblock, %object
 	.size	g_gc_superblock, 48
 g_gc_superblock:
 	.space	48
 	.section	.bss.g_gc_temp_superblock,"aw",%nobits
 	.align	2
-	.set	.LANCHOR53,. + 0
+	.set	.LANCHOR52,. + 0
 	.type	g_gc_temp_superblock, %object
 	.size	g_gc_temp_superblock, 48
 g_gc_temp_superblock:
 	.space	48
 	.section	.bss.g_in_gc_progress,"aw",%nobits
 	.align	2
-	.set	.LANCHOR94,. + 0
+	.set	.LANCHOR93,. + 0
 	.type	g_in_gc_progress, %object
 	.size	g_in_gc_progress, 4
 g_in_gc_progress:
 	.space	4
 	.section	.bss.g_in_swl_replace,"aw",%nobits
 	.align	2
-	.set	.LANCHOR95,. + 0
+	.set	.LANCHOR94,. + 0
 	.type	g_in_swl_replace, %object
 	.size	g_in_swl_replace, 4
 g_in_swl_replace:
 	.space	4
 	.section	.bss.g_l2p_last_update_region_id,"aw",%nobits
 	.align	1
-	.set	.LANCHOR56,. + 0
+	.set	.LANCHOR55,. + 0
 	.type	g_l2p_last_update_region_id, %object
 	.size	g_l2p_last_update_region_id, 2
 g_l2p_last_update_region_id:
 	.space	2
 	.section	.bss.g_max_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR92,. + 0
+	.set	.LANCHOR91,. + 0
 	.type	g_max_erase_count, %object
 	.size	g_max_erase_count, 4
 g_max_erase_count:
 	.space	4
 	.section	.bss.g_min_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR93,. + 0
+	.set	.LANCHOR92,. + 0
 	.type	g_min_erase_count, %object
 	.size	g_min_erase_count, 4
 g_min_erase_count:
 	.space	4
 	.section	.bss.g_nand_ops,"aw",%nobits
 	.align	2
-	.set	.LANCHOR78,. + 0
+	.set	.LANCHOR77,. + 0
 	.type	g_nand_ops, %object
 	.size	g_nand_ops, 24
 g_nand_ops:
@@ -13842,203 +13707,203 @@ g_nand_phy_info:
 	.space	24
 	.section	.bss.g_num_data_superblocks,"aw",%nobits
 	.align	1
-	.set	.LANCHOR44,. + 0
+	.set	.LANCHOR43,. + 0
 	.type	g_num_data_superblocks, %object
 	.size	g_num_data_superblocks, 2
 g_num_data_superblocks:
 	.space	2
 	.section	.bss.g_num_free_superblocks,"aw",%nobits
 	.align	1
-	.set	.LANCHOR48,. + 0
+	.set	.LANCHOR47,. + 0
 	.type	g_num_free_superblocks, %object
 	.size	g_num_free_superblocks, 2
 g_num_free_superblocks:
 	.space	2
 	.section	.bss.g_power_lost_recovery_flag,"aw",%nobits
 	.align	1
-	.set	.LANCHOR156,. + 0
+	.set	.LANCHOR155,. + 0
 	.type	g_power_lost_recovery_flag, %object
 	.size	g_power_lost_recovery_flag, 2
 g_power_lost_recovery_flag:
 	.space	2
 	.section	.bss.g_recovery_page_min_ver,"aw",%nobits
 	.align	2
-	.set	.LANCHOR134,. + 0
+	.set	.LANCHOR133,. + 0
 	.type	g_recovery_page_min_ver, %object
 	.size	g_recovery_page_min_ver, 4
 g_recovery_page_min_ver:
 	.space	4
 	.section	.bss.g_recovery_page_num,"aw",%nobits
 	.align	2
-	.set	.LANCHOR157,. + 0
+	.set	.LANCHOR156,. + 0
 	.type	g_recovery_page_num, %object
 	.size	g_recovery_page_num, 4
 g_recovery_page_num:
 	.space	4
 	.section	.bss.g_recovery_ppa_tbl,"aw",%nobits
 	.align	2
-	.set	.LANCHOR158,. + 0
+	.set	.LANCHOR157,. + 0
 	.type	g_recovery_ppa_tbl, %object
 	.size	g_recovery_ppa_tbl, 128
 g_recovery_ppa_tbl:
 	.space	128
 	.section	.bss.g_sys_ext_data,"aw",%nobits
 	.align	2
-	.set	.LANCHOR135,. + 0
+	.set	.LANCHOR134,. + 0
 	.type	g_sys_ext_data, %object
 	.size	g_sys_ext_data, 512
 g_sys_ext_data:
 	.space	512
 	.section	.bss.g_sys_save_data,"aw",%nobits
 	.align	2
-	.set	.LANCHOR39,. + 0
+	.set	.LANCHOR38,. + 0
 	.type	g_sys_save_data, %object
 	.size	g_sys_save_data, 48
 g_sys_save_data:
 	.space	48
 	.section	.bss.g_tmp_data_superblock_id,"aw",%nobits
 	.align	1
-	.set	.LANCHOR131,. + 0
+	.set	.LANCHOR130,. + 0
 	.type	g_tmp_data_superblock_id, %object
 	.size	g_tmp_data_superblock_id, 2
 g_tmp_data_superblock_id:
 	.space	2
 	.section	.bss.g_totle_avg_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR143,. + 0
+	.set	.LANCHOR142,. + 0
 	.type	g_totle_avg_erase_count, %object
 	.size	g_totle_avg_erase_count, 4
 g_totle_avg_erase_count:
 	.space	4
 	.section	.bss.g_totle_cache_write_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR87,. + 0
+	.set	.LANCHOR86,. + 0
 	.type	g_totle_cache_write_count, %object
 	.size	g_totle_cache_write_count, 4
 g_totle_cache_write_count:
 	.space	4
 	.section	.bss.g_totle_discard_page_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR86,. + 0
+	.set	.LANCHOR85,. + 0
 	.type	g_totle_discard_page_count, %object
 	.size	g_totle_discard_page_count, 4
 g_totle_discard_page_count:
 	.space	4
 	.section	.bss.g_totle_gc_page_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR84,. + 0
+	.set	.LANCHOR83,. + 0
 	.type	g_totle_gc_page_count, %object
 	.size	g_totle_gc_page_count, 4
 g_totle_gc_page_count:
 	.space	4
 	.section	.bss.g_totle_l2p_write_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR88,. + 0
+	.set	.LANCHOR87,. + 0
 	.type	g_totle_l2p_write_count, %object
 	.size	g_totle_l2p_write_count, 4
 g_totle_l2p_write_count:
 	.space	4
 	.section	.bss.g_totle_map_block,"aw",%nobits
 	.align	1
-	.set	.LANCHOR130,. + 0
+	.set	.LANCHOR129,. + 0
 	.type	g_totle_map_block, %object
 	.size	g_totle_map_block, 2
 g_totle_map_block:
 	.space	2
 	.section	.bss.g_totle_mlc_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR90,. + 0
+	.set	.LANCHOR89,. + 0
 	.type	g_totle_mlc_erase_count, %object
 	.size	g_totle_mlc_erase_count, 4
 g_totle_mlc_erase_count:
 	.space	4
 	.section	.bss.g_totle_read_page_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR89,. + 0
+	.set	.LANCHOR88,. + 0
 	.type	g_totle_read_page_count, %object
 	.size	g_totle_read_page_count, 4
 g_totle_read_page_count:
 	.space	4
 	.section	.bss.g_totle_read_sector,"aw",%nobits
 	.align	2
-	.set	.LANCHOR163,. + 0
+	.set	.LANCHOR162,. + 0
 	.type	g_totle_read_sector, %object
 	.size	g_totle_read_sector, 4
 g_totle_read_sector:
 	.space	4
 	.section	.bss.g_totle_slc_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR91,. + 0
+	.set	.LANCHOR90,. + 0
 	.type	g_totle_slc_erase_count, %object
 	.size	g_totle_slc_erase_count, 4
 g_totle_slc_erase_count:
 	.space	4
 	.section	.bss.g_totle_swl_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR132,. + 0
+	.set	.LANCHOR131,. + 0
 	.type	g_totle_swl_count, %object
 	.size	g_totle_swl_count, 4
 g_totle_swl_count:
 	.space	4
 	.section	.bss.g_totle_sys_slc_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR80,. + 0
+	.set	.LANCHOR79,. + 0
 	.type	g_totle_sys_slc_erase_count, %object
 	.size	g_totle_sys_slc_erase_count, 4
 g_totle_sys_slc_erase_count:
 	.space	4
 	.section	.bss.g_totle_vendor_block,"aw",%nobits
 	.align	1
-	.set	.LANCHOR35,. + 0
+	.set	.LANCHOR34,. + 0
 	.type	g_totle_vendor_block, %object
 	.size	g_totle_vendor_block, 2
 g_totle_vendor_block:
 	.space	2
 	.section	.bss.g_totle_write_page_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR85,. + 0
+	.set	.LANCHOR84,. + 0
 	.type	g_totle_write_page_count, %object
 	.size	g_totle_write_page_count, 4
 g_totle_write_page_count:
 	.space	4
 	.section	.bss.g_totle_write_sector,"aw",%nobits
 	.align	2
-	.set	.LANCHOR162,. + 0
+	.set	.LANCHOR161,. + 0
 	.type	g_totle_write_sector, %object
 	.size	g_totle_write_sector, 4
 g_totle_write_sector:
 	.space	4
 	.section	.bss.gc_discard_updated,"aw",%nobits
 	.align	2
-	.set	.LANCHOR167,. + 0
+	.set	.LANCHOR166,. + 0
 	.type	gc_discard_updated, %object
 	.size	gc_discard_updated, 4
 gc_discard_updated:
 	.space	4
 	.section	.bss.gc_ink_free_return_value,"aw",%nobits
 	.align	1
-	.set	.LANCHOR172,. + 0
+	.set	.LANCHOR171,. + 0
 	.type	gc_ink_free_return_value, %object
 	.size	gc_ink_free_return_value, 2
 gc_ink_free_return_value:
 	.space	2
 	.section	.bss.gp_ect_tbl_info,"aw",%nobits
 	.align	2
-	.set	.LANCHOR118,. + 0
+	.set	.LANCHOR117,. + 0
 	.type	gp_ect_tbl_info, %object
 	.size	gp_ect_tbl_info, 4
 gp_ect_tbl_info:
 	.space	4
 	.section	.bss.gp_flash_check_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR184,. + 0
+	.set	.LANCHOR183,. + 0
 	.type	gp_flash_check_buf, %object
 	.size	gp_flash_check_buf, 4
 gp_flash_check_buf:
 	.space	4
 	.section	.bss.gp_gc_page_buf_info,"aw",%nobits
 	.align	2
-	.set	.LANCHOR63,. + 0
+	.set	.LANCHOR62,. + 0
 	.type	gp_gc_page_buf_info, %object
 	.size	gp_gc_page_buf_info, 4
 gp_gc_page_buf_info:
@@ -14051,188 +13916,181 @@ gp_last_act_superblock:
 	.space	4
 	.section	.bss.idb_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR183,. + 0
+	.set	.LANCHOR182,. + 0
 	.type	idb_buf, %object
 	.size	idb_buf, 4
 idb_buf:
 	.space	4
 	.section	.bss.idb_need_write_back,"aw",%nobits
 	.align	2
-	.set	.LANCHOR182,. + 0
+	.set	.LANCHOR181,. + 0
 	.type	idb_need_write_back, %object
 	.size	idb_need_write_back, 4
 idb_need_write_back:
 	.space	4
 	.section	.bss.low_format_en,"aw",%nobits
 	.align	2
-	.set	.LANCHOR181,. + 0
+	.set	.LANCHOR180,. + 0
 	.type	low_format_en, %object
 	.size	low_format_en, 4
 low_format_en:
-	.space	4
-	.section	.bss.p_blk_mode_table,"aw",%nobits
-	.align	2
-	.set	.LANCHOR1,. + 0
-	.type	p_blk_mode_table, %object
-	.size	p_blk_mode_table, 4
-p_blk_mode_table:
 	.space	4
 	.section	.bss.p_data_block_list_head,"aw",%nobits
 	.align	2
-	.set	.LANCHOR41,. + 0
+	.set	.LANCHOR40,. + 0
 	.type	p_data_block_list_head, %object
 	.size	p_data_block_list_head, 4
 p_data_block_list_head:
 	.space	4
 	.section	.bss.p_data_block_list_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR40,. + 0
+	.set	.LANCHOR39,. + 0
 	.type	p_data_block_list_table, %object
 	.size	p_data_block_list_table, 4
 p_data_block_list_table:
 	.space	4
 	.section	.bss.p_data_block_list_tail,"aw",%nobits
 	.align	2
-	.set	.LANCHOR43,. + 0
+	.set	.LANCHOR42,. + 0
 	.type	p_data_block_list_tail, %object
 	.size	p_data_block_list_tail, 4
 p_data_block_list_tail:
 	.space	4
 	.section	.bss.p_erase_count_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR47,. + 0
+	.set	.LANCHOR46,. + 0
 	.type	p_erase_count_table, %object
 	.size	p_erase_count_table, 4
 p_erase_count_table:
 	.space	4
 	.section	.bss.p_free_data_block_list_head,"aw",%nobits
 	.align	2
-	.set	.LANCHOR46,. + 0
+	.set	.LANCHOR45,. + 0
 	.type	p_free_data_block_list_head, %object
 	.size	p_free_data_block_list_head, 4
 p_free_data_block_list_head:
 	.space	4
 	.section	.bss.p_gc_blk_tbl,"aw",%nobits
 	.align	2
-	.set	.LANCHOR68,. + 0
+	.set	.LANCHOR67,. + 0
 	.type	p_gc_blk_tbl, %object
 	.size	p_gc_blk_tbl, 4
 p_gc_blk_tbl:
 	.space	4
 	.section	.bss.p_gc_data_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR64,. + 0
+	.set	.LANCHOR63,. + 0
 	.type	p_gc_data_buf, %object
 	.size	p_gc_data_buf, 4
 p_gc_data_buf:
 	.space	4
 	.section	.bss.p_gc_page_info,"aw",%nobits
 	.align	2
-	.set	.LANCHOR71,. + 0
+	.set	.LANCHOR70,. + 0
 	.type	p_gc_page_info, %object
 	.size	p_gc_page_info, 4
 p_gc_page_info:
 	.space	4
 	.section	.bss.p_gc_spare_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR65,. + 0
+	.set	.LANCHOR64,. + 0
 	.type	p_gc_spare_buf, %object
 	.size	p_gc_spare_buf, 4
 p_gc_spare_buf:
 	.space	4
 	.section	.bss.p_io_data_buf_0,"aw",%nobits
 	.align	2
-	.set	.LANCHOR109,. + 0
+	.set	.LANCHOR108,. + 0
 	.type	p_io_data_buf_0, %object
 	.size	p_io_data_buf_0, 4
 p_io_data_buf_0:
 	.space	4
 	.section	.bss.p_io_data_buf_1,"aw",%nobits
 	.align	2
-	.set	.LANCHOR110,. + 0
+	.set	.LANCHOR109,. + 0
 	.type	p_io_data_buf_1, %object
 	.size	p_io_data_buf_1, 4
 p_io_data_buf_1:
 	.space	4
 	.section	.bss.p_io_spare_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR115,. + 0
+	.set	.LANCHOR114,. + 0
 	.type	p_io_spare_buf, %object
 	.size	p_io_spare_buf, 4
 p_io_spare_buf:
 	.space	4
 	.section	.bss.p_l2p_map_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR126,. + 0
+	.set	.LANCHOR125,. + 0
 	.type	p_l2p_map_buf, %object
 	.size	p_l2p_map_buf, 4
 p_l2p_map_buf:
 	.space	4
 	.section	.bss.p_l2p_ram_map,"aw",%nobits
 	.align	2
-	.set	.LANCHOR55,. + 0
+	.set	.LANCHOR54,. + 0
 	.type	p_l2p_ram_map, %object
 	.size	p_l2p_ram_map, 4
 p_l2p_ram_map:
 	.space	4
 	.section	.bss.p_map_block_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR119,. + 0
+	.set	.LANCHOR118,. + 0
 	.type	p_map_block_table, %object
 	.size	p_map_block_table, 4
 p_map_block_table:
 	.space	4
 	.section	.bss.p_map_block_valid_page_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR120,. + 0
+	.set	.LANCHOR119,. + 0
 	.type	p_map_block_valid_page_count, %object
 	.size	p_map_block_valid_page_count, 4
 p_map_block_valid_page_count:
 	.space	4
 	.section	.bss.p_map_block_ver_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR125,. + 0
+	.set	.LANCHOR124,. + 0
 	.type	p_map_block_ver_table, %object
 	.size	p_map_block_ver_table, 4
 p_map_block_ver_table:
 	.space	4
 	.section	.bss.p_map_region_ppn_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR124,. + 0
+	.set	.LANCHOR123,. + 0
 	.type	p_map_region_ppn_table, %object
 	.size	p_map_region_ppn_table, 4
 p_map_region_ppn_table:
 	.space	4
 	.section	.bss.p_plane_order_table,"aw",%nobits
-	.set	.LANCHOR13,. + 0
+	.set	.LANCHOR12,. + 0
 	.type	p_plane_order_table, %object
 	.size	p_plane_order_table, 32
 p_plane_order_table:
 	.space	32
 	.section	.bss.p_swl_mul_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR117,. + 0
+	.set	.LANCHOR116,. + 0
 	.type	p_swl_mul_table, %object
 	.size	p_swl_mul_table, 4
 p_swl_mul_table:
 	.space	4
 	.section	.bss.p_sys_data_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR106,. + 0
+	.set	.LANCHOR105,. + 0
 	.type	p_sys_data_buf, %object
 	.size	p_sys_data_buf, 4
 p_sys_data_buf:
 	.space	4
 	.section	.bss.p_sys_data_buf_1,"aw",%nobits
 	.align	2
-	.set	.LANCHOR107,. + 0
+	.set	.LANCHOR106,. + 0
 	.type	p_sys_data_buf_1, %object
 	.size	p_sys_data_buf_1, 4
 p_sys_data_buf_1:
 	.space	4
 	.section	.bss.p_sys_spare_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR114,. + 0
+	.set	.LANCHOR113,. + 0
 	.type	p_sys_spare_buf, %object
 	.size	p_sys_spare_buf, 4
 p_sys_spare_buf:
@@ -14245,119 +14103,119 @@ p_valid_page_count_check_table:
 	.space	4
 	.section	.bss.p_valid_page_count_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR42,. + 0
+	.set	.LANCHOR41,. + 0
 	.type	p_valid_page_count_table, %object
 	.size	p_valid_page_count_table, 4
 p_valid_page_count_table:
 	.space	4
 	.section	.bss.p_vendor_block_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR36,. + 0
+	.set	.LANCHOR35,. + 0
 	.type	p_vendor_block_table, %object
 	.size	p_vendor_block_table, 4
 p_vendor_block_table:
 	.space	4
 	.section	.bss.p_vendor_block_valid_page_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR121,. + 0
+	.set	.LANCHOR120,. + 0
 	.type	p_vendor_block_valid_page_count, %object
 	.size	p_vendor_block_valid_page_count, 4
 p_vendor_block_valid_page_count:
 	.space	4
 	.section	.bss.p_vendor_block_ver_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR122,. + 0
+	.set	.LANCHOR121,. + 0
 	.type	p_vendor_block_ver_table, %object
 	.size	p_vendor_block_ver_table, 4
 p_vendor_block_ver_table:
 	.space	4
 	.section	.bss.p_vendor_data_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR108,. + 0
+	.set	.LANCHOR107,. + 0
 	.type	p_vendor_data_buf, %object
 	.size	p_vendor_data_buf, 4
 p_vendor_data_buf:
 	.space	4
 	.section	.bss.p_vendor_region_ppn_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR123,. + 0
+	.set	.LANCHOR122,. + 0
 	.type	p_vendor_region_ppn_table, %object
 	.size	p_vendor_region_ppn_table, 4
 p_vendor_region_ppn_table:
 	.space	4
 	.section	.bss.req_erase,"aw",%nobits
 	.align	2
-	.set	.LANCHOR79,. + 0
+	.set	.LANCHOR78,. + 0
 	.type	req_erase, %object
 	.size	req_erase, 4
 req_erase:
 	.space	4
 	.section	.bss.req_gc,"aw",%nobits
 	.align	2
-	.set	.LANCHOR66,. + 0
+	.set	.LANCHOR65,. + 0
 	.type	req_gc, %object
 	.size	req_gc, 4
 req_gc:
 	.space	4
 	.section	.bss.req_gc_dst,"aw",%nobits
 	.align	2
-	.set	.LANCHOR104,. + 0
+	.set	.LANCHOR103,. + 0
 	.type	req_gc_dst, %object
 	.size	req_gc_dst, 4
 req_gc_dst:
 	.space	4
 	.section	.bss.req_prgm,"aw",%nobits
 	.align	2
-	.set	.LANCHOR105,. + 0
+	.set	.LANCHOR104,. + 0
 	.type	req_prgm, %object
 	.size	req_prgm, 4
 req_prgm:
 	.space	4
 	.section	.bss.req_read,"aw",%nobits
 	.align	2
-	.set	.LANCHOR103,. + 0
+	.set	.LANCHOR102,. + 0
 	.type	req_read, %object
 	.size	req_read, 4
 req_read:
 	.space	4
 	.section	.bss.req_sys,"aw",%nobits
 	.align	2
-	.set	.LANCHOR138,. + 0
+	.set	.LANCHOR137,. + 0
 	.type	req_sys, %object
 	.size	req_sys, 20
 req_sys:
 	.space	20
 	.section	.bss.sftl_nand_check_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR111,. + 0
+	.set	.LANCHOR110,. + 0
 	.type	sftl_nand_check_buf, %object
 	.size	sftl_nand_check_buf, 4
 sftl_nand_check_buf:
 	.space	4
 	.section	.bss.sftl_nand_check_spare_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR113,. + 0
+	.set	.LANCHOR112,. + 0
 	.type	sftl_nand_check_spare_buf, %object
 	.size	sftl_nand_check_spare_buf, 4
 sftl_nand_check_spare_buf:
 	.space	4
 	.section	.bss.sftl_temp_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR112,. + 0
+	.set	.LANCHOR111,. + 0
 	.type	sftl_temp_buf, %object
 	.size	sftl_temp_buf, 4
 sftl_temp_buf:
 	.space	4
 	.section	.data.ftl_gc_temp_block_bops_scan_page_addr,"aw",%progbits
 	.align	1
-	.set	.LANCHOR160,. + 0
+	.set	.LANCHOR159,. + 0
 	.type	ftl_gc_temp_block_bops_scan_page_addr, %object
 	.size	ftl_gc_temp_block_bops_scan_page_addr, 2
 ftl_gc_temp_block_bops_scan_page_addr:
 	.short	-1
 	.section	.data.gFtlInitStatus,"aw",%progbits
 	.align	2
-	.set	.LANCHOR166,. + 0
+	.set	.LANCHOR165,. + 0
 	.type	gFtlInitStatus, %object
 	.size	gFtlInitStatus, 4
 gFtlInitStatus:
@@ -14453,224 +14311,224 @@ power_up_flag:
 	.ascii	"FtlWrite: lpa error:%x %x\012\000"
 	.section	.rodata.FtlWriteToIDB.str1.1,"aMS",%progbits,1
 .LC50:
-	.ascii	"write_idblock fail! %x %x %x %x\012\000"
+	.ascii	"write_idblock %x %x\012\000"
 .LC51:
-	.ascii	"%s idb buffer alloc fail\012\000"
+	.ascii	"write_idblock fail! %x %x %x %x\012\000"
 .LC52:
-	.ascii	"%p %x %p %x\012\000"
+	.ascii	"%s idb buffer alloc fail\012\000"
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",%progbits,1
 .LC1:
 	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
-	.section	.rodata.__func__.10026,"a",%progbits
-	.set	.LANCHOR175,. + 0
-	.type	__func__.10026, %object
-	.size	__func__.10026, 23
-__func__.10026:
+	.section	.rodata.__func__.10025,"a",%progbits
+	.set	.LANCHOR169,. + 0
+	.type	__func__.10025, %object
+	.size	__func__.10025, 19
+__func__.10025:
+	.ascii	"FtlGcFreeTempBlock\000"
+	.section	.rodata.__func__.10124,"a",%progbits
+	.set	.LANCHOR174,. + 0
+	.type	__func__.10124, %object
+	.size	__func__.10124, 23
+__func__.10124:
 	.ascii	"rk_ftl_garbage_collect\000"
-	.section	.rodata.__func__.10298,"a",%progbits
-	.set	.LANCHOR137,. + 0
-	.type	__func__.10298, %object
-	.size	__func__.10298, 15
-__func__.10298:
+	.section	.rodata.__func__.10392,"a",%progbits
+	.set	.LANCHOR136,. + 0
+	.type	__func__.10392, %object
+	.size	__func__.10392, 15
+__func__.10392:
 	.ascii	"FlashReadPages\000"
-	.section	.rodata.__func__.10317,"a",%progbits
-	.set	.LANCHOR142,. + 0
-	.type	__func__.10317, %object
-	.size	__func__.10317, 15
-__func__.10317:
+	.section	.rodata.__func__.10411,"a",%progbits
+	.set	.LANCHOR141,. + 0
+	.type	__func__.10411, %object
+	.size	__func__.10411, 15
+__func__.10411:
 	.ascii	"FlashProgPages\000"
-	.section	.rodata.__func__.10341,"a",%progbits
-	.set	.LANCHOR77,. + 0
-	.type	__func__.10341, %object
-	.size	__func__.10341, 17
-__func__.10341:
+	.section	.rodata.__func__.10435,"a",%progbits
+	.set	.LANCHOR76,. + 0
+	.type	__func__.10435, %object
+	.size	__func__.10435, 17
+__func__.10435:
 	.ascii	"FlashEraseBlocks\000"
-	.section	.rodata.__func__.10456,"a",%progbits
-	.set	.LANCHOR185,. + 0
-	.type	__func__.10456, %object
-	.size	__func__.10456, 14
-__func__.10456:
+	.section	.rodata.__func__.10554,"a",%progbits
+	.set	.LANCHOR184,. + 0
+	.type	__func__.10554, %object
+	.size	__func__.10554, 14
+__func__.10554:
 	.ascii	"FtlWriteToIDB\000"
-	.section	.rodata.__func__.8943,"a",%progbits
-	.set	.LANCHOR169,. + 0
-	.type	__func__.8943, %object
-	.size	__func__.8943, 13
-__func__.8943:
+	.section	.rodata.__func__.9048,"a",%progbits
+	.set	.LANCHOR168,. + 0
+	.type	__func__.9048, %object
+	.size	__func__.9048, 13
+__func__.9048:
 	.ascii	"FtlProgPages\000"
-	.section	.rodata.__func__.8971,"a",%progbits
-	.set	.LANCHOR177,. + 0
-	.type	__func__.8971, %object
-	.size	__func__.8971, 9
-__func__.8971:
+	.section	.rodata.__func__.9076,"a",%progbits
+	.set	.LANCHOR176,. + 0
+	.type	__func__.9076, %object
+	.size	__func__.9076, 9
+__func__.9076:
 	.ascii	"FtlWrite\000"
-	.section	.rodata.__func__.9053,"a",%progbits
-	.set	.LANCHOR128,. + 0
-	.type	__func__.9053, %object
-	.size	__func__.9053, 14
-__func__.9053:
+	.section	.rodata.__func__.9158,"a",%progbits
+	.set	.LANCHOR127,. + 0
+	.type	__func__.9158, %object
+	.size	__func__.9158, 14
+__func__.9158:
 	.ascii	"FtlBbt2Bitmap\000"
-	.section	.rodata.__func__.9088,"a",%progbits
-	.set	.LANCHOR141,. + 0
-	.type	__func__.9088, %object
-	.size	__func__.9088, 11
-__func__.9088:
+	.section	.rodata.__func__.9193,"a",%progbits
+	.set	.LANCHOR140,. + 0
+	.type	__func__.9193, %object
+	.size	__func__.9193, 11
+__func__.9193:
 	.ascii	"FtlLoadBbt\000"
-	.section	.rodata.__func__.9203,"a",%progbits
-	.set	.LANCHOR49,. + 0
-	.type	__func__.9203, %object
-	.size	__func__.9203, 17
-__func__.9203:
+	.section	.rodata.__func__.9308,"a",%progbits
+	.set	.LANCHOR48,. + 0
+	.type	__func__.9308, %object
+	.size	__func__.9308, 17
+__func__.9308:
 	.ascii	"INSERT_FREE_LIST\000"
-	.section	.rodata.__func__.9208,"a",%progbits
-	.set	.LANCHOR45,. + 0
-	.type	__func__.9208, %object
-	.size	__func__.9208, 17
-__func__.9208:
+	.section	.rodata.__func__.9313,"a",%progbits
+	.set	.LANCHOR44,. + 0
+	.type	__func__.9313, %object
+	.size	__func__.9313, 17
+__func__.9313:
 	.ascii	"INSERT_DATA_LIST\000"
-	.section	.rodata.__func__.9239,"a",%progbits
-	.set	.LANCHOR50,. + 0
-	.type	__func__.9239, %object
-	.size	__func__.9239, 17
-__func__.9239:
+	.section	.rodata.__func__.9344,"a",%progbits
+	.set	.LANCHOR49,. + 0
+	.type	__func__.9344, %object
+	.size	__func__.9344, 17
+__func__.9344:
 	.ascii	"List_remove_node\000"
-	.section	.rodata.__func__.9271,"a",%progbits
-	.set	.LANCHOR54,. + 0
-	.type	__func__.9271, %object
-	.size	__func__.9271, 22
-__func__.9271:
+	.section	.rodata.__func__.9376,"a",%progbits
+	.set	.LANCHOR53,. + 0
+	.type	__func__.9376, %object
+	.size	__func__.9376, 22
+__func__.9376:
 	.ascii	"List_update_data_list\000"
-	.section	.rodata.__func__.9280,"a",%progbits
-	.set	.LANCHOR150,. + 0
-	.type	__func__.9280, %object
-	.size	__func__.9280, 16
-__func__.9280:
+	.section	.rodata.__func__.9385,"a",%progbits
+	.set	.LANCHOR149,. + 0
+	.type	__func__.9385, %object
+	.size	__func__.9385, 16
+__func__.9385:
 	.ascii	"load_l2p_region\000"
-	.section	.rodata.__func__.9313,"a",%progbits
-	.set	.LANCHOR81,. + 0
-	.type	__func__.9313, %object
-	.size	__func__.9313, 26
-__func__.9313:
+	.section	.rodata.__func__.9418,"a",%progbits
+	.set	.LANCHOR80,. + 0
+	.type	__func__.9418, %object
+	.size	__func__.9418, 26
+__func__.9418:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.section	.rodata.__func__.9324,"a",%progbits
-	.set	.LANCHOR151,. + 0
-	.type	__func__.9324, %object
-	.size	__func__.9324, 15
-__func__.9324:
+	.section	.rodata.__func__.9429,"a",%progbits
+	.set	.LANCHOR150,. + 0
+	.type	__func__.9429, %object
+	.size	__func__.9429, 15
+__func__.9429:
 	.ascii	"ftl_map_blk_gc\000"
-	.section	.rodata.__func__.9339,"a",%progbits
-	.set	.LANCHOR148,. + 0
-	.type	__func__.9339, %object
-	.size	__func__.9339, 31
-__func__.9339:
+	.section	.rodata.__func__.9444,"a",%progbits
+	.set	.LANCHOR147,. + 0
+	.type	__func__.9444, %object
+	.size	__func__.9444, 31
+__func__.9444:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.section	.rodata.__func__.9353,"a",%progbits
-	.set	.LANCHOR149,. + 0
-	.type	__func__.9353, %object
-	.size	__func__.9353, 16
-__func__.9353:
+	.section	.rodata.__func__.9458,"a",%progbits
+	.set	.LANCHOR148,. + 0
+	.type	__func__.9458, %object
+	.size	__func__.9458, 16
+__func__.9458:
 	.ascii	"FtlMapWritePage\000"
-	.section	.rodata.__func__.9378,"a",%progbits
-	.set	.LANCHOR57,. + 0
-	.type	__func__.9378, %object
-	.size	__func__.9378, 22
-__func__.9378:
+	.section	.rodata.__func__.9483,"a",%progbits
+	.set	.LANCHOR56,. + 0
+	.type	__func__.9483, %object
+	.size	__func__.9483, 22
+__func__.9483:
 	.ascii	"select_l2p_ram_region\000"
-	.section	.rodata.__func__.9395,"a",%progbits
-	.set	.LANCHOR153,. + 0
-	.type	__func__.9395, %object
-	.size	__func__.9395, 9
-__func__.9395:
+	.section	.rodata.__func__.9500,"a",%progbits
+	.set	.LANCHOR152,. + 0
+	.type	__func__.9500, %object
+	.size	__func__.9500, 9
+__func__.9500:
 	.ascii	"log2phys\000"
-	.section	.rodata.__func__.9459,"a",%progbits
-	.set	.LANCHOR165,. + 0
-	.type	__func__.9459, %object
-	.size	__func__.9459, 15
-__func__.9459:
+	.section	.rodata.__func__.9564,"a",%progbits
+	.set	.LANCHOR164,. + 0
+	.type	__func__.9564, %object
+	.size	__func__.9564, 15
+__func__.9564:
 	.ascii	"FtlVpcTblFlush\000"
-	.section	.rodata.__func__.9481,"a",%progbits
-	.set	.LANCHOR140,. + 0
-	.type	__func__.9481, %object
-	.size	__func__.9481, 14
-__func__.9481:
+	.section	.rodata.__func__.9586,"a",%progbits
+	.set	.LANCHOR139,. + 0
+	.type	__func__.9586, %object
+	.size	__func__.9586, 14
+__func__.9586:
 	.ascii	"FtlScanSysBlk\000"
-	.section	.rodata.__func__.9537,"a",%progbits
-	.set	.LANCHOR178,. + 0
-	.type	__func__.9537, %object
-	.size	__func__.9537, 15
-__func__.9537:
+	.section	.rodata.__func__.9635,"a",%progbits
+	.set	.LANCHOR177,. + 0
+	.type	__func__.9635, %object
+	.size	__func__.9635, 15
+__func__.9635:
 	.ascii	"FtlLoadSysInfo\000"
-	.section	.rodata.__func__.9559,"a",%progbits
-	.set	.LANCHOR180,. + 0
-	.type	__func__.9559, %object
-	.size	__func__.9559, 18
-__func__.9559:
+	.section	.rodata.__func__.9657,"a",%progbits
+	.set	.LANCHOR179,. + 0
+	.type	__func__.9657, %object
+	.size	__func__.9657, 18
+__func__.9657:
 	.ascii	"FtlMapTblRecovery\000"
-	.section	.rodata.__func__.9605,"a",%progbits
-	.set	.LANCHOR154,. + 0
-	.type	__func__.9605, %object
-	.size	__func__.9605, 16
-__func__.9605:
+	.section	.rodata.__func__.9703,"a",%progbits
+	.set	.LANCHOR153,. + 0
+	.type	__func__.9703, %object
+	.size	__func__.9703, 16
+__func__.9703:
 	.ascii	"FtlReUsePrevPpa\000"
-	.section	.rodata.__func__.9639,"a",%progbits
-	.set	.LANCHOR155,. + 0
-	.type	__func__.9639, %object
-	.size	__func__.9639, 22
-__func__.9639:
+	.section	.rodata.__func__.9737,"a",%progbits
+	.set	.LANCHOR154,. + 0
+	.type	__func__.9737, %object
+	.size	__func__.9737, 22
+__func__.9737:
 	.ascii	"FtlRecoverySuperblock\000"
-	.section	.rodata.__func__.9696,"a",%progbits
-	.set	.LANCHOR60,. + 0
-	.type	__func__.9696, %object
-	.size	__func__.9696, 16
-__func__.9696:
+	.section	.rodata.__func__.9794,"a",%progbits
+	.set	.LANCHOR59,. + 0
+	.type	__func__.9794, %object
+	.size	__func__.9794, 16
+__func__.9794:
 	.ascii	"make_superblock\000"
-	.section	.rodata.__func__.9717,"a",%progbits
-	.set	.LANCHOR136,. + 0
-	.type	__func__.9717, %object
-	.size	__func__.9717, 18
-__func__.9717:
+	.section	.rodata.__func__.9815,"a",%progbits
+	.set	.LANCHOR135,. + 0
+	.type	__func__.9815, %object
+	.size	__func__.9815, 18
+__func__.9815:
 	.ascii	"SupperBlkListInit\000"
-	.section	.rodata.__func__.9744,"a",%progbits
-	.set	.LANCHOR159,. + 0
-	.type	__func__.9744, %object
-	.size	__func__.9744, 14
-__func__.9744:
+	.section	.rodata.__func__.9842,"a",%progbits
+	.set	.LANCHOR158,. + 0
+	.type	__func__.9842, %object
+	.size	__func__.9842, 14
+__func__.9842:
 	.ascii	"ftl_check_vpc\000"
-	.section	.rodata.__func__.9809,"a",%progbits
-	.set	.LANCHOR144,. + 0
-	.type	__func__.9809, %object
-	.size	__func__.9809, 25
-__func__.9809:
+	.section	.rodata.__func__.9907,"a",%progbits
+	.set	.LANCHOR143,. + 0
+	.type	__func__.9907, %object
+	.size	__func__.9907, 25
+__func__.9907:
 	.ascii	"allocate_data_superblock\000"
-	.section	.rodata.__func__.9830,"a",%progbits
-	.set	.LANCHOR168,. + 0
-	.type	__func__.9830, %object
-	.size	__func__.9830, 29
-__func__.9830:
+	.section	.rodata.__func__.9928,"a",%progbits
+	.set	.LANCHOR167,. + 0
+	.type	__func__.9928, %object
+	.size	__func__.9928, 29
+__func__.9928:
 	.ascii	"allocate_new_data_superblock\000"
-	.section	.rodata.__func__.9837,"a",%progbits
-	.set	.LANCHOR61,. + 0
-	.type	__func__.9837, %object
-	.size	__func__.9837, 19
-__func__.9837:
+	.section	.rodata.__func__.9935,"a",%progbits
+	.set	.LANCHOR60,. + 0
+	.type	__func__.9935, %object
+	.size	__func__.9935, 19
+__func__.9935:
 	.ascii	"get_new_active_ppa\000"
-	.section	.rodata.__func__.9850,"a",%progbits
-	.set	.LANCHOR146,. + 0
-	.type	__func__.9850, %object
-	.size	__func__.9850, 16
-__func__.9850:
+	.section	.rodata.__func__.9948,"a",%progbits
+	.set	.LANCHOR145,. + 0
+	.type	__func__.9948, %object
+	.size	__func__.9948, 16
+__func__.9948:
 	.ascii	"update_vpc_list\000"
-	.section	.rodata.__func__.9857,"a",%progbits
-	.set	.LANCHOR147,. + 0
-	.type	__func__.9857, %object
-	.size	__func__.9857, 20
-__func__.9857:
+	.section	.rodata.__func__.9955,"a",%progbits
+	.set	.LANCHOR146,. + 0
+	.type	__func__.9955, %object
+	.size	__func__.9955, 20
+__func__.9955:
 	.ascii	"decrement_vpc_count\000"
-	.section	.rodata.__func__.9927,"a",%progbits
-	.set	.LANCHOR170,. + 0
-	.type	__func__.9927, %object
-	.size	__func__.9927, 19
-__func__.9927:
-	.ascii	"FtlGcFreeTempBlock\000"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",%progbits,1
 .LC21:
 	.ascii	"decrement_vpc_count %x = %d\012\000"
@@ -14690,7 +14548,7 @@ __func__.9927:
 .LC33:
 	.ascii	"scan lpa = %x ppa= %x\012\000"
 .LC34:
-	.ascii	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\012"
+	.ascii	"lpa = %x,addr= %x,spare= %x %x %x %x data=%x %x\012"
 	.ascii	"\000"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",%progbits,1
 .LC24:
@@ -14715,5 +14573,5 @@ __func__.9927:
 	.ascii	"\012\000"
 	.section	.rodata.sftl_init.str1.1,"aMS",%progbits,1
 .LC49:
-	.ascii	"SFTL version: 5.0.51 20191028\000"
+	.ascii	"SFTL version: 5.0.55 20200925\000"
 	.hidden	free
diff --git a/drivers/rkflash/rk_sftl_arm_v8.S b/drivers/rkflash/rk_sftl_arm_v8.S
index 8ae51384e4..5846acbd25 100644
--- a/drivers/rkflash/rk_sftl_arm_v8.S
+++ b/drivers/rkflash/rk_sftl_arm_v8.S
@@ -2,7 +2,7 @@
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:    GPL-2.0
- * date: 2019-10-28
+ * date: 2020-09-25
  */
 	.arch armv8-a+nosimd
 	.file	"rk_sftl.c"
@@ -32,22 +32,6 @@ l2p_addr_tran.isra.0:
 	str	w4, [x2]
 	ret
 	.size	l2p_addr_tran.isra.0, .-l2p_addr_tran.isra.0
-	.section	.text.ftl_set_blk_mode.part.6,"ax",@progbits
-	.align	2
-	.type	ftl_set_blk_mode.part.6, %function
-ftl_set_blk_mode.part.6:
-	and	w0, w0, 65535
-	adrp	x2, .LANCHOR1
-	ubfx	x1, x0, 5, 11
-	ldr	x3, [x2, #:lo12:.LANCHOR1]
-	lsl	x1, x1, 2
-	mov	w2, 1
-	lsl	w2, w2, w0
-	ldr	w0, [x3, x1]
-	orr	w0, w0, w2
-	str	w0, [x3, x1]
-	ret
-	.size	ftl_set_blk_mode.part.6, .-ftl_set_blk_mode.part.6
 	.section	.text.Ftl_log2,"ax",@progbits
 	.align	2
 	.global	Ftl_log2
@@ -55,16 +39,16 @@ ftl_set_blk_mode.part.6:
 Ftl_log2:
 	mov	w2, 1
 	mov	w1, 0
-.L5:
+.L4:
 	cmp	w2, w0
-	bls	.L6
+	bls	.L5
 	sub	w0, w1, #1
 	ret
-.L6:
+.L5:
 	add	w1, w1, 1
 	lsl	w2, w2, 1
 	and	w1, w1, 65535
-	b	.L5
+	b	.L4
 	.size	Ftl_log2, .-Ftl_log2
 	.section	.text.FtlPrintInfo,"ax",@progbits
 	.align	2
@@ -81,25 +65,25 @@ FtlSysBlkNumInit:
 	and	w0, w0, 65535
 	mov	w1, 24
 	cmp	w0, 24
-	adrp	x2, .LANCHOR4
+	adrp	x2, .LANCHOR3
 	csel	w0, w0, w1, cs
-	adrp	x1, .LANCHOR2
+	adrp	x1, .LANCHOR1
 	and	w0, w0, 65535
-	str	w0, [x1, #:lo12:.LANCHOR2]
-	adrp	x1, .LANCHOR3
-	ldrh	w1, [x1, #:lo12:.LANCHOR3]
+	str	w0, [x1, #:lo12:.LANCHOR1]
+	adrp	x1, .LANCHOR2
+	ldrh	w1, [x1, #:lo12:.LANCHOR2]
 	mul	w1, w1, w0
-	str	w1, [x2, #:lo12:.LANCHOR4]
-	adrp	x2, .LANCHOR6
-	ldrh	w2, [x2, #:lo12:.LANCHOR6]
-	sub	w0, w2, w0
+	str	w1, [x2, #:lo12:.LANCHOR3]
 	adrp	x2, .LANCHOR5
-	strh	w0, [x2, #:lo12:.LANCHOR5]
-	adrp	x0, .LANCHOR8
-	ldr	w0, [x0, #:lo12:.LANCHOR8]
-	sub	w1, w0, w1
+	ldrh	w2, [x2, #:lo12:.LANCHOR5]
+	sub	w0, w2, w0
+	adrp	x2, .LANCHOR4
+	strh	w0, [x2, #:lo12:.LANCHOR4]
 	adrp	x0, .LANCHOR7
-	str	w1, [x0, #:lo12:.LANCHOR7]
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	sub	w1, w0, w1
+	adrp	x0, .LANCHOR6
+	str	w1, [x0, #:lo12:.LANCHOR6]
 	mov	w0, 0
 	ret
 	.size	FtlSysBlkNumInit, .-FtlSysBlkNumInit
@@ -110,200 +94,200 @@ FtlSysBlkNumInit:
 FtlConstantsInit:
 	stp	x29, x30, [sp, -16]!
 	mov	x5, x0
-	adrp	x2, .LANCHOR11
-	adrp	x1, .LANCHOR6
+	adrp	x2, .LANCHOR10
+	adrp	x1, .LANCHOR5
 	add	x29, sp, 0
 	ldrh	w3, [x0]
-	adrp	x0, .LANCHOR9
+	adrp	x0, .LANCHOR8
 	ldrh	w4, [x5, 2]
-	adrp	x6, .LANCHOR12
-	strh	w3, [x0, #:lo12:.LANCHOR9]
-	adrp	x0, .LANCHOR10
+	adrp	x6, .LANCHOR11
+	strh	w3, [x0, #:lo12:.LANCHOR8]
+	adrp	x0, .LANCHOR9
 	ldrh	w7, [x5, 14]
-	strh	w4, [x0, #:lo12:.LANCHOR10]
+	strh	w4, [x0, #:lo12:.LANCHOR9]
 	ldrh	w8, [x5, 4]
 	cmp	w7, 4
 	ldrh	w0, [x5, 6]
-	strh	w8, [x2, #:lo12:.LANCHOR11]
-	strh	w0, [x1, #:lo12:.LANCHOR6]
-	strh	w7, [x6, #:lo12:.LANCHOR12]
-	bne	.L10
+	strh	w8, [x2, #:lo12:.LANCHOR10]
+	strh	w0, [x1, #:lo12:.LANCHOR5]
+	strh	w7, [x6, #:lo12:.LANCHOR11]
+	bne	.L9
 	lsr	w0, w0, 1
-	strh	w0, [x1, #:lo12:.LANCHOR6]
+	strh	w0, [x1, #:lo12:.LANCHOR5]
 	mov	w0, 8
-	strh	w0, [x6, #:lo12:.LANCHOR12]
-.L11:
-	adrp	x7, .LANCHOR13
-	add	x7, x7, :lo12:.LANCHOR13
+	strh	w0, [x6, #:lo12:.LANCHOR11]
+.L10:
+	adrp	x7, .LANCHOR12
+	add	x7, x7, :lo12:.LANCHOR12
 	mov	x0, 0
-.L12:
+.L11:
 	strb	w0, [x0, x7]
 	add	x0, x0, 1
 	cmp	x0, 32
-	bne	.L12
-	adrp	x0, .LANCHOR14
+	bne	.L11
+	adrp	x0, .LANCHOR13
 	mov	w7, 5
 	cmp	w3, 1
-	strh	w7, [x0, #:lo12:.LANCHOR14]
-	adrp	x7, .LANCHOR15
-	strh	wzr, [x7, #:lo12:.LANCHOR15]
-	bne	.L13
-	strh	w3, [x0, #:lo12:.LANCHOR14]
-.L13:
-	adrp	x0, .LANCHOR16
+	strh	w7, [x0, #:lo12:.LANCHOR13]
+	adrp	x7, .LANCHOR14
+	strh	wzr, [x7, #:lo12:.LANCHOR14]
+	bne	.L12
+	strh	w3, [x0, #:lo12:.LANCHOR13]
+.L12:
+	adrp	x0, .LANCHOR15
 	mov	w3, 640
-	strh	w3, [x0, #:lo12:.LANCHOR16]
-	ldrh	w0, [x2, #:lo12:.LANCHOR11]
-	adrp	x2, .LANCHOR3
-	ldrh	w3, [x1, #:lo12:.LANCHOR6]
-	adrp	x1, .LANCHOR17
+	strh	w3, [x0, #:lo12:.LANCHOR15]
+	ldrh	w0, [x2, #:lo12:.LANCHOR10]
+	adrp	x2, .LANCHOR2
+	ldrh	w3, [x1, #:lo12:.LANCHOR5]
+	adrp	x1, .LANCHOR16
 	mul	w4, w4, w0
 	mul	w0, w0, w3
 	and	w4, w4, 65535
-	strh	w4, [x2, #:lo12:.LANCHOR3]
+	strh	w4, [x2, #:lo12:.LANCHOR2]
 	and	w0, w0, 65535
-	strh	w0, [x1, #:lo12:.LANCHOR17]
+	strh	w0, [x1, #:lo12:.LANCHOR16]
 	bl	Ftl_log2
 	ldrh	w7, [x5, 12]
-	adrp	x1, .LANCHOR18
-	ldrh	w6, [x6, #:lo12:.LANCHOR12]
-	adrp	x8, .LANCHOR19
-	strh	w0, [x1, #:lo12:.LANCHOR18]
-	adrp	x0, .LANCHOR20
+	adrp	x1, .LANCHOR17
+	ldrh	w6, [x6, #:lo12:.LANCHOR11]
+	adrp	x8, .LANCHOR18
+	strh	w0, [x1, #:lo12:.LANCHOR17]
+	adrp	x0, .LANCHOR19
 	mul	w1, w4, w7
-	strh	w7, [x8, #:lo12:.LANCHOR19]
-	strh	w7, [x0, #:lo12:.LANCHOR20]
-	adrp	x0, .LANCHOR21
-	strh	w1, [x0, #:lo12:.LANCHOR21]
+	strh	w7, [x8, #:lo12:.LANCHOR18]
+	strh	w7, [x0, #:lo12:.LANCHOR19]
+	adrp	x0, .LANCHOR20
+	strh	w1, [x0, #:lo12:.LANCHOR20]
 	mov	w0, w6
 	bl	Ftl_log2
 	and	w10, w0, 65535
-	adrp	x2, .LANCHOR22
+	adrp	x2, .LANCHOR21
 	ubfiz	w1, w6, 9, 7
-	strh	w0, [x2, #:lo12:.LANCHOR22]
+	strh	w0, [x2, #:lo12:.LANCHOR21]
+	adrp	x0, .LANCHOR22
+	strh	w1, [x0, #:lo12:.LANCHOR22]
 	adrp	x0, .LANCHOR23
+	ubfx	w1, w1, 8, 8
 	strh	w1, [x0, #:lo12:.LANCHOR23]
 	adrp	x0, .LANCHOR24
-	ubfx	w1, w1, 8, 8
-	strh	w1, [x0, #:lo12:.LANCHOR24]
-	adrp	x0, .LANCHOR25
 	ldrh	w1, [x5, 20]
-	adrp	x5, .LANCHOR27
-	strh	w1, [x0, #:lo12:.LANCHOR25]
+	adrp	x5, .LANCHOR26
+	strh	w1, [x0, #:lo12:.LANCHOR24]
 	mul	w0, w4, w3
-	adrp	x1, .LANCHOR8
-	str	w0, [x1, #:lo12:.LANCHOR8]
-	adrp	x1, .LANCHOR26
+	adrp	x1, .LANCHOR7
+	str	w0, [x1, #:lo12:.LANCHOR7]
+	adrp	x1, .LANCHOR25
 	mul	w0, w0, w6
 	mul	w6, w6, w7
 	mul	w0, w0, w7
 	mov	x7, x2
 	asr	w0, w0, 11
-	str	w0, [x1, #:lo12:.LANCHOR26]
+	str	w0, [x1, #:lo12:.LANCHOR25]
 	mov	w0, 5120
 	sdiv	w0, w0, w6
 	and	w0, w0, 65535
 	cmp	w0, 4
-	bls	.L14
-.L20:
-	strh	w0, [x5, #:lo12:.LANCHOR27]
-	adrp	x1, .LANCHOR28
+	bls	.L13
+.L19:
+	strh	w0, [x5, #:lo12:.LANCHOR26]
+	adrp	x1, .LANCHOR27
 	mov	w0, 640
 	lsl	w3, w3, 6
 	asr	w0, w0, w10
 	add	w0, w0, 2
-	strh	w0, [x1, #:lo12:.LANCHOR28]
+	strh	w0, [x1, #:lo12:.LANCHOR27]
 	add	w0, w10, 9
-	adrp	x1, .LANCHOR30
+	adrp	x1, .LANCHOR29
 	cmp	w4, 1
 	asr	w3, w3, w0
-	adrp	x0, .LANCHOR29
-	adrp	x6, .LANCHOR2
-	strh	w3, [x0, #:lo12:.LANCHOR29]
+	adrp	x0, .LANCHOR28
+	adrp	x6, .LANCHOR1
+	strh	w3, [x0, #:lo12:.LANCHOR28]
 	and	w3, w3, 65535
 	mul	w0, w3, w4
 	add	w3, w3, 8
-	str	w0, [x1, #:lo12:.LANCHOR30]
-	ldrh	w0, [x5, #:lo12:.LANCHOR27]
+	str	w0, [x1, #:lo12:.LANCHOR29]
+	ldrh	w0, [x5, #:lo12:.LANCHOR26]
 	udiv	w0, w0, w4
 	mov	x4, x1
 	add	w3, w0, w3
-	beq	.L16
-.L21:
-	str	w3, [x6, #:lo12:.LANCHOR2]
-	ldrh	w0, [x6, #:lo12:.LANCHOR2]
+	beq	.L15
+.L20:
+	str	w3, [x6, #:lo12:.LANCHOR1]
+	ldrh	w0, [x6, #:lo12:.LANCHOR1]
 	bl	FtlSysBlkNumInit
-	ldr	w1, [x6, #:lo12:.LANCHOR2]
-	adrp	x0, .LANCHOR31
+	ldr	w1, [x6, #:lo12:.LANCHOR1]
+	adrp	x0, .LANCHOR30
 	ldp	x29, x30, [sp], 16
-	str	w1, [x0, #:lo12:.LANCHOR31]
-	adrp	x0, .LANCHOR7
-	ldrh	w1, [x8, #:lo12:.LANCHOR19]
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	str	w1, [x0, #:lo12:.LANCHOR30]
+	adrp	x0, .LANCHOR6
+	ldrh	w1, [x8, #:lo12:.LANCHOR18]
+	ldr	w0, [x0, #:lo12:.LANCHOR6]
 	lsl	w0, w0, 2
 	mul	w0, w0, w1
-	ldrh	w1, [x7, #:lo12:.LANCHOR22]
+	ldrh	w1, [x7, #:lo12:.LANCHOR21]
 	add	w1, w1, 9
 	lsr	w0, w0, w1
-	adrp	x1, .LANCHOR32
+	adrp	x1, .LANCHOR31
 	add	w0, w0, 2
-	strh	w0, [x1, #:lo12:.LANCHOR32]
-	adrp	x0, .LANCHOR33
+	strh	w0, [x1, #:lo12:.LANCHOR31]
+	adrp	x0, .LANCHOR32
 	mov	w1, 32
-	strh	w1, [x0, #:lo12:.LANCHOR33]
-	adrp	x0, .LANCHOR34
-	str	wzr, [x0, #:lo12:.LANCHOR34]
-	ldrh	w0, [x5, #:lo12:.LANCHOR27]
+	strh	w1, [x0, #:lo12:.LANCHOR32]
+	adrp	x0, .LANCHOR33
+	str	wzr, [x0, #:lo12:.LANCHOR33]
+	ldrh	w0, [x5, #:lo12:.LANCHOR26]
 	add	w0, w0, 3
-	strh	w0, [x5, #:lo12:.LANCHOR27]
-	ldr	w0, [x4, #:lo12:.LANCHOR30]
+	strh	w0, [x5, #:lo12:.LANCHOR26]
+	ldr	w0, [x4, #:lo12:.LANCHOR29]
 	add	w0, w0, 3
-	str	w0, [x4, #:lo12:.LANCHOR30]
+	str	w0, [x4, #:lo12:.LANCHOR29]
 	mov	w0, 0
 	ret
-.L10:
+.L9:
 	cmp	w7, 8
-	bne	.L11
+	bne	.L10
 	cmp	w8, 1
-	bne	.L11
+	bne	.L10
 	lsr	w0, w0, 1
-	strh	w0, [x1, #:lo12:.LANCHOR6]
+	strh	w0, [x1, #:lo12:.LANCHOR5]
 	mov	w0, 2
-	strh	w0, [x2, #:lo12:.LANCHOR11]
-	b	.L11
-.L14:
+	strh	w0, [x2, #:lo12:.LANCHOR10]
+	b	.L10
+.L13:
 	mov	w0, 4
-	b	.L20
-.L16:
+	b	.L19
+.L15:
 	add	w3, w3, 4
-	b	.L21
+	b	.L20
 	.size	FtlConstantsInit, .-FtlConstantsInit
 	.section	.text.IsBlkInVendorPart,"ax",@progbits
 	.align	2
 	.global	IsBlkInVendorPart
 	.type	IsBlkInVendorPart, %function
 IsBlkInVendorPart:
-	adrp	x1, .LANCHOR35
+	adrp	x1, .LANCHOR34
 	and	w0, w0, 65535
-	ldrh	w1, [x1, #:lo12:.LANCHOR35]
-	cbz	w1, .L26
-	adrp	x1, .LANCHOR27
-	ldrh	w2, [x1, #:lo12:.LANCHOR27]
-	adrp	x1, .LANCHOR36
-	ldr	x3, [x1, #:lo12:.LANCHOR36]
+	ldrh	w1, [x1, #:lo12:.LANCHOR34]
+	cbz	w1, .L25
+	adrp	x1, .LANCHOR26
+	ldrh	w2, [x1, #:lo12:.LANCHOR26]
+	adrp	x1, .LANCHOR35
+	ldr	x3, [x1, #:lo12:.LANCHOR35]
 	mov	x1, 0
-.L24:
+.L23:
 	cmp	w2, w1, uxth
-	bhi	.L25
-.L26:
+	bhi	.L24
+.L25:
 	mov	w0, 0
 	ret
-.L25:
+.L24:
 	add	x1, x1, 1
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w0
-	bne	.L24
+	bne	.L23
 	mov	w0, 1
 	ret
 	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
@@ -320,8 +304,8 @@ FtlCacheWriteBack:
 	.global	sftl_get_density
 	.type	sftl_get_density, %function
 sftl_get_density:
-	adrp	x0, .LANCHOR34
-	ldr	w0, [x0, #:lo12:.LANCHOR34]
+	adrp	x0, .LANCHOR33
+	ldr	w0, [x0, #:lo12:.LANCHOR33]
 	ret
 	.size	sftl_get_density, .-sftl_get_density
 	.section	.text.FtlBbmMapBadBlock,"ax",@progbits
@@ -331,13 +315,13 @@ sftl_get_density:
 FtlBbmMapBadBlock:
 	stp	x29, x30, [sp, -32]!
 	and	w1, w0, 65535
-	adrp	x0, .LANCHOR17
+	adrp	x0, .LANCHOR16
 	mov	w4, 1
 	add	x29, sp, 0
-	ldrh	w0, [x0, #:lo12:.LANCHOR17]
+	ldrh	w0, [x0, #:lo12:.LANCHOR16]
 	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR37
-	add	x19, x19, :lo12:.LANCHOR37
+	adrp	x19, .LANCHOR36
+	add	x19, x19, :lo12:.LANCHOR36
 	udiv	w3, w1, w0
 	and	w2, w3, 65535
 	msub	w3, w3, w0, w1
@@ -366,13 +350,13 @@ FtlBbmMapBadBlock:
 	.global	FtlBbmIsBadBlock
 	.type	FtlBbmIsBadBlock, %function
 FtlBbmIsBadBlock:
-	adrp	x1, .LANCHOR17
+	adrp	x1, .LANCHOR16
 	and	w0, w0, 65535
-	ldrh	w1, [x1, #:lo12:.LANCHOR17]
+	ldrh	w1, [x1, #:lo12:.LANCHOR16]
 	udiv	w2, w0, w1
 	msub	w0, w2, w1, w0
-	adrp	x1, .LANCHOR37
-	add	x1, x1, :lo12:.LANCHOR37
+	adrp	x1, .LANCHOR36
+	add	x1, x1, :lo12:.LANCHOR36
 	add	x2, x1, x2, uxth 3
 	and	w0, w0, 65535
 	ubfx	x3, x0, 5, 11
@@ -394,12 +378,12 @@ FtlBbtInfoPrint:
 	.global	V2P_block
 	.type	V2P_block, %function
 V2P_block:
-	adrp	x2, .LANCHOR11
+	adrp	x2, .LANCHOR10
 	and	w0, w0, 65535
-	adrp	x4, .LANCHOR17
+	adrp	x4, .LANCHOR16
 	and	w1, w1, 65535
-	ldrh	w2, [x2, #:lo12:.LANCHOR11]
-	ldrh	w4, [x4, #:lo12:.LANCHOR17]
+	ldrh	w2, [x2, #:lo12:.LANCHOR10]
+	ldrh	w4, [x4, #:lo12:.LANCHOR16]
 	udiv	w3, w0, w2
 	msub	w0, w3, w2, w0
 	madd	w2, w2, w1, w0
@@ -412,10 +396,10 @@ V2P_block:
 	.type	P2V_plane, %function
 P2V_plane:
 	and	w3, w0, 65535
-	adrp	x0, .LANCHOR11
-	ldrh	w1, [x0, #:lo12:.LANCHOR11]
-	adrp	x0, .LANCHOR17
-	ldrh	w2, [x0, #:lo12:.LANCHOR17]
+	adrp	x0, .LANCHOR10
+	ldrh	w1, [x0, #:lo12:.LANCHOR10]
+	adrp	x0, .LANCHOR16
+	ldrh	w2, [x0, #:lo12:.LANCHOR16]
 	udiv	w0, w3, w1
 	udiv	w2, w3, w2
 	msub	w0, w0, w1, w3
@@ -428,12 +412,12 @@ P2V_plane:
 	.type	P2V_block_in_plane, %function
 P2V_block_in_plane:
 	and	w2, w0, 65535
-	adrp	x0, .LANCHOR17
-	ldrh	w1, [x0, #:lo12:.LANCHOR17]
+	adrp	x0, .LANCHOR16
+	ldrh	w1, [x0, #:lo12:.LANCHOR16]
 	udiv	w0, w2, w1
 	msub	w0, w0, w1, w2
-	adrp	x1, .LANCHOR11
-	ldrh	w1, [x1, #:lo12:.LANCHOR11]
+	adrp	x1, .LANCHOR10
+	ldrh	w1, [x1, #:lo12:.LANCHOR10]
 	and	w0, w0, 65535
 	udiv	w0, w0, w1
 	ret
@@ -445,12 +429,12 @@ P2V_block_in_plane:
 ftl_cmp_data_ver:
 	cmp	w0, w1
 	mov	w2, -2147483648
-	bls	.L38
+	bls	.L37
 	sub	w1, w0, w1
 	cmp	w1, w2
 	cset	w0, ls
 	ret
-.L38:
+.L37:
 	sub	w1, w1, w0
 	cmp	w1, w2
 	cset	w0, hi
@@ -461,8 +445,8 @@ ftl_cmp_data_ver:
 	.global	FtlFreeSysBlkQueueEmpty
 	.type	FtlFreeSysBlkQueueEmpty, %function
 FtlFreeSysBlkQueueEmpty:
-	adrp	x0, .LANCHOR38+6
-	ldrh	w0, [x0, #:lo12:.LANCHOR38+6]
+	adrp	x0, .LANCHOR37+6
+	ldrh	w0, [x0, #:lo12:.LANCHOR37+6]
 	cmp	w0, 0
 	cset	w0, eq
 	ret
@@ -472,8 +456,8 @@ FtlFreeSysBlkQueueEmpty:
 	.global	FtlFreeSysBlkQueueFull
 	.type	FtlFreeSysBlkQueueFull, %function
 FtlFreeSysBlkQueueFull:
-	adrp	x0, .LANCHOR38+6
-	ldrh	w0, [x0, #:lo12:.LANCHOR38+6]
+	adrp	x0, .LANCHOR37+6
+	ldrh	w0, [x0, #:lo12:.LANCHOR37+6]
 	cmp	w0, 1024
 	cset	w0, eq
 	ret
@@ -483,27 +467,27 @@ FtlFreeSysBlkQueueFull:
 	.global	FtlFreeSysBLkSort
 	.type	FtlFreeSysBLkSort, %function
 FtlFreeSysBLkSort:
-	adrp	x0, .LANCHOR38
-	add	x1, x0, :lo12:.LANCHOR38
+	adrp	x0, .LANCHOR37
+	add	x1, x0, :lo12:.LANCHOR37
 	ldrh	w2, [x1, 6]
-	cbz	w2, .L42
-	adrp	x2, .LANCHOR39+28
+	cbz	w2, .L41
+	adrp	x2, .LANCHOR38+28
 	ldrh	w3, [x1, 2]
 	mov	w6, 0
 	mov	w4, 0
-	ldrh	w5, [x2, #:lo12:.LANCHOR39+28]
+	ldrh	w5, [x2, #:lo12:.LANCHOR38+28]
 	ldrh	w2, [x1, 4]
 	and	w5, w5, 31
-.L44:
+.L43:
 	cmp	w5, w4
-	bgt	.L45
-	cbz	w6, .L42
-	add	x0, x0, :lo12:.LANCHOR38
+	bgt	.L44
+	cbz	w6, .L41
+	add	x0, x0, :lo12:.LANCHOR37
 	strh	w3, [x0, 2]
 	strh	w2, [x0, 4]
-.L42:
+.L41:
 	ret
-.L45:
+.L44:
 	add	x6, x1, x3, sxtw 1
 	add	w4, w4, 1
 	add	w3, w3, 1
@@ -515,37 +499,37 @@ FtlFreeSysBLkSort:
 	mov	w6, 1
 	add	w2, w2, w6
 	and	w2, w2, 1023
-	b	.L44
+	b	.L43
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
 	.section	.text.IsInFreeQueue,"ax",@progbits
 	.align	2
 	.global	IsInFreeQueue
 	.type	IsInFreeQueue, %function
 IsInFreeQueue:
-	adrp	x1, .LANCHOR38
-	add	x1, x1, :lo12:.LANCHOR38
+	adrp	x1, .LANCHOR37
+	add	x1, x1, :lo12:.LANCHOR37
 	and	w0, w0, 65535
 	ldrh	w4, [x1, 6]
 	cmp	w4, 1024
-	beq	.L55
+	beq	.L54
 	ldrh	w5, [x1, 2]
 	mov	w3, 0
-.L53:
+.L52:
 	cmp	w3, w4
-	bcc	.L54
-.L55:
+	bcc	.L53
+.L54:
 	mov	w0, 0
 	ret
-.L54:
+.L53:
 	add	w2, w3, w5
 	ubfiz	x2, x2, 1, 10
 	add	x2, x1, x2
 	ldrh	w2, [x2, 8]
 	cmp	w2, w0
-	beq	.L56
+	beq	.L55
 	add	w3, w3, 1
-	b	.L53
-.L56:
+	b	.L52
+.L55:
 	mov	w0, 1
 	ret
 	.size	IsInFreeQueue, .-IsInFreeQueue
@@ -554,33 +538,33 @@ IsInFreeQueue:
 	.global	insert_data_list
 	.type	insert_data_list, %function
 insert_data_list:
-	adrp	x1, .LANCHOR5
+	adrp	x1, .LANCHOR4
 	and	w0, w0, 65535
-	ldrh	w12, [x1, #:lo12:.LANCHOR5]
+	ldrh	w12, [x1, #:lo12:.LANCHOR4]
 	cmp	w12, w0
-	bls	.L59
-	adrp	x1, .LANCHOR40
+	bls	.L58
+	adrp	x1, .LANCHOR39
 	mov	w8, 6
-	ldr	x4, [x1, #:lo12:.LANCHOR40]
+	ldr	x4, [x1, #:lo12:.LANCHOR39]
 	umull	x10, w0, w8
 	mov	w1, -1
 	add	x3, x4, x10
 	strh	w1, [x3, 2]
 	strh	w1, [x4, x10]
-	adrp	x1, .LANCHOR41
+	adrp	x1, .LANCHOR40
 	mov	x15, x1
-	ldr	x7, [x1, #:lo12:.LANCHOR41]
-	cbnz	x7, .L60
-	str	x3, [x1, #:lo12:.LANCHOR41]
-.L59:
+	ldr	x7, [x1, #:lo12:.LANCHOR40]
+	cbnz	x7, .L59
+	str	x3, [x1, #:lo12:.LANCHOR40]
+.L58:
 	mov	w0, 0
 	ret
-.L60:
-	adrp	x1, .LANCHOR42
+.L59:
+	adrp	x1, .LANCHOR41
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
 	mov	w6, 0
-	ldr	x13, [x1, #:lo12:.LANCHOR42]
+	ldr	x13, [x1, #:lo12:.LANCHOR41]
 	ubfiz	x1, x0, 1, 16
 	mov	w16, 65535
 	ldrh	w5, [x13, x1]
@@ -593,48 +577,48 @@ insert_data_list:
 	mul	x1, x1, x2
 	mov	x2, x7
 	and	w1, w1, 65535
-.L65:
+.L64:
 	add	w6, w6, 1
 	and	w6, w6, 65535
 	cmp	w12, w6
-	bcc	.L59
+	bcc	.L58
 	cmp	w1, w0
-	beq	.L59
+	beq	.L58
 	ldrh	w14, [x2, 4]
-	cbz	w14, .L63
+	cbz	w14, .L62
 	ubfiz	x11, x1, 1, 16
 	ldrh	w11, [x13, x11]
 	mul	w11, w11, w14
 	cmp	w5, w11
-	bls	.L63
+	bls	.L62
 	ldrh	w11, [x2]
 	cmp	w11, w16
-	bne	.L64
+	bne	.L63
 	strh	w1, [x3, 2]
 	strh	w0, [x2]
-	adrp	x0, .LANCHOR43
-	str	x3, [x0, #:lo12:.LANCHOR43]
-	b	.L59
-.L64:
+	adrp	x0, .LANCHOR42
+	str	x3, [x0, #:lo12:.LANCHOR42]
+	b	.L58
+.L63:
 	umaddl	x2, w11, w8, x4
 	mov	w1, w11
-	b	.L65
-.L63:
+	b	.L64
+.L62:
 	strh	w1, [x4, x10]
 	cmp	x2, x7
 	ldrh	w1, [x2, 2]
 	strh	w1, [x3, 2]
-	bne	.L66
+	bne	.L65
 	strh	w0, [x2, 2]
-	str	x3, [x15, #:lo12:.LANCHOR41]
-	b	.L59
-.L66:
+	str	x3, [x15, #:lo12:.LANCHOR40]
+	b	.L58
+.L65:
 	ldrh	w1, [x2, 2]
 	mov	w3, 6
 	umull	x1, w1, w3
 	strh	w0, [x4, x1]
 	strh	w0, [x2, 2]
-	b	.L59
+	b	.L58
 	.size	insert_data_list, .-insert_data_list
 	.section	.text.INSERT_DATA_LIST,"ax",@progbits
 	.align	2
@@ -644,23 +628,23 @@ INSERT_DATA_LIST:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	insert_data_list
-	adrp	x1, .LANCHOR44
-	ldrh	w0, [x1, #:lo12:.LANCHOR44]
+	adrp	x1, .LANCHOR43
+	ldrh	w0, [x1, #:lo12:.LANCHOR43]
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	strh	w0, [x1, #:lo12:.LANCHOR44]
-	adrp	x1, .LANCHOR5
-	ldrh	w1, [x1, #:lo12:.LANCHOR5]
+	strh	w0, [x1, #:lo12:.LANCHOR43]
+	adrp	x1, .LANCHOR4
+	ldrh	w1, [x1, #:lo12:.LANCHOR4]
 	cmp	w1, w0
-	bcs	.L71
+	bcs	.L70
 	ldp	x29, x30, [sp], 16
 	mov	w2, 214
-	adrp	x1, .LANCHOR45
+	adrp	x1, .LANCHOR44
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR45
+	add	x1, x1, :lo12:.LANCHOR44
 	add	x0, x0, :lo12:.LC1
 	b	printf
-.L71:
+.L70:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
@@ -672,28 +656,28 @@ insert_free_list:
 	and	w0, w0, 65535
 	mov	w7, 65535
 	cmp	w0, w7
-	beq	.L75
-	adrp	x1, .LANCHOR40
+	beq	.L74
+	adrp	x1, .LANCHOR39
 	mov	w6, 6
-	ldr	x3, [x1, #:lo12:.LANCHOR40]
+	ldr	x3, [x1, #:lo12:.LANCHOR39]
 	umull	x8, w0, w6
 	mov	w1, -1
 	add	x4, x3, x8
 	strh	w1, [x4, 2]
 	strh	w1, [x3, x8]
-	adrp	x1, .LANCHOR46
+	adrp	x1, .LANCHOR45
 	mov	x12, x1
-	ldr	x5, [x1, #:lo12:.LANCHOR46]
-	cbnz	x5, .L76
-	str	x4, [x1, #:lo12:.LANCHOR46]
-.L75:
+	ldr	x5, [x1, #:lo12:.LANCHOR45]
+	cbnz	x5, .L75
+	str	x4, [x1, #:lo12:.LANCHOR45]
+.L74:
 	mov	w0, 0
 	ret
-.L76:
-	adrp	x1, .LANCHOR47
+.L75:
+	adrp	x1, .LANCHOR46
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
-	ldr	x11, [x1, #:lo12:.LANCHOR47]
+	ldr	x11, [x1, #:lo12:.LANCHOR46]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w13, [x11, x1]
 	sub	x1, x5, x3
@@ -701,37 +685,37 @@ insert_free_list:
 	mul	x1, x1, x2
 	mov	x2, x5
 	and	w1, w1, 65535
-.L79:
+.L78:
 	ubfiz	x10, x1, 1, 16
 	ldrh	w10, [x11, x10]
 	cmp	w10, w13
-	bcs	.L77
+	bcs	.L76
 	ldrh	w10, [x2]
 	cmp	w10, w7
-	bne	.L78
+	bne	.L77
 	strh	w1, [x4, 2]
 	strh	w0, [x2]
-	b	.L75
-.L78:
+	b	.L74
+.L77:
 	umaddl	x2, w10, w6, x3
 	mov	w1, w10
-	b	.L79
-.L77:
+	b	.L78
+.L76:
 	ldrh	w6, [x2, 2]
 	cmp	x2, x5
 	strh	w6, [x4, 2]
 	strh	w1, [x3, x8]
-	bne	.L80
+	bne	.L79
 	strh	w0, [x2, 2]
-	str	x4, [x12, #:lo12:.LANCHOR46]
-	b	.L75
-.L80:
+	str	x4, [x12, #:lo12:.LANCHOR45]
+	b	.L74
+.L79:
 	ldrh	w1, [x2, 2]
 	mov	w4, 6
 	umull	x1, w1, w4
 	strh	w0, [x3, x1]
 	strh	w0, [x2, 2]
-	b	.L75
+	b	.L74
 	.size	insert_free_list, .-insert_free_list
 	.section	.text.INSERT_FREE_LIST,"ax",@progbits
 	.align	2
@@ -741,23 +725,23 @@ INSERT_FREE_LIST:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	insert_free_list
-	adrp	x1, .LANCHOR48
-	ldrh	w0, [x1, #:lo12:.LANCHOR48]
+	adrp	x1, .LANCHOR47
+	ldrh	w0, [x1, #:lo12:.LANCHOR47]
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	strh	w0, [x1, #:lo12:.LANCHOR48]
-	adrp	x1, .LANCHOR5
-	ldrh	w1, [x1, #:lo12:.LANCHOR5]
+	strh	w0, [x1, #:lo12:.LANCHOR47]
+	adrp	x1, .LANCHOR4
+	ldrh	w1, [x1, #:lo12:.LANCHOR4]
 	cmp	w1, w0
-	bcs	.L81
+	bcs	.L80
 	ldp	x29, x30, [sp], 16
 	mov	w2, 207
-	adrp	x1, .LANCHOR49
+	adrp	x1, .LANCHOR48
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR49
+	add	x1, x1, :lo12:.LANCHOR48
 	add	x0, x0, :lo12:.LC1
 	b	printf
-.L81:
+.L80:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
@@ -770,37 +754,37 @@ List_remove_node:
 	and	w1, w1, 65535
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR40
+	adrp	x20, .LANCHOR39
 	stp	x21, x22, [sp, 32]
 	mov	x22, x0
 	mov	w0, 6
 	str	x23, [sp, 48]
-	ldr	x23, [x20, #:lo12:.LANCHOR40]
+	ldr	x23, [x20, #:lo12:.LANCHOR39]
 	umull	x21, w1, w0
 	mov	w0, 65535
 	add	x19, x23, x21
 	ldrh	w1, [x19, 2]
 	cmp	w1, w0
-	bne	.L85
+	bne	.L84
 	ldr	x0, [x22]
 	cmp	x19, x0
-	beq	.L85
-	adrp	x1, .LANCHOR50
+	beq	.L84
+	adrp	x1, .LANCHOR49
 	adrp	x0, .LC1
 	mov	w2, 372
-	add	x1, x1, :lo12:.LANCHOR50
+	add	x1, x1, :lo12:.LANCHOR49
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L85:
+.L84:
 	ldr	x0, [x22]
 	mov	w1, 65535
 	cmp	x19, x0
 	ldrh	w0, [x23, x21]
-	bne	.L86
+	bne	.L85
 	cmp	w0, w1
-	bne	.L87
+	bne	.L86
 	str	xzr, [x22]
-.L88:
+.L87:
 	mov	w0, -1
 	strh	w0, [x23, x21]
 	strh	w0, [x19, 2]
@@ -810,35 +794,35 @@ List_remove_node:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L87:
-	ldr	x1, [x20, #:lo12:.LANCHOR40]
+.L86:
+	ldr	x1, [x20, #:lo12:.LANCHOR39]
 	mov	w2, 6
 	umaddl	x0, w0, w2, x1
 	mov	w1, -1
 	str	x0, [x22]
 	strh	w1, [x0, 2]
-	b	.L88
-.L86:
+	b	.L87
+.L85:
 	cmp	w0, w1
 	ldrh	w1, [x19, 2]
-	bne	.L89
+	bne	.L88
 	cmp	w1, w0
-	beq	.L88
+	beq	.L87
 	mov	w0, 6
 	mov	w2, -1
 	umull	x1, w1, w0
-	ldr	x0, [x20, #:lo12:.LANCHOR40]
+	ldr	x0, [x20, #:lo12:.LANCHOR39]
 	strh	w2, [x0, x1]
-	b	.L88
-.L89:
-	ldr	x2, [x20, #:lo12:.LANCHOR40]
+	b	.L87
+.L88:
+	ldr	x2, [x20, #:lo12:.LANCHOR39]
 	mov	w3, 6
 	umaddl	x4, w0, w3, x2
 	strh	w1, [x4, 2]
 	ldrh	w1, [x19, 2]
 	umull	x1, w1, w3
 	strh	w0, [x2, x1]
-	b	.L88
+	b	.L87
 	.size	List_remove_node, .-List_remove_node
 	.section	.text.List_pop_index_node,"ax",@progbits
 	.align	2
@@ -846,18 +830,18 @@ List_remove_node:
 	.type	List_pop_index_node, %function
 List_pop_index_node:
 	ldr	x2, [x0]
-	cbz	x2, .L97
+	cbz	x2, .L96
 	stp	x29, x30, [sp, -32]!
-	adrp	x3, .LANCHOR40
+	adrp	x3, .LANCHOR39
 	and	w1, w1, 65535
 	mov	w4, 65535
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	mov	w5, 6
-	ldr	x19, [x3, #:lo12:.LANCHOR40]
-.L93:
-	cbnz	w1, .L94
-.L96:
+	ldr	x19, [x3, #:lo12:.LANCHOR39]
+.L92:
+	cbnz	w1, .L93
+.L95:
 	sub	x19, x2, x19
 	mov	x2, -6148914691236517206
 	asr	x19, x19, 1
@@ -870,15 +854,15 @@ List_pop_index_node:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L94:
+.L93:
 	ldrh	w3, [x2]
 	cmp	w3, w4
-	beq	.L96
+	beq	.L95
 	sub	w1, w1, #1
 	umaddl	x2, w3, w5, x19
 	and	w1, w1, 65535
-	b	.L93
-.L97:
+	b	.L92
+.L96:
 	mov	w0, 65535
 	ret
 	.size	List_pop_index_node, .-List_pop_index_node
@@ -896,28 +880,28 @@ List_pop_head_node:
 	.type	List_get_gc_head_node, %function
 List_get_gc_head_node:
 	and	w2, w0, 65535
-	adrp	x0, .LANCHOR41
-	ldr	x1, [x0, #:lo12:.LANCHOR41]
-	cbz	x1, .L108
 	adrp	x0, .LANCHOR40
+	ldr	x1, [x0, #:lo12:.LANCHOR40]
+	cbz	x1, .L107
+	adrp	x0, .LANCHOR39
 	mov	w4, 6
-	ldr	x3, [x0, #:lo12:.LANCHOR40]
+	ldr	x3, [x0, #:lo12:.LANCHOR39]
 	mov	w0, 65535
-.L105:
-	cbz	w2, .L106
+.L104:
+	cbz	w2, .L105
 	ldrh	w1, [x1]
 	cmp	w1, w0
-	bne	.L107
+	bne	.L106
 	ret
-.L107:
+.L106:
 	sub	w2, w2, #1
 	umaddl	x1, w1, w4, x3
 	and	w2, w2, 65535
-	b	.L105
-.L108:
+	b	.L104
+.L107:
 	mov	w0, 65535
 	ret
-.L106:
+.L105:
 	sub	x0, x1, x3
 	mov	x1, -6148914691236517206
 	asr	x0, x0, 1
@@ -935,35 +919,35 @@ List_update_data_list:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w19, w0, 65535
-	adrp	x0, .LANCHOR51
+	adrp	x0, .LANCHOR50
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+	ldrh	w0, [x0, #:lo12:.LANCHOR50]
 	stp	x25, x26, [sp, 64]
 	cmp	w0, w19
-	beq	.L111
+	beq	.L110
+	adrp	x0, .LANCHOR51
+	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+	cmp	w0, w19
+	beq	.L110
 	adrp	x0, .LANCHOR52
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
-	beq	.L111
-	adrp	x0, .LANCHOR53
-	ldrh	w0, [x0, #:lo12:.LANCHOR53]
-	cmp	w0, w19
-	beq	.L111
-	adrp	x0, .LANCHOR40
+	beq	.L110
+	adrp	x0, .LANCHOR39
 	mov	w21, 6
-	adrp	x24, .LANCHOR41
+	adrp	x24, .LANCHOR40
 	mov	x26, x0
 	umull	x21, w19, w21
-	ldr	x23, [x0, #:lo12:.LANCHOR40]
-	ldr	x1, [x24, #:lo12:.LANCHOR41]
+	ldr	x23, [x0, #:lo12:.LANCHOR39]
+	ldr	x1, [x24, #:lo12:.LANCHOR40]
 	add	x22, x23, x21
 	cmp	x22, x1
-	beq	.L111
-	adrp	x1, .LANCHOR42
+	beq	.L110
+	adrp	x1, .LANCHOR41
 	ubfiz	x0, x19, 1, 16
 	mov	x25, x1
-	ldr	x2, [x1, #:lo12:.LANCHOR42]
+	ldr	x2, [x1, #:lo12:.LANCHOR41]
 	mov	w1, 65535
 	ldrh	w20, [x2, x0]
 	ldrh	w0, [x22, 4]
@@ -972,60 +956,60 @@ List_update_data_list:
 	ldrh	w0, [x22, 2]
 	csinv	w20, w20, wzr, ne
 	cmp	w0, w1
-	bne	.L114
+	bne	.L113
 	ldrh	w1, [x23, x21]
 	cmp	w1, w0
-	bne	.L114
-	adrp	x1, .LANCHOR54
+	bne	.L113
+	adrp	x1, .LANCHOR53
 	adrp	x0, .LC1
 	mov	w2, 463
-	add	x1, x1, :lo12:.LANCHOR54
+	add	x1, x1, :lo12:.LANCHOR53
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L114:
+.L113:
 	ldrh	w0, [x22, 2]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L115
+	bne	.L114
 	ldrh	w1, [x23, x21]
 	cmp	w1, w0
-	beq	.L111
-.L115:
+	beq	.L110
+.L114:
 	mov	w1, 6
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
 	umull	x0, w0, w1
 	asr	x1, x0, 1
 	mul	x1, x1, x2
-	ldr	x2, [x25, #:lo12:.LANCHOR42]
+	ldr	x2, [x25, #:lo12:.LANCHOR41]
 	ldrh	w1, [x2, x1, lsl 1]
-	ldr	x2, [x26, #:lo12:.LANCHOR40]
+	ldr	x2, [x26, #:lo12:.LANCHOR39]
 	add	x0, x2, x0
 	ldrh	w2, [x0, 4]
 	cmp	w2, 0
 	mul	w0, w1, w2
 	csinv	w0, w0, wzr, ne
 	cmp	w20, w0
-	bcs	.L111
-	adrp	x20, .LANCHOR44
+	bcs	.L110
+	adrp	x20, .LANCHOR43
 	mov	w1, w19
-	add	x0, x24, :lo12:.LANCHOR41
+	add	x0, x24, :lo12:.LANCHOR40
 	bl	List_remove_node
-	ldrh	w0, [x20, #:lo12:.LANCHOR44]
-	cbnz	w0, .L117
-	adrp	x1, .LANCHOR54
+	ldrh	w0, [x20, #:lo12:.LANCHOR43]
+	cbnz	w0, .L116
+	adrp	x1, .LANCHOR53
 	adrp	x0, .LC1
 	mov	w2, 474
-	add	x1, x1, :lo12:.LANCHOR54
+	add	x1, x1, :lo12:.LANCHOR53
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L117:
-	ldrh	w0, [x20, #:lo12:.LANCHOR44]
+.L116:
+	ldrh	w0, [x20, #:lo12:.LANCHOR43]
 	sub	w0, w0, #1
-	strh	w0, [x20, #:lo12:.LANCHOR44]
+	strh	w0, [x20, #:lo12:.LANCHOR43]
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-.L111:
+.L110:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -1040,159 +1024,125 @@ List_update_data_list:
 	.type	select_l2p_ram_region, %function
 select_l2p_ram_region:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR33
+	adrp	x0, .LANCHOR32
 	mov	x1, 0
 	mov	w3, 65535
 	add	x29, sp, 0
-	ldrh	w2, [x0, #:lo12:.LANCHOR33]
-	adrp	x0, .LANCHOR55
+	ldrh	w2, [x0, #:lo12:.LANCHOR32]
+	adrp	x0, .LANCHOR54
 	str	x19, [sp, 16]
-	ldr	x0, [x0, #:lo12:.LANCHOR55]
-.L122:
+	ldr	x0, [x0, #:lo12:.LANCHOR54]
+.L121:
 	and	w19, w1, 65535
 	cmp	w19, w2
-	bcc	.L124
+	bcc	.L123
 	add	x3, x0, 4
 	mov	w19, w2
 	mov	w5, -2147483648
 	mov	w1, 0
-.L125:
+.L124:
 	cmp	w1, w2
-	bne	.L127
+	bne	.L126
 	cmp	w19, w2
-	bcc	.L123
-	adrp	x1, .LANCHOR56
+	bcc	.L122
+	adrp	x1, .LANCHOR55
 	mov	w19, w2
 	mov	w3, -1
-	ldrh	w4, [x1, #:lo12:.LANCHOR56]
+	ldrh	w4, [x1, #:lo12:.LANCHOR55]
 	mov	w1, 0
-.L128:
+.L127:
 	cmp	w1, w2
-	bne	.L130
+	bne	.L129
 	cmp	w19, w1
-	bcc	.L123
+	bcc	.L122
 	mov	w2, 789
-	adrp	x1, .LANCHOR57
+	adrp	x1, .LANCHOR56
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR57
+	add	x1, x1, :lo12:.LANCHOR56
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	b	.L123
-.L124:
+	b	.L122
+.L123:
 	add	x1, x1, 1
 	add	x4, x0, x1, lsl 4
 	ldrh	w4, [x4, -16]
 	cmp	w4, w3
-	bne	.L122
-.L123:
+	bne	.L121
+.L122:
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L127:
+.L126:
 	ldr	w4, [x3]
-	tbnz	w4, #31, .L126
+	tbnz	w4, #31, .L125
 	cmp	w5, w4
-	bls	.L126
+	bls	.L125
 	mov	w5, w4
 	mov	w19, w1
-.L126:
+.L125:
 	add	w1, w1, 1
 	add	x3, x3, 16
 	and	w1, w1, 65535
-	b	.L125
-.L130:
+	b	.L124
+.L129:
 	ldr	w6, [x0, 4]
 	cmp	w3, w6
-	bls	.L129
+	bls	.L128
 	ldrh	w5, [x0]
 	cmp	w5, w4
 	csel	w3, w3, w6, eq
 	csel	w19, w19, w1, eq
-.L129:
+.L128:
 	add	w1, w1, 1
 	add	x0, x0, 16
 	and	w1, w1, 65535
-	b	.L128
+	b	.L127
 	.size	select_l2p_ram_region, .-select_l2p_ram_region
 	.section	.text.FtlUpdateVaildLpn,"ax",@progbits
 	.align	2
 	.global	FtlUpdateVaildLpn
 	.type	FtlUpdateVaildLpn, %function
 FtlUpdateVaildLpn:
-	adrp	x2, .LANCHOR58
+	adrp	x2, .LANCHOR57
 	mov	x3, x2
-	ldrh	w1, [x2, #:lo12:.LANCHOR58]
+	ldrh	w1, [x2, #:lo12:.LANCHOR57]
 	cmp	w1, 4
-	bhi	.L133
-	cbnz	w0, .L133
+	bhi	.L132
+	cbnz	w0, .L132
 	add	w1, w1, 1
-	strh	w1, [x2, #:lo12:.LANCHOR58]
+	strh	w1, [x2, #:lo12:.LANCHOR57]
 	ret
-.L133:
-	adrp	x1, .LANCHOR5
-	adrp	x0, .LANCHOR59
-	strh	wzr, [x3, #:lo12:.LANCHOR58]
+.L132:
+	adrp	x1, .LANCHOR4
+	adrp	x0, .LANCHOR58
+	strh	wzr, [x3, #:lo12:.LANCHOR57]
 	mov	w2, 0
-	ldrh	w5, [x1, #:lo12:.LANCHOR5]
-	adrp	x1, .LANCHOR42
-	str	wzr, [x0, #:lo12:.LANCHOR59]
+	ldrh	w5, [x1, #:lo12:.LANCHOR4]
+	adrp	x1, .LANCHOR41
+	str	wzr, [x0, #:lo12:.LANCHOR58]
 	mov	w3, 0
-	ldr	x6, [x1, #:lo12:.LANCHOR42]
+	ldr	x6, [x1, #:lo12:.LANCHOR41]
 	mov	w7, 65535
 	mov	x1, 0
-.L134:
+.L133:
 	cmp	w5, w1, uxth
-	bhi	.L136
-	cbz	w3, .L132
-	str	w2, [x0, #:lo12:.LANCHOR59]
-.L132:
+	bhi	.L135
+	cbz	w3, .L131
+	str	w2, [x0, #:lo12:.LANCHOR58]
+.L131:
 	ret
-.L136:
+.L135:
 	ldrh	w4, [x6, x1, lsl 1]
 	cmp	w4, w7
-	beq	.L135
+	beq	.L134
 	add	w2, w2, w4
 	mov	w3, 1
-.L135:
+.L134:
 	add	x1, x1, 1
-	b	.L134
+	b	.L133
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
-	.section	.text.ftl_set_blk_mode,"ax",@progbits
-	.align	2
-	.global	ftl_set_blk_mode
-	.type	ftl_set_blk_mode, %function
-ftl_set_blk_mode:
-	and	w0, w0, 65535
-	cbz	w1, .L143
-	b	ftl_set_blk_mode.part.6
-.L143:
-	adrp	x1, .LANCHOR1
-	ubfx	x2, x0, 5, 11
-	lsl	x2, x2, 2
-	ldr	x3, [x1, #:lo12:.LANCHOR1]
-	mov	w1, 1
-	lsl	w0, w1, w0
-	ldr	w1, [x3, x2]
-	bic	w0, w1, w0
-	str	w0, [x3, x2]
-	ret
-	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
-	.section	.text.ftl_get_blk_mode,"ax",@progbits
-	.align	2
-	.global	ftl_get_blk_mode
-	.type	ftl_get_blk_mode, %function
-ftl_get_blk_mode:
-	and	w1, w0, 65535
-	adrp	x0, .LANCHOR1
-	ldr	x0, [x0, #:lo12:.LANCHOR1]
-	ubfx	x2, x1, 5, 11
-	ldr	w0, [x0, x2, lsl 2]
-	lsr	w0, w0, w1
-	and	w0, w0, 1
-	ret
-	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
-	.section	.text.ftl_sb_update_avl_pages,"ax",@progbits
+	.section	.text.ftl_sb_update_avl_pages,"ax",@progbits
 	.align	2
 	.global	ftl_sb_update_avl_pages
 	.type	ftl_sb_update_avl_pages, %function
@@ -1200,51 +1150,51 @@ ftl_sb_update_avl_pages:
 	and	w2, w2, 65535
 	and	w6, w1, 65535
 	ubfiz	x4, x2, 1, 16
-	adrp	x1, .LANCHOR3
+	adrp	x1, .LANCHOR2
 	add	x4, x4, 16
 	strh	wzr, [x0, 4]
 	add	x4, x0, x4
-	ldrh	w3, [x1, #:lo12:.LANCHOR3]
+	ldrh	w3, [x1, #:lo12:.LANCHOR2]
 	mov	w1, 65535
-.L146:
+.L142:
 	cmp	w2, w3
-	bcc	.L148
-	adrp	x1, .LANCHOR19
+	bcc	.L144
+	adrp	x1, .LANCHOR18
 	ubfiz	x3, x3, 1, 16
 	add	x3, x3, 16
 	add	x2, x0, 16
-	ldrh	w1, [x1, #:lo12:.LANCHOR19]
+	ldrh	w1, [x1, #:lo12:.LANCHOR18]
 	add	x3, x0, x3
 	mov	w5, 65535
 	sub	w1, w1, #1
 	and	w1, w1, 65535
 	sub	w1, w1, w6
-.L149:
+.L145:
 	cmp	x2, x3
-	bne	.L151
+	bne	.L147
 	ret
-.L148:
+.L144:
 	ldrh	w5, [x4]
 	cmp	w5, w1
-	beq	.L147
+	beq	.L143
 	ldrh	w5, [x0, 4]
 	add	w5, w5, 1
 	strh	w5, [x0, 4]
-.L147:
+.L143:
 	add	w2, w2, 1
 	add	x4, x4, 2
 	and	w2, w2, 65535
-	b	.L146
-.L151:
+	b	.L142
+.L147:
 	ldrh	w4, [x2]
 	cmp	w4, w5
-	beq	.L150
+	beq	.L146
 	ldrh	w4, [x0, 4]
 	add	w4, w1, w4
 	strh	w4, [x0, 4]
-.L150:
+.L146:
 	add	x2, x2, 2
-	b	.L149
+	b	.L145
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
 	.section	.text.FtlSlcSuperblockCheck,"ax",@progbits
 	.align	2
@@ -1252,38 +1202,38 @@ ftl_sb_update_avl_pages:
 	.type	FtlSlcSuperblockCheck, %function
 FtlSlcSuperblockCheck:
 	ldrh	w1, [x0, 4]
-	cbz	w1, .L152
+	cbz	w1, .L148
 	ldrh	w2, [x0]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L152
+	beq	.L148
 	ldrb	w2, [x0, 6]
 	add	x2, x2, 8
 	ldrh	w3, [x0, x2, lsl 1]
-	adrp	x2, .LANCHOR3
-	ldrh	w4, [x2, #:lo12:.LANCHOR3]
+	adrp	x2, .LANCHOR2
+	ldrh	w4, [x2, #:lo12:.LANCHOR2]
 	mov	w2, w1
-.L155:
+.L151:
 	cmp	w3, w2
-	beq	.L157
-.L152:
+	beq	.L153
+.L148:
 	ret
-.L157:
+.L153:
 	ldrb	w1, [x0, 6]
 	add	w1, w1, 1
 	and	w1, w1, 255
 	strb	w1, [x0, 6]
 	cmp	w1, w4
-	bne	.L156
+	bne	.L152
 	ldrh	w1, [x0, 2]
 	strb	wzr, [x0, 6]
 	add	w1, w1, 1
 	strh	w1, [x0, 2]
-.L156:
+.L152:
 	ldrb	w1, [x0, 6]
 	add	x1, x1, 8
 	ldrh	w3, [x0, x1, lsl 1]
-	b	.L155
+	b	.L151
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
 	.section	.text.make_superblock,"ax",@progbits
 	.align	2
@@ -1295,65 +1245,65 @@ make_superblock:
 	ldrh	w1, [x0]
 	str	x19, [sp, 16]
 	mov	x19, x0
-	adrp	x0, .LANCHOR5
-	ldrh	w0, [x0, #:lo12:.LANCHOR5]
+	adrp	x0, .LANCHOR4
+	ldrh	w0, [x0, #:lo12:.LANCHOR4]
 	cmp	w1, w0
-	bcc	.L159
-	adrp	x1, .LANCHOR60
+	bcc	.L155
+	adrp	x1, .LANCHOR59
 	adrp	x0, .LC1
-	mov	w2, 2148
-	add	x1, x1, :lo12:.LANCHOR60
+	mov	w2, 2150
+	add	x1, x1, :lo12:.LANCHOR59
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L159:
-	adrp	x0, .LANCHOR3
-	adrp	x7, .LANCHOR13
+.L155:
+	adrp	x0, .LANCHOR2
+	adrp	x7, .LANCHOR12
 	add	x6, x19, 16
-	add	x7, x7, :lo12:.LANCHOR13
-	ldrh	w8, [x0, #:lo12:.LANCHOR3]
+	add	x7, x7, :lo12:.LANCHOR12
+	ldrh	w8, [x0, #:lo12:.LANCHOR2]
 	mov	x5, 0
 	strh	wzr, [x19, 4]
 	mov	w10, -1
 	strb	wzr, [x19, 7]
-.L160:
+.L156:
 	cmp	w8, w5, uxth
-	bhi	.L162
-	adrp	x1, .LANCHOR19
+	bhi	.L158
+	adrp	x1, .LANCHOR18
 	ldrb	w0, [x19, 7]
 	strb	wzr, [x19, 9]
-	ldrh	w1, [x1, #:lo12:.LANCHOR19]
+	ldrh	w1, [x1, #:lo12:.LANCHOR18]
 	mul	w0, w0, w1
 	ldrh	w1, [x19]
 	strh	w0, [x19, 4]
-	adrp	x0, .LANCHOR47
-	ldr	x0, [x0, #:lo12:.LANCHOR47]
+	adrp	x0, .LANCHOR46
+	ldr	x0, [x0, #:lo12:.LANCHOR46]
 	ldrh	w1, [x0, x1, lsl 1]
 	mov	w0, 10000
 	cmp	w1, w0
-	bls	.L163
+	bls	.L159
 	mov	w0, 1
 	strb	w0, [x19, 9]
-.L163:
+.L159:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L162:
+.L158:
 	ldrh	w1, [x19]
 	ldrb	w0, [x7, x5]
 	bl	V2P_block
 	mov	w4, w0
 	strh	w10, [x6]
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L161
+	cbnz	w0, .L157
 	strh	w4, [x6]
 	ldrb	w0, [x19, 7]
 	add	w0, w0, 1
 	strb	w0, [x19, 7]
-.L161:
+.L157:
 	add	x5, x5, 1
 	add	x6, x6, 2
-	b	.L160
+	b	.L156
 	.size	make_superblock, .-make_superblock
 	.section	.text.update_multiplier_value,"ax",@progbits
 	.align	2
@@ -1361,55 +1311,55 @@ make_superblock:
 	.type	update_multiplier_value, %function
 update_multiplier_value:
 	and	w6, w0, 65535
-	adrp	x0, .LANCHOR3
+	adrp	x0, .LANCHOR2
 	mov	x7, 0
-	adrp	x8, .LANCHOR13
-	ldrh	w10, [x0, #:lo12:.LANCHOR3]
-	adrp	x0, .LANCHOR19
+	adrp	x8, .LANCHOR12
+	ldrh	w10, [x0, #:lo12:.LANCHOR2]
+	adrp	x0, .LANCHOR18
 	mov	w5, 0
-	add	x8, x8, :lo12:.LANCHOR13
-	ldrh	w11, [x0, #:lo12:.LANCHOR19]
+	add	x8, x8, :lo12:.LANCHOR12
+	ldrh	w11, [x0, #:lo12:.LANCHOR18]
 	cmp	w10, w7, uxth
-	bhi	.L177
-	cbz	w5, .L175
+	bhi	.L173
+	cbz	w5, .L171
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.L176:
-	adrp	x0, .LANCHOR40
+.L172:
+	adrp	x0, .LANCHOR39
 	mov	w1, 6
-	ldr	x0, [x0, #:lo12:.LANCHOR40]
+	ldr	x0, [x0, #:lo12:.LANCHOR39]
 	umaddl	x6, w6, w1, x0
 	mov	w0, 0
 	strh	w5, [x6, 4]
 	ret
-.L170:
+.L166:
 	mov	w5, 0
-	b	.L169
-.L175:
+	b	.L165
+.L171:
 	mov	w5, 0
-	b	.L176
-.L177:
+	b	.L172
+.L173:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
-.L168:
+.L164:
 	ldrb	w0, [x8, x7]
 	mov	w1, w6
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L167
+	cbnz	w0, .L163
 	add	w5, w5, w11
 	and	w5, w5, 65535
-.L167:
+.L163:
 	add	x7, x7, 1
 	cmp	w10, w7, uxth
-	bhi	.L168
-	cbz	w5, .L170
+	bhi	.L164
+	cbz	w5, .L166
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.L169:
-	adrp	x0, .LANCHOR40
+.L165:
+	adrp	x0, .LANCHOR39
 	mov	w1, 6
-	ldr	x0, [x0, #:lo12:.LANCHOR40]
+	ldr	x0, [x0, #:lo12:.LANCHOR39]
 	umaddl	x6, w6, w1, x0
 	mov	w0, 0
 	strh	w5, [x6, 4]
@@ -1421,22 +1371,22 @@ update_multiplier_value:
 	.global	GetFreeBlockMinEraseCount
 	.type	GetFreeBlockMinEraseCount, %function
 GetFreeBlockMinEraseCount:
-	adrp	x0, .LANCHOR46
-	ldr	x0, [x0, #:lo12:.LANCHOR46]
-	cbz	x0, .L180
-	adrp	x1, .LANCHOR40
-	ldr	x1, [x1, #:lo12:.LANCHOR40]
+	adrp	x0, .LANCHOR45
+	ldr	x0, [x0, #:lo12:.LANCHOR45]
+	cbz	x0, .L176
+	adrp	x1, .LANCHOR39
+	ldr	x1, [x1, #:lo12:.LANCHOR39]
 	sub	x0, x0, x1
 	mov	x1, -6148914691236517206
 	asr	x0, x0, 1
 	movk	x1, 0xaaab, lsl 0
 	mul	x0, x0, x1
-	adrp	x1, .LANCHOR47
-	ldr	x1, [x1, #:lo12:.LANCHOR47]
+	adrp	x1, .LANCHOR46
+	ldr	x1, [x1, #:lo12:.LANCHOR46]
 	and	x0, x0, 65535
 	ldrh	w0, [x1, x0, lsl 1]
 	ret
-.L180:
+.L176:
 	mov	w0, 0
 	ret
 	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
@@ -1445,21 +1395,21 @@ GetFreeBlockMinEraseCount:
 	.global	GetFreeBlockMaxEraseCount
 	.type	GetFreeBlockMaxEraseCount, %function
 GetFreeBlockMaxEraseCount:
-	adrp	x1, .LANCHOR46
+	adrp	x1, .LANCHOR45
 	and	w0, w0, 65535
-	ldr	x1, [x1, #:lo12:.LANCHOR46]
-	cbz	x1, .L188
-	adrp	x2, .LANCHOR48
+	ldr	x1, [x1, #:lo12:.LANCHOR45]
+	cbz	x1, .L184
+	adrp	x2, .LANCHOR47
 	mov	w3, 7
 	mov	w5, 6
 	mov	w6, 65535
-	ldrh	w2, [x2, #:lo12:.LANCHOR48]
+	ldrh	w2, [x2, #:lo12:.LANCHOR47]
 	mul	w2, w2, w3
 	asr	w2, w2, 3
 	cmp	w0, w2
 	csel	w0, w2, w0, gt
-	adrp	x2, .LANCHOR40
-	ldr	x3, [x2, #:lo12:.LANCHOR40]
+	adrp	x2, .LANCHOR39
+	ldr	x3, [x2, #:lo12:.LANCHOR39]
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
 	sub	x1, x1, x3
@@ -1467,25 +1417,25 @@ GetFreeBlockMaxEraseCount:
 	mul	x1, x1, x2
 	mov	w2, 0
 	and	w1, w1, 65535
-.L184:
+.L180:
 	cmp	w0, w2
-	beq	.L187
+	beq	.L183
 	umull	x4, w1, w5
 	ldrh	w4, [x3, x4]
 	cmp	w4, w6
-	bne	.L185
-.L187:
-	adrp	x0, .LANCHOR47
+	bne	.L181
+.L183:
+	adrp	x0, .LANCHOR46
 	ubfiz	x1, x1, 1, 16
-	ldr	x0, [x0, #:lo12:.LANCHOR47]
+	ldr	x0, [x0, #:lo12:.LANCHOR46]
 	ldrh	w0, [x0, x1]
 	ret
-.L185:
+.L181:
 	add	w2, w2, 1
 	mov	w1, w4
 	and	w2, w2, 65535
-	b	.L184
-.L188:
+	b	.L180
+.L184:
 	mov	w0, 0
 	ret
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
@@ -1497,18 +1447,18 @@ free_data_superblock:
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L192
+	beq	.L188
 	stp	x29, x30, [sp, -16]!
-	adrp	x2, .LANCHOR42
+	adrp	x2, .LANCHOR41
 	ubfiz	x1, x0, 1, 16
 	add	x29, sp, 0
-	ldr	x2, [x2, #:lo12:.LANCHOR42]
+	ldr	x2, [x2, #:lo12:.LANCHOR41]
 	strh	wzr, [x2, x1]
 	bl	INSERT_FREE_LIST
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L192:
+.L188:
 	mov	w0, 0
 	ret
 	.size	free_data_superblock, .-free_data_superblock
@@ -1525,49 +1475,49 @@ get_new_active_ppa:
 	mov	w0, 65535
 	str	x21, [sp, 32]
 	cmp	w1, w0
-	bne	.L196
-	adrp	x1, .LANCHOR61
+	bne	.L192
+	adrp	x1, .LANCHOR60
 	adrp	x0, .LC1
-	mov	w2, 2781
-	add	x1, x1, :lo12:.LANCHOR61
+	mov	w2, 2785
+	add	x1, x1, :lo12:.LANCHOR60
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L196:
-	adrp	x21, .LANCHOR19
+.L192:
+	adrp	x21, .LANCHOR18
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x21, #:lo12:.LANCHOR19]
+	ldrh	w0, [x21, #:lo12:.LANCHOR18]
 	cmp	w1, w0
-	bne	.L197
-	adrp	x1, .LANCHOR61
+	bne	.L193
+	adrp	x1, .LANCHOR60
 	adrp	x0, .LC1
-	mov	w2, 2782
-	add	x1, x1, :lo12:.LANCHOR61
+	mov	w2, 2786
+	add	x1, x1, :lo12:.LANCHOR60
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L197:
+.L193:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L198
-	adrp	x1, .LANCHOR61
+	cbnz	w0, .L194
+	adrp	x1, .LANCHOR60
 	adrp	x0, .LC1
-	mov	w2, 2783
-	add	x1, x1, :lo12:.LANCHOR61
+	mov	w2, 2787
+	add	x1, x1, :lo12:.LANCHOR60
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L198:
+.L194:
 	ldrb	w0, [x19, 6]
-	adrp	x1, .LANCHOR3
+	adrp	x1, .LANCHOR2
 	strb	wzr, [x19, 10]
 	add	x0, x0, 8
-	ldrh	w3, [x1, #:lo12:.LANCHOR3]
+	ldrh	w3, [x1, #:lo12:.LANCHOR2]
 	mov	w1, 65535
 	ldrh	w0, [x19, x0, lsl 1]
-.L199:
+.L195:
 	cmp	w0, w1
-	beq	.L201
+	beq	.L197
 	ldrh	w20, [x19, 2]
-	ldrh	w2, [x21, #:lo12:.LANCHOR19]
+	ldrh	w2, [x21, #:lo12:.LANCHOR18]
 	cmp	w20, w2
-	bcs	.L205
+	bcs	.L201
 	ldrh	w1, [x19, 4]
 	orr	w20, w20, w0, lsl 10
 	ldrb	w0, [x19, 6]
@@ -1575,101 +1525,101 @@ get_new_active_ppa:
 	sub	w1, w1, #1
 	and	w1, w1, 65535
 	strh	w1, [x19, 4]
-.L204:
+.L200:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	cmp	w3, w0
-	bne	.L203
+	bne	.L199
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
 	mov	w0, 0
-.L203:
+.L199:
 	add	x5, x19, x0, sxtw 1
 	ldrh	w5, [x5, 16]
 	cmp	w5, w4
-	beq	.L204
+	beq	.L200
 	strb	w0, [x19, 6]
 	ldrh	w0, [x19, 2]
 	cmp	w0, w2
-	bne	.L195
-	cbz	w1, .L195
-	adrp	x1, .LANCHOR61
+	bne	.L191
+	cbz	w1, .L191
+	adrp	x1, .LANCHOR60
 	adrp	x0, .LC1
-	mov	w2, 2806
-	add	x1, x1, :lo12:.LANCHOR61
+	mov	w2, 2810
+	add	x1, x1, :lo12:.LANCHOR60
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L195:
+.L191:
 	mov	w0, w20
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L201:
+.L197:
 	ldrb	w0, [x19, 6]
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x19, 6]
 	cmp	w0, w3
-	bne	.L200
+	bne	.L196
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L200:
+.L196:
 	ldrb	w0, [x19, 6]
 	add	x0, x0, 8
 	ldrh	w0, [x19, x0, lsl 1]
-	b	.L199
-.L205:
-	mov	w20, 65535
 	b	.L195
+.L201:
+	mov	w20, 65535
+	b	.L191
 	.size	get_new_active_ppa, .-get_new_active_ppa
 	.section	.text.FtlGcBufInit,"ax",@progbits
 	.align	2
 	.global	FtlGcBufInit
 	.type	FtlGcBufInit, %function
 FtlGcBufInit:
-	adrp	x1, .LANCHOR63
-	adrp	x0, .LANCHOR62
-	adrp	x7, .LANCHOR64
-	adrp	x6, .LANCHOR65
-	ldr	x5, [x1, #:lo12:.LANCHOR63]
+	adrp	x1, .LANCHOR62
+	adrp	x0, .LANCHOR61
+	adrp	x7, .LANCHOR63
+	adrp	x6, .LANCHOR64
+	ldr	x5, [x1, #:lo12:.LANCHOR62]
+	adrp	x1, .LANCHOR22
+	str	wzr, [x0, #:lo12:.LANCHOR61]
+	adrp	x0, .LANCHOR2
+	ldrh	w10, [x1, #:lo12:.LANCHOR22]
 	adrp	x1, .LANCHOR23
-	str	wzr, [x0, #:lo12:.LANCHOR62]
-	adrp	x0, .LANCHOR3
-	ldrh	w10, [x1, #:lo12:.LANCHOR23]
-	adrp	x1, .LANCHOR24
-	ldrh	w0, [x0, #:lo12:.LANCHOR3]
+	ldrh	w0, [x0, #:lo12:.LANCHOR2]
 	mov	w8, 24
-	ldrh	w11, [x1, #:lo12:.LANCHOR24]
-	adrp	x1, .LANCHOR66
-	ldr	x14, [x7, #:lo12:.LANCHOR64]
+	ldrh	w11, [x1, #:lo12:.LANCHOR23]
+	adrp	x1, .LANCHOR65
+	ldr	x14, [x7, #:lo12:.LANCHOR63]
 	mov	x3, x5
-	ldr	x4, [x1, #:lo12:.LANCHOR66]
+	ldr	x4, [x1, #:lo12:.LANCHOR65]
 	mov	w2, 0
-	ldr	x15, [x6, #:lo12:.LANCHOR65]
+	ldr	x15, [x6, #:lo12:.LANCHOR64]
 	nop // between mem op and mult-accumulate
 	umaddl	x8, w0, w8, x5
 	add	x4, x4, 8
 	mov	w1, 0
 	mov	w16, 1
-.L212:
+.L208:
 	add	w13, w2, w10
 	add	w12, w1, w11
 	cmp	x3, x8
-	bne	.L213
-	adrp	x1, .LANCHOR67
-	ldr	x7, [x7, #:lo12:.LANCHOR64]
-	ldr	x6, [x6, #:lo12:.LANCHOR65]
+	bne	.L209
+	adrp	x1, .LANCHOR66
+	ldr	x7, [x7, #:lo12:.LANCHOR63]
+	ldr	x6, [x6, #:lo12:.LANCHOR64]
 	mov	w8, 24
-	ldr	w4, [x1, #:lo12:.LANCHOR67]
-.L214:
+	ldr	w4, [x1, #:lo12:.LANCHOR66]
+.L210:
 	cmp	w0, w4
-	bcc	.L215
+	bcc	.L211
 	ret
-.L213:
+.L209:
 	asr	w2, w2, 2
 	asr	w1, w1, 2
 	add	x2, x14, x2, sxtw 2
@@ -1681,8 +1631,8 @@ FtlGcBufInit:
 	add	x4, x4, 32
 	mov	w1, w12
 	mov	w2, w13
-	b	.L212
-.L215:
+	b	.L208
+.L211:
 	umull	x3, w0, w8
 	mul	w1, w10, w0
 	add	x2, x5, x3
@@ -1696,44 +1646,44 @@ FtlGcBufInit:
 	asr	w1, w1, 2
 	add	x1, x6, x1, sxtw 2
 	str	x1, [x2, 8]
-	b	.L214
+	b	.L210
 	.size	FtlGcBufInit, .-FtlGcBufInit
 	.section	.text.FtlGcBufFree,"ax",@progbits
 	.align	2
 	.global	FtlGcBufFree
 	.type	FtlGcBufFree, %function
 FtlGcBufFree:
-	adrp	x2, .LANCHOR67
+	adrp	x2, .LANCHOR66
 	mov	w3, 0
 	mov	w8, 24
-	ldr	w7, [x2, #:lo12:.LANCHOR67]
-	adrp	x2, .LANCHOR63
-	ldr	x5, [x2, #:lo12:.LANCHOR63]
-.L217:
+	ldr	w7, [x2, #:lo12:.LANCHOR66]
+	adrp	x2, .LANCHOR62
+	ldr	x5, [x2, #:lo12:.LANCHOR62]
+.L213:
 	cmp	w3, w1
-	bcs	.L216
+	bcs	.L212
 	ubfiz	x4, x3, 5, 16
 	mov	w2, 0
 	add	x4, x0, x4
-	b	.L222
-.L218:
+	b	.L218
+.L214:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-.L222:
+.L218:
 	cmp	w2, w7
-	bcs	.L219
+	bcs	.L215
 	umull	x6, w2, w8
 	add	x10, x5, x6
 	ldr	x11, [x5, x6]
 	ldr	x6, [x4, 8]
 	cmp	x11, x6
-	bne	.L218
+	bne	.L214
 	str	wzr, [x10, 16]
-.L219:
+.L215:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L217
-.L216:
+	b	.L213
+.L212:
 	ret
 	.size	FtlGcBufFree, .-FtlGcBufFree
 	.section	.text.FtlGcBufAlloc,"ax",@progbits
@@ -1741,38 +1691,38 @@ FtlGcBufFree:
 	.global	FtlGcBufAlloc
 	.type	FtlGcBufAlloc, %function
 FtlGcBufAlloc:
-	adrp	x2, .LANCHOR67
+	adrp	x2, .LANCHOR66
 	mov	w3, 0
 	mov	w7, 24
 	mov	w8, 1
-	ldr	w5, [x2, #:lo12:.LANCHOR67]
-	adrp	x2, .LANCHOR63
-	ldr	x6, [x2, #:lo12:.LANCHOR63]
-.L224:
+	ldr	w5, [x2, #:lo12:.LANCHOR66]
+	adrp	x2, .LANCHOR62
+	ldr	x6, [x2, #:lo12:.LANCHOR62]
+.L220:
 	cmp	w3, w1
-	bcs	.L223
+	bcs	.L219
 	mov	w2, 0
-	b	.L229
-.L225:
+	b	.L225
+.L221:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-.L229:
+.L225:
 	cmp	w2, w5
-	bcs	.L226
+	bcs	.L222
 	umaddl	x4, w2, w7, x6
 	ldr	w10, [x4, 16]
-	cbnz	w10, .L225
+	cbnz	w10, .L221
 	ubfiz	x2, x3, 5, 16
 	ldr	x10, [x4]
 	add	x2, x0, x2
 	str	w8, [x4, 16]
 	ldr	x4, [x4, 8]
 	stp	x10, x4, [x2, 8]
-.L226:
+.L222:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L224
-.L223:
+	b	.L220
+.L219:
 	ret
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
 	.section	.text.IsBlkInGcList,"ax",@progbits
@@ -1780,23 +1730,23 @@ FtlGcBufAlloc:
 	.global	IsBlkInGcList
 	.type	IsBlkInGcList, %function
 IsBlkInGcList:
-	adrp	x1, .LANCHOR68
+	adrp	x1, .LANCHOR67
 	and	w0, w0, 65535
-	ldrh	w2, [x1, #:lo12:.LANCHOR68]
-	adrp	x1, .LANCHOR69
-	ldr	x3, [x1, #:lo12:.LANCHOR69]
+	ldrh	w2, [x1, #:lo12:.LANCHOR67]
+	adrp	x1, .LANCHOR68
+	ldr	x3, [x1, #:lo12:.LANCHOR68]
 	mov	x1, 0
-.L231:
+.L227:
 	cmp	w2, w1, uxth
-	bhi	.L233
+	bhi	.L229
 	mov	w0, 0
 	ret
-.L233:
+.L229:
 	add	x1, x1, 1
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w0
-	bne	.L231
+	bne	.L227
 	mov	w0, 1
 	ret
 	.size	IsBlkInGcList, .-IsBlkInGcList
@@ -1813,40 +1763,40 @@ FtlGcUpdatePage:
 	add	x29, sp, 0
 	bl	P2V_block_in_plane
 	and	w7, w0, 65535
-	adrp	x4, .LANCHOR68
-	adrp	x2, .LANCHOR69
+	adrp	x4, .LANCHOR67
+	adrp	x2, .LANCHOR68
 	mov	x3, 0
-	ldrh	w1, [x4, #:lo12:.LANCHOR68]
-	ldr	x5, [x2, #:lo12:.LANCHOR69]
-.L236:
+	ldrh	w1, [x4, #:lo12:.LANCHOR67]
+	ldr	x5, [x2, #:lo12:.LANCHOR68]
+.L232:
 	and	w2, w3, 65535
 	cmp	w2, w1
-	bcc	.L238
-	bne	.L237
+	bcc	.L234
+	bne	.L233
 	and	x3, x3, 65535
 	strh	w0, [x5, x3, lsl 1]
-	ldrh	w0, [x4, #:lo12:.LANCHOR68]
+	ldrh	w0, [x4, #:lo12:.LANCHOR67]
 	add	w0, w0, 1
-	strh	w0, [x4, #:lo12:.LANCHOR68]
-	b	.L237
-.L238:
+	strh	w0, [x4, #:lo12:.LANCHOR67]
+	b	.L233
+.L234:
 	add	x3, x3, 1
 	add	x2, x5, x3, lsl 1
 	ldrh	w2, [x2, -2]
 	cmp	w2, w7
-	bne	.L236
-.L237:
-	adrp	x4, .LANCHOR70
-	adrp	x1, .LANCHOR71
+	bne	.L232
+.L233:
+	adrp	x4, .LANCHOR69
+	adrp	x1, .LANCHOR70
 	mov	w3, 12
-	ldrh	w0, [x4, #:lo12:.LANCHOR70]
-	ldr	x5, [x1, #:lo12:.LANCHOR71]
+	ldrh	w0, [x4, #:lo12:.LANCHOR69]
+	ldr	x5, [x1, #:lo12:.LANCHOR70]
 	umull	x3, w0, w3
 	add	w0, w0, 1
 	add	x7, x5, x3
 	stp	w10, w8, [x7, 4]
 	str	w6, [x5, x3]
-	strh	w0, [x4, #:lo12:.LANCHOR70]
+	strh	w0, [x4, #:lo12:.LANCHOR69]
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
@@ -1855,27 +1805,27 @@ FtlGcUpdatePage:
 	.global	FtlGcRefreshBlock
 	.type	FtlGcRefreshBlock, %function
 FtlGcRefreshBlock:
-	adrp	x4, .LANCHOR72
+	adrp	x4, .LANCHOR71
 	and	w0, w0, 65535
-	ldrh	w5, [x4, #:lo12:.LANCHOR72]
+	ldrh	w5, [x4, #:lo12:.LANCHOR71]
 	cmp	w5, w0
-	beq	.L241
-	adrp	x1, .LANCHOR73
-	ldrh	w3, [x1, #:lo12:.LANCHOR73]
+	beq	.L237
+	adrp	x1, .LANCHOR72
+	ldrh	w3, [x1, #:lo12:.LANCHOR72]
 	cmp	w0, w3
-	beq	.L241
+	beq	.L237
 	mov	w2, 65535
 	cmp	w5, w2
-	bne	.L242
-	strh	w0, [x4, #:lo12:.LANCHOR72]
-.L241:
+	bne	.L238
+	strh	w0, [x4, #:lo12:.LANCHOR71]
+.L237:
 	mov	w0, 0
 	ret
-.L242:
+.L238:
 	cmp	w3, w2
-	bne	.L241
-	strh	w0, [x1, #:lo12:.LANCHOR73]
-	b	.L241
+	bne	.L237
+	strh	w0, [x1, #:lo12:.LANCHOR72]
+	b	.L237
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
 	.section	.text.FtlGcMarkBadPhyBlk,"ax",@progbits
 	.align	2
@@ -1888,29 +1838,29 @@ FtlGcMarkBadPhyBlk:
 	add	x29, sp, 0
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-	adrp	x1, .LANCHOR74
-	adrp	x3, .LANCHOR75
-	add	x3, x3, :lo12:.LANCHOR75
+	adrp	x1, .LANCHOR73
+	adrp	x3, .LANCHOR74
+	add	x3, x3, :lo12:.LANCHOR74
 	mov	x2, 0
-	ldrh	w0, [x1, #:lo12:.LANCHOR74]
-.L244:
+	ldrh	w0, [x1, #:lo12:.LANCHOR73]
+.L240:
 	cmp	w0, w2, uxth
-	bhi	.L246
+	bhi	.L242
 	cmp	w0, 15
-	bhi	.L245
+	bhi	.L241
 	add	w2, w0, 1
-	strh	w2, [x1, #:lo12:.LANCHOR74]
-	adrp	x1, .LANCHOR75
-	add	x1, x1, :lo12:.LANCHOR75
+	strh	w2, [x1, #:lo12:.LANCHOR73]
+	adrp	x1, .LANCHOR74
+	add	x1, x1, :lo12:.LANCHOR74
 	strh	w6, [x1, w0, sxtw 1]
-	b	.L245
-.L246:
+	b	.L241
+.L242:
 	add	x2, x2, 1
 	add	x4, x3, x2, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w6
-	bne	.L244
-.L245:
+	bne	.L240
+.L241:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
@@ -1920,35 +1870,35 @@ FtlGcMarkBadPhyBlk:
 	.global	FtlGcReFreshBadBlk
 	.type	FtlGcReFreshBadBlk, %function
 FtlGcReFreshBadBlk:
-	adrp	x0, .LANCHOR74
-	ldrh	w0, [x0, #:lo12:.LANCHOR74]
-	cbz	w0, .L255
-	adrp	x1, .LANCHOR72
-	ldrh	w2, [x1, #:lo12:.LANCHOR72]
+	adrp	x0, .LANCHOR73
+	ldrh	w0, [x0, #:lo12:.LANCHOR73]
+	cbz	w0, .L251
+	adrp	x1, .LANCHOR71
+	ldrh	w2, [x1, #:lo12:.LANCHOR71]
 	mov	w1, 65535
 	cmp	w2, w1
-	bne	.L255
+	bne	.L251
 	stp	x29, x30, [sp, -16]!
-	adrp	x6, .LANCHOR76
+	adrp	x6, .LANCHOR75
 	add	x29, sp, 0
-	ldrh	w1, [x6, #:lo12:.LANCHOR76]
+	ldrh	w1, [x6, #:lo12:.LANCHOR75]
 	cmp	w1, w0
-	bcc	.L250
-	strh	wzr, [x6, #:lo12:.LANCHOR76]
-.L250:
-	ldrh	w1, [x6, #:lo12:.LANCHOR76]
-	adrp	x0, .LANCHOR75
-	add	x0, x0, :lo12:.LANCHOR75
+	bcc	.L246
+	strh	wzr, [x6, #:lo12:.LANCHOR75]
+.L246:
+	ldrh	w1, [x6, #:lo12:.LANCHOR75]
+	adrp	x0, .LANCHOR74
+	add	x0, x0, :lo12:.LANCHOR74
 	ldrh	w0, [x0, x1, lsl 1]
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-	ldrh	w0, [x6, #:lo12:.LANCHOR76]
+	ldrh	w0, [x6, #:lo12:.LANCHOR75]
 	ldp	x29, x30, [sp], 16
 	add	w0, w0, 1
-	strh	w0, [x6, #:lo12:.LANCHOR76]
+	strh	w0, [x6, #:lo12:.LANCHOR75]
 	mov	w0, 0
 	ret
-.L255:
+.L251:
 	mov	w0, 0
 	ret
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
@@ -1992,9 +1942,9 @@ rknand_print_hex:
 	mov	x19, 0
 	mov	w20, 0
 	adrp	x26, .LC3
-.L261:
+.L257:
 	cmp	w27, w19
-	bhi	.L267
+	bhi	.L263
 	ldp	x19, x20, [sp, 16]
 	adrp	x0, .LC5
 	ldp	x21, x22, [sp, 32]
@@ -2004,40 +1954,40 @@ rknand_print_hex:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	printf
-.L267:
-	cbnz	w20, .L262
+.L263:
+	cbnz	w20, .L258
 	mov	w2, w21
 	mov	x1, x28
 	mov	x0, x24
 	bl	printf
-.L262:
+.L258:
 	cmp	w23, 4
-	bne	.L263
+	bne	.L259
 	ldr	w1, [x22, x19, lsl 2]
-.L270:
+.L266:
 	add	x0, x26, :lo12:.LC3
-.L269:
+.L265:
 	bl	printf
 	add	w20, w20, 1
 	cmp	w20, 15
-	bls	.L266
+	bls	.L262
 	mov	w20, 0
 	adrp	x0, .LC5
 	add	x0, x0, :lo12:.LC5
 	bl	printf
-.L266:
+.L262:
 	add	x19, x19, 1
 	add	w21, w21, w23
-	b	.L261
-.L263:
+	b	.L257
+.L259:
 	cmp	w23, 2
-	bne	.L265
+	bne	.L261
 	ldrh	w1, [x22, x19, lsl 1]
-	b	.L270
-.L265:
+	b	.L266
+.L261:
 	ldrb	w1, [x22, x19]
 	mov	x0, x25
-	b	.L269
+	b	.L265
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.FlashEraseBlocks,"ax",@progbits
 	.align	2
@@ -2058,34 +2008,34 @@ FlashEraseBlocks:
 	add	x23, x21, 4
 	stp	x25, x26, [sp, 64]
 	add	x23, x20, x23
-	adrp	x25, .LANCHOR78
+	adrp	x25, .LANCHOR77
 	str	x27, [sp, 80]
 	lsl	w26, w24, 3
 	mov	x22, x0
-	add	x27, x25, :lo12:.LANCHOR78
-.L272:
+	add	x27, x25, :lo12:.LANCHOR77
+.L268:
 	cmp	x19, x23
-	beq	.L286
+	beq	.L282
 	ldr	w0, [x19]
 	add	x2, x29, 104
 	add	x1, x29, 108
 	bl	l2p_addr_tran.isra.0
 	ldr	w0, [x29, 104]
-	cbnz	w0, .L273
+	cbnz	w0, .L269
 	ldr	w1, [x29, 108]
 	cmp	w26, w1
-	bls	.L273
+	bls	.L269
 	mov	x19, x20
 	add	x21, x20, x21
 	adrp	x22, .LC6
-	adrp	x20, .LANCHOR77
+	adrp	x20, .LANCHOR76
 	add	x22, x22, :lo12:.LC6
-	add	x20, x20, :lo12:.LANCHOR77
+	add	x20, x20, :lo12:.LANCHOR76
 	mov	w23, -1
-.L274:
+.L270:
 	cmp	x19, x21
-	bne	.L275
-.L286:
+	bne	.L271
+.L282:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -2094,7 +2044,7 @@ FlashEraseBlocks:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L275:
+.L271:
 	ldr	w2, [x29, 108]
 	mov	x1, x20
 	str	w23, [x19]
@@ -2113,34 +2063,34 @@ FlashEraseBlocks:
 	mov	w2, w3
 	add	x0, x0, :lo12:.LC8
 	bl	rknand_print_hex
-	b	.L274
-.L273:
-	add	x1, x25, :lo12:.LANCHOR78
+	b	.L270
+.L269:
+	add	x1, x25, :lo12:.LANCHOR77
 	ldr	x2, [x1, 8]
 	ldr	w1, [x29, 108]
 	blr	x2
-	cbnz	w0, .L276
+	cbnz	w0, .L272
 	str	wzr, [x19, -4]
-.L277:
+.L273:
 	add	x0, x22, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
-	bne	.L279
+	bne	.L275
 	ldrb	w0, [x29, 104]
 	ldr	x2, [x27, 8]
 	ldr	w1, [x29, 108]
 	add	w1, w24, w1
 	blr	x2
-	cbz	w0, .L279
+	cbz	w0, .L275
 	mov	w0, -1
 	str	w0, [x19, -4]
-.L279:
+.L275:
 	add	x19, x19, 32
-	b	.L272
-.L276:
+	b	.L268
+.L272:
 	mov	w0, -1
 	str	w0, [x19, -4]
-	b	.L277
+	b	.L273
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
 	.section	.text.FtlFreeSysBlkQueueIn,"ax",@progbits
 	.align	2
@@ -2155,37 +2105,37 @@ FtlFreeSysBlkQueueIn:
 	sub	w2, w20, #1
 	mov	w0, 65533
 	cmp	w0, w2, uxth
-	bcc	.L288
-	adrp	x0, .LANCHOR38
-	add	x2, x0, :lo12:.LANCHOR38
+	bcc	.L284
+	adrp	x0, .LANCHOR37
+	add	x2, x0, :lo12:.LANCHOR37
 	mov	x19, x0
 	ldrh	w2, [x2, 6]
 	cmp	w2, 1024
-	beq	.L288
+	beq	.L284
 	and	w1, w1, 65535
-	cbz	w1, .L290
+	cbz	w1, .L286
 	mov	w0, w20
 	bl	P2V_block_in_plane
 	and	w21, w0, 65535
-	adrp	x0, .LANCHOR79
+	adrp	x0, .LANCHOR78
 	lsl	w1, w20, 10
 	mov	w2, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR79]
+	ldr	x0, [x0, #:lo12:.LANCHOR78]
 	str	w1, [x0, 4]
 	mov	w1, w2
 	bl	FlashEraseBlocks
-	adrp	x1, .LANCHOR47
+	adrp	x1, .LANCHOR46
 	ubfiz	x0, x21, 1, 16
-	ldr	x2, [x1, #:lo12:.LANCHOR47]
+	ldr	x2, [x1, #:lo12:.LANCHOR46]
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-	adrp	x1, .LANCHOR80
-	ldr	w0, [x1, #:lo12:.LANCHOR80]
+	adrp	x1, .LANCHOR79
+	ldr	w0, [x1, #:lo12:.LANCHOR79]
 	add	w0, w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR80]
-.L290:
-	add	x0, x19, :lo12:.LANCHOR38
+	str	w0, [x1, #:lo12:.LANCHOR79]
+.L286:
+	add	x0, x19, :lo12:.LANCHOR37
 	ldrh	w1, [x0, 6]
 	add	w1, w1, 1
 	strh	w1, [x0, 6]
@@ -2195,7 +2145,7 @@ FtlFreeSysBlkQueueIn:
 	and	w1, w1, 1023
 	strh	w1, [x0, 4]
 	strh	w20, [x2, 8]
-.L288:
+.L284:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -2206,14 +2156,14 @@ FtlFreeSysBlkQueueIn:
 	.global	FtlFreeSysBlkQueueOut
 	.type	FtlFreeSysBlkQueueOut, %function
 FtlFreeSysBlkQueueOut:
-	adrp	x0, .LANCHOR38
-	add	x1, x0, :lo12:.LANCHOR38
+	adrp	x0, .LANCHOR37
+	add	x1, x0, :lo12:.LANCHOR37
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	ldrh	w2, [x1, 6]
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	cbz	w2, .L302
+	cbz	w2, .L298
 	ldrh	w0, [x1, 2]
 	sub	w2, w2, #1
 	strh	w2, [x1, 6]
@@ -2222,34 +2172,34 @@ FtlFreeSysBlkQueueOut:
 	add	w0, w0, 1
 	and	w0, w0, 1023
 	strh	w0, [x1, 2]
-	adrp	x0, .LANCHOR79
+	adrp	x0, .LANCHOR78
 	ldrh	w20, [x3, 8]
-	ldr	x0, [x0, #:lo12:.LANCHOR79]
+	ldr	x0, [x0, #:lo12:.LANCHOR78]
 	lsl	w1, w20, 10
 	str	w1, [x0, 4]
 	mov	w1, w2
 	bl	FlashEraseBlocks
-	adrp	x1, .LANCHOR80
-	ldr	w0, [x1, #:lo12:.LANCHOR80]
+	adrp	x1, .LANCHOR79
+	ldr	w0, [x1, #:lo12:.LANCHOR79]
 	add	w0, w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR80]
-.L299:
+	str	w0, [x1, #:lo12:.LANCHOR79]
+.L295:
 	sub	w0, w20, #1
 	mov	w1, 65533
 	cmp	w1, w0, uxth
-	bcs	.L300
-	add	x0, x19, :lo12:.LANCHOR38
+	bcs	.L296
+	add	x0, x19, :lo12:.LANCHOR37
 	mov	w1, w20
 	ldrh	w2, [x0, 6]
 	adrp	x0, .LC9
 	add	x0, x0, :lo12:.LC9
 	bl	printf
-.L301:
-	b	.L301
-.L302:
+.L297:
+	b	.L297
+.L298:
 	mov	w20, 65535
-	b	.L299
-.L300:
+	b	.L295
+.L296:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -2268,27 +2218,27 @@ ftl_map_blk_alloc_new_blk:
 	mov	w20, 0
 	ldr	x0, [x0, 16]
 	str	x21, [sp, 32]
-.L305:
+.L301:
 	cmp	w20, w1
-	beq	.L309
+	beq	.L305
 	mov	x21, x0
 	ldrh	w2, [x0], 2
-	cbnz	w2, .L306
+	cbnz	w2, .L302
 	bl	FtlFreeSysBlkQueueOut
 	and	w1, w0, 65535
 	strh	w0, [x21]
 	sub	w2, w1, #1
 	mov	w0, 65533
 	cmp	w0, w2, uxth
-	bcs	.L307
-	adrp	x0, .LANCHOR38+6
-	ldrh	w2, [x0, #:lo12:.LANCHOR38+6]
+	bcs	.L303
+	adrp	x0, .LANCHOR37+6
+	ldrh	w2, [x0, #:lo12:.LANCHOR37+6]
 	adrp	x0, .LC10
 	add	x0, x0, :lo12:.LC10
 	bl	printf
-.L308:
-	b	.L308
-.L307:
+.L304:
+	b	.L304
+.L303:
 	ldr	w0, [x19, 48]
 	strh	wzr, [x19, 2]
 	add	w0, w0, 1
@@ -2297,26 +2247,26 @@ ftl_map_blk_alloc_new_blk:
 	strh	w20, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
-.L309:
+.L305:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L311
-	adrp	x1, .LANCHOR81
+	bhi	.L307
+	adrp	x1, .LANCHOR80
 	adrp	x0, .LC1
 	mov	w2, 578
-	add	x1, x1, :lo12:.LANCHOR81
+	add	x1, x1, :lo12:.LANCHOR80
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L311:
+.L307:
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L306:
+.L302:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L305
+	b	.L301
 	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
 	.section	.text.ftl_memset,"ax",@progbits
 	.align	2
@@ -2332,24 +2282,26 @@ ftl_memset:
 	.type	FtlMemInit, %function
 FtlMemInit:
 	stp	x29, x30, [sp, -64]!
-	adrp	x0, .LANCHOR82
+	adrp	x0, .LANCHOR81
 	mov	w1, 65535
 	add	x29, sp, 0
+	str	wzr, [x0, #:lo12:.LANCHOR81]
+	adrp	x0, .LANCHOR82
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR20
 	str	wzr, [x0, #:lo12:.LANCHOR82]
 	adrp	x0, .LANCHOR83
-	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR21
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR2
 	str	wzr, [x0, #:lo12:.LANCHOR83]
 	adrp	x0, .LANCHOR84
-	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR3
+	str	x23, [sp, 48]
+	adrp	x22, .LANCHOR22
 	str	wzr, [x0, #:lo12:.LANCHOR84]
 	adrp	x0, .LANCHOR85
-	str	x23, [sp, 48]
-	adrp	x21, .LANCHOR23
+	adrp	x23, .LANCHOR23
 	str	wzr, [x0, #:lo12:.LANCHOR85]
 	adrp	x0, .LANCHOR86
-	adrp	x23, .LANCHOR24
 	str	wzr, [x0, #:lo12:.LANCHOR86]
 	adrp	x0, .LANCHOR87
 	str	wzr, [x0, #:lo12:.LANCHOR87]
@@ -2359,10 +2311,10 @@ FtlMemInit:
 	str	wzr, [x0, #:lo12:.LANCHOR89]
 	adrp	x0, .LANCHOR90
 	str	wzr, [x0, #:lo12:.LANCHOR90]
+	adrp	x0, .LANCHOR79
+	str	wzr, [x0, #:lo12:.LANCHOR79]
 	adrp	x0, .LANCHOR91
 	str	wzr, [x0, #:lo12:.LANCHOR91]
-	adrp	x0, .LANCHOR80
-	str	wzr, [x0, #:lo12:.LANCHOR80]
 	adrp	x0, .LANCHOR92
 	str	wzr, [x0, #:lo12:.LANCHOR92]
 	adrp	x0, .LANCHOR93
@@ -2370,72 +2322,74 @@ FtlMemInit:
 	adrp	x0, .LANCHOR94
 	str	wzr, [x0, #:lo12:.LANCHOR94]
 	adrp	x0, .LANCHOR95
-	str	wzr, [x0, #:lo12:.LANCHOR95]
+	str	w1, [x0, #:lo12:.LANCHOR95]
 	adrp	x0, .LANCHOR96
-	str	w1, [x0, #:lo12:.LANCHOR96]
+	adrp	x1, .LANCHOR71
+	str	wzr, [x0, #:lo12:.LANCHOR96]
 	adrp	x0, .LANCHOR97
-	adrp	x1, .LANCHOR72
 	str	wzr, [x0, #:lo12:.LANCHOR97]
 	adrp	x0, .LANCHOR98
 	str	wzr, [x0, #:lo12:.LANCHOR98]
-	adrp	x0, .LANCHOR99
-	str	wzr, [x0, #:lo12:.LANCHOR99]
 	mov	w0, -1
+	strh	w0, [x1, #:lo12:.LANCHOR71]
+	adrp	x1, .LANCHOR72
 	strh	w0, [x1, #:lo12:.LANCHOR72]
-	adrp	x1, .LANCHOR73
-	strh	w0, [x1, #:lo12:.LANCHOR73]
-	adrp	x0, .LANCHOR100
+	adrp	x0, .LANCHOR99
 	mov	w1, 32
+	strh	w1, [x0, #:lo12:.LANCHOR99]
+	adrp	x0, .LANCHOR100
+	mov	w1, 128
 	strh	w1, [x0, #:lo12:.LANCHOR100]
 	adrp	x0, .LANCHOR101
-	mov	w1, 128
-	strh	w1, [x0, #:lo12:.LANCHOR101]
-	adrp	x0, .LANCHOR102
-	strh	wzr, [x0, #:lo12:.LANCHOR102]
-	adrp	x0, .LANCHOR74
-	strh	wzr, [x0, #:lo12:.LANCHOR74]
-	adrp	x0, .LANCHOR76
-	strh	wzr, [x0, #:lo12:.LANCHOR76]
-	ldrh	w0, [x19, #:lo12:.LANCHOR21]
+	strh	wzr, [x0, #:lo12:.LANCHOR101]
+	adrp	x0, .LANCHOR73
+	strh	wzr, [x0, #:lo12:.LANCHOR73]
+	adrp	x0, .LANCHOR75
+	strh	wzr, [x0, #:lo12:.LANCHOR75]
+	ldrh	w0, [x19, #:lo12:.LANCHOR20]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR69
-	str	x0, [x1, #:lo12:.LANCHOR69]
+	adrp	x1, .LANCHOR68
+	str	x0, [x1, #:lo12:.LANCHOR68]
 	mov	w0, 12
-	ldrh	w1, [x19, #:lo12:.LANCHOR21]
+	ldrh	w1, [x19, #:lo12:.LANCHOR20]
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	ldrh	w19, [x22, #:lo12:.LANCHOR3]
-	adrp	x1, .LANCHOR71
+	ldrh	w19, [x21, #:lo12:.LANCHOR2]
+	adrp	x1, .LANCHOR70
 	lsl	w20, w19, 5
 	lsl	w19, w19, 7
-	str	x0, [x1, #:lo12:.LANCHOR71]
+	str	x0, [x1, #:lo12:.LANCHOR70]
 	mov	w0, w19
 	bl	ftl_malloc
+	adrp	x1, .LANCHOR102
+	str	x0, [x1, #:lo12:.LANCHOR102]
+	mov	w0, w20
+	bl	ftl_malloc
 	adrp	x1, .LANCHOR103
 	str	x0, [x1, #:lo12:.LANCHOR103]
-	mov	w0, w20
+	mov	w0, w19
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR104
 	str	x0, [x1, #:lo12:.LANCHOR104]
-	mov	w0, w19
+	mov	w0, w20
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR105
-	str	x0, [x1, #:lo12:.LANCHOR105]
-	mov	w0, w20
-	bl	ftl_malloc
-	adrp	x1, .LANCHOR79
-	str	x0, [x1, #:lo12:.LANCHOR79]
+	adrp	x1, .LANCHOR78
+	str	x0, [x1, #:lo12:.LANCHOR78]
 	mov	w0, w20
 	bl	ftl_malloc
-	adrp	x20, .LANCHOR67
-	adrp	x1, .LANCHOR66
-	ldrh	w19, [x21, #:lo12:.LANCHOR23]
-	str	x0, [x1, #:lo12:.LANCHOR66]
-	ldrh	w0, [x22, #:lo12:.LANCHOR3]
+	adrp	x20, .LANCHOR66
+	adrp	x1, .LANCHOR65
+	ldrh	w19, [x22, #:lo12:.LANCHOR22]
+	str	x0, [x1, #:lo12:.LANCHOR65]
+	ldrh	w0, [x21, #:lo12:.LANCHOR2]
 	lsl	w0, w0, 1
 	add	w0, w0, 1
-	str	w0, [x20, #:lo12:.LANCHOR67]
+	str	w0, [x20, #:lo12:.LANCHOR66]
+	mov	w0, w19
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR105
+	str	x0, [x1, #:lo12:.LANCHOR105]
 	mov	w0, w19
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR106
@@ -2444,206 +2398,196 @@ FtlMemInit:
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR107
 	str	x0, [x1, #:lo12:.LANCHOR107]
+	ldr	w0, [x20, #:lo12:.LANCHOR66]
+	mul	w0, w19, w0
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR63
+	str	x0, [x1, #:lo12:.LANCHOR63]
 	mov	w0, w19
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR108
 	str	x0, [x1, #:lo12:.LANCHOR108]
-	ldr	w0, [x20, #:lo12:.LANCHOR67]
-	mul	w0, w19, w0
-	bl	ftl_malloc
-	adrp	x1, .LANCHOR64
-	str	x0, [x1, #:lo12:.LANCHOR64]
 	mov	w0, w19
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR109
 	str	x0, [x1, #:lo12:.LANCHOR109]
+	mov	w0, 24
+	ldr	w1, [x20, #:lo12:.LANCHOR66]
+	mul	w0, w1, w0
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR62
+	str	x0, [x1, #:lo12:.LANCHOR62]
 	mov	w0, w19
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR110
 	str	x0, [x1, #:lo12:.LANCHOR110]
-	mov	w0, 24
-	ldr	w1, [x20, #:lo12:.LANCHOR67]
-	mul	w0, w1, w0
-	bl	ftl_malloc
-	adrp	x1, .LANCHOR63
-	str	x0, [x1, #:lo12:.LANCHOR63]
 	mov	w0, w19
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR111
 	str	x0, [x1, #:lo12:.LANCHOR111]
-	mov	w0, w19
+	adrp	x0, .LANCHOR11
+	ldrh	w0, [x0, #:lo12:.LANCHOR11]
+	lsl	w0, w0, 2
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR112
+	ldrh	w19, [x23, #:lo12:.LANCHOR23]
 	str	x0, [x1, #:lo12:.LANCHOR112]
-	adrp	x0, .LANCHOR12
-	ldrh	w0, [x0, #:lo12:.LANCHOR12]
-	lsl	w0, w0, 2
+	ldrh	w0, [x21, #:lo12:.LANCHOR2]
+	adrp	x21, .LANCHOR29
+	mul	w19, w19, w0
+	mov	w0, w19
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR113
-	ldrh	w19, [x23, #:lo12:.LANCHOR24]
 	str	x0, [x1, #:lo12:.LANCHOR113]
-	ldrh	w0, [x22, #:lo12:.LANCHOR3]
-	adrp	x22, .LANCHOR30
-	mul	w19, w19, w0
-	mov	w0, w19
+	lsl	w0, w19, 2
 	bl	ftl_malloc
+	adrp	x19, .LANCHOR115
 	adrp	x1, .LANCHOR114
 	str	x0, [x1, #:lo12:.LANCHOR114]
-	lsl	w0, w19, 2
-	bl	ftl_malloc
-	adrp	x19, .LANCHOR6
-	adrp	x1, .LANCHOR115
-	str	x0, [x1, #:lo12:.LANCHOR115]
-	ldrh	w1, [x23, #:lo12:.LANCHOR24]
-	ldr	w0, [x20, #:lo12:.LANCHOR67]
-	adrp	x20, .LANCHOR116
+	ldrh	w1, [x23, #:lo12:.LANCHOR23]
+	ldr	w0, [x20, #:lo12:.LANCHOR66]
+	adrp	x20, .LANCHOR5
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR65
-	str	x0, [x1, #:lo12:.LANCHOR65]
-	ldrh	w0, [x19, #:lo12:.LANCHOR6]
+	adrp	x1, .LANCHOR64
+	str	x0, [x1, #:lo12:.LANCHOR64]
+	ldrh	w0, [x20, #:lo12:.LANCHOR5]
 	ubfiz	w0, w0, 1, 15
-	strh	w0, [x20, #:lo12:.LANCHOR116]
+	strh	w0, [x19, #:lo12:.LANCHOR115]
 	and	w0, w0, 65534
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR117
-	str	x0, [x1, #:lo12:.LANCHOR117]
-	ldrh	w0, [x20, #:lo12:.LANCHOR116]
+	adrp	x1, .LANCHOR116
+	str	x0, [x1, #:lo12:.LANCHOR116]
+	ldrh	w0, [x19, #:lo12:.LANCHOR115]
 	add	x0, x0, 547
 	lsr	x0, x0, 9
-	strh	w0, [x20, #:lo12:.LANCHOR116]
+	strh	w0, [x19, #:lo12:.LANCHOR115]
 	lsl	w0, w0, 9
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR118
-	str	x0, [x1, #:lo12:.LANCHOR118]
-	adrp	x1, .LANCHOR47
+	adrp	x1, .LANCHOR117
+	str	x0, [x1, #:lo12:.LANCHOR117]
+	adrp	x1, .LANCHOR46
 	add	x0, x0, 32
-	str	x0, [x1, #:lo12:.LANCHOR47]
-	ldrh	w0, [x19, #:lo12:.LANCHOR6]
+	str	x0, [x1, #:lo12:.LANCHOR46]
+	ldrh	w0, [x20, #:lo12:.LANCHOR5]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-	ldr	w20, [x22, #:lo12:.LANCHOR30]
-	adrp	x1, .LANCHOR42
-	str	x0, [x1, #:lo12:.LANCHOR42]
-	lsl	w20, w20, 1
-	mov	w0, w20
+	ldr	w19, [x21, #:lo12:.LANCHOR29]
+	adrp	x1, .LANCHOR41
+	str	x0, [x1, #:lo12:.LANCHOR41]
+	lsl	w19, w19, 1
+	mov	w0, w19
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR118
+	str	x0, [x1, #:lo12:.LANCHOR118]
+	mov	w0, w19
 	bl	ftl_malloc
+	adrp	x19, .LANCHOR26
 	adrp	x1, .LANCHOR119
 	str	x0, [x1, #:lo12:.LANCHOR119]
-	mov	w0, w20
-	bl	ftl_malloc
-	adrp	x20, .LANCHOR27
-	adrp	x1, .LANCHOR120
-	str	x0, [x1, #:lo12:.LANCHOR120]
-	ldrh	w0, [x19, #:lo12:.LANCHOR6]
-	lsr	w0, w0, 3
-	add	w0, w0, 4
-	bl	ftl_malloc
-	adrp	x1, .LANCHOR1
-	str	x0, [x1, #:lo12:.LANCHOR1]
-	ldrh	w0, [x20, #:lo12:.LANCHOR27]
+	ldrh	w0, [x19, #:lo12:.LANCHOR26]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR36
-	str	x0, [x1, #:lo12:.LANCHOR36]
-	ldrh	w0, [x20, #:lo12:.LANCHOR27]
+	adrp	x1, .LANCHOR35
+	str	x0, [x1, #:lo12:.LANCHOR35]
+	ldrh	w0, [x19, #:lo12:.LANCHOR26]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
+	adrp	x1, .LANCHOR120
+	str	x0, [x1, #:lo12:.LANCHOR120]
+	ldrh	w0, [x19, #:lo12:.LANCHOR26]
+	adrp	x19, .LANCHOR27
+	lsl	w0, w0, 2
+	bl	ftl_malloc
 	adrp	x1, .LANCHOR121
 	str	x0, [x1, #:lo12:.LANCHOR121]
-	ldrh	w0, [x20, #:lo12:.LANCHOR27]
-	adrp	x20, .LANCHOR28
+	ldrh	w0, [x19, #:lo12:.LANCHOR27]
 	lsl	w0, w0, 2
 	bl	ftl_malloc
+	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	adrp	x1, .LANCHOR122
+	adrp	x19, .LANCHOR32
 	str	x0, [x1, #:lo12:.LANCHOR122]
-	ldrh	w0, [x20, #:lo12:.LANCHOR28]
+	mov	w1, 0
+	lsl	w2, w2, 2
+	bl	ftl_memset
+	adrp	x0, .LANCHOR31
+	ldrh	w0, [x0, #:lo12:.LANCHOR31]
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	ldrh	w2, [x20, #:lo12:.LANCHOR28]
 	adrp	x1, .LANCHOR123
-	adrp	x20, .LANCHOR33
 	str	x0, [x1, #:lo12:.LANCHOR123]
-	mov	w1, 0
-	lsl	w2, w2, 2
-	bl	ftl_memset
-	adrp	x0, .LANCHOR32
-	ldrh	w0, [x0, #:lo12:.LANCHOR32]
+	ldr	w0, [x21, #:lo12:.LANCHOR29]
 	lsl	w0, w0, 2
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR124
 	str	x0, [x1, #:lo12:.LANCHOR124]
-	ldr	w0, [x22, #:lo12:.LANCHOR30]
-	lsl	w0, w0, 2
-	bl	ftl_malloc
-	adrp	x1, .LANCHOR125
-	str	x0, [x1, #:lo12:.LANCHOR125]
-	ldrh	w0, [x20, #:lo12:.LANCHOR33]
+	ldrh	w0, [x19, #:lo12:.LANCHOR32]
 	lsl	w0, w0, 4
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR55
-	str	x0, [x1, #:lo12:.LANCHOR55]
-	ldrh	w1, [x20, #:lo12:.LANCHOR33]
-	adrp	x20, .LANCHOR10
-	ldrh	w0, [x21, #:lo12:.LANCHOR23]
+	adrp	x1, .LANCHOR54
+	str	x0, [x1, #:lo12:.LANCHOR54]
+	ldrh	w1, [x19, #:lo12:.LANCHOR32]
+	adrp	x19, .LANCHOR126
+	ldrh	w0, [x22, #:lo12:.LANCHOR22]
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR126
-	str	x0, [x1, #:lo12:.LANCHOR126]
+	adrp	x1, .LANCHOR125
+	str	x0, [x1, #:lo12:.LANCHOR125]
 	mov	w0, 6
-	ldrh	w1, [x19, #:lo12:.LANCHOR6]
-	adrp	x19, .LANCHOR127
+	ldrh	w1, [x20, #:lo12:.LANCHOR5]
+	adrp	x20, .LANCHOR9
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR40
-	str	x0, [x1, #:lo12:.LANCHOR40]
-	adrp	x0, .LANCHOR17
-	ldrh	w1, [x20, #:lo12:.LANCHOR10]
-	ldrh	w0, [x0, #:lo12:.LANCHOR17]
+	adrp	x1, .LANCHOR39
+	str	x0, [x1, #:lo12:.LANCHOR39]
+	adrp	x0, .LANCHOR16
+	ldrh	w1, [x20, #:lo12:.LANCHOR9]
+	ldrh	w0, [x0, #:lo12:.LANCHOR16]
 	add	w0, w0, 31
 	asr	w0, w0, 5
-	strh	w0, [x19, #:lo12:.LANCHOR127]
+	strh	w0, [x19, #:lo12:.LANCHOR126]
 	mul	w0, w1, w0
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR37
-	ldrh	w5, [x19, #:lo12:.LANCHOR127]
-	add	x2, x1, :lo12:.LANCHOR37
-	ldrh	w7, [x20, #:lo12:.LANCHOR10]
+	adrp	x1, .LANCHOR36
+	ldrh	w5, [x19, #:lo12:.LANCHOR126]
+	add	x2, x1, :lo12:.LANCHOR36
+	ldrh	w7, [x20, #:lo12:.LANCHOR9]
 	add	x6, x2, 40
 	mov	w3, w5
 	str	x0, [x2, 32]
 	mov	x0, 1
-.L315:
+.L311:
 	cmp	w0, w7
-	bcc	.L316
+	bcc	.L312
 	mov	w2, 8
 	sub	w2, w2, w0
 	add	x2, x2, 1
-	add	x1, x1, :lo12:.LANCHOR37
+	add	x1, x1, :lo12:.LANCHOR36
 	mov	x3, 0
-.L317:
+.L313:
 	add	x3, x3, 1
 	cmp	x2, x3
-	bne	.L318
+	bne	.L314
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L316:
+.L312:
 	ldr	x4, [x2, 32]
 	add	w0, w0, 1
 	add	x4, x4, x3, uxtw 2
 	add	w3, w3, w5
 	str	x4, [x6], 8
-	b	.L315
-.L318:
+	b	.L311
+.L314:
 	add	x4, x0, x3
 	add	x4, x1, x4, lsl 3
 	str	xzr, [x4, 24]
-	b	.L317
+	b	.L313
 	.size	FtlMemInit, .-FtlMemInit
 	.section	.text.FtlBbt2Bitmap,"ax",@progbits
 	.align	2
@@ -2654,13 +2598,13 @@ FtlBbt2Bitmap:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	mov	x22, x0
-	adrp	x0, .LANCHOR127
+	adrp	x0, .LANCHOR126
 	stp	x23, x24, [sp, 48]
-	adrp	x21, .LANCHOR17
-	adrp	x23, .LANCHOR128
-	ldrh	w2, [x0, #:lo12:.LANCHOR127]
-	add	x21, x21, :lo12:.LANCHOR17
-	add	x23, x23, :lo12:.LANCHOR128
+	adrp	x21, .LANCHOR16
+	adrp	x23, .LANCHOR127
+	ldrh	w2, [x0, #:lo12:.LANCHOR126]
+	add	x21, x21, :lo12:.LANCHOR16
+	add	x23, x23, :lo12:.LANCHOR127
 	stp	x19, x20, [sp, 16]
 	mov	w24, 65535
 	mov	x19, 0
@@ -2669,19 +2613,19 @@ FtlBbt2Bitmap:
 	mov	w1, 0
 	mov	x0, x20
 	bl	ftl_memset
-.L323:
+.L319:
 	ldrh	w0, [x22, x19]
 	cmp	w0, w24
-	beq	.L320
+	beq	.L316
 	ldrh	w1, [x21]
 	cmp	w1, w0
-	bhi	.L322
+	bhi	.L318
 	adrp	x0, .LC1
 	mov	w2, 74
 	mov	x1, x23
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L322:
+.L318:
 	ldrh	w2, [x22, x19]
 	mov	w1, 1
 	add	x19, x19, 2
@@ -2692,8 +2636,8 @@ FtlBbt2Bitmap:
 	ldr	w1, [x20, x0]
 	orr	w1, w1, w2
 	str	w1, [x20, x0]
-	bne	.L323
-.L320:
+	bne	.L319
+.L316:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -2705,11 +2649,11 @@ FtlBbt2Bitmap:
 	.global	FtlBbtMemInit
 	.type	FtlBbtMemInit, %function
 FtlBbtMemInit:
-	adrp	x1, .LANCHOR37
-	add	x0, x1, :lo12:.LANCHOR37
+	adrp	x1, .LANCHOR36
+	add	x0, x1, :lo12:.LANCHOR36
 	mov	w2, -1
 	add	x0, x0, 12
-	strh	w2, [x1, #:lo12:.LANCHOR37]
+	strh	w2, [x1, #:lo12:.LANCHOR36]
 	mov	w2, 16
 	strh	wzr, [x0, -6]
 	mov	w1, 255
@@ -2721,11 +2665,11 @@ FtlBbtMemInit:
 	.type	FtlFreeSysBlkQueueInit, %function
 FtlFreeSysBlkQueueInit:
 	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR38
-	add	x3, x1, :lo12:.LANCHOR38
+	adrp	x1, .LANCHOR37
+	add	x3, x1, :lo12:.LANCHOR37
 	mov	w2, 2048
 	add	x29, sp, 0
-	strh	w0, [x1, #:lo12:.LANCHOR38]
+	strh	w0, [x1, #:lo12:.LANCHOR37]
 	mov	w1, 0
 	strh	wzr, [x3, 2]
 	add	x0, x3, 8
@@ -2756,21 +2700,21 @@ ftl_free_no_use_map_blk:
 	str	x25, [sp, 64]
 	bl	ftl_memset
 	mov	w0, 0
-.L331:
+.L327:
 	ldrh	w1, [x19, 6]
 	cmp	w1, w0
-	bhi	.L335
-	adrp	x0, .LANCHOR20
+	bhi	.L331
+	adrp	x0, .LANCHOR19
 	mov	w23, 0
 	mov	w20, 0
-	ldrh	w1, [x0, #:lo12:.LANCHOR20]
+	ldrh	w1, [x0, #:lo12:.LANCHOR19]
 	ldrh	w0, [x19]
 	strh	w1, [x21, x0, lsl 1]
 	ldrh	w24, [x21]
-.L336:
+.L332:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L340
+	bhi	.L336
 	mov	w0, w23
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -2778,64 +2722,64 @@ ftl_free_no_use_map_blk:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L335:
+.L331:
 	ubfiz	x1, x0, 2, 16
 	ldr	w2, [x20, x1]
 	mov	w1, 0
 	ubfx	x2, x2, 10, 16
-.L332:
+.L328:
 	ldrh	w3, [x19, 10]
 	cmp	w3, w1
-	bhi	.L334
+	bhi	.L330
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L331
-.L334:
+	b	.L327
+.L330:
 	ubfiz	x3, x1, 1, 16
 	ldrh	w4, [x22, x3]
 	cmp	w4, w2
-	bne	.L333
-	cbz	w2, .L333
+	bne	.L329
+	cbz	w2, .L329
 	ldrh	w4, [x21, x3]
 	add	w4, w4, 1
 	strh	w4, [x21, x3]
-.L333:
+.L329:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L332
-.L340:
+	b	.L328
+.L336:
 	ubfiz	x0, x20, 1, 16
 	ldrh	w1, [x21, x0]
 	cmp	w24, w1
-	bls	.L337
+	bls	.L333
 	add	x25, x22, x0
 	ldrh	w0, [x22, x0]
-	cbnz	w0, .L338
-.L339:
+	cbnz	w0, .L334
+.L335:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L336
-.L337:
-	cbnz	w1, .L339
+	b	.L332
+.L333:
+	cbnz	w1, .L335
 	add	x25, x22, x0
 	ldrh	w0, [x22, x0]
-	cbz	w0, .L339
-.L341:
+	cbz	w0, .L335
+.L337:
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
 	strh	wzr, [x25]
 	ldrh	w0, [x19, 8]
 	sub	w0, w0, #1
 	strh	w0, [x19, 8]
-	b	.L339
-.L342:
-	mov	w24, 0
-	b	.L341
+	b	.L335
 .L338:
+	mov	w24, 0
+	b	.L337
+.L334:
 	mov	w23, w20
-	cbz	w1, .L342
+	cbz	w1, .L338
 	mov	w24, w1
-	b	.L339
+	b	.L335
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.section	.text.FtlL2PDataInit,"ax",@progbits
 	.align	2
@@ -2846,66 +2790,66 @@ FtlL2PDataInit:
 	mov	w1, 0
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR120
-	adrp	x20, .LANCHOR30
+	adrp	x19, .LANCHOR119
+	adrp	x20, .LANCHOR29
 	stp	x21, x22, [sp, 32]
-	ldr	x0, [x19, #:lo12:.LANCHOR120]
-	adrp	x22, .LANCHOR23
-	ldr	w2, [x20, #:lo12:.LANCHOR30]
-	adrp	x21, .LANCHOR33
+	ldr	x0, [x19, #:lo12:.LANCHOR119]
+	adrp	x22, .LANCHOR22
+	ldr	w2, [x20, #:lo12:.LANCHOR29]
+	adrp	x21, .LANCHOR32
 	str	x23, [sp, 48]
-	adrp	x23, .LANCHOR126
+	adrp	x23, .LANCHOR125
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	ldrh	w0, [x21, #:lo12:.LANCHOR33]
+	ldrh	w0, [x21, #:lo12:.LANCHOR32]
 	mov	w1, 255
-	ldrh	w2, [x22, #:lo12:.LANCHOR23]
+	ldrh	w2, [x22, #:lo12:.LANCHOR22]
 	mul	w2, w2, w0
-	ldr	x0, [x23, #:lo12:.LANCHOR126]
+	ldr	x0, [x23, #:lo12:.LANCHOR125]
 	bl	ftl_memset
-	adrp	x0, .LANCHOR55
-	ldrh	w3, [x21, #:lo12:.LANCHOR33]
-	ldr	x6, [x23, #:lo12:.LANCHOR126]
+	adrp	x0, .LANCHOR54
+	ldrh	w3, [x21, #:lo12:.LANCHOR32]
+	ldr	x6, [x23, #:lo12:.LANCHOR125]
 	mov	x1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR55]
+	ldr	x0, [x0, #:lo12:.LANCHOR54]
 	mov	w2, -1
-	ldrh	w5, [x22, #:lo12:.LANCHOR23]
+	ldrh	w5, [x22, #:lo12:.LANCHOR22]
 	add	x3, x0, x3, lsl 4
-.L352:
+.L348:
 	add	x4, x1, x5
 	cmp	x0, x3
-	bne	.L353
-	adrp	x1, .LANCHOR129
-	add	x0, x1, :lo12:.LANCHOR129
+	bne	.L349
+	adrp	x1, .LANCHOR128
+	add	x0, x1, :lo12:.LANCHOR128
 	ldp	x21, x22, [sp, 32]
-	strh	w2, [x1, #:lo12:.LANCHOR129]
-	ldr	w1, [x20, #:lo12:.LANCHOR30]
+	strh	w2, [x1, #:lo12:.LANCHOR128]
+	ldr	w1, [x20, #:lo12:.LANCHOR29]
 	strh	w1, [x0, 10]
 	mov	w1, -3902
 	strh	w1, [x0, 4]
-	adrp	x1, .LANCHOR130
+	adrp	x1, .LANCHOR129
 	ldr	x23, [sp, 48]
 	strh	w2, [x0, 2]
-	ldrh	w1, [x1, #:lo12:.LANCHOR130]
+	ldrh	w1, [x1, #:lo12:.LANCHOR129]
 	strh	w1, [x0, 8]
-	adrp	x1, .LANCHOR32
-	ldrh	w1, [x1, #:lo12:.LANCHOR32]
+	adrp	x1, .LANCHOR31
+	ldrh	w1, [x1, #:lo12:.LANCHOR31]
 	strh	w1, [x0, 6]
-	adrp	x1, .LANCHOR119
-	ldr	x1, [x1, #:lo12:.LANCHOR119]
+	adrp	x1, .LANCHOR118
+	ldr	x1, [x1, #:lo12:.LANCHOR118]
 	str	x1, [x0, 16]
-	adrp	x1, .LANCHOR125
-	ldr	x1, [x1, #:lo12:.LANCHOR125]
+	adrp	x1, .LANCHOR124
+	ldr	x1, [x1, #:lo12:.LANCHOR124]
 	str	x1, [x0, 24]
-	ldr	x1, [x19, #:lo12:.LANCHOR120]
+	ldr	x1, [x19, #:lo12:.LANCHOR119]
 	ldp	x19, x20, [sp, 16]
 	str	x1, [x0, 32]
-	adrp	x1, .LANCHOR124
-	ldr	x1, [x1, #:lo12:.LANCHOR124]
+	adrp	x1, .LANCHOR123
+	ldr	x1, [x1, #:lo12:.LANCHOR123]
 	str	x1, [x0, 40]
 	ldp	x29, x30, [sp], 64
 	ret
-.L353:
+.L349:
 	and	x1, x1, -4
 	strh	w2, [x0]
 	add	x1, x6, x1
@@ -2913,7 +2857,7 @@ FtlL2PDataInit:
 	str	x1, [x0, 8]
 	add	x0, x0, 16
 	mov	x1, x4
-	b	.L352
+	b	.L348
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
 	.section	.text.FtlVariablesInit,"ax",@progbits
 	.align	2
@@ -2921,49 +2865,49 @@ FtlL2PDataInit:
 	.type	FtlVariablesInit, %function
 FtlVariablesInit:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR131
+	adrp	x0, .LANCHOR130
 	mov	w1, -1
 	add	x29, sp, 0
-	strh	w1, [x0, #:lo12:.LANCHOR131]
-	adrp	x0, .LANCHOR132
+	strh	w1, [x0, #:lo12:.LANCHOR130]
+	adrp	x0, .LANCHOR131
 	mov	w1, -1
 	str	x19, [sp, 16]
+	str	wzr, [x0, #:lo12:.LANCHOR131]
+	adrp	x0, .LANCHOR132
+	adrp	x19, .LANCHOR5
 	str	wzr, [x0, #:lo12:.LANCHOR132]
 	adrp	x0, .LANCHOR133
-	adrp	x19, .LANCHOR6
-	str	wzr, [x0, #:lo12:.LANCHOR133]
-	adrp	x0, .LANCHOR134
-	str	w1, [x0, #:lo12:.LANCHOR134]
-	adrp	x0, .LANCHOR35
+	str	w1, [x0, #:lo12:.LANCHOR133]
+	adrp	x0, .LANCHOR34
 	mov	w1, 0
-	strh	wzr, [x0, #:lo12:.LANCHOR35]
-	adrp	x0, .LANCHOR27
-	ldrh	w2, [x0, #:lo12:.LANCHOR27]
-	adrp	x0, .LANCHOR36
-	ldr	x0, [x0, #:lo12:.LANCHOR36]
+	strh	wzr, [x0, #:lo12:.LANCHOR34]
+	adrp	x0, .LANCHOR26
+	ldrh	w2, [x0, #:lo12:.LANCHOR26]
+	adrp	x0, .LANCHOR35
+	ldr	x0, [x0, #:lo12:.LANCHOR35]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	adrp	x0, .LANCHOR47
-	ldrh	w2, [x19, #:lo12:.LANCHOR6]
+	adrp	x0, .LANCHOR46
+	ldrh	w2, [x19, #:lo12:.LANCHOR5]
 	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR47]
+	ldr	x0, [x0, #:lo12:.LANCHOR46]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	adrp	x0, .LANCHOR117
-	ldrh	w2, [x19, #:lo12:.LANCHOR6]
+	adrp	x0, .LANCHOR116
+	ldrh	w2, [x19, #:lo12:.LANCHOR5]
 	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR117]
+	ldr	x0, [x0, #:lo12:.LANCHOR116]
 	lsl	w2, w2, 1
 	bl	ftl_memset
 	mov	w2, 48
 	mov	w1, 0
-	adrp	x0, .LANCHOR39
-	add	x0, x0, :lo12:.LANCHOR39
+	adrp	x0, .LANCHOR38
+	add	x0, x0, :lo12:.LANCHOR38
 	bl	ftl_memset
 	mov	w2, 512
 	mov	w1, 0
-	adrp	x0, .LANCHOR135
-	add	x0, x0, :lo12:.LANCHOR135
+	adrp	x0, .LANCHOR134
+	add	x0, x0, :lo12:.LANCHOR134
 	bl	ftl_memset
 	bl	FtlGcBufInit
 	bl	FtlL2PDataInit
@@ -2978,120 +2922,120 @@ FtlVariablesInit:
 	.type	SupperBlkListInit, %function
 SupperBlkListInit:
 	stp	x29, x30, [sp, -96]!
-	adrp	x0, .LANCHOR6
+	adrp	x0, .LANCHOR5
 	mov	w1, 0
 	add	x29, sp, 0
-	ldrh	w2, [x0, #:lo12:.LANCHOR6]
+	ldrh	w2, [x0, #:lo12:.LANCHOR5]
 	mov	w0, 6
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR40
+	adrp	x24, .LANCHOR39
 	stp	x19, x20, [sp, 16]
-	adrp	x23, .LANCHOR44
+	adrp	x23, .LANCHOR43
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR48
+	adrp	x22, .LANCHOR47
 	mul	w2, w2, w0
-	ldr	x0, [x24, #:lo12:.LANCHOR40]
+	ldr	x0, [x24, #:lo12:.LANCHOR39]
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR5
+	adrp	x25, .LANCHOR4
 	str	x27, [sp, 80]
-	adrp	x26, .LANCHOR13
-	add	x25, x25, :lo12:.LANCHOR5
-	add	x26, x26, :lo12:.LANCHOR13
+	adrp	x26, .LANCHOR12
+	add	x25, x25, :lo12:.LANCHOR4
+	add	x26, x26, :lo12:.LANCHOR12
 	bl	ftl_memset
 	mov	w21, 0
-	adrp	x0, .LANCHOR46
+	adrp	x0, .LANCHOR45
 	mov	w20, 0
 	mov	w19, 0
-	strh	wzr, [x23, #:lo12:.LANCHOR44]
-	str	xzr, [x0, #:lo12:.LANCHOR46]
-	adrp	x0, .LANCHOR41
-	strh	wzr, [x22, #:lo12:.LANCHOR48]
-	adrp	x27, .LANCHOR3
-	str	xzr, [x0, #:lo12:.LANCHOR41]
-	adrp	x0, .LANCHOR43
-	str	xzr, [x0, #:lo12:.LANCHOR43]
-.L358:
+	strh	wzr, [x23, #:lo12:.LANCHOR43]
+	str	xzr, [x0, #:lo12:.LANCHOR45]
+	adrp	x0, .LANCHOR40
+	strh	wzr, [x22, #:lo12:.LANCHOR47]
+	adrp	x27, .LANCHOR2
+	str	xzr, [x0, #:lo12:.LANCHOR40]
+	adrp	x0, .LANCHOR42
+	str	xzr, [x0, #:lo12:.LANCHOR42]
+.L354:
 	ldrh	w0, [x25]
 	cmp	w19, w0
-	bcs	.L365
-	adrp	x0, .LANCHOR19
-	ldrh	w8, [x27, #:lo12:.LANCHOR3]
+	bcs	.L361
+	adrp	x0, .LANCHOR18
+	ldrh	w8, [x27, #:lo12:.LANCHOR2]
 	mov	x6, 0
 	mov	w5, 0
-	ldrh	w7, [x0, #:lo12:.LANCHOR19]
-	b	.L366
-.L360:
+	ldrh	w7, [x0, #:lo12:.LANCHOR18]
+	b	.L362
+.L356:
 	ldrb	w0, [x26, x6]
 	mov	w1, w19
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L359
+	cbnz	w0, .L355
 	add	w5, w5, w7
 	and	w5, w5, 65535
-.L359:
+.L355:
 	add	x6, x6, 1
-.L366:
+.L362:
 	cmp	w8, w6, uxth
-	bhi	.L360
-	cbz	w5, .L361
+	bhi	.L356
+	cbz	w5, .L357
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.L362:
-	ldr	x1, [x24, #:lo12:.LANCHOR40]
+.L358:
+	ldr	x1, [x24, #:lo12:.LANCHOR39]
 	mov	w0, 6
 	umaddl	x0, w19, w0, x1
 	strh	w5, [x0, 4]
+	adrp	x0, .LANCHOR50
+	ldrh	w0, [x0, #:lo12:.LANCHOR50]
+	cmp	w0, w19
+	beq	.L359
 	adrp	x0, .LANCHOR51
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w19
-	beq	.L363
+	beq	.L359
 	adrp	x0, .LANCHOR52
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
-	beq	.L363
-	adrp	x0, .LANCHOR53
-	ldrh	w0, [x0, #:lo12:.LANCHOR53]
-	cmp	w0, w19
-	beq	.L363
-	adrp	x1, .LANCHOR42
+	beq	.L359
+	adrp	x1, .LANCHOR41
 	ubfiz	x0, x19, 1, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR42]
+	ldr	x1, [x1, #:lo12:.LANCHOR41]
 	ldrh	w0, [x1, x0]
-	cbnz	w0, .L364
+	cbnz	w0, .L360
 	add	w21, w21, 1
 	mov	w0, w19
 	and	w21, w21, 65535
 	bl	INSERT_FREE_LIST
-.L363:
+.L359:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L358
-.L361:
-	adrp	x1, .LANCHOR42
+	b	.L354
+.L357:
+	adrp	x1, .LANCHOR41
 	ubfiz	x0, x19, 1, 16
 	mov	w2, -1
-	ldr	x1, [x1, #:lo12:.LANCHOR42]
+	ldr	x1, [x1, #:lo12:.LANCHOR41]
 	strh	w2, [x1, x0]
-	b	.L362
-.L364:
+	b	.L358
+.L360:
 	add	w20, w20, 1
 	mov	w0, w19
 	and	w20, w20, 65535
 	bl	INSERT_DATA_LIST
-	b	.L363
-.L365:
-	strh	w20, [x23, #:lo12:.LANCHOR44]
+	b	.L359
+.L361:
+	strh	w20, [x23, #:lo12:.LANCHOR43]
 	add	w20, w20, w21
-	strh	w21, [x22, #:lo12:.LANCHOR48]
+	strh	w21, [x22, #:lo12:.LANCHOR47]
 	cmp	w20, w0
-	ble	.L367
-	adrp	x1, .LANCHOR136
+	ble	.L363
+	adrp	x1, .LANCHOR135
 	adrp	x0, .LC1
-	mov	w2, 2210
-	add	x1, x1, :lo12:.LANCHOR136
+	mov	w2, 2212
+	add	x1, x1, :lo12:.LANCHOR135
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L367:
+.L363:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -3107,25 +3051,25 @@ SupperBlkListInit:
 	.type	FtlGcPageVarInit, %function
 FtlGcPageVarInit:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR68
+	adrp	x0, .LANCHOR67
 	mov	w1, 255
 	add	x29, sp, 0
-	strh	wzr, [x0, #:lo12:.LANCHOR68]
-	adrp	x0, .LANCHOR70
-	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR21
-	strh	wzr, [x0, #:lo12:.LANCHOR70]
+	strh	wzr, [x0, #:lo12:.LANCHOR67]
 	adrp	x0, .LANCHOR69
-	ldrh	w2, [x19, #:lo12:.LANCHOR21]
-	ldr	x0, [x0, #:lo12:.LANCHOR69]
+	str	x19, [sp, 16]
+	adrp	x19, .LANCHOR20
+	strh	wzr, [x0, #:lo12:.LANCHOR69]
+	adrp	x0, .LANCHOR68
+	ldrh	w2, [x19, #:lo12:.LANCHOR20]
+	ldr	x0, [x0, #:lo12:.LANCHOR68]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	ldrh	w2, [x19, #:lo12:.LANCHOR21]
+	ldrh	w2, [x19, #:lo12:.LANCHOR20]
 	mov	w0, 12
 	mov	w1, 255
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR71
-	ldr	x0, [x0, #:lo12:.LANCHOR71]
+	adrp	x0, .LANCHOR70
+	ldr	x0, [x0, #:lo12:.LANCHOR70]
 	bl	ftl_memset
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -3144,38 +3088,38 @@ FlashGetBadBlockList:
 	mov	w20, w1
 	mov	w1, 255
 	bl	ftl_memset
-	adrp	x0, .LANCHOR78
+	adrp	x0, .LANCHOR77
 	mov	w1, w20
-	ldr	x2, [x0, #:lo12:.LANCHOR78]
+	ldr	x2, [x0, #:lo12:.LANCHOR77]
 	mov	x0, x19
 	blr	x2
 	and	w0, w0, 65535
 	cmp	w0, 50
-	bls	.L372
+	bls	.L368
 	mov	w2, 256
 	mov	w1, 255
 	mov	x0, x19
 	bl	ftl_memset
 	mov	w0, 0
-.L372:
+.L368:
 	adrp	x1, .LANCHOR0+14
 	ldrh	w1, [x1, #:lo12:.LANCHOR0+14]
 	cmp	w1, 4
-	bne	.L376
+	bne	.L372
 	mov	x1, 0
-.L374:
+.L370:
 	cmp	w0, w1, uxth
-	bhi	.L375
-.L376:
+	bhi	.L371
+.L372:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L375:
+.L371:
 	ldrh	w2, [x19, x1, lsl 1]
 	lsr	w2, w2, 1
 	strh	w2, [x19, x1, lsl 1]
 	add	x1, x1, 1
-	b	.L374
+	b	.L370
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
 	.section	.text.ftl_memcpy,"ax",@progbits
 	.align	2
@@ -3198,18 +3142,18 @@ FlashReadPages:
 	add	x2, x21, :lo12:.LANCHOR0
 	str	x27, [sp, 80]
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR137
+	adrp	x24, .LANCHOR136
 	stp	x19, x20, [sp, 16]
 	add	x23, x0, x1
 	ldrh	w27, [x2, 12]
 	mov	x19, x0
 	stp	x25, x26, [sp, 64]
-	add	x24, x24, :lo12:.LANCHOR137
+	add	x24, x24, :lo12:.LANCHOR136
 	adrp	x25, .LC1
 	add	x25, x25, :lo12:.LC1
-.L380:
+.L376:
 	cmp	x23, x19
-	bne	.L393
+	bne	.L389
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -3218,38 +3162,38 @@ FlashReadPages:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L393:
+.L389:
 	ldr	x0, [x19, 8]
-	cbz	x0, .L381
+	cbz	x0, .L377
 	ldr	x0, [x19, 16]
-	cbnz	x0, .L382
-.L381:
+	cbnz	x0, .L378
+.L377:
 	mov	w2, 90
 	mov	x1, x24
 	mov	x0, x25
 	bl	printf
-.L382:
+.L378:
 	ldr	w0, [x19, 4]
 	add	x2, x29, 104
 	add	x1, x29, 108
 	bl	l2p_addr_tran.isra.0
 	ldr	w0, [x29, 104]
 	cmp	w0, 3
-	bls	.L383
+	bls	.L379
 	mov	w0, -1
 	str	w0, [x19]
-.L384:
+.L380:
 	add	x19, x19, 32
-	b	.L380
-.L383:
+	b	.L376
+.L379:
 	ldr	x20, [x19, 8]
-	adrp	x26, .LANCHOR111
+	adrp	x26, .LANCHOR110
 	tst	x20, 63
-	beq	.L385
-	ldr	x20, [x26, #:lo12:.LANCHOR111]
-.L385:
-	adrp	x22, .LANCHOR78
-	add	x22, x22, :lo12:.LANCHOR78
+	beq	.L381
+	ldr	x20, [x26, #:lo12:.LANCHOR110]
+.L381:
+	adrp	x22, .LANCHOR77
+	add	x22, x22, :lo12:.LANCHOR77
 	ldr	w1, [x29, 108]
 	mov	x2, x20
 	ldr	x3, [x19, 16]
@@ -3259,7 +3203,7 @@ FlashReadPages:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
-	bne	.L387
+	bne	.L383
 	ldrb	w0, [x29, 104]
 	add	x2, x20, 2048
 	ldr	x4, [x22, 24]
@@ -3269,65 +3213,65 @@ FlashReadPages:
 	add	x3, x3, 8
 	blr	x4
 	cmn	w0, #1
-	beq	.L388
+	beq	.L384
 	ldr	x1, [x19, 16]
 	ldr	w2, [x1, 12]
 	cmn	w2, #1
-	bne	.L389
+	bne	.L385
 	ldr	w2, [x1, 8]
 	cmn	w2, #1
-	bne	.L389
+	bne	.L385
 	ldr	w1, [x1]
 	cmn	w1, #1
-	beq	.L389
-.L388:
+	beq	.L385
+.L384:
 	mov	w1, -1
 	str	w1, [x19]
-.L389:
+.L385:
 	ldr	w1, [x19]
 	cmn	w1, #1
-	beq	.L390
+	beq	.L386
 	cmp	w0, 256
-	bne	.L390
+	bne	.L386
 	str	w0, [x19]
-.L390:
+.L386:
 	ldr	w3, [x19]
 	cmp	w3, 256
 	ccmn	w3, #1, 4, ne
-	bne	.L387
+	bne	.L383
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC11
 	ldr	w2, [x29, 108]
 	add	x0, x0, :lo12:.LC11
 	bl	printf
 	ldr	x1, [x19, 8]
-	cbz	x1, .L392
+	cbz	x1, .L388
 	mov	w3, 4
 	adrp	x0, .LC12
 	mov	w2, w3
 	add	x0, x0, :lo12:.LC12
 	bl	rknand_print_hex
-.L392:
+.L388:
 	ldr	x1, [x19, 16]
-	cbz	x1, .L387
+	cbz	x1, .L383
 	mov	w3, 4
 	adrp	x0, .LC13
 	mov	w2, w3
 	add	x0, x0, :lo12:.LC13
 	bl	rknand_print_hex
-.L387:
-	ldr	x0, [x26, #:lo12:.LANCHOR111]
+.L383:
+	ldr	x0, [x26, #:lo12:.LANCHOR110]
 	cmp	x20, x0
-	bne	.L384
+	bne	.L380
 	ldr	x0, [x19, 8]
 	cmp	x20, x0
-	beq	.L384
-	adrp	x1, .LANCHOR12
-	ldrh	w2, [x1, #:lo12:.LANCHOR12]
+	beq	.L380
+	adrp	x1, .LANCHOR11
+	ldrh	w2, [x1, #:lo12:.LANCHOR11]
 	mov	x1, x20
 	lsl	w2, w2, 9
 	bl	ftl_memcpy
-	b	.L384
+	b	.L380
 	.size	FlashReadPages, .-FlashReadPages
 	.section	.text.FtlLoadFactoryBbt,"ax",@progbits
 	.align	2
@@ -3335,34 +3279,34 @@ FlashReadPages:
 	.type	FtlLoadFactoryBbt, %function
 FtlLoadFactoryBbt:
 	stp	x29, x30, [sp, -112]!
-	adrp	x2, .LANCHOR106
-	adrp	x0, .LANCHOR138
-	add	x1, x0, :lo12:.LANCHOR138
+	adrp	x2, .LANCHOR105
+	adrp	x0, .LANCHOR137
+	add	x1, x0, :lo12:.LANCHOR137
 	add	x29, sp, 0
-	ldr	x2, [x2, #:lo12:.LANCHOR106]
+	ldr	x2, [x2, #:lo12:.LANCHOR105]
 	stp	x21, x22, [sp, 32]
 	mov	x22, x0
 	stp	x25, x26, [sp, 64]
-	adrp	x26, .LANCHOR17
+	adrp	x26, .LANCHOR16
 	stp	x27, x28, [sp, 80]
-	add	x28, x26, :lo12:.LANCHOR17
+	add	x28, x26, :lo12:.LANCHOR16
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR37
+	adrp	x20, .LANCHOR36
 	stp	x23, x24, [sp, 48]
-	add	x20, x20, :lo12:.LANCHOR37
+	add	x20, x20, :lo12:.LANCHOR36
 	str	x2, [x1, 8]
-	adrp	x2, .LANCHOR114
-	adrp	x23, .LANCHOR10
+	adrp	x2, .LANCHOR113
+	adrp	x23, .LANCHOR9
 	add	x20, x20, 12
-	ldr	x25, [x2, #:lo12:.LANCHOR114]
-	add	x23, x23, :lo12:.LANCHOR10
+	ldr	x25, [x2, #:lo12:.LANCHOR113]
+	add	x23, x23, :lo12:.LANCHOR9
 	mov	w21, 0
 	mov	w27, -1
 	str	x25, [x1, 16]
-.L420:
+.L416:
 	ldrh	w0, [x23]
 	cmp	w21, w0
-	bcc	.L425
+	bcc	.L421
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -3371,18 +3315,18 @@ FtlLoadFactoryBbt:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L425:
-	ldrh	w19, [x26, #:lo12:.LANCHOR17]
-	add	x24, x22, :lo12:.LANCHOR138
+.L421:
+	ldrh	w19, [x26, #:lo12:.LANCHOR16]
+	add	x24, x22, :lo12:.LANCHOR137
 	strh	w27, [x20]
 	mov	w3, 61664
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L421:
+.L417:
 	ldrh	w0, [x28]
 	sub	w1, w0, #15
 	cmp	w1, w19
-	bgt	.L423
+	bgt	.L419
 	madd	w0, w0, w21, w19
 	mov	w2, 1
 	str	w3, [x29, 108]
@@ -3394,19 +3338,19 @@ FtlLoadFactoryBbt:
 	ldr	w0, [x24]
 	ldr	w3, [x29, 108]
 	cmn	w0, #1
-	beq	.L422
+	beq	.L418
 	ldrh	w0, [x25]
 	cmp	w0, w3
-	bne	.L422
+	bne	.L418
 	strh	w19, [x20]
-.L423:
+.L419:
 	add	w21, w21, 1
 	add	x20, x20, 2
-	b	.L420
-.L422:
+	b	.L416
+.L418:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L421
+	b	.L417
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
 	.section	.text.FtlGetLastWrittenPage,"ax",@progbits
 	.align	2
@@ -3420,15 +3364,15 @@ FtlGetLastWrittenPage:
 	mov	w23, w1
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	bne	.L431
-	adrp	x1, .LANCHOR20
-	ldrh	w19, [x1, #:lo12:.LANCHOR20]
-.L432:
-	adrp	x1, .LANCHOR112
+	bne	.L427
+	adrp	x1, .LANCHOR19
+	ldrh	w19, [x1, #:lo12:.LANCHOR19]
+.L428:
+	adrp	x1, .LANCHOR111
 	sub	w19, w19, #1
 	sxth	w19, w19
 	lsl	w21, w0, 10
-	ldr	x1, [x1, #:lo12:.LANCHOR112]
+	ldr	x1, [x1, #:lo12:.LANCHOR111]
 	orr	w0, w19, w21
 	str	x1, [x29, 72]
 	add	x1, x29, 96
@@ -3440,24 +3384,24 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 96]
 	cmn	w0, #1
-	bne	.L433
+	bne	.L429
 	mov	w22, 0
 	mov	w24, 2
-.L434:
+.L430:
 	cmp	w22, w19
-	ble	.L437
-.L433:
+	ble	.L433
+.L429:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 160
 	ret
-.L431:
-	adrp	x1, .LANCHOR19
-	ldrh	w19, [x1, #:lo12:.LANCHOR19]
-	b	.L432
-.L437:
+.L427:
+	adrp	x1, .LANCHOR18
+	ldrh	w19, [x1, #:lo12:.LANCHOR18]
+	b	.L428
+.L433:
 	add	w20, w22, w19
 	mov	w2, w23
 	mov	w1, 1
@@ -3469,20 +3413,20 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 96]
 	cmn	w0, #1
-	bne	.L435
+	bne	.L431
 	ldr	w0, [x29, 100]
 	cmn	w0, #1
-	bne	.L435
+	bne	.L431
 	ldr	w0, [x29, 64]
 	cmn	w0, #1
-	beq	.L435
+	beq	.L431
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L434
-.L435:
+	b	.L430
+.L431:
 	add	w20, w20, 1
 	sxth	w22, w20
-	b	.L434
+	b	.L430
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
 	.section	.text.FtlScanSysBlk,"ax",@progbits
 	.align	2
@@ -3493,83 +3437,83 @@ FtlScanSysBlk:
 	mov	w1, 0
 	add	x29, sp, 0
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR125
+	adrp	x25, .LANCHOR124
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR30
-	ldr	x0, [x25, #:lo12:.LANCHOR125]
-	adrp	x22, .LANCHOR122
-	ldr	w2, [x21, #:lo12:.LANCHOR30]
+	adrp	x21, .LANCHOR29
+	ldr	x0, [x25, #:lo12:.LANCHOR124]
+	adrp	x22, .LANCHOR121
+	ldr	w2, [x21, #:lo12:.LANCHOR29]
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR130
+	adrp	x20, .LANCHOR129
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR35
+	adrp	x23, .LANCHOR34
 	stp	x27, x28, [sp, 80]
-	adrp	x27, .LANCHOR119
+	adrp	x27, .LANCHOR118
 	lsl	w2, w2, 2
-	strh	wzr, [x20, #:lo12:.LANCHOR130]
-	strh	wzr, [x23, #:lo12:.LANCHOR35]
+	strh	wzr, [x20, #:lo12:.LANCHOR129]
+	strh	wzr, [x23, #:lo12:.LANCHOR34]
 	bl	ftl_memset
-	ldr	x0, [x27, #:lo12:.LANCHOR119]
+	ldr	x0, [x27, #:lo12:.LANCHOR118]
 	mov	w1, 0
-	ldr	w2, [x21, #:lo12:.LANCHOR30]
-	adrp	x19, .LANCHOR27
-	adrp	x28, .LANCHOR36
-	adrp	x24, .LANCHOR139
+	ldr	w2, [x21, #:lo12:.LANCHOR29]
+	adrp	x19, .LANCHOR26
+	adrp	x28, .LANCHOR35
+	adrp	x24, .LANCHOR138
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	ldr	x0, [x22, #:lo12:.LANCHOR122]
+	ldr	x0, [x22, #:lo12:.LANCHOR121]
 	mov	w1, 0
-	ldrh	w2, [x19, #:lo12:.LANCHOR27]
+	ldrh	w2, [x19, #:lo12:.LANCHOR26]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	ldr	x0, [x28, #:lo12:.LANCHOR36]
+	ldr	x0, [x28, #:lo12:.LANCHOR35]
 	mov	w1, 0
-	ldrh	w2, [x19, #:lo12:.LANCHOR27]
+	ldrh	w2, [x19, #:lo12:.LANCHOR26]
 	lsl	w2, w2, 1
 	bl	ftl_memset
 	mov	w2, 16
 	mov	w1, 255
-	add	x0, x24, :lo12:.LANCHOR139
+	add	x0, x24, :lo12:.LANCHOR138
 	bl	ftl_memset
-	adrp	x0, .LANCHOR5
+	adrp	x0, .LANCHOR4
 	stp	x22, x25, [x29, 144]
 	str	x27, [x29, 160]
-	ldrh	w0, [x0, #:lo12:.LANCHOR5]
+	ldrh	w0, [x0, #:lo12:.LANCHOR4]
 	str	w0, [x29, 172]
-	adrp	x0, .LANCHOR6
-	add	x0, x0, :lo12:.LANCHOR6
+	adrp	x0, .LANCHOR5
+	add	x0, x0, :lo12:.LANCHOR5
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR82
-	add	x0, x0, :lo12:.LANCHOR82
+	adrp	x0, .LANCHOR81
+	add	x0, x0, :lo12:.LANCHOR81
 	str	x0, [x29, 112]
-.L443:
+.L439:
 	ldr	x0, [x29, 120]
 	ldr	w1, [x29, 172]
 	ldrh	w0, [x0]
 	cmp	w0, w1
-	bls	.L483
-	adrp	x0, .LANCHOR3
-	adrp	x25, .LANCHOR103
-	adrp	x6, .LANCHOR13
+	bls	.L479
+	adrp	x0, .LANCHOR2
+	adrp	x25, .LANCHOR102
+	adrp	x6, .LANCHOR12
 	mov	x5, 0
-	ldrh	w12, [x0, #:lo12:.LANCHOR3]
-	adrp	x0, .LANCHOR64
-	ldr	x7, [x25, #:lo12:.LANCHOR103]
+	ldrh	w12, [x0, #:lo12:.LANCHOR2]
+	adrp	x0, .LANCHOR63
+	ldr	x7, [x25, #:lo12:.LANCHOR102]
 	mov	w22, 0
-	ldr	x11, [x0, #:lo12:.LANCHOR64]
-	adrp	x0, .LANCHOR65
-	add	x6, x6, :lo12:.LANCHOR13
-	ldr	x10, [x0, #:lo12:.LANCHOR65]
-	adrp	x0, .LANCHOR24
-	ldrh	w8, [x0, #:lo12:.LANCHOR24]
-	b	.L484
-.L445:
+	ldr	x11, [x0, #:lo12:.LANCHOR63]
+	adrp	x0, .LANCHOR64
+	add	x6, x6, :lo12:.LANCHOR12
+	ldr	x10, [x0, #:lo12:.LANCHOR64]
+	adrp	x0, .LANCHOR23
+	ldrh	w8, [x0, #:lo12:.LANCHOR23]
+	b	.L480
+.L441:
 	ldrh	w1, [x29, 172]
 	ldrb	w0, [x6, x5]
 	bl	V2P_block
 	and	w4, w0, 65535
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L444
+	cbnz	w0, .L440
 	ubfiz	x0, x22, 5, 16
 	mul	w1, w22, w8
 	add	x0, x7, x0
@@ -3580,19 +3524,19 @@ FtlScanSysBlk:
 	add	x1, x10, x1, sxtw 2
 	str	w4, [x0, 4]
 	stp	x11, x1, [x0, 8]
-.L444:
+.L440:
 	add	x5, x5, 1
-.L484:
+.L480:
 	cmp	w12, w5, uxth
-	bhi	.L445
-	cbnz	w22, .L446
-.L482:
+	bhi	.L441
+	cbnz	w22, .L442
+.L478:
 	ldr	w0, [x29, 172]
 	add	w26, w0, 1
 	and	w0, w26, 65535
 	str	w0, [x29, 172]
-	b	.L443
-.L446:
+	b	.L439
+.L442:
 	mov	w1, w22
 	mov	w2, 1
 	mov	x0, x7
@@ -3600,23 +3544,23 @@ FtlScanSysBlk:
 	ubfiz	x0, x22, 5, 16
 	mov	x22, 0
 	str	x0, [x29, 128]
-	adrp	x0, .LANCHOR140
-	add	x0, x0, :lo12:.LANCHOR140
+	adrp	x0, .LANCHOR139
+	add	x0, x0, :lo12:.LANCHOR139
 	str	x0, [x29, 136]
-.L481:
-	ldr	x0, [x25, #:lo12:.LANCHOR103]
+.L477:
+	ldr	x0, [x25, #:lo12:.LANCHOR102]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
 	ldr	w3, [x1, 4]
 	cmn	w0, #1
 	ldr	x27, [x1, 16]
 	ubfx	x26, x3, 10, 16
-	bne	.L449
+	bne	.L445
 	mov	w5, 16
 	mov	w7, 65535
-.L451:
-	ldr	x0, [x25, #:lo12:.LANCHOR103]
-	add	x6, x25, :lo12:.LANCHOR103
+.L447:
+	ldr	x0, [x25, #:lo12:.LANCHOR102]
+	add	x6, x25, :lo12:.LANCHOR102
 	mov	w2, 1
 	str	w7, [x29, 100]
 	add	x0, x0, x22
@@ -3632,135 +3576,135 @@ FtlScanSysBlk:
 	ldr	w5, [x29, 168]
 	cmp	w0, w7
 	ldr	x6, [x29, 104]
-	bne	.L448
+	bne	.L444
 	ldr	x0, [x6]
 	mov	w1, -1
 	str	w1, [x0, x22]
 	ldr	x0, [x6]
 	ldr	w0, [x0, x22]
 	cmp	w0, w1
-	bne	.L449
-.L450:
+	bne	.L445
+.L446:
 	mov	w1, 1
-	b	.L520
-.L448:
-	ldr	x0, [x25, #:lo12:.LANCHOR103]
+	b	.L516
+.L444:
+	ldr	x0, [x25, #:lo12:.LANCHOR102]
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	bne	.L449
+	bne	.L445
 	sub	w5, w5, #1
 	ands	w5, w5, 65535
-	bne	.L451
-	b	.L450
-.L449:
-	adrp	x0, .LANCHOR82
-	ldr	w1, [x0, #:lo12:.LANCHOR82]
+	bne	.L447
+	b	.L446
+.L445:
+	adrp	x0, .LANCHOR81
+	ldr	w1, [x0, #:lo12:.LANCHOR81]
 	ldr	w0, [x27, 4]
 	cmn	w1, #1
-	beq	.L452
+	beq	.L448
 	cmp	w1, w0
-	bhi	.L453
-.L452:
+	bhi	.L449
+.L448:
 	cmn	w0, #1
-	beq	.L453
+	beq	.L449
 	ldr	x2, [x29, 112]
 	add	w1, w0, 1
 	str	w1, [x2]
-.L453:
+.L449:
 	ldrh	w1, [x27]
 	mov	w2, 61604
 	cmp	w1, w2
-	beq	.L455
-	bhi	.L456
+	beq	.L451
+	bhi	.L452
 	mov	w0, 61574
 	cmp	w1, w0
-	beq	.L457
-.L454:
+	beq	.L453
+.L450:
 	ldr	x0, [x29, 128]
 	add	x22, x22, 32
 	cmp	x0, x22
-	bne	.L481
-	b	.L482
-.L456:
+	bne	.L477
+	b	.L478
+.L452:
 	mov	w0, 61634
 	cmp	w1, w0
-	beq	.L458
+	beq	.L454
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L454
+	bne	.L450
 	mov	w1, 0
-.L520:
+.L516:
 	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-	b	.L454
-.L458:
-	ldrh	w1, [x20, #:lo12:.LANCHOR130]
-	ldr	w0, [x21, #:lo12:.LANCHOR30]
+	b	.L450
+.L454:
+	ldrh	w1, [x20, #:lo12:.LANCHOR129]
+	ldr	w0, [x21, #:lo12:.LANCHOR29]
 	cmp	w1, w0
-	bls	.L460
+	bls	.L456
 	ldr	x1, [x29, 136]
 	adrp	x0, .LC1
 	mov	w2, 1225
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L460:
-	ldr	w6, [x21, #:lo12:.LANCHOR30]
+.L456:
+	ldr	w6, [x21, #:lo12:.LANCHOR29]
 	ldr	x3, [x29, 152]
-	ldrh	w1, [x20, #:lo12:.LANCHOR130]
+	ldrh	w1, [x20, #:lo12:.LANCHOR129]
 	and	w2, w6, 65535
 	sub	w0, w2, #1
 	sub	w2, w2, w1
 	sxth	x0, w0
 	sub	w2, w2, #1
-	ldr	x5, [x3, #:lo12:.LANCHOR125]
+	ldr	x5, [x3, #:lo12:.LANCHOR124]
 	sxth	w2, w2
-.L461:
+.L457:
 	cmp	w0, w2
-	bgt	.L467
-	tbz	w0, #31, .L501
-	b	.L454
-.L467:
+	bgt	.L463
+	tbz	w0, #31, .L497
+	b	.L450
+.L463:
 	sxtw	x8, w0
 	ldr	w11, [x27, 4]
 	lsl	x7, x8, 2
 	add	x10, x5, x7
 	ldr	w7, [x5, x7]
 	cmp	w11, w7
-	bls	.L462
+	bls	.L458
 	ldr	w2, [x5]
-	cbnz	w2, .L463
+	cbnz	w2, .L459
 	cmp	w6, w1
-	beq	.L463
+	beq	.L459
 	add	w1, w1, 1
-	strh	w1, [x20, #:lo12:.LANCHOR130]
-.L463:
+	strh	w1, [x20, #:lo12:.LANCHOR129]
+.L459:
 	ldr	x1, [x29, 160]
-	ldr	x6, [x1, #:lo12:.LANCHOR119]
+	ldr	x6, [x1, #:lo12:.LANCHOR118]
 	mov	w1, 0
-.L464:
+.L460:
 	cmp	w1, w0
-	bne	.L465
+	bne	.L461
 	ldr	w1, [x27, 4]
 	str	w1, [x10]
 	strh	w26, [x6, x8, lsl 1]
-	tbnz	w0, #31, .L454
-	ldrh	w1, [x20, #:lo12:.LANCHOR130]
-	ldr	w2, [x21, #:lo12:.LANCHOR30]
+	tbnz	w0, #31, .L450
+	ldrh	w1, [x20, #:lo12:.LANCHOR129]
+	ldr	w2, [x21, #:lo12:.LANCHOR29]
 	sub	w2, w2, w1
 	sub	w2, w2, #1
 	cmp	w0, w2, sxth
-	bgt	.L454
-.L501:
+	bgt	.L450
+.L497:
 	add	w1, w1, 1
-	strh	w1, [x20, #:lo12:.LANCHOR130]
+	strh	w1, [x20, #:lo12:.LANCHOR129]
 	ldr	w1, [x27, 4]
 	str	w1, [x5, x0, lsl 2]
 	ldr	x1, [x29, 160]
-	ldr	x1, [x1, #:lo12:.LANCHOR119]
-.L519:
+	ldr	x1, [x1, #:lo12:.LANCHOR118]
+.L515:
 	strh	w26, [x1, x0, lsl 1]
-	b	.L454
-.L465:
+	b	.L450
+.L461:
 	sxtw	x2, w1
 	add	w1, w1, 1
 	lsl	x7, x2, 2
@@ -3772,69 +3716,69 @@ FtlScanSysBlk:
 	add	x7, x6, x2
 	ldrh	w7, [x7, 2]
 	strh	w7, [x6, x2]
-	b	.L464
-.L462:
+	b	.L460
+.L458:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L461
-.L457:
-	ldrh	w1, [x23, #:lo12:.LANCHOR35]
-	ldrh	w0, [x19, #:lo12:.LANCHOR27]
+	b	.L457
+.L453:
+	ldrh	w1, [x23, #:lo12:.LANCHOR34]
+	ldrh	w0, [x19, #:lo12:.LANCHOR26]
 	cmp	w1, w0
-	bls	.L470
+	bls	.L466
 	ldr	x1, [x29, 136]
 	adrp	x0, .LC1
 	mov	w2, 1266
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L470:
-	ldrh	w6, [x19, #:lo12:.LANCHOR27]
-	ldrh	w2, [x23, #:lo12:.LANCHOR35]
+.L466:
+	ldrh	w6, [x19, #:lo12:.LANCHOR26]
+	ldrh	w2, [x23, #:lo12:.LANCHOR34]
 	sub	w1, w6, #1
 	sxth	x0, w1
 	sub	w5, w1, w2
 	ldr	x1, [x29, 144]
-	ldr	x1, [x1, #:lo12:.LANCHOR122]
-.L471:
+	ldr	x1, [x1, #:lo12:.LANCHOR121]
+.L467:
 	cmp	w0, w5
-	ble	.L476
+	ble	.L472
 	sxtw	x7, w0
 	ldr	w11, [x27, 4]
 	lsl	x8, x7, 2
 	add	x10, x1, x8
 	ldr	w8, [x1, x8]
 	cmp	w11, w8
-	bls	.L472
+	bls	.L468
 	ldr	w5, [x1]
-	cbnz	w5, .L473
+	cbnz	w5, .L469
 	cmp	w6, w2
-	beq	.L473
+	beq	.L469
 	add	w2, w2, 1
-	strh	w2, [x23, #:lo12:.LANCHOR35]
-.L473:
-	ldr	x6, [x28, #:lo12:.LANCHOR36]
+	strh	w2, [x23, #:lo12:.LANCHOR34]
+.L469:
+	ldr	x6, [x28, #:lo12:.LANCHOR35]
 	mov	w2, 0
-.L474:
+.L470:
 	cmp	w2, w0
-	bne	.L475
+	bne	.L471
 	ldr	w2, [x27, 4]
 	str	w2, [x10]
 	strh	w26, [x6, x7, lsl 1]
-.L476:
-	tbnz	w0, #31, .L454
-	ldrh	w2, [x19, #:lo12:.LANCHOR27]
-	ldrh	w5, [x23, #:lo12:.LANCHOR35]
+.L472:
+	tbnz	w0, #31, .L450
+	ldrh	w2, [x19, #:lo12:.LANCHOR26]
+	ldrh	w5, [x23, #:lo12:.LANCHOR34]
 	sub	w2, w2, #1
 	sub	w2, w2, w5
 	cmp	w0, w2, sxth
-	bgt	.L454
+	bgt	.L450
 	add	w5, w5, 1
 	ldr	w2, [x27, 4]
-	strh	w5, [x23, #:lo12:.LANCHOR35]
+	strh	w5, [x23, #:lo12:.LANCHOR34]
 	str	w2, [x1, x0, lsl 2]
-	ldr	x1, [x28, #:lo12:.LANCHOR36]
-	b	.L519
-.L475:
+	ldr	x1, [x28, #:lo12:.LANCHOR35]
+	b	.L515
+.L471:
 	sxtw	x5, w2
 	add	w2, w2, 1
 	lsl	x8, x5, 2
@@ -3846,61 +3790,61 @@ FtlScanSysBlk:
 	add	x8, x6, x5
 	ldrh	w8, [x8, 2]
 	strh	w8, [x6, x5]
-	b	.L474
-.L472:
+	b	.L470
+.L468:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L471
-.L455:
-	ldrh	w5, [x24, #:lo12:.LANCHOR139]
+	b	.L467
+.L451:
+	ldrh	w5, [x24, #:lo12:.LANCHOR138]
 	mov	w1, 65535
-	add	x2, x24, :lo12:.LANCHOR139
+	add	x2, x24, :lo12:.LANCHOR138
 	cmp	w5, w1
-	bne	.L478
-	strh	w26, [x24, #:lo12:.LANCHOR139]
+	bne	.L474
+	strh	w26, [x24, #:lo12:.LANCHOR138]
 	str	w0, [x2, 8]
-	b	.L454
-.L478:
+	b	.L450
+.L474:
 	ldrh	w0, [x2, 4]
 	cmp	w0, w1
-	beq	.L479
+	beq	.L475
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.L479:
-	add	x0, x24, :lo12:.LANCHOR139
+.L475:
+	add	x0, x24, :lo12:.LANCHOR138
 	ldr	w1, [x27, 4]
 	ldr	w2, [x0, 8]
 	cmp	w2, w1
-	bcs	.L480
-	ldrh	w2, [x24, #:lo12:.LANCHOR139]
+	bcs	.L476
+	ldrh	w2, [x24, #:lo12:.LANCHOR138]
 	strh	w2, [x0, 4]
-	strh	w26, [x24, #:lo12:.LANCHOR139]
+	strh	w26, [x24, #:lo12:.LANCHOR138]
 	str	w1, [x0, 8]
-	b	.L454
-.L480:
+	b	.L450
+.L476:
 	strh	w26, [x0, 4]
-	b	.L454
-.L483:
+	b	.L450
+.L479:
 	ldr	x0, [x29, 160]
-	ldr	x2, [x0, #:lo12:.LANCHOR119]
+	ldr	x2, [x0, #:lo12:.LANCHOR118]
 	ldrh	w0, [x2]
-	cbz	w0, .L485
-.L488:
-	ldr	x1, [x28, #:lo12:.LANCHOR36]
+	cbz	w0, .L481
+.L484:
+	ldr	x1, [x28, #:lo12:.LANCHOR35]
 	ldrh	w0, [x1]
-	cbz	w0, .L486
-.L487:
-	ldrh	w1, [x20, #:lo12:.LANCHOR130]
-	ldr	w0, [x21, #:lo12:.LANCHOR30]
+	cbz	w0, .L482
+.L483:
+	ldrh	w1, [x20, #:lo12:.LANCHOR129]
+	ldr	w0, [x21, #:lo12:.LANCHOR29]
 	cmp	w1, w0
-	bls	.L517
-	adrp	x1, .LANCHOR140
+	bls	.L513
+	adrp	x1, .LANCHOR139
 	adrp	x0, .LC1
 	mov	w2, 1391
-	add	x1, x1, :lo12:.LANCHOR140
+	add	x1, x1, :lo12:.LANCHOR139
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L517:
+.L513:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -3909,24 +3853,24 @@ FtlScanSysBlk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L485:
-	ldrh	w0, [x20, #:lo12:.LANCHOR130]
-	cbz	w0, .L488
-	ldr	w1, [x21, #:lo12:.LANCHOR30]
+.L481:
+	ldrh	w0, [x20, #:lo12:.LANCHOR129]
+	cbz	w0, .L484
+	ldr	w1, [x21, #:lo12:.LANCHOR29]
 	mov	w0, 0
-.L489:
+.L485:
 	cmp	w0, w1
-	bcs	.L488
+	bcs	.L484
 	ldrh	w3, [x2, w0, sxtw 1]
-	cbz	w3, .L490
+	cbz	w3, .L486
 	ldr	x1, [x29, 152]
-	add	x7, x21, :lo12:.LANCHOR30
-	ldr	x4, [x1, #:lo12:.LANCHOR125]
+	add	x7, x21, :lo12:.LANCHOR29
+	ldr	x4, [x1, #:lo12:.LANCHOR124]
 	mov	w1, w0
-.L491:
+.L487:
 	ldr	w3, [x7]
 	cmp	w1, w3
-	bcs	.L488
+	bcs	.L484
 	sxtw	x6, w1
 	sub	w3, w1, w0
 	lsl	x5, x6, 1
@@ -3938,29 +3882,29 @@ FtlScanSysBlk:
 	strh	w8, [x2, x3, lsl 1]
 	str	w6, [x4, x3, lsl 2]
 	strh	wzr, [x2, x5]
-	b	.L491
-.L490:
+	b	.L487
+.L486:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L489
-.L486:
-	ldrh	w0, [x23, #:lo12:.LANCHOR35]
-	cbz	w0, .L487
-	ldrh	w2, [x19, #:lo12:.LANCHOR27]
+	b	.L485
+.L482:
+	ldrh	w0, [x23, #:lo12:.LANCHOR34]
+	cbz	w0, .L483
+	ldrh	w2, [x19, #:lo12:.LANCHOR26]
 	mov	w0, 0
-.L496:
+.L492:
 	mov	w6, w0
 	cmp	w0, w2
-	bge	.L487
+	bge	.L483
 	ldrh	w3, [x1, w0, sxtw 1]
-	cbz	w3, .L497
+	cbz	w3, .L493
 	ldr	x2, [x29, 144]
-	add	x19, x19, :lo12:.LANCHOR27
-	ldr	x3, [x2, #:lo12:.LANCHOR122]
-.L498:
+	add	x19, x19, :lo12:.LANCHOR26
+	ldr	x3, [x2, #:lo12:.LANCHOR121]
+.L494:
 	ldrh	w2, [x19]
 	cmp	w0, w2
-	bge	.L487
+	bge	.L483
 	sxtw	x5, w0
 	sub	w2, w0, w6
 	lsl	x4, x5, 1
@@ -3972,11 +3916,11 @@ FtlScanSysBlk:
 	strh	w7, [x1, x2, lsl 1]
 	str	w5, [x3, x2, lsl 2]
 	strh	wzr, [x1, x4]
-	b	.L498
-.L497:
+	b	.L494
+.L493:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L496
+	b	.L492
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
 	.section	.text.FtlLoadBbt,"ax",@progbits
 	.align	2
@@ -3986,29 +3930,29 @@ FtlLoadBbt:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR106
+	adrp	x23, .LANCHOR105
 	stp	x19, x20, [sp, 16]
-	adrp	x24, .LANCHOR17
+	adrp	x24, .LANCHOR16
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR138
-	add	x20, x22, :lo12:.LANCHOR138
-	ldr	x0, [x23, #:lo12:.LANCHOR106]
+	adrp	x22, .LANCHOR137
+	add	x20, x22, :lo12:.LANCHOR137
+	ldr	x0, [x23, #:lo12:.LANCHOR105]
 	str	x25, [sp, 64]
 	mov	w25, 61649
 	str	x0, [x20, 8]
-	adrp	x0, .LANCHOR114
-	ldr	x21, [x0, #:lo12:.LANCHOR114]
+	adrp	x0, .LANCHOR113
+	ldr	x21, [x0, #:lo12:.LANCHOR113]
 	str	x21, [x20, 16]
 	bl	FtlBbtMemInit
-	ldrh	w19, [x24, #:lo12:.LANCHOR17]
-	add	x24, x24, :lo12:.LANCHOR17
+	ldrh	w19, [x24, #:lo12:.LANCHOR16]
+	add	x24, x24, :lo12:.LANCHOR16
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L522:
+.L518:
 	ldrh	w0, [x24]
 	sub	w0, w0, #15
 	cmp	w0, w19
-	bgt	.L525
+	bgt	.L521
 	lsl	w0, w19, 10
 	mov	w2, 1
 	str	w0, [x20, 4]
@@ -4017,7 +3961,7 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L523
+	bne	.L519
 	ldr	w0, [x20, 4]
 	mov	w2, 1
 	mov	w1, w2
@@ -4025,136 +3969,136 @@ FtlLoadBbt:
 	str	w0, [x20, 4]
 	mov	x0, x20
 	bl	FlashReadPages
-.L523:
+.L519:
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L524
+	beq	.L520
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	bne	.L524
-	adrp	x1, .LANCHOR37
-	add	x0, x1, :lo12:.LANCHOR37
-	strh	w19, [x1, #:lo12:.LANCHOR37]
+	bne	.L520
+	adrp	x1, .LANCHOR36
+	add	x0, x1, :lo12:.LANCHOR36
+	strh	w19, [x1, #:lo12:.LANCHOR36]
 	ldr	w1, [x21, 4]
 	str	w1, [x0, 8]
 	ldrh	w1, [x21, 8]
 	strh	w1, [x0, 4]
-.L525:
-	adrp	x19, .LANCHOR37
+.L521:
+	adrp	x19, .LANCHOR36
 	mov	w0, 65535
-	add	x20, x19, :lo12:.LANCHOR37
-	ldrh	w1, [x19, #:lo12:.LANCHOR37]
+	add	x20, x19, :lo12:.LANCHOR36
+	ldrh	w1, [x19, #:lo12:.LANCHOR36]
 	cmp	w1, w0
-	beq	.L539
+	beq	.L535
 	ldrh	w1, [x20, 4]
 	cmp	w1, w0
-	beq	.L529
-	add	x0, x22, :lo12:.LANCHOR138
+	beq	.L525
+	add	x0, x22, :lo12:.LANCHOR137
 	lsl	w1, w1, 10
 	mov	w2, 1
 	str	w1, [x0, 4]
 	mov	w1, w2
 	bl	FlashReadPages
-	ldr	w0, [x22, #:lo12:.LANCHOR138]
+	ldr	w0, [x22, #:lo12:.LANCHOR137]
 	cmn	w0, #1
-	beq	.L529
+	beq	.L525
 	ldrh	w1, [x21]
 	mov	w0, 61649
 	cmp	w1, w0
-	bne	.L529
+	bne	.L525
 	ldr	w1, [x20, 8]
 	ldr	w0, [x21, 4]
 	cmp	w0, w1
-	bls	.L529
+	bls	.L525
 	ldrh	w1, [x20, 4]
 	str	w0, [x20, 8]
 	ldrh	w0, [x21, 8]
-	strh	w1, [x19, #:lo12:.LANCHOR37]
+	strh	w1, [x19, #:lo12:.LANCHOR36]
 	strh	w0, [x20, 4]
-.L529:
-	ldrh	w0, [x19, #:lo12:.LANCHOR37]
-	add	x24, x19, :lo12:.LANCHOR37
+.L525:
+	ldrh	w0, [x19, #:lo12:.LANCHOR36]
+	add	x24, x19, :lo12:.LANCHOR36
 	mov	w1, 1
 	mov	w25, 61649
 	bl	FtlGetLastWrittenPage
 	sxth	w20, w0
 	add	w0, w0, 1
 	strh	w0, [x24, 2]
-	add	x24, x22, :lo12:.LANCHOR138
-.L531:
-	tbz	w20, #31, .L534
-	adrp	x1, .LANCHOR141
+	add	x24, x22, :lo12:.LANCHOR137
+.L527:
+	tbz	w20, #31, .L530
+	adrp	x1, .LANCHOR140
 	adrp	x0, .LC1
 	mov	w2, 251
-	add	x1, x1, :lo12:.LANCHOR141
+	add	x1, x1, :lo12:.LANCHOR140
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L533:
-	add	x0, x19, :lo12:.LANCHOR37
+.L529:
+	add	x0, x19, :lo12:.LANCHOR36
 	ldrh	w1, [x21, 10]
 	strh	w1, [x0, 6]
 	mov	w1, 65535
 	ldrh	w0, [x21, 12]
 	cmp	w0, w1
-	beq	.L536
-	adrp	x1, .LANCHOR2
-	ldr	w2, [x1, #:lo12:.LANCHOR2]
+	beq	.L532
+	adrp	x1, .LANCHOR1
+	ldr	w2, [x1, #:lo12:.LANCHOR1]
 	cmp	w0, w2
-	beq	.L536
-	adrp	x1, .LANCHOR6
-	ldrh	w1, [x1, #:lo12:.LANCHOR6]
+	beq	.L532
+	adrp	x1, .LANCHOR5
+	ldrh	w1, [x1, #:lo12:.LANCHOR5]
 	lsr	w1, w1, 2
 	cmp	w2, w1
-	bcs	.L536
+	bcs	.L532
 	cmp	w0, w1
-	bcs	.L536
+	bcs	.L532
 	bl	FtlSysBlkNumInit
-.L536:
-	add	x19, x19, :lo12:.LANCHOR37
-	adrp	x21, .LANCHOR10
-	adrp	x23, .LANCHOR127
+.L532:
+	add	x19, x19, :lo12:.LANCHOR36
+	adrp	x21, .LANCHOR9
+	adrp	x23, .LANCHOR126
 	add	x19, x19, 32
-	add	x21, x21, :lo12:.LANCHOR10
-	add	x23, x23, :lo12:.LANCHOR127
-	add	x22, x22, :lo12:.LANCHOR138
+	add	x21, x21, :lo12:.LANCHOR9
+	add	x23, x23, :lo12:.LANCHOR126
+	add	x22, x22, :lo12:.LANCHOR137
 	mov	w20, 0
-.L537:
+.L533:
 	ldrh	w0, [x21]
 	cmp	w20, w0
-	bcc	.L538
+	bcc	.L534
 	mov	w0, 0
-.L521:
+.L517:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L524:
+.L520:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L522
-.L534:
-	ldrh	w0, [x19, #:lo12:.LANCHOR37]
+	b	.L518
+.L530:
+	ldrh	w0, [x19, #:lo12:.LANCHOR36]
 	mov	w2, 1
 	mov	w1, w2
 	orr	w0, w20, w0, lsl 10
 	str	w0, [x24, 4]
-	ldr	x0, [x23, #:lo12:.LANCHOR106]
+	ldr	x0, [x23, #:lo12:.LANCHOR105]
 	str	x0, [x24, 8]
 	mov	x0, x24
 	bl	FlashReadPages
 	ldr	w0, [x24]
 	cmn	w0, #1
-	beq	.L532
+	beq	.L528
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	beq	.L533
-.L532:
+	beq	.L529
+.L528:
 	sub	w20, w20, #1
 	sxth	w20, w20
-	b	.L531
-.L538:
+	b	.L527
+.L534:
 	ldrh	w2, [x23]
 	ldr	x0, [x22, 8]
 	mul	w1, w2, w20
@@ -4163,10 +4107,10 @@ FtlLoadBbt:
 	add	x1, x0, x1, lsl 2
 	ldr	x0, [x19], 8
 	bl	ftl_memcpy
-	b	.L537
-.L539:
+	b	.L533
+.L535:
 	mov	w0, -1
-	b	.L521
+	b	.L517
 	.size	FtlLoadBbt, .-FtlLoadBbt
 	.section	.text.FlashProgPages,"ax",@progbits
 	.align	2
@@ -4177,36 +4121,34 @@ FlashProgPages:
 	ubfiz	x1, x1, 5, 32
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR0
+	adrp	x22, .LANCHOR0
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR142
-	stp	w3, w2, [x29, 104]
-	add	x2, x21, :lo12:.LANCHOR0
+	add	x21, x0, x1
+	str	w2, [x29, 108]
+	add	x2, x22, :lo12:.LANCHOR0
 	stp	x19, x20, [sp, 16]
-	adrp	x24, .LANCHOR78
+	adrp	x23, .LANCHOR141
 	stp	x27, x28, [sp, 80]
 	mov	x19, x0
-	ldrh	w23, [x2, 12]
-	add	x20, x0, x1
+	ldrh	w24, [x2, 12]
+	mov	x20, x0
 	stp	x25, x26, [sp, 64]
-	add	x22, x22, :lo12:.LANCHOR142
-	mov	x25, x0
-	add	x28, x24, :lo12:.LANCHOR78
-	lsl	w27, w23, 3
-.L552:
-	cmp	x25, x20
-	bne	.L565
-	ldr	w0, [x29, 104]
-	cbz	w0, .L579
-	adrp	x21, .LANCHOR111
-	adrp	x22, .LANCHOR113
-	mov	x23, x21
+	add	x23, x23, :lo12:.LANCHOR141
+	adrp	x25, .LANCHOR77
+	add	x28, x25, :lo12:.LANCHOR77
+	lsl	w27, w24, 3
+.L548:
+	cmp	x20, x21
+	bne	.L561
+	adrp	x20, .LANCHOR110
+	adrp	x22, .LANCHOR112
+	mov	x23, x20
 	mov	x24, x22
-.L567:
-	cmp	x19, x20
-	beq	.L579
-	ldr	x1, [x21, #:lo12:.LANCHOR111]
-	ldr	x0, [x22, #:lo12:.LANCHOR113]
+.L562:
+	cmp	x19, x21
+	beq	.L583
+	ldr	x1, [x20, #:lo12:.LANCHOR110]
+	ldr	x0, [x22, #:lo12:.LANCHOR112]
 	str	wzr, [x1]
 	str	wzr, [x0]
 	stp	x1, x0, [x29, 136]
@@ -4216,91 +4158,91 @@ FlashProgPages:
 	str	w2, [x29, 132]
 	ldr	w2, [x29, 108]
 	bl	FlashReadPages
-	ldr	w26, [x29, 128]
-	cmn	w26, #1
-	bne	.L568
+	ldr	w25, [x29, 128]
+	cmn	w25, #1
+	bne	.L563
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC14
 	add	x0, x0, :lo12:.LC14
 	bl	printf
-	str	w26, [x19]
-.L568:
-	ldr	w26, [x29, 128]
-	cmp	w26, 256
-	bne	.L569
+	str	w25, [x19]
+.L563:
+	ldr	w25, [x29, 128]
+	cmp	w25, 256
+	bne	.L564
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC15
 	add	x0, x0, :lo12:.LC15
 	bl	printf
-	str	w26, [x19]
-.L569:
+	str	w25, [x19]
+.L564:
 	ldr	x0, [x19, 16]
-	cbz	x0, .L570
+	cbz	x0, .L565
 	ldr	w2, [x0]
-	ldr	x0, [x24, #:lo12:.LANCHOR113]
+	ldr	x0, [x24, #:lo12:.LANCHOR112]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L570
+	beq	.L565
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC16
 	add	x0, x0, :lo12:.LC16
 	bl	printf
 	mov	w0, -1
 	str	w0, [x19]
-.L570:
+.L565:
 	ldr	x0, [x19, 8]
-	cbz	x0, .L571
+	cbz	x0, .L566
 	ldr	w2, [x0]
-	ldr	x0, [x23, #:lo12:.LANCHOR111]
+	ldr	x0, [x23, #:lo12:.LANCHOR110]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L571
+	beq	.L566
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC17
 	add	x0, x0, :lo12:.LC17
 	bl	printf
 	mov	w0, -1
 	str	w0, [x19]
-.L571:
+.L566:
 	add	x19, x19, 32
-	b	.L567
-.L565:
-	ldr	x0, [x25, 8]
-	cbz	x0, .L553
-	ldr	x0, [x25, 16]
-	cbnz	x0, .L554
-.L553:
+	b	.L562
+.L561:
+	ldr	x0, [x20, 8]
+	cbz	x0, .L549
+	ldr	x0, [x20, 16]
+	cbnz	x0, .L550
+.L549:
 	adrp	x0, .LC1
 	mov	w2, 142
-	mov	x1, x22
+	mov	x1, x23
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L554:
-	ldr	w0, [x25, 4]
+.L550:
+	ldr	w0, [x20, 4]
 	add	x2, x29, 120
 	add	x1, x29, 124
 	bl	l2p_addr_tran.isra.0
 	ldr	w0, [x29, 120]
 	cmp	w0, 3
-	bls	.L555
-.L592:
+	bls	.L551
+.L585:
 	mov	w0, -1
-	str	w0, [x25]
-	b	.L556
-.L555:
-	cbnz	w0, .L557
+	str	w0, [x20]
+	b	.L552
+.L551:
+	cbnz	w0, .L553
 	ldr	w0, [x29, 124]
 	cmp	w27, w0
-	bls	.L557
-	adrp	x21, .LANCHOR142
+	bls	.L553
+	adrp	x20, .LANCHOR141
 	adrp	x22, .LC6
 	mov	w23, -1
-	add	x21, x21, :lo12:.LANCHOR142
+	add	x20, x20, :lo12:.LANCHOR141
 	add	x22, x22, :lo12:.LC6
-	b	.L590
-.L559:
+	b	.L582
+.L555:
 	ldr	w2, [x19, 4]
-	mov	x1, x21
+	mov	x1, x20
 	str	w23, [x19]
 	mov	x0, x22
 	add	x19, x19, 32
@@ -4317,10 +4259,10 @@ FlashProgPages:
 	mov	w2, w3
 	add	x0, x0, :lo12:.LC8
 	bl	rknand_print_hex
-.L590:
-	cmp	x19, x20
-	bne	.L559
-.L579:
+.L582:
+	cmp	x19, x21
+	bne	.L555
+.L583:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -4329,53 +4271,53 @@ FlashProgPages:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L557:
-	ldr	x1, [x25, 8]
+.L553:
+	ldr	x1, [x20, 8]
 	tst	x1, 63
-	beq	.L573
-	adrp	x0, .LANCHOR111
-	ldr	x26, [x0, #:lo12:.LANCHOR111]
+	beq	.L569
+	adrp	x0, .LANCHOR110
+	ldr	x26, [x0, #:lo12:.LANCHOR110]
 	cmp	x1, x26
-	beq	.L560
-	adrp	x0, .LANCHOR12
-	ldrh	w2, [x0, #:lo12:.LANCHOR12]
+	beq	.L556
+	adrp	x0, .LANCHOR11
+	ldrh	w2, [x0, #:lo12:.LANCHOR11]
 	mov	x0, x26
 	lsl	w2, w2, 9
 	bl	ftl_memcpy
-.L560:
-	add	x0, x24, :lo12:.LANCHOR78
+.L556:
+	add	x0, x25, :lo12:.LANCHOR77
 	ldr	w1, [x29, 124]
-	ldr	x3, [x25, 16]
+	ldr	x3, [x20, 16]
 	mov	x2, x26
-	ldr	x6, [x0, 16]
+	ldr	x5, [x0, 16]
 	ldrb	w0, [x29, 120]
-	blr	x6
-	cbnz	w0, .L561
-	str	wzr, [x25]
-.L562:
-	add	x0, x21, :lo12:.LANCHOR0
+	blr	x5
+	cbnz	w0, .L557
+	str	wzr, [x20]
+.L558:
+	add	x0, x22, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
-	bne	.L556
+	bne	.L552
 	ldrb	w0, [x29, 120]
 	add	x2, x26, 2048
-	ldr	x6, [x28, 16]
+	ldr	x5, [x28, 16]
 	ldr	w1, [x29, 124]
-	ldr	x3, [x25, 16]
-	add	w1, w23, w1
+	ldr	x3, [x20, 16]
+	add	w1, w24, w1
 	add	x3, x3, 8
-	blr	x6
-	cbnz	w0, .L592
-.L556:
-	add	x25, x25, 32
-	b	.L552
-.L573:
+	blr	x5
+	cbnz	w0, .L585
+.L552:
+	add	x20, x20, 32
+	b	.L548
+.L569:
 	mov	x26, x1
-	b	.L560
-.L561:
+	b	.L556
+.L557:
 	mov	w0, -1
-	str	w0, [x25]
-	b	.L562
+	str	w0, [x20]
+	b	.L558
 	.size	FlashProgPages, .-FlashProgPages
 	.section	.text.FtlLowFormatEraseBlock,"ax",@progbits
 	.align	2
@@ -4383,83 +4325,83 @@ FlashProgPages:
 	.type	FtlLowFormatEraseBlock, %function
 FtlLowFormatEraseBlock:
 	stp	x29, x30, [sp, -128]!
-	adrp	x7, .LANCHOR13
-	add	x7, x7, :lo12:.LANCHOR13
+	adrp	x7, .LANCHOR12
+	add	x7, x7, :lo12:.LANCHOR12
 	mov	x5, 0
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	w23, w0, 65535
-	adrp	x0, .LANCHOR99
+	adrp	x0, .LANCHOR98
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	adrp	x20, .LANCHOR3
+	adrp	x20, .LANCHOR2
 	stp	x25, x26, [sp, 64]
 	and	w22, w1, 255
-	str	w23, [x0, #:lo12:.LANCHOR99]
-	adrp	x21, .LANCHOR79
-	adrp	x0, .LANCHOR110
-	adrp	x1, .LANCHOR115
-	adrp	x25, .LANCHOR24
-	ldrh	w8, [x20, #:lo12:.LANCHOR3]
-	ldr	x6, [x21, #:lo12:.LANCHOR79]
+	str	w23, [x0, #:lo12:.LANCHOR98]
+	adrp	x21, .LANCHOR78
+	adrp	x0, .LANCHOR109
+	adrp	x1, .LANCHOR114
+	adrp	x25, .LANCHOR23
+	ldrh	w8, [x20, #:lo12:.LANCHOR2]
+	ldr	x6, [x21, #:lo12:.LANCHOR78]
 	mov	w24, 0
-	ldr	x10, [x0, #:lo12:.LANCHOR110]
+	ldr	x10, [x0, #:lo12:.LANCHOR109]
 	mov	w19, 0
-	ldr	x11, [x1, #:lo12:.LANCHOR115]
-	ldrh	w12, [x25, #:lo12:.LANCHOR24]
+	ldr	x11, [x1, #:lo12:.LANCHOR114]
+	ldrh	w12, [x25, #:lo12:.LANCHOR23]
 	stp	x27, x28, [sp, 80]
 	str	x0, [x29, 112]
-.L594:
+.L587:
 	cmp	w8, w5, uxth
-	bhi	.L598
-	cbz	w24, .L593
+	bhi	.L591
+	cbz	w24, .L586
 	mov	w2, w24
 	ubfiz	x24, x24, 5, 16
 	mov	x26, 0
 	mov	w1, 0
 	mov	x0, x6
 	bl	FlashEraseBlocks
-.L602:
-	ldr	x0, [x21, #:lo12:.LANCHOR79]
+.L595:
+	ldr	x0, [x21, #:lo12:.LANCHOR78]
 	add	x1, x0, x26
 	ldr	w0, [x0, x26]
 	cmn	w0, #1
-	bne	.L601
+	bne	.L594
 	ldr	w0, [x1, 4]
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.L601:
+.L594:
 	add	x26, x26, 32
 	cmp	x26, x24
-	bne	.L602
-	cbz	w22, .L615
-	adrp	x0, .LANCHOR20
+	bne	.L595
+	cbz	w22, .L608
+	adrp	x0, .LANCHOR19
 	mov	w26, 1
-	ldrh	w28, [x0, #:lo12:.LANCHOR20]
-.L603:
-	add	x0, x20, :lo12:.LANCHOR3
-	adrp	x27, .LANCHOR13
+	ldrh	w28, [x0, #:lo12:.LANCHOR19]
+.L596:
+	add	x0, x20, :lo12:.LANCHOR2
+	adrp	x27, .LANCHOR12
 	str	x0, [x29, 120]
 	mov	w24, 0
-	add	x0, x27, :lo12:.LANCHOR13
+	add	x0, x27, :lo12:.LANCHOR12
 	str	x0, [x29, 104]
-.L611:
+.L604:
 	ldr	x0, [x29, 120]
 	mov	x5, 0
-	ldr	x6, [x21, #:lo12:.LANCHOR79]
+	ldr	x6, [x21, #:lo12:.LANCHOR78]
 	mov	w20, 0
-	ldrh	w11, [x25, #:lo12:.LANCHOR24]
+	ldrh	w11, [x25, #:lo12:.LANCHOR23]
 	ldrh	w7, [x0]
-	adrp	x0, .LANCHOR109
-	ldr	x8, [x0, #:lo12:.LANCHOR109]
+	adrp	x0, .LANCHOR108
+	ldr	x8, [x0, #:lo12:.LANCHOR108]
 	ldr	x0, [x29, 112]
-	ldr	x10, [x0, #:lo12:.LANCHOR110]
-.L604:
+	ldr	x10, [x0, #:lo12:.LANCHOR109]
+.L597:
 	cmp	w7, w5, uxth
-	bhi	.L607
-	cbz	w20, .L593
+	bhi	.L600
+	cbz	w20, .L586
 	mov	w1, w20
 	mov	w3, 1
 	mov	w2, w26
@@ -4467,11 +4409,11 @@ FtlLowFormatEraseBlock:
 	bl	FlashProgPages
 	mov	x27, 0
 	ubfiz	x1, x20, 5, 16
-.L610:
-	ldr	x0, [x21, #:lo12:.LANCHOR79]
+.L603:
+	ldr	x0, [x21, #:lo12:.LANCHOR78]
 	add	x3, x0, x27
 	ldr	w0, [x0, x27]
-	cbz	w0, .L609
+	cbz	w0, .L602
 	ldr	w0, [x3, 4]
 	add	w19, w19, 1
 	str	x1, [x29, 96]
@@ -4479,36 +4421,36 @@ FtlLowFormatEraseBlock:
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
 	ldr	x1, [x29, 96]
-.L609:
+.L602:
 	add	x27, x27, 32
 	cmp	x1, x27
-	bne	.L610
+	bne	.L603
 	add	w24, w24, 1
 	cmp	w28, w24, uxth
-	bhi	.L611
+	bhi	.L604
 	mov	x24, 0
-.L613:
-	cbz	w22, .L612
-	ldr	x0, [x21, #:lo12:.LANCHOR79]
+.L606:
+	cbz	w22, .L605
+	ldr	x0, [x21, #:lo12:.LANCHOR78]
 	add	x1, x0, x24
 	ldr	w0, [x0, x24]
-	cbnz	w0, .L612
+	cbnz	w0, .L605
 	ldr	w0, [x1, 4]
 	mov	w1, 1
 	lsr	w0, w0, 10
 	bl	FtlFreeSysBlkQueueIn
-.L612:
+.L605:
 	add	x24, x24, 32
 	cmp	x24, x27
-	bne	.L613
+	bne	.L606
 	cmp	w23, 63
 	ccmp	w22, 0, 0, hi
-	beq	.L593
-	ldr	x0, [x21, #:lo12:.LANCHOR79]
+	beq	.L586
+	ldr	x0, [x21, #:lo12:.LANCHOR78]
 	mov	w2, w20
 	mov	w1, w26
 	bl	FlashEraseBlocks
-.L593:
+.L586:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -4517,7 +4459,7 @@ FtlLowFormatEraseBlock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L598:
+.L591:
 	lsl	x0, x5, 5
 	mov	w1, w23
 	str	wzr, [x6, x0]
@@ -4525,13 +4467,13 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	and	w13, w0, 65535
 	mov	w14, w13
-	cbz	w22, .L595
+	cbz	w22, .L588
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L596
-.L595:
+	cbnz	w0, .L589
+.L588:
 	mov	w0, w14
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L597
+	cbnz	w0, .L590
 	ubfiz	x0, x24, 5, 16
 	mul	w1, w24, w12
 	add	x0, x6, x0
@@ -4542,18 +4484,18 @@ FtlLowFormatEraseBlock:
 	add	x1, x11, x1, sxtw 2
 	str	w13, [x0, 4]
 	stp	x10, x1, [x0, 8]
-.L596:
+.L589:
 	add	x5, x5, 1
-	b	.L594
-.L597:
+	b	.L587
+.L590:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L596
-.L615:
+	b	.L589
+.L608:
 	mov	w26, 0
 	mov	w28, 2
-	b	.L603
-.L607:
+	b	.L596
+.L600:
 	lsl	x0, x5, 5
 	mov	w1, w23
 	str	wzr, [x6, x0]
@@ -4562,13 +4504,13 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	and	w12, w0, 65535
 	mov	w13, w12
-	cbz	w22, .L605
+	cbz	w22, .L598
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L606
-.L605:
+	cbnz	w0, .L599
+.L598:
 	mov	w0, w13
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L606
+	cbnz	w0, .L599
 	ubfiz	x0, x20, 5, 16
 	mul	w1, w20, w11
 	add	x0, x6, x0
@@ -4579,9 +4521,9 @@ FtlLowFormatEraseBlock:
 	add	x1, x10, x1, sxtw 2
 	str	w12, [x0, 4]
 	stp	x8, x1, [x0, 8]
-.L606:
+.L599:
 	add	x5, x5, 1
-	b	.L604
+	b	.L597
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
 	.section	.text.FlashTestBlk,"ax",@progbits
 	.align	2
@@ -4593,17 +4535,17 @@ FlashTestBlk:
 	stp	x19, x20, [sp, 16]
 	and	w19, w0, 65535
 	cmp	w19, 11
-	bls	.L639
-	adrp	x20, .LANCHOR112
+	bls	.L632
+	adrp	x20, .LANCHOR111
 	mov	w2, 32
 	mov	w1, 165
 	lsl	w19, w19, 10
-	ldr	x0, [x20, #:lo12:.LANCHOR112]
+	ldr	x0, [x20, #:lo12:.LANCHOR111]
 	str	x0, [x29, 40]
 	add	x0, x29, 64
 	str	x0, [x29, 48]
 	bl	ftl_memset
-	ldr	x0, [x20, #:lo12:.LANCHOR112]
+	ldr	x0, [x20, #:lo12:.LANCHOR111]
 	mov	w2, 8
 	mov	w1, 90
 	bl	ftl_memset
@@ -4618,7 +4560,7 @@ FlashTestBlk:
 	mov	w1, w3
 	bl	FlashProgPages
 	ldr	w0, [x29, 32]
-	cbnz	w0, .L640
+	cbnz	w0, .L633
 	add	w0, w19, 1
 	mov	w3, 1
 	str	w0, [x29, 36]
@@ -4629,23 +4571,23 @@ FlashTestBlk:
 	ldr	w0, [x29, 32]
 	cmp	w0, 0
 	csetm	w20, ne
-.L638:
+.L631:
 	mov	w2, 1
 	mov	w1, 0
 	add	x0, x29, 32
 	str	w19, [x29, 36]
 	bl	FlashEraseBlocks
-.L636:
+.L629:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 128
 	ret
-.L640:
+.L633:
 	mov	w20, -1
-	b	.L638
-.L639:
+	b	.L631
+.L632:
 	mov	w20, 0
-	b	.L636
+	b	.L629
 	.size	FlashTestBlk, .-FlashTestBlk
 	.section	.text.FtlBbmTblFlush,"ax",@progbits
 	.align	2
@@ -4655,42 +4597,42 @@ FtlBbmTblFlush:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR114
+	adrp	x23, .LANCHOR113
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR138
+	adrp	x20, .LANCHOR137
 	stp	x21, x22, [sp, 32]
-	add	x19, x20, :lo12:.LANCHOR138
-	adrp	x22, .LANCHOR106
-	ldr	x1, [x23, #:lo12:.LANCHOR114]
+	add	x19, x20, :lo12:.LANCHOR137
+	adrp	x22, .LANCHOR105
+	ldr	x1, [x23, #:lo12:.LANCHOR113]
 	stp	x25, x26, [sp, 64]
-	adrp	x21, .LANCHOR37
+	adrp	x21, .LANCHOR36
 	str	x27, [sp, 80]
-	add	x25, x21, :lo12:.LANCHOR37
-	ldr	x0, [x22, #:lo12:.LANCHOR106]
-	adrp	x26, .LANCHOR10
+	add	x25, x21, :lo12:.LANCHOR36
+	ldr	x0, [x22, #:lo12:.LANCHOR105]
+	adrp	x26, .LANCHOR9
 	stp	x0, x1, [x19, 8]
-	adrp	x1, .LANCHOR23
-	adrp	x27, .LANCHOR127
+	adrp	x1, .LANCHOR22
+	adrp	x27, .LANCHOR126
 	add	x25, x25, 32
-	ldrh	w2, [x1, #:lo12:.LANCHOR23]
+	ldrh	w2, [x1, #:lo12:.LANCHOR22]
 	mov	w24, 0
-	add	x26, x26, :lo12:.LANCHOR10
-	add	x27, x27, :lo12:.LANCHOR127
+	add	x26, x26, :lo12:.LANCHOR9
+	add	x27, x27, :lo12:.LANCHOR126
 	mov	w1, 0
 	bl	ftl_memset
-.L643:
+.L636:
 	ldrh	w0, [x26]
 	cmp	w24, w0
-	blt	.L644
-	add	x20, x20, :lo12:.LANCHOR138
-	add	x19, x21, :lo12:.LANCHOR37
+	blt	.L637
+	add	x20, x20, :lo12:.LANCHOR137
+	add	x19, x21, :lo12:.LANCHOR36
 	mov	w2, 16
 	mov	w1, 255
 	adrp	x25, .LC18
-	adrp	x26, .LANCHOR20
+	adrp	x26, .LANCHOR19
 	ldr	x27, [x20, 16]
 	add	x25, x25, :lo12:.LC18
-	add	x26, x26, :lo12:.LANCHOR20
+	add	x26, x26, :lo12:.LANCHOR19
 	mov	w24, 0
 	mov	x0, x27
 	bl	ftl_memset
@@ -4698,27 +4640,27 @@ FtlBbmTblFlush:
 	strh	w0, [x27]
 	ldr	w0, [x19, 8]
 	str	w0, [x27, 4]
-	ldrh	w0, [x21, #:lo12:.LANCHOR37]
+	ldrh	w0, [x21, #:lo12:.LANCHOR36]
 	mov	w21, 0
 	strh	w0, [x27, 2]
 	ldrh	w0, [x19, 4]
 	strh	w0, [x27, 8]
 	ldrh	w0, [x19, 6]
 	strh	w0, [x27, 10]
-	adrp	x0, .LANCHOR2
-	ldr	w0, [x0, #:lo12:.LANCHOR2]
+	adrp	x0, .LANCHOR1
+	ldr	w0, [x0, #:lo12:.LANCHOR1]
 	strh	w0, [x27, 12]
-	adrp	x0, .LANCHOR143
-	ldr	w0, [x0, #:lo12:.LANCHOR143]
+	adrp	x0, .LANCHOR142
+	ldr	w0, [x0, #:lo12:.LANCHOR142]
 	strh	w0, [x27, 14]
-.L645:
+.L638:
 	ldrh	w1, [x19]
 	ldrh	w4, [x27, 10]
 	ldrh	w2, [x19, 2]
 	ldrh	w3, [x19, 4]
-	ldr	x0, [x22, #:lo12:.LANCHOR106]
+	ldr	x0, [x22, #:lo12:.LANCHOR105]
 	str	x0, [x20, 8]
-	ldr	x0, [x23, #:lo12:.LANCHOR114]
+	ldr	x0, [x23, #:lo12:.LANCHOR113]
 	str	x0, [x20, 16]
 	orr	w0, w2, w1, lsl 10
 	str	wzr, [x20]
@@ -4729,7 +4671,7 @@ FtlBbmTblFlush:
 	ldrh	w1, [x19, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L646
+	blt	.L639
 	ldr	w0, [x19, 8]
 	mov	w2, 1
 	ldrh	w1, [x19, 4]
@@ -4739,16 +4681,16 @@ FtlBbmTblFlush:
 	ldrh	w0, [x19]
 	strh	w0, [x27, 8]
 	strh	w0, [x19, 4]
-	adrp	x0, .LANCHOR79
+	adrp	x0, .LANCHOR78
 	strh	w1, [x19]
 	lsl	w1, w1, 10
-	ldr	x0, [x0, #:lo12:.LANCHOR79]
+	ldr	x0, [x0, #:lo12:.LANCHOR78]
 	str	w1, [x20, 4]
 	strh	wzr, [x19, 2]
 	str	w1, [x0, 4]
 	mov	w1, w2
 	bl	FlashEraseBlocks
-.L646:
+.L639:
 	mov	w3, 1
 	mov	x0, x20
 	mov	w2, w3
@@ -4759,7 +4701,7 @@ FtlBbmTblFlush:
 	strh	w0, [x19, 2]
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L647
+	bne	.L640
 	ldr	w1, [x20, 4]
 	add	w21, w21, 1
 	adrp	x0, .LC19
@@ -4767,15 +4709,15 @@ FtlBbmTblFlush:
 	add	x0, x0, :lo12:.LC19
 	bl	printf
 	cmp	w21, 3
-	bls	.L645
+	bls	.L638
 	ldr	w1, [x20, 4]
 	adrp	x0, .LC20
 	mov	w2, w21
 	add	x0, x0, :lo12:.LC20
 	bl	printf
-.L649:
-	b	.L649
-.L644:
+.L642:
+	b	.L642
+.L637:
 	ldrh	w2, [x27]
 	ldr	x1, [x25], 8
 	ldr	x0, [x19, 8]
@@ -4784,13 +4726,13 @@ FtlBbmTblFlush:
 	add	w24, w24, 1
 	add	x0, x0, x3, sxtw 2
 	bl	ftl_memcpy
-	b	.L643
-.L647:
+	b	.L636
+.L640:
 	add	w24, w24, 1
 	cmp	w24, 1
-	beq	.L645
+	beq	.L638
 	cmp	w0, 256
-	beq	.L645
+	beq	.L638
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -4808,254 +4750,249 @@ allocate_data_superblock:
 	stp	x29, x30, [sp, -112]!
 	add	x29, sp, 0
 	stp	x27, x28, [sp, 80]
-	adrp	x28, .LANCHOR48
+	adrp	x28, .LANCHOR47
 	stp	x23, x24, [sp, 48]
-	add	x24, x28, :lo12:.LANCHOR48
+	add	x24, x28, :lo12:.LANCHOR47
 	stp	x19, x20, [sp, 16]
-	adrp	x27, .LANCHOR44
+	adrp	x27, .LANCHOR43
 	mov	x19, x0
 	stp	x21, x22, [sp, 32]
-	add	x0, x27, :lo12:.LANCHOR44
+	add	x0, x27, :lo12:.LANCHOR43
 	stp	x25, x26, [sp, 64]
 	str	x0, [x29, 104]
-.L658:
+.L651:
 	ldr	x1, [x29, 104]
-	adrp	x23, .LANCHOR5
-	ldrh	w0, [x28, #:lo12:.LANCHOR48]
+	adrp	x23, .LANCHOR4
+	ldrh	w0, [x28, #:lo12:.LANCHOR47]
 	ldrh	w1, [x1]
 	add	w0, w0, w1
-	ldrh	w1, [x23, #:lo12:.LANCHOR5]
+	ldrh	w1, [x23, #:lo12:.LANCHOR4]
 	cmp	w0, w1
-	ble	.L659
-	adrp	x1, .LANCHOR144
+	ble	.L652
+	adrp	x1, .LANCHOR143
 	adrp	x0, .LC1
-	mov	w2, 2656
-	add	x1, x1, :lo12:.LANCHOR144
+	mov	w2, 2660
+	add	x1, x1, :lo12:.LANCHOR143
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L659:
-	adrp	x0, .LANCHOR53
-	add	x0, x0, :lo12:.LANCHOR53
+.L652:
+	adrp	x0, .LANCHOR52
+	add	x0, x0, :lo12:.LANCHOR52
 	cmp	x19, x0
-	bne	.L685
-	adrp	x1, .LANCHOR95
+	bne	.L678
+	adrp	x1, .LANCHOR94
 	ldrh	w0, [x24]
-	ldr	w1, [x1, #:lo12:.LANCHOR95]
+	ldr	w1, [x1, #:lo12:.LANCHOR94]
 	mul	w1, w0, w1
 	lsr	w0, w0, 1
 	add	w0, w0, 1
 	add	w1, w0, w1, lsr 2
 	ands	w1, w1, 65535
-	beq	.L660
+	beq	.L653
 	sub	w1, w1, #1
 	and	w1, w1, 65535
-.L660:
-	adrp	x0, .LANCHOR46
-	add	x0, x0, :lo12:.LANCHOR46
+.L653:
+	adrp	x0, .LANCHOR45
+	add	x0, x0, :lo12:.LANCHOR45
 	bl	List_pop_index_node
 	and	w22, w0, 65535
 	ldrh	w0, [x24]
-	cbnz	w0, .L661
-	adrp	x1, .LANCHOR144
+	cbnz	w0, .L654
+	adrp	x1, .LANCHOR143
 	adrp	x0, .LC1
-	mov	w2, 2665
-	add	x1, x1, :lo12:.LANCHOR144
+	mov	w2, 2669
+	add	x1, x1, :lo12:.LANCHOR143
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L661:
+.L654:
 	ldrh	w0, [x24]
 	sub	w0, w0, #1
 	strh	w0, [x24]
-	ldrh	w0, [x23, #:lo12:.LANCHOR5]
+	ldrh	w0, [x23, #:lo12:.LANCHOR4]
 	cmp	w0, w22
-	bls	.L658
-	adrp	x25, .LANCHOR42
+	bls	.L651
+	adrp	x25, .LANCHOR41
 	ubfiz	x20, x22, 1, 16
-	ldr	x0, [x25, #:lo12:.LANCHOR42]
+	ldr	x0, [x25, #:lo12:.LANCHOR41]
 	ldrh	w21, [x0, x20]
-	cbnz	w21, .L658
+	cbnz	w21, .L651
 	strh	w22, [x19]
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L663
-	ldr	x0, [x25, #:lo12:.LANCHOR42]
+	cbnz	w0, .L656
+	ldr	x0, [x25, #:lo12:.LANCHOR41]
 	mov	w1, -1
 	strh	w1, [x0, x20]
 	mov	w0, w22
 	bl	INSERT_DATA_LIST
-	ldrh	w1, [x27, #:lo12:.LANCHOR44]
+	ldrh	w1, [x27, #:lo12:.LANCHOR43]
 	ldrh	w0, [x24]
 	add	w0, w0, w1
-	ldrh	w1, [x23, #:lo12:.LANCHOR5]
+	ldrh	w1, [x23, #:lo12:.LANCHOR4]
 	cmp	w0, w1
-	ble	.L658
-	mov	w2, 2679
-	adrp	x1, .LANCHOR144
+	ble	.L651
+	mov	w2, 2683
+	adrp	x1, .LANCHOR143
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR144
+	add	x1, x1, :lo12:.LANCHOR143
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	b	.L658
-.L685:
+	b	.L651
+.L678:
 	mov	w1, 0
-	b	.L660
-.L663:
-	ldrh	w1, [x27, #:lo12:.LANCHOR44]
+	b	.L653
+.L656:
+	ldrh	w1, [x27, #:lo12:.LANCHOR43]
 	ldrh	w0, [x24]
 	add	w0, w0, w1
-	ldrh	w1, [x23, #:lo12:.LANCHOR5]
+	ldrh	w1, [x23, #:lo12:.LANCHOR4]
 	cmp	w0, w1
-	ble	.L665
-	adrp	x1, .LANCHOR144
+	ble	.L658
+	adrp	x1, .LANCHOR143
 	adrp	x0, .LC1
-	mov	w2, 2682
-	add	x1, x1, :lo12:.LANCHOR144
+	mov	w2, 2686
+	add	x1, x1, :lo12:.LANCHOR143
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L665:
-	adrp	x0, .LANCHOR3
-	adrp	x25, .LANCHOR79
+.L658:
+	adrp	x0, .LANCHOR2
+	adrp	x25, .LANCHOR78
 	add	x26, x19, 16
 	mov	w6, 65535
-	ldrh	w0, [x0, #:lo12:.LANCHOR3]
+	ldrh	w0, [x0, #:lo12:.LANCHOR2]
 	mov	x4, x26
-	ldr	x3, [x25, #:lo12:.LANCHOR79]
+	ldr	x3, [x25, #:lo12:.LANCHOR78]
 	ubfiz	x0, x0, 5, 16
 	add	x1, x3, 8
 	add	x0, x0, 8
 	add	x0, x3, x0
-.L666:
+.L659:
 	cmp	x0, x1
-	bne	.L668
-	cbnz	w21, .L669
-	adrp	x1, .LANCHOR144
+	bne	.L661
+	cbnz	w21, .L662
+	adrp	x1, .LANCHOR143
 	adrp	x0, .LC1
-	mov	w2, 2693
-	add	x1, x1, :lo12:.LANCHOR144
+	mov	w2, 2697
+	add	x1, x1, :lo12:.LANCHOR143
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L669:
-	adrp	x0, .LANCHOR145
-	ldrh	w0, [x0, #:lo12:.LANCHOR145]
+.L662:
+	adrp	x0, .LANCHOR144
+	ldrh	w0, [x0, #:lo12:.LANCHOR144]
 	cmp	w0, w22
-	bne	.L670
-	adrp	x1, .LANCHOR144
+	bne	.L663
+	adrp	x1, .LANCHOR143
 	adrp	x0, .LC1
-	mov	w2, 2695
-	add	x1, x1, :lo12:.LANCHOR144
+	mov	w2, 2699
+	add	x1, x1, :lo12:.LANCHOR143
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L670:
+.L663:
 	ldrb	w0, [x19, 8]
-	adrp	x6, .LANCHOR47
-	adrp	x7, .LANCHOR14
-	adrp	x5, .LANCHOR90
-	adrp	x4, .LANCHOR91
-	ldr	x1, [x6, #:lo12:.LANCHOR47]
-	cbnz	w0, .L671
-	ldrh	w0, [x1, x20]
-	cbz	w0, .L672
-	ldrh	w2, [x7, #:lo12:.LANCHOR14]
-	add	w0, w0, w2
-.L696:
-	strh	w0, [x1, x20]
-	mov	w1, 0
-	ldr	w0, [x5, #:lo12:.LANCHOR90]
+	adrp	x3, .LANCHOR46
+	adrp	x5, .LANCHOR13
+	adrp	x2, .LANCHOR89
+	adrp	x1, .LANCHOR90
+	ldr	x4, [x3, #:lo12:.LANCHOR46]
+	cbnz	w0, .L664
+	ldrh	w0, [x4, x20]
+	cbz	w0, .L665
+	ldrh	w6, [x5, #:lo12:.LANCHOR13]
+	add	w0, w0, w6
+.L689:
+	strh	w0, [x4, x20]
+	ldr	w0, [x2, #:lo12:.LANCHOR89]
 	add	w0, w0, 1
-	str	w0, [x5, #:lo12:.LANCHOR90]
-	mov	w0, w22
-	bl	ftl_set_blk_mode
-.L674:
-	ldr	x0, [x6, #:lo12:.LANCHOR47]
-	ldrh	w1, [x0, x20]
-	adrp	x0, .LANCHOR92
-	ldr	w2, [x0, #:lo12:.LANCHOR92]
-	cmp	w1, w2
-	bls	.L675
-	str	w1, [x0, #:lo12:.LANCHOR92]
-.L675:
-	ldr	w2, [x5, #:lo12:.LANCHOR90]
-	ldr	w1, [x4, #:lo12:.LANCHOR91]
-	ldrh	w0, [x7, #:lo12:.LANCHOR14]
+	str	w0, [x2, #:lo12:.LANCHOR89]
+.L667:
+	ldr	x0, [x3, #:lo12:.LANCHOR46]
+	ldrh	w3, [x0, x20]
+	adrp	x0, .LANCHOR91
+	ldr	w4, [x0, #:lo12:.LANCHOR91]
+	cmp	w3, w4
+	bls	.L668
+	str	w3, [x0, #:lo12:.LANCHOR91]
+.L668:
+	ldr	w2, [x2, #:lo12:.LANCHOR89]
+	ldr	w1, [x1, #:lo12:.LANCHOR90]
+	ldrh	w0, [x5, #:lo12:.LANCHOR13]
 	madd	w0, w0, w2, w1
-	ldrh	w1, [x23, #:lo12:.LANCHOR5]
+	ldrh	w1, [x23, #:lo12:.LANCHOR4]
 	udiv	w0, w0, w1
-	adrp	x1, .LANCHOR143
-	str	w0, [x1, #:lo12:.LANCHOR143]
-	adrp	x0, .LANCHOR118
-	ldr	x1, [x0, #:lo12:.LANCHOR118]
+	adrp	x1, .LANCHOR142
+	str	w0, [x1, #:lo12:.LANCHOR142]
+	adrp	x0, .LANCHOR117
+	ldr	x1, [x0, #:lo12:.LANCHOR117]
 	ldr	w0, [x1, 16]
 	add	w0, w0, 1
 	str	w0, [x1, 16]
-	ldr	x0, [x25, #:lo12:.LANCHOR79]
+	ldr	x0, [x25, #:lo12:.LANCHOR78]
 	ubfiz	x1, x21, 5, 16
 	add	x1, x1, 4
 	add	x2, x0, 4
 	add	x1, x0, x1
-.L676:
+.L669:
 	cmp	x1, x2
-	bne	.L677
+	bne	.L670
 	ldrb	w1, [x19, 8]
 	mov	w2, w21
 	mov	x23, 0
 	bl	FlashEraseBlocks
 	mov	w1, 0
-.L678:
+.L671:
 	cmp	w21, w23, uxth
-	bhi	.L680
-	cbz	w1, .L681
+	bhi	.L673
+	cbz	w1, .L674
 	mov	w0, w22
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L681:
+.L674:
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L682
-	adrp	x0, .LANCHOR42
+	cbnz	w0, .L675
+	adrp	x0, .LANCHOR41
 	mov	w1, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR42]
+	ldr	x0, [x0, #:lo12:.LANCHOR41]
 	strh	w1, [x0, x20]
-	b	.L658
-.L668:
+	b	.L651
+.L661:
 	ldrh	w2, [x4]
 	stp	xzr, xzr, [x1]
 	cmp	w2, w6
-	beq	.L667
+	beq	.L660
 	ubfiz	x5, x21, 5, 16
 	add	w21, w21, 1
 	add	x5, x3, x5
 	and	w21, w21, 65535
 	lsl	w2, w2, 10
 	str	w2, [x5, 4]
-.L667:
+.L660:
 	add	x1, x1, 32
 	add	x4, x4, 2
-	b	.L666
-.L672:
+	b	.L659
+.L665:
 	mov	w0, 2
-	b	.L696
-.L671:
-	ldrh	w0, [x1, x20]
+	b	.L689
+.L664:
+	ldrh	w0, [x4, x20]
 	add	w0, w0, 1
-	strh	w0, [x1, x20]
-	ldr	w0, [x4, #:lo12:.LANCHOR91]
+	strh	w0, [x4, x20]
+	ldr	w0, [x1, #:lo12:.LANCHOR90]
 	add	w0, w0, 1
-	str	w0, [x4, #:lo12:.LANCHOR91]
-	mov	w0, w22
-	bl	ftl_set_blk_mode.part.6
-	b	.L674
-.L677:
+	str	w0, [x1, #:lo12:.LANCHOR90]
+	b	.L667
+.L670:
 	ldr	w3, [x2]
 	and	w3, w3, -1024
 	str	w3, [x2], 32
-	b	.L676
-.L680:
-	ldr	x2, [x25, #:lo12:.LANCHOR79]
+	b	.L669
+.L673:
+	ldr	x2, [x25, #:lo12:.LANCHOR78]
 	lsl	x0, x23, 5
 	add	x3, x2, x0
 	ldr	w2, [x2, x0]
 	cmn	w2, #1
-	bne	.L679
+	bne	.L672
 	add	w1, w1, 1
 	ldr	w0, [x3, 4]
 	stp	w2, w1, [x29, 96]
@@ -5066,39 +5003,39 @@ allocate_data_superblock:
 	ldrb	w0, [x19, 7]
 	sub	w0, w0, #1
 	strb	w0, [x19, 7]
-.L679:
+.L672:
 	add	x23, x23, 1
 	add	x26, x26, 2
-	b	.L678
-.L682:
-	adrp	x1, .LANCHOR19
-	adrp	x2, .LANCHOR82
+	b	.L671
+.L675:
+	adrp	x1, .LANCHOR18
+	adrp	x2, .LANCHOR81
 	strh	wzr, [x19, 2]
-	ldrh	w1, [x1, #:lo12:.LANCHOR19]
+	ldrh	w1, [x1, #:lo12:.LANCHOR18]
 	strh	w22, [x19]
 	strb	wzr, [x19, 6]
 	mul	w0, w0, w1
-	ldr	w1, [x2, #:lo12:.LANCHOR82]
+	ldr	w1, [x2, #:lo12:.LANCHOR81]
 	str	w1, [x19, 12]
 	add	w1, w1, 1
-	str	w1, [x2, #:lo12:.LANCHOR82]
-	adrp	x1, .LANCHOR42
+	str	w1, [x2, #:lo12:.LANCHOR81]
+	adrp	x1, .LANCHOR41
 	and	w0, w0, 65535
 	strh	w0, [x19, 4]
-	ldr	x1, [x1, #:lo12:.LANCHOR42]
+	ldr	x1, [x1, #:lo12:.LANCHOR41]
 	strh	w0, [x1, x20]
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L683
+	cbz	w0, .L676
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L684
-.L683:
-	adrp	x1, .LANCHOR144
+	cbnz	w0, .L677
+.L676:
+	adrp	x1, .LANCHOR143
 	adrp	x0, .LC1
-	mov	w2, 2748
-	add	x1, x1, :lo12:.LANCHOR144
+	mov	w2, 2752
+	add	x1, x1, :lo12:.LANCHOR143
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L684:
+.L677:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -5116,24 +5053,24 @@ FtlGcFreeBadSuperBlk:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR74
+	adrp	x21, .LANCHOR73
 	stp	x25, x26, [sp, 64]
 	and	w25, w0, 65535
-	ldrh	w0, [x21, #:lo12:.LANCHOR74]
+	ldrh	w0, [x21, #:lo12:.LANCHOR73]
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	str	x27, [sp, 80]
-	cbz	w0, .L698
-	adrp	x23, .LANCHOR75
-	add	x24, x23, :lo12:.LANCHOR75
+	cbz	w0, .L691
+	adrp	x23, .LANCHOR74
+	add	x24, x23, :lo12:.LANCHOR74
 	mov	w19, 0
-.L699:
-	adrp	x0, .LANCHOR3
-	ldrh	w0, [x0, #:lo12:.LANCHOR3]
+.L692:
+	adrp	x0, .LANCHOR2
+	ldrh	w0, [x0, #:lo12:.LANCHOR2]
 	cmp	w0, w19
-	bhi	.L705
+	bhi	.L698
 	bl	FtlGcReFreshBadBlk
-.L698:
+.L691:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -5142,28 +5079,28 @@ FtlGcFreeBadSuperBlk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L705:
-	adrp	x0, .LANCHOR13
-	add	x0, x0, :lo12:.LANCHOR13
+.L698:
+	adrp	x0, .LANCHOR12
+	add	x0, x0, :lo12:.LANCHOR12
 	mov	w1, w25
-	add	x22, x21, :lo12:.LANCHOR74
+	add	x22, x21, :lo12:.LANCHOR73
 	mov	w20, 0
 	ldrb	w0, [x0, w19, sxtw]
 	bl	V2P_block
 	and	w26, w0, 65535
-.L700:
+.L693:
 	ldrh	w0, [x22]
 	cmp	w0, w20
-	bhi	.L704
+	bhi	.L697
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L699
-.L704:
-	add	x0, x23, :lo12:.LANCHOR75
+	b	.L692
+.L697:
+	add	x0, x23, :lo12:.LANCHOR74
 	add	w27, w20, 1
 	ldrh	w0, [x0, w20, sxtw 1]
 	cmp	w0, w26
-	bne	.L701
+	bne	.L694
 	mov	w0, w26
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
@@ -5171,22 +5108,22 @@ FtlGcFreeBadSuperBlk:
 	sxtw	x3, w27
 	and	x4, x20, 65535
 	mov	x0, 0
-.L702:
+.L695:
 	add	w2, w20, w0
 	cmp	w1, w2, uxth
-	bhi	.L703
+	bhi	.L696
 	sub	w1, w1, #1
 	strh	w1, [x22]
-.L701:
+.L694:
 	and	w20, w27, 65535
-	b	.L700
-.L703:
+	b	.L693
+.L696:
 	add	x2, x3, x0
 	ldrh	w5, [x24, x2, lsl 1]
 	add	x2, x4, x0
 	add	x0, x0, 1
 	strh	w5, [x24, x2, lsl 1]
-	b	.L702
+	b	.L695
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
 	.section	.text.update_vpc_list,"ax",@progbits
 	.align	2
@@ -5194,96 +5131,96 @@ FtlGcFreeBadSuperBlk:
 	.type	update_vpc_list, %function
 update_vpc_list:
 	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LANCHOR42
+	adrp	x1, .LANCHOR41
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w19, w0, 65535
-	ldr	x1, [x1, #:lo12:.LANCHOR42]
+	ldr	x1, [x1, #:lo12:.LANCHOR41]
 	ubfiz	x0, x19, 1, 16
 	ldrh	w0, [x1, x0]
-	cbnz	w0, .L711
+	cbnz	w0, .L704
+	adrp	x0, .LANCHOR71
+	ldrh	w1, [x0, #:lo12:.LANCHOR71]
+	cmp	w1, w19
+	bne	.L705
+	mov	w1, -1
+	strh	w1, [x0, #:lo12:.LANCHOR71]
+.L705:
 	adrp	x0, .LANCHOR72
 	ldrh	w1, [x0, #:lo12:.LANCHOR72]
 	cmp	w1, w19
-	bne	.L712
+	bne	.L706
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR72]
-.L712:
-	adrp	x0, .LANCHOR73
-	ldrh	w1, [x0, #:lo12:.LANCHOR73]
-	cmp	w1, w19
-	bne	.L713
-	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR73]
-.L713:
-	adrp	x0, .LANCHOR145
-	ldrh	w1, [x0, #:lo12:.LANCHOR145]
+.L706:
+	adrp	x0, .LANCHOR144
+	ldrh	w1, [x0, #:lo12:.LANCHOR144]
 	cmp	w1, w19
-	bne	.L714
+	bne	.L707
 	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR145]
-.L715:
-	adrp	x20, .LANCHOR44
+	strh	w1, [x0, #:lo12:.LANCHOR144]
+.L708:
+	adrp	x20, .LANCHOR43
 	mov	w1, w19
-	adrp	x0, .LANCHOR41
-	add	x0, x0, :lo12:.LANCHOR41
+	adrp	x0, .LANCHOR40
+	add	x0, x0, :lo12:.LANCHOR40
 	bl	List_remove_node
-	ldrh	w0, [x20, #:lo12:.LANCHOR44]
-	cbnz	w0, .L717
-	adrp	x1, .LANCHOR146
+	ldrh	w0, [x20, #:lo12:.LANCHOR43]
+	cbnz	w0, .L710
+	adrp	x1, .LANCHOR145
 	adrp	x0, .LC1
-	mov	w2, 2824
-	add	x1, x1, :lo12:.LANCHOR146
+	mov	w2, 2828
+	add	x1, x1, :lo12:.LANCHOR145
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L717:
-	ldrh	w0, [x20, #:lo12:.LANCHOR44]
+.L710:
+	ldrh	w0, [x20, #:lo12:.LANCHOR43]
 	sub	w0, w0, #1
-	strh	w0, [x20, #:lo12:.LANCHOR44]
+	strh	w0, [x20, #:lo12:.LANCHOR43]
 	mov	w0, w19
 	bl	free_data_superblock
 	mov	w0, w19
 	bl	FtlGcFreeBadSuperBlk
-	adrp	x0, .LANCHOR48
-	ldrh	w1, [x20, #:lo12:.LANCHOR44]
-	ldrh	w0, [x0, #:lo12:.LANCHOR48]
+	adrp	x0, .LANCHOR47
+	ldrh	w1, [x20, #:lo12:.LANCHOR43]
+	ldrh	w0, [x0, #:lo12:.LANCHOR47]
 	add	w0, w0, w1
-	adrp	x1, .LANCHOR5
-	ldrh	w1, [x1, #:lo12:.LANCHOR5]
+	adrp	x1, .LANCHOR4
+	ldrh	w1, [x1, #:lo12:.LANCHOR4]
 	cmp	w0, w1
-	ble	.L721
-	adrp	x1, .LANCHOR146
+	ble	.L714
+	adrp	x1, .LANCHOR145
 	adrp	x0, .LC1
-	mov	w2, 2827
-	add	x1, x1, :lo12:.LANCHOR146
+	mov	w2, 2831
+	add	x1, x1, :lo12:.LANCHOR145
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L721:
-	mov	w0, 1
-	b	.L710
 .L714:
+	mov	w0, 1
+	b	.L703
+.L707:
+	adrp	x0, .LANCHOR50
+	ldrh	w0, [x0, #:lo12:.LANCHOR50]
+	cmp	w0, w19
+	beq	.L713
 	adrp	x0, .LANCHOR51
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w19
-	beq	.L720
+	beq	.L713
 	adrp	x0, .LANCHOR52
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
-	beq	.L720
-	adrp	x0, .LANCHOR53
-	ldrh	w0, [x0, #:lo12:.LANCHOR53]
-	cmp	w0, w19
-	bne	.L715
-.L720:
+	bne	.L708
+.L713:
 	mov	w0, 0
-.L710:
+.L703:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L711:
+.L704:
 	mov	w0, w19
 	bl	List_update_data_list
-	b	.L720
+	b	.L713
 	.size	update_vpc_list, .-update_vpc_list
 	.section	.text.decrement_vpc_count,"ax",@progbits
 	.align	2
@@ -5297,77 +5234,77 @@ decrement_vpc_count:
 	str	x21, [sp, 32]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L724
-	adrp	x21, .LANCHOR42
+	beq	.L717
+	adrp	x21, .LANCHOR41
 	ubfiz	x20, x19, 1, 16
-	ldr	x1, [x21, #:lo12:.LANCHOR42]
+	ldr	x1, [x21, #:lo12:.LANCHOR41]
 	ldrh	w0, [x1, x20]
-	cbnz	w0, .L725
+	cbnz	w0, .L718
 	mov	w2, 0
 	mov	w1, w19
 	adrp	x0, .LC21
 	add	x0, x0, :lo12:.LC21
 	bl	printf
-	ldr	x0, [x21, #:lo12:.LANCHOR42]
+	ldr	x0, [x21, #:lo12:.LANCHOR41]
 	ldrh	w0, [x0, x20]
-	cbz	w0, .L726
-.L731:
+	cbz	w0, .L719
+.L724:
 	mov	w20, 0
-.L723:
+.L716:
 	mov	w0, w20
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L726:
-	mov	w2, 2842
-	adrp	x1, .LANCHOR147
+.L719:
+	mov	w2, 2846
+	adrp	x1, .LANCHOR146
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR147
+	add	x1, x1, :lo12:.LANCHOR146
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	b	.L731
-.L725:
+	b	.L724
+.L718:
 	sub	w0, w0, #1
 	strh	w0, [x1, x20]
-.L724:
-	adrp	x21, .LANCHOR131
+.L717:
+	adrp	x21, .LANCHOR130
 	mov	w1, 65535
-	ldrh	w0, [x21, #:lo12:.LANCHOR131]
+	ldrh	w0, [x21, #:lo12:.LANCHOR130]
 	cmp	w0, w1
-	bne	.L728
-	strh	w19, [x21, #:lo12:.LANCHOR131]
-	b	.L731
-.L728:
+	bne	.L721
+	strh	w19, [x21, #:lo12:.LANCHOR130]
+	b	.L724
+.L721:
 	cmp	w19, w0
-	beq	.L731
+	beq	.L724
 	bl	update_vpc_list
 	cmp	w0, 0
-	adrp	x1, .LANCHOR40
-	adrp	x0, .LANCHOR41
-	strh	w19, [x21, #:lo12:.LANCHOR131]
+	adrp	x1, .LANCHOR39
+	adrp	x0, .LANCHOR40
+	strh	w19, [x21, #:lo12:.LANCHOR130]
 	cset	w20, ne
-	ldr	x1, [x1, #:lo12:.LANCHOR40]
-	ldr	x0, [x0, #:lo12:.LANCHOR41]
+	ldr	x1, [x1, #:lo12:.LANCHOR39]
+	ldr	x0, [x0, #:lo12:.LANCHOR40]
 	sub	x0, x0, x1
 	mov	x1, -6148914691236517206
 	asr	x0, x0, 1
 	movk	x1, 0xaaab, lsl 0
 	mul	x0, x0, x1
-	adrp	x1, .LANCHOR42
-	ldr	x1, [x1, #:lo12:.LANCHOR42]
+	adrp	x1, .LANCHOR41
+	ldr	x1, [x1, #:lo12:.LANCHOR41]
 	and	x2, x0, 65535
 	ldrh	w1, [x1, x2, lsl 1]
-	cbnz	w1, .L723
+	cbnz	w1, .L716
 	cmp	w19, w0, uxth
-	beq	.L723
-	mov	w2, 2858
-	adrp	x1, .LANCHOR147
+	beq	.L716
+	mov	w2, 2862
+	adrp	x1, .LANCHOR146
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR147
+	add	x1, x1, :lo12:.LANCHOR146
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	b	.L723
+	b	.L716
 	.size	decrement_vpc_count, .-decrement_vpc_count
 	.section	.text.FtlSuperblockPowerLostFix,"ax",@progbits
 	.align	2
@@ -5375,20 +5312,20 @@ decrement_vpc_count:
 	.type	FtlSuperblockPowerLostFix, %function
 FtlSuperblockPowerLostFix:
 	stp	x29, x30, [sp, -80]!
-	adrp	x1, .LANCHOR114
+	adrp	x1, .LANCHOR113
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
 	mov	w0, -1
 	stp	x21, x22, [sp, 32]
 	str	w0, [x29, 72]
-	adrp	x0, .LANCHOR106
-	ldr	x21, [x1, #:lo12:.LANCHOR114]
+	adrp	x0, .LANCHOR105
+	ldr	x21, [x1, #:lo12:.LANCHOR113]
 	mov	w1, -3
-	ldr	x0, [x0, #:lo12:.LANCHOR106]
-	adrp	x22, .LANCHOR83
+	ldr	x0, [x0, #:lo12:.LANCHOR105]
+	adrp	x22, .LANCHOR82
 	str	x21, [x29, 64]
-	add	x22, x22, :lo12:.LANCHOR83
+	add	x22, x22, :lo12:.LANCHOR82
 	str	x0, [x29, 56]
 	ldrh	w20, [x19, 4]
 	str	w1, [x21, 8]
@@ -5404,33 +5341,33 @@ FtlSuperblockPowerLostFix:
 	mov	w1, 22136
 	movk	w1, 0x1234, lsl 16
 	str	w1, [x0, 4]
-.L738:
+.L731:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L734
-.L735:
+	cbnz	w0, .L727
+.L728:
 	ldrh	w0, [x19]
-	adrp	x1, .LANCHOR42
+	adrp	x1, .LANCHOR41
 	ldrh	w3, [x19, 4]
-	ldr	x2, [x1, #:lo12:.LANCHOR42]
+	ldr	x2, [x1, #:lo12:.LANCHOR41]
 	lsl	x0, x0, 1
 	ldrh	w1, [x2, x0]
 	sub	w1, w1, w3
 	strh	w1, [x2, x0]
-	adrp	x0, .LANCHOR19
+	adrp	x0, .LANCHOR18
 	strb	wzr, [x19, 6]
 	strh	wzr, [x19, 4]
-	ldrh	w0, [x0, #:lo12:.LANCHOR19]
+	ldrh	w0, [x0, #:lo12:.LANCHOR18]
 	strh	w0, [x19, 2]
 	ldp	x21, x22, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 80
 	ret
-.L734:
+.L727:
 	mov	x0, x19
 	bl	get_new_active_ppa
 	str	w0, [x29, 52]
 	cmn	w0, #1
-	beq	.L735
+	beq	.L728
 	ldr	w0, [x22]
 	mov	w3, 0
 	str	w0, [x21, 4]
@@ -5445,8 +5382,8 @@ FtlSuperblockPowerLostFix:
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
 	subs	w20, w20, #1
-	bne	.L738
-	b	.L735
+	bne	.L731
+	b	.L728
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
 	.section	.text.FtlMakeBbt,"ax",@progbits
 	.align	2
@@ -5458,69 +5395,69 @@ FtlMakeBbt:
 	stp	x21, x22, [sp, 32]
 	mov	w22, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR37
+	adrp	x20, .LANCHOR36
 	stp	x23, x24, [sp, 48]
-	add	x21, x20, :lo12:.LANCHOR37
+	add	x21, x20, :lo12:.LANCHOR36
 	stp	x25, x26, [sp, 64]
 	add	x24, x21, 32
 	stp	x27, x28, [sp, 80]
 	bl	FtlBbtMemInit
 	bl	FtlLoadFactoryBbt
-	adrp	x28, .LANCHOR138
+	adrp	x28, .LANCHOR137
 	add	x21, x21, 12
-	add	x25, x28, :lo12:.LANCHOR138
-	adrp	x0, .LANCHOR10
-	add	x0, x0, :lo12:.LANCHOR10
+	add	x25, x28, :lo12:.LANCHOR137
+	adrp	x0, .LANCHOR9
+	add	x0, x0, :lo12:.LANCHOR9
 	str	x0, [x29, 120]
-.L747:
+.L740:
 	ldr	x0, [x29, 120]
 	ldrh	w0, [x0]
 	cmp	w22, w0
-	bcc	.L753
-	adrp	x21, .LANCHOR25
-	add	x21, x21, :lo12:.LANCHOR25
+	bcc	.L746
+	adrp	x21, .LANCHOR24
+	add	x21, x21, :lo12:.LANCHOR24
 	mov	w19, 0
-.L754:
+.L747:
 	ldrh	w0, [x21]
 	cmp	w0, w19
-	bhi	.L755
-	add	x21, x20, :lo12:.LANCHOR37
+	bhi	.L748
+	add	x21, x20, :lo12:.LANCHOR36
 	mov	w22, 65535
 	ldrh	w19, [x21, 12]
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L756:
+.L749:
 	ldrh	w0, [x21, 12]
 	sub	w0, w0, #47
 	cmp	w0, w19
-	bgt	.L760
+	bgt	.L753
 	mov	w0, w19
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L757
+	beq	.L750
 	mov	w0, w19
 	bl	FlashTestBlk
-	cbz	w0, .L758
+	cbz	w0, .L751
 	mov	w0, w19
 	bl	FtlBbmMapBadBlock
-.L757:
+.L750:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L756
-.L753:
-	adrp	x2, .LANCHOR114
-	adrp	x0, .LANCHOR106
-	add	x19, x28, :lo12:.LANCHOR138
+	b	.L749
+.L746:
+	adrp	x2, .LANCHOR113
+	adrp	x0, .LANCHOR105
+	add	x19, x28, :lo12:.LANCHOR137
 	ldrh	w1, [x21]
-	ldr	x0, [x0, #:lo12:.LANCHOR106]
+	ldr	x0, [x0, #:lo12:.LANCHOR105]
 	mov	w3, 65535
-	ldr	x26, [x2, #:lo12:.LANCHOR114]
+	ldr	x26, [x2, #:lo12:.LANCHOR113]
 	cmp	w1, w3
 	stp	x0, x26, [x19, 8]
-	adrp	x23, .LANCHOR17
+	adrp	x23, .LANCHOR16
 	str	x2, [x29, 112]
-	beq	.L748
-	ldrh	w4, [x23, #:lo12:.LANCHOR17]
+	beq	.L741
+	ldrh	w4, [x23, #:lo12:.LANCHOR16]
 	mov	w2, 1
 	madd	w27, w4, w22, w1
 	mov	w1, w2
@@ -5530,46 +5467,46 @@ FtlMakeBbt:
 	bl	FlashReadPages
 	ldr	x1, [x19, 8]
 	ldr	x0, [x24]
-	ldrh	w2, [x23, #:lo12:.LANCHOR17]
+	ldrh	w2, [x23, #:lo12:.LANCHOR16]
 	add	w2, w2, 7
 	lsr	w2, w2, 3
 	bl	ftl_memcpy
-.L749:
+.L742:
 	mov	w0, w27
 	add	w22, w22, 1
 	bl	FtlBbmMapBadBlock
 	add	x24, x24, 8
 	add	x21, x21, 2
-	b	.L747
-.L748:
+	b	.L740
+.L741:
 	mov	w1, w22
 	bl	FlashGetBadBlockList
 	ldr	x0, [x19, 8]
 	ldr	x1, [x24]
 	bl	FtlBbt2Bitmap
-	ldrh	w19, [x23, #:lo12:.LANCHOR17]
-	add	x23, x23, :lo12:.LANCHOR17
-	adrp	x0, .LANCHOR127
+	ldrh	w19, [x23, #:lo12:.LANCHOR16]
+	add	x23, x23, :lo12:.LANCHOR16
+	adrp	x0, .LANCHOR126
 	sub	w19, w19, #1
-	add	x0, x0, :lo12:.LANCHOR127
+	add	x0, x0, :lo12:.LANCHOR126
 	and	w19, w19, 65535
 	str	x0, [x29, 104]
-.L750:
+.L743:
 	ldrh	w0, [x23]
 	madd	w0, w22, w0, w19
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L751
+	beq	.L744
 	ldr	x0, [x29, 112]
 	mov	w2, 16
 	strh	w19, [x21]
 	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR114]
+	ldr	x0, [x0, #:lo12:.LANCHOR113]
 	bl	ftl_memset
-	adrp	x0, .LANCHOR106
+	adrp	x0, .LANCHOR105
 	mov	w2, 4096
 	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR106]
+	ldr	x0, [x0, #:lo12:.LANCHOR105]
 	bl	ftl_memset
 	mov	w0, -3872
 	strh	w0, [x26]
@@ -5597,34 +5534,34 @@ FtlMakeBbt:
 	bl	FlashProgPages
 	ldr	w0, [x25]
 	cmn	w0, #1
-	bne	.L749
+	bne	.L742
 	mov	w0, w27
 	bl	FtlBbmMapBadBlock
-	b	.L750
-.L751:
+	b	.L743
+.L744:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L750
-.L755:
+	b	.L743
+.L748:
 	mov	w0, w19
 	add	w19, w19, 1
 	bl	FtlBbmMapBadBlock
 	and	w19, w19, 65535
-	b	.L754
-.L758:
+	b	.L747
+.L751:
 	ldrh	w0, [x21]
 	cmp	w0, w22
-	bne	.L759
+	bne	.L752
 	strh	w19, [x21]
-	b	.L757
-.L759:
+	b	.L750
+.L752:
 	strh	w19, [x21, 4]
-.L760:
-	adrp	x0, .LANCHOR79
-	add	x19, x20, :lo12:.LANCHOR37
-	ldrh	w1, [x20, #:lo12:.LANCHOR37]
+.L753:
+	adrp	x0, .LANCHOR78
+	add	x19, x20, :lo12:.LANCHOR36
+	ldrh	w1, [x20, #:lo12:.LANCHOR36]
 	mov	w2, 2
-	ldr	x0, [x0, #:lo12:.LANCHOR79]
+	ldr	x0, [x0, #:lo12:.LANCHOR78]
 	str	wzr, [x19, 8]
 	lsl	w1, w1, 10
 	strh	wzr, [x19, 2]
@@ -5634,7 +5571,7 @@ FtlMakeBbt:
 	str	w1, [x0, 36]
 	mov	w1, 1
 	bl	FlashEraseBlocks
-	ldrh	w0, [x20, #:lo12:.LANCHOR37]
+	ldrh	w0, [x20, #:lo12:.LANCHOR36]
 	bl	FtlBbmMapBadBlock
 	ldrh	w0, [x19, 4]
 	bl	FtlBbmMapBadBlock
@@ -5644,9 +5581,9 @@ FtlMakeBbt:
 	ldrh	w1, [x19, 4]
 	add	w0, w0, 1
 	str	w0, [x19, 8]
-	ldrh	w0, [x20, #:lo12:.LANCHOR37]
+	ldrh	w0, [x20, #:lo12:.LANCHOR36]
 	strh	w0, [x19, 4]
-	strh	w1, [x20, #:lo12:.LANCHOR37]
+	strh	w1, [x20, #:lo12:.LANCHOR36]
 	bl	FtlBbmTblFlush
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
@@ -5674,18 +5611,18 @@ js_hash:
 	mov	w0, 42982
 	mov	x3, 0
 	movk	w0, 0x47c6, lsl 16
-.L768:
+.L761:
 	cmp	w1, w3
-	bhi	.L769
+	bhi	.L762
 	ret
-.L769:
+.L762:
 	lsr	w2, w0, 2
 	ldrb	w5, [x4, x3]
 	add	w2, w2, w0, lsl 5
 	add	x3, x3, 1
 	add	w2, w2, w5
 	eor	w0, w0, w2
-	b	.L768
+	b	.L761
 	.size	js_hash, .-js_hash
 	.section	.text.Ftl_write_map_blk_to_last_page,"ax",@progbits
 	.align	2
@@ -5702,16 +5639,16 @@ Ftl_write_map_blk_to_last_page:
 	ldrh	w0, [x0]
 	stp	x23, x24, [sp, 48]
 	cmp	w0, w1
-	bne	.L771
+	bne	.L764
 	ldrh	w0, [x19, 8]
-	cbz	w0, .L772
-	adrp	x1, .LANCHOR148
+	cbz	w0, .L765
+	adrp	x1, .LANCHOR147
 	adrp	x0, .LC1
 	mov	w2, 641
-	add	x1, x1, :lo12:.LANCHOR148
+	add	x1, x1, :lo12:.LANCHOR147
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L772:
+.L765:
 	ldrh	w0, [x19, 8]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
@@ -5722,26 +5659,26 @@ Ftl_write_map_blk_to_last_page:
 	add	w0, w0, 1
 	strh	wzr, [x19]
 	str	w0, [x19, 48]
-.L773:
+.L766:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L771:
+.L764:
 	ubfiz	x0, x0, 1, 16
-	adrp	x2, .LANCHOR114
-	adrp	x24, .LANCHOR106
+	adrp	x2, .LANCHOR113
+	adrp	x24, .LANCHOR105
 	ldr	x23, [x19, 40]
-	ldr	x21, [x2, #:lo12:.LANCHOR114]
+	ldr	x21, [x2, #:lo12:.LANCHOR113]
 	ldrh	w22, [x20, x0]
-	adrp	x20, .LANCHOR138
+	adrp	x20, .LANCHOR137
 	ldrh	w0, [x19, 2]
-	add	x1, x20, :lo12:.LANCHOR138
+	add	x1, x20, :lo12:.LANCHOR137
 	orr	w0, w0, w22, lsl 10
 	str	w0, [x1, 4]
-	ldr	x0, [x24, #:lo12:.LANCHOR106]
+	ldr	x0, [x24, #:lo12:.LANCHOR105]
 	str	x21, [x1, 16]
 	str	x0, [x1, 8]
 	ldr	w1, [x19, 48]
@@ -5750,22 +5687,22 @@ Ftl_write_map_blk_to_last_page:
 	strh	w1, [x21, 8]
 	ldrh	w1, [x19, 4]
 	strh	w1, [x21]
-	adrp	x1, .LANCHOR20
+	adrp	x1, .LANCHOR19
 	strh	w22, [x21, 2]
-	ldrh	w2, [x1, #:lo12:.LANCHOR20]
+	ldrh	w2, [x1, #:lo12:.LANCHOR19]
 	mov	w1, 255
 	lsl	w2, w2, 3
 	bl	ftl_memset
 	ldrh	w4, [x19, 6]
 	mov	x0, 0
-	ldr	x3, [x24, #:lo12:.LANCHOR106]
+	ldr	x3, [x24, #:lo12:.LANCHOR105]
 	mov	w1, 0
-.L774:
+.L767:
 	cmp	w4, w0, uxth
-	bhi	.L776
-	add	x20, x20, :lo12:.LANCHOR138
-	adrp	x0, .LANCHOR23
-	ldrh	w1, [x0, #:lo12:.LANCHOR23]
+	bhi	.L769
+	add	x20, x20, :lo12:.LANCHOR137
+	adrp	x0, .LANCHOR22
+	ldrh	w1, [x0, #:lo12:.LANCHOR22]
 	ldr	x0, [x20, 8]
 	bl	js_hash
 	str	w0, [x21, 12]
@@ -5779,11 +5716,11 @@ Ftl_write_map_blk_to_last_page:
 	strh	w0, [x19, 2]
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-	b	.L773
-.L776:
+	b	.L766
+.L769:
 	ldr	w2, [x23, x0, lsl 2]
 	cmp	w22, w2, lsr 10
-	bne	.L775
+	bne	.L768
 	add	w1, w1, 1
 	and	w1, w1, 65535
 	ubfiz	x2, x1, 1, 16
@@ -5791,9 +5728,9 @@ Ftl_write_map_blk_to_last_page:
 	add	x2, x2, 1
 	ldr	w5, [x23, x0, lsl 2]
 	str	w5, [x3, x2, lsl 2]
-.L775:
+.L768:
 	add	x0, x0, 1
-	b	.L774
+	b	.L767
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
 	.section	.text.FtlMapWritePage,"ax",@progbits
 	.align	2
@@ -5803,61 +5740,61 @@ FtlMapWritePage:
 	stp	x29, x30, [sp, -112]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR88
+	adrp	x23, .LANCHOR87
 	stp	x25, x26, [sp, 64]
-	adrp	x24, .LANCHOR149
+	adrp	x24, .LANCHOR148
 	stp	x27, x28, [sp, 80]
-	adrp	x26, .LANCHOR20
+	adrp	x26, .LANCHOR19
 	stp	x19, x20, [sp, 16]
 	mov	w25, w1
 	mov	x19, x0
 	mov	x27, x2
-	add	x23, x23, :lo12:.LANCHOR88
-	add	x24, x24, :lo12:.LANCHOR149
-	add	x28, x26, :lo12:.LANCHOR20
+	add	x23, x23, :lo12:.LANCHOR87
+	add	x24, x24, :lo12:.LANCHOR148
+	add	x28, x26, :lo12:.LANCHOR19
 	stp	x21, x22, [sp, 32]
 	mov	w22, 0
-.L782:
+.L775:
 	ldr	w0, [x23]
 	ldrh	w1, [x19, 2]
 	add	w0, w0, 1
 	str	w0, [x23]
-	ldrh	w0, [x26, #:lo12:.LANCHOR20]
+	ldrh	w0, [x26, #:lo12:.LANCHOR19]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	bge	.L783
+	bge	.L776
 	ldrh	w1, [x19]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L784
-.L783:
+	bne	.L777
+.L776:
 	mov	x0, x19
 	bl	Ftl_write_map_blk_to_last_page
-.L784:
+.L777:
 	ldrh	w1, [x19]
 	ldr	x0, [x19, 16]
 	ldrh	w0, [x0, x1, lsl 1]
-	cbnz	w0, .L785
+	cbnz	w0, .L778
 	adrp	x0, .LC1
 	mov	w2, 700
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L785:
+.L778:
 	ldrh	w1, [x19]
 	ldrh	w0, [x19, 10]
 	cmp	w1, w0
-	bcc	.L786
+	bcc	.L779
 	adrp	x0, .LC1
 	mov	w2, 701
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L786:
+.L779:
 	ldrh	w1, [x19]
-	adrp	x21, .LANCHOR138
+	adrp	x21, .LANCHOR137
 	ldr	x0, [x19, 16]
-	add	x20, x21, :lo12:.LANCHOR138
+	add	x20, x21, :lo12:.LANCHOR137
 	mov	w2, 16
 	ldrh	w3, [x0, x1, lsl 1]
 	mov	w1, 0
@@ -5866,8 +5803,8 @@ FtlMapWritePage:
 	str	x27, [x20, 8]
 	orr	w0, w0, w3, lsl 10
 	str	w0, [x20, 4]
-	adrp	x0, .LANCHOR114
-	ldr	x0, [x0, #:lo12:.LANCHOR114]
+	adrp	x0, .LANCHOR113
+	ldr	x0, [x0, #:lo12:.LANCHOR113]
 	str	x0, [x20, 16]
 	bl	ftl_memset
 	ldr	x6, [x20, 16]
@@ -5876,10 +5813,10 @@ FtlMapWritePage:
 	str	w0, [x6, 4]
 	ldrh	w0, [x19, 4]
 	strh	w0, [x6]
-	adrp	x0, .LANCHOR23
+	adrp	x0, .LANCHOR22
 	strh	w3, [x6, 2]
 	strh	w25, [x6, 8]
-	ldrh	w1, [x0, #:lo12:.LANCHOR23]
+	ldrh	w1, [x0, #:lo12:.LANCHOR22]
 	ldr	x0, [x20, 8]
 	bl	js_hash
 	str	w0, [x6, 12]
@@ -5889,12 +5826,12 @@ FtlMapWritePage:
 	mov	w2, w3
 	bl	FlashProgPages
 	ldrh	w0, [x19, 2]
-	ldr	w1, [x21, #:lo12:.LANCHOR138]
+	ldr	w1, [x21, #:lo12:.LANCHOR137]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	strh	w0, [x19, 2]
 	cmn	w1, #1
-	bne	.L787
+	bne	.L780
 	ldr	w1, [x20, 4]
 	adrp	x0, .LC22
 	add	x0, x0, :lo12:.LC22
@@ -5903,37 +5840,37 @@ FtlMapWritePage:
 	bl	printf
 	ldrh	w0, [x19, 2]
 	cmp	w0, 2
-	bhi	.L788
+	bhi	.L781
 	ldrh	w0, [x28]
 	sub	w0, w0, #1
 	strh	w0, [x19, 2]
-.L788:
+.L781:
 	cmp	w22, 3
-	bls	.L789
-	add	x21, x21, :lo12:.LANCHOR138
+	bls	.L782
+	add	x21, x21, :lo12:.LANCHOR137
 	adrp	x0, .LC23
 	mov	w2, w22
 	add	x0, x0, :lo12:.LC23
 	ldr	w1, [x21, 4]
 	bl	printf
-.L790:
-	b	.L790
-.L789:
+.L783:
+	b	.L783
+.L782:
 	ldr	w0, [x19, 52]
-	cbz	w0, .L782
-.L804:
-	b	.L804
-.L787:
+	cbz	w0, .L775
+.L797:
+	b	.L797
+.L780:
 	cmp	w0, 1
-	beq	.L793
+	beq	.L786
 	cmp	w1, 256
-	beq	.L793
+	beq	.L786
 	ldr	w0, [x19, 56]
-	cbz	w0, .L794
-.L793:
+	cbz	w0, .L787
+.L786:
 	str	wzr, [x19, 56]
-	b	.L782
-.L794:
+	b	.L775
+.L787:
 	ldr	x0, [x19, 40]
 	ldr	w1, [x20, 4]
 	ldp	x21, x22, [sp, 32]
@@ -5954,42 +5891,42 @@ load_l2p_region:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR32
+	adrp	x24, .LANCHOR31
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 65535
 	stp	x21, x22, [sp, 32]
 	and	x19, x1, 65535
-	ldrh	w0, [x24, #:lo12:.LANCHOR32]
+	ldrh	w0, [x24, #:lo12:.LANCHOR31]
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
 	cmp	w0, w20
-	bcs	.L807
-	adrp	x1, .LANCHOR150
+	bcs	.L800
+	adrp	x1, .LANCHOR149
 	adrp	x0, .LC1
 	mov	w2, 485
-	add	x1, x1, :lo12:.LANCHOR150
+	add	x1, x1, :lo12:.LANCHOR149
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L807:
-	adrp	x27, .LANCHOR124
+.L800:
+	adrp	x27, .LANCHOR123
 	ubfiz	x0, x20, 2, 16
-	adrp	x22, .LANCHOR55
-	ldr	x1, [x27, #:lo12:.LANCHOR124]
+	adrp	x22, .LANCHOR54
+	ldr	x1, [x27, #:lo12:.LANCHOR123]
 	ldr	w23, [x1, x0]
-	cbnz	w23, .L808
-	ldr	x0, [x22, #:lo12:.LANCHOR55]
+	cbnz	w23, .L801
+	ldr	x0, [x22, #:lo12:.LANCHOR54]
 	lsl	x19, x19, 4
-	adrp	x1, .LANCHOR23
+	adrp	x1, .LANCHOR22
 	add	x0, x0, x19
-	ldrh	w2, [x1, #:lo12:.LANCHOR23]
+	ldrh	w2, [x1, #:lo12:.LANCHOR22]
 	mov	w1, 255
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	ldr	x0, [x22, #:lo12:.LANCHOR55]
+	ldr	x0, [x22, #:lo12:.LANCHOR54]
 	add	x1, x0, x19
 	strh	w20, [x0, x19]
 	str	wzr, [x1, 4]
-.L809:
+.L802:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -5998,26 +5935,26 @@ load_l2p_region:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L808:
-	ldr	x0, [x22, #:lo12:.LANCHOR55]
+.L801:
+	ldr	x0, [x22, #:lo12:.LANCHOR54]
 	lsl	x19, x19, 4
-	adrp	x26, .LANCHOR138
-	add	x21, x26, :lo12:.LANCHOR138
+	adrp	x26, .LANCHOR137
+	add	x21, x26, :lo12:.LANCHOR137
 	add	x0, x0, x19
 	mov	w2, 1
 	mov	w1, w2
 	str	w23, [x21, 4]
 	ldr	x0, [x0, 8]
 	str	x0, [x21, 8]
-	adrp	x0, .LANCHOR114
-	ldr	x0, [x0, #:lo12:.LANCHOR114]
+	adrp	x0, .LANCHOR113
+	ldr	x0, [x0, #:lo12:.LANCHOR113]
 	str	x0, [x21, 16]
 	mov	x0, x21
 	bl	FlashReadPages
 	ldr	x25, [x21, 16]
 	ldrh	w0, [x25, 8]
 	cmp	w0, w20
-	beq	.L810
+	beq	.L803
 	mov	w2, w23
 	mov	w1, w20
 	adrp	x0, .LC24
@@ -6029,45 +5966,45 @@ load_l2p_region:
 	mov	w2, w3
 	add	x0, x0, :lo12:.LC13
 	bl	rknand_print_hex
-	ldrh	w3, [x24, #:lo12:.LANCHOR32]
+	ldrh	w3, [x24, #:lo12:.LANCHOR31]
 	adrp	x0, .LC25
-	ldr	x1, [x27, #:lo12:.LANCHOR124]
+	ldr	x1, [x27, #:lo12:.LANCHOR123]
 	mov	w2, 4
 	add	x0, x0, :lo12:.LC25
 	bl	rknand_print_hex
-.L811:
+.L804:
 	ldrh	w0, [x25, 8]
 	cmp	w0, w20
-	beq	.L812
-	adrp	x1, .LANCHOR150
+	beq	.L805
+	adrp	x1, .LANCHOR149
 	adrp	x0, .LC1
 	mov	w2, 508
-	add	x1, x1, :lo12:.LANCHOR150
+	add	x1, x1, :lo12:.LANCHOR149
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L812:
-	ldr	x0, [x22, #:lo12:.LANCHOR55]
+.L805:
+	ldr	x0, [x22, #:lo12:.LANCHOR54]
 	add	x1, x0, x19
 	str	wzr, [x1, 4]
 	strh	w20, [x0, x19]
-	b	.L809
-.L810:
-	ldr	w0, [x26, #:lo12:.LANCHOR138]
+	b	.L802
+.L803:
+	ldr	w0, [x26, #:lo12:.LANCHOR137]
 	cmp	w0, 256
-	bne	.L811
+	bne	.L804
 	mov	w2, w23
 	mov	w1, w20
 	adrp	x0, .LC26
 	add	x0, x0, :lo12:.LC26
 	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR55]
+	ldr	x0, [x22, #:lo12:.LANCHOR54]
 	mov	w1, w20
 	add	x0, x0, x19
 	ldr	x2, [x0, 8]
-	adrp	x0, .LANCHOR129
-	add	x0, x0, :lo12:.LANCHOR129
+	adrp	x0, .LANCHOR128
+	add	x0, x0, :lo12:.LANCHOR128
 	bl	FtlMapWritePage
-	b	.L811
+	b	.L804
 	.size	load_l2p_region, .-load_l2p_region
 	.section	.text.ftl_map_blk_gc,"ax",@progbits
 	.align	2
@@ -6079,7 +6016,7 @@ ftl_map_blk_gc:
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR20
+	adrp	x24, .LANCHOR19
 	stp	x25, x26, [sp, 64]
 	stp	x21, x22, [sp, 32]
 	stp	x27, x28, [sp, 80]
@@ -6090,12 +6027,12 @@ ftl_map_blk_gc:
 	ldrh	w2, [x19, 8]
 	sub	w1, w1, #5
 	cmp	w2, w1
-	blt	.L815
+	blt	.L808
 	ubfiz	x0, x0, 1, 16
 	ldrh	w22, [x20, x0]
-	cbz	w22, .L815
+	cbz	w22, .L808
 	ldr	w1, [x19, 52]
-	cbnz	w1, .L815
+	cbnz	w1, .L808
 	mov	w1, 1
 	str	w1, [x19, 52]
 	strh	wzr, [x20, x0]
@@ -6103,33 +6040,33 @@ ftl_map_blk_gc:
 	ldrh	w1, [x19, 2]
 	sub	w0, w0, #1
 	strh	w0, [x19, 8]
-	ldrh	w0, [x24, #:lo12:.LANCHOR20]
+	ldrh	w0, [x24, #:lo12:.LANCHOR19]
 	cmp	w1, w0
-	bcc	.L816
+	bcc	.L809
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L816:
-	adrp	x26, .LANCHOR138
-	adrp	x23, .LANCHOR151
-	add	x27, x26, :lo12:.LANCHOR138
-	add	x23, x23, :lo12:.LANCHOR151
+.L809:
+	adrp	x26, .LANCHOR137
+	adrp	x23, .LANCHOR150
+	add	x27, x26, :lo12:.LANCHOR137
+	add	x23, x23, :lo12:.LANCHOR150
 	mov	w20, 0
-.L817:
+.L810:
 	ldrh	w0, [x19, 6]
 	cmp	w0, w20
-	bhi	.L824
+	bhi	.L817
 	mov	w1, 1
 	mov	w0, w22
 	bl	FtlFreeSysBlkQueueIn
 	str	wzr, [x19, 52]
-.L815:
+.L808:
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x24, #:lo12:.LANCHOR20]
+	ldrh	w0, [x24, #:lo12:.LANCHOR19]
 	cmp	w1, w0
-	bcc	.L825
+	bcc	.L818
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L825:
+.L818:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6138,55 +6075,55 @@ ftl_map_blk_gc:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L824:
+.L817:
 	ubfiz	x0, x20, 2, 16
 	add	x28, x25, x0
 	ldr	w1, [x25, x0]
 	cmp	w22, w1, lsr 10
-	bne	.L818
-	adrp	x2, .LANCHOR107
-	add	x0, x26, :lo12:.LANCHOR138
-	ldr	x2, [x2, #:lo12:.LANCHOR107]
+	bne	.L811
+	adrp	x2, .LANCHOR106
+	add	x0, x26, :lo12:.LANCHOR137
+	ldr	x2, [x2, #:lo12:.LANCHOR106]
 	str	x2, [x0, 8]
-	adrp	x2, .LANCHOR114
+	adrp	x2, .LANCHOR113
 	str	w1, [x0, 4]
-	ldr	x21, [x2, #:lo12:.LANCHOR114]
+	ldr	x21, [x2, #:lo12:.LANCHOR113]
 	mov	w2, 1
 	str	x21, [x0, 16]
 	mov	w1, w2
 	bl	FlashReadPages
 	ldrh	w0, [x21, 8]
 	cmp	w0, w20
-	beq	.L819
+	beq	.L812
 	adrp	x0, .LC1
 	mov	w2, 611
 	mov	x1, x23
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L819:
+.L812:
 	ldr	w0, [x27]
 	cmn	w0, #1
-	bne	.L820
-.L822:
+	bne	.L813
+.L815:
 	str	wzr, [x28]
-.L821:
-	b	.L821
-.L820:
+.L814:
+	b	.L814
+.L813:
 	ldrh	w0, [x21, 8]
 	cmp	w0, w20
-	bne	.L822
+	bne	.L815
 	ldrh	w1, [x21]
 	ldrh	w0, [x19, 4]
 	cmp	w1, w0
-	bne	.L822
+	bne	.L815
 	ldr	x2, [x27, 8]
 	mov	w1, w20
 	mov	x0, x19
 	bl	FtlMapWritePage
-.L818:
+.L811:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L817
+	b	.L810
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
 	.section	.text.flush_l2p_region,"ax",@progbits
 	.align	2
@@ -6196,16 +6133,16 @@ flush_l2p_region:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR55
+	adrp	x20, .LANCHOR54
 	ubfiz	x19, x0, 4, 16
-	ldr	x0, [x20, #:lo12:.LANCHOR55]
+	ldr	x0, [x20, #:lo12:.LANCHOR54]
 	add	x1, x0, x19
 	ldr	x2, [x1, 8]
 	ldrh	w1, [x0, x19]
-	adrp	x0, .LANCHOR129
-	add	x0, x0, :lo12:.LANCHOR129
+	adrp	x0, .LANCHOR128
+	add	x0, x0, :lo12:.LANCHOR128
 	bl	FtlMapWritePage
-	ldr	x0, [x20, #:lo12:.LANCHOR55]
+	ldr	x0, [x20, #:lo12:.LANCHOR54]
 	add	x0, x0, x19
 	ldp	x19, x20, [sp, 16]
 	ldr	w1, [x0, 4]
@@ -6223,32 +6160,32 @@ l2p_flush:
 	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR33
-	add	x20, x20, :lo12:.LANCHOR33
+	adrp	x20, .LANCHOR32
+	add	x20, x20, :lo12:.LANCHOR32
 	str	x21, [sp, 32]
 	mov	w19, 0
-	adrp	x21, .LANCHOR55
-.L834:
+	adrp	x21, .LANCHOR54
+.L827:
 	ldrh	w0, [x20]
 	cmp	w0, w19
-	bhi	.L836
+	bhi	.L829
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L836:
-	ldr	x1, [x21, #:lo12:.LANCHOR55]
+.L829:
+	ldr	x1, [x21, #:lo12:.LANCHOR54]
 	ubfiz	x0, x19, 4, 16
 	add	x0, x1, x0
 	ldr	w0, [x0, 4]
-	tbz	w0, #31, .L835
+	tbz	w0, #31, .L828
 	mov	w0, w19
 	bl	flush_l2p_region
-.L835:
+.L828:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L834
+	b	.L827
 	.size	l2p_flush, .-l2p_flush
 	.section	.text.log2phys,"ax",@progbits
 	.align	2
@@ -6259,108 +6196,108 @@ log2phys:
 	add	x29, sp, 0
 	stp	x25, x26, [sp, 64]
 	mov	w25, w0
-	adrp	x0, .LANCHOR22
+	adrp	x0, .LANCHOR21
 	stp	x23, x24, [sp, 48]
 	stp	x19, x20, [sp, 16]
 	mov	x20, x1
-	ldrh	w24, [x0, #:lo12:.LANCHOR22]
-	adrp	x0, .LANCHOR152
+	ldrh	w24, [x0, #:lo12:.LANCHOR21]
+	adrp	x0, .LANCHOR151
 	stp	x21, x22, [sp, 32]
 	mov	x19, x0
-	ldr	w1, [x0, #:lo12:.LANCHOR152]
+	ldr	w1, [x0, #:lo12:.LANCHOR151]
 	mov	w21, w2
 	cmp	w25, w1
-	bcc	.L839
-	adrp	x1, .LANCHOR153
+	bcc	.L832
+	adrp	x1, .LANCHOR152
 	adrp	x0, .LC1
 	mov	w2, 813
-	add	x1, x1, :lo12:.LANCHOR153
+	add	x1, x1, :lo12:.LANCHOR152
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L839:
-	ldr	w0, [x19, #:lo12:.LANCHOR152]
+.L832:
+	ldr	w0, [x19, #:lo12:.LANCHOR151]
 	cmp	w25, w0
-	bcs	.L840
-	adrp	x23, .LANCHOR55
+	bcs	.L833
+	adrp	x23, .LANCHOR54
 	add	w24, w24, 7
-	adrp	x0, .LANCHOR33
-	ldr	x2, [x23, #:lo12:.LANCHOR55]
+	adrp	x0, .LANCHOR32
+	ldr	x2, [x23, #:lo12:.LANCHOR54]
 	lsr	w22, w25, w24
 	and	w22, w22, 65535
-	ldrh	w1, [x0, #:lo12:.LANCHOR33]
+	ldrh	w1, [x0, #:lo12:.LANCHOR32]
 	mov	x0, 0
-.L841:
+.L834:
 	and	x19, x0, 65535
 	cmp	w19, w1
-	bcc	.L846
+	bcc	.L839
 	bl	select_l2p_ram_region
 	and	x19, x0, 65535
-	ldr	x2, [x23, #:lo12:.LANCHOR55]
+	ldr	x2, [x23, #:lo12:.LANCHOR54]
 	ubfiz	x1, x19, 4, 16
 	mov	w26, w0
 	add	x3, x2, x1
 	ldrh	w2, [x2, x1]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L847
+	beq	.L840
 	ldr	w1, [x3, 4]
-	tbz	w1, #31, .L847
+	tbz	w1, #31, .L840
 	bl	flush_l2p_region
-.L847:
+.L840:
 	mov	w1, w26
 	mov	w0, w22
 	bl	load_l2p_region
-	b	.L843
-.L840:
+	b	.L836
+.L833:
 	mov	w0, -1
-	cbnz	w21, .L838
+	cbnz	w21, .L831
 	str	w0, [x20]
-.L838:
+.L831:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L846:
+.L839:
 	add	x0, x0, 1
 	add	x3, x2, x0, lsl 4
 	ldrh	w3, [x3, -16]
 	cmp	w3, w22
-	bne	.L841
-.L843:
+	bne	.L834
+.L836:
 	mov	x0, 1
-	ldr	x1, [x23, #:lo12:.LANCHOR55]
+	ldr	x1, [x23, #:lo12:.LANCHOR54]
 	lsl	x0, x0, x24
 	sub	w0, w0, #1
 	and	w0, w0, w25
 	and	x0, x0, 65535
 	add	x1, x1, x19, lsl 4
-	cbnz	w21, .L844
+	cbnz	w21, .L837
 	ldr	x1, [x1, 8]
 	ldr	w0, [x1, x0, lsl 2]
 	str	w0, [x20]
-.L845:
-	ldr	x0, [x23, #:lo12:.LANCHOR55]
+.L838:
+	ldr	x0, [x23, #:lo12:.LANCHOR54]
 	add	x19, x0, x19, lsl 4
 	ldr	w0, [x19, 4]
 	cmn	w0, #1
-	beq	.L849
+	beq	.L842
 	add	w0, w0, 1
 	str	w0, [x19, 4]
-.L849:
+.L842:
 	mov	w0, 0
-	b	.L838
-.L844:
+	b	.L831
+.L837:
 	ldr	x2, [x1, 8]
 	ldr	w3, [x20]
 	str	w3, [x2, x0, lsl 2]
 	ldr	w0, [x1, 4]
 	orr	w0, w0, -2147483648
 	str	w0, [x1, 4]
-	adrp	x0, .LANCHOR56
-	strh	w22, [x0, #:lo12:.LANCHOR56]
-	b	.L845
+	adrp	x0, .LANCHOR55
+	strh	w22, [x0, #:lo12:.LANCHOR55]
+	b	.L838
 	.size	log2phys, .-log2phys
 	.section	.text.FtlReUsePrevPpa,"ax",@progbits
 	.align	2
@@ -6370,60 +6307,60 @@ FtlReUsePrevPpa:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR42
+	adrp	x22, .LANCHOR41
 	stp	x19, x20, [sp, 16]
 	mov	w21, w0
 	str	w1, [x29, 76]
 	lsr	w0, w1, 10
 	str	x23, [sp, 48]
 	bl	P2V_block_in_plane
-	ldr	x2, [x22, #:lo12:.LANCHOR42]
+	ldr	x2, [x22, #:lo12:.LANCHOR41]
 	and	w3, w0, 65535
 	ubfiz	x20, x3, 1, 16
 	ldrh	w1, [x2, x20]
-	cbnz	w1, .L853
-	adrp	x0, .LANCHOR46
-	ldr	x19, [x0, #:lo12:.LANCHOR46]
-	cbz	x19, .L854
-	adrp	x2, .LANCHOR40
+	cbnz	w1, .L846
+	adrp	x0, .LANCHOR45
+	ldr	x19, [x0, #:lo12:.LANCHOR45]
+	cbz	x19, .L847
+	adrp	x2, .LANCHOR39
 	mov	x5, -6148914691236517206
 	movk	x5, 0xaaab, lsl 0
-	adrp	x23, .LANCHOR48
-	ldr	x2, [x2, #:lo12:.LANCHOR40]
+	adrp	x23, .LANCHOR47
+	ldr	x2, [x2, #:lo12:.LANCHOR39]
 	mov	w6, 65535
-	ldrh	w4, [x23, #:lo12:.LANCHOR48]
+	ldrh	w4, [x23, #:lo12:.LANCHOR47]
 	sub	x19, x19, x2
 	asr	x19, x19, 1
 	mul	x19, x19, x5
 	mov	w5, 6
 	and	w19, w19, 65535
-.L855:
+.L848:
 	cmp	w1, w4
-	beq	.L854
+	beq	.L847
 	cmp	w19, w3
-	bne	.L856
+	bne	.L849
 	mov	w1, w19
-	add	x0, x0, :lo12:.LANCHOR46
+	add	x0, x0, :lo12:.LANCHOR45
 	bl	List_remove_node
-	ldrh	w0, [x23, #:lo12:.LANCHOR48]
-	cbnz	w0, .L857
-	adrp	x1, .LANCHOR154
+	ldrh	w0, [x23, #:lo12:.LANCHOR47]
+	cbnz	w0, .L850
+	adrp	x1, .LANCHOR153
 	adrp	x0, .LC1
-	mov	w2, 1733
-	add	x1, x1, :lo12:.LANCHOR154
+	mov	w2, 1735
+	add	x1, x1, :lo12:.LANCHOR153
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L857:
-	ldrh	w0, [x23, #:lo12:.LANCHOR48]
+.L850:
+	ldrh	w0, [x23, #:lo12:.LANCHOR47]
 	sub	w0, w0, #1
-	strh	w0, [x23, #:lo12:.LANCHOR48]
+	strh	w0, [x23, #:lo12:.LANCHOR47]
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-	ldr	x1, [x22, #:lo12:.LANCHOR42]
+	ldr	x1, [x22, #:lo12:.LANCHOR41]
 	ldrh	w0, [x1, x20]
 	add	w0, w0, 1
 	strh	w0, [x1, x20]
-.L854:
+.L847:
 	add	x1, x29, 76
 	mov	w2, 1
 	mov	w0, w21
@@ -6433,18 +6370,18 @@ FtlReUsePrevPpa:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L856:
+.L849:
 	umull	x19, w19, w5
 	ldrh	w19, [x2, x19]
 	cmp	w19, w6
-	beq	.L854
+	beq	.L847
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L855
-.L853:
+	b	.L848
+.L846:
 	add	w1, w1, 1
 	strh	w1, [x2, x20]
-	b	.L854
+	b	.L847
 	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
 	.section	.text.FtlRecoverySuperblock,"ax",@progbits
 	.align	2
@@ -6462,19 +6399,19 @@ FtlRecoverySuperblock:
 	stp	x25, x26, [sp, 64]
 	cmp	w0, w1
 	stp	x27, x28, [sp, 80]
-	beq	.L990
+	beq	.L983
 	ldrb	w0, [x19, 6]
 	str	w0, [x29, 164]
-	adrp	x0, .LANCHOR19
+	adrp	x0, .LANCHOR18
 	ldrh	w26, [x19, 2]
 	str	x0, [x29, 128]
-	ldrh	w2, [x0, #:lo12:.LANCHOR19]
+	ldrh	w2, [x0, #:lo12:.LANCHOR18]
 	cmp	w2, w26
-	bne	.L866
+	bne	.L859
 	strh	wzr, [x19, 4]
-.L997:
-	strb	wzr, [x19, 6]
 .L990:
+	strb	wzr, [x19, 6]
+.L983:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -6483,116 +6420,116 @@ FtlRecoverySuperblock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L866:
+.L859:
 	ldrh	w0, [x19, 16]
 	mov	w20, 0
-.L867:
+.L860:
 	cmp	w0, w1
-	beq	.L868
+	beq	.L861
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
 	mov	w23, w0
 	cmn	w0, #1
-	beq	.L869
-	adrp	x1, .LANCHOR64
-	adrp	x2, .LANCHOR3
-	adrp	x20, .LANCHOR103
+	beq	.L862
+	adrp	x1, .LANCHOR63
+	adrp	x2, .LANCHOR2
+	adrp	x20, .LANCHOR102
 	add	x4, x19, 16
-	ldr	x5, [x1, #:lo12:.LANCHOR64]
-	adrp	x1, .LANCHOR23
-	ldr	x0, [x20, #:lo12:.LANCHOR103]
+	ldr	x5, [x1, #:lo12:.LANCHOR63]
+	adrp	x1, .LANCHOR22
+	ldr	x0, [x20, #:lo12:.LANCHOR102]
 	mov	w22, 0
-	ldrh	w6, [x1, #:lo12:.LANCHOR23]
-	adrp	x1, .LANCHOR65
+	ldrh	w6, [x1, #:lo12:.LANCHOR22]
+	adrp	x1, .LANCHOR64
 	mov	w10, 65535
 	str	x2, [x29, 152]
-	ldr	x7, [x1, #:lo12:.LANCHOR65]
-	adrp	x1, .LANCHOR24
-	ldrh	w8, [x1, #:lo12:.LANCHOR24]
+	ldr	x7, [x1, #:lo12:.LANCHOR64]
+	adrp	x1, .LANCHOR23
+	ldrh	w8, [x1, #:lo12:.LANCHOR23]
 	add	x1, x19, 16
 	str	x1, [x29, 168]
-	ldrh	w1, [x2, #:lo12:.LANCHOR3]
+	ldrh	w1, [x2, #:lo12:.LANCHOR2]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.L870:
+.L863:
 	cmp	x4, x1
-	bne	.L874
+	bne	.L867
 	mov	w2, 0
 	mov	w1, w22
 	bl	FlashReadPages
-	adrp	x0, .LANCHOR83
-	ldr	x4, [x20, #:lo12:.LANCHOR103]
+	adrp	x0, .LANCHOR82
+	ldr	x4, [x20, #:lo12:.LANCHOR102]
 	and	w10, w23, 65535
-	add	x7, x0, :lo12:.LANCHOR83
-	ldr	w21, [x0, #:lo12:.LANCHOR83]
+	add	x7, x0, :lo12:.LANCHOR82
+	ldr	w21, [x0, #:lo12:.LANCHOR82]
 	mov	x11, x4
 	mov	w6, 65535
 	mov	w3, 0
 	sub	w21, w21, #1
 	str	x0, [x29, 144]
-.L875:
+.L868:
 	cmp	w22, w3
-	bne	.L880
+	bne	.L873
 	add	w22, w23, 1
 	ldr	w0, [x4, 4]
 	and	w22, w22, 65535
-.L992:
+.L985:
 	lsr	w0, w0, 10
 	bl	P2V_plane
 	and	w27, w0, 65535
 	ldr	x0, [x29, 128]
-	ldrh	w0, [x0, #:lo12:.LANCHOR19]
+	ldrh	w0, [x0, #:lo12:.LANCHOR18]
 	cmp	w0, w22
-	bne	.L882
+	bne	.L875
 	strh	w22, [x19, 2]
 	strb	wzr, [x19, 6]
 	strh	wzr, [x19, 4]
-.L882:
+.L875:
 	ldr	w0, [x29, 164]
 	cmp	w22, w26
 	cset	w1, eq
 	cmp	w27, w0
 	cset	w0, eq
 	tst	w1, w0
-	beq	.L883
-.L998:
+	beq	.L876
+.L991:
 	mov	w2, w27
 	mov	w1, w22
 	mov	x0, x19
 	bl	ftl_sb_update_avl_pages
-	b	.L990
-.L868:
+	b	.L983
+.L861:
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	add	x0, x19, x20, sxtw 1
 	ldrh	w0, [x0, 16]
-	b	.L867
-.L869:
-	cbz	w26, .L871
-	adrp	x1, .LANCHOR155
+	b	.L860
+.L862:
+	cbz	w26, .L864
+	adrp	x1, .LANCHOR154
 	adrp	x0, .LC1
-	mov	w2, 1800
-	add	x1, x1, :lo12:.LANCHOR155
+	mov	w2, 1802
+	add	x1, x1, :lo12:.LANCHOR154
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L871:
+.L864:
 	ldr	w0, [x29, 164]
 	cmp	w0, 0
 	ccmp	w20, w0, 4, ne
-	beq	.L872
-	adrp	x1, .LANCHOR155
+	beq	.L865
+	adrp	x1, .LANCHOR154
 	adrp	x0, .LC1
-	mov	w2, 1801
-	add	x1, x1, :lo12:.LANCHOR155
+	mov	w2, 1803
+	add	x1, x1, :lo12:.LANCHOR154
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L872:
+.L865:
 	strh	wzr, [x19, 2]
-	b	.L997
-.L874:
+	b	.L990
+.L867:
 	ldrh	w3, [x4]
 	cmp	w3, w10
-	beq	.L873
+	beq	.L866
 	ubfiz	x2, x22, 5, 16
 	orr	w3, w23, w3, lsl 10
 	add	x2, x0, x2
@@ -6607,90 +6544,90 @@ FtlRecoverySuperblock:
 	asr	w3, w3, 2
 	add	x3, x7, x3, sxtw 2
 	str	x3, [x2, 16]
-.L873:
+.L866:
 	add	x4, x4, 2
-	b	.L870
-.L880:
+	b	.L863
+.L873:
 	ldr	w0, [x11]
-	cbnz	w0, .L876
+	cbnz	w0, .L869
 	ldr	x8, [x11, 16]
 	ldr	w5, [x8, 4]
 	cmn	w5, #1
-	beq	.L877
+	beq	.L870
 	ldr	w1, [x7]
 	mov	w0, w5
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L877
+	cbz	w0, .L870
 	add	w5, w5, 1
 	str	w5, [x7]
-.L877:
+.L870:
 	ldr	w0, [x8]
 	cmn	w0, #1
-	bne	.L879
+	bne	.L872
 	ubfiz	x3, x3, 5, 16
 	and	w22, w23, 65535
 	add	x3, x4, x3
 	ldr	w0, [x3, 4]
-	b	.L992
-.L876:
+	b	.L985
+.L869:
 	mov	w6, w10
-.L879:
+.L872:
 	add	w3, w3, 1
 	add	x11, x11, 32
 	and	w3, w3, 65535
-	b	.L875
-.L883:
+	b	.L868
+.L876:
 	mov	w0, 65535
 	cmp	w6, w0
-	bne	.L884
+	bne	.L877
 	ldrb	w0, [x19, 8]
-	cbnz	w0, .L885
-.L884:
-	adrp	x25, .LANCHOR134
+	cbnz	w0, .L878
+.L877:
+	adrp	x25, .LANCHOR133
 	and	w28, w23, 65535
-	ldr	w0, [x25, #:lo12:.LANCHOR134]
+	ldr	w0, [x25, #:lo12:.LANCHOR133]
 	cmn	w0, #1
-	bne	.L886
-	str	w21, [x25, #:lo12:.LANCHOR134]
-.L886:
+	bne	.L879
+	str	w21, [x25, #:lo12:.LANCHOR133]
+.L879:
 	add	w0, w26, 7
 	cmp	w0, w23, uxth
-	bge	.L936
+	bge	.L929
 	sub	w24, w28, #7
 	and	w24, w24, 65535
-.L887:
+.L880:
 	ldr	x0, [x29, 152]
 	mov	w3, 65535
 	mov	w5, 1
-	add	x4, x0, :lo12:.LANCHOR3
-.L888:
+	add	x4, x0, :lo12:.LANCHOR2
+.L881:
 	cmp	w24, w28
-	bhi	.L898
+	bhi	.L891
 	ldrh	w1, [x4]
 	mov	w23, 0
-	ldr	x0, [x20, #:lo12:.LANCHOR103]
+	ldr	x0, [x20, #:lo12:.LANCHOR102]
 	add	x1, x1, 8
 	ldr	x2, [x29, 168]
 	add	x1, x19, x1, lsl 1
-	b	.L899
-.L936:
+	b	.L892
+.L929:
 	mov	w24, w26
-	b	.L887
-.L890:
+	b	.L880
+.L883:
 	ldrh	w6, [x2]
 	cmp	w6, w3
-	beq	.L889
+	beq	.L882
 	ubfiz	x7, x23, 5, 16
 	add	w23, w23, 1
 	add	x7, x0, x7
 	and	w23, w23, 65535
 	orr	w6, w24, w6, lsl 10
 	str	w6, [x7, 4]
-.L889:
+.L882:
 	add	x2, x2, 2
-.L899:
+.L892:
 	cmp	x1, x2
-	bne	.L890
+	bne	.L883
 	mov	w1, w23
 	mov	w2, 0
 	str	w5, [x29, 112]
@@ -6699,114 +6636,114 @@ FtlRecoverySuperblock:
 	add	x23, x23, 16
 	str	x4, [x29, 136]
 	bl	FlashReadPages
-	ldr	x2, [x20, #:lo12:.LANCHOR103]
-	ldr	w1, [x25, #:lo12:.LANCHOR134]
+	ldr	x2, [x20, #:lo12:.LANCHOR102]
+	ldr	w1, [x25, #:lo12:.LANCHOR133]
 	ldr	w5, [x29, 112]
 	add	x0, x2, 16
 	ldr	w3, [x29, 120]
 	add	x23, x2, x23
 	ldr	x4, [x29, 136]
 	mov	w2, 0
-.L891:
+.L884:
 	cmp	x23, x0
-	bne	.L896
-	cbz	w2, .L897
-	str	w1, [x25, #:lo12:.LANCHOR134]
-.L897:
+	bne	.L889
+	cbz	w2, .L890
+	str	w1, [x25, #:lo12:.LANCHOR133]
+.L890:
 	add	w24, w24, 1
 	and	w24, w24, 65535
-	b	.L888
-.L896:
+	b	.L881
+.L889:
 	ldr	w6, [x0, -16]
-	cbz	w6, .L892
-	cbz	w2, .L885
-	str	w1, [x25, #:lo12:.LANCHOR134]
-.L885:
-	adrp	x0, .LANCHOR156
+	cbz	w6, .L885
+	cbz	w2, .L878
+	str	w1, [x25, #:lo12:.LANCHOR133]
+.L878:
+	adrp	x0, .LANCHOR155
 	mov	w23, w26
 	mov	w1, 1
-	adrp	x28, .LANCHOR134
-	strh	w1, [x0, #:lo12:.LANCHOR156]
-	add	x0, x28, :lo12:.LANCHOR134
+	adrp	x28, .LANCHOR133
+	strh	w1, [x0, #:lo12:.LANCHOR155]
+	add	x0, x28, :lo12:.LANCHOR133
 	str	x0, [x29, 104]
-.L900:
+.L893:
 	ldr	x1, [x29, 152]
 	mov	w24, 0
-	ldr	x0, [x20, #:lo12:.LANCHOR103]
+	ldr	x0, [x20, #:lo12:.LANCHOR102]
 	mov	w5, 65535
 	ldr	x2, [x29, 168]
-	ldrh	w1, [x1, #:lo12:.LANCHOR3]
+	ldrh	w1, [x1, #:lo12:.LANCHOR2]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.L901:
+.L894:
 	cmp	x1, x2
-	bne	.L903
+	bne	.L896
 	mov	w2, 0
 	mov	w1, w24
 	bl	FlashReadPages
 	mov	x25, 0
 	ubfiz	x0, x24, 5, 16
 	str	x0, [x29, 112]
-	adrp	x0, .LANCHOR157
-	add	x0, x0, :lo12:.LANCHOR157
+	adrp	x0, .LANCHOR156
+	add	x0, x0, :lo12:.LANCHOR156
 	str	x0, [x29, 120]
-.L904:
+.L897:
 	ldr	x0, [x29, 112]
 	cmp	x25, x0
-	bne	.L930
+	bne	.L923
 	ldr	x0, [x29, 128]
 	add	w23, w23, 1
 	and	w23, w23, 65535
-	ldrh	w0, [x0, #:lo12:.LANCHOR19]
+	ldrh	w0, [x0, #:lo12:.LANCHOR18]
 	cmp	w0, w23
-	bne	.L900
+	bne	.L893
 	ldr	x0, [x29, 152]
 	mov	w2, 65535
 	strh	w23, [x19, 2]
 	strh	wzr, [x19, 4]
-	ldrh	w1, [x0, #:lo12:.LANCHOR3]
+	ldrh	w1, [x0, #:lo12:.LANCHOR2]
 	mov	w0, 0
-.L931:
+.L924:
 	cmp	w0, w1
-	beq	.L990
+	beq	.L983
 	ldr	x4, [x29, 168]
 	ldrh	w3, [x4], 2
 	str	x4, [x29, 168]
 	cmp	w3, w2
-	beq	.L932
+	beq	.L925
 	strb	w0, [x19, 6]
-	b	.L990
-.L892:
+	b	.L983
+.L885:
 	ldr	x6, [x0]
 	ldrh	w7, [x6]
 	cmp	w7, w3
-	beq	.L895
+	beq	.L888
 	ldr	w6, [x6, 4]
 	cmn	w6, #1
 	csel	w1, w1, w6, eq
 	csel	w2, w2, w5, eq
-.L895:
+.L888:
 	add	x0, x0, 32
-	b	.L891
-.L898:
+	b	.L884
+.L891:
 	mov	w0, -1
-	str	w0, [x25, #:lo12:.LANCHOR134]
-	b	.L885
-.L903:
+	str	w0, [x25, #:lo12:.LANCHOR133]
+	b	.L878
+.L896:
 	ldrh	w3, [x2]
 	cmp	w3, w5
-	beq	.L902
+	beq	.L895
 	ubfiz	x4, x24, 5, 16
 	add	w24, w24, 1
 	add	x4, x0, x4
 	and	w24, w24, 65535
 	orr	w3, w23, w3, lsl 10
 	str	w3, [x4, 4]
-.L902:
+.L895:
 	add	x2, x2, 2
-	b	.L901
-.L930:
-	ldr	x4, [x20, #:lo12:.LANCHOR103]
+	b	.L894
+.L923:
+	ldr	x4, [x20, #:lo12:.LANCHOR102]
 	add	x4, x4, x25
 	ldr	w5, [x4, 4]
 	str	w5, [x29, 188]
@@ -6814,54 +6751,54 @@ FtlRecoverySuperblock:
 	bl	P2V_plane
 	and	w0, w0, 65535
 	cmp	w23, w26
-	bcc	.L905
+	bcc	.L898
 	ldr	w1, [x29, 164]
 	ccmp	w1, w0, 0, eq
-	bhi	.L905
+	bhi	.L898
 	cmp	w23, w22
 	ccmp	w27, w0, 0, eq
-	beq	.L906
+	beq	.L899
 	ldr	w0, [x4]
 	cmn	w0, #1
-	beq	.L907
+	beq	.L900
 	ldr	x3, [x4, 16]
 	mov	w0, 61589
 	ldrh	w1, [x3]
 	cmp	w1, w0
-	beq	.L908
+	beq	.L901
 	ldrh	w0, [x19]
-.L994:
+.L987:
 	bl	decrement_vpc_count
-	b	.L905
-.L908:
+	b	.L898
+.L901:
 	ldr	w21, [x3, 4]
 	cmn	w21, #1
-	beq	.L909
+	beq	.L902
 	ldr	x0, [x29, 144]
-	ldr	w1, [x0, #:lo12:.LANCHOR83]
+	ldr	w1, [x0, #:lo12:.LANCHOR82]
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L909
+	cbz	w0, .L902
 	ldr	x1, [x29, 144]
 	add	w0, w21, 1
-	str	w0, [x1, #:lo12:.LANCHOR83]
-.L909:
+	str	w0, [x1, #:lo12:.LANCHOR82]
+.L902:
 	ldp	w24, w0, [x3, 8]
 	add	x1, x29, 184
 	str	w0, [x29, 180]
 	mov	w2, 0
 	mov	w0, w24
 	bl	log2phys
-	ldr	w1, [x28, #:lo12:.LANCHOR134]
+	ldr	w1, [x28, #:lo12:.LANCHOR133]
 	ldr	w3, [x29, 180]
 	cmn	w1, #1
-	beq	.L910
+	beq	.L903
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L910
+	cbz	w0, .L903
 	cmn	w3, #1
-	beq	.L911
-	ldr	x0, [x20, #:lo12:.LANCHOR103]
+	beq	.L904
+	ldr	x0, [x20, #:lo12:.LANCHOR102]
 	mov	w2, 0
 	mov	w1, 1
 	add	x0, x0, x25
@@ -6869,80 +6806,80 @@ FtlRecoverySuperblock:
 	str	w3, [x0, 4]
 	str	x4, [x29, 136]
 	bl	FlashReadPages
-	ldr	x0, [x20, #:lo12:.LANCHOR103]
+	ldr	x0, [x20, #:lo12:.LANCHOR102]
 	ldr	x4, [x29, 136]
 	add	x3, x0, x25
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	bne	.L912
-.L913:
+	bne	.L905
+.L906:
 	mov	w0, -1
 	str	w0, [x29, 180]
-.L920:
+.L913:
 	ldr	w3, [x29, 180]
 	cmn	w3, #1
-	beq	.L905
-.L935:
+	beq	.L898
+.L928:
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
 	and	w24, w0, 65535
-	adrp	x0, .LANCHOR5
+	adrp	x0, .LANCHOR4
 	mov	w3, w24
-	ldrh	w0, [x0, #:lo12:.LANCHOR5]
+	ldrh	w0, [x0, #:lo12:.LANCHOR4]
 	cmp	w0, w24
-	bhi	.L926
-	mov	w2, 2057
-	adrp	x1, .LANCHOR155
+	bhi	.L919
+	mov	w2, 2059
+	adrp	x1, .LANCHOR154
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR155
+	add	x1, x1, :lo12:.LANCHOR154
 	add	x0, x0, :lo12:.LC1
 	str	w24, [x29, 136]
 	bl	printf
 	ldr	w3, [x29, 136]
-.L926:
-	adrp	x1, .LANCHOR42
+.L919:
+	adrp	x1, .LANCHOR41
 	ubfiz	x0, x24, 1, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR42]
+	ldr	x1, [x1, #:lo12:.LANCHOR41]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L927
+	cbz	w0, .L920
 	mov	w0, w3
-	b	.L994
-.L911:
+	b	.L987
+.L904:
 	ldp	w1, w0, [x29, 184]
 	cmp	w1, w0
-	bne	.L905
+	bne	.L898
 	mov	w2, 1
 	add	x1, x29, 180
 	mov	w0, w24
 	bl	log2phys
-.L905:
+.L898:
 	add	x25, x25, 32
-	b	.L904
-.L912:
+	b	.L897
+.L905:
 	ldr	w0, [x4, 8]
 	cmp	w24, w0
-	bne	.L913
+	bne	.L906
 	ldr	w0, [x4, 4]
 	str	w0, [x29, 136]
 	str	x4, [x29, 96]
 	uxtw	x1, w0
-	ldr	w0, [x28, #:lo12:.LANCHOR134]
+	ldr	w0, [x28, #:lo12:.LANCHOR133]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L913
+	cbz	w0, .L906
 	ldp	w0, w1, [x29, 184]
 	ldr	x4, [x29, 96]
 	cmp	w0, w1
 	ldr	w1, [x29, 180]
-	bne	.L915
-.L993:
+	bne	.L908
+.L986:
 	mov	w0, w24
 	bl	FtlReUsePrevPpa
-	b	.L913
-.L915:
+	b	.L906
+.L908:
 	cmp	w0, w1
-	beq	.L913
+	beq	.L906
 	cmn	w0, #1
-	beq	.L916
+	beq	.L909
 	ldr	x4, [x3, 16]
 	mov	w2, 0
 	str	w0, [x3, 4]
@@ -6951,128 +6888,128 @@ FtlRecoverySuperblock:
 	mov	x0, x3
 	bl	FlashReadPages
 	ldr	x4, [x29, 96]
-.L917:
-	ldr	x0, [x20, #:lo12:.LANCHOR103]
+.L910:
+	ldr	x0, [x20, #:lo12:.LANCHOR102]
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	beq	.L918
+	beq	.L911
 	ldr	x0, [x29, 104]
 	ldr	w3, [x4, 4]
 	mov	w1, w3
 	ldr	w0, [x0]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L918
+	cbz	w0, .L911
 	ldr	w0, [x29, 136]
 	mov	w1, w3
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L913
-.L918:
+	cbz	w0, .L906
+.L911:
 	ldr	w1, [x29, 180]
-	b	.L993
-.L916:
+	b	.L986
+.L909:
 	str	w0, [x3]
-	b	.L917
-.L910:
+	b	.L910
+.L903:
 	ldp	w1, w0, [x29, 184]
 	cmp	w1, w0
-	beq	.L920
+	beq	.L913
 	cmn	w3, #1
-	beq	.L922
-	adrp	x0, .LANCHOR8
-	ldr	w0, [x0, #:lo12:.LANCHOR8]
+	beq	.L915
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
 	cmp	w0, w3, lsr 10
-	bhi	.L922
+	bhi	.L915
 	adrp	x0, .LC27
 	mov	w1, w3
 	add	x0, x0, :lo12:.LC27
-.L996:
+.L989:
 	bl	printf
-	b	.L905
-.L922:
+	b	.L898
+.L915:
 	mov	w2, 1
 	add	x1, x29, 188
 	mov	w0, w24
 	bl	log2phys
 	ldr	w3, [x29, 184]
 	cmn	w3, #1
-	beq	.L920
+	beq	.L913
 	ldr	w0, [x29, 180]
 	cmp	w3, w0
-	beq	.L935
+	beq	.L928
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
-	adrp	x1, .LANCHOR51
+	adrp	x1, .LANCHOR50
 	and	w0, w0, 65535
+	ldrh	w1, [x1, #:lo12:.LANCHOR50]
+	cmp	w1, w0
+	beq	.L918
+	adrp	x1, .LANCHOR51
 	ldrh	w1, [x1, #:lo12:.LANCHOR51]
 	cmp	w1, w0
-	beq	.L925
+	beq	.L918
 	adrp	x1, .LANCHOR52
 	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	beq	.L925
-	adrp	x1, .LANCHOR53
-	ldrh	w1, [x1, #:lo12:.LANCHOR53]
-	cmp	w1, w0
-	bne	.L920
-.L925:
-	ldr	x0, [x20, #:lo12:.LANCHOR103]
+	bne	.L913
+.L918:
+	ldr	x0, [x20, #:lo12:.LANCHOR102]
 	mov	w2, 0
 	mov	w1, 1
 	ldr	x4, [x0, 16]
 	str	w3, [x0, 4]
 	str	x4, [x29, 136]
 	bl	FlashReadPages
-	ldr	x0, [x20, #:lo12:.LANCHOR103]
+	ldr	x0, [x20, #:lo12:.LANCHOR102]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L920
+	beq	.L913
 	ldr	x4, [x29, 136]
 	mov	w0, w21
 	ldr	w1, [x4, 4]
 	bl	ftl_cmp_data_ver
-	cbnz	w0, .L920
+	cbnz	w0, .L913
 	mov	w2, 1
 	add	x1, x29, 184
 	mov	w0, w24
 	bl	log2phys
-	b	.L920
-.L927:
+	b	.L913
+.L920:
 	adrp	x0, .LC28
 	mov	w1, w24
 	add	x0, x0, :lo12:.LC28
-	b	.L996
-.L907:
+	b	.L989
+.L900:
 	ldr	x0, [x29, 120]
 	ldr	w0, [x0]
 	cmp	w0, 31
-	bhi	.L928
-	adrp	x1, .LANCHOR158
-	add	x1, x1, :lo12:.LANCHOR158
+	bhi	.L921
+	adrp	x1, .LANCHOR157
+	add	x1, x1, :lo12:.LANCHOR157
 	str	w5, [x1, w0, uxtw 2]
 	add	w0, w0, 1
 	ldr	x1, [x29, 120]
 	str	w0, [x1]
-.L928:
+.L921:
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-	ldr	w0, [x28, #:lo12:.LANCHOR134]
+	ldr	w0, [x28, #:lo12:.LANCHOR133]
 	cmn	w0, #1
-	bne	.L929
-.L995:
-	str	w21, [x28, #:lo12:.LANCHOR134]
-	b	.L905
-.L929:
+	bne	.L922
+.L988:
+	str	w21, [x28, #:lo12:.LANCHOR133]
+	b	.L898
+.L922:
 	cmp	w21, w0
-	bcs	.L905
-	b	.L995
-.L932:
+	bcs	.L898
+	b	.L988
+.L925:
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L931
-.L906:
+	b	.L924
+.L899:
 	strb	w27, [x19, 6]
 	strh	w22, [x19, 2]
-	b	.L998
+	b	.L991
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
 	.section	.text.ftl_check_vpc,"ax",@progbits
 	.align	2
@@ -7084,15 +7021,15 @@ ftl_check_vpc:
 	add	x0, x0, :lo12:.LC29
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR152
-	add	x23, x23, :lo12:.LANCHOR152
+	adrp	x23, .LANCHOR151
+	add	x23, x23, :lo12:.LANCHOR151
 	stp	x21, x22, [sp, 32]
 	mov	w22, 0
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
-	adrp	x21, .LANCHOR159
+	adrp	x21, .LANCHOR158
 	stp	x27, x28, [sp, 80]
-	add	x1, x21, :lo12:.LANCHOR159
+	add	x1, x21, :lo12:.LANCHOR158
 	adrp	x20, check_vpc_table
 	bl	printf
 	add	x19, x20, :lo12:check_vpc_table
@@ -7100,35 +7037,35 @@ ftl_check_vpc:
 	mov	w1, 0
 	mov	x0, x19
 	bl	ftl_memset
-.L1000:
+.L993:
 	ldr	w0, [x23]
 	cmp	w22, w0
-	bcc	.L1002
-	adrp	x22, .LANCHOR5
+	bcc	.L995
+	adrp	x22, .LANCHOR4
 	adrp	x24, .LC30
-	add	x22, x22, :lo12:.LANCHOR5
+	add	x22, x22, :lo12:.LANCHOR4
 	add	x26, x20, :lo12:check_vpc_table
 	add	x24, x24, :lo12:.LC30
 	mov	w23, 0
 	mov	w19, 0
-	adrp	x25, .LANCHOR42
-.L1003:
+	adrp	x25, .LANCHOR41
+.L996:
 	ldrh	w0, [x22]
 	cmp	w0, w19
-	bhi	.L1005
-	adrp	x0, .LANCHOR46
-	ldr	x19, [x0, #:lo12:.LANCHOR46]
-	cbz	x19, .L1006
-	adrp	x0, .LANCHOR48
+	bhi	.L998
+	adrp	x0, .LANCHOR45
+	ldr	x19, [x0, #:lo12:.LANCHOR45]
+	cbz	x19, .L999
+	adrp	x0, .LANCHOR47
 	adrp	x25, .LC31
 	add	x20, x20, :lo12:check_vpc_table
 	add	x25, x25, :lo12:.LC31
-	ldrh	w26, [x0, #:lo12:.LANCHOR48]
-	adrp	x0, .LANCHOR40
+	ldrh	w26, [x0, #:lo12:.LANCHOR47]
+	adrp	x0, .LANCHOR39
 	mov	x24, x0
 	mov	w22, 0
-	ldr	x1, [x0, #:lo12:.LANCHOR40]
-	adrp	x27, .LANCHOR42
+	ldr	x1, [x0, #:lo12:.LANCHOR39]
+	adrp	x27, .LANCHOR41
 	mov	w28, 6
 	sub	x19, x19, x1
 	mov	x1, -6148914691236517206
@@ -7136,17 +7073,17 @@ ftl_check_vpc:
 	movk	x1, 0xaaab, lsl 0
 	mul	x19, x19, x1
 	and	w19, w19, 65535
-.L1007:
+.L1000:
 	cmp	w22, w26
-	bne	.L1009
-.L1006:
-	cbz	w23, .L999
+	bne	.L1002
+.L999:
+	cbz	w23, .L992
 	adrp	x0, .LC1
-	mov	w2, 2383
-	add	x1, x21, :lo12:.LANCHOR159
+	mov	w2, 2387
+	add	x1, x21, :lo12:.LANCHOR158
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L999:
+.L992:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -7154,66 +7091,66 @@ ftl_check_vpc:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1002:
+.L995:
 	mov	w2, 0
 	add	x1, x29, 108
 	mov	w0, w22
 	bl	log2phys
 	ldr	w0, [x29, 108]
 	cmn	w0, #1
-	beq	.L1001
+	beq	.L994
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	and	x0, x0, 65535
 	ldrh	w1, [x19, x0, lsl 1]
 	add	w1, w1, 1
 	strh	w1, [x19, x0, lsl 1]
-.L1001:
+.L994:
 	add	w22, w22, 1
-	b	.L1000
-.L1005:
-	ldr	x0, [x25, #:lo12:.LANCHOR42]
+	b	.L993
+.L998:
+	ldr	x0, [x25, #:lo12:.LANCHOR41]
 	ubfiz	x28, x19, 1, 16
 	sxtw	x27, w19
 	ldrh	w2, [x0, x28]
 	ldrh	w3, [x26, x27, lsl 1]
 	cmp	w2, w3
-	beq	.L1004
+	beq	.L997
 	mov	w1, w19
 	mov	x0, x24
 	bl	printf
-	ldr	x0, [x25, #:lo12:.LANCHOR42]
+	ldr	x0, [x25, #:lo12:.LANCHOR41]
 	mov	w1, 65535
 	ldrh	w0, [x0, x28]
 	cmp	w0, w1
-	beq	.L1004
+	beq	.L997
 	ldrh	w1, [x26, x27, lsl 1]
 	cmp	w1, w0
 	csinc	w23, w23, wzr, ls
-.L1004:
+.L997:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1003
-.L1009:
-	ldr	x1, [x27, #:lo12:.LANCHOR42]
+	b	.L996
+.L1002:
+	ldr	x1, [x27, #:lo12:.LANCHOR41]
 	ubfiz	x0, x19, 1, 16
 	ldrh	w2, [x1, x0]
-	cbz	w2, .L1008
+	cbz	w2, .L1001
 	ldrh	w3, [x20, w19, sxtw 1]
 	mov	w23, 1
 	mov	w1, w19
 	mov	x0, x25
 	bl	printf
-.L1008:
-	ldr	x0, [x24, #:lo12:.LANCHOR40]
+.L1001:
+	ldr	x0, [x24, #:lo12:.LANCHOR39]
 	umull	x19, w19, w28
 	ldrh	w19, [x0, x19]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1006
+	beq	.L999
 	add	w22, w22, 1
 	and	w22, w22, 65535
-	b	.L1007
+	b	.L1000
 	.size	ftl_check_vpc, .-ftl_check_vpc
 	.section	.text.ftl_scan_all_data,"ax",@progbits
 	.align	2
@@ -7227,61 +7164,61 @@ ftl_scan_all_data:
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x19, x20, [sp, 32]
-	adrp	x20, .LANCHOR138
+	adrp	x20, .LANCHOR137
 	stp	x21, x22, [sp, 48]
 	mov	w19, 0
-	adrp	x21, .LANCHOR152
-	add	x22, x20, :lo12:.LANCHOR138
-	add	x21, x21, :lo12:.LANCHOR152
+	adrp	x21, .LANCHOR151
+	add	x22, x20, :lo12:.LANCHOR137
+	add	x21, x21, :lo12:.LANCHOR151
 	str	x23, [sp, 64]
 	bl	printf
-.L1025:
+.L1018:
 	ldr	w0, [x21]
 	cmp	w19, w0
-	bcc	.L1031
+	bcc	.L1024
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x29, x30, [sp, 16]
 	ldr	x23, [sp, 64]
 	add	sp, sp, 96
 	ret
-.L1031:
+.L1024:
 	mov	w2, 0
 	add	x1, x29, 76
 	mov	w0, w19
 	bl	log2phys
 	tst	x19, 2047
-	bne	.L1026
+	bne	.L1019
 	ldr	w2, [x29, 76]
 	adrp	x0, .LC33
 	mov	w1, w19
 	add	x0, x0, :lo12:.LC33
 	bl	printf
-.L1026:
+.L1019:
 	ldr	w1, [x29, 76]
 	cmn	w1, #1
-	beq	.L1028
-	add	x0, x20, :lo12:.LANCHOR138
-	str	wzr, [x20, #:lo12:.LANCHOR138]
+	beq	.L1021
+	add	x0, x20, :lo12:.LANCHOR137
+	str	wzr, [x20, #:lo12:.LANCHOR137]
 	mov	w2, 0
 	str	w1, [x0, 4]
-	adrp	x1, .LANCHOR106
+	adrp	x1, .LANCHOR105
 	str	w19, [x0, 24]
-	ldr	x1, [x1, #:lo12:.LANCHOR106]
+	ldr	x1, [x1, #:lo12:.LANCHOR105]
 	str	x1, [x0, 8]
-	adrp	x1, .LANCHOR114
-	ldr	x23, [x1, #:lo12:.LANCHOR114]
+	adrp	x1, .LANCHOR113
+	ldr	x23, [x1, #:lo12:.LANCHOR113]
 	mov	w1, 1
 	str	x23, [x0, 16]
 	bl	FlashReadPages
-	ldr	w0, [x20, #:lo12:.LANCHOR138]
+	ldr	w0, [x20, #:lo12:.LANCHOR137]
 	cmp	w0, 256
 	ccmn	w0, #1, 4, ne
-	beq	.L1029
+	beq	.L1022
 	ldr	w0, [x23, 8]
 	cmp	w19, w0
-	beq	.L1028
-.L1029:
+	beq	.L1021
+.L1022:
 	ldp	x1, x0, [x22, 8]
 	ldr	w2, [x1, 4]
 	str	w2, [sp]
@@ -7293,9 +7230,9 @@ ftl_scan_all_data:
 	add	x0, x0, :lo12:.LC34
 	mov	w1, w19
 	bl	printf
-.L1028:
+.L1021:
 	add	w19, w19, 1
-	b	.L1025
+	b	.L1018
 	.size	ftl_scan_all_data, .-ftl_scan_all_data
 	.section	.text.FtlGcScanTempBlk,"ax",@progbits
 	.align	2
@@ -7305,77 +7242,77 @@ FtlGcScanTempBlk:
 	stp	x29, x30, [sp, -144]!
 	add	x29, sp, 0
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR160
+	adrp	x25, .LANCHOR159
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	ldrh	w20, [x25, #:lo12:.LANCHOR160]
+	ldrh	w20, [x25, #:lo12:.LANCHOR159]
 	mov	w0, 65535
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	cmp	w20, w0
 	str	x27, [sp, 80]
-	beq	.L1054
-	cbnz	w20, .L1034
-.L1035:
+	beq	.L1047
+	cbnz	w20, .L1027
+.L1028:
 	bl	FtlGcPageVarInit
-	b	.L1036
-.L1054:
+	b	.L1029
+.L1047:
 	mov	w20, 0
-.L1034:
-	adrp	x0, .LANCHOR19
-	ldrh	w0, [x0, #:lo12:.LANCHOR19]
+.L1027:
+	adrp	x0, .LANCHOR18
+	ldrh	w0, [x0, #:lo12:.LANCHOR18]
 	cmp	w0, w1
-	beq	.L1035
-.L1036:
-	adrp	x26, .LANCHOR152
-	add	x26, x26, :lo12:.LANCHOR152
-.L1051:
+	beq	.L1028
+.L1029:
+	adrp	x26, .LANCHOR151
+	add	x26, x26, :lo12:.LANCHOR151
+.L1044:
 	ldrh	w1, [x19]
 	mov	w0, 65535
 	strb	wzr, [x19, 8]
 	cmp	w1, w0
-	beq	.L1037
-.L1053:
-	adrp	x1, .LANCHOR64
-	adrp	x24, .LANCHOR103
+	beq	.L1030
+.L1046:
+	adrp	x1, .LANCHOR63
+	adrp	x24, .LANCHOR102
 	add	x4, x19, 16
 	mov	w21, 0
-	ldr	x5, [x1, #:lo12:.LANCHOR64]
-	adrp	x1, .LANCHOR23
-	ldr	x0, [x24, #:lo12:.LANCHOR103]
+	ldr	x5, [x1, #:lo12:.LANCHOR63]
+	adrp	x1, .LANCHOR22
+	ldr	x0, [x24, #:lo12:.LANCHOR102]
 	mov	w10, 65535
-	ldrh	w6, [x1, #:lo12:.LANCHOR23]
-	adrp	x1, .LANCHOR65
-	ldr	x7, [x1, #:lo12:.LANCHOR65]
-	adrp	x1, .LANCHOR24
-	ldrh	w8, [x1, #:lo12:.LANCHOR24]
-	adrp	x1, .LANCHOR3
-	ldrh	w1, [x1, #:lo12:.LANCHOR3]
+	ldrh	w6, [x1, #:lo12:.LANCHOR22]
+	adrp	x1, .LANCHOR64
+	ldr	x7, [x1, #:lo12:.LANCHOR64]
+	adrp	x1, .LANCHOR23
+	ldrh	w8, [x1, #:lo12:.LANCHOR23]
+	adrp	x1, .LANCHOR2
+	ldrh	w1, [x1, #:lo12:.LANCHOR2]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.L1038:
+.L1031:
 	cmp	x1, x4
-	bne	.L1040
+	bne	.L1033
 	mov	w1, w21
 	ubfiz	x21, x21, 5, 16
 	mov	x22, 0
 	mov	w2, 0
 	bl	FlashReadPages
-.L1041:
+.L1034:
 	cmp	x21, x22
-	bne	.L1052
-	adrp	x0, .LANCHOR19
+	bne	.L1045
+	adrp	x0, .LANCHOR18
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	ldrh	w0, [x0, #:lo12:.LANCHOR19]
+	ldrh	w0, [x0, #:lo12:.LANCHOR18]
 	cmp	w0, w20
-	bhi	.L1053
-.L1037:
+	bhi	.L1046
+.L1030:
 	strh	w20, [x19, 2]
 	mov	w0, -1
 	strb	wzr, [x19, 6]
 	mov	w1, w20
-	strh	w0, [x25, #:lo12:.LANCHOR160]
+	strh	w0, [x25, #:lo12:.LANCHOR159]
 	mov	w2, 0
 	mov	x0, x19
 	bl	ftl_sb_update_avl_pages
@@ -7387,10 +7324,10 @@ FtlGcScanTempBlk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1040:
+.L1033:
 	ldrh	w3, [x4]
 	cmp	w3, w10
-	beq	.L1039
+	beq	.L1032
 	ubfiz	x2, x21, 5, 16
 	orr	w3, w20, w3, lsl 10
 	add	x2, x0, x2
@@ -7405,94 +7342,94 @@ FtlGcScanTempBlk:
 	asr	w3, w3, 2
 	add	x3, x7, x3, sxtw 2
 	str	x3, [x2, 16]
-.L1039:
+.L1032:
 	add	x4, x4, 2
-	b	.L1038
-.L1052:
-	ldr	x0, [x24, #:lo12:.LANCHOR103]
+	b	.L1031
+.L1045:
+	ldr	x0, [x24, #:lo12:.LANCHOR102]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
 	ldr	w27, [x1, 4]
 	ldr	x23, [x1, 16]
-	cbnz	w0, .L1042
+	cbnz	w0, .L1035
 	ldrh	w1, [x23]
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L1064
+	beq	.L1057
 	ldr	w0, [x23, 8]
 	ldr	w1, [x26]
 	cmp	w0, w1
-	bls	.L1044
-.L1064:
-	adrp	x0, .LANCHOR42
+	bls	.L1037
+.L1057:
+	adrp	x0, .LANCHOR41
 	ldrh	w1, [x19]
 	mov	w20, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR42]
+	ldr	x0, [x0, #:lo12:.LANCHOR41]
 	strh	wzr, [x0, x1, lsl 1]
 	ldrh	w0, [x19]
 	bl	INSERT_FREE_LIST
 	mov	w0, -1
-	adrp	x1, .LANCHOR145
+	adrp	x1, .LANCHOR144
 	strh	w0, [x19]
-	strh	w0, [x1, #:lo12:.LANCHOR145]
+	strh	w0, [x1, #:lo12:.LANCHOR144]
 	bl	FtlGcPageVarInit
-	b	.L1051
-.L1044:
+	b	.L1044
+.L1037:
 	add	x1, x29, 108
 	mov	w2, 0
 	bl	log2phys
 	ldr	w0, [x23, 12]
 	ldr	w1, [x29, 108]
 	cmp	w0, w1
-	beq	.L1046
-.L1048:
+	beq	.L1039
+.L1041:
 	ldr	w2, [x23, 8]
-.L1065:
+.L1058:
 	ldr	w0, [x23, 12]
 	mov	w1, w27
 	add	x22, x22, 32
 	bl	FtlGcUpdatePage
-	b	.L1041
-.L1046:
+	b	.L1034
+.L1039:
 	cmn	w0, #1
-	beq	.L1048
+	beq	.L1041
 	str	w0, [x29, 116]
-	adrp	x0, .LANCHOR110
+	adrp	x0, .LANCHOR109
 	mov	w2, 0
 	mov	w1, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR110]
+	ldr	x0, [x0, #:lo12:.LANCHOR109]
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR115
-	ldr	x0, [x0, #:lo12:.LANCHOR115]
+	adrp	x0, .LANCHOR114
+	ldr	x0, [x0, #:lo12:.LANCHOR114]
 	str	x0, [x29, 128]
 	add	x0, x29, 112
 	bl	FlashReadPages
-	adrp	x0, .LANCHOR12
-	ldr	x2, [x24, #:lo12:.LANCHOR103]
+	adrp	x0, .LANCHOR11
+	ldr	x2, [x24, #:lo12:.LANCHOR102]
 	ldr	x3, [x29, 120]
-	ldrh	w1, [x0, #:lo12:.LANCHOR12]
+	ldrh	w1, [x0, #:lo12:.LANCHOR11]
 	add	x2, x2, x22
 	mov	x0, 0
 	ubfiz	x1, x1, 9, 16
-.L1049:
+.L1042:
 	cmp	x0, x1
-	beq	.L1048
+	beq	.L1041
 	ldr	x4, [x2, 8]
 	ldr	w5, [x4, x0]
 	add	x0, x0, 4
 	add	x4, x3, x0
 	ldr	w4, [x4, -4]
 	cmp	w5, w4
-	beq	.L1049
+	beq	.L1042
 	ldrh	w1, [x19]
 	adrp	x0, .LC35
 	ldr	w2, [x29, 116]
 	add	x0, x0, :lo12:.LC35
 	bl	printf
-	b	.L1064
-.L1042:
+	b	.L1057
+.L1035:
 	mov	w2, -1
-	b	.L1065
+	b	.L1058
 	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
 	.section	.text.FtlVendorPartWrite,"ax",@progbits
 	.align	2
@@ -7506,25 +7443,25 @@ FtlVendorPartWrite:
 	stp	x27, x28, [sp, 80]
 	add	w1, w0, w1
 	mov	w28, w0
-	adrp	x0, .LANCHOR16
+	adrp	x0, .LANCHOR15
 	stp	x21, x22, [sp, 32]
-	ldrh	w0, [x0, #:lo12:.LANCHOR16]
+	ldrh	w0, [x0, #:lo12:.LANCHOR15]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w1, w0
-	bhi	.L1074
-	adrp	x0, .LANCHOR22
-	adrp	x25, .LANCHOR12
-	adrp	x26, .LANCHOR23
+	bhi	.L1067
+	adrp	x0, .LANCHOR21
+	adrp	x25, .LANCHOR11
+	adrp	x26, .LANCHOR22
 	mov	x24, x2
-	ldrh	w21, [x0, #:lo12:.LANCHOR22]
-	add	x25, x25, :lo12:.LANCHOR12
-	add	x26, x26, :lo12:.LANCHOR23
+	ldrh	w21, [x0, #:lo12:.LANCHOR21]
+	add	x25, x25, :lo12:.LANCHOR11
+	add	x26, x26, :lo12:.LANCHOR22
 	mov	w23, 0
 	lsr	w21, w28, w21
-.L1068:
-	cbnz	w20, .L1073
-.L1066:
+.L1061:
+	cbnz	w20, .L1066
+.L1059:
 	mov	w0, w23
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -7533,11 +7470,11 @@ FtlVendorPartWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 208
 	ret
-.L1073:
+.L1066:
 	ldrh	w1, [x25]
-	adrp	x0, .LANCHOR123
-	adrp	x27, .LANCHOR108
-	ldr	x0, [x0, #:lo12:.LANCHOR123]
+	adrp	x0, .LANCHOR122
+	adrp	x27, .LANCHOR107
+	ldr	x0, [x0, #:lo12:.LANCHOR122]
 	udiv	w22, w28, w1
 	ldr	w2, [x0, w21, uxtw 2]
 	and	w0, w20, 65535
@@ -7546,10 +7483,10 @@ FtlVendorPartWrite:
 	and	w19, w19, 65535
 	cmp	w20, w19
 	csel	w19, w0, w19, cc
-	cbz	w2, .L1070
+	cbz	w2, .L1063
 	cmp	w19, w1
-	beq	.L1070
-	ldr	x0, [x27, #:lo12:.LANCHOR108]
+	beq	.L1063
+	ldr	x0, [x27, #:lo12:.LANCHOR107]
 	str	x0, [x29, 120]
 	add	x0, x29, 144
 	str	w2, [x29, 116]
@@ -7558,19 +7495,19 @@ FtlVendorPartWrite:
 	mov	w1, w2
 	add	x0, x29, 112
 	bl	FlashReadPages
-.L1071:
+.L1064:
 	lsl	w4, w19, 9
-	ldr	x0, [x27, #:lo12:.LANCHOR108]
+	ldr	x0, [x27, #:lo12:.LANCHOR107]
 	lsl	w22, w22, 7
 	mov	w2, w4
 	mov	x1, x24
 	str	w4, [x29, 108]
 	add	x0, x0, x22, sxtw 2
 	bl	ftl_memcpy
-	ldr	x2, [x27, #:lo12:.LANCHOR108]
+	ldr	x2, [x27, #:lo12:.LANCHOR107]
 	mov	w1, w21
-	adrp	x0, .LANCHOR161
-	add	x0, x0, :lo12:.LANCHOR161
+	adrp	x0, .LANCHOR160
+	add	x0, x0, :lo12:.LANCHOR160
 	sub	w20, w20, w19
 	add	w28, w28, w19
 	add	w21, w21, 1
@@ -7579,72 +7516,72 @@ FtlVendorPartWrite:
 	ldr	w4, [x29, 108]
 	csinv	w23, w23, wzr, ne
 	add	x24, x24, x4, sxtw
-	b	.L1068
-.L1070:
+	b	.L1061
+.L1063:
 	ldrh	w2, [x26]
 	mov	w1, 0
-	ldr	x0, [x27, #:lo12:.LANCHOR108]
+	ldr	x0, [x27, #:lo12:.LANCHOR107]
 	bl	ftl_memset
-	b	.L1071
-.L1074:
+	b	.L1064
+.L1067:
 	mov	w23, -1
-	b	.L1066
+	b	.L1059
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.section	.text.Ftl_save_ext_data,"ax",@progbits
 	.align	2
 	.global	Ftl_save_ext_data
 	.type	Ftl_save_ext_data, %function
 Ftl_save_ext_data:
-	adrp	x0, .LANCHOR135
-	add	x2, x0, :lo12:.LANCHOR135
-	ldr	w1, [x0, #:lo12:.LANCHOR135]
+	adrp	x0, .LANCHOR134
+	add	x2, x0, :lo12:.LANCHOR134
+	ldr	w1, [x0, #:lo12:.LANCHOR134]
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1079
-	mov	w0, 72
+	bne	.L1072
+	mov	w0, 85
 	mov	w1, 1
 	movk	w0, 0x5000, lsl 16
 	str	w0, [x2, 4]
+	adrp	x0, .LANCHOR161
+	ldr	w0, [x0, #:lo12:.LANCHOR161]
+	str	w0, [x2, 88]
 	adrp	x0, .LANCHOR162
 	ldr	w0, [x0, #:lo12:.LANCHOR162]
-	str	w0, [x2, 88]
-	adrp	x0, .LANCHOR163
-	ldr	w0, [x0, #:lo12:.LANCHOR163]
 	str	w0, [x2, 92]
+	adrp	x0, .LANCHOR83
+	ldr	w0, [x0, #:lo12:.LANCHOR83]
+	str	w0, [x2, 8]
 	adrp	x0, .LANCHOR84
 	ldr	w0, [x0, #:lo12:.LANCHOR84]
-	str	w0, [x2, 8]
-	adrp	x0, .LANCHOR85
-	ldr	w0, [x0, #:lo12:.LANCHOR85]
 	str	w0, [x2, 12]
-	adrp	x0, .LANCHOR89
-	ldr	w0, [x0, #:lo12:.LANCHOR89]
-	str	w0, [x2, 16]
 	adrp	x0, .LANCHOR88
 	ldr	w0, [x0, #:lo12:.LANCHOR88]
+	str	w0, [x2, 16]
+	adrp	x0, .LANCHOR87
+	ldr	w0, [x0, #:lo12:.LANCHOR87]
 	str	w0, [x2, 20]
-	adrp	x0, .LANCHOR91
-	ldr	w0, [x0, #:lo12:.LANCHOR91]
+	adrp	x0, .LANCHOR90
+	ldr	w0, [x0, #:lo12:.LANCHOR90]
 	str	w0, [x2, 28]
-	adrp	x0, .LANCHOR80
-	ldr	w0, [x0, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR79
+	ldr	w0, [x0, #:lo12:.LANCHOR79]
 	str	w0, [x2, 32]
+	adrp	x0, .LANCHOR85
+	ldr	w0, [x0, #:lo12:.LANCHOR85]
+	str	w0, [x2, 36]
 	adrp	x0, .LANCHOR86
 	ldr	w0, [x0, #:lo12:.LANCHOR86]
-	str	w0, [x2, 36]
-	adrp	x0, .LANCHOR87
-	ldr	w0, [x0, #:lo12:.LANCHOR87]
 	str	w0, [x2, 40]
+	adrp	x0, .LANCHOR91
+	ldr	w0, [x0, #:lo12:.LANCHOR91]
+	str	w0, [x2, 44]
 	adrp	x0, .LANCHOR92
 	ldr	w0, [x0, #:lo12:.LANCHOR92]
-	str	w0, [x2, 44]
-	adrp	x0, .LANCHOR93
-	ldr	w0, [x0, #:lo12:.LANCHOR93]
 	str	w0, [x2, 48]
 	mov	w0, 0
 	b	FtlVendorPartWrite
-.L1079:
+.L1072:
 	ret
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
 	.section	.text.FtlEctTblFlush,"ax",@progbits
@@ -7652,34 +7589,34 @@ Ftl_save_ext_data:
 	.global	FtlEctTblFlush
 	.type	FtlEctTblFlush, %function
 FtlEctTblFlush:
-	adrp	x2, .LANCHOR164
-	ldrh	w1, [x2, #:lo12:.LANCHOR164]
+	adrp	x2, .LANCHOR163
+	ldrh	w1, [x2, #:lo12:.LANCHOR163]
 	cmp	w1, 31
-	bhi	.L1085
+	bhi	.L1078
 	add	w1, w1, 1
-	strh	w1, [x2, #:lo12:.LANCHOR164]
+	strh	w1, [x2, #:lo12:.LANCHOR163]
 	mov	w1, 1
-.L1082:
-	adrp	x2, .LANCHOR118
-	cbnz	w0, .L1083
-	ldr	x0, [x2, #:lo12:.LANCHOR118]
+.L1075:
+	adrp	x2, .LANCHOR117
+	cbnz	w0, .L1076
+	ldr	x0, [x2, #:lo12:.LANCHOR117]
 	ldr	w3, [x0, 20]
 	ldr	w0, [x0, 16]
 	add	w1, w1, w3
 	cmp	w0, w1
-	bcc	.L1087
-.L1083:
+	bcc	.L1080
+.L1076:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
-	ldr	x2, [x2, #:lo12:.LANCHOR118]
+	ldr	x2, [x2, #:lo12:.LANCHOR117]
 	ldr	w0, [x2, 16]
 	str	w0, [x2, 20]
 	mov	w0, 17221
 	str	wzr, [x2, 4]
 	movk	w0, 0x4254, lsl 16
 	str	w0, [x2]
-	adrp	x0, .LANCHOR116
-	ldrh	w1, [x0, #:lo12:.LANCHOR116]
+	adrp	x0, .LANCHOR115
+	ldrh	w1, [x0, #:lo12:.LANCHOR115]
 	lsl	w0, w1, 9
 	str	w0, [x2, 12]
 	ldr	w0, [x2, 8]
@@ -7691,10 +7628,10 @@ FtlEctTblFlush:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1085:
+.L1078:
 	mov	w1, 32
-	b	.L1082
-.L1087:
+	b	.L1075
+.L1080:
 	mov	w0, 0
 	ret
 	.size	FtlEctTblFlush, .-FtlEctTblFlush
@@ -7717,26 +7654,26 @@ FtlVendorPartRead:
 	mov	w22, w0
 	mov	w21, w1
 	add	w1, w0, w1
-	adrp	x0, .LANCHOR16
+	adrp	x0, .LANCHOR15
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
-	ldrh	w0, [x0, #:lo12:.LANCHOR16]
+	ldrh	w0, [x0, #:lo12:.LANCHOR15]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	cmp	w1, w0
-	bhi	.L1099
-	adrp	x0, .LANCHOR22
+	bhi	.L1092
+	adrp	x0, .LANCHOR21
 	mov	x25, x2
 	mov	w24, 0
-	adrp	x27, .LANCHOR123
-	ldrh	w20, [x0, #:lo12:.LANCHOR22]
-	adrp	x0, .LANCHOR12
-	add	x0, x0, :lo12:.LANCHOR12
+	adrp	x27, .LANCHOR122
+	ldrh	w20, [x0, #:lo12:.LANCHOR21]
+	adrp	x0, .LANCHOR11
+	add	x0, x0, :lo12:.LANCHOR11
 	str	x0, [x29, 104]
 	lsr	w20, w22, w20
-.L1092:
-	cbnz	w21, .L1098
-.L1090:
+.L1085:
+	cbnz	w21, .L1091
+.L1083:
 	mov	w0, w24
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -7745,8 +7682,8 @@ FtlVendorPartRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 208
 	ret
-.L1098:
-	ldr	x0, [x27, #:lo12:.LANCHOR123]
+.L1091:
+	ldr	x0, [x27, #:lo12:.LANCHOR122]
 	ldr	w4, [x0, w20, uxtw 2]
 	ldr	x0, [x29, 104]
 	ldrh	w19, [x0]
@@ -7758,12 +7695,12 @@ FtlVendorPartRead:
 	cmp	w21, w19
 	csel	w19, w0, w19, cc
 	lsl	w26, w19, 9
-	cbz	w4, .L1094
-	adrp	x28, .LANCHOR108
+	cbz	w4, .L1087
+	adrp	x28, .LANCHOR107
 	mov	w2, 1
 	str	w4, [x29, 96]
 	mov	w1, w2
-	ldr	x0, [x28, #:lo12:.LANCHOR108]
+	ldr	x0, [x28, #:lo12:.LANCHOR107]
 	str	x0, [x29, 120]
 	add	x0, x29, 144
 	str	w4, [x29, 116]
@@ -7774,45 +7711,45 @@ FtlVendorPartRead:
 	mov	x5, x28
 	ldr	w4, [x29, 96]
 	cmn	w0, #1
-	adrp	x0, .LANCHOR138
+	adrp	x0, .LANCHOR137
 	csinv	w24, w24, wzr, ne
-	ldr	w0, [x0, #:lo12:.LANCHOR138]
+	ldr	w0, [x0, #:lo12:.LANCHOR137]
 	cmp	w0, 256
-	bne	.L1096
+	bne	.L1089
 	mov	w2, w4
 	mov	w1, w20
 	adrp	x0, .LC36
 	str	x28, [x29, 96]
 	add	x0, x0, :lo12:.LC36
 	bl	printf
-	ldr	x2, [x28, #:lo12:.LANCHOR108]
+	ldr	x2, [x28, #:lo12:.LANCHOR107]
 	mov	w1, w20
-	adrp	x0, .LANCHOR161
-	add	x0, x0, :lo12:.LANCHOR161
+	adrp	x0, .LANCHOR160
+	add	x0, x0, :lo12:.LANCHOR160
 	bl	FtlMapWritePage
 	ldr	x5, [x29, 96]
-.L1096:
-	ldr	x1, [x5, #:lo12:.LANCHOR108]
+.L1089:
+	ldr	x1, [x5, #:lo12:.LANCHOR107]
 	lsl	w23, w23, 7
 	mov	w2, w26
 	mov	x0, x25
 	add	x1, x1, x23, sxtw 2
 	bl	ftl_memcpy
-.L1097:
+.L1090:
 	add	w20, w20, 1
 	sub	w21, w21, w19
 	add	w22, w22, w19
 	add	x25, x25, x26, sxtw
-	b	.L1092
-.L1094:
+	b	.L1085
+.L1087:
 	mov	w2, w26
 	mov	w1, 0
 	mov	x0, x25
 	bl	ftl_memset
-	b	.L1097
-.L1099:
-	mov	w24, -1
 	b	.L1090
+.L1092:
+	mov	w24, -1
+	b	.L1083
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
 	.section	.text.FtlLoadEctTbl,"ax",@progbits
 	.align	2
@@ -7823,28 +7760,28 @@ FtlLoadEctTbl:
 	mov	w0, 64
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR118
-	adrp	x20, .LANCHOR116
-	ldr	x2, [x19, #:lo12:.LANCHOR118]
-	ldrh	w1, [x20, #:lo12:.LANCHOR116]
+	adrp	x19, .LANCHOR117
+	adrp	x20, .LANCHOR115
+	ldr	x2, [x19, #:lo12:.LANCHOR117]
+	ldrh	w1, [x20, #:lo12:.LANCHOR115]
 	bl	FtlVendorPartRead
-	ldr	x0, [x19, #:lo12:.LANCHOR118]
+	ldr	x0, [x19, #:lo12:.LANCHOR117]
 	ldr	w1, [x0]
 	mov	w0, 17221
 	movk	w0, 0x4254, lsl 16
 	cmp	w1, w0
-	beq	.L1102
+	beq	.L1095
 	adrp	x1, .LC37
 	adrp	x0, .LC38
 	add	x1, x1, :lo12:.LC37
 	add	x0, x0, :lo12:.LC38
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR118]
+	ldr	x0, [x19, #:lo12:.LANCHOR117]
 	mov	w1, 0
-	ldrh	w2, [x20, #:lo12:.LANCHOR116]
+	ldrh	w2, [x20, #:lo12:.LANCHOR115]
 	lsl	w2, w2, 9
 	bl	ftl_memset
-.L1102:
+.L1095:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -7860,76 +7797,76 @@ Ftl_load_ext_data:
 	mov	w0, 0
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR135
+	adrp	x19, .LANCHOR134
 	str	x21, [sp, 32]
-	add	x21, x19, :lo12:.LANCHOR135
+	add	x21, x19, :lo12:.LANCHOR134
 	mov	x2, x21
 	bl	FtlVendorPartRead
-	ldr	w0, [x19, #:lo12:.LANCHOR135]
+	ldr	w0, [x19, #:lo12:.LANCHOR134]
 	mov	w20, 19539
 	movk	w20, 0x4654, lsl 16
 	cmp	w0, w20
-	beq	.L1105
+	beq	.L1098
 	mov	w2, 512
 	mov	w1, 0
 	mov	x0, x21
 	bl	ftl_memset
-	str	w20, [x19, #:lo12:.LANCHOR135]
-.L1105:
-	ldr	w1, [x19, #:lo12:.LANCHOR135]
-	add	x0, x19, :lo12:.LANCHOR135
+	str	w20, [x19, #:lo12:.LANCHOR134]
+.L1098:
+	ldr	w1, [x19, #:lo12:.LANCHOR134]
+	add	x0, x19, :lo12:.LANCHOR134
 	cmp	w1, w20
-	adrp	x1, .LANCHOR91
-	bne	.L1106
-	adrp	x2, .LANCHOR162
+	adrp	x1, .LANCHOR90
+	bne	.L1099
+	adrp	x2, .LANCHOR161
 	ldr	w3, [x0, 88]
-	str	w3, [x2, #:lo12:.LANCHOR162]
-	adrp	x2, .LANCHOR163
+	str	w3, [x2, #:lo12:.LANCHOR161]
+	adrp	x2, .LANCHOR162
 	ldr	w3, [x0, 92]
-	str	w3, [x2, #:lo12:.LANCHOR163]
-	adrp	x2, .LANCHOR84
+	str	w3, [x2, #:lo12:.LANCHOR162]
+	adrp	x2, .LANCHOR83
 	ldr	w3, [x0, 8]
-	str	w3, [x2, #:lo12:.LANCHOR84]
-	adrp	x2, .LANCHOR85
+	str	w3, [x2, #:lo12:.LANCHOR83]
+	adrp	x2, .LANCHOR84
 	ldr	w3, [x0, 12]
-	str	w3, [x2, #:lo12:.LANCHOR85]
-	adrp	x2, .LANCHOR89
-	ldr	w3, [x0, 16]
-	str	w3, [x2, #:lo12:.LANCHOR89]
+	str	w3, [x2, #:lo12:.LANCHOR84]
 	adrp	x2, .LANCHOR88
-	ldr	w3, [x0, 20]
+	ldr	w3, [x0, 16]
 	str	w3, [x2, #:lo12:.LANCHOR88]
+	adrp	x2, .LANCHOR87
+	ldr	w3, [x0, 20]
+	str	w3, [x2, #:lo12:.LANCHOR87]
 	ldp	w2, w3, [x0, 28]
-	str	w2, [x1, #:lo12:.LANCHOR91]
-	adrp	x2, .LANCHOR80
-	str	w3, [x2, #:lo12:.LANCHOR80]
-	adrp	x2, .LANCHOR86
+	str	w2, [x1, #:lo12:.LANCHOR90]
+	adrp	x2, .LANCHOR79
+	str	w3, [x2, #:lo12:.LANCHOR79]
+	adrp	x2, .LANCHOR85
 	ldr	w3, [x0, 36]
-	str	w3, [x2, #:lo12:.LANCHOR86]
-	adrp	x2, .LANCHOR87
+	str	w3, [x2, #:lo12:.LANCHOR85]
+	adrp	x2, .LANCHOR86
 	ldr	w3, [x0, 40]
-	str	w3, [x2, #:lo12:.LANCHOR87]
-	adrp	x2, .LANCHOR92
+	str	w3, [x2, #:lo12:.LANCHOR86]
+	adrp	x2, .LANCHOR91
 	ldr	w3, [x0, 44]
-	str	w3, [x2, #:lo12:.LANCHOR92]
+	str	w3, [x2, #:lo12:.LANCHOR91]
 	ldr	w2, [x0, 48]
-	adrp	x0, .LANCHOR93
-	str	w2, [x0, #:lo12:.LANCHOR93]
-.L1106:
-	adrp	x0, .LANCHOR14
-	adrp	x2, .LANCHOR90
-	ldr	w1, [x1, #:lo12:.LANCHOR91]
-	ldrh	w0, [x0, #:lo12:.LANCHOR14]
-	ldr	w2, [x2, #:lo12:.LANCHOR90]
+	adrp	x0, .LANCHOR92
+	str	w2, [x0, #:lo12:.LANCHOR92]
+.L1099:
+	adrp	x0, .LANCHOR13
+	adrp	x2, .LANCHOR89
+	ldr	w1, [x1, #:lo12:.LANCHOR90]
+	ldrh	w0, [x0, #:lo12:.LANCHOR13]
+	ldr	w2, [x2, #:lo12:.LANCHOR89]
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	madd	w0, w0, w2, w1
-	adrp	x1, .LANCHOR5
+	adrp	x1, .LANCHOR4
 	ldp	x29, x30, [sp], 48
-	ldrh	w1, [x1, #:lo12:.LANCHOR5]
+	ldrh	w1, [x1, #:lo12:.LANCHOR4]
 	udiv	w0, w0, w1
-	adrp	x1, .LANCHOR143
-	str	w0, [x1, #:lo12:.LANCHOR143]
+	adrp	x1, .LANCHOR142
+	str	w0, [x1, #:lo12:.LANCHOR142]
 	ret
 	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
 	.section	.text.sftl_vendor_read,"ax",@progbits
@@ -7946,37 +7883,37 @@ sftl_vendor_read:
 	.type	FtlMapBlkWriteDump_data, %function
 FtlMapBlkWriteDump_data:
 	ldr	w1, [x0, 56]
-	cbz	w1, .L1109
+	cbz	w1, .L1102
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
 	ldrh	w20, [x0, 6]
-	adrp	x0, .LANCHOR107
+	adrp	x0, .LANCHOR106
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR138
-	add	x21, x23, :lo12:.LANCHOR138
-	ldr	x0, [x0, #:lo12:.LANCHOR107]
+	adrp	x23, .LANCHOR137
+	add	x21, x23, :lo12:.LANCHOR137
+	ldr	x0, [x0, #:lo12:.LANCHOR106]
 	mov	x22, x23
 	str	x0, [x21, 8]
-	adrp	x0, .LANCHOR114
-	ldr	x24, [x0, #:lo12:.LANCHOR114]
+	adrp	x0, .LANCHOR113
+	ldr	x24, [x0, #:lo12:.LANCHOR113]
 	ldrh	w0, [x19, 2]
 	str	x25, [sp, 64]
 	str	x24, [x21, 16]
 	str	wzr, [x19, 56]
 	ldr	x25, [x19, 40]
-	cbz	w0, .L1111
-	adrp	x1, .LANCHOR20
-	ldrh	w1, [x1, #:lo12:.LANCHOR20]
+	cbz	w0, .L1104
+	adrp	x1, .LANCHOR19
+	ldrh	w1, [x1, #:lo12:.LANCHOR19]
 	sub	w1, w1, #1
 	cmp	w0, w1
-	bge	.L1111
+	bge	.L1104
 	ldrh	w1, [x19]
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L1111
+	beq	.L1104
 	ldr	x2, [x19, 16]
 	ubfiz	x1, x1, 1, 16
 	sub	w0, w0, #1
@@ -7987,18 +7924,18 @@ FtlMapBlkWriteDump_data:
 	str	w0, [x21, 4]
 	mov	x0, x21
 	bl	FlashReadPages
-	ldr	w0, [x23, #:lo12:.LANCHOR138]
+	ldr	w0, [x23, #:lo12:.LANCHOR137]
 	cmn	w0, #1
-	beq	.L1111
+	beq	.L1104
 	ldrh	w1, [x24, 8]
 	ldr	x2, [x19, 40]
 	ubfiz	x0, x1, 2, 16
 	ldr	w2, [x2, x0]
 	ldr	w0, [x21, 4]
 	cmp	w2, w0
-	bne	.L1111
+	bne	.L1104
 	ldr	x2, [x21, 8]
-.L1123:
+.L1116:
 	mov	x0, x19
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -8006,30 +7943,30 @@ FtlMapBlkWriteDump_data:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	b	FtlMapWritePage
-.L1111:
+.L1104:
 	sub	w20, w20, #1
 	and	w20, w20, 65535
 	ubfiz	x0, x20, 2, 16
 	ldr	w1, [x25, x0]
-	add	x0, x22, :lo12:.LANCHOR138
+	add	x0, x22, :lo12:.LANCHOR137
 	str	w1, [x0, 4]
-	cbz	w1, .L1112
+	cbz	w1, .L1105
 	mov	w2, 1
 	mov	w1, w2
 	bl	FlashReadPages
-.L1113:
-	add	x22, x22, :lo12:.LANCHOR138
+.L1106:
+	add	x22, x22, :lo12:.LANCHOR137
 	mov	w1, w20
 	ldr	x2, [x22, 8]
-	b	.L1123
-.L1112:
-	adrp	x1, .LANCHOR23
+	b	.L1116
+.L1105:
+	adrp	x1, .LANCHOR22
 	ldr	x0, [x0, 8]
-	ldrh	w2, [x1, #:lo12:.LANCHOR23]
+	ldrh	w2, [x1, #:lo12:.LANCHOR22]
 	mov	w1, 255
 	bl	ftl_memset
-	b	.L1113
-.L1109:
+	b	.L1106
+.L1102:
 	ret
 	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
 	.section	.text.FtlVpcTblFlush,"ax",@progbits
@@ -8038,47 +7975,47 @@ FtlMapBlkWriteDump_data:
 	.type	FtlVpcTblFlush, %function
 FtlVpcTblFlush:
 	stp	x29, x30, [sp, -112]!
-	adrp	x1, .LANCHOR139
+	adrp	x1, .LANCHOR138
 	mov	w2, 19539
 	add	x29, sp, 0
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR114
+	adrp	x25, .LANCHOR113
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR106
+	adrp	x22, .LANCHOR105
+	stp	x23, x24, [sp, 48]
+	adrp	x21, .LANCHOR137
 	stp	x27, x28, [sp, 80]
-	adrp	x21, .LANCHOR138
-	ldr	x27, [x25, #:lo12:.LANCHOR114]
-	add	x28, x21, :lo12:.LANCHOR138
+	add	x24, x21, :lo12:.LANCHOR137
+	ldr	x27, [x25, #:lo12:.LANCHOR113]
+	add	x28, x1, :lo12:.LANCHOR138
 	stp	x19, x20, [sp, 16]
 	movk	w2, 0x4654, lsl 16
-	stp	x23, x24, [sp, 48]
-	add	x24, x1, :lo12:.LANCHOR139
-	ldr	x0, [x22, #:lo12:.LANCHOR106]
-	adrp	x23, .LANCHOR82
-	ldrh	w1, [x1, #:lo12:.LANCHOR139]
-	adrp	x26, .LANCHOR23
-	stp	x0, x27, [x28, 8]
+	ldr	x0, [x22, #:lo12:.LANCHOR105]
+	adrp	x23, .LANCHOR81
+	ldrh	w1, [x1, #:lo12:.LANCHOR138]
+	adrp	x26, .LANCHOR22
+	stp	x0, x27, [x24, 8]
 	mov	w20, 0
 	strh	w1, [x27, 2]
 	mov	w1, -3932
 	strh	w1, [x27]
-	ldr	w1, [x24, 8]
+	ldr	w1, [x28, 8]
 	stp	w1, wzr, [x27, 4]
-	adrp	x1, .LANCHOR39
-	add	x19, x1, :lo12:.LANCHOR39
+	adrp	x1, .LANCHOR38
+	add	x19, x1, :lo12:.LANCHOR38
 	str	wzr, [x27, 12]
-	str	w2, [x1, #:lo12:.LANCHOR39]
-	mov	w1, 72
+	str	w2, [x1, #:lo12:.LANCHOR38]
+	mov	w1, 85
 	movk	w1, 0x5000, lsl 16
 	str	w1, [x19, 4]
-	ldrh	w1, [x24, 6]
-	adrp	x2, .LANCHOR51
+	ldrh	w1, [x28, 6]
+	adrp	x2, .LANCHOR50
 	strh	w1, [x19, 8]
-	adrp	x1, .LANCHOR10
-	ldrh	w1, [x1, #:lo12:.LANCHOR10]
+	adrp	x1, .LANCHOR9
+	ldrh	w1, [x1, #:lo12:.LANCHOR9]
 	strb	w1, [x19, 10]
-	add	x1, x2, :lo12:.LANCHOR51
-	ldrh	w2, [x2, #:lo12:.LANCHOR51]
+	add	x1, x2, :lo12:.LANCHOR50
+	ldrh	w2, [x2, #:lo12:.LANCHOR50]
 	strh	w2, [x19, 14]
 	ldrh	w2, [x1, 2]
 	ldrb	w3, [x1, 6]
@@ -8086,9 +8023,9 @@ FtlVpcTblFlush:
 	strb	w1, [x19, 11]
 	orr	w2, w3, w2, lsl 6
 	strh	w2, [x19, 16]
-	adrp	x2, .LANCHOR52
-	add	x1, x2, :lo12:.LANCHOR52
-	ldrh	w2, [x2, #:lo12:.LANCHOR52]
+	adrp	x2, .LANCHOR51
+	add	x1, x2, :lo12:.LANCHOR51
+	ldrh	w2, [x2, #:lo12:.LANCHOR51]
 	ldrb	w3, [x1, 6]
 	strh	w2, [x19, 18]
 	ldrh	w2, [x1, 2]
@@ -8096,89 +8033,77 @@ FtlVpcTblFlush:
 	strb	w1, [x19, 12]
 	orr	w2, w3, w2, lsl 6
 	strh	w2, [x19, 20]
-	adrp	x2, .LANCHOR53
-	add	x1, x2, :lo12:.LANCHOR53
-	ldrh	w2, [x2, #:lo12:.LANCHOR53]
+	adrp	x2, .LANCHOR52
+	add	x1, x2, :lo12:.LANCHOR52
+	ldrh	w2, [x2, #:lo12:.LANCHOR52]
 	ldrb	w3, [x1, 6]
 	strh	w2, [x19, 22]
 	ldrh	w2, [x1, 2]
 	ldrb	w1, [x1, 8]
 	strb	w1, [x19, 13]
-	adrp	x1, .LANCHOR90
+	adrp	x1, .LANCHOR89
 	orr	w2, w3, w2, lsl 6
 	strh	w2, [x19, 24]
-	ldr	w1, [x1, #:lo12:.LANCHOR90]
+	ldr	w1, [x1, #:lo12:.LANCHOR89]
 	str	w1, [x19, 32]
-	ldr	w1, [x23, #:lo12:.LANCHOR82]
+	ldr	w1, [x23, #:lo12:.LANCHOR81]
 	str	w1, [x19, 40]
-	ldrh	w2, [x26, #:lo12:.LANCHOR23]
-	adrp	x1, .LANCHOR83
-	ldr	w1, [x1, #:lo12:.LANCHOR83]
+	ldrh	w2, [x26, #:lo12:.LANCHOR22]
+	adrp	x1, .LANCHOR82
+	ldr	w1, [x1, #:lo12:.LANCHOR82]
 	str	w1, [x19, 36]
 	mov	w1, 255
 	bl	ftl_memset
-	ldr	x0, [x28, 8]
+	ldr	x0, [x24, 8]
 	mov	x1, x19
 	mov	w2, 48
-	adrp	x19, .LANCHOR5
+	mov	x19, x24
 	bl	ftl_memcpy
-	adrp	x1, .LANCHOR42
-	ldrh	w2, [x19, #:lo12:.LANCHOR5]
-	ldr	x0, [x28, 8]
-	ldr	x1, [x1, #:lo12:.LANCHOR42]
+	adrp	x0, .LANCHOR4
+	adrp	x1, .LANCHOR41
+	ldrh	w2, [x0, #:lo12:.LANCHOR4]
+	ldr	x1, [x1, #:lo12:.LANCHOR41]
+	ldr	x0, [x24, 8]
+	adrp	x24, .LANCHOR19
 	lsl	w2, w2, 1
+	add	x24, x24, :lo12:.LANCHOR19
 	add	x0, x0, 48
 	bl	ftl_memcpy
-	ldrh	w0, [x19, #:lo12:.LANCHOR5]
-	adrp	x1, .LANCHOR1
-	ldr	x3, [x28, 8]
-	mov	x19, x28
-	ldr	x1, [x1, #:lo12:.LANCHOR1]
-	mov	x28, x24
-	lsr	w2, w0, 3
-	ubfiz	x0, x0, 1, 16
-	add	w2, w2, 4
-	add	x0, x0, 48
-	and	x0, x0, -4
-	adrp	x24, .LANCHOR20
-	add	x0, x3, x0
-	bl	ftl_memcpy
 	mov	w0, 0
 	bl	FtlUpdateVaildLpn
 	mov	w0, 65535
-	add	x24, x24, :lo12:.LANCHOR20
-	str	w0, [x29, 108]
 	str	x24, [x29, 96]
-.L1125:
+	str	w0, [x29, 108]
+.L1118:
 	ldrh	w2, [x28, 2]
 	ldrh	w1, [x28]
-	ldr	x0, [x22, #:lo12:.LANCHOR106]
+	ldr	x0, [x22, #:lo12:.LANCHOR105]
 	str	x0, [x19, 8]
-	ldr	x0, [x25, #:lo12:.LANCHOR114]
+	ldr	x0, [x25, #:lo12:.LANCHOR113]
 	str	x0, [x19, 16]
 	orr	w0, w2, w1, lsl 10
 	str	w0, [x19, 4]
 	ldrh	w0, [x24]
 	sub	w0, w0, #1
 	cmp	w2, w0
-	blt	.L1126
+	blt	.L1119
 	ldrh	w0, [x28, 4]
 	strh	wzr, [x28, 2]
 	strh	w1, [x28, 4]
 	str	w0, [x29, 108]
 	bl	FtlFreeSysBlkQueueOut
 	strh	w0, [x28]
-	ldr	w1, [x23, #:lo12:.LANCHOR82]
+	ldr	w1, [x23, #:lo12:.LANCHOR81]
 	str	w1, [x28, 8]
 	add	w2, w1, 1
-	str	w2, [x23, #:lo12:.LANCHOR82]
+	str	w2, [x23, #:lo12:.LANCHOR81]
 	ubfiz	w2, w0, 10, 16
 	str	w2, [x19, 4]
 	strh	w0, [x27, 2]
 	str	w1, [x27, 4]
-.L1126:
-	ldrh	w1, [x26, #:lo12:.LANCHOR23]
-	ldr	x0, [x22, #:lo12:.LANCHOR106]
+.L1119:
+	ldrh	w1, [x26, #:lo12:.LANCHOR22]
+	ldr	x0, [x22, #:lo12:.LANCHOR105]
 	bl	js_hash
 	str	w0, [x27, 12]
 	mov	w3, 1
@@ -8192,49 +8117,49 @@ FtlVpcTblFlush:
 	and	w0, w0, 65535
 	strh	w0, [x28, 2]
 	cmn	w1, #1
-	bne	.L1127
+	bne	.L1120
 	cmp	w0, 1
-	bne	.L1128
-	adrp	x1, .LANCHOR165
+	bne	.L1121
+	adrp	x1, .LANCHOR164
 	adrp	x0, .LC1
 	mov	w2, 1138
-	add	x1, x1, :lo12:.LANCHOR165
+	add	x1, x1, :lo12:.LANCHOR164
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1128:
+.L1121:
 	ldrh	w0, [x28, 2]
 	cmp	w0, 1
-	bne	.L1129
+	bne	.L1122
 	ldr	x0, [x29, 96]
 	ldrh	w0, [x0]
 	sub	w0, w0, #1
 	strh	w0, [x28, 2]
-.L1129:
+.L1122:
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	cmp	w20, 3
-	bls	.L1125
-	add	x21, x21, :lo12:.LANCHOR138
+	bls	.L1118
+	add	x21, x21, :lo12:.LANCHOR137
 	adrp	x0, .LC39
 	mov	w2, w20
 	add	x0, x0, :lo12:.LC39
 	ldr	w1, [x21, 4]
 	bl	printf
-.L1131:
-	b	.L1131
-.L1127:
+.L1124:
+	b	.L1124
+.L1120:
 	cmp	w0, 1
-	beq	.L1125
+	beq	.L1118
 	cmp	w1, 256
-	beq	.L1125
+	beq	.L1118
 	ldr	w1, [x29, 108]
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L1132
+	beq	.L1125
 	ldrh	w0, [x29, 108]
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.L1132:
+.L1125:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -8264,17 +8189,17 @@ FtlSysFlush:
 	.global	sftl_deinit
 	.type	sftl_deinit, %function
 sftl_deinit:
-	adrp	x0, .LANCHOR166
-	ldr	w0, [x0, #:lo12:.LANCHOR166]
+	adrp	x0, .LANCHOR165
+	ldr	w0, [x0, #:lo12:.LANCHOR165]
 	cmp	w0, 1
-	bne	.L1145
+	bne	.L1138
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	FtlSysFlush
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1145:
+.L1138:
 	mov	w0, 0
 	ret
 	.size	sftl_deinit, .-sftl_deinit
@@ -8284,65 +8209,69 @@ sftl_deinit:
 	.type	FtlDiscard, %function
 FtlDiscard:
 	stp	x29, x30, [sp, -80]!
-	add	w2, w0, w1
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w19, w1
-	adrp	x1, .LANCHOR34
+	adrp	x1, .LANCHOR33
 	stp	x21, x22, [sp, 32]
 	str	x23, [sp, 48]
-	ldr	w1, [x1, #:lo12:.LANCHOR34]
-	cmp	w2, w1
-	bhi	.L1156
+	ldr	w1, [x1, #:lo12:.LANCHOR33]
+	cmp	w1, w0
+	bls	.L1151
+	cmp	w1, w19
+	bcc	.L1151
+	add	w2, w0, w19
+	cmp	w1, w2
+	bcc	.L1151
 	cmp	w19, 31
-	bhi	.L1150
-.L1164:
+	bhi	.L1143
+.L1159:
 	mov	w0, 0
-.L1148:
+.L1141:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1150:
-	adrp	x21, .LANCHOR12
-	ldrh	w1, [x21, #:lo12:.LANCHOR12]
+.L1143:
+	adrp	x21, .LANCHOR11
+	ldrh	w1, [x21, #:lo12:.LANCHOR11]
 	udiv	w20, w0, w1
 	msub	w0, w1, w20, w0
 	ands	w0, w0, 65535
-	beq	.L1151
-	sub	w1, w1, w0
+	beq	.L1144
+	sub	w0, w1, w0
 	add	w20, w20, 1
-	cmp	w1, w19
-	csel	w1, w1, w19, ls
-	sub	w19, w19, w1, uxth
-.L1151:
-	adrp	x22, .LANCHOR167
-	adrp	x23, .LANCHOR86
-	add	x22, x22, :lo12:.LANCHOR167
-	add	x23, x23, :lo12:.LANCHOR86
+	cmp	w0, w19
+	csel	w0, w0, w19, ls
+	sub	w19, w19, w0, uxth
+.L1144:
+	adrp	x22, .LANCHOR166
+	adrp	x23, .LANCHOR85
+	add	x22, x22, :lo12:.LANCHOR166
+	add	x23, x23, :lo12:.LANCHOR85
 	mov	w0, -1
 	str	w0, [x29, 76]
-.L1152:
-	ldrh	w0, [x21, #:lo12:.LANCHOR12]
+.L1145:
+	ldrh	w0, [x21, #:lo12:.LANCHOR11]
 	cmp	w19, w0
-	bcs	.L1154
-	adrp	x0, .LANCHOR167
-	ldr	w1, [x0, #:lo12:.LANCHOR167]
+	bcs	.L1147
+	adrp	x0, .LANCHOR166
+	ldr	w1, [x0, #:lo12:.LANCHOR166]
 	cmp	w1, 32
-	bls	.L1164
-	str	wzr, [x0, #:lo12:.LANCHOR167]
+	bls	.L1159
+	str	wzr, [x0, #:lo12:.LANCHOR166]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L1164
-.L1154:
+	b	.L1159
+.L1147:
 	mov	w2, 0
 	add	x1, x29, 72
 	mov	w0, w20
 	bl	log2phys
 	ldr	w0, [x29, 72]
 	cmn	w0, #1
-	beq	.L1153
+	beq	.L1146
 	ldr	w0, [x22]
 	mov	w2, 1
 	add	x1, x29, 76
@@ -8357,14 +8286,14 @@ FtlDiscard:
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L1153:
-	ldrh	w0, [x21, #:lo12:.LANCHOR12]
+.L1146:
+	ldrh	w0, [x21, #:lo12:.LANCHOR11]
 	add	w20, w20, 1
 	sub	w19, w19, w0
-	b	.L1152
-.L1156:
+	b	.L1145
+.L1151:
 	mov	w0, -1
-	b	.L1148
+	b	.L1141
 	.size	FtlDiscard, .-FtlDiscard
 	.section	.text.allocate_new_data_superblock,"ax",@progbits
 	.align	2
@@ -8377,49 +8306,49 @@ allocate_new_data_superblock:
 	ldrh	w19, [x0]
 	str	x21, [sp, 32]
 	mov	x21, x0
-	adrp	x0, .LANCHOR5
-	ldrh	w0, [x0, #:lo12:.LANCHOR5]
+	adrp	x0, .LANCHOR4
+	ldrh	w0, [x0, #:lo12:.LANCHOR4]
 	cmp	w0, w19
-	bcs	.L1166
-	adrp	x1, .LANCHOR168
+	bcs	.L1161
+	adrp	x1, .LANCHOR167
 	adrp	x0, .LC1
-	mov	w2, 2755
-	add	x1, x1, :lo12:.LANCHOR168
+	mov	w2, 2759
+	add	x1, x1, :lo12:.LANCHOR167
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1166:
+.L1161:
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1167
-	adrp	x1, .LANCHOR42
+	beq	.L1162
+	adrp	x1, .LANCHOR41
 	ubfiz	x0, x19, 1, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR42]
+	ldr	x1, [x1, #:lo12:.LANCHOR41]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1168
+	cbz	w0, .L1163
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-.L1167:
-	adrp	x1, .LANCHOR131
+.L1162:
+	adrp	x1, .LANCHOR130
 	mov	w0, 1
 	strb	w0, [x21, 8]
 	mov	w2, 65535
-	ldrh	w0, [x1, #:lo12:.LANCHOR131]
+	ldrh	w0, [x1, #:lo12:.LANCHOR130]
 	mov	x20, x1
 	cmp	w0, w2
-	beq	.L1169
+	beq	.L1164
 	cmp	w19, w0
-	bne	.L1170
-	adrp	x2, .LANCHOR42
+	bne	.L1165
+	adrp	x2, .LANCHOR41
 	ubfiz	x1, x0, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR42]
+	ldr	x2, [x2, #:lo12:.LANCHOR41]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1171
-.L1170:
+	cbz	w1, .L1166
+.L1165:
 	bl	update_vpc_list
-.L1171:
+.L1166:
 	mov	w0, -1
-	strh	w0, [x20, #:lo12:.LANCHOR131]
-.L1169:
+	strh	w0, [x20, #:lo12:.LANCHOR130]
+.L1164:
 	mov	x0, x21
 	bl	allocate_data_superblock
 	bl	l2p_flush
@@ -8431,10 +8360,10 @@ allocate_new_data_superblock:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1168:
+.L1163:
 	mov	w0, w19
 	bl	INSERT_FREE_LIST
-	b	.L1167
+	b	.L1162
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
 	.section	.text.FtlProgPages,"ax",@progbits
 	.align	2
@@ -8454,18 +8383,18 @@ FtlProgPages:
 	add	x21, x21, 4
 	ldrb	w3, [x3, 9]
 	adrp	x23, .LC40
-	adrp	x24, .LANCHOR3
+	adrp	x24, .LANCHOR2
 	add	x19, x22, 4
 	add	x21, x22, x21
 	add	x23, x23, :lo12:.LC40
-	add	x24, x24, :lo12:.LANCHOR3
+	add	x24, x24, :lo12:.LANCHOR2
 	bl	FlashProgPages
-.L1177:
+.L1172:
 	cmp	x21, x19
-	beq	.L1183
+	beq	.L1178
 	sub	x22, x19, #4
-	b	.L1184
-.L1179:
+	b	.L1179
+.L1174:
 	ldr	w1, [x19]
 	mov	x0, x23
 	bl	printf
@@ -8474,10 +8403,10 @@ FtlProgPages:
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
 	ldrh	w0, [x20, 4]
-	cbnz	w0, .L1178
+	cbnz	w0, .L1173
 	mov	x0, x20
 	bl	allocate_new_data_superblock
-.L1178:
+.L1173:
 	mov	x0, x20
 	bl	get_new_active_ppa
 	str	w0, [x19]
@@ -8487,22 +8416,22 @@ FtlProgPages:
 	ldrb	w3, [x20, 9]
 	mov	x0, x22
 	bl	FlashProgPages
-.L1184:
+.L1179:
 	ldr	w2, [x19, -4]
 	cmp	w2, 256
 	ccmn	w2, #1, 4, ne
-	beq	.L1179
+	beq	.L1174
 	ldrb	w1, [x20, 6]
 	ldrh	w0, [x24]
 	cmp	w1, w0
-	bcc	.L1180
-	adrp	x1, .LANCHOR169
+	bcc	.L1175
+	adrp	x1, .LANCHOR168
 	adrp	x0, .LC1
 	mov	w2, 985
-	add	x1, x1, :lo12:.LANCHOR169
+	add	x1, x1, :lo12:.LANCHOR168
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1180:
+.L1175:
 	add	x1, x29, 80
 	ldr	w0, [x22, 4]
 	mov	w2, 1
@@ -8516,35 +8445,35 @@ FtlProgPages:
 	and	w1, w0, 65535
 	mov	w22, w1
 	cmn	w3, #1
-	beq	.L1181
-	adrp	x2, .LANCHOR42
+	beq	.L1176
+	adrp	x2, .LANCHOR41
 	ubfiz	x0, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR42]
+	ldr	x2, [x2, #:lo12:.LANCHOR41]
 	ldrh	w0, [x2, x0]
-	cbnz	w0, .L1182
+	cbnz	w0, .L1177
 	adrp	x0, .LC41
 	mov	w2, 0
 	add	x0, x0, :lo12:.LC41
 	bl	printf
-.L1182:
+.L1177:
 	mov	w0, w22
 	bl	decrement_vpc_count
-.L1181:
+.L1176:
 	add	x19, x19, 32
-	b	.L1177
-.L1183:
-	adrp	x0, .LANCHOR3
+	b	.L1172
+.L1178:
+	adrp	x0, .LANCHOR2
 	ldrb	w1, [x20, 6]
-	ldrh	w0, [x0, #:lo12:.LANCHOR3]
+	ldrh	w0, [x0, #:lo12:.LANCHOR2]
 	cmp	w1, w0
-	bcc	.L1176
-	adrp	x1, .LANCHOR169
+	bcc	.L1171
+	adrp	x1, .LANCHOR168
 	adrp	x0, .LC1
 	mov	w2, 1000
-	add	x1, x1, :lo12:.LANCHOR169
+	add	x1, x1, :lo12:.LANCHOR168
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1176:
+.L1171:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -8560,94 +8489,94 @@ FtlGcFreeTempBlock:
 	mov	w1, 65535
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR53
+	adrp	x19, .LANCHOR52
 	stp	x21, x22, [sp, 32]
-	ldrh	w2, [x19, #:lo12:.LANCHOR53]
+	ldrh	w2, [x19, #:lo12:.LANCHOR52]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w2, w1
 	stp	x27, x28, [sp, 80]
-	beq	.L1191
-	adrp	x1, .LANCHOR19
-	add	x0, x19, :lo12:.LANCHOR53
-	ldrh	w1, [x1, #:lo12:.LANCHOR19]
+	beq	.L1186
+	adrp	x1, .LANCHOR18
+	add	x0, x19, :lo12:.LANCHOR52
+	ldrh	w1, [x1, #:lo12:.LANCHOR18]
 	bl	FtlGcScanTempBlk
 	str	w0, [x29, 108]
-.L1191:
-	adrp	x0, .LANCHOR133
-	ldrh	w2, [x19, #:lo12:.LANCHOR53]
+.L1186:
+	adrp	x0, .LANCHOR132
+	ldrh	w2, [x19, #:lo12:.LANCHOR52]
 	mov	w1, 65535
-	str	wzr, [x0, #:lo12:.LANCHOR133]
+	str	wzr, [x0, #:lo12:.LANCHOR132]
 	cmp	w2, w1
-	add	x0, x19, :lo12:.LANCHOR53
-	beq	.L1193
+	add	x0, x19, :lo12:.LANCHOR52
+	beq	.L1188
 	ldrb	w1, [x0, 7]
-	adrp	x0, .LANCHOR19
-	adrp	x20, .LANCHOR70
+	adrp	x0, .LANCHOR18
+	adrp	x20, .LANCHOR69
 	mov	x21, x0
-	ldrh	w3, [x0, #:lo12:.LANCHOR19]
-	ldrh	w2, [x20, #:lo12:.LANCHOR70]
+	ldrh	w3, [x0, #:lo12:.LANCHOR18]
+	ldrh	w2, [x20, #:lo12:.LANCHOR69]
 	mul	w1, w1, w3
 	cmp	w2, w1
-	beq	.L1194
-	adrp	x1, .LANCHOR170
+	beq	.L1189
+	adrp	x1, .LANCHOR169
 	adrp	x0, .LC1
 	mov	w2, 164
-	add	x1, x1, :lo12:.LANCHOR170
+	add	x1, x1, :lo12:.LANCHOR169
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1194:
-	add	x0, x19, :lo12:.LANCHOR53
-	adrp	x22, .LANCHOR42
-	ldrh	w3, [x21, #:lo12:.LANCHOR19]
-	adrp	x25, .LANCHOR152
-	ldrh	w2, [x19, #:lo12:.LANCHOR53]
-	add	x26, x20, :lo12:.LANCHOR70
+.L1189:
+	add	x0, x19, :lo12:.LANCHOR52
+	adrp	x22, .LANCHOR41
+	ldrh	w3, [x21, #:lo12:.LANCHOR18]
+	adrp	x25, .LANCHOR151
+	ldrh	w2, [x19, #:lo12:.LANCHOR52]
+	add	x26, x20, :lo12:.LANCHOR69
 	ldrb	w0, [x0, 7]
-	add	x25, x25, :lo12:.LANCHOR152
-	ldr	x1, [x22, #:lo12:.LANCHOR42]
+	add	x25, x25, :lo12:.LANCHOR151
+	ldr	x1, [x22, #:lo12:.LANCHOR41]
 	mov	w21, 0
-	adrp	x27, .LANCHOR71
+	adrp	x27, .LANCHOR70
 	mul	w0, w0, w3
 	strh	w0, [x1, x2, lsl 1]
-	adrp	x1, .LANCHOR84
-	ldrh	w0, [x20, #:lo12:.LANCHOR70]
-	ldr	w2, [x1, #:lo12:.LANCHOR84]
+	adrp	x1, .LANCHOR83
+	ldrh	w0, [x20, #:lo12:.LANCHOR69]
+	ldr	w2, [x1, #:lo12:.LANCHOR83]
 	add	w0, w0, w2
-	str	w0, [x1, #:lo12:.LANCHOR84]
-.L1195:
+	str	w0, [x1, #:lo12:.LANCHOR83]
+.L1190:
 	ldrh	w0, [x26]
 	cmp	w0, w21
-	bhi	.L1199
+	bhi	.L1194
 	mov	w0, -1
 	bl	decrement_vpc_count
-	ldrh	w0, [x19, #:lo12:.LANCHOR53]
-	ldr	x2, [x22, #:lo12:.LANCHOR42]
+	ldrh	w0, [x19, #:lo12:.LANCHOR52]
+	ldr	x2, [x22, #:lo12:.LANCHOR41]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1200
+	cbz	w1, .L1195
 	bl	INSERT_DATA_LIST
-.L1201:
-	adrp	x0, .LANCHOR68
+.L1196:
+	adrp	x0, .LANCHOR67
 	mov	w21, -1
-	strh	wzr, [x20, #:lo12:.LANCHOR70]
-	strh	w21, [x19, #:lo12:.LANCHOR53]
-	strh	wzr, [x0, #:lo12:.LANCHOR68]
+	strh	wzr, [x20, #:lo12:.LANCHOR69]
+	strh	w21, [x19, #:lo12:.LANCHOR52]
+	strh	wzr, [x0, #:lo12:.LANCHOR67]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	adrp	x0, .LANCHOR145
-	strh	w21, [x0, #:lo12:.LANCHOR145]
-	adrp	x0, .LANCHOR48
-	ldrh	w1, [x0, #:lo12:.LANCHOR48]
-	adrp	x0, .LANCHOR171
-	ldrh	w0, [x0, #:lo12:.LANCHOR171]
+	adrp	x0, .LANCHOR144
+	strh	w21, [x0, #:lo12:.LANCHOR144]
+	adrp	x0, .LANCHOR47
+	ldrh	w1, [x0, #:lo12:.LANCHOR47]
+	adrp	x0, .LANCHOR170
+	ldrh	w0, [x0, #:lo12:.LANCHOR170]
 	add	w0, w0, w0, lsl 1
 	cmp	w1, w0, lsr 2
-	ble	.L1193
-	adrp	x0, .LANCHOR100
+	ble	.L1188
+	adrp	x0, .LANCHOR99
 	mov	w1, 20
-	strh	w1, [x0, #:lo12:.LANCHOR100]
-.L1193:
+	strh	w1, [x0, #:lo12:.LANCHOR99]
+.L1188:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -8656,26 +8585,26 @@ FtlGcFreeTempBlock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1199:
+.L1194:
 	mov	w24, 12
-	ldr	x28, [x27, #:lo12:.LANCHOR71]
+	ldr	x28, [x27, #:lo12:.LANCHOR70]
 	ldr	w1, [x25]
 	umull	x24, w21, w24
 	add	x23, x28, x24
 	ldr	w0, [x23, 8]
 	cmp	w0, w1
-	bcc	.L1196
-.L1204:
-	ldrh	w0, [x19, #:lo12:.LANCHOR53]
-	b	.L1205
-.L1196:
+	bcc	.L1191
+.L1199:
+	ldrh	w0, [x19, #:lo12:.LANCHOR52]
+	b	.L1200
+.L1191:
 	add	x1, x29, 108
 	mov	w2, 0
 	bl	log2phys
 	ldr	w0, [x28, x24]
 	ldr	w1, [x29, 108]
 	cmp	w0, w1
-	bne	.L1198
+	bne	.L1193
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	mov	w24, w0
@@ -8684,20 +8613,20 @@ FtlGcFreeTempBlock:
 	add	x1, x23, 4
 	bl	log2phys
 	mov	w0, w24
-.L1205:
+.L1200:
 	bl	decrement_vpc_count
-	b	.L1197
-.L1198:
+	b	.L1192
+.L1193:
 	ldr	w0, [x23, 4]
 	cmp	w1, w0
-	bne	.L1204
-.L1197:
+	bne	.L1199
+.L1192:
 	add	w21, w21, 1
 	and	w21, w21, 65535
-	b	.L1195
-.L1200:
+	b	.L1190
+.L1195:
 	bl	INSERT_FREE_LIST
-	b	.L1201
+	b	.L1196
 	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
 	.section	.text.FtlGcPageRecovery,"ax",@progbits
 	.align	2
@@ -8707,24 +8636,24 @@ FtlGcPageRecovery:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR19
-	adrp	x19, .LANCHOR53
-	add	x19, x19, :lo12:.LANCHOR53
-	ldrh	w1, [x20, #:lo12:.LANCHOR19]
+	adrp	x20, .LANCHOR18
+	adrp	x19, .LANCHOR52
+	add	x19, x19, :lo12:.LANCHOR52
+	ldrh	w1, [x20, #:lo12:.LANCHOR18]
 	mov	x0, x19
 	bl	FtlGcScanTempBlk
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x20, #:lo12:.LANCHOR19]
+	ldrh	w0, [x20, #:lo12:.LANCHOR18]
 	cmp	w1, w0
-	bcc	.L1206
-	adrp	x0, .LANCHOR129
-	add	x0, x0, :lo12:.LANCHOR129
+	bcc	.L1201
+	adrp	x0, .LANCHOR128
+	add	x0, x0, :lo12:.LANCHOR128
 	bl	FtlMapBlkWriteDump_data
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
-	adrp	x0, .LANCHOR133
-	str	wzr, [x0, #:lo12:.LANCHOR133]
-.L1206:
+	adrp	x0, .LANCHOR132
+	str	wzr, [x0, #:lo12:.LANCHOR132]
+.L1201:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -8735,18 +8664,18 @@ FtlGcPageRecovery:
 	.type	FtlPowerLostRecovery, %function
 FtlPowerLostRecovery:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR157
+	adrp	x0, .LANCHOR156
 	add	x29, sp, 0
 	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR51
-	add	x19, x19, :lo12:.LANCHOR51
-	str	wzr, [x0, #:lo12:.LANCHOR157]
+	adrp	x19, .LANCHOR50
+	add	x19, x19, :lo12:.LANCHOR50
+	str	wzr, [x0, #:lo12:.LANCHOR156]
 	mov	x0, x19
 	bl	FtlRecoverySuperblock
 	mov	x0, x19
-	adrp	x19, .LANCHOR52
+	adrp	x19, .LANCHOR51
 	bl	FtlSlcSuperblockCheck
-	add	x19, x19, :lo12:.LANCHOR52
+	add	x19, x19, :lo12:.LANCHOR51
 	mov	x0, x19
 	bl	FtlRecoverySuperblock
 	mov	x0, x19
@@ -8769,51 +8698,51 @@ Ftl_gc_temp_data_write_back:
 	mov	w2, 0
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR62
-	adrp	x20, .LANCHOR104
-	ldr	w1, [x19, #:lo12:.LANCHOR62]
-	add	x19, x19, :lo12:.LANCHOR62
-	ldr	x0, [x20, #:lo12:.LANCHOR104]
+	adrp	x19, .LANCHOR61
+	adrp	x20, .LANCHOR103
+	ldr	w1, [x19, #:lo12:.LANCHOR61]
+	add	x19, x19, :lo12:.LANCHOR61
+	ldr	x0, [x20, #:lo12:.LANCHOR103]
 	bl	FlashProgPages
 	mov	w11, 0
-.L1212:
+.L1207:
 	ldr	w1, [x19]
 	cmp	w11, w1
-	bcc	.L1215
-	ldr	x0, [x20, #:lo12:.LANCHOR104]
+	bcc	.L1210
+	ldr	x0, [x20, #:lo12:.LANCHOR103]
 	bl	FtlGcBufFree
 	str	wzr, [x19]
-	adrp	x0, .LANCHOR53+4
-	ldrh	w0, [x0, #:lo12:.LANCHOR53+4]
-	cbnz	w0, .L1217
+	adrp	x0, .LANCHOR52+4
+	ldrh	w0, [x0, #:lo12:.LANCHOR52+4]
+	cbnz	w0, .L1212
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
 	mov	w0, 1
-.L1211:
+.L1206:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1215:
-	ldr	x2, [x20, #:lo12:.LANCHOR104]
+.L1210:
+	ldr	x2, [x20, #:lo12:.LANCHOR103]
 	ubfiz	x0, x11, 5, 16
 	add	x1, x2, x0
 	ldr	w2, [x2, x0]
 	ldr	x3, [x1, 16]
 	cmn	w2, #1
-	bne	.L1213
-.L1219:
+	bne	.L1208
+.L1214:
 	ldr	w1, [x1, 4]
 	ldr	w0, [x3, 12]
 	bl	FtlGcUpdatePage
 	add	w11, w11, 1
 	and	w11, w11, 65535
-	b	.L1212
-.L1213:
+	b	.L1207
+.L1208:
 	ldr	w2, [x3, 8]
-	b	.L1219
-.L1217:
+	b	.L1214
+.L1212:
 	mov	w0, 0
-	b	.L1211
+	b	.L1206
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
 	.section	.text.Ftl_get_new_temp_ppa,"ax",@progbits
 	.align	2
@@ -8821,33 +8750,33 @@ Ftl_gc_temp_data_write_back:
 	.type	Ftl_get_new_temp_ppa, %function
 Ftl_get_new_temp_ppa:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR53
+	adrp	x0, .LANCHOR52
 	mov	w2, 65535
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	mov	x19, x0
-	ldrh	w3, [x0, #:lo12:.LANCHOR53]
+	ldrh	w3, [x0, #:lo12:.LANCHOR52]
 	cmp	w3, w2
-	beq	.L1221
-	add	x1, x0, :lo12:.LANCHOR53
+	beq	.L1216
+	add	x1, x0, :lo12:.LANCHOR52
 	ldrh	w0, [x1, 4]
-	cbnz	w0, .L1222
-.L1221:
+	cbnz	w0, .L1217
+.L1216:
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
-	add	x0, x19, :lo12:.LANCHOR53
+	add	x0, x19, :lo12:.LANCHOR52
 	strb	wzr, [x0, 8]
 	bl	allocate_data_superblock
-	adrp	x0, .LANCHOR68
-	strh	wzr, [x0, #:lo12:.LANCHOR68]
-	adrp	x0, .LANCHOR70
-	strh	wzr, [x0, #:lo12:.LANCHOR70]
+	adrp	x0, .LANCHOR67
+	strh	wzr, [x0, #:lo12:.LANCHOR67]
+	adrp	x0, .LANCHOR69
+	strh	wzr, [x0, #:lo12:.LANCHOR69]
 	bl	l2p_flush
 	mov	w0, 0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1222:
-	add	x0, x19, :lo12:.LANCHOR53
+.L1217:
+	add	x0, x19, :lo12:.LANCHOR52
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	get_new_active_ppa
@@ -8860,75 +8789,75 @@ rk_ftl_garbage_collect:
 	stp	x29, x30, [sp, -176]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR94
+	adrp	x21, .LANCHOR93
 	stp	x19, x20, [sp, 16]
-	ldr	w1, [x21, #:lo12:.LANCHOR94]
+	ldr	w1, [x21, #:lo12:.LANCHOR93]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w1, .L1281
-	adrp	x1, .LANCHOR44
-	ldrh	w1, [x1, #:lo12:.LANCHOR44]
+	cbnz	w1, .L1276
+	adrp	x1, .LANCHOR43
+	ldrh	w1, [x1, #:lo12:.LANCHOR43]
 	cmp	w1, 47
-	bls	.L1281
-	adrp	x1, .LANCHOR73
+	bls	.L1276
+	adrp	x1, .LANCHOR72
 	mov	w4, 65535
-	ldrh	w3, [x1, #:lo12:.LANCHOR73]
+	ldrh	w3, [x1, #:lo12:.LANCHOR72]
 	cmp	w3, w4
-	beq	.L1226
-	adrp	x2, .LANCHOR72
-	ldrh	w5, [x2, #:lo12:.LANCHOR72]
+	beq	.L1221
+	adrp	x2, .LANCHOR71
+	ldrh	w5, [x2, #:lo12:.LANCHOR71]
 	cmp	w5, w4
-	bne	.L1226
-	strh	w3, [x2, #:lo12:.LANCHOR72]
+	bne	.L1221
+	strh	w3, [x2, #:lo12:.LANCHOR71]
 	mov	w2, -1
-	strh	w2, [x1, #:lo12:.LANCHOR73]
-.L1226:
-	cbnz	w0, .L1282
-	adrp	x1, .LANCHOR48
-	ldrh	w1, [x1, #:lo12:.LANCHOR48]
+	strh	w2, [x1, #:lo12:.LANCHOR72]
+.L1221:
+	cbnz	w0, .L1277
+	adrp	x1, .LANCHOR47
+	ldrh	w1, [x1, #:lo12:.LANCHOR47]
 	cmp	w1, 24
-	bhi	.L1283
-	adrp	x2, .LANCHOR19
+	bhi	.L1278
+	adrp	x2, .LANCHOR18
 	cmp	w1, 16
-	ldrh	w20, [x2, #:lo12:.LANCHOR19]
-	bls	.L1229
+	ldrh	w20, [x2, #:lo12:.LANCHOR18]
+	bls	.L1224
 	lsr	w20, w20, 5
-.L1228:
-	adrp	x2, .LANCHOR100
-	ldrh	w3, [x2, #:lo12:.LANCHOR100]
+.L1223:
+	adrp	x2, .LANCHOR99
+	ldrh	w3, [x2, #:lo12:.LANCHOR99]
 	cmp	w3, w1
 	mov	x3, x2
-	bcs	.L1232
-	adrp	x1, .LANCHOR53
+	bcs	.L1227
+	adrp	x1, .LANCHOR52
 	mov	w4, 65535
-	ldrh	w1, [x1, #:lo12:.LANCHOR53]
+	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	cmp	w1, w4
-	bne	.L1233
-	adrp	x4, .LANCHOR72
-	ldrh	w4, [x4, #:lo12:.LANCHOR72]
+	bne	.L1228
+	adrp	x4, .LANCHOR71
+	ldrh	w4, [x4, #:lo12:.LANCHOR71]
 	cmp	w4, w1
-	bne	.L1233
-	adrp	x0, .LANCHOR172
-	ldrh	w0, [x0, #:lo12:.LANCHOR172]
-	cbnz	w0, .L1234
-	adrp	x1, .LANCHOR152
-	adrp	x4, .LANCHOR59
-	ldr	w1, [x1, #:lo12:.LANCHOR152]
-	ldr	w4, [x4, #:lo12:.LANCHOR59]
+	bne	.L1228
+	adrp	x0, .LANCHOR171
+	ldrh	w0, [x0, #:lo12:.LANCHOR171]
+	cbnz	w0, .L1229
+	adrp	x1, .LANCHOR151
+	adrp	x4, .LANCHOR58
+	ldr	w1, [x1, #:lo12:.LANCHOR151]
+	ldr	w4, [x4, #:lo12:.LANCHOR58]
 	add	w1, w1, w1, lsl 1
 	cmp	w4, w1, lsr 2
-	bcs	.L1235
-.L1234:
-	adrp	x1, .LANCHOR171
-	ldrh	w1, [x1, #:lo12:.LANCHOR171]
+	bcs	.L1230
+.L1229:
+	adrp	x1, .LANCHOR170
+	ldrh	w1, [x1, #:lo12:.LANCHOR170]
 	add	w1, w1, w1, lsl 1
 	asr	w1, w1, 2
-	strh	w1, [x3, #:lo12:.LANCHOR100]
-.L1236:
-	adrp	x1, .LANCHOR95
-	str	wzr, [x1, #:lo12:.LANCHOR95]
-.L1224:
+	strh	w1, [x3, #:lo12:.LANCHOR99]
+.L1231:
+	adrp	x1, .LANCHOR94
+	str	wzr, [x1, #:lo12:.LANCHOR94]
+.L1219:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -8936,371 +8865,371 @@ rk_ftl_garbage_collect:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1229:
+.L1224:
 	cmp	w1, 12
-	bls	.L1230
+	bls	.L1225
 	lsr	w20, w20, 4
-	b	.L1228
-.L1230:
+	b	.L1223
+.L1225:
 	cmp	w1, 8
-	bls	.L1228
+	bls	.L1223
 	lsr	w20, w20, 2
-	b	.L1228
-.L1283:
+	b	.L1223
+.L1278:
 	mov	w20, 1
-	b	.L1228
-.L1235:
+	b	.L1223
+.L1230:
 	mov	w1, 18
-	strh	w1, [x2, #:lo12:.LANCHOR100]
-	b	.L1236
-.L1233:
-	adrp	x1, .LANCHOR171
-	ldrh	w1, [x1, #:lo12:.LANCHOR171]
+	strh	w1, [x2, #:lo12:.LANCHOR99]
+	b	.L1231
+.L1228:
+	adrp	x1, .LANCHOR170
+	ldrh	w1, [x1, #:lo12:.LANCHOR170]
 	add	w1, w1, w1, lsl 1
 	asr	w1, w1, 2
-	strh	w1, [x3, #:lo12:.LANCHOR100]
-.L1232:
-	adrp	x1, .LANCHOR74
-	ldrh	w1, [x1, #:lo12:.LANCHOR74]
-	cbz	w1, .L1227
+	strh	w1, [x3, #:lo12:.LANCHOR99]
+.L1227:
+	adrp	x1, .LANCHOR73
+	ldrh	w1, [x1, #:lo12:.LANCHOR73]
+	cbz	w1, .L1222
 	add	w20, w20, 32
 	and	w20, w20, 65535
-.L1227:
-	adrp	x19, .LANCHOR145
+.L1222:
+	adrp	x19, .LANCHOR144
 	str	w0, [x29, 152]
 	mov	w0, 65535
-	ldrh	w2, [x19, #:lo12:.LANCHOR145]
+	ldrh	w2, [x19, #:lo12:.LANCHOR144]
 	cmp	w2, w0
-	bne	.L1239
-	adrp	x0, .LANCHOR72
-	ldrh	w1, [x0, #:lo12:.LANCHOR72]
+	bne	.L1234
+	adrp	x0, .LANCHOR71
+	ldrh	w1, [x0, #:lo12:.LANCHOR71]
 	cmp	w1, w2
-	beq	.L1240
-	adrp	x2, .LANCHOR42
+	beq	.L1235
+	adrp	x2, .LANCHOR41
 	ubfiz	x1, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR42]
+	ldr	x2, [x2, #:lo12:.LANCHOR41]
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L1241
+	cbnz	w1, .L1236
 	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR72]
-.L1241:
-	ldrh	w1, [x0, #:lo12:.LANCHOR72]
-	strh	w1, [x19, #:lo12:.LANCHOR145]
+	strh	w1, [x0, #:lo12:.LANCHOR71]
+.L1236:
+	ldrh	w1, [x0, #:lo12:.LANCHOR71]
+	strh	w1, [x19, #:lo12:.LANCHOR144]
 	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR72]
-.L1240:
-	add	x0, x19, :lo12:.LANCHOR145
+	strh	w1, [x0, #:lo12:.LANCHOR71]
+.L1235:
+	add	x0, x19, :lo12:.LANCHOR144
 	mov	w1, 65535
 	strb	wzr, [x0, 8]
-	ldrh	w0, [x19, #:lo12:.LANCHOR145]
+	ldrh	w0, [x19, #:lo12:.LANCHOR144]
 	cmp	w0, w1
-	beq	.L1239
+	beq	.L1234
 	bl	IsBlkInGcList
-	cbz	w0, .L1243
+	cbz	w0, .L1238
 	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR145]
-.L1243:
-	ldrh	w1, [x19, #:lo12:.LANCHOR145]
+	strh	w0, [x19, #:lo12:.LANCHOR144]
+.L1238:
+	ldrh	w1, [x19, #:lo12:.LANCHOR144]
 	mov	w0, 65535
-	add	x22, x19, :lo12:.LANCHOR145
+	add	x22, x19, :lo12:.LANCHOR144
 	cmp	w1, w0
-	beq	.L1239
+	beq	.L1234
 	mov	x0, x22
 	bl	make_superblock
-	adrp	x0, .LANCHOR173
-	ldrh	w1, [x19, #:lo12:.LANCHOR145]
+	adrp	x0, .LANCHOR172
+	ldrh	w1, [x19, #:lo12:.LANCHOR144]
 	strh	wzr, [x22, 2]
-	strh	wzr, [x0, #:lo12:.LANCHOR173]
-	adrp	x0, .LANCHOR42
+	strh	wzr, [x0, #:lo12:.LANCHOR172]
+	adrp	x0, .LANCHOR41
 	strb	wzr, [x22, 6]
-	ldr	x0, [x0, #:lo12:.LANCHOR42]
+	ldr	x0, [x0, #:lo12:.LANCHOR41]
 	ldrh	w1, [x0, x1, lsl 1]
-	adrp	x0, .LANCHOR174
-	strh	w1, [x0, #:lo12:.LANCHOR174]
-.L1239:
-	adrp	x1, .LANCHOR51
-	ldrh	w0, [x19, #:lo12:.LANCHOR145]
+	adrp	x0, .LANCHOR173
+	strh	w1, [x0, #:lo12:.LANCHOR173]
+.L1234:
+	adrp	x1, .LANCHOR50
+	ldrh	w0, [x19, #:lo12:.LANCHOR144]
 	str	x1, [x29, 128]
-	ldrh	w2, [x1, #:lo12:.LANCHOR51]
+	ldrh	w2, [x1, #:lo12:.LANCHOR50]
 	cmp	w2, w0
-	beq	.L1244
+	beq	.L1239
+	adrp	x1, .LANCHOR51
+	ldrh	w1, [x1, #:lo12:.LANCHOR51]
+	cmp	w1, w0
+	beq	.L1239
 	adrp	x1, .LANCHOR52
 	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	beq	.L1244
-	adrp	x1, .LANCHOR53
-	ldrh	w1, [x1, #:lo12:.LANCHOR53]
-	cmp	w1, w0
-	bne	.L1245
-.L1244:
+	bne	.L1240
+.L1239:
 	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR145]
-.L1245:
-	adrp	x25, .LANCHOR102
-	add	x26, x25, :lo12:.LANCHOR102
-.L1279:
-	ldrh	w1, [x19, #:lo12:.LANCHOR145]
+	strh	w0, [x19, #:lo12:.LANCHOR144]
+.L1240:
+	adrp	x25, .LANCHOR101
+	add	x26, x25, :lo12:.LANCHOR101
+.L1274:
+	ldrh	w1, [x19, #:lo12:.LANCHOR144]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1246
-	adrp	x0, .LANCHOR95
-	adrp	x22, .LANCHOR19
-	add	x22, x22, :lo12:.LANCHOR19
-	str	wzr, [x0, #:lo12:.LANCHOR95]
-.L1247:
-	ldrh	w5, [x25, #:lo12:.LANCHOR102]
-	add	x7, x25, :lo12:.LANCHOR102
+	bne	.L1241
+	adrp	x0, .LANCHOR94
+	adrp	x22, .LANCHOR18
+	add	x22, x22, :lo12:.LANCHOR18
+	str	wzr, [x0, #:lo12:.LANCHOR94]
+.L1242:
+	ldrh	w5, [x25, #:lo12:.LANCHOR101]
+	add	x7, x25, :lo12:.LANCHOR101
 	mov	w0, w5
 	bl	List_get_gc_head_node
 	and	w6, w0, 65535
-	strh	w6, [x19, #:lo12:.LANCHOR145]
+	strh	w6, [x19, #:lo12:.LANCHOR144]
 	mov	w0, 65535
 	cmp	w6, w0
-	bne	.L1248
+	bne	.L1243
 	strh	wzr, [x7]
 	mov	w0, 8
-	b	.L1224
-.L1282:
+	b	.L1219
+.L1277:
 	mov	w20, 1
-	b	.L1227
-.L1248:
+	b	.L1222
+.L1243:
 	mov	w0, w6
 	bl	IsBlkInGcList
 	add	w5, w5, 1
-	cbz	w0, .L1249
-	strh	w5, [x25, #:lo12:.LANCHOR102]
-	b	.L1247
-.L1249:
-	adrp	x23, .LANCHOR42
-	adrp	x4, .LANCHOR3
+	cbz	w0, .L1244
+	strh	w5, [x25, #:lo12:.LANCHOR101]
+	b	.L1242
+.L1244:
+	adrp	x23, .LANCHOR41
+	adrp	x4, .LANCHOR2
 	ldrh	w0, [x22]
 	ubfiz	x1, x6, 1, 16
-	ldr	x2, [x23, #:lo12:.LANCHOR42]
+	ldr	x2, [x23, #:lo12:.LANCHOR41]
 	and	w5, w5, 65535
-	ldrh	w4, [x4, #:lo12:.LANCHOR3]
-	strh	w5, [x25, #:lo12:.LANCHOR102]
+	ldrh	w4, [x4, #:lo12:.LANCHOR2]
+	strh	w5, [x25, #:lo12:.LANCHOR101]
 	ldrh	w3, [x2, x1]
 	mul	w0, w0, w4
 	cmp	w3, w0, asr 1
-	bgt	.L1251
+	bgt	.L1246
 	cmp	w5, 48
-	bls	.L1252
+	bls	.L1247
 	cmp	w3, 8
-	bls	.L1252
-	adrp	x3, .LANCHOR68
-	ldrh	w3, [x3, #:lo12:.LANCHOR68]
+	bls	.L1247
+	adrp	x3, .LANCHOR67
+	ldrh	w3, [x3, #:lo12:.LANCHOR67]
 	cmp	w3, 35
-	bhi	.L1252
-.L1251:
+	bhi	.L1247
+.L1246:
 	strh	wzr, [x26]
-.L1252:
+.L1247:
 	ldrh	w1, [x2, x1]
 	cmp	w0, w1
-	bgt	.L1253
+	bgt	.L1248
 	ldrh	w0, [x26]
 	cmp	w0, 3
-	bhi	.L1253
+	bhi	.L1248
 	mov	w0, -1
 	strh	wzr, [x26]
-	strh	w0, [x19, #:lo12:.LANCHOR145]
-.L1312:
-	adrp	x0, .LANCHOR172
-	ldrh	w0, [x0, #:lo12:.LANCHOR172]
-	b	.L1224
-.L1253:
-	cbnz	w1, .L1254
+	strh	w0, [x19, #:lo12:.LANCHOR144]
+.L1307:
+	adrp	x0, .LANCHOR171
+	ldrh	w0, [x0, #:lo12:.LANCHOR171]
+	b	.L1219
+.L1248:
+	cbnz	w1, .L1249
 	mov	w0, -1
 	bl	decrement_vpc_count
 	ldrh	w0, [x26]
 	add	w0, w0, 1
 	strh	w0, [x26]
-	b	.L1247
-.L1254:
-	add	x0, x19, :lo12:.LANCHOR145
+	b	.L1242
+.L1249:
+	add	x0, x19, :lo12:.LANCHOR144
 	strb	wzr, [x0, 8]
 	ldr	x0, [x29, 128]
-	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+	ldrh	w0, [x0, #:lo12:.LANCHOR50]
 	cmp	w0, w6
-	bne	.L1255
-	adrp	x1, .LANCHOR175
+	bne	.L1250
+	adrp	x1, .LANCHOR174
 	adrp	x0, .LC1
 	mov	w2, 717
-	add	x1, x1, :lo12:.LANCHOR175
+	add	x1, x1, :lo12:.LANCHOR174
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1255:
-	adrp	x0, .LANCHOR52
-	ldrh	w1, [x19, #:lo12:.LANCHOR145]
-	ldrh	w0, [x0, #:lo12:.LANCHOR52]
+.L1250:
+	adrp	x0, .LANCHOR51
+	ldrh	w1, [x19, #:lo12:.LANCHOR144]
+	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w1, w0
-	bne	.L1256
-	adrp	x1, .LANCHOR175
+	bne	.L1251
+	adrp	x1, .LANCHOR174
 	adrp	x0, .LC1
 	mov	w2, 718
-	add	x1, x1, :lo12:.LANCHOR175
+	add	x1, x1, :lo12:.LANCHOR174
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1256:
-	adrp	x0, .LANCHOR53
-	ldrh	w1, [x19, #:lo12:.LANCHOR145]
-	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+.L1251:
+	adrp	x0, .LANCHOR52
+	ldrh	w1, [x19, #:lo12:.LANCHOR144]
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bne	.L1257
-	adrp	x1, .LANCHOR175
+	bne	.L1252
+	adrp	x1, .LANCHOR174
 	adrp	x0, .LC1
 	mov	w2, 719
-	add	x1, x1, :lo12:.LANCHOR175
+	add	x1, x1, :lo12:.LANCHOR174
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1257:
-	add	x22, x19, :lo12:.LANCHOR145
+.L1252:
+	add	x22, x19, :lo12:.LANCHOR144
 	mov	x0, x22
 	bl	make_superblock
-	adrp	x0, .LANCHOR173
-	ldrh	w1, [x19, #:lo12:.LANCHOR145]
-	strh	wzr, [x0, #:lo12:.LANCHOR173]
-	ldr	x0, [x23, #:lo12:.LANCHOR42]
+	adrp	x0, .LANCHOR172
+	ldrh	w1, [x19, #:lo12:.LANCHOR144]
+	strh	wzr, [x0, #:lo12:.LANCHOR172]
+	ldr	x0, [x23, #:lo12:.LANCHOR41]
 	ldrh	w1, [x0, x1, lsl 1]
-	adrp	x0, .LANCHOR174
+	adrp	x0, .LANCHOR173
 	strh	wzr, [x22, 2]
-	strh	w1, [x0, #:lo12:.LANCHOR174]
+	strh	w1, [x0, #:lo12:.LANCHOR173]
 	strb	wzr, [x22, 6]
-.L1246:
+.L1241:
 	mov	w0, 1
-	str	w0, [x21, #:lo12:.LANCHOR94]
-	adrp	x0, .LANCHOR19
+	str	w0, [x21, #:lo12:.LANCHOR93]
+	adrp	x0, .LANCHOR18
 	str	x0, [x29, 120]
-	ldrh	w1, [x0, #:lo12:.LANCHOR19]
+	ldrh	w1, [x0, #:lo12:.LANCHOR18]
 	ldr	w0, [x29, 152]
 	str	w1, [x29, 156]
-	cbz	w0, .L1258
-	adrp	x0, .LANCHOR3
-	ldrh	w2, [x19, #:lo12:.LANCHOR145]
-	ldrh	w0, [x0, #:lo12:.LANCHOR3]
+	cbz	w0, .L1253
+	adrp	x0, .LANCHOR2
+	ldrh	w2, [x19, #:lo12:.LANCHOR144]
+	ldrh	w0, [x0, #:lo12:.LANCHOR2]
 	mul	w0, w0, w1
-	adrp	x1, .LANCHOR42
-	ldr	x1, [x1, #:lo12:.LANCHOR42]
+	adrp	x1, .LANCHOR41
+	ldr	x1, [x1, #:lo12:.LANCHOR41]
 	ldrh	w1, [x1, x2, lsl 1]
 	sub	w0, w0, w1
 	mov	w1, 4
 	sdiv	w0, w0, w1
 	add	w20, w20, w0
 	and	w20, w20, 65535
-.L1258:
-	add	x0, x19, :lo12:.LANCHOR145
+.L1253:
+	add	x0, x19, :lo12:.LANCHOR144
 	ldr	w2, [x29, 156]
 	ldrh	w0, [x0, 2]
 	add	w1, w0, w20
 	cmp	w1, w2
-	ble	.L1259
+	ble	.L1254
 	sub	w20, w2, w0
 	and	w20, w20, 65535
-.L1259:
-	adrp	x0, .LANCHOR173
+.L1254:
+	adrp	x0, .LANCHOR172
 	mov	w28, 0
-	add	x0, x0, :lo12:.LANCHOR173
+	add	x0, x0, :lo12:.LANCHOR172
 	str	x0, [x29, 144]
-.L1260:
+.L1255:
 	cmp	w20, w28, uxth
-	bls	.L1268
-	add	x1, x19, :lo12:.LANCHOR145
-	adrp	x0, .LANCHOR3
-	adrp	x23, .LANCHOR66
+	bls	.L1263
+	add	x1, x19, :lo12:.LANCHOR144
+	adrp	x0, .LANCHOR2
+	adrp	x23, .LANCHOR65
 	add	x1, x1, 16
-	ldrh	w7, [x0, #:lo12:.LANCHOR3]
+	ldrh	w7, [x0, #:lo12:.LANCHOR2]
 	mov	w22, 0
 	ldrh	w4, [x1, -14]
 	mov	w2, 0
-	ldr	x0, [x23, #:lo12:.LANCHOR66]
+	ldr	x0, [x23, #:lo12:.LANCHOR65]
 	mov	w6, 65535
 	add	w4, w4, w28
-	b	.L1269
-.L1262:
+	b	.L1264
+.L1257:
 	ldrh	w3, [x1]
 	cmp	w3, w6
-	beq	.L1261
+	beq	.L1256
 	ubfiz	x5, x22, 5, 16
 	add	w22, w22, 1
 	add	x5, x0, x5
 	and	w22, w22, 65535
 	orr	w3, w4, w3, lsl 10
 	str	w3, [x5, 4]
-.L1261:
+.L1256:
 	add	w2, w2, 1
 	add	x1, x1, 2
 	and	w2, w2, 65535
-.L1269:
+.L1264:
 	cmp	w2, w7
-	bne	.L1262
-	add	x1, x19, :lo12:.LANCHOR145
-	adrp	x24, .LANCHOR62
-	add	x24, x24, :lo12:.LANCHOR62
+	bne	.L1257
+	add	x1, x19, :lo12:.LANCHOR144
+	adrp	x24, .LANCHOR61
+	add	x24, x24, :lo12:.LANCHOR61
 	ldrb	w2, [x1, 8]
 	mov	w1, w22
 	bl	FlashReadPages
 	ubfiz	x0, x22, 5, 16
 	mov	x22, 0
 	str	x0, [x29, 136]
-.L1263:
+.L1258:
 	ldr	x0, [x29, 136]
 	cmp	x22, x0
-	bne	.L1267
+	bne	.L1262
 	add	w28, w28, 1
-	b	.L1260
-.L1267:
-	ldr	x0, [x23, #:lo12:.LANCHOR66]
+	b	.L1255
+.L1262:
+	ldr	x0, [x23, #:lo12:.LANCHOR65]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	beq	.L1264
+	beq	.L1259
 	ldr	x27, [x1, 16]
 	mov	w0, 61589
 	ldrh	w1, [x27]
 	cmp	w1, w0
-	bne	.L1264
+	bne	.L1259
 	ldr	w4, [x27, 8]
 	cmn	w4, #1
-	bne	.L1265
+	bne	.L1260
 	str	w4, [x29, 112]
 	mov	w2, 753
-	adrp	x1, .LANCHOR175
+	adrp	x1, .LANCHOR174
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR175
+	add	x1, x1, :lo12:.LANCHOR174
 	add	x0, x0, :lo12:.LC1
 	bl	printf
 	ldr	w4, [x29, 112]
-.L1265:
+.L1260:
 	mov	w2, 0
 	add	x1, x29, 168
 	mov	w0, w4
 	bl	log2phys
-	ldr	x0, [x23, #:lo12:.LANCHOR66]
+	ldr	x0, [x23, #:lo12:.LANCHOR65]
 	ldr	w1, [x29, 168]
 	add	x0, x0, x22
 	ldr	w2, [x0, 4]
 	cmp	w2, w1
-	bne	.L1264
+	bne	.L1259
 	ldr	x1, [x29, 144]
-	adrp	x4, .LANCHOR104
+	adrp	x4, .LANCHOR103
 	ldr	x2, [x29, 144]
 	ldr	w0, [x0, 24]
 	ldrh	w1, [x1]
 	add	w1, w1, 1
 	strh	w1, [x2]
-	ldr	x2, [x4, #:lo12:.LANCHOR104]
+	ldr	x2, [x4, #:lo12:.LANCHOR103]
 	ldr	w1, [x24]
 	add	x1, x2, x1, lsl 5
 	stp	x4, x1, [x29, 104]
 	str	w0, [x1, 24]
 	bl	Ftl_get_new_temp_ppa
 	ldp	x4, x1, [x29, 104]
-	ldr	x2, [x4, #:lo12:.LANCHOR104]
+	ldr	x2, [x4, #:lo12:.LANCHOR103]
 	str	w0, [x1, 4]
 	ldr	w1, [x24]
 	ubfiz	x0, x1, 5, 32
 	add	w1, w1, 1
 	add	x2, x2, x0
-	ldr	x0, [x23, #:lo12:.LANCHOR66]
+	ldr	x0, [x23, #:lo12:.LANCHOR65]
 	add	x0, x0, x22
 	ldr	x4, [x0, 8]
 	str	x4, [x2, 8]
@@ -9308,124 +9237,124 @@ rk_ftl_garbage_collect:
 	str	x4, [x2, 16]
 	ldr	w2, [x29, 168]
 	str	w2, [x27, 12]
-	adrp	x2, .LANCHOR53
-	add	x11, x2, :lo12:.LANCHOR53
-	ldrh	w2, [x2, #:lo12:.LANCHOR53]
+	adrp	x2, .LANCHOR52
+	add	x11, x2, :lo12:.LANCHOR52
+	ldrh	w2, [x2, #:lo12:.LANCHOR52]
 	strh	w2, [x27, 2]
-	adrp	x2, .LANCHOR83
+	adrp	x2, .LANCHOR82
 	str	w1, [x24]
 	mov	w1, 1
-	ldr	w2, [x2, #:lo12:.LANCHOR83]
+	ldr	w2, [x2, #:lo12:.LANCHOR82]
 	str	w2, [x27, 4]
 	bl	FtlGcBufAlloc
 	ldrb	w1, [x11, 7]
 	ldr	w0, [x24]
 	cmp	w1, w0
-	beq	.L1266
+	beq	.L1261
 	ldrh	w0, [x11, 4]
-	cbnz	w0, .L1264
-.L1266:
+	cbnz	w0, .L1259
+.L1261:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	w0, .L1264
-	add	x0, x19, :lo12:.LANCHOR145
+	cbz	w0, .L1259
+	add	x0, x19, :lo12:.LANCHOR144
 	mov	w1, -1
-	str	wzr, [x21, #:lo12:.LANCHOR94]
-	strh	w1, [x19, #:lo12:.LANCHOR145]
+	str	wzr, [x21, #:lo12:.LANCHOR93]
+	strh	w1, [x19, #:lo12:.LANCHOR144]
 	strh	wzr, [x0, 2]
-	b	.L1312
-.L1264:
+	b	.L1307
+.L1259:
 	add	x22, x22, 32
-	b	.L1263
-.L1268:
-	add	x1, x19, :lo12:.LANCHOR145
+	b	.L1258
+.L1263:
+	add	x1, x19, :lo12:.LANCHOR144
 	ldrh	w0, [x1, 2]
 	add	w20, w20, w0
 	ldr	w0, [x29, 156]
 	and	w20, w20, 65535
 	strh	w20, [x1, 2]
 	cmp	w0, w20
-	bhi	.L1270
-	adrp	x0, .LANCHOR62
-	ldr	w0, [x0, #:lo12:.LANCHOR62]
-	cbz	w0, .L1271
+	bhi	.L1265
+	adrp	x0, .LANCHOR61
+	ldr	w0, [x0, #:lo12:.LANCHOR61]
+	cbz	w0, .L1266
 	bl	Ftl_gc_temp_data_write_back
-	cbz	w0, .L1271
-	str	wzr, [x21, #:lo12:.LANCHOR94]
-	b	.L1312
-.L1271:
-	adrp	x0, .LANCHOR173
-	ldrh	w0, [x0, #:lo12:.LANCHOR173]
-	cbnz	w0, .L1272
-	ldrh	w1, [x19, #:lo12:.LANCHOR145]
-	adrp	x20, .LANCHOR42
-	add	x0, x19, :lo12:.LANCHOR145
-	ldr	x3, [x20, #:lo12:.LANCHOR42]
+	cbz	w0, .L1266
+	str	wzr, [x21, #:lo12:.LANCHOR93]
+	b	.L1307
+.L1266:
+	adrp	x0, .LANCHOR172
+	ldrh	w0, [x0, #:lo12:.LANCHOR172]
+	cbnz	w0, .L1267
+	ldrh	w1, [x19, #:lo12:.LANCHOR144]
+	adrp	x20, .LANCHOR41
+	add	x0, x19, :lo12:.LANCHOR144
+	ldr	x3, [x20, #:lo12:.LANCHOR41]
 	ubfiz	x2, x1, 1, 16
 	ldrh	w4, [x3, x2]
-	cbz	w4, .L1272
-	adrp	x2, .LANCHOR174
-	adrp	x22, .LANCHOR152
-	add	x23, x22, :lo12:.LANCHOR152
+	cbz	w4, .L1267
+	adrp	x2, .LANCHOR173
+	adrp	x22, .LANCHOR151
+	add	x23, x22, :lo12:.LANCHOR151
 	mov	w24, 0
-	ldrh	w5, [x2, #:lo12:.LANCHOR174]
+	ldrh	w5, [x2, #:lo12:.LANCHOR173]
 	mov	w3, 0
 	ldrh	w2, [x0, 2]
 	adrp	x0, .LC42
 	add	x0, x0, :lo12:.LC42
 	bl	printf
-.L1273:
+.L1268:
 	ldr	w0, [x23]
 	cmp	w24, w0
-	bcs	.L1275
+	bcs	.L1270
 	mov	w2, 0
 	add	x1, x29, 172
 	mov	w0, w24
 	bl	log2phys
 	ldr	w3, [x29, 172]
 	cmn	w3, #1
-	beq	.L1274
+	beq	.L1269
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
-	ldrh	w1, [x19, #:lo12:.LANCHOR145]
+	ldrh	w1, [x19, #:lo12:.LANCHOR144]
 	cmp	w1, w0, uxth
-	bne	.L1274
+	bne	.L1269
 	adrp	x0, .LC43
 	mov	w2, w3
 	mov	w1, w24
 	add	x0, x0, :lo12:.LC43
 	bl	printf
-.L1275:
-	ldr	w0, [x22, #:lo12:.LANCHOR152]
+.L1270:
+	ldr	w0, [x22, #:lo12:.LANCHOR151]
 	cmp	w24, w0
-	bcc	.L1272
-	ldrh	w1, [x19, #:lo12:.LANCHOR145]
-	ldr	x0, [x20, #:lo12:.LANCHOR42]
+	bcc	.L1267
+	ldrh	w1, [x19, #:lo12:.LANCHOR144]
+	ldr	x0, [x20, #:lo12:.LANCHOR41]
 	strh	wzr, [x0, x1, lsl 1]
-	ldrh	w0, [x19, #:lo12:.LANCHOR145]
+	ldrh	w0, [x19, #:lo12:.LANCHOR144]
 	bl	update_vpc_list
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1272:
+.L1267:
 	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR145]
-.L1270:
-	adrp	x0, .LANCHOR48
-	str	wzr, [x21, #:lo12:.LANCHOR94]
-	ldrh	w0, [x0, #:lo12:.LANCHOR48]
+	strh	w0, [x19, #:lo12:.LANCHOR144]
+.L1265:
+	adrp	x0, .LANCHOR47
+	str	wzr, [x21, #:lo12:.LANCHOR93]
+	ldrh	w0, [x0, #:lo12:.LANCHOR47]
 	cmp	w0, 2
-	bhi	.L1278
+	bhi	.L1273
 	ldr	x0, [x29, 120]
-	ldrh	w20, [x0, #:lo12:.LANCHOR19]
-	b	.L1279
-.L1274:
+	ldrh	w20, [x0, #:lo12:.LANCHOR18]
+	b	.L1274
+.L1269:
 	add	w24, w24, 1
-	b	.L1273
-.L1278:
+	b	.L1268
+.L1273:
 	add	w0, w0, 1
-	b	.L1224
-.L1281:
+	b	.L1219
+.L1276:
 	mov	w0, 0
-	b	.L1224
+	b	.L1219
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
 	.section	.text.FtlRead,"ax",@progbits
 	.align	2
@@ -9436,22 +9365,22 @@ FtlRead:
 	and	w0, w0, 255
 	cmp	w0, 16
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	w19, w1
-	stp	x23, x24, [sp, 48]
-	mov	x23, x3
-	stp	x25, x26, [sp, 64]
-	mov	w26, w2
 	stp	x21, x22, [sp, 32]
+	mov	x22, x3
+	stp	x23, x24, [sp, 48]
+	mov	w24, w2
 	stp	x27, x28, [sp, 80]
-	bne	.L1314
+	mov	w27, w1
+	stp	x19, x20, [sp, 16]
+	stp	x25, x26, [sp, 64]
+	bne	.L1309
 	mov	x2, x3
-	mov	w1, w26
-	add	w0, w19, 256
+	mov	w1, w24
+	add	w0, w27, 256
 	bl	FtlVendorPartRead
-	mov	w21, w0
-.L1313:
-	mov	w0, w21
+	mov	w19, w0
+.L1308:
+	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9459,88 +9388,91 @@ FtlRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1314:
-	add	w0, w1, w2
-	str	w0, [x29, 136]
-	adrp	x0, .LANCHOR34
-	add	w1, w1, w2
-	ldr	w0, [x0, #:lo12:.LANCHOR34]
+.L1309:
+	adrp	x0, .LANCHOR33
+	ldr	w0, [x0, #:lo12:.LANCHOR33]
 	cmp	w1, w0
-	bhi	.L1335
-	adrp	x0, .LANCHOR166
-	ldr	w21, [x0, #:lo12:.LANCHOR166]
-	cmn	w21, #1
-	beq	.L1313
-	adrp	x22, .LANCHOR12
-	adrp	x25, .LANCHOR135
-	add	x25, x25, :lo12:.LANCHOR135
-	mov	w27, 0
-	ldrh	w0, [x22, #:lo12:.LANCHOR12]
-	mov	w21, 0
-	adrp	x28, .LANCHOR103
+	bcs	.L1332
+	cmp	w2, w0
+	bhi	.L1332
+	add	w1, w1, w2
+	str	w1, [x29, 136]
+	cmp	w0, w1
+	bcc	.L1332
+	adrp	x0, .LANCHOR165
+	ldr	w19, [x0, #:lo12:.LANCHOR165]
+	cmn	w19, #1
+	beq	.L1308
+	adrp	x21, .LANCHOR11
+	adrp	x25, .LANCHOR134
+	add	x25, x25, :lo12:.LANCHOR134
+	mov	w26, 0
+	ldrh	w0, [x21, #:lo12:.LANCHOR11]
+	mov	w19, 0
+	adrp	x28, .LANCHOR102
 	stp	wzr, wzr, [x29, 140]
-	udiv	w1, w19, w0
+	udiv	w1, w27, w0
 	stp	wzr, w1, [x29, 148]
-	add	w1, w19, w2
-	sub	w24, w1, #1
-	adrp	x1, .LANCHOR163
+	add	w1, w27, w2
+	sub	w23, w1, #1
+	adrp	x1, .LANCHOR162
 	ldr	w20, [x29, 152]
-	udiv	w24, w24, w0
+	udiv	w23, w23, w0
 	ldr	w0, [x29, 152]
-	sub	w0, w24, w0
+	sub	w0, w23, w0
 	add	w0, w0, 1
 	str	w0, [x29, 156]
-	ldr	w0, [x1, #:lo12:.LANCHOR163]
+	ldr	w0, [x1, #:lo12:.LANCHOR162]
 	add	w0, w0, w2
-	str	w0, [x1, #:lo12:.LANCHOR163]
-	adrp	x1, .LANCHOR89
+	str	w0, [x1, #:lo12:.LANCHOR162]
+	adrp	x1, .LANCHOR88
 	ldr	w2, [x29, 156]
-	ldr	w0, [x1, #:lo12:.LANCHOR89]
+	ldr	w0, [x1, #:lo12:.LANCHOR88]
 	add	w0, w0, w2
-	str	w0, [x1, #:lo12:.LANCHOR89]
-.L1316:
+	str	w0, [x1, #:lo12:.LANCHOR88]
+.L1311:
 	ldr	w0, [x29, 156]
-	cbnz	w0, .L1333
-	adrp	x0, .LANCHOR74
-	ldrh	w0, [x0, #:lo12:.LANCHOR74]
-	cbnz	w0, .L1334
-	adrp	x0, .LANCHOR48
-	ldrh	w0, [x0, #:lo12:.LANCHOR48]
+	cbnz	w0, .L1328
+	adrp	x0, .LANCHOR73
+	ldrh	w0, [x0, #:lo12:.LANCHOR73]
+	cbnz	w0, .L1329
+	adrp	x0, .LANCHOR47
+	ldrh	w0, [x0, #:lo12:.LANCHOR47]
 	cmp	w0, 31
-	bhi	.L1313
-.L1334:
+	bhi	.L1308
+.L1329:
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-	b	.L1313
-.L1333:
+	b	.L1308
+.L1328:
 	add	x1, x29, 172
 	mov	w2, 0
 	mov	w0, w20
 	bl	log2phys
 	ldr	w1, [x29, 172]
 	cmn	w1, #1
-	bne	.L1317
-	add	x5, x22, :lo12:.LANCHOR12
-	mov	w4, 0
-.L1318:
-	ldrh	w0, [x5]
-	cmp	w4, w0
-	bcc	.L1320
-.L1321:
+	bne	.L1312
+	add	x6, x21, :lo12:.LANCHOR11
+	mov	w5, 0
+.L1313:
+	ldrh	w0, [x6]
+	cmp	w5, w0
+	bcc	.L1315
+.L1316:
 	ldr	w0, [x29, 156]
 	add	w20, w20, 1
 	subs	w0, w0, #1
 	str	w0, [x29, 156]
-	beq	.L1325
-	adrp	x0, .LANCHOR3
-	ldrh	w0, [x0, #:lo12:.LANCHOR3]
-	cmp	w27, w0, lsl 2
-	bne	.L1316
-.L1325:
-	cbz	w27, .L1316
-	ldr	x0, [x28, #:lo12:.LANCHOR103]
-	mov	w1, w27
+	beq	.L1320
+	adrp	x0, .LANCHOR2
+	ldrh	w0, [x0, #:lo12:.LANCHOR2]
+	cmp	w26, w0, lsl 2
+	bne	.L1311
+.L1320:
+	cbz	w26, .L1311
+	ldr	x0, [x28, #:lo12:.LANCHOR102]
+	mov	w1, w26
 	mov	w2, 0
 	bl	FlashReadPages
 	ldr	w0, [x29, 140]
@@ -9552,159 +9484,159 @@ FtlRead:
 	ldr	w0, [x29, 144]
 	lsl	w0, w0, 9
 	str	w0, [x29, 120]
-	ubfiz	x0, x27, 5, 32
-	mov	x27, 0
+	ubfiz	x0, x26, 5, 32
+	mov	x26, 0
 	str	x0, [x29, 104]
-	add	x0, x22, :lo12:.LANCHOR12
+	add	x0, x21, :lo12:.LANCHOR11
 	str	x0, [x29, 96]
-.L1332:
-	ldr	x0, [x28, #:lo12:.LANCHOR103]
+.L1327:
+	ldr	x0, [x28, #:lo12:.LANCHOR102]
 	ldr	w2, [x29, 152]
-	add	x0, x0, x27
+	add	x0, x0, x26
 	ldr	w1, [x0, 24]
 	cmp	w2, w1
-	bne	.L1327
+	bne	.L1322
 	ldr	x1, [x0, 8]
-	adrp	x0, .LANCHOR109
-	ldr	x0, [x0, #:lo12:.LANCHOR109]
+	adrp	x0, .LANCHOR108
+	ldr	x0, [x0, #:lo12:.LANCHOR108]
 	cmp	x1, x0
-	bne	.L1328
+	bne	.L1323
 	ldr	x0, [x29, 128]
 	ldr	w2, [x29, 120]
 	add	x1, x1, x0
-	mov	x0, x23
-.L1346:
+	mov	x0, x22
+.L1343:
 	bl	ftl_memcpy
-.L1328:
-	ldr	x0, [x28, #:lo12:.LANCHOR103]
-	add	x0, x0, x27
+.L1323:
+	ldr	x0, [x28, #:lo12:.LANCHOR102]
+	add	x0, x0, x26
 	ldr	x1, [x0, 16]
 	ldr	w2, [x0, 24]
 	ldr	w1, [x1, 8]
 	cmp	w2, w1
-	beq	.L1329
+	beq	.L1324
 	ldr	w1, [x25, 72]
 	add	w1, w1, 1
 	str	w1, [x25, 72]
-.L1329:
+.L1324:
 	ldr	w1, [x0]
 	cmn	w1, #1
-	bne	.L1330
+	bne	.L1325
 	ldr	w0, [x25, 72]
-	mov	w21, w1
+	mov	w19, w1
 	add	w0, w0, 1
 	str	w0, [x25, 72]
-.L1331:
+.L1326:
 	ldr	x0, [x29, 104]
-	add	x27, x27, 32
-	cmp	x0, x27
-	bne	.L1332
-	mov	w27, 0
-	b	.L1316
-.L1320:
-	madd	w0, w20, w0, w4
-	cmp	w19, w0
-	bhi	.L1319
+	add	x26, x26, 32
+	cmp	x0, x26
+	bne	.L1327
+	mov	w26, 0
+	b	.L1311
+.L1315:
+	madd	w0, w20, w0, w5
+	cmp	w27, w0
+	bhi	.L1314
 	ldr	w1, [x29, 136]
 	cmp	w1, w0
-	bls	.L1319
-	sub	w0, w0, w19
-	str	x5, [x29, 120]
+	bls	.L1314
+	sub	w0, w0, w27
+	str	x6, [x29, 120]
 	lsl	w0, w0, 9
-	str	w4, [x29, 128]
+	str	w5, [x29, 128]
 	mov	w2, 512
 	mov	w1, 0
-	add	x0, x23, x0
+	add	x0, x22, x0
 	bl	ftl_memset
-	ldr	w4, [x29, 128]
-	ldr	x5, [x29, 120]
-.L1319:
-	add	w4, w4, 1
-	b	.L1318
-.L1317:
-	ldr	x2, [x28, #:lo12:.LANCHOR103]
-	ubfiz	x0, x27, 5, 32
+	ldr	w5, [x29, 128]
+	ldr	x6, [x29, 120]
+.L1314:
+	add	w5, w5, 1
+	b	.L1313
+.L1312:
+	ldr	x2, [x28, #:lo12:.LANCHOR102]
+	ubfiz	x0, x26, 5, 32
 	add	x0, x2, x0
 	str	w1, [x0, 4]
 	ldr	w1, [x29, 152]
 	cmp	w20, w1
-	bne	.L1322
-	adrp	x1, .LANCHOR109
-	ldr	x1, [x1, #:lo12:.LANCHOR109]
+	bne	.L1317
+	adrp	x1, .LANCHOR108
+	ldr	x1, [x1, #:lo12:.LANCHOR108]
 	str	x1, [x0, 8]
-	ldrh	w1, [x22, #:lo12:.LANCHOR12]
-	udiv	w2, w19, w1
-	msub	w2, w2, w1, w19
+	ldrh	w1, [x21, #:lo12:.LANCHOR11]
+	udiv	w2, w27, w1
+	msub	w2, w2, w1, w27
 	str	w2, [x29, 148]
 	sub	w2, w1, w2
-	cmp	w26, w2
-	csel	w2, w26, w2, ls
+	cmp	w24, w2
+	csel	w2, w24, w2, ls
 	str	w2, [x29, 144]
 	cmp	w1, w2
-	bne	.L1323
-	str	x23, [x0, 8]
-.L1323:
-	adrp	x1, .LANCHOR24
-	adrp	x2, .LANCHOR115
+	bne	.L1318
+	str	x22, [x0, 8]
+.L1318:
+	adrp	x1, .LANCHOR23
+	adrp	x2, .LANCHOR114
 	str	w20, [x0, 24]
-	ldrh	w1, [x1, #:lo12:.LANCHOR24]
-	ldr	x2, [x2, #:lo12:.LANCHOR115]
-	mul	w1, w1, w27
-	add	w27, w27, 1
+	ldrh	w1, [x1, #:lo12:.LANCHOR23]
+	ldr	x2, [x2, #:lo12:.LANCHOR114]
+	mul	w1, w1, w26
+	add	w26, w26, 1
 	and	x1, x1, 4294967292
 	add	x1, x2, x1
 	str	x1, [x0, 16]
-	b	.L1321
-.L1322:
-	cmp	w20, w24
-	bne	.L1324
-	ldrh	w2, [x22, #:lo12:.LANCHOR12]
-	adrp	x1, .LANCHOR110
+	b	.L1316
+.L1317:
+	cmp	w20, w23
+	bne	.L1319
+	ldrh	w2, [x21, #:lo12:.LANCHOR11]
+	adrp	x1, .LANCHOR109
 	ldr	w3, [x29, 136]
-	ldr	x1, [x1, #:lo12:.LANCHOR110]
+	ldr	x1, [x1, #:lo12:.LANCHOR109]
 	str	x1, [x0, 8]
 	mul	w1, w20, w2
 	sub	w3, w3, w1
 	str	w3, [x29, 140]
 	cmp	w2, w3
-	bne	.L1323
-.L1345:
-	sub	w1, w1, w19
+	bne	.L1318
+.L1342:
+	sub	w1, w1, w27
 	lsl	w1, w1, 9
-	add	x1, x23, x1
+	add	x1, x22, x1
 	str	x1, [x0, 8]
-	b	.L1323
-.L1324:
-	ldrh	w1, [x22, #:lo12:.LANCHOR12]
+	b	.L1318
+.L1319:
+	ldrh	w1, [x21, #:lo12:.LANCHOR11]
 	mul	w1, w1, w20
-	b	.L1345
-.L1327:
-	cmp	w24, w1
-	bne	.L1328
+	b	.L1342
+.L1322:
+	cmp	w23, w1
+	bne	.L1323
 	ldr	x1, [x0, 8]
-	adrp	x0, .LANCHOR110
-	ldr	x0, [x0, #:lo12:.LANCHOR110]
+	adrp	x0, .LANCHOR109
+	ldr	x0, [x0, #:lo12:.LANCHOR109]
 	cmp	x1, x0
-	bne	.L1328
+	bne	.L1323
 	ldr	x0, [x29, 96]
 	ldr	w2, [x29, 116]
 	ldrh	w0, [x0]
-	mul	w0, w0, w24
-	sub	w0, w0, w19
+	mul	w0, w0, w23
+	sub	w0, w0, w27
 	lsl	w0, w0, 9
-	add	x0, x23, x0
-	b	.L1346
-.L1330:
+	add	x0, x22, x0
+	b	.L1343
+.L1325:
 	cmp	w1, 256
-	bne	.L1331
+	bne	.L1326
 	ldr	w0, [x0, 4]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-	b	.L1331
-.L1335:
-	mov	w21, -1
-	b	.L1313
+	b	.L1326
+.L1332:
+	mov	w19, -1
+	b	.L1308
 	.size	FtlRead, .-FtlRead
 	.section	.text.sftl_read,"ax",@progbits
 	.align	2
@@ -9726,20 +9658,20 @@ FtlWrite:
 	and	w0, w0, 255
 	cmp	w0, 16
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	mov	w23, w1
-	stp	x25, x26, [sp, 64]
-	mov	x26, x3
-	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
+	mov	w22, w1
+	stp	x25, x26, [sp, 64]
+	mov	w26, w2
 	stp	x27, x28, [sp, 80]
-	str	w2, [x29, 172]
-	bne	.L1349
-	add	w0, w1, 256
-	ldr	w1, [x29, 172]
+	mov	x27, x3
+	stp	x19, x20, [sp, 16]
+	stp	x23, x24, [sp, 48]
+	bne	.L1346
 	mov	x2, x3
+	mov	w1, w26
+	add	w0, w22, 256
 	bl	FtlVendorPartWrite
-.L1348:
+.L1345:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9747,79 +9679,80 @@ FtlWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 224
 	ret
-.L1349:
-	ldr	w0, [x29, 172]
-	add	w0, w1, w0
-	str	w0, [x29, 152]
-	adrp	x0, .LANCHOR34
-	ldr	w1, [x29, 152]
-	ldr	w0, [x0, #:lo12:.LANCHOR34]
+.L1346:
+	adrp	x0, .LANCHOR33
+	ldr	w0, [x0, #:lo12:.LANCHOR33]
 	cmp	w1, w0
-	bhi	.L1381
-	adrp	x0, .LANCHOR166
-	ldr	w0, [x0, #:lo12:.LANCHOR166]
+	bcs	.L1380
+	cmp	w2, w0
+	bhi	.L1380
+	add	w1, w1, w2
+	str	w1, [x29, 136]
+	cmp	w0, w1
+	bcc	.L1380
+	adrp	x0, .LANCHOR165
+	ldr	w0, [x0, #:lo12:.LANCHOR165]
 	cmn	w0, #1
-	beq	.L1348
-	adrp	x0, .LANCHOR176
+	beq	.L1345
+	adrp	x0, .LANCHOR175
 	mov	w1, 2048
-	ldr	w2, [x29, 152]
-	str	w1, [x0, #:lo12:.LANCHOR176]
-	adrp	x1, .LANCHOR12
+	add	w2, w22, w2
+	str	w1, [x0, #:lo12:.LANCHOR175]
+	adrp	x1, .LANCHOR11
 	sub	w2, w2, #1
-	ldr	w3, [x29, 172]
-	ldrh	w0, [x1, #:lo12:.LANCHOR12]
 	str	x1, [x29, 160]
-	udiv	w25, w23, w0
+	ldrh	w0, [x1, #:lo12:.LANCHOR11]
+	udiv	w25, w22, w0
 	udiv	w0, w2, w0
-	adrp	x2, .LANCHOR162
+	adrp	x2, .LANCHOR161
 	mov	w19, w25
 	str	w0, [x29, 144]
 	sub	w0, w0, w25
 	add	w24, w0, 1
 	str	w0, [x29, 140]
-	ldr	w0, [x2, #:lo12:.LANCHOR162]
-	add	w0, w0, w3
-	str	w0, [x2, #:lo12:.LANCHOR162]
-	adrp	x2, .LANCHOR85
-	ldr	w0, [x2, #:lo12:.LANCHOR85]
+	ldr	w0, [x2, #:lo12:.LANCHOR161]
+	add	w0, w0, w26
+	str	w0, [x2, #:lo12:.LANCHOR161]
+	adrp	x2, .LANCHOR84
+	ldr	w0, [x2, #:lo12:.LANCHOR84]
 	add	w0, w0, w24
-	str	w0, [x2, #:lo12:.LANCHOR85]
-	adrp	x0, .LANCHOR51
-	add	x20, x0, :lo12:.LANCHOR51
-.L1351:
-	cbnz	w24, .L1376
+	str	w0, [x2, #:lo12:.LANCHOR84]
+	adrp	x0, .LANCHOR50
+	add	x20, x0, :lo12:.LANCHOR50
+.L1348:
+	cbnz	w24, .L1373
 	ldr	w1, [x29, 140]
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-	adrp	x0, .LANCHOR48
+	adrp	x0, .LANCHOR47
 	mov	x22, x0
-	ldrh	w1, [x0, #:lo12:.LANCHOR48]
+	ldrh	w1, [x0, #:lo12:.LANCHOR47]
 	cmp	w1, 5
-	bls	.L1377
-.L1379:
-	mov	w0, 0
-	b	.L1348
+	bls	.L1374
 .L1376:
-	adrp	x0, .LANCHOR51
-	add	x0, x0, :lo12:.LANCHOR51
-	adrp	x1, .LANCHOR3
+	mov	w0, 0
+	b	.L1345
+.L1373:
+	adrp	x0, .LANCHOR50
+	add	x0, x0, :lo12:.LANCHOR50
+	adrp	x1, .LANCHOR2
 	str	x1, [x29, 112]
 	ldrb	w2, [x0, 6]
-	ldrh	w0, [x1, #:lo12:.LANCHOR3]
+	ldrh	w0, [x1, #:lo12:.LANCHOR2]
 	cmp	w2, w0
-	bcc	.L1352
-	adrp	x1, .LANCHOR177
+	bcc	.L1349
+	adrp	x1, .LANCHOR176
 	adrp	x0, .LC1
 	mov	w2, 1041
-	add	x1, x1, :lo12:.LANCHOR177
+	add	x1, x1, :lo12:.LANCHOR176
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1352:
+.L1349:
 	ldrh	w0, [x20, 4]
-	cbnz	w0, .L1353
+	cbnz	w0, .L1350
 	mov	x0, x20
 	bl	allocate_new_data_superblock
-.L1353:
+.L1350:
 	ldrb	w0, [x20, 7]
 	ldrh	w1, [x20, 4]
 	lsl	w0, w0, 2
@@ -9830,163 +9763,164 @@ FtlWrite:
 	csel	w0, w0, w24, ls
 	str	w0, [x29, 148]
 	ldr	x0, [x29, 112]
-	ldrh	w0, [x0, #:lo12:.LANCHOR3]
+	ldrh	w0, [x0, #:lo12:.LANCHOR2]
 	cmp	w1, w0
-	bcc	.L1354
-	adrp	x1, .LANCHOR177
+	bcc	.L1351
+	adrp	x1, .LANCHOR176
 	adrp	x0, .LC1
 	mov	w2, 1074
-	add	x1, x1, :lo12:.LANCHOR177
+	add	x1, x1, :lo12:.LANCHOR176
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1354:
-	adrp	x0, .LANCHOR24
-	add	x0, x0, :lo12:.LANCHOR24
-	mov	x28, 0
-	str	x0, [x29, 104]
+.L1351:
 	adrp	x0, .LANCHOR23
 	add	x0, x0, :lo12:.LANCHOR23
+	str	xzr, [x29, 168]
+	str	x0, [x29, 104]
+	adrp	x0, .LANCHOR22
+	add	x0, x0, :lo12:.LANCHOR22
 	str	x0, [x29, 96]
-.L1355:
-	ldr	w0, [x29, 148]
-	mov	w22, w28
-	adrp	x27, .LANCHOR105
-	cmp	w28, w0
-	bcc	.L1374
-	mov	x22, x0
-.L1356:
-	ldr	x0, [x27, #:lo12:.LANCHOR105]
+.L1352:
+	ldr	w1, [x29, 148]
+	adrp	x28, .LANCHOR104
+	ldr	w23, [x29, 168]
+	cmp	w23, w1
+	bcc	.L1371
+	mov	x23, x1
+.L1353:
+	ldr	x0, [x28, #:lo12:.LANCHOR104]
 	mov	x3, x20
 	mov	w2, 0
-	mov	w1, w22
+	mov	w1, w23
 	bl	FtlProgPages
-	cmp	w24, w22
-	bcs	.L1375
-	adrp	x1, .LANCHOR177
+	cmp	w24, w23
+	bcs	.L1372
+	adrp	x1, .LANCHOR176
 	adrp	x0, .LC1
 	mov	w2, 1152
-	add	x1, x1, :lo12:.LANCHOR177
+	add	x1, x1, :lo12:.LANCHOR176
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1375:
-	sub	w24, w24, w22
-	b	.L1351
-.L1374:
+.L1372:
+	sub	w24, w24, w23
+	b	.L1348
+.L1371:
 	ldrh	w0, [x20, 4]
-	cbz	w0, .L1356
+	cbz	w0, .L1353
 	add	x1, x29, 188
 	mov	w2, 0
 	mov	w0, w19
 	bl	log2phys
 	mov	x0, x20
-	lsl	x21, x28, 5
 	bl	get_new_active_ppa
-	ldr	x1, [x27, #:lo12:.LANCHOR105]
+	ldr	x1, [x29, 168]
+	lsl	x21, x1, 5
+	ldr	x1, [x28, #:lo12:.LANCHOR104]
 	add	x1, x1, x21
 	str	w0, [x1, 4]
 	ldr	x0, [x29, 104]
 	str	w19, [x1, 24]
 	ldrh	w2, [x0]
-	mul	w22, w22, w2
-	and	x0, x22, 4294967292
+	mul	w23, w23, w2
+	and	x0, x23, 4294967292
 	str	x0, [x29, 128]
-	adrp	x0, .LANCHOR115
+	adrp	x0, .LANCHOR114
 	ldr	x3, [x29, 128]
-	ldr	x0, [x0, #:lo12:.LANCHOR115]
+	ldr	x0, [x0, #:lo12:.LANCHOR114]
 	str	x0, [x29, 120]
-	add	x22, x0, x3
-	str	x22, [x1, 16]
-	mov	x0, x22
+	add	x23, x0, x3
+	str	x23, [x1, 16]
+	mov	x0, x23
 	mov	w1, 0
 	bl	ftl_memset
 	ldr	w0, [x29, 144]
 	cmp	w19, w25
 	ccmp	w19, w0, 4, ne
-	bne	.L1357
+	bne	.L1354
 	cmp	w19, w25
 	ldr	x0, [x29, 160]
-	bne	.L1358
-	ldrh	w2, [x0, #:lo12:.LANCHOR12]
-	udiv	w0, w23, w2
-	msub	w0, w0, w2, w23
-	str	w0, [x29, 156]
+	bne	.L1355
+	ldrh	w2, [x0, #:lo12:.LANCHOR11]
+	udiv	w0, w22, w2
+	msub	w0, w0, w2, w22
+	str	w0, [x29, 152]
 	sub	w2, w2, w0
-	ldr	w0, [x29, 172]
-	cmp	w2, w0
-	csel	w0, w2, w0, ls
-	str	w0, [x29, 168]
-.L1359:
+	cmp	w2, w26
+	csel	w0, w2, w26, ls
+	str	w0, [x29, 156]
+.L1356:
 	ldr	x0, [x29, 160]
-	ldr	w1, [x29, 168]
-	ldrh	w0, [x0, #:lo12:.LANCHOR12]
+	ldr	w1, [x29, 156]
+	ldrh	w0, [x0, #:lo12:.LANCHOR11]
 	cmp	w1, w0
-	ldr	x0, [x27, #:lo12:.LANCHOR105]
-	bne	.L1360
+	ldr	x0, [x28, #:lo12:.LANCHOR104]
+	bne	.L1357
 	add	x21, x0, x21
 	cmp	w19, w25
-	bne	.L1361
-	str	x26, [x21, 8]
-.L1362:
+	bne	.L1358
+	str	x27, [x21, 8]
+.L1359:
 	ldr	x0, [x29, 112]
 	ldrb	w1, [x20, 6]
-	ldrh	w0, [x0, #:lo12:.LANCHOR3]
+	ldrh	w0, [x0, #:lo12:.LANCHOR2]
 	cmp	w1, w0
-	bcc	.L1371
-	adrp	x1, .LANCHOR177
+	bcc	.L1368
+	adrp	x1, .LANCHOR176
 	adrp	x0, .LC1
 	mov	w2, 1143
-	add	x1, x1, :lo12:.LANCHOR177
+	add	x1, x1, :lo12:.LANCHOR176
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1371:
+.L1368:
 	ldp	x1, x2, [x29, 120]
 	mov	w0, -3947
-	add	x28, x28, 1
 	strh	w0, [x1, x2]
-	adrp	x1, .LANCHOR83
-	ldr	w0, [x1, #:lo12:.LANCHOR83]
-	stp	w0, w19, [x22, 4]
+	adrp	x1, .LANCHOR82
+	ldr	w0, [x1, #:lo12:.LANCHOR82]
+	stp	w0, w19, [x23, 4]
 	add	w19, w19, 1
 	add	w0, w0, 1
 	cmn	w0, #1
 	csel	w0, w0, wzr, ne
-	str	w0, [x1, #:lo12:.LANCHOR83]
+	str	w0, [x1, #:lo12:.LANCHOR82]
 	ldr	w0, [x29, 188]
-	str	w0, [x22, 12]
+	str	w0, [x23, 12]
 	ldrh	w0, [x20]
-	strh	w0, [x22, 2]
-	b	.L1355
-.L1358:
-	ldrh	w2, [x0, #:lo12:.LANCHOR12]
-	ldr	w0, [x29, 152]
-	str	wzr, [x29, 156]
+	strh	w0, [x23, 2]
+	ldr	x0, [x29, 168]
+	add	x0, x0, 1
+	str	x0, [x29, 168]
+	b	.L1352
+.L1355:
+	ldrh	w2, [x0, #:lo12:.LANCHOR11]
+	ldr	w0, [x29, 136]
 	msub	w2, w19, w2, w0
 	and	w0, w2, 65535
-	str	w0, [x29, 168]
-	b	.L1359
-.L1361:
-	ldr	w0, [x29, 168]
-.L1389:
+	stp	wzr, w0, [x29, 152]
+	b	.L1356
+.L1358:
+	ldr	w0, [x29, 156]
+.L1388:
 	mul	w0, w0, w19
-	sub	w0, w0, w23
+	sub	w0, w0, w22
 	lsl	w0, w0, 9
-	add	x0, x26, x0
+	add	x0, x27, x0
 	str	x0, [x21, 8]
-	b	.L1362
-.L1360:
+	b	.L1359
+.L1357:
 	add	x0, x0, x21
 	cmp	w19, w25
-	bne	.L1363
-	adrp	x1, .LANCHOR109
-	ldr	x1, [x1, #:lo12:.LANCHOR109]
-.L1388:
+	bne	.L1360
+	adrp	x1, .LANCHOR108
+	ldr	x1, [x1, #:lo12:.LANCHOR108]
+.L1387:
 	str	x1, [x0, 8]
 	ldr	w0, [x29, 188]
 	cmn	w0, #1
-	beq	.L1365
+	beq	.L1362
 	str	w0, [x29, 196]
 	mov	w2, 0
-	ldr	x0, [x27, #:lo12:.LANCHOR105]
+	ldr	x0, [x28, #:lo12:.LANCHOR104]
 	str	w19, [x29, 216]
 	add	x0, x0, x21
 	ldp	x1, x0, [x0, 8]
@@ -9996,42 +9930,42 @@ FtlWrite:
 	bl	FlashReadPages
 	ldr	w3, [x29, 192]
 	cmn	w3, #1
-	bne	.L1366
-	adrp	x0, .LANCHOR135
-	add	x0, x0, :lo12:.LANCHOR135
+	bne	.L1363
+	adrp	x0, .LANCHOR134
+	add	x0, x0, :lo12:.LANCHOR134
 	mov	w2, w19
 	ldr	w1, [x0, 72]
 	add	w1, w1, 1
 	str	w1, [x0, 72]
-	ldr	w1, [x22, 8]
+	ldr	w1, [x23, 8]
 	adrp	x0, .LC44
 	add	x0, x0, :lo12:.LC44
 	bl	printf
-.L1369:
-	ldr	w0, [x29, 168]
+.L1366:
+	ldr	w0, [x29, 156]
 	cmp	w19, w25
 	lsl	w2, w0, 9
-	bne	.L1370
-	ldr	x0, [x27, #:lo12:.LANCHOR105]
-	mov	x1, x26
+	bne	.L1367
+	ldr	x0, [x28, #:lo12:.LANCHOR104]
+	mov	x1, x27
 	add	x21, x0, x21
-	ldr	w0, [x29, 156]
+	ldr	w0, [x29, 152]
 	ldr	x3, [x21, 8]
 	lsl	w0, w0, 9
 	add	x0, x3, x0
-.L1390:
+.L1389:
 	bl	ftl_memcpy
-	b	.L1362
+	b	.L1359
+.L1360:
+	adrp	x1, .LANCHOR109
+	ldr	x1, [x1, #:lo12:.LANCHOR109]
+	b	.L1387
 .L1363:
-	adrp	x1, .LANCHOR110
-	ldr	x1, [x1, #:lo12:.LANCHOR110]
-	b	.L1388
-.L1366:
-	ldr	w1, [x22, 8]
+	ldr	w1, [x23, 8]
 	cmp	w19, w1
-	beq	.L1368
-	adrp	x0, .LANCHOR135
-	add	x0, x0, :lo12:.LANCHOR135
+	beq	.L1365
+	adrp	x0, .LANCHOR134
+	add	x0, x0, :lo12:.LANCHOR134
 	ldr	w2, [x0, 72]
 	add	w2, w2, 1
 	str	w2, [x0, 72]
@@ -10039,64 +9973,64 @@ FtlWrite:
 	mov	w2, w19
 	add	x0, x0, :lo12:.LC45
 	bl	printf
-.L1368:
-	ldr	w0, [x22, 8]
+.L1365:
+	ldr	w0, [x23, 8]
 	cmp	w19, w0
-	beq	.L1369
+	beq	.L1366
 	mov	w2, 1128
-	adrp	x1, .LANCHOR177
+	adrp	x1, .LANCHOR176
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR177
+	add	x1, x1, :lo12:.LANCHOR176
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	b	.L1369
-.L1365:
-	ldr	x0, [x27, #:lo12:.LANCHOR105]
+	b	.L1366
+.L1362:
+	ldr	x0, [x28, #:lo12:.LANCHOR104]
 	ldr	x1, [x29, 96]
 	add	x0, x0, x21
 	ldrh	w2, [x1]
 	mov	w1, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	b	.L1369
-.L1370:
+	b	.L1366
+.L1367:
 	ldr	x0, [x29, 160]
-	ldrh	w1, [x0, #:lo12:.LANCHOR12]
-	ldr	x0, [x27, #:lo12:.LANCHOR105]
+	ldrh	w1, [x0, #:lo12:.LANCHOR11]
+	ldr	x0, [x28, #:lo12:.LANCHOR104]
 	add	x21, x0, x21
 	mul	w1, w1, w19
-	sub	w1, w1, w23
+	sub	w1, w1, w22
 	ldr	x0, [x21, 8]
 	lsl	w1, w1, 9
-	add	x1, x26, x1
-	b	.L1390
-.L1357:
-	ldr	x0, [x27, #:lo12:.LANCHOR105]
+	add	x1, x27, x1
+	b	.L1389
+.L1354:
+	ldr	x0, [x28, #:lo12:.LANCHOR104]
 	add	x21, x0, x21
 	ldr	x0, [x29, 160]
-	ldrh	w0, [x0, #:lo12:.LANCHOR12]
-	b	.L1389
-.L1377:
-	adrp	x23, .LANCHOR72
-	adrp	x20, .LANCHOR101
-	adrp	x21, .LANCHOR100
-	add	x23, x23, :lo12:.LANCHOR72
-	add	x20, x20, :lo12:.LANCHOR101
-	add	x21, x21, :lo12:.LANCHOR100
+	ldrh	w0, [x0, #:lo12:.LANCHOR11]
+	b	.L1388
+.L1374:
+	adrp	x23, .LANCHOR71
+	adrp	x20, .LANCHOR100
+	adrp	x21, .LANCHOR99
+	add	x23, x23, :lo12:.LANCHOR71
+	add	x20, x20, :lo12:.LANCHOR100
+	add	x21, x21, :lo12:.LANCHOR99
 	mov	w19, 256
-.L1380:
-	adrp	x0, .LANCHOR145
+.L1377:
+	adrp	x0, .LANCHOR144
 	mov	w1, 65535
-	ldrh	w0, [x0, #:lo12:.LANCHOR145]
+	ldrh	w0, [x0, #:lo12:.LANCHOR144]
 	cmp	w0, w1
-	bne	.L1378
+	bne	.L1375
 	ldrh	w1, [x23]
 	cmp	w1, w0
-	bne	.L1378
+	bne	.L1375
 	mov	w0, 0
 	bl	List_get_gc_head_node
 	bl	FtlGcRefreshBlock
-.L1378:
+.L1375:
 	mov	w0, 128
 	mov	w1, 1
 	strh	w0, [x20]
@@ -10106,15 +10040,15 @@ FtlWrite:
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-	ldrh	w0, [x22, #:lo12:.LANCHOR48]
+	ldrh	w0, [x22, #:lo12:.LANCHOR47]
 	cmp	w0, 2
-	bhi	.L1379
+	bhi	.L1376
 	subs	w19, w19, #1
-	bne	.L1380
-	b	.L1379
-.L1381:
+	bne	.L1377
+	b	.L1376
+.L1380:
 	mov	w0, -1
-	b	.L1348
+	b	.L1345
 	.size	FtlWrite, .-FtlWrite
 	.section	.text.sftl_gc,"ax",@progbits
 	.align	2
@@ -10133,33 +10067,33 @@ FtlLoadSysInfo:
 	stp	x29, x30, [sp, -112]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR138
+	adrp	x19, .LANCHOR137
 	stp	x21, x22, [sp, 32]
-	add	x0, x19, :lo12:.LANCHOR138
-	adrp	x22, .LANCHOR106
+	add	x0, x19, :lo12:.LANCHOR137
+	adrp	x22, .LANCHOR105
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR114
+	adrp	x25, .LANCHOR113
 	stp	x23, x24, [sp, 48]
 	stp	x27, x28, [sp, 80]
-	adrp	x23, .LANCHOR42
-	ldr	x1, [x22, #:lo12:.LANCHOR106]
-	adrp	x21, .LANCHOR5
+	adrp	x23, .LANCHOR41
+	ldr	x1, [x22, #:lo12:.LANCHOR105]
+	adrp	x21, .LANCHOR4
 	str	x1, [x0, 8]
-	adrp	x20, .LANCHOR139
-	ldr	x1, [x25, #:lo12:.LANCHOR114]
+	adrp	x20, .LANCHOR138
+	ldr	x1, [x25, #:lo12:.LANCHOR113]
 	str	x1, [x0, 16]
-	ldr	x0, [x23, #:lo12:.LANCHOR42]
+	ldr	x0, [x23, #:lo12:.LANCHOR41]
 	mov	w1, 0
-	ldrh	w2, [x21, #:lo12:.LANCHOR5]
+	ldrh	w2, [x21, #:lo12:.LANCHOR4]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	ldrh	w0, [x20, #:lo12:.LANCHOR139]
+	ldrh	w0, [x20, #:lo12:.LANCHOR138]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L1393
-.L1404:
+	bne	.L1392
+.L1403:
 	mov	w0, -1
-.L1392:
+.L1391:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -10167,133 +10101,122 @@ FtlLoadSysInfo:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1393:
-	add	x24, x20, :lo12:.LANCHOR139
+.L1392:
+	add	x24, x20, :lo12:.LANCHOR138
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
 	sxth	w28, w0
 	add	w0, w0, 1
-	adrp	x26, .LANCHOR23
+	adrp	x26, .LANCHOR22
 	strh	w0, [x24, 2]
-	adrp	x27, .LANCHOR178
-	ldrsh	w24, [x20, #:lo12:.LANCHOR139]
-	add	x26, x26, :lo12:.LANCHOR23
-	add	x27, x27, :lo12:.LANCHOR178
-.L1395:
-	tbz	w28, #31, .L1401
-	adrp	x1, .LANCHOR178
+	adrp	x27, .LANCHOR177
+	ldrsh	w24, [x20, #:lo12:.LANCHOR138]
+	add	x26, x26, :lo12:.LANCHOR22
+	add	x27, x27, :lo12:.LANCHOR177
+.L1394:
+	tbz	w28, #31, .L1400
+	adrp	x1, .LANCHOR177
 	adrp	x0, .LC1
-	mov	w2, 1465
-	add	x1, x1, :lo12:.LANCHOR178
+	mov	w2, 1467
+	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1400:
-	adrp	x1, .LANCHOR23
-	ldrh	w0, [x21, #:lo12:.LANCHOR5]
-	ldrh	w1, [x1, #:lo12:.LANCHOR23]
+.L1399:
+	adrp	x1, .LANCHOR22
+	ldrh	w0, [x21, #:lo12:.LANCHOR4]
+	ldrh	w1, [x1, #:lo12:.LANCHOR22]
 	add	x0, x0, 24
 	cmp	x1, x0, lsl 1
-	bcs	.L1403
-	adrp	x1, .LANCHOR178
+	bcs	.L1402
+	adrp	x1, .LANCHOR177
 	adrp	x0, .LC1
-	mov	w2, 1467
-	add	x1, x1, :lo12:.LANCHOR178
+	mov	w2, 1469
+	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1403:
-	add	x24, x19, :lo12:.LANCHOR138
-	adrp	x19, .LANCHOR39
-	add	x22, x19, :lo12:.LANCHOR39
+.L1402:
+	add	x24, x19, :lo12:.LANCHOR137
+	adrp	x19, .LANCHOR38
+	add	x22, x19, :lo12:.LANCHOR38
 	mov	w2, 48
 	mov	x0, x22
 	ldr	x1, [x24, 8]
 	bl	ftl_memcpy
-	ldr	x0, [x23, #:lo12:.LANCHOR42]
-	ldrh	w2, [x21, #:lo12:.LANCHOR5]
+	ldr	x0, [x23, #:lo12:.LANCHOR41]
+	ldrh	w2, [x21, #:lo12:.LANCHOR4]
 	ldr	x1, [x24, 8]
 	lsl	w2, w2, 1
 	add	x1, x1, 48
 	bl	ftl_memcpy
-	ldrh	w1, [x21, #:lo12:.LANCHOR5]
-	ldr	x0, [x24, 8]
-	lsr	w2, w1, 3
-	ubfiz	x1, x1, 1, 16
-	add	x1, x1, 48
-	add	w2, w2, 4
-	and	x1, x1, -4
-	add	x1, x0, x1
-	adrp	x0, .LANCHOR1
-	ldr	x0, [x0, #:lo12:.LANCHOR1]
-	bl	ftl_memcpy
-	ldr	w1, [x19, #:lo12:.LANCHOR39]
+	ldr	w1, [x19, #:lo12:.LANCHOR38]
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1404
-	add	x20, x20, :lo12:.LANCHOR139
-	adrp	x0, .LANCHOR10
+	bne	.L1403
+	add	x20, x20, :lo12:.LANCHOR138
+	adrp	x0, .LANCHOR9
 	ldrh	w1, [x22, 8]
 	ldrb	w2, [x22, 10]
-	ldrh	w0, [x0, #:lo12:.LANCHOR10]
+	ldrh	w0, [x0, #:lo12:.LANCHOR9]
 	strh	w1, [x20, 6]
 	cmp	w2, w0
-	bne	.L1404
-	adrp	x0, .LANCHOR179
-	adrp	x2, .LANCHOR152
-	adrp	x3, .LANCHOR3
-	str	w1, [x0, #:lo12:.LANCHOR179]
-	adrp	x0, .LANCHOR19
-	ldrh	w3, [x3, #:lo12:.LANCHOR3]
-	ldrh	w0, [x0, #:lo12:.LANCHOR19]
+	bne	.L1403
+	adrp	x0, .LANCHOR178
+	adrp	x2, .LANCHOR151
+	adrp	x3, .LANCHOR2
+	str	w1, [x0, #:lo12:.LANCHOR178]
+	adrp	x0, .LANCHOR18
+	ldrh	w3, [x3, #:lo12:.LANCHOR2]
+	ldrh	w0, [x0, #:lo12:.LANCHOR18]
 	mul	w0, w0, w1
-	str	w0, [x2, #:lo12:.LANCHOR152]
-	adrp	x2, .LANCHOR12
-	ldrh	w2, [x2, #:lo12:.LANCHOR12]
+	str	w0, [x2, #:lo12:.LANCHOR151]
+	adrp	x2, .LANCHOR11
+	ldrh	w2, [x2, #:lo12:.LANCHOR11]
 	mul	w0, w2, w0
-	adrp	x2, .LANCHOR34
-	str	w0, [x2, #:lo12:.LANCHOR34]
-	adrp	x0, .LANCHOR7
-	ldr	w2, [x0, #:lo12:.LANCHOR7]
-	adrp	x0, .LANCHOR37+6
-	ldrh	w0, [x0, #:lo12:.LANCHOR37+6]
+	adrp	x2, .LANCHOR33
+	str	w0, [x2, #:lo12:.LANCHOR33]
+	adrp	x0, .LANCHOR6
+	ldr	w2, [x0, #:lo12:.LANCHOR6]
+	adrp	x0, .LANCHOR36+6
+	ldrh	w0, [x0, #:lo12:.LANCHOR36+6]
 	cmp	w1, w2
 	sub	w0, w2, w0
 	sub	w0, w0, w1
 	udiv	w0, w0, w3
-	adrp	x3, .LANCHOR171
-	strh	w0, [x3, #:lo12:.LANCHOR171]
-	bls	.L1405
-	adrp	x1, .LANCHOR178
+	adrp	x3, .LANCHOR170
+	strh	w0, [x3, #:lo12:.LANCHOR170]
+	bls	.L1404
+	adrp	x1, .LANCHOR177
 	adrp	x0, .LC1
-	mov	w2, 1489
-	add	x1, x1, :lo12:.LANCHOR178
+	mov	w2, 1491
+	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1405:
-	add	x4, x19, :lo12:.LANCHOR39
-	adrp	x0, .LANCHOR51
-	add	x2, x0, :lo12:.LANCHOR51
-	adrp	x5, .LANCHOR145
-	adrp	x20, .LANCHOR52
+.L1404:
+	add	x4, x19, :lo12:.LANCHOR38
+	adrp	x0, .LANCHOR50
+	add	x2, x0, :lo12:.LANCHOR50
+	adrp	x5, .LANCHOR144
+	adrp	x20, .LANCHOR51
 	mov	x22, x5
 	ldrh	w1, [x4, 16]
 	ldrh	w6, [x4, 14]
-	strh	w6, [x0, #:lo12:.LANCHOR51]
+	strh	w6, [x0, #:lo12:.LANCHOR50]
 	lsr	w3, w1, 6
 	and	w1, w1, 63
 	strb	w1, [x2, 6]
 	ldrb	w1, [x4, 11]
 	strb	w1, [x2, 8]
-	add	x1, x5, :lo12:.LANCHOR145
+	add	x1, x5, :lo12:.LANCHOR144
 	strh	w3, [x2, 2]
 	mov	w2, -1
-	strh	w2, [x5, #:lo12:.LANCHOR145]
-	add	x2, x20, :lo12:.LANCHOR52
+	strh	w2, [x5, #:lo12:.LANCHOR144]
+	add	x2, x20, :lo12:.LANCHOR51
 	strh	wzr, [x1, 2]
 	strb	wzr, [x1, 6]
 	strb	wzr, [x1, 8]
 	ldrh	w1, [x4, 18]
-	strh	w1, [x20, #:lo12:.LANCHOR52]
+	strh	w1, [x20, #:lo12:.LANCHOR51]
 	ldrh	w1, [x4, 20]
 	lsr	w3, w1, 6
 	and	w1, w1, 63
@@ -10301,10 +10224,10 @@ FtlLoadSysInfo:
 	ldrb	w1, [x4, 12]
 	strh	w3, [x2, 2]
 	strb	w1, [x2, 8]
-	adrp	x2, .LANCHOR53
+	adrp	x2, .LANCHOR52
 	ldrh	w1, [x4, 22]
-	add	x3, x2, :lo12:.LANCHOR53
-	strh	w1, [x2, #:lo12:.LANCHOR53]
+	add	x3, x2, :lo12:.LANCHOR52
+	strh	w1, [x2, #:lo12:.LANCHOR52]
 	mov	x21, x2
 	ldrh	w1, [x4, 24]
 	lsr	w7, w1, 6
@@ -10312,92 +10235,92 @@ FtlLoadSysInfo:
 	strb	w1, [x3, 6]
 	ldrb	w1, [x4, 13]
 	strb	w1, [x3, 8]
-	adrp	x1, .LANCHOR84
+	adrp	x1, .LANCHOR83
 	strh	w7, [x3, 2]
 	ldr	w3, [x4, 32]
+	str	wzr, [x1, #:lo12:.LANCHOR83]
+	adrp	x1, .LANCHOR84
 	str	wzr, [x1, #:lo12:.LANCHOR84]
-	adrp	x1, .LANCHOR85
-	str	wzr, [x1, #:lo12:.LANCHOR85]
-	adrp	x1, .LANCHOR89
-	str	wzr, [x1, #:lo12:.LANCHOR89]
 	adrp	x1, .LANCHOR88
 	str	wzr, [x1, #:lo12:.LANCHOR88]
+	adrp	x1, .LANCHOR87
+	str	wzr, [x1, #:lo12:.LANCHOR87]
+	adrp	x1, .LANCHOR89
+	str	w3, [x1, #:lo12:.LANCHOR89]
 	adrp	x1, .LANCHOR90
-	str	w3, [x1, #:lo12:.LANCHOR90]
+	str	wzr, [x1, #:lo12:.LANCHOR90]
 	adrp	x1, .LANCHOR91
 	str	wzr, [x1, #:lo12:.LANCHOR91]
-	adrp	x1, .LANCHOR92
-	str	wzr, [x1, #:lo12:.LANCHOR92]
-	adrp	x1, .LANCHOR87
+	adrp	x1, .LANCHOR86
 	ldr	w3, [x4, 40]
-	str	wzr, [x1, #:lo12:.LANCHOR87]
-	adrp	x1, .LANCHOR82
-	ldr	w4, [x1, #:lo12:.LANCHOR82]
+	str	wzr, [x1, #:lo12:.LANCHOR86]
+	adrp	x1, .LANCHOR81
+	ldr	w4, [x1, #:lo12:.LANCHOR81]
 	cmp	w3, w4
-	bls	.L1406
-	str	w3, [x1, #:lo12:.LANCHOR82]
-.L1406:
-	add	x19, x19, :lo12:.LANCHOR39
-	adrp	x1, .LANCHOR83
-	ldr	w3, [x1, #:lo12:.LANCHOR83]
+	bls	.L1405
+	str	w3, [x1, #:lo12:.LANCHOR81]
+.L1405:
+	add	x19, x19, :lo12:.LANCHOR38
+	adrp	x1, .LANCHOR82
+	ldr	w3, [x1, #:lo12:.LANCHOR82]
 	ldr	w2, [x19, 36]
 	cmp	w2, w3
-	bls	.L1407
-	str	w2, [x1, #:lo12:.LANCHOR83]
-.L1407:
+	bls	.L1406
+	str	w2, [x1, #:lo12:.LANCHOR82]
+.L1406:
 	mov	w1, 65535
 	cmp	w6, w1
+	beq	.L1407
+	add	x0, x0, :lo12:.LANCHOR50
+	bl	make_superblock
+.L1407:
+	ldrh	w2, [x20, #:lo12:.LANCHOR51]
+	mov	w1, 65535
+	add	x0, x20, :lo12:.LANCHOR51
+	cmp	w2, w1
 	beq	.L1408
-	add	x0, x0, :lo12:.LANCHOR51
 	bl	make_superblock
 .L1408:
-	ldrh	w2, [x20, #:lo12:.LANCHOR52]
+	ldrh	w2, [x21, #:lo12:.LANCHOR52]
 	mov	w1, 65535
-	add	x0, x20, :lo12:.LANCHOR52
+	add	x0, x21, :lo12:.LANCHOR52
 	cmp	w2, w1
 	beq	.L1409
 	bl	make_superblock
 .L1409:
-	ldrh	w2, [x21, #:lo12:.LANCHOR53]
+	ldrh	w2, [x22, #:lo12:.LANCHOR144]
 	mov	w1, 65535
-	add	x0, x21, :lo12:.LANCHOR53
+	add	x0, x22, :lo12:.LANCHOR144
 	cmp	w2, w1
 	beq	.L1410
 	bl	make_superblock
 .L1410:
-	ldrh	w2, [x22, #:lo12:.LANCHOR145]
-	mov	w1, 65535
-	add	x0, x22, :lo12:.LANCHOR145
-	cmp	w2, w1
-	beq	.L1411
-	bl	make_superblock
-.L1411:
 	mov	w0, 0
-	b	.L1392
-.L1401:
-	add	x3, x19, :lo12:.LANCHOR138
+	b	.L1391
+.L1400:
+	add	x3, x19, :lo12:.LANCHOR137
 	orr	w0, w28, w24, lsl 10
 	mov	w2, 1
 	str	x3, [x29, 104]
 	mov	w1, w2
 	str	w0, [x3, 4]
-	ldr	x0, [x22, #:lo12:.LANCHOR106]
+	ldr	x0, [x22, #:lo12:.LANCHOR105]
 	str	x0, [x3, 8]
 	mov	x0, x3
 	bl	FlashReadPages
 	ldr	x3, [x29, 104]
 	ldr	x0, [x3, 16]
 	ldr	w8, [x0, 12]
-	cbz	w8, .L1396
-	ldr	w0, [x19, #:lo12:.LANCHOR138]
+	cbz	w8, .L1395
+	ldr	w0, [x19, #:lo12:.LANCHOR137]
 	cmn	w0, #1
-	beq	.L1396
+	beq	.L1395
 	ldrh	w1, [x26]
 	ldr	x0, [x3, 8]
 	bl	js_hash
 	cmp	w8, w0
-	beq	.L1396
-	add	x10, x20, :lo12:.LANCHOR139
+	beq	.L1395
+	add	x10, x20, :lo12:.LANCHOR138
 	mov	w6, w0
 	mov	w5, w8
 	adrp	x0, .LC46
@@ -10408,39 +10331,39 @@ FtlLoadSysInfo:
 	add	x0, x0, :lo12:.LC46
 	str	x10, [x29, 104]
 	bl	printf
-	cbnz	w28, .L1397
+	cbnz	w28, .L1396
 	ldr	x10, [x29, 104]
 	ldrh	w0, [x10, 4]
 	cmp	w24, w0
-	beq	.L1397
+	beq	.L1396
 	sxth	w24, w0
-	adrp	x0, .LANCHOR20
-	ldrh	w7, [x0, #:lo12:.LANCHOR20]
+	adrp	x0, .LANCHOR19
+	ldrh	w7, [x0, #:lo12:.LANCHOR19]
 	sub	w7, w7, #1
-.L1423:
+.L1422:
 	sxth	w28, w7
-	b	.L1395
-.L1397:
-	mov	w0, -1
-	str	w0, [x19, #:lo12:.LANCHOR138]
+	b	.L1394
 .L1396:
-	ldr	w0, [x19, #:lo12:.LANCHOR138]
+	mov	w0, -1
+	str	w0, [x19, #:lo12:.LANCHOR137]
+.L1395:
+	ldr	w0, [x19, #:lo12:.LANCHOR137]
 	cmn	w0, #1
-	beq	.L1399
-	ldr	x0, [x22, #:lo12:.LANCHOR106]
+	beq	.L1398
+	ldr	x0, [x22, #:lo12:.LANCHOR105]
 	mov	w1, 19539
 	movk	w1, 0x4654, lsl 16
 	ldr	w0, [x0]
 	cmp	w0, w1
-	bne	.L1399
-	ldr	x0, [x25, #:lo12:.LANCHOR114]
+	bne	.L1398
+	ldr	x0, [x25, #:lo12:.LANCHOR113]
 	ldrh	w1, [x0]
 	mov	w0, 61604
 	cmp	w1, w0
-	beq	.L1400
-.L1399:
+	beq	.L1399
+.L1398:
 	sub	w7, w28, #1
-	b	.L1423
+	b	.L1422
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
 	.section	.text.FtlMapTblRecovery,"ax",@progbits
 	.align	2
@@ -10455,7 +10378,7 @@ FtlMapTblRecovery:
 	stp	x25, x26, [sp, 64]
 	mov	w20, 0
 	ldrh	w25, [x0, 6]
-	adrp	x26, .LANCHOR20
+	adrp	x26, .LANCHOR19
 	stp	x23, x24, [sp, 48]
 	ldr	x23, [x0, 40]
 	ldr	x24, [x0, 16]
@@ -10464,21 +10387,21 @@ FtlMapTblRecovery:
 	str	x0, [x29, 144]
 	ldrh	w0, [x19, 8]
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR106
+	adrp	x22, .LANCHOR105
 	stp	x27, x28, [sp, 80]
 	str	w0, [x29, 152]
 	mov	x0, x23
 	bl	ftl_memset
 	stp	wzr, wzr, [x19, 48]
-	adrp	x0, .LANCHOR138
-	add	x6, x0, :lo12:.LANCHOR138
-	ldr	x1, [x22, #:lo12:.LANCHOR106]
+	adrp	x0, .LANCHOR137
+	add	x6, x0, :lo12:.LANCHOR137
+	ldr	x1, [x22, #:lo12:.LANCHOR105]
 	mov	x27, x6
 	str	x0, [x29, 128]
 	str	x1, [x6, 8]
-	adrp	x1, .LANCHOR114
+	adrp	x1, .LANCHOR113
 	ldr	w0, [x29, 152]
-	ldr	x21, [x1, #:lo12:.LANCHOR114]
+	ldr	x21, [x1, #:lo12:.LANCHOR113]
 	mov	w1, -1
 	str	x21, [x6, 16]
 	sub	w0, w0, #1
@@ -10486,22 +10409,22 @@ FtlMapTblRecovery:
 	strh	w1, [x19, 2]
 	mov	w1, 1
 	str	w0, [x29, 108]
-	add	x0, x26, :lo12:.LANCHOR20
+	add	x0, x26, :lo12:.LANCHOR19
 	str	w1, [x19, 56]
 	str	x0, [x29, 96]
-.L1425:
+.L1424:
 	ldr	w0, [x29, 152]
 	cmp	w20, w0
-	bge	.L1444
+	bge	.L1443
 	ldr	w0, [x29, 108]
 	sxtw	x28, w20
 	cmp	w20, w0
-	bne	.L1426
+	bne	.L1425
 	lsl	x0, x28, 1
 	mov	w1, 1
 	add	x26, x24, x0
-	adrp	x27, .LANCHOR23
-	add	x27, x27, :lo12:.LANCHOR23
+	adrp	x27, .LANCHOR22
+	add	x27, x27, :lo12:.LANCHOR22
 	ldrh	w0, [x24, x0]
 	mov	w24, 0
 	bl	FtlGetLastWrittenPage
@@ -10512,26 +10435,26 @@ FtlMapTblRecovery:
 	strh	w20, [x19]
 	str	w1, [x29, 152]
 	ldr	w0, [x0, x28, lsl 2]
-	adrp	x28, .LANCHOR180
+	adrp	x28, .LANCHOR179
 	str	w0, [x19, 48]
-	add	x28, x28, :lo12:.LANCHOR180
+	add	x28, x28, :lo12:.LANCHOR179
 	ldr	x0, [x29, 128]
-	add	x22, x0, :lo12:.LANCHOR138
-.L1427:
+	add	x22, x0, :lo12:.LANCHOR137
+.L1426:
 	ldr	w0, [x29, 152]
 	cmp	w24, w0
-	ble	.L1430
-.L1444:
+	ble	.L1429
+.L1443:
 	mov	x0, x19
 	bl	ftl_free_no_use_map_blk
-	adrp	x0, .LANCHOR20
+	adrp	x0, .LANCHOR19
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x0, #:lo12:.LANCHOR20]
+	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	cmp	w1, w0
-	bne	.L1432
+	bne	.L1431
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L1432:
+.L1431:
 	mov	x0, x19
 	bl	ftl_map_blk_gc
 	mov	x0, x19
@@ -10544,7 +10467,7 @@ FtlMapTblRecovery:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L1430:
+.L1429:
 	ldrh	w0, [x26]
 	mov	w2, 1
 	mov	w1, w2
@@ -10556,16 +10479,16 @@ FtlMapTblRecovery:
 	ldr	w0, [x0, 12]
 	str	w0, [x29, 156]
 	uxtw	x0, w0
-	cbz	w0, .L1428
+	cbz	w0, .L1427
 	ldr	w0, [x22]
 	cmn	w0, #1
-	beq	.L1428
+	beq	.L1427
 	ldrh	w1, [x27]
 	ldr	x0, [x22, 8]
 	bl	js_hash
 	ldr	w1, [x29, 156]
 	cmp	w1, w0
-	beq	.L1428
+	beq	.L1427
 	mov	w5, w0
 	mov	x4, x1
 	mov	w3, w24
@@ -10576,30 +10499,30 @@ FtlMapTblRecovery:
 	bl	printf
 	mov	w0, -1
 	str	w0, [x22]
-.L1428:
+.L1427:
 	ldr	w0, [x22]
 	cmn	w0, #1
-	beq	.L1429
+	beq	.L1428
 	ldrh	w0, [x21, 8]
 	cmp	w25, w0
-	bls	.L1429
+	bls	.L1428
 	ldrh	w2, [x21]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
-	bne	.L1429
+	bne	.L1428
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x22, 4]
 	str	w1, [x23, x0]
-.L1429:
+.L1428:
 	add	w6, w24, 1
 	sxth	w24, w6
-	b	.L1427
-.L1426:
+	b	.L1426
+.L1425:
 	lsl	x2, x28, 1
-	ldr	x0, [x22, #:lo12:.LANCHOR106]
+	ldr	x0, [x22, #:lo12:.LANCHOR105]
 	str	x0, [x27, 8]
 	add	x0, x24, x2
-	ldrh	w1, [x26, #:lo12:.LANCHOR20]
+	ldrh	w1, [x26, #:lo12:.LANCHOR19]
 	str	x0, [x29, 136]
 	ldrh	w0, [x24, x2]
 	sub	w1, w1, #1
@@ -10611,28 +10534,28 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	w0, [x27]
 	cmn	w0, #1
-	beq	.L1446
+	beq	.L1445
 	ldrh	w1, [x21]
 	ldrh	w0, [x19, 4]
 	cmp	w1, w0
-	bne	.L1446
+	bne	.L1445
 	ldrh	w1, [x21, 8]
 	mov	w0, 64245
 	cmp	w1, w0
-	beq	.L1434
-.L1446:
-	adrp	x0, .LANCHOR23
-	add	x0, x0, :lo12:.LANCHOR23
+	beq	.L1433
+.L1445:
+	adrp	x0, .LANCHOR22
+	add	x0, x0, :lo12:.LANCHOR22
 	mov	w28, 0
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR180
-	add	x0, x0, :lo12:.LANCHOR180
+	adrp	x0, .LANCHOR179
+	add	x0, x0, :lo12:.LANCHOR179
 	str	x0, [x29, 112]
-.L1435:
+.L1434:
 	ldr	x0, [x29, 96]
 	ldrh	w0, [x0]
 	cmp	w28, w0
-	bge	.L1442
+	bge	.L1441
 	ldr	x0, [x29, 136]
 	mov	w2, 1
 	mov	w1, w2
@@ -10645,17 +10568,17 @@ FtlMapTblRecovery:
 	ldr	w0, [x0, 12]
 	str	w0, [x29, 156]
 	uxtw	x0, w0
-	cbz	w0, .L1439
+	cbz	w0, .L1438
 	ldr	w0, [x27]
 	cmn	w0, #1
-	beq	.L1439
+	beq	.L1438
 	ldr	x0, [x29, 120]
 	ldrh	w1, [x0]
 	ldr	x0, [x27, 8]
 	bl	js_hash
 	ldr	w1, [x29, 156]
 	cmp	w1, w0
-	beq	.L1439
+	beq	.L1438
 	mov	x4, x1
 	ldr	x1, [x29, 112]
 	mov	w5, w0
@@ -10666,51 +10589,51 @@ FtlMapTblRecovery:
 	bl	printf
 	mov	w0, -1
 	str	w0, [x27]
-.L1439:
+.L1438:
 	ldr	w0, [x27]
 	cmn	w0, #1
-	beq	.L1440
+	beq	.L1439
 	ldrh	w0, [x21, 8]
 	cmp	w25, w0
-	bls	.L1440
+	bls	.L1439
 	ldrh	w2, [x21]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
-	bne	.L1440
+	bne	.L1439
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x27, 4]
 	str	w1, [x23, x0]
-.L1440:
+.L1439:
 	add	w7, w28, 1
 	sxth	w28, w7
-	b	.L1435
-.L1434:
-	ldrh	w3, [x26, #:lo12:.LANCHOR20]
+	b	.L1434
+.L1433:
+	ldrh	w3, [x26, #:lo12:.LANCHOR19]
 	mov	w0, 0
-	ldr	x4, [x22, #:lo12:.LANCHOR106]
+	ldr	x4, [x22, #:lo12:.LANCHOR105]
 	sub	w3, w3, #1
-.L1436:
+.L1435:
 	cmp	w0, w3
-	blt	.L1438
-.L1442:
+	blt	.L1437
+.L1441:
 	add	w20, w20, 1
 	sxth	w20, w20
-	b	.L1425
-.L1438:
+	b	.L1424
+.L1437:
 	lsl	w2, w0, 1
 	sxtw	x2, w2
 	lsl	x1, x2, 2
 	ldrh	w1, [x4, x1]
 	cmp	w25, w1
-	bls	.L1437
+	bls	.L1436
 	add	x2, x2, 1
 	ubfiz	x1, x1, 2, 16
 	ldr	w2, [x4, x2, lsl 2]
 	str	w2, [x23, x1]
-.L1437:
+.L1436:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L1436
+	b	.L1435
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
 	.section	.text.FtlLoadVonderInfo,"ax",@progbits
 	.align	2
@@ -10718,31 +10641,31 @@ FtlMapTblRecovery:
 	.type	FtlLoadVonderInfo, %function
 FtlLoadVonderInfo:
 	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR27
-	adrp	x0, .LANCHOR161
-	add	x0, x0, :lo12:.LANCHOR161
+	adrp	x1, .LANCHOR26
+	adrp	x0, .LANCHOR160
+	add	x0, x0, :lo12:.LANCHOR160
 	add	x29, sp, 0
-	ldrh	w1, [x1, #:lo12:.LANCHOR27]
+	ldrh	w1, [x1, #:lo12:.LANCHOR26]
 	strh	w1, [x0, 10]
 	mov	w1, -3962
 	strh	w1, [x0, 4]
-	adrp	x1, .LANCHOR35
-	ldrh	w1, [x1, #:lo12:.LANCHOR35]
+	adrp	x1, .LANCHOR34
+	ldrh	w1, [x1, #:lo12:.LANCHOR34]
 	strh	w1, [x0, 8]
-	adrp	x1, .LANCHOR28
-	ldrh	w1, [x1, #:lo12:.LANCHOR28]
+	adrp	x1, .LANCHOR27
+	ldrh	w1, [x1, #:lo12:.LANCHOR27]
 	strh	w1, [x0, 6]
-	adrp	x1, .LANCHOR36
-	ldr	x1, [x1, #:lo12:.LANCHOR36]
+	adrp	x1, .LANCHOR35
+	ldr	x1, [x1, #:lo12:.LANCHOR35]
 	str	x1, [x0, 16]
-	adrp	x1, .LANCHOR122
-	ldr	x1, [x1, #:lo12:.LANCHOR122]
-	str	x1, [x0, 24]
 	adrp	x1, .LANCHOR121
 	ldr	x1, [x1, #:lo12:.LANCHOR121]
+	str	x1, [x0, 24]
+	adrp	x1, .LANCHOR120
+	ldr	x1, [x1, #:lo12:.LANCHOR120]
 	str	x1, [x0, 32]
-	adrp	x1, .LANCHOR123
-	ldr	x1, [x1, #:lo12:.LANCHOR123]
+	adrp	x1, .LANCHOR122
+	ldr	x1, [x1, #:lo12:.LANCHOR122]
 	str	x1, [x0, 40]
 	bl	FtlMapTblRecovery
 	mov	w0, 0
@@ -10757,8 +10680,8 @@ FtlLoadMapInfo:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	FtlL2PDataInit
-	adrp	x0, .LANCHOR129
-	add	x0, x0, :lo12:.LANCHOR129
+	adrp	x0, .LANCHOR128
+	add	x0, x0, :lo12:.LANCHOR128
 	bl	FtlMapTblRecovery
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
@@ -10770,34 +10693,34 @@ FtlLoadMapInfo:
 	.type	FtlSysBlkInit, %function
 FtlSysBlkInit:
 	stp	x29, x30, [sp, -64]!
-	adrp	x0, .LANCHOR4
+	adrp	x0, .LANCHOR3
 	add	x29, sp, 0
-	ldrh	w0, [x0, #:lo12:.LANCHOR4]
+	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR156
+	adrp	x19, .LANCHOR155
 	stp	x21, x22, [sp, 32]
-	strh	wzr, [x19, #:lo12:.LANCHOR156]
+	strh	wzr, [x19, #:lo12:.LANCHOR155]
 	str	x23, [sp, 48]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlScanSysBlk
-	adrp	x0, .LANCHOR139
-	ldrh	w1, [x0, #:lo12:.LANCHOR139]
+	adrp	x0, .LANCHOR138
+	ldrh	w1, [x0, #:lo12:.LANCHOR138]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1471
-.L1473:
+	bne	.L1470
+.L1472:
 	mov	w21, -1
-.L1470:
+.L1469:
 	mov	w0, w21
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1471:
+.L1470:
 	bl	FtlLoadSysInfo
 	mov	w21, w0
-	cbnz	w0, .L1473
+	cbnz	w0, .L1472
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -10807,46 +10730,46 @@ FtlSysBlkInit:
 	bl	FtlPowerLostRecovery
 	mov	w0, 1
 	bl	FtlUpdateVaildLpn
-	adrp	x0, .LANCHOR33
-	ldrh	w2, [x0, #:lo12:.LANCHOR33]
-	adrp	x0, .LANCHOR55
-	ldr	x1, [x0, #:lo12:.LANCHOR55]
+	adrp	x0, .LANCHOR32
+	ldrh	w2, [x0, #:lo12:.LANCHOR32]
+	adrp	x0, .LANCHOR54
+	ldr	x1, [x0, #:lo12:.LANCHOR54]
 	mov	w0, 0
 	add	x1, x1, 4
-.L1474:
+.L1473:
 	cmp	w0, w2
-	bge	.L1479
+	bge	.L1478
 	ldr	w3, [x1], 16
-	tbz	w3, #31, .L1475
-.L1479:
-	adrp	x3, .LANCHOR83
+	tbz	w3, #31, .L1474
+.L1478:
+	adrp	x3, .LANCHOR82
 	cmp	w0, w2
-	ldr	w1, [x3, #:lo12:.LANCHOR83]
+	ldr	w1, [x3, #:lo12:.LANCHOR82]
 	add	w1, w1, 32
-	str	w1, [x3, #:lo12:.LANCHOR83]
-	bge	.L1481
-.L1476:
-	adrp	x23, .LANCHOR51
-	add	x20, x23, :lo12:.LANCHOR51
+	str	w1, [x3, #:lo12:.LANCHOR82]
+	bge	.L1480
+.L1475:
+	adrp	x23, .LANCHOR50
+	add	x20, x23, :lo12:.LANCHOR50
 	mov	x0, x20
-	adrp	x22, .LANCHOR52
+	adrp	x22, .LANCHOR51
 	bl	FtlSuperblockPowerLostFix
-	add	x19, x22, :lo12:.LANCHOR52
+	add	x19, x22, :lo12:.LANCHOR51
 	mov	x0, x19
 	bl	FtlSuperblockPowerLostFix
-	adrp	x0, .LANCHOR42
+	adrp	x0, .LANCHOR41
 	ldrh	w3, [x20, 4]
-	ldr	x1, [x0, #:lo12:.LANCHOR42]
-	ldrh	w0, [x23, #:lo12:.LANCHOR51]
+	ldr	x1, [x0, #:lo12:.LANCHOR41]
+	ldrh	w0, [x23, #:lo12:.LANCHOR50]
 	lsl	x0, x0, 1
 	ldrh	w2, [x1, x0]
 	sub	w2, w2, w3
-	adrp	x3, .LANCHOR19
+	adrp	x3, .LANCHOR18
 	strh	w2, [x1, x0]
 	strb	wzr, [x20, 6]
-	ldrh	w0, [x3, #:lo12:.LANCHOR19]
+	ldrh	w0, [x3, #:lo12:.LANCHOR18]
 	strh	w0, [x20, 2]
-	ldrh	w0, [x22, #:lo12:.LANCHOR52]
+	ldrh	w0, [x22, #:lo12:.LANCHOR51]
 	strh	wzr, [x20, 4]
 	ldrh	w4, [x19, 4]
 	lsl	x0, x0, 1
@@ -10854,27 +10777,27 @@ FtlSysBlkInit:
 	sub	w2, w2, w4
 	strh	w2, [x1, x0]
 	strb	wzr, [x19, 6]
-	ldrh	w0, [x3, #:lo12:.LANCHOR19]
+	ldrh	w0, [x3, #:lo12:.LANCHOR18]
 	strh	w0, [x19, 2]
-	adrp	x0, .LANCHOR39
-	add	x0, x0, :lo12:.LANCHOR39
+	adrp	x0, .LANCHOR38
+	add	x0, x0, :lo12:.LANCHOR38
 	strh	wzr, [x19, 4]
 	ldrh	w1, [x0, 30]
 	add	w1, w1, 1
 	strh	w1, [x0, 30]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1483:
+.L1482:
 	bl	FtlVpcTblFlush
-	b	.L1470
-.L1475:
+	b	.L1469
+.L1474:
 	add	w0, w0, 1
-	b	.L1474
-.L1481:
-	ldrh	w0, [x19, #:lo12:.LANCHOR156]
-	cbnz	w0, .L1476
+	b	.L1473
+.L1480:
+	ldrh	w0, [x19, #:lo12:.LANCHOR155]
+	cbnz	w0, .L1475
 	bl	l2p_flush
-	b	.L1483
+	b	.L1482
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.section	.text.ftl_low_format,"ax",@progbits
 	.align	2
@@ -10882,154 +10805,150 @@ FtlSysBlkInit:
 	.type	ftl_low_format, %function
 ftl_low_format:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR83
+	adrp	x0, .LANCHOR82
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR4
-	str	wzr, [x0, #:lo12:.LANCHOR83]
-	adrp	x0, .LANCHOR143
+	adrp	x23, .LANCHOR3
+	str	wzr, [x0, #:lo12:.LANCHOR82]
+	adrp	x0, .LANCHOR142
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR82
-	str	wzr, [x0, #:lo12:.LANCHOR143]
-	ldrh	w0, [x24, #:lo12:.LANCHOR4]
+	adrp	x20, .LANCHOR81
+	str	wzr, [x0, #:lo12:.LANCHOR142]
+	ldrh	w0, [x23, #:lo12:.LANCHOR3]
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
-	str	wzr, [x20, #:lo12:.LANCHOR82]
+	str	wzr, [x20, #:lo12:.LANCHOR81]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	w0, .L1485
+	cbz	w0, .L1484
 	bl	FtlMakeBbt
-.L1485:
-	adrp	x23, .LANCHOR12
-	adrp	x0, .LANCHOR109
+.L1484:
+	adrp	x22, .LANCHOR11
+	adrp	x0, .LANCHOR108
 	mov	w6, 23752
-	ldrh	w1, [x23, #:lo12:.LANCHOR12]
+	ldrh	w1, [x22, #:lo12:.LANCHOR11]
 	movk	w6, 0xa0f, lsl 16
-	ldr	x4, [x0, #:lo12:.LANCHOR109]
-	adrp	x0, .LANCHOR110
+	ldr	x4, [x0, #:lo12:.LANCHOR108]
+	adrp	x0, .LANCHOR109
 	lsl	w1, w1, 7
-	ldr	x5, [x0, #:lo12:.LANCHOR110]
+	ldr	x5, [x0, #:lo12:.LANCHOR109]
 	mov	w0, 0
-.L1486:
+.L1485:
 	cmp	w0, w1
-	blt	.L1487
+	blt	.L1486
+	adrp	x24, .LANCHOR4
 	adrp	x21, .LANCHOR5
-	adrp	x22, .LANCHOR6
-	add	x26, x22, :lo12:.LANCHOR6
+	add	x26, x21, :lo12:.LANCHOR5
 	mov	w19, 0
-	ldrh	w25, [x21, #:lo12:.LANCHOR5]
-.L1488:
+	ldrh	w25, [x24, #:lo12:.LANCHOR4]
+.L1487:
 	ldrh	w0, [x26]
 	cmp	w0, w25
-	bhi	.L1489
-	adrp	x25, .LANCHOR3
+	bhi	.L1488
+	adrp	x25, .LANCHOR2
 	sub	w1, w19, #2
-	ldrh	w0, [x25, #:lo12:.LANCHOR3]
+	ldrh	w0, [x25, #:lo12:.LANCHOR2]
 	cmp	w1, w0, lsl 1
-	bgt	.L1490
-.L1494:
-	add	x26, x21, :lo12:.LANCHOR5
+	bgt	.L1489
+.L1493:
+	add	x24, x24, :lo12:.LANCHOR4
 	mov	w19, 0
-	mov	w24, 0
-.L1491:
-	ldrh	w0, [x26]
-	cmp	w0, w24
-	bhi	.L1495
-	adrp	x0, .LANCHOR99
-	ldrh	w1, [x22, #:lo12:.LANCHOR6]
-	ldrh	w4, [x25, #:lo12:.LANCHOR3]
-	adrp	x2, .LANCHOR171
-	str	w1, [x0, #:lo12:.LANCHOR99]
-	adrp	x0, .LANCHOR7
-	adrp	x3, .LANCHOR152
-	ldr	w1, [x0, #:lo12:.LANCHOR7]
+	mov	w23, 0
+.L1490:
+	ldrh	w0, [x24]
+	cmp	w0, w23
+	bhi	.L1494
+	adrp	x0, .LANCHOR98
+	ldrh	w1, [x21, #:lo12:.LANCHOR5]
+	ldrh	w4, [x25, #:lo12:.LANCHOR2]
+	adrp	x2, .LANCHOR170
+	str	w1, [x0, #:lo12:.LANCHOR98]
+	adrp	x0, .LANCHOR6
+	adrp	x3, .LANCHOR151
+	ldr	w1, [x0, #:lo12:.LANCHOR6]
 	udiv	w5, w1, w4
 	ubfx	x0, x5, 5, 16
-	str	w5, [x3, #:lo12:.LANCHOR152]
+	str	w5, [x3, #:lo12:.LANCHOR151]
 	add	w6, w0, 36
-	strh	w6, [x2, #:lo12:.LANCHOR171]
+	strh	w6, [x2, #:lo12:.LANCHOR170]
 	mov	w6, 24
 	mul	w6, w4, w6
 	cmp	w19, w6
-	ble	.L1496
+	ble	.L1495
 	sub	w1, w1, w19
 	udiv	w1, w1, w4
-	str	w1, [x3, #:lo12:.LANCHOR152]
+	str	w1, [x3, #:lo12:.LANCHOR151]
 	lsr	w1, w1, 5
 	add	w1, w1, 24
-	strh	w1, [x2, #:lo12:.LANCHOR171]
-.L1496:
-	adrp	x1, .LANCHOR15
-	ldrh	w1, [x1, #:lo12:.LANCHOR15]
-	cbz	w1, .L1498
-	ldrh	w6, [x2, #:lo12:.LANCHOR171]
+	strh	w1, [x2, #:lo12:.LANCHOR170]
+.L1495:
+	adrp	x1, .LANCHOR14
+	ldrh	w1, [x1, #:lo12:.LANCHOR14]
+	cbz	w1, .L1497
+	ldrh	w6, [x2, #:lo12:.LANCHOR170]
 	add	w6, w6, w1, lsr 1
-	strh	w6, [x2, #:lo12:.LANCHOR171]
+	strh	w6, [x2, #:lo12:.LANCHOR170]
 	mul	w6, w1, w4
 	cmp	w19, w6
-	bge	.L1498
+	bge	.L1497
 	add	w1, w1, 32
-	str	w5, [x3, #:lo12:.LANCHOR152]
+	str	w5, [x3, #:lo12:.LANCHOR151]
 	add	w1, w0, w1
-	strh	w1, [x2, #:lo12:.LANCHOR171]
-.L1498:
-	ldrh	w1, [x2, #:lo12:.LANCHOR171]
-	adrp	x25, .LANCHOR179
-	ldr	w0, [x3, #:lo12:.LANCHOR152]
-	adrp	x24, .LANCHOR42
+	strh	w1, [x2, #:lo12:.LANCHOR170]
+.L1497:
+	ldrh	w1, [x2, #:lo12:.LANCHOR170]
+	adrp	x23, .LANCHOR178
+	ldr	w0, [x3, #:lo12:.LANCHOR151]
 	sub	w0, w0, w1
-	adrp	x1, .LANCHOR19
-	ldrh	w1, [x1, #:lo12:.LANCHOR19]
+	adrp	x1, .LANCHOR18
+	ldrh	w1, [x1, #:lo12:.LANCHOR18]
 	mul	w0, w0, w4
-	str	w0, [x25, #:lo12:.LANCHOR179]
+	str	w0, [x23, #:lo12:.LANCHOR178]
 	mul	w0, w1, w0
-	ldrh	w1, [x23, #:lo12:.LANCHOR12]
-	str	w0, [x3, #:lo12:.LANCHOR152]
-	mov	w23, -1
+	ldrh	w1, [x22, #:lo12:.LANCHOR11]
+	str	w0, [x3, #:lo12:.LANCHOR151]
+	mov	x22, x23
 	mul	w0, w1, w0
-	adrp	x1, .LANCHOR34
-	str	w0, [x1, #:lo12:.LANCHOR34]
+	adrp	x1, .LANCHOR33
+	str	w0, [x1, #:lo12:.LANCHOR33]
 	bl	FtlBbmTblFlush
-	ldr	x0, [x24, #:lo12:.LANCHOR42]
+	ldrh	w2, [x21, #:lo12:.LANCHOR5]
+	adrp	x21, .LANCHOR41
 	mov	w1, 0
-	ldrh	w2, [x22, #:lo12:.LANCHOR6]
+	ldr	x0, [x21, #:lo12:.LANCHOR41]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	adrp	x0, .LANCHOR59
-	adrp	x1, .LANCHOR145
-	ldrh	w2, [x21, #:lo12:.LANCHOR5]
-	str	wzr, [x0, #:lo12:.LANCHOR59]
-	add	x0, x1, :lo12:.LANCHOR145
-	strh	w23, [x1, #:lo12:.LANCHOR145]
-	mov	w1, 255
-	lsr	w2, w2, 3
-	strh	wzr, [x0, 2]
-	strb	wzr, [x0, 6]
-	strb	wzr, [x0, 8]
-	adrp	x0, .LANCHOR51
-	add	x19, x0, :lo12:.LANCHOR51
-	strh	wzr, [x0, #:lo12:.LANCHOR51]
-	mov	w0, 1
-	strb	w0, [x19, 8]
-	adrp	x0, .LANCHOR1
+	adrp	x2, .LANCHOR144
+	add	x1, x2, :lo12:.LANCHOR144
+	adrp	x0, .LANCHOR58
+	strh	wzr, [x1, 2]
+	strb	wzr, [x1, 6]
+	strb	wzr, [x1, 8]
+	adrp	x1, .LANCHOR50
+	add	x19, x1, :lo12:.LANCHOR50
+	str	wzr, [x0, #:lo12:.LANCHOR58]
+	mov	w0, -1
+	mov	w23, w0
+	strh	wzr, [x1, #:lo12:.LANCHOR50]
+	mov	w1, 1
+	strh	w0, [x2, #:lo12:.LANCHOR144]
 	strh	wzr, [x19, 2]
-	ldr	x0, [x0, #:lo12:.LANCHOR1]
 	strb	wzr, [x19, 6]
-	bl	ftl_memset
-.L1500:
+	strb	w1, [x19, 8]
+.L1499:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1501
-	ldr	x1, [x24, #:lo12:.LANCHOR42]
+	cbnz	w1, .L1500
+	ldr	x1, [x21, #:lo12:.LANCHOR41]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L1500
-.L1487:
+	b	.L1499
+.L1486:
 	ubfiz	x3, x0, 2, 16
 	mvn	w2, w0
 	orr	w2, w0, w2, lsl 16
@@ -11037,8 +10956,8 @@ ftl_low_format:
 	and	w0, w0, 65535
 	str	w2, [x4, x3]
 	str	w6, [x5, x3]
-	b	.L1486
-.L1489:
+	b	.L1485
+.L1488:
 	mov	w0, w25
 	mov	w1, 1
 	add	w25, w25, 1
@@ -11046,100 +10965,100 @@ ftl_low_format:
 	add	w19, w19, w0
 	and	w25, w25, 65535
 	and	w19, w19, 65535
-	b	.L1488
-.L1490:
+	b	.L1487
+.L1489:
 	udiv	w0, w19, w0
-	adrp	x1, .LANCHOR31
-	ldr	w19, [x1, #:lo12:.LANCHOR31]
+	adrp	x1, .LANCHOR30
+	ldr	w19, [x1, #:lo12:.LANCHOR30]
 	add	w0, w0, w19
 	bl	FtlSysBlkNumInit
-	ldrh	w0, [x24, #:lo12:.LANCHOR4]
-	add	x24, x22, :lo12:.LANCHOR6
+	ldrh	w0, [x23, #:lo12:.LANCHOR3]
+	add	x23, x21, :lo12:.LANCHOR5
 	bl	FtlFreeSysBlkQueueInit
-	ldrh	w19, [x21, #:lo12:.LANCHOR5]
-.L1492:
-	ldrh	w0, [x24]
+	ldrh	w19, [x24, #:lo12:.LANCHOR4]
+.L1491:
+	ldrh	w0, [x23]
 	cmp	w0, w19
-	bls	.L1494
+	bls	.L1493
 	mov	w0, w19
 	add	w19, w19, 1
 	mov	w1, 1
 	and	w19, w19, 65535
 	bl	FtlLowFormatEraseBlock
-	b	.L1492
-.L1495:
-	mov	w0, w24
+	b	.L1491
+.L1494:
+	mov	w0, w23
 	mov	w1, 0
-	add	w24, w24, 1
+	add	w23, w23, 1
 	bl	FtlLowFormatEraseBlock
 	add	w19, w19, w0
-	and	w24, w24, 65535
+	and	w23, w23, 65535
 	and	w19, w19, 65535
-	b	.L1491
-.L1501:
-	ldr	w1, [x20, #:lo12:.LANCHOR82]
+	b	.L1490
+.L1500:
+	ldr	w1, [x20, #:lo12:.LANCHOR81]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
 	mov	w23, -1
 	add	w1, w1, 1
-	str	w1, [x20, #:lo12:.LANCHOR82]
-	ldr	x1, [x24, #:lo12:.LANCHOR42]
+	str	w1, [x20, #:lo12:.LANCHOR81]
+	ldr	x1, [x21, #:lo12:.LANCHOR41]
 	ldrh	w2, [x19, 4]
 	strh	w2, [x1, x0]
-	adrp	x2, .LANCHOR52
-	add	x0, x2, :lo12:.LANCHOR52
+	adrp	x2, .LANCHOR51
+	add	x0, x2, :lo12:.LANCHOR51
 	ldrh	w1, [x19]
 	mov	x19, x0
 	add	w1, w1, 1
 	strh	wzr, [x0, 2]
-	strh	w1, [x2, #:lo12:.LANCHOR52]
+	strh	w1, [x2, #:lo12:.LANCHOR51]
 	mov	w1, 1
 	strb	wzr, [x0, 6]
 	strb	w1, [x0, 8]
-.L1502:
+.L1501:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1503
-	ldr	x1, [x24, #:lo12:.LANCHOR42]
+	cbnz	w1, .L1502
+	ldr	x1, [x21, #:lo12:.LANCHOR41]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L1502
-.L1503:
-	ldr	w1, [x20, #:lo12:.LANCHOR82]
+	b	.L1501
+.L1502:
+	ldr	w1, [x20, #:lo12:.LANCHOR81]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
 	add	w1, w1, 1
-	str	w1, [x20, #:lo12:.LANCHOR82]
-	ldr	x1, [x24, #:lo12:.LANCHOR42]
+	str	w1, [x20, #:lo12:.LANCHOR81]
+	ldr	x1, [x21, #:lo12:.LANCHOR41]
 	ldrh	w2, [x19, 4]
 	mov	w19, -1
 	strh	w2, [x1, x0]
-	adrp	x0, .LANCHOR53
-	strh	w19, [x0, #:lo12:.LANCHOR53]
+	adrp	x0, .LANCHOR52
+	strh	w19, [x0, #:lo12:.LANCHOR52]
 	bl	FtlFreeSysBlkQueueOut
-	adrp	x2, .LANCHOR139
-	add	x1, x2, :lo12:.LANCHOR139
-	strh	w0, [x2, #:lo12:.LANCHOR139]
-	ldr	w0, [x25, #:lo12:.LANCHOR179]
+	adrp	x2, .LANCHOR138
+	add	x1, x2, :lo12:.LANCHOR138
+	strh	w0, [x2, #:lo12:.LANCHOR138]
+	ldr	w0, [x22, #:lo12:.LANCHOR178]
 	strh	w0, [x1, 6]
-	ldr	w0, [x20, #:lo12:.LANCHOR82]
+	ldr	w0, [x20, #:lo12:.LANCHOR81]
 	str	w0, [x1, 8]
 	add	w0, w0, 1
 	strh	wzr, [x1, 2]
 	strh	w19, [x1, 4]
-	str	w0, [x20, #:lo12:.LANCHOR82]
+	str	w0, [x20, #:lo12:.LANCHOR81]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	w0, .L1504
-	adrp	x0, .LANCHOR166
+	cbnz	w0, .L1503
+	adrp	x0, .LANCHOR165
 	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR166]
-.L1504:
+	str	w1, [x0, #:lo12:.LANCHOR165]
+.L1503:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11159,10 +11078,10 @@ sftl_init:
 	mov	w0, -1
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR166
-	adrp	x19, .LANCHOR181
-	add	x19, x19, :lo12:.LANCHOR181
-	str	w0, [x20, #:lo12:.LANCHOR166]
+	adrp	x20, .LANCHOR165
+	adrp	x19, .LANCHOR180
+	add	x19, x19, :lo12:.LANCHOR180
+	str	w0, [x20, #:lo12:.LANCHOR165]
 	adrp	x0, .LC38
 	add	x0, x0, :lo12:.LC38
 	bl	printf
@@ -11171,24 +11090,24 @@ sftl_init:
 	bl	FtlConstantsInit
 	bl	FtlMemInit
 	bl	FtlVariablesInit
-	adrp	x0, .LANCHOR4
-	ldrh	w0, [x0, #:lo12:.LANCHOR4]
+	adrp	x0, .LANCHOR3
+	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	bl	FtlFreeSysBlkQueueInit
-.L1510:
+.L1509:
 	bl	FtlLoadBbt
-	cbz	w0, .L1511
-.L1521:
+	cbz	w0, .L1510
+.L1520:
 	ldr	w0, [x19]
 	cmp	w0, 1
-	bne	.L1510
+	bne	.L1509
 	str	wzr, [x19]
 	bl	ftl_low_format
-	b	.L1510
-.L1511:
+	b	.L1509
+.L1510:
 	bl	FtlSysBlkInit
-	cbnz	w0, .L1521
+	cbnz	w0, .L1520
 	mov	w1, 1
-	str	w1, [x20, #:lo12:.LANCHOR166]
+	str	w1, [x20, #:lo12:.LANCHOR165]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -11200,107 +11119,142 @@ sftl_init:
 FtlWriteToIDB:
 	stp	x29, x30, [sp, -224]!
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	add	w23, w1, w0
-	stp	x25, x26, [sp, 64]
-	sub	w25, w23, #1
-	stp	x19, x20, [sp, 16]
-	cmp	w25, 63
 	stp	x21, x22, [sp, 32]
-	adrp	x24, .LANCHOR182
+	add	w22, w1, w0
+	stp	x23, x24, [sp, 48]
+	sub	w23, w22, #1
 	stp	x27, x28, [sp, 80]
-	bls	.L1523
+	cmp	w23, 63
+	stp	x19, x20, [sp, 16]
+	adrp	x27, .LANCHOR181
+	stp	x25, x26, [sp, 64]
+	bls	.L1522
 	mov	w19, w0
 	cmp	w0, 575
-	bls	.L1524
-.L1523:
-	ldr	w0, [x24, #:lo12:.LANCHOR182]
-	cbnz	w0, .L1525
-.L1590:
+	bls	.L1523
+.L1522:
+	ldr	w0, [x27, #:lo12:.LANCHOR181]
+	cbnz	w0, .L1524
+.L1588:
 	mov	w19, 0
-	b	.L1522
-.L1525:
-	adrp	x0, .LANCHOR183
-	str	x0, [x29, 120]
+	b	.L1521
+.L1524:
+	adrp	x0, .LANCHOR182
+	str	x0, [x29, 112]
 	mov	w1, 35899
-	ldr	x23, [x0, #:lo12:.LANCHOR183]
+	ldr	x26, [x0, #:lo12:.LANCHOR182]
 	movk	w1, 0xfcdc, lsl 16
-	ldr	w2, [x23]
+	ldr	w2, [x26]
 	cmp	w2, w1
-	bne	.L1527
-	adrp	x21, .LANCHOR0
-	add	x0, x21, :lo12:.LANCHOR0
-	mov	w19, 65535
+	bne	.L1526
+	adrp	x22, .LANCHOR0
+	add	x0, x22, :lo12:.LANCHOR0
+	add	x1, x26, 258048
+	mov	w19, 65023
+	add	x1, x1, 2044
 	mov	w3, 4097
-	ldrh	w1, [x0, 10]
-	mov	x0, 262140
-	add	x2, x23, x0
+	ldrh	w2, [x0, 10]
 	mov	w0, 0
-.L1531:
-	ldr	w4, [x2]
-	cbnz	w4, .L1528
-	ldr	w4, [x23, w0, uxtw 2]
+.L1530:
+	ldr	w4, [x1]
+	cbnz	w4, .L1527
+	ldr	w4, [x26, w0, uxtw 2]
 	add	w0, w0, 1
-	str	w4, [x2], -4
+	str	w4, [x1, 2048]
 	cmp	w0, w3
 	sub	w19, w19, #1
 	csel	w0, w0, wzr, cc
+	sub	x1, x1, #4
 	cmp	w19, 4096
-	bne	.L1531
+	bne	.L1530
 	mov	w19, 512
-	b	.L1530
-.L1528:
+	b	.L1529
+.L1527:
 	add	w19, w19, 127
 	lsr	w19, w19, 7
-.L1530:
-	add	w0, w19, 4
-	ubfiz	w1, w1, 2, 14
-	mov	w22, 0
-	udiv	w0, w0, w1
-	add	w0, w0, 1
-	stp	wzr, w0, [x29, 152]
+.L1529:
+	ubfiz	w0, w2, 2, 14
+	add	w21, w19, 4
+	mov	w1, w19
+	mov	w24, 0
+	udiv	w21, w21, w0
+	adrp	x0, .LC50
+	add	x0, x0, :lo12:.LC50
+	add	w21, w21, 1
+	mov	w2, w21
+	bl	printf
 	lsl	w0, w19, 7
 	str	w0, [x29, 136]
-	adrp	x0, .LANCHOR78
-	add	x20, x0, :lo12:.LANCHOR78
+	adrp	x0, .LANCHOR77
+	add	x20, x0, :lo12:.LANCHOR77
+	str	wzr, [x29, 156]
+.L1531:
+	add	w0, w21, w24
+	str	w0, [x29, 140]
+	cmp	w0, 8
+	bls	.L1553
+	ldr	w0, [x29, 156]
+	cbnz	w0, .L1554
+.L1526:
+	mov	w19, -1
+.L1554:
+	ldr	x0, [x29, 112]
+	str	wzr, [x27, #:lo12:.LANCHOR181]
+	ldr	x0, [x0, #:lo12:.LANCHOR182]
+	bl	free
+	adrp	x0, .LANCHOR183
+	ldr	x0, [x0, #:lo12:.LANCHOR183]
+	bl	free
+.L1521:
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 224
+	ret
 .L1553:
-	adrp	x26, .LANCHOR184
+	adrp	x23, .LANCHOR183
 	mov	w1, 0
 	mov	x2, 512
-	ldr	x0, [x26, #:lo12:.LANCHOR184]
+	ldr	x0, [x23, #:lo12:.LANCHOR183]
 	bl	memset
-	str	x26, [x29, 144]
-	add	x0, x21, :lo12:.LANCHOR0
-	ldrh	w27, [x0, 10]
-	adrp	x0, .LANCHOR78
-	add	x0, x0, :lo12:.LANCHOR78
+	add	x0, x22, :lo12:.LANCHOR0
+	ldrh	w3, [x0, 10]
+	mul	w0, w24, w3
+	str	w0, [x29, 144]
+	adrp	x0, .LANCHOR77
+	add	x0, x0, :lo12:.LANCHOR77
 	ldr	x1, [x0, 32]
-	mul	w25, w27, w22
 	cbz	x1, .L1561
-	ldr	x0, [x0, 40]
-	mov	w26, 6
-	cmp	x0, 0
-	mov	w0, 9
-	csel	w26, w26, w0, eq
-.L1532:
-	ldr	x2, [x20, 8]
-	mov	w1, w25
-	mov	w0, 0
-	blr	x2
-	ldr	w0, [x29, 156]
-	cmp	w0, 1
-	beq	.L1533
-	ldr	x2, [x20, 8]
-	add	w1, w27, w25
-	mov	w0, 0
-	blr	x2
+	ldr	x0, [x0, 40]
+	mov	w25, 6
+	cmp	x0, 0
+	mov	w0, 9
+	csel	w25, w25, w0, eq
+.L1532:
+	mul	w4, w24, w3
+	mov	w28, 0
 .L1533:
-	cmp	w26, 9
+	ldr	x5, [x20, 8]
+	mov	w1, w4
+	str	w3, [x29, 128]
+	mov	w0, 0
+	str	w4, [x29, 152]
+	add	w28, w28, 1
+	blr	x5
+	ldr	w3, [x29, 128]
+	cmp	w21, w28
+	ldr	w4, [x29, 152]
+	add	w4, w4, w3
+	bhi	.L1533
+	cmp	w25, 9
 	bne	.L1563
-	ldr	x0, [x29, 144]
+	ldr	x28, [x23, #:lo12:.LANCHOR183]
 	mov	w2, 1024
+	str	w3, [x29, 152]
 	mov	w1, 0
-	ldr	x28, [x0, #:lo12:.LANCHOR184]
 	mov	x0, x28
 	bl	ftl_memset
 	mov	w0, 18766
@@ -11309,7 +11263,7 @@ FtlWriteToIDB:
 	stp	w0, w1, [x28]
 	mov	w0, 4
 	strb	w0, [x28, 17]
-	add	x0, x21, :lo12:.LANCHOR0
+	add	x0, x22, :lo12:.LANCHOR0
 	strb	wzr, [x28, 16]
 	strb	wzr, [x28, 20]
 	strh	wzr, [x28, 22]
@@ -11321,73 +11275,73 @@ FtlWriteToIDB:
 	add	x0, x28, 12
 	bl	js_hash
 	str	w0, [x28, 8]
+	ldr	w3, [x29, 152]
 .L1534:
-	ldr	w0, [x29, 156]
-	mov	x6, x23
-	mul	w0, w0, w27
-	mov	x27, 0
-	str	w0, [x29, 140]
-	add	w0, w25, 1
-	str	w0, [x29, 132]
+	mul	w0, w21, w3
+	mov	x6, x26
+	str	w0, [x29, 152]
+	mov	x5, 0
+	add	x0, x22, :lo12:.LANCHOR0
+	str	x0, [x29, 128]
 .L1535:
-	ldr	w0, [x29, 140]
-	mov	w1, w27
-	cmp	w27, w0
+	ldr	w0, [x29, 152]
+	mov	w1, w5
+	cmp	w5, w0
 	bcs	.L1542
-	cmp	w26, 9
+	cmp	w25, 9
 	bne	.L1536
-	ldr	w0, [x29, 132]
-	add	w0, w0, w1
-.L1589:
+	add	w0, w1, 1
+.L1586:
 	str	w0, [x29, 160]
 	mov	w0, 61424
 	str	w0, [x29, 164]
 	cmp	w1, 0
-	ccmp	w26, 9, 0, eq
+	ccmp	w25, 9, 0, eq
 	bne	.L1538
 	ldr	x1, [x20, 32]
 	mov	w0, 70
-	str	x6, [x29, 104]
+	stp	x6, x5, [x29, 96]
 	blr	x1
-	ldr	x7, [x20, 16]
+	ldr	w1, [x29, 144]
 	add	x3, x29, 160
+	ldr	x7, [x20, 16]
 	mov	x2, x28
-	mov	w1, w25
 	mov	w0, 0
 	blr	x7
 	mov	w1, w0
-	add	x0, x21, :lo12:.LANCHOR0
+	ldr	x0, [x29, 128]
 	ldr	x2, [x20, 32]
-	str	w1, [x29, 112]
+	str	w1, [x29, 120]
 	ldrb	w0, [x0, 22]
 	blr	x2
-	ldr	w1, [x29, 112]
-	ldr	x6, [x29, 104]
+	ldr	w1, [x29, 120]
+	ldp	x6, x5, [x29, 96]
 	cmn	w1, #1
 	bne	.L1539
 .L1542:
-	ldr	x0, [x29, 144]
-	ldr	x26, [x0, #:lo12:.LANCHOR184]
-	add	x0, x21, :lo12:.LANCHOR0
-	ldrb	w28, [x0, 14]
+	add	x0, x22, :lo12:.LANCHOR0
+	ldr	x25, [x23, #:lo12:.LANCHOR183]
+	ldrb	w1, [x0, 14]
 	ldrh	w0, [x0, 10]
-	mul	w1, w0, w22
-	str	w1, [x29, 140]
+	str	w1, [x29, 128]
+	mul	w1, w24, w0
+	str	w1, [x29, 144]
 	ldr	x1, [x20, 32]
 	cbnz	x1, .L1540
-	mov	w25, 6
-.L1541:
-	ldr	w1, [x29, 156]
-	mov	x27, 0
-	mul	w0, w1, w0
-	str	w0, [x29, 132]
+	mov	w1, 6
+.L1587:
+	mul	w0, w21, w0
+	mov	x28, 0
+	str	w0, [x29, 120]
+	str	w1, [x29, 152]
 .L1544:
-	ldr	w0, [x29, 132]
-	mov	w1, w27
-	cmp	w27, w0
-	bcs	.L1548
-	cmp	w27, 0
-	ccmp	w25, 9, 0, eq
+	ldr	w0, [x29, 120]
+	mov	w1, w28
+	cmp	w0, w28
+	bls	.L1548
+	ldr	w0, [x29, 152]
+	cmp	w28, 0
+	ccmp	w0, 9, 0, eq
 	bne	.L1545
 	ldr	x1, [x20, 32]
 	mov	w0, 70
@@ -11397,76 +11351,77 @@ FtlWriteToIDB:
 	blr	x1
 	ldr	x6, [x20, 24]
 	add	x3, x29, 160
-	ldr	w1, [x29, 140]
-	mov	x2, x26
+	ldr	w1, [x29, 144]
+	mov	x2, x25
 	mov	w0, 0
 	blr	x6
+	ldrb	w0, [x29, 128]
 	ldr	x1, [x20, 40]
-	mov	w0, w28
 	blr	x1
-	add	x0, x21, :lo12:.LANCHOR0
+	add	x0, x22, :lo12:.LANCHOR0
 	ldr	x1, [x20, 32]
 	ldrb	w0, [x0, 22]
 	blr	x1
-	ldr	w0, [x26]
+	ldr	w0, [x25]
 	mov	w1, 18766
 	movk	w1, 0x464e, lsl 16
 	cmp	w0, w1
 	beq	.L1546
 .L1548:
-	ldr	x0, [x29, 144]
-	mov	x2, x23
+	ldr	x0, [x23, #:lo12:.LANCHOR183]
+	mov	x2, x26
 	mov	x1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR184]
 .L1547:
 	ldr	w3, [x29, 136]
-	mov	w26, w1
+	mov	w28, w1
 	cmp	w1, w3
 	bcc	.L1551
-	ldr	w0, [x29, 152]
+	ldr	w0, [x29, 156]
 	add	w0, w0, 1
-	str	w0, [x29, 152]
+	str	w0, [x29, 156]
 	cmp	w0, 5
 	bls	.L1550
 	b	.L1554
 .L1561:
-	mov	w26, 6
+	mov	w25, 6
 	b	.L1532
 .L1563:
 	mov	x28, 0
 	b	.L1534
 .L1536:
-	add	w0, w1, w25
-	lsl	w0, w0, 2
-	b	.L1589
+	lsl	w0, w1, 2
+	b	.L1586
 .L1538:
 	ldr	x7, [x20, 16]
 	add	x3, x29, 160
+	ldr	w0, [x29, 144]
 	mov	x2, x6
-	add	w1, w1, w25
+	str	x5, [x29, 104]
+	add	w1, w1, w0
+	str	x6, [x29, 120]
 	mov	w0, 0
-	str	x6, [x29, 112]
 	blr	x7
 	cmn	w0, #1
 	beq	.L1542
-	ldr	x6, [x29, 112]
+	ldr	x6, [x29, 120]
+	ldr	x5, [x29, 104]
 	add	x6, x6, 2048
 .L1539:
-	add	x27, x27, 1
+	add	x5, x5, 1
 	b	.L1535
 .L1540:
 	ldr	x1, [x20, 40]
-	mov	w25, 6
+	mov	w2, 6
 	cmp	x1, 0
 	mov	w1, 9
-	csel	w25, w25, w1, eq
-	b	.L1541
+	csel	w1, w2, w1, eq
+	b	.L1587
 .L1545:
 	ldr	x6, [x20, 24]
 	add	x3, x29, 160
-	ldr	w0, [x29, 140]
-	mov	x2, x26
-	add	w1, w1, w0
+	ldr	w0, [x29, 144]
+	mov	x2, x25
+	add	w1, w0, w1
 	mov	w0, 0
 	blr	x6
 	cmn	w0, #1
@@ -11475,14 +11430,14 @@ FtlWriteToIDB:
 	mov	w1, 61424
 	cmp	w0, w1
 	bne	.L1548
-	add	x26, x26, 2048
+	add	x25, x25, 2048
 .L1546:
-	add	x27, x27, 1
+	add	x28, x28, 1
 	b	.L1544
 .L1551:
 	mov	x25, x2
 	ldr	w4, [x0, x1, lsl 2]
-	lsl	x27, x1, 2
+	lsl	x5, x1, 2
 	add	x2, x2, 4
 	add	x1, x1, 1
 	ldr	w3, [x25]
@@ -11490,111 +11445,81 @@ FtlWriteToIDB:
 	beq	.L1547
 	mov	x2, 512
 	mov	w1, 0
+	str	x5, [x29, 144]
 	bl	memset
-	ldr	x0, [x29, 144]
-	mov	w1, w22
+	ldr	x0, [x23, #:lo12:.LANCHOR183]
+	mov	w1, w24
+	ldr	x5, [x29, 144]
+	mov	w4, w28
 	ldr	w3, [x25]
-	mov	w4, w26
-	ldr	x0, [x0, #:lo12:.LANCHOR184]
-	ldr	w2, [x0, x27]
-	adrp	x0, .LC50
-	add	x0, x0, :lo12:.LC50
+	ldr	w2, [x0, x5]
+	adrp	x0, .LC51
+	add	x0, x0, :lo12:.LC51
 	bl	printf
-	add	x0, x21, :lo12:.LANCHOR0
+	add	x0, x22, :lo12:.LANCHOR0
 	ldr	x2, [x20, 8]
 	ldrh	w1, [x0, 10]
 	mov	w0, 0
-	mul	w1, w1, w22
+	mul	w1, w1, w24
 	blr	x2
 .L1550:
-	ldr	w0, [x29, 156]
-	add	w22, w22, w0
-	cmp	w22, 7
-	bls	.L1553
-	ldr	w0, [x29, 152]
-	cbnz	w0, .L1554
-.L1527:
-	mov	w19, -1
-.L1554:
-	ldr	x0, [x29, 120]
-	str	wzr, [x24, #:lo12:.LANCHOR182]
-	ldr	x0, [x0, #:lo12:.LANCHOR183]
-	bl	free
-	adrp	x0, .LANCHOR184
-	ldr	x0, [x0, #:lo12:.LANCHOR184]
-	bl	free
-.L1522:
-	mov	w0, w19
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 224
-	ret
-.L1524:
-	mov	w21, w1
-	mov	x22, x2
+	ldr	w24, [x29, 140]
+	b	.L1531
+.L1523:
+	mov	w20, w1
+	mov	x21, x2
 	cmp	w0, 64
 	bne	.L1555
-	adrp	x20, .LANCHOR183
+	adrp	x24, .LANCHOR182
 	mov	w0, 262144
 	bl	ftl_malloc
-	str	x0, [x20, #:lo12:.LANCHOR183]
+	str	x0, [x24, #:lo12:.LANCHOR182]
 	mov	w0, 262144
 	bl	ftl_malloc
 	mov	x1, x0
-	adrp	x0, .LANCHOR184
-	str	x1, [x0, #:lo12:.LANCHOR184]
-	ldr	x0, [x20, #:lo12:.LANCHOR183]
+	adrp	x0, .LANCHOR183
+	str	x1, [x0, #:lo12:.LANCHOR183]
+	ldr	x0, [x24, #:lo12:.LANCHOR182]
 	cbz	x0, .L1556
 	cbz	x1, .L1556
 	mov	w1, 1
 	mov	w2, 262144
-	str	w1, [x24, #:lo12:.LANCHOR182]
+	str	w1, [x27, #:lo12:.LANCHOR181]
 	mov	w1, 0
 	bl	ftl_memset
 .L1555:
-	ldr	w0, [x24, #:lo12:.LANCHOR182]
-	cbz	w0, .L1590
-	adrp	x0, .LANCHOR183
+	ldr	w0, [x27, #:lo12:.LANCHOR181]
+	cbz	w0, .L1588
+	adrp	x0, .LANCHOR182
 	cmp	w19, 63
-	ldr	x1, [x0, #:lo12:.LANCHOR183]
+	ldr	x0, [x0, #:lo12:.LANCHOR182]
 	bhi	.L1558
-	mov	w0, 64
-	sub	w19, w0, w19
-	sub	w21, w21, w19
+	mov	w1, 64
+	sub	w19, w1, w19
+	sub	w20, w20, w19
 	ubfiz	x19, x19, 9, 25
-	add	x22, x22, x19
-	mov	x20, x1
+	add	x1, x21, x19
 .L1559:
-	cmp	w25, 575
+	cmp	w23, 575
 	bls	.L1560
-	sub	w21, w21, w23
-	sub	w21, w21, #446
+	sub	w20, w20, w22
+	sub	w20, w20, #446
 .L1560:
-	mov	w4, w21
-	mov	x3, x20
-	mov	w2, 262144
-	adrp	x0, .LC52
-	add	x0, x0, :lo12:.LC52
-	bl	printf
-	lsl	w2, w21, 9
-	mov	x1, x22
-	mov	x0, x20
+	lsl	w2, w20, 9
 	bl	ftl_memcpy
-	b	.L1590
+	b	.L1588
 .L1556:
-	adrp	x1, .LANCHOR185
-	adrp	x0, .LC51
-	add	x1, x1, :lo12:.LANCHOR185
-	add	x0, x0, :lo12:.LC51
+	adrp	x1, .LANCHOR184
+	adrp	x0, .LC52
+	add	x1, x1, :lo12:.LANCHOR184
+	add	x0, x0, :lo12:.LC52
 	bl	printf
 	b	.L1555
 .L1558:
-	lsl	w20, w19, 7
-	sub	w20, w20, #8192
-	add	x20, x1, x20, lsl 2
+	lsl	w2, w19, 7
+	mov	x1, x21
+	sub	w2, w2, #8192
+	add	x0, x0, x2, lsl 2
 	b	.L1559
 	.size	FtlWriteToIDB, .-FtlWriteToIDB
 	.section	.text.sftl_write,"ax",@progbits
@@ -11611,26 +11536,26 @@ sftl_write:
 	add	w21, w19, w21
 	mov	x20, x2
 	bl	FtlWriteToIDB
-.L1592:
+.L1590:
 	sub	w1, w21, w19
 	mov	x3, x20
 	cmp	w19, 256
-	bhi	.L1594
+	bhi	.L1592
 	mov	w2, w19
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x29, x30, [sp], 48
 	b	FtlWrite
-.L1594:
+.L1592:
 	mov	w2, 256
 	mov	w0, 0
 	bl	FtlWrite
-	cbnz	w0, .L1591
+	cbnz	w0, .L1589
 	add	x20, x20, 131072
 	sub	w19, w19, #256
-	b	.L1592
-.L1591:
+	b	.L1590
+.L1589:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -11716,7 +11641,6 @@ sftl_write:
 	.global	p_map_block_ver_table
 	.global	p_map_block_valid_page_count
 	.global	p_map_block_table
-	.global	p_blk_mode_table
 	.global	p_valid_page_count_check_table
 	.global	p_valid_page_count_table
 	.global	g_totle_swl_count
@@ -11788,245 +11712,245 @@ sftl_write:
 	.global	c_ftl_nand_type
 	.section	.bss.DeviceCapacity,"aw",@nobits
 	.align	2
-	.set	.LANCHOR26,. + 0
+	.set	.LANCHOR25,. + 0
 	.type	DeviceCapacity, %object
 	.size	DeviceCapacity, 4
 DeviceCapacity:
 	.zero	4
 	.section	.bss.FtlUpdateVaildLpnCount,"aw",@nobits
 	.align	1
-	.set	.LANCHOR58,. + 0
+	.set	.LANCHOR57,. + 0
 	.type	FtlUpdateVaildLpnCount, %object
 	.size	FtlUpdateVaildLpnCount, 2
 FtlUpdateVaildLpnCount:
 	.zero	2
 	.section	.bss.c_ftl_nand_bbm_buf_size,"aw",@nobits
 	.align	1
-	.set	.LANCHOR127,. + 0
+	.set	.LANCHOR126,. + 0
 	.type	c_ftl_nand_bbm_buf_size, %object
 	.size	c_ftl_nand_bbm_buf_size, 2
 c_ftl_nand_bbm_buf_size:
 	.zero	2
 	.section	.bss.c_ftl_nand_blk_pre_plane,"aw",@nobits
 	.align	1
-	.set	.LANCHOR6,. + 0
+	.set	.LANCHOR5,. + 0
 	.type	c_ftl_nand_blk_pre_plane, %object
 	.size	c_ftl_nand_blk_pre_plane, 2
 c_ftl_nand_blk_pre_plane:
 	.zero	2
 	.section	.bss.c_ftl_nand_blks_per_die,"aw",@nobits
 	.align	1
-	.set	.LANCHOR17,. + 0
+	.set	.LANCHOR16,. + 0
 	.type	c_ftl_nand_blks_per_die, %object
 	.size	c_ftl_nand_blks_per_die, 2
 c_ftl_nand_blks_per_die:
 	.zero	2
 	.section	.bss.c_ftl_nand_blks_per_die_shift,"aw",@nobits
 	.align	1
-	.set	.LANCHOR18,. + 0
+	.set	.LANCHOR17,. + 0
 	.type	c_ftl_nand_blks_per_die_shift, %object
 	.size	c_ftl_nand_blks_per_die_shift, 2
 c_ftl_nand_blks_per_die_shift:
 	.zero	2
 	.section	.bss.c_ftl_nand_byte_pre_oob,"aw",@nobits
 	.align	1
-	.set	.LANCHOR24,. + 0
+	.set	.LANCHOR23,. + 0
 	.type	c_ftl_nand_byte_pre_oob, %object
 	.size	c_ftl_nand_byte_pre_oob, 2
 c_ftl_nand_byte_pre_oob:
 	.zero	2
 	.section	.bss.c_ftl_nand_byte_pre_page,"aw",@nobits
 	.align	1
-	.set	.LANCHOR23,. + 0
+	.set	.LANCHOR22,. + 0
 	.type	c_ftl_nand_byte_pre_page, %object
 	.size	c_ftl_nand_byte_pre_page, 2
 c_ftl_nand_byte_pre_page:
 	.zero	2
 	.section	.bss.c_ftl_nand_data_blks_per_plane,"aw",@nobits
 	.align	1
-	.set	.LANCHOR5,. + 0
+	.set	.LANCHOR4,. + 0
 	.type	c_ftl_nand_data_blks_per_plane, %object
 	.size	c_ftl_nand_data_blks_per_plane, 2
 c_ftl_nand_data_blks_per_plane:
 	.zero	2
 	.section	.bss.c_ftl_nand_data_op_blks_per_plane,"aw",@nobits
 	.align	1
-	.set	.LANCHOR171,. + 0
+	.set	.LANCHOR170,. + 0
 	.type	c_ftl_nand_data_op_blks_per_plane, %object
 	.size	c_ftl_nand_data_op_blks_per_plane, 2
 c_ftl_nand_data_op_blks_per_plane:
 	.zero	2
 	.section	.bss.c_ftl_nand_die_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR10,. + 0
+	.set	.LANCHOR9,. + 0
 	.type	c_ftl_nand_die_num, %object
 	.size	c_ftl_nand_die_num, 2
 c_ftl_nand_die_num:
 	.zero	2
 	.section	.bss.c_ftl_nand_ext_blk_pre_plane,"aw",@nobits
 	.align	1
-	.set	.LANCHOR15,. + 0
+	.set	.LANCHOR14,. + 0
 	.type	c_ftl_nand_ext_blk_pre_plane, %object
 	.size	c_ftl_nand_ext_blk_pre_plane, 2
 c_ftl_nand_ext_blk_pre_plane:
 	.zero	2
 	.section	.bss.c_ftl_nand_init_sys_blks_per_plane,"aw",@nobits
 	.align	2
-	.set	.LANCHOR31,. + 0
+	.set	.LANCHOR30,. + 0
 	.type	c_ftl_nand_init_sys_blks_per_plane, %object
 	.size	c_ftl_nand_init_sys_blks_per_plane, 4
 c_ftl_nand_init_sys_blks_per_plane:
 	.zero	4
 	.section	.bss.c_ftl_nand_l2pmap_ram_region_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR33,. + 0
+	.set	.LANCHOR32,. + 0
 	.type	c_ftl_nand_l2pmap_ram_region_num, %object
 	.size	c_ftl_nand_l2pmap_ram_region_num, 2
 c_ftl_nand_l2pmap_ram_region_num:
 	.zero	2
 	.section	.bss.c_ftl_nand_map_blks_per_plane,"aw",@nobits
 	.align	1
-	.set	.LANCHOR29,. + 0
+	.set	.LANCHOR28,. + 0
 	.type	c_ftl_nand_map_blks_per_plane, %object
 	.size	c_ftl_nand_map_blks_per_plane, 2
 c_ftl_nand_map_blks_per_plane:
 	.zero	2
 	.section	.bss.c_ftl_nand_map_region_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR32,. + 0
+	.set	.LANCHOR31,. + 0
 	.type	c_ftl_nand_map_region_num, %object
 	.size	c_ftl_nand_map_region_num, 2
 c_ftl_nand_map_region_num:
 	.zero	2
 	.section	.bss.c_ftl_nand_max_data_blks,"aw",@nobits
 	.align	2
-	.set	.LANCHOR7,. + 0
+	.set	.LANCHOR6,. + 0
 	.type	c_ftl_nand_max_data_blks, %object
 	.size	c_ftl_nand_max_data_blks, 4
 c_ftl_nand_max_data_blks:
 	.zero	4
 	.section	.bss.c_ftl_nand_max_map_blks,"aw",@nobits
 	.align	2
-	.set	.LANCHOR30,. + 0
+	.set	.LANCHOR29,. + 0
 	.type	c_ftl_nand_max_map_blks, %object
 	.size	c_ftl_nand_max_map_blks, 4
 c_ftl_nand_max_map_blks:
 	.zero	4
 	.section	.bss.c_ftl_nand_max_sys_blks,"aw",@nobits
 	.align	2
-	.set	.LANCHOR4,. + 0
+	.set	.LANCHOR3,. + 0
 	.type	c_ftl_nand_max_sys_blks, %object
 	.size	c_ftl_nand_max_sys_blks, 4
 c_ftl_nand_max_sys_blks:
 	.zero	4
 	.section	.bss.c_ftl_nand_max_vendor_blks,"aw",@nobits
 	.align	1
-	.set	.LANCHOR27,. + 0
+	.set	.LANCHOR26,. + 0
 	.type	c_ftl_nand_max_vendor_blks, %object
 	.size	c_ftl_nand_max_vendor_blks, 2
 c_ftl_nand_max_vendor_blks:
 	.zero	2
 	.section	.bss.c_ftl_nand_page_pre_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR19,. + 0
+	.set	.LANCHOR18,. + 0
 	.type	c_ftl_nand_page_pre_blk, %object
 	.size	c_ftl_nand_page_pre_blk, 2
 c_ftl_nand_page_pre_blk:
 	.zero	2
 	.section	.bss.c_ftl_nand_page_pre_slc_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR20,. + 0
+	.set	.LANCHOR19,. + 0
 	.type	c_ftl_nand_page_pre_slc_blk, %object
 	.size	c_ftl_nand_page_pre_slc_blk, 2
 c_ftl_nand_page_pre_slc_blk:
 	.zero	2
 	.section	.bss.c_ftl_nand_page_pre_super_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR21,. + 0
+	.set	.LANCHOR20,. + 0
 	.type	c_ftl_nand_page_pre_super_blk, %object
 	.size	c_ftl_nand_page_pre_super_blk, 2
 c_ftl_nand_page_pre_super_blk:
 	.zero	2
 	.section	.bss.c_ftl_nand_planes_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR3,. + 0
+	.set	.LANCHOR2,. + 0
 	.type	c_ftl_nand_planes_num, %object
 	.size	c_ftl_nand_planes_num, 2
 c_ftl_nand_planes_num:
 	.zero	2
 	.section	.bss.c_ftl_nand_planes_per_die,"aw",@nobits
 	.align	1
-	.set	.LANCHOR11,. + 0
+	.set	.LANCHOR10,. + 0
 	.type	c_ftl_nand_planes_per_die, %object
 	.size	c_ftl_nand_planes_per_die, 2
 c_ftl_nand_planes_per_die:
 	.zero	2
 	.section	.bss.c_ftl_nand_reserved_blks,"aw",@nobits
 	.align	1
-	.set	.LANCHOR25,. + 0
+	.set	.LANCHOR24,. + 0
 	.type	c_ftl_nand_reserved_blks, %object
 	.size	c_ftl_nand_reserved_blks, 2
 c_ftl_nand_reserved_blks:
 	.zero	2
 	.section	.bss.c_ftl_nand_sec_pre_page,"aw",@nobits
 	.align	1
-	.set	.LANCHOR12,. + 0
+	.set	.LANCHOR11,. + 0
 	.type	c_ftl_nand_sec_pre_page, %object
 	.size	c_ftl_nand_sec_pre_page, 2
 c_ftl_nand_sec_pre_page:
 	.zero	2
 	.section	.bss.c_ftl_nand_sec_pre_page_shift,"aw",@nobits
 	.align	1
-	.set	.LANCHOR22,. + 0
+	.set	.LANCHOR21,. + 0
 	.type	c_ftl_nand_sec_pre_page_shift, %object
 	.size	c_ftl_nand_sec_pre_page_shift, 2
 c_ftl_nand_sec_pre_page_shift:
 	.zero	2
 	.section	.bss.c_ftl_nand_sys_blks_per_plane,"aw",@nobits
 	.align	2
-	.set	.LANCHOR2,. + 0
+	.set	.LANCHOR1,. + 0
 	.type	c_ftl_nand_sys_blks_per_plane, %object
 	.size	c_ftl_nand_sys_blks_per_plane, 4
 c_ftl_nand_sys_blks_per_plane:
 	.zero	4
 	.section	.bss.c_ftl_nand_totle_phy_blks,"aw",@nobits
 	.align	2
-	.set	.LANCHOR8,. + 0
+	.set	.LANCHOR7,. + 0
 	.type	c_ftl_nand_totle_phy_blks, %object
 	.size	c_ftl_nand_totle_phy_blks, 4
 c_ftl_nand_totle_phy_blks:
 	.zero	4
 	.section	.bss.c_ftl_nand_type,"aw",@nobits
 	.align	1
-	.set	.LANCHOR9,. + 0
+	.set	.LANCHOR8,. + 0
 	.type	c_ftl_nand_type, %object
 	.size	c_ftl_nand_type, 2
 c_ftl_nand_type:
 	.zero	2
 	.section	.bss.c_ftl_nand_vendor_region_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR28,. + 0
+	.set	.LANCHOR27,. + 0
 	.type	c_ftl_nand_vendor_region_num, %object
 	.size	c_ftl_nand_vendor_region_num, 2
 c_ftl_nand_vendor_region_num:
 	.zero	2
 	.section	.bss.c_ftl_vendor_part_size,"aw",@nobits
 	.align	1
-	.set	.LANCHOR16,. + 0
+	.set	.LANCHOR15,. + 0
 	.type	c_ftl_vendor_part_size, %object
 	.size	c_ftl_vendor_part_size, 2
 c_ftl_vendor_part_size:
 	.zero	2
 	.section	.bss.c_gc_page_buf_num,"aw",@nobits
 	.align	2
-	.set	.LANCHOR67,. + 0
+	.set	.LANCHOR66,. + 0
 	.type	c_gc_page_buf_num, %object
 	.size	c_gc_page_buf_num, 4
 c_gc_page_buf_num:
 	.zero	4
 	.section	.bss.c_mlc_erase_count_value,"aw",@nobits
 	.align	1
-	.set	.LANCHOR14,. + 0
+	.set	.LANCHOR13,. + 0
 	.type	c_mlc_erase_count_value, %object
 	.size	c_mlc_erase_count_value, 2
 c_mlc_erase_count_value:
@@ -12039,294 +11963,294 @@ check_vpc_table:
 	.zero	16384
 	.section	.bss.ftl_gc_temp_power_lost_recovery_flag,"aw",@nobits
 	.align	2
-	.set	.LANCHOR133,. + 0
+	.set	.LANCHOR132,. + 0
 	.type	ftl_gc_temp_power_lost_recovery_flag, %object
 	.size	ftl_gc_temp_power_lost_recovery_flag, 4
 ftl_gc_temp_power_lost_recovery_flag:
 	.zero	4
 	.section	.bss.gBbtInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR37,. + 0
+	.set	.LANCHOR36,. + 0
 	.type	gBbtInfo, %object
 	.size	gBbtInfo, 96
 gBbtInfo:
 	.zero	96
 	.section	.bss.gL2pMapInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR129,. + 0
+	.set	.LANCHOR128,. + 0
 	.type	gL2pMapInfo, %object
 	.size	gL2pMapInfo, 64
 gL2pMapInfo:
 	.zero	64
 	.section	.bss.gSysFreeQueue,"aw",@nobits
 	.align	3
-	.set	.LANCHOR38,. + 0
+	.set	.LANCHOR37,. + 0
 	.type	gSysFreeQueue, %object
 	.size	gSysFreeQueue, 2056
 gSysFreeQueue:
 	.zero	2056
 	.section	.bss.gSysInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR139,. + 0
+	.set	.LANCHOR138,. + 0
 	.type	gSysInfo, %object
 	.size	gSysInfo, 16
 gSysInfo:
 	.zero	16
 	.section	.bss.gVendorBlkInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR161,. + 0
+	.set	.LANCHOR160,. + 0
 	.type	gVendorBlkInfo, %object
 	.size	gVendorBlkInfo, 64
 gVendorBlkInfo:
 	.zero	64
 	.section	.bss.g_GlobalDataVersion,"aw",@nobits
 	.align	2
-	.set	.LANCHOR83,. + 0
+	.set	.LANCHOR82,. + 0
 	.type	g_GlobalDataVersion, %object
 	.size	g_GlobalDataVersion, 4
 g_GlobalDataVersion:
 	.zero	4
 	.section	.bss.g_GlobalSysVersion,"aw",@nobits
 	.align	2
-	.set	.LANCHOR82,. + 0
+	.set	.LANCHOR81,. + 0
 	.type	g_GlobalSysVersion, %object
 	.size	g_GlobalSysVersion, 4
 g_GlobalSysVersion:
 	.zero	4
 	.section	.bss.g_MaxLbaSector,"aw",@nobits
 	.align	2
-	.set	.LANCHOR34,. + 0
+	.set	.LANCHOR33,. + 0
 	.type	g_MaxLbaSector, %object
 	.size	g_MaxLbaSector, 4
 g_MaxLbaSector:
 	.zero	4
 	.section	.bss.g_MaxLbn,"aw",@nobits
 	.align	2
-	.set	.LANCHOR179,. + 0
+	.set	.LANCHOR178,. + 0
 	.type	g_MaxLbn, %object
 	.size	g_MaxLbn, 4
 g_MaxLbn:
 	.zero	4
 	.section	.bss.g_MaxLpn,"aw",@nobits
 	.align	2
-	.set	.LANCHOR152,. + 0
+	.set	.LANCHOR151,. + 0
 	.type	g_MaxLpn, %object
 	.size	g_MaxLpn, 4
 g_MaxLpn:
 	.zero	4
 	.section	.bss.g_VaildLpn,"aw",@nobits
 	.align	2
-	.set	.LANCHOR59,. + 0
+	.set	.LANCHOR58,. + 0
 	.type	g_VaildLpn, %object
 	.size	g_VaildLpn, 4
 g_VaildLpn:
 	.zero	4
 	.section	.bss.g_active_superblock,"aw",@nobits
 	.align	3
-	.set	.LANCHOR51,. + 0
+	.set	.LANCHOR50,. + 0
 	.type	g_active_superblock, %object
 	.size	g_active_superblock, 48
 g_active_superblock:
 	.zero	48
 	.section	.bss.g_buffer_superblock,"aw",@nobits
 	.align	3
-	.set	.LANCHOR52,. + 0
+	.set	.LANCHOR51,. + 0
 	.type	g_buffer_superblock, %object
 	.size	g_buffer_superblock, 48
 g_buffer_superblock:
 	.zero	48
 	.section	.bss.g_cur_erase_blk,"aw",@nobits
 	.align	2
-	.set	.LANCHOR99,. + 0
+	.set	.LANCHOR98,. + 0
 	.type	g_cur_erase_blk, %object
 	.size	g_cur_erase_blk, 4
 g_cur_erase_blk:
 	.zero	4
 	.section	.bss.g_ect_tbl_info_size,"aw",@nobits
 	.align	1
-	.set	.LANCHOR116,. + 0
+	.set	.LANCHOR115,. + 0
 	.type	g_ect_tbl_info_size, %object
 	.size	g_ect_tbl_info_size, 2
 g_ect_tbl_info_size:
 	.zero	2
 	.section	.bss.g_ect_tbl_power_up_flush,"aw",@nobits
 	.align	1
-	.set	.LANCHOR164,. + 0
+	.set	.LANCHOR163,. + 0
 	.type	g_ect_tbl_power_up_flush, %object
 	.size	g_ect_tbl_power_up_flush, 2
 g_ect_tbl_power_up_flush:
 	.zero	2
 	.section	.bss.g_ftl_nand_free_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR176,. + 0
+	.set	.LANCHOR175,. + 0
 	.type	g_ftl_nand_free_count, %object
 	.size	g_ftl_nand_free_count, 4
 g_ftl_nand_free_count:
 	.zero	4
 	.section	.bss.g_gc_bad_block_gc_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR76,. + 0
+	.set	.LANCHOR75,. + 0
 	.type	g_gc_bad_block_gc_index, %object
 	.size	g_gc_bad_block_gc_index, 2
 g_gc_bad_block_gc_index:
 	.zero	2
 	.section	.bss.g_gc_bad_block_temp_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR74,. + 0
+	.set	.LANCHOR73,. + 0
 	.type	g_gc_bad_block_temp_num, %object
 	.size	g_gc_bad_block_temp_num, 2
 g_gc_bad_block_temp_num:
 	.zero	2
 	.section	.bss.g_gc_bad_block_temp_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR75,. + 0
+	.set	.LANCHOR74,. + 0
 	.type	g_gc_bad_block_temp_tbl, %object
 	.size	g_gc_bad_block_temp_tbl, 34
 g_gc_bad_block_temp_tbl:
 	.zero	34
 	.section	.bss.g_gc_blk_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR102,. + 0
+	.set	.LANCHOR101,. + 0
 	.type	g_gc_blk_index, %object
 	.size	g_gc_blk_index, 2
 g_gc_blk_index:
 	.zero	2
 	.section	.bss.g_gc_blk_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR68,. + 0
+	.set	.LANCHOR67,. + 0
 	.type	g_gc_blk_num, %object
 	.size	g_gc_blk_num, 2
 g_gc_blk_num:
 	.zero	2
 	.section	.bss.g_gc_cur_blk_max_valid_pages,"aw",@nobits
 	.align	1
-	.set	.LANCHOR174,. + 0
+	.set	.LANCHOR173,. + 0
 	.type	g_gc_cur_blk_max_valid_pages, %object
 	.size	g_gc_cur_blk_max_valid_pages, 2
 g_gc_cur_blk_max_valid_pages:
 	.zero	2
 	.section	.bss.g_gc_cur_blk_valid_pages,"aw",@nobits
 	.align	1
-	.set	.LANCHOR173,. + 0
+	.set	.LANCHOR172,. + 0
 	.type	g_gc_cur_blk_valid_pages, %object
 	.size	g_gc_cur_blk_valid_pages, 2
 g_gc_cur_blk_valid_pages:
 	.zero	2
 	.section	.bss.g_gc_free_blk_threshold,"aw",@nobits
 	.align	1
-	.set	.LANCHOR100,. + 0
+	.set	.LANCHOR99,. + 0
 	.type	g_gc_free_blk_threshold, %object
 	.size	g_gc_free_blk_threshold, 2
 g_gc_free_blk_threshold:
 	.zero	2
 	.section	.bss.g_gc_head_data_block,"aw",@nobits
 	.align	2
-	.set	.LANCHOR96,. + 0
+	.set	.LANCHOR95,. + 0
 	.type	g_gc_head_data_block, %object
 	.size	g_gc_head_data_block, 4
 g_gc_head_data_block:
 	.zero	4
 	.section	.bss.g_gc_head_data_block_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR97,. + 0
+	.set	.LANCHOR96,. + 0
 	.type	g_gc_head_data_block_count, %object
 	.size	g_gc_head_data_block_count, 4
 g_gc_head_data_block_count:
 	.zero	4
 	.section	.bss.g_gc_merge_free_blk_threshold,"aw",@nobits
 	.align	1
-	.set	.LANCHOR101,. + 0
+	.set	.LANCHOR100,. + 0
 	.type	g_gc_merge_free_blk_threshold, %object
 	.size	g_gc_merge_free_blk_threshold, 2
 g_gc_merge_free_blk_threshold:
 	.zero	2
 	.section	.bss.g_gc_next_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR72,. + 0
+	.set	.LANCHOR71,. + 0
 	.type	g_gc_next_blk, %object
 	.size	g_gc_next_blk, 2
 g_gc_next_blk:
 	.zero	2
 	.section	.bss.g_gc_next_blk_1,"aw",@nobits
 	.align	1
-	.set	.LANCHOR73,. + 0
+	.set	.LANCHOR72,. + 0
 	.type	g_gc_next_blk_1, %object
 	.size	g_gc_next_blk_1, 2
 g_gc_next_blk_1:
 	.zero	2
 	.section	.bss.g_gc_num_req,"aw",@nobits
 	.align	2
-	.set	.LANCHOR62,. + 0
+	.set	.LANCHOR61,. + 0
 	.type	g_gc_num_req, %object
 	.size	g_gc_num_req, 4
 g_gc_num_req:
 	.zero	4
 	.section	.bss.g_gc_page_offset,"aw",@nobits
 	.align	1
-	.set	.LANCHOR70,. + 0
+	.set	.LANCHOR69,. + 0
 	.type	g_gc_page_offset, %object
 	.size	g_gc_page_offset, 2
 g_gc_page_offset:
 	.zero	2
 	.section	.bss.g_gc_skip_write_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR98,. + 0
+	.set	.LANCHOR97,. + 0
 	.type	g_gc_skip_write_count, %object
 	.size	g_gc_skip_write_count, 4
 g_gc_skip_write_count:
 	.zero	4
 	.section	.bss.g_gc_superblock,"aw",@nobits
 	.align	3
-	.set	.LANCHOR145,. + 0
+	.set	.LANCHOR144,. + 0
 	.type	g_gc_superblock, %object
 	.size	g_gc_superblock, 48
 g_gc_superblock:
 	.zero	48
 	.section	.bss.g_gc_temp_superblock,"aw",@nobits
 	.align	3
-	.set	.LANCHOR53,. + 0
+	.set	.LANCHOR52,. + 0
 	.type	g_gc_temp_superblock, %object
 	.size	g_gc_temp_superblock, 48
 g_gc_temp_superblock:
 	.zero	48
 	.section	.bss.g_in_gc_progress,"aw",@nobits
 	.align	2
-	.set	.LANCHOR94,. + 0
+	.set	.LANCHOR93,. + 0
 	.type	g_in_gc_progress, %object
 	.size	g_in_gc_progress, 4
 g_in_gc_progress:
 	.zero	4
 	.section	.bss.g_in_swl_replace,"aw",@nobits
 	.align	2
-	.set	.LANCHOR95,. + 0
+	.set	.LANCHOR94,. + 0
 	.type	g_in_swl_replace, %object
 	.size	g_in_swl_replace, 4
 g_in_swl_replace:
 	.zero	4
 	.section	.bss.g_l2p_last_update_region_id,"aw",@nobits
 	.align	1
-	.set	.LANCHOR56,. + 0
+	.set	.LANCHOR55,. + 0
 	.type	g_l2p_last_update_region_id, %object
 	.size	g_l2p_last_update_region_id, 2
 g_l2p_last_update_region_id:
 	.zero	2
 	.section	.bss.g_max_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR92,. + 0
+	.set	.LANCHOR91,. + 0
 	.type	g_max_erase_count, %object
 	.size	g_max_erase_count, 4
 g_max_erase_count:
 	.zero	4
 	.section	.bss.g_min_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR93,. + 0
+	.set	.LANCHOR92,. + 0
 	.type	g_min_erase_count, %object
 	.size	g_min_erase_count, 4
 g_min_erase_count:
 	.zero	4
 	.section	.bss.g_nand_ops,"aw",@nobits
 	.align	3
-	.set	.LANCHOR78,. + 0
+	.set	.LANCHOR77,. + 0
 	.type	g_nand_ops, %object
 	.size	g_nand_ops, 48
 g_nand_ops:
@@ -12340,203 +12264,203 @@ g_nand_phy_info:
 	.zero	24
 	.section	.bss.g_num_data_superblocks,"aw",@nobits
 	.align	1
-	.set	.LANCHOR44,. + 0
+	.set	.LANCHOR43,. + 0
 	.type	g_num_data_superblocks, %object
 	.size	g_num_data_superblocks, 2
 g_num_data_superblocks:
 	.zero	2
 	.section	.bss.g_num_free_superblocks,"aw",@nobits
 	.align	1
-	.set	.LANCHOR48,. + 0
+	.set	.LANCHOR47,. + 0
 	.type	g_num_free_superblocks, %object
 	.size	g_num_free_superblocks, 2
 g_num_free_superblocks:
 	.zero	2
 	.section	.bss.g_power_lost_recovery_flag,"aw",@nobits
 	.align	1
-	.set	.LANCHOR156,. + 0
+	.set	.LANCHOR155,. + 0
 	.type	g_power_lost_recovery_flag, %object
 	.size	g_power_lost_recovery_flag, 2
 g_power_lost_recovery_flag:
 	.zero	2
 	.section	.bss.g_recovery_page_min_ver,"aw",@nobits
 	.align	2
-	.set	.LANCHOR134,. + 0
+	.set	.LANCHOR133,. + 0
 	.type	g_recovery_page_min_ver, %object
 	.size	g_recovery_page_min_ver, 4
 g_recovery_page_min_ver:
 	.zero	4
 	.section	.bss.g_recovery_page_num,"aw",@nobits
 	.align	2
-	.set	.LANCHOR157,. + 0
+	.set	.LANCHOR156,. + 0
 	.type	g_recovery_page_num, %object
 	.size	g_recovery_page_num, 4
 g_recovery_page_num:
 	.zero	4
 	.section	.bss.g_recovery_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR158,. + 0
+	.set	.LANCHOR157,. + 0
 	.type	g_recovery_ppa_tbl, %object
 	.size	g_recovery_ppa_tbl, 128
 g_recovery_ppa_tbl:
 	.zero	128
 	.section	.bss.g_sys_ext_data,"aw",@nobits
 	.align	3
-	.set	.LANCHOR135,. + 0
+	.set	.LANCHOR134,. + 0
 	.type	g_sys_ext_data, %object
 	.size	g_sys_ext_data, 512
 g_sys_ext_data:
 	.zero	512
 	.section	.bss.g_sys_save_data,"aw",@nobits
 	.align	3
-	.set	.LANCHOR39,. + 0
+	.set	.LANCHOR38,. + 0
 	.type	g_sys_save_data, %object
 	.size	g_sys_save_data, 48
 g_sys_save_data:
 	.zero	48
 	.section	.bss.g_tmp_data_superblock_id,"aw",@nobits
 	.align	1
-	.set	.LANCHOR131,. + 0
+	.set	.LANCHOR130,. + 0
 	.type	g_tmp_data_superblock_id, %object
 	.size	g_tmp_data_superblock_id, 2
 g_tmp_data_superblock_id:
 	.zero	2
 	.section	.bss.g_totle_avg_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR143,. + 0
+	.set	.LANCHOR142,. + 0
 	.type	g_totle_avg_erase_count, %object
 	.size	g_totle_avg_erase_count, 4
 g_totle_avg_erase_count:
 	.zero	4
 	.section	.bss.g_totle_cache_write_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR87,. + 0
+	.set	.LANCHOR86,. + 0
 	.type	g_totle_cache_write_count, %object
 	.size	g_totle_cache_write_count, 4
 g_totle_cache_write_count:
 	.zero	4
 	.section	.bss.g_totle_discard_page_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR86,. + 0
+	.set	.LANCHOR85,. + 0
 	.type	g_totle_discard_page_count, %object
 	.size	g_totle_discard_page_count, 4
 g_totle_discard_page_count:
 	.zero	4
 	.section	.bss.g_totle_gc_page_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR84,. + 0
+	.set	.LANCHOR83,. + 0
 	.type	g_totle_gc_page_count, %object
 	.size	g_totle_gc_page_count, 4
 g_totle_gc_page_count:
 	.zero	4
 	.section	.bss.g_totle_l2p_write_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR88,. + 0
+	.set	.LANCHOR87,. + 0
 	.type	g_totle_l2p_write_count, %object
 	.size	g_totle_l2p_write_count, 4
 g_totle_l2p_write_count:
 	.zero	4
 	.section	.bss.g_totle_map_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR130,. + 0
+	.set	.LANCHOR129,. + 0
 	.type	g_totle_map_block, %object
 	.size	g_totle_map_block, 2
 g_totle_map_block:
 	.zero	2
 	.section	.bss.g_totle_mlc_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR90,. + 0
+	.set	.LANCHOR89,. + 0
 	.type	g_totle_mlc_erase_count, %object
 	.size	g_totle_mlc_erase_count, 4
 g_totle_mlc_erase_count:
 	.zero	4
 	.section	.bss.g_totle_read_page_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR89,. + 0
+	.set	.LANCHOR88,. + 0
 	.type	g_totle_read_page_count, %object
 	.size	g_totle_read_page_count, 4
 g_totle_read_page_count:
 	.zero	4
 	.section	.bss.g_totle_read_sector,"aw",@nobits
 	.align	2
-	.set	.LANCHOR163,. + 0
+	.set	.LANCHOR162,. + 0
 	.type	g_totle_read_sector, %object
 	.size	g_totle_read_sector, 4
 g_totle_read_sector:
 	.zero	4
 	.section	.bss.g_totle_slc_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR91,. + 0
+	.set	.LANCHOR90,. + 0
 	.type	g_totle_slc_erase_count, %object
 	.size	g_totle_slc_erase_count, 4
 g_totle_slc_erase_count:
 	.zero	4
 	.section	.bss.g_totle_swl_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR132,. + 0
+	.set	.LANCHOR131,. + 0
 	.type	g_totle_swl_count, %object
 	.size	g_totle_swl_count, 4
 g_totle_swl_count:
 	.zero	4
 	.section	.bss.g_totle_sys_slc_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR80,. + 0
+	.set	.LANCHOR79,. + 0
 	.type	g_totle_sys_slc_erase_count, %object
 	.size	g_totle_sys_slc_erase_count, 4
 g_totle_sys_slc_erase_count:
 	.zero	4
 	.section	.bss.g_totle_vendor_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR35,. + 0
+	.set	.LANCHOR34,. + 0
 	.type	g_totle_vendor_block, %object
 	.size	g_totle_vendor_block, 2
 g_totle_vendor_block:
 	.zero	2
 	.section	.bss.g_totle_write_page_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR85,. + 0
+	.set	.LANCHOR84,. + 0
 	.type	g_totle_write_page_count, %object
 	.size	g_totle_write_page_count, 4
 g_totle_write_page_count:
 	.zero	4
 	.section	.bss.g_totle_write_sector,"aw",@nobits
 	.align	2
-	.set	.LANCHOR162,. + 0
+	.set	.LANCHOR161,. + 0
 	.type	g_totle_write_sector, %object
 	.size	g_totle_write_sector, 4
 g_totle_write_sector:
 	.zero	4
 	.section	.bss.gc_discard_updated,"aw",@nobits
 	.align	2
-	.set	.LANCHOR167,. + 0
+	.set	.LANCHOR166,. + 0
 	.type	gc_discard_updated, %object
 	.size	gc_discard_updated, 4
 gc_discard_updated:
 	.zero	4
 	.section	.bss.gc_ink_free_return_value,"aw",@nobits
 	.align	1
-	.set	.LANCHOR172,. + 0
+	.set	.LANCHOR171,. + 0
 	.type	gc_ink_free_return_value, %object
 	.size	gc_ink_free_return_value, 2
 gc_ink_free_return_value:
 	.zero	2
 	.section	.bss.gp_ect_tbl_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR118,. + 0
+	.set	.LANCHOR117,. + 0
 	.type	gp_ect_tbl_info, %object
 	.size	gp_ect_tbl_info, 8
 gp_ect_tbl_info:
 	.zero	8
 	.section	.bss.gp_flash_check_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR184,. + 0
+	.set	.LANCHOR183,. + 0
 	.type	gp_flash_check_buf, %object
 	.size	gp_flash_check_buf, 8
 gp_flash_check_buf:
 	.zero	8
 	.section	.bss.gp_gc_page_buf_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR63,. + 0
+	.set	.LANCHOR62,. + 0
 	.type	gp_gc_page_buf_info, %object
 	.size	gp_gc_page_buf_info, 8
 gp_gc_page_buf_info:
@@ -12549,189 +12473,182 @@ gp_last_act_superblock:
 	.zero	8
 	.section	.bss.idb_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR183,. + 0
+	.set	.LANCHOR182,. + 0
 	.type	idb_buf, %object
 	.size	idb_buf, 8
 idb_buf:
 	.zero	8
 	.section	.bss.idb_need_write_back,"aw",@nobits
 	.align	2
-	.set	.LANCHOR182,. + 0
+	.set	.LANCHOR181,. + 0
 	.type	idb_need_write_back, %object
 	.size	idb_need_write_back, 4
 idb_need_write_back:
 	.zero	4
 	.section	.bss.low_format_en,"aw",@nobits
 	.align	2
-	.set	.LANCHOR181,. + 0
+	.set	.LANCHOR180,. + 0
 	.type	low_format_en, %object
 	.size	low_format_en, 4
 low_format_en:
 	.zero	4
-	.section	.bss.p_blk_mode_table,"aw",@nobits
-	.align	3
-	.set	.LANCHOR1,. + 0
-	.type	p_blk_mode_table, %object
-	.size	p_blk_mode_table, 8
-p_blk_mode_table:
-	.zero	8
 	.section	.bss.p_data_block_list_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR41,. + 0
+	.set	.LANCHOR40,. + 0
 	.type	p_data_block_list_head, %object
 	.size	p_data_block_list_head, 8
 p_data_block_list_head:
 	.zero	8
 	.section	.bss.p_data_block_list_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR40,. + 0
+	.set	.LANCHOR39,. + 0
 	.type	p_data_block_list_table, %object
 	.size	p_data_block_list_table, 8
 p_data_block_list_table:
 	.zero	8
 	.section	.bss.p_data_block_list_tail,"aw",@nobits
 	.align	3
-	.set	.LANCHOR43,. + 0
+	.set	.LANCHOR42,. + 0
 	.type	p_data_block_list_tail, %object
 	.size	p_data_block_list_tail, 8
 p_data_block_list_tail:
 	.zero	8
 	.section	.bss.p_erase_count_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR47,. + 0
+	.set	.LANCHOR46,. + 0
 	.type	p_erase_count_table, %object
 	.size	p_erase_count_table, 8
 p_erase_count_table:
 	.zero	8
 	.section	.bss.p_free_data_block_list_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR46,. + 0
+	.set	.LANCHOR45,. + 0
 	.type	p_free_data_block_list_head, %object
 	.size	p_free_data_block_list_head, 8
 p_free_data_block_list_head:
 	.zero	8
 	.section	.bss.p_gc_blk_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR69,. + 0
+	.set	.LANCHOR68,. + 0
 	.type	p_gc_blk_tbl, %object
 	.size	p_gc_blk_tbl, 8
 p_gc_blk_tbl:
 	.zero	8
 	.section	.bss.p_gc_data_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR64,. + 0
+	.set	.LANCHOR63,. + 0
 	.type	p_gc_data_buf, %object
 	.size	p_gc_data_buf, 8
 p_gc_data_buf:
 	.zero	8
 	.section	.bss.p_gc_page_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR71,. + 0
+	.set	.LANCHOR70,. + 0
 	.type	p_gc_page_info, %object
 	.size	p_gc_page_info, 8
 p_gc_page_info:
 	.zero	8
 	.section	.bss.p_gc_spare_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR65,. + 0
+	.set	.LANCHOR64,. + 0
 	.type	p_gc_spare_buf, %object
 	.size	p_gc_spare_buf, 8
 p_gc_spare_buf:
 	.zero	8
 	.section	.bss.p_io_data_buf_0,"aw",@nobits
 	.align	3
-	.set	.LANCHOR109,. + 0
+	.set	.LANCHOR108,. + 0
 	.type	p_io_data_buf_0, %object
 	.size	p_io_data_buf_0, 8
 p_io_data_buf_0:
 	.zero	8
 	.section	.bss.p_io_data_buf_1,"aw",@nobits
 	.align	3
-	.set	.LANCHOR110,. + 0
+	.set	.LANCHOR109,. + 0
 	.type	p_io_data_buf_1, %object
 	.size	p_io_data_buf_1, 8
 p_io_data_buf_1:
 	.zero	8
 	.section	.bss.p_io_spare_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR115,. + 0
+	.set	.LANCHOR114,. + 0
 	.type	p_io_spare_buf, %object
 	.size	p_io_spare_buf, 8
 p_io_spare_buf:
 	.zero	8
 	.section	.bss.p_l2p_map_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR126,. + 0
+	.set	.LANCHOR125,. + 0
 	.type	p_l2p_map_buf, %object
 	.size	p_l2p_map_buf, 8
 p_l2p_map_buf:
 	.zero	8
 	.section	.bss.p_l2p_ram_map,"aw",@nobits
 	.align	3
-	.set	.LANCHOR55,. + 0
+	.set	.LANCHOR54,. + 0
 	.type	p_l2p_ram_map, %object
 	.size	p_l2p_ram_map, 8
 p_l2p_ram_map:
 	.zero	8
 	.section	.bss.p_map_block_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR119,. + 0
+	.set	.LANCHOR118,. + 0
 	.type	p_map_block_table, %object
 	.size	p_map_block_table, 8
 p_map_block_table:
 	.zero	8
 	.section	.bss.p_map_block_valid_page_count,"aw",@nobits
 	.align	3
-	.set	.LANCHOR120,. + 0
+	.set	.LANCHOR119,. + 0
 	.type	p_map_block_valid_page_count, %object
 	.size	p_map_block_valid_page_count, 8
 p_map_block_valid_page_count:
 	.zero	8
 	.section	.bss.p_map_block_ver_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR125,. + 0
+	.set	.LANCHOR124,. + 0
 	.type	p_map_block_ver_table, %object
 	.size	p_map_block_ver_table, 8
 p_map_block_ver_table:
 	.zero	8
 	.section	.bss.p_map_region_ppn_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR124,. + 0
+	.set	.LANCHOR123,. + 0
 	.type	p_map_region_ppn_table, %object
 	.size	p_map_region_ppn_table, 8
 p_map_region_ppn_table:
 	.zero	8
 	.section	.bss.p_plane_order_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR13,. + 0
+	.set	.LANCHOR12,. + 0
 	.type	p_plane_order_table, %object
 	.size	p_plane_order_table, 32
 p_plane_order_table:
 	.zero	32
 	.section	.bss.p_swl_mul_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR117,. + 0
+	.set	.LANCHOR116,. + 0
 	.type	p_swl_mul_table, %object
 	.size	p_swl_mul_table, 8
 p_swl_mul_table:
 	.zero	8
 	.section	.bss.p_sys_data_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR106,. + 0
+	.set	.LANCHOR105,. + 0
 	.type	p_sys_data_buf, %object
 	.size	p_sys_data_buf, 8
 p_sys_data_buf:
 	.zero	8
 	.section	.bss.p_sys_data_buf_1,"aw",@nobits
 	.align	3
-	.set	.LANCHOR107,. + 0
+	.set	.LANCHOR106,. + 0
 	.type	p_sys_data_buf_1, %object
 	.size	p_sys_data_buf_1, 8
 p_sys_data_buf_1:
 	.zero	8
 	.section	.bss.p_sys_spare_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR114,. + 0
+	.set	.LANCHOR113,. + 0
 	.type	p_sys_spare_buf, %object
 	.size	p_sys_spare_buf, 8
 p_sys_spare_buf:
@@ -12744,119 +12661,119 @@ p_valid_page_count_check_table:
 	.zero	8
 	.section	.bss.p_valid_page_count_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR42,. + 0
+	.set	.LANCHOR41,. + 0
 	.type	p_valid_page_count_table, %object
 	.size	p_valid_page_count_table, 8
 p_valid_page_count_table:
 	.zero	8
 	.section	.bss.p_vendor_block_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR36,. + 0
+	.set	.LANCHOR35,. + 0
 	.type	p_vendor_block_table, %object
 	.size	p_vendor_block_table, 8
 p_vendor_block_table:
 	.zero	8
 	.section	.bss.p_vendor_block_valid_page_count,"aw",@nobits
 	.align	3
-	.set	.LANCHOR121,. + 0
+	.set	.LANCHOR120,. + 0
 	.type	p_vendor_block_valid_page_count, %object
 	.size	p_vendor_block_valid_page_count, 8
 p_vendor_block_valid_page_count:
 	.zero	8
 	.section	.bss.p_vendor_block_ver_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR122,. + 0
+	.set	.LANCHOR121,. + 0
 	.type	p_vendor_block_ver_table, %object
 	.size	p_vendor_block_ver_table, 8
 p_vendor_block_ver_table:
 	.zero	8
 	.section	.bss.p_vendor_data_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR108,. + 0
+	.set	.LANCHOR107,. + 0
 	.type	p_vendor_data_buf, %object
 	.size	p_vendor_data_buf, 8
 p_vendor_data_buf:
 	.zero	8
 	.section	.bss.p_vendor_region_ppn_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR123,. + 0
+	.set	.LANCHOR122,. + 0
 	.type	p_vendor_region_ppn_table, %object
 	.size	p_vendor_region_ppn_table, 8
 p_vendor_region_ppn_table:
 	.zero	8
 	.section	.bss.req_erase,"aw",@nobits
 	.align	3
-	.set	.LANCHOR79,. + 0
+	.set	.LANCHOR78,. + 0
 	.type	req_erase, %object
 	.size	req_erase, 8
 req_erase:
 	.zero	8
 	.section	.bss.req_gc,"aw",@nobits
 	.align	3
-	.set	.LANCHOR66,. + 0
+	.set	.LANCHOR65,. + 0
 	.type	req_gc, %object
 	.size	req_gc, 8
 req_gc:
 	.zero	8
 	.section	.bss.req_gc_dst,"aw",@nobits
 	.align	3
-	.set	.LANCHOR104,. + 0
+	.set	.LANCHOR103,. + 0
 	.type	req_gc_dst, %object
 	.size	req_gc_dst, 8
 req_gc_dst:
 	.zero	8
 	.section	.bss.req_prgm,"aw",@nobits
 	.align	3
-	.set	.LANCHOR105,. + 0
+	.set	.LANCHOR104,. + 0
 	.type	req_prgm, %object
 	.size	req_prgm, 8
 req_prgm:
 	.zero	8
 	.section	.bss.req_read,"aw",@nobits
 	.align	3
-	.set	.LANCHOR103,. + 0
+	.set	.LANCHOR102,. + 0
 	.type	req_read, %object
 	.size	req_read, 8
 req_read:
 	.zero	8
 	.section	.bss.req_sys,"aw",@nobits
 	.align	3
-	.set	.LANCHOR138,. + 0
+	.set	.LANCHOR137,. + 0
 	.type	req_sys, %object
 	.size	req_sys, 32
 req_sys:
 	.zero	32
 	.section	.bss.sftl_nand_check_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR111,. + 0
+	.set	.LANCHOR110,. + 0
 	.type	sftl_nand_check_buf, %object
 	.size	sftl_nand_check_buf, 8
 sftl_nand_check_buf:
 	.zero	8
 	.section	.bss.sftl_nand_check_spare_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR113,. + 0
+	.set	.LANCHOR112,. + 0
 	.type	sftl_nand_check_spare_buf, %object
 	.size	sftl_nand_check_spare_buf, 8
 sftl_nand_check_spare_buf:
 	.zero	8
 	.section	.bss.sftl_temp_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR112,. + 0
+	.set	.LANCHOR111,. + 0
 	.type	sftl_temp_buf, %object
 	.size	sftl_temp_buf, 8
 sftl_temp_buf:
 	.zero	8
 	.section	.data.ftl_gc_temp_block_bops_scan_page_addr,"aw",@progbits
 	.align	1
-	.set	.LANCHOR160,. + 0
+	.set	.LANCHOR159,. + 0
 	.type	ftl_gc_temp_block_bops_scan_page_addr, %object
 	.size	ftl_gc_temp_block_bops_scan_page_addr, 2
 ftl_gc_temp_block_bops_scan_page_addr:
 	.hword	-1
 	.section	.data.gFtlInitStatus,"aw",@progbits
 	.align	2
-	.set	.LANCHOR166,. + 0
+	.set	.LANCHOR165,. + 0
 	.type	gFtlInitStatus, %object
 	.size	gFtlInitStatus, 4
 gFtlInitStatus:
@@ -12947,258 +12864,258 @@ power_up_flag:
 	.string	"FtlWrite: lpa error:%x %x\n"
 	.section	.rodata.FtlWriteToIDB.str1.1,"aMS",@progbits,1
 .LC50:
-	.string	"write_idblock fail! %x %x %x %x\n"
+	.string	"write_idblock %x %x\n"
 .LC51:
-	.string	"%s idb buffer alloc fail\n"
+	.string	"write_idblock fail! %x %x %x %x\n"
 .LC52:
-	.string	"%p %x %p %x\n"
+	.string	"%s idb buffer alloc fail\n"
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",@progbits,1
 .LC1:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
-	.section	.rodata.__func__.6252,"a",@progbits
+	.section	.rodata.__func__.6357,"a",@progbits
 	.align	3
-	.set	.LANCHOR169,. + 0
-	.type	__func__.6252, %object
-	.size	__func__.6252, 13
-__func__.6252:
+	.set	.LANCHOR168,. + 0
+	.type	__func__.6357, %object
+	.size	__func__.6357, 13
+__func__.6357:
 	.string	"FtlProgPages"
-	.section	.rodata.__func__.6280,"a",@progbits
+	.section	.rodata.__func__.6385,"a",@progbits
 	.align	3
-	.set	.LANCHOR177,. + 0
-	.type	__func__.6280, %object
-	.size	__func__.6280, 9
-__func__.6280:
+	.set	.LANCHOR176,. + 0
+	.type	__func__.6385, %object
+	.size	__func__.6385, 9
+__func__.6385:
 	.string	"FtlWrite"
-	.section	.rodata.__func__.6362,"a",@progbits
+	.section	.rodata.__func__.6467,"a",@progbits
 	.align	3
-	.set	.LANCHOR128,. + 0
-	.type	__func__.6362, %object
-	.size	__func__.6362, 14
-__func__.6362:
+	.set	.LANCHOR127,. + 0
+	.type	__func__.6467, %object
+	.size	__func__.6467, 14
+__func__.6467:
 	.string	"FtlBbt2Bitmap"
-	.section	.rodata.__func__.6397,"a",@progbits
+	.section	.rodata.__func__.6502,"a",@progbits
 	.align	3
-	.set	.LANCHOR141,. + 0
-	.type	__func__.6397, %object
-	.size	__func__.6397, 11
-__func__.6397:
+	.set	.LANCHOR140,. + 0
+	.type	__func__.6502, %object
+	.size	__func__.6502, 11
+__func__.6502:
 	.string	"FtlLoadBbt"
-	.section	.rodata.__func__.6512,"a",@progbits
+	.section	.rodata.__func__.6617,"a",@progbits
 	.align	3
-	.set	.LANCHOR49,. + 0
-	.type	__func__.6512, %object
-	.size	__func__.6512, 17
-__func__.6512:
+	.set	.LANCHOR48,. + 0
+	.type	__func__.6617, %object
+	.size	__func__.6617, 17
+__func__.6617:
 	.string	"INSERT_FREE_LIST"
-	.section	.rodata.__func__.6517,"a",@progbits
+	.section	.rodata.__func__.6622,"a",@progbits
 	.align	3
-	.set	.LANCHOR45,. + 0
-	.type	__func__.6517, %object
-	.size	__func__.6517, 17
-__func__.6517:
+	.set	.LANCHOR44,. + 0
+	.type	__func__.6622, %object
+	.size	__func__.6622, 17
+__func__.6622:
 	.string	"INSERT_DATA_LIST"
-	.section	.rodata.__func__.6548,"a",@progbits
+	.section	.rodata.__func__.6653,"a",@progbits
 	.align	3
-	.set	.LANCHOR50,. + 0
-	.type	__func__.6548, %object
-	.size	__func__.6548, 17
-__func__.6548:
+	.set	.LANCHOR49,. + 0
+	.type	__func__.6653, %object
+	.size	__func__.6653, 17
+__func__.6653:
 	.string	"List_remove_node"
-	.section	.rodata.__func__.6580,"a",@progbits
+	.section	.rodata.__func__.6685,"a",@progbits
 	.align	3
-	.set	.LANCHOR54,. + 0
-	.type	__func__.6580, %object
-	.size	__func__.6580, 22
-__func__.6580:
+	.set	.LANCHOR53,. + 0
+	.type	__func__.6685, %object
+	.size	__func__.6685, 22
+__func__.6685:
 	.string	"List_update_data_list"
-	.section	.rodata.__func__.6589,"a",@progbits
+	.section	.rodata.__func__.6694,"a",@progbits
 	.align	3
-	.set	.LANCHOR150,. + 0
-	.type	__func__.6589, %object
-	.size	__func__.6589, 16
-__func__.6589:
+	.set	.LANCHOR149,. + 0
+	.type	__func__.6694, %object
+	.size	__func__.6694, 16
+__func__.6694:
 	.string	"load_l2p_region"
-	.section	.rodata.__func__.6622,"a",@progbits
+	.section	.rodata.__func__.6727,"a",@progbits
 	.align	3
-	.set	.LANCHOR81,. + 0
-	.type	__func__.6622, %object
-	.size	__func__.6622, 26
-__func__.6622:
+	.set	.LANCHOR80,. + 0
+	.type	__func__.6727, %object
+	.size	__func__.6727, 26
+__func__.6727:
 	.string	"ftl_map_blk_alloc_new_blk"
-	.section	.rodata.__func__.6633,"a",@progbits
+	.section	.rodata.__func__.6738,"a",@progbits
 	.align	3
-	.set	.LANCHOR151,. + 0
-	.type	__func__.6633, %object
-	.size	__func__.6633, 15
-__func__.6633:
+	.set	.LANCHOR150,. + 0
+	.type	__func__.6738, %object
+	.size	__func__.6738, 15
+__func__.6738:
 	.string	"ftl_map_blk_gc"
-	.section	.rodata.__func__.6648,"a",@progbits
+	.section	.rodata.__func__.6753,"a",@progbits
 	.align	3
-	.set	.LANCHOR148,. + 0
-	.type	__func__.6648, %object
-	.size	__func__.6648, 31
-__func__.6648:
+	.set	.LANCHOR147,. + 0
+	.type	__func__.6753, %object
+	.size	__func__.6753, 31
+__func__.6753:
 	.string	"Ftl_write_map_blk_to_last_page"
-	.section	.rodata.__func__.6662,"a",@progbits
+	.section	.rodata.__func__.6767,"a",@progbits
 	.align	3
-	.set	.LANCHOR149,. + 0
-	.type	__func__.6662, %object
-	.size	__func__.6662, 16
-__func__.6662:
+	.set	.LANCHOR148,. + 0
+	.type	__func__.6767, %object
+	.size	__func__.6767, 16
+__func__.6767:
 	.string	"FtlMapWritePage"
-	.section	.rodata.__func__.6687,"a",@progbits
+	.section	.rodata.__func__.6792,"a",@progbits
 	.align	3
-	.set	.LANCHOR57,. + 0
-	.type	__func__.6687, %object
-	.size	__func__.6687, 22
-__func__.6687:
+	.set	.LANCHOR56,. + 0
+	.type	__func__.6792, %object
+	.size	__func__.6792, 22
+__func__.6792:
 	.string	"select_l2p_ram_region"
-	.section	.rodata.__func__.6704,"a",@progbits
+	.section	.rodata.__func__.6809,"a",@progbits
 	.align	3
-	.set	.LANCHOR153,. + 0
-	.type	__func__.6704, %object
-	.size	__func__.6704, 9
-__func__.6704:
+	.set	.LANCHOR152,. + 0
+	.type	__func__.6809, %object
+	.size	__func__.6809, 9
+__func__.6809:
 	.string	"log2phys"
-	.section	.rodata.__func__.6768,"a",@progbits
+	.section	.rodata.__func__.6873,"a",@progbits
 	.align	3
-	.set	.LANCHOR165,. + 0
-	.type	__func__.6768, %object
-	.size	__func__.6768, 15
-__func__.6768:
+	.set	.LANCHOR164,. + 0
+	.type	__func__.6873, %object
+	.size	__func__.6873, 15
+__func__.6873:
 	.string	"FtlVpcTblFlush"
-	.section	.rodata.__func__.6790,"a",@progbits
+	.section	.rodata.__func__.6895,"a",@progbits
 	.align	3
-	.set	.LANCHOR140,. + 0
-	.type	__func__.6790, %object
-	.size	__func__.6790, 14
-__func__.6790:
+	.set	.LANCHOR139,. + 0
+	.type	__func__.6895, %object
+	.size	__func__.6895, 14
+__func__.6895:
 	.string	"FtlScanSysBlk"
-	.section	.rodata.__func__.6846,"a",@progbits
+	.section	.rodata.__func__.6944,"a",@progbits
 	.align	3
-	.set	.LANCHOR178,. + 0
-	.type	__func__.6846, %object
-	.size	__func__.6846, 15
-__func__.6846:
+	.set	.LANCHOR177,. + 0
+	.type	__func__.6944, %object
+	.size	__func__.6944, 15
+__func__.6944:
 	.string	"FtlLoadSysInfo"
-	.section	.rodata.__func__.6868,"a",@progbits
+	.section	.rodata.__func__.6966,"a",@progbits
 	.align	3
-	.set	.LANCHOR180,. + 0
-	.type	__func__.6868, %object
-	.size	__func__.6868, 18
-__func__.6868:
+	.set	.LANCHOR179,. + 0
+	.type	__func__.6966, %object
+	.size	__func__.6966, 18
+__func__.6966:
 	.string	"FtlMapTblRecovery"
-	.section	.rodata.__func__.6914,"a",@progbits
+	.section	.rodata.__func__.7012,"a",@progbits
 	.align	3
-	.set	.LANCHOR154,. + 0
-	.type	__func__.6914, %object
-	.size	__func__.6914, 16
-__func__.6914:
+	.set	.LANCHOR153,. + 0
+	.type	__func__.7012, %object
+	.size	__func__.7012, 16
+__func__.7012:
 	.string	"FtlReUsePrevPpa"
-	.section	.rodata.__func__.6948,"a",@progbits
+	.section	.rodata.__func__.7046,"a",@progbits
 	.align	3
-	.set	.LANCHOR155,. + 0
-	.type	__func__.6948, %object
-	.size	__func__.6948, 22
-__func__.6948:
+	.set	.LANCHOR154,. + 0
+	.type	__func__.7046, %object
+	.size	__func__.7046, 22
+__func__.7046:
 	.string	"FtlRecoverySuperblock"
-	.section	.rodata.__func__.7005,"a",@progbits
+	.section	.rodata.__func__.7103,"a",@progbits
 	.align	3
-	.set	.LANCHOR60,. + 0
-	.type	__func__.7005, %object
-	.size	__func__.7005, 16
-__func__.7005:
+	.set	.LANCHOR59,. + 0
+	.type	__func__.7103, %object
+	.size	__func__.7103, 16
+__func__.7103:
 	.string	"make_superblock"
-	.section	.rodata.__func__.7026,"a",@progbits
+	.section	.rodata.__func__.7124,"a",@progbits
 	.align	3
-	.set	.LANCHOR136,. + 0
-	.type	__func__.7026, %object
-	.size	__func__.7026, 18
-__func__.7026:
+	.set	.LANCHOR135,. + 0
+	.type	__func__.7124, %object
+	.size	__func__.7124, 18
+__func__.7124:
 	.string	"SupperBlkListInit"
-	.section	.rodata.__func__.7053,"a",@progbits
+	.section	.rodata.__func__.7151,"a",@progbits
 	.align	3
-	.set	.LANCHOR159,. + 0
-	.type	__func__.7053, %object
-	.size	__func__.7053, 14
-__func__.7053:
+	.set	.LANCHOR158,. + 0
+	.type	__func__.7151, %object
+	.size	__func__.7151, 14
+__func__.7151:
 	.string	"ftl_check_vpc"
-	.section	.rodata.__func__.7118,"a",@progbits
+	.section	.rodata.__func__.7216,"a",@progbits
 	.align	3
-	.set	.LANCHOR144,. + 0
-	.type	__func__.7118, %object
-	.size	__func__.7118, 25
-__func__.7118:
+	.set	.LANCHOR143,. + 0
+	.type	__func__.7216, %object
+	.size	__func__.7216, 25
+__func__.7216:
 	.string	"allocate_data_superblock"
-	.section	.rodata.__func__.7139,"a",@progbits
+	.section	.rodata.__func__.7237,"a",@progbits
 	.align	3
-	.set	.LANCHOR168,. + 0
-	.type	__func__.7139, %object
-	.size	__func__.7139, 29
-__func__.7139:
+	.set	.LANCHOR167,. + 0
+	.type	__func__.7237, %object
+	.size	__func__.7237, 29
+__func__.7237:
 	.string	"allocate_new_data_superblock"
-	.section	.rodata.__func__.7146,"a",@progbits
+	.section	.rodata.__func__.7244,"a",@progbits
 	.align	3
-	.set	.LANCHOR61,. + 0
-	.type	__func__.7146, %object
-	.size	__func__.7146, 19
-__func__.7146:
+	.set	.LANCHOR60,. + 0
+	.type	__func__.7244, %object
+	.size	__func__.7244, 19
+__func__.7244:
 	.string	"get_new_active_ppa"
-	.section	.rodata.__func__.7159,"a",@progbits
+	.section	.rodata.__func__.7257,"a",@progbits
 	.align	3
-	.set	.LANCHOR146,. + 0
-	.type	__func__.7159, %object
-	.size	__func__.7159, 16
-__func__.7159:
+	.set	.LANCHOR145,. + 0
+	.type	__func__.7257, %object
+	.size	__func__.7257, 16
+__func__.7257:
 	.string	"update_vpc_list"
-	.section	.rodata.__func__.7166,"a",@progbits
+	.section	.rodata.__func__.7264,"a",@progbits
 	.align	3
-	.set	.LANCHOR147,. + 0
-	.type	__func__.7166, %object
-	.size	__func__.7166, 20
-__func__.7166:
+	.set	.LANCHOR146,. + 0
+	.type	__func__.7264, %object
+	.size	__func__.7264, 20
+__func__.7264:
 	.string	"decrement_vpc_count"
-	.section	.rodata.__func__.7236,"a",@progbits
+	.section	.rodata.__func__.7334,"a",@progbits
 	.align	3
-	.set	.LANCHOR170,. + 0
-	.type	__func__.7236, %object
-	.size	__func__.7236, 19
-__func__.7236:
+	.set	.LANCHOR169,. + 0
+	.type	__func__.7334, %object
+	.size	__func__.7334, 19
+__func__.7334:
 	.string	"FtlGcFreeTempBlock"
-	.section	.rodata.__func__.7335,"a",@progbits
+	.section	.rodata.__func__.7433,"a",@progbits
 	.align	3
-	.set	.LANCHOR175,. + 0
-	.type	__func__.7335, %object
-	.size	__func__.7335, 23
-__func__.7335:
+	.set	.LANCHOR174,. + 0
+	.type	__func__.7433, %object
+	.size	__func__.7433, 23
+__func__.7433:
 	.string	"rk_ftl_garbage_collect"
-	.section	.rodata.__func__.7607,"a",@progbits
+	.section	.rodata.__func__.7701,"a",@progbits
 	.align	3
-	.set	.LANCHOR137,. + 0
-	.type	__func__.7607, %object
-	.size	__func__.7607, 15
-__func__.7607:
+	.set	.LANCHOR136,. + 0
+	.type	__func__.7701, %object
+	.size	__func__.7701, 15
+__func__.7701:
 	.string	"FlashReadPages"
-	.section	.rodata.__func__.7626,"a",@progbits
+	.section	.rodata.__func__.7720,"a",@progbits
 	.align	3
-	.set	.LANCHOR142,. + 0
-	.type	__func__.7626, %object
-	.size	__func__.7626, 15
-__func__.7626:
+	.set	.LANCHOR141,. + 0
+	.type	__func__.7720, %object
+	.size	__func__.7720, 15
+__func__.7720:
 	.string	"FlashProgPages"
-	.section	.rodata.__func__.7650,"a",@progbits
+	.section	.rodata.__func__.7744,"a",@progbits
 	.align	3
-	.set	.LANCHOR77,. + 0
-	.type	__func__.7650, %object
-	.size	__func__.7650, 17
-__func__.7650:
+	.set	.LANCHOR76,. + 0
+	.type	__func__.7744, %object
+	.size	__func__.7744, 17
+__func__.7744:
 	.string	"FlashEraseBlocks"
-	.section	.rodata.__func__.7765,"a",@progbits
+	.section	.rodata.__func__.7863,"a",@progbits
 	.align	3
-	.set	.LANCHOR185,. + 0
-	.type	__func__.7765, %object
-	.size	__func__.7765, 14
-__func__.7765:
+	.set	.LANCHOR184,. + 0
+	.type	__func__.7863, %object
+	.size	__func__.7863, 14
+__func__.7863:
 	.string	"FtlWriteToIDB"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",@progbits,1
 .LC21:
@@ -13219,7 +13136,7 @@ __func__.7765:
 .LC33:
 	.string	"scan lpa = %x ppa= %x\n"
 .LC34:
-	.string	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\n"
+	.string	"lpa = %x,addr= %x,spare= %x %x %x %x data=%x %x\n"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",@progbits,1
 .LC24:
 	.string	"region_id = %x phyAddr = %x\n"
@@ -13243,5 +13160,5 @@ __func__.7765:
 	.string	"\n"
 	.section	.rodata.sftl_init.str1.1,"aMS",@progbits,1
 .LC49:
-	.string	"SFTL version: 5.0.51 20191028"
+	.string	"SFTL version: 5.0.55 20200925"
 	.hidden	free

commit a964d8e5bb3e33c254d6a3d6640290b6af841c2e
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Tue Sep 29 16:25:48 2020 +0800

    clk: rockchip: rv1126: mux partial clocks to GPLL for tb
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
    Change-Id: I33d2396d0de5bb5fc81990a1ae10e4c80f45e5cd

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rv1126.h b/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
index 8b573fe23c..caafa35c4d 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
@@ -18,7 +18,11 @@
 #define CPLL_HZ		(500 * MHz)
 #define HPLL_HZ		(1400 * MHz)
 #define PCLK_PDPMU_HZ	(100 * MHz)
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_KERNEL_BOOT)
+#define ACLK_PDBUS_HZ	(396 * MHz)
+#else
 #define ACLK_PDBUS_HZ	(500 * MHz)
+#endif
 #define HCLK_PDBUS_HZ	(200 * MHz)
 #define PCLK_PDBUS_HZ	(100 * MHz)
 #define ACLK_PDPHP_HZ	(300 * MHz)
@@ -27,10 +31,10 @@
 #define HCLK_PDAUDIO_HZ	(150 * MHz)
 #define CLK_OSC0_DIV_HZ	(32768)
 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_KERNEL_BOOT)
-#define ACLK_PDVI_HZ	(500 * MHz)
-#define CLK_ISP_HZ	(500 * MHz)
-#define ACLK_PDISPP_HZ	(500 * MHz)
-#define CLK_ISPP_HZ	(400 * MHz)
+#define ACLK_PDVI_HZ	(297 * MHz)
+#define CLK_ISP_HZ	(297 * MHz)
+#define ACLK_PDISPP_HZ	(297 * MHz)
+#define CLK_ISPP_HZ	(237 * MHz)
 #define ACLK_VOP_HZ	(300 * MHz)
 #define DCLK_VOP_HZ	(65 * MHz)
 #endif

commit eeb4ca87433aab17c1c0659f1d08543866bb43b3
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Tue Sep 29 14:43:33 2020 +0800

    rockchip: rv1126: mux clocks to none-cpll
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
    Change-Id: Ida1561569814d6a139818820940012ce7b9f856b

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126.c b/arch/arm/mach-rockchip/rv1126/rv1126.c
index 675a73b6be..fa0428364e 100644
--- a/arch/arm/mach-rockchip/rv1126/rv1126.c
+++ b/arch/arm/mach-rockchip/rv1126/rv1126.c
@@ -62,8 +62,22 @@ DECLARE_GLOBAL_DATA_PTR;
 #define PMU_PWR_GATE_SFTCON	(0x110)
 
 #define CRU_BASE		0xFF490000
+#define CRU_CLKSEL_CON02	0x108
+#define CRU_CLKSEL_CON03	0x10c
+#define CRU_CLKSEL_CON27	0x16c
+#define CRU_CLKSEL_CON31	0x17c
+#define CRU_CLKSEL_CON33	0x184
+#define CRU_CLKSEL_CON40	0x1a0
+#define CRU_CLKSEL_CON49	0x1c4
+#define CRU_CLKSEL_CON50	0x1c8
+#define CRU_CLKSEL_CON51	0x1cc
+#define CRU_CLKSEL_CON54	0x1d8
+#define CRU_CLKSEL_CON61	0x1f4
+#define CRU_CLKSEL_CON63	0x1fc
 #define CRU_CLKSEL_CON65	0x204
 #define CRU_CLKSEL_CON67	0x20c
+#define CRU_CLKSEL_CON68	0x210
+#define CRU_CLKSEL_CON69	0x214
 #define CRU_SOFTRST_CON02	0x308
 
 #define CRU_PMU_BASE		0xFF480000
@@ -541,6 +555,23 @@ int arch_cpu_init(void)
 	writel(0xffff1063, CRU_PMU_BASE + CRU_PMU_GPLL_CON0);
 	writel(0xffff1442, CRU_PMU_BASE + CRU_PMU_GPLL_CON1);
 	writel(0x00030001, CRU_PMU_BASE);
+
+	/* mux clocks to none-cpll */
+	writel(0x00ff0003, CRU_BASE + CRU_CLKSEL_CON02);
+	writel(0x00ff0005, CRU_BASE + CRU_CLKSEL_CON03);
+	writel(0xffff8383, CRU_BASE + CRU_CLKSEL_CON27);
+	writel(0x00ff0083, CRU_BASE + CRU_CLKSEL_CON31);
+	writel(0x00ff0083, CRU_BASE + CRU_CLKSEL_CON33);
+	writel(0xffff4385, CRU_BASE + CRU_CLKSEL_CON40);
+	writel(0x00ff0043, CRU_BASE + CRU_CLKSEL_CON49);
+	writel(0x00ff0003, CRU_BASE + CRU_CLKSEL_CON50);
+	writel(0x00ff0003, CRU_BASE + CRU_CLKSEL_CON51);
+	writel(0xff000300, CRU_BASE + CRU_CLKSEL_CON54);
+	writel(0xff008900, CRU_BASE + CRU_CLKSEL_CON61);
+	writel(0x00ff0089, CRU_BASE + CRU_CLKSEL_CON63);
+	writel(0x00ff0045, CRU_BASE + CRU_CLKSEL_CON68);
+	writel(0x00ff0043, CRU_BASE + CRU_CLKSEL_CON69);
+
 #endif
 	/* enable all pd */
 	writel(0xffff0000, PMU_BASE_ADDR + PMU_PWR_GATE_SFTCON);

commit 796dfc0875251ab4337d951f44d5b8f89e2b14be
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Mon Sep 21 21:24:49 2020 +0800

    rockchip: rv1126: Adjust the parameters of GPLL's VCO for THUNDER_BOOT
    
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
    Change-Id: Ib322b62c1adbe355c2d64488fb33266bca974ea5

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126.c b/arch/arm/mach-rockchip/rv1126/rv1126.c
index d7fd26c1b4..675a73b6be 100644
--- a/arch/arm/mach-rockchip/rv1126/rv1126.c
+++ b/arch/arm/mach-rockchip/rv1126/rv1126.c
@@ -66,6 +66,10 @@ DECLARE_GLOBAL_DATA_PTR;
 #define CRU_CLKSEL_CON67	0x20c
 #define CRU_SOFTRST_CON02	0x308
 
+#define CRU_PMU_BASE		0xFF480000
+#define CRU_PMU_GPLL_CON0	0x10
+#define CRU_PMU_GPLL_CON1	0x14
+
 #define GRF_BASE		0xFE000000
 #define PMUGRF_BASE		0xFE020000
 #define SGRF_BASE		0xFE0A0000
@@ -531,6 +535,13 @@ int arch_cpu_init(void)
 	writel(0xffffffff, PMU_BASE_ADDR + PMU_NOC_AUTO_CON0);
 	writel(0xffffffff, PMU_BASE_ADDR + PMU_NOC_AUTO_CON1);
 
+#ifdef CONFIG_SPL_KERNEL_BOOT
+	/* Adjust the parameters of GPLL's VCO for reduce power*/
+	writel(0x00030000, CRU_PMU_BASE);
+	writel(0xffff1063, CRU_PMU_BASE + CRU_PMU_GPLL_CON0);
+	writel(0xffff1442, CRU_PMU_BASE + CRU_PMU_GPLL_CON1);
+	writel(0x00030001, CRU_PMU_BASE);
+#endif
 	/* enable all pd */
 	writel(0xffff0000, PMU_BASE_ADDR + PMU_PWR_GATE_SFTCON);
 	delay = 1000;

commit ce2eb8d1fb65981fd648df951d67d632ec1d1223
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Aug 28 14:36:07 2020 +0800

    disk: efi: handle factory image gpt
    
    The factory image doesn't know the correct emmc capacity, so it use
    0xffffffff as the size, in this case:
    - The primary gpt header's last_usable_lba is (0xffffffff - 34)
    - The backup gpt table is missing
    We need to fix these two issues.
    
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    Change-Id: I8a1fa65b0af1723017c87d52b4ef594353ce46ff

diff --git a/disk/part_efi.c b/disk/part_efi.c
index 7a379b7e63..1d18302971 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -72,6 +72,7 @@ static inline int is_bootable(gpt_entry *p)
 			sizeof(efi_guid_t));
 }
 
+#define FACTORY_UNKNOWN_LBA (0xffffffff - 34)
 static int validate_gpt_header(gpt_header *gpt_h, lbaint_t lba,
 		lbaint_t lastlba)
 {
@@ -124,6 +125,16 @@ static int validate_gpt_header(gpt_header *gpt_h, lbaint_t lba,
 		return -1;
 	}
 	if (le64_to_cpu(gpt_h->last_usable_lba) > lastlba) {
+		if (le64_to_cpu(gpt_h->last_usable_lba) == FACTORY_UNKNOWN_LBA) {
+#ifdef CONFIG_SPL_BUILD
+			printf("GPT: SPL workaround factory last_usable_lba\n");
+			gpt_h->last_usable_lba = lastlba - 34;
+			return 0;
+#else
+			printf("GPT: last_usable_lba need repair\n");
+			return 0;
+#endif
+		}
 		printf("GPT: last_usable_lba incorrect: %llX > " LBAF "\n",
 		       le64_to_cpu(gpt_h->last_usable_lba), lastlba);
 		return -1;
@@ -381,6 +392,7 @@ static int part_efi_repair(struct blk_desc *dev_desc, gpt_entry *gpt_pte,
 		gpt_head->my_lba = dev_desc->lba - 1;
 		gpt_head->alternate_lba = 1;
 		gpt_head->partition_entry_lba = dev_desc->lba - 0x21;
+		gpt_head->last_usable_lba = cpu_to_le64(dev_desc->lba - 34);
 		gpt_entry_modify(dev_desc, gpt_pte, gpt_head);
 		calc_crc32 = efi_crc32((const unsigned char *)gpt_head,
 				       le32_to_cpu(gpt_head->header_size));
@@ -404,6 +416,7 @@ static int part_efi_repair(struct blk_desc *dev_desc, gpt_entry *gpt_pte,
 		gpt_head->my_lba = 1;
 		gpt_head->alternate_lba = dev_desc->lba - 1;
 		gpt_head->partition_entry_lba = 0x22;
+		gpt_head->last_usable_lba = cpu_to_le64(dev_desc->lba - 34);
 		gpt_entry_modify(dev_desc, gpt_pte, gpt_head);
 		calc_crc32 = efi_crc32((const unsigned char *)gpt_head,
 				       le32_to_cpu(gpt_head->header_size));
@@ -457,6 +470,15 @@ static int part_test_efi(struct blk_desc *dev_desc)
 				      h_gpt_head, &h_gpt_pte);
 	backup_gpt_valid = is_gpt_valid(dev_desc, (dev_desc->lba - 1),
 					b_gpt_head, &b_gpt_pte);
+
+	if ((head_gpt_valid == 1) &&
+	    (le64_to_cpu(h_gpt_head->last_usable_lba)
+	     == FACTORY_UNKNOWN_LBA)) {
+		if (part_efi_repair(dev_desc, h_gpt_pte, h_gpt_head,
+				    0, 1))
+			printf("Primary GPT repair fail!\n");
+	}
+
 	if (head_gpt_valid == 1 && backup_gpt_valid == 0) {
 		if (part_efi_repair(dev_desc, h_gpt_pte, h_gpt_head,
 				    head_gpt_valid, backup_gpt_valid))

commit 95522b57e007ce405b8164510dd1ee95f28ae7af
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Aug 28 14:34:18 2020 +0800

    disk: efi: do not fix the gpt error at SPL in normal boot
    
    We handle the error at U-Boot stage instead of SPL stage in normal case,
    still need to do this in SPL when there is no U-Boot proper.
    
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    Change-Id: I008caaa0d1f95316fc0b87cb55de35d8f8e31b36

diff --git a/disk/part_efi.c b/disk/part_efi.c
index b7b0349f2c..7a379b7e63 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -341,6 +341,7 @@ int part_get_info_efi(struct blk_desc *dev_desc, int part,
 }
 
 #ifdef CONFIG_RKIMG_BOOTLOADER
+#if defined(CONFIG_SPL_KERNEL_BOOT) || !defined(CONFIG_SPL_BUILD)
 static void gpt_entry_modify(struct blk_desc *dev_desc,
 			     gpt_entry *gpt_pte,
 			     gpt_header *gpt_head)
@@ -426,6 +427,7 @@ static int part_efi_repair(struct blk_desc *dev_desc, gpt_entry *gpt_pte,
 	return 0;
 }
 #endif
+#endif
 
 static int part_test_efi(struct blk_desc *dev_desc)
 {
@@ -438,6 +440,7 @@ static int part_test_efi(struct blk_desc *dev_desc)
 		return -1;
 	}
 #ifdef CONFIG_RKIMG_BOOTLOADER
+#if defined(CONFIG_SPL_KERNEL_BOOT) || !defined(CONFIG_SPL_BUILD)
 	gpt_entry *h_gpt_pte = NULL;
 	gpt_header *h_gpt_head = NULL;
 	gpt_entry *b_gpt_pte = NULL;
@@ -474,6 +477,7 @@ static int part_test_efi(struct blk_desc *dev_desc)
 	b_gpt_pte = NULL;
 	free(b_gpt_head);
 	b_gpt_head = NULL;
+#endif
 #endif
 	return ret;
 }

commit 1252bc90e455921d6dee268b042c7568c2a3c252
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Wed Sep 23 17:20:29 2020 +0800

    rockchip: rv1126: config PMU_NOC_AUTO_CON
    
    When perform idle operation, corresponding clock can
    be opened or gated automatically.
    
    Change-Id: Ib33115024b3f85f1f8bcabf2548caf3b13b0361f
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126.c b/arch/arm/mach-rockchip/rv1126/rv1126.c
index 00599c74ca..d7fd26c1b4 100644
--- a/arch/arm/mach-rockchip/rv1126/rv1126.c
+++ b/arch/arm/mach-rockchip/rv1126/rv1126.c
@@ -56,6 +56,8 @@ DECLARE_GLOBAL_DATA_PTR;
 #define PMU_BUS_IDLE_SFTCON(n)	(0xc0 + (n) * 4)
 #define PMU_BUS_IDLE_ACK	(0xd0)
 #define PMU_BUS_IDLE_ST		(0xd8)
+#define PMU_NOC_AUTO_CON0	(0xe0)
+#define PMU_NOC_AUTO_CON1	(0xe4)
 #define PMU_PWR_DWN_ST		(0x108)
 #define PMU_PWR_GATE_SFTCON	(0x110)
 
@@ -522,6 +524,13 @@ int arch_cpu_init(void)
 	writel(0x00ff0055, CRU_BASE + CRU_CLKSEL_CON65);
 	writel(0x00ff0055, CRU_BASE + CRU_CLKSEL_CON67);
 
+	/*
+	 * When perform idle operation, corresponding clock can
+	 * be opened or gated automatically.
+	 */
+	writel(0xffffffff, PMU_BASE_ADDR + PMU_NOC_AUTO_CON0);
+	writel(0xffffffff, PMU_BASE_ADDR + PMU_NOC_AUTO_CON1);
+
 	/* enable all pd */
 	writel(0xffff0000, PMU_BASE_ADDR + PMU_PWR_GATE_SFTCON);
 	delay = 1000;

commit 4857df5d78578761a779e6d0f99264795272882d
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sun Sep 27 11:14:43 2020 +0800

    rockchip: evb-rk3128: enable android boot cmd
    
    Enable android boot cmd to support rk aosp boot img.
    
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    Change-Id: I37fc3311ccbc4251e6ef90599f534b485a38f0dd

diff --git a/configs/evb-rk3128_defconfig b/configs/evb-rk3128_defconfig
index 82584200cb..ed6f6dc4a9 100644
--- a/configs/evb-rk3128_defconfig
+++ b/configs/evb-rk3128_defconfig
@@ -6,6 +6,8 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3128-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_ANDROID_AVB=y
 CONFIG_BOARD_EARLY_INIT_R=y
 CONFIG_FASTBOOT_BUF_ADDR=0x60800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
@@ -13,6 +15,8 @@ CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
@@ -54,3 +58,11 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x2207
 CONFIG_USB_GADGET_PRODUCT_NUM=0x310c
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_ERRNO_STR=y
+# CONFIG_EFI_LOADER is not set
+CONFIG_AVB_LIBAVB=y
+CONFIG_AVB_LIBAVB_AB=y
+CONFIG_AVB_LIBAVB_ATX=y
+CONFIG_AVB_LIBAVB_USER=y
+CONFIG_RK_AVB_LIBAVB_USER=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V1=y

commit 02b8a383be3c2c553574b115cf16ce5b213eeff5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Sep 24 16:40:26 2020 +0800

    rockchip: rk3308: remove unused code
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Id079ca34c140de00c1a798327420c8687c660631

diff --git a/arch/arm/mach-rockchip/rk3308/rk3308.c b/arch/arm/mach-rockchip/rk3308/rk3308.c
index 9bdcc877b8..3cd85005e7 100644
--- a/arch/arm/mach-rockchip/rk3308/rk3308.c
+++ b/arch/arm/mach-rockchip/rk3308/rk3308.c
@@ -180,9 +180,6 @@ void board_debug_uart_init(void)
 {
 	static struct rk3308_grf * const grf = (void *)GRF_BASE;
 
-	if (gd && gd->serial.using_pre_serial)
-		return;
-
 	/* Enable early UART2 channel m1 on the rk3308 */
 	rk_clrsetreg(&grf->soc_con5, UART2_IO_SEL_MASK,
 		     UART2_IO_SEL_M1 << UART2_IO_SEL_SHIFT);

commit 7abb254d74f37e81e1418231a19723ec239f3fd9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 6 18:22:18 2020 +0800

    rockchip: board: correct debug uart init
    
    Should use debug_uart_init() which include board_debug_uart_init().
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ib3479aed3e874ac11da3ebb8f8868a6f43218ef8

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 573bad48b2..dc58936dac 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -336,7 +336,7 @@ static void early_download(void)
 static void board_debug_init(void)
 {
 	if (!gd->serial.using_pre_serial)
-		board_debug_uart_init();
+		debug_uart_init();
 
 	if (tstc()) {
 		gd->console_evt = getc();
@@ -562,8 +562,8 @@ int board_init_f_init_serial(void)
 
 	if (t) {
 		gd->serial.using_pre_serial = t->u.serial.enable;
-		gd->serial.addr = t->u.serial.addr;
 		gd->serial.baudrate = t->u.serial.baudrate;
+		gd->serial.addr = t->u.serial.addr;
 		gd->serial.id = t->u.serial.id;
 
 		debug("%s: enable=%d, addr=0x%lx, baudrate=%d, id=%d\n",

commit 40a6a2cba22e4e3ef173d759c22dab655d643889
Author: Dayao Ji <jdy@rock-chips.com>
Date:   Tue Sep 22 13:58:09 2020 +0800

    fastboot: add virtual A/B feature support
    
    Add "fasboot getvar snapshot-update-status" support and
    prevent erase/wipe of userdata/metadata when virtual A/B
    merge status is MERGING or SNAPSHOTTED (+source slot !=
    current slot).
    
    Signed-off-by: Dayao Ji <jdy@rock-chips.com>
    Change-Id: Ibb6ea5778b78b2601178f489d6efcee60d5d0a49

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 5f2eeaa777..7bb16b7bf0 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -43,6 +43,9 @@
 #ifdef CONFIG_FASTBOOT_OEM_UNLOCK
 #include <keymaster.h>
 #endif
+#ifdef CONFIG_ANDROID_AB
+#include <android_ab.h>
+#endif
 
 #define FASTBOOT_VERSION		"0.4"
 
@@ -1000,6 +1003,37 @@ static int fb_read_var(char *cmd, char *response,
 		} while (strlen(cmd));
 		break;
 	}
+	case FB_SNAPSHOT_STATUS: {
+#ifdef CONFIG_ANDROID_AB
+		struct misc_virtual_ab_message state;
+
+		memset(&state, 0x0, sizeof(state));
+		if (read_misc_virtual_ab_message(&state) != 0) {
+			printf("FB_SNAPSHOT_STATUS read_misc_virtual_ab_message failed!\n");
+			fb_add_string(response, chars_left, "get error", NULL);
+			ret = -1;
+		}
+
+		if (state.magic != MISC_VIRTUAL_AB_MAGIC_HEADER) {
+			printf("FB_SNAPSHOT_STATUS not virtual A/B metadata!\n");
+			fb_add_string(response, chars_left, "get error", NULL);
+			ret = -1;
+		}
+
+		if (state.merge_status == ENUM_MERGE_STATUS_MERGING) {
+			fb_add_string(response, chars_left, "merging", NULL);
+		} else if (state.merge_status == ENUM_MERGE_STATUS_SNAPSHOTTED) {
+			fb_add_string(response, chars_left, "snapshotted", NULL);
+		} else {
+			fb_add_string(response, chars_left, "none", NULL);
+		}
+#else
+		fb_add_string(response, chars_left, "get error", NULL);
+		ret = -1;
+#endif
+		break;
+	}
+
 #endif
 #ifdef CONFIG_OPTEE_CLIENT
 	case FB_AT_DH: {
@@ -1094,6 +1128,7 @@ static const struct {
 	{ NAME_ARGS("slot-unbootable", ':'), FB_SLOT_UNBOOTABLE},
 	{ NAME_ARGS("slot-retry-count", ':'), FB_SLOT_RETRY_COUNT},
 	{ NAME_NO_ARGS("at-vboot-state"), FB_AT_VBST},
+	{ NAME_NO_ARGS("snapshot-update-status"), FB_SNAPSHOT_STATUS},
 #endif
 	/*
 	 * OEM specific :
@@ -1397,6 +1432,76 @@ static void fb_getvar_all(void)
 	}
 }
 
+#ifdef CONFIG_ANDROID_AB
+static int get_current_slot(void)
+{
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
+	char cmd[8] = {0};
+	unsigned int slot_number = -1;
+
+	memset(cmd, 0x0, sizeof(cmd));
+	rk_avb_get_current_slot(cmd);
+	if (strncmp("_a", cmd, 2) == 0) {
+		slot_number = 0;
+	} else if (strncmp("_b", cmd, 2) == 0) {
+		slot_number = 1;
+	} else {
+		pr_err("%s: FAILunkown slot name\n", __func__);
+		return -1;
+	}
+
+	return slot_number;
+#else
+	pr_err("%s: FAILnot implemented\n", __func__);
+	return -1;
+#endif
+}
+
+#ifdef CONFIG_FASTBOOT_FLASH
+static int should_prevent_userdata_wipe(void)
+{
+	struct misc_virtual_ab_message state;
+
+	memset(&state, 0x0, sizeof(state));
+	if (read_misc_virtual_ab_message(&state) != 0) {
+		pr_err("%s: read_misc_virtual_ab_message failed!\n", __func__);
+		return 0;
+	}
+
+	if (state.magic != MISC_VIRTUAL_AB_MAGIC_HEADER) {
+		pr_err("%s: NOT virtual A/B metadata!\n", __func__);
+		return 0;
+	}
+
+	if (state.merge_status == (uint8_t)ENUM_MERGE_STATUS_MERGING ||
+		(state.merge_status == (uint8_t)ENUM_MERGE_STATUS_SNAPSHOTTED &&
+		state.source_slot != get_current_slot())) {
+		return 1;
+	}
+
+	return 0;
+}
+#endif
+
+static int get_virtual_ab_merge_status(void)
+{
+	struct misc_virtual_ab_message state;
+
+	memset(&state, 0x0, sizeof(state));
+	if (read_misc_virtual_ab_message(&state) != 0) {
+		pr_err("%s: read_misc_virtual_ab_message failed!\n", __func__);
+		return -1;
+	}
+
+	if (state.magic != MISC_VIRTUAL_AB_MAGIC_HEADER) {
+		pr_err("%s: NOT virtual A/B metadata!\n", __func__);
+		return -1;
+	}
+
+	return state.merge_status;
+}
+#endif
+
 static void cb_getvar(struct usb_ep *ep, struct usb_request *req)
 {
 	char *cmd = req->buf;
@@ -1649,6 +1754,13 @@ static void cb_set_active(struct usb_ep *ep, struct usb_request *req)
 		fastboot_tx_write_str("FAILmissing slot name");
 		return;
 	}
+#ifdef CONFIG_ANDROID_AB
+	if (get_virtual_ab_merge_status() == ENUM_MERGE_STATUS_MERGING) {
+		pr_err("virtual A/B is merging, abort the operation");
+		fastboot_tx_write_str("FAILvirtual A/B is merging, abort");
+		return;
+	}
+#endif
 #ifdef CONFIG_RK_AVB_LIBAVB_USER
 	unsigned int slot_number;
 	if (strncmp("a", cmd, 1) == 0) {
@@ -1702,7 +1814,15 @@ static void cb_flash(struct usb_ep *ep, struct usb_request *req)
 		fastboot_tx_write_str("FAILmissing partition name");
 		return;
 	}
-
+#ifdef CONFIG_ANDROID_AB
+	if ((strcmp(cmd, PART_USERDATA) == 0) || (strcmp(cmd, PART_METADATA) == 0)) {
+		if (should_prevent_userdata_wipe()) {
+			pr_err("FAILThe virtual A/B merging, can not flash userdata or metadata!\n");
+			fastboot_tx_write_str("FAILvirtual A/B merging,abort flash!");
+			return;
+		}
+	}
+#endif
 	fastboot_fail("no flash device defined", response);
 #ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV
 	fb_mmc_flash_write(cmd, (void *)CONFIG_FASTBOOT_BUF_ADDR,
@@ -1894,10 +2014,22 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 		char cmdbuf[32];
 		sprintf(cmdbuf, "gpt write mmc %x $partitions",
 			CONFIG_FASTBOOT_FLASH_MMC_DEV);
-		if (run_command(cmdbuf, 0))
-			fastboot_tx_write_str("FAILmmc write failure");
-		else
-			fastboot_tx_write_str("OKAY");
+#ifdef CONFIG_ANDROID_AB
+		if (should_prevent_userdata_wipe()) {
+			printf("FAILThe virtual A/B merging, can not format!\n");
+			fastboot_tx_write_str("FAILvirtual A/B merging,abort format!");
+		} else {
+			if (run_command(cmdbuf, 0))
+				fastboot_tx_write_str("FAILmmc write failure");
+			else
+				fastboot_tx_write_str("OKAY");
+		}
+#else
+	if (run_command(cmdbuf, 0))
+		fastboot_tx_write_str("FAILmmc write failure");
+	else
+		fastboot_tx_write_str("OKAY");
+#endif
 	} else
 #endif
 	if (strncmp("unlock", cmd + 4, 8) == 0) {
@@ -2157,7 +2289,7 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 static void cb_erase(struct usb_ep *ep, struct usb_request *req)
 {
 	char *cmd = req->buf;
-	char response[FASTBOOT_RESPONSE_LEN];
+	char response[FASTBOOT_RESPONSE_LEN] = {0};
 
 	strsep(&cmd, ":");
 	if (!cmd) {
@@ -2165,7 +2297,15 @@ static void cb_erase(struct usb_ep *ep, struct usb_request *req)
 		fastboot_tx_write_str("FAILmissing partition name");
 		return;
 	}
-
+#ifdef CONFIG_ANDROID_AB
+	if ((strcmp(cmd, PART_USERDATA) == 0) || (strcmp(cmd, PART_METADATA) == 0)) {
+		if (should_prevent_userdata_wipe()) {
+			pr_err("virtual A/B merging, can not erase userdata or metadata!\n");
+			fastboot_tx_write_str("FAILvirtual A/B merging,abort erase!");
+			return;
+		}
+	}
+#endif
 	fastboot_fail("no flash device defined", response);
 #ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV
 	fb_mmc_erase(cmd, response);
diff --git a/include/fastboot.h b/include/fastboot.h
index 13963d304b..5fec137059 100644
--- a/include/fastboot.h
+++ b/include/fastboot.h
@@ -44,6 +44,7 @@ typedef enum {
 	FB_SLOT_UNBOOTABLE,
 	FB_SLOT_RETRY_COUNT,
 	FB_AT_VBST,
+	FB_SNAPSHOT_STATUS,
 #endif
 #ifdef CONFIG_OPTEE_CLIENT
 	FB_AT_DH,

commit 132e9ecacf7bff8ab981a3c60def36a7a1ecfd66
Author: Dayao Ji <jdy@rock-chips.com>
Date:   Tue Sep 22 11:52:43 2020 +0800

    rockchip: rkimg: Add R/W interfaces for virtual A/B metadata
    
    According to the AOSP default definition, the virtual A/B
    metadata is located at the offset 32KB of the misc partition.
    
    Signed-off-by: Dayao Ji <jdy@rock-chips.com>
    Change-Id: Ib60379f25e4c72be9f5ed03934ab7dc928cdd585

diff --git a/common/android_ab.c b/common/android_ab.c
index cfbf5301a5..6ff1e32d54 100644
--- a/common/android_ab.c
+++ b/common/android_ab.c
@@ -10,6 +10,7 @@
 #include <common.h>
 #include <malloc.h>
 #include <u-boot/crc.h>
+#include <boot_rkimg.h>
 
 /** android_boot_control_compute_crc - Compute the CRC-32 of the bootloader
  * control struct. Only the bytes up to the crc32_le field are considered for
@@ -264,3 +265,70 @@ int android_ab_select(struct blk_desc *dev_desc, disk_partition_t *part_info)
 		return -1;
 	return slot;
 }
+
+int read_misc_virtual_ab_message(struct misc_virtual_ab_message *message)
+{
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+	u32 bcb_offset = (ANDROID_VIRTUAL_AB_METADATA_OFFSET_IN_MISC >> 9);
+	int cnt, ret;
+
+	if (!message) {
+		debug("%s: message is NULL!\n", __func__);
+		return -1;
+	}
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		debug("%s: dev_desc is NULL!\n", __func__);
+		return -1;
+	}
+
+	ret = part_get_info_by_name(dev_desc, PART_MISC, &part_info);
+	if (ret < 0) {
+		debug("%s: Could not found misc partition\n",
+		       __func__);
+		return -1;
+	}
+
+	cnt = DIV_ROUND_UP(sizeof(struct misc_virtual_ab_message), dev_desc->blksz);
+	if (blk_dread(dev_desc, part_info.start + bcb_offset, cnt, message) != cnt) {
+		debug("%s: could not read from misc partition\n", __func__);
+		return -1;
+	}
+
+	return 0;
+}
+
+int write_misc_virtual_ab_message(struct misc_virtual_ab_message *message)
+{
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+	u32 bcb_offset = (ANDROID_VIRTUAL_AB_METADATA_OFFSET_IN_MISC >> 9);
+	int cnt, ret;
+
+	if (!message) {
+		debug("%s: message is NULL!\n", __func__);
+		return -1;
+	}
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		debug("%s: dev_desc is NULL!\n", __func__);
+		return -1;
+	}
+
+	ret = part_get_info_by_name(dev_desc, PART_MISC, &part_info);
+	if (ret < 0) {
+		debug("%s: Could not found misc partition\n",
+		       __func__);
+		return -1;
+	}
+
+	cnt = DIV_ROUND_UP(sizeof(struct misc_virtual_ab_message), dev_desc->blksz);
+	ret = blk_dwrite(dev_desc, part_info.start + bcb_offset, cnt, message);
+	if (ret != cnt)
+		debug("%s: blk_dwrite write failed, ret=%d\n", __func__, ret);
+
+	return 0;
+}
diff --git a/include/android_ab.h b/include/android_ab.h
index c264e9b948..47e88b041c 100644
--- a/include/android_ab.h
+++ b/include/android_ab.h
@@ -12,6 +12,22 @@
 /* Android standard boot slot names are 'a', 'b', 'c', ... */
 #define ANDROID_BOOT_SLOT_NAME(slot_num) ('a' + (slot_num))
 
+#define ENUM_MERGE_STATUS_NONE			(0)
+#define ENUM_MERGE_STATUS_UNKNOWN		(1)
+#define ENUM_MERGE_STATUS_SNAPSHOTTED		(2)
+#define ENUM_MERGE_STATUS_MERGING		(3)
+#define ENUM_MERGE_STATUS_CANCELLED		(4)
+#define MISC_VIRTUAL_AB_MAGIC_HEADER		(0x56740AB0)
+
+struct misc_virtual_ab_message {
+	u8 version;
+	u32 magic;
+	u8 merge_status;
+	u8 source_slot;
+	u8 reserved[57];
+	u8 reserved2[448];
+} __packed;
+
 /** android_ab_select - Select the slot where to boot from.
  * On Android devices with more than one boot slot (multiple copies of the
  * kernel and system images) selects which slot should be used to boot from and
@@ -27,4 +43,7 @@
  */
 int android_ab_select(struct blk_desc *dev_desc, disk_partition_t *part_info);
 
+/* Read or write the Virtual A/B message from 32KB offset in /misc.*/
+int read_misc_virtual_ab_message(struct misc_virtual_ab_message *message);
+int write_misc_virtual_ab_message(struct misc_virtual_ab_message *message);
 #endif
diff --git a/include/android_bootloader_message.h b/include/android_bootloader_message.h
index 2c2142dc6f..9fa8cf0d2e 100644
--- a/include/android_bootloader_message.h
+++ b/include/android_bootloader_message.h
@@ -21,12 +21,14 @@
  * 0   - 2K     Bootloader Message
  * 2K  - 16K    Used by Vendor's bootloader (the 2K - 4K range may be optionally used
  *              as bootloader_message_ab struct)
- * 16K - 64K    Used by uncrypt and recovery to store wipe_package for A/B devices
+ * 16K - 32K    Used by uncrypt and recovery to store wipe_package for A/B devices
+ * 32K - 64K    System space, used for miscellaneous AOSP features (virtual A/B metadata).
  * Note that these offsets are admitted by bootloader,recovery and uncrypt, so they
  * are not configurable without changing all of them.
  */
 static const size_t ANDROID_BOOTLOADER_MESSAGE_OFFSET_IN_MISC = 0;
 static const size_t ANDROID_WIPE_PACKAGE_OFFSET_IN_MISC = 16 * 1024;
+static const size_t ANDROID_VIRTUAL_AB_METADATA_OFFSET_IN_MISC = 32 * 1024;
 
 /* Bootloader Message (2-KiB)
  *
diff --git a/include/boot_rkimg.h b/include/boot_rkimg.h
index 8807aede9a..18b1309127 100644
--- a/include/boot_rkimg.h
+++ b/include/boot_rkimg.h
@@ -59,6 +59,8 @@ struct rockchip_image {
 #define PART_DTBO			"dtbo"
 #define PART_LOGO			"logo"
 #define PART_SYSTEM			"system"
+#define PART_METADATA			"metadata"
+#define PART_USERDATA			"userdata"
 
 struct blk_desc *rockchip_get_bootdev(void);
 void rockchip_set_bootdev(struct blk_desc *desc);

commit ab2b3191abd114da73b8d58216255eb2f26b078d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Sep 21 15:35:26 2020 +0800

    rockchip: rv1126: add periph device region for thunder-boot SPL
    
    It makes thunder-boot SPL only map periph device region as
    dcache off but not all 4GB region to save boot time.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ib0abafe1b74cde24755780261fb7fcfaa8932ea2

diff --git a/include/configs/rv1126_common.h b/include/configs/rv1126_common.h
index a6307ebcc7..19e4d9cf99 100644
--- a/include/configs/rv1126_common.h
+++ b/include/configs/rv1126_common.h
@@ -55,6 +55,9 @@
 #define CONFIG_SYS_SDRAM_BASE		0
 #define SDRAM_MAX_SIZE			0xfd000000
 
+#define PERIPH_DEVICE_START_ADDR	(CONFIG_SYS_SDRAM_BASE + SDRAM_MAX_SIZE)
+#define PERIPH_DEVICE_END_ADDR		SZ_4G
+
 #define CONFIG_SYS_NONCACHED_MEMORY    (1 << 20)       /* 1 MiB */
 #ifndef CONFIG_SPL_BUILD
 

commit 2a3fb7bb049d69d96f3bc7dae8caa756fdc8a613
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Sep 17 20:39:26 2020 +0800

    arm: cp15: only map periph device region as dcache off for thunder-boot SPL
    
    Don't waste time to map all 4GB region.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I24ba4e4e42545dcf3ac6622c36995485956eae1b

diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c
index ce37d95378..cd26ffcd5d 100644
--- a/arch/arm/lib/cache-cp15.c
+++ b/arch/arm/lib/cache-cp15.c
@@ -107,7 +107,7 @@ __weak void dram_bank_mmu_setup(int bank)
 /* to activate the MMU we need to set up virtual memory: use 1M areas */
 static inline void mmu_setup(void)
 {
-	int i;
+	int i, end;
 	u32 reg;
 
 #ifndef CONFIG_SPL_BUILD
@@ -116,8 +116,21 @@ static inline void mmu_setup(void)
 	 */
 	arm_init_before_mmu();
 #endif
+
+	/*
+	 * SPL thunder-boot:
+	 * only map periph device region to save boot time.
+	 */
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_KERNEL_BOOT) && \
+    defined(PERIPH_DEVICE_START_ADDR)
+	i = PERIPH_DEVICE_START_ADDR >> MMU_SECTION_SHIFT;
+	end = PERIPH_DEVICE_END_ADDR >> MMU_SECTION_SHIFT;
+#else
+	i = 0;
+	end = (4096ULL * 1024 * 1024) >> MMU_SECTION_SHIFT;
+#endif
 	/* Set up an identity-mapping for all 4GB, rw for everyone */
-	for (i = 0; i < ((4096ULL * 1024 * 1024) >> MMU_SECTION_SHIFT); i++)
+	for (; i < end; i++)
 		set_section_dcache(i, DCACHE_OFF);
 
 	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {

commit d93c779cf8f42956311b978a36d46cbf3964803a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Sep 21 15:34:39 2020 +0800

    include: linux: add SZ_3G/4G definition
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I97ebf0e488bc33da29c923e7fe9a253f5369ad9a

diff --git a/include/linux/sizes.h b/include/linux/sizes.h
index 9f234b581d..d3671d6cf2 100644
--- a/include/linux/sizes.h
+++ b/include/linux/sizes.h
@@ -44,5 +44,7 @@
 
 #define SZ_1G				0x40000000
 #define SZ_2G				0x80000000
+#define SZ_3G				0xc0000000
+#define SZ_4G				0x100000000ULL
 
 #endif /* __LINUX_SIZES_H__ */

commit 745aeb1a7d34894ca02c79ec6eae74650aa519a8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Sep 9 18:05:01 2020 +0800

    common: android: add boot_img_hdr_v3 and vendor boot support
    
    Android Header v3 and vendor boot partition are introduced
    from Android-11(R).
    
    Header populate:
      Header v3 is no longer compatible with v0/1/2 header, we
      add populate_andr_img_hdr() to merge boot and vendor_boot
      partition header into struct andr_img_hdr in order to
      compatible with v0/1/2 header.
    
    resource.img:
      The second_addr and second_size fields are removed in v3,
      so we require resource partition to restore resource.img.
    
    A/B system:
      If not A/B system, the boot.img header version is 3 and
      recovery header is version 2.
    
    AVB load image:
      - If allow verification error: the image is loaded by
        ops->get_preloaded_partition() which auto populates
        boot_img_hdr_v3.
      - If not allow verification error: the image is full loaded
        by ops->read_from_partition() which doesn't populate
        boot_img_hdr_v3, we need to fix it.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I2afce53c43d782fc57baa01acf9c05518b580840

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index a8a610e804..3d5f29e9f7 100644
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -273,27 +273,6 @@ static int read_logo_bmps(struct blk_desc *dev_desc)
 	return 0;
 }
 
-static int read_dtb_from_android_v2(int rsce_base, int dtb_offset, int dtb_size)
-{
-	if (!dtb_size)
-		return 0;
-
-	/*
-	 * boot_img_hdr_v2 feature.
-	 *
-	 * If dtb position is present, replace the old with new one if
-	 * we don't need to verify DTB hash from resource.img file entry.
-	 */
-#ifndef CONFIG_ROCKCHIP_DTB_VERIFY
-	if (replace_resource_entry(DTB_FILE, rsce_base, dtb_offset, dtb_size))
-		printf("Failed to load dtb from v2 dtb position\n");
-	else
-#endif
-		env_update("bootargs", "androidboot.dtb_idx=0");
-
-	return 0;
-}
-
 int resource_create_ram_list(struct blk_desc *dev_desc, void *rsce_hdr)
 {
 	struct resource_img_hdr *hdr = rsce_hdr;
@@ -385,81 +364,105 @@ err:
 	return ret;
 }
 
+static int read_dtb_from_android(struct blk_desc *dev_desc,
+				 struct andr_img_hdr *hdr,
+				 ulong rsce_base)
+{
+	ulong dtb_offset = 0;
+	ulong dtb_size = 0;
+
+	if (!hdr || hdr->header_version <= 1) {
+		return 0;
+	} else if (hdr->header_version == 2) {
+		dtb_offset += hdr->page_size;
+		dtb_offset += ALIGN(hdr->kernel_size, hdr->page_size);
+		dtb_offset += ALIGN(hdr->ramdisk_size, hdr->page_size);
+		dtb_offset += ALIGN(hdr->recovery_dtbo_size, hdr->page_size) +
+			      ALIGN(hdr->second_size, hdr->page_size);
+		dtb_size = hdr->dtb_size;
+	} else if (hdr->header_version == 3) {
+		dtb_offset += ALIGN(VENDOR_BOOT_HDR_SIZE,
+				    hdr->vendor_page_size) +
+			      ALIGN(hdr->vendor_ramdisk_size,
+				    hdr->vendor_page_size);
+		dtb_size = hdr->dtb_size;
+	}
+
+	if (!dtb_size)
+		return 0;
+
+	/*
+	 * boot_img_hdr_v2,3 feature.
+	 *
+	 * If dtb position is present, replace the old with new one if
+	 * we don't need to verify DTB hash from resource.img file entry.
+	 */
+	dtb_offset = DIV_ROUND_UP(dtb_offset, dev_desc->blksz);
+#ifndef CONFIG_ROCKCHIP_DTB_VERIFY
+	if (replace_resource_entry(DTB_FILE, rsce_base, dtb_offset, dtb_size))
+		printf("Failed to load dtb from v2 dtb position\n");
+	else
+#endif
+		env_update("bootargs", "androidboot.dtb_idx=0");
+
+	return 0;
+}
+
 static int get_resource_base_sector(struct blk_desc *dev_desc,
-				    disk_partition_t *from_part,
-				    int *dtb_off, int *dtb_size)
+				    struct andr_img_hdr **ret_hdr)
 {
 	disk_partition_t part;
-	int rsce_base;
+	int rsce_base = 0;
 #ifdef CONFIG_ANDROID_BOOT_IMAGE
 	struct andr_img_hdr *hdr;
-	int blknum;
+	u32 os_ver = 0, os_lvl;
 
 	/*
 	 * Anyway, we must read android hdr firstly from boot partition to get
 	 * the 'os_version' for android_bcb_msg_sector_offset(), in order to
-	 * confirm BCB message offset of misc partition.
+	 * confirm BCB message offset of *MISC* partition.
 	 */
 	if (part_get_info_by_name(dev_desc, PART_BOOT, &part) < 0)
 		goto resource_part;
 
-	blknum = DIV_ROUND_UP(sizeof(*hdr), dev_desc->blksz);
-	hdr = memalign(ARCH_DMA_MINALIGN, dev_desc->blksz * blknum);
-	if (!hdr)
-		return -ENOMEM;
-
-	if (blk_dread(dev_desc, part.start, blknum, hdr) != blknum) {
-		printf("Failed to read %s hdr\n", part.name);
-		free(hdr);
-		return -EIO;
-	}
-
-	if (!android_image_check_header(hdr)) {
-		u32 os_ver, os_lvl;
-
+	hdr = populate_andr_img_hdr(dev_desc, &part);
+	if (hdr) {
 		os_ver = hdr->os_version >> 11;
 		os_lvl = hdr->os_version & ((1U << 11) - 1);
-		if (os_ver) {
+		if (os_ver)
 			gd->bd->bi_andr_version = hdr->os_version;
-			printf("Android %u.%u, Build %u.%u\n",
-			       (os_ver >> 14) & 0x7F, (os_ver >> 7) & 0x7F,
-			       (os_lvl >> 4) + 2000, os_lvl & 0x0F);
-		}
 	}
 
 #ifndef CONFIG_ANDROID_AB
 	/* Get boot mode from misc and read if recovery mode */
 	if (rockchip_get_boot_mode() == BOOT_MODE_RECOVERY) {
+		if (hdr)
+			free(hdr);
+
 		if (part_get_info_by_name(dev_desc, PART_RECOVERY, &part) < 0)
 			goto resource_part;
 
-		if (blk_dread(dev_desc, part.start, blknum, hdr) != blknum) {
-			printf("Failed to read %s hdr\n", part.name);
-			free(hdr);
-			return -EIO;
-		}
+		hdr = populate_andr_img_hdr(dev_desc, &part);
+		if (!hdr)
+			goto resource_part;
 	}
 #endif
-	/* get ! */
-	if (!android_image_check_header(hdr)) {
-		rsce_base = part.start * dev_desc->blksz;
-		rsce_base += hdr->page_size;
-		rsce_base += ALIGN(hdr->kernel_size, hdr->page_size);
-		rsce_base += ALIGN(hdr->ramdisk_size, hdr->page_size);
-
-		if (hdr->header_version >= 2) {
-			*dtb_size = hdr->dtb_size;
-			*dtb_off =
-				rsce_base +
-				ALIGN(hdr->recovery_dtbo_size, hdr->page_size) +
-				ALIGN(hdr->second_size, hdr->page_size);
+	/* If Android v012, getting resource from second position ! */
+	if (hdr) {
+		if (os_ver)
+			printf("Android %u.%u, Build %u.%u, v%d\n",
+			       (os_ver >> 14) & 0x7F, (os_ver >> 7) & 0x7F,
+			       (os_lvl >> 4) + 2000, os_lvl & 0x0F,
+			       hdr->header_version);
+		*ret_hdr = hdr;
+		if (hdr->header_version < 3) {
+			rsce_base = part.start * dev_desc->blksz;
+			rsce_base += hdr->page_size;
+			rsce_base += ALIGN(hdr->kernel_size, hdr->page_size);
+			rsce_base += ALIGN(hdr->ramdisk_size, hdr->page_size);
+			rsce_base = DIV_ROUND_UP(rsce_base, dev_desc->blksz);
+			goto finish;
 		}
-
-		rsce_base = DIV_ROUND_UP(rsce_base, dev_desc->blksz);
-		*dtb_off = DIV_ROUND_UP(*dtb_off, dev_desc->blksz) - rsce_base;
-		*from_part = part;
-		free(hdr);
-		goto finish;
 	}
 resource_part:
 #endif
@@ -467,10 +470,9 @@ resource_part:
 	if (part_get_info_by_name(dev_desc, PART_RESOURCE, &part) < 0) {
 		printf("No resource partition\n");
 		return -ENODEV;
+	} else {
+		rsce_base = part.start;
 	}
-
-	*from_part = part;
-	rsce_base = part.start;
 #ifdef CONFIG_ANDROID_BOOT_IMAGE
 finish:
 #endif
@@ -490,11 +492,9 @@ finish:
  */
 static int init_resource_list(void)
 {
+	struct andr_img_hdr *hdr = NULL;
 	struct blk_desc *dev_desc;
-	disk_partition_t part;
 	int rsce_base;
-	int dtb_offset;
-	int dtb_size = 0;
 
 	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {
@@ -502,17 +502,14 @@ static int init_resource_list(void)
 		return -ENODEV;
 	}
 
-	rsce_base = get_resource_base_sector(dev_desc, &part,
-					     &dtb_offset, &dtb_size);
+	rsce_base = get_resource_base_sector(dev_desc, &hdr);
 	if (rsce_base > 0) {
 		if (resource_create_list(dev_desc, rsce_base))
 			printf("Failed to create resource list\n");
 	}
 
-	/* override the old one if dtb_size != 0 */
-	read_dtb_from_android_v2(rsce_base, dtb_offset, dtb_size);
-
-	return 0;
+	/* override the resource dtb with android dtb if need */
+	return read_dtb_from_android(dev_desc, hdr, rsce_base);
 }
 
 static struct resource_file *get_file_info(const char *name)
diff --git a/cmd/android.c b/cmd/android.c
index 721a67a0f8..6db721fcab 100644
--- a/cmd/android.c
+++ b/cmd/android.c
@@ -18,7 +18,6 @@ static int do_android_print_hdr(cmd_tbl_t *cmdtp, int flag,
 	struct andr_img_hdr *hdr;
 	disk_partition_t part_info;
 	const char *part_name;
-	int blkcnt, ret;
 
 	if (argc != 2)
 		return CMD_RET_USAGE;
@@ -31,31 +30,18 @@ static int do_android_print_hdr(cmd_tbl_t *cmdtp, int flag,
 		return -ENODEV;
 	}
 
-	ret = part_get_info_by_name(dev_desc, part_name, &part_info);
-	if (ret < 0) {
-		printf("Failed to get \"%s\" part, ret=%d\n", part_name, ret);
+	if (part_get_info_by_name(dev_desc, part_name, &part_info) < 0) {
+		printf("Failed to get \"%s\" part\n", part_name);
 		return -ENODEV;
 	}
 
-	blkcnt = DIV_ROUND_UP(sizeof(*hdr), dev_desc->blksz);
-	hdr = memalign(ARCH_DMA_MINALIGN, dev_desc->blksz * blkcnt);
+	hdr = populate_andr_img_hdr(dev_desc, &part_info);
 	if (!hdr) {
-		printf("%s: out of memory!\n", __func__);
-		return -ENOMEM;
-	}
-
-	ret = blk_dread(dev_desc, part_info.start, blkcnt, hdr);
-	if (ret != blkcnt) {
-		printf("Failed to read %s sector, ret=%d\n", part_info.name, ret);
-		free(hdr);
-		return -EIO;
-	}
-
-	if (!android_image_check_header(hdr)) {
+		printf("Not an android image\n");
+		return -EINVAL;
+	} else {
 		printf("Partition \"%s\"\n", part_info.name);
 		android_print_contents(hdr);
-	} else {
-		printf("Not an android image\n");
 	}
 
 	free(hdr);
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index a5169d6ff7..41b5682252 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -31,6 +31,7 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 #define ANDROID_PARTITION_BOOT "boot"
+#define ANDROID_PARTITION_VENDOR_BOOT "vendor_boot"
 #define ANDROID_PARTITION_MISC "misc"
 #define ANDROID_PARTITION_OEM  "oem"
 #define ANDROID_PARTITION_RECOVERY  "recovery"
@@ -790,8 +791,41 @@ static AvbSlotVerifyResult android_slot_verify(char *boot_partname,
 			strcat(newbootargs, slot_data[0]->cmdline);
 		env_set("bootargs", newbootargs);
 
-		/* Reserve page_size */
 		hdr = (void *)slot_data[0]->loaded_partitions->data;
+
+		/*
+		 *		populate boot_img_hdr_v3
+		 *
+		 * If allow verification error: the image is loaded by
+		 * ops->get_preloaded_partition() which auto populates
+		 * boot_img_hdr_v3.
+		 *
+		 * If not allow verification error: the image is full loaded
+		 * by ops->read_from_partition() which doesn't populate
+		 * boot_img_hdr_v3, we need to fix it here.
+		 */
+		if (hdr->header_version >= 3 &&
+		    !(flags & AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR)) {
+			struct andr_img_hdr *v3hdr;
+			struct blk_desc *dev_desc;
+			disk_partition_t part;
+
+			dev_desc = rockchip_get_bootdev();
+			if (!dev_desc)
+				return -1;
+
+			if (part_get_info_by_name(dev_desc,
+						  boot_partname, &part) < 0)
+				return -1;
+
+			v3hdr = populate_andr_img_hdr(dev_desc, &part);
+			if (v3hdr) {
+				memcpy(hdr, v3hdr, sizeof(*v3hdr));
+				free(v3hdr);
+			}
+		}
+
+		/* Reserve page_size */
 		load_address -= hdr->page_size;
 		if (android_image_memcpy_separate(hdr, &load_address)) {
 			printf("Failed to separate copy android image\n");
@@ -948,7 +982,6 @@ int android_fdt_overlay_apply(void *fdt_addr)
 	disk_partition_t part_info;
 	char *part_dtbo;
 	char buf[32] = {0};
-	u32 blk_cnt;
 	ulong fdt_dtbo = -1;
 	int index = -1;
 	int ret;
@@ -970,32 +1003,25 @@ int android_fdt_overlay_apply(void *fdt_addr)
 	if (ret < 0)
 		return ret;
 
-	blk_cnt = DIV_ROUND_UP(sizeof(*hdr), part_info.blksz);
-	hdr = memalign(ARCH_DMA_MINALIGN, part_info.blksz * blk_cnt);
-	if (!hdr) {
-		printf("%s: out of memory!\n", __func__);
-		return -ENOMEM;
-	}
-
-	ret = blk_dread(dev_desc, part_info.start, blk_cnt, hdr);
-	if (ret != blk_cnt) {
-		printf("%s: failed to read %s hdr!\n", __func__, part_boot);
-		goto out;
-	}
-
+	hdr = populate_andr_img_hdr(dev_desc, &part_info);
+	if (!hdr)
+		return -EINVAL;
 #ifdef DEBUG
 	android_print_contents(hdr);
 #endif
 
-	if (android_image_check_header(hdr))
-		return -EINVAL;
-
-	/* Check header version */
-	if (!hdr->header_version) {
-		printf("Android header version 0\n");
-		ret = -EINVAL;
+	/*
+	 * recovery_dtbo fields
+	 *
+	 * boot_img_hdr_v0: unsupported
+	 * boot_img_hdr_v1,2: supported
+	 * boot_img_hdr_v3 + boot.img: supported
+	 * boot_img_hdr_v3 + recovery.img: unsupported
+	 */
+	if ((hdr->header_version == 0) ||
+	    (hdr->header_version == 3 && !strcmp(part_boot, PART_RECOVERY)) ||
+	    (hdr->header_version > 3))
 		goto out;
-	}
 
 	ret = android_get_dtbo(&fdt_dtbo, (void *)hdr, &index, part_dtbo);
 	if (!ret) {
diff --git a/common/image-android.c b/common/image-android.c
index 95a9ed074d..4e2bc62af0 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -30,9 +30,10 @@ DECLARE_GLOBAL_DATA_PTR;
 #define ANDROID_IMAGE_DEFAULT_KERNEL_ADDR	0x10008000
 #define ANDROID_ARG_FDT_FILENAME		"rk-kernel.dtb"
 #define ANDROID_Q_VER				10
+#define ANDROID_PARTITION_VENDOR_BOOT		"vendor_boot"
 
-/* Defined by rockchip legacy mkboot tool(SDK version < 8.1) */
-#define ANDROID_ROCKCHIP_LEGACY_PAGE_SIZE	0x4000
+#define BLK_CNT(_num_bytes, _block_size)	\
+		((_num_bytes + _block_size - 1) / _block_size)
 
 static char andr_tmp_str[ANDR_BOOT_ARGS_SIZE + 1];
 static u32 android_kernel_comp_type = IH_COMP_NONE;
@@ -131,7 +132,8 @@ int android_image_get_kernel(const struct andr_img_hdr *hdr, int verify,
 			     ulong *os_data, ulong *os_len)
 {
 	u32 kernel_addr = android_image_get_kernel_addr(hdr);
-
+	const char *cmdline = hdr->header_version < 3 ?
+			      hdr->cmdline : hdr->total_cmdline;
 	/*
 	 * Not all Android tools use the id field for signing the image with
 	 * sha1 (or anything) so we don't check it. It is not obvious that the
@@ -146,9 +148,9 @@ int android_image_get_kernel(const struct andr_img_hdr *hdr, int verify,
 	       kernel_addr, DIV_ROUND_UP(hdr->kernel_size, 1024));
 
 	int len = 0;
-	if (*hdr->cmdline) {
-		debug("Kernel command line: %s\n", hdr->cmdline);
-		len += strlen(hdr->cmdline);
+	if (cmdline) {
+		debug("Kernel command line: %s\n", cmdline);
+		len += strlen(cmdline);
 	}
 
 	char *bootargs = env_get("bootargs");
@@ -166,8 +168,8 @@ int android_image_get_kernel(const struct andr_img_hdr *hdr, int verify,
 		strcpy(newbootargs, bootargs);
 		strcat(newbootargs, " ");
 	}
-	if (*hdr->cmdline)
-		strcat(newbootargs, hdr->cmdline);
+	if (cmdline)
+		strcat(newbootargs, cmdline);
 
 	env_set("bootargs", newbootargs);
 
@@ -193,16 +195,22 @@ ulong android_image_get_end(const struct andr_img_hdr *hdr)
 	 * on page boundary
 	 */
 	end = (ulong)hdr;
-	end += hdr->page_size;
-	end += ALIGN(hdr->kernel_size, hdr->page_size);
-	end += ALIGN(hdr->ramdisk_size, hdr->page_size);
-	end += ALIGN(hdr->second_size, hdr->page_size);
-
-	if (hdr->header_version >= 2) {
-		end += ALIGN(hdr->recovery_dtbo_size, hdr->page_size);
-		end += ALIGN(hdr->dtb_size, hdr->page_size);
-	} else if (hdr->header_version >= 1) {
-		end += ALIGN(hdr->recovery_dtbo_size, hdr->page_size);
+	if (hdr->header_version < 3) {
+		end += hdr->page_size;
+		end += ALIGN(hdr->kernel_size, hdr->page_size);
+		end += ALIGN(hdr->ramdisk_size, hdr->page_size);
+		end += ALIGN(hdr->second_size, hdr->page_size);
+		if (hdr->header_version == 1) {
+			end += ALIGN(hdr->recovery_dtbo_size, hdr->page_size);
+		} else if (hdr->header_version == 2) {
+			end += ALIGN(hdr->recovery_dtbo_size, hdr->page_size);
+			end += ALIGN(hdr->dtb_size, hdr->page_size);
+		}
+	} else {
+		/* boot_img_hdr_v3 */
+		end += hdr->page_size;
+		end += ALIGN(hdr->kernel_size, hdr->page_size);
+		end += ALIGN(hdr->ramdisk_size, hdr->page_size);
 	}
 
 	return end;
@@ -293,6 +301,7 @@ typedef enum {
 	IMG_RECOVERY_DTBO,
 	IMG_RK_DTB,	/* within resource.img in second position */
 	IMG_DTB,
+	IMG_VENDOR_RAMDISK,
 	IMG_MAX,
 } img_t;
 
@@ -301,11 +310,14 @@ static int image_load(img_t img, struct andr_img_hdr *hdr,
 		      struct udevice *crypto)
 {
 	struct blk_desc *desc = rockchip_get_bootdev();
+	disk_partition_t part_vendor_boot;
 	__maybe_unused u32 sizesz;
 	ulong pgsz = hdr->page_size;
 	ulong blksz = desc->blksz;
 	ulong blkcnt, blkoff;
+	ulong orgdst = 0;
 	ulong offset = 0;
+	ulong extra = 0;
 	ulong datasz;
 	void *ramdst;
 	int ret = 0;
@@ -321,15 +333,62 @@ static int image_load(img_t img, struct andr_img_hdr *hdr,
 				(phys_addr_t)ramdst, blkcnt * blksz))
 			return -ENOMEM;
 		break;
+	case IMG_VENDOR_RAMDISK:
+		if (part_get_info_by_name(desc,
+					  ANDROID_PARTITION_VENDOR_BOOT,
+					  &part_vendor_boot) < 0) {
+			printf("No vendor boot partition\n");
+			return -ENOENT;
+		}
+		/* Always load vendor boot from storage: avb full load boot/recovery */
+		blkstart = part_vendor_boot.start;
+		ram_base = 0;
+
+		pgsz = hdr->vendor_page_size;
+		offset = ALIGN(VENDOR_BOOT_HDR_SIZE, pgsz);
+		blkcnt = DIV_ROUND_UP(hdr->vendor_ramdisk_size, blksz);
+		ramdst = (void *)env_get_ulong("ramdisk_addr_r", 16, 0);
+		datasz = hdr->vendor_ramdisk_size;
+		sizesz = sizeof(hdr->vendor_ramdisk_size);
+		/*
+		 * Add extra memory for generic ramdisk space.
+		 *
+		 * In case of unaligned vendor ramdisk size, reserve
+		 * 1 more blksz.
+		 */
+		if (hdr->header_version == 3)
+			extra = ALIGN(hdr->ramdisk_size, blksz) + blksz;
+		if (datasz && !sysmem_alloc_base(MEM_RAMDISK,
+			(phys_addr_t)ramdst, blkcnt * blksz + extra))
+			return -ENOMEM;
+		break;
 	case IMG_RAMDISK:
 		offset = pgsz + ALIGN(hdr->kernel_size, pgsz);
 		blkcnt = DIV_ROUND_UP(hdr->ramdisk_size, blksz);
 		ramdst = (void *)env_get_ulong("ramdisk_addr_r", 16, 0);
+		/*
+		 * ramdisk_addr_r:
+		 *	|----------------|---------|
+		 *	| vendor-ramdisk | ramdisk |
+		 *	|----------------|---------|
+		 */
+		if (hdr->header_version >= 3) {
+			ramdst += hdr->vendor_ramdisk_size;
+			if (!IS_ALIGNED((ulong)ramdst, blksz)) {
+				orgdst = (ulong)ramdst;
+				ramdst = (void *)ALIGN(orgdst, blksz);
+			}
+		}
 		datasz = hdr->ramdisk_size;
 		sizesz = sizeof(hdr->ramdisk_size);
-		if (datasz && !sysmem_alloc_base(MEM_RAMDISK,
+		/*
+		 * skip v3: sysmem has been alloced by vendor ramdisk.
+		 */
+		if (hdr->header_version < 3) {
+			if (datasz && !sysmem_alloc_base(MEM_RAMDISK,
 				(phys_addr_t)ramdst, blkcnt * blksz))
-			return -ENOMEM;
+				return -ENOMEM;
+		}
 		break;
 	case IMG_SECOND:
 		offset = pgsz +
@@ -393,6 +452,9 @@ static int image_load(img_t img, struct andr_img_hdr *hdr,
 		}
 	}
 
+	if (orgdst)
+		memmove((char *)orgdst, ramdst, datasz);
+
 crypto_calc:
 	/* sha1 */
 #ifdef CONFIG_DM_CRYPTO
@@ -410,6 +472,9 @@ crypto_calc:
 	return 0;
 }
 
+/*
+ * @ram_base: !NULL means require memcpy for an exist full android image.
+ */
 static int android_image_separate(struct andr_img_hdr *hdr,
 				  const disk_partition_t *part,
 				  void *load_address,
@@ -508,6 +573,48 @@ static int android_image_separate(struct andr_img_hdr *hdr,
 	return 0;
 }
 
+static int android_image_separate_v3(struct andr_img_hdr *hdr,
+				     const disk_partition_t *part,
+				     void *load_address, void *ram_base)
+{
+	ulong bstart;
+
+	if (android_image_check_header(hdr)) {
+		printf("Bad android image header\n");
+		return -EINVAL;
+	}
+
+	/* set for image_load(IMG_KERNEL, ...) */
+	env_set_hex("android_addr_r", (ulong)load_address);
+	bstart = part ? part->start : 0;
+
+	/*
+	 * 1. Load images to their individual target ram position
+	 *    in order to disable fdt/ramdisk relocation.
+	 */
+	if (image_load(IMG_RK_DTB,  hdr, bstart, ram_base, NULL))
+		return -1;
+	if (image_load(IMG_KERNEL,  hdr, bstart, ram_base, NULL))
+		return -1;
+	if (image_load(IMG_VENDOR_RAMDISK, hdr, bstart, ram_base, NULL))
+		return -1;
+	if (image_load(IMG_RAMDISK, hdr, bstart, ram_base, NULL))
+		return -1;
+
+	/*
+	 * Copy the populated hdr to load address after image_load(IMG_KERNEL)
+	 *
+	 * The image_load(IMG_KERNEL) only reads boot_img_hdr_v3 while
+	 * vendor_boot_img_hdr_v3 is not included, so fix it here.
+	 */
+	memcpy((char *)load_address, hdr, hdr->page_size);
+
+	/* 2. Disable fdt/ramdisk relocation, it saves boot time */
+	env_set("bootm-no-reloc", "y");
+
+	return 0;
+}
+
 static ulong android_image_get_comp_addr(struct andr_img_hdr *hdr, int comp)
 {
 	ulong kernel_addr_c;
@@ -605,7 +712,10 @@ static int android_image_load_separate(struct andr_img_hdr *hdr,
 				       const disk_partition_t *part,
 				       void *load_addr)
 {
-	return android_image_separate(hdr, part, load_addr, NULL);
+	if (hdr->header_version < 3)
+		return android_image_separate(hdr, part, load_addr, NULL);
+	else
+		return android_image_separate_v3(hdr, part, load_addr, NULL);
 }
 
 int android_image_memcpy_separate(struct andr_img_hdr *hdr, ulong *load_addr)
@@ -617,8 +727,13 @@ int android_image_memcpy_separate(struct andr_img_hdr *hdr, ulong *load_addr)
 	if (comp_addr == (ulong)hdr)
 		return 0;
 
-	if (android_image_separate(hdr, NULL, (void *)comp_addr, hdr))
-		return -1;
+	if (hdr->header_version < 3) {
+		if (android_image_separate(hdr, NULL, (void *)comp_addr, hdr))
+			return -1;
+	} else {
+		if (android_image_separate_v3(hdr, NULL, (void *)comp_addr, hdr))
+			return -1;
+	}
 
 	*load_addr = comp_addr;
 	android_image_set_decomp((void *)comp_addr, comp);
@@ -631,54 +746,45 @@ long android_image_load(struct blk_desc *dev_desc,
 			unsigned long load_address,
 			unsigned long max_size) {
 	struct andr_img_hdr *hdr;
-	u32 blksz = dev_desc->blksz;
-	u32 pszcnt, hdrcnt, kercnt;
 	int comp, ret;
+	int blk_off;
 
 	if (max_size < part_info->blksz)
 		return -1;
 
-	/*
-	 * read Android image header and leave enough space for page_size align
-	 * and kernel image header(1 block maybe enough).
-	 *
-	 * ANDROID_ROCKCHIP_LEGACY_PAGE_SIZE is defined by rockchip legacy
-	 * mkboot tool(SDK version < 8.1) and larger than Google defined.
-	 *
-	 * To compatible this, we malloc enough buffer but only read android
-	 * header and kernel image(1 block) from storage(ignore page size).
-	 */
-	kercnt = 1;
-	hdrcnt = DIV_ROUND_UP(sizeof(*hdr), blksz);
-	pszcnt = DIV_ROUND_UP(ANDROID_ROCKCHIP_LEGACY_PAGE_SIZE, blksz);
-
-	hdr = memalign(ARCH_DMA_MINALIGN, (hdrcnt + pszcnt + kercnt) * blksz);
+	hdr = populate_andr_img_hdr(dev_desc, (disk_partition_t *)part_info);
 	if (!hdr) {
-		printf("No memory\n");
+		printf("No valid android hdr\n");
 		return -1;
 	}
 
-	if (blk_dread(dev_desc, part_info->start, hdrcnt, hdr) != hdrcnt) {
-		printf("Failed to read image header\n");
-		goto fail;
-	}
-
-	if (android_image_check_header(hdr) != 0) {
-		printf("** Invalid Android Image header **\n");
-		goto fail;
-	}
-
 	/*
-	 * Update and skip pszcnt(hdr is included) according to hdr->page_size,
-	 * reading kernel image for compress validation.
+	 * create the layout:
+	 *
+	 * |<- page_size ->|1-blk |
+	 * |-----|---------|------|-----|
+	 * | hdr |   ...   |   kernel   |
+	 * |-----|----- ---|------------|
+	 *
+	 * Alloc page_size and 1 more blk for reading kernel image to
+	 * get it's compression type, then fill the android hdr what
+	 * we have populated before.
+	 *
+	 * Why? see: android_image_get_kernel_addr().
 	 */
-	pszcnt = DIV_ROUND_UP(hdr->page_size, blksz);
-	if (blk_dread(dev_desc, part_info->start + pszcnt, kercnt,
-		      (void *)((ulong)hdr + hdr->page_size)) != kercnt) {
-		printf("Failed to read kernel header\n");
-		goto fail;
+	blk_off = BLK_CNT(hdr->page_size, dev_desc->blksz);
+	hdr = (struct andr_img_hdr *)
+			realloc(hdr, (blk_off + 1) * dev_desc->blksz);
+	if (!hdr)
+		return -1;
+
+	if (blk_dread(dev_desc, part_info->start + blk_off, 1,
+		      (char *)hdr + hdr->page_size) != 1) {
+		free(hdr);
+		return -1;
 	}
 
+	/* Make kernel start address at load_address */
 	load_address -= hdr->page_size;
 
 	/* Let's load kernel now ! */
@@ -700,6 +806,260 @@ fail:
 	return -1;
 }
 
+static struct andr_img_hdr *
+extract_boot_image_v012_header(struct blk_desc *dev_desc,
+			       const disk_partition_t *boot_img)
+{
+	struct andr_img_hdr *hdr;
+	long blk_cnt, blks_read;
+
+	blk_cnt = BLK_CNT(sizeof(struct andr_img_hdr), dev_desc->blksz);
+	hdr = (struct andr_img_hdr *)malloc(blk_cnt * dev_desc->blksz);
+
+	if (!blk_cnt || !hdr)
+		return NULL;
+
+	blks_read = blk_dread(dev_desc, boot_img->start, blk_cnt, hdr);
+	if (blks_read != blk_cnt) {
+		debug("boot img header blk cnt is %ld and blks read is %ld\n",
+		      blk_cnt, blks_read);
+		return NULL;
+	}
+
+	if (android_image_check_header((void *)hdr)) {
+		printf("boot header magic is invalid.\n");
+		return NULL;
+	}
+
+	if (hdr->page_size < sizeof(*hdr)) {
+		printf("android hdr is over size\n");
+		return NULL;
+	}
+
+	return hdr;
+}
+
+static struct boot_img_hdr_v3 *
+extract_boot_image_v3_header(struct blk_desc *dev_desc,
+			     const disk_partition_t *boot_img)
+{
+	struct boot_img_hdr_v3 *boot_hdr;
+	long blk_cnt, blks_read;
+
+	blk_cnt = BLK_CNT(sizeof(struct boot_img_hdr_v3), dev_desc->blksz);
+	boot_hdr = (struct boot_img_hdr_v3 *)malloc(blk_cnt * dev_desc->blksz);
+
+	if (!blk_cnt || !boot_hdr)
+		return NULL;
+
+	blks_read = blk_dread(dev_desc, boot_img->start, blk_cnt, boot_hdr);
+	if (blks_read != blk_cnt) {
+		debug("boot img header blk cnt is %ld and blks read is %ld\n",
+		      blk_cnt, blks_read);
+		return NULL;
+	}
+
+	if (android_image_check_header((void *)boot_hdr)) {
+		printf("boot header magic is invalid.\n");
+		return NULL;
+	}
+
+	if (boot_hdr->header_version != 3) {
+		printf("boot header is not v3.\n");
+		return NULL;
+	}
+
+	return boot_hdr;
+}
+
+static struct vendor_boot_img_hdr_v3 *
+extract_vendor_boot_image_v3_header(struct blk_desc *dev_desc,
+				    const disk_partition_t *part_vendor_boot)
+{
+	struct vendor_boot_img_hdr_v3 *vboot_hdr;
+	long blk_cnt, blks_read;
+
+	blk_cnt = BLK_CNT(sizeof(struct vendor_boot_img_hdr_v3),
+				part_vendor_boot->blksz);
+	vboot_hdr = (struct vendor_boot_img_hdr_v3 *)
+				malloc(blk_cnt * part_vendor_boot->blksz);
+
+	if (!blk_cnt || !vboot_hdr)
+		return NULL;
+
+	blks_read = blk_dread(dev_desc, part_vendor_boot->start,
+			      blk_cnt, vboot_hdr);
+	if (blks_read != blk_cnt) {
+		debug("vboot img header blk cnt is %ld and blks read is %ld\n",
+		      blk_cnt, blks_read);
+		return NULL;
+	}
+
+	if (strncmp(VENDOR_BOOT_MAGIC, (void *)vboot_hdr->magic,
+		    VENDOR_BOOT_MAGIC_SIZE)) {
+		printf("vendor boot header is invalid.\n");
+		return NULL;
+	}
+
+	if (vboot_hdr->header_version != 3) {
+		printf("vendor boot header is not v3.\n");
+		return NULL;
+	}
+
+	return vboot_hdr;
+}
+
+static int populate_boot_info(const struct boot_img_hdr_v3 *boot_hdr,
+			      const struct vendor_boot_img_hdr_v3 *vendor_hdr,
+			      struct andr_img_hdr *hdr)
+{
+	memset(hdr->magic, 0, ANDR_BOOT_MAGIC_SIZE);
+	memcpy(hdr->magic, boot_hdr->magic, ANDR_BOOT_MAGIC_SIZE);
+
+	hdr->kernel_size = boot_hdr->kernel_size;
+	/* don't use vendor_hdr->kernel_addr, we prefer "hdr + hdr->page_size" */
+	hdr->kernel_addr = ANDROID_IMAGE_DEFAULT_KERNEL_ADDR;
+	/* generic ramdisk: immediately following the vendor ramdisk */
+	hdr->ramdisk_size = boot_hdr->ramdisk_size +
+				vendor_hdr->vendor_ramdisk_size;
+	/* actually, useless */
+	hdr->ramdisk_addr = vendor_hdr->ramdisk_addr +
+				vendor_hdr->vendor_ramdisk_size;
+	/* removed in v3 */
+	hdr->second_size = 0;
+	hdr->second_addr = 0;
+
+	hdr->tags_addr = vendor_hdr->tags_addr;
+
+	/* fixed in v3 */
+	hdr->page_size = 4096;
+	hdr->header_version = boot_hdr->header_version;
+	hdr->os_version = boot_hdr->os_version;
+
+	memset(hdr->name, 0, ANDR_BOOT_NAME_SIZE);
+	strncpy(hdr->name, (const char *)vendor_hdr->name, ANDR_BOOT_NAME_SIZE);
+
+	/* removed in v3 */
+	memset(hdr->cmdline, 0, ANDR_BOOT_ARGS_SIZE);
+	memset(hdr->id, 0, 32);
+	memset(hdr->extra_cmdline, 0, ANDR_BOOT_EXTRA_ARGS_SIZE);
+	hdr->recovery_dtbo_size = 0;
+	hdr->recovery_dtbo_offset = 0;
+
+	hdr->header_size = boot_hdr->header_size;
+	hdr->dtb_size = vendor_hdr->dtb_size;
+	hdr->dtb_addr = vendor_hdr->dtb_addr;
+
+	/* boot_img_hdr_v3 fields */
+	hdr->vendor_ramdisk_size = vendor_hdr->vendor_ramdisk_size;
+	hdr->vendor_page_size = vendor_hdr->page_size;
+	hdr->vendor_header_version = vendor_hdr->header_version;
+	hdr->vendor_header_size = vendor_hdr->header_size;
+
+	hdr->total_cmdline = calloc(1, TOTAL_BOOT_ARGS_SIZE);
+	if (!hdr->total_cmdline)
+		return -ENOMEM;
+	strncpy(hdr->total_cmdline, (const char *)boot_hdr->cmdline,
+		sizeof(boot_hdr->cmdline));
+	strncat(hdr->total_cmdline, " ", 1);
+	strncat(hdr->total_cmdline, (const char *)vendor_hdr->cmdline,
+		sizeof(vendor_hdr->cmdline));
+
+	if (hdr->page_size < sizeof(*hdr)) {
+		printf("android hdr is over size\n");
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+/*
+ * The possible cases of boot.img + recovery.img:
+ *
+ * [N]: 0, 1, 2
+ * [M]: 0, 1, 2, 3
+ *
+ * |--------------------|---------------------|
+ * |   boot.img         |    recovery.img     |
+ * |--------------------|---------------------|
+ * | boot_img_hdr_v[N]  |  boot_img_hdr_v[N]  | <= if A/B is not required
+ * |--------------------|---------------------|
+ * | boot_img_hdr_v3    |  boot_img_hdr_v2    | <= if A/B is not required
+ * |------------------------------------------|
+ * | boot_img_hdr_v[M], no recovery.img       | <= if A/B is required
+ * |------------------------------------------|
+ */
+struct andr_img_hdr *populate_andr_img_hdr(struct blk_desc *dev_desc,
+					   disk_partition_t *part_boot)
+{
+	disk_partition_t part_vendor_boot;
+	struct vendor_boot_img_hdr_v3 *vboot_hdr;
+	struct boot_img_hdr_v3 *boot_hdr;
+	struct andr_img_hdr *andr_hdr;
+	int header_version;
+
+	if (!dev_desc || !part_boot)
+		return NULL;
+
+	andr_hdr = (struct andr_img_hdr *)malloc(1 * dev_desc->blksz);
+	if (!andr_hdr)
+		return NULL;
+
+	if (blk_dread(dev_desc, part_boot->start, 1, andr_hdr) != 1) {
+		free(andr_hdr);
+		return NULL;
+	}
+
+	if (android_image_check_header(andr_hdr)) {
+		free(andr_hdr);
+		return NULL;
+	}
+
+	header_version = andr_hdr->header_version;
+	free(andr_hdr);
+
+	if (header_version < 3) {
+		return extract_boot_image_v012_header(dev_desc, part_boot);
+	} else {
+		if (part_get_info_by_name(dev_desc,
+					  ANDROID_PARTITION_VENDOR_BOOT,
+					  &part_vendor_boot) < 0) {
+			printf("No vendor boot partition\n");
+			return NULL;
+		}
+		boot_hdr = extract_boot_image_v3_header(dev_desc, part_boot);
+		vboot_hdr = extract_vendor_boot_image_v3_header(dev_desc,
+							&part_vendor_boot);
+		if (!boot_hdr || !vboot_hdr)
+			goto image_load_exit;
+
+		andr_hdr = (struct andr_img_hdr *)
+				malloc(sizeof(struct andr_img_hdr));
+		if (!andr_hdr) {
+			printf("No memory for andr hdr\n");
+			goto image_load_exit;
+		}
+
+		if (populate_boot_info(boot_hdr, vboot_hdr, andr_hdr)) {
+			printf("populate boot info failed\n");
+			goto image_load_exit;
+		}
+
+		free(boot_hdr);
+		free(vboot_hdr);
+
+		return andr_hdr;
+
+image_load_exit:
+		free(boot_hdr);
+		free(vboot_hdr);
+
+		return NULL;
+	}
+
+	return NULL;
+}
+
 #if !defined(CONFIG_SPL_BUILD)
 /**
  * android_print_contents - prints out the contents of the Android format image
@@ -723,7 +1083,7 @@ void android_print_contents(const struct andr_img_hdr *hdr)
 	printf("%skernel size:      %x\n", p, hdr->kernel_size);
 	printf("%skernel address:   %x\n", p, hdr->kernel_addr);
 	printf("%sramdisk size:     %x\n", p, hdr->ramdisk_size);
-	printf("%sramdisk addrress: %x\n", p, hdr->ramdisk_addr);
+	printf("%sramdisk address: %x\n", p, hdr->ramdisk_addr);
 	printf("%ssecond size:      %x\n", p, hdr->second_size);
 	printf("%ssecond address:   %x\n", p, hdr->second_addr);
 	printf("%stags address:     %x\n", p, hdr->tags_addr);
@@ -738,15 +1098,23 @@ void android_print_contents(const struct andr_img_hdr *hdr)
 	printf("%sname:             %s\n", p, hdr->name);
 	printf("%scmdline:          %s\n", p, hdr->cmdline);
 
-	if (header_version >= 1) {
+	if (header_version == 1 || header_version == 2) {
 		printf("%srecovery dtbo size:    %x\n", p, hdr->recovery_dtbo_size);
 		printf("%srecovery dtbo offset:  %llx\n", p, hdr->recovery_dtbo_offset);
 		printf("%sheader size:           %x\n", p, hdr->header_size);
 	}
 
-	if (header_version >= 2) {
+	if (header_version == 2 || header_version == 3) {
 		printf("%sdtb size:              %x\n", p, hdr->dtb_size);
 		printf("%sdtb addr:              %llx\n", p, hdr->dtb_addr);
 	}
+
+	if (header_version == 3) {
+		printf("%scmdline:               %s\n", p, hdr->total_cmdline);
+		printf("%svendor ramdisk size:   %x\n", p, hdr->vendor_ramdisk_size);
+		printf("%svendor page size:      %x\n", p, hdr->vendor_page_size);
+		printf("%svendor header version: %d\n", p, hdr->vendor_header_version);
+		printf("%svendor header size:    %x\n", p, hdr->vendor_header_size);
+	}
 }
 #endif
diff --git a/include/android_image.h b/include/android_image.h
index 0519ece368..a738089631 100644
--- a/include/android_image.h
+++ b/include/android_image.h
@@ -12,10 +12,19 @@
 #define _ANDROID_IMAGE_H_
 
 #define ANDR_BOOT_MAGIC "ANDROID!"
+#define VENDOR_BOOT_MAGIC "VNDRBOOT"
 #define ANDR_BOOT_MAGIC_SIZE 8
+#define VENDOR_BOOT_MAGIC_SIZE 8
 #define ANDR_BOOT_NAME_SIZE 16
+#define VENDOR_BOOT_NAME_SIZE 16
 #define ANDR_BOOT_ARGS_SIZE 512
 #define ANDR_BOOT_EXTRA_ARGS_SIZE 1024
+#define VENDOR_BOOT_ARGS_SIZE 2048
+#define ANDR_BOOT_IMG_PAGE_SIZE 4096
+#define ANDR_BOOT_IMG_HDR_SIZE (ANDR_BOOT_IMG_PAGE_SIZE)
+#define TOTAL_BOOT_ARGS_SIZE (ANDR_BOOT_ARGS_SIZE + ANDR_BOOT_EXTRA_ARGS_SIZE + \
+                              VENDOR_BOOT_ARGS_SIZE + 1)
+#define VENDOR_BOOT_HDR_SIZE	2112
 
 /*
  * It is expected that callers would explicitly specify which version of the
@@ -60,14 +69,78 @@ struct andr_img_hdr {
      * binary compatibility with older versions of mkbootimg. */
     char extra_cmdline[ANDR_BOOT_EXTRA_ARGS_SIZE];
 
-    /* Fields in boot_img_hdr_v1 and newer. */
+    /* Fields in boot_img_hdr_v1(Android-9) and newer. */
     u32 recovery_dtbo_size;   /* size in bytes for recovery DTBO/ACPIO image */
     u64 recovery_dtbo_offset; /* offset to recovery dtbo/acpio in boot image */
     u32 header_size;
 
-    /* Fields in boot_img_hdr_v2 and newer. */
+    /* Fields in boot_img_hdr_v2(Android-10) and newer. */
     u32 dtb_size; /* size in bytes for DTB image */
     u64 dtb_addr; /* physical load address for DTB image */
+
+    /*
+     * [Rockchip compatibility]
+     *
+     * boot_img_hdr_v3(Android-11) is not compatible with boot_img_hdr_v012,
+     * we have to partly merge fields from boot_img_hdr_v3 and vendor_boot_img_hdr_v3
+     * into this structure to compatible with boot_img_hdr_v012.
+     */
+    u32 vendor_ramdisk_size; /* size in bytes */
+    u32 vendor_page_size;
+    u32 vendor_header_version;
+    u32 vendor_header_size;
+    /*
+     * Don't define 'char total_cmdline[TOTAL_BOOT_ARGS_SIZE]' to avoid
+     * this structrue is over size than page_size.
+     */
+    char *total_cmdline;
+} __attribute__((packed));
+
+struct boot_img_hdr_v3 {
+    /* Must be ANDR_BOOT_MAGIC. */
+    uint8_t magic[ANDR_BOOT_MAGIC_SIZE];
+
+    uint32_t kernel_size; /* size in bytes */
+    uint32_t ramdisk_size; /* size in bytes */
+
+    /* Operating system version and security patch level.
+     * For version "A.B.C" and patch level "Y-M-D":
+     *   (7 bits for each of A, B, C; 7 bits for (Y-2000), 4 bits for M)
+     *   os_version = A[31:25] B[24:18] C[17:11] (Y-2000)[10:4] M[3:0] */
+    uint32_t os_version;
+
+    uint32_t header_size;
+
+    uint32_t reserved[4];
+
+    uint32_t header_version;
+
+    uint8_t cmdline[ANDR_BOOT_ARGS_SIZE + ANDR_BOOT_EXTRA_ARGS_SIZE];
+} __attribute__((packed));
+
+struct vendor_boot_img_hdr_v3 {
+    /* Must be VENDOR_BOOT_MAGIC. */
+    uint8_t magic[VENDOR_BOOT_MAGIC_SIZE];
+
+    /* Version of the vendor boot image header. */
+    uint32_t header_version;
+
+    uint32_t page_size; /* flash page size we assume */
+
+    uint32_t kernel_addr; /* physical load addr */
+    uint32_t ramdisk_addr; /* physical load addr */
+
+    uint32_t vendor_ramdisk_size; /* size in bytes */
+
+    uint8_t cmdline[VENDOR_BOOT_ARGS_SIZE];
+
+    uint32_t tags_addr; /* physical addr for kernel tags (if required) */
+    uint8_t name[VENDOR_BOOT_NAME_SIZE]; /* asciiz product name */
+
+    uint32_t header_size;
+
+    uint32_t dtb_size; /* size in bytes for DTB image */
+    uint64_t dtb_addr; /* physical load address for DTB image */
 } __attribute__((packed));
 
 /* When a boot header is of version 0, the structure of boot image is as
@@ -139,4 +212,50 @@ struct andr_img_hdr {
  *    else: jump to kernel_addr
  */
 
+/* When the boot image header has a version of 3, the structure of the boot
+ * image is as follows:
+ *
+ * +---------------------+
+ * | boot header         | 4096 bytes
+ * +---------------------+
+ * | kernel              | m pages
+ * +---------------------+
+ * | ramdisk             | n pages
+ * +---------------------+
+ *
+ * m = (kernel_size + 4096 - 1) / 4096
+ * n = (ramdisk_size + 4096 - 1) / 4096
+ *
+ * Note that in version 3 of the boot image header, page size is fixed at 4096 bytes.
+ *
+ * The structure of the vendor boot image (introduced with version 3 and
+ * required to be present when a v3 boot image is used) is as follows:
+ *
+ * +---------------------+
+ * | vendor boot header  | o pages
+ * +---------------------+
+ * | vendor ramdisk      | p pages
+ * +---------------------+
+ * | dtb                 | q pages
+ * +---------------------+
+ *
+ * o = (2112 + page_size - 1) / page_size
+ * p = (vendor_ramdisk_size + page_size - 1) / page_size
+ * q = (dtb_size + page_size - 1) / page_size
+ *
+ * 0. all entities in the boot image are 4096-byte aligned in flash, all
+ *    entities in the vendor boot image are page_size (determined by the vendor
+ *    and specified in the vendor boot image header) aligned in flash
+ * 1. kernel, ramdisk, vendor ramdisk, and DTB are required (size != 0)
+ * 2. load the kernel and DTB at the specified physical address (kernel_addr,
+ *    dtb_addr)
+ * 3. load the vendor ramdisk at ramdisk_addr
+ * 4. load the generic ramdisk immediately following the vendor ramdisk in
+ *    memory
+ * 5. set up registers for kernel entry as required by your architecture
+ * 6. if the platform has a second stage bootloader jump to it (must be
+ *    contained outside boot and vendor boot partitions), otherwise
+ *    jump to kernel_addr
+ */
+
 #endif
diff --git a/include/boot_rkimg.h b/include/boot_rkimg.h
index 0ad15f4706..8807aede9a 100644
--- a/include/boot_rkimg.h
+++ b/include/boot_rkimg.h
@@ -54,6 +54,7 @@ struct rockchip_image {
 #define PART_RESOURCE			"resource"
 #define PART_KERNEL			"kernel"
 #define PART_BOOT			"boot"
+#define PART_VENDOR_BOOT		"vendor_boot"
 #define PART_RECOVERY			"recovery"
 #define PART_DTBO			"dtbo"
 #define PART_LOGO			"logo"
diff --git a/include/image.h b/include/image.h
index b38efe46d8..95256925b5 100644
--- a/include/image.h
+++ b/include/image.h
@@ -1365,6 +1365,9 @@ void android_image_set_decomp(struct andr_img_hdr *hdr, int comp);
 int android_image_parse_comp(struct andr_img_hdr *hdr, ulong *load_addr);
 int android_image_memcpy_separate(struct andr_img_hdr *hdr, ulong *load_address);
 
+struct andr_img_hdr *populate_andr_img_hdr(struct blk_desc *dev_desc,
+					   disk_partition_t *part_boot);
+
 /** android_image_load - Load an Android Image from storage.
  *
  * Load an Android Image based on the header size in the storage.

commit 5a4b526e82924184351a09585e31e3c7656cfb54
Author: Liang Chen <cl@rock-chips.com>
Date:   Thu Aug 13 16:36:46 2020 +0800

    configs: rk3399: enable D-cache for SPL
    
    enlarge the CONFIG_SYS_MALLOC_F_LEN for MMU table
    
    Change-Id: I77800cb6dd8a2049d43edee4ebdfcf16c3333f94
    Signed-off-by: Liang Chen <cl@rock-chips.com>

diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
index 0f64993254..4a624c94ed 100644
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -2,7 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_SYS_MALLOC_F_LEN=0x10000
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_RK3399=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
@@ -10,6 +10,7 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_SPL_LOAD_FIT=y
+# CONFIG_SPL_SYS_DCACHE_OFF is not set
 CONFIG_BOOTDELAY=0
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set

commit 93fd134f77e3a4a40374021de60b3d4129456d63
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Sep 17 20:02:22 2020 +0800

    common: malloc simple: enable space exhausted message
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If089f38abf5e205a2b9f00fd2d735751fd7d5201

diff --git a/common/malloc_simple.c b/common/malloc_simple.c
index 611400265b..3c457cd227 100644
--- a/common/malloc_simple.c
+++ b/common/malloc_simple.c
@@ -40,7 +40,7 @@ void *memalign_simple(size_t align, size_t bytes)
 	addr = ALIGN(gd->malloc_base + gd->malloc_ptr, align);
 	new_ptr = addr + bytes - gd->malloc_base;
 	if (new_ptr > gd->malloc_limit) {
-		debug("space exhausted\n");
+		printf("space exhausted\n");
 		return NULL;
 	}
 

commit e091dc9d1385f820de66ec60678ce14cec411e75
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue Aug 25 20:39:45 2020 +0800

    mtd: mtd_blk: Map table length round up to erase size
    
    Change-Id: I5f615d37a572ce0d8ceb8d6d6b76983fc61e316b
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index 47d6376473..8f2f073968 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -59,7 +59,8 @@ int mtd_blk_map_table_init(struct blk_desc *desc,
 		}
 
 		blk_begin = (u32)offset >> mtd->erasesize_shift;
-		blk_cnt = ((u32)((offset & mtd->erasesize_mask) + length) >> mtd->erasesize_shift);
+		blk_cnt = ((u32)((offset & mtd->erasesize_mask) + length + \
+			mtd->erasesize - 1) >> mtd->erasesize_shift);
 		if (blk_begin >= blk_total) {
 			pr_err("map table blk begin[%d] overflow\n", blk_begin);
 			return -EINVAL;

commit 51ceae363da2a5b7b2b1bf04083f82301440e89c
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Aug 25 16:26:59 2020 +0800

    mtd: mtd_blk: support map bad block table in spl
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I48112628812b948e4ab5a34362c8ada12b00471e

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index 64d2822cb0..47d6376473 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -39,11 +39,11 @@ int mtd_blk_map_table_init(struct blk_desc *desc,
 		return -ENODEV;
 
 	if (desc->devnum == BLK_MTD_NAND) {
-#if defined(CONFIG_NAND) && !defined(CONFIG_SPL_BUILD)
+#if defined(CONFIG_NAND)
 		mtd = dev_get_priv(desc->bdev->parent);
 #endif
 	} else if (desc->devnum == BLK_MTD_SPI_NAND) {
-#if defined(CONFIG_MTD_SPI_NAND) && !defined(CONFIG_SPL_BUILD)
+#if defined(CONFIG_MTD_SPI_NAND)
 		mtd = desc->bdev->priv;
 #endif
 	}

commit 2ac88c1bbc5a062944d9d27b5681a6aec850f95f
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed Sep 16 10:55:44 2020 +0800

    rkflash: Check bad block mark in spare 1st and 2nd byte
    
    Change-Id: I60bb761d1f7a015c76939db165c53bf53bd514cf
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/sfc_nand.c b/drivers/rkflash/sfc_nand.c
index 60dbf6d559..ee77b1f225 100644
--- a/drivers/rkflash/sfc_nand.c
+++ b/drivers/rkflash/sfc_nand.c
@@ -742,7 +742,7 @@ u32 sfc_nand_check_bad_block(u8 cs, u32 addr)
 				    (gp_page_buf[data_size / 4] & 0xFF));
 
 	/* Original bad block */
-	if ((gp_page_buf[data_size / 4] & 0xFF) != 0xFF)
+	if ((gp_page_buf[data_size / 4] & 0xFFFF) != 0xFFFF)
 		return true;
 
 	return false;
@@ -790,17 +790,11 @@ int sfc_nand_read_id(u8 *data)
  */
 static int sfc_nand_get_bad_block_list(u16 *table, u32 die)
 {
-	u32 sec_per_page = p_nand_info->sec_per_page;
-	u16 blk;
 	u32 bad_cnt, page;
 	u32 blk_per_die;
-	u32 *pread;
+	u16 blk;
 
 	rkflash_print_info("%s\n", __func__);
-	pread = ftl_malloc(SFC_NAND_PAGE_MAX_SIZE);
-
-	if (!pread)
-		return -1;
 
 	bad_cnt = 0;
 	blk_per_die = p_nand_info->plane_per_die *
@@ -809,17 +803,13 @@ static int sfc_nand_get_bad_block_list(u16 *table, u32 die)
 	for (blk = 0; blk < blk_per_die; blk++) {
 		page = (blk + blk_per_die * die) *
 		       p_nand_info->page_per_blk;
-		sfc_nand_read_page_raw(0, page, (u32 *)pread);
 
-		if (pread[0] != 0xff ||
-		    pread[SFC_NAND_SECTOR_SIZE * sec_per_page] != 0xFF) {
+		if (sfc_nand_check_bad_block(die, page)) {
 			table[bad_cnt++] = blk;
 			rkflash_print_error("die[%d], bad_blk[%d]\n", die, blk);
 		}
 	}
 
-	ftl_free(pread);
-
 	return (int)bad_cnt;
 }
 

commit 03d86fc3c0aa183eb9f49d9b07f71d253aebd3ec
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed Sep 16 12:58:06 2020 +0800

    mtd: spinand: Support FM25S01A
    
    Change-Id: I805cbf0e8bc47cd9bd94fd296dbaf46921490f15
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/Makefile b/drivers/mtd/nand/spi/Makefile
index 3670ca5886..9c670f5dee 100644
--- a/drivers/mtd/nand/spi/Makefile
+++ b/drivers/mtd/nand/spi/Makefile
@@ -1,4 +1,4 @@
 # SPDX-License-Identifier: GPL-2.0
 
-spinand-objs := core.o gigadevice.o macronix.o micron.o toshiba.o winbond.o dosilicon.o esmt.o xtx.o hyf.o
+spinand-objs := core.o gigadevice.o macronix.o micron.o toshiba.o winbond.o dosilicon.o esmt.o xtx.o hyf.o fmsh.o
 obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index d0658d3b91..ca6c54c1af 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -824,6 +824,7 @@ static const struct spinand_manufacturer *spinand_manufacturers[] = {
 	&esmt_spinand_manufacturer,
 	&xtx_spinand_manufacturer,
 	&hyf_spinand_manufacturer,
+	&fmsh_spinand_manufacturer,
 };
 
 static int spinand_manufacturer_detect(struct spinand_device *spinand)
diff --git a/drivers/mtd/nand/spi/fmsh.c b/drivers/mtd/nand/spi/fmsh.c
new file mode 100644
index 0000000000..8dcb9f7847
--- /dev/null
+++ b/drivers/mtd/nand/spi/fmsh.c
@@ -0,0 +1,101 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2020 exceet electronics GmbH
+ *
+ * Authors:
+ *	Frieder Schrempf <frieder.schrempf@exceet.de>
+ *	Boris Brezillon <boris.brezillon@bootlin.com>
+ */
+
+#ifndef __UBOOT__
+#include <linux/device.h>
+#include <linux/kernel.h>
+#endif
+#include <linux/mtd/spinand.h>
+
+#define SPINAND_MFR_FMSH		0xA1
+
+static SPINAND_OP_VARIANTS(read_cache_variants,
+		SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
+
+static SPINAND_OP_VARIANTS(write_cache_variants,
+		SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
+		SPINAND_PROG_LOAD(true, 0, NULL, 0));
+
+static SPINAND_OP_VARIANTS(update_cache_variants,
+		SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
+		SPINAND_PROG_LOAD(false, 0, NULL, 0));
+
+static int fm25s01a_ooblayout_ecc(struct mtd_info *mtd, int section,
+				  struct mtd_oob_region *region)
+{
+	return -ERANGE;
+}
+
+static int fm25s01a_ooblayout_free(struct mtd_info *mtd, int section,
+				   struct mtd_oob_region *region)
+{
+	if (section)
+		return -ERANGE;
+
+	region->offset = 2;
+	region->length = 62;
+
+	return 0;
+}
+
+static const struct mtd_ooblayout_ops fm25s01a_ooblayout = {
+	.ecc = fm25s01a_ooblayout_ecc,
+	.rfree = fm25s01a_ooblayout_free,
+};
+
+static const struct spinand_info fmsh_spinand_table[] = {
+	SPINAND_INFO("FM25S01A", 0xE4,
+		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
+		     NAND_ECCREQ(1, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     0,
+		     SPINAND_ECCINFO(&fm25s01a_ooblayout, NULL)),
+};
+
+/**
+ * fmsh_spinand_detect - initialize device related part in spinand_device
+ * struct if it is a FMSH device.
+ * @spinand: SPI NAND device structure
+ */
+static int fmsh_spinand_detect(struct spinand_device *spinand)
+{
+	u8 *id = spinand->id.data;
+	int ret;
+
+	/*
+	 * FMSH SPI NAND read ID need a dummy byte,
+	 * so the first byte in raw_id is dummy.
+	 */
+	if (id[1] != SPINAND_MFR_FMSH)
+		return 0;
+
+	ret = spinand_match_and_init(spinand, fmsh_spinand_table,
+				     ARRAY_SIZE(fmsh_spinand_table), id[2]);
+	if (ret)
+		return ret;
+
+	return 1;
+}
+
+static const struct spinand_manufacturer_ops fmsh_spinand_manuf_ops = {
+	.detect = fmsh_spinand_detect,
+};
+
+const struct spinand_manufacturer fmsh_spinand_manufacturer = {
+	.id = SPINAND_MFR_FMSH,
+	.name = "FMSH",
+	.ops = &fmsh_spinand_manuf_ops,
+};
diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
index c10249038a..4ef6778249 100644
--- a/include/linux/mtd/spinand.h
+++ b/include/linux/mtd/spinand.h
@@ -210,6 +210,7 @@ extern const struct spinand_manufacturer dosilicon_spinand_manufacturer;
 extern const struct spinand_manufacturer esmt_spinand_manufacturer;
 extern const struct spinand_manufacturer xtx_spinand_manufacturer;
 extern const struct spinand_manufacturer hyf_spinand_manufacturer;
+extern const struct spinand_manufacturer fmsh_spinand_manufacturer;
 
 /**
  * struct spinand_op_variants - SPI NAND operation variants

commit ae33e3114a1400755ff99ce335cbcc36c902008d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Sep 16 12:01:33 2020 +0800

    scripts: rename fit-mkimg.sh to fit.sh
    
    The name style follows other rockchip scripts is better, like:
    
    ./scripts/atf.sh
    ./scripts/loader.sh
    ./scripts/spl.sh
    ./scripts/tos.sh
    ./scripts/uboot.sh
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I249f67d0b4e385a3f05f9c754bc0a9c371b46910

diff --git a/make.sh b/make.sh
index 63bb3c6a6c..6982e711aa 100755
--- a/make.sh
+++ b/make.sh
@@ -98,6 +98,7 @@ PLAT_TRUST_SIZE=
 PLAT_TYPE="RKFW" # default
 
 SRCTREE=`pwd`
+SCRIPT_FIT="${SRCTREE}/scripts/fit.sh"
 SCRIPT_ATF="${SRCTREE}/scripts/atf.sh"
 SCRIPT_TOS="${SRCTREE}/scripts/tos.sh"
 SCRIPT_SPL="${SRCTREE}/scripts/spl.sh"
@@ -229,7 +230,7 @@ function process_args()
 				;;
 			*)
 				#1. FIT scripts args
-				NUM=$(./scripts/fit-mkimg.sh --arg-check $1)
+				NUM=$(${SCRIPT_FIT} --arg-check $1)
 				if  [ ${NUM} -ne 0 ]; then
 					[ ${NUM} -eq 1 ] && ARG_LIST_FIT="${ARG_LIST_FIT} $1"
 					[ ${NUM} -eq 2 ] && ARG_LIST_FIT="${ARG_LIST_FIT} $1 $2"
@@ -478,7 +479,7 @@ function sub_commands()
 			;;
 		fit)
 			# Non-secure
-			./scripts/fit-mkimg.sh --uboot-itb --boot-itb --no-vboot ${ARG_LIST_FIT}
+			${SCRIPT_FIT} --uboot-itb --boot-itb --no-vboot ${ARG_LIST_FIT}
 			exit 0
 			;;
 		uboot)
@@ -718,10 +719,10 @@ function pack_fit_image()
 	# Verified boot=1:  must build both uboot.img and boot.img
 	# Verified boot=0:  build uboot.img
 	if grep -q '^CONFIG_FIT_SIGNATURE=y' .config ; then
-		./scripts/fit-mkimg.sh --uboot-itb --boot-itb ${ARG_LIST_FIT}
+		${SCRIPT_FIT} --uboot-itb --boot-itb ${ARG_LIST_FIT}
 	else
 		rm uboot.img trust*.img -f
-		./scripts/fit-mkimg.sh --uboot-itb --no-vboot --no-rebuild ${ARG_LIST_FIT}
+		${SCRIPT_FIT} --uboot-itb --no-vboot --no-rebuild ${ARG_LIST_FIT}
 		echo "pack uboot.img okay! Input: ${INI_TRUST}"
 	fi
 }
diff --git a/scripts/fit-mkimg.sh b/scripts/fit.sh
similarity index 100%
rename from scripts/fit-mkimg.sh
rename to scripts/fit.sh

commit 3a02727cafad3376e9600a6010c8cb9dd5a0f73e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Sep 16 10:05:32 2020 +0800

    scripts: uboot.sh: use lodaerimage from rkbin
    
    Upstream U-Boot can't generate local loaderimage.
    
    Change-Id: Ic5748003cdbd4df2cd8c558acf4f6a02d7307ab0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/scripts/uboot.sh b/scripts/uboot.sh
index b6804305c3..eb9e6a887d 100755
--- a/scripts/uboot.sh
+++ b/scripts/uboot.sh
@@ -50,6 +50,6 @@ if [ ${BIN_KB} -gt ${MAX_KB} ]; then
 	exit 1
 fi
 
-./tools/loaderimage --pack --uboot u-boot.bin uboot.img ${LOAD_ADDR} ${SIZE}
+../rkbin/tools/loaderimage --pack --uboot u-boot.bin uboot.img ${LOAD_ADDR} ${SIZE}
 echo "pack uboot okay! Input: u-boot.bin"
 echo

commit 45986beb2540aae5e6d50add74fc8a3dc99dbb6f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Sep 16 09:24:47 2020 +0800

    scripts: not allow error for rockchip scripts
    
    Change-Id: Iee56011cda94803802d368f7a8f27590d1091d16
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/scripts/atf.sh b/scripts/atf.sh
index 19b628d38d..86ade17a74 100755
--- a/scripts/atf.sh
+++ b/scripts/atf.sh
@@ -5,6 +5,8 @@
 # SPDX-License-Identifier: GPL-2.0
 #
 
+set -e
+
 if [ $# -eq 0 ]; then
 	echo "ERROR: No args of $0"
 	exit 1
diff --git a/scripts/loader.sh b/scripts/loader.sh
index 6939fdffae..b9b08aec7b 100755
--- a/scripts/loader.sh
+++ b/scripts/loader.sh
@@ -5,6 +5,8 @@
 # SPDX-License-Identifier: GPL-2.0
 #
 
+set -e
+
 if [ $# -eq 0 ]; then
 	echo "ERROR: No args of $0"
 	exit 1
diff --git a/scripts/spl.sh b/scripts/spl.sh
index 511b4ea77d..327e7186ec 100755
--- a/scripts/spl.sh
+++ b/scripts/spl.sh
@@ -5,6 +5,8 @@
 # SPDX-License-Identifier: GPL-2.0
 #
 
+set -e
+
 if [ $# -eq 0 ]; then
 	echo "ERROR: No args of $0"
 	exit 1
diff --git a/scripts/tos.sh b/scripts/tos.sh
index 056529f285..812ac7b180 100755
--- a/scripts/tos.sh
+++ b/scripts/tos.sh
@@ -5,6 +5,8 @@
 # SPDX-License-Identifier: GPL-2.0
 #
 
+set -e
+
 if [ $# -eq 0 ]; then
 	echo "ERROR: No args of $0"
 	exit 1
diff --git a/scripts/uboot.sh b/scripts/uboot.sh
index d2298f3eab..b6804305c3 100755
--- a/scripts/uboot.sh
+++ b/scripts/uboot.sh
@@ -5,6 +5,8 @@
 # SPDX-License-Identifier: GPL-2.0
 #
 
+set -e
+
 if [ $# -eq 0 ]; then
 	echo "ERROR: No args of $0"
 	exit 1

commit a524b379f760a58e03bef2948519320acca7e79a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Sep 16 09:17:13 2020 +0800

    make.sh: support parse CONFIG_SYS_TEXT_BASE for upstream U-Boot
    
    Change-Id: Ic3be7c38d4eb11924ea2a09e6256210dc61009c9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index cf62c0154f..63bb3c6a6c 100755
--- a/make.sh
+++ b/make.sh
@@ -666,6 +666,16 @@ function pack_uboot_image()
 {
 	rm u-boot.img u-boot-dtb.img -f
 	LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" include/autoconf.mk|tr -d '\r'`
+	if [ -z "${LOAD_ADDR}" ]; then
+		# upstream U-Boot
+		LOAD_ADDR=`grep CONFIG_SYS_TEXT_BASE include/generated/autoconf.h | awk '{ print $3 }' | tr -d '\r'`
+	fi
+
+	if [ -z "${LOAD_ADDR}" ]; then
+		echo "ERROR: No CONFIG_SYS_TEXT_BASE for u-boot";
+		exit 1
+	fi
+
 	${SCRIPT_UBOOT} --load ${LOAD_ADDR} ${PLAT_UBOOT_SIZE}
 }
 

commit e50bd742696e52df62dc7dc843f7363e9a76bc2a
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Wed Sep 16 11:01:58 2020 +0800

    rockchip: dts: rv1126: correct build errror
    
    this patch fixed "rockchip: dts: rv1126: SFC add pinctrl"
    build error log:
       Error: arch/arm/dts/rv1126-pinctrl.dtsi:291.3-4 syntax error
       FATAL ERROR: Unable to parse input tree
    
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
    Change-Id: I4dde5b49fc2b56701b3326bca4978529286455c3

diff --git a/arch/arm/dts/rv1126-pinctrl.dtsi b/arch/arm/dts/rv1126-pinctrl.dtsi
index 25e3ae7f71..67f7c742b8 100644
--- a/arch/arm/dts/rv1126-pinctrl.dtsi
+++ b/arch/arm/dts/rv1126-pinctrl.dtsi
@@ -288,7 +288,6 @@
 				/* fspi_d3 */
 				<1 RK_PA2 3 &pcfg_pull_up>;
 		};
-		/omit-if-no-ref/
 		fspi_cs1: fspi-cs1 {
 			rockchip,pins =
 				/* fspi_cs1n */

commit 0ee21b67f5a94ac28085d9df0f7b3a788283621f
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Sep 15 14:07:28 2020 +0800

    include: image: fix compile error
    
    error message: include/image.h:1015:1: error: unknown type
    name 'bool'; did you mean '_Bool'?
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I786c04be6f389ad42685b934eb13426ea9a9e5a4

diff --git a/include/image.h b/include/image.h
index 295d160380..b38efe46d8 100644
--- a/include/image.h
+++ b/include/image.h
@@ -17,6 +17,7 @@
 #define __IMAGE_H__
 
 #include "compiler.h"
+#include <stdbool.h>
 #include <asm/byteorder.h>
 
 /* Define this to avoid #ifdefs later on */

commit f28847a81d8cb55307c813dd872f8695049d19ad
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue Sep 15 10:35:00 2020 +0800

    rkflash: Simplify SPI Nand flash table
    
    1.Simplify SPI Nand flash table
    2.Support new SPI Nand devices
    3.Format coding styles
    
    Change-Id: Ie7beae2de5b2165ce7f727aa6eab18d726d0dedc
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/sfc_nand.c b/drivers/rkflash/sfc_nand.c
index d9f9b1c106..60dbf6d559 100644
--- a/drivers/rkflash/sfc_nand.c
+++ b/drivers/rkflash/sfc_nand.c
@@ -14,83 +14,114 @@
 #include "sfc.h"
 #include "sfc_nand.h"
 
+static u32 sfc_nand_get_ecc_status0(void);
+static u32 sfc_nand_get_ecc_status1(void);
+static u32 sfc_nand_get_ecc_status2(void);
+static u32 sfc_nand_get_ecc_status3(void);
+static u32 sfc_nand_get_ecc_status4(void);
+static u32 sfc_nand_get_ecc_status5(void);
+static u32 sfc_nand_get_ecc_status6(void);
+
 static struct nand_info spi_nand_tbl[] = {
 	/* TC58CVG0S0HxAIx */
-	{0x98C2, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x02, 0xD8, 0x00, 18, 8, 0xFF, 0xFF, {4, 8, 0xff, 0xff}, NULL},
+	{ 0x98C2, 4, 0x40, 1, 1024, 0x00, 18, 0x8, 0, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
 	/* TC58CVG1S0HxAIx */
-	{0x98CB, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x02, 0xD8, 0x00, 19, 8, 0xFF, 0xFF, {4, 8, 0xff, 0xff}, NULL},
+	{ 0x98CB, 4, 0x40, 2, 1024, 0x00, 19, 0x8, 0, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
+	/* TC58CVG2S0HRAIJ */
+	{ 0x98ED, 8, 0x40, 1, 2048, 0x0C, 20, 0x8, 0, { 0x04, 0x0C, 0x08, 0x10 }, &sfc_nand_get_ecc_status0 },
+	/* TC58CVG1S3HRAIJ */
+	{ 0x98EB, 4, 0x40, 1, 2048, 0x0C, 19, 0x8, 0, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
+	/* TC58CVG0S3HRAIJ */
+	{ 0x98E2, 4, 0x40, 1, 1024, 0x0C, 18, 0x8, 0, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
+
 	/* MX35LF1GE4AB */
-	{0xC212, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 4, 0xB0, 0, {4, 8, 0xff, 0xff}, &sfc_nand_ecc_status_sp1},
+	{ 0xC212, 4, 0x40, 1, 1024, 0x0C, 18, 0x4, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
 	/* MX35LF2GE4AB */
-	{0xC222, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 4, 0xB0, 0, {4, 8, 0xff, 0xff}, &sfc_nand_ecc_status_sp1},
-	/* GD5F1GQ4UAYIG */
-	{0xC8F1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 8, 0xB0, 0, {4, 8, 0xff, 0xff}, NULL},
+	{ 0xC222, 4, 0x40, 2, 1024, 0x0C, 19, 0x4, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
+	/* MX35LF2GE4AD */
+	{ 0xC226, 4, 0x40, 1, 2048, 0x0C, 19, 0x8, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
+	/* MX35LF4GE4AD */
+	{ 0xC237, 8, 0x40, 1, 2048, 0x0C, 19, 0x8, 1, { 0x04, 0x08, 0x14, 0x18 }, &sfc_nand_get_ecc_status0 },
 	/* MT29F1G01ZAC */
-	{0x2C12, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x00, 18, 1, 0xB0, 0, {4, 8, 0xff, 0xff}, &sfc_nand_ecc_status_sp1},
-	/* GD5F2GQ40BY2GR */
-	{0xC8D2, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 8, 0xB0, 0, {4, 8, 0xff, 0xff}, &sfc_nand_ecc_status_sp3},
+	{ 0x2C12, 4, 0x40, 1, 1024, 0x00, 18, 0x1, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
+
+	/* GD5F1GQ4UAYIG */
+	{ 0xC8F1, 4, 0x40, 1, 1024, 0x0C, 18, 0x8, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
 	/* GD5F1GQ4RB9IGR */
-	{0xC8D1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 8, 0xB0, 0, {4, 8, 0xff, 0xff}, &sfc_nand_ecc_status_sp3},
-	/* IS37SML01G1 */
-	{0xC821, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x00, 18, 1, 0xFF, 0xFF, {8, 12, 0xff, 0xff}, &sfc_nand_ecc_status_sp1},
+	{ 0xC8D1, 4, 0x40, 1, 1024, 0x0C, 18, 0x8, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status3 },
+	/* GD5F2GQ40BY2GR */
+	{ 0xC8D2, 4, 0x40, 2, 1024, 0x0C, 19, 0x8, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status3 },
+	/* GD5F1GQ5UEYIG */
+	{ 0xC851, 4, 0x40, 1, 1024, 0x4C, 18, 0x4, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status2 },
+	/* GD5F2GQ5UEYIG */
+	{ 0xC852, 4, 0x40, 1, 2048, 0x4C, 19, 0x4, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status2 },
+	/* GD5F1GQ4R */
+	{ 0xC8C1, 4, 0x40, 1, 1024, 0x0C, 18, 0x8, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status3 },
+
 	/* W25N01GV */
-	{0xEFAA, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xFF, 0xFF, {4, 20, 36, 0xff}, &sfc_nand_ecc_status_sp1},
+	{ 0xEFAA, 4, 0x40, 1, 1024, 0x4C, 18, 0x1, 0, { 0x04, 0x14, 0x24, 0xFF }, &sfc_nand_get_ecc_status1 },
+	/* W25N01GW */
+	{ 0xEFBA, 4, 0x40, 1, 1024, 0x4C, 18, 0x1, 0, { 0x04, 0x14, 0x24, 0xFF }, &sfc_nand_get_ecc_status1 },
+
 	/* HYF2GQ4UAACAE */
-	{0xC952, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 14, 0xB0, 0, {4, 36, 0xff, 0xff}, NULL},
+	{ 0xC952, 4, 0x40, 1, 2048, 0x4C, 19, 0xE, 1, { 0x04, 0x24, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
+	/* HYF1GQ4UDACAE */
+	{ 0xC921, 4, 0x40, 1, 1024, 0x4C, 18, 0x4, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
+	/* HYF1GQ4UPACAE */
+	{ 0xC9A1, 4, 0x40, 1, 1024, 0x4C, 18, 0x1, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
 	/* HYF2GQ4UDACAE */
-	{0xC922, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 4, 0xB0, 0, {4, 20, 0xff, 0xff}, NULL},
+	{ 0xC922, 4, 0x40, 1, 2048, 0x4C, 19, 0x4, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
 	/* HYF2GQ4UHCCAE */
-	{0xC95A, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 14, 0xB0, 0, {4, 36, 0xff, 0xff}, NULL},
-	/* HYF1GQ4UDACAE */
-	{0xC921, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 4, 0xB0, 0, {4, 20, 0xff, 0xff}, NULL},
-	/* F50L1G41LB */
-	{0xC801, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xFF, 0xFF, {20, 36, 0xff, 0xff}, &sfc_nand_ecc_status_sp1},
-	/* XT26G02A */
-	{0x0BE2, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 1, 0xB0, 0x0, {8, 12, 0xff, 0xff}, &sfc_nand_ecc_status_sp4},
-	/* XT26G01A */
-	{0x0BE1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xB0, 0x0, {8, 12, 0xff, 0xff}, &sfc_nand_ecc_status_sp4},
+	{ 0xC95A, 4, 0x40, 1, 2048, 0x4C, 19, 0xE, 1, { 0x04, 0x24, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
+	/* HYF4GQ4UAACBE */
+	{ 0xC9D4, 8, 0x40, 1, 2048, 0x4C, 20, 0x4, 1, { 0x20, 0x40, 0x24, 0x44 }, &sfc_nand_get_ecc_status0 },
+
 	/* FS35ND01G-S1 */
-	{0xCDB1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 4, 0xB0, 0x0, {16, 20, 0xff, 0xff}, &sfc_nand_ecc_status_sp5},
+	{ 0xCDB1, 4, 0x40, 1, 1024, 0x0C, 18, 0x4, 1, { 0x10, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status5 },
 	/* FS35ND02G-S2 */
-	{0xCDA2, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x03, 0x02, 0xD8, 0x00, 19, 4, 0xFF, 0xFF, {16, 20, 0xff, 0xff}, &sfc_nand_ecc_status_sp5},
-	/* DS35Q1GA-1B */
-	{0xE571, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 4, 0xB0, 0x0, {4, 20, 0xff, 0xff}, &sfc_nand_ecc_status_sp1},
-	/* DS35Q2GA-1B */
-	{0xE572, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 4, 0xB0, 0x0, {4, 20, 0xff, 0xff}, &sfc_nand_ecc_status_sp1},
-	/* EM73C044SNC-G */
-	{0xD522, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 8, 0xB0, 0x0, {4, 20, 0xff, 0xff}, NULL},
-	/* EM73D044SNB-G */
-	{0xD520, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 8, 0xB0, 0x0, {4, 20, 0xff, 0xff}, NULL},
-	/* ATO25D1GA */
-	{0x9B12, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x40, 18, 1, 0xB0, 0x0, {20, 36, 0xff, 0xff}, &sfc_nand_ecc_status_sp1},
-	/* XT26G02B */
-	{0x0BF2, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 1, 0xB0, 0x0, {8, 12, 0xff, 0xff}, &sfc_nand_ecc_status_sp5},
-	/* XT26G01B */
-	{0x0BF1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xB0, 0x0, {8, 12, 0xff, 0xff}, &sfc_nand_ecc_status_sp4},
-	/* HYF4GQ4UAACBE */
-	{0xC9D4, 8, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 20, 4, 0xB0, 0, {32, 64, 36, 68}, NULL},
-	/* FM25S01 */
-	{0xA1A1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xB0, 0, {0, 4, 0xff, 0xff}, &sfc_nand_ecc_status_sp1},
-	/* HYF1GQ4UPACAE */
-	{0xC9A1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 4, 0xB0, 0, {4, 20, 0xff, 0xff}, &sfc_nand_ecc_status_sp1},
-	/* EM73E044SNA-G */
-	{0xD503, 8, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 20, 8, 0xB0, 0, {4, 40, 8, 44}, NULL},
-	/* GD5F2GQ5UEYIG */
-	{0xC852, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 4, 0xB0, 0, {4, 20, 0xff, 0xff}, &sfc_nand_ecc_status_sp2},
-	/* GD5F1GQ4R */
-	{0xC8C1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 8, 0xB0, 0,  {4, 8, 0xff, 0xff}, &sfc_nand_ecc_status_sp3},
-	/* TC58CVG2S0HRAIJ */
-	{0x98ED, 8, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 20, 8, 0xFF, 0xFF, {4, 12, 8, 16}, NULL},
-	/* TC58CVG1S3HRAIJ */
-	{0x98EB, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 8, 0xFF, 0xFF, {4, 8, 0xff, 0xff}, NULL},
-	/* TC58CVG0S3HRAIJ */
-	{0x98E2, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 8, 0xFF, 0xFF, {4, 8, 0xff, 0xff}, NULL},
-	/* XT26G04A */
-	{0x0BE3, 4, 128, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 20, 1, 0xB0, 0x0, {8, 12, 0xff, 0xff}, &sfc_nand_ecc_status_sp4},
+	{ 0xCDA2, 4, 0x40, 1, 2048, 0x00, 19, 0x4, 0, { 0x10, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status5 },
 	/* FS35ND01G-S1Y2 */
-	{0xCDEA, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 4, 0xFF, 0xFF, {4, 8, 12, 16}, &sfc_nand_ecc_status_sp1},
+	{ 0xCDEA, 4, 0x40, 1, 1024, 0x4C, 18, 0x4, 0, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
 	/* FS35ND02G-S3Y2 */
-	{0xCDEB, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 4, 0xFF, 0xFF, {4, 8, 12, 16}, &sfc_nand_ecc_status_sp1},
+	{ 0xCDEB, 4, 0x40, 1, 2048, 0x4C, 19, 0x4, 0, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
+	/* FS35ND04G-S2Y2 1*4096 */
+	{ 0xCDEC, 4, 0x40, 2, 2048, 0x4C, 20, 0x4, 0, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
+
+	/* DS35Q1GA-IB */
+	{ 0xE571, 4, 0x40, 1, 1024, 0x0C, 18, 0x4, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
+	/* DS35Q2GA-IB */
+	{ 0xE572, 4, 0x40, 2, 1024, 0x0C, 19, 0x4, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
+	/* DS35M1GA-1B */
+	{ 0xE521, 4, 0x40, 1, 1024, 0x0C, 18, 0x4, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
+
+	/* EM73C044VCC-H */
+	{ 0xD522, 4, 0x40, 1, 1024, 0x0C, 18, 0x8, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
+	/* EM73D044VCE-H */
+	{ 0xD520, 4, 0x40, 1, 2048, 0x0C, 19, 0x8, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
+	/* EM73E044SNA-G */
+	{ 0xD503, 8, 0x40, 1, 2048, 0x4C, 20, 0x8, 1, { 0x04, 0x28, 0x08, 0x2C }, &sfc_nand_get_ecc_status0 },
+
+	/* XT26G02A */
+	{ 0x0BE2, 4, 0x40, 1, 2048, 0x4C, 19, 0x1, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status4 },
+	/* XT26G01A */
+	{ 0x0BE1, 4, 0x40, 1, 1024, 0x4C, 18, 0x1, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status4 },
+	/* XT26G04A */
+	{ 0x0BE3, 4, 0x80, 1, 2048, 0x4C, 20, 0x1, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status4 },
+	/* XT26G01B */
+	{ 0x0BF1, 4, 0x40, 1, 1024, 0x4C, 18, 0x1, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status4 },
+	/* XT26G02B */
+	{ 0x0BF2, 4, 0x40, 1, 2048, 0x4C, 19, 0x1, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status5 },
+	/* XT26G02E */
+	{ 0x2C24, 4, 0x40, 1, 2048, 0x4C, 19, 0x1, 1, { 0x20, 0x24, 0xFF, 0xFF }, &sfc_nand_get_ecc_status6 },
+
+	/* IS37SML01G1 */
+	{ 0xC821, 4, 0x40, 1, 1024, 0x00, 18, 0x1, 0, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
+	/* F50L1G41LB */
+	{ 0xC801, 4, 0x40, 1, 1024, 0x4C, 18, 0x1, 0, { 0x14, 0x24, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
+	/* ATO25D1GA */
+	{ 0x9B12, 4, 0x40, 1, 1024, 0x40, 18, 0x1, 1, { 0x14, 0x24, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
+	/* FM25S01 */
+	{ 0xA1A1, 4, 0x40, 1, 1024, 0x4C, 18, 0x1, 1, { 0x00, 0x04, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
 };
 
 static struct nand_info *p_nand_info;
@@ -106,6 +137,7 @@ static struct nand_info *sfc_nand_get_info(u8 *nand_id)
 		if (spi_nand_tbl[i].id == id)
 			return &spi_nand_tbl[i];
 	}
+
 	return NULL;
 }
 
@@ -127,16 +159,17 @@ static int sfc_nand_rw_preset(void)
 {
 	int ret;
 	struct rk_sfc_op op;
-	u8 status = 0xFF;
 
 	op.sfcmd.d32 = 0;
-	op.sfcmd.b.cmd = 0;
-	op.sfcmd.b.rw = SFC_WRITE;
+	op.sfcmd.b.cmd = 0xff;
+	op.sfcmd.b.cs = 2;
 
 	op.sfctrl.d32 = 0;
 	op.sfctrl.b.datalines = 2;
+	op.sfctrl.b.cmdlines = 2;
+	op.sfctrl.b.addrlines = 2;
 
-	ret = sfc_request(&op, 0, &status, 1);
+	ret = sfc_request(&op, 0, NULL, 0);
 	return ret;
 }
 
@@ -155,8 +188,10 @@ static int sfc_nand_read_feature(u8 addr, u8 *data)
 	*data = 0;
 
 	ret = sfc_request(&op, addr, data, 1);
+
 	if (ret != SFC_OK)
 		return ret;
+
 	return SFC_OK;
 }
 
@@ -176,8 +211,10 @@ static int sfc_nand_write_feature(u32 addr, u8 status)
 	op.sfctrl.b.addrbits = 8;
 
 	ret = sfc_request(&op, addr, &status, 1);
+
 	if (ret != SFC_OK)
 		return ret;
+
 	return ret;
 }
 
@@ -188,28 +225,34 @@ static int sfc_nand_wait_busy(u8 *data, int timeout)
 	u8 status;
 
 	*data = 0;
+
 	for (i = 0; i < timeout; i++) {
 		ret = sfc_nand_read_feature(0xC0, &status);
+
 		if (ret != SFC_OK)
 			return ret;
+
 		*data = status;
+
 		if (!(status & (1 << 0)))
 			return SFC_OK;
+
 		sfc_delay(1);
 	}
-	return -1;
+
+	return SFC_NAND_WAIT_TIME_OUT;
 }
 
 /*
  * ecc default:
  * ecc bits: 0xC0[4,5]
- * 0x00, No bit errors were detected
- * 0x01, Bit errors were detected and corrected.
- * 0x10, Multiple bit errors were detected and not corrected.
- * 0x11, Bits errors were detected and corrected, bit error count
+ * 0b00, No bit errors were detected
+ * 0b01, Bit errors were detected and corrected.
+ * 0b10, Multiple bit errors were detected and not corrected.
+ * 0b11, Bits errors were detected and corrected, bit error count
  *	exceed the bit flip detection threshold
  */
-static u32 sfc_nand_ecc_status(void)
+static u32 sfc_nand_get_ecc_status0(void)
 {
 	u32 ret;
 	u32 i;
@@ -219,10 +262,13 @@ static u32 sfc_nand_ecc_status(void)
 
 	for (i = 0; i < timeout; i++) {
 		ret = sfc_nand_read_feature(0xC0, &status);
+
 		if (ret != SFC_OK)
 			return SFC_NAND_ECC_ERROR;
+
 		if (!(status & (1 << 0)))
 			break;
+
 		sfc_delay(1);
 	}
 
@@ -241,13 +287,13 @@ static u32 sfc_nand_ecc_status(void)
 /*
  * ecc spectial type1:
  * ecc bits: 0xC0[4,5]
- * 0x00, No bit errors were detected;
- * 0x01, Bits errors were detected and corrected, bit error count
+ * 0b00, No bit errors were detected;
+ * 0b01, Bits errors were detected and corrected, bit error count
  *	may reach the bit flip detection threshold;
- * 0x10, Multiple bit errors were detected and not corrected;
- * 0x11, Reserved.
+ * 0b10, Multiple bit errors were detected and not corrected;
+ * 0b11, Reserved.
  */
-u32 sfc_nand_ecc_status_sp1(void)
+static u32 sfc_nand_get_ecc_status1(void)
 {
 	u32 ret;
 	u32 i;
@@ -257,10 +303,13 @@ u32 sfc_nand_ecc_status_sp1(void)
 
 	for (i = 0; i < timeout; i++) {
 		ret = sfc_nand_read_feature(0xC0, &status);
+
 		if (ret != SFC_OK)
 			return SFC_NAND_ECC_ERROR;
+
 		if (!(status & (1 << 0)))
 			break;
+
 		sfc_delay(1);
 	}
 
@@ -279,14 +328,14 @@ u32 sfc_nand_ecc_status_sp1(void)
 /*
  * ecc spectial type2:
  * ecc bits: 0xC0[4,5] 0xF0[4,5]
- * [0x0000, 0x0011], No bit errors were detected;
- * [0x0100, 0x0111], Bit errors were detected and corrected. Not
+ * [0b0000, 0b0011], No bit errors were detected;
+ * [0b0100, 0b0111], Bit errors were detected and corrected. Not
  *	reach Flipping Bits;
- * [0x1000, 0x1011], Multiple bit errors were detected and
+ * [0b1000, 0b1011], Multiple bit errors were detected and
  *	not corrected.
- * [0x1100, 0x1111], reserved.
+ * [0b1100, 0b1111], reserved.
  */
-u32 sfc_nand_ecc_status_sp2(void)
+static u32 sfc_nand_get_ecc_status2(void)
 {
 	u32 ret;
 	u32 i;
@@ -296,18 +345,24 @@ u32 sfc_nand_ecc_status_sp2(void)
 
 	for (i = 0; i < timeout; i++) {
 		ret = sfc_nand_read_feature(0xC0, &status);
+
 		if (ret != SFC_OK)
 			return SFC_NAND_ECC_ERROR;
+
 		ret = sfc_nand_read_feature(0xF0, &status1);
+
 		if (ret != SFC_OK)
 			return SFC_NAND_ECC_ERROR;
+
 		if (!(status & (1 << 0)))
 			break;
+
 		sfc_delay(1);
 	}
 
 	ecc = (status >> 4) & 0x03;
 	ecc = (ecc << 2) | ((status1 >> 4) & 0x03);
+
 	if (ecc < 7)
 		ret = SFC_NAND_ECC_OK;
 	else if (ecc == 7)
@@ -321,15 +376,15 @@ u32 sfc_nand_ecc_status_sp2(void)
 /*
  * ecc spectial type3:
  * ecc bits: 0xC0[4,5] 0xF0[4,5]
- * [0x0000, 0x0011], No bit errors were detected;
- * [0x0100, 0x0111], Bit errors were detected and corrected. Not
+ * [0b0000, 0b0011], No bit errors were detected;
+ * [0b0100, 0b0111], Bit errors were detected and corrected. Not
  *	reach Flipping Bits;
- * [0x1000, 0x1011], Multiple bit errors were detected and
+ * [0b1000, 0b1011], Multiple bit errors were detected and
  *	not corrected.
- * [0x1100, 0x1111], Bit error count equals the bit flip
+ * [0b1100, 0b1111], Bit error count equals the bit flip
  *	detectio nthreshold
  */
-u32 sfc_nand_ecc_status_sp3(void)
+static u32 sfc_nand_get_ecc_status3(void)
 {
 	u32 ret;
 	u32 i;
@@ -339,18 +394,24 @@ u32 sfc_nand_ecc_status_sp3(void)
 
 	for (i = 0; i < timeout; i++) {
 		ret = sfc_nand_read_feature(0xC0, &status);
+
 		if (ret != SFC_OK)
 			return SFC_NAND_ECC_ERROR;
+
 		ret = sfc_nand_read_feature(0xF0, &status1);
+
 		if (ret != SFC_OK)
 			return SFC_NAND_ECC_ERROR;
+
 		if (!(status & (1 << 0)))
 			break;
+
 		sfc_delay(1);
 	}
 
 	ecc = (status >> 4) & 0x03;
 	ecc = (ecc << 2) | ((status1 >> 4) & 0x03);
+
 	if (ecc < 7)
 		ret = SFC_NAND_ECC_OK;
 	else if (ecc == 7 || ecc >= 12)
@@ -364,16 +425,16 @@ u32 sfc_nand_ecc_status_sp3(void)
 /*
  * ecc spectial type4:
  * ecc bits: 0xC0[2,5]
- * [0x0000], No bit errors were detected;
- * [0x0001, 0x0111], Bit errors were detected and corrected. Not
+ * [0b0000], No bit errors were detected;
+ * [0b0001, 0b0111], Bit errors were detected and corrected. Not
  *	reach Flipping Bits;
- * [0x1000], Multiple bit errors were detected and
+ * [0b1000], Multiple bit errors were detected and
  *	not corrected.
- * [0x1100], Bit error count equals the bit flip
+ * [0b1100], Bit error count equals the bit flip
  *	detectionthreshold
  * else, reserved
  */
-u32 sfc_nand_ecc_status_sp4(void)
+static u32 sfc_nand_get_ecc_status4(void)
 {
 	u32 ret;
 	u32 i;
@@ -383,14 +444,18 @@ u32 sfc_nand_ecc_status_sp4(void)
 
 	for (i = 0; i < timeout; i++) {
 		ret = sfc_nand_read_feature(0xC0, &status);
+
 		if (ret != SFC_OK)
 			return SFC_NAND_ECC_ERROR;
+
 		if (!(status & (1 << 0)))
 			break;
+
 		sfc_delay(1);
 	}
 
 	ecc = (status >> 2) & 0x0f;
+
 	if (ecc < 7)
 		ret = SFC_NAND_ECC_OK;
 	else if (ecc == 7 || ecc == 12)
@@ -404,16 +469,16 @@ u32 sfc_nand_ecc_status_sp4(void)
 /*
  * ecc spectial type5:
  * ecc bits: 0xC0[4,6]
- * [0x0], No bit errors were detected;
- * [0x001, 0x011], Bit errors were detected and corrected. Not
+ * [0b000], No bit errors were detected;
+ * [0b001, 0b011], Bit errors were detected and corrected. Not
  *	reach Flipping Bits;
- * [0x100], Bit error count equals the bit flip
+ * [0b100], Bit error count equals the bit flip
  *	detectionthreshold
- * [0x101, 0x110], Reserved;
- * [0x111], Multiple bit errors were detected and
+ * [0b101, 0b110], Reserved;
+ * [0b111], Multiple bit errors were detected and
  *	not corrected.
  */
-u32 sfc_nand_ecc_status_sp5(void)
+static u32 sfc_nand_get_ecc_status5(void)
 {
 	u32 ret;
 	u32 i;
@@ -423,14 +488,18 @@ u32 sfc_nand_ecc_status_sp5(void)
 
 	for (i = 0; i < timeout; i++) {
 		ret = sfc_nand_read_feature(0xC0, &status);
+
 		if (ret != SFC_OK)
 			return SFC_NAND_ECC_ERROR;
+
 		if (!(status & (1 << 0)))
 			break;
+
 		sfc_delay(1);
 	}
 
 	ecc = (status >> 4) & 0x07;
+
 	if (ecc < 4)
 		ret = SFC_NAND_ECC_OK;
 	else if (ecc == 4)
@@ -441,6 +510,52 @@ u32 sfc_nand_ecc_status_sp5(void)
 	return ret;
 }
 
+/*
+ * ecc spectial type6:
+ * ecc bits: 0xC0[4,6]
+ * [0b000], No bit errors were detected;
+ * [0b001], 1-3 Bit errors were detected and corrected. Not
+ *	reach Flipping Bits;
+ * [0b010], Multiple bit errors were detected and
+ *	not corrected.
+ * [0b011], 4-6 Bit errors were detected and corrected. Not
+ *	reach Flipping Bits;
+ * [0b101], Bit error count equals the bit flip
+ *	detectionthreshold
+ * others, Reserved.
+ */
+static u32 sfc_nand_get_ecc_status6(void)
+{
+	u32 ret;
+	u32 i;
+	u8 ecc;
+	u8 status;
+	u32 timeout = 1000 * 1000;
+
+	for (i = 0; i < timeout; i++) {
+		ret = sfc_nand_read_feature(0xC0, &status);
+
+		if (ret != SFC_OK)
+			return SFC_NAND_ECC_ERROR;
+
+		if (!(status & (1 << 0)))
+			break;
+
+		sfc_delay(1);
+	}
+
+	ecc = (status >> 4) & 0x07;
+
+	if (ecc == 0 || ecc == 1 || ecc == 3)
+		ret = SFC_NAND_ECC_OK;
+	else if (ecc == 5)
+		ret = SFC_NAND_ECC_REFRESH;
+	else
+		ret = (u32)SFC_NAND_ECC_ERROR;
+
+	return ret;
+}
+
 u32 sfc_nand_erase_block(u8 cs, u32 addr)
 {
 	int ret;
@@ -449,7 +564,7 @@ u32 sfc_nand_erase_block(u8 cs, u32 addr)
 
 	rkflash_print_dio("%s %x\n", __func__, addr);
 	op.sfcmd.d32 = 0;
-	op.sfcmd.b.cmd = p_nand_info->block_erase_cmd;
+	op.sfcmd.b.cmd = 0xd8;
 	op.sfcmd.b.addrbits = SFC_ADDR_24BITS;
 	op.sfcmd.b.rw = SFC_WRITE;
 
@@ -457,16 +572,19 @@ u32 sfc_nand_erase_block(u8 cs, u32 addr)
 
 	sfc_nand_write_en();
 	ret = sfc_request(&op, addr, NULL, 0);
+
 	if (ret != SFC_OK)
 		return ret;
+
 	ret = sfc_nand_wait_busy(&status, 1000 * 1000);
+
 	if (status & (1 << 2))
 		return SFC_NAND_PROG_ERASE_ERROR;
 
 	return ret;
 }
 
-static u32 sfc_nand_prog_page_raw(u8 cs, u32 addr, u32 *p_page_buf)
+u32 sfc_nand_prog_page_raw(u8 cs, u32 addr, u32 *p_page_buf)
 {
 	int ret;
 	u32 plane;
@@ -476,6 +594,7 @@ static u32 sfc_nand_prog_page_raw(u8 cs, u32 addr, u32 *p_page_buf)
 
 	rkflash_print_dio("%s %x %x\n", __func__, addr, p_page_buf[0]);
 	sfc_nand_write_en();
+
 	if (sfc_nand_dev.prog_lines == DATA_LINES_X4 &&
 	    p_nand_info->feature & FEA_SOFT_QOP_BIT &&
 	    sfc_get_version() < SFC_VER_3)
@@ -493,15 +612,18 @@ static u32 sfc_nand_prog_page_raw(u8 cs, u32 addr, u32 *p_page_buf)
 	sfc_request(&op, plane, p_page_buf, page_size);
 
 	op.sfcmd.d32 = 0;
-	op.sfcmd.b.cmd = p_nand_info->page_prog_cmd;
+	op.sfcmd.b.cmd = 0x10;
 	op.sfcmd.b.addrbits = SFC_ADDR_24BITS;
 	op.sfcmd.b.rw = SFC_WRITE;
 
 	op.sfctrl.d32 = 0;
 	ret = sfc_request(&op, addr, p_page_buf, 0);
+
 	if (ret != SFC_OK)
 		return ret;
+
 	ret = sfc_nand_wait_busy(&status, 1000 * 1000);
+
 	if (status & (1 << 3))
 		return SFC_NAND_PROG_ERASE_ERROR;
 
@@ -519,16 +641,18 @@ u32 sfc_nand_prog_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
 	memset(&gp_page_buf[data_size / 4], 0xff, sec_per_page * 16);
 	gp_page_buf[(data_size + meta->off0) / 4] = p_spare[0];
 	gp_page_buf[(data_size + meta->off1) / 4] = p_spare[1];
+
 	if (sec_per_page == 8) {
 		gp_page_buf[(data_size + meta->off2) / 4] = p_spare[2];
 		gp_page_buf[(data_size + meta->off3) / 4] = p_spare[3];
 	}
+
 	ret = sfc_nand_prog_page_raw(cs, addr, gp_page_buf);
 
 	return ret;
 }
 
-static u32 sfc_nand_read_page_raw(u8 cs, u32 addr, u32 *p_page_buf)
+u32 sfc_nand_read_page_raw(u8 cs, u32 addr, u32 *p_page_buf)
 {
 	int ret;
 	u32 plane;
@@ -538,23 +662,21 @@ static u32 sfc_nand_read_page_raw(u8 cs, u32 addr, u32 *p_page_buf)
 	u8 status;
 
 	op.sfcmd.d32 = 0;
-	op.sfcmd.b.cmd = p_nand_info->page_read_cmd;
+	op.sfcmd.b.cmd = 0x13;
 	op.sfcmd.b.rw = SFC_WRITE;
 	op.sfcmd.b.addrbits = SFC_ADDR_24BITS;
 
 	op.sfctrl.d32 = 0;
 
 	sfc_request(&op, addr, p_page_buf, 0);
+
 	if (sfc_nand_dev.read_lines == DATA_LINES_X4 &&
 	    p_nand_info->feature & FEA_SOFT_QOP_BIT &&
 	    sfc_get_version() < SFC_VER_3)
 		sfc_nand_rw_preset();
 
 	sfc_nand_wait_busy(&status, 1000 * 1000);
-	if (p_nand_info->ecc_status)
-		ecc_result = p_nand_info->ecc_status();
-	else
-		ecc_result = sfc_nand_ecc_status();
+	ecc_result = p_nand_info->ecc_status();
 
 	op.sfcmd.d32 = 0;
 	op.sfcmd.b.cmd = sfc_nand_dev.page_read_cmd;
@@ -568,7 +690,7 @@ static u32 sfc_nand_read_page_raw(u8 cs, u32 addr, u32 *p_page_buf)
 	rkflash_print_dio("%s %x %x\n", __func__, addr, p_page_buf[0]);
 
 	if (ret != SFC_OK)
-		return SFC_NAND_ECC_ERROR;
+		return SFC_NAND_HW_ERROR;
 
 	return ecc_result;
 }
@@ -584,15 +706,21 @@ u32 sfc_nand_read_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
 	memcpy(p_data, gp_page_buf, data_size);
 	p_spare[0] = gp_page_buf[(data_size + meta->off0) / 4];
 	p_spare[1] = gp_page_buf[(data_size + meta->off1) / 4];
+
 	if (p_nand_info->sec_per_page == 8) {
 		p_spare[2] = gp_page_buf[(data_size + meta->off2) / 4];
 		p_spare[3] = gp_page_buf[(data_size + meta->off3) / 4];
 	}
 
+	if (ret == SFC_NAND_HW_ERROR)
+		ret = SFC_NAND_ECC_ERROR;
+
 	if (ret != SFC_NAND_ECC_OK) {
 		rkflash_print_error("%s[0x%x], ret=0x%x\n", __func__, addr, ret);
+
 		if (p_data)
 			rkflash_print_hex("data:", p_data, 4, 8);
+
 		if (p_spare)
 			rkflash_print_hex("spare:", p_spare, 4, 2);
 	}
@@ -606,8 +734,13 @@ u32 sfc_nand_check_bad_block(u8 cs, u32 addr)
 	u32 data_size = p_nand_info->sec_per_page * SFC_NAND_SECTOR_SIZE;
 
 	ret = sfc_nand_read_page_raw(cs, addr, gp_page_buf);
+
+	/* unify with mtd framework */
 	if (ret == SFC_NAND_ECC_ERROR)
-		return true;
+		rkflash_print_error("%s page= %x ret= %x data0= %x, spare0= %x\n",
+				    __func__, addr, ret, gp_page_buf[0],
+				    (gp_page_buf[data_size / 4] & 0xFF));
+
 	/* Original bad block */
 	if ((gp_page_buf[data_size / 4] & 0xFF) != 0xFF)
 		return true;
@@ -621,10 +754,13 @@ u32 sfc_nand_mark_bad_block(u8 cs, u32 addr)
 	u32 data_size = p_nand_info->sec_per_page * SFC_NAND_SECTOR_SIZE;
 
 	ret = sfc_nand_read_page_raw(cs, addr, gp_page_buf);
+
 	if (ret)
 		return SFC_NAND_HW_ERROR;
+
 	gp_page_buf[data_size / 4] = 0x0;
 	ret = sfc_nand_prog_page_raw(cs, addr, gp_page_buf);
+
 	if (ret)
 		return SFC_NAND_HW_ERROR;
 
@@ -654,37 +790,35 @@ int sfc_nand_read_id(u8 *data)
  */
 static int sfc_nand_get_bad_block_list(u16 *table, u32 die)
 {
+	u32 sec_per_page = p_nand_info->sec_per_page;
 	u16 blk;
 	u32 bad_cnt, page;
 	u32 blk_per_die;
 	u32 *pread;
-	u32 *pspare_read;
 
 	rkflash_print_info("%s\n", __func__);
 	pread = ftl_malloc(SFC_NAND_PAGE_MAX_SIZE);
-	pspare_read = ftl_malloc(8);
-	if (!pread || !pspare_read) {
-		kfree(pread);
-		kfree(pspare_read);
+
+	if (!pread)
 		return -1;
-	}
 
 	bad_cnt = 0;
 	blk_per_die = p_nand_info->plane_per_die *
-			p_nand_info->blk_per_plane;
+		      p_nand_info->blk_per_plane;
+
 	for (blk = 0; blk < blk_per_die; blk++) {
 		page = (blk + blk_per_die * die) *
-			p_nand_info->page_per_blk;
-		sfc_nand_read_page(0, page, pread, pspare_read);
+		       p_nand_info->page_per_blk;
+		sfc_nand_read_page_raw(0, page, (u32 *)pread);
 
-		if (pread[0] != 0xFFFFFFFF ||
-		    pspare_read[0] != 0xFFFFFFFF) {
+		if (pread[0] != 0xff ||
+		    pread[SFC_NAND_SECTOR_SIZE * sec_per_page] != 0xFF) {
 			table[bad_cnt++] = blk;
 			rkflash_print_error("die[%d], bad_blk[%d]\n", die, blk);
 		}
 	}
+
 	ftl_free(pread);
-	ftl_free(pspare_read);
 
 	return (int)bad_cnt;
 }
@@ -719,22 +853,18 @@ static int sfc_nand_enable_QE(void)
 {
 	int ret = SFC_OK;
 	u8 status;
-	int bit_offset = p_nand_info->QE_bits;
 
-	if (bit_offset == 0xFF)
-		return SFC_OK;
+	ret = sfc_nand_read_feature(0xB0, &status);
 
-	ret = sfc_nand_read_feature(p_nand_info->QE_address, &status);
 	if (ret != SFC_OK)
 		return ret;
 
-	if (status & (1 << bit_offset))   /* is QE bit set */
+	if (status & 1)   /* is QE bit set */
 		return SFC_OK;
 
-	status |= (1 << bit_offset);
-		return sfc_nand_write_feature(p_nand_info->QE_address, status);
+	status |= 1;
 
-	return ret;
+	return sfc_nand_write_feature(0xB0, status);
 }
 
 u32 sfc_nand_init(void)
@@ -744,10 +874,12 @@ u32 sfc_nand_init(void)
 	sfc_nand_read_id(id_byte);
 	rkflash_print_error("sfc_nand id: %x %x %x\n",
 			    id_byte[0], id_byte[1], id_byte[2]);
+
 	if (id_byte[0] == 0xFF || id_byte[0] == 0x00)
 		return (u32)FTL_NO_FLASH;
 
 	p_nand_info = sfc_nand_get_info(id_byte);
+
 	if (!p_nand_info)
 		return (u32)FTL_UNSUPPORTED_FLASH;
 
@@ -761,20 +893,21 @@ u32 sfc_nand_init(void)
 	sfc_nand_write_feature(0xA0, 0);
 	sfc_nand_dev.read_lines = DATA_LINES_X1;
 	sfc_nand_dev.prog_lines = DATA_LINES_X1;
-	sfc_nand_dev.page_read_cmd = p_nand_info->read_cache_cmd_1;
-	sfc_nand_dev.page_prog_cmd = p_nand_info->prog_cache_cmd_1;
+	sfc_nand_dev.page_read_cmd = 0x03;
+	sfc_nand_dev.page_prog_cmd = 0x02;
+
 	if (p_nand_info->feature & FEA_4BIT_READ) {
-		if (sfc_nand_enable_QE() == SFC_OK) {
+		if ((p_nand_info->has_qe_bits && sfc_nand_enable_QE() == SFC_OK) ||
+		    !p_nand_info->has_qe_bits) {
 			sfc_nand_dev.read_lines = DATA_LINES_X4;
-			sfc_nand_dev.page_read_cmd =
-				p_nand_info->read_cache_cmd_4;
+			sfc_nand_dev.page_read_cmd = 0x6b;
 		}
 	}
 
 	if (p_nand_info->feature & FEA_4BIT_PROG &&
 	    sfc_nand_dev.read_lines == DATA_LINES_X4) {
 		sfc_nand_dev.prog_lines = DATA_LINES_X4;
-		sfc_nand_dev.page_prog_cmd = p_nand_info->prog_cache_cmd_4;
+		sfc_nand_dev.page_prog_cmd = 0x32;
 	}
 
 	sfc_nand_read_feature(0xA0, &status);
diff --git a/drivers/rkflash/sfc_nand.h b/drivers/rkflash/sfc_nand.h
index 1cb537ed52..5b3a2516ee 100644
--- a/drivers/rkflash/sfc_nand.h
+++ b/drivers/rkflash/sfc_nand.h
@@ -9,6 +9,7 @@
 
 #include "flash_com.h"
 
+#define SFC_NAND_WAIT_TIME_OUT		3
 #define SFC_NAND_PROG_ERASE_ERROR	2
 #define SFC_NAND_HW_ERROR		1
 #define SFC_NAND_ECC_ERROR		NAND_ERROR
@@ -99,20 +100,11 @@ struct nand_info {
 	u16 plane_per_die;
 	u16 blk_per_plane;
 
-	u8 page_read_cmd;
-	u8 page_prog_cmd;
-	u8 read_cache_cmd_1;
-	u8 prog_cache_cmd_1;
-
-	u8 read_cache_cmd_4;
-	u8 prog_cache_cmd_4;
-	u8 block_erase_cmd;
 	u8 feature;
 
 	u8 density;  /* (1 << density) sectors*/
 	u8 max_ecc_bits;
-	u8 QE_address;
-	u8 QE_bits;
+	u8 has_qe_bits;
 
 	struct nand_mega_area meta;
 	u32 (*ecc_status)(void);
@@ -124,14 +116,11 @@ extern struct nand_ops		g_nand_ops;
 u32 sfc_nand_init(void);
 void sfc_nand_deinit(void);
 int sfc_nand_read_id(u8 *buf);
-u32 sfc_nand_ecc_status_sp1(void);
-u32 sfc_nand_ecc_status_sp2(void);
-u32 sfc_nand_ecc_status_sp3(void);
-u32 sfc_nand_ecc_status_sp4(void);
-u32 sfc_nand_ecc_status_sp5(void);
 u32 sfc_nand_erase_block(u8 cs, u32 addr);
 u32 sfc_nand_prog_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare);
 u32 sfc_nand_read_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare);
+u32 sfc_nand_prog_page_raw(u8 cs, u32 addr, u32 *p_page_buf);
+u32 sfc_nand_read_page_raw(u8 cs, u32 addr, u32 *p_page_buf);
 u32 sfc_nand_check_bad_block(u8 cs, u32 addr);
 u32 sfc_nand_mark_bad_block(u8 cs, u32 addr);
 void sfc_nand_ftl_ops_init(void);

commit 4d72219b9d9ee70f81b2d1213627762ac6d3cd30
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue Sep 15 10:18:14 2020 +0800

    rkflash: Remove SFC reset in initial progress
    
    Only when the host work wrong, run SFC reset.
    
    Change-Id: Ia2c7f30e4e93203250dc378f2704942d99d73c55
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/sfc.c b/drivers/rkflash/sfc.c
index e0d61446a1..c9be08e794 100644
--- a/drivers/rkflash/sfc.c
+++ b/drivers/rkflash/sfc.c
@@ -44,7 +44,6 @@ u32 sfc_get_max_iosize(void)
 int sfc_init(void __iomem *reg_addr)
 {
 	g_sfc_reg = reg_addr;
-	sfc_reset();
 	writel(0, g_sfc_reg + SFC_CTRL);
 	if (sfc_get_version() >= SFC_VER_4)
 		writel(1, g_sfc_reg + SFC_LEN_CTRL);

commit bc966f92a18fd9729a3acb4b4aaba79c637fa686
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Thu Sep 10 18:01:03 2020 +0800

    rockchip: dts: rv1126: SFC add pinctrl
    
    1.SFC add pinctrl;
    2.Adjust fspi_pins property.
    
    Change-Id: Ia89669aeee9a5097c7a74850b478891573493f1d
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/dts/rv1126-pinctrl.dtsi b/arch/arm/dts/rv1126-pinctrl.dtsi
index 4ddc77809a..25e3ae7f71 100644
--- a/arch/arm/dts/rv1126-pinctrl.dtsi
+++ b/arch/arm/dts/rv1126-pinctrl.dtsi
@@ -276,19 +276,23 @@
 		fspi_pins: fspi-pins {
 			rockchip,pins =
 				/* fspi_clk */
-				<1 RK_PA3 3 &pcfg_pull_none>,
+				<1 RK_PA3 3 &pcfg_pull_down>,
 				/* fspi_cs0n */
-				<0 RK_PD4 3 &pcfg_pull_none>,
-				/* fspi_cs1n */
-				<0 RK_PD1 3 &pcfg_pull_none>,
+				<0 RK_PD4 3 &pcfg_pull_up>,
 				/* fspi_d0 */
-				<1 RK_PA0 3 &pcfg_pull_none>,
+				<1 RK_PA0 3 &pcfg_pull_up>,
 				/* fspi_d1 */
-				<1 RK_PA1 3 &pcfg_pull_none>,
+				<1 RK_PA1 3 &pcfg_pull_up>,
 				/* fspi_d2 */
-				<0 RK_PD6 3 &pcfg_pull_none>,
+				<0 RK_PD6 3 &pcfg_pull_up>,
 				/* fspi_d3 */
-				<1 RK_PA2 3 &pcfg_pull_none>;
+				<1 RK_PA2 3 &pcfg_pull_up>;
+		};
+		/omit-if-no-ref/
+		fspi_cs1: fspi-cs1 {
+			rockchip,pins =
+				/* fspi_cs1n */
+				<1 RK_PD1 3 &pcfg_pull_up>;
 		};
 	};
 	i2c0 {
diff --git a/arch/arm/dts/rv1126.dtsi b/arch/arm/dts/rv1126.dtsi
index 6becadf841..abddf7165b 100644
--- a/arch/arm/dts/rv1126.dtsi
+++ b/arch/arm/dts/rv1126.dtsi
@@ -1931,6 +1931,8 @@
 		interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
 		clock-names = "clk_sfc", "hclk_sfc";
+		pinctrl-names = "default";
+		pinctrl-0 = <&flash_pins>;
 		assigned-clocks = <&cru SCLK_SFC>;
 		assigned-clock-rates = <80000000>;
 		power-domains = <&power RV1126_PD_NVM>;

commit b66d41c24052dfc432a3add0918b2ce4bea80eb9
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Sep 14 19:29:48 2020 +0800

    mtd: spinand: Support hyf devices
    
    Support HYF1GQ4UPACAE, HYF1GQ4UDACAE
    
    Change-Id: I9b8022d9320150d587b443cfa4cdc7495267795e
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/Makefile b/drivers/mtd/nand/spi/Makefile
index efe26c6ed0..3670ca5886 100644
--- a/drivers/mtd/nand/spi/Makefile
+++ b/drivers/mtd/nand/spi/Makefile
@@ -1,4 +1,4 @@
 # SPDX-License-Identifier: GPL-2.0
 
-spinand-objs := core.o gigadevice.o macronix.o micron.o toshiba.o winbond.o dosilicon.o esmt.o xtx.o
+spinand-objs := core.o gigadevice.o macronix.o micron.o toshiba.o winbond.o dosilicon.o esmt.o xtx.o hyf.o
 obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index 83033f10a7..d0658d3b91 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -823,6 +823,7 @@ static const struct spinand_manufacturer *spinand_manufacturers[] = {
 	&dosilicon_spinand_manufacturer,
 	&esmt_spinand_manufacturer,
 	&xtx_spinand_manufacturer,
+	&hyf_spinand_manufacturer,
 };
 
 static int spinand_manufacturer_detect(struct spinand_device *spinand)
diff --git a/drivers/mtd/nand/spi/hyf.c b/drivers/mtd/nand/spi/hyf.c
new file mode 100644
index 0000000000..0be351d6e5
--- /dev/null
+++ b/drivers/mtd/nand/spi/hyf.c
@@ -0,0 +1,168 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2020 exceet electronics GmbH
+ *
+ * Authors:
+ *	Frieder Schrempf <frieder.schrempf@exceet.de>
+ *	Boris Brezillon <boris.brezillon@bootlin.com>
+ */
+
+#ifndef __UBOOT__
+#include <linux/device.h>
+#include <linux/kernel.h>
+#endif
+#include <linux/mtd/spinand.h>
+
+#define SPINAND_MFR_HYF		0xC9
+
+static SPINAND_OP_VARIANTS(read_cache_variants,
+		SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
+
+static SPINAND_OP_VARIANTS(write_cache_variants,
+		SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
+		SPINAND_PROG_LOAD(true, 0, NULL, 0));
+
+static SPINAND_OP_VARIANTS(update_cache_variants,
+		SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
+		SPINAND_PROG_LOAD(false, 0, NULL, 0));
+
+static int hyf1gq4upacae_ooblayout_ecc(struct mtd_info *mtd, int section,
+				       struct mtd_oob_region *region)
+{
+	if (section)
+		return -ERANGE;
+
+	region->offset = 64;
+	region->length = 64;
+
+	return 0;
+}
+
+static int hyf1gq4upacae_ooblayout_free(struct mtd_info *mtd, int section,
+					struct mtd_oob_region *region)
+{
+	if (section)
+		return -ERANGE;
+
+	region->offset = 1;
+	region->length = 63;
+
+	return 0;
+}
+
+static const struct mtd_ooblayout_ops hyf1gq4upacae_ooblayout = {
+	.ecc = hyf1gq4upacae_ooblayout_ecc,
+	.rfree = hyf1gq4upacae_ooblayout_free,
+};
+
+static int hyf1gq4udacae_ooblayout_ecc(struct mtd_info *mtd, int section,
+				       struct mtd_oob_region *region)
+{
+	if (section > 3)
+		return -ERANGE;
+
+	region->offset = (16 * section) + 8;
+	region->length = 8;
+
+	return 0;
+}
+
+static int hyf1gq4udacae_ooblayout_free(struct mtd_info *mtd, int section,
+					struct mtd_oob_region *region)
+{
+	if (section > 3)
+		return -ERANGE;
+
+	region->offset = (16 * section) + 4;
+	region->length = 4;
+
+	return 0;
+}
+
+static const struct mtd_ooblayout_ops hyf1gq4udacae_ooblayout = {
+	.ecc = hyf1gq4udacae_ooblayout_ecc,
+	.rfree = hyf1gq4udacae_ooblayout_free,
+};
+
+static int hyf1gq4udacae_ecc_get_status(struct spinand_device *spinand,
+					u8 status)
+{
+	struct nand_device *nand = spinand_to_nand(spinand);
+
+	switch (status & STATUS_ECC_MASK) {
+	case STATUS_ECC_NO_BITFLIPS:
+		return 0;
+
+	case STATUS_ECC_UNCOR_ERROR:
+		return -EBADMSG;
+
+	case STATUS_ECC_HAS_BITFLIPS:
+		return 1;
+
+	default:
+		return nand->eccreq.strength;
+	}
+
+	return -EINVAL;
+}
+
+static const struct spinand_info hyf_spinand_table[] = {
+	SPINAND_INFO("HYF1GQ4UPACAE", 0xA1,
+		     NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
+		     NAND_ECCREQ(1, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&hyf1gq4upacae_ooblayout, NULL)),
+	SPINAND_INFO("HYF1GQ4UDACAE", 0x21,
+		     NAND_MEMORG(1, 2048, 64, 64, 1024, 2, 1, 1),
+		     NAND_ECCREQ(4, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&hyf1gq4udacae_ooblayout,
+				     hyf1gq4udacae_ecc_get_status)),
+};
+
+/**
+ * hyf_spinand_detect - initialize device related part in spinand_device
+ * struct if it is a hyf device.
+ * @spinand: SPI NAND device structure
+ */
+static int hyf_spinand_detect(struct spinand_device *spinand)
+{
+	u8 *id = spinand->id.data;
+	int ret;
+
+	/*
+	 * hyf SPI NAND read ID needs a dummy byte, so the first byte in
+	 * raw_id is garbage.
+	 */
+	if (id[1] != SPINAND_MFR_HYF)
+		return 0;
+
+	ret = spinand_match_and_init(spinand, hyf_spinand_table,
+				     ARRAY_SIZE(hyf_spinand_table),
+				     id[2]);
+	if (ret)
+		return ret;
+
+	return 1;
+}
+
+static const struct spinand_manufacturer_ops hyf_spinand_manuf_ops = {
+	.detect = hyf_spinand_detect,
+};
+
+const struct spinand_manufacturer hyf_spinand_manufacturer = {
+	.id = SPINAND_MFR_HYF,
+	.name = "hyf",
+	.ops = &hyf_spinand_manuf_ops,
+};
diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
index 5206ad60a7..c10249038a 100644
--- a/include/linux/mtd/spinand.h
+++ b/include/linux/mtd/spinand.h
@@ -209,6 +209,7 @@ extern const struct spinand_manufacturer winbond_spinand_manufacturer;
 extern const struct spinand_manufacturer dosilicon_spinand_manufacturer;
 extern const struct spinand_manufacturer esmt_spinand_manufacturer;
 extern const struct spinand_manufacturer xtx_spinand_manufacturer;
+extern const struct spinand_manufacturer hyf_spinand_manufacturer;
 
 /**
  * struct spinand_op_variants - SPI NAND operation variants

commit 958e04de6735fb8a071bc9202eee686689eb1fc9
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Tue Sep 15 14:19:31 2020 +0800

    rockchip: rv1126: tpl: thunder boot use SPL_KERNEL_BOOT
    
    Use CONFIG_SPL_KERNEL_BOOT for thunder boot to stay the same with SPL.
    
    Change-Id: I0d2f0a91a5f628233de1cb848519fd76b692a2af
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index d5ce034258..9df0a690a2 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -714,12 +714,6 @@ config ROCKCHIP_PRELOADER_SERIAL
 	  This enable U-Boot using pre-loader atags serial configure to initialize console.
 	  It denpends on serial aliases to find pre-loader serial number.
 
-config ROCKCHIP_THUNDER_BOOT
-	bool "Rockchip thunder boot"
-	help
-	  This enable rockchip thunder boot. The thunder boot is mainly used for
-	  booting system fastly.
-
 config ROCKCHIP_FIT_IMAGE_PACK
 	bool "Rockchip fit image pack of U-Boot and TEE"
 	depends on ROCKCHIP_FIT_IMAGE
diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
index 0e23971894..b949b41b01 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -2771,7 +2771,7 @@ static void save_fsp_param(struct dram_info *dram, u32 dst_fsp,
 	p_fsp_param->flag = FSP_FLAG;
 }
 
-#ifndef CONFIG_ROCKCHIP_THUNDER_BOOT
+#ifndef CONFIG_SPL_KERNEL_BOOT
 static void copy_fsp_param_to_ddr(void)
 {
 	memcpy((void *)FSP_PARAM_STORE_ADDR, (void *)&fsp_param,
@@ -2966,7 +2966,7 @@ static void ddr_set_rate_for_fsp(struct dram_info *dram,
 	struct ddr2_3_4_lp2_3_info *ddr_info;
 	u32 f0;
 	u32 dramtype = sdram_params->base.dramtype;
-#ifndef CONFIG_ROCKCHIP_THUNDER_BOOT
+#ifndef CONFIG_SPL_KERNEL_BOOT
 	u32 f1, f2, f3;
 #endif
 
@@ -2977,7 +2977,7 @@ static void ddr_set_rate_for_fsp(struct dram_info *dram,
 	f0 = (ddr_info->ddr_freq0_1 >> DDR_FREQ_F0_SHIFT) &
 	     DDR_FREQ_MASK;
 
-#ifndef CONFIG_ROCKCHIP_THUNDER_BOOT
+#ifndef CONFIG_SPL_KERNEL_BOOT
 	memset((void *)FSP_PARAM_STORE_ADDR, 0, sizeof(fsp_param));
 	memset((void *)&fsp_param, 0, sizeof(fsp_param));
 
@@ -2992,7 +2992,7 @@ static void ddr_set_rate_for_fsp(struct dram_info *dram,
 	if (get_wrlvl_val(dram, sdram_params))
 		printascii("get wrlvl value fail\n");
 
-#ifndef CONFIG_ROCKCHIP_THUNDER_BOOT
+#ifndef CONFIG_SPL_KERNEL_BOOT
 	printascii("change to: ");
 	printdec(f1);
 	printascii("MHz\n");
@@ -3010,7 +3010,7 @@ static void ddr_set_rate_for_fsp(struct dram_info *dram,
 	printascii("change to: ");
 	printdec(f0);
 	printascii("MHz(final freq)\n");
-#ifndef CONFIG_ROCKCHIP_THUNDER_BOOT
+#ifndef CONFIG_SPL_KERNEL_BOOT
 	ddr_set_rate(&dram_info, sdram_params, f0, f3, 0, 0, 1);
 #else
 	ddr_set_rate(&dram_info, sdram_params, f0, sdram_params->base.ddr_freq, 1, 1, 1);
@@ -3094,7 +3094,7 @@ int sdram_init(void)
 	print_ddr_info(sdram_params);
 
 	ddr_set_rate_for_fsp(&dram_info, sdram_params);
-#ifndef CONFIG_ROCKCHIP_THUNDER_BOOT
+#ifndef CONFIG_SPL_KERNEL_BOOT
 	copy_fsp_param_to_ddr();
 #endif
 

commit 6ab927d862e724c96dbd7667991afc1393edc9b2
Author: Weiwen Chen <cww@rock-chips.com>
Date:   Mon Sep 14 11:52:54 2020 +0800

    configs: add rv1126-ab.config
    
    It is used for AB system.
    
    Signed-off-by: Weiwen Chen <cww@rock-chips.com>
    Change-Id: I5cc24afe5f737c4172783f00198d96ed536d80e4

diff --git a/configs/rv1126-ab.config b/configs/rv1126-ab.config
new file mode 100644
index 0000000000..64270d4f4d
--- /dev/null
+++ b/configs/rv1126-ab.config
@@ -0,0 +1,11 @@
+CONFIG_ANDROID_AB=y
+CONFIG_AVB_LIBAVB_AB=y
+CONFIG_AVB_LIBAVB_ATX=y
+CONFIG_AVB_LIBAVB_USER=y
+CONFIG_AVB_LIBAVB=y
+# CONFIG_AVB_VBMETA_PUBLIC_KEY_VALIDATE is not set
+CONFIG_BASE_DEFCONFIG="rv1126_defconfig"
+CONFIG_BOOTDELAY=1
+# CONFIG_CMD_ANDROID_AB_SELECT is not set
+CONFIG_RK_AVB_LIBAVB_USER=y
+# CONFIG_ROCKCHIP_PRELOADER_PUB_KEY is not set

commit 34df577a5d8326bb514cf80018e8e5933762328e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 15 11:38:06 2020 +0800

    scripts: fit-repack.sh: fix cp issue
    
    cp: omitting directory ‘out/repack’
    
    Ignore directory.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I4ebca3319b290a7eab9f4b51e9338a0cb3c6c10f

diff --git a/scripts/fit-repack.sh b/scripts/fit-repack.sh
index cea5251deb..044893f6e9 100755
--- a/scripts/fit-repack.sh
+++ b/scripts/fit-repack.sh
@@ -65,7 +65,7 @@ function fit_repack()
 	rm -rf ${OUT}
 	mkdir -p ${OUT}
 	${UNPACK} -f ${IMAGE} -o ${OUT}/
-	cp ${DATA}/* ${OUT}/
+	find ${DATA}/ -maxdepth 1 -type f | xargs cp -t ${OUT}/
 
 	if fdtget -l ${IMAGE} /images/uboot >/dev/null 2>&1 ; then
 		rm -f ${IMAGE}

commit 69b1ad46932338ec03a7fe6acecc3a0c9af2664e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Sep 5 14:53:25 2020 +0800

    common: android: clean up code
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I98dfd54edd813f892c5f2717a694b2424b8ecded

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 2ab9ae27d4..a5169d6ff7 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -846,11 +846,10 @@ __weak int board_select_fdt_index(ulong dt_table_hdr)
 
 static int android_get_dtbo(ulong *fdt_dtbo,
 			    const struct andr_img_hdr *hdr,
-			    int *index, int boot_mode)
+			    int *index, const char *part_dtbo)
 {
 	struct dt_table_header *dt_hdr = NULL;
 	struct blk_desc *dev_desc;
-	const char *part_name;
 	disk_partition_t part_info;
 	u32 blk_offset, blk_cnt;
 	void *buf;
@@ -859,49 +858,34 @@ static int android_get_dtbo(ulong *fdt_dtbo,
 	int e_idx;
 	int ret;
 
-	/* Get partition according to boot mode */
-	if (boot_mode == BOOT_MODE_RECOVERY)
-		part_name = PART_RECOVERY;
-	else
-		part_name = PART_DTBO;
-
 	/* Get partition info */
 	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: dev_desc is NULL!\n", __func__);
+	if (!dev_desc)
 		return -ENODEV;
-	}
 
-	ret = part_get_info_by_name(dev_desc, part_name, &part_info);
+	ret = part_get_info_by_name(dev_desc, part_dtbo, &part_info);
 	if (ret < 0) {
-		printf("%s: failed to get %s part info, ret=%d\n",
-		       __func__, part_name, ret);
+		printf("No %s partition, ret=%d\n", part_dtbo, ret);
 		return ret;
 	}
 
 	/* Check dt table header */
-	if (!strcmp(part_name, PART_RECOVERY))
+	if (!strcmp(part_dtbo, PART_RECOVERY))
 		blk_offset = part_info.start +
 			     (hdr->recovery_dtbo_offset / part_info.blksz);
 	else
 		blk_offset = part_info.start;
 
 	dt_hdr = memalign(ARCH_DMA_MINALIGN, part_info.blksz);
-	if (!dt_hdr) {
-		printf("%s: out of memory for dt header!\n", __func__);
+	if (!dt_hdr)
 		return -ENOMEM;
-	}
 
 	ret = blk_dread(dev_desc, blk_offset, 1, dt_hdr);
-	if (ret != 1) {
-		printf("%s: failed to read dt table header\n",
-		       __func__);
+	if (ret != 1)
 		goto out1;
-	}
 
 	if (!android_dt_check_header((ulong)dt_hdr)) {
-		printf("%s: Error: invalid dt table header: 0x%x\n",
-		       __func__, dt_hdr->magic);
+		printf("DTBO: invalid dt table header: 0x%x\n", dt_hdr->magic);
 		ret = -EINVAL;
 		goto out1;
 	}
@@ -915,17 +899,13 @@ static int android_get_dtbo(ulong *fdt_dtbo,
 	/* Read all DT Image */
 	buf = memalign(ARCH_DMA_MINALIGN, part_info.blksz * blk_cnt);
 	if (!buf) {
-		printf("%s: out of memory for %s part!\n", __func__, part_name);
 		ret = -ENOMEM;
 		goto out1;
 	}
 
 	ret = blk_dread(dev_desc, blk_offset, blk_cnt, buf);
-	if (ret != blk_cnt) {
-		printf("%s: failed to read dtbo, blk_cnt=%d, ret=%d\n",
-		       __func__, blk_cnt, ret);
+	if (ret != blk_cnt)
 		goto out2;
-	}
 
 	e_idx = board_select_fdt_index((ulong)buf);
 	if (e_idx < 0) {
@@ -948,7 +928,7 @@ static int android_get_dtbo(ulong *fdt_dtbo,
 
 	free(dt_hdr);
 	debug("ANDROID: Loading dt entry to 0x%lx size 0x%x idx %d from \"%s\" part\n",
-	      e_addr, e_size, e_idx, part_name);
+	      e_addr, e_size, e_idx, part_dtbo);
 
 	return 0;
 
@@ -964,38 +944,31 @@ int android_fdt_overlay_apply(void *fdt_addr)
 {
 	struct andr_img_hdr *hdr;
 	struct blk_desc *dev_desc;
-	const char *part_name;
+	const char *part_boot;
 	disk_partition_t part_info;
+	char *part_dtbo;
 	char buf[32] = {0};
 	u32 blk_cnt;
 	ulong fdt_dtbo = -1;
-	int boot_mode;
 	int index = -1;
 	int ret;
 
-	boot_mode = rockchip_get_boot_mode();
-#ifdef CONFIG_ANDROID_AB
-	if (boot_mode == BOOT_MODE_RECOVERY)
-		boot_mode = BOOT_MODE_NORMAL;
-#endif
-	if (boot_mode == BOOT_MODE_RECOVERY)
-		part_name = PART_RECOVERY;
-	else
-		part_name = PART_BOOT;
+	if (IS_ENABLED(CONFIG_ANDROID_AB) ||
+	    (rockchip_get_boot_mode() != BOOT_MODE_RECOVERY)) {
+		part_boot = PART_BOOT;
+		part_dtbo = PART_DTBO;
+	} else {
+		part_boot = PART_RECOVERY;
+		part_dtbo = PART_RECOVERY;
+	}
 
-	/* Get partition info */
 	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: dev_desc is NULL!\n", __func__);
+	if (!dev_desc)
 		return -ENODEV;
-	}
 
-	ret = part_get_info_by_name(dev_desc, part_name, &part_info);
-	if (ret < 0) {
-		printf("%s: failed to get %s part info, ret=%d\n",
-		       __func__, part_name, ret);
+	ret = part_get_info_by_name(dev_desc, part_boot, &part_info);
+	if (ret < 0)
 		return ret;
-	}
 
 	blk_cnt = DIV_ROUND_UP(sizeof(*hdr), part_info.blksz);
 	hdr = memalign(ARCH_DMA_MINALIGN, part_info.blksz * blk_cnt);
@@ -1006,7 +979,7 @@ int android_fdt_overlay_apply(void *fdt_addr)
 
 	ret = blk_dread(dev_desc, part_info.start, blk_cnt, hdr);
 	if (ret != blk_cnt) {
-		printf("%s: failed to read %s hdr!\n", __func__, part_name);
+		printf("%s: failed to read %s hdr!\n", __func__, part_boot);
 		goto out;
 	}
 
@@ -1024,7 +997,7 @@ int android_fdt_overlay_apply(void *fdt_addr)
 		goto out;
 	}
 
-	ret = android_get_dtbo(&fdt_dtbo, (void *)hdr, &index, boot_mode);
+	ret = android_get_dtbo(&fdt_dtbo, (void *)hdr, &index, part_dtbo);
 	if (!ret) {
 		phys_size_t fdt_size;
 		/* Must incease size before overlay */
diff --git a/common/image-android.c b/common/image-android.c
index de2fe59ad8..95a9ed074d 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -28,7 +28,7 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 #define ANDROID_IMAGE_DEFAULT_KERNEL_ADDR	0x10008000
-#define ANDROID_ARG_FDT_FILENAME "rk-kernel.dtb"
+#define ANDROID_ARG_FDT_FILENAME		"rk-kernel.dtb"
 #define ANDROID_Q_VER				10
 
 /* Defined by rockchip legacy mkboot tool(SDK version < 8.1) */
@@ -47,15 +47,15 @@ u32 android_bcb_msg_sector_offset(void)
 {
 	/*
 	 * Rockchip platforms defines BCB message at the 16KB offset of
-	 * misc partition while the Google defines it at 0x0 offset.
+	 * misc partition while the Google defines it at 0x00 offset.
 	 *
-	 * From Android-Q, the 0x0 offset is mandary on Google VTS, so that
+	 * From Android-Q, the 0x00 offset is mandary on Google VTS, so that
 	 * this is a compatibility according to android image 'os_version'.
 	 */
 #ifdef CONFIG_RKIMG_BOOTLOADER
-	return (android_image_major_version() >= ANDROID_Q_VER) ? 0x0 : 0x20;
+	return (android_image_major_version() >= ANDROID_Q_VER) ? 0x00 : 0x20;
 #else
-	return 0x0;
+	return 0x00;
 #endif
 }
 
@@ -296,7 +296,7 @@ typedef enum {
 	IMG_MAX,
 } img_t;
 
-static int image_read(img_t img, struct andr_img_hdr *hdr,
+static int image_load(img_t img, struct andr_img_hdr *hdr,
 		      ulong blkstart, void *ram_base,
 		      struct udevice *crypto)
 {
@@ -422,7 +422,7 @@ static int android_image_separate(struct andr_img_hdr *hdr,
 		return -EINVAL;
 	}
 
-	/* set for image_read(IMG_KERNEL, ...) */
+	/* set for image_load(IMG_KERNEL, ...) */
 	env_set_hex("android_addr_r", (ulong)load_address);
 	bstart = part ? part->start : 0;
 
@@ -457,20 +457,20 @@ static int android_image_separate(struct andr_img_hdr *hdr,
 	crypto_sha_init(dev, &ctx);
 
 	/* load, never change order ! */
-	if (image_read(IMG_RK_DTB,  hdr, bstart, ram_base, NULL))
+	if (image_load(IMG_RK_DTB,  hdr, bstart, ram_base, NULL))
 		return -1;
-	if (image_read(IMG_KERNEL,  hdr, bstart, ram_base, dev))
+	if (image_load(IMG_KERNEL,  hdr, bstart, ram_base, dev))
 		return -1;
-	if (image_read(IMG_RAMDISK, hdr, bstart, ram_base, dev))
+	if (image_load(IMG_RAMDISK, hdr, bstart, ram_base, dev))
 		return -1;
-	if (image_read(IMG_SECOND,  hdr, bstart, ram_base, dev))
+	if (image_load(IMG_SECOND,  hdr, bstart, ram_base, dev))
 		return -1;
 	if (hdr->header_version > 0) {
-		if (image_read(IMG_RECOVERY_DTBO, hdr, bstart, ram_base, dev))
+		if (image_load(IMG_RECOVERY_DTBO, hdr, bstart, ram_base, dev))
 			return -1;
 	}
 	if (hdr->header_version > 1) {
-		if (image_read(IMG_DTB, hdr, bstart, ram_base, dev))
+		if (image_load(IMG_DTB, hdr, bstart, ram_base, dev))
 			return -1;
 	}
 
@@ -484,20 +484,20 @@ static int android_image_separate(struct andr_img_hdr *hdr,
 	}
 
 #else /* !(CONFIG_DM_CRYPTO && CONFIG_ANDROID_BOOT_IMAGE_HASH) */
-	if (image_read(IMG_RK_DTB,  hdr, bstart, ram_base, NULL))
+	if (image_load(IMG_RK_DTB,  hdr, bstart, ram_base, NULL))
 		return -1;
-	if (image_read(IMG_KERNEL,  hdr, bstart, ram_base, NULL))
+	if (image_load(IMG_KERNEL,  hdr, bstart, ram_base, NULL))
 		return -1;
-	if (image_read(IMG_RAMDISK, hdr, bstart, ram_base, NULL))
+	if (image_load(IMG_RAMDISK, hdr, bstart, ram_base, NULL))
 		return -1;
-	if (image_read(IMG_SECOND,  hdr, bstart, ram_base, NULL))
+	if (image_load(IMG_SECOND,  hdr, bstart, ram_base, NULL))
 		return -1;
 	if (hdr->header_version > 0) {
-		if (image_read(IMG_RECOVERY_DTBO, hdr, bstart, ram_base, NULL))
+		if (image_load(IMG_RECOVERY_DTBO, hdr, bstart, ram_base, NULL))
 			return -1;
 	}
 	if (hdr->header_version > 1) {
-		if (image_read(IMG_DTB, hdr, bstart, ram_base, NULL))
+		if (image_load(IMG_DTB, hdr, bstart, ram_base, NULL))
 			return -1;
 	}
 #endif
@@ -508,17 +508,12 @@ static int android_image_separate(struct andr_img_hdr *hdr,
 	return 0;
 }
 
-/*
- * 'boot_android' cmd use "kernel_addr_r" as default load address !
- * We update it according to compress type and "kernel_addr_c/r".
- */
-int android_image_parse_comp(struct andr_img_hdr *hdr, ulong *load_addr)
+static ulong android_image_get_comp_addr(struct andr_img_hdr *hdr, int comp)
 {
 	ulong kernel_addr_c;
-	int comp;
+	ulong load_addr = 0;
 
 	kernel_addr_c = env_get_ulong("kernel_addr_c", 16, 0);
-	comp = android_image_parse_kernel_comp(hdr);
 
 #ifdef CONFIG_ARM64
 	/*
@@ -538,7 +533,7 @@ int android_image_parse_comp(struct andr_img_hdr *hdr, ulong *load_addr)
 			env_set_hex("kernel_addr_c", comp_addr);
 		}
 
-		*load_addr = comp_addr - hdr->page_size;
+		load_addr = comp_addr - hdr->page_size;
 	}
 #else
 	/*
@@ -555,22 +550,40 @@ int android_image_parse_comp(struct andr_img_hdr *hdr, ulong *load_addr)
 			/* input load_addr is for Image, nothing to do */
 		} else {
 			/* input load_addr is for lz4/zImage, set default addr for Image */
-			*load_addr = CONFIG_SYS_SDRAM_BASE + 0x8000;
-			env_set_hex("kernel_addr_r", *load_addr);
+			load_addr = CONFIG_SYS_SDRAM_BASE + 0x8000;
+			env_set_hex("kernel_addr_r", load_addr);
 
-			*load_addr -= hdr->page_size;
+			load_addr -= hdr->page_size;
 		}
 	} else {
 		if (kernel_addr_c) {
 			/* input load_addr is for Image, so use another for lz4/zImage */
-			*load_addr = kernel_addr_c - hdr->page_size;
+			load_addr = kernel_addr_c - hdr->page_size;
 		} else {
 			/* input load_addr is for lz4/zImage, nothing to do */
 		}
 	}
 #endif
 
+	return load_addr;
+}
+
+/*
+ * 'boot_android' cmd use "kernel_addr_r" as default load address !
+ * We update it according to compress type and "kernel_addr_c/r".
+ */
+int android_image_parse_comp(struct andr_img_hdr *hdr, ulong *load_addr)
+{
+	ulong new_load_addr;
+	int comp;
+
+	comp = android_image_parse_kernel_comp(hdr);
 	env_set_ulong("os_comp", comp);
+
+	new_load_addr = android_image_get_comp_addr(hdr, comp);
+	if (new_load_addr != 0)
+		*load_addr = new_load_addr;
+
 	return comp;
 }
 

commit f870210e35bd18245cc6f7ae7f76240b6c96f3b7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Sep 7 21:33:42 2020 +0800

    rockchip: resource: add comments
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I45434529a44a5e311af1b693c0af56473c770bf9

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index d301f9b7a2..a8a610e804 100644
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -93,8 +93,8 @@ struct resource_entry {
 	char		name[MAX_FILE_NAME_LEN];
 	char		hash[MAX_HASH_LEN];
 	uint32_t	hash_size;
-	uint32_t	f_offset;
-	uint32_t	f_size;
+	uint32_t	f_offset;	/* Sector offset */
+	uint32_t	f_size;		/* Bytes */
 };
 
 struct resource_file {

commit 247c5a81b3ce004a415b26a55cc621d78a542104
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Sep 14 09:47:58 2020 +0800

     mtd: spinand: Add initial support for the MX35LF4GE4AD
    
    Change-Id: Ib1228650e76dc82bc86fb28472616d0fefb269bf
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/macronix.c b/drivers/mtd/nand/spi/macronix.c
index c1d4913bfc..47fc02fcef 100644
--- a/drivers/mtd/nand/spi/macronix.c
+++ b/drivers/mtd/nand/spi/macronix.c
@@ -121,6 +121,15 @@ static const struct spinand_info macronix_spinand_table[] = {
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
 				     mx35lf1ge4ab_ecc_get_status)),
+	SPINAND_INFO("MX35LF4GE4AD", 0x37,
+		     NAND_MEMORG(1, 4096, 128, 64, 2048, 2, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+				     mx35lf1ge4ab_ecc_get_status)),
 };
 
 static int macronix_spinand_detect(struct spinand_device *spinand)

commit 9848d60c83c44169d68954a63c7dff8d642154ca
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Mon Sep 14 10:48:15 2020 +0800

    dt-bindings: clock: rk3568: Add binding header for rk3568
    
    files origin from kernel.
    
    Change-Id: Iab1de697da1db28ef0d4d10c96c437373363c1bd
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/include/dt-bindings/clock/rk3568-cru.h b/include/dt-bindings/clock/rk3568-cru.h
new file mode 100644
index 0000000000..176e124512
--- /dev/null
+++ b/include/dt-bindings/clock/rk3568-cru.h
@@ -0,0 +1,875 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2020 Rockchip Electronics Co. Ltd.
+ * Author: Elaine Zhang <zhangqing@rock-chips.com>
+ */
+
+#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3568_H
+#define _DT_BINDINGS_CLK_ROCKCHIP_RK3568_H
+
+/* pmucru-clocks indices */
+
+/* pmucru plls */
+#define PLL_PPLL		1
+#define PLL_HPLL		2
+
+/* pmucru clocks */
+#define XIN_OSC0_DIV		4
+#define CLK_RTC_32K		5
+#define CLK_PMU			6
+#define CLK_I2C0		7
+#define CLK_RTC32K_FRAC		8
+#define CLK_UART0_DIV		9
+#define CLK_UART0_FRAC		10
+#define SCLK_UART0		11
+#define DBCLK_GPIO0		12
+#define CLK_PWM0		13
+#define CLK_CAPTURE_PWM0_NDFT	14
+#define CLK_PMUPVTM		15
+#define CLK_CORE_PMUPVTM	16
+#define CLK_REF24M		17
+#define XIN_OSC0_USBPHY0_G	18
+#define CLK_USBPHY0_REF		19
+#define XIN_OSC0_USBPHY1_G	20
+#define CLK_USBPHY1_REF		21
+#define XIN_OSC0_MIPIDSIPHY0_G	22
+#define CLK_MIPIDSIPHY0_REF	23
+#define XIN_OSC0_MIPIDSIPHY1_G	24
+#define CLK_MIPIDSIPHY1_REF	25
+#define CLK_WIFI_DIV		26
+#define CLK_WIFI_OSC0		27
+#define CLK_WIFI		28
+#define CLK_PCIEPHY0_DIV	29
+#define CLK_PCIEPHY0_OSC0	30
+#define CLK_PCIEPHY0_REF	31
+#define CLK_PCIEPHY1_DIV	32
+#define CLK_PCIEPHY1_OSC0	33
+#define CLK_PCIEPHY1_REF	34
+#define CLK_PCIEPHY2_DIV	35
+#define CLK_PCIEPHY2_OSC0	36
+#define CLK_PCIEPHY2_REF	37
+#define CLK_PCIE30PHY_REF_M	38
+#define CLK_PCIE30PHY_REF_N	39
+#define CLK_HDMI_REF		40
+#define XIN_OSC0_EDPPHY_G	41
+#define PCLK_PDPMU		42
+#define PCLK_PMU		43
+#define PCLK_UART0		44
+#define PCLK_I2C0		45
+#define PCLK_GPIO0		46
+#define PCLK_PMUPVTM		47
+#define PCLK_PWM0		48
+
+#define CLKPMU_NR_CLKS		(PCLK_PWM0 + 1)
+
+/* cru-clocks indices */
+
+/* cru plls */
+#define PLL_APLL		1
+#define PLL_DPLL		2
+#define PLL_CPLL		3
+#define PLL_GPLL		4
+#define PLL_VPLL		5
+#define PLL_NPLL		6
+
+/* cru clocks */
+#define ARMCLK			10
+#define USB480M			11
+#define ACLK_CORE_NIU2BUS	18
+#define CLK_CORE_PVTM		19
+#define CLK_CORE_PVTM_CORE	20
+#define CLK_CORE_PVTPLL		21
+#define CLK_GPU_SRC		22
+#define CLK_GPU_PRE_NDFT	23
+#define CLK_GPU_PRE_MUX		24
+#define ACLK_GPU_PRE		25
+#define PCLK_GPU_PRE		26
+#define CLK_GPU			27
+#define CLK_GPU_NP5		28
+#define PCLK_GPU_PVTM		29
+#define CLK_GPU_PVTM		30
+#define CLK_GPU_PVTM_CORE	31
+#define CLK_GPU_PVTPLL		32
+#define CLK_NPU_SRC		33
+#define CLK_NPU_PRE_NDFT	34
+#define CLK_NPU			35
+#define CLK_NPU_NP5		36
+#define HCLK_NPU_PRE		37
+#define PCLK_NPU_PRE		38
+#define ACLK_NPU_PRE		39
+#define ACLK_RKNN		40
+#define HCLK_RKNN		41
+#define PCLK_NPU_PVTM		42
+#define CLK_NPU_PVTM		43
+#define CLK_NPU_PVTM_CORE	44
+#define CLK_NPU_PVTPLL		45
+#define CLK_DDRPHY1X_SRC	46
+#define CLK_DDRPHY1X_HWFFC_SRC	47
+#define CLK_DDR1X		48
+#define CLK_MSCH		49
+#define CLK24_DDRMON		50
+#define ACLK_GIC_AUDIO		51
+#define HCLK_GIC_AUDIO		52
+#define HCLK_SDMMC_BUFFER	53
+#define DCLK_SDMMC_BUFFER	54
+#define ACLK_GIC600		55
+#define ACLK_SPINLOCK		56
+#define HCLK_I2S0_8CH		57
+#define HCLK_I2S1_8CH		58
+#define HCLK_I2S2_2CH		59
+#define HCLK_I2S3_2CH		60
+#define CLK_I2S0_8CH_TX_SRC	61
+#define CLK_I2S0_8CH_TX_FRAC	62
+#define MCLK_I2S0_8CH_TX	63
+#define I2S0_MCLKOUT_TX		64
+#define CLK_I2S0_8CH_RX_SRC	65
+#define CLK_I2S0_8CH_RX_FRAC	66
+#define MCLK_I2S0_8CH_RX	67
+#define I2S0_MCLKOUT_RX		68
+#define CLK_I2S1_8CH_TX_SRC	69
+#define CLK_I2S1_8CH_TX_FRAC	70
+#define MCLK_I2S1_8CH_TX	71
+#define I2S1_MCLKOUT_TX		72
+#define CLK_I2S1_8CH_RX_SRC	73
+#define CLK_I2S1_8CH_RX_FRAC	74
+#define MCLK_I2S1_8CH_RX	75
+#define I2S1_MCLKOUT_RX		76
+#define CLK_I2S2_2CH_SRC	77
+#define CLK_I2S2_2CH_FRAC	78
+#define MCLK_I2S2_2CH		79
+#define I2S2_MCLKOUT		80
+#define CLK_I2S3_2CH_TX_SRC	81
+#define CLK_I2S3_2CH_TX_FRAC	82
+#define MCLK_I2S3_2CH_TX	83
+#define I2S3_MCLKOUT_TX		84
+#define CLK_I2S3_2CH_RX_SRC	85
+#define CLK_I2S3_2CH_RX_FRAC	86
+#define MCLK_I2S3_2CH_RX	87
+#define I2S3_MCLKOUT_RX		88
+#define HCLK_PDM		89
+#define MCLK_PDM		90
+#define HCLK_VAD		91
+#define HCLK_SPDIF_8CH		92
+#define MCLK_SPDIF_8CH_SRC	93
+#define MCLK_SPDIF_8CH_FRAC	94
+#define MCLK_SPDIF_8CH		95
+#define HCLK_AUDPWM		96
+#define SCLK_AUDPWM_SRC		97
+#define SCLK_AUDPWM_FRAC	98
+#define SCLK_AUDPWM		99
+#define HCLK_ACDCDIG_I2C	100
+#define CLK_ACDCDIG_I2C		101
+#define CLK_ACDCDIG_DAC		102
+#define CLK_ACDCDIG_ADC		103
+#define ACLK_SECURE_FLASH	104
+#define HCLK_SECURE_FLASH	105
+#define ACLK_CRYPTO_NS		106
+#define HCLK_CRYPTO_NS		107
+#define CLK_CRYPTO_NS_CORE	108
+#define CLK_CRYPTO_NS_PKA	109
+#define CLK_CRYPTO_NS_RNG	110
+#define HCLK_TRNG_NS		111
+#define CLK_TRNG_NS		112
+#define PCLK_OTPC_NS		113
+#define CLK_OTPC_NS_SBPI	114
+#define CLK_OTPC_NS_USR		115
+#define HCLK_NANDC		116
+#define NCLK_NANDC		117
+#define HCLK_SFC		118
+#define HCLK_SFC_XIP		119
+#define SCLK_SFC		120
+#define ACLK_EMMC		121
+#define HCLK_EMMC		122
+#define BCLK_EMMC		123
+#define CCLK_EMMC		124
+#define TCLK_EMMC		125
+#define ACLK_PIPE		126
+#define PCLK_PIPE		127
+#define PCLK_PIPE_GRF		128
+#define ACLK_PCIE20_MST		129
+#define ACLK_PCIE20_SLV		130
+#define ACLK_PCIE20_DBI		131
+#define PCLK_PCIE20		132
+#define CLK_PCIE20_AUX_NDFT	133
+#define CLK_PCIE20_AUX_DFT	134
+#define CLK_PCIE20_PIPE_DFT	135
+#define ACLK_PCIE30X1_MST	136
+#define ACLK_PCIE30X1_SLV	137
+#define ACLK_PCIE30X1_DBI	138
+#define PCLK_PCIE30X1		139
+#define CLK_PCIE30X1_AUX_NDFT	140
+#define CLK_PCIE30X1_AUX_DFT	141
+#define CLK_PCIE30X1_PIPE_DFT	142
+#define ACLK_PCIE30X2_MST	143
+#define ACLK_PCIE30X2_SLV	144
+#define ACLK_PCIE30X2_DBI	145
+#define PCLK_PCIE30X2		146
+#define CLK_PCIE30X2_AUX_NDFT	147
+#define CLK_PCIE30X2_AUX_DFT	148
+#define CLK_PCIE30X2_PIPE_DFT	149
+#define ACLK_SATA0		150
+#define CLK_SATA0_PMALIVE	151
+#define CLK_SATA0_RXOOB		152
+#define CLK_SATA0_PIPE_NDFT	153
+#define CLK_SATA0_PIPE_DFT	154
+#define ACLK_SATA1		155
+#define CLK_SATA1_PMALIVE	156
+#define CLK_SATA1_RXOOB		157
+#define CLK_SATA1_PIPE_NDFT	158
+#define CLK_SATA1_PIPE_DFT	159
+#define ACLK_SATA2		160
+#define CLK_SATA2_PMALIVE	161
+#define CLK_SATA2_RXOOB		162
+#define CLK_SATA2_PIPE_NDFT	163
+#define CLK_SATA2_PIPE_DFT	164
+#define ACLK_USB3OTG0		165
+#define CLK_USB3OTG0_REF	166
+#define CLK_USB3OTG0_SUSPEND	167
+#define ACLK_USB3OTG1		168
+#define CLK_USB3OTG1_REF	169
+#define CLK_USB3OTG1_SUSPEND	170
+#define CLK_XPCS_EEE		171
+#define PCLK_XPCS		172
+#define ACLK_PHP		173
+#define HCLK_PHP		174
+#define PCLK_PHP		175
+#define HCLK_SDMMC0		176
+#define CLK_SDMMC0		177
+#define HCLK_SDMMC1		178
+#define CLK_SDMMC1		179
+#define ACLK_GMAC0		180
+#define PCLK_GMAC0		181
+#define CLK_MAC0_2TOP		182
+#define CLK_MAC0_OUT		183
+#define CLK_MAC0_REFOUT		184
+#define CLK_GMAC0_PTP_REF	185
+#define ACLK_USB		186
+#define HCLK_USB		187
+#define PCLK_USB		188
+#define HCLK_USB2HOST0		189
+#define HCLK_USB2HOST0_ARB	190
+#define HCLK_USB2HOST1		191
+#define HCLK_USB2HOST1_ARB	192
+#define HCLK_SDMMC2		193
+#define CLK_SDMMC2		194
+#define ACLK_GMAC1		195
+#define PCLK_GMAC1		196
+#define CLK_MAC1_2TOP		197
+#define CLK_MAC1_OUT		198
+#define CLK_MAC1_REFOUT		199
+#define CLK_GMAC1_PTP_REF	200
+#define ACLK_PERIMID		201
+#define HCLK_PERIMID		202
+#define ACLK_VI			203
+#define HCLK_VI			204
+#define PCLK_VI			205
+#define ACLK_VICAP		206
+#define HCLK_VICAP		207
+#define DCLK_VICAP		208
+#define ICLK_VICAP_G		209
+#define ACLK_ISP		210
+#define HCLK_ISP		211
+#define CLK_ISP			212
+#define PCLK_CSI2HOST1		213
+#define CLK_CIF_OUT		214
+#define CLK_CAM0_OUT		215
+#define CLK_CAM1_OUT		216
+#define ACLK_VO			217
+#define HCLK_VO			218
+#define PCLK_VO			219
+#define ACLK_VOP_PRE		220
+#define ACLK_VOP		221
+#define HCLK_VOP		222
+#define DCLK_VOP0		223
+#define DCLK_VOP1		224
+#define DCLK_VOP2		225
+#define CLK_VOP_PWM		226
+#define ACLK_HDCP		227
+#define HCLK_HDCP		228
+#define PCLK_HDCP		229
+#define PCLK_HDMI_HOST		230
+#define CLK_HDMI_SFR		231
+#define CLK_HDMI_CEC		231
+#define PCLK_DSITX_0		232
+#define PCLK_DSITX_1		233
+#define PCLK_EDP_CTRL		234
+#define CLK_EDP_200M		235
+#define ACLK_VPU_PRE		236
+#define HCLK_VPU_PRE		237
+#define ACLK_VPU		238
+#define HCLK_VPU		239
+#define ACLK_RGA_PRE		240
+#define HCLK_RGA_PRE		241
+#define PCLK_RGA_PRE		242
+#define ACLK_RGA		243
+#define HCLK_RGA		244
+#define CLK_RGA_CORE		245
+#define ACLK_IEP		246
+#define HCLK_IEP		247
+#define CLK_IEP_CORE		248
+#define HCLK_EBC		249
+#define DCLK_EBC		250
+#define ACLK_JDEC		251
+#define HCLK_JDEC		252
+#define ACLK_JENC		253
+#define HCLK_JENC		254
+#define PCLK_EINK		255
+#define HCLK_EINK		256
+#define ACLK_RKVENC_PRE		257
+#define HCLK_RKVENC_PRE		258
+#define ACLK_RKVENC		259
+#define HCLK_RKVENC		260
+#define CLK_RKVENC_CORE		261
+#define ACLK_RKVDEC_PRE		262
+#define HCLK_RKVDEC_PRE		263
+#define ACLK_RKVDEC		264
+#define HCLK_RKVDEC		265
+#define CLK_RKVDEC_CA		266
+#define CLK_RKVDEC_CORE		267
+#define CLK_RKVDEC_HEVC_CA	268
+#define ACLK_BUS		269
+#define PCLK_BUS		270
+#define PCLK_TSADC		271
+#define CLK_TSADC_TSEN		272
+#define CLK_TSADC		273
+#define PCLK_SARADC		274
+#define CLK_SARADC		275
+#define PCLK_SCR		276
+#define PCLK_WDT_NS		277
+#define TCLK_WDT_NS		278
+#define ACLK_DMAC0		279
+#define ACLK_DMAC1		280
+#define ACLK_MCU		281
+#define PCLK_INTMUX		282
+#define PCLK_MAILBOX		283
+#define PCLK_UART1		284
+#define CLK_UART1_SRC		285
+#define CLK_UART1_FRAC		286
+#define SCLK_UART1		287
+#define PCLK_UART2		288
+#define CLK_UART2_SRC		289
+#define CLK_UART2_FRAC		290
+#define SCLK_UART2		291
+#define PCLK_UART3		292
+#define CLK_UART3_SRC		293
+#define CLK_UART3_FRAC		294
+#define SCLK_UART3		295
+#define PCLK_UART4		296
+#define CLK_UART4_SRC		297
+#define CLK_UART4_FRAC		298
+#define SCLK_UART4		299
+#define PCLK_UART5		300
+#define CLK_UART5_SRC		301
+#define CLK_UART5_FRAC		302
+#define SCLK_UART5		303
+#define PCLK_UART6		304
+#define CLK_UART6_SRC		305
+#define CLK_UART6_FRAC		306
+#define SCLK_UART6		307
+#define PCLK_UART7		308
+#define CLK_UART7_SRC		309
+#define CLK_UART7_FRAC		310
+#define SCLK_UART7		311
+#define PCLK_UART8		312
+#define CLK_UART8_SRC		313
+#define CLK_UART8_FRAC		314
+#define SCLK_UART8		315
+#define PCLK_UART9		316
+#define CLK_UART9_SRC		317
+#define CLK_UART9_FRAC		318
+#define SCLK_UART9		319
+#define PCLK_CAN0		320
+#define CLK_CAN0		321
+#define PCLK_CAN1		322
+#define CLK_CAN1		323
+#define PCLK_CAN2		324
+#define CLK_CAN2		325
+#define CLK_I2C			326
+#define PCLK_I2C1		327
+#define CLK_I2C1		328
+#define PCLK_I2C2		329
+#define CLK_I2C2		330
+#define PCLK_I2C3		331
+#define CLK_I2C3		332
+#define PCLK_I2C4		333
+#define CLK_I2C4		334
+#define PCLK_I2C5		335
+#define CLK_I2C5		336
+#define PCLK_SPI0		337
+#define CLK_SPI0		338
+#define PCLK_SPI1		339
+#define CLK_SPI1		340
+#define PCLK_SPI2		341
+#define CLK_SPI2		342
+#define PCLK_SPI3		343
+#define CLK_SPI3		344
+#define PCLK_PWM1		345
+#define CLK_PWM1		346
+#define CLK_PWM1_CAPTURE	347
+#define PCLK_PWM2		348
+#define CLK_PWM2		349
+#define CLK_PWM2_CAPTURE	350
+#define PCLK_PWM3		351
+#define CLK_PWM3		352
+#define CLK_PWM3_CAPTURE	353
+#define DBCLK_GPIO		354
+#define PCLK_GPIO1		355
+#define DBCLK_GPIO1		356
+#define PCLK_GPIO2		357
+#define DBCLK_GPIO2		358
+#define PCLK_GPIO3		359
+#define DBCLK_GPIO3		360
+#define PCLK_GPIO4		361
+#define DBCLK_GPIO4		362
+#define OCC_SCAN_CLK_GPIO	363
+#define PCLK_TIMER		364
+#define CLK_TIMER0		365
+#define CLK_TIMER1		366
+#define CLK_TIMER2		367
+#define CLK_TIMER3		368
+#define CLK_TIMER4		369
+#define CLK_TIMER5		370
+#define ACLK_TOP_HIGH		371
+#define ACLK_TOP_LOW		372
+#define HCLK_TOP		373
+#define PCLK_TOP		374
+#define PCLK_PCIE30PHY		375
+#define CLK_OPTC_ARB		376
+#define PCLK_MIPICSIPHY		377
+#define PCLK_MIPIDSIPHY0	378
+#define PCLK_MIPIDSIPHY1	379
+#define PCLK_PIPEPHY0		380
+#define PCLK_PIPEPHY1		381
+#define PCLK_PIPEPHY2		382
+#define PCLK_CPU_BOOST		383
+#define CLK_CPU_BOOST		384
+#define PCLK_OTPPHY		385
+#define SCLK_GMAC0		386
+#define SCLK_GMAC0_RGMII_SPEED	387
+#define SCLK_GMAC0_RMII_SPEED	388
+#define SCLK_GMAC0_RX_TX	389
+#define SCLK_GMAC1		390
+#define SCLK_GMAC1_RGMII_SPEED	391
+#define SCLK_GMAC1_RMII_SPEED	392
+#define SCLK_GMAC1_RX_TX	393
+#define SCLK_SDMMC0_DRV		394
+#define SCLK_SDMMC0_SAMPLE	395
+#define SCLK_SDMMC1_DRV		396
+#define SCLK_SDMMC1_SAMPLE	397
+#define SCLK_SDMMC2_DRV		398
+#define SCLK_SDMMC2_SAMPLE	399
+#define SCLK_EMMC_DRV		400
+#define SCLK_EMMC_SAMPLE	401
+
+#define CLK_NR_CLKS		(SCLK_EMMC_SAMPLE + 1)
+
+/* pmu soft-reset indices */
+/* pmucru_softrst_con0 */
+#define SRST_P_PDPMU_NIU	0
+#define SRST_P_PMUCRU		1
+#define SRST_P_PMUGRF		2
+#define SRST_P_I2C0		3
+#define SRST_I2C0		4
+#define SRST_P_UART0		5
+#define SRST_S_UART0		6
+#define SRST_P_PWM0		7
+#define SRST_PWM0		8
+#define SRST_P_GPIO0		9
+#define SRST_GPIO0		10
+#define SRST_P_PMUPVTM		11
+#define SRST_PMUPVTM		12
+
+/* soft-reset indices */
+
+/* cru_softrst_con0 */
+#define SRST_NCORERESET0	0
+#define SRST_NCORERESET1	1
+#define SRST_NCORERESET2	2
+#define SRST_NCORERESET3	3
+#define SRST_NCPUPORESET0	4
+#define SRST_NCPUPORESET1	5
+#define SRST_NCPUPORESET2	6
+#define SRST_NCPUPORESET3	7
+#define SRST_NSRESET		8
+#define SRST_NSPORESET		9
+#define SRST_NATRESET		10
+#define SRST_NGICRESET		11
+#define SRST_NPRESET		12
+#define SRST_NPERIPHRESET	13
+
+/* cru_softrst_con1 */
+#define SRST_A_CORE_NIU2DDR	16
+#define SRST_A_CORE_NIU2BUS	17
+#define SRST_P_DBG_NIU		18
+#define SRST_P_DBG		19
+#define SRST_P_DBG_DAPLITE	20
+#define SRST_DAP		21
+#define SRST_A_ADB400_CORE2GIC	22
+#define SRST_A_ADB400_GIC2CORE	23
+#define SRST_P_CORE_GRF		24
+#define SRST_P_CORE_PVTM	25
+#define SRST_CORE_PVTM		26
+#define SRST_CORE_PVTPLL	27
+
+/* cru_softrst_con2 */
+#define SRST_GPU		32
+#define SRST_A_GPU_NIU		33
+#define SRST_P_GPU_NIU		34
+#define SRST_P_GPU_PVTM		35
+#define SRST_GPU_PVTM		36
+#define SRST_GPU_PVTPLL		37
+#define SRST_A_NPU_NIU		40
+#define SRST_H_NPU_NIU		41
+#define SRST_P_NPU_NIU		42
+#define SRST_A_RKNN		43
+#define SRST_H_RKNN		44
+#define SRST_P_NPU_PVTM		45
+#define SRST_NPU_PVTM		46
+#define SRST_NPU_PVTPLL		47
+
+/* cru_softrst_con3 */
+#define SRST_A_MSCH		51
+#define SRST_HWFFC_CTRL		52
+#define SRST_DDR_ALWAYSON	53
+#define SRST_A_DDRSPLIT		54
+#define SRST_DDRDFI_CTL		55
+#define SRST_A_DMA2DDR		57
+
+/* cru_softrst_con4 */
+#define SRST_A_PERIMID_NIU	64
+#define SRST_H_PERIMID_NIU	65
+#define SRST_A_GIC_AUDIO_NIU	66
+#define SRST_H_GIC_AUDIO_NIU	67
+#define SRST_A_GIC600		68
+#define SRST_A_GIC600_DEBUG	69
+#define SRST_A_GICADB_CORE2GIC	70
+#define SRST_A_GICADB_GIC2CORE	71
+#define SRST_A_SPINLOCK		72
+#define SRST_H_SDMMC_BUFFER	73
+#define SRST_D_SDMMC_BUFFER	74
+#define SRST_H_I2S0_8CH		75
+#define SRST_H_I2S1_8CH		76
+#define SRST_H_I2S2_2CH		77
+#define SRST_H_I2S3_2CH		78
+
+/* cru_softrst_con5 */
+#define SRST_M_I2S0_8CH_TX	80
+#define SRST_M_I2S0_8CH_RX	81
+#define SRST_M_I2S1_8CH_TX	82
+#define SRST_M_I2S1_8CH_RX	83
+#define SRST_M_I2S2_2CH		84
+#define SRST_M_I2S3_2CH_TX	85
+#define SRST_M_I2S3_2CH_RX	86
+#define SRST_H_PDM		87
+#define SRST_M_PDM		88
+#define SRST_H_VAD		89
+#define SRST_H_SPDIF_8CH	90
+#define SRST_M_SPDIF_8CH	91
+#define SRST_H_AUDPWM		92
+#define SRST_S_AUDPWM		93
+#define SRST_H_ACDCDIG		94
+#define SRST_ACDCDIG		95
+
+/* cru_softrst_con6 */
+#define SRST_A_SECURE_FLASH_NIU	96
+#define SRST_H_SECURE_FLASH_NIU	97
+#define SRST_A_CRYPTO_NS	103
+#define SRST_H_CRYPTO_NS	104
+#define SRST_CRYPTO_NS_CORE	105
+#define SRST_CRYPTO_NS_PKA	106
+#define SRST_CRYPTO_NS_RNG	107
+#define SRST_H_TRNG_NS		108
+#define SRST_TRNG_NS		109
+
+/* cru_softrst_con7 */
+#define SRST_H_NANDC		112
+#define SRST_N_NANDC		113
+#define SRST_H_SFC		114
+#define SRST_H_SFC_XIP		115
+#define SRST_S_SFC		116
+#define SRST_A_EMMC		117
+#define SRST_H_EMMC		118
+#define SRST_B_EMMC		119
+#define SRST_C_EMMC		120
+#define SRST_T_EMMC		121
+
+/* cru_softrst_con8 */
+#define SRST_A_PIPE_NIU		128
+#define SRST_P_PIPE_NIU		130
+#define SRST_P_PIPE_GRF		133
+#define SRST_A_SATA0		134
+#define SRST_SATA0_PIPE		135
+#define SRST_SATA0_PMALIVE	136
+#define SRST_SATA0_RXOOB	137
+#define SRST_A_SATA1		138
+#define SRST_SATA1_PIPE		139
+#define SRST_SATA1_PMALIVE	140
+#define SRST_SATA1_RXOOB	141
+
+/* cru_softrst_con9 */
+#define SRST_A_SATA2		144
+#define SRST_SATA2_PIPE		145
+#define SRST_SATA2_PMALIVE	146
+#define SRST_SATA2_RXOOB	147
+#define SRST_USB3OTG0		148
+#define SRST_USB3OTG1		149
+#define SRST_XPCS		150
+#define SRST_XPCS_TX_DIV10	151
+#define SRST_XPCS_RX_DIV10	152
+#define SRST_XPCS_XGXS_RX	153
+
+/* cru_softrst_con10 */
+#define SRST_P_PCIE20		160
+
+/* cru_softrst_con11 */
+#define SRST_P_PCIE30X1		176
+
+/* cru_softrst_con12 */
+#define SRST_P_PCIE30X2		192
+
+/* cru_softrst_con13 */
+#define SRST_A_PHP_NIU		208
+#define SRST_H_PHP_NIU		209
+#define SRST_P_PHP_NIU		210
+#define SRST_H_SDMMC0		211
+#define SRST_SDMMC0		212
+#define SRST_H_SDMMC1		213
+#define SRST_SDMMC1		214
+#define SRST_A_GMAC0		215
+#define SRST_GMAC0_TIMESTAMP	216
+
+/* cru_softrst_con14 */
+#define SRST_A_USB_NIU		224
+#define SRST_H_USB_NIU		225
+#define SRST_P_USB_NIU		226
+#define SRST_P_USB_GRF		227
+#define SRST_H_USB2HOST0	228
+#define SRST_H_USB2HOST0_ARB	229
+#define SRST_USB2HOST0_UTMI	230
+#define SRST_H_USB2HOST1	231
+#define SRST_H_USB2HOST1_ARB	232
+#define SRST_USB2HOST1_UTMI	233
+#define SRST_H_SDMMC2		234
+#define SRST_SDMMC2		235
+#define SRST_A_GMAC1		236
+#define SRST_GMAC1_TIMESTAMP	237
+
+/* cru_softrst_con15 */
+#define SRST_A_VI_NIU		240
+#define SRST_H_VI_NIU		241
+#define SRST_P_VI_NIU		242
+#define SRST_A_VICAP		247
+#define SRST_H_VICAP		248
+#define SRST_D_VICAP		249
+#define SRST_I_VICAP		250
+#define SRST_P_VICAP		251
+#define SRST_H_ISP		252
+#define SRST_ISP		253
+#define SRST_P_CSI2HOST1	255
+
+/* cru_softrst_con16 */
+#define SRST_A_VO_NIU		256
+#define SRST_H_VO_NIU		257
+#define SRST_P_VO_NIU		258
+#define SRST_A_VOP_NIU		259
+#define SRST_A_VOP		260
+#define SRST_H_VOP		261
+#define SRST_VOP0		262
+#define SRST_VOP1		263
+#define SRST_VOP2		264
+#define SRST_VOP_PWM		265
+#define SRST_A_HDCP		266
+#define SRST_H_HDCP		267
+#define SRST_P_HDCP		268
+#define SRST_P_HDMI_HOST	270
+#define SRST_HDMI_HOST		271
+
+/* cru_softrst_con17 */
+#define SRST_P_DSITX_0		272
+#define SRST_P_DSITX_1		273
+#define SRST_P_EDP_CTRL		274
+#define SRST_EDP_24M		275
+#define SRST_A_VPU_NIU		280
+#define SRST_H_VPU_NIU		281
+#define SRST_A_VPU		282
+#define SRST_H_VPU		283
+#define SRST_H_EINK		286
+#define SRST_P_EINK		287
+
+/* cru_softrst_con18 */
+#define SRST_A_RGA_NIU		288
+#define SRST_H_RGA_NIU		289
+#define SRST_P_RGA_NIU		290
+#define SRST_A_RGA		292
+#define SRST_H_RGA		293
+#define SRST_RGA_CORE		294
+#define SRST_A_IEP		295
+#define SRST_H_IEP		296
+#define SRST_IEP_CORE		297
+#define SRST_H_EBC		298
+#define SRST_D_EBC		299
+#define SRST_A_JDEC		300
+#define SRST_H_JDEC		301
+#define SRST_A_JENC		302
+#define SRST_H_JENC		303
+
+/* cru_softrst_con19 */
+#define SRST_A_VENC_NIU		304
+#define SRST_H_VENC_NIU		305
+#define SRST_A_RKVENC		307
+#define SRST_H_RKVENC		308
+#define SRST_RKVENC_CORE	309
+
+/* cru_softrst_con20 */
+#define SRST_A_RKVDEC_NIU	320
+#define SRST_H_RKVDEC_NIU	321
+#define SRST_A_RKVDEC		322
+#define SRST_H_RKVDEC		323
+#define SRST_RKVDEC_CA		324
+#define SRST_RKVDEC_CORE	325
+#define SRST_RKVDEC_HEVC_CA	326
+
+/* cru_softrst_con21 */
+#define SRST_A_BUS_NIU		336
+#define SRST_P_BUS_NIU		338
+#define SRST_P_CAN0		340
+#define SRST_CAN0		341
+#define SRST_P_CAN1		342
+#define SRST_CAN1		343
+#define SRST_P_CAN2		344
+#define SRST_CAN2		345
+#define SRST_P_GPIO1		346
+#define SRST_GPIO1		347
+#define SRST_P_GPIO2		348
+#define SRST_GPIO2		349
+#define SRST_P_GPIO3		350
+#define SRST_GPIO3		351
+
+/* cru_softrst_con22 */
+#define SRST_P_GPIO4		352
+#define SRST_GPIO4		353
+#define SRST_P_I2C1		354
+#define SRST_I2C1		355
+#define SRST_P_I2C2		356
+#define SRST_I2C2		357
+#define SRST_P_I2C3		358
+#define SRST_I2C3		359
+#define SRST_P_I2C4		360
+#define SRST_I2C4		361
+#define SRST_P_I2C5		362
+#define SRST_I2C5		363
+#define SRST_P_OTPC_NS		364
+#define SRST_OTPC_NS_SBPI	365
+#define SRST_OTPC_NS_USR	366
+
+/* cru_softrst_con23 */
+#define SRST_P_PWM1		368
+#define SRST_PWM1		369
+#define SRST_P_PWM2		370
+#define SRST_PWM2		371
+#define SRST_P_PWM3		372
+#define SRST_PWM3		373
+#define SRST_P_SPI0		374
+#define SRST_SPI0		375
+#define SRST_P_SPI1		376
+#define SRST_SPI1		377
+#define SRST_P_SPI2		378
+#define SRST_SPI2		379
+#define SRST_P_SPI3		380
+#define SRST_SPI3		381
+
+/* cru_softrst_con24 */
+#define SRST_P_SARADC		384
+#define SRST_P_TSADC		385
+#define SRST_TSADC		386
+#define SRST_P_TIMER		387
+#define SRST_TIMER0		388
+#define SRST_TIMER1		389
+#define SRST_TIMER2		390
+#define SRST_TIMER3		391
+#define SRST_TIMER4		392
+#define SRST_TIMER5		393
+#define SRST_P_UART1		394
+#define SRST_S_UART1		395
+
+/* cru_softrst_con25 */
+#define SRST_P_UART2		400
+#define SRST_S_UART2		401
+#define SRST_P_UART3		402
+#define SRST_S_UART3		403
+#define SRST_P_UART4		404
+#define SRST_S_UART4		405
+#define SRST_P_UART5		406
+#define SRST_S_UART5		407
+#define SRST_P_UART6		408
+#define SRST_S_UART6		409
+#define SRST_P_UART7		410
+#define SRST_S_UART7		411
+#define SRST_P_UART8		412
+#define SRST_S_UART8		413
+#define SRST_P_UART9		414
+#define SRST_S_UART9		415
+
+/* cru_softrst_con26 */
+#define SRST_P_GRF 416
+#define SRST_P_GRF_VCCIO12	417
+#define SRST_P_GRF_VCCIO34	418
+#define SRST_P_GRF_VCCIO567	419
+#define SRST_P_SCR		420
+#define SRST_P_WDT_NS		421
+#define SRST_T_WDT_NS		422
+#define SRST_P_DFT2APB		423
+#define SRST_A_MCU		426
+#define SRST_P_INTMUX		427
+#define SRST_P_MAILBOX		428
+
+/* cru_softrst_con27 */
+#define SRST_A_TOP_HIGH_NIU	432
+#define SRST_A_TOP_LOW_NIU	433
+#define SRST_H_TOP_NIU		434
+#define SRST_P_TOP_NIU		435
+#define SRST_P_TOP_CRU		438
+#define SRST_P_DDRPHY		439
+#define SRST_DDRPHY		440
+#define SRST_P_MIPICSIPHY	442
+#define SRST_P_MIPIDSIPHY0	443
+#define SRST_P_MIPIDSIPHY1	444
+#define SRST_P_PCIE30PHY	445
+#define SRST_PCIE30PHY		446
+#define SRST_P_PCIE30PHY_GRF	447
+
+/* cru_softrst_con28 */
+#define SRST_P_APB2ASB_LEFT	448
+#define SRST_P_APB2ASB_BOTTOM	449
+#define SRST_P_ASB2APB_LEFT	450
+#define SRST_P_ASB2APB_BOTTOM	451
+#define SRST_P_PIPEPHY0		452
+#define SRST_PIPEPHY0		453
+#define SRST_P_PIPEPHY1		454
+#define SRST_PIPEPHY1		455
+#define SRST_P_PIPEPHY2		456
+#define SRST_PIPEPHY2		457
+#define SRST_P_USB2PHY0_GRF	458
+#define SRST_P_USB2PHY1_GRF	459
+#define SRST_P_CPU_BOOST	460
+#define SRST_CPU_BOOST		461
+#define SRST_P_OTPPHY		462
+#define SRST_OTPPHY		463
+
+/* cru_softrst_con29 */
+#define SRST_USB2PHY0_POR	464
+#define SRST_USB2PHY0_USB3OTG0	465
+#define SRST_USB2PHY0_USB3OTG1	466
+#define SRST_USB2PHY1_POR	467
+#define SRST_USB2PHY1_USB2HOST0	468
+#define SRST_USB2PHY1_USB2HOST1	469
+#define SRST_P_EDPPHY_GRF	470
+#define SRST_TSADCPHY		471
+#define SRST_GMAC0_DELAYLINE	472
+#define SRST_GMAC1_DELAYLINE	473
+#define SRST_OTPC_ARB		474
+#define SRST_P_PIPEPHY0_GRF	475
+#define SRST_P_PIPEPHY1_GRF	476
+#define SRST_P_PIPEPHY2_GRF	477
+
+#endif

commit aec089f883cea0b7dcffe814d4bee6273b30391e
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Sep 11 15:06:20 2020 +0800

    rockchip: rv1126: Pull up SFC IO2
    
    GPIO0_D6 pull down in default, but it's needed for SPI Flash with
    WP# pin pull up.
    
    Change-Id: I80a79e0072f1fff49673bbe834f51603e10283dc
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126.c b/arch/arm/mach-rockchip/rv1126/rv1126.c
index 4b2e442edf..00599c74ca 100644
--- a/arch/arm/mach-rockchip/rv1126/rv1126.c
+++ b/arch/arm/mach-rockchip/rv1126/rv1126.c
@@ -72,6 +72,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define CRU_SOFTRST_CON11	0xFF49032C
 #define PMUGRF_SOC_CON1		0xFE020104
 #define GRF_IOFUNC_CON3		0xFF01026C
+#define GRF1_GPIO0D_P		0xFE010104
 
 enum {
 	GPIO1A7_SHIFT		= 12,
@@ -603,6 +604,10 @@ int arch_cpu_init(void)
 	/* hold pmugrf's io reset */
 	writel(0x1 << 7 | 1 << 23, PMUGRF_SOC_CON1);
 #endif
+#if defined(CONFIG_ROCKCHIP_SFC) && (defined(CONFIG_SPL_BUILD) || defined(CONFIG_SUPPORT_USBPLUG))
+	/* GPIO0_D6 pull down in default, pull up it for SPI Flash */
+	writel(((0x3 << 12) << 16) | (0x1 << 12), GRF1_GPIO0D_P);
+#endif
 
 	return 0;
 }

commit 1dd64bce5e46c1e388195a2754c11d2816995aaa
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Sep 11 15:19:59 2020 +0800

    rockchip: rv1126: clean arch_cpu_init() for SPL
    
    Moving current configurations into SPL boot stage except
    something belongs to USBPLUG.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I64ec47f7c0c3cef57854a72af86e9ef1bebbcaed

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126.c b/arch/arm/mach-rockchip/rv1126/rv1126.c
index e5e487eee1..4b2e442edf 100644
--- a/arch/arm/mach-rockchip/rv1126/rv1126.c
+++ b/arch/arm/mach-rockchip/rv1126/rv1126.c
@@ -508,10 +508,11 @@ void board_debug_uart_init(void)
 
 int arch_cpu_init(void)
 {
-#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD) || defined(CONFIG_SUPPORT_USBPLUG)
+#ifdef CONFIG_SPL_BUILD
+	int delay;
+
 	/* Just set region 0 to unsecure */
 	writel(0, FIREWALL_APB_BASE + FW_DDR_CON_REG);
-#endif
 
 	/* disable force jtag mux route to both group0 and group1 */
 	writel(0x00300000, GRF_IOFUNC_CON3);
@@ -520,9 +521,6 @@ int arch_cpu_init(void)
 	writel(0x00ff0055, CRU_BASE + CRU_CLKSEL_CON65);
 	writel(0x00ff0055, CRU_BASE + CRU_CLKSEL_CON67);
 
-#if !defined(CONFIG_TPL_BUILD)
-	int delay;
-
 	/* enable all pd */
 	writel(0xffff0000, PMU_BASE_ADDR + PMU_PWR_GATE_SFTCON);
 	delay = 1000;
@@ -592,9 +590,11 @@ int arch_cpu_init(void)
 	writel(0x101, CRYPTO_PRIORITY_REG);
 	/* enable dynamic priority */
 	writel(0x1, ISP_PRIORITY_EX_REG);
-#endif
 
-#if defined(CONFIG_SUPPORT_USBPLUG)
+#elif defined(CONFIG_SUPPORT_USBPLUG)
+	/* Just set region 0 to unsecure */
+	writel(0, FIREWALL_APB_BASE + FW_DDR_CON_REG);
+
 	/* reset usbphy_otg usbphypor_otg */
 	writel(((0x1 << 6 | (1 << 8)) << 16) | (0x1 << 6) | (1 << 8), CRU_SOFTRST_CON11);
 	udelay(50);

commit d30345d69073dced694d4a1a1f8e6f6f6c1ac56c
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Sat Sep 12 20:41:42 2020 +0800

     mtd: spinand: Add initial support for the MX35LF2GE4AD
    
    Change-Id: Iab488487f9937d31cf419757988a4152f359e62b
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/macronix.c b/drivers/mtd/nand/spi/macronix.c
index 1119677f6f..c1d4913bfc 100644
--- a/drivers/mtd/nand/spi/macronix.c
+++ b/drivers/mtd/nand/spi/macronix.c
@@ -112,6 +112,15 @@ static const struct spinand_info macronix_spinand_table[] = {
 					      &update_cache_variants),
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL)),
+	SPINAND_INFO("MX35LF2GE4AD", 0x26,
+		     NAND_MEMORG(1, 2048, 64, 64, 2048, 2, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+				     mx35lf1ge4ab_ecc_get_status)),
 };
 
 static int macronix_spinand_detect(struct spinand_device *spinand)

commit f771421f9c4d7ee6e24391c4757670ba9789e005
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Wed Sep 9 17:06:44 2020 +0800

    configs: add new configuration for lp3_emmc-tb boards
    
    Overlay from rv1126-emmc-tb.config
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
    Change-Id: Ic0b26dc2934b1ff87d6120e8a66078639f0e1e23

diff --git a/configs/rv1126-lp3-emmc-tb.config b/configs/rv1126-lp3-emmc-tb.config
new file mode 100644
index 0000000000..0d2451ac36
--- /dev/null
+++ b/configs/rv1126-lp3-emmc-tb.config
@@ -0,0 +1,2 @@
+CONFIG_BASE_DEFCONFIG="rv1126-emmc-tb.config"
+CONFIG_LOADER_INI="RV1126MINIALL_LP3_EMMC_TB.ini"

commit 65c356141d79b7380748344d558b3871061c907a
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Sun Sep 6 20:15:42 2020 +0800

    spi: rockchip_sfc: Limit io rate to 100MHz
    
    Change-Id: Icec10dbe65d5bbef72b858447aa15e848084712b
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/spi/rockchip_sfc.c b/drivers/spi/rockchip_sfc.c
index 9113d7ac12..e5e30dbfc3 100644
--- a/drivers/spi/rockchip_sfc.c
+++ b/drivers/spi/rockchip_sfc.c
@@ -107,7 +107,7 @@ check_member(rockchip_sfc_reg, data, 0x108);
 #define SFC_MAX_TRB_VER3	(512 * 31)
 #define SFC_MAX_TRB_VER4	(0xFFFFFFFF)
 
-#define SFC_MAX_RATE		(150 * 1000 * 1000)
+#define SFC_MAX_RATE		(100 * 1000 * 1000)
 #define SFC_DEFAULT_RATE	(80 * 1000 * 1000)
 #define SFC_MIN_RATE		(10 * 1000 * 1000)
 

commit 177c873697a026c941a5b12f8dd82d4e690f4175
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Sep 4 20:09:31 2020 +0800

    cmd: rockusb: Add block continue write flag
    
    1.It's good for Nand devices P/E align
    2.But actually 0x200 sector(USB limit) is aligned with Nand flash block size
    
    Change-Id: I69510161c32e15ee739c99d36f0294d59df554dd
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/cmd/rockusb.c b/cmd/rockusb.c
index 024216183d..fc65285f63 100644
--- a/cmd/rockusb.c
+++ b/cmd/rockusb.c
@@ -37,8 +37,14 @@ static int rkusb_write_sector(struct ums *ums_dev,
 {
 	struct blk_desc *block_dev = &ums_dev->block_dev;
 	lbaint_t blkstart = start + ums_dev->start_sector;
+	int ret;
 
-	return blk_dwrite(block_dev, blkstart, blkcnt, buf);
+	if (block_dev->if_type == IF_TYPE_MTD)
+		block_dev->op_flag |= BLK_MTD_CONT_WRITE;
+	ret = blk_dwrite(block_dev, blkstart, blkcnt, buf);
+	if (block_dev->if_type == IF_TYPE_MTD)
+		block_dev->op_flag &= ~(BLK_MTD_CONT_WRITE);
+	return ret;
 }
 
 static int rkusb_erase_sector(struct ums *ums_dev,

commit 853fc11fcc1d87456eaa9ed149fad3ba4e01f06f
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Sep 4 17:42:03 2020 +0800

    blk: Add BLK_MTD_CONT_WRITE tag
    
    Change-Id: I72537387912d5c981dbe205c0d0c1864fa42a555
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index ec4aa06aeb..64d2822cb0 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -446,7 +446,15 @@ ulong mtd_dwrite(struct udevice *udev, lbaint_t start,
 	if (desc->devnum == BLK_MTD_NAND ||
 	    desc->devnum == BLK_MTD_SPI_NAND ||
 	    desc->devnum == BLK_MTD_SPI_NOR) {
-		if (desc->op_flag == BLK_MTD_NBA_RW) {
+		if (desc->op_flag == BLK_MTD_CONT_WRITE) {
+			ret = mtd_map_write(mtd, off, &rwsize,
+					    NULL, mtd->size,
+					    (u_char *)(src), 0);
+			if (!ret)
+				return blkcnt;
+			else
+				return 0;
+		} else {
 			lbaint_t off_aligned, alinged;
 			size_t rwsize_aligned;
 			u8 *p_buf;
@@ -481,14 +489,6 @@ ulong mtd_dwrite(struct udevice *udev, lbaint_t start,
 				return blkcnt;
 			else
 				return 0;
-		} else {
-			ret = mtd_map_write(mtd, off, &rwsize,
-					    NULL, mtd->size,
-					    (u_char *)(src), 0);
-			if (!ret)
-				return blkcnt;
-			else
-				return 0;
 		}
 	} else {
 		return 0;
diff --git a/include/blk.h b/include/blk.h
index 31b5ad78ea..589edd96ef 100644
--- a/include/blk.h
+++ b/include/blk.h
@@ -53,7 +53,7 @@ enum if_type {
 
 /* define block device operation flags */
 #define BLK_PRE_RW		BIT(0)	/* Block prepare read & write*/
-#define BLK_MTD_NBA_RW		BIT(1)	/* MTD block non-block-aligned read & write */
+#define BLK_MTD_CONT_WRITE	BIT(1)	/* Special for Nand device P/E */
 
 /*
  * Identifies the partition table type (ie. MBR vs GPT GUID) signature

commit 0e91bf0e81b637a5d867e1a49d2989c5c6619f85
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Sep 7 15:31:42 2020 +0800

    configs: rv1126-emmc-tb: enable CONFIG_SPL_BLK_READ_PREPARE
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I3f1fcde5f0c2c1ee623302310dbaca138b5e8428

diff --git a/configs/rv1126-emmc-tb.config b/configs/rv1126-emmc-tb.config
index 5fe83b3137..892c3f452d 100644
--- a/configs/rv1126-emmc-tb.config
+++ b/configs/rv1126-emmc-tb.config
@@ -15,8 +15,10 @@ CONFIG_LOADER_INI="RV1126MINIALL_EMMC_TB.ini"
 # CONFIG_SPL_AB is not set
 CONFIG_SPL_ADC_KEY=y
 CONFIG_SPL_ADC_SUPPORT=y
+CONFIG_SPL_BLK_READ_PREPARE=y
 # CONFIG_SPL_CROS_EC_KEYB is not set
 CONFIG_SPL_INPUT=y
+CONFIG_SPL_KERNEL_BOOT_SECTOR=0xa000
 CONFIG_SPL_KERNEL_BOOT=y
 # CONFIG_SPL_MTD_SUPPORT is not set
 # CONFIG_SPL_NAND_SUPPORT is not set

commit fdb19f39789ca876d9eb7aea239b607ffe68aabe
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Sep 7 15:31:01 2020 +0800

    spl: fit: add file spl_fit_tb_arm_v7.S
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I59554a339cbad5f03806c6b1007ccf69e03be470

diff --git a/common/spl/Makefile b/common/spl/Makefile
index 65ba4480c7..393cbf358f 100644
--- a/common/spl/Makefile
+++ b/common/spl/Makefile
@@ -20,7 +20,15 @@ endif
 
 ifdef CONFIG_SPL_BUILD
 obj-$(CONFIG_$(SPL_TPL_)BOOTROM_SUPPORT) += spl_bootrom.o
+ifdef CONFIG_SPL_KERNEL_BOOT
+ifdef CONFIG_ARM64
 obj-$(CONFIG_$(SPL_TPL_)LOAD_FIT) += spl_fit.o
+else
+obj-$(CONFIG_$(SPL_TPL_)LOAD_FIT) += spl_fit_tb_arm_v7.o
+endif
+else
+obj-$(CONFIG_$(SPL_TPL_)LOAD_FIT) += spl_fit.o
+endif
 obj-$(CONFIG_$(SPL_TPL_)NOR_SUPPORT) += spl_nor.o
 obj-$(CONFIG_$(SPL_TPL_)XIP_SUPPORT) += spl_xip.o
 obj-$(CONFIG_$(SPL_TPL_)YMODEM_SUPPORT) += spl_ymodem.o
diff --git a/common/spl/spl_fit_tb_arm_v7.S b/common/spl/spl_fit_tb_arm_v7.S
new file mode 100644
index 0000000000..f4f5d56910
--- /dev/null
+++ b/common/spl/spl_fit_tb_arm_v7.S
@@ -0,0 +1,10397 @@
+	.arch armv7-a
+	.eabi_attribute 20, 1
+	.eabi_attribute 21, 1
+	.eabi_attribute 23, 3
+	.eabi_attribute 24, 1
+	.eabi_attribute 25, 1
+	.eabi_attribute 26, 2
+	.eabi_attribute 30, 4
+	.eabi_attribute 34, 0
+	.eabi_attribute 18, 2
+	.file	"spl_fit_tb_arm_v7.c"
+	.text
+.Ltext0:
+	.cfi_sections	.debug_frame
+	.section	.text.spl_fit_get_image_name.isra.0,"ax",%progbits
+	.align	1
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	spl_fit_get_image_name.isra.0, %function
+spl_fit_get_image_name.isra.0:
+.LFB216:
+	.file 1 "common/spl/spl_fit_tb_arm_v7.c"
+	.loc 1 32 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL0:
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
+	.cfi_offset 14, -4
+	.loc 1 32 0
+	mov	r5, r0
+	mov	r8, r1
+	mov	r7, r2
+	mov	r6, r3
+	.loc 1 41 0
+	bl	fit_find_config_node
+.LVL1:
+	.loc 1 42 0
+	subs	r4, r0, #0
+	bge	.L2
+	.loc 1 44 0
+	ldr	r0, .L11
+.LVL2:
+	.loc 1 48 0
+	ldr	r7, .L11+4
+.LVL3:
+	.loc 1 49 0
+	ldr	r8, .L11+8
+.LVL4:
+	.loc 1 44 0
+	bl	printf
+.LVL5:
+	.loc 1 45 0
+	mov	r1, r4
+	mov	r0, r5
+	bl	fdt_first_subnode
+.LVL6:
+	mov	r6, r0
+.LVL7:
+.L3:
+	cmp	r6, #0
+	bge	.L4
+.LVL8:
+.L1:
+	.loc 1 72 0
+	mov	r0, r4
+	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.LVL9:
+.L4:
+	.cfi_restore_state
+	.loc 1 48 0
+	add	r3, sp, #4
+	mov	r2, r7
+	mov	r1, r6
+	mov	r0, r5
+.LVL10:
+	bl	fdt_getprop
+.LVL11:
+	.loc 1 49 0
+	mov	r1, r0
+	mov	r0, r8
+.LVL12:
+	bl	printf
+.LVL13:
+	.loc 1 47 0
+	mov	r1, r6
+	mov	r0, r5
+	bl	fdt_next_subnode
+.LVL14:
+	mov	r6, r0
+.LVL15:
+	b	.L3
+.LVL16:
+.L2:
+	.loc 1 55 0
+	mov	r0, r5
+.LVL17:
+	add	r3, sp, #4
+	mov	r2, r8
+	mov	r1, r4
+	bl	fdt_getprop
+.LVL18:
+	.loc 1 56 0
+	mov	r5, r0
+.LVL19:
+	cbz	r0, .L8
+	movs	r4, #0
+.LVL20:
+.L6:
+	.loc 1 62 0
+	cmp	r4, r7
+	blt	.L7
+	.loc 1 70 0
+	str	r0, [r6]
+	.loc 1 71 0
+	movs	r4, #0
+.LVL21:
+	b	.L1
+.LVL22:
+.L7:
+	.loc 1 63 0
+	movs	r1, #0
+	bl	strchr
+.LVL23:
+	.loc 1 64 0
+	adds	r0, r0, #1
+.LVL24:
+	beq	.L10
+	ldr	r2, [sp, #4]
+	subs	r3, r0, r5
+	cmp	r3, r2
+	bge	.L10
+	.loc 1 62 0
+	adds	r4, r4, #1
+.LVL25:
+	b	.L6
+.LVL26:
+.L8:
+	.loc 1 58 0
+	mvn	r4, #21
+.LVL27:
+	b	.L1
+.LVL28:
+.L10:
+	.loc 1 66 0
+	mvn	r4, #6
+.LVL29:
+	b	.L1
+.L12:
+	.align	2
+.L11:
+	.word	.LC4
+	.word	.LC5
+	.word	.LC6
+	.cfi_endproc
+.LFE216:
+	.size	spl_fit_get_image_name.isra.0, .-spl_fit_get_image_name.isra.0
+	.section	.text.spl_fit_get_image_node,"ax",%progbits
+	.align	1
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	spl_fit_get_image_node, %function
+spl_fit_get_image_node:
+.LFB202:
+	.loc 1 88 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL30:
+	push	{r0, r1, r2, r4, r5, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 1 88 0
+	mov	r5, r1
+	mov	r1, r2
+.LVL31:
+	mov	r2, r3
+.LVL32:
+	.loc 1 93 0
+	add	r3, sp, #4
+.LVL33:
+	.loc 1 88 0
+	mov	r4, r0
+	.loc 1 93 0
+	bl	spl_fit_get_image_name.isra.0
+.LVL34:
+	.loc 1 94 0
+	cbnz	r0, .L13
+	.loc 1 99 0
+	ldr	r2, [sp, #4]
+	mov	r1, r5
+	mov	r0, r4
+.LVL35:
+	bl	fdt_subnode_offset
+.LVL36:
+	.loc 1 100 0
+	cmp	r0, #0
+	.loc 1 102 0
+	it	lt
+	mvnlt	r0, #21
+.LVL37:
+.L13:
+	.loc 1 106 0
+	add	sp, sp, #12
+	.cfi_def_cfa_offset 12
+	@ sp needed
+	pop	{r4, r5, pc}
+	.cfi_endproc
+.LFE202:
+	.size	spl_fit_get_image_node, .-spl_fit_get_image_node
+	.global	__aeabi_idivmod
+	.global	__aeabi_idiv
+	.section	.text.spl_load_fit_image,"ax",%progbits
+	.align	1
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	spl_load_fit_image, %function
+spl_load_fit_image:
+.LFB206:
+	.loc 1 166 0
+	.cfi_startproc
+	@ args = 8, pretend = 0, frame = 48
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL38:
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	sub	sp, sp, #56
+	.cfi_def_cfa_offset 88
+	.loc 1 166 0
+	mov	r4, r2
+	ldr	r5, [sp, #88]
+	.loc 1 176 0
+	add	r2, sp, #56
+.LVL39:
+	.loc 1 166 0
+	mov	r7, r3
+	.loc 1 176 0
+	movs	r3, #255
+.LVL40:
+	.loc 1 166 0
+	str	r1, [sp, #20]
+	.loc 1 176 0
+	strb	r3, [r2, #-29]!
+.LVL41:
+	.loc 1 193 0
+	mov	r1, r5
+.LVL42:
+	.loc 1 180 0
+	ldr	r3, [r0]
+	.loc 1 166 0
+	mov	r10, r0
+	.loc 1 193 0
+	mov	r0, r4
+.LVL43:
+	.loc 1 166 0
+	ldr	r6, [sp, #92]
+	.loc 1 180 0
+	str	r3, [sp, #12]
+.LVL44:
+	.loc 1 193 0
+	bl	fit_image_get_comp
+.LVL45:
+	.loc 1 196 0
+	add	r2, sp, #44
+	mov	r1, r5
+	mov	r0, r4
+	bl	fit_image_get_load
+.LVL46:
+	cbz	r0, .L17
+	.loc 1 197 0
+	ldr	r3, [r6, #8]
+	str	r3, [sp, #44]
+.L17:
+	.loc 1 199 0
+	ldrb	r3, [sp, #27]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L18
+	.loc 1 199 0 is_stmt 0 discriminator 1
+	cmp	r3, #6
+	beq	.L18
+	.loc 1 201 0 is_stmt 1
+	add	r2, sp, #40
+	mov	r1, r5
+	mov	r0, r4
+	bl	fit_image_get_comp_addr
+.LVL47:
+	cbz	r0, .L19
+	.loc 1 202 0
+	ldr	r3, [sp, #44]
+	add	r3, r3, #1048576
+.L70:
+	.loc 1 204 0
+	str	r3, [sp, #40]
+.L19:
+	.loc 1 207 0
+	add	r2, sp, #28
+	mov	r1, r5
+	mov	r0, r4
+	bl	fit_image_get_data_position
+.LVL48:
+	cbz	r0, .L20
+	.loc 1 209 0
+	add	r2, sp, #28
+	mov	r1, r5
+	mov	r0, r4
+	bl	fit_image_get_data_offset
+.LVL49:
+	cmp	r0, #0
+	bne	.L21
+	.loc 1 210 0
+	ldr	r3, [sp, #28]
+	add	r7, r7, r3
+.LVL50:
+	str	r7, [sp, #28]
+.LVL51:
+.L20:
+	.loc 1 216 0
+	add	r2, sp, #36
+	mov	r1, r5
+	mov	r0, r4
+	bl	fit_image_get_data_size
+.LVL52:
+	cmp	r0, #0
+	bne	.L40
+	.loc 1 219 0
+	ldr	r7, [sp, #40]
+	adds	r7, r7, #63
+	bic	r3, r7, #63
+	.loc 1 221 0
+	cmp	r3, #-50331648
+	.loc 1 219 0
+	str	r3, [sp, #8]
+.LVL53:
+	.loc 1 221 0
+	bcc	.L22
+	.loc 1 223 0
+	ldr	r1, [sp, #36]
+	movs	r0, #64
+	bl	memalign_simple
+.LVL54:
+	str	r0, [sp, #8]
+.LVL55:
+.L22:
+.LBB35:
+.LBB36:
+	.loc 1 129 0
+	ldr	r3, [r10, #12]
+.LBE36:
+.LBE35:
+	.loc 1 225 0
+	ldr	r8, [sp, #36]
+	.loc 1 227 0
+	ldr	r0, [sp, #28]
+	.loc 1 225 0
+	str	r8, [sp, #32]
+.LVL56:
+.LBB39:
+.LBB37:
+	.loc 1 129 0
+	cmp	r3, #0
+	beq	.L23
+	.loc 1 130 0
+	and	fp, r0, #63
+.LVL57:
+.L24:
+.LBE37:
+.LBE39:
+.LBB40:
+.LBB41:
+	.loc 1 138 0
+	add	r8, r8, fp
+.LVL58:
+	.loc 1 140 0
+	cbnz	r3, .L25
+	.loc 1 143 0
+	ldr	r1, [r10, #8]
+	add	r0, r8, r1
+	subs	r0, r0, #1
+	bl	__aeabi_idiv
+.LVL59:
+	mov	r8, r0
+.LVL60:
+.L25:
+.LBE41:
+.LBE40:
+	.loc 1 231 0
+	mov	r1, r5
+	mov	r0, r4
+	bl	fit_image_is_preload
+.LVL61:
+	.loc 1 233 0
+	str	r0, [sp, #16]
+	cbz	r0, .L26
+	.loc 1 234 0
+	ldr	r2, [sp, #12]
+	movs	r3, #1
+	strb	r3, [r2, #14]
+.L26:
+	.loc 1 236 0
+	ldr	r3, [r10, #16]
+	.loc 1 237 0
+	ldr	r0, [sp, #28]
+.LVL62:
+	.loc 1 236 0
+	mov	r7, r3
+.LBB42:
+.LBB43:
+	.loc 1 115 0
+	ldr	r3, [r10, #12]
+	cmp	r3, #0
+	beq	.L27
+	.loc 1 116 0
+	bic	r0, r0, #63
+.LVL63:
+.L28:
+.LBE43:
+.LBE42:
+	.loc 1 236 0
+	ldr	r1, [sp, #20]
+	mov	r2, r8
+	ldr	r3, [sp, #8]
+	add	r1, r1, r0
+	mov	r0, r10
+	blx	r7
+.LVL64:
+	cmp	r8, r0
+	bne	.L37
+	.loc 1 243 0
+	ldr	r3, [sp, #8]
+	add	r3, r3, fp
+	str	r3, [sp, #48]
+	.loc 1 244 0
+	ldr	r3, [sp, #16]
+	cbz	r3, .L30
+	.loc 1 245 0
+	ldr	r3, [sp, #12]
+	ldr	r2, [sp, #12]
+	.loc 1 246 0
+	ldr	r0, .L72
+	.loc 1 245 0
+	ldrb	r3, [r3, #14]	@ zero_extendqisi2
+	bic	r3, r3, #1
+	strb	r3, [r2, #14]
+	.loc 1 246 0
+	bl	printf
+.LVL65:
+.L31:
+	.loc 1 299 0
+	cbz	r6, .L71
+	.loc 1 300 0
+	ldr	r3, [sp, #44]
+	.loc 1 302 0
+	mov	r1, r5
+	ldr	r2, .L72+4
+	mov	r0, r4
+	.loc 1 300 0
+	str	r3, [r6, #8]
+	.loc 1 301 0
+	ldr	r3, [sp, #32]
+	str	r3, [r6, #32]
+	.loc 1 302 0
+	bl	fdt_getprop_u32
+.LVL66:
+	str	r0, [r6, #12]
+.L71:
+	.loc 1 305 0
+	movs	r0, #0
+.LVL67:
+.L16:
+	.loc 1 306 0
+	add	sp, sp, #56
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL68:
+.L18:
+	.cfi_restore_state
+	.loc 1 204 0
+	ldr	r3, [sp, #44]
+	b	.L70
+.LVL69:
+.L23:
+.LBB45:
+.LBB38:
+	.loc 1 132 0
+	ldr	r1, [r10, #8]
+	str	r3, [sp, #16]
+	bl	__aeabi_idivmod
+.LVL70:
+	ldr	r3, [sp, #16]
+	mov	fp, r1
+	b	.L24
+.LVL71:
+.L27:
+.LBE38:
+.LBE45:
+.LBB46:
+.LBB44:
+	.loc 1 118 0
+	ldr	r1, [r10, #8]
+	bl	__aeabi_idiv
+.LVL72:
+	b	.L28
+.LVL73:
+.L68:
+.LBE44:
+.LBE46:
+	.loc 1 257 0
+	ldr	r3, [sp, #52]
+	str	r3, [sp, #48]
+.LVL74:
+.L30:
+	.loc 1 261 0
+	ldrb	r3, [sp, #27]	@ zero_extendqisi2
+.LBB47:
+.LBB48:
+	.file 2 "include/image.h"
+	.loc 2 1003 0
+	movs	r2, #0
+	mov	r1, r5
+	mov	r0, r4
+.LBE48:
+.LBE47:
+	.loc 1 261 0
+	cbz	r3, .L32
+.LVL75:
+	.loc 1 261 0 is_stmt 0 discriminator 1
+	cmp	r3, #6
+	beq	.L32
+.LVL76:
+.LBB51:
+.LBB49:
+	.loc 2 1003 0 is_stmt 1
+	bl	fdt_get_name
+.LVL77:
+.LBE49:
+.LBE51:
+	.loc 1 264 0
+	movs	r3, #0
+.LBB52:
+.LBB50:
+	.loc 2 1003 0
+	mov	r7, r0
+.LVL78:
+.LBE50:
+.LBE52:
+	.loc 1 264 0
+	ldr	r2, .L72+8
+	mov	r1, r5
+	mov	r0, r4
+	.loc 1 262 0
+	ldr	r8, [sp, #44]
+	.loc 1 264 0
+	bl	fdt_getprop
+.LVL79:
+	.loc 1 262 0
+	ldr	r3, [sp, #48]
+	mov	r1, r7
+	mov	r2, r8
+	str	r3, [sp]
+	mov	r3, r0
+	ldr	r0, .L72+12
+	bl	printf
+.LVL80:
+.L33:
+	.loc 1 274 0
+	ldr	r3, [sp, #32]
+	mov	r1, r5
+	ldr	r2, [sp, #48]
+	mov	r0, r4
+	bl	fit_image_verify_with_data
+.LVL81:
+	cbz	r0, .L38
+	.loc 1 279 0
+	add	r3, sp, #32
+	add	r2, sp, #44
+	mov	r1, r5
+	str	r3, [sp]
+	mov	r0, r4
+	add	r3, sp, #48
+	bl	board_fit_image_post_process
+.LVL82:
+	.loc 1 282 0
+	ldr	r0, .L72+16
+	bl	puts
+.LVL83:
+	.loc 1 296 0
+	ldr	r2, [sp, #32]
+	ldr	r1, [sp, #48]
+	ldr	r0, [sp, #44]
+	bl	memcpy
+.LVL84:
+	b	.L31
+.LVL85:
+.L32:
+.LBB53:
+.LBB54:
+	.loc 2 1003 0
+	bl	fdt_get_name
+.LVL86:
+.LBE54:
+.LBE53:
+	.loc 1 267 0
+	ldr	r2, [sp, #44]
+	mov	r1, r0
+	ldr	r0, .L72+20
+	bl	printf
+.LVL87:
+	b	.L33
+.LVL88:
+.L37:
+	.loc 1 239 0
+	mvn	r0, #4
+	b	.L16
+.LVL89:
+.L38:
+	.loc 1 276 0
+	mov	r0, #-1
+	b	.L16
+.LVL90:
+.L21:
+	.loc 1 251 0
+	add	r3, sp, #32
+	add	r2, sp, #52
+	mov	r1, r5
+	mov	r0, r4
+	bl	fit_image_get_data
+.LVL91:
+	cmp	r0, #0
+	beq	.L68
+	.loc 1 252 0
+	ldr	r0, .L72+24
+	bl	puts
+.LVL92:
+.L40:
+	.loc 1 217 0
+	mvn	r0, #1
+.LVL93:
+	b	.L16
+.L73:
+	.align	2
+.L72:
+	.word	.LC7
+	.word	.LC13
+	.word	.LC9
+	.word	.LC10
+	.word	.LC12
+	.word	.LC11
+	.word	.LC8
+	.cfi_endproc
+.LFE206:
+	.size	spl_load_fit_image, .-spl_load_fit_image
+	.section	.text.spl_fit_append_fdt,"ax",%progbits
+	.align	1
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	spl_fit_append_fdt, %function
+spl_fit_append_fdt:
+.LFB207:
+	.loc 1 311 0
+	.cfi_startproc
+	@ args = 8, pretend = 0, frame = 48
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL94:
+	push	{r4, r5, r6, r7, lr}
+	.cfi_def_cfa_offset 20
+	.cfi_offset 4, -20
+	.cfi_offset 5, -16
+	.cfi_offset 6, -12
+	.cfi_offset 7, -8
+	.cfi_offset 14, -4
+	mov	r5, r3
+	sub	sp, sp, #60
+	.cfi_def_cfa_offset 80
+	.loc 1 311 0
+	mov	r4, r0
+	mov	r6, r1
+	mov	r7, r2
+	.loc 1 316 0
+	movs	r3, #0
+.LVL95:
+	ldr	r2, .L76
+.LVL96:
+	ldr	r1, [sp, #80]
+.LVL97:
+	mov	r0, r5
+.LVL98:
+	bl	spl_fit_get_image_node
+.LVL99:
+	.loc 1 317 0
+	cmp	r0, #0
+	blt	.L74
+	.loc 1 326 0
+	ldr	r2, [r4, #32]
+	.loc 1 327 0
+	mov	r1, r7
+	.loc 1 326 0
+	ldr	r3, [r4, #8]
+	add	r3, r3, r2
+	.loc 1 327 0
+	mov	r2, r5
+	.loc 1 326 0
+	str	r3, [sp, #20]
+	.loc 1 327 0
+	add	r3, sp, #12
+	stm	sp, {r0, r3}
+	mov	r0, r6
+.LVL100:
+	ldr	r3, [sp, #84]
+	bl	spl_load_fit_image
+.LVL101:
+	.loc 1 330 0
+	cmp	r0, #0
+	blt	.L74
+	.loc 1 334 0
+	ldr	r0, [sp, #20]
+.LVL102:
+	.loc 1 337 0
+	mov	r1, #8192
+	.loc 1 334 0
+	str	r0, [r4, #20]
+	.loc 1 337 0
+	bl	fdt_shrink_to_minimum
+.LVL103:
+.L74:
+	.loc 1 341 0
+	add	sp, sp, #60
+	.cfi_def_cfa_offset 20
+	@ sp needed
+	pop	{r4, r5, r6, r7, pc}
+.LVL104:
+.L77:
+	.align	2
+.L76:
+	.word	.LC0
+	.cfi_endproc
+.LFE207:
+	.size	spl_fit_append_fdt, .-spl_fit_append_fdt
+	.section	.text.spl_fit_load_blob,"ax",%progbits
+	.align	1
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	spl_fit_load_blob, %function
+spl_fit_load_blob:
+.LFB211:
+	.loc 1 383 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL105:
+	ldr	r2, [r2, #4]
+.LVL106:
+	push	{r3, r4, r5, r6, r7, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 3, -24
+	.cfi_offset 4, -20
+	.cfi_offset 5, -16
+	.cfi_offset 6, -12
+	.cfi_offset 7, -8
+	.cfi_offset 14, -4
+	.loc 1 383 0
+	mov	r4, r0
+	mov	r5, r1
+	rev	r2, r2
+.LVL107:
+	.loc 1 396 0
+	addw	r2, r2, #511
+.LVL108:
+	.loc 1 397 0
+	bic	r0, r2, #510
+.LVL109:
+	bic	r0, r0, #1
+	str	r0, [r3]
+	.loc 1 416 0
+	ldr	r3, .L81
+.LVL110:
+	ldr	r1, [r4, #8]
+.LVL111:
+	subs	r3, r3, r1
+	subs	r3, r3, r0
+	.loc 1 417 0
+	bic	r6, r3, #63
+.LVL112:
+.LBB61:
+.LBB62:
+	.loc 1 140 0
+	ldr	r3, [r4, #12]
+	cbnz	r3, .L79
+	.loc 1 143 0
+	add	r0, r0, r1
+.LVL113:
+	subs	r0, r0, #1
+	bl	__aeabi_idiv
+.LVL114:
+.L79:
+.LBE62:
+.LBE61:
+	.loc 1 419 0
+	mov	r2, r0
+	ldr	r7, [r4, #16]
+	mov	r3, r6
+	mov	r1, r5
+	mov	r0, r4
+	blx	r7
+.LVL115:
+	.loc 1 422 0
+	cmp	r0, #0
+	.loc 1 426 0
+	ite	ne
+	movne	r0, r6
+.LVL116:
+	moveq	r0, #0
+	pop	{r3, r4, r5, r6, r7, pc}
+.LVL117:
+.L82:
+	.align	2
+.L81:
+	.word	4194241
+	.cfi_endproc
+.LFE211:
+	.size	spl_fit_load_blob, .-spl_fit_load_blob
+	.section	.text.spl_fit_standalone_release,"ax",%progbits
+	.align	1
+	.weak	spl_fit_standalone_release
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	spl_fit_standalone_release, %function
+spl_fit_standalone_release:
+.LFB210:
+	.loc 1 376 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL118:
+	.loc 1 378 0
+	movs	r0, #0
+.LVL119:
+	bx	lr
+	.cfi_endproc
+.LFE210:
+	.size	spl_fit_standalone_release, .-spl_fit_standalone_release
+	.section	.text.spl_kernel_partition,"ax",%progbits
+	.align	1
+	.weak	spl_kernel_partition
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	spl_kernel_partition, %function
+spl_kernel_partition:
+.LFB212:
+	.loc 1 432 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL120:
+	.loc 1 434 0
+	ldr	r0, .L85
+.LVL121:
+	bx	lr
+.L86:
+	.align	2
+.L85:
+	.word	.LC14
+	.cfi_endproc
+.LFE212:
+	.size	spl_kernel_partition, .-spl_kernel_partition
+	.section	.text.spl_load_simple_fit,"ax",%progbits
+	.align	1
+	.global	spl_load_simple_fit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	spl_load_simple_fit, %function
+spl_load_simple_fit:
+.LFB215:
+	.loc 1 755 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 216
+	@ frame_needed = 1, uses_anonymous_args = 0
+.LVL122:
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	sub	sp, sp, #232
+	.cfi_def_cfa_offset 264
+	mov	r4, r0
+	mov	r5, r1
+	add	r7, sp, #16
+	.cfi_def_cfa 7, 248
+	.loc 1 755 0
+	mov	r10, r2
+.LVL123:
+	.loc 1 757 0
+	mvn	fp, #21
+	.loc 1 755 0
+	str	r3, [r7, #20]
+	.loc 1 760 0
+	movs	r3, #0
+.LVL124:
+	str	r3, [r7, #24]
+.LVL125:
+.L121:
+	.loc 1 761 0
+	ldr	r3, [r7, #24]
+	cmp	r3, #1
+	bne	.L88
+	.loc 1 763 0
+	ldr	r1, [r5, #8]
+	mov	r0, #2097152
+	bl	__aeabi_idiv
+.LVL126:
+	.loc 1 762 0
+	add	r10, r10, r0
+.LVL127:
+	.loc 1 764 0
+	ldr	r0, .L153
+	mov	r1, r10
+	bl	printf
+.LVL128:
+	.loc 1 765 0
+	ldr	r6, [r5, #16]
+	mov	r1, r10
+	ldr	r3, [r7, #20]
+	mov	r0, r5
+	ldr	r2, [r7, #24]
+	blx	r6
+.LVL129:
+	cmp	r0, #1
+	beq	.L88
+	.loc 1 766 0
+	ldr	r0, .L153+4
+.L152:
+	.loc 1 772 0
+	bl	printf
+.LVL130:
+.L89:
+	.loc 1 760 0 discriminator 2
+	ldr	r3, [r7, #24]
+	adds	r3, r3, #1
+	cmp	r3, #2
+	str	r3, [r7, #24]
+.LVL131:
+	beq	.L87
+	b	.L121
+.LVL132:
+.L88:
+	ldr	r3, [r7, #20]
+	.loc 1 771 0
+	ldr	r2, .L153+8
+	ldr	r3, [r3]
+	rev	r3, r3
+.LVL133:
+	cmp	r3, r2
+	beq	.L90
+	.loc 1 772 0
+	ldr	r0, .L153+12
+	b	.L152
+.L90:
+.LVL134:
+.LBB82:
+.LBB83:
+	.loc 1 564 0
+	add	r3, r7, #40
+	ldr	r2, [r7, #20]
+	mov	r1, r10
+	mov	r0, r5
+	bl	spl_fit_load_blob
+.LVL135:
+	.loc 1 565 0
+	mov	r6, r0
+	cmp	r0, #0
+	beq	.L91
+	.loc 1 571 0
+	ldr	r1, .L153+16
+	bl	fdt_path_offset
+.LVL136:
+	.loc 1 572 0
+	subs	r3, r0, #0
+	str	r3, [r7, #28]
+	blt	.L91
+	.loc 1 578 0
+	bl	fit_board_verify_required_sigs
+.LVL137:
+	mov	fp, r0
+	cbz	r0, .L92
+	.loc 1 580 0
+	ldr	r0, .L153+20
+	bl	printf
+.LVL138:
+	.loc 1 581 0
+	bl	hang
+.LVL139:
+.L92:
+	.loc 1 627 0
+	mov	r3, r0
+	ldr	r2, .L153+24
+	ldr	r1, [r7, #28]
+	mov	r0, r6
+	bl	spl_fit_get_image_node
+.LVL140:
+	.loc 1 629 0
+	subs	r8, r0, #0
+	ble	.L93
+	.loc 1 631 0
+	add	r3, r7, #96
+	str	r8, [sp]
+	str	r3, [sp, #4]
+	mov	r2, r6
+	ldr	r3, [r7, #40]
+	mov	r1, r10
+	mov	r0, r5
+.LVL141:
+	bl	spl_load_fit_image
+.LVL142:
+	.loc 1 633 0
+	cbnz	r0, .L95
+	.loc 1 634 0
+	ldr	r3, [r7, #108]
+	adds	r3, r3, #1
+	.loc 1 635 0
+	itt	eq
+	ldreq	r3, [r7, #104]
+	streq	r3, [r7, #108]
+	.loc 1 637 0
+	ldr	r0, [r7, #108]
+.LVL143:
+	bl	spl_fit_standalone_release
+.LVL144:
+	.loc 1 638 0
+	mov	r1, r0
+	cbz	r0, .L95
+	.loc 1 639 0
+	ldr	r0, .L153+28
+.LVL145:
+	bl	printf
+.LVL146:
+.L95:
+	.loc 1 654 0
+	movs	r3, #0
+	ldr	r2, .L153+32
+	ldr	r1, [r7, #28]
+	mov	r0, r6
+	bl	spl_fit_get_image_node
+.LVL147:
+	.loc 1 660 0
+	subs	r8, r0, #0
+	bge	.L98
+	.loc 1 662 0
+	movs	r3, #0
+	ldr	r2, .L153+36
+	ldr	r1, [r7, #28]
+	mov	r0, r6
+.LVL148:
+	bl	spl_fit_get_image_node
+.LVL149:
+	.loc 1 669 0
+	subs	r8, r0, #0
+	blt	.L91
+	.loc 1 667 0
+	mov	fp, #1
+	b	.L98
+.LVL150:
+.L93:
+	.loc 1 653 0
+	bne	.L95
+	mov	fp, r8
+.LVL151:
+.L98:
+	.loc 1 676 0
+	str	r4, [sp, #4]
+	mov	r2, r6
+	str	r8, [sp]
+	mov	r1, r10
+	ldr	r3, [r7, #40]
+	mov	r0, r5
+.LVL152:
+	bl	spl_load_fit_image
+.LVL153:
+	.loc 1 678 0
+	cmp	r0, #0
+	bne	.L99
+.LVL154:
+.LBB84:
+.LBB85:
+	.loc 1 371 0
+	adds	r2, r4, #4
+.LVL155:
+	mov	r1, r8
+	mov	r0, r6
+.LVL156:
+	bl	fit_image_get_os
+.LVL157:
+.LBE85:
+.LBE84:
+	.loc 1 685 0
+	cbz	r0, .L100
+	.loc 1 689 0
+	movs	r3, #17
+	strb	r3, [r4, #4]
+.L100:
+	.loc 1 696 0
+	ldrb	r3, [r4, #4]	@ zero_extendqisi2
+	cmp	r3, #17
+	bne	.L108
+	.loc 1 697 0
+	ldr	r3, [r7, #40]
+	mov	r2, r10
+	mov	r1, r5
+	mov	r0, r4
+	str	r3, [sp, #4]
+	ldr	r3, [r7, #28]
+	str	r3, [sp]
+	mov	r3, r6
+	bl	spl_fit_append_fdt
+.LVL158:
+.L108:
+.LBB86:
+	.loc 1 702 0
+	movs	r3, #0
+	.loc 1 704 0
+	ldr	r2, .L153+36
+	.loc 1 702 0
+	strb	r3, [r7, #36]
+	.loc 1 704 0
+	mov	r0, r6
+	mov	r3, fp
+	ldr	r1, [r7, #28]
+	bl	spl_fit_get_image_node
+.LVL159:
+	.loc 1 705 0
+	subs	r3, r0, #0
+	str	r3, [r7, #24]
+	blt	.L102
+.LVL160:
+.LBB87:
+.LBB88:
+	.loc 1 371 0
+	mov	r1, r3
+	add	r2, r7, #36
+.LVL161:
+	mov	r0, r6
+.LVL162:
+	bl	fit_image_get_os
+.LVL163:
+.LBE88:
+.LBE87:
+	.loc 1 712 0
+	ldr	r3, [r4, #28]
+	cmp	r3, #2
+	bne	.L103
+	ldrb	r3, [r7, #36]	@ zero_extendqisi2
+	cmp	r3, #17
+	beq	.L111
+.L103:
+	.loc 1 716 0
+	add	r8, r7, #96
+	mov	r2, r6
+	str	r8, [sp, #4]
+	mov	r1, r10
+	ldr	r3, [r7, #24]
+	mov	r0, r5
+	str	r3, [sp]
+	ldr	r3, [r7, #40]
+	bl	spl_load_fit_image
+.LVL164:
+	.loc 1 718 0
+	cmp	r0, #0
+	blt	.L111
+	.loc 1 721 0
+	ldrb	r3, [r7, #36]	@ zero_extendqisi2
+	cmp	r3, #17
+	bne	.L105
+	.loc 1 722 0
+	ldr	r3, [r7, #40]
+	mov	r2, r10
+	mov	r1, r5
+	mov	r0, r8
+.LVL165:
+	str	r3, [sp, #4]
+	ldr	r3, [r7, #28]
+	str	r3, [sp]
+	mov	r3, r6
+	bl	spl_fit_append_fdt
+.LVL166:
+	.loc 1 724 0
+	ldr	r3, [r7, #116]
+	str	r3, [r4, #20]
+.L105:
+	.loc 1 731 0
+	ldr	r3, [r4, #12]
+	adds	r3, r3, #1
+	bne	.L106
+	.loc 1 732 0
+	ldr	r3, [r7, #108]
+	.loc 1 731 0
+	adds	r2, r3, #1
+	.loc 1 733 0
+	it	ne
+	strne	r3, [r4, #12]
+.L106:
+	.loc 1 736 0
+	ldr	r3, [r4, #20]
+	str	r3, [r7, #24]
+.LVL167:
+	cmp	r3, #0
+	beq	.L111
+.LVL168:
+.LBB89:
+.LBB90:
+	.loc 1 351 0
+	add	r3, r7, #52
+.LVL169:
+	mov	r2, fp
+	ldr	r1, .L153+36
+	mov	r0, r6
+	bl	spl_fit_get_image_name.isra.0
+.LVL170:
+	.loc 1 353 0
+	cmp	r0, #0
+	blt	.L111
+	.loc 1 356 0
+	mov	r3, fp
+	ldr	r2, .L153+36
+	ldr	r1, [r7, #28]
+	mov	r0, r6
+.LVL171:
+	bl	spl_fit_get_image_node
+.LVL172:
+	.loc 1 358 0
+	ldr	r3, [r7, #52]
+	.loc 1 360 0
+	mov	r1, r0
+	.loc 1 356 0
+	mov	r8, r0
+.LVL173:
+	.loc 1 360 0
+	ldr	r2, .L153+40
+	mov	r0, r6
+.LVL174:
+	.loc 1 358 0
+	str	r3, [r7, #20]
+	ldr	r3, [r7, #104]
+	str	r3, [r7, #16]
+	ldr	r3, [r7, #128]
+	str	r3, [r7, #12]
+	ldr	r3, [r7, #108]
+	str	r3, [r7, #8]
+	.loc 1 360 0
+	movs	r3, #0
+	bl	fdt_getprop
+.LVL175:
+	.loc 1 361 0
+	movs	r3, #0
+	.loc 1 360 0
+	str	r0, [r7, #4]
+	.loc 1 361 0
+	ldr	r2, .L153+44
+	mov	r1, r8
+	mov	r0, r6
+	bl	fdt_getprop
+.LVL176:
+	.loc 1 358 0
+	str	r0, [sp, #12]
+	mov	r1, fp
+	ldr	r3, [r7, #4]
+	str	r3, [sp, #8]
+	ldr	r3, [r7, #8]
+	str	r3, [sp, #4]
+	ldr	r3, [r7, #12]
+	str	r3, [sp]
+	ldr	r3, [r7, #16]
+	ldr	r2, [r7, #20]
+	ldr	r0, [r7, #24]
+	bl	fdt_record_loadable
+.LVL177:
+.L111:
+.LBE90:
+.LBE89:
+.LBE86:
+	.loc 1 701 0
+	add	fp, fp, #1
+.LVL178:
+	b	.L108
+.LVL179:
+.L102:
+	.loc 1 747 0
+	ldr	r3, [r4, #12]
+	subs	r3, r3, #1
+	adds	r3, r3, #3
+	bls	.L110
+	.loc 1 748 0
+	ldr	r3, [r4, #8]
+	str	r3, [r4, #12]
+.L110:
+.LVL180:
+.LBE83:
+.LBE82:
+.LBB92:
+.LBB93:
+	.loc 1 449 0
+	ldr	r3, .L153+48
+	.loc 1 439 0
+	str	sp, [r7, #20]
+	.loc 1 449 0
+	ldm	r3, {r0, r1, r2}
+	add	r3, r7, #40
+	stm	r3, {r0, r1, r2}
+.LVL181:
+	.loc 1 451 0
+	ldr	r3, [r5, #8]
+	adds	r3, r3, #7
+	bic	r3, r3, #7
+	sub	sp, sp, r3
+	.loc 1 458 0
+	ldr	r3, [r4, #28]
+	.loc 1 451 0
+	add	r10, sp, #16
+.LVL182:
+	.loc 1 458 0
+	cmp	r3, #2
+	bne	.L122
+.LVL183:
+	.loc 1 465 0
+	mov	r1, r5
+	mov	r0, r4
+	bl	spl_kernel_partition
+.LVL184:
+	.loc 1 466 0
+	add	r2, r7, #96
+	mov	r1, r0
+	ldr	r0, [r5]
+.LVL185:
+	bl	part_get_info_by_name
+.LVL186:
+	cmp	r0, #0
+	bgt	.L112
+	.loc 1 467 0
+	ldr	r1, .L153+52
+	ldr	r0, .L153+56
+.L151:
+	.loc 1 481 0
+	mvn	fp, #21
+	.loc 1 480 0
+	bl	printf
+.LVL187:
+.L113:
+	ldr	sp, [r7, #20]
+.LVL188:
+.L87:
+.LBE93:
+.LBE92:
+	.loc 1 787 0
+	mov	r0, fp
+	adds	r7, r7, #216
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	mov	sp, r7
+	.cfi_def_cfa_register 13
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL189:
+.L112:
+	.cfi_restore_state
+.LBB95:
+.LBB94:
+	.loc 1 470 0
+	ldr	r8, [r7, #96]
+.LVL190:
+	.loc 1 474 0
+	mov	r3, r10
+	ldr	r6, [r5, #16]
+	movs	r2, #1
+	mov	r0, r5
+	mov	r1, r8
+	blx	r6
+.LVL191:
+	cmp	r0, #1
+	bne	.L124
+.LVL192:
+	ldr	r3, [r10]
+	.loc 1 479 0
+	ldr	r2, .L153+8
+	rev	r3, r3
+.LVL193:
+	cmp	r3, r2
+	beq	.L114
+	.loc 1 480 0
+	ldr	r1, .L153+52
+	ldr	r0, .L153+60
+	b	.L151
+.L154:
+	.align	2
+.L153:
+	.word	.LC15
+	.word	.LC16
+	.word	-804389139
+	.word	.LC17
+	.word	.LC18
+	.word	.LC19
+	.word	.LC20
+	.word	.LC21
+	.word	.LC22
+	.word	.LC23
+	.word	.LC24
+	.word	.LC25
+	.word	.LANCHOR1
+	.word	.LANCHOR0
+	.word	.LC26
+	.word	.LC27
+.L114:
+	.loc 1 484 0
+	add	r3, r7, #36
+	mov	r2, r10
+	mov	r1, r8
+	mov	r0, r5
+	bl	spl_fit_load_blob
+.LVL194:
+	.loc 1 485 0
+	str	r0, [r7, #28]
+	cmp	r0, #0
+	beq	.L125
+	.loc 1 507 0
+	ldr	r1, .L155
+	bl	fdt_path_offset
+.LVL195:
+	.loc 1 508 0
+	subs	r3, r0, #0
+	str	r3, [r7, #24]
+	blt	.L126
+	movs	r6, #0
+.LVL196:
+.L119:
+	.loc 1 515 0
+	add	r3, r7, #40
+	ldr	r1, [r7, #24]
+	ldr	r10, [r3, r6, lsl #2]
+	movs	r3, #0
+	ldr	r0, [r7, #28]
+	mov	r2, r10
+	bl	spl_fit_get_image_node
+.LVL197:
+	.loc 1 517 0
+	cmp	r0, #0
+	blt	.L116
+	.loc 1 522 0
+	add	r3, r7, #52
+	mov	r1, r8
+	stm	sp, {r0, r3}
+	mov	r0, r5
+.LVL198:
+	ldr	r3, [r7, #36]
+	ldr	r2, [r7, #28]
+	bl	spl_load_fit_image
+.LVL199:
+	.loc 1 524 0
+	mov	fp, r0
+	cmp	r0, #0
+	bne	.L113
+	.loc 1 528 0
+	ldr	r1, .L155+4
+	mov	r0, r10
+.LVL200:
+	bl	strcmp
+.LVL201:
+	cbnz	r0, .L117
+	.loc 1 529 0
+	ldr	r3, [r7, #60]
+	str	r3, [r4, #20]
+.LVL202:
+.L116:
+	.loc 1 514 0
+	adds	r6, r6, #1
+.LVL203:
+	cmp	r6, #3
+	bne	.L119
+.LVL204:
+.L122:
+	.loc 1 549 0
+	mov	fp, #0
+	b	.L113
+.LVL205:
+.L117:
+	.loc 1 530 0
+	ldr	r1, .L155+8
+	mov	r0, r10
+	bl	strcmp
+.LVL206:
+	cmp	r0, #0
+	bne	.L116
+	.loc 1 532 0
+	ldr	r3, [r7, #60]
+	str	r3, [r4, #16]
+	b	.L116
+.LVL207:
+.L124:
+	.loc 1 476 0
+	mvn	fp, #4
+	b	.L113
+.LVL208:
+.L125:
+	.loc 1 487 0
+	mvn	fp, #18
+	b	.L113
+.LVL209:
+.L126:
+	.loc 1 508 0
+	ldr	fp, [r7, #24]
+	b	.L113
+.LVL210:
+.L91:
+.LBE94:
+.LBE95:
+.LBB96:
+.LBB91:
+	.loc 1 567 0
+	mov	r0, #-1
+.L99:
+.LVL211:
+	mov	fp, r0
+	b	.L89
+.L156:
+	.align	2
+.L155:
+	.word	.LC18
+	.word	.LC0
+	.word	.LC1
+.LBE91:
+.LBE96:
+	.cfi_endproc
+.LFE215:
+	.size	spl_load_simple_fit, .-spl_load_simple_fit
+	.section	.rodata
+	.align	2
+	.set	.LANCHOR1,. + 0
+.LC28:
+	.word	.LC0
+	.word	.LC1
+	.word	.LC2
+	.section	.rodata.__func__.8692,"a",%progbits
+	.set	.LANCHOR0,. + 0
+	.type	__func__.8692, %object
+	.size	__func__.8692, 20
+__func__.8692:
+	.ascii	"spl_load_kernel_fit\000"
+	.section	.rodata.spl_fit_get_image_name.isra.0.str1.1,"aMS",%progbits,1
+.LC4:
+	.ascii	"No matching DT out of these options:\012\000"
+.LC5:
+	.ascii	"description\000"
+.LC6:
+	.ascii	"   %s\012\000"
+	.section	.rodata.spl_kernel_partition.str1.1,"aMS",%progbits,1
+.LC14:
+	.ascii	"boot\000"
+	.section	.rodata.spl_load_fit_image.str1.1,"aMS",%progbits,1
+.LC7:
+	.ascii	"## Preload the image OK.\012\000"
+.LC8:
+	.ascii	"Cannot get image data/size\012\000"
+.LC9:
+	.ascii	"compression\000"
+.LC10:
+	.ascii	"## Checking %s 0x%08lx (%s @0x%08lx) ... \000"
+.LC11:
+	.ascii	"## Checking %s 0x%08lx ... \000"
+.LC12:
+	.ascii	"OK\012\000"
+.LC13:
+	.ascii	"entry\000"
+	.section	.rodata.spl_load_simple_fit.str1.1,"aMS",%progbits,1
+.LC15:
+	.ascii	"Trying fit image at 0x%lx sector\012\000"
+.LC16:
+	.ascii	"IO error\012\000"
+.LC17:
+	.ascii	"Not fit magic\012\000"
+.LC18:
+	.ascii	"/images\000"
+.LC19:
+	.ascii	"Verified-boot requires CONFIG_SPL_FIT_SIGNATURE ena"
+	.ascii	"bled\012\000"
+.LC20:
+	.ascii	"standalone\000"
+.LC21:
+	.ascii	"Start standalone fail, ret = %d\012\000"
+.LC22:
+	.ascii	"firmware\000"
+.LC23:
+	.ascii	"loadables\000"
+.LC24:
+	.ascii	"type\000"
+.LC25:
+	.ascii	"os\000"
+.LC26:
+	.ascii	"%s: no partition\012\000"
+.LC27:
+	.ascii	"%s: Not fit magic\012\000"
+	.section	.rodata.str1.1,"aMS",%progbits,1
+.LC0:
+	.ascii	"fdt\000"
+.LC1:
+	.ascii	"kernel\000"
+.LC2:
+	.ascii	"ramdisk\000"
+	.text
+.Letext0:
+	.file 3 "include/common.h"
+	.file 4 "./arch/arm/include/asm/types.h"
+	.file 5 "./arch/arm/include/asm/posix_types.h"
+	.file 6 "include/linux/types.h"
+	.file 7 "include/errno.h"
+	.file 8 "include/linux/string.h"
+	.file 9 "include/efi.h"
+	.file 10 "include/blk.h"
+	.file 11 "include/ide.h"
+	.file 12 "include/part.h"
+	.file 13 "include/flash.h"
+	.file 14 "include/lmb.h"
+	.file 15 "include/asm-generic/u-boot.h"
+	.file 16 "./arch/arm/include/asm/u-boot-arm.h"
+	.file 17 "include/linux/libfdt_env.h"
+	.file 18 "include/linux/../../scripts/dtc/libfdt/fdt.h"
+	.file 19 "include/linux/libfdt.h"
+	.file 20 "include/net.h"
+	.file 21 "./arch/arm/include/asm/spl.h"
+	.file 22 "include/spl.h"
+	.file 23 "include/malloc.h"
+	.file 24 "include/linux/byteorder/swab.h"
+	.file 25 "include/linux/../../scripts/dtc/libfdt/libfdt.h"
+	.file 26 "include/fdt_support.h"
+	.file 27 "include/stdio.h"
+	.section	.debug_info,"",%progbits
+.Ldebug_info0:
+	.4byte	0x2650
+	.2byte	0x4
+	.4byte	.Ldebug_abbrev0
+	.byte	0x4
+	.uleb128 0x1
+	.4byte	.LASF394
+	.byte	0xc
+	.4byte	.LASF395
+	.4byte	.LASF396
+	.4byte	.Ldebug_ranges0+0x88
+	.4byte	0
+	.4byte	.Ldebug_line0
+	.uleb128 0x2
+	.4byte	.LASF4
+	.byte	0x3
+	.byte	0xd
+	.4byte	0x30
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x8
+	.4byte	.LASF0
+	.uleb128 0x3
+	.byte	0x4
+	.byte	0x7
+	.4byte	.LASF1
+	.uleb128 0x3
+	.byte	0x2
+	.byte	0x7
+	.4byte	.LASF2
+	.uleb128 0x4
+	.4byte	.LASF24
+	.byte	0x7
+	.byte	0xc
+	.4byte	0x50
+	.uleb128 0x5
+	.byte	0x4
+	.byte	0x5
+	.ascii	"int\000"
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x6
+	.4byte	.LASF3
+	.uleb128 0x2
+	.4byte	.LASF5
+	.byte	0x4
+	.byte	0xc
+	.4byte	0x30
+	.uleb128 0x3
+	.byte	0x2
+	.byte	0x5
+	.4byte	.LASF6
+	.uleb128 0x2
+	.4byte	.LASF7
+	.byte	0x4
+	.byte	0x12
+	.4byte	0x7b
+	.uleb128 0x3
+	.byte	0x4
+	.byte	0x7
+	.4byte	.LASF8
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x5
+	.4byte	.LASF9
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF10
+	.uleb128 0x6
+	.ascii	"u8\000"
+	.byte	0x4
+	.byte	0x1f
+	.4byte	0x30
+	.uleb128 0x7
+	.4byte	0x90
+	.uleb128 0x6
+	.ascii	"u32\000"
+	.byte	0x4
+	.byte	0x25
+	.4byte	0x7b
+	.uleb128 0x6
+	.ascii	"u64\000"
+	.byte	0x4
+	.byte	0x28
+	.4byte	0x89
+	.uleb128 0x2
+	.4byte	.LASF11
+	.byte	0x4
+	.byte	0x35
+	.4byte	0x37
+	.uleb128 0x2
+	.4byte	.LASF12
+	.byte	0x4
+	.byte	0x36
+	.4byte	0x37
+	.uleb128 0x3
+	.byte	0x4
+	.byte	0x7
+	.4byte	.LASF13
+	.uleb128 0x7
+	.4byte	0xcb
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xe4
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x8
+	.4byte	.LASF14
+	.uleb128 0x7
+	.4byte	0xdd
+	.uleb128 0x3
+	.byte	0x4
+	.byte	0x5
+	.4byte	.LASF15
+	.uleb128 0x2
+	.4byte	.LASF16
+	.byte	0x5
+	.byte	0x25
+	.4byte	0x7b
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xdd
+	.uleb128 0x2
+	.4byte	.LASF17
+	.byte	0x6
+	.byte	0x1b
+	.4byte	0x37
+	.uleb128 0x2
+	.4byte	.LASF18
+	.byte	0x6
+	.byte	0x35
+	.4byte	0xf0
+	.uleb128 0x2
+	.4byte	.LASF19
+	.byte	0x6
+	.byte	0x59
+	.4byte	0x3e
+	.uleb128 0x2
+	.4byte	.LASF20
+	.byte	0x6
+	.byte	0x5b
+	.4byte	0x37
+	.uleb128 0x2
+	.4byte	.LASF21
+	.byte	0x6
+	.byte	0x69
+	.4byte	0x5e
+	.uleb128 0x2
+	.4byte	.LASF22
+	.byte	0x6
+	.byte	0x6b
+	.4byte	0x70
+	.uleb128 0x2
+	.4byte	.LASF23
+	.byte	0x6
+	.byte	0x97
+	.4byte	0x70
+	.uleb128 0x9
+	.byte	0x4
+	.uleb128 0x4
+	.4byte	.LASF25
+	.byte	0x8
+	.byte	0xb
+	.4byte	0xfb
+	.uleb128 0xa
+	.byte	0x10
+	.byte	0x9
+	.byte	0x1f
+	.4byte	0x16e
+	.uleb128 0xb
+	.ascii	"b\000"
+	.byte	0x9
+	.byte	0x20
+	.4byte	0x16e
+	.byte	0
+	.byte	0
+	.uleb128 0xc
+	.4byte	0x90
+	.4byte	0x17e
+	.uleb128 0xd
+	.4byte	0xcb
+	.byte	0xf
+	.byte	0
+	.uleb128 0x2
+	.4byte	.LASF26
+	.byte	0x9
+	.byte	0x21
+	.4byte	0x15b
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x2
+	.4byte	.LASF27
+	.uleb128 0xc
+	.4byte	0xdd
+	.4byte	0x19b
+	.uleb128 0xe
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF28
+	.byte	0x9
+	.2byte	0x140
+	.4byte	0x190
+	.uleb128 0xf
+	.4byte	.LASF29
+	.byte	0x9
+	.2byte	0x143
+	.4byte	0x190
+	.uleb128 0xf
+	.4byte	.LASF30
+	.byte	0x9
+	.2byte	0x143
+	.4byte	0x190
+	.uleb128 0x2
+	.4byte	.LASF31
+	.byte	0xa
+	.byte	0x11
+	.4byte	0x122
+	.uleb128 0x10
+	.4byte	.LASF50
+	.byte	0x4
+	.4byte	0x7b
+	.byte	0xa
+	.byte	0x18
+	.4byte	0x247
+	.uleb128 0x11
+	.4byte	.LASF32
+	.byte	0
+	.uleb128 0x11
+	.4byte	.LASF33
+	.byte	0x1
+	.uleb128 0x11
+	.4byte	.LASF34
+	.byte	0x2
+	.uleb128 0x11
+	.4byte	.LASF35
+	.byte	0x3
+	.uleb128 0x11
+	.4byte	.LASF36
+	.byte	0x4
+	.uleb128 0x11
+	.4byte	.LASF37
+	.byte	0x5
+	.uleb128 0x11
+	.4byte	.LASF38
+	.byte	0x6
+	.uleb128 0x11
+	.4byte	.LASF39
+	.byte	0x7
+	.uleb128 0x11
+	.4byte	.LASF40
+	.byte	0x8
+	.uleb128 0x11
+	.4byte	.LASF41
+	.byte	0x9
+	.uleb128 0x11
+	.4byte	.LASF42
+	.byte	0xa
+	.uleb128 0x11
+	.4byte	.LASF43
+	.byte	0xb
+	.uleb128 0x11
+	.4byte	.LASF44
+	.byte	0xc
+	.uleb128 0x11
+	.4byte	.LASF45
+	.byte	0xd
+	.uleb128 0x11
+	.4byte	.LASF46
+	.byte	0xe
+	.uleb128 0x11
+	.4byte	.LASF47
+	.byte	0xf
+	.uleb128 0x11
+	.4byte	.LASF48
+	.byte	0x10
+	.uleb128 0x11
+	.4byte	.LASF49
+	.byte	0x11
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF51
+	.byte	0x4
+	.4byte	0x7b
+	.byte	0xa
+	.byte	0x3d
+	.4byte	0x270
+	.uleb128 0x11
+	.4byte	.LASF52
+	.byte	0
+	.uleb128 0x11
+	.4byte	.LASF53
+	.byte	0x1
+	.uleb128 0x11
+	.4byte	.LASF54
+	.byte	0x2
+	.uleb128 0x11
+	.4byte	.LASF55
+	.byte	0x3
+	.byte	0
+	.uleb128 0x12
+	.byte	0x10
+	.byte	0xa
+	.byte	0x62
+	.4byte	0x28f
+	.uleb128 0x13
+	.4byte	.LASF56
+	.byte	0xa
+	.byte	0x63
+	.4byte	0x138
+	.uleb128 0x13
+	.4byte	.LASF57
+	.byte	0xa
+	.byte	0x64
+	.4byte	0x17e
+	.byte	0
+	.uleb128 0x14
+	.4byte	.LASF72
+	.byte	0x7c
+	.byte	0xa
+	.byte	0x49
+	.4byte	0x36e
+	.uleb128 0x15
+	.4byte	.LASF50
+	.byte	0xa
+	.byte	0x4e
+	.4byte	0x1ca
+	.byte	0
+	.uleb128 0x15
+	.4byte	.LASF58
+	.byte	0xa
+	.byte	0x4f
+	.4byte	0x50
+	.byte	0x4
+	.uleb128 0x15
+	.4byte	.LASF59
+	.byte	0xa
+	.byte	0x50
+	.4byte	0x30
+	.byte	0x8
+	.uleb128 0x15
+	.4byte	.LASF60
+	.byte	0xa
+	.byte	0x51
+	.4byte	0x30
+	.byte	0x9
+	.uleb128 0xb
+	.ascii	"lun\000"
+	.byte	0xa
+	.byte	0x52
+	.4byte	0x30
+	.byte	0xa
+	.uleb128 0x15
+	.4byte	.LASF61
+	.byte	0xa
+	.byte	0x53
+	.4byte	0x30
+	.byte	0xb
+	.uleb128 0x15
+	.4byte	.LASF62
+	.byte	0xa
+	.byte	0x54
+	.4byte	0x30
+	.byte	0xc
+	.uleb128 0x15
+	.4byte	.LASF63
+	.byte	0xa
+	.byte	0x55
+	.4byte	0x30
+	.byte	0xd
+	.uleb128 0x15
+	.4byte	.LASF64
+	.byte	0xa
+	.byte	0x56
+	.4byte	0x30
+	.byte	0xe
+	.uleb128 0xb
+	.ascii	"lba\000"
+	.byte	0xa
+	.byte	0x5b
+	.4byte	0x1bf
+	.byte	0x10
+	.uleb128 0x15
+	.4byte	.LASF65
+	.byte	0xa
+	.byte	0x5c
+	.4byte	0x37
+	.byte	0x14
+	.uleb128 0x15
+	.4byte	.LASF66
+	.byte	0xa
+	.byte	0x5d
+	.4byte	0x50
+	.byte	0x18
+	.uleb128 0x15
+	.4byte	.LASF67
+	.byte	0xa
+	.byte	0x5e
+	.4byte	0x36e
+	.byte	0x1c
+	.uleb128 0x15
+	.4byte	.LASF68
+	.byte	0xa
+	.byte	0x5f
+	.4byte	0x37e
+	.byte	0x45
+	.uleb128 0x15
+	.4byte	.LASF69
+	.byte	0xa
+	.byte	0x60
+	.4byte	0x38e
+	.byte	0x5a
+	.uleb128 0x15
+	.4byte	.LASF51
+	.byte	0xa
+	.byte	0x61
+	.4byte	0x247
+	.byte	0x64
+	.uleb128 0x16
+	.4byte	0x270
+	.byte	0x68
+	.uleb128 0x15
+	.4byte	.LASF70
+	.byte	0xa
+	.byte	0x6c
+	.4byte	0x3a3
+	.byte	0x78
+	.byte	0
+	.uleb128 0xc
+	.4byte	0xdd
+	.4byte	0x37e
+	.uleb128 0xd
+	.4byte	0xcb
+	.byte	0x28
+	.byte	0
+	.uleb128 0xc
+	.4byte	0xdd
+	.4byte	0x38e
+	.uleb128 0xd
+	.4byte	0xcb
+	.byte	0x14
+	.byte	0
+	.uleb128 0xc
+	.4byte	0xdd
+	.4byte	0x39e
+	.uleb128 0xd
+	.4byte	0xcb
+	.byte	0x8
+	.byte	0
+	.uleb128 0x17
+	.4byte	.LASF397
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x39e
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x3af
+	.uleb128 0x18
+	.uleb128 0xc
+	.4byte	0x122
+	.4byte	0x3bb
+	.uleb128 0xe
+	.byte	0
+	.uleb128 0x4
+	.4byte	.LASF71
+	.byte	0xb
+	.byte	0x10
+	.4byte	0x3b0
+	.uleb128 0xc
+	.4byte	0x30
+	.4byte	0x3d6
+	.uleb128 0xd
+	.4byte	0xcb
+	.byte	0x5
+	.byte	0
+	.uleb128 0x14
+	.4byte	.LASF73
+	.byte	0x8
+	.byte	0xc
+	.byte	0xf
+	.4byte	0x3fb
+	.uleb128 0x15
+	.4byte	.LASF74
+	.byte	0xc
+	.byte	0x10
+	.4byte	0xfb
+	.byte	0
+	.uleb128 0x15
+	.4byte	.LASF75
+	.byte	0xc
+	.byte	0x11
+	.4byte	0x414
+	.byte	0x4
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x3d6
+	.uleb128 0x19
+	.4byte	0x50
+	.4byte	0x414
+	.uleb128 0x1a
+	.4byte	0x50
+	.uleb128 0x1a
+	.4byte	0x50
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x400
+	.uleb128 0x14
+	.4byte	.LASF76
+	.byte	0x78
+	.byte	0xc
+	.byte	0x39
+	.4byte	0x487
+	.uleb128 0x15
+	.4byte	.LASF77
+	.byte	0xc
+	.byte	0x3a
+	.4byte	0x1bf
+	.byte	0
+	.uleb128 0x15
+	.4byte	.LASF78
+	.byte	0xc
+	.byte	0x3b
+	.4byte	0x1bf
+	.byte	0x4
+	.uleb128 0x15
+	.4byte	.LASF65
+	.byte	0xc
+	.byte	0x3c
+	.4byte	0x122
+	.byte	0x8
+	.uleb128 0x15
+	.4byte	.LASF74
+	.byte	0xc
+	.byte	0x3d
+	.4byte	0x487
+	.byte	0xc
+	.uleb128 0x15
+	.4byte	.LASF62
+	.byte	0xc
+	.byte	0x3e
+	.4byte	0x487
+	.byte	0x2c
+	.uleb128 0x15
+	.4byte	.LASF79
+	.byte	0xc
+	.byte	0x3f
+	.4byte	0x50
+	.byte	0x4c
+	.uleb128 0x15
+	.4byte	.LASF80
+	.byte	0xc
+	.byte	0x41
+	.4byte	0x497
+	.byte	0x50
+	.uleb128 0x15
+	.4byte	.LASF81
+	.byte	0xc
+	.byte	0x47
+	.4byte	0x25
+	.byte	0x75
+	.byte	0
+	.uleb128 0xc
+	.4byte	0x25
+	.4byte	0x497
+	.uleb128 0xd
+	.4byte	0xcb
+	.byte	0x1f
+	.byte	0
+	.uleb128 0xc
+	.4byte	0xdd
+	.4byte	0x4a7
+	.uleb128 0xd
+	.4byte	0xcb
+	.byte	0x24
+	.byte	0
+	.uleb128 0x2
+	.4byte	.LASF82
+	.byte	0xc
+	.byte	0x49
+	.4byte	0x41a
+	.uleb128 0xc
+	.4byte	0x3fb
+	.4byte	0x4bd
+	.uleb128 0xe
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x4b2
+	.uleb128 0x4
+	.4byte	.LASF73
+	.byte	0xc
+	.byte	0xce
+	.4byte	0x4bd
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x28f
+	.uleb128 0x1b
+	.2byte	0xa0c
+	.byte	0xd
+	.byte	0x13
+	.4byte	0x51a
+	.uleb128 0x15
+	.4byte	.LASF78
+	.byte	0xd
+	.byte	0x14
+	.4byte	0x122
+	.byte	0
+	.uleb128 0x15
+	.4byte	.LASF83
+	.byte	0xd
+	.byte	0x15
+	.4byte	0x117
+	.byte	0x4
+	.uleb128 0x15
+	.4byte	.LASF84
+	.byte	0xd
+	.byte	0x16
+	.4byte	0x122
+	.byte	0x8
+	.uleb128 0x15
+	.4byte	.LASF77
+	.byte	0xd
+	.byte	0x17
+	.4byte	0x51a
+	.byte	0xc
+	.uleb128 0x1c
+	.4byte	.LASF85
+	.byte	0xd
+	.byte	0x18
+	.4byte	0x52b
+	.2byte	0x80c
+	.byte	0
+	.uleb128 0xc
+	.4byte	0x122
+	.4byte	0x52b
+	.uleb128 0x1d
+	.4byte	0xcb
+	.2byte	0x1ff
+	.byte	0
+	.uleb128 0xc
+	.4byte	0x25
+	.4byte	0x53c
+	.uleb128 0x1d
+	.4byte	0xcb
+	.2byte	0x1ff
+	.byte	0
+	.uleb128 0x2
+	.4byte	.LASF86
+	.byte	0xd
+	.byte	0x37
+	.4byte	0x4d3
+	.uleb128 0xc
+	.4byte	0x53c
+	.4byte	0x552
+	.uleb128 0xe
+	.byte	0
+	.uleb128 0x4
+	.4byte	.LASF87
+	.byte	0xd
+	.byte	0x39
+	.4byte	0x547
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x4
+	.4byte	.LASF88
+	.uleb128 0x14
+	.4byte	.LASF89
+	.byte	0x8
+	.byte	0xe
+	.byte	0x10
+	.4byte	0x589
+	.uleb128 0x15
+	.4byte	.LASF90
+	.byte	0xe
+	.byte	0x11
+	.4byte	0xb5
+	.byte	0
+	.uleb128 0x15
+	.4byte	.LASF78
+	.byte	0xe
+	.byte	0x12
+	.4byte	0xc0
+	.byte	0x4
+	.byte	0
+	.uleb128 0x14
+	.4byte	.LASF91
+	.byte	0x90
+	.byte	0xe
+	.byte	0x15
+	.4byte	0x5ba
+	.uleb128 0xb
+	.ascii	"cnt\000"
+	.byte	0xe
+	.byte	0x16
+	.4byte	0x37
+	.byte	0
+	.uleb128 0x15
+	.4byte	.LASF78
+	.byte	0xe
+	.byte	0x17
+	.4byte	0xc0
+	.byte	0x4
+	.uleb128 0x15
+	.4byte	.LASF92
+	.byte	0xe
+	.byte	0x18
+	.4byte	0x5ba
+	.byte	0x8
+	.byte	0
+	.uleb128 0xc
+	.4byte	0x564
+	.4byte	0x5ca
+	.uleb128 0xd
+	.4byte	0xcb
+	.byte	0x10
+	.byte	0
+	.uleb128 0x1e
+	.ascii	"lmb\000"
+	.2byte	0x120
+	.byte	0xe
+	.byte	0x1b
+	.4byte	0x5f0
+	.uleb128 0x15
+	.4byte	.LASF93
+	.byte	0xe
+	.byte	0x1c
+	.4byte	0x589
+	.byte	0
+	.uleb128 0x15
+	.4byte	.LASF94
+	.byte	0xe
+	.byte	0x1d
+	.4byte	0x589
+	.byte	0x90
+	.byte	0
+	.uleb128 0x1f
+	.ascii	"lmb\000"
+	.byte	0xe
+	.byte	0x20
+	.4byte	0x5ca
+	.uleb128 0xa
+	.byte	0x10
+	.byte	0xf
+	.byte	0x5d
+	.4byte	0x61c
+	.uleb128 0x15
+	.4byte	.LASF77
+	.byte	0xf
+	.byte	0x5e
+	.4byte	0xaa
+	.byte	0
+	.uleb128 0x15
+	.4byte	.LASF78
+	.byte	0xf
+	.byte	0x5f
+	.4byte	0xaa
+	.byte	0x8
+	.byte	0
+	.uleb128 0x14
+	.4byte	.LASF95
+	.byte	0x70
+	.byte	0xf
+	.byte	0x1b
+	.4byte	0x719
+	.uleb128 0x15
+	.4byte	.LASF96
+	.byte	0xf
+	.byte	0x1c
+	.4byte	0x37
+	.byte	0
+	.uleb128 0x15
+	.4byte	.LASF97
+	.byte	0xf
+	.byte	0x1d
+	.4byte	0xc0
+	.byte	0x4
+	.uleb128 0x15
+	.4byte	.LASF98
+	.byte	0xf
+	.byte	0x1e
+	.4byte	0x37
+	.byte	0x8
+	.uleb128 0x15
+	.4byte	.LASF99
+	.byte	0xf
+	.byte	0x1f
+	.4byte	0x37
+	.byte	0xc
+	.uleb128 0x15
+	.4byte	.LASF100
+	.byte	0xf
+	.byte	0x20
+	.4byte	0x37
+	.byte	0x10
+	.uleb128 0x15
+	.4byte	.LASF101
+	.byte	0xf
+	.byte	0x21
+	.4byte	0x37
+	.byte	0x14
+	.uleb128 0x15
+	.4byte	.LASF102
+	.byte	0xf
+	.byte	0x22
+	.4byte	0x37
+	.byte	0x18
+	.uleb128 0x15
+	.4byte	.LASF103
+	.byte	0xf
+	.byte	0x24
+	.4byte	0x37
+	.byte	0x1c
+	.uleb128 0x15
+	.4byte	.LASF104
+	.byte	0xf
+	.byte	0x25
+	.4byte	0x37
+	.byte	0x20
+	.uleb128 0x15
+	.4byte	.LASF105
+	.byte	0xf
+	.byte	0x26
+	.4byte	0x37
+	.byte	0x24
+	.uleb128 0x15
+	.4byte	.LASF106
+	.byte	0xf
+	.byte	0x31
+	.4byte	0x37
+	.byte	0x28
+	.uleb128 0x15
+	.4byte	.LASF107
+	.byte	0xf
+	.byte	0x32
+	.4byte	0x37
+	.byte	0x2c
+	.uleb128 0x15
+	.4byte	.LASF108
+	.byte	0xf
+	.byte	0x33
+	.4byte	0x3c6
+	.byte	0x30
+	.uleb128 0x15
+	.4byte	.LASF109
+	.byte	0xf
+	.byte	0x34
+	.4byte	0x3e
+	.byte	0x36
+	.uleb128 0x15
+	.4byte	.LASF110
+	.byte	0xf
+	.byte	0x35
+	.4byte	0x37
+	.byte	0x38
+	.uleb128 0x15
+	.4byte	.LASF111
+	.byte	0xf
+	.byte	0x36
+	.4byte	0x37
+	.byte	0x3c
+	.uleb128 0x15
+	.4byte	.LASF112
+	.byte	0xf
+	.byte	0x57
+	.4byte	0x122
+	.byte	0x40
+	.uleb128 0x15
+	.4byte	.LASF113
+	.byte	0xf
+	.byte	0x58
+	.4byte	0x122
+	.byte	0x44
+	.uleb128 0x15
+	.4byte	.LASF114
+	.byte	0xf
+	.byte	0x5b
+	.4byte	0x7b
+	.byte	0x48
+	.uleb128 0x15
+	.4byte	.LASF115
+	.byte	0xf
+	.byte	0x60
+	.4byte	0x719
+	.byte	0x50
+	.byte	0
+	.uleb128 0xc
+	.4byte	0x5fb
+	.4byte	0x729
+	.uleb128 0xd
+	.4byte	0xcb
+	.byte	0x1
+	.byte	0
+	.uleb128 0x2
+	.4byte	.LASF116
+	.byte	0xf
+	.byte	0x62
+	.4byte	0x61c
+	.uleb128 0x4
+	.4byte	.LASF117
+	.byte	0x10
+	.byte	0x13
+	.4byte	0x122
+	.uleb128 0x4
+	.4byte	.LASF118
+	.byte	0x10
+	.byte	0x14
+	.4byte	0x122
+	.uleb128 0x4
+	.4byte	.LASF119
+	.byte	0x10
+	.byte	0x15
+	.4byte	0x122
+	.uleb128 0x4
+	.4byte	.LASF120
+	.byte	0x10
+	.byte	0x16
+	.4byte	0x122
+	.uleb128 0x4
+	.4byte	.LASF121
+	.byte	0x10
+	.byte	0x17
+	.4byte	0x122
+	.uleb128 0x4
+	.4byte	.LASF122
+	.byte	0x10
+	.byte	0x18
+	.4byte	0x122
+	.uleb128 0x4
+	.4byte	.LASF123
+	.byte	0x10
+	.byte	0x19
+	.4byte	0x122
+	.uleb128 0x2
+	.4byte	.LASF124
+	.byte	0x11
+	.byte	0x11
+	.4byte	0x143
+	.uleb128 0x14
+	.4byte	.LASF125
+	.byte	0x28
+	.byte	0x12
+	.byte	0x39
+	.4byte	0x811
+	.uleb128 0x15
+	.4byte	.LASF126
+	.byte	0x12
+	.byte	0x3a
+	.4byte	0x781
+	.byte	0
+	.uleb128 0x15
+	.4byte	.LASF127
+	.byte	0x12
+	.byte	0x3b
+	.4byte	0x781
+	.byte	0x4
+	.uleb128 0x15
+	.4byte	.LASF128
+	.byte	0x12
+	.byte	0x3c
+	.4byte	0x781
+	.byte	0x8
+	.uleb128 0x15
+	.4byte	.LASF129
+	.byte	0x12
+	.byte	0x3d
+	.4byte	0x781
+	.byte	0xc
+	.uleb128 0x15
+	.4byte	.LASF130
+	.byte	0x12
+	.byte	0x3e
+	.4byte	0x781
+	.byte	0x10
+	.uleb128 0x15
+	.4byte	.LASF131
+	.byte	0x12
+	.byte	0x3f
+	.4byte	0x781
+	.byte	0x14
+	.uleb128 0x15
+	.4byte	.LASF132
+	.byte	0x12
+	.byte	0x40
+	.4byte	0x781
+	.byte	0x18
+	.uleb128 0x15
+	.4byte	.LASF133
+	.byte	0x12
+	.byte	0x43
+	.4byte	0x781
+	.byte	0x1c
+	.uleb128 0x15
+	.4byte	.LASF134
+	.byte	0x12
+	.byte	0x46
+	.4byte	0x781
+	.byte	0x20
+	.uleb128 0x15
+	.4byte	.LASF135
+	.byte	0x12
+	.byte	0x49
+	.4byte	0x781
+	.byte	0x24
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF136
+	.byte	0x13
+	.2byte	0x136
+	.4byte	0x81d
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x78c
+	.uleb128 0x20
+	.byte	0x4
+	.4byte	0x7b
+	.byte	0x2
+	.byte	0x82
+	.4byte	0x8d8
+	.uleb128 0x11
+	.4byte	.LASF137
+	.byte	0
+	.uleb128 0x11
+	.4byte	.LASF138
+	.byte	0x1
+	.uleb128 0x11
+	.4byte	.LASF139
+	.byte	0x2
+	.uleb128 0x11
+	.4byte	.LASF140
+	.byte	0x3
+	.uleb128 0x11
+	.4byte	.LASF141
+	.byte	0x4
+	.uleb128 0x11
+	.4byte	.LASF142
+	.byte	0x5
+	.uleb128 0x11
+	.4byte	.LASF143
+	.byte	0x6
+	.uleb128 0x11
+	.4byte	.LASF144
+	.byte	0x7
+	.uleb128 0x11
+	.4byte	.LASF145
+	.byte	0x8
+	.uleb128 0x11
+	.4byte	.LASF146
+	.byte	0x9
+	.uleb128 0x11
+	.4byte	.LASF147
+	.byte	0xa
+	.uleb128 0x11
+	.4byte	.LASF148
+	.byte	0xb
+	.uleb128 0x11
+	.4byte	.LASF149
+	.byte	0xc
+	.uleb128 0x11
+	.4byte	.LASF150
+	.byte	0xd
+	.uleb128 0x11
+	.4byte	.LASF151
+	.byte	0xe
+	.uleb128 0x11
+	.4byte	.LASF152
+	.byte	0xf
+	.uleb128 0x11
+	.4byte	.LASF153
+	.byte	0x10
+	.uleb128 0x11
+	.4byte	.LASF154
+	.byte	0x11
+	.uleb128 0x11
+	.4byte	.LASF155
+	.byte	0x12
+	.uleb128 0x11
+	.4byte	.LASF156
+	.byte	0x13
+	.uleb128 0x11
+	.4byte	.LASF157
+	.byte	0x14
+	.uleb128 0x11
+	.4byte	.LASF158
+	.byte	0x15
+	.uleb128 0x11
+	.4byte	.LASF159
+	.byte	0x16
+	.uleb128 0x11
+	.4byte	.LASF160
+	.byte	0x17
+	.uleb128 0x11
+	.4byte	.LASF161
+	.byte	0x18
+	.uleb128 0x11
+	.4byte	.LASF162
+	.byte	0x19
+	.uleb128 0x11
+	.4byte	.LASF163
+	.byte	0x1a
+	.uleb128 0x11
+	.4byte	.LASF164
+	.byte	0x1b
+	.byte	0
+	.uleb128 0x20
+	.byte	0x4
+	.4byte	0x7b
+	.byte	0x2
+	.byte	0xf2
+	.4byte	0x9b7
+	.uleb128 0x11
+	.4byte	.LASF165
+	.byte	0
+	.uleb128 0x11
+	.4byte	.LASF166
+	.byte	0x1
+	.uleb128 0x11
+	.4byte	.LASF167
+	.byte	0x2
+	.uleb128 0x11
+	.4byte	.LASF168
+	.byte	0x3
+	.uleb128 0x11
+	.4byte	.LASF169
+	.byte	0x4
+	.uleb128 0x11
+	.4byte	.LASF170
+	.byte	0x5
+	.uleb128 0x11
+	.4byte	.LASF171
+	.byte	0x6
+	.uleb128 0x11
+	.4byte	.LASF172
+	.byte	0x7
+	.uleb128 0x11
+	.4byte	.LASF173
+	.byte	0x8
+	.uleb128 0x11
+	.4byte	.LASF174
+	.byte	0x9
+	.uleb128 0x11
+	.4byte	.LASF175
+	.byte	0xa
+	.uleb128 0x11
+	.4byte	.LASF176
+	.byte	0xb
+	.uleb128 0x11
+	.4byte	.LASF177
+	.byte	0xc
+	.uleb128 0x11
+	.4byte	.LASF178
+	.byte	0xd
+	.uleb128 0x11
+	.4byte	.LASF179
+	.byte	0xe
+	.uleb128 0x11
+	.4byte	.LASF180
+	.byte	0xf
+	.uleb128 0x11
+	.4byte	.LASF181
+	.byte	0x10
+	.uleb128 0x11
+	.4byte	.LASF182
+	.byte	0x11
+	.uleb128 0x11
+	.4byte	.LASF183
+	.byte	0x12
+	.uleb128 0x11
+	.4byte	.LASF184
+	.byte	0x13
+	.uleb128 0x11
+	.4byte	.LASF185
+	.byte	0x14
+	.uleb128 0x11
+	.4byte	.LASF186
+	.byte	0x15
+	.uleb128 0x11
+	.4byte	.LASF187
+	.byte	0x16
+	.uleb128 0x11
+	.4byte	.LASF188
+	.byte	0x17
+	.uleb128 0x11
+	.4byte	.LASF189
+	.byte	0x18
+	.uleb128 0x11
+	.4byte	.LASF190
+	.byte	0x19
+	.uleb128 0x11
+	.4byte	.LASF191
+	.byte	0x1a
+	.uleb128 0x11
+	.4byte	.LASF192
+	.byte	0x1b
+	.uleb128 0x11
+	.4byte	.LASF193
+	.byte	0x1c
+	.uleb128 0x11
+	.4byte	.LASF194
+	.byte	0x1d
+	.uleb128 0x11
+	.4byte	.LASF195
+	.byte	0x1e
+	.uleb128 0x11
+	.4byte	.LASF196
+	.byte	0x1f
+	.uleb128 0x11
+	.4byte	.LASF197
+	.byte	0x20
+	.uleb128 0x11
+	.4byte	.LASF198
+	.byte	0x21
+	.uleb128 0x11
+	.4byte	.LASF199
+	.byte	0x22
+	.byte	0
+	.uleb128 0x21
+	.byte	0x4
+	.4byte	0x7b
+	.byte	0x2
+	.2byte	0x120
+	.4byte	0x9f5
+	.uleb128 0x11
+	.4byte	.LASF200
+	.byte	0
+	.uleb128 0x11
+	.4byte	.LASF201
+	.byte	0x1
+	.uleb128 0x11
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+	.byte	0x2
+	.uleb128 0x11
+	.4byte	.LASF203
+	.byte	0x3
+	.uleb128 0x11
+	.4byte	.LASF204
+	.byte	0x4
+	.uleb128 0x11
+	.4byte	.LASF205
+	.byte	0x5
+	.uleb128 0x11
+	.4byte	.LASF206
+	.byte	0x6
+	.uleb128 0x11
+	.4byte	.LASF207
+	.byte	0x7
+	.byte	0
+	.uleb128 0x22
+	.4byte	.LASF208
+	.byte	0x40
+	.byte	0x2
+	.2byte	0x136
+	.4byte	0xa9f
+	.uleb128 0x23
+	.4byte	.LASF209
+	.byte	0x2
+	.2byte	0x137
+	.4byte	0x143
+	.byte	0
+	.uleb128 0x23
+	.4byte	.LASF210
+	.byte	0x2
+	.2byte	0x138
+	.4byte	0x143
+	.byte	0x4
+	.uleb128 0x23
+	.4byte	.LASF211
+	.byte	0x2
+	.2byte	0x139
+	.4byte	0x143
+	.byte	0x8
+	.uleb128 0x23
+	.4byte	.LASF212
+	.byte	0x2
+	.2byte	0x13a
+	.4byte	0x143
+	.byte	0xc
+	.uleb128 0x23
+	.4byte	.LASF213
+	.byte	0x2
+	.2byte	0x13b
+	.4byte	0x143
+	.byte	0x10
+	.uleb128 0x23
+	.4byte	.LASF214
+	.byte	0x2
+	.2byte	0x13c
+	.4byte	0x143
+	.byte	0x14
+	.uleb128 0x23
+	.4byte	.LASF215
+	.byte	0x2
+	.2byte	0x13d
+	.4byte	0x143
+	.byte	0x18
+	.uleb128 0x23
+	.4byte	.LASF216
+	.byte	0x2
+	.2byte	0x13e
+	.4byte	0x12d
+	.byte	0x1c
+	.uleb128 0x23
+	.4byte	.LASF217
+	.byte	0x2
+	.2byte	0x13f
+	.4byte	0x12d
+	.byte	0x1d
+	.uleb128 0x23
+	.4byte	.LASF218
+	.byte	0x2
+	.2byte	0x140
+	.4byte	0x12d
+	.byte	0x1e
+	.uleb128 0x23
+	.4byte	.LASF219
+	.byte	0x2
+	.2byte	0x141
+	.4byte	0x12d
+	.byte	0x1f
+	.uleb128 0x23
+	.4byte	.LASF220
+	.byte	0x2
+	.2byte	0x142
+	.4byte	0xa9f
+	.byte	0x20
+	.byte	0
+	.uleb128 0xc
+	.4byte	0x12d
+	.4byte	0xaaf
+	.uleb128 0xd
+	.4byte	0xcb
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x24
+	.4byte	.LASF221
+	.byte	0x2
+	.2byte	0x143
+	.4byte	0x9f5
+	.uleb128 0x7
+	.4byte	0xaaf
+	.uleb128 0x22
+	.4byte	.LASF222
+	.byte	0x18
+	.byte	0x2
+	.2byte	0x145
+	.4byte	0xb42
+	.uleb128 0x23
+	.4byte	.LASF77
+	.byte	0x2
+	.2byte	0x146
+	.4byte	0x122
+	.byte	0
+	.uleb128 0x25
+	.ascii	"end\000"
+	.byte	0x2
+	.2byte	0x146
+	.4byte	0x122
+	.byte	0x4
+	.uleb128 0x23
+	.4byte	.LASF223
+	.byte	0x2
+	.2byte	0x147
+	.4byte	0x122
+	.byte	0x8
+	.uleb128 0x23
+	.4byte	.LASF224
+	.byte	0x2
+	.2byte	0x147
+	.4byte	0x122
+	.byte	0xc
+	.uleb128 0x23
+	.4byte	.LASF225
+	.byte	0x2
+	.2byte	0x148
+	.4byte	0x122
+	.byte	0x10
+	.uleb128 0x23
+	.4byte	.LASF226
+	.byte	0x2
+	.2byte	0x149
+	.4byte	0x12d
+	.byte	0x14
+	.uleb128 0x23
+	.4byte	.LASF62
+	.byte	0x2
+	.2byte	0x149
+	.4byte	0x12d
+	.byte	0x15
+	.uleb128 0x25
+	.ascii	"os\000"
+	.byte	0x2
+	.2byte	0x149
+	.4byte	0x12d
+	.byte	0x16
+	.uleb128 0x23
+	.4byte	.LASF227
+	.byte	0x2
+	.2byte	0x14a
+	.4byte	0x12d
+	.byte	0x17
+	.byte	0
+	.uleb128 0x24
+	.4byte	.LASF228
+	.byte	0x2
+	.2byte	0x14b
+	.4byte	0xac0
+	.uleb128 0x26
+	.4byte	.LASF229
+	.2byte	0x1e4
+	.byte	0x2
+	.2byte	0x151
+	.4byte	0xce1
+	.uleb128 0x23
+	.4byte	.LASF230
+	.byte	0x2
+	.2byte	0x157
+	.4byte	0xce1
+	.byte	0
+	.uleb128 0x23
+	.4byte	.LASF231
+	.byte	0x2
+	.2byte	0x158
+	.4byte	0xaaf
+	.byte	0x4
+	.uleb128 0x23
+	.4byte	.LASF232
+	.byte	0x2
+	.2byte	0x159
+	.4byte	0x122
+	.byte	0x44
+	.uleb128 0x23
+	.4byte	.LASF233
+	.byte	0x2
+	.2byte	0x15c
+	.4byte	0xd7
+	.byte	0x48
+	.uleb128 0x23
+	.4byte	.LASF234
+	.byte	0x2
+	.2byte	0x15e
+	.4byte	0x14e
+	.byte	0x4c
+	.uleb128 0x23
+	.4byte	.LASF235
+	.byte	0x2
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+	.4byte	0xd7
+	.byte	0x50
+	.uleb128 0x23
+	.4byte	.LASF236
+	.byte	0x2
+	.2byte	0x160
+	.4byte	0x50
+	.byte	0x54
+	.uleb128 0x23
+	.4byte	.LASF237
+	.byte	0x2
+	.2byte	0x162
+	.4byte	0x14e
+	.byte	0x58
+	.uleb128 0x23
+	.4byte	.LASF238
+	.byte	0x2
+	.2byte	0x163
+	.4byte	0xd7
+	.byte	0x5c
+	.uleb128 0x23
+	.4byte	.LASF239
+	.byte	0x2
+	.2byte	0x164
+	.4byte	0x50
+	.byte	0x60
+	.uleb128 0x23
+	.4byte	.LASF240
+	.byte	0x2
+	.2byte	0x166
+	.4byte	0x14e
+	.byte	0x64
+	.uleb128 0x23
+	.4byte	.LASF241
+	.byte	0x2
+	.2byte	0x167
+	.4byte	0xd7
+	.byte	0x68
+	.uleb128 0x23
+	.4byte	.LASF242
+	.byte	0x2
+	.2byte	0x168
+	.4byte	0x50
+	.byte	0x6c
+	.uleb128 0x23
+	.4byte	.LASF243
+	.byte	0x2
+	.2byte	0x16a
+	.4byte	0x14e
+	.byte	0x70
+	.uleb128 0x23
+	.4byte	.LASF244
+	.byte	0x2
+	.2byte	0x16b
+	.4byte	0xd7
+	.byte	0x74
+	.uleb128 0x23
+	.4byte	.LASF245
+	.byte	0x2
+	.2byte	0x16c
+	.4byte	0x50
+	.byte	0x78
+	.uleb128 0x25
+	.ascii	"os\000"
+	.byte	0x2
+	.2byte	0x170
+	.4byte	0xb42
+	.byte	0x7c
+	.uleb128 0x25
+	.ascii	"ep\000"
+	.byte	0x2
+	.2byte	0x171
+	.4byte	0x122
+	.byte	0x94
+	.uleb128 0x23
+	.4byte	.LASF246
+	.byte	0x2
+	.2byte	0x173
+	.4byte	0x122
+	.byte	0x98
+	.uleb128 0x23
+	.4byte	.LASF247
+	.byte	0x2
+	.2byte	0x173
+	.4byte	0x122
+	.byte	0x9c
+	.uleb128 0x23
+	.4byte	.LASF248
+	.byte	0x2
+	.2byte	0x175
+	.4byte	0xfb
+	.byte	0xa0
+	.uleb128 0x23
+	.4byte	.LASF249
+	.byte	0x2
+	.2byte	0x176
+	.4byte	0x122
+	.byte	0xa4
+	.uleb128 0x23
+	.4byte	.LASF250
+	.byte	0x2
+	.2byte	0x178
+	.4byte	0x122
+	.byte	0xa8
+	.uleb128 0x23
+	.4byte	.LASF251
+	.byte	0x2
+	.2byte	0x179
+	.4byte	0x122
+	.byte	0xac
+	.uleb128 0x23
+	.4byte	.LASF252
+	.byte	0x2
+	.2byte	0x17a
+	.4byte	0x122
+	.byte	0xb0
+	.uleb128 0x23
+	.4byte	.LASF253
+	.byte	0x2
+	.2byte	0x17b
+	.4byte	0x122
+	.byte	0xb4
+	.uleb128 0x25
+	.ascii	"kbd\000"
+	.byte	0x2
+	.2byte	0x17c
+	.4byte	0xce7
+	.byte	0xb8
+	.uleb128 0x23
+	.4byte	.LASF254
+	.byte	0x2
+	.2byte	0x17f
+	.4byte	0x50
+	.byte	0xbc
+	.uleb128 0x23
+	.4byte	.LASF255
+	.byte	0x2
+	.2byte	0x18c
+	.4byte	0x50
+	.byte	0xc0
+	.uleb128 0x25
+	.ascii	"lmb\000"
+	.byte	0x2
+	.2byte	0x18f
+	.4byte	0x5ca
+	.byte	0xc4
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xaaf
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x729
+	.uleb128 0x24
+	.4byte	.LASF256
+	.byte	0x2
+	.2byte	0x195
+	.4byte	0xb4e
+	.uleb128 0xf
+	.4byte	.LASF257
+	.byte	0x2
+	.2byte	0x197
+	.4byte	0xced
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x12d
+	.uleb128 0xc
+	.4byte	0xdd
+	.4byte	0xd1b
+	.uleb128 0xd
+	.4byte	0xcb
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x4
+	.4byte	.LASF258
+	.byte	0x3
+	.byte	0xad
+	.4byte	0x122
+	.uleb128 0xc
+	.4byte	0x90
+	.4byte	0xd31
+	.uleb128 0xe
+	.byte	0
+	.uleb128 0x4
+	.4byte	.LASF259
+	.byte	0x3
+	.byte	0xaf
+	.4byte	0xd26
+	.uleb128 0x4
+	.4byte	.LASF260
+	.byte	0x3
+	.byte	0xb0
+	.4byte	0xd26
+	.uleb128 0x4
+	.4byte	.LASF261
+	.byte	0x3
+	.byte	0xfe
+	.4byte	0x122
+	.uleb128 0x4
+	.4byte	.LASF262
+	.byte	0x3
+	.byte	0xff
+	.4byte	0x122
+	.uleb128 0xf
+	.4byte	.LASF263
+	.byte	0x3
+	.2byte	0x100
+	.4byte	0x122
+	.uleb128 0x14
+	.4byte	.LASF264
+	.byte	0x4
+	.byte	0x14
+	.byte	0x2e
+	.4byte	0xd82
+	.uleb128 0x15
+	.4byte	.LASF265
+	.byte	0x14
+	.byte	0x2f
+	.4byte	0x143
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x25
+	.uleb128 0xc
+	.4byte	0x90
+	.4byte	0xd98
+	.uleb128 0xd
+	.4byte	0xcb
+	.byte	0x5
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF266
+	.byte	0x14
+	.2byte	0x1fd
+	.4byte	0xd69
+	.uleb128 0xf
+	.4byte	.LASF267
+	.byte	0x14
+	.2byte	0x1fe
+	.4byte	0xd69
+	.uleb128 0xf
+	.4byte	.LASF268
+	.byte	0x14
+	.2byte	0x200
+	.4byte	0xd69
+	.uleb128 0xf
+	.4byte	.LASF269
+	.byte	0x14
+	.2byte	0x205
+	.4byte	0xd0b
+	.uleb128 0xf
+	.4byte	.LASF270
+	.byte	0x14
+	.2byte	0x206
+	.4byte	0xd0b
+	.uleb128 0xc
+	.4byte	0xdd
+	.4byte	0xde4
+	.uleb128 0xd
+	.4byte	0xcb
+	.byte	0x3f
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF271
+	.byte	0x14
+	.2byte	0x207
+	.4byte	0xdd4
+	.uleb128 0xf
+	.4byte	.LASF272
+	.byte	0x14
+	.2byte	0x209
+	.4byte	0xd88
+	.uleb128 0xf
+	.4byte	.LASF273
+	.byte	0x14
+	.2byte	0x20a
+	.4byte	0xd88
+	.uleb128 0xf
+	.4byte	.LASF274
+	.byte	0x14
+	.2byte	0x20b
+	.4byte	0xd69
+	.uleb128 0xf
+	.4byte	.LASF275
+	.byte	0x14
+	.2byte	0x20c
+	.4byte	0xd69
+	.uleb128 0xf
+	.4byte	.LASF276
+	.byte	0x14
+	.2byte	0x20d
+	.4byte	0xd82
+	.uleb128 0xc
+	.4byte	0xd82
+	.4byte	0xe3c
+	.uleb128 0xd
+	.4byte	0xcb
+	.byte	0x3
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF277
+	.byte	0x14
+	.2byte	0x20e
+	.4byte	0xe2c
+	.uleb128 0xf
+	.4byte	.LASF278
+	.byte	0x14
+	.2byte	0x20f
+	.4byte	0xd82
+	.uleb128 0xf
+	.4byte	.LASF279
+	.byte	0x14
+	.2byte	0x210
+	.4byte	0x50
+	.uleb128 0xc
+	.4byte	0x9a
+	.4byte	0xe70
+	.uleb128 0xd
+	.4byte	0xcb
+	.byte	0x5
+	.byte	0
+	.uleb128 0x7
+	.4byte	0xe60
+	.uleb128 0xf
+	.4byte	.LASF280
+	.byte	0x14
+	.2byte	0x211
+	.4byte	0xe70
+	.uleb128 0xf
+	.4byte	.LASF281
+	.byte	0x14
+	.2byte	0x212
+	.4byte	0xe70
+	.uleb128 0xf
+	.4byte	.LASF282
+	.byte	0x14
+	.2byte	0x216
+	.4byte	0x117
+	.uleb128 0xf
+	.4byte	.LASF283
+	.byte	0x14
+	.2byte	0x217
+	.4byte	0x117
+	.uleb128 0xf
+	.4byte	.LASF284
+	.byte	0x14
+	.2byte	0x219
+	.4byte	0x50
+	.uleb128 0xc
+	.4byte	0xdd
+	.4byte	0xec2
+	.uleb128 0x1d
+	.4byte	0xcb
+	.2byte	0x3ff
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF285
+	.byte	0x14
+	.2byte	0x220
+	.4byte	0xeb1
+	.uleb128 0xf
+	.4byte	.LASF286
+	.byte	0x14
+	.2byte	0x222
+	.4byte	0x9f
+	.uleb128 0xf
+	.4byte	.LASF287
+	.byte	0x14
+	.2byte	0x224
+	.4byte	0x9f
+	.uleb128 0xf
+	.4byte	.LASF288
+	.byte	0x14
+	.2byte	0x230
+	.4byte	0xd69
+	.uleb128 0x27
+	.4byte	.LASF289
+	.byte	0x4
+	.4byte	0x7b
+	.byte	0x14
+	.2byte	0x286
+	.4byte	0xf1c
+	.uleb128 0x11
+	.4byte	.LASF290
+	.byte	0
+	.uleb128 0x11
+	.4byte	.LASF291
+	.byte	0x1
+	.uleb128 0x11
+	.4byte	.LASF292
+	.byte	0x2
+	.uleb128 0x11
+	.4byte	.LASF293
+	.byte	0x3
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF294
+	.byte	0x14
+	.2byte	0x28c
+	.4byte	0xef2
+	.uleb128 0x4
+	.4byte	.LASF295
+	.byte	0x15
+	.byte	0x2a
+	.4byte	0x190
+	.uleb128 0x4
+	.4byte	.LASF296
+	.byte	0x15
+	.byte	0x2a
+	.4byte	0x190
+	.uleb128 0x14
+	.4byte	.LASF297
+	.byte	0x2c
+	.byte	0x16
+	.byte	0x1b
+	.4byte	0xfce
+	.uleb128 0x15
+	.4byte	.LASF74
+	.byte	0x16
+	.byte	0x1c
+	.4byte	0xd7
+	.byte	0
+	.uleb128 0xb
+	.ascii	"os\000"
+	.byte	0x16
+	.byte	0x1d
+	.4byte	0x90
+	.byte	0x4
+	.uleb128 0x15
+	.4byte	.LASF261
+	.byte	0x16
+	.byte	0x1e
+	.4byte	0x101
+	.byte	0x8
+	.uleb128 0x15
+	.4byte	.LASF298
+	.byte	0x16
+	.byte	0x1f
+	.4byte	0x101
+	.byte	0xc
+	.uleb128 0x15
+	.4byte	.LASF299
+	.byte	0x16
+	.byte	0x25
+	.4byte	0x101
+	.byte	0x10
+	.uleb128 0x15
+	.4byte	.LASF300
+	.byte	0x16
+	.byte	0x27
+	.4byte	0x14e
+	.byte	0x14
+	.uleb128 0x15
+	.4byte	.LASF301
+	.byte	0x16
+	.byte	0x28
+	.4byte	0x9f
+	.byte	0x18
+	.uleb128 0x15
+	.4byte	.LASF302
+	.byte	0x16
+	.byte	0x29
+	.4byte	0x9f
+	.byte	0x1c
+	.uleb128 0x15
+	.4byte	.LASF78
+	.byte	0x16
+	.byte	0x2a
+	.4byte	0x9f
+	.byte	0x20
+	.uleb128 0x15
+	.4byte	.LASF303
+	.byte	0x16
+	.byte	0x2b
+	.4byte	0x9f
+	.byte	0x24
+	.uleb128 0xb
+	.ascii	"arg\000"
+	.byte	0x16
+	.byte	0x2c
+	.4byte	0x14e
+	.byte	0x28
+	.byte	0
+	.uleb128 0x14
+	.4byte	.LASF304
+	.byte	0x14
+	.byte	0x16
+	.byte	0x38
+	.4byte	0x1017
+	.uleb128 0xb
+	.ascii	"dev\000"
+	.byte	0x16
+	.byte	0x39
+	.4byte	0x14e
+	.byte	0
+	.uleb128 0x15
+	.4byte	.LASF305
+	.byte	0x16
+	.byte	0x3a
+	.4byte	0x14e
+	.byte	0x4
+	.uleb128 0x15
+	.4byte	.LASF306
+	.byte	0x16
+	.byte	0x3b
+	.4byte	0x50
+	.byte	0x8
+	.uleb128 0x15
+	.4byte	.LASF307
+	.byte	0x16
+	.byte	0x3c
+	.4byte	0xd7
+	.byte	0xc
+	.uleb128 0x15
+	.4byte	.LASF308
+	.byte	0x16
+	.byte	0x3d
+	.4byte	0x103b
+	.byte	0x10
+	.byte	0
+	.uleb128 0x19
+	.4byte	0x122
+	.4byte	0x1035
+	.uleb128 0x1a
+	.4byte	0x1035
+	.uleb128 0x1a
+	.4byte	0x122
+	.uleb128 0x1a
+	.4byte	0x122
+	.uleb128 0x1a
+	.4byte	0x14e
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xfce
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x1017
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xf3e
+	.uleb128 0xf
+	.4byte	.LASF309
+	.byte	0x17
+	.2byte	0x3ba
+	.4byte	0x122
+	.uleb128 0xf
+	.4byte	.LASF310
+	.byte	0x17
+	.2byte	0x3bb
+	.4byte	0x122
+	.uleb128 0xf
+	.4byte	.LASF311
+	.byte	0x17
+	.2byte	0x3bc
+	.4byte	0x122
+	.uleb128 0x28
+	.4byte	.LASF327
+	.byte	0x1
+	.2byte	0x2f1
+	.4byte	0x50
+	.4byte	.LFB215
+	.4byte	.LFE215-.LFB215
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x17b1
+	.uleb128 0x29
+	.4byte	.LASF312
+	.byte	0x1
+	.2byte	0x2f1
+	.4byte	0x1041
+	.4byte	.LLST59
+	.uleb128 0x29
+	.4byte	.LASF313
+	.byte	0x1
+	.2byte	0x2f2
+	.4byte	0x1035
+	.4byte	.LLST60
+	.uleb128 0x29
+	.4byte	.LASF314
+	.byte	0x1
+	.2byte	0x2f2
+	.4byte	0x122
+	.4byte	.LLST61
+	.uleb128 0x2a
+	.ascii	"fit\000"
+	.byte	0x1
+	.2byte	0x2f2
+	.4byte	0x14e
+	.4byte	.LLST62
+	.uleb128 0x2b
+	.4byte	.LASF315
+	.byte	0x1
+	.2byte	0x2f4
+	.4byte	0x122
+	.4byte	.LLST63
+	.uleb128 0x2c
+	.ascii	"ret\000"
+	.byte	0x1
+	.2byte	0x2f5
+	.4byte	0x50
+	.4byte	.LLST64
+	.uleb128 0x2c
+	.ascii	"i\000"
+	.byte	0x1
+	.2byte	0x2f6
+	.4byte	0x50
+	.4byte	.LLST65
+	.uleb128 0x2d
+	.4byte	0x17b1
+	.4byte	.LBB82
+	.4byte	.Ldebug_ranges0+0x58
+	.byte	0x1
+	.2byte	0x308
+	.4byte	0x158b
+	.uleb128 0x2e
+	.4byte	0x17e6
+	.4byte	.LLST66
+	.uleb128 0x2e
+	.4byte	0x17da
+	.4byte	.LLST67
+	.uleb128 0x2e
+	.4byte	0x17ce
+	.4byte	.LLST68
+	.uleb128 0x2f
+	.4byte	0x17c2
+	.uleb128 0x30
+	.4byte	.Ldebug_ranges0+0x58
+	.uleb128 0x31
+	.4byte	0x17f2
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -152
+	.uleb128 0x31
+	.4byte	0x17fe
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -208
+	.uleb128 0x32
+	.4byte	0x180a
+	.4byte	.LLST69
+	.uleb128 0x32
+	.4byte	0x1816
+	.4byte	.LLST70
+	.uleb128 0x32
+	.4byte	0x1822
+	.4byte	.LLST71
+	.uleb128 0x32
+	.4byte	0x182e
+	.4byte	.LLST72
+	.uleb128 0x32
+	.4byte	0x183a
+	.4byte	.LLST73
+	.uleb128 0x33
+	.4byte	0x1846
+	.uleb128 0x34
+	.4byte	0x1ac9
+	.4byte	.LBB84
+	.4byte	.LBE84-.LBB84
+	.byte	0x1
+	.2byte	0x2ad
+	.4byte	0x11bc
+	.uleb128 0x2e
+	.4byte	0x1af2
+	.4byte	.LLST74
+	.uleb128 0x2e
+	.4byte	0x1ae6
+	.4byte	.LLST75
+	.uleb128 0x2e
+	.4byte	0x1ada
+	.4byte	.LLST76
+	.uleb128 0x35
+	.4byte	.LVL157
+	.4byte	0x24f5
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 4
+	.byte	0
+	.byte	0
+	.uleb128 0x37
+	.4byte	.LBB86
+	.4byte	.LBE86-.LBB86
+	.4byte	0x13f3
+	.uleb128 0x31
+	.4byte	0x1854
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -212
+	.uleb128 0x34
+	.4byte	0x1ac9
+	.4byte	.LBB87
+	.4byte	.LBE87-.LBB87
+	.byte	0x1
+	.2byte	0x2c4
+	.4byte	0x1221
+	.uleb128 0x2e
+	.4byte	0x1af2
+	.4byte	.LLST77
+	.uleb128 0x2e
+	.4byte	0x1ae6
+	.4byte	.LLST78
+	.uleb128 0x2e
+	.4byte	0x1ada
+	.4byte	.LLST79
+	.uleb128 0x35
+	.4byte	.LVL163
+	.4byte	0x24f5
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x7d
+	.sleb128 96
+	.byte	0x6
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0x7d
+	.sleb128 108
+	.byte	0
+	.byte	0
+	.uleb128 0x34
+	.4byte	0x1afe
+	.4byte	.LBB89
+	.4byte	.LBE89-.LBB89
+	.byte	0x1
+	.2byte	0x2e1
+	.4byte	0x136c
+	.uleb128 0x2e
+	.4byte	0x1b3f
+	.4byte	.LLST80
+	.uleb128 0x2e
+	.4byte	0x1b33
+	.4byte	.LLST81
+	.uleb128 0x2e
+	.4byte	0x1b27
+	.4byte	.LLST82
+	.uleb128 0x2f
+	.4byte	0x1b1b
+	.uleb128 0x2e
+	.4byte	0x1b0f
+	.4byte	.LLST83
+	.uleb128 0x38
+	.4byte	.LBB90
+	.4byte	.LBE90-.LBB90
+	.uleb128 0x32
+	.4byte	0x1b4b
+	.4byte	.LLST84
+	.uleb128 0x31
+	.4byte	0x1b57
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -196
+	.uleb128 0x32
+	.4byte	0x1b63
+	.4byte	.LLST85
+	.uleb128 0x39
+	.4byte	.LVL170
+	.4byte	0x239b
+	.4byte	0x12ac
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC23
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x3
+	.byte	0x7d
+	.sleb128 124
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LVL172
+	.4byte	0x21d1
+	.4byte	0x12d7
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x7d
+	.sleb128 100
+	.byte	0x6
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC23
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LVL175
+	.4byte	0x2501
+	.4byte	0x12ff
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC24
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LVL176
+	.4byte	0x2501
+	.4byte	0x1327
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC25
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x35
+	.4byte	.LVL177
+	.4byte	0x250d
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x7d
+	.sleb128 96
+	.byte	0x6
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x4
+	.byte	0x7d
+	.sleb128 92
+	.byte	0x6
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x4
+	.byte	0x7d
+	.sleb128 88
+	.byte	0x6
+	.uleb128 0x36
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x4
+	.byte	0x7d
+	.sleb128 84
+	.byte	0x6
+	.uleb128 0x36
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 4
+	.uleb128 0x4
+	.byte	0x7d
+	.sleb128 80
+	.byte	0x6
+	.uleb128 0x36
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 8
+	.uleb128 0x4
+	.byte	0x7d
+	.sleb128 76
+	.byte	0x6
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LVL159
+	.4byte	0x21d1
+	.4byte	0x1397
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x7d
+	.sleb128 100
+	.byte	0x6
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC23
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LVL164
+	.4byte	0x1ca2
+	.4byte	0x13c7
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x4
+	.byte	0x7d
+	.sleb128 96
+	.byte	0x6
+	.uleb128 0x36
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 4
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.uleb128 0x35
+	.4byte	.LVL166
+	.4byte	0x1b70
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x4
+	.byte	0x7d
+	.sleb128 100
+	.byte	0x6
+	.byte	0
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LVL135
+	.4byte	0x19a9
+	.4byte	0x141c
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x4
+	.byte	0x7d
+	.sleb128 92
+	.byte	0x6
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x3
+	.byte	0x7d
+	.sleb128 112
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LVL136
+	.4byte	0x2518
+	.4byte	0x1439
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC18
+	.byte	0
+	.uleb128 0x3a
+	.4byte	.LVL137
+	.4byte	0x2524
+	.uleb128 0x39
+	.4byte	.LVL138
+	.4byte	0x2530
+	.4byte	0x1459
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC19
+	.byte	0
+	.uleb128 0x3a
+	.4byte	.LVL139
+	.4byte	0x253b
+	.uleb128 0x39
+	.4byte	.LVL140
+	.4byte	0x21d1
+	.4byte	0x148d
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x7d
+	.sleb128 100
+	.byte	0x6
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC20
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LVL142
+	.4byte	0x1ca2
+	.4byte	0x14bc
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
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+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x2
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+	.sleb128 0
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
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+	.uleb128 0x2
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+	.sleb128 4
+	.uleb128 0x3
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+	.4byte	0x1a9e
+	.uleb128 0x39
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+	.4byte	0x2530
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+	.uleb128 0x36
+	.uleb128 0x1
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+	.uleb128 0x5
+	.byte	0x3
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+	.byte	0
+	.uleb128 0x39
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+	.4byte	0x21d1
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+	.uleb128 0x36
+	.uleb128 0x1
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+	.uleb128 0x1
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+	.uleb128 0x4
+	.byte	0x7d
+	.sleb128 100
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+	.uleb128 0x1
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+	.uleb128 0x36
+	.uleb128 0x1
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+	.uleb128 0x1
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+	.4byte	0x21d1
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+	.uleb128 0x36
+	.uleb128 0x1
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+	.uleb128 0x1
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+	.uleb128 0x4
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+	.uleb128 0x1
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+	.uleb128 0x5
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+	.uleb128 0x36
+	.uleb128 0x1
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+	.uleb128 0x1
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+	.uleb128 0x36
+	.uleb128 0x1
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+	.uleb128 0x1
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+	.uleb128 0x1
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+	.byte	0x76
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+	.uleb128 0x2
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+	.uleb128 0x2
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+	.4byte	0x1b70
+	.uleb128 0x36
+	.uleb128 0x1
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+	.uleb128 0x1
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+	.uleb128 0x2
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+	.uleb128 0x1
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+	.uleb128 0x2
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+	.uleb128 0x1
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+	.uleb128 0x2
+	.byte	0x76
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+	.uleb128 0x2
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+	.sleb128 0
+	.uleb128 0x4
+	.byte	0x7d
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+	.byte	0x6
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+	.4byte	0x1758
+	.uleb128 0x2e
+	.4byte	0x1894
+	.4byte	.LLST86
+	.uleb128 0x2e
+	.4byte	0x1888
+	.4byte	.LLST87
+	.uleb128 0x30
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+	.uleb128 0x31
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+	.uleb128 0x3
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+	.uleb128 0x31
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+	.uleb128 0x3
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+	.sleb128 -196
+	.uleb128 0x3b
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+	.4byte	0x24e2
+	.4byte	.LLST89
+	.uleb128 0x32
+	.4byte	0x18c4
+	.4byte	.LLST90
+	.uleb128 0x31
+	.4byte	0x18d0
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -212
+	.uleb128 0x32
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+	.4byte	.LLST91
+	.uleb128 0x32
+	.4byte	0x18e8
+	.4byte	.LLST92
+	.uleb128 0x32
+	.4byte	0x18f4
+	.4byte	.LLST93
+	.uleb128 0x32
+	.4byte	0x1900
+	.4byte	.LLST94
+	.uleb128 0x32
+	.4byte	0x190a
+	.4byte	.LLST95
+	.uleb128 0x32
+	.4byte	0x1916
+	.4byte	.LLST96
+	.uleb128 0x31
+	.4byte	0x1922
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -152
+	.uleb128 0x33
+	.4byte	0x192e
+	.uleb128 0x39
+	.4byte	.LVL184
+	.4byte	0x1970
+	.4byte	0x1645
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
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+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
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+	.uleb128 0x39
+	.4byte	.LVL186
+	.4byte	0x2546
+	.4byte	0x165a
+	.uleb128 0x36
+	.uleb128 0x1
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+	.uleb128 0x3
+	.byte	0x77
+	.sleb128 152
+	.byte	0
+	.uleb128 0x3a
+	.4byte	.LVL187
+	.4byte	0x2530
+	.uleb128 0x3c
+	.4byte	.LVL191
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
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+	.uleb128 0x36
+	.uleb128 0x1
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+	.uleb128 0x2
+	.byte	0x75
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+	.uleb128 0x1
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+	.uleb128 0x2
+	.byte	0x78
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+	.uleb128 0x1
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+	.uleb128 0x1
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+	.uleb128 0x36
+	.uleb128 0x1
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+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
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+	.uleb128 0x39
+	.4byte	.LVL194
+	.4byte	0x19a9
+	.4byte	0x16ae
+	.uleb128 0x36
+	.uleb128 0x1
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+	.uleb128 0x2
+	.byte	0x75
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+	.uleb128 0x1
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+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
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+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
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+	.uleb128 0x1
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+	.uleb128 0x3
+	.byte	0x77
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+	.uleb128 0x39
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+	.4byte	0x16cd
+	.uleb128 0x36
+	.uleb128 0x1
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+	.uleb128 0x4
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+	.uleb128 0x36
+	.uleb128 0x1
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+	.uleb128 0x5
+	.byte	0x3
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+	.byte	0
+	.uleb128 0x39
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+	.uleb128 0x36
+	.uleb128 0x1
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+	.uleb128 0x4
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+	.uleb128 0x36
+	.uleb128 0x1
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+	.uleb128 0x4
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+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x7a
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+	.uleb128 0x36
+	.uleb128 0x1
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+	.uleb128 0x1
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+	.uleb128 0x39
+	.4byte	.LVL199
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+	.uleb128 0x36
+	.uleb128 0x1
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+	.uleb128 0x2
+	.byte	0x75
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+	.uleb128 0x36
+	.uleb128 0x1
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+	.uleb128 0x2
+	.byte	0x78
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+	.uleb128 0x1
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+	.uleb128 0x4
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+	.uleb128 0x36
+	.uleb128 0x2
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+	.uleb128 0x36
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
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+	.uleb128 0x36
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.uleb128 0x1
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+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x3d
+	.4byte	0xd2
+	.4byte	.LLST88
+	.uleb128 0x39
+	.4byte	.LVL128
+	.4byte	0x2530
+	.4byte	0x177e
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC15
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.byte	0
+	.uleb128 0x3c
+	.4byte	.LVL129
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.4byte	0x17a7
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x4
+	.byte	0x7d
+	.sleb128 96
+	.byte	0x6
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x4
+	.byte	0x7d
+	.sleb128 92
+	.byte	0x6
+	.byte	0
+	.uleb128 0x3a
+	.4byte	.LVL130
+	.4byte	0x2530
+	.byte	0
+	.uleb128 0x3e
+	.4byte	.LASF322
+	.byte	0x1
+	.2byte	0x229
+	.4byte	0x50
+	.byte	0x1
+	.4byte	0x1862
+	.uleb128 0x3f
+	.4byte	.LASF312
+	.byte	0x1
+	.2byte	0x229
+	.4byte	0x1041
+	.uleb128 0x3f
+	.4byte	.LASF313
+	.byte	0x1
+	.2byte	0x22a
+	.4byte	0x1035
+	.uleb128 0x3f
+	.4byte	.LASF314
+	.byte	0x1
+	.2byte	0x22b
+	.4byte	0x122
+	.uleb128 0x3f
+	.4byte	.LASF316
+	.byte	0x1
+	.2byte	0x22b
+	.4byte	0x14e
+	.uleb128 0x40
+	.4byte	.LASF222
+	.byte	0x1
+	.2byte	0x22d
+	.4byte	0xf3e
+	.uleb128 0x40
+	.4byte	.LASF317
+	.byte	0x1
+	.2byte	0x22e
+	.4byte	0x50
+	.uleb128 0x40
+	.4byte	.LASF257
+	.byte	0x1
+	.2byte	0x22f
+	.4byte	0x50
+	.uleb128 0x41
+	.ascii	"ret\000"
+	.byte	0x1
+	.2byte	0x22f
+	.4byte	0x50
+	.uleb128 0x40
+	.4byte	.LASF318
+	.byte	0x1
+	.2byte	0x230
+	.4byte	0x50
+	.uleb128 0x40
+	.4byte	.LASF319
+	.byte	0x1
+	.2byte	0x231
+	.4byte	0x50
+	.uleb128 0x41
+	.ascii	"fit\000"
+	.byte	0x1
+	.2byte	0x232
+	.4byte	0x14e
+	.uleb128 0x42
+	.4byte	.LASF320
+	.4byte	0x1872
+	.4byte	.LASF322
+	.uleb128 0x43
+	.uleb128 0x40
+	.4byte	.LASF321
+	.byte	0x1
+	.2byte	0x2be
+	.4byte	0x12d
+	.byte	0
+	.byte	0
+	.uleb128 0xc
+	.4byte	0xe4
+	.4byte	0x1872
+	.uleb128 0xd
+	.4byte	0xcb
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x1862
+	.uleb128 0x3e
+	.4byte	.LASF323
+	.byte	0x1
+	.2byte	0x1b5
+	.4byte	0x50
+	.byte	0x1
+	.4byte	0x193c
+	.uleb128 0x3f
+	.4byte	.LASF312
+	.byte	0x1
+	.2byte	0x1b5
+	.4byte	0x1041
+	.uleb128 0x3f
+	.4byte	.LASF313
+	.byte	0x1
+	.2byte	0x1b6
+	.4byte	0x1035
+	.uleb128 0x40
+	.4byte	.LASF257
+	.byte	0x1
+	.2byte	0x1c1
+	.4byte	0x193c
+	.uleb128 0x40
+	.4byte	.LASF222
+	.byte	0x1
+	.2byte	0x1c2
+	.4byte	0xf3e
+	.uleb128 0x40
+	.4byte	.LASF316
+	.byte	0x1
+	.2byte	0x1c3
+	.4byte	0x194c
+	.uleb128 0x40
+	.4byte	.LASF324
+	.byte	0x1
+	.2byte	0x1c4
+	.4byte	0x50
+	.uleb128 0x40
+	.4byte	.LASF317
+	.byte	0x1
+	.2byte	0x1c5
+	.4byte	0x50
+	.uleb128 0x40
+	.4byte	.LASF314
+	.byte	0x1
+	.2byte	0x1c6
+	.4byte	0x50
+	.uleb128 0x40
+	.4byte	.LASF319
+	.byte	0x1
+	.2byte	0x1c7
+	.4byte	0x50
+	.uleb128 0x41
+	.ascii	"ret\000"
+	.byte	0x1
+	.2byte	0x1c7
+	.4byte	0x50
+	.uleb128 0x41
+	.ascii	"i\000"
+	.byte	0x1
+	.2byte	0x1c7
+	.4byte	0x50
+	.uleb128 0x41
+	.ascii	"fit\000"
+	.byte	0x1
+	.2byte	0x1c8
+	.4byte	0x14e
+	.uleb128 0x40
+	.4byte	.LASF325
+	.byte	0x1
+	.2byte	0x1ce
+	.4byte	0xd7
+	.uleb128 0x40
+	.4byte	.LASF326
+	.byte	0x1
+	.2byte	0x1cf
+	.4byte	0x4a7
+	.uleb128 0x42
+	.4byte	.LASF320
+	.4byte	0x196b
+	.4byte	.LASF323
+	.byte	0
+	.uleb128 0xc
+	.4byte	0xd7
+	.4byte	0x194c
+	.uleb128 0xd
+	.4byte	0xcb
+	.byte	0x2
+	.byte	0
+	.uleb128 0xc
+	.4byte	0xdd
+	.4byte	0x195b
+	.uleb128 0x44
+	.4byte	0xcb
+	.byte	0
+	.uleb128 0xc
+	.4byte	0xe4
+	.4byte	0x196b
+	.uleb128 0xd
+	.4byte	0xcb
+	.byte	0x13
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x195b
+	.uleb128 0x45
+	.4byte	.LASF328
+	.byte	0x1
+	.2byte	0x1ae
+	.4byte	0xd7
+	.4byte	.LFB212
+	.4byte	.LFE212-.LFB212
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x19a9
+	.uleb128 0x2a
+	.ascii	"spl\000"
+	.byte	0x1
+	.2byte	0x1ae
+	.4byte	0x1041
+	.4byte	.LLST58
+	.uleb128 0x46
+	.4byte	.LASF313
+	.byte	0x1
+	.2byte	0x1af
+	.4byte	0x1035
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0
+	.uleb128 0x47
+	.4byte	.LASF338
+	.byte	0x1
+	.2byte	0x17c
+	.4byte	0x14e
+	.4byte	.LFB211
+	.4byte	.LFE211-.LFB211
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x1a98
+	.uleb128 0x29
+	.4byte	.LASF313
+	.byte	0x1
+	.2byte	0x17c
+	.4byte	0x1035
+	.4byte	.LLST47
+	.uleb128 0x29
+	.4byte	.LASF314
+	.byte	0x1
+	.2byte	0x17d
+	.4byte	0x122
+	.4byte	.LLST48
+	.uleb128 0x29
+	.4byte	.LASF316
+	.byte	0x1
+	.2byte	0x17d
+	.4byte	0x14e
+	.4byte	.LLST49
+	.uleb128 0x29
+	.4byte	.LASF317
+	.byte	0x1
+	.2byte	0x17e
+	.4byte	0x1a98
+	.4byte	.LLST50
+	.uleb128 0x48
+	.4byte	.LASF329
+	.byte	0x1
+	.2byte	0x180
+	.4byte	0x50
+	.byte	0x3f
+	.uleb128 0x2b
+	.4byte	.LASF330
+	.byte	0x1
+	.2byte	0x181
+	.4byte	0x122
+	.4byte	.LLST51
+	.uleb128 0x2b
+	.4byte	.LASF78
+	.byte	0x1
+	.2byte	0x182
+	.4byte	0x122
+	.4byte	.LLST52
+	.uleb128 0x40
+	.4byte	.LASF331
+	.byte	0x1
+	.2byte	0x183
+	.4byte	0x50
+	.uleb128 0x2c
+	.ascii	"fit\000"
+	.byte	0x1
+	.2byte	0x184
+	.4byte	0x14e
+	.4byte	.LLST53
+	.uleb128 0x34
+	.4byte	0x2151
+	.4byte	.LBB61
+	.4byte	.LBE61-.LBB61
+	.byte	0x1
+	.2byte	0x1a2
+	.4byte	0x1a7c
+	.uleb128 0x2e
+	.4byte	0x2177
+	.4byte	.LLST54
+	.uleb128 0x2e
+	.4byte	0x216c
+	.4byte	.LLST55
+	.uleb128 0x2e
+	.4byte	0x2161
+	.4byte	.LLST56
+	.byte	0
+	.uleb128 0x49
+	.4byte	.LVL115
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x50
+	.uleb128 0x45
+	.4byte	.LASF332
+	.byte	0x1
+	.2byte	0x177
+	.4byte	0x50
+	.4byte	.LFB210
+	.4byte	.LFE210-.LFB210
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x1ac9
+	.uleb128 0x29
+	.4byte	.LASF298
+	.byte	0x1
+	.2byte	0x177
+	.4byte	0x101
+	.4byte	.LLST57
+	.byte	0
+	.uleb128 0x3e
+	.4byte	.LASF333
+	.byte	0x1
+	.2byte	0x16e
+	.4byte	0x50
+	.byte	0x1
+	.4byte	0x1afe
+	.uleb128 0x4a
+	.ascii	"fit\000"
+	.byte	0x1
+	.2byte	0x16e
+	.4byte	0x3a9
+	.uleb128 0x3f
+	.4byte	.LASF334
+	.byte	0x1
+	.2byte	0x16e
+	.4byte	0x50
+	.uleb128 0x4a
+	.ascii	"os\000"
+	.byte	0x1
+	.2byte	0x16e
+	.4byte	0xd05
+	.byte	0
+	.uleb128 0x3e
+	.4byte	.LASF335
+	.byte	0x1
+	.2byte	0x157
+	.4byte	0x50
+	.byte	0x1
+	.4byte	0x1b70
+	.uleb128 0x4a
+	.ascii	"fit\000"
+	.byte	0x1
+	.2byte	0x157
+	.4byte	0x3a9
+	.uleb128 0x3f
+	.4byte	.LASF257
+	.byte	0x1
+	.2byte	0x157
+	.4byte	0x50
+	.uleb128 0x3f
+	.4byte	.LASF318
+	.byte	0x1
+	.2byte	0x157
+	.4byte	0x50
+	.uleb128 0x3f
+	.4byte	.LASF336
+	.byte	0x1
+	.2byte	0x158
+	.4byte	0x14e
+	.uleb128 0x3f
+	.4byte	.LASF337
+	.byte	0x1
+	.2byte	0x158
+	.4byte	0x1041
+	.uleb128 0x41
+	.ascii	"ret\000"
+	.byte	0x1
+	.2byte	0x15a
+	.4byte	0x50
+	.uleb128 0x40
+	.4byte	.LASF74
+	.byte	0x1
+	.2byte	0x15c
+	.4byte	0xfb
+	.uleb128 0x40
+	.4byte	.LASF319
+	.byte	0x1
+	.2byte	0x15d
+	.4byte	0x50
+	.byte	0
+	.uleb128 0x4b
+	.4byte	.LASF339
+	.byte	0x1
+	.2byte	0x134
+	.4byte	0x50
+	.4byte	.LFB207
+	.4byte	.LFE207-.LFB207
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x1c8d
+	.uleb128 0x29
+	.4byte	.LASF312
+	.byte	0x1
+	.2byte	0x134
+	.4byte	0x1041
+	.4byte	.LLST39
+	.uleb128 0x29
+	.4byte	.LASF313
+	.byte	0x1
+	.2byte	0x135
+	.4byte	0x1035
+	.4byte	.LLST40
+	.uleb128 0x29
+	.4byte	.LASF314
+	.byte	0x1
+	.2byte	0x135
+	.4byte	0x122
+	.4byte	.LLST41
+	.uleb128 0x2a
+	.ascii	"fit\000"
+	.byte	0x1
+	.2byte	0x136
+	.4byte	0x14e
+	.4byte	.LLST42
+	.uleb128 0x29
+	.4byte	.LASF257
+	.byte	0x1
+	.2byte	0x136
+	.4byte	0x50
+	.4byte	.LLST43
+	.uleb128 0x29
+	.4byte	.LASF317
+	.byte	0x1
+	.2byte	0x136
+	.4byte	0x122
+	.4byte	.LLST44
+	.uleb128 0x4c
+	.4byte	.LASF222
+	.byte	0x1
+	.2byte	0x138
+	.4byte	0xf3e
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -68
+	.uleb128 0x2b
+	.4byte	.LASF319
+	.byte	0x1
+	.2byte	0x139
+	.4byte	0x50
+	.4byte	.LLST45
+	.uleb128 0x2c
+	.ascii	"ret\000"
+	.byte	0x1
+	.2byte	0x139
+	.4byte	0x50
+	.4byte	.LLST46
+	.uleb128 0x4d
+	.4byte	.LASF320
+	.4byte	0x1c9d
+	.uleb128 0x39
+	.4byte	.LVL99
+	.4byte	0x21d1
+	.4byte	0x1c4c
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 0
+	.byte	0x6
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LVL101
+	.4byte	0x1ca2
+	.4byte	0x1c7b
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 4
+	.byte	0x6
+	.uleb128 0x36
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 4
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -68
+	.byte	0
+	.uleb128 0x35
+	.4byte	.LVL103
+	.4byte	0x255c
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x2000
+	.byte	0
+	.byte	0
+	.uleb128 0xc
+	.4byte	0xe4
+	.4byte	0x1c9d
+	.uleb128 0xd
+	.4byte	0xcb
+	.byte	0x12
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x1c8d
+	.uleb128 0x4e
+	.4byte	.LASF340
+	.byte	0x1
+	.byte	0xa3
+	.4byte	0x50
+	.4byte	.LFB206
+	.4byte	.LFE206-.LFB206
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2151
+	.uleb128 0x4f
+	.4byte	.LASF313
+	.byte	0x1
+	.byte	0xa3
+	.4byte	0x1035
+	.4byte	.LLST15
+	.uleb128 0x4f
+	.4byte	.LASF314
+	.byte	0x1
+	.byte	0xa3
+	.4byte	0x122
+	.4byte	.LLST16
+	.uleb128 0x50
+	.ascii	"fit\000"
+	.byte	0x1
+	.byte	0xa4
+	.4byte	0x14e
+	.4byte	.LLST17
+	.uleb128 0x4f
+	.4byte	.LASF317
+	.byte	0x1
+	.byte	0xa4
+	.4byte	0x122
+	.4byte	.LLST18
+	.uleb128 0x4f
+	.4byte	.LASF319
+	.byte	0x1
+	.byte	0xa4
+	.4byte	0x50
+	.4byte	.LLST19
+	.uleb128 0x4f
+	.4byte	.LASF222
+	.byte	0x1
+	.byte	0xa5
+	.4byte	0x1041
+	.4byte	.LLST20
+	.uleb128 0x51
+	.4byte	.LASF341
+	.byte	0x1
+	.byte	0xa7
+	.4byte	0x50
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -60
+	.uleb128 0x51
+	.4byte	.LASF342
+	.byte	0x1
+	.byte	0xa8
+	.4byte	0x10c
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -56
+	.uleb128 0x52
+	.ascii	"len\000"
+	.byte	0x1
+	.byte	0xa9
+	.4byte	0x50
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -52
+	.uleb128 0x53
+	.4byte	.LASF78
+	.byte	0x1
+	.byte	0xaa
+	.4byte	0x122
+	.uleb128 0x51
+	.4byte	.LASF343
+	.byte	0x1
+	.byte	0xab
+	.4byte	0x122
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -48
+	.uleb128 0x51
+	.4byte	.LASF261
+	.byte	0x1
+	.byte	0xab
+	.4byte	0x122
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -44
+	.uleb128 0x54
+	.4byte	.LASF344
+	.byte	0x1
+	.byte	0xab
+	.4byte	0x122
+	.4byte	.LLST21
+	.uleb128 0x52
+	.ascii	"src\000"
+	.byte	0x1
+	.byte	0xac
+	.4byte	0x14e
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -40
+	.uleb128 0x54
+	.4byte	.LASF345
+	.byte	0x1
+	.byte	0xad
+	.4byte	0x122
+	.4byte	.LLST22
+	.uleb128 0x53
+	.4byte	.LASF346
+	.byte	0x1
+	.byte	0xae
+	.4byte	0x50
+	.uleb128 0x55
+	.4byte	.LASF329
+	.byte	0x1
+	.byte	0xaf
+	.4byte	0x50
+	.byte	0x3f
+	.uleb128 0x51
+	.4byte	.LASF347
+	.byte	0x1
+	.byte	0xb0
+	.4byte	0x12d
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -61
+	.uleb128 0x54
+	.4byte	.LASF62
+	.byte	0x1
+	.byte	0xb0
+	.4byte	0x12d
+	.4byte	.LLST23
+	.uleb128 0x51
+	.4byte	.LASF348
+	.byte	0x1
+	.byte	0xb1
+	.4byte	0x3a9
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x54
+	.4byte	.LASF349
+	.byte	0x1
+	.byte	0xb2
+	.4byte	0x189
+	.4byte	.LLST24
+	.uleb128 0x54
+	.4byte	.LASF350
+	.byte	0x1
+	.byte	0xb3
+	.4byte	0x189
+	.4byte	.LLST25
+	.uleb128 0x54
+	.4byte	.LASF351
+	.byte	0x1
+	.byte	0xb4
+	.4byte	0x4cd
+	.4byte	.LLST26
+	.uleb128 0x56
+	.ascii	"out\000"
+	.byte	0x1
+	.2byte	0x12a
+	.4byte	.L31
+	.uleb128 0x57
+	.4byte	0x2183
+	.4byte	.LBB35
+	.4byte	.Ldebug_ranges0+0
+	.byte	0x1
+	.byte	0xe3
+	.4byte	0x1e33
+	.uleb128 0x2e
+	.4byte	0x219e
+	.4byte	.LLST27
+	.uleb128 0x2e
+	.4byte	0x2193
+	.4byte	.LLST28
+	.byte	0
+	.uleb128 0x58
+	.4byte	0x2151
+	.4byte	.LBB40
+	.4byte	.LBE40-.LBB40
+	.byte	0x1
+	.byte	0xe4
+	.4byte	0x1e5e
+	.uleb128 0x2f
+	.4byte	0x2177
+	.uleb128 0x2e
+	.4byte	0x216c
+	.4byte	.LLST29
+	.uleb128 0x2e
+	.4byte	0x2161
+	.4byte	.LLST30
+	.byte	0
+	.uleb128 0x57
+	.4byte	0x21aa
+	.4byte	.LBB42
+	.4byte	.Ldebug_ranges0+0x20
+	.byte	0x1
+	.byte	0xed
+	.4byte	0x1e84
+	.uleb128 0x2e
+	.4byte	0x21c5
+	.4byte	.LLST31
+	.uleb128 0x2e
+	.4byte	0x21ba
+	.4byte	.LLST32
+	.byte	0
+	.uleb128 0x2d
+	.4byte	0x2327
+	.4byte	.LBB47
+	.4byte	.Ldebug_ranges0+0x38
+	.byte	0x1
+	.2byte	0x106
+	.4byte	0x1ecf
+	.uleb128 0x2e
+	.4byte	0x2350
+	.4byte	.LLST33
+	.uleb128 0x2e
+	.4byte	0x2344
+	.4byte	.LLST34
+	.uleb128 0x2e
+	.4byte	0x2338
+	.4byte	.LLST35
+	.uleb128 0x35
+	.4byte	.LVL77
+	.4byte	0x2567
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x34
+	.4byte	0x2327
+	.4byte	.LBB53
+	.4byte	.LBE53-.LBB53
+	.byte	0x1
+	.2byte	0x10b
+	.4byte	0x1f08
+	.uleb128 0x2e
+	.4byte	0x2350
+	.4byte	.LLST36
+	.uleb128 0x2e
+	.4byte	0x2344
+	.4byte	.LLST37
+	.uleb128 0x2e
+	.4byte	0x2338
+	.4byte	.LLST38
+	.uleb128 0x3a
+	.4byte	.LVL86
+	.4byte	0x2567
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LVL45
+	.4byte	0x2573
+	.4byte	0x1f28
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -61
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LVL46
+	.4byte	0x257f
+	.4byte	0x1f48
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -44
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LVL47
+	.4byte	0x258b
+	.4byte	0x1f68
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -48
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LVL48
+	.4byte	0x2597
+	.4byte	0x1f88
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -60
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LVL49
+	.4byte	0x25a3
+	.4byte	0x1fa8
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -60
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LVL52
+	.4byte	0x25af
+	.4byte	0x1fc8
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -52
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LVL54
+	.4byte	0x25bb
+	.4byte	0x1fdc
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x40
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LVL61
+	.4byte	0x25c7
+	.4byte	0x1ff6
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x59
+	.4byte	.LVL64
+	.4byte	0x2014
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -80
+	.byte	0x6
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LVL65
+	.4byte	0x2530
+	.4byte	0x202b
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LVL66
+	.4byte	0x25d3
+	.4byte	0x204e
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC13
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LVL79
+	.4byte	0x2501
+	.4byte	0x2076
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC9
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LVL80
+	.4byte	0x2530
+	.4byte	0x2099
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC10
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LVL81
+	.4byte	0x25df
+	.4byte	0x20b3
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LVL82
+	.4byte	0x25eb
+	.4byte	0x20e0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -44
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -40
+	.uleb128 0x36
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -56
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LVL83
+	.4byte	0x25f7
+	.4byte	0x20f7
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC12
+	.byte	0
+	.uleb128 0x3a
+	.4byte	.LVL84
+	.4byte	0x2602
+	.uleb128 0x39
+	.4byte	.LVL87
+	.4byte	0x2530
+	.4byte	0x2117
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC11
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LVL91
+	.4byte	0x260e
+	.4byte	0x213d
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -56
+	.byte	0
+	.uleb128 0x35
+	.4byte	.LVL92
+	.4byte	0x25f7
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.byte	0
+	.byte	0
+	.uleb128 0x5a
+	.4byte	.LASF352
+	.byte	0x1
+	.byte	0x87
+	.4byte	0x50
+	.byte	0x1
+	.4byte	0x2183
+	.uleb128 0x5b
+	.4byte	.LASF313
+	.byte	0x1
+	.byte	0x87
+	.4byte	0x1035
+	.uleb128 0x5b
+	.4byte	.LASF353
+	.byte	0x1
+	.byte	0x87
+	.4byte	0x50
+	.uleb128 0x5b
+	.4byte	.LASF341
+	.byte	0x1
+	.byte	0x88
+	.4byte	0x50
+	.byte	0
+	.uleb128 0x5a
+	.4byte	.LASF354
+	.byte	0x1
+	.byte	0x79
+	.4byte	0x50
+	.byte	0x1
+	.4byte	0x21aa
+	.uleb128 0x5b
+	.4byte	.LASF313
+	.byte	0x1
+	.byte	0x79
+	.4byte	0x1035
+	.uleb128 0x5b
+	.4byte	.LASF341
+	.byte	0x1
+	.byte	0x79
+	.4byte	0x50
+	.byte	0
+	.uleb128 0x5a
+	.4byte	.LASF355
+	.byte	0x1
+	.byte	0x6c
+	.4byte	0x50
+	.byte	0x1
+	.4byte	0x21d1
+	.uleb128 0x5b
+	.4byte	.LASF313
+	.byte	0x1
+	.byte	0x6c
+	.4byte	0x1035
+	.uleb128 0x5b
+	.4byte	.LASF341
+	.byte	0x1
+	.byte	0x6c
+	.4byte	0x50
+	.byte	0
+	.uleb128 0x5c
+	.4byte	.LASF356
+	.byte	0x1
+	.byte	0x56
+	.4byte	0x50
+	.4byte	.LFB202
+	.4byte	.LFE202-.LFB202
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2299
+	.uleb128 0x50
+	.ascii	"fit\000"
+	.byte	0x1
+	.byte	0x56
+	.4byte	0x3a9
+	.4byte	.LLST9
+	.uleb128 0x4f
+	.4byte	.LASF257
+	.byte	0x1
+	.byte	0x56
+	.4byte	0x50
+	.4byte	.LLST10
+	.uleb128 0x4f
+	.4byte	.LASF62
+	.byte	0x1
+	.byte	0x57
+	.4byte	0xd7
+	.4byte	.LLST11
+	.uleb128 0x4f
+	.4byte	.LASF318
+	.byte	0x1
+	.byte	0x57
+	.4byte	0x50
+	.4byte	.LLST12
+	.uleb128 0x52
+	.ascii	"str\000"
+	.byte	0x1
+	.byte	0x59
+	.4byte	0xfb
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -20
+	.uleb128 0x5d
+	.ascii	"err\000"
+	.byte	0x1
+	.byte	0x5a
+	.4byte	0x50
+	.4byte	.LLST13
+	.uleb128 0x54
+	.4byte	.LASF319
+	.byte	0x1
+	.byte	0x5b
+	.4byte	0x50
+	.4byte	.LLST14
+	.uleb128 0x39
+	.4byte	.LVL34
+	.4byte	0x239b
+	.4byte	0x2282
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -20
+	.uleb128 0x5e
+	.4byte	0x22b4
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x35
+	.4byte	.LVL36
+	.4byte	0x261a
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x5a
+	.4byte	.LASF357
+	.byte	0x1
+	.byte	0x20
+	.4byte	0x50
+	.byte	0x1
+	.4byte	0x2321
+	.uleb128 0x5f
+	.ascii	"fit\000"
+	.byte	0x1
+	.byte	0x20
+	.4byte	0x3a9
+	.uleb128 0x5b
+	.4byte	.LASF257
+	.byte	0x1
+	.byte	0x20
+	.4byte	0x50
+	.uleb128 0x5b
+	.4byte	.LASF62
+	.byte	0x1
+	.byte	0x21
+	.4byte	0xd7
+	.uleb128 0x5b
+	.4byte	.LASF318
+	.byte	0x1
+	.byte	0x21
+	.4byte	0x50
+	.uleb128 0x5b
+	.4byte	.LASF358
+	.byte	0x1
+	.byte	0x22
+	.4byte	0x2321
+	.uleb128 0x53
+	.4byte	.LASF74
+	.byte	0x1
+	.byte	0x24
+	.4byte	0xd7
+	.uleb128 0x60
+	.ascii	"str\000"
+	.byte	0x1
+	.byte	0x24
+	.4byte	0xd7
+	.uleb128 0x53
+	.4byte	.LASF319
+	.byte	0x1
+	.byte	0x25
+	.4byte	0x50
+	.uleb128 0x53
+	.4byte	.LASF359
+	.byte	0x1
+	.byte	0x26
+	.4byte	0x50
+	.uleb128 0x60
+	.ascii	"len\000"
+	.byte	0x1
+	.byte	0x27
+	.4byte	0x50
+	.uleb128 0x60
+	.ascii	"i\000"
+	.byte	0x1
+	.byte	0x27
+	.4byte	0x50
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xfb
+	.uleb128 0x3e
+	.4byte	.LASF360
+	.byte	0x2
+	.2byte	0x3e8
+	.4byte	0xd7
+	.byte	0x3
+	.4byte	0x235d
+	.uleb128 0x3f
+	.4byte	.LASF361
+	.byte	0x2
+	.2byte	0x3e8
+	.4byte	0x3a9
+	.uleb128 0x3f
+	.4byte	.LASF334
+	.byte	0x2
+	.2byte	0x3e9
+	.4byte	0x50
+	.uleb128 0x4a
+	.ascii	"len\000"
+	.byte	0x2
+	.2byte	0x3e9
+	.4byte	0x1a98
+	.byte	0
+	.uleb128 0x3e
+	.4byte	.LASF362
+	.byte	0x2
+	.2byte	0x2df
+	.4byte	0x138
+	.byte	0x3
+	.4byte	0x237b
+	.uleb128 0x4a
+	.ascii	"hdr\000"
+	.byte	0x2
+	.2byte	0x2df
+	.4byte	0x237b
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xabb
+	.uleb128 0x5a
+	.4byte	.LASF363
+	.byte	0x18
+	.byte	0x70
+	.4byte	0x70
+	.byte	0x3
+	.4byte	0x239b
+	.uleb128 0x5f
+	.ascii	"x\000"
+	.byte	0x18
+	.byte	0x70
+	.4byte	0x70
+	.byte	0
+	.uleb128 0x61
+	.4byte	0x2299
+	.4byte	.LFB216
+	.4byte	.LFE216-.LFB216
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x24e2
+	.uleb128 0x2e
+	.4byte	0x22a9
+	.4byte	.LLST0
+	.uleb128 0x2e
+	.4byte	0x22bf
+	.4byte	.LLST1
+	.uleb128 0x2e
+	.4byte	0x22ca
+	.4byte	.LLST2
+	.uleb128 0x2e
+	.4byte	0x22d5
+	.4byte	.LLST3
+	.uleb128 0x62
+	.4byte	0x22b4
+	.uleb128 0x6
+	.byte	0xfa
+	.4byte	0x22b4
+	.byte	0x9f
+	.uleb128 0x32
+	.4byte	0x22e0
+	.4byte	.LLST4
+	.uleb128 0x32
+	.4byte	0x22eb
+	.4byte	.LLST5
+	.uleb128 0x32
+	.4byte	0x22f6
+	.4byte	.LLST6
+	.uleb128 0x32
+	.4byte	0x2301
+	.4byte	.LLST7
+	.uleb128 0x31
+	.4byte	0x230c
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -28
+	.uleb128 0x32
+	.4byte	0x2317
+	.4byte	.LLST8
+	.uleb128 0x39
+	.4byte	.LVL1
+	.4byte	0x2626
+	.4byte	0x2427
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LVL5
+	.4byte	0x2530
+	.4byte	0x243e
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC4
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LVL6
+	.4byte	0x2632
+	.4byte	0x2458
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LVL11
+	.4byte	0x2501
+	.4byte	0x247e
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -28
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LVL13
+	.4byte	0x2530
+	.4byte	0x2492
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LVL14
+	.4byte	0x263d
+	.4byte	0x24ac
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LVL18
+	.4byte	0x2501
+	.4byte	0x24d2
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -28
+	.byte	0
+	.uleb128 0x35
+	.4byte	.LVL23
+	.4byte	0x2648
+	.uleb128 0x36
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0xc
+	.4byte	0xdd
+	.4byte	0x24f5
+	.uleb128 0x63
+	.4byte	0xcb
+	.4byte	0x1758
+	.byte	0
+	.uleb128 0x64
+	.4byte	.LASF364
+	.4byte	.LASF364
+	.byte	0x2
+	.2byte	0x3f3
+	.uleb128 0x64
+	.4byte	.LASF365
+	.4byte	.LASF365
+	.byte	0x19
+	.2byte	0x2b2
+	.uleb128 0x65
+	.4byte	.LASF366
+	.4byte	.LASF366
+	.byte	0x1a
+	.byte	0x98
+	.uleb128 0x64
+	.4byte	.LASF367
+	.4byte	.LASF367
+	.byte	0x19
+	.2byte	0x1a8
+	.uleb128 0x64
+	.4byte	.LASF368
+	.4byte	.LASF368
+	.byte	0x2
+	.2byte	0x42c
+	.uleb128 0x65
+	.4byte	.LASF369
+	.4byte	.LASF369
+	.byte	0x1b
+	.byte	0x13
+	.uleb128 0x65
+	.4byte	.LASF370
+	.4byte	.LASF370
+	.byte	0x3
+	.byte	0x61
+	.uleb128 0x65
+	.4byte	.LASF371
+	.4byte	.LASF371
+	.byte	0xc
+	.byte	0xbd
+	.uleb128 0x65
+	.4byte	.LASF372
+	.4byte	.LASF372
+	.byte	0x8
+	.byte	0x27
+	.uleb128 0x65
+	.4byte	.LASF373
+	.4byte	.LASF373
+	.byte	0x1a
+	.byte	0xce
+	.uleb128 0x64
+	.4byte	.LASF374
+	.4byte	.LASF374
+	.byte	0x19
+	.2byte	0x1c1
+	.uleb128 0x64
+	.4byte	.LASF375
+	.4byte	.LASF375
+	.byte	0x2
+	.2byte	0x3f6
+	.uleb128 0x64
+	.4byte	.LASF376
+	.4byte	.LASF376
+	.byte	0x2
+	.2byte	0x3f8
+	.uleb128 0x64
+	.4byte	.LASF377
+	.4byte	.LASF377
+	.byte	0x2
+	.2byte	0x3fa
+	.uleb128 0x64
+	.4byte	.LASF378
+	.4byte	.LASF378
+	.byte	0x2
+	.2byte	0x400
+	.uleb128 0x64
+	.4byte	.LASF379
+	.4byte	.LASF379
+	.byte	0x2
+	.2byte	0x3ff
+	.uleb128 0x64
+	.4byte	.LASF380
+	.4byte	.LASF380
+	.byte	0x2
+	.2byte	0x402
+	.uleb128 0x64
+	.4byte	.LASF381
+	.4byte	.LASF381
+	.byte	0x17
+	.2byte	0x371
+	.uleb128 0x64
+	.4byte	.LASF382
+	.4byte	.LASF382
+	.byte	0x2
+	.2byte	0x3f7
+	.uleb128 0x64
+	.4byte	.LASF383
+	.4byte	.LASF383
+	.byte	0x2
+	.2byte	0x598
+	.uleb128 0x64
+	.4byte	.LASF384
+	.4byte	.LASF384
+	.byte	0x2
+	.2byte	0x427
+	.uleb128 0x64
+	.4byte	.LASF385
+	.4byte	.LASF385
+	.byte	0x2
+	.2byte	0x591
+	.uleb128 0x65
+	.4byte	.LASF386
+	.4byte	.LASF386
+	.byte	0x1b
+	.byte	0x11
+	.uleb128 0x64
+	.4byte	.LASF387
+	.4byte	.LASF387
+	.byte	0x17
+	.2byte	0x16d
+	.uleb128 0x64
+	.4byte	.LASF388
+	.4byte	.LASF388
+	.byte	0x2
+	.2byte	0x3fd
+	.uleb128 0x64
+	.4byte	.LASF389
+	.4byte	.LASF389
+	.byte	0x19
+	.2byte	0x182
+	.uleb128 0x64
+	.4byte	.LASF390
+	.4byte	.LASF390
+	.byte	0x2
+	.2byte	0x5a6
+	.uleb128 0x65
+	.4byte	.LASF391
+	.4byte	.LASF391
+	.byte	0x19
+	.byte	0xa9
+	.uleb128 0x65
+	.4byte	.LASF392
+	.4byte	.LASF392
+	.byte	0x19
+	.byte	0xb6
+	.uleb128 0x65
+	.4byte	.LASF393
+	.4byte	.LASF393
+	.byte	0x8
+	.byte	0x33
+	.byte	0
+	.section	.debug_abbrev,"",%progbits
+.Ldebug_abbrev0:
+	.uleb128 0x1
+	.uleb128 0x11
+	.byte	0x1
+	.uleb128 0x25
+	.uleb128 0xe
+	.uleb128 0x13
+	.uleb128 0xb
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x1b
+	.uleb128 0xe
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x10
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x2
+	.uleb128 0x16
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x24
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3e
+	.uleb128 0xb
+	.uleb128 0x3
+	.uleb128 0xe
+	.byte	0
+	.byte	0
+	.uleb128 0x4
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.byte	0
+	.byte	0
+	.uleb128 0x5
+	.uleb128 0x24
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3e
+	.uleb128 0xb
+	.uleb128 0x3
+	.uleb128 0x8
+	.byte	0
+	.byte	0
+	.uleb128 0x6
+	.uleb128 0x16
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x7
+	.uleb128 0x26
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.uleb128 0xf
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x9
+	.uleb128 0xf
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0xa
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0xc
+	.uleb128 0x1
+	.byte	0x1
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0xd
+	.uleb128 0x21
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2f
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0xe
+	.uleb128 0x21
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0xf
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.byte	0
+	.byte	0
+	.uleb128 0x10
+	.uleb128 0x4
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x11
+	.uleb128 0x28
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x1c
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x12
+	.uleb128 0x17
+	.byte	0x1
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x13
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x14
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x15
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x16
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x17
+	.uleb128 0x13
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3c
+	.uleb128 0x19
+	.byte	0
+	.byte	0
+	.uleb128 0x18
+	.uleb128 0x26
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x19
+	.uleb128 0x15
+	.byte	0x1
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x1a
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x1b
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0xb
+	.uleb128 0x5
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x1c
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x1d
+	.uleb128 0x21
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2f
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x1e
+	.uleb128 0x13
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+	.uleb128 0x5
+	.uleb128 0x11
+	.uleb128 0x1
+	.byte	0
+	.byte	0
+	.uleb128 0x57
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x52
+	.uleb128 0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x58
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x6
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x59
+	.uleb128 0x4109
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x5a
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x20
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x5c
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x6
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x5d
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x5e
+	.uleb128 0x410a
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2111
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x5f
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x60
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x61
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x6
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x62
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x63
+	.uleb128 0x21
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2f
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x64
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x65
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.byte	0
+	.section	.debug_loc,"",%progbits
+.Ldebug_loc0:
+.LLST59:
+	.4byte	.LVL122
+	.4byte	.LVL125
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL125
+	.4byte	.LFE215
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST60:
+	.4byte	.LVL122
+	.4byte	.LVL125
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL125
+	.4byte	.LFE215
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST61:
+	.4byte	.LVL122
+	.4byte	.LVL125
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL125
+	.4byte	.LFE215
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST62:
+	.4byte	.LVL122
+	.4byte	.LVL124
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL124
+	.4byte	.LVL158
+	.2byte	0x3
+	.byte	0x7d
+	.sleb128 92
+	.4byte	.LVL158
+	.4byte	.LVL210
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.4byte	.LVL210
+	.4byte	.LFE215
+	.2byte	0x3
+	.byte	0x7d
+	.sleb128 92
+	.4byte	0
+	.4byte	0
+.LLST63:
+	.4byte	.LVL123
+	.4byte	.LVL125
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL125
+	.4byte	.LVL182
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL210
+	.4byte	.LFE215
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST64:
+	.4byte	.LVL122
+	.4byte	.LVL125
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xea
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST65:
+	.4byte	.LVL122
+	.4byte	.LVL125
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL125
+	.4byte	.LVL131
+	.2byte	0x3
+	.byte	0x7d
+	.sleb128 96
+	.4byte	.LVL131
+	.4byte	.LVL132
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL132
+	.4byte	.LVL158
+	.2byte	0x3
+	.byte	0x7d
+	.sleb128 96
+	.4byte	.LVL210
+	.4byte	.LFE215
+	.2byte	0x3
+	.byte	0x7d
+	.sleb128 96
+	.4byte	0
+	.4byte	0
+.LLST66:
+	.4byte	.LVL134
+	.4byte	.LVL158
+	.2byte	0x3
+	.byte	0x7d
+	.sleb128 92
+	.4byte	.LVL210
+	.4byte	.LVL211
+	.2byte	0x3
+	.byte	0x7d
+	.sleb128 92
+	.4byte	0
+	.4byte	0
+.LLST67:
+	.4byte	.LVL134
+	.4byte	.LVL180
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL210
+	.4byte	.LVL211
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST68:
+	.4byte	.LVL134
+	.4byte	.LVL180
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL210
+	.4byte	.LVL211
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST69:
+	.4byte	.LVL136
+	.4byte	.LVL137-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL137-1
+	.4byte	.LVL180
+	.2byte	0x3
+	.byte	0x7d
+	.sleb128 100
+	.4byte	0
+	.4byte	0
+.LLST70:
+	.4byte	.LVL142
+	.4byte	.LVL143
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL144
+	.4byte	.LVL145
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL145
+	.4byte	.LVL146-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL153
+	.4byte	.LVL156
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL164
+	.4byte	.LVL165
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST71:
+	.4byte	.LVL134
+	.4byte	.LVL149
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL149
+	.4byte	.LVL150
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL150
+	.4byte	.LVL151
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL158
+	.4byte	.LVL180
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST72:
+	.4byte	.LVL134
+	.4byte	.LVL140
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL140
+	.4byte	.LVL141
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL141
+	.4byte	.LVL146
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL147
+	.4byte	.LVL148
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL148
+	.4byte	.LVL149
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL149
+	.4byte	.LVL152
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL152
+	.4byte	.LVL153-1
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL153-1
+	.4byte	.LVL158
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL159
+	.4byte	.LVL162
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL162
+	.4byte	.LVL163-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL163-1
+	.4byte	.LVL167
+	.2byte	0x3
+	.byte	0x7d
+	.sleb128 96
+	.4byte	.LVL179
+	.4byte	.LVL180
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST73:
+	.4byte	.LVL135
+	.4byte	.LVL136-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL136-1
+	.4byte	.LVL180
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL210
+	.4byte	.LVL211
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST74:
+	.4byte	.LVL154
+	.4byte	.LVL155
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 4
+	.byte	0x9f
+	.4byte	.LVL155
+	.4byte	.LVL157-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL157-1
+	.4byte	.LVL157
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 4
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST75:
+	.4byte	.LVL154
+	.4byte	.LVL157
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST76:
+	.4byte	.LVL154
+	.4byte	.LVL157
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST77:
+	.4byte	.LVL160
+	.4byte	.LVL161
+	.2byte	0x4
+	.byte	0x7d
+	.sleb128 108
+	.byte	0x9f
+	.4byte	.LVL161
+	.4byte	.LVL163-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL163-1
+	.4byte	.LVL163
+	.2byte	0x4
+	.byte	0x7d
+	.sleb128 108
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST78:
+	.4byte	.LVL160
+	.4byte	.LVL162
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL162
+	.4byte	.LVL163-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL163-1
+	.4byte	.LVL163
+	.2byte	0x3
+	.byte	0x7d
+	.sleb128 96
+	.4byte	0
+	.4byte	0
+.LLST79:
+	.4byte	.LVL160
+	.4byte	.LVL163
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST80:
+	.4byte	.LVL168
+	.4byte	.LVL173
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL173
+	.4byte	.LVL177
+	.2byte	0x4
+	.byte	0x7d
+	.sleb128 168
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST81:
+	.4byte	.LVL168
+	.4byte	.LVL169
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL169
+	.4byte	.LVL177
+	.2byte	0x3
+	.byte	0x7d
+	.sleb128 96
+	.4byte	0
+	.4byte	0
+.LLST82:
+	.4byte	.LVL168
+	.4byte	.LVL177
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST83:
+	.4byte	.LVL168
+	.4byte	.LVL177
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST84:
+	.4byte	.LVL168
+	.4byte	.LVL170
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL170
+	.4byte	.LVL171
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST85:
+	.4byte	.LVL173
+	.4byte	.LVL174
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL174
+	.4byte	.LVL175-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL175-1
+	.4byte	.LVL177
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST86:
+	.4byte	.LVL180
+	.4byte	.LVL188
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL189
+	.4byte	.LVL210
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST87:
+	.4byte	.LVL180
+	.4byte	.LVL188
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL189
+	.4byte	.LVL210
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST89:
+	.4byte	.LVL182
+	.4byte	.LVL187
+	.2byte	0x2
+	.byte	0x7a
+	.sleb128 0
+	.4byte	.LVL187
+	.4byte	.LVL188
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 16
+	.4byte	.LVL189
+	.4byte	.LVL196
+	.2byte	0x2
+	.byte	0x7a
+	.sleb128 0
+	.4byte	.LVL196
+	.4byte	.LVL207
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 16
+	.4byte	.LVL207
+	.4byte	.LVL210
+	.2byte	0x2
+	.byte	0x7a
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST90:
+	.4byte	.LVL195
+	.4byte	.LVL196
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL209
+	.4byte	.LVL210
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST91:
+	.4byte	.LVL190
+	.4byte	.LVL204
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL205
+	.4byte	.LVL210
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST92:
+	.4byte	.LVL197
+	.4byte	.LVL198
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL198
+	.4byte	.LVL199-1
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST93:
+	.4byte	.LVL199
+	.4byte	.LVL200
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL200
+	.4byte	.LVL202
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL205
+	.4byte	.LVL207
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST94:
+	.4byte	.LVL196
+	.4byte	.LVL204
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL205
+	.4byte	.LVL207
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST95:
+	.4byte	.LVL194
+	.4byte	.LVL195-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL195-1
+	.4byte	.LVL196
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 84
+	.4byte	.LVL208
+	.4byte	.LVL209
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL209
+	.4byte	.LVL210
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 84
+	.4byte	0
+	.4byte	0
+.LLST96:
+	.4byte	.LVL183
+	.4byte	.LVL184
+	.2byte	0x6
+	.byte	0x3
+	.4byte	.LC14
+	.byte	0x9f
+	.4byte	.LVL184
+	.4byte	.LVL185
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL185
+	.4byte	.LVL186-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST88:
+	.4byte	.LVL181
+	.4byte	.LVL184-1
+	.2byte	0x6
+	.byte	0x75
+	.sleb128 8
+	.byte	0x6
+	.byte	0x31
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST58:
+	.4byte	.LVL120
+	.4byte	.LVL121
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL121
+	.4byte	.LFE212
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST47:
+	.4byte	.LVL105
+	.4byte	.LVL109
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL109
+	.4byte	.LVL117
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL117
+	.4byte	.LFE211
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST48:
+	.4byte	.LVL105
+	.4byte	.LVL111
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL111
+	.4byte	.LVL117
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL117
+	.4byte	.LFE211
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST49:
+	.4byte	.LVL105
+	.4byte	.LVL106
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL106
+	.4byte	.LFE211
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST50:
+	.4byte	.LVL105
+	.4byte	.LVL110
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL110
+	.4byte	.LFE211
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST51:
+	.4byte	.LVL115
+	.4byte	.LVL116
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST52:
+	.4byte	.LVL107
+	.4byte	.LVL108
+	.2byte	0x2d
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x23
+	.uleb128 0x4
+	.byte	0x6
+	.byte	0x38
+	.byte	0x24
+	.byte	0x8
+	.byte	0xff
+	.byte	0x40
+	.byte	0x24
+	.byte	0x1a
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x23
+	.uleb128 0x4
+	.byte	0x6
+	.byte	0x38
+	.byte	0x25
+	.byte	0xa
+	.2byte	0xff00
+	.byte	0x1a
+	.byte	0x21
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x23
+	.uleb128 0x4
+	.byte	0x6
+	.byte	0x48
+	.byte	0x25
+	.byte	0x21
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x23
+	.uleb128 0x4
+	.byte	0x6
+	.byte	0x48
+	.byte	0x24
+	.byte	0x21
+	.byte	0x9f
+	.4byte	.LVL108
+	.4byte	.LVL114-1
+	.2byte	0x7
+	.byte	0x72
+	.sleb128 0
+	.byte	0xb
+	.2byte	0xfe00
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST53:
+	.4byte	.LVL112
+	.4byte	.LVL117
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST54:
+	.4byte	.LVL112
+	.4byte	.LVL114
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST55:
+	.4byte	.LVL112
+	.4byte	.LVL113
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL113
+	.4byte	.LVL114-1
+	.2byte	0x7
+	.byte	0x72
+	.sleb128 0
+	.byte	0xb
+	.2byte	0xfe00
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST56:
+	.4byte	.LVL112
+	.4byte	.LVL114
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST57:
+	.4byte	.LVL118
+	.4byte	.LVL119
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL119
+	.4byte	.LFE210
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST39:
+	.4byte	.LVL94
+	.4byte	.LVL98
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL98
+	.4byte	.LVL104
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL104
+	.4byte	.LFE207
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST40:
+	.4byte	.LVL94
+	.4byte	.LVL97
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL97
+	.4byte	.LVL104
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL104
+	.4byte	.LFE207
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST41:
+	.4byte	.LVL94
+	.4byte	.LVL96
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL96
+	.4byte	.LVL104
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL104
+	.4byte	.LFE207
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST42:
+	.4byte	.LVL94
+	.4byte	.LVL95
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL95
+	.4byte	.LVL104
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL104
+	.4byte	.LFE207
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST43:
+	.4byte	.LVL94
+	.4byte	.LVL104
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 0
+	.4byte	.LVL104
+	.4byte	.LFE207
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST44:
+	.4byte	.LVL94
+	.4byte	.LVL104
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 4
+	.4byte	.LVL104
+	.4byte	.LFE207
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 4
+	.4byte	0
+	.4byte	0
+.LLST45:
+	.4byte	.LVL99
+	.4byte	.LVL100
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL100
+	.4byte	.LVL101-1
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST46:
+	.4byte	.LVL101
+	.4byte	.LVL102
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST15:
+	.4byte	.LVL38
+	.4byte	.LVL43
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL43
+	.4byte	.LFE206
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST16:
+	.4byte	.LVL38
+	.4byte	.LVL42
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL42
+	.4byte	.LFE206
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -68
+	.4byte	0
+	.4byte	0
+.LLST17:
+	.4byte	.LVL38
+	.4byte	.LVL39
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL39
+	.4byte	.LVL75
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL75
+	.4byte	.LVL77-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL77-1
+	.4byte	.LVL85
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL85
+	.4byte	.LVL86-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL86-1
+	.4byte	.LFE206
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST18:
+	.4byte	.LVL38
+	.4byte	.LVL40
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL40
+	.4byte	.LVL50
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL50
+	.4byte	.LVL68
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.4byte	.LVL68
+	.4byte	.LVL69
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL69
+	.4byte	.LVL73
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.4byte	.LVL73
+	.4byte	.LVL74
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL74
+	.4byte	.LVL90
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.4byte	.LVL90
+	.4byte	.LVL92
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL92
+	.4byte	.LFE206
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST19:
+	.4byte	.LVL38
+	.4byte	.LVL68
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 0
+	.4byte	.LVL68
+	.4byte	.LFE206
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST20:
+	.4byte	.LVL38
+	.4byte	.LVL68
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 4
+	.4byte	.LVL68
+	.4byte	.LFE206
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 4
+	.4byte	0
+	.4byte	0
+.LLST21:
+	.4byte	.LVL53
+	.4byte	.LVL54-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL54-1
+	.4byte	.LVL65
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -80
+	.4byte	.LVL69
+	.4byte	.LVL73
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -80
+	.4byte	.LVL88
+	.4byte	.LVL89
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -80
+	.4byte	0
+	.4byte	0
+.LLST22:
+	.4byte	.LVL57
+	.4byte	.LVL65
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL71
+	.4byte	.LVL73
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL88
+	.4byte	.LVL89
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST23:
+	.4byte	.LVL41
+	.4byte	.LVL67
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL68
+	.4byte	.LVL93
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST24:
+	.4byte	.LVL41
+	.4byte	.LVL51
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL51
+	.4byte	.LVL65
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL68
+	.4byte	.LVL69
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL69
+	.4byte	.LVL73
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL73
+	.4byte	.LVL74
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL88
+	.4byte	.LVL89
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL90
+	.4byte	.LVL92
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST25:
+	.4byte	.LVL41
+	.4byte	.LVL61
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL61
+	.4byte	.LVL62
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL68
+	.4byte	.LVL71
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL73
+	.4byte	.LVL74
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL90
+	.4byte	.LFE206
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST26:
+	.4byte	.LVL44
+	.4byte	.LVL45-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL45-1
+	.4byte	.LFE206
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -76
+	.4byte	0
+	.4byte	0
+.LLST27:
+	.4byte	.LVL56
+	.4byte	.LVL57
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL69
+	.4byte	.LVL70-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST28:
+	.4byte	.LVL56
+	.4byte	.LVL57
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL69
+	.4byte	.LVL71
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST29:
+	.4byte	.LVL57
+	.4byte	.LVL60
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST30:
+	.4byte	.LVL57
+	.4byte	.LVL60
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST31:
+	.4byte	.LVL62
+	.4byte	.LVL63
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL71
+	.4byte	.LVL72-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST32:
+	.4byte	.LVL62
+	.4byte	.LVL63
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL71
+	.4byte	.LVL73
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST33:
+	.4byte	.LVL76
+	.4byte	.LVL78
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST34:
+	.4byte	.LVL76
+	.4byte	.LVL77-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL77-1
+	.4byte	.LVL78
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST35:
+	.4byte	.LVL76
+	.4byte	.LVL77-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL77-1
+	.4byte	.LVL78
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST36:
+	.4byte	.LVL85
+	.4byte	.LVL86
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST37:
+	.4byte	.LVL85
+	.4byte	.LVL86-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL86-1
+	.4byte	.LVL86
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST38:
+	.4byte	.LVL85
+	.4byte	.LVL86-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL86-1
+	.4byte	.LVL86
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST9:
+	.4byte	.LVL30
+	.4byte	.LVL34-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL34-1
+	.4byte	.LFE202
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST10:
+	.4byte	.LVL30
+	.4byte	.LVL31
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL31
+	.4byte	.LFE202
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST11:
+	.4byte	.LVL30
+	.4byte	.LVL32
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL32
+	.4byte	.LVL34-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL34-1
+	.4byte	.LFE202
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST12:
+	.4byte	.LVL30
+	.4byte	.LVL33
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL33
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+	.4byte	0x54
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+	.4byte	.Ldebug_info0
+	.byte	0x4
+	.byte	0
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+	.4byte	.LFE216-.LFB216
+	.4byte	.LFB202
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+	.4byte	.LFB206
+	.4byte	.LFE206-.LFB206
+	.4byte	.LFB207
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+	.4byte	.LFB210
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+	.4byte	.LFB212
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+	.4byte	.LFB215
+	.4byte	.LFE215-.LFB215
+	.4byte	0
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+	.ascii	"IH_COMP_BZIP2\000"
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+	.ascii	"IH_TYPE_GPIMAGE\000"
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+	.ascii	"___strtok\000"
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+	.ascii	"net_boot_file_expected_size_in_blocks\000"
+.LASF16:
+	.ascii	"__kernel_size_t\000"
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+	.ascii	"bootm_headers\000"
+.LASF85:
+	.ascii	"protect\000"
+.LASF82:
+	.ascii	"disk_partition_t\000"
+.LASF281:
+	.ascii	"net_null_ethaddr\000"
+.LASF382:
+	.ascii	"fit_image_is_preload\000"
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+	.ascii	"spl_fit_get_image_name\000"
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+	.ascii	"IH_TYPE_UBLIMAGE\000"
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+	.ascii	"IH_TYPE_TEE\000"
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+	.ascii	"IH_TYPE_X86_SETUP\000"
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+	.ascii	"bi_memsize\000"
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+	.ascii	"image\000"
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+	.ascii	"comp_addr\000"
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+	.ascii	"fdt_record_loadable\000"
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+	.ascii	"blk_desc\000"
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+	.ascii	"base_offset\000"
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+	.ascii	"spl_fit_load_blob\000"
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+	.ascii	"net_rx_packet_len\000"
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+	.ascii	"IF_TYPE_MMC\000"
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+	.ascii	"fit_noffset_rd\000"
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+	.ascii	"phys_size_t\000"
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+	.ascii	"FIQ_STACK_START\000"
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+	.ascii	"verify\000"
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+	.ascii	"spl_load_kernel_fit\000"
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+	.ascii	"hang\000"
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+	.ascii	"IH_COMP_LZ4\000"
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+	.ascii	"IH_TYPE_IMXIMAGE\000"
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+	.ascii	"bi_busfreq\000"
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+	.ascii	"load_ptr\000"
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+	.ascii	"IH_TYPE_ZYNQMPIMAGE\000"
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+	.ascii	"fit_image_get_comp\000"
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+	.ascii	"fit_image_get_data_offset\000"
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+	.ascii	"mbr_sig\000"
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+	.ascii	"save_addr\000"
+.LASF376:
+	.ascii	"fit_image_get_load\000"
+.LASF157:
+	.ascii	"IH_OS_UNITY\000"
+.LASF333:
+	.ascii	"spl_fit_image_get_os\000"
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+	.ascii	"IH_OS_OPENBSD\000"
+.LASF359:
+	.ascii	"conf_node\000"
+.LASF162:
+	.ascii	"IH_OS_ARM_TRUSTED_FIRMWARE\000"
+.LASF225:
+	.ascii	"load\000"
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+	.ascii	"hwpart\000"
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+	.ascii	"_datarellocal_start_ofs\000"
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+	.ascii	"IH_OS_QNX\000"
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+	.ascii	"spl_image\000"
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+	.ascii	"spl_load_simple_fit\000"
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+	.ascii	"fit_noffset_setup\000"
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+	.ascii	"fit_image_get_comp_addr\000"
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+	.ascii	"fdt_subnode_offset\000"
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+	.ascii	"GNU C11 6.3.1 20170404 -mthumb -mthumb-interwork -m"
+	.ascii	"abi=aapcs-linux -mno-unaligned-access -mfloat-abi=s"
+	.ascii	"oft -march=armv7-a -mtune=cortex-a9 -mfpu=vfpv3-d16"
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+	.ascii	"ull-pointer-checks -fstack-usage -ffunction-section"
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+	.ascii	"IH_TYPE_RKSPI\000"
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+	.ascii	"spl_fit_append_fdt\000"
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+	.ascii	"entry_point\000"
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+	.ascii	"IH_TYPE_STANDALONE\000"
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+	.ascii	"bi_dram\000"
+.LASF2:
+	.ascii	"short unsigned int\000"
+.LASF126:
+	.ascii	"magic\000"
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+	.ascii	"spl_kernel_partition\000"
+.LASF243:
+	.ascii	"fit_hdr_setup\000"
+.LASF232:
+	.ascii	"legacy_hdr_valid\000"
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+	.ascii	"base\000"
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+	.ascii	"sector_count\000"
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+	.ascii	"part_info\000"
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+	.ascii	"IF_TYPE_SATA\000"
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+	.ascii	"SIG_TYPE_COUNT\000"
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+	.ascii	"ft_addr\000"
+.LASF350:
+	.ascii	"preload\000"
+.LASF4:
+	.ascii	"uchar\000"
+.LASF371:
+	.ascii	"part_get_info_by_name\000"
+.LASF146:
+	.ascii	"IH_OS_IRIX\000"
+.LASF249:
+	.ascii	"ft_len\000"
+.LASF168:
+	.ascii	"IH_TYPE_RAMDISK\000"
+.LASF244:
+	.ascii	"fit_uname_setup\000"
+.LASF267:
+	.ascii	"net_netmask\000"
+.LASF340:
+	.ascii	"spl_load_fit_image\000"
+.LASF117:
+	.ascii	"IRQ_STACK_START\000"
+.LASF299:
+	.ascii	"entry_point_os\000"
+.LASF241:
+	.ascii	"fit_uname_fdt\000"
+.LASF388:
+	.ascii	"fit_image_get_data\000"
+	.ident	"GCC: (Linaro GCC 6.3-2017.05) 6.3.1 20170404"
+	.section	.note.GNU-stack,"",%progbits

commit 2201a451d5144a661b89c58bcec6f314e5c4f67e
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Sep 7 09:16:23 2020 +0800

    common: fit: add fit_image_is_preload()
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I3c3001a347ae59fcfd186156382c04b4b8a77546

diff --git a/common/image-fit.c b/common/image-fit.c
index 7f2c3089e7..78d354f03d 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -711,6 +711,23 @@ int fit_image_get_comp(const void *fit, int noffset, uint8_t *comp)
 	return 0;
 }
 
+bool fit_image_is_preload(const void *fit, int noffset)
+{
+	int len;
+	int *data;
+
+	data = (int *)fdt_getprop(fit, noffset, FIT_PRE_LOAD_PROP, &len);
+	if (data == NULL || len != sizeof(int)) {
+		fit_get_debug(fit, noffset, FIT_PRE_LOAD_PROP, len);
+		return false;
+	}
+
+	if (*data != 1)
+		return false;
+
+	return true;
+}
+
 static int fit_image_get_address(const void *fit, int noffset, char *name,
 			  ulong *load)
 {
diff --git a/include/image.h b/include/image.h
index 24d9c977e0..295d160380 100644
--- a/include/image.h
+++ b/include/image.h
@@ -930,6 +930,7 @@ int bootz_setup(ulong image, ulong *start, ulong *end);
 #define FIT_COMP_ADDR_PROP	"comp"
 #define FIT_ENTRY_PROP		"entry"
 #define FIT_LOAD_PROP		"load"
+#define FIT_PRE_LOAD_PROP	"preload"
 #define FIT_ROLLBACK_PROP	"rollback-index"
 
 /* configuration node */
@@ -1011,6 +1012,7 @@ int fit_image_get_os(const void *fit, int noffset, uint8_t *os);
 int fit_image_get_arch(const void *fit, int noffset, uint8_t *arch);
 int fit_image_get_type(const void *fit, int noffset, uint8_t *type);
 int fit_image_get_comp(const void *fit, int noffset, uint8_t *comp);
+bool fit_image_is_preload(const void *fit, int noffset);
 int fit_image_get_load(const void *fit, int noffset, ulong *load);
 int fit_image_get_entry(const void *fit, int noffset, ulong *entry);
 int fit_image_get_comp_addr(const void *fit, int noffset, ulong *comp);

commit 4d62a7e03216a6641d7d7ed126ea93d5e49f35df
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Sep 3 23:03:52 2020 +0800

    blk: remove unused code
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ib43223baa7d335f6810f714fd64c40cd314b0185

diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
index 3d8adc7094..0d3574ffb7 100644
--- a/drivers/block/blk-uclass.c
+++ b/drivers/block/blk-uclass.c
@@ -454,20 +454,6 @@ unsigned long blk_dread(struct blk_desc *block_dev, lbaint_t start,
 	return blks_read;
 }
 
-#ifdef CONFIG_SPL_BLK_READ_PREPARE
-unsigned long blk_dread_prepare(struct blk_desc *block_dev, lbaint_t start,
-				lbaint_t blkcnt, void *buffer)
-{
-	struct udevice *dev = block_dev->bdev;
-	const struct blk_ops *ops = blk_get_ops(dev);
-
-	if (!ops->read)
-		return -ENOSYS;
-
-	return ops->read_prepare(dev, start, blkcnt, buffer);
-}
-#endif
-
 unsigned long blk_dwrite(struct blk_desc *block_dev, lbaint_t start,
 			 lbaint_t blkcnt, const void *buffer)
 {
diff --git a/include/blk.h b/include/blk.h
index 3c4fc1bb50..31b5ad78ea 100644
--- a/include/blk.h
+++ b/include/blk.h
@@ -284,10 +284,6 @@ struct blk_ops {
  */
 unsigned long blk_dread(struct blk_desc *block_dev, lbaint_t start,
 			lbaint_t blkcnt, void *buffer);
-#ifdef CONFIG_SPL_BLK_READ_PREPARE
-unsigned long blk_dread_prepare(struct blk_desc *block_dev, lbaint_t start,
-				lbaint_t blkcnt, void *buffer);
-#endif
 unsigned long blk_dwrite(struct blk_desc *block_dev, lbaint_t start,
 			 lbaint_t blkcnt, const void *buffer);
 unsigned long blk_derase(struct blk_desc *block_dev, lbaint_t start,

commit 62be0c2c539473b7e7a25cc381ba2ef23c43546b
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Fri Sep 4 14:21:44 2020 +0800

    clk: rockchip: rk3368: support get pll config by table
    
    add some special pll configs for better clock jitter.
    
    Change-Id: I3484d36feb9f4b99a42a2ba532ae2015968d83ff
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c
index f77fe80f5a..40254ffc8e 100644
--- a/drivers/clk/rockchip/clk_rk3368.c
+++ b/drivers/clk/rockchip/clk_rk3368.c
@@ -29,9 +29,27 @@ struct rk3368_clk_plat {
 #endif
 
 struct pll_div {
+	ulong rate;
 	u32 nr;
 	u32 nf;
 	u32 no;
+	u32 nb;
+};
+
+#define RK3368_PLL_RATE(_rate, _nr, _nf, _no, _nb)	\
+{							\
+	.rate	= _rate##U,				\
+	.nr = _nr,					\
+	.nf = _nf,					\
+	.no = _no,					\
+	.nb = _nb,					\
+}
+
+static struct pll_div rk3368_pll_rates[] = {
+	/* _mhz,  _nr, _nf, _no, _nb */
+	RK3368_PLL_RATE(594000000, 1, 99, 4, 16),
+	RK3368_PLL_RATE(424200000, 5, 707, 8, 0),
+	RK3368_PLL_RATE(410000000, 3, 205, 4, 16),
 };
 
 #define OSC_HZ		(24 * 1000 * 1000)
@@ -99,7 +117,6 @@ static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 1, 2);
 static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 1, 6);
 #endif
 #endif
-static const struct pll_div npll_init_cfg = PLL_DIVISORS(NPLL_HZ, 1, 4);
 
 static ulong rk3368_clk_get_rate(struct clk *clk);
 
@@ -109,8 +126,21 @@ static ulong rk3368_clk_get_rate(struct clk *clk);
 #define FREF_MIN_KHZ	269
 #define PLL_LIMIT_FREQ	400000000
 
+struct pll_div *rkclk_get_pll_config(ulong freq_hz)
+{
+	unsigned int rate_count = ARRAY_SIZE(rk3368_pll_rates);
+	int i;
+
+	for (i = 0; i < rate_count; i++) {
+		if (freq_hz == rk3368_pll_rates[i].rate)
+			return &rk3368_pll_rates[i];
+	}
+	return NULL;
+}
+
 static int pll_para_config(ulong freq_hz, struct pll_div *div, uint *ext_div)
 {
+	struct pll_div *best_div = NULL;
 	uint ref_khz = OSC_HZ / 1000, nr, nf = 0;
 	uint fref_khz;
 	uint diff_khz, best_diff_khz;
@@ -130,6 +160,15 @@ static int pll_para_config(ulong freq_hz, struct pll_div *div, uint *ext_div)
 		no = DIV_ROUND_UP(no, *ext_div);
 	}
 
+	best_div = rkclk_get_pll_config(freq_hz * (*ext_div));
+	if (best_div) {
+		div->nr = best_div->nr;
+		div->nf = best_div->nf;
+		div->no = best_div->no;
+		div->nb = best_div->nb;
+		return 0;
+	}
+
 	/* only even divisors (and 1) are supported */
 	if (no > 1)
 		no = DIV_ROUND_UP(no, 2) * 2;
@@ -230,8 +269,8 @@ static int rkclk_set_pll(struct rk3368_cru *cru, enum rk3368_pll_id pll_id,
 	 * BWADJ should be set to NF / 2 to ensure the nominal bandwidth.
 	 * Compare the RK3368 TRM, section "3.6.4 PLL Bandwidth Adjustment".
 	 */
-	if (pll_id == NPLL)
-		clrsetbits_le32(&pll->con2, PLL_BWADJ_MASK, 0);
+	if (div->nb)
+		clrsetbits_le32(&pll->con2, PLL_BWADJ_MASK, div->nb - 1);
 	else
 		clrsetbits_le32(&pll->con2, PLL_BWADJ_MASK, (div->nf >> 1) - 1);
 
@@ -735,7 +774,7 @@ static ulong rk3368_vop_set_clk(struct rk3368_cru *cru, int clk_id, uint hz)
 	switch (clk_id) {
 	case DCLK_VOP:
 		if (!(NPLL_HZ % hz)) {
-			rkclk_set_pll(cru, NPLL, &npll_init_cfg);
+			rkclk_set_pll(cru, NPLL, rkclk_get_pll_config(NPLL_HZ));
 			lcdc_div = NPLL_HZ / hz;
 		} else {
 			ret = pll_para_config(hz, &npll_config, &lcdc_div);
@@ -1267,7 +1306,7 @@ static int rk3368_clk_probe(struct udevice *dev)
 #if IS_ENABLED(CONFIG_SPL_BUILD) || IS_ENABLED(CONFIG_TPL_BUILD)
 	rkclk_init(priv->cru);
 #endif
-	rkclk_set_pll(priv->cru, NPLL, &npll_init_cfg);
+	rkclk_set_pll(priv->cru, NPLL, rkclk_get_pll_config(NPLL_HZ));
 	if (!priv->armlclk_init_hz)
 		priv->armlclk_init_hz = rkclk_pll_get_rate(priv->cru, APLLL);
 	if (!priv->armbclk_init_hz)

commit 3eac03e2186ec8aca462530263a4364f77b3fbc7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Sep 2 17:05:38 2020 +0800

    common: spl: ab: allow missing misc partition
    
    Return partition name without any slot suffix in this case.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If0692e3e2845f152802632994f5da5a9d3fb1731

diff --git a/common/spl/spl_ab.c b/common/spl/spl_ab.c
index 2c6f71f9d2..17013220b2 100644
--- a/common/spl/spl_ab.c
+++ b/common/spl/spl_ab.c
@@ -254,8 +254,9 @@ int spl_ab_append_part_slot(struct blk_desc *dev_desc,
 	}
 
 	if (spl_get_current_slot(dev_desc, "misc", slot_suffix)) {
-		printf("%s: failed to get slot suffix !\n", __func__);
-		return -1;
+		printf("No misc partition\n");
+		strcat(new_name, part_name);
+		return 0;
 	}
 
 	strcpy(new_name, part_name);

commit b8fa09953a482ff52aa3783a909fd5dcbffa1414
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Sep 2 16:28:43 2020 +0800

    common: console: support enable timestamp in SPL
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Iefe5f9ea6e9abb8c3cc07e75beb68c387f20320f

diff --git a/common/console.c b/common/console.c
index f399024397..63612fda08 100644
--- a/common/console.c
+++ b/common/console.c
@@ -554,7 +554,8 @@ void putc(const char c)
 	}
 }
 
-#if (!defined(CONFIG_SPL_BUILD) && defined(CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP))
+#if ((!defined(CONFIG_SPL_BUILD) || !defined(CONFIG_USE_TINY_PRINTF)) && \
+	defined(CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP))
 static void vspfunc(char *buf, size_t size, char *format, ...)
 {
 	va_list ap;

commit c9f753f3de40f92a5a24edd53fbca1977ae2805b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Sep 2 16:24:21 2020 +0800

    misc: rockchip decompress: use flush_dcache_all() before decompress
    
    flush_dcache_all() operating on set/way is faster than
    flush_cache() and invalidate_dcache_range() operating
    on virtual address.
    
    Tested: it saves about 12.5ms in rv1126 thunder-boot.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ie8ba42f56e72d0d554dca3949573196ef2165bd7

diff --git a/drivers/misc/rockchip_decompress.c b/drivers/misc/rockchip_decompress.c
index a121d33a60..ef66a723d2 100644
--- a/drivers/misc/rockchip_decompress.c
+++ b/drivers/misc/rockchip_decompress.c
@@ -98,30 +98,23 @@ static int rockchip_decom_start(struct udevice *dev, void *buf)
 	struct decom_param *param = (struct decom_param *)buf;
 	unsigned int limit_lo = param->size_dst & 0xffffffff;
 	unsigned int limit_hi = param->size_dst >> 32;
-	ulong align_input, align_len;
 
 #if CONFIG_IS_ENABLED(DM_RESET)
 	reset_assert(&priv->rst);
 	udelay(10);
 	reset_deassert(&priv->rst);
 #endif
-	if (!priv->cached) {
-		/* src: make sure we get the real compressed data from ddr */
-		align_input =
-		     round_down(param->addr_src, CONFIG_SYS_CACHELINE_SIZE);
-		align_len =
-		     round_up(param->size_src + (param->addr_src - align_input),
-			      CONFIG_SYS_CACHELINE_SIZE);
-		flush_cache(align_input, align_len);
-
-		/* dst: invalidate dcache */
-		align_input =
-		     round_down(param->addr_dst, CONFIG_SYS_CACHELINE_SIZE);
-		align_len =
-		     round_up(param->size_src + (param->addr_dst - align_input),
-			      CONFIG_SYS_CACHELINE_SIZE);
-		invalidate_dcache_range(align_input, align_len);
-	}
+	/*
+	 * Purpose:
+	 *    src: clean dcache to get the real compressed data from ddr.
+	 *    dst: invalidate dcache.
+	 *
+	 * flush_dcache_all() operating on set/way is faster than
+	 * flush_cache() and invalidate_dcache_range() operating
+	 * on virtual address.
+	 */
+	if (!priv->cached)
+		flush_dcache_all();
 
 	priv->done = false;
 

commit 8259a58e4aff7a63b2edcb2821a50b2c4d342321
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Aug 31 16:00:30 2020 +0800

    rv1126: configs: do reset for bootcmd if thunder-boot version
    
    We made a deal: Not allow U-Boot to bring up thunder-boot kernel.
    
    Because the thunder-boot feature may require special memory layout
    or other appointments, U-Boot can't handle all that. Let's go back
    to SPL to bring up kernel.
    
    Note: bootcmd is only called in normal boot sequence, that means
    we allow user to boot what they want in U-Boot shell mode.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I8a68af3fbd441ab7e30ad310640eaf3ee5f24525

diff --git a/include/configs/evb_rv1126.h b/include/configs/evb_rv1126.h
index 163705ab42..464b5e0d7b 100644
--- a/include/configs/evb_rv1126.h
+++ b/include/configs/evb_rv1126.h
@@ -21,7 +21,22 @@
 
 #ifndef CONFIG_SPL_BUILD
 #undef CONFIG_BOOTCOMMAND
+
+/*
+ * We made a deal: Not allow U-Boot to bring up thunder-boot kernel.
+ *
+ * Because the thunder-boot feature may require special memory layout
+ * or other appointments, U-Boot can't handle all that. Let's go back
+ * to SPL to bring up kernel.
+ *
+ * Note: bootcmd is only called in normal boot sequence, that means
+ * we allow user to boot what they want in U-Boot shell mode.
+ */
+#ifdef CONFIG_SPL_KERNEL_BOOT
+#define CONFIG_BOOTCOMMAND "reset"
+#else
 #define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
 #endif
+#endif /* !CONFIG_SPL_BUILD */
 
 #endif

commit d38748a7d267f54739c5a22ee0078b8ec47a4f20
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Aug 24 15:46:32 2020 +0800

    mtd: spinand: Support DS35X2GA
    
    Change-Id: I05e3a0d28983cf24a8a7ba0aee23e434cda4a1a9
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/dosilicon.c b/drivers/mtd/nand/spi/dosilicon.c
index 333e16fee7..92fbba425e 100644
--- a/drivers/mtd/nand/spi/dosilicon.c
+++ b/drivers/mtd/nand/spi/dosilicon.c
@@ -68,6 +68,14 @@ static const struct spinand_info dosilicon_spinand_table[] = {
 					      &update_cache_variants),
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&ds35xxga_ooblayout, NULL)),
+	SPINAND_INFO("DS35X2GA", 0x72,
+		     NAND_MEMORG(1, 2048, 64, 64, 2048, 2, 1, 1),
+		     NAND_ECCREQ(4, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&ds35xxga_ooblayout, NULL)),
 };
 
 /**

commit f1b20f5a45c844356327225668d22fb8d3d1bee6
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue Aug 25 15:28:41 2020 +0800

    rkflash: Support FS35ND02G-S3Y2
    
    Change-Id: Ifd62df6188c09fc9fccf4a38bd7c856bc8061d80
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/sfc_nand.c b/drivers/rkflash/sfc_nand.c
index 01f9e8b142..d9f9b1c106 100644
--- a/drivers/rkflash/sfc_nand.c
+++ b/drivers/rkflash/sfc_nand.c
@@ -89,6 +89,8 @@ static struct nand_info spi_nand_tbl[] = {
 	{0x0BE3, 4, 128, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 20, 1, 0xB0, 0x0, {8, 12, 0xff, 0xff}, &sfc_nand_ecc_status_sp4},
 	/* FS35ND01G-S1Y2 */
 	{0xCDEA, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 4, 0xFF, 0xFF, {4, 8, 12, 16}, &sfc_nand_ecc_status_sp1},
+	/* FS35ND02G-S3Y2 */
+	{0xCDEB, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 4, 0xFF, 0xFF, {4, 8, 12, 16}, &sfc_nand_ecc_status_sp1},
 };
 
 static struct nand_info *p_nand_info;

commit 72832ab67525bb179c7abc70e240a9b491c520d4
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Fri Aug 21 10:03:50 2020 +0800

    pinctrl: rockchip: add rk3308 support
    
    Change-Id: Id2a34aa7984ee00da2bf78e55f38cf268a2ce8f3
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3308.c b/drivers/pinctrl/rockchip/pinctrl-rk3308.c
new file mode 100644
index 0000000000..708f84f298
--- /dev/null
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3308.c
@@ -0,0 +1,740 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2020 Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <regmap.h>
+#include <syscon.h>
+#include <asm/arch/cpu.h>
+
+#include "pinctrl-rockchip.h"
+
+static struct rockchip_mux_route_data rk3308_mux_route_data[] = {
+	{
+		/* rtc_clk */
+		.bank_num = 0,
+		.pin = 19,
+		.func = 1,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 0) | BIT(0),
+	}, {
+		/* uart2_rxm0 */
+		.bank_num = 1,
+		.pin = 22,
+		.func = 2,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 2) | BIT(16 + 3),
+	}, {
+		/* uart2_rxm1 */
+		.bank_num = 4,
+		.pin = 26,
+		.func = 2,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 2) | BIT(16 + 3) | BIT(2),
+	}, {
+		/* i2c3_sdam0 */
+		.bank_num = 0,
+		.pin = 23,
+		.func = 2,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 4),
+	}, {
+		/* i2c3_sdam1 */
+		.bank_num = 3,
+		.pin = 12,
+		.func = 2,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 4) | BIT(4),
+	}, {
+		/* i2s-8ch-1-sclktxm0 */
+		.bank_num = 1,
+		.pin = 3,
+		.func = 2,
+		.route_offset = 0x308,
+		.route_val = BIT(16 + 3),
+	}, {
+		/* i2s-8ch-1-sclkrxm0 */
+		.bank_num = 1,
+		.pin = 4,
+		.func = 2,
+		.route_offset = 0x308,
+		.route_val = BIT(16 + 3),
+	}, {
+		/* i2s-8ch-1-sclktxm1 */
+		.bank_num = 1,
+		.pin = 13,
+		.func = 2,
+		.route_offset = 0x308,
+		.route_val = BIT(16 + 3) | BIT(3),
+	}, {
+		/* i2s-8ch-1-sclkrxm1 */
+		.bank_num = 1,
+		.pin = 14,
+		.func = 2,
+		.route_offset = 0x308,
+		.route_val = BIT(16 + 3) | BIT(3),
+	}, {
+		/* pdm-clkm0 */
+		.bank_num = 1,
+		.pin = 4,
+		.func = 3,
+		.route_offset = 0x308,
+		.route_val = BIT(16 + 12) | BIT(16 + 13),
+	}, {
+		/* pdm-clkm1 */
+		.bank_num = 1,
+		.pin = 14,
+		.func = 4,
+		.route_offset = 0x308,
+		.route_val = BIT(16 + 12) | BIT(16 + 13) | BIT(12),
+	}, {
+		/* pdm-clkm2 */
+		.bank_num = 2,
+		.pin = 6,
+		.func = 2,
+		.route_offset = 0x308,
+		.route_val = BIT(16 + 12) | BIT(16 + 13) | BIT(13),
+	}, {
+		/* pdm-clkm-m2 */
+		.bank_num = 2,
+		.pin = 4,
+		.func = 3,
+		.route_offset = 0x600,
+		.route_val = BIT(16 + 2) | BIT(2),
+	},
+};
+
+static struct rockchip_mux_route_data rk3308b_mux_route_data[] = {
+	{
+		/* rtc_clk */
+		.bank_num = 0,
+		.pin = 19,
+		.func = 1,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 0) | BIT(0),
+	}, {
+		/* uart2_rxm0 */
+		.bank_num = 1,
+		.pin = 22,
+		.func = 2,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 2) | BIT(16 + 3),
+	}, {
+		/* uart2_rxm1 */
+		.bank_num = 4,
+		.pin = 26,
+		.func = 2,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 2) | BIT(16 + 3) | BIT(2),
+	}, {
+		/* i2c3_sdam0 */
+		.bank_num = 0,
+		.pin = 15,
+		.func = 2,
+		.route_offset = 0x608,
+		.route_val = BIT(16 + 8) | BIT(16 + 9),
+	}, {
+		/* i2c3_sdam1 */
+		.bank_num = 3,
+		.pin = 12,
+		.func = 2,
+		.route_offset = 0x608,
+		.route_val = BIT(16 + 8) | BIT(16 + 9) | BIT(8),
+	}, {
+		/* i2c3_sdam2 */
+		.bank_num = 2,
+		.pin = 0,
+		.func = 3,
+		.route_offset = 0x608,
+		.route_val = BIT(16 + 8) | BIT(16 + 9) | BIT(9),
+	}, {
+		/* i2s-8ch-1-sclktxm0 */
+		.bank_num = 1,
+		.pin = 3,
+		.func = 2,
+		.route_offset = 0x308,
+		.route_val = BIT(16 + 3),
+	}, {
+		/* i2s-8ch-1-sclkrxm0 */
+		.bank_num = 1,
+		.pin = 4,
+		.func = 2,
+		.route_offset = 0x308,
+		.route_val = BIT(16 + 3),
+	}, {
+		/* i2s-8ch-1-sclktxm1 */
+		.bank_num = 1,
+		.pin = 13,
+		.func = 2,
+		.route_offset = 0x308,
+		.route_val = BIT(16 + 3) | BIT(3),
+	}, {
+		/* i2s-8ch-1-sclkrxm1 */
+		.bank_num = 1,
+		.pin = 14,
+		.func = 2,
+		.route_offset = 0x308,
+		.route_val = BIT(16 + 3) | BIT(3),
+	}, {
+		/* pdm-clkm0 */
+		.bank_num = 1,
+		.pin = 4,
+		.func = 3,
+		.route_offset = 0x308,
+		.route_val =  BIT(16 + 12) | BIT(16 + 13),
+	}, {
+		/* pdm-clkm1 */
+		.bank_num = 1,
+		.pin = 14,
+		.func = 4,
+		.route_offset = 0x308,
+		.route_val = BIT(16 + 12) | BIT(16 + 13) | BIT(12),
+	}, {
+		/* pdm-clkm2 */
+		.bank_num = 2,
+		.pin = 6,
+		.func = 2,
+		.route_offset = 0x308,
+		.route_val = BIT(16 + 12) | BIT(16 + 13) | BIT(13),
+	}, {
+		/* pdm-clkm-m2 */
+		.bank_num = 2,
+		.pin = 4,
+		.func = 3,
+		.route_offset = 0x600,
+		.route_val = BIT(16 + 2) | BIT(2),
+	}, {
+		/* spi1_miso */
+		.bank_num = 3,
+		.pin = 10,
+		.func = 3,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 9),
+	}, {
+		/* spi1_miso_m1 */
+		.bank_num = 2,
+		.pin = 4,
+		.func = 2,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 9) | BIT(9),
+	}, {
+		/* owire_m0 */
+		.bank_num = 0,
+		.pin = 11,
+		.func = 3,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 10) | BIT(16 + 11),
+	}, {
+		/* owire_m1 */
+		.bank_num = 1,
+		.pin = 22,
+		.func = 7,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 10) | BIT(16 + 11) | BIT(10),
+	}, {
+		/* owire_m2 */
+		.bank_num = 2,
+		.pin = 2,
+		.func = 5,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 10) | BIT(16 + 11) | BIT(11),
+	}, {
+		/* can_rxd_m0 */
+		.bank_num = 0,
+		.pin = 11,
+		.func = 2,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 12) | BIT(16 + 13),
+	}, {
+		/* can_rxd_m1 */
+		.bank_num = 1,
+		.pin = 22,
+		.func = 5,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 12) | BIT(16 + 13) | BIT(12),
+	}, {
+		/* can_rxd_m2 */
+		.bank_num = 2,
+		.pin = 2,
+		.func = 4,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 12) | BIT(16 + 13) | BIT(13),
+	}, {
+		/* mac_rxd0_m0 */
+		.bank_num = 1,
+		.pin = 20,
+		.func = 3,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 14),
+	}, {
+		/* mac_rxd0_m1 */
+		.bank_num = 4,
+		.pin = 2,
+		.func = 2,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 14) | BIT(14),
+	}, {
+		/* uart3_rx */
+		.bank_num = 3,
+		.pin = 12,
+		.func = 4,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 15),
+	}, {
+		/* uart3_rx_m1 */
+		.bank_num = 0,
+		.pin = 17,
+		.func = 3,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 15) | BIT(15),
+	},
+};
+static struct rockchip_mux_recalced_data rk3308_mux_recalced_data[] = {
+	{
+		.num = 1,
+		.pin = 14,
+		.reg = 0x28,
+		.bit = 12,
+		.mask = 0x7
+	}, {
+		.num = 1,
+		.pin = 15,
+		.reg = 0x2c,
+		.bit = 0,
+		.mask = 0x3
+	}, {
+		.num = 1,
+		.pin = 18,
+		.reg = 0x30,
+		.bit = 4,
+		.mask = 0x7
+	}, {
+		.num = 1,
+		.pin = 19,
+		.reg = 0x30,
+		.bit = 8,
+		.mask = 0x7
+	}, {
+		.num = 1,
+		.pin = 20,
+		.reg = 0x30,
+		.bit = 12,
+		.mask = 0x7
+	}, {
+		.num = 1,
+		.pin = 21,
+		.reg = 0x34,
+		.bit = 0,
+		.mask = 0x7
+	}, {
+		.num = 1,
+		.pin = 22,
+		.reg = 0x34,
+		.bit = 4,
+		.mask = 0x7
+	}, {
+		.num = 1,
+		.pin = 23,
+		.reg = 0x34,
+		.bit = 8,
+		.mask = 0x7
+	}, {
+		.num = 3,
+		.pin = 12,
+		.reg = 0x68,
+		.bit = 8,
+		.mask = 0x7
+	}, {
+		.num = 3,
+		.pin = 13,
+		.reg = 0x68,
+		.bit = 12,
+		.mask = 0x7
+	},
+};
+
+static struct rockchip_mux_recalced_data rk3308b_mux_recalced_data[] = {
+	{
+		.num = 1,
+		.pin = 14,
+		.reg = 0x28,
+		.bit = 12,
+		.mask = 0xf
+	}, {
+		.num = 1,
+		.pin = 15,
+		.reg = 0x2c,
+		.bit = 0,
+		.mask = 0x3
+	}, {
+		.num = 1,
+		.pin = 18,
+		.reg = 0x30,
+		.bit = 4,
+		.mask = 0xf
+	}, {
+		.num = 1,
+		.pin = 19,
+		.reg = 0x30,
+		.bit = 8,
+		.mask = 0xf
+	}, {
+		.num = 1,
+		.pin = 20,
+		.reg = 0x30,
+		.bit = 12,
+		.mask = 0xf
+	}, {
+		.num = 1,
+		.pin = 21,
+		.reg = 0x34,
+		.bit = 0,
+		.mask = 0xf
+	}, {
+		.num = 1,
+		.pin = 22,
+		.reg = 0x34,
+		.bit = 4,
+		.mask = 0xf
+	}, {
+		.num = 1,
+		.pin = 23,
+		.reg = 0x34,
+		.bit = 8,
+		.mask = 0xf
+	}, {
+		.num = 3,
+		.pin = 12,
+		.reg = 0x68,
+		.bit = 8,
+		.mask = 0xf
+	}, {
+		.num = 3,
+		.pin = 13,
+		.reg = 0x68,
+		.bit = 12,
+		.mask = 0xf
+	}, {
+		.num = 2,
+		.pin = 2,
+		.reg = 0x608,
+		.bit = 0,
+		.mask = 0x7
+	}, {
+		.num = 2,
+		.pin = 3,
+		.reg = 0x608,
+		.bit = 4,
+		.mask = 0x7
+	}, {
+		.num = 2,
+		.pin = 16,
+		.reg = 0x610,
+		.bit = 8,
+		.mask = 0x7
+	}, {
+		.num = 3,
+		.pin = 10,
+		.reg = 0x610,
+		.bit = 0,
+		.mask = 0x7
+	}, {
+		.num = 3,
+		.pin = 11,
+		.reg = 0x610,
+		.bit = 4,
+		.mask = 0x7
+	},
+};
+
+static int rk3308_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	int iomux_num = (pin / 8);
+	struct regmap *regmap;
+	int reg, ret, mask, mux_type;
+	u8 bit;
+	u32 data;
+
+	debug("setting mux of GPIO%d-%d to %d\n", bank->bank_num, pin, mux);
+
+	if (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
+		regmap = priv->regmap_pmu;
+	else
+		regmap = priv->regmap_base;
+
+	/* get basic quadrupel of mux registers and the correct reg inside */
+	mux_type = bank->iomux[iomux_num].type;
+	reg = bank->iomux[iomux_num].offset;
+	if (mux_type & IOMUX_WIDTH_4BIT) {
+		if ((pin % 8) >= 4)
+			reg += 0x4;
+		bit = (pin % 4) * 4;
+		mask = 0xf;
+	} else {
+		bit = (pin % 8) * 2;
+		mask = 0x3;
+	}
+
+	if (bank->recalced_mask & BIT(pin))
+		rockchip_get_recalced_mux(bank, pin, &reg, &bit, &mask);
+
+	data = (mask << (bit + 16));
+	data |= (mux & mask) << bit;
+	ret = regmap_write(regmap, reg, data);
+
+	return ret;
+}
+
+#define RK3308_PULL_OFFSET		0xa0
+#define RK3308_PULL_BITS_PER_PIN	2
+#define RK3308_PULL_PINS_PER_REG	8
+#define RK3308_PULL_BANK_STRIDE		16
+
+static void rk3308_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
+					 int pin_num, struct regmap **regmap,
+					 int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	*regmap = priv->regmap_base;
+	*reg = RK3308_PULL_OFFSET;
+	*reg += bank->bank_num * RK3308_PULL_BANK_STRIDE;
+	*reg += ((pin_num / RK3308_PULL_PINS_PER_REG) * 4);
+
+	*bit = (pin_num % RK3308_PULL_PINS_PER_REG);
+	*bit *= RK3308_PULL_BITS_PER_PIN;
+}
+
+#define RK3308_DRV_GRF_OFFSET		0x100
+#define RK3308_DRV_BITS_PER_PIN		2
+#define RK3308_DRV_PINS_PER_REG		8
+#define RK3308_DRV_BANK_STRIDE		16
+
+static void rk3308_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
+					int pin_num, struct regmap **regmap,
+					int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	*regmap = priv->regmap_base;
+	*reg = RK3308_DRV_GRF_OFFSET;
+	*reg += bank->bank_num * RK3308_DRV_BANK_STRIDE;
+	*reg += ((pin_num / RK3308_DRV_PINS_PER_REG) * 4);
+
+	*bit = (pin_num % RK3308_DRV_PINS_PER_REG);
+	*bit *= RK3308_DRV_BITS_PER_PIN;
+}
+
+#define RK3308_SCHMITT_PINS_PER_REG	8
+#define RK3308_SCHMITT_BANK_STRIDE	16
+#define RK3308_SCHMITT_GRF_OFFSET	0x1a0
+
+static int rk3308_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank,
+					   int pin_num,
+					   struct regmap **regmap,
+					   int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	*regmap = priv->regmap_base;
+	*reg = RK3308_SCHMITT_GRF_OFFSET;
+
+	*reg += bank->bank_num * RK3308_SCHMITT_BANK_STRIDE;
+	*reg += ((pin_num / RK3308_SCHMITT_PINS_PER_REG) * 4);
+	*bit = pin_num % RK3308_SCHMITT_PINS_PER_REG;
+
+	return 0;
+}
+
+static int rk3308_set_pull(struct rockchip_pin_bank *bank,
+			   int pin_num, int pull)
+{
+	struct regmap *regmap;
+	int reg, ret;
+	u8 bit, type;
+	u32 data;
+
+	if (pull == PIN_CONFIG_BIAS_PULL_PIN_DEFAULT)
+		return -ENOTSUPP;
+
+	rk3308_calc_pull_reg_and_bit(bank, pin_num, &regmap, &reg, &bit);
+	type = bank->pull_type[pin_num / 8];
+	ret = rockchip_translate_pull_value(type, pull);
+	if (ret < 0) {
+		debug("unsupported pull setting %d\n", pull);
+		return ret;
+	}
+
+	/* enable the write to the equivalent lower bits */
+	data = ((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << (bit + 16);
+
+	data |= (ret << bit);
+	ret = regmap_write(regmap, reg, data);
+
+	return ret;
+}
+
+static int rk3308_set_drive(struct rockchip_pin_bank *bank,
+			    int pin_num, int strength)
+{
+	struct regmap *regmap;
+	int reg;
+	u32 data;
+	u8 bit;
+
+	rk3308_calc_drv_reg_and_bit(bank, pin_num, &regmap, &reg, &bit);
+
+	/* enable the write to the equivalent lower bits */
+	data = ((1 << ROCKCHIP_DRV_BITS_PER_PIN) - 1) << (bit + 16);
+	data |= (strength << bit);
+
+	return regmap_write(regmap, reg, data);
+}
+
+static int rk3308_set_schmitt(struct rockchip_pin_bank *bank,
+			      int pin_num, int enable)
+{
+	struct regmap *regmap;
+	int reg;
+	u8 bit;
+	u32 data;
+
+	rk3308_calc_schmitt_reg_and_bit(bank, pin_num, &regmap, &reg, &bit);
+	/* enable the write to the equivalent lower bits */
+	data = BIT(bit + 16) | (enable << bit);
+
+	return regmap_write(regmap, reg, data);
+}
+
+static struct rockchip_pin_bank rk3308_pin_banks[] = {
+	PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", IOMUX_8WIDTH_2BIT,
+					     IOMUX_8WIDTH_2BIT,
+					     IOMUX_8WIDTH_2BIT,
+					     IOMUX_8WIDTH_2BIT),
+	PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1", IOMUX_8WIDTH_2BIT,
+					     IOMUX_8WIDTH_2BIT,
+					     IOMUX_8WIDTH_2BIT,
+					     IOMUX_8WIDTH_2BIT),
+	PIN_BANK_IOMUX_FLAGS(2, 32, "gpio2", IOMUX_8WIDTH_2BIT,
+					     IOMUX_8WIDTH_2BIT,
+					     IOMUX_8WIDTH_2BIT,
+					     IOMUX_8WIDTH_2BIT),
+	PIN_BANK_IOMUX_FLAGS(3, 32, "gpio3", IOMUX_8WIDTH_2BIT,
+					     IOMUX_8WIDTH_2BIT,
+					     IOMUX_8WIDTH_2BIT,
+					     IOMUX_8WIDTH_2BIT),
+	PIN_BANK_IOMUX_FLAGS(4, 32, "gpio4", IOMUX_8WIDTH_2BIT,
+					     IOMUX_8WIDTH_2BIT,
+					     IOMUX_8WIDTH_2BIT,
+					     IOMUX_8WIDTH_2BIT),
+};
+
+static struct rockchip_pin_ctrl rk3308_pin_ctrl = {
+	.pin_banks		= rk3308_pin_banks,
+	.nr_banks		= ARRAY_SIZE(rk3308_pin_banks),
+	.nr_pins		= 160,
+	.grf_mux_offset		= 0x0,
+	.iomux_recalced		= rk3308_mux_recalced_data,
+	.niomux_recalced	= ARRAY_SIZE(rk3308_mux_recalced_data),
+	.iomux_routes		= rk3308_mux_route_data,
+	.niomux_routes		= ARRAY_SIZE(rk3308_mux_route_data),
+	.set_mux		= rk3308_set_mux,
+	.set_pull		= rk3308_set_pull,
+	.set_drive		= rk3308_set_drive,
+	.set_schmitt		= rk3308_set_schmitt,
+};
+
+static const struct rockchip_pin_ctrl rk3308b_pin_ctrl = {
+	.pin_banks		= rk3308_pin_banks,
+	.nr_banks		= ARRAY_SIZE(rk3308_pin_banks),
+	.nr_pins		= 160,
+	.grf_mux_offset		= 0x0,
+	.iomux_recalced		= rk3308b_mux_recalced_data,
+	.niomux_recalced	= ARRAY_SIZE(rk3308b_mux_recalced_data),
+	.iomux_routes		= rk3308b_mux_route_data,
+	.niomux_routes		= ARRAY_SIZE(rk3308b_mux_route_data),
+	.set_mux		= rk3308_set_mux,
+	.set_pull		= rk3308_set_pull,
+	.set_drive		= rk3308_set_drive,
+	.set_schmitt		= rk3308_set_schmitt,
+};
+
+static const struct udevice_id rk3308_pinctrl_ids[] = {
+	{
+		.compatible = "rockchip,rk3308-pinctrl",
+		.data = (ulong)&rk3308_pin_ctrl
+	},
+	{ }
+};
+
+/* rk3308b SoC data initialize */
+#define RK3308B_GRF_SOC_CON13			0x608
+#define RK3308B_GRF_SOC_CON15			0x610
+
+/* RK3308B_GRF_SOC_CON13 */
+#define RK3308B_GRF_I2C3_IOFUNC_SRC_CTRL	(BIT(16 + 10) | BIT(10))
+#define RK3308B_GRF_GPIO2A3_SEL_SRC_CTRL	(BIT(16 + 7)  | BIT(7))
+#define RK3308B_GRF_GPIO2A2_SEL_SRC_CTRL	(BIT(16 + 3)  | BIT(3))
+
+/* RK3308B_GRF_SOC_CON15 */
+#define RK3308B_GRF_GPIO2C0_SEL_SRC_CTRL	(BIT(16 + 11) | BIT(11))
+#define RK3308B_GRF_GPIO3B3_SEL_SRC_CTRL	(BIT(16 + 7)  | BIT(7))
+#define RK3308B_GRF_GPIO3B2_SEL_SRC_CTRL	(BIT(16 + 3)  | BIT(3))
+
+static int rk3308b_soc_data_init(struct udevice *dev)
+{
+	struct rockchip_pinctrl_priv *priv = dev_get_priv(dev);
+	int ret;
+
+	/*
+	 * Enable the special ctrl  of selected sources.
+	 */
+	ret = regmap_write(priv->regmap_base, RK3308B_GRF_SOC_CON13,
+			   RK3308B_GRF_I2C3_IOFUNC_SRC_CTRL |
+			   RK3308B_GRF_GPIO2A3_SEL_SRC_CTRL |
+			   RK3308B_GRF_GPIO2A2_SEL_SRC_CTRL);
+	if (ret)
+		return ret;
+
+	ret = regmap_write(priv->regmap_base, RK3308B_GRF_SOC_CON15,
+			   RK3308B_GRF_GPIO2C0_SEL_SRC_CTRL |
+			   RK3308B_GRF_GPIO3B3_SEL_SRC_CTRL |
+			   RK3308B_GRF_GPIO3B2_SEL_SRC_CTRL);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
+static int rk3308_pinctrl_probe(struct udevice *dev)
+{
+	int ret;
+
+	if (soc_is_rk3308b())
+		dev->driver_data = (ulong)&rk3308b_pin_ctrl;
+
+	ret = rockchip_pinctrl_probe(dev);
+	if (ret)
+		return ret;
+
+	if (soc_is_rk3308b())
+		ret = rk3308b_soc_data_init(dev);
+
+	return ret;
+}
+
+U_BOOT_DRIVER(pinctrl_rk3308) = {
+	.name		= "rockchip_rk3308_pinctrl",
+	.id		= UCLASS_PINCTRL,
+	.of_match	= rk3308_pinctrl_ids,
+	.priv_auto_alloc_size = sizeof(struct rockchip_pinctrl_priv),
+	.ops		= &rockchip_pinctrl_ops,
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	.bind		= dm_scan_fdt_dev,
+#endif
+	.probe		= rk3308_pinctrl_probe,
+};

commit e20d80255b781bd7c9ec7bbdaa007391e6de2e99
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Wed Aug 19 17:04:42 2020 +0800

    pinctrl: rockchip: add rk1808 support
    
    Change-Id: Iac6b15651e19b7eaf6dd18339f6de6d65a3dd1ff
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/drivers/pinctrl/rockchip/pinctrl-rk1808.c b/drivers/pinctrl/rockchip/pinctrl-rk1808.c
new file mode 100644
index 0000000000..4029486db9
--- /dev/null
+++ b/drivers/pinctrl/rockchip/pinctrl-rk1808.c
@@ -0,0 +1,292 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2020 Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <regmap.h>
+#include <syscon.h>
+
+#include "pinctrl-rockchip.h"
+
+static struct rockchip_mux_route_data rk1808_mux_route_data[] = {
+	{
+		/* i2c2m0_sda */
+		.bank_num = 3,
+		.pin = 12,
+		.func = 2,
+		.route_offset = 0x190,
+		.route_val = BIT(16 + 3),
+	}, {
+		/* i2c2m1_sda */
+		.bank_num = 1,
+		.pin = 13,
+		.func = 2,
+		.route_offset = 0x190,
+		.route_val = BIT(16 + 3) | BIT(3),
+	}, {
+		/* uart2_rxm0 */
+		.bank_num = 4,
+		.pin = 3,
+		.func = 2,
+		.route_offset = 0x190,
+		.route_val = BIT(16 + 14) | BIT(16 + 15),
+	}, {
+		/* uart2_rxm1 */
+		.bank_num = 2,
+		.pin = 25,
+		.func = 2,
+		.route_offset = 0x190,
+		.route_val = BIT(16 + 14) | BIT(14) | BIT(16 + 15),
+	}, {
+		/* uart2_rxm2 */
+		.bank_num = 3,
+		.pin = 4,
+		.func = 2,
+		.route_offset = 0x190,
+		.route_val = BIT(16 + 14) | BIT(16 + 15) | BIT(15),
+	},
+};
+
+static int rk1808_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	int iomux_num = (pin / 8);
+	struct regmap *regmap;
+	int reg, ret, mask, mux_type;
+	u8 bit;
+	u32 data;
+
+	debug("setting mux of GPIO%d-%d to %d\n", bank->bank_num, pin, mux);
+
+	if (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
+		regmap = priv->regmap_pmu;
+	else if (bank->iomux[iomux_num].type & IOMUX_L_SOURCE_PMU)
+		regmap = (pin % 8 < 4) ? priv->regmap_pmu : priv->regmap_base;
+	else
+		regmap = priv->regmap_base;
+
+	/* get basic quadrupel of mux registers and the correct reg inside */
+	mux_type = bank->iomux[iomux_num].type;
+	reg = bank->iomux[iomux_num].offset;
+	if (mux_type & IOMUX_WIDTH_4BIT) {
+		if ((pin % 8) >= 4)
+			reg += 0x4;
+		bit = (pin % 4) * 4;
+		mask = 0xf;
+	} else {
+		bit = (pin % 8) * 2;
+		mask = 0x3;
+	}
+
+	if (bank->recalced_mask & BIT(pin))
+		rockchip_get_recalced_mux(bank, pin, &reg, &bit, &mask);
+
+	data = (mask << (bit + 16));
+	data |= (mux & mask) << bit;
+	ret = regmap_write(regmap, reg, data);
+
+	return ret;
+}
+
+#define RK1808_PULL_PMU_OFFSET		0x10
+#define RK1808_PULL_GRF_OFFSET		0x80
+#define RK1808_PULL_PINS_PER_REG	8
+#define RK1808_PULL_BITS_PER_PIN	2
+#define RK1808_PULL_BANK_STRIDE		16
+
+static void rk1808_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
+					 int pin_num,
+					 struct regmap **regmap,
+					 int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	if (bank->bank_num == 0) {
+		*regmap = priv->regmap_pmu;
+		*reg = RK1808_PULL_PMU_OFFSET;
+	} else {
+		*reg = RK1808_PULL_GRF_OFFSET;
+		*regmap = priv->regmap_base;
+	}
+
+	*reg += ((pin_num / RK1808_PULL_PINS_PER_REG) * 4);
+	*bit = (pin_num % RK1808_PULL_PINS_PER_REG);
+	*bit *= RK1808_PULL_BITS_PER_PIN;
+}
+
+#define RK1808_DRV_PMU_OFFSET		0x20
+#define RK1808_DRV_GRF_OFFSET		0x140
+#define RK1808_DRV_BITS_PER_PIN		2
+#define RK1808_DRV_PINS_PER_REG		8
+#define RK1808_DRV_BANK_STRIDE		16
+
+static void rk1808_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
+					int pin_num,
+					struct regmap **regmap,
+					int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	if (bank->bank_num == 0) {
+		*regmap = priv->regmap_pmu;
+		*reg = RK1808_DRV_PMU_OFFSET;
+	} else {
+		*regmap = priv->regmap_base;
+		*reg = RK1808_DRV_GRF_OFFSET;
+	}
+
+	*reg += ((pin_num / RK1808_DRV_PINS_PER_REG) * 4);
+	*bit = pin_num % RK1808_DRV_PINS_PER_REG;
+	*bit *= RK1808_DRV_BITS_PER_PIN;
+}
+
+#define RK1808_SCHMITT_PMU_OFFSET		0x0040
+#define RK1808_SCHMITT_GRF_OFFSET		0x0100
+#define RK1808_SCHMITT_BANK_STRIDE		16
+#define RK1808_SCHMITT_PINS_PER_REG		8
+
+static int rk1808_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank,
+					   int pin_num,
+					   struct regmap **regmap,
+					   int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	if (bank->bank_num == 0) {
+		*regmap = priv->regmap_pmu;
+		*reg = RK1808_SCHMITT_PMU_OFFSET;
+	} else {
+		*regmap = priv->regmap_base;
+		*reg = RK1808_SCHMITT_GRF_OFFSET;
+		*reg += (bank->bank_num  - 1) * RK1808_SCHMITT_BANK_STRIDE;
+	}
+	*reg += ((pin_num / RK1808_SCHMITT_PINS_PER_REG) * 4);
+	*bit = pin_num % RK1808_SCHMITT_PINS_PER_REG;
+
+	return 0;
+}
+
+static int rk1808_set_pull(struct rockchip_pin_bank *bank,
+			   int pin_num, int pull)
+{
+	struct regmap *regmap;
+	int reg, ret;
+	u8 bit, type;
+	u32 data;
+
+	if (pull == PIN_CONFIG_BIAS_PULL_PIN_DEFAULT)
+		return -ENOTSUPP;
+
+	rk1808_calc_pull_reg_and_bit(bank, pin_num, &regmap, &reg, &bit);
+	type = bank->pull_type[pin_num / 8];
+	ret = rockchip_translate_pull_value(type, pull);
+	if (ret < 0) {
+		debug("unsupported pull setting %d\n", pull);
+		return ret;
+	}
+
+	/* enable the write to the equivalent lower bits */
+	data = ((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << (bit + 16);
+
+	data |= (ret << bit);
+	ret = regmap_write(regmap, reg, data);
+
+	return ret;
+}
+
+static int rk1808_set_drive(struct rockchip_pin_bank *bank,
+			    int pin_num, int strength)
+{
+	struct regmap *regmap;
+	int reg;
+	u32 data;
+	u8 bit;
+
+	rk1808_calc_drv_reg_and_bit(bank, pin_num, &regmap, &reg, &bit);
+
+	/* enable the write to the equivalent lower bits */
+	data = ((1 << ROCKCHIP_DRV_BITS_PER_PIN) - 1) << (bit + 16);
+	data |= (strength << bit);
+
+	return regmap_write(regmap, reg, data);
+}
+
+static int rk1808_set_schmitt(struct rockchip_pin_bank *bank,
+			      int pin_num, int enable)
+{
+	struct regmap *regmap;
+	int reg;
+	u8 bit;
+	u32 data;
+
+	rk1808_calc_schmitt_reg_and_bit(bank, pin_num, &regmap, &reg, &bit);
+	/* enable the write to the equivalent lower bits */
+	data = BIT(bit + 16) | (enable << bit);
+
+	return regmap_write(regmap, reg, data);
+}
+
+static struct rockchip_pin_bank rk1808_pin_banks[] = {
+	PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0",
+			     IOMUX_SOURCE_PMU,
+			     IOMUX_SOURCE_PMU,
+			     IOMUX_SOURCE_PMU,
+			     IOMUX_SOURCE_PMU),
+	PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1",
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT),
+	PIN_BANK_IOMUX_FLAGS(2, 32, "gpio2",
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT),
+	PIN_BANK_IOMUX_FLAGS(3, 32, "gpio3",
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT),
+	PIN_BANK_IOMUX_FLAGS(4, 32, "gpio4",
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT),
+};
+
+static const struct rockchip_pin_ctrl rk1808_pin_ctrl = {
+	.pin_banks		= rk1808_pin_banks,
+	.nr_banks		= ARRAY_SIZE(rk1808_pin_banks),
+	.nr_pins		= 160,
+	.iomux_routes		= rk1808_mux_route_data,
+	.niomux_routes		= ARRAY_SIZE(rk1808_mux_route_data),
+	.grf_mux_offset		= 0x0,
+	.pmu_mux_offset		= 0x0,
+	.set_mux		= rk1808_set_mux,
+	.set_pull		= rk1808_set_pull,
+	.set_drive		= rk1808_set_drive,
+	.set_schmitt		= rk1808_set_schmitt,
+};
+
+static const struct udevice_id rk1808_pinctrl_ids[] = {
+	{
+		.compatible = "rockchip,rk1808-pinctrl",
+		.data = (ulong)&rk1808_pin_ctrl
+	},
+	{ }
+};
+
+U_BOOT_DRIVER(pinctrl_rk1808) = {
+	.name		= "rockchip_rk1808_pinctrl",
+	.id		= UCLASS_PINCTRL,
+	.of_match	= rk1808_pinctrl_ids,
+	.priv_auto_alloc_size = sizeof(struct rockchip_pinctrl_priv),
+	.ops		= &rockchip_pinctrl_ops,
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	.bind		= dm_scan_fdt_dev,
+#endif
+	.probe		= rockchip_pinctrl_probe,
+};

commit 92b1d31aebf07a608ab4a370267763719487d450
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Wed Aug 19 14:46:37 2020 +0800

    pinctrl: rockchip: add rv1126 support
    
    Keep rv1126 support in pinctrl-rockchip.c with legency
    
    Change-Id: I50791c3c30e6efa58d324eaef7bfc4d4aa9e440c
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 8b41d33041..3c537bfba8 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -3726,7 +3726,7 @@ static const struct udevice_id rockchip_pinctrl_dt_match[] = {
 		.data = (ulong)&px30_pin_ctrl },
 	{ .compatible = "rockchip,rv1108-pinctrl",
 		.data = (ulong)&rv1108_pin_ctrl },
-	{ .compatible = "rockchip,rv1126-pinctrl",
+	{ .compatible = "rockchip,rv1126-pinctrl-legency",
 		.data = (ulong)&rv1126_pin_ctrl },
 	{ .compatible = "rockchip,rk1808-pinctrl",
 		.data = (ulong)&rk1808_pin_ctrl },
diff --git a/drivers/pinctrl/rockchip/Makefile b/drivers/pinctrl/rockchip/Makefile
index f245d7e44b..308b438ff0 100644
--- a/drivers/pinctrl/rockchip/Makefile
+++ b/drivers/pinctrl/rockchip/Makefile
@@ -13,3 +13,4 @@ obj-y += pinctrl-rockchip-core.o
 #obj-$(CONFIG_ROCKCHIP_RK3368) += pinctrl-rk3368.o
 #obj-$(CONFIG_ROCKCHIP_RK3399) += pinctrl-rk3399.o
 #obj-$(CONFIG_ROCKCHIP_RV1108) += pinctrl-rv1108.o
+obj-$(CONFIG_ROCKCHIP_RV1126) += pinctrl-rv1126.o
diff --git a/drivers/pinctrl/rockchip/pinctrl-rv1126.c b/drivers/pinctrl/rockchip/pinctrl-rv1126.c
new file mode 100644
index 0000000000..f82aa60750
--- /dev/null
+++ b/drivers/pinctrl/rockchip/pinctrl-rv1126.c
@@ -0,0 +1,412 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2020 Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <regmap.h>
+#include <syscon.h>
+
+#include "pinctrl-rockchip.h"
+
+static struct rockchip_mux_recalced_data rv1126_mux_recalced_data[] = {
+	{
+		.num = 0,
+		.pin = 20,
+		.reg = 0x10000,
+		.bit = 0,
+		.mask = 0xf
+	},
+	{
+		.num = 0,
+		.pin = 21,
+		.reg = 0x10000,
+		.bit = 4,
+		.mask = 0xf
+	},
+	{
+		.num = 0,
+		.pin = 22,
+		.reg = 0x10000,
+		.bit = 8,
+		.mask = 0xf
+	},
+	{
+		.num = 0,
+		.pin = 23,
+		.reg = 0x10000,
+		.bit = 12,
+		.mask = 0xf
+	},
+};
+
+static struct rockchip_mux_route_data rv1126_mux_route_data[] = {
+	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x10260, RK_GENMASK_VAL(0, 0, 0)), /* I2S0_MCLK_M0 */
+	MR_TOPGRF(RK_GPIO3, RK_PB0, RK_FUNC_3, 0x10260, RK_GENMASK_VAL(0, 0, 1)), /* I2S0_MCLK_M1 */
+
+	MR_TOPGRF(RK_GPIO0, RK_PD4, RK_FUNC_4, 0x10260, RK_GENMASK_VAL(2, 3, 0)), /* I2S1_MCLK_M0 */
+	MR_TOPGRF(RK_GPIO1, RK_PD5, RK_FUNC_2, 0x10260, RK_GENMASK_VAL(2, 3, 1)), /* I2S1_MCLK_M1 */
+	MR_TOPGRF(RK_GPIO2, RK_PC7, RK_FUNC_6, 0x10260, RK_GENMASK_VAL(2, 3, 2)), /* I2S1_MCLK_M2 */
+
+	MR_TOPGRF(RK_GPIO1, RK_PD0, RK_FUNC_1, 0x10260, RK_GENMASK_VAL(4, 4, 0)), /* I2S2_MCLK_M0 */
+	MR_TOPGRF(RK_GPIO2, RK_PB3, RK_FUNC_2, 0x10260, RK_GENMASK_VAL(4, 4, 1)), /* I2S2_MCLK_M1 */
+
+	MR_TOPGRF(RK_GPIO3, RK_PD4, RK_FUNC_2, 0x10260, RK_GENMASK_VAL(12, 12, 0)), /* PDM_CLK0_M0 */
+	MR_TOPGRF(RK_GPIO3, RK_PC0, RK_FUNC_3, 0x10260, RK_GENMASK_VAL(12, 12, 1)), /* PDM_CLK0_M1 */
+
+	MR_TOPGRF(RK_GPIO3, RK_PC6, RK_FUNC_1, 0x10264, RK_GENMASK_VAL(0, 0, 0)), /* CIF_CLKOUT_M0 */
+	MR_TOPGRF(RK_GPIO2, RK_PD1, RK_FUNC_3, 0x10264, RK_GENMASK_VAL(0, 0, 1)), /* CIF_CLKOUT_M1 */
+
+	MR_TOPGRF(RK_GPIO3, RK_PA4, RK_FUNC_5, 0x10264, RK_GENMASK_VAL(4, 5, 0)), /* I2C3_SCL_M0 */
+	MR_TOPGRF(RK_GPIO2, RK_PD4, RK_FUNC_7, 0x10264, RK_GENMASK_VAL(4, 5, 1)), /* I2C3_SCL_M1 */
+	MR_TOPGRF(RK_GPIO1, RK_PD6, RK_FUNC_3, 0x10264, RK_GENMASK_VAL(4, 5, 2)), /* I2C3_SCL_M2 */
+
+	MR_TOPGRF(RK_GPIO3, RK_PA0, RK_FUNC_7, 0x10264, RK_GENMASK_VAL(6, 6, 0)), /* I2C4_SCL_M0 */
+	MR_TOPGRF(RK_GPIO4, RK_PA0, RK_FUNC_4, 0x10264, RK_GENMASK_VAL(6, 6, 1)), /* I2C4_SCL_M1 */
+
+	MR_TOPGRF(RK_GPIO2, RK_PA5, RK_FUNC_7, 0x10264, RK_GENMASK_VAL(8, 9, 0)), /* I2C5_SCL_M0 */
+	MR_TOPGRF(RK_GPIO3, RK_PB0, RK_FUNC_5, 0x10264, RK_GENMASK_VAL(8, 9, 1)), /* I2C5_SCL_M1 */
+	MR_TOPGRF(RK_GPIO1, RK_PD0, RK_FUNC_4, 0x10264, RK_GENMASK_VAL(8, 9, 2)), /* I2C5_SCL_M2 */
+
+	MR_TOPGRF(RK_GPIO3, RK_PC0, RK_FUNC_5, 0x10264, RK_GENMASK_VAL(10, 11, 0)), /* SPI1_CLK_M0 */
+	MR_TOPGRF(RK_GPIO1, RK_PC6, RK_FUNC_3, 0x10264, RK_GENMASK_VAL(10, 11, 1)), /* SPI1_CLK_M1 */
+	MR_TOPGRF(RK_GPIO2, RK_PD5, RK_FUNC_6, 0x10264, RK_GENMASK_VAL(10, 11, 2)), /* SPI1_CLK_M2 */
+
+	MR_TOPGRF(RK_GPIO3, RK_PC0, RK_FUNC_2, 0x10264, RK_GENMASK_VAL(12, 12, 0)), /* RGMII_CLK_M0 */
+	MR_TOPGRF(RK_GPIO2, RK_PB7, RK_FUNC_2, 0x10264, RK_GENMASK_VAL(12, 12, 1)), /* RGMII_CLK_M1 */
+
+	MR_TOPGRF(RK_GPIO3, RK_PA1, RK_FUNC_3, 0x10264, RK_GENMASK_VAL(13, 13, 0)), /* CAN_TXD_M0 */
+	MR_TOPGRF(RK_GPIO3, RK_PA7, RK_FUNC_5, 0x10264, RK_GENMASK_VAL(13, 13, 1)), /* CAN_TXD_M1 */
+
+	MR_TOPGRF(RK_GPIO3, RK_PA4, RK_FUNC_6, 0x10268, RK_GENMASK_VAL(0, 0, 0)), /* PWM8_M0 */
+	MR_TOPGRF(RK_GPIO2, RK_PD7, RK_FUNC_5, 0x10268, RK_GENMASK_VAL(0, 0, 1)), /* PWM8_M1 */
+
+	MR_TOPGRF(RK_GPIO3, RK_PA5, RK_FUNC_6, 0x10268, RK_GENMASK_VAL(2, 2, 0)), /* PWM9_M0 */
+	MR_TOPGRF(RK_GPIO2, RK_PD6, RK_FUNC_5, 0x10268, RK_GENMASK_VAL(2, 2, 1)), /* PWM9_M1 */
+
+	MR_TOPGRF(RK_GPIO3, RK_PA6, RK_FUNC_6, 0x10268, RK_GENMASK_VAL(4, 4, 0)), /* PWM10_M0 */
+	MR_TOPGRF(RK_GPIO2, RK_PD5, RK_FUNC_5, 0x10268, RK_GENMASK_VAL(4, 4, 1)), /* PWM10_M1 */
+
+	MR_TOPGRF(RK_GPIO3, RK_PA7, RK_FUNC_6, 0x10268, RK_GENMASK_VAL(6, 6, 0)), /* PWM11_IR_M0 */
+	MR_TOPGRF(RK_GPIO3, RK_PA1, RK_FUNC_5, 0x10268, RK_GENMASK_VAL(6, 6, 1)), /* PWM11_IR_M1 */
+
+	MR_TOPGRF(RK_GPIO1, RK_PA5, RK_FUNC_3, 0x10268, RK_GENMASK_VAL(8, 8, 0)), /* UART2_TX_M0 */
+	MR_TOPGRF(RK_GPIO3, RK_PA2, RK_FUNC_1, 0x10268, RK_GENMASK_VAL(8, 8, 1)), /* UART2_TX_M1 */
+
+	MR_TOPGRF(RK_GPIO3, RK_PC6, RK_FUNC_3, 0x10268, RK_GENMASK_VAL(10, 11, 0)), /* UART3_TX_M0 */
+	MR_TOPGRF(RK_GPIO1, RK_PA7, RK_FUNC_2, 0x10268, RK_GENMASK_VAL(10, 11, 1)), /* UART3_TX_M1 */
+	MR_TOPGRF(RK_GPIO3, RK_PA0, RK_FUNC_4, 0x10268, RK_GENMASK_VAL(10, 11, 2)), /* UART3_TX_M2 */
+
+	MR_TOPGRF(RK_GPIO3, RK_PA4, RK_FUNC_4, 0x10268, RK_GENMASK_VAL(12, 13, 0)), /* UART4_TX_M0 */
+	MR_TOPGRF(RK_GPIO2, RK_PA6, RK_FUNC_4, 0x10268, RK_GENMASK_VAL(12, 13, 1)), /* UART4_TX_M1 */
+	MR_TOPGRF(RK_GPIO1, RK_PD5, RK_FUNC_3, 0x10268, RK_GENMASK_VAL(12, 13, 2)), /* UART4_TX_M2 */
+
+	MR_TOPGRF(RK_GPIO3, RK_PA6, RK_FUNC_4, 0x10268, RK_GENMASK_VAL(14, 15, 0)), /* UART5_TX_M0 */
+	MR_TOPGRF(RK_GPIO2, RK_PB0, RK_FUNC_4, 0x10268, RK_GENMASK_VAL(14, 15, 1)), /* UART5_TX_M1 */
+	MR_TOPGRF(RK_GPIO2, RK_PA0, RK_FUNC_3, 0x10268, RK_GENMASK_VAL(14, 15, 2)), /* UART5_TX_M2 */
+
+	MR_PMUGRF(RK_GPIO0, RK_PB6, RK_FUNC_3, 0x0114, RK_GENMASK_VAL(0, 0, 0)), /* PWM0_M0 */
+	MR_PMUGRF(RK_GPIO2, RK_PB3, RK_FUNC_5, 0x0114, RK_GENMASK_VAL(0, 0, 1)), /* PWM0_M1 */
+
+	MR_PMUGRF(RK_GPIO0, RK_PB7, RK_FUNC_3, 0x0114, RK_GENMASK_VAL(2, 2, 0)), /* PWM1_M0 */
+	MR_PMUGRF(RK_GPIO2, RK_PB2, RK_FUNC_5, 0x0114, RK_GENMASK_VAL(2, 2, 1)), /* PWM1_M1 */
+
+	MR_PMUGRF(RK_GPIO0, RK_PC0, RK_FUNC_3, 0x0114, RK_GENMASK_VAL(4, 4, 0)), /* PWM2_M0 */
+	MR_PMUGRF(RK_GPIO2, RK_PB1, RK_FUNC_5, 0x0114, RK_GENMASK_VAL(4, 4, 1)), /* PWM2_M1 */
+
+	MR_PMUGRF(RK_GPIO0, RK_PC1, RK_FUNC_3, 0x0114, RK_GENMASK_VAL(6, 6, 0)), /* PWM3_IR_M0 */
+	MR_PMUGRF(RK_GPIO2, RK_PB0, RK_FUNC_5, 0x0114, RK_GENMASK_VAL(6, 6, 1)), /* PWM3_IR_M1 */
+
+	MR_PMUGRF(RK_GPIO0, RK_PC2, RK_FUNC_3, 0x0114, RK_GENMASK_VAL(8, 8, 0)), /* PWM4_M0 */
+	MR_PMUGRF(RK_GPIO2, RK_PA7, RK_FUNC_5, 0x0114, RK_GENMASK_VAL(8, 8, 1)), /* PWM4_M1 */
+
+	MR_PMUGRF(RK_GPIO0, RK_PC3, RK_FUNC_3, 0x0114, RK_GENMASK_VAL(10, 10, 0)), /* PWM5_M0 */
+	MR_PMUGRF(RK_GPIO2, RK_PA6, RK_FUNC_5, 0x0114, RK_GENMASK_VAL(10, 10, 1)), /* PWM5_M1 */
+
+	MR_PMUGRF(RK_GPIO0, RK_PB2, RK_FUNC_3, 0x0114, RK_GENMASK_VAL(12, 12, 0)), /* PWM6_M0 */
+	MR_PMUGRF(RK_GPIO2, RK_PD4, RK_FUNC_5, 0x0114, RK_GENMASK_VAL(12, 12, 1)), /* PWM6_M1 */
+
+	MR_PMUGRF(RK_GPIO0, RK_PB1, RK_FUNC_3, 0x0114, RK_GENMASK_VAL(14, 14, 0)), /* PWM7_IR_M0 */
+	MR_PMUGRF(RK_GPIO3, RK_PA0, RK_FUNC_5, 0x0114, RK_GENMASK_VAL(14, 14, 1)), /* PWM7_IR_M1 */
+
+	MR_PMUGRF(RK_GPIO0, RK_PB0, RK_FUNC_1, 0x0118, RK_GENMASK_VAL(0, 1, 0)), /* SPI0_CLK_M0 */
+	MR_PMUGRF(RK_GPIO2, RK_PA1, RK_FUNC_1, 0x0118, RK_GENMASK_VAL(0, 1, 1)), /* SPI0_CLK_M1 */
+	MR_PMUGRF(RK_GPIO2, RK_PB2, RK_FUNC_6, 0x0118, RK_GENMASK_VAL(0, 1, 2)), /* SPI0_CLK_M2 */
+
+	MR_PMUGRF(RK_GPIO0, RK_PB6, RK_FUNC_2, 0x0118, RK_GENMASK_VAL(2, 2, 0)), /* UART1_TX_M0 */
+	MR_PMUGRF(RK_GPIO1, RK_PD0, RK_FUNC_5, 0x0118, RK_GENMASK_VAL(2, 2, 1)), /* UART1_TX_M1 */
+};
+
+static int rv1126_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	int iomux_num = (pin / 8);
+	struct regmap *regmap;
+	int reg, ret, mask, mux_type;
+	u8 bit;
+	u32 data;
+
+	debug("setting mux of GPIO%d-%d to %d\n", bank->bank_num, pin, mux);
+
+	if (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
+		regmap = priv->regmap_pmu;
+	else if (bank->iomux[iomux_num].type & IOMUX_L_SOURCE_PMU)
+		regmap = (pin % 8 < 4) ? priv->regmap_pmu : priv->regmap_base;
+	else
+		regmap = priv->regmap_base;
+
+	/* get basic quadrupel of mux registers and the correct reg inside */
+	mux_type = bank->iomux[iomux_num].type;
+	reg = bank->iomux[iomux_num].offset;
+	if (mux_type & IOMUX_WIDTH_4BIT) {
+		if ((pin % 8) >= 4)
+			reg += 0x4;
+		bit = (pin % 4) * 4;
+		mask = 0xf;
+	} else {
+		bit = (pin % 8) * 2;
+		mask = 0x3;
+	}
+
+	if (bank->recalced_mask & BIT(pin))
+		rockchip_get_recalced_mux(bank, pin, &reg, &bit, &mask);
+
+	data = (mask << (bit + 16));
+	data |= (mux & mask) << bit;
+	ret = regmap_write(regmap, reg, data);
+
+	return ret;
+}
+
+#define RV1126_PULL_PMU_OFFSET		0x40
+#define RV1126_PULL_GRF_GPIO1A0_OFFSET		0x10108
+#define RV1126_PULL_PINS_PER_REG	8
+#define RV1126_PULL_BITS_PER_PIN	2
+#define RV1126_PULL_BANK_STRIDE		16
+#define RV1126_GPIO_C4_D7(p)	(p >= 20 && p <= 31) /* GPIO0_C4 ~ GPIO0_D7 */
+
+static void rv1126_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
+					 int pin_num, struct regmap **regmap,
+					 int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	/* The first 24 pins of the first bank are located in PMU */
+	if (bank->bank_num == 0) {
+		if (RV1126_GPIO_C4_D7(pin_num)) {
+			*regmap = priv->regmap_base;
+			*reg = RV1126_PULL_GRF_GPIO1A0_OFFSET;
+			*reg -= (((31 - pin_num) / RV1126_PULL_PINS_PER_REG + 1) * 4);
+			*bit = pin_num % RV1126_PULL_PINS_PER_REG;
+			*bit *= RV1126_PULL_BITS_PER_PIN;
+			return;
+		}
+		*regmap = priv->regmap_pmu;
+		*reg = RV1126_PULL_PMU_OFFSET;
+	} else {
+		*reg = RV1126_PULL_GRF_GPIO1A0_OFFSET;
+		*regmap = priv->regmap_base;
+		*reg += (bank->bank_num - 1) * RV1126_PULL_BANK_STRIDE;
+	}
+
+	*reg += ((pin_num / RV1126_PULL_PINS_PER_REG) * 4);
+	*bit = (pin_num % RV1126_PULL_PINS_PER_REG);
+	*bit *= RV1126_PULL_BITS_PER_PIN;
+}
+
+static int rv1126_set_pull(struct rockchip_pin_bank *bank,
+			   int pin_num, int pull)
+{
+	struct regmap *regmap;
+	int reg, ret;
+	u8 bit, type;
+	u32 data;
+
+	if (pull == PIN_CONFIG_BIAS_PULL_PIN_DEFAULT)
+		return -ENOTSUPP;
+
+	rv1126_calc_pull_reg_and_bit(bank, pin_num, &regmap, &reg, &bit);
+	type = bank->pull_type[pin_num / 8];
+	ret = rockchip_translate_pull_value(type, pull);
+	if (ret < 0) {
+		debug("unsupported pull setting %d\n", pull);
+		return ret;
+	}
+
+	/* enable the write to the equivalent lower bits */
+	data = ((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << (bit + 16);
+
+	data |= (ret << bit);
+	ret = regmap_write(regmap, reg, data);
+
+	return ret;
+}
+
+#define RV1126_DRV_PMU_OFFSET		0x20
+#define RV1126_DRV_GRF_GPIO1A0_OFFSET		0x10090
+#define RV1126_DRV_BITS_PER_PIN		4
+#define RV1126_DRV_PINS_PER_REG		4
+#define RV1126_DRV_BANK_STRIDE		32
+
+static void rv1126_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
+					int pin_num, struct regmap **regmap,
+					int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	/* The first 24 pins of the first bank are located in PMU */
+	if (bank->bank_num == 0) {
+		if (RV1126_GPIO_C4_D7(pin_num)) {
+			*regmap = priv->regmap_base;
+			*reg = RV1126_DRV_GRF_GPIO1A0_OFFSET;
+			*reg -= (((31 - pin_num) / RV1126_DRV_PINS_PER_REG + 1) * 4);
+			*reg -= 0x4;
+			*bit = pin_num % RV1126_DRV_PINS_PER_REG;
+			*bit *= RV1126_DRV_BITS_PER_PIN;
+			return;
+		}
+		*regmap = priv->regmap_pmu;
+		*reg = RV1126_DRV_PMU_OFFSET;
+	} else {
+		*regmap = priv->regmap_base;
+		*reg = RV1126_DRV_GRF_GPIO1A0_OFFSET;
+		*reg += (bank->bank_num - 1) * RV1126_DRV_BANK_STRIDE;
+	}
+
+	*reg += ((pin_num / RV1126_DRV_PINS_PER_REG) * 4);
+	*bit = pin_num % RV1126_DRV_PINS_PER_REG;
+	*bit *= RV1126_DRV_BITS_PER_PIN;
+}
+
+static int rv1126_set_drive(struct rockchip_pin_bank *bank,
+			    int pin_num, int strength)
+{
+	struct regmap *regmap;
+	int reg;
+	u32 data;
+	u8 bit;
+
+	rv1126_calc_drv_reg_and_bit(bank, pin_num, &regmap, &reg, &bit);
+
+	/* enable the write to the equivalent lower bits */
+	data = ((1 << ROCKCHIP_DRV_BITS_PER_PIN) - 1) << (bit + 16);
+	data |= (strength << bit);
+
+	return regmap_write(regmap, reg, data);
+}
+
+#define RV1126_SCHMITT_PMU_OFFSET		0x60
+#define RV1126_SCHMITT_GRF_GPIO1A0_OFFSET		0x10188
+#define RV1126_SCHMITT_BANK_STRIDE		16
+#define RV1126_SCHMITT_PINS_PER_GRF_REG		8
+#define RV1126_SCHMITT_PINS_PER_PMU_REG		8
+
+static int rv1126_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank,
+					   int pin_num,
+					   struct regmap **regmap,
+					   int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	int pins_per_reg;
+
+	if (bank->bank_num == 0) {
+		if (RV1126_GPIO_C4_D7(pin_num)) {
+			*regmap = priv->regmap_base;
+			*reg = RV1126_SCHMITT_GRF_GPIO1A0_OFFSET;
+			*reg -= (((31 - pin_num) / RV1126_SCHMITT_PINS_PER_GRF_REG + 1) * 4);
+			*bit = pin_num % RV1126_SCHMITT_PINS_PER_GRF_REG;
+			return 0;
+		}
+		*regmap = priv->regmap_pmu;
+		*reg = RV1126_SCHMITT_PMU_OFFSET;
+		pins_per_reg = RV1126_SCHMITT_PINS_PER_PMU_REG;
+	} else {
+		*regmap = priv->regmap_base;
+		*reg = RV1126_SCHMITT_GRF_GPIO1A0_OFFSET;
+		pins_per_reg = RV1126_SCHMITT_PINS_PER_GRF_REG;
+		*reg += (bank->bank_num - 1) * RV1126_SCHMITT_BANK_STRIDE;
+	}
+	*reg += ((pin_num / pins_per_reg) * 4);
+	*bit = pin_num % pins_per_reg;
+
+	return 0;
+}
+
+static int rv1126_set_schmitt(struct rockchip_pin_bank *bank,
+			      int pin_num, int enable)
+{
+	struct regmap *regmap;
+	int reg;
+	u8 bit;
+	u32 data;
+
+	rv1126_calc_schmitt_reg_and_bit(bank, pin_num, &regmap, &reg, &bit);
+	/* enable the write to the equivalent lower bits */
+	data = BIT(bit + 16) | (enable << bit);
+
+	return regmap_write(regmap, reg, data);
+}
+
+static struct rockchip_pin_bank rv1126_pin_banks[] = {
+	PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0",
+			     IOMUX_WIDTH_4BIT | IOMUX_SOURCE_PMU,
+			     IOMUX_WIDTH_4BIT | IOMUX_SOURCE_PMU,
+			     IOMUX_WIDTH_4BIT | IOMUX_L_SOURCE_PMU,
+			     IOMUX_WIDTH_4BIT),
+	PIN_BANK_IOMUX_FLAGS_OFFSET(1, 32, "gpio1",
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT,
+			     0x10010, 0x10018, 0x10020, 0x10028),
+	PIN_BANK_IOMUX_FLAGS(2, 32, "gpio2",
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT),
+	PIN_BANK_IOMUX_FLAGS(3, 32, "gpio3",
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT),
+	PIN_BANK_IOMUX_FLAGS(4, 2, "gpio4",
+			     IOMUX_WIDTH_4BIT, 0, 0, 0),
+};
+
+static const struct rockchip_pin_ctrl rv1126_pin_ctrl = {
+	.pin_banks		= rv1126_pin_banks,
+	.nr_banks		= ARRAY_SIZE(rv1126_pin_banks),
+	.nr_pins		= 130,
+	.grf_mux_offset		= 0x10004, /* mux offset from GPIO0_D0 */
+	.pmu_mux_offset		= 0x0,
+	.iomux_routes		= rv1126_mux_route_data,
+	.niomux_routes		= ARRAY_SIZE(rv1126_mux_route_data),
+	.iomux_recalced		= rv1126_mux_recalced_data,
+	.niomux_recalced	= ARRAY_SIZE(rv1126_mux_recalced_data),
+	.set_mux		= rv1126_set_mux,
+	.set_pull		= rv1126_set_pull,
+	.set_drive		= rv1126_set_drive,
+	.set_schmitt		= rv1126_set_schmitt,
+};
+
+static const struct udevice_id rv1126_pinctrl_ids[] = {
+	{
+		.compatible = "rockchip,rv1126-pinctrl",
+		.data = (ulong)&rv1126_pin_ctrl
+	},
+	{ }
+};
+
+U_BOOT_DRIVER(pinctrl_rv1126) = {
+	.name		= "rockchip_rv1126_pinctrl",
+	.id		= UCLASS_PINCTRL,
+	.of_match	= rv1126_pinctrl_ids,
+	.priv_auto_alloc_size = sizeof(struct rockchip_pinctrl_priv),
+	.ops		= &rockchip_pinctrl_ops,
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	.bind		= dm_scan_fdt_dev,
+#endif
+	.probe		= rockchip_pinctrl_probe,
+};

commit b8d3e6ff7d0e96958f8742798609dd83d84bc075
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Wed Aug 19 15:21:44 2020 +0800

    pinctrl: rockchip: set mux route in core driver
    
    Change-Id: Iccc880b150b1cea3cef9d2a84d14a0e82ce5c5cf
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3128.c b/drivers/pinctrl/rockchip/pinctrl-rk3128.c
index 49da387397..be697b4d0d 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3128.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3128.c
@@ -105,7 +105,7 @@ static int rk3128_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
 	struct regmap *regmap;
 	int reg, ret, mask, mux_type;
 	u8 bit;
-	u32 data, route_reg, route_val;
+	u32 data;
 
 	regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
 				? priv->regmap_pmu : priv->regmap_base;
@@ -118,15 +118,6 @@ static int rk3128_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
 	if (bank->recalced_mask & BIT(pin))
 		rockchip_get_recalced_mux(bank, pin, &reg, &bit, &mask);
 
-	if (bank->route_mask & BIT(pin)) {
-		if (rockchip_get_mux_route(bank, pin, mux, &route_reg,
-					   &route_val)) {
-			ret = regmap_write(regmap, route_reg, route_val);
-			if (ret)
-				return ret;
-		}
-	}
-
 	data = (mask << (bit + 16));
 	data |= (mux & mask) << bit;
 	ret = regmap_write(regmap, reg, data);
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk322x.c b/drivers/pinctrl/rockchip/pinctrl-rk322x.c
index 097254f3f0..b66a0bc5f5 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk322x.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk322x.c
@@ -148,7 +148,7 @@ static int rk3228_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
 	struct regmap *regmap;
 	int reg, ret, mask, mux_type;
 	u8 bit;
-	u32 data, route_reg, route_val;
+	u32 data;
 
 	regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
 				? priv->regmap_pmu : priv->regmap_base;
@@ -158,15 +158,6 @@ static int rk3228_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
 	reg = bank->iomux[iomux_num].offset;
 	reg += rockchip_get_mux_data(mux_type, pin, &bit, &mask);
 
-	if (bank->route_mask & BIT(pin)) {
-		if (rockchip_get_mux_route(bank, pin, mux, &route_reg,
-					   &route_val)) {
-			ret = regmap_write(regmap, route_reg, route_val);
-			if (ret)
-				return ret;
-		}
-	}
-
 	data = (mask << (bit + 16));
 	data |= (mux & mask) << bit;
 	ret = regmap_write(regmap, reg, data);
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3288.c b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
index 1abd5f67a3..ad1c00f9a8 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3288.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
@@ -35,7 +35,7 @@ static int rk3288_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
 	struct regmap *regmap;
 	int reg, ret, mask, mux_type;
 	u8 bit;
-	u32 data, route_reg, route_val;
+	u32 data;
 
 	regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
 				? priv->regmap_pmu : priv->regmap_base;
@@ -45,15 +45,6 @@ static int rk3288_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
 	reg = bank->iomux[iomux_num].offset;
 	reg += rockchip_get_mux_data(mux_type, pin, &bit, &mask);
 
-	if (bank->route_mask & BIT(pin)) {
-		if (rockchip_get_mux_route(bank, pin, mux, &route_reg,
-					   &route_val)) {
-			ret = regmap_write(regmap, route_reg, route_val);
-			if (ret)
-				return ret;
-		}
-	}
-
 	/* bank0 is special, there are no higher 16 bit writing bits. */
 	if (bank->bank_num == 0) {
 		regmap_read(regmap, reg, &data);
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3328.c b/drivers/pinctrl/rockchip/pinctrl-rk3328.c
index 2593591bdd..8e0535f357 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3328.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3328.c
@@ -128,7 +128,7 @@ static int rk3328_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
 	struct regmap *regmap;
 	int reg, ret, mask, mux_type;
 	u8 bit;
-	u32 data, route_reg, route_val;
+	u32 data;
 
 	regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
 				? priv->regmap_pmu : priv->regmap_base;
@@ -141,15 +141,6 @@ static int rk3328_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
 	if (bank->recalced_mask & BIT(pin))
 		rockchip_get_recalced_mux(bank, pin, &reg, &bit, &mask);
 
-	if (bank->route_mask & BIT(pin)) {
-		if (rockchip_get_mux_route(bank, pin, mux, &route_reg,
-					   &route_val)) {
-			ret = regmap_write(regmap, route_reg, route_val);
-			if (ret)
-				return ret;
-		}
-	}
-
 	data = (mask << (bit + 16));
 	data |= (mux & mask) << bit;
 	ret = regmap_write(regmap, reg, data);
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3399.c b/drivers/pinctrl/rockchip/pinctrl-rk3399.c
index 5a74b7ecbd..4e5b354dd3 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3399.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3399.c
@@ -57,7 +57,7 @@ static int rk3399_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
 	struct regmap *regmap;
 	int reg, ret, mask, mux_type;
 	u8 bit;
-	u32 data, route_reg, route_val;
+	u32 data;
 
 	regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
 				? priv->regmap_pmu : priv->regmap_base;
@@ -67,15 +67,6 @@ static int rk3399_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
 	reg = bank->iomux[iomux_num].offset;
 	reg += rockchip_get_mux_data(mux_type, pin, &bit, &mask);
 
-	if (bank->route_mask & BIT(pin)) {
-		if (rockchip_get_mux_route(bank, pin, mux, &route_reg,
-					   &route_val)) {
-			ret = regmap_write(regmap, route_reg, route_val);
-			if (ret)
-				return ret;
-		}
-	}
-
 	data = (mask << (bit + 16));
 	data |= (mux & mask) << bit;
 	ret = regmap_write(regmap, reg, data);
diff --git a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
index 81c311770c..263d3b8386 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
@@ -58,8 +58,9 @@ void rockchip_get_recalced_mux(struct rockchip_pin_bank *bank, int pin,
 	*bit = data->bit;
 }
 
-bool rockchip_get_mux_route(struct rockchip_pin_bank *bank, int pin,
-			    int mux, u32 *reg, u32 *value)
+static enum rockchip_pin_route_type
+rockchip_get_mux_route(struct rockchip_pin_bank *bank, int pin,
+		       int mux, u32 *reg, u32 *value)
 {
 	struct rockchip_pinctrl_priv *priv = bank->priv;
 	struct rockchip_pin_ctrl *ctrl = priv->ctrl;
@@ -74,12 +75,12 @@ bool rockchip_get_mux_route(struct rockchip_pin_bank *bank, int pin,
 	}
 
 	if (i >= ctrl->niomux_routes)
-		return false;
+		return ROUTE_TYPE_INVALID;
 
 	*reg = data->route_offset;
 	*value = data->route_val;
 
-	return true;
+	return data->route_type;
 }
 
 int rockchip_get_mux_data(int mux_type, int pin, u8 *bit, int *mask)
@@ -210,8 +211,39 @@ static int rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
 		return -ENOTSUPP;
 
 	ret = ctrl->set_mux(bank, pin, mux);
+	if (ret)
+		return ret;
 
-	return ret;
+	if (bank->route_mask & BIT(pin)) {
+		struct regmap *regmap;
+		u32 route_reg = 0, route_val = 0;
+
+		ret = rockchip_get_mux_route(bank, pin, mux,
+					     &route_reg, &route_val);
+		switch (ret) {
+		case ROUTE_TYPE_DEFAULT:
+			if (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
+				regmap = priv->regmap_pmu;
+			else if (bank->iomux[iomux_num].type & IOMUX_L_SOURCE_PMU)
+				regmap = (pin % 8 < 4) ? priv->regmap_pmu : priv->regmap_base;
+			else
+				regmap = priv->regmap_base;
+
+			regmap_write(regmap, route_reg, route_val);
+			break;
+		case ROUTE_TYPE_TOPGRF:
+			regmap_write(priv->regmap_base, route_reg, route_val);
+			break;
+		case ROUTE_TYPE_PMUGRF:
+			regmap_write(priv->regmap_pmu, route_reg, route_val);
+			break;
+		case ROUTE_TYPE_INVALID: /* Fall through */
+		default:
+			break;
+		}
+	}
+
+	return 0;
 }
 
 static int rockchip_perpin_drv_list[DRV_TYPE_MAX][8] = {
@@ -550,8 +582,9 @@ static struct rockchip_pin_ctrl *rockchip_pinctrl_get_soc_data(struct udevice *d
 			 * 4bit iomux'es are spread over two registers.
 			 */
 			inc = (iom->type & (IOMUX_WIDTH_4BIT |
-					    IOMUX_WIDTH_3BIT)) ? 8 : 4;
-			if (iom->type & IOMUX_SOURCE_PMU)
+					    IOMUX_WIDTH_3BIT |
+					    IOMUX_8WIDTH_2BIT)) ? 8 : 4;
+			if ((iom->type & IOMUX_SOURCE_PMU) || (iom->type & IOMUX_L_SOURCE_PMU))
 				pmu_offs += inc;
 			else
 				grf_offs += inc;
diff --git a/drivers/pinctrl/rockchip/pinctrl-rockchip.h b/drivers/pinctrl/rockchip/pinctrl-rockchip.h
index 9db8009da0..7dfcaaab6c 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rockchip.h
+++ b/drivers/pinctrl/rockchip/pinctrl-rockchip.h
@@ -6,8 +6,12 @@
 #ifndef __DRIVERS_PINCTRL_ROCKCHIP_H
 #define __DRIVERS_PINCTRL_ROCKCHIP_H
 
+#include <dt-bindings/pinctrl/rockchip.h>
 #include <linux/types.h>
 
+#define RK_GENMASK_VAL(h, l, v) \
+	(GENMASK(((h) + 16), ((l) + 16)) | (((v) << (l)) & GENMASK((h), (l))))
+
 /**
  * Encode variants of iomux registers into a type variable
  */
@@ -16,7 +20,9 @@
 #define IOMUX_SOURCE_PMU	BIT(2)
 #define IOMUX_UNROUTED		BIT(3)
 #define IOMUX_WIDTH_3BIT	BIT(4)
-#define IOMUX_WRITABLE_32BIT	BIT(5)
+#define IOMUX_8WIDTH_2BIT	BIT(5)
+#define IOMUX_WRITABLE_32BIT	BIT(6)
+#define IOMUX_L_SOURCE_PMU	BIT(7)
 
 /**
  * Defined some common pins constants
@@ -67,6 +73,21 @@ enum rockchip_pin_pull_type {
 	PULL_TYPE_MAX
 };
 
+/**
+ * enum mux route register type, should be invalid/default/topgrf/pmugrf.
+ * INVALID: means do not need to set mux route
+ * DEFAULT: means same regmap as pin iomux
+ * TOPGRF: means mux route setting in topgrf
+ * PMUGRF: means mux route setting in pmugrf
+ */
+enum rockchip_pin_route_type {
+	ROUTE_TYPE_DEFAULT = 0,
+	ROUTE_TYPE_TOPGRF = 1,
+	ROUTE_TYPE_PMUGRF = 2,
+
+	ROUTE_TYPE_INVALID = -1,
+};
+
 /**
  * @drv_type: drive strength variant using rockchip_perpin_drv_type
  * @offset: if initialized to -1 it will be autocalculated, by specifying
@@ -131,6 +152,21 @@ struct rockchip_pin_bank {
 		},							\
 	}
 
+#define PIN_BANK_IOMUX_FLAGS_OFFSET(id, pins, label, iom0, iom1, iom2,	\
+				    iom3, offset0, offset1, offset2,	\
+				    offset3)				\
+	{								\
+		.bank_num	= id,					\
+		.nr_pins	= pins,					\
+		.name		= label,				\
+		.iomux		= {					\
+			{ .type = iom0, .offset = offset0 },		\
+			{ .type = iom1, .offset = offset1 },		\
+			{ .type = iom2, .offset = offset2 },		\
+			{ .type = iom3, .offset = offset3 },		\
+		},							\
+	}
+
 #define PIN_BANK_DRV_FLAGS(id, pins, label, type0, type1, type2, type3) \
 	{								\
 		.bank_num	= id,					\
@@ -251,6 +287,25 @@ struct rockchip_pin_bank {
 		.pull_type[3] = pull3,					\
 	}
 
+#define PIN_BANK_MUX_ROUTE_FLAGS(ID, PIN, FUNC, REG, VAL, FLAG)		\
+	{								\
+		.bank_num	= ID,					\
+		.pin		= PIN,					\
+		.func		= FUNC,					\
+		.route_offset	= REG,					\
+		.route_val	= VAL,					\
+		.route_type	= FLAG,					\
+	}
+
+#define MR_DEFAULT(ID, PIN, FUNC, REG, VAL)	\
+	PIN_BANK_MUX_ROUTE_FLAGS(ID, PIN, FUNC, REG, VAL, ROUTE_TYPE_DEFAULT)
+
+#define MR_TOPGRF(ID, PIN, FUNC, REG, VAL)	\
+	PIN_BANK_MUX_ROUTE_FLAGS(ID, PIN, FUNC, REG, VAL, ROUTE_TYPE_TOPGRF)
+
+#define MR_PMUGRF(ID, PIN, FUNC, REG, VAL)	\
+	PIN_BANK_MUX_ROUTE_FLAGS(ID, PIN, FUNC, REG, VAL, ROUTE_TYPE_PMUGRF)
+
 /**
  * struct rockchip_mux_recalced_data: recalculate a pin iomux data.
  * @num: bank number.
@@ -272,6 +327,7 @@ struct rockchip_mux_recalced_data {
  * @bank_num: bank number.
  * @pin: index at register or used to calc index.
  * @func: the min pin.
+ * @route_type: the register type.
  * @route_offset: the max pin.
  * @route_val: the register offset.
  */
@@ -279,6 +335,7 @@ struct rockchip_mux_route_data {
 	u8 bank_num;
 	u8 pin;
 	u8 func;
+	enum rockchip_pin_route_type route_type : 8;
 	u32 route_offset;
 	u32 route_val;
 };
@@ -320,8 +377,6 @@ extern const struct pinctrl_ops rockchip_pinctrl_ops;
 int rockchip_pinctrl_probe(struct udevice *dev);
 void rockchip_get_recalced_mux(struct rockchip_pin_bank *bank, int pin,
 			       int *reg, u8 *bit, int *mask);
-bool rockchip_get_mux_route(struct rockchip_pin_bank *bank, int pin,
-			    int mux, u32 *reg, u32 *value);
 int rockchip_get_mux_data(int mux_type, int pin, u8 *bit, int *mask);
 int rockchip_translate_drive_value(int type, int strength);
 int rockchip_translate_pull_value(int type, int pull);

commit 3624458ab007973cc54d433f7763cacbb7a772b4
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Wed Aug 19 14:28:58 2020 +0800

    pinctrl: rockchip: put nr_pins to pinctrl info structure
    
    Put the nr_pins information to pinctrl info structure, instead of
    calculating in probe.
    
    Change-Id: I3af11d99ef4b0e30c306ebd99a2233cd0c6b97b5
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3036.c b/drivers/pinctrl/rockchip/pinctrl-rk3036.c
index 28c905129b..29c16f45fd 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3036.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3036.c
@@ -83,6 +83,7 @@ static struct rockchip_pin_bank rk3036_pin_banks[] = {
 static struct rockchip_pin_ctrl rk3036_pin_ctrl = {
 	.pin_banks		= rk3036_pin_banks,
 	.nr_banks		= ARRAY_SIZE(rk3036_pin_banks),
+	.nr_pins		= 96,
 	.grf_mux_offset		= 0xa8,
 	.set_mux		= rk3036_set_mux,
 	.set_pull		= rk3036_set_pull,
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3128.c b/drivers/pinctrl/rockchip/pinctrl-rk3128.c
index 3eb4d952bb..49da387397 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3128.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3128.c
@@ -183,6 +183,7 @@ static struct rockchip_pin_bank rk3128_pin_banks[] = {
 static struct rockchip_pin_ctrl rk3128_pin_ctrl = {
 	.pin_banks		= rk3128_pin_banks,
 	.nr_banks		= ARRAY_SIZE(rk3128_pin_banks),
+	.nr_pins		= 128,
 	.grf_mux_offset		= 0xa8,
 	.iomux_recalced		= rk3128_mux_recalced_data,
 	.niomux_recalced	= ARRAY_SIZE(rk3128_mux_recalced_data),
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3188.c b/drivers/pinctrl/rockchip/pinctrl-rk3188.c
index 043764fc92..abbbf67015 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3188.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3188.c
@@ -108,6 +108,7 @@ static struct rockchip_pin_bank rk3188_pin_banks[] = {
 static struct rockchip_pin_ctrl rk3188_pin_ctrl = {
 	.pin_banks		= rk3188_pin_banks,
 	.nr_banks		= ARRAY_SIZE(rk3188_pin_banks),
+	.nr_pins		= 128,
 	.grf_mux_offset		= 0x60,
 	.set_mux		= rk3188_set_mux,
 	.set_pull		= rk3188_set_pull,
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk322x.c b/drivers/pinctrl/rockchip/pinctrl-rk322x.c
index c5e4fe30a7..097254f3f0 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk322x.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk322x.c
@@ -268,6 +268,7 @@ static struct rockchip_pin_bank rk3228_pin_banks[] = {
 static struct rockchip_pin_ctrl rk3228_pin_ctrl = {
 	.pin_banks		= rk3228_pin_banks,
 	.nr_banks		= ARRAY_SIZE(rk3228_pin_banks),
+	.nr_pins		= 128,
 	.grf_mux_offset		= 0x0,
 	.iomux_routes		= rk3228_mux_route_data,
 	.niomux_routes		= ARRAY_SIZE(rk3228_mux_route_data),
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3288.c b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
index 5aa902d64b..1abd5f67a3 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3288.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
@@ -232,6 +232,7 @@ static struct rockchip_pin_bank rk3288_pin_banks[] = {
 static struct rockchip_pin_ctrl rk3288_pin_ctrl = {
 	.pin_banks		= rk3288_pin_banks,
 	.nr_banks		= ARRAY_SIZE(rk3288_pin_banks),
+	.nr_pins		= 264,
 	.grf_mux_offset		= 0x0,
 	.pmu_mux_offset		= 0x84,
 	.iomux_routes		= rk3288_mux_route_data,
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3328.c b/drivers/pinctrl/rockchip/pinctrl-rk3328.c
index 8d37a6f945..2593591bdd 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3328.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3328.c
@@ -296,6 +296,7 @@ static struct rockchip_pin_bank rk3328_pin_banks[] = {
 static struct rockchip_pin_ctrl rk3328_pin_ctrl = {
 	.pin_banks		= rk3328_pin_banks,
 	.nr_banks		= ARRAY_SIZE(rk3328_pin_banks),
+	.nr_pins		= 128,
 	.grf_mux_offset		= 0x0,
 	.iomux_recalced		= rk3328_mux_recalced_data,
 	.niomux_recalced	= ARRAY_SIZE(rk3328_mux_recalced_data),
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3368.c b/drivers/pinctrl/rockchip/pinctrl-rk3368.c
index 6cb7bb45d9..f834e104c0 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3368.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3368.c
@@ -155,6 +155,7 @@ static struct rockchip_pin_bank rk3368_pin_banks[] = {
 static struct rockchip_pin_ctrl rk3368_pin_ctrl = {
 	.pin_banks		= rk3368_pin_banks,
 	.nr_banks		= ARRAY_SIZE(rk3368_pin_banks),
+	.nr_pins		= 128,
 	.grf_mux_offset		= 0x0,
 	.pmu_mux_offset		= 0x0,
 	.set_mux		= rk3368_set_mux,
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3399.c b/drivers/pinctrl/rockchip/pinctrl-rk3399.c
index 75634e9f4d..5a74b7ecbd 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3399.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3399.c
@@ -290,6 +290,7 @@ static struct rockchip_pin_bank rk3399_pin_banks[] = {
 static struct rockchip_pin_ctrl rk3399_pin_ctrl = {
 	.pin_banks		= rk3399_pin_banks,
 	.nr_banks		= ARRAY_SIZE(rk3399_pin_banks),
+	.nr_pins		= 160,
 	.grf_mux_offset		= 0xe000,
 	.pmu_mux_offset		= 0x0,
 	.grf_drv_offset		= 0xe100,
diff --git a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
index a5242495bf..81c311770c 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
@@ -495,6 +495,7 @@ static struct rockchip_pin_ctrl *rockchip_pinctrl_get_soc_data(struct udevice *d
 			(struct rockchip_pin_ctrl *)dev_get_driver_data(dev);
 	struct rockchip_pin_bank *bank;
 	int grf_offs, pmu_offs, drv_grf_offs, drv_pmu_offs, i, j;
+	u32 nr_pins;
 
 	grf_offs = ctrl->grf_mux_offset;
 	pmu_offs = ctrl->pmu_mux_offset;
@@ -502,12 +503,13 @@ static struct rockchip_pin_ctrl *rockchip_pinctrl_get_soc_data(struct udevice *d
 	drv_grf_offs = ctrl->grf_drv_offset;
 	bank = ctrl->pin_banks;
 
+	nr_pins = 0;
 	for (i = 0; i < ctrl->nr_banks; ++i, ++bank) {
 		int bank_pins = 0;
 
 		bank->priv = priv;
-		bank->pin_base = ctrl->nr_pins;
-		ctrl->nr_pins += bank->nr_pins;
+		bank->pin_base = nr_pins;
+		nr_pins += bank->nr_pins;
 
 		/* calculate iomux and drv offsets */
 		for (j = 0; j < 4; j++) {
@@ -515,7 +517,7 @@ static struct rockchip_pin_ctrl *rockchip_pinctrl_get_soc_data(struct udevice *d
 			struct rockchip_drv *drv = &bank->drv[j];
 			int inc;
 
-			if (bank_pins >= bank->nr_pins)
+			if (bank_pins >= nr_pins)
 				break;
 
 			/* preset iomux offset value, set new start value */
@@ -593,6 +595,8 @@ static struct rockchip_pin_ctrl *rockchip_pinctrl_get_soc_data(struct udevice *d
 		}
 	}
 
+	WARN_ON(nr_pins != ctrl->nr_pins);
+
 	return ctrl;
 }
 

commit d3acdc96e2fd0ed34beb32b26ba57131a1e04ea3
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Thu Aug 20 15:46:21 2020 +0800

    pinctrl: support to build without pinctrl driver
    
    Change-Id: I353d4a761d42ad2a22f94cc72dfeb7724e288061
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/include/dm/pinctrl.h b/include/dm/pinctrl.h
index d87c84eefb..0bcf30d6e6 100644
--- a/include/dm/pinctrl.h
+++ b/include/dm/pinctrl.h
@@ -258,13 +258,6 @@ static inline int pinctrl_generic_set_state(struct udevice *pctldev,
  * @return: 0 on success, or negative error code on failure
  */
 int pinctrl_select_state(struct udevice *dev, const char *statename);
-#else
-static inline int pinctrl_select_state(struct udevice *dev,
-				       const char *statename)
-{
-	return -EINVAL;
-}
-#endif
 
 /**
  * pinctrl_request() - Request a particular pinctrl function
@@ -338,5 +331,42 @@ int pinctrl_get_gpio_mux(struct udevice *dev, int banknum, int index);
  * @return pins count
 */
 int pinctrl_get_pins_count(struct udevice *dev);
+#else
+static inline int pinctrl_select_state(struct udevice *dev,
+				       const char *statename)
+{
+	return -EINVAL;
+}
+
+static inline int pinctrl_request(struct udevice *dev, int func, int flags)
+{
+	return -EINVAL;
+}
+
+static inline int pinctrl_request_noflags(struct udevice *dev, int func)
+{
+	return -EINVAL;
+}
+
+static inline int pinctrl_get_periph_id(struct udevice *dev, struct udevice *periph)
+{
+	return -EINVAL;
+}
+
+static inline int pinctrl_decode_pin_config(const void *blob, int node)
+{
+	return -EINVAL;
+}
+
+static inline int pinctrl_get_gpio_mux(struct udevice *dev, int banknum, int index)
+{
+	return -EINVAL;
+}
+
+static inline int pinctrl_get_pins_count(struct udevice *dev)
+{
+	return -EINVAL;
+}
+#endif
 
 #endif /* __PINCTRL_H */

commit 5635c457ecd5539a48b8876fda1e8e5e6ce52401
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Apr 16 21:58:13 2019 +0800

    UPSTREAM: pinctrl: rockchip: Also move common set_schmitter func into per Soc file
    
    Only some Soc need Schmitter feature, so move the
    implementation into their own files.
    
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 79d16e45409f928c952b6935d695cd08f9db76b3)
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
    
    Change-Id: I41ede5737258292e27492e391cf9a981210e4a71

diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3328.c b/drivers/pinctrl/rockchip/pinctrl-rk3328.c
index d4d37af206..8d37a6f945 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3328.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3328.c
@@ -264,6 +264,21 @@ static int rk3328_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank,
 	return 0;
 }
 
+static int rk3328_set_schmitt(struct rockchip_pin_bank *bank,
+			      int pin_num, int enable)
+{
+	struct regmap *regmap;
+	int reg;
+	u8 bit;
+	u32 data;
+
+	rk3328_calc_schmitt_reg_and_bit(bank, pin_num, &regmap, &reg, &bit);
+	/* enable the write to the equivalent lower bits */
+	data = BIT(bit + 16) | (enable << bit);
+
+	return regmap_write(regmap, reg, data);
+}
+
 static struct rockchip_pin_bank rk3328_pin_banks[] = {
 	PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", 0, 0, 0, 0),
 	PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1", 0, 0, 0, 0),
@@ -289,7 +304,7 @@ static struct rockchip_pin_ctrl rk3328_pin_ctrl = {
 	.set_mux		= rk3328_set_mux,
 	.set_pull		= rk3328_set_pull,
 	.set_drive		= rk3328_set_drive,
-	.schmitt_calc_reg	= rk3328_calc_schmitt_reg_and_bit,
+	.set_schmitt		= rk3328_set_schmitt,
 };
 
 static const struct udevice_id rk3328_pinctrl_ids[] = {
diff --git a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
index 42d2b35345..a5242495bf 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
@@ -306,30 +306,20 @@ static int rockchip_set_schmitt(struct rockchip_pin_bank *bank,
 {
 	struct rockchip_pinctrl_priv *priv = bank->priv;
 	struct rockchip_pin_ctrl *ctrl = priv->ctrl;
-	struct regmap *regmap;
-	int reg, ret;
-	u8 bit;
-	u32 data;
 
 	debug("setting input schmitt of GPIO%d-%d to %d\n", bank->bank_num,
 	      pin_num, enable);
 
-	ret = ctrl->schmitt_calc_reg(bank, pin_num, &regmap, &reg, &bit);
-	if (ret)
-		return ret;
-
-	/* enable the write to the equivalent lower bits */
-	data = BIT(bit + 16) | (enable << bit);
+	if (!ctrl->set_schmitt)
+		return -ENOTSUPP;
 
-	return regmap_write(regmap, reg, data);
+	return ctrl->set_schmitt(bank, pin_num, enable);
 }
 
 /* set the pin config settings for a specified pin */
 static int rockchip_pinconf_set(struct rockchip_pin_bank *bank,
 				u32 pin, u32 param, u32 arg)
 {
-	struct rockchip_pinctrl_priv *priv = bank->priv;
-	struct rockchip_pin_ctrl *ctrl = priv->ctrl;
 	int rc;
 
 	switch (param) {
@@ -350,9 +340,6 @@ static int rockchip_pinconf_set(struct rockchip_pin_bank *bank,
 		break;
 
 	case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
-		if (!ctrl->schmitt_calc_reg)
-			return -ENOTSUPP;
-
 		rc = rockchip_set_schmitt(bank, pin, arg);
 		if (rc < 0)
 			return rc;
diff --git a/drivers/pinctrl/rockchip/pinctrl-rockchip.h b/drivers/pinctrl/rockchip/pinctrl-rockchip.h
index 2d1425bc67..9db8009da0 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rockchip.h
+++ b/drivers/pinctrl/rockchip/pinctrl-rockchip.h
@@ -304,9 +304,8 @@ struct rockchip_pin_ctrl {
 			    int pin_num, int pull);
 	int	(*set_drive)(struct rockchip_pin_bank *bank,
 			     int pin_num, int strength);
-	int	(*schmitt_calc_reg)(struct rockchip_pin_bank *bank,
-				    int pin_num, struct regmap **regmap,
-				    int *reg, u8 *bit);
+	int	(*set_schmitt)(struct rockchip_pin_bank *bank,
+			       int pin_num, int enable);
 };
 
 /**
diff --git a/drivers/pinctrl/rockchip/pinctrl-rv1108.c b/drivers/pinctrl/rockchip/pinctrl-rv1108.c
index 0bcf11bb41..54610a3e90 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rv1108.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rv1108.c
@@ -237,6 +237,21 @@ static int rv1108_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank,
 	return 0;
 }
 
+static int rv1108_set_schmitt(struct rockchip_pin_bank *bank,
+			      int pin_num, int enable)
+{
+	struct regmap *regmap;
+	int reg;
+	u8 bit;
+	u32 data;
+
+	rv1108_calc_schmitt_reg_and_bit(bank, pin_num, &regmap, &reg, &bit);
+	/* enable the write to the equivalent lower bits */
+	data = BIT(bit + 16) | (enable << bit);
+
+	return regmap_write(regmap, reg, data);
+}
+
 static struct rockchip_pin_bank rv1108_pin_banks[] = {
 	PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", IOMUX_SOURCE_PMU,
 					     IOMUX_SOURCE_PMU,
@@ -257,7 +272,7 @@ static struct rockchip_pin_ctrl rv1108_pin_ctrl = {
 	.set_mux		= rv1108_set_mux,
 	.set_pull		= rv1108_set_pull,
 	.set_drive		= rv1108_set_drive,
-	.schmitt_calc_reg	= rv1108_calc_schmitt_reg_and_bit,
+	.set_schmitt		= rv1108_set_schmitt,
 };
 
 static const struct udevice_id rv1108_pinctrl_ids[] = {

commit b8a0fe4c87b08590be44b1ca7e87068a7dea531f
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Apr 16 21:57:54 2019 +0800

    UPSTREAM: pinctrl: rockchip: Clean the unused type and label
    
    As the mux/pull/drive feature implement at own file,
    the type and label are not necessary.
    
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 623aca88308b4f917f0465cd5dd1514ee781bee8)
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
    
    Change-Id: Idcbb3fdf4311567c599686d52926a057d1101b6b

diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3036.c b/drivers/pinctrl/rockchip/pinctrl-rk3036.c
index 498b633f22..28c905129b 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3036.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3036.c
@@ -83,8 +83,6 @@ static struct rockchip_pin_bank rk3036_pin_banks[] = {
 static struct rockchip_pin_ctrl rk3036_pin_ctrl = {
 	.pin_banks		= rk3036_pin_banks,
 	.nr_banks		= ARRAY_SIZE(rk3036_pin_banks),
-	.label			= "RK3036-GPIO",
-	.type			= RK3036,
 	.grf_mux_offset		= 0xa8,
 	.set_mux		= rk3036_set_mux,
 	.set_pull		= rk3036_set_pull,
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3128.c b/drivers/pinctrl/rockchip/pinctrl-rk3128.c
index 104b76c19e..3eb4d952bb 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3128.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3128.c
@@ -183,8 +183,6 @@ static struct rockchip_pin_bank rk3128_pin_banks[] = {
 static struct rockchip_pin_ctrl rk3128_pin_ctrl = {
 	.pin_banks		= rk3128_pin_banks,
 	.nr_banks		= ARRAY_SIZE(rk3128_pin_banks),
-	.label			= "RK3128-GPIO",
-	.type			= RK3128,
 	.grf_mux_offset		= 0xa8,
 	.iomux_recalced		= rk3128_mux_recalced_data,
 	.niomux_recalced	= ARRAY_SIZE(rk3128_mux_recalced_data),
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3188.c b/drivers/pinctrl/rockchip/pinctrl-rk3188.c
index e09c799e72..043764fc92 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3188.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3188.c
@@ -108,8 +108,6 @@ static struct rockchip_pin_bank rk3188_pin_banks[] = {
 static struct rockchip_pin_ctrl rk3188_pin_ctrl = {
 	.pin_banks		= rk3188_pin_banks,
 	.nr_banks		= ARRAY_SIZE(rk3188_pin_banks),
-	.label			= "RK3188-GPIO",
-	.type			= RK3188,
 	.grf_mux_offset		= 0x60,
 	.set_mux		= rk3188_set_mux,
 	.set_pull		= rk3188_set_pull,
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk322x.c b/drivers/pinctrl/rockchip/pinctrl-rk322x.c
index b69d9795bb..c5e4fe30a7 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk322x.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk322x.c
@@ -268,8 +268,6 @@ static struct rockchip_pin_bank rk3228_pin_banks[] = {
 static struct rockchip_pin_ctrl rk3228_pin_ctrl = {
 	.pin_banks		= rk3228_pin_banks,
 	.nr_banks		= ARRAY_SIZE(rk3228_pin_banks),
-	.label			= "RK3228-GPIO",
-	.type			= RK3288,
 	.grf_mux_offset		= 0x0,
 	.iomux_routes		= rk3228_mux_route_data,
 	.niomux_routes		= ARRAY_SIZE(rk3228_mux_route_data),
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3288.c b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
index e80782a3fc..5aa902d64b 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3288.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
@@ -232,8 +232,6 @@ static struct rockchip_pin_bank rk3288_pin_banks[] = {
 static struct rockchip_pin_ctrl rk3288_pin_ctrl = {
 	.pin_banks		= rk3288_pin_banks,
 	.nr_banks		= ARRAY_SIZE(rk3288_pin_banks),
-	.label			= "RK3288-GPIO",
-	.type			= RK3288,
 	.grf_mux_offset		= 0x0,
 	.pmu_mux_offset		= 0x84,
 	.iomux_routes		= rk3288_mux_route_data,
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3328.c b/drivers/pinctrl/rockchip/pinctrl-rk3328.c
index 7ac5c0226e..d4d37af206 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3328.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3328.c
@@ -281,8 +281,6 @@ static struct rockchip_pin_bank rk3328_pin_banks[] = {
 static struct rockchip_pin_ctrl rk3328_pin_ctrl = {
 	.pin_banks		= rk3328_pin_banks,
 	.nr_banks		= ARRAY_SIZE(rk3328_pin_banks),
-	.label			= "RK3328-GPIO",
-	.type			= RK3288,
 	.grf_mux_offset		= 0x0,
 	.iomux_recalced		= rk3328_mux_recalced_data,
 	.niomux_recalced	= ARRAY_SIZE(rk3328_mux_recalced_data),
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3368.c b/drivers/pinctrl/rockchip/pinctrl-rk3368.c
index 06de27aa30..6cb7bb45d9 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3368.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3368.c
@@ -155,8 +155,6 @@ static struct rockchip_pin_bank rk3368_pin_banks[] = {
 static struct rockchip_pin_ctrl rk3368_pin_ctrl = {
 	.pin_banks		= rk3368_pin_banks,
 	.nr_banks		= ARRAY_SIZE(rk3368_pin_banks),
-	.label			= "RK3368-GPIO",
-	.type			= RK3368,
 	.grf_mux_offset		= 0x0,
 	.pmu_mux_offset		= 0x0,
 	.set_mux		= rk3368_set_mux,
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3399.c b/drivers/pinctrl/rockchip/pinctrl-rk3399.c
index 68bb492a6b..75634e9f4d 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3399.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3399.c
@@ -290,8 +290,6 @@ static struct rockchip_pin_bank rk3399_pin_banks[] = {
 static struct rockchip_pin_ctrl rk3399_pin_ctrl = {
 	.pin_banks		= rk3399_pin_banks,
 	.nr_banks		= ARRAY_SIZE(rk3399_pin_banks),
-	.label			= "RK3399-GPIO",
-	.type			= RK3399,
 	.grf_mux_offset		= 0xe000,
 	.pmu_mux_offset		= 0x0,
 	.grf_drv_offset		= 0xe100,
diff --git a/drivers/pinctrl/rockchip/pinctrl-rockchip.h b/drivers/pinctrl/rockchip/pinctrl-rockchip.h
index 41cb1a8c90..2d1425bc67 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rockchip.h
+++ b/drivers/pinctrl/rockchip/pinctrl-rockchip.h
@@ -8,16 +8,6 @@
 
 #include <linux/types.h>
 
-enum rockchip_pinctrl_type {
-	RV1108,
-	RK3036,
-	RK3128,
-	RK3188,
-	RK3288,
-	RK3368,
-	RK3399,
-};
-
 /**
  * Encode variants of iomux registers into a type variable
  */
@@ -299,8 +289,6 @@ struct rockchip_pin_ctrl {
 	struct rockchip_pin_bank	*pin_banks;
 	u32				nr_banks;
 	u32				nr_pins;
-	char				*label;
-	enum rockchip_pinctrl_type	type;
 	int				grf_mux_offset;
 	int				pmu_mux_offset;
 	int				grf_drv_offset;
diff --git a/drivers/pinctrl/rockchip/pinctrl-rv1108.c b/drivers/pinctrl/rockchip/pinctrl-rv1108.c
index 6456483e36..0bcf11bb41 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rv1108.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rv1108.c
@@ -250,8 +250,6 @@ static struct rockchip_pin_bank rv1108_pin_banks[] = {
 static struct rockchip_pin_ctrl rv1108_pin_ctrl = {
 	.pin_banks		= rv1108_pin_banks,
 	.nr_banks		= ARRAY_SIZE(rv1108_pin_banks),
-	.label			= "RV1108-GPIO",
-	.type			= RV1108,
 	.grf_mux_offset		= 0x10,
 	.pmu_mux_offset		= 0x0,
 	.iomux_recalced		= rv1108_mux_recalced_data,

commit cfe427fe38ccdf09ceeb91c7d8ef1f8e40cc09de
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Apr 16 21:57:28 2019 +0800

    UPSTREAM: pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' pull
    
    RK3288 pmu_gpio0 pull setting have no higher 16 writing corresponding
    bits, need to read before write the register.
    
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 69a38f81bb55893a8555c899319305c539226a0a)
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
    
    Change-Id: Ie8f94cf1a0b33a24bb32d3de8231b7f2db51ddff

diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3288.c b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
index 3af87dc47f..e80782a3fc 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3288.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
@@ -116,8 +116,15 @@ static int rk3288_set_pull(struct rockchip_pin_bank *bank,
 		return ret;
 	}
 
-	/* enable the write to the equivalent lower bits */
-	data = ((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << (bit + 16);
+	/* bank0 is special, there are no higher 16 bit writing bits */
+	if (bank->bank_num == 0) {
+		regmap_read(regmap, reg, &data);
+		data &= ~(((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << bit);
+	} else {
+		/* enable the write to the equivalent lower bits */
+		data = ((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << (bit + 16);
+	}
+
 	data |= (ret << bit);
 	ret = regmap_write(regmap, reg, data);
 

commit 05a5688e53600eddaf2bda77c3804cae2a65b2c9
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Apr 16 21:57:05 2019 +0800

    UPSTREAM: pinctrl: rockchip: Split the common set_pull() func into per Soc
    
    As the common set_mux func(), implement the feature at the own file
    for each Soc.
    
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 743a77373bfa22ca099b30d4ac88d95a2f98d1b6)
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
    
    Change-Id: Ib0de627d3aee1759965d64852bcd287785538dc0

diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3036.c b/drivers/pinctrl/rockchip/pinctrl-rk3036.c
index 8969aea2e3..498b633f22 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3036.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3036.c
@@ -53,6 +53,27 @@ static void rk3036_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
 	*bit = pin_num % RK3036_PULL_PINS_PER_REG;
 };
 
+static int rk3036_set_pull(struct rockchip_pin_bank *bank,
+			   int pin_num, int pull)
+{
+	struct regmap *regmap;
+	int reg, ret;
+	u8 bit;
+	u32 data;
+
+	if (pull != PIN_CONFIG_BIAS_PULL_PIN_DEFAULT &&
+	    pull != PIN_CONFIG_BIAS_DISABLE)
+		return -ENOTSUPP;
+
+	rk3036_calc_pull_reg_and_bit(bank, pin_num, &regmap, &reg, &bit);
+	data = BIT(bit + 16);
+	if (pull == PIN_CONFIG_BIAS_DISABLE)
+		data |= BIT(bit);
+	ret = regmap_write(regmap, reg, data);
+
+	return ret;
+}
+
 static struct rockchip_pin_bank rk3036_pin_banks[] = {
 	PIN_BANK(0, 32, "gpio0"),
 	PIN_BANK(1, 32, "gpio1"),
@@ -66,7 +87,7 @@ static struct rockchip_pin_ctrl rk3036_pin_ctrl = {
 	.type			= RK3036,
 	.grf_mux_offset		= 0xa8,
 	.set_mux		= rk3036_set_mux,
-	.pull_calc_reg		= rk3036_calc_pull_reg_and_bit,
+	.set_pull		= rk3036_set_pull,
 };
 
 static const struct udevice_id rk3036_pinctrl_ids[] = {
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3128.c b/drivers/pinctrl/rockchip/pinctrl-rk3128.c
index de203334c7..104b76c19e 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3128.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3128.c
@@ -152,6 +152,27 @@ static void rk3128_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
 	*bit = pin_num % RK3128_PULL_PINS_PER_REG;
 }
 
+static int rk3128_set_pull(struct rockchip_pin_bank *bank,
+			   int pin_num, int pull)
+{
+	struct regmap *regmap;
+	int reg, ret;
+	u8 bit;
+	u32 data;
+
+	if (pull != PIN_CONFIG_BIAS_PULL_PIN_DEFAULT &&
+	    pull != PIN_CONFIG_BIAS_DISABLE)
+		return -ENOTSUPP;
+
+	rk3128_calc_pull_reg_and_bit(bank, pin_num, &regmap, &reg, &bit);
+	data = BIT(bit + 16);
+	if (pull == PIN_CONFIG_BIAS_DISABLE)
+		data |= BIT(bit);
+	ret = regmap_write(regmap, reg, data);
+
+	return ret;
+}
+
 static struct rockchip_pin_bank rk3128_pin_banks[] = {
 	PIN_BANK(0, 32, "gpio0"),
 	PIN_BANK(1, 32, "gpio1"),
@@ -170,7 +191,7 @@ static struct rockchip_pin_ctrl rk3128_pin_ctrl = {
 	.iomux_routes		= rk3128_mux_route_data,
 	.niomux_routes		= ARRAY_SIZE(rk3128_mux_route_data),
 	.set_mux		= rk3128_set_mux,
-	.pull_calc_reg		= rk3128_calc_pull_reg_and_bit,
+	.set_pull		= rk3128_set_pull,
 };
 
 static const struct udevice_id rk3128_pinctrl_ids[] = {
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3188.c b/drivers/pinctrl/rockchip/pinctrl-rk3188.c
index 617ae28ac8..e09c799e72 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3188.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3188.c
@@ -71,6 +71,33 @@ static void rk3188_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
 	}
 }
 
+static int rk3188_set_pull(struct rockchip_pin_bank *bank,
+			   int pin_num, int pull)
+{
+	struct regmap *regmap;
+	int reg, ret;
+	u8 bit, type;
+	u32 data;
+
+	if (pull == PIN_CONFIG_BIAS_PULL_PIN_DEFAULT)
+		return -ENOTSUPP;
+
+	rk3188_calc_pull_reg_and_bit(bank, pin_num, &regmap, &reg, &bit);
+	type = bank->pull_type[pin_num / 8];
+	ret = rockchip_translate_pull_value(type, pull);
+	if (ret < 0) {
+		debug("unsupported pull setting %d\n", pull);
+		return ret;
+	}
+
+	/* enable the write to the equivalent lower bits */
+	data = ((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << (bit + 16);
+	data |= (ret << bit);
+	ret = regmap_write(regmap, reg, data);
+
+	return ret;
+}
+
 static struct rockchip_pin_bank rk3188_pin_banks[] = {
 	PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", IOMUX_GPIO_ONLY, 0, 0, 0),
 	PIN_BANK(1, 32, "gpio1"),
@@ -85,7 +112,7 @@ static struct rockchip_pin_ctrl rk3188_pin_ctrl = {
 	.type			= RK3188,
 	.grf_mux_offset		= 0x60,
 	.set_mux		= rk3188_set_mux,
-	.pull_calc_reg		= rk3188_calc_pull_reg_and_bit,
+	.set_pull		= rk3188_set_pull,
 };
 
 static const struct udevice_id rk3188_pinctrl_ids[] = {
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk322x.c b/drivers/pinctrl/rockchip/pinctrl-rk322x.c
index 10200ff3c8..b69d9795bb 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk322x.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk322x.c
@@ -191,6 +191,33 @@ static void rk3228_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
 	*bit *= ROCKCHIP_PULL_BITS_PER_PIN;
 }
 
+static int rk3228_set_pull(struct rockchip_pin_bank *bank,
+			   int pin_num, int pull)
+{
+	struct regmap *regmap;
+	int reg, ret;
+	u8 bit, type;
+	u32 data;
+
+	if (pull == PIN_CONFIG_BIAS_PULL_PIN_DEFAULT)
+		return -ENOTSUPP;
+
+	rk3228_calc_pull_reg_and_bit(bank, pin_num, &regmap, &reg, &bit);
+	type = bank->pull_type[pin_num / 8];
+	ret = rockchip_translate_pull_value(type, pull);
+	if (ret < 0) {
+		debug("unsupported pull setting %d\n", pull);
+		return ret;
+	}
+
+	/* enable the write to the equivalent lower bits */
+	data = ((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << (bit + 16);
+	data |= (ret << bit);
+	ret = regmap_write(regmap, reg, data);
+
+	return ret;
+}
+
 #define RK3228_DRV_GRF_OFFSET		0x200
 
 static void rk3228_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
@@ -247,7 +274,7 @@ static struct rockchip_pin_ctrl rk3228_pin_ctrl = {
 	.iomux_routes		= rk3228_mux_route_data,
 	.niomux_routes		= ARRAY_SIZE(rk3228_mux_route_data),
 	.set_mux		= rk3228_set_mux,
-	.pull_calc_reg		= rk3228_calc_pull_reg_and_bit,
+	.set_pull		= rk3228_set_pull,
 	.set_drive		= rk3228_set_drive,
 };
 
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3288.c b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
index c8dad035ca..3af87dc47f 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3288.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
@@ -82,10 +82,6 @@ static void rk3288_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
 	if (bank->bank_num == 0) {
 		*regmap = priv->regmap_pmu;
 		*reg = RK3288_PULL_PMU_OFFSET;
-
-		*reg += ((pin_num / ROCKCHIP_PULL_PINS_PER_REG) * 4);
-		*bit = pin_num % ROCKCHIP_PULL_PINS_PER_REG;
-		*bit *= ROCKCHIP_PULL_BITS_PER_PIN;
 	} else {
 		*regmap = priv->regmap_base;
 		*reg = RK3288_PULL_OFFSET;
@@ -93,11 +89,39 @@ static void rk3288_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
 		/* correct the offset, as we're starting with the 2nd bank */
 		*reg -= 0x10;
 		*reg += bank->bank_num * ROCKCHIP_PULL_BANK_STRIDE;
-		*reg += ((pin_num / ROCKCHIP_PULL_PINS_PER_REG) * 4);
+	}
+
+	*reg += ((pin_num / ROCKCHIP_PULL_PINS_PER_REG) * 4);
+
+	*bit = (pin_num % ROCKCHIP_PULL_PINS_PER_REG);
+	*bit *= ROCKCHIP_PULL_BITS_PER_PIN;
+}
+
+static int rk3288_set_pull(struct rockchip_pin_bank *bank,
+			   int pin_num, int pull)
+{
+	struct regmap *regmap;
+	int reg, ret;
+	u8 bit, type;
+	u32 data;
+
+	if (pull == PIN_CONFIG_BIAS_PULL_PIN_DEFAULT)
+		return -ENOTSUPP;
 
-		*bit = (pin_num % ROCKCHIP_PULL_PINS_PER_REG);
-		*bit *= ROCKCHIP_PULL_BITS_PER_PIN;
+	rk3288_calc_pull_reg_and_bit(bank, pin_num, &regmap, &reg, &bit);
+	type = bank->pull_type[pin_num / 8];
+	ret = rockchip_translate_pull_value(type, pull);
+	if (ret < 0) {
+		debug("unsupported pull setting %d\n", pull);
+		return ret;
 	}
+
+	/* enable the write to the equivalent lower bits */
+	data = ((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << (bit + 16);
+	data |= (ret << bit);
+	ret = regmap_write(regmap, reg, data);
+
+	return ret;
 }
 
 #define RK3288_DRV_PMU_OFFSET		0x70
@@ -208,7 +232,7 @@ static struct rockchip_pin_ctrl rk3288_pin_ctrl = {
 	.iomux_routes		= rk3288_mux_route_data,
 	.niomux_routes		= ARRAY_SIZE(rk3288_mux_route_data),
 	.set_mux		= rk3288_set_mux,
-	.pull_calc_reg		= rk3288_calc_pull_reg_and_bit,
+	.set_pull		= rk3288_set_pull,
 	.set_drive		= rk3288_set_drive,
 };
 
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3328.c b/drivers/pinctrl/rockchip/pinctrl-rk3328.c
index 0ad5669d26..7ac5c0226e 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3328.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3328.c
@@ -174,6 +174,33 @@ static void rk3328_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
 	*bit *= ROCKCHIP_PULL_BITS_PER_PIN;
 }
 
+static int rk3328_set_pull(struct rockchip_pin_bank *bank,
+			   int pin_num, int pull)
+{
+	struct regmap *regmap;
+	int reg, ret;
+	u8 bit, type;
+	u32 data;
+
+	if (pull == PIN_CONFIG_BIAS_PULL_PIN_DEFAULT)
+		return -ENOTSUPP;
+
+	rk3328_calc_pull_reg_and_bit(bank, pin_num, &regmap, &reg, &bit);
+	type = bank->pull_type[pin_num / 8];
+	ret = rockchip_translate_pull_value(type, pull);
+	if (ret < 0) {
+		debug("unsupported pull setting %d\n", pull);
+		return ret;
+	}
+
+	/* enable the write to the equivalent lower bits */
+	data = ((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << (bit + 16);
+	data |= (ret << bit);
+	ret = regmap_write(regmap, reg, data);
+
+	return ret;
+}
+
 #define RK3328_DRV_GRF_OFFSET		0x200
 
 static void rk3328_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
@@ -262,7 +289,7 @@ static struct rockchip_pin_ctrl rk3328_pin_ctrl = {
 	.iomux_routes		= rk3328_mux_route_data,
 	.niomux_routes		= ARRAY_SIZE(rk3328_mux_route_data),
 	.set_mux		= rk3328_set_mux,
-	.pull_calc_reg		= rk3328_calc_pull_reg_and_bit,
+	.set_pull		= rk3328_set_pull,
 	.set_drive		= rk3328_set_drive,
 	.schmitt_calc_reg	= rk3328_calc_schmitt_reg_and_bit,
 };
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3368.c b/drivers/pinctrl/rockchip/pinctrl-rk3368.c
index 40cc846fa8..06de27aa30 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3368.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3368.c
@@ -48,10 +48,6 @@ static void rk3368_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
 	if (bank->bank_num == 0) {
 		*regmap = priv->regmap_pmu;
 		*reg = RK3368_PULL_PMU_OFFSET;
-
-		*reg += ((pin_num / ROCKCHIP_PULL_PINS_PER_REG) * 4);
-		*bit = pin_num % ROCKCHIP_PULL_PINS_PER_REG;
-		*bit *= ROCKCHIP_PULL_BITS_PER_PIN;
 	} else {
 		*regmap = priv->regmap_base;
 		*reg = RK3368_PULL_GRF_OFFSET;
@@ -59,11 +55,39 @@ static void rk3368_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
 		/* correct the offset, as we're starting with the 2nd bank */
 		*reg -= 0x10;
 		*reg += bank->bank_num * ROCKCHIP_PULL_BANK_STRIDE;
-		*reg += ((pin_num / ROCKCHIP_PULL_PINS_PER_REG) * 4);
+	}
+
+	*reg += ((pin_num / ROCKCHIP_PULL_PINS_PER_REG) * 4);
+
+	*bit = (pin_num % ROCKCHIP_PULL_PINS_PER_REG);
+	*bit *= ROCKCHIP_PULL_BITS_PER_PIN;
+}
+
+static int rk3368_set_pull(struct rockchip_pin_bank *bank,
+			   int pin_num, int pull)
+{
+	struct regmap *regmap;
+	int reg, ret;
+	u8 bit, type;
+	u32 data;
 
-		*bit = (pin_num % ROCKCHIP_PULL_PINS_PER_REG);
-		*bit *= ROCKCHIP_PULL_BITS_PER_PIN;
+	if (pull == PIN_CONFIG_BIAS_PULL_PIN_DEFAULT)
+		return -ENOTSUPP;
+
+	rk3368_calc_pull_reg_and_bit(bank, pin_num, &regmap, &reg, &bit);
+	type = bank->pull_type[pin_num / 8];
+	ret = rockchip_translate_pull_value(type, pull);
+	if (ret < 0) {
+		debug("unsupported pull setting %d\n", pull);
+		return ret;
 	}
+
+	/* enable the write to the equivalent lower bits */
+	data = ((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << (bit + 16);
+	data |= (ret << bit);
+	ret = regmap_write(regmap, reg, data);
+
+	return ret;
 }
 
 #define RK3368_DRV_PMU_OFFSET		0x20
@@ -136,7 +160,7 @@ static struct rockchip_pin_ctrl rk3368_pin_ctrl = {
 	.grf_mux_offset		= 0x0,
 	.pmu_mux_offset		= 0x0,
 	.set_mux		= rk3368_set_mux,
-	.pull_calc_reg		= rk3368_calc_pull_reg_and_bit,
+	.set_pull		= rk3368_set_pull,
 	.set_drive		= rk3368_set_drive,
 };
 
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3399.c b/drivers/pinctrl/rockchip/pinctrl-rk3399.c
index 82c8feeb7b..68bb492a6b 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3399.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3399.c
@@ -98,10 +98,6 @@ static void rk3399_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
 		*reg = RK3399_PULL_PMU_OFFSET;
 
 		*reg += bank->bank_num * ROCKCHIP_PULL_BANK_STRIDE;
-
-		*reg += ((pin_num / ROCKCHIP_PULL_PINS_PER_REG) * 4);
-		*bit = pin_num % ROCKCHIP_PULL_PINS_PER_REG;
-		*bit *= ROCKCHIP_PULL_BITS_PER_PIN;
 	} else {
 		*regmap = priv->regmap_base;
 		*reg = RK3399_PULL_GRF_OFFSET;
@@ -109,11 +105,39 @@ static void rk3399_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
 		/* correct the offset, as we're starting with the 3rd bank */
 		*reg -= 0x20;
 		*reg += bank->bank_num * ROCKCHIP_PULL_BANK_STRIDE;
-		*reg += ((pin_num / ROCKCHIP_PULL_PINS_PER_REG) * 4);
+	}
+
+	*reg += ((pin_num / ROCKCHIP_PULL_PINS_PER_REG) * 4);
+
+	*bit = (pin_num % ROCKCHIP_PULL_PINS_PER_REG);
+	*bit *= ROCKCHIP_PULL_BITS_PER_PIN;
+}
+
+static int rk3399_set_pull(struct rockchip_pin_bank *bank,
+			   int pin_num, int pull)
+{
+	struct regmap *regmap;
+	int reg, ret;
+	u8 bit, type;
+	u32 data;
 
-		*bit = (pin_num % ROCKCHIP_PULL_PINS_PER_REG);
-		*bit *= ROCKCHIP_PULL_BITS_PER_PIN;
+	if (pull == PIN_CONFIG_BIAS_PULL_PIN_DEFAULT)
+		return -ENOTSUPP;
+
+	rk3399_calc_pull_reg_and_bit(bank, pin_num, &regmap, &reg, &bit);
+	type = bank->pull_type[pin_num / 8];
+	ret = rockchip_translate_pull_value(type, pull);
+	if (ret < 0) {
+		debug("unsupported pull setting %d\n", pull);
+		return ret;
 	}
+
+	/* enable the write to the equivalent lower bits */
+	data = ((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << (bit + 16);
+	data |= (ret << bit);
+	ret = regmap_write(regmap, reg, data);
+
+	return ret;
 }
 
 static void rk3399_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
@@ -275,7 +299,7 @@ static struct rockchip_pin_ctrl rk3399_pin_ctrl = {
 	.iomux_routes		= rk3399_mux_route_data,
 	.niomux_routes		= ARRAY_SIZE(rk3399_mux_route_data),
 	.set_mux		= rk3399_set_mux,
-	.pull_calc_reg		= rk3399_calc_pull_reg_and_bit,
+	.set_pull		= rk3399_set_pull,
 	.set_drive		= rk3399_set_drive,
 };
 
diff --git a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
index 1d01e4d325..42d2b35345 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
@@ -270,70 +270,35 @@ static int rockchip_pull_list[PULL_TYPE_MAX][4] = {
 	},
 };
 
+int rockchip_translate_pull_value(int type, int pull)
+{
+	int i, ret;
+
+	ret = -EINVAL;
+	for (i = 0; i < ARRAY_SIZE(rockchip_pull_list[type]);
+		i++) {
+		if (rockchip_pull_list[type][i] == pull) {
+			ret = i;
+			break;
+		}
+	}
+
+	return ret;
+}
+
 static int rockchip_set_pull(struct rockchip_pin_bank *bank,
 			     int pin_num, int pull)
 {
 	struct rockchip_pinctrl_priv *priv = bank->priv;
 	struct rockchip_pin_ctrl *ctrl = priv->ctrl;
-	struct regmap *regmap;
-	int reg, ret, i, pull_type;
-	u8 bit;
-	u32 data;
 
 	debug("setting pull of GPIO%d-%d to %d\n", bank->bank_num,
 	      pin_num, pull);
 
-	ctrl->pull_calc_reg(bank, pin_num, &regmap, &reg, &bit);
-
-	switch (ctrl->type) {
-	case RK3036:
-	case RK3128:
-		data = BIT(bit + 16);
-		if (pull == PIN_CONFIG_BIAS_DISABLE)
-			data |= BIT(bit);
-		ret = regmap_write(regmap, reg, data);
-		break;
-	case RV1108:
-	case RK3188:
-	case RK3288:
-	case RK3368:
-	case RK3399:
-		/*
-		 * Where need to clean the special mask for
-		 * rockchip_pull_list.
-		 */
-		pull_type = bank->pull_type[pin_num / 8] & (~PULL_TYPE_IO_MASK);
-		ret = -EINVAL;
-		for (i = 0; i < ARRAY_SIZE(rockchip_pull_list[pull_type]);
-			i++) {
-			if (rockchip_pull_list[pull_type][i] == pull) {
-				ret = i;
-				break;
-			}
-		}
-
-		if (ret < 0) {
-			debug("unsupported pull setting %d\n", pull);
-			return ret;
-		}
-
-		if (bank->pull_type[pin_num / 8] & PULL_TYPE_WRITABLE_32BIT) {
-			regmap_read(regmap, reg, &data);
-			data &= ~(((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << bit);
-		} else {
-			/* enable the write to the equivalent lower bits */
-			data = ((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << (bit + 16);
-		}
-
-		data |= (ret << bit);
-		ret = regmap_write(regmap, reg, data);
-		break;
-	default:
-		debug("unsupported pinctrl type\n");
-		return -EINVAL;
-	}
+	if (!ctrl->set_pull)
+		return -ENOTSUPP;
 
-	return ret;
+	return ctrl->set_pull(bank, pin_num, pull);
 }
 
 static int rockchip_set_schmitt(struct rockchip_pin_bank *bank,
@@ -359,28 +324,6 @@ static int rockchip_set_schmitt(struct rockchip_pin_bank *bank,
 	return regmap_write(regmap, reg, data);
 }
 
-/*
- * Pinconf_ops handling
- */
-static bool rockchip_pinconf_pull_valid(struct rockchip_pin_ctrl *ctrl,
-					unsigned int pull)
-{
-	switch (ctrl->type) {
-	case RK3036:
-	case RK3128:
-		return (pull == PIN_CONFIG_BIAS_PULL_PIN_DEFAULT ||
-			pull == PIN_CONFIG_BIAS_DISABLE);
-	case RV1108:
-	case RK3188:
-	case RK3288:
-	case RK3368:
-	case RK3399:
-		return (pull != PIN_CONFIG_BIAS_PULL_PIN_DEFAULT);
-	}
-
-	return false;
-}
-
 /* set the pin config settings for a specified pin */
 static int rockchip_pinconf_set(struct rockchip_pin_bank *bank,
 				u32 pin, u32 param, u32 arg)
@@ -391,21 +334,10 @@ static int rockchip_pinconf_set(struct rockchip_pin_bank *bank,
 
 	switch (param) {
 	case PIN_CONFIG_BIAS_DISABLE:
-		rc =  rockchip_set_pull(bank, pin, param);
-		if (rc)
-			return rc;
-		break;
-
 	case PIN_CONFIG_BIAS_PULL_UP:
 	case PIN_CONFIG_BIAS_PULL_DOWN:
 	case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT:
 	case PIN_CONFIG_BIAS_BUS_HOLD:
-		if (!rockchip_pinconf_pull_valid(ctrl, param))
-			return -ENOTSUPP;
-
-		if (!arg)
-			return -EINVAL;
-
 		rc = rockchip_set_pull(bank, pin, param);
 		if (rc)
 			return rc;
diff --git a/drivers/pinctrl/rockchip/pinctrl-rockchip.h b/drivers/pinctrl/rockchip/pinctrl-rockchip.h
index a4928198a0..41cb1a8c90 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rockchip.h
+++ b/drivers/pinctrl/rockchip/pinctrl-rockchip.h
@@ -312,10 +312,8 @@ struct rockchip_pin_ctrl {
 
 	int	(*set_mux)(struct rockchip_pin_bank *bank,
 			   int pin, int mux);
-
-	void	(*pull_calc_reg)(struct rockchip_pin_bank *bank,
-				 int pin_num, struct regmap **regmap,
-				 int *reg, u8 *bit);
+	int	(*set_pull)(struct rockchip_pin_bank *bank,
+			    int pin_num, int pull);
 	int	(*set_drive)(struct rockchip_pin_bank *bank,
 			     int pin_num, int strength);
 	int	(*schmitt_calc_reg)(struct rockchip_pin_bank *bank,
@@ -339,5 +337,6 @@ bool rockchip_get_mux_route(struct rockchip_pin_bank *bank, int pin,
 			    int mux, u32 *reg, u32 *value);
 int rockchip_get_mux_data(int mux_type, int pin, u8 *bit, int *mask);
 int rockchip_translate_drive_value(int type, int strength);
+int rockchip_translate_pull_value(int type, int pull);
 
 #endif /* __DRIVERS_PINCTRL_ROCKCHIP_H */
diff --git a/drivers/pinctrl/rockchip/pinctrl-rv1108.c b/drivers/pinctrl/rockchip/pinctrl-rv1108.c
index 1a150ff0f1..6456483e36 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rv1108.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rv1108.c
@@ -128,6 +128,34 @@ static void rv1108_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
 	*bit *= ROCKCHIP_PULL_BITS_PER_PIN;
 }
 
+static int rv1108_set_pull(struct rockchip_pin_bank *bank,
+			   int pin_num, int pull)
+{
+	struct regmap *regmap;
+	int reg, ret;
+	u8 bit, type;
+	u32 data;
+
+	if (pull == PIN_CONFIG_BIAS_PULL_PIN_DEFAULT)
+		return -ENOTSUPP;
+
+	rv1108_calc_pull_reg_and_bit(bank, pin_num, &regmap, &reg, &bit);
+	type = bank->pull_type[pin_num / 8];
+	ret = rockchip_translate_pull_value(type, pull);
+	if (ret < 0) {
+		debug("unsupported pull setting %d\n", pull);
+		return ret;
+	}
+
+	/* enable the write to the equivalent lower bits */
+	data = ((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << (bit + 16);
+
+	data |= (ret << bit);
+	ret = regmap_write(regmap, reg, data);
+
+	return ret;
+}
+
 #define RV1108_DRV_PMU_OFFSET		0x20
 #define RV1108_DRV_GRF_OFFSET		0x210
 
@@ -229,7 +257,7 @@ static struct rockchip_pin_ctrl rv1108_pin_ctrl = {
 	.iomux_recalced		= rv1108_mux_recalced_data,
 	.niomux_recalced	= ARRAY_SIZE(rv1108_mux_recalced_data),
 	.set_mux		= rv1108_set_mux,
-	.pull_calc_reg		= rv1108_calc_pull_reg_and_bit,
+	.set_pull		= rv1108_set_pull,
 	.set_drive		= rv1108_set_drive,
 	.schmitt_calc_reg	= rv1108_calc_schmitt_reg_and_bit,
 };

commit 79899a49f901431446536f9af4cd176fba1ebaee
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Apr 16 21:56:34 2019 +0800

    UPSTREAM: pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' drive strength
    
    RK3288 pmu_gpio0 drive strength setting have no higher 16 writing
    corresponding bits, need to read before write the register.
    
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 956362c84b0422ea99da947feca2878193c26ade)
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
    
    Change-Id: I409107119d557b953c904b53e657685907879a3a

diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3288.c b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
index 9fb5ff73f9..c8dad035ca 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3288.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
@@ -143,8 +143,15 @@ static int rk3288_set_drive(struct rockchip_pin_bank *bank,
 		return ret;
 	}
 
-	/* enable the write to the equivalent lower bits */
-	data = ((1 << ROCKCHIP_DRV_BITS_PER_PIN) - 1) << (bit + 16);
+	/* bank0 is special, there are no higher 16 bit writing bits. */
+	if (bank->bank_num == 0) {
+		regmap_read(regmap, reg, &data);
+		data &= ~(((1 << ROCKCHIP_DRV_BITS_PER_PIN) - 1) << bit);
+	} else {
+		/* enable the write to the equivalent lower bits */
+		data = ((1 << ROCKCHIP_DRV_BITS_PER_PIN) - 1) << (bit + 16);
+	}
+
 	data |= (ret << bit);
 	ret = regmap_write(regmap, reg, data);
 	return ret;

commit 681441e6415f6c1eb6219bac6664534fc2db192c
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Apr 16 21:55:26 2019 +0800

    UPSTREAM: pinctrl: rockchip: Split the common set_drive() func into per Soc
    
    As the common set_mux func(), implement the feature at the own file
    for each Soc.
    
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 625ab11fdae3daf346647aaba59abee804e34589)
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
    
    Change-Id: I07caae48cd4699aa7bbddf2edf7de6863c0a58c2

diff --git a/drivers/pinctrl/rockchip/pinctrl-rk322x.c b/drivers/pinctrl/rockchip/pinctrl-rk322x.c
index 442c40ce0b..10200ff3c8 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk322x.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk322x.c
@@ -208,6 +208,29 @@ static void rk3228_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
 	*bit *= ROCKCHIP_DRV_BITS_PER_PIN;
 }
 
+static int rk3228_set_drive(struct rockchip_pin_bank *bank,
+			    int pin_num, int strength)
+{
+	struct regmap *regmap;
+	int reg, ret;
+	u32 data;
+	u8 bit;
+	int type = bank->drv[pin_num / 8].drv_type;
+
+	rk3228_calc_drv_reg_and_bit(bank, pin_num, &regmap, &reg, &bit);
+	ret = rockchip_translate_drive_value(type, strength);
+	if (ret < 0) {
+		debug("unsupported driver strength %d\n", strength);
+		return ret;
+	}
+
+	/* enable the write to the equivalent lower bits */
+	data = ((1 << ROCKCHIP_DRV_BITS_PER_PIN) - 1) << (bit + 16);
+	data |= (ret << bit);
+	ret = regmap_write(regmap, reg, data);
+	return ret;
+}
+
 static struct rockchip_pin_bank rk3228_pin_banks[] = {
 	PIN_BANK(0, 32, "gpio0"),
 	PIN_BANK(1, 32, "gpio1"),
@@ -225,7 +248,7 @@ static struct rockchip_pin_ctrl rk3228_pin_ctrl = {
 	.niomux_routes		= ARRAY_SIZE(rk3228_mux_route_data),
 	.set_mux		= rk3228_set_mux,
 	.pull_calc_reg		= rk3228_calc_pull_reg_and_bit,
-	.drv_calc_reg		= rk3228_calc_drv_reg_and_bit,
+	.set_drive		= rk3228_set_drive,
 };
 
 static const struct udevice_id rk3228_pinctrl_ids[] = {
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3288.c b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
index baa78a1613..9fb5ff73f9 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3288.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
@@ -113,10 +113,6 @@ static void rk3288_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
 	if (bank->bank_num == 0) {
 		*regmap = priv->regmap_pmu;
 		*reg = RK3288_DRV_PMU_OFFSET;
-
-		*reg += ((pin_num / ROCKCHIP_DRV_PINS_PER_REG) * 4);
-		*bit = pin_num % ROCKCHIP_DRV_PINS_PER_REG;
-		*bit *= ROCKCHIP_DRV_BITS_PER_PIN;
 	} else {
 		*regmap = priv->regmap_base;
 		*reg = RK3288_DRV_GRF_OFFSET;
@@ -124,11 +120,34 @@ static void rk3288_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
 		/* correct the offset, as we're starting with the 2nd bank */
 		*reg -= 0x10;
 		*reg += bank->bank_num * ROCKCHIP_DRV_BANK_STRIDE;
-		*reg += ((pin_num / ROCKCHIP_DRV_PINS_PER_REG) * 4);
+	}
+
+	*reg += ((pin_num / ROCKCHIP_DRV_PINS_PER_REG) * 4);
+	*bit = (pin_num % ROCKCHIP_DRV_PINS_PER_REG);
+	*bit *= ROCKCHIP_DRV_BITS_PER_PIN;
+}
 
-		*bit = (pin_num % ROCKCHIP_DRV_PINS_PER_REG);
-		*bit *= ROCKCHIP_DRV_BITS_PER_PIN;
+static int rk3288_set_drive(struct rockchip_pin_bank *bank,
+			    int pin_num, int strength)
+{
+	struct regmap *regmap;
+	int reg, ret;
+	u32 data;
+	u8 bit;
+	int type = bank->drv[pin_num / 8].drv_type;
+
+	rk3288_calc_drv_reg_and_bit(bank, pin_num, &regmap, &reg, &bit);
+	ret = rockchip_translate_drive_value(type, strength);
+	if (ret < 0) {
+		debug("unsupported driver strength %d\n", strength);
+		return ret;
 	}
+
+	/* enable the write to the equivalent lower bits */
+	data = ((1 << ROCKCHIP_DRV_BITS_PER_PIN) - 1) << (bit + 16);
+	data |= (ret << bit);
+	ret = regmap_write(regmap, reg, data);
+	return ret;
 }
 
 static struct rockchip_pin_bank rk3288_pin_banks[] = {
@@ -183,7 +202,7 @@ static struct rockchip_pin_ctrl rk3288_pin_ctrl = {
 	.niomux_routes		= ARRAY_SIZE(rk3288_mux_route_data),
 	.set_mux		= rk3288_set_mux,
 	.pull_calc_reg		= rk3288_calc_pull_reg_and_bit,
-	.drv_calc_reg		= rk3288_calc_drv_reg_and_bit,
+	.set_drive		= rk3288_set_drive,
 };
 
 static const struct udevice_id rk3288_pinctrl_ids[] = {
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3328.c b/drivers/pinctrl/rockchip/pinctrl-rk3328.c
index de21fba69c..0ad5669d26 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3328.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3328.c
@@ -191,6 +191,30 @@ static void rk3328_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
 	*bit *= ROCKCHIP_DRV_BITS_PER_PIN;
 }
 
+static int rk3328_set_drive(struct rockchip_pin_bank *bank,
+			    int pin_num, int strength)
+{
+	struct regmap *regmap;
+	int reg, ret;
+	u32 data;
+	u8 bit;
+	int type = bank->drv[pin_num / 8].drv_type;
+
+	rk3328_calc_drv_reg_and_bit(bank, pin_num, &regmap, &reg, &bit);
+	ret = rockchip_translate_drive_value(type, strength);
+	if (ret < 0) {
+		debug("unsupported driver strength %d\n", strength);
+		return ret;
+	}
+
+	/* enable the write to the equivalent lower bits */
+	data = ((1 << ROCKCHIP_DRV_BITS_PER_PIN) - 1) << (bit + 16);
+	data |= (ret << bit);
+	ret = regmap_write(regmap, reg, data);
+
+	return ret;
+}
+
 #define RK3328_SCHMITT_BITS_PER_PIN		1
 #define RK3328_SCHMITT_PINS_PER_REG		16
 #define RK3328_SCHMITT_BANK_STRIDE		8
@@ -239,7 +263,7 @@ static struct rockchip_pin_ctrl rk3328_pin_ctrl = {
 	.niomux_routes		= ARRAY_SIZE(rk3328_mux_route_data),
 	.set_mux		= rk3328_set_mux,
 	.pull_calc_reg		= rk3328_calc_pull_reg_and_bit,
-	.drv_calc_reg		= rk3328_calc_drv_reg_and_bit,
+	.set_drive		= rk3328_set_drive,
 	.schmitt_calc_reg	= rk3328_calc_schmitt_reg_and_bit,
 };
 
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3368.c b/drivers/pinctrl/rockchip/pinctrl-rk3368.c
index c1f692a1cf..40cc846fa8 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3368.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3368.c
@@ -79,10 +79,6 @@ static void rk3368_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
 	if (bank->bank_num == 0) {
 		*regmap = priv->regmap_pmu;
 		*reg = RK3368_DRV_PMU_OFFSET;
-
-		*reg += ((pin_num / ROCKCHIP_DRV_PINS_PER_REG) * 4);
-		*bit = pin_num % ROCKCHIP_DRV_PINS_PER_REG;
-		*bit *= ROCKCHIP_DRV_BITS_PER_PIN;
 	} else {
 		*regmap = priv->regmap_base;
 		*reg = RK3368_DRV_GRF_OFFSET;
@@ -90,11 +86,35 @@ static void rk3368_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
 		/* correct the offset, as we're starting with the 2nd bank */
 		*reg -= 0x10;
 		*reg += bank->bank_num * ROCKCHIP_DRV_BANK_STRIDE;
-		*reg += ((pin_num / ROCKCHIP_DRV_PINS_PER_REG) * 4);
+	}
+
+	*reg += ((pin_num / ROCKCHIP_DRV_PINS_PER_REG) * 4);
+	*bit = (pin_num % ROCKCHIP_DRV_PINS_PER_REG);
+	*bit *= ROCKCHIP_DRV_BITS_PER_PIN;
+}
 
-		*bit = (pin_num % ROCKCHIP_DRV_PINS_PER_REG);
-		*bit *= ROCKCHIP_DRV_BITS_PER_PIN;
+static int rk3368_set_drive(struct rockchip_pin_bank *bank,
+			    int pin_num, int strength)
+{
+	struct regmap *regmap;
+	int reg, ret;
+	u32 data;
+	u8 bit;
+	int type = bank->drv[pin_num / 8].drv_type;
+
+	rk3368_calc_drv_reg_and_bit(bank, pin_num, &regmap, &reg, &bit);
+	ret = rockchip_translate_drive_value(type, strength);
+	if (ret < 0) {
+		debug("unsupported driver strength %d\n", strength);
+		return ret;
 	}
+
+	/* enable the write to the equivalent lower bits */
+	data = ((1 << ROCKCHIP_DRV_BITS_PER_PIN) - 1) << (bit + 16);
+	data |= (ret << bit);
+	ret = regmap_write(regmap, reg, data);
+
+	return ret;
 }
 
 static struct rockchip_pin_bank rk3368_pin_banks[] = {
@@ -117,7 +137,7 @@ static struct rockchip_pin_ctrl rk3368_pin_ctrl = {
 	.pmu_mux_offset		= 0x0,
 	.set_mux		= rk3368_set_mux,
 	.pull_calc_reg		= rk3368_calc_pull_reg_and_bit,
-	.drv_calc_reg		= rk3368_calc_drv_reg_and_bit,
+	.set_drive		= rk3368_set_drive,
 };
 
 static const struct udevice_id rk3368_pinctrl_ids[] = {
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3399.c b/drivers/pinctrl/rockchip/pinctrl-rk3399.c
index 9e8dc2ef82..82c8feeb7b 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3399.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3399.c
@@ -137,6 +137,79 @@ static void rk3399_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
 		*bit = (pin_num % 8) * 2;
 }
 
+static int rk3399_set_drive(struct rockchip_pin_bank *bank,
+			    int pin_num, int strength)
+{
+	struct regmap *regmap;
+	int reg, ret;
+	u32 data, rmask_bits, temp;
+	u8 bit;
+	int drv_type = bank->drv[pin_num / 8].drv_type;
+
+	rk3399_calc_drv_reg_and_bit(bank, pin_num, &regmap, &reg, &bit);
+	ret = rockchip_translate_drive_value(drv_type, strength);
+	if (ret < 0) {
+		debug("unsupported driver strength %d\n", strength);
+		return ret;
+	}
+
+	switch (drv_type) {
+	case DRV_TYPE_IO_1V8_3V0_AUTO:
+	case DRV_TYPE_IO_3V3_ONLY:
+		rmask_bits = ROCKCHIP_DRV_3BITS_PER_PIN;
+		switch (bit) {
+		case 0 ... 12:
+			/* regular case, nothing to do */
+			break;
+		case 15:
+			/*
+			 * drive-strength offset is special, as it is spread
+			 * over 2 registers, the bit data[15] contains bit 0
+			 * of the value while temp[1:0] contains bits 2 and 1
+			 */
+			data = (ret & 0x1) << 15;
+			temp = (ret >> 0x1) & 0x3;
+
+			data |= BIT(31);
+			ret = regmap_write(regmap, reg, data);
+			if (ret)
+				return ret;
+
+			temp |= (0x3 << 16);
+			reg += 0x4;
+			ret = regmap_write(regmap, reg, temp);
+
+			return ret;
+		case 18 ... 21:
+			/* setting fully enclosed in the second register */
+			reg += 4;
+			bit -= 16;
+			break;
+		default:
+			debug("unsupported bit: %d for pinctrl drive type: %d\n",
+			      bit, drv_type);
+			return -EINVAL;
+		}
+		break;
+	case DRV_TYPE_IO_DEFAULT:
+	case DRV_TYPE_IO_1V8_OR_3V0:
+	case DRV_TYPE_IO_1V8_ONLY:
+		rmask_bits = ROCKCHIP_DRV_BITS_PER_PIN;
+		break;
+	default:
+		debug("unsupported pinctrl drive type: %d\n",
+		      drv_type);
+		return -EINVAL;
+	}
+
+	/* enable the write to the equivalent lower bits */
+	data = ((1 << rmask_bits) - 1) << (bit + 16);
+	data |= (ret << bit);
+	ret = regmap_write(regmap, reg, data);
+
+	return ret;
+}
+
 static struct rockchip_pin_bank rk3399_pin_banks[] = {
 	PIN_BANK_IOMUX_FLAGS_DRV_FLAGS_OFFSET_PULL_FLAGS(0, 32, "gpio0",
 							 IOMUX_SOURCE_PMU,
@@ -203,7 +276,7 @@ static struct rockchip_pin_ctrl rk3399_pin_ctrl = {
 	.niomux_routes		= ARRAY_SIZE(rk3399_mux_route_data),
 	.set_mux		= rk3399_set_mux,
 	.pull_calc_reg		= rk3399_calc_pull_reg_and_bit,
-	.drv_calc_reg		= rk3399_calc_drv_reg_and_bit,
+	.set_drive		= rk3399_set_drive,
 };
 
 static const struct udevice_id rk3399_pinctrl_ids[] = {
diff --git a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
index 6445f90362..1d01e4d325 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
@@ -222,99 +222,37 @@ static int rockchip_perpin_drv_list[DRV_TYPE_MAX][8] = {
 	{ 4, 7, 10, 13, 16, 19, 22, 26 }
 };
 
-static int rockchip_set_drive_perpin(struct rockchip_pin_bank *bank,
-				     int pin_num, int strength)
+int rockchip_translate_drive_value(int type, int strength)
 {
-	struct rockchip_pinctrl_priv *priv = bank->priv;
-	struct rockchip_pin_ctrl *ctrl = priv->ctrl;
-	struct regmap *regmap;
-	int reg, ret, i;
-	u32 data, rmask_bits, temp;
-	u8 bit;
-	/* Where need to clean the special mask for rockchip_perpin_drv_list */
-	int drv_type = bank->drv[pin_num / 8].drv_type & (~DRV_TYPE_IO_MASK);
-
-	debug("setting drive of GPIO%d-%d to %d\n", bank->bank_num,
-	      pin_num, strength);
-
-	ctrl->drv_calc_reg(bank, pin_num, &regmap, &reg, &bit);
+	int i, ret;
 
 	ret = -EINVAL;
-	for (i = 0; i < ARRAY_SIZE(rockchip_perpin_drv_list[drv_type]); i++) {
-		if (rockchip_perpin_drv_list[drv_type][i] == strength) {
+	for (i = 0; i < ARRAY_SIZE(rockchip_perpin_drv_list[type]); i++) {
+		if (rockchip_perpin_drv_list[type][i] == strength) {
 			ret = i;
 			break;
-		} else if (rockchip_perpin_drv_list[drv_type][i] < 0) {
-			ret = rockchip_perpin_drv_list[drv_type][i];
+		} else if (rockchip_perpin_drv_list[type][i] < 0) {
+			ret = rockchip_perpin_drv_list[type][i];
 			break;
 		}
 	}
 
-	if (ret < 0) {
-		debug("unsupported driver strength %d\n", strength);
-		return ret;
-	}
-
-	switch (drv_type) {
-	case DRV_TYPE_IO_1V8_3V0_AUTO:
-	case DRV_TYPE_IO_3V3_ONLY:
-		rmask_bits = ROCKCHIP_DRV_3BITS_PER_PIN;
-		switch (bit) {
-		case 0 ... 12:
-			/* regular case, nothing to do */
-			break;
-		case 15:
-			/*
-			 * drive-strength offset is special, as it is spread
-			 * over 2 registers, the bit data[15] contains bit 0
-			 * of the value while temp[1:0] contains bits 2 and 1
-			 */
-			data = (ret & 0x1) << 15;
-			temp = (ret >> 0x1) & 0x3;
-
-			data |= BIT(31);
-			ret = regmap_write(regmap, reg, data);
-			if (ret)
-				return ret;
+	return ret;
+}
 
-			temp |= (0x3 << 16);
-			reg += 0x4;
-			ret = regmap_write(regmap, reg, temp);
+static int rockchip_set_drive_perpin(struct rockchip_pin_bank *bank,
+				     int pin_num, int strength)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	struct rockchip_pin_ctrl *ctrl = priv->ctrl;
 
-			return ret;
-		case 18 ... 21:
-			/* setting fully enclosed in the second register */
-			reg += 4;
-			bit -= 16;
-			break;
-		default:
-			debug("unsupported bit: %d for pinctrl drive type: %d\n",
-			      bit, drv_type);
-			return -EINVAL;
-		}
-		break;
-	case DRV_TYPE_IO_DEFAULT:
-	case DRV_TYPE_IO_1V8_OR_3V0:
-	case DRV_TYPE_IO_1V8_ONLY:
-		rmask_bits = ROCKCHIP_DRV_BITS_PER_PIN;
-		break;
-	default:
-		debug("unsupported pinctrl drive type: %d\n",
-		      drv_type);
-		return -EINVAL;
-	}
+	debug("setting drive of GPIO%d-%d to %d\n", bank->bank_num,
+	      pin_num, strength);
 
-	if (bank->drv[pin_num / 8].drv_type & DRV_TYPE_WRITABLE_32BIT) {
-		regmap_read(regmap, reg, &data);
-		data &= ~(((1 << rmask_bits) - 1) << bit);
-	} else {
-		/* enable the write to the equivalent lower bits */
-		data = ((1 << rmask_bits) - 1) << (bit + 16);
-	}
+	if (!ctrl->set_drive)
+		return -ENOTSUPP;
 
-	data |= (ret << bit);
-	ret = regmap_write(regmap, reg, data);
-	return ret;
+	return ctrl->set_drive(bank, pin_num, strength);
 }
 
 static int rockchip_pull_list[PULL_TYPE_MAX][4] = {
@@ -474,9 +412,6 @@ static int rockchip_pinconf_set(struct rockchip_pin_bank *bank,
 		break;
 
 	case PIN_CONFIG_DRIVE_STRENGTH:
-		if (!ctrl->drv_calc_reg)
-			return -ENOTSUPP;
-
 		rc = rockchip_set_drive_perpin(bank, pin, arg);
 		if (rc < 0)
 			return rc;
diff --git a/drivers/pinctrl/rockchip/pinctrl-rockchip.h b/drivers/pinctrl/rockchip/pinctrl-rockchip.h
index 772e9e50f1..a4928198a0 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rockchip.h
+++ b/drivers/pinctrl/rockchip/pinctrl-rockchip.h
@@ -316,9 +316,8 @@ struct rockchip_pin_ctrl {
 	void	(*pull_calc_reg)(struct rockchip_pin_bank *bank,
 				 int pin_num, struct regmap **regmap,
 				 int *reg, u8 *bit);
-	void	(*drv_calc_reg)(struct rockchip_pin_bank *bank,
-				int pin_num, struct regmap **regmap,
-				int *reg, u8 *bit);
+	int	(*set_drive)(struct rockchip_pin_bank *bank,
+			     int pin_num, int strength);
 	int	(*schmitt_calc_reg)(struct rockchip_pin_bank *bank,
 				    int pin_num, struct regmap **regmap,
 				    int *reg, u8 *bit);
@@ -339,5 +338,6 @@ void rockchip_get_recalced_mux(struct rockchip_pin_bank *bank, int pin,
 bool rockchip_get_mux_route(struct rockchip_pin_bank *bank, int pin,
 			    int mux, u32 *reg, u32 *value);
 int rockchip_get_mux_data(int mux_type, int pin, u8 *bit, int *mask);
+int rockchip_translate_drive_value(int type, int strength);
 
 #endif /* __DRIVERS_PINCTRL_ROCKCHIP_H */
diff --git a/drivers/pinctrl/rockchip/pinctrl-rv1108.c b/drivers/pinctrl/rockchip/pinctrl-rv1108.c
index c28b504634..1a150ff0f1 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rv1108.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rv1108.c
@@ -155,6 +155,30 @@ static void rv1108_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
 	*bit *= ROCKCHIP_DRV_BITS_PER_PIN;
 }
 
+static int rv1108_set_drive(struct rockchip_pin_bank *bank,
+			    int pin_num, int strength)
+{
+	struct regmap *regmap;
+	int reg, ret;
+	u32 data;
+	u8 bit;
+	int type = bank->drv[pin_num / 8].drv_type;
+
+	rv1108_calc_drv_reg_and_bit(bank, pin_num, &regmap, &reg, &bit);
+	ret = rockchip_translate_drive_value(type, strength);
+	if (ret < 0) {
+		debug("unsupported driver strength %d\n", strength);
+		return ret;
+	}
+
+	/* enable the write to the equivalent lower bits */
+	data = ((1 << ROCKCHIP_DRV_BITS_PER_PIN) - 1) << (bit + 16);
+
+	data |= (ret << bit);
+	ret = regmap_write(regmap, reg, data);
+	return ret;
+}
+
 #define RV1108_SCHMITT_PMU_OFFSET		0x30
 #define RV1108_SCHMITT_GRF_OFFSET		0x388
 #define RV1108_SCHMITT_BANK_STRIDE		8
@@ -206,7 +230,7 @@ static struct rockchip_pin_ctrl rv1108_pin_ctrl = {
 	.niomux_recalced	= ARRAY_SIZE(rv1108_mux_recalced_data),
 	.set_mux		= rv1108_set_mux,
 	.pull_calc_reg		= rv1108_calc_pull_reg_and_bit,
-	.drv_calc_reg		= rv1108_calc_drv_reg_and_bit,
+	.set_drive		= rv1108_set_drive,
 	.schmitt_calc_reg	= rv1108_calc_schmitt_reg_and_bit,
 };
 

commit aa570f0140720a8b356b2a5f543a3ddd73a0c7bd
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Apr 16 21:50:56 2019 +0800

    UPSTREAM: pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' iomux
    
    RK3288 pmu_gpio0 iomux setting have no higher 16 writing corresponding
    bits, need to read before write the register.
    
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit cd8f00ce08102d2dbb350c76bbb53f7b0f804b7d)
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
    
    Change-Id: I7aaaf9642ee7bed6a2e9f6538a053bd6e1810dd7

diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3288.c b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
index e6689f0fa1..baa78a1613 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3288.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
@@ -54,7 +54,15 @@ static int rk3288_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
 		}
 	}
 
-	data = (mask << (bit + 16));
+	/* bank0 is special, there are no higher 16 bit writing bits. */
+	if (bank->bank_num == 0) {
+		regmap_read(regmap, reg, &data);
+		data &= ~(mask << bit);
+	} else {
+		/* enable the write to the equivalent lower bits */
+		data = (mask << (bit + 16));
+	}
+
 	data |= (mux & mask) << bit;
 	ret = regmap_write(regmap, reg, data);
 

commit 5f55bbd7d6d528714f07a8942a73438271bda7cb
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Apr 16 21:50:55 2019 +0800

    UPSTREAM: pinctrl: rockchip: Split the common set_mux() into per Soc
    
    Such as rk3288's pins of pmu_gpio0 are a special feature, which have no
    higher 16 writing corresponding bits, use common set_mux() func would
    introduce more code, so implement their set_mux() in each Soc's own
    file to reduce the size of code.
    
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 54e75702c48a9757e82cbe71176c0b5ddcf6a092)
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
    
    Change-Id: Ifdfce706e9b1cbe94300d2bed91182033f23f301

diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3036.c b/drivers/pinctrl/rockchip/pinctrl-rk3036.c
index 2a651cd9b8..8969aea2e3 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3036.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3036.c
@@ -11,6 +11,30 @@
 
 #include "pinctrl-rockchip.h"
 
+static int rk3036_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	int iomux_num = (pin / 8);
+	struct regmap *regmap;
+	int reg, ret, mask, mux_type;
+	u8 bit;
+	u32 data;
+
+	regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
+				? priv->regmap_pmu : priv->regmap_base;
+
+	/* get basic quadrupel of mux registers and the correct reg inside */
+	mux_type = bank->iomux[iomux_num].type;
+	reg = bank->iomux[iomux_num].offset;
+	reg += rockchip_get_mux_data(mux_type, pin, &bit, &mask);
+
+	data = (mask << (bit + 16));
+	data |= (mux & mask) << bit;
+	ret = regmap_write(regmap, reg, data);
+
+	return ret;
+}
+
 #define RK3036_PULL_OFFSET		0x118
 #define RK3036_PULL_PINS_PER_REG	16
 #define RK3036_PULL_BANK_STRIDE		8
@@ -41,6 +65,7 @@ static struct rockchip_pin_ctrl rk3036_pin_ctrl = {
 	.label			= "RK3036-GPIO",
 	.type			= RK3036,
 	.grf_mux_offset		= 0xa8,
+	.set_mux		= rk3036_set_mux,
 	.pull_calc_reg		= rk3036_calc_pull_reg_and_bit,
 };
 
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3128.c b/drivers/pinctrl/rockchip/pinctrl-rk3128.c
index 43a6c173a0..de203334c7 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3128.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3128.c
@@ -98,6 +98,42 @@ static struct rockchip_mux_route_data rk3128_mux_route_data[] = {
 	},
 };
 
+static int rk3128_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	int iomux_num = (pin / 8);
+	struct regmap *regmap;
+	int reg, ret, mask, mux_type;
+	u8 bit;
+	u32 data, route_reg, route_val;
+
+	regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
+				? priv->regmap_pmu : priv->regmap_base;
+
+	/* get basic quadrupel of mux registers and the correct reg inside */
+	mux_type = bank->iomux[iomux_num].type;
+	reg = bank->iomux[iomux_num].offset;
+	reg += rockchip_get_mux_data(mux_type, pin, &bit, &mask);
+
+	if (bank->recalced_mask & BIT(pin))
+		rockchip_get_recalced_mux(bank, pin, &reg, &bit, &mask);
+
+	if (bank->route_mask & BIT(pin)) {
+		if (rockchip_get_mux_route(bank, pin, mux, &route_reg,
+					   &route_val)) {
+			ret = regmap_write(regmap, route_reg, route_val);
+			if (ret)
+				return ret;
+		}
+	}
+
+	data = (mask << (bit + 16));
+	data |= (mux & mask) << bit;
+	ret = regmap_write(regmap, reg, data);
+
+	return ret;
+}
+
 #define RK3128_PULL_OFFSET		0x118
 #define RK3128_PULL_PINS_PER_REG	16
 #define RK3128_PULL_BANK_STRIDE		8
@@ -133,6 +169,7 @@ static struct rockchip_pin_ctrl rk3128_pin_ctrl = {
 	.niomux_recalced	= ARRAY_SIZE(rk3128_mux_recalced_data),
 	.iomux_routes		= rk3128_mux_route_data,
 	.niomux_routes		= ARRAY_SIZE(rk3128_mux_route_data),
+	.set_mux		= rk3128_set_mux,
 	.pull_calc_reg		= rk3128_calc_pull_reg_and_bit,
 };
 
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3188.c b/drivers/pinctrl/rockchip/pinctrl-rk3188.c
index 7cc52c0075..617ae28ac8 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3188.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3188.c
@@ -11,6 +11,30 @@
 
 #include "pinctrl-rockchip.h"
 
+static int rk3188_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	int iomux_num = (pin / 8);
+	struct regmap *regmap;
+	int reg, ret, mask, mux_type;
+	u8 bit;
+	u32 data;
+
+	regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
+				? priv->regmap_pmu : priv->regmap_base;
+
+	/* get basic quadrupel of mux registers and the correct reg inside */
+	mux_type = bank->iomux[iomux_num].type;
+	reg = bank->iomux[iomux_num].offset;
+	reg += rockchip_get_mux_data(mux_type, pin, &bit, &mask);
+
+	data = (mask << (bit + 16));
+	data |= (mux & mask) << bit;
+	ret = regmap_write(regmap, reg, data);
+
+	return ret;
+}
+
 #define RK3188_PULL_OFFSET		0x164
 #define RK3188_PULL_PMU_OFFSET		0x64
 
@@ -60,6 +84,7 @@ static struct rockchip_pin_ctrl rk3188_pin_ctrl = {
 	.label			= "RK3188-GPIO",
 	.type			= RK3188,
 	.grf_mux_offset		= 0x60,
+	.set_mux		= rk3188_set_mux,
 	.pull_calc_reg		= rk3188_calc_pull_reg_and_bit,
 };
 
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk322x.c b/drivers/pinctrl/rockchip/pinctrl-rk322x.c
index d67b48a06a..442c40ce0b 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk322x.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk322x.c
@@ -141,6 +141,39 @@ static struct rockchip_mux_route_data rk3228_mux_route_data[] = {
 	},
 };
 
+static int rk3228_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	int iomux_num = (pin / 8);
+	struct regmap *regmap;
+	int reg, ret, mask, mux_type;
+	u8 bit;
+	u32 data, route_reg, route_val;
+
+	regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
+				? priv->regmap_pmu : priv->regmap_base;
+
+	/* get basic quadrupel of mux registers and the correct reg inside */
+	mux_type = bank->iomux[iomux_num].type;
+	reg = bank->iomux[iomux_num].offset;
+	reg += rockchip_get_mux_data(mux_type, pin, &bit, &mask);
+
+	if (bank->route_mask & BIT(pin)) {
+		if (rockchip_get_mux_route(bank, pin, mux, &route_reg,
+					   &route_val)) {
+			ret = regmap_write(regmap, route_reg, route_val);
+			if (ret)
+				return ret;
+		}
+	}
+
+	data = (mask << (bit + 16));
+	data |= (mux & mask) << bit;
+	ret = regmap_write(regmap, reg, data);
+
+	return ret;
+}
+
 #define RK3228_PULL_OFFSET		0x100
 
 static void rk3228_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
@@ -190,6 +223,7 @@ static struct rockchip_pin_ctrl rk3228_pin_ctrl = {
 	.grf_mux_offset		= 0x0,
 	.iomux_routes		= rk3228_mux_route_data,
 	.niomux_routes		= ARRAY_SIZE(rk3228_mux_route_data),
+	.set_mux		= rk3228_set_mux,
 	.pull_calc_reg		= rk3228_calc_pull_reg_and_bit,
 	.drv_calc_reg		= rk3228_calc_drv_reg_and_bit,
 };
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3288.c b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
index 64525c9e2b..e6689f0fa1 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3288.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
@@ -7,7 +7,6 @@
 #include <dm.h>
 #include <dm/pinctrl.h>
 #include <regmap.h>
-#include <syscon.h>
 
 #include "pinctrl-rockchip.h"
 
@@ -29,6 +28,39 @@ static struct rockchip_mux_route_data rk3288_mux_route_data[] = {
 	},
 };
 
+static int rk3288_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	int iomux_num = (pin / 8);
+	struct regmap *regmap;
+	int reg, ret, mask, mux_type;
+	u8 bit;
+	u32 data, route_reg, route_val;
+
+	regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
+				? priv->regmap_pmu : priv->regmap_base;
+
+	/* get basic quadrupel of mux registers and the correct reg inside */
+	mux_type = bank->iomux[iomux_num].type;
+	reg = bank->iomux[iomux_num].offset;
+	reg += rockchip_get_mux_data(mux_type, pin, &bit, &mask);
+
+	if (bank->route_mask & BIT(pin)) {
+		if (rockchip_get_mux_route(bank, pin, mux, &route_reg,
+					   &route_val)) {
+			ret = regmap_write(regmap, route_reg, route_val);
+			if (ret)
+				return ret;
+		}
+	}
+
+	data = (mask << (bit + 16));
+	data |= (mux & mask) << bit;
+	ret = regmap_write(regmap, reg, data);
+
+	return ret;
+}
+
 #define RK3288_PULL_OFFSET		0x140
 #define RK3288_PULL_PMU_OFFSET          0x64
 
@@ -141,6 +173,7 @@ static struct rockchip_pin_ctrl rk3288_pin_ctrl = {
 	.pmu_mux_offset		= 0x84,
 	.iomux_routes		= rk3288_mux_route_data,
 	.niomux_routes		= ARRAY_SIZE(rk3288_mux_route_data),
+	.set_mux		= rk3288_set_mux,
 	.pull_calc_reg		= rk3288_calc_pull_reg_and_bit,
 	.drv_calc_reg		= rk3288_calc_drv_reg_and_bit,
 };
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3328.c b/drivers/pinctrl/rockchip/pinctrl-rk3328.c
index ab634c1123..de21fba69c 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3328.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3328.c
@@ -121,6 +121,42 @@ static struct rockchip_mux_route_data rk3328_mux_route_data[] = {
 	},
 };
 
+static int rk3328_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	int iomux_num = (pin / 8);
+	struct regmap *regmap;
+	int reg, ret, mask, mux_type;
+	u8 bit;
+	u32 data, route_reg, route_val;
+
+	regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
+				? priv->regmap_pmu : priv->regmap_base;
+
+	/* get basic quadrupel of mux registers and the correct reg inside */
+	mux_type = bank->iomux[iomux_num].type;
+	reg = bank->iomux[iomux_num].offset;
+	reg += rockchip_get_mux_data(mux_type, pin, &bit, &mask);
+
+	if (bank->recalced_mask & BIT(pin))
+		rockchip_get_recalced_mux(bank, pin, &reg, &bit, &mask);
+
+	if (bank->route_mask & BIT(pin)) {
+		if (rockchip_get_mux_route(bank, pin, mux, &route_reg,
+					   &route_val)) {
+			ret = regmap_write(regmap, route_reg, route_val);
+			if (ret)
+				return ret;
+		}
+	}
+
+	data = (mask << (bit + 16));
+	data |= (mux & mask) << bit;
+	ret = regmap_write(regmap, reg, data);
+
+	return ret;
+}
+
 #define RK3328_PULL_OFFSET		0x100
 
 static void rk3328_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
@@ -201,6 +237,7 @@ static struct rockchip_pin_ctrl rk3328_pin_ctrl = {
 	.niomux_recalced	= ARRAY_SIZE(rk3328_mux_recalced_data),
 	.iomux_routes		= rk3328_mux_route_data,
 	.niomux_routes		= ARRAY_SIZE(rk3328_mux_route_data),
+	.set_mux		= rk3328_set_mux,
 	.pull_calc_reg		= rk3328_calc_pull_reg_and_bit,
 	.drv_calc_reg		= rk3328_calc_drv_reg_and_bit,
 	.schmitt_calc_reg	= rk3328_calc_schmitt_reg_and_bit,
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3368.c b/drivers/pinctrl/rockchip/pinctrl-rk3368.c
index 8bdaf5e4d2..c1f692a1cf 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3368.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3368.c
@@ -11,6 +11,30 @@
 
 #include "pinctrl-rockchip.h"
 
+static int rk3368_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	int iomux_num = (pin / 8);
+	struct regmap *regmap;
+	int reg, ret, mask, mux_type;
+	u8 bit;
+	u32 data;
+
+	regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
+				? priv->regmap_pmu : priv->regmap_base;
+
+	/* get basic quadrupel of mux registers and the correct reg inside */
+	mux_type = bank->iomux[iomux_num].type;
+	reg = bank->iomux[iomux_num].offset;
+	reg += rockchip_get_mux_data(mux_type, pin, &bit, &mask);
+
+	data = (mask << (bit + 16));
+	data |= (mux & mask) << bit;
+	ret = regmap_write(regmap, reg, data);
+
+	return ret;
+}
+
 #define RK3368_PULL_GRF_OFFSET		0x100
 #define RK3368_PULL_PMU_OFFSET		0x10
 
@@ -91,6 +115,7 @@ static struct rockchip_pin_ctrl rk3368_pin_ctrl = {
 	.type			= RK3368,
 	.grf_mux_offset		= 0x0,
 	.pmu_mux_offset		= 0x0,
+	.set_mux		= rk3368_set_mux,
 	.pull_calc_reg		= rk3368_calc_pull_reg_and_bit,
 	.drv_calc_reg		= rk3368_calc_drv_reg_and_bit,
 };
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3399.c b/drivers/pinctrl/rockchip/pinctrl-rk3399.c
index 06276b14ef..9e8dc2ef82 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3399.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3399.c
@@ -50,6 +50,39 @@ static struct rockchip_mux_route_data rk3399_mux_route_data[] = {
 	},
 };
 
+static int rk3399_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	int iomux_num = (pin / 8);
+	struct regmap *regmap;
+	int reg, ret, mask, mux_type;
+	u8 bit;
+	u32 data, route_reg, route_val;
+
+	regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
+				? priv->regmap_pmu : priv->regmap_base;
+
+	/* get basic quadrupel of mux registers and the correct reg inside */
+	mux_type = bank->iomux[iomux_num].type;
+	reg = bank->iomux[iomux_num].offset;
+	reg += rockchip_get_mux_data(mux_type, pin, &bit, &mask);
+
+	if (bank->route_mask & BIT(pin)) {
+		if (rockchip_get_mux_route(bank, pin, mux, &route_reg,
+					   &route_val)) {
+			ret = regmap_write(regmap, route_reg, route_val);
+			if (ret)
+				return ret;
+		}
+	}
+
+	data = (mask << (bit + 16));
+	data |= (mux & mask) << bit;
+	ret = regmap_write(regmap, reg, data);
+
+	return ret;
+}
+
 #define RK3399_PULL_GRF_OFFSET		0xe040
 #define RK3399_PULL_PMU_OFFSET		0x40
 
@@ -168,6 +201,7 @@ static struct rockchip_pin_ctrl rk3399_pin_ctrl = {
 	.pmu_drv_offset		= 0x80,
 	.iomux_routes		= rk3399_mux_route_data,
 	.niomux_routes		= ARRAY_SIZE(rk3399_mux_route_data),
+	.set_mux		= rk3399_set_mux,
 	.pull_calc_reg		= rk3399_calc_pull_reg_and_bit,
 	.drv_calc_reg		= rk3399_calc_drv_reg_and_bit,
 };
diff --git a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
index f2418f621f..6445f90362 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
@@ -35,8 +35,8 @@ static int rockchip_verify_config(struct udevice *dev, u32 bank, u32 pin)
 	return 0;
 }
 
-static void rockchip_get_recalced_mux(struct rockchip_pin_bank *bank, int pin,
-				      int *reg, u8 *bit, int *mask)
+void rockchip_get_recalced_mux(struct rockchip_pin_bank *bank, int pin,
+			       int *reg, u8 *bit, int *mask)
 {
 	struct rockchip_pinctrl_priv *priv = bank->priv;
 	struct rockchip_pin_ctrl *ctrl = priv->ctrl;
@@ -58,8 +58,8 @@ static void rockchip_get_recalced_mux(struct rockchip_pin_bank *bank, int pin,
 	*bit = data->bit;
 }
 
-static bool rockchip_get_mux_route(struct rockchip_pin_bank *bank, int pin,
-				   int mux, u32 *reg, u32 *value)
+bool rockchip_get_mux_route(struct rockchip_pin_bank *bank, int pin,
+			    int mux, u32 *reg, u32 *value)
 {
 	struct rockchip_pinctrl_priv *priv = bank->priv;
 	struct rockchip_pin_ctrl *ctrl = priv->ctrl;
@@ -82,7 +82,7 @@ static bool rockchip_get_mux_route(struct rockchip_pin_bank *bank, int pin,
 	return true;
 }
 
-static int rockchip_get_mux_data(int mux_type, int pin, u8 *bit, int *mask)
+int rockchip_get_mux_data(int mux_type, int pin, u8 *bit, int *mask)
 {
 	int offset = 0;
 
@@ -193,11 +193,9 @@ static int rockchip_verify_mux(struct rockchip_pin_bank *bank,
 static int rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
 {
 	struct rockchip_pinctrl_priv *priv = bank->priv;
+	struct rockchip_pin_ctrl *ctrl = priv->ctrl;
 	int iomux_num = (pin / 8);
-	struct regmap *regmap;
-	int reg, ret, mask, mux_type;
-	u8 bit;
-	u32 data, route_reg, route_val;
+	int ret;
 
 	ret = rockchip_verify_mux(bank, pin, mux);
 	if (ret < 0)
@@ -208,35 +206,10 @@ static int rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
 
 	debug("setting mux of GPIO%d-%d to %d\n", bank->bank_num, pin, mux);
 
-	regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
-				? priv->regmap_pmu : priv->regmap_base;
-
-	/* get basic quadrupel of mux registers and the correct reg inside */
-	mux_type = bank->iomux[iomux_num].type;
-	reg = bank->iomux[iomux_num].offset;
-	reg += rockchip_get_mux_data(mux_type, pin, &bit, &mask);
-
-	if (bank->recalced_mask & BIT(pin))
-		rockchip_get_recalced_mux(bank, pin, &reg, &bit, &mask);
-
-	if (bank->route_mask & BIT(pin)) {
-		if (rockchip_get_mux_route(bank, pin, mux, &route_reg,
-					   &route_val)) {
-			ret = regmap_write(regmap, route_reg, route_val);
-			if (ret)
-				return ret;
-		}
-	}
-
-	if (mux_type & IOMUX_WRITABLE_32BIT) {
-		regmap_read(regmap, reg, &data);
-		data &= ~(mask << bit);
-	} else {
-		data = (mask << (bit + 16));
-	}
+	if (!ctrl->set_mux)
+		return -ENOTSUPP;
 
-	data |= (mux & mask) << bit;
-	ret = regmap_write(regmap, reg, data);
+	ret = ctrl->set_mux(bank, pin, mux);
 
 	return ret;
 }
diff --git a/drivers/pinctrl/rockchip/pinctrl-rockchip.h b/drivers/pinctrl/rockchip/pinctrl-rockchip.h
index 5a6849c996..772e9e50f1 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rockchip.h
+++ b/drivers/pinctrl/rockchip/pinctrl-rockchip.h
@@ -310,6 +310,9 @@ struct rockchip_pin_ctrl {
 	struct rockchip_mux_route_data *iomux_routes;
 	u32				niomux_routes;
 
+	int	(*set_mux)(struct rockchip_pin_bank *bank,
+			   int pin, int mux);
+
 	void	(*pull_calc_reg)(struct rockchip_pin_bank *bank,
 				 int pin_num, struct regmap **regmap,
 				 int *reg, u8 *bit);
@@ -331,5 +334,10 @@ struct rockchip_pinctrl_priv {
 
 extern const struct pinctrl_ops rockchip_pinctrl_ops;
 int rockchip_pinctrl_probe(struct udevice *dev);
+void rockchip_get_recalced_mux(struct rockchip_pin_bank *bank, int pin,
+			       int *reg, u8 *bit, int *mask);
+bool rockchip_get_mux_route(struct rockchip_pin_bank *bank, int pin,
+			    int mux, u32 *reg, u32 *value);
+int rockchip_get_mux_data(int mux_type, int pin, u8 *bit, int *mask);
 
 #endif /* __DRIVERS_PINCTRL_ROCKCHIP_H */
diff --git a/drivers/pinctrl/rockchip/pinctrl-rv1108.c b/drivers/pinctrl/rockchip/pinctrl-rv1108.c
index f4a09a6824..c28b504634 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rv1108.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rv1108.c
@@ -75,6 +75,33 @@ static struct rockchip_mux_recalced_data rv1108_mux_recalced_data[] = {
 	},
 };
 
+static int rv1108_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	int iomux_num = (pin / 8);
+	struct regmap *regmap;
+	int reg, ret, mask, mux_type;
+	u8 bit;
+	u32 data;
+
+	regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
+				? priv->regmap_pmu : priv->regmap_base;
+
+	/* get basic quadrupel of mux registers and the correct reg inside */
+	mux_type = bank->iomux[iomux_num].type;
+	reg = bank->iomux[iomux_num].offset;
+	reg += rockchip_get_mux_data(mux_type, pin, &bit, &mask);
+
+	if (bank->recalced_mask & BIT(pin))
+		rockchip_get_recalced_mux(bank, pin, &reg, &bit, &mask);
+
+	data = (mask << (bit + 16));
+	data |= (mux & mask) << bit;
+	ret = regmap_write(regmap, reg, data);
+
+	return ret;
+}
+
 #define RV1108_PULL_PMU_OFFSET		0x10
 #define RV1108_PULL_OFFSET		0x110
 
@@ -177,6 +204,7 @@ static struct rockchip_pin_ctrl rv1108_pin_ctrl = {
 	.pmu_mux_offset		= 0x0,
 	.iomux_recalced		= rv1108_mux_recalced_data,
 	.niomux_recalced	= ARRAY_SIZE(rv1108_mux_recalced_data),
+	.set_mux		= rv1108_set_mux,
 	.pull_calc_reg		= rv1108_calc_pull_reg_and_bit,
 	.drv_calc_reg		= rv1108_calc_drv_reg_and_bit,
 	.schmitt_calc_reg	= rv1108_calc_schmitt_reg_and_bit,

commit 16f7081913046295486a42031afd9c98dac37b73
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Apr 16 21:50:54 2019 +0800

    UPSTREAM: pinctrl: rockchip: Remove redundant spaces
    
    Some files have the redundant spaces, remove them.
    
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 8541beb86daf3ce7e4be9ca67859aab3dd0daefb)
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
    
    Change-Id: I9f621c3714260165bab0111e486a1d60ecf33c11

diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3036.c b/drivers/pinctrl/rockchip/pinctrl-rk3036.c
index 2729b03443..2a651cd9b8 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3036.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3036.c
@@ -36,12 +36,12 @@ static struct rockchip_pin_bank rk3036_pin_banks[] = {
 };
 
 static struct rockchip_pin_ctrl rk3036_pin_ctrl = {
-		.pin_banks		= rk3036_pin_banks,
-		.nr_banks		= ARRAY_SIZE(rk3036_pin_banks),
-		.label			= "RK3036-GPIO",
-		.type			= RK3036,
-		.grf_mux_offset		= 0xa8,
-		.pull_calc_reg		= rk3036_calc_pull_reg_and_bit,
+	.pin_banks		= rk3036_pin_banks,
+	.nr_banks		= ARRAY_SIZE(rk3036_pin_banks),
+	.label			= "RK3036-GPIO",
+	.type			= RK3036,
+	.grf_mux_offset		= 0xa8,
+	.pull_calc_reg		= rk3036_calc_pull_reg_and_bit,
 };
 
 static const struct udevice_id rk3036_pinctrl_ids[] = {
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3188.c b/drivers/pinctrl/rockchip/pinctrl-rk3188.c
index 5ed9aec938..7cc52c0075 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3188.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3188.c
@@ -55,12 +55,12 @@ static struct rockchip_pin_bank rk3188_pin_banks[] = {
 };
 
 static struct rockchip_pin_ctrl rk3188_pin_ctrl = {
-		.pin_banks		= rk3188_pin_banks,
-		.nr_banks		= ARRAY_SIZE(rk3188_pin_banks),
-		.label			= "RK3188-GPIO",
-		.type			= RK3188,
-		.grf_mux_offset		= 0x60,
-		.pull_calc_reg		= rk3188_calc_pull_reg_and_bit,
+	.pin_banks		= rk3188_pin_banks,
+	.nr_banks		= ARRAY_SIZE(rk3188_pin_banks),
+	.label			= "RK3188-GPIO",
+	.type			= RK3188,
+	.grf_mux_offset		= 0x60,
+	.pull_calc_reg		= rk3188_calc_pull_reg_and_bit,
 };
 
 static const struct udevice_id rk3188_pinctrl_ids[] = {
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk322x.c b/drivers/pinctrl/rockchip/pinctrl-rk322x.c
index d2a6cd7055..d67b48a06a 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk322x.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk322x.c
@@ -183,15 +183,15 @@ static struct rockchip_pin_bank rk3228_pin_banks[] = {
 };
 
 static struct rockchip_pin_ctrl rk3228_pin_ctrl = {
-		.pin_banks		= rk3228_pin_banks,
-		.nr_banks		= ARRAY_SIZE(rk3228_pin_banks),
-		.label			= "RK3228-GPIO",
-		.type			= RK3288,
-		.grf_mux_offset		= 0x0,
-		.iomux_routes		= rk3228_mux_route_data,
-		.niomux_routes		= ARRAY_SIZE(rk3228_mux_route_data),
-		.pull_calc_reg		= rk3228_calc_pull_reg_and_bit,
-		.drv_calc_reg		= rk3228_calc_drv_reg_and_bit,
+	.pin_banks		= rk3228_pin_banks,
+	.nr_banks		= ARRAY_SIZE(rk3228_pin_banks),
+	.label			= "RK3228-GPIO",
+	.type			= RK3288,
+	.grf_mux_offset		= 0x0,
+	.iomux_routes		= rk3228_mux_route_data,
+	.niomux_routes		= ARRAY_SIZE(rk3228_mux_route_data),
+	.pull_calc_reg		= rk3228_calc_pull_reg_and_bit,
+	.drv_calc_reg		= rk3228_calc_drv_reg_and_bit,
 };
 
 static const struct udevice_id rk3228_pinctrl_ids[] = {
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3288.c b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
index 8b6ce11a63..64525c9e2b 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3288.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
@@ -133,16 +133,16 @@ static struct rockchip_pin_bank rk3288_pin_banks[] = {
 };
 
 static struct rockchip_pin_ctrl rk3288_pin_ctrl = {
-		.pin_banks		= rk3288_pin_banks,
-		.nr_banks		= ARRAY_SIZE(rk3288_pin_banks),
-		.label			= "RK3288-GPIO",
-		.type			= RK3288,
-		.grf_mux_offset		= 0x0,
-		.pmu_mux_offset		= 0x84,
-		.iomux_routes		= rk3288_mux_route_data,
-		.niomux_routes		= ARRAY_SIZE(rk3288_mux_route_data),
-		.pull_calc_reg		= rk3288_calc_pull_reg_and_bit,
-		.drv_calc_reg		= rk3288_calc_drv_reg_and_bit,
+	.pin_banks		= rk3288_pin_banks,
+	.nr_banks		= ARRAY_SIZE(rk3288_pin_banks),
+	.label			= "RK3288-GPIO",
+	.type			= RK3288,
+	.grf_mux_offset		= 0x0,
+	.pmu_mux_offset		= 0x84,
+	.iomux_routes		= rk3288_mux_route_data,
+	.niomux_routes		= ARRAY_SIZE(rk3288_mux_route_data),
+	.pull_calc_reg		= rk3288_calc_pull_reg_and_bit,
+	.drv_calc_reg		= rk3288_calc_drv_reg_and_bit,
 };
 
 static const struct udevice_id rk3288_pinctrl_ids[] = {
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3328.c b/drivers/pinctrl/rockchip/pinctrl-rk3328.c
index f1b3d10dbe..ab634c1123 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3328.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3328.c
@@ -192,18 +192,18 @@ static struct rockchip_pin_bank rk3328_pin_banks[] = {
 };
 
 static struct rockchip_pin_ctrl rk3328_pin_ctrl = {
-		.pin_banks		= rk3328_pin_banks,
-		.nr_banks		= ARRAY_SIZE(rk3328_pin_banks),
-		.label			= "RK3328-GPIO",
-		.type			= RK3288,
-		.grf_mux_offset		= 0x0,
-		.iomux_recalced		= rk3328_mux_recalced_data,
-		.niomux_recalced	= ARRAY_SIZE(rk3328_mux_recalced_data),
-		.iomux_routes		= rk3328_mux_route_data,
-		.niomux_routes		= ARRAY_SIZE(rk3328_mux_route_data),
-		.pull_calc_reg		= rk3328_calc_pull_reg_and_bit,
-		.drv_calc_reg		= rk3328_calc_drv_reg_and_bit,
-		.schmitt_calc_reg	= rk3328_calc_schmitt_reg_and_bit,
+	.pin_banks		= rk3328_pin_banks,
+	.nr_banks		= ARRAY_SIZE(rk3328_pin_banks),
+	.label			= "RK3328-GPIO",
+	.type			= RK3288,
+	.grf_mux_offset		= 0x0,
+	.iomux_recalced		= rk3328_mux_recalced_data,
+	.niomux_recalced	= ARRAY_SIZE(rk3328_mux_recalced_data),
+	.iomux_routes		= rk3328_mux_route_data,
+	.niomux_routes		= ARRAY_SIZE(rk3328_mux_route_data),
+	.pull_calc_reg		= rk3328_calc_pull_reg_and_bit,
+	.drv_calc_reg		= rk3328_calc_drv_reg_and_bit,
+	.schmitt_calc_reg	= rk3328_calc_schmitt_reg_and_bit,
 };
 
 static const struct udevice_id rk3328_pinctrl_ids[] = {
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3368.c b/drivers/pinctrl/rockchip/pinctrl-rk3368.c
index f5cd6ff24e..8bdaf5e4d2 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3368.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3368.c
@@ -85,14 +85,14 @@ static struct rockchip_pin_bank rk3368_pin_banks[] = {
 };
 
 static struct rockchip_pin_ctrl rk3368_pin_ctrl = {
-		.pin_banks		= rk3368_pin_banks,
-		.nr_banks		= ARRAY_SIZE(rk3368_pin_banks),
-		.label			= "RK3368-GPIO",
-		.type			= RK3368,
-		.grf_mux_offset		= 0x0,
-		.pmu_mux_offset		= 0x0,
-		.pull_calc_reg		= rk3368_calc_pull_reg_and_bit,
-		.drv_calc_reg		= rk3368_calc_drv_reg_and_bit,
+	.pin_banks		= rk3368_pin_banks,
+	.nr_banks		= ARRAY_SIZE(rk3368_pin_banks),
+	.label			= "RK3368-GPIO",
+	.type			= RK3368,
+	.grf_mux_offset		= 0x0,
+	.pmu_mux_offset		= 0x0,
+	.pull_calc_reg		= rk3368_calc_pull_reg_and_bit,
+	.drv_calc_reg		= rk3368_calc_drv_reg_and_bit,
 };
 
 static const struct udevice_id rk3368_pinctrl_ids[] = {
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3399.c b/drivers/pinctrl/rockchip/pinctrl-rk3399.c
index c5aab647a5..06276b14ef 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3399.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3399.c
@@ -158,18 +158,18 @@ static struct rockchip_pin_bank rk3399_pin_banks[] = {
 };
 
 static struct rockchip_pin_ctrl rk3399_pin_ctrl = {
-		.pin_banks		= rk3399_pin_banks,
-		.nr_banks		= ARRAY_SIZE(rk3399_pin_banks),
-		.label			= "RK3399-GPIO",
-		.type			= RK3399,
-		.grf_mux_offset		= 0xe000,
-		.pmu_mux_offset		= 0x0,
-		.grf_drv_offset		= 0xe100,
-		.pmu_drv_offset		= 0x80,
-		.iomux_routes		= rk3399_mux_route_data,
-		.niomux_routes		= ARRAY_SIZE(rk3399_mux_route_data),
-		.pull_calc_reg		= rk3399_calc_pull_reg_and_bit,
-		.drv_calc_reg		= rk3399_calc_drv_reg_and_bit,
+	.pin_banks		= rk3399_pin_banks,
+	.nr_banks		= ARRAY_SIZE(rk3399_pin_banks),
+	.label			= "RK3399-GPIO",
+	.type			= RK3399,
+	.grf_mux_offset		= 0xe000,
+	.pmu_mux_offset		= 0x0,
+	.grf_drv_offset		= 0xe100,
+	.pmu_drv_offset		= 0x80,
+	.iomux_routes		= rk3399_mux_route_data,
+	.niomux_routes		= ARRAY_SIZE(rk3399_mux_route_data),
+	.pull_calc_reg		= rk3399_calc_pull_reg_and_bit,
+	.drv_calc_reg		= rk3399_calc_drv_reg_and_bit,
 };
 
 static const struct udevice_id rk3399_pinctrl_ids[] = {

commit 8fa6c06288d4a279a255afa9015f773dca21bbbe
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Apr 16 21:50:53 2019 +0800

    UPSTREAM: pinctrl: rockchip: Add pull-pin-default param and remove unused param
    
    Some Socs use the pull-pin-default config param, need to add it.
    And input-enable/disable config params are not necessary, remove it.
    
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 0a5cc3cac96dcbb1f31c9c2a3954dad702a543c1)
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
    
    Change-Id: Id7522a4fdd21d42d46c42e6f66b93985064fd9ab

diff --git a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
index 5c7e86c6db..f2418f621f 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
@@ -530,9 +530,8 @@ static const struct pinconf_param rockchip_conf_params[] = {
 	{ "bias-bus-hold", PIN_CONFIG_BIAS_BUS_HOLD, 0 },
 	{ "bias-pull-up", PIN_CONFIG_BIAS_PULL_UP, 1 },
 	{ "bias-pull-down", PIN_CONFIG_BIAS_PULL_DOWN, 1 },
+	{ "bias-pull-pin-default", PIN_CONFIG_BIAS_PULL_PIN_DEFAULT, 1 },
 	{ "drive-strength", PIN_CONFIG_DRIVE_STRENGTH, 0 },
-	{ "input-enable", PIN_CONFIG_INPUT_ENABLE, 1 },
-	{ "input-disable", PIN_CONFIG_INPUT_ENABLE, 0 },
 	{ "input-schmitt-disable", PIN_CONFIG_INPUT_SCHMITT_ENABLE, 0 },
 	{ "input-schmitt-enable", PIN_CONFIG_INPUT_SCHMITT_ENABLE, 1 },
 };

commit 49b3d5d5ff0e48a23cc552b51d5a4e1862e316b6
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Feb 12 19:51:51 2019 +0800

    UPSTREAM: pinctrl: rockchip: Add 32bit writing function for rk3288 gpio0 pinctrl
    
    There are no higher 16 writing corresponding bits for pmu_gpio0's
    iomux/drive/pull at rk3288, need to read the value from register
    firstly. Add the flag to distinguish it from normal registers.
    
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    (cherry picked from commit 502980914b2d6f9ee85a823aa3ef9ead76c0b7f2)
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
    
    Change-Id: Ibf0ba2d879904a06a2fb6722f5886a39c010a7f7

diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3288.c b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
index 60585f3208..8b6ce11a63 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3288.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
@@ -92,10 +92,19 @@ static void rk3288_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
 }
 
 static struct rockchip_pin_bank rk3288_pin_banks[] = {
-	PIN_BANK_IOMUX_FLAGS(0, 24, "gpio0", IOMUX_SOURCE_PMU,
-					     IOMUX_SOURCE_PMU,
-					     IOMUX_SOURCE_PMU,
-					     IOMUX_UNROUTED
+	PIN_BANK_IOMUX_DRV_PULL_FLAGS(0, 24, "gpio0",
+				      IOMUX_SOURCE_PMU | IOMUX_WRITABLE_32BIT,
+				      IOMUX_SOURCE_PMU | IOMUX_WRITABLE_32BIT,
+				      IOMUX_SOURCE_PMU | IOMUX_WRITABLE_32BIT,
+				      IOMUX_UNROUTED,
+				      DRV_TYPE_WRITABLE_32BIT,
+				      DRV_TYPE_WRITABLE_32BIT,
+				      DRV_TYPE_WRITABLE_32BIT,
+				      0,
+				      PULL_TYPE_WRITABLE_32BIT,
+				      PULL_TYPE_WRITABLE_32BIT,
+				      PULL_TYPE_WRITABLE_32BIT,
+				      0
 			    ),
 	PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1", IOMUX_UNROUTED,
 					     IOMUX_UNROUTED,
diff --git a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
index 226c506fc8..5c7e86c6db 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
@@ -228,7 +228,13 @@ static int rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
 		}
 	}
 
-	data = (mask << (bit + 16));
+	if (mux_type & IOMUX_WRITABLE_32BIT) {
+		regmap_read(regmap, reg, &data);
+		data &= ~(mask << bit);
+	} else {
+		data = (mask << (bit + 16));
+	}
+
 	data |= (mux & mask) << bit;
 	ret = regmap_write(regmap, reg, data);
 
@@ -252,7 +258,8 @@ static int rockchip_set_drive_perpin(struct rockchip_pin_bank *bank,
 	int reg, ret, i;
 	u32 data, rmask_bits, temp;
 	u8 bit;
-	int drv_type = bank->drv[pin_num / 8].drv_type;
+	/* Where need to clean the special mask for rockchip_perpin_drv_list */
+	int drv_type = bank->drv[pin_num / 8].drv_type & (~DRV_TYPE_IO_MASK);
 
 	debug("setting drive of GPIO%d-%d to %d\n", bank->bank_num,
 	      pin_num, strength);
@@ -324,10 +331,15 @@ static int rockchip_set_drive_perpin(struct rockchip_pin_bank *bank,
 		return -EINVAL;
 	}
 
-	/* enable the write to the equivalent lower bits */
-	data = ((1 << rmask_bits) - 1) << (bit + 16);
-	data |= (ret << bit);
+	if (bank->drv[pin_num / 8].drv_type & DRV_TYPE_WRITABLE_32BIT) {
+		regmap_read(regmap, reg, &data);
+		data &= ~(((1 << rmask_bits) - 1) << bit);
+	} else {
+		/* enable the write to the equivalent lower bits */
+		data = ((1 << rmask_bits) - 1) << (bit + 16);
+	}
 
+	data |= (ret << bit);
 	ret = regmap_write(regmap, reg, data);
 	return ret;
 }
@@ -375,7 +387,11 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank,
 	case RK3288:
 	case RK3368:
 	case RK3399:
-		pull_type = bank->pull_type[pin_num / 8];
+		/*
+		 * Where need to clean the special mask for
+		 * rockchip_pull_list.
+		 */
+		pull_type = bank->pull_type[pin_num / 8] & (~PULL_TYPE_IO_MASK);
 		ret = -EINVAL;
 		for (i = 0; i < ARRAY_SIZE(rockchip_pull_list[pull_type]);
 			i++) {
@@ -390,10 +406,15 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank,
 			return ret;
 		}
 
-		/* enable the write to the equivalent lower bits */
-		data = ((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << (bit + 16);
-		data |= (ret << bit);
+		if (bank->pull_type[pin_num / 8] & PULL_TYPE_WRITABLE_32BIT) {
+			regmap_read(regmap, reg, &data);
+			data &= ~(((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << bit);
+		} else {
+			/* enable the write to the equivalent lower bits */
+			data = ((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << (bit + 16);
+		}
 
+		data |= (ret << bit);
 		ret = regmap_write(regmap, reg, data);
 		break;
 	default:
diff --git a/drivers/pinctrl/rockchip/pinctrl-rockchip.h b/drivers/pinctrl/rockchip/pinctrl-rockchip.h
index bc809630c1..5a6849c996 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rockchip.h
+++ b/drivers/pinctrl/rockchip/pinctrl-rockchip.h
@@ -26,6 +26,7 @@ enum rockchip_pinctrl_type {
 #define IOMUX_SOURCE_PMU	BIT(2)
 #define IOMUX_UNROUTED		BIT(3)
 #define IOMUX_WIDTH_3BIT	BIT(4)
+#define IOMUX_WRITABLE_32BIT	BIT(5)
 
 /**
  * Defined some common pins constants
@@ -49,6 +50,9 @@ struct rockchip_iomux {
 	int				offset;
 };
 
+#define DRV_TYPE_IO_MASK		GENMASK(31, 16)
+#define DRV_TYPE_WRITABLE_32BIT		BIT(31)
+
 /**
  * enum type index corresponding to rockchip_perpin_drv_list arrays index.
  */
@@ -61,6 +65,9 @@ enum rockchip_pin_drv_type {
 	DRV_TYPE_MAX
 };
 
+#define PULL_TYPE_IO_MASK		GENMASK(31, 16)
+#define PULL_TYPE_WRITABLE_32BIT	BIT(31)
+
 /**
  * enum type index corresponding to rockchip_pull_list arrays index.
  */
@@ -200,6 +207,32 @@ struct rockchip_pin_bank {
 		},							\
 	}
 
+#define PIN_BANK_IOMUX_DRV_PULL_FLAGS(id, pins, label, iom0, iom1,	\
+				      iom2, iom3, drv0, drv1, drv2,	\
+				      drv3, pull0, pull1, pull2,	\
+				      pull3)				\
+	{								\
+		.bank_num	= id,					\
+		.nr_pins	= pins,					\
+		.name		= label,				\
+		.iomux		= {					\
+			{ .type = iom0, .offset = -1 },			\
+			{ .type = iom1, .offset = -1 },			\
+			{ .type = iom2, .offset = -1 },			\
+			{ .type = iom3, .offset = -1 },			\
+		},							\
+		.drv		= {					\
+			{ .drv_type = drv0, .offset = -1 },		\
+			{ .drv_type = drv1, .offset = -1 },		\
+			{ .drv_type = drv2, .offset = -1 },		\
+			{ .drv_type = drv3, .offset = -1 },		\
+		},							\
+		.pull_type[0] = pull0,					\
+		.pull_type[1] = pull1,					\
+		.pull_type[2] = pull2,					\
+		.pull_type[3] = pull3,					\
+	}
+
 #define PIN_BANK_IOMUX_FLAGS_DRV_FLAGS_OFFSET_PULL_FLAGS(id, pins,	\
 					      label, iom0, iom1, iom2,  \
 					      iom3, drv0, drv1, drv2,   \

commit f2e4e921f07b4497cf81299c886f880014bdb395
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Jan 2 21:00:55 2019 +0800

    UPSTREAM: pinctrl: rockchip: Add common rockchip pinctrl driver
    
    Use this driver to fit all Rockchip SOCs and to support
    the desired pinctrl configuration via DTS.
    
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Heiko Stuebner <heiko@sntech.de>
    Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    (cherry picked from commit e7ae4cf27a6d5837cb5e868712cdaa61d3ceb5e0)
    
    1. fix with error handle with pin with IOMUX_UNROUTED.
    2. add get pin count operation
    3. modify drivers/pinctrl/rockchip/Makefile
    
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
    Change-Id: I1a398c865eb9e9afc38c6aca5431b6546e7260a6

diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index 35e8001029..65005aac3d 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -10,7 +10,8 @@ obj-$(CONFIG_PINCTRL_AT91PIO4)		+= pinctrl-at91-pio4.o
 obj-y					+= nxp/
 obj-$(CONFIG_ARCH_ASPEED) += aspeed/
 obj-$(CONFIG_ARCH_ATH79) += ath79/
-obj-$(CONFIG_$(SPL_)PINCTRL_ROCKCHIP) += pinctrl-rockchip.o
+obj-$(CONFIG_$(SPL_)PINCTRL_ROCKCHIP)	+= pinctrl-rockchip.o
+obj-$(CONFIG_$(SPL_)PINCTRL_ROCKCHIP)	+= rockchip/
 obj-$(CONFIG_PINCTRL_SANDBOX)	+= pinctrl-sandbox.o
 
 obj-$(CONFIG_PINCTRL_UNIPHIER)	+= uniphier/
diff --git a/drivers/pinctrl/rockchip/Kconfig b/drivers/pinctrl/rockchip/Kconfig
new file mode 100644
index 0000000000..dc4ba34ae5
--- /dev/null
+++ b/drivers/pinctrl/rockchip/Kconfig
@@ -0,0 +1,17 @@
+if ARCH_ROCKCHIP
+
+config PINCTRL_ROCKCHIP
+	bool "Rockchip pin control drivers"
+	depends on ARCH_ROCKCHIP && PINCTRL_GENERIC
+	default y
+	help
+	  Enable support pin control functions for Rockchip SoCs.
+
+config SPL_PINCTRL_ROCKCHIP
+	bool "Support Rockchip pin controllers in SPL"
+	depends on ARCH_ROCKCHIP && SPL_PINCTRL_GENERIC
+	default y
+	help
+	  This option is an SPL-variant of the PINCTRL_ROCKCHIP option.
+
+endif
diff --git a/drivers/pinctrl/rockchip/Makefile b/drivers/pinctrl/rockchip/Makefile
new file mode 100644
index 0000000000..f245d7e44b
--- /dev/null
+++ b/drivers/pinctrl/rockchip/Makefile
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (c) 2017 Rockchip Electronics Co., Ltd
+
+obj-y += pinctrl-rockchip-core.o
+#obj-$(CONFIG_ROCKCHIP_RK3036) += pinctrl-rk3036.o
+#obj-$(CONFIG_ROCKCHIP_RK3128) += pinctrl-rk3128.o
+#obj-$(CONFIG_ROCKCHIP_RK3188) += pinctrl-rk3188.o
+#obj-$(CONFIG_ROCKCHIP_RK322X) += pinctrl-rk322x.o
+#obj-$(CONFIG_ROCKCHIP_RK3288) += pinctrl-rk3288.o
+#obj-$(CONFIG_ROCKCHIP_RK3308) += pinctrl-rk3308.o
+#obj-$(CONFIG_ROCKCHIP_RK3328) += pinctrl-rk3328.o
+#obj-$(CONFIG_ROCKCHIP_RK3368) += pinctrl-rk3368.o
+#obj-$(CONFIG_ROCKCHIP_RK3399) += pinctrl-rk3399.o
+#obj-$(CONFIG_ROCKCHIP_RV1108) += pinctrl-rv1108.o
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3036.c b/drivers/pinctrl/rockchip/pinctrl-rk3036.c
new file mode 100644
index 0000000000..2729b03443
--- /dev/null
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3036.c
@@ -0,0 +1,65 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <regmap.h>
+#include <syscon.h>
+
+#include "pinctrl-rockchip.h"
+
+#define RK3036_PULL_OFFSET		0x118
+#define RK3036_PULL_PINS_PER_REG	16
+#define RK3036_PULL_BANK_STRIDE		8
+
+static void rk3036_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
+					 int pin_num, struct regmap **regmap,
+					 int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	*regmap = priv->regmap_base;
+	*reg = RK3036_PULL_OFFSET;
+	*reg += bank->bank_num * RK3036_PULL_BANK_STRIDE;
+	*reg += (pin_num / RK3036_PULL_PINS_PER_REG) * 4;
+
+	*bit = pin_num % RK3036_PULL_PINS_PER_REG;
+};
+
+static struct rockchip_pin_bank rk3036_pin_banks[] = {
+	PIN_BANK(0, 32, "gpio0"),
+	PIN_BANK(1, 32, "gpio1"),
+	PIN_BANK(2, 32, "gpio2"),
+};
+
+static struct rockchip_pin_ctrl rk3036_pin_ctrl = {
+		.pin_banks		= rk3036_pin_banks,
+		.nr_banks		= ARRAY_SIZE(rk3036_pin_banks),
+		.label			= "RK3036-GPIO",
+		.type			= RK3036,
+		.grf_mux_offset		= 0xa8,
+		.pull_calc_reg		= rk3036_calc_pull_reg_and_bit,
+};
+
+static const struct udevice_id rk3036_pinctrl_ids[] = {
+	{
+		.compatible = "rockchip,rk3036-pinctrl",
+		.data = (ulong)&rk3036_pin_ctrl
+	},
+	{}
+};
+
+U_BOOT_DRIVER(pinctrl_rockchip) = {
+	.name		= "rk3036-pinctrl",
+	.id		= UCLASS_PINCTRL,
+	.of_match	= rk3036_pinctrl_ids,
+	.priv_auto_alloc_size = sizeof(struct rockchip_pinctrl_priv),
+	.ops		= &rockchip_pinctrl_ops,
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	.bind		= dm_scan_fdt_dev,
+#endif
+	.probe		= rockchip_pinctrl_probe,
+};
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3128.c b/drivers/pinctrl/rockchip/pinctrl-rk3128.c
new file mode 100644
index 0000000000..43a6c173a0
--- /dev/null
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3128.c
@@ -0,0 +1,155 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <regmap.h>
+#include <syscon.h>
+
+#include "pinctrl-rockchip.h"
+
+static struct rockchip_mux_recalced_data rk3128_mux_recalced_data[] = {
+	{
+		.num = 2,
+		.pin = 20,
+		.reg = 0xe8,
+		.bit = 0,
+		.mask = 0x7
+	}, {
+		.num = 2,
+		.pin = 21,
+		.reg = 0xe8,
+		.bit = 4,
+		.mask = 0x7
+	}, {
+		.num = 2,
+		.pin = 22,
+		.reg = 0xe8,
+		.bit = 8,
+		.mask = 0x7
+	}, {
+		.num = 2,
+		.pin = 23,
+		.reg = 0xe8,
+		.bit = 12,
+		.mask = 0x7
+	}, {
+		.num = 2,
+		.pin = 24,
+		.reg = 0xd4,
+		.bit = 12,
+		.mask = 0x7
+	},
+};
+
+static struct rockchip_mux_route_data rk3128_mux_route_data[] = {
+	{
+		/* spi-0 */
+		.bank_num = 1,
+		.pin = 10,
+		.func = 1,
+		.route_offset = 0x144,
+		.route_val = BIT(16 + 3) | BIT(16 + 4),
+	}, {
+		/* spi-1 */
+		.bank_num = 1,
+		.pin = 27,
+		.func = 3,
+		.route_offset = 0x144,
+		.route_val = BIT(16 + 3) | BIT(16 + 4) | BIT(3),
+	}, {
+		/* spi-2 */
+		.bank_num = 0,
+		.pin = 13,
+		.func = 2,
+		.route_offset = 0x144,
+		.route_val = BIT(16 + 3) | BIT(16 + 4) | BIT(4),
+	}, {
+		/* i2s-0 */
+		.bank_num = 1,
+		.pin = 5,
+		.func = 1,
+		.route_offset = 0x144,
+		.route_val = BIT(16 + 5),
+	}, {
+		/* i2s-1 */
+		.bank_num = 0,
+		.pin = 14,
+		.func = 1,
+		.route_offset = 0x144,
+		.route_val = BIT(16 + 5) | BIT(5),
+	}, {
+		/* emmc-0 */
+		.bank_num = 1,
+		.pin = 22,
+		.func = 2,
+		.route_offset = 0x144,
+		.route_val = BIT(16 + 6),
+	}, {
+		/* emmc-1 */
+		.bank_num = 2,
+		.pin = 4,
+		.func = 2,
+		.route_offset = 0x144,
+		.route_val = BIT(16 + 6) | BIT(6),
+	},
+};
+
+#define RK3128_PULL_OFFSET		0x118
+#define RK3128_PULL_PINS_PER_REG	16
+#define RK3128_PULL_BANK_STRIDE		8
+
+static void rk3128_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
+					 int pin_num, struct regmap **regmap,
+					 int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	*regmap = priv->regmap_base;
+	*reg = RK3128_PULL_OFFSET;
+	*reg += bank->bank_num * RK3128_PULL_BANK_STRIDE;
+	*reg += ((pin_num / RK3128_PULL_PINS_PER_REG) * 4);
+
+	*bit = pin_num % RK3128_PULL_PINS_PER_REG;
+}
+
+static struct rockchip_pin_bank rk3128_pin_banks[] = {
+	PIN_BANK(0, 32, "gpio0"),
+	PIN_BANK(1, 32, "gpio1"),
+	PIN_BANK(2, 32, "gpio2"),
+	PIN_BANK(3, 32, "gpio3"),
+};
+
+static struct rockchip_pin_ctrl rk3128_pin_ctrl = {
+	.pin_banks		= rk3128_pin_banks,
+	.nr_banks		= ARRAY_SIZE(rk3128_pin_banks),
+	.label			= "RK3128-GPIO",
+	.type			= RK3128,
+	.grf_mux_offset		= 0xa8,
+	.iomux_recalced		= rk3128_mux_recalced_data,
+	.niomux_recalced	= ARRAY_SIZE(rk3128_mux_recalced_data),
+	.iomux_routes		= rk3128_mux_route_data,
+	.niomux_routes		= ARRAY_SIZE(rk3128_mux_route_data),
+	.pull_calc_reg		= rk3128_calc_pull_reg_and_bit,
+};
+
+static const struct udevice_id rk3128_pinctrl_ids[] = {
+	{ .compatible = "rockchip,rk3128-pinctrl",
+		.data = (ulong)&rk3128_pin_ctrl },
+	{ }
+};
+
+U_BOOT_DRIVER(pinctrl_rk3128) = {
+	.name		= "pinctrl_rk3128",
+	.id		= UCLASS_PINCTRL,
+	.of_match	= rk3128_pinctrl_ids,
+	.priv_auto_alloc_size = sizeof(struct rockchip_pinctrl_priv),
+	.ops		= &rockchip_pinctrl_ops,
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	.bind		= dm_scan_fdt_dev,
+#endif
+	.probe		= rockchip_pinctrl_probe,
+};
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3188.c b/drivers/pinctrl/rockchip/pinctrl-rk3188.c
new file mode 100644
index 0000000000..5ed9aec938
--- /dev/null
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3188.c
@@ -0,0 +1,82 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <regmap.h>
+#include <syscon.h>
+
+#include "pinctrl-rockchip.h"
+
+#define RK3188_PULL_OFFSET		0x164
+#define RK3188_PULL_PMU_OFFSET		0x64
+
+static void rk3188_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
+					 int pin_num, struct regmap **regmap,
+					 int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	/* The first 12 pins of the first bank are located elsewhere */
+	if (bank->bank_num == 0 && pin_num < 12) {
+		*regmap = priv->regmap_pmu;
+		*reg = RK3188_PULL_PMU_OFFSET;
+
+		*reg += ((pin_num / ROCKCHIP_PULL_PINS_PER_REG) * 4);
+		*bit = pin_num % ROCKCHIP_PULL_PINS_PER_REG;
+		*bit *= ROCKCHIP_PULL_BITS_PER_PIN;
+	} else {
+		*regmap = priv->regmap_base;
+		*reg = RK3188_PULL_OFFSET;
+
+		/* correct the offset, as it is the 2nd pull register */
+		*reg -= 4;
+		*reg += bank->bank_num * ROCKCHIP_PULL_BANK_STRIDE;
+		*reg += ((pin_num / ROCKCHIP_PULL_PINS_PER_REG) * 4);
+
+		/*
+		 * The bits in these registers have an inverse ordering
+		 * with the lowest pin being in bits 15:14 and the highest
+		 * pin in bits 1:0
+		 */
+		*bit = 7 - (pin_num % ROCKCHIP_PULL_PINS_PER_REG);
+		*bit *= ROCKCHIP_PULL_BITS_PER_PIN;
+	}
+}
+
+static struct rockchip_pin_bank rk3188_pin_banks[] = {
+	PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", IOMUX_GPIO_ONLY, 0, 0, 0),
+	PIN_BANK(1, 32, "gpio1"),
+	PIN_BANK(2, 32, "gpio2"),
+	PIN_BANK(3, 32, "gpio3"),
+};
+
+static struct rockchip_pin_ctrl rk3188_pin_ctrl = {
+		.pin_banks		= rk3188_pin_banks,
+		.nr_banks		= ARRAY_SIZE(rk3188_pin_banks),
+		.label			= "RK3188-GPIO",
+		.type			= RK3188,
+		.grf_mux_offset		= 0x60,
+		.pull_calc_reg		= rk3188_calc_pull_reg_and_bit,
+};
+
+static const struct udevice_id rk3188_pinctrl_ids[] = {
+	{ .compatible = "rockchip,rk3188-pinctrl",
+		.data = (ulong)&rk3188_pin_ctrl },
+	{ }
+};
+
+U_BOOT_DRIVER(pinctrl_rk3188) = {
+	.name		= "rockchip_rk3188_pinctrl",
+	.id		= UCLASS_PINCTRL,
+	.of_match	= rk3188_pinctrl_ids,
+	.priv_auto_alloc_size = sizeof(struct rockchip_pinctrl_priv),
+	.ops		= &rockchip_pinctrl_ops,
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	.bind		= dm_scan_fdt_dev,
+#endif
+	.probe		= rockchip_pinctrl_probe,
+};
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk322x.c b/drivers/pinctrl/rockchip/pinctrl-rk322x.c
new file mode 100644
index 0000000000..d2a6cd7055
--- /dev/null
+++ b/drivers/pinctrl/rockchip/pinctrl-rk322x.c
@@ -0,0 +1,215 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <regmap.h>
+#include <syscon.h>
+
+#include "pinctrl-rockchip.h"
+
+static struct rockchip_mux_route_data rk3228_mux_route_data[] = {
+	{
+		/* pwm0-0 */
+		.bank_num = 0,
+		.pin = 26,
+		.func = 1,
+		.route_offset = 0x50,
+		.route_val = BIT(16),
+	}, {
+		/* pwm0-1 */
+		.bank_num = 3,
+		.pin = 21,
+		.func = 1,
+		.route_offset = 0x50,
+		.route_val = BIT(16) | BIT(0),
+	}, {
+		/* pwm1-0 */
+		.bank_num = 0,
+		.pin = 27,
+		.func = 1,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 1),
+	}, {
+		/* pwm1-1 */
+		.bank_num = 0,
+		.pin = 30,
+		.func = 2,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 1) | BIT(1),
+	}, {
+		/* pwm2-0 */
+		.bank_num = 0,
+		.pin = 28,
+		.func = 1,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 2),
+	}, {
+		/* pwm2-1 */
+		.bank_num = 1,
+		.pin = 12,
+		.func = 2,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 2) | BIT(2),
+	}, {
+		/* pwm3-0 */
+		.bank_num = 3,
+		.pin = 26,
+		.func = 1,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 3),
+	}, {
+		/* pwm3-1 */
+		.bank_num = 1,
+		.pin = 11,
+		.func = 2,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 3) | BIT(3),
+	}, {
+		/* sdio-0_d0 */
+		.bank_num = 1,
+		.pin = 1,
+		.func = 1,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 4),
+	}, {
+		/* sdio-1_d0 */
+		.bank_num = 3,
+		.pin = 2,
+		.func = 1,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 4) | BIT(4),
+	}, {
+		/* spi-0_rx */
+		.bank_num = 0,
+		.pin = 13,
+		.func = 2,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 5),
+	}, {
+		/* spi-1_rx */
+		.bank_num = 2,
+		.pin = 0,
+		.func = 2,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 5) | BIT(5),
+	}, {
+		/* emmc-0_cmd */
+		.bank_num = 1,
+		.pin = 22,
+		.func = 2,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 7),
+	}, {
+		/* emmc-1_cmd */
+		.bank_num = 2,
+		.pin = 4,
+		.func = 2,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 7) | BIT(7),
+	}, {
+		/* uart2-0_rx */
+		.bank_num = 1,
+		.pin = 19,
+		.func = 2,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 8),
+	}, {
+		/* uart2-1_rx */
+		.bank_num = 1,
+		.pin = 10,
+		.func = 2,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 8) | BIT(8),
+	}, {
+		/* uart1-0_rx */
+		.bank_num = 1,
+		.pin = 10,
+		.func = 1,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 11),
+	}, {
+		/* uart1-1_rx */
+		.bank_num = 3,
+		.pin = 13,
+		.func = 1,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 11) | BIT(11),
+	},
+};
+
+#define RK3228_PULL_OFFSET		0x100
+
+static void rk3228_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
+					 int pin_num, struct regmap **regmap,
+					 int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	*regmap = priv->regmap_base;
+	*reg = RK3228_PULL_OFFSET;
+	*reg += bank->bank_num * ROCKCHIP_PULL_BANK_STRIDE;
+	*reg += ((pin_num / ROCKCHIP_PULL_PINS_PER_REG) * 4);
+
+	*bit = (pin_num % ROCKCHIP_PULL_PINS_PER_REG);
+	*bit *= ROCKCHIP_PULL_BITS_PER_PIN;
+}
+
+#define RK3228_DRV_GRF_OFFSET		0x200
+
+static void rk3228_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
+					int pin_num, struct regmap **regmap,
+					int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	*regmap = priv->regmap_base;
+	*reg = RK3228_DRV_GRF_OFFSET;
+	*reg += bank->bank_num * ROCKCHIP_DRV_BANK_STRIDE;
+	*reg += ((pin_num / ROCKCHIP_DRV_PINS_PER_REG) * 4);
+
+	*bit = (pin_num % ROCKCHIP_DRV_PINS_PER_REG);
+	*bit *= ROCKCHIP_DRV_BITS_PER_PIN;
+}
+
+static struct rockchip_pin_bank rk3228_pin_banks[] = {
+	PIN_BANK(0, 32, "gpio0"),
+	PIN_BANK(1, 32, "gpio1"),
+	PIN_BANK(2, 32, "gpio2"),
+	PIN_BANK(3, 32, "gpio3"),
+};
+
+static struct rockchip_pin_ctrl rk3228_pin_ctrl = {
+		.pin_banks		= rk3228_pin_banks,
+		.nr_banks		= ARRAY_SIZE(rk3228_pin_banks),
+		.label			= "RK3228-GPIO",
+		.type			= RK3288,
+		.grf_mux_offset		= 0x0,
+		.iomux_routes		= rk3228_mux_route_data,
+		.niomux_routes		= ARRAY_SIZE(rk3228_mux_route_data),
+		.pull_calc_reg		= rk3228_calc_pull_reg_and_bit,
+		.drv_calc_reg		= rk3228_calc_drv_reg_and_bit,
+};
+
+static const struct udevice_id rk3228_pinctrl_ids[] = {
+	{
+		.compatible = "rockchip,rk3228-pinctrl",
+		.data = (ulong)&rk3228_pin_ctrl
+	},
+	{ }
+};
+
+U_BOOT_DRIVER(pinctrl_rk3228) = {
+	.name		= "rockchip_rk3228_pinctrl",
+	.id		= UCLASS_PINCTRL,
+	.of_match	= rk3228_pinctrl_ids,
+	.priv_auto_alloc_size = sizeof(struct rockchip_pinctrl_priv),
+	.ops		= &rockchip_pinctrl_ops,
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	.bind		= dm_scan_fdt_dev,
+#endif
+	.probe		= rockchip_pinctrl_probe,
+};
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3288.c b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
new file mode 100644
index 0000000000..60585f3208
--- /dev/null
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
@@ -0,0 +1,157 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <regmap.h>
+#include <syscon.h>
+
+#include "pinctrl-rockchip.h"
+
+static struct rockchip_mux_route_data rk3288_mux_route_data[] = {
+	{
+		/* edphdmi_cecinoutt1 */
+		.bank_num = 7,
+		.pin = 16,
+		.func = 2,
+		.route_offset = 0x264,
+		.route_val = BIT(16 + 12) | BIT(12),
+	}, {
+		/* edphdmi_cecinout */
+		.bank_num = 7,
+		.pin = 23,
+		.func = 4,
+		.route_offset = 0x264,
+		.route_val = BIT(16 + 12),
+	},
+};
+
+#define RK3288_PULL_OFFSET		0x140
+#define RK3288_PULL_PMU_OFFSET          0x64
+
+static void rk3288_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
+					 int pin_num, struct regmap **regmap,
+					 int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	/* The first 24 pins of the first bank are located in PMU */
+	if (bank->bank_num == 0) {
+		*regmap = priv->regmap_pmu;
+		*reg = RK3288_PULL_PMU_OFFSET;
+
+		*reg += ((pin_num / ROCKCHIP_PULL_PINS_PER_REG) * 4);
+		*bit = pin_num % ROCKCHIP_PULL_PINS_PER_REG;
+		*bit *= ROCKCHIP_PULL_BITS_PER_PIN;
+	} else {
+		*regmap = priv->regmap_base;
+		*reg = RK3288_PULL_OFFSET;
+
+		/* correct the offset, as we're starting with the 2nd bank */
+		*reg -= 0x10;
+		*reg += bank->bank_num * ROCKCHIP_PULL_BANK_STRIDE;
+		*reg += ((pin_num / ROCKCHIP_PULL_PINS_PER_REG) * 4);
+
+		*bit = (pin_num % ROCKCHIP_PULL_PINS_PER_REG);
+		*bit *= ROCKCHIP_PULL_BITS_PER_PIN;
+	}
+}
+
+#define RK3288_DRV_PMU_OFFSET		0x70
+#define RK3288_DRV_GRF_OFFSET		0x1c0
+
+static void rk3288_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
+					int pin_num, struct regmap **regmap,
+					int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	/* The first 24 pins of the first bank are located in PMU */
+	if (bank->bank_num == 0) {
+		*regmap = priv->regmap_pmu;
+		*reg = RK3288_DRV_PMU_OFFSET;
+
+		*reg += ((pin_num / ROCKCHIP_DRV_PINS_PER_REG) * 4);
+		*bit = pin_num % ROCKCHIP_DRV_PINS_PER_REG;
+		*bit *= ROCKCHIP_DRV_BITS_PER_PIN;
+	} else {
+		*regmap = priv->regmap_base;
+		*reg = RK3288_DRV_GRF_OFFSET;
+
+		/* correct the offset, as we're starting with the 2nd bank */
+		*reg -= 0x10;
+		*reg += bank->bank_num * ROCKCHIP_DRV_BANK_STRIDE;
+		*reg += ((pin_num / ROCKCHIP_DRV_PINS_PER_REG) * 4);
+
+		*bit = (pin_num % ROCKCHIP_DRV_PINS_PER_REG);
+		*bit *= ROCKCHIP_DRV_BITS_PER_PIN;
+	}
+}
+
+static struct rockchip_pin_bank rk3288_pin_banks[] = {
+	PIN_BANK_IOMUX_FLAGS(0, 24, "gpio0", IOMUX_SOURCE_PMU,
+					     IOMUX_SOURCE_PMU,
+					     IOMUX_SOURCE_PMU,
+					     IOMUX_UNROUTED
+			    ),
+	PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1", IOMUX_UNROUTED,
+					     IOMUX_UNROUTED,
+					     IOMUX_UNROUTED,
+					     0
+			    ),
+	PIN_BANK_IOMUX_FLAGS(2, 32, "gpio2", 0, 0, 0, IOMUX_UNROUTED),
+	PIN_BANK_IOMUX_FLAGS(3, 32, "gpio3", 0, 0, 0, IOMUX_WIDTH_4BIT),
+	PIN_BANK_IOMUX_FLAGS(4, 32, "gpio4", IOMUX_WIDTH_4BIT,
+					     IOMUX_WIDTH_4BIT,
+					     0,
+					     0
+			    ),
+	PIN_BANK_IOMUX_FLAGS(5, 32, "gpio5", IOMUX_UNROUTED,
+					     0,
+					     0,
+					     IOMUX_UNROUTED
+			    ),
+	PIN_BANK_IOMUX_FLAGS(6, 32, "gpio6", 0, 0, 0, IOMUX_UNROUTED),
+	PIN_BANK_IOMUX_FLAGS(7, 32, "gpio7", 0,
+					     0,
+					     IOMUX_WIDTH_4BIT,
+					     IOMUX_UNROUTED
+			    ),
+	PIN_BANK(8, 16, "gpio8"),
+};
+
+static struct rockchip_pin_ctrl rk3288_pin_ctrl = {
+		.pin_banks		= rk3288_pin_banks,
+		.nr_banks		= ARRAY_SIZE(rk3288_pin_banks),
+		.label			= "RK3288-GPIO",
+		.type			= RK3288,
+		.grf_mux_offset		= 0x0,
+		.pmu_mux_offset		= 0x84,
+		.iomux_routes		= rk3288_mux_route_data,
+		.niomux_routes		= ARRAY_SIZE(rk3288_mux_route_data),
+		.pull_calc_reg		= rk3288_calc_pull_reg_and_bit,
+		.drv_calc_reg		= rk3288_calc_drv_reg_and_bit,
+};
+
+static const struct udevice_id rk3288_pinctrl_ids[] = {
+	{
+		.compatible = "rockchip,rk3288-pinctrl",
+		.data = (ulong)&rk3288_pin_ctrl
+	},
+	{ }
+};
+
+U_BOOT_DRIVER(pinctrl_rk3288) = {
+	.name		= "rockchip_rk3288_pinctrl",
+	.id		= UCLASS_PINCTRL,
+	.of_match	= rk3288_pinctrl_ids,
+	.priv_auto_alloc_size = sizeof(struct rockchip_pinctrl_priv),
+	.ops		= &rockchip_pinctrl_ops,
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	.bind		= dm_scan_fdt_dev,
+#endif
+	.probe		= rockchip_pinctrl_probe,
+};
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3328.c b/drivers/pinctrl/rockchip/pinctrl-rk3328.c
new file mode 100644
index 0000000000..f1b3d10dbe
--- /dev/null
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3328.c
@@ -0,0 +1,227 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <regmap.h>
+#include <syscon.h>
+
+#include "pinctrl-rockchip.h"
+
+static struct rockchip_mux_recalced_data rk3328_mux_recalced_data[] = {
+	{
+		.num = 2,
+		.pin = 12,
+		.reg = 0x24,
+		.bit = 8,
+		.mask = 0x3
+	}, {
+		.num = 2,
+		.pin = 15,
+		.reg = 0x28,
+		.bit = 0,
+		.mask = 0x7
+	}, {
+		.num = 2,
+		.pin = 23,
+		.reg = 0x30,
+		.bit = 14,
+		.mask = 0x3
+	},
+};
+
+static struct rockchip_mux_route_data rk3328_mux_route_data[] = {
+	{
+		/* uart2dbg_rxm0 */
+		.bank_num = 1,
+		.pin = 1,
+		.func = 2,
+		.route_offset = 0x50,
+		.route_val = BIT(16) | BIT(16 + 1),
+	}, {
+		/* uart2dbg_rxm1 */
+		.bank_num = 2,
+		.pin = 1,
+		.func = 1,
+		.route_offset = 0x50,
+		.route_val = BIT(16) | BIT(16 + 1) | BIT(0),
+	}, {
+		/* gmac-m1_rxd0 */
+		.bank_num = 1,
+		.pin = 11,
+		.func = 2,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 2) | BIT(2),
+	}, {
+		/* gmac-m1-optimized_rxd3 */
+		.bank_num = 1,
+		.pin = 14,
+		.func = 2,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 10) | BIT(10),
+	}, {
+		/* pdm_sdi0m0 */
+		.bank_num = 2,
+		.pin = 19,
+		.func = 2,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 3),
+	}, {
+		/* pdm_sdi0m1 */
+		.bank_num = 1,
+		.pin = 23,
+		.func = 3,
+		.route_offset = 0x50,
+		.route_val =  BIT(16 + 3) | BIT(3),
+	}, {
+		/* spi_rxdm2 */
+		.bank_num = 3,
+		.pin = 2,
+		.func = 4,
+		.route_offset = 0x50,
+		.route_val =  BIT(16 + 4) | BIT(16 + 5) | BIT(5),
+	}, {
+		/* i2s2_sdim0 */
+		.bank_num = 1,
+		.pin = 24,
+		.func = 1,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 6),
+	}, {
+		/* i2s2_sdim1 */
+		.bank_num = 3,
+		.pin = 2,
+		.func = 6,
+		.route_offset = 0x50,
+		.route_val =  BIT(16 + 6) | BIT(6),
+	}, {
+		/* card_iom1 */
+		.bank_num = 2,
+		.pin = 22,
+		.func = 3,
+		.route_offset = 0x50,
+		.route_val =  BIT(16 + 7) | BIT(7),
+	}, {
+		/* tsp_d5m1 */
+		.bank_num = 2,
+		.pin = 16,
+		.func = 3,
+		.route_offset = 0x50,
+		.route_val =  BIT(16 + 8) | BIT(8),
+	}, {
+		/* cif_data5m1 */
+		.bank_num = 2,
+		.pin = 16,
+		.func = 4,
+		.route_offset = 0x50,
+		.route_val =  BIT(16 + 9) | BIT(9),
+	},
+};
+
+#define RK3328_PULL_OFFSET		0x100
+
+static void rk3328_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
+					 int pin_num, struct regmap **regmap,
+					 int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	*regmap = priv->regmap_base;
+	*reg = RK3328_PULL_OFFSET;
+	*reg += bank->bank_num * ROCKCHIP_PULL_BANK_STRIDE;
+	*reg += ((pin_num / ROCKCHIP_PULL_PINS_PER_REG) * 4);
+
+	*bit = (pin_num % ROCKCHIP_PULL_PINS_PER_REG);
+	*bit *= ROCKCHIP_PULL_BITS_PER_PIN;
+}
+
+#define RK3328_DRV_GRF_OFFSET		0x200
+
+static void rk3328_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
+					int pin_num, struct regmap **regmap,
+					int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	*regmap = priv->regmap_base;
+	*reg = RK3328_DRV_GRF_OFFSET;
+	*reg += bank->bank_num * ROCKCHIP_DRV_BANK_STRIDE;
+	*reg += ((pin_num / ROCKCHIP_DRV_PINS_PER_REG) * 4);
+
+	*bit = (pin_num % ROCKCHIP_DRV_PINS_PER_REG);
+	*bit *= ROCKCHIP_DRV_BITS_PER_PIN;
+}
+
+#define RK3328_SCHMITT_BITS_PER_PIN		1
+#define RK3328_SCHMITT_PINS_PER_REG		16
+#define RK3328_SCHMITT_BANK_STRIDE		8
+#define RK3328_SCHMITT_GRF_OFFSET		0x380
+
+static int rk3328_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank,
+					   int pin_num,
+					   struct regmap **regmap,
+					   int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	*regmap = priv->regmap_base;
+	*reg = RK3328_SCHMITT_GRF_OFFSET;
+
+	*reg += bank->bank_num * RK3328_SCHMITT_BANK_STRIDE;
+	*reg += ((pin_num / RK3328_SCHMITT_PINS_PER_REG) * 4);
+	*bit = pin_num % RK3328_SCHMITT_PINS_PER_REG;
+
+	return 0;
+}
+
+static struct rockchip_pin_bank rk3328_pin_banks[] = {
+	PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", 0, 0, 0, 0),
+	PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1", 0, 0, 0, 0),
+	PIN_BANK_IOMUX_FLAGS(2, 32, "gpio2", 0,
+			     IOMUX_WIDTH_3BIT,
+			     IOMUX_WIDTH_3BIT,
+			     0),
+	PIN_BANK_IOMUX_FLAGS(3, 32, "gpio3",
+			     IOMUX_WIDTH_3BIT,
+			     IOMUX_WIDTH_3BIT,
+			     0,
+			     0),
+};
+
+static struct rockchip_pin_ctrl rk3328_pin_ctrl = {
+		.pin_banks		= rk3328_pin_banks,
+		.nr_banks		= ARRAY_SIZE(rk3328_pin_banks),
+		.label			= "RK3328-GPIO",
+		.type			= RK3288,
+		.grf_mux_offset		= 0x0,
+		.iomux_recalced		= rk3328_mux_recalced_data,
+		.niomux_recalced	= ARRAY_SIZE(rk3328_mux_recalced_data),
+		.iomux_routes		= rk3328_mux_route_data,
+		.niomux_routes		= ARRAY_SIZE(rk3328_mux_route_data),
+		.pull_calc_reg		= rk3328_calc_pull_reg_and_bit,
+		.drv_calc_reg		= rk3328_calc_drv_reg_and_bit,
+		.schmitt_calc_reg	= rk3328_calc_schmitt_reg_and_bit,
+};
+
+static const struct udevice_id rk3328_pinctrl_ids[] = {
+	{
+		.compatible = "rockchip,rk3328-pinctrl",
+		.data = (ulong)&rk3328_pin_ctrl
+	},
+	{ }
+};
+
+U_BOOT_DRIVER(pinctrl_rk3328) = {
+	.name		= "rockchip_rk3328_pinctrl",
+	.id		= UCLASS_PINCTRL,
+	.of_match	= rk3328_pinctrl_ids,
+	.priv_auto_alloc_size = sizeof(struct rockchip_pinctrl_priv),
+	.ops		= &rockchip_pinctrl_ops,
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	.bind		= dm_scan_fdt_dev,
+#endif
+	.probe		= rockchip_pinctrl_probe,
+};
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3368.c b/drivers/pinctrl/rockchip/pinctrl-rk3368.c
new file mode 100644
index 0000000000..f5cd6ff24e
--- /dev/null
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3368.c
@@ -0,0 +1,116 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <regmap.h>
+#include <syscon.h>
+
+#include "pinctrl-rockchip.h"
+
+#define RK3368_PULL_GRF_OFFSET		0x100
+#define RK3368_PULL_PMU_OFFSET		0x10
+
+static void rk3368_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
+					 int pin_num, struct regmap **regmap,
+					 int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	/* The first 32 pins of the first bank are located in PMU */
+	if (bank->bank_num == 0) {
+		*regmap = priv->regmap_pmu;
+		*reg = RK3368_PULL_PMU_OFFSET;
+
+		*reg += ((pin_num / ROCKCHIP_PULL_PINS_PER_REG) * 4);
+		*bit = pin_num % ROCKCHIP_PULL_PINS_PER_REG;
+		*bit *= ROCKCHIP_PULL_BITS_PER_PIN;
+	} else {
+		*regmap = priv->regmap_base;
+		*reg = RK3368_PULL_GRF_OFFSET;
+
+		/* correct the offset, as we're starting with the 2nd bank */
+		*reg -= 0x10;
+		*reg += bank->bank_num * ROCKCHIP_PULL_BANK_STRIDE;
+		*reg += ((pin_num / ROCKCHIP_PULL_PINS_PER_REG) * 4);
+
+		*bit = (pin_num % ROCKCHIP_PULL_PINS_PER_REG);
+		*bit *= ROCKCHIP_PULL_BITS_PER_PIN;
+	}
+}
+
+#define RK3368_DRV_PMU_OFFSET		0x20
+#define RK3368_DRV_GRF_OFFSET		0x200
+
+static void rk3368_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
+					int pin_num, struct regmap **regmap,
+					int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	/* The first 32 pins of the first bank are located in PMU */
+	if (bank->bank_num == 0) {
+		*regmap = priv->regmap_pmu;
+		*reg = RK3368_DRV_PMU_OFFSET;
+
+		*reg += ((pin_num / ROCKCHIP_DRV_PINS_PER_REG) * 4);
+		*bit = pin_num % ROCKCHIP_DRV_PINS_PER_REG;
+		*bit *= ROCKCHIP_DRV_BITS_PER_PIN;
+	} else {
+		*regmap = priv->regmap_base;
+		*reg = RK3368_DRV_GRF_OFFSET;
+
+		/* correct the offset, as we're starting with the 2nd bank */
+		*reg -= 0x10;
+		*reg += bank->bank_num * ROCKCHIP_DRV_BANK_STRIDE;
+		*reg += ((pin_num / ROCKCHIP_DRV_PINS_PER_REG) * 4);
+
+		*bit = (pin_num % ROCKCHIP_DRV_PINS_PER_REG);
+		*bit *= ROCKCHIP_DRV_BITS_PER_PIN;
+	}
+}
+
+static struct rockchip_pin_bank rk3368_pin_banks[] = {
+	PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", IOMUX_SOURCE_PMU,
+					     IOMUX_SOURCE_PMU,
+					     IOMUX_SOURCE_PMU,
+					     IOMUX_SOURCE_PMU
+			    ),
+	PIN_BANK(1, 32, "gpio1"),
+	PIN_BANK(2, 32, "gpio2"),
+	PIN_BANK(3, 32, "gpio3"),
+};
+
+static struct rockchip_pin_ctrl rk3368_pin_ctrl = {
+		.pin_banks		= rk3368_pin_banks,
+		.nr_banks		= ARRAY_SIZE(rk3368_pin_banks),
+		.label			= "RK3368-GPIO",
+		.type			= RK3368,
+		.grf_mux_offset		= 0x0,
+		.pmu_mux_offset		= 0x0,
+		.pull_calc_reg		= rk3368_calc_pull_reg_and_bit,
+		.drv_calc_reg		= rk3368_calc_drv_reg_and_bit,
+};
+
+static const struct udevice_id rk3368_pinctrl_ids[] = {
+	{
+		.compatible = "rockchip,rk3368-pinctrl",
+		.data = (ulong)&rk3368_pin_ctrl
+	},
+	{ }
+};
+
+U_BOOT_DRIVER(pinctrl_rk3368) = {
+	.name		= "rockchip_rk3368_pinctrl",
+	.id		= UCLASS_PINCTRL,
+	.of_match	= rk3368_pinctrl_ids,
+	.priv_auto_alloc_size = sizeof(struct rockchip_pinctrl_priv),
+	.ops		= &rockchip_pinctrl_ops,
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	.bind		= dm_scan_fdt_dev,
+#endif
+	.probe		= rockchip_pinctrl_probe,
+};
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3399.c b/drivers/pinctrl/rockchip/pinctrl-rk3399.c
new file mode 100644
index 0000000000..c5aab647a5
--- /dev/null
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3399.c
@@ -0,0 +1,193 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <regmap.h>
+#include <syscon.h>
+
+#include "pinctrl-rockchip.h"
+
+static struct rockchip_mux_route_data rk3399_mux_route_data[] = {
+	{
+		/* uart2dbga_rx */
+		.bank_num = 4,
+		.pin = 8,
+		.func = 2,
+		.route_offset = 0xe21c,
+		.route_val = BIT(16 + 10) | BIT(16 + 11),
+	}, {
+		/* uart2dbgb_rx */
+		.bank_num = 4,
+		.pin = 16,
+		.func = 2,
+		.route_offset = 0xe21c,
+		.route_val = BIT(16 + 10) | BIT(16 + 11) | BIT(10),
+	}, {
+		/* uart2dbgc_rx */
+		.bank_num = 4,
+		.pin = 19,
+		.func = 1,
+		.route_offset = 0xe21c,
+		.route_val = BIT(16 + 10) | BIT(16 + 11) | BIT(11),
+	}, {
+		/* pcie_clkreqn */
+		.bank_num = 2,
+		.pin = 26,
+		.func = 2,
+		.route_offset = 0xe21c,
+		.route_val = BIT(16 + 14),
+	}, {
+		/* pcie_clkreqnb */
+		.bank_num = 4,
+		.pin = 24,
+		.func = 1,
+		.route_offset = 0xe21c,
+		.route_val = BIT(16 + 14) | BIT(14),
+	},
+};
+
+#define RK3399_PULL_GRF_OFFSET		0xe040
+#define RK3399_PULL_PMU_OFFSET		0x40
+
+static void rk3399_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
+					 int pin_num, struct regmap **regmap,
+					 int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	/* The bank0:16 and bank1:32 pins are located in PMU */
+	if (bank->bank_num == 0 || bank->bank_num == 1) {
+		*regmap = priv->regmap_pmu;
+		*reg = RK3399_PULL_PMU_OFFSET;
+
+		*reg += bank->bank_num * ROCKCHIP_PULL_BANK_STRIDE;
+
+		*reg += ((pin_num / ROCKCHIP_PULL_PINS_PER_REG) * 4);
+		*bit = pin_num % ROCKCHIP_PULL_PINS_PER_REG;
+		*bit *= ROCKCHIP_PULL_BITS_PER_PIN;
+	} else {
+		*regmap = priv->regmap_base;
+		*reg = RK3399_PULL_GRF_OFFSET;
+
+		/* correct the offset, as we're starting with the 3rd bank */
+		*reg -= 0x20;
+		*reg += bank->bank_num * ROCKCHIP_PULL_BANK_STRIDE;
+		*reg += ((pin_num / ROCKCHIP_PULL_PINS_PER_REG) * 4);
+
+		*bit = (pin_num % ROCKCHIP_PULL_PINS_PER_REG);
+		*bit *= ROCKCHIP_PULL_BITS_PER_PIN;
+	}
+}
+
+static void rk3399_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
+					int pin_num, struct regmap **regmap,
+					int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	int drv_num = (pin_num / 8);
+
+	/*  The bank0:16 and bank1:32 pins are located in PMU */
+	if (bank->bank_num == 0 || bank->bank_num == 1)
+		*regmap = priv->regmap_pmu;
+	else
+		*regmap = priv->regmap_base;
+
+	*reg = bank->drv[drv_num].offset;
+	if (bank->drv[drv_num].drv_type == DRV_TYPE_IO_1V8_3V0_AUTO ||
+	    bank->drv[drv_num].drv_type == DRV_TYPE_IO_3V3_ONLY)
+		*bit = (pin_num % 8) * 3;
+	else
+		*bit = (pin_num % 8) * 2;
+}
+
+static struct rockchip_pin_bank rk3399_pin_banks[] = {
+	PIN_BANK_IOMUX_FLAGS_DRV_FLAGS_OFFSET_PULL_FLAGS(0, 32, "gpio0",
+							 IOMUX_SOURCE_PMU,
+							 IOMUX_SOURCE_PMU,
+							 IOMUX_SOURCE_PMU,
+							 IOMUX_SOURCE_PMU,
+							 DRV_TYPE_IO_1V8_ONLY,
+							 DRV_TYPE_IO_1V8_ONLY,
+							 DRV_TYPE_IO_DEFAULT,
+							 DRV_TYPE_IO_DEFAULT,
+							 0x80,
+							 0x88,
+							 -1,
+							 -1,
+							 PULL_TYPE_IO_1V8_ONLY,
+							 PULL_TYPE_IO_1V8_ONLY,
+							 PULL_TYPE_IO_DEFAULT,
+							 PULL_TYPE_IO_DEFAULT
+							),
+	PIN_BANK_IOMUX_DRV_FLAGS_OFFSET(1, 32, "gpio1", IOMUX_SOURCE_PMU,
+					IOMUX_SOURCE_PMU,
+					IOMUX_SOURCE_PMU,
+					IOMUX_SOURCE_PMU,
+					DRV_TYPE_IO_1V8_OR_3V0,
+					DRV_TYPE_IO_1V8_OR_3V0,
+					DRV_TYPE_IO_1V8_OR_3V0,
+					DRV_TYPE_IO_1V8_OR_3V0,
+					0xa0,
+					0xa8,
+					0xb0,
+					0xb8
+					),
+	PIN_BANK_DRV_FLAGS_PULL_FLAGS(2, 32, "gpio2", DRV_TYPE_IO_1V8_OR_3V0,
+				      DRV_TYPE_IO_1V8_OR_3V0,
+				      DRV_TYPE_IO_1V8_ONLY,
+				      DRV_TYPE_IO_1V8_ONLY,
+				      PULL_TYPE_IO_DEFAULT,
+				      PULL_TYPE_IO_DEFAULT,
+				      PULL_TYPE_IO_1V8_ONLY,
+				      PULL_TYPE_IO_1V8_ONLY
+				      ),
+	PIN_BANK_DRV_FLAGS(3, 32, "gpio3", DRV_TYPE_IO_3V3_ONLY,
+			   DRV_TYPE_IO_3V3_ONLY,
+			   DRV_TYPE_IO_3V3_ONLY,
+			   DRV_TYPE_IO_1V8_OR_3V0
+			   ),
+	PIN_BANK_DRV_FLAGS(4, 32, "gpio4", DRV_TYPE_IO_1V8_OR_3V0,
+			   DRV_TYPE_IO_1V8_3V0_AUTO,
+			   DRV_TYPE_IO_1V8_OR_3V0,
+			   DRV_TYPE_IO_1V8_OR_3V0
+			   ),
+};
+
+static struct rockchip_pin_ctrl rk3399_pin_ctrl = {
+		.pin_banks		= rk3399_pin_banks,
+		.nr_banks		= ARRAY_SIZE(rk3399_pin_banks),
+		.label			= "RK3399-GPIO",
+		.type			= RK3399,
+		.grf_mux_offset		= 0xe000,
+		.pmu_mux_offset		= 0x0,
+		.grf_drv_offset		= 0xe100,
+		.pmu_drv_offset		= 0x80,
+		.iomux_routes		= rk3399_mux_route_data,
+		.niomux_routes		= ARRAY_SIZE(rk3399_mux_route_data),
+		.pull_calc_reg		= rk3399_calc_pull_reg_and_bit,
+		.drv_calc_reg		= rk3399_calc_drv_reg_and_bit,
+};
+
+static const struct udevice_id rk3399_pinctrl_ids[] = {
+	{
+		.compatible = "rockchip,rk3399-pinctrl",
+		.data = (ulong)&rk3399_pin_ctrl
+	},
+	{ }
+};
+
+U_BOOT_DRIVER(pinctrl_rk3399) = {
+	.name		= "rockchip_rk3399_pinctrl",
+	.id		= UCLASS_PINCTRL,
+	.of_match	= rk3399_pinctrl_ids,
+	.priv_auto_alloc_size = sizeof(struct rockchip_pinctrl_priv),
+	.ops		= &rockchip_pinctrl_ops,
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	.bind		= dm_scan_fdt_dev,
+#endif
+	.probe		= rockchip_pinctrl_probe,
+};
diff --git a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
new file mode 100644
index 0000000000..226c506fc8
--- /dev/null
+++ b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
@@ -0,0 +1,797 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <regmap.h>
+#include <syscon.h>
+#include <fdtdec.h>
+
+#include "pinctrl-rockchip.h"
+
+#define MAX_ROCKCHIP_PINS_ENTRIES	30
+#define MAX_ROCKCHIP_GPIO_PER_BANK      32
+#define RK_FUNC_GPIO                    0
+
+static int rockchip_verify_config(struct udevice *dev, u32 bank, u32 pin)
+{
+	struct rockchip_pinctrl_priv *priv = dev_get_priv(dev);
+	struct rockchip_pin_ctrl *ctrl = priv->ctrl;
+
+	if (bank >= ctrl->nr_banks) {
+		debug("pin conf bank %d >= nbanks %d\n", bank, ctrl->nr_banks);
+		return -EINVAL;
+	}
+
+	if (pin >= MAX_ROCKCHIP_GPIO_PER_BANK) {
+		debug("pin conf pin %d >= %d\n", pin,
+		      MAX_ROCKCHIP_GPIO_PER_BANK);
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static void rockchip_get_recalced_mux(struct rockchip_pin_bank *bank, int pin,
+				      int *reg, u8 *bit, int *mask)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	struct rockchip_pin_ctrl *ctrl = priv->ctrl;
+	struct rockchip_mux_recalced_data *data;
+	int i;
+
+	for (i = 0; i < ctrl->niomux_recalced; i++) {
+		data = &ctrl->iomux_recalced[i];
+		if (data->num == bank->bank_num &&
+		    data->pin == pin)
+			break;
+	}
+
+	if (i >= ctrl->niomux_recalced)
+		return;
+
+	*reg = data->reg;
+	*mask = data->mask;
+	*bit = data->bit;
+}
+
+static bool rockchip_get_mux_route(struct rockchip_pin_bank *bank, int pin,
+				   int mux, u32 *reg, u32 *value)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	struct rockchip_pin_ctrl *ctrl = priv->ctrl;
+	struct rockchip_mux_route_data *data;
+	int i;
+
+	for (i = 0; i < ctrl->niomux_routes; i++) {
+		data = &ctrl->iomux_routes[i];
+		if (data->bank_num == bank->bank_num &&
+		    data->pin == pin && data->func == mux)
+			break;
+	}
+
+	if (i >= ctrl->niomux_routes)
+		return false;
+
+	*reg = data->route_offset;
+	*value = data->route_val;
+
+	return true;
+}
+
+static int rockchip_get_mux_data(int mux_type, int pin, u8 *bit, int *mask)
+{
+	int offset = 0;
+
+	if (mux_type & IOMUX_WIDTH_4BIT) {
+		if ((pin % 8) >= 4)
+			offset = 0x4;
+		*bit = (pin % 4) * 4;
+		*mask = 0xf;
+	} else if (mux_type & IOMUX_WIDTH_3BIT) {
+		/*
+		 * pin0 ~ pin4 are at first register, and
+		 * pin5 ~ pin7 are at second register.
+		 */
+		if ((pin % 8) >= 5)
+			offset = 0x4;
+		*bit = (pin % 8 % 5) * 3;
+		*mask = 0x7;
+	} else {
+		*bit = (pin % 8) * 2;
+		*mask = 0x3;
+	}
+
+	return offset;
+}
+
+static int rockchip_get_mux(struct rockchip_pin_bank *bank, int pin)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	int iomux_num = (pin / 8);
+	struct regmap *regmap;
+	unsigned int val;
+	int reg, ret, mask, mux_type;
+	u8 bit;
+
+	if (iomux_num > 3)
+		return -EINVAL;
+
+	if (bank->iomux[iomux_num].type & IOMUX_UNROUTED) {
+		debug("pin %d is unrouted\n", pin);
+		return 0;
+	}
+
+	if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY)
+		return RK_FUNC_GPIO;
+
+	regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
+				? priv->regmap_pmu : priv->regmap_base;
+
+	/* get basic quadrupel of mux registers and the correct reg inside */
+	mux_type = bank->iomux[iomux_num].type;
+	reg = bank->iomux[iomux_num].offset;
+	reg += rockchip_get_mux_data(mux_type, pin, &bit, &mask);
+
+	if (bank->recalced_mask & BIT(pin))
+		rockchip_get_recalced_mux(bank, pin, &reg, &bit, &mask);
+
+	ret = regmap_read(regmap, reg, &val);
+	if (ret)
+		return ret;
+
+	return ((val >> bit) & mask);
+}
+
+static int rockchip_pinctrl_get_gpio_mux(struct udevice *dev, int banknum,
+					 int index)
+{	struct rockchip_pinctrl_priv *priv = dev_get_priv(dev);
+	struct rockchip_pin_ctrl *ctrl = priv->ctrl;
+
+	return rockchip_get_mux(&ctrl->pin_banks[banknum], index);
+}
+
+static int rockchip_verify_mux(struct rockchip_pin_bank *bank,
+			       int pin, int mux)
+{
+	int iomux_num = (pin / 8);
+
+	if (iomux_num > 3)
+		return -EINVAL;
+
+	if (bank->iomux[iomux_num].type & IOMUX_UNROUTED) {
+		debug("pin %d is unrouted\n", pin);
+		return -ENOTSUPP;
+	}
+
+	if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY) {
+		if (mux != IOMUX_GPIO_ONLY) {
+			debug("pin %d only supports a gpio mux\n", pin);
+			return -ENOTSUPP;
+		}
+	}
+
+	return 0;
+}
+
+/*
+ * Set a new mux function for a pin.
+ *
+ * The register is divided into the upper and lower 16 bit. When changing
+ * a value, the previous register value is not read and changed. Instead
+ * it seems the changed bits are marked in the upper 16 bit, while the
+ * changed value gets set in the same offset in the lower 16 bit.
+ * All pin settings seem to be 2 bit wide in both the upper and lower
+ * parts.
+ * @bank: pin bank to change
+ * @pin: pin to change
+ * @mux: new mux function to set
+ */
+static int rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	int iomux_num = (pin / 8);
+	struct regmap *regmap;
+	int reg, ret, mask, mux_type;
+	u8 bit;
+	u32 data, route_reg, route_val;
+
+	ret = rockchip_verify_mux(bank, pin, mux);
+	if (ret < 0)
+		return ret == -ENOTSUPP ? 0 : ret;
+
+	if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY)
+		return 0;
+
+	debug("setting mux of GPIO%d-%d to %d\n", bank->bank_num, pin, mux);
+
+	regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
+				? priv->regmap_pmu : priv->regmap_base;
+
+	/* get basic quadrupel of mux registers and the correct reg inside */
+	mux_type = bank->iomux[iomux_num].type;
+	reg = bank->iomux[iomux_num].offset;
+	reg += rockchip_get_mux_data(mux_type, pin, &bit, &mask);
+
+	if (bank->recalced_mask & BIT(pin))
+		rockchip_get_recalced_mux(bank, pin, &reg, &bit, &mask);
+
+	if (bank->route_mask & BIT(pin)) {
+		if (rockchip_get_mux_route(bank, pin, mux, &route_reg,
+					   &route_val)) {
+			ret = regmap_write(regmap, route_reg, route_val);
+			if (ret)
+				return ret;
+		}
+	}
+
+	data = (mask << (bit + 16));
+	data |= (mux & mask) << bit;
+	ret = regmap_write(regmap, reg, data);
+
+	return ret;
+}
+
+static int rockchip_perpin_drv_list[DRV_TYPE_MAX][8] = {
+	{ 2, 4, 8, 12, -1, -1, -1, -1 },
+	{ 3, 6, 9, 12, -1, -1, -1, -1 },
+	{ 5, 10, 15, 20, -1, -1, -1, -1 },
+	{ 4, 6, 8, 10, 12, 14, 16, 18 },
+	{ 4, 7, 10, 13, 16, 19, 22, 26 }
+};
+
+static int rockchip_set_drive_perpin(struct rockchip_pin_bank *bank,
+				     int pin_num, int strength)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	struct rockchip_pin_ctrl *ctrl = priv->ctrl;
+	struct regmap *regmap;
+	int reg, ret, i;
+	u32 data, rmask_bits, temp;
+	u8 bit;
+	int drv_type = bank->drv[pin_num / 8].drv_type;
+
+	debug("setting drive of GPIO%d-%d to %d\n", bank->bank_num,
+	      pin_num, strength);
+
+	ctrl->drv_calc_reg(bank, pin_num, &regmap, &reg, &bit);
+
+	ret = -EINVAL;
+	for (i = 0; i < ARRAY_SIZE(rockchip_perpin_drv_list[drv_type]); i++) {
+		if (rockchip_perpin_drv_list[drv_type][i] == strength) {
+			ret = i;
+			break;
+		} else if (rockchip_perpin_drv_list[drv_type][i] < 0) {
+			ret = rockchip_perpin_drv_list[drv_type][i];
+			break;
+		}
+	}
+
+	if (ret < 0) {
+		debug("unsupported driver strength %d\n", strength);
+		return ret;
+	}
+
+	switch (drv_type) {
+	case DRV_TYPE_IO_1V8_3V0_AUTO:
+	case DRV_TYPE_IO_3V3_ONLY:
+		rmask_bits = ROCKCHIP_DRV_3BITS_PER_PIN;
+		switch (bit) {
+		case 0 ... 12:
+			/* regular case, nothing to do */
+			break;
+		case 15:
+			/*
+			 * drive-strength offset is special, as it is spread
+			 * over 2 registers, the bit data[15] contains bit 0
+			 * of the value while temp[1:0] contains bits 2 and 1
+			 */
+			data = (ret & 0x1) << 15;
+			temp = (ret >> 0x1) & 0x3;
+
+			data |= BIT(31);
+			ret = regmap_write(regmap, reg, data);
+			if (ret)
+				return ret;
+
+			temp |= (0x3 << 16);
+			reg += 0x4;
+			ret = regmap_write(regmap, reg, temp);
+
+			return ret;
+		case 18 ... 21:
+			/* setting fully enclosed in the second register */
+			reg += 4;
+			bit -= 16;
+			break;
+		default:
+			debug("unsupported bit: %d for pinctrl drive type: %d\n",
+			      bit, drv_type);
+			return -EINVAL;
+		}
+		break;
+	case DRV_TYPE_IO_DEFAULT:
+	case DRV_TYPE_IO_1V8_OR_3V0:
+	case DRV_TYPE_IO_1V8_ONLY:
+		rmask_bits = ROCKCHIP_DRV_BITS_PER_PIN;
+		break;
+	default:
+		debug("unsupported pinctrl drive type: %d\n",
+		      drv_type);
+		return -EINVAL;
+	}
+
+	/* enable the write to the equivalent lower bits */
+	data = ((1 << rmask_bits) - 1) << (bit + 16);
+	data |= (ret << bit);
+
+	ret = regmap_write(regmap, reg, data);
+	return ret;
+}
+
+static int rockchip_pull_list[PULL_TYPE_MAX][4] = {
+	{
+		PIN_CONFIG_BIAS_DISABLE,
+		PIN_CONFIG_BIAS_PULL_UP,
+		PIN_CONFIG_BIAS_PULL_DOWN,
+		PIN_CONFIG_BIAS_BUS_HOLD
+	},
+	{
+		PIN_CONFIG_BIAS_DISABLE,
+		PIN_CONFIG_BIAS_PULL_DOWN,
+		PIN_CONFIG_BIAS_DISABLE,
+		PIN_CONFIG_BIAS_PULL_UP
+	},
+};
+
+static int rockchip_set_pull(struct rockchip_pin_bank *bank,
+			     int pin_num, int pull)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	struct rockchip_pin_ctrl *ctrl = priv->ctrl;
+	struct regmap *regmap;
+	int reg, ret, i, pull_type;
+	u8 bit;
+	u32 data;
+
+	debug("setting pull of GPIO%d-%d to %d\n", bank->bank_num,
+	      pin_num, pull);
+
+	ctrl->pull_calc_reg(bank, pin_num, &regmap, &reg, &bit);
+
+	switch (ctrl->type) {
+	case RK3036:
+	case RK3128:
+		data = BIT(bit + 16);
+		if (pull == PIN_CONFIG_BIAS_DISABLE)
+			data |= BIT(bit);
+		ret = regmap_write(regmap, reg, data);
+		break;
+	case RV1108:
+	case RK3188:
+	case RK3288:
+	case RK3368:
+	case RK3399:
+		pull_type = bank->pull_type[pin_num / 8];
+		ret = -EINVAL;
+		for (i = 0; i < ARRAY_SIZE(rockchip_pull_list[pull_type]);
+			i++) {
+			if (rockchip_pull_list[pull_type][i] == pull) {
+				ret = i;
+				break;
+			}
+		}
+
+		if (ret < 0) {
+			debug("unsupported pull setting %d\n", pull);
+			return ret;
+		}
+
+		/* enable the write to the equivalent lower bits */
+		data = ((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << (bit + 16);
+		data |= (ret << bit);
+
+		ret = regmap_write(regmap, reg, data);
+		break;
+	default:
+		debug("unsupported pinctrl type\n");
+		return -EINVAL;
+	}
+
+	return ret;
+}
+
+static int rockchip_set_schmitt(struct rockchip_pin_bank *bank,
+				int pin_num, int enable)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	struct rockchip_pin_ctrl *ctrl = priv->ctrl;
+	struct regmap *regmap;
+	int reg, ret;
+	u8 bit;
+	u32 data;
+
+	debug("setting input schmitt of GPIO%d-%d to %d\n", bank->bank_num,
+	      pin_num, enable);
+
+	ret = ctrl->schmitt_calc_reg(bank, pin_num, &regmap, &reg, &bit);
+	if (ret)
+		return ret;
+
+	/* enable the write to the equivalent lower bits */
+	data = BIT(bit + 16) | (enable << bit);
+
+	return regmap_write(regmap, reg, data);
+}
+
+/*
+ * Pinconf_ops handling
+ */
+static bool rockchip_pinconf_pull_valid(struct rockchip_pin_ctrl *ctrl,
+					unsigned int pull)
+{
+	switch (ctrl->type) {
+	case RK3036:
+	case RK3128:
+		return (pull == PIN_CONFIG_BIAS_PULL_PIN_DEFAULT ||
+			pull == PIN_CONFIG_BIAS_DISABLE);
+	case RV1108:
+	case RK3188:
+	case RK3288:
+	case RK3368:
+	case RK3399:
+		return (pull != PIN_CONFIG_BIAS_PULL_PIN_DEFAULT);
+	}
+
+	return false;
+}
+
+/* set the pin config settings for a specified pin */
+static int rockchip_pinconf_set(struct rockchip_pin_bank *bank,
+				u32 pin, u32 param, u32 arg)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	struct rockchip_pin_ctrl *ctrl = priv->ctrl;
+	int rc;
+
+	switch (param) {
+	case PIN_CONFIG_BIAS_DISABLE:
+		rc =  rockchip_set_pull(bank, pin, param);
+		if (rc)
+			return rc;
+		break;
+
+	case PIN_CONFIG_BIAS_PULL_UP:
+	case PIN_CONFIG_BIAS_PULL_DOWN:
+	case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT:
+	case PIN_CONFIG_BIAS_BUS_HOLD:
+		if (!rockchip_pinconf_pull_valid(ctrl, param))
+			return -ENOTSUPP;
+
+		if (!arg)
+			return -EINVAL;
+
+		rc = rockchip_set_pull(bank, pin, param);
+		if (rc)
+			return rc;
+		break;
+
+	case PIN_CONFIG_DRIVE_STRENGTH:
+		if (!ctrl->drv_calc_reg)
+			return -ENOTSUPP;
+
+		rc = rockchip_set_drive_perpin(bank, pin, arg);
+		if (rc < 0)
+			return rc;
+		break;
+
+	case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
+		if (!ctrl->schmitt_calc_reg)
+			return -ENOTSUPP;
+
+		rc = rockchip_set_schmitt(bank, pin, arg);
+		if (rc < 0)
+			return rc;
+		break;
+
+	default:
+		break;
+	}
+
+	return 0;
+}
+
+static const struct pinconf_param rockchip_conf_params[] = {
+	{ "bias-disable", PIN_CONFIG_BIAS_DISABLE, 0 },
+	{ "bias-bus-hold", PIN_CONFIG_BIAS_BUS_HOLD, 0 },
+	{ "bias-pull-up", PIN_CONFIG_BIAS_PULL_UP, 1 },
+	{ "bias-pull-down", PIN_CONFIG_BIAS_PULL_DOWN, 1 },
+	{ "drive-strength", PIN_CONFIG_DRIVE_STRENGTH, 0 },
+	{ "input-enable", PIN_CONFIG_INPUT_ENABLE, 1 },
+	{ "input-disable", PIN_CONFIG_INPUT_ENABLE, 0 },
+	{ "input-schmitt-disable", PIN_CONFIG_INPUT_SCHMITT_ENABLE, 0 },
+	{ "input-schmitt-enable", PIN_CONFIG_INPUT_SCHMITT_ENABLE, 1 },
+};
+
+static int rockchip_pinconf_prop_name_to_param(const char *property,
+					       u32 *default_value)
+{
+	const struct pinconf_param *p, *end;
+
+	p = rockchip_conf_params;
+	end = p + sizeof(rockchip_conf_params) / sizeof(struct pinconf_param);
+
+	/* See if this pctldev supports this parameter */
+	for (; p < end; p++) {
+		if (!strcmp(property, p->property)) {
+			*default_value = p->default_value;
+			return p->param;
+		}
+	}
+
+	*default_value = 0;
+	return -EPERM;
+}
+
+static int rockchip_pinctrl_set_state(struct udevice *dev,
+				      struct udevice *config)
+{
+	struct rockchip_pinctrl_priv *priv = dev_get_priv(dev);
+	struct rockchip_pin_ctrl *ctrl = priv->ctrl;
+	u32 cells[MAX_ROCKCHIP_PINS_ENTRIES * 4];
+	u32 bank, pin, mux, conf, arg, default_val;
+	int ret, count, i;
+	const char *prop_name;
+	const void *value;
+	int prop_len, param;
+	const u32 *data;
+	ofnode node;
+#ifdef CONFIG_OF_LIVE
+	const struct device_node *np;
+	struct property *pp;
+#else
+	int property_offset, pcfg_node;
+	const void *blob = gd->fdt_blob;
+#endif
+	data = dev_read_prop(config, "rockchip,pins", &count);
+	if (count < 0) {
+		debug("%s: bad array size %d\n", __func__, count);
+		return -EINVAL;
+	}
+
+	count /= sizeof(u32);
+	if (count > MAX_ROCKCHIP_PINS_ENTRIES * 4) {
+		debug("%s: unsupported pins array count %d\n",
+		      __func__, count);
+		return -EINVAL;
+	}
+
+	for (i = 0; i < count; i++)
+		cells[i] = fdt32_to_cpu(data[i]);
+
+	for (i = 0; i < (count >> 2); i++) {
+		bank = cells[4 * i + 0];
+		pin = cells[4 * i + 1];
+		mux = cells[4 * i + 2];
+		conf = cells[4 * i + 3];
+
+		ret = rockchip_verify_config(dev, bank, pin);
+		if (ret)
+			return ret;
+
+		ret = rockchip_set_mux(&ctrl->pin_banks[bank], pin, mux);
+		if (ret)
+			return ret;
+
+		node = ofnode_get_by_phandle(conf);
+		if (!ofnode_valid(node))
+			return -ENODEV;
+#ifdef CONFIG_OF_LIVE
+		np = ofnode_to_np(node);
+		for (pp = np->properties; pp; pp = pp->next) {
+			prop_name = pp->name;
+			prop_len = pp->length;
+			value = pp->value;
+#else
+		pcfg_node = ofnode_to_offset(node);
+		fdt_for_each_property_offset(property_offset, blob, pcfg_node) {
+			value = fdt_getprop_by_offset(blob, property_offset,
+						      &prop_name, &prop_len);
+			if (!value)
+				return -ENOENT;
+#endif
+			param = rockchip_pinconf_prop_name_to_param(prop_name,
+								    &default_val);
+			if (param < 0)
+				break;
+
+			if (prop_len >= sizeof(fdt32_t))
+				arg = fdt32_to_cpu(*(fdt32_t *)value);
+			else
+				arg = default_val;
+
+			ret = rockchip_pinconf_set(&ctrl->pin_banks[bank], pin,
+						   param, arg);
+			if (ret) {
+				debug("%s: rockchip_pinconf_set fail: %d\n",
+				      __func__, ret);
+				return ret;
+			}
+		}
+	}
+
+	return 0;
+}
+
+static int rockchip_pinctrl_get_pins_count(struct udevice *dev)
+{
+	struct rockchip_pinctrl_priv *priv = dev_get_priv(dev);
+	struct rockchip_pin_ctrl *ctrl = priv->ctrl;
+
+	return ctrl->nr_pins;
+}
+
+const struct pinctrl_ops rockchip_pinctrl_ops = {
+	.get_pins_count			= rockchip_pinctrl_get_pins_count,
+	.set_state			= rockchip_pinctrl_set_state,
+	.get_gpio_mux			= rockchip_pinctrl_get_gpio_mux,
+};
+
+/* retrieve the soc specific data */
+static struct rockchip_pin_ctrl *rockchip_pinctrl_get_soc_data(struct udevice *dev)
+{
+	struct rockchip_pinctrl_priv *priv = dev_get_priv(dev);
+	struct rockchip_pin_ctrl *ctrl =
+			(struct rockchip_pin_ctrl *)dev_get_driver_data(dev);
+	struct rockchip_pin_bank *bank;
+	int grf_offs, pmu_offs, drv_grf_offs, drv_pmu_offs, i, j;
+
+	grf_offs = ctrl->grf_mux_offset;
+	pmu_offs = ctrl->pmu_mux_offset;
+	drv_pmu_offs = ctrl->pmu_drv_offset;
+	drv_grf_offs = ctrl->grf_drv_offset;
+	bank = ctrl->pin_banks;
+
+	for (i = 0; i < ctrl->nr_banks; ++i, ++bank) {
+		int bank_pins = 0;
+
+		bank->priv = priv;
+		bank->pin_base = ctrl->nr_pins;
+		ctrl->nr_pins += bank->nr_pins;
+
+		/* calculate iomux and drv offsets */
+		for (j = 0; j < 4; j++) {
+			struct rockchip_iomux *iom = &bank->iomux[j];
+			struct rockchip_drv *drv = &bank->drv[j];
+			int inc;
+
+			if (bank_pins >= bank->nr_pins)
+				break;
+
+			/* preset iomux offset value, set new start value */
+			if (iom->offset >= 0) {
+				if (iom->type & IOMUX_SOURCE_PMU)
+					pmu_offs = iom->offset;
+				else
+					grf_offs = iom->offset;
+			} else { /* set current iomux offset */
+				iom->offset = (iom->type & IOMUX_SOURCE_PMU) ?
+							pmu_offs : grf_offs;
+			}
+
+			/* preset drv offset value, set new start value */
+			if (drv->offset >= 0) {
+				if (iom->type & IOMUX_SOURCE_PMU)
+					drv_pmu_offs = drv->offset;
+				else
+					drv_grf_offs = drv->offset;
+			} else { /* set current drv offset */
+				drv->offset = (iom->type & IOMUX_SOURCE_PMU) ?
+						drv_pmu_offs : drv_grf_offs;
+			}
+
+			debug("bank %d, iomux %d has iom_offset 0x%x drv_offset 0x%x\n",
+			      i, j, iom->offset, drv->offset);
+
+			/*
+			 * Increase offset according to iomux width.
+			 * 4bit iomux'es are spread over two registers.
+			 */
+			inc = (iom->type & (IOMUX_WIDTH_4BIT |
+					    IOMUX_WIDTH_3BIT)) ? 8 : 4;
+			if (iom->type & IOMUX_SOURCE_PMU)
+				pmu_offs += inc;
+			else
+				grf_offs += inc;
+
+			/*
+			 * Increase offset according to drv width.
+			 * 3bit drive-strenth'es are spread over two registers.
+			 */
+			if ((drv->drv_type == DRV_TYPE_IO_1V8_3V0_AUTO) ||
+			    (drv->drv_type == DRV_TYPE_IO_3V3_ONLY))
+				inc = 8;
+			else
+				inc = 4;
+
+			if (iom->type & IOMUX_SOURCE_PMU)
+				drv_pmu_offs += inc;
+			else
+				drv_grf_offs += inc;
+
+			bank_pins += 8;
+		}
+
+		/* calculate the per-bank recalced_mask */
+		for (j = 0; j < ctrl->niomux_recalced; j++) {
+			int pin = 0;
+
+			if (ctrl->iomux_recalced[j].num == bank->bank_num) {
+				pin = ctrl->iomux_recalced[j].pin;
+				bank->recalced_mask |= BIT(pin);
+			}
+		}
+
+		/* calculate the per-bank route_mask */
+		for (j = 0; j < ctrl->niomux_routes; j++) {
+			int pin = 0;
+
+			if (ctrl->iomux_routes[j].bank_num == bank->bank_num) {
+				pin = ctrl->iomux_routes[j].pin;
+				bank->route_mask |= BIT(pin);
+			}
+		}
+	}
+
+	return ctrl;
+}
+
+int rockchip_pinctrl_probe(struct udevice *dev)
+{
+	struct rockchip_pinctrl_priv *priv = dev_get_priv(dev);
+	struct rockchip_pin_ctrl *ctrl;
+	struct udevice *syscon;
+	struct regmap *regmap;
+	int ret = 0;
+
+	/* get rockchip grf syscon phandle */
+	ret = uclass_get_device_by_phandle(UCLASS_SYSCON, dev, "rockchip,grf",
+					   &syscon);
+	if (ret) {
+		debug("unable to find rockchip,grf syscon device (%d)\n", ret);
+		return ret;
+	}
+
+	/* get grf-reg base address */
+	regmap = syscon_get_regmap(syscon);
+	if (!regmap) {
+		debug("unable to find rockchip grf regmap\n");
+		return -ENODEV;
+	}
+	priv->regmap_base = regmap;
+
+	/* option: get pmu-reg base address */
+	ret = uclass_get_device_by_phandle(UCLASS_SYSCON, dev, "rockchip,pmu",
+					   &syscon);
+	if (!ret) {
+		/* get pmugrf-reg base address */
+		regmap = syscon_get_regmap(syscon);
+		if (!regmap) {
+			debug("unable to find rockchip pmu regmap\n");
+			return -ENODEV;
+		}
+		priv->regmap_pmu = regmap;
+	}
+
+	ctrl = rockchip_pinctrl_get_soc_data(dev);
+	if (!ctrl) {
+		debug("driver data not available\n");
+		return -EINVAL;
+	}
+
+	priv->ctrl = ctrl;
+	return 0;
+}
diff --git a/drivers/pinctrl/rockchip/pinctrl-rockchip.h b/drivers/pinctrl/rockchip/pinctrl-rockchip.h
new file mode 100644
index 0000000000..bc809630c1
--- /dev/null
+++ b/drivers/pinctrl/rockchip/pinctrl-rockchip.h
@@ -0,0 +1,302 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef __DRIVERS_PINCTRL_ROCKCHIP_H
+#define __DRIVERS_PINCTRL_ROCKCHIP_H
+
+#include <linux/types.h>
+
+enum rockchip_pinctrl_type {
+	RV1108,
+	RK3036,
+	RK3128,
+	RK3188,
+	RK3288,
+	RK3368,
+	RK3399,
+};
+
+/**
+ * Encode variants of iomux registers into a type variable
+ */
+#define IOMUX_GPIO_ONLY		BIT(0)
+#define IOMUX_WIDTH_4BIT	BIT(1)
+#define IOMUX_SOURCE_PMU	BIT(2)
+#define IOMUX_UNROUTED		BIT(3)
+#define IOMUX_WIDTH_3BIT	BIT(4)
+
+/**
+ * Defined some common pins constants
+ */
+#define ROCKCHIP_PULL_BITS_PER_PIN	2
+#define ROCKCHIP_PULL_PINS_PER_REG	8
+#define ROCKCHIP_PULL_BANK_STRIDE	16
+#define ROCKCHIP_DRV_BITS_PER_PIN	2
+#define ROCKCHIP_DRV_PINS_PER_REG	8
+#define ROCKCHIP_DRV_BANK_STRIDE	16
+#define ROCKCHIP_DRV_3BITS_PER_PIN	3
+
+/**
+ * @type: iomux variant using IOMUX_* constants
+ * @offset: if initialized to -1 it will be autocalculated, by specifying
+ *	    an initial offset value the relevant source offset can be reset
+ *	    to a new value for autocalculating the following iomux registers.
+ */
+struct rockchip_iomux {
+	int				type;
+	int				offset;
+};
+
+/**
+ * enum type index corresponding to rockchip_perpin_drv_list arrays index.
+ */
+enum rockchip_pin_drv_type {
+	DRV_TYPE_IO_DEFAULT = 0,
+	DRV_TYPE_IO_1V8_OR_3V0,
+	DRV_TYPE_IO_1V8_ONLY,
+	DRV_TYPE_IO_1V8_3V0_AUTO,
+	DRV_TYPE_IO_3V3_ONLY,
+	DRV_TYPE_MAX
+};
+
+/**
+ * enum type index corresponding to rockchip_pull_list arrays index.
+ */
+enum rockchip_pin_pull_type {
+	PULL_TYPE_IO_DEFAULT = 0,
+	PULL_TYPE_IO_1V8_ONLY,
+	PULL_TYPE_MAX
+};
+
+/**
+ * @drv_type: drive strength variant using rockchip_perpin_drv_type
+ * @offset: if initialized to -1 it will be autocalculated, by specifying
+ *	    an initial offset value the relevant source offset can be reset
+ *	    to a new value for autocalculating the following drive strength
+ *	    registers. if used chips own cal_drv func instead to calculate
+ *	    registers offset, the variant could be ignored.
+ */
+struct rockchip_drv {
+	enum rockchip_pin_drv_type	drv_type;
+	int				offset;
+};
+
+/**
+ * @priv: common pinctrl private basedata
+ * @pin_base: first pin number
+ * @nr_pins: number of pins in this bank
+ * @name: name of the bank
+ * @bank_num: number of the bank, to account for holes
+ * @iomux: array describing the 4 iomux sources of the bank
+ * @drv: array describing the 4 drive strength sources of the bank
+ * @pull_type: array describing the 4 pull type sources of the bank
+ * @recalced_mask: bits describing the mux recalced pins of per bank
+ * @route_mask: bits describing the routing pins of per bank
+ */
+struct rockchip_pin_bank {
+	struct rockchip_pinctrl_priv	*priv;
+	u32				pin_base;
+	u8				nr_pins;
+	char				*name;
+	u8				bank_num;
+	struct rockchip_iomux		iomux[4];
+	struct rockchip_drv		drv[4];
+	enum rockchip_pin_pull_type	pull_type[4];
+	u32				recalced_mask;
+	u32				route_mask;
+};
+
+#define PIN_BANK(id, pins, label)			\
+	{						\
+		.bank_num	= id,			\
+		.nr_pins	= pins,			\
+		.name		= label,		\
+		.iomux		= {			\
+			{ .offset = -1 },		\
+			{ .offset = -1 },		\
+			{ .offset = -1 },		\
+			{ .offset = -1 },		\
+		},					\
+	}
+
+#define PIN_BANK_IOMUX_FLAGS(id, pins, label, iom0, iom1, iom2, iom3)	\
+	{								\
+		.bank_num	= id,					\
+		.nr_pins	= pins,					\
+		.name		= label,				\
+		.iomux		= {					\
+			{ .type = iom0, .offset = -1 },			\
+			{ .type = iom1, .offset = -1 },			\
+			{ .type = iom2, .offset = -1 },			\
+			{ .type = iom3, .offset = -1 },			\
+		},							\
+	}
+
+#define PIN_BANK_DRV_FLAGS(id, pins, label, type0, type1, type2, type3) \
+	{								\
+		.bank_num	= id,					\
+		.nr_pins	= pins,					\
+		.name		= label,				\
+		.iomux		= {					\
+			{ .offset = -1 },				\
+			{ .offset = -1 },				\
+			{ .offset = -1 },				\
+			{ .offset = -1 },				\
+		},							\
+		.drv		= {					\
+			{ .drv_type = type0, .offset = -1 },		\
+			{ .drv_type = type1, .offset = -1 },		\
+			{ .drv_type = type2, .offset = -1 },		\
+			{ .drv_type = type3, .offset = -1 },		\
+		},							\
+	}
+
+#define PIN_BANK_DRV_FLAGS_PULL_FLAGS(id, pins, label, drv0, drv1,	\
+				      drv2, drv3, pull0, pull1,		\
+				      pull2, pull3)			\
+	{								\
+		.bank_num	= id,					\
+		.nr_pins	= pins,					\
+		.name		= label,				\
+		.iomux		= {					\
+			{ .offset = -1 },				\
+			{ .offset = -1 },				\
+			{ .offset = -1 },				\
+			{ .offset = -1 },				\
+		},							\
+		.drv		= {					\
+			{ .drv_type = drv0, .offset = -1 },		\
+			{ .drv_type = drv1, .offset = -1 },		\
+			{ .drv_type = drv2, .offset = -1 },		\
+			{ .drv_type = drv3, .offset = -1 },		\
+		},							\
+		.pull_type[0] = pull0,					\
+		.pull_type[1] = pull1,					\
+		.pull_type[2] = pull2,					\
+		.pull_type[3] = pull3,					\
+	}
+
+#define PIN_BANK_IOMUX_DRV_FLAGS_OFFSET(id, pins, label, iom0, iom1,	\
+					iom2, iom3, drv0, drv1, drv2,	\
+					drv3, offset0, offset1,		\
+					offset2, offset3)		\
+	{								\
+		.bank_num	= id,					\
+		.nr_pins	= pins,					\
+		.name		= label,				\
+		.iomux		= {					\
+			{ .type = iom0, .offset = -1 },			\
+			{ .type = iom1, .offset = -1 },			\
+			{ .type = iom2, .offset = -1 },			\
+			{ .type = iom3, .offset = -1 },			\
+		},							\
+		.drv		= {					\
+			{ .drv_type = drv0, .offset = offset0 },	\
+			{ .drv_type = drv1, .offset = offset1 },	\
+			{ .drv_type = drv2, .offset = offset2 },	\
+			{ .drv_type = drv3, .offset = offset3 },	\
+		},							\
+	}
+
+#define PIN_BANK_IOMUX_FLAGS_DRV_FLAGS_OFFSET_PULL_FLAGS(id, pins,	\
+					      label, iom0, iom1, iom2,  \
+					      iom3, drv0, drv1, drv2,   \
+					      drv3, offset0, offset1,   \
+					      offset2, offset3, pull0,  \
+					      pull1, pull2, pull3)	\
+	{								\
+		.bank_num	= id,					\
+		.nr_pins	= pins,					\
+		.name		= label,				\
+		.iomux		= {					\
+			{ .type = iom0, .offset = -1 },			\
+			{ .type = iom1, .offset = -1 },			\
+			{ .type = iom2, .offset = -1 },			\
+			{ .type = iom3, .offset = -1 },			\
+		},							\
+		.drv		= {					\
+			{ .drv_type = drv0, .offset = offset0 },	\
+			{ .drv_type = drv1, .offset = offset1 },	\
+			{ .drv_type = drv2, .offset = offset2 },	\
+			{ .drv_type = drv3, .offset = offset3 },	\
+		},							\
+		.pull_type[0] = pull0,					\
+		.pull_type[1] = pull1,					\
+		.pull_type[2] = pull2,					\
+		.pull_type[3] = pull3,					\
+	}
+
+/**
+ * struct rockchip_mux_recalced_data: recalculate a pin iomux data.
+ * @num: bank number.
+ * @pin: pin number.
+ * @reg: register offset.
+ * @bit: index at register.
+ * @mask: mask bit
+ */
+struct rockchip_mux_recalced_data {
+	u8 num;
+	u8 pin;
+	u32 reg;
+	u8 bit;
+	u8 mask;
+};
+
+/**
+ * struct rockchip_mux_route_data: route a pin iomux data.
+ * @bank_num: bank number.
+ * @pin: index at register or used to calc index.
+ * @func: the min pin.
+ * @route_offset: the max pin.
+ * @route_val: the register offset.
+ */
+struct rockchip_mux_route_data {
+	u8 bank_num;
+	u8 pin;
+	u8 func;
+	u32 route_offset;
+	u32 route_val;
+};
+
+/**
+ */
+struct rockchip_pin_ctrl {
+	struct rockchip_pin_bank	*pin_banks;
+	u32				nr_banks;
+	u32				nr_pins;
+	char				*label;
+	enum rockchip_pinctrl_type	type;
+	int				grf_mux_offset;
+	int				pmu_mux_offset;
+	int				grf_drv_offset;
+	int				pmu_drv_offset;
+	struct rockchip_mux_recalced_data *iomux_recalced;
+	u32				niomux_recalced;
+	struct rockchip_mux_route_data *iomux_routes;
+	u32				niomux_routes;
+
+	void	(*pull_calc_reg)(struct rockchip_pin_bank *bank,
+				 int pin_num, struct regmap **regmap,
+				 int *reg, u8 *bit);
+	void	(*drv_calc_reg)(struct rockchip_pin_bank *bank,
+				int pin_num, struct regmap **regmap,
+				int *reg, u8 *bit);
+	int	(*schmitt_calc_reg)(struct rockchip_pin_bank *bank,
+				    int pin_num, struct regmap **regmap,
+				    int *reg, u8 *bit);
+};
+
+/**
+ */
+struct rockchip_pinctrl_priv {
+	struct rockchip_pin_ctrl	*ctrl;
+	struct regmap			*regmap_base;
+	struct regmap			*regmap_pmu;
+};
+
+extern const struct pinctrl_ops rockchip_pinctrl_ops;
+int rockchip_pinctrl_probe(struct udevice *dev);
+
+#endif /* __DRIVERS_PINCTRL_ROCKCHIP_H */
diff --git a/drivers/pinctrl/rockchip/pinctrl-rv1108.c b/drivers/pinctrl/rockchip/pinctrl-rv1108.c
new file mode 100644
index 0000000000..f4a09a6824
--- /dev/null
+++ b/drivers/pinctrl/rockchip/pinctrl-rv1108.c
@@ -0,0 +1,203 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <regmap.h>
+#include <syscon.h>
+
+#include "pinctrl-rockchip.h"
+
+static struct rockchip_mux_recalced_data rv1108_mux_recalced_data[] = {
+	{
+		.num = 1,
+		.pin = 0,
+		.reg = 0x418,
+		.bit = 0,
+		.mask = 0x3
+	}, {
+		.num = 1,
+		.pin = 1,
+		.reg = 0x418,
+		.bit = 2,
+		.mask = 0x3
+	}, {
+		.num = 1,
+		.pin = 2,
+		.reg = 0x418,
+		.bit = 4,
+		.mask = 0x3
+	}, {
+		.num = 1,
+		.pin = 3,
+		.reg = 0x418,
+		.bit = 6,
+		.mask = 0x3
+	}, {
+		.num = 1,
+		.pin = 4,
+		.reg = 0x418,
+		.bit = 8,
+		.mask = 0x3
+	}, {
+		.num = 1,
+		.pin = 5,
+		.reg = 0x418,
+		.bit = 10,
+		.mask = 0x3
+	}, {
+		.num = 1,
+		.pin = 6,
+		.reg = 0x418,
+		.bit = 12,
+		.mask = 0x3
+	}, {
+		.num = 1,
+		.pin = 7,
+		.reg = 0x418,
+		.bit = 14,
+		.mask = 0x3
+	}, {
+		.num = 1,
+		.pin = 8,
+		.reg = 0x41c,
+		.bit = 0,
+		.mask = 0x3
+	}, {
+		.num = 1,
+		.pin = 9,
+		.reg = 0x41c,
+		.bit = 2,
+		.mask = 0x3
+	},
+};
+
+#define RV1108_PULL_PMU_OFFSET		0x10
+#define RV1108_PULL_OFFSET		0x110
+
+static void rv1108_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
+					 int pin_num, struct regmap **regmap,
+					 int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	/* The first 24 pins of the first bank are located in PMU */
+	if (bank->bank_num == 0) {
+		*regmap = priv->regmap_pmu;
+		*reg = RV1108_PULL_PMU_OFFSET;
+	} else {
+		*reg = RV1108_PULL_OFFSET;
+		*regmap = priv->regmap_base;
+		/* correct the offset, as we're starting with the 2nd bank */
+		*reg -= 0x10;
+		*reg += bank->bank_num * ROCKCHIP_PULL_BANK_STRIDE;
+	}
+
+	*reg += ((pin_num / ROCKCHIP_PULL_PINS_PER_REG) * 4);
+	*bit = (pin_num % ROCKCHIP_PULL_PINS_PER_REG);
+	*bit *= ROCKCHIP_PULL_BITS_PER_PIN;
+}
+
+#define RV1108_DRV_PMU_OFFSET		0x20
+#define RV1108_DRV_GRF_OFFSET		0x210
+
+static void rv1108_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
+					int pin_num, struct regmap **regmap,
+					int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	/* The first 24 pins of the first bank are located in PMU */
+	if (bank->bank_num == 0) {
+		*regmap = priv->regmap_pmu;
+		*reg = RV1108_DRV_PMU_OFFSET;
+	} else {
+		*regmap = priv->regmap_base;
+		*reg = RV1108_DRV_GRF_OFFSET;
+
+		/* correct the offset, as we're starting with the 2nd bank */
+		*reg -= 0x10;
+		*reg += bank->bank_num * ROCKCHIP_DRV_BANK_STRIDE;
+	}
+
+	*reg += ((pin_num / ROCKCHIP_DRV_PINS_PER_REG) * 4);
+	*bit = pin_num % ROCKCHIP_DRV_PINS_PER_REG;
+	*bit *= ROCKCHIP_DRV_BITS_PER_PIN;
+}
+
+#define RV1108_SCHMITT_PMU_OFFSET		0x30
+#define RV1108_SCHMITT_GRF_OFFSET		0x388
+#define RV1108_SCHMITT_BANK_STRIDE		8
+#define RV1108_SCHMITT_PINS_PER_GRF_REG		16
+#define RV1108_SCHMITT_PINS_PER_PMU_REG		8
+
+static int rv1108_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank,
+					   int pin_num,
+					   struct regmap **regmap,
+					   int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	int pins_per_reg;
+
+	if (bank->bank_num == 0) {
+		*regmap = priv->regmap_pmu;
+		*reg = RV1108_SCHMITT_PMU_OFFSET;
+		pins_per_reg = RV1108_SCHMITT_PINS_PER_PMU_REG;
+	} else {
+		*regmap = priv->regmap_base;
+		*reg = RV1108_SCHMITT_GRF_OFFSET;
+		pins_per_reg = RV1108_SCHMITT_PINS_PER_GRF_REG;
+		*reg += (bank->bank_num  - 1) * RV1108_SCHMITT_BANK_STRIDE;
+	}
+	*reg += ((pin_num / pins_per_reg) * 4);
+	*bit = pin_num % pins_per_reg;
+
+	return 0;
+}
+
+static struct rockchip_pin_bank rv1108_pin_banks[] = {
+	PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", IOMUX_SOURCE_PMU,
+					     IOMUX_SOURCE_PMU,
+					     IOMUX_SOURCE_PMU,
+					     IOMUX_SOURCE_PMU),
+	PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1", 0, 0, 0, 0),
+	PIN_BANK_IOMUX_FLAGS(2, 32, "gpio2", 0, 0, 0, 0),
+	PIN_BANK_IOMUX_FLAGS(3, 32, "gpio3", 0, 0, 0, 0),
+};
+
+static struct rockchip_pin_ctrl rv1108_pin_ctrl = {
+	.pin_banks		= rv1108_pin_banks,
+	.nr_banks		= ARRAY_SIZE(rv1108_pin_banks),
+	.label			= "RV1108-GPIO",
+	.type			= RV1108,
+	.grf_mux_offset		= 0x10,
+	.pmu_mux_offset		= 0x0,
+	.iomux_recalced		= rv1108_mux_recalced_data,
+	.niomux_recalced	= ARRAY_SIZE(rv1108_mux_recalced_data),
+	.pull_calc_reg		= rv1108_calc_pull_reg_and_bit,
+	.drv_calc_reg		= rv1108_calc_drv_reg_and_bit,
+	.schmitt_calc_reg	= rv1108_calc_schmitt_reg_and_bit,
+};
+
+static const struct udevice_id rv1108_pinctrl_ids[] = {
+	{
+		.compatible = "rockchip,rv1108-pinctrl",
+		.data = (ulong)&rv1108_pin_ctrl
+	},
+	{ }
+};
+
+U_BOOT_DRIVER(pinctrl_rv1108) = {
+	.name           = "pinctrl_rv1108",
+	.id             = UCLASS_PINCTRL,
+	.of_match       = rv1108_pinctrl_ids,
+	.priv_auto_alloc_size = sizeof(struct rockchip_pinctrl_priv),
+	.ops            = &rockchip_pinctrl_ops,
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	.bind		= dm_scan_fdt_dev,
+#endif
+	.probe          = rockchip_pinctrl_probe,
+};

commit 9f32e0d2ecc1596d29f334a5e042fe8cd84d62b4
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Thu Aug 20 15:26:25 2020 +0800

    gpio: rockchip: handle error code from pinctrl
    
    Change-Id: Iac48b2302da562d0c204884d9eb3f763c2071c9f
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/drivers/gpio/rk_gpio.c b/drivers/gpio/rk_gpio.c
index c3f72c54e3..f0146db320 100644
--- a/drivers/gpio/rk_gpio.c
+++ b/drivers/gpio/rk_gpio.c
@@ -142,8 +142,11 @@ static int rockchip_gpio_probe(struct udevice *dev)
 	uc_priv->bank_name = priv->name;
 
 	pins_num = pinctrl_get_pins_count(priv->pinctrl);
-	if ((priv->bank + 1) * ROCKCHIP_GPIOS_PER_BANK >= pins_num)
+	if (pins_num <= 0) {
+		printf("%s: fail to get pins from pinctrl\n", __func__);
+	} else if ((priv->bank + 1) * ROCKCHIP_GPIOS_PER_BANK >= pins_num) {
 		uc_priv->gpio_count = pins_num - priv->bank * ROCKCHIP_GPIOS_PER_BANK;
+	}
 
 	return 0;
 }

commit 8e4f57b962f06c32c21ebadb1af23499b252259e
Author: YouMin Chen <cym@rock-chips.com>
Date:   Tue Aug 4 09:28:37 2020 +0800

    drivers: ram: rv1126: modify the dram side DS and ODT for fsp_param
    
    Change-Id: I1080edf76073f9387e7211b8333bf086f26a09d2
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
index c4821ba009..0e23971894 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -2696,18 +2696,15 @@ static void save_fsp_param(struct dram_info *dram, u32 dst_fsp,
 		temp = readl(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +
 			     DDR_PCTL2_INIT3);
 		temp = (temp >> PCTL2_DDR34_MR1_SHIFT) & PCTL2_MR_MASK;
-		p_fsp_param->ds_pdds = ((temp >> 1) & 0x1) |
-				       (((temp >> 5) & 0x1) << 1);
-		p_fsp_param->dq_odt = ((temp >> 2) & 0x1) |
-				      (((temp >> 6) & 0x1) << 1) |
-				      (((temp >> 9) & 0x1) << 2);
+		p_fsp_param->ds_pdds = temp & DDR3_DS_MASK;
+		p_fsp_param->dq_odt = temp & DDR3_RTT_NOM_MASK;
 		p_fsp_param->ca_odt = p_fsp_param->dq_odt;
 	} else if (sdram_params->base.dramtype == DDR4) {
 		temp = readl(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +
 			     DDR_PCTL2_INIT3);
 		temp = (temp >> PCTL2_DDR34_MR1_SHIFT) & PCTL2_MR_MASK;
-		p_fsp_param->ds_pdds = (temp >> 1) & 0x3;
-		p_fsp_param->dq_odt = (temp >> 8) & 0x7;
+		p_fsp_param->ds_pdds = temp & DDR4_DS_MASK;
+		p_fsp_param->dq_odt = temp & DDR4_RTT_NOM_MASK;
 		p_fsp_param->ca_odt = p_fsp_param->dq_odt;
 	} else if (sdram_params->base.dramtype == LPDDR3) {
 		temp = readl(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +
@@ -2721,13 +2718,13 @@ static void save_fsp_param(struct dram_info *dram, u32 dst_fsp,
 		temp = readl(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +
 			     DDR_PCTL2_INIT4);
 		temp = (temp >> PCTL2_LPDDR234_MR3_SHIFT) & PCTL2_MR_MASK;
-		p_fsp_param->ds_pdds = (temp >> 3) & 0x7;
+		p_fsp_param->ds_pdds = temp & LPDDR4_PDDS_MASK;
 
 		temp = readl(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +
 			     DDR_PCTL2_INIT6);
 		temp = (temp >> PCTL2_LPDDR4_MR11_SHIFT) & PCTL2_MR_MASK;
-		p_fsp_param->dq_odt = temp & 0x7;
-		p_fsp_param->ca_odt = (temp >> 4) & 0x7;
+		p_fsp_param->dq_odt = temp & LPDDR4_DQODT_MASK;
+		p_fsp_param->ca_odt = temp & LPDDR4_CAODT_MASK;
 
 		temp = MAX(readl(PHY_REG(phy_base, 0x3ae)),
 			   readl(PHY_REG(phy_base, 0x3ce)));

commit 38b16f0834e153e90332528f47b3483d3b65692c
Author: YouMin Chen <cym@rock-chips.com>
Date:   Wed Jul 22 16:26:34 2020 +0800

    drivers: ram: rv1126: fix the timing about noc and controller
    
    1. set the noc ddrtimingc0.b.wrtomwr for LPDDR4
    2. set the noc ddrmode.b.mwrsize for LPDDR4
    3. update the noc ddrmode.b.burstsize
    4. update the controller timing for 328MHz
    5. set ddr4timing to 0 except LPDDR4
    6. calculate ddr4timing using *_L timing for DDR4
    
    Change-Id: I9f8fae51a05f8547d64da262d4c69fd4edec79fb
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-1056.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-1056.inc
index 2cb613eb63..062f04d79a 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-1056.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-1056.inc
@@ -19,7 +19,7 @@
 			{0x00000002},
 			{0x00001111},
 			{0x0000000c},
-			{0x0000034a},
+			{0x00000000},
 			0x000000ff
 		}
 	},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-328.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-328.inc
index 5f9733b3a3..1276900cc4 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-328.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-328.inc
@@ -19,7 +19,7 @@
 			{0x00000002},
 			{0x00001111},
 			{0x0000000c},
-			{0x00000222},
+			{0x00000000},
 			0x000000ff
 		}
 	},
@@ -33,7 +33,7 @@
 	{
 		{
 			{0x00000000, 0x43041001},	/* MSTR */
-			{0x00000064, 0x0028003a},	/* RFSHTMG */
+			{0x00000064, 0x0027003a},	/* RFSHTMG */
 			{0x000000d0, 0x00020052},	/* INIT0 */
 			{0x000000d4, 0x00220000},	/* INIT1 */
 			{0x000000d8, 0x00000100},	/* INIT2 */
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-396.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-396.inc
index 6984db1438..caefcc2f1d 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-396.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-396.inc
@@ -19,7 +19,7 @@
 			{0x00000002},
 			{0x00001111},
 			{0x0000000c},
-			{0x00000222},
+			{0x00000000},
 			0x000000ff
 		}
 	},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-528.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-528.inc
index ff4dd08a7f..362585ce46 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-528.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-528.inc
@@ -19,7 +19,7 @@
 			{0x00000002},
 			{0x00001111},
 			{0x0000000c},
-			{0x0000032a},
+			{0x00000000},
 			0x000000ff
 		}
 	},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-664.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-664.inc
index e74a4810d1..06bd9ef295 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-664.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-664.inc
@@ -19,7 +19,7 @@
 			{0x00000002},
 			{0x00001111},
 			{0x0000000c},
-			{0x00000232},
+			{0x00000000},
 			0x000000ff
 		}
 	},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-784.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-784.inc
index 377dc39aa9..5cce6903f7 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-784.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-784.inc
@@ -19,7 +19,7 @@
 			{0x00000002},
 			{0x00001111},
 			{0x0000000c},
-			{0x0000033a},
+			{0x00000000},
 			0x000000ff
 		}
 	},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-924.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-924.inc
index 63ea151af4..3aeb91bb3c 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-924.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-924.inc
@@ -19,7 +19,7 @@
 			{0x00000002},
 			{0x00001111},
 			{0x0000000c},
-			{0x00000342},
+			{0x00000000},
 			0x000000ff
 		}
 	},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-1056.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-1056.inc
index dc438c004b..295b0871e0 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-1056.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-1056.inc
@@ -19,7 +19,7 @@
 			{0x00000002},
 			{0x00001111},
 			{0x0000000c},
-			{0x0000033a},
+			{0x0000034b},
 			0x000000ff
 		}
 	},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-328.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-328.inc
index 3b61adfb38..4b424fb440 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-328.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-328.inc
@@ -19,7 +19,7 @@
 			{0x00000002},
 			{0x00001111},
 			{0x0000000c},
-			{0x0000022a},
+			{0x00000232},
 			0x000000ff
 		}
 	},
@@ -33,7 +33,7 @@
 	{
 		{
 			{0x00000000, 0x43049010},	/* MSTR */
-			{0x00000064, 0x0028003a},	/* RFSHTMG */
+			{0x00000064, 0x0027003a},	/* RFSHTMG */
 			{0x000000d0, 0x00020052},	/* INIT0 */
 			{0x000000d4, 0x00220000},	/* INIT1 */
 			{0x000000d8, 0x00000100},	/* INIT2 */
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-396.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-396.inc
index 1901e0c4a3..980be8cf18 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-396.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-396.inc
@@ -19,7 +19,7 @@
 			{0x00000002},
 			{0x00001111},
 			{0x0000000c},
-			{0x0000022a},
+			{0x00000232},
 			0x000000ff
 		}
 	},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-528.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-528.inc
index ad082449c6..3bde055e8d 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-528.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-528.inc
@@ -19,7 +19,7 @@
 			{0x00000002},
 			{0x00001111},
 			{0x0000000c},
-			{0x0000022a},
+			{0x00000232},
 			0x000000ff
 		}
 	},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-664.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-664.inc
index 2cc463782b..c9341166d6 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-664.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-664.inc
@@ -19,7 +19,7 @@
 			{0x00000002},
 			{0x00001111},
 			{0x0000000c},
-			{0x0000022a},
+			{0x0000023a},
 			0x000000ff
 		}
 	},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-784.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-784.inc
index 38cbe4ebaf..ef2e9347bf 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-784.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-784.inc
@@ -19,7 +19,7 @@
 			{0x00000002},
 			{0x00001111},
 			{0x0000000c},
-			{0x0000022a},
+			{0x0000033a},
 			0x000000ff
 		}
 	},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-924.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-924.inc
index a3dec3ac7e..acb33bd315 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-924.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-924.inc
@@ -19,7 +19,7 @@
 			{0x00000002},
 			{0x00001111},
 			{0x0000000c},
-			{0x00000232},
+			{0x00000342},
 			0x000000ff
 		}
 	},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-1056.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-1056.inc
index b67ab876fc..41eecc7fda 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-1056.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-1056.inc
@@ -19,7 +19,7 @@
 			{0x00000002},
 			{0x00001111},
 			{0x0000000c},
-			{0x00000542},
+			{0x00000000},
 			0x000000ff
 		}
 	},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-328.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-328.inc
index 24025d6dde..bf0dde78c2 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-328.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-328.inc
@@ -15,11 +15,11 @@
 		},
 		{
 			{0x290a060a},
-			{0x08020303},
+			{0x08020403},
 			{0x00000002},
 			{0x00001111},
 			{0x0000000c},
-			{0x0000021a},
+			{0x00000000},
 			0x000000ff
 		}
 	},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-396.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-396.inc
index fb1468e83b..798c9866f1 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-396.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-396.inc
@@ -15,11 +15,11 @@
 		},
 		{
 			{0x2b0d080d},
-			{0x0a020303},
+			{0x0a020403},
 			{0x00000002},
 			{0x00001111},
 			{0x0000000c},
-			{0x0000021a},
+			{0x00000000},
 			0x000000ff
 		}
 	},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-528.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-528.inc
index d6df8fde6b..8d40a7c837 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-528.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-528.inc
@@ -19,7 +19,7 @@
 			{0x00000002},
 			{0x00001111},
 			{0x0000000c},
-			{0x00000322},
+			{0x00000000},
 			0x000000ff
 		}
 	},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-664.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-664.inc
index 64557fc4a1..c58be2c921 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-664.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-664.inc
@@ -15,11 +15,11 @@
 		},
 		{
 			{0x32150d15},
-			{0x11030504},
+			{0x11030604},
 			{0x00000002},
 			{0x00001111},
 			{0x0000000c},
-			{0x0000032a},
+			{0x00000000},
 			0x000000ff
 		}
 	},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-784.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-784.inc
index fa5d142e4d..9ca6685f43 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-784.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-784.inc
@@ -19,7 +19,7 @@
 			{0x00000002},
 			{0x00001111},
 			{0x0000000c},
-			{0x00000432},
+			{0x00000000},
 			0x000000ff
 		}
 	},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-924.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-924.inc
index 5ac7700482..c32a6de289 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-924.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-924.inc
@@ -15,11 +15,11 @@
 		},
 		{
 			{0x391d141d},
-			{0x17050706},
+			{0x17050806},
 			{0x00000002},
 			{0x00001111},
 			{0x0000000c},
-			{0x0000053a},
+			{0x00000000},
 			0x000000ff
 		}
 	},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-1056.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-1056.inc
index 0f9624a18a..04f1a3eab2 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-1056.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-1056.inc
@@ -15,11 +15,11 @@
 		},
 		{
 			{0x41241522},
-			{0x15050a07},
-			{0x00000002},
+			{0x15050b07},
+			{0x00000602},
 			{0x00001111},
-			{0x0000000c},
-			{0x00000554},
+			{0x00000054},
+			{0x00000000},
 			0x000000ff
 		}
 	},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-328.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-328.inc
index ecdfc45ac2..dc1186e76e 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-328.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-328.inc
@@ -16,10 +16,10 @@
 		{
 			{0x2f0d060a},
 			{0x07020804},
-			{0x00000002},
+			{0x00000602},
 			{0x00001111},
-			{0x0000000c},
-			{0x00000244},
+			{0x00000054},
+			{0x00000000},
 			0x000000ff
 		}
 	},
@@ -33,8 +33,8 @@
 	{
 		{
 			{0x00000000, 0x81081020},	/* MSTR */
-			{0x00000064, 0x0014002f},	/* RFSHTMG */
-			{0x000000d0, 0x00020144},	/* INIT0 */
+			{0x00000064, 0x0014002e},	/* RFSHTMG */
+			{0x000000d0, 0x00020142},	/* INIT0 */
 			{0x000000d4, 0x00220000},	/* INIT1 */
 			{0x000000d8, 0x00000202},	/* INIT2 */
 			{0x000000dc, 0x00240012},	/* INIT3 */
@@ -54,7 +54,7 @@
 			{0x00000130, 0x00020000},	/* DRAMTMG12 */
 			{0x00000134, 0x00100002},	/* DRAMTMG13 */
 			{0x00000138, 0x00000030},	/* DRAMTMG14 */
-			{0x00000180, 0x00a500a5},	/* ZQCTL0 */
+			{0x00000180, 0x00a400a4},	/* ZQCTL0 */
 			{0x00000184, 0x00900000},	/* ZQCTL1 */
 			{0x00000190, 0x07040000},	/* DFITMG0 */
 			{0x00000198, 0x07000101},	/* DFILPCFG0 */
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-396.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-396.inc
index c83f5090dd..bac8148b8e 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-396.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-396.inc
@@ -16,10 +16,10 @@
 		{
 			{0x3110080d},
 			{0x08020804},
-			{0x00000002},
+			{0x00000602},
 			{0x00001111},
-			{0x0000000c},
-			{0x00000244},
+			{0x00000054},
+			{0x00000000},
 			0x000000ff
 		}
 	},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-528.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-528.inc
index e54edd3219..b4cb969fd4 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-528.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-528.inc
@@ -16,10 +16,10 @@
 		{
 			{0x34140b11},
 			{0x0b030804},
-			{0x00000002},
+			{0x00000602},
 			{0x00001111},
-			{0x0000000c},
-			{0x00000344},
+			{0x00000054},
+			{0x00000000},
 			0x000000ff
 		}
 	},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-664.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-664.inc
index a4b885d2cb..95ee2d8d12 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-664.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-664.inc
@@ -16,10 +16,10 @@
 		{
 			{0x36170d15},
 			{0x0d030805},
-			{0x00000002},
+			{0x00000602},
 			{0x00001111},
-			{0x0000000c},
-			{0x00000344},
+			{0x00000054},
+			{0x00000000},
 			0x000000ff
 		}
 	},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-784.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-784.inc
index eb7a6bd047..e968b086ef 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-784.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-784.inc
@@ -16,10 +16,10 @@
 		{
 			{0x391b1019},
 			{0x10040805},
-			{0x00000002},
+			{0x00000602},
 			{0x00001111},
-			{0x0000000c},
-			{0x00000444},
+			{0x00000054},
+			{0x00000000},
 			0x000000ff
 		}
 	},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-924.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-924.inc
index a40cca12a2..fc02f0d5cc 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-924.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-924.inc
@@ -16,10 +16,10 @@
 		{
 			{0x3e20121d},
 			{0x12050a07},
-			{0x00000002},
+			{0x00000602},
 			{0x00001111},
-			{0x0000000c},
-			{0x00000554},
+			{0x00000054},
+			{0x00000000},
 			0x000000ff
 		}
 	},
diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
index 075567cd9f..c4821ba009 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -1997,6 +1997,32 @@ static void set_ddrconfig(struct dram_info *dram, u32 ddrconfig)
 static void update_noc_timing(struct dram_info *dram,
 			      struct rv1126_sdram_params *sdram_params)
 {
+	void __iomem *pctl_base = dram->pctl;
+	u32 bw, bl;
+
+	bw = 8 << sdram_params->ch.cap_info.bw;
+	bl = ((readl(pctl_base + DDR_PCTL2_MSTR) >> 16) & 0xf) * 2;
+
+	/* update the noc timing related to data bus width */
+	if ((bw / 8 * bl) == 16)
+		sdram_params->ch.noc_timings.ddrmode.b.burstsize = 0;
+	else if ((bw / 8 * bl) == 32)
+		sdram_params->ch.noc_timings.ddrmode.b.burstsize = 1;
+	else if ((bw / 8 * bl) == 64)
+		sdram_params->ch.noc_timings.ddrmode.b.burstsize = 2;
+	else
+		sdram_params->ch.noc_timings.ddrmode.b.burstsize = 3;
+
+	sdram_params->ch.noc_timings.ddrtimingc0.b.burstpenalty =
+		(bw == 32) ? 2 : ((bw == 16) ? 4 : 8);
+
+	if (sdram_params->base.dramtype == LPDDR4) {
+		sdram_params->ch.noc_timings.ddrmode.b.mwrsize =
+			(bw == 16) ? 0x1 : 0x2;
+		sdram_params->ch.noc_timings.ddrtimingc0.b.wrtomwr =
+			3 * sdram_params->ch.noc_timings.ddrtimingc0.b.burstpenalty;
+	}
+
 	writel(sdram_params->ch.noc_timings.ddrtiminga0.d32,
 	       &dram->msch->ddrtiminga0);
 	writel(sdram_params->ch.noc_timings.ddrtimingb0.d32,
@@ -2772,6 +2798,7 @@ void ddr_set_rate(struct dram_info *dram,
 	lp_stat = low_power_update(dram, 0);
 	sdram_params_new = get_default_sdram_config(freq);
 	sdram_params_new->ch.cap_info.rank = sdram_params->ch.cap_info.rank;
+	sdram_params_new->ch.cap_info.bw = sdram_params->ch.cap_info.bw;
 
 	pre_set_rate(dram, sdram_params_new, dst_fsp, dst_fsp_lp4);
 

commit a5033de0cae1878d35cb4de6a4717842310bb730
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Tue Aug 18 15:45:52 2020 +0800

    rv1126: ddr: fix bug of ca driver strength setup
    
    lpddr4 reg0x107/108 is for clk driver strength.
    for other type of dram this register is for A6/A8 driver strength.
    
    Change-Id: Ia0acbe03574ad5a1a4ecdaa2c0f53cb9a45c034b
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
index 63ad097978..075567cd9f 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -955,6 +955,13 @@ static void set_ds_odt(struct dram_info *dram,
 	clrsetbits_le32(PHY_REG(phy_base, 0x101), 0x1f, phy_ca_drv);
 	clrsetbits_le32(PHY_REG(phy_base, 0x102), 0x1f, phy_clk_drv);
 	clrsetbits_le32(PHY_REG(phy_base, 0x103), 0x1f, phy_clk_drv);
+	if (dramtype == LPDDR4) {
+		clrsetbits_le32(PHY_REG(phy_base, 0x107), 0x1f, phy_clk_drv);
+		clrsetbits_le32(PHY_REG(phy_base, 0x108), 0x1f, phy_clk_drv);
+	} else {
+		clrsetbits_le32(PHY_REG(phy_base, 0x107), 0x1f, phy_ca_drv);
+		clrsetbits_le32(PHY_REG(phy_base, 0x108), 0x1f, phy_ca_drv);
+	}
 	/* clk / cmd slew rate */
 	clrsetbits_le32(PHY_REG(phy_base, 0x106), 0x1f, sr_clk);
 

commit de58289ebb175c62a0a62a0a02c670f4aad1c0b9
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Fri Aug 28 11:20:54 2020 +0800

    rockchip: rv1126: reduce npu aclk and sclk when reset
    
    Change-Id: I29644c83b20ecf40d5005119a86f2bcaad410c34
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126.c b/arch/arm/mach-rockchip/rv1126/rv1126.c
index d8768e8ff9..e5e487eee1 100644
--- a/arch/arm/mach-rockchip/rv1126/rv1126.c
+++ b/arch/arm/mach-rockchip/rv1126/rv1126.c
@@ -60,7 +60,10 @@ DECLARE_GLOBAL_DATA_PTR;
 #define PMU_PWR_GATE_SFTCON	(0x110)
 
 #define CRU_BASE		0xFF490000
+#define CRU_CLKSEL_CON65	0x204
+#define CRU_CLKSEL_CON67	0x20c
 #define CRU_SOFTRST_CON02	0x308
+
 #define GRF_BASE		0xFE000000
 #define PMUGRF_BASE		0xFE020000
 #define SGRF_BASE		0xFE0A0000
@@ -513,6 +516,10 @@ int arch_cpu_init(void)
 	/* disable force jtag mux route to both group0 and group1 */
 	writel(0x00300000, GRF_IOFUNC_CON3);
 
+	/* make npu aclk and sclk less then 300MHz when reset */
+	writel(0x00ff0055, CRU_BASE + CRU_CLKSEL_CON65);
+	writel(0x00ff0055, CRU_BASE + CRU_CLKSEL_CON67);
+
 #if !defined(CONFIG_TPL_BUILD)
 	int delay;
 

commit 14ce3c6d834c34a56549ecad1941573df2309264
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Thu Aug 27 17:42:05 2020 +0800

    mtd: spinand: Support GD5F1GQ5UExxG
    
    Change-Id: I5f494ce09eed8c28bd2cb10bac5ec7d9113bac50
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/gigadevice.c b/drivers/mtd/nand/spi/gigadevice.c
index 7c978a6bc8..52a3766708 100644
--- a/drivers/mtd/nand/spi/gigadevice.c
+++ b/drivers/mtd/nand/spi/gigadevice.c
@@ -101,7 +101,7 @@ static int gd5f1gq4xexxg_ecc_get_status(struct spinand_device *spinand,
 	return -EINVAL;
 }
 
-static int gd5f2gq4xexxg_ecc_get_status(struct spinand_device *spinand,
+static int gd5fxgq5xexxg_ecc_get_status(struct spinand_device *spinand,
 					u8 status)
 {
 	u8 status2;
@@ -158,7 +158,16 @@ static const struct spinand_info gigadevice_spinand_table[] = {
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&gd5fxgq4xexxg_ooblayout,
 				     gd5f1gq4xexxg_ecc_get_status)),
-	SPINAND_INFO("GD5F2GQ4UExxG", 0x52,
+	SPINAND_INFO("GD5F1GQ5UExxG", 0x51,
+		     NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
+		     NAND_ECCREQ(4, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&gd5fxgq4xexxg_ooblayout,
+				     gd5fxgq5xexxg_ecc_get_status)),
+	SPINAND_INFO("GD5F2GQ5UExxG", 0x52,
 		     NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
 		     NAND_ECCREQ(4, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -166,7 +175,7 @@ static const struct spinand_info gigadevice_spinand_table[] = {
 					      &update_cache_variants),
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&gd5fxgq4xexxg_ooblayout,
-				     gd5f2gq4xexxg_ecc_get_status)),
+				     gd5fxgq5xexxg_ecc_get_status)),
 	SPINAND_INFO("GD5F2GQ4UBExxG", 0xd2,
 		     NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
 		     NAND_ECCREQ(8, 512),

commit 446ef41c1220ed463c87c5c0535afb5a8f4011c4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Aug 21 17:46:31 2020 +0800

    clk: rockchip: rv1126: always support decompress clock get/set
    
    The SPL without thunder-boot or U-Boot needs it.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ie2d8b59e35fbc2056cfbc910dae94419afcbfc09

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rv1126.h b/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
index ea5b7d3427..8b573fe23c 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
@@ -290,7 +290,6 @@ enum {
 	CLK_SARADC_DIV_SHIFT	= 0,
 	CLK_SARADC_DIV_MASK	= 0x7ff,
 
-#ifdef CONFIG_SPL_BUILD
 	/* CRU_CLK_SEL25_CON */
 	DCLK_DECOM_SEL_SHIFT	= 15,
 	DCLK_DECOM_SEL_MASK	= 1 << DCLK_DECOM_SEL_SHIFT,
@@ -298,7 +297,6 @@ enum {
 	DCLK_DECOM_SEL_CPLL,
 	DCLK_DECOM_DIV_SHIFT	= 8,
 	DCLK_DECOM_DIV_MASK	= 0x7f << DCLK_DECOM_DIV_SHIFT,
-#endif
 
 	/* CRU_CLK_SEL26_CON */
 	HCLK_PDAUDIO_DIV_SHIFT	= 0,
diff --git a/drivers/clk/rockchip/clk_rv1126.c b/drivers/clk/rockchip/clk_rv1126.c
index a1994216ac..d1dd714485 100644
--- a/drivers/clk/rockchip/clk_rv1126.c
+++ b/drivers/clk/rockchip/clk_rv1126.c
@@ -1518,6 +1518,7 @@ static ulong rv1126_clk_isp_set_clk(struct rv1126_clk_priv *priv, ulong rate)
 
 	return rv1126_clk_isp_get_clk(priv);
 }
+#endif
 
 static ulong rv1126_dclk_decom_get_clk(struct rv1126_clk_priv *priv)
 {
@@ -1551,7 +1552,6 @@ static ulong rv1126_dclk_decom_set_clk(struct rv1126_clk_priv *priv, ulong rate)
 
 	return rv1126_dclk_decom_get_clk(priv);
 }
-#endif
 
 static ulong rv1126_clk_get_rate(struct clk *clk)
 {
@@ -1659,10 +1659,10 @@ static ulong rv1126_clk_get_rate(struct clk *clk)
 	case CLK_ISPP:
 		rate = rv1126_clk_pdvi_ispp_get_clk(priv, clk->id);
 		break;
+#endif
 	case DCLK_DECOM:
 		rate = rv1126_dclk_decom_get_clk(priv);
 		break;
-#endif
 	default:
 		return -ENOENT;
 	}
@@ -1772,10 +1772,10 @@ static ulong rv1126_clk_set_rate(struct clk *clk, ulong rate)
 	case CLK_ISPP:
 		ret = rv1126_clk_pdvi_ispp_set_clk(priv, clk->id, rate);
 		break;
+#endif
 	case DCLK_DECOM:
 		ret = rv1126_dclk_decom_set_clk(priv, rate);
 		break;
-#endif
 	default:
 		return -ENOENT;
 	}

commit 5db33a710178e46d34ff01633b03c52b217f7360
Author: Simon Xue <xxm@rock-chips.com>
Date:   Mon Aug 17 17:12:05 2020 +0800

    misc: rockchip_decompress: set default dclk to 400MHz
    
    Change-Id: Ie64c1d7fd25ae2e570a06141c9942faeaadcc09c
    Signed-off-by: Simon Xue <xxm@rock-chips.com>

diff --git a/drivers/misc/rockchip_decompress.c b/drivers/misc/rockchip_decompress.c
index 7ef14310b2..a121d33a60 100644
--- a/drivers/misc/rockchip_decompress.c
+++ b/drivers/misc/rockchip_decompress.c
@@ -4,6 +4,7 @@
  */
 #include <common.h>
 #include <asm/io.h>
+#include <clk.h>
 #include <dm.h>
 #include <linux/bitops.h>
 #include <misc.h>
@@ -80,11 +81,14 @@ DECLARE_GLOBAL_DATA_PTR;
 	DISEIEN | LENEIEN | LITEIEN | SQMEIEN | SLCIEN | \
 	HDEIEN | DSIEN)
 
+#define DCLK_DECOM		400 * 1000 * 1000
+
 struct rockchip_decom_priv {
 	struct reset_ctl rst;
 	void __iomem *base;
 	bool idle_check_once;
 	bool done;
+	struct clk dclk;
 	int cached; /* 1: access the data through dcache; 0: no dcache */
 };
 
@@ -248,6 +252,15 @@ static int rockchip_decom_probe(struct udevice *dev)
 		return ret;
 	}
 #endif
+
+	ret = clk_get_by_name(dev, "dclk", &priv->dclk);
+	if (ret < 0)
+		return ret;
+
+	ret = clk_set_rate(&priv->dclk, DCLK_DECOM);
+	if (ret < 0)
+		return ret;
+
 	return 0;
 }
 

commit f0daa6c11d4ef95fb0cae82498982f73600114cf
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Aug 20 17:23:02 2020 +0800

    rockchip: spl: update the led function interface
    
    Update led_set_on to led_set_state since it has been changed.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I0a42776c4c5453631093dbc64b8bf0dec2439a59

diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index 0c0d14d263..9488413c14 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -9,6 +9,7 @@
 #include <debug_uart.h>
 #include <dm.h>
 #include <key.h>
+#include <led.h>
 #include <misc.h>
 #include <ram.h>
 #include <spl.h>
@@ -229,7 +230,7 @@ static int setup_led(void)
 		debug("%s: get=%d\n", __func__, ret);
 		return ret;
 	}
-	ret = led_set_on(dev, 1);
+	ret = led_set_state(dev, LEDST_ON);
 	if (ret)
 		return ret;
 #endif

commit 7c7fff393fcfcff043ff1defab6b9c546e547a40
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Wed Aug 19 11:00:47 2020 +0800

    clk: rockchip: rk3288: support get pll config by table
    
    add some special pll configs for better clock jitter.
    
    Change-Id: I93f8cab2a995fc584322070e25bbba6067c80dbb
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index c4a57bbc67..cd23635f45 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -32,9 +32,27 @@ struct rk3288_clk_plat {
 };
 
 struct pll_div {
+	ulong rate;
 	u32 nr;
 	u32 nf;
 	u32 no;
+	u32 nb;
+};
+
+#define RK3288_PLL_RATE(_rate, _nr, _nf, _no, _nb)	\
+{							\
+	.rate	= _rate##U,				\
+	.nr = _nr,					\
+	.nf = _nf,					\
+	.no = _no,					\
+	.nb = _nb,					\
+}
+
+static struct pll_div rk3288_pll_rates[] = {
+	/* _mhz,  _nr, _nf, _no, _nb */
+	RK3288_PLL_RATE(1188000000, 1, 99, 2, 16),
+	RK3288_PLL_RATE(594000000, 1, 99, 4, 16),
+	RK3288_PLL_RATE(297000000, 1, 99, 8, 16),
 };
 
 #ifndef CONFIG_SPL_BUILD
@@ -191,9 +209,21 @@ enum {
 
 /* Keep divisors as low as possible to reduce jitter and power usage */
 static const struct pll_div apll_init_cfg = PLL_DIVISORS(APLL_HZ, 1, 1);
-static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 4);
+static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 1, 4);
 static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 1, 2);
 
+struct pll_div *rkclk_get_pll_config(ulong freq_hz)
+{
+	unsigned int rate_count = ARRAY_SIZE(rk3288_pll_rates);
+	int i;
+
+	for (i = 0; i < rate_count; i++) {
+		if (freq_hz == rk3288_pll_rates[i].rate)
+			return &rk3288_pll_rates[i];
+	}
+	return NULL;
+}
+
 static int rkclk_set_pll(struct rk3288_cru *cru, enum rk_clk_id clk_id,
 			 const struct pll_div *div)
 {
@@ -213,9 +243,9 @@ static int rkclk_set_pll(struct rk3288_cru *cru, enum rk_clk_id clk_id,
 		     ((div->nr - 1) << CLKR_SHIFT) | (div->no - 1));
 	rk_clrsetreg(&pll->con1, CLKF_MASK, div->nf - 1);
 
-	/* adjust gpll bw for better clock jitter */
-	if (pll_id == 3)
-		rk_clrsetreg(&pll->con2, PLL_BWADJ_MASK, 0);
+	/* adjust pll bw for better clock jitter */
+	if (div->nb)
+		rk_clrsetreg(&pll->con2, PLL_BWADJ_MASK, div->nb - 1);
 	else
 		rk_clrsetreg(&pll->con2, PLL_BWADJ_MASK, (div->nf >> 1) - 1);
 
@@ -312,10 +342,11 @@ static int rkclk_configure_ddr(struct rk3288_cru *cru, struct rk3288_grf *grf,
 #define VCO_MIN_KHZ	440000
 #define FREF_MAX_KHZ	2200000
 #define FREF_MIN_KHZ	269
-#define PLL_LIMIT_FREQ	600000000
+#define PLL_LIMIT_FREQ	594000000
 
 static int pll_para_config(ulong freq_hz, struct pll_div *div, uint *ext_div)
 {
+	struct pll_div *best_div = NULL;
 	uint ref_khz = OSC_HZ / 1000, nr, nf = 0;
 	uint fref_khz;
 	uint diff_khz, best_diff_khz;
@@ -335,6 +366,15 @@ static int pll_para_config(ulong freq_hz, struct pll_div *div, uint *ext_div)
 		no = DIV_ROUND_UP(no, *ext_div);
 	}
 
+	best_div = rkclk_get_pll_config(freq_hz * (*ext_div));
+	if (best_div) {
+		div->nr = best_div->nr;
+		div->nf = best_div->nf;
+		div->no = best_div->no;
+		div->nb = best_div->nb;
+		return 0;
+	}
+
 	/* only even divisors (and 1) are supported */
 	if (no > 1)
 		no = DIV_ROUND_UP(no, 2) * 2;

commit 29725e8530c218e8afe40083b0000c6c0a284825
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 20 14:49:19 2020 +0800

    spl: fit: print invalid fit magic
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I89da3797e444bb12e58cf99f902cb758c6fd82f9

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 70e76d1edf..59403c9883 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -459,12 +459,12 @@ static int spl_load_kernel_fit(struct spl_image_info *spl_image,
 	sector = CONFIG_SPL_KERNEL_BOOT_SECTOR;
 #endif
 	if (info->read(info, sector, 1, &fit_header) != 1) {
-		debug("%s: no memory\n", __func__);
+		debug("%s: Failed to read header\n", __func__);
 		return -EIO;
 	}
 
 	if (image_get_magic((void *)&fit_header) != FDT_MAGIC) {
-		debug("%s: Not fit magic\n", __func__);
+		printf("%s: Not fit magic\n", __func__);
 		return -EINVAL;
 	}
 

commit d8d99fce6039903b0c7b8ce3eb33150b6b967010
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Aug 12 09:54:08 2020 +0800

    configs: rv1126-emmc-tb: switch to FIT image
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I03bf023ffb955274fc8eb818368d4513dfad9a59

diff --git a/configs/rv1126-emmc-tb.config b/configs/rv1126-emmc-tb.config
index df91d10951..5fe83b3137 100644
--- a/configs/rv1126-emmc-tb.config
+++ b/configs/rv1126-emmc-tb.config
@@ -1,76 +1,25 @@
-# CONFIG_ARM_CPU_SUSPEND is not set
 CONFIG_BASE_DEFCONFIG="rv1126_defconfig"
 # CONFIG_CMD_MTD_BLK is not set
 # CONFIG_CMD_NAND is not set
-# CONFIG_CMD_NET is not set
 # CONFIG_CMD_SF is not set
 # CONFIG_CMD_SPI is not set
-# CONFIG_CMD_TFTP_BOOTM is not set
-# CONFIG_CMD_TFTP_FLASH is not set
-# CONFIG_CMD_TFTPPUT is not set
-# CONFIG_DISPLAY is not set
-# CONFIG_DM_CHARGE_DISPLAY is not set
-# CONFIG_DM_ETH is not set
-# CONFIG_DM_ETH_PHY is not set
-# CONFIG_DM_FUEL_GAUGE is not set
-# CONFIG_DM_VIDEO is not set
-# CONFIG_FIT is not set
-# CONFIG_I2C_EDID is not set
-# CONFIG_LAVA_INFO is not set
 CONFIG_LOADER_INI="RV1126MINIALL_EMMC_TB.ini"
 # CONFIG_MTD_DEVICE is not set
 # CONFIG_MTD is not set
 # CONFIG_MTD_NAND_BBT_USING_FLASH is not set
 # CONFIG_NAND is not set
-# CONFIG_NET is not set
-CONFIG_OF_U_BOOT_REMOVE_PROPS=""
-# CONFIG_OPTEE_CLIENT is not set
-# CONFIG_OPTEE_V2 is not set
-# CONFIG_PHYLIB is not set
-# CONFIG_REGEX is not set
-CONFIG_RKFW_BOOT_SECTOR=0xa000
-CONFIG_RKFW_TRUST_SECTOR=0x6000
-CONFIG_RKFW_U_BOOT_SECTOR=0x4000
 # CONFIG_ROCKCHIP_SFC is not set
 # CONFIG_ROCKCHIP_UIMAGE is not set
-# CONFIG_RSA is not set
-CONFIG_SF_DEFAULT_MODE=3
-CONFIG_SF_DEFAULT_SPEED=1000000
-# CONFIG_SHA1 is not set
-# CONFIG_SHA256 is not set
-# CONFIG_SHA512 is not set
-# CONFIG_SKIP_RELOCATE_UBOOT is not set
 # CONFIG_SPI_FLASH is not set
 # CONFIG_SPI_MEM is not set
 # CONFIG_SPL_AB is not set
 CONFIG_SPL_ADC_KEY=y
 CONFIG_SPL_ADC_SUPPORT=y
 # CONFIG_SPL_CROS_EC_KEYB is not set
-# CONFIG_SPL_CRYPTO_SUPPORT is not set
-# CONFIG_SPL_DM_CRYPTO is not set
-# CONFIG_SPL_HASH_SUPPORT is not set
 CONFIG_SPL_INPUT=y
-CONFIG_SPL_KERNEL_ADDR=0x608000
 CONFIG_SPL_KERNEL_BOOT=y
-CONFIG_SPL_KERNEL_COMPRESS_ADDR=0x4800000
-CONFIG_SPL_KERNEL_DECOM_LIMIT_SIZE=0x1ff8000
-# CONFIG_SPL_LIBDISK_SUPPORT is not set
-CONFIG_SPL_LOAD_RKFW=y
 # CONFIG_SPL_MTD_SUPPORT is not set
 # CONFIG_SPL_NAND_SUPPORT is not set
-CONFIG_SPL_RAMDISK_ADDR=0x2800000
-CONFIG_SPL_RAMDISK_COMPRESS_ADDR=0x5800000
-CONFIG_SPL_RAMDISK_DECOM_LIMIT_SIZE=0x3000000
-CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS=y
-# CONFIG_SPL_ROCKCHIP_SECURE_OTP_V2 is not set
 # CONFIG_SPL_SPI_FLASH_SUPPORT is not set
 # CONFIG_SPL_SPI_SUPPORT is not set
-CONFIG_SPL_SYS_MALLOC_F_LEN=0xc000
-CONFIG_SYS_MALLOC_F_LEN=0xc000
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x4000
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
-CONFIG_TEST_ROCKCHIP=y
-CONFIG_TPL_SYS_MALLOC_F_LEN=0xc000
 CONFIG_TRUST_INI="RV1126TOS_TB.ini"
-# CONFIG_VIDEO_BRIDGE is not set
-# CONFIG_VIDEO is not set

commit c1c74825e943c86a991c9a0625dd3891153add9b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Aug 12 11:04:52 2020 +0800

    rockchip: spl: use CONFIG_SPL_KERNEL_BOOT for thunder-boot
    
    Following the lates spl fit framework.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ib87a048b5736ee8ce342dfae208b92d6d5943080

diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index bfa48e0678..0c0d14d263 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -298,7 +298,7 @@ void spl_next_stage(struct spl_image_info *spl)
 }
 #endif
 
-#ifdef CONFIG_SPL_FIT_LOAD_KERNEL
+#ifdef CONFIG_SPL_KERNEL_BOOT
 const char *spl_kernel_partition(struct spl_image_info *spl,
 				 struct spl_load_info *info)
 {

commit a00b516f4424a0e9d45ac0a26e70fc175e6aa995
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Aug 12 11:03:19 2020 +0800

    spl: fit: use CONFIG_SPL_KERNEL_BOOT for thunder-boot
    
    This option was added by RKFW boot flow, let's reuse it.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Id4625a783747ce2e4ebaf69a5fa3812077a79639

diff --git a/Kconfig b/Kconfig
index bb9459593e..1345a0671c 100644
--- a/Kconfig
+++ b/Kconfig
@@ -362,16 +362,6 @@ config SPL_SYS_DCACHE_OFF
 	  Disable SPL dcache. Please make sure CONFIG_SPL_SYS_MALLOC_F_LEN
 	  is large enough to malloc TLB and bd_t buffer while enabling dcache.
 
-config SPL_FIT_LOAD_KERNEL
-	bool "Support load kernel FIT in SPL"
-	help
-	  Support load kernel FIT in SPL accordding to platform selection.
-
-config SPL_FIT_LOAD_KERNEL_SECTOR
-	hex "Sector address to load kernel in SPL"
-	depends on !SPL_LIBDISK_SUPPORT && SPL_FIT_LOAD_KERNEL
-	default 0xa000
-
 endif # SPL
 
 endif # FIT
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index dc04e528e6..8f2ff1a0d9 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -209,7 +209,7 @@ config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_TYPE
 
 config SPL_MISC_SECTOR
 	hex "Sector address to load misc in SPL"
-	depends on !SPL_LIBDISK_SUPPORT && SPL_FIT_LOAD_KERNEL
+	depends on !SPL_LIBDISK_SUPPORT && SPL_KERNEL_BOOT
 	default 0x8000
 
 config SPL_CRC32_SUPPORT
@@ -855,7 +855,12 @@ config SPL_KERNEL_BOOT
 	help
 	  Enable boot kernel in SPL.
 
-if SPL_KERNEL_BOOT
+config SPL_KERNEL_BOOT_SECTOR
+	hex "Sector address to load kernel in SPL"
+	depends on SPL_KERNEL_BOOT
+	default 0xa000
+
+if SPL_LOAD_RKFW
 config SPL_KERNEL_ADDR
 	hex "Kernel load address in spl"
 	depends on SPL
diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 866f4b7c7d..70e76d1edf 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -412,7 +412,7 @@ static void *spl_fit_load_blob(struct spl_load_info *info,
 	return fit;
 }
 
-#ifdef CONFIG_SPL_FIT_LOAD_KERNEL
+#ifdef CONFIG_SPL_KERNEL_BOOT
 #ifdef CONFIG_SPL_LIBDISK_SUPPORT
 __weak const char *spl_kernel_partition(struct spl_image_info *spl,
 					struct spl_load_info *info)
@@ -456,7 +456,7 @@ static int spl_load_kernel_fit(struct spl_image_info *spl_image,
 	}
 	sector = part_info.start;
 #else
-	sector = CONFIG_SPL_FIT_LOAD_KERNEL_SECTOR;
+	sector = CONFIG_SPL_KERNEL_BOOT_SECTOR;
 #endif
 	if (info->read(info, sector, 1, &fit_header) != 1) {
 		debug("%s: no memory\n", __func__);
@@ -515,12 +515,23 @@ static int spl_load_kernel_fit(struct spl_image_info *spl_image,
 		if (!strcmp(images[i], FIT_FDT_PROP))
 			spl_image->fdt_addr = (void *)image_info.load_addr;
 		else if (!strcmp(images[i], FIT_KERNEL_PROP))
+#if CONFIG_IS_ENABLED(OPTEE)
 			spl_image->entry_point_os = image_info.load_addr;
+#endif
+#if CONFIG_IS_ENABLED(ATF)
+			spl_image->entry_point_bl33 = image_info.load_addr;
+#endif
 	}
 
-	debug("entry_point=0x%08lx, entry_point_os=0x%08lx, fdt_addr=0x%08lx\n",
-	      spl_image->entry_point, spl_image->entry_point_os,
-	      (ulong)spl_image->fdt_addr);
+	debug("fdt_addr=0x%08lx, entry_point=0x%08lx, entry_point_os=0x%08lx\n",
+	      (ulong)spl_image->fdt_addr,
+	      spl_image->entry_point,
+#if CONFIG_IS_ENABLED(OPTEE)
+	      spl_image->entry_point_os);
+#endif
+#if CONFIG_IS_ENABLED(ATF)
+	      spl_image->entry_point_bl33);
+#endif
 
 	return 0;
 }
@@ -752,7 +763,7 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 		ret = spl_internal_load_simple_fit(spl_image, info,
 						   sector_offs, fit);
 		if (!ret) {
-#ifdef CONFIG_SPL_FIT_LOAD_KERNEL
+#ifdef CONFIG_SPL_KERNEL_BOOT
 			ret = spl_load_kernel_fit(spl_image, info);
 #endif
 			return ret;
diff --git a/include/spl.h b/include/spl.h
index 9a6a7537cc..4238d8da27 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -338,7 +338,7 @@ int spl_board_prepare_for_jump(struct spl_image_info *spl_image);
 /**
  * spl_kernel_partition() - arch/board-specific callback to get kernel partition
  */
-#ifdef CONFIG_SPL_FIT_LOAD_KERNEL
+#ifdef CONFIG_SPL_KERNEL_BOOT
 const char *spl_kernel_partition(struct spl_image_info *spl,
 				 struct spl_load_info *info);
 #endif

commit 45d851f407c2f98952d6add88931775a08c2def1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 13 15:05:12 2020 +0800

    common: spl: show total time of SPL
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I93de59f4064a2579f8010da2655607f45840f8ed

diff --git a/common/spl/spl.c b/common/spl/spl.c
index b53b789e2d..55a550322b 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -563,13 +563,13 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 		break;
 #if CONFIG_IS_ENABLED(ATF)
 	case IH_OS_ARM_TRUSTED_FIRMWARE:
-		printf("Jumping to U-Boot via ARM Trusted Firmware\n\n");
+		printf("Jumping to U-Boot via ARM Trusted Firmware\n");
 		spl_invoke_atf(&spl_image);
 		break;
 #endif
 #if CONFIG_IS_ENABLED(OPTEE)
 	case IH_OS_OP_TEE:
-		printf("Jumping to U-Boot(0x%08lx) via OP-TEE(0x%08lx)\n\n",
+		printf("Jumping to U-Boot(0x%08lx) via OP-TEE(0x%08lx)\n",
 		       (ulong)spl_image.entry_point_os,
 		       (ulong)spl_image.entry_point);
 		spl_cleanup_before_jump(&spl_image);
@@ -679,6 +679,8 @@ ulong spl_relocate_stack_gd(void)
 /* cleanup before jump to next stage */
 void spl_cleanup_before_jump(struct spl_image_info *spl_image)
 {
+	ulong us;
+
 	spl_board_prepare_for_jump(spl_image);
 
 	disable_interrupts();
@@ -698,4 +700,7 @@ void spl_cleanup_before_jump(struct spl_image_info *spl_image)
 
 	dsb();
 	isb();
+
+	us = (get_ticks() - gd->sys_start_tick) / 24UL;
+	printf("Total: %ld.%ld ms\n\n", us / 1000, us % 1000);
 }

commit e220d75725097975b5ebabc1f68e209fe87f9c4f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 13 15:06:03 2020 +0800

    rockchip: spl: initial start tick of SPL total time
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ia46ea33e688109658c34b4a95e45e7e88c25fb31

diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index 5e77f46f08..bfa48e0678 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -169,7 +169,7 @@ void board_init_f(ulong dummy)
 	debug_uart_init();
 	printascii("U-Boot SPL board init");
 #endif
-
+	gd->sys_start_tick = get_ticks();
 #ifdef CONFIG_SPL_FRAMEWORK
 	ret = spl_early_init();
 	if (ret) {

commit 8353750512fcc81f64aadd757d04a52b8510fb10
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 13 15:13:41 2020 +0800

    misc: decompress: wait complete before stop for sync
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ia70003e9fe2f27b6834324edabae095b6b9c21b7

diff --git a/drivers/misc/misc_decompress.c b/drivers/misc/misc_decompress.c
index 4cce52b838..23fc5e2042 100644
--- a/drivers/misc/misc_decompress.c
+++ b/drivers/misc/misc_decompress.c
@@ -166,7 +166,7 @@ int misc_decompress_cleanup(void)
 			continue;
 
 		if (misc_decomp_sync & cap) {
-			ret = ops->ioctl(dev, IOCTL_REQ_STOP, NULL);
+			ret = misc_decompress_finish(dev, cap);
 			if (ret) {
 				printf("Failed to stop decompress: %s, ret=%d\n",
 				       dev->name, ret);

commit 9f59c154c424dc5ba7674838dfd6d6c3aa1305eb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Aug 12 09:23:17 2020 +0800

    misc: rockchip decompress: support invalidate dcache
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I668fc041083c1547357d0556cb483b6ab2f58b5a

diff --git a/drivers/misc/rockchip_decompress.c b/drivers/misc/rockchip_decompress.c
index b9ad3c4a3e..7ef14310b2 100644
--- a/drivers/misc/rockchip_decompress.c
+++ b/drivers/misc/rockchip_decompress.c
@@ -110,17 +110,13 @@ static int rockchip_decom_start(struct udevice *dev, void *buf)
 			      CONFIG_SYS_CACHELINE_SIZE);
 		flush_cache(align_input, align_len);
 
-		/*
-		 * dst: actually we prefer to invalidate dcache after decompress
-		 * done, but it seems there is not cache invalidate API for us.
-		 * so let's flush this area.
-		 */
+		/* dst: invalidate dcache */
 		align_input =
 		     round_down(param->addr_dst, CONFIG_SYS_CACHELINE_SIZE);
 		align_len =
 		     round_up(param->size_src + (param->addr_dst - align_input),
 			      CONFIG_SYS_CACHELINE_SIZE);
-		flush_cache(align_input, align_len);
+		invalidate_dcache_range(align_input, align_len);
 	}
 
 	priv->done = false;

commit e1e885d3994947e75ba99272989e982044a01cf1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Aug 12 09:21:03 2020 +0800

    misc: decompress: correct size_src and size_dst usage
    
    We misunderstood the size_src as decompressed image size.
    
    Without this patch, the decompress can work normally, but
    it wastes the time to flush data cache. Let's correct it
    for thunder boot version to save boot time.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I93014ccec7814faec5abbe96b383bc1170cdb0e2

diff --git a/drivers/misc/misc_decompress.c b/drivers/misc/misc_decompress.c
index 6188135846..4cce52b838 100644
--- a/drivers/misc/misc_decompress.c
+++ b/drivers/misc/misc_decompress.c
@@ -90,8 +90,10 @@ int misc_decompress_start(struct udevice *dev, unsigned long dst,
 		return -EPERM;
 	}
 
-	param.size_src = misc_get_data_size(src, src_len, param.mode);
-	if (!param.size_src)
+	param.size_src = src_len;
+	param.size_dst = misc_get_data_size(src, src_len, param.mode);
+
+	if (!param.size_src || !param.size_dst)
 		return -EINVAL;
 
 	return misc_ioctl(dev, IOCTL_REQ_START, &param);
diff --git a/drivers/misc/rockchip_decompress.c b/drivers/misc/rockchip_decompress.c
index 6a15b2d0de..b9ad3c4a3e 100644
--- a/drivers/misc/rockchip_decompress.c
+++ b/drivers/misc/rockchip_decompress.c
@@ -92,8 +92,8 @@ static int rockchip_decom_start(struct udevice *dev, void *buf)
 {
 	struct rockchip_decom_priv *priv = dev_get_priv(dev);
 	struct decom_param *param = (struct decom_param *)buf;
-	unsigned int limit_lo = param->size_src & 0xffffffff;
-	unsigned int limit_hi = param->size_src >> 32;
+	unsigned int limit_lo = param->size_dst & 0xffffffff;
+	unsigned int limit_hi = param->size_dst >> 32;
 	ulong align_input, align_len;
 
 #if CONFIG_IS_ENABLED(DM_RESET)
diff --git a/include/misc.h b/include/misc.h
index ac91fc09da..501148dc56 100644
--- a/include/misc.h
+++ b/include/misc.h
@@ -150,8 +150,8 @@ int misc_otp_write(struct udevice *dev, int offset, const void *buf, int size);
 struct decom_param {
 	unsigned long addr_src;
 	unsigned long addr_dst;
-	u64 size_src;
-	u64 size_dst;	/* to be filled for output */
+	u64 size_src;	/* compressed */
+	u64 size_dst;	/* decompressed, to be filled for output */
 	enum misc_mode mode;
 };
 

commit a7ff7f48d1ffd3482cbdbc0e2178b69fe0bfa1c5
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed Aug 19 20:43:58 2020 +0800

    mtd: spi-nand: Support TC58CVG0S3HRAIJ and TC58CVG1S3HRAIJ
    
    Change-Id: I11d36cc2d17b4d8ae59d405b0177ec34f74bb704
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/toshiba.c b/drivers/mtd/nand/spi/toshiba.c
index 571104a5d9..a44f96f89f 100644
--- a/drivers/mtd/nand/spi/toshiba.c
+++ b/drivers/mtd/nand/spi/toshiba.c
@@ -157,6 +157,26 @@ static const struct spinand_info toshiba_spinand_table[] = {
 		     0,
 		     SPINAND_ECCINFO(&tc58cxgxsx_ooblayout,
 				     tc58cxgxsx_ecc_get_status)),
+	/* 3.3V 1Gb */
+	SPINAND_INFO("TC58CVG0S3HRAIJ", 0xE2,
+		     NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     0,
+		     SPINAND_ECCINFO(&tc58cxgxsx_ooblayout,
+				     tc58cxgxsx_ecc_get_status)),
+	/* 3.3V 2Gb */
+	SPINAND_INFO("TC58CVG1S3HRAIJ", 0xEB,
+		     NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     0,
+		     SPINAND_ECCINFO(&tc58cxgxsx_ooblayout,
+				     tc58cxgxsx_ecc_get_status)),
 };
 
 static int toshiba_spinand_detect(struct spinand_device *spinand)

commit a3c5f2d549df9dbea25af195a8a262b508dbb5f0
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Thu Aug 20 09:48:53 2020 +0800

    video/drm: inno_mipi_phy: adjust timings for rv1126
    
    According to the spec, phy version of rv1126 is the
    same as rk1808, LPX parameters need to be specified.
    
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
    Change-Id: I75cf9db0b3763237727f3ebf3576929a3cb9cea8

diff --git a/drivers/video/drm/inno_mipi_phy.c b/drivers/video/drm/inno_mipi_phy.c
index 5281513c35..0a056c802d 100644
--- a/drivers/video/drm/inno_mipi_phy.c
+++ b/drivers/video/drm/inno_mipi_phy.c
@@ -193,9 +193,10 @@ static const u32 lane_reg_offset[] = {
 	[DATA_LANE_3] = INNO_DATA_LANE_3_REG_BASE,
 };
 
-#define FIXED_PARAM(_freq, _prepare, _clk_zero, _data_zero, _trail)	\
+#define FIXED_PARAM(_freq, _lpx, _prepare, _clk_zero, _data_zero, _trail)	\
 {	\
 	.max_freq = _freq,	\
+	.lpx = _lpx,	\
 	.hs_prepare = _prepare,	\
 	.clk_lane = {	\
 		.hs_zero = _clk_zero,	\
@@ -208,6 +209,7 @@ static const u32 lane_reg_offset[] = {
 
 struct fixed_param {
 	unsigned int max_freq;
+	u8 lpx;
 	u8 hs_prepare;
 	struct {
 		u8 hs_zero;
@@ -219,35 +221,35 @@ struct fixed_param {
 };
 
 static const struct fixed_param fixed_param_table[] = {
-	FIXED_PARAM(110, 0x20, 0x16, 0x02, 0x22),
-	FIXED_PARAM(150, 0x06, 0x16, 0x03, 0x45),
-	FIXED_PARAM(200, 0x18, 0x17, 0x04, 0x0b),
-	FIXED_PARAM(250, 0x05, 0x17, 0x05, 0x16),
-	FIXED_PARAM(300, 0x51, 0x18, 0x06, 0x2c),
-	FIXED_PARAM(400, 0x64, 0x19, 0x07, 0x33),
-	FIXED_PARAM(500, 0x20, 0x1b, 0x07, 0x4e),
-	FIXED_PARAM(600, 0x6a, 0x1d, 0x08, 0x3a),
-	FIXED_PARAM(700, 0x3e, 0x1e, 0x08, 0x6a),
-	FIXED_PARAM(800, 0x21, 0x1f, 0x09, 0x29),
-	FIXED_PARAM(1000, 0x09, 0x20, 0x09, 0x27)
+	FIXED_PARAM(110, 0x0, 0x20, 0x16, 0x02, 0x22),
+	FIXED_PARAM(150, 0x0, 0x06, 0x16, 0x03, 0x45),
+	FIXED_PARAM(200, 0x0, 0x18, 0x17, 0x04, 0x0b),
+	FIXED_PARAM(250, 0x0, 0x05, 0x17, 0x05, 0x16),
+	FIXED_PARAM(300, 0x0, 0x51, 0x18, 0x06, 0x2c),
+	FIXED_PARAM(400, 0x0, 0x64, 0x19, 0x07, 0x33),
+	FIXED_PARAM(500, 0x0, 0x20, 0x1b, 0x07, 0x4e),
+	FIXED_PARAM(600, 0x0, 0x6a, 0x1d, 0x08, 0x3a),
+	FIXED_PARAM(700, 0x0, 0x3e, 0x1e, 0x08, 0x6a),
+	FIXED_PARAM(800, 0x0, 0x21, 0x1f, 0x09, 0x29),
+	FIXED_PARAM(1000, 0x0, 0x09, 0x20, 0x09, 0x27)
 };
 
 static const struct fixed_param rk1808_fixed_param_table[] = {
-	FIXED_PARAM(110, 0x7f, 0x16, 0x02, 0x02),
-	FIXED_PARAM(150, 0x7f, 0x16, 0x03, 0x02),
-	FIXED_PARAM(200, 0x7f, 0x17, 0x04, 0x02),
-	FIXED_PARAM(250, 0x7f, 0x17, 0x05, 0x04),
-	FIXED_PARAM(300, 0x7f, 0x18, 0x06, 0x04),
-	FIXED_PARAM(400, 0x7e, 0x19, 0x07, 0x04),
-	FIXED_PARAM(500, 0x7c, 0x1b, 0x07, 0x08),
-	FIXED_PARAM(600, 0x70, 0x1d, 0x08, 0x10),
-	FIXED_PARAM(700, 0x40, 0x1e, 0x08, 0x30),
-	FIXED_PARAM(800, 0x02, 0x1f, 0x09, 0x30),
-	FIXED_PARAM(1000, 0x08, 0x20, 0x09, 0x30),
-	FIXED_PARAM(1400, 0x03, 0x32, 0x14, 0x0f),
-	FIXED_PARAM(1600, 0x42, 0x36, 0x0e, 0x0f),
-	FIXED_PARAM(1800, 0x47, 0x7a, 0x0e, 0x0f),
-	FIXED_PARAM(2000, 0x64, 0x7a, 0x0e, 0x0b),
+	FIXED_PARAM(110, 0x02, 0x7f, 0x16, 0x02, 0x02),
+	FIXED_PARAM(150, 0x02, 0x7f, 0x16, 0x03, 0x02),
+	FIXED_PARAM(200, 0x02, 0x7f, 0x17, 0x04, 0x02),
+	FIXED_PARAM(250, 0x02, 0x7f, 0x17, 0x05, 0x04),
+	FIXED_PARAM(300, 0x02, 0x7f, 0x18, 0x06, 0x04),
+	FIXED_PARAM(400, 0x03, 0x7e, 0x19, 0x07, 0x04),
+	FIXED_PARAM(500, 0x03, 0x7c, 0x1b, 0x07, 0x08),
+	FIXED_PARAM(600, 0x03, 0x70, 0x1d, 0x08, 0x10),
+	FIXED_PARAM(700, 0x05, 0x40, 0x1e, 0x08, 0x30),
+	FIXED_PARAM(800, 0x05, 0x02, 0x1f, 0x09, 0x30),
+	FIXED_PARAM(1000, 0x05, 0x08, 0x20, 0x09, 0x30),
+	FIXED_PARAM(1400, 0x09, 0x03, 0x32, 0x14, 0x0f),
+	FIXED_PARAM(1600, 0x0d, 0x42, 0x36, 0x0e, 0x0f),
+	FIXED_PARAM(1800, 0x0e, 0x47, 0x7a, 0x0e, 0x0f),
+	FIXED_PARAM(2000, 0x11, 0x64, 0x7a, 0x0e, 0x0b),
 };
 
 static inline void inno_write(struct inno_mipi_dphy *inno, u32 reg, u32 val)
@@ -389,6 +391,9 @@ static void inno_mipi_dphy_get_fixed_param(struct inno_mipi_dphy_timing *t,
 
 	t->hs_prepare = param->hs_prepare;
 	t->hs_trail = param->hs_trail;
+
+	if (soc_type == RK1808_MIPI_DPHY)
+		t->lpx = param->lpx;
 }
 
 static void inno_mipi_dphy_lane_timing_init(struct inno_mipi_dphy *inno,
@@ -427,9 +432,12 @@ static void inno_mipi_dphy_lane_timing_init(struct inno_mipi_dphy *inno,
 	data.clk_pre = DIV_ROUND_UP(timing.clkpre * txbyteclk, NSEC_PER_SEC);
 	data.wakup_h = 0x3;
 	data.wakup_l = 0xff;
-	data.lpx = DIV_ROUND_UP(txbyteclk * timing.lpx, NSEC_PER_SEC);
-	if (data.lpx > 2)
-		data.lpx -= 2;
+
+	if (phy->soc_type == RV1108_MIPI_DPHY) {
+		data.lpx = DIV_ROUND_UP(txbyteclk * timing.lpx, NSEC_PER_SEC);
+		if (data.lpx > 2)
+			data.lpx -= 2;
+	}
 
 	/*
 	 * Ttxclkesc * val >= Tta-go
@@ -716,7 +724,7 @@ static const struct udevice_id inno_mipi_dphy_ids[] = {
 	},
 	{
 		.compatible = "rockchip,rv1126-mipi-dphy",
-		.data = (ulong)&inno_mipi_dphy_driver_data,
+		.data = (ulong)&rk1808_inno_mipi_dphy_driver_data,
 	},
 	{}
 };

commit 7dbcb7a21d7950c3c51c1546fae737b45b18420e
Author: Elon Zhang <zhangzj@rock-chips.com>
Date:   Tue Aug 18 09:04:49 2020 +0800

    lib: optee_client: add README
    
    Add README file to record some important information of optee_client.
    
    Signed-off-by: Elon Zhang <zhangzj@rock-chips.com>
    Change-Id: I66788f021d38c4617c87b46b6e3640ed7dd9e22f

diff --git a/lib/optee_clientApi/README b/lib/optee_clientApi/README
new file mode 100644
index 0000000000..4f40418b24
--- /dev/null
+++ b/lib/optee_clientApi/README
@@ -0,0 +1,74 @@
+#
+# Copyright (c) 2020, Rockchip Electronics Co., Ltd.
+# Written by Elon Zhang <zhangzj@rock-chips.com>
+#
+# SPDX-License-Identifier:      GPL-2.0+
+#
+
+OP-TEE Client in U-Boot
+==========================
+OP-TEE Client in U-Boot is responsible for communication managerment
+between Secure World(OP-TEE) and Non-Secure World(U-Boot).
+
+
+Change Log
+==========================
+2020.8 Update OP-TEE message protocol
+
+OP-TEE message protocol is updated from version 1 to version 2
+on platform RK312x/RK322x/RK3288/RK3399/RK3399Pro/RK3368/RK3328/RK3228H.
+
+This message protocol update involves some software component, including
+OP-TEE(trust.img), U-Boot, Kernel, binary&library in Android/Linux.
+The software component above **MUST** be consistent because OP-TEE message
+protocol v1 and v2 are not compatible, otherwise TEE related function
+will **NOT** work normally.
+
+One Very Important Change:
+
+	MMU policy for share memory between REE and TEE
+	+-------+-----------------+----------------+
+	| arch  |  before update  |  after update  |
+	+-------+-----------------+----------------+
+	| arm64 | dcache enabled  | dcache enabled |
+	+-------+-----------------+----------------+
+	|  arm  | dcache disabled | dcache enabled |
+	+-------+-----------------+----------------+
+
+Related commits are shown below:
+
+1. rkbin
+	c20711e rk3036: tee: update optee version to v2.00
+	cb7d8f9 rk322x: tee with ta: update optee version to v2.11
+	4f9488e rk3128x: tee with ta: update optee version to v2.11
+	6d6473c rk312x: tee with ta: update optee version to v2.01
+	c0b025b rk3288: tee with ta: update optee version to v2.01
+	664ccee rk3228h/rk3328: bl32: update version to 2.01
+	6334115 rk3368: bl32: update version to 2.01
+	ccf1bef rk3399pro: bl32: update version to 2.01
+	8c01e53 rk3399: bl32: update version to 2.01
+
+2. uboot
+	7a349fdcbd lib: optee_client: add optee initialize flag
+	74eb602743 lib: optee_client: update to new optee msg for optee v1 platform
+	102dfafc4a rochchip: board: map op-tee memory as dcache enabled
+	396e3049bd rochchip: board: only map op-tee share memory as dcache enabled
+
+3. kernel
+	1) 4.19
+		90928381ffa9 ARM: dts: rockchip: add firmware and optee node
+		d752a21c0853 arm64: dts: rockchip: add firmware and optee node
+		c31ab35ad86d ARM: rockchip_defconfig: enable CONFIG_TEE and CONFIG_OPTEE
+
+4. Android
+	1) Android 10
+	repo: android/rk/platform/vendor/rockchip/common
+		a515160d optee: v1 rebuild ca/ta to support new OP-TEE MSG
+		4fc68259 optee v1: arm&arm64: update tee-supplicant and libteec.so
+		a515160d optee: v1 rebuild ca/ta to support new OP-TEE MSG
+	repo: android/rk/hardware/rk29/weaver
+		26c9dd9b rebuild libRkTeeWeaver.v1.so for new OP-TEE MSG
+
+5. Linux
+	repo: linux/security/bin
+		f59085c optee_v1: lib: arm&arm64: update binary and library

commit 01c0df48f98d5d3daf7d7df2c2af2acc9c6e68cb
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Aug 17 15:11:50 2020 +0800

    common: android: decrease ab tries count after load firmware successfully
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I31842eda26f05b03ea6a0274502a60814e00e6a0

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 4ed65e8f76..2ab9ae27d4 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -158,18 +158,39 @@ static void update_root_uuid_if_android_ab(void)
 	}
 }
 
-static int decrease_tries_if_android_ab(char *slot_suffix)
+static int get_slot_suffix_if_android_ab(char *slot_suffix)
+{
+	/* TODO: get from pre-loader or misc partition */
+	if (rk_avb_get_current_slot(slot_suffix)) {
+		printf("rk_avb_get_current_slot() failed\n");
+		return -1;
+	}
+
+	if (slot_suffix[0] != '_') {
+#ifndef CONFIG_ANDROID_AVB
+		printf("###There is no bootable slot, bring up lastboot!###\n");
+		if (rk_get_lastboot() == 1)
+			memcpy(slot_suffix, "_b", 2);
+		else if (rk_get_lastboot() == 0)
+			memcpy(slot_suffix, "_a", 2);
+		else
+#endif
+			return -1;
+	}
+
+	return 0;
+}
+
+static int decrease_tries_if_android_ab(void)
 {
 	AvbABData ab_data_orig;
 	AvbABData ab_data;
+	char slot_suffix[3] = {0};
 	AvbOps *ops;
 	size_t slot_index = 0;
 
-	/* TODO: get from pre-loader or misc partition */
-	if (rk_avb_get_current_slot(slot_suffix)) {
-		printf("rk_avb_get_current_slot() failed\n");
+	if (get_slot_suffix_if_android_ab(slot_suffix))
 		return -1;
-	}
 
 	if (!strncmp(slot_suffix, "_a", 2))
 		slot_index = 0;
@@ -199,23 +220,12 @@ static int decrease_tries_if_android_ab(char *slot_suffix)
 		return -1;
 	}
 
-	if (slot_suffix[0] != '_') {
-#ifndef CONFIG_ANDROID_AVB
-		printf("###There is no bootable slot, bring up lastboot!###\n");
-		if (rk_get_lastboot() == 1)
-			memcpy(slot_suffix, "_b", 2);
-		else if (rk_get_lastboot() == 0)
-			memcpy(slot_suffix, "_a", 2);
-		else
-#endif
-			return -1;
-	}
-
 	return 0;
 }
 #else
 static inline void update_root_uuid_if_android_ab(void) {}
-static inline int decrease_tries_if_android_ab(char *slot_suffix) { return 0; }
+static int get_slot_suffix_if_android_ab(char *slot_suffix) { return 0; }
+static inline int decrease_tries_if_android_ab(void) { return 0; }
 #endif
 
 #if defined(CONFIG_ANDROID_AB) && defined(CONFIG_ANDROID_AVB)
@@ -793,17 +803,6 @@ static AvbSlotVerifyResult android_slot_verify(char *boot_partname,
 	}
 
 out:
-#if defined(CONFIG_ANDROID_AB) && !defined(CONFIG_ANDROID_AVB)
-	/*
-	 * In ab & avb process, the tries_remaining minus one in function
-	 * android_slot_verify, shield this function here.
-	 */
-	/* ... and decrement tries remaining, if applicable. */
-	if (!ab_data.slots[slot_index_to_boot].successful_boot &&
-	    ab_data.slots[slot_index_to_boot].tries_remaining > 0) {
-		ab_data.slots[slot_index_to_boot].tries_remaining -= 1;
-	}
-#endif
 	env_update("bootargs", verify_state);
 	if (save_metadata_if_changed(ops->ab_ops, &ab_data, &ab_data_orig)) {
 		printf("Can not save metadata\n");
@@ -1120,7 +1119,7 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	printf("ANDROID: reboot reason: \"%s\"\n", android_boot_mode_str(mode));
 
 	/* Get current slot_suffix */
-	if (decrease_tries_if_android_ab(slot_suffix))
+	if (get_slot_suffix_if_android_ab(slot_suffix))
 		return -1;
 
 	switch (mode) {
@@ -1253,6 +1252,10 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	if (trusty_notify_optee_uboot_end())
 		printf("Close optee client failed!\n");
 #endif
+
+	if (decrease_tries_if_android_ab())
+		printf("Decrease ab tries count fail!\n");
+
 	android_bootloader_boot_kernel(load_address);
 
 	/* TODO: If the kernel doesn't boot mark the selected slot as bad. */

commit 396e3049bd88ad9273f7077b1396f0bc5703401a
Author: Elon Zhang <zhangzj@rock-chips.com>
Date:   Fri Aug 14 10:59:13 2020 +0800

    rochchip: board: only map op-tee share memory as dcache enabled
    
    The cache fixup is for the data coherence when communication
    between U-Boot and OP-TEE. And data abort exception appeares on
    OP-TEE V1 32bit platform due to unknown reason.
    So only the share memory need be mapped as dcache enabled.
    
    Signed-off-by: Elon Zhang <zhangzj@rock-chips.com>
    Change-Id: I92b62ef5fbdf47adc0328a14034a5861e8e77fed

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index fa70b3366b..573bad48b2 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -35,6 +35,7 @@
 #include <power/charge_display.h>
 #include <power/regulator.h>
 #include <optee_include/OpteeClientInterface.h>
+#include <optee_include/OpteeClientApiLib.h>
 #include <optee_include/tee_api_defines.h>
 #include <asm/arch/boot_mode.h>
 #include <asm/arch/clock.h>
@@ -419,7 +420,7 @@ int board_fdt_fixup(void *blob)
 #if defined(CONFIG_ARM64_BOOT_AARCH32) || !defined(CONFIG_ARM64)
 /*
  * Common for OP-TEE:
- *	64-bit & 32-bit mode: dcache is always enabled;
+ *	64-bit & 32-bit mode: share memory dcache is always enabled;
  *
  * Common for U-Boot:
  *	64-bit mode: MMU table is static defined in rkxxx.c file, all memory
@@ -433,16 +434,21 @@ int board_fdt_fixup(void *blob)
  * For the data coherence when communication between U-Boot and OP-TEE, U-Boot
  * should follow OP-TEE MMU policy.
  *
- * So 32-bit mode U-Boot should map OP-TEE memory as dcache enabled.
+ * So 32-bit mode U-Boot should map OP-TEE share memory as dcache enabled.
  */
 int board_initr_caches_fixup(void)
 {
+#ifdef CONFIG_OPTEE_CLIENT
 	struct memblock mem;
 
-	mem = param_parse_optee_mem();
+	mem.base = 0;
+	mem.size = 0;
+
+	optee_get_shm_config(&mem.base, &mem.size);
 	if (mem.size)
 		mmu_set_region_dcache_behaviour(mem.base, mem.size,
 						DCACHE_WRITEBACK);
+#endif
 	return 0;
 }
 #endif
diff --git a/include/optee_include/OpteeClientApiLib.h b/include/optee_include/OpteeClientApiLib.h
index 8c68643e29..bf044336f4 100644
--- a/include/optee_include/OpteeClientApiLib.h
+++ b/include/optee_include/OpteeClientApiLib.h
@@ -11,5 +11,6 @@
 #include <optee_include/tee_client_api.h>
 
 TEEC_Result OpteeClientApiLibInitialize(void);
+void optee_get_shm_config(phys_addr_t *base, phys_size_t *size);
 
 #endif /*_OPTEE_CLIENT_APILIB_H_*/
diff --git a/lib/optee_clientApi/OpteeClientApiLib.c b/lib/optee_clientApi/OpteeClientApiLib.c
index 9429389b21..aa042859e9 100644
--- a/lib/optee_clientApi/OpteeClientApiLib.c
+++ b/lib/optee_clientApi/OpteeClientApiLib.c
@@ -39,6 +39,18 @@ static bool optee_api_revision_is_compatible(void)
 	}
 }
 
+void optee_get_shm_config(phys_addr_t *base, phys_size_t *size)
+{
+	ARM_SMC_ARGS ArmSmcArgs = {0};
+
+	ArmSmcArgs.Arg0 = OPTEE_SMC_GET_SHM_CONFIG_V2;
+
+	tee_smc_call(&ArmSmcArgs);
+
+	*base = ArmSmcArgs.Arg1;
+	*size = ArmSmcArgs.Arg2;
+}
+
 /*
  * Initlialize the library
  */

commit eee28ceac9614a7564ee3c276de329f935111df9
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Tue Jul 21 15:49:55 2020 +0800

    drm/rockchip: clearly to point out error log
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: I9848cdaadcb9aa6b9ccb40f7179a000a1bc6cc00

diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index c84ffe3b7e..aa3d0c5f9c 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -660,11 +660,9 @@ static int rockchip_vop_set_plane(struct display_state *state)
 	int xvir = crtc_state->xvir;
 	int x_mirror = 0, y_mirror = 0;
 
-	if ((crtc_w > crtc_state->max_output.width) ||
-	    (crtc_h > crtc_state->max_output.height)){
-		printf("Maximum destination %dx%d exceeded\n",
-		       crtc_state->max_output.width,
-		       crtc_state->max_output.height);
+	if (crtc_w > crtc_state->max_output.width) {
+		printf("ERROR: output w[%d] exceeded max width[%d]\n",
+		       crtc_w, crtc_state->max_output.width);
 		return -EINVAL;
 	}
 

commit f8436d0541753852ef72ea5242b33681568a1740
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Jul 22 10:22:17 2020 +0800

    video/drm: Add dsi driver for rk618
    
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
    Change-Id: Id8a7044352835fc4a6f733c6cf7a3d318f7f8c56

diff --git a/drivers/video/drm/Makefile b/drivers/video/drm/Makefile
index 7d704d0e1c..ccc0bafff4 100644
--- a/drivers/video/drm/Makefile
+++ b/drivers/video/drm/Makefile
@@ -20,5 +20,5 @@ obj-$(CONFIG_DRM_ROCKCHIP_ANALOGIX_DP) += analogix_dp.o analogix_dp_reg.o
 obj-$(CONFIG_DRM_ROCKCHIP_LVDS) += rockchip_lvds.o
 obj-$(CONFIG_DRM_ROCKCHIP_RGB) += rockchip_rgb.o
 obj-$(CONFIG_DRM_ROCKCHIP_PANEL) += rockchip_panel.o
-obj-$(CONFIG_DRM_ROCKCHIP_RK618) += rk618.o rk618_lvds.o
+obj-$(CONFIG_DRM_ROCKCHIP_RK618) += rk618.o rk618_lvds.o rk618_dsi.o
 obj-$(CONFIG_DRM_ROCKCHIP_RK1000) += rk1000.o rk1000_tve.o
diff --git a/drivers/video/drm/rk618.c b/drivers/video/drm/rk618.c
index 549be4abc4..e92b73a4b2 100644
--- a/drivers/video/drm/rk618.c
+++ b/drivers/video/drm/rk618.c
@@ -103,7 +103,7 @@ static int rk618_power_on(struct rk618 *rk618)
 static void rk618_cru_init(struct rk618 *rk618)
 {
 	rk618_i2c_write(rk618, 0x0058, 0xffff0000);
-	rk618_i2c_write(rk618, 0x005c, 0xffff1d1e);
+	rk618_i2c_write(rk618, 0x005c, 0xffff191e);
 	rk618_i2c_write(rk618, 0x0060, 0x00000000);
 	rk618_i2c_write(rk618, 0x0064, 0xffff2186);
 	rk618_i2c_write(rk618, 0x0068, 0xffff1028);
diff --git a/drivers/video/drm/rk618_dsi.c b/drivers/video/drm/rk618_dsi.c
new file mode 100644
index 0000000000..3a946b4227
--- /dev/null
+++ b/drivers/video/drm/rk618_dsi.c
@@ -0,0 +1,1068 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2020 Rockchip Electronics Co., Ltd
+ *
+ * Author: Wyon Bi <bivvy.bi@rock-chips.com>
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/device-internal.h>
+#include <drm/drm_mipi_dsi.h>
+#include <video_bridge.h>
+#include <asm/unaligned.h>
+#include <linux/math64.h>
+
+#include "rockchip_display.h"
+#include "rockchip_bridge.h"
+#include "rk618.h"
+
+/* host registers */
+#define HOSTREG(x)		((x) + 0x1000)
+#define DSI_VERSION		HOSTREG(0x0000)
+#define DSI_PWR_UP		HOSTREG(0x0004)
+#define SHUTDOWNZ		BIT(0)
+#define POWER_UP		BIT(0)
+#define RESET			0
+#define DSI_CLKMGR_CFG		HOSTREG(0x0008)
+#define TO_CLK_DIVIDSION(x)	UPDATE(x, 15, 8)
+#define TX_ESC_CLK_DIVIDSION(x)	UPDATE(x, 7, 0)
+#define DSI_DPI_CFG		HOSTREG(0x000c)
+#define EN18_LOOSELY		BIT(10)
+#define COLORM_ACTIVE_LOW	BIT(9)
+#define SHUTD_ACTIVE_LOW	BIT(8)
+#define HSYNC_ACTIVE_LOW	BIT(7)
+#define VSYNC_ACTIVE_LOW	BIT(6)
+#define DATAEN_ACTIVE_LOW	BIT(5)
+#define DPI_COLOR_CODING(x)	UPDATE(x, 4, 2)
+#define DPI_VID(x)		UPDATE(x, 1, 0)
+#define DSI_PCKHDL_CFG		HOSTREG(0x0018)
+#define GEN_VID_RX(x)		UPDATE(x, 6, 5)
+#define EN_CRC_RX		BIT(4)
+#define EN_ECC_RX		BIT(3)
+#define EN_BTA			BIT(2)
+#define EN_EOTP_RX		BIT(1)
+#define EN_EOTP_TX		BIT(0)
+#define DSI_VID_MODE_CFG	HOSTREG(0x001c)
+#define LPCMDEN			BIT(12)
+#define FRAME_BTA_ACK		BIT(11)
+#define EN_NULL_PKT		BIT(10)
+#define EN_MULTI_PKT		BIT(9)
+#define EN_LP_HFP		BIT(8)
+#define EN_LP_HBP		BIT(7)
+#define EN_LP_VACT		BIT(6)
+#define EN_LP_VFP		BIT(5)
+#define EN_LP_VBP		BIT(4)
+#define EN_LP_VSA		BIT(3)
+#define VID_MODE_TYPE(x)	UPDATE(x, 2, 1)
+#define EN_VIDEO_MODE		BIT(0)
+#define DSI_VID_PKT_CFG		HOSTREG(0x0020)
+#define NULL_PKT_SIZE(x)	UPDATE(x, 30, 21)
+#define NUM_CHUNKS(x)		UPDATE(x, 20, 11)
+#define VID_PKT_SIZE(x)		UPDATE(x, 10, 0)
+#define DSI_CMD_MODE_CFG	HOSTREG(0x0024)
+#define TEAR_FX_EN		BIT(14)
+#define ACK_RQST_EN		BIT(13)
+#define DCS_LW_TX		BIT(12)
+#define GEN_LW_TX		BIT(11)
+#define MAX_RD_PKT_SIZE		BIT(10)
+#define DCS_SR_0P_TX		BIT(9)
+#define DCS_SW_1P_TX		BIT(8)
+#define DCS_SW_0P_TX		BIT(7)
+#define GEN_SR_2P_TX		BIT(6)
+#define GEN_SR_1P_TX		BIT(5)
+#define GEN_SR_0P_TX		BIT(4)
+#define GEN_SW_2P_TX		BIT(3)
+#define GEN_SW_1P_TX		BIT(2)
+#define GEN_SW_0P_TX		BIT(1)
+#define EN_CMD_MODE		BIT(0)
+#define DSI_TMR_LINE_CFG	HOSTREG(0x0028)
+#define HLINE_TIME(x)		UPDATE(x, 31, 18)
+#define HBP_TIME(x)		UPDATE(x, 17, 9)
+#define HSA_TIME(x)		UPDATE(x, 8, 0)
+#define DSI_VTIMING_CFG		HOSTREG(0x002c)
+#define V_ACTIVE_LINES(x)	UPDATE(x, 26, 16)
+#define VFP_LINES(x)		UPDATE(x, 15, 10)
+#define VBP_LINES(x)		UPDATE(x, 9, 4)
+#define VSA_LINES(x)		UPDATE(x, 3, 0)
+#define DSI_PHY_TMR_CFG		HOSTREG(0x0030)
+#define PHY_HS2LP_TIME(x)	UPDATE(x, 31, 24)
+#define PHY_LP2HS_TIME(x)	UPDATE(x, 23, 16)
+#define MAX_RD_TIME(x)		UPDATE(x, 14, 0)
+#define DSI_GEN_HDR		HOSTREG(0x0034)
+#define DSI_GEN_PLD_DATA	HOSTREG(0x0038)
+#define DSI_GEN_PKT_STATUS	HOSTREG(0x003c)
+#define GEN_RD_CMD_BUSY		BIT(6)
+#define GEN_PLD_R_FULL		BIT(5)
+#define GEN_PLD_R_EMPTY		BIT(4)
+#define GEN_PLD_W_FULL		BIT(3)
+#define GEN_PLD_W_EMPTY		BIT(2)
+#define GEN_CMD_FULL		BIT(1)
+#define GEN_CMD_EMPTY		BIT(0)
+#define DSI_TO_CNT_CFG		HOSTREG(0x0040)
+#define LPRX_TO_CNT(x)		UPDATE(x, 31, 16)
+#define HSTX_TO_CNT(x)		UPDATE(x, 15, 0)
+#define DSI_INT_ST0		HOSTREG(0x0044)
+#define DSI_INT_ST1		HOSTREG(0x0048)
+#define DSI_INT_MSK0		HOSTREG(0x004c)
+#define DSI_INT_MSK1		HOSTREG(0x0050)
+#define DSI_PHY_RSTZ		HOSTREG(0x0054)
+#define PHY_ENABLECLK		BIT(2)
+#define DSI_PHY_IF_CFG		HOSTREG(0x0058)
+#define PHY_STOP_WAIT_TIME(x)	UPDATE(x, 9, 2)
+#define N_LANES(x)		UPDATE(x, 1, 0)
+#define DSI_PHY_IF_CTRL		HOSTREG(0x005c)
+#define PHY_TX_TRIGGERS(x)	UPDATE(x, 8, 5)
+#define PHY_TXEXITULPSLAN	BIT(4)
+#define PHY_TXREQULPSLAN	BIT(3)
+#define PHY_TXEXITULPSCLK	BIT(2)
+#define PHY_RXREQULPSCLK	BIT(1)
+#define PHY_TXREQUESCLKHS	BIT(0)
+#define DSI_PHY_STATUS		HOSTREG(0x0060)
+#define ULPSACTIVENOT3LANE	BIT(12)
+#define PHYSTOPSTATE3LANE	BIT(11)
+#define ULPSACTIVENOT2LANE	BIT(10)
+#define PHYSTOPSTATE2LANE	BIT(9)
+#define ULPSACTIVENOT1LANE	BIT(8)
+#define PHYSTOPSTATE1LANE	BIT(7)
+#define RXULPSESC0LANE		BIT(6)
+#define ULPSACTIVENOT0LANE	BIT(5)
+#define PHYSTOPSTATE0LANE	BIT(4)
+#define PHYULPSACTIVENOTCLK	BIT(3)
+#define PHYSTOPSTATECLKLANE	BIT(2)
+#define PHYSTOPSTATELANE	(PHYSTOPSTATE0LANE | PHYSTOPSTATECLKLANE)
+#define PHYDIRECTION		BIT(1)
+#define PHYLOCK			BIT(0)
+#define DSI_LP_CMD_TIM		HOSTREG(0x0070)
+#define OUTVACT_LPCMD_TIME(x)	UPDATE(x, 15, 8)
+#define INVACT_LPCMD_TIME(x)	UPDATE(x, 7, 0)
+#define DSI_MAX_REGISTER	DSI_LP_CMD_TIM
+
+/* phy registers */
+#define PHYREG(x)		((x) + 0x0c00)
+#define MIPI_PHY_REG0		PHYREG(0x0000)
+#define LANE_EN_MASK		GENMASK(6, 2)
+#define LANE_EN_CK		BIT(6)
+#define MIPI_PHY_REG1		PHYREG(0x0004)
+#define REG_DA_PPFC		BIT(4)
+#define REG_DA_SYNCRST		BIT(2)
+#define REG_DA_LDOPD		BIT(1)
+#define REG_DA_PLLPD		BIT(0)
+#define MIPI_PHY_REG3		PHYREG(0x000c)
+#define REG_FBDIV_HI_MASK	GENMASK(5, 5)
+#define REG_FBDIV_HI(x)		UPDATE(x, 5, 5)
+#define REG_PREDIV_MASK		GENMASK(4, 0)
+#define REG_PREDIV(x)		UPDATE(x, 4, 0)
+#define MIPI_PHY_REG4		PHYREG(0x0010)
+#define REG_FBDIV_LO_MASK	GENMASK(7, 0)
+#define REG_FBDIV_LO(x)		UPDATE(x, 7, 0)
+#define MIPI_PHY_REG5		PHYREG(0x0014)
+#define MIPI_PHY_REG6		PHYREG(0x0018)
+#define MIPI_PHY_REG7		PHYREG(0x001c)
+#define MIPI_PHY_REG9		PHYREG(0x0024)
+#define MIPI_PHY_REG20		PHYREG(0x0080)
+#define REG_DIG_RSTN		BIT(0)
+#define MIPI_PHY_MAX_REGISTER	PHYREG(0x0348)
+
+#define THS_SETTLE_OFFSET	0x00
+#define THS_SETTLE_MASK		GENMASK(3, 0)
+#define THS_SETTLE(x)		UPDATE(x, 3, 0)
+#define TLPX_OFFSET		0x14
+#define TLPX_MASK		GENMASK(5, 0)
+#define TLPX(x)			UPDATE(x, 5, 0)
+#define THS_PREPARE_OFFSET	0x18
+#define THS_PREPARE_MASK	GENMASK(6, 0)
+#define THS_PREPARE(x)		UPDATE(x, 6, 0)
+#define THS_ZERO_OFFSET		0x1c
+#define THS_ZERO_MASK		GENMASK(5, 0)
+#define THS_ZERO(x)		UPDATE(x, 5, 0)
+#define THS_TRAIL_OFFSET	0x20
+#define THS_TRAIL_MASK		GENMASK(6, 0)
+#define THS_TRAIL(x)		UPDATE(x, 6, 0)
+#define THS_EXIT_OFFSET		0x24
+#define THS_EXIT_MASK		GENMASK(4, 0)
+#define THS_EXIT(x)		UPDATE(x, 4, 0)
+#define TCLK_POST_OFFSET	0x28
+#define TCLK_POST_MASK		GENMASK(3, 0)
+#define TCLK_POST(x)		UPDATE(x, 3, 0)
+#define TWAKUP_HI_OFFSET	0x30
+#define TWAKUP_HI_MASK		GENMASK(1, 0)
+#define TWAKUP_HI(x)		UPDATE(x, 1, 0)
+#define TWAKUP_LO_OFFSET	0x34
+#define TWAKUP_LO_MASK		GENMASK(7, 0)
+#define TWAKUP_LO(x)		UPDATE(x, 7, 0)
+#define TCLK_PRE_OFFSET		0x38
+#define TCLK_PRE_MASK		GENMASK(3, 0)
+#define TCLK_PRE(x)		UPDATE(x, 3, 0)
+#define TTA_GO_OFFSET		0x40
+#define TTA_GO_MASK		GENMASK(5, 0)
+#define TTA_GO(x)		UPDATE(x, 5, 0)
+#define TTA_SURE_OFFSET		0x44
+#define TTA_SURE_MASK		GENMASK(5, 0)
+#define TTA_SURE(x)		UPDATE(x, 5, 0)
+#define TTA_WAIT_OFFSET		0x48
+#define TTA_WAIT_MASK		GENMASK(5, 0)
+#define TTA_WAIT(x)		UPDATE(x, 5, 0)
+
+#define USEC_PER_SEC		1000000L
+#define USEC_PER_MSEC		1000L
+#define PSEC_PER_NSEC		1000L
+#define PSEC_PER_SEC		1000000000000LL
+
+struct mipi_dphy {
+	u8 prediv;
+	u16 fbdiv;
+	unsigned int rate;
+};
+
+struct rk618_dsi {
+	struct udevice *dev;
+	struct rk618 *parent;
+	struct mipi_dphy phy;
+	unsigned int channel;
+	unsigned int lanes;
+	enum mipi_dsi_pixel_format format;
+	unsigned long mode_flags;
+	struct drm_display_mode mode;
+};
+
+enum {
+	NON_BURST_MODE_SYNC_PULSE,
+	NON_BURST_MODE_SYNC_EVENT,
+	BURST_MODE,
+};
+
+enum {
+	PIXEL_COLOR_CODING_16BIT_1,
+	PIXEL_COLOR_CODING_16BIT_2,
+	PIXEL_COLOR_CODING_16BIT_3,
+	PIXEL_COLOR_CODING_18BIT_1,
+	PIXEL_COLOR_CODING_18BIT_2,
+	PIXEL_COLOR_CODING_24BIT,
+};
+
+#define dsi_read_poll_timeout(dsi, addr, val, cond, sleep_us, timeout_us) \
+({ \
+	unsigned long timeout = timer_get_us() + (timeout_us); \
+	for (;;) { \
+		(val) = dsi_read(dsi, addr); \
+		if (cond) \
+			break; \
+		if ((timeout_us) && time_after(timer_get_us(), timeout)) { \
+			(val) = dsi_read(dsi, addr); \
+			break; \
+		} \
+		if (sleep_us) \
+			udelay(sleep_us); \
+	} \
+	(cond) ? 0 : -ETIMEDOUT; \
+})
+
+static inline int dsi_write(struct rk618_dsi *dsi, u32 reg, u32 val)
+{
+	return rk618_i2c_write(dsi->parent, reg, val);
+}
+
+static inline u32 dsi_read(struct rk618_dsi *dsi, u32 reg)
+{
+	u32 val;
+
+	rk618_i2c_read(dsi->parent, reg, &val);
+
+	return val;
+}
+
+static inline void dsi_update_bits(struct rk618_dsi *dsi,
+				   u32 reg, u32 mask, u32 val)
+{
+	u32 orig, tmp;
+
+	orig = dsi_read(dsi, reg);
+	tmp = orig & ~mask;
+	tmp |= val & mask;
+	dsi_write(dsi, reg, tmp);
+}
+
+static inline bool is_clk_lane(u32 offset)
+{
+	if (offset == 0x100)
+		return true;
+
+	return false;
+}
+
+static void rk618_dsi_set_hs_clk(struct rk618_dsi *dsi)
+{
+	const struct drm_display_mode *mode = &dsi->mode;
+	struct mipi_dphy *phy = &dsi->phy;
+	u32 fout, fref, prediv, fbdiv;
+	u32 min_delta = UINT_MAX;
+	unsigned int value;
+
+	value = dev_read_u32_default(dsi->dev, "rockchip,lane-rate", 0);
+	if (value > 0) {
+		fout = value * USEC_PER_SEC;
+	} else {
+		int bpp = mipi_dsi_pixel_format_to_bpp(dsi->format);
+		unsigned int lanes = dsi->lanes;
+		u64 bandwidth;
+
+		bandwidth = (u64)mode->clock * 1000 * bpp;
+		do_div(bandwidth, lanes);
+
+		/* take 1 / 0.9, since mbps must big than bandwidth of RGB */
+		bandwidth *= 10;
+		do_div(bandwidth, 9);
+
+		do_div(bandwidth, USEC_PER_SEC);
+		bandwidth *= USEC_PER_SEC;
+		fout = bandwidth;
+	}
+
+	if (fout > 1000000000UL)
+		fout = 1000000000UL;
+
+	fref = clk_get_rate(&dsi->parent->clkin);
+
+	for (prediv = 1; prediv <= 12; prediv++) {
+		u64 tmp;
+		u32 delta;
+
+		if (fref % prediv)
+			continue;
+
+		tmp = (u64)fout * prediv;
+		do_div(tmp, fref);
+		fbdiv = tmp;
+
+		if (fbdiv < 12 || fbdiv > 511)
+			continue;
+
+		if (fbdiv == 15)
+			continue;
+
+		tmp = (u64)fbdiv * fref;
+		do_div(tmp, prediv);
+
+		delta = abs(fout - tmp);
+		if (!delta) {
+			phy->rate = tmp;
+			phy->prediv = prediv;
+			phy->fbdiv = fbdiv;
+			break;
+		} else if (delta < min_delta) {
+			phy->rate = tmp;
+			phy->prediv = prediv;
+			phy->fbdiv = fbdiv;
+			min_delta = delta;
+		}
+	}
+}
+
+static void rk618_dsi_phy_power_off(struct rk618_dsi *dsi)
+{
+	dsi_update_bits(dsi, MIPI_PHY_REG0, LANE_EN_MASK, 0);
+	dsi_update_bits(dsi, MIPI_PHY_REG1, REG_DA_LDOPD | REG_DA_PLLPD,
+			REG_DA_LDOPD | REG_DA_PLLPD);
+}
+
+static void rk618_dsi_phy_power_on(struct rk618_dsi *dsi, u32 txclkesc)
+{
+	struct mipi_dphy *phy = &dsi->phy;
+	u32 offset, value, index;
+	const struct {
+		unsigned int rate;
+		u8 ths_settle;
+		u8 ths_zero;
+		u8 ths_trail;
+	} timing_table[] = {
+		{ 110000000, 0x00, 0x03, 0x0c},
+		{ 150000000, 0x01, 0x04, 0x0d},
+		{ 200000000, 0x02, 0x04, 0x11},
+		{ 250000000, 0x03, 0x05, 0x14},
+		{ 300000000, 0x04, 0x06, 0x18},
+		{ 400000000, 0x05, 0x07, 0x1d},
+		{ 500000000, 0x06, 0x08, 0x23},
+		{ 600000000, 0x07, 0x0a, 0x29},
+		{ 700000000, 0x08, 0x0b, 0x31},
+		{ 800000000, 0x09, 0x0c, 0x34},
+		{1000000000, 0x0a, 0x0f, 0x40},
+	};
+	u32 Ttxbyteclkhs, UI, Ttxddrclkhs, Ttxclkesc;
+	u32 Tlpx, Ths_exit, Tclk_post, Tclk_pre, Ths_prepare;
+	u32 Tta_go, Tta_sure, Tta_wait;
+
+	Ttxbyteclkhs = div_u64(PSEC_PER_SEC, phy->rate / 8);
+	UI = Ttxddrclkhs = div_u64(PSEC_PER_SEC, phy->rate);
+	Ttxclkesc = div_u64(PSEC_PER_SEC, txclkesc);
+
+	dsi_update_bits(dsi, MIPI_PHY_REG3, REG_FBDIV_HI_MASK |
+			REG_PREDIV_MASK, REG_FBDIV_HI(phy->fbdiv >> 8) |
+			REG_PREDIV(phy->prediv));
+	dsi_update_bits(dsi, MIPI_PHY_REG4,
+			REG_FBDIV_LO_MASK, REG_FBDIV_LO(phy->fbdiv));
+	dsi_update_bits(dsi, MIPI_PHY_REG1, REG_DA_LDOPD | REG_DA_PLLPD, 0);
+
+	dsi_update_bits(dsi, MIPI_PHY_REG0, LANE_EN_MASK,
+			LANE_EN_CK | GENMASK(dsi->lanes - 1 + 2, 2));
+
+	dsi_update_bits(dsi, MIPI_PHY_REG1, REG_DA_SYNCRST, REG_DA_SYNCRST);
+	udelay(1);
+	dsi_update_bits(dsi, MIPI_PHY_REG1, REG_DA_SYNCRST, 0);
+
+	dsi_update_bits(dsi, MIPI_PHY_REG20, REG_DIG_RSTN, 0);
+	udelay(1);
+	dsi_update_bits(dsi, MIPI_PHY_REG20, REG_DIG_RSTN, REG_DIG_RSTN);
+
+	/* XXX */
+	dsi_write(dsi, MIPI_PHY_REG6, 0x11);
+	dsi_write(dsi, MIPI_PHY_REG7, 0x11);
+	dsi_write(dsi, MIPI_PHY_REG9, 0xcc);
+
+	if (phy->rate < 800000000)
+		dsi_update_bits(dsi, MIPI_PHY_REG1, REG_DA_PPFC, REG_DA_PPFC);
+	else
+		dsi_write(dsi, MIPI_PHY_REG5, 0x30);
+
+	for (index = 0; index < ARRAY_SIZE(timing_table); index++)
+		if (phy->rate <= timing_table[index].rate)
+			break;
+
+	if (index == ARRAY_SIZE(timing_table))
+		--index;
+
+	for (offset = 0x100; offset <= 0x300; offset += 0x80) {
+		dsi_update_bits(dsi, PHYREG(offset + THS_SETTLE_OFFSET),
+				THS_SETTLE_MASK,
+				THS_SETTLE(timing_table[index].ths_settle));
+
+		/*
+		 * The value of counter for HS Tlpx Time
+		 * Tlpx = Tpin_txbyteclkhs * value
+		 */
+		Tlpx = 60 * PSEC_PER_NSEC;
+		value = DIV_ROUND_UP(Tlpx, Ttxbyteclkhs);
+		Tlpx = Ttxbyteclkhs * value;
+		dsi_update_bits(dsi, PHYREG(offset + TLPX_OFFSET),
+				TLPX_MASK, TLPX(value));
+
+		/*
+		 * The value of counter for HS Ths-prepare
+		 * For clock lane, Ths-prepare(38ns~95ns)
+		 * For data lane, Ths-prepare(40ns+4UI~85ns+6UI)
+		 * Ths-prepare = Ttxddrclkhs * value
+		 */
+		if (is_clk_lane(offset))
+			Ths_prepare = 65 * PSEC_PER_NSEC;
+		else
+			Ths_prepare = 65 * PSEC_PER_NSEC + 4 * UI;
+
+		value = DIV_ROUND_UP(Ths_prepare, Ttxddrclkhs);
+		dsi_update_bits(dsi, PHYREG(offset + THS_PREPARE_OFFSET),
+				THS_PREPARE_MASK, THS_PREPARE(value));
+
+		dsi_update_bits(dsi, PHYREG(offset + THS_ZERO_OFFSET),
+				THS_ZERO_MASK,
+				THS_ZERO(timing_table[index].ths_zero));
+
+		dsi_update_bits(dsi, PHYREG(offset + THS_TRAIL_OFFSET),
+				THS_TRAIL_MASK,
+				THS_TRAIL(timing_table[index].ths_trail));
+
+		/*
+		 * The value of counter for HS Ths-exit
+		 * Ths-exit = Tpin_txbyteclkhs * value
+		 */
+		Ths_exit = 120 * PSEC_PER_NSEC;
+		value = DIV_ROUND_UP(Ths_exit, Ttxbyteclkhs);
+		dsi_update_bits(dsi, PHYREG(offset + THS_EXIT_OFFSET),
+				THS_EXIT_MASK, THS_EXIT(value));
+
+		/*
+		 * The value of counter for HS Tclk-post
+		 * Tclk-post = Ttxbyteclkhs * value
+		 */
+		Tclk_post = 70 * PSEC_PER_NSEC + 52 * UI;
+		value = DIV_ROUND_UP(Tclk_post, Ttxbyteclkhs);
+		dsi_update_bits(dsi, PHYREG(offset + TCLK_POST_OFFSET),
+				TCLK_POST_MASK, TCLK_POST(value));
+
+		/*
+		 * The value of counter for HS Twakup
+		 * Twakup for ulpm,
+		 * Twakup = Tpin_sys_clk * value
+		 */
+		dsi_update_bits(dsi, PHYREG(offset + TWAKUP_HI_OFFSET),
+				TWAKUP_HI_MASK, TWAKUP_HI(0x3));
+		dsi_update_bits(dsi, PHYREG(offset + TWAKUP_LO_OFFSET),
+				TWAKUP_LO_MASK, TWAKUP_LO(0xff));
+
+		/*
+		 * The value of counter for HS Tclk-pre
+		 * Tclk-pre for clock lane
+		 * Tclk-pre = Tpin_txbyteclkhs * value
+		 */
+		Tclk_pre = 8 * UI;
+		value = DIV_ROUND_UP(Tclk_pre, Ttxbyteclkhs);
+		dsi_update_bits(dsi, PHYREG(offset + TCLK_PRE_OFFSET),
+				TCLK_PRE_MASK, TCLK_PRE(value));
+
+		/*
+		 * The value of counter for HS Tta-go
+		 * Tta-go for turnaround
+		 * Tta-go = Ttxclkesc * value
+		 */
+		Tta_go = 4 * Tlpx;
+		value = DIV_ROUND_UP(Tta_go, Ttxclkesc);
+		dsi_update_bits(dsi, PHYREG(offset + TTA_GO_OFFSET),
+				TTA_GO_MASK, TTA_GO(value));
+
+		/*
+		 * The value of counter for HS Tta-sure
+		 * Tta-sure for turnaround
+		 * Tta-sure = Ttxclkesc * value
+		 */
+		Tta_sure = 2 * Tlpx;
+		value = DIV_ROUND_UP(Tta_sure, Ttxclkesc);
+		dsi_update_bits(dsi, PHYREG(offset + TTA_SURE_OFFSET),
+				TTA_SURE_MASK, TTA_SURE(value));
+
+		/*
+		 * The value of counter for HS Tta-wait
+		 * Tta-wait for turnaround
+		 * Interval from receiving ppi turnaround request to
+		 * sending esc request.
+		 * Tta-wait = Ttxclkesc * value
+		 */
+		Tta_wait = 5 * Tlpx;
+		value = DIV_ROUND_UP(Tta_wait, Ttxclkesc);
+		dsi_update_bits(dsi, PHYREG(offset + TTA_WAIT_OFFSET),
+				TTA_WAIT_MASK, TTA_WAIT(value));
+	}
+}
+
+static int rk618_dsi_pre_enable(struct rk618_dsi *dsi)
+{
+	struct drm_display_mode *mode = &dsi->mode;
+	u32 esc_clk_div, txclkesc;
+	u32 lanebyteclk, dpipclk;
+	u32 hsw, hbp, vsw, vfp, vbp;
+	u32 hsa_time, hbp_time, hline_time;
+	u32 value;
+	int ret;
+
+	rk618_dsi_set_hs_clk(dsi);
+
+	dsi_update_bits(dsi, DSI_PWR_UP, SHUTDOWNZ, RESET);
+
+	/* Configuration of the internal clock dividers */
+	esc_clk_div = DIV_ROUND_UP(dsi->phy.rate >> 3, 20000000);
+	txclkesc = dsi->phy.rate >> 3 / esc_clk_div;
+	value = TO_CLK_DIVIDSION(10) | TX_ESC_CLK_DIVIDSION(esc_clk_div);
+	dsi_write(dsi, DSI_CLKMGR_CFG, value);
+
+	/* The DPI interface configuration */
+	value = DPI_VID(dsi->channel);
+
+	if (mode->flags & DRM_MODE_FLAG_NVSYNC)
+		value |= VSYNC_ACTIVE_LOW;
+	if (mode->flags & DRM_MODE_FLAG_NHSYNC)
+		value |= HSYNC_ACTIVE_LOW;
+
+	switch (dsi->format) {
+	case MIPI_DSI_FMT_RGB666:
+		value |= DPI_COLOR_CODING(PIXEL_COLOR_CODING_18BIT_2);
+		break;
+	case MIPI_DSI_FMT_RGB666_PACKED:
+		value |= DPI_COLOR_CODING(PIXEL_COLOR_CODING_18BIT_1);
+		value |= EN18_LOOSELY;
+		break;
+	case MIPI_DSI_FMT_RGB565:
+		value |= DPI_COLOR_CODING(PIXEL_COLOR_CODING_16BIT_1);
+		break;
+	case MIPI_DSI_FMT_RGB888:
+	default:
+		value |= DPI_COLOR_CODING(PIXEL_COLOR_CODING_24BIT);
+		break;
+	}
+
+	dsi_write(dsi, DSI_DPI_CFG, value);
+
+	/* Packet handler configuration */
+	value = GEN_VID_RX(dsi->channel) | EN_CRC_RX | EN_ECC_RX | EN_BTA;
+
+	if (!(dsi->mode_flags & MIPI_DSI_MODE_EOT_PACKET))
+		value |= EN_EOTP_TX;
+
+	dsi_write(dsi, DSI_PCKHDL_CFG, value);
+
+	/* Video mode configuration */
+	value = EN_LP_VACT | EN_LP_VBP | EN_LP_VFP | EN_LP_VSA;
+
+	if (!(dsi->mode_flags & MIPI_DSI_MODE_VIDEO_HFP))
+		value |= EN_LP_HFP;
+
+	if (!(dsi->mode_flags & MIPI_DSI_MODE_VIDEO_HBP))
+		value |= EN_LP_HBP;
+
+	if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST)
+		value |= VID_MODE_TYPE(BURST_MODE);
+	else if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE)
+		value |= VID_MODE_TYPE(NON_BURST_MODE_SYNC_PULSE);
+	else
+		value |= VID_MODE_TYPE(NON_BURST_MODE_SYNC_EVENT);
+
+	dsi_write(dsi, DSI_VID_MODE_CFG, value);
+
+	/* Video packet configuration */
+	dsi_write(dsi, DSI_VID_PKT_CFG, VID_PKT_SIZE(mode->hdisplay));
+
+	/* Timeout timers configuration */
+	dsi_write(dsi, DSI_TO_CNT_CFG, LPRX_TO_CNT(1000) | HSTX_TO_CNT(1000));
+
+	hsw = mode->hsync_end - mode->hsync_start;
+	hbp = mode->htotal - mode->hsync_end;
+	vsw = mode->vsync_end - mode->vsync_start;
+	vfp = mode->vsync_start - mode->vdisplay;
+	vbp = mode->vtotal - mode->vsync_end;
+
+	/* Line timing configuration */
+	lanebyteclk = (dsi->phy.rate >> 3) / USEC_PER_SEC;
+	dpipclk = mode->clock / USEC_PER_MSEC;
+	hline_time = DIV_ROUND_UP(mode->htotal * lanebyteclk, dpipclk);
+	hbp_time = DIV_ROUND_UP(hbp * lanebyteclk, dpipclk);
+	hsa_time = DIV_ROUND_UP(hsw * lanebyteclk, dpipclk);
+	dsi_write(dsi, DSI_TMR_LINE_CFG, HLINE_TIME(hline_time) |
+		  HBP_TIME(hbp_time) | HSA_TIME(hsa_time));
+
+	/* Vertical timing configuration */
+	dsi_write(dsi, DSI_VTIMING_CFG,
+		  V_ACTIVE_LINES(mode->vdisplay) | VFP_LINES(vfp) |
+		  VBP_LINES(vbp) | VSA_LINES(vsw));
+
+	/* D-PHY interface configuration */
+	value = N_LANES(dsi->lanes - 1) | PHY_STOP_WAIT_TIME(0x20);
+	dsi_write(dsi, DSI_PHY_IF_CFG, value);
+
+	/* D-PHY timing configuration */
+	value = PHY_HS2LP_TIME(20) | PHY_LP2HS_TIME(16) | MAX_RD_TIME(10000);
+	dsi_write(dsi, DSI_PHY_TMR_CFG, value);
+
+	/* enables the D-PHY Clock Lane Module */
+	dsi_update_bits(dsi, DSI_PHY_RSTZ, PHY_ENABLECLK, PHY_ENABLECLK);
+
+	dsi_update_bits(dsi, DSI_VID_MODE_CFG, EN_VIDEO_MODE, 0);
+	dsi_update_bits(dsi, DSI_CMD_MODE_CFG, EN_CMD_MODE, EN_CMD_MODE);
+
+	rk618_dsi_phy_power_on(dsi, txclkesc);
+
+	/* wait for the PHY to acquire lock */
+	ret = dsi_read_poll_timeout(dsi, DSI_PHY_STATUS,
+				    value, value & PHYLOCK, 50, 1000);
+	if (ret) {
+		dev_err(dsi->dev, "PHY is not locked\n");
+		return ret;
+	}
+
+	/* wait for the lane go to the stop state */
+	ret = dsi_read_poll_timeout(dsi, DSI_PHY_STATUS,
+				    value, value & PHYSTOPSTATELANE, 50, 1000);
+	if (ret) {
+		dev_err(dsi->dev, "lane module is not in stop state\n");
+		return ret;
+	}
+
+	dsi_update_bits(dsi, DSI_PWR_UP, SHUTDOWNZ, POWER_UP);
+
+	return 0;
+}
+
+static void rk618_dsi_enable(struct rk618_dsi *dsi)
+{
+	/* controls the D-PHY PPI txrequestclkhs signal */
+	dsi_update_bits(dsi, DSI_PHY_IF_CTRL,
+			PHY_TXREQUESCLKHS, PHY_TXREQUESCLKHS);
+
+	/* enables the DPI Video mode transmission */
+	dsi_update_bits(dsi, DSI_PWR_UP, SHUTDOWNZ, RESET);
+	dsi_update_bits(dsi, DSI_CMD_MODE_CFG, EN_CMD_MODE, 0);
+	dsi_update_bits(dsi, DSI_VID_MODE_CFG, EN_VIDEO_MODE, EN_VIDEO_MODE);
+	dsi_update_bits(dsi, DSI_PWR_UP, SHUTDOWNZ, POWER_UP);
+
+	printf("final DSI-Link bandwidth: %lu x %d Mbps\n",
+	       dsi->phy.rate / USEC_PER_SEC, dsi->lanes);
+}
+
+static void rk618_dsi_disable(struct rk618_dsi *dsi)
+{
+	/* enables the Command mode protocol for transmissions */
+	dsi_update_bits(dsi, DSI_PWR_UP, SHUTDOWNZ, RESET);
+	dsi_update_bits(dsi, DSI_PHY_IF_CTRL, PHY_TXREQUESCLKHS, 0);
+	dsi_update_bits(dsi, DSI_VID_MODE_CFG, EN_VIDEO_MODE, 0);
+	dsi_update_bits(dsi, DSI_CMD_MODE_CFG, EN_CMD_MODE, EN_CMD_MODE);
+	dsi_update_bits(dsi, DSI_PWR_UP, SHUTDOWNZ, POWER_UP);
+}
+
+static void rk618_dsi_post_disable(struct rk618_dsi *dsi)
+{
+	dsi_update_bits(dsi, DSI_PWR_UP, SHUTDOWNZ, RESET);
+	dsi_update_bits(dsi, DSI_PHY_RSTZ, PHY_ENABLECLK, 0);
+
+	rk618_dsi_phy_power_off(dsi);
+}
+
+static void rk618_dsi_bridge_pre_enable(struct rockchip_bridge *bridge)
+{
+	struct rk618_dsi *dsi = dev_get_priv(bridge->dev);
+
+	rk618_dsi_pre_enable(dsi);
+}
+
+static void rk618_dsi_bridge_enable(struct rockchip_bridge *bridge)
+{
+	struct rk618_dsi *dsi = dev_get_priv(bridge->dev);
+
+	rk618_dsi_enable(dsi);
+}
+
+static void rk618_dsi_bridge_post_disable(struct rockchip_bridge *bridge)
+{
+	struct rk618_dsi *dsi = dev_get_priv(bridge->dev);
+
+	rk618_dsi_post_disable(dsi);
+}
+
+static void rk618_dsi_bridge_disable(struct rockchip_bridge *bridge)
+{
+	struct rk618_dsi *dsi = dev_get_priv(bridge->dev);
+
+	rk618_dsi_disable(dsi);
+}
+
+static void rk618_dsi_bridge_mode_set(struct rockchip_bridge *bridge,
+				      const struct drm_display_mode *mode)
+{
+	struct rk618_dsi *dsi = dev_get_priv(bridge->dev);
+
+	memcpy(&dsi->mode, mode, sizeof(*mode));
+}
+
+static const struct rockchip_bridge_funcs rk618_dsi_bridge_funcs = {
+	.enable = rk618_dsi_bridge_enable,
+	.disable = rk618_dsi_bridge_disable,
+	.pre_enable = rk618_dsi_bridge_pre_enable,
+	.post_disable = rk618_dsi_bridge_post_disable,
+	.mode_set = rk618_dsi_bridge_mode_set,
+};
+
+static ssize_t rk618_dsi_transfer(struct rk618_dsi *dsi,
+				  const struct mipi_dsi_msg *msg)
+{
+	struct mipi_dsi_packet packet;
+	u32 value, mask;
+	int ret;
+
+	if (msg->flags & MIPI_DSI_MSG_USE_LPM)
+		dsi_update_bits(dsi, DSI_PHY_IF_CTRL, PHY_TXREQUESCLKHS, 0);
+	else
+		dsi_update_bits(dsi, DSI_PHY_IF_CTRL,
+				PHY_TXREQUESCLKHS, PHY_TXREQUESCLKHS);
+
+	switch (msg->type) {
+	case MIPI_DSI_DCS_SHORT_WRITE:
+		dsi_update_bits(dsi, DSI_CMD_MODE_CFG, DCS_SW_0P_TX,
+				msg->flags & MIPI_DSI_MSG_USE_LPM ?
+				DCS_SW_0P_TX : 0);
+		break;
+	case MIPI_DSI_DCS_SHORT_WRITE_PARAM:
+		dsi_update_bits(dsi, DSI_CMD_MODE_CFG, DCS_SW_1P_TX,
+				msg->flags & MIPI_DSI_MSG_USE_LPM ?
+				DCS_SW_1P_TX : 0);
+		break;
+	case MIPI_DSI_DCS_LONG_WRITE:
+		dsi_update_bits(dsi, DSI_CMD_MODE_CFG, DCS_LW_TX,
+				msg->flags & MIPI_DSI_MSG_USE_LPM ?
+				DCS_LW_TX : 0);
+		break;
+	case MIPI_DSI_DCS_READ:
+		dsi_update_bits(dsi, DSI_CMD_MODE_CFG, DCS_SR_0P_TX,
+				msg->flags & MIPI_DSI_MSG_USE_LPM ?
+				DCS_SR_0P_TX : 0);
+		break;
+	case MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE:
+		dsi_update_bits(dsi, DSI_CMD_MODE_CFG,
+				MAX_RD_PKT_SIZE,
+				msg->flags & MIPI_DSI_MSG_USE_LPM ?
+				MAX_RD_PKT_SIZE : 0);
+		break;
+	case MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM:
+		dsi_update_bits(dsi, DSI_CMD_MODE_CFG, GEN_SW_0P_TX,
+				msg->flags & MIPI_DSI_MSG_USE_LPM ?
+				GEN_SW_0P_TX : 0);
+		break;
+	case MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM:
+		dsi_update_bits(dsi, DSI_CMD_MODE_CFG, GEN_SW_1P_TX,
+				msg->flags & MIPI_DSI_MSG_USE_LPM ?
+				GEN_SW_1P_TX : 0);
+		break;
+	case MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM:
+		dsi_update_bits(dsi, DSI_CMD_MODE_CFG, GEN_SW_2P_TX,
+				msg->flags & MIPI_DSI_MSG_USE_LPM ?
+				GEN_SW_2P_TX : 0);
+		break;
+	case MIPI_DSI_GENERIC_LONG_WRITE:
+		dsi_update_bits(dsi, DSI_CMD_MODE_CFG, GEN_LW_TX,
+				msg->flags & MIPI_DSI_MSG_USE_LPM ?
+				GEN_LW_TX : 0);
+		break;
+	case MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM:
+		dsi_update_bits(dsi, DSI_CMD_MODE_CFG, GEN_SR_0P_TX,
+				msg->flags & MIPI_DSI_MSG_USE_LPM ?
+				GEN_SR_0P_TX : 0);
+		break;
+	case MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM:
+		dsi_update_bits(dsi, DSI_CMD_MODE_CFG, GEN_SR_1P_TX,
+				msg->flags & MIPI_DSI_MSG_USE_LPM ?
+				GEN_SR_1P_TX : 0);
+		break;
+	case MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM:
+		dsi_update_bits(dsi, DSI_CMD_MODE_CFG, GEN_SR_2P_TX,
+				msg->flags & MIPI_DSI_MSG_USE_LPM ?
+				GEN_SR_2P_TX : 0);
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	/* create a packet to the DSI protocol */
+	ret = mipi_dsi_create_packet(&packet, msg);
+	if (ret) {
+		dev_err(dsi->dev, "failed to create packet: %d\n", ret);
+		return ret;
+	}
+
+	/* Send payload */
+	while (packet.payload_length >= 4) {
+		mask = GEN_PLD_W_FULL;
+		ret = dsi_read_poll_timeout(dsi, DSI_GEN_PKT_STATUS,
+					    value, !(value & mask), 50, 1000);
+		if (ret) {
+			dev_err(dsi->dev, "Write payload FIFO is full\n");
+			return ret;
+		}
+
+		value = get_unaligned_le32(packet.payload);
+		dsi_write(dsi, DSI_GEN_PLD_DATA, value);
+		packet.payload += 4;
+		packet.payload_length -= 4;
+	}
+
+	value = 0;
+	switch (packet.payload_length) {
+	case 3:
+		value |= packet.payload[2] << 16;
+		/* Fall through */
+	case 2:
+		value |= packet.payload[1] << 8;
+		/* Fall through */
+	case 1:
+		value |= packet.payload[0];
+		dsi_write(dsi, DSI_GEN_PLD_DATA, value);
+		break;
+	}
+
+	mask = GEN_CMD_FULL;
+	ret = dsi_read_poll_timeout(dsi, DSI_GEN_PKT_STATUS,
+				    value, !(value & mask), 50, 1000);
+	if (ret) {
+		dev_err(dsi->dev, "Command FIFO is full\n");
+		return ret;
+	}
+
+	/* Send packet header */
+	value = get_unaligned_le32(packet.header);
+	dsi_write(dsi, DSI_GEN_HDR, value);
+
+	mask = GEN_PLD_W_EMPTY | GEN_CMD_EMPTY;
+	ret = dsi_read_poll_timeout(dsi, DSI_GEN_PKT_STATUS,
+				    value, (value & mask) == mask, 50, 1000);
+	if (ret) {
+		dev_err(dsi->dev, "Write payload FIFO is not empty\n");
+		return ret;
+	}
+
+	if (msg->rx_len) {
+		u8 *payload = msg->rx_buf;
+		u16 length;
+
+		mask = GEN_RD_CMD_BUSY;
+		ret = dsi_read_poll_timeout(dsi, DSI_GEN_PKT_STATUS,
+					    value, !(value & mask), 50, 1000);
+		if (ret) {
+			dev_err(dsi->dev,
+				"entire response is not stored in the FIFO\n");
+			return ret;
+		}
+
+		/* Receive payload */
+		for (length = msg->rx_len; length; length -= 4) {
+			mask = GEN_PLD_R_EMPTY;
+			ret = dsi_read_poll_timeout(dsi, DSI_GEN_PKT_STATUS,
+						    value, !(value & mask),
+						    50, 1000);
+			if (ret) {
+				dev_err(dsi->dev,
+					"Read payload FIFO is empty\n");
+				return ret;
+			}
+
+			value = dsi_read(dsi, DSI_GEN_PLD_DATA);
+
+			switch (length) {
+			case 3:
+				payload[2] = (value >> 16) & 0xff;
+				/* Fall through */
+			case 2:
+				payload[1] = (value >> 8) & 0xff;
+				/* Fall through */
+			case 1:
+				payload[0] = value & 0xff;
+				return length;
+			}
+
+			payload[0] = (value >>  0) & 0xff;
+			payload[1] = (value >>  8) & 0xff;
+			payload[2] = (value >> 16) & 0xff;
+			payload[3] = (value >> 24) & 0xff;
+			payload += 4;
+		}
+	}
+
+	return packet.payload_length;
+}
+
+static int rk618_dsi_probe(struct udevice *dev)
+{
+	struct rk618_dsi *dsi = dev_get_priv(dev);
+	struct rockchip_bridge *bridge =
+		(struct rockchip_bridge *)dev_get_driver_data(dev);
+	int ret;
+
+	dsi->dev = dev;
+	dsi->parent = dev_get_priv(dev->parent);
+
+	ret = device_probe(dev->parent);
+	if (ret)
+		return ret;
+
+	bridge->dev = dev;
+
+	/* Mask all interrupts */
+	dsi_write(dsi, DSI_INT_MSK0, 0xffffffff);
+	dsi_write(dsi, DSI_INT_MSK1, 0xffffffff);
+
+	return 0;
+}
+
+static struct rockchip_bridge rk618_dsi_driver_data = {
+	.funcs = &rk618_dsi_bridge_funcs,
+};
+
+static const struct udevice_id rk618_dsi_ids[] = {
+	{
+		.compatible = "rockchip,rk618-dsi",
+		.data = (ulong)&rk618_dsi_driver_data,
+	},
+	{}
+};
+
+static ssize_t rk618_dsi_host_transfer(struct mipi_dsi_host *host,
+				       const struct mipi_dsi_msg *msg)
+{
+	struct rk618_dsi *dsi = dev_get_priv(host->dev);
+
+	return rk618_dsi_transfer(dsi, msg);
+}
+
+static int rk618_dsi_host_attach(struct mipi_dsi_host *host,
+				 struct mipi_dsi_device *device)
+{
+	struct rk618_dsi *dsi = dev_get_priv(host->dev);
+
+	if (device->lanes < 1 || device->lanes > 4)
+		return -EINVAL;
+
+	dsi->lanes = device->lanes;
+	dsi->channel = device->channel;
+	dsi->format = device->format;
+	dsi->mode_flags = device->mode_flags;
+
+	return 0;
+}
+
+static const struct mipi_dsi_host_ops rk618_dsi_host_ops = {
+	.attach = rk618_dsi_host_attach,
+	.transfer = rk618_dsi_host_transfer,
+};
+
+static int rk618_dsi_bind(struct udevice *dev)
+{
+	struct mipi_dsi_host *host = dev_get_platdata(dev);
+
+	host->dev = dev;
+	host->ops = &rk618_dsi_host_ops;
+
+	return dm_scan_fdt_dev(dev);
+}
+
+static int rk618_dsi_child_post_bind(struct udevice *dev)
+{
+	struct mipi_dsi_host *host = dev_get_platdata(dev->parent);
+	struct mipi_dsi_device *device = dev_get_parent_platdata(dev);
+	char name[20];
+
+	sprintf(name, "%s.%d", host->dev->name, device->channel);
+	device_set_name(dev, name);
+
+	device->dev = dev;
+	device->host = host;
+	device->lanes = dev_read_u32_default(dev, "dsi,lanes", 4);
+	device->format = dev_read_u32_default(dev, "dsi,format",
+					      MIPI_DSI_FMT_RGB888);
+	device->mode_flags = dev_read_u32_default(dev, "dsi,flags",
+						  MIPI_DSI_MODE_VIDEO |
+						  MIPI_DSI_MODE_VIDEO_BURST |
+						  MIPI_DSI_MODE_VIDEO_HBP |
+						  MIPI_DSI_MODE_LPM |
+						  MIPI_DSI_MODE_EOT_PACKET);
+	device->channel = dev_read_u32_default(dev, "reg", 0);
+
+	return 0;
+}
+
+static int rk618_dsi_child_pre_probe(struct udevice *dev)
+{
+	struct mipi_dsi_device *device = dev_get_parent_platdata(dev);
+	int ret;
+
+	ret = mipi_dsi_attach(device);
+	if (ret) {
+		dev_err(dev, "mipi_dsi_attach() failed: %d\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+U_BOOT_DRIVER(rk618_dsi) = {
+	.name = "rk618_dsi",
+	.id = UCLASS_VIDEO_BRIDGE,
+	.of_match = rk618_dsi_ids,
+	.probe = rk618_dsi_probe,
+	.bind = rk618_dsi_bind,
+	.priv_auto_alloc_size = sizeof(struct rk618_dsi),
+	.per_child_platdata_auto_alloc_size = sizeof(struct mipi_dsi_device),
+	.platdata_auto_alloc_size = sizeof(struct mipi_dsi_host),
+	.child_post_bind = rk618_dsi_child_post_bind,
+	.child_pre_probe = rk618_dsi_child_pre_probe,
+};

commit ee937701373d7823cba58e968ead7e920f862226
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Jul 22 10:18:47 2020 +0800

    video/drm: Add mode_set callback for bridge
    
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
    Change-Id: Id08455aacc850074b1bdb67776a4182598ccdb4f

diff --git a/drivers/video/drm/rockchip_bridge.c b/drivers/video/drm/rockchip_bridge.c
index 61870b5efb..eb89cf29d5 100644
--- a/drivers/video/drm/rockchip_bridge.c
+++ b/drivers/video/drm/rockchip_bridge.c
@@ -40,3 +40,13 @@ void rockchip_bridge_disable(struct rockchip_bridge *bridge)
 	if (bridge->funcs && bridge->funcs->disable)
 		bridge->funcs->disable(bridge);
 }
+
+void rockchip_bridge_mode_set(struct rockchip_bridge *bridge,
+			      const struct drm_display_mode *mode)
+{
+	if (!bridge || !mode)
+		return;
+
+	if (bridge->funcs && bridge->funcs->mode_set)
+		bridge->funcs->mode_set(bridge, mode);
+}
diff --git a/drivers/video/drm/rockchip_bridge.h b/drivers/video/drm/rockchip_bridge.h
index 687b9f277b..b00dfa10e6 100644
--- a/drivers/video/drm/rockchip_bridge.h
+++ b/drivers/video/drm/rockchip_bridge.h
@@ -13,12 +13,15 @@
 
 struct display_state;
 struct rockchip_bridge;
+struct drm_display_mode;
 
 struct rockchip_bridge_funcs {
 	void (*enable)(struct rockchip_bridge *bridge);
 	void (*disable)(struct rockchip_bridge *bridge);
 	void (*pre_enable)(struct rockchip_bridge *bridge);
 	void (*post_disable)(struct rockchip_bridge *bridge);
+	void (*mode_set)(struct rockchip_bridge *bridge,
+			 const struct drm_display_mode *mode);
 };
 
 struct rockchip_bridge {
@@ -32,5 +35,7 @@ void rockchip_bridge_enable(struct rockchip_bridge *bridge);
 void rockchip_bridge_disable(struct rockchip_bridge *bridge);
 void rockchip_bridge_pre_enable(struct rockchip_bridge *bridge);
 void rockchip_bridge_post_disable(struct rockchip_bridge *bridge);
+void rockchip_bridge_mode_set(struct rockchip_bridge *bridge,
+			      const struct drm_display_mode *mode);
 
 #endif
diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 596dfad7a1..139a33801a 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -666,6 +666,9 @@ static int display_init(struct display_state *state)
 
 	drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
 
+	if (conn_state->bridge)
+		rockchip_bridge_mode_set(conn_state->bridge, &conn_state->mode);
+
 	if (crtc_funcs->init) {
 		ret = crtc_funcs->init(state);
 		if (ret)

commit 403d8d4c2128b1214906ee2eb7179eeb192f20e4
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Jun 9 15:52:03 2020 +0800

    clk: rockchip: rk322x: add support to set and get spi clock
    
    Change-Id: I361aa06aa795d2c041d2bdad9ee5ff6982d554fc
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk322x.h b/arch/arm/include/asm/arch-rockchip/cru_rk322x.h
index 05a59851e4..fc07143219 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk322x.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk322x.h
@@ -161,6 +161,14 @@ enum {
 	CRYPTO_DIV_SHIFT	= 0,
 	CRYPTO_DIV_MASK		= 0x1f << CRYPTO_DIV_SHIFT,
 
+	/* CLKSEL_CON25 */
+	SPI_PLL_SEL_SHIFT	= 8,
+	SPI_PLL_SEL_MASK	= 0x1 << SPI_PLL_SEL_SHIFT,
+	SPI_PLL_SEL_CPLL	= 0,
+	SPI_PLL_SEL_GPLL,
+	SPI_DIV_SHIFT		= 0,
+	SPI_DIV_MASK		= 0x7f << SPI_DIV_SHIFT,
+
 	/* CRU_CLKSEL26_CON */
 	DDR_CLK_PLL_SEL_SHIFT	= 8,
 	DDR_CLK_PLL_SEL_MASK	= 3 << DDR_CLK_PLL_SEL_SHIFT,
diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c
index df3273cbbd..fe08e344a0 100644
--- a/drivers/clk/rockchip/clk_rk322x.c
+++ b/drivers/clk/rockchip/clk_rk322x.c
@@ -418,6 +418,32 @@ static ulong rk322x_peri_set_clk(struct rk322x_clk_priv *priv,
 	return rk322x_peri_get_clk(priv, clk_id);
 }
 
+static ulong rk322x_spi_get_clk(struct rk322x_clk_priv *priv)
+{
+	struct rk322x_cru *cru = priv->cru;
+	u32 div, con, parent;
+
+	con = readl(&cru->cru_clksel_con[25]);
+	div = (con & SPI_DIV_MASK) >> SPI_DIV_SHIFT;
+	parent = priv->gpll_hz;
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rk322x_spi_set_clk(struct rk322x_clk_priv *priv, ulong hz)
+{
+	struct rk322x_cru *cru = priv->cru;
+	int div;
+
+	div = DIV_ROUND_UP(priv->gpll_hz, hz);
+	assert(div - 1 < 128);
+	rk_clrsetreg(&cru->cru_clksel_con[25],
+		     SPI_PLL_SEL_MASK | SPI_DIV_MASK,
+		     SPI_PLL_SEL_GPLL << SPI_PLL_SEL_SHIFT |
+		     (div - 1) << SPI_DIV_SHIFT);
+	return rk322x_spi_get_clk(priv);
+}
+
 #ifndef CONFIG_SPL_BUILD
 static ulong rk322x_vop_get_clk(struct rk322x_clk_priv *priv, ulong clk_id)
 {
@@ -574,6 +600,9 @@ static ulong rk322x_clk_get_rate(struct clk *clk)
 	case SCLK_SDIO_SAMPLE:
 		rate = rk322x_mmc_get_clk(priv, clk->id);
 		break;
+	case SCLK_SPI0:
+		rate = rk322x_spi_get_clk(priv);
+		break;
 	case ACLK_CPU:
 	case HCLK_CPU:
 	case PCLK_CPU:
@@ -645,6 +674,9 @@ static ulong rk322x_clk_set_rate(struct clk *clk, ulong rate)
 		ret = rockchip_pll_set_rate(&rk322x_pll_clks[DPLL],
 					    priv->cru, DPLL, rate);
 		break;
+	case SCLK_SPI0:
+		rate = rk322x_spi_set_clk(priv, rate);
+		break;
 	case ACLK_CPU:
 	case HCLK_CPU:
 	case PCLK_CPU:

commit 7f619f26d7766822810bf320fe2fd605e1d5df69
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Jun 9 15:51:39 2020 +0800

    clk: rockchip: rk3128: add support to set and get spi clock
    
    Change-Id: I4ac874ba0542474baf18491f986f401c831a5ad4
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3128.h b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
index cfc4cb3c70..ab4fcfa63b 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
@@ -168,6 +168,15 @@ enum {
 	CLK_CRYPTO_DIV_CON_SHIFT= 0,
 	CLK_CRYPTO_DIV_CON_MASK	= GENMASK(1, 0),
 
+	/* CLKSEL_CON25 */
+	SPI_PLL_SEL_SHIFT	= 8,
+	SPI_PLL_SEL_MASK	= 0x3 << SPI_PLL_SEL_SHIFT,
+	SPI_PLL_SEL_CPLL	= 0,
+	SPI_PLL_SEL_GPLL,
+	SPI_PLL_SEL_GPLL_DIV2,
+	SPI_DIV_SHIFT		= 0,
+	SPI_DIV_MASK		= 0x7f << SPI_DIV_SHIFT,
+
 	/* CRU_CLKSEL27_CON*/
 	DCLK_VOP_SEL_SHIFT	= 0,
 	DCLK_VOP_SEL_MASK	= 1 << DCLK_VOP_SEL_SHIFT,
diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c
index 8af387bcff..0af499ad0a 100644
--- a/drivers/clk/rockchip/clk_rk3128.c
+++ b/drivers/clk/rockchip/clk_rk3128.c
@@ -371,6 +371,32 @@ static ulong rk3128_bus_set_clk(struct rk3128_clk_priv *priv,
 	return rk3128_bus_get_clk(priv, clk_id);
 }
 
+static ulong rk3128_spi_get_clk(struct rk3128_clk_priv *priv)
+{
+	struct rk3128_cru *cru = priv->cru;
+	u32 div, con, parent;
+
+	con = readl(&cru->cru_clksel_con[25]);
+	div = (con & SPI_DIV_MASK) >> SPI_DIV_SHIFT;
+	parent = priv->gpll_hz;
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rk3128_spi_set_clk(struct rk3128_clk_priv *priv, ulong hz)
+{
+	struct rk3128_cru *cru = priv->cru;
+	int div;
+
+	div = DIV_ROUND_UP(priv->gpll_hz, hz);
+	assert(div - 1 < 128);
+	rk_clrsetreg(&cru->cru_clksel_con[25],
+		     SPI_PLL_SEL_MASK | SPI_DIV_MASK,
+		     SPI_PLL_SEL_GPLL << SPI_PLL_SEL_SHIFT |
+		     (div - 1) << SPI_DIV_SHIFT);
+	return rk3128_spi_get_clk(priv);
+}
+
 #ifndef CONFIG_SPL_BUILD
 static ulong rk3128_saradc_get_clk(struct rk3128_clk_priv *priv)
 {
@@ -541,6 +567,9 @@ static ulong rk3128_clk_get_rate(struct clk *clk)
 	case PCLK_CPU:
 		rate = rk3128_bus_get_clk(priv, clk->id);
 		break;
+	case SCLK_SPI0:
+		rate = rk3128_spi_get_clk(priv);
+		break;
 #ifndef CONFIG_SPL_BUILD
 	case SCLK_SARADC:
 		rate = rk3128_saradc_get_clk(priv);
@@ -608,6 +637,9 @@ static ulong rk3128_clk_set_rate(struct clk *clk, ulong rate)
 	case PCLK_CPU:
 		ret = rk3128_bus_set_clk(priv, clk->id, rate);
 		break;
+	case SCLK_SPI0:
+		rate = rk3128_spi_set_clk(priv, rate);
+		break;
 #ifndef CONFIG_SPL_BUILD
 	case SCLK_SARADC:
 		ret = rk3128_saradc_set_clk(priv, rate);

commit df77e7a38cff3076ccfec5fde2362b084e7f079b
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Jun 9 15:51:09 2020 +0800

    clk: rockchip: rk3036: add support to set and get spi clock
    
    Change-Id: I24db5f250fa89845b62005950d520600434adb99
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3036.h b/arch/arm/include/asm/arch-rockchip/cru_rk3036.h
index 45a488e28e..aa1a70a912 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3036.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3036.h
@@ -187,6 +187,15 @@ enum {
 	NANDC_SEL_DPLL,
 	NANDC_SEL_GPLL,
 
+	/* CLKSEL_CON25 */
+	SPI_PLL_SEL_SHIFT	= 8,
+	SPI_PLL_SEL_MASK	= 0x3 << SPI_PLL_SEL_SHIFT,
+	SPI_PLL_SEL_APLL	= 0,
+	SPI_PLL_SEL_DPLL,
+	SPI_PLL_SEL_GPLL,
+	SPI_DIV_SHIFT		= 0,
+	SPI_DIV_MASK		= 0x7f << SPI_DIV_SHIFT,
+
 	/* CRU_CLKSEL28_CON */
 	LCDC_DCLK_DIV_SHIFT	= 8,
 	LCDC_DCLK_DIV_MASK	= 0xff << LCDC_DCLK_DIV_SHIFT,
diff --git a/drivers/clk/rockchip/clk_rk3036.c b/drivers/clk/rockchip/clk_rk3036.c
index 8061fc1a77..9e0c9cd841 100644
--- a/drivers/clk/rockchip/clk_rk3036.c
+++ b/drivers/clk/rockchip/clk_rk3036.c
@@ -308,6 +308,31 @@ static ulong rockchip_mmc_set_clk(struct rk3036_cru *cru, uint clk_general_rate,
 	return rockchip_mmc_get_clk(cru, clk_general_rate, periph);
 }
 
+static ulong rk3036_spi_get_clk(struct rk3036_cru *cru, uint clk_general_rate)
+{
+	u32 div, con;
+
+	con = readl(&cru->cru_clksel_con[25]);
+	div = (con & SPI_DIV_MASK) >> SPI_DIV_SHIFT;
+
+	return DIV_TO_RATE(clk_general_rate, div);
+}
+
+static ulong  rk3036_spi_set_clk(struct rk3036_cru *cru,
+				 uint clk_general_rate,
+				 ulong hz)
+{
+	int div;
+
+	div = DIV_ROUND_UP(clk_general_rate, hz);
+	assert(div - 1 < 128);
+	rk_clrsetreg(&cru->cru_clksel_con[25],
+		     SPI_PLL_SEL_MASK | SPI_DIV_MASK,
+		     SPI_PLL_SEL_GPLL << SPI_PLL_SEL_SHIFT |
+		     (div - 1) << SPI_DIV_SHIFT);
+	return  rk3036_spi_get_clk(cru, clk_general_rate);
+}
+
 static ulong rockchip_dclk_lcdc_get_clk(struct rk3036_cru *cru,
 					uint clk_general_rate)
 {
@@ -384,6 +409,8 @@ static ulong rk3036_clk_get_rate(struct clk *clk)
 		return rockchip_dclk_lcdc_get_clk(priv->cru, gclk_rate);
 	case ACLK_LCDC:
 		return rockchip_aclk_lcdc_get_clk(priv->cru, gclk_rate);
+	case SCLK_SPI:
+		return rk3036_spi_get_clk(priv->cru, gclk_rate);
 	default:
 		return -ENOENT;
 	}
@@ -411,6 +438,10 @@ static ulong rk3036_clk_set_rate(struct clk *clk, ulong rate)
 		new_rate = rockchip_aclk_lcdc_set_clk(priv->cru, gclk_rate,
 						      rate);
 		break;
+	case SCLK_SPI:
+		new_rate = rk3036_spi_set_clk(priv->cru, gclk_rate,
+					      rate);
+		break;
 	default:
 		return -ENOENT;
 	}

commit db5be31cabd270d60c58cbaca2359cb9ac8de207
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Jun 9 15:50:30 2020 +0800

    clk: rockchip: rv1108: add support to set and get spi clock
    
    Change-Id: I96891a4adb53bbb84e27cc0ac5eddf3c613c1baa
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rv1108.h b/arch/arm/include/asm/arch-rockchip/cru_rv1108.h
index 0d1c1b0ae3..a29b9f8be2 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rv1108.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rv1108.h
@@ -128,6 +128,14 @@ enum {
 	CLK_DDR_DIV_CON_SHIFT		= 0,
 	CLK_DDR_DIV_CON_MASK		= 0x3 << CLK_DDR_DIV_CON_SHIFT,
 
+	/* CLKSEL_CON11 */
+	SPI_PLL_SEL_SHIFT		= 15,
+	SPI_PLL_SEL_MASK		= 0x1 << SPI_PLL_SEL_SHIFT,
+	SPI_PLL_SEL_DPLL		= 0,
+	SPI_PLL_SEL_GPLL,
+	SPI_DIV_SHIFT			= 8,
+	SPI_DIV_MASK			= 0x7f << SPI_DIV_SHIFT,
+
 	/* CLKSEL_CON19 */
 	CLK_I2C1_PLL_SEL_SHIFT		= 15,
 	CLK_I2C1_PLL_SEL_MASK		= 1 << CLK_I2C1_PLL_SEL_SHIFT,
diff --git a/drivers/clk/rockchip/clk_rv1108.c b/drivers/clk/rockchip/clk_rv1108.c
index 4aeaf3a34e..678d5fc802 100644
--- a/drivers/clk/rockchip/clk_rv1108.c
+++ b/drivers/clk/rockchip/clk_rv1108.c
@@ -484,6 +484,29 @@ static ulong rv1108_i2c_set_clk(struct rv1108_cru *cru, ulong clk_id, uint hz)
 	return rv1108_i2c_get_clk(cru, clk_id);
 }
 
+static ulong rv1108_spi_get_clk(struct rv1108_cru *cru)
+{
+	u32 div, con;
+
+	con = readl(&cru->clksel_con[11]);
+	div = (con & SPI_DIV_MASK) >> SPI_DIV_SHIFT;
+
+	return DIV_TO_RATE(rkclk_pll_get_rate(cru, CLK_GENERAL), div);
+}
+
+static ulong  rv1108_spi_set_clk(struct rv1108_cru *cru, ulong hz)
+{
+	int div;
+
+	div = DIV_ROUND_UP(rkclk_pll_get_rate(cru, CLK_GENERAL), hz);
+	assert(div - 1 < 128);
+	rk_clrsetreg(&cru->clksel_con[11],
+		     SPI_PLL_SEL_MASK | SPI_DIV_MASK,
+		     SPI_PLL_SEL_GPLL << SPI_PLL_SEL_SHIFT |
+		     (div - 1) << SPI_DIV_SHIFT);
+	return  rv1108_spi_get_clk(cru);
+}
+
 static ulong rv1108_mmc_get_clk(struct rv1108_cru *cru)
 {
 	u32 div, con;
@@ -563,6 +586,8 @@ static ulong rv1108_clk_get_rate(struct clk *clk)
 	case SCLK_EMMC:
 	case SCLK_EMMC_SAMPLE:
 		return rv1108_mmc_get_clk(priv->cru);
+	case SCLK_SPI:
+		return rv1108_spi_get_clk(priv->cru);
 	default:
 		return -ENOENT;
 	}
@@ -614,6 +639,9 @@ static ulong rv1108_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_EMMC:
 		new_rate = rv1108_mmc_set_clk(priv->cru, rate);
 		break;
+	case SCLK_SPI:
+		new_rate = rv1108_spi_set_clk(priv->cru, rate);
+		break;
 	default:
 		return -ENOENT;
 	}

commit 41f545b6de92824c5987626206ff15f663bbcba8
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed Aug 12 14:49:27 2020 +0800

    blk: op_flag bitwise definition
    
    Change-Id: I99750780e1d947bfd87a7b9960da8e75a1615baa
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/include/blk.h b/include/blk.h
index 482e1ce090..3c4fc1bb50 100644
--- a/include/blk.h
+++ b/include/blk.h
@@ -52,8 +52,8 @@ enum if_type {
 #define BLK_REV_SIZE		8
 
 /* define block device operation flags */
-#define BLK_PRE_RW		1	/* Block prepare read & write*/
-#define BLK_MTD_NBA_RW		2	/* MTD block non-block-aligned read & write */
+#define BLK_PRE_RW		BIT(0)	/* Block prepare read & write*/
+#define BLK_MTD_NBA_RW		BIT(1)	/* MTD block non-block-aligned read & write */
 
 /*
  * Identifies the partition table type (ie. MBR vs GPT GUID) signature

commit 42439462137fb8789eb5a95d3e85da7eda030fb4
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed Aug 12 14:47:22 2020 +0800

    mtd: mtd_blk: Implement mtd_dwrite none-alinged write
    
    Change-Id: I605ee52083ef5d9d2863f347390acc635eabd2bc
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index 9274f6d96a..ec4aa06aeb 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -446,13 +446,50 @@ ulong mtd_dwrite(struct udevice *udev, lbaint_t start,
 	if (desc->devnum == BLK_MTD_NAND ||
 	    desc->devnum == BLK_MTD_SPI_NAND ||
 	    desc->devnum == BLK_MTD_SPI_NOR) {
-		ret = mtd_map_write(mtd, off, &rwsize,
-				    NULL, mtd->size,
-				    (u_char *)(src), 0);
-		if (!ret)
-			return blkcnt;
-		else
-			return 0;
+		if (desc->op_flag == BLK_MTD_NBA_RW) {
+			lbaint_t off_aligned, alinged;
+			size_t rwsize_aligned;
+			u8 *p_buf;
+
+			alinged = off & mtd->erasesize_mask;
+			off_aligned = off - alinged;
+			rwsize_aligned = rwsize + alinged;
+			rwsize_aligned = (rwsize_aligned + mtd->erasesize - 1) &
+				~(mtd->erasesize - 1);
+
+			p_buf = malloc(rwsize_aligned);
+			if (!p_buf) {
+				printf("%s: Fail to malloc!", __func__);
+				return 0;
+			}
+
+			ret = mtd_map_read(mtd, off_aligned, &rwsize_aligned,
+					   NULL, mtd->size,
+					   (u_char *)(p_buf));
+			if (ret) {
+				free(p_buf);
+				return 0;
+			}
+
+			memcpy(p_buf + alinged, src, rwsize);
+
+			ret = mtd_map_write(mtd, off_aligned, &rwsize_aligned,
+					    NULL, mtd->size,
+					    (u_char *)(p_buf), 0);
+			free(p_buf);
+			if (!ret)
+				return blkcnt;
+			else
+				return 0;
+		} else {
+			ret = mtd_map_write(mtd, off, &rwsize,
+					    NULL, mtd->size,
+					    (u_char *)(src), 0);
+			if (!ret)
+				return blkcnt;
+			else
+				return 0;
+		}
 	} else {
 		return 0;
 	}

commit 3fb7bf029a0d9946442a4cfcb0a4eb26764dcf72
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jul 1 16:34:02 2020 +0800

    mtd: mtd_blk: implement mtd_dread_prepare()
    
    Prepare to read data, then data is transmitted in background.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Iab560f7f903549a0b6c27f7e8e2ac984ae2ac75c
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index f8df54b737..9274f6d96a 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -12,7 +12,9 @@
 #include <malloc.h>
 #include <nand.h>
 #include <part.h>
+#include <spi.h>
 #include <dm/device-internal.h>
+#include <linux/mtd/spi-nor.h>
 
 #define MTD_PART_NAND_HEAD		"mtdparts="
 #define MTD_ROOT_PART_NUM		"ubi.mtd="
@@ -398,9 +400,16 @@ ulong mtd_dread(struct udevice *udev, lbaint_t start,
 			return 0;
 	} else if (desc->devnum == BLK_MTD_SPI_NOR) {
 #if defined(CONFIG_SPI_FLASH_MTD) || defined(CONFIG_SPL_BUILD)
+		struct spi_nor *nor = (struct spi_nor *)mtd->priv;
+		struct spi_slave *spi = nor->spi;
 		size_t retlen_nor;
 
+		if (desc->op_flag == BLK_PRE_RW)
+			spi->mode |= SPI_DMA_PREPARE;
 		mtd_read(mtd, off, rwsize, &retlen_nor, dst);
+		if (desc->op_flag == BLK_PRE_RW)
+			spi->mode |= SPI_DMA_PREPARE;
+
 		if (retlen_nor == rwsize)
 			return blkcnt;
 		else

commit a505e63b041bab66aef8b756c92d160ae8906464
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Aug 10 11:17:31 2020 +0800

    make.sh: support pack idblock.bin
    
    Syntax:
            ./make.sh --idblock [--tpl] [--spl] [ini file]
    
    Example:
            ./make.sh --idblock
            ./make.sh --idblock --spl
            ./make.sh --idblock --tpl
            ./make.sh --idblock --tpl --spl
            ./make.sh --idblock --tpl --spl ../rkbin/RKBOOT/RK3128MINIALL.ini
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I173ec258e89c4599eff751eff1b7b6fc12737e4a

diff --git a/make.sh b/make.sh
index 9853c1285e..cf62c0154f 100755
--- a/make.sh
+++ b/make.sh
@@ -216,6 +216,9 @@ function process_args()
 				ARG_NO_UBOOT="y"
 				shift 1
 				;;
+			--idblock)  # pack idblock.bin
+				shift 1
+				;;
 			--tpl|tpl)  # use tpl file
 				ARG_TPL_BIN="tpl/u-boot-tpl.bin"
 				shift 1
@@ -498,6 +501,10 @@ function sub_commands()
 			make CROSS_COMPILE=${TOOLCHAIN_GCC} envtools
 			exit 0
 			;;
+		--idblock)
+			pack_idblock
+			exit 0
+			;;
 		--tpl|--spl|tpl|spl)
 			pack_spl_loader_image
 			exit 0
@@ -541,6 +548,40 @@ function unwind_addr_or_continue()
 	fi
 }
 
+function pack_idblock()
+{
+	INI=${INI_LOADER}
+	if [ ! -f ${INI} ]; then
+		echo "ERROR: No ${INI}"
+		exit 1
+	fi
+
+	# chip
+	COMMON_H=`grep "_common.h:" include/autoconf.mk.dep | awk -F "/" '{ printf $3 }'`
+	PLAT=${COMMON_H%_*}
+
+	# file
+	SPL_BIN=${RKBIN}/`sed -n "/FlashBoot=/s/FlashBoot=//p" ${INI} | tr -d '\r'`
+	TPL_BIN=${RKBIN}/`sed -n "/FlashData=/s/FlashData=//p" ${INI} | tr -d '\r'`
+	if [ ! -z "${ARG_SPL_BIN}" ]; then
+		SPL_BIN=${ARG_SPL_BIN}
+	fi
+	if [ ! -z "${ARG_TPL_BIN}" ]; then
+		TPL_BIN=${ARG_TPL_BIN}
+	fi
+
+	# pack
+	rm idblock.bin -f
+	./tools/mkimage -n ${PLAT} -T rksd -d ${TPL_BIN}:${SPL_BIN} idblock.bin
+	echo "Input:"
+	echo "    ${INI}"
+	echo "    ${TPL_BIN}"
+	echo "    ${SPL_BIN}"
+	echo
+	echo "Pack ${PLAT} idblock.bin okay!"
+	echo
+}
+
 function pack_uboot_itb_image()
 {
 	INI=${INI_TRUST}

commit b42d2103f15903c45eca2e5eb9a971cdc653c160
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Aug 5 09:45:54 2020 +0800

    make.sh: clean up and simplify
    
    There are so many commands in make.sh, we have to clean
    and seperate command into individual script file. And
    some command is to be the official option for outside.
    
    By the way, adding nm command to analyze image size.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I37ba38b621216f6db79325fada5980a54ca987cb

diff --git a/make.sh b/make.sh
index 5fffd60fc6..9853c1285e 100755
--- a/make.sh
+++ b/make.sh
@@ -8,6 +8,7 @@
 set -e
 JOB=`sed -n "N;/processor/p" /proc/cpuinfo|wc -l`
 SUPPORT_LIST=`ls configs/*[r,p][x,v,k][0-9][0-9]*_defconfig`
+CMD_ARGS=$1
 
 # @LOADER: map to $RKCHIP_LOADER for loader ini
 # @TRUST:  map to $RKCHIP_TRUST for trust ini
@@ -54,11 +55,6 @@ CHIP_CFG_FIXUP_TABLE=(
 	"CONFIG_ROCKCHIP_RV1126    3       -       -,-          -,-        -,-          -,-           -           -"
 )
 
-CHIP_TPL_MAGIC_TABLE=(
-	"CONFIG_ROCKCHIP_PX30      RK33"
-	"CONFIG_ROCKCHIP_RV1126    110B"
-)
-
 ########################################### User can modify #############################################
 # User's rkbin tool relative path
 RKBIN_TOOLS=../rkbin/tools
@@ -68,14 +64,14 @@ ADDR2LINE_ARM32=arm-linux-gnueabihf-addr2line
 ADDR2LINE_ARM64=aarch64-linux-gnu-addr2line
 OBJ_ARM32=arm-linux-gnueabihf-objdump
 OBJ_ARM64=aarch64-linux-gnu-objdump
+NM_ARM32=arm-linux-gnueabihf-nm
+NM_ARM64=aarch64-linux-gnu-nm
 GCC_ARM32=arm-linux-gnueabihf-
 GCC_ARM64=aarch64-linux-gnu-
 TOOLCHAIN_ARM32=../prebuilts/gcc/linux-x86/arm/gcc-linaro-6.3.1-2017.05-x86_64_arm-linux-gnueabihf/bin
 TOOLCHAIN_ARM64=../prebuilts/gcc/linux-x86/aarch64/gcc-linaro-6.3.1-2017.05-x86_64_aarch64-linux-gnu/bin
 
 ########################################### User not touch #############################################
-RKTOOLS=./tools
-
 # Declare global INI file searching index name for every chip, update in select_chip_info()
 RKCHIP="-"
 RKCHIP_LABEL="-"
@@ -90,15 +86,23 @@ RKBIN=
 
 # Declare global toolchain path for CROSS_COMPILE, updated in select_toolchain()
 TOOLCHAIN_GCC=
+TOOLCHAIN_NM=
 TOOLCHAIN_OBJDUMP=
 TOOLCHAIN_ADDR2LINE=
 
 # Declare global plaform configure, updated in fixup_platform_configure()
-PLATFORM_RSA=
-PLATFORM_SHA=
-PLATFORM_UBOOT_SIZE=
-PLATFORM_TRUST_SIZE=
-PLATFORM_TYPE="RKFW"
+PLAT_RSA=
+PLAT_SHA=
+PLAT_UBOOT_SIZE=
+PLAT_TRUST_SIZE=
+PLAT_TYPE="RKFW" # default
+
+SRCTREE=`pwd`
+SCRIPT_ATF="${SRCTREE}/scripts/atf.sh"
+SCRIPT_TOS="${SRCTREE}/scripts/tos.sh"
+SCRIPT_SPL="${SRCTREE}/scripts/spl.sh"
+SCRIPT_UBOOT="${SRCTREE}/scripts/uboot.sh"
+SCRIPT_LOADER="${SRCTREE}/scripts/loader.sh"
 
 #########################################################################################################
 function help()
@@ -108,8 +112,8 @@ function help()
 	echo "	./make.sh [board|sub-command]"
 	echo
 	echo "	 - board:        board name of defconfig"
-	echo "	 - sub-command:  elf*|loader*|spl*|tpl*|itb|trust*|uboot|map|sym|<addr>"
-	echo "	 - ini:          assigned ini file to pack trust/loader"
+	echo "	 - sub-command:  elf*|loader|trust|uboot|--spl|--tpl|itb|map|sym|<addr>"
+	echo "	 - ini:          ini file to pack trust/loader"
 	echo
 	echo "Output:"
 	echo "	 When board built okay, there are uboot/trust/loader images in current directory"
@@ -129,17 +133,17 @@ function help()
 	echo "	./make.sh trust <ini>              --- pack trust img with assigned ini file"
 	echo "	./make.sh loader                   --- pack loader bin"
 	echo "	./make.sh loader <ini>             --- pack loader img with assigned ini file"
-	echo "	./make.sh spl                      --- pack loader with u-boot-spl.bin and u-boot-tpl.bin"
-	echo "	./make.sh spl-s                    --- pack loader only replace miniloader with u-boot-spl.bin"
-	echo "	./make.sh itb                      --- pack u-boot.itb(TODO: bl32 is not included for ARMv8)"
+	echo "	./make.sh --spl                    --- pack loader with u-boot-spl.bin"
+	echo "	./make.sh --tpl                    --- pack loader with u-boot-tpl.bin"
+	echo "	./make.sh --tpl --spl              --- pack loader with u-boot-tpl.bin and u-boot-spl.bin"
 	echo
 	echo "3. Debug:"
 	echo "	./make.sh elf                      --- dump elf file with -D(default)"
 	echo "	./make.sh elf-S                    --- dump elf file with -S"
 	echo "	./make.sh elf-d                    --- dump elf file with -d"
 	echo "	./make.sh elf-*                    --- dump elf file with -*"
-	echo "	./make.sh <no reloc_addr>          --- dump function symbol and code position of address(no relocated)"
-	echo "	./make.sh <reloc_addr-reloc_off>   --- dump function symbol and code position of address(relocated)"
+	echo "	./make.sh <no reloc_addr>          --- unwind address(no relocated)"
+	echo "	./make.sh <reloc_addr-reloc_off>   --- unwind address(relocated)"
 	echo "	./make.sh map                      --- cat u-boot.map"
 	echo "	./make.sh sym                      --- cat u-boot.sym"
 }
@@ -159,7 +163,7 @@ function prepare()
 	fi
 
 	if grep  -q '^CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y' .config ; then
-		PLATFORM_TYPE="FIT"
+		PLAT_TYPE="FIT"
 	fi
 }
 
@@ -167,69 +171,71 @@ function process_args()
 {
 	while [ $# -gt 0 ]; do
 		case $1 in
-			--help|-help|help|--h|-h)
+			*help|--h|-h)
 				help
 				exit 0
 				;;
-
-			''|loader|trust|uboot|spl*|tpl*|debug*|itb|env|fit*)
-				ARG_CMD=$1
+			# '': build with exist .config
+			# loader|trust|uboot: pack image
+			# debug*|map|sym|elf*|nm: debug command
+			# env: build env tool
+			# itb: pack itb image
+			# fit: pack non-secure uboot.img && boot.img
+			''|loader|trust|uboot|debug*|itb|env|fit|map|sym|elf*|nm)
+				if [ "$2" == "spl" -o "$2" == "tpl" ]; then
+					ARG_TSPL=$2
+					shift 1
+				fi
 				shift 1
 				;;
-
-			--sz-trust)
+			# trust/loader ini files for packing trust.img/loader.img
+			*.ini|*.INI)
+				if [ ! -f $1 ]; then
+					echo "ERROR: No $1"
+				fi
+				if grep -q 'CODE471_OPTION' $1 ; then
+					ARG_INI_LOADER=$1
+				elif grep -Eq ''BL31_OPTION'|'TOS'' $1 ; then
+					ARG_INI_TRUST=$1
+				fi
+				shift 1
+				;;
+			--sz-trust) # set trust size
 				ARG_TRUST_SIZE="--size $2 $3"
 				shift 3
 				;;
-
-			--sz-uboot)
+			--sz-uboot) # set uboot size
 				ARG_UBOOT_SIZE="--size $2 $3"
 				shift 3
 				;;
-
-			--no-pack)
+			--no-pack)  # FIT: build but not pack image
 				ARG_NO_PACK="y"
 				shift 1
 				;;
-
-			--no-uboot)
+			--no-uboot) # FIT: pack uboot.img without u-boot
 				ARG_NO_UBOOT="y"
 				shift 1
 				;;
-
-			map|sym|elf*)
-				ARG_CMD=$1
-				if [ "$2" == "spl" -o "$2" == "tpl" ]; then
-					ARG_S_TPL=$2
-					shift 1
-				fi
+			--tpl|tpl)  # use tpl file
+				ARG_TPL_BIN="tpl/u-boot-tpl.bin"
 				shift 1
 				;;
-
-			*.ini)
-				if [ ! -f $1 ]; then
-					echo "ERROR: No $1"
-				fi
-				if grep -q 'CODE471_OPTION' $1 ; then
-					ARG_INI_LOADER=$1
-				elif grep -Eq ''BL31_OPTION'|'TOS'' $1 ; then
-					ARG_INI_TRUST=$1
-				fi
+			--spl|spl*) # use spl file
+				ARG_SPL_BIN="spl/u-boot-spl.bin"
 				shift 1
 				;;
-
 			*)
-				# out scripts args
-				NUM=$(./scripts/fit-mkimg.sh --p-check $1)
+				#1. FIT scripts args
+				NUM=$(./scripts/fit-mkimg.sh --arg-check $1)
 				if  [ ${NUM} -ne 0 ]; then
 					[ ${NUM} -eq 1 ] && ARG_LIST_FIT="${ARG_LIST_FIT} $1"
 					[ ${NUM} -eq 2 ] && ARG_LIST_FIT="${ARG_LIST_FIT} $1 $2"
 					shift ${NUM}
 					continue
-				# FUNC address
+				#2. unwind function address
 				elif [ -z $(echo $1 | sed 's/[0-9,a-f,A-F,x,X,-]//g') ]; then
 					ARG_FUNCADDR=$1
-				# xxx_defconfig
+				#3. make defconfig
 				else
 					ARG_BOARD=$1
 					if [ ! -f configs/${ARG_BOARD}_defconfig -a ! -f configs/${ARG_BOARD}.config ]; then
@@ -266,6 +272,7 @@ function select_toolchain()
 	if grep -q '^CONFIG_ARM64=y' .config ; then
 		if [ -d ${TOOLCHAIN_ARM64} ]; then
 			absolute_path=$(cd `dirname ${TOOLCHAIN_ARM64}`; pwd)
+			TOOLCHAIN_NM=${absolute_path}/bin/${NM_ARM64}
 			TOOLCHAIN_GCC=${absolute_path}/bin/${GCC_ARM64}
 			TOOLCHAIN_OBJDUMP=${absolute_path}/bin/${OBJ_ARM64}
 			TOOLCHAIN_ADDR2LINE=${absolute_path}/bin/${ADDR2LINE_ARM64}
@@ -276,6 +283,7 @@ function select_toolchain()
 	else
 		if [ -d ${TOOLCHAIN_ARM32} ]; then
 			absolute_path=$(cd `dirname ${TOOLCHAIN_ARM32}`; pwd)
+			TOOLCHAIN_NM=${absolute_path}/bin/${NM_ARM32}
 			TOOLCHAIN_GCC=${absolute_path}/bin/${GCC_ARM32}
 			TOOLCHAIN_OBJDUMP=${absolute_path}/bin/${OBJ_ARM32}
 			TOOLCHAIN_ADDR2LINE=${absolute_path}/bin/${ADDR2LINE_ARM32}
@@ -286,130 +294,6 @@ function select_toolchain()
 	fi
 }
 
-function sub_commands()
-{
-	# skip "--" parameter, such as "--rollback-index-..."
-	if [[ "${ARG_CMD}" != "--*" ]]; then
-		cmd=${ARG_CMD%-*}
-		arg=${ARG_CMD#*-}
-	else
-		cmd=${ARG_CMD}
-	fi
-
-	if [ "${ARG_S_TPL}" == "tpl" -o "${ARG_S_TPL}" == "spl" ]; then
-		elf=`find -name u-boot-${ARG_S_TPL}`
-		map=`find -name u-boot-${ARG_S_TPL}.map`
-		sym=`find -name u-boot-${ARG_S_TPL}.sym`
-	else
-		elf=u-boot
-		map=u-boot.map
-		sym=u-boot.sym
-	fi
-
-	case ${cmd} in
-		elf)
-			if [ ! -f ${elf} ]; then
-				echo "ERROR: No elf: ${elf}"
-				exit 1
-			else
-				if [ "${cmd}" == "elf" -a "${arg}" == "elf" ]; then
-					arg=D # default
-				fi
-				${TOOLCHAIN_OBJDUMP} -${arg} ${elf} | less
-				exit 0
-			fi
-			;;
-
-		debug)
-			./scripts/rkpatch.sh ${arg}
-			exit 0
-			;;
-
-		fit)
-			if [ "${arg}" == "ns" ]; then
-				./scripts/fit-mkimg.sh --uboot-itb --boot-itb --no-vboot ${ARG_LIST_FIT}
-			fi
-			exit 0
-			;;
-
-		map)
-			cat ${map} | less
-			exit 0
-			;;
-
-		sym)
-			cat ${sym} | less
-			exit 0
-			;;
-
-		trust)
-			pack_trust_image
-			exit 0
-			;;
-
-		loader)
-			pack_loader_image
-			exit 0
-			;;
-
-		tpl|spl)
-			pack_spl_loader_image ${ARG_CMD}
-			exit 0
-			;;
-
-		itb)
-			pack_uboot_itb_image
-			exit 0
-			;;
-
-		uboot)
-			pack_uboot_image
-			exit 0
-			;;
-
-		env)
-			make CROSS_COMPILE=${TOOLCHAIN_GCC} envtools
-			exit 0
-			;;
-
-		--rollback-index*)
-			pack_fit_image ${ARG_LIST_FIT}
-			exit 0
-			;;
-		*)
-			# Search function and code position of address
-			FUNCADDR=${ARG_FUNCADDR}
-			RELOC_OFF=${FUNCADDR#*-}
-			FUNCADDR=${FUNCADDR%-*}
-			if [ -z $(echo ${FUNCADDR} | sed 's/[0-9,a-f,A-F,x,X,-]//g') ] && [ ${FUNCADDR} ]; then
-				# With prefix: '0x' or '0X'
-				if [ `echo ${FUNCADDR} | sed -n "/0[x,X]/p" | wc -l` -ne 0 ]; then
-					FUNCADDR=`echo ${FUNCADDR} | awk '{ print strtonum($0) }'`
-					FUNCADDR=`echo "obase=16;${FUNCADDR}"|bc |tr '[A-Z]' '[a-z]'`
-				fi
-				if [ `echo ${RELOC_OFF} | sed -n "/0[x,X]/p" | wc -l` -ne 0 ] && [ ${RELOC_OFF} ]; then
-					RELOC_OFF=`echo ${RELOC_OFF} | awk '{ print strtonum($0) }'`
-					RELOC_OFF=`echo "obase=16;${RELOC_OFF}"|bc |tr '[A-Z]' '[a-z]'`
-				fi
-
-				# If reloc address is assigned, do sub
-				if [ "${FUNCADDR}" != "${RELOC_OFF}" ]; then
-					# Hex -> Dec -> SUB -> Hex
-					FUNCADDR=`echo $((16#${FUNCADDR}))`
-					RELOC_OFF=`echo $((16#${RELOC_OFF}))`
-					FUNCADDR=$((FUNCADDR-RELOC_OFF))
-					FUNCADDR=$(echo "obase=16;${FUNCADDR}"|bc |tr '[A-Z]' '[a-z]')
-				fi
-
-				echo
-				sed -n "/${FUNCADDR}/p" ${sym}
-				${TOOLCHAIN_ADDR2LINE} -e ${elf} ${FUNCADDR}
-				exit 0
-			fi
-			;;
-	esac
-}
-
 #
 # We select chip info to do:
 #	1. RKCHIP:        fixup platform configure
@@ -424,16 +308,16 @@ function select_chip_info()
 	#  - PX30, PX3SE
 	#  - RK????, RK????X
 	#  - RV????
-	chip_pattern='^CONFIG_ROCKCHIP_[R,P][X,V,K][0-9ESX]{1,5}'
-	RKCHIP=`egrep -o ${chip_pattern} .config`
+	CHIP_PATTERN='^CONFIG_ROCKCHIP_[R,P][X,V,K][0-9ESX]{1,5}'
+	RKCHIP=`egrep -o ${CHIP_PATTERN} .config`
 
 	# default
 	RKCHIP=${RKCHIP##*_}
 	# fixup ?
 	for item in "${CHIP_TYPE_FIXUP_TABLE[@]}"
 	do
-		config_xxx=`echo ${item} | awk '{ print $1 }'`
-		if grep  -q "^${config_xxx}=y" .config ; then
+		CONFIG_ROCKCHIP_XXX=`echo ${item} | awk '{ print $1 }'`
+		if grep  -q "^${CONFIG_ROCKCHIP_XXX}=y" .config ; then
 			RKCHIP=`echo ${item} | awk '{ print $2 }'`
 			RKCHIP_LOADER=`echo ${item} | awk '{ print $3 }'`
 			RKCHIP_TRUST=`echo  ${item} | awk '{ print $4 }'`
@@ -455,27 +339,27 @@ function select_chip_info()
 # Priority: default < CHIP_CFG_FIXUP_TABLE() < make.sh args
 function fixup_platform_configure()
 {
-	u_kb="-" u_num="-" t_kb="-" t_num="-"  sha="-" rsa="-"
+	U_KB="-" U_NUM="-" T_KB="-" T_NUM="-"  SHA="-" RSA="-"
 
 	for item in "${CHIP_CFG_FIXUP_TABLE[@]}"
 	do
 		config_xxx=`echo ${item} | awk '{ print $1 }'`
 		if grep  -q "^${config_xxx}=y" .config ; then
 			# <*> Fixup rsa/sha pack mode for platforms
-			rsa=`echo ${item} | awk '{ print $2 }'`
-			sha=`echo ${item} | awk '{ print $3 }'`
+			RSA=`echo ${item} | awk '{ print $2 }'`
+			SHA=`echo ${item} | awk '{ print $3 }'`
 
 			# <*> Fixup images size pack for platforms, and ini file
 			if grep -q '^CONFIG_ARM64=y' .config ; then
-				u_kb=`echo  ${item} | awk '{ print $4 }' | awk -F "," '{ print $1 }'`
-				t_kb=`echo  ${item} | awk '{ print $4 }' | awk -F "," '{ print $2 }'`
-				u_num=`echo ${item} | awk '{ print $5 }' | awk -F "," '{ print $1 }'`
-				t_num=`echo ${item} | awk '{ print $5 }' | awk -F "," '{ print $2 }'`
+				U_KB=`echo  ${item} | awk '{ print $4 }' | awk -F "," '{ print $1 }'`
+				T_KB=`echo  ${item} | awk '{ print $4 }' | awk -F "," '{ print $2 }'`
+				U_NUM=`echo ${item} | awk '{ print $5 }' | awk -F "," '{ print $1 }'`
+				T_NUM=`echo ${item} | awk '{ print $5 }' | awk -F "," '{ print $2 }'`
 			else
-				u_kb=`echo  ${item} | awk '{ print $6 }' | awk -F "," '{ print $1 }'`
-				t_kb=`echo  ${item} | awk '{ print $6 }' | awk -F "," '{ print $2 }'`
-				u_num=`echo ${item} | awk '{ print $7 }' | awk -F "," '{ print $1 }'`
-				t_num=`echo ${item} | awk '{ print $7 }' | awk -F "," '{ print $2 }'`
+				U_KB=`echo  ${item} | awk '{ print $6 }' | awk -F "," '{ print $1 }'`
+				T_KB=`echo  ${item} | awk '{ print $6 }' | awk -F "," '{ print $2 }'`
+				U_NUM=`echo ${item} | awk '{ print $7 }' | awk -F "," '{ print $1 }'`
+				T_NUM=`echo ${item} | awk '{ print $7 }' | awk -F "," '{ print $2 }'`
 				# AArch32
 				if grep -q '^CONFIG_ARM64_BOOT_AARCH32=y' .config ; then
 					PADDING=`echo ${item} | awk '{ print $8 }'`
@@ -492,26 +376,26 @@ function fixup_platform_configure()
 		fi
 	done
 
-	if [ "${sha}" != "-" ]; then
-		PLATFORM_SHA="--sha ${sha}"
+	if [ "${SHA}" != "-" ]; then
+		PLAT_SHA="--sha ${SHA}"
 	fi
-	if [ "${rsa}" != "-" ]; then
-		PLATFORM_RSA="--rsa ${rsa}"
+	if [ "${RSA}" != "-" ]; then
+		PLAT_RSA="--rsa ${RSA}"
 	fi
-	if [ "${u_kb}" != "-" ]; then
-		PLATFORM_UBOOT_SIZE="--size ${u_kb} ${u_num}"
+	if [ "${U_KB}" != "-" ]; then
+		PLAT_UBOOT_SIZE="--size ${U_KB} ${U_NUM}"
 	fi
-	if [ "${t_kb}" != "-" ]; then
-		PLATFORM_TRUST_SIZE="--size ${t_kb} ${t_num}"
+	if [ "${T_KB}" != "-" ]; then
+		PLAT_TRUST_SIZE="--size ${T_KB} ${T_NUM}"
 	fi
 
 	# args
 	if [ ! -z "${ARG_UBOOT_SIZE}" ]; then
-		PLATFORM_UBOOT_SIZE=${ARG_UBOOT_SIZE}
+		PLAT_UBOOT_SIZE=${ARG_UBOOT_SIZE}
 	fi
 
 	if [ ! -z "${ARG_TRUST_SIZE}" ]; then
-		PLATFORM_TRUST_SIZE=${ARG_TRUST_SIZE}
+		PLAT_TRUST_SIZE=${ARG_TRUST_SIZE}
 	fi
 }
 
@@ -537,293 +421,284 @@ function select_ini_file()
 	fi
 
 	# args
-	if [ "${ARG_INI_TRUST}" != "" ]; then
+	if [ ! -z "${ARG_INI_TRUST}" ]; then
 		INI_TRUST=${ARG_INI_TRUST}
 	fi
-	if [ "${ARG_INI_LOADER}" != "" ]; then
+	if [ ! -z "${ARG_INI_LOADER}" ]; then
 		INI_LOADER=${ARG_INI_LOADER}
 	fi
 }
 
-function handle_args_late()
-{
-	ARG_LIST_FIT="${ARG_LIST_FIT} --ini-trust ${INI_TRUST} --ini-loader ${INI_LOADER}"
-}
-
-function pack_uboot_image()
+function sub_commands()
 {
-	if [ "${PLATFORM_TYPE}" != "RKFW" ]; then
-		return
+	# skip "--" parameter, such as "--rollback-index-..."
+	if [[ ${CMD_ARGS} != --* ]]; then
+		CMD=${CMD_ARGS%-*}
+		ARG=${CMD_ARGS#*-}
+	else
+		CMD=${CMD_ARGS}
 	fi
 
-	# Check file size
-	head_kb=2
-	uboot_kb=`ls -l u-boot.bin | awk '{ print $5 }'`
-	if [ "${PLATFORM_UBOOT_SIZE}" == "" ]; then
-		uboot_max_kb=1046528
+	if [ "${ARG_TSPL}" == "tpl" -o "${ARG_TSPL}" == "spl" ]; then
+		ELF=`find -name u-boot-${ARG_TSPL}`
+		MAP=`find -name u-boot-${ARG_TSPL}.map`
+		SYM=`find -name u-boot-${ARG_TSPL}.sym`
 	else
-		uboot_max_kb=`echo ${PLATFORM_UBOOT_SIZE} | awk '{print strtonum($2)}'`
-		uboot_max_kb=$(((uboot_max_kb-head_kb)*1024))
+		ELF=u-boot
+		MAP=u-boot.map
+		SYM=u-boot.sym
 	fi
 
-	if [ ${uboot_kb} -gt ${uboot_max_kb} ]; then
-		echo
-		echo "ERROR: pack uboot failed! u-boot.bin actual: ${uboot_kb} bytes, max limit: ${uboot_max_kb} bytes"
-		exit 1
-	fi
+	case ${CMD} in
+		elf|nm)
+			if [ "${CMD}" == "nm" ]; then
+				${TOOLCHAIN_NM} -r --size ${ELF} | less
+			else
+				if [ "${CMD}" == "elf" -a "${ARG}" == "elf" ]; then
+					ARG=D # default
+				fi
+				${TOOLCHAIN_OBJDUMP} -${ARG} ${ELF} | less
+			fi
+			exit 0
+			;;
+		map|sym)
+			if [ ${CMD} == "map" ]; then
+				cat ${MAP} | less
+			else
+				cat ${SYM} | less
+			fi
+			exit 0
+			;;
+		debug)
+			./scripts/rkpatch.sh ${ARG}
+			exit 0
+			;;
+		fit)
+			# Non-secure
+			./scripts/fit-mkimg.sh --uboot-itb --boot-itb --no-vboot ${ARG_LIST_FIT}
+			exit 0
+			;;
+		uboot)
+			pack_uboot_image
+			exit 0
+			;;
+		trust)
+			pack_trust_image
+			exit 0
+			;;
+		loader)
+			pack_loader_image
+			exit 0
+			;;
+		itb)
+			pack_uboot_itb_image
+			exit 0
+			;;
+		env)
+			make CROSS_COMPILE=${TOOLCHAIN_GCC} envtools
+			exit 0
+			;;
+		--tpl|--spl|tpl|spl)
+			pack_spl_loader_image
+			exit 0
+			;;
+		*)
+			unwind_addr_or_continue
+			;;
+	esac
+}
 
-	# Pack
-	uboot_load_addr=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" include/autoconf.mk|tr -d '\r'`
-	if [ -z ${uboot_load_addr} ]; then
-		echo "ERROR: No CONFIG_SYS_TEXT_BASE for u-boot";
-		exit 1
+function unwind_addr_or_continue()
+{
+	FUNCADDR=${ARG_FUNCADDR}
+	RELOCOFF=${FUNCADDR#*-}
+	FUNCADDR=${FUNCADDR%-*}
+
+	if [ -z $(echo ${FUNCADDR} | sed 's/[0-9,a-f,A-F,x,X,-]//g') ] && [ ${FUNCADDR} ]; then
+		# With prefix: '0x' or '0X'
+		if [ `echo ${FUNCADDR} | sed -n "/0[x,X]/p" | wc -l` -ne 0 ]; then
+			FUNCADDR=`echo ${FUNCADDR} | awk '{ print strtonum($0) }'`
+			FUNCADDR=`echo "obase=16;${FUNCADDR}"|bc | tr '[A-Z]' '[a-z]'`
+		fi
+		if [ `echo ${RELOCOFF} | sed -n "/0[x,X]/p" | wc -l` -ne 0 ] && [ ${RELOCOFF} ]; then
+			RELOCOFF=`echo ${RELOCOFF} | awk '{ print strtonum($0) }'`
+			RELOCOFF=`echo "obase=16;${RELOCOFF}"|bc | tr '[A-Z]' '[a-z]'`
+		fi
+
+		# If reloc address is assigned, do sub
+		if [ "${FUNCADDR}" != "${RELOCOFF}" ]; then
+			# Hex -> Dec -> SUB -> Hex
+			FUNCADDR=`echo $((16#${FUNCADDR}))`
+			RELOCOFF=`echo $((16#${RELOCOFF}))`
+			FUNCADDR=$((FUNCADDR-RELOCOFF))
+			FUNCADDR=$(echo "obase=16;${FUNCADDR}"|bc | tr '[A-Z]' '[a-z]')
+		fi
+
+		echo
+		sed -n "/${FUNCADDR}/p" ${SYM}
+		${TOOLCHAIN_ADDR2LINE} -e ${ELF} ${FUNCADDR}
+		exit 0
 	fi
-	${RKTOOLS}/loaderimage --pack --uboot u-boot.bin uboot.img ${uboot_load_addr} ${PLATFORM_UBOOT_SIZE}
-	rm u-boot.img u-boot-dtb.img -rf
-	echo "pack uboot okay! Input: u-boot.bin"
 }
 
 function pack_uboot_itb_image()
 {
-	ini=${INI_TRUST}
-	if [ ! -f ${INI_TRUST} ]; then
-		echo "pack trust failed! Can't find: ${INI_TRUST}"
-		return
+	INI=${INI_TRUST}
+	if [ ! -f ${INI} ]; then
+		echo "ERROR: No ${INI}"
+		exit 1
 	fi
 
 	if [ "${ARM64_TRUSTZONE}" == "y" ]; then
-		bl31=`sed -n '/_bl31_/s/PATH=//p' ${ini} |tr -d '\r'`
-		cp ${RKBIN}/${bl31} bl31.elf
+		BL31_ELF=`sed -n '/_bl31_/s/PATH=//p' ${INI} | tr -d '\r'`
+		cp ${RKBIN}/${BL31_ELF} bl31.elf
 		make CROSS_COMPILE=${TOOLCHAIN_GCC} u-boot.itb
-		echo "pack u-boot.itb okay! Input: ${ini}"
+		echo "pack u-boot.itb okay! Input: ${INI}"
 	else
-		tos_image=`sed -n "/TOS=/s/TOS=//p" ${ini} |tr -d '\r'`
-		tosta_image=`sed -n "/TOSTA=/s/TOSTA=//p" ${ini} |tr -d '\r'`
-		if [ ${tosta_image} ]; then
-			cp ${RKBIN}/${tosta_image} tee.bin
-		elif [ ${tos_image} ]; then
-			cp ${RKBIN}/${tos_image}   tee.bin
+		# TOS
+		TOS=`sed -n "/TOS=/s/TOS=//p" ${INI} | tr -d '\r'`
+		TOSTA=`sed -n "/TOSTA=/s/TOSTA=//p" ${INI} | tr -d '\r'`
+		if [ ! -z "${TOSTA}" ]; then
+			cp ${RKBIN}/${TOSTA} tee.bin
+		elif [ ! -z "${TOS}" ]; then
+			cp ${RKBIN}/${TOS}   tee.bin
 		else
-			echo "ERROR: No any tee bin"
+			echo "ERROR: No tee bin"
 			exit 1
 		fi
 
-		tee_offset=`sed -n "/ADDR=/s/ADDR=//p" ${ini} |tr -d '\r'`
-		if [ "${tee_offset}" == "" ]; then
-			tee_offset=0x8400000
+		TEE_OFFSET=`sed -n "/ADDR=/s/ADDR=//p" ${INI} | tr -d '\r'`
+		if [ "${TEE_OFFSET}" == "" ]; then
+			TEE_OFFSET=0x8400000
 		fi
 
-		mcu_enabled=`awk -F"," '/MCU=/ { printf $3 }' ${ini} | tr -d ' '`
-		if [ "${mcu_enabled}" == "enabled" ]; then
-			mcu_image=`awk -F"," '/MCU=/  { printf $1 }' ${ini} | tr -d ' ' | cut -c 5-`
-			cp ${RKBIN}/${mcu_image} mcu.bin
-			mcu_offset=`awk -F"," '/MCU=/ { printf $2 }' ${ini} | tr -d ' '`
-			optional_mcu="-m "${mcu_offset}
-		else
-			optional_mcu=
+		# MCU
+		MCU_ENABLED=`awk -F"," '/MCU=/ { printf $3 }' ${INI} | tr -d ' '`
+		if [ "${MCU_ENABLED}" == "enabled" -o "${MCU_ENABLED}" == "okay" ]; then
+			MCU=`awk -F"," '/MCU=/  { printf $1 }' ${INI} | tr -d ' ' | cut -c 5-`
+			cp ${RKBIN}/${MCU} mcu.bin
+			MCU_OFFSET=`awk -F"," '/MCU=/ { printf $2 }' ${INI} | tr -d ' '`
 		fi
 
-		compression=`awk -F"," '/COMPRESSION=/  { printf $1 }' ${ini} | tr -d ' ' | cut -c 13-`
-		if [ -z "${compression}" ]; then
-			compression="none"
+		COMPRESSION=`awk -F"," '/COMPRESSION=/  { printf $1 }' ${INI} | tr -d ' ' | cut -c 13-`
+		if [ -z "${COMPRESSION}" ]; then
+			COMPRESSION="none"
 		fi
 
+		# its
 		SPL_FIT_SOURCE=`sed -n "/CONFIG_SPL_FIT_SOURCE=/s/CONFIG_SPL_FIT_SOURCE=//p" .config | tr -d '""'`
 		if [ ! -z ${SPL_FIT_SOURCE} ]; then
 			cp ${SPL_FIT_SOURCE} u-boot.its
 		else
 			SPL_FIT_GENERATOR=`sed -n "/CONFIG_SPL_FIT_GENERATOR=/s/CONFIG_SPL_FIT_GENERATOR=//p" .config | tr -d '""'`
-			${SPL_FIT_GENERATOR} -u -t ${tee_offset} -c ${compression} ${optional_mcu} > u-boot.its
+			if [ ! -z ${MCU_OFFSET} ]; then
+				${SPL_FIT_GENERATOR} -u -t ${TEE_OFFSET} -c ${COMPRESSION} -m ${MCU_OFFSET} > u-boot.its
+			else
+				${SPL_FIT_GENERATOR} -u -t ${TEE_OFFSET} -c ${COMPRESSION} > u-boot.its
+			fi
 		fi
+
 		./tools/mkimage -f u-boot.its -E u-boot.itb
-		echo "pack u-boot.itb okay! Input: ${ini}"
+		echo "pack u-boot.itb okay! Input: ${INI}"
 	fi
 	echo
 }
 
 function pack_spl_loader_image()
 {
-	mode=$1
-	tmpdir=${RKBIN}/tmp
-	tmpini=${tmpdir}/${RKCHIP_LOADER}MINIALL.ini
-	ini=${INI_LOADER}
-	if [ ! -f ${INI_LOADER} ]; then
-		echo "pack loader failed! Can't find: ${INI_LOADER}"
-		return
-	fi
-
-	# Find magic for TPL
-	for item in "${CHIP_TPL_MAGIC_TABLE[@]}"
-	do
-		config_xxx=`echo ${item} | awk '{ print $1 }'`
-		if grep -q "^${config_xxx}=y" .config ; then
-			header=`echo ${item} | awk '{ print $2 }'`
-		fi
-	done
-
-	if [ -z ${header} ]; then
-		header=`sed -n '/NAME=/s/NAME=//p' ${ini}`
-	fi
-
-	# Prepare files
-	rm ${tmpdir} -rf && mkdir ${tmpdir} -p
-	cp spl/u-boot-spl.bin ${tmpdir}/ && cp ${ini} ${tmpini}
-
-	if [ "${mode}" == "tpl-spl" ]; then	# pack tpl+spl
-		label="TPL+SPL"
-		cp tpl/u-boot-tpl.bin ${tmpdir}/
-		dd if=${tmpdir}/u-boot-tpl.bin of=${tmpdir}/tpl.bin bs=1 skip=4
-		sed -i "1s/^/${header:0:4}/" ${tmpdir}/tpl.bin
-		sed -i "s/FlashData=.*$/FlashData=.\/tmp\/tpl.bin/" ${tmpini}
-		sed -i "0,/Path1=.*/s/Path1=.*$/Path1=.\/tmp\/tpl.bin/" ${tmpini}
-		sed -i "s/FlashBoot=.*$/FlashBoot=.\/tmp\/u-boot-spl.bin/" ${tmpini}
-	elif [ "${mode}" == "tpl" ]; then	# pack tpl
-		label="TPL"
-		cp tpl/u-boot-tpl.bin ${tmpdir}/
-		dd if=${tmpdir}/u-boot-tpl.bin of=${tmpdir}/tpl.bin bs=1 skip=4
-		sed -i "1s/^/${header:0:4}/" ${tmpdir}/tpl.bin
-		sed -i "s/FlashData=.*$/FlashData=.\/tmp\/tpl.bin/" ${tmpini}
-		sed -i "0,/Path1=.*/s/Path1=.*$/Path1=.\/tmp\/tpl.bin/" ${tmpini}
-	else
-		label="SPL"
-		sed -i "s/FlashBoot=.*$/FlashBoot=.\/tmp\/u-boot-spl.bin/" ${tmpini}
-	fi
-
-	# Pack
+	rm *_loader_*.bin -f
 	cd ${RKBIN}
-	${RKTOOLS}/boot_merger ${tmpini}
-
-	rm ${tmpdir} -rf && cd -
-	rm *_loader_*.bin -rf && mv ${RKBIN}/*_loader_*.bin ./
-	filename=`basename *_loader_*.bin`
-	if [[ ${filename} != *spl* ]]; then
-		rename 's/loader_/spl_loader_/' *_loader_*.bin
-	fi
-	echo "pack loader(${label}) okay! Input: ${ini}"
-}
-
-function pack_loader_image()
-{
-	ini=${INI_LOADER}
-	if [ ! -f ${INI_LOADER} ]; then
-		echo "pack loader failed! Can't find: ${INI_LOADER}"
-		return
-	fi
-
-	rm *_loader_*.bin -rf
-	numline=`cat ${ini} | wc -l`
-	if [ ${numline} -eq 1 ]; then
-		image=`sed -n "/PATH=/p" ${ini} | tr -d '\r' | cut -d '=' -f 2`
-		cp ${RKBIN}/${image} ./
+	if [ ! -z "${ARG_SPL_BIN}" -a ! -z "${ARG_TPL_BIN}" ]; then
+		${SCRIPT_SPL} --ini ${INI_LOADER} --tpl ${SRCTREE}/${ARG_TPL_BIN} --spl ${SRCTREE}/${ARG_SPL_BIN}
+	elif [ ! -z "${ARG_TPL_BIN}" ]; then
+		${SCRIPT_SPL} --ini ${INI_LOADER} --tpl ${SRCTREE}/${ARG_TPL_BIN}
 	else
-		cd ${RKBIN}
-		${RKTOOLS}/boot_merger ${ini}
-		cd - && mv ${RKBIN}/*_loader_*.bin ./
+		${SCRIPT_SPL} --ini ${INI_LOADER} --spl ${SRCTREE}/${ARG_SPL_BIN}
+	fi
+	cd -
+	if [ -f ${RKBIN}/*_loader_*.bin ]; then
+		mv ${RKBIN}/*_loader_*.bin ./
 	fi
-
-	file=`ls *loader*.bin`
-	echo "pack ${file} okay! Input: ${ini}"
 }
 
-function pack_arm32_trust_image()
+function pack_uboot_image()
 {
-	ini=$1
-	tos_image=`sed -n "/TOS=/s/TOS=//p" ${ini} |tr -d '\r'`
-	tosta_image=`sed -n "/TOSTA=/s/TOSTA=//p" ${ini} |tr -d '\r'`
-	tee_output=`sed -n "/OUTPUT=/s/OUTPUT=//p" ${ini} |tr -d '\r'`
-	if [ "${tee_output}" == "" ]; then
-		tee_output="./trust.img"
-	fi
-	tee_offset=`sed -n "/ADDR=/s/ADDR=//p" ${ini} |tr -d '\r'`
-	if [ "${tee_offset}" == "" ]; then
-		tee_offset=0x8400000
-	fi
-
-	# OP-TEE is 132M(0x8400000) offset from DRAM base.
-	dram_base=`sed -n "/CONFIG_SYS_SDRAM_BASE=/s/CONFIG_SYS_SDRAM_BASE=//p" include/autoconf.mk|tr -d '\r'`
-	tee_load_addr=$((dram_base+tee_offset))
-	tee_load_addr=$(echo "obase=16;${tee_load_addr}"|bc) # Convert Dec to Hex
-
-	if [ ${tosta_image} ]; then
-		${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${tosta_image} ${tee_output} ${tee_load_addr} ${PLATFORM_TRUST_SIZE}
-	elif [ ${tos_image} ]; then
-		${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${tos_image}   ${tee_output} ${tee_load_addr} ${PLATFORM_TRUST_SIZE}
-	else
-		echo "ERROR: No any tee bin"
-		exit 1
-	fi
-	echo "pack trust okay! Input: ${ini}"
+	rm u-boot.img u-boot-dtb.img -f
+	LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" include/autoconf.mk|tr -d '\r'`
+	${SCRIPT_UBOOT} --load ${LOAD_ADDR} ${PLAT_UBOOT_SIZE}
 }
 
-function pack_arm64_trust_image()
+function pack_loader_image()
 {
-	ini=$1
+	rm *_loader_*.bin -f
 	cd ${RKBIN}
-	${RKTOOLS}/trust_merger ${PLATFORM_SHA} ${PLATFORM_RSA} ${PLATFORM_TRUST_SIZE} ${ini}
-	cd - && mv ${RKBIN}/trust*.img ./
-	echo "pack trust okay! Input: ${ini}"
+	${SCRIPT_LOADER} --ini ${INI_LOADER}
+	cd -
+	if [ -f ${RKBIN}/*_loader_*.bin ]; then
+		mv ${RKBIN}/*_loader_*.bin ./
+	fi
 }
 
 function pack_trust_image()
 {
-	if [ "${PLATFORM_TYPE}" != "RKFW" ]; then
-		return
-	fi
+	DRAM_BASE=`sed -n "/CONFIG_SYS_SDRAM_BASE=/s/CONFIG_SYS_SDRAM_BASE=//p" include/autoconf.mk|tr -d '\r'`
 
-	rm trust*.img -rf
-	ini=${INI_TRUST}
-	if [ ! -f ${INI_TRUST} ]; then
-		echo "pack trust failed! Can't find: ${INI_TRUST}"
-		return
-	fi
-
-	numline=`cat ${ini} | wc -l`
-	if [ ${numline} -eq 1 ]; then
-		image=`sed -n "/PATH=/p" ${ini} | tr -d '\r' | cut -d '=' -f 2`
-		cp ${RKBIN}/${image} ./trust.img
-		echo "pack trust okay! Input: ${ini}"
-		return;
+	rm trust*.img -f
+	cd ${RKBIN}
+	if [ "${ARM64_TRUSTZONE}" == "y" ]; then
+		${SCRIPT_ATF} --ini ${INI_TRUST} ${PLAT_SHA} ${PLAT_RSA} ${PLAT_TRUST_SIZE}
 	else
-		if [ "${ARM64_TRUSTZONE}" == "y" ]; then
-			pack_arm64_trust_image ${ini}
-		else
-			pack_arm32_trust_image ${ini}
-		fi
+		${SCRIPT_TOS} --ini ${INI_TRUST} --base ${DRAM_BASE} ${PLAT_TRUST_SIZE}
+	fi
+	cd -
+	if [ -f ${RKBIN}/trust*.img ]; then
+		mv ${RKBIN}/trust*.img ./
 	fi
 }
 
 function pack_fit_image()
 {
+	# If we don't plan to have uboot in uboot.img in case of: SPL => Trust => Kernel, creating empty files.
 	if [ "${ARG_NO_UBOOT}" == "y" ]; then
-		rm u-boot-nodtb.bin u-boot.dtb -rf
+		rm u-boot-nodtb.bin u-boot.dtb -f
 		touch u-boot-nodtb.bin u-boot.dtb
 	fi
 
+	# Verified boot=1:  must build both uboot.img and boot.img
+	# Verified boot=0:  build uboot.img
 	if grep -q '^CONFIG_FIT_SIGNATURE=y' .config ; then
 		./scripts/fit-mkimg.sh --uboot-itb --boot-itb ${ARG_LIST_FIT}
 	else
-		rm uboot.img trust*.img -rf
+		rm uboot.img trust*.img -f
 		./scripts/fit-mkimg.sh --uboot-itb --no-vboot --no-rebuild ${ARG_LIST_FIT}
 		echo "pack uboot.img okay! Input: ${INI_TRUST}"
 	fi
 }
 
-function pack_images()
+function handle_args_late()
 {
-	if [ "${ARG_NO_PACK}" != "y" ]; then
-		if [ "${PLATFORM_TYPE}" == "RKFW" ]; then
-			pack_uboot_image
-			pack_trust_image
-			pack_loader_image
-		elif [ "${PLATFORM_TYPE}" == "FIT" ]; then
-			pack_fit_image ${ARG_LIST_FIT}
-		fi
-	fi
+	ARG_LIST_FIT="${ARG_LIST_FIT} --ini-trust ${INI_TRUST} --ini-loader ${INI_LOADER}"
 }
 
 function clean_files()
 {
-	rm spl/u-boot-spl.dtb tpl/u-boot-tpl.dtb u-boot.dtb -rf
+	rm spl/u-boot-spl.dtb tpl/u-boot-tpl.dtb u-boot.dtb -f
+	rm spl/u-boot-spl tpl/u-boot-tpl u-boot -f
+}
+
+function pack_images()
+{
+	if [ "${ARG_NO_PACK}" == "y" ]; then
+		return
+	fi
+
+	if [ "${PLAT_TYPE}" == "RKFW" ]; then
+		pack_uboot_image
+		pack_trust_image
+		pack_loader_image
+	elif [ "${PLAT_TYPE}" == "FIT" ]; then
+		pack_fit_image ${ARG_LIST_FIT}
+	fi
 }
 
 function finish()
@@ -848,4 +723,3 @@ clean_files
 make CROSS_COMPILE=${TOOLCHAIN_GCC} all --jobs=${JOB}
 pack_images
 finish
-
diff --git a/scripts/atf.sh b/scripts/atf.sh
new file mode 100755
index 0000000000..19b628d38d
--- /dev/null
+++ b/scripts/atf.sh
@@ -0,0 +1,54 @@
+#!/bin/bash
+#
+# Copyright (c) 2020 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier: GPL-2.0
+#
+
+if [ $# -eq 0 ]; then
+	echo "ERROR: No args of $0"
+	exit 1
+fi
+
+while [ $# -gt 0 ]; do
+	case $1 in
+		--ini)
+			INI=$2	# mandory
+			shift 2
+			;;
+		--rsa)
+			RSA="$1 $2"
+			shift 2
+			;;
+		--sha)
+			SHA="$1 $2"
+			shift 2
+			;;
+		--size)
+			SIZE="$1 $2 $3"
+			shift 3
+			;;
+		*)
+			echo "ERROR: Unknown arg: $1"
+			exit 1
+			;;
+	esac
+done
+
+if [ ! -f ${INI} ]; then
+	echo "pack trust failed! Can't find: ${INI}"
+	exit 0
+fi
+
+rm trust*.img -f
+
+COUNT=`cat ${INI} | wc -l`
+if [ ${COUNT} -eq 1 ]; then
+	IMG=`sed -n "/PATH=/p" ${INI} | tr -d '\r' | cut -d '=' -f 2`
+	cp ${IMG} ./trust.img
+else
+	./tools/trust_merger ${INI} ${SIZE} ${SHA} ${RSA}
+fi
+
+echo "pack trust okay! Input: ${INI}"
+echo
diff --git a/scripts/fit-mkimg.sh b/scripts/fit-mkimg.sh
index d44c376dbf..e095f8ce40 100755
--- a/scripts/fit-mkimg.sh
+++ b/scripts/fit-mkimg.sh
@@ -62,7 +62,7 @@ function help()
 	echo "    --uboot-itb"
 	echo "    --boot-itb"
 	echo "    --boot_img"
-	echo "    --p-check"
+	echo "    --arg-check"
 	echo
 }
 
@@ -118,7 +118,7 @@ function fit_process_args()
 
 	while [ $# -gt 0 ]; do
 		case $1 in
-			--p-check)
+			--arg-check)
 				ARG_VALIDATE=$2
 				shift 2
 				;;
@@ -188,8 +188,9 @@ function fit_process_args()
 
 function fit_rebuild()
 {
+	# Verified-boot: should rebuild code but don't need to repack images.
 	if [ "${ARG_NO_REBUILD}" != "y" ]; then
-		./make.sh --no-pack # Always no pack
+		./make.sh --no-pack # Build but not pack loader/trust/uboot, etc.
 	fi
 
 	rm ${FIT_DIR} -rf
@@ -198,13 +199,13 @@ function fit_rebuild()
 
 function fit_gen_uboot_itb()
 {
-	./make.sh itb ${ARG_INI_TRUST}
+	./make.sh itb ${ARG_INI_TRUST} >/dev/null 2>&1
 	check_its ${ITS_UBOOT}
 
 	if [ "${ARG_NO_VBOOT}" == "y" ]; then
 		${MKIMAGE} -f ${ITS_UBOOT} -E -p ${OFFS_NS_UBOOT} ${ITB_UBOOT} -v ${ARG_VER_UBOOT}
 		if [ "${ARG_SPL_NEW}" == "y" ]; then
-			./make.sh spl-s ${ARG_INI_LOADER}
+			./make.sh --spl ${ARG_INI_LOADER}
 			echo "pack loader with new: spl/u-boot-spl.bin"
 		else
 			./make.sh loader ${ARG_INI_LOADER}
@@ -294,7 +295,7 @@ function fit_gen_uboot_itb()
 			fi
 			cat ${SPL_DTB} >> spl/u-boot-spl.bin
 
-			./make.sh spl-s ${ARG_INI_LOADER}
+			./make.sh --spl ${ARG_INI_LOADER}
 			echo "pack loader with new: spl/u-boot-spl.bin"
 		else
 			./make.sh loader ${ARG_INI_LOADER}
diff --git a/scripts/loader.sh b/scripts/loader.sh
new file mode 100755
index 0000000000..6939fdffae
--- /dev/null
+++ b/scripts/loader.sh
@@ -0,0 +1,41 @@
+#!/bin/bash
+#
+# Copyright (c) 2020 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier: GPL-2.0
+#
+
+if [ $# -eq 0 ]; then
+	echo "ERROR: No args of $0"
+	exit 1
+fi
+
+while [ $# -gt 0 ]; do
+	case $1 in
+		--ini)
+			INI=$2
+			shift 2
+			;;
+		*)
+			echo "ERROR: Unknown arg: $1"
+			exit 1
+			;;
+	esac
+done
+
+rm *_loader_*.bin -f
+
+if [ ! -f ${INI} ]; then
+	echo "pack loader failed! Can't find: ${INI}"
+	exit 0
+fi
+
+COUNT=`cat ${INI} | wc -l`
+if [ ${COUNT} -eq 1 ]; then
+	IMG=`sed -n "/PATH=/p" ${INI} | tr -d '\r' | cut -d '=' -f 2`
+	cp ${IMG} ./
+else
+	./tools/boot_merger ${INI}
+fi
+
+echo "pack loader okay! Input: ${INI}"
diff --git a/scripts/spl.sh b/scripts/spl.sh
new file mode 100755
index 0000000000..511b4ea77d
--- /dev/null
+++ b/scripts/spl.sh
@@ -0,0 +1,98 @@
+#!/bin/bash
+#
+# Copyright (c) 2020 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier: GPL-2.0
+#
+
+if [ $# -eq 0 ]; then
+	echo "ERROR: No args of $0"
+	exit 1
+fi
+
+while [ $# -gt 0 ]; do
+	case $1 in
+		--ini)
+			INI=$2
+			shift 2
+			;;
+		--spl)
+			SPL_BIN=$2
+			if [ ! -f ${SPL_BIN} ]; then
+				echo "ERROR: No ${SPL_BIN}"
+				exit 1
+			fi
+			shift 2
+			;;
+		--tpl)
+			TPL_BIN=$2
+			if [ ! -f ${TPL_BIN} ]; then
+				echo "ERROR: No ${TPL_BIN}"
+				exit 1
+			fi
+			shift 2
+			;;
+		*)
+			echo "ERROR: Unknown arg: $1"
+			exit 1
+			;;
+	esac
+done
+
+if [ ! -f ${INI} ]; then
+	echo "ERROR: No ${INI}"
+	exit 0
+fi
+
+if [ "${TPL_BIN}" == "" -a "${SPL_BIN}" == "" ]; then
+	echo "ERROR: No SPL and TPL file"
+	exit 0
+fi
+
+rm tmp -rf && mkdir tmp -p
+TMP_INI="tmp/MINIALL.ini"
+cp ${INI} ${TMP_INI}
+
+# magic
+MAGIC=`sed -n '/NAME=/s/NAME=//p' ${INI}`
+if [ "${MAGIC}" == "RV1126" ]; then
+	MAGIC="110B"
+elif [ "${MAGIC}" == "RKPX30" ]; then
+	MAGIC="RK33"
+fi
+
+# replace
+if [ "${TPL_BIN}" != "" -a "${SPL_BIN}" != "" ]; then
+	cp ${TPL_BIN} tmp/u-boot-tpl.bin
+	cp ${SPL_BIN} tmp/u-boot-spl.bin
+	dd if=tmp/u-boot-tpl.bin of=tmp/tpl.bin bs=1 skip=4
+
+	sed -i "1s/^/${MAGIC:0:4}/" tmp/tpl.bin
+	sed -i "s/FlashData=.*$/FlashData=.\/tmp\/tpl.bin/"        ${TMP_INI}
+	sed -i "0,/Path1=.*/s/Path1=.*$/Path1=.\/tmp\/tpl.bin/"    ${TMP_INI}
+	sed -i "s/FlashBoot=.*$/FlashBoot=.\/tmp\/u-boot-spl.bin/" ${TMP_INI}
+	LABEL="TPL+SPL"
+elif [ "${TPL_BIN}" != "" ]; then
+	cp ${TPL_BIN} tmp/u-boot-tpl.bin
+	dd if=tmp/u-boot-tpl.bin of=tmp/tpl.bin bs=1 skip=4
+	sed -i "1s/^/${MAGIC:0:4}/" tmp/tpl.bin
+	sed -i "s/FlashData=.*$/FlashData=.\/tmp\/tpl.bin/"        ${TMP_INI}
+	sed -i "0,/Path1=.*/s/Path1=.*$/Path1=.\/tmp\/tpl.bin/"    ${TMP_INI}
+	LABEL="TPL"
+else
+	cp ${SPL_BIN} tmp/u-boot-spl.bin
+	sed -i "s/FlashBoot=.*$/FlashBoot=.\/tmp\/u-boot-spl.bin/" ${TMP_INI}
+	LABEL="SPL"
+fi
+
+rm *_loader_*.bin -f
+./tools/boot_merger ${TMP_INI}
+
+FNAME=`basename *_loader_*.bin`
+if [[ ${FNAME} != *spl* ]]; then
+	rename 's/loader_/spl_loader_/' *_loader_*.bin
+fi
+rm tmp/ -rf
+
+echo "pack loader(${LABEL}) okay! Input: ${INI}"
+echo
diff --git a/scripts/tos.sh b/scripts/tos.sh
new file mode 100755
index 0000000000..056529f285
--- /dev/null
+++ b/scripts/tos.sh
@@ -0,0 +1,74 @@
+#!/bin/bash
+#
+# Copyright (c) 2020 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier: GPL-2.0
+#
+
+if [ $# -eq 0 ]; then
+	echo "ERROR: No args of $0"
+	exit 1
+fi
+
+while [ $# -gt 0 ]; do
+	case $1 in
+		--base)
+			DRAM_BASE=$2
+			shift 2
+			;;
+		--ini)
+			INI=$2
+			shift 2
+			;;
+		--size)
+			SIZE="$1 $2 $3"
+			shift 3
+			;;
+		*)
+			echo "ERROR: Unknown arg: $1"
+			exit 1
+			;;
+	esac
+done
+
+if [ ! -f ${INI} ]; then
+	echo "pack trust failed! Can't find: ${INI}"
+	exit 0
+fi
+
+TOS=`sed -n "/TOS=/s/TOS=//p" ${INI} | tr -d '\r'`
+TOSTA=`sed -n "/TOSTA=/s/TOSTA=//p" ${INI} | tr -d '\r'`
+OUTPUT=`sed -n "/OUTPUT=/s/OUTPUT=//p" ${INI} | tr -d '\r'`
+
+if [ -z "${OUTPUT}" ]; then
+	OUTPUT="./trust.img"
+fi
+
+LOAD_OFFSET=`sed -n "/ADDR=/s/ADDR=//p" ${INI} | tr -d '\r'`
+if [ -z "${LOAD_OFFSET}" ]; then
+	# default offset
+	LOAD_OFFSET=0x8400000
+fi
+
+LOAD_ADDR=$((DRAM_BASE+LOAD_OFFSET))
+LOAD_ADDR=$(echo "obase=16;${LOAD_ADDR}"|bc) # Convert Dec to Hex
+
+rm trust*.img -f
+
+COUNT=`cat ${INI} | wc -l`
+if [ ${COUNT} -eq 1 ]; then
+	IMG=`sed -n "/PATH=/p" ${INI} | tr -d '\r' | cut -d '=' -f 2`
+	cp ${IMG} ./trust.img
+else
+	if [ ! -z "${TOSTA}" ]; then
+		./tools/loaderimage --pack --trustos ${TOSTA} ${OUTPUT} ${LOAD_ADDR} ${SIZE}
+	elif [ ! -z "${TOS}" ]; then
+		./tools/loaderimage --pack --trustos ${TOS}   ${OUTPUT} ${LOAD_ADDR} ${SIZE}
+	else
+		echo "ERROR: No tee bin"
+		exit 1
+	fi
+fi
+
+echo "pack trust okay! Input: ${INI}"
+echo
diff --git a/scripts/uboot.sh b/scripts/uboot.sh
new file mode 100755
index 0000000000..d2298f3eab
--- /dev/null
+++ b/scripts/uboot.sh
@@ -0,0 +1,53 @@
+#!/bin/bash
+#
+# Copyright (c) 2020 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier: GPL-2.0
+#
+
+if [ $# -eq 0 ]; then
+	echo "ERROR: No args of $0"
+	exit 1
+fi
+
+while [ $# -gt 0 ]; do
+	case $1 in
+		--load)
+			LOAD_ADDR=$2
+			shift 2
+			;;
+		--size)
+			SIZE="$1 $2 $3"
+			shift 3
+			;;
+		*)
+			echo "ERROR: Unknown arg: $1"
+			exit 1
+			;;
+	esac
+done
+
+rm uboot.img -f
+
+if [ -z "${LOAD_ADDR}" ]; then
+	echo "ERROR: No load address"
+	exit 1
+fi
+
+HEAD_KB=2
+BIN_KB=`ls -l u-boot.bin | awk '{ print $5 }'`
+if [ -z "${SIZE}" ]; then
+	MAX_KB=1046528
+else
+	MAX_KB=`echo ${SIZE} | awk '{print strtonum($2)}'`
+	MAX_KB=$(((MAX_KB-HEAD_KB)*1024))
+fi
+
+if [ ${BIN_KB} -gt ${MAX_KB} ]; then
+	echo "ERROR: pack uboot failed! u-boot.bin actual: ${BIN_KB} bytes, max limit: ${MAX_KB} bytes"
+	exit 1
+fi
+
+./tools/loaderimage --pack --uboot u-boot.bin uboot.img ${LOAD_ADDR} ${SIZE}
+echo "pack uboot okay! Input: u-boot.bin"
+echo

commit 3965b9dee49a4ade570f74fb26888e61284d0cc9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Aug 7 10:03:26 2020 +0800

    rockchip: rv1126: make fit: support gzip pack empty u-boot-nodtb.bin
    
    Checking file size in case of "./make.sh --no-uboot ...".
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I9fd89a4b02e0afab7622f375af580e94e32b5309

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh b/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh
index 09e16f4b8b..e343105ac1 100755
--- a/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh
+++ b/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh
@@ -10,25 +10,29 @@ source ./${srctree}/arch/arm/mach-rockchip/make_fit_args.sh
 
 # compression
 rm -f ${srctree}/mcu.digest ${srctree}/u-boot-nodtb.digest ${srctree}/tee.digest
+rm -f ${srctree}/u-boot-nodtb.bin.gz ${srctree}/tee.bin.gz ${srctree}/mcu.bin.gz
 
 if [ "${COMPRESSION}" == "gzip" ]; then
 	openssl dgst -sha256 -binary -out ${srctree}/u-boot-nodtb.digest ${srctree}/u-boot-nodtb.bin
 	openssl dgst -sha256 -binary -out ${srctree}/tee.digest ${srctree}/tee.bin
-	gzip -k -f -9 ${srctree}/u-boot-nodtb.bin
 	gzip -k -f -9 ${srctree}/tee.bin
+	UBOOT_SZ=`ls -l u-boot-nodtb.bin | awk '{ print $5 }'`
+	if [ ${UBOOT_SZ} -gt 0 ]; then
+		gzip -k -f -9 ${srctree}/u-boot-nodtb.bin
+	else
+		touch ${srctree}/u-boot-nodtb.bin.gz
+	fi
+	if [ ! -z "${MCU_LOAD_ADDR}" ]; then
+		openssl dgst -sha256 -binary -out ${srctree}/mcu.digest ${srctree}/mcu.bin
+		gzip -k -f -9 ${srctree}/mcu.bin
+	fi
+
 	SUFFIX=".gz"
 else
 	COMPRESSION="none"
 	SUFFIX=
 fi
 
-if [ ! -z "${MCU_LOAD_ADDR}" ]; then
-	if [ "${COMPRESSION}" == "gzip" ]; then
-		openssl dgst -sha256 -binary -out ${srctree}/mcu.digest ${srctree}/mcu.bin
-		gzip -k -f -9 ${srctree}/mcu.bin
-	fi
-fi
-
 # u-boot and tee
 UBOOT_BODY="			data = /incbin/(\"./u-boot-nodtb.bin${SUFFIX}\");
 			compression = \"${COMPRESSION}\";

commit e6a8227120c4768196dfed2656d8c83e8ef6bbe8
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Thu Aug 6 17:30:47 2020 +0800

    rockchip: rkcommon: add support for rv1126
    
    Change-Id: Ic13bbfd95cf6fae1ce0a3eeffdfedb02e1a569f2
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index 220c699ab4..44e82dfa74 100644
--- a/tools/rkcommon.c
+++ b/tools/rkcommon.c
@@ -78,6 +78,7 @@ static struct spl_info spl_infos[] = {
 	{ "rk3399", "RK33", 0x30000 - 0x2000, false },
 	{ "px30", "RK33", 0x2800, false },
 	{ "rv1108", "RK11", 0x1800, false },
+	{ "rv1126", "110B", 0x10000 - 0x1000, false},
 	{ "rk1808", "RK18", 0x200000 - 0x2000, false},
 };
 

commit 0f91a0406d6ad2a95c1c1bb1b0af9786b6c6d23d
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Aug 6 10:46:35 2020 +0800

    blk: remove read_prepare()
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I1b4016bd084027540237f691f3bcc3cb7f9a1120

diff --git a/include/blk.h b/include/blk.h
index b4f284e2c9..482e1ce090 100644
--- a/include/blk.h
+++ b/include/blk.h
@@ -229,20 +229,6 @@ struct blk_ops {
 	unsigned long (*read)(struct udevice *dev, lbaint_t start,
 			      lbaint_t blkcnt, void *buffer);
 
-	/**
-	 * read_prepare() - read from a block device
-	 *
-	 * @dev:	Device to read from
-	 * @start:	Start block number to read (0=first)
-	 * @blkcnt:	Number of blocks to read
-	 * @buffer:	Destination buffer for data read
-	 * @return number of blocks read, or -ve error number (see the
-	 * IS_ERR_VALUE() macro
-	 */
-#ifdef CONFIG_SPL_BLK_READ_PREPARE
-	unsigned long (*read_prepare)(struct udevice *dev, lbaint_t start,
-				      lbaint_t blkcnt, void *buffer);
-#endif
 	/**
 	 * write() - write to a block device
 	 *

commit 7863dac107d8198d4afa6d320e3fa7b61f38225c
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Aug 6 10:04:00 2020 +0800

    dm: mmc: remove mmc_bread_prepare in mmc_blk_ops
    
    Merge it to mmc_bread() with using op_flag.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I3f63ebf66c43184a134c49a39a62feb2d5ae9821

diff --git a/drivers/mmc/mmc-uclass.c b/drivers/mmc/mmc-uclass.c
index 06c3b8fc14..9548fb98d5 100644
--- a/drivers/mmc/mmc-uclass.c
+++ b/drivers/mmc/mmc-uclass.c
@@ -315,9 +315,6 @@ static int mmc_blk_probe(struct udevice *dev)
 
 static const struct blk_ops mmc_blk_ops = {
 	.read	= mmc_bread,
-#ifdef CONFIG_SPL_BLK_READ_PREPARE
-	.read_prepare	= mmc_bread_prepare,
-#endif
 #ifndef CONFIG_SPL_BUILD
 	.write	= mmc_bwrite,
 	.erase	= mmc_berase,
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 941005a19e..d1cc6cf5ff 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -294,24 +294,26 @@ static int mmc_read_blocks_prepare(struct mmc *mmc, void *dst, lbaint_t start,
 }
 #endif
 
+#ifdef CONFIG_SPL_BLK_READ_PREPARE
 #if CONFIG_IS_ENABLED(BLK)
-ulong mmc_bread(struct udevice *dev, lbaint_t start, lbaint_t blkcnt, void *dst)
+ulong mmc_bread_prepare(struct udevice *dev, lbaint_t start, lbaint_t blkcnt, void *dst)
 #else
-ulong mmc_bread(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt,
-		void *dst)
+ulong mmc_bread_prepare(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt,
+			void *dst)
 #endif
 {
 #if CONFIG_IS_ENABLED(BLK)
 	struct blk_desc *block_dev = dev_get_uclass_platdata(dev);
 #endif
 	int dev_num = block_dev->devnum;
+	int timeout = 0;
 	int err;
-	lbaint_t cur, blocks_todo = blkcnt;
 
 	if (blkcnt == 0)
 		return 0;
 
 	struct mmc *mmc = find_mmc_device(dev_num);
+
 	if (!mmc)
 		return 0;
 
@@ -326,7 +328,7 @@ ulong mmc_bread(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt,
 	if ((start + blkcnt) > block_dev->lba) {
 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
 		printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
-			start + blkcnt, block_dev->lba);
+		       start + blkcnt, block_dev->lba);
 #endif
 		return 0;
 	}
@@ -336,60 +338,59 @@ ulong mmc_bread(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt,
 		return 0;
 	}
 
-	do {
-		cur = (blocks_todo > mmc->cfg->b_max) ?
-			mmc->cfg->b_max : blocks_todo;
-		if (mmc_read_blocks(mmc, dst, start, cur) != cur) {
-			debug("%s: Failed to read blocks\n", __func__);
-			int timeout = 0;
+	if (mmc_read_blocks_prepare(mmc, dst, start, blkcnt) != blkcnt) {
+		debug("%s: Failed to read blocks\n", __func__);
 re_init_retry:
-			timeout++;
-			/*
-			 * Try re-init seven times.
-			 */
-			if (timeout > 7) {
-				printf("Re-init retry timeout\n");
-				return 0;
-			}
+		timeout++;
+		/*
+		 * Try re-init seven times.
+		 */
+		if (timeout > 7) {
+			printf("Re-init retry timeout\n");
+			return 0;
+		}
 
-			mmc->has_init = 0;
-			if (mmc_init(mmc))
-				return 0;
+		mmc->has_init = 0;
+		if (mmc_init(mmc))
+			return 0;
 
-			if (mmc_read_blocks(mmc, dst, start, cur) != cur) {
-				printf("%s: Re-init mmc_read_blocks error\n",
-				       __func__);
-				goto re_init_retry;
-			}
+		if (mmc_read_blocks_prepare(mmc, dst, start, blkcnt) != blkcnt) {
+			printf("%s: Re-init mmc_read_blocks_prepare error\n",
+			       __func__);
+			goto re_init_retry;
 		}
-		blocks_todo -= cur;
-		start += cur;
-		dst += cur * mmc->read_bl_len;
-	} while (blocks_todo > 0);
+	}
 
 	return blkcnt;
 }
+#endif
 
-#ifdef CONFIG_SPL_BLK_READ_PREPARE
 #if CONFIG_IS_ENABLED(BLK)
-ulong mmc_bread_prepare(struct udevice *dev, lbaint_t start, lbaint_t blkcnt, void *dst)
+ulong mmc_bread(struct udevice *dev, lbaint_t start, lbaint_t blkcnt, void *dst)
 #else
-ulong mmc_bread_prepare(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt,
-			void *dst)
+ulong mmc_bread(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt,
+		void *dst)
 #endif
 {
 #if CONFIG_IS_ENABLED(BLK)
 	struct blk_desc *block_dev = dev_get_uclass_platdata(dev);
 #endif
 	int dev_num = block_dev->devnum;
-	int timeout = 0;
 	int err;
+	lbaint_t cur, blocks_todo = blkcnt;
 
+#ifdef CONFIG_SPL_BLK_READ_PREPARE
+	if (block_dev->op_flag == BLK_PRE_RW)
+#if CONFIG_IS_ENABLED(BLK)
+		return mmc_bread_prepare(dev, start, blkcnt, dst);
+#else
+		return mmc_bread_prepare(block_dev, start, blkcnt, dst);
+#endif
+#endif
 	if (blkcnt == 0)
 		return 0;
 
 	struct mmc *mmc = find_mmc_device(dev_num);
-
 	if (!mmc)
 		return 0;
 
@@ -404,7 +405,7 @@ ulong mmc_bread_prepare(struct blk_desc *block_dev, lbaint_t start, lbaint_t blk
 	if ((start + blkcnt) > block_dev->lba) {
 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
 		printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
-		       start + blkcnt, block_dev->lba);
+			start + blkcnt, block_dev->lba);
 #endif
 		return 0;
 	}
@@ -414,32 +415,39 @@ ulong mmc_bread_prepare(struct blk_desc *block_dev, lbaint_t start, lbaint_t blk
 		return 0;
 	}
 
-	if (mmc_read_blocks_prepare(mmc, dst, start, blkcnt) != blkcnt) {
-		debug("%s: Failed to read blocks\n", __func__);
+	do {
+		cur = (blocks_todo > mmc->cfg->b_max) ?
+			mmc->cfg->b_max : blocks_todo;
+		if (mmc_read_blocks(mmc, dst, start, cur) != cur) {
+			debug("%s: Failed to read blocks\n", __func__);
+			int timeout = 0;
 re_init_retry:
-		timeout++;
-		/*
-		 * Try re-init seven times.
-		 */
-		if (timeout > 7) {
-			printf("Re-init retry timeout\n");
-			return 0;
-		}
+			timeout++;
+			/*
+			 * Try re-init seven times.
+			 */
+			if (timeout > 7) {
+				printf("Re-init retry timeout\n");
+				return 0;
+			}
 
-		mmc->has_init = 0;
-		if (mmc_init(mmc))
-			return 0;
+			mmc->has_init = 0;
+			if (mmc_init(mmc))
+				return 0;
 
-		if (mmc_read_blocks_prepare(mmc, dst, start, blkcnt) != blkcnt) {
-			printf("%s: Re-init mmc_read_blocks_prepare error\n",
-			       __func__);
-			goto re_init_retry;
+			if (mmc_read_blocks(mmc, dst, start, cur) != cur) {
+				printf("%s: Re-init mmc_read_blocks error\n",
+				       __func__);
+				goto re_init_retry;
+			}
 		}
-	}
+		blocks_todo -= cur;
+		start += cur;
+		dst += cur * mmc->read_bl_len;
+	} while (blocks_todo > 0);
 
 	return blkcnt;
 }
-#endif
 
 void mmc_set_clock(struct mmc *mmc, uint clock)
 {

commit 1f3b6bbf4e675a2f73c7f0aeb8837f1c71b2e2f8
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Aug 6 09:14:15 2020 +0800

    blk: define op_flag to handle some special block operation
    
    Usage:
            If prepare to read & write block data, just do it like this:
                    struct blk_desc desc;
                    ......
                    desc.op_flag = BLK_PRE_RW;
                    blk_dread(......);
                    desc.op_flag = 0;
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I180bb7c09a7021e1f80760cc852169b3f750941d

diff --git a/include/blk.h b/include/blk.h
index d4a259335c..b4f284e2c9 100644
--- a/include/blk.h
+++ b/include/blk.h
@@ -51,6 +51,10 @@ enum if_type {
 #define BLK_PRD_SIZE		20
 #define BLK_REV_SIZE		8
 
+/* define block device operation flags */
+#define BLK_PRE_RW		1	/* Block prepare read & write*/
+#define BLK_MTD_NBA_RW		2	/* MTD block non-block-aligned read & write */
+
 /*
  * Identifies the partition table type (ie. MBR vs GPT GUID) signature
  */
@@ -79,6 +83,7 @@ struct blk_desc {
 	unsigned char	hwpart;		/* HW partition, e.g. for eMMC */
 	unsigned char	type;		/* device type */
 	unsigned char	removable;	/* removable device */
+	unsigned char	op_flag;	/* Some special operation flags */
 #ifdef CONFIG_LBA48
 	/* device can use 48bit addr (ATA/ATAPI v7) */
 	unsigned char	lba48;

commit 7ddc1c355673e112409626ad4174f2f561bb3c66
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue Jun 30 14:14:41 2020 +0800

    spi: rockchip_sfc: Support dma xfer prepare
    
    Change-Id: I9c3285daf22775fa3ad72e41abcd205c4caaaaa4
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/spi/rockchip_sfc.c b/drivers/spi/rockchip_sfc.c
index 7c3f5125cb..9113d7ac12 100644
--- a/drivers/spi/rockchip_sfc.c
+++ b/drivers/spi/rockchip_sfc.c
@@ -132,6 +132,8 @@ struct rockchip_sfc {
 	unsigned int mode;
 	unsigned int speed_hz;
 	u32 max_iosize;
+	bool prepare;
+	u32 last_prepare_size;
 	u32 cmd;
 	u32 addr;
 	u8 addr_bits;
@@ -214,6 +216,29 @@ static int rockchip_sfc_reset(struct rockchip_sfc *sfc)
 	return ret;
 }
 
+static int rockchip_sfc_dma_xfer_wait_finished(struct rockchip_sfc *sfc)
+{
+	struct rockchip_sfc_reg *regs = sfc->regbase;
+	int timeout = sfc->last_prepare_size * 10;
+	unsigned long tbase;
+	int ret = 0;
+	int risr;
+
+	tbase = get_timer(0);
+	do {
+		udelay(1);
+		risr = readl(&regs->risr);
+		if (get_timer(tbase) > timeout) {
+			debug("dma timeout\n");
+			ret = -ETIMEDOUT;
+			break;
+		}
+	} while (!(risr & TRANS_FINISH_INT));
+	sfc->last_prepare_size = 0;
+
+	return ret;
+}
+
 /* The SFC_CTRL register is a global control register,
  * when the controller is in busy state(SFC_SR),
  * SFC_CTRL cannot be set.
@@ -225,6 +250,9 @@ static int rockchip_sfc_wait_idle(struct rockchip_sfc *sfc,
 	unsigned long tbase = get_timer(0);
 	u32 sr, fsr;
 
+	if (sfc->last_prepare_size && rockchip_sfc_dma_xfer_wait_finished(sfc))
+		return -ETIMEDOUT;
+
 	while (1) {
 		sr = readl(&regs->sr);
 		fsr = readl(&regs->fsr);
@@ -353,6 +381,26 @@ static int rockchip_sfc_dma_xfer(struct rockchip_sfc *sfc, void *buffer,
 	return ret;
 }
 
+static int rockchip_sfc_dma_xfer_prepare(struct rockchip_sfc *sfc,
+					 void *buffer, size_t trb)
+{
+	struct rockchip_sfc_reg *regs = sfc->regbase;
+
+	SFC_DBG("sfc_dma_xfer_prepar enter\n");
+
+	rockchip_sfc_setup_xfer(sfc, trb);
+	sfc->last_prepare_size = trb;
+
+	flush_dcache_range((unsigned long)buffer,
+			   (unsigned long)buffer + trb);
+
+	writel(0xFFFFFFFF, &regs->iclr);
+	writel((unsigned long)buffer, &regs->dmaaddr);
+	writel(SFC_DMA_START, &regs->dmatr);
+
+	return 0;
+}
+
 static int rockchip_sfc_wait_fifo_ready(struct rockchip_sfc *sfc, int rw,
 					u32 timeout)
 {
@@ -471,7 +519,10 @@ static int rockchip_sfc_read(struct rockchip_sfc *sfc, u32 offset,
 
 	while (dma_trans) {
 		trb = min_t(size_t, dma_trans, sfc->max_iosize);
-		ret = rockchip_sfc_dma_xfer(sfc, buf, trb);
+		if (sfc->prepare)
+			ret = rockchip_sfc_dma_xfer_prepare(sfc, buf, len);
+		else
+			ret = rockchip_sfc_dma_xfer(sfc, buf, trb);
 		if (ret < 0)
 			return ret;
 		dma_trans -= trb;
@@ -581,6 +632,8 @@ static int rockchip_sfc_xfer(struct udevice *dev, unsigned int bitlen,
 			data_buf = NULL;
 		}
 
+		sfc->prepare = flags & SPI_XFER_PREPARE ? true : false;
+
 		if (sfc->cmd == 0x9f && len == 4) {
 			/* SPI Nand read id */
 			sfc->addr_bits = SFC_ADDR_XBITS;

commit f5a32af5a3fe92cc0edf80513ab0c6a6fb6cf575
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue Jun 30 14:12:21 2020 +0800

    spi: spi-mem: Support dma transfer skip waiting idle
    
    Change-Id: Iabe9260f4c6c7edcb885f9f9a6aa55650fdfc932
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c
index 7aabebeff5..121de3b06b 100644
--- a/drivers/spi/spi-mem.c
+++ b/drivers/spi/spi-mem.c
@@ -374,8 +374,12 @@ int spi_mem_exec_op(struct spi_slave *slave, const struct spi_mem_op *op)
 
 	/* 2nd transfer: rx or tx data path */
 	if (tx_buf || rx_buf) {
+		flag = SPI_XFER_END;
+		if (slave->mode & SPI_DMA_PREPARE)
+			flag |= SPI_XFER_PREPARE;
+
 		ret = spi_xfer(slave, op->data.nbytes * 8, tx_buf,
-			       rx_buf, SPI_XFER_END);
+			       rx_buf, flag);
 		if (ret)
 			return ret;
 	}
diff --git a/include/spi.h b/include/spi.h
index bed0f373ad..ff91e9eaf0 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -31,6 +31,7 @@
 #define SPI_RX_SLOW	BIT(11)			/* receive with 1 wire slow */
 #define SPI_RX_DUAL	BIT(12)			/* receive with 2 wires */
 #define SPI_RX_QUAD	BIT(13)			/* receive with 4 wires */
+#define SPI_DMA_PREPARE	BIT(24)			/* dma transfer skip waiting idle */
 
 /* Header byte that marks the start of the message */
 #define SPI_PREAMBLE_END_BYTE	0xec
@@ -117,6 +118,7 @@ struct spi_slave {
 #define SPI_XFER_ONCE		(SPI_XFER_BEGIN | SPI_XFER_END)
 #define SPI_XFER_MMAP		BIT(2)	/* Memory Mapped start */
 #define SPI_XFER_MMAP_END	BIT(3)	/* Memory Mapped End */
+#define SPI_XFER_PREPARE	BIT(7)	/* Transfer skip waiting idle */
 };
 
 /**

commit fa413375b735f8ebe3c793c8c145d679fad8d635
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Jun 29 20:43:09 2020 +0800

    spi: rockchip_sfc: Support transfer large size data
    
    Change-Id: I7c2da2f01ef16ad11ca33cfac25c34793d22d698
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/spi/rockchip_sfc.c b/drivers/spi/rockchip_sfc.c
index 6865f2a55d..7c3f5125cb 100644
--- a/drivers/spi/rockchip_sfc.c
+++ b/drivers/spi/rockchip_sfc.c
@@ -40,10 +40,13 @@ struct rockchip_sfc_reg {
 	u32 fsr;
 	u32 sr;
 	u32 risr;
-	u32 reserved[21];
+	u32 ver;
+	u32 reserved[20];
 	u32 dmatr;
 	u32 dmaaddr;
-	u32 reserved1[30];
+	u32 len_ctrl;
+	u32 len_ext;
+	u32 reserved1[28];
 	u32 cmd;
 	u32 addr;
 	u32 data;
@@ -101,12 +104,16 @@ check_member(rockchip_sfc_reg, data, 0x108);
 #define RX_UF_INT		BIT(1)        /* Rx fifo underflow interrupt */
 #define RX_FULL_INT		BIT(0)        /* Rx fifo full interrupt */
 
-#define SFC_MAX_TRB		(512 * 31)
+#define SFC_MAX_TRB_VER3	(512 * 31)
+#define SFC_MAX_TRB_VER4	(0xFFFFFFFF)
 
 #define SFC_MAX_RATE		(150 * 1000 * 1000)
 #define SFC_DEFAULT_RATE	(80 * 1000 * 1000)
 #define SFC_MIN_RATE		(10 * 1000 * 1000)
 
+#define SFC_VER_3		0x3
+#define SFC_VER_4		0x4
+
 enum rockchip_sfc_if_type {
 	IF_TYPE_STD,
 	IF_TYPE_DUAL,
@@ -124,6 +131,7 @@ struct rockchip_sfc {
 	unsigned int max_freq;
 	unsigned int mode;
 	unsigned int speed_hz;
+	u32 max_iosize;
 	u32 cmd;
 	u32 addr;
 	u8 addr_bits;
@@ -149,10 +157,18 @@ static int rockchip_sfc_ofdata_to_platdata(struct udevice *bus)
 	return 0;
 }
 
+u32 rockchip_sfc_get_version(struct rockchip_sfc *sfc)
+{
+	struct rockchip_sfc_reg *regs = sfc->regbase;
+
+	return  (u32)(readl(&regs->ver) & 0xFFFF);
+}
+
 static int rockchip_sfc_probe(struct udevice *bus)
 {
 	struct rockchip_sfc_platdata *plat = dev_get_platdata(bus);
 	struct rockchip_sfc *sfc = dev_get_priv(bus);
+	struct rockchip_sfc_reg *regs;
 	struct dm_spi_bus *dm_spi_bus;
 
 	dm_spi_bus = bus->uclass_priv;
@@ -162,6 +178,14 @@ static int rockchip_sfc_probe(struct udevice *bus)
 	sfc->speed_hz = SFC_DEFAULT_RATE;
 	clk_set_rate(&sfc->clk, sfc->speed_hz);
 
+	regs = sfc->regbase;
+	if (rockchip_sfc_get_version(sfc) >= SFC_VER_4) {
+		sfc->max_iosize = SFC_MAX_TRB_VER4;
+		writel(1, &regs->len_ctrl);
+	} else {
+		sfc->max_iosize = SFC_MAX_TRB_VER3;
+	}
+
 	return 0;
 }
 
@@ -210,7 +234,7 @@ static int rockchip_sfc_wait_idle(struct rockchip_sfc *sfc,
 			break;
 		if (get_timer(tbase) > timeout_ms) {
 			printf("waite sfc idle timeout(sr:0x%08x fsr:0x%08x)\n",
-				sr, fsr);
+			       sr, fsr);
 			rockchip_sfc_reset(sfc);
 			return -ETIMEDOUT;
 		}
@@ -246,27 +270,32 @@ static u8 rockchip_sfc_get_if_type(struct rockchip_sfc *sfc)
 static void rockchip_sfc_setup_xfer(struct rockchip_sfc *sfc, u32 trb)
 {
 	struct rockchip_sfc_reg *regs = sfc->regbase;
-	u32 val = 0x02;
+	u32 val;
 	u8 data_width = IF_TYPE_STD;
 
-	SFC_DBG("--- sfc.addr_bit %x\n", sfc->addr_bits);
+	rockchip_sfc_wait_idle(sfc, 10);
 
 	if (sfc->addr_bits == SFC_ADDR_24BITS ||
 	    sfc->addr_bits == SFC_ADDR_32BITS)
 		data_width = rockchip_sfc_get_if_type(sfc);
 
+	SFC_DBG("--- sfc.addr_bit %x\n", sfc->addr_bits);
 	if (sfc->addr_bits == SFC_ADDR_XBITS)
 		writel(sfc->addr_xbits_ext - 1, &regs->abit);
 
-	val |= (data_width << SFC_DATA_WIDTH_SHIFT);
+	if (rockchip_sfc_get_version(sfc) >= SFC_VER_4) {
+		SFC_DBG("--- sfc.len_ext %x\n", trb);
+		writel(trb, &regs->len_ext);
+	}
 
-	rockchip_sfc_wait_idle(sfc, 10);
+	val = 0x02;
+	val |= (data_width << SFC_DATA_WIDTH_SHIFT);
 
 	SFC_DBG("--- sfc.ctrl %x\n", val);
 	writel(val, &regs->ctrl);
 
 	val = sfc->cmd;
-	val |= trb << SFC_TRB_SHIFT;
+	val |= (trb & 0x3fff) << SFC_TRB_SHIFT;
 	val |= sfc->rw << SFC_RW_SHIFT;
 	val |= sfc->addr_bits << SFC_ADDR_BITS_SHIFT;
 	val |= sfc->dummy_bits << SFC_DUMMY_BITS_SHIFT;
@@ -280,12 +309,13 @@ static void rockchip_sfc_setup_xfer(struct rockchip_sfc *sfc, u32 trb)
 	}
 }
 
-static int rockchip_sfc_dma_xfer(struct rockchip_sfc *sfc, void *buffer, size_t trb)
+static int rockchip_sfc_dma_xfer(struct rockchip_sfc *sfc, void *buffer,
+				 size_t trb)
 {
 	struct rockchip_sfc_reg *regs = sfc->regbase;
 	struct bounce_buffer bb;
 	unsigned int bb_flags;
-	int timeout = 1000;
+	int timeout = trb * 1000;
 	int ret = 0;
 	int risr;
 	unsigned long tbase;
@@ -440,7 +470,7 @@ static int rockchip_sfc_read(struct rockchip_sfc *sfc, u32 offset,
 	}
 
 	while (dma_trans) {
-		trb = min_t(size_t, dma_trans, SFC_MAX_TRB);
+		trb = min_t(size_t, dma_trans, sfc->max_iosize);
 		ret = rockchip_sfc_dma_xfer(sfc, buf, trb);
 		if (ret < 0)
 			return ret;
@@ -461,7 +491,7 @@ static int rockchip_sfc_read(struct rockchip_sfc *sfc, u32 offset,
 static int rockchip_sfc_write(struct rockchip_sfc *sfc, u32 offset,
 			      void *buf, size_t len)
 {
-	if (len > SFC_MAX_TRB) {
+	if (len > sfc->max_iosize) {
 		printf("out of the max sfc trb");
 		return -EINVAL;
 	}
@@ -534,8 +564,8 @@ static int rockchip_sfc_xfer(struct udevice *dev, unsigned int bitlen,
 			sfc->addr = 0;
 			break;
 		}
-		SFC_DBG("%s %d %x %d %d %x\n", __func__, len, sfc->cmd, sfc->addr_bits,
-			sfc->dummy_bits, sfc->addr);
+		SFC_DBG("%s %d %x %d %d %x\n", __func__, len, sfc->cmd,
+			sfc->addr_bits, sfc->dummy_bits, sfc->addr);
 	}
 	if (flags & SPI_XFER_END) {
 		if (din) {

commit 559a1947aca2c3cad5f0f9796cfc5a2da3e04139
Author: Weiwen Chen <cww@rock-chips.com>
Date:   Thu Aug 6 11:27:42 2020 +0800

    configs: rv1126-spi-nor-tiny: set bootdelay to 1 second
    
    Signed-off-by: Weiwen Chen <cww@rock-chips.com>
    Change-Id: I63b8e57dfb0b9bca70b3bdae69a60e870d88e77d

diff --git a/configs/rv1126-spi-nor-tiny_defconfig b/configs/rv1126-spi-nor-tiny_defconfig
index 491ee4e0ab..8ad911b85c 100644
--- a/configs/rv1126-spi-nor-tiny_defconfig
+++ b/configs/rv1126-spi-nor-tiny_defconfig
@@ -33,7 +33,7 @@ CONFIG_SPL_FIT_HW_CRYPTO=y
 CONFIG_SPL_FIT_IMAGE_KB=256
 CONFIG_SPL_FIT_IMAGE_MULTIPLE=1
 # CONFIG_SPL_SYS_DCACHE_OFF is not set
-CONFIG_BOOTDELAY=0
+CONFIG_BOOTDELAY=1
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y

commit 2a74799b4257ab487344f2f3a6247a0530640eaa
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Mon Jul 27 11:28:57 2020 +0800

    video: drm: Add bpc to connector_state structure
    
    Change-Id: Ib181191ceeae8a37f32d0ed31d4cd45efdefcd75
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/analogix_dp.c b/drivers/video/drm/analogix_dp.c
index 2726acb1ef..a6ff9f9fdd 100644
--- a/drivers/video/drm/analogix_dp.c
+++ b/drivers/video/drm/analogix_dp.c
@@ -20,7 +20,6 @@
 #include "rockchip_display.h"
 #include "rockchip_crtc.h"
 #include "rockchip_connector.h"
-#include "rockchip_panel.h"
 #include "analogix_dp.h"
 
 /**
@@ -805,29 +804,11 @@ static int analogix_dp_connector_init(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
 	struct analogix_dp_device *dp = dev_get_priv(conn_state->dev);
-	struct video_info *video = &dp->video_info;
-	struct rockchip_panel *panel = state_get_panel(state);
 
 	conn_state->type = DRM_MODE_CONNECTOR_eDP;
 	conn_state->output_mode = ROCKCHIP_OUT_MODE_AAAA;
 	conn_state->color_space = V4L2_COLORSPACE_DEFAULT;
 
-	switch (panel->bpc) {
-	case 12:
-		video->color_depth = COLOR_12;
-		break;
-	case 10:
-		video->color_depth = COLOR_10;
-		break;
-	case 6:
-		video->color_depth = COLOR_6;
-		break;
-	case 8:
-	default:
-		video->color_depth = COLOR_8;
-		break;
-	}
-
 	/* eDP software reset request */
 	reset_assert(&dp->reset);
 	udelay(1);
@@ -862,6 +843,7 @@ static int analogix_dp_connector_enable(struct display_state *state)
 	const struct rockchip_connector *connector = conn_state->connector;
 	const struct rockchip_dp_chip_data *pdata = connector->data;
 	struct analogix_dp_device *dp = dev_get_priv(conn_state->dev);
+	struct video_info *video = &dp->video_info;
 	u32 val;
 	int ret;
 
@@ -874,6 +856,22 @@ static int analogix_dp_connector_enable(struct display_state *state)
 		writel(val, dp->grf + pdata->lcdsel_grf_reg);
 	}
 
+	switch (conn_state->bpc) {
+	case 12:
+		video->color_depth = COLOR_12;
+		break;
+	case 10:
+		video->color_depth = COLOR_10;
+		break;
+	case 6:
+		video->color_depth = COLOR_6;
+		break;
+	case 8:
+	default:
+		video->color_depth = COLOR_8;
+		break;
+	}
+
 	ret = analogix_dp_set_link_train(dp, dp->video_info.max_lane_count,
 					 dp->video_info.max_link_rate);
 	if (ret) {
diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 2561079c19..596dfad7a1 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -600,6 +600,8 @@ static int display_init(struct display_state *state)
 
 	if (panel_state->panel) {
 		ret = display_get_timing(state);
+		if (!ret)
+			conn_state->bpc = panel_state->panel->bpc;
 #if defined(CONFIG_I2C_EDID)
 		if (ret < 0 && conn_funcs->get_edid) {
 			rockchip_panel_prepare(panel_state->panel);
@@ -609,8 +611,10 @@ static int display_init(struct display_state *state)
 				ret = edid_get_drm_mode((void *)&conn_state->edid,
 							sizeof(conn_state->edid),
 							mode, &bpc);
-				if (!ret)
+				if (!ret) {
+					conn_state->bpc = bpc;
 					edid_print_info((void *)&conn_state->edid);
+				}
 			}
 		}
 #endif
@@ -621,8 +625,10 @@ static int display_init(struct display_state *state)
 #if defined(CONFIG_I2C_EDID)
 			ret = edid_get_drm_mode(conn_state->edid, ret, mode,
 						&bpc);
-			if (!ret)
+			if (!ret) {
+				conn_state->bpc = bpc;
 				edid_print_info((void *)&conn_state->edid);
+			}
 #endif
 		} else {
 			ret = video_bridge_get_timing(conn_state->bridge->dev);
@@ -636,8 +642,10 @@ static int display_init(struct display_state *state)
 			ret = edid_get_drm_mode((void *)&conn_state->edid,
 						sizeof(conn_state->edid), mode,
 						&bpc);
-			if (!ret)
+			if (!ret) {
+				conn_state->bpc = bpc;
 				edid_print_info((void *)&conn_state->edid);
+			}
 		}
 #endif
 	}
diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index 73a78a13af..5e89157c36 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -123,6 +123,7 @@ struct connector_state {
 	int type;
 	int output_type;
 	int color_space;
+	unsigned int bpc;
 
 	struct {
 		u32 *lut;

commit 514da3912b33f334afdeff959799149c7f531934
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Aug 4 17:04:21 2020 +0800

    clk: rockchip: rk3328: fix up the bus and peri aclk div overflow
    
    Change-Id: I3983af87bec9bd79280914c803f0af3d5e3ffbb0
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c
index b4d68a1928..f4feb2f10a 100644
--- a/drivers/clk/rockchip/clk_rk3328.c
+++ b/drivers/clk/rockchip/clk_rk3328.c
@@ -590,6 +590,8 @@ static ulong rk3328_bus_set_clk(struct rk3328_clk_priv *priv,
 	case ACLK_BUS_PRE:
 		src_clk_div = DIV_ROUND_UP(priv->cpll_hz, hz);
 		assert(src_clk_div - 1 < 31);
+		if (src_clk_div > 32)
+			src_clk_div = 32;
 		rk_clrsetreg(&cru->clksel_con[0],
 			     CLK_BUS_PLL_SEL_MASK | ACLK_BUS_DIV_CON_MASK,
 			     CLK_BUS_PLL_SEL_CPLL << CLK_BUS_PLL_SEL_SHIFT |
@@ -662,6 +664,8 @@ static ulong rk3328_peri_set_clk(struct rk3328_clk_priv *priv,
 	case ACLK_PERI_PRE:
 		src_clk_div = DIV_ROUND_UP(priv->cpll_hz, hz);
 		assert(src_clk_div - 1 < 31);
+		if (src_clk_div > 32)
+			src_clk_div = 32;
 		rk_clrsetreg(&cru->clksel_con[28],
 			     CLK_PERI_PLL_SEL_MASK | ACLK_PERI_DIV_CON_MASK,
 			     CLK_PERI_PLL_SEL_CPLL << CLK_PERI_PLL_SEL_SHIFT |

commit 702e26dabb5f2cc8064644762cee0da7b2aee15d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Aug 5 15:14:07 2020 +0800

    rockchip: rkimg: update download key comment
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I1ccb716f49ad4fca18ca06276a9a7792e2d9e7a9

diff --git a/arch/arm/mach-rockchip/boot_rkimg.c b/arch/arm/mach-rockchip/boot_rkimg.c
index 20873d55e6..87bf980aba 100644
--- a/arch/arm/mach-rockchip/boot_rkimg.c
+++ b/arch/arm/mach-rockchip/boot_rkimg.c
@@ -251,21 +251,6 @@ __weak int rockchip_dnl_key_pressed(void)
 #ifdef CONFIG_CMD_ROCKUSB
 	return key_is_pressed(key_read(KEY_VOLUMEUP));
 #else
-	/*
-	 * It's possible that USB is disabled due to developer needs
-	 * a critial size of u-boot.bin.
-	 *
-	 * Disabling USB makes vbus can't be detected any more, so that
-	 * we add menu key and the events trigger are changed:
-	 *
-	 * - rockusb mode(fallback to bootrom mode):
-	 *	"recovery key pressed + vbus=1" => "menu key pressed"
-	 *
-	 * - recovery mode:
-	 *	"recovery key pressed + vbus=0" => "recovery key pressed"
-	 *
-	 * At the most time, USB is enabled and this feature is not applied.
-	 */
 	return key_is_pressed(key_read(KEY_MENU));
 #endif
 
@@ -294,11 +279,29 @@ __weak int rockchip_dnl_key_pressed(void)
 
 void setup_download_mode(void)
 {
-	int vbus = 1;
+	int vbus = 1; /* Assumed 1 in case of no rockusb */
 
 	boot_devtype_init();
 
-	/* recovery key or "ctrl+d" */
+	/*
+	 * rockchip_dnl_key_pressed():
+	 *
+	 * (1) volume-up key (default)
+	 * (2) menu key (If no rockusb)
+	 *
+	 * It's possible that USB is disabled due to developer needs
+	 * a critial size of u-boot.bin.
+	 *
+	 * Disabling USB makes vbus can't be detected any more, so that
+	 * we add menu key. The events trigger are changed:
+	 *
+	 * - rockusb mode(actually fallback to bootrom mode):
+	 *	"volume-up pressed + vbus=1" replaced with "menu pressed"
+	 * - recovery mode:
+	 *	"volume-up pressed + vbus=0" replaced with "volume-up pressed"
+	 *
+	 * At the most time, USB is enabled and this feature is not applied.
+	 */
 	if (rockchip_dnl_key_pressed() || is_hotkey(HK_ROCKUSB_DNL)) {
 		printf("download key pressed... ");
 #ifdef CONFIG_CMD_ROCKUSB

commit 9ed86f1004413c341182b89d0baa301528e71f28
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Aug 5 11:02:28 2020 +0800

    io-domain: rockchip: fix data abort
    
    Stack:
           [< 0041e1ae >]  dev_get_driver_ops+0x4/0x8
           [< 0043fdb5 >]  regulator_get_value+0x9/0x1c
           [< 0043f42b >]  rockchip_iodomain_probe+0x9b/0x114
           [< 0041e07f >]  device_probe+0x14b/0x184
           [< 0041e9ff >]  uclass_get_device_tail+0xd/0x16
           [< 0041eb73 >]  uclass_first_device+0x1b/0x1e
           [< 0043f34f >]  io_domain_init+0x17/0x34
           [< 0040231f >]  board_init+0x7f/0xa0
           [< 0044fe6d >]  initcall_run_list+0x35/0x50
           [< 0040f839 >]  board_init_r+0x15/0x1c
           [< 0040f825 >]  board_init_r+0x1/0x1c
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I6864771eb1ffa4ae2ef92e712a503e8048774435

diff --git a/drivers/power/io-domain/rockchip-io-domain.c b/drivers/power/io-domain/rockchip-io-domain.c
index 31f89a568f..e3dedddc5a 100644
--- a/drivers/power/io-domain/rockchip-io-domain.c
+++ b/drivers/power/io-domain/rockchip-io-domain.c
@@ -490,7 +490,7 @@ static const struct rockchip_iodomain_soc_data soc_data_rv1126_pmu = {
 static struct udevice *of_get_regulator(ofnode node, const char *supply)
 {
 	char sname[32]; /* 32 is max size of property name */
-	struct udevice *sudev;
+	struct udevice *sudev = NULL;
 	ofnode snode;
 	u32 phandle;
 	int ret;

commit c7bb7b9f0a0186b680f24cd52a6c3fe3bda3e121
Author: Sugar Zhang <sugar.zhang@rock-chips.com>
Date:   Tue Aug 4 11:45:34 2020 +0800

    rockchip: rv1126: Fix typo
    
    Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
    Change-Id: Iccc3a0467a8871a216fcc8746439379ad27d81f5

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126.c b/arch/arm/mach-rockchip/rv1126/rv1126.c
index 2cc0adcf7b..d8768e8ff9 100644
--- a/arch/arm/mach-rockchip/rv1126/rv1126.c
+++ b/arch/arm/mach-rockchip/rv1126/rv1126.c
@@ -33,7 +33,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define ISPP_M0_PRIORITY_REG	0xfe880008
 #define ISPP_M1_PRIORITY_REG	0xfe880088
 #define ISP_PRIORITY_REG	0xfe890008
-#define CIF_LIFE_PRIORITY_REG	0xfe890088
+#define CIF_LITE_PRIORITY_REG	0xfe890088
 #define CIF_PRIORITY_REG	0xfe890108
 #define IEP_PRIORITY_REG	0xfe8a0008
 #define RGA_RD_PRIORITY_REG	0xfe8a0088
@@ -574,7 +574,7 @@ int arch_cpu_init(void)
 	writel(0x101, ISPP_M0_PRIORITY_REG);
 	writel(0x101, ISPP_M1_PRIORITY_REG);
 	writel(0x101, ISP_PRIORITY_REG);
-	writel(0x202, CIF_LIFE_PRIORITY_REG);
+	writel(0x202, CIF_LITE_PRIORITY_REG);
 	writel(0x202, CIF_PRIORITY_REG);
 	writel(0x101, IEP_PRIORITY_REG);
 	writel(0x101, RGA_RD_PRIORITY_REG);

commit 6b1e79fecf3a9b2f84b391a111421261da76854c
Author: Sugar Zhang <sugar.zhang@rock-chips.com>
Date:   Tue Aug 4 11:42:31 2020 +0800

    rockchip: rv1126: Enable dynamic priority for ISP
    
    Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
    Change-Id: I063324d62304e8c53c6db43f72cdc804a507f9ef

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126.c b/arch/arm/mach-rockchip/rv1126/rv1126.c
index 09fd9d656a..2cc0adcf7b 100644
--- a/arch/arm/mach-rockchip/rv1126/rv1126.c
+++ b/arch/arm/mach-rockchip/rv1126/rv1126.c
@@ -42,6 +42,14 @@ DECLARE_GLOBAL_DATA_PTR;
 #define VDPU_PRIORITY_REG	0xfe8b0008
 #define JPEG_PRIORITY_REG	0xfe8c0008
 #define CRYPTO_PRIORITY_REG	0xfe8d0008
+/* external priority register */
+#define ISPP_M0_PRIORITY_EX_REG	0xfe880018
+#define ISPP_M1_PRIORITY_EX_REG	0xfe880098
+#define ISP_PRIORITY_EX_REG	0xfe890018
+#define CIF_LT_PRIORITY_EX_REG	0xfe890098
+#define CIF_PRIORITY_EX_REG	0xfe890118
+#define VOP_PRIORITY_EX_REG	0xfe8a0198
+#define VDPU_PRIORITY_EX_REG	0xfe8b0018
 
 #define PMU_BASE_ADDR		0xff3e0000
 
@@ -575,6 +583,8 @@ int arch_cpu_init(void)
 	writel(0x101, VDPU_PRIORITY_REG);
 	writel(0x101, JPEG_PRIORITY_REG);
 	writel(0x101, CRYPTO_PRIORITY_REG);
+	/* enable dynamic priority */
+	writel(0x1, ISP_PRIORITY_EX_REG);
 #endif
 
 #if defined(CONFIG_SUPPORT_USBPLUG)

commit 87b478d1ec304e52fe3ff190610659ead19a4afb
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Fri Jul 17 17:26:30 2020 +0800

    rockchip: rv1126: adjust qos priority for ISP/ISPP
    
    Change-Id: I43b83350163414b161b7e59d5c234af9c0149363
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>
    Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126.c b/arch/arm/mach-rockchip/rv1126/rv1126.c
index 0c547ca919..09fd9d656a 100644
--- a/arch/arm/mach-rockchip/rv1126/rv1126.c
+++ b/arch/arm/mach-rockchip/rv1126/rv1126.c
@@ -563,9 +563,9 @@ int arch_cpu_init(void)
 	writel(0x101, VEPU_RD0_PRIORITY_REG);
 	writel(0x101, VEPU_RD1_PRIORITY_REG);
 	writel(0x101, VEPU_WR_PRIORITY_REG);
-	writel(0x202, ISPP_M0_PRIORITY_REG);
-	writel(0x202, ISPP_M1_PRIORITY_REG);
-	writel(0x303, ISP_PRIORITY_REG);
+	writel(0x101, ISPP_M0_PRIORITY_REG);
+	writel(0x101, ISPP_M1_PRIORITY_REG);
+	writel(0x101, ISP_PRIORITY_REG);
 	writel(0x202, CIF_LIFE_PRIORITY_REG);
 	writel(0x202, CIF_PRIORITY_REG);
 	writel(0x101, IEP_PRIORITY_REG);

commit 7a349fdcbd4da19a1992dd3860681f7413a0a580
Author: Elon Zhang <zhangzj@rock-chips.com>
Date:   Tue Jun 30 10:45:37 2020 +0800

    lib: optee_client: add optee initialize flag
    
    Add optee initialize flag to reduce redundant calling.
    
    Signed-off-by: Elon Zhang <zhangzj@rock-chips.com>
    Change-Id: Ib3e883c48d5c85c446f3e9e991cd4cfcd1cede90

diff --git a/lib/optee_clientApi/OpteeClientApiLib.c b/lib/optee_clientApi/OpteeClientApiLib.c
index be5f5d267f..9429389b21 100644
--- a/lib/optee_clientApi/OpteeClientApiLib.c
+++ b/lib/optee_clientApi/OpteeClientApiLib.c
@@ -17,6 +17,8 @@
 #define OPTEE_MSG_REVISION_MAJOR        2
 #define OPTEE_MSG_REVISION_MINOR        0
 
+static bool optee_is_init;
+
 static bool optee_api_revision_is_compatible(void)
 {
 	ARM_SMC_ARGS ArmSmcArgs = {0};
@@ -44,6 +46,9 @@ TEEC_Result OpteeClientApiLibInitialize(void)
 {
 	TEEC_Result status = TEEC_SUCCESS;
 
+	if (optee_is_init)
+		return TEEC_SUCCESS;
+
 	/* check api revision compatibility */
 	if (!optee_api_revision_is_compatible())
 		panic("optee api revision is too low");
@@ -59,6 +64,8 @@ TEEC_Result OpteeClientApiLibInitialize(void)
 		return status;
 	}
 
+	optee_is_init = true;
+
 	return TEEC_SUCCESS;
 }
 

commit 74eb6027432600de60ed1c8bf892f1f8243c2c8a
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Wed Apr 22 17:24:48 2020 +0800

    lib: optee_client: update to new optee msg for optee v1 platform
    
    optee v1 smc message is deprecated and update to new optee msg,
    api revision smc call is add in init func to check capcibility.
    
    Change-Id: Ia54a1257050b5e3776a00b6b76ca608c939bb401
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
    Signed-off-by: Elon Zhang <zhangzj@rock-chips.com>

diff --git a/include/optee_include/teesmc.h b/include/optee_include/teesmc.h
index 04c735283c..ba09b00a1e 100644
--- a/include/optee_include/teesmc.h
+++ b/include/optee_include/teesmc.h
@@ -647,19 +647,6 @@ struct teesmc_meta_open_session {
 
 typedef struct teesmc_meta_open_session t_teesmc_meta_open_session;
 
-#ifdef CONFIG_OPTEE_V1
-
-typedef struct teesmc32_arg             t_teesmc32_arg;
-typedef struct teesmc32_param           t_teesmc32_param;
-
-#define TEESMC32_GET_PARAMS(x) \
-	(struct teesmc32_param *)(((struct teesmc32_arg *)(x)) + 1)
-
-#define TEESMC32_GET_ARG_SIZE(num_params) \
-	(sizeof(struct teesmc32_arg) + \
-	 sizeof(struct teesmc32_param) * (num_params))
-
-#endif
 void tee_smc_call(ARM_SMC_ARGS *param);
 
 #endif /* TEESMC_H */
diff --git a/include/optee_include/teesmc_v2.h b/include/optee_include/teesmc_v2.h
index 840cd97861..e2e775b67a 100644
--- a/include/optee_include/teesmc_v2.h
+++ b/include/optee_include/teesmc_v2.h
@@ -50,7 +50,6 @@ struct optee_msg_arg_v2 {
 	struct optee_msg_param_v2 params[];
 };
 
-#ifdef CONFIG_OPTEE_V2
 typedef struct optee_msg_arg_v2        t_teesmc32_arg;
 typedef struct optee_msg_param_v2      t_teesmc32_param;
 
@@ -61,8 +60,6 @@ typedef struct optee_msg_param_v2      t_teesmc32_param;
 #define TEESMC32_GET_PARAMS(x) \
 	(struct optee_msg_param_v2 *)(((struct optee_msg_arg_v2 *)(x)) + 1)
 
-#endif
-
 #define OPTEE_MSG_ATTR_TYPE_NONE_V2		0x0
 #define OPTEE_MSG_ATTR_TYPE_VALUE_INPUT_V2		0x1
 #define OPTEE_MSG_ATTR_TYPE_VALUE_OUTPUT_V2		0x2
@@ -96,11 +93,18 @@ typedef struct optee_msg_param_v2      t_teesmc32_param;
 #define OPTEE_SMC_FUNC_MASK_V2		0xFFFF
 
 #define OPTEE_SMC_OWNER_TRUSTED_OS_V2	50
+#define OPTEE_SMC_OWNER_TRUSTED_OS_API	63
 
 #define OPTEE_SMC_FUNCID_GET_SHM_CONFIG_V2	7
 #define OPTEE_SMC_GET_SHM_CONFIG_V2 \
 	OPTEE_SMC_FAST_CALL_VAL_V2(OPTEE_SMC_FUNCID_GET_SHM_CONFIG_V2)
 
+#define OPTEE_SMC_FUNCID_CALLS_REVISION	0xFF03
+#define OPTEE_SMC_CALLS_REVISION \
+	OPTEE_SMC_CALL_VAL_V2(OPTEE_SMC_32_V2, OPTEE_SMC_FAST_CALL_V2, \
+			      OPTEE_SMC_OWNER_TRUSTED_OS_API, \
+			      OPTEE_SMC_FUNCID_CALLS_REVISION)
+
 #define OPTEE_SMC_FAST_CALL_VAL_V2(func_num) \
 	OPTEE_SMC_CALL_VAL_V2(OPTEE_SMC_32_V2, OPTEE_SMC_FAST_CALL_V2, \
 			   OPTEE_SMC_OWNER_TRUSTED_OS_V2, (func_num))
diff --git a/lib/optee_clientApi/OpteeClientApiLib.c b/lib/optee_clientApi/OpteeClientApiLib.c
index bb8be33945..be5f5d267f 100644
--- a/lib/optee_clientApi/OpteeClientApiLib.c
+++ b/lib/optee_clientApi/OpteeClientApiLib.c
@@ -7,8 +7,35 @@
 #include <common.h>
 #include <optee_include/OpteeClientApiLib.h>
 #include <optee_include/OpteeClientMem.h>
+#include <optee_include/OpteeClientRPC.h>
 #include <optee_include/OpteeClientSMC.h>
 #include <optee_include/OpteeClientRkFs.h>
+#include <optee_include/teesmc.h>
+#include <optee_include/teesmc_optee.h>
+#include <optee_include/teesmc_v2.h>
+
+#define OPTEE_MSG_REVISION_MAJOR        2
+#define OPTEE_MSG_REVISION_MINOR        0
+
+static bool optee_api_revision_is_compatible(void)
+{
+	ARM_SMC_ARGS ArmSmcArgs = {0};
+
+	ArmSmcArgs.Arg0 = OPTEE_SMC_CALLS_REVISION;
+
+	tee_smc_call(&ArmSmcArgs);
+
+	if (ArmSmcArgs.Arg0 == OPTEE_MSG_REVISION_MAJOR &&
+	    ArmSmcArgs.Arg1 >= OPTEE_MSG_REVISION_MINOR) {
+		printf("optee api revision: %d.%d\n",
+		       ArmSmcArgs.Arg0, ArmSmcArgs.Arg1);
+		return true;
+	} else {
+		printf("optee check api revision fail: %d.%d\n",
+		       ArmSmcArgs.Arg0, ArmSmcArgs.Arg1);
+		return false;
+	}
+}
 
 /*
  * Initlialize the library
@@ -17,6 +44,10 @@ TEEC_Result OpteeClientApiLibInitialize(void)
 {
 	TEEC_Result status = TEEC_SUCCESS;
 
+	/* check api revision compatibility */
+	if (!optee_api_revision_is_compatible())
+		panic("optee api revision is too low");
+
 	status = OpteeClientMemInit();
 	if (status != TEEC_SUCCESS) {
 		printf("TEEC: OpteeClientMemInit fail!\n");
diff --git a/lib/optee_clientApi/OpteeClientMem.c b/lib/optee_clientApi/OpteeClientMem.c
index 899be36b58..056902e6f8 100644
--- a/lib/optee_clientApi/OpteeClientMem.c
+++ b/lib/optee_clientApi/OpteeClientMem.c
@@ -143,12 +143,7 @@ int OpteeClientMemInit(void)
 {
 	ARM_SMC_ARGS ArmSmcArgs = {0};
 
-#ifdef CONFIG_OPTEE_V1
-	ArmSmcArgs.Arg0 = TEESMC32_OPTEE_FASTCALL_GET_SHM_CONFIG;
-#endif
-#ifdef CONFIG_OPTEE_V2
 	ArmSmcArgs.Arg0 = OPTEE_SMC_GET_SHM_CONFIG_V2;
-#endif
 
 	tee_smc_call(&ArmSmcArgs);
 
diff --git a/lib/optee_clientApi/OpteeClientRPC.c b/lib/optee_clientApi/OpteeClientRPC.c
index 1a78308acb..83005d8418 100644
--- a/lib/optee_clientApi/OpteeClientRPC.c
+++ b/lib/optee_clientApi/OpteeClientRPC.c
@@ -149,7 +149,6 @@ Exit:
 	return TeecResult;
 }
 
-#ifdef CONFIG_OPTEE_V2
 TEEC_Result OpteeRpcCmdLoadV2Ta(t_teesmc32_arg *TeeSmc32Arg)
 {
 	TEEC_Result TeecResult = TEEC_SUCCESS;
@@ -175,8 +174,8 @@ TEEC_Result OpteeRpcCmdLoadV2Ta(t_teesmc32_arg *TeeSmc32Arg)
 		/*memcpy((void *)(size_t)TeeSmc32Param[1].u.memref.buf_ptr,
 			(void *)keymaster_data, TeeSmc32Param[1].u.memref.size);*/
 		debug("TEEC: memref.buf_ptr = 0x%llx; memref.size = 0x%llx\n",
-			TeeSmc32Param[1].u.memref.buf_ptr,
-			TeeSmc32Param[1].u.memref.size);
+			(uint64_t)TeeSmc32Param[1].u.memref.buf_ptr,
+			(uint64_t)TeeSmc32Param[1].u.memref.size);
 	}
 
 Exit:
@@ -187,7 +186,6 @@ Exit:
 
 	return TeecResult;
 }
-#endif
 
 /*
  * Free a previously loaded TA and release the memory
@@ -559,16 +557,11 @@ TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs)
 
 	switch (TEESMC_RETURN_GET_RPC_FUNC(ArmSmcArgs->Arg0)) {
 	case TEESMC_RPC_FUNC_ALLOC_ARG: {
-#ifdef CONFIG_OPTEE_V1
-		TeecResult = OpteeRpcAlloc(ArmSmcArgs->Arg1, &ArmSmcArgs->Arg1);
-#endif
-#ifdef CONFIG_OPTEE_V2
 		debug("TEEC: ArmSmcArgs->Arg1 = 0x%x \n", ArmSmcArgs->Arg1);
 		TeecResult = OpteeRpcAlloc(ArmSmcArgs->Arg1, &ArmSmcArgs->Arg2);
 		ArmSmcArgs->Arg5 = ArmSmcArgs->Arg2;
 		ArmSmcArgs->Arg1 = 0;
 		ArmSmcArgs->Arg4 = 0;
-#endif
 		break;
 	}
 
@@ -578,12 +571,7 @@ TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs)
 	}
 
 	case TEESMC_RPC_FUNC_FREE_ARG: {
-#ifdef CONFIG_OPTEE_V1
-		TeecResult = OpteeRpcFree(ArmSmcArgs->Arg1);
-#endif
-#ifdef CONFIG_OPTEE_V2
 		TeecResult = OpteeRpcFree(ArmSmcArgs->Arg2);
-#endif
 		break;
 	}
 
@@ -597,49 +585,10 @@ TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs)
 	}
 
 	case TEESMC_RPC_FUNC_CMD: {
-#ifdef CONFIG_OPTEE_V1
-		t_teesmc32_arg *TeeSmc32Arg =
-			(t_teesmc32_arg *)(size_t)ArmSmcArgs->Arg1;
-#endif
-#ifdef CONFIG_OPTEE_V2
 		t_teesmc32_arg *TeeSmc32Arg =
 			(t_teesmc32_arg *)(size_t)((uint64_t)ArmSmcArgs->Arg1 << 32 | ArmSmcArgs->Arg2);
 		debug("TEEC: TeeSmc32Arg->cmd = 0x%x\n", TeeSmc32Arg->cmd);
-#endif
 		switch (TeeSmc32Arg->cmd) {
-#ifdef CONFIG_OPTEE_V1
-		case TEE_RPC_LOAD_TA: {
-			TeecResult = OpteeRpcCmdLoadTa(TeeSmc32Arg);
-			break;
-		}
-
-		case TEE_RPC_FREE_TA: {
-			TeecResult = OpteeRpcCmdFreeTa(TeeSmc32Arg);
-			break;
-		}
-
-		case TEE_RPC_RPMB_CMD: {
-			TeecResult = OpteeRpcCmdRpmb(TeeSmc32Arg);
-			break;
-		}
-
-		case TEE_RPC_FS: {
-			TeecResult = OpteeRpcCmdFs(TeeSmc32Arg);
-			TeeSmc32Arg->ret = TEEC_SUCCESS;
-			break;
-		}
-
-		case TEE_RPC_GET_TIME: {
-			TeecResult = OpteeRpcCmdGetTime(TeeSmc32Arg);
-			break;
-		}
-
-		case TEE_RPC_WAIT_MUTEX: {
-			TeecResult = OpteeRpcCmdWaitMutex(TeeSmc32Arg);
-			break;
-		}
-#endif
-#ifdef CONFIG_OPTEE_V2
 		case OPTEE_MSG_RPC_CMD_SHM_ALLOC_V2: {
 			uint32_t tempaddr;
 			uint32_t allocsize = TeeSmc32Arg->params[0].u.value.b;
@@ -671,7 +620,6 @@ TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs)
 			TeecResult = OpteeRpcCmdLoadV2Ta(TeeSmc32Arg);
 			break;
 		}
-#endif
 
 		default: {
 			printf("TEEC: ...unsupported RPC CMD: cmd=0x%X\n",
diff --git a/lib/optee_clientApi/OpteeClientSMC.c b/lib/optee_clientApi/OpteeClientSMC.c
index 5dd8ce32da..db968d3e9e 100644
--- a/lib/optee_clientApi/OpteeClientSMC.c
+++ b/lib/optee_clientApi/OpteeClientSMC.c
@@ -56,13 +56,7 @@ TEEC_Result TEEC_SMC_OpenSession(TEEC_Context *context,
 
 	t_teesmc_meta_open_session *TeeSmcMetaSession = NULL;
 
-#ifdef CONFIG_OPTEE_V1
-	uint32_t MetaNum = 1;
-#endif
-
-#ifdef CONFIG_OPTEE_V2
 	uint32_t MetaNum = 2;
-#endif
 
 	*error_origin = TEEC_ORIGIN_API;
 
@@ -104,27 +98,20 @@ TEEC_Result TEEC_SMC_OpenSession(TEEC_Context *context,
 	TeeSmc32Param[0].u.memref.size = sizeof(*TeeSmcMetaSession);
 
 #ifdef CONFIG_OPTEE_V1
-#ifdef CONFIG_ARM64
-	TeeSmc32Param[0].attr = TEESMC_ATTR_TYPE_MEMREF_INPUT |
-				TEESMC_ATTR_META              |
-				TEEC_SMC_DEFAULT_CACHE_ATTRIBUTES;
-#else
-	TeeSmc32Param[0].attr = TEESMC_ATTR_TYPE_MEMREF_INPUT |
-				TEESMC_ATTR_META;
-#endif
+	memcpy((void *)&TeeSmc32Param[0].u.value, &TeeSmcMetaSession->uuid, sizeof(TeeSmcMetaSession->uuid));
 #endif
 
 #ifdef CONFIG_OPTEE_V2
 	uint8_t * session_uuid = (uint8_t *)&TeeSmcMetaSession->uuid;
 	tee_uuid_to_octets(session_uuid, destination);
 	memcpy((void *)&TeeSmc32Param[0].u.value, &TeeSmcMetaSession->uuid, sizeof(TeeSmcMetaSession->uuid));
+#endif
 	TeeSmc32Param[1].u.value.c = TeeSmcMetaSession->clnt_login;
 
 	TeeSmc32Param[0].attr = OPTEE_MSG_ATTR_TYPE_VALUE_INPUT_V2 |
 				OPTEE_MSG_ATTR_META_V2;
 	TeeSmc32Param[1].attr = OPTEE_MSG_ATTR_TYPE_VALUE_INPUT_V2 |
 				OPTEE_MSG_ATTR_META_V2;
-#endif
 
 	SetTeeSmc32Params(operation, TeeSmc32Param + MetaNum);
 
@@ -293,19 +280,8 @@ void SetTeeSmc32Params(TEEC_Operation *operation,
 			attr == TEEC_MEMREF_TEMP_OUTPUT ||
 			attr == TEEC_MEMREF_TEMP_INOUT) {
 
-#ifdef CONFIG_OPTEE_V1
-#ifdef CONFIG_ARM64
-			attr |= TEEC_SMC_DEFAULT_CACHE_ATTRIBUTES;
-			debug("TEEC: OPTEE_OS_V1 ARCH64 attr %x\n", attr);
-#else
-			debug("TEEC: OPTEE_OS_V1 ARCH32 attr %x\n", attr);
-#endif
-#endif
-
-#ifdef CONFIG_OPTEE_V2
 			attr += (OPTEE_MSG_ATTR_TYPE_TMEM_INPUT_V2 - TEEC_MEMREF_TEMP_INPUT);
 			debug("TEEC: OPTEE_OS_V2 ARCH64 attr %x\n", attr);
-#endif
 
 			TeeSmc32Param[ParamCount].attr = attr;
 			TeeSmc32Param[ParamCount].u.memref.buf_ptr =
@@ -355,16 +331,9 @@ TEEC_Result OpteeSmcCall(t_teesmc32_arg *TeeSmc32Arg)
 	TEEC_Result TeecResult = TEEC_SUCCESS;
 	ARM_SMC_ARGS ArmSmcArgs = {0};
 
-#ifdef CONFIG_OPTEE_V1
-	ArmSmcArgs.Arg0 = TEESMC32_CALL_WITH_ARG;
-	ArmSmcArgs.Arg1 = (uint32_t) (size_t)TeeSmc32Arg;
-#endif
-
-#ifdef CONFIG_OPTEE_V2
 	ArmSmcArgs.Arg0 = OPTEE_SMC_CALL_WITH_ARG_V2;
 	ArmSmcArgs.Arg1 = 0;
 	ArmSmcArgs.Arg2 = (uint32_t) (size_t)TeeSmc32Arg;
-#endif
 
 	while (1) {
 		tee_smc_call(&ArmSmcArgs);

commit 102dfafc4a9225277cc927c5182a9364ee23a7c2
Author: Elon Zhang <zhangzj@rock-chips.com>
Date:   Tue Jun 30 09:55:10 2020 +0800

    rochchip: board: map op-tee memory as dcache enabled
    
    For all 32-bit platforms, op-tee require dcache enabled
    from now on.
    
    Signed-off-by: Elon Zhang <zhangzj@rock-chips.com>
    Change-Id: I2cd67457c7d441d35e8e0b191c8dfc89f5e4e541

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 045646387b..fa70b3366b 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -416,16 +416,10 @@ int board_fdt_fixup(void *blob)
 	return rk_board_fdt_fixup(blob);
 }
 
-#if defined(CONFIG_ARM64_BOOT_AARCH32) || \
-    (!defined(CONFIG_ARM64) && defined(CONFIG_OPTEE_V2))
+#if defined(CONFIG_ARM64_BOOT_AARCH32) || !defined(CONFIG_ARM64)
 /*
- * (1) Fixup MMU region attr for OP-TEE on (AArch32 + ARMv8)
- *
- * What ever U-Boot is 64-bit or 32-bit mode, the OP-TEE is always 64-bit mode.
- *
  * Common for OP-TEE:
- *	64-bit mode: dcache is always enabled;
- *	32-bit mode: dcache is always disabled(Due to rockchip sip calls);
+ *	64-bit & 32-bit mode: dcache is always enabled;
  *
  * Common for U-Boot:
  *	64-bit mode: MMU table is static defined in rkxxx.c file, all memory
@@ -433,24 +427,13 @@ int board_fdt_fixup(void *blob)
  *
  *	32-bit mode: MMU table is setup according to gd->bd->bi_dram[..] where
  *		     the OP-TEE region has been reserved, so it can not be
- *		     mapped(i.e. dcache is disabled). That's also good to match
+ *		     mapped(i.e. dcache is disabled). That's *NOT* good to match
  *		     OP-TEE MMU policy.
  *
  * For the data coherence when communication between U-Boot and OP-TEE, U-Boot
  * should follow OP-TEE MMU policy.
  *
- * Here is the special:
- *	When CONFIG_ARM64_BOOT_AARCH32 is enabled, U-Boot is 32-bit mode while
- *	OP-TEE is still 64-bit mode. U-Boot would not map MMU table for OP-TEE
- *	region(but OP-TEE requires it cacheable) so we fixup here.
- *
- *
- * (2) Fixup MMU region attr for OP-TEE on (ARMv7 + CONFIG_OPTEE_V2)
- *
- * OP-TEE for CONFIG_OPTEE_V1: dcache is always disabled;
- * OP-TEE for CONFIG_OPTEE_V2: dcache is always enabled;
- *
- * So U-Boot should map OP-TEE memory as dcache enabled for CONFIG_OPTEE_V2.
+ * So 32-bit mode U-Boot should map OP-TEE memory as dcache enabled.
  */
 int board_initr_caches_fixup(void)
 {

commit ee5f0829e9e083ae671af4185fe337005881d5bd
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Mon Aug 3 16:43:28 2020 +0800

    rv1126: ddr: add extended temperature support
    
    Enable it by set CONFIG_ROCKCHIP_DRAM_EXTENDED_TEMP_SUPPORT to y.
    
    Change-Id: I54db1d1b33fc9e063c05bc4aca85589b495a4db9
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/drivers/ram/rockchip/Kconfig b/drivers/ram/rockchip/Kconfig
index ef4f95434a..7f24646dff 100644
--- a/drivers/ram/rockchip/Kconfig
+++ b/drivers/ram/rockchip/Kconfig
@@ -9,6 +9,13 @@ config ROCKCHIP_SDRAM_COMMON
 	help
 	  This enable sdram common driver
 
+config ROCKCHIP_DRAM_EXTENDED_TEMP_SUPPORT
+	bool "enable rockchip dram extended temperature support"
+	depends on TPL_RAM || SPL_RAM
+	default n
+	help
+	  This enable dram dram extended temperature support
+
 config ROCKCHIP_TPL_INIT_DRAM_TYPE
 	int "TPL select DRAM type"
 	depends on TPL_RAM || SPL_RAM
diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
index ffc49c6eec..63ad097978 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -2161,6 +2161,15 @@ static int sdram_init_(struct dram_info *dram,
 	pctl_cfg(dram->pctl, &sdram_params->pctl_regs,
 		 dram->sr_idle, dram->pd_idle);
 
+#ifdef CONFIG_ROCKCHIP_DRAM_EXTENDED_TEMP_SUPPORT
+	u32 tmp, trefi;
+
+	tmp = readl(pctl_base + DDR_PCTL2_RFSHTMG);
+	trefi = (tmp >> 16) & 0xfff;
+	writel((tmp & 0xf000ffff) | (trefi / 2) << 16,
+	       pctl_base + DDR_PCTL2_RFSHTMG);
+#endif
+
 	/* set frequency_mode */
 	setbits_le32(pctl_base + DDR_PCTL2_MSTR, 0x1 << 29);
 	/* set target_frequency to Frequency 0 */
@@ -2515,6 +2524,16 @@ static void pre_set_rate(struct dram_info *dram,
 			}
 		}
 	}
+
+#ifdef CONFIG_ROCKCHIP_DRAM_EXTENDED_TEMP_SUPPORT
+	u32 tmp, trefi;
+
+	tmp = readl(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) + DDR_PCTL2_RFSHTMG);
+	trefi = (tmp >> 16) & 0xfff;
+	writel((tmp & 0xf000ffff) | (trefi / 2) << 16,
+	       pctl_base + UMCTL2_REGS_FREQ(dst_fsp) + DDR_PCTL2_RFSHTMG);
+#endif
+
 	sw_set_ack(dram);
 
 	/* phy timing update */
@@ -2996,6 +3015,9 @@ int sdram_init(void)
 	dram_info.ddrgrf = (void *)DDR_GRF_BASE_ADDR;
 	dram_info.pmugrf = (void *)PMU_GRF_BASE_ADDR;
 
+#ifdef CONFIG_ROCKCHIP_DRAM_EXTENDED_TEMP_SUPPORT
+	printascii("extended temp support\n");
+#endif
 	if (index->version_info != 2 ||
 	    (index->global_index.size != sizeof(struct global_info) / 4) ||
 	    (index->ddr3_index.size !=

commit 133495af9de797670a89c99f14e476c2ff4f3470
Author: Vasily Khoruzhick <anarsoul@gmail.com>
Date:   Sat Nov 16 11:32:57 2019 -0800

    UPSTREAM: rockchip: i2c: don't sent stop bit after each message
    
    That's not correct and it breaks SMBUS-style reads and and writes for
    some chips (e.g. SYR82X/SYR83X).
    
    Stop bit should be sent only after the last message.
    
    Change-Id: I5ded4a43ed726b7cffa35d020ef763471bd01b41
    Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
    Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
    (cherry picked from commit c9fca5ec8849b8fa16b16cece091645e7d3aa02b)

diff --git a/drivers/i2c/rk_i2c.c b/drivers/i2c/rk_i2c.c
index f9d71fc1f1..612c007271 100644
--- a/drivers/i2c/rk_i2c.c
+++ b/drivers/i2c/rk_i2c.c
@@ -244,7 +244,6 @@ static int rk_i2c_read(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len,
 	}
 
 i2c_exit:
-	rk_i2c_send_stop_bit(i2c);
 	rk_i2c_disable(i2c);
 
 	return err;
@@ -323,7 +322,6 @@ static int rk_i2c_write(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len,
 	}
 
 i2c_exit:
-	rk_i2c_send_stop_bit(i2c);
 	rk_i2c_disable(i2c);
 
 	return err;
@@ -351,6 +349,9 @@ static int rockchip_i2c_xfer(struct udevice *bus, struct i2c_msg *msg,
 		}
 	}
 
+	rk_i2c_send_stop_bit(i2c);
+	rk_i2c_disable(i2c);
+
 	return 0;
 }
 

commit 812e98a5b37efa119f01188ea92fe2f98fd6f1e9
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Fri Jul 24 11:05:58 2020 +0800

    configs: rv1126: add CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE
    
    Change-Id: Iaf28be4267d26d49f33d581274b268ef43c5ed3e
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index f661250b50..0d717ea70a 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -145,6 +145,7 @@ CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
 CONFIG_ROCKCHIP_SDRAM_COMMON=y
+CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE=3
 CONFIG_DM_RESET=y
 CONFIG_SPL_DM_RESET=y
 CONFIG_SPL_RESET_ROCKCHIP=y

commit f4f57f8ed12813c10b9d99b29291f037c1cc1124
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Fri Jul 24 09:49:36 2020 +0800

    rv1126: ddr: fix modify ca de-skew bug
    
    Change-Id: Ia3fffce1e062bee68d1b85a9b55858c53626942b
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
index e175fe6690..ffc49c6eec 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -1250,6 +1250,29 @@ void send_a_refresh(struct dram_info *dram)
 	writel(0x3, pctl_base + DDR_PCTL2_DBGCMD);
 }
 
+static void enter_sr(struct dram_info *dram, u32 en)
+{
+	void __iomem *pctl_base = dram->pctl;
+
+	if (en) {
+		setbits_le32(pctl_base + DDR_PCTL2_PWRCTL, PCTL2_SELFREF_SW);
+		while (1) {
+			if (((readl(pctl_base + DDR_PCTL2_STAT) &
+			      PCTL2_SELFREF_TYPE_MASK) ==
+			     PCTL2_SELFREF_TYPE_SR_NOT_AUTO) &&
+			    ((readl(pctl_base + DDR_PCTL2_STAT) &
+			      PCTL2_OPERATING_MODE_MASK) ==
+			     PCTL2_OPERATING_MODE_SR))
+				break;
+		}
+	} else {
+		clrbits_le32(pctl_base + DDR_PCTL2_PWRCTL, PCTL2_SELFREF_SW);
+		while ((readl(pctl_base + DDR_PCTL2_STAT) &
+		       PCTL2_OPERATING_MODE_MASK) == PCTL2_OPERATING_MODE_SR)
+			continue;
+	}
+}
+
 void record_dq_prebit(struct dram_info *dram)
 {
 	u32 group, i, tmp;
@@ -1316,6 +1339,7 @@ static void modify_ca_deskew(struct dram_info *dram, u32 dir, int delta_dif,
 {
 	void __iomem *phy_base = dram->phy;
 	u32 i, cs_en, tmp;
+	u32 dfi_lp_stat = 0;
 
 	if (cs == 0)
 		cs_en = 1;
@@ -1324,6 +1348,13 @@ static void modify_ca_deskew(struct dram_info *dram, u32 dir, int delta_dif,
 	else
 		cs_en = 3;
 
+	if (dramtype == LPDDR4 &&
+	    ((readl(PHY_REG(phy_base, 0x60)) & BIT(5)) == 0)) {
+		dfi_lp_stat = 1;
+		setbits_le32(PHY_REG(phy_base, 0x60), BIT(5));
+	}
+	enter_sr(dram, 1);
+
 	for (i = 0; i < 0x20; i++) {
 		if (dir == DESKEW_MDF_ABS_VAL)
 			tmp = delta_sig;
@@ -1347,6 +1378,11 @@ static void modify_ca_deskew(struct dram_info *dram, u32 dir, int delta_dif,
 		clrbits_le32(PHY_REG(phy_base, 0x10), cs_en << 6);
 		update_ca_prebit(dram);
 	}
+	enter_sr(dram, 0);
+
+	if (dfi_lp_stat)
+		clrbits_le32(PHY_REG(phy_base, 0x60), BIT(5));
+
 }
 
 static u32 get_min_value(struct dram_info *dram, u32 signal, u32 rank)
@@ -2746,17 +2782,7 @@ void ddr_set_rate(struct dram_info *dram,
 		     PCTL2_DIS_AUTO_REFRESH);
 	update_refresh_reg(dram);
 
-	setbits_le32(pctl_base + DDR_PCTL2_PWRCTL, PCTL2_SELFREF_SW);
-	while (1) {
-		if (((readl(pctl_base + DDR_PCTL2_STAT) &
-		      PCTL2_SELFREF_TYPE_MASK) ==
-		     PCTL2_SELFREF_TYPE_SR_NOT_AUTO) &&
-		    ((readl(pctl_base + DDR_PCTL2_STAT) &
-		      PCTL2_OPERATING_MODE_MASK) ==
-		     PCTL2_OPERATING_MODE_SR)) {
-			break;
-		}
-	}
+	enter_sr(dram, 1);
 
 	writel(PMUGRF_CON_DDRPHY_BUFFEREN_MASK |
 	       PMUGRF_CON_DDRPHY_BUFFEREN_EN,
@@ -2811,10 +2837,7 @@ void ddr_set_rate(struct dram_info *dram,
 	update_refresh_reg(dram);
 	clrsetbits_le32(PHY_REG(phy_base, 0xc), 0x3 << 2, dst_fsp << 2);
 
-	clrbits_le32(pctl_base + DDR_PCTL2_PWRCTL, PCTL2_SELFREF_SW);
-	while ((readl(pctl_base + DDR_PCTL2_STAT) &
-	       PCTL2_OPERATING_MODE_MASK) == PCTL2_OPERATING_MODE_SR)
-		continue;
+	enter_sr(dram, 0);
 
 	setbits_le32(PHY_REG(phy_base, 0x71), 1 << 5);
 	clrbits_le32(PHY_REG(phy_base, 0x71), 1 << 5);
@@ -2876,12 +2899,12 @@ void ddr_set_rate(struct dram_info *dram,
 			       PCTL2_MR_MASK) & (~(BIT(7)))) |
 			      dst_fsp_lp4 << 7, dramtype);
 	}
+	clrbits_le32(pctl_base + DDR_PCTL2_RFSHCTL3,
+		     PCTL2_DIS_AUTO_REFRESH);
+	update_refresh_reg(dram);
 
 	/* training */
 	high_freq_training(dram, sdram_params_new, dst_fsp);
-
-	clrbits_le32(pctl_base + DDR_PCTL2_RFSHCTL3,
-		     PCTL2_DIS_AUTO_REFRESH);
 	low_power_update(dram, lp_stat);
 
 	save_fsp_param(dram, dst_fsp, sdram_params_new);

commit 95fd4f9d530b41416ba327a61490a265d5fb52cc
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Thu Jul 23 20:13:44 2020 +0800

    rv1126: ddr: rm phy soft reset code
    
    Change-Id: I60c9288da24304125de2951f45c28d5be33c5ce8
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
index e5e5532330..e175fe6690 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -346,16 +346,6 @@ static void rkclk_configure_ddr(struct dram_info *dram,
 	rkclk_set_dpll(dram, sdram_params->base.ddr_freq * MHZ / 2);
 }
 
-static void phy_soft_reset(struct dram_info *dram)
-{
-	void __iomem *phy_base = dram->phy;
-
-	clrbits_le32(PHY_REG(phy_base, 0), 0x3 << 2);
-	udelay(1);
-	setbits_le32(PHY_REG(phy_base, 0), ANALOG_DERESET | DIGITAL_DERESET);
-	udelay(1);
-}
-
 static unsigned int
 	calculate_ddrconfig(struct rv1126_sdram_params *sdram_params)
 {
@@ -2272,8 +2262,6 @@ static u64 dram_detect_cap(struct dram_info *dram,
 	if (dram_type != LPDDR4) {
 		setbits_le32(PHY_REG(phy_base, 0xf), 0xf);
 
-		phy_soft_reset(dram);
-
 		if (data_training(dram, 0, sdram_params, 0,
 				  READ_GATE_TRAINING) == 0)
 			cap_info->bw = 2;

commit 8ecb6ff226eb3e13c8f8c1f0c98f1aae862c766f
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Thu Jul 23 20:00:09 2020 +0800

    rv1126: ddr: update driver strength and odt strength config
    
    Change-Id: Id78273d75ef13cfc6f1f335e475f16862bfaf938
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-loader_params.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-loader_params.inc
index cebaf31282..d1ceb58236 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-loader_params.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-loader_params.inc
@@ -18,7 +18,7 @@
 (528 << DDR_FREQ_F2_SHIFT) | (784 << DDR_FREQ_F3_SHIFT),
 (0 << DDR_FREQ_F4_SHIFT) | (0 << DDR_FREQ_F5_SHIFT),
 /* drv when odt on */
-(30 << PHY_DQ_DRV_SHIFT) | (30 << PHY_CA_DRV_SHIFT) |
+(30 << PHY_DQ_DRV_SHIFT) | (41 << PHY_CA_DRV_SHIFT) |
 	(38 << PHY_CLK_DRV_SHIFT) | (34 << DRAM_DQ_DRV_SHIFT),
 /* drv when odt off */
 (30 << PHY_DQ_DRV_SHIFT) | (30 << PHY_CA_DRV_SHIFT) |
@@ -26,37 +26,37 @@
 /* odt info */
 (120 << DRAM_ODT_SHIFT) | (141 << PHY_ODT_SHIFT) |
 	(1 << PHY_ODT_PUUP_EN_SHIFT) |
-	(1 << PHY_ODT_PUDN_EN_SHIFT),
+	(0 << PHY_ODT_PUDN_EN_SHIFT),
 /* odt enable freq */
 (333 << DRAM_ODT_EN_FREQ_SHIFT) | (333 << PHY_ODT_EN_FREQ_SHIFT),
 /* slew rate when odt enable */
-(0 << PHY_DQ_SR_SHIFT) | (0xe << PHY_CA_SR_SHIFT) |
-	(0 << PHY_CLK_SR_SHIFT),
+(0x1f << PHY_DQ_SR_SHIFT) | (0x1f << PHY_CA_SR_SHIFT) |
+	(0x1f << PHY_CLK_SR_SHIFT),
 /* slew  ratee when odt disable */
-(0 << PHY_DQ_SR_SHIFT) | (0xe << PHY_CA_SR_SHIFT) |
-	(0 << PHY_CLK_SR_SHIFT),
+(0x1f << PHY_DQ_SR_SHIFT) | (0x1f << PHY_CA_SR_SHIFT) |
+	(0x1f << PHY_CLK_SR_SHIFT),
 
 /* ddr4 */
 (924 << DDR_FREQ_F0_SHIFT) | (328 << DDR_FREQ_F1_SHIFT),
 (528 << DDR_FREQ_F2_SHIFT) | (784 << DDR_FREQ_F3_SHIFT),
 (0 << DDR_FREQ_F4_SHIFT) | (0 << DDR_FREQ_F5_SHIFT),
 /* drv when odt on */
-(28 << PHY_DQ_DRV_SHIFT) | (28 << PHY_CA_DRV_SHIFT) |
+(37 << PHY_DQ_DRV_SHIFT) | (44 << PHY_CA_DRV_SHIFT) |
 	(37 << PHY_CLK_DRV_SHIFT) | (34 << DRAM_DQ_DRV_SHIFT),
 /* drv when odt off */
-(28 << PHY_DQ_DRV_SHIFT) | (28 << PHY_CA_DRV_SHIFT) |
+(37 << PHY_DQ_DRV_SHIFT) | (44 << PHY_CA_DRV_SHIFT) |
 	(37 << PHY_CLK_DRV_SHIFT) | (34 << DRAM_DQ_DRV_SHIFT),
 /* odt info */
 (120 << DRAM_ODT_SHIFT) | (148 << PHY_ODT_SHIFT) |
 	(1 << PHY_ODT_PUUP_EN_SHIFT) | (1 << PHY_ODT_PUDN_EN_SHIFT),
 /* odt enable freq */
-(333 << DRAM_ODT_EN_FREQ_SHIFT) | (333 << PHY_ODT_EN_FREQ_SHIFT),
+(625 << DRAM_ODT_EN_FREQ_SHIFT) | (625 << PHY_ODT_EN_FREQ_SHIFT),
 /* slew rate when odt enable */
-(0 << PHY_DQ_SR_SHIFT) | (0xe << PHY_CA_SR_SHIFT) |
-	(0 << PHY_CLK_SR_SHIFT),
+(0xe << PHY_DQ_SR_SHIFT) | (0x3 << PHY_CA_SR_SHIFT) |
+	(0x3 << PHY_CLK_SR_SHIFT),
 /* slew  ratee when odt disable */
-(0 << PHY_DQ_SR_SHIFT) | (0xe << PHY_CA_SR_SHIFT) |
-	(0 << PHY_CLK_SR_SHIFT),
+(0xe << PHY_DQ_SR_SHIFT) | (0x3 << PHY_CA_SR_SHIFT) |
+	(0x3 << PHY_CLK_SR_SHIFT),
 
 /* lpddr3 */
 (924 << DDR_FREQ_F0_SHIFT) | (328 << DDR_FREQ_F1_SHIFT),
@@ -69,17 +69,17 @@
 (28 << PHY_DQ_DRV_SHIFT) | (37 << PHY_CA_DRV_SHIFT) |
 	(34 << PHY_CLK_DRV_SHIFT) | (34 << DRAM_DQ_DRV_SHIFT),
 /* odt info */
-(240 << DRAM_ODT_SHIFT) | (148 << PHY_ODT_SHIFT) |
+(120 << DRAM_ODT_SHIFT) | (148 << PHY_ODT_SHIFT) |
 	(1 << PHY_ODT_PUUP_EN_SHIFT) | (1 << PHY_ODT_PUDN_EN_SHIFT),
 /* odt enable freq */
 (333 << DRAM_ODT_EN_FREQ_SHIFT) | (333 << PHY_ODT_EN_FREQ_SHIFT),
 
 /* slew rate when odt enable */
-(0 << PHY_DQ_SR_SHIFT) | (0 << PHY_CA_SR_SHIFT) |
-	(0 << PHY_CLK_SR_SHIFT),
+(0xe << PHY_DQ_SR_SHIFT) | (0x0 << PHY_CA_SR_SHIFT) |
+	(0x0 << PHY_CLK_SR_SHIFT),
 /* slew  ratee when odt disable */
-(0 << PHY_DQ_SR_SHIFT) | (0 << PHY_CA_SR_SHIFT) |
-	(0 << PHY_CLK_SR_SHIFT),
+(0xe << PHY_DQ_SR_SHIFT) | (0x0 << PHY_CA_SR_SHIFT) |
+	(0x0 << PHY_CLK_SR_SHIFT),
 
 /* lpddr4 */
 (924 << DDR_FREQ_F0_SHIFT) | (328 << DDR_FREQ_F1_SHIFT),
@@ -87,14 +87,13 @@
 (0 << DDR_FREQ_F4_SHIFT) | (0 << DDR_FREQ_F5_SHIFT),
 
 /* drv when odt on */
-(33 << PHY_DQ_DRV_SHIFT) | (33 << PHY_CA_DRV_SHIFT) |
-	(33 << PHY_CLK_DRV_SHIFT) | (40 << DRAM_DQ_DRV_SHIFT),
+(38 << PHY_DQ_DRV_SHIFT) | (46 << PHY_CA_DRV_SHIFT) |
+	(38 << PHY_CLK_DRV_SHIFT) | (40 << DRAM_DQ_DRV_SHIFT),
 /* drv when odt off */
-(33 << PHY_DQ_DRV_SHIFT) |
-	(33 << PHY_CA_DRV_SHIFT) | (33 << PHY_CLK_DRV_SHIFT) |
-	(80 << DRAM_DQ_DRV_SHIFT),
+(38 << PHY_DQ_DRV_SHIFT) | (46 << PHY_CA_DRV_SHIFT) |
+	(38 << PHY_CLK_DRV_SHIFT) | (40 << DRAM_DQ_DRV_SHIFT),
 /* odt info and PU-cal info */
-(240 << DRAM_ODT_SHIFT) | (78 << PHY_ODT_SHIFT) |
+(240 << DRAM_ODT_SHIFT) | (60 << PHY_ODT_SHIFT) |
 	(0 << LP4_CA_ODT_SHIFT) |
 	(LPDDR4_VDDQ_2_5 << LP4_DRV_PU_CAL_ODTEN_SHIFT) |
 	(LPDDR4_VDDQ_2_5 << LP4_DRV_PU_CAL_ODTOFF_SHIFT) |
@@ -103,11 +102,11 @@
 /* odt enable freq */
 (333 << PHY_LP4_ODT_EN_FREQ_SHIFT) | (333 << LP4_DQ_ODT_EN_FREQ_SHIFT),
 /* slew rate when odt enable */
-(0 << PHY_DQ_SR_SHIFT) | (0xe << PHY_CA_SR_SHIFT) |
-	(0xe << PHY_CLK_SR_SHIFT),
+(0xf << PHY_DQ_SR_SHIFT) | (0xf << PHY_CA_SR_SHIFT) |
+	(0xf << PHY_CLK_SR_SHIFT),
 /* slew  ratee when odt disable */
-(0 << PHY_DQ_SR_SHIFT) | (0xe << PHY_CA_SR_SHIFT) |
-	(0xe << PHY_CLK_SR_SHIFT),
+(0xf << PHY_DQ_SR_SHIFT) | (0xf << PHY_CA_SR_SHIFT) |
+	(0xf << PHY_CLK_SR_SHIFT),
 /* ca odt en freq */
 (333 << LP4_CA_ODT_EN_FREQ_SHIFT),
 /* cs drv info and ca odt info */
@@ -116,7 +115,7 @@
 	(0 << LP4_ODTE_CK_SHIFT) | (0 << LP4_ODTE_CS_EN_SHIFT) |
 	(0 << LP4_ODTD_CA_EN_SHIFT),
 /* vref info when odt enable */
-(170 << PHY_LP4_DQ_VREF_SHIFT) | (420 << LP4_DQ_VREF_SHIFT) |
+(200 << PHY_LP4_DQ_VREF_SHIFT) | (420 << LP4_DQ_VREF_SHIFT) |
 	(420 << LP4_CA_VREF_SHIFT),
 /* vref info when odt disable */
 (420 << PHY_LP4_DQ_VREF_SHIFT) | (420 << LP4_DQ_VREF_SHIFT) |

commit 70fee8b333575b26cc184b86b16aea82a457a4b0
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Thu Jul 23 19:46:09 2020 +0800

    rv1126: ddr: update drv odt table
    
    Change-Id: Ic20957d02c36fe2d167c1a63b5e016535a181baf
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rv1126.h b/arch/arm/include/asm/arch-rockchip/sdram_rv1126.h
index 21e84aee8d..3f33f37be2 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_rv1126.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_rv1126.h
@@ -19,158 +19,156 @@
 #define AGING_OTHER_VAL			(0x33)
 
 #define PATTERN				(0x5aa5f00f)
-#define PHY_PER_DE_SKEW_DELAY		(20)
-#define PHY_RX_DQS_INNER_DELAY		(5)
 
 #define PHY_DDR3_RON_DISABLE		(0)
-#define PHY_DDR3_RON_506ohm		(1)
-#define PHY_DDR3_RON_253ohm		(2)
-#define PHY_DDR3_RON_169hm		(3)
-#define PHY_DDR3_RON_127ohm		(4)
-#define PHY_DDR3_RON_101ohm		(5)
-#define PHY_DDR3_RON_84ohm		(6)
-#define PHY_DDR3_RON_72ohm		(7)
-#define PHY_DDR3_RON_63ohm		(16)
-#define PHY_DDR3_RON_56ohm		(17)
-#define PHY_DDR3_RON_51ohm		(18)
-#define PHY_DDR3_RON_46ohm		(19)
-#define PHY_DDR3_RON_42ohm		(20)
-#define PHY_DDR3_RON_39ohm		(21)
-#define PHY_DDR3_RON_36ohm		(22)
-#define PHY_DDR3_RON_34ohm		(23)
-#define PHY_DDR3_RON_32ohm		(24)
-#define PHY_DDR3_RON_30ohm		(25)
-#define PHY_DDR3_RON_28ohm		(26)
-#define PHY_DDR3_RON_27ohm		(27)
-#define PHY_DDR3_RON_25ohm		(28)
-#define PHY_DDR3_RON_24ohm		(29)
-#define PHY_DDR3_RON_23ohm		(30)
-#define PHY_DDR3_RON_22ohm		(31)
+#define PHY_DDR3_RON_455ohm		(1)
+#define PHY_DDR3_RON_230ohm		(2)
+#define PHY_DDR3_RON_153ohm		(3)
+#define PHY_DDR3_RON_115ohm		(4)
+#define PHY_DDR3_RON_91ohm		(5)
+#define PHY_DDR3_RON_76ohm		(6)
+#define PHY_DDR3_RON_65ohm		(7)
+#define PHY_DDR3_RON_57ohm		(16)
+#define PHY_DDR3_RON_51ohm		(17)
+#define PHY_DDR3_RON_46ohm		(18)
+#define PHY_DDR3_RON_41ohm		(19)
+#define PHY_DDR3_RON_38ohm		(20)
+#define PHY_DDR3_RON_35ohm		(21)
+#define PHY_DDR3_RON_32ohm		(22)
+#define PHY_DDR3_RON_30ohm		(23)
+#define PHY_DDR3_RON_28ohm		(24)
+#define PHY_DDR3_RON_27ohm		(25)
+#define PHY_DDR3_RON_25ohm		(26)
+#define PHY_DDR3_RON_24ohm		(27)
+#define PHY_DDR3_RON_23ohm		(28)
+#define PHY_DDR3_RON_22ohm		(29)
+#define PHY_DDR3_RON_21ohm		(30)
+#define PHY_DDR3_RON_20ohm		(31)
 
 #define PHY_DDR3_RTT_DISABLE		(0)
-#define PHY_DDR3_RTT_953ohm		(1)
-#define PHY_DDR3_RTT_483ohm		(2)
-#define PHY_DDR3_RTT_320ohm		(3)
-#define PHY_DDR3_RTT_241ohm		(4)
-#define PHY_DDR3_RTT_193ohm		(5)
-#define PHY_DDR3_RTT_161ohm		(6)
-#define PHY_DDR3_RTT_138ohm		(7)
-#define PHY_DDR3_RTT_121ohm		(16)
-#define PHY_DDR3_RTT_107ohm		(17)
-#define PHY_DDR3_RTT_97ohm		(18)
-#define PHY_DDR3_RTT_88ohm		(19)
-#define PHY_DDR3_RTT_80ohm		(20)
-#define PHY_DDR3_RTT_74ohm		(21)
-#define PHY_DDR3_RTT_69ohm		(22)
-#define PHY_DDR3_RTT_64ohm		(23)
-#define PHY_DDR3_RTT_60ohm		(24)
-#define PHY_DDR3_RTT_57ohm		(25)
-#define PHY_DDR3_RTT_54ohm		(26)
-#define PHY_DDR3_RTT_51ohm		(27)
-#define PHY_DDR3_RTT_48ohm		(28)
-#define PHY_DDR3_RTT_46ohm		(29)
-#define PHY_DDR3_RTT_44ohm		(30)
-#define PHY_DDR3_RTT_42ohm		(31)
+#define PHY_DDR3_RTT_561ohm		(1)
+#define PHY_DDR3_RTT_282ohm		(2)
+#define PHY_DDR3_RTT_188ohm		(3)
+#define PHY_DDR3_RTT_141ohm		(4)
+#define PHY_DDR3_RTT_113ohm		(5)
+#define PHY_DDR3_RTT_94ohm		(6)
+#define PHY_DDR3_RTT_81ohm		(7)
+#define PHY_DDR3_RTT_72ohm		(16)
+#define PHY_DDR3_RTT_64ohm		(17)
+#define PHY_DDR3_RTT_58ohm		(18)
+#define PHY_DDR3_RTT_52ohm		(19)
+#define PHY_DDR3_RTT_48ohm		(20)
+#define PHY_DDR3_RTT_44ohm		(21)
+#define PHY_DDR3_RTT_41ohm		(22)
+#define PHY_DDR3_RTT_38ohm		(23)
+#define PHY_DDR3_RTT_37ohm		(24)
+#define PHY_DDR3_RTT_34ohm		(25)
+#define PHY_DDR3_RTT_32ohm		(26)
+#define PHY_DDR3_RTT_31ohm		(27)
+#define PHY_DDR3_RTT_29ohm		(28)
+#define PHY_DDR3_RTT_28ohm		(29)
+#define PHY_DDR3_RTT_27ohm		(30)
+#define PHY_DDR3_RTT_25ohm		(31)
 
 #define PHY_DDR4_LPDDR3_RON_DISABLE	(0)
-#define PHY_DDR4_LPDDR3_RON_570ohm	(1)
-#define PHY_DDR4_LPDDR3_RON_285ohm	(2)
-#define PHY_DDR4_LPDDR3_RON_190ohm	(3)
-#define PHY_DDR4_LPDDR3_RON_142ohm	(4)
-#define PHY_DDR4_LPDDR3_RON_114ohm	(5)
-#define PHY_DDR4_LPDDR3_RON_95ohm	(6)
-#define PHY_DDR4_LPDDR3_RON_81ohm	(7)
-#define PHY_DDR4_LPDDR3_RON_71ohm	(16)
-#define PHY_DDR4_LPDDR3_RON_63ohm	(17)
-#define PHY_DDR4_LPDDR3_RON_57ohm	(18)
-#define PHY_DDR4_LPDDR3_RON_52ohm	(19)
-#define PHY_DDR4_LPDDR3_RON_47ohm	(20)
-#define PHY_DDR4_LPDDR3_RON_44ohm	(21)
-#define PHY_DDR4_LPDDR3_RON_41ohm	(22)
-#define PHY_DDR4_LPDDR3_RON_38ohm	(23)
-#define PHY_DDR4_LPDDR3_RON_36ohm	(24)
-#define PHY_DDR4_LPDDR3_RON_34ohm	(25)
-#define PHY_DDR4_LPDDR3_RON_32ohm	(26)
-#define PHY_DDR4_LPDDR3_RON_30ohm	(27)
-#define PHY_DDR4_LPDDR3_RON_28ohm	(28)
-#define PHY_DDR4_LPDDR3_RON_27ohm	(29)
-#define PHY_DDR4_LPDDR3_RON_26ohm	(30)
-#define PHY_DDR4_LPDDR3_RON_25ohm	(31)
+#define PHY_DDR4_LPDDR3_RON_482ohm	(1)
+#define PHY_DDR4_LPDDR3_RON_244ohm	(2)
+#define PHY_DDR4_LPDDR3_RON_162ohm	(3)
+#define PHY_DDR4_LPDDR3_RON_122ohm	(4)
+#define PHY_DDR4_LPDDR3_RON_97ohm	(5)
+#define PHY_DDR4_LPDDR3_RON_81ohm	(6)
+#define PHY_DDR4_LPDDR3_RON_69ohm	(7)
+#define PHY_DDR4_LPDDR3_RON_61ohm	(16)
+#define PHY_DDR4_LPDDR3_RON_54ohm	(17)
+#define PHY_DDR4_LPDDR3_RON_48ohm	(18)
+#define PHY_DDR4_LPDDR3_RON_44ohm	(19)
+#define PHY_DDR4_LPDDR3_RON_40ohm	(20)
+#define PHY_DDR4_LPDDR3_RON_37ohm	(21)
+#define PHY_DDR4_LPDDR3_RON_34ohm	(22)
+#define PHY_DDR4_LPDDR3_RON_32ohm	(23)
+#define PHY_DDR4_LPDDR3_RON_30ohm	(24)
+#define PHY_DDR4_LPDDR3_RON_28ohm	(25)
+#define PHY_DDR4_LPDDR3_RON_27ohm	(26)
+#define PHY_DDR4_LPDDR3_RON_25ohm	(27)
+#define PHY_DDR4_LPDDR3_RON_24ohm	(28)
+#define PHY_DDR4_LPDDR3_RON_23ohm	(29)
+#define PHY_DDR4_LPDDR3_RON_22ohm	(30)
+#define PHY_DDR4_LPDDR3_RON_21ohm	(31)
 
 #define PHY_DDR4_LPDDR3_RTT_DISABLE	(0)
-#define PHY_DDR4_LPDDR3_RTT_973ohm	(1)
-#define PHY_DDR4_LPDDR3_RTT_493ohm	(2)
-#define PHY_DDR4_LPDDR3_RTT_327ohm	(3)
-#define PHY_DDR4_LPDDR3_RTT_247ohm	(4)
-#define PHY_DDR4_LPDDR3_RTT_197ohm	(5)
-#define PHY_DDR4_LPDDR3_RTT_164ohm	(6)
-#define PHY_DDR4_LPDDR3_RTT_141ohm	(7)
-#define PHY_DDR4_LPDDR3_RTT_123ohm	(16)
-#define PHY_DDR4_LPDDR3_RTT_109ohm	(17)
-#define PHY_DDR4_LPDDR3_RTT_99ohm	(18)
-#define PHY_DDR4_LPDDR3_RTT_90ohm	(19)
-#define PHY_DDR4_LPDDR3_RTT_82ohm	(20)
-#define PHY_DDR4_LPDDR3_RTT_76ohm	(21)
-#define PHY_DDR4_LPDDR3_RTT_70ohm	(22)
-#define PHY_DDR4_LPDDR3_RTT_66ohm	(23)
-#define PHY_DDR4_LPDDR3_RTT_62ohm	(24)
-#define PHY_DDR4_LPDDR3_RTT_58ohm	(25)
-#define PHY_DDR4_LPDDR3_RTT_55ohm	(26)
-#define PHY_DDR4_LPDDR3_RTT_52ohm	(27)
-#define PHY_DDR4_LPDDR3_RTT_49ohm	(28)
-#define PHY_DDR4_LPDDR3_RTT_47ohm	(29)
-#define PHY_DDR4_LPDDR3_RTT_45ohm	(30)
-#define PHY_DDR4_LPDDR3_RTT_43ohm	(31)
+#define PHY_DDR4_LPDDR3_RTT_586ohm	(1)
+#define PHY_DDR4_LPDDR3_RTT_294ohm	(2)
+#define PHY_DDR4_LPDDR3_RTT_196ohm	(3)
+#define PHY_DDR4_LPDDR3_RTT_148ohm	(4)
+#define PHY_DDR4_LPDDR3_RTT_118ohm	(5)
+#define PHY_DDR4_LPDDR3_RTT_99ohm	(6)
+#define PHY_DDR4_LPDDR3_RTT_85ohm	(7)
+#define PHY_DDR4_LPDDR3_RTT_76ohm	(16)
+#define PHY_DDR4_LPDDR3_RTT_67ohm	(17)
+#define PHY_DDR4_LPDDR3_RTT_60ohm	(18)
+#define PHY_DDR4_LPDDR3_RTT_55ohm	(19)
+#define PHY_DDR4_LPDDR3_RTT_50ohm	(20)
+#define PHY_DDR4_LPDDR3_RTT_46ohm	(21)
+#define PHY_DDR4_LPDDR3_RTT_43ohm	(22)
+#define PHY_DDR4_LPDDR3_RTT_40ohm	(23)
+#define PHY_DDR4_LPDDR3_RTT_38ohm	(24)
+#define PHY_DDR4_LPDDR3_RTT_36ohm	(25)
+#define PHY_DDR4_LPDDR3_RTT_34ohm	(26)
+#define PHY_DDR4_LPDDR3_RTT_32ohm	(27)
+#define PHY_DDR4_LPDDR3_RTT_31ohm	(28)
+#define PHY_DDR4_LPDDR3_RTT_29ohm	(29)
+#define PHY_DDR4_LPDDR3_RTT_28ohm	(30)
+#define PHY_DDR4_LPDDR3_RTT_27ohm	(31)
 
 #define PHY_LPDDR4_RON_DISABLE		(0)
-#define PHY_LPDDR4_RON_606ohm		(1)
-#define PHY_LPDDR4_RON_303ohm		(2)
-#define PHY_LPDDR4_RON_202ohm		(3)
-#define PHY_LPDDR4_RON_152ohm		(4)
-#define PHY_LPDDR4_RON_121ohm		(5)
-#define PHY_LPDDR4_RON_101ohm		(6)
-#define PHY_LPDDR4_RON_87ohm		(7)
-#define PHY_LPDDR4_RON_76ohm		(16)
-#define PHY_LPDDR4_RON_67ohm		(17)
-#define PHY_LPDDR4_RON_61ohm		(18)
-#define PHY_LPDDR4_RON_55ohm		(19)
-#define PHY_LPDDR4_RON_51ohm		(20)
-#define PHY_LPDDR4_RON_47ohm		(21)
-#define PHY_LPDDR4_RON_43ohm		(22)
-#define PHY_LPDDR4_RON_40ohm		(23)
-#define PHY_LPDDR4_RON_38ohm		(24)
-#define PHY_LPDDR4_RON_36ohm		(25)
-#define PHY_LPDDR4_RON_34ohm		(26)
-#define PHY_LPDDR4_RON_32ohm		(27)
-#define PHY_LPDDR4_RON_30ohm		(28)
-#define PHY_LPDDR4_RON_29ohm		(29)
-#define PHY_LPDDR4_RON_28ohm		(30)
-#define PHY_LPDDR4_RON_26ohm		(31)
+#define PHY_LPDDR4_RON_501ohm		(1)
+#define PHY_LPDDR4_RON_253ohm		(2)
+#define PHY_LPDDR4_RON_168ohm		(3)
+#define PHY_LPDDR4_RON_126ohm		(4)
+#define PHY_LPDDR4_RON_101ohm		(5)
+#define PHY_LPDDR4_RON_84ohm		(6)
+#define PHY_LPDDR4_RON_72ohm		(7)
+#define PHY_LPDDR4_RON_63ohm		(16)
+#define PHY_LPDDR4_RON_56ohm		(17)
+#define PHY_LPDDR4_RON_50ohm		(18)
+#define PHY_LPDDR4_RON_46ohm		(19)
+#define PHY_LPDDR4_RON_42ohm		(20)
+#define PHY_LPDDR4_RON_38ohm		(21)
+#define PHY_LPDDR4_RON_36ohm		(22)
+#define PHY_LPDDR4_RON_33ohm		(23)
+#define PHY_LPDDR4_RON_31ohm		(24)
+#define PHY_LPDDR4_RON_29ohm		(25)
+#define PHY_LPDDR4_RON_28ohm		(26)
+#define PHY_LPDDR4_RON_26ohm		(27)
+#define PHY_LPDDR4_RON_25ohm		(28)
+#define PHY_LPDDR4_RON_24ohm		(29)
+#define PHY_LPDDR4_RON_23ohm		(30)
+#define PHY_LPDDR4_RON_22ohm		(31)
 
 #define PHY_LPDDR4_RTT_DISABLE		(0)
-#define PHY_LPDDR4_RTT_998ohm		(1)
-#define PHY_LPDDR4_RTT_506ohm		(2)
-#define PHY_LPDDR4_RTT_336ohm		(3)
-#define PHY_LPDDR4_RTT_253ohm		(4)
-#define PHY_LPDDR4_RTT_202ohm		(5)
-#define PHY_LPDDR4_RTT_169ohm		(6)
-#define PHY_LPDDR4_RTT_144ohm		(7)
-#define PHY_LPDDR4_RTT_127ohm		(16)
-#define PHY_LPDDR4_RTT_112ohm		(17)
-#define PHY_LPDDR4_RTT_101ohm		(18)
-#define PHY_LPDDR4_RTT_92ohm		(19)
-#define PHY_LPDDR4_RTT_84ohm		(20)
-#define PHY_LPDDR4_RTT_78ohm		(21)
-#define PHY_LPDDR4_RTT_72ohm		(22)
-#define PHY_LPDDR4_RTT_67ohm		(23)
-#define PHY_LPDDR4_RTT_63ohm		(24)
-#define PHY_LPDDR4_RTT_60ohm		(25)
-#define PHY_LPDDR4_RTT_56ohm		(26)
-#define PHY_LPDDR4_RTT_53ohm		(27)
-#define PHY_LPDDR4_RTT_51ohm		(28)
-#define PHY_LPDDR4_RTT_48ohm		(29)
-#define PHY_LPDDR4_RTT_46ohm		(30)
-#define PHY_LPDDR4_RTT_44ohm		(31)
+#define PHY_LPDDR4_RTT_604ohm		(1)
+#define PHY_LPDDR4_RTT_303ohm		(2)
+#define PHY_LPDDR4_RTT_202ohm		(3)
+#define PHY_LPDDR4_RTT_152ohm		(4)
+#define PHY_LPDDR4_RTT_122ohm		(5)
+#define PHY_LPDDR4_RTT_101ohm		(6)
+#define PHY_LPDDR4_RTT_87ohm		(7)
+#define PHY_LPDDR4_RTT_78ohm		(16)
+#define PHY_LPDDR4_RTT_69ohm		(17)
+#define PHY_LPDDR4_RTT_62ohm		(18)
+#define PHY_LPDDR4_RTT_56ohm		(19)
+#define PHY_LPDDR4_RTT_52ohm		(20)
+#define PHY_LPDDR4_RTT_48ohm		(21)
+#define PHY_LPDDR4_RTT_44ohm		(22)
+#define PHY_LPDDR4_RTT_41ohm		(23)
+#define PHY_LPDDR4_RTT_39ohm		(24)
+#define PHY_LPDDR4_RTT_37ohm		(25)
+#define PHY_LPDDR4_RTT_35ohm		(26)
+#define PHY_LPDDR4_RTT_33ohm		(27)
+#define PHY_LPDDR4_RTT_32ohm		(28)
+#define PHY_LPDDR4_RTT_30ohm		(29)
+#define PHY_LPDDR4_RTT_29ohm		(30)
+#define PHY_LPDDR4_RTT_27ohm		(31)
 
 #define ADD_CMD_CA			(0x150)
 #define ADD_GROUP_CS0_A			(0x170)
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-loader_params.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-loader_params.inc
index f2dce3f903..cebaf31282 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-loader_params.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-loader_params.inc
@@ -18,13 +18,13 @@
 (528 << DDR_FREQ_F2_SHIFT) | (784 << DDR_FREQ_F3_SHIFT),
 (0 << DDR_FREQ_F4_SHIFT) | (0 << DDR_FREQ_F5_SHIFT),
 /* drv when odt on */
-(34 << PHY_DQ_DRV_SHIFT) | (34 << PHY_CA_DRV_SHIFT) |
-	(42 << PHY_CLK_DRV_SHIFT) | (34 << DRAM_DQ_DRV_SHIFT),
+(30 << PHY_DQ_DRV_SHIFT) | (30 << PHY_CA_DRV_SHIFT) |
+	(38 << PHY_CLK_DRV_SHIFT) | (34 << DRAM_DQ_DRV_SHIFT),
 /* drv when odt off */
-(34 << PHY_DQ_DRV_SHIFT) | (34 << PHY_CA_DRV_SHIFT) |
-	(42 << PHY_CLK_DRV_SHIFT) | (34 << DRAM_DQ_DRV_SHIFT),
+(30 << PHY_DQ_DRV_SHIFT) | (30 << PHY_CA_DRV_SHIFT) |
+	(38 << PHY_CLK_DRV_SHIFT) | (34 << DRAM_DQ_DRV_SHIFT),
 /* odt info */
-(120 << DRAM_ODT_SHIFT) | (241 << PHY_ODT_SHIFT) |
+(120 << DRAM_ODT_SHIFT) | (141 << PHY_ODT_SHIFT) |
 	(1 << PHY_ODT_PUUP_EN_SHIFT) |
 	(1 << PHY_ODT_PUDN_EN_SHIFT),
 /* odt enable freq */
@@ -41,13 +41,13 @@
 (528 << DDR_FREQ_F2_SHIFT) | (784 << DDR_FREQ_F3_SHIFT),
 (0 << DDR_FREQ_F4_SHIFT) | (0 << DDR_FREQ_F5_SHIFT),
 /* drv when odt on */
-(34 << PHY_DQ_DRV_SHIFT) | (34 << PHY_CA_DRV_SHIFT) |
-	(42 << PHY_CLK_DRV_SHIFT) | (34 << DRAM_DQ_DRV_SHIFT),
+(28 << PHY_DQ_DRV_SHIFT) | (28 << PHY_CA_DRV_SHIFT) |
+	(37 << PHY_CLK_DRV_SHIFT) | (34 << DRAM_DQ_DRV_SHIFT),
 /* drv when odt off */
-(34 << PHY_DQ_DRV_SHIFT) | (42 << PHY_CA_DRV_SHIFT) |
-	(42 << PHY_CLK_DRV_SHIFT) | (34 << DRAM_DQ_DRV_SHIFT),
+(28 << PHY_DQ_DRV_SHIFT) | (28 << PHY_CA_DRV_SHIFT) |
+	(37 << PHY_CLK_DRV_SHIFT) | (34 << DRAM_DQ_DRV_SHIFT),
 /* odt info */
-(120 << DRAM_ODT_SHIFT) | (247 << PHY_ODT_SHIFT) |
+(120 << DRAM_ODT_SHIFT) | (148 << PHY_ODT_SHIFT) |
 	(1 << PHY_ODT_PUUP_EN_SHIFT) | (1 << PHY_ODT_PUDN_EN_SHIFT),
 /* odt enable freq */
 (333 << DRAM_ODT_EN_FREQ_SHIFT) | (333 << PHY_ODT_EN_FREQ_SHIFT),
@@ -63,13 +63,13 @@
 (528 << DDR_FREQ_F2_SHIFT) | (784 << DDR_FREQ_F3_SHIFT),
 (0 << DDR_FREQ_F4_SHIFT) | (0 << DDR_FREQ_F5_SHIFT),
 /* drv when odt on */
-(34 << PHY_DQ_DRV_SHIFT) | (44 << PHY_CA_DRV_SHIFT) |
-	(41 << PHY_CLK_DRV_SHIFT) | (34 << DRAM_DQ_DRV_SHIFT),
+(28 << PHY_DQ_DRV_SHIFT) | (37 << PHY_CA_DRV_SHIFT) |
+	(34 << PHY_CLK_DRV_SHIFT) | (34 << DRAM_DQ_DRV_SHIFT),
 /* drv when odt off */
-(49 << PHY_DQ_DRV_SHIFT) | (54 << PHY_CA_DRV_SHIFT) |
-	(44 << PHY_CLK_DRV_SHIFT) | (48 << DRAM_DQ_DRV_SHIFT),
+(28 << PHY_DQ_DRV_SHIFT) | (37 << PHY_CA_DRV_SHIFT) |
+	(34 << PHY_CLK_DRV_SHIFT) | (34 << DRAM_DQ_DRV_SHIFT),
 /* odt info */
-(240 << DRAM_ODT_SHIFT) | (247 << PHY_ODT_SHIFT) |
+(240 << DRAM_ODT_SHIFT) | (148 << PHY_ODT_SHIFT) |
 	(1 << PHY_ODT_PUUP_EN_SHIFT) | (1 << PHY_ODT_PUDN_EN_SHIFT),
 /* odt enable freq */
 (333 << DRAM_ODT_EN_FREQ_SHIFT) | (333 << PHY_ODT_EN_FREQ_SHIFT),
@@ -87,14 +87,14 @@
 (0 << DDR_FREQ_F4_SHIFT) | (0 << DDR_FREQ_F5_SHIFT),
 
 /* drv when odt on */
-(40 << PHY_DQ_DRV_SHIFT) | (40 << PHY_CA_DRV_SHIFT) |
-	(40 << PHY_CLK_DRV_SHIFT) | (40 << DRAM_DQ_DRV_SHIFT),
+(33 << PHY_DQ_DRV_SHIFT) | (33 << PHY_CA_DRV_SHIFT) |
+	(33 << PHY_CLK_DRV_SHIFT) | (40 << DRAM_DQ_DRV_SHIFT),
 /* drv when odt off */
-(40 << PHY_DQ_DRV_SHIFT) |
-	(40 << PHY_CA_DRV_SHIFT) | (40 << PHY_CLK_DRV_SHIFT) |
+(33 << PHY_DQ_DRV_SHIFT) |
+	(33 << PHY_CA_DRV_SHIFT) | (33 << PHY_CLK_DRV_SHIFT) |
 	(80 << DRAM_DQ_DRV_SHIFT),
 /* odt info and PU-cal info */
-(240 << DRAM_ODT_SHIFT) | (120 << PHY_ODT_SHIFT) |
+(240 << DRAM_ODT_SHIFT) | (78 << PHY_ODT_SHIFT) |
 	(0 << LP4_CA_ODT_SHIFT) |
 	(LPDDR4_VDDQ_2_5 << LP4_DRV_PU_CAL_ODTEN_SHIFT) |
 	(LPDDR4_VDDQ_2_5 << LP4_DRV_PU_CAL_ODTOFF_SHIFT) |
diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
index b4b05b11ab..e5e5532330 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -553,21 +553,19 @@ static void phy_pll_set(struct dram_info *dram, u32 freq, u32 wait)
 }
 
 static const u16 d3_phy_drv_2_ohm[][2] = {
-	{PHY_DDR3_RON_506ohm, 506},
-	{PHY_DDR3_RON_253ohm, 253},
-	{PHY_DDR3_RON_169hm, 169},
-	{PHY_DDR3_RON_127ohm, 127},
-	{PHY_DDR3_RON_101ohm, 101},
-	{PHY_DDR3_RON_84ohm, 84},
-	{PHY_DDR3_RON_72ohm, 72},
-	{PHY_DDR3_RON_63ohm, 63},
-	{PHY_DDR3_RON_56ohm, 56},
+	{PHY_DDR3_RON_455ohm, 455},
+	{PHY_DDR3_RON_230ohm, 230},
+	{PHY_DDR3_RON_153ohm, 153},
+	{PHY_DDR3_RON_115ohm, 115},
+	{PHY_DDR3_RON_91ohm, 91},
+	{PHY_DDR3_RON_76ohm, 76},
+	{PHY_DDR3_RON_65ohm, 65},
+	{PHY_DDR3_RON_57ohm, 57},
 	{PHY_DDR3_RON_51ohm, 51},
 	{PHY_DDR3_RON_46ohm, 46},
-	{PHY_DDR3_RON_42ohm, 42},
-	{PHY_DDR3_RON_39ohm, 39},
-	{PHY_DDR3_RON_36ohm, 36},
-	{PHY_DDR3_RON_34ohm, 34},
+	{PHY_DDR3_RON_41ohm, 41},
+	{PHY_DDR3_RON_38ohm, 38},
+	{PHY_DDR3_RON_35ohm, 35},
 	{PHY_DDR3_RON_32ohm, 32},
 	{PHY_DDR3_RON_30ohm, 30},
 	{PHY_DDR3_RON_28ohm, 28},
@@ -575,140 +573,142 @@ static const u16 d3_phy_drv_2_ohm[][2] = {
 	{PHY_DDR3_RON_25ohm, 25},
 	{PHY_DDR3_RON_24ohm, 24},
 	{PHY_DDR3_RON_23ohm, 23},
-	{PHY_DDR3_RON_22ohm, 22}
+	{PHY_DDR3_RON_22ohm, 22},
+	{PHY_DDR3_RON_21ohm, 21},
+	{PHY_DDR3_RON_20ohm, 20}
 };
 
 static u16 d3_phy_odt_2_ohm[][2] = {
 	{PHY_DDR3_RTT_DISABLE, 0},
-	{PHY_DDR3_RTT_953ohm, 953},
-	{PHY_DDR3_RTT_483ohm, 483},
-	{PHY_DDR3_RTT_320ohm, 320},
-	{PHY_DDR3_RTT_241ohm, 241},
-	{PHY_DDR3_RTT_193ohm, 193},
-	{PHY_DDR3_RTT_161ohm, 161},
-	{PHY_DDR3_RTT_138ohm, 138},
-	{PHY_DDR3_RTT_121ohm, 121},
-	{PHY_DDR3_RTT_107ohm, 107},
-	{PHY_DDR3_RTT_97ohm, 97},
-	{PHY_DDR3_RTT_88ohm, 88},
-	{PHY_DDR3_RTT_80ohm, 80},
-	{PHY_DDR3_RTT_74ohm, 74},
-	{PHY_DDR3_RTT_69ohm, 69},
+	{PHY_DDR3_RTT_561ohm, 561},
+	{PHY_DDR3_RTT_282ohm, 282},
+	{PHY_DDR3_RTT_188ohm, 188},
+	{PHY_DDR3_RTT_141ohm, 141},
+	{PHY_DDR3_RTT_113ohm, 113},
+	{PHY_DDR3_RTT_94ohm, 94},
+	{PHY_DDR3_RTT_81ohm, 81},
+	{PHY_DDR3_RTT_72ohm, 72},
 	{PHY_DDR3_RTT_64ohm, 64},
-	{PHY_DDR3_RTT_60ohm, 60},
-	{PHY_DDR3_RTT_57ohm, 57},
-	{PHY_DDR3_RTT_54ohm, 54},
-	{PHY_DDR3_RTT_51ohm, 51},
+	{PHY_DDR3_RTT_58ohm, 58},
+	{PHY_DDR3_RTT_52ohm, 52},
 	{PHY_DDR3_RTT_48ohm, 48},
-	{PHY_DDR3_RTT_46ohm, 46},
 	{PHY_DDR3_RTT_44ohm, 44},
-	{PHY_DDR3_RTT_42ohm, 42}
+	{PHY_DDR3_RTT_41ohm, 41},
+	{PHY_DDR3_RTT_38ohm, 38},
+	{PHY_DDR3_RTT_37ohm, 37},
+	{PHY_DDR3_RTT_34ohm, 34},
+	{PHY_DDR3_RTT_32ohm, 32},
+	{PHY_DDR3_RTT_31ohm, 31},
+	{PHY_DDR3_RTT_29ohm, 29},
+	{PHY_DDR3_RTT_28ohm, 28},
+	{PHY_DDR3_RTT_27ohm, 27},
+	{PHY_DDR3_RTT_25ohm, 25}
 };
 
 static u16 d4lp3_phy_drv_2_ohm[][2] = {
-	{PHY_DDR4_LPDDR3_RON_570ohm, 570},
-	{PHY_DDR4_LPDDR3_RON_285ohm, 285},
-	{PHY_DDR4_LPDDR3_RON_190ohm, 190},
-	{PHY_DDR4_LPDDR3_RON_142ohm, 142},
-	{PHY_DDR4_LPDDR3_RON_114ohm, 114},
-	{PHY_DDR4_LPDDR3_RON_95ohm, 95},
+	{PHY_DDR4_LPDDR3_RON_482ohm, 482},
+	{PHY_DDR4_LPDDR3_RON_244ohm, 244},
+	{PHY_DDR4_LPDDR3_RON_162ohm, 162},
+	{PHY_DDR4_LPDDR3_RON_122ohm, 122},
+	{PHY_DDR4_LPDDR3_RON_97ohm, 97},
 	{PHY_DDR4_LPDDR3_RON_81ohm, 81},
-	{PHY_DDR4_LPDDR3_RON_71ohm, 71},
-	{PHY_DDR4_LPDDR3_RON_63ohm, 63},
-	{PHY_DDR4_LPDDR3_RON_57ohm, 57},
-	{PHY_DDR4_LPDDR3_RON_52ohm, 52},
-	{PHY_DDR4_LPDDR3_RON_47ohm, 47},
+	{PHY_DDR4_LPDDR3_RON_69ohm, 69},
+	{PHY_DDR4_LPDDR3_RON_61ohm, 61},
+	{PHY_DDR4_LPDDR3_RON_54ohm, 54},
+	{PHY_DDR4_LPDDR3_RON_48ohm, 48},
 	{PHY_DDR4_LPDDR3_RON_44ohm, 44},
-	{PHY_DDR4_LPDDR3_RON_41ohm, 41},
-	{PHY_DDR4_LPDDR3_RON_38ohm, 38},
-	{PHY_DDR4_LPDDR3_RON_36ohm, 36},
+	{PHY_DDR4_LPDDR3_RON_40ohm, 40},
+	{PHY_DDR4_LPDDR3_RON_37ohm, 37},
 	{PHY_DDR4_LPDDR3_RON_34ohm, 34},
 	{PHY_DDR4_LPDDR3_RON_32ohm, 32},
 	{PHY_DDR4_LPDDR3_RON_30ohm, 30},
 	{PHY_DDR4_LPDDR3_RON_28ohm, 28},
 	{PHY_DDR4_LPDDR3_RON_27ohm, 27},
-	{PHY_DDR4_LPDDR3_RON_26ohm, 26},
-	{PHY_DDR4_LPDDR3_RON_25ohm, 25}
+	{PHY_DDR4_LPDDR3_RON_25ohm, 25},
+	{PHY_DDR4_LPDDR3_RON_24ohm, 24},
+	{PHY_DDR4_LPDDR3_RON_23ohm, 23},
+	{PHY_DDR4_LPDDR3_RON_22ohm, 22},
+	{PHY_DDR4_LPDDR3_RON_21ohm, 21}
 };
 
 static u16 d4lp3_phy_odt_2_ohm[][2] = {
 	{PHY_DDR4_LPDDR3_RTT_DISABLE, 0},
-	{PHY_DDR4_LPDDR3_RTT_973ohm, 973},
-	{PHY_DDR4_LPDDR3_RTT_493ohm, 493},
-	{PHY_DDR4_LPDDR3_RTT_327ohm, 327},
-	{PHY_DDR4_LPDDR3_RTT_247ohm, 247},
-	{PHY_DDR4_LPDDR3_RTT_197ohm, 197},
-	{PHY_DDR4_LPDDR3_RTT_164ohm, 164},
-	{PHY_DDR4_LPDDR3_RTT_141ohm, 141},
-	{PHY_DDR4_LPDDR3_RTT_123ohm, 123},
-	{PHY_DDR4_LPDDR3_RTT_109ohm, 109},
+	{PHY_DDR4_LPDDR3_RTT_586ohm, 586},
+	{PHY_DDR4_LPDDR3_RTT_294ohm, 294},
+	{PHY_DDR4_LPDDR3_RTT_196ohm, 196},
+	{PHY_DDR4_LPDDR3_RTT_148ohm, 148},
+	{PHY_DDR4_LPDDR3_RTT_118ohm, 118},
 	{PHY_DDR4_LPDDR3_RTT_99ohm, 99},
-	{PHY_DDR4_LPDDR3_RTT_90ohm, 90},
-	{PHY_DDR4_LPDDR3_RTT_82ohm, 82},
+	{PHY_DDR4_LPDDR3_RTT_85ohm, 58},
 	{PHY_DDR4_LPDDR3_RTT_76ohm, 76},
-	{PHY_DDR4_LPDDR3_RTT_70ohm, 70},
-	{PHY_DDR4_LPDDR3_RTT_66ohm, 66},
-	{PHY_DDR4_LPDDR3_RTT_62ohm, 62},
-	{PHY_DDR4_LPDDR3_RTT_58ohm, 58},
+	{PHY_DDR4_LPDDR3_RTT_67ohm, 67},
+	{PHY_DDR4_LPDDR3_RTT_60ohm, 60},
 	{PHY_DDR4_LPDDR3_RTT_55ohm, 55},
-	{PHY_DDR4_LPDDR3_RTT_52ohm, 52},
-	{PHY_DDR4_LPDDR3_RTT_49ohm, 49},
-	{PHY_DDR4_LPDDR3_RTT_47ohm, 47},
-	{PHY_DDR4_LPDDR3_RTT_45ohm, 45},
-	{PHY_DDR4_LPDDR3_RTT_43ohm, 43}
+	{PHY_DDR4_LPDDR3_RTT_50ohm, 50},
+	{PHY_DDR4_LPDDR3_RTT_46ohm, 46},
+	{PHY_DDR4_LPDDR3_RTT_43ohm, 43},
+	{PHY_DDR4_LPDDR3_RTT_40ohm, 40},
+	{PHY_DDR4_LPDDR3_RTT_38ohm, 38},
+	{PHY_DDR4_LPDDR3_RTT_36ohm, 36},
+	{PHY_DDR4_LPDDR3_RTT_34ohm, 34},
+	{PHY_DDR4_LPDDR3_RTT_32ohm, 32},
+	{PHY_DDR4_LPDDR3_RTT_31ohm, 31},
+	{PHY_DDR4_LPDDR3_RTT_29ohm, 29},
+	{PHY_DDR4_LPDDR3_RTT_28ohm, 28},
+	{PHY_DDR4_LPDDR3_RTT_27ohm, 27}
 };
 
 static u16 lp4_phy_drv_2_ohm[][2] = {
-	{PHY_LPDDR4_RON_606ohm, 606},
-	{PHY_LPDDR4_RON_303ohm, 303},
-	{PHY_LPDDR4_RON_202ohm, 202},
-	{PHY_LPDDR4_RON_152ohm, 153},
-	{PHY_LPDDR4_RON_121ohm, 121},
+	{PHY_LPDDR4_RON_501ohm, 501},
+	{PHY_LPDDR4_RON_253ohm, 253},
+	{PHY_LPDDR4_RON_168ohm, 168},
+	{PHY_LPDDR4_RON_126ohm, 126},
 	{PHY_LPDDR4_RON_101ohm, 101},
-	{PHY_LPDDR4_RON_87ohm, 87},
-	{PHY_LPDDR4_RON_76ohm, 76},
-	{PHY_LPDDR4_RON_67ohm, 67},
-	{PHY_LPDDR4_RON_61ohm, 61},
-	{PHY_LPDDR4_RON_55ohm, 55},
-	{PHY_LPDDR4_RON_51ohm, 51},
-	{PHY_LPDDR4_RON_47ohm, 47},
-	{PHY_LPDDR4_RON_43ohm, 43},
-	{PHY_LPDDR4_RON_40ohm, 40},
+	{PHY_LPDDR4_RON_84ohm, 84},
+	{PHY_LPDDR4_RON_72ohm, 72},
+	{PHY_LPDDR4_RON_63ohm, 63},
+	{PHY_LPDDR4_RON_56ohm, 56},
+	{PHY_LPDDR4_RON_50ohm, 50},
+	{PHY_LPDDR4_RON_46ohm, 46},
+	{PHY_LPDDR4_RON_42ohm, 42},
 	{PHY_LPDDR4_RON_38ohm, 38},
 	{PHY_LPDDR4_RON_36ohm, 36},
-	{PHY_LPDDR4_RON_34ohm, 34},
-	{PHY_LPDDR4_RON_32ohm, 32},
-	{PHY_LPDDR4_RON_30ohm, 30},
+	{PHY_LPDDR4_RON_33ohm, 33},
+	{PHY_LPDDR4_RON_31ohm, 31},
 	{PHY_LPDDR4_RON_29ohm, 29},
 	{PHY_LPDDR4_RON_28ohm, 28},
-	{PHY_LPDDR4_RON_26ohm, 26}
+	{PHY_LPDDR4_RON_26ohm, 26},
+	{PHY_LPDDR4_RON_25ohm, 25},
+	{PHY_LPDDR4_RON_24ohm, 24},
+	{PHY_LPDDR4_RON_23ohm, 23},
+	{PHY_LPDDR4_RON_22ohm, 22}
 };
 
 static u16 lp4_phy_odt_2_ohm[][2] = {
 	{PHY_LPDDR4_RTT_DISABLE, 0},
-	{PHY_LPDDR4_RTT_998ohm, 998},
-	{PHY_LPDDR4_RTT_506ohm, 506},
-	{PHY_LPDDR4_RTT_336ohm, 336},
-	{PHY_LPDDR4_RTT_253ohm, 253},
+	{PHY_LPDDR4_RTT_604ohm, 604},
+	{PHY_LPDDR4_RTT_303ohm, 303},
 	{PHY_LPDDR4_RTT_202ohm, 202},
-	{PHY_LPDDR4_RTT_169ohm, 169},
-	{PHY_LPDDR4_RTT_144ohm, 144},
-	{PHY_LPDDR4_RTT_127ohm, 127},
-	{PHY_LPDDR4_RTT_112ohm, 112},
+	{PHY_LPDDR4_RTT_152ohm, 152},
+	{PHY_LPDDR4_RTT_122ohm, 122},
 	{PHY_LPDDR4_RTT_101ohm, 101},
-	{PHY_LPDDR4_RTT_92ohm, 92},
-	{PHY_LPDDR4_RTT_84ohm, 84},
+	{PHY_LPDDR4_RTT_87ohm,	87},
 	{PHY_LPDDR4_RTT_78ohm, 78},
-	{PHY_LPDDR4_RTT_72ohm, 72},
-	{PHY_LPDDR4_RTT_67ohm, 67},
-	{PHY_LPDDR4_RTT_63ohm, 63},
-	{PHY_LPDDR4_RTT_60ohm, 60},
+	{PHY_LPDDR4_RTT_69ohm, 69},
+	{PHY_LPDDR4_RTT_62ohm, 62},
 	{PHY_LPDDR4_RTT_56ohm, 56},
-	{PHY_LPDDR4_RTT_53ohm, 53},
-	{PHY_LPDDR4_RTT_51ohm, 51},
+	{PHY_LPDDR4_RTT_52ohm, 52},
 	{PHY_LPDDR4_RTT_48ohm, 48},
-	{PHY_LPDDR4_RTT_46ohm, 46},
-	{PHY_LPDDR4_RTT_44ohm, 44}
+	{PHY_LPDDR4_RTT_44ohm, 44},
+	{PHY_LPDDR4_RTT_41ohm, 41},
+	{PHY_LPDDR4_RTT_39ohm, 39},
+	{PHY_LPDDR4_RTT_37ohm, 37},
+	{PHY_LPDDR4_RTT_35ohm, 35},
+	{PHY_LPDDR4_RTT_33ohm, 33},
+	{PHY_LPDDR4_RTT_32ohm, 32},
+	{PHY_LPDDR4_RTT_30ohm, 30},
+	{PHY_LPDDR4_RTT_29ohm, 29},
+	{PHY_LPDDR4_RTT_27ohm, 27}
 };
 
 static u32 lp4_odt_calc(u32 odt_ohm)
@@ -1464,7 +1464,7 @@ static int data_training_rg(struct dram_info *dram, u32 cs, u32 dramtype)
 	if (dramtype != LPDDR4) {
 		for (i = 0; i < 4; i++) {
 			j = 0x110 + i * 0x10;
-			writel(PHY_DDR4_LPDDR3_RTT_247ohm,
+			writel(PHY_DDR4_LPDDR3_RTT_294ohm,
 			       PHY_REG(phy_base, j));
 			writel(PHY_DDR4_LPDDR3_RTT_DISABLE,
 			       PHY_REG(phy_base, j + 0x1));

commit d5bb9a92b151a7b9342d4099f6793e68d524f8fe
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Mon Jun 22 10:03:12 2020 +0800

    rv1126: ddr: wrlvl support dqs longger than clk
    
    Change-Id: I3c94787e1ffdc9f43c591b05002f0b70ffedf1ec
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
index a09ef21021..b4b05b11ab 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -117,7 +117,7 @@ static struct rv1126_fsp_param fsp_param[MAX_IDX];
 
 static u8 lp3_odt_value;
 
-static u8 wrlvl_result[2][4];
+static s8 wrlvl_result[2][4];
 
 /* DDR configuration 0-9 */
 u16 ddr_cfg_2_rbc[] = {
@@ -1858,7 +1858,9 @@ static int get_wrlvl_val(struct dram_info *dram,
 
 	lp_stat = low_power_update(dram, 0);
 
-	clk_skew = readl(PHY_REG(phy_base, 0x150 + 0x17));
+	clk_skew = 0x1f;
+	modify_ca_deskew(dram, DESKEW_MDF_ABS_VAL, clk_skew, clk_skew, 3,
+			 sdram_params->base.dramtype);
 
 	ret = data_training(dram, 0, sdram_params, 0, WRITE_LEVELING);
 	if (sdram_params->ch.cap_info.rank == 2)
@@ -1884,7 +1886,7 @@ static int high_freq_training(struct dram_info *dram,
 	void __iomem *phy_base = dram->phy;
 	u32 dramtype = sdram_params->base.dramtype;
 	int min_val;
-	u32 dqs_skew, clk_skew, ca_skew;
+	int dqs_skew, clk_skew, ca_skew;
 	int ret;
 
 	dqs_skew = 0;

commit df8389e3dc14e7512b815cef94ab4f0aee28e457
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Thu Jul 23 16:48:17 2020 +0800

    rv1126: ddr: fix some coding bug
    
    Change-Id: Ic70018f2afeacb167403937a54c7b8cb62605bfe
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
index a20cc0d6f0..a09ef21021 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -2770,7 +2770,7 @@ void ddr_set_rate(struct dram_info *dram,
 
 	writel(PMUGRF_CON_DDRPHY_BUFFEREN_MASK |
 	       PMUGRF_CON_DDRPHY_BUFFEREN_EN,
-	       dram->pmugrf->soc_con[0]);
+	       &dram->pmugrf->soc_con[0]);
 	sw_set_req(dram);
 	clrbits_le32(pctl_base + DDR_PCTL2_DFIMISC,
 		     PCTL2_DFI_INIT_COMPLETE_EN);
@@ -2789,7 +2789,7 @@ void ddr_set_rate(struct dram_info *dram,
 	sw_set_ack(dram);
 
 	writel(DDR_MSCH_EN_MASK | (0x1 << DDR_MSCH_EN_SHIFT),
-	       dram->cru->clkgate_con[2]);
+	       &dram->cru->clkgate_con[21]);
 	writel(CLK_DDR_UPCTL_EN_MASK | ACLK_DDR_UPCTL_EN_MASK |
 					(0x1 << CLK_DDR_UPCTL_EN_SHIFT) |
 					(0x1 << ACLK_DDR_UPCTL_EN_SHIFT),
@@ -2803,9 +2803,9 @@ void ddr_set_rate(struct dram_info *dram,
 
 	writel(PMUGRF_CON_DDRPHY_BUFFEREN_MASK |
 			PMUGRF_CON_DDRPHY_BUFFEREN_DIS,
-			dram->pmugrf->soc_con[0]);
+			&dram->pmugrf->soc_con[0]);
 	writel(DDR_MSCH_EN_MASK | (0x0 << DDR_MSCH_EN_SHIFT),
-	       dram->cru->clkgate_con[2]);
+	       &dram->cru->clkgate_con[21]);
 	writel(CLK_DDR_UPCTL_EN_MASK | ACLK_DDR_UPCTL_EN_MASK |
 					(0x0 << CLK_DDR_UPCTL_EN_SHIFT) |
 					(0x0 << ACLK_DDR_UPCTL_EN_SHIFT),

commit 299b0bf8ca77b0860ec6793cad58fe7357b9e2a7
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Jul 31 11:57:15 2020 +0800

    mtd: spi-nor-ids: mx25l12805d add SPI_NOR_QUAD_READ support
    
    Change-Id: I90f1513ca7698650b87985bd38c8b9a5bb3027ca
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 807425a657..27ef911f91 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -145,7 +145,7 @@ const struct flash_info spi_nor_ids[] = {
 	{ INFO("mx25u2033e",  0xc22532, 0, 64 * 1024,   4, SECT_4K) },
 	{ INFO("mx25u1635e",  0xc22535, 0, 64 * 1024,  32, SECT_4K) },
 	{ INFO("mx25u6435f",  0xc22537, 0, 64 * 1024, 128, SECT_4K) },
-	{ INFO("mx25l12805d", 0xc22018, 0, 64 * 1024, 256, 0) },
+	{ INFO("mx25l12805d", 0xc22018, 0, 64 * 1024, 256, SPI_NOR_QUAD_READ) },
 	{ INFO("mx25l12855e", 0xc22618, 0, 64 * 1024, 256, 0) },
 	{ INFO("mx25l25635e", 0xc22019, 0, 64 * 1024, 512, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 	{ INFO("mx25u25635f", 0xc22539, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_4B_OPCODES) },

commit 90a6d58f15d8bd8f1e7fbc6245c9db5a781cf201
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Thu Jul 23 11:49:53 2020 +0800

    video/drm: rk618: change clkin rate to 11289600
    
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
    Change-Id: Ic98a1eb1265ded4b6f237d93cd47f13bcb56d7f9

diff --git a/drivers/video/drm/rk618.c b/drivers/video/drm/rk618.c
index 72d6dbacbc..549be4abc4 100644
--- a/drivers/video/drm/rk618.c
+++ b/drivers/video/drm/rk618.c
@@ -149,7 +149,7 @@ static int rk618_probe(struct udevice *dev)
 		return ret;
 	}
 
-	ret = clk_set_rate(&rk618->clkin, 12000000);
+	ret = clk_set_rate(&rk618->clkin, 11289600);
 	if (ret < 0) {
 		dev_err(dev, "failed to set rate: %d\n", ret);
 		return ret;

commit a9cbfff9cbf9208d9a3c37403d3e6dc1cd43acf3
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Thu Jul 23 11:51:04 2020 +0800

    clk/rockchip: px30: support any frequency for i2s1_mclk
    
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
    Change-Id: Ica0ca19d1a4fafbaf62e5c789ae3223ff9d86632

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 8509209262..32286dbeb8 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -482,6 +482,39 @@ static ulong px30_i2s_set_clk(struct px30_clk_priv *priv, ulong clk_id, uint hz)
 	return px30_i2s_get_clk(priv, clk_id);
 }
 
+static ulong px30_i2s1_mclk_get_clk(struct px30_clk_priv *priv, ulong clk_id)
+{
+	struct px30_cru *cru = priv->cru;
+	u32 con;
+
+	con = readl(&cru->clksel_con[30]);
+
+	if (con & CLK_I2S1_OUT_SEL_MASK)
+		return 12000000;
+
+	return px30_i2s_get_clk(priv, SCLK_I2S1);
+}
+
+static ulong px30_i2s1_mclk_set_clk(struct px30_clk_priv *priv, ulong clk_id,
+				    ulong hz)
+{
+	struct px30_cru *cru = priv->cru;
+
+	if (hz == 12000000) {
+		rk_clrsetreg(&cru->clksel_con[30], CLK_I2S1_OUT_SEL_MASK,
+			     CLK_I2S1_OUT_SEL_OSC);
+	} else {
+		rk_clrsetreg(&cru->clksel_con[30], CLK_I2S1_OUT_SEL_MASK,
+			     CLK_I2S1_OUT_SEL_I2S1);
+		px30_i2s_set_clk(priv, SCLK_I2S1, hz);
+	}
+
+	rk_clrsetreg(&cru->clkgate_con[10], CLK_I2S1_OUT_MCLK_PAD_MASK,
+		     CLK_I2S1_OUT_MCLK_PAD_ENABLE);
+
+	return px30_i2s1_mclk_get_clk(priv, clk_id);
+}
+
 static ulong px30_nandc_get_clk(struct px30_clk_priv *priv)
 {
 	struct px30_cru *cru = priv->cru;
@@ -1051,37 +1084,6 @@ static ulong px30_crypto_set_clk(struct px30_clk_priv *priv, ulong clk_id,
 	return px30_crypto_get_clk(priv, clk_id);
 }
 
-static ulong px30_i2s1_mclk_get_clk(struct px30_clk_priv *priv, ulong clk_id)
-{
-	struct px30_cru *cru = priv->cru;
-	u32 con;
-
-	con = readl(&cru->clksel_con[30]);
-
-	if (!(con & CLK_I2S1_OUT_SEL_MASK))
-		return -ENOENT;
-
-	return 12000000;
-}
-
-static ulong px30_i2s1_mclk_set_clk(struct px30_clk_priv *priv, ulong clk_id,
-				    ulong hz)
-{
-	struct px30_cru *cru = priv->cru;
-
-	if (hz != 12000000) {
-		printf("do not support this i2s1_mclk freq\n");
-		return -EINVAL;
-	}
-
-	rk_clrsetreg(&cru->clksel_con[30], CLK_I2S1_OUT_SEL_MASK,
-		     CLK_I2S1_OUT_SEL_OSC);
-	rk_clrsetreg(&cru->clkgate_con[10], CLK_I2S1_OUT_MCLK_PAD_MASK,
-		     CLK_I2S1_OUT_MCLK_PAD_ENABLE);
-
-	return px30_i2s1_mclk_get_clk(priv, clk_id);
-}
-
 static ulong px30_mac_set_clk(struct clk *clk, uint hz)
 {
 	struct px30_clk_priv *priv = dev_get_priv(clk->dev);
@@ -1253,6 +1255,9 @@ static ulong px30_clk_get_rate(struct clk *clk)
 	case SCLK_I2S1:
 		rate = px30_i2s_get_clk(priv, clk->id);
 		break;
+	case SCLK_I2S1_OUT:
+		rate = px30_i2s1_mclk_get_clk(priv, clk->id);
+		break;
 	case SCLK_PWM0:
 	case SCLK_PWM1:
 		rate = px30_pwm_get_clk(priv, clk->id);
@@ -1334,6 +1339,9 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_I2S1:
 		ret = px30_i2s_set_clk(priv, clk->id, rate);
 		break;
+	case SCLK_I2S1_OUT:
+		ret = px30_i2s1_mclk_set_clk(priv, clk->id, rate);
+		break;
 	case SCLK_PWM0:
 	case SCLK_PWM1:
 		ret = px30_pwm_set_clk(priv, clk->id, rate);
@@ -1368,9 +1376,6 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_CRYPTO_APK:
 		ret = px30_crypto_set_clk(priv, clk->id, rate);
 		break;
-	case SCLK_I2S1_OUT:
-		ret = px30_i2s1_mclk_set_clk(priv, clk->id, rate);
-		break;
 	case SCLK_GMAC:
 	case SCLK_GMAC_SRC:
 		ret = px30_mac_set_clk(clk, rate);

commit 9936e5dd9ca6b9b8298dd8fd622f5cc31ce0ecd9
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Thu Jul 23 11:53:33 2020 +0800

    clk: rockchip: px30: fix n/m for sclk_i2s1
    
    High 16-bit for numerator, Low 16-bit for denominator.
    
    Fixes: 95f2641240fb ("clk: rockchip: px30: add support clock for SCLK_I2S1")
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
    Change-Id: Iafbb03ceaa7ccc178ee2a74be2fab6c2b7268ced

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index c215d35a26..8509209262 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -434,10 +434,10 @@ static ulong px30_i2s_get_clk(struct px30_clk_priv *priv, ulong clk_id)
 		con = readl(&cru->clksel_con[30]);
 		fracdiv = readl(&cru->clksel_con[31]);
 		gate = readl(&cru->clkgate_con[10]);
-		m = fracdiv & CLK_I2S1_FRAC_NUMERATOR_MASK;
-		m >>= CLK_I2S1_FRAC_NUMERATOR_SHIFT;
-		n = fracdiv & CLK_I2S1_FRAC_DENOMINATOR_MASK;
-		n >>= CLK_I2S1_FRAC_DENOMINATOR_SHIFT;
+		n = fracdiv & CLK_I2S1_FRAC_NUMERATOR_MASK;
+		n >>= CLK_I2S1_FRAC_NUMERATOR_SHIFT;
+		m = fracdiv & CLK_I2S1_FRAC_DENOMINATOR_MASK;
+		m >>= CLK_I2S1_FRAC_DENOMINATOR_SHIFT;
 		debug("con30: 0x%x, gate: 0x%x, frac: 0x%x\n",
 		      con, gate, fracdiv);
 		break;

commit 5cfabef40a06bc48673a2ed882ab81a8f1ed9bdd
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Thu Jul 23 14:48:16 2020 +0800

    video/drm: display: Downgrade "available display" messages to debug
    
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
    Change-Id: Ie12ae2a2f412706eb1dc566cf3ce2226de58bfac

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 35ac32138d..2561079c19 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -1456,7 +1456,7 @@ static int rockchip_display_probe(struct udevice *dev)
 	}
 
 	if (list_empty(&rockchip_display_list)) {
-		printf("Failed to found available display route\n");
+		debug("Failed to found available display route\n");
 		return -ENODEV;
 	}
 

commit ac6274b35da9f2869a107710b047031a7ff0c371
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Thu Mar 14 09:41:18 2019 +0800

    drm/rockchip: loader kernel bmp for rk fb driver
    
    Always try to load kernel logo bmp.
    
    Fixes: 5eb61944c8dd ("drm/rockchip: loader kernel bmp for rk fb driver")
    Change-Id: I2b85562ed04f2c6c9cc92aa994a76211d55a3fe1
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index be637771e2..35ac32138d 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -1483,12 +1483,13 @@ void rockchip_display_fixup(void *blob)
 	const struct device_node *np;
 	const char *path;
 
-	if (!get_display_size())
-		return;
-
 	if (fdt_node_offset_by_compatible(blob, 0, "rockchip,drm-logo") >= 0) {
 		list_for_each_entry(s, &rockchip_display_list, head)
 			load_bmp_logo(&s->logo, s->klogo_name);
+
+		if (!get_display_size())
+			return;
+
 		offset = fdt_update_reserved_memory(blob, "rockchip,drm-logo",
 						    (u64)memory_start,
 						    (u64)get_display_size());

commit 7b01a70ca6e3e9a18c3fa0877169dd9288729928
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jul 29 15:28:11 2020 +0800

    rockchip: rv1126: make fit: simplify the script
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I28d3bf6816a28c3cf460db83d726a5506a3179da

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh b/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh
index 2a8c25d163..09e16f4b8b 100755
--- a/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh
+++ b/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh
@@ -8,6 +8,7 @@
 # Process args and auto set variables
 source ./${srctree}/arch/arm/mach-rockchip/make_fit_args.sh
 
+# compression
 rm -f ${srctree}/mcu.digest ${srctree}/u-boot-nodtb.digest ${srctree}/tee.digest
 
 if [ "${COMPRESSION}" == "gzip" ]; then
@@ -17,12 +18,10 @@ if [ "${COMPRESSION}" == "gzip" ]; then
 	gzip -k -f -9 ${srctree}/tee.bin
 	SUFFIX=".gz"
 else
-	touch ${srctree}/u-boot-nodtb.digest ${srctree}/tee.digest
 	COMPRESSION="none"
 	SUFFIX=
 fi
 
-# mcu
 if [ ! -z "${MCU_LOAD_ADDR}" ]; then
 	if [ "${COMPRESSION}" == "gzip" ]; then
 		openssl dgst -sha256 -binary -out ${srctree}/mcu.digest ${srctree}/mcu.bin
@@ -30,10 +29,64 @@ if [ ! -z "${MCU_LOAD_ADDR}" ]; then
 	fi
 fi
 
-# .its file generation
+# u-boot and tee
+UBOOT_BODY="			data = /incbin/(\"./u-boot-nodtb.bin${SUFFIX}\");
+			compression = \"${COMPRESSION}\";
+			load = <"${UBOOT_LOAD_ADDR}">;"
+
+TEE_BODY="			data = /incbin/(\"./tee.bin${SUFFIX}\");
+			compression = \"${COMPRESSION}\";
+			load = <0x"${TEE_LOAD_ADDR}">;
+			entry = <0x"${TEE_LOAD_ADDR}">;"
+
+# digest
+if [ "${COMPRESSION}" != "none" ]; then
+UBOOT_DIGEST="			digest {
+				value = /incbin/(\"./u-boot-nodtb.digest\");
+				algo = \"sha256\";
+			};"
+
+TEE_DIGEST="			digest {
+				value = /incbin/(\"./tee.digest\");
+				algo = \"sha256\";
+			};"
+
+MCU_DIGEST="			digest {
+				value = /incbin/(\"./mcu.digest\");
+				algo = \"sha256\";
+			};"
+fi
+
+# mcu
+if [ ! -z "${MCU_LOAD_ADDR}" ]; then
+MCU_BODY="		mcu {
+			description = \"mcu\";
+			type = \"standalone\";
+			arch = \"riscv\";
+			data = /incbin/(\"./mcu.bin${SUFFIX}\");
+			compression = \"${COMPRESSION}\";
+			load = <0x"${MCU_LOAD_ADDR}">;
+			hash {
+				algo = \"sha256\";
+			};
+${MCU_DIGEST}
+		};"
+
+MCU_STANDALONE="			standalone = \"mcu\";"
+fi
+
+# /configurations/conf
+if [ ! -z "${MCU_LOAD_ADDR}" ]; then
+SIGN_IMAGES="			        sign-images = \"fdt\", \"firmware\", \"loadables\", \"standalone\";"
+else
+SIGN_IMAGES="			        sign-images = \"fdt\", \"firmware\", \"loadables\";"
+fi
+
+########################################################################################################
+
 cat << EOF
 /*
- * Copyright (C) 2017 Rockchip Electronic Co.,Ltd
+ * Copyright (C) 2020 Rockchip Electronic Co.,Ltd
  *
  * Simple U-boot fit source file containing U-Boot, dtb and optee
  */
@@ -41,7 +94,7 @@ cat << EOF
 /dts-v1/;
 
 / {
-	description = "Simple image with OP-TEE support";
+	description = "FIT Image with U-Boot/OP-TEE/MCU";
 	#address-cells = <1>;
 
 	images {
@@ -51,19 +104,12 @@ cat << EOF
 			os = "U-Boot";
 			arch = "arm";
 EOF
-
-echo "			data = /incbin/(\"./u-boot-nodtb.bin${SUFFIX}\");"
-echo "			compression = \"${COMPRESSION}\";"
-echo "			load = <"${UBOOT_LOAD_ADDR}">;"
-
+echo "${UBOOT_BODY}"
+echo "${UBOOT_DIGEST}"
 cat << EOF
 			hash {
 				algo = "sha256";
 			};
-			digest { /* uncompressed data hash */
-				value = /incbin/("./u-boot-nodtb.digest");
-				algo = "sha256";
-			};
 		};
 		optee {
 			description = "OP-TEE";
@@ -71,20 +117,12 @@ cat << EOF
 			arch = "arm";
 			os = "op-tee";
 EOF
-
-echo "			load = <0x"${TEE_LOAD_ADDR}">;"
-echo "			entry = <0x"${TEE_LOAD_ADDR}">;"
-echo "			data = /incbin/(\"./tee.bin${SUFFIX}\");"
-echo "			compression = \"${COMPRESSION}\";"
-
+echo "${TEE_BODY}"
+echo "${TEE_DIGEST}"
 cat << EOF
 			hash {
 				algo = "sha256";
 			};
-			digest {
-				value = /incbin/("./tee.digest");
-				algo = "sha256";
-			};
 		};
 		fdt {
 			description = "U-Boot dtb";
@@ -96,61 +134,27 @@ cat << EOF
 			};
 		};
 EOF
-
-if [ ! -z "${MCU_LOAD_ADDR}" ]; then
-cat  << EOF
-		mcu {
-			description = "mcu";
-			type = "standalone";
-			arch = "riscv";
-EOF
-
-echo "			data = /incbin/(\"./mcu.bin${SUFFIX}\");"
-echo "			compression = \"${COMPRESSION}\";"
-echo "			load = <0x"${MCU_LOAD_ADDR}">;"
-
-cat  << EOF
-			hash {
-				algo = "sha256";
-			};
-			digest {
-				value = /incbin/("./mcu.digest");
-				algo = "sha256";
-			};
-		};
-EOF
-fi
-
+echo "${MCU_BODY}"
 cat  << EOF
 	};
 
 	configurations {
 		default = "conf";
 		conf {
-			description = "Rockchip armv7 with OP-TEE";
+			description = "RV1126 U-Boot FIT";
 			rollback-index = <0x0>;
 			firmware = "optee";
 			loadables = "uboot";
 			fdt = "fdt";
 EOF
-
-if [ ! -z "${MCU_LOAD_ADDR}" ]; then
-echo "			standalone = \"mcu\";"
-fi
-
+echo "${MCU_STANDALONE}"
 cat  << EOF
 			signature {
 				algo = "sha256,rsa2048";
 				padding = "pss";
 				key-name-hint = "dev";
 EOF
-
-if [ ! -z "${MCU_LOAD_ADDR}" ]; then
-echo "			        sign-images = \"fdt\", \"firmware\", \"loadables\", \"standalone\";"
-else
-echo "			        sign-images = \"fdt\", \"firmware\", \"loadables\";"
-fi
-
+echo "${SIGN_IMAGES}"
 cat  << EOF
 			};
 		};

commit 3e8318d7397b4bf7ae093a9ec671db842e0041c2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 28 14:50:01 2020 +0800

    rockchip: rv1126: remove boot_uimage command
    
    There is no requirement of booting uimage.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ibc290af2f8a3e70e3833cad3e3e228c67e85115f

diff --git a/include/configs/rv1126_common.h b/include/configs/rv1126_common.h
index 9f942afdaa..a6307ebcc7 100644
--- a/include/configs/rv1126_common.h
+++ b/include/configs/rv1126_common.h
@@ -85,7 +85,6 @@
 #else
 #define RKIMG_BOOTCOMMAND		\
 	"boot_fit;"			\
-	"boot_uimage;"			\
 	"boot_android ${devtype} ${devnum};"
 #endif
 #endif

commit 6011dca5788317adb6abd6a7e5124d52dcf2223e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 27 16:13:08 2020 +0800

    rockchip: remove rv1109 support
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I2f3d771a049195b6f1e26c5873bc2249bb643a99

diff --git a/arch/arm/dts/rv1109-evb.dts b/arch/arm/dts/rv1109-evb.dts
deleted file mode 100644
index b4764fcf61..0000000000
--- a/arch/arm/dts/rv1109-evb.dts
+++ /dev/null
@@ -1,12 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd.
- */
-
-/dts-v1/;
-#include "rv1126-evb.dts"
-
-/ {
-	model = "Rockchip RV1109 Evaluation Board";
-	compatible = "rockchip,rv1109-evb", "rockchip,rv1109";
-};
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 9eb9dff7ee..d5ce034258 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -438,13 +438,6 @@ config ROCKCHIP_RV1126
 	  The Rockchip RV1126 is a ARM-based SoC with a quad-core Cortex-A7
 	  and a risc-v core.
 
-config ROCKCHIP_RV1109
-	bool "Support Rockchip RV1109"
-	select ROCKCHIP_RV1126
-	help
-	  The Rockchip RV1109 is a ARM-based SoC with a dual-core Cortex-A7
-	  and a risc-v core.
-
 if ROCKCHIP_RV1126
 
 config TPL_LDSCRIPT
diff --git a/arch/arm/mach-rockchip/chip_info.c b/arch/arm/mach-rockchip/chip_info.c
index 232facc0fd..aaddd0de94 100644
--- a/arch/arm/mach-rockchip/chip_info.c
+++ b/arch/arm/mach-rockchip/chip_info.c
@@ -91,8 +91,6 @@ int rockchip_rockusb_get_chip_info(unsigned int chip_info[])
 		chip_info[0] = 0x33333043;
 #elif defined(CONFIG_ROCKCHIP_RK1808)
 		chip_info[0] = 0x31383041;
-#elif defined(CONFIG_ROCKCHIP_RV1109)
-		chip_info[0] = 0x31313039;
 #elif defined(CONFIG_ROCKCHIP_RV1126)
 		chip_info[0] = 0x31313236;
 #endif

commit 3b8e4215d5036872941df99cb6f76eb068992b0f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 27 16:13:42 2020 +0800

    configs: remove rv1109 support
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I529d79c2e2d2344a51714c39375458005d931e38

diff --git a/configs/README.rockchip b/configs/README.rockchip
index db62e53f75..be1e37b867 100644
--- a/configs/README.rockchip
+++ b/configs/README.rockchip
@@ -12,8 +12,6 @@ All platform defconfigs of Rockchip SDK
 	|-----------------------|-----------------------------|
 	|    rv1126             |    rv1126_defconfig         |
 	|-----------------------|-----------------------------|
-	|    rv1109             |    rv1109.config            |
-	|-----------------------|-----------------------------|
 	|    rk1806             |    rk1806_defconfig         |
 	|-----------------------|-----------------------------|
 	|    rk1808             |    rk1808_defconfig         |
@@ -53,68 +51,36 @@ All platform defconfigs of Rockchip SDK
 	There is BASE_DEFCONFIG configure to indicate the base defconfig of it.
 
 	Usage example:
-		./make.sh rv1109
+		./make.sh rv1126-emmc-tb
 
-		It equals: make rv1126_defconfig rv1109.config && make.
+		It equals: make rv1126_defconfig rv1126-emmc-tb.config && make.
 
 
-All rv1126 & rv1109 defconfigs
+All rv1126 defconfigs
 ==============================
 
 	rv1126_defconfig
 	----------------
-			It provides the full features that what we want on rv1126.
+		Full features on rv1126.
+
+	rv1126-spi-nor-tiny_defconfig
+	-----------------------------
+		Tiny SPL & U-Boot image size with gzip compressed on SPI Nor board.
 
 	rv1126-emmc-tb.config
 	---------------------
-			It provides the thunder boot feature on eMMC board of rv1126.
-			"tb": thunder-boot.
+		Thunder boot feature on eMMC board.
 
 	rv1126-spi-nor-tb.config
 	------------------------
-			Similar to rv1126-emmc-tb.config, it provides the thunder boot feature on spi nor
-			board of rv1126.
+		Thunder boot feature on SPI Nor board.
 
 	rv1126-usbplug.config
 	---------------------
-			It provides the open source usbplug support by U-Boot project.
-
-			There is ./usbplug.bin after compilation, that can be used to replace the usbplug
-			file in the rkbin project.
+		Open source version of UsbPlug supported in U-Boot project.
+		There is a ./usbplug.bin after compilation to replace the usbplug in rkbin project.
 
 	rv1126-ramboot.config
 	---------------------
-			It provides the ram boot features on rv1126, only U-Boot proper is build.
-
-	rv1126-mini-template_defconfig
-	------------------------------
-			It provides a template to generate <u-boot.bin> with small size for eMMC board with
-			some basic features, developer is easy to enable/disable more features base on it.
-
-			If developer wants to get a even smaller u-boot.bin, try to disable the following
-			configurations accordding to board requirement.
-
-			[*] Remove Power(15KB):
-				# CONFIG_DM_PMIC is not set
-				# CONFIG_DM_REGULATOR is not set
-				# CONFIG_DM_REGULATOR_FIXED is not set
-				# CONFIG_DM_PWM is not set
-				# CONFIG_DM_I2C is not set
-
-			[*] Remove USB(55KB):
-				# CONFIG_USB is not set
-				# CONFIG_PHY_ROCKCHIP_NANENG_USB2 is not set
-
-				- No USB is available that U-Boot fallbacks to bootrom download mode with Menu key.
-				- Recovery key is always used to enter recovery boot mode.
-
-			[*] Remove Command-interface(33KB):
-				# CONFIG_CMDLINE is not set
-				CONFIG_U_BOOT_CMD_ALWAYS=y
-
-				- Only the command that with U_BOOT_CMD_ALWAYS() delcared is available.
-
-	rv1109-[...].config
-	-------------------
-			It provides the almost features the same as rv1126-[...]_defconfig.
+		Ram boot features on rv1126, only U-Boot proper is build.
 
diff --git a/configs/rv1109-emmc-tb.config b/configs/rv1109-emmc-tb.config
deleted file mode 100644
index c00014c637..0000000000
--- a/configs/rv1109-emmc-tb.config
+++ /dev/null
@@ -1,5 +0,0 @@
-CONFIG_BASE_DEFCONFIG="rv1126-emmc-tb.config"
-CONFIG_DEFAULT_DEVICE_TREE="rv1109-evb"
-CONFIG_LOADER_INI="RV1109MINIALL_EMMC_TB.ini"
-CONFIG_ROCKCHIP_RV1109=y
-CONFIG_TRUST_INI="RV1109TOS_TB.ini"
diff --git a/configs/rv1109-spi-nor-tiny.config b/configs/rv1109-spi-nor-tiny.config
deleted file mode 100644
index 4884619f07..0000000000
--- a/configs/rv1109-spi-nor-tiny.config
+++ /dev/null
@@ -1,6 +0,0 @@
-CONFIG_BASE_DEFCONFIG="rv1126-spi-nor-tiny_defconfig"
-CONFIG_DEFAULT_DEVICE_TREE="rv1109-evb"
-CONFIG_LOADER_INI="RV1109MINIALL_SPI_NOR_TINY.ini"
-CONFIG_OF_LIST="rv1109-evb"
-CONFIG_ROCKCHIP_RV1109=y
-CONFIG_TRUST_INI="RV1109TOS_SPI_NOR_TINY.ini"
diff --git a/configs/rv1109.config b/configs/rv1109.config
deleted file mode 100644
index 661c82c897..0000000000
--- a/configs/rv1109.config
+++ /dev/null
@@ -1,6 +0,0 @@
-CONFIG_BASE_DEFCONFIG="rv1126_defconfig"
-CONFIG_DEFAULT_DEVICE_TREE="rv1109-evb"
-CONFIG_LOADER_INI="RV1109MINIALL.ini"
-CONFIG_OF_LIST="rv1109-evb"
-CONFIG_ROCKCHIP_RV1109=y
-CONFIG_TRUST_INI="RV1109TOS.ini"
diff --git a/configs/rv1126-mini-template_defconfig b/configs/rv1126-mini-template_defconfig
deleted file mode 100644
index 2e31e83a4b..0000000000
--- a/configs/rv1126-mini-template_defconfig
+++ /dev/null
@@ -1,123 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SPL_LIBCOMMON_SUPPORT=y
-CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SYS_MALLOC_F_LEN=0x10000
-CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh"
-CONFIG_ROCKCHIP_RV1126=y
-CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
-CONFIG_ROCKCHIP_FIT_IMAGE=y
-# CONFIG_ROCKCHIP_SMCCC is not set
-CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y
-# CONFIG_GICV2 is not set
-CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
-CONFIG_TARGET_EVB_RV1126=y
-CONFIG_DEFAULT_DEVICE_TREE="rv1126-evb"
-CONFIG_DEBUG_UART=y
-# CONFIG_DISTRO_DEFAULTS is not set
-CONFIG_FIT=y
-CONFIG_FIT_HW_CRYPTO=y
-CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_HW_CRYPTO=y
-# CONFIG_SPL_SYS_DCACHE_OFF is not set
-CONFIG_BOOTDELAY=0
-CONFIG_SYS_CONSOLE_INFO_QUIET=y
-# CONFIG_DISPLAY_CPUINFO is not set
-CONFIG_SPL_BOARD_INIT=y
-# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
-# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
-CONFIG_SPL_SHA256_SUPPORT=y
-CONFIG_SPL_CRYPTO_SUPPORT=y
-CONFIG_SPL_HASH_SUPPORT=y
-CONFIG_SPL_OPTEE=y
-CONFIG_HUSH_PARSER=y
-# CONFIG_FASTBOOT is not set
-# CONFIG_CMD_BDI is not set
-# CONFIG_CMD_CONSOLE is not set
-# CONFIG_CMD_ELF is not set
-# CONFIG_CMD_IMI is not set
-# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_XIMG is not set
-# CONFIG_CMD_EDITENV is not set
-# CONFIG_CMD_SAVEENV is not set
-# CONFIG_CMD_ENV_EXISTS is not set
-# CONFIG_CMD_CRC32 is not set
-# CONFIG_CMD_MEMORY is not set
-# CONFIG_CMD_DM is not set
-# CONFIG_CMD_FLASH is not set
-# CONFIG_CMD_FPGA is not set
-CONFIG_RANDOM_UUID=y
-# CONFIG_CMD_LOADB is not set
-# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_ECHO is not set
-# CONFIG_CMD_ITEST is not set
-# CONFIG_CMD_SOURCE is not set
-# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
-# CONFIG_CMD_MISC is not set
-# CONFIG_DOS_PARTITION is not set
-CONFIG_EFI_PARTITION=y
-CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
-CONFIG_SPL_OF_CONTROL=y
-CONFIG_SPL_DTB_MINIMUM=y
-CONFIG_OF_LIVE=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
-CONFIG_OF_U_BOOT_REMOVE_PROPS="interrupt-parent"
-CONFIG_REGMAP=y
-CONFIG_SPL_REGMAP=y
-CONFIG_SYSCON=y
-CONFIG_SPL_SYSCON=y
-CONFIG_CLK=y
-CONFIG_SPL_CLK=y
-CONFIG_DM_CRYPTO=y
-CONFIG_SPL_DM_CRYPTO=y
-CONFIG_ROCKCHIP_CRYPTO_V2=y
-CONFIG_SPL_ROCKCHIP_CRYPTO_V2=y
-CONFIG_ROCKCHIP_GPIO=y
-CONFIG_SYS_I2C_ROCKCHIP=y
-CONFIG_DM_KEY=y
-CONFIG_ADC_KEY=y
-CONFIG_SPL_MISC=y
-CONFIG_SPL_ROCKCHIP_SECURE_OTP_V2=y
-CONFIG_MMC_DW=y
-CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_SF_DEFAULT_MODE=0x1
-CONFIG_PHY=y
-CONFIG_PHY_ROCKCHIP_NANENG_USB2=y
-CONFIG_PINCTRL=y
-CONFIG_DM_PMIC=y
-# CONFIG_SPL_PMIC_CHILDREN is not set
-CONFIG_PMIC_RK8XX=y
-CONFIG_REGULATOR_PWM=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_REGULATOR_RK8XX=y
-CONFIG_PWM_ROCKCHIP=y
-CONFIG_RAM=y
-CONFIG_SPL_RAM=y
-CONFIG_TPL_RAM=y
-CONFIG_ROCKCHIP_SDRAM_COMMON=y
-CONFIG_DM_RESET=y
-CONFIG_BAUDRATE=1500000
-CONFIG_DEBUG_UART_BASE=0xff570000
-CONFIG_DEBUG_UART_CLOCK=24000000
-CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_DEBUG_UART_ALWAYS_MODE=y
-CONFIG_SYSRESET=y
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_GENERIC=y
-CONFIG_USB_DWC3=y
-CONFIG_USB_DWC3_GADGET=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
-CONFIG_USB_GADGET_VENDOR_NUM=0x2207
-CONFIG_USB_GADGET_PRODUCT_NUM=0x110b
-CONFIG_USB_GADGET_DOWNLOAD=y
-# CONFIG_SYS_WHITE_ON_BLACK is not set
-CONFIG_USE_TINY_PRINTF=y
-CONFIG_SPL_TINY_MEMSET=y
-CONFIG_ERRNO_STR=y
-# CONFIG_EFI_LOADER is not set

commit 2031371827bdd34104ca6f9283122895772091c9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 27 20:20:51 2020 +0800

    rockchip: resource: initial hash_size as 0
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If2c7c8890dc1d29610c2ba871e3e9c5a1df57dc7

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 41c2873055..d301f9b7a2 100644
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -184,6 +184,7 @@ static int replace_resource_entry(const char *f_name, uint32_t base,
 	strcpy(entry->name, f_name);
 	entry->f_offset = f_offset;
 	entry->f_size = f_size;
+	entry->hash_size = 0;
 
 	/* Delete exist entry, then add this new */
 	list_for_each(node, &entrys_head) {

commit 2a93187938d2256794affd6598d66d993a3acea1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 27 20:10:55 2020 +0800

    rockchip: kernel_dtb: fix compile issue
    
    A careless mistake.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I5ea26a44af23bdd8cdc5eb1ba08674193a07045e

diff --git a/arch/arm/mach-rockchip/kernel_dtb.c b/arch/arm/mach-rockchip/kernel_dtb.c
index 445b7ee43c..87bc20f9d5 100644
--- a/arch/arm/mach-rockchip/kernel_dtb.c
+++ b/arch/arm/mach-rockchip/kernel_dtb.c
@@ -182,7 +182,7 @@ static int phandles_fixup_gpio(const void *fdt, void *ufdt)
 		if (!name)
 			continue;
 
-		for (i = 0; i < ARRAY_SIZE(gpio_name[i]); i++) {
+		for (i = 0; i < ARRAY_SIZE(gpio_name); i++) {
 			if (gpio_name[i] && !strcmp(name, gpio_name[i])) {
 				new_phd = fdt_get_phandle(fdt, gpio_off[i]);
 				dev_write_u32_array(dev, prop, &new_phd, 1);

commit 83cb3f6b8a44c92da780edebe3257cbf0b57b0d6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 27 19:50:52 2020 +0800

    rockchip: rv1126: make fit: add uncompressed data hash node
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I80545daf9b42c1154a929afc601318d66ad76c86

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh b/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh
index 87fa42b324..2a8c25d163 100755
--- a/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh
+++ b/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh
@@ -8,11 +8,16 @@
 # Process args and auto set variables
 source ./${srctree}/arch/arm/mach-rockchip/make_fit_args.sh
 
+rm -f ${srctree}/mcu.digest ${srctree}/u-boot-nodtb.digest ${srctree}/tee.digest
+
 if [ "${COMPRESSION}" == "gzip" ]; then
+	openssl dgst -sha256 -binary -out ${srctree}/u-boot-nodtb.digest ${srctree}/u-boot-nodtb.bin
+	openssl dgst -sha256 -binary -out ${srctree}/tee.digest ${srctree}/tee.bin
 	gzip -k -f -9 ${srctree}/u-boot-nodtb.bin
 	gzip -k -f -9 ${srctree}/tee.bin
 	SUFFIX=".gz"
 else
+	touch ${srctree}/u-boot-nodtb.digest ${srctree}/tee.digest
 	COMPRESSION="none"
 	SUFFIX=
 fi
@@ -20,6 +25,7 @@ fi
 # mcu
 if [ ! -z "${MCU_LOAD_ADDR}" ]; then
 	if [ "${COMPRESSION}" == "gzip" ]; then
+		openssl dgst -sha256 -binary -out ${srctree}/mcu.digest ${srctree}/mcu.bin
 		gzip -k -f -9 ${srctree}/mcu.bin
 	fi
 fi
@@ -54,6 +60,10 @@ cat << EOF
 			hash {
 				algo = "sha256";
 			};
+			digest { /* uncompressed data hash */
+				value = /incbin/("./u-boot-nodtb.digest");
+				algo = "sha256";
+			};
 		};
 		optee {
 			description = "OP-TEE";
@@ -71,6 +81,10 @@ cat << EOF
 			hash {
 				algo = "sha256";
 			};
+			digest {
+				value = /incbin/("./tee.digest");
+				algo = "sha256";
+			};
 		};
 		fdt {
 			description = "U-Boot dtb";
@@ -99,6 +113,10 @@ cat  << EOF
 			hash {
 				algo = "sha256";
 			};
+			digest {
+				value = /incbin/("./mcu.digest");
+				algo = "sha256";
+			};
 		};
 EOF
 fi

commit 6c625d1e8ccd0d00156accdf81f1360aa8a1865b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 27 19:50:24 2020 +0800

    rockchip: weak: support check uncompressed data hash
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I04c54daa0d8bc43566c7b59a390b5c2789cf1425

diff --git a/arch/arm/mach-rockchip/weak.c b/arch/arm/mach-rockchip/weak.c
index 5dafc4f9d2..4aafe715ae 100644
--- a/arch/arm/mach-rockchip/weak.c
+++ b/arch/arm/mach-rockchip/weak.c
@@ -22,6 +22,27 @@ DECLARE_GLOBAL_DATA_PTR;
  */
 #if CONFIG_IS_ENABLED(FIT_IMAGE_POST_PROCESS)
 #if CONFIG_IS_ENABLED(MISC_DECOMPRESS)
+
+#define FIT_UNCOMP_HASH_NODENAME	"digest"
+static int fit_image_check_uncomp_hash(const void *fit, int parent_noffset,
+				       const void *data, size_t size)
+{
+	const char *name;
+	char *err_msgp;
+	int noffset;
+
+	fdt_for_each_subnode(noffset, fit, parent_noffset) {
+		name = fit_get_name(fit, noffset, NULL);
+		if (!strncmp(name, FIT_UNCOMP_HASH_NODENAME,
+			     strlen(FIT_UNCOMP_HASH_NODENAME))) {
+			return fit_image_check_hash(fit, noffset, data,
+						    size, &err_msgp);
+		}
+	}
+
+	return 0;
+}
+
 static int fit_hw_gunzip(void *fit, int node, ulong *load_addr,
 			 ulong **src_addr, size_t *src_len)
 {
@@ -50,6 +71,13 @@ static int fit_hw_gunzip(void *fit, int node, ulong *load_addr,
 		return ret;
 	}
 
+	/* check uncompressed data hash */
+	ret = fit_image_check_uncomp_hash(fit, node, (void *)(*load_addr), len);
+	if (!ret)
+		puts("+ ");
+	else
+		return ret;
+
 	*src_addr = (ulong *)*load_addr;
 	*src_len = len;
 

commit 50466f58052d59dfe583eaf88cb4bfc4af8ea8e1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 27 19:49:04 2020 +0800

    spl: fit: update newline position
    
    Adding newline after board_fit_image_post_process() message.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I325f26bfb33638a4dfe8fef473d6c5062e566158

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 5bb773262c..866f4b7c7d 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -261,12 +261,12 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 	if (!fit_image_verify_with_data(fit, node,
 					 src, length))
 		return -EPERM;
-	puts("OK\n");
 
 #ifdef CONFIG_SPL_FIT_IMAGE_POST_PROCESS
 	board_fit_image_post_process(fit, node, (ulong *)&load_addr,
 				     (ulong **)&src, &length);
 #endif
+	puts("OK\n");
 
 	if (IS_ENABLED(CONFIG_SPL_OS_BOOT)	&&
 	    IS_ENABLED(CONFIG_SPL_GZIP)		&&

commit 8452668e06cac324c41ac261e75637c2143d8dbf
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 27 14:44:05 2020 +0800

    configs: rv1126: enable spl dm reset
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I91b1030d5852683ecb6792be5c5ee7cbf799a1b5

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index f0a216920e..f661250b50 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -146,6 +146,8 @@ CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
 CONFIG_ROCKCHIP_SDRAM_COMMON=y
 CONFIG_DM_RESET=y
+CONFIG_SPL_DM_RESET=y
+CONFIG_SPL_RESET_ROCKCHIP=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xff570000
 CONFIG_DEBUG_UART_CLOCK=24000000

commit 308c438d9fc86840fd4d03bb459c3c27527bace9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 27 14:30:14 2020 +0800

    configs: rv1126-spi-nor-tiny: enable spl dm reset
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I8a1197a5f0df9788e4e17e1565400ccf49e8d757

diff --git a/configs/rv1126-spi-nor-tiny_defconfig b/configs/rv1126-spi-nor-tiny_defconfig
index 618cb635dc..491ee4e0ab 100644
--- a/configs/rv1126-spi-nor-tiny_defconfig
+++ b/configs/rv1126-spi-nor-tiny_defconfig
@@ -124,6 +124,8 @@ CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
 CONFIG_ROCKCHIP_SDRAM_COMMON=y
 CONFIG_DM_RESET=y
+CONFIG_SPL_DM_RESET=y
+CONFIG_SPL_RESET_ROCKCHIP=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xff570000
 CONFIG_DEBUG_UART_CLOCK=24000000

commit b367c66bb3cd834baab78d47a264ba044293e8dc
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 27 11:12:54 2020 +0800

    misc: rockchip decompress: add dm resets support
    
    Using dm reset API to reset decompress module.
    
    There seems to be some unknown cause to make the module
    in abnormal state, which output the wrong decompress
    data. Let's reset it before starting decompress.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ic4113eec0701f83059453fa263810d31caa406eb

diff --git a/drivers/misc/rockchip_decompress.c b/drivers/misc/rockchip_decompress.c
index 9571ea38d5..6a15b2d0de 100644
--- a/drivers/misc/rockchip_decompress.c
+++ b/drivers/misc/rockchip_decompress.c
@@ -8,6 +8,7 @@
 #include <linux/bitops.h>
 #include <misc.h>
 #include <irq-generic.h>
+#include <reset.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -80,8 +81,8 @@ DECLARE_GLOBAL_DATA_PTR;
 	HDEIEN | DSIEN)
 
 struct rockchip_decom_priv {
+	struct reset_ctl rst;
 	void __iomem *base;
-	unsigned long soft_reset_base;
 	bool idle_check_once;
 	bool done;
 	int cached; /* 1: access the data through dcache; 0: no dcache */
@@ -95,6 +96,11 @@ static int rockchip_decom_start(struct udevice *dev, void *buf)
 	unsigned int limit_hi = param->size_src >> 32;
 	ulong align_input, align_len;
 
+#if CONFIG_IS_ENABLED(DM_RESET)
+	reset_assert(&priv->rst);
+	udelay(10);
+	reset_deassert(&priv->rst);
+#endif
 	if (!priv->cached) {
 		/* src: make sure we get the real compressed data from ddr */
 		align_input =
@@ -119,9 +125,6 @@ static int rockchip_decom_start(struct udevice *dev, void *buf)
 
 	priv->done = false;
 
-	writel(0x00800080, priv->soft_reset_base);
-	writel(0x00800000, priv->soft_reset_base);
-
 	if (param->mode == DECOM_LZ4)
 		writel(LZ4_CONT_CSUM_CHECK_EN |
 		       LZ4_HEAD_CSUM_CHECK_EN |
@@ -233,14 +236,22 @@ static int rockchip_decom_ofdata_to_platdata(struct udevice *dev)
 		return -ENOENT;
 
 	priv->cached = dev_read_u32_default(dev, "data-cached", 0);
-	priv->soft_reset_base = dev_read_u32_default(dev, "soft-reset-addr", 0)
-					& 0xffffffff;
 
 	return 0;
 }
 
 static int rockchip_decom_probe(struct udevice *dev)
 {
+#if CONFIG_IS_ENABLED(DM_RESET)
+	struct rockchip_decom_priv *priv = dev_get_priv(dev);
+	int ret;
+
+	ret = reset_get_by_name(dev, "dresetn", &priv->rst);
+	if (ret) {
+		debug("reset_get_by_name() failed: %d\n", ret);
+		return ret;
+	}
+#endif
 	return 0;
 }
 

commit ed670690bb392028a017784da89f764fb277fa26
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 27 11:10:24 2020 +0800

    rockchip: dts: rv1126: add resets property
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I16554cd94fd43fd975b62a8101ae13cc9d20072b

diff --git a/arch/arm/dts/rv1126.dtsi b/arch/arm/dts/rv1126.dtsi
index 586e5e8e77..6becadf841 100644
--- a/arch/arm/dts/rv1126.dtsi
+++ b/arch/arm/dts/rv1126.dtsi
@@ -1317,6 +1317,8 @@
 		interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru ACLK_DECOM>, <&cru DCLK_DECOM>, <&cru PCLK_DECOM>;
 		clock-names = "aclk", "dclk", "pclk";
+		resets = <&cru SRST_DECOM_D>;
+		reset-names = "dresetn";
 		data-cached = <0>;
 		status = "disabled";
 	};

commit 8fce363f2785acb29fe43f847ab80140d2906edb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 27 11:11:04 2020 +0800

    dm: reset: add reset support for SPL
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I8210b7f656b99bf7cbf4a6708696ebbf91aa7685

diff --git a/drivers/Makefile b/drivers/Makefile
index 84e8bc5c05..07f22e57fa 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -103,7 +103,6 @@ obj-$(CONFIG_U_QE) += qe/
 obj-y += mailbox/
 obj-y += memory/
 obj-y += pwm/
-obj-y += reset/
 obj-y += input/
 # SOC specific infrastructure drivers.
 obj-y += soc/
@@ -112,3 +111,6 @@ obj-y += thermal/
 
 obj-$(CONFIG_MACH_PIC32) += ddr/microchip/
 endif
+
+obj-$(CONFIG_$(SPL_TPL_)DM_RESET) += reset/
+
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index 1121166bbf..08d8674c27 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -12,6 +12,18 @@ config DM_RESET
 	  although driving such reset isgnals using GPIOs may be more
 	  appropriate in this case.
 
+config SPL_DM_RESET
+        bool "Enable reset controllers using Driver Model in SPL"
+        depends on SPL_DM && OF_CONTROL
+        help
+          Enable support for the reset controller driver class. Many hardware
+          modules are equipped with a reset signal, typically driven by some
+          reset controller hardware module within the chip. In U-Boot, reset
+          controller drivers allow control over these reset signals. In some
+          cases this API is applicable to chips outside the CPU as well,
+          although driving such reset isgnals using GPIOs may be more
+          appropriate in this case.
+
 config SANDBOX_RESET
 	bool "Enable the sandbox reset test driver"
 	depends on DM_MAILBOX && SANDBOX
@@ -75,4 +87,10 @@ config RESET_ROCKCHIP
 	  Support for reset controller on rockchip SoC. The main limitation though
 	  is that some reset signals, like I2C or MISC reset multiple devices.
 
+config SPL_RESET_ROCKCHIP
+        bool "Reset controller driver for Rockchip SoCs in SPL"
+        depends on SPL_DM_RESET && SPL_CLK
+        help
+          Support for reset controller on rockchip SoC. The main limitation though
+          is that some reset signals, like I2C or MISC reset multiple devices.
 endmenu
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index 40caba5d8f..02615a58d8 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -2,7 +2,7 @@
 #
 # SPDX-License-Identifier: GPL-2.0
 
-obj-$(CONFIG_DM_RESET) += reset-uclass.o
+obj-$(CONFIG_$(SPL_)DM_RESET) += reset-uclass.o
 obj-$(CONFIG_SANDBOX_MBOX) += sandbox-reset.o
 obj-$(CONFIG_SANDBOX_MBOX) += sandbox-reset-test.o
 obj-$(CONFIG_STI_RESET) += sti-reset.o
@@ -11,4 +11,4 @@ obj-$(CONFIG_TEGRA186_RESET) += tegra186-reset.o
 obj-$(CONFIG_RESET_BCM6345) += reset-bcm6345.o
 obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o
 obj-$(CONFIG_AST2500_RESET) += ast2500-reset.o
-obj-$(CONFIG_RESET_ROCKCHIP) += reset-rockchip.o
+obj-$(CONFIG_$(SPL_)RESET_ROCKCHIP) += reset-rockchip.o

commit 381f27a639582325ca7a3fa7adc6e347ceae0513
Author: Weiwen Chen <cww@rock-chips.com>
Date:   Fri Jul 17 18:30:17 2020 +0800

    configs: add rv1126/1109 defconfig for spi nor tiny
    
    Signed-off-by: Weiwen Chen <cww@rock-chips.com>
    Change-Id: I0eded8e72487c40387021408a6de8a1d26d572f8

diff --git a/configs/rv1109-spi-nor-tiny.config b/configs/rv1109-spi-nor-tiny.config
new file mode 100644
index 0000000000..4884619f07
--- /dev/null
+++ b/configs/rv1109-spi-nor-tiny.config
@@ -0,0 +1,6 @@
+CONFIG_BASE_DEFCONFIG="rv1126-spi-nor-tiny_defconfig"
+CONFIG_DEFAULT_DEVICE_TREE="rv1109-evb"
+CONFIG_LOADER_INI="RV1109MINIALL_SPI_NOR_TINY.ini"
+CONFIG_OF_LIST="rv1109-evb"
+CONFIG_ROCKCHIP_RV1109=y
+CONFIG_TRUST_INI="RV1109TOS_SPI_NOR_TINY.ini"
diff --git a/configs/rv1126-spi-nor-tiny_defconfig b/configs/rv1126-spi-nor-tiny_defconfig
new file mode 100644
index 0000000000..618cb635dc
--- /dev/null
+++ b/configs/rv1126-spi-nor-tiny_defconfig
@@ -0,0 +1,136 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x80000
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh"
+CONFIG_ROCKCHIP_RV1126=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+# CONFIG_SPL_MMC_SUPPORT is not set
+CONFIG_ROCKCHIP_FIT_IMAGE=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+# CONFIG_ROCKCHIP_SMCCC is not set
+CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y
+CONFIG_ROCKCHIP_UART_MUX_SEL_M=2
+CONFIG_LOADER_INI="RV1126MINIALL_SPI_NOR_TINY.ini"
+CONFIG_TRUST_INI="RV1126TOS_SPI_NOR_TINY.ini"
+# CONFIG_GICV2 is not set
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_TARGET_EVB_RV1126=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_DEFAULT_DEVICE_TREE="rv1126-evb"
+CONFIG_DEBUG_UART=y
+# CONFIG_DISTRO_DEFAULTS is not set
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_FIT=y
+CONFIG_FIT_IMAGE_POST_PROCESS=y
+CONFIG_FIT_HW_CRYPTO=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
+CONFIG_SPL_FIT_HW_CRYPTO=y
+CONFIG_SPL_FIT_IMAGE_KB=256
+CONFIG_SPL_FIT_IMAGE_MULTIPLE=1
+# CONFIG_SPL_SYS_DCACHE_OFF is not set
+CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_SPL_BOARD_INIT=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_SPL_SHA256_SUPPORT=y
+CONFIG_SPL_CRYPTO_SUPPORT=y
+CONFIG_SPL_HASH_SUPPORT=y
+CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_MTD_BLK_U_BOOT_OFFS=0x200
+CONFIG_SPL_OPTEE=y
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_CONSOLE is not set
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPT=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+# CONFIG_CMD_ITEST is not set
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_NET is not set
+# CONFIG_CMD_NFS is not set
+# CONFIG_CMD_MISC is not set
+CONFIG_CMD_MTD_BLK=y
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_SPL_DTB_MINIMUM=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_U_BOOT_REMOVE_PROPS="interrupt-parent"
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_DM_CRYPTO=y
+CONFIG_SPL_DM_CRYPTO=y
+# CONFIG_ROCKCHIP_RSA is not set
+# CONFIG_SPL_ROCKCHIP_RSA is not set
+CONFIG_ROCKCHIP_CRYPTO_V2=y
+CONFIG_SPL_ROCKCHIP_CRYPTO_V2=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_ADC_KEY=y
+CONFIG_MISC=y
+CONFIG_SPL_MISC=y
+CONFIG_MISC_DECOMPRESS=y
+CONFIG_SPL_MISC_DECOMPRESS=y
+CONFIG_ROCKCHIP_HW_DECOMPRESS=y
+CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS=y
+CONFIG_SPL_ROCKCHIP_SECURE_OTP_V2=y
+# CONFIG_SPL_DM_MMC is not set
+CONFIG_MTD=y
+CONFIG_MTD_BLK=y
+CONFIG_MTD_DEVICE=y
+CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0x1
+CONFIG_SF_DEFAULT_SPEED=50000000
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPI_FLASH_MTD=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_NANENG_USB2=y
+CONFIG_PINCTRL=y
+CONFIG_DM_PMIC=y
+# CONFIG_SPL_PMIC_CHILDREN is not set
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
+CONFIG_ROCKCHIP_SDRAM_COMMON=y
+CONFIG_DM_RESET=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0xff570000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_ROCKCHIP_SFC=y
+CONFIG_SYSRESET=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
+# CONFIG_EFI_LOADER is not set

commit fb743922bcd4e9030f6f609ce78dbf3f70a00a51
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jul 24 17:46:05 2020 +0800

    spl: mtd_blk: use CONFIG_MTD_BLK_U_BOOT_OFFS as uboot location address
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I7a8e75095e30541947503481e214462b3d543fd0

diff --git a/common/spl/spl_mtd_blk.c b/common/spl/spl_mtd_blk.c
index 0d34836822..6947d1d6bb 100644
--- a/common/spl/spl_mtd_blk.c
+++ b/common/spl/spl_mtd_blk.c
@@ -115,7 +115,7 @@ int spl_mtd_load_image(struct spl_image_info *spl_image,
 	if (IS_ENABLED(CONFIG_SPL_LOAD_FIT)) {
 		header = (struct image_header *)(CONFIG_SYS_TEXT_BASE -
 					 sizeof(struct image_header));
-		ret = blk_dread(desc, CONFIG_SYS_NAND_U_BOOT_OFFS, 1, header);
+		ret = blk_dread(desc, CONFIG_MTD_BLK_U_BOOT_OFFS, 1, header);
 		if (ret != 1)
 			return -ENODEV;
 
@@ -134,7 +134,7 @@ int spl_mtd_load_image(struct spl_image_info *spl_image,
 			load.read = mtd_spl_load_read;
 
 			ret = spl_load_simple_fit(spl_image, &load,
-						  CONFIG_SYS_NAND_U_BOOT_OFFS,
+						  CONFIG_MTD_BLK_U_BOOT_OFFS,
 						  header);
 		}
 	}

commit 3b1ddd14f7777a781bbdd46892c1927fa7adbc68
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jul 24 17:39:17 2020 +0800

    spl: add CONFIG_MTD_BLK_U_BOOT_OFFS
    
    Find the uboot by CONFIG_MTD_BLK_U_BOOT_OFFS address from nand,
    spi nand, nor flash with mtd block interface.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I6032570406a8eda2609ad877785e71c6c8b5df0c

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index e0aa633b37..dc04e528e6 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -465,6 +465,14 @@ config SPL_MTD_SUPPORT
 	  devices. See SPL_NAND_SUPPORT and SPL_ONENAND_SUPPORT for how
 	  to enable specific MTD drivers.
 
+config MTD_BLK_U_BOOT_OFFS
+	hex "Location in MTD block to read U-Boot from"
+	default 0x4000
+	depends on SPL_MTD_SUPPORT
+	help
+	  Set the offset from the start of the nand,spi nand and nor flash where
+	  u-boot should be loaded from.
+
 config SPL_MUSB_NEW_SUPPORT
 	bool "Support new Mentor Graphics USB"
 	help

commit 77827e2e477664358dcf0bf249187a89257aaad8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jul 23 16:54:38 2020 +0800

    rockchip: boot_mode: short the message
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I471943cc4c1598af5d56e95eea010fc3eaef9578

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index bd031fe519..505e9b31d8 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -72,13 +72,13 @@ int rockchip_get_boot_mode(void)
 
 	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {
-		printf("%s: dev_desc is NULL!\n", __func__);
+		printf("dev_desc is NULL!\n");
 		return -ENODEV;
 	}
 
 	ret = part_get_info_by_name(dev_desc, PART_MISC, &part_info);
 	if (ret < 0) {
-		printf("%s: Could not found misc partition\n", __func__);
+		printf("No misc partition\n");
 		goto fallback;
 	}
 

commit 7c3a07ede8f02e0e154589bb55f06aebde897f6f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jul 17 18:03:18 2020 +0800

    lib: lz4_wrapper: fix data-abort due to odd address access
    
    We don't clearly know why there is odd address, maybe the
    compression itself does.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Iabf2c09839485a0b12301ea003f945e1de414d83

diff --git a/lib/lz4_wrapper.c b/lib/lz4_wrapper.c
index eb29c01d24..0e217073e6 100644
--- a/lib/lz4_wrapper.c
+++ b/lib/lz4_wrapper.c
@@ -10,8 +10,8 @@
 #include <linux/types.h>
 
 static u16 LZ4_readLE16(const void *src) { return le16_to_cpu(*(u16 *)src); }
-static void LZ4_copy4(void *dst, const void *src) { *(u32 *)dst = *(u32 *)src; }
-static void LZ4_copy8(void *dst, const void *src) { *(u64 *)dst = *(u64 *)src; }
+static void LZ4_copy4(void *dst, const void *src) { memcpy(dst, src, 4); }
+static void LZ4_copy8(void *dst, const void *src) { memcpy(dst, src, 8); }
 
 typedef  uint8_t BYTE;
 typedef uint16_t U16;

commit 302043d6cf79337d447cb2ad5418c9703645c109
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jul 2 15:57:22 2020 +0800

    configs: rv1126: enable fit image post process
    
    It enables decompress for images.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I90b843b81229dc7fd061a993ff3ae44f4e567077

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index 62de96e25e..f0a216920e 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -21,8 +21,10 @@ CONFIG_SPL_SPI_SUPPORT=y
 CONFIG_DEFAULT_DEVICE_TREE="rv1126-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
+CONFIG_FIT_IMAGE_POST_PROCESS=y
 CONFIG_FIT_HW_CRYPTO=y
 CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
 CONFIG_SPL_FIT_HW_CRYPTO=y
 # CONFIG_SPL_SYS_DCACHE_OFF is not set
 CONFIG_BOOTDELAY=0
@@ -95,7 +97,12 @@ CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y
 CONFIG_RK8XX_PWRKEY=y
 CONFIG_ADC_KEY=y
+CONFIG_MISC=y
 CONFIG_SPL_MISC=y
+CONFIG_MISC_DECOMPRESS=y
+CONFIG_SPL_MISC_DECOMPRESS=y
+CONFIG_ROCKCHIP_HW_DECOMPRESS=y
+CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS=y
 CONFIG_SPL_ROCKCHIP_SECURE_OTP_V2=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y

commit f7a20b126329b88fe7a6fac289d3c057a8b5aca8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 30 17:55:35 2020 +0800

    lib: gunzip: add hw gunzip support
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I52b6d090fdc7d535a4b0804826f5669c068464dc

diff --git a/lib/gunzip.c b/lib/gunzip.c
index 3a5df68de6..b5902a54a4 100644
--- a/lib/gunzip.c
+++ b/lib/gunzip.c
@@ -12,6 +12,7 @@
 #include <image.h>
 #include <malloc.h>
 #include <memalign.h>
+#include <misc.h>
 #include <u-boot/zlib.h>
 #include <div64.h>
 
@@ -77,6 +78,16 @@ int gunzip(void *dst, int dstlen, unsigned char *src, unsigned long *lenp)
 	if (offset < 0)
 		return offset;
 
+#if defined(CONFIG_MISC_DECOMPRESS) && !defined(CONFIG_SPL_BUILD)
+	int ret;
+
+	ret = misc_decompress_process((ulong)dst, (ulong)src, *lenp,
+				      DECOM_GZIP, true, (u64 *)lenp);
+	if (!ret)
+		return 0;
+
+	printf("hw gunzip failed(%d), fallback to soft gunzip\n", ret);
+#endif
 	return zunzip(dst, dstlen, src, lenp, 1, offset);
 }
 

commit 0b61b557de3a9fa411c6ef744b6049905e9c7154
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 30 14:35:06 2020 +0800

    rockchip: weak: support decompress gzip fit image
    
    Implement board_fit_image_post_process() to handle it.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Idc89d88894e115d0b627c411248434848714b53d

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index c6a9265931..045646387b 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -813,19 +813,6 @@ void autoboot_command_fail_handle(void)
 #endif
 }
 
-#ifdef CONFIG_FIT_IMAGE_POST_PROCESS
-void board_fit_image_post_process(void **p_image, size_t *p_size)
-{
-	/* Avoid overriding proccessed(overlay, hw-dtb, ...) kernel dtb */
-#ifdef CONFIG_USING_KERNEL_DTB
-	if (!fdt_check_header(*p_image) && !fdt_check_header(gd->fdt_blob)) {
-		*p_image = (void *)gd->fdt_blob;
-		*p_size = (size_t)fdt_totalsize(gd->fdt_blob);
-	}
-#endif
-}
-#endif
-
 #ifdef CONFIG_FIT_ROLLBACK_PROTECT
 
 #define FIT_ROLLBACK_INDEX_LOCATION	0x66697472	/* "fitr" */
diff --git a/arch/arm/mach-rockchip/weak.c b/arch/arm/mach-rockchip/weak.c
index 01c035e20b..5dafc4f9d2 100644
--- a/arch/arm/mach-rockchip/weak.c
+++ b/arch/arm/mach-rockchip/weak.c
@@ -17,6 +17,71 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #if CONFIG_IS_ENABLED(FIT)
 
+/*
+ * Override __weak board_fit_image_post_process() for SPL & U-Boot proper.
+ */
+#if CONFIG_IS_ENABLED(FIT_IMAGE_POST_PROCESS)
+#if CONFIG_IS_ENABLED(MISC_DECOMPRESS)
+static int fit_hw_gunzip(void *fit, int node, ulong *load_addr,
+			 ulong **src_addr, size_t *src_len)
+{
+	const void *prop;
+	u64 len = *src_len;
+	int ret;
+	u8 comp;
+
+	if (fit_image_get_comp(fit, node, &comp))
+		return 0;
+
+	if (comp != IH_COMP_GZIP)
+		return 0;
+
+#ifndef CONFIG_SPL_BUILD
+	/* handled late in bootm_decomp_image() */
+	if (fit_image_check_type(fit, node, IH_TYPE_KERNEL))
+		return 0;
+#endif
+	ret = misc_decompress_process((ulong)(*load_addr),
+				      (ulong)(*src_addr), (ulong)(*src_len),
+				      DECOM_GZIP, false, &len);
+	if (ret) {
+		printf("%s: decompress error, ret=%d\n",
+		       fdt_get_name(fit, node, NULL), ret);
+		return ret;
+	}
+
+	*src_addr = (ulong *)*load_addr;
+	*src_len = len;
+
+	/* mark for misc_decompress_cleanup() */
+	prop = fdt_getprop(fit, node, "decomp-async", NULL);
+	if (prop)
+		misc_decompress_async(comp);
+	else
+		misc_decompress_sync(comp);
+
+	return 0;
+}
+#endif
+
+void board_fit_image_post_process(void *fit, int node, ulong *load_addr,
+				  ulong **src_addr, size_t *src_len)
+{
+#if CONFIG_IS_ENABLED(ROCKCHIP_HW_DECOMPRESS)
+	fit_hw_gunzip(fit, node, load_addr, src_addr, src_len);
+#endif
+
+#if CONFIG_IS_ENABLED(USING_KERNEL_DTB)
+	/* Avoid overriding processed(overlay, hw-dtb, ...) kernel dtb */
+	if (fit_image_check_type(fit, node, IH_TYPE_FLATDT) &&
+	    !fdt_check_header(gd->fdt_blob)) {
+		*src_addr = (void *)gd->fdt_blob;
+		*src_len = (size_t)fdt_totalsize(gd->fdt_blob);
+	}
+#endif
+}
+#endif /* FIT_IMAGE_POST_PROCESS */
+
 /*
  * Override __weak fit_rollback_index_verify() for SPL & U-Boot proper.
  */

commit a5401a9d61e79e00b89ecd3db4d8e061fd2926de
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 29 18:51:47 2020 +0800

    rockchip: spl/board: cleanup decompress before jumping
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I31a6170e03e2c2faddaf482d0f84dce23a85991e

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index e07876f813..c6a9265931 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -882,4 +882,8 @@ void board_quiesce_devices(void *images)
 		      gd->rollback_index, ret);
 	}
 #endif
+
+#ifdef CONFIG_ROCKCHIP_HW_DECOMPRESS
+	misc_decompress_cleanup();
+#endif
 }
diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index 0b6d22c9fe..5e77f46f08 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -432,5 +432,9 @@ int spl_board_prepare_for_jump(struct spl_image_info *spl_image)
 		      gd->rollback_index, ret);
 	}
 #endif
+
+#ifdef CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS
+	misc_decompress_cleanup();
+#endif
 	return 0;
 }

commit 4484e03e2d11092f20137595b7ef2eacb1e1ad13
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jul 3 17:34:28 2020 +0800

    rockchip: spl: implement spl_kernel_partition()
    
    Get boot or recovery partition according to boot mode.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I5b5806985f166cd37382b1d4df32c9eaf7508c7a

diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index 1a68081622..0b6d22c9fe 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <boot_rkimg.h>
 #include <debug_uart.h>
 #include <dm.h>
 #include <key.h>
@@ -297,6 +298,43 @@ void spl_next_stage(struct spl_image_info *spl)
 }
 #endif
 
+#ifdef CONFIG_SPL_FIT_LOAD_KERNEL
+const char *spl_kernel_partition(struct spl_image_info *spl,
+				 struct spl_load_info *info)
+{
+	struct bootloader_message *bmsg = NULL;
+	u32 boot_mode;
+	int ret, cnt;
+	u32 sector = 0;
+
+#ifdef CONFIG_SPL_LIBDISK_SUPPORT
+	disk_partition_t part_info;
+
+	ret = part_get_info_by_name(info->dev, PART_MISC, &part_info);
+	if (ret >= 0)
+		sector = part_info.start;
+#else
+	sector = CONFIG_SPL_MISC_SECTOR;
+#endif
+	if (sector) {
+		cnt = DIV_ROUND_UP(sizeof(*bmsg), info->bl_len);
+		bmsg = memalign(ARCH_DMA_MINALIGN, cnt * info->bl_len);
+		ret = info->read(info, sector + BCB_MESSAGE_BLK_OFFSET,
+				 cnt, bmsg);
+		if (ret == cnt && !strcmp(bmsg->command, "boot-recovery")) {
+			free(bmsg);
+			return PART_RECOVERY;
+		} else {
+			free(bmsg);
+		}
+	}
+
+	boot_mode = readl((void *)CONFIG_ROCKCHIP_BOOT_MODE_REG);
+
+	return (boot_mode == BOOT_RECOVERY) ? PART_RECOVERY : PART_BOOT;
+}
+#endif
+
 void spl_hang_reset(void)
 {
 	printf("# Reset the board to bootrom #\n");

commit cdf7e9d0ac07850ef153777c179ad3888c1801f2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jul 3 17:33:53 2020 +0800

    rockchip: spl: booting kernel if recovery mode
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I01265310220b6dbdab938c84b743819f799c1502

diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index e99e32ed7a..1a68081622 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -288,6 +288,7 @@ void spl_next_stage(struct spl_image_info *spl)
 	case BOOT_PANIC:
 	case BOOT_WATCHDOG:
 	case BOOT_NORMAL:
+	case BOOT_RECOVERY:
 		spl->next_stage = SPL_NEXT_STAGE_KERNEL;
 		break;
 	default:

commit d3bfb68b0cea76141a6b6334341d8b38dd1f1812
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Jun 28 21:08:34 2020 +0800

    spl: fit: seperate compress and decompress address
    
    Address definition:
            comp = <0x...>: compress image address;
            load = <0x...>: decompress image address;
    
    We default reserve 1MB size for decompress if there is
    no "comp = <0x...>", assuming it's enough for U-Boot,
    tee and atf, etc.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ic82f69551301121f08fba88ff433ad5789859b70

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index c2c20a8d5e..5bb773262c 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -168,7 +168,7 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 	size_t length;
 	int len;
 	ulong size;
-	ulong load_addr, load_ptr;
+	ulong comp_addr, load_addr, load_ptr;
 	void *src;
 	ulong overhead;
 	int nr_sectors;
@@ -187,11 +187,21 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 			puts("Cannot get image type.\n");
 		else
 			debug("%s ", genimg_get_type_name(type));
+	} else {
+		fit_image_get_comp(fit, node, &image_comp);
 	}
 
 	if (fit_image_get_load(fit, node, &load_addr))
 		load_addr = image_info->load_addr;
 
+	if (image_comp != IH_COMP_NONE && image_comp != IH_COMP_ZIMAGE) {
+		/* Empirically, 1MB is enough for U-Boot, tee and atf */
+		if (fit_image_get_comp_addr(fit, node, &comp_addr))
+			comp_addr = load_addr + SZ_1M;
+	} else {
+		comp_addr = load_addr;
+	}
+
 	if (!fit_image_get_data_position(fit, node, &offset)) {
 		external_data = true;
 	} else if (!fit_image_get_data_offset(fit, node, &offset)) {
@@ -204,7 +214,7 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 		if (fit_image_get_data_size(fit, node, &len))
 			return -ENOENT;
 
-		load_ptr = (load_addr + align_len) & ~align_len;
+		load_ptr = (comp_addr + align_len) & ~align_len;
 #if  defined(CONFIG_ARCH_ROCKCHIP)
 		if ((load_ptr < CONFIG_SYS_SDRAM_BASE) ||
 		     (load_ptr >= CONFIG_SYS_SDRAM_BASE + SDRAM_MAX_SIZE))
@@ -235,8 +245,15 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 	}
 
 	/* Check hashes and signature */
-	printf("## Checking %s ... ",
-	       fit_get_name(fit, node, NULL));
+	if (image_comp != IH_COMP_NONE && image_comp != IH_COMP_ZIMAGE)
+		printf("## Checking %s 0x%08lx (%s @0x%08lx) ... ",
+		       fit_get_name(fit, node, NULL), load_addr,
+		       (char *)fdt_getprop(fit, node, FIT_COMP_PROP, NULL),
+		       (long)src);
+	else
+		printf("## Checking %s 0x%08lx ... ",
+		       fit_get_name(fit, node, NULL), load_addr);
+
 #ifdef CONFIG_FIT_SPL_PRINT
 	printf("\n");
 	fit_image_print(fit, node, "");

commit e12dde2d591a3675b4a9dfce14416ae4d72a13f0
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Jun 28 21:08:13 2020 +0800

    spl: fit: support load kernel fit
    
    Support load kernel fit image from boot/recovery partition
    and ignore U-Boot proper if we expect to boot kernel in SPL.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I220c70c784e2327feea591756cbbde97ada8335f

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 53eb62c1ee..c2c20a8d5e 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -6,12 +6,12 @@
  */
 
 #include <common.h>
+#include <boot_rkimg.h>
 #include <errno.h>
 #include <image.h>
 #include <linux/libfdt.h>
 #include <spl.h>
 #include <malloc.h>
-#include <optee_include/OpteeClientInterface.h>
 
 #ifndef CONFIG_SYS_BOOTM_LEN
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)
@@ -395,6 +395,120 @@ static void *spl_fit_load_blob(struct spl_load_info *info,
 	return fit;
 }
 
+#ifdef CONFIG_SPL_FIT_LOAD_KERNEL
+#ifdef CONFIG_SPL_LIBDISK_SUPPORT
+__weak const char *spl_kernel_partition(struct spl_image_info *spl,
+					struct spl_load_info *info)
+{
+	return PART_BOOT;
+}
+#endif
+
+static int spl_load_kernel_fit(struct spl_image_info *spl_image,
+			       struct spl_load_info *info)
+{
+	/*
+	 * Never change the image order.
+	 *
+	 * Considering thunder-boot feature, there maybe asynchronous
+	 * loading operation of these images and ramdisk is usually to
+	 * be the last one.
+	 *
+	 * The .its content rule of kernel fit image follows U-Boot proper.
+	 */
+	const char *images[] = { FIT_FDT_PROP, FIT_KERNEL_PROP, FIT_RAMDISK_PROP, };
+	struct spl_image_info image_info;
+	char fit_header[info->bl_len];
+	int images_noffset;
+	int base_offset;
+	int sector;
+	int node, ret, i;
+	void *fit;
+
+	if (spl_image->next_stage != SPL_NEXT_STAGE_KERNEL)
+		return 0;
+
+#ifdef CONFIG_SPL_LIBDISK_SUPPORT
+	const char *part_name = PART_BOOT;
+	disk_partition_t part_info;
+
+	part_name = spl_kernel_partition(spl_image, info);
+	if (part_get_info_by_name(info->dev, part_name, &part_info) <= 0) {
+		printf("%s: no partition\n", __func__);
+		return -EINVAL;
+	}
+	sector = part_info.start;
+#else
+	sector = CONFIG_SPL_FIT_LOAD_KERNEL_SECTOR;
+#endif
+	if (info->read(info, sector, 1, &fit_header) != 1) {
+		debug("%s: no memory\n", __func__);
+		return -EIO;
+	}
+
+	if (image_get_magic((void *)&fit_header) != FDT_MAGIC) {
+		debug("%s: Not fit magic\n", __func__);
+		return -EINVAL;
+	}
+
+	fit = spl_fit_load_blob(info, sector, fit_header, &base_offset);
+	if (!fit) {
+		debug("%s: Cannot load blob\n", __func__);
+		return -ENODEV;
+	}
+
+	/* verify the configure node by keys, if required */
+#ifdef CONFIG_SPL_FIT_SIGNATURE
+	int conf_noffset;
+
+	conf_noffset = fit_conf_get_node(fit, NULL);
+	if (conf_noffset <= 0) {
+		printf("No default config node\n");
+		return -EINVAL;
+	}
+
+	ret = fit_config_verify(fit, conf_noffset);
+	if (ret) {
+		printf("fit verify configure failed, ret=%d\n", ret);
+		return ret;
+	}
+	printf("\n");
+#endif
+	images_noffset = fdt_path_offset(fit, FIT_IMAGES_PATH);
+	if (images_noffset < 0) {
+		debug("%s: Cannot find /images node: %d\n",
+		      __func__, images_noffset);
+		return images_noffset;
+	}
+
+	for (i = 0; i < ARRAY_SIZE(images); i++) {
+		node = spl_fit_get_image_node(fit, images_noffset,
+					      images[i], 0);
+		if (node < 0) {
+			debug("No image: %s\n", images[i]);
+			continue;
+		}
+
+		ret = spl_load_fit_image(info, sector, fit, base_offset,
+					 node, &image_info);
+		if (ret)
+			return ret;
+
+		/* initial addr or entry point */
+		if (!strcmp(images[i], FIT_FDT_PROP))
+			spl_image->fdt_addr = (void *)image_info.load_addr;
+		else if (!strcmp(images[i], FIT_KERNEL_PROP))
+			spl_image->entry_point_os = image_info.load_addr;
+	}
+
+	debug("entry_point=0x%08lx, entry_point_os=0x%08lx, fdt_addr=0x%08lx\n",
+	      spl_image->entry_point, spl_image->entry_point_os,
+	      (ulong)spl_image->fdt_addr);
+
+	return 0;
+}
+#endif
+
 static int spl_internal_load_simple_fit(struct spl_image_info *spl_image,
 					struct spl_load_info *info,
 					ulong sector, void *fit_header)
@@ -485,6 +599,7 @@ static int spl_internal_load_simple_fit(struct spl_image_info *spl_image,
 				       ret);
 		}
 
+		/* standalone is special one, continue to find others */
 		node = -1;
 	}
 
@@ -549,14 +664,19 @@ static int spl_internal_load_simple_fit(struct spl_image_info *spl_image,
 		if (node < 0)
 			break;
 
+		if (!spl_fit_image_get_os(fit, node, &os_type))
+			debug("Loadable is %s\n", genimg_get_os_name(os_type));
+
+		/* skip U-Boot ? */
+		if (spl_image->next_stage == SPL_NEXT_STAGE_KERNEL &&
+		    os_type == IH_OS_U_BOOT)
+		    continue;
+
 		ret = spl_load_fit_image(info, sector, fit, base_offset, node,
 					 &image_info);
 		if (ret < 0)
 			continue;
 
-		if (!spl_fit_image_get_os(fit, node, &os_type))
-			debug("Loadable is %s\n", genimg_get_os_name(os_type));
-
 		if (os_type == IH_OS_U_BOOT) {
 			spl_fit_append_fdt(&image_info, info, sector,
 					   fit, images, base_offset);
@@ -593,6 +713,7 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 			struct spl_load_info *info, ulong sector, void *fit)
 {
 	ulong sector_offs = sector;
+	int ret = -EINVAL;
 	int i;
 
 	for (i = 0; i < CONFIG_SPL_FIT_IMAGE_MULTIPLE; i++) {
@@ -607,15 +728,20 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 		}
 
 		if (image_get_magic(fit) != FDT_MAGIC) {
-			printf("Bad fit magic\n");
+			printf("Not fit magic\n");
 			continue;
 		}
 
-		if (!spl_internal_load_simple_fit(spl_image, info,
-						  sector_offs, fit))
-			return 0;
+		ret = spl_internal_load_simple_fit(spl_image, info,
+						   sector_offs, fit);
+		if (!ret) {
+#ifdef CONFIG_SPL_FIT_LOAD_KERNEL
+			ret = spl_load_kernel_fit(spl_image, info);
+#endif
+			return ret;
+		}
 	}
 
-	return -EINVAL;
+	return ret;
 }
 
diff --git a/include/spl.h b/include/spl.h
index a453afb53b..9a6a7537cc 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -335,4 +335,12 @@ void spl_perform_fixups(struct spl_image_info *spl_image);
  */
 int spl_board_prepare_for_jump(struct spl_image_info *spl_image);
 
+/**
+ * spl_kernel_partition() - arch/board-specific callback to get kernel partition
+ */
+#ifdef CONFIG_SPL_FIT_LOAD_KERNEL
+const char *spl_kernel_partition(struct spl_image_info *spl,
+				 struct spl_load_info *info);
+#endif
+
 #endif

commit 3d94fb28907b05aa5e417fc8b0433ead52fe31e2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jul 22 17:52:43 2020 +0800

    Kconfig: fit: add options for loading kernel in SPL
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ice46bc2e457bb8d421d9002057ee0f00af229da8

diff --git a/Kconfig b/Kconfig
index 1345a0671c..bb9459593e 100644
--- a/Kconfig
+++ b/Kconfig
@@ -362,6 +362,16 @@ config SPL_SYS_DCACHE_OFF
 	  Disable SPL dcache. Please make sure CONFIG_SPL_SYS_MALLOC_F_LEN
 	  is large enough to malloc TLB and bd_t buffer while enabling dcache.
 
+config SPL_FIT_LOAD_KERNEL
+	bool "Support load kernel FIT in SPL"
+	help
+	  Support load kernel FIT in SPL accordding to platform selection.
+
+config SPL_FIT_LOAD_KERNEL_SECTOR
+	hex "Sector address to load kernel in SPL"
+	depends on !SPL_LIBDISK_SUPPORT && SPL_FIT_LOAD_KERNEL
+	default 0xa000
+
 endif # SPL
 
 endif # FIT
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 783918b7bf..e0aa633b37 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -207,6 +207,11 @@ config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_TYPE
 	  Partition Type on the MMC to load U-Boot from, when the MMC is being
 	  used in raw mode.
 
+config SPL_MISC_SECTOR
+	hex "Sector address to load misc in SPL"
+	depends on !SPL_LIBDISK_SUPPORT && SPL_FIT_LOAD_KERNEL
+	default 0x8000
+
 config SPL_CRC32_SUPPORT
 	bool "Support CRC32"
 	depends on SPL_FIT

commit 569a1737e39d8361c30ebee1109e14596c5f4de1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 23 18:34:51 2020 +0800

    spl: fit: add spl_fit_load_blob()
    
    Move code to a function in order to be shared with other code.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I0d54ea7bb28a54a54eb313cda11c33f4d4564a84

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index e661f0d918..53eb62c1ee 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -347,27 +347,24 @@ __weak int spl_fit_standalone_release(uintptr_t entry_point)
 	return 0;
 }
 
-static int spl_internal_load_simple_fit(struct spl_image_info *spl_image,
-					struct spl_load_info *info,
-					ulong sector, void *fit)
+static void *spl_fit_load_blob(struct spl_load_info *info,
+			       ulong sector, void *fit_header,
+			       int *base_offset)
 {
-	int sectors;
+	int align_len = ARCH_DMA_MINALIGN - 1;
+	ulong count;
 	ulong size;
-	unsigned long count;
-	struct spl_image_info image_info;
-	int node = -1;
-	int images, ret;
-	int base_offset, align_len = ARCH_DMA_MINALIGN - 1;
-	int index = 0;
+	int sectors;
+	void *fit;
 
 	/*
 	 * For FIT with external data, figure out where the external images
 	 * start. This is the base for the data-offset properties in each
 	 * image.
 	 */
-	size = fdt_totalsize(fit);
+	size = fdt_totalsize(fit_header);
 	size = FIT_ALIGN(size);
-	base_offset = FIT_ALIGN(size);
+	*base_offset = FIT_ALIGN(size);
 
 	/*
 	 * So far we only have one block of data from the FIT. Read the entire
@@ -393,7 +390,27 @@ static int spl_internal_load_simple_fit(struct spl_image_info *spl_image,
 	debug("fit read sector %lx, sectors=%d, dst=%p, count=%lu\n",
 	      sector, sectors, fit, count);
 	if (count == 0)
-		return -EIO;
+		return NULL;
+
+	return fit;
+}
+
+static int spl_internal_load_simple_fit(struct spl_image_info *spl_image,
+					struct spl_load_info *info,
+					ulong sector, void *fit_header)
+{
+	struct spl_image_info image_info;
+	int base_offset;
+	int images, ret;
+	int index = 0;
+	int node = -1;
+	void *fit;
+
+	fit = spl_fit_load_blob(info, sector, fit_header, &base_offset);
+	if (!fit) {
+		debug("%s: Cannot load blob\n", __func__);
+		return -1;
+	}
 
 	/* find the node holding the images information */
 	images = fdt_path_offset(fit, FIT_IMAGES_PATH);

commit 8b16d676d3598df9eb92b688af836031d9660924
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 22 16:12:34 2020 +0800

    spl: mmc: always load U-Boot partition
    
    On the view of spl_xxx.c, it only cares about loading
    U-Boot by spl_load_simple_fit().
    
    Other partitions is better to be loaded in the
    spl_load_simple_fit().
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I15625f7ebdb3aaee5491fddabf544951723b00a9

diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c
index eadfda0d41..34b5079c13 100644
--- a/common/spl/spl_mmc.c
+++ b/common/spl/spl_mmc.c
@@ -352,15 +352,8 @@ int spl_mmc_load_image(struct spl_image_info *spl_image,
 				return err;
 		}
 #ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
-		const char *partition_name;
-
-		if (spl_image->next_stage == SPL_NEXT_STAGE_KERNEL)
-			partition_name = PART_BOOT;
-		else
-			partition_name = PART_UBOOT;
-
 		err = mmc_load_image_raw_partition(spl_image, mmc,
-			partition_name,
+			CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_NAME,
 			CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION);
 		if (!err)
 			return err;

commit a2b9279dbb04f6b9462673bc7f241ee900db0425
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jul 2 16:04:14 2020 +0800

    spl: Kconfig: wrap some option by CONFIG_SPL_KERNEL_BOOT
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ia599ec3f94726e490467b5f8bc24199832d62dca

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 2434e9effd..783918b7bf 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -836,6 +836,13 @@ config RKFW_BOOT_SECTOR
         depends on SPL_LOAD_RKFW
         default 0xa000
 
+config SPL_KERNEL_BOOT
+	bool "Enable boot kernel in SPL"
+	depends on SPL
+	help
+	  Enable boot kernel in SPL.
+
+if SPL_KERNEL_BOOT
 config SPL_KERNEL_ADDR
 	hex "Kernel load address in spl"
 	depends on SPL
@@ -889,12 +896,7 @@ config SPL_RAMDISK_DECOM_LIMIT_SIZE
 	help
 	  Define ramdisk maximum decompressible size that prevent
 	  memory overrun.
-
-config SPL_KERNEL_BOOT
-	bool "Enable boot kernel in SPL"
-	depends on SPL
-	help
-	  Enable boot kernel in SPL.
+endif
 
 config TPL
 	bool

commit 1aaaf7ac0ff4ce99a435477814bf71f73e566757
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 30 17:31:35 2020 +0800

    rockchip: dts: rv1126: add "data-cached" property
    
    RV1126 decompress module access data without dcache.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Iee3eb077912e1222fcceab4615f872706cd3d43f

diff --git a/arch/arm/dts/rv1126.dtsi b/arch/arm/dts/rv1126.dtsi
index 851c717a94..586e5e8e77 100644
--- a/arch/arm/dts/rv1126.dtsi
+++ b/arch/arm/dts/rv1126.dtsi
@@ -1317,6 +1317,7 @@
 		interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru ACLK_DECOM>, <&cru DCLK_DECOM>, <&cru PCLK_DECOM>;
 		clock-names = "aclk", "dclk", "pclk";
+		data-cached = <0>;
 		status = "disabled";
 	};
 

commit 8b225c61c298a033568611cd1e0a2973adedb799
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 30 17:27:14 2020 +0800

    misc: rockchip_decompress: add dcache flush
    
    If the decompress module doesn't access the data through dcache,
    it should add flush behavior to promise getting the real data
    from dram. Otherwise it may decompress the wrong data but not
    report any failure.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I6570ca7dc3a60c4b5bb9fcf3ae9f1025e2c658ea

diff --git a/drivers/misc/rockchip_decompress.c b/drivers/misc/rockchip_decompress.c
index 40a938b36b..9571ea38d5 100644
--- a/drivers/misc/rockchip_decompress.c
+++ b/drivers/misc/rockchip_decompress.c
@@ -84,6 +84,7 @@ struct rockchip_decom_priv {
 	unsigned long soft_reset_base;
 	bool idle_check_once;
 	bool done;
+	int cached; /* 1: access the data through dcache; 0: no dcache */
 };
 
 static int rockchip_decom_start(struct udevice *dev, void *buf)
@@ -92,6 +93,29 @@ static int rockchip_decom_start(struct udevice *dev, void *buf)
 	struct decom_param *param = (struct decom_param *)buf;
 	unsigned int limit_lo = param->size_src & 0xffffffff;
 	unsigned int limit_hi = param->size_src >> 32;
+	ulong align_input, align_len;
+
+	if (!priv->cached) {
+		/* src: make sure we get the real compressed data from ddr */
+		align_input =
+		     round_down(param->addr_src, CONFIG_SYS_CACHELINE_SIZE);
+		align_len =
+		     round_up(param->size_src + (param->addr_src - align_input),
+			      CONFIG_SYS_CACHELINE_SIZE);
+		flush_cache(align_input, align_len);
+
+		/*
+		 * dst: actually we prefer to invalidate dcache after decompress
+		 * done, but it seems there is not cache invalidate API for us.
+		 * so let's flush this area.
+		 */
+		align_input =
+		     round_down(param->addr_dst, CONFIG_SYS_CACHELINE_SIZE);
+		align_len =
+		     round_up(param->size_src + (param->addr_dst - align_input),
+			      CONFIG_SYS_CACHELINE_SIZE);
+		flush_cache(align_input, align_len);
+	}
 
 	priv->done = false;
 
@@ -208,6 +232,7 @@ static int rockchip_decom_ofdata_to_platdata(struct udevice *dev)
 	if (!priv->base)
 		return -ENOENT;
 
+	priv->cached = dev_read_u32_default(dev, "data-cached", 0);
 	priv->soft_reset_base = dev_read_u32_default(dev, "soft-reset-addr", 0)
 					& 0xffffffff;
 

commit adf6937910fc088580e74abcfe21b2a82f4fdc57
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 29 18:49:28 2020 +0800

    misc: rockchip decompress: remove IRQ support
    
    SPL don't support IRQ and U-Boot proper is not deeply care
    about boot time. There is not a mechanism to support IRQ
    mode now.
    
    In addition, the decompress irq is design to catch the exceptions
    but not to decompress images continuously.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I842bce530aa180d5b0a30c1d2038575e464241b8

diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index a4382549d8..876defa8d3 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -80,14 +80,14 @@ config ROCKCHIP_OTP
 
 config ROCKCHIP_HW_DECOMPRESS
 	bool "Rockchip HardWare Decompress Support"
-	depends on MISC && IRQ
+	depends on MISC_DECOMPRESS
 	help
 	  This driver support Decompress IP built-in Rockchip SoC, support
 	  LZ4, GZIP, PNG, ZLIB.
 
 config SPL_ROCKCHIP_HW_DECOMPRESS
 	bool "Rockchip HardWare Decompress Support"
-	depends on SPL_MISC
+	depends on SPL_MISC_DECOMPRESS
 	help
 	  This driver support Decompress IP built-in Rockchip SoC, support
 	  LZ4, GZIP, PNG, ZLIB.
diff --git a/drivers/misc/rockchip_decompress.c b/drivers/misc/rockchip_decompress.c
index a7e3b3a1d2..40a938b36b 100644
--- a/drivers/misc/rockchip_decompress.c
+++ b/drivers/misc/rockchip_decompress.c
@@ -116,10 +116,6 @@ static int rockchip_decom_start(struct udevice *dev, void *buf)
 
 	writel(limit_lo, priv->base + DECOM_LMTSL);
 	writel(limit_hi, priv->base + DECOM_LMTSH);
-
-#ifdef CONFIG_IRQ
-	writel(DECOM_INT_MASK, priv->base + DECOM_IEN);
-#endif
 	writel(DECOM_ENABLE, priv->base + DECOM_ENR);
 
 	priv->idle_check_once = true;
@@ -130,14 +126,7 @@ static int rockchip_decom_start(struct udevice *dev, void *buf)
 static int rockchip_decom_stop(struct udevice *dev)
 {
 	struct rockchip_decom_priv *priv = dev_get_priv(dev);
-#ifdef CONFIG_IRQ
-	int irq_status;
-
-	irq_status = readl(priv->base + DECOM_ISR);
-	/* clear interrupts */
-	if (irq_status)
-		writel(irq_status, priv->base + DECOM_ISR);
-#endif
+
 	writel(DECOM_DISABLE, priv->base + DECOM_ENR);
 
 	return 0;
@@ -225,40 +214,8 @@ static int rockchip_decom_ofdata_to_platdata(struct udevice *dev)
 	return 0;
 }
 
-#ifndef CONFIG_SPL_BUILD
-static void rockchip_decom_irqhandler(int irq, void *data)
-{
-	struct udevice *dev = data;
-	struct rockchip_decom_priv *priv = dev_get_priv(dev);
-	int irq_status;
-	int decom_status;
-
-	irq_status = readl(priv->base + DECOM_ISR);
-	/* clear interrupts */
-	writel(irq_status, priv->base + DECOM_ISR);
-	if (irq_status & DECOM_STOP) {
-		decom_status = readl(priv->base + DECOM_STAT);
-		if (decom_status & DECOM_COMPLETE) {
-			priv->done = true;
-			/*
-			 * TODO:
-			 * Inform someone that decompress completed
-			 */
-			printf("decom completed\n");
-		} else {
-			printf("decom failed, irq_status = 0x%x, decom_status = 0x%x\n",
-			       irq_status, decom_status);
-		}
-	}
-}
-#endif
-
 static int rockchip_decom_probe(struct udevice *dev)
 {
-#ifndef CONFIG_SPL_BUILD
-	irq_install_handler(DECOM_IRQ, rockchip_decom_irqhandler, dev);
-	irq_handler_enable(DECOM_IRQ);
-#endif
 	return 0;
 }
 

commit 656bdb598ae7fe182050b4f584850f7520d0d0d3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 22 16:09:57 2020 +0800

    misc: decompress: add/update API
    
    - Support get gunzip data size from src data;
    - Support sync decompress for this round;
    - Support return the gunzip data size of compressed image.
    - Add misc_decompress_cleanup() for waiting last decompress done.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ie84b2a6174d04592110333d66667da66f98f07f6

diff --git a/drivers/misc/misc_decompress.c b/drivers/misc/misc_decompress.c
index 2e065a053a..6188135846 100644
--- a/drivers/misc/misc_decompress.c
+++ b/drivers/misc/misc_decompress.c
@@ -4,8 +4,9 @@
  */
 #include <common.h>
 #include <dm.h>
-#include <dm/uclass.h>
 #include <misc.h>
+#include <dm/uclass.h>
+#include <dm/uclass-internal.h>
 
 #define HEAD_CRC		2
 #define EXTRA_FIELD		4
@@ -14,6 +15,26 @@
 #define RESERVED		0xe0
 #define DEFLATED		8
 
+static u32 misc_decomp_async, misc_decomp_sync;
+
+static void decomp_set_flags(u32 *flags, u8 comp)
+{
+	if (comp == IH_COMP_GZIP)
+		*flags |= DECOM_GZIP;
+	else if (comp == IH_COMP_LZ4)
+		*flags |= DECOM_LZ4;
+}
+
+void misc_decompress_async(u8 comp)
+{
+	decomp_set_flags(&misc_decomp_async, comp);
+}
+
+void misc_decompress_sync(u8 comp)
+{
+	decomp_set_flags(&misc_decomp_sync, comp);
+}
+
 static int misc_gzip_parse_header(const unsigned char *src, unsigned long len)
 {
 	int i, flags;
@@ -42,19 +63,26 @@ static int misc_gzip_parse_header(const unsigned char *src, unsigned long len)
 	return i;
 }
 
+static u32 misc_get_data_size(unsigned long src, unsigned long len, u32 cap)
+{
+	if (cap == DECOM_GZIP)
+		return *(u32 *)(src + len - 4);
+
+	return 0;
+}
+
 struct udevice *misc_decompress_get_device(u32 capability)
 {
 	return misc_get_device_by_capability(capability);
 }
 
-int misc_decompress_start(struct udevice *dev, unsigned long src,
-			  unsigned long dst, unsigned long size)
+int misc_decompress_start(struct udevice *dev, unsigned long dst,
+			  unsigned long src, unsigned long src_len)
 {
 	struct decom_param param;
 
 	param.addr_dst = dst;
 	param.addr_src = src;
-	param.size = size;
 	if (misc_gzip_parse_header((unsigned char *)src, 0xffff) > 0) {
 		param.mode = DECOM_GZIP;
 	} else {
@@ -62,6 +90,10 @@ int misc_decompress_start(struct udevice *dev, unsigned long src,
 		return -EPERM;
 	}
 
+	param.size_src = misc_get_data_size(src, src_len, param.mode);
+	if (!param.size_src)
+		return -EINVAL;
+
 	return misc_ioctl(dev, IOCTL_REQ_START, &param);
 }
 
@@ -78,18 +110,24 @@ bool misc_decompress_is_complete(struct udevice *dev)
 		return true;
 }
 
-int misc_decompress_process(unsigned long src,
-			    unsigned long dst,
-			    unsigned long limit_size,
-			    u32 cap)
+int misc_decompress_data_size(struct udevice *dev, u64 *size, u32 cap)
 {
-	struct udevice *dev;
-	int timeout = 10000;
+	struct decom_param param;
 	int ret;
 
-	dev = misc_decompress_get_device(cap);
-	if (!dev)
-		return -EIO;
+	param.mode = cap;
+	param.size_dst = 0; /* clear */
+
+	ret = misc_ioctl(dev, IOCTL_REQ_DATA_SIZE, &param);
+	if (!ret)
+		*size = param.size_dst;
+
+	return ret;
+}
+
+static int misc_decompress_finish(struct udevice *dev, u32 cap)
+{
+	int timeout = 10000;
 
 	while (!misc_decompress_is_complete(dev)) {
 		if (timeout < 0)
@@ -98,9 +136,82 @@ int misc_decompress_process(unsigned long src,
 		udelay(10);
 	}
 
-	ret = misc_decompress_stop(dev);
+	return misc_decompress_stop(dev);
+}
+
+int misc_decompress_cleanup(void)
+{
+	const struct misc_ops *ops;
+	struct udevice *dev;
+	struct uclass *uc;
+	int ret;
+	u32 cap;
+
+	ret = uclass_get(UCLASS_MISC, &uc);
+	if (ret)
+		return 0;
+
+	/* use "find_" */
+	for (uclass_find_first_device(UCLASS_MISC, &dev);
+	     dev;
+	     uclass_find_next_device(&dev)) {
+		ops = device_get_ops(dev);
+		if (!ops || !ops->ioctl)
+			continue;
+		else if (ops->ioctl(dev, IOCTL_REQ_CAPABILITY, &cap))
+			continue;
+		else if (misc_decomp_async & cap)
+			continue;
+
+		if (misc_decomp_sync & cap) {
+			ret = ops->ioctl(dev, IOCTL_REQ_STOP, NULL);
+			if (ret) {
+				printf("Failed to stop decompress: %s, ret=%d\n",
+				       dev->name, ret);
+				return ret;
+			}
+		}
+	}
+
+	return 0;
+}
+
+int misc_decompress_process(unsigned long dst, unsigned long src,
+			    unsigned long src_len, u32 cap, bool sync,
+			    u64 *size)
+{
+	struct udevice *dev;
+	int ret;
+
+	dev = misc_decompress_get_device(cap);
+	if (!dev)
+		return -ENODEV;
+
+	/* Wait last finish */
+	ret = misc_decompress_finish(dev, cap);
+	if (ret)
+		return ret;
+
+	ret = misc_decompress_start(dev, dst, src, src_len);
 	if (ret)
-		return -EIO;
+		return ret;
+
+	/*
+	 * Wait this round finish ?
+	 *
+	 * If sync, return original data length after decompress done.
+	 * otherwise return from compressed file information.
+	 */
+	if (sync) {
+		ret = misc_decompress_finish(dev, cap);
+		if (ret)
+			return ret;
+		if (size)
+			ret = misc_decompress_data_size(dev, size, cap);
+	} else {
+		if (size)
+			*size = misc_get_data_size(src, src_len, cap);
+	}
 
-	return misc_decompress_start(dev, src, dst, limit_size);
+	return ret;
 }
diff --git a/drivers/misc/rockchip_decompress.c b/drivers/misc/rockchip_decompress.c
index fb6934aa32..a7e3b3a1d2 100644
--- a/drivers/misc/rockchip_decompress.c
+++ b/drivers/misc/rockchip_decompress.c
@@ -90,8 +90,8 @@ static int rockchip_decom_start(struct udevice *dev, void *buf)
 {
 	struct rockchip_decom_priv *priv = dev_get_priv(dev);
 	struct decom_param *param = (struct decom_param *)buf;
-	unsigned int limit_lo = param->size & 0xffffffff;
-	unsigned int limit_hi = param->size >> 32;
+	unsigned int limit_lo = param->size_src & 0xffffffff;
+	unsigned int limit_hi = param->size_src >> 32;
 
 	priv->done = false;
 
@@ -102,13 +102,12 @@ static int rockchip_decom_start(struct udevice *dev, void *buf)
 		writel(LZ4_CONT_CSUM_CHECK_EN |
 		       LZ4_HEAD_CSUM_CHECK_EN |
 		       LZ4_BLOCK_CSUM_CHECK_EN |
-		       DECOM_LZ4_MODE, priv->base + DECOM_CTRL);
-
-	if (param->mode == DECOM_GZIP)
+		       DECOM_LZ4_MODE,
+		       priv->base + DECOM_CTRL);
+	else if (param->mode == DECOM_GZIP)
 		writel(DECOM_DEFLATE_MODE | DECOM_GZIP_MODE,
 		       priv->base + DECOM_CTRL);
-
-	if (param->mode == DECOM_ZLIB)
+	else if (param->mode == DECOM_ZLIB)
 		writel(DECOM_DEFLATE_MODE | DECOM_ZLIB_MODE,
 		       priv->base + DECOM_CTRL);
 
@@ -118,8 +117,11 @@ static int rockchip_decom_start(struct udevice *dev, void *buf)
 	writel(limit_lo, priv->base + DECOM_LMTSL);
 	writel(limit_hi, priv->base + DECOM_LMTSH);
 
+#ifdef CONFIG_IRQ
 	writel(DECOM_INT_MASK, priv->base + DECOM_IEN);
+#endif
 	writel(DECOM_ENABLE, priv->base + DECOM_ENR);
+
 	priv->idle_check_once = true;
 
 	return 0;
@@ -128,13 +130,14 @@ static int rockchip_decom_start(struct udevice *dev, void *buf)
 static int rockchip_decom_stop(struct udevice *dev)
 {
 	struct rockchip_decom_priv *priv = dev_get_priv(dev);
+#ifdef CONFIG_IRQ
 	int irq_status;
 
 	irq_status = readl(priv->base + DECOM_ISR);
 	/* clear interrupts */
 	if (irq_status)
 		writel(irq_status, priv->base + DECOM_ISR);
-
+#endif
 	writel(DECOM_DISABLE, priv->base + DECOM_ENR);
 
 	return 0;
@@ -161,6 +164,19 @@ static int rockchip_decom_capability(u32 *buf)
 	return 0;
 }
 
+static int rockchip_decom_data_size(struct udevice *dev, u64 *buf)
+{
+	struct rockchip_decom_priv *priv = dev_get_priv(dev);
+	struct decom_param *param = (struct decom_param *)buf;
+	u32 sizel, sizeh;
+
+	sizel = readl(priv->base + DECOM_TSIZEL);
+	sizeh = readl(priv->base + DECOM_TSIZEH);
+	param->size_dst = sizel | ((u64)sizeh << 32);
+
+	return 0;
+}
+
 /* Caller must fill in param @buf which represent struct decom_param */
 static int rockchip_decom_ioctl(struct udevice *dev, unsigned long request,
 				void *buf)
@@ -180,6 +196,12 @@ static int rockchip_decom_ioctl(struct udevice *dev, unsigned long request,
 	case IOCTL_REQ_CAPABILITY:
 		ret = rockchip_decom_capability(buf);
 		break;
+	case IOCTL_REQ_DATA_SIZE:
+		ret = rockchip_decom_data_size(dev, buf);
+		break;
+	default:
+		printf("Unsupported ioctl: %ld\n", (ulong)request);
+		break;
 	}
 
 	return ret;
diff --git a/include/misc.h b/include/misc.h
index 29e800c341..ac91fc09da 100644
--- a/include/misc.h
+++ b/include/misc.h
@@ -16,6 +16,7 @@
 #define IOCTL_REQ_STOP		_IO('m', 0x02)
 #define IOCTL_REQ_POLL		_IO('m', 0x03)
 #define IOCTL_REQ_CAPABILITY	_IO('m', 0x04)
+#define IOCTL_REQ_DATA_SIZE	_IO('m', 0x05)
 
 enum misc_mode {
 	DECOM_LZ4	= BIT(0),
@@ -149,7 +150,8 @@ int misc_otp_write(struct udevice *dev, int offset, const void *buf, int size);
 struct decom_param {
 	unsigned long addr_src;
 	unsigned long addr_dst;
-	u64 size;
+	u64 size_src;
+	u64 size_dst;	/* to be filled for output */
 	enum misc_mode mode;
 };
 
@@ -158,9 +160,11 @@ int misc_decompress_start(struct udevice *dev, unsigned long src,
 			  unsigned long dst, unsigned long size);
 int misc_decompress_stop(struct udevice *dev);
 bool misc_decompress_is_complete(struct udevice *dev);
-int misc_decompress_process(unsigned long src,
-			    unsigned long dst,
-			    unsigned long limit_size,
-			    u32 cap);
 
+void misc_decompress_async(u8 comp);
+void misc_decompress_sync(u8 comp);
+int misc_decompress_cleanup(void);
+int misc_decompress_process(unsigned long dst, unsigned long src,
+			    unsigned long src_len, u32 cap, bool sync,
+			    u64 *size);
 #endif	/* _MISC_H_ */

commit 01b57c060011da5c50081d1581f68c9e1aa00c5f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jul 2 12:01:12 2020 +0800

    misc: decompress: add Kconfig option
    
    It's used for other generic code.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I925c89d77165d781f9eff3c609eb06e2a1895a3e

diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 4777495e15..a4382549d8 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -31,6 +31,18 @@ config TPL_MISC
 	  set of generic read, write and ioctl methods may be used to
 	  access the device.
 
+config MISC_DECOMPRESS
+	bool "Enable misc decompress driver support"
+	depends on MISC
+	help
+	  Enable misc decompress driver support.
+
+config SPL_MISC_DECOMPRESS
+	bool "Enable misc decompress driver support in SPL"
+	depends on SPL_MISC
+	help
+	  Enable misc decompress driver support in spl.
+
 config ALTERA_SYSID
 	bool "Altera Sysid support"
 	depends on MISC
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 5ecc1032c9..2ff2e137e8 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -5,7 +5,8 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
 
-obj-$(CONFIG_$(SPL_TPL_)MISC) += misc-uclass.o misc_decompress.o misc_otp.o
+obj-$(CONFIG_$(SPL_TPL_)MISC) += misc-uclass.o misc_otp.o
+obj-$(CONFIG_$(SPL_TPL_)MISC_DECOMPRESS) += misc_decompress.o
 obj-$(CONFIG_ALI152X) += ali512x.o
 obj-$(CONFIG_ALTERA_SYSID) += altera_sysid.o
 obj-$(CONFIG_ATSHA204A) += atsha204a-i2c.o

commit 9c63328889698a57b7e3a18aa8788ca6494af3b5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 22 16:29:31 2020 +0800

    common: fit: update board_fit_image_post_process() args
    
    Add more args for the function to parse more fit information.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I9be6607e5f7eb9b9912eb570f765dc6f634f956e

diff --git a/common/image-fit.c b/common/image-fit.c
index 950d428b83..7f2c3089e7 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -2168,8 +2168,13 @@ int fit_image_load_index(bootm_headers_t *images, ulong addr,
 	}
 
 #if !defined(USE_HOSTCC) && defined(CONFIG_FIT_IMAGE_POST_PROCESS)
+	ret = fit_image_get_load(fit, noffset, &load);
+	if (ret < 0)
+		return ret;
+
 	/* perform any post-processing on the image data */
-	board_fit_image_post_process((void **)&buf, &size);
+	board_fit_image_post_process((void *)fit, noffset,
+				     &load, (ulong **)&buf, &size);
 #endif
 
 	len = (ulong)size;
diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 270bfe6894..e661f0d918 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -247,7 +247,8 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 	puts("OK\n");
 
 #ifdef CONFIG_SPL_FIT_IMAGE_POST_PROCESS
-	board_fit_image_post_process(&src, &length);
+	board_fit_image_post_process(fit, node, (ulong *)&load_addr,
+				     (ulong **)&src, &length);
 #endif
 
 	if (IS_ENABLED(CONFIG_SPL_OS_BOOT)	&&
diff --git a/include/image.h b/include/image.h
index a789730c46..24d9c977e0 100644
--- a/include/image.h
+++ b/include/image.h
@@ -1413,11 +1413,16 @@ int board_fit_config_name_match(const char *name);
  * into the FIT creation (i.e. the binary blobs would have been pre-processed
  * before being added to the FIT image).
  *
+ * @fit: fit blob
  * @image: pointer to the image start pointer
+ * @load_addr: load address pointer to image(Uncompressed)
+ * @src_addr: source address pointer to image(Compressed maybe)
  * @size: pointer to the image size
  * @return no return value (failure should be handled internally)
  */
-void board_fit_image_post_process(void **p_image, size_t *p_size);
+void board_fit_image_post_process(void *fit, int node, ulong *load_addr,
+				  ulong **src_addr, size_t *size);
+
 #endif /* CONFIG_SPL_FIT_IMAGE_POST_PROCESS */
 
 #define FDT_ERROR	((ulong)(-1))

commit 7385816b5a4ca0976f9d9100ca3ef7bf43eec7cf
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Jun 28 21:02:23 2020 +0800

    common: fit: add fit_image_get_comp_addr()
    
    Add API to get compress address of image.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Id33d96795d5bb5db8d55a537f7d1c7a425b5b3e8

diff --git a/common/image-fit.c b/common/image-fit.c
index 3ebaf53d0d..950d428b83 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -785,6 +785,24 @@ int fit_image_get_load(const void *fit, int noffset, ulong *load)
 	return fit_image_get_address(fit, noffset, FIT_LOAD_PROP, load);
 }
 
+/**
+ * fit_image_get_comp_addr() - get compress addr property for given component image node
+ * @fit: pointer to the FIT format image header
+ * @noffset: component image node offset
+ * @comp: pointer to the uint32_t, will hold load address
+ *
+ * fit_image_get_comp_addr() finds compress address property in a given component
+ * image node. If the property is found, its value is returned to the caller.
+ *
+ * returns:
+ *     0, on success
+ *     -1, on failure
+ */
+int fit_image_get_comp_addr(const void *fit, int noffset, ulong *comp)
+{
+	return fit_image_get_address(fit, noffset, FIT_COMP_ADDR_PROP, comp);
+}
+
 /**
  * fit_image_set_load() - set load addr property for given component image node
  * @fit: pointer to the FIT format image header
diff --git a/include/image.h b/include/image.h
index d168de21e4..a789730c46 100644
--- a/include/image.h
+++ b/include/image.h
@@ -927,6 +927,7 @@ int bootz_setup(ulong image, ulong *start, ulong *end);
 #define FIT_TYPE_PROP		"type"
 #define FIT_OS_PROP		"os"
 #define FIT_COMP_PROP		"compression"
+#define FIT_COMP_ADDR_PROP	"comp"
 #define FIT_ENTRY_PROP		"entry"
 #define FIT_LOAD_PROP		"load"
 #define FIT_ROLLBACK_PROP	"rollback-index"
@@ -1012,6 +1013,7 @@ int fit_image_get_type(const void *fit, int noffset, uint8_t *type);
 int fit_image_get_comp(const void *fit, int noffset, uint8_t *comp);
 int fit_image_get_load(const void *fit, int noffset, ulong *load);
 int fit_image_get_entry(const void *fit, int noffset, ulong *entry);
+int fit_image_get_comp_addr(const void *fit, int noffset, ulong *comp);
 int fit_image_set_load(const void *fit, int noffset, ulong load);
 int fit_image_set_entry(const void *fit, int noffset, ulong entry);
 int fit_image_get_data(const void *fit, int noffset,

commit a91da5984bc87cd16567180e55146483ea4cfaa4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jul 24 11:00:00 2020 +0800

    input: rk8xx: always enable key interrupt
    
    We use it to exit charge animation while system is in runtime.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ia6bc3f7a20310f73e060418f0a0ab01ef8745b11

diff --git a/drivers/input/rk8xx_pwrkey.c b/drivers/input/rk8xx_pwrkey.c
index c53277d708..1a91d71576 100644
--- a/drivers/input/rk8xx_pwrkey.c
+++ b/drivers/input/rk8xx_pwrkey.c
@@ -63,8 +63,8 @@ static int rk8xx_pwrkey_probe(struct udevice *dev)
 
 	irq_install_handler(fall_irq, rk8xx_pwron_fall_handler, dev);
 	irq_install_handler(rise_irq, rk8xx_pwron_rise_handler, dev);
-	irq_handler_enable_suspend_only(fall_irq);
-	irq_handler_enable_suspend_only(rise_irq);
+	irq_handler_enable(fall_irq);
+	irq_handler_enable(rise_irq);
 
 	return 0;
 }

commit 8e2ab48b12d121f1ce72daf2668b323e1d549829
Author: Zain Wang <wzz@rock-chips.com>
Date:   Thu Jul 16 14:24:48 2020 +0800

    rockchip: rkcommon: extend rk3328 spl size
    
    The image signed would grow 2K size than before.
    
    Signed-off-by: Zain Wang <wzz@rock-chips.com>
    Change-Id: I1b02a7117a41cc3b599c1fdd12bd69dccdcdca6a

diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index b4b0021146..220c699ab4 100644
--- a/tools/rkcommon.c
+++ b/tools/rkcommon.c
@@ -73,7 +73,7 @@ static struct spl_info spl_infos[] = {
 	{ "rk322x", "RK32", 0x8000 - 0x1000, false },
 	{ "rk3288", "RK32", 0x8000, false },
 	{ "rk3308", "RK33", 0x40000 - 0x1000, false},
-	{ "rk3328", "RK32", 0x8000 - 0x1000, false },
+	{ "rk3328", "RK32", 0x8000 - 0x800, false },
 	{ "rk3368", "RK33", 0x8000 - 0x1000, false },
 	{ "rk3399", "RK33", 0x30000 - 0x2000, false },
 	{ "px30", "RK33", 0x2800, false },

commit cd694b63d4d6c168472d518dd438d1ac449f7156
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Tue Jul 21 16:47:52 2020 +0800

    cmd: crypto: drop RSA test when rsa driver not compiled
    
    Change-Id: Iad42b1f35e3029a97158a1b16e7ca86f3c6e4b5f
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/cmd/crypto.c b/cmd/crypto.c
index 674e6e5943..f99d015208 100644
--- a/cmd/crypto.c
+++ b/cmd/crypto.c
@@ -90,6 +90,8 @@ __cacheline_aligned static u8 foo_data[] = {
 	0x20, 0x3b, 0x4e, 0x64, 0xff, 0xff, 0xff, 0xff,
 };
 
+#if CONFIG_IS_ENABLED(ROCKCHIP_RSA)
+
 static u8 rsa2048_n[] = {
 	0xd5, 0xf2, 0xfc, 0xbb, 0x1a, 0x39, 0x61, 0xf5, 0x63, 0x7f, 0xa6, 0xeb,
 	0x5d, 0xc5, 0x22, 0xe2, 0x65, 0x03, 0xcc, 0x61, 0x92, 0x60, 0x4c, 0x5f,
@@ -193,6 +195,8 @@ static u8 rsa2048_sha256_sign[] = {
 	0x19, 0x9a, 0x1d, 0x32,
 };
 
+#endif
+
 static void dump_hash(const char *title, void *hard_d, void *soft_d, u32 nbits)
 {
 	int i, same;
@@ -278,7 +282,6 @@ static int do_crypto(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	sha1_context sha1_ctx;
 	sha256_context sha256_ctx;
 	sha512_context sha512_ctx;
-	rsa_key rsa_key;
 	u8 hard_out[256];
 	u8 soft_out[64];
 	u32 cap;
@@ -360,8 +363,11 @@ static int do_crypto(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 			  crypto_algo_nbits(csha_ctx.algo));
 	}
 
+#if CONFIG_IS_ENABLED(ROCKCHIP_RSA)
 	/* RSA2048-SHA256 */
 	if (cap & CRYPTO_RSA2048) {
+		rsa_key rsa_key;
+
 		memset(&rsa_key, 0x00, sizeof(rsa_key));
 		rsa_key.algo = CRYPTO_RSA2048;
 		rsa_key.n = (u32 *)&rsa2048_n;
@@ -378,6 +384,7 @@ static int do_crypto(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 		dump_hash("RSA2048-SHA256", hard_out,
 			  soft_out, crypto_algo_nbits(csha_ctx.algo));
 	}
+#endif
 
 	/* TRNG */
 	if (cap & CRYPTO_TRNG) {

commit 864e581c2239f4283010e8eb998bd2f1406037dc
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Tue Jul 21 16:41:55 2020 +0800

    crypto: rockchip: add ROCKCHIP_RSA and SPL_ROCKCHIP_RSA config
    
    use ROCKCHIP_RSA to enable RSA in uboot.
    use SPL_ROCKCHIP_RSA to enable RSA in spl.
    
    Change-Id: I1c3ae3754e9dbdfe39c81b554387fe78451a9fa2
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/drivers/crypto/rockchip/Kconfig b/drivers/crypto/rockchip/Kconfig
index 4057502b41..752a50e7df 100644
--- a/drivers/crypto/rockchip/Kconfig
+++ b/drivers/crypto/rockchip/Kconfig
@@ -1,3 +1,19 @@
+config ROCKCHIP_RSA
+	bool "Enable rockchip RSA support"
+	depends on ROCKCHIP_CRYPTO_V1 || ROCKCHIP_CRYPTO_V2
+	default y
+	help
+	  This enable RSA512/RSA1024/RSA2048 algorithm support for
+	  rockchip crypto module.
+
+config SPL_ROCKCHIP_RSA
+	bool "Enable rockchip RSA support in spl"
+	depends on SPL_ROCKCHIP_CRYPTO_V1 || SPL_ROCKCHIP_CRYPTO_V2
+	default y
+	help
+	  This enable RSA512/RSA1024/RSA2048 algorithm support for
+	  rockchip crypto module.
+
 config ROCKCHIP_CRYPTO_V1
 	bool "Enable rockchip crypto v1 support"
 	depends on DM_CRYPTO
diff --git a/drivers/crypto/rockchip/Makefile b/drivers/crypto/rockchip/Makefile
index 99e9c71394..d47e68a84f 100644
--- a/drivers/crypto/rockchip/Makefile
+++ b/drivers/crypto/rockchip/Makefile
@@ -5,4 +5,8 @@
 #
 
 obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_CRYPTO_V1) += crypto_v1.o
-obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_CRYPTO_V2) += crypto_v2.o crypto_v2_pka.o crypto_v2_util.o
+obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_CRYPTO_V2) += crypto_v2.o
+
+ifeq ($(CONFIG_$(SPL_TPL_)ROCKCHIP_CRYPTO_V2)$(CONFIG_$(SPL_TPL_)ROCKCHIP_RSA), yy)
+obj-y += crypto_v2_pka.o crypto_v2_util.o
+endif
\ No newline at end of file
diff --git a/drivers/crypto/rockchip/crypto_v1.c b/drivers/crypto/rockchip/crypto_v1.c
index a4524d015e..8a94299d2a 100644
--- a/drivers/crypto/rockchip/crypto_v1.c
+++ b/drivers/crypto/rockchip/crypto_v1.c
@@ -162,6 +162,7 @@ static int rockchip_crypto_sha_final(struct udevice *dev,
 	return 0;
 }
 
+#if CONFIG_IS_ENABLED(ROCKCHIP_RSA)
 static int rockchip_crypto_rsa_verify(struct udevice *dev, rsa_key *ctx,
 				      u8 *sign, u8 *output)
 {
@@ -213,7 +214,13 @@ static int rockchip_crypto_rsa_verify(struct udevice *dev, rsa_key *ctx,
 
 	return 0;
 }
-
+#else
+static int rockchip_crypto_rsa_verify(struct udevice *dev, rsa_key *ctx,
+				      u8 *sign, u8 *output)
+{
+	return -ENOSYS;
+}
+#endif
 static const struct dm_crypto_ops rockchip_crypto_ops = {
 	.capability = rockchip_crypto_capability,
 	.sha_init   = rockchip_crypto_sha_init,
diff --git a/drivers/crypto/rockchip/crypto_v2.c b/drivers/crypto/rockchip/crypto_v2.c
index f7f8113ad8..c322b67ca0 100644
--- a/drivers/crypto/rockchip/crypto_v2.c
+++ b/drivers/crypto/rockchip/crypto_v2.c
@@ -545,6 +545,7 @@ static int rockchip_crypto_sha_final(struct udevice *dev,
 	return rk_hash_final(priv->hw_ctx, (u8 *)output, BITS2BYTE(nbits));
 }
 
+#if CONFIG_IS_ENABLED(ROCKCHIP_RSA)
 static int rockchip_crypto_rsa_verify(struct udevice *dev, rsa_key *ctx,
 				      u8 *sign, u8 *output)
 {
@@ -607,6 +608,13 @@ exit:
 
 	return ret;
 }
+#else
+static int rockchip_crypto_rsa_verify(struct udevice *dev, rsa_key *ctx,
+				      u8 *sign, u8 *output)
+{
+	return -ENOSYS;
+}
+#endif
 
 static int rockchip_crypto_get_trng(struct udevice *dev, u8 *output, u32 len)
 {

commit 04a8326ac7a5ca106c3a1c8d84e622a55cd5eec7
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jul 22 11:00:36 2020 +0800

    mtd_blk: correct the ubi part info when enable a/b
    
    The default ubi part info must be corrected while the part info will
    be changed when enable a/b.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I84db2e284f732f62014d3d14d99217fb707b85c0

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index c9780dc8fa..f8df54b737 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -15,6 +15,8 @@
 #include <dm/device-internal.h>
 
 #define MTD_PART_NAND_HEAD		"mtdparts="
+#define MTD_ROOT_PART_NUM		"ubi.mtd="
+#define MTD_ROOT_PART_NAME		"root=ubi0:rootfs"
 #define MTD_PART_INFO_MAX_SIZE		512
 #define MTD_SINGLE_PART_INFO_MAX_SIZE	40
 
@@ -268,6 +270,7 @@ char *mtd_part_parse(void)
 {
 	char mtd_part_info_temp[MTD_SINGLE_PART_INFO_MAX_SIZE] = {0};
 	u32 length, data_len = MTD_PART_INFO_MAX_SIZE;
+	char mtd_root_part_info[30] = {0};
 	struct blk_desc *dev_desc;
 	disk_partition_t info;
 	char *mtd_part_info_p;
@@ -284,6 +287,12 @@ char *mtd_part_parse(void)
 	if (!mtd)
 		return NULL;
 
+	p = part_get_info_by_name(dev_desc, PART_SYSTEM, &info);
+	if (p > 0) {
+		snprintf(mtd_root_part_info, 30, "%s%d %s", MTD_ROOT_PART_NUM, p - 1, MTD_ROOT_PART_NAME);
+		env_update("bootargs", mtd_root_part_info);
+	}
+
 	mtd_part_info = (char *)calloc(MTD_PART_INFO_MAX_SIZE, sizeof(char));
 	if (!mtd_part_info) {
 		printf("%s: Fail to malloc!", __func__);

commit b693f1568149aaa4d10233bc2e00fac2aa0c6b7a
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jul 22 10:41:54 2020 +0800

    include: boot_rkimg: define system partition name
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ifaaf5c5eb6baf777ed32e28ca6e5ef382e782c11

diff --git a/include/boot_rkimg.h b/include/boot_rkimg.h
index 85467b5196..0ad15f4706 100644
--- a/include/boot_rkimg.h
+++ b/include/boot_rkimg.h
@@ -57,6 +57,7 @@ struct rockchip_image {
 #define PART_RECOVERY			"recovery"
 #define PART_DTBO			"dtbo"
 #define PART_LOGO			"logo"
+#define PART_SYSTEM			"system"
 
 struct blk_desc *rockchip_get_bootdev(void);
 void rockchip_set_bootdev(struct blk_desc *desc);

commit e0d8614639ecacb8b88795678d4991a7b9af0338
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 21 16:14:39 2020 +0800

    dm: crypto: remove TPL crypto kconfig option
    
    They are impossible to be used in TPL.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ia42330ce3f6621020ae492675de320aa75f33da4

diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
index a36d853a4a..69f405460e 100644
--- a/drivers/crypto/Kconfig
+++ b/drivers/crypto/Kconfig
@@ -12,12 +12,6 @@ config SPL_DM_CRYPTO
 	---help---
 	This config enables the dm crypto support.
 
-config TPL_DM_CRYPTO
-	bool "Enable Driver Model for CRYPTO drivers in tpl"
-	depends on TPL_DM
-	---help---
-	This config enables the dm crypto support.
-
 source drivers/crypto/fsl/Kconfig
 source drivers/crypto/rockchip/Kconfig
 
diff --git a/drivers/crypto/rockchip/Kconfig b/drivers/crypto/rockchip/Kconfig
index 64984662d1..4057502b41 100644
--- a/drivers/crypto/rockchip/Kconfig
+++ b/drivers/crypto/rockchip/Kconfig
@@ -12,13 +12,6 @@ config SPL_ROCKCHIP_CRYPTO_V1
 	  This enable MD5/SHA1/SHA256/RSA512/RSA1024/RSA2048 algorithm support for
 	  rockchip crypto v1 on platforms: rk3399/rk3368/rk3328/rk3229/rk3288/rk3128.
 
-config TPL_ROCKCHIP_CRYPTO_V1
-	bool "Enable rockchip crypto v1 support in tpl"
-	depends on TPL_DM_CRYPTO
-	help
-	  This enable MD5/SHA1/SHA256/RSA512/RSA1024/RSA2048 algorithm support for
-	  rockchip crypto v1 on platforms: rk3399/rk3368/rk3328/rk3229/rk3288/rk3128.
-
 config ROCKCHIP_CRYPTO_V2
 	bool "Enable rockchip crypto v2 support"
 	depends on DM_CRYPTO
@@ -32,11 +25,3 @@ config SPL_ROCKCHIP_CRYPTO_V2
 	help
 	  This enable MD5/SHA1/SHA256/RSA512/RSA1024/RSA2048 algorithm support for
 	  rockchip crypto v2 on platforms: px30/rk3326/rk1808/rk3308.
-
-config TPL_ROCKCHIP_CRYPTO_V2
-	bool "Enable rockchip crypto v2 support in tpl"
-	depends on TPL_DM_CRYPTO
-	help
-	  This enable MD5/SHA1/SHA256/RSA512/RSA1024/RSA2048 algorithm support for
-	  rockchip crypto v2 on platforms: px30/rk3326/rk1808/rk3308.
-

commit 112c8ab573d334f6d744979f4b7c6e001135cd5c
Author: YouMin Chen <cym@rock-chips.com>
Date:   Sun Jun 28 17:15:24 2020 +0800

    drivers: ram: rv1126: modify ddr support frequency
    
    Modify ddr support frequency to match PLL setting.
    
    Change-Id: I1d93b2178933ada04e178bd068a8fec4ef43a4de
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-330.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-328.inc
similarity index 97%
rename from drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-330.inc
rename to drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-328.inc
index ab20191e37..5f9733b3a3 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-330.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-328.inc
@@ -24,7 +24,7 @@
 		}
 	},
 	{
-		.ddr_freq = 330,	/* clock rate(MHz) */
+		.ddr_freq = 328,	/* clock rate(MHz) */
 		.dramtype = DDR3,
 		.num_channels = 1,
 		.stride = 0,
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-330.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-328.inc
similarity index 97%
rename from drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-330.inc
rename to drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-328.inc
index 246d15e292..3b61adfb38 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-330.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-328.inc
@@ -24,7 +24,7 @@
 		}
 	},
 	{
-		.ddr_freq = 330,	/* clock rate(MHz) */
+		.ddr_freq = 328,	/* clock rate(MHz) */
 		.dramtype = DDR4,
 		.num_channels = 1,
 		.stride = 0,
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-loader_params.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-loader_params.inc
index dde46cdcf1..f2dce3f903 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-loader_params.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-loader_params.inc
@@ -14,7 +14,7 @@
 0, 0, 0, 0,/* reserved */
 
 /* ddr3 */
-(924 << DDR_FREQ_F0_SHIFT) | (330 << DDR_FREQ_F1_SHIFT),
+(924 << DDR_FREQ_F0_SHIFT) | (328 << DDR_FREQ_F1_SHIFT),
 (528 << DDR_FREQ_F2_SHIFT) | (784 << DDR_FREQ_F3_SHIFT),
 (0 << DDR_FREQ_F4_SHIFT) | (0 << DDR_FREQ_F5_SHIFT),
 /* drv when odt on */
@@ -37,7 +37,7 @@
 	(0 << PHY_CLK_SR_SHIFT),
 
 /* ddr4 */
-(924 << DDR_FREQ_F0_SHIFT) | (330 << DDR_FREQ_F1_SHIFT),
+(924 << DDR_FREQ_F0_SHIFT) | (328 << DDR_FREQ_F1_SHIFT),
 (528 << DDR_FREQ_F2_SHIFT) | (784 << DDR_FREQ_F3_SHIFT),
 (0 << DDR_FREQ_F4_SHIFT) | (0 << DDR_FREQ_F5_SHIFT),
 /* drv when odt on */
@@ -59,7 +59,7 @@
 	(0 << PHY_CLK_SR_SHIFT),
 
 /* lpddr3 */
-(924 << DDR_FREQ_F0_SHIFT) | (330 << DDR_FREQ_F1_SHIFT),
+(924 << DDR_FREQ_F0_SHIFT) | (328 << DDR_FREQ_F1_SHIFT),
 (528 << DDR_FREQ_F2_SHIFT) | (784 << DDR_FREQ_F3_SHIFT),
 (0 << DDR_FREQ_F4_SHIFT) | (0 << DDR_FREQ_F5_SHIFT),
 /* drv when odt on */
@@ -82,7 +82,7 @@
 	(0 << PHY_CLK_SR_SHIFT),
 
 /* lpddr4 */
-(924 << DDR_FREQ_F0_SHIFT) | (330 << DDR_FREQ_F1_SHIFT),
+(924 << DDR_FREQ_F0_SHIFT) | (328 << DDR_FREQ_F1_SHIFT),
 (528 << DDR_FREQ_F2_SHIFT) | (784 << DDR_FREQ_F3_SHIFT),
 (0 << DDR_FREQ_F4_SHIFT) | (0 << DDR_FREQ_F5_SHIFT),
 
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-330.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-328.inc
similarity index 97%
rename from drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-330.inc
rename to drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-328.inc
index d99bf6fb7d..24025d6dde 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-330.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-328.inc
@@ -24,7 +24,7 @@
 		}
 	},
 	{
-		.ddr_freq = 330,	/* clock rate(MHz) */
+		.ddr_freq = 328,	/* clock rate(MHz) */
 		.dramtype = LPDDR3,
 		.num_channels = 1,
 		.stride = 0,
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-330.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-328.inc
similarity index 98%
rename from drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-330.inc
rename to drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-328.inc
index bed48dd948..ecdfc45ac2 100644
--- a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-330.inc
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-328.inc
@@ -24,7 +24,7 @@
 		}
 	},
 	{
-		.ddr_freq = 330,	/* clock rate(MHz) */
+		.ddr_freq = 328,	/* clock rate(MHz) */
 		.dramtype = LPDDR4,
 		.num_channels = 1,
 		.stride = 0,
diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
index fe98e0a659..a20cc0d6f0 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -69,7 +69,7 @@ struct dram_info dram_info;
 
 #if (CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE == 3)
 struct rv1126_sdram_params sdram_configs[] = {
-	#include "sdram_inc/rv1126/sdram-rv1126-ddr3-detect-330.inc"
+	#include "sdram_inc/rv1126/sdram-rv1126-ddr3-detect-328.inc"
 	#include "sdram_inc/rv1126/sdram-rv1126-ddr3-detect-396.inc"
 	#include "sdram_inc/rv1126/sdram-rv1126-ddr3-detect-528.inc"
 	#include "sdram_inc/rv1126/sdram-rv1126-ddr3-detect-664.inc"
@@ -79,7 +79,7 @@ struct rv1126_sdram_params sdram_configs[] = {
 };
 #elif (CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE == 0)
 struct rv1126_sdram_params sdram_configs[] = {
-	#include "sdram_inc/rv1126/sdram-rv1126-ddr4-detect-330.inc"
+	#include "sdram_inc/rv1126/sdram-rv1126-ddr4-detect-328.inc"
 	#include "sdram_inc/rv1126/sdram-rv1126-ddr4-detect-396.inc"
 	#include "sdram_inc/rv1126/sdram-rv1126-ddr4-detect-528.inc"
 	#include "sdram_inc/rv1126/sdram-rv1126-ddr4-detect-664.inc"
@@ -89,7 +89,7 @@ struct rv1126_sdram_params sdram_configs[] = {
 };
 #elif (CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE == 6)
 struct rv1126_sdram_params sdram_configs[] = {
-	#include "sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-330.inc"
+	#include "sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-328.inc"
 	#include "sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-396.inc"
 	#include "sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-528.inc"
 	#include "sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-664.inc"
@@ -99,7 +99,7 @@ struct rv1126_sdram_params sdram_configs[] = {
 };
 #elif (CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE == 7)
 struct rv1126_sdram_params sdram_configs[] = {
-	#include "sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-330.inc"
+	#include "sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-328.inc"
 	#include "sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-396.inc"
 	#include "sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-528.inc"
 	#include "sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-664.inc"

commit 34d0c224c52d057285f9da2cea651d833a6d86ea
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Jul 10 15:46:55 2020 +0800

    video/drm: support get panel timing from EDID
    
    Change-Id: I301cc9927504d90452978abe788f1c97261ff319
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 37ac4c7bfe..be637771e2 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -503,31 +503,17 @@ static int display_get_timing(struct display_state *state)
 	if (dev_of_valid(panel->dev) &&
 	    !display_get_timing_from_dts(panel_state, mode)) {
 		printf("Using display timing dts\n");
-		goto done;
+		return 0;
 	}
 
 	if (panel->data) {
 		m = (const struct drm_display_mode *)panel->data;
 		memcpy(mode, m, sizeof(*m));
 		printf("Using display timing from compatible panel driver\n");
-		goto done;
+		return 0;
 	}
 
-	printf("failed to find display timing\n");
 	return -ENODEV;
-done:
-	printf("Detailed mode clock %u kHz, flags[%x]\n"
-	       "    H: %04d %04d %04d %04d\n"
-	       "    V: %04d %04d %04d %04d\n"
-	       "bus_format: %x\n",
-	       mode->clock, mode->flags,
-	       mode->hdisplay, mode->hsync_start,
-	       mode->hsync_end, mode->htotal,
-	       mode->vdisplay, mode->vsync_start,
-	       mode->vsync_end, mode->vtotal,
-	       conn_state->bus_format);
-
-	return 0;
 }
 
 static int display_init(struct display_state *state)
@@ -614,6 +600,20 @@ static int display_init(struct display_state *state)
 
 	if (panel_state->panel) {
 		ret = display_get_timing(state);
+#if defined(CONFIG_I2C_EDID)
+		if (ret < 0 && conn_funcs->get_edid) {
+			rockchip_panel_prepare(panel_state->panel);
+
+			ret = conn_funcs->get_edid(state);
+			if (!ret) {
+				ret = edid_get_drm_mode((void *)&conn_state->edid,
+							sizeof(conn_state->edid),
+							mode, &bpc);
+				if (!ret)
+					edid_print_info((void *)&conn_state->edid);
+			}
+		}
+#endif
 	} else if (conn_state->bridge) {
 		ret = video_bridge_read_edid(conn_state->bridge->dev,
 					     conn_state->edid, EDID_SIZE);
@@ -645,6 +645,17 @@ static int display_init(struct display_state *state)
 	if (ret)
 		goto deinit;
 
+	printf("Detailed mode clock %u kHz, flags[%x]\n"
+	       "    H: %04d %04d %04d %04d\n"
+	       "    V: %04d %04d %04d %04d\n"
+	       "bus_format: %x\n",
+	       mode->clock, mode->flags,
+	       mode->hdisplay, mode->hsync_start,
+	       mode->hsync_end, mode->htotal,
+	       mode->vdisplay, mode->vsync_start,
+	       mode->vsync_end, mode->vtotal,
+	       conn_state->bus_format);
+
 	drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
 
 	if (crtc_funcs->init) {

commit d8123c4406c7de7d5744d92cc601b1c9645a4588
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Jul 10 15:35:38 2020 +0800

    common: edid: fix the mode flag for interlaced
    
    Fixes: b9e63a962a36 ("edid: support decode edid to drm modes")
    Change-Id: I97cece70ff053bedd78b9af29be64c3d3d7679eb
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/common/edid.c b/common/edid.c
index 8ae25df940..7a69b9be69 100644
--- a/common/edid.c
+++ b/common/edid.c
@@ -1582,7 +1582,7 @@ static void decode_mode(u8 *buf, struct drm_display_mode *mode)
 	mode->flags |= EDID_DETAILED_TIMING_FLAG_VSYNC_POLARITY(*t) ?
 		DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
 
-	if (EDID_DETAILED_TIMING_FLAG_HSYNC_POLARITY(*t))
+	if (EDID_DETAILED_TIMING_FLAG_INTERLEAVED(*t))
 		mode->flags |= DRM_MODE_FLAG_INTERLACE;
 
 	debug("Detailed mode clock %u kHz, %d mm x %d mm, flags[%x]\n"

commit 2f6aff5865decdedd79ca2a28e640f3c90c8e4ce
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Tue Jul 14 10:26:04 2020 +0800

    pinctrl: rockchip: fix rk3288 nr_pins warning
    
    Change-Id: I4631a88b5706cb8cdc190fb3432936c791e70bda
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 85f90c9173..8b41d33041 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -3532,7 +3532,7 @@ static struct rockchip_pin_bank rk3288_pin_banks[] = {
 static const struct rockchip_pin_ctrl rk3288_pin_ctrl = {
 	.pin_banks		= rk3288_pin_banks,
 	.nr_banks		= ARRAY_SIZE(rk3288_pin_banks),
-	.nr_pins		= 248,
+	.nr_pins		= 264,
 	.label			= "RK3288-GPIO",
 	.type			= RK3288,
 	.grf_mux_offset		= 0x0,

commit 6af6afb3d8679d05c028ed25d9c9b2fe64dd8c4b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 13 15:42:07 2020 +0800

    rockchip: fit: use pss padding for verify boot
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I4feef28eea9c16622bfe5b56f2c75a16bb7e672f

diff --git a/arch/arm/mach-rockchip/make_fit_boot.sh b/arch/arm/mach-rockchip/make_fit_boot.sh
index f985779247..69a72348ed 100755
--- a/arch/arm/mach-rockchip/make_fit_boot.sh
+++ b/arch/arm/mach-rockchip/make_fit_boot.sh
@@ -94,6 +94,7 @@ cat << EOF
 			multi = "resource";
 			signature {
 				algo = "sha256,rsa2048";
+				padding = "pss";
 				key-name-hint = "dev";
 				sign-images = "fdt", "kernel", "ramdisk", "multi";
 			};

commit 95b97bd68fa9c0fbcd7a6afba245195e64e5aa7b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 13 15:41:26 2020 +0800

    rockchip: rv1126: use pss padding for verify boot
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ia2b29a53332989244be0904280f403cb6c4c9e97

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh b/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh
index 905c05e68b..87fa42b324 100755
--- a/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh
+++ b/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh
@@ -123,6 +123,7 @@ fi
 cat  << EOF
 			signature {
 				algo = "sha256,rsa2048";
+				padding = "pss";
 				key-name-hint = "dev";
 EOF
 

commit 46751ae49c15219daada898188de42e0384ab74c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 13 15:42:53 2020 +0800

    tools: image-host: use pkcs-1.5 by default
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I20c37235c22127e78f1ccb46eb3ee56f920068bc

diff --git a/tools/image-host.c b/tools/image-host.c
index 1441654266..f3e193cc53 100644
--- a/tools/image-host.c
+++ b/tools/image-host.c
@@ -163,7 +163,8 @@ static int fit_image_setup_sig(struct image_sign_info *info,
 	}
 
 	padding_name = fdt_getprop(fit, noffset, "padding", NULL);
-
+	if (!padding_name)
+		padding_name = "pkcs-1.5";
 	memset(info, '\0', sizeof(*info));
 	info->keydir = keydir;
 	info->keyname = fdt_getprop(fit, noffset, "key-name-hint", NULL);

commit 85289e9d5d410dfcd041dc7b762f4bd06a31bc24
Author: Philippe Reynes <philippe.reynes@softathome.com>
Date:   Wed Nov 14 13:51:01 2018 +0100

    UPSTREAM: rsa: add support of padding pss
    
    We add the support of the padding pss for rsa signature.
    This new padding is often recommended instead of pkcs-1.5.
    
    Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    (cherry picked from commit 061daa0b61f0fbeb214c566f3adb23da05545320)
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I28e5722504bfd0428cd119b2aaae60682a720648

diff --git a/Kconfig b/Kconfig
index 1d3c0e2c88..1345a0671c 100644
--- a/Kconfig
+++ b/Kconfig
@@ -229,6 +229,14 @@ config FIT_ROLLBACK_PROTECT
 	help
 	  Enable rollback-index protection for FIT image
 
+config FIT_ENABLE_RSASSA_PSS_SUPPORT
+	bool "Support rsassa-pss signature scheme of FIT image contents"
+	depends on FIT_SIGNATURE
+	default y
+	help
+	  Enable this to support the pss padding algorithm as described
+	  in the rfc8017 (https://tools.ietf.org/html/rfc8017).
+
 config FIT_VERBOSE
 	bool "Show verbose messages when FIT images fail"
 	help
diff --git a/common/image-sig.c b/common/image-sig.c
index 39568d8d96..2dbfec5062 100644
--- a/common/image-sig.c
+++ b/common/image-sig.c
@@ -78,6 +78,12 @@ struct padding_algo padding_algos[] = {
 		.name = "pkcs-1.5",
 		.verify = padding_pkcs_15_verify,
 	},
+#ifdef CONFIG_FIT_ENABLE_RSASSA_PSS_SUPPORT
+	{
+		.name = "pss",
+		.verify = padding_pss_verify,
+	}
+#endif /* CONFIG_FIT_ENABLE_RSASSA_PSS_SUPPORT */
 };
 
 struct checksum_algo *image_get_checksum_algo(const char *full_name)
diff --git a/include/image.h b/include/image.h
index f127623bd0..d168de21e4 100644
--- a/include/image.h
+++ b/include/image.h
@@ -29,6 +29,7 @@ struct lmb;
 #define IMAGE_ENABLE_FIT	1
 #define IMAGE_ENABLE_OF_LIBFDT	1
 #define CONFIG_FIT_VERBOSE	1 /* enable fit_format_{error,warning}() */
+#define CONFIG_FIT_ENABLE_RSASSA_PSS_SUPPORT 1
 #define CONFIG_FIT_ENABLE_SHA256_SUPPORT
 #define CONFIG_SHA1
 #define CONFIG_SHA256
diff --git a/include/u-boot/rsa.h b/include/u-boot/rsa.h
index 759c7e4729..a1dad7194e 100644
--- a/include/u-boot/rsa.h
+++ b/include/u-boot/rsa.h
@@ -102,6 +102,12 @@ int rsa_verify(struct image_sign_info *info,
 int padding_pkcs_15_verify(struct image_sign_info *info,
 			   uint8_t *msg, int msg_len,
 			   const uint8_t *hash, int hash_len);
+
+#ifdef CONFIG_FIT_ENABLE_RSASSA_PSS_SUPPORT
+int padding_pss_verify(struct image_sign_info *info,
+		       uint8_t *msg, int msg_len,
+		       const uint8_t *hash, int hash_len);
+#endif /* CONFIG_FIT_ENABLE_RSASSA_PSS_SUPPORT */
 #else
 static inline int rsa_verify(struct image_sign_info *info,
 		const struct image_region region[], int region_count,
@@ -116,6 +122,15 @@ static inline int padding_pkcs_15_verify(struct image_sign_info *info,
 {
 	return -ENXIO;
 }
+
+#ifdef CONFIG_FIT_ENABLE_RSASSA_PSS_SUPPORT
+static inline int padding_pss_verify(struct image_sign_info *info,
+				     uint8_t *msg, int msg_len,
+				     const uint8_t *hash, int hash_len)
+{
+	return -ENXIO;
+}
+#endif /* CONFIG_FIT_ENABLE_RSASSA_PSS_SUPPORT */
 #endif
 
 #define RSA_DEFAULT_PADDING_NAME		"pkcs-1.5"
diff --git a/lib/rsa/rsa-sign.c b/lib/rsa/rsa-sign.c
index d12f911cf7..39226ad4f2 100644
--- a/lib/rsa/rsa-sign.c
+++ b/lib/rsa/rsa-sign.c
@@ -460,6 +460,16 @@ static int rsa_sign_with_key(RSA *rsa, struct padding_algo *padding_algo,
 		goto err_sign;
 	}
 
+#ifdef CONFIG_FIT_ENABLE_RSASSA_PSS_SUPPORT
+	if (padding_algo && !strcmp(padding_algo->name, "pss")) {
+		if (EVP_PKEY_CTX_set_rsa_padding(ckey,
+						 RSA_PKCS1_PSS_PADDING) <= 0) {
+			ret = rsa_err("Signer padding setup failed");
+			goto err_sign;
+		}
+	}
+#endif /* CONFIG_FIT_ENABLE_RSASSA_PSS_SUPPORT */
+
 	for (i = 0; i < region_count; i++) {
 		if (!EVP_DigestSignUpdate(context, region[i].data,
 					  region[i].size)) {
diff --git a/lib/rsa/rsa-verify.c b/lib/rsa/rsa-verify.c
index 629f0f9721..61e48eee5f 100644
--- a/lib/rsa/rsa-verify.c
+++ b/lib/rsa/rsa-verify.c
@@ -150,6 +150,196 @@ int padding_pkcs_15_verify(struct image_sign_info *info,
 	return 0;
 }
 
+#ifdef CONFIG_FIT_ENABLE_RSASSA_PSS_SUPPORT
+static void u32_i2osp(uint32_t val, uint8_t *buf)
+{
+	buf[0] = (uint8_t)((val >> 24) & 0xff);
+	buf[1] = (uint8_t)((val >> 16) & 0xff);
+	buf[2] = (uint8_t)((val >>  8) & 0xff);
+	buf[3] = (uint8_t)((val >>  0) & 0xff);
+}
+
+/**
+ * mask_generation_function1() - generate an octet string
+ *
+ * Generate an octet string used to check rsa signature.
+ * It use an input octet string and a hash function.
+ *
+ * @checksum:	A Hash function
+ * @seed:	Specifies an input variable octet string
+ * @seed_len:	Size of the input octet string
+ * @output:	Specifies the output octet string
+ * @output_len:	Size of the output octet string
+ * @return 0 if the octet string was correctly generated, others on error
+ */
+static int mask_generation_function1(struct checksum_algo *checksum,
+				     uint8_t *seed, int seed_len,
+				     uint8_t *output, int output_len)
+{
+	struct image_region region[2];
+	int ret = 0, i, i_output = 0, region_count = 2;
+	uint32_t counter = 0;
+	uint8_t buf_counter[4], *tmp;
+	int hash_len = checksum->checksum_len;
+
+	memset(output, 0, output_len);
+
+	region[0].data = seed;
+	region[0].size = seed_len;
+	region[1].data = &buf_counter[0];
+	region[1].size = 4;
+
+	tmp = malloc(hash_len);
+	if (!tmp) {
+		debug("%s: can't allocate array tmp\n", __func__);
+		ret = -ENOMEM;
+		goto out;
+	}
+
+	while (i_output < output_len) {
+		u32_i2osp(counter, &buf_counter[0]);
+
+		ret = checksum->calculate(checksum->name,
+					  region, region_count,
+					  tmp);
+		if (ret < 0) {
+			debug("%s: Error in checksum calculation\n", __func__);
+			goto out;
+		}
+
+		i = 0;
+		while ((i_output < output_len) && (i < hash_len)) {
+			output[i_output] = tmp[i];
+			i_output++;
+			i++;
+		}
+
+		counter++;
+	}
+
+out:
+	free(tmp);
+
+	return ret;
+}
+
+static int compute_hash_prime(struct checksum_algo *checksum,
+			      uint8_t *pad, int pad_len,
+			      uint8_t *hash, int hash_len,
+			      uint8_t *salt, int salt_len,
+			      uint8_t *hprime)
+{
+	struct image_region region[3];
+	int ret, region_count = 3;
+
+	region[0].data = pad;
+	region[0].size = pad_len;
+	region[1].data = hash;
+	region[1].size = hash_len;
+	region[2].data = salt;
+	region[2].size = salt_len;
+
+	ret = checksum->calculate(checksum->name, region, region_count, hprime);
+	if (ret < 0) {
+		debug("%s: Error in checksum calculation\n", __func__);
+		goto out;
+	}
+
+out:
+	return ret;
+}
+
+int padding_pss_verify(struct image_sign_info *info,
+		       uint8_t *msg, int msg_len,
+		       const uint8_t *hash, int hash_len)
+{
+	uint8_t *masked_db = NULL;
+	int masked_db_len = msg_len - hash_len - 1;
+	uint8_t *h = NULL, *hprime = NULL;
+	int h_len = hash_len;
+	uint8_t *db_mask = NULL;
+	int db_mask_len = masked_db_len;
+	uint8_t *db = NULL, *salt = NULL;
+	int db_len = masked_db_len, salt_len = msg_len - hash_len - 2;
+	uint8_t pad_zero[8] = { 0 };
+	int ret, i, leftmost_bits = 1;
+	uint8_t leftmost_mask;
+	struct checksum_algo *checksum = info->checksum;
+
+	/* first, allocate everything */
+	masked_db = malloc(masked_db_len);
+	h = malloc(h_len);
+	db_mask = malloc(db_mask_len);
+	db = malloc(db_len);
+	salt = malloc(salt_len);
+	hprime = malloc(hash_len);
+	if (!masked_db || !h || !db_mask || !db || !salt || !hprime) {
+		printf("%s: can't allocate some buffer\n", __func__);
+		ret = -ENOMEM;
+		goto out;
+	}
+
+	/* step 4: check if the last byte is 0xbc */
+	if (msg[msg_len - 1] != 0xbc) {
+		printf("%s: invalid pss padding (0xbc is missing)\n", __func__);
+		ret = -EINVAL;
+		goto out;
+	}
+
+	/* step 5 */
+	memcpy(masked_db, msg, masked_db_len);
+	memcpy(h, msg + masked_db_len, h_len);
+
+	/* step 6 */
+	leftmost_mask = (0xff >> (8 - leftmost_bits)) << (8 - leftmost_bits);
+	if (masked_db[0] & leftmost_mask) {
+		printf("%s: invalid pss padding ", __func__);
+		printf("(leftmost bit of maskedDB not zero)\n");
+		ret = -EINVAL;
+		goto out;
+	}
+
+	/* step 7 */
+	mask_generation_function1(checksum, h, h_len, db_mask, db_mask_len);
+
+	/* step 8 */
+	for (i = 0; i < db_len; i++)
+		db[i] = masked_db[i] ^ db_mask[i];
+
+	/* step 9 */
+	db[0] &= 0xff >> leftmost_bits;
+
+	/* step 10 */
+	if (db[0] != 0x01) {
+		printf("%s: invalid pss padding ", __func__);
+		printf("(leftmost byte of db isn't 0x01)\n");
+		ret = EINVAL;
+		goto out;
+	}
+
+	/* step 11 */
+	memcpy(salt, &db[1], salt_len);
+
+	/* step 12 & 13 */
+	compute_hash_prime(checksum, pad_zero, 8,
+			   (uint8_t *)hash, hash_len,
+			   salt, salt_len, hprime);
+
+	/* step 14 */
+	ret = memcmp(h, hprime, hash_len);
+
+out:
+	free(hprime);
+	free(salt);
+	free(db);
+	free(db_mask);
+	free(h);
+	free(masked_db);
+
+	return ret;
+}
+#endif
+
 /**
  * rsa_verify_key() - Verify a signature against some data using RSA Key
  *

commit 219050bf6ad6b4121755d77da9d0ba571be6c3b1
Author: Philippe Reynes <philippe.reynes@softathome.com>
Date:   Wed Nov 14 13:51:00 2018 +0100

    UPSTREAM: rsa: add a structure for the padding
    
    The rsa signature use a padding algorithm. By default, we use the
    padding pkcs-1.5. In order to add some new padding algorithm, we
    add a padding framework to manage several padding algorithm.
    The choice of the padding is done in the file .its.
    
    Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    (cherry picked from commit 20031567e12bb312bff95b70767f6275e20f0346)
    
    Conflicts:
            common/image-fit.c
            lib/rsa/rsa-sign.c
            lib/rsa/rsa-verify.c
    
    Change-Id: Ie522fec1ea69e6b86ebde0f7dad91a45670da66b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/image-sig.c b/common/image-sig.c
index 0070ca8c4d..39568d8d96 100644
--- a/common/image-sig.c
+++ b/common/image-sig.c
@@ -73,6 +73,13 @@ struct crypto_algo crypto_algos[] = {
 
 };
 
+struct padding_algo padding_algos[] = {
+	{
+		.name = "pkcs-1.5",
+		.verify = padding_pkcs_15_verify,
+	},
+};
+
 struct checksum_algo *image_get_checksum_algo(const char *full_name)
 {
 	int i;
@@ -108,6 +115,21 @@ struct crypto_algo *image_get_crypto_algo(const char *full_name)
 	return NULL;
 }
 
+struct padding_algo *image_get_padding_algo(const char *name)
+{
+	int i;
+
+	if (!name)
+		return NULL;
+
+	for (i = 0; i < ARRAY_SIZE(padding_algos); i++) {
+		if (!strcmp(padding_algos[i].name, name))
+			return &padding_algos[i];
+	}
+
+	return NULL;
+}
+
 /**
  * fit_region_make_list() - Make a list of image regions
  *
@@ -157,11 +179,17 @@ static int fit_image_setup_verify(struct image_sign_info *info,
 		char **err_msgp)
 {
 	char *algo_name;
+	const char *padding_name;
 
 	if (fit_image_hash_get_algo(fit, noffset, &algo_name)) {
 		*err_msgp = "Can't get hash algo property";
 		return -1;
 	}
+
+	padding_name = fdt_getprop(fit, noffset, "padding", NULL);
+	if (!padding_name)
+		padding_name = RSA_DEFAULT_PADDING_NAME;
+
 	memset(info, '\0', sizeof(*info));
 	info->keyname = fdt_getprop(fit, noffset, "key-name-hint", NULL);
 	info->fit = (void *)fit;
@@ -169,6 +197,7 @@ static int fit_image_setup_verify(struct image_sign_info *info,
 	info->name = algo_name;
 	info->checksum = image_get_checksum_algo(algo_name);
 	info->crypto = image_get_crypto_algo(algo_name);
+	info->padding = image_get_padding_algo(padding_name);
 	info->fdt_blob = gd_fdt_blob();
 	info->required_keynode = required_keynode;
 	printf("%s:%s", algo_name, info->keyname);
diff --git a/include/image.h b/include/image.h
index 2fe98b4680..f127623bd0 100644
--- a/include/image.h
+++ b/include/image.h
@@ -1145,6 +1145,7 @@ struct image_sign_info {
 	int node_offset;		/* Offset of signature node */
 	const char *name;		/* Algorithm name */
 	struct checksum_algo *checksum;	/* Checksum algorithm information */
+	struct padding_algo *padding;	/* Padding algorithm information */
 	struct crypto_algo *crypto;	/* Crypto algorithm information */
 	const void *fdt_blob;		/* FDT containing public keys */
 	int required_keynode;		/* Node offset of key to use: -1=any */
@@ -1230,6 +1231,13 @@ struct crypto_algo {
 		      uint8_t *sig, uint sig_len);
 };
 
+struct padding_algo {
+	const char *name;
+	int (*verify)(struct image_sign_info *info,
+		      uint8_t *pad, int pad_len,
+		      const uint8_t *hash, int hash_len);
+};
+
 /**
  * image_get_checksum_algo() - Look up a checksum algorithm
  *
@@ -1246,6 +1254,14 @@ struct checksum_algo *image_get_checksum_algo(const char *full_name);
  */
 struct crypto_algo *image_get_crypto_algo(const char *full_name);
 
+/**
+ * image_get_padding_algo() - Look up a padding algorithm
+ *
+ * @param name		Name of padding algorithm
+ * @return pointer to algorithm information, or NULL if not found
+ */
+struct padding_algo *image_get_padding_algo(const char *name);
+
 /**
  * fit_image_verify_required_sigs() - Verify signatures marked as 'required'
  *
diff --git a/include/u-boot/rsa.h b/include/u-boot/rsa.h
index a7d361ef83..759c7e4729 100644
--- a/include/u-boot/rsa.h
+++ b/include/u-boot/rsa.h
@@ -98,6 +98,10 @@ static inline int rsa_add_verify_data(struct image_sign_info *info,
 int rsa_verify(struct image_sign_info *info,
 	       const struct image_region region[], int region_count,
 	       uint8_t *sig, uint sig_len);
+
+int padding_pkcs_15_verify(struct image_sign_info *info,
+			   uint8_t *msg, int msg_len,
+			   const uint8_t *hash, int hash_len);
 #else
 static inline int rsa_verify(struct image_sign_info *info,
 		const struct image_region region[], int region_count,
@@ -105,8 +109,17 @@ static inline int rsa_verify(struct image_sign_info *info,
 {
 	return -ENXIO;
 }
+
+static inline int padding_pkcs_15_verify(struct image_sign_info *info,
+					 uint8_t *msg, int msg_len,
+					 const uint8_t *hash, int hash_len)
+{
+	return -ENXIO;
+}
 #endif
 
+#define RSA_DEFAULT_PADDING_NAME		"pkcs-1.5"
+
 #define RSA2048_BYTES	(2048 / 8)
 #define RSA4096_BYTES	(4096 / 8)
 
diff --git a/lib/rsa/rsa-sign.c b/lib/rsa/rsa-sign.c
index 82f9d03230..d12f911cf7 100644
--- a/lib/rsa/rsa-sign.c
+++ b/lib/rsa/rsa-sign.c
@@ -409,11 +409,13 @@ static int gen_data2sign(const struct image_region region[], int region_count)
 	return 0;
 }
 
-static int rsa_sign_with_key(RSA *rsa, struct checksum_algo *checksum_algo,
+static int rsa_sign_with_key(RSA *rsa, struct padding_algo *padding_algo,
+			     struct checksum_algo *checksum_algo,
 		const struct image_region region[], int region_count,
 		uint8_t **sigp, uint *sig_size)
 {
 	EVP_PKEY *key;
+	EVP_PKEY_CTX *ckey;
 	EVP_MD_CTX *context;
 	int ret = 0;
 	size_t size;
@@ -444,7 +446,14 @@ static int rsa_sign_with_key(RSA *rsa, struct checksum_algo *checksum_algo,
 		goto err_create;
 	}
 	EVP_MD_CTX_init(context);
-	if (EVP_DigestSignInit(context, NULL,
+
+	ckey = EVP_PKEY_CTX_new(key, NULL);
+	if (!ckey) {
+		ret = rsa_err("EVP key context creation failed");
+		goto err_create;
+	}
+
+	if (EVP_DigestSignInit(context, &ckey,
 			       checksum_algo->calculate_sign(),
 			       NULL, key) <= 0) {
 		ret = rsa_err("Signer setup failed");
@@ -512,7 +521,7 @@ int rsa_sign(struct image_sign_info *info,
 	ret = rsa_get_priv_key(info->keydir, info->keyname, e, &rsa);
 	if (ret)
 		goto err_priv;
-	ret = rsa_sign_with_key(rsa, info->checksum, region,
+	ret = rsa_sign_with_key(rsa, info->padding, info->checksum, region,
 				region_count, sigp, sig_len);
 	if (ret)
 		goto err_sign;
diff --git a/lib/rsa/rsa-verify.c b/lib/rsa/rsa-verify.c
index b08d677f4f..629f0f9721 100644
--- a/lib/rsa/rsa-verify.c
+++ b/lib/rsa/rsa-verify.c
@@ -127,28 +127,54 @@ out:
 #endif
 #endif
 
+int padding_pkcs_15_verify(struct image_sign_info *info,
+			   uint8_t *msg, int msg_len,
+			   const uint8_t *hash, int hash_len)
+{
+	struct checksum_algo *checksum = info->checksum;
+	int ret, pad_len = msg_len - checksum->checksum_len;
+
+	/* Check pkcs1.5 padding bytes. */
+	ret = rsa_verify_padding(msg, pad_len, checksum);
+	if (ret) {
+		debug("In RSAVerify(): Padding check failed!\n");
+		return -EINVAL;
+	}
+
+	/* Check hash. */
+	if (memcmp((uint8_t *)msg + pad_len, hash, msg_len - pad_len)) {
+		debug("In RSAVerify(): Hash check failed!\n");
+		return -EACCES;
+	}
+
+	return 0;
+}
+
 /**
  * rsa_verify_key() - Verify a signature against some data using RSA Key
  *
  * Verify a RSA PKCS1.5 signature against an expected hash using
  * the RSA Key properties in prop structure.
  *
+ * @info:	Specifies key and FIT information
  * @prop:	Specifies key
  * @sig:	Signature
  * @sig_len:	Number of bytes in signature
  * @hash:	Pointer to the expected hash
  * @key_len:	Number of bytes in rsa key
- * @algo:	Checksum algo structure having information on DER encoding etc.
  * @return 0 if verified, -ve on error
  */
-static int rsa_verify_key(struct key_prop *prop, const uint8_t *sig,
+static int rsa_verify_key(struct image_sign_info *info,
+			  struct key_prop *prop, const uint8_t *sig,
 			  const uint32_t sig_len, const uint8_t *hash,
-			  const uint32_t key_len, struct checksum_algo *algo)
+			  const uint32_t key_len)
 {
-	int pad_len;
 	int ret;
+	struct checksum_algo *checksum = info->checksum;
+	struct padding_algo *padding = info->padding;
+	int hash_len = checksum->checksum_len;
 
-	if (!prop || !sig || !hash || !algo)
+	if (!prop || !sig || !hash || !checksum)
 		return -EIO;
 
 	if (sig_len != (prop->num_bits / 8)) {
@@ -156,7 +182,7 @@ static int rsa_verify_key(struct key_prop *prop, const uint8_t *sig,
 		return -EINVAL;
 	}
 
-	debug("Checksum algorithm: %s", algo->name);
+	debug("Checksum algorithm: %s", checksum->name);
 
 	/* Sanity check for stack size */
 	if (sig_len > RSA_MAX_SIG_BITS / 8) {
@@ -189,19 +215,10 @@ static int rsa_verify_key(struct key_prop *prop, const uint8_t *sig,
 		return ret;
 	}
 
-	pad_len = key_len - algo->checksum_len;
-
-	/* Check pkcs1.5 padding bytes. */
-	ret = rsa_verify_padding(buf, pad_len, algo);
+	ret = padding->verify(info, buf, key_len, hash, hash_len);
 	if (ret) {
-		debug("In RSAVerify(): Padding check failed!\n");
-		return -EINVAL;
-	}
-
-	/* Check hash. */
-	if (memcmp((uint8_t *)buf + pad_len, hash, sig_len - pad_len)) {
-		debug("In RSAVerify(): Hash check failed!\n");
-		return -EACCES;
+		debug("In RSAVerify(): padding check failed!\n");
+		return ret;
 	}
 
 	return 0;
@@ -265,8 +282,8 @@ static int rsa_verify_with_keynode(struct image_sign_info *info,
 	if (!prop.factor_np)
 		return -EFAULT;
 #endif
-	ret = rsa_verify_key(&prop, sig, sig_len, hash,
-			     info->crypto->key_len, info->checksum);
+	ret = rsa_verify_key(info, &prop, sig, sig_len, hash,
+			     info->crypto->key_len);
 
 	return ret;
 }
diff --git a/tools/image-host.c b/tools/image-host.c
index 4a3962fb4b..1441654266 100644
--- a/tools/image-host.c
+++ b/tools/image-host.c
@@ -153,6 +153,7 @@ static int fit_image_setup_sig(struct image_sign_info *info,
 {
 	const char *node_name;
 	char *algo_name;
+	const char *padding_name;
 
 	node_name = fit_get_name(fit, noffset, NULL);
 	if (fit_image_hash_get_algo(fit, noffset, &algo_name)) {
@@ -161,6 +162,8 @@ static int fit_image_setup_sig(struct image_sign_info *info,
 		return -1;
 	}
 
+	padding_name = fdt_getprop(fit, noffset, "padding", NULL);
+
 	memset(info, '\0', sizeof(*info));
 	info->keydir = keydir;
 	info->keyname = fdt_getprop(fit, noffset, "key-name-hint", NULL);
@@ -169,6 +172,7 @@ static int fit_image_setup_sig(struct image_sign_info *info,
 	info->name = algo_name;
 	info->checksum = image_get_checksum_algo(algo_name);
 	info->crypto = image_get_crypto_algo(algo_name);
+	info->padding = image_get_padding_algo(padding_name);
 	info->require_keys = require_keys;
 	info->engine_id = engine_id;
 	if (!info->checksum || !info->crypto) {

commit 624f7c079181ef119900b7a8ff06776a337d58e2
Author: Philippe Reynes <philippe.reynes@softathome.com>
Date:   Wed Nov 14 13:50:59 2018 +0100

    UPSTREAM: rsa: use new openssl API to create signature
    
    Previous implementation of the rsa signature was using
    the openssl API EVP_Sign*, but the new openssl API
    EVP_DigestSign* is more flexible. So we move to this
    new API.
    
    Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    (cherry picked from commit 3b5d6979fcb80ffae3b140be6edc04cbde1a0b72)
    
    Conflicts:
            lib/rsa/rsa-sign.c
    
    Change-Id: I6016a13904024a63d6fb8110cef37e57a164eed9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/lib/rsa/rsa-sign.c b/lib/rsa/rsa-sign.c
index 2ad207b713..82f9d03230 100644
--- a/lib/rsa/rsa-sign.c
+++ b/lib/rsa/rsa-sign.c
@@ -415,7 +415,8 @@ static int rsa_sign_with_key(RSA *rsa, struct checksum_algo *checksum_algo,
 {
 	EVP_PKEY *key;
 	EVP_MD_CTX *context;
-	int size, ret = 0;
+	int ret = 0;
+	size_t size;
 	uint8_t *sig;
 	int i;
 
@@ -431,7 +432,7 @@ static int rsa_sign_with_key(RSA *rsa, struct checksum_algo *checksum_algo,
 	size = EVP_PKEY_size(key);
 	sig = malloc(size);
 	if (!sig) {
-		fprintf(stderr, "Out of memory for signature (%d bytes)\n",
+		fprintf(stderr, "Out of memory for signature (%zu bytes)\n",
 			size);
 		ret = -ENOMEM;
 		goto err_alloc;
@@ -443,23 +444,28 @@ static int rsa_sign_with_key(RSA *rsa, struct checksum_algo *checksum_algo,
 		goto err_create;
 	}
 	EVP_MD_CTX_init(context);
-	if (!EVP_SignInit(context, checksum_algo->calculate_sign())) {
+	if (EVP_DigestSignInit(context, NULL,
+			       checksum_algo->calculate_sign(),
+			       NULL, key) <= 0) {
 		ret = rsa_err("Signer setup failed");
 		goto err_sign;
 	}
 
 	for (i = 0; i < region_count; i++) {
-		if (!EVP_SignUpdate(context, region[i].data, region[i].size)) {
+		if (!EVP_DigestSignUpdate(context, region[i].data,
+					  region[i].size)) {
 			ret = rsa_err("Signing data failed");
 			goto err_sign;
 		}
 	}
 
-	if (!EVP_SignFinal(context, sig, sig_size, key)) {
+	if (!EVP_DigestSignFinal(context, sig, &size)) {
 		ret = rsa_err("Could not obtain signature");
 		goto err_sign;
 	}
-	#if OPENSSL_VERSION_NUMBER < 0x10100000L
+
+	#if OPENSSL_VERSION_NUMBER < 0x10100000L || \
+		(defined(LIBRESSL_VERSION_NUMBER) && LIBRESSL_VERSION_NUMBER < 0x02070000fL)
 		EVP_MD_CTX_cleanup(context);
 	#else
 		EVP_MD_CTX_reset(context);
@@ -467,7 +473,7 @@ static int rsa_sign_with_key(RSA *rsa, struct checksum_algo *checksum_algo,
 	EVP_MD_CTX_destroy(context);
 	EVP_PKEY_free(key);
 
-	debug("Got signature: %d bytes, expected %d\n", *sig_size, size);
+	debug("Got signature: %d bytes, expected %zu\n", *sig_size, size);
 	*sigp = sig;
 	*sig_size = size;
 

commit 07d90e7755d2e5140e8e2c34d555da8e47b4af3f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 13 20:30:09 2020 +0800

    make.sh: add args to assign uboot and trust image size
    
    syntax:
            --sz-uboot <cell KB> <number of cells>
            --sz-trust <cell KB> <number of cells>
    
    example:
            ./make.sh rk3399 --sz-uboot 1024 2
                            |
                            V
            uboot.img = 1024KB * 2 = 2048KB
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I809ddd762545069b45ab8b0977630ffdd7d8b50c

diff --git a/make.sh b/make.sh
index 5bcf5c87ae..5fffd60fc6 100755
--- a/make.sh
+++ b/make.sh
@@ -177,6 +177,16 @@ function process_args()
 				shift 1
 				;;
 
+			--sz-trust)
+				ARG_TRUST_SIZE="--size $2 $3"
+				shift 3
+				;;
+
+			--sz-uboot)
+				ARG_UBOOT_SIZE="--size $2 $3"
+				shift 3
+				;;
+
 			--no-pack)
 				ARG_NO_PACK="y"
 				shift 1
@@ -442,6 +452,7 @@ function select_chip_info()
 	fi
 }
 
+# Priority: default < CHIP_CFG_FIXUP_TABLE() < make.sh args
 function fixup_platform_configure()
 {
 	u_kb="-" u_num="-" t_kb="-" t_num="-"  sha="-" rsa="-"
@@ -493,6 +504,15 @@ function fixup_platform_configure()
 	if [ "${t_kb}" != "-" ]; then
 		PLATFORM_TRUST_SIZE="--size ${t_kb} ${t_num}"
 	fi
+
+	# args
+	if [ ! -z "${ARG_UBOOT_SIZE}" ]; then
+		PLATFORM_UBOOT_SIZE=${ARG_UBOOT_SIZE}
+	fi
+
+	if [ ! -z "${ARG_TRUST_SIZE}" ]; then
+		PLATFORM_TRUST_SIZE=${ARG_TRUST_SIZE}
+	fi
 }
 
 # Priority: default < CHIP_TYPE_FIXUP_TABLE() < defconfig < make.sh args

commit 3ed9fa58e797a4c8ed9fca23dea22bbe9c07fb40
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 13 20:10:52 2020 +0800

    scripts: fit: move its file to fit/
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If8b887ebaf63573b3c7c414873e038c1f67e4111

diff --git a/scripts/fit-mkimg.sh b/scripts/fit-mkimg.sh
index 8b8d0666c6..d44c376dbf 100755
--- a/scripts/fit-mkimg.sh
+++ b/scripts/fit-mkimg.sh
@@ -302,6 +302,7 @@ function fit_gen_uboot_itb()
 	fi
 
 	rm -f u-boot.itb u-boot.img u-boot-dtb.img
+	mv ${ITS_UBOOT} ${FIT_DIR}
 }
 
 function fit_gen_boot_itb()
@@ -389,6 +390,8 @@ function fit_gen_boot_itb()
 			fdtput -tx ${UBOOT_DTB} ${SIGNATURE_KEY_NODE} rsa,exponent-BN 0x0
 		fi
 	fi
+
+	mv ${ITS_BOOT} ${FIT_DIR}
 }
 
 function fit_gen_uboot_img()

commit a7560f55a3ef87191bd1a6edcfc29f5eacdc257b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 13 19:48:22 2020 +0800

    spl: fit: not allow default configure node miss
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I07af21fdc371dcfdc55115febfc3e99ff41ee8d4

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 4620a0aba5..270bfe6894 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -413,15 +413,18 @@ static int spl_internal_load_simple_fit(struct spl_image_info *spl_image,
 	int conf_noffset;
 
 	conf_noffset = fit_conf_get_node(fit, NULL);
-	if (conf_noffset > 0) {
-		ret = fit_config_verify(fit, conf_noffset);
-		if (ret) {
-			printf("fit verify configure failed, ret=%d\n", ret);
-			return ret;
-		}
-		printf("\n");
+	if (conf_noffset <= 0) {
+		printf("No default config node\n");
+		return -EINVAL;
 	}
 
+	ret = fit_config_verify(fit, conf_noffset);
+	if (ret) {
+		printf("fit verify configure failed, ret=%d\n", ret);
+		return ret;
+	}
+	printf("\n");
+
 #ifdef CONFIG_SPL_FIT_ROLLBACK_PROTECT
 	uint32_t this_index, min_index;
 

commit 1ddd141a3e048c2b1f9512081b21ba1294963b86
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 13 19:36:13 2020 +0800

    tools: image-host: add "/configurations" into hashed-nodes
    
    Protect "default = ..." property and others.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I9e50c09343a97755b3e22d25f1ea196fd8bfb8be

diff --git a/tools/image-host.c b/tools/image-host.c
index 7208df5c16..4a3962fb4b 100644
--- a/tools/image-host.c
+++ b/tools/image-host.c
@@ -415,6 +415,7 @@ static int fit_config_get_hash_list(void *fit, int conf_noffset,
 	strlist_init(node_inc);
 	snprintf(name, sizeof(name), "%s/%s", FIT_CONFS_PATH, conf_name);
 	if (strlist_add(node_inc, "/") ||
+	    strlist_add(node_inc, FIT_CONFS_PATH) ||
 	    strlist_add(node_inc, name))
 		goto err_mem;
 

commit 5cf1de5dfd6752c3a8a3ef187e85f9eb942b1368
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 13 20:37:10 2020 +0800

    configs: remove rv1126-spi-nor-tb_defconfig
    
    Please use rv1126-spi-nor-tb.config.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ifc0db56782a2b7e385bb3685a1fbb13033086f8c

diff --git a/configs/rv1126-spi-nor-tb_defconfig b/configs/rv1126-spi-nor-tb_defconfig
deleted file mode 100644
index 132839b91d..0000000000
--- a/configs/rv1126-spi-nor-tb_defconfig
+++ /dev/null
@@ -1,126 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SPL_LIBCOMMON_SUPPORT=y
-CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SYS_MALLOC_F_LEN=0xc000
-CONFIG_ROCKCHIP_RV1126=y
-CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
-# CONFIG_SPL_MMC_SUPPORT is not set
-CONFIG_ROCKCHIP_VENDOR_PARTITION=y
-CONFIG_ROCKCHIP_UART_MUX_SEL_M=2
-CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
-CONFIG_TARGET_EVB_RV1126=y
-CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
-CONFIG_DEFAULT_DEVICE_TREE="rv1126-evb"
-CONFIG_DEBUG_UART=y
-CONFIG_BOOTDELAY=0
-CONFIG_SYS_CONSOLE_INFO_QUIET=y
-# CONFIG_DISPLAY_CPUINFO is not set
-CONFIG_ANDROID_BOOTLOADER=y
-CONFIG_SPL_BOARD_INIT=y
-# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
-# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
-CONFIG_SPL_MTD_SUPPORT=y
-CONFIG_SPL_OPTEE=y
-CONFIG_SPL_LOAD_RKFW=y
-CONFIG_SPL_KERNEL_ADDR=0x608000
-CONFIG_SPL_KERNEL_COMPRESS_ADDR=0x4800000
-CONFIG_SPL_FDT_ADDR=0x2600000
-CONFIG_SPL_RAMDISK_ADDR=0x2800000
-CONFIG_SPL_RAMDISK_COMPRESS_ADDR=0x5800000
-CONFIG_SPL_KERNEL_BOOT=y
-CONFIG_FASTBOOT_BUF_ADDR=0x800800
-CONFIG_FASTBOOT_BUF_SIZE=0x04000000
-CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=0
-# CONFIG_CMD_ELF is not set
-# CONFIG_CMD_IMI is not set
-# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_XIMG is not set
-# CONFIG_CMD_FLASH is not set
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPT=y
-# CONFIG_CMD_LOADB is not set
-# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_BOOT_ANDROID=y
-CONFIG_CMD_BOOT_ROCKCHIP=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_ITEST is not set
-# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
-# CONFIG_CMD_MISC is not set
-CONFIG_CMD_MTD_BLK=y
-# CONFIG_ISO_PARTITION is not set
-CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
-CONFIG_SPL_OF_CONTROL=y
-CONFIG_SPL_DTB_MINIMUM=y
-CONFIG_OF_LIVE=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
-CONFIG_REGMAP=y
-CONFIG_SPL_REGMAP=y
-CONFIG_SYSCON=y
-CONFIG_SPL_SYSCON=y
-CONFIG_CLK=y
-CONFIG_SPL_CLK=y
-CONFIG_DM_CRYPTO=y
-CONFIG_ROCKCHIP_CRYPTO_V2=y
-CONFIG_ROCKCHIP_GPIO=y
-CONFIG_SYS_I2C_ROCKCHIP=y
-CONFIG_DM_KEY=y
-CONFIG_RK8XX_PWRKEY=y
-CONFIG_ADC_KEY=y
-CONFIG_SPL_MISC=y
-CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS=y
-CONFIG_MTD=y
-CONFIG_MTD_BLK=y
-CONFIG_MTD_DEVICE=y
-CONFIG_SPI_FLASH=y
-CONFIG_SF_DEFAULT_MODE=0x1
-CONFIG_SF_DEFAULT_SPEED=50000000
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_SPI_FLASH_MTD=y
-CONFIG_PHY=y
-CONFIG_PHY_ROCKCHIP_NANENG_USB2=y
-CONFIG_PINCTRL=y
-CONFIG_DM_PMIC=y
-# CONFIG_SPL_PMIC_CHILDREN is not set
-CONFIG_PMIC_RK8XX=y
-CONFIG_REGULATOR_PWM=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_REGULATOR_RK8XX=y
-CONFIG_PWM_ROCKCHIP=y
-CONFIG_RAM=y
-CONFIG_SPL_RAM=y
-CONFIG_TPL_RAM=y
-CONFIG_ROCKCHIP_SDRAM_COMMON=y
-CONFIG_DM_RESET=y
-CONFIG_BAUDRATE=1500000
-CONFIG_DEBUG_UART_BASE=0xff570000
-CONFIG_DEBUG_UART_CLOCK=24000000
-CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_ROCKCHIP_SFC=y
-CONFIG_SYSRESET=y
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_GENERIC=y
-CONFIG_USB_DWC3=y
-CONFIG_USB_DWC3_GADGET=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
-CONFIG_USB_GADGET_VENDOR_NUM=0x2207
-CONFIG_USB_GADGET_PRODUCT_NUM=0x110b
-CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_USE_TINY_PRINTF=y
-CONFIG_SPL_TINY_MEMSET=y
-CONFIG_ERRNO_STR=y
-# CONFIG_EFI_LOADER is not set
-CONFIG_TEST_ROCKCHIP=y

commit 02ed3e1202633251d282713054af422e8d58fa8a
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Jul 13 15:43:40 2020 +0800

    mtd: spinand: Remove useless write enable op
    
    Change-Id: I5e4c953e1107c52bf4a40d397bd92617107b21f1
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index c251c3bb28..83033f10a7 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -705,10 +705,6 @@ static int spinand_markbad(struct nand_device *nand, const struct nand_pos *pos)
 	if (ret)
 		return ret;
 
-	ret = spinand_write_enable_op(spinand);
-	if (ret)
-		return ret;
-
 	return spinand_write_page(spinand, &req);
 }
 

commit fc656fc366cf5a7efc56712ccc46a5aaccfea62b
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Jul 10 11:50:46 2020 +0800

    mtd: spinand: Support xtx devices
    
    Support XT26G01A, XT26G02A, XT26G04A, XT26G01B, XT26G02B
    
    Change-Id: I447d83e5c5da8f6ba8515aab77a8039fe9cb2cc4
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/Makefile b/drivers/mtd/nand/spi/Makefile
index 69aced385d..efe26c6ed0 100644
--- a/drivers/mtd/nand/spi/Makefile
+++ b/drivers/mtd/nand/spi/Makefile
@@ -1,4 +1,4 @@
 # SPDX-License-Identifier: GPL-2.0
 
-spinand-objs := core.o gigadevice.o macronix.o micron.o toshiba.o winbond.o dosilicon.o esmt.o
+spinand-objs := core.o gigadevice.o macronix.o micron.o toshiba.o winbond.o dosilicon.o esmt.o xtx.o
 obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index 59c412ed36..c251c3bb28 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -826,6 +826,7 @@ static const struct spinand_manufacturer *spinand_manufacturers[] = {
 	&winbond_spinand_manufacturer,
 	&dosilicon_spinand_manufacturer,
 	&esmt_spinand_manufacturer,
+	&xtx_spinand_manufacturer,
 };
 
 static int spinand_manufacturer_detect(struct spinand_device *spinand)
diff --git a/drivers/mtd/nand/spi/xtx.c b/drivers/mtd/nand/spi/xtx.c
new file mode 100644
index 0000000000..74e632233a
--- /dev/null
+++ b/drivers/mtd/nand/spi/xtx.c
@@ -0,0 +1,235 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2020 Rockchip Electronics Co., Ltd
+ *
+ * Authors:
+ *	Dingqiang Lin <jon.lin@rock-chips.com>
+ */
+
+#ifndef __UBOOT__
+#include <linux/device.h>
+#include <linux/kernel.h>
+#endif
+#include <linux/mtd/spinand.h>
+
+#define SPINAND_MFR_XTX			0x0B
+
+static SPINAND_OP_VARIANTS(read_cache_variants,
+		SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
+
+static SPINAND_OP_VARIANTS(write_cache_variants,
+		SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
+		SPINAND_PROG_LOAD(true, 0, NULL, 0));
+
+static SPINAND_OP_VARIANTS(update_cache_variants,
+		SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
+		SPINAND_PROG_LOAD(false, 0, NULL, 0));
+
+static int xt26g0xa_ooblayout_ecc(struct mtd_info *mtd, int section,
+				  struct mtd_oob_region *region)
+{
+	if (section)
+		return -ERANGE;
+
+	region->offset = 48;
+	region->length = 16;
+
+	return 0;
+}
+
+static int xt26g0xa_ooblayout_free(struct mtd_info *mtd, int section,
+				   struct mtd_oob_region *region)
+{
+	if (section)
+		return -ERANGE;
+
+	region->offset = 2;
+	region->length = mtd->oobsize - 18;
+
+	return 0;
+}
+
+static const struct mtd_ooblayout_ops xt26g0xa_ooblayout = {
+	.ecc = xt26g0xa_ooblayout_ecc,
+	.rfree = xt26g0xa_ooblayout_free,
+};
+
+static int xt26g01b_ooblayout_ecc(struct mtd_info *mtd, int section,
+				  struct mtd_oob_region *region)
+{
+	return -ERANGE;
+}
+
+static int xt26g01b_ooblayout_free(struct mtd_info *mtd, int section,
+				   struct mtd_oob_region *region)
+{
+	if (section)
+		return -ERANGE;
+
+	region->offset = 2;
+	region->length = mtd->oobsize - 2;
+
+	return 0;
+}
+
+static const struct mtd_ooblayout_ops xt26g01b_ooblayout = {
+	.ecc = xt26g01b_ooblayout_ecc,
+	.rfree = xt26g01b_ooblayout_free,
+};
+
+static int xt26g02b_ooblayout_ecc(struct mtd_info *mtd, int section,
+				  struct mtd_oob_region *region)
+{
+	if (section > 3)
+		return -ERANGE;
+
+	region->offset = (16 * section) + 8;
+	region->length = 8;
+
+	return 0;
+}
+
+static int xt26g02b_ooblayout_free(struct mtd_info *mtd, int section,
+				   struct mtd_oob_region *region)
+{
+	if (section > 3)
+		return -ERANGE;
+
+	region->offset = (16 * section) + 2;
+	region->length = 6;
+
+	return 0;
+}
+
+static const struct mtd_ooblayout_ops xt26g02b_ooblayout = {
+	.ecc = xt26g02b_ooblayout_ecc,
+	.rfree = xt26g02b_ooblayout_free,
+};
+
+/*
+ * ecc bits: 0xC0[2,5]
+ * [0x0000], No bit errors were detected;
+ * [0x0001, 0x0111], Bit errors were detected and corrected. Not
+ *	reach Flipping Bits;
+ * [0x1000], Multiple bit errors were detected and
+ *	not corrected.
+ * [0x1100], Bit error count equals the bit flip
+ *	detectionthreshold
+ * else, reserved
+ */
+static int xt26g0xa_ecc_get_status(struct spinand_device *spinand,
+				   u8 status)
+{
+	u8 eccsr = (status & GENMASK(5, 2)) >> 2;
+
+	if (eccsr <= 7)
+		return eccsr;
+	else if (eccsr == 12)
+		return 8;
+	else
+		return -EBADMSG;
+}
+
+/*
+ * ecc bits: 0xC0[4,6]
+ * [0x0], No bit errors were detected;
+ * [0x001, 0x011], Bit errors were detected and corrected. Not
+ *	reach Flipping Bits;
+ * [0x100], Bit error count equals the bit flip
+ *	detectionthreshold
+ * [0x101, 0x110], Reserved;
+ * [0x111], Multiple bit errors were detected and
+ *	not corrected.
+ */
+static int xt26g02b_ecc_get_status(struct spinand_device *spinand,
+				   u8 status)
+{
+	u8 eccsr = (status & GENMASK(6, 4)) >> 4;
+
+	if (eccsr <= 4)
+		return eccsr;
+	else
+		return -EBADMSG;
+}
+
+static const struct spinand_info xtx_spinand_table[] = {
+	SPINAND_INFO("XT26G01A", 0xE1,
+		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&xt26g0xa_ooblayout,
+				     xt26g0xa_ecc_get_status)),
+	SPINAND_INFO("XT26G02A", 0xE2,
+		     NAND_MEMORG(1, 2048, 64, 64, 2048, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&xt26g0xa_ooblayout,
+				     xt26g0xa_ecc_get_status)),
+	SPINAND_INFO("XT26G04A", 0xE3,
+		     NAND_MEMORG(1, 2048, 64, 128, 2048, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&xt26g0xa_ooblayout,
+				     xt26g0xa_ecc_get_status)),
+	SPINAND_INFO("XT26G01B", 0xF1,
+		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&xt26g01b_ooblayout,
+				     xt26g0xa_ecc_get_status)),
+	SPINAND_INFO("XT26G02B", 0xF2,
+		     NAND_MEMORG(1, 2048, 64, 64, 2048, 1, 1, 1),
+		     NAND_ECCREQ(4, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&xt26g02b_ooblayout,
+				     xt26g02b_ecc_get_status)),
+};
+
+static int xtx_spinand_detect(struct spinand_device *spinand)
+{
+	u8 *id = spinand->id.data;
+	int ret;
+
+	/*
+	 * XTX SPI NAND read ID needs a dummy byte, so the first byte in
+	 * raw_id is garbage.
+	 */
+	if (id[1] != SPINAND_MFR_XTX)
+		return 0;
+
+	ret = spinand_match_and_init(spinand, xtx_spinand_table,
+				     ARRAY_SIZE(xtx_spinand_table),
+				     id[2]);
+	if (ret)
+		return ret;
+
+	return 1;
+}
+
+static const struct spinand_manufacturer_ops xtx_spinand_manuf_ops = {
+	.detect = xtx_spinand_detect,
+};
+
+const struct spinand_manufacturer xtx_spinand_manufacturer = {
+	.id = SPINAND_MFR_XTX,
+	.name = "xtx",
+	.ops = &xtx_spinand_manuf_ops,
+};
diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
index 4789976344..5206ad60a7 100644
--- a/include/linux/mtd/spinand.h
+++ b/include/linux/mtd/spinand.h
@@ -208,6 +208,7 @@ extern const struct spinand_manufacturer toshiba_spinand_manufacturer;
 extern const struct spinand_manufacturer winbond_spinand_manufacturer;
 extern const struct spinand_manufacturer dosilicon_spinand_manufacturer;
 extern const struct spinand_manufacturer esmt_spinand_manufacturer;
+extern const struct spinand_manufacturer xtx_spinand_manufacturer;
 
 /**
  * struct spinand_op_variants - SPI NAND operation variants

commit 7d33ddceabe21714997e09222c2fdc213a8a87b5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jul 10 15:14:41 2020 +0800

    scripts: sync-fragment: use "mv" instread of "cp"
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I91365eb455ff4b79253a8666571c42847d96090e

diff --git a/scripts/sync-fragment.sh b/scripts/sync-fragment.sh
index 5e0e3b07ca..5546281ab5 100755
--- a/scripts/sync-fragment.sh
+++ b/scripts/sync-fragment.sh
@@ -45,7 +45,7 @@ fi
 cp .config fragment.config
 make ${BASE_DEFCONFIG0} ${BASE_DEFCONFIG1}
 ./scripts/diffconfig -m .config fragment.config | sort > ${FRAGMENT_CONFIG}
-cp fragment.config .config
+mv fragment.config .config
 
 echo "$MSG_NEW_FILE"
 echo "Sync ${FRAGMENT_CONFIG} ... OK."

commit e76fd377b8490412119a8e5c1645bc76ee5d4a69
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jul 10 11:57:10 2020 +0800

    configs: add rv1126-ramboot.config
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Id8bd2c4130181ab99cde514857c652ec6e7ae369

diff --git a/configs/rv1126-ramboot.config b/configs/rv1126-ramboot.config
new file mode 100644
index 0000000000..abc73eadfc
--- /dev/null
+++ b/configs/rv1126-ramboot.config
@@ -0,0 +1,40 @@
+# CONFIG_ARM_CPU_SUSPEND is not set
+CONFIG_BASE_DEFCONFIG="rv1126_defconfig"
+# CONFIG_CMD_GPT is not set
+# CONFIG_CMD_MMC is not set
+# CONFIG_CMD_MTD_BLK is not set
+# CONFIG_CMD_NAND is not set
+# CONFIG_CMD_SF is not set
+# CONFIG_CMD_SPI is not set
+# CONFIG_CMD_TFTP_FLASH is not set
+# CONFIG_CMD_USB is not set
+# CONFIG_CMD_USB_MASS_STORAGE is not set
+# CONFIG_DISPLAY is not set
+# CONFIG_DM_FUEL_GAUGE is not set
+# CONFIG_DM_MMC is not set
+CONFIG_DM_RAMDISK=y
+# CONFIG_DM_VIDEO is not set
+# CONFIG_I2C_EDID is not set
+CONFIG_LOADER_INI="RV1126MINIALL_RAMBOOT.ini"
+# CONFIG_MMC is not set
+# CONFIG_MTD_DEVICE is not set
+# CONFIG_MTD is not set
+# CONFIG_MTD_NAND_BBT_USING_FLASH is not set
+# CONFIG_NAND is not set
+# CONFIG_OPTEE_CLIENT is not set
+# CONFIG_OPTEE_V2 is not set
+# CONFIG_PHY is not set
+CONFIG_RAMDISK_RO=y
+CONFIG_RKPARM_PARTITION=y
+# CONFIG_ROCKCHIP_FIT_IMAGE_PACK is not set
+# CONFIG_ROCKCHIP_SFC is not set
+# CONFIG_ROCKCHIP_VENDOR_PARTITION is not set
+# CONFIG_SPI_FLASH is not set
+# CONFIG_SPI_MEM is not set
+# CONFIG_SPL_DM_SERIAL is not set
+# CONFIG_SPL is not set
+# CONFIG_TPL_DM_SERIAL is not set
+# CONFIG_TPL_RAM is not set
+# CONFIG_USB is not set
+# CONFIG_VIDEO_BRIDGE is not set
+# CONFIG_VIDEO is not set

commit bbe1b3dd1eccdc5b734f4ed86dc574624efe1d9e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jul 9 20:10:01 2020 +0800

    configs: add rv1109-emmc-tb.config
    
    It overlays rv1126-emmc-tb.config.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I2818f97908e61cbf249a59e59110d491a498a6d5

diff --git a/configs/rv1109-emmc-tb.config b/configs/rv1109-emmc-tb.config
new file mode 100644
index 0000000000..c00014c637
--- /dev/null
+++ b/configs/rv1109-emmc-tb.config
@@ -0,0 +1,5 @@
+CONFIG_BASE_DEFCONFIG="rv1126-emmc-tb.config"
+CONFIG_DEFAULT_DEVICE_TREE="rv1109-evb"
+CONFIG_LOADER_INI="RV1109MINIALL_EMMC_TB.ini"
+CONFIG_ROCKCHIP_RV1109=y
+CONFIG_TRUST_INI="RV1109TOS_TB.ini"

commit 1b6a23121be2013bc1f274ce72e9d98b5bf3d1cb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jul 10 09:43:44 2020 +0800

    configs: rv1126/1109: assign loader and trust ini file
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I90784dca5dfebc96a0336843995a0055ce40242e

diff --git a/configs/rv1109.config b/configs/rv1109.config
index 17dae97828..661c82c897 100644
--- a/configs/rv1109.config
+++ b/configs/rv1109.config
@@ -1,4 +1,6 @@
 CONFIG_BASE_DEFCONFIG="rv1126_defconfig"
 CONFIG_DEFAULT_DEVICE_TREE="rv1109-evb"
+CONFIG_LOADER_INI="RV1109MINIALL.ini"
 CONFIG_OF_LIST="rv1109-evb"
 CONFIG_ROCKCHIP_RV1109=y
+CONFIG_TRUST_INI="RV1109TOS.ini"
diff --git a/configs/rv1126-emmc-tb.config b/configs/rv1126-emmc-tb.config
index f286916de8..df91d10951 100644
--- a/configs/rv1126-emmc-tb.config
+++ b/configs/rv1126-emmc-tb.config
@@ -17,6 +17,7 @@ CONFIG_BASE_DEFCONFIG="rv1126_defconfig"
 # CONFIG_FIT is not set
 # CONFIG_I2C_EDID is not set
 # CONFIG_LAVA_INFO is not set
+CONFIG_LOADER_INI="RV1126MINIALL_EMMC_TB.ini"
 # CONFIG_MTD_DEVICE is not set
 # CONFIG_MTD is not set
 # CONFIG_MTD_NAND_BBT_USING_FLASH is not set
@@ -70,5 +71,6 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x4000
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
 CONFIG_TEST_ROCKCHIP=y
 CONFIG_TPL_SYS_MALLOC_F_LEN=0xc000
+CONFIG_TRUST_INI="RV1126TOS_TB.ini"
 # CONFIG_VIDEO_BRIDGE is not set
 # CONFIG_VIDEO is not set
diff --git a/configs/rv1126-spi-nor-tb.config b/configs/rv1126-spi-nor-tb.config
index 78087af35d..069fe8f25f 100644
--- a/configs/rv1126-spi-nor-tb.config
+++ b/configs/rv1126-spi-nor-tb.config
@@ -15,6 +15,7 @@ CONFIG_BASE_DEFCONFIG="rv1126_defconfig"
 # CONFIG_FIT is not set
 # CONFIG_I2C_EDID is not set
 # CONFIG_LAVA_INFO is not set
+CONFIG_LOADER_INI="RV1126MINIALL_SPI_NOR_TB.ini"
 # CONFIG_MMC_DW is not set
 # CONFIG_MTD_NAND_BBT_USING_FLASH is not set
 # CONFIG_MTD_SPI_NAND is not set
@@ -57,5 +58,6 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x4000
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
 CONFIG_TEST_ROCKCHIP=y
 CONFIG_TPL_SYS_MALLOC_F_LEN=0xc000
+CONFIG_TRUST_INI="RV1126TOS_TB.ini"
 # CONFIG_VIDEO_BRIDGE is not set
 # CONFIG_VIDEO is not set

commit d07fced289a11feb58b9838bde2e465b612716f8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jul 10 10:38:47 2020 +0800

    scripts: sync-fragment.sh: support nested
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I37605b2c65c0908aeda20e8a5551c2e630a49732

diff --git a/scripts/sync-fragment.sh b/scripts/sync-fragment.sh
index ace2823667..5e0e3b07ca 100755
--- a/scripts/sync-fragment.sh
+++ b/scripts/sync-fragment.sh
@@ -25,23 +25,25 @@ if [ ! -f .config ]; then
 	exit 1
 fi
 
-BASE_DEFCONFIG=`sed -n "/CONFIG_BASE_DEFCONFIG=/s/CONFIG_BASE_DEFCONFIG=//p" .config | tr -d '\r' | tr -d '"'`
-if [ -z "${BASE_DEFCONFIG}" ]; then
-	echo "ERROR: No base defconfig assigned by BASE_DEFCONFIG=..."
+BASE_DEFCONFIG1=`sed -n "/CONFIG_BASE_DEFCONFIG=/s/CONFIG_BASE_DEFCONFIG=//p" .config | tr -d '\r' | tr -d '"'`
+if [ -z "${BASE_DEFCONFIG1}" ]; then
+	echo "ERROR: No base defconfig assigned by BASE_DEFCONFIG1=..."
 	exit 1
 fi
 
-if [ ! -f configs/${BASE_DEFCONFIG} ]; then
-	echo "ERROR: No base defconfig \"${BASE_DEFCONFIG}\""
+if [ ! -f configs/${BASE_DEFCONFIG1} ]; then
+	echo "ERROR: No base defconfig \"${BASE_DEFCONFIG1}\""
 	exit 1
 fi
 
+BASE_DEFCONFIG0=`sed -n "/CONFIG_BASE_DEFCONFIG=/s/CONFIG_BASE_DEFCONFIG=//p" configs/${BASE_DEFCONFIG1} | tr -d '\r' | tr -d '"'`
+
 if [ ! -f ${FRAGMENT_CONFIG} ]; then
 	MSG_NEW_FILE="New config fragment: ${FRAGMENT_CONFIG}"
 fi
 
 cp .config fragment.config
-make ${BASE_DEFCONFIG}
+make ${BASE_DEFCONFIG0} ${BASE_DEFCONFIG1}
 ./scripts/diffconfig -m .config fragment.config | sort > ${FRAGMENT_CONFIG}
 cp fragment.config .config
 

commit 1df865f3f310521a2a3cd59eba95a5bf9d212162
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jul 9 16:32:06 2020 +0800

    make.sh: config fragment support nested
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I200b6aa12684d53e6ddddb333696423a4c351f67

diff --git a/make.sh b/make.sh
index 4d4a7524ae..5bcf5c87ae 100755
--- a/make.sh
+++ b/make.sh
@@ -227,16 +227,12 @@ function process_args()
 						echo "ERROR: No configs/${ARG_BOARD}_defconfig"
 						exit 1
 					elif [ -f configs/${ARG_BOARD}.config ]; then
-						BASE_DEFCONFIG=`sed -n "/CONFIG_BASE_DEFCONFIG=/s/CONFIG_BASE_DEFCONFIG=//p" configs/${ARG_BOARD}.config |tr -d '\r' | tr -d '"'`
-						MAKE_CMD="make ${BASE_DEFCONFIG} ${ARG_BOARD}.config -j${JOB}"
+						BASE1_DEFCONFIG=`sed -n "/CONFIG_BASE_DEFCONFIG=/s/CONFIG_BASE_DEFCONFIG=//p" configs/${ARG_BOARD}.config |tr -d '\r' | tr -d '"'`
+						BASE0_DEFCONFIG=`sed -n "/CONFIG_BASE_DEFCONFIG=/s/CONFIG_BASE_DEFCONFIG=//p" configs/${BASE1_DEFCONFIG} |tr -d '\r' | tr -d '"'`
+						MAKE_CMD="make ${BASE0_DEFCONFIG} ${BASE1_DEFCONFIG} ${ARG_BOARD}.config -j${JOB}"
 						echo "## ${MAKE_CMD}"
-						make ${BASE_DEFCONFIG} ${ARG_BOARD}.config ${OPTION}
+						make ${BASE0_DEFCONFIG} ${BASE1_DEFCONFIG} ${ARG_BOARD}.config ${OPTION}
 					else
-						BASE_DEFCONFIG=`sed -n "/CONFIG_BASE_DEFCONFIG=/s/CONFIG_BASE_DEFCONFIG=//p" configs/${ARG_BOARD}_defconfig |tr -d '\r' | tr -d '"'`
-						if [ "${BASE_DEFCONFIG}" == "${ARG_BOARD}_defconfig" ]; then
-							echo "ERROR: configs/${ARG_BOARD}_defconfig is base defconfig for other [...].config"
-							exit 1
-						fi
 						MAKE_CMD="make ${ARG_BOARD}_defconfig -j${JOB}"
 						echo "## ${MAKE_CMD}"
 						make ${ARG_BOARD}_defconfig ${OPTION}

commit 496a6e1e02ce707a7e77394dba2e3c109bfd326e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jul 10 09:36:54 2020 +0800

    make.sh: support get loader and trust ini from .config
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ia68f394e19565af5e518387e356f58ac24e4b09e

diff --git a/make.sh b/make.sh
index 1401e573d6..4d4a7524ae 100755
--- a/make.sh
+++ b/make.sh
@@ -499,6 +499,7 @@ function fixup_platform_configure()
 	fi
 }
 
+# Priority: default < CHIP_TYPE_FIXUP_TABLE() < defconfig < make.sh args
 function select_ini_file()
 {
 	# default
@@ -509,6 +510,16 @@ function select_ini_file()
 		INI_TRUST=${RKBIN}/RKTRUST/${RKCHIP_TRUST}TOS.ini
 	fi
 
+	# defconfig
+	NAME=`sed -n "/CONFIG_LOADER_INI=/s/CONFIG_LOADER_INI=//p" .config |tr -d '\r' | tr -d '"'`
+	if [ ! -z "${NAME}" ]; then
+		INI_LOADER=${RKBIN}/RKBOOT/${NAME}
+	fi
+	NAME=`sed -n "/CONFIG_TRUST_INI=/s/CONFIG_TRUST_INI=//p" .config |tr -d '\r' | tr -d '"'`
+	if [ ! -z "${NAME}" ]; then
+		INI_TRUST=${RKBIN}/RKTRUST/${NAME}
+	fi
+
 	# args
 	if [ "${ARG_INI_TRUST}" != "" ]; then
 		INI_TRUST=${ARG_INI_TRUST}

commit 6e24d50beff999fbdfb9bba3381b7e8bccce139c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jul 10 09:17:46 2020 +0800

    rockchip: Kconfig: add loader and trust ini options
    
    There are too many product assortments of defconfig
    and ini file on some platform, so we have to add
    options to bind ini file with defconfig.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I4876489d2af99b43ba3fa214a16b2d65919ed138

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 47329e42e3..9eb9dff7ee 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -747,6 +747,18 @@ config BASE_DEFCONFIG
 	help
 	  Indicate the base defconfig of config fragment.
 
+config LOADER_INI
+	string "Name of Loader ini file in rkbin repository"
+	default ""
+	help
+	  The ini file is used to pack loader image.
+
+config TRUST_INI
+	string "Name of Trust ini file in rkbin repository"
+	default ""
+	help
+	  The ini file is used to pack trust image.
+
 config GICV2
 	bool "ARM GICv2"
 

commit 216f7ce88fe6a86a8abef2969d2d710f2883a245
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jul 10 09:16:49 2020 +0800

    Kconfig: move CONFIG_BASE_DEFCONFIG to rockchip Kconfig
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ibae643de69aa59b8da048286fde2d736d570272d

diff --git a/Kconfig b/Kconfig
index 081a743321..1d3c0e2c88 100644
--- a/Kconfig
+++ b/Kconfig
@@ -59,12 +59,6 @@ config CC_OPTIMIZE_FOR_SIZE
 
 	  This option is enabled by default for U-Boot.
 
-config BASE_DEFCONFIG
-	string "Base defconfig of config fragment"
-	default ""
-	help
-	  Indicate the base defconfig of config fragment.
-
 config DISTRO_DEFAULTS
 	bool "Select defaults suitable for booting general purpose Linux distributions"
 	default y if ARCH_SUNXI || TEGRA
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index eaa2ebff8f..47329e42e3 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -741,6 +741,12 @@ config ROCKCHIP_UART_MUX_SEL_M
 	help
 	  This select uart multiplexer for debug uart iomux in board_debug_uart_init.
 
+config BASE_DEFCONFIG
+	string "Base defconfig of config fragment"
+	default ""
+	help
+	  Indicate the base defconfig of config fragment.
+
 config GICV2
 	bool "ARM GICv2"
 

commit e21613fbf5e7398a3012351ebc9c1f9d257c8329
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Thu Jul 9 20:36:26 2020 +0800

    pinctrl: rockchip: fix rk3308 nr_pins to 160
    
    Change-Id: Ib3d1d9149d222c8fe60bbfe20bdc9f1dadbeabe8
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 663a07c19d..85f90c9173 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -3569,6 +3569,7 @@ static struct rockchip_pin_bank rk3308_pin_banks[] = {
 static struct rockchip_pin_ctrl rk3308_pin_ctrl = {
 		.pin_banks		= rk3308_pin_banks,
 		.nr_banks		= ARRAY_SIZE(rk3308_pin_banks),
+		.nr_pins		= 160,
 		.label			= "RK3308-GPIO",
 		.type			= RK3308,
 		.grf_mux_offset		= 0x0,

commit bc0a7e781e2228a51341620c920746e5c3e99d47
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jul 8 21:22:15 2020 +0800

    scripts: add script to support repack fit
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I5e132193c62b1ff85ec5248668a74636c0b13165

diff --git a/scripts/fit-repack.sh b/scripts/fit-repack.sh
new file mode 100755
index 0000000000..cea5251deb
--- /dev/null
+++ b/scripts/fit-repack.sh
@@ -0,0 +1,88 @@
+#!/bin/bash
+#
+# Copyright (c) 2020 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier: GPL-2.0
+#
+set -e
+
+MKIMAGE="./tools/mkimage"
+UNPACK="./scripts/fit-unpack.sh"
+OFFS="0xa00"
+OUT="out/repack"
+ITB="out/repack/image.itb"
+ITS="out/repack/image.its"
+
+function usage_repack()
+{
+	echo
+	echo "usage:"
+	echo "    $0 -f [image] -d [data dir]"
+	echo
+}
+
+function fit_repack()
+{
+	if [ $# -ne 4 ]; then
+		usage_repack
+		exit 1
+	fi
+
+	while [ $# -gt 0 ]; do
+		case $1 in
+			-f)
+				IMAGE=$2
+				shift 2
+				;;
+			-d)
+				DATA=$2
+				shift 2
+				;;
+			*)
+				usage_repack
+				exit 1
+				;;
+		esac
+	done
+
+	if [ ! -f ${IMAGE} ]; then
+		echo "ERROR: No ${IMAGE}"
+		exit 1
+	elif [ ! -d ${DATA} ]; then
+		echo "ERROR: No input directory ${DATA}"
+		exit 1
+	fi
+
+	COPIES=`strings ${IMAGE} | grep "rollback-index"  | wc -l`
+	if [ ${COPIES} -eq 0 ]; then
+		echo "ERROR: Invalid fit image"
+		exit 1
+	fi
+
+	IMAGE_BS=`ls -l ${IMAGE} | awk '{ print $5 }'`
+	ITB_SZ_KB=`expr ${IMAGE_BS} / ${COPIES} / 1024`
+
+	rm -rf ${OUT}
+	mkdir -p ${OUT}
+	${UNPACK} -f ${IMAGE} -o ${OUT}/
+	cp ${DATA}/* ${OUT}/
+
+	if fdtget -l ${IMAGE} /images/uboot >/dev/null 2>&1 ; then
+		rm -f ${IMAGE}
+		${MKIMAGE} -f ${ITS} -E -p ${OFFS} ${ITB}
+		for ((i = 0; i < ${COPIES}; i++));
+		do
+			cat ${ITB} >> ${IMAGE}
+			truncate -s %${ITB_SZ_KB}K ${IMAGE}
+		done
+	else
+		${MKIMAGE} -f ${ITS} -E -p ${OFFS} ${IMAGE}
+	fi
+
+	rm ${OUT} -rf
+	echo
+	echo "Image(repack):  ${IMAGE} is ready"
+}
+
+fit_repack $*
+

commit 1de0df451208c7a0ec0032301452bd2a0862931d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 15 18:22:38 2020 +0800

    scripts: fit: support set image version of uboot.img and boot.img
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I1fafa347e3b3f53d4987b145642bb96726870ee3

diff --git a/scripts/fit-mkimg.sh b/scripts/fit-mkimg.sh
index 66db8347eb..8b8d0666c6 100755
--- a/scripts/fit-mkimg.sh
+++ b/scripts/fit-mkimg.sh
@@ -39,6 +39,8 @@ UBOOT_DTB="u-boot.dtb"
 # its
 ITS_UBOOT="u-boot.its"
 ITS_BOOT="boot.its"
+ARG_VER_UBOOT="0"
+ARG_VER_BOOT="0"
 
 function help()
 {
@@ -49,6 +51,8 @@ function help()
 	echo "args:"
 	echo "    --rollback-index-boot   <decimal integer>"
 	echo "    --rollback-index-uboot  <decimal integer>"
+	echo "    --version-uboot         <decimal integer>"
+	echo "    --version-boot          <decimal integer>"
 	echo "    --ini-trust"
 	echo "    --ini-loader"
 	echo "    --no-vboot"
@@ -95,7 +99,7 @@ function validate_arg()
 		--uboot-itb|--boot-itb|--no-vboot|--no-rebuild|--no-check|--spl-new)
 			shift=1
 			;;
-		--ini-trust|--ini-loader|--rollback-index-boot|--rollback-index-uboot|--boot_img)
+		--ini-trust|--ini-loader|--rollback-index-boot|--rollback-index-uboot|--boot_img|--version-uboot|--version-boot)
 			shift=2
 			;;
 		*)
@@ -164,6 +168,16 @@ function fit_process_args()
 				ARG_EXT_BOOT=$2
 				shift 2
 				;;
+			--version-uboot)
+				ARG_VER_UBOOT=$2
+				arg_check_decimal $2
+				shift 2
+				;;
+			--version-boot)
+				ARG_VER_BOOT=$2
+				arg_check_decimal $2
+				shift 2
+				;;
 			*)
 				help
 				exit 1
@@ -188,7 +202,7 @@ function fit_gen_uboot_itb()
 	check_its ${ITS_UBOOT}
 
 	if [ "${ARG_NO_VBOOT}" == "y" ]; then
-		${MKIMAGE} -f ${ITS_UBOOT} -E -p ${OFFS_NS_UBOOT} ${ITB_UBOOT}
+		${MKIMAGE} -f ${ITS_UBOOT} -E -p ${OFFS_NS_UBOOT} ${ITB_UBOOT} -v ${ARG_VER_UBOOT}
 		if [ "${ARG_SPL_NEW}" == "y" ]; then
 			./make.sh spl-s ${ARG_INI_LOADER}
 			echo "pack loader with new: spl/u-boot-spl.bin"
@@ -224,12 +238,12 @@ function fit_gen_uboot_itb()
 
 		# u-boot.dtb must contains rsa key
 		if ! fdtget -l ${UBOOT_DTB} /signature >/dev/null 2>&1 ; then
-			${MKIMAGE} -f ${ITS_UBOOT} -k ${KEY_DIR} -K ${UBOOT_DTB} -E -p ${OFFS_S_UBOOT} -r ${ITB_UBOOT}
+			${MKIMAGE} -f ${ITS_UBOOT} -k ${KEY_DIR} -K ${UBOOT_DTB} -E -p ${OFFS_S_UBOOT} -r ${ITB_UBOOT} -v ${ARG_VER_UBOOT}
 			echo "Adding RSA public key into ${UBOOT_DTB}"
 		fi
 
 		# Pack
-		${MKIMAGE} -f ${ITS_UBOOT} -k ${KEY_DIR} -K ${SPL_DTB} -E -p ${OFFS_S_UBOOT} -r ${ITB_UBOOT}
+		${MKIMAGE} -f ${ITS_UBOOT} -k ${KEY_DIR} -K ${SPL_DTB} -E -p ${OFFS_S_UBOOT} -r ${ITB_UBOOT} -v ${ARG_VER_UBOOT}
 		mv ${SIG_BIN} ${SIG_UBOOT}
 
 		# rollback-index read back check
@@ -305,7 +319,7 @@ function fit_gen_boot_itb()
 	fi
 
 	if [ "${ARG_NO_VBOOT}" == "y" ]; then
-		${MKIMAGE} -f ${ITS_BOOT} -E -p ${OFFS_NS_BOOT} ${ITB_BOOT}
+		${MKIMAGE} -f ${ITS_BOOT} -E -p ${OFFS_NS_BOOT} ${ITB_BOOT} -v ${ARG_VER_BOOT}
 	else
 		if [ ! -f ${RSA_PRI_KEY}  ]; then
 			echo "ERROR: No ${RSA_PRI_KEY}"
@@ -345,7 +359,7 @@ function fit_gen_boot_itb()
 			sed -i "s/${VERSION}/ <${ARG_ROLLBACK_IDX_BOOT}>;/g" ${ITS_BOOT}
 		fi
 
-		${MKIMAGE} -f ${ITS_BOOT} -k ${KEY_DIR} -K ${UBOOT_DTB} -E -p ${OFFS_S_BOOT} -r ${ITB_BOOT}
+		${MKIMAGE} -f ${ITS_BOOT} -k ${KEY_DIR} -K ${UBOOT_DTB} -E -p ${OFFS_S_BOOT} -r ${ITB_BOOT} -v ${ARG_VER_BOOT}
 		mv ${SIG_BIN} ${SIG_BOOT}
 
 		# rollback-index read back check
@@ -419,30 +433,40 @@ function fit_gen_boot_img()
 function fit_msg_uboot()
 {
 	if [ "${ARG_NO_VBOOT}" == "y" ]; then
-		MSG="no-signed"
+		MSG_SIGN="no-signed"
 	else
-		MSG="signed"
+		MSG_SIGN="signed"
+	fi
+
+	VERSION=`fdtget -ti ${ITB_UBOOT} / version`
+	if [ "${VERSION}" != "" ]; then
+		MSG_VER=", version=${VERSION}"
 	fi
 
 	if [ "${ARG_SPL_ROLLBACK_PROTECT}" == "y" ]; then
-		echo "Image(${MSG}, rollback-index=${ARG_ROLLBACK_IDX_UBOOT}):  ${IMG_UBOOT} (with uboot, trust...) is ready"
+		echo "Image(${MSG_SIGN}${MSG_VER}, rollback-index=${ARG_ROLLBACK_IDX_UBOOT}):  ${IMG_UBOOT} (with uboot, trust...) is ready"
 	else
-		echo "Image(${MSG}):  ${IMG_UBOOT} (FIT with uboot, trust...) is ready"
+		echo "Image(${MSG_SIGN}${MSG_VER}):  ${IMG_UBOOT} (FIT with uboot, trust...) is ready"
 	fi
 }
 
 function fit_msg_boot()
 {
 	if [ "${ARG_NO_VBOOT}" == "y" ]; then
-		MSG="no-signed"
+		MSG_SIGN="no-signed"
 	else
-		MSG="signed"
+		MSG_SIGN="signed"
+	fi
+
+	VERSION=`fdtget -ti ${ITB_BOOT} / version`
+	if [ "${VERSION}" != "" ]; then
+		MSG_VER=", version=${VERSION}"
 	fi
 
 	if [ "${ARG_ROLLBACK_PROTECT}" == "y" ]; then
-		echo "Image(${MSG}, rollback-index=${ARG_ROLLBACK_IDX_BOOT}):  ${IMG_BOOT} is ready"
+		echo "Image(${MSG_SIGN}${MSG_VER}, rollback-index=${ARG_ROLLBACK_IDX_BOOT}):  ${IMG_BOOT} is ready"
 	else
-		echo "Image(${MSG}):  ${IMG_BOOT} (FIT with kernel, fdt, resource...) is ready"
+		echo "Image(${MSG_SIGN}${MSG_VER}):  ${IMG_BOOT} (FIT with kernel, fdt, resource...) is ready"
 	fi
 }
 

commit ad07c38f68e9ad3985f128f2a347460cdd3931a1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 15 18:21:06 2020 +0800

    tools: mkimage: support set FIT image version
    
    Command: "./mkimage ... -v [version]".
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I84dd5c3d7380150f428cdd0c2055929343bf2138

diff --git a/common/image-fit.c b/common/image-fit.c
index 0a6c105d00..3ebaf53d0d 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -1131,6 +1131,19 @@ int fit_set_totalsize(void *fit, int noffset, int totalsize)
 	return 0;
 }
 
+int fit_set_version(void *fit, int noffset, int version)
+{
+	uint32_t v;
+	int ret;
+
+	v = cpu_to_uimage(version);
+	ret = fdt_setprop(fit, noffset, FIT_VERSION_PROP, &v, sizeof(uint32_t));
+	if (ret)
+		return ret == -FDT_ERR_NOSPACE ? -ENOSPC : -1;
+
+	return 0;
+}
+
 int fit_calculate_hash(const void *data, int data_len,
 		       const char *algo, uint8_t *value,
 		       int *value_len)
diff --git a/include/image.h b/include/image.h
index b5fd1c84c9..2fe98b4680 100644
--- a/include/image.h
+++ b/include/image.h
@@ -920,6 +920,7 @@ int bootz_setup(ulong image, ulong *start, ulong *end);
 #define FIT_DATA_SIZE_PROP	"data-size"
 #define FIT_TIMESTAMP_PROP	"timestamp"
 #define FIT_TOTALSIZE_PROP	"totalsize"
+#define FIT_VERSION_PROP	"version"
 #define FIT_DESC_PROP		"description"
 #define FIT_ARCH_PROP		"arch"
 #define FIT_TYPE_PROP		"type"
@@ -1028,6 +1029,7 @@ int fit_image_check_hash(const void *fit, int noffset, const void *data,
 
 int fit_set_timestamp(void *fit, int noffset, time_t timestamp);
 int fit_set_totalsize(void *fit, int noffset, int totalsize);
+int fit_set_version(void *fit, int noffset, int version);
 
 /**
  * fit_add_verification_data() - add verification data to FIT image nodes
diff --git a/tools/fit_image.c b/tools/fit_image.c
index 8442e72bff..d1ce07209b 100644
--- a/tools/fit_image.c
+++ b/tools/fit_image.c
@@ -101,6 +101,10 @@ static int fit_add_file_data(struct image_tool_params *params, size_t size_inc,
 		time_t time = imagetool_get_source_date(params, sbuf.st_mtime);
 		ret  = fit_set_timestamp(ptr, 0, time);
 		ret |= fit_set_totalsize(ptr, 0, sbuf.st_size);
+		if (params->vflag > 0)
+			ret |= fit_set_version(ptr, 0, params->vflag);
+		else
+			ret |= fit_set_version(ptr, 0, 0);
 	}
 
 	if (!ret) {
diff --git a/tools/mkimage.c b/tools/mkimage.c
index fce304f400..10c1d33950 100644
--- a/tools/mkimage.c
+++ b/tools/mkimage.c
@@ -95,7 +95,9 @@ static void usage(const char *msg)
 	fprintf(stderr,
 		"          -D => set all options for device tree compiler\n"
 		"          -f => input filename for FIT source\n"
-		"          -i => input filename for ramdisk file\n");
+		"          -i => input filename for ramdisk file\n"
+		"          -v => set FIT image version in decimal\n");
+
 #ifdef CONFIG_FIT_SIGNATURE
 	fprintf(stderr,
 		"Signing / verified boot options: [-E] [-k keydir] [-K dtb] [ -c <comment>] [-p addr] [-r] [-N engine]\n"
@@ -144,7 +146,7 @@ static void process_args(int argc, char **argv)
 	int opt;
 
 	while ((opt = getopt(argc, argv,
-			     "a:A:b:c:C:d:D:e:Ef:Fk:i:K:ln:N:p:O:rR:qsT:vVxX:")) != -1) {
+			     "a:A:b:c:C:d:D:e:Ef:Fk:i:K:ln:N:p:O:rR:qsT:v:VxX:")) != -1) {
 		switch (opt) {
 		case 'a':
 			params.addr = strtoull(optarg, &ptr, 16);
@@ -271,7 +273,12 @@ static void process_args(int argc, char **argv)
 			}
 			break;
 		case 'v':
-			params.vflag++;
+			params.vflag = strtoull(optarg, &ptr, 10);
+			if (*ptr) {
+				fprintf(stderr, "%s: invalid version length %s\n",
+					params.cmdname, optarg);
+				exit(EXIT_FAILURE);
+			}
 			break;
 		case 'V':
 			printf("mkimage version %s\n", PLAIN_VERSION);

commit 15d854a1924948928adfdd0abe31a300e07ba684
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jun 5 09:54:41 2020 +0800

    configs: add README.rockchip
    
    Short introduction of all rockchip platform defconfig.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I44b0621741e1b7fa3243a15e7313546bbd368d21

diff --git a/configs/README.rockchip b/configs/README.rockchip
new file mode 100644
index 0000000000..db62e53f75
--- /dev/null
+++ b/configs/README.rockchip
@@ -0,0 +1,120 @@
+/*
+ * (C) Copyright 2020 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+All platform defconfigs of Rockchip SDK
+=======================================
+
+	|-----------------------|-----------------------------|
+	|    rv1108             |    evb-rv1108_defconfig     |
+	|-----------------------|-----------------------------|
+	|    rv1126             |    rv1126_defconfig         |
+	|-----------------------|-----------------------------|
+	|    rv1109             |    rv1109.config            |
+	|-----------------------|-----------------------------|
+	|    rk1806             |    rk1806_defconfig         |
+	|-----------------------|-----------------------------|
+	|    rk1808             |    rk1808_defconfig         |
+	|-----------------------|-----------------------------|
+	|    rk3036             |    rk3036_defconfig         |
+	|-----------------------|-----------------------------|
+	|    rk3128x            |    rk3128x_defconfig        |
+	|-----------------------|-----------------------------|
+	|    rk3126             |    rk3126_defconfig         |
+	|-----------------------|-----------------------------|
+	|    rk322x             |    rk322x_defconfig         |
+	|-----------------------|-----------------------------|
+	|    rk3288             |    rk3288_defconfig         |
+	|-----------------------|-----------------------------|
+	|    rk3368             |    rk3368_defconfig         |
+	|-----------------------|-----------------------------|
+	|    rk3328             |    rk3328_defconfig         |
+	|-----------------------|-----------------------------|
+	|    rk3399             |    rk3399_defconfig         |
+	|-----------------------|-----------------------------|
+	|    rk3399pro          |    rk3399pro_defconfig      |
+	|-----------------------|-----------------------------|
+	|    rk3399pro-npu      |    rknpu-lion_defconfig     |
+	|-----------------------|-----------------------------|
+	|    rk3308             |    rk3308_defconfig         |
+	|-----------------------|-----------------------------|
+	|    rk3308-aarch32     |    rk3308-aarch32_defconfig |
+	|-----------------------|-----------------------------|
+	|    px30               |    px30_defconfig           |
+	|-----------------------|-----------------------------|
+	|    rk3326             |    rk3326_defconfig         |
+	|-----------------------|-----------------------------|
+	|    rk3326-aarch32     |    rk3326-aarch32_defconfig |
+	|-----------------------|-----------------------------|
+
+	We add config fragment support for some platform the name like: foo.config.
+	There is BASE_DEFCONFIG configure to indicate the base defconfig of it.
+
+	Usage example:
+		./make.sh rv1109
+
+		It equals: make rv1126_defconfig rv1109.config && make.
+
+
+All rv1126 & rv1109 defconfigs
+==============================
+
+	rv1126_defconfig
+	----------------
+			It provides the full features that what we want on rv1126.
+
+	rv1126-emmc-tb.config
+	---------------------
+			It provides the thunder boot feature on eMMC board of rv1126.
+			"tb": thunder-boot.
+
+	rv1126-spi-nor-tb.config
+	------------------------
+			Similar to rv1126-emmc-tb.config, it provides the thunder boot feature on spi nor
+			board of rv1126.
+
+	rv1126-usbplug.config
+	---------------------
+			It provides the open source usbplug support by U-Boot project.
+
+			There is ./usbplug.bin after compilation, that can be used to replace the usbplug
+			file in the rkbin project.
+
+	rv1126-ramboot.config
+	---------------------
+			It provides the ram boot features on rv1126, only U-Boot proper is build.
+
+	rv1126-mini-template_defconfig
+	------------------------------
+			It provides a template to generate <u-boot.bin> with small size for eMMC board with
+			some basic features, developer is easy to enable/disable more features base on it.
+
+			If developer wants to get a even smaller u-boot.bin, try to disable the following
+			configurations accordding to board requirement.
+
+			[*] Remove Power(15KB):
+				# CONFIG_DM_PMIC is not set
+				# CONFIG_DM_REGULATOR is not set
+				# CONFIG_DM_REGULATOR_FIXED is not set
+				# CONFIG_DM_PWM is not set
+				# CONFIG_DM_I2C is not set
+
+			[*] Remove USB(55KB):
+				# CONFIG_USB is not set
+				# CONFIG_PHY_ROCKCHIP_NANENG_USB2 is not set
+
+				- No USB is available that U-Boot fallbacks to bootrom download mode with Menu key.
+				- Recovery key is always used to enter recovery boot mode.
+
+			[*] Remove Command-interface(33KB):
+				# CONFIG_CMDLINE is not set
+				CONFIG_U_BOOT_CMD_ALWAYS=y
+
+				- Only the command that with U_BOOT_CMD_ALWAYS() delcared is available.
+
+	rv1109-[...].config
+	-------------------
+			It provides the almost features the same as rv1126-[...]_defconfig.
+

commit 89a533b217c64ab376cc32ca92a707bf08ff27b9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 7 17:16:31 2020 +0800

    configs: rv1109_defconfig => rv1109.config
    
    It overlays rv1126_defconfig.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I4507019b7ebc0942d7c7aa1ca9a8558b935d6660

diff --git a/configs/rv1109.config b/configs/rv1109.config
new file mode 100644
index 0000000000..17dae97828
--- /dev/null
+++ b/configs/rv1109.config
@@ -0,0 +1,4 @@
+CONFIG_BASE_DEFCONFIG="rv1126_defconfig"
+CONFIG_DEFAULT_DEVICE_TREE="rv1109-evb"
+CONFIG_OF_LIST="rv1109-evb"
+CONFIG_ROCKCHIP_RV1109=y
diff --git a/configs/rv1109_defconfig b/configs/rv1109_defconfig
deleted file mode 100644
index 625c8a6011..0000000000
--- a/configs/rv1109_defconfig
+++ /dev/null
@@ -1,149 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SPL_LIBCOMMON_SUPPORT=y
-CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SYS_MALLOC_F_LEN=0xc000
-CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh"
-CONFIG_ROCKCHIP_RV1109=y
-CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
-CONFIG_ROCKCHIP_FIT_IMAGE=y
-CONFIG_ROCKCHIP_UIMAGE=y
-CONFIG_ROCKCHIP_VENDOR_PARTITION=y
-CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y
-CONFIG_ROCKCHIP_UART_MUX_SEL_M=2
-CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
-CONFIG_TARGET_EVB_RV1126=y
-CONFIG_SPL_NAND_SUPPORT=y
-CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
-CONFIG_DEFAULT_DEVICE_TREE="rv1109-evb"
-CONFIG_DEBUG_UART=y
-CONFIG_FIT=y
-CONFIG_FIT_HW_CRYPTO=y
-CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_HW_CRYPTO=y
-# CONFIG_SPL_SYS_DCACHE_OFF is not set
-CONFIG_BOOTDELAY=0
-CONFIG_SYS_CONSOLE_INFO_QUIET=y
-# CONFIG_DISPLAY_CPUINFO is not set
-CONFIG_ANDROID_BOOTLOADER=y
-CONFIG_SPL_BOARD_INIT=y
-# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
-# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
-CONFIG_SPL_SHA256_SUPPORT=y
-CONFIG_SPL_CRYPTO_SUPPORT=y
-CONFIG_SPL_HASH_SUPPORT=y
-CONFIG_SPL_MTD_SUPPORT=y
-CONFIG_SPL_OPTEE=y
-CONFIG_FASTBOOT_BUF_ADDR=0x800800
-CONFIG_FASTBOOT_BUF_SIZE=0x04000000
-CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=0
-# CONFIG_CMD_ELF is not set
-# CONFIG_CMD_IMI is not set
-# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_XIMG is not set
-# CONFIG_CMD_FLASH is not set
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPT=y
-# CONFIG_CMD_LOADB is not set
-# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_BOOT_ANDROID=y
-CONFIG_CMD_BOOT_ROCKCHIP=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_ITEST is not set
-# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
-# CONFIG_CMD_MISC is not set
-CONFIG_CMD_MTD_BLK=y
-# CONFIG_ISO_PARTITION is not set
-CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
-CONFIG_SPL_OF_CONTROL=y
-CONFIG_SPL_DTB_MINIMUM=y
-CONFIG_OF_LIVE=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
-CONFIG_REGMAP=y
-CONFIG_SPL_REGMAP=y
-CONFIG_SYSCON=y
-CONFIG_SPL_SYSCON=y
-CONFIG_CLK=y
-CONFIG_SPL_CLK=y
-CONFIG_DM_CRYPTO=y
-CONFIG_SPL_DM_CRYPTO=y
-CONFIG_ROCKCHIP_CRYPTO_V2=y
-CONFIG_SPL_ROCKCHIP_CRYPTO_V2=y
-CONFIG_ROCKCHIP_GPIO=y
-CONFIG_SYS_I2C_ROCKCHIP=y
-CONFIG_DM_KEY=y
-CONFIG_RK8XX_PWRKEY=y
-CONFIG_ADC_KEY=y
-CONFIG_SPL_MISC=y
-CONFIG_SPL_ROCKCHIP_SECURE_OTP_V2=y
-CONFIG_MMC_DW=y
-CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_MTD=y
-CONFIG_MTD_BLK=y
-CONFIG_MTD_DEVICE=y
-CONFIG_NAND=y
-CONFIG_NAND_ROCKCHIP=y
-CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
-CONFIG_SYS_NAND_U_BOOT_OFFS=0x4000
-CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND=0x10000
-CONFIG_MTD_SPI_NAND=y
-CONFIG_SPI_FLASH=y
-CONFIG_SF_DEFAULT_MODE=0x1
-CONFIG_SF_DEFAULT_SPEED=50000000
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_SPI_FLASH_MTD=y
-CONFIG_PHY_ROCKCHIP_NANENG_USB2=y
-CONFIG_PINCTRL=y
-CONFIG_DM_PMIC=y
-# CONFIG_SPL_PMIC_CHILDREN is not set
-CONFIG_PMIC_RK8XX=y
-CONFIG_REGULATOR_PWM=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_REGULATOR_RK8XX=y
-CONFIG_PWM_ROCKCHIP=y
-CONFIG_RAM=y
-CONFIG_SPL_RAM=y
-CONFIG_TPL_RAM=y
-CONFIG_ROCKCHIP_SDRAM_COMMON=y
-CONFIG_DM_RESET=y
-CONFIG_BAUDRATE=1500000
-CONFIG_DEBUG_UART_BASE=0xff570000
-CONFIG_DEBUG_UART_CLOCK=24000000
-CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_ROCKCHIP_SFC=y
-CONFIG_SYSRESET=y
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_GENERIC=y
-CONFIG_USB_DWC3=y
-CONFIG_USB_DWC3_GADGET=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
-CONFIG_USB_GADGET_VENDOR_NUM=0x2207
-CONFIG_USB_GADGET_PRODUCT_NUM=0x110b
-CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_DM_VIDEO=y
-CONFIG_DISPLAY=y
-CONFIG_DRM_ROCKCHIP=y
-CONFIG_DRM_ROCKCHIP_INNO_MIPI_PHY=y
-CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
-CONFIG_USE_TINY_PRINTF=y
-CONFIG_SPL_TINY_MEMSET=y
-CONFIG_RSA=y
-CONFIG_SPL_RSA=y
-CONFIG_SHA512=y
-CONFIG_ERRNO_STR=y
-# CONFIG_EFI_LOADER is not set

commit cf156b84bd392d18ffccd1f4be1b4d058cda522d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 9 19:53:54 2020 +0800

    configs: rv1126-spi-nor-tb_defconfig => rv1126-spi-nor-tb.config
    
    It overlays rv1126_defconfig.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I9b6f0eb7d50c39111de2a86cc50ea100d5094d37

diff --git a/configs/rv1126-spi-nor-tb.config b/configs/rv1126-spi-nor-tb.config
new file mode 100644
index 0000000000..78087af35d
--- /dev/null
+++ b/configs/rv1126-spi-nor-tb.config
@@ -0,0 +1,61 @@
+# CONFIG_ARM_CPU_SUSPEND is not set
+CONFIG_BASE_DEFCONFIG="rv1126_defconfig"
+# CONFIG_CMD_MMC is not set
+# CONFIG_CMD_NAND is not set
+# CONFIG_CMD_NET is not set
+# CONFIG_CMD_TFTP_BOOTM is not set
+# CONFIG_CMD_TFTP_FLASH is not set
+# CONFIG_CMD_TFTPPUT is not set
+# CONFIG_DISPLAY is not set
+# CONFIG_DM_CHARGE_DISPLAY is not set
+# CONFIG_DM_ETH is not set
+# CONFIG_DM_ETH_PHY is not set
+# CONFIG_DM_FUEL_GAUGE is not set
+# CONFIG_DM_VIDEO is not set
+# CONFIG_FIT is not set
+# CONFIG_I2C_EDID is not set
+# CONFIG_LAVA_INFO is not set
+# CONFIG_MMC_DW is not set
+# CONFIG_MTD_NAND_BBT_USING_FLASH is not set
+# CONFIG_MTD_SPI_NAND is not set
+# CONFIG_NAND is not set
+# CONFIG_NET is not set
+CONFIG_OF_U_BOOT_REMOVE_PROPS=""
+# CONFIG_OPTEE_CLIENT is not set
+# CONFIG_OPTEE_V2 is not set
+# CONFIG_PHYLIB is not set
+# CONFIG_REGEX is not set
+CONFIG_RKFW_BOOT_SECTOR=0xa000
+CONFIG_RKFW_TRUST_SECTOR=0x6000
+CONFIG_RKFW_U_BOOT_SECTOR=0x4000
+# CONFIG_ROCKCHIP_UIMAGE is not set
+# CONFIG_RSA is not set
+# CONFIG_SHA1 is not set
+# CONFIG_SHA256 is not set
+# CONFIG_SHA512 is not set
+# CONFIG_SPL_AB is not set
+# CONFIG_SPL_CRYPTO_SUPPORT is not set
+# CONFIG_SPL_DM_CRYPTO is not set
+CONFIG_SPL_FDT_ADDR=0x2600000
+# CONFIG_SPL_HASH_SUPPORT is not set
+CONFIG_SPL_KERNEL_ADDR=0x608000
+CONFIG_SPL_KERNEL_BOOT=y
+CONFIG_SPL_KERNEL_COMPRESS_ADDR=0x4800000
+CONFIG_SPL_KERNEL_DECOM_LIMIT_SIZE=0x1ff8000
+# CONFIG_SPL_LIBDISK_SUPPORT is not set
+CONFIG_SPL_LOAD_RKFW=y
+# CONFIG_SPL_MMC_SUPPORT is not set
+# CONFIG_SPL_NAND_SUPPORT is not set
+CONFIG_SPL_RAMDISK_ADDR=0x2800000
+CONFIG_SPL_RAMDISK_COMPRESS_ADDR=0x5800000
+CONFIG_SPL_RAMDISK_DECOM_LIMIT_SIZE=0x3000000
+CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS=y
+# CONFIG_SPL_ROCKCHIP_SECURE_OTP_V2 is not set
+CONFIG_SPL_SYS_MALLOC_F_LEN=0xc000
+CONFIG_SYS_MALLOC_F_LEN=0xc000
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x4000
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
+CONFIG_TEST_ROCKCHIP=y
+CONFIG_TPL_SYS_MALLOC_F_LEN=0xc000
+# CONFIG_VIDEO_BRIDGE is not set
+# CONFIG_VIDEO is not set

commit 4fd0470950cff11c93be201f55af48c75f51b279
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 9 10:14:09 2020 +0800

    configs: rv1126-emmc-tb_defconfig => rv1126-emmc-tb.config
    
    It overlays rv1126_defconfig.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I5fc86cd78f776d4d9aed7858b593c8a085ea32c3

diff --git a/configs/rv1126-emmc-tb.config b/configs/rv1126-emmc-tb.config
new file mode 100644
index 0000000000..f286916de8
--- /dev/null
+++ b/configs/rv1126-emmc-tb.config
@@ -0,0 +1,74 @@
+# CONFIG_ARM_CPU_SUSPEND is not set
+CONFIG_BASE_DEFCONFIG="rv1126_defconfig"
+# CONFIG_CMD_MTD_BLK is not set
+# CONFIG_CMD_NAND is not set
+# CONFIG_CMD_NET is not set
+# CONFIG_CMD_SF is not set
+# CONFIG_CMD_SPI is not set
+# CONFIG_CMD_TFTP_BOOTM is not set
+# CONFIG_CMD_TFTP_FLASH is not set
+# CONFIG_CMD_TFTPPUT is not set
+# CONFIG_DISPLAY is not set
+# CONFIG_DM_CHARGE_DISPLAY is not set
+# CONFIG_DM_ETH is not set
+# CONFIG_DM_ETH_PHY is not set
+# CONFIG_DM_FUEL_GAUGE is not set
+# CONFIG_DM_VIDEO is not set
+# CONFIG_FIT is not set
+# CONFIG_I2C_EDID is not set
+# CONFIG_LAVA_INFO is not set
+# CONFIG_MTD_DEVICE is not set
+# CONFIG_MTD is not set
+# CONFIG_MTD_NAND_BBT_USING_FLASH is not set
+# CONFIG_NAND is not set
+# CONFIG_NET is not set
+CONFIG_OF_U_BOOT_REMOVE_PROPS=""
+# CONFIG_OPTEE_CLIENT is not set
+# CONFIG_OPTEE_V2 is not set
+# CONFIG_PHYLIB is not set
+# CONFIG_REGEX is not set
+CONFIG_RKFW_BOOT_SECTOR=0xa000
+CONFIG_RKFW_TRUST_SECTOR=0x6000
+CONFIG_RKFW_U_BOOT_SECTOR=0x4000
+# CONFIG_ROCKCHIP_SFC is not set
+# CONFIG_ROCKCHIP_UIMAGE is not set
+# CONFIG_RSA is not set
+CONFIG_SF_DEFAULT_MODE=3
+CONFIG_SF_DEFAULT_SPEED=1000000
+# CONFIG_SHA1 is not set
+# CONFIG_SHA256 is not set
+# CONFIG_SHA512 is not set
+# CONFIG_SKIP_RELOCATE_UBOOT is not set
+# CONFIG_SPI_FLASH is not set
+# CONFIG_SPI_MEM is not set
+# CONFIG_SPL_AB is not set
+CONFIG_SPL_ADC_KEY=y
+CONFIG_SPL_ADC_SUPPORT=y
+# CONFIG_SPL_CROS_EC_KEYB is not set
+# CONFIG_SPL_CRYPTO_SUPPORT is not set
+# CONFIG_SPL_DM_CRYPTO is not set
+# CONFIG_SPL_HASH_SUPPORT is not set
+CONFIG_SPL_INPUT=y
+CONFIG_SPL_KERNEL_ADDR=0x608000
+CONFIG_SPL_KERNEL_BOOT=y
+CONFIG_SPL_KERNEL_COMPRESS_ADDR=0x4800000
+CONFIG_SPL_KERNEL_DECOM_LIMIT_SIZE=0x1ff8000
+# CONFIG_SPL_LIBDISK_SUPPORT is not set
+CONFIG_SPL_LOAD_RKFW=y
+# CONFIG_SPL_MTD_SUPPORT is not set
+# CONFIG_SPL_NAND_SUPPORT is not set
+CONFIG_SPL_RAMDISK_ADDR=0x2800000
+CONFIG_SPL_RAMDISK_COMPRESS_ADDR=0x5800000
+CONFIG_SPL_RAMDISK_DECOM_LIMIT_SIZE=0x3000000
+CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS=y
+# CONFIG_SPL_ROCKCHIP_SECURE_OTP_V2 is not set
+# CONFIG_SPL_SPI_FLASH_SUPPORT is not set
+# CONFIG_SPL_SPI_SUPPORT is not set
+CONFIG_SPL_SYS_MALLOC_F_LEN=0xc000
+CONFIG_SYS_MALLOC_F_LEN=0xc000
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x4000
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
+CONFIG_TEST_ROCKCHIP=y
+CONFIG_TPL_SYS_MALLOC_F_LEN=0xc000
+# CONFIG_VIDEO_BRIDGE is not set
+# CONFIG_VIDEO is not set
diff --git a/configs/rv1126-emmc-tb_defconfig b/configs/rv1126-emmc-tb_defconfig
deleted file mode 100644
index 52d3b3cc2e..0000000000
--- a/configs/rv1126-emmc-tb_defconfig
+++ /dev/null
@@ -1,116 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SPL_LIBCOMMON_SUPPORT=y
-CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SYS_MALLOC_F_LEN=0xc000
-CONFIG_ROCKCHIP_RV1126=y
-CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
-CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
-CONFIG_ROCKCHIP_VENDOR_PARTITION=y
-CONFIG_ROCKCHIP_UART_MUX_SEL_M=2
-CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
-CONFIG_TARGET_EVB_RV1126=y
-CONFIG_DEFAULT_DEVICE_TREE="rv1126-evb"
-CONFIG_DEBUG_UART=y
-CONFIG_BOOTDELAY=0
-CONFIG_SYS_CONSOLE_INFO_QUIET=y
-# CONFIG_DISPLAY_CPUINFO is not set
-CONFIG_ANDROID_BOOTLOADER=y
-# CONFIG_SKIP_RELOCATE_UBOOT is not set
-CONFIG_SPL_ADC_SUPPORT=y
-CONFIG_SPL_BOARD_INIT=y
-# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
-# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
-CONFIG_SPL_OPTEE=y
-CONFIG_SPL_LOAD_RKFW=y
-CONFIG_SPL_KERNEL_ADDR=0x608000
-CONFIG_SPL_KERNEL_COMPRESS_ADDR=0x4800000
-CONFIG_SPL_RAMDISK_ADDR=0x2800000
-CONFIG_SPL_RAMDISK_COMPRESS_ADDR=0x5800000
-CONFIG_SPL_KERNEL_BOOT=y
-CONFIG_FASTBOOT_BUF_ADDR=0x800800
-CONFIG_FASTBOOT_BUF_SIZE=0x04000000
-CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=0
-# CONFIG_CMD_ELF is not set
-# CONFIG_CMD_IMI is not set
-# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_XIMG is not set
-# CONFIG_CMD_FLASH is not set
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPT=y
-# CONFIG_CMD_LOADB is not set
-# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_BOOT_ANDROID=y
-CONFIG_CMD_BOOT_ROCKCHIP=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_ITEST is not set
-# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
-# CONFIG_CMD_MISC is not set
-# CONFIG_ISO_PARTITION is not set
-CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
-CONFIG_SPL_OF_CONTROL=y
-CONFIG_SPL_DTB_MINIMUM=y
-CONFIG_OF_LIVE=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
-CONFIG_REGMAP=y
-CONFIG_SPL_REGMAP=y
-CONFIG_SYSCON=y
-CONFIG_SPL_SYSCON=y
-CONFIG_CLK=y
-CONFIG_SPL_CLK=y
-CONFIG_DM_CRYPTO=y
-CONFIG_ROCKCHIP_CRYPTO_V2=y
-CONFIG_ROCKCHIP_GPIO=y
-CONFIG_SYS_I2C_ROCKCHIP=y
-CONFIG_SPL_INPUT=y
-CONFIG_DM_KEY=y
-CONFIG_RK8XX_PWRKEY=y
-CONFIG_ADC_KEY=y
-CONFIG_SPL_ADC_KEY=y
-CONFIG_SPL_MISC=y
-CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS=y
-CONFIG_MMC_DW=y
-CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_PHY=y
-CONFIG_PHY_ROCKCHIP_NANENG_USB2=y
-CONFIG_PINCTRL=y
-CONFIG_DM_PMIC=y
-# CONFIG_SPL_PMIC_CHILDREN is not set
-CONFIG_PMIC_RK8XX=y
-CONFIG_REGULATOR_PWM=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_REGULATOR_RK8XX=y
-CONFIG_PWM_ROCKCHIP=y
-CONFIG_RAM=y
-CONFIG_SPL_RAM=y
-CONFIG_TPL_RAM=y
-CONFIG_ROCKCHIP_SDRAM_COMMON=y
-CONFIG_DM_RESET=y
-CONFIG_BAUDRATE=1500000
-CONFIG_DEBUG_UART_BASE=0xff570000
-CONFIG_DEBUG_UART_CLOCK=24000000
-CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_SYSRESET=y
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_GENERIC=y
-CONFIG_USB_DWC3=y
-CONFIG_USB_DWC3_GADGET=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
-CONFIG_USB_GADGET_VENDOR_NUM=0x2207
-CONFIG_USB_GADGET_PRODUCT_NUM=0x110b
-CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_IRQ2GPIO_V2=y
-CONFIG_USE_TINY_PRINTF=y
-CONFIG_SPL_TINY_MEMSET=y
-CONFIG_ERRNO_STR=y
-# CONFIG_EFI_LOADER is not set
-CONFIG_TEST_ROCKCHIP=y

commit 22bff7300fbab61dc692cb61364abb4de048da4e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jun 5 18:30:31 2020 +0800

    configs: rv1126-usbplug_defconfig => rv1126-usbplug.config
    
    It overlays rockchip-usbplug_defconfig.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ib53d4da277a47beb84ce92a732ac30b0325b65fa

diff --git a/configs/rv1126-usbplug_defconfig b/configs/rockchip-usbplug_defconfig
similarity index 100%
rename from configs/rv1126-usbplug_defconfig
rename to configs/rockchip-usbplug_defconfig
index 95b4b2c870..5d95b83fae 100644
--- a/configs/rv1126-usbplug_defconfig
+++ b/configs/rockchip-usbplug_defconfig
@@ -12,7 +12,6 @@ CONFIG_DEBUG_UART=y
 # CONFIG_DISTRO_DEFAULTS is not set
 # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
 # CONFIG_PASS_DEVICE_SERIAL_BY_FDT is not set
-CONFIG_DEBUG_UART_ALWAYS_MODE=y
 # CONFIG_DISPLAY_CPUINFO is not set
 # CONFIG_DISPLAY_BOARDINFO is not set
 # CONFIG_SPL is not set
@@ -86,6 +85,7 @@ CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xff570000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_ALWAYS_MODE=y
 CONFIG_ROCKCHIP_SFC=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
diff --git a/configs/rv1126-usbplug.config b/configs/rv1126-usbplug.config
new file mode 100644
index 0000000000..39c3b3d669
--- /dev/null
+++ b/configs/rv1126-usbplug.config
@@ -0,0 +1,5 @@
+CONFIG_BASE_DEFCONFIG="rockchip-usbplug_defconfig"
+CONFIG_DEBUG_UART_BASE=0xff570000
+CONFIG_DEFAULT_DEVICE_TREE="rv1126-evb"
+CONFIG_ROCKCHIP_RV1126=y
+CONFIG_TARGET_EVB_RV1126=y

commit 8d2c0f5ee8c344ed8f2bb3f7cd860388f42825d6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 9 10:36:40 2020 +0800

    scripts: add a script to sync/add conifg fragment
    
    Example:
            ./scripts/sync-fragment.sh configs/rv1109.config
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I04bc6c0f3615edafcbdb57b91de73162a912838f

diff --git a/scripts/sync-fragment.sh b/scripts/sync-fragment.sh
new file mode 100755
index 0000000000..ace2823667
--- /dev/null
+++ b/scripts/sync-fragment.sh
@@ -0,0 +1,51 @@
+#!/bin/bash
+#
+# Copyright (c) 2020 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier: GPL-2.0
+#
+set -e
+
+FRAGMENT_CONFIG=$1
+
+if [ -z "${FRAGMENT_CONFIG}" ]; then
+	echo
+	echo "Usage: a script to sync/add config fragment."
+	echo
+	echo "Command:"
+	echo "      $0  [config fragment]"
+	echo "Example:"
+	echo "      $0 ./configs/rv1109.config       -- add or sync rv1109.config"
+	echo
+	exit 1
+fi
+
+if [ ! -f .config ]; then
+	echo "ERROR: No .config"
+	exit 1
+fi
+
+BASE_DEFCONFIG=`sed -n "/CONFIG_BASE_DEFCONFIG=/s/CONFIG_BASE_DEFCONFIG=//p" .config | tr -d '\r' | tr -d '"'`
+if [ -z "${BASE_DEFCONFIG}" ]; then
+	echo "ERROR: No base defconfig assigned by BASE_DEFCONFIG=..."
+	exit 1
+fi
+
+if [ ! -f configs/${BASE_DEFCONFIG} ]; then
+	echo "ERROR: No base defconfig \"${BASE_DEFCONFIG}\""
+	exit 1
+fi
+
+if [ ! -f ${FRAGMENT_CONFIG} ]; then
+	MSG_NEW_FILE="New config fragment: ${FRAGMENT_CONFIG}"
+fi
+
+cp .config fragment.config
+make ${BASE_DEFCONFIG}
+./scripts/diffconfig -m .config fragment.config | sort > ${FRAGMENT_CONFIG}
+cp fragment.config .config
+
+echo "$MSG_NEW_FILE"
+echo "Sync ${FRAGMENT_CONFIG} ... OK."
+echo
+

commit b8561139ba467216102a635640fc6ab5ad597647
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 17 15:16:46 2020 +0800

    scripts: add diffconfig from kernel project
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Iade4d1d7180863f9e110e9ecd60cef63c40e1426

diff --git a/scripts/diffconfig b/scripts/diffconfig
new file mode 100755
index 0000000000..89abf777f1
--- /dev/null
+++ b/scripts/diffconfig
@@ -0,0 +1,132 @@
+#!/usr/bin/python
+# SPDX-License-Identifier: GPL-2.0
+#
+# diffconfig - a tool to compare .config files.
+#
+# originally written in 2006 by Matt Mackall
+#  (at least, this was in his bloatwatch source code)
+# last worked on 2008 by Tim Bird
+#
+
+import sys, os
+
+def usage():
+    print("""Usage: diffconfig [-h] [-m] [<config1> <config2>]
+
+Diffconfig is a simple utility for comparing two .config files.
+Using standard diff to compare .config files often includes extraneous and
+distracting information.  This utility produces sorted output with only the
+changes in configuration values between the two files.
+
+Added and removed items are shown with a leading plus or minus, respectively.
+Changed items show the old and new values on a single line.
+
+If -m is specified, then output will be in "merge" style, which has the
+changed and new values in kernel config option format.
+
+If no config files are specified, .config and .config.old are used.
+
+Example usage:
+ $ diffconfig .config config-with-some-changes
+-EXT2_FS_XATTR  n
+ CRAMFS  n -> y
+ EXT2_FS  y -> n
+ LOG_BUF_SHIFT  14 -> 16
+ PRINTK_TIME  n -> y
+""")
+    sys.exit(0)
+
+# returns a dictionary of name/value pairs for config items in the file
+def readconfig(config_file):
+    d = {}
+    for line in config_file:
+        line = line[:-1]
+        if line[:7] == "CONFIG_":
+            name, val = line[7:].split("=", 1)
+            d[name] = val
+        if line[-11:] == " is not set":
+            d[line[9:-11]] = "n"
+    return d
+
+def print_config(op, config, value, new_value):
+    global merge_style
+
+    if merge_style:
+        if new_value:
+            if new_value=="n":
+                print("# CONFIG_%s is not set" % config)
+            else:
+                print("CONFIG_%s=%s" % (config, new_value))
+    else:
+        if op=="-":
+            print("-%s %s" % (config, value))
+        elif op=="+":
+            print("+%s %s" % (config, new_value))
+        else:
+            print(" %s %s -> %s" % (config, value, new_value))
+
+def main():
+    global merge_style
+
+    # parse command line args
+    if ("-h" in sys.argv or "--help" in sys.argv):
+        usage()
+
+    merge_style = 0
+    if "-m" in sys.argv:
+        merge_style = 1
+        sys.argv.remove("-m")
+
+    argc = len(sys.argv)
+    if not (argc==1 or argc == 3):
+        print("Error: incorrect number of arguments or unrecognized option")
+        usage()
+
+    if argc == 1:
+        # if no filenames given, assume .config and .config.old
+        build_dir=""
+        if "KBUILD_OUTPUT" in os.environ:
+            build_dir = os.environ["KBUILD_OUTPUT"]+"/"
+        configa_filename = build_dir + ".config.old"
+        configb_filename = build_dir + ".config"
+    else:
+        configa_filename = sys.argv[1]
+        configb_filename = sys.argv[2]
+
+    try:
+        a = readconfig(open(configa_filename))
+        b = readconfig(open(configb_filename))
+    except (IOError):
+        e = sys.exc_info()[1]
+        print("I/O error[%s]: %s\n" % (e.args[0],e.args[1]))
+        usage()
+
+    # print items in a but not b (accumulate, sort and print)
+    old = []
+    for config in a:
+        if config not in b:
+            old.append(config)
+    old.sort()
+    for config in old:
+        print_config("-", config, a[config], None)
+        del a[config]
+
+    # print items that changed (accumulate, sort, and print)
+    changed = []
+    for config in a:
+        if a[config] != b[config]:
+            changed.append(config)
+        else:
+            del b[config]
+    changed.sort()
+    for config in changed:
+        print_config("->", config, a[config], b[config])
+        del b[config]
+
+    # now print items in b but not in a
+    # (items from b that were in a were removed above)
+    new = sorted(b.keys())
+    for config in new:
+        print_config("+", config, None, b[config])
+
+main()

commit 124e8c0928204ac727a1e9e5c3ad017a50203ace
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jun 5 18:12:38 2020 +0800

    make.sh: support make config fragment
    
    ./make.sh rv1109 equal: ./make.sh rv1126_defconfig rv1109.config
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I26c9ea9ae753fc6465b1edb0fb1e7736fd4ede3e

diff --git a/make.sh b/make.sh
index 935d141ce2..1401e573d6 100755
--- a/make.sh
+++ b/make.sh
@@ -222,13 +222,24 @@ function process_args()
 				# xxx_defconfig
 				else
 					ARG_BOARD=$1
-					if [ ! -f configs/${ARG_BOARD}_defconfig ]; then
+					if [ ! -f configs/${ARG_BOARD}_defconfig -a ! -f configs/${ARG_BOARD}.config ]; then
 						echo -e "\n${SUPPORT_LIST}\n"
 						echo "ERROR: No configs/${ARG_BOARD}_defconfig"
 						exit 1
+					elif [ -f configs/${ARG_BOARD}.config ]; then
+						BASE_DEFCONFIG=`sed -n "/CONFIG_BASE_DEFCONFIG=/s/CONFIG_BASE_DEFCONFIG=//p" configs/${ARG_BOARD}.config |tr -d '\r' | tr -d '"'`
+						MAKE_CMD="make ${BASE_DEFCONFIG} ${ARG_BOARD}.config -j${JOB}"
+						echo "## ${MAKE_CMD}"
+						make ${BASE_DEFCONFIG} ${ARG_BOARD}.config ${OPTION}
 					else
-						echo "make for ${ARG_BOARD}_defconfig by -j${JOB}"
-						make ${ARG_BOARD}_defconfig
+						BASE_DEFCONFIG=`sed -n "/CONFIG_BASE_DEFCONFIG=/s/CONFIG_BASE_DEFCONFIG=//p" configs/${ARG_BOARD}_defconfig |tr -d '\r' | tr -d '"'`
+						if [ "${BASE_DEFCONFIG}" == "${ARG_BOARD}_defconfig" ]; then
+							echo "ERROR: configs/${ARG_BOARD}_defconfig is base defconfig for other [...].config"
+							exit 1
+						fi
+						MAKE_CMD="make ${ARG_BOARD}_defconfig -j${JOB}"
+						echo "## ${MAKE_CMD}"
+						make ${ARG_BOARD}_defconfig ${OPTION}
 					fi
 				fi
 				shift 1
@@ -794,7 +805,7 @@ function finish()
 	if [ "${ARG_BOARD}" == "" ]; then
 		echo "Platform ${RKCHIP_LABEL} is build OK, with exist .config"
 	else
-		echo "Platform ${RKCHIP_LABEL} is build OK, with new .config(make ${ARG_BOARD}_defconfig)"
+		echo "Platform ${RKCHIP_LABEL} is build OK, with new .config(${MAKE_CMD})"
 	fi
 }
 

commit 6c80fb8be4a41c46c304de13fe294f3a38b67e95
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jun 5 17:29:40 2020 +0800

    Kconfig: add base defconfig
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Iba62fbc17bc9e75c13ec8bc7d1d2bd7a14d08448

diff --git a/Kconfig b/Kconfig
index 1d3c0e2c88..081a743321 100644
--- a/Kconfig
+++ b/Kconfig
@@ -59,6 +59,12 @@ config CC_OPTIMIZE_FOR_SIZE
 
 	  This option is enabled by default for U-Boot.
 
+config BASE_DEFCONFIG
+	string "Base defconfig of config fragment"
+	default ""
+	help
+	  Indicate the base defconfig of config fragment.
+
 config DISTRO_DEFAULTS
 	bool "Select defaults suitable for booting general purpose Linux distributions"
 	default y if ARCH_SUNXI || TEGRA

commit 086e8fa830efe07a1b31dfe27084f7926886add6
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Wed Jul 8 10:42:31 2020 +0800

    crypto: rockchip: crypto_v2: split the data into 32M chunks when update
    
    fix timeout bug of crypto V2 computing large amounts of data all
    at one time.
    
    Change-Id: I6c4a3f8b0a40e95b0832244313d7e378e1e70615
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/drivers/crypto/rockchip/crypto_v2.c b/drivers/crypto/rockchip/crypto_v2.c
index d45cae5d45..f7f8113ad8 100644
--- a/drivers/crypto/rockchip/crypto_v2.c
+++ b/drivers/crypto/rockchip/crypto_v2.c
@@ -28,7 +28,9 @@ struct rockchip_crypto_priv {
 #define DATA_ADDR_ALIGIN_SIZE	8
 #define DATA_LEN_ALIGIN_SIZE	64
 
-#define RK_CRYPTO_TIME_OUT	50000  /* max 50ms */
+/* crypto timeout 500ms, must support more than 32M data per times*/
+#define HASH_UPDATE_LIMIT	(32 * 1024 * 1024)
+#define RK_CRYPTO_TIME_OUT	500000
 
 #define RK_WHILE_TIME_OUT(condition, timeout, ret) { \
 			u32 time_out = timeout; \
@@ -511,11 +513,25 @@ static int rockchip_crypto_sha_update(struct udevice *dev,
 				      u32 *input, u32 len)
 {
 	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
+	int ret, i;
+	u8 *p;
 
 	if (!len)
 		return -EINVAL;
 
-	return rk_hash_update(priv->hw_ctx, (u8 *)input, len);
+	p = (u8 *)input;
+
+	for (i = 0; i < len / HASH_UPDATE_LIMIT; i++, p += HASH_UPDATE_LIMIT) {
+		ret = rk_hash_update(priv->hw_ctx, p, HASH_UPDATE_LIMIT);
+		if (ret)
+			goto exit;
+	}
+
+	if (len % HASH_UPDATE_LIMIT)
+		ret = rk_hash_update(priv->hw_ctx, p, len % HASH_UPDATE_LIMIT);
+
+exit:
+	return ret;
 }
 
 static int rockchip_crypto_sha_final(struct udevice *dev,

commit fe941802b212c96a9d1012fb1bb02e6000def6c7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jul 8 12:22:35 2020 +0800

    common: image-fit: check hash calculation result
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I11ee44465512de5ca58e22b6b61d5be8f7d0842e

diff --git a/common/image-fit.c b/common/image-fit.c
index 8522e3a849..0a6c105d00 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -1181,25 +1181,31 @@ static int hw_fit_calculate_hash(const void *data, int data_len,
 				 const char *algo, uint8_t *value,
 				 int *value_len)
 {
+	int ret = 0;
+
 	if (IMAGE_ENABLE_CRC32 && strcmp(algo, "crc32") == 0) {
 		*((uint32_t *)value) = crc32_wd(0, data, data_len,
 							CHUNKSZ_CRC32);
 		*((uint32_t *)value) = cpu_to_uimage(*((uint32_t *)value));
 		*value_len = 4;
 	} else if (IMAGE_ENABLE_SHA1 && strcmp(algo, "sha1") == 0) {
-		crypto_csum(CRYPTO_SHA1, data, data_len, value);
+		ret = crypto_csum(CRYPTO_SHA1, data, data_len, value);
 		*value_len = 20;
 	} else if (IMAGE_ENABLE_SHA256 && strcmp(algo, "sha256") == 0) {
-		crypto_csum(CRYPTO_SHA256, data, data_len, value);
+		ret = crypto_csum(CRYPTO_SHA256, data, data_len, value);
 		*value_len = SHA256_SUM_LEN;
 	} else if (IMAGE_ENABLE_MD5 && strcmp(algo, "md5") == 0) {
-		crypto_csum(CRYPTO_MD5, data, data_len, value);
+		ret = crypto_csum(CRYPTO_MD5, data, data_len, value);
 		*value_len = 16;
 	} else {
 		debug("Unsupported hash alogrithm\n");
 		return -1;
 	}
-	return 0;
+
+	if (ret)
+		printf("%s: algo %s failed, ret=%d\n", __func__, algo, ret);
+
+	return ret;
 }
 #endif
 #endif

commit 659e640a9996a57ebd830e39b5576eba38a841da
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jul 8 12:22:20 2020 +0800

    core: dump: add symbol for remained dm device
    
    Symbol:
            "**" : pre-reloc node and the device is remained in dm tree.
            "* " : pre-reloc node but the device is already being removed from dm tree.
    
    => dm tree
     Class      Probed        Driver               Name
    
    Change-Id: Ie242117d4d323ba24894dd99ab061d187230621d
    ----------------------------------------------------------
     root       [ + ]   root_driver                root_driver
     rsa_mod_ex [   ]   mod_exp_sw                 |-- mod_exp_sw
     clk        [   ]   fixed_rate_clock           |-- external-gmac-clockm0 *
     clk        [   ]   fixed_rate_clock           |-- external-gmac-clockm1 *
     syscon     [ + ]   rv1126_syscon              |-- syscon@fe000000 *
     syscon     [ + ]   rv1126_syscon              |-- syscon@fe020000 *
     ......
     mtd        [   ]   rk_nandc_v6                |-- nandc@ffc80000 **
     blk        [   ]   mtd_blk                    |   `-- nandc@ffc80000.blk
     spi        [   ]   rockchip_sfc               |-- sfc@ffc90000 *
     mtd        [   ]   spi_nand                   |   |-- flash@0 **
     blk        [   ]   mtd_blk                    |   |   `-- flash@0.blk
     spi_flash  [   ]   spi_flash_std              |   `-- flash@1 **
     blk        [   ]   mtd_blk                    |       `-- flash@1.blk
     ......
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I5bf643b9a2b29a86ac7315462ad9f65f30e18442

diff --git a/drivers/core/dump.c b/drivers/core/dump.c
index 81b0a00fc3..2d90bb9726 100644
--- a/drivers/core/dump.c
+++ b/drivers/core/dump.c
@@ -14,6 +14,7 @@ static void show_devices(struct udevice *dev, int depth, int last_flag)
 {
 	int i, is_last;
 	struct udevice *child;
+	int pre_reloc, remained;
 
 	/* print the first 11 characters to not break the tree-format. */
 	printf(" %-10.10s [ %c ]   %-25.25s  ", dev->uclass->uc_drv->name,
@@ -34,9 +35,14 @@ static void show_devices(struct udevice *dev, int depth, int last_flag)
 		}
 	}
 
-	printf("%s %s\n", dev->name,
-	       dev_read_bool(dev, "u-boot,dm-pre-reloc") ||
-	       dev_read_bool(dev, "u-boot,dm-spl") ? "*" : "");
+	pre_reloc = dev_read_bool(dev, "u-boot,dm-pre-reloc") ||
+		    dev_read_bool(dev, "u-boot,dm-spl");
+	if (pre_reloc)
+		remained = !list_empty(&dev->uclass_node);
+	else
+		remained = 0;
+
+	printf("%s %s%s\n", dev->name, pre_reloc ? "*" : "", remained ? "*" : "");
 
 	list_for_each_entry(child, &dev->child_head, sibling_node) {
 		is_last = list_is_last(&child->sibling_node, &dev->child_head);
@@ -66,7 +72,7 @@ void dm_dump_all(void)
 static void dm_display_line(struct udevice *dev)
 {
 	printf("  %c [ %c ] %s @ %08lx",
-	       dev_read_bool(dev, "u-boot,dm-pre-reloc") ||
+	       dev_read_bool(dev, "u-boot,dm-pre-pre_reloc") ||
 	       dev_read_bool(dev, "u-boot,dm-spl") ? '*' : ' ',
 	       dev->flags & DM_FLAG_ACTIVATED ? '+' : ' ',
 	       dev->name, (ulong)map_to_sysmem(dev));

commit 8f5dfc4a5ce0e5d4126d51fefd43de06cd8c637b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jul 8 11:46:26 2020 +0800

    core: device: use list_del_init() instead of list_del() to remove node
    
    In order to check this node by list_del_init().
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I723821d8b9fc6d899fbd5c0b830b240486a48c73

diff --git a/drivers/core/device.c b/drivers/core/device.c
index d44c4e0d13..70ad9ffe1c 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -85,7 +85,7 @@ static int device_bind_common(struct udevice *parent, const struct driver *drv,
 					      __func__, dev->name);
 					return 0;
 				} else {
-					list_del(&dev->uclass_node);
+					list_del_init(&dev->uclass_node);
 				}
 			}
 		}

commit c134f612d6fcb9824de85b37a92f5d4064501613
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Wed Jul 8 10:39:16 2020 +0800

    configs: rv1126: enable io-domain
    
    Change-Id: I6d6005c49a3b7c49ef0232b1f7e3e98d815fd905
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index 44ae30ec85..62de96e25e 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -123,6 +123,8 @@ CONFIG_PHY_ROCKCHIP_NANENG_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
 CONFIG_POWER_FG_RK817=y
+CONFIG_IO_DOMAIN=y
+CONFIG_ROCKCHIP_IO_DOMAIN=y
 CONFIG_DM_PMIC=y
 # CONFIG_SPL_PMIC_CHILDREN is not set
 CONFIG_PMIC_RK8XX=y

commit 2e312f93c5cf766668a73b79237324186049ada3
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Wed Jul 8 10:38:13 2020 +0800

    power: rockchip-io-domain: get regmap base from parent device
    
    The io-domain/pmu-io-domain node always under grf/pmugrf, so get the
    grf/pmugrf regmap base just from its parent device.
    
    Change-Id: I9f7d950744b48c239a556b7fe685749cdd5f99f2
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/drivers/power/io-domain/rockchip-io-domain.c b/drivers/power/io-domain/rockchip-io-domain.c
index fa6a8deb08..31f89a568f 100644
--- a/drivers/power/io-domain/rockchip-io-domain.c
+++ b/drivers/power/io-domain/rockchip-io-domain.c
@@ -84,10 +84,11 @@ struct rockchip_iodomain_priv {
 static int rockchip_ofdata_to_platdata(struct udevice *dev)
 {
 	struct rockchip_iodomain_priv *priv = dev_get_priv(dev);
+	struct syscon_uc_info *syscon_priv;
 	struct regmap *regmap;
 
-	/* get grf-reg base address */
-	regmap = syscon_get_regmap_by_driver_data(ROCKCHIP_SYSCON_GRF);
+	syscon_priv = dev_get_uclass_priv(dev_get_parent(dev));
+	regmap = syscon_priv->regmap;
 	if (IS_ERR(regmap))
 		return PTR_ERR(regmap);
 

commit 13c03cb6ca652ceca20f92d90cdcd62e99af605a
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Wed Jul 8 11:20:57 2020 +0800

    pinctrl: rockchip: Covert the struct rockchip_pin_ctrl to const type
    
    The rockchip_pin_ctrl struct is BSS data, only memset oncetime, but the
    driver maybe probed several times, the nr_pins member of struct won't
    to start from 0. that will cause pinctrl driver error.
    
    Change-Id: I3d081da8bb91573126c6ee5af345ed73c85bb7af
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 6d652415e2..663a07c19d 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -370,7 +370,7 @@ struct rockchip_pin_ctrl {
 	struct rockchip_mux_route_data *iomux_routes;
 	u32				niomux_routes;
 
-	int	(*ctrl_data_re_init)(struct rockchip_pin_ctrl *ctrl);
+	int	(*ctrl_data_re_init)(const struct rockchip_pin_ctrl *ctrl);
 
 	int	(*soc_data_init)(struct rockchip_pinctrl_priv *info);
 
@@ -2991,31 +2991,21 @@ static struct pinctrl_ops rockchip_pinctrl_ops = {
 	.get_gpio_mux			= rockchip_pinctrl_get_gpio_mux,
 };
 
-/* Ctrl data specially handle */
-static int rk3308b_ctrl_data_re_init(struct rockchip_pin_ctrl *ctrl)
-{
-	/*
-	 * Special for rk3308b, where we need to replace the recalced
-	 * and routed arrays.
-	 */
-	if (soc_is_rk3308b()) {
-		ctrl->iomux_recalced = rk3308b_mux_recalced_data;
-		ctrl->niomux_recalced = ARRAY_SIZE(rk3308b_mux_recalced_data);
-		ctrl->iomux_routes = rk3308b_mux_route_data;
-		ctrl->niomux_routes = ARRAY_SIZE(rk3308b_mux_route_data);
-	}
-
-	return 0;
-}
+static const struct rockchip_pin_ctrl rk3308b_pin_ctrl;
 
 /* retrieve the soc specific data */
-static struct rockchip_pin_ctrl *rockchip_pinctrl_get_soc_data(struct udevice *dev)
+static const struct rockchip_pin_ctrl *
+rockchip_pinctrl_get_soc_data(struct udevice *dev)
 {
 	struct rockchip_pinctrl_priv *priv = dev_get_priv(dev);
-	struct rockchip_pin_ctrl *ctrl =
-			(struct rockchip_pin_ctrl *)dev_get_driver_data(dev);
+	const struct rockchip_pin_ctrl *ctrl =
+		(const struct rockchip_pin_ctrl *)dev_get_driver_data(dev);
 	struct rockchip_pin_bank *bank;
 	int grf_offs, pmu_offs, drv_grf_offs, drv_pmu_offs, i, j;
+	u32 nr_pins;
+
+	if (soc_is_rk3308b())
+		ctrl = &rk3308b_pin_ctrl;
 
 	grf_offs = ctrl->grf_mux_offset;
 	pmu_offs = ctrl->pmu_mux_offset;
@@ -3029,12 +3019,13 @@ static struct rockchip_pin_ctrl *rockchip_pinctrl_get_soc_data(struct udevice *d
 			return NULL;
 	}
 
+	nr_pins = 0;
 	for (i = 0; i < ctrl->nr_banks; ++i, ++bank) {
 		int bank_pins = 0;
 
 		bank->priv = priv;
-		bank->pin_base = ctrl->nr_pins;
-		ctrl->nr_pins += bank->nr_pins;
+		bank->pin_base = nr_pins;
+		nr_pins += bank->nr_pins;
 
 		/* calculate iomux and drv offsets */
 		for (j = 0; j < 4; j++) {
@@ -3122,6 +3113,8 @@ static struct rockchip_pin_ctrl *rockchip_pinctrl_get_soc_data(struct udevice *d
 		}
 	}
 
+	WARN_ON(nr_pins != ctrl->nr_pins);
+
 	return ctrl;
 }
 
@@ -3148,21 +3141,19 @@ static int rk3308b_soc_data_init(struct rockchip_pinctrl_priv *priv)
 	/*
 	 * Enable the special ctrl  of selected sources.
 	 */
-	if (soc_is_rk3308b()) {
-		ret = regmap_write(priv->regmap_base, RK3308B_GRF_SOC_CON13,
-				   RK3308B_GRF_I2C3_IOFUNC_SRC_CTRL |
-				   RK3308B_GRF_GPIO2A3_SEL_SRC_CTRL |
-				   RK3308B_GRF_GPIO2A2_SEL_SRC_CTRL);
-		if (ret)
-			return ret;
+	ret = regmap_write(priv->regmap_base, RK3308B_GRF_SOC_CON13,
+			   RK3308B_GRF_I2C3_IOFUNC_SRC_CTRL |
+			   RK3308B_GRF_GPIO2A3_SEL_SRC_CTRL |
+			   RK3308B_GRF_GPIO2A2_SEL_SRC_CTRL);
+	if (ret)
+		return ret;
 
-		ret = regmap_write(priv->regmap_base, RK3308B_GRF_SOC_CON15,
-				   RK3308B_GRF_GPIO2C0_SEL_SRC_CTRL |
-				   RK3308B_GRF_GPIO3B3_SEL_SRC_CTRL |
-				   RK3308B_GRF_GPIO3B2_SEL_SRC_CTRL);
-		if (ret)
-			return ret;
-	}
+	ret = regmap_write(priv->regmap_base, RK3308B_GRF_SOC_CON15,
+			   RK3308B_GRF_GPIO2C0_SEL_SRC_CTRL |
+			   RK3308B_GRF_GPIO3B3_SEL_SRC_CTRL |
+			   RK3308B_GRF_GPIO3B2_SEL_SRC_CTRL);
+	if (ret)
+		return ret;
 
 	return 0;
 }
@@ -3170,7 +3161,7 @@ static int rk3308b_soc_data_init(struct rockchip_pinctrl_priv *priv)
 static int rockchip_pinctrl_probe(struct udevice *dev)
 {
 	struct rockchip_pinctrl_priv *priv = dev_get_priv(dev);
-	struct rockchip_pin_ctrl *ctrl;
+	const struct rockchip_pin_ctrl *ctrl;
 	struct udevice *syscon;
 	struct regmap *regmap;
 	int ret = 0;
@@ -3217,7 +3208,7 @@ static int rockchip_pinctrl_probe(struct udevice *dev)
 			return ret;
 	}
 
-	priv->ctrl = ctrl;
+	priv->ctrl = (struct rockchip_pin_ctrl *)ctrl;
 	return 0;
 }
 
@@ -3244,19 +3235,20 @@ static struct rockchip_pin_bank px30_pin_banks[] = {
 			    ),
 };
 
-static struct rockchip_pin_ctrl px30_pin_ctrl = {
-		.pin_banks		= px30_pin_banks,
-		.nr_banks		= ARRAY_SIZE(px30_pin_banks),
-		.label			= "PX30-GPIO",
-		.type			= PX30,
-		.grf_mux_offset		= 0x0,
-		.pmu_mux_offset		= 0x0,
-		.iomux_routes		= px30_mux_route_data,
-		.niomux_routes		= ARRAY_SIZE(px30_mux_route_data),
-		.pull_calc_reg		= px30_calc_pull_reg_and_bit,
-		.drv_calc_reg		= px30_calc_drv_reg_and_bit,
-		.schmitt_calc_reg	= px30_calc_schmitt_reg_and_bit,
-		.slew_rate_calc_reg	= px30_calc_slew_rate_reg_and_bit,
+static const struct rockchip_pin_ctrl px30_pin_ctrl = {
+	.pin_banks		= px30_pin_banks,
+	.nr_banks		= ARRAY_SIZE(px30_pin_banks),
+	.nr_pins		= 128,
+	.label			= "PX30-GPIO",
+	.type			= PX30,
+	.grf_mux_offset		= 0x0,
+	.pmu_mux_offset		= 0x0,
+	.iomux_routes		= px30_mux_route_data,
+	.niomux_routes		= ARRAY_SIZE(px30_mux_route_data),
+	.pull_calc_reg		= px30_calc_pull_reg_and_bit,
+	.drv_calc_reg		= px30_calc_drv_reg_and_bit,
+	.schmitt_calc_reg	= px30_calc_schmitt_reg_and_bit,
+	.slew_rate_calc_reg	= px30_calc_slew_rate_reg_and_bit,
 };
 
 static struct rockchip_pin_bank rv1108_pin_banks[] = {
@@ -3269,9 +3261,10 @@ static struct rockchip_pin_bank rv1108_pin_banks[] = {
 	PIN_BANK_IOMUX_FLAGS(3, 32, "gpio3", 0, 0, 0, 0),
 };
 
-static struct rockchip_pin_ctrl rv1108_pin_ctrl = {
+static const struct rockchip_pin_ctrl rv1108_pin_ctrl = {
 	.pin_banks		= rv1108_pin_banks,
 	.nr_banks		= ARRAY_SIZE(rv1108_pin_banks),
+	.nr_pins		= 128,
 	.label			= "RV1108-GPIO",
 	.type			= RV1108,
 	.grf_mux_offset		= 0x10,
@@ -3309,9 +3302,10 @@ static struct rockchip_pin_bank rv1126_pin_banks[] = {
 			     IOMUX_WIDTH_4BIT, 0, 0, 0),
 };
 
-static struct rockchip_pin_ctrl rv1126_pin_ctrl = {
+static const struct rockchip_pin_ctrl rv1126_pin_ctrl = {
 	.pin_banks		= rv1126_pin_banks,
 	.nr_banks		= ARRAY_SIZE(rv1126_pin_banks),
+	.nr_pins		= 130,
 	.label			= "RV1126-GPIO",
 	.type			= RV1126,
 	.grf_mux_offset		= 0x10004, /* mux offset from GPIO0_D0 */
@@ -3353,9 +3347,10 @@ static struct rockchip_pin_bank rk1808_pin_banks[] = {
 			     IOMUX_WIDTH_4BIT),
 };
 
-static struct rockchip_pin_ctrl rk1808_pin_ctrl = {
+static const struct rockchip_pin_ctrl rk1808_pin_ctrl = {
 	.pin_banks		= rk1808_pin_banks,
 	.nr_banks		= ARRAY_SIZE(rk1808_pin_banks),
+	.nr_pins		= 160,
 	.label			= "RK1808-GPIO",
 	.type			= RK1808,
 	.iomux_routes		= rk1808_mux_route_data,
@@ -3374,13 +3369,14 @@ static struct rockchip_pin_bank rk2928_pin_banks[] = {
 	PIN_BANK(3, 32, "gpio3"),
 };
 
-static struct rockchip_pin_ctrl rk2928_pin_ctrl = {
-		.pin_banks		= rk2928_pin_banks,
-		.nr_banks		= ARRAY_SIZE(rk2928_pin_banks),
-		.label			= "RK2928-GPIO",
-		.type			= RK2928,
-		.grf_mux_offset		= 0xa8,
-		.pull_calc_reg		= rk2928_calc_pull_reg_and_bit,
+static const struct rockchip_pin_ctrl rk2928_pin_ctrl = {
+	.pin_banks		= rk2928_pin_banks,
+	.nr_banks		= ARRAY_SIZE(rk2928_pin_banks),
+	.nr_pins		= 128,
+	.label			= "RK2928-GPIO",
+	.type			= RK2928,
+	.grf_mux_offset		= 0xa8,
+	.pull_calc_reg		= rk2928_calc_pull_reg_and_bit,
 };
 
 static struct rockchip_pin_bank rk3036_pin_banks[] = {
@@ -3389,13 +3385,14 @@ static struct rockchip_pin_bank rk3036_pin_banks[] = {
 	PIN_BANK(2, 32, "gpio2"),
 };
 
-static struct rockchip_pin_ctrl rk3036_pin_ctrl = {
-		.pin_banks		= rk3036_pin_banks,
-		.nr_banks		= ARRAY_SIZE(rk3036_pin_banks),
-		.label			= "RK3036-GPIO",
-		.type			= RK2928,
-		.grf_mux_offset		= 0xa8,
-		.pull_calc_reg		= rk2928_calc_pull_reg_and_bit,
+static const struct rockchip_pin_ctrl rk3036_pin_ctrl = {
+	.pin_banks		= rk3036_pin_banks,
+	.nr_banks		= ARRAY_SIZE(rk3036_pin_banks),
+	.nr_pins		= 96,
+	.label			= "RK3036-GPIO",
+	.type			= RK2928,
+	.grf_mux_offset		= 0xa8,
+	.pull_calc_reg		= rk2928_calc_pull_reg_and_bit,
 };
 
 static struct rockchip_pin_bank rk3066a_pin_banks[] = {
@@ -3407,13 +3404,14 @@ static struct rockchip_pin_bank rk3066a_pin_banks[] = {
 	PIN_BANK(6, 16, "gpio6"),
 };
 
-static struct rockchip_pin_ctrl rk3066a_pin_ctrl = {
-		.pin_banks		= rk3066a_pin_banks,
-		.nr_banks		= ARRAY_SIZE(rk3066a_pin_banks),
-		.label			= "RK3066a-GPIO",
-		.type			= RK2928,
-		.grf_mux_offset		= 0xa8,
-		.pull_calc_reg		= rk2928_calc_pull_reg_and_bit,
+static const struct rockchip_pin_ctrl rk3066a_pin_ctrl = {
+	.pin_banks		= rk3066a_pin_banks,
+	.nr_banks		= ARRAY_SIZE(rk3066a_pin_banks),
+	.nr_pins		= 176,
+	.label			= "RK3066a-GPIO",
+	.type			= RK2928,
+	.grf_mux_offset		= 0xa8,
+	.pull_calc_reg		= rk2928_calc_pull_reg_and_bit,
 };
 
 static struct rockchip_pin_bank rk3066b_pin_banks[] = {
@@ -3423,12 +3421,13 @@ static struct rockchip_pin_bank rk3066b_pin_banks[] = {
 	PIN_BANK(3, 32, "gpio3"),
 };
 
-static struct rockchip_pin_ctrl rk3066b_pin_ctrl = {
-		.pin_banks	= rk3066b_pin_banks,
-		.nr_banks	= ARRAY_SIZE(rk3066b_pin_banks),
-		.label		= "RK3066b-GPIO",
-		.type		= RK3066B,
-		.grf_mux_offset	= 0x60,
+static const struct rockchip_pin_ctrl rk3066b_pin_ctrl = {
+	.pin_banks		= rk3066b_pin_banks,
+	.nr_banks		= ARRAY_SIZE(rk3066b_pin_banks),
+	.nr_pins		= 128,
+	.label			= "RK3066b-GPIO",
+	.type			= RK3066B,
+	.grf_mux_offset		= 0x60,
 };
 
 static struct rockchip_pin_bank rk3128_pin_banks[] = {
@@ -3438,17 +3437,18 @@ static struct rockchip_pin_bank rk3128_pin_banks[] = {
 	PIN_BANK(3, 32, "gpio3"),
 };
 
-static struct rockchip_pin_ctrl rk3128_pin_ctrl = {
-		.pin_banks		= rk3128_pin_banks,
-		.nr_banks		= ARRAY_SIZE(rk3128_pin_banks),
-		.label			= "RK3128-GPIO",
-		.type			= RK3128,
-		.grf_mux_offset		= 0xa8,
-		.iomux_recalced		= rk3128_mux_recalced_data,
-		.niomux_recalced	= ARRAY_SIZE(rk3128_mux_recalced_data),
-		.iomux_routes		= rk3128_mux_route_data,
-		.niomux_routes		= ARRAY_SIZE(rk3128_mux_route_data),
-		.pull_calc_reg		= rk3128_calc_pull_reg_and_bit,
+static const struct rockchip_pin_ctrl rk3128_pin_ctrl = {
+	.pin_banks		= rk3128_pin_banks,
+	.nr_banks		= ARRAY_SIZE(rk3128_pin_banks),
+	.nr_pins		= 128,
+	.label			= "RK3128-GPIO",
+	.type			= RK3128,
+	.grf_mux_offset		= 0xa8,
+	.iomux_recalced		= rk3128_mux_recalced_data,
+	.niomux_recalced	= ARRAY_SIZE(rk3128_mux_recalced_data),
+	.iomux_routes		= rk3128_mux_route_data,
+	.niomux_routes		= ARRAY_SIZE(rk3128_mux_route_data),
+	.pull_calc_reg		= rk3128_calc_pull_reg_and_bit,
 };
 
 static struct rockchip_pin_bank rk3188_pin_banks[] = {
@@ -3458,13 +3458,14 @@ static struct rockchip_pin_bank rk3188_pin_banks[] = {
 	PIN_BANK(3, 32, "gpio3"),
 };
 
-static struct rockchip_pin_ctrl rk3188_pin_ctrl = {
-		.pin_banks		= rk3188_pin_banks,
-		.nr_banks		= ARRAY_SIZE(rk3188_pin_banks),
-		.label			= "RK3188-GPIO",
-		.type			= RK3188,
-		.grf_mux_offset		= 0x60,
-		.pull_calc_reg		= rk3188_calc_pull_reg_and_bit,
+static const struct rockchip_pin_ctrl rk3188_pin_ctrl = {
+	.pin_banks		= rk3188_pin_banks,
+	.nr_banks		= ARRAY_SIZE(rk3188_pin_banks),
+	.nr_pins		= 128,
+	.label			= "RK3188-GPIO",
+	.type			= RK3188,
+	.grf_mux_offset		= 0x60,
+	.pull_calc_reg		= rk3188_calc_pull_reg_and_bit,
 };
 
 static struct rockchip_pin_bank rk3228_pin_banks[] = {
@@ -3474,16 +3475,17 @@ static struct rockchip_pin_bank rk3228_pin_banks[] = {
 	PIN_BANK(3, 32, "gpio3"),
 };
 
-static struct rockchip_pin_ctrl rk3228_pin_ctrl = {
-		.pin_banks		= rk3228_pin_banks,
-		.nr_banks		= ARRAY_SIZE(rk3228_pin_banks),
-		.label			= "RK3228-GPIO",
-		.type			= RK3288,
-		.grf_mux_offset		= 0x0,
-		.iomux_routes		= rk3228_mux_route_data,
-		.niomux_routes		= ARRAY_SIZE(rk3228_mux_route_data),
-		.pull_calc_reg		= rk3228_calc_pull_reg_and_bit,
-		.drv_calc_reg		= rk3228_calc_drv_reg_and_bit,
+static const struct rockchip_pin_ctrl rk3228_pin_ctrl = {
+	.pin_banks		= rk3228_pin_banks,
+	.nr_banks		= ARRAY_SIZE(rk3228_pin_banks),
+	.nr_pins		= 128,
+	.label			= "RK3228-GPIO",
+	.type			= RK3288,
+	.grf_mux_offset		= 0x0,
+	.iomux_routes		= rk3228_mux_route_data,
+	.niomux_routes		= ARRAY_SIZE(rk3228_mux_route_data),
+	.pull_calc_reg		= rk3228_calc_pull_reg_and_bit,
+	.drv_calc_reg		= rk3228_calc_drv_reg_and_bit,
 };
 
 static struct rockchip_pin_bank rk3288_pin_banks[] = {
@@ -3527,17 +3529,18 @@ static struct rockchip_pin_bank rk3288_pin_banks[] = {
 	PIN_BANK(8, 16, "gpio8"),
 };
 
-static struct rockchip_pin_ctrl rk3288_pin_ctrl = {
-		.pin_banks		= rk3288_pin_banks,
-		.nr_banks		= ARRAY_SIZE(rk3288_pin_banks),
-		.label			= "RK3288-GPIO",
-		.type			= RK3288,
-		.grf_mux_offset		= 0x0,
-		.pmu_mux_offset		= 0x84,
-		.iomux_routes		= rk3288_mux_route_data,
-		.niomux_routes		= ARRAY_SIZE(rk3288_mux_route_data),
-		.pull_calc_reg		= rk3288_calc_pull_reg_and_bit,
-		.drv_calc_reg		= rk3288_calc_drv_reg_and_bit,
+static const struct rockchip_pin_ctrl rk3288_pin_ctrl = {
+	.pin_banks		= rk3288_pin_banks,
+	.nr_banks		= ARRAY_SIZE(rk3288_pin_banks),
+	.nr_pins		= 248,
+	.label			= "RK3288-GPIO",
+	.type			= RK3288,
+	.grf_mux_offset		= 0x0,
+	.pmu_mux_offset		= 0x84,
+	.iomux_routes		= rk3288_mux_route_data,
+	.niomux_routes		= ARRAY_SIZE(rk3288_mux_route_data),
+	.pull_calc_reg		= rk3288_calc_pull_reg_and_bit,
+	.drv_calc_reg		= rk3288_calc_drv_reg_and_bit,
 };
 
 static struct rockchip_pin_bank rk3308_pin_banks[] = {
@@ -3573,13 +3576,28 @@ static struct rockchip_pin_ctrl rk3308_pin_ctrl = {
 		.niomux_recalced	= ARRAY_SIZE(rk3308_mux_recalced_data),
 		.iomux_routes		= rk3308_mux_route_data,
 		.niomux_routes		= ARRAY_SIZE(rk3308_mux_route_data),
-		.ctrl_data_re_init	= rk3308b_ctrl_data_re_init,
-		.soc_data_init		= rk3308b_soc_data_init,
 		.pull_calc_reg		= rk3308_calc_pull_reg_and_bit,
 		.drv_calc_reg		= rk3308_calc_drv_reg_and_bit,
 		.schmitt_calc_reg	= rk3308_calc_schmitt_reg_and_bit,
 };
 
+static const struct rockchip_pin_ctrl rk3308b_pin_ctrl = {
+	.pin_banks		= rk3308_pin_banks,
+	.nr_banks		= ARRAY_SIZE(rk3308_pin_banks),
+	.nr_pins		= 160,
+	.label			= "RK3308-GPIO",
+	.type			= RK3308,
+	.grf_mux_offset		= 0x0,
+	.iomux_recalced		= rk3308b_mux_recalced_data,
+	.niomux_recalced	= ARRAY_SIZE(rk3308b_mux_recalced_data),
+	.iomux_routes		= rk3308b_mux_route_data,
+	.niomux_routes		= ARRAY_SIZE(rk3308b_mux_route_data),
+	.soc_data_init		= rk3308b_soc_data_init,
+	.pull_calc_reg		= rk3308_calc_pull_reg_and_bit,
+	.drv_calc_reg		= rk3308_calc_drv_reg_and_bit,
+	.schmitt_calc_reg	= rk3308_calc_schmitt_reg_and_bit,
+};
+
 static struct rockchip_pin_bank rk3328_pin_banks[] = {
 	PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", 0, 0, 0, 0),
 	PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1", 0, 0, 0, 0),
@@ -3594,19 +3612,20 @@ static struct rockchip_pin_bank rk3328_pin_banks[] = {
 			     0),
 };
 
-static struct rockchip_pin_ctrl rk3328_pin_ctrl = {
-		.pin_banks		= rk3328_pin_banks,
-		.nr_banks		= ARRAY_SIZE(rk3328_pin_banks),
-		.label			= "RK3328-GPIO",
-		.type			= RK3288,
-		.grf_mux_offset		= 0x0,
-		.iomux_recalced		= rk3328_mux_recalced_data,
-		.niomux_recalced	= ARRAY_SIZE(rk3328_mux_recalced_data),
-		.iomux_routes		= rk3328_mux_route_data,
-		.niomux_routes		= ARRAY_SIZE(rk3328_mux_route_data),
-		.pull_calc_reg		= rk3228_calc_pull_reg_and_bit,
-		.drv_calc_reg		= rk3228_calc_drv_reg_and_bit,
-		.schmitt_calc_reg	= rk3328_calc_schmitt_reg_and_bit,
+static const struct rockchip_pin_ctrl rk3328_pin_ctrl = {
+	.pin_banks		= rk3328_pin_banks,
+	.nr_banks		= ARRAY_SIZE(rk3328_pin_banks),
+	.nr_pins		= 128,
+	.label			= "RK3328-GPIO",
+	.type			= RK3288,
+	.grf_mux_offset		= 0x0,
+	.iomux_recalced		= rk3328_mux_recalced_data,
+	.niomux_recalced	= ARRAY_SIZE(rk3328_mux_recalced_data),
+	.iomux_routes		= rk3328_mux_route_data,
+	.niomux_routes		= ARRAY_SIZE(rk3328_mux_route_data),
+	.pull_calc_reg		= rk3228_calc_pull_reg_and_bit,
+	.drv_calc_reg		= rk3228_calc_drv_reg_and_bit,
+	.schmitt_calc_reg	= rk3328_calc_schmitt_reg_and_bit,
 };
 
 static struct rockchip_pin_bank rk3368_pin_banks[] = {
@@ -3620,15 +3639,16 @@ static struct rockchip_pin_bank rk3368_pin_banks[] = {
 	PIN_BANK(3, 32, "gpio3"),
 };
 
-static struct rockchip_pin_ctrl rk3368_pin_ctrl = {
-		.pin_banks		= rk3368_pin_banks,
-		.nr_banks		= ARRAY_SIZE(rk3368_pin_banks),
-		.label			= "RK3368-GPIO",
-		.type			= RK3368,
-		.grf_mux_offset		= 0x0,
-		.pmu_mux_offset		= 0x0,
-		.pull_calc_reg		= rk3368_calc_pull_reg_and_bit,
-		.drv_calc_reg		= rk3368_calc_drv_reg_and_bit,
+static const struct rockchip_pin_ctrl rk3368_pin_ctrl = {
+	.pin_banks		= rk3368_pin_banks,
+	.nr_banks		= ARRAY_SIZE(rk3368_pin_banks),
+	.nr_pins		= 128,
+	.label			= "RK3368-GPIO",
+	.type			= RK3368,
+	.grf_mux_offset		= 0x0,
+	.pmu_mux_offset		= 0x0,
+	.pull_calc_reg		= rk3368_calc_pull_reg_and_bit,
+	.drv_calc_reg		= rk3368_calc_drv_reg_and_bit,
 };
 
 static struct rockchip_pin_bank rk3399_pin_banks[] = {
@@ -3684,19 +3704,20 @@ static struct rockchip_pin_bank rk3399_pin_banks[] = {
 			   ),
 };
 
-static struct rockchip_pin_ctrl rk3399_pin_ctrl = {
-		.pin_banks		= rk3399_pin_banks,
-		.nr_banks		= ARRAY_SIZE(rk3399_pin_banks),
-		.label			= "RK3399-GPIO",
-		.type			= RK3399,
-		.grf_mux_offset		= 0xe000,
-		.pmu_mux_offset		= 0x0,
-		.grf_drv_offset		= 0xe100,
-		.pmu_drv_offset		= 0x80,
-		.iomux_routes		= rk3399_mux_route_data,
-		.niomux_routes		= ARRAY_SIZE(rk3399_mux_route_data),
-		.pull_calc_reg		= rk3399_calc_pull_reg_and_bit,
-		.drv_calc_reg		= rk3399_calc_drv_reg_and_bit,
+static const struct rockchip_pin_ctrl rk3399_pin_ctrl = {
+	.pin_banks		= rk3399_pin_banks,
+	.nr_banks		= ARRAY_SIZE(rk3399_pin_banks),
+	.nr_pins		= 160,
+	.label			= "RK3399-GPIO",
+	.type			= RK3399,
+	.grf_mux_offset		= 0xe000,
+	.pmu_mux_offset		= 0x0,
+	.grf_drv_offset		= 0xe100,
+	.pmu_drv_offset		= 0x80,
+	.iomux_routes		= rk3399_mux_route_data,
+	.niomux_routes		= ARRAY_SIZE(rk3399_mux_route_data),
+	.pull_calc_reg		= rk3399_calc_pull_reg_and_bit,
+	.drv_calc_reg		= rk3399_calc_drv_reg_and_bit,
 };
 
 static const struct udevice_id rockchip_pinctrl_dt_match[] = {

commit e49e7bf9b1615d68b8dd8786987268ec61ed4d68
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 7 15:48:11 2020 +0800

    spl: remove unused variable "rollback_index"
    
    We prefer use "gd->rollback_index".
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I45bc64e38224064797d8d8bd89d9d3881f8793b5

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index f732fba413..4620a0aba5 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -436,7 +436,6 @@ static int spl_internal_load_simple_fit(struct spl_image_info *spl_image,
 		return -EINVAL;
 	}
 
-	spl_image->rollback_index = this_index;
 	printf("rollback index: %d >= %d(min), OK\n", this_index, min_index);
 #endif
 #endif
diff --git a/include/spl.h b/include/spl.h
index c858676a63..a453afb53b 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -37,9 +37,6 @@ struct spl_image_info {
 	uintptr_t entry_point_os;	/* point to uboot or kernel */
 #endif
 	void *fdt_addr;
-#if CONFIG_IS_ENABLED(FIT_ROLLBACK_PROTECT)
-	u32 rollback_index;
-#endif
 	u32 boot_device;
 	u32 next_stage;
 	u32 size;

commit 36aa04d944ecd467938ec33b47d99aea418eb009
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 7 16:09:59 2020 +0800

    rockchip: boot_mode: add maskrom download for "reboot loader"
    
    Fallback to maskrom download mode if rockusb command failed.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Iccfa8745aeac800b1e048e0301147424cd2e9478

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index c4d91fb9a0..bd031fe519 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -182,7 +182,7 @@ int setup_boot_mode(void)
 		break;
 	case BOOT_MODE_LOADER:
 		printf("enter Rockusb!\n");
-		env_set("preboot", "setenv preboot; rockusb 0 ${devtype} ${devnum}");
+		env_set("preboot", "setenv preboot; rockusb 0 ${devtype} ${devnum}; rbrom");
 		break;
 	case BOOT_MODE_CHARGING:
 		printf("enter charging!\n");

commit d5989feab2ac6608d35f3ff5537ffcd87fb7f7e7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 7 15:33:51 2020 +0800

    rockchip: spl: ignore writing rollback index 0
    
    Don't return failure to stop booting.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If699019b588c400b1d37f1b77d02d5ccae4e68dc

diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index cafe3e8c05..e99e32ed7a 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -344,7 +344,10 @@ static int fit_write_otp_rollback_index(u32 fit_index)
 	struct udevice *dev;
 	u32 index, i, otp_index;
 
-	if (!fit_index || fit_index > OTP_UBOOT_ROLLBACK_WORDS * 32)
+	if (!fit_index)
+		return 0;
+
+	if (fit_index > OTP_UBOOT_ROLLBACK_WORDS * 32)
 		return -EINVAL;
 
 	dev = misc_otp_get_device(OTP_S);

commit 31767fe77ddd6aacc68fffd11c0e19b6c08a9fb4
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Jul 7 15:30:03 2020 +0800

    misc: otp: support write rollback space several times
    
    Naturally, otp is written by bytes and programed just one time.
    Now the rollback space is written by bit and programed several times.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I964693c5067ffdedfc0990f038f6d013a49a41a8

diff --git a/drivers/misc/rockchip-secure-otp-v2.S b/drivers/misc/rockchip-secure-otp-v2.S
index afb6b6edc2..2382004426 100644
--- a/drivers/misc/rockchip-secure-otp-v2.S
+++ b/drivers/misc/rockchip-secure-otp-v2.S
@@ -20,42 +20,42 @@
 	.fpu softvfp
 	.type	rockchip_secure_otp_v2_ioctl, %function
 rockchip_secure_otp_v2_ioctl:
-.LFB272:
+.LFB268:
 	.file 1 "drivers/misc/rockchip-secure-otp-v2.c"
-	.loc 1 165 0
+	.loc 1 172 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 .LVL0:
-	.loc 1 168 0
+	.loc 1 175 0
 	movw	r3, #27908
 	cmp	r1, r3
 .LVL1:
 .LBB18:
 .LBB19:
-	.loc 1 158 0
+	.loc 1 165 0
 	ittte	eq
 	moveq	r3, #8
 .LBE19:
 .LBE18:
-	.loc 1 171 0
+	.loc 1 178 0
 	moveq	r0, #0
 .LVL2:
 .LBB21:
 .LBB20:
-	.loc 1 158 0
+	.loc 1 165 0
 	streq	r3, [r2]
 .LVL3:
 .LBE20:
 .LBE21:
-	.loc 1 166 0
+	.loc 1 173 0
 	mvnne	r0, #21
 .LVL4:
-	.loc 1 178 0
+	.loc 1 185 0
 	bx	lr
 	.cfi_endproc
-.LFE272:
+.LFE268:
 	.size	rockchip_secure_otp_v2_ioctl, .-rockchip_secure_otp_v2_ioctl
 	.section	.text.rockchip_secure_otp_v2_read,"ax",%progbits
 	.align	1
@@ -65,7 +65,7 @@ rockchip_secure_otp_v2_ioctl:
 	.fpu softvfp
 	.type	rockchip_secure_otp_v2_read, %function
 rockchip_secure_otp_v2_read:
-.LFB268:
+.LFB264:
 	.loc 1 17 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
@@ -256,7 +256,7 @@ rockchip_secure_otp_v2_read:
 .L26:
 	.word	.LC0
 	.cfi_endproc
-.LFE268:
+.LFE264:
 	.size	rockchip_secure_otp_v2_read, .-rockchip_secure_otp_v2_read
 	.section	.text.rockchip_secure_otp_v2_ofdata_to_platdata,"ax",%progbits
 	.align	1
@@ -266,8 +266,8 @@ rockchip_secure_otp_v2_read:
 	.fpu softvfp
 	.type	rockchip_secure_otp_v2_ofdata_to_platdata, %function
 rockchip_secure_otp_v2_ofdata_to_platdata:
-.LFB273:
-	.loc 1 187 0
+.LFB269:
+	.loc 1 194 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
@@ -278,29 +278,29 @@ rockchip_secure_otp_v2_ofdata_to_platdata:
 	.cfi_offset 4, -12
 	.cfi_offset 5, -8
 	.cfi_offset 14, -4
-	.loc 1 187 0
+	.loc 1 194 0
 	mov	r5, r0
-	.loc 1 188 0
+	.loc 1 195 0
 	bl	dev_get_platdata
 .LVL31:
 	mov	r4, r0
 .LVL32:
-	.loc 1 190 0
+	.loc 1 197 0
 	mov	r0, r5
 .LVL33:
 	bl	dev_read_addr_ptr
 .LVL34:
-	.loc 1 191 0
+	.loc 1 198 0
 	movs	r2, #0
-	.loc 1 190 0
+	.loc 1 197 0
 	str	r0, [r4]
-	.loc 1 191 0
+	.loc 1 198 0
 	ldr	r1, .L29
 	mov	r0, r5
 	bl	dev_read_u32_default
 .LVL35:
 	str	r0, [r4, #4]
-	.loc 1 195 0
+	.loc 1 202 0
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
 .LVL36:
@@ -309,7 +309,7 @@ rockchip_secure_otp_v2_ofdata_to_platdata:
 .L29:
 	.word	.LC1
 	.cfi_endproc
-.LFE273:
+.LFE269:
 	.size	rockchip_secure_otp_v2_ofdata_to_platdata, .-rockchip_secure_otp_v2_ofdata_to_platdata
 	.section	.text.rockchip_secure_otp_v2_write,"ax",%progbits
 	.align	1
@@ -319,7 +319,7 @@ rockchip_secure_otp_v2_ofdata_to_platdata:
 	.fpu softvfp
 	.type	rockchip_secure_otp_v2_write, %function
 rockchip_secure_otp_v2_write:
-.LFB270:
+.LFB266:
 	.loc 1 114 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
@@ -339,7 +339,7 @@ rockchip_secure_otp_v2_write:
 	mov	r8, r3
 	mov	r5, r1
 	mov	r10, r2
-	mov	r7, r0
+	mov	r6, r0
 	.loc 1 115 0
 	bl	dev_get_platdata
 .LVL38:
@@ -351,15 +351,15 @@ rockchip_secure_otp_v2_write:
 	bl	malloc_simple
 .LVL41:
 	.loc 1 120 0
-	mov	r6, r0
+	mov	r7, r0
 	cbnz	r0, .L32
 .LVL42:
-.L64:
-	.loc 1 133 0
-	mov	r7, #-1
+.L66:
+	.loc 1 140 0
+	mov	r6, #-1
 .L31:
-	.loc 1 154 0
-	mov	r0, r7
+	.loc 1 161 0
+	mov	r0, r6
 	add	sp, sp, #8
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
@@ -371,32 +371,33 @@ rockchip_secure_otp_v2_write:
 	.loc 1 123 0
 	mov	r2, r0
 	mov	r3, r8
-	mov	r0, r7
+	mov	r0, r6
 .LVL44:
 	mov	r1, r5
 	bl	rockchip_secure_otp_v2_read
 .LVL45:
 	.loc 1 124 0
-	mov	r7, r0
+	mov	r6, r0
 .LVL46:
 	cmp	r0, #0
-	bne	.L64
-	mov	r3, r6
+	bne	.L66
+	mov	r3, r0
+	.loc 1 134 0 discriminator 1
+	sub	r2, r5, #104
 .L35:
 .LVL47:
 	.loc 1 129 0 discriminator 1
-	subs	r2, r3, r6
-	cmp	r8, r2
-	bgt	.L36
+	cmp	r3, r8
+	blt	.L37
 	mov	r3, #512
 .LVL48:
 .LBB39:
-	.loc 1 140 0 discriminator 3
+	.loc 1 147 0 discriminator 3
 	movs	r1, #0
-.L37:
+.L38:
 .LVL49:
 	.syntax unified
-@ 140 "drivers/misc/rockchip-secure-otp-v2.c" 1
+@ 147 "drivers/misc/rockchip-secure-otp-v2.c" 1
 	dmb sy
 @ 0 "" 2
 	.thumb
@@ -406,10 +407,10 @@ rockchip_secure_otp_v2_write:
 .LVL50:
 	adds	r3, r3, #4
 .LBE39:
-	.loc 1 139 0 discriminator 3
+	.loc 1 146 0 discriminator 3
 	cmp	r3, #640
-	bne	.L37
-	movs	r6, #0
+	bne	.L38
+	movs	r7, #0
 .LVL51:
 .LBB40:
 .LBB41:
@@ -418,20 +419,20 @@ rockchip_secure_otp_v2_write:
 	sub	r3, r5, #16
 	str	r3, [sp]
 .LVL52:
-.L38:
+.L39:
 .LBE41:
 .LBE40:
-	.loc 1 142 0 discriminator 1
-	cmp	r6, r8
-	blt	.L45
+	.loc 1 149 0 discriminator 1
+	cmp	r7, r8
+	blt	.L46
 	mov	r3, #512
 .LBB51:
-	.loc 1 151 0 discriminator 3
+	.loc 1 158 0 discriminator 3
 	movs	r1, #255
-.L46:
+.L47:
 .LVL53:
 	.syntax unified
-@ 151 "drivers/misc/rockchip-secure-otp-v2.c" 1
+@ 158 "drivers/misc/rockchip-secure-otp-v2.c" 1
 	dmb sy
 @ 0 "" 2
 	.thumb
@@ -440,50 +441,58 @@ rockchip_secure_otp_v2_write:
 	str	r1, [r2, r3]
 	adds	r3, r3, #4
 .LBE51:
-	.loc 1 150 0 discriminator 3
+	.loc 1 157 0 discriminator 3
 	cmp	r3, #640
-	bne	.L46
+	bne	.L47
 	b	.L31
 .LVL54:
-.L36:
-	.loc 1 130 0
-	ldrb	r2, [r3], #1	@ zero_extendqisi2
+.L37:
+	.loc 1 134 0
+	adds	r1, r2, r3
+	cmp	r1, #7
+	bls	.L36
+	.loc 1 137 0
+	ldrb	r1, [r7, r3]	@ zero_extendqisi2
+	cbz	r1, .L36
+	.loc 1 138 0
+	ldr	r0, .L67
 .LVL55:
-	cmp	r2, #0
-	beq	.L35
-	.loc 1 131 0
-	ldr	r0, .L65
-.LVL56:
 	bl	printf
+.LVL56:
+	b	.L66
 .LVL57:
-	b	.L64
+.L36:
+	.loc 1 129 0 discriminator 2
+	adds	r3, r3, #1
 .LVL58:
-.L45:
+	b	.L35
+.LVL59:
+.L46:
 .LBB52:
 .LBB48:
 	.loc 1 78 0
 	cmp	r5, #448
 .LBE48:
 .LBE52:
-	.loc 1 143 0
-	ldrb	r3, [r10, r6]	@ zero_extendqisi2
-.LVL59:
+	.loc 1 150 0
+	ldrb	r3, [r10, r7]	@ zero_extendqisi2
+.LVL60:
 .LBB53:
 .LBB49:
 	.loc 1 78 0
-	bgt	.L41
+	bgt	.L42
 	.loc 1 82 0
-	cbz	r5, .L40
+	cbz	r5, .L41
 	ldr	r1, [sp]
 	cmp	r1, #31
-	bls	.L40
+	bls	.L41
 	cmp	r2, #284
-	bls	.L40
+	bls	.L41
 	.loc 1 85 0
-	ldr	r0, .L65+4
+	ldr	r0, .L67+4
 	bl	printf
-.LVL60:
-.L41:
+.LVL61:
+.L42:
 .LBB42:
 	.loc 1 95 0 discriminator 3
 	mov	r3, #512
@@ -491,12 +500,12 @@ rockchip_secure_otp_v2_write:
 .LBE49:
 .LBE53:
 .LBB54:
-	.loc 1 145 0 discriminator 3
+	.loc 1 152 0 discriminator 3
 	movs	r1, #255
-.L44:
-.LVL61:
+.L45:
+.LVL62:
 	.syntax unified
-@ 145 "drivers/misc/rockchip-secure-otp-v2.c" 1
+@ 152 "drivers/misc/rockchip-secure-otp-v2.c" 1
 	dmb sy
 @ 0 "" 2
 	.thumb
@@ -505,19 +514,19 @@ rockchip_secure_otp_v2_write:
 	str	r1, [r2, r3]
 	adds	r3, r3, #4
 .LBE54:
-	.loc 1 144 0 discriminator 3
+	.loc 1 151 0 discriminator 3
 	cmp	r3, #640
-	bne	.L44
-	b	.L64
-.LVL62:
-.L40:
+	bne	.L45
+	b	.L66
+.LVL63:
+.L41:
 .LBB55:
 .LBB50:
 	.loc 1 89 0
-	cbz	r3, .L42
-	adds	r0, r5, r6
+	cbz	r3, .L43
+	adds	r0, r5, r7
 	lsls	r0, r0, #3
-.LVL63:
+.LVL64:
 .LBB43:
 	.loc 1 92 0
 	.syntax unified
@@ -528,7 +537,7 @@ rockchip_secure_otp_v2_write:
 	.syntax unified
 	ldr	r1, [r4]
 	str	r0, [r1, #52]
-.LVL64:
+.LVL65:
 .LBE43:
 .LBB44:
 	.loc 1 93 0
@@ -540,9 +549,9 @@ rockchip_secure_otp_v2_write:
 	.syntax unified
 	ldr	r1, [r4]
 	movs	r0, #7
-.LVL65:
-	str	r0, [r1, #56]
 .LVL66:
+	str	r0, [r1, #56]
+.LVL67:
 .LBE44:
 .LBB45:
 	.loc 1 94 0
@@ -554,7 +563,7 @@ rockchip_secure_otp_v2_write:
 	.syntax unified
 	ldr	r1, [r4]
 	str	r3, [r1, #60]
-.LVL67:
+.LVL68:
 .LBE45:
 .LBB46:
 	.loc 1 95 0
@@ -564,56 +573,56 @@ rockchip_secure_otp_v2_write:
 @ 0 "" 2
 	.thumb
 	.syntax unified
-	ldr	fp, .L65+8
+	ldr	fp, .L67+8
 	movs	r0, #1
 	ldr	r1, [r4]
 	str	r0, [r1, #68]
-.LVL68:
-.L43:
+.LVL69:
+.L44:
 .LBE46:
 .LBB47:
 	.loc 1 98 0
 	ldr	r1, [r4]
 	ldr	r1, [r1, #72]
-.LVL69:
+.LVL70:
 	.syntax unified
 @ 98 "drivers/misc/rockchip-secure-otp-v2.c" 1
 	dmb sy
 @ 0 "" 2
-.LVL70:
+.LVL71:
 	.thumb
 	.syntax unified
 .LBE47:
 	.loc 1 99 0
-	cbz	r1, .L42
+	cbz	r1, .L43
 	.loc 1 102 0
 	subs	fp, fp, #1
-.LVL71:
-	str	r2, [sp, #4]
-	beq	.L41
 .LVL72:
+	str	r2, [sp, #4]
+	beq	.L42
+.LVL73:
 	.loc 1 106 0
 	movs	r0, #1
 	bl	udelay
-.LVL73:
-	ldr	r2, [sp, #4]
-	b	.L43
 .LVL74:
-.L42:
+	ldr	r2, [sp, #4]
+	b	.L44
+.LVL75:
+.L43:
 .LBE50:
 .LBE55:
-	.loc 1 142 0
-	adds	r6, r6, #1
-.LVL75:
-	b	.L38
-.L66:
+	.loc 1 149 0
+	adds	r7, r7, #1
+.LVL76:
+	b	.L39
+.L68:
 	.align	2
-.L65:
+.L67:
 	.word	.LC2
 	.word	.LC0
 	.word	100002
 	.cfi_endproc
-.LFE270:
+.LFE266:
 	.size	rockchip_secure_otp_v2_write, .-rockchip_secure_otp_v2_write
 	.global	_u_boot_list_2_driver_2_rockchip_secure_otp_v2
 	.section	.rodata.rockchip_otp_ids,"a",%progbits
@@ -700,15 +709,15 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.file 35 "include/log.h"
 	.section	.debug_info,"",%progbits
 .Ldebug_info0:
-	.4byte	0x1ce8
+	.4byte	0x1bef
 	.2byte	0x4
 	.4byte	.Ldebug_abbrev0
 	.byte	0x4
 	.uleb128 0x1
-	.4byte	.LASF425
+	.4byte	.LASF420
 	.byte	0xc
-	.4byte	.LASF426
-	.4byte	.LASF427
+	.4byte	.LASF421
+	.4byte	.LASF422
 	.4byte	.Ldebug_ranges0+0x70
 	.4byte	0
 	.4byte	.Ldebug_line0
@@ -881,7 +890,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LASF27
 	.byte	0x8
 	.byte	0x81
-	.4byte	0x13e3
+	.4byte	0x12ff
 	.byte	0
 	.uleb128 0xe
 	.4byte	.LASF28
@@ -911,7 +920,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LASF32
 	.byte	0x8
 	.byte	0x86
-	.4byte	0x138a
+	.4byte	0x12a6
 	.byte	0x14
 	.uleb128 0xe
 	.4byte	.LASF33
@@ -935,7 +944,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LASF36
 	.byte	0x8
 	.byte	0x8a
-	.4byte	0x1426
+	.4byte	0x1342
 	.byte	0x24
 	.uleb128 0xe
 	.4byte	.LASF37
@@ -1133,7 +1142,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1ff
 	.byte	0
 	.uleb128 0x18
-	.4byte	.LASF302
+	.4byte	.LASF306
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0x383
@@ -1864,12 +1873,12 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x196
 	.4byte	0x968
 	.uleb128 0x21
-	.4byte	.LASF346
+	.4byte	.LASF340
 	.byte	0x4
 	.4byte	0x50
 	.byte	0x18
 	.byte	0xe
-	.4byte	0xbb3
+	.4byte	0xbbf
 	.uleb128 0x22
 	.4byte	.LASF158
 	.byte	0
@@ -2140,8 +2149,14 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x22
 	.4byte	.LASF247
 	.byte	0x59
-	.uleb128 0x23
+	.uleb128 0x22
 	.4byte	.LASF248
+	.byte	0x5a
+	.uleb128 0x22
+	.4byte	.LASF249
+	.byte	0x5b
+	.uleb128 0x23
+	.4byte	.LASF250
 	.sleb128 -1
 	.byte	0
 	.uleb128 0x24
@@ -2149,19 +2164,19 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x7b
 	.byte	0x23
 	.byte	0xf6
-	.4byte	0xbc6
+	.4byte	0xbd2
 	.uleb128 0x22
-	.4byte	.LASF249
+	.4byte	.LASF251
 	.byte	0x5
 	.byte	0
 	.uleb128 0xd
-	.4byte	.LASF250
+	.4byte	.LASF252
 	.byte	0x20
 	.byte	0x14
 	.byte	0xc
-	.4byte	0xc27
+	.4byte	0xc33
 	.uleb128 0xe
-	.4byte	.LASF251
+	.4byte	.LASF253
 	.byte	0x14
 	.byte	0x22
 	.4byte	0x37
@@ -2179,38 +2194,38 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x7b
 	.byte	0x8
 	.uleb128 0xe
-	.4byte	.LASF252
+	.4byte	.LASF254
 	.byte	0x14
 	.byte	0x25
 	.4byte	0x37
 	.byte	0xc
 	.uleb128 0xe
-	.4byte	.LASF253
+	.4byte	.LASF255
 	.byte	0x14
 	.byte	0x26
 	.4byte	0x89
 	.byte	0x10
 	.uleb128 0xe
-	.4byte	.LASF254
+	.4byte	.LASF256
 	.byte	0x14
 	.byte	0x28
 	.4byte	0x37
 	.byte	0x18
 	.uleb128 0xe
-	.4byte	.LASF255
+	.4byte	.LASF257
 	.byte	0x14
 	.byte	0x29
 	.4byte	0x37
 	.byte	0x1c
 	.byte	0
 	.uleb128 0xd
-	.4byte	.LASF256
+	.4byte	.LASF258
 	.byte	0x10
 	.byte	0x15
 	.byte	0x22
-	.4byte	0xc63
+	.4byte	0xc6f
 	.uleb128 0xe
-	.4byte	.LASF257
+	.4byte	.LASF259
 	.byte	0x15
 	.byte	0x23
 	.4byte	0x9f
@@ -2222,24 +2237,24 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x9f
 	.byte	0x4
 	.uleb128 0xe
-	.4byte	.LASF258
+	.4byte	.LASF260
 	.byte	0x15
 	.byte	0x25
 	.4byte	0x9f
 	.byte	0x8
 	.uleb128 0xe
-	.4byte	.LASF259
+	.4byte	.LASF261
 	.byte	0x15
 	.byte	0x26
 	.4byte	0xfc
 	.byte	0xc
 	.byte	0
 	.uleb128 0xd
-	.4byte	.LASF260
-	.byte	0xf0
+	.4byte	.LASF262
+	.byte	0xf8
 	.byte	0x15
 	.byte	0x29
-	.4byte	0xe4e
+	.4byte	0xe72
 	.uleb128 0xf
 	.ascii	"bd\000"
 	.byte	0x15
@@ -2253,199 +2268,199 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x37
 	.byte	0x4
 	.uleb128 0xe
-	.4byte	.LASF258
+	.4byte	.LASF260
 	.byte	0x15
 	.byte	0x2c
 	.4byte	0x7b
 	.byte	0x8
 	.uleb128 0xe
-	.4byte	.LASF261
+	.4byte	.LASF263
 	.byte	0x15
 	.byte	0x2d
 	.4byte	0x37
 	.byte	0xc
 	.uleb128 0xe
-	.4byte	.LASF262
+	.4byte	.LASF264
 	.byte	0x15
 	.byte	0x2e
 	.4byte	0x37
 	.byte	0x10
 	.uleb128 0xe
-	.4byte	.LASF263
+	.4byte	.LASF265
 	.byte	0x15
 	.byte	0x30
 	.4byte	0x37
 	.byte	0x14
 	.uleb128 0xe
-	.4byte	.LASF264
+	.4byte	.LASF266
 	.byte	0x15
 	.byte	0x31
 	.4byte	0x37
 	.byte	0x18
 	.uleb128 0xe
-	.4byte	.LASF265
+	.4byte	.LASF267
 	.byte	0x15
 	.byte	0x3d
 	.4byte	0x37
 	.byte	0x1c
 	.uleb128 0xe
-	.4byte	.LASF266
+	.4byte	.LASF268
 	.byte	0x15
 	.byte	0x41
 	.4byte	0x37
 	.byte	0x20
 	.uleb128 0xe
-	.4byte	.LASF267
+	.4byte	.LASF269
 	.byte	0x15
 	.byte	0x42
 	.4byte	0x37
 	.byte	0x24
 	.uleb128 0xe
-	.4byte	.LASF268
+	.4byte	.LASF270
 	.byte	0x15
 	.byte	0x44
 	.4byte	0x37
 	.byte	0x28
 	.uleb128 0xe
-	.4byte	.LASF269
+	.4byte	.LASF271
 	.byte	0x15
 	.byte	0x45
 	.4byte	0x37
 	.byte	0x2c
 	.uleb128 0xe
-	.4byte	.LASF270
+	.4byte	.LASF272
 	.byte	0x15
 	.byte	0x46
 	.4byte	0xc0
 	.byte	0x30
 	.uleb128 0xe
-	.4byte	.LASF271
+	.4byte	.LASF273
 	.byte	0x15
 	.byte	0x47
 	.4byte	0x37
 	.byte	0x34
 	.uleb128 0xe
-	.4byte	.LASF272
+	.4byte	.LASF274
 	.byte	0x15
 	.byte	0x48
 	.4byte	0x37
 	.byte	0x38
 	.uleb128 0xe
-	.4byte	.LASF273
+	.4byte	.LASF275
 	.byte	0x15
 	.byte	0x49
 	.4byte	0x37
 	.byte	0x3c
 	.uleb128 0xe
-	.4byte	.LASF274
+	.4byte	.LASF276
 	.byte	0x15
 	.byte	0x4a
 	.4byte	0x37
 	.byte	0x40
 	.uleb128 0xe
-	.4byte	.LASF275
+	.4byte	.LASF277
 	.byte	0x15
 	.byte	0x4b
-	.4byte	0xe4e
+	.4byte	0xe72
 	.byte	0x44
 	.uleb128 0xe
-	.4byte	.LASF276
+	.4byte	.LASF278
 	.byte	0x15
 	.byte	0x4e
 	.4byte	0x250
 	.byte	0x48
 	.uleb128 0xe
-	.4byte	.LASF277
+	.4byte	.LASF279
 	.byte	0x15
 	.byte	0x4f
 	.4byte	0x250
 	.byte	0x4c
 	.uleb128 0xe
-	.4byte	.LASF278
+	.4byte	.LASF280
 	.byte	0x15
 	.byte	0x50
 	.4byte	0x283
 	.byte	0x50
 	.uleb128 0xe
-	.4byte	.LASF279
+	.4byte	.LASF281
 	.byte	0x15
 	.byte	0x57
 	.4byte	0x256
 	.byte	0x58
 	.uleb128 0xe
-	.4byte	.LASF280
+	.4byte	.LASF282
 	.byte	0x15
 	.byte	0x59
 	.4byte	0x256
 	.byte	0x5c
 	.uleb128 0xe
-	.4byte	.LASF281
+	.4byte	.LASF283
 	.byte	0x15
 	.byte	0x5c
 	.4byte	0x256
 	.byte	0x60
 	.uleb128 0xe
-	.4byte	.LASF282
+	.4byte	.LASF284
 	.byte	0x15
 	.byte	0x5e
 	.4byte	0x128
 	.byte	0x64
 	.uleb128 0xe
-	.4byte	.LASF283
+	.4byte	.LASF285
 	.byte	0x15
 	.byte	0x5f
 	.4byte	0x37
 	.byte	0x68
 	.uleb128 0xe
-	.4byte	.LASF284
+	.4byte	.LASF286
 	.byte	0x15
 	.byte	0x61
-	.4byte	0xec6
+	.4byte	0xeea
 	.byte	0x6c
 	.uleb128 0xf
 	.ascii	"jt\000"
 	.byte	0x15
 	.byte	0x63
-	.4byte	0xed1
+	.4byte	0xef5
 	.byte	0x70
 	.uleb128 0xe
-	.4byte	.LASF285
+	.4byte	.LASF287
 	.byte	0x15
 	.byte	0x64
-	.4byte	0xed7
+	.4byte	0xefb
 	.byte	0x74
 	.uleb128 0xe
-	.4byte	.LASF286
+	.4byte	.LASF288
 	.byte	0x15
 	.byte	0x6e
 	.4byte	0x7b
 	.byte	0x94
 	.uleb128 0xe
-	.4byte	.LASF287
+	.4byte	.LASF289
 	.byte	0x15
 	.byte	0x6f
 	.4byte	0x7b
 	.byte	0x98
 	.uleb128 0xe
-	.4byte	.LASF288
+	.4byte	.LASF290
 	.byte	0x15
 	.byte	0x71
 	.4byte	0x37
 	.byte	0x9c
 	.uleb128 0xe
-	.4byte	.LASF289
+	.4byte	.LASF291
 	.byte	0x15
 	.byte	0x72
 	.4byte	0x37
 	.byte	0xa0
 	.uleb128 0xe
-	.4byte	.LASF290
+	.4byte	.LASF292
 	.byte	0x15
 	.byte	0x73
 	.4byte	0x37
 	.byte	0xa4
 	.uleb128 0xe
-	.4byte	.LASF291
+	.4byte	.LASF293
 	.byte	0x15
 	.byte	0x7c
 	.4byte	0x250
@@ -2454,42 +2469,54 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LASF127
 	.byte	0x15
 	.byte	0x7d
-	.4byte	0xbc6
+	.4byte	0xbd2
 	.byte	0xb0
 	.uleb128 0xe
-	.4byte	.LASF292
+	.4byte	.LASF294
+	.byte	0x15
+	.byte	0x83
+	.4byte	0xfc
+	.byte	0xd0
+	.uleb128 0xe
+	.4byte	.LASF295
+	.byte	0x15
+	.byte	0x84
+	.4byte	0xfc
+	.byte	0xd4
+	.uleb128 0xe
+	.4byte	.LASF296
 	.byte	0x15
 	.byte	0x8a
 	.4byte	0xb5
-	.byte	0xd0
+	.byte	0xd8
 	.uleb128 0xe
-	.4byte	.LASF293
+	.4byte	.LASF297
 	.byte	0x15
 	.byte	0x8f
-	.4byte	0xc27
-	.byte	0xd4
+	.4byte	0xc33
+	.byte	0xdc
 	.uleb128 0xe
-	.4byte	.LASF294
+	.4byte	.LASF298
 	.byte	0x15
 	.byte	0x90
 	.4byte	0xfc
-	.byte	0xe4
+	.byte	0xec
 	.uleb128 0xe
-	.4byte	.LASF295
+	.4byte	.LASF299
 	.byte	0x15
 	.byte	0x91
 	.4byte	0x50
-	.byte	0xe8
+	.byte	0xf0
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0xc63
+	.4byte	0xc6f
 	.uleb128 0xd
-	.4byte	.LASF296
+	.4byte	.LASF300
 	.byte	0x20
 	.byte	0x16
 	.byte	0x2c
-	.4byte	0xec1
+	.4byte	0xee5
 	.uleb128 0xe
 	.4byte	.LASF28
 	.byte	0x16
@@ -2503,109 +2530,109 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0xd2
 	.byte	0x4
 	.uleb128 0xe
-	.4byte	.LASF297
+	.4byte	.LASF301
 	.byte	0x16
 	.byte	0x2f
-	.4byte	0x1304
+	.4byte	0x1220
 	.byte	0x8
 	.uleb128 0xe
-	.4byte	.LASF298
+	.4byte	.LASF302
 	.byte	0x16
 	.byte	0x30
 	.4byte	0xd2
 	.byte	0xc
 	.uleb128 0xe
-	.4byte	.LASF299
+	.4byte	.LASF303
 	.byte	0x16
 	.byte	0x32
-	.4byte	0x134c
+	.4byte	0x1268
 	.byte	0x10
 	.uleb128 0xe
 	.4byte	.LASF34
 	.byte	0x16
 	.byte	0x33
-	.4byte	0xec6
+	.4byte	0xeea
 	.byte	0x14
 	.uleb128 0xe
-	.4byte	.LASF300
+	.4byte	.LASF304
 	.byte	0x16
 	.byte	0x34
-	.4byte	0xec6
+	.4byte	0xeea
 	.byte	0x18
 	.uleb128 0xe
-	.4byte	.LASF301
+	.4byte	.LASF305
 	.byte	0x16
 	.byte	0x35
-	.4byte	0xec6
+	.4byte	0xeea
 	.byte	0x1c
 	.byte	0
 	.uleb128 0x7
-	.4byte	0xe54
+	.4byte	0xe78
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0xe54
+	.4byte	0xe78
 	.uleb128 0x18
-	.4byte	.LASF303
+	.4byte	.LASF307
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0xecc
+	.4byte	0xef0
 	.uleb128 0xa
 	.4byte	0xd8
-	.4byte	0xee7
+	.4byte	0xf0b
 	.uleb128 0x11
 	.4byte	0xcb
 	.byte	0x1f
 	.byte	0
 	.uleb128 0x2
-	.4byte	.LASF304
+	.4byte	.LASF308
 	.byte	0x15
-	.byte	0x97
-	.4byte	0xc63
+	.byte	0x9a
+	.4byte	0xc6f
 	.uleb128 0x25
-	.4byte	0xee7
+	.4byte	0xf0b
 	.uleb128 0x4
-	.4byte	.LASF305
+	.4byte	.LASF309
 	.byte	0x2
 	.byte	0xad
 	.4byte	0xfc
 	.uleb128 0xa
 	.4byte	0x90
-	.4byte	0xf0d
+	.4byte	0xf31
 	.uleb128 0xb
 	.byte	0
 	.uleb128 0x4
-	.4byte	.LASF306
+	.4byte	.LASF310
 	.byte	0x2
 	.byte	0xaf
-	.4byte	0xf02
+	.4byte	0xf26
 	.uleb128 0x4
-	.4byte	.LASF307
+	.4byte	.LASF311
 	.byte	0x2
 	.byte	0xb0
-	.4byte	0xf02
+	.4byte	0xf26
 	.uleb128 0x4
-	.4byte	.LASF308
+	.4byte	.LASF312
 	.byte	0x2
 	.byte	0xfe
 	.4byte	0xfc
 	.uleb128 0x4
-	.4byte	.LASF309
+	.4byte	.LASF313
 	.byte	0x2
 	.byte	0xff
 	.4byte	0xfc
 	.uleb128 0xc
-	.4byte	.LASF310
+	.4byte	.LASF314
 	.byte	0x2
 	.2byte	0x100
 	.4byte	0xfc
 	.uleb128 0xd
-	.4byte	.LASF311
+	.4byte	.LASF315
 	.byte	0x4
 	.byte	0x17
 	.byte	0x2e
-	.4byte	0xf5e
+	.4byte	0xf82
 	.uleb128 0xe
-	.4byte	.LASF312
+	.4byte	.LASF316
 	.byte	0x17
 	.byte	0x2f
 	.4byte	0x11d
@@ -2614,318 +2641,192 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0x25
-	.uleb128 0xd
-	.4byte	.LASF313
-	.byte	0x40
-	.byte	0x17
-	.byte	0xa6
-	.4byte	0x1001
-	.uleb128 0xe
-	.4byte	.LASF28
-	.byte	0x17
-	.byte	0xa8
-	.4byte	0x1001
-	.byte	0
-	.uleb128 0xe
-	.4byte	.LASF314
-	.byte	0x17
-	.byte	0xa9
-	.4byte	0x273
-	.byte	0x10
-	.uleb128 0xe
-	.4byte	.LASF315
-	.byte	0x17
-	.byte	0xaa
-	.4byte	0xb5
-	.byte	0x18
-	.uleb128 0xe
-	.4byte	.LASF155
-	.byte	0x17
-	.byte	0xab
-	.4byte	0x50
-	.byte	0x1c
-	.uleb128 0xe
-	.4byte	.LASF316
-	.byte	0x17
-	.byte	0xad
-	.4byte	0x102b
-	.byte	0x20
-	.uleb128 0xe
-	.4byte	.LASF317
-	.byte	0x17
-	.byte	0xae
-	.4byte	0x104a
-	.byte	0x24
-	.uleb128 0xe
-	.4byte	.LASF318
-	.byte	0x17
-	.byte	0xaf
-	.4byte	0x105f
-	.byte	0x28
-	.uleb128 0xe
-	.4byte	.LASF319
-	.byte	0x17
-	.byte	0xb0
-	.4byte	0x1070
-	.byte	0x2c
-	.uleb128 0xe
-	.4byte	.LASF320
-	.byte	0x17
-	.byte	0xb4
-	.4byte	0x105f
-	.byte	0x30
-	.uleb128 0xe
-	.4byte	.LASF47
-	.byte	0x17
-	.byte	0xb5
-	.4byte	0x1025
-	.byte	0x34
-	.uleb128 0xe
-	.4byte	.LASF321
-	.byte	0x17
-	.byte	0xb6
-	.4byte	0x50
-	.byte	0x38
-	.uleb128 0xe
-	.4byte	.LASF35
-	.byte	0x17
-	.byte	0xb7
-	.4byte	0x128
-	.byte	0x3c
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xd8
-	.4byte	0x1011
-	.uleb128 0x11
-	.4byte	0xcb
-	.byte	0xf
-	.byte	0
-	.uleb128 0x12
-	.4byte	0x50
-	.4byte	0x1025
-	.uleb128 0x13
-	.4byte	0x1025
-	.uleb128 0x13
-	.4byte	0x962
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0xf64
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x1011
-	.uleb128 0x12
-	.4byte	0x50
-	.4byte	0x104a
-	.uleb128 0x13
-	.4byte	0x1025
-	.uleb128 0x13
-	.4byte	0x128
-	.uleb128 0x13
-	.4byte	0x50
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x1031
-	.uleb128 0x12
-	.4byte	0x50
-	.4byte	0x105f
-	.uleb128 0x13
-	.4byte	0x1025
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x1050
-	.uleb128 0x26
-	.4byte	0x1070
-	.uleb128 0x13
-	.4byte	0x1025
+	.uleb128 0x12
+	.4byte	0x50
+	.4byte	0xf97
+	.uleb128 0x13
+	.4byte	0x250
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x1065
-	.uleb128 0x4
-	.4byte	.LASF322
-	.byte	0x17
-	.byte	0xbd
-	.4byte	0x1025
+	.4byte	0xf88
 	.uleb128 0xa
 	.4byte	0x90
-	.4byte	0x1091
+	.4byte	0xfad
 	.uleb128 0x11
 	.4byte	0xcb
 	.byte	0x5
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF323
+	.4byte	.LASF317
 	.byte	0x17
 	.2byte	0x1fd
-	.4byte	0xf45
+	.4byte	0xf69
 	.uleb128 0xc
-	.4byte	.LASF324
+	.4byte	.LASF318
 	.byte	0x17
 	.2byte	0x1fe
-	.4byte	0xf45
+	.4byte	0xf69
 	.uleb128 0xc
-	.4byte	.LASF325
+	.4byte	.LASF319
 	.byte	0x17
 	.2byte	0x200
-	.4byte	0xf45
+	.4byte	0xf69
 	.uleb128 0xc
-	.4byte	.LASF326
+	.4byte	.LASF320
 	.byte	0x17
 	.2byte	0x205
-	.4byte	0xed7
+	.4byte	0xefb
 	.uleb128 0xc
-	.4byte	.LASF327
+	.4byte	.LASF321
 	.byte	0x17
 	.2byte	0x206
-	.4byte	0xed7
+	.4byte	0xefb
 	.uleb128 0xa
 	.4byte	0xd8
-	.4byte	0x10dd
+	.4byte	0xff9
 	.uleb128 0x11
 	.4byte	0xcb
 	.byte	0x3f
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF328
+	.4byte	.LASF322
 	.byte	0x17
 	.2byte	0x207
-	.4byte	0x10cd
+	.4byte	0xfe9
 	.uleb128 0xc
-	.4byte	.LASF329
+	.4byte	.LASF323
 	.byte	0x17
 	.2byte	0x209
-	.4byte	0x1081
+	.4byte	0xf9d
 	.uleb128 0xc
-	.4byte	.LASF330
+	.4byte	.LASF324
 	.byte	0x17
 	.2byte	0x20a
-	.4byte	0x1081
+	.4byte	0xf9d
 	.uleb128 0xc
-	.4byte	.LASF331
+	.4byte	.LASF325
 	.byte	0x17
 	.2byte	0x20b
-	.4byte	0xf45
+	.4byte	0xf69
 	.uleb128 0xc
-	.4byte	.LASF332
+	.4byte	.LASF326
 	.byte	0x17
 	.2byte	0x20c
-	.4byte	0xf45
+	.4byte	0xf69
 	.uleb128 0xc
-	.4byte	.LASF333
+	.4byte	.LASF327
 	.byte	0x17
 	.2byte	0x20d
-	.4byte	0xf5e
+	.4byte	0xf82
 	.uleb128 0xa
-	.4byte	0xf5e
-	.4byte	0x1135
+	.4byte	0xf82
+	.4byte	0x1051
 	.uleb128 0x11
 	.4byte	0xcb
 	.byte	0x3
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF334
+	.4byte	.LASF328
 	.byte	0x17
 	.2byte	0x20e
-	.4byte	0x1125
+	.4byte	0x1041
 	.uleb128 0xc
-	.4byte	.LASF335
+	.4byte	.LASF329
 	.byte	0x17
 	.2byte	0x20f
-	.4byte	0xf5e
+	.4byte	0xf82
 	.uleb128 0xc
-	.4byte	.LASF336
+	.4byte	.LASF330
 	.byte	0x17
 	.2byte	0x210
 	.4byte	0x50
 	.uleb128 0xa
 	.4byte	0x9a
-	.4byte	0x1169
+	.4byte	0x1085
 	.uleb128 0x11
 	.4byte	0xcb
 	.byte	0x5
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x1159
+	.4byte	0x1075
 	.uleb128 0xc
-	.4byte	.LASF337
+	.4byte	.LASF331
 	.byte	0x17
 	.2byte	0x211
-	.4byte	0x1169
+	.4byte	0x1085
 	.uleb128 0xc
-	.4byte	.LASF338
+	.4byte	.LASF332
 	.byte	0x17
 	.2byte	0x212
-	.4byte	0x1169
+	.4byte	0x1085
 	.uleb128 0xc
-	.4byte	.LASF339
+	.4byte	.LASF333
 	.byte	0x17
 	.2byte	0x216
 	.4byte	0xf1
 	.uleb128 0xc
-	.4byte	.LASF340
+	.4byte	.LASF334
 	.byte	0x17
 	.2byte	0x217
 	.4byte	0xf1
 	.uleb128 0xc
-	.4byte	.LASF341
+	.4byte	.LASF335
 	.byte	0x17
 	.2byte	0x219
 	.4byte	0x50
 	.uleb128 0xa
 	.4byte	0xd8
-	.4byte	0x11bb
+	.4byte	0x10d7
 	.uleb128 0x17
 	.4byte	0xcb
 	.2byte	0x3ff
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF342
+	.4byte	.LASF336
 	.byte	0x17
 	.2byte	0x220
-	.4byte	0x11aa
+	.4byte	0x10c6
 	.uleb128 0xc
-	.4byte	.LASF343
+	.4byte	.LASF337
 	.byte	0x17
 	.2byte	0x222
 	.4byte	0x9f
 	.uleb128 0xc
-	.4byte	.LASF344
+	.4byte	.LASF338
 	.byte	0x17
 	.2byte	0x224
 	.4byte	0x9f
 	.uleb128 0xc
-	.4byte	.LASF345
+	.4byte	.LASF339
 	.byte	0x17
 	.2byte	0x230
-	.4byte	0xf45
-	.uleb128 0x27
-	.4byte	.LASF347
+	.4byte	0xf69
+	.uleb128 0x26
+	.4byte	.LASF341
 	.byte	0x4
 	.4byte	0x7b
 	.byte	0x17
 	.2byte	0x286
-	.4byte	0x1215
+	.4byte	0x1131
 	.uleb128 0x22
-	.4byte	.LASF348
+	.4byte	.LASF342
 	.byte	0
 	.uleb128 0x22
-	.4byte	.LASF349
+	.4byte	.LASF343
 	.byte	0x1
 	.uleb128 0x22
-	.4byte	.LASF350
+	.4byte	.LASF344
 	.byte	0x2
 	.uleb128 0x22
-	.4byte	.LASF351
+	.4byte	.LASF345
 	.byte	0x3
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF352
+	.4byte	.LASF346
 	.byte	0x17
 	.2byte	0x28c
-	.4byte	0x11eb
+	.4byte	0x1107
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0x9f
@@ -2934,7 +2835,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x44
 	.byte	0x8
 	.byte	0xee
-	.4byte	0x12ff
+	.4byte	0x121b
 	.uleb128 0xe
 	.4byte	.LASF28
 	.byte	0x8
@@ -2948,79 +2849,79 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x980
 	.byte	0x4
 	.uleb128 0xe
-	.4byte	.LASF353
+	.4byte	.LASF347
 	.byte	0x8
 	.byte	0xf1
-	.4byte	0x1456
+	.4byte	0x1372
 	.byte	0x8
 	.uleb128 0xe
-	.4byte	.LASF354
+	.4byte	.LASF348
 	.byte	0x8
 	.byte	0xf2
-	.4byte	0x146b
+	.4byte	0xf97
 	.byte	0xc
 	.uleb128 0xe
-	.4byte	.LASF355
+	.4byte	.LASF349
 	.byte	0x8
 	.byte	0xf3
-	.4byte	0x146b
+	.4byte	0xf97
 	.byte	0x10
 	.uleb128 0xe
-	.4byte	.LASF356
+	.4byte	.LASF350
 	.byte	0x8
 	.byte	0xf4
-	.4byte	0x146b
+	.4byte	0xf97
 	.byte	0x14
 	.uleb128 0xe
-	.4byte	.LASF357
+	.4byte	.LASF351
 	.byte	0x8
 	.byte	0xf5
-	.4byte	0x146b
+	.4byte	0xf97
 	.byte	0x18
 	.uleb128 0xe
-	.4byte	.LASF358
+	.4byte	.LASF352
 	.byte	0x8
 	.byte	0xf6
-	.4byte	0x146b
+	.4byte	0xf97
 	.byte	0x1c
 	.uleb128 0xe
-	.4byte	.LASF359
+	.4byte	.LASF353
 	.byte	0x8
 	.byte	0xf7
-	.4byte	0x146b
+	.4byte	0xf97
 	.byte	0x20
 	.uleb128 0xe
-	.4byte	.LASF360
+	.4byte	.LASF354
 	.byte	0x8
 	.byte	0xf8
-	.4byte	0x146b
+	.4byte	0xf97
 	.byte	0x24
 	.uleb128 0xe
-	.4byte	.LASF361
+	.4byte	.LASF355
 	.byte	0x8
 	.byte	0xf9
-	.4byte	0x146b
+	.4byte	0xf97
 	.byte	0x28
 	.uleb128 0xe
-	.4byte	.LASF362
+	.4byte	.LASF356
 	.byte	0x8
 	.byte	0xfa
 	.4byte	0x50
 	.byte	0x2c
 	.uleb128 0xe
-	.4byte	.LASF363
+	.4byte	.LASF357
 	.byte	0x8
 	.byte	0xfb
 	.4byte	0x50
 	.byte	0x30
 	.uleb128 0xe
-	.4byte	.LASF364
+	.4byte	.LASF358
 	.byte	0x8
 	.byte	0xfc
 	.4byte	0x50
 	.byte	0x34
 	.uleb128 0xe
-	.4byte	.LASF365
+	.4byte	.LASF359
 	.byte	0x8
 	.byte	0xfd
 	.4byte	0x50
@@ -3039,18 +2940,18 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x1227
+	.4byte	0x1143
 	.uleb128 0x2
-	.4byte	.LASF297
+	.4byte	.LASF301
 	.byte	0x16
 	.byte	0xf
 	.4byte	0x9f
 	.uleb128 0xd
-	.4byte	.LASF366
+	.4byte	.LASF360
 	.byte	0x10
 	.byte	0x16
 	.byte	0x19
-	.4byte	0x134c
+	.4byte	0x1268
 	.uleb128 0xe
 	.4byte	.LASF28
 	.byte	0x16
@@ -3058,13 +2959,13 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0xeb
 	.byte	0
 	.uleb128 0xe
-	.4byte	.LASF367
+	.4byte	.LASF361
 	.byte	0x16
 	.byte	0x1b
 	.4byte	0x50
 	.byte	0x4
 	.uleb128 0xe
-	.4byte	.LASF368
+	.4byte	.LASF362
 	.byte	0x16
 	.byte	0x1c
 	.4byte	0x128
@@ -3073,66 +2974,66 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LASF47
 	.byte	0x16
 	.byte	0x1d
-	.4byte	0x134c
+	.4byte	0x1268
 	.byte	0xc
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x130f
-	.uleb128 0x28
+	.4byte	0x122b
+	.uleb128 0x27
 	.ascii	"gd\000"
 	.byte	0x16
 	.byte	0x57
-	.4byte	0x135c
+	.4byte	0x1278
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0xef2
-	.uleb128 0x29
-	.4byte	.LASF428
+	.4byte	0xf16
+	.uleb128 0x28
+	.4byte	.LASF423
 	.byte	0x4
 	.byte	0x19
 	.byte	0x33
-	.4byte	0x1384
-	.uleb128 0x2a
+	.4byte	0x12a0
+	.uleb128 0x29
 	.ascii	"np\000"
 	.byte	0x19
 	.byte	0x34
-	.4byte	0x1384
-	.uleb128 0x2b
-	.4byte	.LASF369
+	.4byte	0x12a0
+	.uleb128 0x2a
+	.4byte	.LASF363
 	.byte	0x19
 	.byte	0x35
 	.4byte	0xe4
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0xec1
+	.4byte	0xee5
 	.uleb128 0x2
-	.4byte	.LASF370
+	.4byte	.LASF364
 	.byte	0x19
 	.byte	0x36
-	.4byte	0x1362
+	.4byte	0x127e
 	.uleb128 0xc
-	.4byte	.LASF371
+	.4byte	.LASF365
 	.byte	0x1a
 	.2byte	0x3ba
 	.4byte	0xfc
 	.uleb128 0xc
-	.4byte	.LASF372
+	.4byte	.LASF366
 	.byte	0x1a
 	.2byte	0x3bb
 	.4byte	0xfc
 	.uleb128 0xc
-	.4byte	.LASF373
+	.4byte	.LASF367
 	.byte	0x1a
 	.2byte	0x3bc
 	.4byte	0xfc
 	.uleb128 0xd
-	.4byte	.LASF374
+	.4byte	.LASF368
 	.byte	0x4
 	.byte	0x1b
 	.byte	0xd
-	.4byte	0x13d2
+	.4byte	0x12ee
 	.uleb128 0xf
 	.ascii	"pid\000"
 	.byte	0x1b
@@ -3141,22 +3042,22 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.byte	0
 	.uleb128 0x4
-	.4byte	.LASF375
+	.4byte	.LASF369
 	.byte	0x1b
 	.byte	0x11
-	.4byte	0x13dd
+	.4byte	0x12f9
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x13b9
+	.4byte	0x12d5
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x12ff
+	.4byte	0x121b
 	.uleb128 0xd
 	.4byte	.LASF36
 	.byte	0x18
 	.byte	0x1c
 	.byte	0x23
-	.4byte	0x1426
+	.4byte	0x1342
 	.uleb128 0xe
 	.4byte	.LASF35
 	.byte	0x1c
@@ -3164,13 +3065,13 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x128
 	.byte	0
 	.uleb128 0xe
-	.4byte	.LASF376
+	.4byte	.LASF370
 	.byte	0x1c
 	.byte	0x25
-	.4byte	0x1555
+	.4byte	0x145c
 	.byte	0x4
 	.uleb128 0xe
-	.4byte	.LASF377
+	.4byte	.LASF371
 	.byte	0x1c
 	.byte	0x26
 	.4byte	0x283
@@ -3184,46 +3085,37 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x13e9
+	.4byte	0x1305
 	.uleb128 0xd
-	.4byte	.LASF378
+	.4byte	.LASF372
 	.byte	0x8
 	.byte	0x8
 	.byte	0xb5
-	.4byte	0x1451
+	.4byte	0x136d
 	.uleb128 0xe
-	.4byte	.LASF379
+	.4byte	.LASF373
 	.byte	0x8
 	.byte	0xb6
 	.4byte	0xd2
 	.byte	0
 	.uleb128 0xe
-	.4byte	.LASF380
+	.4byte	.LASF374
 	.byte	0x8
 	.byte	0xb7
 	.4byte	0xfc
 	.byte	0x4
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x142c
+	.4byte	0x1348
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x1451
-	.uleb128 0x12
-	.4byte	0x50
-	.4byte	0x146b
-	.uleb128 0x13
-	.4byte	0x250
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x145c
+	.4byte	0x136d
 	.uleb128 0xd
-	.4byte	.LASF381
+	.4byte	.LASF375
 	.byte	0x48
 	.byte	0x1c
 	.byte	0x54
-	.4byte	0x1555
+	.4byte	0x145c
 	.uleb128 0xe
 	.4byte	.LASF28
 	.byte	0x1c
@@ -3237,85 +3129,85 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x980
 	.byte	0x4
 	.uleb128 0xe
-	.4byte	.LASF382
+	.4byte	.LASF376
 	.byte	0x1c
 	.byte	0x57
-	.4byte	0x146b
+	.4byte	0xf97
 	.byte	0x8
 	.uleb128 0xe
-	.4byte	.LASF383
+	.4byte	.LASF377
 	.byte	0x1c
 	.byte	0x58
-	.4byte	0x146b
+	.4byte	0xf97
 	.byte	0xc
 	.uleb128 0xe
-	.4byte	.LASF384
+	.4byte	.LASF378
 	.byte	0x1c
 	.byte	0x59
-	.4byte	0x146b
+	.4byte	0xf97
 	.byte	0x10
 	.uleb128 0xe
-	.4byte	.LASF385
+	.4byte	.LASF379
 	.byte	0x1c
 	.byte	0x5a
-	.4byte	0x146b
+	.4byte	0xf97
 	.byte	0x14
 	.uleb128 0xe
-	.4byte	.LASF386
+	.4byte	.LASF380
 	.byte	0x1c
 	.byte	0x5b
-	.4byte	0x146b
+	.4byte	0xf97
 	.byte	0x18
 	.uleb128 0xe
-	.4byte	.LASF359
+	.4byte	.LASF353
 	.byte	0x1c
 	.byte	0x5c
-	.4byte	0x146b
+	.4byte	0xf97
 	.byte	0x1c
 	.uleb128 0xe
-	.4byte	.LASF360
+	.4byte	.LASF354
 	.byte	0x1c
 	.byte	0x5d
-	.4byte	0x146b
+	.4byte	0xf97
 	.byte	0x20
 	.uleb128 0xe
-	.4byte	.LASF316
+	.4byte	.LASF381
 	.byte	0x1c
 	.byte	0x5e
-	.4byte	0x156a
+	.4byte	0x1471
 	.byte	0x24
 	.uleb128 0xe
-	.4byte	.LASF387
+	.4byte	.LASF382
 	.byte	0x1c
 	.byte	0x5f
-	.4byte	0x156a
+	.4byte	0x1471
 	.byte	0x28
 	.uleb128 0xe
-	.4byte	.LASF362
+	.4byte	.LASF356
 	.byte	0x1c
 	.byte	0x60
 	.4byte	0x50
 	.byte	0x2c
 	.uleb128 0xe
-	.4byte	.LASF388
+	.4byte	.LASF383
 	.byte	0x1c
 	.byte	0x61
 	.4byte	0x50
 	.byte	0x30
 	.uleb128 0xe
-	.4byte	.LASF389
+	.4byte	.LASF384
 	.byte	0x1c
 	.byte	0x62
 	.4byte	0x50
 	.byte	0x34
 	.uleb128 0xe
-	.4byte	.LASF364
+	.4byte	.LASF358
 	.byte	0x1c
 	.byte	0x63
 	.4byte	0x50
 	.byte	0x38
 	.uleb128 0xe
-	.4byte	.LASF365
+	.4byte	.LASF359
 	.byte	0x1c
 	.byte	0x64
 	.4byte	0x50
@@ -3335,80 +3227,80 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x1471
+	.4byte	0x1378
 	.uleb128 0x12
 	.4byte	0x50
-	.4byte	0x156a
+	.4byte	0x1471
 	.uleb128 0x13
-	.4byte	0x1426
+	.4byte	0x1342
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x155b
+	.4byte	0x1462
 	.uleb128 0x4
-	.4byte	.LASF390
+	.4byte	.LASF385
 	.byte	0x1d
 	.byte	0x49
 	.4byte	0x7b
 	.uleb128 0x21
-	.4byte	.LASF391
+	.4byte	.LASF386
 	.byte	0x4
 	.4byte	0x7b
 	.byte	0x1e
 	.byte	0x14
-	.4byte	0x15aa
+	.4byte	0x14b1
 	.uleb128 0x22
-	.4byte	.LASF392
+	.4byte	.LASF387
 	.byte	0x1
 	.uleb128 0x22
-	.4byte	.LASF393
+	.4byte	.LASF388
 	.byte	0x2
 	.uleb128 0x22
-	.4byte	.LASF394
+	.4byte	.LASF389
 	.byte	0x4
 	.uleb128 0x22
-	.4byte	.LASF395
+	.4byte	.LASF390
 	.byte	0x8
 	.uleb128 0x22
-	.4byte	.LASF396
+	.4byte	.LASF391
 	.byte	0x10
 	.byte	0
 	.uleb128 0xd
-	.4byte	.LASF397
+	.4byte	.LASF392
 	.byte	0x10
 	.byte	0x1e
 	.byte	0x60
-	.4byte	0x15e7
+	.4byte	0x14ee
 	.uleb128 0xe
-	.4byte	.LASF398
+	.4byte	.LASF393
 	.byte	0x1e
 	.byte	0x6a
-	.4byte	0x160a
+	.4byte	0x1511
 	.byte	0
 	.uleb128 0xe
-	.4byte	.LASF399
+	.4byte	.LASF394
 	.byte	0x1e
 	.byte	0x74
-	.4byte	0x162e
+	.4byte	0x1535
 	.byte	0x4
 	.uleb128 0xe
-	.4byte	.LASF400
+	.4byte	.LASF395
 	.byte	0x1e
 	.byte	0x7e
-	.4byte	0x164d
+	.4byte	0x1554
 	.byte	0x8
 	.uleb128 0xe
-	.4byte	.LASF401
+	.4byte	.LASF396
 	.byte	0x1e
 	.byte	0x8b
-	.4byte	0x167b
+	.4byte	0x1582
 	.byte	0xc
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x15aa
+	.4byte	0x14b1
 	.uleb128 0x12
 	.4byte	0x50
-	.4byte	0x160a
+	.4byte	0x1511
 	.uleb128 0x13
 	.4byte	0x250
 	.uleb128 0x13
@@ -3420,10 +3312,10 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x15ec
+	.4byte	0x14f3
 	.uleb128 0x12
 	.4byte	0x50
-	.4byte	0x162e
+	.4byte	0x1535
 	.uleb128 0x13
 	.4byte	0x250
 	.uleb128 0x13
@@ -3435,10 +3327,10 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x1610
+	.4byte	0x1517
 	.uleb128 0x12
 	.4byte	0x50
-	.4byte	0x164d
+	.4byte	0x1554
 	.uleb128 0x13
 	.4byte	0x250
 	.uleb128 0x13
@@ -3448,10 +3340,10 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x1634
+	.4byte	0x153b
 	.uleb128 0x12
 	.4byte	0x50
-	.4byte	0x167b
+	.4byte	0x1582
 	.uleb128 0x13
 	.4byte	0x250
 	.uleb128 0x13
@@ -3467,13 +3359,13 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x1653
+	.4byte	0x155a
 	.uleb128 0xd
-	.4byte	.LASF402
+	.4byte	.LASF397
 	.byte	0x8
 	.byte	0x1f
 	.byte	0x36
-	.4byte	0x16a6
+	.4byte	0x15ad
 	.uleb128 0xe
 	.4byte	.LASF60
 	.byte	0x1f
@@ -3481,105 +3373,105 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x128
 	.byte	0
 	.uleb128 0xe
-	.4byte	.LASF403
+	.4byte	.LASF398
 	.byte	0x1f
 	.byte	0x38
 	.4byte	0x37
 	.byte	0x4
 	.byte	0
-	.uleb128 0x2c
-	.4byte	.LASF404
+	.uleb128 0x2b
+	.4byte	.LASF399
 	.byte	0x1
-	.byte	0xb4
-	.4byte	0x15e7
+	.byte	0xbb
+	.4byte	0x14ee
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	rockchip_secure_otp_ops
 	.uleb128 0xa
-	.4byte	0x1451
-	.4byte	0x16c7
+	.4byte	0x136d
+	.4byte	0x15ce
 	.uleb128 0x11
 	.4byte	0xcb
 	.byte	0x1
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x16b7
-	.uleb128 0x2c
-	.4byte	.LASF405
+	.4byte	0x15be
+	.uleb128 0x2b
+	.4byte	.LASF400
 	.byte	0x1
-	.byte	0xc5
-	.4byte	0x16c7
+	.byte	0xcc
+	.4byte	0x15ce
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	rockchip_otp_ids
-	.uleb128 0x2d
-	.4byte	.LASF406
+	.uleb128 0x2c
+	.4byte	.LASF401
 	.byte	0x1
-	.byte	0xcc
-	.4byte	0x1227
+	.byte	0xd3
+	.4byte	0x1143
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	_u_boot_list_2_driver_2_rockchip_secure_otp_v2
-	.uleb128 0x2e
-	.4byte	.LASF407
+	.uleb128 0x2d
+	.4byte	.LASF402
 	.byte	0x1
-	.byte	0xba
+	.byte	0xc1
 	.4byte	0x50
-	.4byte	.LFB273
-	.4byte	.LFE273-.LFB273
+	.4byte	.LFB269
+	.4byte	.LFE269-.LFB269
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x176c
-	.uleb128 0x2f
+	.4byte	0x1673
+	.uleb128 0x2e
 	.ascii	"dev\000"
 	.byte	0x1
-	.byte	0xba
+	.byte	0xc1
 	.4byte	0x250
 	.4byte	.LLST18
-	.uleb128 0x30
+	.uleb128 0x2f
 	.ascii	"otp\000"
 	.byte	0x1
-	.byte	0xbc
-	.4byte	0x176c
+	.byte	0xc3
+	.4byte	0x1673
 	.4byte	.LLST19
-	.uleb128 0x31
+	.uleb128 0x30
 	.4byte	.LVL31
-	.4byte	0x1ca7
-	.4byte	0x1739
-	.uleb128 0x32
+	.4byte	0x1bae
+	.4byte	0x1640
+	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
 	.byte	0
-	.uleb128 0x31
+	.uleb128 0x30
 	.4byte	.LVL34
-	.4byte	0x1cb3
-	.4byte	0x174d
-	.uleb128 0x32
+	.4byte	0x1bba
+	.4byte	0x1654
+	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
 	.byte	0
-	.uleb128 0x33
-	.4byte	.LVL35
-	.4byte	0x1cbe
 	.uleb128 0x32
+	.4byte	.LVL35
+	.4byte	0x1bc5
+	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x32
+	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	.LC1
-	.uleb128 0x32
+	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x1
@@ -3588,250 +3480,250 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x1681
-	.uleb128 0x2e
-	.4byte	.LASF408
+	.4byte	0x1588
+	.uleb128 0x2d
+	.4byte	.LASF403
 	.byte	0x1
-	.byte	0xa3
+	.byte	0xaa
 	.4byte	0x50
-	.4byte	.LFB272
-	.4byte	.LFE272-.LFB272
+	.4byte	.LFB268
+	.4byte	.LFE268-.LFB268
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x17dd
-	.uleb128 0x2f
+	.4byte	0x16e4
+	.uleb128 0x2e
 	.ascii	"dev\000"
 	.byte	0x1
-	.byte	0xa3
+	.byte	0xaa
 	.4byte	0x250
 	.4byte	.LLST0
-	.uleb128 0x34
-	.4byte	.LASF409
+	.uleb128 0x33
+	.4byte	.LASF404
 	.byte	0x1
-	.byte	0xa3
+	.byte	0xaa
 	.4byte	0x37
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x35
+	.uleb128 0x34
 	.ascii	"buf\000"
 	.byte	0x1
-	.byte	0xa4
+	.byte	0xab
 	.4byte	0x128
 	.uleb128 0x1
 	.byte	0x52
-	.uleb128 0x30
+	.uleb128 0x2f
 	.ascii	"ret\000"
 	.byte	0x1
-	.byte	0xa6
+	.byte	0xad
 	.4byte	0x50
 	.4byte	.LLST1
-	.uleb128 0x36
-	.4byte	0x17dd
+	.uleb128 0x35
+	.4byte	0x16e4
 	.4byte	.LBB18
 	.4byte	.Ldebug_ranges0+0
 	.byte	0x1
-	.byte	0xab
-	.uleb128 0x37
-	.4byte	0x17ed
+	.byte	0xb2
+	.uleb128 0x36
+	.4byte	0x16f4
 	.4byte	.LLST2
 	.byte	0
 	.byte	0
-	.uleb128 0x38
-	.4byte	.LASF413
+	.uleb128 0x37
+	.4byte	.LASF408
 	.byte	0x1
-	.byte	0x9c
+	.byte	0xa3
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x17f9
-	.uleb128 0x39
+	.4byte	0x1700
+	.uleb128 0x38
 	.ascii	"buf\000"
 	.byte	0x1
-	.byte	0x9c
-	.4byte	0x1221
+	.byte	0xa3
+	.4byte	0x113d
 	.byte	0
-	.uleb128 0x2e
-	.4byte	.LASF410
+	.uleb128 0x2d
+	.4byte	.LASF405
 	.byte	0x1
 	.byte	0x70
 	.4byte	0x50
-	.4byte	.LFB270
-	.4byte	.LFE270-.LFB270
+	.4byte	.LFB266
+	.4byte	.LFE266-.LFB266
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1a38
-	.uleb128 0x2f
+	.4byte	0x193f
+	.uleb128 0x2e
 	.ascii	"dev\000"
 	.byte	0x1
 	.byte	0x70
 	.4byte	0x250
 	.4byte	.LLST20
-	.uleb128 0x3a
-	.4byte	.LASF411
+	.uleb128 0x39
+	.4byte	.LASF406
 	.byte	0x1
 	.byte	0x70
 	.4byte	0x50
 	.4byte	.LLST21
-	.uleb128 0x2f
+	.uleb128 0x2e
 	.ascii	"buf\000"
 	.byte	0x1
 	.byte	0x71
 	.4byte	0x256
 	.4byte	.LLST22
-	.uleb128 0x3a
+	.uleb128 0x39
 	.4byte	.LASF51
 	.byte	0x1
 	.byte	0x71
 	.4byte	0x50
 	.4byte	.LLST23
-	.uleb128 0x30
+	.uleb128 0x2f
 	.ascii	"otp\000"
 	.byte	0x1
 	.byte	0x73
-	.4byte	0x176c
+	.4byte	0x1673
 	.4byte	.LLST24
-	.uleb128 0x30
+	.uleb128 0x2f
 	.ascii	"i\000"
 	.byte	0x1
 	.byte	0x74
 	.4byte	0x50
 	.4byte	.LLST25
-	.uleb128 0x3b
+	.uleb128 0x3a
 	.ascii	"n\000"
 	.byte	0x1
 	.byte	0x74
 	.4byte	0x50
-	.uleb128 0x30
+	.uleb128 0x2f
 	.ascii	"ret\000"
 	.byte	0x1
 	.byte	0x74
 	.4byte	0x50
 	.4byte	.LLST26
-	.uleb128 0x2c
-	.4byte	.LASF380
+	.uleb128 0x2b
+	.4byte	.LASF374
 	.byte	0x1
 	.byte	0x75
 	.4byte	0xeb
 	.uleb128 0x1
 	.byte	0x5a
-	.uleb128 0x3c
-	.4byte	.LASF412
+	.uleb128 0x3b
+	.4byte	.LASF407
 	.byte	0x1
 	.byte	0x76
 	.4byte	0xeb
 	.4byte	.LLST27
-	.uleb128 0x3d
+	.uleb128 0x3c
 	.4byte	.LBB39
 	.4byte	.LBE39-.LBB39
-	.4byte	0x18bb
-	.uleb128 0x30
+	.4byte	0x17c2
+	.uleb128 0x2f
 	.ascii	"__v\000"
 	.byte	0x1
-	.byte	0x8c
+	.byte	0x93
 	.4byte	0x9f
 	.4byte	.LLST28
 	.byte	0
-	.uleb128 0x3d
+	.uleb128 0x3c
 	.4byte	.LBB54
 	.4byte	.LBE54-.LBB54
-	.4byte	0x18d8
-	.uleb128 0x30
+	.4byte	0x17df
+	.uleb128 0x2f
 	.ascii	"__v\000"
 	.byte	0x1
-	.byte	0x91
+	.byte	0x98
 	.4byte	0x9f
 	.4byte	.LLST40
 	.byte	0
-	.uleb128 0x3d
+	.uleb128 0x3c
 	.4byte	.LBB51
 	.4byte	.LBE51-.LBB51
-	.4byte	0x18f5
-	.uleb128 0x30
+	.4byte	0x17fc
+	.uleb128 0x2f
 	.ascii	"__v\000"
 	.byte	0x1
-	.byte	0x97
+	.byte	0x9e
 	.4byte	0x9f
 	.4byte	.LLST39
 	.byte	0
-	.uleb128 0x3e
-	.4byte	0x1a38
+	.uleb128 0x3d
+	.4byte	0x193f
 	.4byte	.LBB40
 	.4byte	.Ldebug_ranges0+0x30
 	.byte	0x1
-	.byte	0x8f
-	.4byte	0x19d6
-	.uleb128 0x3f
-	.4byte	0x1a48
-	.uleb128 0x37
-	.4byte	0x1a69
+	.byte	0x96
+	.4byte	0x18dd
+	.uleb128 0x3e
+	.4byte	0x194f
+	.uleb128 0x36
+	.4byte	0x1970
 	.4byte	.LLST29
-	.uleb128 0x37
-	.4byte	0x1a5e
+	.uleb128 0x36
+	.4byte	0x1965
 	.4byte	.LLST30
-	.uleb128 0x37
-	.4byte	0x1a53
+	.uleb128 0x36
+	.4byte	0x195a
 	.4byte	.LLST31
-	.uleb128 0x40
+	.uleb128 0x3f
 	.4byte	.Ldebug_ranges0+0x30
-	.uleb128 0x41
-	.4byte	0x1a72
+	.uleb128 0x40
+	.4byte	0x1979
 	.4byte	.LLST32
-	.uleb128 0x41
-	.4byte	0x1a7d
+	.uleb128 0x40
+	.4byte	0x1984
 	.4byte	.LLST33
-	.uleb128 0x42
-	.4byte	.Ldebug_ranges0+0x58
-	.4byte	0x1952
 	.uleb128 0x41
-	.4byte	0x1ac0
+	.4byte	.Ldebug_ranges0+0x58
+	.4byte	0x1859
+	.uleb128 0x40
+	.4byte	0x19c7
 	.4byte	.LLST34
 	.byte	0
-	.uleb128 0x3d
+	.uleb128 0x3c
 	.4byte	.LBB43
 	.4byte	.LBE43-.LBB43
-	.4byte	0x1969
-	.uleb128 0x41
-	.4byte	0x1a8d
+	.4byte	0x1870
+	.uleb128 0x40
+	.4byte	0x1994
 	.4byte	.LLST35
 	.byte	0
-	.uleb128 0x3d
+	.uleb128 0x3c
 	.4byte	.LBB44
 	.4byte	.LBE44-.LBB44
-	.4byte	0x1980
-	.uleb128 0x41
-	.4byte	0x1a9e
+	.4byte	0x1887
+	.uleb128 0x40
+	.4byte	0x19a5
 	.4byte	.LLST36
 	.byte	0
-	.uleb128 0x3d
+	.uleb128 0x3c
 	.4byte	.LBB45
 	.4byte	.LBE45-.LBB45
-	.4byte	0x1997
-	.uleb128 0x41
-	.4byte	0x1aaf
+	.4byte	0x189e
+	.uleb128 0x40
+	.4byte	0x19b6
 	.4byte	.LLST37
 	.byte	0
-	.uleb128 0x3d
+	.uleb128 0x3c
 	.4byte	.LBB47
 	.4byte	.LBE47-.LBB47
-	.4byte	0x19ae
-	.uleb128 0x41
-	.4byte	0x1acd
+	.4byte	0x18b5
+	.uleb128 0x40
+	.4byte	0x19d4
 	.4byte	.LLST38
 	.byte	0
+	.uleb128 0x30
+	.4byte	.LVL61
+	.4byte	0x1bd0
+	.4byte	0x18cc
 	.uleb128 0x31
-	.4byte	.LVL60
-	.4byte	0x1cc9
-	.4byte	0x19c5
-	.uleb128 0x32
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	.LC0
 	.byte	0
-	.uleb128 0x33
-	.4byte	.LVL73
-	.4byte	0x1cd4
 	.uleb128 0x32
+	.4byte	.LVL74
+	.4byte	0x1bdb
+	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x1
@@ -3839,61 +3731,61 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x31
+	.uleb128 0x30
 	.4byte	.LVL38
-	.4byte	0x1ca7
-	.4byte	0x19ea
-	.uleb128 0x32
+	.4byte	0x1bae
+	.4byte	0x18f1
+	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x77
+	.byte	0x76
 	.sleb128 0
 	.byte	0
-	.uleb128 0x31
+	.uleb128 0x30
 	.4byte	.LVL41
-	.4byte	0x1cdf
-	.4byte	0x19fe
-	.uleb128 0x32
+	.4byte	0x1be6
+	.4byte	0x1905
+	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x78
 	.sleb128 0
 	.byte	0
-	.uleb128 0x31
+	.uleb128 0x30
 	.4byte	.LVL45
-	.4byte	0x1ada
-	.4byte	0x1a24
-	.uleb128 0x32
+	.4byte	0x19e1
+	.4byte	0x192b
+	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x77
+	.byte	0x76
 	.sleb128 0
-	.uleb128 0x32
+	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x32
+	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
-	.byte	0x76
+	.byte	0x77
 	.sleb128 0
-	.uleb128 0x32
+	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
 	.byte	0x78
 	.sleb128 0
 	.byte	0
-	.uleb128 0x33
-	.4byte	.LVL57
-	.4byte	0x1cc9
 	.uleb128 0x32
+	.4byte	.LVL56
+	.4byte	0x1bd0
+	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
@@ -3901,218 +3793,218 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LC2
 	.byte	0
 	.byte	0
-	.uleb128 0x38
-	.4byte	.LASF414
+	.uleb128 0x37
+	.4byte	.LASF409
 	.byte	0x1
 	.byte	0x47
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x1ada
-	.uleb128 0x39
+	.4byte	0x19e1
+	.uleb128 0x38
 	.ascii	"otp\000"
 	.byte	0x1
 	.byte	0x47
-	.4byte	0x176c
-	.uleb128 0x43
-	.4byte	.LASF411
+	.4byte	0x1673
+	.uleb128 0x42
+	.4byte	.LASF406
 	.byte	0x1
 	.byte	0x48
 	.4byte	0x50
-	.uleb128 0x43
-	.4byte	.LASF380
+	.uleb128 0x42
+	.4byte	.LASF374
 	.byte	0x1
 	.byte	0x48
 	.4byte	0x90
-	.uleb128 0x39
+	.uleb128 0x38
 	.ascii	"i\000"
 	.byte	0x1
 	.byte	0x48
 	.4byte	0x50
-	.uleb128 0x44
-	.4byte	.LASF415
+	.uleb128 0x43
+	.4byte	.LASF410
 	.byte	0x1
 	.byte	0x4a
 	.4byte	0x50
-	.uleb128 0x44
-	.4byte	.LASF416
+	.uleb128 0x43
+	.4byte	.LASF411
 	.byte	0x1
 	.byte	0x4b
 	.4byte	0x9f
-	.uleb128 0x45
-	.4byte	0x1a99
-	.uleb128 0x3b
+	.uleb128 0x44
+	.4byte	0x19a0
+	.uleb128 0x3a
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x5c
 	.4byte	0x9f
 	.byte	0
-	.uleb128 0x45
-	.4byte	0x1aaa
-	.uleb128 0x3b
+	.uleb128 0x44
+	.4byte	0x19b1
+	.uleb128 0x3a
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x5d
 	.4byte	0x9f
 	.byte	0
-	.uleb128 0x45
-	.4byte	0x1abb
-	.uleb128 0x3b
+	.uleb128 0x44
+	.4byte	0x19c2
+	.uleb128 0x3a
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x5e
 	.4byte	0x9f
 	.byte	0
-	.uleb128 0x45
-	.4byte	0x1acc
-	.uleb128 0x3b
+	.uleb128 0x44
+	.4byte	0x19d3
+	.uleb128 0x3a
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x5f
 	.4byte	0x9f
 	.byte	0
-	.uleb128 0x46
-	.uleb128 0x3b
+	.uleb128 0x45
+	.uleb128 0x3a
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x62
 	.4byte	0x9f
 	.byte	0
 	.byte	0
-	.uleb128 0x2e
-	.4byte	.LASF417
+	.uleb128 0x2d
+	.4byte	.LASF412
 	.byte	0x1
 	.byte	0xf
 	.4byte	0x50
-	.4byte	.LFB268
-	.4byte	.LFE268-.LFB268
+	.4byte	.LFB264
+	.4byte	.LFE264-.LFB264
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1c8d
-	.uleb128 0x2f
+	.4byte	0x1b94
+	.uleb128 0x2e
 	.ascii	"dev\000"
 	.byte	0x1
 	.byte	0xf
 	.4byte	0x250
 	.4byte	.LLST3
-	.uleb128 0x3a
-	.4byte	.LASF411
+	.uleb128 0x39
+	.4byte	.LASF406
 	.byte	0x1
 	.byte	0xf
 	.4byte	0x50
 	.4byte	.LLST4
-	.uleb128 0x2f
+	.uleb128 0x2e
 	.ascii	"buf\000"
 	.byte	0x1
 	.byte	0x10
 	.4byte	0x128
 	.4byte	.LLST5
-	.uleb128 0x3a
+	.uleb128 0x39
 	.4byte	.LASF51
 	.byte	0x1
 	.byte	0x10
 	.4byte	0x50
 	.4byte	.LLST6
-	.uleb128 0x30
+	.uleb128 0x2f
 	.ascii	"otp\000"
 	.byte	0x1
 	.byte	0x12
-	.4byte	0x176c
+	.4byte	0x1673
 	.4byte	.LLST7
-	.uleb128 0x30
+	.uleb128 0x2f
 	.ascii	"i\000"
 	.byte	0x1
 	.byte	0x13
 	.4byte	0x50
 	.4byte	.LLST8
-	.uleb128 0x3c
-	.4byte	.LASF415
+	.uleb128 0x3b
+	.4byte	.LASF410
 	.byte	0x1
 	.byte	0x13
 	.4byte	0x50
 	.4byte	.LLST9
-	.uleb128 0x30
+	.uleb128 0x2f
 	.ascii	"n\000"
 	.byte	0x1
 	.byte	0x13
 	.4byte	0x50
 	.4byte	.LLST10
-	.uleb128 0x30
+	.uleb128 0x2f
 	.ascii	"ret\000"
 	.byte	0x1
 	.byte	0x13
 	.4byte	0x50
 	.4byte	.LLST11
-	.uleb128 0x3c
-	.4byte	.LASF380
+	.uleb128 0x3b
+	.4byte	.LASF374
 	.byte	0x1
 	.byte	0x14
 	.4byte	0xeb
 	.4byte	.LLST12
-	.uleb128 0x3c
-	.4byte	.LASF416
+	.uleb128 0x3b
+	.4byte	.LASF411
 	.byte	0x1
 	.byte	0x15
 	.4byte	0x9f
 	.4byte	.LLST13
-	.uleb128 0x3c
-	.4byte	.LASF418
+	.uleb128 0x3b
+	.4byte	.LASF413
 	.byte	0x1
 	.byte	0x16
 	.4byte	0x50
 	.4byte	.LLST14
-	.uleb128 0x47
+	.uleb128 0x46
 	.ascii	"out\000"
 	.byte	0x1
 	.byte	0x40
 	.4byte	.L10
-	.uleb128 0x3d
+	.uleb128 0x3c
 	.4byte	.LBB22
 	.4byte	.LBE22-.LBB22
-	.4byte	0x1bc8
-	.uleb128 0x48
+	.4byte	0x1acf
+	.uleb128 0x47
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x19
 	.4byte	0x9f
 	.byte	0
 	.byte	0
-	.uleb128 0x3d
+	.uleb128 0x3c
 	.4byte	.LBB25
 	.4byte	.LBE25-.LBB25
-	.4byte	0x1be5
-	.uleb128 0x30
+	.4byte	0x1aec
+	.uleb128 0x2f
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x2c
 	.4byte	0x9f
 	.4byte	.LLST16
 	.byte	0
-	.uleb128 0x42
+	.uleb128 0x41
 	.4byte	.Ldebug_ranges0+0x18
-	.4byte	0x1bfb
-	.uleb128 0x48
+	.4byte	0x1b02
+	.uleb128 0x47
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x2d
 	.4byte	0x9f
 	.byte	0x1
 	.byte	0
-	.uleb128 0x3d
+	.uleb128 0x3c
 	.4byte	.LBB27
 	.4byte	.LBE27-.LBB27
-	.4byte	0x1c18
-	.uleb128 0x30
+	.4byte	0x1b1f
+	.uleb128 0x2f
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x30
 	.4byte	0x9f
 	.4byte	.LLST17
 	.byte	0
-	.uleb128 0x3d
+	.uleb128 0x3c
 	.4byte	.LBB28
 	.4byte	.LBE28-.LBB28
-	.4byte	0x1c33
-	.uleb128 0x49
+	.4byte	0x1b3a
+	.uleb128 0x48
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x3d
@@ -4120,22 +4012,22 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x1
 	.byte	0x53
 	.byte	0
-	.uleb128 0x3d
+	.uleb128 0x3c
 	.4byte	.LBB24
 	.4byte	.LBE24-.LBB24
-	.4byte	0x1c50
-	.uleb128 0x30
+	.4byte	0x1b57
+	.uleb128 0x2f
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x42
 	.4byte	0x9f
 	.4byte	.LLST15
 	.byte	0
-	.uleb128 0x31
+	.uleb128 0x30
 	.4byte	.LVL6
-	.4byte	0x1ca7
-	.4byte	0x1c65
-	.uleb128 0x32
+	.4byte	0x1bae
+	.4byte	0x1b6c
+	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x3
@@ -4143,21 +4035,21 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0
-	.uleb128 0x31
+	.uleb128 0x30
 	.4byte	.LVL16
-	.4byte	0x1cc9
-	.4byte	0x1c7c
-	.uleb128 0x32
+	.4byte	0x1bd0
+	.4byte	0x1b83
+	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	.LC0
 	.byte	0
-	.uleb128 0x33
-	.4byte	.LVL24
-	.4byte	0x1cd4
 	.uleb128 0x32
+	.4byte	.LVL24
+	.4byte	0x1bdb
+	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
@@ -4165,46 +4057,46 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x4a
-	.4byte	.LASF429
+	.uleb128 0x49
+	.4byte	.LASF424
 	.byte	0x1a
 	.2byte	0x36f
 	.byte	0x3
-	.4byte	0x1ca7
-	.uleb128 0x4b
+	.4byte	0x1bae
+	.uleb128 0x4a
 	.ascii	"ptr\000"
 	.byte	0x1a
 	.2byte	0x36f
 	.4byte	0x128
 	.byte	0
-	.uleb128 0x4c
-	.4byte	.LASF419
-	.4byte	.LASF419
+	.uleb128 0x4b
+	.4byte	.LASF414
+	.4byte	.LASF414
 	.byte	0x8
 	.2byte	0x112
-	.uleb128 0x4d
-	.4byte	.LASF420
-	.4byte	.LASF420
+	.uleb128 0x4c
+	.4byte	.LASF415
+	.4byte	.LASF415
 	.byte	0x20
 	.byte	0x85
-	.uleb128 0x4d
-	.4byte	.LASF421
-	.4byte	.LASF421
+	.uleb128 0x4c
+	.4byte	.LASF416
+	.4byte	.LASF416
 	.byte	0x20
 	.byte	0x38
-	.uleb128 0x4d
-	.4byte	.LASF422
-	.4byte	.LASF422
+	.uleb128 0x4c
+	.4byte	.LASF417
+	.4byte	.LASF417
 	.byte	0x21
 	.byte	0x13
-	.uleb128 0x4d
-	.4byte	.LASF423
-	.4byte	.LASF423
+	.uleb128 0x4c
+	.4byte	.LASF418
+	.4byte	.LASF418
 	.byte	0x22
 	.byte	0xb
-	.uleb128 0x4c
-	.4byte	.LASF424
-	.4byte	.LASF424
+	.uleb128 0x4b
+	.4byte	.LASF419
+	.4byte	.LASF419
 	.byte	0x1a
 	.2byte	0x393
 	.byte	0
@@ -4662,15 +4554,6 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.byte	0
 	.uleb128 0x26
-	.uleb128 0x15
-	.byte	0x1
-	.uleb128 0x27
-	.uleb128 0x19
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x27
 	.uleb128 0x4
 	.byte	0x1
 	.uleb128 0x3
@@ -4687,7 +4570,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x28
+	.uleb128 0x27
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -4702,7 +4585,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x29
+	.uleb128 0x28
 	.uleb128 0x17
 	.byte	0x1
 	.uleb128 0x3
@@ -4717,7 +4600,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x2a
+	.uleb128 0x29
 	.uleb128 0xd
 	.byte	0
 	.uleb128 0x3
@@ -4730,7 +4613,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x2b
+	.uleb128 0x2a
 	.uleb128 0xd
 	.byte	0
 	.uleb128 0x3
@@ -4743,7 +4626,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x2c
+	.uleb128 0x2b
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -4758,7 +4641,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x2d
+	.uleb128 0x2c
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -4775,7 +4658,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x2e
+	.uleb128 0x2d
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -4800,7 +4683,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x2f
+	.uleb128 0x2e
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -4815,7 +4698,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x30
+	.uleb128 0x2f
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -4830,7 +4713,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x31
+	.uleb128 0x30
 	.uleb128 0x4109
 	.byte	0x1
 	.uleb128 0x11
@@ -4841,7 +4724,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x32
+	.uleb128 0x31
 	.uleb128 0x410a
 	.byte	0
 	.uleb128 0x2
@@ -4850,7 +4733,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x33
+	.uleb128 0x32
 	.uleb128 0x4109
 	.byte	0x1
 	.uleb128 0x11
@@ -4859,7 +4742,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x34
+	.uleb128 0x33
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -4874,7 +4757,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x35
+	.uleb128 0x34
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -4889,7 +4772,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x36
+	.uleb128 0x35
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -4904,7 +4787,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x37
+	.uleb128 0x36
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
@@ -4913,7 +4796,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x38
+	.uleb128 0x37
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -4932,7 +4815,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x38
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -4945,7 +4828,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3a
+	.uleb128 0x39
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -4960,7 +4843,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x3b
+	.uleb128 0x3a
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -4973,7 +4856,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x3b
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -4988,7 +4871,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x3d
+	.uleb128 0x3c
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x11
@@ -4999,7 +4882,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3e
+	.uleb128 0x3d
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -5016,21 +4899,21 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3f
+	.uleb128 0x3e
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x40
+	.uleb128 0x3f
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x55
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x41
+	.uleb128 0x40
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -5039,7 +4922,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x42
+	.uleb128 0x41
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x55
@@ -5048,7 +4931,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x43
+	.uleb128 0x42
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -5061,7 +4944,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x44
+	.uleb128 0x43
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -5074,19 +4957,19 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x45
+	.uleb128 0x44
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x1
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x46
+	.uleb128 0x45
 	.uleb128 0xb
 	.byte	0x1
 	.byte	0
 	.byte	0
-	.uleb128 0x47
+	.uleb128 0x46
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x3
@@ -5099,7 +4982,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x1
 	.byte	0
 	.byte	0
-	.uleb128 0x48
+	.uleb128 0x47
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -5114,7 +4997,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x49
+	.uleb128 0x48
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -5129,7 +5012,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x4a
+	.uleb128 0x49
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -5146,7 +5029,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4b
+	.uleb128 0x4a
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -5159,7 +5042,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4c
+	.uleb128 0x4b
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -5176,7 +5059,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x5
 	.byte	0
 	.byte	0
-	.uleb128 0x4d
+	.uleb128 0x4c
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -5206,7 +5089,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x55
 	.4byte	.LVL36
-	.4byte	.LFE273
+	.4byte	.LFE269
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -5231,7 +5114,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL2
-	.4byte	.LFE272
+	.4byte	.LFE268
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -5247,7 +5130,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0xea
 	.byte	0x9f
 	.4byte	.LVL4
-	.4byte	.LFE272
+	.4byte	.LFE268
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xea
@@ -5269,7 +5152,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LVL38-1
 	.4byte	.LVL42
 	.2byte	0x1
-	.byte	0x57
+	.byte	0x56
 	.4byte	.LVL42
 	.4byte	.LVL43
 	.2byte	0x4
@@ -5280,9 +5163,9 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LVL43
 	.4byte	.LVL46
 	.2byte	0x1
-	.byte	0x57
+	.byte	0x56
 	.4byte	.LVL46
-	.4byte	.LFE270
+	.4byte	.LFE266
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -5296,7 +5179,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x51
 	.4byte	.LVL38-1
-	.4byte	.LFE270
+	.4byte	.LFE266
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
@@ -5307,7 +5190,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x52
 	.4byte	.LVL38-1
-	.4byte	.LFE270
+	.4byte	.LFE266
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
@@ -5318,7 +5201,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x53
 	.4byte	.LVL38-1
-	.4byte	.LFE270
+	.4byte	.LFE266
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
@@ -5329,7 +5212,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL40
-	.4byte	.LFE270
+	.4byte	.LFE266
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
@@ -5337,40 +5220,24 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 .LLST25:
 	.4byte	.LVL47
 	.4byte	.LVL48
-	.2byte	0x6
-	.byte	0x73
-	.sleb128 0
-	.byte	0x76
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
+	.2byte	0x1
+	.byte	0x53
 	.4byte	.LVL52
 	.4byte	.LVL54
 	.2byte	0x1
-	.byte	0x56
+	.byte	0x57
 	.4byte	.LVL54
-	.4byte	.LVL55
-	.2byte	0x6
-	.byte	0x73
-	.sleb128 0
-	.byte	0x76
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL55
-	.4byte	.LVL57-1
-	.2byte	0x7
-	.byte	0x76
-	.sleb128 0
-	.byte	0x20
-	.byte	0x73
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.4byte	.LVL58
-	.4byte	.LFE270
+	.4byte	.LVL56-1
 	.2byte	0x1
-	.byte	0x56
+	.byte	0x53
+	.4byte	.LVL57
+	.4byte	.LVL59
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL59
+	.4byte	.LFE266
+	.2byte	0x1
+	.byte	0x57
 	.4byte	0
 	.4byte	0
 .LLST26:
@@ -5381,15 +5248,23 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LVL52
 	.4byte	.LVL54
 	.2byte	0x1
-	.byte	0x57
+	.byte	0x56
 	.4byte	.LVL54
-	.4byte	.LVL56
+	.4byte	.LVL55
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL56
-	.4byte	.LFE270
+	.4byte	.LVL55
+	.4byte	.LVL57
 	.2byte	0x1
-	.byte	0x57
+	.byte	0x56
+	.4byte	.LVL57
+	.4byte	.LVL59
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL59
+	.4byte	.LFE266
+	.2byte	0x1
+	.byte	0x56
 	.4byte	0
 	.4byte	0
 .LLST27:
@@ -5404,11 +5279,11 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LVL44
 	.4byte	.LVL51
 	.2byte	0x1
-	.byte	0x56
+	.byte	0x57
 	.4byte	.LVL54
-	.4byte	.LVL58
+	.4byte	.LVL59
 	.2byte	0x1
-	.byte	0x56
+	.byte	0x57
 	.4byte	0
 	.4byte	0
 .LLST28:
@@ -5417,16 +5292,16 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL58
-	.4byte	.LFE270
+	.4byte	.LVL59
+	.4byte	.LFE266
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
 .LLST40:
-	.4byte	.LVL61
 	.4byte	.LVL62
+	.4byte	.LVL63
 	.2byte	0x3
 	.byte	0x8
 	.byte	0xff
@@ -5443,45 +5318,45 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0
 	.4byte	0
 .LLST29:
-	.4byte	.LVL59
-	.4byte	.LVL74
+	.4byte	.LVL60
+	.4byte	.LVL75
 	.2byte	0x1
-	.byte	0x56
+	.byte	0x57
 	.4byte	0
 	.4byte	0
 .LLST30:
-	.4byte	.LVL59
-	.4byte	.LVL60-1
+	.4byte	.LVL60
+	.4byte	.LVL61-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL62
-	.4byte	.LVL68
+	.4byte	.LVL63
+	.4byte	.LVL69
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
 .LLST31:
-	.4byte	.LVL59
-	.4byte	.LVL74
+	.4byte	.LVL60
+	.4byte	.LVL75
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
 .LLST32:
-	.4byte	.LVL68
-	.4byte	.LVL71
+	.4byte	.LVL69
+	.4byte	.LVL72
 	.2byte	0x3
 	.byte	0x7b
 	.sleb128 -2
 	.byte	0x9f
-	.4byte	.LVL71
 	.4byte	.LVL72
+	.4byte	.LVL73
 	.2byte	0x3
 	.byte	0x7b
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL72
-	.4byte	.LVL74
+	.4byte	.LVL73
+	.4byte	.LVL75
 	.2byte	0x3
 	.byte	0x7b
 	.sleb128 -2
@@ -5489,39 +5364,39 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0
 	.4byte	0
 .LLST33:
-	.4byte	.LVL70
-	.4byte	.LVL73-1
+	.4byte	.LVL71
+	.4byte	.LVL74-1
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
 .LLST34:
-	.4byte	.LVL67
-	.4byte	.LVL74
+	.4byte	.LVL68
+	.4byte	.LVL75
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
 .LLST35:
-	.4byte	.LVL63
-	.4byte	.LVL65
+	.4byte	.LVL64
+	.4byte	.LVL66
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL65
 	.4byte	.LVL66
+	.4byte	.LVL67
 	.2byte	0x5
 	.byte	0x74
 	.sleb128 0
 	.byte	0x6
 	.byte	0x23
 	.uleb128 0x34
-	.4byte	.LVL66
-	.4byte	.LVL74
+	.4byte	.LVL67
+	.4byte	.LVL75
 	.2byte	0x8
 	.byte	0x75
 	.sleb128 0
-	.byte	0x76
+	.byte	0x77
 	.sleb128 0
 	.byte	0x22
 	.byte	0x33
@@ -5530,23 +5405,23 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0
 	.4byte	0
 .LLST36:
-	.4byte	.LVL64
-	.4byte	.LVL74
+	.4byte	.LVL65
+	.4byte	.LVL75
 	.2byte	0x2
 	.byte	0x37
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
 .LLST37:
-	.4byte	.LVL66
-	.4byte	.LVL68
+	.4byte	.LVL67
+	.4byte	.LVL69
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
 .LLST38:
-	.4byte	.LVL69
-	.4byte	.LVL73-1
+	.4byte	.LVL70
+	.4byte	.LVL74-1
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
@@ -5557,7 +5432,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL6-1
-	.4byte	.LFE268
+	.4byte	.LFE264
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -5571,7 +5446,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x51
 	.4byte	.LVL6-1
-	.4byte	.LFE268
+	.4byte	.LFE264
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
@@ -5592,7 +5467,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.sleb128 1
 	.byte	0x9f
 	.4byte	.LVL10
-	.4byte	.LFE268
+	.4byte	.LFE264
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -5606,7 +5481,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x53
 	.4byte	.LVL6-1
-	.4byte	.LFE268
+	.4byte	.LFE264
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
@@ -5617,7 +5492,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL10
-	.4byte	.LFE268
+	.4byte	.LFE264
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
@@ -5644,7 +5519,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x1
 	.byte	0x9f
 	.4byte	.LVL29
-	.4byte	.LFE268
+	.4byte	.LFE264
 	.2byte	0x6
 	.byte	0x74
 	.sleb128 0
@@ -5668,7 +5543,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.sleb128 -1
 	.byte	0x9f
 	.4byte	.LVL23
-	.4byte	.LFE268
+	.4byte	.LFE264
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 -2
@@ -5705,7 +5580,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL15
-	.4byte	.LFE268
+	.4byte	.LFE264
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
@@ -5723,7 +5598,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.sleb128 1
 	.byte	0x9f
 	.4byte	.LVL10
-	.4byte	.LFE268
+	.4byte	.LFE264
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -5752,7 +5627,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x54
 	.4byte	.LVL29
-	.4byte	.LFE268
+	.4byte	.LFE264
 	.2byte	0x3
 	.byte	0x74
 	.sleb128 -1
@@ -5765,7 +5640,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x54
 	.4byte	.LVL29
-	.4byte	.LFE268
+	.4byte	.LFE264
 	.2byte	0x3
 	.byte	0x74
 	.sleb128 -1
@@ -5800,14 +5675,14 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.2byte	0
 	.2byte	0
-	.4byte	.LFB272
-	.4byte	.LFE272-.LFB272
 	.4byte	.LFB268
 	.4byte	.LFE268-.LFB268
-	.4byte	.LFB273
-	.4byte	.LFE273-.LFB273
-	.4byte	.LFB270
-	.4byte	.LFE270-.LFB270
+	.4byte	.LFB264
+	.4byte	.LFE264-.LFB264
+	.4byte	.LFB269
+	.4byte	.LFE269-.LFB269
+	.4byte	.LFB266
+	.4byte	.LFE266-.LFB266
 	.4byte	0
 	.4byte	0
 	.section	.debug_ranges,"",%progbits
@@ -5840,14 +5715,14 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LBE46
 	.4byte	0
 	.4byte	0
-	.4byte	.LFB272
-	.4byte	.LFE272
 	.4byte	.LFB268
 	.4byte	.LFE268
-	.4byte	.LFB273
-	.4byte	.LFE273
-	.4byte	.LFB270
-	.4byte	.LFE270
+	.4byte	.LFB264
+	.4byte	.LFE264
+	.4byte	.LFB269
+	.4byte	.LFE269
+	.4byte	.LFB266
+	.4byte	.LFE266
 	.4byte	0
 	.4byte	0
 	.section	.debug_line,"",%progbits
@@ -5859,7 +5734,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"off_mem_rsvmap\000"
 .LASF183:
 	.ascii	"UCLASS_I2C_EEPROM\000"
-.LASF303:
+.LASF307:
 	.ascii	"jt_funcs\000"
 .LASF188:
 	.ascii	"UCLASS_IRQ\000"
@@ -5869,17 +5744,17 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"UCLASS_I2C\000"
 .LASF13:
 	.ascii	"sizetype\000"
-.LASF327:
+.LASF321:
 	.ascii	"net_hostname\000"
 .LASF54:
 	.ascii	"start\000"
 .LASF222:
 	.ascii	"UCLASS_SPI\000"
-.LASF300:
+.LASF304:
 	.ascii	"child\000"
 .LASF186:
 	.ascii	"UCLASS_I2S\000"
-.LASF349:
+.LASF343:
 	.ascii	"NETLOOP_RESTART\000"
 .LASF184:
 	.ascii	"UCLASS_I2C_GENERIC\000"
@@ -5887,7 +5762,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"UCLASS_MOD_EXP\000"
 .LASF245:
 	.ascii	"UCLASS_IO_DOMAIN\000"
-.LASF257:
+.LASF259:
 	.ascii	"using_pre_serial\000"
 .LASF37:
 	.ascii	"uclass_priv\000"
@@ -5895,19 +5770,19 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"UCLASS_RKNAND\000"
 .LASF159:
 	.ascii	"UCLASS_DEMO\000"
-.LASF395:
+.LASF390:
 	.ascii	"OTP_S\000"
 .LASF108:
 	.ascii	"ih_magic\000"
 .LASF46:
 	.ascii	"list_head\000"
-.LASF360:
+.LASF354:
 	.ascii	"child_pre_probe\000"
-.LASF292:
+.LASF296:
 	.ascii	"pm_ctx_phys\000"
 .LASF163:
 	.ascii	"UCLASS_TEST_PROBE\000"
-.LASF298:
+.LASF302:
 	.ascii	"full_name\000"
 .LASF241:
 	.ascii	"UCLASS_KEY\000"
@@ -5915,19 +5790,21 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"bi_intfreq\000"
 .LASF11:
 	.ascii	"phys_addr_t\000"
-.LASF399:
+.LASF394:
 	.ascii	"write\000"
 .LASF236:
 	.ascii	"UCLASS_VIDEO_BRIDGE\000"
+.LASF295:
+	.ascii	"video_bottom\000"
 .LASF5:
 	.ascii	"__u8\000"
-.LASF348:
+.LASF342:
 	.ascii	"NETLOOP_CONTINUE\000"
 .LASF225:
 	.ascii	"UCLASS_SPI_GENERIC\000"
-.LASF288:
+.LASF290:
 	.ascii	"malloc_base\000"
-.LASF420:
+.LASF415:
 	.ascii	"dev_read_addr_ptr\000"
 .LASF56:
 	.ascii	"flash_info_t\000"
@@ -5943,7 +5820,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"UCLASS_CROS_EC\000"
 .LASF74:
 	.ascii	"bi_dsp_freq\000"
-.LASF405:
+.LASF400:
 	.ascii	"rockchip_otp_ids\000"
 .LASF122:
 	.ascii	"image_start\000"
@@ -5951,45 +5828,45 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"UCLASS_TEST_FDT\000"
 .LASF65:
 	.ascii	"bd_info\000"
-.LASF346:
+.LASF340:
 	.ascii	"uclass_id\000"
 .LASF112:
 	.ascii	"ih_load\000"
-.LASF393:
+.LASF388:
 	.ascii	"DECOM_GZIP\000"
-.LASF307:
+.LASF311:
 	.ascii	"__dtb_dt_spl_begin\000"
-.LASF386:
+.LASF380:
 	.ascii	"pre_remove\000"
 .LASF7:
 	.ascii	"__u32\000"
 .LASF35:
 	.ascii	"priv\000"
-.LASF291:
+.LASF293:
 	.ascii	"cur_serial_dev\000"
-.LASF333:
+.LASF327:
 	.ascii	"net_tx_packet\000"
 .LASF240:
 	.ascii	"UCLASS_FG\000"
-.LASF332:
+.LASF326:
 	.ascii	"net_server_ip\000"
-.LASF428:
+.LASF423:
 	.ascii	"ofnode_union\000"
-.LASF340:
+.LASF334:
 	.ascii	"net_native_vlan\000"
 .LASF238:
 	.ascii	"UCLASS_VIDEO_CRTC\000"
 .LASF175:
 	.ascii	"UCLASS_CODEC\000"
-.LASF285:
+.LASF287:
 	.ascii	"env_buf\000"
-.LASF414:
+.LASF409:
 	.ascii	"rockchip_secure_otp_write_byte\000"
 .LASF21:
 	.ascii	"errno\000"
 .LASF15:
 	.ascii	"long int\000"
-.LASF390:
+.LASF385:
 	.ascii	"__invalid_size_argument_for_IOC\000"
 .LASF69:
 	.ascii	"bi_flashsize\000"
@@ -6003,15 +5880,15 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"size_dt_strings\000"
 .LASF235:
 	.ascii	"UCLASS_VIDEO\000"
-.LASF406:
+.LASF401:
 	.ascii	"_u_boot_list_2_driver_2_rockchip_secure_otp_v2\000"
-.LASF269:
+.LASF271:
 	.ascii	"relocaddr\000"
-.LASF377:
+.LASF371:
 	.ascii	"dev_head\000"
-.LASF427:
+.LASF422:
 	.ascii	"/home/zzz/code/u-boot\000"
-.LASF343:
+.LASF337:
 	.ascii	"net_boot_file_size\000"
 .LASF114:
 	.ascii	"ih_dcrc\000"
@@ -6021,7 +5898,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"UCLASS_ROOT\000"
 .LASF44:
 	.ascii	"ide_bus_offset\000"
-.LASF330:
+.LASF324:
 	.ascii	"net_server_ethaddr\000"
 .LASF82:
 	.ascii	"bi_arch_number\000"
@@ -6031,11 +5908,11 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"UCLASS_KEYBOARD\000"
 .LASF18:
 	.ascii	"uint8_t\000"
-.LASF365:
+.LASF359:
 	.ascii	"per_child_platdata_auto_alloc_size\000"
 .LASF45:
 	.ascii	"udevice\000"
-.LASF423:
+.LASF418:
 	.ascii	"udelay\000"
 .LASF116:
 	.ascii	"ih_arch\000"
@@ -6043,9 +5920,9 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"totalsize\000"
 .LASF109:
 	.ascii	"ih_hcrc\000"
-.LASF271:
+.LASF273:
 	.ascii	"mon_len\000"
-.LASF401:
+.LASF396:
 	.ascii	"call\000"
 .LASF124:
 	.ascii	"load\000"
@@ -6059,7 +5936,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"unsigned char\000"
 .LASF84:
 	.ascii	"bi_andr_version\000"
-.LASF417:
+.LASF412:
 	.ascii	"rockchip_secure_otp_v2_read\000"
 .LASF157:
 	.ascii	"images\000"
@@ -6071,17 +5948,19 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"UCLASS_LED\000"
 .LASF111:
 	.ascii	"ih_size\000"
-.LASF413:
+.LASF408:
 	.ascii	"rockchip_secure_otp_v2_capability\000"
 .LASF39:
 	.ascii	"uclass_node\000"
+.LASF248:
+	.ascii	"UCLASS_MDIO\000"
 .LASF23:
 	.ascii	"_Bool\000"
-.LASF366:
+.LASF360:
 	.ascii	"property\000"
-.LASF352:
+.LASF346:
 	.ascii	"net_state\000"
-.LASF368:
+.LASF362:
 	.ascii	"value\000"
 .LASF185:
 	.ascii	"UCLASS_I2C_MUX\000"
@@ -6091,41 +5970,39 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"_binary_u_boot_bin_start\000"
 .LASF234:
 	.ascii	"UCLASS_USB_GADGET_GENERIC\000"
-.LASF350:
+.LASF344:
 	.ascii	"NETLOOP_SUCCESS\000"
 .LASF36:
 	.ascii	"uclass\000"
-.LASF374:
+.LASF368:
 	.ascii	"p_current\000"
-.LASF376:
+.LASF370:
 	.ascii	"uc_drv\000"
-.LASF347:
+.LASF341:
 	.ascii	"net_loop_state\000"
 .LASF43:
 	.ascii	"req_seq\000"
-.LASF301:
+.LASF305:
 	.ascii	"sibling\000"
-.LASF277:
+.LASF279:
 	.ascii	"dm_root_f\000"
-.LASF314:
-	.ascii	"enetaddr\000"
 .LASF174:
 	.ascii	"UCLASS_AMP\000"
 .LASF212:
 	.ascii	"UCLASS_PWRSEQ\000"
-.LASF369:
+.LASF363:
 	.ascii	"of_offset\000"
 .LASF140:
 	.ascii	"fit_hdr_fdt\000"
-.LASF341:
+.LASF335:
 	.ascii	"net_restart_wrap\000"
-.LASF329:
+.LASF323:
 	.ascii	"net_ethaddr\000"
-.LASF410:
+.LASF405:
 	.ascii	"rockchip_secure_otp_v2_write\000"
 .LASF42:
 	.ascii	"flags\000"
-.LASF424:
+.LASF419:
 	.ascii	"malloc_simple\000"
 .LASF117:
 	.ascii	"ih_type\000"
@@ -6133,15 +6010,15 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"off_dt_struct\000"
 .LASF70:
 	.ascii	"bi_flashoffset\000"
-.LASF342:
+.LASF336:
 	.ascii	"net_boot_file_name\000"
-.LASF379:
+.LASF373:
 	.ascii	"compatible\000"
 .LASF160:
 	.ascii	"UCLASS_TEST\000"
 .LASF110:
 	.ascii	"ih_time\000"
-.LASF262:
+.LASF264:
 	.ascii	"bus_clk\000"
 .LASF213:
 	.ascii	"UCLASS_RAM\000"
@@ -6153,17 +6030,17 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"image_info\000"
 .LASF127:
 	.ascii	"arch\000"
-.LASF264:
+.LASF266:
 	.ascii	"mem_clk\000"
-.LASF416:
+.LASF411:
 	.ascii	"temp\000"
-.LASF261:
+.LASF263:
 	.ascii	"cpu_clk\000"
 .LASF50:
 	.ascii	"select_hwpart\000"
-.LASF334:
+.LASF328:
 	.ascii	"net_rx_packets\000"
-.LASF371:
+.LASF365:
 	.ascii	"mem_malloc_start\000"
 .LASF92:
 	.ascii	"_datarelro_start_ofs\000"
@@ -6173,47 +6050,45 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"ih_ep\000"
 .LASF61:
 	.ascii	"lmb_region\000"
-.LASF426:
+.LASF421:
 	.ascii	"drivers/misc/rockchip-secure-otp-v2.c\000"
-.LASF384:
+.LASF378:
 	.ascii	"pre_probe\000"
-.LASF422:
+.LASF417:
 	.ascii	"printf\000"
-.LASF394:
+.LASF389:
 	.ascii	"DECOM_ZLIB\000"
 .LASF135:
 	.ascii	"fit_uname_os\000"
 .LASF76:
 	.ascii	"bi_bootflags\000"
-.LASF331:
+.LASF325:
 	.ascii	"net_ip\000"
-.LASF283:
+.LASF285:
 	.ascii	"fdt_size\000"
-.LASF325:
+.LASF319:
 	.ascii	"net_dns_server\000"
-.LASF345:
+.LASF339:
 	.ascii	"net_ping_ip\000"
 .LASF63:
 	.ascii	"memory\000"
 .LASF95:
 	.ascii	"fdt_header\000"
-.LASF372:
+.LASF366:
 	.ascii	"mem_malloc_end\000"
 .LASF192:
 	.ascii	"UCLASS_MAILBOX\000"
 .LASF147:
 	.ascii	"rd_end\000"
-.LASF354:
+.LASF348:
 	.ascii	"bind\000"
-.LASF272:
+.LASF274:
 	.ascii	"irq_sp\000"
 .LASF152:
 	.ascii	"cmdline_start\000"
-.LASF321:
-	.ascii	"index\000"
-.LASF260:
+.LASF262:
 	.ascii	"global_data\000"
-.LASF388:
+.LASF383:
 	.ascii	"per_device_auto_alloc_size\000"
 .LASF220:
 	.ascii	"UCLASS_SCSI\000"
@@ -6225,31 +6100,31 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"long unsigned int\000"
 .LASF168:
 	.ascii	"UCLASS_SIMPLE_BUS\000"
-.LASF304:
+.LASF308:
 	.ascii	"gd_t\000"
-.LASF326:
+.LASF320:
 	.ascii	"net_nis_domain\000"
 .LASF142:
 	.ascii	"fit_noffset_fdt\000"
-.LASF404:
+.LASF399:
 	.ascii	"rockchip_secure_otp_ops\000"
-.LASF351:
+.LASF345:
 	.ascii	"NETLOOP_FAIL\000"
 .LASF239:
 	.ascii	"UCLASS_WDT\000"
-.LASF253:
+.LASF255:
 	.ascii	"timer_reset_value\000"
-.LASF273:
+.LASF275:
 	.ascii	"start_addr_sp\000"
 .LASF71:
 	.ascii	"bi_sramstart\000"
 .LASF26:
 	.ascii	"_binary_u_boot_bin_end\000"
-.LASF274:
+.LASF276:
 	.ascii	"reloc_off\000"
 .LASF103:
 	.ascii	"boot_cpuid_phys\000"
-.LASF252:
+.LASF254:
 	.ascii	"lastinc\000"
 .LASF138:
 	.ascii	"fit_uname_rd\000"
@@ -6261,11 +6136,11 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"fit_uname_cfg\000"
 .LASF221:
 	.ascii	"UCLASS_SERIAL\000"
-.LASF339:
+.LASF333:
 	.ascii	"net_our_vlan\000"
-.LASF293:
+.LASF297:
 	.ascii	"serial\000"
-.LASF355:
+.LASF349:
 	.ascii	"probe\000"
 .LASF171:
 	.ascii	"UCLASS_BLK\000"
@@ -6273,7 +6148,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"image_info_t\000"
 .LASF167:
 	.ascii	"UCLASS_USB_EMUL\000"
-.LASF254:
+.LASF256:
 	.ascii	"tlb_addr\000"
 .LASF205:
 	.ascii	"UCLASS_PCI_GENERIC\000"
@@ -6283,25 +6158,23 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"bi_ip_addr\000"
 .LASF207:
 	.ascii	"UCLASS_PINCONFIG\000"
-.LASF317:
-	.ascii	"send\000"
 .LASF228:
 	.ascii	"UCLASS_THERMAL\000"
 .LASF131:
 	.ascii	"legacy_hdr_os_copy\000"
 .LASF9:
 	.ascii	"long long int\000"
-.LASF391:
+.LASF386:
 	.ascii	"misc_mode\000"
-.LASF282:
+.LASF284:
 	.ascii	"new_fdt\000"
 .LASF22:
 	.ascii	"___strtok\000"
-.LASF344:
+.LASF338:
 	.ascii	"net_boot_file_expected_size_in_blocks\000"
-.LASF402:
+.LASF397:
 	.ascii	"rockchip_otp_v2_platdata\000"
-.LASF353:
+.LASF347:
 	.ascii	"of_match\000"
 .LASF200:
 	.ascii	"UCLASS_NVME\000"
@@ -6311,19 +6184,19 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"protect\000"
 .LASF231:
 	.ascii	"UCLASS_USB\000"
-.LASF381:
+.LASF375:
 	.ascii	"uclass_driver\000"
 .LASF242:
 	.ascii	"UCLASS_RC\000"
-.LASF286:
+.LASF288:
 	.ascii	"timebase_h\000"
-.LASF287:
+.LASF289:
 	.ascii	"timebase_l\000"
 .LASF177:
 	.ascii	"UCLASS_DISPLAY\000"
-.LASF338:
+.LASF332:
 	.ascii	"net_null_ethaddr\000"
-.LASF267:
+.LASF269:
 	.ascii	"env_valid\000"
 .LASF34:
 	.ascii	"parent\000"
@@ -6331,37 +6204,35 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"UCLASS_PCI_EMUL\000"
 .LASF38:
 	.ascii	"parent_priv\000"
-.LASF396:
+.LASF391:
 	.ascii	"OTP_NS\000"
 .LASF243:
 	.ascii	"UCLASS_CHARGE_DISPLAY\000"
-.LASF308:
+.LASF312:
 	.ascii	"load_addr\000"
 .LASF134:
 	.ascii	"fit_hdr_os\000"
 .LASF90:
 	.ascii	"_datarelrolocal_start_ofs\000"
-.LASF415:
+.LASF410:
 	.ascii	"timeout\000"
-.LASF259:
+.LASF261:
 	.ascii	"addr\000"
-.LASF398:
+.LASF393:
 	.ascii	"read\000"
 .LASF8:
 	.ascii	"unsigned int\000"
 .LASF16:
 	.ascii	"ushort\000"
-.LASF313:
-	.ascii	"eth_device\000"
-.LASF400:
+.LASF395:
 	.ascii	"ioctl\000"
-.LASF421:
+.LASF416:
 	.ascii	"dev_read_u32_default\000"
-.LASF281:
+.LASF283:
 	.ascii	"ufdt_blob\000"
-.LASF362:
+.LASF356:
 	.ascii	"priv_auto_alloc_size\000"
-.LASF289:
+.LASF291:
 	.ascii	"malloc_limit\000"
 .LASF209:
 	.ascii	"UCLASS_PMIC\000"
@@ -6369,7 +6240,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"legacy_hdr_os\000"
 .LASF99:
 	.ascii	"off_dt_strings\000"
-.LASF305:
+.LASF309:
 	.ascii	"monitor_flash_len\000"
 .LASF194:
 	.ascii	"UCLASS_MISC\000"
@@ -6379,23 +6250,25 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"image_base\000"
 .LASF227:
 	.ascii	"UCLASS_SYSRESET\000"
-.LASF375:
+.LASF369:
 	.ascii	"current\000"
 .LASF181:
 	.ascii	"UCLASS_FIRMWARE\000"
 .LASF191:
 	.ascii	"UCLASS_LPC\000"
-.LASF411:
+.LASF406:
 	.ascii	"offset\000"
 .LASF187:
 	.ascii	"UCLASS_IDE\000"
-.LASF397:
+.LASF392:
 	.ascii	"misc_ops\000"
-.LASF297:
+.LASF301:
 	.ascii	"phandle\000"
-.LASF363:
+.LASF294:
+	.ascii	"video_top\000"
+.LASF357:
 	.ascii	"platdata_auto_alloc_size\000"
-.LASF389:
+.LASF384:
 	.ascii	"per_device_platdata_auto_alloc_size\000"
 .LASF156:
 	.ascii	"bootm_headers_t\000"
@@ -6403,17 +6276,15 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"bi_arm_freq\000"
 .LASF215:
 	.ascii	"UCLASS_REMOTEPROC\000"
-.LASF318:
-	.ascii	"recv\000"
 .LASF126:
 	.ascii	"type\000"
 .LASF137:
 	.ascii	"fit_hdr_rd\000"
-.LASF266:
+.LASF268:
 	.ascii	"env_addr\000"
 .LASF72:
 	.ascii	"bi_sramsize\000"
-.LASF278:
+.LASF280:
 	.ascii	"uclass_root\000"
 .LASF180:
 	.ascii	"UCLASS_GPIO\000"
@@ -6421,9 +6292,9 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"UCLASS_PWM\000"
 .LASF58:
 	.ascii	"long double\000"
-.LASF268:
+.LASF270:
 	.ascii	"ram_top\000"
-.LASF295:
+.LASF299:
 	.ascii	"console_evt\000"
 .LASF146:
 	.ascii	"rd_start\000"
@@ -6431,19 +6302,17 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"UCLASS_POWER_DOMAIN\000"
 .LASF214:
 	.ascii	"UCLASS_REGULATOR\000"
-.LASF310:
+.LASF314:
 	.ascii	"save_size\000"
 .LASF172:
 	.ascii	"UCLASS_CLK\000"
 .LASF31:
 	.ascii	"uclass_platdata\000"
-.LASF419:
+.LASF414:
 	.ascii	"dev_get_platdata\000"
-.LASF315:
-	.ascii	"iobase\000"
 .LASF89:
 	.ascii	"_datarel_start_ofs\000"
-.LASF256:
+.LASF258:
 	.ascii	"pre_serial\000"
 .LASF119:
 	.ascii	"ih_name\000"
@@ -6451,23 +6320,23 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"ih_os\000"
 .LASF153:
 	.ascii	"cmdline_end\000"
-.LASF335:
+.LASF329:
 	.ascii	"net_rx_packet\000"
-.LASF249:
+.LASF251:
 	.ascii	"LOGF_MAX_CATEGORIES\000"
-.LASF280:
+.LASF282:
 	.ascii	"fdt_blob\000"
-.LASF378:
+.LASF372:
 	.ascii	"udevice_id\000"
 .LASF51:
 	.ascii	"size\000"
 .LASF10:
 	.ascii	"long long unsigned int\000"
-.LASF387:
+.LASF382:
 	.ascii	"destroy\000"
 .LASF107:
 	.ascii	"image_header\000"
-.LASF367:
+.LASF361:
 	.ascii	"length\000"
 .LASF20:
 	.ascii	"__be32\000"
@@ -6477,61 +6346,57 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"fit_noffset_os\000"
 .LASF195:
 	.ascii	"UCLASS_MMC\000"
-.LASF320:
-	.ascii	"write_hwaddr\000"
-.LASF248:
+.LASF250:
 	.ascii	"UCLASS_INVALID\000"
 .LASF233:
 	.ascii	"UCLASS_USB_HUB\000"
-.LASF361:
+.LASF355:
 	.ascii	"child_post_remove\000"
 .LASF41:
 	.ascii	"sibling_node\000"
-.LASF284:
+.LASF286:
 	.ascii	"of_root\000"
-.LASF407:
+.LASF402:
 	.ascii	"rockchip_secure_otp_v2_ofdata_to_platdata\000"
-.LASF412:
+.LASF407:
 	.ascii	"data_temp\000"
 .LASF57:
 	.ascii	"flash_info\000"
 .LASF101:
 	.ascii	"version\000"
-.LASF319:
-	.ascii	"halt\000"
 .LASF62:
 	.ascii	"region\000"
 .LASF105:
 	.ascii	"size_dt_struct\000"
-.LASF276:
+.LASF278:
 	.ascii	"dm_root\000"
-.LASF294:
+.LASF298:
 	.ascii	"sys_start_tick\000"
-.LASF299:
+.LASF303:
 	.ascii	"properties\000"
-.LASF408:
+.LASF403:
 	.ascii	"rockchip_secure_otp_v2_ioctl\000"
 .LASF197:
 	.ascii	"UCLASS_MTD\000"
 .LASF94:
 	.ascii	"fdt32_t\000"
-.LASF275:
+.LASF277:
 	.ascii	"new_gd\000"
 .LASF199:
 	.ascii	"UCLASS_NORTHBRIDGE\000"
 .LASF78:
 	.ascii	"bi_enetaddr\000"
-.LASF302:
+.LASF306:
 	.ascii	"mtd_info\000"
-.LASF359:
+.LASF353:
 	.ascii	"child_post_bind\000"
-.LASF311:
+.LASF315:
 	.ascii	"in_addr\000"
-.LASF336:
+.LASF330:
 	.ascii	"net_rx_packet_len\000"
-.LASF316:
+.LASF381:
 	.ascii	"init\000"
-.LASF306:
+.LASF310:
 	.ascii	"__dtb_dt_begin\000"
 .LASF216:
 	.ascii	"UCLASS_RESET\000"
@@ -6547,7 +6412,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"FIQ_STACK_START\000"
 .LASF154:
 	.ascii	"verify\000"
-.LASF370:
+.LASF364:
 	.ascii	"ofnode\000"
 .LASF28:
 	.ascii	"name\000"
@@ -6557,7 +6422,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"UCLASS_TIMER\000"
 .LASF224:
 	.ascii	"UCLASS_SPI_FLASH\000"
-.LASF265:
+.LASF267:
 	.ascii	"have_console\000"
 .LASF81:
 	.ascii	"bi_busfreq\000"
@@ -6571,35 +6436,35 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"UCLASS_I2C_EMUL\000"
 .LASF223:
 	.ascii	"UCLASS_SPMI\000"
-.LASF356:
+.LASF350:
 	.ascii	"remove\000"
 .LASF162:
 	.ascii	"UCLASS_TEST_BUS\000"
-.LASF309:
+.LASF313:
 	.ascii	"save_addr\000"
-.LASF364:
+.LASF358:
 	.ascii	"per_child_auto_alloc_size\000"
-.LASF290:
+.LASF292:
 	.ascii	"malloc_ptr\000"
-.LASF403:
+.LASF398:
 	.ascii	"secure_conf_base\000"
 .LASF151:
 	.ascii	"initrd_end\000"
-.LASF383:
+.LASF377:
 	.ascii	"pre_unbind\000"
-.LASF258:
+.LASF260:
 	.ascii	"baudrate\000"
 .LASF91:
 	.ascii	"_datarellocal_start_ofs\000"
 .LASF40:
 	.ascii	"child_head\000"
-.LASF250:
+.LASF252:
 	.ascii	"arch_global_data\000"
-.LASF418:
+.LASF413:
 	.ascii	"offset_temp\000"
-.LASF247:
+.LASF249:
 	.ascii	"UCLASS_COUNT\000"
-.LASF263:
+.LASF265:
 	.ascii	"pci_clk\000"
 .LASF49:
 	.ascii	"block_drvr\000"
@@ -6607,39 +6472,39 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"flash_id\000"
 .LASF246:
 	.ascii	"UCLASS_CRYPTO\000"
-.LASF296:
+.LASF300:
 	.ascii	"device_node\000"
-.LASF270:
+.LASF272:
 	.ascii	"ram_size\000"
 .LASF145:
 	.ascii	"fit_noffset_setup\000"
 .LASF106:
 	.ascii	"working_fdt\000"
-.LASF279:
+.LASF281:
 	.ascii	"fdt_blob_kern\000"
-.LASF328:
+.LASF322:
 	.ascii	"net_root_path\000"
 .LASF178:
 	.ascii	"UCLASS_DMA\000"
 .LASF86:
 	.ascii	"bd_t\000"
-.LASF312:
+.LASF316:
 	.ascii	"s_addr\000"
-.LASF409:
+.LASF404:
 	.ascii	"request\000"
-.LASF385:
+.LASF379:
 	.ascii	"post_probe\000"
-.LASF337:
+.LASF331:
 	.ascii	"net_bcast_ethaddr\000"
 .LASF83:
 	.ascii	"bi_boot_params\000"
 .LASF19:
 	.ascii	"uint32_t\000"
-.LASF373:
+.LASF367:
 	.ascii	"mem_malloc_brk\000"
-.LASF323:
+.LASF317:
 	.ascii	"net_gateway\000"
-.LASF425:
+.LASF420:
 	.ascii	"GNU C11 6.3.1 20170404 -mthumb -mthumb-interwork -m"
 	.ascii	"abi=aapcs-linux -mno-unaligned-access -mfloat-abi=s"
 	.ascii	"oft -march=armv7-a -mtune=cortex-a9 -mfpu=vfpv3-d16"
@@ -6649,17 +6514,15 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"s -fdata-sections -fno-common -ffixed-r9\000"
 .LASF66:
 	.ascii	"bi_memstart\000"
-.LASF392:
+.LASF387:
 	.ascii	"DECOM_LZ4\000"
 .LASF237:
 	.ascii	"UCLASS_VIDEO_CONSOLE\000"
-.LASF322:
-	.ascii	"eth_current\000"
-.LASF358:
+.LASF352:
 	.ascii	"ofdata_to_platdata\000"
 .LASF64:
 	.ascii	"reserved\000"
-.LASF429:
+.LASF424:
 	.ascii	"free\000"
 .LASF85:
 	.ascii	"bi_dram\000"
@@ -6675,25 +6538,27 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"base\000"
 .LASF219:
 	.ascii	"UCLASS_RTC\000"
-.LASF251:
+.LASF253:
 	.ascii	"timer_rate_hz\000"
 .LASF52:
 	.ascii	"sector_count\000"
 .LASF118:
 	.ascii	"ih_comp\000"
-.LASF382:
+.LASF376:
 	.ascii	"post_bind\000"
-.LASF357:
+.LASF351:
 	.ascii	"unbind\000"
 .LASF148:
 	.ascii	"ft_addr\000"
+.LASF247:
+	.ascii	"UCLASS_ETH_PHY\000"
 .LASF4:
 	.ascii	"uchar\000"
 .LASF149:
 	.ascii	"ft_len\000"
 .LASF47:
 	.ascii	"next\000"
-.LASF380:
+.LASF374:
 	.ascii	"data\000"
 .LASF198:
 	.ascii	"UCLASS_NOP\000"
@@ -6705,7 +6570,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"UCLASS_PCH\000"
 .LASF204:
 	.ascii	"UCLASS_PCI\000"
-.LASF324:
+.LASF318:
 	.ascii	"net_netmask\000"
 .LASF33:
 	.ascii	"driver_data\000"
@@ -6715,7 +6580,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"UCLASS_ADC\000"
 .LASF164:
 	.ascii	"UCLASS_SPI_EMUL\000"
-.LASF255:
+.LASF257:
 	.ascii	"tlb_size\000"
 .LASF141:
 	.ascii	"fit_uname_fdt\000"

commit 41349aa18ed615632fe99ab8e419b7e918b613ee
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Tue Jul 7 11:38:17 2020 +0800

    configs: rv1109: Enable display vop and dsi
    
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
    Change-Id: I6169d057a2e0302d1f50e9c49b47a2249a24c3d2

diff --git a/configs/rv1109_defconfig b/configs/rv1109_defconfig
index cfdce890a2..625c8a6011 100644
--- a/configs/rv1109_defconfig
+++ b/configs/rv1109_defconfig
@@ -5,7 +5,6 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0xc000
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh"
 CONFIG_ROCKCHIP_RV1109=y
-CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_ROCKCHIP_FIT_IMAGE=y
 CONFIG_ROCKCHIP_UIMAGE=y
@@ -105,7 +104,6 @@ CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SPI_FLASH_MTD=y
-CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_NANENG_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_PMIC=y
@@ -137,7 +135,11 @@ CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
 CONFIG_USB_GADGET_VENDOR_NUM=0x2207
 CONFIG_USB_GADGET_PRODUCT_NUM=0x110b
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_IRQ2GPIO_V2=y
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_INNO_MIPI_PHY=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_RSA=y

commit ea437e2ce44cf869c8e3aa4d60614796ed469268
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed Jul 1 16:49:50 2020 +0800

    mtd: spinand: Fix the way to detect gigadevice id
    
    Parts of esmt devices are the same MFR id, and it's
    reasonable.
    
    Change-Id: I245c66ebd734ebabe89d8a6792446b80b76dd0e3
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/gigadevice.c b/drivers/mtd/nand/spi/gigadevice.c
index 6989a73c0d..7c978a6bc8 100644
--- a/drivers/mtd/nand/spi/gigadevice.c
+++ b/drivers/mtd/nand/spi/gigadevice.c
@@ -193,8 +193,9 @@ static int gigadevice_spinand_detect(struct spinand_device *spinand)
 	ret = spinand_match_and_init(spinand, gigadevice_spinand_table,
 				     ARRAY_SIZE(gigadevice_spinand_table),
 				     id[2]);
+	/* Not Only GD Nands MFR equals C8h */
 	if (ret)
-		return ret;
+		return 0;
 
 	return 1;
 }

commit 52b0060178285488737854a48ddecd381f8b236e
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Jun 19 12:10:32 2020 +0800

    mtd: spinand: Support esmt devices
    
    Support F50L1G41LB
    
    Change-Id: I094a093fd07b6b2f924a58cf45375e214df796ce
    Signed-off-by: Carl <xjxia@grandstream.cn>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/Makefile b/drivers/mtd/nand/spi/Makefile
index d07c7d403f..69aced385d 100644
--- a/drivers/mtd/nand/spi/Makefile
+++ b/drivers/mtd/nand/spi/Makefile
@@ -1,4 +1,4 @@
 # SPDX-License-Identifier: GPL-2.0
 
-spinand-objs := core.o gigadevice.o macronix.o micron.o toshiba.o winbond.o dosilicon.o
+spinand-objs := core.o gigadevice.o macronix.o micron.o toshiba.o winbond.o dosilicon.o esmt.o
 obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index b61c4f5235..59c412ed36 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -825,6 +825,7 @@ static const struct spinand_manufacturer *spinand_manufacturers[] = {
 	&toshiba_spinand_manufacturer,
 	&winbond_spinand_manufacturer,
 	&dosilicon_spinand_manufacturer,
+	&esmt_spinand_manufacturer,
 };
 
 static int spinand_manufacturer_detect(struct spinand_device *spinand)
diff --git a/drivers/mtd/nand/spi/esmt.c b/drivers/mtd/nand/spi/esmt.c
new file mode 100644
index 0000000000..31f46275da
--- /dev/null
+++ b/drivers/mtd/nand/spi/esmt.c
@@ -0,0 +1,113 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2020 Grandstream Networks, Inc
+ *
+ * Authors:
+ *	Carl <xjxia@grandstream.cn>
+ */
+
+#ifndef __UBOOT__
+#include <linux/device.h>
+#include <linux/kernel.h>
+#endif
+#include <linux/mtd/spinand.h>
+
+#define SPINAND_MFR_ESMT		0xC8
+
+static SPINAND_OP_VARIANTS(read_cache_variants,
+		SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
+
+static SPINAND_OP_VARIANTS(write_cache_variants,
+		SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
+		SPINAND_PROG_LOAD(true, 0, NULL, 0));
+
+static SPINAND_OP_VARIANTS(update_cache_variants,
+		SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
+		SPINAND_PROG_LOAD(false, 0, NULL, 0));
+
+static int f50lxx41x_ooblayout_ecc(struct mtd_info *mtd, int section,
+				  struct mtd_oob_region *region)
+{
+	if (section > 3)
+		return -ERANGE;
+
+	region->offset = (16 * section) + 8;
+	region->length = 8;
+
+	return 0;
+}
+
+static int f50lxx41x_ooblayout_free(struct mtd_info *mtd, int section,
+				   struct mtd_oob_region *region)
+{
+	if (section > 3)
+		return -ERANGE;
+
+	region->offset = (16 * section) + 2;
+	region->length = 6;
+
+	return 0;
+}
+
+static const struct mtd_ooblayout_ops f50lxx41x_ooblayout = {
+	.ecc = f50lxx41x_ooblayout_ecc,
+	.rfree = f50lxx41x_ooblayout_free,
+};
+
+static const struct spinand_info esmt_spinand_table[] = {
+	SPINAND_INFO("F50L1G41LB", 0x01,
+		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
+		     NAND_ECCREQ(1, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     0,
+		     SPINAND_ECCINFO(&f50lxx41x_ooblayout, NULL)),
+};
+
+/**
+ * esmt_spinand_detect - initialize device related part in spinand_device
+ * struct if it is a esmt device.
+ * @spinand: SPI NAND device structure
+ */
+static int esmt_spinand_detect(struct spinand_device *spinand)
+{
+	u8 *id = spinand->id.data;
+	int ret;
+
+	/*
+	 * esmt SPI NAND read ID need a dummy byte,
+	 * so the first byte in raw_id is dummy.
+	 */
+	if (id[1] != SPINAND_MFR_ESMT)
+		return 0;
+
+	ret = spinand_match_and_init(spinand, esmt_spinand_table,
+				     ARRAY_SIZE(esmt_spinand_table), id[2]);
+	/* Not Only ESMT Nands MFR equals C8h */
+	if (ret)
+		return 0;
+
+	return 1;
+}
+
+static int esmt_spinand_init(struct spinand_device *spinand)
+{
+	return 0;
+}
+
+static const struct spinand_manufacturer_ops esmt_spinand_manuf_ops = {
+	.detect = esmt_spinand_detect,
+	.init = esmt_spinand_init,
+};
+
+const struct spinand_manufacturer esmt_spinand_manufacturer = {
+	.id = SPINAND_MFR_ESMT,
+	.name = "esmt",
+	.ops = &esmt_spinand_manuf_ops,
+};
diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
index 51b68140aa..4789976344 100644
--- a/include/linux/mtd/spinand.h
+++ b/include/linux/mtd/spinand.h
@@ -207,6 +207,7 @@ extern const struct spinand_manufacturer micron_spinand_manufacturer;
 extern const struct spinand_manufacturer toshiba_spinand_manufacturer;
 extern const struct spinand_manufacturer winbond_spinand_manufacturer;
 extern const struct spinand_manufacturer dosilicon_spinand_manufacturer;
+extern const struct spinand_manufacturer esmt_spinand_manufacturer;
 
 /**
  * struct spinand_op_variants - SPI NAND operation variants

commit dec078707b43d4626cf3c889b2c77d8a94c22171
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 7 10:14:19 2020 +0800

    common: image-fit: clean up hash calculate
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If8b96eeab57232f790c8a83fd092cba1ce6ebd75

diff --git a/common/image-fit.c b/common/image-fit.c
index 4ada91de14..8522e3a849 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -1131,27 +1131,9 @@ int fit_set_totalsize(void *fit, int noffset, int totalsize)
 	return 0;
 }
 
-/**
- * calculate_hash - calculate and return hash for provided input data
- * @data: pointer to the input data
- * @data_len: data length
- * @algo: requested hash algorithm
- * @value: pointer to the char, will hold hash value data (caller must
- * allocate enough free space)
- * value_len: length of the calculated hash
- *
- * calculate_hash() computes input data hash according to the requested
- * algorithm.
- * Resulting hash value is placed in caller provided 'value' buffer, length
- * of the calculated hash is returned via value_len pointer argument.
- *
- * returns:
- *     0, on success
- *    -1, when algo is unsupported
- */
-int calculate_hash_software(const void *data, int data_len,
-			    const char *algo, uint8_t *value,
-			    int *value_len)
+int fit_calculate_hash(const void *data, int data_len,
+		       const char *algo, uint8_t *value,
+		       int *value_len)
 {
 	if (IMAGE_ENABLE_CRC32 && strcmp(algo, "crc32") == 0) {
 		*((uint32_t *)value) = crc32_wd(0, data, data_len,
@@ -1176,13 +1158,7 @@ int calculate_hash_software(const void *data, int data_len,
 	return 0;
 }
 
-#ifdef USE_HOSTCC
-int calculate_hash(const void *data, int data_len, const char *algo,
-		   uint8_t *value, int *value_len)
-{
-	return calculate_hash_software(data, data_len, algo, value, value_len);
-}
-#else
+#ifndef USE_HOSTCC
 #if CONFIG_IS_ENABLED(FIT_HW_CRYPTO)
 static int crypto_csum(u32 cap, const char *data, int len, u8 *output)
 {
@@ -1201,8 +1177,9 @@ static int crypto_csum(u32 cap, const char *data, int len, u8 *output)
 	return crypto_sha_csum(dev, &csha_ctx, (char *)data, len, output);
 }
 
-int calculate_hash(const void *data, int data_len, const char *algo,
-		   uint8_t *value, int *value_len)
+static int hw_fit_calculate_hash(const void *data, int data_len,
+				 const char *algo, uint8_t *value,
+				 int *value_len)
 {
 	if (IMAGE_ENABLE_CRC32 && strcmp(algo, "crc32") == 0) {
 		*((uint32_t *)value) = crc32_wd(0, data, data_len,
@@ -1224,14 +1201,40 @@ int calculate_hash(const void *data, int data_len, const char *algo,
 	}
 	return 0;
 }
-#else
+#endif
+#endif
+
+/**
+ * calculate_hash - calculate and return hash for provided input data
+ * @data: pointer to the input data
+ * @data_len: data length
+ * @algo: requested hash algorithm
+ * @value: pointer to the char, will hold hash value data (caller must
+ * allocate enough free space)
+ * value_len: length of the calculated hash
+ *
+ * calculate_hash() computes input data hash according to the requested
+ * algorithm.
+ * Resulting hash value is placed in caller provided 'value' buffer, length
+ * of the calculated hash is returned via value_len pointer argument.
+ *
+ * returns:
+ *     0, on success
+ *    -1, when algo is unsupported
+ */
 int calculate_hash(const void *data, int data_len, const char *algo,
 		   uint8_t *value, int *value_len)
 {
-	return calculate_hash_software(data, data_len, algo, value, value_len);
-}
+#if defined(USE_HOSTCC)
+	return fit_calculate_hash(data, data_len, algo, value, value_len);
+#else
+#if !CONFIG_IS_ENABLED(FIT_HW_CRYPTO)
+	return fit_calculate_hash(data, data_len, algo, value, value_len);
+#else
+	return hw_fit_calculate_hash(data, data_len, algo, value, value_len);
 #endif
 #endif
+}
 
 int fit_image_check_hash(const void *fit, int noffset, const void *data,
 			 size_t size, char **err_msgp)

commit 1a768a2938d13dbb2664c6470b3f97e233061462
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 7 09:29:51 2020 +0800

    lib: rsa: checksum: clean up hash calculate
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I9a8d30923c8744e4af9612b0edeaed10410b0b32

diff --git a/lib/rsa/rsa-checksum.c b/lib/rsa/rsa-checksum.c
index 7b68236ca5..c8246ef0a1 100644
--- a/lib/rsa/rsa-checksum.c
+++ b/lib/rsa/rsa-checksum.c
@@ -17,9 +17,9 @@
 #endif
 #include <u-boot/rsa.h>
 
-int hash_calculate_sw(const char *name,
-		      const struct image_region region[],
-		      int region_count, uint8_t *checksum)
+int rsa_hash_calculate(const char *name,
+		       const struct image_region region[],
+		       int region_count, uint8_t *checksum)
 {
 	struct hash_algo *algo;
 	int ret = 0;
@@ -52,18 +52,11 @@ int hash_calculate_sw(const char *name,
 	return 0;
 }
 
-#if defined(USE_HOSTCC)
-int hash_calculate(const char *name,
-		   const struct image_region region[],
-		   int region_count, uint8_t *checksum)
-{
-	return hash_calculate_sw(name, region, region_count, checksum);
-}
-#else
+#if !defined(USE_HOSTCC)
 #if CONFIG_IS_ENABLED(FIT_HW_CRYPTO)
-int hash_calculate(const char *name,
-		   const struct image_region region[],
-		   int region_count, uint8_t *checksum)
+int hw_rsa_hash_calculate(const char *name,
+			  const struct image_region region[],
+			  int region_count, uint8_t *checksum)
 
 {
 	struct udevice *dev;
@@ -88,12 +81,20 @@ int hash_calculate(const char *name,
 	return crypto_sha_regions_csum(dev, &ctx, region,
 				       region_count, checksum);
 }
-#else
+#endif
+#endif
+
 int hash_calculate(const char *name,
 		   const struct image_region region[],
 		   int region_count, uint8_t *checksum)
 {
-	return hash_calculate_sw(name, region, region_count, checksum);
-}
+#if defined(USE_HOSTCC)
+	return rsa_hash_calculate(name, region, region_count, checksum);
+#else
+#if !CONFIG_IS_ENABLED(FIT_HW_CRYPTO)
+	return rsa_hash_calculate(name, region, region_count, checksum);
+#else
+	return hw_rsa_hash_calculate(name, region, region_count, checksum);
 #endif
 #endif
+}

commit 0fb93272574324aa001b62561ea3a23fe195854f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 7 10:20:17 2020 +0800

    lib: rsa: verify: rename hw_crypto_rsa() => rsa_mod_exp_hw()
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I7164a2001f386b18a0e502be4735be45ed9907f1

diff --git a/lib/rsa/rsa-verify.c b/lib/rsa/rsa-verify.c
index d5aae625af..b08d677f4f 100644
--- a/lib/rsa/rsa-verify.c
+++ b/lib/rsa/rsa-verify.c
@@ -69,9 +69,9 @@ static void rsa_convert_big_endian(uint32_t *dst, const uint32_t *src, int len)
 		dst[i] = fdt32_to_cpu(src[len - 1 - i]);
 }
 
-static int hw_crypto_rsa(struct key_prop *prop, const uint8_t *sig,
-			 const uint32_t sig_len, const uint32_t key_len,
-			 uint8_t *output)
+static int rsa_mod_exp_hw(struct key_prop *prop, const uint8_t *sig,
+			  const uint32_t sig_len, const uint32_t key_len,
+			  uint8_t *output)
 {
 	struct udevice *dev;
 	uint8_t sig_reverse[sig_len];
@@ -169,7 +169,7 @@ static int rsa_verify_key(struct key_prop *prop, const uint8_t *sig,
 
 #if !defined(USE_HOSTCC)
 #if CONFIG_IS_ENABLED(FIT_HW_CRYPTO)
-	ret = hw_crypto_rsa(prop, sig, sig_len, key_len, buf);
+	ret = rsa_mod_exp_hw(prop, sig, sig_len, key_len, buf);
 #else
 	struct udevice *mod_exp_dev;
 

commit 6503e80f114d4961d8618a4d9c12705c2663e8ff
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Mon Jul 6 21:23:08 2020 +0800

    configs: rv1126: support dsi and mipi dphy
    
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
    Change-Id: Ic7b64929790b729a8aabda360c766ec126f2daf6

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index 1afd793371..44ae30ec85 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -157,6 +157,8 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_INNO_MIPI_PHY=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y

commit efcb7be1349babeb29a93ab087c4b1694f5db019
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Mon Jul 6 21:18:41 2020 +0800

    video/drm: dsi: add support for rv1126
    
    also update GRF_REG_FIELD for support some chip
    (like rv1126) GRF's register offset over 0x10000
    
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
    Change-Id: Iedb281dae00f85375166915c39663e92d990b0d3

diff --git a/drivers/video/drm/dw_mipi_dsi.c b/drivers/video/drm/dw_mipi_dsi.c
index acd71664c8..bf43669645 100644
--- a/drivers/video/drm/dw_mipi_dsi.c
+++ b/drivers/video/drm/dw_mipi_dsi.c
@@ -196,7 +196,7 @@
 #define FEEDBACK_DIV_LO(x)		UPDATE(x, 4, 0)
 #define FEEDBACK_DIV_HI(x)		(BIT(7) | UPDATE(x, 3, 0))
 
-#define GRF_REG_FIELD(reg, lsb, msb)	((reg << 16) | (lsb << 8) | (msb))
+#define GRF_REG_FIELD(reg, lsb, msb)	(((reg) << 10) | ((lsb) << 5) | (msb))
 
 enum grf_reg_fields {
 	DPIUPDATECFG,
@@ -280,9 +280,9 @@ static void grf_field_write(struct dw_mipi_dsi *dsi, enum grf_reg_fields index,
 	if (!field)
 		return;
 
-	reg = (field >> 16) & 0xffff;
-	lsb = (field >>  8) & 0xff;
-	msb = (field >>  0) & 0xff;
+	reg = (field >> 10) & 0x3ffff;
+	lsb = (field >>  5) & 0x1f;
+	msb = (field >>  0) & 0x1f;
 
 	rk_clrsetreg(dsi->grf + reg, GENMASK(msb, lsb), val << lsb);
 }
@@ -1500,6 +1500,25 @@ static const struct rockchip_connector rv1108_mipi_dsi_driver_data = {
 	 .data = &rv1108_mipi_dsi_plat_data,
 };
 
+static const u32 rv1126_dsi_grf_reg_fields[MAX_FIELDS] = {
+	[DPIUPDATECFG]		= GRF_REG_FIELD(0x0008,  5,  5),
+	[DPISHUTDN]		= GRF_REG_FIELD(0x0008,  4,  4),
+	[DPICOLORM]		= GRF_REG_FIELD(0x0008,  3,  3),
+	[FORCETXSTOPMODE]	= GRF_REG_FIELD(0x10220,  4,  7),
+	[TURNDISABLE]		= GRF_REG_FIELD(0x10220,  2,  2),
+	[FORCERXMODE]		= GRF_REG_FIELD(0x10220,  0,  0),
+};
+
+static const struct dw_mipi_dsi_plat_data rv1126_mipi_dsi_plat_data = {
+	.dsi0_grf_reg_fields = rv1126_dsi_grf_reg_fields,
+	.max_bit_rate_per_lane = 1000000000UL,
+};
+
+static const struct rockchip_connector rv1126_mipi_dsi_driver_data = {
+	 .funcs = &dw_mipi_dsi_connector_funcs,
+	 .data = &rv1126_mipi_dsi_plat_data,
+};
+
 static const struct udevice_id dw_mipi_dsi_ids[] = {
 	{
 		.compatible = "rockchip,px30-mipi-dsi",
@@ -1533,6 +1552,10 @@ static const struct udevice_id dw_mipi_dsi_ids[] = {
 		.compatible = "rockchip,rv1108-mipi-dsi",
 		.data = (ulong)&rv1108_mipi_dsi_driver_data,
 	},
+	{
+		.compatible = "rockchip,rv1126-mipi-dsi",
+		.data = (ulong)&rv1126_mipi_dsi_driver_data,
+	},
 	{}
 };
 

commit 8f1f6d607b49ca22fb20e1fdddcb933dcbb6a437
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Mon Jul 6 21:17:45 2020 +0800

    video/drm: inno_mipi_phy: Add support for rv1126
    
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
    Change-Id: I5f79ddbfebd2f31d7225f7f779d680c2b27ddc0f

diff --git a/drivers/video/drm/inno_mipi_phy.c b/drivers/video/drm/inno_mipi_phy.c
index 8047913d3c..5281513c35 100644
--- a/drivers/video/drm/inno_mipi_phy.c
+++ b/drivers/video/drm/inno_mipi_phy.c
@@ -714,6 +714,10 @@ static const struct udevice_id inno_mipi_dphy_ids[] = {
 		.compatible = "rockchip,rk1808-mipi-dphy",
 		.data = (ulong)&rk1808_inno_mipi_dphy_driver_data,
 	},
+	{
+		.compatible = "rockchip,rv1126-mipi-dphy",
+		.data = (ulong)&inno_mipi_dphy_driver_data,
+	},
 	{}
 };
 

commit c219aedb272103dc695287164f7c6a72daf7adfa
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Jun 15 20:22:24 2020 +0800

    mtd: spinand: Support dosilicon devcies
    
    Support DS35X1GA
    
    Change-Id: Iadbda15075e54325bf5c2dffa28d560947cec627
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/Makefile b/drivers/mtd/nand/spi/Makefile
index 6c65b187e8..d07c7d403f 100644
--- a/drivers/mtd/nand/spi/Makefile
+++ b/drivers/mtd/nand/spi/Makefile
@@ -1,4 +1,4 @@
 # SPDX-License-Identifier: GPL-2.0
 
-spinand-objs := core.o gigadevice.o macronix.o micron.o toshiba.o winbond.o
+spinand-objs := core.o gigadevice.o macronix.o micron.o toshiba.o winbond.o dosilicon.o
 obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index 27f75228d6..b61c4f5235 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -824,6 +824,7 @@ static const struct spinand_manufacturer *spinand_manufacturers[] = {
 	&micron_spinand_manufacturer,
 	&toshiba_spinand_manufacturer,
 	&winbond_spinand_manufacturer,
+	&dosilicon_spinand_manufacturer,
 };
 
 static int spinand_manufacturer_detect(struct spinand_device *spinand)
diff --git a/drivers/mtd/nand/spi/dosilicon.c b/drivers/mtd/nand/spi/dosilicon.c
new file mode 100644
index 0000000000..333e16fee7
--- /dev/null
+++ b/drivers/mtd/nand/spi/dosilicon.c
@@ -0,0 +1,112 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2020 Rockchip Electronics Co., Ltd
+ *
+ * Authors:
+ *	Dingqiang Lin <jon.lin@rock-chips.com>
+ */
+
+#ifndef __UBOOT__
+#include <linux/device.h>
+#include <linux/kernel.h>
+#endif
+#include <linux/mtd/spinand.h>
+
+#define SPINAND_MFR_DOSILICON		0xE5
+
+static SPINAND_OP_VARIANTS(read_cache_variants,
+		SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
+
+static SPINAND_OP_VARIANTS(write_cache_variants,
+		SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
+		SPINAND_PROG_LOAD(true, 0, NULL, 0));
+
+static SPINAND_OP_VARIANTS(update_cache_variants,
+		SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
+		SPINAND_PROG_LOAD(false, 0, NULL, 0));
+
+static int ds35xxga_ooblayout_ecc(struct mtd_info *mtd, int section,
+				  struct mtd_oob_region *region)
+{
+	if (section > 3)
+		return -ERANGE;
+
+	region->offset = (16 * section) + 8;
+	region->length = 8;
+
+	return 0;
+}
+
+static int ds35xxga_ooblayout_free(struct mtd_info *mtd, int section,
+				   struct mtd_oob_region *region)
+{
+	if (section > 3)
+		return -ERANGE;
+
+	region->offset = (16 * section) + 2;
+	region->length = 6;
+
+	return 0;
+}
+
+static const struct mtd_ooblayout_ops ds35xxga_ooblayout = {
+	.ecc = ds35xxga_ooblayout_ecc,
+	.rfree = ds35xxga_ooblayout_free,
+};
+
+static const struct spinand_info dosilicon_spinand_table[] = {
+	SPINAND_INFO("DS35X1GA", 0x71,
+		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
+		     NAND_ECCREQ(4, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&ds35xxga_ooblayout, NULL)),
+};
+
+/**
+ * dosilicon_spinand_detect - initialize device related part in spinand_device
+ * struct if it is a dosilicon device.
+ * @spinand: SPI NAND device structure
+ */
+static int dosilicon_spinand_detect(struct spinand_device *spinand)
+{
+	u8 *id = spinand->id.data;
+	int ret;
+
+	/*
+	 * dosilicon SPI NAND read ID need a dummy byte,
+	 * so the first byte in raw_id is dummy.
+	 */
+	if (id[1] != SPINAND_MFR_DOSILICON)
+		return 0;
+
+	ret = spinand_match_and_init(spinand, dosilicon_spinand_table,
+				     ARRAY_SIZE(dosilicon_spinand_table), id[2]);
+	if (ret)
+		return ret;
+
+	return 1;
+}
+
+static int dosilicon_spinand_init(struct spinand_device *spinand)
+{
+	return 0;
+}
+
+static const struct spinand_manufacturer_ops dosilicon_spinand_manuf_ops = {
+	.detect = dosilicon_spinand_detect,
+	.init = dosilicon_spinand_init,
+};
+
+const struct spinand_manufacturer dosilicon_spinand_manufacturer = {
+	.id = SPINAND_MFR_DOSILICON,
+	.name = "dosilicon",
+	.ops = &dosilicon_spinand_manuf_ops,
+};
diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
index 83eafb184e..51b68140aa 100644
--- a/include/linux/mtd/spinand.h
+++ b/include/linux/mtd/spinand.h
@@ -206,6 +206,7 @@ extern const struct spinand_manufacturer macronix_spinand_manufacturer;
 extern const struct spinand_manufacturer micron_spinand_manufacturer;
 extern const struct spinand_manufacturer toshiba_spinand_manufacturer;
 extern const struct spinand_manufacturer winbond_spinand_manufacturer;
+extern const struct spinand_manufacturer dosilicon_spinand_manufacturer;
 
 /**
  * struct spinand_op_variants - SPI NAND operation variants

commit f097e4109566af0bc08a7a3919c22b51a21684f2
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Tue Jun 9 10:30:17 2020 +0800

    drm/rockchip: inno-hdmi: Support inno-hdmi
    
    Change-Id: Ib1b98c83de53053858c2cef2d3175cc55f12bdad
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>

diff --git a/drivers/video/drm/Kconfig b/drivers/video/drm/Kconfig
index da0b6bd689..015d0ba0fe 100644
--- a/drivers/video/drm/Kconfig
+++ b/drivers/video/drm/Kconfig
@@ -24,6 +24,14 @@ config DRM_ROCKCHIP_DW_HDMI
 	 for the Synopsys DesignWare HDMI driver. If you want to
 	 enable HDMI on, you should selet this option.
 
+config DRM_ROCKCHIP_INNO_HDMI
+	bool "Rockchip specific extensions for INNO HDMI"
+	depends on DRM_ROCKCHIP
+	help
+	 This selects support for Rockchip SoC specific extensions
+	 for the Synopsys DesignWare HDMI driver. If you want to
+	 enable HDMI on, you should selet this option.
+
 config ROCKCHIP_INNO_HDMI_PHY
 	bool "Rockchip specific extensions for INNO HDMI PHY"
 	depends on DRM_ROCKCHIP
diff --git a/drivers/video/drm/Makefile b/drivers/video/drm/Makefile
index 1ee63fe096..7d704d0e1c 100644
--- a/drivers/video/drm/Makefile
+++ b/drivers/video/drm/Makefile
@@ -11,6 +11,7 @@ obj-$(CONFIG_DRM_MIPI_DSI) += drm_mipi_dsi.o
 obj-$(CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI) += dw_mipi_dsi.o
 obj-$(CONFIG_DRM_ROCKCHIP_DW_HDMI) += rockchip_dw_hdmi.o dw_hdmi.o
 obj-$(CONFIG_ROCKCHIP_INNO_HDMI_PHY) += rockchip-inno-hdmi-phy.o
+obj-$(CONFIG_DRM_ROCKCHIP_INNO_HDMI) += inno_hdmi.o
 obj-$(CONFIG_DRM_ROCKCHIP_INNO_MIPI_PHY) += inno_mipi_phy.o
 obj-$(CONFIG_DRM_ROCKCHIP_INNO_VIDEO_PHY) += inno_video_phy.o
 obj-$(CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY) += inno_video_combo_phy.o
diff --git a/drivers/video/drm/inno_hdmi.c b/drivers/video/drm/inno_hdmi.c
new file mode 100644
index 0000000000..c4f20649ad
--- /dev/null
+++ b/drivers/video/drm/inno_hdmi.c
@@ -0,0 +1,850 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * (C) Copyright 2020 Rockchip Electronics Co., Ltd
+ */
+#include <common.h>
+#include <clk.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <asm/arch-rockchip/clock.h>
+#include <dm/device.h>
+#include <dm/read.h>
+#include <linux/hdmi.h>
+#include <linux/media-bus-format.h>
+
+#include "inno_hdmi.h"
+#include "rockchip_connector.h"
+#include "rockchip_crtc.h"
+#include "rockchip_display.h"
+
+struct inno_hdmi_i2c {
+	u8			slave_reg;
+	u8			ddc_addr;
+	u8			segment_addr;
+	bool			is_regaddr;
+	bool			is_segment;
+
+	unsigned int		scl_high_ns;
+	unsigned int		scl_low_ns;
+};
+
+enum inno_hdmi_dev_type {
+	RK3036_HDMI,
+	RK3128_HDMI,
+};
+
+enum {
+	CSC_ITU601_16_235_TO_RGB_0_255_8BIT,
+	CSC_ITU601_0_255_TO_RGB_0_255_8BIT,
+	CSC_ITU709_16_235_TO_RGB_0_255_8BIT,
+	CSC_RGB_0_255_TO_ITU601_16_235_8BIT,
+	CSC_RGB_0_255_TO_ITU709_16_235_8BIT,
+	CSC_RGB_0_255_TO_RGB_16_235_8BIT,
+};
+
+static const char coeff_csc[][24] = {
+	/*
+	 * YUV2RGB:601 SD mode(Y[16:235], UV[16:240], RGB[0:255]):
+	 *   R = 1.164*Y + 1.596*V - 204
+	 *   G = 1.164*Y - 0.391*U - 0.813*V + 154
+	 *   B = 1.164*Y + 2.018*U - 258
+	 */
+	{
+		0x04, 0xa7, 0x00, 0x00, 0x06, 0x62, 0x02, 0xcc,
+		0x04, 0xa7, 0x11, 0x90, 0x13, 0x40, 0x00, 0x9a,
+		0x04, 0xa7, 0x08, 0x12, 0x00, 0x00, 0x03, 0x02
+	},
+	/*
+	 * YUV2RGB:601 SD mode(YUV[0:255],RGB[0:255]):
+	 *   R = Y + 1.402*V - 248
+	 *   G = Y - 0.344*U - 0.714*V + 135
+	 *   B = Y + 1.772*U - 227
+	 */
+	{
+		0x04, 0x00, 0x00, 0x00, 0x05, 0x9b, 0x02, 0xf8,
+		0x04, 0x00, 0x11, 0x60, 0x12, 0xdb, 0x00, 0x87,
+		0x04, 0x00, 0x07, 0x16, 0x00, 0x00, 0x02, 0xe3
+	},
+	/*
+	 * YUV2RGB:709 HD mode(Y[16:235],UV[16:240],RGB[0:255]):
+	 *   R = 1.164*Y + 1.793*V - 248
+	 *   G = 1.164*Y - 0.213*U - 0.534*V + 77
+	 *   B = 1.164*Y + 2.115*U - 289
+	 */
+	{
+		0x04, 0xa7, 0x00, 0x00, 0x07, 0x2c, 0x02, 0xf8,
+		0x04, 0xa7, 0x10, 0xda, 0x12, 0x22, 0x00, 0x4d,
+		0x04, 0xa7, 0x08, 0x74, 0x00, 0x00, 0x03, 0x21
+	},
+
+	/*
+	 * RGB2YUV:601 SD mode:
+	 *   Cb = -0.291G - 0.148R + 0.439B + 128
+	 *   Y  = 0.504G  + 0.257R + 0.098B + 16
+	 *   Cr = -0.368G + 0.439R - 0.071B + 128
+	 */
+	{
+		0x11, 0x5f, 0x01, 0x82, 0x10, 0x23, 0x00, 0x80,
+		0x02, 0x1c, 0x00, 0xa1, 0x00, 0x36, 0x00, 0x1e,
+		0x11, 0x29, 0x10, 0x59, 0x01, 0x82, 0x00, 0x80
+	},
+	/*
+	 * RGB2YUV:709 HD mode:
+	 *   Cb = - 0.338G - 0.101R + 0.439B + 128
+	 *   Y  = 0.614G   + 0.183R + 0.062B + 16
+	 *   Cr = - 0.399G + 0.439R - 0.040B + 128
+	 */
+	{
+		0x11, 0x98, 0x01, 0xc1, 0x10, 0x28, 0x00, 0x80,
+		0x02, 0x74, 0x00, 0xbb, 0x00, 0x3f, 0x00, 0x10,
+		0x11, 0x5a, 0x10, 0x67, 0x01, 0xc1, 0x00, 0x80
+	},
+	/*
+	 * RGB[0:255]2RGB[16:235]:
+	 *   R' = R x (235-16)/255 + 16;
+	 *   G' = G x (235-16)/255 + 16;
+	 *   B' = B x (235-16)/255 + 16;
+	 */
+	{
+		0x00, 0x00, 0x03, 0x6F, 0x00, 0x00, 0x00, 0x10,
+		0x03, 0x6F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10,
+		0x00, 0x00, 0x00, 0x00, 0x03, 0x6F, 0x00, 0x10
+	},
+};
+
+struct hdmi_data_info {
+	int vic;
+	bool sink_is_hdmi;
+	bool sink_has_audio;
+	unsigned int enc_in_format;
+	unsigned int enc_out_format;
+	unsigned int colorimetry;
+};
+
+struct inno_hdmi_phy_config {
+	unsigned long mpixelclock;
+	u8 pre_emphasis;	/* pre-emphasis value */
+	u8 vlev_ctr;		/* voltage level control */
+};
+
+struct inno_hdmi_plat_data {
+	enum inno_hdmi_dev_type dev_type;
+	struct inno_hdmi_phy_config *phy_config;
+};
+
+struct inno_hdmi {
+	struct device *dev;
+	struct drm_device *drm_dev;
+	struct ddc_adapter adap;
+	struct hdmi_edid_data edid_data;
+	struct hdmi_data_info	hdmi_data;
+
+	struct clk pclk;
+	int vic;
+	void *regs;
+	void *grf;
+
+	struct inno_hdmi_i2c *i2c;
+
+	unsigned int tmds_rate;
+	const struct inno_hdmi_plat_data *plat_data;
+
+	unsigned int sample_rate;
+	unsigned int audio_cts;
+	unsigned int audio_n;
+	bool audio_enable;
+
+	struct drm_display_mode previous_mode;
+};
+
+static struct inno_hdmi_phy_config rk3036_hdmi_phy_config[] = {
+	/* pixelclk pre-emp vlev */
+	{ 74250000,  0x3f, 0xbb },
+	{ 165000000, 0x6f, 0xbb },
+	{ ~0UL,	     0x00, 0x00 }
+};
+
+static struct inno_hdmi_phy_config rk3128_hdmi_phy_config[] = {
+	/* pixelclk pre-emp vlev */
+	{ 74250000,  0x3f, 0xaa },
+	{ 165000000, 0x5f, 0xaa },
+	{ ~0UL,	     0x00, 0x00 }
+};
+
+static void hdmi_writeb(struct inno_hdmi *hdmi, u16 offset, u32 val)
+{
+	writel(val, hdmi->regs + (offset << 2));
+}
+
+static u32 hdmi_readb(struct inno_hdmi *hdmi, u16 offset)
+{
+	return readl(hdmi->regs + (offset << 2));
+}
+
+static void hdmi_modb(struct inno_hdmi *hdmi, u16 offset, u32 msk, u32 val)
+{
+	u32 temp = hdmi_readb(hdmi, offset) & ~msk;
+
+	temp |= val & msk;
+	hdmi_writeb(hdmi, offset, temp);
+}
+
+static void inno_hdmi_sys_power(struct inno_hdmi *hdmi, bool enable)
+{
+	if (enable)
+		hdmi_modb(hdmi, HDMI_SYS_CTRL, m_POWER, v_PWR_ON);
+	else
+		hdmi_modb(hdmi, HDMI_SYS_CTRL, m_POWER, v_PWR_OFF);
+}
+
+static void inno_hdmi_set_pwr_mode(struct inno_hdmi *hdmi, int mode)
+{
+	const struct inno_hdmi_phy_config *phy_config =
+						hdmi->plat_data->phy_config;
+
+	switch (mode) {
+	case NORMAL:
+		inno_hdmi_sys_power(hdmi, false);
+		for (; phy_config->mpixelclock != ~0UL; phy_config++)
+			if (hdmi->tmds_rate <= phy_config->mpixelclock)
+				break;
+		if (!phy_config->mpixelclock)
+			return;
+		hdmi_writeb(hdmi, HDMI_PHY_PRE_EMPHASIS,
+			    phy_config->pre_emphasis);
+		hdmi_writeb(hdmi, HDMI_PHY_DRIVER, phy_config->vlev_ctr);
+
+		hdmi_writeb(hdmi, HDMI_PHY_SYS_CTL, 0x15);
+		hdmi_writeb(hdmi, HDMI_PHY_SYS_CTL, 0x14);
+		hdmi_writeb(hdmi, HDMI_PHY_SYS_CTL, 0x10);
+
+		hdmi_writeb(hdmi, HDMI_PHY_CHG_PWR, 0x0f);
+		hdmi_writeb(hdmi, HDMI_PHY_SYNC, 0x00);
+		hdmi_writeb(hdmi, HDMI_PHY_SYNC, 0x01);
+		inno_hdmi_sys_power(hdmi, true);
+
+		break;
+
+	case LOWER_PWR:
+		inno_hdmi_sys_power(hdmi, false);
+		hdmi_writeb(hdmi, HDMI_PHY_DRIVER, 0x00);
+		hdmi_writeb(hdmi, HDMI_PHY_PRE_EMPHASIS, 0x00);
+		hdmi_writeb(hdmi, HDMI_PHY_CHG_PWR, 0x00);
+		hdmi_writeb(hdmi, HDMI_PHY_SYS_CTL, 0x15);
+
+		break;
+
+	default:
+		dev_err(hdmi->dev, "Unknown power mode %d\n", mode);
+	}
+}
+
+static void inno_hdmi_i2c_init(struct inno_hdmi *hdmi)
+{
+	int ddc_bus_freq;
+
+	ddc_bus_freq = (hdmi->tmds_rate >> 2) / HDMI_SCL_RATE;
+	hdmi_writeb(hdmi, DDC_BUS_FREQ_L, ddc_bus_freq & 0xFF);
+	hdmi_writeb(hdmi, DDC_BUS_FREQ_H, (ddc_bus_freq >> 8) & 0xFF);
+
+	/* Clear the EDID interrupt flag and mute the interrupt */
+	hdmi_writeb(hdmi, HDMI_INTERRUPT_MASK1, 0);
+	hdmi_writeb(hdmi, HDMI_INTERRUPT_STATUS1, m_INT_EDID_READY);
+}
+
+static void inno_hdmi_reset(struct inno_hdmi *hdmi)
+{
+	u32 val;
+	u32 msk;
+
+	hdmi_modb(hdmi, HDMI_SYS_CTRL, m_RST_DIGITAL, v_NOT_RST_DIGITAL);
+	udelay(100);
+
+	hdmi_modb(hdmi, HDMI_SYS_CTRL, m_RST_ANALOG, v_NOT_RST_ANALOG);
+	udelay(100);
+
+	msk = m_REG_CLK_INV | m_REG_CLK_SOURCE | m_POWER | m_INT_POL;
+	val = v_REG_CLK_INV | v_REG_CLK_SOURCE_SYS | v_PWR_ON | v_INT_POL_HIGH;
+
+	hdmi_modb(hdmi, HDMI_SYS_CTRL, msk, val);
+
+	inno_hdmi_set_pwr_mode(hdmi, NORMAL);
+}
+
+static int inno_hdmi_upload_frame(struct inno_hdmi *hdmi, int setup_rc,
+				  union hdmi_infoframe *frame, u32 frame_index,
+				  u32 mask, u32 disable, u32 enable)
+{
+	if (mask)
+		hdmi_modb(hdmi, HDMI_PACKET_SEND_AUTO, mask, disable);
+
+	hdmi_writeb(hdmi, HDMI_CONTROL_PACKET_BUF_INDEX, frame_index);
+
+	if (setup_rc >= 0) {
+		u8 packed_frame[HDMI_MAXIMUM_INFO_FRAME_SIZE];
+		ssize_t rc, i;
+
+		rc = hdmi_infoframe_pack(frame, packed_frame,
+					 sizeof(packed_frame));
+		if (rc < 0)
+			return rc;
+
+		for (i = 0; i < rc; i++)
+			hdmi_writeb(hdmi, HDMI_CONTROL_PACKET_ADDR + i,
+				    packed_frame[i]);
+
+		if (mask)
+			hdmi_modb(hdmi, HDMI_PACKET_SEND_AUTO, mask, enable);
+	}
+
+	return setup_rc;
+}
+
+static int inno_hdmi_config_video_vsi(struct inno_hdmi *hdmi,
+				      struct drm_display_mode *mode)
+{
+	union hdmi_infoframe frame;
+	int rc;
+
+	rc = drm_hdmi_vendor_infoframe_from_display_mode(&frame.vendor.hdmi,
+							 mode);
+
+	return inno_hdmi_upload_frame(hdmi, rc, &frame, INFOFRAME_VSI,
+		m_PACKET_VSI_EN, v_PACKET_VSI_EN(0), v_PACKET_VSI_EN(1));
+}
+
+static int inno_hdmi_config_video_avi(struct inno_hdmi *hdmi,
+				      struct drm_display_mode *mode)
+{
+	union hdmi_infoframe frame;
+	int rc;
+
+	rc = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi, mode, false);
+
+	if (hdmi->hdmi_data.enc_out_format == HDMI_COLORSPACE_YUV444)
+		frame.avi.colorspace = HDMI_COLORSPACE_YUV444;
+	else if (hdmi->hdmi_data.enc_out_format == HDMI_COLORSPACE_YUV422)
+		frame.avi.colorspace = HDMI_COLORSPACE_YUV422;
+	else
+		frame.avi.colorspace = HDMI_COLORSPACE_RGB;
+
+	if (frame.avi.colorspace != HDMI_COLORSPACE_RGB)
+		frame.avi.colorimetry = hdmi->hdmi_data.colorimetry;
+
+	frame.avi.scan_mode = HDMI_SCAN_MODE_NONE;
+
+	return inno_hdmi_upload_frame(hdmi, rc, &frame, INFOFRAME_AVI, 0, 0, 0);
+}
+
+static int inno_hdmi_config_video_csc(struct inno_hdmi *hdmi)
+{
+	struct hdmi_data_info *data = &hdmi->hdmi_data;
+	int c0_c2_change = 0;
+	int csc_enable = 0;
+	int csc_mode = 0;
+	int auto_csc = 0;
+	int value;
+	int i;
+
+	/* Input video mode is SDR RGB24bit, data enable signal from external */
+	hdmi_writeb(hdmi, HDMI_VIDEO_CONTRL1, v_DE_EXTERNAL |
+		    v_VIDEO_INPUT_FORMAT(VIDEO_INPUT_SDR_RGB444));
+
+	/* Input color hardcode to RGB, and output color hardcode to RGB888 */
+	value = v_VIDEO_INPUT_BITS(VIDEO_INPUT_8BITS) |
+		v_VIDEO_OUTPUT_COLOR(0) |
+		v_VIDEO_INPUT_CSP(0);
+	hdmi_writeb(hdmi, HDMI_VIDEO_CONTRL2, value);
+
+	if (data->enc_in_format == data->enc_out_format) {
+		if (data->enc_in_format == HDMI_COLORSPACE_RGB ||
+		    data->enc_in_format >= HDMI_COLORSPACE_YUV444) {
+			value = v_SOF_DISABLE | v_COLOR_DEPTH_NOT_INDICATED(1);
+			hdmi_writeb(hdmi, HDMI_VIDEO_CONTRL3, value);
+
+			hdmi_modb(hdmi, HDMI_VIDEO_CONTRL,
+				  m_VIDEO_AUTO_CSC | m_VIDEO_C0_C2_SWAP,
+				  v_VIDEO_AUTO_CSC(AUTO_CSC_DISABLE) |
+				  v_VIDEO_C0_C2_SWAP(C0_C2_CHANGE_DISABLE));
+			return 0;
+		}
+	}
+
+	if (data->colorimetry == HDMI_COLORIMETRY_ITU_601) {
+		if (data->enc_in_format == HDMI_COLORSPACE_RGB &&
+		    data->enc_out_format == HDMI_COLORSPACE_YUV444) {
+			csc_mode = CSC_RGB_0_255_TO_ITU601_16_235_8BIT;
+			auto_csc = AUTO_CSC_DISABLE;
+			c0_c2_change = C0_C2_CHANGE_DISABLE;
+			csc_enable = v_CSC_ENABLE;
+		} else if ((data->enc_in_format == HDMI_COLORSPACE_YUV444) &&
+			   (data->enc_out_format == HDMI_COLORSPACE_RGB)) {
+			csc_mode = CSC_ITU601_16_235_TO_RGB_0_255_8BIT;
+			auto_csc = AUTO_CSC_ENABLE;
+			c0_c2_change = C0_C2_CHANGE_DISABLE;
+			csc_enable = v_CSC_DISABLE;
+		}
+	} else {
+		if (data->enc_in_format == HDMI_COLORSPACE_RGB &&
+		    data->enc_out_format == HDMI_COLORSPACE_YUV444) {
+			csc_mode = CSC_RGB_0_255_TO_ITU709_16_235_8BIT;
+			auto_csc = AUTO_CSC_DISABLE;
+			c0_c2_change = C0_C2_CHANGE_DISABLE;
+			csc_enable = v_CSC_ENABLE;
+		} else if ((data->enc_in_format == HDMI_COLORSPACE_YUV444) &&
+			   (data->enc_out_format == HDMI_COLORSPACE_RGB)) {
+			csc_mode = CSC_ITU709_16_235_TO_RGB_0_255_8BIT;
+			auto_csc = AUTO_CSC_ENABLE;
+			c0_c2_change = C0_C2_CHANGE_DISABLE;
+			csc_enable = v_CSC_DISABLE;
+		}
+	}
+
+	for (i = 0; i < 24; i++)
+		hdmi_writeb(hdmi, HDMI_VIDEO_CSC_COEF + i,
+			    coeff_csc[csc_mode][i]);
+
+	value = v_SOF_DISABLE | csc_enable | v_COLOR_DEPTH_NOT_INDICATED(1);
+	hdmi_writeb(hdmi, HDMI_VIDEO_CONTRL3, value);
+	hdmi_modb(hdmi, HDMI_VIDEO_CONTRL, m_VIDEO_AUTO_CSC |
+		  m_VIDEO_C0_C2_SWAP, v_VIDEO_AUTO_CSC(auto_csc) |
+		  v_VIDEO_C0_C2_SWAP(c0_c2_change));
+
+	return 0;
+}
+
+static int inno_hdmi_config_video_timing(struct inno_hdmi *hdmi,
+					 struct drm_display_mode *mode)
+{
+	int value;
+
+	if (hdmi->plat_data->dev_type == RK3036_HDMI) {
+		value = BIT(20) | BIT(21);
+		value |= mode->flags & DRM_MODE_FLAG_PHSYNC ? BIT(4) : 0;
+		value |= mode->flags & DRM_MODE_FLAG_PVSYNC ? BIT(5) : 0;
+		writel(value, hdmi->grf + 0x148);
+	}
+	/* Set detail external video timing polarity and interlace mode */
+	value = v_EXTERANL_VIDEO(1);
+	value |= mode->flags & DRM_MODE_FLAG_PHSYNC ?
+		 v_HSYNC_POLARITY(1) : v_HSYNC_POLARITY(0);
+	value |= mode->flags & DRM_MODE_FLAG_PVSYNC ?
+		 v_VSYNC_POLARITY(1) : v_VSYNC_POLARITY(0);
+	value |= mode->flags & DRM_MODE_FLAG_INTERLACE ?
+		 v_INETLACE(1) : v_INETLACE(0);
+	hdmi_writeb(hdmi, HDMI_VIDEO_TIMING_CTL, value);
+
+	/* Set detail external video timing */
+	value = mode->htotal;
+	hdmi_writeb(hdmi, HDMI_VIDEO_EXT_HTOTAL_L, value & 0xFF);
+	hdmi_writeb(hdmi, HDMI_VIDEO_EXT_HTOTAL_H, (value >> 8) & 0xFF);
+
+	value = mode->htotal - mode->hdisplay;
+	hdmi_writeb(hdmi, HDMI_VIDEO_EXT_HBLANK_L, value & 0xFF);
+	hdmi_writeb(hdmi, HDMI_VIDEO_EXT_HBLANK_H, (value >> 8) & 0xFF);
+
+	value = mode->htotal - mode->hsync_start;
+	hdmi_writeb(hdmi, HDMI_VIDEO_EXT_HDELAY_L, value & 0xFF);
+	hdmi_writeb(hdmi, HDMI_VIDEO_EXT_HDELAY_H, (value >> 8) & 0xFF);
+
+	value = mode->hsync_end - mode->hsync_start;
+	hdmi_writeb(hdmi, HDMI_VIDEO_EXT_HDURATION_L, value & 0xFF);
+	hdmi_writeb(hdmi, HDMI_VIDEO_EXT_HDURATION_H, (value >> 8) & 0xFF);
+
+	value = mode->vtotal;
+	hdmi_writeb(hdmi, HDMI_VIDEO_EXT_VTOTAL_L, value & 0xFF);
+	hdmi_writeb(hdmi, HDMI_VIDEO_EXT_VTOTAL_H, (value >> 8) & 0xFF);
+
+	value = mode->vtotal - mode->vdisplay;
+	hdmi_writeb(hdmi, HDMI_VIDEO_EXT_VBLANK, value & 0xFF);
+
+	value = mode->vtotal - mode->vsync_start;
+	hdmi_writeb(hdmi, HDMI_VIDEO_EXT_VDELAY, value & 0xFF);
+
+	value = mode->vsync_end - mode->vsync_start;
+	hdmi_writeb(hdmi, HDMI_VIDEO_EXT_VDURATION, value & 0xFF);
+
+	hdmi_writeb(hdmi, HDMI_PHY_PRE_DIV_RATIO, 0x1e);
+	hdmi_writeb(hdmi, HDMI_PHY_FEEDBACK_DIV_RATIO_LOW, 0x2c);
+	hdmi_writeb(hdmi, HDMI_PHY_FEEDBACK_DIV_RATIO_HIGH, 0x01);
+
+	return 0;
+}
+
+static int inno_hdmi_setup(struct inno_hdmi *hdmi,
+			   struct drm_display_mode *mode)
+{
+	hdmi->hdmi_data.vic = drm_match_cea_mode(mode);
+
+	hdmi->hdmi_data.enc_in_format = HDMI_COLORSPACE_RGB;
+	hdmi->hdmi_data.enc_out_format = HDMI_COLORSPACE_RGB;
+
+	if (hdmi->hdmi_data.vic == 6 || hdmi->hdmi_data.vic == 7 ||
+	    hdmi->hdmi_data.vic == 21 || hdmi->hdmi_data.vic == 22 ||
+	    hdmi->hdmi_data.vic == 2 || hdmi->hdmi_data.vic == 3 ||
+	    hdmi->hdmi_data.vic == 17 || hdmi->hdmi_data.vic == 18)
+		hdmi->hdmi_data.colorimetry = HDMI_COLORIMETRY_ITU_601;
+	else
+		hdmi->hdmi_data.colorimetry = HDMI_COLORIMETRY_ITU_709;
+
+	/* Mute video and audio output */
+	hdmi_modb(hdmi, HDMI_AV_MUTE, m_AUDIO_MUTE | m_VIDEO_BLACK,
+		  v_AUDIO_MUTE(1) | v_VIDEO_MUTE(1));
+
+	/* Set HDMI Mode */
+	hdmi_writeb(hdmi, HDMI_HDCP_CTRL,
+		    v_HDMI_DVI(hdmi->hdmi_data.sink_is_hdmi));
+
+	inno_hdmi_config_video_timing(hdmi, mode);
+
+	inno_hdmi_config_video_csc(hdmi);
+
+	if (hdmi->hdmi_data.sink_is_hdmi) {
+		inno_hdmi_config_video_avi(hdmi, mode);
+		inno_hdmi_config_video_vsi(hdmi, mode);
+	}
+
+	/*
+	 * When IP controller have configured to an accurate video
+	 * timing, then the TMDS clock source would be switched to
+	 * DCLK_LCDC, so we need to init the TMDS rate to mode pixel
+	 * clock rate, and reconfigure the DDC clock.
+	 */
+	hdmi->tmds_rate = mode->clock * 1000;
+	inno_hdmi_i2c_init(hdmi);
+	/* Unmute video and audio output */
+	hdmi_modb(hdmi, HDMI_AV_MUTE, m_VIDEO_BLACK, v_VIDEO_MUTE(0));
+	if (hdmi->audio_enable)
+		hdmi_modb(hdmi, HDMI_AV_MUTE, m_AUDIO_MUTE, v_AUDIO_MUTE(0));
+
+	return 0;
+}
+
+static int inno_hdmi_i2c_read(struct inno_hdmi *hdmi,
+			      struct i2c_msg *msgs)
+{
+	struct inno_hdmi_i2c *i2c = hdmi->i2c;
+	unsigned int length = msgs->len;
+	unsigned char *buf = msgs->buf;
+	int interrupt = 0, i = 20;
+
+	while (i--) {
+		mdelay(50);
+		interrupt = 0;
+		interrupt = hdmi_readb(hdmi, HDMI_INTERRUPT_STATUS1);
+
+		if (interrupt & m_INT_EDID_READY)
+			break;
+	}
+
+	if (!interrupt) {
+		printf("[%s] i2c read reg[0x%02x] no interrupt\n",
+		       __func__, i2c->slave_reg);
+		return -EAGAIN;
+	}
+
+	/* Clear HDMI EDID interrupt flag */
+	hdmi_writeb(hdmi, HDMI_INTERRUPT_STATUS1, m_INT_EDID_READY);
+
+	while (length--)
+		*buf++ = hdmi_readb(hdmi, HDMI_EDID_FIFO_ADDR);
+
+	return 0;
+}
+
+static int inno_hdmi_i2c_write(struct inno_hdmi *hdmi,
+			       struct i2c_msg *msgs)
+{
+	unsigned int length = msgs->len;
+
+	hdmi->i2c->segment_addr = 0;
+	hdmi->i2c->ddc_addr = 0;
+
+	/*
+	 * The DDC module only support read EDID message, so
+	 * we assume that each word write to this i2c adapter
+	 * should be the offset of EDID word address.
+	 */
+	if (length != 1 ||
+	    (msgs->addr != DDC_ADDR && msgs->addr != DDC_SEGMENT_ADDR)) {
+		printf("DDC word write to i2c adapter is not EDID address\n");
+		return -EINVAL;
+	}
+
+	if (msgs->addr == DDC_SEGMENT_ADDR)
+		hdmi->i2c->segment_addr = msgs->buf[0];
+	if (msgs->addr == DDC_ADDR)
+		hdmi->i2c->ddc_addr = msgs->buf[0];
+
+	/* Set edid fifo first addr */
+	hdmi_writeb(hdmi, HDMI_EDID_FIFO_OFFSET, 0x00);
+
+	/* Set edid word address 0x00/0x80 */
+	hdmi_writeb(hdmi, HDMI_EDID_WORD_ADDR, hdmi->i2c->ddc_addr);
+
+	/* Set edid segment pointer */
+	hdmi_writeb(hdmi, HDMI_EDID_SEGMENT_POINTER, hdmi->i2c->segment_addr);
+
+	return 0;
+}
+
+static int inno_hdmi_i2c_xfer(struct ddc_adapter *adap,
+			      struct i2c_msg *msgs, int num)
+{
+	struct inno_hdmi *hdmi = container_of(adap, struct inno_hdmi, adap);
+	int i, ret = 0;
+
+	/* Clear the EDID interrupt flag and unmute the interrupt */
+	hdmi_writeb(hdmi, HDMI_INTERRUPT_MASK1, m_INT_EDID_READY);
+	hdmi_writeb(hdmi, HDMI_INTERRUPT_STATUS1, m_INT_EDID_READY);
+
+	for (i = 0; i < num; i++) {
+		dev_dbg(hdmi->dev, "xfer: num: %d/%d, len: %d, flags: %#x\n",
+			i + 1, num, msgs[i].len, msgs[i].flags);
+
+		if (msgs[i].flags & I2C_M_RD)
+			ret = inno_hdmi_i2c_read(hdmi, &msgs[i]);
+		else
+			ret = inno_hdmi_i2c_write(hdmi, &msgs[i]);
+
+		if (ret < 0)
+			break;
+	}
+
+	if (!ret)
+		ret = num;
+
+	/* Mute HDMI EDID interrupt */
+	hdmi_writeb(hdmi, HDMI_INTERRUPT_MASK1, 0);
+
+	return ret;
+}
+
+static int rockchip_inno_hdmi_init(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	const struct rockchip_connector *connector = conn_state->connector;
+	struct inno_hdmi *hdmi;
+	struct drm_display_mode *mode_buf;
+	ofnode hdmi_node = conn_state->node;
+	int ret;
+
+	hdmi = calloc(1, sizeof(struct inno_hdmi));
+	if (!hdmi)
+		return -ENOMEM;
+
+	mode_buf = calloc(1, MODE_LEN * sizeof(struct drm_display_mode));
+	if (!mode_buf)
+		return -ENOMEM;
+
+	hdmi->regs = dev_read_addr_ptr(conn_state->dev);
+
+	hdmi->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	if (hdmi->grf <= 0) {
+		printf("%s: Get syscon grf failed (ret=%p)\n",
+		       __func__, hdmi->grf);
+		return -ENXIO;
+	}
+
+	hdmi->i2c = malloc(sizeof(struct inno_hdmi_i2c));
+	if (!hdmi->i2c)
+		return -ENOMEM;
+
+	hdmi->adap.ddc_xfer = inno_hdmi_i2c_xfer;
+
+	/*
+	 * Read high and low time from device tree. If not available use
+	 * the default timing scl clock rate is about 99.6KHz.
+	 */
+	hdmi->i2c->scl_high_ns =
+		ofnode_read_s32_default(hdmi_node,
+					"ddc-i2c-scl-high-time-ns", 4708);
+	hdmi->i2c->scl_low_ns =
+		ofnode_read_s32_default(hdmi_node,
+					"ddc-i2c-scl-low-time-ns", 4916);
+
+	conn_state->type = DRM_MODE_CONNECTOR_HDMIA;
+	conn_state->output_mode = ROCKCHIP_OUT_MODE_AAAA;
+
+	hdmi->plat_data = (struct inno_hdmi_plat_data *)connector->data;
+	hdmi->edid_data.mode_buf = mode_buf;
+	hdmi->sample_rate = 48000;
+
+	conn_state->private = hdmi;
+
+	inno_hdmi_reset(hdmi);
+	ret = clk_get_by_name(conn_state->dev, "pclk", &hdmi->pclk);
+	if (ret < 0) {
+		dev_err(hdmi->dev, "failed to get pclk: %d\n", ret);
+		return ret;
+	}
+	hdmi->tmds_rate = clk_get_rate(&hdmi->pclk);
+	inno_hdmi_i2c_init(hdmi);
+
+	/* Unmute hotplug interrupt */
+	hdmi_modb(hdmi, HDMI_STATUS, m_MASK_INT_HOTPLUG, v_MASK_INT_HOTPLUG(1));
+
+	return 0;
+}
+
+static int rockchip_inno_hdmi_enable(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct drm_display_mode *mode = &conn_state->mode;
+	struct inno_hdmi *hdmi = conn_state->private;
+
+	if (!hdmi)
+		return -EFAULT;
+
+	/* Store the display mode for plugin/DKMS poweron events */
+	memcpy(&hdmi->previous_mode, mode, sizeof(hdmi->previous_mode));
+
+	inno_hdmi_setup(hdmi, mode);
+	inno_hdmi_set_pwr_mode(hdmi, NORMAL);
+
+	return 0;
+}
+
+static void rockchip_inno_hdmi_deinit(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct inno_hdmi *hdmi = conn_state->private;
+
+	if (hdmi->i2c)
+		free(hdmi->i2c);
+	if (hdmi)
+		free(hdmi);
+}
+
+static int rockchip_inno_hdmi_prepare(struct display_state *state)
+{
+	return 0;
+}
+
+static int rockchip_inno_hdmi_disable(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct inno_hdmi *hdmi = conn_state->private;
+
+	inno_hdmi_set_pwr_mode(hdmi, LOWER_PWR);
+	return 0;
+}
+
+static int rockchip_inno_hdmi_detect(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct inno_hdmi *hdmi = conn_state->private;
+
+	return (hdmi_readb(hdmi, HDMI_STATUS) & m_HOTPLUG) ?
+		connector_status_connected : connector_status_disconnected;
+}
+
+static int rockchip_inno_hdmi_get_timing(struct display_state *state)
+{
+	int  i, ret;
+	struct connector_state *conn_state = &state->conn_state;
+	struct drm_display_mode *mode = &conn_state->mode;
+	struct inno_hdmi *hdmi = conn_state->private;
+	struct edid *edid = (struct edid *)conn_state->edid;
+	const u8 def_modes_vic[6] = {16, 4, 2, 17, 31, 19};
+
+	if (!hdmi)
+		return -EFAULT;
+
+	ret = drm_do_get_edid(&hdmi->adap, conn_state->edid);
+	if (!ret) {
+		hdmi->hdmi_data.sink_is_hdmi =
+			drm_detect_hdmi_monitor(edid);
+		hdmi->hdmi_data.sink_has_audio = drm_detect_monitor_audio(edid);
+		ret = drm_add_edid_modes(&hdmi->edid_data, conn_state->edid);
+	}
+	if (ret <= 0) {
+		hdmi->hdmi_data.sink_is_hdmi = true;
+		hdmi->hdmi_data.sink_has_audio = true;
+		do_cea_modes(&hdmi->edid_data, def_modes_vic,
+			     sizeof(def_modes_vic));
+		hdmi->edid_data.preferred_mode = &hdmi->edid_data.mode_buf[0];
+		printf("failed to get edid\n");
+	}
+	drm_rk_filter_whitelist(&hdmi->edid_data);
+
+	if (!drm_mode_prune_invalid(&hdmi->edid_data)) {
+		printf("can't find valid hdmi mode\n");
+		return -EINVAL;
+	}
+
+	for (i = 0; i < hdmi->edid_data.modes; i++)
+		hdmi->edid_data.mode_buf[i].vrefresh =
+			drm_mode_vrefresh(&hdmi->edid_data.mode_buf[i]);
+
+	drm_mode_sort(&hdmi->edid_data);
+
+	*mode = *hdmi->edid_data.preferred_mode;
+	hdmi->vic = drm_match_cea_mode(mode);
+
+	printf("mode:%dx%d\n", mode->hdisplay, mode->vdisplay);
+
+	conn_state->bus_format = MEDIA_BUS_FMT_RGB888_1X24;
+
+	return 0;
+}
+
+static int rockchip_inno_hdmi_probe(struct udevice *dev)
+{
+	return 0;
+}
+
+static int rockchip_inno_hdmi_bind(struct udevice *dev)
+{
+	return 0;
+}
+
+const struct rockchip_connector_funcs rockchip_inno_hdmi_funcs = {
+	.init = rockchip_inno_hdmi_init,
+	.deinit = rockchip_inno_hdmi_deinit,
+	.prepare = rockchip_inno_hdmi_prepare,
+	.enable = rockchip_inno_hdmi_enable,
+	.disable = rockchip_inno_hdmi_disable,
+	.get_timing = rockchip_inno_hdmi_get_timing,
+	.detect = rockchip_inno_hdmi_detect,
+};
+
+static const struct inno_hdmi_plat_data rk3036_hdmi_drv_data = {
+	.dev_type   = RK3036_HDMI,
+	.phy_config = rk3036_hdmi_phy_config,
+};
+
+static const struct inno_hdmi_plat_data rk3128_hdmi_drv_data = {
+	.dev_type   = RK3128_HDMI,
+	.phy_config = rk3128_hdmi_phy_config,
+};
+
+static const struct rockchip_connector rk3036_inno_hdmi_data = {
+	.funcs = &rockchip_inno_hdmi_funcs,
+	.data = &rk3036_hdmi_drv_data,
+};
+
+static const struct rockchip_connector rk3128_inno_hdmi_data = {
+	.funcs = &rockchip_inno_hdmi_funcs,
+	.data = &rk3128_hdmi_drv_data,
+};
+
+static const struct udevice_id rockchip_inno_hdmi_ids[] = {
+	{
+	 .compatible = "rockchip,rk3036-inno-hdmi",
+	 .data = (ulong)&rk3036_inno_hdmi_data,
+	},
+	{
+	 .compatible = "rockchip,rk3128-inno-hdmi",
+	 .data = (ulong)&rk3128_inno_hdmi_data,
+	}, {}
+
+};
+
+U_BOOT_DRIVER(rockchip_inno_hdmi) = {
+	.name = "rockchip_inno_hdmi",
+	.id = UCLASS_DISPLAY,
+	.of_match = rockchip_inno_hdmi_ids,
+	.probe	= rockchip_inno_hdmi_probe,
+	.bind	= rockchip_inno_hdmi_bind,
+};
diff --git a/drivers/video/drm/inno_hdmi.h b/drivers/video/drm/inno_hdmi.h
new file mode 100644
index 0000000000..1e65bea57c
--- /dev/null
+++ b/drivers/video/drm/inno_hdmi.h
@@ -0,0 +1,381 @@
+/*
+ * SPDX-Licexse-Idextifier: GPL-2.0
+ * Copyright (C) Rockchip Electroxics Co.Ltd
+ *    Zhexg Yaxg <zhexgyaxg@rock-chips.com>
+ *    Yakir Yaxg <ykk@rock-chips.com>
+ *
+ * This software is licexsed uxder the terms of the GNU Gexeral Public
+ * Licexse versiox 2, as published by the Free Software Fouxdatiox, axd
+ * may be copied, distributed, axd modified uxder those terms.
+ *
+ * This program is distributed ix the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without evex the implied warraxty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Gexeral Public Licexse for more details.
+ */
+
+#ifndef __INNO_HDMI_H__
+#define __INNO_HDMI_H__
+
+#define DDC_SEGMENT_ADDR		0x30
+
+enum PWR_MODE {
+	NORMAL,
+	LOWER_PWR,
+};
+
+#define HDMI_SCL_RATE			(100 * 1000)
+#define DDC_BUS_FREQ_L			0x4b
+#define DDC_BUS_FREQ_H			0x4c
+
+#define HDMI_SYS_CTRL			0x00
+#define m_RST_ANALOG			BIT(6)
+#define v_RST_ANALOG			(0 << 6)
+#define v_NOT_RST_ANALOG		BIT(6)
+#define m_RST_DIGITAL			BIT(5)
+#define v_RST_DIGITAL			(0 << 5)
+#define v_NOT_RST_DIGITAL		BIT(5)
+#define m_REG_CLK_INV			BIT(4)
+#define v_REG_CLK_NOT_INV		(0 << 4)
+#define v_REG_CLK_INV			BIT(4)
+#define m_VCLK_INV			BIT(3)
+#define v_VCLK_NOT_INV			(0 << 3)
+#define v_VCLK_INV			BIT(3)
+#define m_REG_CLK_SOURCE		BIT(2)
+#define v_REG_CLK_SOURCE_TMDS		(0 << 2)
+#define v_REG_CLK_SOURCE_SYS		BIT(2)
+#define m_POWER				BIT(1)
+#define v_PWR_ON			(0 << 1)
+#define v_PWR_OFF			BIT(1)
+#define m_INT_POL			BIT(0)
+#define v_INT_POL_HIGH			1
+#define v_INT_POL_LOW			0
+
+#define HDMI_VIDEO_CONTRL1		0x01
+#define m_VIDEO_INPUT_FORMAT		(7 << 1)
+#define m_DE_SOURCE			BIT(0)
+#define v_VIDEO_INPUT_FORMAT(x)		((x) << 1)
+#define v_DE_EXTERNAL			1
+#define v_DE_INTERNAL			0
+enum {
+	VIDEO_INPUT_SDR_RGB444 = 0,
+	VIDEO_INPUT_DDR_RGB444 = 5,
+	VIDEO_INPUT_DDR_YCBCR422 = 6
+};
+
+#define HDMI_VIDEO_CONTRL2		0x02
+#define m_VIDEO_OUTPUT_COLOR		(3 << 6)
+#define m_VIDEO_INPUT_BITS		(3 << 4)
+#define m_VIDEO_INPUT_CSP		BIT(0)
+#define v_VIDEO_OUTPUT_COLOR(x)		(((x) & 0x3) << 6)
+#define v_VIDEO_INPUT_BITS(x)		((x) << 4)
+#define v_VIDEO_INPUT_CSP(x)		((x) << 0)
+enum {
+	VIDEO_INPUT_12BITS = 0,
+	VIDEO_INPUT_10BITS = 1,
+	VIDEO_INPUT_REVERT = 2,
+	VIDEO_INPUT_8BITS = 3,
+};
+
+#define HDMI_VIDEO_CONTRL		0x03
+#define m_VIDEO_AUTO_CSC		BIT(7)
+#define v_VIDEO_AUTO_CSC(x)		((x) << 7)
+#define m_VIDEO_C0_C2_SWAP		BIT(0)
+#define v_VIDEO_C0_C2_SWAP(x)		((x) << 0)
+enum {
+	C0_C2_CHANGE_ENABLE = 0,
+	C0_C2_CHANGE_DISABLE = 1,
+	AUTO_CSC_DISABLE = 0,
+	AUTO_CSC_ENABLE = 1,
+};
+
+#define HDMI_VIDEO_CONTRL3		0x04
+#define m_COLOR_DEPTH_NOT_INDICATED	BIT(4)
+#define m_SOF				BIT(3)
+#define m_COLOR_RANGE			BIT(2)
+#define m_CSC				BIT(0)
+#define v_COLOR_DEPTH_NOT_INDICATED(x)	((x) << 4)
+#define v_SOF_ENABLE			(0 << 3)
+#define v_SOF_DISABLE			BIT(3)
+#define v_COLOR_RANGE_FULL		BIT(2)
+#define v_COLOR_RANGE_LIMITED		(0 << 2)
+#define v_CSC_ENABLE			1
+#define v_CSC_DISABLE			0
+
+#define HDMI_AV_MUTE			0x05
+#define m_AVMUTE_CLEAR			BIT(7)
+#define m_AVMUTE_ENABLE			BIT(6)
+#define m_AUDIO_PD			BIT(2)
+#define m_AUDIO_MUTE			BIT(1)
+#define m_VIDEO_BLACK			BIT(0)
+#define v_AVMUTE_CLEAR(x)		((x) << 7)
+#define v_AVMUTE_ENABLE(x)		((x) << 6)
+#define v_AUDIO_MUTE(x)			((x) << 1)
+#define v_AUDIO_PD(x)			((x) << 2)
+#define v_VIDEO_MUTE(x)			((x) << 0)
+
+#define HDMI_VIDEO_TIMING_CTL		0x08
+#define v_HSYNC_POLARITY(x)		((x) << 3)
+#define v_VSYNC_POLARITY(x)		((x) << 2)
+#define v_INETLACE(x)			((x) << 1)
+#define v_EXTERANL_VIDEO(x)		((x) << 0)
+
+#define HDMI_VIDEO_EXT_HTOTAL_L		0x09
+#define HDMI_VIDEO_EXT_HTOTAL_H		0x0a
+#define HDMI_VIDEO_EXT_HBLANK_L		0x0b
+#define HDMI_VIDEO_EXT_HBLANK_H		0x0c
+#define HDMI_VIDEO_EXT_HDELAY_L		0x0d
+#define HDMI_VIDEO_EXT_HDELAY_H		0x0e
+#define HDMI_VIDEO_EXT_HDURATION_L	0x0f
+#define HDMI_VIDEO_EXT_HDURATION_H	0x10
+#define HDMI_VIDEO_EXT_VTOTAL_L		0x11
+#define HDMI_VIDEO_EXT_VTOTAL_H		0x12
+#define HDMI_VIDEO_EXT_VBLANK		0x13
+#define HDMI_VIDEO_EXT_VDELAY		0x14
+#define HDMI_VIDEO_EXT_VDURATION	0x15
+
+#define HDMI_VIDEO_CSC_COEF		0x18
+
+#define HDMI_AUDIO_CTRL1		0x35
+enum {
+	CTS_SOURCE_INTERNAL = 0,
+	CTS_SOURCE_EXTERNAL = 1,
+};
+
+#define v_CTS_SOURCE(x)			((x) << 7)
+
+enum {
+	DOWNSAMPLE_DISABLE = 0,
+	DOWNSAMPLE_1_2 = 1,
+	DOWNSAMPLE_1_4 = 2,
+};
+
+#define v_DOWN_SAMPLE(x)		((x) << 5)
+
+enum {
+	AUDIO_SOURCE_IIS = 0,
+	AUDIO_SOURCE_SPDIF = 1,
+};
+
+#define v_AUDIO_SOURCE(x)		((x) << 3)
+
+#define v_MCLK_ENABLE(x)		((x) << 2)
+enum {
+	MCLK_128FS = 0,
+	MCLK_256FS = 1,
+	MCLK_384FS = 2,
+	MCLK_512FS = 3,
+};
+
+#define v_MCLK_RATIO(x)			(x)
+
+#define AUDIO_SAMPLE_RATE		0x37
+enum {
+	AUDIO_32K = 0x3,
+	AUDIO_441K = 0x0,
+	AUDIO_48K = 0x2,
+	AUDIO_882K = 0x8,
+	AUDIO_96K = 0xa,
+	AUDIO_1764K = 0xc,
+	AUDIO_192K = 0xe,
+};
+
+#define AUDIO_I2S_MODE			0x38
+enum {
+	I2S_CHANNEL_1_2 = 1,
+	I2S_CHANNEL_3_4 = 3,
+	I2S_CHANNEL_5_6 = 7,
+	I2S_CHANNEL_7_8 = 0xf
+};
+
+#define v_I2S_CHANNEL(x)		((x) << 2)
+enum {
+	I2S_STANDARD = 0,
+	I2S_LEFT_JUSTIFIED = 1,
+	I2S_RIGHT_JUSTIFIED = 2,
+};
+
+#define v_I2S_MODE(x)			(x)
+
+#define AUDIO_I2S_MAP			0x39
+#define AUDIO_I2S_SWAPS_SPDIF		0x3a
+#define v_SPIDF_FREQ(x)			(x)
+
+#define N_32K				0x1000
+#define N_441K				0x1880
+#define N_882K				0x3100
+#define N_1764K				0x6200
+#define N_48K				0x1800
+#define N_96K				0x3000
+#define N_192K				0x6000
+
+#define HDMI_AUDIO_CHANNEL_STATUS	0x3e
+#define m_AUDIO_STATUS_NLPCM		BIT(7)
+#define m_AUDIO_STATUS_USE		BIT(6)
+#define m_AUDIO_STATUS_COPYRIGHT	BIT(5)
+#define m_AUDIO_STATUS_ADDITION		(3 << 2)
+#define m_AUDIO_STATUS_CLK_ACCURACY	(2 << 0)
+#define v_AUDIO_STATUS_NLPCM(x)		(((x) & 1) << 7)
+#define AUDIO_N_H			0x3f
+#define AUDIO_N_M			0x40
+#define AUDIO_N_L			0x41
+
+#define HDMI_AUDIO_CTS_H		0x45
+#define HDMI_AUDIO_CTS_M		0x46
+#define HDMI_AUDIO_CTS_L		0x47
+
+#define HDMI_DDC_CLK_L			0x4b
+#define HDMI_DDC_CLK_H			0x4c
+
+#define HDMI_EDID_SEGMENT_POINTER	0x4d
+#define HDMI_EDID_WORD_ADDR		0x4e
+#define HDMI_EDID_FIFO_OFFSET		0x4f
+#define HDMI_EDID_FIFO_ADDR		0x50
+
+#define HDMI_PACKET_SEND_MANUAL		0x9c
+#define HDMI_PACKET_SEND_AUTO		0x9d
+#define m_PACKET_GCP_EN			BIT(7)
+#define m_PACKET_MSI_EN			BIT(6)
+#define m_PACKET_SDI_EN			BIT(5)
+#define m_PACKET_VSI_EN			BIT(4)
+#define v_PACKET_GCP_EN(x)		(((x) & 1) << 7)
+#define v_PACKET_MSI_EN(x)		(((x) & 1) << 6)
+#define v_PACKET_SDI_EN(x)		(((x) & 1) << 5)
+#define v_PACKET_VSI_EN(x)		(((x) & 1) << 4)
+
+#define HDMI_CONTROL_PACKET_BUF_INDEX	0x9f
+enum {
+	INFOFRAME_VSI = 0x05,
+	INFOFRAME_AVI = 0x06,
+	INFOFRAME_AAI = 0x08,
+};
+
+enum drm_coxxector_status {
+	coxxector_status_discoxxected = 0,
+	coxxector_status_coxxected = 1,
+};
+
+#define HDMI_CONTROL_PACKET_ADDR	0xa0
+#define HDMI_MAXIMUM_INFO_FRAME_SIZE	0x11
+enum {
+	AVI_COLOR_MODE_RGB = 0,
+	AVI_COLOR_MODE_YCBCR422 = 1,
+	AVI_COLOR_MODE_YCBCR444 = 2,
+	AVI_COLORIMETRY_NO_DATA = 0,
+
+	AVI_COLORIMETRY_SMPTE_170M = 1,
+	AVI_COLORIMETRY_ITU709 = 2,
+	AVI_COLORIMETRY_EXTENDED = 3,
+
+	AVI_CODED_FRAME_ASPECT_NO_DATA = 0,
+	AVI_CODED_FRAME_ASPECT_4_3 = 1,
+	AVI_CODED_FRAME_ASPECT_16_9 = 2,
+
+	ACTIVE_ASPECT_RATE_SAME_AS_CODED_FRAME = 0x08,
+	ACTIVE_ASPECT_RATE_4_3 = 0x09,
+	ACTIVE_ASPECT_RATE_16_9 = 0x0A,
+	ACTIVE_ASPECT_RATE_14_9 = 0x0B,
+};
+
+enum drm_connector_status {
+	connector_status_disconnected = 0,
+	connector_status_connected = 1,
+};
+
+#define HDMI_HDCP_CTRL			0x52
+#define m_HDMI_DVI			BIT(1)
+#define v_HDMI_DVI(x)			((x) << 1)
+
+#define HDMI_INTERRUPT_MASK1		0xc0
+#define HDMI_INTERRUPT_STATUS1		0xc1
+#define	m_INT_ACTIVE_VSYNC		BIT(5)
+#define m_INT_EDID_READY		BIT(2)
+
+#define HDMI_INTERRUPT_MASK2		0xc2
+#define HDMI_INTERRUPT_STATUS2		0xc3
+#define m_INT_HDCP_ERR			BIT(7)
+#define m_INT_BKSV_FLAG			BIT(6)
+#define m_INT_HDCP_OK			BIT(4)
+
+#define HDMI_STATUS			0xc8
+#define m_HOTPLUG			BIT(7)
+#define m_MASK_INT_HOTPLUG		BIT(5)
+#define m_INT_HOTPLUG			BIT(1)
+#define v_MASK_INT_HOTPLUG(x)		(((x) & 0x1) << 5)
+
+#define HDMI_COLORBAR                   0xc9
+
+#define HDMI_PHY_SYNC			0xce
+#define HDMI_PHY_SYS_CTL		0xe0
+#define m_TMDS_CLK_SOURCE		BIT(5)
+#define v_TMDS_FROM_PLL			(0 << 5)
+#define v_TMDS_FROM_GEN			BIT(5)
+#define m_PHASE_CLK			BIT(4)
+#define v_DEFAULT_PHASE			(0 << 4)
+#define v_SYNC_PHASE			BIT(4)
+#define m_TMDS_CURRENT_PWR		BIT(3)
+#define v_TURN_ON_CURRENT		(0 << 3)
+#define v_CAT_OFF_CURRENT		BIT(3)
+#define m_BANDGAP_PWR			BIT(2)
+#define v_BANDGAP_PWR_UP		(0 << 2)
+#define v_BANDGAP_PWR_DOWN		BIT(2)
+#define m_PLL_PWR			BIT(1)
+#define v_PLL_PWR_UP			(0 << 1)
+#define v_PLL_PWR_DOWN			BIT(1)
+#define m_TMDS_CHG_PWR			BIT(0)
+#define v_TMDS_CHG_PWR_UP		(0 << 0)
+#define v_TMDS_CHG_PWR_DOWN		BIT(0)
+
+#define HDMI_PHY_CHG_PWR		0xe1
+#define v_CLK_CHG_PWR(x)		(((x) & 1) << 3)
+#define v_DATA_CHG_PWR(x)		(((x) & 7) << 0)
+
+#define HDMI_PHY_DRIVER			0xe2
+#define v_CLK_MAIN_DRIVER(x)		((x) << 4)
+#define v_DATA_MAIN_DRIVER(x)		((x) << 0)
+
+#define HDMI_PHY_PRE_EMPHASIS		0xe3
+#define v_PRE_EMPHASIS(x)		(((x) & 7) << 4)
+#define v_CLK_PRE_DRIVER(x)		(((x) & 3) << 2)
+#define v_DATA_PRE_DRIVER(x)		(((x) & 3) << 0)
+
+#define HDMI_PHY_FEEDBACK_DIV_RATIO_LOW		0xe7
+#define v_FEEDBACK_DIV_LOW(x)			(x) & 0xff
+#define HDMI_PHY_FEEDBACK_DIV_RATIO_HIGH	0xe8
+#define v_FEEDBACK_DIV_HIGH(x)			(x) & 1
+
+#define HDMI_PHY_PRE_DIV_RATIO		0xed
+#define v_PRE_DIV_RATIO(x)		((x) & 0x1f)
+
+#define HDMI_CEC_CTRL			0xd0
+#define m_ADJUST_FOR_HISENSE		BIT(6)
+#define m_REJECT_RX_BROADCAST		BIT(5)
+#define m_BUSFREETIME_ENABLE		BIT(2)
+#define m_REJECT_RX			BIT(1)
+#define m_START_TX			BIT(0)
+
+#define HDMI_CEC_DATA			0xd1
+#define HDMI_CEC_TX_OFFSET		0xd2
+#define HDMI_CEC_RX_OFFSET		0xd3
+#define HDMI_CEC_CLK_H			0xd4
+#define HDMI_CEC_CLK_L			0xd5
+#define HDMI_CEC_TX_LENGTH		0xd6
+#define HDMI_CEC_RX_LENGTH		0xd7
+#define HDMI_CEC_TX_INT_MASK		0xd8
+#define m_TX_DONE			BIT(3)
+#define m_TX_NOACK			BIT(2)
+#define m_TX_BROADCAST_REJ		BIT(1)
+#define m_TX_BUSNOTFREE			BIT(0)
+
+#define HDMI_CEC_RX_INT_MASK		0xd9
+#define m_RX_LA_ERR			BIT(4)
+#define m_RX_GLITCH			BIT(3)
+#define m_RX_DONE			BIT(0)
+
+#define HDMI_CEC_TX_INT			0xda
+#define HDMI_CEC_RX_INT			0xdb
+#define HDMI_CEC_BUSFREETIME_L		0xdc
+#define HDMI_CEC_BUSFREETIME_H		0xdd
+#define HDMI_CEC_LOGICADDR		0xde
+
+#endif /* __INNO_HDMI_H__ */

commit 00997ff116c359d2a523271069632c7911c629a0
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Tue Jun 9 10:24:59 2020 +0800

    edid: Move functions of sorting modes to edid.c
    
    Not only does dw-hdmi use these functions, but others
    need to use them, such as inno-hdmi.
    
    Change-Id: I1ced6e30b7634511fecbbfb39c24ede78894dd1d
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>

diff --git a/common/edid.c b/common/edid.c
index f8301fb3ce..8ae25df940 100644
--- a/common/edid.c
+++ b/common/edid.c
@@ -1191,6 +1191,166 @@ static const struct drm_display_mode edid_est_modes[] = {
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 };
 
+#define DRM_BASE_MODE(c, hd, hss, hse, ht, vd, vss, vse, vt, vs, f) \
+	.clock = (c), \
+	.hdisplay = (hd), .hsync_start = (hss), .hsync_end = (hse), \
+	.htotal = (ht), .vdisplay = (vd), \
+	.vsync_start = (vss), .vsync_end = (vse), .vtotal = (vt), \
+	.vscan = (vs), .flags = (f)
+
+static const struct base_drm_display_mode resolution_white[] = {
+	/* 0. vic:2 - 720x480@60Hz */
+	{ DRM_BASE_MODE(27000, 720, 736,
+			798, 858, 480, 489, 495, 525, 0,
+			DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 1. vic:3 - 720x480@60Hz */
+	{ DRM_BASE_MODE(27000, 720, 736,
+			798, 858, 480, 489, 495, 525, 0,
+			DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 2. vic:4 - 1280x720@60Hz */
+	{ DRM_BASE_MODE(74250, 1280, 1390,
+			1430, 1650, 720, 725, 730, 750, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 3. vic:5 - 1920x1080i@60Hz */
+	{ DRM_BASE_MODE(74250, 1920, 2008,
+			2052, 2200, 1080, 1084, 1094, 1125, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
+			DRM_MODE_FLAG_INTERLACE),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 4. vic:6 - 720(1440)x480i@60Hz */
+	{ DRM_BASE_MODE(13500, 720, 739,
+			801, 858, 480, 488, 494, 525, 0,
+			DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 5. vic:16 - 1920x1080@60Hz */
+	{ DRM_BASE_MODE(148500, 1920, 2008,
+			2052, 2200, 1080, 1084, 1089, 1125, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 6. vic:17 - 720x576@50Hz */
+	{ DRM_BASE_MODE(27000, 720, 732,
+			796, 864, 576, 581, 586, 625, 0,
+			DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 7. vic:18 - 720x576@50Hz */
+	{ DRM_BASE_MODE(27000, 720, 732,
+			796, 864, 576, 581, 586, 625, 0,
+			DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 8. vic:19 - 1280x720@50Hz */
+	{ DRM_BASE_MODE(74250, 1280, 1720,
+			1760, 1980, 720, 725, 730, 750, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 9. vic:20 - 1920x1080i@50Hz */
+	{ DRM_BASE_MODE(74250, 1920, 2448,
+			2492, 2640, 1080, 1084, 1094, 1125, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
+			DRM_MODE_FLAG_INTERLACE),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 10. vic:21 - 720(1440)x576i@50Hz */
+	{ DRM_BASE_MODE(13500, 720, 732,
+			795, 864, 576, 580, 586, 625, 0,
+			DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 11. vic:31 - 1920x1080@50Hz */
+	{ DRM_BASE_MODE(148500, 1920, 2448,
+			2492, 2640, 1080, 1084, 1089, 1125, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 12. vic:32 - 1920x1080@24Hz */
+	{ DRM_BASE_MODE(74250, 1920, 2558,
+			2602, 2750, 1080, 1084, 1089, 1125, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 13. vic:33 - 1920x1080@25Hz */
+	{ DRM_BASE_MODE(74250, 1920, 2448,
+			2492, 2640, 1080, 1084, 1089, 1125, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 14. vic:34 - 1920x1080@30Hz */
+	{ DRM_BASE_MODE(74250, 1920, 2008,
+			2052, 2200, 1080, 1084, 1089, 1125, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 15. vic:39 - 1920x1080i@50Hz */
+	{ DRM_BASE_MODE(72000, 1920, 1952,
+			2120, 2304, 1080, 1126, 1136, 1250, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_INTERLACE),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 16. vic:60 - 1280x720@24Hz */
+	{ DRM_BASE_MODE(59400, 1280, 3040,
+			3080, 3300, 720, 725, 730, 750, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 17. vic:61 - 1280x720@25Hz */
+	{ DRM_BASE_MODE(74250, 1280, 3700,
+			3740, 3960, 720, 725, 730, 750, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 18. vic:62 - 1280x720@30Hz */
+	{ DRM_BASE_MODE(74250, 1280, 3040,
+			3080, 3300, 720, 725, 730, 750, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 19. vic:93 - 3840x2160p@24Hz 16:9 */
+	{ DRM_BASE_MODE(297000, 3840, 5116,
+			5204, 5500, 2160, 2168, 2178, 2250, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 20. vic:94 - 3840x2160p@25Hz 16:9 */
+	{ DRM_BASE_MODE(297000, 3840, 4896,
+			4984, 5280, 2160, 2168, 2178, 2250, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 21. vic:95 - 3840x2160p@30Hz 16:9 */
+	{ DRM_BASE_MODE(297000, 3840, 4016,
+			4104, 4400, 2160, 2168, 2178, 2250, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 22. vic:96 - 3840x2160p@50Hz 16:9 */
+	{ DRM_BASE_MODE(594000, 3840, 4896,
+			4984, 5280, 2160, 2168, 2178, 2250, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 23. vic:97 - 3840x2160p@60Hz 16:9 */
+	{ DRM_BASE_MODE(594000, 3840, 4016,
+			4104, 4400, 2160, 2168, 2178, 2250, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 24. vic:98 - 4096x2160p@24Hz 256:135 */
+	{ DRM_BASE_MODE(297000, 4096, 5116,
+			5204, 5500, 2160, 2168, 2178, 2250, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
+	/* 25. vic:99 - 4096x2160p@25Hz 256:135 */
+	{ DRM_BASE_MODE(297000, 4096, 5064,
+			5152, 5280, 2160, 2168, 2178, 2250, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
+	/* 26. vic:100 - 4096x2160p@30Hz 256:135 */
+	{ DRM_BASE_MODE(297000, 4096, 4184,
+			4272, 4400, 2160, 2168, 2178, 2250, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
+	/* 27. vic:101 - 4096x2160p@50Hz 256:135 */
+	{ DRM_BASE_MODE(594000, 4096, 5064,
+			5152, 5280, 2160, 2168, 2178, 2250, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
+	/* 28. vic:102 - 4096x2160p@60Hz 256:135 */
+	{ DRM_BASE_MODE(594000, 4096, 4184,
+			4272, 4400, 2160, 2168, 2178, 2250, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
+};
+
 struct minimode {
 	short w;
 	short h;
@@ -6008,6 +6168,164 @@ int hdmi_infoframe_unpack(union hdmi_infoframe *frame, void *buffer)
 	return ret;
 }
 
+bool drm_mode_equal(const struct base_drm_display_mode *mode1,
+		    const struct drm_display_mode *mode2)
+{
+	unsigned int flags_mask =
+		DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_PHSYNC |
+		DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC |
+		DRM_MODE_FLAG_NVSYNC;
+
+	if (mode1->clock == mode2->clock &&
+	    mode1->hdisplay == mode2->hdisplay &&
+	    mode1->hsync_start == mode2->hsync_start &&
+	    mode1->hsync_end == mode2->hsync_end &&
+	    mode1->htotal == mode2->htotal &&
+	    mode1->vdisplay == mode2->vdisplay &&
+	    mode1->vsync_start == mode2->vsync_start &&
+	    mode1->vsync_end == mode2->vsync_end &&
+	    mode1->vtotal == mode2->vtotal &&
+	    (mode1->flags & flags_mask) == (mode2->flags & flags_mask)) {
+		return true;
+	}
+
+	return false;
+}
+
+/**
+ * drm_mode_sort - sort mode list
+ * @edid_data: modes structures to sort
+ *
+ * Sort @edid_data by favorability, moving good modes to the head of the list.
+ */
+void drm_mode_sort(struct hdmi_edid_data *edid_data)
+{
+	struct drm_display_mode *a, *b;
+	struct drm_display_mode c;
+	int diff, i, j;
+
+	for (i = 0; i < (edid_data->modes - 1); i++) {
+		a = &edid_data->mode_buf[i];
+		for (j = i + 1; j < edid_data->modes; j++) {
+			b = &edid_data->mode_buf[j];
+			diff = ((b->type & DRM_MODE_TYPE_PREFERRED) != 0) -
+				((a->type & DRM_MODE_TYPE_PREFERRED) != 0);
+			if (diff) {
+				if (diff > 0) {
+					c = *a;
+					*a = *b;
+					*b = c;
+				}
+				continue;
+			}
+
+			diff = b->hdisplay * b->vdisplay
+				- a->hdisplay * a->vdisplay;
+			if (diff) {
+				if (diff > 0) {
+					c = *a;
+					*a = *b;
+					*b = c;
+				}
+				continue;
+			}
+
+			diff = b->vrefresh - a->vrefresh;
+			if (diff) {
+				if (diff > 0) {
+					c = *a;
+					*a = *b;
+					*b = c;
+				}
+				continue;
+			}
+
+			diff = b->clock - a->clock;
+			if (diff > 0) {
+				c = *a;
+				*a = *b;
+				*b = c;
+			}
+		}
+	}
+	edid_data->preferred_mode = &edid_data->mode_buf[0];
+}
+
+/**
+ * drm_mode_prune_invalid - remove invalid modes from mode list
+ * @edid_data: structure store mode list
+ * Returns:
+ * Number of valid modes.
+ */
+int drm_mode_prune_invalid(struct hdmi_edid_data *edid_data)
+{
+	int i, j;
+	int num = edid_data->modes;
+	int len = sizeof(struct drm_display_mode);
+	struct drm_display_mode *mode_buf = edid_data->mode_buf;
+
+	for (i = 0; i < num; i++) {
+		if (mode_buf[i].invalid) {
+			/* If mode is invalid, delete it. */
+			for (j = i; j < num - 1; j++)
+				memcpy(&mode_buf[j], &mode_buf[j + 1], len);
+
+			num--;
+			i--;
+		}
+	}
+	/* Clear redundant modes of mode_buf. */
+	memset(&mode_buf[num], 0, len * (edid_data->modes - num));
+
+	edid_data->modes = num;
+	return num;
+}
+
+/**
+ * drm_rk_filter_whitelist - mark modes out of white list from mode list
+ * @edid_data: structure store mode list
+ */
+void drm_rk_filter_whitelist(struct hdmi_edid_data *edid_data)
+{
+	int i, j, white_len;
+
+	if (sizeof(resolution_white)) {
+		white_len = sizeof(resolution_white) /
+			sizeof(resolution_white[0]);
+		for (i = 0; i < edid_data->modes; i++) {
+			for (j = 0; j < white_len; j++) {
+				if (drm_mode_equal(&resolution_white[j],
+						   &edid_data->mode_buf[i]))
+					break;
+			}
+
+			if (j == white_len)
+				edid_data->mode_buf[i].invalid = true;
+		}
+	}
+}
+
+void drm_rk_select_mode(struct hdmi_edid_data *edid_data,
+			struct base_screen_info *screen_info)
+{
+	int i;
+	const struct base_drm_display_mode *base_mode;
+
+	if (!screen_info) {
+		/* define init resolution here */
+	} else {
+		base_mode = &screen_info->mode;
+		for (i = 0; i < edid_data->modes; i++) {
+			if (drm_mode_equal(base_mode,
+					   &edid_data->mode_buf[i])) {
+				edid_data->preferred_mode =
+					&edid_data->mode_buf[i];
+				break;
+			}
+		}
+	}
+}
+
 /**
  * drm_do_probe_ddc_edid() - get EDID information via I2C
  * @adap: ddc adapter
diff --git a/drivers/video/drm/dw_hdmi.h b/drivers/video/drm/dw_hdmi.h
index f3df9f6054..a3e1fa7c2c 100644
--- a/drivers/video/drm/dw_hdmi.h
+++ b/drivers/video/drm/dw_hdmi.h
@@ -1404,9 +1404,6 @@ enum {
 	FAST_MODE
 };
 
-void drm_mode_sort(struct hdmi_edid_data *edid_data);
-int drm_mode_prune_invalid(struct hdmi_edid_data *edid_data);
-void drm_rk_filter_whitelist(struct hdmi_edid_data *edid_data);
 void drm_rk_selete_output(struct hdmi_edid_data *edid_data,
 			  unsigned int *bus_format,
 			  struct overscan *overscan,
diff --git a/drivers/video/drm/rockchip_dw_hdmi.c b/drivers/video/drm/rockchip_dw_hdmi.c
index 30acb21b29..c856b61773 100644
--- a/drivers/video/drm/rockchip_dw_hdmi.c
+++ b/drivers/video/drm/rockchip_dw_hdmi.c
@@ -35,13 +35,6 @@
 #define RK3328_GRF_SOC_CON3              0x040c
 #define RK3328_GRF_SOC_CON4              0x0410
 
-#define DRM_BASE_MODE(c, hd, hss, hse, ht, vd, vss, vse, vt, vs, f) \
-	.clock = (c), \
-	.hdisplay = (hd), .hsync_start = (hss), .hsync_end = (hse), \
-	.htotal = (ht), .vdisplay = (vd), \
-	.vsync_start = (vss), .vsync_end = (vse), .vtotal = (vt), \
-	.vscan = (vs), .flags = (f)
-
 static const struct dw_hdmi_mpll_config rockchip_mpll_cfg[] = {
 	{
 		30666000, {
@@ -188,317 +181,6 @@ static const struct dw_hdmi_phy_config rockchip_phy_config[] = {
 	{ ~0UL,	     0x0000, 0x0000, 0x0000}
 };
 
-static const struct base_drm_display_mode resolution_white[] = {
-	/* 0. vic:2 - 720x480@60Hz */
-	{ DRM_BASE_MODE(27000, 720, 736,
-			798, 858, 480, 489, 495, 525, 0,
-			DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
-	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
-	/* 1. vic:3 - 720x480@60Hz */
-	{ DRM_BASE_MODE(27000, 720, 736,
-			798, 858, 480, 489, 495, 525, 0,
-			DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
-	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
-	/* 2. vic:4 - 1280x720@60Hz */
-	{ DRM_BASE_MODE(74250, 1280, 1390,
-			1430, 1650, 720, 725, 730, 750, 0,
-			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
-	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
-	/* 3. vic:5 - 1920x1080i@60Hz */
-	{ DRM_BASE_MODE(74250, 1920, 2008,
-			2052, 2200, 1080, 1084, 1094, 1125, 0,
-			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
-			DRM_MODE_FLAG_INTERLACE),
-	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
-	/* 4. vic:6 - 720(1440)x480i@60Hz */
-	{ DRM_BASE_MODE(13500, 720, 739,
-			801, 858, 480, 488, 494, 525, 0,
-			DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
-			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
-	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
-	/* 5. vic:16 - 1920x1080@60Hz */
-	{ DRM_BASE_MODE(148500, 1920, 2008,
-			2052, 2200, 1080, 1084, 1089, 1125, 0,
-			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
-	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
-	/* 6. vic:17 - 720x576@50Hz */
-	{ DRM_BASE_MODE(27000, 720, 732,
-			796, 864, 576, 581, 586, 625, 0,
-			DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
-	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
-	/* 7. vic:18 - 720x576@50Hz */
-	{ DRM_BASE_MODE(27000, 720, 732,
-			796, 864, 576, 581, 586, 625, 0,
-			DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
-	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
-	/* 8. vic:19 - 1280x720@50Hz */
-	{ DRM_BASE_MODE(74250, 1280, 1720,
-			1760, 1980, 720, 725, 730, 750, 0,
-			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
-	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
-	/* 9. vic:20 - 1920x1080i@50Hz */
-	{ DRM_BASE_MODE(74250, 1920, 2448,
-			2492, 2640, 1080, 1084, 1094, 1125, 0,
-			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
-			DRM_MODE_FLAG_INTERLACE),
-	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
-	/* 10. vic:21 - 720(1440)x576i@50Hz */
-	{ DRM_BASE_MODE(13500, 720, 732,
-			795, 864, 576, 580, 586, 625, 0,
-			DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
-			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
-	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
-	/* 11. vic:31 - 1920x1080@50Hz */
-	{ DRM_BASE_MODE(148500, 1920, 2448,
-			2492, 2640, 1080, 1084, 1089, 1125, 0,
-			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
-	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
-	/* 12. vic:32 - 1920x1080@24Hz */
-	{ DRM_BASE_MODE(74250, 1920, 2558,
-			2602, 2750, 1080, 1084, 1089, 1125, 0,
-			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
-	  .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
-	/* 13. vic:33 - 1920x1080@25Hz */
-	{ DRM_BASE_MODE(74250, 1920, 2448,
-			2492, 2640, 1080, 1084, 1089, 1125, 0,
-			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
-	  .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
-	/* 14. vic:34 - 1920x1080@30Hz */
-	{ DRM_BASE_MODE(74250, 1920, 2008,
-			2052, 2200, 1080, 1084, 1089, 1125, 0,
-			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
-	  .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
-	/* 15. vic:39 - 1920x1080i@50Hz */
-	{ DRM_BASE_MODE(72000, 1920, 1952,
-			2120, 2304, 1080, 1126, 1136, 1250, 0,
-			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC |
-			DRM_MODE_FLAG_INTERLACE),
-	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
-	/* 16. vic:60 - 1280x720@24Hz */
-	{ DRM_BASE_MODE(59400, 1280, 3040,
-			3080, 3300, 720, 725, 730, 750, 0,
-			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
-	  .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
-	/* 17. vic:61 - 1280x720@25Hz */
-	{ DRM_BASE_MODE(74250, 1280, 3700,
-			3740, 3960, 720, 725, 730, 750, 0,
-			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
-	  .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
-	/* 18. vic:62 - 1280x720@30Hz */
-	{ DRM_BASE_MODE(74250, 1280, 3040,
-			3080, 3300, 720, 725, 730, 750, 0,
-			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
-	  .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
-	/* 19. vic:93 - 3840x2160p@24Hz 16:9 */
-	{ DRM_BASE_MODE(297000, 3840, 5116,
-			5204, 5500, 2160, 2168, 2178, 2250, 0,
-			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
-	.vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
-	/* 20. vic:94 - 3840x2160p@25Hz 16:9 */
-	{ DRM_BASE_MODE(297000, 3840, 4896,
-			4984, 5280, 2160, 2168, 2178, 2250, 0,
-			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
-	.vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
-	/* 21. vic:95 - 3840x2160p@30Hz 16:9 */
-	{ DRM_BASE_MODE(297000, 3840, 4016,
-			4104, 4400, 2160, 2168, 2178, 2250, 0,
-			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
-	.vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
-	/* 22. vic:96 - 3840x2160p@50Hz 16:9 */
-	{ DRM_BASE_MODE(594000, 3840, 4896,
-			4984, 5280, 2160, 2168, 2178, 2250, 0,
-			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
-	.vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
-	/* 23. vic:97 - 3840x2160p@60Hz 16:9 */
-	{ DRM_BASE_MODE(594000, 3840, 4016,
-			4104, 4400, 2160, 2168, 2178, 2250, 0,
-			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
-	.vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
-	/* 24. vic:98 - 4096x2160p@24Hz 256:135 */
-	{ DRM_BASE_MODE(297000, 4096, 5116,
-			5204, 5500, 2160, 2168, 2178, 2250, 0,
-			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
-	.vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
-	/* 25. vic:99 - 4096x2160p@25Hz 256:135 */
-	{ DRM_BASE_MODE(297000, 4096, 5064,
-			5152, 5280, 2160, 2168, 2178, 2250, 0,
-			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
-	.vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
-	/* 26. vic:100 - 4096x2160p@30Hz 256:135 */
-	{ DRM_BASE_MODE(297000, 4096, 4184,
-			4272, 4400, 2160, 2168, 2178, 2250, 0,
-			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
-	.vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
-	/* 27. vic:101 - 4096x2160p@50Hz 256:135 */
-	{ DRM_BASE_MODE(594000, 4096, 5064,
-			5152, 5280, 2160, 2168, 2178, 2250, 0,
-			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
-	.vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
-	/* 28. vic:102 - 4096x2160p@60Hz 256:135 */
-	{ DRM_BASE_MODE(594000, 4096, 4184,
-			4272, 4400, 2160, 2168, 2178, 2250, 0,
-			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
-	.vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
-};
-
-static bool drm_mode_equal(const struct base_drm_display_mode *mode1,
-			   const struct drm_display_mode *mode2)
-{
-	unsigned int flags_mask =
-		DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_PHSYNC |
-		DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC |
-		DRM_MODE_FLAG_NVSYNC;
-
-	if (mode1->clock == mode2->clock &&
-	    mode1->hdisplay == mode2->hdisplay &&
-	    mode1->hsync_start == mode2->hsync_start &&
-	    mode1->hsync_end == mode2->hsync_end &&
-	    mode1->htotal == mode2->htotal &&
-	    mode1->vdisplay == mode2->vdisplay &&
-	    mode1->vsync_start == mode2->vsync_start &&
-	    mode1->vsync_end == mode2->vsync_end &&
-	    mode1->vtotal == mode2->vtotal &&
-	    (mode1->flags & flags_mask) == (mode2->flags & flags_mask)) {
-		return true;
-	}
-
-	return false;
-}
-
-/**
- * drm_mode_sort - sort mode list
- * @edid_data: modes structures to sort
- *
- * Sort @edid_data by favorability, moving good modes to the head of the list.
- */
-void drm_mode_sort(struct hdmi_edid_data *edid_data)
-{
-	struct drm_display_mode *a, *b;
-	struct drm_display_mode c;
-	int diff, i, j;
-
-	for (i = 0; i < (edid_data->modes - 1); i++) {
-		a = &edid_data->mode_buf[i];
-		for (j = i + 1; j < edid_data->modes; j++) {
-			b = &edid_data->mode_buf[j];
-			diff = ((b->type & DRM_MODE_TYPE_PREFERRED) != 0) -
-				((a->type & DRM_MODE_TYPE_PREFERRED) != 0);
-			if (diff) {
-				if (diff > 0) {
-					c = *a;
-					*a = *b;
-					*b = c;
-				}
-				continue;
-			}
-
-			diff = b->hdisplay * b->vdisplay
-				- a->hdisplay * a->vdisplay;
-			if (diff) {
-				if (diff > 0) {
-					c = *a;
-					*a = *b;
-					*b = c;
-				}
-				continue;
-			}
-
-			diff = b->vrefresh - a->vrefresh;
-			if (diff) {
-				if (diff > 0) {
-					c = *a;
-					*a = *b;
-					*b = c;
-				}
-				continue;
-			}
-
-			diff = b->clock - a->clock;
-			if (diff > 0) {
-				c = *a;
-				*a = *b;
-				*b = c;
-			}
-		}
-	}
-	edid_data->preferred_mode = &edid_data->mode_buf[0];
-}
-
-/**
- * drm_mode_prune_invalid - remove invalid modes from mode list
- * @edid_data: structure store mode list
- * Returns:
- * Number of valid modes.
- */
-int drm_mode_prune_invalid(struct hdmi_edid_data *edid_data)
-{
-	int i, j;
-	int num = edid_data->modes;
-	int len = sizeof(struct drm_display_mode);
-	struct drm_display_mode *mode_buf = edid_data->mode_buf;
-
-	for (i = 0; i < num; i++) {
-		if (mode_buf[i].invalid) {
-			/* If mode is invalid, delete it. */
-			for (j = i; j < num - 1; j++)
-				memcpy(&mode_buf[j], &mode_buf[j + 1], len);
-
-			num--;
-			i--;
-		}
-	}
-	/* Clear redundant modes of mode_buf. */
-	memset(&mode_buf[num], 0, len * (edid_data->modes - num));
-
-	edid_data->modes = num;
-	return num;
-}
-
-/**
- * drm_rk_filter_whitelist - mark modes out of white list from mode list
- * @edid_data: structure store mode list
- */
-void drm_rk_filter_whitelist(struct hdmi_edid_data *edid_data)
-{
-	int i, j, white_len;
-
-	if (sizeof(resolution_white)) {
-		white_len = sizeof(resolution_white) /
-			sizeof(resolution_white[0]);
-		for (i = 0; i < edid_data->modes; i++) {
-			for (j = 0; j < white_len; j++) {
-				if (drm_mode_equal(&resolution_white[j],
-						   &edid_data->mode_buf[i]))
-					break;
-			}
-
-			if (j == white_len)
-				edid_data->mode_buf[i].invalid = true;
-		}
-	}
-}
-
-void drm_rk_select_mode(struct hdmi_edid_data *edid_data,
-			struct base_screen_info *screen_info)
-{
-	int i;
-	const struct base_drm_display_mode *base_mode;
-
-	if (!screen_info) {
-		/* define init resolution here */
-	} else {
-		base_mode = &screen_info->mode;
-		for (i = 0; i < edid_data->modes; i++) {
-			if (drm_mode_equal(base_mode,
-					   &edid_data->mode_buf[i])) {
-				edid_data->preferred_mode =
-					&edid_data->mode_buf[i];
-				break;
-			}
-		}
-	}
-}
-
 static unsigned int drm_rk_select_color(struct hdmi_edid_data *edid_data,
 					struct base_screen_info *screen_info,
 					enum dw_hdmi_devtype dev_type)
diff --git a/include/edid.h b/include/edid.h
index 7e52b325fd..aa2d0aaa7e 100644
--- a/include/edid.h
+++ b/include/edid.h
@@ -853,5 +853,10 @@ u8 drm_scdc_readb(struct ddc_adapter *adap, u8 offset,
 		  u8 *value);
 u8 drm_scdc_writeb(struct ddc_adapter *adap, u8 offset,
 		   u8 value);
+void drm_mode_sort(struct hdmi_edid_data *edid_data);
+int drm_mode_prune_invalid(struct hdmi_edid_data *edid_data);
+void drm_rk_filter_whitelist(struct hdmi_edid_data *edid_data);
+void drm_rk_select_mode(struct hdmi_edid_data *edid_data,
+			struct base_screen_info *screen_info);
 
 #endif /* __EDID_H_ */

commit d34efd258bdc1506f52820ad943a0c22b5303f63
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Tue Jun 9 10:03:51 2020 +0800

    edid: Complete hdmi infoframe
    
    Complete hdmi infoframe interfaces.
    
    Change-Id: I4a5408c83d08fb13dc1123a87d9037d4d9dc96da
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>

diff --git a/common/edid.c b/common/edid.c
index 2adcced730..f8301fb3ce 100644
--- a/common/edid.c
+++ b/common/edid.c
@@ -5050,17 +5050,6 @@ int drm_add_edid_modes(struct hdmi_edid_data *data, u8 *raw_edid)
 	return num_modes;
 }
 
-static int hdmi_avi_infoframe_init(struct hdmi_avi_infoframe *frame)
-{
-	memset(frame, 0, sizeof(*frame));
-
-	frame->type = HDMI_INFOFRAME_TYPE_AVI;
-	frame->version = 2;
-	frame->length = HDMI_AVI_INFOFRAME_SIZE;
-
-	return 0;
-}
-
 u8 drm_match_cea_mode(struct drm_display_mode *to_match)
 {
 	u8 vic;
@@ -5157,7 +5146,7 @@ drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame,
  *
  * Returns 0 on success or a negative error code on failure.
  */
-static int hdmi_vendor_infoframe_init(struct hdmi_vendor_infoframe *frame)
+int hdmi_vendor_infoframe_init(struct hdmi_vendor_infoframe *frame)
 {
 	memset(frame, 0, sizeof(*frame));
 
@@ -5298,6 +5287,250 @@ static void hdmi_infoframe_set_checksum(void *buffer, size_t size)
 	ptr[3] = hdmi_infoframe_checksum(buffer, size);
 }
 
+/**
+ * hdmi_avi_infoframe_init() - initialize an HDMI AVI infoframe
+ * @frame: HDMI AVI infoframe
+ *
+ * Returns 0 on success or a negative error code on failure.
+ */
+int hdmi_avi_infoframe_init(struct hdmi_avi_infoframe *frame)
+{
+	memset(frame, 0, sizeof(*frame));
+
+	frame->type = HDMI_INFOFRAME_TYPE_AVI;
+	frame->version = 2;
+	frame->length = HDMI_AVI_INFOFRAME_SIZE;
+
+	return 0;
+}
+EXPORT_SYMBOL(hdmi_avi_infoframe_init);
+
+/**
+ * hdmi_avi_infoframe_pack() - write HDMI AVI infoframe to binary buffer
+ * @frame: HDMI AVI infoframe
+ * @buffer: destination buffer
+ * @size: size of buffer
+ *
+ * Packs the information contained in the @frame structure into a binary
+ * representation that can be written into the corresponding controller
+ * registers. Also computes the checksum as required by section 5.3.5 of
+ * the HDMI 1.4 specification.
+ *
+ * Returns the number of bytes packed into the binary buffer or a negative
+ * error code on failure.
+ */
+ssize_t hdmi_avi_infoframe_pack(struct hdmi_avi_infoframe *frame, void *buffer,
+				size_t size)
+{
+	u8 *ptr = buffer;
+	size_t length;
+
+	length = HDMI_INFOFRAME_HEADER_SIZE + frame->length;
+
+	if (size < length)
+		return -ENOSPC;
+
+	memset(buffer, 0, size);
+
+	ptr[0] = frame->type;
+	ptr[1] = frame->version;
+	ptr[2] = frame->length;
+	ptr[3] = 0; /* checksum */
+
+	/* start infoframe payload */
+	ptr += HDMI_INFOFRAME_HEADER_SIZE;
+
+	ptr[0] = ((frame->colorspace & 0x3) << 5) | (frame->scan_mode & 0x3);
+
+	/*
+	 * Data byte 1, bit 4 has to be set if we provide the active format
+	 * aspect ratio
+	 */
+	if (frame->active_aspect & 0xf)
+		ptr[0] |= BIT(4);
+
+	/* Bit 3 and 2 indicate if we transmit horizontal/vertical bar data */
+	if (frame->top_bar || frame->bottom_bar)
+		ptr[0] |= BIT(3);
+
+	if (frame->left_bar || frame->right_bar)
+		ptr[0] |= BIT(2);
+
+	ptr[1] = ((frame->colorimetry & 0x3) << 6) |
+		 ((frame->picture_aspect & 0x3) << 4) |
+		 (frame->active_aspect & 0xf);
+
+	ptr[2] = ((frame->extended_colorimetry & 0x7) << 4) |
+		 ((frame->quantization_range & 0x3) << 2) |
+		 (frame->nups & 0x3);
+
+	if (frame->itc)
+		ptr[2] |= BIT(7);
+
+	ptr[3] = frame->video_code & 0x7f;
+
+	ptr[4] = ((frame->ycc_quantization_range & 0x3) << 6) |
+		 ((frame->content_type & 0x3) << 4) |
+		 (frame->pixel_repeat & 0xf);
+
+	ptr[5] = frame->top_bar & 0xff;
+	ptr[6] = (frame->top_bar >> 8) & 0xff;
+	ptr[7] = frame->bottom_bar & 0xff;
+	ptr[8] = (frame->bottom_bar >> 8) & 0xff;
+	ptr[9] = frame->left_bar & 0xff;
+	ptr[10] = (frame->left_bar >> 8) & 0xff;
+	ptr[11] = frame->right_bar & 0xff;
+	ptr[12] = (frame->right_bar >> 8) & 0xff;
+
+	hdmi_infoframe_set_checksum(buffer, length);
+
+	return length;
+}
+EXPORT_SYMBOL(hdmi_avi_infoframe_pack);
+
+/**
+ * hdmi_spd_infoframe_init() - initialize an HDMI SPD infoframe
+ * @frame: HDMI SPD infoframe
+ * @vendor: vendor string
+ * @product: product string
+ *
+ * Returns 0 on success or a negative error code on failure.
+ */
+int hdmi_spd_infoframe_init(struct hdmi_spd_infoframe *frame,
+			    const char *vendor, const char *product)
+{
+	memset(frame, 0, sizeof(*frame));
+
+	frame->type = HDMI_INFOFRAME_TYPE_SPD;
+	frame->version = 1;
+	frame->length = HDMI_SPD_INFOFRAME_SIZE;
+
+	strncpy(frame->vendor, vendor, sizeof(frame->vendor));
+	strncpy(frame->product, product, sizeof(frame->product));
+
+	return 0;
+}
+EXPORT_SYMBOL(hdmi_spd_infoframe_init);
+
+/**
+ * hdmi_spd_infoframe_pack() - write HDMI SPD infoframe to binary buffer
+ * @frame: HDMI SPD infoframe
+ * @buffer: destination buffer
+ * @size: size of buffer
+ *
+ * Packs the information contained in the @frame structure into a binary
+ * representation that can be written into the corresponding controller
+ * registers. Also computes the checksum as required by section 5.3.5 of
+ * the HDMI 1.4 specification.
+ *
+ * Returns the number of bytes packed into the binary buffer or a negative
+ * error code on failure.
+ */
+ssize_t hdmi_spd_infoframe_pack(struct hdmi_spd_infoframe *frame, void *buffer,
+				size_t size)
+{
+	u8 *ptr = buffer;
+	size_t length;
+
+	length = HDMI_INFOFRAME_HEADER_SIZE + frame->length;
+
+	if (size < length)
+		return -ENOSPC;
+
+	memset(buffer, 0, size);
+
+	ptr[0] = frame->type;
+	ptr[1] = frame->version;
+	ptr[2] = frame->length;
+	ptr[3] = 0; /* checksum */
+
+	/* start infoframe payload */
+	ptr += HDMI_INFOFRAME_HEADER_SIZE;
+
+	memcpy(ptr, frame->vendor, sizeof(frame->vendor));
+	memcpy(ptr + 8, frame->product, sizeof(frame->product));
+
+	ptr[24] = frame->sdi;
+
+	hdmi_infoframe_set_checksum(buffer, length);
+
+	return length;
+}
+EXPORT_SYMBOL(hdmi_spd_infoframe_pack);
+
+/**
+ * hdmi_audio_infoframe_init() - initialize an HDMI audio infoframe
+ * @frame: HDMI audio infoframe
+ *
+ * Returns 0 on success or a negative error code on failure.
+ */
+int hdmi_audio_infoframe_init(struct hdmi_audio_infoframe *frame)
+{
+	memset(frame, 0, sizeof(*frame));
+
+	frame->type = HDMI_INFOFRAME_TYPE_AUDIO;
+	frame->version = 1;
+	frame->length = HDMI_AUDIO_INFOFRAME_SIZE;
+
+	return 0;
+}
+
+/**
+ * hdmi_audio_infoframe_pack() - write HDMI audio infoframe to binary buffer
+ * @frame: HDMI audio infoframe
+ * @buffer: destination buffer
+ * @size: size of buffer
+ *
+ * Packs the information contained in the @frame structure into a binary
+ * representation that can be written into the corresponding controller
+ * registers. Also computes the checksum as required by section 5.3.5 of
+ * the HDMI 1.4 specification.
+ *
+ * Returns the number of bytes packed into the binary buffer or a negative
+ * error code on failure.
+ */
+ssize_t hdmi_audio_infoframe_pack(struct hdmi_audio_infoframe *frame,
+				  void *buffer, size_t size)
+{
+	unsigned char channels;
+	char *ptr = buffer;
+	size_t length;
+
+	length = HDMI_INFOFRAME_HEADER_SIZE + frame->length;
+
+	if (size < length)
+		return -ENOSPC;
+
+	memset(buffer, 0, size);
+
+	if (frame->channels >= 2)
+		channels = frame->channels - 1;
+	else
+		channels = 0;
+
+	ptr[0] = frame->type;
+	ptr[1] = frame->version;
+	ptr[2] = frame->length;
+	ptr[3] = 0; /* checksum */
+
+	/* start infoframe payload */
+	ptr += HDMI_INFOFRAME_HEADER_SIZE;
+
+	ptr[0] = ((frame->coding_type & 0xf) << 4) | (channels & 0x7);
+	ptr[1] = ((frame->sample_frequency & 0x7) << 2) |
+		 (frame->sample_size & 0x3);
+	ptr[2] = frame->coding_type_ext & 0x1f;
+	ptr[3] = frame->channel_allocation;
+	ptr[4] = (frame->level_shift_value & 0xf) << 3;
+
+	if (frame->downmix_inhibit)
+		ptr[4] |= BIT(7);
+
+	hdmi_infoframe_set_checksum(buffer, length);
+
+	return length;
+}
+
 /**
  * hdmi_vendor_infoframe_pack() - write a HDMI vendor infoframe to binary buffer
  * @frame: HDMI infoframe
@@ -5315,7 +5548,7 @@ static void hdmi_infoframe_set_checksum(void *buffer, size_t size)
 ssize_t hdmi_vendor_infoframe_pack(struct hdmi_vendor_infoframe *frame,
 				   void *buffer, size_t size)
 {
-	u8 *ptr = buffer;
+	char *ptr = buffer;
 	size_t length;
 
 	/* empty info frame */
@@ -5364,6 +5597,417 @@ ssize_t hdmi_vendor_infoframe_pack(struct hdmi_vendor_infoframe *frame,
 	return length;
 }
 
+/**
+ * hdmi_drm_infoframe_init() - initialize an HDMI Dynaminc Range and
+ * mastering infoframe
+ * @frame: HDMI DRM infoframe
+ *
+ * Returns 0 on success or a negative error code on failure.
+ */
+int hdmi_drm_infoframe_init(struct hdmi_drm_infoframe *frame)
+{
+	memset(frame, 0, sizeof(*frame));
+
+	frame->type = HDMI_INFOFRAME_TYPE_DRM;
+	frame->version = 1;
+
+	return 0;
+}
+
+/**
+ * hdmi_drm_infoframe_pack() - write HDMI DRM infoframe to binary buffer
+ * @frame: HDMI DRM infoframe
+ * @buffer: destination buffer
+ * @size: size of buffer
+ *
+ * Packs the information contained in the @frame structure into a binary
+ * representation that can be written into the corresponding controller
+ * registers. Also computes the checksum as required by section 5.3.5 of
+ * the HDMI 1.4 specification.
+ *
+ * Returns the number of bytes packed into the binary buffer or a negative
+ * error code on failure.
+ */
+ssize_t hdmi_drm_infoframe_pack(struct hdmi_drm_infoframe *frame, void *buffer,
+				size_t size)
+{
+	u8 *ptr = buffer;
+	size_t length;
+
+	length = HDMI_INFOFRAME_HEADER_SIZE + frame->length;
+
+	if (size < length)
+		return -ENOSPC;
+
+	memset(buffer, 0, size);
+
+	ptr[0] = frame->type;
+	ptr[1] = frame->version;
+	ptr[2] = frame->length;
+	ptr[3] = 0; /* checksum */
+
+	/* start infoframe payload */
+	ptr += HDMI_INFOFRAME_HEADER_SIZE;
+
+	ptr[0] = frame->eotf;
+	ptr[1] = frame->metadata_type;
+
+	ptr[2] = frame->display_primaries_x[0] & 0xff;
+	ptr[3] = frame->display_primaries_x[0] >> 8;
+
+	ptr[4] = frame->display_primaries_x[1] & 0xff;
+	ptr[5] = frame->display_primaries_x[1] >> 8;
+
+	ptr[6] = frame->display_primaries_x[2] & 0xff;
+	ptr[7] = frame->display_primaries_x[2] >> 8;
+
+	ptr[9] = frame->display_primaries_y[0] & 0xff;
+	ptr[10] = frame->display_primaries_y[0] >> 8;
+
+	ptr[11] = frame->display_primaries_y[1] & 0xff;
+	ptr[12] = frame->display_primaries_y[1] >> 8;
+
+	ptr[13] = frame->display_primaries_y[2] & 0xff;
+	ptr[14] = frame->display_primaries_y[2] >> 8;
+
+	ptr[15] = frame->white_point_x & 0xff;
+	ptr[16] = frame->white_point_x >> 8;
+
+	ptr[17] = frame->white_point_y & 0xff;
+	ptr[18] = frame->white_point_y >> 8;
+
+	ptr[19] = frame->max_mastering_display_luminance & 0xff;
+	ptr[20] = frame->max_mastering_display_luminance >> 8;
+
+	ptr[21] = frame->min_mastering_display_luminance & 0xff;
+	ptr[22] = frame->min_mastering_display_luminance >> 8;
+
+	ptr[23] = frame->max_cll & 0xff;
+	ptr[24] = frame->max_cll >> 8;
+
+	ptr[25] = frame->max_fall & 0xff;
+	ptr[26] = frame->max_fall >> 8;
+
+	hdmi_infoframe_set_checksum(buffer, length);
+
+	return length;
+}
+
+/*
+ * hdmi_vendor_any_infoframe_pack() - write a vendor infoframe to binary buffer
+ */
+static ssize_t
+hdmi_vendor_any_infoframe_pack(union hdmi_vendor_any_infoframe *frame,
+			       void *buffer, size_t size)
+{
+	/* we only know about HDMI vendor infoframes */
+	if (frame->any.oui != HDMI_IEEE_OUI)
+		return -EINVAL;
+
+	return hdmi_vendor_infoframe_pack(&frame->hdmi, buffer, size);
+}
+
+/**
+ * hdmi_infoframe_pack() - write a HDMI infoframe to binary buffer
+ * @frame: HDMI infoframe
+ * @buffer: destination buffer
+ * @size: size of buffer
+ *
+ * Packs the information contained in the @frame structure into a binary
+ * representation that can be written into the corresponding controller
+ * registers. Also computes the checksum as required by section 5.3.5 of
+ * the HDMI 1.4 specification.
+ *
+ * Returns the number of bytes packed into the binary buffer or a negative
+ * error code on failure.
+ */
+ssize_t
+hdmi_infoframe_pack(union hdmi_infoframe *frame, void *buffer, size_t size)
+{
+	ssize_t length;
+
+	switch (frame->any.type) {
+	case HDMI_INFOFRAME_TYPE_AVI:
+		length = hdmi_avi_infoframe_pack(&frame->avi, buffer, size);
+		break;
+	case HDMI_INFOFRAME_TYPE_DRM:
+		length = hdmi_drm_infoframe_pack(&frame->drm, buffer, size);
+		break;
+	case HDMI_INFOFRAME_TYPE_SPD:
+		length = hdmi_spd_infoframe_pack(&frame->spd, buffer, size);
+		break;
+	case HDMI_INFOFRAME_TYPE_AUDIO:
+		length = hdmi_audio_infoframe_pack(&frame->audio, buffer, size);
+		break;
+	case HDMI_INFOFRAME_TYPE_VENDOR:
+		length = hdmi_vendor_any_infoframe_pack(&frame->vendor,
+							buffer, size);
+		break;
+	default:
+		printf("Bad infoframe type %d\n", frame->any.type);
+		length = -EINVAL;
+	}
+
+	return length;
+}
+
+/**
+ * hdmi_avi_infoframe_unpack() - unpack binary buffer to a HDMI AVI infoframe
+ * @buffer: source buffer
+ * @frame: HDMI AVI infoframe
+ *
+ * Unpacks the information contained in binary @buffer into a structured
+ * @frame of the HDMI Auxiliary Video (AVI) information frame.
+ * Also verifies the checksum as required by section 5.3.5 of the HDMI 1.4
+ * specification.
+ *
+ * Returns 0 on success or a negative error code on failure.
+ */
+static int hdmi_avi_infoframe_unpack(struct hdmi_avi_infoframe *frame,
+				     void *buffer)
+{
+	u8 *ptr = buffer;
+	int ret;
+
+	if (ptr[0] != HDMI_INFOFRAME_TYPE_AVI ||
+	    ptr[1] != 2 ||
+	    ptr[2] != HDMI_AVI_INFOFRAME_SIZE)
+		return -EINVAL;
+
+	if (hdmi_infoframe_checksum(buffer, HDMI_INFOFRAME_SIZE(AVI)) != 0)
+		return -EINVAL;
+
+	ret = hdmi_avi_infoframe_init(frame);
+	if (ret)
+		return ret;
+
+	ptr += HDMI_INFOFRAME_HEADER_SIZE;
+
+	frame->colorspace = (ptr[0] >> 5) & 0x3;
+	if (ptr[0] & 0x10)
+		frame->active_aspect = ptr[1] & 0xf;
+	if (ptr[0] & 0x8) {
+		frame->top_bar = (ptr[5] << 8) + ptr[6];
+		frame->bottom_bar = (ptr[7] << 8) + ptr[8];
+	}
+	if (ptr[0] & 0x4) {
+		frame->left_bar = (ptr[9] << 8) + ptr[10];
+		frame->right_bar = (ptr[11] << 8) + ptr[12];
+	}
+	frame->scan_mode = ptr[0] & 0x3;
+
+	frame->colorimetry = (ptr[1] >> 6) & 0x3;
+	frame->picture_aspect = (ptr[1] >> 4) & 0x3;
+	frame->active_aspect = ptr[1] & 0xf;
+
+	frame->itc = ptr[2] & 0x80 ? true : false;
+	frame->extended_colorimetry = (ptr[2] >> 4) & 0x7;
+	frame->quantization_range = (ptr[2] >> 2) & 0x3;
+	frame->nups = ptr[2] & 0x3;
+
+	frame->video_code = ptr[3] & 0x7f;
+	frame->ycc_quantization_range = (ptr[4] >> 6) & 0x3;
+	frame->content_type = (ptr[4] >> 4) & 0x3;
+
+	frame->pixel_repeat = ptr[4] & 0xf;
+
+	return 0;
+}
+
+/**
+ * hdmi_spd_infoframe_unpack() - unpack binary buffer to a HDMI SPD infoframe
+ * @buffer: source buffer
+ * @frame: HDMI SPD infoframe
+ *
+ * Unpacks the information contained in binary @buffer into a structured
+ * @frame of the HDMI Source Product Description (SPD) information frame.
+ * Also verifies the checksum as required by section 5.3.5 of the HDMI 1.4
+ * specification.
+ *
+ * Returns 0 on success or a negative error code on failure.
+ */
+static int hdmi_spd_infoframe_unpack(struct hdmi_spd_infoframe *frame,
+				     void *buffer)
+{
+	char *ptr = buffer;
+	int ret;
+
+	if (ptr[0] != HDMI_INFOFRAME_TYPE_SPD ||
+	    ptr[1] != 1 ||
+	    ptr[2] != HDMI_SPD_INFOFRAME_SIZE) {
+		return -EINVAL;
+	}
+
+	if (hdmi_infoframe_checksum(buffer, HDMI_INFOFRAME_SIZE(SPD)) != 0)
+		return -EINVAL;
+
+	ptr += HDMI_INFOFRAME_HEADER_SIZE;
+
+	ret = hdmi_spd_infoframe_init(frame, ptr, ptr + 8);
+	if (ret)
+		return ret;
+
+	frame->sdi = ptr[24];
+
+	return 0;
+}
+
+/**
+ * hdmi_audio_infoframe_unpack() - unpack binary buffer to a HDMI AUDIO infoframe
+ * @buffer: source buffer
+ * @frame: HDMI Audio infoframe
+ *
+ * Unpacks the information contained in binary @buffer into a structured
+ * @frame of the HDMI Audio information frame.
+ * Also verifies the checksum as required by section 5.3.5 of the HDMI 1.4
+ * specification.
+ *
+ * Returns 0 on success or a negative error code on failure.
+ */
+static int hdmi_audio_infoframe_unpack(struct hdmi_audio_infoframe *frame,
+				       void *buffer)
+{
+	u8 *ptr = buffer;
+	int ret;
+
+	if (ptr[0] != HDMI_INFOFRAME_TYPE_AUDIO ||
+	    ptr[1] != 1 ||
+	    ptr[2] != HDMI_AUDIO_INFOFRAME_SIZE) {
+		return -EINVAL;
+	}
+
+	if (hdmi_infoframe_checksum(buffer, HDMI_INFOFRAME_SIZE(AUDIO)) != 0)
+		return -EINVAL;
+
+	ret = hdmi_audio_infoframe_init(frame);
+	if (ret)
+		return ret;
+
+	ptr += HDMI_INFOFRAME_HEADER_SIZE;
+
+	frame->channels = ptr[0] & 0x7;
+	frame->coding_type = (ptr[0] >> 4) & 0xf;
+	frame->sample_size = ptr[1] & 0x3;
+	frame->sample_frequency = (ptr[1] >> 2) & 0x7;
+	frame->coding_type_ext = ptr[2] & 0x1f;
+	frame->channel_allocation = ptr[3];
+	frame->level_shift_value = (ptr[4] >> 3) & 0xf;
+	frame->downmix_inhibit = ptr[4] & 0x80 ? true : false;
+
+	return 0;
+}
+
+/**
+ * hdmi_vendor_infoframe_unpack() - unpack binary buffer to a HDMI vendor infoframe
+ * @buffer: source buffer
+ * @frame: HDMI Vendor infoframe
+ *
+ * Unpacks the information contained in binary @buffer into a structured
+ * @frame of the HDMI Vendor information frame.
+ * Also verifies the checksum as required by section 5.3.5 of the HDMI 1.4
+ * specification.
+ *
+ * Returns 0 on success or a negative error code on failure.
+ */
+static int
+hdmi_vendor_any_infoframe_unpack(union hdmi_vendor_any_infoframe *frame,
+				 void *buffer)
+{
+	u8 *ptr = buffer;
+	size_t length;
+	int ret;
+	u8 hdmi_video_format;
+	struct hdmi_vendor_infoframe *hvf = &frame->hdmi;
+
+	if (ptr[0] != HDMI_INFOFRAME_TYPE_VENDOR ||
+	    ptr[1] != 1 ||
+	    (ptr[2] != 4 && ptr[2] != 5 && ptr[2] != 6))
+		return -EINVAL;
+
+	length = ptr[2];
+
+	if (hdmi_infoframe_checksum(buffer,
+				    HDMI_INFOFRAME_HEADER_SIZE + length) != 0)
+		return -EINVAL;
+
+	ptr += HDMI_INFOFRAME_HEADER_SIZE;
+
+	/* HDMI OUI */
+	if (ptr[0] != 0x03 ||
+	    ptr[1] != 0x0c ||
+	    ptr[2] != 0x00)
+		return -EINVAL;
+
+	hdmi_video_format = ptr[3] >> 5;
+
+	if (hdmi_video_format > 0x2)
+		return -EINVAL;
+
+	ret = hdmi_vendor_infoframe_init(hvf);
+	if (ret)
+		return ret;
+
+	hvf->length = length;
+
+	if (hdmi_video_format == 0x2) {
+		if (length != 5 && length != 6)
+			return -EINVAL;
+		hvf->s3d_struct = ptr[4] >> 4;
+		if (hvf->s3d_struct >= HDMI_3D_STRUCTURE_SIDE_BY_SIDE_HALF) {
+			if (length != 6)
+				return -EINVAL;
+			hvf->s3d_ext_data = ptr[5] >> 4;
+		}
+	} else if (hdmi_video_format == 0x1) {
+		if (length != 5)
+			return -EINVAL;
+		hvf->vic = ptr[4];
+	} else {
+		if (length != 4)
+			return -EINVAL;
+	}
+
+	return 0;
+}
+
+/**
+ * hdmi_infoframe_unpack() - unpack binary buffer to a HDMI infoframe
+ * @buffer: source buffer
+ * @frame: HDMI infoframe
+ *
+ * Unpacks the information contained in binary buffer @buffer into a structured
+ * @frame of a HDMI infoframe.
+ * Also verifies the checksum as required by section 5.3.5 of the HDMI 1.4
+ * specification.
+ *
+ * Returns 0 on success or a negative error code on failure.
+ */
+int hdmi_infoframe_unpack(union hdmi_infoframe *frame, void *buffer)
+{
+	int ret;
+	u8 *ptr = buffer;
+
+	switch (ptr[0]) {
+	case HDMI_INFOFRAME_TYPE_AVI:
+		ret = hdmi_avi_infoframe_unpack(&frame->avi, buffer);
+		break;
+	case HDMI_INFOFRAME_TYPE_SPD:
+		ret = hdmi_spd_infoframe_unpack(&frame->spd, buffer);
+		break;
+	case HDMI_INFOFRAME_TYPE_AUDIO:
+		ret = hdmi_audio_infoframe_unpack(&frame->audio, buffer);
+		break;
+	case HDMI_INFOFRAME_TYPE_VENDOR:
+		ret = hdmi_vendor_any_infoframe_unpack(&frame->vendor, buffer);
+		break;
+	default:
+		ret = -EINVAL;
+		break;
+	}
+
+	return ret;
+}
+
 /**
  * drm_do_probe_ddc_edid() - get EDID information via I2C
  * @adap: ddc adapter
diff --git a/include/linux/hdmi.h b/include/linux/hdmi.h
index 005d34a8fc..d33ae37d2b 100644
--- a/include/linux/hdmi.h
+++ b/include/linux/hdmi.h
@@ -33,6 +33,7 @@ enum hdmi_infoframe_type {
 	HDMI_INFOFRAME_TYPE_AVI = 0x82,
 	HDMI_INFOFRAME_TYPE_SPD = 0x83,
 	HDMI_INFOFRAME_TYPE_AUDIO = 0x84,
+	HDMI_INFOFRAME_TYPE_DRM = 0x87,
 };
 
 #define HDMI_IEEE_OUI 0x000c03
@@ -161,6 +162,29 @@ struct hdmi_avi_infoframe {
 	unsigned short right_bar;
 };
 
+struct hdmi_drm_infoframe {
+	enum hdmi_infoframe_type type;
+	unsigned char version;
+	unsigned char length;
+	uint16_t eotf;
+	uint16_t metadata_type;
+	uint16_t display_primaries_x[3];
+	uint16_t display_primaries_y[3];
+	uint16_t white_point_x;
+	uint16_t white_point_y;
+	uint16_t max_mastering_display_luminance;
+	uint16_t min_mastering_display_luminance;
+	uint16_t max_fall;
+	uint16_t max_cll;
+	uint16_t min_cll;
+};
+
+int hdmi_avi_infoframe_init(struct hdmi_avi_infoframe *frame);
+ssize_t hdmi_avi_infoframe_pack(struct hdmi_avi_infoframe *frame, void *buffer,
+				size_t size);
+
+int hdmi_drm_infoframe_init(struct hdmi_drm_infoframe *frame);
+
 enum hdmi_spd_sdi {
 	HDMI_SPD_SDI_UNKNOWN,
 	HDMI_SPD_SDI_DSTB,
@@ -187,6 +211,11 @@ struct hdmi_spd_infoframe {
 	enum hdmi_spd_sdi sdi;
 };
 
+int hdmi_spd_infoframe_init(struct hdmi_spd_infoframe *frame,
+			    const char *vendor, const char *product);
+ssize_t hdmi_spd_infoframe_pack(struct hdmi_spd_infoframe *frame, void *buffer,
+				size_t size);
+
 enum hdmi_audio_coding_type {
 	HDMI_AUDIO_CODING_TYPE_STREAM,
 	HDMI_AUDIO_CODING_TYPE_PCM,
@@ -261,6 +290,10 @@ struct hdmi_audio_infoframe {
 
 };
 
+int hdmi_audio_infoframe_init(struct hdmi_audio_infoframe *frame);
+ssize_t hdmi_audio_infoframe_pack(struct hdmi_audio_infoframe *frame,
+				  void *buffer, size_t size);
+
 enum hdmi_3d_structure {
 	HDMI_3D_STRUCTURE_INVALID = -1,
 	HDMI_3D_STRUCTURE_FRAME_PACKING = 0,
@@ -283,6 +316,10 @@ struct hdmi_vendor_infoframe {
 	unsigned int s3d_ext_data;
 };
 
+int hdmi_vendor_infoframe_init(struct hdmi_vendor_infoframe *frame);
+ssize_t hdmi_vendor_infoframe_pack(struct hdmi_vendor_infoframe *frame,
+				   void *buffer, size_t size);
+
 union hdmi_vendor_any_infoframe {
 	struct {
 		enum hdmi_infoframe_type type;
@@ -311,8 +348,13 @@ union hdmi_infoframe {
 	struct hdmi_spd_infoframe spd;
 	union hdmi_vendor_any_infoframe vendor;
 	struct hdmi_audio_infoframe audio;
+	struct hdmi_drm_infoframe drm;
 };
 
+ssize_t
+hdmi_infoframe_pack(union hdmi_infoframe *frame, void *buffer, size_t size);
+int hdmi_infoframe_unpack(union hdmi_infoframe *frame, void *buffer);
+
 ssize_t hdmi_vendor_infoframe_pack(struct hdmi_vendor_infoframe *frame,
 				   void *buffer, size_t size);
 int

commit 8d26d4b38a2ac7c59a3f940e09e8cfb23caf023a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 6 11:04:55 2020 +0800

    rockchip: fit: panic if write rollback index failed
    
    Call panic() here since there is not a return value
    accepted in the top caller.
    
    Reading rollback index failed is already not allowed.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ic5235f01dc7e9791d8ebe546724078dbab91f993

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 39dc8545ea..e07876f813 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -855,20 +855,11 @@ int fit_read_otp_rollback_index(uint32_t fit_index, uint32_t *otp_index)
 
 static int fit_write_trusty_rollback_index(u32 trusty_index)
 {
-	int ret;
-
 	if (!trusty_index)
 		return 0;
 
-	ret = trusty_write_rollback_index(FIT_ROLLBACK_INDEX_LOCATION,
-					  (u64)trusty_index);
-	if (ret) {
-		printf("Failed to write fit rollback index %d, ret=%d\n",
-		       trusty_index, ret);
-		return ret;
-	}
-
-	return 0;
+	return trusty_write_rollback_index(FIT_ROLLBACK_INDEX_LOCATION,
+					   (u64)trusty_index);
 }
 #endif
 
@@ -883,6 +874,12 @@ void board_quiesce_devices(void *images)
 #endif
 
 #ifdef CONFIG_FIT_ROLLBACK_PROTECT
-	fit_write_trusty_rollback_index(gd->rollback_index);
+	int ret;
+
+	ret = fit_write_trusty_rollback_index(gd->rollback_index);
+	if (ret) {
+		panic("Failed to write fit rollback index %d, ret=%d",
+		      gd->rollback_index, ret);
+	}
 #endif
 }
diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index d86abe239b..cafe3e8c05 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -382,7 +382,13 @@ static int fit_write_otp_rollback_index(u32 fit_index)
 int spl_board_prepare_for_jump(struct spl_image_info *spl_image)
 {
 #ifdef CONFIG_SPL_FIT_ROLLBACK_PROTECT
-	return fit_write_otp_rollback_index(gd->rollback_index);
+	int ret;
+
+	ret = fit_write_otp_rollback_index(gd->rollback_index);
+	if (ret) {
+		panic("Failed to write fit rollback index %d, ret=%d",
+		      gd->rollback_index, ret);
+	}
 #endif
 	return 0;
 }

commit 7f6bf349e1ef9ee1d2acf80ad51288bb0c42ddcb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 6 18:40:17 2020 +0800

    common: image-fit: print bad hash value
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I948ff79b68be626797bcc41e8c1cb4dd1bc330bf

diff --git a/common/image-fit.c b/common/image-fit.c
index cac84001db..4ada91de14 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -1274,6 +1274,13 @@ int fit_image_check_hash(const void *fit, int noffset, const void *data,
 		*err_msgp = "Bad hash value len";
 		return -1;
 	} else if (memcmp(value, fit_value, value_len) != 0) {
+		int i;
+
+		printf(" Bad hash: ");
+		for (i = 0; i < value_len; i++)
+			printf("%02x", value[i]);
+		printf("\n");
+
 		*err_msgp = "Bad hash value";
 		return -1;
 	}

commit 0d2e36b834898ae4a008ae84afb8fd40033a6a96
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 6 16:07:37 2020 +0800

    rockchip: fit: return whole fit totalsize
    
    Only for debug.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I48f6577abbb22d15c7b4fc0ea6bc6409c39d9b63

diff --git a/arch/arm/mach-rockchip/fit.c b/arch/arm/mach-rockchip/fit.c
index 684fab0cfe..8d29817704 100644
--- a/arch/arm/mach-rockchip/fit.c
+++ b/arch/arm/mach-rockchip/fit.c
@@ -338,6 +338,11 @@ ulong fit_image_get_bootables_size(const void *fit)
 	ulong max_off, load;
 	int offset, size;
 
+#if 0
+	if (!fit_get_totalsize(fit, &size))
+		return size;
+#endif
+
 	if (!fit_image_get_param(fit, FIT_FDT_PROP, &load, &offset, &size))
 		off[0] = offset + FIT_ALIGN(size);
 

commit 4fe117be426fd5b06f929f8bde3bf3ef6be089a1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 6 15:55:00 2020 +0800

    common: image-fit: add API to get "/totalsize"
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Icca5200040ab14ad76515888cdaa4cd16f554af0

diff --git a/common/image-fit.c b/common/image-fit.c
index 1d7791c515..cac84001db 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -527,6 +527,29 @@ int fit_get_timestamp(const void *fit, int noffset, time_t *timestamp)
 	return 0;
 }
 
+/**
+ * fit_get_totalsize - get node totalsize property.
+ *
+ * @fit: pointer to the FIT image header
+ * @totalsize: holds the /totalsize property
+ *
+ * returns:
+ *     0, on success
+ *     -ENOENT if the property could not be found
+ */
+int fit_get_totalsize(const void *fit, int *totalsize)
+{
+	const fdt32_t *val;
+
+	val = fdt_getprop(fit, 0, FIT_TOTALSIZE_PROP, NULL);
+	if (!val)
+		return -ENOENT;
+
+	*totalsize = fdt32_to_cpu(*val);
+
+	return 0;
+}
+
 /**
  * fit_image_get_node - get node offset for component image of a given unit name
  * @fit: pointer to the FIT format image header
diff --git a/include/image.h b/include/image.h
index d15b345362..b5fd1c84c9 100644
--- a/include/image.h
+++ b/include/image.h
@@ -1001,6 +1001,7 @@ static inline const char *fit_get_name(const void *fit_hdr,
 
 int fit_get_desc(const void *fit, int noffset, char **desc);
 int fit_get_timestamp(const void *fit, int noffset, time_t *timestamp);
+int fit_get_totalsize(const void *fit, int *totalsize);
 
 int fit_image_get_node(const void *fit, const char *image_uname);
 int fit_image_get_os(const void *fit, int noffset, uint8_t *os);

commit 28e3182f59a69a66bd66ad38252a5c9e836acf73
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 6 10:22:59 2020 +0800

    configs: rv1126: enable tftpput command
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ieee8602fdfccbb12a4ba7f8e052c50feb82f2614

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index 4669159fe5..1afd793371 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -66,6 +66,7 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TFTPPUT=y
 CONFIG_CMD_TFTP_BOOTM=y
 CONFIG_CMD_TFTP_FLASH=y
 # CONFIG_CMD_NFS is not set

commit 1da937e7287c7390c95e033344eab0f34770a011
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Tue Jun 16 17:34:40 2020 +0800

    rockchip: support vendor storage with mtd devices
    
    support vendor storage with mtd devices, the mtd partition
    name is "vnvm".
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: I6a895140df8ba12ef093acf9805f44bb436f7b29

diff --git a/arch/arm/mach-rockchip/vendor.c b/arch/arm/mach-rockchip/vendor.c
index d305bdcd7d..d6703fb9b4 100644
--- a/arch/arm/mach-rockchip/vendor.c
+++ b/arch/arm/mach-rockchip/vendor.c
@@ -8,10 +8,13 @@
 #include <malloc.h>
 #include <asm/arch/vendor.h>
 #include <boot_rkimg.h>
+#include <nand.h>
+#include <part.h>
 
 /* tag for vendor check */
 #define VENDOR_TAG		0x524B5644
 /* The Vendor partition contains the number of Vendor blocks */
+#define MTD_VENDOR_PART_NUM	1
 #define NAND_VENDOR_PART_NUM	2
 #define VENDOR_PART_NUM		4
 /* align to 64 bytes */
@@ -82,6 +85,17 @@ struct vendor_info {
 	u32 *version2;
 };
 
+struct mtd_nand_info {
+	u32 part_offset;
+	u32 part_size;
+	u32 blk_offset;
+	u32 page_offset;
+	u32 version;
+	u32 ops_size;
+	u32 page_size;
+	u32 blk_size;
+};
+
 /*
  * Calculate the offset of each field for emmc.
  * Emmc vendor info size: 64KB
@@ -114,6 +128,11 @@ static struct vendor_info vendor_info;
 /* The storage type of the device */
 static int bootdev_type;
 
+#ifdef CONFIG_MTD_BLK
+static struct mtd_nand_info nand_info;
+static const char *vendor_mtd_name = "vnvm";
+#endif
+
 /* vendor private read write ops*/
 static	int (*_flash_read)(struct blk_desc *dev_desc,
 			   u32 sec,
@@ -142,6 +161,141 @@ int flash_vendor_dev_ops_register(int (*read)(struct blk_desc *dev_desc,
 	return -EPERM;
 }
 
+#ifdef CONFIG_MTD_BLK
+static int mtd_vendor_storage_init(struct blk_desc *dev_desc)
+{
+	struct mtd_info *mtd = (struct mtd_info *)dev_desc->bdev->priv;
+	disk_partition_t vnvm_part_info;
+	void *buf = vendor_info.hdr;
+	int ret, offset;
+	int part_num, bad_block_size;
+
+	memset(&vnvm_part_info, 0x0, sizeof(vnvm_part_info));
+	part_num = part_get_info_by_name(dev_desc, vendor_mtd_name, &vnvm_part_info);
+	if (part_num < 0)
+		return -EIO;
+
+	nand_info.part_offset = (u32)vnvm_part_info.start;
+	nand_info.part_size = (u32)vnvm_part_info.size;
+	nand_info.page_offset = 0;
+	nand_info.blk_offset = 0;
+	nand_info.version = 0;
+	nand_info.page_size = mtd->writesize >> 9;
+	nand_info.blk_size = mtd->erasesize >> 9;
+	nand_info.ops_size = (FLASH_VENDOR_INFO_SIZE + mtd->writesize - 1) /
+			     mtd->writesize;
+	nand_info.ops_size *= nand_info.page_size;
+
+	/* scan bad block and calculate the real size can be used */
+	bad_block_size = 0;
+	for (offset = 0; offset < nand_info.part_size; offset += nand_info.blk_size) {
+		if (mtd_block_isbad(mtd, (nand_info.part_offset + offset) << 9))
+			bad_block_size += nand_info.blk_size;
+	}
+	nand_info.part_size -= bad_block_size;
+
+	for (offset = 0; offset < nand_info.part_size; offset += nand_info.blk_size) {
+		ret = blk_dread(dev_desc, nand_info.part_offset + offset,
+				FLASH_VENDOR_INFO_SIZE >> 9,
+				(u8 *)buf);
+		debug("%s: read %x version = %x\n", __func__,
+		      nand_info.part_offset + offset,
+		      vendor_info.hdr->version);
+		if (ret == (FLASH_VENDOR_INFO_SIZE >> 9) && vendor_info.hdr->tag == VENDOR_TAG &&
+		    vendor_info.hdr->version == *vendor_info.version2) {
+			if (vendor_info.hdr->version > nand_info.version) {
+				nand_info.version = vendor_info.hdr->version;
+				nand_info.blk_offset = offset;
+			}
+		}
+	}
+
+	debug("%s: nand_info.version = %x %x\n", __func__, nand_info.version, nand_info.blk_offset);
+	if (nand_info.version) {
+		for (offset = nand_info.blk_size  - nand_info.ops_size;
+		     offset >= 0;
+		     offset -= nand_info.ops_size) {
+			ret = blk_dread(dev_desc, nand_info.part_offset +
+					nand_info.blk_offset + offset,
+					1,
+					(u8 *)buf);
+
+			/* the page is not programed */
+			if (ret == 1 && vendor_info.hdr->tag == 0xFFFFFFFF)
+				continue;
+
+			/* point to the last programed page */
+			if (nand_info.page_offset < offset)
+				nand_info.page_offset = offset;
+
+			if (ret != 1 || vendor_info.hdr->tag != VENDOR_TAG)
+				continue;
+			ret = blk_dread(dev_desc, nand_info.part_offset +
+					nand_info.blk_offset + offset,
+					FLASH_VENDOR_INFO_SIZE >> 9,
+					(u8 *)buf);
+			debug("%s: read %x version = %x\n", __func__,
+			      nand_info.part_offset + nand_info.blk_offset  + offset,
+			      vendor_info.hdr->version);
+
+			if (ret == (FLASH_VENDOR_INFO_SIZE >> 9)  && vendor_info.hdr->tag == VENDOR_TAG &&
+			    vendor_info.hdr->version == *vendor_info.version2) {
+				nand_info.version = vendor_info.hdr->version;
+				break;
+			}
+		}
+	} else {
+		memset((u8 *)vendor_info.hdr, 0, FLASH_VENDOR_INFO_SIZE);
+		vendor_info.hdr->version = 1;
+		vendor_info.hdr->tag = VENDOR_TAG;
+		vendor_info.hdr->free_size =
+			((u32)(size_t)vendor_info.hash
+			- (u32)(size_t)vendor_info.data);
+		*vendor_info.version2 = vendor_info.hdr->version;
+	}
+
+	return 0;
+}
+
+static int mtd_vendor_write(struct blk_desc *dev_desc,
+			    u32 sec,
+			    u32 n_sec,
+			    void *buf)
+{
+	int ret, count = 0, err = 0;
+
+re_write:
+	debug("[Vendor INFO]:%s page_offset=0x%x count = %x\n", __func__, nand_info.part_offset +
+	      nand_info.blk_offset + nand_info.page_offset, count);
+	if (nand_info.page_offset >= nand_info.blk_size) {
+		nand_info.blk_offset += nand_info.blk_size;
+		if (nand_info.blk_offset >= nand_info.part_size)
+			nand_info.blk_offset = 0;
+		nand_info.page_offset = 0;
+	}
+
+	ret = blk_dwrite(dev_desc, nand_info.part_offset +
+			 nand_info.blk_offset + nand_info.page_offset,
+			 FLASH_VENDOR_INFO_SIZE >> 9,
+			 (u8 *)buf);
+
+	nand_info.page_offset += nand_info.ops_size;
+	if (ret != (FLASH_VENDOR_INFO_SIZE >> 9)) {
+		err++;
+		if (err > 3)
+			return -EIO;
+		goto re_write;
+	}
+
+	count++;
+	/* write 2 copies for reliability */
+	if (count < 2)
+		goto re_write;
+
+	return ret;
+}
+#endif
+
 /**********************************************************/
 /*              vendor API implementation                 */
 /**********************************************************/
@@ -198,6 +352,19 @@ static int vendor_ops(u8 *buffer, u32 addr, u32 n_sec, int write)
 		lba = FLASH_VENDOR_PART_OFFSET;
 		debug("[Vendor INFO]:VendorStorage offset address=0x%x\n", lba);
 		break;
+#ifdef CONFIG_MTD_BLK
+	case IF_TYPE_MTD:
+		/*
+		 * The location of VendorStorage in NAND FLASH or SPI NAND partition "vnvm"
+		 * is shown in the following figure. The partition size is at least  4
+		 * NAND FLASH blocks.
+		 * ----------------------------------------------------
+		 * |   .....    |  vnvm  |  .......                   |
+		 * ----------------------------------------------------
+		 */
+		lba = 0;
+		break;
+#endif
 	default:
 		printf("[Vendor ERROR]:Boot device type is invalid!\n");
 		return -ENODEV;
@@ -279,6 +446,17 @@ int vendor_storage_init(void)
 		version2_offset = FLASH_VENDOR_VERSION2_OFFSET;
 		part_num = VENDOR_PART_NUM;
 		break;
+#ifdef CONFIG_MTD_BLK
+	case IF_TYPE_MTD:
+		size = FLASH_VENDOR_INFO_SIZE;
+		part_size = FLASH_VENDOR_PART_BLKS;
+		data_offset = FLASH_VENDOR_DATA_OFFSET;
+		hash_offset = FLASH_VENDOR_HASH_OFFSET;
+		version2_offset = FLASH_VENDOR_VERSION2_OFFSET;
+		part_num = MTD_VENDOR_PART_NUM;
+		_flash_write = mtd_vendor_write;
+		break;
+#endif
 	default:
 		debug("[Vendor ERROR]:Boot device type is invalid!\n");
 		ret = -ENODEV;
@@ -304,6 +482,11 @@ int vendor_storage_init(void)
 	vendor_info.hash = (u32 *)(buffer + hash_offset);
 	vendor_info.version2 = (u32 *)(buffer + version2_offset);
 
+#ifdef CONFIG_MTD_BLK
+	if (dev_desc->if_type == IF_TYPE_MTD)
+		return mtd_vendor_storage_init(dev_desc);
+#endif
+
 	/* Find valid and up-to-date one from (vendor0 - vendor3) */
 	for (i = 0; i < part_num; i++) {
 		ret_size = vendor_ops((u8 *)vendor_info.hdr,
@@ -437,6 +620,13 @@ int vendor_storage_write(u16 id, void *pbuf, u16 size)
 		max_item_num = FLASH_VENDOR_ITEM_NUM;
 		part_num = VENDOR_PART_NUM;
 		break;
+#ifdef CONFIG_MTD_BLK
+	case IF_TYPE_MTD:
+		part_size = FLASH_VENDOR_PART_BLKS;
+		max_item_num = FLASH_VENDOR_ITEM_NUM;
+		part_num = MTD_VENDOR_PART_NUM;
+		break;
+#endif
 	default:
 		ret = -ENODEV;
 		break;
@@ -577,20 +767,21 @@ int vendor_storage_test(void)
 		item_num = EMMC_VENDOR_ITEM_NUM;
 		total_size = (unsigned long)vendor_info.hash -
 			     (unsigned long)vendor_info.data;
-		size = total_size/item_num;
+		size = total_size / item_num;
 		break;
 	case IF_TYPE_RKNAND:
 	case IF_TYPE_SPINAND:
 		item_num = NAND_VENDOR_ITEM_NUM;
 		total_size = (unsigned long)vendor_info.hash -
 			     (unsigned long)vendor_info.data;
-		size = total_size/item_num;
+		size = total_size / item_num;
 		break;
 	case IF_TYPE_SPINOR:
+	case IF_TYPE_MTD:
 		item_num = FLASH_VENDOR_ITEM_NUM;
 		total_size = (unsigned long)vendor_info.hash -
 			     (unsigned long)vendor_info.data;
-		size = total_size/item_num;
+		size = total_size / item_num;
 		break;
 	default:
 		total_size = 0;
@@ -600,7 +791,8 @@ int vendor_storage_test(void)
 	if (!total_size)
 		return -ENODEV;
 	/* 64 bytes are aligned and rounded down */
-	size = (size/64)*64;
+	if (size > 64)
+		size = (size / 64) * 64;
 	/* malloc memory */
 	buffer = (u8 *)malloc(size);
 	if (!buffer) {
@@ -609,12 +801,12 @@ int vendor_storage_test(void)
 	}
 	printf("[Vendor Test]:Test Start...\n");
 	printf("[Vendor Test]:Before Test, Vendor Resetting.\n");
-	vendor_test_reset();
+	if (bootdev_type != IF_TYPE_MTD)
+		vendor_test_reset();
 
 	/* FIRST TEST: test all items can be used correctly */
 	printf("[Vendor Test]:<All Items Used> Test Start...\n");
-	printf("[Vendor Test]:item_num=%d, size=%d.\n",
-	       item_num, size);
+	printf("[Vendor Test]:item_num=%d, size=%d.\n", item_num, size);
 	/*
 	 * Write data, then read the data, and compare the
 	 * data consistency
@@ -652,6 +844,35 @@ int vendor_storage_test(void)
 	}
 	printf("[Vendor Test]:<All Items Used> Test End,States:OK\n");
 
+	printf("[Vendor Test]:<All Items Used> re init,States:OK\n");
+	ret = vendor_storage_init();
+	/* Read data */
+	for (id = 0; id < item_num; id++) {
+		memset(buffer, 0, size);
+		ret = vendor_storage_read(id, buffer, size);
+		if (ret < 0) {
+			printf("[Vendor Test]:vendor read failed(id=%d)!\n", id);
+			free(buffer);
+			return ret;
+		}
+		/* check data Correctness */
+		for (j = 0; j < size; j++) {
+			if (*(buffer + j) != id) {
+				printf("[Vendor Test]:Unexpected error occurs(id=%d)\n", id);
+				printf("the data content is:\n");
+				print_buffer(0, buffer, 1, size, 16);
+
+				free(buffer);
+				return -1;
+			}
+		}
+		debug("\t#id=%03d success,data=0x%02x,size=%d.\n", id, *buffer, size);
+	}
+	printf("[Vendor Test]:<All Items Used> Test End,States:OK\n");
+#ifdef CONFIG_MTD_BLK
+	if (bootdev_type == IF_TYPE_MTD)
+		return 0;
+#endif
 	/*
 	 * SECOND TEST: Overrides the maximum number of items to see if the
 	 * return value matches the expectation

commit 0d7448d0321c255dea1c1ea112060fb976a2fac0
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jul 2 16:38:39 2020 +0800

    make.sh: fit: apply make_fit_boot.sh to make boot.img
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I406d519725c750386784576416b662b448859f67

diff --git a/make.sh b/make.sh
index e02fba0a54..935d141ce2 100755
--- a/make.sh
+++ b/make.sh
@@ -310,7 +310,7 @@ function sub_commands()
 
 		fit)
 			if [ "${arg}" == "ns" ]; then
-				./scripts/fit-mkimg.sh --uboot-itb --boot-itb --no-vboot ${ARG_FIT}
+				./scripts/fit-mkimg.sh --uboot-itb --boot-itb --no-vboot ${ARG_LIST_FIT}
 			fi
 			exit 0
 			;;
diff --git a/scripts/fit-mkimg.sh b/scripts/fit-mkimg.sh
index bf4e894365..66db8347eb 100755
--- a/scripts/fit-mkimg.sh
+++ b/scripts/fit-mkimg.sh
@@ -38,6 +38,7 @@ SPL_DTB="spl/u-boot-spl.dtb"
 UBOOT_DTB="u-boot.dtb"
 # its
 ITS_UBOOT="u-boot.its"
+ITS_BOOT="boot.its"
 
 function help()
 {
@@ -295,8 +296,11 @@ function fit_gen_boot_itb()
 		${FIT_UNPACK} -f ${ARG_EXT_BOOT} -o ${FIT_DIR}/unpack
 		ITS_BOOT="${FIT_DIR}/unpack/image.its"
 	else
-		ITS_BOOT="kernel_arm.its"
-		cp arch/arm/mach-rockchip/${ITS_BOOT} ./
+		compression=`awk -F"," '/COMPRESSION=/  { printf $1 }' ${ARG_INI_TRUST} | tr -d ' ' | cut -c 13-`
+		if [ -z "${compression}" ]; then
+			compression="none"
+		fi
+		./arch/arm/mach-rockchip/make_fit_boot.sh -c ${compression} > ${ITS_BOOT}
 		check_its ${ITS_BOOT}
 	fi
 
@@ -457,15 +461,6 @@ function fit_vboot_uboot()
 	fit_msg_uboot
 }
 
-function fit_vboot_boot()
-{
-	fit_rebuild
-	fit_boot_make_itb
-	fit_boot_make_img
-	echo
-	fit_verbose_boot
-}
-
 function fit_vboot()
 {
 	fit_rebuild

commit 146289715c98dcb3526f930aa2583ba5a5876469
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jul 2 16:38:19 2020 +0800

    rockchip: make fit: add scritp to make boot.its
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I8432dabdaee9a1d5be182d504478516e7163a458

diff --git a/arch/arm/mach-rockchip/kernel_arm.its b/arch/arm/mach-rockchip/make_fit_boot.sh
old mode 100644
new mode 100755
similarity index 61%
rename from arch/arm/mach-rockchip/kernel_arm.its
rename to arch/arm/mach-rockchip/make_fit_boot.sh
index cff4dafa99..f985779247
--- a/arch/arm/mach-rockchip/kernel_arm.its
+++ b/arch/arm/mach-rockchip/make_fit_boot.sh
@@ -1,3 +1,23 @@
+#!/bin/bash
+#
+# Copyright (C) 2020 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+# Process args and auto set variables
+source ./${srctree}/arch/arm/mach-rockchip/make_fit_args.sh
+
+if [ "${COMPRESSION}" == "gzip" ]; then
+	gzip -k -f -9 ${srctree}/images/kernel
+	gzip -k -f -9 ${srctree}/images/ramdisk
+	SUFFIX=".gz"
+else
+	COMPRESSION="none"
+	SUFFIX=
+fi
+
+cat << EOF
 /*
  * Copyright (C) 2020 Fuzhou Rockchip Electronics Co., Ltd
  *
@@ -13,7 +33,7 @@
 
 	images {
 		fdt {
-			data = /incbin/("images/rk-kernel.dtb");
+			data = /incbin/("./images/rk-kernel.dtb");
 			type = "flat_dt";
 			arch = "arm";
 			compression = "none";
@@ -24,11 +44,13 @@
 		};
 
 		kernel {
-			data = /incbin/("images/kernel.img");
+EOF
+echo "			data = /incbin/(\"./images/kernel${SUFFIX}\");"
+echo "			compression = \"${COMPRESSION}\";"
+cat << EOF
 			type = "kernel";
 			arch = "arm";
 			os = "linux";
-			compression = "none";
 			entry = <0xffffff01>;
 			load  = <0xffffff01>;
 			hash {
@@ -37,11 +59,13 @@
 		};
 
 		ramdisk {
-			data = /incbin/("images/ramdisk.img");
+EOF
+echo "			data = /incbin/(\"./images/ramdisk${SUFFIX}\");"
+echo "			compression = \"${COMPRESSION}\";"
+cat << EOF
 			type = "ramdisk";
 			arch = "arm";
 			os = "linux";
-			compression = "none";
 			load  = <0xffffff02>;
 			hash {
 				algo = "sha256";
@@ -49,7 +73,7 @@
 		};
 
 		resource {
-			data = /incbin/("images/resource.img");
+			data = /incbin/("./images/resource");
 			type = "multi";
 			arch = "arm";
 			compression = "none";
@@ -76,3 +100,5 @@
 		};
 	};
 };
+
+EOF

commit eaeb6d442df885be54902b12ad1f03dbd438f2e7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jul 2 16:37:29 2020 +0800

    rockchip: rv1126: make fit: add copyright
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ib1d2b650a5386f01c34030a86e6d33a133650572

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh b/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh
index eca31048cf..905c05e68b 100755
--- a/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh
+++ b/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh
@@ -1,4 +1,9 @@
 #!/bin/bash
+#
+# Copyright (C) 2020 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
 
 # Process args and auto set variables
 source ./${srctree}/arch/arm/mach-rockchip/make_fit_args.sh

commit 1a2ec6b5b5dc2ccaffdddb21e07236a571ed2227
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jul 1 09:57:33 2020 +0800

    make.sh: support assign compression
    
    Use new args mechanism to call fit generator script.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ifc74852d5de1b76ea103981e7a71c3cb5e12a961

diff --git a/make.sh b/make.sh
index 50f7d569ab..e02fba0a54 100755
--- a/make.sh
+++ b/make.sh
@@ -578,8 +578,16 @@ function pack_uboot_itb_image()
 		mcu_enabled=`awk -F"," '/MCU=/ { printf $3 }' ${ini} | tr -d ' '`
 		if [ "${mcu_enabled}" == "enabled" ]; then
 			mcu_image=`awk -F"," '/MCU=/  { printf $1 }' ${ini} | tr -d ' ' | cut -c 5-`
-			mcu_offset=`awk -F"," '/MCU=/ { printf $2 }' ${ini} | tr -d ' '`
 			cp ${RKBIN}/${mcu_image} mcu.bin
+			mcu_offset=`awk -F"," '/MCU=/ { printf $2 }' ${ini} | tr -d ' '`
+			optional_mcu="-m "${mcu_offset}
+		else
+			optional_mcu=
+		fi
+
+		compression=`awk -F"," '/COMPRESSION=/  { printf $1 }' ${ini} | tr -d ' ' | cut -c 13-`
+		if [ -z "${compression}" ]; then
+			compression="none"
 		fi
 
 		SPL_FIT_SOURCE=`sed -n "/CONFIG_SPL_FIT_SOURCE=/s/CONFIG_SPL_FIT_SOURCE=//p" .config | tr -d '""'`
@@ -587,7 +595,7 @@ function pack_uboot_itb_image()
 			cp ${SPL_FIT_SOURCE} u-boot.its
 		else
 			SPL_FIT_GENERATOR=`sed -n "/CONFIG_SPL_FIT_GENERATOR=/s/CONFIG_SPL_FIT_GENERATOR=//p" .config | tr -d '""'`
-			${SPL_FIT_GENERATOR} ${tee_offset} ${mcu_offset} > u-boot.its
+			${SPL_FIT_GENERATOR} -u -t ${tee_offset} -c ${compression} ${optional_mcu} > u-boot.its
 		fi
 		./tools/mkimage -f u-boot.its -E u-boot.itb
 		echo "pack u-boot.itb okay! Input: ${ini}"

commit 38825515368693794b1c31e6d9436a4a35247827
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jul 1 09:55:05 2020 +0800

    rockchip: rv1126: make fit: support compression assignment
    
    - Call make_fit_args.sh script to process all args.
    - Clean up code.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Icfa04c4fc2ab4f64dfd389f71309776d924e9ebd

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh b/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh
index b7a580a764..eca31048cf 100755
--- a/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh
+++ b/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh
@@ -1,5 +1,25 @@
 #!/bin/bash
 
+# Process args and auto set variables
+source ./${srctree}/arch/arm/mach-rockchip/make_fit_args.sh
+
+if [ "${COMPRESSION}" == "gzip" ]; then
+	gzip -k -f -9 ${srctree}/u-boot-nodtb.bin
+	gzip -k -f -9 ${srctree}/tee.bin
+	SUFFIX=".gz"
+else
+	COMPRESSION="none"
+	SUFFIX=
+fi
+
+# mcu
+if [ ! -z "${MCU_LOAD_ADDR}" ]; then
+	if [ "${COMPRESSION}" == "gzip" ]; then
+		gzip -k -f -9 ${srctree}/mcu.bin
+	fi
+fi
+
+# .its file generation
 cat << EOF
 /*
  * Copyright (C) 2017 Rockchip Electronic Co.,Ltd
@@ -16,17 +36,15 @@ cat << EOF
 	images {
 		uboot {
 			description = "U-Boot";
-			data = /incbin/("./u-boot-nodtb.bin");
 			type = "standalone";
 			os = "U-Boot";
 			arch = "arm";
-			compression = "none";
 EOF
 
-OUTDIR=$PWD
-DARM_BASE=`sed -n "/CONFIG_SYS_SDRAM_BASE=/s/CONFIG_SYS_SDRAM_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
-UBOOT_BASE=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
-echo "			load = <"$UBOOT_BASE">;"
+echo "			data = /incbin/(\"./u-boot-nodtb.bin${SUFFIX}\");"
+echo "			compression = \"${COMPRESSION}\";"
+echo "			load = <"${UBOOT_LOAD_ADDR}">;"
+
 cat << EOF
 			hash {
 				algo = "sha256";
@@ -34,22 +52,16 @@ cat << EOF
 		};
 		optee {
 			description = "OP-TEE";
-			data = /incbin/("./tee.bin");
 			type = "firmware";
 			arch = "arm";
 			os = "op-tee";
-			compression = "none";
 EOF
 
-if [ -z "$1" -o ! -z "$(echo $1 | sed 's/[x, X, 0-9, a-f, A-F]//g')" ]; then
-	TEE_OFFSET=0x8400000
-else
-	TEE_OFFSET=$1
-fi
-TEE_LOAD_ADDR=$((DARM_BASE+TEE_OFFSET))
-TEE_LOAD_ADDR=$(echo "obase=16;${TEE_LOAD_ADDR}"|bc)
-echo "			load = <0x"$TEE_LOAD_ADDR">;"
-echo "			entry = <0x"$TEE_LOAD_ADDR">;"
+echo "			load = <0x"${TEE_LOAD_ADDR}">;"
+echo "			entry = <0x"${TEE_LOAD_ADDR}">;"
+echo "			data = /incbin/(\"./tee.bin${SUFFIX}\");"
+echo "			compression = \"${COMPRESSION}\";"
+
 cat << EOF
 			hash {
 				algo = "sha256";
@@ -66,20 +78,19 @@ cat << EOF
 		};
 EOF
 
-MCU_OFFSET=$2
-if [ "$MCU_OFFSET" != "" ]; then
-MCU_LOAD_ADDR=$((DARM_BASE+$MCU_OFFSET))
-MCU_LOAD_ADDR=$(echo "obase=16;${MCU_LOAD_ADDR}"|bc)
+if [ ! -z "${MCU_LOAD_ADDR}" ]; then
 cat  << EOF
 		mcu {
 			description = "mcu";
-			data = /incbin/("./mcu.bin");
 			type = "standalone";
-			compression = "none";
+			arch = "riscv";
 EOF
-echo "			load = <0x"$MCU_LOAD_ADDR">;"
+
+echo "			data = /incbin/(\"./mcu.bin${SUFFIX}\");"
+echo "			compression = \"${COMPRESSION}\";"
+echo "			load = <0x"${MCU_LOAD_ADDR}">;"
+
 cat  << EOF
-			arch = "riscv";
 			hash {
 				algo = "sha256";
 			};
@@ -100,7 +111,7 @@ cat  << EOF
 			fdt = "fdt";
 EOF
 
-if [ "$MCU_OFFSET" != "" ]; then
+if [ ! -z "${MCU_LOAD_ADDR}" ]; then
 echo "			standalone = \"mcu\";"
 fi
 
@@ -110,7 +121,7 @@ cat  << EOF
 				key-name-hint = "dev";
 EOF
 
-if [ "$MCU_OFFSET" != "" ]; then
+if [ ! -z "${MCU_LOAD_ADDR}" ]; then
 echo "			        sign-images = \"fdt\", \"firmware\", \"loadables\", \"standalone\";"
 else
 echo "			        sign-images = \"fdt\", \"firmware\", \"loadables\";"

commit c0124274675aee4be6f56e20f926afbeb9e8f444
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jul 1 09:53:56 2020 +0800

    rockchip: fit: add args process script
    
    It's common for all rockchip platform to make its file.
    
    Process args for all rockchip fit generator script, and
    providing variables for it's caller.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If9d741d16e397234d265f4ae32739514bfd7a5d1

diff --git a/arch/arm/mach-rockchip/make_fit_args.sh b/arch/arm/mach-rockchip/make_fit_args.sh
new file mode 100755
index 0000000000..d52efff84e
--- /dev/null
+++ b/arch/arm/mach-rockchip/make_fit_args.sh
@@ -0,0 +1,81 @@
+#!/bin/bash
+#
+# Copyright (c) 2020 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier: GPL-2.0
+#
+
+srctree=$PWD
+
+function help()
+{
+	echo
+	echo "Description:"
+	echo "    Process args for all rockchip fit generator script, and providing variables for it's caller"
+	echo
+	echo "Usage:"
+	echo "    $0 [args]"
+	echo
+	echo "[args]:"
+	echo "--------------------------------------------------------------------------------------------"
+	echo "    arg                 type       output variable       description"
+	echo "--------------------------------------------------------------------------------------------"
+	echo "    -c [comp]     ==>   <string>   COMPRESSION           set compression: \"none\", \"gzip\""
+	echo "    -m [offset]   ==>   <hex>      MCU_LOAD_ADDR         set mcu.bin offset address"
+	echo "    -t [offset]   ==>   <hex>      TEE_LOAD_ADDR         set tee.bin offset address"
+	echo "    -u            ==>   -          UBOOT_LOAD_ADDR       auto get CONFIG_SYS_TEXT_BASE address"
+	echo
+}
+
+if [ -z $1 ]; then
+	help
+	exit
+fi
+
+# args
+while [ $# -gt 0 ]; do
+	case $1 in
+		--help|-help|help|--h|-h)
+			help
+			exit
+			;;
+		-c)
+			COMPRESSION=$2
+			shift 2
+			;;
+		-m)
+			MCU_OFFSET=$2
+			shift 2
+			;;
+		-t)
+			TEE_OFFSET=$2
+			shift 2
+			;;
+		-u)
+			UBOOT_LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${srctree}/include/autoconf.mk|tr -d '\r'`
+			shift 1
+			;;
+		*)
+			echo "Invalid arg: $1"
+			help
+			exit 1
+			;;
+	esac
+done
+
+# Base
+DARM_BASE=`sed -n "/CONFIG_SYS_SDRAM_BASE=/s/CONFIG_SYS_SDRAM_BASE=//p" ${srctree}/include/autoconf.mk|tr -d '\r'`
+
+# tee
+if [ ! -z "${TEE_OFFSET}" ]; then
+	TEE_LOAD_ADDR=$((DARM_BASE+TEE_OFFSET))
+	TEE_LOAD_ADDR=$(echo "obase=16;${TEE_LOAD_ADDR}"|bc)
+fi
+
+# mcu
+if [ ! -z "$MCU_OFFSET" ]; then
+	MCU_LOAD_ADDR=$((DARM_BASE+$MCU_OFFSET))
+	MCU_LOAD_ADDR=$(echo "obase=16;${MCU_LOAD_ADDR}"|bc)
+fi
+
+# echo " ## $DARM_BASE, $UBOOT_LOAD_ADDR, $TEE_LOAD_ADDR, $MCU_LOAD_ADDR"

commit 0600347b91c10c42b99269df252898b6a19b4714
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jul 1 10:37:13 2020 +0800

    tools: rockchip: trust_merger: allow unknown option
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I88eb3946c7a343a0af5ed662d6fb5ef848d8c929

diff --git a/tools/rockchip/trust_merger.c b/tools/rockchip/trust_merger.c
index 627108ea81..b6e8ab6a3f 100644
--- a/tools/rockchip/trust_merger.c
+++ b/tools/rockchip/trust_merger.c
@@ -324,8 +324,8 @@ static bool parseOpts(void)
 		} else if (buf[0] == '#') {
 			continue;
 		} else {
-			LOGE("unknown sec: %s!\n", buf);
-			goto end;
+			LOGD("unknown sec: %s!\n", buf);
+			continue;
 		}
 		if (SCANF_EAT(file) != 0) {
 			goto end;

commit 2833da14a16c48764872619178c130578866b3ad
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 29 18:48:24 2020 +0800

    pmic: rk8xx: fix compile error if CONFIG_IRQ is disabled
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I23a0da11618822be08f233cd0c75f550e8d8ca3a

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index d0917115a7..a0a2e80aed 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -278,17 +278,6 @@ static int rk8xx_shutdown(struct udevice *dev)
 	return 0;
 }
 
-/*
- * When system suspend during U-Boot charge, make sure the plugout event
- * be able to wakeup cpu in wfi/wfe state.
- */
-#ifdef CONFIG_DM_CHARGE_DISPLAY
-static void rk8xx_plug_out_handler(int irq, void *data)
-{
-	printf("Plug out interrupt\n");
-}
-#endif
-
 #if CONFIG_IS_ENABLED(PMIC_CHILDREN)
 static int rk8xx_bind(struct udevice *dev)
 {
@@ -330,6 +319,17 @@ static int rk8xx_bind(struct udevice *dev)
 #endif
 
 #if defined(CONFIG_IRQ) && !defined(CONFIG_SPL_BUILD)
+/*
+ * When system suspend during U-Boot charge, make sure the plugout event
+ * be able to wakeup cpu in wfi/wfe state.
+ */
+#ifdef CONFIG_DM_CHARGE_DISPLAY
+static void rk8xx_plug_out_handler(int irq, void *data)
+{
+	printf("Plug out interrupt\n");
+}
+#endif
+
 static int rk8xx_ofdata_to_platdata(struct udevice *dev)
 {
 	struct rk8xx_priv *rk8xx = dev_get_priv(dev);

commit a79c31be17a20971dc676dbbba2a08e2659e7901
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jul 1 09:56:45 2020 +0800

    rockchip: dts: rv1126: enlarge spi_nor's spi-max-frequency
    
    The high speed spi nor's max frequency is about 133MHz and the
    IO interface rate is about 100MHz, so enlarge spi-max-frequency
    to 100MHz.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I9ef7e459dece5e70eefd72024264a94a672636d1

diff --git a/arch/arm/dts/rv1126-u-boot.dtsi b/arch/arm/dts/rv1126-u-boot.dtsi
index ce01e69dae..01547feff6 100644
--- a/arch/arm/dts/rv1126-u-boot.dtsi
+++ b/arch/arm/dts/rv1126-u-boot.dtsi
@@ -107,7 +107,7 @@
 		reg = <0>;
 		spi-tx-bus-width = <1>;
 		spi-rx-bus-width = <4>;
-		spi-max-frequency = <96000000>;
+		spi-max-frequency = <100000000>;
 	};
 };
 

commit cf13b784384f1f05c8a3a49a76e67e5e77e96caa
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 23 14:52:39 2020 +0800

    rockchip: spl: add rollback index check with otp
    
    Add rollback index check with otp, support OTP V2 only.
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: I640a44e55f00ac55215fa8aa3a3b63e0d75f6422

diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index 30d0ef4103..d86abe239b 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -305,11 +305,84 @@ void spl_hang_reset(void)
 #endif
 }
 
+#ifdef CONFIG_SPL_FIT_ROLLBACK_PROTECT
+int fit_read_otp_rollback_index(uint32_t fit_index, uint32_t *otp_index)
+{
+	int ret = 0;
+
+	*otp_index = 0;
+#if defined(CONFIG_SPL_ROCKCHIP_SECURE_OTP_V2)
+	struct udevice *dev;
+	u32 index, i, otp_version;
+	u32 bit_count;
+
+	dev = misc_otp_get_device(OTP_S);
+	if (!dev)
+		return -ENODEV;
+
+	otp_version = 0;
+	for (i = 0; i < OTP_UBOOT_ROLLBACK_WORDS; i++) {
+		if (misc_otp_read(dev, 4 *
+		    (OTP_UBOOT_ROLLBACK_OFFSET + i),
+		    &index,
+		    4)) {
+			printf("Can't read rollback index\n");
+			return -EIO;
+		}
+		bit_count = fls(index);
+		otp_version += bit_count;
+	}
+	*otp_index = otp_version;
+#endif
+
+	return ret;
+}
+
+static int fit_write_otp_rollback_index(u32 fit_index)
+{
+#if defined(CONFIG_SPL_ROCKCHIP_SECURE_OTP_V2)
+	struct udevice *dev;
+	u32 index, i, otp_index;
+
+	if (!fit_index || fit_index > OTP_UBOOT_ROLLBACK_WORDS * 32)
+		return -EINVAL;
+
+	dev = misc_otp_get_device(OTP_S);
+	if (!dev)
+		return -ENODEV;
+
+	if (fit_read_otp_rollback_index(fit_index, &otp_index))
+		return -EIO;
+
+	if (otp_index < fit_index) {
+		/* Write new SW version to otp */
+		for (i = 0; i < OTP_UBOOT_ROLLBACK_WORDS; i++) {
+			/* convert to base-1 representation */
+			index = 0xffffffff >> (OTP_ALL_ONES_NUM_BITS -
+				min(fit_index, (u32)OTP_ALL_ONES_NUM_BITS));
+			fit_index -= min(fit_index,
+					  (u32)OTP_ALL_ONES_NUM_BITS);
+			if (index) {
+				if (misc_otp_write(dev, 4 *
+				    (OTP_UBOOT_ROLLBACK_OFFSET + i),
+				    &index,
+				    4)) {
+					printf("Can't write rollback index\n");
+					return -EIO;
+				}
+			}
+		}
+	}
+#endif
+
+	return 0;
+}
+#endif
+
 int spl_board_prepare_for_jump(struct spl_image_info *spl_image)
 {
-#if CONFIG_SPL_FIT_ROLLBACK_PROTECT
-	/* TODO */
-	printf("spl fit: rollback protect not implement\n");
+#ifdef CONFIG_SPL_FIT_ROLLBACK_PROTECT
+	return fit_write_otp_rollback_index(gd->rollback_index);
 #endif
 	return 0;
 }
diff --git a/include/configs/rv1126_common.h b/include/configs/rv1126_common.h
index 1b1a833d16..9f942afdaa 100644
--- a/include/configs/rv1126_common.h
+++ b/include/configs/rv1126_common.h
@@ -36,6 +36,11 @@
 #define GICD_BASE			0xfeff1000
 #define GICC_BASE			0xfeff2000
 
+/* secure boot otp rollback */
+#define OTP_UBOOT_ROLLBACK_OFFSET	0x1A	/* word address */
+#define OTP_UBOOT_ROLLBACK_WORDS	2	/* 64 bits, 2 words */
+#define OTP_ALL_ONES_NUM_BITS		32
+
 /* MMC/SD IP block */
 #define CONFIG_BOUNCE_BUFFER
 

commit c29dd8c434d8d17a8c523a43d9e0bab56945eaf9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Jun 28 10:41:55 2020 +0800

    rockchip: board: add rollback index check with trusty
    
    None-zero gd->rollback_index value should be written into
    trusty.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ib964c5883e5083a3f9828415ee05819960d20139

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index e3c5609563..39dc8545ea 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -35,6 +35,7 @@
 #include <power/charge_display.h>
 #include <power/regulator.h>
 #include <optee_include/OpteeClientInterface.h>
+#include <optee_include/tee_api_defines.h>
 #include <asm/arch/boot_mode.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/cpu.h>
@@ -825,6 +826,52 @@ void board_fit_image_post_process(void **p_image, size_t *p_size)
 }
 #endif
 
+#ifdef CONFIG_FIT_ROLLBACK_PROTECT
+
+#define FIT_ROLLBACK_INDEX_LOCATION	0x66697472	/* "fitr" */
+
+int fit_read_otp_rollback_index(uint32_t fit_index, uint32_t *otp_index)
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	u64 index;
+	int ret;
+
+	ret = trusty_read_rollback_index(FIT_ROLLBACK_INDEX_LOCATION, &index);
+	if (ret) {
+		if (ret != TEE_ERROR_ITEM_NOT_FOUND)
+			return ret;
+
+		*otp_index = fit_index;
+		printf("Initial otp index as %d\n", fit_index);
+	}
+
+	*otp_index = index;
+#else
+	*otp_index = 0;
+#endif
+
+	return 0;
+}
+
+static int fit_write_trusty_rollback_index(u32 trusty_index)
+{
+	int ret;
+
+	if (!trusty_index)
+		return 0;
+
+	ret = trusty_write_rollback_index(FIT_ROLLBACK_INDEX_LOCATION,
+					  (u64)trusty_index);
+	if (ret) {
+		printf("Failed to write fit rollback index %d, ret=%d\n",
+		       trusty_index, ret);
+		return ret;
+	}
+
+	return 0;
+}
+#endif
+
 void board_quiesce_devices(void *images)
 {
 	hotkey_run(HK_CMDLINE);
@@ -836,7 +883,6 @@ void board_quiesce_devices(void *images)
 #endif
 
 #ifdef CONFIG_FIT_ROLLBACK_PROTECT
-	/* TODO */
-	printf("fit: rollback protect not implement\n");
+	fit_write_trusty_rollback_index(gd->rollback_index);
 #endif
 }

commit 6192a90a8ab41dabebb2117333e579e39b6079c7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 30 12:42:41 2020 +0800

    rockchip: weak: implement fit_rollback_index_verify()
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I8156718ccd0e0b3d6ed470f45ff3d5f5c03715ef

diff --git a/arch/arm/mach-rockchip/weak.c b/arch/arm/mach-rockchip/weak.c
index d23c24faa9..01c035e20b 100644
--- a/arch/arm/mach-rockchip/weak.c
+++ b/arch/arm/mach-rockchip/weak.c
@@ -17,6 +17,39 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #if CONFIG_IS_ENABLED(FIT)
 
+/*
+ * Override __weak fit_rollback_index_verify() for SPL & U-Boot proper.
+ */
+#if CONFIG_IS_ENABLED(FIT_ROLLBACK_PROTECT)
+int fit_rollback_index_verify(const void *fit, uint32_t rollback_fd,
+			      uint32_t *fit_index, uint32_t *otp_index)
+{
+	int conf_noffset, ret;
+
+	conf_noffset = fit_conf_get_node(fit, NULL); /* NULL for default conf */
+	if (conf_noffset < 0)
+		return conf_noffset;
+
+	ret = fit_image_get_rollback_index(fit, conf_noffset, fit_index);
+	if (ret) {
+		printf("Failed to get rollback-index from FIT, ret=%d\n", ret);
+		return ret;
+	}
+
+	ret = fit_read_otp_rollback_index(*fit_index, otp_index);
+	if (ret) {
+		printf("Failed to get rollback-index from otp, ret=%d\n", ret);
+		return ret;
+	}
+
+	/* Should update rollback index to otp ! */
+	if (*otp_index < *fit_index)
+		gd->rollback_index = *fit_index;
+
+	return 0;
+}
+#endif
+
 /*
  * Override __weak fit_board_verify_required_sigs() for SPL & U-Boot proper.
  */

commit 8438d871e2c0486edf7e3f966523a08313ac48bb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 30 12:38:36 2020 +0800

    rockchip: add weak.c for SPL and U-Boot proper
    
    Implement __weak functions in this file.
    Move fit_board_verify_required_sigs() to here.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I4d748f7bfe4cbc9a8f2f96f30978d3e64b73b9aa

diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 25e4e09db7..47c5796a76 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -14,6 +14,10 @@ obj-tpl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o
 obj-tpl-y += tpl.o
 obj-spl-y += spl.o spl-boot-order.o
 
+ifndef CONFIG_TPL_BUILD
+obj-y += weak.o
+endif
+
 ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
 
 # Always include boot_mode.o, as we bypass it (i.e. turn it off)
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index a905bb70ed..e3c5609563 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -812,23 +812,6 @@ void autoboot_command_fail_handle(void)
 #endif
 }
 
-int fit_board_verify_required_sigs(void)
-{
-	uint8_t vboot = 0;
-#ifdef CONFIG_OPTEE_CLIENT
-	int ret;
-
-	ret = trusty_read_vbootkey_enable_flag(&vboot);
-	if (ret) {
-		printf("Can't read verified-boot flag, ret=%d\n", ret);
-		return 1;
-	}
-#endif
-	printf("## Verified-boot: %d\n", vboot);
-
-	return vboot;
-}
-
 #ifdef CONFIG_FIT_IMAGE_POST_PROCESS
 void board_fit_image_post_process(void **p_image, size_t *p_size)
 {
diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index b051d1f0ee..30d0ef4103 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -305,26 +305,6 @@ void spl_hang_reset(void)
 #endif
 }
 
-int fit_board_verify_required_sigs(void)
-{
-	uint8_t vboot = 0;
-#if defined(CONFIG_SPL_ROCKCHIP_SECURE_OTP) || defined(CONFIG_SPL_ROCKCHIP_SECURE_OTP_V2)
-	struct udevice *dev;
-
-	dev = misc_otp_get_device(OTP_S);
-	if (!dev)
-		return 1;
-
-	if (misc_otp_read(dev, 0, &vboot, 1)) {
-		printf("Can't read verified-boot flag\n");
-		return 1;
-	}
-#endif
-	printf("## Verified-boot: %d\n", vboot == 0xff);
-
-	return vboot == 0xff;
-}
-
 int spl_board_prepare_for_jump(struct spl_image_info *spl_image)
 {
 #if CONFIG_SPL_FIT_ROLLBACK_PROTECT
diff --git a/arch/arm/mach-rockchip/weak.c b/arch/arm/mach-rockchip/weak.c
new file mode 100644
index 0000000000..d23c24faa9
--- /dev/null
+++ b/arch/arm/mach-rockchip/weak.c
@@ -0,0 +1,60 @@
+/*
+ * (C) Copyright 2020 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <boot_rkimg.h>
+#include <misc.h>
+#ifdef CONFIG_SPL_BUILD
+#include <spl.h>
+#endif
+#include <optee_include/OpteeClientInterface.h>
+#include <optee_include/tee_api_defines.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#if CONFIG_IS_ENABLED(FIT)
+
+/*
+ * Override __weak fit_board_verify_required_sigs() for SPL & U-Boot proper.
+ */
+int fit_board_verify_required_sigs(void)
+{
+	uint8_t vboot = 0;
+
+#ifdef CONFIG_SPL_BUILD
+#if defined(CONFIG_SPL_ROCKCHIP_SECURE_OTP) || \
+    defined(CONFIG_SPL_ROCKCHIP_SECURE_OTP_V2)
+	struct udevice *dev;
+
+	dev = misc_otp_get_device(OTP_S);
+	if (!dev)
+		return 1;
+
+	if (misc_otp_read(dev, 0, &vboot, 1)) {
+		printf("Can't read verified-boot flag\n");
+		return 1;
+	}
+
+	vboot = (vboot == 0xff);
+#endif
+#else /* !CONFIG_SPL_BUILD */
+#ifdef CONFIG_OPTEE_CLIENT
+	int ret;
+
+	ret = trusty_read_vbootkey_enable_flag(&vboot);
+	if (ret) {
+		printf("Can't read verified-boot flag, ret=%d\n", ret);
+		return 1;
+	}
+#endif
+#endif /* CONFIG_SPL_BUILD*/
+
+	printf("## Verified-boot: %d\n", vboot);
+
+	return vboot;
+}
+
+#endif /* CONFIG_IS_ENABLED(FIT) */

commit 9db5ffeb0056d2961a801234835424ded8defccd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 29 16:48:39 2020 +0800

    common: image: add weak fit_read_otp_rollback_index()
    
    Board should implement it.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I95023ce489c4335fdd9034d9577ce242eac0f1ea

diff --git a/common/image-sig.c b/common/image-sig.c
index 6d3216511e..0070ca8c4d 100644
--- a/common/image-sig.c
+++ b/common/image-sig.c
@@ -474,6 +474,12 @@ int fit_config_verify(const void *fit, int conf_noffset)
 
 #ifndef USE_HOSTCC
 #if CONFIG_IS_ENABLED(FIT_ROLLBACK_PROTECT)
+__weak int fit_read_otp_rollback_index(uint32_t fit_index, uint32_t *otp_index)
+{
+	*otp_index = 0;
+
+	return 0;
+}
 __weak int fit_rollback_index_verify(const void *fit, uint32_t rollback_fd,
 				     uint32_t *this_index, uint32_t *min_index)
 {
diff --git a/include/image.h b/include/image.h
index 237be6c5d6..d15b345362 100644
--- a/include/image.h
+++ b/include/image.h
@@ -1067,8 +1067,11 @@ int fit_check_format(const void *fit);
 
 int fit_conf_find_compat(const void *fit, const void *fdt);
 int fit_conf_get_node(const void *fit, const char *conf_uname);
+
+/* __weak function */
 int fit_rollback_index_verify(const void *fit, uint32_t rollback_fd,
 			      uint32_t *fit_index, uint32_t *otp_index);
+int fit_read_otp_rollback_index(uint32_t fit_index, uint32_t *otp_index);
 
 /**
  * fit_conf_get_prop_node() - Get node refered to by a configuration

commit e5ca21e884db86b09f148fa8804b2220654f885c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Jun 28 09:07:59 2020 +0800

    common: fit: add more info for otp index
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I9360d3d4bc16c1c1f5e4a2310e79858d38413eb8

diff --git a/common/image-fit.c b/common/image-fit.c
index e5996414ee..1d7791c515 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -2015,7 +2015,7 @@ int fit_image_load_index(bootm_headers_t *images, ulong addr,
 					return -EINVAL;
 				}
 
-				printf("%d >= %d, OK\n", this_index, min_index);
+				printf("%d >= %d(min), OK\n", this_index, min_index);
 #endif
 			}
 			bootstage_mark(BOOTSTAGE_ID_FIT_CONFIG);
diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index f917b17645..f732fba413 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -437,7 +437,7 @@ static int spl_internal_load_simple_fit(struct spl_image_info *spl_image,
 	}
 
 	spl_image->rollback_index = this_index;
-	printf("rollback index: %d >= %d, OK\n", this_index, min_index);
+	printf("rollback index: %d >= %d(min), OK\n", this_index, min_index);
 #endif
 #endif
 
diff --git a/include/image.h b/include/image.h
index 46d54506b2..237be6c5d6 100644
--- a/include/image.h
+++ b/include/image.h
@@ -1068,7 +1068,7 @@ int fit_check_format(const void *fit);
 int fit_conf_find_compat(const void *fit, const void *fdt);
 int fit_conf_get_node(const void *fit, const char *conf_uname);
 int fit_rollback_index_verify(const void *fit, uint32_t rollback_fd,
-			      uint32_t *this_index, uint32_t *min_index);
+			      uint32_t *fit_index, uint32_t *otp_index);
 
 /**
  * fit_conf_get_prop_node() - Get node refered to by a configuration

commit ed5a55bae6305fef22287998ba15937e20246b0f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Jun 28 10:50:50 2020 +0800

    rockchip: spl: place spl_board_prepare_for_jump() at the bottom
    
    Being convenient for other functions to be called.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ibfa3f30a50befa8773cc8729a5359f7a36e8180d

diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index abe9588059..b051d1f0ee 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -296,15 +296,6 @@ void spl_next_stage(struct spl_image_info *spl)
 }
 #endif
 
-int spl_board_prepare_for_jump(struct spl_image_info *spl_image)
-{
-#if CONFIG_SPL_FIT_ROLLBACK_PROTECT
-	/* TODO */
-	printf("spl fit: rollback protect not implement\n");
-#endif
-	return 0;
-}
-
 void spl_hang_reset(void)
 {
 	printf("# Reset the board to bootrom #\n");
@@ -333,3 +324,12 @@ int fit_board_verify_required_sigs(void)
 
 	return vboot == 0xff;
 }
+
+int spl_board_prepare_for_jump(struct spl_image_info *spl_image)
+{
+#if CONFIG_SPL_FIT_ROLLBACK_PROTECT
+	/* TODO */
+	printf("spl fit: rollback protect not implement\n");
+#endif
+	return 0;
+}

commit d08e47d1cf74026fb5aad232584da4d79e1e3824
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 30 11:22:43 2020 +0800

    rockchip: dts: rk3288: add volume up key
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If1663a85ee0d594bf9a34506e40cb55ed7a4c30c

diff --git a/arch/arm/dts/rk3288-evb.dts b/arch/arm/dts/rk3288-evb.dts
index 64f0184e01..47fce5f9c9 100644
--- a/arch/arm/dts/rk3288-evb.dts
+++ b/arch/arm/dts/rk3288-evb.dts
@@ -11,6 +11,22 @@
 / {
 	model = "Evb-RK3288";
 	compatible = "evb-rk3288,evb-rk3288", "rockchip,rk3288";
+
+	adc-keys {
+		compatible = "adc-keys";
+		io-channels = <&saradc 1>;
+		io-channel-names = "buttons";
+		keyup-threshold-microvolt = <1800000>;
+		u-boot,dm-pre-reloc;
+		status = "okay";
+
+		volumeup-key {
+			label = "volume up";
+			u-boot,dm-pre-reloc;
+			linux,code = <KEY_VOLUMEUP>;
+			press-threshold-microvolt = <1000>;
+		};
+	};
 };
 
 &crypto {
diff --git a/arch/arm/dts/rk3288-u-boot.dtsi b/arch/arm/dts/rk3288-u-boot.dtsi
index c98e3917e9..a38fc1fd37 100644
--- a/arch/arm/dts/rk3288-u-boot.dtsi
+++ b/arch/arm/dts/rk3288-u-boot.dtsi
@@ -85,3 +85,8 @@
 &usb_otg {
 	u-boot,dm-pre-reloc;
 };
+
+&saradc {
+	u-boot,dm-spl;
+	status = "okay";
+};

commit c06873ff93c25190a5f97067c7839a6a0c0f425a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 30 11:13:57 2020 +0800

    rockchip: dts: rk3368: add volume up key
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Iab8f867ed652d83c2dc07a1f6aacb755d533c4a6

diff --git a/arch/arm/dts/rk3368-evb.dts b/arch/arm/dts/rk3368-evb.dts
index bf6aff2278..42470e1119 100644
--- a/arch/arm/dts/rk3368-evb.dts
+++ b/arch/arm/dts/rk3368-evb.dts
@@ -12,6 +12,22 @@
 / {
 	model = "Rockchip RK3368 Evaluation Board";
 	compatible = "rockchip,rk3368-evb", "rockchip,rk3368";
+
+	adc-keys {
+		compatible = "adc-keys";
+		io-channels = <&saradc 1>;
+		io-channel-names = "buttons";
+		keyup-threshold-microvolt = <1024000>;
+		u-boot,dm-pre-reloc;
+		status = "okay";
+
+		volumeup-key {
+			label = "volume up";
+			u-boot,dm-pre-reloc;
+			linux,code = <KEY_VOLUMEUP>;
+			press-threshold-microvolt = <1000>;
+		};
+	};
 };
 
 &crypto {
diff --git a/arch/arm/dts/rk3368-u-boot.dtsi b/arch/arm/dts/rk3368-u-boot.dtsi
index 4964e0dca1..3382bfc2ac 100644
--- a/arch/arm/dts/rk3368-u-boot.dtsi
+++ b/arch/arm/dts/rk3368-u-boot.dtsi
@@ -74,3 +74,8 @@
 &gpio2 {
 	u-boot,dm-pre-reloc;
 };
+
+&saradc {
+	u-boot,dm-spl;
+	status = "okay";
+};

commit 313607e76ad9ec6d2f76070aa652b12499769613
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jun 29 09:46:02 2020 +0800

    rockchip: rv1126: release and run mcu address depended on entry_point
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I040c92ed3e34ade2585966556d1ad3934c8b9cb0

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126.c b/arch/arm/mach-rockchip/rv1126/rv1126.c
index 9edad1f53d..0c547ca919 100644
--- a/arch/arm/mach-rockchip/rv1126/rv1126.c
+++ b/arch/arm/mach-rockchip/rv1126/rv1126.c
@@ -58,7 +58,6 @@ DECLARE_GLOBAL_DATA_PTR;
 #define SGRF_BASE		0xFE0A0000
 #define SGRF_CON_SCR1_BOOT_ADDR	0x0b0
 #define SGRF_SOC_CON3		0x00c
-#define SCR1_START_ADDR		0x208000
 #define CRU_SOFTRST_CON11	0xFF49032C
 #define PMUGRF_SOC_CON1		0xFE020104
 #define GRF_IOFUNC_CON3		0xFF01026C
@@ -592,13 +591,13 @@ int arch_cpu_init(void)
 }
 
 #ifdef CONFIG_SPL_BUILD
-int spl_fit_standalone_release(void)
+int spl_fit_standalone_release(uintptr_t entry_point)
 {
 	/* Reset the scr1 */
 	writel(0x04000400, CRU_BASE + CRU_SOFTRST_CON02);
 	udelay(100);
 	/* set the scr1 addr */
-	writel(SCR1_START_ADDR, SGRF_BASE + SGRF_CON_SCR1_BOOT_ADDR);
+	writel(entry_point, SGRF_BASE + SGRF_CON_SCR1_BOOT_ADDR);
 	writel(0x00ff00bf, SGRF_BASE + SGRF_SOC_CON3);
 	/* release the scr1 */
 	writel(0x04000000, CRU_BASE + CRU_SOFTRST_CON02);

commit 9a65720b98fb9470a5837d3a02c596c74a129552
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Jun 23 15:02:05 2020 +0800

    spl: fit: release and run mcu address depended on entry_point
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ibbd28c604c6f6bf558f74c4b5a8064d894492015

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 7b30ad331b..f917b17645 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -341,7 +341,7 @@ static int spl_fit_image_get_os(const void *fit, int noffset, uint8_t *os)
 #endif
 }
 
-__weak int spl_fit_standalone_release(void)
+__weak int spl_fit_standalone_release(uintptr_t entry_point)
 {
 	return 0;
 }
@@ -454,9 +454,12 @@ static int spl_internal_load_simple_fit(struct spl_image_info *spl_image,
 	if (node > 0) {
 		/* Load the image and set up the spl_image structure */
 		ret = spl_load_fit_image(info, sector, fit, base_offset, node,
-					 spl_image);
+					 &image_info);
 		if (!ret) {
-			ret = spl_fit_standalone_release();
+			if (image_info.entry_point == FDT_ERROR)
+				image_info.entry_point = image_info.load_addr;
+
+			ret = spl_fit_standalone_release(image_info.entry_point);
 			if (ret)
 				printf("Start standalone fail, ret = %d\n",
 				       ret);

commit 5b69ab5af529a21949a8e6ebbdd3007a8093c20f
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Wed Apr 22 15:33:04 2020 +0800

    tools: rockchip: fix compilation warnings
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: Ib27aa885eef05c6f88fcbf41dd4d0a5a0f965a52

diff --git a/tools/rockchip/boot_merger.h b/tools/rockchip/boot_merger.h
index 3c31b782b1..f239c3adab 100644
--- a/tools/rockchip/boot_merger.h
+++ b/tools/rockchip/boot_merger.h
@@ -85,7 +85,7 @@ typedef struct {
 	line_t*     code472Path;
 	int         loaderNum;
 	name_entry* loader;
-	char        outPath[MAX_LINE_LEN];
+	char        outPath[MAX_LINE_LEN * 2];
 } options;
 
 

commit 35176ccb87d004eb803eb65ee21ba13c34e44604
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 29 10:11:47 2020 +0800

    Revert "spl: fit: check image length"
    
    This reverts commit 359ed52cc25ad2538aba327e49570a2270e6d643.
    
    This early return causes variable "image_info" not initialized.
    spl_load_fit_image() should return 0 only at the end.
    
    Change-Id: I7dba24826758763e6e4da56579546cb50b9cb984
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 5d2ddfb7c7..7b30ad331b 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -204,9 +204,6 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 		if (fit_image_get_data_size(fit, node, &len))
 			return -ENOENT;
 
-		if (!len)
-			return 0;
-
 		load_ptr = (load_addr + align_len) & ~align_len;
 #if  defined(CONFIG_ARCH_ROCKCHIP)
 		if ((load_ptr < CONFIG_SYS_SDRAM_BASE) ||
@@ -235,9 +232,6 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 		debug("Embedded data: dst=%lx, size=%lx\n", load_addr,
 		      (unsigned long)length);
 		src = (void *)data;
-
-		if (!length)
-			return 0;
 	}
 
 	/* Check hashes and signature */

commit 78cac1dffdc0bd64e47294e41d2432b7760e7186
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Sun Jun 28 20:13:39 2020 +0800

    mtd: nand: Remove bbt option property if scan fail
    
    Change-Id: Ifb5b500b6ffee551aea5b6aecea629b3d0ea6207
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/bbt.c b/drivers/mtd/nand/bbt.c
index 18beadd74f..9738ef73c8 100644
--- a/drivers/mtd/nand/bbt.c
+++ b/drivers/mtd/nand/bbt.c
@@ -216,8 +216,10 @@ static int nanddev_scan_bbt(struct nand_device *nand)
 	if (nand->bbt.version == 0) {
 		nanddev_bbt_format(nand);
 		ret = nanddev_bbt_update(nand);
-		if (ret)
+		if (ret) {
+			nand->bbt.option = 0;
 			pr_err("%s fail\n", __func__);
+		}
 	}
 #endif
 

commit f0f5bdc29d1a95dce9472084c2260c4a333aabe4
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Jun 24 15:08:01 2020 +0800

    video/drm: inno_video_phy: Increase the timeout delay of PLL lock status to 100ms
    
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
    Change-Id: I60422087623c6c9f3a0219cb1a3e1c59ec523e73

diff --git a/drivers/video/drm/inno_video_phy.c b/drivers/video/drm/inno_video_phy.c
index 939c2e9925..d2f63da65e 100644
--- a/drivers/video/drm/inno_video_phy.c
+++ b/drivers/video/drm/inno_video_phy.c
@@ -145,7 +145,7 @@ static int inno_video_phy_power_on(struct rockchip_phy *phy)
 
 	phy_update_bits(inno, 0x0030, DISABLE_PLL, 0);
 	ret = readl_poll_timeout(inno->base + 0x003c, status,
-				 status & PLL_LOCK, 10000);
+				 status & PLL_LOCK, 100000);
 	if (ret) {
 		dev_err(phy->dev, "PLL is not lock\n");
 		return ret;

commit 89d0489d59059f447a08195e227440ca6680b069
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 24 15:04:34 2020 +0800

    make.sh: support image size pack of ARMv7 platform
    
    Without this patch, only ARMv8 and AArch32 support assign
    image size.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I7d15d366251328ac2283172ef6f3a173298d451b

diff --git a/make.sh b/make.sh
index 56577b312c..50f7d569ab 100755
--- a/make.sh
+++ b/make.sh
@@ -448,25 +448,28 @@ function fixup_platform_configure()
 			sha=`echo ${item} | awk '{ print $3 }'`
 
 			# <*> Fixup images size pack for platforms, and ini file
-			if grep -q '^CONFIG_ARM64_BOOT_AARCH32=y' .config ; then
+			if grep -q '^CONFIG_ARM64=y' .config ; then
+				u_kb=`echo  ${item} | awk '{ print $4 }' | awk -F "," '{ print $1 }'`
+				t_kb=`echo  ${item} | awk '{ print $4 }' | awk -F "," '{ print $2 }'`
+				u_num=`echo ${item} | awk '{ print $5 }' | awk -F "," '{ print $1 }'`
+				t_num=`echo ${item} | awk '{ print $5 }' | awk -F "," '{ print $2 }'`
+			else
 				u_kb=`echo  ${item} | awk '{ print $6 }' | awk -F "," '{ print $1 }'`
 				t_kb=`echo  ${item} | awk '{ print $6 }' | awk -F "," '{ print $2 }'`
 				u_num=`echo ${item} | awk '{ print $7 }' | awk -F "," '{ print $1 }'`
 				t_num=`echo ${item} | awk '{ print $7 }' | awk -F "," '{ print $2 }'`
-				PADDING=`echo ${item} | awk '{ print $8 }'`
-				if [ "${PADDING}" != "-" ]; then
-					RKCHIP_LOADER=${RKCHIP_LOADER}${PADDING}
-				fi
-				PADDING=`echo  ${item} | awk '{ print $9 }'`
-				if [ "${PADDING}" != "-" ]; then
-					RKCHIP_TRUST=${RKCHIP_TRUST}${PADDING}
+				# AArch32
+				if grep -q '^CONFIG_ARM64_BOOT_AARCH32=y' .config ; then
+					PADDING=`echo ${item} | awk '{ print $8 }'`
+					if [ "${PADDING}" != "-" ]; then
+						RKCHIP_LOADER=${RKCHIP_LOADER}${PADDING}
+					fi
+					PADDING=`echo  ${item} | awk '{ print $9 }'`
+					if [ "${PADDING}" != "-" ]; then
+						RKCHIP_TRUST=${RKCHIP_TRUST}${PADDING}
+					fi
+					RKCHIP_LABEL=${RKCHIP_LABEL}"AARCH32"
 				fi
-				RKCHIP_LABEL=${RKCHIP_LABEL}"AARCH32"
-			else
-				u_kb=`echo  ${item} | awk '{ print $4 }' | awk -F "," '{ print $1 }'`
-				t_kb=`echo  ${item} | awk '{ print $4 }' | awk -F "," '{ print $2 }'`
-				u_num=`echo ${item} | awk '{ print $5 }' | awk -F "," '{ print $1 }'`
-				t_num=`echo ${item} | awk '{ print $5 }' | awk -F "," '{ print $2 }'`
 			fi
 		fi
 	done

commit df538e29bdfa27e8607f1bf29d6d641bd85ef124
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Tue Jun 9 10:34:46 2020 +0800

    lib: optee_client v2: support RKFS version 2
    
    1.use get_rkss_version function to get rkss version,
      if security partition have data with rkss version 1, then
      we choice rkss version 1, if security partition is empty,
      then we choice rkss version 2
    2.rkss version 2 support dual backup mechanism,
      security partition total use 1M
    3.rkss version 2 R&W 256k data one time
    
    Change-Id: I2f17b22d6a442df84be0d94a808b03465dc6fefe
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/include/optee_include/OpteeClientRkFs-v2.h b/include/optee_include/OpteeClientRkNewFs.h
similarity index 58%
rename from include/optee_include/OpteeClientRkFs-v2.h
rename to include/optee_include/OpteeClientRkNewFs.h
index 57138a07dd..889039b9dc 100644
--- a/include/optee_include/OpteeClientRkFs-v2.h
+++ b/include/optee_include/OpteeClientRkNewFs.h
@@ -27,6 +27,55 @@
 #ifndef TEE_SUPP_RK_FS_H
 #define TEE_SUPP_RK_FS_H
 
+/*
+ * Operations and defines shared with TEE.
+ */
+#define OPTEE_MRF_OPEN			0
+#define OPTEE_MRF_CREATE		1
+#define OPTEE_MRF_CLOSE			2
+#define OPTEE_MRF_READ			3
+#define OPTEE_MRF_WRITE			4
+#define OPTEE_MRF_TRUNCATE		5
+#define OPTEE_MRF_REMOVE		6
+#define OPTEE_MRF_RENAME		7
+#define OPTEE_MRF_OPENDIR		8
+#define OPTEE_MRF_CLOSEDIR		9
+#define OPTEE_MRF_READDIR		10
+
+/*
+ * Open flags, defines shared with TEE.
+ */
+#define TEE_FS_O_RDONLY 0x1
+#define TEE_FS_O_WRONLY 0x2
+#define TEE_FS_O_RDWR   0x4
+#define TEE_FS_O_CREAT  0x8
+#define TEE_FS_O_EXCL   0x10
+#define TEE_FS_O_APPEND 0x20
+
+/*
+ * Seek flags, defines shared with TEE.
+ */
+#define TEE_FS_SEEK_SET 0x1
+#define TEE_FS_SEEK_END 0x2
+#define TEE_FS_SEEK_CUR 0x4
+
+/*
+ * Mkdir flags, defines shared with TEE.
+ */
+#define TEE_FS_S_IWUSR 0x1
+#define TEE_FS_S_IRUSR 0x2
+
+/*
+ * Access flags, X_OK not supported, defines shared with TEE.
+ */
+#define TEE_FS_R_OK    0x1
+#define TEE_FS_W_OK    0x2
+#define TEE_FS_F_OK    0x4
+
+#define RK_FS_R    0x1
+#define RK_FS_W    0x2
+#define RK_FS_D    0x8
+
 #define TEE_IOCTL_PARAM_ATTR_TYPE_MASK		0xff
 #define TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_INPUT	1
 #define TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_OUTPUT	2
@@ -56,21 +105,28 @@ struct tee_ioctl_param {
 	} u;
 };
 
-struct tee_ioctl_param;
+/* Function Defines */
+#define UNREFERENCED_PARAMETER(P) (P = P)
+#define CHECKFLAG(flags, flag) (flags & flag)
+#define ADDFLAG(flags, flag) (flags | flag)
 
-struct blk_desc *rockchip_get_bootdev(void);
-int part_get_info_by_name(struct blk_desc *dev_desc, const char *name,
-			disk_partition_t *info);
-unsigned long blk_dread(struct blk_desc *block_dev, lbaint_t start,
-			lbaint_t blkcnt, void *buffer);
-unsigned long blk_dwrite(struct blk_desc *block_dev, lbaint_t start,
-			lbaint_t blkcnt, const void *buffer);
+#define RKSS_VERSION_V1			1
+#define RKSS_VERSION_V2			2
+#define RKSS_VERSION_ERR			100
 
-int tee_supp_rk_fs_init(void);
+int tee_supp_rk_fs_init_v1(void);
 
-int tee_supp_rk_fs_process(size_t num_params,
+int tee_supp_rk_fs_process_v1(size_t num_params,
 			struct tee_ioctl_param *params);
+
+int tee_supp_rk_fs_init_v2(void);
+
+int tee_supp_rk_fs_process_v2(size_t num_params,
+			struct tee_ioctl_param *params);
+
 int OpteeClientRkFsInit(void);
-int check_security_exist(int print_flag);
+
+int OpteeClientRkFsProcess(size_t num_params,
+			struct tee_ioctl_param *params);
 
 #endif
diff --git a/lib/optee_clientApi/Makefile b/lib/optee_clientApi/Makefile
index 2ecb905e4e..4ee69ec055 100644
--- a/lib/optee_clientApi/Makefile
+++ b/lib/optee_clientApi/Makefile
@@ -9,14 +9,15 @@ obj-y += OpteeClientInterface.o
 obj-y += OpteeClientSMC.o
 obj-y += OpteeClientRPC.o
 obj-y += tee_smc-arm64.o
+obj-y += OpteeClientRkFs_common.o
 
 ifdef CONFIG_OPTEE_V1
-obj-y += OpteeClientRkFs_common.o
 obj-y += OpteeClientRkFs_v1.o
 obj-y += OpteeClientRkFs_v2.o
 endif
 
 ifdef CONFIG_OPTEE_V2
-obj-y += OpteeClientRkFs-v2.o
+obj-y += OpteeClientRkNewFs_v1.o
+obj-y += OpteeClientRkNewFs_v2.o
 endif
 
diff --git a/lib/optee_clientApi/OpteeClientRPC.c b/lib/optee_clientApi/OpteeClientRPC.c
index 3938f63a5c..1a78308acb 100644
--- a/lib/optee_clientApi/OpteeClientRPC.c
+++ b/lib/optee_clientApi/OpteeClientRPC.c
@@ -19,7 +19,7 @@
 #include <optee_include/OpteeClientRkFs.h>
 #endif
 #ifdef CONFIG_OPTEE_V2
-#include <optee_include/OpteeClientRkFs-v2.h>
+#include <optee_include/OpteeClientRkNewFs.h>
 #endif
 
 /*
@@ -524,7 +524,7 @@ TEEC_Result OpteeRpcCmdFs(t_teesmc32_arg *TeeSmc32Arg)
 							TeeSmc32Param[0].u.memref.size);
 #endif
 #ifdef CONFIG_OPTEE_V2
-	TeecResult = tee_supp_rk_fs_process((size_t)TeeSmc32Arg->num_params,
+	TeecResult = OpteeClientRkFsProcess((size_t)TeeSmc32Arg->num_params,
 							(struct tee_ioctl_param *)TeeSmc32Param);
 #endif
 
diff --git a/lib/optee_clientApi/OpteeClientRkFs_common.c b/lib/optee_clientApi/OpteeClientRkFs_common.c
index f3d95f8fba..7dcd1eb2f1 100644
--- a/lib/optee_clientApi/OpteeClientRkFs_common.c
+++ b/lib/optee_clientApi/OpteeClientRkFs_common.c
@@ -10,7 +10,12 @@
 #include <command.h>
 #include <boot_rkimg.h>
 #include <part.h>
+#ifdef CONFIG_OPTEE_V1
 #include <optee_include/OpteeClientRkFs.h>
+#endif
+#ifdef CONFIG_OPTEE_V2
+#include <optee_include/OpteeClientRkNewFs.h>
+#endif
 
 static int rkss_version;
 static int get_rkss_version(void)
@@ -79,6 +84,7 @@ int OpteeClientRkFsInit(void)
 		return -1;
 }
 
+#ifdef CONFIG_OPTEE_V1
 int OpteeClientRkFsProcess(void *cmd, size_t cmd_size)
 {
 	int version;
@@ -92,3 +98,21 @@ int OpteeClientRkFsProcess(void *cmd, size_t cmd_size)
 	else
 		return -1;
 }
+#endif
+
+#ifdef CONFIG_OPTEE_V2
+int OpteeClientRkFsProcess(size_t num_params,
+			struct tee_ioctl_param *params)
+{
+	int version;
+
+	version = get_rkss_version();
+	debug("TEEC: OpteeClientRkFsProcess version=%d\n", version);
+	if (version == RKSS_VERSION_V1)
+		return tee_supp_rk_fs_process_v1(num_params, params);
+	else if (version == RKSS_VERSION_V2)
+		return tee_supp_rk_fs_process_v2(num_params, params);
+	else
+		return -1;
+}
+#endif
diff --git a/lib/optee_clientApi/OpteeClientRkFs-v2.c b/lib/optee_clientApi/OpteeClientRkNewFs_v1.c
similarity index 85%
rename from lib/optee_clientApi/OpteeClientRkFs-v2.c
rename to lib/optee_clientApi/OpteeClientRkNewFs_v1.c
index 2ebc238256..c258262cb9 100644
--- a/lib/optee_clientApi/OpteeClientRkFs-v2.c
+++ b/lib/optee_clientApi/OpteeClientRkNewFs_v1.c
@@ -1,33 +1,16 @@
 /*
- * Copyright (c) 2016, Fuzhou Rockchip Electronics Co.,Ltd.
- * All rights reserved.
+ * Copyright 2020, Rockchip Electronics Co., Ltd
+ * hisping lin, <hisping.lin@rock-chips.com>
  *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * SPDX-License-Identifier:	GPL-2.0+
  */
+
 #include <common.h>
 #include <stdlib.h>
 #include <command.h>
-#include <optee_include/OpteeClientRkFs-v2.h>
+#include <boot_rkimg.h>
+#include <part.h>
+#include <optee_include/OpteeClientRkNewFs.h>
 #include <optee_include/tee_client_api.h>
 
 /*
@@ -35,51 +18,6 @@
  *#define DEBUG_CLEAN_RKSS
  */
 
-/*
- * Operations and defines shared with TEE.
- */
-#define OPTEE_MRF_OPEN			0
-#define OPTEE_MRF_CREATE		1
-#define OPTEE_MRF_CLOSE			2
-#define OPTEE_MRF_READ			3
-#define OPTEE_MRF_WRITE			4
-#define OPTEE_MRF_TRUNCATE		5
-#define OPTEE_MRF_REMOVE		6
-#define OPTEE_MRF_RENAME		7
-#define OPTEE_MRF_OPENDIR		8
-#define OPTEE_MRF_CLOSEDIR		9
-#define OPTEE_MRF_READDIR		10
-
-/*
- * Open flags, defines shared with TEE.
- */
-#define TEE_FS_O_RDONLY 0x1
-#define TEE_FS_O_WRONLY 0x2
-#define TEE_FS_O_RDWR   0x4
-#define TEE_FS_O_CREAT  0x8
-#define TEE_FS_O_EXCL   0x10
-#define TEE_FS_O_APPEND 0x20
-
-/*
- * Seek flags, defines shared with TEE.
- */
-#define TEE_FS_SEEK_SET 0x1
-#define TEE_FS_SEEK_END 0x2
-#define TEE_FS_SEEK_CUR 0x4
-
-/*
- * Mkdir flags, defines shared with TEE.
- */
-#define TEE_FS_S_IWUSR 0x1
-#define TEE_FS_S_IRUSR 0x2
-
-/*
- * Access flags, X_OK not supported, defines shared with TEE.
- */
-#define TEE_FS_R_OK    0x1
-#define TEE_FS_W_OK    0x2
-#define TEE_FS_F_OK    0x4
-
 /*
  *	RK Secure Storage Ctrl
  *		Storage Size : 512 kb
@@ -105,11 +43,11 @@
  *
  */
 #define RKSS_DATA_SECTION_COUNT		1024
-#define RKSS_DATA_LEN			512
+#define RKSS_DATA_SECTION_LEN			512
 #define RKSS_PARTITION_TABLE_COUNT	128		/* total size 512 * 128*/
-#define RKSS_EACH_FILEFOLDER_COUNT	4		/* 504 / 126 = 4*/
-#define RKSS_NAME_MAX_LENGTH		117		/* 116 char + "\0"*/
-#define RKSS_USEDFLAGS_INDEX		RKSS_PARTITION_TABLE_COUNT
+#define RKSS_EACH_SECTION_FILECOUNT	4		/* 504 / 126 = 4*/
+#define RKSS_MAX_NAME_LENGTH		117		/* 116 char + "\0"*/
+#define RKSS_USED_FLAGS_INDEX		RKSS_PARTITION_TABLE_COUNT
 #define RKSS_BACKUP_INDEX		RKSS_DATA_SECTION_COUNT
 #define RKSS_BACKUP_COUNT		256
 
@@ -131,13 +69,9 @@ struct rkss_backup_info {
 	unsigned int backup_usedflag;
 };
 
-#define RK_FS_R    0x1
-#define RK_FS_W    0x2
-#define RK_FS_D    0x8
-
 typedef struct rkss_file_info {
 	uint8_t		used;
-	char 		name[RKSS_NAME_MAX_LENGTH];
+	char 		name[RKSS_MAX_NAME_LENGTH];
 	uint16_t	index;	/* from 129 to 1023*/
 	uint16_t	size;	/* size of data*/
 	uint16_t	father;
@@ -145,7 +79,6 @@ typedef struct rkss_file_info {
 	uint8_t		flags;
 } rkss_file_info; /* 126 byte for each*/
 
-#define RKSS_VERSION		((uint32_t)0x1)
 #define RKSS_CHECK_STR	((uint32_t)0x12345678)
 #define RKSS_CHECK_PT		((uint8_t)0xFC)
 typedef struct rkss_file_verification {
@@ -155,27 +88,18 @@ typedef struct rkss_file_verification {
 
 typedef struct rk_secure_storage {
 	unsigned long index;
-	unsigned char data[RKSS_DATA_LEN];
+	unsigned char data[RKSS_DATA_SECTION_LEN];
 } rk_secure_storage;
 
-/* Path to all secure storage dev. */
-#define RKSS_DEV_NAND "/dev/block/rknand_security"
-#define RKSS_DEV_EMMC "/dev/block/by-name/security"
-
-/* Function Defines */
-#define UNREFERENCED_PARAMETER(P) (P = P)
-#define CHECKFLAG(flags, flag) (flags & flag)
-#define ADDFLAG(flags, flag) (flags | flag)
-
 /* RK Secure Storage Calls */
-static char dir_cache[RKSS_NAME_MAX_LENGTH][12];
+static char dir_cache[RKSS_MAX_NAME_LENGTH][12];
 static int dir_num;
 static int dir_seek;
 
-static struct blk_desc *dev_desc = NULL;
+static struct blk_desc *dev_desc;
 static disk_partition_t part_info;
 
-int check_security_exist(int print_flag)
+static int check_security_exist(int print_flag)
 {
 	if (!dev_desc) {
 		dev_desc = rockchip_get_bootdev();
@@ -214,7 +138,7 @@ int check_security_exist(int print_flag)
  */
 static int rkss_begin_commit(void)
 {
-	unsigned char data[RKSS_DATA_LEN];
+	unsigned char data[RKSS_DATA_SECTION_LEN];
 	struct rkss_backup_verification p;
 	unsigned long ret;
 
@@ -239,7 +163,7 @@ static int rkss_begin_commit(void)
 
 static int rkss_finish_commit(void)
 {
-	unsigned char data[RKSS_DATA_LEN];
+	unsigned char data[RKSS_DATA_SECTION_LEN];
 	unsigned long ret;
 
 	if (check_security_exist(1) < 0)
@@ -258,7 +182,7 @@ static int rkss_finish_commit(void)
 
 static int rkss_backup_sections(unsigned long index, unsigned int num)
 {
-	unsigned char data[RKSS_DATA_LEN];
+	unsigned char data[RKSS_DATA_SECTION_LEN];
 	unsigned char *backup_data = NULL;
 	struct rkss_backup_verification p;
 	struct rkss_backup_info info_last, info_current;
@@ -300,7 +224,7 @@ static int rkss_backup_sections(unsigned long index, unsigned int num)
 		debug("TEEC: %s index=0x%lx num=0x%x backup_data_index=0x%x\n",
 		      __func__, index, num, info_current.backup_data_index);
 
-		backup_data = malloc(num * RKSS_DATA_LEN);
+		backup_data = malloc(num * RKSS_DATA_SECTION_LEN);
 		if (!backup_data) {
 			printf("TEEC: malloc backup_data fail\n");
 			goto error;
@@ -344,7 +268,7 @@ error:
 
 static int rkss_resume(void)
 {
-	unsigned char data[RKSS_DATA_LEN];
+	unsigned char data[RKSS_DATA_SECTION_LEN];
 	unsigned char *backup_data = NULL;
 	struct rkss_backup_verification p;
 	struct rkss_backup_info info_current;
@@ -388,7 +312,7 @@ static int rkss_resume(void)
 					goto error;
 				}
 				backup_data = malloc(info_current.backup_num *
-						     RKSS_DATA_LEN);
+						     RKSS_DATA_SECTION_LEN);
 				if (!backup_data) {
 					printf("TEEC: malloc backup_data fail\n");
 					goto error;
@@ -502,7 +426,7 @@ static void rkss_dump_ptable(void)
 	struct rkss_file_info *p;
 	unsigned char *table_data;
 
-	table_data = malloc(RKSS_PARTITION_TABLE_COUNT * RKSS_DATA_LEN);
+	table_data = malloc(RKSS_PARTITION_TABLE_COUNT * RKSS_DATA_SECTION_LEN);
 	if (table_data == NULL) {
 		printf("TEEC: malloc table_data fail\n");
 		return;
@@ -516,14 +440,14 @@ static void rkss_dump_ptable(void)
 	printf("-------------- DUMP ptable --------------\n");
 	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++) {
 		rkss.index = i;
-		memcpy(rkss.data, table_data + rkss.index * RKSS_DATA_LEN, RKSS_DATA_LEN);
+		memcpy(rkss.data, table_data + rkss.index * RKSS_DATA_SECTION_LEN, RKSS_DATA_SECTION_LEN);
 
-		for (n = 0; n < RKSS_EACH_FILEFOLDER_COUNT; n++) {
+		for (n = 0; n < RKSS_EACH_SECTION_FILECOUNT; n++) {
 			pdata = rkss.data;
 			p = (struct rkss_file_info *)pdata;
 			p += n;
 			printf("[%02d][%c] %s , inx:%d, size:%d",
-					i*RKSS_EACH_FILEFOLDER_COUNT+n, p->used == 0 ? 'F':'T', p->name,
+					i*RKSS_EACH_SECTION_FILECOUNT+n, p->used == 0 ? 'F':'T', p->name,
 					p->index, p->size);
 		}
 	}
@@ -536,13 +460,13 @@ static void rkss_dump_usedflags(void)
 	struct rk_secure_storage rkss = {0};
 	int ret;
 
-	rkss.index = RKSS_USEDFLAGS_INDEX;
+	rkss.index = RKSS_USED_FLAGS_INDEX;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
 		printf("TEEC: rkss_read_multi_sections fail ! ret: %d.\n", ret);
 		return;
 	}
-	rkss_dump(rkss.data, RKSS_DATA_LEN);
+	rkss_dump(rkss.data, RKSS_DATA_SECTION_LEN);
 }
 #endif
 
@@ -553,16 +477,16 @@ static int rkss_verify_ptable(unsigned char *table_data)
 	int ret, i;
 
 	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++) {
-		cp = table_data + (i * RKSS_DATA_LEN);
-		vp = cp + RKSS_DATA_LEN - sizeof(struct rkss_file_verification);
+		cp = table_data + (i * RKSS_DATA_SECTION_LEN);
+		vp = cp + RKSS_DATA_SECTION_LEN - sizeof(struct rkss_file_verification);
 		verify = (struct rkss_file_verification *)(void *)vp;
 
-		if (verify->version != RKSS_VERSION
+		if (verify->version != RKSS_VERSION_V1
 				|| verify->checkstr != RKSS_CHECK_STR) {
 			printf("TEEC: verify [%d] fail, cleanning ....", i);
-			memset(cp, 0, RKSS_DATA_LEN);
+			memset(cp, 0, RKSS_DATA_SECTION_LEN);
 			verify->checkstr = RKSS_CHECK_STR;
-			verify->version = RKSS_VERSION;
+			verify->version = RKSS_VERSION_V1;
 		}
 	}
 	ret = rkss_write_multi_sections(table_data, 0, RKSS_PARTITION_TABLE_COUNT);
@@ -585,7 +509,7 @@ static int rkss_verify_usedflags(struct rk_secure_storage *rkss)
 		flag = i & 0x1 ? duel & 0x0F : (duel & 0xF0) >> 4;
 		if (flag != 0x1) {
 			debug("TEEC: init usedflags section ...\n");
-			memset(rkss->data, 0x00, RKSS_DATA_LEN);
+			memset(rkss->data, 0x00, RKSS_DATA_SECTION_LEN);
 			for (n = 0; n < RKSS_PARTITION_TABLE_COUNT + 1; n++) {
 				flagw = (uint8_t *)rkss->data + (int)n/2;
 				value = 0x1;
@@ -607,8 +531,8 @@ static int rkss_verify_usedflags(struct rk_secure_storage *rkss)
 
 static int rkss_get_fileinfo_by_index(int fd, struct rkss_file_info *pfileinfo)
 {
-	int i = fd / RKSS_EACH_FILEFOLDER_COUNT;
-	int n = fd - (RKSS_EACH_FILEFOLDER_COUNT * i);
+	int i = fd / RKSS_EACH_SECTION_FILECOUNT;
+	int n = fd - (RKSS_EACH_SECTION_FILECOUNT * i);
 	struct rk_secure_storage rkss = {0};
 	int ret;
 	void *pdata;
@@ -654,12 +578,12 @@ static int rkss_get_fileinfo_by_name(
 	int size_in, size_sv;
 
 	len = strlen(filename);
-	if (len > RKSS_NAME_MAX_LENGTH - 1) {
+	if (len > RKSS_MAX_NAME_LENGTH - 1) {
 		printf("TEEC: filename is too long. length:%u\n", len);
 		return TEEC_ERROR_GENERIC;
 	}
 
-	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
+	table_data = malloc(RKSS_DATA_SECTION_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
 		printf("TEEC: malloc table_data fail\n");
 		return TEEC_ERROR_GENERIC;
@@ -672,9 +596,9 @@ static int rkss_get_fileinfo_by_name(
 
 	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++) {
 		rkss.index = i;
-		memcpy(rkss.data, table_data + rkss.index * RKSS_DATA_LEN, RKSS_DATA_LEN);
+		memcpy(rkss.data, table_data + rkss.index * RKSS_DATA_SECTION_LEN, RKSS_DATA_SECTION_LEN);
 
-		for (n = 0; n < RKSS_EACH_FILEFOLDER_COUNT; n++) {
+		for (n = 0; n < RKSS_EACH_SECTION_FILECOUNT; n++) {
 			pdata = rkss.data;
 			p = (struct rkss_file_info *)pdata;
 			p += n;
@@ -685,10 +609,10 @@ static int rkss_get_fileinfo_by_name(
 			/* Full Matching*/
 			if (!strcmp(p->name, filename)) {
 				debug("TEEC: rkss_get_fileinfo_by_name: hit table[%d/%d], index[%d/%d]\n",
-						i, RKSS_PARTITION_TABLE_COUNT, n, RKSS_EACH_FILEFOLDER_COUNT);
+						i, RKSS_PARTITION_TABLE_COUNT, n, RKSS_EACH_SECTION_FILECOUNT);
 				memcpy(pfileinfo, p, sizeof(struct rkss_file_info));
 				free(table_data);
-				return i * RKSS_EACH_FILEFOLDER_COUNT + n;
+				return i * RKSS_EACH_SECTION_FILECOUNT + n;
 			}
 
 			/* Folder Matching*/
@@ -737,12 +661,12 @@ static int rkss_get_dirs_by_name(char *filename)
 	char *chk, *file, *subdir;
 
 	len = strlen(filename);
-	if (len > RKSS_NAME_MAX_LENGTH - 1) {
+	if (len > RKSS_MAX_NAME_LENGTH - 1) {
 		printf("TEEC: filename is too long. length:%u\n", len);
 		return TEEC_ERROR_GENERIC;
 	}
 
-	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
+	table_data = malloc(RKSS_DATA_SECTION_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
 		printf("TEEC: malloc table_data fail\n");
 		return TEEC_ERROR_GENERIC;
@@ -756,9 +680,9 @@ static int rkss_get_dirs_by_name(char *filename)
 	dir_num = 0;
 	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++) {
 		rkss.index = i;
-		memcpy(rkss.data, table_data + rkss.index * RKSS_DATA_LEN, RKSS_DATA_LEN);
+		memcpy(rkss.data, table_data + rkss.index * RKSS_DATA_SECTION_LEN, RKSS_DATA_SECTION_LEN);
 
-		for (n = 0; n < RKSS_EACH_FILEFOLDER_COUNT; n++) {
+		for (n = 0; n < RKSS_EACH_SECTION_FILECOUNT; n++) {
 			pdata = rkss.data;
 			p = (struct rkss_file_info *)pdata;
 			p += n;
@@ -769,7 +693,7 @@ static int rkss_get_dirs_by_name(char *filename)
 			/* Full Matching*/
 			ret = memcmp(p->name, filename, strlen(filename));
 			debug("TEEC: comparing [fd:%d] : %s ?= %s , ret:%d\n",
-					i*RKSS_EACH_FILEFOLDER_COUNT+n, p->name, filename, ret);
+					i*RKSS_EACH_SECTION_FILECOUNT+n, p->name, filename, ret);
 			if (!ret && strlen(p->name) > strlen(filename)) {
 				chk = p->name + strlen(filename);
 				if (*chk == '/') {
@@ -794,7 +718,7 @@ static int rkss_get_empty_section_from_usedflags(int section_size)
 	uint8_t *flag;
 	uint8_t value;
 
-	rkss.index = RKSS_USEDFLAGS_INDEX;
+	rkss.index = RKSS_USED_FLAGS_INDEX;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
 		printf("TEEC: rkss_read_multi_sections fail ! ret: %d.\n", ret);
@@ -829,7 +753,7 @@ static int rkss_incref_multi_usedflags_sections(unsigned int index, unsigned int
 		return TEEC_ERROR_GENERIC;
 	}
 
-	rkss.index = RKSS_USEDFLAGS_INDEX;
+	rkss.index = RKSS_USED_FLAGS_INDEX;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
 		printf("TEEC: rkss_read_multi_sections fail ! ret: %d.\n", ret);
@@ -865,7 +789,7 @@ static int rkss_decref_multi_usedflags_sections(unsigned int index, unsigned int
 		return TEEC_ERROR_GENERIC;
 	}
 
-	rkss.index = RKSS_USEDFLAGS_INDEX;
+	rkss.index = RKSS_USED_FLAGS_INDEX;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
 		printf("TEEC: rkss_read_multi_sections fail ! ret: %d.\n", ret);
@@ -897,7 +821,7 @@ static int rkss_write_empty_ptable(struct rkss_file_info *pfileinfo)
 	void *pdata;
 	struct rkss_file_info *p;
 
-	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
+	table_data = malloc(RKSS_DATA_SECTION_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
 		printf("TEEC: malloc table_data fail\n");
 		return TEEC_ERROR_GENERIC;
@@ -911,8 +835,8 @@ static int rkss_write_empty_ptable(struct rkss_file_info *pfileinfo)
 
 	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++) {
 		rkss.index = i;
-		memcpy(rkss.data, table_data + rkss.index * RKSS_DATA_LEN, RKSS_DATA_LEN);
-		for (n = 0; n < RKSS_EACH_FILEFOLDER_COUNT; n++) {
+		memcpy(rkss.data, table_data + rkss.index * RKSS_DATA_SECTION_LEN, RKSS_DATA_SECTION_LEN);
+		for (n = 0; n < RKSS_EACH_SECTION_FILECOUNT; n++) {
 			pdata = rkss.data;
 			p = (struct rkss_file_info *)pdata;
 			p += n;
@@ -932,7 +856,7 @@ static int rkss_write_empty_ptable(struct rkss_file_info *pfileinfo)
 				}
 
 				free(table_data);
-				return i * RKSS_EACH_FILEFOLDER_COUNT + n;
+				return i * RKSS_EACH_SECTION_FILECOUNT + n;
 			}
 		}
 	}
@@ -943,8 +867,8 @@ static int rkss_write_empty_ptable(struct rkss_file_info *pfileinfo)
 
 static int rkss_write_back_ptable(int fd, struct rkss_file_info *pfileinfo)
 {
-	int i = fd / RKSS_EACH_FILEFOLDER_COUNT;
-	int n = fd - (RKSS_EACH_FILEFOLDER_COUNT * i);
+	int i = fd / RKSS_EACH_SECTION_FILECOUNT;
+	int n = fd - (RKSS_EACH_SECTION_FILECOUNT * i);
 	struct rk_secure_storage rkss = {0};
 	int ret;
 	void *pdata;
@@ -991,7 +915,7 @@ static uint32_t ree_fs_new_open(size_t num_params,
 	if (!filename)
 		return TEEC_ERROR_BAD_PARAMETERS;
 
-	if (strlen(filename) > RKSS_NAME_MAX_LENGTH) {
+	if (strlen(filename) > RKSS_MAX_NAME_LENGTH) {
 		printf("TEEC: ree_fs_new_open: file name too long. %s\n", filename);
 		return TEEC_ERROR_BAD_PARAMETERS;
 	}
@@ -1031,7 +955,7 @@ static TEEC_Result ree_fs_new_create(size_t num_params,
 	if (!filename)
 		return TEEC_ERROR_BAD_PARAMETERS;
 
-	if (strlen(filename) > RKSS_NAME_MAX_LENGTH) {
+	if (strlen(filename) > RKSS_MAX_NAME_LENGTH) {
 		printf("TEEC: ree_fs_new_create: file name too long. %s\n", filename);
 		return TEEC_ERROR_BAD_PARAMETERS;
 	}
@@ -1041,7 +965,7 @@ static TEEC_Result ree_fs_new_create(size_t num_params,
 	if (fd >= 0) {
 		debug("TEEC: ree_fs_new_create : file exist, clear it. %s\n", filename);
 		/* decrease ref from usedflags */
-		num = p.size / RKSS_DATA_LEN + 1;
+		num = p.size / RKSS_DATA_SECTION_LEN + 1;
 		ret = rkss_decref_multi_usedflags_sections(p.index, num);
 		if (ret < 0) {
 			printf("TEEC: rkss_decref_multi_usedflags_sections error !\n");
@@ -1124,8 +1048,8 @@ static TEEC_Result ree_fs_new_read(size_t num_params,
 	if (offs >= p.size)
 		return TEEC_ERROR_BAD_PARAMETERS;
 
-	section_num = p.size / RKSS_DATA_LEN + 1;
-	temp_file_data = malloc(section_num * RKSS_DATA_LEN);
+	section_num = p.size / RKSS_DATA_SECTION_LEN + 1;
+	temp_file_data = malloc(section_num * RKSS_DATA_SECTION_LEN);
 	ret = rkss_read_multi_sections(temp_file_data, p.index, section_num);
 	if (ret < 0) {
 		printf("TEEC: unavailable file index!\n");
@@ -1150,7 +1074,7 @@ static TEEC_Result ree_fs_new_write(size_t num_params,
 	struct rkss_file_info p = {0};
 	int ret, fd, new_size;
 	int section_num;
-	uint8_t *file_data=0, *temp_file_data=0;
+	uint8_t *file_data = 0, *temp_file_data = 0;
 
 	ret = rkss_begin_commit();
 	if (ret < 0) {
@@ -1183,8 +1107,8 @@ static TEEC_Result ree_fs_new_write(size_t num_params,
 
 	if (p.size != 0) {
 		/* Read old file data out */
-		section_num = p.size / RKSS_DATA_LEN + 1;
-		temp_file_data = malloc(section_num * RKSS_DATA_LEN);
+		section_num = p.size / RKSS_DATA_SECTION_LEN + 1;
+		temp_file_data = malloc(section_num * RKSS_DATA_SECTION_LEN);
 		ret = rkss_read_multi_sections(temp_file_data, p.index, section_num);
 		if (ret < 0) {
 			printf("TEEC: unavailable file index %d section_num %d\n", p.index, section_num);
@@ -1205,7 +1129,7 @@ static TEEC_Result ree_fs_new_write(size_t num_params,
 	/* update new file info */
 	memcpy(file_data + offs, data, len);
 	p.size = new_size;
-	section_num = new_size / RKSS_DATA_LEN + 1;
+	section_num = new_size / RKSS_DATA_SECTION_LEN + 1;
 	p.index = rkss_get_empty_section_from_usedflags(section_num);
 	debug("TEEC: Get Empty section in %d\n", p.index);
 	p.used = 1;
@@ -1224,8 +1148,8 @@ static TEEC_Result ree_fs_new_write(size_t num_params,
 	}
 
 	/* write new file data */
-	temp_file_data = malloc(section_num * RKSS_DATA_LEN);
-	memset(temp_file_data, 0, section_num * RKSS_DATA_LEN);
+	temp_file_data = malloc(section_num * RKSS_DATA_SECTION_LEN);
+	memset(temp_file_data, 0, section_num * RKSS_DATA_SECTION_LEN);
 	memcpy(temp_file_data, file_data, p.size);
 	rkss_write_multi_sections(temp_file_data, p.index, section_num);
 	free(temp_file_data);
@@ -1280,8 +1204,8 @@ static TEEC_Result ree_fs_new_truncate(size_t num_params,
 		printf("TEEC: truncate error!\n");
 		return TEEC_ERROR_GENERIC;
 	}
-	section_num_old = p.size / RKSS_DATA_LEN + 1;
-	section_num_new = len / RKSS_DATA_LEN + 1;
+	section_num_old = p.size / RKSS_DATA_SECTION_LEN + 1;
+	section_num_new = len / RKSS_DATA_SECTION_LEN + 1;
 	ret = rkss_decref_multi_usedflags_sections(p.index + section_num_new, section_num_old - section_num_new);
 	if (ret < 0) {
 		printf("TEEC: rkss_decref_multi_usedflags_sections error !\n");
@@ -1332,7 +1256,7 @@ static TEEC_Result ree_fs_new_remove(size_t num_params,
 	debug("TEEC: ree_fs_new_remove! %s fd:%d index:%d size:%d\n", filename, fd, p.index, p.size);
 
 	/* decrease ref from usedflags */
-	num = p.size / RKSS_DATA_LEN + 1;
+	num = p.size / RKSS_DATA_SECTION_LEN + 1;
 	ret = rkss_decref_multi_usedflags_sections(p.index, num);
 	if (ret < 0) {
 		printf("TEEC: rkss_decref_multi_usedflags_sections error !\n");
@@ -1386,7 +1310,7 @@ static TEEC_Result ree_fs_new_rename(size_t num_params,
 	if (!new_fname)
 		return TEEC_ERROR_BAD_PARAMETERS;
 
-	if (strlen(new_fname) > RKSS_NAME_MAX_LENGTH) {
+	if (strlen(new_fname) > RKSS_MAX_NAME_LENGTH) {
 		printf("TEEC: new file name too long. %s\n", new_fname);
 		return TEEC_ERROR_BAD_PARAMETERS;
 	}
@@ -1487,10 +1411,10 @@ static TEEC_Result ree_fs_new_readdir(size_t num_params,
 	return TEEC_SUCCESS;
 }
 
-int tee_supp_rk_fs_init(void)
+int tee_supp_rk_fs_init_v1(void)
 {
 	assert(sizeof(struct rkss_file_info) == 126);
-	assert(512 / sizeof(struct rkss_file_info) == RKSS_EACH_FILEFOLDER_COUNT);
+	assert(512 / sizeof(struct rkss_file_info) == RKSS_EACH_SECTION_FILECOUNT);
 
 	int ret;
 	struct rk_secure_storage rkss = {0};
@@ -1509,7 +1433,7 @@ int tee_supp_rk_fs_init(void)
 #ifdef DEBUG_CLEAN_RKSS
 	int i = 0;
 	for (i = 0; i < RKSS_DATA_SECTION_COUNT; i++) {
-		memset(rkss.data, 0, RKSS_DATA_LEN);
+		memset(rkss.data, 0, RKSS_DATA_SECTION_LEN);
 		rkss.index = i;
 		rkss_write_multi_sections(rkss.data, rkss.index, 1);
 		printf("TEEC: cleaned [%d]", i);
@@ -1521,7 +1445,7 @@ int tee_supp_rk_fs_init(void)
 		return TEEC_ERROR_GENERIC;
 	}
 
-	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
+	table_data = malloc(RKSS_DATA_SECTION_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
 		printf("TEEC: malloc table_data fail\n");
 		return TEEC_ERROR_GENERIC;
@@ -1538,7 +1462,7 @@ int tee_supp_rk_fs_init(void)
 	table_data = NULL;
 
 	/* Verify Usedflags Section*/
-	rkss.index = RKSS_USEDFLAGS_INDEX;
+	rkss.index = RKSS_USED_FLAGS_INDEX;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
 		printf("TEEC: rkss_read_multi_sections fail ! ret: %d.\n", ret);
@@ -1564,12 +1488,7 @@ int tee_supp_rk_fs_init(void)
 	return TEEC_SUCCESS;
 }
 
-int OpteeClientRkFsInit(void)
-{
-	debug("TEEC: OpteeClientRkFsInit\n");
-	return tee_supp_rk_fs_init();
-}
-bool tee_supp_param_is_value(struct tee_ioctl_param *param)
+static bool tee_supp_param_is_value(struct tee_ioctl_param *param)
 {
 	switch (param->attr & TEE_IOCTL_PARAM_ATTR_TYPE_MASK) {
 	case TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_INPUT:
@@ -1582,7 +1501,7 @@ bool tee_supp_param_is_value(struct tee_ioctl_param *param)
 }
 
 static int rkss_step;
-int tee_supp_rk_fs_process(size_t num_params,
+int tee_supp_rk_fs_process_v1(size_t num_params,
 			struct tee_ioctl_param *params)
 {
 	if (!num_params || !tee_supp_param_is_value(params))
diff --git a/lib/optee_clientApi/OpteeClientRkNewFs_v2.c b/lib/optee_clientApi/OpteeClientRkNewFs_v2.c
new file mode 100644
index 0000000000..7bb950454d
--- /dev/null
+++ b/lib/optee_clientApi/OpteeClientRkNewFs_v2.c
@@ -0,0 +1,1428 @@
+/*
+ * Copyright 2020, Rockchip Electronics Co., Ltd
+ * hisping lin, <hisping.lin@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <stdlib.h>
+#include <command.h>
+#include <boot_rkimg.h>
+#include <part.h>
+#include <optee_include/OpteeClientRkNewFs.h>
+#include <optee_include/tee_client_api.h>
+
+/*
+ *#define DEBUG_RKSS
+ *#define DEBUG_CLEAN_RKSS
+ */
+
+/*
+ *	RK Secure Storage Version 2
+ *		Area0 Backup 0 Size : 256 kb	<---->	Area0 Backup 1 Size : 256 kb
+ *		Area1 Backup 0 Size : 256 kb	<---->	Area1 Backup 1 Size : 256 kb
+ *
+ *	------ 1 section is 512 bytes -----
+ *	------ Area0 Backup0 section from 0 to 511 --------
+ *	1 section for file header		[0]
+ *	1 section for used flags		[1]
+ *		- 1 byte = 2 flag
+ *	62 section for file tables		[2-63]
+ *		- size of table 128 bytes
+ *	447 section for data			[64-510]
+ *	1 section for file footer		[511]
+ *
+ * 	------ Area0 Backup1 section from 512 to 1023 --------
+ *	1 section for file header		[512]
+ *	1 section for used flags		[513]
+ *		- 1 byte = 2 flag
+ *	62 section for file tables		[514-575]
+ *		- size of table 128 bytes
+ *	447 section for data			[576-1022]
+ *	1 section for file footer		[1023]
+ *
+ * 	------ Area1 Backup0 section from 1024 to 1535 --------
+ *	1 section for file header		[1024]
+ *	1 section for used flags		[1025]
+ *		- 1 byte = 2 flag
+ *	62 section for file tables		[1026-1087]
+ *		- size of table 128 bytes
+ *	447 section for data			[1088-1534]
+ *	1 section for file footer		[1535]
+ *
+ * 	------ Area1 Backup1 section from 1536 to 2047 --------
+ *	1 section for file header		[1536]
+ *	1 section for used flags		[1537]
+ *		- 1 byte = 2 flag
+ *	62 section for file tables		[1538-1599]
+ *		- size of table 128 bytes
+ *	447 section for data			[1600-2046]
+ *	1 section for file footer		[2047]
+ */
+
+/* define for backup */
+#define RKSS_HEADER_INDEX		0
+#define RKSS_HEADER_COUNT		1
+#define RKSS_USEDFLAGS_INDEX		1
+#define RKSS_USEDFLAGS_COUNT		1
+#define RKSS_TABLE_INDEX		2
+#define RKSS_TABLE_COUNT		62
+#define RKSS_DATA_INDEX			64
+#define RKSS_DATA_COUNT			447
+#define RKSS_FOOTER_INDEX		511
+#define RKSS_FOOTER_COUNT		1
+#define RKSS_SECTION_COUNT		512
+
+#define RKSS_MAX_AREA_NUM		8
+#define RKSS_ACTIVE_AREA_NUM		2
+#define RKSS_DATA_LEN			512
+#define RKSS_EACH_FILEFOLDER_COUNT	4
+#define RKSS_TABLE_SIZE			128
+#define RKSS_NAME_MAX_LENGTH		112
+#define RKSS_BACKUP_NUM			2
+#define RKSS_TAG			0x524B5353
+
+struct rkss_file_header {
+	uint32_t	tag;
+	uint32_t	version;
+	uint32_t	backup_count;
+	uint16_t	backup_index;
+	uint16_t	backup_dirty;
+	uint8_t		reserve[496];
+};
+struct rkss_file_table {
+	uint32_t	size;
+	uint16_t	index;
+	uint8_t		flags;
+	uint8_t		used;
+	char		name[RKSS_NAME_MAX_LENGTH];
+	uint8_t		reserve[8];
+};
+struct rkss_file_footer {
+	uint8_t		reserve[508];
+	uint32_t	backup_count;
+};
+struct rkss_file {
+	struct rkss_file_header *header;
+	uint8_t	*flags;
+	struct rkss_file_table *table;
+	uint8_t	*data;
+	struct rkss_file_footer *footer;
+};
+
+/* RK Secure Storage Calls */
+static char dir_cache[RKSS_NAME_MAX_LENGTH][12];
+static int dir_num;
+static int dir_seek;
+static uint8_t *rkss_buffer[RKSS_MAX_AREA_NUM];
+static struct rkss_file rkss_info[RKSS_MAX_AREA_NUM];
+
+static struct blk_desc *dev_desc;
+static disk_partition_t part_info;
+
+static int check_security_exist(int print_flag)
+{
+	if (!dev_desc) {
+		dev_desc = rockchip_get_bootdev();
+		if (!dev_desc) {
+			printf("TEEC: %s: Could not find device\n", __func__);
+			return -1;
+		}
+
+		if (part_get_info_by_name(dev_desc,
+					  "security", &part_info) < 0) {
+			dev_desc = NULL;
+			if (print_flag != 0)
+				printf("TEEC: Could not find security partition\n");
+			return -1;
+		}
+	}
+	return 0;
+}
+
+static int rkss_verify_usedflags(unsigned int area_index)
+{
+	uint8_t *flags;
+	int i, duel, flag, n, value;
+	uint8_t *flagw;
+	int used_count;
+
+	if (area_index >= RKSS_MAX_AREA_NUM) {
+		printf("TEEC: Not support area_index 0x%x\n", area_index);
+		return -1;
+	}
+
+	flags = rkss_info[area_index].flags;
+	if (flags == NULL) {
+		printf("TEEC: %s flags is null\n", __func__);
+		return -1;
+	}
+
+	used_count = RKSS_HEADER_COUNT +
+		RKSS_USEDFLAGS_COUNT +
+		RKSS_TABLE_COUNT;
+
+	for (i = 0; i < used_count; i++) {
+		duel = *(flags + (int)i/2);
+		flag = i & 0x1 ? duel & 0x0F : (duel & 0xF0) >> 4;
+		if (flag != 0x1)
+			goto init;
+	}
+
+	for (i = RKSS_FOOTER_INDEX; i < RKSS_USEDFLAGS_COUNT * RKSS_DATA_LEN * 2; i++) {
+		duel = *(flags + (int)i/2);
+		flag = i & 0x1 ? duel & 0x0F : (duel & 0xF0) >> 4;
+		if (flag != 0x1)
+			goto init;
+	}
+
+	debug("TEEC: %s: success.\n", __func__);
+	return 0;
+
+init:
+	debug("TEEC: init usedflags section ...\n");
+	memset(flags, 0, RKSS_USEDFLAGS_COUNT * RKSS_DATA_LEN);
+	for (n = 0; n < used_count; n++) {
+		flagw = flags + (int)n/2;
+		value = 0x1;
+		*flagw = n & 0x1 ? (*flagw & 0xF0) | (value & 0x0F) :
+				(*flagw & 0x0F) | (value << 4);
+	}
+
+	for (n = RKSS_FOOTER_INDEX; n < RKSS_USEDFLAGS_COUNT * RKSS_DATA_LEN * 2; n++) {
+		flagw = flags + (int)n/2;
+		value = 0x1;
+		*flagw = n & 0x1 ? (*flagw & 0xF0) | (value & 0x0F) :
+				(*flagw & 0x0F) | (value << 4);
+	}
+	return 0;
+}
+
+#ifdef DEBUG_CLEAN_RKSS
+static int rkss_storage_delete(uint32_t area_index)
+{
+	int ret;
+	uint32_t size;
+	uint8_t *delete_buff;
+
+	if (area_index >= RKSS_MAX_AREA_NUM) {
+		printf("TEEC: Not support area_index 0x%x\n", area_index);
+		return -1;
+	}
+
+	printf("TEEC: delete area index 0x%x!\n", area_index);
+	size = RKSS_SECTION_COUNT * RKSS_BACKUP_NUM * RKSS_DATA_LEN;
+	delete_buff = (uint8_t *)malloc(size);
+	if (!delete_buff) {
+		printf("TEEC: Malloc failed!\n");
+		return -1;
+	}
+	memset(delete_buff, 0, size);
+	ret = blk_dwrite(dev_desc,
+		part_info.start + area_index * RKSS_SECTION_COUNT * RKSS_BACKUP_NUM,
+		RKSS_SECTION_COUNT * RKSS_BACKUP_NUM, delete_buff);
+	if (ret != RKSS_SECTION_COUNT * RKSS_BACKUP_NUM) {
+		free(delete_buff);
+		printf("TEEC: blk_dwrite fail\n");
+		return -1;
+	}
+
+	if (delete_buff)
+		free(delete_buff);
+	printf("TEEC: delete area success!\n");
+	return 0;
+}
+
+static int rkss_storage_reset(void)
+{
+	if (rkss_storage_delete(0) < 0)
+		return -1;
+	if (rkss_storage_delete(1) < 0)
+		return -1;
+	return 0;
+}
+#endif
+
+#ifdef DEBUG_RKSS
+static void rkss_dump(void *data, unsigned int len)
+{
+	char *p = (char *)data;
+	unsigned int i = 0;
+
+	printf("-------------- DUMP %d --------------\n", len);
+	for (i = 0; i < len; i++) {
+		if (i % 32 == 0)
+			printf("\n");
+		printf("%02x ", *(p + i));
+	}
+	printf("\n");
+	printf("------------- DUMP END -------------\n");
+}
+
+static void rkss_dump_ptable(void)
+{
+	int i, j, n;
+	struct rkss_file_table *ptable;
+
+	printf("-------------- DUMP ptable --------------\n");
+
+	for (i = 0; i < RKSS_MAX_AREA_NUM; i++) {
+		ptable = rkss_info[i].table;
+		if (rkss_info[i].table == NULL)
+			continue;
+		printf("--------------- area[%d] tables ------------\n", i);
+		for (j = 0; j < RKSS_TABLE_COUNT; j++) {
+			for (n = 0; n < RKSS_EACH_FILEFOLDER_COUNT; n++) {
+				printf("[%02d][%c] %s , inx:%d, size:%d\n",
+						j * RKSS_EACH_FILEFOLDER_COUNT + n,
+						ptable->used == 0 ? 'F':'T', ptable->name,
+						ptable->index, ptable->size);
+
+				ptable++;
+			}
+		}
+	}
+	printf("-------------- DUMP END --------------\n");
+}
+
+static void rkss_dump_usedflags(void)
+{
+	int i;
+
+	for (i = 0; i < RKSS_MAX_AREA_NUM; i++) {
+		if (rkss_info[i].flags == NULL)
+			continue;
+		printf("--------------- area[%d] flags ------------\n", i);
+		rkss_dump(rkss_info[i].flags, RKSS_USEDFLAGS_COUNT * RKSS_DATA_LEN);
+	}
+}
+#endif
+
+static int rkss_read_multi_sections(unsigned int area_index,
+		unsigned char *data, unsigned long index, unsigned int num)
+{
+	if (area_index >= RKSS_MAX_AREA_NUM) {
+		printf("TEEC: %s area_index invalid\n", __func__);
+		return -1;
+	}
+	if (index >= RKSS_SECTION_COUNT || num > RKSS_SECTION_COUNT ||
+		(index + num) > RKSS_SECTION_COUNT) {
+		printf("TEEC: %s index num invalid\n", __func__);
+		return -1;
+	}
+	if (rkss_buffer[area_index] == NULL) {
+		printf("TEEC: %s rkss_buffer is null\n", __func__);
+		return -1;
+	}
+	memcpy(data, rkss_buffer[area_index] + index * RKSS_DATA_LEN, num * RKSS_DATA_LEN);
+	return 0;
+}
+
+static int rkss_write_multi_sections(unsigned int area_index,
+		unsigned char *data, unsigned long index, unsigned int num)
+{
+	if (num == 0)
+		return 0;
+
+	if (area_index >= RKSS_MAX_AREA_NUM) {
+		printf("TEEC: %s area_index invalid\n", __func__);
+		return -1;
+	}
+
+	if (index >= RKSS_SECTION_COUNT || num > RKSS_SECTION_COUNT ||
+		(index + num) > RKSS_SECTION_COUNT) {
+		printf("TEEC: %s index num invalid\n", __func__);
+		return -1;
+	}
+
+	if (rkss_buffer[area_index] == NULL) {
+		printf("TEEC: %s rkss_buffer is null\n", __func__);
+		return -1;
+	}
+
+	memcpy(rkss_buffer[area_index] + index * RKSS_DATA_LEN, data, num * RKSS_DATA_LEN);
+	rkss_info[area_index].header->backup_dirty = 1;
+	return 0;
+}
+
+static int rkss_get_fileinfo_by_index(int fd,
+		struct rkss_file_table *ptable, unsigned int *out_area_index)
+{
+	struct rkss_file_table *p;
+	unsigned int area_index;
+
+	area_index = fd / (RKSS_TABLE_COUNT * RKSS_EACH_FILEFOLDER_COUNT);
+	if (area_index >= RKSS_MAX_AREA_NUM) {
+		printf("TEEC: %s area_index invalid\n", __func__);
+		return -1;
+	}
+
+	p = rkss_info[area_index].table;
+	if (p == NULL) {
+		printf("TEEC: %s table is null\n", __func__);
+		return -1;
+	}
+
+	p += fd % (RKSS_TABLE_COUNT * RKSS_EACH_FILEFOLDER_COUNT);
+	if (p->used != 1) {
+		debug("TEEC: %s unused table!\n", __func__);
+		return -1;
+	}
+	debug("TEEC: %s p->used = %d p->name=%s p->index=%d p->size=%d\n",
+		__func__, p->used, p->name, p->index, p->size);
+	memcpy(ptable, p, sizeof(struct rkss_file_table));
+	*out_area_index = area_index;
+	return 0;
+}
+
+static int rkss_get_fileinfo_by_name(char *filename,
+		struct rkss_file_table *ptable, unsigned int *out_area_index)
+{
+	int ret;
+	unsigned int i, j, n, len;
+	struct rkss_file_table *p;
+
+	len = strlen(filename);
+	if (len > RKSS_NAME_MAX_LENGTH - 1) {
+		printf("TEEC: filename is too long. length:%u\n", len);
+		return -1;
+	}
+
+	for (i = 0; i < RKSS_MAX_AREA_NUM; i++) {
+		if (rkss_info[i].table == NULL)
+			continue;
+		for (j = 0; j < RKSS_TABLE_COUNT; j++) {
+			for (n = 0; n < RKSS_EACH_FILEFOLDER_COUNT; n++) {
+				p = rkss_info[i].table + j * RKSS_EACH_FILEFOLDER_COUNT + n;
+
+				if (p->used == 0)
+					continue;
+
+				if (!strcmp(p->name, filename)) {
+					debug("TEEC: %s: area%d hit table[%d/%d], index[%d/%d]\n",
+						__func__, i, j, RKSS_TABLE_COUNT, n, RKSS_EACH_FILEFOLDER_COUNT);
+					memcpy(ptable, p, sizeof(struct rkss_file_table));
+					*out_area_index = i;
+					ret = i * RKSS_TABLE_COUNT * RKSS_EACH_FILEFOLDER_COUNT +
+						j * RKSS_EACH_FILEFOLDER_COUNT + n;
+					return ret;
+				}
+
+				// Folder Matching
+				const char *split = "/";
+				char *last_inpos = filename;
+				char *last_svpos = p->name;
+				char *cur_inpos = NULL;
+				char *cur_svpos = NULL;
+
+				do {
+					cur_inpos = strstr(last_inpos, split);
+					cur_svpos = strstr(last_svpos, split);
+					int size_in = cur_inpos == NULL ?
+							(int)strlen(last_inpos) : cur_inpos - last_inpos;
+					int size_sv = cur_svpos == NULL ?
+							(int)strlen(last_svpos) : cur_svpos - last_svpos;
+
+					ret = memcmp(last_inpos, last_svpos, size_in);
+
+					last_inpos = cur_inpos + 1;
+					last_svpos = cur_svpos + 1;
+
+					if (size_in != size_sv || ret)
+						goto UNMATCHFOLDER;
+
+				} while (cur_inpos && cur_svpos);
+
+				debug("TEEC: Matched folder: %s\n", p->name);
+				return -100;
+UNMATCHFOLDER:
+				debug("TEEC: Unmatched ...");
+			}
+		}
+	}
+	debug("TEEC: %s: file or dir no found!\n", __func__);
+	return -1;
+}
+
+static int rkss_get_dirs_by_name(char *filename)
+{
+	int ret;
+	unsigned int i, j, n, len;
+	struct rkss_file_table *p;
+
+	len = strlen(filename);
+	if (len > RKSS_NAME_MAX_LENGTH - 1) {
+		printf("TEEC: filename is too long. length:%u\n", len);
+		return -1;
+	}
+
+	dir_num = 0;
+	for (i = 0; i < RKSS_MAX_AREA_NUM; i++) {
+		if (rkss_info[i].table == NULL)
+			continue;
+		for (j = 0; j < RKSS_TABLE_COUNT; j++) {
+			for (n = 0; n < RKSS_EACH_FILEFOLDER_COUNT; n++) {
+				p = rkss_info[i].table + j * RKSS_EACH_FILEFOLDER_COUNT + n;
+
+				if (p->used == 0)
+					continue;
+
+				// Full Matching
+				ret = memcmp(p->name, filename, strlen(filename));
+				debug("TEEC: comparing [fd:%d] : %s ?= %s, ret: %d\n",
+					(i * RKSS_TABLE_COUNT + j) * RKSS_EACH_FILEFOLDER_COUNT + n,
+					p->name, filename, ret);
+				if (!ret && strlen(p->name) > strlen(filename)) {
+					char *chk = p->name + strlen(filename);
+					if (*chk == '/') {
+						char *file = p->name + strlen(filename) + 1;
+						char *subdir = strtok(file, "/");
+						debug("TEEC: found: %s\n", subdir);
+						strcpy(dir_cache[dir_num], subdir);
+						++dir_num;
+					}
+				}
+			}
+		}
+	}
+	return dir_num;
+}
+
+static int rkss_get_empty_section_from_usedflags(
+		unsigned int area_index, int section_size)
+{
+	int i = 0;
+	int count0 = 0;
+
+	if (area_index >= RKSS_MAX_AREA_NUM) {
+		printf("TEEC: %s area_index invalid\n", __func__);
+		return -1;
+	}
+	if (rkss_info[area_index].flags == NULL) {
+		printf("TEEC: %s flags is null\n", __func__);
+		return -1;
+	}
+	for (i = 0; i < RKSS_SECTION_COUNT; i++) {
+		uint8_t *flag = rkss_info[area_index].flags + (int)i/2;
+		uint8_t value = i & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
+
+		if (value == 0x0) {
+			if (++count0 == section_size)
+				return (i + 1 - section_size);
+		} else {
+			count0 = 0;
+		}
+	}
+
+	printf("TEEC: Not enough space available in secure storage !\n");
+	return -10;
+}
+
+static int rkss_incref_multi_usedflags_sections(
+	unsigned int area_index, unsigned int index, unsigned int num)
+{
+	int value, i;
+	uint8_t *flag;
+
+	if (area_index >= RKSS_MAX_AREA_NUM) {
+		printf("TEEC: %s area_index invalid\n", __func__);
+		return -1;
+	}
+
+	if (index >= RKSS_SECTION_COUNT || num > RKSS_SECTION_COUNT ||
+		(index + num) > RKSS_SECTION_COUNT) {
+		printf("TEEC: index[%d] out of range.\n", index);
+		return -1;
+	}
+	if (rkss_info[area_index].flags == NULL) {
+		printf("TEEC: %s flags is null\n", __func__);
+		return -1;
+	}
+
+	for (i = 0; i < num; i++, index++) {
+		flag = rkss_info[area_index].flags + (int)index / 2;
+		value = index & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
+		if (++value > 0xF) {
+			printf("TEEC: reference out of data: %d\n", value);
+			value = 0xF;
+		}
+		*flag = index & 0x1 ? (*flag & 0xF0) | (value & 0x0F) :
+				(*flag & 0x0F) | (value << 4);
+	}
+	rkss_info[area_index].header->backup_dirty = 1;
+	return 0;
+}
+
+static int rkss_decref_multi_usedflags_sections(
+	unsigned int area_index, unsigned int index, unsigned int num)
+{
+	int value, i;
+	uint8_t *flag;
+
+	if (area_index >= RKSS_MAX_AREA_NUM) {
+		printf("TEEC: %s area_index invalid\n", __func__);
+		return -1;
+	}
+
+	if (index >= RKSS_SECTION_COUNT || num > RKSS_SECTION_COUNT ||
+		(index + num) > RKSS_SECTION_COUNT) {
+		printf("TEEC: index[%d] out of range.\n", index);
+		return -1;
+	}
+	if (rkss_info[area_index].flags == NULL) {
+		printf("TEEC: %s flags is null\n", __func__);
+		return -1;
+	}
+
+	for (i = 0; i < num; i++, index++) {
+		flag = rkss_info[area_index].flags + (int)index / 2;
+		value = index & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
+		if (--value < 0) {
+			printf("TEEC: reference out of data: %d\n", value);
+			value = 0x0;
+		}
+		*flag = index & 0x1 ? (*flag & 0xF0) | (value & 0x0F) :
+				(*flag & 0x0F) | (value << 4);
+	}
+	rkss_info[area_index].header->backup_dirty = 1;
+	return 0;
+}
+
+static int rkss_get_remain_tables(struct rkss_file_table *p)
+{
+	unsigned int i, n;
+	int count = 0;
+
+	if (p == NULL)
+		return -1;
+
+	for (i = 0; i < RKSS_TABLE_COUNT; i++) {
+		for (n = 0; n < RKSS_EACH_FILEFOLDER_COUNT; n++) {
+			if (p->used == 0)
+				count++;
+			p++;
+		}
+	}
+	return count;
+}
+
+static int rkss_get_remain_flags(uint8_t *flags)
+{
+	unsigned int i, value;
+	uint8_t *flag;
+	int count = 0;
+
+	if (flags == NULL)
+		return -1;
+
+	for (i = 0; i < RKSS_SECTION_COUNT; i++) {
+		flag = flags + (int)i / 2;
+		value = i & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
+		if (value == 0)
+			count++;
+	}
+	return count;
+}
+
+static int rkss_get_larger_area(void)
+{
+	int i, tables, flags, max_flags = 0;
+	int area_index = -1;
+
+	for (i = 0; i < RKSS_MAX_AREA_NUM; i++) {
+		if (rkss_info[i].table == NULL ||
+		rkss_info[i].flags == NULL)
+			continue;
+		tables = rkss_get_remain_tables(rkss_info[i].table);
+		flags = rkss_get_remain_flags(rkss_info[i].flags);
+		if (tables > 0 && flags > 0 && flags > max_flags) {
+			max_flags = flags;
+			area_index = i;
+		}
+	}
+	return area_index;
+}
+
+static int rkss_write_area_empty_ptable(
+	unsigned int area_index, struct rkss_file_table *pfile_table)
+{
+	int i, n, ret;
+	struct rkss_file_table *p;
+
+	if (rkss_info[area_index].table == NULL) {
+		printf("TEEC: %s table is null\n", __func__);
+		return -1;
+	}
+	for (i = 0; i < RKSS_TABLE_COUNT; i++) {
+		for (n = 0; n < RKSS_EACH_FILEFOLDER_COUNT; n++) {
+			p = rkss_info[area_index].table + i * RKSS_EACH_FILEFOLDER_COUNT + n;
+			if (p->used == 0) {
+				memcpy(p, pfile_table, sizeof(struct rkss_file_table));
+				p->used = 1;
+				debug("TEEC: write emt ptable : [%d,%d] name:%s, index:%d, size:%d, used:%d\n",
+						i, n, p->name, p->index, p->size, p->used);
+				rkss_info[area_index].header->backup_dirty = 1;
+				ret = area_index * RKSS_TABLE_COUNT * RKSS_EACH_FILEFOLDER_COUNT +
+					i * RKSS_EACH_FILEFOLDER_COUNT + n;
+				return ret;
+			}
+		}
+	}
+	printf("TEEC: No enough ptable space available in secure storage.\n");
+	return -1;
+}
+
+static int rkss_write_empty_ptable(struct rkss_file_table *pfile_table)
+{
+	int area_index;
+
+	area_index = rkss_get_larger_area();
+	if (area_index < 0) {
+		printf("TEEC: get area index fail\n");
+		return -1;
+	}
+
+	return rkss_write_area_empty_ptable(area_index, pfile_table);
+}
+
+static int rkss_write_back_ptable(
+	int fd, struct rkss_file_table *pfile_table)
+{
+	struct rkss_file_table *p;
+	unsigned int area_index;
+
+	area_index = fd / (RKSS_TABLE_COUNT * RKSS_EACH_FILEFOLDER_COUNT);
+	if (area_index >= RKSS_MAX_AREA_NUM) {
+		printf("TEEC: %s area_index invalid\n", __func__);
+		return -1;
+	}
+
+	p = rkss_info[area_index].table;
+	if (p == NULL) {
+		printf("TEEC: %s table is null\n", __func__);
+		return -1;
+	}
+
+	p += fd % (RKSS_TABLE_COUNT * RKSS_EACH_FILEFOLDER_COUNT);
+
+	memcpy(p, pfile_table, sizeof(struct rkss_file_table));
+	debug("TEEC: write ptable : name:%s, index:%d, size:%d, used:%d\n",
+		p->name, p->index, p->size, p->used);
+
+	rkss_info[area_index].header->backup_dirty = 1;
+	return 0;
+}
+
+static int rkss_storage_write(void)
+{
+	int ret, i;
+
+	for (i = 0; i < RKSS_MAX_AREA_NUM; i++) {
+		if (rkss_info[i].header != NULL && rkss_info[i].header->backup_dirty == 1) {
+			rkss_info[i].header->backup_count++;
+			rkss_info[i].footer->backup_count = rkss_info[i].header->backup_count;
+			rkss_info[i].header->backup_index++;
+			if (rkss_info[i].header->backup_index >= RKSS_BACKUP_NUM)
+				rkss_info[i].header->backup_index = 0;
+			rkss_info[i].header->backup_dirty = 0;
+
+			if (rkss_info[i].header->backup_count == 0xffffffff) {
+				rkss_info[i].header->backup_count = 1;
+				rkss_info[i].footer->backup_count = 1;
+				ret = blk_dwrite(dev_desc,
+					part_info.start + i * RKSS_SECTION_COUNT * RKSS_BACKUP_NUM +
+					rkss_info[i].header->backup_index * RKSS_SECTION_COUNT,
+					RKSS_SECTION_COUNT, rkss_buffer[i]);
+				if (ret != RKSS_SECTION_COUNT) {
+					printf("TEEC: blk_dwrite fail\n");
+					return -1;
+				}
+
+				rkss_info[i].header->backup_count = 2;
+				rkss_info[i].footer->backup_count = 2;
+				rkss_info[i].header->backup_index++;
+				if (rkss_info[i].header->backup_index >= RKSS_BACKUP_NUM)
+					rkss_info[i].header->backup_index = 0;
+				ret = blk_dwrite(dev_desc,
+					part_info.start + i * RKSS_SECTION_COUNT * RKSS_BACKUP_NUM +
+					rkss_info[i].header->backup_index * RKSS_SECTION_COUNT,
+					RKSS_SECTION_COUNT, rkss_buffer[i]);
+				if (ret != RKSS_SECTION_COUNT) {
+					printf("TEEC: blk_dwrite fail\n");
+					return -1;
+				}
+			} else {
+				ret = blk_dwrite(dev_desc,
+					part_info.start + i * RKSS_SECTION_COUNT * RKSS_BACKUP_NUM +
+					rkss_info[i].header->backup_index * RKSS_SECTION_COUNT,
+					RKSS_SECTION_COUNT, rkss_buffer[i]);
+				if (ret != RKSS_SECTION_COUNT) {
+					printf("TEEC: blk_dwrite fail\n");
+					return -1;
+				}
+			}
+		}
+	}
+	return 0;
+}
+
+static int rkss_storage_init(uint32_t area_index)
+{
+	unsigned long ret = 0;
+	uint32_t size, i;
+	uint32_t max_ver = 0;
+	uint32_t max_index = 0;
+	uint32_t flags_offset, table_offset, data_offset, footer_offset;
+
+	if (area_index >= RKSS_MAX_AREA_NUM) {
+		printf("TEEC: Not support index=0x%x\n", area_index);
+		return -1;
+	}
+
+	size = RKSS_SECTION_COUNT * RKSS_DATA_LEN;
+	flags_offset = RKSS_USEDFLAGS_INDEX * RKSS_DATA_LEN;
+	table_offset = RKSS_TABLE_INDEX * RKSS_DATA_LEN;
+	data_offset = RKSS_DATA_INDEX * RKSS_DATA_LEN;
+	footer_offset = RKSS_FOOTER_INDEX * RKSS_DATA_LEN;
+
+	if (rkss_buffer[area_index] == NULL) {
+		/* Always use, no need to release */
+		rkss_buffer[area_index] = (uint8_t *)malloc(size);
+		if (!(rkss_buffer[area_index])) {
+			printf("TEEC: Malloc failed!\n");
+			return -1;
+		}
+
+		/* Pointer initialization */
+		rkss_info[area_index].header = (struct rkss_file_header *)(rkss_buffer[area_index]);
+		rkss_info[area_index].flags = (uint8_t *)(rkss_buffer[area_index] + flags_offset);
+		rkss_info[area_index].table = (struct rkss_file_table *)(rkss_buffer[area_index] + table_offset);
+		rkss_info[area_index].data = (uint8_t *)(rkss_buffer[area_index] + data_offset);
+		rkss_info[area_index].footer = (struct rkss_file_footer *)(rkss_buffer[area_index] + footer_offset);
+
+		/* Find valid from (backup0 - backup1) */
+		for (i = 0; i < RKSS_BACKUP_NUM; i++) {
+			ret = blk_dread(dev_desc,
+				part_info.start +
+				area_index * RKSS_SECTION_COUNT * RKSS_BACKUP_NUM +
+				i * RKSS_SECTION_COUNT,
+				RKSS_SECTION_COUNT, rkss_buffer[area_index]);
+			if (ret != RKSS_SECTION_COUNT) {
+				printf("TEEC: blk_dread fail\n");
+				return -1;
+			}
+
+			if ((rkss_info[area_index].header->tag == RKSS_TAG) &&
+			    (rkss_info[area_index].footer->backup_count == rkss_info[area_index].header->backup_count)) {
+				if (max_ver < rkss_info[area_index].header->backup_count) {
+					max_index = i;
+					max_ver = rkss_info[area_index].header->backup_count;
+				}
+			}
+		}
+
+		if (max_ver) {
+			debug("TEEC: max_ver=%d, max_index=%d.\n",
+				max_ver, max_index);
+
+			if (max_index != (RKSS_BACKUP_NUM - 1)) {
+				ret = blk_dread(dev_desc,
+					part_info.start +
+					area_index * RKSS_SECTION_COUNT * RKSS_BACKUP_NUM +
+					max_index * RKSS_SECTION_COUNT,
+					RKSS_SECTION_COUNT, rkss_buffer[area_index]);
+				if (ret != RKSS_SECTION_COUNT) {
+					printf("TEEC: blk_dread fail\n");
+					return -1;
+				}
+			}
+
+			if (rkss_info[area_index].header->version == RKSS_VERSION_V2) {
+				debug("TEEC: data version equal to image version, do nothing!\n");
+			} else if (rkss_info[area_index].header->version < RKSS_VERSION_V2) {
+				printf("TEEC: data version lower than image version!\n");
+				/* convert rkss version 2 to higher rkss version */
+				free(rkss_buffer[area_index]);
+				rkss_buffer[area_index] = NULL;
+				return -1;
+			} else {
+				printf("TEEC: data version higher than image version!\n");
+				printf("TEEC: please update image!\n");
+				free(rkss_buffer[area_index]);
+				rkss_buffer[area_index] = NULL;
+				return -1;
+			}
+		} else {
+			printf("TEEC: Reset area[%d] info...\n", area_index);
+			memset(rkss_buffer[area_index], 0, size);
+			rkss_info[area_index].header->tag = RKSS_TAG;
+			rkss_info[area_index].header->version = RKSS_VERSION_V2;
+			rkss_info[area_index].header->backup_count = 1;
+			rkss_info[area_index].footer->backup_count = 1;
+			/* Verify Usedflags Section */
+			if (rkss_verify_usedflags(area_index) < 0) {
+				printf("TEEC: rkss_verify_usedflags fail !\n");
+				return -1;
+			}
+		}
+	}
+	return 0;
+}
+
+static uint32_t ree_fs_new_open(size_t num_params,
+				   struct tee_ioctl_param *params)
+{
+	char *filename;
+	int fd;
+	struct rkss_file_table p = {0};
+	unsigned int area_index;
+
+	debug("TEEC: params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
+		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
+
+	filename = (char *)(size_t)params[1].u.memref.shm_id;
+	if (!filename)
+		return TEEC_ERROR_BAD_PARAMETERS;
+
+	if (strlen(filename) > RKSS_NAME_MAX_LENGTH) {
+		printf("TEEC: %s: file name too long. %s\n", __func__, filename);
+		return TEEC_ERROR_BAD_PARAMETERS;
+	}
+
+	debug("TEEC: %s open file: %s, len: %zu\n",
+		__func__, filename, strlen(filename));
+	fd = rkss_get_fileinfo_by_name(filename, &p, &area_index);
+	if (fd < 0) {
+		printf("TEEC: %s : no such file. %s\n", __func__, filename);
+		return TEEC_ERROR_ITEM_NOT_FOUND;
+	}
+
+	params[2].u.value.a = fd;
+	return TEEC_SUCCESS;
+}
+
+static TEEC_Result ree_fs_new_create(size_t num_params,
+				     struct tee_ioctl_param *params)
+{
+	char *filename;
+	int fd;
+	int ret, num;
+	struct rkss_file_table p = {0};
+	unsigned int area_index;
+	/* file open flags: O_RDWR | O_CREAT | O_TRUNC
+	 * if file exists, we must remove it first.
+	 */
+	filename = (char *)(size_t)params[1].u.memref.shm_id;
+	debug("TEEC: params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
+		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
+	if (!filename)
+		return TEEC_ERROR_BAD_PARAMETERS;
+
+	if (strlen(filename) > RKSS_NAME_MAX_LENGTH) {
+		printf("TEEC: %s: file name too long. %s\n", __func__, filename);
+		return TEEC_ERROR_BAD_PARAMETERS;
+	}
+
+	debug("TEEC: %s create file: %s, len: %zu\n",
+		__func__, filename, strlen(filename));
+	fd = rkss_get_fileinfo_by_name(filename, &p, &area_index);
+	if (fd >= 0) {
+		printf("TEEC: %s : file exist, clear it. %s\n", __func__, filename);
+		/* decrease ref from usedflags */
+		num = p.size / RKSS_DATA_LEN + 1;
+		ret = rkss_decref_multi_usedflags_sections(area_index, p.index, num);
+		if (ret < 0) {
+			printf("TEEC: rkss_decref_multi_usedflags_sections error !\n");
+			return TEEC_ERROR_GENERIC;
+		}
+
+		/* rm from ptable */
+		memset(&p, 0, sizeof(struct rkss_file_table));
+		ret = rkss_write_back_ptable(fd, &p);
+		if (ret < 0) {
+			printf("TEEC: %s : write back error %d\n", __func__, ret);
+			return TEEC_ERROR_GENERIC;
+		}
+	}
+
+	strcpy(p.name, filename);
+	p.index = 0;
+	p.size = 0;
+	p.used = 1;
+	p.flags = RK_FS_R | RK_FS_W;
+	fd = rkss_write_empty_ptable(&p);
+	if (fd < 0) {
+		printf("TEEC: %s : write empty ptable error. %s\n", __func__, filename);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	params[2].u.value.a = fd;
+
+	return TEEC_SUCCESS;
+}
+
+static TEEC_Result ree_fs_new_close(size_t num_params,
+				    struct tee_ioctl_param *params)
+{
+	debug("TEEC: %s !\n", __func__);
+	UNREFERENCED_PARAMETER(params);
+	UNREFERENCED_PARAMETER(num_params);
+	return TEEC_SUCCESS;
+}
+
+static TEEC_Result ree_fs_new_read(size_t num_params,
+				   struct tee_ioctl_param *params)
+{
+	uint8_t *data;
+	size_t len;
+	off_t offs;
+	int fd;
+	int ret;
+	struct rkss_file_table p = {0};
+	int di, section_num;
+	uint8_t *temp_file_data;
+	unsigned int area_index;
+
+	fd = params[0].u.value.b;
+	offs = params[0].u.value.c;
+
+	data = (uint8_t *)(size_t)params[1].u.memref.shm_id;
+	debug("TEEC: params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
+		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
+
+	if (!data)
+		return TEEC_ERROR_BAD_PARAMETERS;
+	len = params[1].u.memref.size;
+
+	debug("TEEC: %s! fd:%d, len:%zu, offs:%ld\n",
+		__func__, fd, len, offs);
+
+	ret = rkss_get_fileinfo_by_index(fd, &p, &area_index);
+	if (ret < 0) {
+		printf("TEEC: unavailable fd: %d!\n", fd);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	if (offs >= p.size)
+		return TEEC_ERROR_BAD_PARAMETERS;
+
+	section_num = p.size / RKSS_DATA_LEN + 1;
+	temp_file_data = malloc(section_num * RKSS_DATA_LEN);
+	ret = rkss_read_multi_sections(area_index, temp_file_data, p.index, section_num);
+	if (ret < 0) {
+		printf("TEEC: unavailable file index!\n");
+		free(temp_file_data);
+		return TEEC_ERROR_GENERIC;
+	}
+	di = (offs + len) > p.size ? (p.size - offs) : len;
+	memcpy(data, temp_file_data + offs, di);
+	free(temp_file_data);
+	temp_file_data = 0;
+	params[1].u.memref.size = di;
+
+	return TEEC_SUCCESS;
+}
+
+static TEEC_Result ree_fs_new_write(size_t num_params,
+				    struct tee_ioctl_param *params)
+{
+	uint8_t *data;
+	size_t len;
+	off_t offs;
+	struct rkss_file_table p = {0};
+	int ret, fd, new_size;
+	int section_num;
+	uint8_t *file_data = 0, *temp_file_data = 0;
+	unsigned int area_index;
+
+	fd = params[0].u.value.b;
+	offs = params[0].u.value.c;
+
+	data = (uint8_t *)(size_t)params[1].u.memref.shm_id;
+	debug("TEEC: params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
+		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
+	if (!data)
+		return TEEC_ERROR_BAD_PARAMETERS;
+	len = params[1].u.memref.size;
+
+	debug("TEEC: %s ! fd:%d, len:%zu, offs:%ld\n",
+		__func__, fd, len, offs);
+
+	ret = rkss_get_fileinfo_by_index(fd, &p, &area_index);
+	if (ret < 0) {
+		printf("TEEC: %s: fd:%d unvailable!\n", __func__, fd);
+		return TEEC_ERROR_BAD_PARAMETERS;
+	}
+
+	new_size = offs + len > p.size ? offs + len : p.size;
+	file_data = malloc(new_size);
+	if (!file_data)
+		return TEEC_ERROR_OUT_OF_MEMORY;
+
+	if (p.size != 0) {
+		/* Read old file data out */
+		section_num = p.size / RKSS_DATA_LEN + 1;
+		temp_file_data = malloc(section_num * RKSS_DATA_LEN);
+		ret = rkss_read_multi_sections(area_index, temp_file_data, p.index, section_num);
+		if (ret < 0) {
+			printf("TEEC: unavailable file index %d section_num %d\n", p.index, section_num);
+			ret = TEEC_ERROR_GENERIC;
+			goto out;
+		}
+		memcpy(file_data, temp_file_data, p.size);
+		free(temp_file_data);
+		temp_file_data = 0;
+		ret = rkss_decref_multi_usedflags_sections(area_index, p.index, section_num);
+		if (ret < 0) {
+			printf("TEEC: rkss_decref_multi_usedflags_sections error !\n");
+			ret = TEEC_ERROR_GENERIC;
+			goto out;
+		}
+	}
+
+	/* update new file info */
+	memcpy(file_data + offs, data, len);
+	p.size = new_size;
+	section_num = new_size / RKSS_DATA_LEN + 1;
+	p.index = rkss_get_empty_section_from_usedflags(area_index, section_num);
+	debug("TEEC: Get Empty section in %d\n", p.index);
+	p.used = 1;
+	ret = rkss_incref_multi_usedflags_sections(area_index, p.index, section_num);
+	if (ret < 0) {
+		printf("TEEC: rkss_incref_multi_usedflags_sections error !\n");
+		ret = TEEC_ERROR_GENERIC;
+		goto out;
+	}
+
+	ret = rkss_write_back_ptable(fd, &p);
+	if (ret < 0) {
+		printf("TEEC: %s: write ptable error!\n", __func__);
+		ret = TEEC_ERROR_GENERIC;
+		goto out;
+	}
+
+	/* write new file data */
+	temp_file_data = malloc(section_num * RKSS_DATA_LEN);
+	memset(temp_file_data, 0, section_num * RKSS_DATA_LEN);
+	memcpy(temp_file_data, file_data, p.size);
+	rkss_write_multi_sections(area_index, temp_file_data, p.index, section_num);
+	free(temp_file_data);
+	temp_file_data = 0;
+
+out:
+	if (file_data)
+		free(file_data);
+	if (temp_file_data) {
+		free(temp_file_data);
+		temp_file_data = 0;
+	}
+
+	return TEEC_SUCCESS;
+}
+
+/* TODO: update file data space */
+static TEEC_Result ree_fs_new_truncate(size_t num_params,
+				       struct tee_ioctl_param *params)
+{
+	size_t len;
+	int fd, ret;
+	struct rkss_file_table p = {0};
+	unsigned int section_num_old, section_num_new;
+	unsigned int area_index;
+
+	fd = params[0].u.value.b;
+	len = params[0].u.value.c;
+
+	debug("TEEC: %s: fd:%d, lenth:%zu\n", __func__, fd, len);
+
+	ret = rkss_get_fileinfo_by_index(fd, &p, &area_index);
+	if (ret < 0) {
+		printf("TEEC: fd:%d unvailable!\n", fd);
+		return TEEC_ERROR_GENERIC;
+	}
+	if (len > p.size) {
+		printf("TEEC: truncate error!\n");
+		return TEEC_ERROR_GENERIC;
+	}
+	section_num_old = p.size / RKSS_DATA_LEN + 1;
+	section_num_new = len / RKSS_DATA_LEN + 1;
+	ret = rkss_decref_multi_usedflags_sections(area_index, p.index + section_num_new, section_num_old - section_num_new);
+	if (ret < 0) {
+		printf("TEEC: rkss_decref_multi_usedflags_sections error !\n");
+		ret = TEEC_ERROR_GENERIC;
+	}
+	p.size = len;
+	ret = rkss_write_back_ptable(fd, &p);
+	if (ret < 0) {
+		printf("TEEC: %s: write ptable error!\n", __func__);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	return TEEC_SUCCESS;
+}
+
+static TEEC_Result ree_fs_new_remove(size_t num_params,
+				     struct tee_ioctl_param *params)
+{
+	char *filename;
+	struct rkss_file_table p = {0};
+	int ret, fd, num;
+	unsigned int area_index;
+
+	debug("TEEC: params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
+		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
+
+	filename = (char *)(size_t)params[1].u.memref.shm_id;
+	if (!filename)
+		return TEEC_ERROR_BAD_PARAMETERS;
+
+	ret = rkss_get_fileinfo_by_name(filename, &p, &area_index);
+	if (ret < 0) {
+		printf("TEEC: %s: no such file. %s\n", __func__, filename);
+		return 0;
+	}
+	fd = ret;
+
+	debug("TEEC: %s! %s fd:%d index:%d size:%d\n",
+		__func__, filename, fd, p.index, p.size);
+
+	/* decrease ref from usedflags */
+	num = p.size / RKSS_DATA_LEN + 1;
+	ret = rkss_decref_multi_usedflags_sections(area_index, p.index, num);
+	if (ret < 0) {
+		printf("TEEC: rkss_decref_multi_usedflags_sections error !\n");
+		return TEEC_ERROR_GENERIC;
+	}
+
+	/* rm from ptable */
+	memset(&p, 0, sizeof(struct rkss_file_table));
+	ret = rkss_write_back_ptable(fd, &p);
+	if (ret < 0) {
+		printf("TEEC: %s: write back error %d\n", __func__, ret);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	return TEEC_SUCCESS;
+}
+
+static TEEC_Result ree_fs_new_rename(size_t num_params,
+				     struct tee_ioctl_param *params)
+{
+	char *old_fname;
+	char *new_fname;
+	struct rkss_file_table p = {0};
+	int ret;
+	unsigned int area_index;
+
+	old_fname = (char *)(size_t)params[1].u.memref.shm_id;
+	debug("TEEC: params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
+		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
+	if (!old_fname)
+		return TEEC_ERROR_BAD_PARAMETERS;
+
+	new_fname = (char *)(size_t)params[2].u.memref.shm_id;
+	debug("TEEC: params[2].u.memref.shm_id = 0x%llx params[2].u.memref.shm_offs = 0x%llx\n",
+		params[2].u.memref.shm_id, params[2].u.memref.shm_offs);
+	if (!new_fname)
+		return TEEC_ERROR_BAD_PARAMETERS;
+
+	if (strlen(new_fname) > RKSS_NAME_MAX_LENGTH) {
+		printf("TEEC: new file name too long. %s\n", new_fname);
+		return TEEC_ERROR_BAD_PARAMETERS;
+	}
+
+	debug("TEEC: rename: %s -> %s\n", old_fname, new_fname);
+
+	ret = rkss_get_fileinfo_by_name(old_fname, &p, &area_index);
+	if (ret < 0) {
+		printf("TEEC: filename: %s no found.\n", old_fname);
+		return TEEC_ERROR_ITEM_NOT_FOUND;
+	}
+
+	strcpy(p.name, new_fname);
+
+	ret = rkss_write_back_ptable(ret, &p);
+	if (ret < 0) {
+		printf("TEEC: write ptable error!\n");
+		return TEEC_ERROR_GENERIC;
+	}
+
+	return TEEC_SUCCESS;
+}
+
+static TEEC_Result ree_fs_new_opendir(size_t num_params,
+				      struct tee_ioctl_param *params)
+{
+	char *dirname;
+	int ret;
+
+	debug("TEEC: params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
+		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
+
+	dirname = (char *)(size_t)params[1].u.memref.shm_id;
+	if (!dirname)
+		return TEEC_ERROR_BAD_PARAMETERS;
+
+	dir_seek = 0;
+	ret = rkss_get_dirs_by_name(dirname);
+	if (ret < 0) {
+		printf("TEEC: %s: error\n", __func__);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	debug("TEEC: %s: %s, seek/num:%d/%d\n",
+		__func__, dirname, dir_seek, dir_num);
+	return TEEC_SUCCESS;
+}
+
+static TEEC_Result ree_fs_new_closedir(size_t num_params,
+				       struct tee_ioctl_param *params)
+{
+	if (num_params != 1 ||
+	    (params[0].attr & TEE_IOCTL_PARAM_ATTR_TYPE_MASK) !=
+			TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_INPUT)
+		return TEEC_ERROR_BAD_PARAMETERS;
+
+	dir_seek = 0;
+	dir_num = 0;
+
+	return TEEC_SUCCESS;
+}
+
+static TEEC_Result ree_fs_new_readdir(size_t num_params,
+				      struct tee_ioctl_param *params)
+{
+	char *dirname;
+	size_t len;
+	size_t dirname_len;
+
+	dirname = (char *)(size_t)params[1].u.memref.shm_id;
+	debug("TEEC: params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
+		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
+	if (!dirname)
+		return TEEC_ERROR_BAD_PARAMETERS;
+	len = params[1].u.memref.size;
+
+	debug("TEEC: seek/num:%d/%d\n", dir_seek, dir_num);
+	if (dir_seek == dir_num) {
+		params[1].u.memref.size = 0;
+		debug("TEEC: %s: END\n", __func__);
+		return TEEC_ERROR_BAD_STATE;
+	}
+
+	dirname_len = strlen(dir_cache[dir_seek]) + 1;
+	params[1].u.memref.size = dirname_len;
+	if (dirname_len > len)
+		return TEEC_ERROR_SHORT_BUFFER;
+
+	strcpy(dirname, dir_cache[dir_seek]);
+	++dir_seek;
+
+	debug("TEEC: %s: %s\n", __func__, dirname);
+
+	return TEEC_SUCCESS;
+}
+
+int tee_supp_rk_fs_init_v2(void)
+{
+	assert(sizeof(struct rkss_file_table) == RKSS_TABLE_SIZE);
+	assert(RKSS_DATA_LEN / sizeof(struct rkss_file_table) == RKSS_EACH_FILEFOLDER_COUNT);
+
+	if (check_security_exist(0) < 0)
+		return 0;
+
+	/* clean secure storage */
+#ifdef DEBUG_CLEAN_RKSS
+	if (rkss_storage_reset() < 0)
+		return -1;
+#endif
+
+	for (uint32_t i = 0; i < RKSS_ACTIVE_AREA_NUM; i++) {
+		if (rkss_storage_init(i) < 0)
+			return -1;
+	}
+
+#ifdef DEBUG_RKSS
+	rkss_dump_ptable();
+	rkss_dump_usedflags();
+#endif
+
+	return 0;
+}
+
+static bool tee_supp_param_is_value(struct tee_ioctl_param *param)
+{
+	switch (param->attr & TEE_IOCTL_PARAM_ATTR_TYPE_MASK) {
+	case TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_INPUT:
+	case TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_OUTPUT:
+	case TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_INOUT:
+		return true;
+	default:
+		return false;
+	}
+}
+
+static int rkss_step;
+int tee_supp_rk_fs_process_v2(size_t num_params,
+			struct tee_ioctl_param *params)
+{
+	uint32_t ret;
+
+	if (!num_params || !tee_supp_param_is_value(params))
+		return TEEC_ERROR_BAD_PARAMETERS;
+
+	switch (params->u.value.a) {
+	case OPTEE_MRF_OPEN:
+		debug(">>>>>>> [%d] OPTEE_MRF_OPEN!\n", rkss_step++);
+		ret = ree_fs_new_open(num_params, params);
+		break;
+	case OPTEE_MRF_CREATE:
+		debug(">>>>>>> [%d] OPTEE_MRF_CREATE!\n", rkss_step++);
+		ret = ree_fs_new_create(num_params, params);
+		break;
+	case OPTEE_MRF_CLOSE:
+		debug(">>>>>>> [%d] OPTEE_MRF_CLOSE!\n", rkss_step++);
+		ret = ree_fs_new_close(num_params, params);
+		rkss_storage_write();
+		break;
+	case OPTEE_MRF_READ:
+		debug(">>>>>>> [%d] OPTEE_MRF_READ!\n", rkss_step++);
+		ret = ree_fs_new_read(num_params, params);
+		break;
+	case OPTEE_MRF_WRITE:
+		debug(">>>>>>> [%d] OPTEE_MRF_WRITE!\n", rkss_step++);
+		ret = ree_fs_new_write(num_params, params);
+		break;
+	case OPTEE_MRF_TRUNCATE:
+		debug(">>>>>>> [%d] OPTEE_MRF_TRUNCATE!\n", rkss_step++);
+		ret = ree_fs_new_truncate(num_params, params);
+		break;
+	case OPTEE_MRF_REMOVE:
+		debug(">>>>>>> [%d] OPTEE_MRF_REMOVE!\n", rkss_step++);
+		ret = ree_fs_new_remove(num_params, params);
+		rkss_storage_write();
+		break;
+	case OPTEE_MRF_RENAME:
+		debug(">>>>>>> [%d] OPTEE_MRF_RENAME!\n", rkss_step++);
+		ret = ree_fs_new_rename(num_params, params);
+		rkss_storage_write();
+		break;
+	case OPTEE_MRF_OPENDIR:
+		debug(">>>>>>> [%d] OPTEE_MRF_OPENDIR!\n", rkss_step++);
+		ret = ree_fs_new_opendir(num_params, params);
+		break;
+	case OPTEE_MRF_CLOSEDIR:
+		debug(">>>>>>> [%d] OPTEE_MRF_CLOSEDIR!\n", rkss_step++);
+		ret = ree_fs_new_closedir(num_params, params);
+		break;
+	case OPTEE_MRF_READDIR:
+		debug(">>>>>>> [%d] OPTEE_MRF_READDIR!\n", rkss_step++);
+		ret = ree_fs_new_readdir(num_params, params);
+		break;
+	default:
+		ret = TEEC_ERROR_BAD_PARAMETERS;
+		break;
+	}
+	return ret;
+}

commit d079c1a5ed50ce9f1e3b37be5ce4e13edec90bd0
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Tue Jun 9 10:30:20 2020 +0800

    lib: optee_client v1: support RKFS version 2
    
    1.use get_rkss_version function to get rkss version,
      if security partition have data with rkss version 1, then
      we choice rkss version 1, if security partition is empty,
      then we choice rkss version 2
    2.rkss version 2 support dual backup mechanism,
      security partition total use 1M
    3.rkss version 2 R&W 256k data one time
    
    Change-Id: I4103b6600666dffccf473ec4ed8854776a46da31
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/include/optee_include/OpteeClientRkFs.h b/include/optee_include/OpteeClientRkFs.h
index d70c118c75..5d56e0ac42 100644
--- a/include/optee_include/OpteeClientRkFs.h
+++ b/include/optee_include/OpteeClientRkFs.h
@@ -29,12 +29,97 @@
 
 #include <stddef.h>
 
-int tee_supp_rk_fs_init(void);
+/*
+ * Operations and defines shared with TEE.
+ */
+#define TEE_FS_OPEN       1
+#define TEE_FS_CLOSE      2
+#define TEE_FS_READ       3
+#define TEE_FS_WRITE      4
+#define TEE_FS_SEEK       5
+#define TEE_FS_UNLINK     6
+#define TEE_FS_RENAME     7
+#define TEE_FS_TRUNC      8
+#define TEE_FS_MKDIR      9
+#define TEE_FS_OPENDIR   10
+#define TEE_FS_CLOSEDIR  11
+#define TEE_FS_READDIR   12
+#define TEE_FS_RMDIR     13
+#define TEE_FS_ACCESS    14
+#define TEE_FS_LINK      15
+
+/*
+ * Open flags, defines shared with TEE.
+ */
+#define TEE_FS_O_RDONLY 0x1
+#define TEE_FS_O_WRONLY 0x2
+#define TEE_FS_O_RDWR   0x4
+#define TEE_FS_O_CREAT  0x8
+#define TEE_FS_O_EXCL   0x10
+#define TEE_FS_O_APPEND 0x20
+
+/*
+ * Seek flags, defines shared with TEE.
+ */
+#define TEE_FS_SEEK_SET 0x1
+#define TEE_FS_SEEK_END 0x2
+#define TEE_FS_SEEK_CUR 0x4
+
+/*
+ * Mkdir flags, defines shared with TEE.
+ */
+#define TEE_FS_S_IWUSR 0x1
+#define TEE_FS_S_IRUSR 0x2
+
+/*
+ * Access flags, X_OK not supported, defines shared with TEE.
+ */
+#define TEE_FS_R_OK    0x1
+#define TEE_FS_W_OK    0x2
+#define TEE_FS_F_OK    0x4
+
+#define RK_FS_R    0x1
+#define RK_FS_W    0x2
+#define RK_FS_D    0x8
+
+/* Function Defines */
+#define UNREFERENCED_PARAMETER(P) (P = P)
+#define CHECKFLAG(flags, flag) (flags & flag)
+#define ADDFLAG(flags, flag) (flags | flag)
+
+#define RKSS_VERSION_V1			1
+#define RKSS_VERSION_V2			2
+#define RKSS_VERSION_ERR			100
+
+/*
+ * Structure for file related RPC calls
+ *
+ * @op     The operation like open, close, read, write etc
+ * @flags  Flags to the operation shared with secure world
+ * @arg    Argument to operation
+ * @fd     NW file descriptor
+ * @len    Length of buffer at the end of this struct
+ * @res    Result of the operation
+ */
+struct tee_fs_rpc {
+	int op;
+	int flags;
+	int arg;
+	int fd;
+	uint32_t len;
+	int res;
+};
+
+int tee_supp_rk_fs_init_v1(void);
+
+int tee_supp_rk_fs_process_v1(void *cmd, size_t cmd_size);
+
+int tee_supp_rk_fs_init_v2(void);
 
-int tee_supp_rk_fs_process(void *cmd, uint32_t cmd_size);
+int tee_supp_rk_fs_process_v2(void *cmd, size_t cmd_size);
 
 int OpteeClientRkFsInit(void);
 
-int check_security_exist(int print_flag);
+int OpteeClientRkFsProcess(void *cmd, size_t cmd_size);
 
 #endif
diff --git a/lib/optee_clientApi/Makefile b/lib/optee_clientApi/Makefile
index e039115f98..2ecb905e4e 100644
--- a/lib/optee_clientApi/Makefile
+++ b/lib/optee_clientApi/Makefile
@@ -11,7 +11,9 @@ obj-y += OpteeClientRPC.o
 obj-y += tee_smc-arm64.o
 
 ifdef CONFIG_OPTEE_V1
-obj-y += OpteeClientRkFs.o
+obj-y += OpteeClientRkFs_common.o
+obj-y += OpteeClientRkFs_v1.o
+obj-y += OpteeClientRkFs_v2.o
 endif
 
 ifdef CONFIG_OPTEE_V2
diff --git a/lib/optee_clientApi/OpteeClientRPC.c b/lib/optee_clientApi/OpteeClientRPC.c
index 948c88f501..3938f63a5c 100644
--- a/lib/optee_clientApi/OpteeClientRPC.c
+++ b/lib/optee_clientApi/OpteeClientRPC.c
@@ -518,14 +518,9 @@ TEEC_Result OpteeRpcCmdFs(t_teesmc32_arg *TeeSmc32Arg)
 	TEEC_Result TeecResult = TEEC_SUCCESS;
 	t_teesmc32_param *TeeSmc32Param;
 
-	if (check_security_exist(0) < 0) {
-		printf("TEEC: security partition not exist! unable to use RK FS!\n");
-		return TEEC_ERROR_GENERIC;
-	}
-
 	TeeSmc32Param = TEESMC32_GET_PARAMS(TeeSmc32Arg);
 #ifdef CONFIG_OPTEE_V1
-	TeecResult = tee_supp_rk_fs_process((void *)(size_t)TeeSmc32Param[0].u.memref.buf_ptr,
+	TeecResult = OpteeClientRkFsProcess((void *)(size_t)TeeSmc32Param[0].u.memref.buf_ptr,
 							TeeSmc32Param[0].u.memref.size);
 #endif
 #ifdef CONFIG_OPTEE_V2
diff --git a/lib/optee_clientApi/OpteeClientRkFs_common.c b/lib/optee_clientApi/OpteeClientRkFs_common.c
new file mode 100644
index 0000000000..f3d95f8fba
--- /dev/null
+++ b/lib/optee_clientApi/OpteeClientRkFs_common.c
@@ -0,0 +1,94 @@
+/*
+ * Copyright 2020, Rockchip Electronics Co., Ltd
+ * hisping lin, <hisping.lin@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <stdlib.h>
+#include <command.h>
+#include <boot_rkimg.h>
+#include <part.h>
+#include <optee_include/OpteeClientRkFs.h>
+
+static int rkss_version;
+static int get_rkss_version(void)
+{
+	struct blk_desc *dev_desc = NULL;
+	disk_partition_t part_info;
+	uint8_t *read_buff;
+	unsigned long ret = 0;
+	uint32_t *version;
+	uint32_t *checkstr;
+
+	if (rkss_version != 0)
+		return rkss_version;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("TEEC: %s: Could not find device\n", __func__);
+		return -1;
+	}
+
+	if (part_get_info_by_name(dev_desc,
+				  "security", &part_info) < 0) {
+		printf("TEEC: Waring: Could not find security partition\n");
+		rkss_version = RKSS_VERSION_ERR;
+		return rkss_version;
+	}
+
+	read_buff = (uint8_t *)malloc(512);
+	if (!read_buff) {
+		printf("TEEC: Malloc failed!\n");
+		return -1;
+	}
+
+	ret = blk_dread(dev_desc, part_info.start, 1, read_buff);
+	if (ret != 1) {
+		printf("TEEC: blk_dread fail\n");
+		free(read_buff);
+		return -1;
+	}
+
+	version = (uint32_t *)(read_buff + 512 - 8);
+	checkstr = (uint32_t *)(read_buff + 512 - 4);
+
+	if (*version == 1 && *checkstr == 0x12345678)
+		rkss_version = RKSS_VERSION_V1;
+	else
+		rkss_version = RKSS_VERSION_V2;
+
+	free(read_buff);
+	return rkss_version;
+}
+
+int OpteeClientRkFsInit(void)
+{
+	int version;
+
+	version = get_rkss_version();
+	debug("TEEC: OpteeClientRkFsInit version=%d\n", version);
+	if (version == RKSS_VERSION_V1)
+		return tee_supp_rk_fs_init_v1();
+	else if (version == RKSS_VERSION_V2)
+		return tee_supp_rk_fs_init_v2();
+	else if (version == RKSS_VERSION_ERR)
+		return 0;
+	else
+		return -1;
+}
+
+int OpteeClientRkFsProcess(void *cmd, size_t cmd_size)
+{
+	int version;
+
+	version = get_rkss_version();
+	debug("TEEC: OpteeClientRkFsProcess version=%d\n", version);
+	if (version == RKSS_VERSION_V1)
+		return tee_supp_rk_fs_process_v1(cmd, cmd_size);
+	else if (version == RKSS_VERSION_V2)
+		return tee_supp_rk_fs_process_v2(cmd, cmd_size);
+	else
+		return -1;
+}
diff --git a/lib/optee_clientApi/OpteeClientRkFs.c b/lib/optee_clientApi/OpteeClientRkFs_v1.c
similarity index 78%
rename from lib/optee_clientApi/OpteeClientRkFs.c
rename to lib/optee_clientApi/OpteeClientRkFs_v1.c
index d38bcfc2df..3f21f00cfe 100644
--- a/lib/optee_clientApi/OpteeClientRkFs.c
+++ b/lib/optee_clientApi/OpteeClientRkFs_v1.c
@@ -1,86 +1,20 @@
 /*
- * Copyright (c) 2016, Fuzhou Rockchip Electronics Co.,Ltd.
- * All rights reserved.
+ * Copyright 2020, Rockchip Electronics Co., Ltd
+ * hisping lin, <hisping.lin@rock-chips.com>
  *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *																		Created by jeffry.zhang@rock-chips.com
+ * SPDX-License-Identifier:	GPL-2.0+
  */
+
 #include <common.h>
 #include <stdlib.h>
 #include <command.h>
+#include <boot_rkimg.h>
+#include <part.h>
+#include <optee_include/OpteeClientRkFs.h>
 
-//#define DEBUG_RKFSS
+//#define DEBUG_RKSS
 //#define DEBUG_CLEAN_RKSS
 
-/*
- * Operations and defines shared with TEE.
- */
-#define TEE_FS_OPEN       1
-#define TEE_FS_CLOSE      2
-#define TEE_FS_READ       3
-#define TEE_FS_WRITE      4
-#define TEE_FS_SEEK       5
-#define TEE_FS_UNLINK     6
-#define TEE_FS_RENAME     7
-#define TEE_FS_TRUNC      8
-#define TEE_FS_MKDIR      9
-#define TEE_FS_OPENDIR   10
-#define TEE_FS_CLOSEDIR  11
-#define TEE_FS_READDIR   12
-#define TEE_FS_RMDIR     13
-#define TEE_FS_ACCESS    14
-#define TEE_FS_LINK      15
-
-/*
- * Open flags, defines shared with TEE.
- */
-#define TEE_FS_O_RDONLY 0x1
-#define TEE_FS_O_WRONLY 0x2
-#define TEE_FS_O_RDWR   0x4
-#define TEE_FS_O_CREAT  0x8
-#define TEE_FS_O_EXCL   0x10
-#define TEE_FS_O_APPEND 0x20
-
-/*
- * Seek flags, defines shared with TEE.
- */
-#define TEE_FS_SEEK_SET 0x1
-#define TEE_FS_SEEK_END 0x2
-#define TEE_FS_SEEK_CUR 0x4
-
-/*
- * Mkdir flags, defines shared with TEE.
- */
-#define TEE_FS_S_IWUSR 0x1
-#define TEE_FS_S_IRUSR 0x2
-
-/*
- * Access flags, X_OK not supported, defines shared with TEE.
- */
-#define TEE_FS_R_OK    0x1
-#define TEE_FS_W_OK    0x2
-#define TEE_FS_F_OK    0x4
-
 /*
  *	RK Secure Storage Ctrl
  *		Storage Size : 512 kb
@@ -106,11 +40,11 @@
  *
  */
 #define RKSS_DATA_SECTION_COUNT		1024
-#define RKSS_DATA_LEN			512
+#define RKSS_DATA_SECTION_LEN		512
 #define RKSS_PARTITION_TABLE_COUNT	128		// total size 512 * 128
-#define RKSS_EACH_FILEFOLDER_COUNT	4		// 504 / 126 = 4
-#define RKSS_NAME_MAX_LENGTH		117		// 116 char + "\0"
-#define RKSS_USEDFLAGS_INDEX		RKSS_PARTITION_TABLE_COUNT
+#define RKSS_EACH_SECTION_FILECOUNT	4		// 504 / 126 = 4
+#define RKSS_MAX_NAME_LENGTH		117		// 116 char + "\0"
+#define RKSS_USED_FLAGS_INDEX		RKSS_PARTITION_TABLE_COUNT
 #define RKSS_BACKUP_INDEX		RKSS_DATA_SECTION_COUNT
 #define RKSS_BACKUP_COUNT		256
 
@@ -132,62 +66,38 @@ struct rkss_backup_info {
 	unsigned int backup_usedflag;
 };
 
-typedef struct rkss_file_info
-{
+typedef struct rkss_file_info {
 	uint8_t		used;
-	char 		name[RKSS_NAME_MAX_LENGTH];
+	char 		name[RKSS_MAX_NAME_LENGTH];
 	uint16_t	index;	// from 129 to 1024
 	uint16_t	size;	// size of data
 	uint16_t	father;
 	uint8_t 	id; // file folder count index
-#define RK_FS_R    0x1
-#define RK_FS_W    0x2
-#define RK_FS_D    0x8
 	uint8_t		flags;
-}rkss_file_info; // 126 byte for each
+} rkss_file_info; // 126 byte for each
 
-#define RKSS_VERSION		(uint32_t)0x1
 #define RKSS_CHECK_STR	(uint32_t)0x12345678
 #define RKSS_CHECK_PT		(uint8_t)0xFC
-typedef struct rkss_file_verification
-{
+typedef struct rkss_file_verification {
 	uint32_t version;
 	uint32_t checkstr;
-}rkss_file_verification; // 8 byte
+} rkss_file_verification; // 8 byte
 
-typedef struct rk_secure_storage
-{
+typedef struct rk_secure_storage {
 	unsigned long index;
-	unsigned char data[RKSS_DATA_LEN];
-}rk_secure_storage;
-
-/* Path to all secure storage dev. */
-#define RKSS_DEV "/dev/block/rknand_security"
-
-/* Function Defines */
-#define UNREFERENCED_PARAMETER(P) (P=P)
-#define CHECKFLAG(flags, flag) (flags & flag)
-#define ADDFLAG(flags, flag) (flags | flag)
+	unsigned char data[RKSS_DATA_SECTION_LEN];
+} rk_secure_storage;
 
 /* RK Secure Storage Calls */
-static int file_seek = 0;
-static char dir_cache[RKSS_NAME_MAX_LENGTH][12];
-static int dir_num = 0;
-static int dir_seek = 0;
+static int file_seek;
+static char dir_cache[RKSS_MAX_NAME_LENGTH][12];
+static int dir_num;
+static int dir_seek;
 
-extern struct blk_desc *rockchip_get_bootdev(void);
-extern int part_get_info_by_name(struct blk_desc *dev_desc, const char *name,
-	disk_partition_t *info);
-extern unsigned long blk_dread(struct blk_desc *block_dev, lbaint_t start,
-			lbaint_t blkcnt, void *buffer);
-
-extern unsigned long blk_dwrite(struct blk_desc *block_dev, lbaint_t start,
-			 lbaint_t blkcnt, const void *buffer);
-
-static struct blk_desc *dev_desc = NULL;
+static struct blk_desc *dev_desc;
 static disk_partition_t part_info;
 
-int check_security_exist(int print_flag)
+static int check_security_exist(int print_flag)
 {
 	if (!dev_desc) {
 		dev_desc = rockchip_get_bootdev();
@@ -226,7 +136,7 @@ int check_security_exist(int print_flag)
  */
 static int rkss_begin_commit(void)
 {
-	unsigned char data[RKSS_DATA_LEN];
+	unsigned char data[RKSS_DATA_SECTION_LEN];
 	struct rkss_backup_verification p;
 	unsigned long ret;
 
@@ -251,7 +161,7 @@ static int rkss_begin_commit(void)
 
 static int rkss_finish_commit(void)
 {
-	unsigned char data[RKSS_DATA_LEN];
+	unsigned char data[RKSS_DATA_SECTION_LEN];
 	unsigned long ret;
 
 	if (check_security_exist(1) < 0)
@@ -270,7 +180,7 @@ static int rkss_finish_commit(void)
 
 static int rkss_backup_sections(unsigned long index, unsigned int num)
 {
-	unsigned char data[RKSS_DATA_LEN];
+	unsigned char data[RKSS_DATA_SECTION_LEN];
 	unsigned char *backup_data = NULL;
 	struct rkss_backup_verification p;
 	struct rkss_backup_info info_last, info_current;
@@ -312,7 +222,7 @@ static int rkss_backup_sections(unsigned long index, unsigned int num)
 		debug("TEEC: %s index=0x%lx num=0x%x backup_data_index=0x%x\n",
 		      __func__, index, num, info_current.backup_data_index);
 
-		backup_data = malloc(num * RKSS_DATA_LEN);
+		backup_data = malloc(num * RKSS_DATA_SECTION_LEN);
 		if (!backup_data) {
 			printf("TEEC: malloc backup_data fail\n");
 			goto error;
@@ -356,7 +266,7 @@ error:
 
 static int rkss_resume(void)
 {
-	unsigned char data[RKSS_DATA_LEN];
+	unsigned char data[RKSS_DATA_SECTION_LEN];
 	unsigned char *backup_data = NULL;
 	struct rkss_backup_verification p;
 	struct rkss_backup_info info_current;
@@ -400,7 +310,7 @@ static int rkss_resume(void)
 					goto error;
 				}
 				backup_data = malloc(info_current.backup_num *
-						     RKSS_DATA_LEN);
+						     RKSS_DATA_SECTION_LEN);
 				if (!backup_data) {
 					printf("TEEC: malloc backup_data fail\n");
 					goto error;
@@ -503,14 +413,13 @@ static int rkss_read_patition_tables(unsigned char *data)
 	return 0;
 }
 
-#ifdef DEBUG_RKFSS
-static void rkss_dump(void* data, unsigned int len)
+#ifdef DEBUG_RKSS
+static void rkss_dump(void *data, unsigned int len)
 {
 	char *p = (char *)data;
 	unsigned int i = 0;
 	printf("-------------- DUMP %d --------------\n", len);
-	for (i = 0; i < len; i++)
-	{
+	for (i = 0; i < len; i++) {
 		printf("%02x ", *(p + i));
 	}
 	printf("\n");
@@ -523,7 +432,7 @@ static void rkss_dump_ptable(void)
 	int i = 0, ret;
 	unsigned char *table_data;
 
-	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
+	table_data = malloc(RKSS_DATA_SECTION_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
 		printf("TEEC: malloc table_data fail\n");
 		return;
@@ -535,21 +444,19 @@ static void rkss_dump_ptable(void)
 		return;
 	}
 
-	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++)
-	{
+	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++) {
 		struct rk_secure_storage rkss = {0};
 		rkss.index = i;
-		memcpy(rkss.data, table_data + rkss.index * RKSS_DATA_LEN, RKSS_DATA_LEN);
+		memcpy(rkss.data, table_data + rkss.index * RKSS_DATA_SECTION_LEN, RKSS_DATA_SECTION_LEN);
 
 		int n ;
-		for (n = 0; n < RKSS_EACH_FILEFOLDER_COUNT; n++)
-		{
+		for (n = 0; n < RKSS_EACH_SECTION_FILECOUNT; n++) {
 			void *pdata = rkss.data;
 			struct rkss_file_info *p = (struct rkss_file_info *)pdata;
 			p += n;
 
 			printf("[%02d][%c] %s , inx:%d, size:%d",
-					i*RKSS_EACH_FILEFOLDER_COUNT+n, p->used == 0 ? 'F':'T' ,p->name,
+					i*RKSS_EACH_SECTION_FILECOUNT+n, p->used == 0 ? 'F':'T', p->name,
 					p->index, p->size);
 		}
 	}
@@ -560,14 +467,13 @@ static void rkss_dump_ptable(void)
 static void rkss_dump_usedflags(void)
 {
 	struct rk_secure_storage rkss = {0};
-	rkss.index = RKSS_USEDFLAGS_INDEX;
+	rkss.index = RKSS_USED_FLAGS_INDEX;
 	int ret = rkss_read_section(&rkss);
-	if (ret < 0)
-	{
+	if (ret < 0) {
 		printf("TEEC: rkss_read_section fail ! ret: %d.\n", ret);
 		return;
 	}
-	rkss_dump(rkss.data, RKSS_DATA_LEN);
+	rkss_dump(rkss.data, RKSS_DATA_SECTION_LEN);
 }
 #endif
 
@@ -578,16 +484,16 @@ static int rkss_verify_ptable(unsigned char *table_data)
 	int ret, i, write_table_flag = 0;
 
 	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++) {
-		cp = table_data + (i * RKSS_DATA_LEN);
-		vp = cp + RKSS_DATA_LEN - sizeof(struct rkss_file_verification);
+		cp = table_data + (i * RKSS_DATA_SECTION_LEN);
+		vp = cp + RKSS_DATA_SECTION_LEN - sizeof(struct rkss_file_verification);
 		verify = (struct rkss_file_verification *)(void *)vp;
 
-		if (verify->version != RKSS_VERSION
+		if (verify->version != RKSS_VERSION_V1
 				|| verify->checkstr != RKSS_CHECK_STR) {
 			printf("TEEC: verify [%d] fail, cleanning ....", i);
-			memset(cp, 0, RKSS_DATA_LEN);
+			memset(cp, 0, RKSS_DATA_SECTION_LEN);
 			verify->checkstr = RKSS_CHECK_STR;
-			verify->version = RKSS_VERSION;
+			verify->version = RKSS_VERSION_V1;
 			write_table_flag = 1;
 		}
 	}
@@ -613,7 +519,7 @@ static int rkss_verify_usedflags(struct rk_secure_storage *rkss)
 		flag = i & 0x1 ? duel & 0x0F : (duel & 0xF0) >> 4;
 		if (flag != 0x1) {
 			debug("TEEC: init usedflags section ...\n");
-			memset(rkss->data, 0x00, RKSS_DATA_LEN);
+			memset(rkss->data, 0x00, RKSS_DATA_SECTION_LEN);
 			for (n = 0; n < RKSS_PARTITION_TABLE_COUNT + 1; n++) {
 				flagw = (uint8_t *)rkss->data + (int)n/2;
 				value = 0x1;
@@ -635,8 +541,8 @@ static int rkss_verify_usedflags(struct rk_secure_storage *rkss)
 
 static int rkss_get_fileinfo_by_index(int fd, struct rkss_file_info *pfileinfo)
 {
-	int i = fd / RKSS_EACH_FILEFOLDER_COUNT;
-	int n = fd - (RKSS_EACH_FILEFOLDER_COUNT * i);
+	int i = fd / RKSS_EACH_SECTION_FILECOUNT;
+	int n = fd - (RKSS_EACH_SECTION_FILECOUNT * i);
 	struct rk_secure_storage rkss = {0};
 	int ret;
 	void *pdata;
@@ -665,7 +571,7 @@ static int rkss_get_fileinfo_by_index(int fd, struct rkss_file_info *pfileinfo)
 }
 
 static int rkss_get_fileinfo_by_name(
-		char* filename, struct rkss_file_info *pfileinfo)
+		char *filename, struct rkss_file_info *pfileinfo)
 {
 	int i = 0, ret;
 	uint8_t n = 0;
@@ -673,13 +579,12 @@ static int rkss_get_fileinfo_by_name(
 	unsigned char *table_data;
 
 	len = strlen(filename);
-	if (len > RKSS_NAME_MAX_LENGTH - 1)
-	{
+	if (len > RKSS_MAX_NAME_LENGTH - 1) {
 		printf("TEEC: filename is too long. length:%u\n", len);
 		return -1;
 	}
 
-	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
+	table_data = malloc(RKSS_DATA_SECTION_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
 		printf("TEEC: malloc table_data fail\n");
 		return -1;
@@ -691,14 +596,12 @@ static int rkss_get_fileinfo_by_name(
 		return -1;
 	}
 
-	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++)
-	{
+	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++) {
 		struct rk_secure_storage rkss = {0};
 		rkss.index = i;
-		memcpy(rkss.data, table_data + rkss.index * RKSS_DATA_LEN, RKSS_DATA_LEN);
+		memcpy(rkss.data, table_data + rkss.index * RKSS_DATA_SECTION_LEN, RKSS_DATA_SECTION_LEN);
 
-		for (n = 0; n < RKSS_EACH_FILEFOLDER_COUNT; n++)
-		{
+		for (n = 0; n < RKSS_EACH_SECTION_FILECOUNT; n++) {
 			void *pdata = rkss.data;
 			struct rkss_file_info *p = (struct rkss_file_info *)pdata;
 			p += n;
@@ -706,13 +609,12 @@ static int rkss_get_fileinfo_by_name(
 			if (p->used == 0)
 				continue;
 
-			if (!strcmp(p->name, filename))
-			{
+			if (!strcmp(p->name, filename)) {
 				debug("TEEC: rkss_get_fileinfo_by_name: hit table[%d/%d], index[%d/%d]\n",
-						i, RKSS_PARTITION_TABLE_COUNT, n, RKSS_EACH_FILEFOLDER_COUNT);
+						i, RKSS_PARTITION_TABLE_COUNT, n, RKSS_EACH_SECTION_FILECOUNT);
 				memcpy(pfileinfo, p, sizeof(struct rkss_file_info));
 				free(table_data);
-				return i * RKSS_EACH_FILEFOLDER_COUNT + n;
+				return i * RKSS_EACH_SECTION_FILECOUNT + n;
 			}
 
 			// Folder Matching
@@ -737,7 +639,7 @@ static int rkss_get_fileinfo_by_name(
 				if (size_in != size_sv || ret)
 					goto UNMATCHFOLDER;
 
-			} while(cur_inpos && cur_svpos);
+			} while (cur_inpos && cur_svpos);
 
 			debug("TEEC: Matched folder: %s\n", p->name);
 			free(table_data);
@@ -751,7 +653,7 @@ UNMATCHFOLDER:
 	return -1;
 }
 
-static int rkss_get_dirs_by_name(char* filename)
+static int rkss_get_dirs_by_name(char *filename)
 {
 	int i = 0, ret;
 	uint8_t n = 0;
@@ -759,13 +661,12 @@ static int rkss_get_dirs_by_name(char* filename)
 	unsigned char *table_data;
 
 	len = strlen(filename);
-	if (len > RKSS_NAME_MAX_LENGTH - 1)
-	{
+	if (len > RKSS_MAX_NAME_LENGTH - 1) {
 		printf("TEEC: filename is too long. length:%u\n", len);
 		return -1;
 	}
 
-	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
+	table_data = malloc(RKSS_DATA_SECTION_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
 		printf("TEEC: malloc table_data fail\n");
 		return -1;
@@ -778,14 +679,12 @@ static int rkss_get_dirs_by_name(char* filename)
 	}
 
 	dir_num = 0;
-	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++)
-	{
+	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++) {
 		struct rk_secure_storage rkss = {0};
 		rkss.index = i;
-		memcpy(rkss.data, table_data + rkss.index * RKSS_DATA_LEN, RKSS_DATA_LEN);
+		memcpy(rkss.data, table_data + rkss.index * RKSS_DATA_SECTION_LEN, RKSS_DATA_SECTION_LEN);
 
-		for (n = 0; n < RKSS_EACH_FILEFOLDER_COUNT; n++)
-		{
+		for (n = 0; n < RKSS_EACH_SECTION_FILECOUNT; n++) {
 			void *pdata = rkss.data;
 			struct rkss_file_info *p = (struct rkss_file_info *)pdata;
 			p += n;
@@ -796,12 +695,10 @@ static int rkss_get_dirs_by_name(char* filename)
 			// Full Matching
 			ret = memcmp(p->name, filename, strlen(filename));
 			debug("TEEC: comparing [fd:%d] : %s ?= %s , ret:%d\n",
-					i*RKSS_EACH_FILEFOLDER_COUNT+n, p->name, filename, ret);
-			if (!ret && strlen(p->name) > strlen(filename))
-			{
+					i*RKSS_EACH_SECTION_FILECOUNT+n, p->name, filename, ret);
+			if (!ret && strlen(p->name) > strlen(filename)) {
 				char *chk = p->name + strlen(filename);
-				if (*chk == '/')
-				{
+				if (*chk == '/') {
 					char *file = p->name + strlen(filename) + 1;
 					char *subdir = strtok(file, "/");
 					debug("TEEC: found: %s\n", subdir);
@@ -818,30 +715,23 @@ static int rkss_get_dirs_by_name(char* filename)
 static int rkss_get_empty_section_from_usedflags(int section_size)
 {
 	struct rk_secure_storage rkss = {0};
-	rkss.index = RKSS_USEDFLAGS_INDEX;
+	rkss.index = RKSS_USED_FLAGS_INDEX;
 	int ret = rkss_read_section(&rkss);
-	if (ret < 0)
-	{
+	if (ret < 0) {
 		printf("TEEC: rkss_read_section fail ! ret: %d.\n", ret);
 		return -1;
 	}
 
 	int i = 0;
 	int count0 = 0;
-	for (i = 0; i < RKSS_DATA_SECTION_COUNT; i++)
-	{
+	for (i = 0; i < RKSS_DATA_SECTION_COUNT; i++) {
 		uint8_t *flag = (uint8_t *)rkss.data + (int)i/2;
 		uint8_t value = i & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
 
-		if (value == 0x0)
-		{
+		if (value == 0x0) {
 			if (++count0 == section_size)
-			{
 				return (i + 1 - section_size);
-			}
-		}
-		else
-		{
+		} else {
 			count0 = 0;
 		}
 	}
@@ -861,7 +751,7 @@ static int rkss_incref_multi_usedflags_sections(unsigned int index, unsigned int
 		return -1;
 	}
 
-	rkss.index = RKSS_USEDFLAGS_INDEX;
+	rkss.index = RKSS_USED_FLAGS_INDEX;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
 		printf("TEEC: rkss_read_multi_sections fail ! ret: %d.\n", ret);
@@ -897,7 +787,7 @@ static int rkss_decref_multi_usedflags_sections(unsigned int index, unsigned int
 		return -1;
 	}
 
-	rkss.index = RKSS_USEDFLAGS_INDEX;
+	rkss.index = RKSS_USED_FLAGS_INDEX;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
 		printf("TEEC: rkss_read_multi_sections fail ! ret: %d.\n", ret);
@@ -926,7 +816,7 @@ static int rkss_write_empty_ptable(struct rkss_file_info *pfileinfo)
 	int i = 0, ret;
 	unsigned char *table_data;
 
-	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
+	table_data = malloc(RKSS_DATA_SECTION_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
 		printf("TEEC: malloc table_data fail\n");
 		return -1;
@@ -939,35 +829,31 @@ static int rkss_write_empty_ptable(struct rkss_file_info *pfileinfo)
 		return -1;
 	}
 
-	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++)
-	{
+	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++) {
 		struct rk_secure_storage rkss = {0};
 		rkss.index = i;
-		memcpy(rkss.data, table_data + rkss.index * RKSS_DATA_LEN, RKSS_DATA_LEN);
+		memcpy(rkss.data, table_data + rkss.index * RKSS_DATA_SECTION_LEN, RKSS_DATA_SECTION_LEN);
 
 		int n = 0;
-		for (n = 0; n < RKSS_EACH_FILEFOLDER_COUNT; n++)
-		{
+		for (n = 0; n < RKSS_EACH_SECTION_FILECOUNT; n++) {
 			void *pdata = rkss.data;
 			struct rkss_file_info *p = (struct rkss_file_info *)pdata;
 			p += n;
-			if (p->used == 0)
-			{
+			if (p->used == 0) {
 				debug("TEEC: write ptable in [%d][%d] .\n", i, n);
 				memcpy(p, pfileinfo, sizeof(struct rkss_file_info));
 				p->used = 1;
 				p->id = n;
 				debug("TEEC: write emt ptable : [%d,%d] name:%s, index:%d, size:%d, used:%d\n",
-						i,n,p->name,p->index,p->size,p->used);
+						i, n, p->name, p->index, p->size, p->used);
 				ret = rkss_write_section(&rkss);
-				if (ret < 0)
-				{
+				if (ret < 0) {
 					printf("TEEC: rkss_write_section fail ! ret: %d.\n", ret);
 					free(table_data);
 					return -1;
 				}
 				free(table_data);
-				return i * RKSS_EACH_FILEFOLDER_COUNT + n;
+				return i * RKSS_EACH_SECTION_FILECOUNT + n;
 			}
 		}
 	}
@@ -978,14 +864,13 @@ static int rkss_write_empty_ptable(struct rkss_file_info *pfileinfo)
 
 static int rkss_write_back_ptable(int fd, struct rkss_file_info *pfileinfo)
 {
-	int i = fd / RKSS_EACH_FILEFOLDER_COUNT;
-	int n = fd - (RKSS_EACH_FILEFOLDER_COUNT * i);
+	int i = fd / RKSS_EACH_SECTION_FILECOUNT;
+	int n = fd - (RKSS_EACH_SECTION_FILECOUNT * i);
 
 	struct rk_secure_storage rkss = {0};
 	rkss.index = i;
 	int ret = rkss_read_section(&rkss);
-	if (ret < 0)
-	{
+	if (ret < 0) {
 		debug("TEEC: rkss_read_section fail ! ret: %d.\n", ret);
 		return -1;
 	}
@@ -996,11 +881,10 @@ static int rkss_write_back_ptable(int fd, struct rkss_file_info *pfileinfo)
 
 	memcpy(p, pfileinfo, sizeof(struct rkss_file_info));
 	debug("TEEC: write ptable : [%d,%d] name:%s, index:%d, size:%d, used:%d\n",
-			i,n,p->name,p->index,p->size,p->used);
+			i, n, p->name, p->index, p->size, p->used);
 
 	ret = rkss_write_section(&rkss);
-	if (ret < 0)
-	{
+	if (ret < 0) {
 		debug("TEEC: rkss_write_section fail ! ret: %d.\n", ret);
 		return -1;
 	}
@@ -1008,32 +892,12 @@ static int rkss_write_back_ptable(int fd, struct rkss_file_info *pfileinfo)
 	return 0;
 }
 
-/*
- * Structure for file related RPC calls
- *
- * @op     The operation like open, close, read, write etc
- * @flags  Flags to the operation shared with secure world
- * @arg    Argument to operation
- * @fd     NW file descriptor
- * @len    Length of buffer at the end of this struct
- * @res    Result of the operation
- */
-struct tee_fs_rpc {
-	int op;
-	int flags;
-	int arg;
-	int fd;
-	uint32_t len;
-	int res;
-};
-
 static int tee_fs_open(struct tee_fs_rpc *fsrpc)
 {
 	int make_newfile = 0;
 	char *filename = (char *)(fsrpc + 1);
 
-	if (strlen(filename) > RKSS_NAME_MAX_LENGTH)
-	{
+	if (strlen(filename) > RKSS_MAX_NAME_LENGTH) {
 		debug("TEEC: tee_fs_open: file name too long. %s\n", filename);
 		return -1;
 	}
@@ -1041,17 +905,13 @@ static int tee_fs_open(struct tee_fs_rpc *fsrpc)
 	debug("TEEC: tee_fs_open open file: %s, len: %zu\n", filename, strlen(filename));
 	struct rkss_file_info p = {0};
 	int ret = rkss_get_fileinfo_by_name(filename, &p);
-	if (ret < 0)
-	{
+	if (ret < 0) {
 		debug("TEEC: tee_fs_open : no such file. %s\n", filename);
 		make_newfile = 1;
-	}
-	else
-	{
+	} else {
 		fsrpc->fd = ret;
 		file_seek = 0;
-		if (CHECKFLAG(fsrpc->flags, TEE_FS_O_APPEND))
-		{
+		if (CHECKFLAG(fsrpc->flags, TEE_FS_O_APPEND)) {
 			file_seek = p.size;
 		}
 	}
@@ -1062,10 +922,8 @@ static int tee_fs_open(struct tee_fs_rpc *fsrpc)
 		return -1;
 	}
 
-	if (make_newfile)
-	{
-		if (CHECKFLAG(fsrpc->flags, TEE_FS_O_CREAT))
-		{
+	if (make_newfile) {
+		if (CHECKFLAG(fsrpc->flags, TEE_FS_O_CREAT)) {
 			debug("TEEC: tee_fs_open create new file: %s\n", filename);
 			strcpy(p.name, filename);
 			p.index = 0;
@@ -1073,16 +931,13 @@ static int tee_fs_open(struct tee_fs_rpc *fsrpc)
 			p.used = 1;
 			p.flags = RK_FS_R | RK_FS_W;
 			ret = rkss_write_empty_ptable(&p);
-			if (ret < 0)
-			{
+			if (ret < 0) {
 				printf("TEEC: tee_fs_open : error. %s\n", filename);
 				return -1;
 			}
 			fsrpc->fd = ret;
 			file_seek = 0;
-		}
-		else
-		{
+		} else {
 			debug("TEEC: and no create flag found.\n");
 			return -1;
 		}
@@ -1114,23 +969,21 @@ static int tee_fs_read(struct tee_fs_rpc *fsrpc)
 
 	struct rkss_file_info p = {0};
 	int ret = rkss_get_fileinfo_by_index(fsrpc->fd, &p);
-	if (ret < 0)
-	{
+	if (ret < 0) {
 		printf("TEEC: unavailable fd !\n");
 		return -1;
 	}
 
-	if (file_seek != 0)
-	{
+	if (file_seek != 0) {
 		printf("TEEC: warning !!! file_seek != 0. unsupported now.\n");
 	}
 
-	int num = fsrpc->len / RKSS_DATA_LEN + 1;
+	int num = fsrpc->len / RKSS_DATA_SECTION_LEN + 1;
 	int di = 0;
 	debug("TEEC: reading section[%d], fd:%d, len:%d, filesize:%d\n",
 			p.index, fsrpc->fd, fsrpc->len, p.size);
 
-	uint8_t *temp_file_data = malloc(num * RKSS_DATA_LEN);
+	uint8_t *temp_file_data = malloc(num * RKSS_DATA_SECTION_LEN);
 	ret = rkss_read_multi_sections(temp_file_data, p.index, num);
 	if (ret < 0) {
 		printf("TEEC: unavailable file index\n");
@@ -1149,21 +1002,18 @@ static int tee_fs_write(struct tee_fs_rpc *fsrpc)
 	debug("TEEC: tee_fs_write ! fd:%d, lenth:%d\n", fsrpc->fd, fsrpc->len);
 	void *data = (void *)(fsrpc + 1);
 
-	if (fsrpc->fd < 0)
-	{
+	if (fsrpc->fd < 0) {
 		printf("TEEC: tee_fs_write error ! wrong fd : %d\n", fsrpc->fd);
 		return -1;
 	}
 
-	if (file_seek != 0)
-	{
+	if (file_seek != 0) {
 		printf("TEEC: warning !!! file_seek != 0. unsupported now.\n");
 	}
 
 	struct rkss_file_info p = {0};
 	int ret = rkss_get_fileinfo_by_index(fsrpc->fd, &p);
-	if (ret < 0)
-	{
+	if (ret < 0) {
 		printf("TEEC: tee_fs_write: fd unvailable!\n");
 		return -1;
 	}
@@ -1175,7 +1025,7 @@ static int tee_fs_write(struct tee_fs_rpc *fsrpc)
 	}
 	int num;
 	if (p.size != 0) {
-		num = p.size / RKSS_DATA_LEN + 1;
+		num = p.size / RKSS_DATA_SECTION_LEN + 1;
 		ret = rkss_decref_multi_usedflags_sections(p.index, num);
 		if (ret < 0) {
 			printf("TEEC: rkss_decref_multi_usedflags_sections error !\n");
@@ -1184,7 +1034,7 @@ static int tee_fs_write(struct tee_fs_rpc *fsrpc)
 	}
 
 	p.size = fsrpc->len;
-	num = fsrpc->len / RKSS_DATA_LEN + 1;
+	num = fsrpc->len / RKSS_DATA_SECTION_LEN + 1;
 	p.index = rkss_get_empty_section_from_usedflags(num);
 	debug("TEEC: Get Empty section in %d\n", p.index);
 	p.used = 1;
@@ -1196,20 +1046,19 @@ static int tee_fs_write(struct tee_fs_rpc *fsrpc)
 	}
 
 	ret = rkss_write_back_ptable(fsrpc->fd, &p);
-	if (ret < 0)
-	{
+	if (ret < 0) {
 		printf("TEEC: tee_fs_write: write ptable error!\n");
 		return -1;
 	}
 
-	uint8_t *temp_file_data = malloc(num * RKSS_DATA_LEN);
-	memset(temp_file_data, 0, num * RKSS_DATA_LEN);
+	uint8_t *temp_file_data = malloc(num * RKSS_DATA_SECTION_LEN);
+	memset(temp_file_data, 0, num * RKSS_DATA_SECTION_LEN);
 	memcpy(temp_file_data, data, p.size);
 	rkss_write_multi_sections(temp_file_data, p.index, num);
 	free(temp_file_data);
 	temp_file_data = 0;
 
-#ifdef DEBUG_RKFSS
+#ifdef DEBUG_RKSS
 	rkss_dump_usedflags();
 #endif
 
@@ -1226,29 +1075,21 @@ static int tee_fs_seek(struct tee_fs_rpc *fsrpc)
 {
 	debug("TEEC: tee_fs_seek ! fd:%d, seek:%d, flag:%x\n", fsrpc->fd, fsrpc->arg, fsrpc->flags);
 
-	if (fsrpc->flags == TEE_FS_SEEK_CUR)
-	{
+	if (fsrpc->flags == TEE_FS_SEEK_CUR) {
 		fsrpc->res = file_seek + fsrpc->arg;
-	}
-	else if (fsrpc->flags == TEE_FS_SEEK_SET)
-	{
+	} else if (fsrpc->flags == TEE_FS_SEEK_SET) {
 		file_seek = fsrpc->arg;
 		fsrpc->res = file_seek;
-	}
-	else if (fsrpc->flags == TEE_FS_SEEK_END)
-	{
+	} else if (fsrpc->flags == TEE_FS_SEEK_END) {
 		struct rkss_file_info p = {0};
 		int ret = rkss_get_fileinfo_by_index(fsrpc->fd, &p);
-		if (ret < 0)
-		{
+		if (ret < 0) {
 			printf("TEEC: unavilable fd.\n");
 			return -1;
 		}
 		file_seek = p.size + fsrpc->arg;
 		fsrpc->res = file_seek;
-	}
-	else
-	{
+	} else {
 		printf("TEEC: tee_fs_seek: unsupport seed mode.\n");
 		return -1;
 	}
@@ -1262,8 +1103,7 @@ static int tee_fs_unlink(struct tee_fs_rpc *fsrpc)
 
 	struct rkss_file_info p = {0};
 	int ret = rkss_get_fileinfo_by_name(filename, &p);
-	if (ret < 0)
-	{
+	if (ret < 0) {
 		printf("TEEC: tee_fs_unlink : no such file. %s\n", filename);
 		return 0;
 	}
@@ -1278,10 +1118,9 @@ static int tee_fs_unlink(struct tee_fs_rpc *fsrpc)
 	}
 
 	/* decrease ref from usedflags */
-	int num = p.size / RKSS_DATA_LEN + 1;
+	int num = p.size / RKSS_DATA_SECTION_LEN + 1;
 	ret = rkss_decref_multi_usedflags_sections(p.index, num);
-	if (ret < 0)
-	{
+	if (ret < 0) {
 		printf("TEEC: rkss_decref_multi_usedflags_sections error !\n");
 		return -1;
 	}
@@ -1289,13 +1128,12 @@ static int tee_fs_unlink(struct tee_fs_rpc *fsrpc)
 	/* rm from ptable */
 	memset(&p, 0, sizeof(struct rkss_file_info));
 	ret = rkss_write_back_ptable(fd, &p);
-	if (ret < 0)
-	{
+	if (ret < 0) {
 		printf("TEEC: tee_fs_unlink : write back error %d\n", ret);
 		return -1;
 	}
 
-#ifdef DEBUG_RKFSS
+#ifdef DEBUG_RKSS
 	rkss_dump_ptable();
 #endif
 
@@ -1317,16 +1155,14 @@ static int tee_fs_link(struct tee_fs_rpc *fsrpc)
 
 	struct rkss_file_info p_old = {0};
 	int ret = rkss_get_fileinfo_by_name(filename, &p_old);
-	if (ret < 0)
-	{
+	if (ret < 0) {
 		printf("TEEC: cannot find src file %s.\n", filename);
 		return -1;
 	}
 
 	struct rkss_file_info p_check = {0};
 	ret = rkss_get_fileinfo_by_name(newfilename, &p_check);
-	if (ret >= 0)
-	{
+	if (ret >= 0) {
 		printf("TEEC: file exist ! %s.\n", newfilename);
 		return -1;
 	}
@@ -1340,21 +1176,19 @@ static int tee_fs_link(struct tee_fs_rpc *fsrpc)
 	memcpy(&p_new, &p_old, sizeof(struct rkss_file_info));
 	strcpy(p_new.name, newfilename);
 	ret = rkss_write_empty_ptable(&p_new);
-	if (ret < 0)
-	{
+	if (ret < 0) {
 		printf("TEEC: tee_fs_open : error. %s\n", filename);
 		return -1;
 	}
 
-	int num = p_new.size / RKSS_DATA_LEN + 1;
+	int num = p_new.size / RKSS_DATA_SECTION_LEN + 1;
 	ret = rkss_incref_multi_usedflags_sections(p_new.index, num);
-	if (ret < 0)
-	{
+	if (ret < 0) {
 		printf("TEEC: rkss_incref_multi_usedflags_sections error !\n");
 		return -1;
 	}
 
-#ifdef DEBUG_RKFSS
+#ifdef DEBUG_RKSS
 	rkss_dump_ptable();
 #endif
 	ret = rkss_finish_commit();
@@ -1374,8 +1208,7 @@ static int tee_fs_rename(struct tee_fs_rpc *fsrpc)
 
 	struct rkss_file_info p = {0};
 	int ret = rkss_get_fileinfo_by_name(filenames, &p);
-	if (ret < 0)
-	{
+	if (ret < 0) {
 		printf("TEEC: filename no found .\n");
 		return -1;
 	}
@@ -1389,8 +1222,7 @@ static int tee_fs_rename(struct tee_fs_rpc *fsrpc)
 	strcpy(p.name, newnames);
 
 	ret = rkss_write_back_ptable(ret, &p);
-	if (ret < 0)
-	{
+	if (ret < 0) {
 		printf("TEEC: write ptable error!\n");
 		return -1;
 	}
@@ -1410,16 +1242,14 @@ static int tee_fs_truncate(struct tee_fs_rpc *fsrpc)
 	uint16_t free_index;
 
 	debug("TEEC: tee_fs_truncate: fd:%d, lenth:%d\n", fsrpc->fd, fsrpc->arg);
-	if (fsrpc->fd < 0)
-	{
+	if (fsrpc->fd < 0) {
 		printf("TEEC: tee_fs_truncate: fd unavilable !\n");
 		return -1;
 	}
 
 	struct rkss_file_info p = {0};
 	int ret = rkss_get_fileinfo_by_index(fsrpc->fd, &p);
-	if (ret < 0)
-	{
+	if (ret < 0) {
 		printf("TEEC: fd unvailable!\n");
 		return -1;
 	}
@@ -1432,8 +1262,8 @@ static int tee_fs_truncate(struct tee_fs_rpc *fsrpc)
 		printf("TEEC: truncate size not support!\n ");
 		return -1;
 	} else {
-		section_num = p.size / RKSS_DATA_LEN + 1;
-		new_section_num = fsrpc->arg / RKSS_DATA_LEN + 1;
+		section_num = p.size / RKSS_DATA_SECTION_LEN + 1;
+		new_section_num = fsrpc->arg / RKSS_DATA_SECTION_LEN + 1;
 		free_section_num = section_num - new_section_num;
 		free_index = p.index + new_section_num;
 		ret = rkss_decref_multi_usedflags_sections(free_index, free_section_num);
@@ -1470,8 +1300,7 @@ static int tee_fs_opendir(struct tee_fs_rpc *fsrpc)
 	char *dirname = (char *)(fsrpc + 1);
 	dir_seek = 0;
 	int ret = rkss_get_dirs_by_name(dirname);
-	if (ret < 0)
-	{
+	if (ret < 0) {
 		printf("TEEC: tee_fs_opendir: error\n");
 	}
 	debug("TEEC: tee_fs_opendir: %s, seek/num:%d/%d\n", dirname, dir_seek, dir_num);
@@ -1492,8 +1321,7 @@ static int tee_fs_readdir(struct tee_fs_rpc *fsrpc)
 {
 	char *dirname = (char *)(fsrpc + 1);
 	debug("TEEC: seek/num:%d/%d\n", dir_seek, dir_num);
-	if (dir_seek == dir_num)
-	{
+	if (dir_seek == dir_num) {
 		dirname = NULL;
 		fsrpc->len = 0;
 		debug("TEEC: tee_fs_readdir: END\n");
@@ -1515,13 +1343,10 @@ static int tee_fs_rmdir(struct tee_fs_rpc *fsrpc)
 
 	struct rkss_file_info p = {0};
 	int ret = rkss_get_fileinfo_by_name(dirname, &p);
-	if (ret == -100)
-	{
+	if (ret == -100) {
 		printf("TEEC: dir is not empty.\n");
 		return -1;
-	}
-	else if (ret >= 0)
-	{
+	} else if (ret >= 0) {
 		printf("TEEC: %s is not a dir.\n", p.name);
 		return -1;
 	}
@@ -1536,25 +1361,20 @@ static int tee_fs_access(struct tee_fs_rpc *fsrpc)
 
 	struct rkss_file_info p = {0};
 	int ret = rkss_get_fileinfo_by_name(filename, &p);
-	if (ret < 0 && ret != -100)
-	{
+	if (ret < 0 && ret != -100) {
 		debug("TEEC: tee_fs_access: %s no such file or directory.\n", filename);
 		return -1;
 	}
 
-	if (CHECKFLAG(fsrpc->flags, TEE_FS_R_OK))
-	{
-		if (!CHECKFLAG(p.flags, RK_FS_R))
-		{
+	if (CHECKFLAG(fsrpc->flags, TEE_FS_R_OK)) {
+		if (!CHECKFLAG(p.flags, RK_FS_R)) {
 			printf("TEEC: tee_fs_access: no permission FS_R_OK in %x.\n", p.flags);
 			return -1;
 		}
 	}
 
-	if (CHECKFLAG(fsrpc->flags, TEE_FS_W_OK))
-	{
-		if (!CHECKFLAG(p.flags, RK_FS_W))
-		{
+	if (CHECKFLAG(fsrpc->flags, TEE_FS_W_OK)) {
+		if (!CHECKFLAG(p.flags, RK_FS_W)) {
 			printf("TEEC: tee_fs_access: no permission FS_W_OK in %x.\n", p.flags);
 			return -1;
 		}
@@ -1562,10 +1382,10 @@ static int tee_fs_access(struct tee_fs_rpc *fsrpc)
 	return 0;
 }
 
-int tee_supp_rk_fs_init(void)
+int tee_supp_rk_fs_init_v1(void)
 {
 	assert(sizeof(struct rkss_file_info) == 126);
-	assert(512 / sizeof(struct rkss_file_info) == RKSS_EACH_FILEFOLDER_COUNT);
+	assert(512 / sizeof(struct rkss_file_info) == RKSS_EACH_SECTION_FILECOUNT);
 
 	__maybe_unused int i = 0;
 	unsigned char *table_data;
@@ -1580,10 +1400,9 @@ int tee_supp_rk_fs_init(void)
 		return -1;
 	}
 #ifdef DEBUG_CLEAN_RKSS // clean secure storage
-	for (i = 0; i < RKSS_DATA_SECTION_COUNT; i++)
-	{
+	for (i = 0; i < RKSS_DATA_SECTION_COUNT; i++) {
 		struct rk_secure_storage rkss = {0};
-		memset(rkss.data, 0, RKSS_DATA_LEN);
+		memset(rkss.data, 0, RKSS_DATA_SECTION_LEN);
 		rkss.index = i;
 		rkss_write_section(&rkss);
 		printf("TEEC: cleaned [%d]", i);
@@ -1597,7 +1416,7 @@ int tee_supp_rk_fs_init(void)
 	}
 
 	// Verify Partition Table
-	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
+	table_data = malloc(RKSS_DATA_SECTION_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
 		printf("TEEC: malloc table_data fail\n");
 		return -1;
@@ -1621,21 +1440,19 @@ int tee_supp_rk_fs_init(void)
 
 	// Verify Usedflags Section
 	struct rk_secure_storage rkss = {0};
-	rkss.index = RKSS_USEDFLAGS_INDEX;
+	rkss.index = RKSS_USED_FLAGS_INDEX;
 	ret = rkss_read_section(&rkss);
-	if (ret < 0)
-	{
+	if (ret < 0) {
 		printf("TEEC: rkss_read_section fail ! ret: %d.\n", ret);
 		return -1;
 	}
 	ret = rkss_verify_usedflags(&rkss);
-	if (ret < 0)
-	{
+	if (ret < 0) {
 		printf("TEEC: rkss_verify_usedflags fail ! ret: %d.\n", ret);
 		return -1;
 	}
 
-#ifdef DEBUG_RKFSS
+#ifdef DEBUG_RKSS
 	rkss_dump_ptable();
 	rkss_dump_usedflags();
 #endif
@@ -1648,26 +1465,24 @@ int tee_supp_rk_fs_init(void)
 
 	return 0;
 }
-int OpteeClientRkFsInit(void)
-{
-	debug("TEEC: OpteeClientRkFsInit\n");
-	return tee_supp_rk_fs_init();
-}
 
-static int rkss_step = 0;
-int tee_supp_rk_fs_process(void *cmd, size_t cmd_size)
+static int rkss_step;
+int tee_supp_rk_fs_process_v1(void *cmd, size_t cmd_size)
 {
 	struct tee_fs_rpc *fsrpc = cmd;
 	int ret = -1;
 
-	if (cmd_size < sizeof(struct tee_fs_rpc))
-	{
+	if (check_security_exist(0) < 0) {
+		printf("TEEC: security partition not exist! unable to use RK FS!\n");
+		return ret;
+	}
+
+	if (cmd_size < sizeof(struct tee_fs_rpc)) {
 		printf(">>>cmd_size < sizeof(struct tee_fs_rpc) !\n");
 		return ret;
 	}
 
-	if (cmd == NULL)
-	{
+	if (cmd == NULL) {
 		printf(">>>cmd == NULL !\n");
 		return ret;
 	}
@@ -1744,3 +1559,4 @@ int tee_supp_rk_fs_process(void *cmd, size_t cmd_size)
 
 	return ret;
 }
+
diff --git a/lib/optee_clientApi/OpteeClientRkFs_v2.c b/lib/optee_clientApi/OpteeClientRkFs_v2.c
new file mode 100644
index 0000000000..b8d6d45b8a
--- /dev/null
+++ b/lib/optee_clientApi/OpteeClientRkFs_v2.c
@@ -0,0 +1,1451 @@
+/*
+ * Copyright 2020, Rockchip Electronics Co., Ltd
+ * hisping lin, <hisping.lin@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <stdlib.h>
+#include <command.h>
+#include <boot_rkimg.h>
+#include <part.h>
+#include <optee_include/OpteeClientRkFs.h>
+
+//#define DEBUG_RKSS
+//#define DEBUG_CLEAN_RKSS
+
+/*
+ *	RK Secure Storage Version 2
+ *		Area0 Backup 0 Size : 256 kb	<---->	Area0 Backup 1 Size : 256 kb
+ *		Area1 Backup 0 Size : 256 kb	<---->	Area1 Backup 1 Size : 256 kb
+ *
+ *	------ 1 section is 512 bytes -----
+ *	------ Area0 Backup0 section from 0 to 511 --------
+ *	1 section for file header		[0]
+ *	1 section for used flags		[1]
+ *		- 1 byte = 2 flag
+ *	62 section for file tables		[2-63]
+ *		- size of table 128 bytes
+ *	447 section for data			[64-510]
+ *	1 section for file footer		[511]
+ *
+ * 	------ Area0 Backup1 section from 512 to 1023 --------
+ *	1 section for file header		[512]
+ *	1 section for used flags		[513]
+ *		- 1 byte = 2 flag
+ *	62 section for file tables		[514-575]
+ *		- size of table 128 bytes
+ *	447 section for data			[576-1022]
+ *	1 section for file footer		[1023]
+ *
+ * 	------ Area1 Backup0 section from 1024 to 1535 --------
+ *	1 section for file header		[1024]
+ *	1 section for used flags		[1025]
+ *		- 1 byte = 2 flag
+ *	62 section for file tables		[1026-1087]
+ *		- size of table 128 bytes
+ *	447 section for data			[1088-1534]
+ *	1 section for file footer		[1535]
+ *
+ * 	------ Area1 Backup1 section from 1536 to 2047 --------
+ *	1 section for file header		[1536]
+ *	1 section for used flags		[1537]
+ *		- 1 byte = 2 flag
+ *	62 section for file tables		[1538-1599]
+ *		- size of table 128 bytes
+ *	447 section for data			[1600-2046]
+ *	1 section for file footer		[2047]
+ */
+
+/* define for backup */
+#define RKSS_HEADER_INDEX		0
+#define RKSS_HEADER_COUNT		1
+#define RKSS_USEDFLAGS_INDEX		1
+#define RKSS_USEDFLAGS_COUNT		1
+#define RKSS_TABLE_INDEX		2
+#define RKSS_TABLE_COUNT		62
+#define RKSS_DATA_INDEX			64
+#define RKSS_DATA_COUNT			447
+#define RKSS_FOOTER_INDEX		511
+#define RKSS_FOOTER_COUNT		1
+#define RKSS_SECTION_COUNT		512
+
+#define RKSS_MAX_AREA_NUM		8
+#define RKSS_ACTIVE_AREA_NUM		2
+#define RKSS_DATA_LEN			512
+#define RKSS_EACH_FILEFOLDER_COUNT	4
+#define RKSS_TABLE_SIZE			128
+#define RKSS_NAME_MAX_LENGTH		112
+#define RKSS_BACKUP_NUM			2
+#define RKSS_TAG			0x524B5353
+
+struct rkss_file_header {
+	uint32_t	tag;
+	uint32_t	version;
+	uint32_t	backup_count;
+	uint16_t	backup_index;
+	uint16_t	backup_dirty;
+	uint8_t		reserve[496];
+};
+struct rkss_file_table {
+	uint32_t	size;
+	uint16_t	index;
+	uint8_t		flags;
+	uint8_t		used;
+	char		name[RKSS_NAME_MAX_LENGTH];
+	uint8_t		reserve[8];
+};
+struct rkss_file_footer {
+	uint8_t		reserve[508];
+	uint32_t	backup_count;
+};
+struct rkss_file {
+	struct rkss_file_header *header;
+	uint8_t	*flags;
+	struct rkss_file_table *table;
+	uint8_t	*data;
+	struct rkss_file_footer *footer;
+};
+
+/* RK Secure Storage Calls */
+static int file_seek;
+static char dir_cache[RKSS_NAME_MAX_LENGTH][12];
+static int dir_num;
+static int dir_seek;
+static uint8_t *rkss_buffer[RKSS_MAX_AREA_NUM];
+static struct rkss_file rkss_info[RKSS_MAX_AREA_NUM];
+
+static struct blk_desc *dev_desc;
+static disk_partition_t part_info;
+
+static int check_security_exist(int print_flag)
+{
+	if (!dev_desc) {
+		dev_desc = rockchip_get_bootdev();
+		if (!dev_desc) {
+			printf("TEEC: %s: Could not find device\n", __func__);
+			return -1;
+		}
+
+		if (part_get_info_by_name(dev_desc,
+					  "security", &part_info) < 0) {
+			dev_desc = NULL;
+			if (print_flag != 0)
+				printf("TEEC: Could not find security partition\n");
+			return -1;
+		}
+	}
+	return 0;
+}
+
+static int rkss_verify_usedflags(unsigned int area_index)
+{
+	uint8_t *flags;
+	int i, duel, flag, n, value;
+	uint8_t *flagw;
+	int used_count;
+
+	if (area_index >= RKSS_MAX_AREA_NUM) {
+		printf("TEEC: Not support area_index 0x%x\n", area_index);
+		return -1;
+	}
+
+	flags = rkss_info[area_index].flags;
+	if (flags == NULL) {
+		printf("TEEC: %s flags is null\n", __func__);
+		return -1;
+	}
+
+	used_count = RKSS_HEADER_COUNT +
+		RKSS_USEDFLAGS_COUNT +
+		RKSS_TABLE_COUNT;
+
+	for (i = 0; i < used_count; i++) {
+		duel = *(flags + (int)i/2);
+		flag = i & 0x1 ? duel & 0x0F : (duel & 0xF0) >> 4;
+		if (flag != 0x1)
+			goto init;
+	}
+
+	for (i = RKSS_FOOTER_INDEX; i < RKSS_USEDFLAGS_COUNT * RKSS_DATA_LEN * 2; i++) {
+		duel = *(flags + (int)i/2);
+		flag = i & 0x1 ? duel & 0x0F : (duel & 0xF0) >> 4;
+		if (flag != 0x1)
+			goto init;
+	}
+
+	debug("TEEC: %s: success.\n", __func__);
+	return 0;
+
+init:
+	debug("TEEC: init usedflags section ...\n");
+	memset(flags, 0, RKSS_USEDFLAGS_COUNT * RKSS_DATA_LEN);
+	for (n = 0; n < used_count; n++) {
+		flagw = flags + (int)n/2;
+		value = 0x1;
+		*flagw = n & 0x1 ? (*flagw & 0xF0) | (value & 0x0F) :
+				(*flagw & 0x0F) | (value << 4);
+	}
+
+	for (n = RKSS_FOOTER_INDEX; n < RKSS_USEDFLAGS_COUNT * RKSS_DATA_LEN * 2; n++) {
+		flagw = flags + (int)n/2;
+		value = 0x1;
+		*flagw = n & 0x1 ? (*flagw & 0xF0) | (value & 0x0F) :
+				(*flagw & 0x0F) | (value << 4);
+	}
+	return 0;
+}
+
+#ifdef DEBUG_CLEAN_RKSS
+static int rkss_storage_delete(uint32_t area_index)
+{
+	int ret;
+	uint32_t size;
+	uint8_t *delete_buff;
+
+	if (area_index >= RKSS_MAX_AREA_NUM) {
+		printf("TEEC: Not support area_index 0x%x\n", area_index);
+		return -1;
+	}
+
+	printf("TEEC: delete area index 0x%x!\n", area_index);
+	size = RKSS_SECTION_COUNT * RKSS_BACKUP_NUM * RKSS_DATA_LEN;
+	delete_buff = (uint8_t *)malloc(size);
+	if (!delete_buff) {
+		printf("TEEC: Malloc failed!\n");
+		return -1;
+	}
+	memset(delete_buff, 0, size);
+	ret = blk_dwrite(dev_desc,
+		part_info.start + area_index * RKSS_SECTION_COUNT * RKSS_BACKUP_NUM,
+		RKSS_SECTION_COUNT * RKSS_BACKUP_NUM, delete_buff);
+	if (ret != RKSS_SECTION_COUNT * RKSS_BACKUP_NUM) {
+		free(delete_buff);
+		printf("TEEC: blk_dwrite fail\n");
+		return -1;
+	}
+
+	if (delete_buff)
+		free(delete_buff);
+	printf("TEEC: delete area success!\n");
+	return 0;
+}
+
+static int rkss_storage_reset(void)
+{
+	if (rkss_storage_delete(0) < 0)
+		return -1;
+	if (rkss_storage_delete(1) < 0)
+		return -1;
+	return 0;
+}
+#endif
+
+#ifdef DEBUG_RKSS
+static void rkss_dump(void *data, unsigned int len)
+{
+	char *p = (char *)data;
+	unsigned int i = 0;
+
+	printf("-------------- DUMP %d --------------\n", len);
+	for (i = 0; i < len; i++) {
+		if (i % 32 == 0)
+			printf("\n");
+		printf("%02x ", *(p + i));
+	}
+	printf("\n------------- DUMP END -------------\n");
+}
+
+static void rkss_dump_ptable(void)
+{
+	int i, j, n;
+	struct rkss_file_table *ptable;
+
+	printf("-------------- DUMP ptable --------------\n");
+
+	for (i = 0; i < RKSS_MAX_AREA_NUM; i++) {
+		ptable = rkss_info[i].table;
+		if (rkss_info[i].table == NULL)
+			continue;
+		printf("--------------- area[%d] tables ------------\n", i);
+		for (j = 0; j < RKSS_TABLE_COUNT; j++) {
+			for (n = 0; n < RKSS_EACH_FILEFOLDER_COUNT; n++) {
+				printf("[%02d][%c] %s , inx:%d, size:%d\n",
+						j * RKSS_EACH_FILEFOLDER_COUNT + n,
+						ptable->used == 0 ? 'F':'T', ptable->name,
+						ptable->index, ptable->size);
+
+				ptable++;
+			}
+		}
+	}
+	printf("-------------- DUMP END --------------\n");
+}
+
+static void rkss_dump_usedflags(void)
+{
+	int i;
+
+	for (i = 0; i < RKSS_MAX_AREA_NUM; i++) {
+		if (rkss_info[i].flags == NULL)
+			continue;
+		printf("--------------- area[%d] flags ------------\n", i);
+		rkss_dump(rkss_info[i].flags, RKSS_USEDFLAGS_COUNT * RKSS_DATA_LEN);
+	}
+}
+#endif
+
+static int rkss_read_multi_sections(unsigned int area_index,
+		unsigned char *data, unsigned long index, unsigned int num)
+{
+	if (area_index >= RKSS_MAX_AREA_NUM) {
+		printf("TEEC: %s area_index invalid\n", __func__);
+		return -1;
+	}
+	if (index >= RKSS_SECTION_COUNT || num > RKSS_SECTION_COUNT ||
+		(index + num) > RKSS_SECTION_COUNT) {
+		printf("TEEC: %s index num invalid\n", __func__);
+		return -1;
+	}
+	if (rkss_buffer[area_index] == NULL) {
+		printf("TEEC: %s rkss_buffer is null\n", __func__);
+		return -1;
+	}
+	memcpy(data, rkss_buffer[area_index] + index * RKSS_DATA_LEN, num * RKSS_DATA_LEN);
+	return 0;
+}
+
+static int rkss_write_multi_sections(unsigned int area_index,
+		unsigned char *data, unsigned long index, unsigned int num)
+{
+	if (num == 0)
+		return 0;
+
+	if (area_index >= RKSS_MAX_AREA_NUM) {
+		printf("TEEC: %s area_index invalid\n", __func__);
+		return -1;
+	}
+
+	if (index >= RKSS_SECTION_COUNT || num > RKSS_SECTION_COUNT ||
+		(index + num) > RKSS_SECTION_COUNT) {
+		printf("TEEC: %s index num invalid\n", __func__);
+		return -1;
+	}
+
+	if (rkss_buffer[area_index] == NULL) {
+		printf("TEEC: %s rkss_buffer is null\n", __func__);
+		return -1;
+	}
+
+	memcpy(rkss_buffer[area_index] + index * RKSS_DATA_LEN, data, num * RKSS_DATA_LEN);
+	rkss_info[area_index].header->backup_dirty = 1;
+	return 0;
+}
+
+static int rkss_get_fileinfo_by_index(int fd,
+		struct rkss_file_table *ptable, unsigned int *out_area_index)
+{
+	struct rkss_file_table *p;
+	unsigned int area_index;
+
+	area_index = fd / (RKSS_TABLE_COUNT * RKSS_EACH_FILEFOLDER_COUNT);
+	if (area_index >= RKSS_MAX_AREA_NUM) {
+		printf("TEEC: %s area_index invalid\n", __func__);
+		return -1;
+	}
+
+	p = rkss_info[area_index].table;
+	if (p == NULL) {
+		printf("TEEC: %s table is null\n", __func__);
+		return -1;
+	}
+
+	p += fd % (RKSS_TABLE_COUNT * RKSS_EACH_FILEFOLDER_COUNT);
+	if (p->used != 1) {
+		debug("TEEC: %s unused table!\n", __func__);
+		return -1;
+	}
+	debug("TEEC: %s p->used = %d p->name=%s p->index=%d p->size=%d\n",
+		__func__, p->used, p->name, p->index, p->size);
+	memcpy(ptable, p, sizeof(struct rkss_file_table));
+	*out_area_index = area_index;
+	return 0;
+}
+
+static int rkss_get_fileinfo_by_name(char *filename,
+		struct rkss_file_table *ptable, unsigned int *out_area_index)
+{
+	int ret;
+	unsigned int i, j, n, len;
+	struct rkss_file_table *p;
+
+	len = strlen(filename);
+	if (len > RKSS_NAME_MAX_LENGTH - 1) {
+		printf("TEEC: filename is too long. length:%u\n", len);
+		return -1;
+	}
+
+	for (i = 0; i < RKSS_MAX_AREA_NUM; i++) {
+		if (rkss_info[i].table == NULL)
+			continue;
+		for (j = 0; j < RKSS_TABLE_COUNT; j++) {
+			for (n = 0; n < RKSS_EACH_FILEFOLDER_COUNT; n++) {
+				p = rkss_info[i].table + j * RKSS_EACH_FILEFOLDER_COUNT + n;
+
+				if (p->used == 0)
+					continue;
+
+				if (!strcmp(p->name, filename)) {
+					debug("TEEC: %s: area%d hit table[%d/%d], index[%d/%d]\n",
+						__func__, i, j, RKSS_TABLE_COUNT, n, RKSS_EACH_FILEFOLDER_COUNT);
+					memcpy(ptable, p, sizeof(struct rkss_file_table));
+					*out_area_index = i;
+					ret = i * RKSS_TABLE_COUNT * RKSS_EACH_FILEFOLDER_COUNT +
+						j * RKSS_EACH_FILEFOLDER_COUNT + n;
+					return ret;
+				}
+
+				// Folder Matching
+				const char *split = "/";
+				char *last_inpos = filename;
+				char *last_svpos = p->name;
+				char *cur_inpos = NULL;
+				char *cur_svpos = NULL;
+
+				do {
+					cur_inpos = strstr(last_inpos, split);
+					cur_svpos = strstr(last_svpos, split);
+					int size_in = cur_inpos == NULL ?
+							(int)strlen(last_inpos) : cur_inpos - last_inpos;
+					int size_sv = cur_svpos == NULL ?
+							(int)strlen(last_svpos) : cur_svpos - last_svpos;
+
+					ret = memcmp(last_inpos, last_svpos, size_in);
+
+					last_inpos = cur_inpos + 1;
+					last_svpos = cur_svpos + 1;
+
+					if (size_in != size_sv || ret)
+						goto UNMATCHFOLDER;
+
+				} while (cur_inpos && cur_svpos);
+
+				debug("TEEC: Matched folder: %s\n", p->name);
+				return -100;
+UNMATCHFOLDER:
+				debug("TEEC: Unmatched ...");
+			}
+		}
+	}
+	debug("TEEC: %s: file or dir no found!\n", __func__);
+	return -1;
+}
+
+static int rkss_get_dirs_by_name(char *filename)
+{
+	int ret;
+	unsigned int i, j, n, len;
+	struct rkss_file_table *p;
+
+	len = strlen(filename);
+	if (len > RKSS_NAME_MAX_LENGTH - 1) {
+		printf("TEEC: filename is too long. length:%u\n", len);
+		return -1;
+	}
+
+	dir_num = 0;
+	for (i = 0; i < RKSS_MAX_AREA_NUM; i++) {
+		if (rkss_info[i].table == NULL)
+			continue;
+		for (j = 0; j < RKSS_TABLE_COUNT; j++) {
+			for (n = 0; n < RKSS_EACH_FILEFOLDER_COUNT; n++) {
+				p = rkss_info[i].table + j * RKSS_EACH_FILEFOLDER_COUNT + n;
+
+				if (p->used == 0)
+					continue;
+
+				// Full Matching
+				ret = memcmp(p->name, filename, strlen(filename));
+				debug("TEEC: comparing [fd:%d] : %s ?= %s, ret: %d\n",
+					(i * RKSS_TABLE_COUNT + j) * RKSS_EACH_FILEFOLDER_COUNT + n,
+					p->name, filename, ret);
+				if (!ret && strlen(p->name) > strlen(filename)) {
+					char *chk = p->name + strlen(filename);
+					if (*chk == '/') {
+						char *file = p->name + strlen(filename) + 1;
+						char *subdir = strtok(file, "/");
+						debug("TEEC: found: %s\n", subdir);
+						strcpy(dir_cache[dir_num], subdir);
+						++dir_num;
+					}
+				}
+			}
+		}
+	}
+	return dir_num;
+}
+
+static int rkss_get_empty_section_from_usedflags(
+		unsigned int area_index, int section_size)
+{
+	int i = 0;
+	int count0 = 0;
+
+	if (area_index >= RKSS_MAX_AREA_NUM) {
+		printf("TEEC: %s area_index invalid\n", __func__);
+		return -1;
+	}
+	if (rkss_info[area_index].flags == NULL) {
+		printf("TEEC: %s flags is null\n", __func__);
+		return -1;
+	}
+	for (i = 0; i < RKSS_SECTION_COUNT; i++) {
+		uint8_t *flag = rkss_info[area_index].flags + (int)i/2;
+		uint8_t value = i & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
+
+		if (value == 0x0) {
+			if (++count0 == section_size)
+				return (i + 1 - section_size);
+		} else {
+			count0 = 0;
+		}
+	}
+
+	printf("TEEC: Not enough space available in secure storage !\n");
+	return -10;
+}
+
+static int rkss_incref_multi_usedflags_sections(
+	unsigned int area_index, unsigned int index, unsigned int num)
+{
+	int value, i;
+	uint8_t *flag;
+
+	if (area_index >= RKSS_MAX_AREA_NUM) {
+		printf("TEEC: %s area_index invalid\n", __func__);
+		return -1;
+	}
+
+	if (index >= RKSS_SECTION_COUNT || num > RKSS_SECTION_COUNT ||
+		(index + num) > RKSS_SECTION_COUNT) {
+		printf("TEEC: index[%d] out of range.\n", index);
+		return -1;
+	}
+	if (rkss_info[area_index].flags == NULL) {
+		printf("TEEC: %s flags is null\n", __func__);
+		return -1;
+	}
+
+	for (i = 0; i < num; i++, index++) {
+		flag = rkss_info[area_index].flags + (int)index / 2;
+		value = index & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
+		if (++value > 0xF) {
+			printf("TEEC: reference out of data: %d\n", value);
+			value = 0xF;
+		}
+		*flag = index & 0x1 ? (*flag & 0xF0) | (value & 0x0F) :
+				(*flag & 0x0F) | (value << 4);
+	}
+	rkss_info[area_index].header->backup_dirty = 1;
+	return 0;
+}
+
+static int rkss_decref_multi_usedflags_sections(
+	unsigned int area_index, unsigned int index, unsigned int num)
+{
+	int value, i;
+	uint8_t *flag;
+
+	if (area_index >= RKSS_MAX_AREA_NUM) {
+		printf("TEEC: %s area_index invalid\n", __func__);
+		return -1;
+	}
+
+	if (index >= RKSS_SECTION_COUNT || num > RKSS_SECTION_COUNT ||
+		(index + num) > RKSS_SECTION_COUNT) {
+		printf("TEEC: index[%d] out of range.\n", index);
+		return -1;
+	}
+	if (rkss_info[area_index].flags == NULL) {
+		printf("TEEC: %s flags is null\n", __func__);
+		return -1;
+	}
+
+	for (i = 0; i < num; i++, index++) {
+		flag = rkss_info[area_index].flags + (int)index / 2;
+		value = index & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
+		if (--value < 0) {
+			printf("TEEC: reference out of data: %d\n", value);
+			value = 0x0;
+		}
+		*flag = index & 0x1 ? (*flag & 0xF0) | (value & 0x0F) :
+				(*flag & 0x0F) | (value << 4);
+	}
+	rkss_info[area_index].header->backup_dirty = 1;
+	return 0;
+}
+
+static int rkss_get_remain_tables(struct rkss_file_table *p)
+{
+	unsigned int i, n;
+	int count = 0;
+
+	if (p == NULL)
+		return -1;
+
+	for (i = 0; i < RKSS_TABLE_COUNT; i++) {
+		for (n = 0; n < RKSS_EACH_FILEFOLDER_COUNT; n++) {
+			if (p->used == 0)
+				count++;
+			p++;
+		}
+	}
+	return count;
+}
+
+static int rkss_get_remain_flags(uint8_t *flags)
+{
+	unsigned int i, value;
+	uint8_t *flag;
+	int count = 0;
+
+	if (flags == NULL)
+		return -1;
+
+	for (i = 0; i < RKSS_SECTION_COUNT; i++) {
+		flag = flags + (int)i / 2;
+		value = i & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
+		if (value == 0)
+			count++;
+	}
+	return count;
+}
+
+static int rkss_get_larger_area(void)
+{
+	int i, tables, flags, max_flags = 0;
+	int area_index = -1;
+
+	for (i = 0; i < RKSS_MAX_AREA_NUM; i++) {
+		if (rkss_info[i].table == NULL ||
+		rkss_info[i].flags == NULL)
+			continue;
+		tables = rkss_get_remain_tables(rkss_info[i].table);
+		flags = rkss_get_remain_flags(rkss_info[i].flags);
+		if (tables > 0 && flags > 0 && flags > max_flags) {
+			max_flags = flags;
+			area_index = i;
+		}
+	}
+	return area_index;
+}
+
+static int rkss_write_area_empty_ptable(
+	unsigned int area_index, struct rkss_file_table *pfile_table)
+{
+	int i, n, ret;
+	struct rkss_file_table *p;
+
+	if (rkss_info[area_index].table == NULL) {
+		printf("TEEC: %s table is null\n", __func__);
+		return -1;
+	}
+	for (i = 0; i < RKSS_TABLE_COUNT; i++) {
+		for (n = 0; n < RKSS_EACH_FILEFOLDER_COUNT; n++) {
+			p = rkss_info[area_index].table + i * RKSS_EACH_FILEFOLDER_COUNT + n;
+			if (p->used == 0) {
+				memcpy(p, pfile_table, sizeof(struct rkss_file_table));
+				p->used = 1;
+				debug("TEEC: write emt ptable : [%d,%d] name:%s, index:%d, size:%d, used:%d\n",
+						i, n, p->name, p->index, p->size, p->used);
+				rkss_info[area_index].header->backup_dirty = 1;
+				ret = area_index * RKSS_TABLE_COUNT * RKSS_EACH_FILEFOLDER_COUNT +
+					i * RKSS_EACH_FILEFOLDER_COUNT + n;
+				return ret;
+			}
+		}
+	}
+	printf("TEEC: No enough ptable space available in secure storage.\n");
+	return -1;
+}
+
+static int rkss_write_empty_ptable(struct rkss_file_table *pfile_table)
+{
+	int area_index;
+
+	area_index = rkss_get_larger_area();
+	if (area_index < 0) {
+		printf("TEEC: get area index fail\n");
+		return -1;
+	}
+
+	return rkss_write_area_empty_ptable(area_index, pfile_table);
+}
+
+static int rkss_write_back_ptable(
+	int fd, struct rkss_file_table *pfile_table)
+{
+	struct rkss_file_table *p;
+	unsigned int area_index;
+
+	area_index = fd / (RKSS_TABLE_COUNT * RKSS_EACH_FILEFOLDER_COUNT);
+	if (area_index >= RKSS_MAX_AREA_NUM) {
+		printf("TEEC: %s area_index invalid\n", __func__);
+		return -1;
+	}
+
+	p = rkss_info[area_index].table;
+	if (p == NULL) {
+		printf("TEEC: %s table is null\n", __func__);
+		return -1;
+	}
+
+	p += fd % (RKSS_TABLE_COUNT * RKSS_EACH_FILEFOLDER_COUNT);
+
+	memcpy(p, pfile_table, sizeof(struct rkss_file_table));
+	debug("TEEC: write ptable : name:%s, index:%d, size:%d, used:%d\n",
+		p->name, p->index, p->size, p->used);
+
+	rkss_info[area_index].header->backup_dirty = 1;
+	return 0;
+}
+
+static int rkss_storage_write(void)
+{
+	int ret, i;
+
+	for (i = 0; i < RKSS_MAX_AREA_NUM; i++) {
+		if (rkss_info[i].header != NULL && rkss_info[i].header->backup_dirty == 1) {
+			rkss_info[i].header->backup_count++;
+			rkss_info[i].footer->backup_count = rkss_info[i].header->backup_count;
+			rkss_info[i].header->backup_index++;
+			if (rkss_info[i].header->backup_index >= RKSS_BACKUP_NUM)
+				rkss_info[i].header->backup_index = 0;
+			rkss_info[i].header->backup_dirty = 0;
+
+			if (rkss_info[i].header->backup_count == 0xffffffff) {
+				rkss_info[i].header->backup_count = 1;
+				rkss_info[i].footer->backup_count = 1;
+				ret = blk_dwrite(dev_desc,
+					part_info.start + i * RKSS_SECTION_COUNT * RKSS_BACKUP_NUM +
+					rkss_info[i].header->backup_index * RKSS_SECTION_COUNT,
+					RKSS_SECTION_COUNT, rkss_buffer[i]);
+				if (ret != RKSS_SECTION_COUNT) {
+					printf("TEEC: blk_dwrite fail\n");
+					return -1;
+				}
+
+				rkss_info[i].header->backup_count = 2;
+				rkss_info[i].footer->backup_count = 2;
+				rkss_info[i].header->backup_index++;
+				if (rkss_info[i].header->backup_index >= RKSS_BACKUP_NUM)
+					rkss_info[i].header->backup_index = 0;
+				ret = blk_dwrite(dev_desc,
+					part_info.start + i * RKSS_SECTION_COUNT * RKSS_BACKUP_NUM +
+					rkss_info[i].header->backup_index * RKSS_SECTION_COUNT,
+					RKSS_SECTION_COUNT, rkss_buffer[i]);
+				if (ret != RKSS_SECTION_COUNT) {
+					printf("TEEC: blk_dwrite fail\n");
+					return -1;
+				}
+			} else {
+				ret = blk_dwrite(dev_desc,
+					part_info.start + i * RKSS_SECTION_COUNT * RKSS_BACKUP_NUM +
+					rkss_info[i].header->backup_index * RKSS_SECTION_COUNT,
+					RKSS_SECTION_COUNT, rkss_buffer[i]);
+				if (ret != RKSS_SECTION_COUNT) {
+					printf("TEEC: blk_dwrite fail\n");
+					return -1;
+				}
+			}
+		}
+	}
+	return 0;
+}
+
+static int rkss_storage_init(uint32_t area_index)
+{
+	unsigned long ret = 0;
+	uint32_t size, i;
+	uint32_t max_ver = 0;
+	uint32_t max_index = 0;
+	uint32_t flags_offset, table_offset, data_offset, footer_offset;
+
+	if (area_index >= RKSS_MAX_AREA_NUM) {
+		printf("TEEC: Not support index=0x%x\n", area_index);
+		return -1;
+	}
+
+	size = RKSS_SECTION_COUNT * RKSS_DATA_LEN;
+	flags_offset = RKSS_USEDFLAGS_INDEX * RKSS_DATA_LEN;
+	table_offset = RKSS_TABLE_INDEX * RKSS_DATA_LEN;
+	data_offset = RKSS_DATA_INDEX * RKSS_DATA_LEN;
+	footer_offset = RKSS_FOOTER_INDEX * RKSS_DATA_LEN;
+
+	if (rkss_buffer[area_index] == NULL) {
+		/* Always use, no need to release */
+		rkss_buffer[area_index] = (uint8_t *)malloc(size);
+		if (!(rkss_buffer[area_index])) {
+			printf("TEEC: Malloc failed!\n");
+			return -1;
+		}
+
+		/* Pointer initialization */
+		rkss_info[area_index].header = (struct rkss_file_header *)(rkss_buffer[area_index]);
+		rkss_info[area_index].flags = (uint8_t *)(rkss_buffer[area_index] + flags_offset);
+		rkss_info[area_index].table = (struct rkss_file_table *)(rkss_buffer[area_index] + table_offset);
+		rkss_info[area_index].data = (uint8_t *)(rkss_buffer[area_index] + data_offset);
+		rkss_info[area_index].footer = (struct rkss_file_footer *)(rkss_buffer[area_index] + footer_offset);
+
+		/* Find valid from (backup0 - backup1) */
+		for (i = 0; i < RKSS_BACKUP_NUM; i++) {
+			ret = blk_dread(dev_desc,
+				part_info.start +
+				area_index * RKSS_SECTION_COUNT * RKSS_BACKUP_NUM +
+				i * RKSS_SECTION_COUNT,
+				RKSS_SECTION_COUNT, rkss_buffer[area_index]);
+			if (ret != RKSS_SECTION_COUNT) {
+				printf("TEEC: blk_dread fail\n");
+				return -1;
+			}
+
+			if ((rkss_info[area_index].header->tag == RKSS_TAG) &&
+			    (rkss_info[area_index].footer->backup_count == rkss_info[area_index].header->backup_count)) {
+				if (max_ver < rkss_info[area_index].header->backup_count) {
+					max_index = i;
+					max_ver = rkss_info[area_index].header->backup_count;
+				}
+			}
+		}
+
+		if (max_ver) {
+			debug("TEEC: max_ver=%d, max_index=%d.\n",
+				max_ver, max_index);
+
+			if (max_index != (RKSS_BACKUP_NUM - 1)) {
+				ret = blk_dread(dev_desc,
+					part_info.start +
+					area_index * RKSS_SECTION_COUNT * RKSS_BACKUP_NUM +
+					max_index * RKSS_SECTION_COUNT,
+					RKSS_SECTION_COUNT, rkss_buffer[area_index]);
+				if (ret != RKSS_SECTION_COUNT) {
+					printf("TEEC: blk_dread fail\n");
+					return -1;
+				}
+			}
+
+			if (rkss_info[area_index].header->version == RKSS_VERSION_V2) {
+				debug("TEEC: data version equal to image version, do nothing!\n");
+			} else if (rkss_info[area_index].header->version < RKSS_VERSION_V2) {
+				printf("TEEC: data version lower than image version!\n");
+				/* convert rkss version 2 to higher rkss version */
+				free(rkss_buffer[area_index]);
+				rkss_buffer[area_index] = NULL;
+				return -1;
+			} else {
+				printf("TEEC: data version higher than image version!\n");
+				printf("TEEC: please update image!\n");
+				free(rkss_buffer[area_index]);
+				rkss_buffer[area_index] = NULL;
+				return -1;
+			}
+		} else {
+			printf("TEEC: Reset area[%d] info...\n", area_index);
+			memset(rkss_buffer[area_index], 0, size);
+			rkss_info[area_index].header->tag = RKSS_TAG;
+			rkss_info[area_index].header->version = RKSS_VERSION_V2;
+			rkss_info[area_index].header->backup_count = 1;
+			rkss_info[area_index].footer->backup_count = 1;
+			/* Verify Usedflags Section */
+			if (rkss_verify_usedflags(area_index) < 0) {
+				printf("TEEC: rkss_verify_usedflags fail !\n");
+				return -1;
+			}
+		}
+	}
+	return 0;
+}
+
+static int tee_fs_open(struct tee_fs_rpc *fsrpc)
+{
+	int make_newfile = 0;
+	char *filename = (char *)(fsrpc + 1);
+	struct rkss_file_table p = {0};
+	int ret;
+	unsigned int area_index;
+
+	if (strlen(filename) > RKSS_NAME_MAX_LENGTH) {
+		debug("TEEC: %s: file name too long. %s\n", __func__, filename);
+		return -1;
+	}
+
+	debug("TEEC: %s open file: %s, len: %zu\n",
+		__func__, filename, strlen(filename));
+
+	ret = rkss_get_fileinfo_by_name(filename, &p, &area_index);
+	if (ret < 0) {
+		debug("TEEC: %s : no such file. %s\n", __func__, filename);
+		make_newfile = 1;
+	} else {
+		fsrpc->fd = ret;
+		file_seek = 0;
+		if (CHECKFLAG(fsrpc->flags, TEE_FS_O_APPEND))
+			file_seek = p.size;
+	}
+
+	if (make_newfile) {
+		if (CHECKFLAG(fsrpc->flags, TEE_FS_O_CREAT)) {
+			debug("TEEC: %s create new file: %s\n",
+				__func__, filename);
+			strcpy(p.name, filename);
+			p.index = 0;
+			p.size = 0;
+			p.used = 1;
+			p.flags = RK_FS_R | RK_FS_W;
+			ret = rkss_write_empty_ptable(&p);
+			if (ret < 0) {
+				printf("TEEC: %s : error. %s\n",
+					__func__, filename);
+				return -1;
+			}
+			fsrpc->fd = ret;
+			file_seek = 0;
+		} else {
+			debug("TEEC: and no create flag found.\n");
+			return -1;
+		}
+	}
+
+	debug("TEEC: %s ! %s , fd:%d, flag: %x, len: %d\n",
+		__func__, filename, fsrpc->fd, fsrpc->flags, fsrpc->len);
+
+	return fsrpc->fd;
+}
+
+static int tee_fs_close(struct tee_fs_rpc *fsrpc)
+{
+	debug("TEEC: %s !\n", __func__);
+
+	UNREFERENCED_PARAMETER(fsrpc);
+	return 0;
+}
+
+static int tee_fs_read(struct tee_fs_rpc *fsrpc)
+{
+	void *data = (void *)(fsrpc + 1);
+	struct rkss_file_table p = {0};
+	int ret, num, di;
+	uint8_t *temp_file_data;
+	unsigned int area_index;
+
+	debug("TEEC: %s! fd:%d, len:%d\n", __func__, fsrpc->fd, fsrpc->len);
+
+	ret = rkss_get_fileinfo_by_index(fsrpc->fd, &p, &area_index);
+	if (ret < 0) {
+		printf("TEEC: unavailable fd !\n");
+		return -1;
+	}
+
+	if (file_seek != 0)
+		printf("TEEC: warning !!! file_seek != 0. unsupported now.\n");
+
+	num = fsrpc->len / RKSS_DATA_LEN + 1;
+	di = 0;
+	debug("TEEC: reading section[%d], fd:%d, len:%d, filesize:%d\n",
+			p.index, fsrpc->fd, fsrpc->len, p.size);
+
+	temp_file_data = malloc(num * RKSS_DATA_LEN);
+	ret = rkss_read_multi_sections(area_index, temp_file_data, p.index, num);
+	if (ret < 0) {
+		printf("TEEC: unavailable file index\n");
+		free(temp_file_data);
+		return -1;
+	}
+	di = fsrpc->len > p.size ? p.size : fsrpc->len;
+	memcpy(data, temp_file_data, di);
+	free(temp_file_data);
+	temp_file_data = 0;
+	return di;
+}
+
+static int tee_fs_write(struct tee_fs_rpc *fsrpc)
+{
+	void *data = (void *)(fsrpc + 1);
+	struct rkss_file_table p = {0};
+	int ret, num;
+	uint8_t *temp_file_data;
+	unsigned int area_index;
+
+	debug("TEEC: %s ! fd:%d, lenth:%d\n", __func__, fsrpc->fd, fsrpc->len);
+
+	if (fsrpc->fd < 0) {
+		printf("TEEC: %s error ! wrong fd : %d\n", __func__, fsrpc->fd);
+		return -1;
+	}
+
+	if (file_seek != 0)
+		printf("TEEC: warning !!! file_seek != 0. unsupported now.\n");
+
+	ret = rkss_get_fileinfo_by_index(fsrpc->fd, &p, &area_index);
+	if (ret < 0) {
+		printf("TEEC: %s: fd unvailable!\n", __func__);
+		return -1;
+	}
+
+	if (p.size != 0) {
+		num = p.size / RKSS_DATA_LEN + 1;
+		ret = rkss_decref_multi_usedflags_sections(area_index, p.index, num);
+		if (ret < 0) {
+			printf("TEEC: rkss decref usedflags error !\n");
+			return -1;
+		}
+	}
+
+	p.size = fsrpc->len;
+	num = fsrpc->len / RKSS_DATA_LEN + 1;
+	p.index = rkss_get_empty_section_from_usedflags(area_index, num);
+	debug("TEEC: Get Empty section in %d\n", p.index);
+	p.used = 1;
+
+	ret = rkss_incref_multi_usedflags_sections(area_index, p.index, num);
+	if (ret < 0) {
+		printf("TEEC: rkss_incref_multi_usedflags_sections error !\n");
+		ret = -1;
+	}
+
+	ret = rkss_write_back_ptable(fsrpc->fd, &p);
+	if (ret < 0) {
+		printf("TEEC: %s: write ptable error!\n", __func__);
+		return -1;
+	}
+
+	temp_file_data = malloc(num * RKSS_DATA_LEN);
+	if (temp_file_data == NULL) {
+		printf("TEEC: Malloc failed!\n");
+		return -1;
+	}
+	memset(temp_file_data, 0, num * RKSS_DATA_LEN);
+	memcpy(temp_file_data, data, p.size);
+	rkss_write_multi_sections(area_index, temp_file_data, p.index, num);
+	free(temp_file_data);
+	temp_file_data = 0;
+
+	return fsrpc->len;
+}
+
+static int tee_fs_seek(struct tee_fs_rpc *fsrpc)
+{
+	struct rkss_file_table p = {0};
+	int ret;
+	unsigned int area_index;
+
+	debug("TEEC: %s ! fd:%d, seek:%d, flag:%x\n",
+		__func__, fsrpc->fd, fsrpc->arg, fsrpc->flags);
+
+	if (fsrpc->flags == TEE_FS_SEEK_CUR) {
+		fsrpc->res = file_seek + fsrpc->arg;
+	} else if (fsrpc->flags == TEE_FS_SEEK_SET) {
+		file_seek = fsrpc->arg;
+		fsrpc->res = file_seek;
+	} else if (fsrpc->flags == TEE_FS_SEEK_END) {
+		ret = rkss_get_fileinfo_by_index(fsrpc->fd, &p, &area_index);
+		if (ret < 0) {
+			printf("TEEC: unavilable fd.\n");
+			return -1;
+		}
+		file_seek = p.size + fsrpc->arg;
+		fsrpc->res = file_seek;
+	} else {
+		printf("TEEC: %s: unsupport seed mode.\n", __func__);
+		return -1;
+	}
+
+	return fsrpc->res;
+}
+
+static int tee_fs_unlink(struct tee_fs_rpc *fsrpc)
+{
+	char *filename = (char *)(fsrpc + 1);
+	struct rkss_file_table p = {0};
+	int ret, fd, num;
+	unsigned int area_index;
+
+	fd = rkss_get_fileinfo_by_name(filename, &p, &area_index);
+	if (fd < 0) {
+		printf("TEEC: %s : no such file. %s\n", __func__, filename);
+		return 0;
+	}
+
+	debug("TEEC: %s ! %s fd:%d index:%d size:%d\n",
+		__func__, filename, fd, p.index, p.size);
+
+	/* decrease ref from usedflags */
+	num = p.size / RKSS_DATA_LEN + 1;
+	ret = rkss_decref_multi_usedflags_sections(area_index, p.index, num);
+	if (ret < 0) {
+		printf("TEEC: rkss_decref_multi_usedflags_sections error !\n");
+		return -1;
+	}
+
+	/* rm from ptable */
+	memset(&p, 0, sizeof(struct rkss_file_table));
+	ret = rkss_write_back_ptable(fd, &p);
+	if (ret < 0) {
+		printf("TEEC: %s : write back error %d\n", __func__, ret);
+		return -1;
+	}
+
+	return 0;
+}
+
+static int tee_fs_link(struct tee_fs_rpc *fsrpc)
+{
+	char *filename = (char *)(fsrpc + 1);
+	size_t offset_new_fn = strlen(filename) + 1;
+	char *newfilename = filename + offset_new_fn;
+	struct rkss_file_table p_old = {0};
+	struct rkss_file_table p_check = {0};
+	struct rkss_file_table p_new = {0};
+	int ret, num;
+	unsigned int old_area, new_area;
+
+	debug("TEEC: %s ! %s -> %s\n", __func__, filename, newfilename);
+
+	ret = rkss_get_fileinfo_by_name(filename, &p_old, &old_area);
+	if (ret < 0) {
+		printf("TEEC: cannot find src file %s.\n", filename);
+		return -1;
+	}
+
+	ret = rkss_get_fileinfo_by_name(newfilename, &p_check, &new_area);
+	if (ret >= 0) {
+		printf("TEEC: file exist ! %s.\n", newfilename);
+		return -1;
+	}
+
+	memcpy(&p_new, &p_old, sizeof(struct rkss_file_table));
+	strcpy(p_new.name, newfilename);
+	ret = rkss_write_area_empty_ptable(old_area, &p_new);
+	if (ret < 0) {
+		printf("TEEC: tee_fs_open : error. %s\n", filename);
+		return -1;
+	}
+
+	num = p_new.size / RKSS_DATA_LEN + 1;
+	ret = rkss_incref_multi_usedflags_sections(old_area, p_new.index, num);
+	if (ret < 0) {
+		printf("TEEC: rkss_incref_multi_usedflags_sections error !\n");
+		return -1;
+	}
+
+	return 0;
+}
+
+static int tee_fs_rename(struct tee_fs_rpc *fsrpc)
+{
+	char *filenames = (char *)(fsrpc + 1);
+	char *newnames = filenames + strlen(filenames) + 1;
+	struct rkss_file_table p = {0};
+	int ret;
+	unsigned int area_index;
+
+	debug("TEEC: rename: %s -> %s\n", filenames, newnames);
+
+	ret = rkss_get_fileinfo_by_name(filenames, &p, &area_index);
+	if (ret < 0) {
+		printf("TEEC: filename no found .\n");
+		return -1;
+	}
+
+	strcpy(p.name, newnames);
+
+	ret = rkss_write_back_ptable(ret, &p);
+	if (ret < 0) {
+		printf("TEEC: write ptable error!\n");
+		return -1;
+	}
+
+	return 0;
+}
+
+static int tee_fs_truncate(struct tee_fs_rpc *fsrpc)
+{
+	int section_num, new_section_num, free_section_num;
+	uint16_t free_index;
+	struct rkss_file_table p = {0};
+	int ret;
+	unsigned int area_index;
+
+	debug("TEEC: %s: fd:%d, lenth:%d\n",
+		__func__, fsrpc->fd, fsrpc->arg);
+	if (fsrpc->fd < 0) {
+		printf("TEEC: %s: fd unavilable !\n", __func__);
+		return -1;
+	}
+
+	ret = rkss_get_fileinfo_by_index(fsrpc->fd, &p, &area_index);
+	if (ret < 0) {
+		printf("TEEC: fd unvailable!\n");
+		return -1;
+	}
+
+	if (p.size < fsrpc->arg) {
+		printf("TEEC: truncate size not support!\n ");
+		return -1;
+	} else {
+		section_num = p.size / RKSS_DATA_LEN + 1;
+		new_section_num = fsrpc->arg / RKSS_DATA_LEN + 1;
+		free_section_num = section_num - new_section_num;
+		free_index = p.index + new_section_num;
+		ret = rkss_decref_multi_usedflags_sections(area_index, free_index, free_section_num);
+		if (ret < 0) {
+			printf("TEEC: rkss decref usedflags error!\n");
+			return -1;
+		}
+		p.size = fsrpc->arg;
+		ret = rkss_write_back_ptable(fsrpc->fd, &p);
+		if (ret < 0) {
+			printf("TEEC: rkss_write_back_ptable error!\n");
+			return -1;
+		}
+	}
+
+	return 0;
+}
+
+static int tee_fs_mkdir(struct tee_fs_rpc *fsrpc)
+{
+	char *dirname = (char *)(fsrpc + 1);
+
+	UNREFERENCED_PARAMETER(dirname);
+	debug("TEEC: %s: %s\n", __func__, dirname);
+	return 0;
+}
+
+static int tee_fs_opendir(struct tee_fs_rpc *fsrpc)
+{
+	char *dirname = (char *)(fsrpc + 1);
+	int ret;
+
+	dir_seek = 0;
+	ret = rkss_get_dirs_by_name(dirname);
+	if (ret < 0)
+		printf("TEEC: %s: error\n", __func__);
+
+	debug("TEEC: %s: %s, seek/num:%d/%d\n", __func__,
+		dirname, dir_seek, dir_num);
+	return 0;
+}
+
+static int tee_fs_closedir(struct tee_fs_rpc *fsrpc)
+{
+	char *dirname = (char *)(fsrpc + 1);
+
+	UNREFERENCED_PARAMETER(dirname);
+	debug("TEEC: %s: %s\n", __func__, dirname);
+	dir_seek = 0;
+	dir_num = 0;
+	return 0;
+}
+
+static int tee_fs_readdir(struct tee_fs_rpc *fsrpc)
+{
+	char *dirname = (char *)(fsrpc + 1);
+
+	debug("TEEC: seek/num:%d/%d\n", dir_seek, dir_num);
+	if (dir_seek == dir_num) {
+		dirname = NULL;
+		fsrpc->len = 0;
+		debug("TEEC: %s: END\n", __func__);
+		return -1;
+	}
+
+	strcpy(dirname, dir_cache[dir_seek]);
+	fsrpc->len = strlen(dir_cache[dir_seek]) + 1;
+	++dir_seek;
+
+	debug("TEEC: %s: %s\n", __func__, dirname);
+	return 0;
+}
+
+static int tee_fs_rmdir(struct tee_fs_rpc *fsrpc)
+{
+	char *dirname = (char *)(fsrpc + 1);
+	struct rkss_file_table p = {0};
+	int ret;
+	unsigned int area_index;
+
+	debug("TEEC: %s: %s\n", __func__, dirname);
+
+	ret = rkss_get_fileinfo_by_name(dirname, &p, &area_index);
+	if (ret == -100) {
+		printf("TEEC: dir is not empty.\n");
+		return -1;
+	} else if (ret >= 0) {
+		printf("TEEC: %s is not a dir.\n", p.name);
+		return -1;
+	}
+	debug("TEEC: rmdir success.\n");
+	return 0;
+}
+
+static int tee_fs_access(struct tee_fs_rpc *fsrpc)
+{
+	char *filename = (char *)(fsrpc + 1);
+	struct rkss_file_table p = {0};
+	int ret;
+	unsigned int area_index;
+
+	debug("TEEC: %s: name:%s,flag:%x\n",
+		__func__, filename, fsrpc->flags);
+
+	ret = rkss_get_fileinfo_by_name(filename, &p, &area_index);
+	if (ret < 0 && ret != -100) {
+		debug("TEEC: %s: %s no such file or directory.\n",
+			__func__, filename);
+		return -1;
+	}
+
+	if (CHECKFLAG(fsrpc->flags, TEE_FS_R_OK)) {
+		if (!CHECKFLAG(p.flags, RK_FS_R)) {
+			printf("TEEC: %s: no permission FS_R_OK in %x.\n",
+				__func__, p.flags);
+			return -1;
+		}
+	}
+
+	if (CHECKFLAG(fsrpc->flags, TEE_FS_W_OK)) {
+		if (!CHECKFLAG(p.flags, RK_FS_W)) {
+			printf("TEEC: %s: no permission FS_W_OK in %x.\n",
+				__func__, p.flags);
+			return -1;
+		}
+	}
+	return 0;
+}
+
+int tee_supp_rk_fs_init_v2(void)
+{
+	assert(sizeof(struct rkss_file_table) == RKSS_TABLE_SIZE);
+	assert(RKSS_DATA_LEN / sizeof(struct rkss_file_table) ==
+		RKSS_EACH_FILEFOLDER_COUNT);
+
+	if (check_security_exist(0) < 0)
+		return 0;
+
+	/* clean secure storage */
+#ifdef DEBUG_CLEAN_RKSS
+	if (rkss_storage_reset() < 0)
+		return -1;
+#endif
+
+	for (uint32_t i = 0; i < RKSS_ACTIVE_AREA_NUM; i++) {
+		if (rkss_storage_init(i) < 0)
+			return -1;
+	}
+
+#ifdef DEBUG_RKSS
+	rkss_dump_ptable();
+	rkss_dump_usedflags();
+#endif
+
+	return 0;
+}
+
+static int rkss_step;
+int tee_supp_rk_fs_process_v2(void *cmd, size_t cmd_size)
+{
+	struct tee_fs_rpc *fsrpc = cmd;
+	int ret = -1;
+
+	if (check_security_exist(0) < 0) {
+		printf("TEEC: security partition not exist! unable to use RK FS!\n");
+		return ret;
+	}
+
+	if (cmd_size < sizeof(struct tee_fs_rpc)) {
+		printf(">>>cmd_size < sizeof(struct tee_fs_rpc) !\n");
+		return ret;
+	}
+
+	if (cmd == NULL) {
+		printf(">>>cmd == NULL !\n");
+		return ret;
+	}
+
+	switch (fsrpc->op) {
+	case TEE_FS_OPEN:
+		debug(">>>>>>> [%d] TEE_FS_OPEN !\n", rkss_step++);
+		ret = tee_fs_open(fsrpc);
+		break;
+	case TEE_FS_CLOSE:
+		debug(">>>>>>> [%d] TEE_FS_CLOSE !\n", rkss_step++);
+		ret = tee_fs_close(fsrpc);
+		rkss_storage_write();
+		break;
+	case TEE_FS_READ:
+		debug(">>>>>>> [%d] TEE_FS_READ !\n", rkss_step++);
+		ret = tee_fs_read(fsrpc);
+		break;
+	case TEE_FS_WRITE:
+		debug(">>>>>>> [%d] TEE_FS_WRITE !\n", rkss_step++);
+		ret = tee_fs_write(fsrpc);
+		break;
+	case TEE_FS_SEEK:
+		debug(">>>>>>> [%d] TEE_FS_SEEK !\n", rkss_step++);
+		ret = tee_fs_seek(fsrpc);
+		break;
+	case TEE_FS_UNLINK:
+		debug(">>>>>>> [%d] TEE_FS_UNLINK !\n", rkss_step++);
+		ret = tee_fs_unlink(fsrpc);
+		rkss_storage_write();
+		break;
+	case TEE_FS_RENAME:
+		debug(">>>>>>> [%d] TEE_FS_RENAME !\n", rkss_step++);
+		ret = tee_fs_rename(fsrpc);
+		rkss_storage_write();
+		break;
+	case TEE_FS_TRUNC:
+		debug(">>>>>>> [%d] TEE_FS_TRUNC !\n", rkss_step++);
+		ret = tee_fs_truncate(fsrpc);
+		break;
+	case TEE_FS_MKDIR:
+		debug(">>>>>>> [%d] TEE_FS_MKDIR !\n", rkss_step++);
+		ret = tee_fs_mkdir(fsrpc);
+		break;
+	case TEE_FS_OPENDIR:
+		debug(">>>>>>> [%d] TEE_FS_OPENDIR !\n", rkss_step++);
+		ret = tee_fs_opendir(fsrpc);
+		break;
+	case TEE_FS_CLOSEDIR:
+		debug(">>>>>>> [%d] TEE_FS_CLOSEDIR !\n", rkss_step++);
+		ret = tee_fs_closedir(fsrpc);
+		break;
+	case TEE_FS_READDIR:
+		debug(">>>>>>> [%d] TEE_FS_READDIR !\n", rkss_step++);
+		ret = tee_fs_readdir(fsrpc);
+		break;
+	case TEE_FS_RMDIR:
+		debug(">>>>>>> [%d] TEE_FS_RMDIR !\n", rkss_step++);
+		ret = tee_fs_rmdir(fsrpc);
+		break;
+	case TEE_FS_ACCESS:
+		debug(">>>>>>> [%d] TEE_FS_ACCESS !\n", rkss_step++);
+		ret = tee_fs_access(fsrpc);
+		break;
+	case TEE_FS_LINK:
+		debug(">>>>>>> [%d] TEE_FS_LINK !\n", rkss_step++);
+		ret = tee_fs_link(fsrpc);
+		rkss_storage_write();
+		break;
+	default:
+		printf(">>>>> DEFAULT !! %d\n", fsrpc->op);
+		break;
+	}
+
+	fsrpc->res = ret;
+	debug(">>>>>>> fsrpc->res = [%d]	!\n", fsrpc->res);
+
+	return ret;
+}

commit 986192a2bcd7a80459ac96b0fcc3eaecc5a3857a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 24 10:43:33 2020 +0800

    common: image-fit: remove fit_get_image_defconf_node()
    
    It's not a standard and nice interface, remove it.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ib918c4759fa5e01393c36eccd5673b8ca754ef35

diff --git a/common/image-fit.c b/common/image-fit.c
index 1327039cf1..e5996414ee 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -1108,33 +1108,6 @@ int fit_set_totalsize(void *fit, int noffset, int totalsize)
 	return 0;
 }
 
-int fit_get_image_defconf_node(const void *fit, int *images_noffset, int *def_noffset)
-{
-	int images_node, confs_node, defconf_node;
-	const char *def_name;
-
-	images_node = fdt_path_offset(fit, FIT_IMAGES_PATH);
-	if (images_node < 0)
-		return images_node;
-
-	confs_node = fdt_path_offset(fit, FIT_CONFS_PATH);
-	if (confs_node < 0)
-		return confs_node;
-
-	def_name = fdt_getprop(fit, confs_node, FIT_DEFAULT_PROP, NULL);
-	if (!def_name)
-		return -ENOENT;
-
-	defconf_node = fdt_subnode_offset(fit, confs_node, def_name);
-	if (defconf_node < 0)
-		return defconf_node;
-
-	*images_noffset = images_node;
-	*def_noffset = defconf_node;
-
-	return 0;
-}
-
 /**
  * calculate_hash - calculate and return hash for provided input data
  * @data: pointer to the input data
diff --git a/include/image.h b/include/image.h
index 9ddbc50324..46d54506b2 100644
--- a/include/image.h
+++ b/include/image.h
@@ -1028,9 +1028,6 @@ int fit_image_check_hash(const void *fit, int noffset, const void *data,
 int fit_set_timestamp(void *fit, int noffset, time_t timestamp);
 int fit_set_totalsize(void *fit, int noffset, int totalsize);
 
-int fit_get_image_defconf_node(const void *fit,
-			       int *images_noffset, int *def_noffset);
-
 /**
  * fit_add_verification_data() - add verification data to FIT image nodes
  *

commit 189c0d68bdc5d712d7ec50a27f18c9b62276b027
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 23 17:02:50 2020 +0800

    rockchip: board: place board_quiesce_devices() at the bottom
    
    Being convenient for other functions to be called.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I1a02a150cf66ccf3dfc4be3621ad62829c3e6eb5

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index c8f0cd34c0..a905bb70ed 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -469,22 +469,6 @@ void arch_preboot_os(uint32_t bootm_state)
 		hotkey_run(HK_CLI_OS_PRE);
 }
 
-void board_quiesce_devices(void *images)
-{
-	hotkey_run(HK_CMDLINE);
-	hotkey_run(HK_CLI_OS_GO);
-
-#ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
-	/* Destroy atags makes next warm boot safer */
-	atags_destroy();
-#endif
-
-#ifdef CONFIG_FIT_ROLLBACK_PROTECT
-	/* TODO */
-	printf("fit: rollback protect not implement\n");
-#endif
-}
-
 void enable_caches(void)
 {
 	icache_enable();
@@ -857,3 +841,19 @@ void board_fit_image_post_process(void **p_image, size_t *p_size)
 #endif
 }
 #endif
+
+void board_quiesce_devices(void *images)
+{
+	hotkey_run(HK_CMDLINE);
+	hotkey_run(HK_CLI_OS_GO);
+
+#ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
+	/* Destroy atags makes next warm boot safer */
+	atags_destroy();
+#endif
+
+#ifdef CONFIG_FIT_ROLLBACK_PROTECT
+	/* TODO */
+	printf("fit: rollback protect not implement\n");
+#endif
+}

commit 89d8b5fba1c6d0ad8a77fd382e050b4bc17849be
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 23 16:05:35 2020 +0800

    include: global_data: add rollback index
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I6f8a558246e8003c7124609b604c0331cec1204a

diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index 7e13c3f37f..e53200ae35 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -148,6 +148,9 @@ typedef struct global_data {
 	int default_log_level;		/* For devices with no filters */
 	struct list_head log_head;	/* List of struct log_device */
 #endif
+#if CONFIG_IS_ENABLED(FIT_ROLLBACK_PROTECT)
+	u32 rollback_index;
+#endif
 } gd_t;
 #endif
 

commit c8b8e1089293b20a86c5cd7a383bbc8561e849e1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 23 14:46:40 2020 +0800

    common: image-sig: make fit_rollback_index_verify() __weak function.
    
    Allow board to implement it.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Id5f87214510ccfea58621086c7c49c92ec36c06a

diff --git a/common/image-sig.c b/common/image-sig.c
index 0efc6756e7..6d3216511e 100644
--- a/common/image-sig.c
+++ b/common/image-sig.c
@@ -474,25 +474,11 @@ int fit_config_verify(const void *fit, int conf_noffset)
 
 #ifndef USE_HOSTCC
 #if CONFIG_IS_ENABLED(FIT_ROLLBACK_PROTECT)
-int fit_rollback_index_verify(const void *fit, uint32_t rollback_fd,
-			      uint32_t *this_index, uint32_t *min_index)
+__weak int fit_rollback_index_verify(const void *fit, uint32_t rollback_fd,
+				     uint32_t *this_index, uint32_t *min_index)
 {
-	uint32_t tmp_this;
-	uint64_t tmp_min;
-	int images_noffset;
-	int def_noffset;
-
-	if (fit_get_image_defconf_node(fit, &images_noffset, &def_noffset))
-		return -ENOENT;
-
-	if (fit_image_get_rollback_index(fit, def_noffset, &tmp_this))
-		return -ENODEV;
-
-	/* TODO */
-	tmp_min = tmp_this;
-
-	*this_index = tmp_this;
-	*min_index = tmp_min;
+	*this_index = 0;
+	*min_index = 0;
 
 	return 0;
 }

commit 970fa5d876ea85e73fc31e89c6075f71eeb2b5af
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Tue Jun 23 17:24:53 2020 +0800

    drivers: ram: rv1126: optimizing dram type select code
    
    Use CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE to select dram type.
    Use the same define with arch/arm/include/asm/arch-rockchip/sdram.h (0 for
    DDR4, 2 for DDR2, 3 for DDR3, 5 for LPDDR2, 6 for LPDDR3, 7 for LPDDR4).
    
    Change-Id: I982db49c1881f6975afd4ba48f88ee3dd9286d3e
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/drivers/ram/rockchip/Kconfig b/drivers/ram/rockchip/Kconfig
index 3c74756351..ef4f95434a 100644
--- a/drivers/ram/rockchip/Kconfig
+++ b/drivers/ram/rockchip/Kconfig
@@ -8,3 +8,12 @@ config ROCKCHIP_SDRAM_COMMON
 	depends on TPL_RAM || SPL_RAM
 	help
 	  This enable sdram common driver
+
+config ROCKCHIP_TPL_INIT_DRAM_TYPE
+	int "TPL select DRAM type"
+	depends on TPL_RAM || SPL_RAM
+	default 3
+	help
+	  This choose DRAM type for TPL INIT code, 0 for DDR4, 2 for DDR2,
+	  3 for DDR3, 5 for LPDDR2, 6 for LPDDR3, 7 for LPDDR4, all other
+	  value are reserved.
diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
index b6286e01a5..fe98e0a659 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -67,8 +67,7 @@ struct dram_info {
 
 struct dram_info dram_info;
 
-#define TPL_INIT_DDR_TYPE_DDR3
-#ifdef TPL_INIT_DDR_TYPE_DDR3
+#if (CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE == 3)
 struct rv1126_sdram_params sdram_configs[] = {
 	#include "sdram_inc/rv1126/sdram-rv1126-ddr3-detect-330.inc"
 	#include "sdram_inc/rv1126/sdram-rv1126-ddr3-detect-396.inc"
@@ -78,7 +77,7 @@ struct rv1126_sdram_params sdram_configs[] = {
 	#include "sdram_inc/rv1126/sdram-rv1126-ddr3-detect-924.inc"
 	#include "sdram_inc/rv1126/sdram-rv1126-ddr3-detect-1056.inc"
 };
-#elif defined TPL_INIT_DDR_TYPE_DDR4
+#elif (CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE == 0)
 struct rv1126_sdram_params sdram_configs[] = {
 	#include "sdram_inc/rv1126/sdram-rv1126-ddr4-detect-330.inc"
 	#include "sdram_inc/rv1126/sdram-rv1126-ddr4-detect-396.inc"
@@ -88,7 +87,7 @@ struct rv1126_sdram_params sdram_configs[] = {
 	#include "sdram_inc/rv1126/sdram-rv1126-ddr4-detect-924.inc"
 	#include "sdram_inc/rv1126/sdram-rv1126-ddr4-detect-1056.inc"
 };
-#elif defined TPL_INIT_DDR_TYPE_LPDDR3
+#elif (CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE == 6)
 struct rv1126_sdram_params sdram_configs[] = {
 	#include "sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-330.inc"
 	#include "sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-396.inc"
@@ -98,7 +97,7 @@ struct rv1126_sdram_params sdram_configs[] = {
 	#include "sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-924.inc"
 	#include "sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-1056.inc"
 };
-#elif defined TPL_INIT_DDR_TYPE_LPDDR4
+#elif (CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE == 7)
 struct rv1126_sdram_params sdram_configs[] = {
 	#include "sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-330.inc"
 	#include "sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-396.inc"

commit f5b9cd907be26bd0db842d4310c8404c27438f4b
Author: Wu Liangqing <wlq@rock-chips.com>
Date:   Tue Jun 23 19:42:13 2020 +0800

    configs: rk3368: enable POWER_FG_RK817
    
    Change-Id: Ie57836c14e632a3338e38fa3943a6832e23cb131
    Signed-off-by: Wu Liangqing <wlq@rock-chips.com>

diff --git a/configs/rk3368_defconfig b/configs/rk3368_defconfig
index 17c9bec3c8..b953b3e27a 100644
--- a/configs/rk3368_defconfig
+++ b/configs/rk3368_defconfig
@@ -61,6 +61,7 @@ CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
+CONFIG_POWER_FG_RK817=y
 CONFIG_POWER_FG_RK818=y
 CONFIG_IO_DOMAIN=y
 CONFIG_ROCKCHIP_IO_DOMAIN=y

commit 58cb0c2b99bbcb16ea3e203afb8b2b76e11f4d78
Author: Wu Liangqing <wlq@rock-chips.com>
Date:   Tue Jun 23 19:42:47 2020 +0800

    configs: rk3399: enable POWER_FG_RK817
    
    Change-Id: If217a6f8cda64fb35aad3842594f66bb4483b11f
    Signed-off-by: Wu Liangqing <wlq@rock-chips.com>

diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
old mode 100755
new mode 100644
index b5dc948bc8..0f64993254
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -87,6 +87,7 @@ CONFIG_PHY_ROCKCHIP_TYPEC=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
+CONFIG_POWER_FG_RK817=y
 CONFIG_POWER_FG_RK818=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y

commit ed71c65549777e56d4e7674791402bef2c6a8b05
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 23 17:43:56 2020 +0800

    pmic: rk8xx: add "addr" filed for battery bind
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I073dcd49f89a75d1d320f3e80307b137814d0e2f

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index 8d9c787862..d0917115a7 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -182,9 +182,9 @@ static const struct pmic_child_info rtc_info[] = {
 };
 
 static const struct pmic_child_info fuel_gauge_info[] = {
-	{ .prefix = "battery", .driver = "rk818_fg"},
-	{ .prefix = "battery", .driver = "rk817_fg"},
-	{ .prefix = "battery", .driver = "rk816_fg"},
+	{ .addr = "1c", .prefix = "battery", .driver = "rk818_fg"},
+	{ .addr = "20", .prefix = "battery", .driver = "rk817_fg"},
+	{ .addr = "1a", .prefix = "battery", .driver = "rk816_fg"},
 	{ },
 };
 

commit 50454a094fa23c644417b72c9046bb26eae39e90
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 23 17:42:52 2020 +0800

    dm: pmic: add "addr" field for binding children
    
    If some child info->prefix are the same, try to
    distinguish them by parent addr.
    
    Example:
            pmic@20, pmic@1a...
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I504cd887e232bb309d8e1790f6d55910172d08b5

diff --git a/drivers/power/pmic/pmic-uclass.c b/drivers/power/pmic/pmic-uclass.c
index 8671c58100..8b77b3143e 100644
--- a/drivers/power/pmic/pmic-uclass.c
+++ b/drivers/power/pmic/pmic-uclass.c
@@ -64,6 +64,17 @@ int pmic_bind_children(struct udevice *pmic, ofnode parent,
 					continue;
 			}
 
+			/*
+			 * If some child info->prefix are the same, try to
+			 * distinguish them by parent addr.
+			 *
+			 * Example: pmic@20, pmic@1a...
+			 */
+			if (info->addr) {
+				if (!strstr(dev_read_name(pmic), info->addr))
+					continue;
+			}
+
 			drv = lists_driver_lookup_name(info->driver);
 			if (!drv) {
 				debug("  - driver: '%s' not found!\n",
diff --git a/include/power/pmic.h b/include/power/pmic.h
index 8ba9809f03..8eca9680f7 100644
--- a/include/power/pmic.h
+++ b/include/power/pmic.h
@@ -189,6 +189,7 @@ enum pmic_op_type {
  * @driver - driver name for the sub-node with prefix
  */
 struct pmic_child_info {
+	const char *addr;
 	const char *prefix;
 	const char *driver;
 };

commit d3f5f12c3c298bdcf41c07c2e50533a01e590346
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Tue Jun 23 10:21:30 2020 +0800

    rockchip: rv1126: tpl support thunder boot
    
    If CONFIG_ROCKCHIP_THUNDER_BOOT=y, it will enable ddr fast boot.
    
    Change-Id: Ia43039dd1247ebb937aaa8b6d9a9103df2dfe1f5
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 5649ba80fa..eaa2ebff8f 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -721,6 +721,12 @@ config ROCKCHIP_PRELOADER_SERIAL
 	  This enable U-Boot using pre-loader atags serial configure to initialize console.
 	  It denpends on serial aliases to find pre-loader serial number.
 
+config ROCKCHIP_THUNDER_BOOT
+	bool "Rockchip thunder boot"
+	help
+	  This enable rockchip thunder boot. The thunder boot is mainly used for
+	  booting system fastly.
+
 config ROCKCHIP_FIT_IMAGE_PACK
 	bool "Rockchip fit image pack of U-Boot and TEE"
 	depends on ROCKCHIP_FIT_IMAGE
diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
index 48bd66b108..b6286e01a5 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -996,7 +996,8 @@ static void set_ds_odt(struct dram_info *dram,
 
 	/* RAM VREF */
 	writel(vref_out, PHY_REG(phy_base, 0x105));
-	udelay(8000);
+	if (dramtype == LPDDR3)
+		udelay(100);
 
 	if (dramtype == LPDDR4)
 		set_lp4_vref(dram, lp4_info, freq, dst_fsp);
@@ -2696,11 +2697,13 @@ static void save_fsp_param(struct dram_info *dram, u32 dst_fsp,
 	p_fsp_param->flag = FSP_FLAG;
 }
 
+#ifndef CONFIG_ROCKCHIP_THUNDER_BOOT
 static void copy_fsp_param_to_ddr(void)
 {
 	memcpy((void *)FSP_PARAM_STORE_ADDR, (void *)&fsp_param,
 	       sizeof(fsp_param));
 }
+#endif
 
 void ddr_set_rate(struct dram_info *dram,
 		  struct rv1126_sdram_params *sdram_params,
@@ -2899,27 +2902,35 @@ static void ddr_set_rate_for_fsp(struct dram_info *dram,
 				 struct rv1126_sdram_params *sdram_params)
 {
 	struct ddr2_3_4_lp2_3_info *ddr_info;
-	u32 f0, f1, f2, f3;
+	u32 f0;
 	u32 dramtype = sdram_params->base.dramtype;
+#ifndef CONFIG_ROCKCHIP_THUNDER_BOOT
+	u32 f1, f2, f3;
+#endif
 
 	ddr_info = get_ddr_drv_odt_info(dramtype);
 	if (!ddr_info)
 		return;
 
+	f0 = (ddr_info->ddr_freq0_1 >> DDR_FREQ_F0_SHIFT) &
+	     DDR_FREQ_MASK;
+
+#ifndef CONFIG_ROCKCHIP_THUNDER_BOOT
 	memset((void *)FSP_PARAM_STORE_ADDR, 0, sizeof(fsp_param));
 	memset((void *)&fsp_param, 0, sizeof(fsp_param));
 
-	f0 = (ddr_info->ddr_freq0_1 >> DDR_FREQ_F0_SHIFT) &
-	     DDR_FREQ_MASK;
 	f1 = (ddr_info->ddr_freq0_1 >> DDR_FREQ_F1_SHIFT) &
 	     DDR_FREQ_MASK;
 	f2 = (ddr_info->ddr_freq2_3 >> DDR_FREQ_F2_SHIFT) &
 	     DDR_FREQ_MASK;
 	f3 = (ddr_info->ddr_freq2_3 >> DDR_FREQ_F3_SHIFT) &
 	     DDR_FREQ_MASK;
+#endif
 
 	if (get_wrlvl_val(dram, sdram_params))
 		printascii("get wrlvl value fail\n");
+
+#ifndef CONFIG_ROCKCHIP_THUNDER_BOOT
 	printascii("change to: ");
 	printdec(f1);
 	printascii("MHz\n");
@@ -2933,10 +2944,15 @@ static void ddr_set_rate_for_fsp(struct dram_info *dram,
 	printdec(f3);
 	printascii("MHz\n");
 	ddr_set_rate(&dram_info, sdram_params, f3, f2, 3, 1, 1);
+#endif
 	printascii("change to: ");
 	printdec(f0);
 	printascii("MHz(final freq)\n");
+#ifndef CONFIG_ROCKCHIP_THUNDER_BOOT
 	ddr_set_rate(&dram_info, sdram_params, f0, f3, 0, 0, 1);
+#else
+	ddr_set_rate(&dram_info, sdram_params, f0, sdram_params->base.ddr_freq, 1, 1, 1);
+#endif
 }
 
 int get_uart_config(void)
@@ -3013,7 +3029,9 @@ int sdram_init(void)
 	print_ddr_info(sdram_params);
 
 	ddr_set_rate_for_fsp(&dram_info, sdram_params);
+#ifndef CONFIG_ROCKCHIP_THUNDER_BOOT
 	copy_fsp_param_to_ddr();
+#endif
 
 	ddr_set_atags(&dram_info, sdram_params);
 

commit 0b4032fdb0d56c29ff4345c34098477988c2d800
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Tue Jun 23 09:20:19 2020 +0800

    rockchip: rv1126: delete some unused code for tpl
    
    Change-Id: Iae5a157dacf8c189633ca73028b35b375688860d
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126.c b/arch/arm/mach-rockchip/rv1126/rv1126.c
index ff4574cbad..9edad1f53d 100644
--- a/arch/arm/mach-rockchip/rv1126/rv1126.c
+++ b/arch/arm/mach-rockchip/rv1126/rv1126.c
@@ -327,11 +327,6 @@ enum {
 
 void board_debug_uart_init(void)
 {
-#ifdef CONFIG_TPL_BUILD
-	writel(0x03fe0000, PMUGRF_BASE + 0x144);
-	writel((0x7 << (12 + 16)) | (1 << 12), PMUGRF_BASE + 0x8);
-#endif
-
 #if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff560000)
 	static struct rv1126_grf * const grf = (void *)GRF_BASE;
 

commit a96802b209abd0ee84daa5796c75883719ce22a5
Author: Liang Chen <cl@rock-chips.com>
Date:   Wed Jun 17 16:28:54 2020 +0800

    rockchip: px30: switch VCCIO6 voltage controlled by io_vsel6
    
    According to the description of GRF_IO_VSEL, the voltage of
    VCCIO6(which is the concern of emmc/flash/sfc controller) will
    indicate by GPIO0_B6 or io_vsel6. The SOC defaults use GPIO0_B6
    to indicate power supply voltage for VCCIO6 by hardware, then
    we can switch to io_vsel6 after system power on, and release
    GPIO0_B6 for other usage.
    
    Change-Id: I9c8339e357a7328d9ffeb711ba5d0bdd41971101
    Signed-off-by: Liang Chen <cl@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c
index 8085f46d2f..1e93c504e4 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -142,6 +142,52 @@ enum {
 	GPIO3A1_GPIO		= 0,
 	GPIO3A1_UART5_RX	= 4,
 };
+
+enum {
+	IOVSEL6_CTRL_SHIFT	= 0,
+	IOVSEL6_CTRL_MASK	= BIT(0),
+	VCCIO6_SEL_BY_GPIO	= 0,
+	VCCIO6_SEL_BY_IOVSEL6,
+
+	IOVSEL6_SHIFT		= 1,
+	IOVSEL6_MASK		= BIT(1),
+	VCCIO6_3V3		= 0,
+	VCCIO6_1V8,
+};
+
+/*
+ * The voltage of VCCIO6(which is the voltage domain of emmc/flash/sfc
+ * interface) can indicated by GPIO0_B6 or io_vsel6. The SOC defaults
+ * use GPIO0_B6 to indicate power supply voltage for VCCIO6 by hardware,
+ * then we can switch to io_vsel6 after system power on, and release GPIO0_B6
+ * for other usage.
+ */
+
+#define GPIO0_B6		14
+#define GPIO0_BASE		0xff040000
+#define GPIO_SWPORTA_DDR	0x4
+#define GPIO_EXT_PORTA		0x50
+
+static int grf_vccio6_vsel_init(void)
+{
+	static struct px30_grf * const grf = (void *)GRF_BASE;
+	u32 val;
+
+	val = readl(GPIO0_BASE + GPIO_SWPORTA_DDR);
+	val &= ~BIT(GPIO0_B6);
+	writel(val, GPIO0_BASE + GPIO_SWPORTA_DDR);
+
+	if (readl(GPIO0_BASE + GPIO_EXT_PORTA) & BIT(GPIO0_B6))
+		val = VCCIO6_SEL_BY_IOVSEL6 << IOVSEL6_CTRL_SHIFT |
+		      VCCIO6_1V8 << IOVSEL6_SHIFT;
+	else
+		val = VCCIO6_SEL_BY_IOVSEL6 << IOVSEL6_CTRL_SHIFT |
+		      VCCIO6_3V3 << IOVSEL6_SHIFT;
+	rk_clrsetreg(&grf->io_vsel, IOVSEL6_CTRL_MASK | IOVSEL6_MASK, val);
+
+	return 0;
+}
+
 int arch_cpu_init(void)
 {
 #ifdef CONFIG_SPL_BUILD
@@ -185,6 +231,8 @@ int arch_cpu_init(void)
 	/* Clear the force_jtag */
 	rk_clrreg(GRF_CPU_CON1, 1 << 7);
 
+	grf_vccio6_vsel_init();
+
 	return 0;
 }
 

commit cd1c982e9a20e1f221cc1158f81fc40d9d0af0c2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 17 15:00:10 2020 +0800

    test: rockchip: power: call do_test_charge()
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I4784b5f21ff4f39b0112d5cc5626c26b853a0246

diff --git a/test/rockchip/test-power.c b/test/rockchip/test-power.c
index b11dc3c383..f4787c56d4 100644
--- a/test/rockchip/test-power.c
+++ b/test/rockchip/test-power.c
@@ -213,6 +213,9 @@ static cmd_tbl_t sub_cmd[] = {
 #if defined(CONFIG_WDT)
 	UNIT_CMD_DEFINE(wdt, 0),
 #endif
+#ifdef CONFIG_DM_CHARGE_DISPLAY
+	UNIT_CMD_DEFINE(charge, 0),
+#endif
 };
 
 static char sub_cmd_help[] =

commit 00dada44a9dfde19c573bc91ff81f65a91aa89b0
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 22 20:38:05 2020 +0800

    make.sh: update tpl pack command
    
    All available:
            ./make.sh tpl-spl    --- pack tpl+spl
            ./make.sh tpl        --- pack tpl
            ./make.sh spl-s      --- pack spl
            ./make.sh spl        --- pack spl
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Iea58976bb7fc87775b8c3c1bd2c1fd151c6be51c

diff --git a/make.sh b/make.sh
index 2cb73a14e0..56577b312c 100755
--- a/make.sh
+++ b/make.sh
@@ -54,6 +54,11 @@ CHIP_CFG_FIXUP_TABLE=(
 	"CONFIG_ROCKCHIP_RV1126    3       -       -,-          -,-        -,-          -,-           -           -"
 )
 
+CHIP_TPL_MAGIC_TABLE=(
+	"CONFIG_ROCKCHIP_PX30      RK33"
+	"CONFIG_ROCKCHIP_RV1126    110B"
+)
+
 ########################################### User can modify #############################################
 # User's rkbin tool relative path
 RKBIN_TOOLS=../rkbin/tools
@@ -598,20 +603,44 @@ function pack_spl_loader_image()
 		return
 	fi
 
+	# Find magic for TPL
+	for item in "${CHIP_TPL_MAGIC_TABLE[@]}"
+	do
+		config_xxx=`echo ${item} | awk '{ print $1 }'`
+		if grep -q "^${config_xxx}=y" .config ; then
+			header=`echo ${item} | awk '{ print $2 }'`
+		fi
+	done
+
+	if [ -z ${header} ]; then
+		header=`sed -n '/NAME=/s/NAME=//p' ${ini}`
+	fi
+
+	# Prepare files
 	rm ${tmpdir} -rf && mkdir ${tmpdir} -p
 	cp spl/u-boot-spl.bin ${tmpdir}/ && cp ${ini} ${tmpini}
+
 	if [ "${mode}" == "tpl-spl" ]; then	# pack tpl+spl
 		label="TPL+SPL"
 		cp tpl/u-boot-tpl.bin ${tmpdir}/
-		header=`sed -n '/NAME=/s/NAME=//p' ${ini}`
 		dd if=${tmpdir}/u-boot-tpl.bin of=${tmpdir}/tpl.bin bs=1 skip=4
 		sed -i "1s/^/${header:0:4}/" ${tmpdir}/tpl.bin
 		sed -i "s/FlashData=.*$/FlashData=.\/tmp\/tpl.bin/" ${tmpini}
+		sed -i "0,/Path1=.*/s/Path1=.*$/Path1=.\/tmp\/tpl.bin/" ${tmpini}
+		sed -i "s/FlashBoot=.*$/FlashBoot=.\/tmp\/u-boot-spl.bin/" ${tmpini}
+	elif [ "${mode}" == "tpl" ]; then	# pack tpl
+		label="TPL"
+		cp tpl/u-boot-tpl.bin ${tmpdir}/
+		dd if=${tmpdir}/u-boot-tpl.bin of=${tmpdir}/tpl.bin bs=1 skip=4
+		sed -i "1s/^/${header:0:4}/" ${tmpdir}/tpl.bin
+		sed -i "s/FlashData=.*$/FlashData=.\/tmp\/tpl.bin/" ${tmpini}
+		sed -i "0,/Path1=.*/s/Path1=.*$/Path1=.\/tmp\/tpl.bin/" ${tmpini}
 	else
 		label="SPL"
+		sed -i "s/FlashBoot=.*$/FlashBoot=.\/tmp\/u-boot-spl.bin/" ${tmpini}
 	fi
-	sed -i "s/FlashBoot=.*$/FlashBoot=.\/tmp\/u-boot-spl.bin/" ${tmpini}
 
+	# Pack
 	cd ${RKBIN}
 	${RKTOOLS}/boot_merger ${tmpini}
 

commit 8885b307bc59a360a4c5a66cf7c713ac2f4e8ad9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jun 5 09:53:41 2020 +0800

    configs: add rv1126-mini-template_defconfig
    
    This defconfig provides a template to generate a minimum u-boot.bin
    for eMMC board with some basic features, developer can enable more
    features base on it. If developer want to get a even smaller
    u-boot.bin, try to drop them accordding to board requirement:
    
    - Remove Power(about 15KB):
            # CONFIG_DM_PMIC is not set
            # CONFIG_DM_REGULATOR is not set
            # CONFIG_DM_REGULATOR_FIXED is not set
            # CONFIG_DM_PWM is not set
            # CONFIG_DM_I2C is not set
    
    - Remove USB(about 55KB):
            # CONFIG_USB is not set
            # CONFIG_PHY_ROCKCHIP_NANENG_USB2 is not set
    
            - The USB is not available and U-Boot fallbacks to bootrom download
              mode by menu key pressed.
    
    - Remove Command-interface(about 33KB):
            # CONFIG_CMDLINE is not set
            CONFIG_U_BOOT_CMD_ALWAYS=y
    
            - Only the command with U_BOOT_CMD_ALWAYS() delcared is available.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I2ec124bc1014ed3627aec3e7b5f6545d2670eff4

diff --git a/configs/rv1126-mini-template_defconfig b/configs/rv1126-mini-template_defconfig
new file mode 100644
index 0000000000..2e31e83a4b
--- /dev/null
+++ b/configs/rv1126-mini-template_defconfig
@@ -0,0 +1,123 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x10000
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh"
+CONFIG_ROCKCHIP_RV1126=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_ROCKCHIP_FIT_IMAGE=y
+# CONFIG_ROCKCHIP_SMCCC is not set
+CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y
+# CONFIG_GICV2 is not set
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_TARGET_EVB_RV1126=y
+CONFIG_DEFAULT_DEVICE_TREE="rv1126-evb"
+CONFIG_DEBUG_UART=y
+# CONFIG_DISTRO_DEFAULTS is not set
+CONFIG_FIT=y
+CONFIG_FIT_HW_CRYPTO=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_HW_CRYPTO=y
+# CONFIG_SPL_SYS_DCACHE_OFF is not set
+CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SPL_BOARD_INIT=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_SPL_SHA256_SUPPORT=y
+CONFIG_SPL_CRYPTO_SUPPORT=y
+CONFIG_SPL_HASH_SUPPORT=y
+CONFIG_SPL_OPTEE=y
+CONFIG_HUSH_PARSER=y
+# CONFIG_FASTBOOT is not set
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_CONSOLE is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_EDITENV is not set
+# CONFIG_CMD_SAVEENV is not set
+# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_CRC32 is not set
+# CONFIG_CMD_MEMORY is not set
+# CONFIG_CMD_DM is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_RANDOM_UUID=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+# CONFIG_CMD_ECHO is not set
+# CONFIG_CMD_ITEST is not set
+# CONFIG_CMD_SOURCE is not set
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_NET is not set
+# CONFIG_CMD_NFS is not set
+# CONFIG_CMD_MISC is not set
+# CONFIG_DOS_PARTITION is not set
+CONFIG_EFI_PARTITION=y
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_SPL_DTB_MINIMUM=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_U_BOOT_REMOVE_PROPS="interrupt-parent"
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_DM_CRYPTO=y
+CONFIG_SPL_DM_CRYPTO=y
+CONFIG_ROCKCHIP_CRYPTO_V2=y
+CONFIG_SPL_ROCKCHIP_CRYPTO_V2=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_ADC_KEY=y
+CONFIG_SPL_MISC=y
+CONFIG_SPL_ROCKCHIP_SECURE_OTP_V2=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SF_DEFAULT_MODE=0x1
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_NANENG_USB2=y
+CONFIG_PINCTRL=y
+CONFIG_DM_PMIC=y
+# CONFIG_SPL_PMIC_CHILDREN is not set
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
+CONFIG_ROCKCHIP_SDRAM_COMMON=y
+CONFIG_DM_RESET=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0xff570000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_ALWAYS_MODE=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x110b
+CONFIG_USB_GADGET_DOWNLOAD=y
+# CONFIG_SYS_WHITE_ON_BLACK is not set
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
+# CONFIG_EFI_LOADER is not set

commit 61c4c6b471053547959164168081b1600354862d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jun 18 18:20:14 2020 +0800

    phy: rockchip: fix compile error
    
    Report compile error if CONFIG_IO_TRACE=y.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I2cc791659a77c8c7d9fe01eed2c7b9ae052730bb

diff --git a/drivers/phy/phy-rockchip-naneng-usb2.c b/drivers/phy/phy-rockchip-naneng-usb2.c
index 1176eaae00..75b185139e 100644
--- a/drivers/phy/phy-rockchip-naneng-usb2.c
+++ b/drivers/phy/phy-rockchip-naneng-usb2.c
@@ -156,7 +156,9 @@ static inline int property_enable(void __iomem *base,
 	mask = GENMASK(reg->bitend, reg->bitstart);
 	val = (tmp << reg->bitstart) | (mask << U2PHY_BIT_WRITEABLE_SHIFT);
 
-	return writel(val, base + reg->offset);
+	writel(val, base + reg->offset);
+
+	return 0;
 }
 
 static inline bool property_enabled(void __iomem *base,

commit a78c1921eca323bc6d454bd55fe42e3797bbf0fd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jun 18 18:18:55 2020 +0800

    common: iotrace: do optimize
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I260f46e744a4059ba5b3022586c26910187606eb

diff --git a/common/Kconfig b/common/Kconfig
index eb88298c0b..d478ab2337 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -213,6 +213,11 @@ config BOOTARGS
 	  CONFIG_BOOTARGS goes into the environment value "bootargs". Note that
 	  this value will also override the "chosen" node in FDT blob.
 
+config IO_TRACE
+	bool "Enable iotrace"
+	help
+	  This enable iotrace feature.
+
 menu "Console"
 
 config MENU
diff --git a/common/Makefile b/common/Makefile
index 468318aedf..9a46d8ad58 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -122,7 +122,6 @@ obj-$(CONFIG_$(SPL_TPL_)FIT) += image-fit.o
 obj-$(CONFIG_$(SPL_)MULTI_DTB_FIT) += boot_fit.o common_fit.o
 obj-$(CONFIG_$(SPL_TPL_)FIT_SIGNATURE) += image-sig.o
 endif
-obj-$(CONFIG_IO_TRACE) += iotrace.o
 
 obj-y += memsize.o
 obj-y += stdio.o
@@ -162,6 +161,7 @@ obj-y += s_record.o
 obj-y += xyzModem.o
 
 ifndef CONFIG_SPL_BUILD
+obj-$(CONFIG_IO_TRACE) += iotrace.o
 obj-$(CONFIG_ANDROID_WRITE_KEYBOX) += write_keybox.o
 obj-$(CONFIG_ANDROID_KEYMASTER_CA) += keymaster.o
 obj-$(CONFIG_ANDROID_KEYMASTER_CA) += attestation_key.o
diff --git a/common/iotrace.c b/common/iotrace.c
index 2725563e8f..b9b035c01d 100644
--- a/common/iotrace.c
+++ b/common/iotrace.c
@@ -89,16 +89,20 @@ u32 iotrace_readl(const void *ptr)
 {
 	u32 v;
 
+	printf("[iotrace]: read  addr 0x%08lx... ", (ulong)ptr);
 	v = readl(ptr);
 	add_record(IOT_32 | IOT_READ, ptr, v);
+	printf("OK\n");
 
 	return v;
 }
 
 void iotrace_writel(ulong value, const void *ptr)
 {
+	printf("[iotrace]: write addr 0x%08lx value 0x%08lx... ", (ulong)ptr, value);
 	add_record(IOT_32 | IOT_WRITE, ptr, value);
 	writel(value, ptr);
+	printf("OK\n");
 }
 
 u16 iotrace_readw(const void *ptr)

commit ed9976b572b80392b9a8c2f765fdb1ba271725b6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 17 18:36:15 2020 +0800

    rockchip: dts: rv1126: delete unused property
    
    The propery is brought by CONFIG_OF_U_BOOT_REMOVE_PROPS
    required from GMAC.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ib85ec0678a0a0404eb4cda5974c52076bf0a1e37

diff --git a/arch/arm/dts/rv1126-u-boot.dtsi b/arch/arm/dts/rv1126-u-boot.dtsi
index 08e48689f1..ce01e69dae 100644
--- a/arch/arm/dts/rv1126-u-boot.dtsi
+++ b/arch/arm/dts/rv1126-u-boot.dtsi
@@ -33,15 +33,21 @@
 &uart2 {
 	clock-frequency = <24000000>;
 	u-boot,dm-spl;
+	/delete-property/ pinctrl-names;
+	/delete-property/ pinctrl-0;
 };
 
 &sdmmc {
 	u-boot,dm-spl;
+	/delete-property/ pinctrl-names;
+	/delete-property/ pinctrl-0;
 };
 
 &emmc {
 	mmc-ecsd = <0x0020f000>;
 	u-boot,dm-spl;
+	/delete-property/ pinctrl-names;
+	/delete-property/ pinctrl-0;
 };
 
 &pmu {
@@ -58,6 +64,9 @@
 
 &cru {
 	u-boot,dm-spl;
+	/delete-property/ assigned-clocks;
+	/delete-property/ assigned-clock-rates;
+	/delete-property/ assigned-clock-parents;
 };
 
 &crypto {
@@ -76,6 +85,8 @@
 
 &sfc {
 	u-boot,dm-spl;
+	/delete-property/ assigned-clocks;
+	/delete-property/ assigned-clock-rates;
 	status = "okay";
 
 	#address-cells = <1>;

commit 3017074fb28f722c5a8983e2f7ab59c12f5f1c68
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 17 17:05:21 2020 +0800

    rockchip: rkimg: use menu key to enter bootrom download mode
    
    It's possible that USB is disabled due to developer needs
    a critial size of u-boot.bin.
    
    Disabling USB makes vbus can't be detected any more, so that
    we add menu key and the events trigger are changed:
    
    - rockusb mode(fallback to bootrom mode):
            "recovery key pressed + vbus=1" => "menu key pressed"
    
    - recovery mode:
            "recovery key pressed + vbus=0" => "recovery key pressed"
    
    At the most time, USB is enabled and this feature is not applied.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I9da8f17987742cea3267dbb35ee88d57a00c578a

diff --git a/arch/arm/mach-rockchip/boot_rkimg.c b/arch/arm/mach-rockchip/boot_rkimg.c
index f9ed08ec41..20873d55e6 100644
--- a/arch/arm/mach-rockchip/boot_rkimg.c
+++ b/arch/arm/mach-rockchip/boot_rkimg.c
@@ -248,7 +248,26 @@ void rockchip_set_bootdev(struct blk_desc *desc)
 __weak int rockchip_dnl_key_pressed(void)
 {
 #if defined(CONFIG_DM_KEY)
+#ifdef CONFIG_CMD_ROCKUSB
 	return key_is_pressed(key_read(KEY_VOLUMEUP));
+#else
+	/*
+	 * It's possible that USB is disabled due to developer needs
+	 * a critial size of u-boot.bin.
+	 *
+	 * Disabling USB makes vbus can't be detected any more, so that
+	 * we add menu key and the events trigger are changed:
+	 *
+	 * - rockusb mode(fallback to bootrom mode):
+	 *	"recovery key pressed + vbus=1" => "menu key pressed"
+	 *
+	 * - recovery mode:
+	 *	"recovery key pressed + vbus=0" => "recovery key pressed"
+	 *
+	 * At the most time, USB is enabled and this feature is not applied.
+	 */
+	return key_is_pressed(key_read(KEY_MENU));
+#endif
 
 #elif defined(CONFIG_ADC)
 	const void *blob = gd->fdt_blob;
@@ -275,13 +294,21 @@ __weak int rockchip_dnl_key_pressed(void)
 
 void setup_download_mode(void)
 {
+	int vbus = 1;
+
 	boot_devtype_init();
 
 	/* recovery key or "ctrl+d" */
 	if (rockchip_dnl_key_pressed() || is_hotkey(HK_ROCKUSB_DNL)) {
 		printf("download key pressed... ");
-		if (rockchip_u2phy_vbus_detect() > 0) {
-			printf("entering download mode...\n");
+#ifdef CONFIG_CMD_ROCKUSB
+		vbus = rockchip_u2phy_vbus_detect();
+#endif
+		if (vbus > 0) {
+			printf("%sentering download mode...\n",
+			       IS_ENABLED(CONFIG_CMD_ROCKUSB) ?
+			       "" : "no rockusb, ");
+
 			/* try rockusb download and brom download */
 			run_command("download", 0);
 		} else {

commit 766120444d588d2b6449d58d10eb7a3b7fd512c5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu May 28 16:46:57 2020 +0800

    rockchip: dts: rv1126: add menu key
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ib3e24be7153cc94428e2d6dcdc5a43c6c2ce8501

diff --git a/arch/arm/dts/rv1126-evb.dts b/arch/arm/dts/rv1126-evb.dts
index e64ef2de2a..5429073bb2 100644
--- a/arch/arm/dts/rv1126-evb.dts
+++ b/arch/arm/dts/rv1126-evb.dts
@@ -20,12 +20,19 @@
 		u-boot,dm-spl;
 		status = "okay";
 
-		vol-up-key {
+		volumeup-key {
 			u-boot,dm-spl;
 			linux,code = <KEY_VOLUMEUP>;
 			label = "volume up";
 			press-threshold-microvolt = <0>;
 		};
+
+		menu-key {
+			u-boot,dm-spl;
+			linux,code = <KEY_MENU>;
+			label = "menu";
+			press-threshold-microvolt = <1198828>;
+		};
 	};
 };
 

commit f876ce9b2e0046eeb7a543eccefb068a3e6f2cc8
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Fri Jun 19 12:46:03 2020 +0800

    drivers: ram: rv1126: adjust some print info
    
    Change-Id: I07e0509dee69e172e6d5adbaabf61f3eef5eec4a
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
index 7823d791c5..48bd66b108 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -2698,18 +2698,6 @@ static void save_fsp_param(struct dram_info *dram, u32 dst_fsp,
 
 static void copy_fsp_param_to_ddr(void)
 {
-	u32 i;
-
-	printascii("fsp freq: ");
-	for (i = 0; i < MAX_IDX; i++) {
-		printascii("[");
-		printdec(i);
-		printascii("]");
-		printdec(fsp_param[i].freq_mhz);
-		printascii("Mhz ");
-	}
-	printascii("\n");
-
 	memcpy((void *)FSP_PARAM_STORE_ADDR, (void *)&fsp_param,
 	       sizeof(fsp_param));
 }
@@ -2932,22 +2920,22 @@ static void ddr_set_rate_for_fsp(struct dram_info *dram,
 
 	if (get_wrlvl_val(dram, sdram_params))
 		printascii("get wrlvl value fail\n");
-	printascii("change to f1: ");
+	printascii("change to: ");
 	printdec(f1);
 	printascii("MHz\n");
 	ddr_set_rate(&dram_info, sdram_params, f1,
 		     sdram_params->base.ddr_freq, 1, 1, 1);
-	printascii("change to f2: ");
+	printascii("change to: ");
 	printdec(f2);
 	printascii("MHz\n");
 	ddr_set_rate(&dram_info, sdram_params, f2, f1, 2, 0, 1);
-	printascii("change to f3: ");
+	printascii("change to: ");
 	printdec(f3);
 	printascii("MHz\n");
 	ddr_set_rate(&dram_info, sdram_params, f3, f2, 3, 1, 1);
-	printascii("change to f0: ");
+	printascii("change to: ");
 	printdec(f0);
-	printascii("MHz\n");
+	printascii("MHz(final freq)\n");
 	ddr_set_rate(&dram_info, sdram_params, f0, f3, 0, 0, 1);
 }
 

commit 2c5208e2736fd5f081304d3cb42a9afa2ba661a5
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Fri Jun 19 11:46:51 2020 +0800

    drivers: ram: rv1126: use read preamble training mode for ddr4
    
    Change-Id: I8128352f9727a502c029c08eb57e486a9835c405
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
index 70024f3280..7823d791c5 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -1457,7 +1457,6 @@ static int data_training_rg(struct dram_info *dram, u32 cs, u32 dramtype)
 	u32 dis_auto_zq = 0;
 	u32 odt_val_up, odt_val_dn;
 	u32 i, j;
-	u32 weak_pull;
 
 	odt_val_dn = readl(PHY_REG(phy_base, 0x110));
 	odt_val_up = readl(PHY_REG(phy_base, 0x111));
@@ -1475,13 +1474,8 @@ static int data_training_rg(struct dram_info *dram, u32 cs, u32 dramtype)
 	/* use normal read mode for data training */
 	clrbits_le32(PHY_REG(phy_base, 0xc), BIT(1));
 
-	if (dramtype == DDR4) {
-		weak_pull = readl(PHY_REG(phy_base, 0x114));
-		writel(weak_pull & ~(0x3), PHY_REG(phy_base, 0x114));
-		writel(weak_pull & ~(0x3), PHY_REG(phy_base, 0x124));
-		writel(weak_pull & ~(0x3), PHY_REG(phy_base, 0x134));
-		writel(weak_pull & ~(0x3), PHY_REG(phy_base, 0x144));
-	}
+	if (dramtype == DDR4)
+		setbits_le32(PHY_REG(phy_base, 0xc), BIT(1));
 
 	/* choose training cs */
 	clrsetbits_le32(PHY_REG(phy_base, 2), 0x33, (0x20 >> cs));
@@ -1494,13 +1488,6 @@ static int data_training_rg(struct dram_info *dram, u32 cs, u32 dramtype)
 	clrbits_le32(PHY_REG(phy_base, 2), 0x30);
 	pctl_rest_zqcs_aref(dram->pctl, dis_auto_zq);
 
-	if (dramtype == DDR4) {
-		writel(weak_pull, PHY_REG(phy_base, 0x114));
-		writel(weak_pull, PHY_REG(phy_base, 0x124));
-		writel(weak_pull, PHY_REG(phy_base, 0x134));
-		writel(weak_pull, PHY_REG(phy_base, 0x144));
-	}
-
 	if (ret & 0x20)
 		ret = -1;
 	else

commit 4298c19d4f9c3a50727d5406472894b533ffad2f
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jun 10 18:10:55 2020 +0800

    misc: decompress: add function misc_decompress_process()
    
    Use it to decompress data.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I189cded00069cc9f559097811733a481aae8d08f

diff --git a/drivers/misc/misc_decompress.c b/drivers/misc/misc_decompress.c
index d9ba75d3d8..2e065a053a 100644
--- a/drivers/misc/misc_decompress.c
+++ b/drivers/misc/misc_decompress.c
@@ -77,3 +77,30 @@ bool misc_decompress_is_complete(struct udevice *dev)
 	else
 		return true;
 }
+
+int misc_decompress_process(unsigned long src,
+			    unsigned long dst,
+			    unsigned long limit_size,
+			    u32 cap)
+{
+	struct udevice *dev;
+	int timeout = 10000;
+	int ret;
+
+	dev = misc_decompress_get_device(cap);
+	if (!dev)
+		return -EIO;
+
+	while (!misc_decompress_is_complete(dev)) {
+		if (timeout < 0)
+			return -EIO;
+		timeout--;
+		udelay(10);
+	}
+
+	ret = misc_decompress_stop(dev);
+	if (ret)
+		return -EIO;
+
+	return misc_decompress_start(dev, src, dst, limit_size);
+}
diff --git a/include/misc.h b/include/misc.h
index 39068c2f93..29e800c341 100644
--- a/include/misc.h
+++ b/include/misc.h
@@ -158,5 +158,9 @@ int misc_decompress_start(struct udevice *dev, unsigned long src,
 			  unsigned long dst, unsigned long size);
 int misc_decompress_stop(struct udevice *dev);
 bool misc_decompress_is_complete(struct udevice *dev);
+int misc_decompress_process(unsigned long src,
+			    unsigned long dst,
+			    unsigned long limit_size,
+			    u32 cap);
 
 #endif	/* _MISC_H_ */

commit e6832242e06634251d0f81915edfc120a64a0e29
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jun 12 19:57:07 2020 +0800

    spl: rkfw: fix test misc_decompress_is_complete return value
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ie378336e55d638e94f1d7c0c9dccb2c9b5ac6758

diff --git a/common/spl/spl_rkfw.c b/common/spl/spl_rkfw.c
index 3af50bff49..de21b140ff 100644
--- a/common/spl/spl_rkfw.c
+++ b/common/spl/spl_rkfw.c
@@ -377,7 +377,7 @@ static int rkfw_load_kernel(struct spl_load_info *info, u32 image_sector,
 #ifdef CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS
 		int timeout = 10000;
 
-		while (misc_decompress_is_complete(dev)) {
+		while (!misc_decompress_is_complete(dev)) {
 			if (timeout < 0) {
 				ret = -EIO;
 				goto out;
@@ -403,7 +403,7 @@ static int rkfw_load_kernel(struct spl_load_info *info, u32 image_sector,
 	else {
 		int timeout = 10000;
 
-		while (misc_decompress_is_complete(dev)) {
+		while (!misc_decompress_is_complete(dev)) {
 			if (timeout < 0) {
 				ret = -EIO;
 				goto out;

commit 809af6ba3d1f3fa99896d3e88024e012c2d44e51
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jun 12 19:52:52 2020 +0800

    misc: rockchip_decompress: update the decompress driver
    
    1.add DECOM_AXI_STAT to test decompress whether is in idle
    2.correct the misc_decompress_is_complete return value
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Signed-off-by: Simon Xue <xxm@rock-chips.com>
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I904d9909ade709fb479893325dd6c0b3d47d5908

diff --git a/drivers/misc/misc_decompress.c b/drivers/misc/misc_decompress.c
index 1fbc8d3e1f..d9ba75d3d8 100644
--- a/drivers/misc/misc_decompress.c
+++ b/drivers/misc/misc_decompress.c
@@ -70,7 +70,10 @@ int misc_decompress_stop(struct udevice *dev)
 	return misc_ioctl(dev, IOCTL_REQ_STOP, NULL);
 }
 
-int misc_decompress_is_complete(struct udevice *dev)
+bool misc_decompress_is_complete(struct udevice *dev)
 {
-	return misc_ioctl(dev, IOCTL_REQ_POLL, NULL);
+	if (misc_ioctl(dev, IOCTL_REQ_POLL, NULL))
+		return false;
+	else
+		return true;
 }
diff --git a/drivers/misc/rockchip_decompress.c b/drivers/misc/rockchip_decompress.c
index a69170088b..fb6934aa32 100644
--- a/drivers/misc/rockchip_decompress.c
+++ b/drivers/misc/rockchip_decompress.c
@@ -64,6 +64,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define DECOM_GZIP_MODE		BIT(4)
 #define DECOM_ZLIB_MODE		BIT(5)
 #define DECOM_DEFLATE_MODE	BIT(0)
+#define DECOM_AXI_IDLE		BIT(4)
 #define DECOM_LZ4_MODE		0
 
 #define DECOM_ENABLE		0x1
@@ -81,6 +82,7 @@ DECLARE_GLOBAL_DATA_PTR;
 struct rockchip_decom_priv {
 	void __iomem *base;
 	unsigned long soft_reset_base;
+	bool idle_check_once;
 	bool done;
 };
 
@@ -118,6 +120,7 @@ static int rockchip_decom_start(struct udevice *dev, void *buf)
 
 	writel(DECOM_INT_MASK, priv->base + DECOM_IEN);
 	writel(DECOM_ENABLE, priv->base + DECOM_ENR);
+	priv->idle_check_once = true;
 
 	return 0;
 }
@@ -141,13 +144,14 @@ static int rockchip_decom_stop(struct udevice *dev)
 static int rockchip_decom_done_poll(struct udevice *dev)
 {
 	struct rockchip_decom_priv *priv = dev_get_priv(dev);
-	int decom_status;
 
-	decom_status = readl(priv->base + DECOM_STAT);
-	if (decom_status & DECOM_COMPLETE)
-		return 0;
+	/*
+	 * Test the decom is idle first time.
+	 */
+	if (!priv->idle_check_once)
+		return !(readl(priv->base + DECOM_AXI_STAT) & DECOM_AXI_IDLE);
 
-	return -EINVAL;
+	return !(readl(priv->base + DECOM_STAT) & DECOM_COMPLETE);
 }
 
 static int rockchip_decom_capability(u32 *buf)
@@ -175,6 +179,7 @@ static int rockchip_decom_ioctl(struct udevice *dev, unsigned long request,
 		break;
 	case IOCTL_REQ_CAPABILITY:
 		ret = rockchip_decom_capability(buf);
+		break;
 	}
 
 	return ret;
diff --git a/include/misc.h b/include/misc.h
index 73eb2cf43b..39068c2f93 100644
--- a/include/misc.h
+++ b/include/misc.h
@@ -157,6 +157,6 @@ struct udevice *misc_decompress_get_device(u32 capability);
 int misc_decompress_start(struct udevice *dev, unsigned long src,
 			  unsigned long dst, unsigned long size);
 int misc_decompress_stop(struct udevice *dev);
-int misc_decompress_is_complete(struct udevice *dev);
+bool misc_decompress_is_complete(struct udevice *dev);
 
 #endif	/* _MISC_H_ */

commit 859836bc0c771109e88026ba2bba8ce55afc90f1
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Wed Jun 17 15:32:11 2020 +0800

    drm/rockchip: change 8bit bmp decoder result from BGR565 to RGB565
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: I0ca715bd69bc9ff1a61c98f766ecab2458737b27

diff --git a/drivers/video/drm/bmp_helper.c b/drivers/video/drm/bmp_helper.c
index a95fe88147..c387a02f9e 100755
--- a/drivers/video/drm/bmp_helper.c
+++ b/drivers/video/drm/bmp_helper.c
@@ -180,9 +180,9 @@ int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp)
 
 		/* Set color map */
 		for (i = 0; i < 256; i++) {
-			ushort colreg = ((cmap_base[0] << 8) & 0xf800) |
+			ushort colreg = ((cmap_base[2] << 8) & 0xf800) |
 					((cmap_base[1] << 3) & 0x07e0) |
-					((cmap_base[2] >> 3) & 0x001f) ;
+					((cmap_base[0] >> 3) & 0x001f) ;
 			cmap_base += 4;
 			cmap[i] = colreg;
 		}

commit f0e8414b2af2eca72f216c716cdaa7ac46df423d
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Tue Jun 16 18:21:31 2020 +0800

    drm/rockchip: fix rgb888 format color incorrect
    
    vop full need to do rb swap when deal with rgb888/bgr888;
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: I60fac72b21720fcf4f406c56fe7d9dc21ebf7635

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 19dde9c9f6..37ac4c7bfe 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -817,7 +817,6 @@ static int display_logo(struct display_state *state)
 		printf("can't support bmp bits[%d]\n", logo->bpp);
 		return -EINVAL;
 	}
-	crtc_state->rb_swap = logo->bpp != 32;
 	hdisplay = conn_state->mode.hdisplay;
 	vdisplay = conn_state->mode.vdisplay;
 	crtc_state->src_w = logo->width;
diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index 4fef3b8f8c..c84ffe3b7e 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -678,13 +678,9 @@ static int rockchip_vop_set_plane(struct display_state *state)
 	dsp_sty = crtc_y + mode->crtc_vtotal - mode->crtc_vsync_start;
 	dsp_st = dsp_sty << 16 | (dsp_stx & 0xffff);
 	/*
-	 * win module base on rk3366 need to treats rgb888 as bgr888
-	 * so we reverse the rb swap to workaround
+	 * vop full need to treats rgb888 as bgr888 so we reverse the rb swap to workaround
 	 */
-	if (crtc_state->format == ROCKCHIP_FMT_RGB888 &&
-	    VOP_MAJOR(vop_data->version) == 2 &&
-	    ((VOP_MINOR(vop_data->version) >= 5) &&
-	     (VOP_MINOR(vop_data->version) <= 8)))
+	if (crtc_state->format == ROCKCHIP_FMT_RGB888 && VOP_MAJOR(vop_data->version) == 3)
 		crtc_state->rb_swap = !crtc_state->rb_swap;
 
 	if (mode->flags & DRM_MODE_FLAG_YMIRROR)

commit 982d40b6ae313f4a4b794dca21b6cdf1d6f5f99d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 16 17:27:26 2020 +0800

    rockchip: rkimg: clean some code
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I8d54c5c8beb81bfab72885234a69d93f638081cf

diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index f1c33f87fd..25e4e09db7 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -42,7 +42,7 @@ obj-$(CONFIG_ROCKCHIP_RESOURCE_IMAGE) += resource_img.o
 obj-$(CONFIG_ROCKCHIP_DEBUGGER) += rockchip_debugger.o
 endif
 
-obj-$(CONFIG_$(SPL_TPL_)RAM) += param.o
+obj-$(CONFIG_RAM) += param.o
 obj-$(CONFIG_$(SPL_TPL_)RAM) += sdram.o
 obj-$(CONFIG_SPL_KERNEL_BOOT) += spl_resource_img.o
 
diff --git a/arch/arm/mach-rockchip/boot_rkimg.c b/arch/arm/mach-rockchip/boot_rkimg.c
index 28482b014f..f9ed08ec41 100644
--- a/arch/arm/mach-rockchip/boot_rkimg.c
+++ b/arch/arm/mach-rockchip/boot_rkimg.c
@@ -47,6 +47,8 @@ static void boot_devtype_init(void)
 	if (done)
 		return;
 
+	/* High priority: get bootdev from atags */
+#ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
 	ret = param_parse_bootdev(&devtype, &devnum);
 	if (!ret) {
 		atags_en = 1;
@@ -69,8 +71,9 @@ static void boot_devtype_init(void)
 		if (blk_get_devnum_by_typename(devtype, atoi(devnum)))
 			goto finish;
 	}
+#endif
 
-	/* If not find valid bootdev by atags, scan all possible */
+	/* Low priority: if not get bootdev by atags, scan all possible */
 #ifdef CONFIG_DM_MMC
 	mmc_initialize(gd->bd);
 #endif

commit b704ab33c2b96bad1ec0596b995f2125905ffbfa
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 16 17:31:57 2020 +0800

    cmd: add "always" attribute for some commands
    
    They are basic commands even in critical cost down version
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I0ad56056133226c25cbcfb70e54d519eb7582341

diff --git a/cmd/boot.c b/cmd/boot.c
index 1710b3aa89..b814c67d93 100644
--- a/cmd/boot.c
+++ b/cmd/boot.c
@@ -64,7 +64,7 @@ U_BOOT_CMD(
 	"      passing 'arg' as arguments"
 );
 
-U_BOOT_CMD(
+U_BOOT_CMD_ALWAYS(
 	rbrom, 1, 0,	do_reboot_brom,
 	"Perform RESET of the CPU",
 	""
diff --git a/cmd/bootfit.c b/cmd/bootfit.c
index 4c0890aa7e..bffbbb4374 100644
--- a/cmd/bootfit.c
+++ b/cmd/bootfit.c
@@ -113,7 +113,7 @@ out:
 	return CMD_RET_FAILURE;
 }
 
-U_BOOT_CMD(
+U_BOOT_CMD_ALWAYS(
 	boot_fit,  2,     1,      do_boot_fit,
 	"Boot FIT Image from memory or boot/recovery partition",
 	"boot_fit [addr]"
diff --git a/cmd/download.c b/cmd/download.c
index 232c474977..601e6c6558 100644
--- a/cmd/download.c
+++ b/cmd/download.c
@@ -21,7 +21,7 @@ static int do_download(cmd_tbl_t *cmdtp, int flag,
 	return 0;
 }
 
-U_BOOT_CMD(
+U_BOOT_CMD_ALWAYS(
 	download, 1, 1, do_download,
 	"enter rockusb/bootrom download mode", ""
 );

commit 558b8198d49b29e95b8f3f522a1aa543eb84d93b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 15 14:58:12 2020 +0800

    dm: serial: introduce DEBUG_UART_ALWAYS_MODE configure
    
    Rename CONSOLE_SERIAL_SKIP_INIT to DEBUG_UART_ALWAYS_MODE for
    easy understand.
    
    Select this to always use debug UART, skip complicated
    console UART register.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I3c265840bde015fe5fd7c73d959ba0538297b7c2

diff --git a/common/Kconfig b/common/Kconfig
index e433dc048c..eb88298c0b 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -256,11 +256,6 @@ config CONSOLE_DISABLE_CLI
 	help
 	  This disable CLI interactive in verified-boot.
 
-config CONSOLE_SERIAL_SKIP_INIT
-	bool "Skip console serial init"
-	help
-	  Skip console serial init and always use debug uart.
-
 config DISABLE_CONSOLE
 	bool "disable console in & out"
 	help
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 953c1bee51..9ee08c7cc9 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -346,6 +346,11 @@ config DEBUG_UART_SKIP_INIT
 	  Select this if the UART you want to use for debug output is already
 	  initialized by the time U-Boot starts its execution.
 
+config DEBUG_UART_ALWAYS_MODE
+	bool "Always use debug UART mode"
+	help
+	  Select this to always use debug UART, skip complicated console UART register.
+
 config ALTERA_JTAG_UART
 	bool "Altera JTAG UART support"
 	depends on DM_SERIAL
diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c
index 47e24e874d..16b9e02827 100644
--- a/drivers/serial/serial-uclass.c
+++ b/drivers/serial/serial-uclass.c
@@ -28,7 +28,7 @@ static const unsigned long baudrate_table[] = CONFIG_SYS_BAUDRATE_TABLE;
 #error "Serial is required before relocation - define CONFIG_$(SPL_)SYS_MALLOC_F_LEN to make this work"
 #endif
 
-#ifndef CONFIG_CONSOLE_SERIAL_SKIP_INIT
+#ifndef CONFIG_DEBUG_UART_ALWAYS_MODE
 static int serial_check_stdout(const void *blob, struct udevice **devp)
 {
 	int node;
@@ -90,7 +90,7 @@ static int serial_check_stdout(const void *blob, struct udevice **devp)
 }
 #endif
 
-#if defined(CONFIG_OF_LIVE) && !defined(CONFIG_CONSOLE_SERIAL_SKIP_INIT)
+#if defined(CONFIG_OF_LIVE) && !defined(CONFIG_DEBUG_UART_ALWAYS_MODE)
 /*
  * Hide and present pinctrl prop int live device tree
  *
@@ -148,7 +148,7 @@ static inline void serial_console_hide_prop(char **p1, char **p2) {}
 static inline void serial_console_present_prop(char *p1, char *p2) {}
 #endif
 
-#ifndef CONFIG_CONSOLE_SERIAL_SKIP_INIT
+#ifndef CONFIG_DEBUG_UART_ALWAYS_MODE
 static void serial_find_console_or_panic(void)
 {
 	const void *blob = gd->fdt_blob;

commit 08d70ef3653c894164bc4f3d498c10997e92513b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jun 4 20:27:22 2020 +0800

    configs: rv1126-usbplug: update accordding to latest code
    
    Some configurations was changed, let's update defconfig.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I70c977a7e2256732f9e6e1c68bf3f469366fbf71

diff --git a/configs/rv1126-usbplug_defconfig b/configs/rv1126-usbplug_defconfig
index d0719c1f0c..95b4b2c870 100644
--- a/configs/rv1126-usbplug_defconfig
+++ b/configs/rv1126-usbplug_defconfig
@@ -1,18 +1,21 @@
 CONFIG_ARM=y
+# CONFIG_ARM_SMCCC is not set
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0xc000
 CONFIG_ROCKCHIP_RV1126=y
 # CONFIG_RKIMG_BOOTLOADER is not set
 # CONFIG_ROCKCHIP_PRELOADER_ATAGS is not set
+# CONFIG_GICV2 is not set
 CONFIG_TARGET_EVB_RV1126=y
 CONFIG_DEFAULT_DEVICE_TREE="rv1126-evb"
 CONFIG_DEBUG_UART=y
 # CONFIG_DISTRO_DEFAULTS is not set
 # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
 # CONFIG_PASS_DEVICE_SERIAL_BY_FDT is not set
-CONFIG_CONSOLE_SERIAL_SKIP_INIT=y
+CONFIG_DEBUG_UART_ALWAYS_MODE=y
 # CONFIG_DISPLAY_CPUINFO is not set
 # CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_SPL is not set
 CONFIG_SUPPORT_USBPLUG=y
 # CONFIG_CMDLINE is not set
 CONFIG_U_BOOT_CMD_ALWAYS=y

commit 1392e21877580e84349d147b9a86943820724cd6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 9 19:36:21 2020 +0800

    rockchip: add depends for ROCKCHIP_FIT_IMAGE_PACK
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I1015bba4eddb6eec241956d867d637fd8649471b

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 45bd177dcf..5649ba80fa 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -723,6 +723,7 @@ config ROCKCHIP_PRELOADER_SERIAL
 
 config ROCKCHIP_FIT_IMAGE_PACK
 	bool "Rockchip fit image pack of U-Boot and TEE"
+	depends on ROCKCHIP_FIT_IMAGE
 	default n
 	help
 	  This enable fit image pack of U-Boot and TEE, it's used for make.sh script.

commit 1e83a6cbf794eabbafa62466faf3edefbe3118ab
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jun 4 20:26:39 2020 +0800

    rockchip: rv1126: use imply instead of select
    
    In order to drop them in defconfig.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I438def3afb98021c8216e48eeaecc26165bfa18b

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 11b387a153..45bd177dcf 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -423,15 +423,15 @@ endif
 config ROCKCHIP_RV1126
 	bool "Support Rockchip RV1126"
 	select CPU_V7
-	select GICV2 if !SUPPORT_USBPLUG
-	select ARM_SMCCC if !SUPPORT_USBPLUG
 	select SUPPORT_TPL
 	select SUPPORT_SPL
-	select TPL if !SUPPORT_USBPLUG
-	select SPL if !SUPPORT_USBPLUG
-	select BOARD_LATE_INIT if !SUPPORT_USBPLUG
 	select TPL_TINY_FRAMEWORK if TPL
 	select DEBUG_UART_BOARD_INIT
+	imply TPL
+	imply SPL
+	imply GICV2
+	imply ARM_SMCCC
+	imply BOARD_LATE_INIT
 	imply ROCKCHIP_GPIO_V2
 	imply TPL_SERIAL_SUPPORT
 	help

commit 47f7fd3a52c9b101b52781855edb8b4350b38e12
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jun 5 20:39:31 2020 +0800

    blk/mmc: add function blk_dread_prepare
    
    This function prepares to read data without confirming completed.
    We can use it to prefetch data and run other process.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I76116c25dfdb7559b80a0216c414189e85409a3e

diff --git a/drivers/block/Kconfig b/drivers/block/Kconfig
index 26760895f9..209fb5ebe6 100644
--- a/drivers/block/Kconfig
+++ b/drivers/block/Kconfig
@@ -22,6 +22,15 @@ config SPL_BLK
 	  be partitioned into several areas, called 'partitions' in U-Boot.
 	  A filesystem can be placed in each partition.
 
+config SPL_BLK_READ_PREPARE
+	bool "Support block devices prepare to read data in SPL"
+	depends on SPL_BLK
+	help
+	  Enable support for block devices to prefetch data. MMC and mtd_blk
+	  devices can be attached to block devices. It is applied to prefetch
+	  data in the background and the device run some other process in the
+	  same time.
+
 config BLOCK_CACHE
 	bool "Use block device cache"
 	default n
diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
index 0d3574ffb7..3d8adc7094 100644
--- a/drivers/block/blk-uclass.c
+++ b/drivers/block/blk-uclass.c
@@ -454,6 +454,20 @@ unsigned long blk_dread(struct blk_desc *block_dev, lbaint_t start,
 	return blks_read;
 }
 
+#ifdef CONFIG_SPL_BLK_READ_PREPARE
+unsigned long blk_dread_prepare(struct blk_desc *block_dev, lbaint_t start,
+				lbaint_t blkcnt, void *buffer)
+{
+	struct udevice *dev = block_dev->bdev;
+	const struct blk_ops *ops = blk_get_ops(dev);
+
+	if (!ops->read)
+		return -ENOSYS;
+
+	return ops->read_prepare(dev, start, blkcnt, buffer);
+}
+#endif
+
 unsigned long blk_dwrite(struct blk_desc *block_dev, lbaint_t start,
 			 lbaint_t blkcnt, const void *buffer)
 {
diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 6d7cfdfd45..7e8fde320e 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -6,8 +6,8 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
-#include <bouncebuf.h>
 #include <common.h>
+#include <bouncebuf.h>
 #include <errno.h>
 #include <malloc.h>
 #include <memalign.h>
@@ -437,6 +437,135 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
 	return ret;
 }
 
+#ifdef CONFIG_SPL_BLK_READ_PREPARE
+#ifdef CONFIG_DM_MMC
+static int dwmci_send_cmd_prepare(struct udevice *dev, struct mmc_cmd *cmd,
+				  struct mmc_data *data)
+{
+	struct mmc *mmc = mmc_get_mmc_dev(dev);
+#else
+static int dwmci_send_cmd_prepare(struct mmc *mmc, struct mmc_cmd *cmd,
+				  struct mmc_data *data)
+{
+#endif
+	struct dwmci_host *host = mmc->priv;
+	struct dwmci_idmac *cur_idmac;
+	int ret = 0, flags = 0, i;
+	unsigned int timeout = 500;
+	u32 retry = 100000;
+	u32 mask;
+	ulong start = get_timer(0);
+	struct bounce_buffer bbstate;
+
+	cur_idmac = malloc(ROUND(DIV_ROUND_UP(data->blocks, 8) *
+			   sizeof(struct dwmci_idmac),
+			   ARCH_DMA_MINALIGN) + ARCH_DMA_MINALIGN - 1);
+	if (!cur_idmac)
+		return -ENODATA;
+
+	while (dwmci_readl(host, DWMCI_STATUS) & DWMCI_BUSY) {
+		if (get_timer(start) > timeout) {
+			debug("%s: Timeout on data busy\n", __func__);
+			return -ETIMEDOUT;
+		}
+	}
+
+	dwmci_writel(host, DWMCI_RINTSTS, DWMCI_INTMSK_ALL);
+
+	if (data) {
+		if (host->fifo_mode) {
+			dwmci_writel(host, DWMCI_BLKSIZ, data->blocksize);
+			dwmci_writel(host, DWMCI_BYTCNT,
+				     data->blocksize * data->blocks);
+			dwmci_wait_reset(host, DWMCI_CTRL_FIFO_RESET);
+		} else {
+			if (data->flags == MMC_DATA_READ) {
+				bounce_buffer_start(&bbstate, (void *)data->dest,
+						    data->blocksize *
+						    data->blocks, GEN_BB_WRITE);
+			} else {
+				bounce_buffer_start(&bbstate, (void *)data->src,
+						    data->blocksize *
+						    data->blocks, GEN_BB_READ);
+			}
+			dwmci_prepare_data(host, data, cur_idmac,
+					   bbstate.bounce_buffer);
+		}
+	}
+
+	dwmci_writel(host, DWMCI_CMDARG, cmd->cmdarg);
+
+	if (data)
+		flags = dwmci_set_transfer_mode(host, data);
+
+	if ((cmd->resp_type & MMC_RSP_136) && (cmd->resp_type & MMC_RSP_BUSY))
+		return -1;
+
+	if (cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION)
+		flags |= DWMCI_CMD_ABORT_STOP;
+	else
+		flags |= DWMCI_CMD_PRV_DAT_WAIT;
+
+	if (cmd->resp_type & MMC_RSP_PRESENT) {
+		flags |= DWMCI_CMD_RESP_EXP;
+		if (cmd->resp_type & MMC_RSP_136)
+			flags |= DWMCI_CMD_RESP_LENGTH;
+	}
+
+	if (cmd->resp_type & MMC_RSP_CRC)
+		flags |= DWMCI_CMD_CHECK_CRC;
+
+	flags |= (cmd->cmdidx | DWMCI_CMD_START | DWMCI_CMD_USE_HOLD_REG);
+
+	debug("Sending CMD%d\n", cmd->cmdidx);
+
+	dwmci_writel(host, DWMCI_CMD, flags);
+
+	for (i = 0; i < retry; i++) {
+		mask = dwmci_readl(host, DWMCI_RINTSTS);
+		if (mask & DWMCI_INTMSK_CDONE) {
+			if (!data)
+				dwmci_writel(host, DWMCI_RINTSTS, mask);
+			break;
+		}
+	}
+
+	if (i == retry) {
+		debug("%s: Timeout.\n", __func__);
+		return -ETIMEDOUT;
+	}
+
+	if (mask & DWMCI_INTMSK_RTO) {
+		/*
+		 * Timeout here is not necessarily fatal. (e)MMC cards
+		 * will splat here when they receive CMD55 as they do
+		 * not support this command and that is exactly the way
+		 * to tell them apart from SD cards. Thus, this output
+		 * below shall be debug(). eMMC cards also do not favor
+		 * CMD8, please keep that in mind.
+		 */
+		debug("%s: Response Timeout.\n", __func__);
+		return -ETIMEDOUT;
+	} else if (mask & DWMCI_INTMSK_RE) {
+		debug("%s: Response Error.\n", __func__);
+		return -EIO;
+	}
+
+	if (cmd->resp_type & MMC_RSP_PRESENT) {
+		if (cmd->resp_type & MMC_RSP_136) {
+			cmd->response[0] = dwmci_readl(host, DWMCI_RESP3);
+			cmd->response[1] = dwmci_readl(host, DWMCI_RESP2);
+			cmd->response[2] = dwmci_readl(host, DWMCI_RESP1);
+			cmd->response[3] = dwmci_readl(host, DWMCI_RESP0);
+		} else {
+			cmd->response[0] = dwmci_readl(host, DWMCI_RESP0);
+		}
+	}
+
+	return ret;
+}
+#endif
+
 static int dwmci_setup_bus(struct dwmci_host *host, u32 freq)
 {
 	u32 div, status;
@@ -669,6 +798,9 @@ int dwmci_probe(struct udevice *dev)
 const struct dm_mmc_ops dm_dwmci_ops = {
 	.card_busy	= dwmci_card_busy,
 	.send_cmd	= dwmci_send_cmd,
+#ifdef CONFIG_SPL_BLK_READ_PREPARE
+	.send_cmd_prepare = dwmci_send_cmd_prepare,
+#endif
 	.set_ios	= dwmci_set_ios,
 	.get_cd         = dwmci_get_cd,
 	.execute_tuning	= dwmci_execute_tuning,
diff --git a/drivers/mmc/mmc-uclass.c b/drivers/mmc/mmc-uclass.c
index 7feb225186..06c3b8fc14 100644
--- a/drivers/mmc/mmc-uclass.c
+++ b/drivers/mmc/mmc-uclass.c
@@ -32,11 +32,37 @@ int dm_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
 	return ret;
 }
 
+#ifdef CONFIG_SPL_BLK_READ_PREPARE
+int dm_mmc_send_cmd_prepare(struct udevice *dev, struct mmc_cmd *cmd,
+			    struct mmc_data *data)
+{
+	struct mmc *mmc = mmc_get_mmc_dev(dev);
+	struct dm_mmc_ops *ops = mmc_get_ops(dev);
+	int ret;
+
+	mmmc_trace_before_send(mmc, cmd);
+	if (ops->send_cmd_prepare)
+		ret = ops->send_cmd_prepare(dev, cmd, data);
+	else
+		ret = -ENOSYS;
+	mmmc_trace_after_send(mmc, cmd, ret);
+
+	return ret;
+}
+#endif
+
 int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
 {
 	return dm_mmc_send_cmd(mmc->dev, cmd, data);
 }
 
+#ifdef CONFIG_SPL_BLK_READ_PREPARE
+int mmc_send_cmd_prepare(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
+{
+	return dm_mmc_send_cmd_prepare(mmc->dev, cmd, data);
+}
+#endif
+
 bool mmc_card_busy(struct mmc *mmc)
 {
 	struct dm_mmc_ops *ops = mmc_get_ops(mmc->dev);
@@ -289,6 +315,9 @@ static int mmc_blk_probe(struct udevice *dev)
 
 static const struct blk_ops mmc_blk_ops = {
 	.read	= mmc_bread,
+#ifdef CONFIG_SPL_BLK_READ_PREPARE
+	.read_prepare	= mmc_bread_prepare,
+#endif
 #ifndef CONFIG_SPL_BUILD
 	.write	= mmc_bwrite,
 	.erase	= mmc_berase,
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 14141601a3..941005a19e 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -263,6 +263,37 @@ static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start,
 	return blkcnt;
 }
 
+#ifdef CONFIG_SPL_BLK_READ_PREPARE
+static int mmc_read_blocks_prepare(struct mmc *mmc, void *dst, lbaint_t start,
+				   lbaint_t blkcnt)
+{
+	struct mmc_cmd cmd;
+	struct mmc_data data;
+
+	if (blkcnt > 1)
+		cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
+	else
+		cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
+
+	if (mmc->high_capacity)
+		cmd.cmdarg = start;
+	else
+		cmd.cmdarg = start * mmc->read_bl_len;
+
+	cmd.resp_type = MMC_RSP_R1;
+
+	data.dest = dst;
+	data.blocks = blkcnt;
+	data.blocksize = mmc->read_bl_len;
+	data.flags = MMC_DATA_READ;
+
+	if (mmc_send_cmd_prepare(mmc, &cmd, &data))
+		return 0;
+
+	return blkcnt;
+}
+#endif
+
 #if CONFIG_IS_ENABLED(BLK)
 ulong mmc_bread(struct udevice *dev, lbaint_t start, lbaint_t blkcnt, void *dst)
 #else
@@ -339,6 +370,77 @@ re_init_retry:
 	return blkcnt;
 }
 
+#ifdef CONFIG_SPL_BLK_READ_PREPARE
+#if CONFIG_IS_ENABLED(BLK)
+ulong mmc_bread_prepare(struct udevice *dev, lbaint_t start, lbaint_t blkcnt, void *dst)
+#else
+ulong mmc_bread_prepare(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt,
+			void *dst)
+#endif
+{
+#if CONFIG_IS_ENABLED(BLK)
+	struct blk_desc *block_dev = dev_get_uclass_platdata(dev);
+#endif
+	int dev_num = block_dev->devnum;
+	int timeout = 0;
+	int err;
+
+	if (blkcnt == 0)
+		return 0;
+
+	struct mmc *mmc = find_mmc_device(dev_num);
+
+	if (!mmc)
+		return 0;
+
+	if (CONFIG_IS_ENABLED(MMC_TINY))
+		err = mmc_switch_part(mmc, block_dev->hwpart);
+	else
+		err = blk_dselect_hwpart(block_dev, block_dev->hwpart);
+
+	if (err < 0)
+		return 0;
+
+	if ((start + blkcnt) > block_dev->lba) {
+#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
+		printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
+		       start + blkcnt, block_dev->lba);
+#endif
+		return 0;
+	}
+
+	if (mmc_set_blocklen(mmc, mmc->read_bl_len)) {
+		debug("%s: Failed to set blocklen\n", __func__);
+		return 0;
+	}
+
+	if (mmc_read_blocks_prepare(mmc, dst, start, blkcnt) != blkcnt) {
+		debug("%s: Failed to read blocks\n", __func__);
+re_init_retry:
+		timeout++;
+		/*
+		 * Try re-init seven times.
+		 */
+		if (timeout > 7) {
+			printf("Re-init retry timeout\n");
+			return 0;
+		}
+
+		mmc->has_init = 0;
+		if (mmc_init(mmc))
+			return 0;
+
+		if (mmc_read_blocks_prepare(mmc, dst, start, blkcnt) != blkcnt) {
+			printf("%s: Re-init mmc_read_blocks_prepare error\n",
+			       __func__);
+			goto re_init_retry;
+		}
+	}
+
+	return blkcnt;
+}
+#endif
+
 void mmc_set_clock(struct mmc *mmc, uint clock)
 {
 	if (clock > mmc->cfg->f_max)
diff --git a/drivers/mmc/mmc_private.h b/drivers/mmc/mmc_private.h
index 1290eed590..f76e6f8490 100644
--- a/drivers/mmc/mmc_private.h
+++ b/drivers/mmc/mmc_private.h
@@ -14,6 +14,10 @@
 
 extern int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
 			struct mmc_data *data);
+#ifdef CONFIG_SPL_BLK_READ_PREPARE
+int mmc_send_cmd_prepare(struct mmc *mmc, struct mmc_cmd *cmd,
+			 struct mmc_data *data);
+#endif
 extern int mmc_send_status(struct mmc *mmc, int timeout);
 extern int mmc_set_blocklen(struct mmc *mmc, int len);
 #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
@@ -23,9 +27,17 @@ void mmc_adapter_card_type_ident(void);
 #if CONFIG_IS_ENABLED(BLK)
 ulong mmc_bread(struct udevice *dev, lbaint_t start, lbaint_t blkcnt,
 		void *dst);
+#ifdef CONFIG_SPL_BLK_READ_PREPARE
+ulong mmc_bread_prepare(struct udevice *dev, lbaint_t start, lbaint_t blkcnt,
+			void *dst);
+#endif
 #else
 ulong mmc_bread(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt,
 		void *dst);
+#ifdef CONFIG_SPL_BLK_READ_PREPARE
+ulong mmc_bread_prepare(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt,
+			void *dst);
+#endif
 #endif
 
 #if !(defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_SAVEENV))
diff --git a/include/blk.h b/include/blk.h
index 215929c945..d4a259335c 100644
--- a/include/blk.h
+++ b/include/blk.h
@@ -224,6 +224,20 @@ struct blk_ops {
 	unsigned long (*read)(struct udevice *dev, lbaint_t start,
 			      lbaint_t blkcnt, void *buffer);
 
+	/**
+	 * read_prepare() - read from a block device
+	 *
+	 * @dev:	Device to read from
+	 * @start:	Start block number to read (0=first)
+	 * @blkcnt:	Number of blocks to read
+	 * @buffer:	Destination buffer for data read
+	 * @return number of blocks read, or -ve error number (see the
+	 * IS_ERR_VALUE() macro
+	 */
+#ifdef CONFIG_SPL_BLK_READ_PREPARE
+	unsigned long (*read_prepare)(struct udevice *dev, lbaint_t start,
+				      lbaint_t blkcnt, void *buffer);
+#endif
 	/**
 	 * write() - write to a block device
 	 *
@@ -279,6 +293,10 @@ struct blk_ops {
  */
 unsigned long blk_dread(struct blk_desc *block_dev, lbaint_t start,
 			lbaint_t blkcnt, void *buffer);
+#ifdef CONFIG_SPL_BLK_READ_PREPARE
+unsigned long blk_dread_prepare(struct blk_desc *block_dev, lbaint_t start,
+				lbaint_t blkcnt, void *buffer);
+#endif
 unsigned long blk_dwrite(struct blk_desc *block_dev, lbaint_t start,
 			 lbaint_t blkcnt, const void *buffer);
 unsigned long blk_derase(struct blk_desc *block_dev, lbaint_t start,
diff --git a/include/mmc.h b/include/mmc.h
index 8bf4761457..0d23e40dd5 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -416,6 +416,18 @@ struct dm_mmc_ops {
 	int (*send_cmd)(struct udevice *dev, struct mmc_cmd *cmd,
 			struct mmc_data *data);
 
+	/**
+	 * send_cmd_prepare() - Send a command to the MMC device
+	 *
+	 * @dev:	Device to receive the command
+	 * @cmd:	Command to send
+	 * @data:	Additional data to send/receive
+	 * @return 0 if OK, -ve on error
+	 */
+#ifdef CONFIG_SPL_BLK_READ_PREPARE
+	int (*send_cmd_prepare)(struct udevice *dev, struct mmc_cmd *cmd,
+				struct mmc_data *data);
+#endif
 	/**
 	 * card_busy() - Query the card device status
 	 *

commit 55eb094f8a861cb5601204a92010e6bac77989cc
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jun 12 11:26:13 2020 +0800

    rockchip: rv1126: update the spl stack address
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I891e9600cffd8fd9495ef13560314b6fc8809eb7

diff --git a/include/configs/rv1126_common.h b/include/configs/rv1126_common.h
index f62a778849..1b1a833d16 100644
--- a/include/configs/rv1126_common.h
+++ b/include/configs/rv1126_common.h
@@ -21,7 +21,7 @@
 #define CONFIG_SYS_TEXT_BASE		0x00400000
 #endif
 
-#define CONFIG_SYS_INIT_SP_ADDR		0x00580000
+#define CONFIG_SYS_INIT_SP_ADDR		0x00600000
 #define CONFIG_SYS_LOAD_ADDR		0x00C00800
 #define CONFIG_SYS_BOOTM_LEN		(64 << 20)
 
@@ -29,9 +29,9 @@
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_TEXT_BASE		0x00000000
 #define CONFIG_SPL_MAX_SIZE		0x20000
-#define CONFIG_SPL_BSS_START_ADDR	0x00608000
+#define CONFIG_SPL_BSS_START_ADDR	0x00600000
 #define CONFIG_SPL_BSS_MAX_SIZE		0x20000
-#define CONFIG_SPL_STACK		0x00608000
+#define CONFIG_SPL_STACK		0x00600000
 
 #define GICD_BASE			0xfeff1000
 #define GICC_BASE			0xfeff2000

commit 2f0354fcb2dbeed7e2245783001a5204300ef818
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jun 8 22:43:41 2020 +0800

    configs: rv1126: update the defconfig
    
    1.support GPT partition
    2.support a/b system
    3.enlarge the CONFIG_SYS_MALLOC_F_LEN for GPT partition
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I8ff0c0327c3f9e5ab68dc1b405503dcfc70ee0ec

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index 7fcd474f81..4669159fe5 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -2,7 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SYS_MALLOC_F_LEN=0x10000
+CONFIG_SYS_MALLOC_F_LEN=0x80000
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh"
 CONFIG_ROCKCHIP_RV1126=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
@@ -14,6 +14,7 @@ CONFIG_ROCKCHIP_UART_MUX_SEL_M=2
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_TARGET_EVB_RV1126=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
 CONFIG_SPL_NAND_SUPPORT=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
@@ -34,11 +35,14 @@ CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_BOARD_INIT=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
 CONFIG_SPL_SHA256_SUPPORT=y
 CONFIG_SPL_CRYPTO_SUPPORT=y
 CONFIG_SPL_HASH_SUPPORT=y
 CONFIG_SPL_MTD_SUPPORT=y
 CONFIG_SPL_OPTEE=y
+CONFIG_SPL_AB=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y

commit 0f1dc4879abf0d9289a9abbf398f65e0f272f1d4
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Jun 15 15:24:48 2020 +0800

    mtd: mtd_blk: Check map table block address overflow
    
    1.Check map table block address overflow
    2.Reinit map table original value
    
    Change-Id: I4450b5a6856e38e2624da9db31d5eb98de7f5696
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index 002d9a7695..c9780dc8fa 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -49,13 +49,17 @@ int mtd_blk_map_table_init(struct blk_desc *desc,
 	} else {
 		blk_total = (mtd->size + mtd->erasesize - 1) >> mtd->erasesize_shift;
 		if (!mtd_map_blk_table) {
-			mtd_map_blk_table = (int *)malloc(blk_total * 4);
-			memset(mtd_map_blk_table, MTD_BLK_TABLE_BLOCK_UNKNOWN,
-			       blk_total * 4);
+			mtd_map_blk_table = (int *)malloc(blk_total * sizeof(int));
+			for (i = 0; i < blk_total; i++)
+				mtd_map_blk_table[i] = MTD_BLK_TABLE_BLOCK_UNKNOWN;
 		}
 
 		blk_begin = (u32)offset >> mtd->erasesize_shift;
 		blk_cnt = ((u32)((offset & mtd->erasesize_mask) + length) >> mtd->erasesize_shift);
+		if (blk_begin >= blk_total) {
+			pr_err("map table blk begin[%d] overflow\n", blk_begin);
+			return -EINVAL;
+		}
 		if ((blk_begin + blk_cnt) > blk_total)
 			blk_cnt = blk_total - blk_begin;
 

commit f9976ae435ba5209eebdfd3f07134a211c5a7210
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jun 12 17:57:33 2020 +0800

    make.sh/fit: support pack without U-Boot
    
    command: ./make.sh --no-uboot.
    
    Providing empty file for mcu or U-Boot image if it's
    not required.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I48650f6cc0bbcc9ed111fee0354ccafe4f6c1773

diff --git a/make.sh b/make.sh
index c5fb55c535..2cb73a14e0 100755
--- a/make.sh
+++ b/make.sh
@@ -167,11 +167,21 @@ function process_args()
 				exit 0
 				;;
 
-			''|loader|trust|uboot|spl*|tpl*|debug*|itb|env|nopack|fit*)
+			''|loader|trust|uboot|spl*|tpl*|debug*|itb|env|fit*)
 				ARG_CMD=$1
 				shift 1
 				;;
 
+			--no-pack)
+				ARG_NO_PACK="y"
+				shift 1
+				;;
+
+			--no-uboot)
+				ARG_NO_UBOOT="y"
+				shift 1
+				;;
+
 			map|sym|elf*)
 				ARG_CMD=$1
 				if [ "$2" == "spl" -o "$2" == "tpl" ]; then
@@ -344,11 +354,6 @@ function sub_commands()
 			pack_fit_image ${ARG_LIST_FIT}
 			exit 0
 			;;
-
-		nopack)
-			ARG_NO_PACK="y"
-			;;
-
 		*)
 			# Search function and code position of address
 			FUNCADDR=${ARG_FUNCADDR}
@@ -711,6 +716,11 @@ function pack_trust_image()
 
 function pack_fit_image()
 {
+	if [ "${ARG_NO_UBOOT}" == "y" ]; then
+		rm u-boot-nodtb.bin u-boot.dtb -rf
+		touch u-boot-nodtb.bin u-boot.dtb
+	fi
+
 	if grep -q '^CONFIG_FIT_SIGNATURE=y' .config ; then
 		./scripts/fit-mkimg.sh --uboot-itb --boot-itb ${ARG_LIST_FIT}
 	else
diff --git a/scripts/fit-mkimg.sh b/scripts/fit-mkimg.sh
index 0d63500e7e..bf4e894365 100755
--- a/scripts/fit-mkimg.sh
+++ b/scripts/fit-mkimg.sh
@@ -174,7 +174,7 @@ function fit_process_args()
 function fit_rebuild()
 {
 	if [ "${ARG_NO_REBUILD}" != "y" ]; then
-		./make.sh nopack # Always no pack
+		./make.sh --no-pack # Always no pack
 	fi
 
 	rm ${FIT_DIR} -rf

commit 359ed52cc25ad2538aba327e49570a2270e6d643
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jun 12 18:18:59 2020 +0800

    spl: fit: check image length
    
    Do not go further if it is 0.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I1d4c07303a4998a9c112986ee4efda39c1d55d63

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 7b30ad331b..5d2ddfb7c7 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -204,6 +204,9 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 		if (fit_image_get_data_size(fit, node, &len))
 			return -ENOENT;
 
+		if (!len)
+			return 0;
+
 		load_ptr = (load_addr + align_len) & ~align_len;
 #if  defined(CONFIG_ARCH_ROCKCHIP)
 		if ((load_ptr < CONFIG_SYS_SDRAM_BASE) ||
@@ -232,6 +235,9 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 		debug("Embedded data: dst=%lx, size=%lx\n", load_addr,
 		      (unsigned long)length);
 		src = (void *)data;
+
+		if (!length)
+			return 0;
 	}
 
 	/* Check hashes and signature */

commit 07329002593a7de431e196d4999ee98ecad0f447
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jun 12 17:37:10 2020 +0800

    make.sh: update tpl+spl pack command
    
    Legacy command:
            ./make.sh spl     --- pack tpl+spl
            ./make.sh spl-s   --- pack spl
    
    New command:
            ./make.sh tpl-spl --- pack tpl+spl
            ./make.sh spl-s   --- pack spl
            ./make.sh spl     --- pack spl
    
    Note: legacy command "./make.sh spl" was not appied on any SDK.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ib0a96c94dd6e8fc90184e62ff495dda68ecf571f

diff --git a/make.sh b/make.sh
index 792a568d0d..c5fb55c535 100755
--- a/make.sh
+++ b/make.sh
@@ -103,7 +103,7 @@ function help()
 	echo "	./make.sh [board|sub-command]"
 	echo
 	echo "	 - board:        board name of defconfig"
-	echo "	 - sub-command:  elf*|loader*|spl*|itb|trust*|uboot|map|sym|<addr>"
+	echo "	 - sub-command:  elf*|loader*|spl*|tpl*|itb|trust*|uboot|map|sym|<addr>"
 	echo "	 - ini:          assigned ini file to pack trust/loader"
 	echo
 	echo "Output:"
@@ -167,7 +167,7 @@ function process_args()
 				exit 0
 				;;
 
-			''|loader|trust|uboot|spl*|debug*|itb|env|nopack|fit*)
+			''|loader|trust|uboot|spl*|tpl*|debug*|itb|env|nopack|fit*)
 				ARG_CMD=$1
 				shift 1
 				;;
@@ -320,8 +320,8 @@ function sub_commands()
 			exit 0
 			;;
 
-		spl)
-			pack_spl_loader_image ${arg}
+		tpl|spl)
+			pack_spl_loader_image ${ARG_CMD}
 			exit 0
 			;;
 
@@ -595,7 +595,7 @@ function pack_spl_loader_image()
 
 	rm ${tmpdir} -rf && mkdir ${tmpdir} -p
 	cp spl/u-boot-spl.bin ${tmpdir}/ && cp ${ini} ${tmpini}
-	if [ "${mode}" == "spl" ]; then	# pack tpl+spl
+	if [ "${mode}" == "tpl-spl" ]; then	# pack tpl+spl
 		label="TPL+SPL"
 		cp tpl/u-boot-tpl.bin ${tmpdir}/
 		header=`sed -n '/NAME=/s/NAME=//p' ${ini}`

commit 5e23d42422f4dada79e1e082dc8583484bd79dcb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 15 11:25:02 2020 +0800

    scripts: fit: add a macro for "data2sign.bin"
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ie36551e14f74c6c1a09012f02de5a48bd4dae888

diff --git a/scripts/fit-mkimg.sh b/scripts/fit-mkimg.sh
index 7e75fc076a..0d63500e7e 100755
--- a/scripts/fit-mkimg.sh
+++ b/scripts/fit-mkimg.sh
@@ -11,6 +11,7 @@ IMG_UBOOT="uboot.img"
 IMG_BOOT="boot.img"
 ITB_UBOOT="${FIT_DIR}/uboot.itb"
 ITB_BOOT="${FIT_DIR}/boot.itb"
+SIG_BIN="data2sign.bin"
 SIG_UBOOT="${FIT_DIR}/uboot.data2sign"
 SIG_BOOT="${FIT_DIR}/boot.data2sign"
 # offs
@@ -228,7 +229,7 @@ function fit_gen_uboot_itb()
 
 		# Pack
 		${MKIMAGE} -f ${ITS_UBOOT} -k ${KEY_DIR} -K ${SPL_DTB} -E -p ${OFFS_S_UBOOT} -r ${ITB_UBOOT}
-		mv data2sign.bin ${SIG_UBOOT}
+		mv ${SIG_BIN} ${SIG_UBOOT}
 
 		# rollback-index read back check
 		if [ "${ARG_SPL_ROLLBACK_PROTECT}" == "y" ]; then
@@ -341,7 +342,7 @@ function fit_gen_boot_itb()
 		fi
 
 		${MKIMAGE} -f ${ITS_BOOT} -k ${KEY_DIR} -K ${UBOOT_DTB} -E -p ${OFFS_S_BOOT} -r ${ITB_BOOT}
-		mv data2sign.bin ${SIG_BOOT}
+		mv ${SIG_BIN} ${SIG_BOOT}
 
 		# rollback-index read back check
 		if [ "${ARG_ROLLBACK_PROTECT}" == "y" ]; then

commit cc0b1aa3feebe8babae2898dec8a59fd34a72a6a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 15 11:13:15 2020 +0800

    make.sh: fit: append "-itb" postfix for args
    
    "--uboot" => "--uboot-itb";
    "--boot" => "--boot-itb".
    
    In order to distinguish with "--no-uboot".
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I4d1e1a3f88619fb728165764af52ca58665a5e89

diff --git a/make.sh b/make.sh
index 66fa90adbf..792a568d0d 100755
--- a/make.sh
+++ b/make.sh
@@ -295,7 +295,7 @@ function sub_commands()
 
 		fit)
 			if [ "${arg}" == "ns" ]; then
-				./scripts/fit-mkimg.sh --uboot --boot --no-vboot ${ARG_FIT}
+				./scripts/fit-mkimg.sh --uboot-itb --boot-itb --no-vboot ${ARG_FIT}
 			fi
 			exit 0
 			;;
@@ -712,10 +712,10 @@ function pack_trust_image()
 function pack_fit_image()
 {
 	if grep -q '^CONFIG_FIT_SIGNATURE=y' .config ; then
-		./scripts/fit-mkimg.sh --uboot --boot ${ARG_LIST_FIT}
+		./scripts/fit-mkimg.sh --uboot-itb --boot-itb ${ARG_LIST_FIT}
 	else
 		rm uboot.img trust*.img -rf
-		./scripts/fit-mkimg.sh --uboot --no-vboot --no-rebuild ${ARG_LIST_FIT}
+		./scripts/fit-mkimg.sh --uboot-itb --no-vboot --no-rebuild ${ARG_LIST_FIT}
 		echo "pack uboot.img okay! Input: ${INI_TRUST}"
 	fi
 }
diff --git a/scripts/fit-mkimg.sh b/scripts/fit-mkimg.sh
index 4bb3fd00dd..7e75fc076a 100755
--- a/scripts/fit-mkimg.sh
+++ b/scripts/fit-mkimg.sh
@@ -53,8 +53,8 @@ function help()
 	echo "    --no-check"
 	echo "    --no-rebuild"
 	echo "    --spl-new"
-	echo "    --uboot"
-	echo "    --boot"
+	echo "    --uboot-itb"
+	echo "    --boot-itb"
 	echo "    --boot_img"
 	echo "    --p-check"
 	echo
@@ -90,7 +90,7 @@ function check_its()
 function validate_arg()
 {
 	case $1 in
-		--uboot|--boot|--no-vboot|--no-rebuild|--no-check|--spl-new)
+		--uboot-itb|--boot-itb|--no-vboot|--no-rebuild|--no-check|--spl-new)
 			shift=1
 			;;
 		--ini-trust|--ini-loader|--rollback-index-boot|--rollback-index-uboot|--boot_img)
@@ -116,11 +116,11 @@ function fit_process_args()
 				ARG_VALIDATE=$2
 				shift 2
 				;;
-			--uboot)
+			--uboot-itb)
 				ARG_PACK_UBOOT="y"
 				shift 1
 				;;
-			--boot)
+			--boot-itb)
 				ARG_PACK_BOOT="y"
 				shift 1
 				;;

commit b42b4e116015fcd9d12de730b98aab598f4ba8b5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jun 12 16:49:38 2020 +0800

    make.sh: clean up coding style
    
    Not change any code logic.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If63da35728028de638a701635425cfa1f195dfde

diff --git a/make.sh b/make.sh
index d75c8fd94e..66fa90adbf 100755
--- a/make.sh
+++ b/make.sh
@@ -88,17 +88,12 @@ TOOLCHAIN_GCC=
 TOOLCHAIN_OBJDUMP=
 TOOLCHAIN_ADDR2LINE=
 
-# Declare global default output dir and cmd, update in prepare()
-OPTION=
-
 # Declare global plaform configure, updated in fixup_platform_configure()
 PLATFORM_RSA=
 PLATFORM_SHA=
-PLATFORM_UBOOT_IMG_SIZE=
-PLATFORM_TRUST_IMG_SIZE=
-
-IMAGE_FORMAT="RKFW"
-IMAGE_NOPACK="n"
+PLATFORM_UBOOT_SIZE=
+PLATFORM_TRUST_SIZE=
+PLATFORM_TYPE="RKFW"
 
 #########################################################################################################
 function help()
@@ -108,7 +103,7 @@ function help()
 	echo "	./make.sh [board|sub-command]"
 	echo
 	echo "	 - board:        board name of defconfig"
-	echo "	 - sub-command:  elf*|loader*|spl*|itb|trust*|uboot|map|sym|<addr>|EXT_DTB=*"
+	echo "	 - sub-command:  elf*|loader*|spl*|itb|trust*|uboot|map|sym|<addr>"
 	echo "	 - ini:          assigned ini file to pack trust/loader"
 	echo
 	echo "Output:"
@@ -159,7 +154,7 @@ function prepare()
 	fi
 
 	if grep  -q '^CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y' .config ; then
-		IMAGE_FORMAT="FIT"
+		PLATFORM_TYPE="FIT"
 	fi
 }
 
@@ -171,18 +166,21 @@ function process_args()
 				help
 				exit 0
 				;;
-			''|loader|trust|uboot|spl*|debug*|itb|env|EXT_DTB=*|nopack|fit*)
-				ARG_SUBCMD=$1
+
+			''|loader|trust|uboot|spl*|debug*|itb|env|nopack|fit*)
+				ARG_CMD=$1
 				shift 1
 				;;
+
 			map|sym|elf*)
-				ARG_SUBCMD=$1
-				if [ "$2" = "spl" -o "$2" = "tpl" ]; then
+				ARG_CMD=$1
+				if [ "$2" == "spl" -o "$2" == "tpl" ]; then
 					ARG_S_TPL=$2
 					shift 1
 				fi
 				shift 1
 				;;
+
 			*.ini)
 				if [ ! -f $1 ]; then
 					echo "ERROR: No $1"
@@ -194,12 +192,13 @@ function process_args()
 				fi
 				shift 1
 				;;
+
 			*)
 				# out scripts args
 				NUM=$(./scripts/fit-mkimg.sh --p-check $1)
-				if [ $NUM -ne 0 ]; then
-					[ $NUM -eq 1 ] && ARG_FIT="${ARG_FIT} $1"
-					[ $NUM -eq 2 ] && ARG_FIT="${ARG_FIT} $1 $2"
+				if  [ ${NUM} -ne 0 ]; then
+					[ ${NUM} -eq 1 ] && ARG_LIST_FIT="${ARG_LIST_FIT} $1"
+					[ ${NUM} -eq 2 ] && ARG_LIST_FIT="${ARG_LIST_FIT} $1 $2"
 					shift ${NUM}
 					continue
 				# FUNC address
@@ -214,7 +213,7 @@ function process_args()
 						exit 1
 					else
 						echo "make for ${ARG_BOARD}_defconfig by -j${JOB}"
-						make ${ARG_BOARD}_defconfig ${OPTION}
+						make ${ARG_BOARD}_defconfig
 					fi
 				fi
 				shift 1
@@ -258,14 +257,14 @@ function select_toolchain()
 function sub_commands()
 {
 	# skip "--" parameter, such as "--rollback-index-..."
-	if [[ "$ARG_SUBCMD" != "--*" ]]; then
-		cmd=${ARG_SUBCMD%-*}
-		opt=${ARG_SUBCMD#*-}
+	if [[ "${ARG_CMD}" != "--*" ]]; then
+		cmd=${ARG_CMD%-*}
+		arg=${ARG_CMD#*-}
 	else
-		cmd=$ARG_SUBCMD
+		cmd=${ARG_CMD}
 	fi
 
-	if [ "$ARG_S_TPL" == "tpl" -o "$ARG_S_TPL" == "spl" ]; then
+	if [ "${ARG_S_TPL}" == "tpl" -o "${ARG_S_TPL}" == "spl" ]; then
 		elf=`find -name u-boot-${ARG_S_TPL}`
 		map=`find -name u-boot-${ARG_S_TPL}.map`
 		sym=`find -name u-boot-${ARG_S_TPL}.sym`
@@ -275,28 +274,27 @@ function sub_commands()
 		sym=u-boot.sym
 	fi
 
-	case $cmd in
+	case ${cmd} in
 		elf)
 			if [ ! -f ${elf} ]; then
 				echo "ERROR: No elf: ${elf}"
 				exit 1
 			else
-				# default 'cmd' without option, use '-D'
-				if [ "${cmd}" = 'elf' -a "${opt}" = 'elf' ]; then
-					opt=D
+				if [ "${cmd}" == "elf" -a "${arg}" == "elf" ]; then
+					arg=D # default
 				fi
-				${TOOLCHAIN_OBJDUMP} -${opt} ${elf} | less
+				${TOOLCHAIN_OBJDUMP} -${arg} ${elf} | less
 				exit 0
 			fi
 			;;
 
 		debug)
-			./scripts/rkpatch.sh ${opt}
+			./scripts/rkpatch.sh ${arg}
 			exit 0
 			;;
 
 		fit)
-			if [ "$opt" = "ns" ]; then
+			if [ "${arg}" == "ns" ]; then
 				./scripts/fit-mkimg.sh --uboot --boot --no-vboot ${ARG_FIT}
 			fi
 			exit 0
@@ -323,7 +321,7 @@ function sub_commands()
 			;;
 
 		spl)
-			pack_spl_loader_image ${opt}
+			pack_spl_loader_image ${arg}
 			exit 0
 			;;
 
@@ -343,32 +341,27 @@ function sub_commands()
 			;;
 
 		--rollback-index*)
-			pack_fit_image ${ARG_FIT}
+			pack_fit_image ${ARG_LIST_FIT}
 			exit 0
 			;;
 
-		EXT_DTB=*)
-			OPTION=${ARG_SUBCMD}
-			;;
-
 		nopack)
-			IMAGE_NOPACK="y"
+			ARG_NO_PACK="y"
 			;;
 
 		*)
 			# Search function and code position of address
-			FUNCADDR=$ARG_FUNCADDR
-
+			FUNCADDR=${ARG_FUNCADDR}
 			RELOC_OFF=${FUNCADDR#*-}
 			FUNCADDR=${FUNCADDR%-*}
 			if [ -z $(echo ${FUNCADDR} | sed 's/[0-9,a-f,A-F,x,X,-]//g') ] && [ ${FUNCADDR} ]; then
 				# With prefix: '0x' or '0X'
 				if [ `echo ${FUNCADDR} | sed -n "/0[x,X]/p" | wc -l` -ne 0 ]; then
-					FUNCADDR=`echo $FUNCADDR | awk '{ print strtonum($0) }'`
+					FUNCADDR=`echo ${FUNCADDR} | awk '{ print strtonum($0) }'`
 					FUNCADDR=`echo "obase=16;${FUNCADDR}"|bc |tr '[A-Z]' '[a-z]'`
 				fi
 				if [ `echo ${RELOC_OFF} | sed -n "/0[x,X]/p" | wc -l` -ne 0 ] && [ ${RELOC_OFF} ]; then
-					RELOC_OFF=`echo $RELOC_OFF | awk '{ print strtonum($0) }'`
+					RELOC_OFF=`echo ${RELOC_OFF} | awk '{ print strtonum($0) }'`
 					RELOC_OFF=`echo "obase=16;${RELOC_OFF}"|bc |tr '[A-Z]' '[a-z]'`
 				fi
 
@@ -390,13 +383,13 @@ function sub_commands()
 	esac
 }
 
+#
 # We select chip info to do:
-#	1. RKCHIP: fixup platform configure
+#	1. RKCHIP:        fixup platform configure
 #	2. RKCHIP_LOADER: search ini file to pack loader
-#	3. RKCHIP_TRUST: search ini file to pack trust
-#	4. RKCHIP_LABEL: show build message
+#	3. RKCHIP_TRUST:  search ini file to pack trust
+#	4. RKCHIP_LABEL:  show build message
 #
-# We read chip info from .config and 'RKCHIP_INI_DESC'
 function select_chip_info()
 {
 	# Read RKCHIP firstly from .config
@@ -409,26 +402,25 @@ function select_chip_info()
 
 	# default
 	RKCHIP=${RKCHIP##*_}
-
-	# need fixup ?
+	# fixup ?
 	for item in "${CHIP_TYPE_FIXUP_TABLE[@]}"
 	do
-		config_xxx=`echo $item | awk '{ print $1 }'`
+		config_xxx=`echo ${item} | awk '{ print $1 }'`
 		if grep  -q "^${config_xxx}=y" .config ; then
-			RKCHIP=`echo $item | awk '{ print $2 }'`
-			RKCHIP_LOADER=`echo $item | awk '{ print $3 }'`
-			RKCHIP_TRUST=`echo  $item | awk '{ print $4 }'`
-			RKCHIP_LABEL=`echo  $item | awk '{ print $5 }'`
+			RKCHIP=`echo ${item} | awk '{ print $2 }'`
+			RKCHIP_LOADER=`echo ${item} | awk '{ print $3 }'`
+			RKCHIP_TRUST=`echo  ${item} | awk '{ print $4 }'`
+			RKCHIP_LABEL=`echo  ${item} | awk '{ print $5 }'`
 		fi
 	done
 
-	if [ "$RKCHIP_LOADER" = "-" ]; then
+	if [ "${RKCHIP_LOADER}" == "-" ]; then
 		RKCHIP_LOADER=${RKCHIP}
 	fi
-	if [ "$RKCHIP_TRUST" = "-" ]; then
+	if [ "${RKCHIP_TRUST}" == "-" ]; then
 		RKCHIP_TRUST=${RKCHIP}
 	fi
-	if [ "$RKCHIP_LABEL" = "-" ]; then
+	if [ "${RKCHIP_LABEL}" == "-" ]; then
 		RKCHIP_LABEL=${RKCHIP}
 	fi
 }
@@ -439,48 +431,47 @@ function fixup_platform_configure()
 
 	for item in "${CHIP_CFG_FIXUP_TABLE[@]}"
 	do
-		config_xxx=`echo $item | awk '{ print $1 }'`
+		config_xxx=`echo ${item} | awk '{ print $1 }'`
 		if grep  -q "^${config_xxx}=y" .config ; then
 			# <*> Fixup rsa/sha pack mode for platforms
-			rsa=`echo $item | awk '{ print $2 }'`
-			sha=`echo $item | awk '{ print $3 }'`
+			rsa=`echo ${item} | awk '{ print $2 }'`
+			sha=`echo ${item} | awk '{ print $3 }'`
 
 			# <*> Fixup images size pack for platforms, and ini file
 			if grep -q '^CONFIG_ARM64_BOOT_AARCH32=y' .config ; then
-				u_kb=`echo  $item | awk '{ print $6 }' | awk -F "," '{ print $1 }'`
-				t_kb=`echo  $item | awk '{ print $6 }' | awk -F "," '{ print $2 }'`
-				u_num=`echo $item | awk '{ print $7 }' | awk -F "," '{ print $1 }'`
-				t_num=`echo $item | awk '{ print $7 }' | awk -F "," '{ print $2 }'`
-
-				PAD_LOADER=`echo $item | awk '{ print $8 }'`
-				PAD_TRUST=`echo  $item | awk '{ print $9 }'`
-				if [ "$PAD_LOADER" != "-" ]; then
-					RKCHIP_LOADER=${RKCHIP_LOADER}${PAD_LOADER}
+				u_kb=`echo  ${item} | awk '{ print $6 }' | awk -F "," '{ print $1 }'`
+				t_kb=`echo  ${item} | awk '{ print $6 }' | awk -F "," '{ print $2 }'`
+				u_num=`echo ${item} | awk '{ print $7 }' | awk -F "," '{ print $1 }'`
+				t_num=`echo ${item} | awk '{ print $7 }' | awk -F "," '{ print $2 }'`
+				PADDING=`echo ${item} | awk '{ print $8 }'`
+				if [ "${PADDING}" != "-" ]; then
+					RKCHIP_LOADER=${RKCHIP_LOADER}${PADDING}
 				fi
-				if [ "$PAD_TRUST" != "-" ]; then
-					RKCHIP_TRUST=${RKCHIP_TRUST}${PAD_TRUST}
+				PADDING=`echo  ${item} | awk '{ print $9 }'`
+				if [ "${PADDING}" != "-" ]; then
+					RKCHIP_TRUST=${RKCHIP_TRUST}${PADDING}
 				fi
 				RKCHIP_LABEL=${RKCHIP_LABEL}"AARCH32"
 			else
-				u_kb=`echo  $item | awk '{ print $4 }' | awk -F "," '{ print $1 }'`
-				t_kb=`echo  $item | awk '{ print $4 }' | awk -F "," '{ print $2 }'`
-				u_num=`echo $item | awk '{ print $5 }' | awk -F "," '{ print $1 }'`
-				t_num=`echo $item | awk '{ print $5 }' | awk -F "," '{ print $2 }'`
+				u_kb=`echo  ${item} | awk '{ print $4 }' | awk -F "," '{ print $1 }'`
+				t_kb=`echo  ${item} | awk '{ print $4 }' | awk -F "," '{ print $2 }'`
+				u_num=`echo ${item} | awk '{ print $5 }' | awk -F "," '{ print $1 }'`
+				t_num=`echo ${item} | awk '{ print $5 }' | awk -F "," '{ print $2 }'`
 			fi
 		fi
 	done
 
-	if [ "$sha" != "-" ]; then
-		PLATFORM_SHA="--sha $sha"
+	if [ "${sha}" != "-" ]; then
+		PLATFORM_SHA="--sha ${sha}"
 	fi
-	if [ "$rsa" != "-" ]; then
-		PLATFORM_RSA="--rsa $rsa"
+	if [ "${rsa}" != "-" ]; then
+		PLATFORM_RSA="--rsa ${rsa}"
 	fi
-	if [ "$u_kb" != "-" ]; then
-		PLATFORM_UBOOT_IMG_SIZE="--size $u_kb $u_num"
+	if [ "${u_kb}" != "-" ]; then
+		PLATFORM_UBOOT_SIZE="--size ${u_kb} ${u_num}"
 	fi
-	if [ "$t_kb" != "-" ]; then
-		PLATFORM_TRUST_IMG_SIZE="--size $t_kb $t_num"
+	if [ "${t_kb}" != "-" ]; then
+		PLATFORM_TRUST_SIZE="--size ${t_kb} ${t_num}"
 	fi
 }
 
@@ -488,106 +479,105 @@ function select_ini_file()
 {
 	# default
 	INI_LOADER=${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL.ini
-	if [ "$ARM64_TRUSTZONE" = "y" ]; then
+	if [ "${ARM64_TRUSTZONE}" == "y" ]; then
 		INI_TRUST=${RKBIN}/RKTRUST/${RKCHIP_TRUST}TRUST.ini
 	else
 		INI_TRUST=${RKBIN}/RKTRUST/${RKCHIP_TRUST}TOS.ini
 	fi
 
 	# args
-	if [ "$ARG_INI_TRUST" != "" ]; then
-		INI_TRUST=$ARG_INI_TRUST
+	if [ "${ARG_INI_TRUST}" != "" ]; then
+		INI_TRUST=${ARG_INI_TRUST}
 	fi
-	if [ "$ARG_INI_LOADER" != "" ]; then
-		INI_LOADER=$ARG_INI_LOADER
+	if [ "${ARG_INI_LOADER}" != "" ]; then
+		INI_LOADER=${ARG_INI_LOADER}
 	fi
 }
 
 function handle_args_late()
 {
-	ARG_FIT="${ARG_FIT} --ini-trust $INI_TRUST --ini-loader $INI_LOADER"
+	ARG_LIST_FIT="${ARG_LIST_FIT} --ini-trust ${INI_TRUST} --ini-loader ${INI_LOADER}"
 }
 
 function pack_uboot_image()
 {
-	if [ "$IMAGE_FORMAT" != "RKFW" ]; then
+	if [ "${PLATFORM_TYPE}" != "RKFW" ]; then
 		return
 	fi
 
 	# Check file size
 	head_kb=2
-	uboot_kb=`ls -l u-boot.bin | awk '{print $5}'`
-	if [ "$PLATFORM_UBOOT_IMG_SIZE" = "" ]; then
+	uboot_kb=`ls -l u-boot.bin | awk '{ print $5 }'`
+	if [ "${PLATFORM_UBOOT_SIZE}" == "" ]; then
 		uboot_max_kb=1046528
 	else
-		uboot_max_kb=`echo $PLATFORM_UBOOT_IMG_SIZE | awk '{print strtonum($2)}'`
+		uboot_max_kb=`echo ${PLATFORM_UBOOT_SIZE} | awk '{print strtonum($2)}'`
 		uboot_max_kb=$(((uboot_max_kb-head_kb)*1024))
 	fi
 
-	if [ $uboot_kb -gt $uboot_max_kb ]; then
+	if [ ${uboot_kb} -gt ${uboot_max_kb} ]; then
 		echo
-		echo "ERROR: pack uboot failed! u-boot.bin actual: $uboot_kb bytes, max limit: $uboot_max_kb bytes"
+		echo "ERROR: pack uboot failed! u-boot.bin actual: ${uboot_kb} bytes, max limit: ${uboot_max_kb} bytes"
 		exit 1
 	fi
 
 	# Pack
 	uboot_load_addr=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" include/autoconf.mk|tr -d '\r'`
-	if [ -z $uboot_load_addr ]; then
+	if [ -z ${uboot_load_addr} ]; then
 		echo "ERROR: No CONFIG_SYS_TEXT_BASE for u-boot";
 		exit 1
 	fi
-	${RKTOOLS}/loaderimage --pack --uboot u-boot.bin uboot.img ${uboot_load_addr} ${PLATFORM_UBOOT_IMG_SIZE}
+	${RKTOOLS}/loaderimage --pack --uboot u-boot.bin uboot.img ${uboot_load_addr} ${PLATFORM_UBOOT_SIZE}
 	rm u-boot.img u-boot-dtb.img -rf
 	echo "pack uboot okay! Input: u-boot.bin"
 }
 
 function pack_uboot_itb_image()
 {
-	ini=$INI_TRUST
-
-	if [ ! -f $INI_TRUST ]; then
-		echo "pack trust failed! Can't find: $INI_TRUST"
+	ini=${INI_TRUST}
+	if [ ! -f ${INI_TRUST} ]; then
+		echo "pack trust failed! Can't find: ${INI_TRUST}"
 		return
 	fi
 
-	if [ "$ARM64_TRUSTZONE" = "y" ]; then
-		bl31=`sed -n '/_bl31_/s/PATH=//p' $ini |tr -d '\r'`
+	if [ "${ARM64_TRUSTZONE}" == "y" ]; then
+		bl31=`sed -n '/_bl31_/s/PATH=//p' ${ini} |tr -d '\r'`
 		cp ${RKBIN}/${bl31} bl31.elf
 		make CROSS_COMPILE=${TOOLCHAIN_GCC} u-boot.itb
-		echo "pack u-boot.itb okay! Input: $ini"
+		echo "pack u-boot.itb okay! Input: ${ini}"
 	else
-		tos_image=`sed -n "/TOS=/s/TOS=//p" $ini |tr -d '\r'`
-		tosta_image=`sed -n "/TOSTA=/s/TOSTA=//p" $ini |tr -d '\r'`
-		if [ $tosta_image ]; then
+		tos_image=`sed -n "/TOS=/s/TOS=//p" ${ini} |tr -d '\r'`
+		tosta_image=`sed -n "/TOSTA=/s/TOSTA=//p" ${ini} |tr -d '\r'`
+		if [ ${tosta_image} ]; then
 			cp ${RKBIN}/${tosta_image} tee.bin
-		elif [ $tos_image ]; then
+		elif [ ${tos_image} ]; then
 			cp ${RKBIN}/${tos_image}   tee.bin
 		else
 			echo "ERROR: No any tee bin"
 			exit 1
 		fi
 
-		tee_offset=`sed -n "/ADDR=/s/ADDR=//p" $ini |tr -d '\r'`
-		if [ "$tee_offset" = "" ]; then
+		tee_offset=`sed -n "/ADDR=/s/ADDR=//p" ${ini} |tr -d '\r'`
+		if [ "${tee_offset}" == "" ]; then
 			tee_offset=0x8400000
 		fi
 
-		mcu_enabled=`awk -F"," '/MCU=/ { printf $3 }' $ini | tr -d ' '`
-		if [ "$mcu_enabled" = "enabled" ]; then
-			mcu_image=`awk -F"," '/MCU=/ { printf $1 }' $ini | tr -d ' ' | cut -c 5-`
-			mcu_offset=`awk -F"," '/MCU=/ { printf $2 }' $ini | tr -d ' '`
+		mcu_enabled=`awk -F"," '/MCU=/ { printf $3 }' ${ini} | tr -d ' '`
+		if [ "${mcu_enabled}" == "enabled" ]; then
+			mcu_image=`awk -F"," '/MCU=/  { printf $1 }' ${ini} | tr -d ' ' | cut -c 5-`
+			mcu_offset=`awk -F"," '/MCU=/ { printf $2 }' ${ini} | tr -d ' '`
 			cp ${RKBIN}/${mcu_image} mcu.bin
 		fi
 
 		SPL_FIT_SOURCE=`sed -n "/CONFIG_SPL_FIT_SOURCE=/s/CONFIG_SPL_FIT_SOURCE=//p" .config | tr -d '""'`
-		if [ ! -z $SPL_FIT_SOURCE ]; then
-			cp $SPL_FIT_SOURCE u-boot.its
+		if [ ! -z ${SPL_FIT_SOURCE} ]; then
+			cp ${SPL_FIT_SOURCE} u-boot.its
 		else
 			SPL_FIT_GENERATOR=`sed -n "/CONFIG_SPL_FIT_GENERATOR=/s/CONFIG_SPL_FIT_GENERATOR=//p" .config | tr -d '""'`
-			$SPL_FIT_GENERATOR $tee_offset $mcu_offset > u-boot.its
+			${SPL_FIT_GENERATOR} ${tee_offset} ${mcu_offset} > u-boot.its
 		fi
 		./tools/mkimage -f u-boot.its -E u-boot.itb
-		echo "pack u-boot.itb okay! Input: $ini"
+		echo "pack u-boot.itb okay! Input: ${ini}"
 	fi
 	echo
 }
@@ -595,78 +585,74 @@ function pack_uboot_itb_image()
 function pack_spl_loader_image()
 {
 	mode=$1
-	tmp_dir=${RKBIN}/tmp
-	tmp_ini=${tmp_dir}/${RKCHIP_LOADER}MINIALL.ini
-	ini=$INI_LOADER
-	if [ ! -f $INI_LOADER ]; then
-		echo "pack loader failed! Can't find: $INI_LOADER"
+	tmpdir=${RKBIN}/tmp
+	tmpini=${tmpdir}/${RKCHIP_LOADER}MINIALL.ini
+	ini=${INI_LOADER}
+	if [ ! -f ${INI_LOADER} ]; then
+		echo "pack loader failed! Can't find: ${INI_LOADER}"
 		return
 	fi
 
-	rm ${tmp_dir} -rf
-	mkdir ${tmp_dir} -p
-	cp spl/u-boot-spl.bin ${tmp_dir}/
-	cp $ini $tmp_ini
-	if [ "$mode" = 'spl' ]; then	# pack tpl+spl
+	rm ${tmpdir} -rf && mkdir ${tmpdir} -p
+	cp spl/u-boot-spl.bin ${tmpdir}/ && cp ${ini} ${tmpini}
+	if [ "${mode}" == "spl" ]; then	# pack tpl+spl
 		label="TPL+SPL"
-		cp tpl/u-boot-tpl.bin ${tmp_dir}/
+		cp tpl/u-boot-tpl.bin ${tmpdir}/
 		header=`sed -n '/NAME=/s/NAME=//p' ${ini}`
-		dd if=${tmp_dir}/u-boot-tpl.bin of=${tmp_dir}/tpl.bin bs=1 skip=4
-		sed -i "1s/^/${header:0:4}/" ${tmp_dir}/tpl.bin
-		sed -i "s/FlashData=.*$/FlashData=.\/tmp\/tpl.bin/" $tmp_ini
+		dd if=${tmpdir}/u-boot-tpl.bin of=${tmpdir}/tpl.bin bs=1 skip=4
+		sed -i "1s/^/${header:0:4}/" ${tmpdir}/tpl.bin
+		sed -i "s/FlashData=.*$/FlashData=.\/tmp\/tpl.bin/" ${tmpini}
 	else
 		label="SPL"
 	fi
+	sed -i "s/FlashBoot=.*$/FlashBoot=.\/tmp\/u-boot-spl.bin/" ${tmpini}
 
-	sed -i "s/FlashBoot=.*$/FlashBoot=.\/tmp\/u-boot-spl.bin/" $tmp_ini
 	cd ${RKBIN}
-	${RKTOOLS}/boot_merger $tmp_ini
-	rm ${tmp_dir} -rf
-	cd -
-	rm *_loader_*.bin -rf
-	mv ${RKBIN}/*_loader_*.bin ./
+	${RKTOOLS}/boot_merger ${tmpini}
 
+	rm ${tmpdir} -rf && cd -
+	rm *_loader_*.bin -rf && mv ${RKBIN}/*_loader_*.bin ./
 	filename=`basename *_loader_*.bin`
-	if [[ $filename != *spl* ]]; then
+	if [[ ${filename} != *spl* ]]; then
 		rename 's/loader_/spl_loader_/' *_loader_*.bin
 	fi
-	echo "pack loader(${label}) okay! Input: $ini"
+	echo "pack loader(${label}) okay! Input: ${ini}"
 }
 
 function pack_loader_image()
 {
-	ini=$INI_LOADER
-	if [ ! -f $INI_LOADER ]; then
-		echo "pack loader failed! Can't find: $INI_LOADER"
+	ini=${INI_LOADER}
+	if [ ! -f ${INI_LOADER} ]; then
+		echo "pack loader failed! Can't find: ${INI_LOADER}"
 		return
 	fi
 
 	rm *_loader_*.bin -rf
-	numline=`cat $ini | wc -l`
-	if [ $numline -eq 1 ]; then
-		image=`sed -n "/PATH=/p" $ini | tr -d '\r' | cut -d '=' -f 2`
+	numline=`cat ${ini} | wc -l`
+	if [ ${numline} -eq 1 ]; then
+		image=`sed -n "/PATH=/p" ${ini} | tr -d '\r' | cut -d '=' -f 2`
 		cp ${RKBIN}/${image} ./
 	else
 		cd ${RKBIN}
-		${RKTOOLS}/boot_merger $ini
+		${RKTOOLS}/boot_merger ${ini}
 		cd - && mv ${RKBIN}/*_loader_*.bin ./
 	fi
 
 	file=`ls *loader*.bin`
-	echo "pack $file okay! Input: $ini"
+	echo "pack ${file} okay! Input: ${ini}"
 }
 
 function pack_arm32_trust_image()
 {
 	ini=$1
-	tos_image=`sed -n "/TOS=/s/TOS=//p" $ini |tr -d '\r'`
-	tosta_image=`sed -n "/TOSTA=/s/TOSTA=//p" $ini |tr -d '\r'`
-	tee_output=`sed -n "/OUTPUT=/s/OUTPUT=//p" $ini |tr -d '\r'`
-	if [ "$tee_output" = "" ]; then
+	tos_image=`sed -n "/TOS=/s/TOS=//p" ${ini} |tr -d '\r'`
+	tosta_image=`sed -n "/TOSTA=/s/TOSTA=//p" ${ini} |tr -d '\r'`
+	tee_output=`sed -n "/OUTPUT=/s/OUTPUT=//p" ${ini} |tr -d '\r'`
+	if [ "${tee_output}" == "" ]; then
 		tee_output="./trust.img"
 	fi
-	tee_offset=`sed -n "/ADDR=/s/ADDR=//p" $ini |tr -d '\r'`
-	if [ "$tee_offset" = "" ]; then
+	tee_offset=`sed -n "/ADDR=/s/ADDR=//p" ${ini} |tr -d '\r'`
+	if [ "${tee_offset}" == "" ]; then
 		tee_offset=0x8400000
 	fi
 
@@ -675,50 +661,50 @@ function pack_arm32_trust_image()
 	tee_load_addr=$((dram_base+tee_offset))
 	tee_load_addr=$(echo "obase=16;${tee_load_addr}"|bc) # Convert Dec to Hex
 
-	if [ $tosta_image ]; then
-		${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${tosta_image} ${tee_output} ${tee_load_addr} ${PLATFORM_TRUST_IMG_SIZE}
-	elif [ $tos_image ]; then
-		${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${tos_image}   ${tee_output} ${tee_load_addr} ${PLATFORM_TRUST_IMG_SIZE}
+	if [ ${tosta_image} ]; then
+		${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${tosta_image} ${tee_output} ${tee_load_addr} ${PLATFORM_TRUST_SIZE}
+	elif [ ${tos_image} ]; then
+		${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${tos_image}   ${tee_output} ${tee_load_addr} ${PLATFORM_TRUST_SIZE}
 	else
 		echo "ERROR: No any tee bin"
 		exit 1
 	fi
-	echo "pack trust okay! Input: $ini"
+	echo "pack trust okay! Input: ${ini}"
 }
 
 function pack_arm64_trust_image()
 {
 	ini=$1
 	cd ${RKBIN}
-	${RKTOOLS}/trust_merger ${PLATFORM_SHA} ${PLATFORM_RSA} ${PLATFORM_TRUST_IMG_SIZE} $ini
+	${RKTOOLS}/trust_merger ${PLATFORM_SHA} ${PLATFORM_RSA} ${PLATFORM_TRUST_SIZE} ${ini}
 	cd - && mv ${RKBIN}/trust*.img ./
-	echo "pack trust okay! Input: $ini"
+	echo "pack trust okay! Input: ${ini}"
 }
 
 function pack_trust_image()
 {
-	if [ "$IMAGE_FORMAT" != "RKFW" ]; then
+	if [ "${PLATFORM_TYPE}" != "RKFW" ]; then
 		return
 	fi
 
 	rm trust*.img -rf
-	ini=$INI_TRUST
-	if [ ! -f $INI_TRUST ]; then
-		echo "pack trust failed! Can't find: $INI_TRUST"
+	ini=${INI_TRUST}
+	if [ ! -f ${INI_TRUST} ]; then
+		echo "pack trust failed! Can't find: ${INI_TRUST}"
 		return
 	fi
 
-	numline=`cat $ini | wc -l`
-	if [ $numline -eq 1 ]; then
-		image=`sed -n "/PATH=/p" $ini | tr -d '\r' | cut -d '=' -f 2`
+	numline=`cat ${ini} | wc -l`
+	if [ ${numline} -eq 1 ]; then
+		image=`sed -n "/PATH=/p" ${ini} | tr -d '\r' | cut -d '=' -f 2`
 		cp ${RKBIN}/${image} ./trust.img
-		echo "pack trust okay! Input: $ini"
+		echo "pack trust okay! Input: ${ini}"
 		return;
 	else
-		if [ "$ARM64_TRUSTZONE" = "y" ]; then
-			pack_arm64_trust_image $ini
+		if [ "${ARM64_TRUSTZONE}" == "y" ]; then
+			pack_arm64_trust_image ${ini}
 		else
-			pack_arm32_trust_image $ini
+			pack_arm32_trust_image ${ini}
 		fi
 	fi
 }
@@ -726,46 +712,36 @@ function pack_trust_image()
 function pack_fit_image()
 {
 	if grep -q '^CONFIG_FIT_SIGNATURE=y' .config ; then
-		./scripts/fit-mkimg.sh --uboot --boot ${ARG_FIT}
+		./scripts/fit-mkimg.sh --uboot --boot ${ARG_LIST_FIT}
 	else
 		rm uboot.img trust*.img -rf
-		./scripts/fit-mkimg.sh --uboot --no-vboot --no-rebuild ${ARG_FIT}
-		echo "pack uboot.img okay! Input: $INI_TRUST"
+		./scripts/fit-mkimg.sh --uboot --no-vboot --no-rebuild ${ARG_LIST_FIT}
+		echo "pack uboot.img okay! Input: ${INI_TRUST}"
 	fi
 }
 
 function pack_images()
 {
-	if [ "$IMAGE_NOPACK" != "y" ]; then
-		if [ "$IMAGE_FORMAT" = "RKFW" ]; then
+	if [ "${ARG_NO_PACK}" != "y" ]; then
+		if [ "${PLATFORM_TYPE}" == "RKFW" ]; then
 			pack_uboot_image
 			pack_trust_image
 			pack_loader_image
-		elif [ "$IMAGE_FORMAT" = "FIT" ]; then
-			pack_fit_image ${ARG_FIT}
+		elif [ "${PLATFORM_TYPE}" == "FIT" ]; then
+			pack_fit_image ${ARG_LIST_FIT}
 		fi
 	fi
 }
 
 function clean_files()
 {
-	if [ -f spl/u-boot-spl.dtb ]; then
-		rm spl/u-boot-spl.dtb -rf
-	fi
-	if [ -f tpl/u-boot-tpl.dtb ]; then
-		rm tpl/u-boot-tpl.dtb -rf
-	fi
-	if [ -f u-boot.dtb ]; then
-		rm u-boot.dtb -rf
-	fi
+	rm spl/u-boot-spl.dtb tpl/u-boot-tpl.dtb u-boot.dtb -rf
 }
 
 function finish()
 {
 	echo
-	if [ ! -z "$OPTION" ]; then
-		echo "Platform ${RKCHIP_LABEL} is build OK, with exist .config ($OPTION)"
-	elif [ "$ARG_BOARD" = '' ]; then
+	if [ "${ARG_BOARD}" == "" ]; then
 		echo "Platform ${RKCHIP_LABEL} is build OK, with exist .config"
 	else
 		echo "Platform ${RKCHIP_LABEL} is build OK, with new .config(make ${ARG_BOARD}_defconfig)"
@@ -781,7 +757,7 @@ select_ini_file
 handle_args_late
 sub_commands
 clean_files
-make CROSS_COMPILE=${TOOLCHAIN_GCC} ${OPTION} all --jobs=${JOB}
+make CROSS_COMPILE=${TOOLCHAIN_GCC} all --jobs=${JOB}
 pack_images
 finish
 

commit 32ccc236e95b8059915538e8dcdb99b6dd348713
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 15 10:01:22 2020 +0800

    scripts: fit: update uboot.img packing message
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I60f573df2fe73bba7ca9941f3431a6bda020b490

diff --git a/scripts/fit-mkimg.sh b/scripts/fit-mkimg.sh
index 9618dcf993..4bb3fd00dd 100755
--- a/scripts/fit-mkimg.sh
+++ b/scripts/fit-mkimg.sh
@@ -420,9 +420,9 @@ function fit_msg_uboot()
 	fi
 
 	if [ "${ARG_SPL_ROLLBACK_PROTECT}" == "y" ]; then
-		echo "Image(${MSG}, rollback-index=${ARG_ROLLBACK_IDX_UBOOT}):  ${IMG_UBOOT} (with uboot trust) is ready"
+		echo "Image(${MSG}, rollback-index=${ARG_ROLLBACK_IDX_UBOOT}):  ${IMG_UBOOT} (with uboot, trust...) is ready"
 	else
-		echo "Image(${MSG}):  ${IMG_UBOOT} (FIT with uboot, trust) is ready"
+		echo "Image(${MSG}):  ${IMG_UBOOT} (FIT with uboot, trust...) is ready"
 	fi
 }
 

commit 48efbc7eef373f14fc60de6c327895555f09bcbe
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Fri Jun 12 11:43:54 2020 +0800

    drm/rockchip: vop: rk312x use win1 to show logo
    
    since kernel set rk312x win1 to show kernel logo, so here sync with
    kernel config.
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: I3ed562526cd6f61359bef1567c7f2ea57149435d

diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index fd1ea24e65..e3174fd82c 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -416,27 +416,14 @@ const struct vop_data rk3328_vop = {
 	.reg_len = RK3328_DSP_VACT_ST_END_F1 * 4,
 };
 
-static const struct vop_scl_regs rk3036_win_scl = {
-	.scale_yrgb_x = VOP_REG(RK3036_WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0),
-	.scale_yrgb_y = VOP_REG(RK3036_WIN0_SCL_FACTOR_YRGB, 0xffff, 16),
-	.scale_cbcr_x = VOP_REG(RK3036_WIN0_SCL_FACTOR_CBR, 0xffff, 0x0),
-	.scale_cbcr_y = VOP_REG(RK3036_WIN0_SCL_FACTOR_CBR, 0xffff, 16),
-};
-
-static const struct vop_win rk3036_win0_data = {
-	.scl = &rk3036_win_scl,
-	.enable = VOP_REG(RK3036_SYS_CTRL, 0x1, 0),
-	.format = VOP_REG(RK3036_SYS_CTRL, 0x7, 3),
-	.rb_swap = VOP_REG(RK3036_SYS_CTRL, 0x1, 15),
-	.act_info = VOP_REG(RK3036_WIN0_ACT_INFO, 0x1fff1fff, 0),
-	.dsp_info = VOP_REG(RK3036_WIN0_DSP_INFO, 0x0fff0fff, 0),
-	.dsp_st = VOP_REG(RK3036_WIN0_DSP_ST, 0x1fff1fff, 0),
-	.yrgb_mst = VOP_REG(RK3036_WIN0_YRGB_MST, 0xffffffff, 0),
-	.uv_mst = VOP_REG(RK3036_WIN0_CBR_MST, 0xffffffff, 0),
-	.yrgb_vir = VOP_REG(RK3036_WIN0_VIR, 0xffff, 0),
-	.uv_vir = VOP_REG(RK3036_WIN0_VIR, 0x1fff, 16),
-	.alpha_mode = VOP_REG(RK3036_DSP_CTRL0, 0x1, 18),
-	.alpha_en = VOP_REG(RK3036_ALPHA_CTRL, 0x1, 0)
+static const struct vop_win rk3126_win1_data = {
+	.enable = VOP_REG(RK3036_SYS_CTRL, 0x1, 1),
+	.format = VOP_REG(RK3036_SYS_CTRL, 0x7, 6),
+	.rb_swap = VOP_REG(RK3036_SYS_CTRL, 0x1, 19),
+	.dsp_info = VOP_REG(RK3126_WIN1_DSP_INFO, 0x0fff0fff, 0),
+	.dsp_st = VOP_REG(RK3126_WIN1_DSP_ST, 0x1fff1fff, 0),
+	.yrgb_mst = VOP_REG(RK3126_WIN1_MST, 0xffffffff, 0),
+	.yrgb_vir = VOP_REG(RK3036_WIN1_VIR, 0xffff, 0),
 };
 
 static const struct vop_ctrl rk3036_ctrl_data = {
@@ -471,7 +458,7 @@ const struct vop_data rk3036_vop = {
 	.version = VOP_VERSION(2, 2),
 	.max_output = {1920, 1080},
 	.ctrl = &rk3036_ctrl_data,
-	.win = &rk3036_win0_data,
+	.win = &rk3126_win1_data,
 	.line_flag = &rk3036_vop_line_flag,
 	.reg_len = RK3036_DSP_VACT_ST_END_F1 * 4,
 };
diff --git a/drivers/video/drm/rockchip_vop_reg.h b/drivers/video/drm/rockchip_vop_reg.h
index c82d6adcab..2d115c9882 100644
--- a/drivers/video/drm/rockchip_vop_reg.h
+++ b/drivers/video/drm/rockchip_vop_reg.h
@@ -876,6 +876,12 @@
 #define RK3036_HWC_LUT_ADDR		0x800
 /* rk3036 register definition end */
 
+/* rk3126 register definition */
+#define RK3126_WIN1_MST				0x0004c
+#define RK3126_WIN1_DSP_INFO			0x00050
+#define RK3126_WIN1_DSP_ST			0x00054
+/* rk3126 register definition end */
+
 /* rk3366 register definition */
 #define RK3366_LIT_REG_CFG_DONE			0x00000
 #define RK3366_LIT_VERSION			0x00004

commit 695a88c4e9a84d0965ef4dc8d43555d17d2096ba
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Fri May 15 11:30:12 2020 +0800

    drm/rockchip: win module base on rk3366 need to treats rgb888 as bgr888
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: I83a28d0530db1d388176e2c249d6af8b9763f209

diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index c78bf4093f..4fef3b8f8c 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -678,12 +678,13 @@ static int rockchip_vop_set_plane(struct display_state *state)
 	dsp_sty = crtc_y + mode->crtc_vtotal - mode->crtc_vsync_start;
 	dsp_st = dsp_sty << 16 | (dsp_stx & 0xffff);
 	/*
-	 * PX30 treat rgb888 as bgr888
+	 * win module base on rk3366 need to treats rgb888 as bgr888
 	 * so we reverse the rb swap to workaround
 	 */
-	if (VOP_MAJOR(vop_data->version) == 2 &&
-	    VOP_MINOR(vop_data->version) == 6 &&
-	    crtc_state->format == ROCKCHIP_FMT_RGB888)
+	if (crtc_state->format == ROCKCHIP_FMT_RGB888 &&
+	    VOP_MAJOR(vop_data->version) == 2 &&
+	    ((VOP_MINOR(vop_data->version) >= 5) &&
+	     (VOP_MINOR(vop_data->version) <= 8)))
 		crtc_state->rb_swap = !crtc_state->rb_swap;
 
 	if (mode->flags & DRM_MODE_FLAG_YMIRROR)

commit 2f0bb0e6b90e28079ca8480fd7b499c55f1595f8
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Sun Jun 14 18:46:51 2020 +0800

    mtd: nand: Fix error in counting BITS_PER_LONG
    
    Change-Id: I148a18733e055e5e43f7b259af05b3e0b36ac648
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/bbt.c b/drivers/mtd/nand/bbt.c
index 658d5de14b..18beadd74f 100644
--- a/drivers/mtd/nand/bbt.c
+++ b/drivers/mtd/nand/bbt.c
@@ -45,7 +45,7 @@ static int nanddev_read_bbt(struct nand_device *nand, u32 block, bool update)
 	unsigned int bits_per_block = fls(NAND_BBT_BLOCK_NUM_STATUS);
 	unsigned int nblocks = nanddev_neraseblocks(nand);
 	unsigned int nbytes = DIV_ROUND_UP(nblocks * bits_per_block,
-					   BITS_PER_LONG) * 4;
+					   BITS_PER_LONG) * sizeof(*nand->bbt.cache);
 	struct mtd_info *mtd = nanddev_to_mtd(nand);
 	u8 *data_buf, *oob_buf;
 	struct nanddev_bbt_info *bbt_info;
@@ -115,7 +115,7 @@ static int nanddev_write_bbt(struct nand_device *nand, u32 block)
 	unsigned int bits_per_block = fls(NAND_BBT_BLOCK_NUM_STATUS);
 	unsigned int nblocks = nanddev_neraseblocks(nand);
 	unsigned int nbytes = DIV_ROUND_UP(nblocks * bits_per_block,
-					   BITS_PER_LONG) * 4;
+					   BITS_PER_LONG) * sizeof(*nand->bbt.cache);
 	struct mtd_info *mtd = nanddev_to_mtd(nand);
 	u8 *data_buf, *oob_buf;
 	struct nanddev_bbt_info *bbt_info;
@@ -391,8 +391,8 @@ int nanddev_bbt_set_block_status(struct nand_device *nand, unsigned int entry,
 	if (entry >= nanddev_neraseblocks(nand))
 		return -ERANGE;
 
-	if (offs + bits_per_block - 1 > 31)
-		pos[0] &= ~GENMASK(31, offs);
+	if (offs + bits_per_block - 1 > (BITS_PER_LONG - 1))
+		pos[0] &= ~GENMASK(BITS_PER_LONG - 1, offs);
 	else
 		pos[0] &= ~GENMASK(offs + bits_per_block - 1, offs);
 	pos[0] |= val << offs;

commit 6b5189e7240c14dc3635419ecb9ba70b6a01c8df
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jun 10 20:45:25 2020 +0800

    rockchip: rk1808: add nand flash definition
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Id7ab325059eeecb342af83cd7333cad55adb7dd6

diff --git a/include/configs/rk1808_common.h b/include/configs/rk1808_common.h
index bb9f432f08..4ab12b4f9e 100644
--- a/include/configs/rk1808_common.h
+++ b/include/configs/rk1808_common.h
@@ -33,6 +33,14 @@
 #define CONFIG_BOUNCE_BUFFER
 #define CONFIG_SUPPORT_EMMC_RPMB
 
+/* Nand */
+#define CONFIG_SYS_MAX_NAND_DEVICE	1
+#define CONFIG_SYS_NAND_ONFI_DETECTION
+#define CONFIG_SYS_NAND_PAGE_SIZE	2048
+#define CONFIG_SYS_NAND_PAGE_COUNT	64
+#define CONFIG_SYS_NAND_SIZE		(256 * 1024 * 1024)
+#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x4000
+
 #define CONFIG_SYS_SDRAM_BASE		0
 #define SDRAM_MAX_SIZE			0xf8000000
 #define SDRAM_BANK_SIZE			(2UL << 30)

commit 88d49dd4d7e7679fbf970553f6683ba29967debe
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jun 10 20:34:42 2020 +0800

    rockchip: dts: rk1808: support sfc device in spl
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I5a69ae076454339ee69ed5381884b9bce6173c61

diff --git a/arch/arm/dts/rk1808-u-boot.dtsi b/arch/arm/dts/rk1808-u-boot.dtsi
index 532c9a020e..73542c7866 100644
--- a/arch/arm/dts/rk1808-u-boot.dtsi
+++ b/arch/arm/dts/rk1808-u-boot.dtsi
@@ -21,7 +21,7 @@
 
 	chosen {
 		stdout-path = &uart2;
-		u-boot,spl-boot-order = &emmc;
+		u-boot,spl-boot-order = &spi_nand, &spi_nor, &emmc;
 	};
 
 };
@@ -56,6 +56,32 @@
 	status = "okay";
 };
 
+&sfc {
+	u-boot,dm-spl;
+	status = "okay";
+
+	#address-cells = <1>;
+	#size-cells = <0>;
+	spi_nand: flash@0 {
+		u-boot,dm-spl;
+		compatible = "spi-nand";
+		reg = <0>;
+		spi-tx-bus-width = <1>;
+		spi-rx-bus-width = <4>;
+		spi-max-frequency = <96000000>;
+	};
+
+	spi_nor: flash@1 {
+		u-boot,dm-spl;
+		compatible = "jedec,spi-nor";
+		label = "sfc_nor";
+		reg = <0>;
+		spi-tx-bus-width = <1>;
+		spi-rx-bus-width = <4>;
+		spi-max-frequency = <96000000>;
+	};
+};
+
 &saradc {
 	u-boot,dm-spl;
 	status = "okay";
diff --git a/arch/arm/dts/rk1808.dtsi b/arch/arm/dts/rk1808.dtsi
index 8e333a0bc3..06d71e26d2 100644
--- a/arch/arm/dts/rk1808.dtsi
+++ b/arch/arm/dts/rk1808.dtsi
@@ -1000,7 +1000,7 @@
 	};
 
 	sfc: sfc@ffc50000 {
-		compatible = "rockchip,rksfc";
+		compatible = "rockchip,rksfc","rockchip,sfc";
 		reg = <0x0 0xffc50000 0x0 0x4000>;
 		interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;

commit 9dd9794e32f62455411d2d6a83d900be2c51a2eb
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Thu Jun 11 14:31:47 2020 +0800

    rkflash: Support new SPI Nor devices
    
    1.Support FM25Q128A, MX25L3233FM2I
    2.Change XT25F128A, GD25Q256B
    
    Change-Id: I359bcb9fac25ae298c2e3c5ae22d61e9e5077c63
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/sfc_nor.c b/drivers/rkflash/sfc_nor.c
index 2014fed23f..d1b48a5bde 100644
--- a/drivers/rkflash/sfc_nor.c
+++ b/drivers/rkflash/sfc_nor.c
@@ -19,7 +19,7 @@ static struct flash_info spi_flash_tbl[] = {
 	/* GD25Q127C and GD25Q128C*/
 	{ 0xc84018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 9, 0 },
 	/* GD25Q256B/C/D */
-	{ 0xc84019, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x3C, 16, 6, 0 },
+	{ 0xc84019, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x1C, 16, 6, 0 },
 	/* GD25Q512MC */
 	{ 0xc84020, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x3C, 17, 6, 0 },
 	/* 25Q64JVSSIQ */
@@ -32,6 +32,8 @@ static struct flash_info spi_flash_tbl[] = {
 	{ 0xef6019, 128, 8, 0x13, 0x02, 0x6C, 0x32, 0x20, 0xD8, 0x3C, 16, 9, 0 },
 	/* 25Q64FWSSIG */
 	{ 0xef6017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0 },
+	/* MX25L3233FM2I-08G */
+	{ 0xc22016, 128, 8, 0x03, 0x02, 0x6B, 0x38, 0x20, 0xD8, 0x0E, 13, 6, 0 },
 	/* MX25L6433F */
 	{ 0xc22017, 128, 8, 0x03, 0x02, 0x6B, 0x38, 0x20, 0xD8, 0x0E, 14, 6, 0 },
 	/* MX25L12835E/F MX25L12833FMI-10G */
@@ -51,7 +53,7 @@ static struct flash_info spi_flash_tbl[] = {
 	/* XM25QH64A */
 	{ 0x207017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 0, 0 },
 	/* XT25F128A XM25QH128A */
-	{ 0x207018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x00, 15, 0, 0 },
+	{ 0x207018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 0, 0 },
 	/* XT25F64BSSIGU-5 */
 	{ 0x0b4017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 14, 9, 0 },
 	/* XT25F128BSSIGU */
@@ -82,6 +84,8 @@ static struct flash_info spi_flash_tbl[] = {
 	{ 0x684018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x04, 15, 9, 0 },
 	/* BH25Q64BS */
 	{ 0x684017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x04, 14, 9, 0 },
+	/* FM25Q128A */
+	{ 0xA14018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 9, 0 },
 };
 
 static int snor_write_en(void)

commit b191872f34d5713537bc49aa56c59b2e91bea52a
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Jun 8 16:28:21 2020 +0800

    mtd: spinand: Support GD5F2GQ4UBxxG
    
    Change-Id: Ia3e340ae8b86c282953f94c16b801414218818bf
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/gigadevice.c b/drivers/mtd/nand/spi/gigadevice.c
index 8de69abb8a..6989a73c0d 100644
--- a/drivers/mtd/nand/spi/gigadevice.c
+++ b/drivers/mtd/nand/spi/gigadevice.c
@@ -167,6 +167,15 @@ static const struct spinand_info gigadevice_spinand_table[] = {
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&gd5fxgq4xexxg_ooblayout,
 				     gd5f2gq4xexxg_ecc_get_status)),
+	SPINAND_INFO("GD5F2GQ4UBExxG", 0xd2,
+		     NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&gd5fxgq4xexxg_ooblayout,
+				     gd5f1gq4xexxg_ecc_get_status)),
 };
 
 static int gigadevice_spinand_detect(struct spinand_device *spinand)

commit 602b8060f101b88a2f6499d8eea63c62f48ee826
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jun 8 22:41:42 2020 +0800

    spl: mmc: support load image depend on parameter next_stage
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I215cc0095d875fe8f4d58b27d49e30cb615e8167

diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c
index e25183ee50..eadfda0d41 100644
--- a/common/spl/spl_mmc.c
+++ b/common/spl/spl_mmc.c
@@ -7,6 +7,7 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 #include <common.h>
+#include <boot_rkimg.h>
 #include <dm.h>
 #include <part.h>
 #include <spl.h>
@@ -351,8 +352,15 @@ int spl_mmc_load_image(struct spl_image_info *spl_image,
 				return err;
 		}
 #ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
+		const char *partition_name;
+
+		if (spl_image->next_stage == SPL_NEXT_STAGE_KERNEL)
+			partition_name = PART_BOOT;
+		else
+			partition_name = PART_UBOOT;
+
 		err = mmc_load_image_raw_partition(spl_image, mmc,
-			CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_NAME,
+			partition_name,
 			CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION);
 		if (!err)
 			return err;

commit 05431850c7c266de175d629f3338c3a67f9acfbe
Author: YouMin Chen <cym@rock-chips.com>
Date:   Thu Jun 11 13:21:52 2020 +0800

    drivers: ram: rv1126: add support DDR3/LPDDR3 1056MHz
    
    Change-Id: Ib24e263f1a58861a173b5b566718385b3f67eedc
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-1056.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-1056.inc
new file mode 100644
index 0000000000..2cb613eb63
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-1056.inc
@@ -0,0 +1,72 @@
+{
+	{
+		{
+			.rank = 0x1,
+			.col = 0xC,
+			.bk = 0x3,
+			.bw = 0x1,
+			.dbw = 0x0,
+			.row_3_4 = 0x0,
+			.cs0_row = 0x10,
+			.cs1_row = 0x10,
+			.cs0_high16bit_row = 0x10,
+			.cs1_high16bit_row = 0x10,
+			.ddrconfig = 0
+		},
+		{
+			{0x351b1019},
+			{0x12030903},
+			{0x00000002},
+			{0x00001111},
+			{0x0000000c},
+			{0x0000034a},
+			0x000000ff
+		}
+	},
+	{
+		.ddr_freq = 1056,	/* clock rate(MHz) */
+		.dramtype = DDR3,
+		.num_channels = 1,
+		.stride = 0,
+		.odt = 1
+	},
+	{
+		{
+			{0x00000000, 0x43041001},	/* MSTR */
+			{0x00000064, 0x008000b9},	/* RFSHTMG */
+			{0x000000d0, 0x00020103},	/* INIT0 */
+			{0x000000d4, 0x00690000},	/* INIT1 */
+			{0x000000d8, 0x00000100},	/* INIT2 */
+			{0x000000dc, 0x01240040},	/* INIT3 */
+			{0x000000e0, 0x00280000},	/* INIT4 */
+			{0x000000e4, 0x000c0000},	/* INIT5 */
+			{0x000000f4, 0x000f011f},	/* RANKCTL */
+			{0x00000100, 0x0f132414},	/* DRAMTMG0 */
+			{0x00000104, 0x000d0419},	/* DRAMTMG1 */
+			{0x00000108, 0x0507050b},	/* DRAMTMG2 */
+			{0x0000010c, 0x00202008},	/* DRAMTMG3 */
+			{0x00000110, 0x07020408},	/* DRAMTMG4 */
+			{0x00000114, 0x06060404},	/* DRAMTMG5 */
+			{0x00000120, 0x00000907},	/* DRAMTMG8 */
+			{0x00000180, 0x00a9002b},	/* ZQCTL0 */
+			{0x00000184, 0x00000000},	/* ZQCTL1 */
+			{0x00000190, 0x07050003},	/* DFITMG0 */
+			{0x00000198, 0x07000101},	/* DFILPCFG0 */
+			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
+			{0x00000240, 0x06000610},	/* ODTCFG */
+			{0x00000244, 0x00000201},	/* ODTMAP */
+			{0x00000250, 0x00001f00},	/* SCHED */
+			{0x00000490, 0x00000001},	/* PCTRL_0 */
+			{0xffffffff, 0xffffffff}
+		}
+	},
+	{
+		{
+			{0x00000004, 0x0000008a},	/* PHYREG01 */
+			{0x00000014, 0x0000000e},	/* PHYREG05 */
+			{0x00000018, 0x00000000},	/* PHYREG06 */
+			{0x0000001c, 0x0000000a},	/* PHYREG07 */
+			{0xffffffff, 0xffffffff}
+		}
+	}
+},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-1056.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-1056.inc
new file mode 100644
index 0000000000..b67ab876fc
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-1056.inc
@@ -0,0 +1,74 @@
+{
+	{
+		{
+			.rank = 0x1,
+			.col = 0xC,
+			.bk = 0x3,
+			.bw = 0x1,
+			.dbw = 0x0,
+			.row_3_4 = 0x0,
+			.cs0_row = 0x10,
+			.cs1_row = 0x10,
+			.cs0_high16bit_row = 0x10,
+			.cs1_high16bit_row = 0x10,
+			.ddrconfig = 0
+		},
+		{
+			{0x3d211722},
+			{0x1a050807},
+			{0x00000002},
+			{0x00001111},
+			{0x0000000c},
+			{0x00000542},
+			0x000000ff
+		}
+	},
+	{
+		.ddr_freq = 1056,	/* clock rate(MHz) */
+		.dramtype = LPDDR3,
+		.num_channels = 1,
+		.stride = 0,
+		.odt = 1
+	},
+	{
+		{
+			{0x00000000, 0x43041008},	/* MSTR */
+			{0x00000064, 0x0040006f},	/* RFSHTMG */
+			{0x000000d0, 0x00690002},	/* INIT0 */
+			{0x000000d4, 0x00010000},	/* INIT1 */
+			{0x000000d8, 0x00001203},	/* INIT2 */
+			{0x000000dc, 0x00c3001e},	/* INIT3 */
+			{0x000000e0, 0x00010000},	/* INIT4 */
+			{0x000000e4, 0x00120007},	/* INIT5 */
+			{0x000000f4, 0x000f011f},	/* RANKCTL */
+			{0x00000100, 0x0e1b2416},	/* DRAMTMG0 */
+			{0x00000104, 0x00040422},	/* DRAMTMG1 */
+			{0x00000108, 0x04080a0b},	/* DRAMTMG2 */
+			{0x0000010c, 0x00808000},	/* DRAMTMG3 */
+			{0x00000110, 0x0a02060c},	/* DRAMTMG4 */
+			{0x00000114, 0x01010808},	/* DRAMTMG5 */
+			{0x00000118, 0x02020005},	/* DRAMTMG6 */
+			{0x00000120, 0x00000505},	/* DRAMTMG8 */
+			{0x00000138, 0x00000075},	/* DRAMTMG14 */
+			{0x00000180, 0x00bf0030},	/* ZQCTL0 */
+			{0x00000184, 0x01b00000},	/* ZQCTL1 */
+			{0x00000190, 0x07070003},	/* DFITMG0 */
+			{0x00000198, 0x07000101},	/* DFILPCFG0 */
+			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
+			{0x00000240, 0x0b030d34},	/* ODTCFG */
+			{0x00000244, 0x00000101},	/* ODTMAP */
+			{0x00000250, 0x00001f00},	/* SCHED */
+			{0x00000490, 0x00000001},	/* PCTRL_0 */
+			{0xffffffff, 0xffffffff}
+		}
+	},
+	{
+		{
+			{0x00000004, 0x0000008b},	/* PHYREG01 */
+			{0x00000014, 0x00000010},	/* PHYREG05 */
+			{0x00000018, 0x00000000},	/* PHYREG06 */
+			{0x0000001c, 0x00000008},	/* PHYREG07 */
+			{0xffffffff, 0xffffffff}
+		}
+	}
+},
diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
index 2701b53f2b..70024f3280 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -76,6 +76,7 @@ struct rv1126_sdram_params sdram_configs[] = {
 	#include "sdram_inc/rv1126/sdram-rv1126-ddr3-detect-664.inc"
 	#include "sdram_inc/rv1126/sdram-rv1126-ddr3-detect-784.inc"
 	#include "sdram_inc/rv1126/sdram-rv1126-ddr3-detect-924.inc"
+	#include "sdram_inc/rv1126/sdram-rv1126-ddr3-detect-1056.inc"
 };
 #elif defined TPL_INIT_DDR_TYPE_DDR4
 struct rv1126_sdram_params sdram_configs[] = {
@@ -95,6 +96,7 @@ struct rv1126_sdram_params sdram_configs[] = {
 	#include "sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-664.inc"
 	#include "sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-784.inc"
 	#include "sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-924.inc"
+	#include "sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-1056.inc"
 };
 #elif defined TPL_INIT_DDR_TYPE_LPDDR4
 struct rv1126_sdram_params sdram_configs[] = {

commit 48c0a787fe119e74e57429a9a398424872afff47
Author: YouMin Chen <cym@rock-chips.com>
Date:   Wed Jun 10 19:54:42 2020 +0800

    drivers: ram: rv1126: fix DDR3 read training error
    
    Change-Id: I0fef4eda1d14d1e46fdfdf474b6abfcc9577617d
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
index c949bfed83..2701b53f2b 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -1594,11 +1594,23 @@ static int data_training_rd(struct dram_info *dram, u32 cs, u32 dramtype,
 	u32 timeout_us = 1000;
 	u32 dqs_default;
 	u32 cur_fsp;
+	u32 vref_inner;
 	u32 i;
 	struct sdram_head_info_index_v2 *index =
 		(struct sdram_head_info_index_v2 *)common_info;
 	struct dq_map_info *map_info;
 
+	vref_inner = readl(PHY_REG(phy_base, 0x128)) & 0xff;
+	if (dramtype == DDR3 && vref_inner == 0x80) {
+		for (i = 0; i < 4; i++)
+			writel(vref_inner - 0xa,
+			       PHY_REG(phy_base, 0x118 + i * 0x10));
+
+		/* reg_rx_vref_value_update */
+		setbits_le32(PHY_REG(phy_base, 0x71), 1 << 5);
+		clrbits_le32(PHY_REG(phy_base, 0x71), 1 << 5);
+	}
+
 	map_info = (struct dq_map_info *)((void *)common_info +
 		index->dq_map_index.offset * 4);
 	/* only 1cs a time, 0:cs0 1 cs1 */
@@ -1676,6 +1688,16 @@ static int data_training_rd(struct dram_info *dram, u32 cs, u32 dramtype,
 
 	pctl_rest_zqcs_aref(dram->pctl, dis_auto_zq);
 
+	if (dramtype == DDR3 && vref_inner == 0x80) {
+		for (i = 0; i < 4; i++)
+			writel(vref_inner,
+			       PHY_REG(phy_base, 0x118 + i * 0x10));
+
+		/* reg_rx_vref_value_update */
+		setbits_le32(PHY_REG(phy_base, 0x71), 1 << 5);
+		clrbits_le32(PHY_REG(phy_base, 0x71), 1 << 5);
+	}
+
 	return 0;
 }
 

commit 1258f25b98b8053818ef6a97b56f60f76eee6670
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Jun 9 11:58:37 2020 +0800

    spl: rkfw: fix decompress error when boot.img has no ramdisk
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I43066282cd8449b08b37d5ef68d57dd3046b956b

diff --git a/common/spl/spl_rkfw.c b/common/spl/spl_rkfw.c
index 4706ea24c6..3af50bff49 100644
--- a/common/spl/spl_rkfw.c
+++ b/common/spl/spl_rkfw.c
@@ -399,7 +399,21 @@ static int rkfw_load_kernel(struct spl_load_info *info, u32 image_sector,
 			goto out;
 #endif
 	}
+#ifdef CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS
+	else {
+		int timeout = 10000;
 
+		while (misc_decompress_is_complete(dev)) {
+			if (timeout < 0) {
+				ret = -EIO;
+				goto out;
+			}
+
+			timeout--;
+			udelay(10);
+		}
+	}
+#endif
 	/* Load resource, and checkout the dtb */
 	if (hdr->second_size) {
 		struct resource_img_hdr *head =

commit 6b9455ac4c33fa034f27715f13f698a7e1c6cec5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 9 19:31:55 2020 +0800

    configs: rv1126: enable charge animation
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I23948ce2504703c6935ad770ae02ac1aa8ecea78

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index 6e69a6b83b..7fcd474f81 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -66,6 +66,7 @@ CONFIG_CMD_TFTP_BOOTM=y
 CONFIG_CMD_TFTP_FLASH=y
 # CONFIG_CMD_NFS is not set
 # CONFIG_CMD_MISC is not set
+# CONFIG_CMD_CHARGE_DISPLAY is not set
 CONFIG_CMD_MTD_BLK=y
 # CONFIG_ISO_PARTITION is not set
 CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
@@ -115,12 +116,16 @@ CONFIG_DWC_ETH_QOS=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PHY_ROCKCHIP_NANENG_USB2=y
 CONFIG_PINCTRL=y
+CONFIG_DM_FUEL_GAUGE=y
+CONFIG_POWER_FG_RK817=y
 CONFIG_DM_PMIC=y
 # CONFIG_SPL_PMIC_CHILDREN is not set
 CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_REGULATOR_RK8XX=y
+CONFIG_DM_CHARGE_DISPLAY=y
+CONFIG_CHARGE_ANIMATION=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y

commit f6c38d0b78f2fc9cc1c9ae6a38b153a71407f556
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Jun 9 10:13:45 2020 +0800

    configs: rv1126: support thunder boot
    
    1.support boot kernel by spl
    2.rename the defconfig
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ia2691e6ff612b10e6c68a67917163c0385ac0e13

diff --git a/configs/rv1126_spi_nor_defconfig b/configs/rv1126-spi-nor-tb_defconfig
similarity index 92%
rename from configs/rv1126_spi_nor_defconfig
rename to configs/rv1126-spi-nor-tb_defconfig
index 9f2b6b7865..132839b91d 100644
--- a/configs/rv1126_spi_nor_defconfig
+++ b/configs/rv1126-spi-nor-tb_defconfig
@@ -4,14 +4,12 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0xc000
 CONFIG_ROCKCHIP_RV1126=y
-CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 # CONFIG_SPL_MMC_SUPPORT is not set
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_ROCKCHIP_UART_MUX_SEL_M=2
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
-CONFIG_SPL_STACK_R_ADDR=0x3fe0000
 CONFIG_TARGET_EVB_RV1126=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
@@ -24,10 +22,15 @@ CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_BOARD_INIT=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
-CONFIG_SPL_STACK_R=y
 CONFIG_SPL_MTD_SUPPORT=y
 CONFIG_SPL_OPTEE=y
 CONFIG_SPL_LOAD_RKFW=y
+CONFIG_SPL_KERNEL_ADDR=0x608000
+CONFIG_SPL_KERNEL_COMPRESS_ADDR=0x4800000
+CONFIG_SPL_FDT_ADDR=0x2600000
+CONFIG_SPL_RAMDISK_ADDR=0x2800000
+CONFIG_SPL_RAMDISK_COMPRESS_ADDR=0x5800000
+CONFIG_SPL_KERNEL_BOOT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
@@ -72,6 +75,8 @@ CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y
 CONFIG_RK8XX_PWRKEY=y
 CONFIG_ADC_KEY=y
+CONFIG_SPL_MISC=y
+CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS=y
 CONFIG_MTD=y
 CONFIG_MTD_BLK=y
 CONFIG_MTD_DEVICE=y
@@ -114,7 +119,6 @@ CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
 CONFIG_USB_GADGET_VENDOR_NUM=0x2207
 CONFIG_USB_GADGET_PRODUCT_NUM=0x110b
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_IRQ2GPIO_V2=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y

commit a6b23e8e97115df19474de7e94aa5807ff7dd6ff
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 9 19:20:58 2020 +0800

    configs: remove unused keybox and keymaster
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I16cc190edc40b4850f9259ef4f967fa296daa76b

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index 6301d7c7de..6e69a6b83b 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -5,7 +5,6 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x10000
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh"
 CONFIG_ROCKCHIP_RV1126=y
-CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_ROCKCHIP_FIT_IMAGE=y
 CONFIG_ROCKCHIP_UIMAGE=y
@@ -30,6 +29,8 @@ CONFIG_BOOTDELAY=0
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
+# CONFIG_ANDROID_WRITE_KEYBOX is not set
+# CONFIG_ANDROID_KEYMASTER_CA is not set
 CONFIG_SPL_BOARD_INIT=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set

commit 44da3fa18ed7e8e464571e067691ffded4c3d96c
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jun 8 20:02:32 2020 +0800

    spl: mtd_blk: load rk firmware when load fit failed
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ic8b0a397e9193e62f7349bbd2230d34b6485b58a

diff --git a/common/spl/spl_mtd_blk.c b/common/spl/spl_mtd_blk.c
index 84e176c5dd..0d34836822 100644
--- a/common/spl/spl_mtd_blk.c
+++ b/common/spl/spl_mtd_blk.c
@@ -137,8 +137,12 @@ int spl_mtd_load_image(struct spl_image_info *spl_image,
 						  CONFIG_SYS_NAND_U_BOOT_OFFS,
 						  header);
 		}
+	}
+
+	if (!ret)
+		return 0;
 
-	} else if (IS_ENABLED(CONFIG_SPL_LOAD_RKFW)) {
+	if (IS_ENABLED(CONFIG_SPL_LOAD_RKFW)) {
 #ifdef CONFIG_SPL_LOAD_RKFW
 		ret = spl_mtd_load_rkfw(spl_image, desc);
 #endif

commit 2206b107471ec6de2875e7c5cf42d7180ed3a840
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jun 8 19:54:26 2020 +0800

    rockchip: rk3308: enlarge CONFIG_SPL_MAX_SIZE to 0x40000
    
    We are using DRAM offset 0~0x40000 as SPL text size, Note that BSS,
    STACK and MALLOC may using separate space.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I19b5f868e8a596a627011ad127a9d34837a6c1b6

diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h
index d43d2cbdd1..1c2b9e4461 100644
--- a/include/configs/rk3308_common.h
+++ b/include/configs/rk3308_common.h
@@ -19,7 +19,7 @@
 #define CONFIG_SYS_NAND_SIZE		(256 * 1024 * 1024)
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_TEXT_BASE		0x00000000
-#define CONFIG_SPL_MAX_SIZE		0x20000
+#define CONFIG_SPL_MAX_SIZE		0x40000
 #define CONFIG_SPL_BSS_START_ADDR	0x00400000
 #define CONFIG_SPL_BSS_MAX_SIZE		0x2000
 #define CONFIG_SYS_SPI_U_BOOT_OFFS	0x8000

commit 2e93c98a37ccc8f66d17cc6fd4ca12a68bb4ac4f
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jun 8 22:18:58 2020 +0800

    spl: mmc: fix partition error
    
    The part_get_info_by_name() return number that is greater than
    zero when called successfully.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ib3127f90368e7c2bfb9573c7d17e1e98dc67d9db

diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c
index 4efb3faaab..e25183ee50 100644
--- a/common/spl/spl_mmc.c
+++ b/common/spl/spl_mmc.c
@@ -176,7 +176,7 @@ static int mmc_load_image_raw_partition(struct spl_image_info *spl_image,
 					    partition_name, &info);
 	else
 		err = part_get_info(mmc_get_blk_desc(mmc), partition, &info);
-	if (err) {
+	if (err < 0) {
 #ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
 		puts("spl: partition error\n");
 #endif

commit dbf2974739551300976dd8bafee1c3c6cea7f856
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jun 8 22:10:27 2020 +0800

    disk: fix compile error in tpl
    
    error: disk/part.c:756: undefined reference to `sprintf'
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I41f10efe881783e2e426e70e8a79f585dce5bdf0

diff --git a/disk/Makefile b/disk/Makefile
index bf0ca73c56..658bbc1fea 100644
--- a/disk/Makefile
+++ b/disk/Makefile
@@ -8,9 +8,11 @@
 #ccflags-y += -DET_DEBUG -DDEBUG
 
 obj-$(CONFIG_PARTITIONS) 	+= part.o
+ifndef CONFIG_TPL_BUILD
 obj-$(CONFIG_$(SPL_)MAC_PARTITION)   += part_mac.o
 obj-$(CONFIG_$(SPL_)DOS_PARTITION)   += part_dos.o
 obj-$(CONFIG_$(SPL_)ISO_PARTITION)   += part_iso.o
 obj-$(CONFIG_$(SPL_)AMIGA_PARTITION) += part_amiga.o
-obj-$(CONFIG_$(SPL_TPL_)EFI_PARTITION)   += part_efi.o
+obj-$(CONFIG_$(SPL_)EFI_PARTITION)   += part_efi.o
 obj-$(CONFIG_$(SPL_)RKPARM_PARTITION)   += part_rkparm.o
+endif

commit 38b87fbc9446533ae16e1e1df4141d02be8591df
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 8 16:41:14 2020 +0800

    rv1126: configs: remove CONFIG_SUPPORT_USBPLUG wrap
    
    Wrapping makes no sense.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I107fcb8a73438e10392511c43e17d03119b55fc0

diff --git a/include/configs/evb_rv1126.h b/include/configs/evb_rv1126.h
index 5688faa496..163705ab42 100644
--- a/include/configs/evb_rv1126.h
+++ b/include/configs/evb_rv1126.h
@@ -9,9 +9,7 @@
 
 #include <configs/rv1126_common.h>
 
-#ifndef CONFIG_SUPPORT_USBPLUG
 #define CONFIG_SUPPORT_EMMC_RPMB
-#endif
 
 #define CONFIG_SYS_MMC_ENV_DEV 0
 

commit 9ee38883a7649a36beefc8a2b6c4e089afdef0a2
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue Jun 2 20:03:27 2020 +0800

    mtd: mtd_blk: Support mtd_map_write
    
    Change-Id: Ifbd05736a48aa89a2e808ae4d4385bf59458d010
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index e3218a0d68..002d9a7695 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -122,7 +122,7 @@ void mtd_blk_map_partitions(struct blk_desc *desc)
 		if (mtd_blk_map_table_init(desc,
 					   info.start << 9,
 					   info.size << 9)) {
-			printf("mtd block map table fail\n");
+			pr_debug("mtd block map table fail\n");
 		}
 	}
 }
@@ -176,6 +176,90 @@ static __maybe_unused int mtd_map_read(struct mtd_info *mtd, loff_t offset,
 	return 0;
 }
 
+static __maybe_unused int mtd_map_write(struct mtd_info *mtd, loff_t offset,
+					size_t *length, size_t *actual,
+					loff_t lim, u_char *buffer, int flags)
+{
+	int rval = 0, blocksize;
+	size_t left_to_write = *length;
+	u_char *p_buffer = buffer;
+	struct erase_info ei;
+
+	blocksize = mtd->erasesize;
+
+	/*
+	 * nand_write() handles unaligned, partial page writes.
+	 *
+	 * We allow length to be unaligned, for convenience in
+	 * using the $filesize variable.
+	 *
+	 * However, starting at an unaligned offset makes the
+	 * semantics of bad block skipping ambiguous (really,
+	 * you should only start a block skipping access at a
+	 * partition boundary).  So don't try to handle that.
+	 */
+	if ((offset & (mtd->writesize - 1)) != 0) {
+		printf("Attempt to write non page-aligned data\n");
+		*length = 0;
+		return -EINVAL;
+	}
+
+	while (left_to_write > 0) {
+		size_t block_offset = offset & (mtd->erasesize - 1);
+		size_t write_size, truncated_write_size;
+		loff_t mapped_offset;
+
+		if (offset >= mtd->size)
+			return 0;
+
+		mapped_offset = offset;
+		if (!get_mtd_blk_map_address(mtd, &mapped_offset)) {
+			if (mtd_block_isbad(mtd, mapped_offset &
+					    ~(mtd->erasesize - 1))) {
+				printf("Skipping bad block 0x%08llx\n",
+				       offset & ~(mtd->erasesize - 1));
+				offset += mtd->erasesize - block_offset;
+				continue;
+			}
+		}
+
+		if (!(mapped_offset & mtd->erasesize_mask)) {
+			memset(&ei, 0, sizeof(struct erase_info));
+			ei.addr = mapped_offset;
+			ei.len  = mtd->erasesize;
+			rval = mtd_erase(mtd, &ei);
+			if (rval) {
+				pr_info("error %d while erasing %llx\n", rval,
+					mapped_offset);
+				return rval;
+			}
+		}
+
+		if (left_to_write < (blocksize - block_offset))
+			write_size = left_to_write;
+		else
+			write_size = blocksize - block_offset;
+
+		truncated_write_size = write_size;
+		rval = mtd_write(mtd, mapped_offset, truncated_write_size,
+				 (size_t *)(&truncated_write_size), p_buffer);
+
+		offset += write_size;
+		p_buffer += write_size;
+
+		if (rval != 0) {
+			printf("NAND write to offset %llx failed %d\n",
+			       offset, rval);
+			*length -= left_to_write;
+			return rval;
+		}
+
+		left_to_write -= write_size;
+	}
+
+	return 0;
+}
+
 char *mtd_part_parse(void)
 {
 	char mtd_part_info_temp[MTD_SINGLE_PART_INFO_MAX_SIZE] = {0};
@@ -271,6 +355,8 @@ ulong mtd_dread(struct udevice *udev, lbaint_t start,
 	if (blkcnt == 0)
 		return 0;
 
+	pr_debug("mtd dread %s %lx %lx\n", mtd->name, start, blkcnt);
+
 	if (desc->devnum == BLK_MTD_NAND) {
 #if defined(CONFIG_NAND) && !defined(CONFIG_SPL_BUILD)
 		mtd = dev_get_priv(udev->parent);
@@ -315,7 +401,40 @@ ulong mtd_dread(struct udevice *udev, lbaint_t start,
 ulong mtd_dwrite(struct udevice *udev, lbaint_t start,
 		 lbaint_t blkcnt, const void *src)
 {
-	/* Not implemented */
+	struct blk_desc *desc = dev_get_uclass_platdata(udev);
+#if defined(CONFIG_NAND) || defined(CONFIG_MTD_SPI_NAND) || defined(CONFIG_SPI_FLASH_MTD)
+	loff_t off = (loff_t)(start * 512);
+	size_t rwsize = blkcnt * 512;
+#endif
+	struct mtd_info *mtd;
+	int ret = 0;
+
+	if (!desc)
+		return ret;
+
+	mtd = desc->bdev->priv;
+	if (!mtd)
+		return 0;
+
+	pr_debug("mtd dwrite %s %lx %lx\n", mtd->name, start, blkcnt);
+
+	if (blkcnt == 0)
+		return 0;
+
+	if (desc->devnum == BLK_MTD_NAND ||
+	    desc->devnum == BLK_MTD_SPI_NAND ||
+	    desc->devnum == BLK_MTD_SPI_NOR) {
+		ret = mtd_map_write(mtd, off, &rwsize,
+				    NULL, mtd->size,
+				    (u_char *)(src), 0);
+		if (!ret)
+			return blkcnt;
+		else
+			return 0;
+	} else {
+		return 0;
+	}
+
 	return 0;
 }
 

commit 85f134f569555db8fcfa2fa6f2afdc95c60b2f13
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 22 16:37:18 2020 +0800

    spl: mmc: add partition name to load image
    
    Thus, the a/b system can be supported.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I8bceb3d56f50e5bb10de3ec7d4f7768aa7d61fe1

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index a606d40fd2..2434e9effd 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -172,6 +172,7 @@ config SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR
 
 config SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
 	bool "MMC Raw mode: by partition"
+	depends on SPL_LIBDISK_SUPPORT
 	help
 	  Use a partition for loading U-Boot when using MMC/SD in raw mode.
 
@@ -191,6 +192,14 @@ config SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
 	  raw mode. U-Boot will be loaded from the first partition of this
 	  type to be found.
 
+config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_NAME
+	string "Partition Name on the MMC to load U-Boot from"
+	depends on SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
+	default "uboot"
+	help
+          Partition Name on the MMC to load U-Boot from, when the MMC is being
+          used in raw mode.
+
 config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_TYPE
 	hex "Partition Type on the MMC to load U-Boot from"
 	depends on SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c
index 19464bf87c..4efb3faaab 100644
--- a/common/spl/spl_mmc.c
+++ b/common/spl/spl_mmc.c
@@ -150,7 +150,9 @@ static int spl_mmc_find_device(struct mmc **mmcp, u32 boot_device)
 
 #ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
 static int mmc_load_image_raw_partition(struct spl_image_info *spl_image,
-					struct mmc *mmc, int partition)
+					struct mmc *mmc,
+					const char *partition_name,
+					int partition)
 {
 	disk_partition_t info;
 	int err;
@@ -169,8 +171,11 @@ static int mmc_load_image_raw_partition(struct spl_image_info *spl_image,
 		}
 	}
 #endif
-
-	err = part_get_info(mmc_get_blk_desc(mmc), partition, &info);
+	if (strcmp(partition_name, ""))
+		err = part_get_info_by_name(mmc_get_blk_desc(mmc),
+					    partition_name, &info);
+	else
+		err = part_get_info(mmc_get_blk_desc(mmc), partition, &info);
 	if (err) {
 #ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
 		puts("spl: partition error\n");
@@ -347,6 +352,7 @@ int spl_mmc_load_image(struct spl_image_info *spl_image,
 		}
 #ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
 		err = mmc_load_image_raw_partition(spl_image, mmc,
+			CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_NAME,
 			CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION);
 		if (!err)
 			return err;

commit 54ac22e074567cf4d03b91754f57fecdb8c547c6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu May 21 21:39:27 2020 +0800

    spl: mtd blk: clean rkfw code
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I9afc158744895ac73ad54251ed68b1f959c8e9e6

diff --git a/common/spl/spl_mtd_blk.c b/common/spl/spl_mtd_blk.c
index e8d17beb08..84e176c5dd 100644
--- a/common/spl/spl_mtd_blk.c
+++ b/common/spl/spl_mtd_blk.c
@@ -78,12 +78,8 @@ static ulong mtd_spl_load_read(struct spl_load_info *load, ulong sector,
 #ifdef CONFIG_SPL_LOAD_RKFW
 int spl_mtd_load_rkfw(struct spl_image_info *spl_image, struct blk_desc *desc)
 {
-	int ret = -1;
-
-	u32 trust_sectors = CONFIG_RKFW_TRUST_SECTOR;
-	u32 uboot_sectors = CONFIG_RKFW_U_BOOT_SECTOR;
-	u32 boot_sectors = CONFIG_RKFW_BOOT_SECTOR;
 	struct spl_load_info load;
+	int ret;
 
 	load.dev = desc;
 	load.priv = NULL;
@@ -91,20 +87,7 @@ int spl_mtd_load_rkfw(struct spl_image_info *spl_image, struct blk_desc *desc)
 	load.bl_len = desc->blksz;
 	load.read = mtd_spl_load_read;
 
-#ifdef CONFIG_SPL_AB
-	char trust_partition[] = "trust";
-	char uboot_partition[] = "uboot";
-
-	spl_get_partitions_sector(desc, trust_partition,
-				  &trust_sectors);
-	spl_get_partitions_sector(desc, uboot_partition,
-				  &uboot_sectors);
-#endif
-
-	ret = spl_load_rkfw_image(spl_image, &load,
-				  trust_sectors,
-				  uboot_sectors,
-				  boot_sectors);
+	ret = spl_load_rkfw_image(spl_image, &load);
 	if (ret) {
 #ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
 		puts("spl_mtd_load_rkfw: mtd block read error\n");
@@ -112,7 +95,7 @@ int spl_mtd_load_rkfw(struct spl_image_info *spl_image, struct blk_desc *desc)
 		return -1;
 	}
 
-	return ret;
+	return 0;
 }
 #endif
 

commit 34f805b88f624903565b1470b06903d06a5b58cf
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu May 21 21:38:36 2020 +0800

    spl: nand: clean rkfw code
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Icc07b4d18f4de3faf5b9e92da117a90b3c48ea4e

diff --git a/common/spl/spl_nand.c b/common/spl/spl_nand.c
index 4d7238d795..4e3f9a2f9a 100644
--- a/common/spl/spl_nand.c
+++ b/common/spl/spl_nand.c
@@ -61,9 +61,6 @@ static int spl_nand_load_element(struct spl_image_info *spl_image,
 	int err;
 
 #ifdef CONFIG_SPL_LOAD_RKFW
-	u32 trust_sectors = CONFIG_RKFW_TRUST_SECTOR;
-	u32 uboot_sectors = CONFIG_RKFW_U_BOOT_SECTOR;
-	u32 boot_sectors = CONFIG_RKFW_BOOT_SECTOR;
 	struct spl_load_info load;
 	int ret;
 
@@ -73,14 +70,10 @@ static int spl_nand_load_element(struct spl_image_info *spl_image,
 	load.bl_len = 1;
 	load.read = spl_nand_rkfw_read;
 
-	ret = spl_load_rkfw_image(spl_image, &load,
-				  trust_sectors,
-				  uboot_sectors,
-				  boot_sectors);
+	ret = spl_load_rkfw_image(spl_image, &load);
 	if (!ret || ret != -EAGAIN)
 		return ret;
 #endif
-
 	err = nand_spl_load_image(offset, sizeof(*header), (void *)header);
 	if (err)
 		return err;

commit 5458123932e7c89d7d322b2f804a7044eda2b099
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu May 21 21:01:37 2020 +0800

    spl: mmc: clean rkfw from mmc_load_image_raw_sector()
    
    Don't mix rkfw in the mmc_load_image_raw_sector(), it's
    not flexsible to add more feature for rkfw.
    
    Pass blk desc to load.dev that the same as spl_mtd_blk.c
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I87ff776362a667ea0e558749016ae3ba7049e053

diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c
index 6baec6c921..19464bf87c 100644
--- a/common/spl/spl_mmc.c
+++ b/common/spl/spl_mmc.c
@@ -8,6 +8,7 @@
  */
 #include <common.h>
 #include <dm.h>
+#include <part.h>
 #include <spl.h>
 #include <spl_rkfw.h>
 #include <linux/compiler.h>
@@ -48,9 +49,7 @@ static int mmc_load_legacy(struct spl_image_info *spl_image, struct mmc *mmc,
 static ulong h_spl_load_read(struct spl_load_info *load, ulong sector,
 			     ulong count, void *buf)
 {
-	struct mmc *mmc = load->dev;
-
-	return blk_dread(mmc_get_blk_desc(mmc), sector, count, buf);
+	return blk_dread(load->dev, sector, count, buf);
 }
 
 static __maybe_unused
@@ -61,27 +60,6 @@ int mmc_load_image_raw_sector(struct spl_image_info *spl_image,
 	struct image_header *header;
 	int ret = 0;
 
-#ifdef CONFIG_SPL_LOAD_RKFW
-	u32 trust_sectors = CONFIG_RKFW_TRUST_SECTOR;
-	u32 uboot_sectors = CONFIG_RKFW_U_BOOT_SECTOR;
-	u32 boot_sectors = CONFIG_RKFW_BOOT_SECTOR;
-	struct spl_load_info load;
-
-	load.dev = mmc;
-	load.priv = NULL;
-	load.filename = NULL;
-	load.bl_len = mmc->read_bl_len;
-	load.read = h_spl_load_read;
-
-	ret = spl_load_rkfw_image(spl_image, &load,
-				  trust_sectors,
-				  uboot_sectors,
-				  boot_sectors);
-	/* If boot successfully or can't try others, just go end */
-	if (!ret || ret != -EAGAIN)
-		goto end;
-#endif
-
 	header = (struct image_header *)(CONFIG_SYS_TEXT_BASE -
 					 sizeof(struct image_header));
 
@@ -104,7 +82,7 @@ int mmc_load_image_raw_sector(struct spl_image_info *spl_image,
 		struct spl_load_info load;
 
 		debug("Found FIT\n");
-		load.dev = mmc;
+		load.dev = mmc_get_blk_desc(mmc);
 		load.priv = NULL;
 		load.filename = NULL;
 		load.bl_len = mmc->read_bl_len;
@@ -320,6 +298,19 @@ int spl_mmc_load_image(struct spl_image_info *spl_image,
 		return err;
 	}
 
+#ifdef CONFIG_SPL_LOAD_RKFW
+	struct spl_load_info load;
+
+	load.dev = mmc_get_blk_desc(mmc);
+	load.priv = NULL;
+	load.filename = NULL;
+	load.bl_len = mmc->read_bl_len;
+	load.read = h_spl_load_read;
+
+	err = spl_load_rkfw_image(spl_image, &load);
+	if (!err || err != -EAGAIN)
+		return err;
+#endif
 	boot_mode = spl_boot_mode(bootdev->boot_device);
 	err = -EINVAL;
 	switch (boot_mode) {

commit 8a5f71e4735b1207609933b11a6c46ecd473a0a9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu May 21 20:59:01 2020 +0800

    spl: rkfw: get partition sector independ on outside
    
    - clean and simplify the code.
    - support a/b system and spl boot kernel.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I1adb2c1853e51a01e80d7453715ba2aabe0fc973

diff --git a/common/spl/spl_rkfw.c b/common/spl/spl_rkfw.c
index 0a63ee1e5f..4706ea24c6 100644
--- a/common/spl/spl_rkfw.c
+++ b/common/spl/spl_rkfw.c
@@ -12,6 +12,7 @@
 #include <spl_rkfw.h>
 #include <linux/kernel.h>
 #include <asm/arch/spl_resource_img.h>
+#include <boot_rkimg.h>
 
 #ifdef CONFIG_SPL_ATF
 static const __aligned(16) struct s_fip_name_id fip_name_id[] = {
@@ -207,7 +208,7 @@ static int rkfw_load_trust(struct spl_load_info *info, u32 image_sector,
 
 	return ret;
 }
-#else
+#else /* op-tee */
 static int rkfw_load_trust(struct spl_load_info *info, u32 image_sector,
 			   struct spl_image_info *spl_image,
 			   int *found_rkfw, u32 try_count)
@@ -455,41 +456,52 @@ out:
 }
 
 int spl_load_rkfw_image(struct spl_image_info *spl_image,
-			struct spl_load_info *info,
-			u32 trust_sector, u32 uboot_sector,
-			u32 boot_sector)
+			struct spl_load_info *info)
 {
+	u32 uboot_sector = CONFIG_RKFW_U_BOOT_SECTOR;
+	u32 trust_sector = CONFIG_RKFW_TRUST_SECTOR;
+	u32 boot_sector  = CONFIG_RKFW_BOOT_SECTOR;
 	int ret, try_count = RKFW_RETRY_SECTOR_TIMES;
 	int found_rkfw = 0;
+	char *part_name;
+#ifdef CONFIG_SPL_LIBDISK_SUPPORT
+	struct blk_desc *dev_desc = info->dev;
+	disk_partition_t part_info;
+
+	if (dev_desc) {
+		if (part_get_info_by_name(dev_desc, PART_UBOOT, &part_info) > 0)
+			uboot_sector = part_info.start;
+		if (part_get_info_by_name(dev_desc, PART_TRUST, &part_info) > 0)
+			trust_sector = part_info.start;
+		if (part_get_info_by_name(dev_desc, PART_BOOT, &part_info) > 0)
+			boot_sector = part_info.start;
+	}
+#endif
+	/* u-boot or boot */
+	if (spl_image->next_stage != SPL_NEXT_STAGE_UBOOT)
+		uboot_sector = 0;
 
 	ret = rkfw_load_trust(info, trust_sector, spl_image,
 			      &found_rkfw, try_count);
 	if (ret) {
-		printf("Load trust image failed! ret=%d\n", ret);
+		part_name = PART_TRUST;
 		goto out;
 	}
 
-#ifdef CONFIG_SPL_KERNEL_BOOT
-	if (spl_image->next_stage == SPL_NEXT_STAGE_UBOOT) {
-#endif
+	if (uboot_sector) {
 		ret = rkfw_load_uboot(info, uboot_sector, spl_image, try_count);
-		if (ret)
-			printf("Load uboot image failed! ret=%d\n", ret);
-		else
-			goto boot;
-#ifdef CONFIG_SPL_KERNEL_BOOT
-	} else if (spl_image->next_stage == SPL_NEXT_STAGE_KERNEL) {
-#endif
+		if (ret) {
+			part_name = PART_UBOOT;
+			goto out;
+		}
+	} else {
 		ret = rkfw_load_kernel(info, boot_sector, spl_image, try_count);
 		if (ret) {
-			printf("Load kernel image failed! ret=%d\n", ret);
+			part_name = PART_BOOT;
 			goto out;
 		}
-#ifdef CONFIG_SPL_KERNEL_BOOT
 	}
-#endif
 
-boot:
 #if CONFIG_IS_ENABLED(LOAD_FIT)
 	spl_image->fdt_addr = 0;
 #endif
@@ -500,6 +512,9 @@ boot:
 #endif
 
 out:
+	if (ret)
+		printf("Load %s part failed! ret=%d\n", part_name, ret);
+
 	/* If not found rockchip firmware, try others outside */
 	return found_rkfw ? ret : -EAGAIN;
 }
diff --git a/include/spl_rkfw.h b/include/spl_rkfw.h
index 3dfc71d544..00e1ea7477 100644
--- a/include/spl_rkfw.h
+++ b/include/spl_rkfw.h
@@ -102,7 +102,5 @@ typedef struct tag_second_loader_hdr {
  * spl_load_rkfw_image - Load rockchip image(trust and U-Boot) and jump to bl31.
  */
 int spl_load_rkfw_image(struct spl_image_info *spl_image,
-			struct spl_load_info *info,
-			u32 trust_sector, u32 uboot_sector,
-			u32 boot_sector);
+			struct spl_load_info *info);
 #endif

commit 759f94f55d334f23c2abf8ca707847652a686f93
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Jun 8 15:58:02 2020 +0800

    dts: rv1126: Add label to SFC subdev SPI Nor
    
    Change-Id: Ie23d7f0ce74a664ec2642e5ff86787b0a0217cb9
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/dts/rv1126-u-boot.dtsi b/arch/arm/dts/rv1126-u-boot.dtsi
index 27a7820cdd..08e48689f1 100644
--- a/arch/arm/dts/rv1126-u-boot.dtsi
+++ b/arch/arm/dts/rv1126-u-boot.dtsi
@@ -92,6 +92,7 @@
 	spi_nor: flash@1 {
 		u-boot,dm-spl;
 		compatible = "jedec,spi-nor";
+		label = "sfc_nor";
 		reg = <0>;
 		spi-tx-bus-width = <1>;
 		spi-rx-bus-width = <4>;

commit 572e331b9495ca091eb241fe41d84ef4218f4a5c
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Jun 8 15:57:50 2020 +0800

    dts: rk3308: Add label to SFC subdev SPI Nor
    
    Change-Id: Ibe05af4b4d764db9a0589e847c38f2b3c8ae1617
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-u-boot.dtsi b/arch/arm/dts/rk3308-u-boot.dtsi
index e7c3a18cbd..bc2ebd73f1 100644
--- a/arch/arm/dts/rk3308-u-boot.dtsi
+++ b/arch/arm/dts/rk3308-u-boot.dtsi
@@ -100,6 +100,7 @@
 	spi_nor: flash@1 {
 		u-boot,dm-spl;
 		compatible = "jedec,spi-nor";
+		label = "sfc_nor";
 		reg = <0>;
 		spi-tx-bus-width = <1>;
 		spi-rx-bus-width = <4>;

commit 951aa503aa95ecb9b51cf56f3ea349070264a0a9
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Jun 8 15:48:09 2020 +0800

    mtd: spi nor: Support parse dts node label property
    
    Change-Id: Ib27976970e12f4e97fab2b3c84f6580a09f2c9c1
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index 22467d8562..30a87819c1 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -42,6 +42,10 @@ static int spi_flash_probe_slave(struct spi_flash *flash)
 		return ret;
 	}
 
+#if !CONFIG_IS_ENABLED(SPI_FLASH_TINY)
+	flash->mtd.name = (char *)ofnode_read_string(spi->dev->node, "label");
+#endif
+
 	ret = spi_nor_scan(flash);
 	if (ret)
 		goto err_read_id;

commit 31e5d7a30348e51d27812bc6baa505e49687908a
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Jun 8 15:25:02 2020 +0800

    spi: rockchip_sfc: Make SPI host spi-max-frequency not configurable
    
    Change-Id: I6184134ee423a8ffbead9cac739c6f0b5db91f6c
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/spi/rockchip_sfc.c b/drivers/spi/rockchip_sfc.c
index 5af05d064a..6865f2a55d 100644
--- a/drivers/spi/rockchip_sfc.c
+++ b/drivers/spi/rockchip_sfc.c
@@ -137,7 +137,6 @@ static int rockchip_sfc_ofdata_to_platdata(struct udevice *bus)
 {
 	struct rockchip_sfc_platdata *plat = dev_get_platdata(bus);
 	struct rockchip_sfc *sfc = dev_get_priv(bus);
-	ofnode subnode;
 	int ret;
 
 	plat->base = dev_read_addr_ptr(bus);
@@ -147,18 +146,6 @@ static int rockchip_sfc_ofdata_to_platdata(struct udevice *bus)
 		return ret;
 	}
 
-	subnode = dev_read_first_subnode(bus);
-	if (!ofnode_valid(subnode)) {
-		printf("Error: subnode with SPI flash config missing!\n");
-		return -ENODEV;
-	}
-
-	plat->frequency = ofnode_read_u32_default(subnode, "spi-max-frequency",
-						  100000000);
-	if (plat->frequency > SFC_MAX_RATE || plat->frequency < SFC_MIN_RATE)
-		plat->frequency = SFC_DEFAULT_RATE;
-	sfc->max_freq = plat->frequency;
-
 	return 0;
 }
 
@@ -171,6 +158,9 @@ static int rockchip_sfc_probe(struct udevice *bus)
 	dm_spi_bus = bus->uclass_priv;
 	dm_spi_bus->max_hz = plat->frequency;
 	sfc->regbase = (struct rockchip_sfc_reg *)plat->base;
+	sfc->max_freq = SFC_MAX_RATE;
+	sfc->speed_hz = SFC_DEFAULT_RATE;
+	clk_set_rate(&sfc->clk, sfc->speed_hz);
 
 	return 0;
 }

commit be6c00c07527c198f5f78a8dc648c384c49a4f6b
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Jun 8 09:44:24 2020 +0800

    mtd: nand: Mark bbt start with spare offset 0 and ECC enabled
    
    Change-Id: Ib388c6475003917da302f0535c18ac5fc51fb3e2
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/bbt.c b/drivers/mtd/nand/bbt.c
index 977080df57..658d5de14b 100644
--- a/drivers/mtd/nand/bbt.c
+++ b/drivers/mtd/nand/bbt.c
@@ -77,7 +77,7 @@ static int nanddev_read_bbt(struct nand_device *nand, u32 block, bool update)
 	bbt_info = (struct nanddev_bbt_info *)(data_buf + nbytes);
 
 	memset(&ops, 0, sizeof(struct mtd_oob_ops));
-	ops.mode = MTD_OPS_RAW;
+	ops.mode = MTD_OPS_PLACE_OOB;
 	ops.datbuf = data_buf;
 	ops.len = bbt_page_num * mtd->writesize;
 	ops.oobbuf = oob_buf;
@@ -159,7 +159,7 @@ static int nanddev_write_bbt(struct nand_device *nand, u32 block)
 		goto out;
 
 	memset(&ops, 0, sizeof(struct mtd_oob_ops));
-	ops.mode = MTD_OPS_RAW;
+	ops.mode = MTD_OPS_PLACE_OOB;
 	ops.datbuf = data_buf;
 	ops.len = bbt_page_num * mtd->writesize;
 	ops.oobbuf = oob_buf;

commit c2d71f78b88fc203a970701321d18955506c2e16
Author: YouMin Chen <cym@rock-chips.com>
Date:   Fri Jun 5 18:55:36 2020 +0800

    rockchip: rv1126: enable TPL and select TPL_TINY_FRAMEWORK
    
    Change-Id: I98b92a45f37653b93039ed63d955b12c8c5c94b0
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 43d3986f8a..11b387a153 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -427,9 +427,13 @@ config ROCKCHIP_RV1126
 	select ARM_SMCCC if !SUPPORT_USBPLUG
 	select SUPPORT_TPL
 	select SUPPORT_SPL
+	select TPL if !SUPPORT_USBPLUG
 	select SPL if !SUPPORT_USBPLUG
 	select BOARD_LATE_INIT if !SUPPORT_USBPLUG
+	select TPL_TINY_FRAMEWORK if TPL
+	select DEBUG_UART_BOARD_INIT
 	imply ROCKCHIP_GPIO_V2
+	imply TPL_SERIAL_SUPPORT
 	help
 	  The Rockchip RV1126 is a ARM-based SoC with a quad-core Cortex-A7
 	  and a risc-v core.
@@ -441,6 +445,18 @@ config ROCKCHIP_RV1109
 	  The Rockchip RV1109 is a ARM-based SoC with a dual-core Cortex-A7
 	  and a risc-v core.
 
+if ROCKCHIP_RV1126
+
+config TPL_LDSCRIPT
+	default "arch/arm/mach-rockchip/u-boot-tpl.lds"
+
+config TPL_TEXT_BASE
+	default 0xff701000
+
+config TPL_MAX_SIZE
+	default 32768
+endif
+
 config SPL_ROCKCHIP_BACK_TO_BROM
 	bool "SPL returns to bootrom"
 	default y if ROCKCHIP_RK3036

commit 974a33f475cccab9ff53ce33ec120329249ecec7
Author: YouMin Chen <cym@rock-chips.com>
Date:   Fri Jun 5 19:00:11 2020 +0800

    rockchip: rv1126: add tpl build support
    
    Change-Id: I38badd98916d1ca03a1f0de6b293108063fe9bb6
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/configs/rv1109_defconfig b/configs/rv1109_defconfig
index bf41ef4858..cfdce890a2 100644
--- a/configs/rv1109_defconfig
+++ b/configs/rv1109_defconfig
@@ -5,11 +5,13 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0xc000
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh"
 CONFIG_ROCKCHIP_RV1109=y
+CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_ROCKCHIP_FIT_IMAGE=y
 CONFIG_ROCKCHIP_UIMAGE=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y
+CONFIG_ROCKCHIP_UART_MUX_SEL_M=2
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_TARGET_EVB_RV1126=y
@@ -115,6 +117,8 @@ CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
+CONFIG_ROCKCHIP_SDRAM_COMMON=y
 CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xff570000
diff --git a/configs/rv1126-emmc-tb_defconfig b/configs/rv1126-emmc-tb_defconfig
index 7063613096..52d3b3cc2e 100644
--- a/configs/rv1126-emmc-tb_defconfig
+++ b/configs/rv1126-emmc-tb_defconfig
@@ -4,8 +4,10 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0xc000
 CONFIG_ROCKCHIP_RV1126=y
+CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_ROCKCHIP_UART_MUX_SEL_M=2
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_TARGET_EVB_RV1126=y
@@ -87,6 +89,8 @@ CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
+CONFIG_ROCKCHIP_SDRAM_COMMON=y
 CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xff570000
diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index e3553602ea..6301d7c7de 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -5,11 +5,13 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x10000
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh"
 CONFIG_ROCKCHIP_RV1126=y
+CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_ROCKCHIP_FIT_IMAGE=y
 CONFIG_ROCKCHIP_UIMAGE=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y
+CONFIG_ROCKCHIP_UART_MUX_SEL_M=2
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_TARGET_EVB_RV1126=y
@@ -121,6 +123,8 @@ CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
+CONFIG_ROCKCHIP_SDRAM_COMMON=y
 CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xff570000
diff --git a/configs/rv1126_spi_nor_defconfig b/configs/rv1126_spi_nor_defconfig
index c83dd206ec..9f2b6b7865 100644
--- a/configs/rv1126_spi_nor_defconfig
+++ b/configs/rv1126_spi_nor_defconfig
@@ -4,9 +4,11 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0xc000
 CONFIG_ROCKCHIP_RV1126=y
+CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 # CONFIG_SPL_MMC_SUPPORT is not set
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_ROCKCHIP_UART_MUX_SEL_M=2
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL_STACK_R_ADDR=0x3fe0000
@@ -92,6 +94,8 @@ CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
+CONFIG_ROCKCHIP_SDRAM_COMMON=y
 CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xff570000

commit f520bb22d76e7353ebd51176c94951d7f56876bc
Author: YouMin Chen <cym@rock-chips.com>
Date:   Fri May 22 16:11:32 2020 +0800

    drivers: ram: rockchip: add rv1126 sdram init code
    
    Change-Id: I0c7ce7f274c396d077a4ae2fe29e382a8e295274
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_phy_rv1126.h b/arch/arm/include/asm/arch-rockchip/sdram_phy_rv1126.h
new file mode 100644
index 0000000000..5b64ec3352
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/sdram_phy_rv1126.h
@@ -0,0 +1,93 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * Copyright (C) 2020 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _ASM_ARCH_SDRAM_RK1126_PHY_H
+#define _ASM_ARCH_SDRAM_RK1126_PHY_H
+
+/* PHY_REG0 */
+#define DIGITAL_DERESET			BIT(3)
+#define ANALOG_DERESET			BIT(2)
+#define DIGITAL_RESET			(0 << 3)
+#define ANALOG_RESET			(0 << 2)
+
+/* PHY_REG1 */
+#define PHY_DDR2			(0)
+#define PHY_LPDDR2			(1)
+#define PHY_DDR3			(2)
+#define PHY_LPDDR3			(3)
+#define PHY_DDR4			(4)
+#define PHY_DDR5			(5)
+#define PHY_BL_4			(0 << 3)
+#define PHY_BL_8_OR_16			BIT(3)
+
+/* PHY_REG2 */
+#define PHY_DTT_EN			BIT(0)
+#define PHY_DTT_DISB			(0 << 0)
+#define PHY_WRITE_LEVELING_EN		BIT(2)
+#define PHY_WRITE_LEVELING_DISB		(0 << 2)
+#define PHY_SELECT_CS0			(2)
+#define PHY_SELECT_CS1			(1)
+#define PHY_SELECT_CS0_1		(0)
+#define PHY_WRITE_LEVELING_SELECTCS(n)	((n) << 6)
+#define PHY_DATA_TRAINING_SELECTCS(n)	((n) << 4)
+
+/* PHY_REGf */
+#define PHY_DQ_WIDTH_MASK		(0xf)
+
+/* PHY_REG51 */
+#define PHY_PBDIV_BIT9_MASK		BIT(0)
+#define PHY_PBDIV_BIT9_SHIFT	(0)
+#define PHY_POSTDIV_EN_MASK		BIT(7)
+#define PHY_POSTDIV_EN_SHIFT	(7)
+
+/* PHY_REG52 */
+#define PHY_PREDIV_MASK			(0x1F)
+#define PHY_PREDIV_SHIFT		(0)
+
+/* PHY_REG53*/
+#define PHY_POSTDIV_MASK		(0x7)
+#define PHY_POSTDIV_SHIFT		(5)
+#define PHY_PD_DISB			BIT(3)
+
+/* PHY_REG90 */
+#define PHY_PLL_LOCK			BIT(2)
+
+struct ca_skew {
+	u32 a0_a3_a3_cke1_a_de_skew;
+	u32 a1_ba1_null_cke0_b_de_skew;
+	u32 a2_a9_a9_a4_a_de_skew;
+	u32 a3_a15_null_a5_b_de_skew;
+	u32 a4_a6_a6_ck_a_de_skew;
+	u32 a5_a12_null_odt0_b_de_skew;
+	u32 a6_ba2_null_a0_a_de_skew;
+	u32 a7_a4_a4_odt0_a_de_skew;
+	u32 a8_a1_a1_cke0_a_de_skew;
+	u32 a9_a5_a5_a5_a_de_skew;
+	u32 a10_a8_a8_clkb_a_de_skew;
+	u32 a11_a7_a7_ca2_a_de_skew;
+	u32 a12_rasn_null_ca1_a_de_skew;
+	u32 a13_a13_null_ca3_a_de_skew;
+	u32 a14_a14_null_csb1_b_de_skew;
+	u32 a15_a10_null_ca0_b_de_skew;
+	u32 a16_a11_null_csb0_b_de_skew;
+	u32 a17_null_null_null_de_skew;
+	u32 ba0_csb1_csb1_csb0_a_de_skew;
+	u32 ba1_wen_null_cke1_b_de_skew;
+	u32 bg0_odt1_odt1_csb1_a_de_skew;
+	u32 bg1_a2_a2_odt1_a_de_skew;
+	u32 cke0_casb_null_ca1_b_de_skew;
+	u32 ck_ck_ck_ck_b_de_skew;
+	u32 ckb_ckb_ckb_ckb_b_de_skew;
+	u32 csb0_odt0_odt0_ca2_b_de_skew;
+	u32 odt0_csb0_csb0_ca4_b_de_skew;
+	u32 resetn_resetn_null_resetn_de_skew;
+	u32 actn_cke_cke_ca3_b_de_skew;
+	u32 null_null_null_null_de_skew;
+	u32 csb1_ba0_null_null_de_skew;
+	u32 odt1_a0_a0_odt1_b_de_skew;
+};
+
+#define PHY_REG(base, n)		((base) + 4 * (n))
+#endif /* _ASM_ARCH_SDRAM_RK1126_PHY_H */
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rv1126.h b/arch/arm/include/asm/arch-rockchip/sdram_rv1126.h
new file mode 100644
index 0000000000..21e84aee8d
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/sdram_rv1126.h
@@ -0,0 +1,364 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * Copyright (C) 2020 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _ASM_ARCH_SDRAM_RK1126_H
+#define _ASM_ARCH_SDRAM_RK1126_H
+
+#include <asm/arch/dram_spec_timing.h>
+#include <asm/arch/sdram.h>
+#include <asm/arch/sdram_common.h>
+#include <asm/arch/sdram_msch.h>
+#include <asm/arch/sdram_pctl_px30.h>
+#include <asm/arch/sdram_phy_rv1126.h>
+
+#define AGINGX0_VAL			(4)
+#define AGING_CPU_VAL			(0xff)
+#define AGING_NPU_VAL			(0xff)
+#define AGING_OTHER_VAL			(0x33)
+
+#define PATTERN				(0x5aa5f00f)
+#define PHY_PER_DE_SKEW_DELAY		(20)
+#define PHY_RX_DQS_INNER_DELAY		(5)
+
+#define PHY_DDR3_RON_DISABLE		(0)
+#define PHY_DDR3_RON_506ohm		(1)
+#define PHY_DDR3_RON_253ohm		(2)
+#define PHY_DDR3_RON_169hm		(3)
+#define PHY_DDR3_RON_127ohm		(4)
+#define PHY_DDR3_RON_101ohm		(5)
+#define PHY_DDR3_RON_84ohm		(6)
+#define PHY_DDR3_RON_72ohm		(7)
+#define PHY_DDR3_RON_63ohm		(16)
+#define PHY_DDR3_RON_56ohm		(17)
+#define PHY_DDR3_RON_51ohm		(18)
+#define PHY_DDR3_RON_46ohm		(19)
+#define PHY_DDR3_RON_42ohm		(20)
+#define PHY_DDR3_RON_39ohm		(21)
+#define PHY_DDR3_RON_36ohm		(22)
+#define PHY_DDR3_RON_34ohm		(23)
+#define PHY_DDR3_RON_32ohm		(24)
+#define PHY_DDR3_RON_30ohm		(25)
+#define PHY_DDR3_RON_28ohm		(26)
+#define PHY_DDR3_RON_27ohm		(27)
+#define PHY_DDR3_RON_25ohm		(28)
+#define PHY_DDR3_RON_24ohm		(29)
+#define PHY_DDR3_RON_23ohm		(30)
+#define PHY_DDR3_RON_22ohm		(31)
+
+#define PHY_DDR3_RTT_DISABLE		(0)
+#define PHY_DDR3_RTT_953ohm		(1)
+#define PHY_DDR3_RTT_483ohm		(2)
+#define PHY_DDR3_RTT_320ohm		(3)
+#define PHY_DDR3_RTT_241ohm		(4)
+#define PHY_DDR3_RTT_193ohm		(5)
+#define PHY_DDR3_RTT_161ohm		(6)
+#define PHY_DDR3_RTT_138ohm		(7)
+#define PHY_DDR3_RTT_121ohm		(16)
+#define PHY_DDR3_RTT_107ohm		(17)
+#define PHY_DDR3_RTT_97ohm		(18)
+#define PHY_DDR3_RTT_88ohm		(19)
+#define PHY_DDR3_RTT_80ohm		(20)
+#define PHY_DDR3_RTT_74ohm		(21)
+#define PHY_DDR3_RTT_69ohm		(22)
+#define PHY_DDR3_RTT_64ohm		(23)
+#define PHY_DDR3_RTT_60ohm		(24)
+#define PHY_DDR3_RTT_57ohm		(25)
+#define PHY_DDR3_RTT_54ohm		(26)
+#define PHY_DDR3_RTT_51ohm		(27)
+#define PHY_DDR3_RTT_48ohm		(28)
+#define PHY_DDR3_RTT_46ohm		(29)
+#define PHY_DDR3_RTT_44ohm		(30)
+#define PHY_DDR3_RTT_42ohm		(31)
+
+#define PHY_DDR4_LPDDR3_RON_DISABLE	(0)
+#define PHY_DDR4_LPDDR3_RON_570ohm	(1)
+#define PHY_DDR4_LPDDR3_RON_285ohm	(2)
+#define PHY_DDR4_LPDDR3_RON_190ohm	(3)
+#define PHY_DDR4_LPDDR3_RON_142ohm	(4)
+#define PHY_DDR4_LPDDR3_RON_114ohm	(5)
+#define PHY_DDR4_LPDDR3_RON_95ohm	(6)
+#define PHY_DDR4_LPDDR3_RON_81ohm	(7)
+#define PHY_DDR4_LPDDR3_RON_71ohm	(16)
+#define PHY_DDR4_LPDDR3_RON_63ohm	(17)
+#define PHY_DDR4_LPDDR3_RON_57ohm	(18)
+#define PHY_DDR4_LPDDR3_RON_52ohm	(19)
+#define PHY_DDR4_LPDDR3_RON_47ohm	(20)
+#define PHY_DDR4_LPDDR3_RON_44ohm	(21)
+#define PHY_DDR4_LPDDR3_RON_41ohm	(22)
+#define PHY_DDR4_LPDDR3_RON_38ohm	(23)
+#define PHY_DDR4_LPDDR3_RON_36ohm	(24)
+#define PHY_DDR4_LPDDR3_RON_34ohm	(25)
+#define PHY_DDR4_LPDDR3_RON_32ohm	(26)
+#define PHY_DDR4_LPDDR3_RON_30ohm	(27)
+#define PHY_DDR4_LPDDR3_RON_28ohm	(28)
+#define PHY_DDR4_LPDDR3_RON_27ohm	(29)
+#define PHY_DDR4_LPDDR3_RON_26ohm	(30)
+#define PHY_DDR4_LPDDR3_RON_25ohm	(31)
+
+#define PHY_DDR4_LPDDR3_RTT_DISABLE	(0)
+#define PHY_DDR4_LPDDR3_RTT_973ohm	(1)
+#define PHY_DDR4_LPDDR3_RTT_493ohm	(2)
+#define PHY_DDR4_LPDDR3_RTT_327ohm	(3)
+#define PHY_DDR4_LPDDR3_RTT_247ohm	(4)
+#define PHY_DDR4_LPDDR3_RTT_197ohm	(5)
+#define PHY_DDR4_LPDDR3_RTT_164ohm	(6)
+#define PHY_DDR4_LPDDR3_RTT_141ohm	(7)
+#define PHY_DDR4_LPDDR3_RTT_123ohm	(16)
+#define PHY_DDR4_LPDDR3_RTT_109ohm	(17)
+#define PHY_DDR4_LPDDR3_RTT_99ohm	(18)
+#define PHY_DDR4_LPDDR3_RTT_90ohm	(19)
+#define PHY_DDR4_LPDDR3_RTT_82ohm	(20)
+#define PHY_DDR4_LPDDR3_RTT_76ohm	(21)
+#define PHY_DDR4_LPDDR3_RTT_70ohm	(22)
+#define PHY_DDR4_LPDDR3_RTT_66ohm	(23)
+#define PHY_DDR4_LPDDR3_RTT_62ohm	(24)
+#define PHY_DDR4_LPDDR3_RTT_58ohm	(25)
+#define PHY_DDR4_LPDDR3_RTT_55ohm	(26)
+#define PHY_DDR4_LPDDR3_RTT_52ohm	(27)
+#define PHY_DDR4_LPDDR3_RTT_49ohm	(28)
+#define PHY_DDR4_LPDDR3_RTT_47ohm	(29)
+#define PHY_DDR4_LPDDR3_RTT_45ohm	(30)
+#define PHY_DDR4_LPDDR3_RTT_43ohm	(31)
+
+#define PHY_LPDDR4_RON_DISABLE		(0)
+#define PHY_LPDDR4_RON_606ohm		(1)
+#define PHY_LPDDR4_RON_303ohm		(2)
+#define PHY_LPDDR4_RON_202ohm		(3)
+#define PHY_LPDDR4_RON_152ohm		(4)
+#define PHY_LPDDR4_RON_121ohm		(5)
+#define PHY_LPDDR4_RON_101ohm		(6)
+#define PHY_LPDDR4_RON_87ohm		(7)
+#define PHY_LPDDR4_RON_76ohm		(16)
+#define PHY_LPDDR4_RON_67ohm		(17)
+#define PHY_LPDDR4_RON_61ohm		(18)
+#define PHY_LPDDR4_RON_55ohm		(19)
+#define PHY_LPDDR4_RON_51ohm		(20)
+#define PHY_LPDDR4_RON_47ohm		(21)
+#define PHY_LPDDR4_RON_43ohm		(22)
+#define PHY_LPDDR4_RON_40ohm		(23)
+#define PHY_LPDDR4_RON_38ohm		(24)
+#define PHY_LPDDR4_RON_36ohm		(25)
+#define PHY_LPDDR4_RON_34ohm		(26)
+#define PHY_LPDDR4_RON_32ohm		(27)
+#define PHY_LPDDR4_RON_30ohm		(28)
+#define PHY_LPDDR4_RON_29ohm		(29)
+#define PHY_LPDDR4_RON_28ohm		(30)
+#define PHY_LPDDR4_RON_26ohm		(31)
+
+#define PHY_LPDDR4_RTT_DISABLE		(0)
+#define PHY_LPDDR4_RTT_998ohm		(1)
+#define PHY_LPDDR4_RTT_506ohm		(2)
+#define PHY_LPDDR4_RTT_336ohm		(3)
+#define PHY_LPDDR4_RTT_253ohm		(4)
+#define PHY_LPDDR4_RTT_202ohm		(5)
+#define PHY_LPDDR4_RTT_169ohm		(6)
+#define PHY_LPDDR4_RTT_144ohm		(7)
+#define PHY_LPDDR4_RTT_127ohm		(16)
+#define PHY_LPDDR4_RTT_112ohm		(17)
+#define PHY_LPDDR4_RTT_101ohm		(18)
+#define PHY_LPDDR4_RTT_92ohm		(19)
+#define PHY_LPDDR4_RTT_84ohm		(20)
+#define PHY_LPDDR4_RTT_78ohm		(21)
+#define PHY_LPDDR4_RTT_72ohm		(22)
+#define PHY_LPDDR4_RTT_67ohm		(23)
+#define PHY_LPDDR4_RTT_63ohm		(24)
+#define PHY_LPDDR4_RTT_60ohm		(25)
+#define PHY_LPDDR4_RTT_56ohm		(26)
+#define PHY_LPDDR4_RTT_53ohm		(27)
+#define PHY_LPDDR4_RTT_51ohm		(28)
+#define PHY_LPDDR4_RTT_48ohm		(29)
+#define PHY_LPDDR4_RTT_46ohm		(30)
+#define PHY_LPDDR4_RTT_44ohm		(31)
+
+#define ADD_CMD_CA			(0x150)
+#define ADD_GROUP_CS0_A			(0x170)
+#define ADD_GROUP_CS0_B			(0x1d0)
+#define ADD_GROUP_CS1_A			(0x1a0)
+#define ADD_GROUP_CS1_B			(0x200)
+
+/* PMUGRF */
+#define PMUGRF_OS_REG0			(0x200)
+#define PMUGRF_OS_REG(n)		(PMUGRF_OS_REG0 + (n) * 4)
+#define PMUGRF_CON_DDRPHY_BUFFEREN_MASK		(0x3 << (12 + 16))
+#define PMUGRF_CON_DDRPHY_BUFFEREN_EN		(0x1 << 12)
+#define PMUGRF_CON_DDRPHY_BUFFEREN_DIS	(0x2 << 12)
+
+/* DDR GRF */
+#define DDR_GRF_CON(n)			(0 + (n) * 4)
+#define DDR_GRF_STATUS_BASE		(0X100)
+#define DDR_GRF_STATUS(n)		(DDR_GRF_STATUS_BASE + (n) * 4)
+#define DDR_GRF_LP_CON			(0x20)
+
+#define SPLIT_MODE_32_L16_VALID		(0)
+#define SPLIT_MODE_32_H16_VALID		(1)
+#define SPLIT_MODE_16_L8_VALID		(2)
+#define SPLIT_MODE_16_H8_VALID		(3)
+
+#define DDR_GRF_SPLIT_CON		(0x10)
+#define SPLIT_MODE_MASK			(0x3)
+#define SPLIT_MODE_OFFSET		(9)
+#define SPLIT_BYPASS_MASK		(1)
+#define SPLIT_BYPASS_OFFSET		(8)
+#define SPLIT_SIZE_MASK			(0xff)
+#define SPLIT_SIZE_OFFSET		(0)
+
+/* SGRF SOC_CON13 */
+#define UPCTL2_ASRSTN_REQ(n)		(((0x1 << 0) << 16) | ((n) << 0))
+#define UPCTL2_PSRSTN_REQ(n)		(((0x1 << 1) << 16) | ((n) << 1))
+#define UPCTL2_SRSTN_REQ(n)		(((0x1 << 2) << 16) | ((n) << 2))
+
+/* CRU define */
+/* CRU_PLL_CON0 */
+#define PB(n)				((0x1 << (15 + 16)) | ((n) << 15))
+#define POSTDIV1(n)			((0x7 << (12 + 16)) | ((n) << 12))
+#define FBDIV(n)			((0xFFF << 16) | (n))
+
+/* CRU_PLL_CON1 */
+#define RSTMODE(n)			((0x1 << (15 + 16)) | ((n) << 15))
+#define RST(n)				((0x1 << (14 + 16)) | ((n) << 14))
+#define PD(n)				((0x1 << (13 + 16)) | ((n) << 13))
+#define DSMPD(n)			((0x1 << (12 + 16)) | ((n) << 12))
+#define LOCK(n)				(((n) >> 10) & 0x1)
+#define POSTDIV2(n)			((0x7 << (6 + 16)) | ((n) << 6))
+#define REFDIV(n)			((0x3F << 16) | (n))
+
+/* CRU_MODE */
+#define CLOCK_FROM_XIN_OSC		(0)
+#define CLOCK_FROM_PLL			(1)
+#define CLOCK_FROM_RTC_32K		(2)
+#define DPLL_MODE(n)			((0x3 << (2 + 16)) | ((n) << 2))
+
+/* CRU_SOFTRESET_CON1 */
+#define DDRPHY_PSRSTN_REQ(n)		(((0x1 << 14) << 16) | ((n) << 14))
+#define DDRPHY_SRSTN_REQ(n)		(((0x1 << 15) << 16) | ((n) << 15))
+/* CRU_CLKGATE_CON2 */
+#define DDR_MSCH_EN_MASK		((0x1 << 10) << 16)
+#define DDR_MSCH_EN_SHIFT		(10)
+
+/* CRU register */
+#define CRU_PLL_CON(pll_id, n)		((pll_id)  * 0x20 + (n) * 4)
+#define CRU_MODE			(0xa0)
+#define CRU_GLB_CNT_TH			(0xb0)
+#define CRU_CLKSEL_CON_BASE		0x100
+#define CRU_CLKSELS_CON(i)		(CRU_CLKSEL_CON_BASE + ((i) * 4))
+#define CRU_CLKGATE_CON_BASE		0x230
+#define CRU_CLKGATE_CON(i)		(CRU_CLKGATE_CON_BASE + ((i) * 4))
+#define CRU_CLKSFTRST_CON_BASE		0x300
+#define CRU_CLKSFTRST_CON(i)		(CRU_CLKSFTRST_CON_BASE + ((i) * 4))
+
+/* SGRF_SOC_CON12 */
+#define CLK_DDR_UPCTL_EN_MASK		((0x1 << 2) << 16)
+#define CLK_DDR_UPCTL_EN_SHIFT		(2)
+#define ACLK_DDR_UPCTL_EN_MASK		((0x1 << 0) << 16)
+#define ACLK_DDR_UPCTL_EN_SHIFT		(0)
+
+/* DDRGRF DDR CON2 */
+#define DFI_FREQ_CHANGE_ACK		BIT(10)
+/* DDRGRF status8 */
+#define DFI_FREQ_CHANGE_REQ		BIT(19)
+
+struct rv1126_ddrgrf {
+	u32 ddr_grf_con[4];
+	u32 grf_ddrsplit_con;
+	u32 reserved1[(0x20 - 0x10) / 4 - 1];
+	u32 ddr_grf_lp_con;
+	u32 reserved2[(0x40 - 0x20) / 4 - 1];
+	u32 grf_ddrphy_con[6];
+	u32 reserved3[(0x100 - 0x54) / 4 - 1];
+	u32 ddr_grf_status[18];
+	u32 reserved4[(0x150 - 0x144) / 4 - 1];
+	u32 grf_ddrhold_status;
+	u32 reserved5[(0x160 - 0x150) / 4 - 1];
+	u32 grf_ddrphy_status[2];
+};
+
+struct rv1126_ddr_phy_regs {
+	u32 phy[8][2];
+};
+
+struct msch_regs {
+	u32 coreid;
+	u32 revisionid;
+	u32 deviceconf;
+	u32 devicesize;
+	u32 ddrtiminga0;
+	u32 ddrtimingb0;
+	u32 ddrtimingc0;
+	u32 devtodev0;
+	u32 reserved1[(0x110 - 0x20) / 4];
+	u32 ddrmode;
+	u32 ddr4timing;
+	u32 reserved2[(0x1000 - 0x118) / 4];
+	u32 agingx0;
+	u32 reserved3[(0x1040 - 0x1004) / 4];
+	u32 aging0;
+	u32 aging1;
+	u32 aging2;
+	u32 aging3;
+};
+
+struct sdram_msch_timings {
+	union noc_ddrtiminga0 ddrtiminga0;
+	union noc_ddrtimingb0 ddrtimingb0;
+	union noc_ddrtimingc0 ddrtimingc0;
+	union noc_devtodev0 devtodev0;
+	union noc_ddrmode ddrmode;
+	union noc_ddr4timing ddr4timing;
+	u32 agingx0;
+	u32 aging0;
+	u32 aging1;
+	u32 aging2;
+	u32 aging3;
+};
+
+struct rv1126_sdram_channel {
+	struct sdram_cap_info cap_info;
+	struct sdram_msch_timings noc_timings;
+};
+
+struct rv1126_sdram_params {
+	struct rv1126_sdram_channel ch;
+	struct sdram_base_params base;
+	struct ddr_pctl_regs pctl_regs;
+	struct rv1126_ddr_phy_regs phy_regs;
+};
+
+struct rv1126_fsp_param {
+	u32 flag;
+	u32 freq_mhz;
+
+	/* dram size */
+	u32 dq_odt;
+	u32 ca_odt;
+	u32 ds_pdds;
+	u32 vref_ca[2];
+	u32 vref_dq[2];
+
+	/* phy side */
+	u32 wr_dq_drv;
+	u32 wr_ca_drv;
+	u32 wr_ckcs_drv;
+	u32 rd_odt;
+	u32 rd_odt_up_en;
+	u32 rd_odt_down_en;
+	u32 vref_inner;
+	u32 vref_out;
+	u32 lp4_drv_pd_en;
+
+	struct sdram_msch_timings noc_timings;
+};
+
+#define MAX_IDX			(4)
+#define FSP_FLAG		(0xfead0001)
+#define SHARE_MEM_BASE		(0x100000)
+/*
+ * Borrow share memory space to temporarily store FSP parame.
+ * In the stage of DDR init write FSP parame to this space.
+ * In the stage of trust init move FSP parame to SRAM space
+ * from share memory space.
+ */
+#define FSP_PARAM_STORE_ADDR	(SHARE_MEM_BASE)
+
+#endif /* _ASM_ARCH_SDRAM_RK1126_H */
diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index fbbe864ffc..cf268a8f00 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -7,6 +7,7 @@
 obj-$(CONFIG_ROCKCHIP_SDRAM_COMMON) += sdram_common.o
 obj-$(CONFIG_ROCKCHIP_RK3368) += dmc-rk3368.o
 obj-$(CONFIG_ROCKCHIP_RV1108) += sdram_rv1108_pctl_phy.o sdram_rv1108.o
+obj-$(CONFIG_ROCKCHIP_RV1126) += sdram_rv1126.o sdram_pctl_px30.o
 obj-$(CONFIG_ROCKCHIP_RK3128) += sdram_rk3128.o
 obj-$(CONFIG_ROCKCHIP_RK3188) += sdram_rk3188.o
 obj-$(CONFIG_ROCKCHIP_RK322X) += sdram_rk322x.o
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-330.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-330.inc
new file mode 100644
index 0000000000..ab20191e37
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-330.inc
@@ -0,0 +1,72 @@
+{
+	{
+		{
+			.rank = 0x1,
+			.col = 0xC,
+			.bk = 0x3,
+			.bw = 0x1,
+			.dbw = 0x0,
+			.row_3_4 = 0x0,
+			.cs0_row = 0x10,
+			.cs1_row = 0x10,
+			.cs0_high16bit_row = 0x10,
+			.cs1_high16bit_row = 0x10,
+			.ddrconfig = 0
+		},
+		{
+			{0x270a0509},
+			{0x08020401},
+			{0x00000002},
+			{0x00001111},
+			{0x0000000c},
+			{0x00000222},
+			0x000000ff
+		}
+	},
+	{
+		.ddr_freq = 330,	/* clock rate(MHz) */
+		.dramtype = DDR3,
+		.num_channels = 1,
+		.stride = 0,
+		.odt = 0
+	},
+	{
+		{
+			{0x00000000, 0x43041001},	/* MSTR */
+			{0x00000064, 0x0028003a},	/* RFSHTMG */
+			{0x000000d0, 0x00020052},	/* INIT0 */
+			{0x000000d4, 0x00220000},	/* INIT1 */
+			{0x000000d8, 0x00000100},	/* INIT2 */
+			{0x000000dc, 0x03100000},	/* INIT3 */
+			{0x000000e0, 0x00000000},	/* INIT4 */
+			{0x000000e4, 0x00090000},	/* INIT5 */
+			{0x000000f4, 0x000f011f},	/* RANKCTL */
+			{0x00000100, 0x07090b06},	/* DRAMTMG0 */
+			{0x00000104, 0x00050209},	/* DRAMTMG1 */
+			{0x00000108, 0x03030307},	/* DRAMTMG2 */
+			{0x0000010c, 0x00202006},	/* DRAMTMG3 */
+			{0x00000110, 0x03020203},	/* DRAMTMG4 */
+			{0x00000114, 0x03030202},	/* DRAMTMG5 */
+			{0x00000120, 0x00000903},	/* DRAMTMG8 */
+			{0x00000180, 0x00800020},	/* ZQCTL0 */
+			{0x00000184, 0x00000000},	/* ZQCTL1 */
+			{0x00000190, 0x07010001},	/* DFITMG0 */
+			{0x00000198, 0x07000101},	/* DFILPCFG0 */
+			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
+			{0x00000240, 0x06000600},	/* ODTCFG */
+			{0x00000244, 0x00000201},	/* ODTMAP */
+			{0x00000250, 0x00001f00},	/* SCHED */
+			{0x00000490, 0x00000001},	/* PCTRL_0 */
+			{0xffffffff, 0xffffffff}
+		}
+	},
+	{
+		{
+			{0x00000004, 0x0000008a},	/* PHYREG01 */
+			{0x00000014, 0x00000005},	/* PHYREG05 */
+			{0x00000018, 0x00000000},	/* PHYREG06 */
+			{0x0000001c, 0x00000005},	/* PHYREG07 */
+			{0xffffffff, 0xffffffff}
+		}
+	}
+},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-396.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-396.inc
new file mode 100644
index 0000000000..6984db1438
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-396.inc
@@ -0,0 +1,72 @@
+{
+	{
+		{
+			.rank = 0x1,
+			.col = 0xC,
+			.bk = 0x3,
+			.bw = 0x1,
+			.dbw = 0x0,
+			.row_3_4 = 0x0,
+			.cs0_row = 0x10,
+			.cs1_row = 0x10,
+			.cs0_high16bit_row = 0x10,
+			.cs1_high16bit_row = 0x10,
+			.ddrconfig = 0
+		},
+		{
+			{0x290b060a},
+			{0x0a020401},
+			{0x00000002},
+			{0x00001111},
+			{0x0000000c},
+			{0x00000222},
+			0x000000ff
+		}
+	},
+	{
+		.ddr_freq = 396,	/* clock rate(MHz) */
+		.dramtype = DDR3,
+		.num_channels = 1,
+		.stride = 0,
+		.odt = 0
+	},
+	{
+		{
+			{0x00000000, 0x43041001},	/* MSTR */
+			{0x00000064, 0x00300046},	/* RFSHTMG */
+			{0x000000d0, 0x00020062},	/* INIT0 */
+			{0x000000d4, 0x00280000},	/* INIT1 */
+			{0x000000d8, 0x00000100},	/* INIT2 */
+			{0x000000dc, 0x05200000},	/* INIT3 */
+			{0x000000e0, 0x00000000},	/* INIT4 */
+			{0x000000e4, 0x00090000},	/* INIT5 */
+			{0x000000f4, 0x000f011f},	/* RANKCTL */
+			{0x00000100, 0x070a0d07},	/* DRAMTMG0 */
+			{0x00000104, 0x0005020b},	/* DRAMTMG1 */
+			{0x00000108, 0x03030407},	/* DRAMTMG2 */
+			{0x0000010c, 0x00202006},	/* DRAMTMG3 */
+			{0x00000110, 0x03020204},	/* DRAMTMG4 */
+			{0x00000114, 0x03030202},	/* DRAMTMG5 */
+			{0x00000120, 0x00000904},	/* DRAMTMG8 */
+			{0x00000180, 0x00800020},	/* ZQCTL0 */
+			{0x00000184, 0x00000000},	/* ZQCTL1 */
+			{0x00000190, 0x07010001},	/* DFITMG0 */
+			{0x00000198, 0x07000101},	/* DFILPCFG0 */
+			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
+			{0x00000240, 0x06000604},	/* ODTCFG */
+			{0x00000244, 0x00000201},	/* ODTMAP */
+			{0x00000250, 0x00001f00},	/* SCHED */
+			{0x00000490, 0x00000001},	/* PCTRL_0 */
+			{0xffffffff, 0xffffffff}
+		}
+	},
+	{
+		{
+			{0x00000004, 0x0000008a},	/* PHYREG01 */
+			{0x00000014, 0x00000006},	/* PHYREG05 */
+			{0x00000018, 0x00000000},	/* PHYREG06 */
+			{0x0000001c, 0x00000005},	/* PHYREG07 */
+			{0xffffffff, 0xffffffff}
+		}
+	}
+},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-528.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-528.inc
new file mode 100644
index 0000000000..ff4dd08a7f
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-528.inc
@@ -0,0 +1,72 @@
+{
+	{
+		{
+			.rank = 0x1,
+			.col = 0xC,
+			.bk = 0x3,
+			.bw = 0x1,
+			.dbw = 0x0,
+			.row_3_4 = 0x0,
+			.cs0_row = 0x10,
+			.cs1_row = 0x10,
+			.cs0_high16bit_row = 0x10,
+			.cs1_high16bit_row = 0x10,
+			.ddrconfig = 0
+		},
+		{
+			{0x2c0f080e},
+			{0x0d030502},
+			{0x00000002},
+			{0x00001111},
+			{0x0000000c},
+			{0x0000032a},
+			0x000000ff
+		}
+	},
+	{
+		.ddr_freq = 528,	/* clock rate(MHz) */
+		.dramtype = DDR3,
+		.num_channels = 1,
+		.stride = 0,
+		.odt = 0
+	},
+	{
+		{
+			{0x00000000, 0x43041001},	/* MSTR */
+			{0x00000064, 0x0040005d},	/* RFSHTMG */
+			{0x000000d0, 0x00020082},	/* INIT0 */
+			{0x000000d4, 0x00350000},	/* INIT1 */
+			{0x000000d8, 0x00000100},	/* INIT2 */
+			{0x000000dc, 0x09400000},	/* INIT3 */
+			{0x000000e0, 0x00080000},	/* INIT4 */
+			{0x000000e4, 0x00090000},	/* INIT5 */
+			{0x000000f4, 0x000f011f},	/* RANKCTL */
+			{0x00000100, 0x090e120a},	/* DRAMTMG0 */
+			{0x00000104, 0x0007020e},	/* DRAMTMG1 */
+			{0x00000108, 0x03040407},	/* DRAMTMG2 */
+			{0x0000010c, 0x00202006},	/* DRAMTMG3 */
+			{0x00000110, 0x04020305},	/* DRAMTMG4 */
+			{0x00000114, 0x03030302},	/* DRAMTMG5 */
+			{0x00000120, 0x00000904},	/* DRAMTMG8 */
+			{0x00000180, 0x00800020},	/* ZQCTL0 */
+			{0x00000184, 0x00000000},	/* ZQCTL1 */
+			{0x00000190, 0x07020001},	/* DFITMG0 */
+			{0x00000198, 0x07000101},	/* DFILPCFG0 */
+			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
+			{0x00000240, 0x06000608},	/* ODTCFG */
+			{0x00000244, 0x00000201},	/* ODTMAP */
+			{0x00000250, 0x00001f00},	/* SCHED */
+			{0x00000490, 0x00000001},	/* PCTRL_0 */
+			{0xffffffff, 0xffffffff}
+		}
+	},
+	{
+		{
+			{0x00000004, 0x0000008a},	/* PHYREG01 */
+			{0x00000014, 0x00000008},	/* PHYREG05 */
+			{0x00000018, 0x00000000},	/* PHYREG06 */
+			{0x0000001c, 0x00000006},	/* PHYREG07 */
+			{0xffffffff, 0xffffffff}
+		}
+	}
+},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-664.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-664.inc
new file mode 100644
index 0000000000..e74a4810d1
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-664.inc
@@ -0,0 +1,72 @@
+{
+	{
+		{
+			.rank = 0x1,
+			.col = 0xC,
+			.bk = 0x3,
+			.bw = 0x1,
+			.dbw = 0x0,
+			.row_3_4 = 0x0,
+			.cs0_row = 0x10,
+			.cs1_row = 0x10,
+			.cs0_high16bit_row = 0x10,
+			.cs1_high16bit_row = 0x10,
+			.ddrconfig = 0
+		},
+		{
+			{0x2f120a11},
+			{0x0f020602},
+			{0x00000002},
+			{0x00001111},
+			{0x0000000c},
+			{0x00000232},
+			0x000000ff
+		}
+	},
+	{
+		.ddr_freq = 664,	/* clock rate(MHz) */
+		.dramtype = DDR3,
+		.num_channels = 1,
+		.stride = 0,
+		.odt = 1
+	},
+	{
+		{
+			{0x00000000, 0x43041001},	/* MSTR */
+			{0x00000064, 0x00500075},	/* RFSHTMG */
+			{0x000000d0, 0x000200a4},	/* INIT0 */
+			{0x000000d4, 0x00420000},	/* INIT1 */
+			{0x000000d8, 0x00000100},	/* INIT2 */
+			{0x000000dc, 0x0b600040},	/* INIT3 */
+			{0x000000e0, 0x00100000},	/* INIT4 */
+			{0x000000e4, 0x00090000},	/* INIT5 */
+			{0x000000f4, 0x000f011f},	/* RANKCTL */
+			{0x00000100, 0x0a0f160c},	/* DRAMTMG0 */
+			{0x00000104, 0x00080211},	/* DRAMTMG1 */
+			{0x00000108, 0x04050508},	/* DRAMTMG2 */
+			{0x0000010c, 0x00202006},	/* DRAMTMG3 */
+			{0x00000110, 0x05020306},	/* DRAMTMG4 */
+			{0x00000114, 0x04040302},	/* DRAMTMG5 */
+			{0x00000120, 0x00000905},	/* DRAMTMG8 */
+			{0x00000180, 0x00800020},	/* ZQCTL0 */
+			{0x00000184, 0x00000000},	/* ZQCTL1 */
+			{0x00000190, 0x07030002},	/* DFITMG0 */
+			{0x00000198, 0x07000101},	/* DFILPCFG0 */
+			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
+			{0x00000240, 0x0600060c},	/* ODTCFG */
+			{0x00000244, 0x00000201},	/* ODTMAP */
+			{0x00000250, 0x00001f00},	/* SCHED */
+			{0x00000490, 0x00000001},	/* PCTRL_0 */
+			{0xffffffff, 0xffffffff}
+		}
+	},
+	{
+		{
+			{0x00000004, 0x0000008a},	/* PHYREG01 */
+			{0x00000014, 0x0000000a},	/* PHYREG05 */
+			{0x00000018, 0x00000000},	/* PHYREG06 */
+			{0x0000001c, 0x00000007},	/* PHYREG07 */
+			{0xffffffff, 0xffffffff}
+		}
+	}
+},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-784.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-784.inc
new file mode 100644
index 0000000000..377dc39aa9
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-784.inc
@@ -0,0 +1,72 @@
+{
+	{
+		{
+			.rank = 0x1,
+			.col = 0xC,
+			.bk = 0x3,
+			.bw = 0x1,
+			.dbw = 0x0,
+			.row_3_4 = 0x0,
+			.cs0_row = 0x10,
+			.cs1_row = 0x10,
+			.cs0_high16bit_row = 0x10,
+			.cs1_high16bit_row = 0x10,
+			.ddrconfig = 0
+		},
+		{
+			{0x30150c13},
+			{0x10030702},
+			{0x00000002},
+			{0x00001111},
+			{0x0000000c},
+			{0x0000033a},
+			0x000000ff
+		}
+	},
+	{
+		.ddr_freq = 784,	/* clock rate(MHz) */
+		.dramtype = DDR3,
+		.num_channels = 1,
+		.stride = 0,
+		.odt = 1
+	},
+	{
+		{
+			{0x00000000, 0x43041001},	/* MSTR */
+			{0x00000064, 0x005f008a},	/* RFSHTMG */
+			{0x000000d0, 0x000200c1},	/* INIT0 */
+			{0x000000d4, 0x004e0000},	/* INIT1 */
+			{0x000000d8, 0x00000100},	/* INIT2 */
+			{0x000000dc, 0x0d700040},	/* INIT3 */
+			{0x000000e0, 0x00180000},	/* INIT4 */
+			{0x000000e4, 0x00090000},	/* INIT5 */
+			{0x000000f4, 0x000f011f},	/* RANKCTL */
+			{0x00000100, 0x0c101a0f},	/* DRAMTMG0 */
+			{0x00000104, 0x000a0314},	/* DRAMTMG1 */
+			{0x00000108, 0x04060509},	/* DRAMTMG2 */
+			{0x0000010c, 0x00202006},	/* DRAMTMG3 */
+			{0x00000110, 0x06020306},	/* DRAMTMG4 */
+			{0x00000114, 0x04040303},	/* DRAMTMG5 */
+			{0x00000120, 0x00000906},	/* DRAMTMG8 */
+			{0x00000180, 0x00800020},	/* ZQCTL0 */
+			{0x00000184, 0x00000000},	/* ZQCTL1 */
+			{0x00000190, 0x07040002},	/* DFITMG0 */
+			{0x00000198, 0x07000101},	/* DFILPCFG0 */
+			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
+			{0x00000240, 0x0600060c},	/* ODTCFG */
+			{0x00000244, 0x00000201},	/* ODTMAP */
+			{0x00000250, 0x00001f00},	/* SCHED */
+			{0x00000490, 0x00000001},	/* PCTRL_0 */
+			{0xffffffff, 0xffffffff}
+		}
+	},
+	{
+		{
+			{0x00000004, 0x0000008a},	/* PHYREG01 */
+			{0x00000014, 0x0000000b},	/* PHYREG05 */
+			{0x00000018, 0x00000000},	/* PHYREG06 */
+			{0x0000001c, 0x00000008},	/* PHYREG07 */
+			{0xffffffff, 0xffffffff}
+		}
+	}
+},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-924.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-924.inc
new file mode 100644
index 0000000000..63ea151af4
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr3-detect-924.inc
@@ -0,0 +1,72 @@
+{
+	{
+		{
+			.rank = 0x1,
+			.col = 0xC,
+			.bk = 0x3,
+			.bw = 0x1,
+			.dbw = 0x0,
+			.row_3_4 = 0x0,
+			.cs0_row = 0x10,
+			.cs1_row = 0x10,
+			.cs0_high16bit_row = 0x10,
+			.cs1_high16bit_row = 0x10,
+			.ddrconfig = 0
+		},
+		{
+			{0x33180e16},
+			{0x10030803},
+			{0x00000002},
+			{0x00001111},
+			{0x0000000c},
+			{0x00000342},
+			0x000000ff
+		}
+	},
+	{
+		.ddr_freq = 924,	/* clock rate(MHz) */
+		.dramtype = DDR3,
+		.num_channels = 1,
+		.stride = 0,
+		.odt = 1
+	},
+	{
+		{
+			{0x00000000, 0x43041001},	/* MSTR */
+			{0x00000064, 0x007000a2},	/* RFSHTMG */
+			{0x000000d0, 0x000200e3},	/* INIT0 */
+			{0x000000d4, 0x005c0000},	/* INIT1 */
+			{0x000000d8, 0x00000100},	/* INIT2 */
+			{0x000000dc, 0x0f140040},	/* INIT3 */
+			{0x000000e0, 0x00200000},	/* INIT4 */
+			{0x000000e4, 0x000b0000},	/* INIT5 */
+			{0x000000f4, 0x000f011f},	/* RANKCTL */
+			{0x00000100, 0x0d111f11},	/* DRAMTMG0 */
+			{0x00000104, 0x000c0317},	/* DRAMTMG1 */
+			{0x00000108, 0x0507050a},	/* DRAMTMG2 */
+			{0x0000010c, 0x00202007},	/* DRAMTMG3 */
+			{0x00000110, 0x07020307},	/* DRAMTMG4 */
+			{0x00000114, 0x05050403},	/* DRAMTMG5 */
+			{0x00000120, 0x00000907},	/* DRAMTMG8 */
+			{0x00000180, 0x00940025},	/* ZQCTL0 */
+			{0x00000184, 0x00000000},	/* ZQCTL1 */
+			{0x00000190, 0x07050003},	/* DFITMG0 */
+			{0x00000198, 0x07000101},	/* DFILPCFG0 */
+			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
+			{0x00000240, 0x06000610},	/* ODTCFG */
+			{0x00000244, 0x00000201},	/* ODTMAP */
+			{0x00000250, 0x00001f00},	/* SCHED */
+			{0x00000490, 0x00000001},	/* PCTRL_0 */
+			{0xffffffff, 0xffffffff}
+		}
+	},
+	{
+		{
+			{0x00000004, 0x0000008a},	/* PHYREG01 */
+			{0x00000014, 0x0000000d},	/* PHYREG05 */
+			{0x00000018, 0x00000000},	/* PHYREG06 */
+			{0x0000001c, 0x00000009},	/* PHYREG07 */
+			{0xffffffff, 0xffffffff}
+		}
+	}
+},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-1056.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-1056.inc
new file mode 100644
index 0000000000..dc438c004b
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-1056.inc
@@ -0,0 +1,75 @@
+{
+	{
+		{
+			.rank = 0x1,
+			.col = 0xA,
+			.bk = 0x2,
+			.bw = 0x1,
+			.dbw = 0x0,
+			.row_3_4 = 0x0,
+			.cs0_row = 0x11,
+			.cs1_row = 0x0,
+			.cs0_high16bit_row = 0x11,
+			.cs1_high16bit_row = 0x0,
+			.ddrconfig = 0
+		},
+		{
+			{0x561d1219},
+			{0x10030703},
+			{0x00000002},
+			{0x00001111},
+			{0x0000000c},
+			{0x0000033a},
+			0x000000ff
+		}
+	},
+	{
+		.ddr_freq = 1056,	/* clock rate(MHz) */
+		.dramtype = DDR4,
+		.num_channels = 1,
+		.stride = 0,
+		.odt = 1
+	},
+	{
+		{
+			{0x00000000, 0x43041010},	/* MSTR */
+			{0x00000064, 0x008000b9},	/* RFSHTMG */
+			{0x000000d0, 0x00020103},	/* INIT0 */
+			{0x000000d4, 0x00690000},	/* INIT1 */
+			{0x000000d8, 0x00000100},	/* INIT2 */
+			{0x000000dc, 0x07340401},	/* INIT3 */
+			{0x000000e0, 0x00100000},	/* INIT4 */
+			{0x000000e4, 0x00110000},	/* INIT5 */
+			{0x000000e8, 0x00000420},	/* INIT6 */
+			{0x000000ec, 0x00000800},	/* INIT7 */
+			{0x000000f4, 0x000f011f},	/* RANKCTL */
+			{0x00000100, 0x0f102411},	/* DRAMTMG0 */
+			{0x00000104, 0x0004041a},	/* DRAMTMG1 */
+			{0x00000108, 0x0608060d},	/* DRAMTMG2 */
+			{0x0000010c, 0x0040400c},	/* DRAMTMG3 */
+			{0x00000110, 0x08030409},	/* DRAMTMG4 */
+			{0x00000114, 0x06060403},	/* DRAMTMG5 */
+			{0x00000120, 0x07070d07},	/* DRAMTMG8 */
+			{0x00000124, 0x00020309},	/* DRAMTMG9 */
+			{0x00000180, 0x01000040},	/* ZQCTL0 */
+			{0x00000184, 0x00000000},	/* ZQCTL1 */
+			{0x00000190, 0x07060004},	/* DFITMG0 */
+			{0x00000198, 0x07000101},	/* DFILPCFG0 */
+			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
+			{0x00000240, 0x06000614},	/* ODTCFG */
+			{0x00000244, 0x00000201},	/* ODTMAP */
+			{0x00000250, 0x00001f00},	/* SCHED */
+			{0x00000490, 0x00000001},	/* PCTRL_0 */
+			{0xffffffff, 0xffffffff}
+		}
+	},
+	{
+		{
+			{0x00000004, 0x0000008c},	/* PHYREG01 */
+			{0x00000014, 0x00000010},	/* PHYREG05 */
+			{0x00000018, 0x00000000},	/* PHYREG06 */
+			{0x0000001c, 0x0000000b},	/* PHYREG07 */
+			{0xffffffff, 0xffffffff}
+		}
+	}
+},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-330.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-330.inc
new file mode 100644
index 0000000000..246d15e292
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-330.inc
@@ -0,0 +1,75 @@
+{
+	{
+		{
+			.rank = 0x1,
+			.col = 0xA,
+			.bk = 0x2,
+			.bw = 0x1,
+			.dbw = 0x0,
+			.row_3_4 = 0x0,
+			.cs0_row = 0x11,
+			.cs1_row = 0x0,
+			.cs0_high16bit_row = 0x11,
+			.cs1_high16bit_row = 0x0,
+			.ddrconfig = 0
+		},
+		{
+			{0x4d110a08},
+			{0x06020501},
+			{0x00000002},
+			{0x00001111},
+			{0x0000000c},
+			{0x0000022a},
+			0x000000ff
+		}
+	},
+	{
+		.ddr_freq = 330,	/* clock rate(MHz) */
+		.dramtype = DDR4,
+		.num_channels = 1,
+		.stride = 0,
+		.odt = 0
+	},
+	{
+		{
+			{0x00000000, 0x43049010},	/* MSTR */
+			{0x00000064, 0x0028003a},	/* RFSHTMG */
+			{0x000000d0, 0x00020052},	/* INIT0 */
+			{0x000000d4, 0x00220000},	/* INIT1 */
+			{0x000000d8, 0x00000100},	/* INIT2 */
+			{0x000000dc, 0x00040000},	/* INIT3 */
+			{0x000000e0, 0x00000000},	/* INIT4 */
+			{0x000000e4, 0x00110000},	/* INIT5 */
+			{0x000000e8, 0x00000420},	/* INIT6 */
+			{0x000000ec, 0x00000400},	/* INIT7 */
+			{0x000000f4, 0x000f011f},	/* RANKCTL */
+			{0x00000100, 0x09060b06},	/* DRAMTMG0 */
+			{0x00000104, 0x00020209},	/* DRAMTMG1 */
+			{0x00000108, 0x0505040a},	/* DRAMTMG2 */
+			{0x0000010c, 0x0040400c},	/* DRAMTMG3 */
+			{0x00000110, 0x05030206},	/* DRAMTMG4 */
+			{0x00000114, 0x03030202},	/* DRAMTMG5 */
+			{0x00000120, 0x03030b03},	/* DRAMTMG8 */
+			{0x00000124, 0x00020208},	/* DRAMTMG9 */
+			{0x00000180, 0x01000040},	/* ZQCTL0 */
+			{0x00000184, 0x00000000},	/* ZQCTL1 */
+			{0x00000190, 0x07030003},	/* DFITMG0 */
+			{0x00000198, 0x07000101},	/* DFILPCFG0 */
+			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
+			{0x00000240, 0x06000604},	/* ODTCFG */
+			{0x00000244, 0x00000201},	/* ODTMAP */
+			{0x00000250, 0x00001f00},	/* SCHED */
+			{0x00000490, 0x00000001},	/* PCTRL_0 */
+			{0xffffffff, 0xffffffff}
+		}
+	},
+	{
+		{
+			{0x00000004, 0x0000008c},	/* PHYREG01 */
+			{0x00000014, 0x0000000a},	/* PHYREG05 */
+			{0x00000018, 0x00000000},	/* PHYREG06 */
+			{0x0000001c, 0x00000009},	/* PHYREG07 */
+			{0xffffffff, 0xffffffff}
+		}
+	}
+},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-396.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-396.inc
new file mode 100644
index 0000000000..1901e0c4a3
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-396.inc
@@ -0,0 +1,75 @@
+{
+	{
+		{
+			.rank = 0x1,
+			.col = 0xA,
+			.bk = 0x2,
+			.bw = 0x1,
+			.dbw = 0x0,
+			.row_3_4 = 0x0,
+			.cs0_row = 0x11,
+			.cs1_row = 0x0,
+			.cs0_high16bit_row = 0x11,
+			.cs1_high16bit_row = 0x0,
+			.ddrconfig = 0
+		},
+		{
+			{0x4d110a0a},
+			{0x07020501},
+			{0x00000002},
+			{0x00001111},
+			{0x0000000c},
+			{0x0000022a},
+			0x000000ff
+		}
+	},
+	{
+		.ddr_freq = 396,	/* clock rate(MHz) */
+		.dramtype = DDR4,
+		.num_channels = 1,
+		.stride = 0,
+		.odt = 0
+	},
+	{
+		{
+			{0x00000000, 0x43049010},	/* MSTR */
+			{0x00000064, 0x00300046},	/* RFSHTMG */
+			{0x000000d0, 0x00020062},	/* INIT0 */
+			{0x000000d4, 0x00280000},	/* INIT1 */
+			{0x000000d8, 0x00000100},	/* INIT2 */
+			{0x000000dc, 0x00040000},	/* INIT3 */
+			{0x000000e0, 0x00000000},	/* INIT4 */
+			{0x000000e4, 0x00110000},	/* INIT5 */
+			{0x000000e8, 0x00000420},	/* INIT6 */
+			{0x000000ec, 0x00000400},	/* INIT7 */
+			{0x000000f4, 0x000f011f},	/* RANKCTL */
+			{0x00000100, 0x09070d07},	/* DRAMTMG0 */
+			{0x00000104, 0x0002020a},	/* DRAMTMG1 */
+			{0x00000108, 0x0505040a},	/* DRAMTMG2 */
+			{0x0000010c, 0x0040400c},	/* DRAMTMG3 */
+			{0x00000110, 0x05030206},	/* DRAMTMG4 */
+			{0x00000114, 0x03030202},	/* DRAMTMG5 */
+			{0x00000120, 0x04040b04},	/* DRAMTMG8 */
+			{0x00000124, 0x00020208},	/* DRAMTMG9 */
+			{0x00000180, 0x01000040},	/* ZQCTL0 */
+			{0x00000184, 0x00000000},	/* ZQCTL1 */
+			{0x00000190, 0x07030003},	/* DFITMG0 */
+			{0x00000198, 0x07000101},	/* DFILPCFG0 */
+			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
+			{0x00000240, 0x06000604},	/* ODTCFG */
+			{0x00000244, 0x00000201},	/* ODTMAP */
+			{0x00000250, 0x00001f00},	/* SCHED */
+			{0x00000490, 0x00000001},	/* PCTRL_0 */
+			{0xffffffff, 0xffffffff}
+		}
+	},
+	{
+		{
+			{0x00000004, 0x0000008c},	/* PHYREG01 */
+			{0x00000014, 0x0000000a},	/* PHYREG05 */
+			{0x00000018, 0x00000000},	/* PHYREG06 */
+			{0x0000001c, 0x00000009},	/* PHYREG07 */
+			{0xffffffff, 0xffffffff}
+		}
+	}
+},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-528.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-528.inc
new file mode 100644
index 0000000000..ad082449c6
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-528.inc
@@ -0,0 +1,75 @@
+{
+	{
+		{
+			.rank = 0x1,
+			.col = 0xA,
+			.bk = 0x2,
+			.bw = 0x1,
+			.dbw = 0x0,
+			.row_3_4 = 0x0,
+			.cs0_row = 0x11,
+			.cs1_row = 0x0,
+			.cs0_high16bit_row = 0x11,
+			.cs1_high16bit_row = 0x0,
+			.ddrconfig = 0
+		},
+		{
+			{0x4d120a0d},
+			{0x09020501},
+			{0x00000002},
+			{0x00001111},
+			{0x0000000c},
+			{0x0000022a},
+			0x000000ff
+		}
+	},
+	{
+		.ddr_freq = 528,	/* clock rate(MHz) */
+		.dramtype = DDR4,
+		.num_channels = 1,
+		.stride = 0,
+		.odt = 0
+	},
+	{
+		{
+			{0x00000000, 0x43049010},	/* MSTR */
+			{0x00000064, 0x0040005d},	/* RFSHTMG */
+			{0x000000d0, 0x00020082},	/* INIT0 */
+			{0x000000d4, 0x00350000},	/* INIT1 */
+			{0x000000d8, 0x00000100},	/* INIT2 */
+			{0x000000dc, 0x00040000},	/* INIT3 */
+			{0x000000e0, 0x00000000},	/* INIT4 */
+			{0x000000e4, 0x00110000},	/* INIT5 */
+			{0x000000e8, 0x00000420},	/* INIT6 */
+			{0x000000ec, 0x00000400},	/* INIT7 */
+			{0x000000f4, 0x000f011f},	/* RANKCTL */
+			{0x00000100, 0x0a0a1209},	/* DRAMTMG0 */
+			{0x00000104, 0x0002020e},	/* DRAMTMG1 */
+			{0x00000108, 0x0505040a},	/* DRAMTMG2 */
+			{0x0000010c, 0x0040400c},	/* DRAMTMG3 */
+			{0x00000110, 0x05030206},	/* DRAMTMG4 */
+			{0x00000114, 0x03030202},	/* DRAMTMG5 */
+			{0x00000120, 0x04040b04},	/* DRAMTMG8 */
+			{0x00000124, 0x00020208},	/* DRAMTMG9 */
+			{0x00000180, 0x01000040},	/* ZQCTL0 */
+			{0x00000184, 0x00000000},	/* ZQCTL1 */
+			{0x00000190, 0x07030003},	/* DFITMG0 */
+			{0x00000198, 0x07000101},	/* DFILPCFG0 */
+			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
+			{0x00000240, 0x06000604},	/* ODTCFG */
+			{0x00000244, 0x00000201},	/* ODTMAP */
+			{0x00000250, 0x00001f00},	/* SCHED */
+			{0x00000490, 0x00000001},	/* PCTRL_0 */
+			{0xffffffff, 0xffffffff}
+		}
+	},
+	{
+		{
+			{0x00000004, 0x0000008c},	/* PHYREG01 */
+			{0x00000014, 0x0000000a},	/* PHYREG05 */
+			{0x00000018, 0x00000000},	/* PHYREG06 */
+			{0x0000001c, 0x00000009},	/* PHYREG07 */
+			{0xffffffff, 0xffffffff}
+		}
+	}
+},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-664.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-664.inc
new file mode 100644
index 0000000000..2cc463782b
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-664.inc
@@ -0,0 +1,75 @@
+{
+	{
+		{
+			.rank = 0x1,
+			.col = 0xA,
+			.bk = 0x2,
+			.bw = 0x1,
+			.dbw = 0x0,
+			.row_3_4 = 0x0,
+			.cs0_row = 0x11,
+			.cs1_row = 0x0,
+			.cs0_high16bit_row = 0x11,
+			.cs1_high16bit_row = 0x0,
+			.ddrconfig = 0
+		},
+		{
+			{0x4d130a11},
+			{0x0c020501},
+			{0x00000002},
+			{0x00001111},
+			{0x0000000c},
+			{0x0000022a},
+			0x000000ff
+		}
+	},
+	{
+		.ddr_freq = 664,	/* clock rate(MHz) */
+		.dramtype = DDR4,
+		.num_channels = 1,
+		.stride = 0,
+		.odt = 1
+	},
+	{
+		{
+			{0x00000000, 0x43041010},	/* MSTR */
+			{0x00000064, 0x00500075},	/* RFSHTMG */
+			{0x000000d0, 0x000200a4},	/* INIT0 */
+			{0x000000d4, 0x00420000},	/* INIT1 */
+			{0x000000d8, 0x00000100},	/* INIT2 */
+			{0x000000dc, 0x01040401},	/* INIT3 */
+			{0x000000e0, 0x00000000},	/* INIT4 */
+			{0x000000e4, 0x00110000},	/* INIT5 */
+			{0x000000e8, 0x00000420},	/* INIT6 */
+			{0x000000ec, 0x00000400},	/* INIT7 */
+			{0x000000f4, 0x000f011f},	/* RANKCTL */
+			{0x00000100, 0x0b0c160c},	/* DRAMTMG0 */
+			{0x00000104, 0x00020211},	/* DRAMTMG1 */
+			{0x00000108, 0x0505040a},	/* DRAMTMG2 */
+			{0x0000010c, 0x0040400c},	/* DRAMTMG3 */
+			{0x00000110, 0x05030306},	/* DRAMTMG4 */
+			{0x00000114, 0x04040302},	/* DRAMTMG5 */
+			{0x00000120, 0x05050b05},	/* DRAMTMG8 */
+			{0x00000124, 0x00020208},	/* DRAMTMG9 */
+			{0x00000180, 0x01000040},	/* ZQCTL0 */
+			{0x00000184, 0x00000000},	/* ZQCTL1 */
+			{0x00000190, 0x07030003},	/* DFITMG0 */
+			{0x00000198, 0x07000101},	/* DFILPCFG0 */
+			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
+			{0x00000240, 0x06000604},	/* ODTCFG */
+			{0x00000244, 0x00000201},	/* ODTMAP */
+			{0x00000250, 0x00001f00},	/* SCHED */
+			{0x00000490, 0x00000001},	/* PCTRL_0 */
+			{0xffffffff, 0xffffffff}
+		}
+	},
+	{
+		{
+			{0x00000004, 0x0000008c},	/* PHYREG01 */
+			{0x00000014, 0x0000000a},	/* PHYREG05 */
+			{0x00000018, 0x00000000},	/* PHYREG06 */
+			{0x0000001c, 0x00000009},	/* PHYREG07 */
+			{0xffffffff, 0xffffffff}
+		}
+	}
+},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-784.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-784.inc
new file mode 100644
index 0000000000..38cbe4ebaf
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-784.inc
@@ -0,0 +1,75 @@
+{
+	{
+		{
+			.rank = 0x1,
+			.col = 0xA,
+			.bk = 0x2,
+			.bw = 0x1,
+			.dbw = 0x0,
+			.row_3_4 = 0x0,
+			.cs0_row = 0x11,
+			.cs1_row = 0x0,
+			.cs0_high16bit_row = 0x11,
+			.cs1_high16bit_row = 0x0,
+			.ddrconfig = 0
+		},
+		{
+			{0x50160d14},
+			{0x0e020502},
+			{0x00000002},
+			{0x00001111},
+			{0x0000000c},
+			{0x0000022a},
+			0x000000ff
+		}
+	},
+	{
+		.ddr_freq = 784,	/* clock rate(MHz) */
+		.dramtype = DDR4,
+		.num_channels = 1,
+		.stride = 0,
+		.odt = 1
+	},
+	{
+		{
+			{0x00000000, 0x43041010},	/* MSTR */
+			{0x00000064, 0x005f008a},	/* RFSHTMG */
+			{0x000000d0, 0x000200c1},	/* INIT0 */
+			{0x000000d4, 0x004e0000},	/* INIT1 */
+			{0x000000d8, 0x00000100},	/* INIT2 */
+			{0x000000dc, 0x03140401},	/* INIT3 */
+			{0x000000e0, 0x00000000},	/* INIT4 */
+			{0x000000e4, 0x00110000},	/* INIT5 */
+			{0x000000e8, 0x00000420},	/* INIT6 */
+			{0x000000ec, 0x00000400},	/* INIT7 */
+			{0x000000f4, 0x000f011f},	/* RANKCTL */
+			{0x00000100, 0x0c0e1a0e},	/* DRAMTMG0 */
+			{0x00000104, 0x00030314},	/* DRAMTMG1 */
+			{0x00000108, 0x0506050b},	/* DRAMTMG2 */
+			{0x0000010c, 0x0040400c},	/* DRAMTMG3 */
+			{0x00000110, 0x06030307},	/* DRAMTMG4 */
+			{0x00000114, 0x04040302},	/* DRAMTMG5 */
+			{0x00000120, 0x06060b06},	/* DRAMTMG8 */
+			{0x00000124, 0x00020308},	/* DRAMTMG9 */
+			{0x00000180, 0x01000040},	/* ZQCTL0 */
+			{0x00000184, 0x00000000},	/* ZQCTL1 */
+			{0x00000190, 0x07040003},	/* DFITMG0 */
+			{0x00000198, 0x07000101},	/* DFILPCFG0 */
+			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
+			{0x00000240, 0x0600060c},	/* ODTCFG */
+			{0x00000244, 0x00000201},	/* ODTMAP */
+			{0x00000250, 0x00001f00},	/* SCHED */
+			{0x00000490, 0x00000001},	/* PCTRL_0 */
+			{0xffffffff, 0xffffffff}
+		}
+	},
+	{
+		{
+			{0x00000004, 0x0000008c},	/* PHYREG01 */
+			{0x00000014, 0x0000000c},	/* PHYREG05 */
+			{0x00000018, 0x00000000},	/* PHYREG06 */
+			{0x0000001c, 0x00000009},	/* PHYREG07 */
+			{0xffffffff, 0xffffffff}
+		}
+	}
+},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-924.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-924.inc
new file mode 100644
index 0000000000..a3dec3ac7e
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-ddr4-detect-924.inc
@@ -0,0 +1,75 @@
+{
+	{
+		{
+			.rank = 0x1,
+			.col = 0xA,
+			.bk = 0x2,
+			.bw = 0x1,
+			.dbw = 0x0,
+			.row_3_4 = 0x0,
+			.cs0_row = 0x11,
+			.cs1_row = 0x0,
+			.cs0_high16bit_row = 0x11,
+			.cs1_high16bit_row = 0x0,
+			.ddrconfig = 0
+		},
+		{
+			{0x531a0f17},
+			{0x0e020603},
+			{0x00000002},
+			{0x00001111},
+			{0x0000000c},
+			{0x00000232},
+			0x000000ff
+		}
+	},
+	{
+		.ddr_freq = 924,	/* clock rate(MHz) */
+		.dramtype = DDR4,
+		.num_channels = 1,
+		.stride = 0,
+		.odt = 1
+	},
+	{
+		{
+			{0x00000000, 0x43041010},	/* MSTR */
+			{0x00000064, 0x007000a2},	/* RFSHTMG */
+			{0x000000d0, 0x000200e3},	/* INIT0 */
+			{0x000000d4, 0x005c0000},	/* INIT1 */
+			{0x000000d8, 0x00000100},	/* INIT2 */
+			{0x000000dc, 0x05240401},	/* INIT3 */
+			{0x000000e0, 0x00080000},	/* INIT4 */
+			{0x000000e4, 0x00110000},	/* INIT5 */
+			{0x000000e8, 0x00000420},	/* INIT6 */
+			{0x000000ec, 0x00000400},	/* INIT7 */
+			{0x000000f4, 0x000f011f},	/* RANKCTL */
+			{0x00000100, 0x0e0e1f10},	/* DRAMTMG0 */
+			{0x00000104, 0x00030317},	/* DRAMTMG1 */
+			{0x00000108, 0x0507050c},	/* DRAMTMG2 */
+			{0x0000010c, 0x0040400c},	/* DRAMTMG3 */
+			{0x00000110, 0x07030308},	/* DRAMTMG4 */
+			{0x00000114, 0x05050303},	/* DRAMTMG5 */
+			{0x00000120, 0x07070b07},	/* DRAMTMG8 */
+			{0x00000124, 0x00020309},	/* DRAMTMG9 */
+			{0x00000180, 0x01000040},	/* ZQCTL0 */
+			{0x00000184, 0x00000000},	/* ZQCTL1 */
+			{0x00000190, 0x07050003},	/* DFITMG0 */
+			{0x00000198, 0x07000101},	/* DFILPCFG0 */
+			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
+			{0x00000240, 0x06000610},	/* ODTCFG */
+			{0x00000244, 0x00000201},	/* ODTMAP */
+			{0x00000250, 0x00001f00},	/* SCHED */
+			{0x00000490, 0x00000001},	/* PCTRL_0 */
+			{0xffffffff, 0xffffffff}
+		}
+	},
+	{
+		{
+			{0x00000004, 0x0000008c},	/* PHYREG01 */
+			{0x00000014, 0x0000000e},	/* PHYREG05 */
+			{0x00000018, 0x00000000},	/* PHYREG06 */
+			{0x0000001c, 0x0000000a},	/* PHYREG07 */
+			{0xffffffff, 0xffffffff}
+		}
+	}
+},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-loader_params.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-loader_params.inc
new file mode 100644
index 0000000000..dde46cdcf1
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-loader_params.inc
@@ -0,0 +1,157 @@
+0x12345678,
+2,/* version */
+(0 << 0) | (1 << 8) | (8 << 16) | (8 << 24),/* cpu_gen,global index */
+(0 << 0) | (9 << 8) | (16 << 16) | (9 << 24),/* d2,d3 index */
+(25 << 0) | (9 << 8) | (0 << 16) | (0 << 24),/* d4,d5 index */
+(0 << 0) | (9 << 8) | (34 << 16) | (9 << 24),/* lp2,lp3 index */
+(43 << 0) | (13 << 8) | (0 << 16) | (0 << 24),/* lp4,lp5 index */
+(0 << 0) | (0 << 8) | (56 << 16) | (8 << 24),/* skew index, dq_map index */
+/* global info */
+0,
+(93 << 16) | 13,/* sr_idle << 16 | pd_idle */
+0,/* channel info */
+1,/* 2t info */
+0, 0, 0, 0,/* reserved */
+
+/* ddr3 */
+(924 << DDR_FREQ_F0_SHIFT) | (330 << DDR_FREQ_F1_SHIFT),
+(528 << DDR_FREQ_F2_SHIFT) | (784 << DDR_FREQ_F3_SHIFT),
+(0 << DDR_FREQ_F4_SHIFT) | (0 << DDR_FREQ_F5_SHIFT),
+/* drv when odt on */
+(34 << PHY_DQ_DRV_SHIFT) | (34 << PHY_CA_DRV_SHIFT) |
+	(42 << PHY_CLK_DRV_SHIFT) | (34 << DRAM_DQ_DRV_SHIFT),
+/* drv when odt off */
+(34 << PHY_DQ_DRV_SHIFT) | (34 << PHY_CA_DRV_SHIFT) |
+	(42 << PHY_CLK_DRV_SHIFT) | (34 << DRAM_DQ_DRV_SHIFT),
+/* odt info */
+(120 << DRAM_ODT_SHIFT) | (241 << PHY_ODT_SHIFT) |
+	(1 << PHY_ODT_PUUP_EN_SHIFT) |
+	(1 << PHY_ODT_PUDN_EN_SHIFT),
+/* odt enable freq */
+(333 << DRAM_ODT_EN_FREQ_SHIFT) | (333 << PHY_ODT_EN_FREQ_SHIFT),
+/* slew rate when odt enable */
+(0 << PHY_DQ_SR_SHIFT) | (0xe << PHY_CA_SR_SHIFT) |
+	(0 << PHY_CLK_SR_SHIFT),
+/* slew  ratee when odt disable */
+(0 << PHY_DQ_SR_SHIFT) | (0xe << PHY_CA_SR_SHIFT) |
+	(0 << PHY_CLK_SR_SHIFT),
+
+/* ddr4 */
+(924 << DDR_FREQ_F0_SHIFT) | (330 << DDR_FREQ_F1_SHIFT),
+(528 << DDR_FREQ_F2_SHIFT) | (784 << DDR_FREQ_F3_SHIFT),
+(0 << DDR_FREQ_F4_SHIFT) | (0 << DDR_FREQ_F5_SHIFT),
+/* drv when odt on */
+(34 << PHY_DQ_DRV_SHIFT) | (34 << PHY_CA_DRV_SHIFT) |
+	(42 << PHY_CLK_DRV_SHIFT) | (34 << DRAM_DQ_DRV_SHIFT),
+/* drv when odt off */
+(34 << PHY_DQ_DRV_SHIFT) | (42 << PHY_CA_DRV_SHIFT) |
+	(42 << PHY_CLK_DRV_SHIFT) | (34 << DRAM_DQ_DRV_SHIFT),
+/* odt info */
+(120 << DRAM_ODT_SHIFT) | (247 << PHY_ODT_SHIFT) |
+	(1 << PHY_ODT_PUUP_EN_SHIFT) | (1 << PHY_ODT_PUDN_EN_SHIFT),
+/* odt enable freq */
+(333 << DRAM_ODT_EN_FREQ_SHIFT) | (333 << PHY_ODT_EN_FREQ_SHIFT),
+/* slew rate when odt enable */
+(0 << PHY_DQ_SR_SHIFT) | (0xe << PHY_CA_SR_SHIFT) |
+	(0 << PHY_CLK_SR_SHIFT),
+/* slew  ratee when odt disable */
+(0 << PHY_DQ_SR_SHIFT) | (0xe << PHY_CA_SR_SHIFT) |
+	(0 << PHY_CLK_SR_SHIFT),
+
+/* lpddr3 */
+(924 << DDR_FREQ_F0_SHIFT) | (330 << DDR_FREQ_F1_SHIFT),
+(528 << DDR_FREQ_F2_SHIFT) | (784 << DDR_FREQ_F3_SHIFT),
+(0 << DDR_FREQ_F4_SHIFT) | (0 << DDR_FREQ_F5_SHIFT),
+/* drv when odt on */
+(34 << PHY_DQ_DRV_SHIFT) | (44 << PHY_CA_DRV_SHIFT) |
+	(41 << PHY_CLK_DRV_SHIFT) | (34 << DRAM_DQ_DRV_SHIFT),
+/* drv when odt off */
+(49 << PHY_DQ_DRV_SHIFT) | (54 << PHY_CA_DRV_SHIFT) |
+	(44 << PHY_CLK_DRV_SHIFT) | (48 << DRAM_DQ_DRV_SHIFT),
+/* odt info */
+(240 << DRAM_ODT_SHIFT) | (247 << PHY_ODT_SHIFT) |
+	(1 << PHY_ODT_PUUP_EN_SHIFT) | (1 << PHY_ODT_PUDN_EN_SHIFT),
+/* odt enable freq */
+(333 << DRAM_ODT_EN_FREQ_SHIFT) | (333 << PHY_ODT_EN_FREQ_SHIFT),
+
+/* slew rate when odt enable */
+(0 << PHY_DQ_SR_SHIFT) | (0 << PHY_CA_SR_SHIFT) |
+	(0 << PHY_CLK_SR_SHIFT),
+/* slew  ratee when odt disable */
+(0 << PHY_DQ_SR_SHIFT) | (0 << PHY_CA_SR_SHIFT) |
+	(0 << PHY_CLK_SR_SHIFT),
+
+/* lpddr4 */
+(924 << DDR_FREQ_F0_SHIFT) | (330 << DDR_FREQ_F1_SHIFT),
+(528 << DDR_FREQ_F2_SHIFT) | (784 << DDR_FREQ_F3_SHIFT),
+(0 << DDR_FREQ_F4_SHIFT) | (0 << DDR_FREQ_F5_SHIFT),
+
+/* drv when odt on */
+(40 << PHY_DQ_DRV_SHIFT) | (40 << PHY_CA_DRV_SHIFT) |
+	(40 << PHY_CLK_DRV_SHIFT) | (40 << DRAM_DQ_DRV_SHIFT),
+/* drv when odt off */
+(40 << PHY_DQ_DRV_SHIFT) |
+	(40 << PHY_CA_DRV_SHIFT) | (40 << PHY_CLK_DRV_SHIFT) |
+	(80 << DRAM_DQ_DRV_SHIFT),
+/* odt info and PU-cal info */
+(240 << DRAM_ODT_SHIFT) | (120 << PHY_ODT_SHIFT) |
+	(0 << LP4_CA_ODT_SHIFT) |
+	(LPDDR4_VDDQ_2_5 << LP4_DRV_PU_CAL_ODTEN_SHIFT) |
+	(LPDDR4_VDDQ_2_5 << LP4_DRV_PU_CAL_ODTOFF_SHIFT) |
+	(0 << PHY_LP4_DRV_PULLDOWN_EN_ODTEN_SHIFT) |
+	(0 << PHY_LP4_DRV_PULLDOWN_EN_ODTOFF_SHIFT),
+/* odt enable freq */
+(333 << PHY_LP4_ODT_EN_FREQ_SHIFT) | (333 << LP4_DQ_ODT_EN_FREQ_SHIFT),
+/* slew rate when odt enable */
+(0 << PHY_DQ_SR_SHIFT) | (0xe << PHY_CA_SR_SHIFT) |
+	(0xe << PHY_CLK_SR_SHIFT),
+/* slew  ratee when odt disable */
+(0 << PHY_DQ_SR_SHIFT) | (0xe << PHY_CA_SR_SHIFT) |
+	(0xe << PHY_CLK_SR_SHIFT),
+/* ca odt en freq */
+(333 << LP4_CA_ODT_EN_FREQ_SHIFT),
+/* cs drv info and ca odt info */
+(0 << PHY_LP4_CS_DRV_ODTEN_SHIFT) |
+	(0 << PHY_LP4_CS_DRV_ODTOFF_SHIFT) |
+	(0 << LP4_ODTE_CK_SHIFT) | (0 << LP4_ODTE_CS_EN_SHIFT) |
+	(0 << LP4_ODTD_CA_EN_SHIFT),
+/* vref info when odt enable */
+(170 << PHY_LP4_DQ_VREF_SHIFT) | (420 << LP4_DQ_VREF_SHIFT) |
+	(420 << LP4_CA_VREF_SHIFT),
+/* vref info when odt disable */
+(420 << PHY_LP4_DQ_VREF_SHIFT) | (420 << LP4_DQ_VREF_SHIFT) |
+	(420 << LP4_CA_VREF_SHIFT),
+/* ddr4 map << 0 | ddr3 map << 24 */
+((0x2 << 6) | (0x1 << 4) | (0x3 << 2) | (0x0 << 0)) |
+	(0 << 8) | (0 << 16) |
+	(((0x2 << 6) | (0x1 << 4) | (0x3 << 2) | (0x0 << 0)) << 24),
+/* lp3 map << 16 | lp4 map << 24 */
+/* lp4 should equal to 0xc9 */
+(((0x3 << 6) | (0x2 << 4) | (0x1 << 2) | (0x0 << 0)) << 16) |
+	(((0x3 << 6) | (0x0 << 4) | (0x2 << 2) | (0x1 << 0)) << 24),
+/* lp3 dq0-7 map */
+(2 << 0) | (6 << 4) | (4 << 8) | (0 << 12) | (3 << 16) | (7 << 20) |
+	( 5 << 24) | (1 << 28),
+/* lp2 dq0-7 map */
+0,
+/* ddr4 dq map */
+/* cs0 dq0-15 */
+	((2 << 0 | 0 << 2 | 3 << 4 | 1 << 6) << 0) |
+	((0 << 0 | 2 << 2 | 3 << 4 | 1 << 6) << 8) |
+	((2 << 0 | 2 << 2 | 1 << 4 | 3 << 6) << 16) |
+	((1 << 0 | 3 << 2 | 0 << 4 | 0 << 6) << 24),
+/* cs0 dq16-31 */
+	((2 << 0 | 0 << 2 | 2 << 4 | 0 << 6) << 0) |
+	((1 << 0 | 3 << 2 | 3 << 4 | 1 << 6) << 8) |
+	((0 << 0 | 0 << 2 | 1 << 4 | 3 << 6) << 16) |
+	((1 << 0 | 3 << 2 | 2 << 4 | 2 << 6) << 24),
+/* cs1 dq0-15 */
+	((2 << 0 | 0 << 2 | 3 << 4 | 1 << 6) << 0) |
+	((0 << 0 | 2 << 2 | 3 << 4 | 1 << 6) << 8) |
+	((2 << 0 | 2 << 2 | 1 << 4 | 3 << 6) << 16) |
+	((1 << 0 | 3 << 2 | 0 << 4 | 0 << 6) << 24),
+/* cs1 dq16-31 */
+	((2 << 0 | 0 << 2 | 2 << 4 | 0 << 6) << 0) |
+	((1 << 0 | 3 << 2 | 3 << 4 | 1 << 6) << 8) |
+	((0 << 0 | 0 << 2 | 1 << 4 | 3 << 6) << 16) |
+	((1 << 0 | 3 << 2 | 2 << 4 | 2 << 6) << 24)
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-330.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-330.inc
new file mode 100644
index 0000000000..d99bf6fb7d
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-330.inc
@@ -0,0 +1,74 @@
+{
+	{
+		{
+			.rank = 0x1,
+			.col = 0xC,
+			.bk = 0x3,
+			.bw = 0x1,
+			.dbw = 0x0,
+			.row_3_4 = 0x0,
+			.cs0_row = 0x10,
+			.cs1_row = 0x10,
+			.cs0_high16bit_row = 0x10,
+			.cs1_high16bit_row = 0x10,
+			.ddrconfig = 0
+		},
+		{
+			{0x290a060a},
+			{0x08020303},
+			{0x00000002},
+			{0x00001111},
+			{0x0000000c},
+			{0x0000021a},
+			0x000000ff
+		}
+	},
+	{
+		.ddr_freq = 330,	/* clock rate(MHz) */
+		.dramtype = LPDDR3,
+		.num_channels = 1,
+		.stride = 0,
+		.odt = 0
+	},
+	{
+		{
+			{0x00000000, 0x43041008},	/* MSTR */
+			{0x00000064, 0x00140023},	/* RFSHTMG */
+			{0x000000d0, 0x00220002},	/* INIT0 */
+			{0x000000d4, 0x00010000},	/* INIT1 */
+			{0x000000d8, 0x00000703},	/* INIT2 */
+			{0x000000dc, 0x00830004},	/* INIT3 */
+			{0x000000e0, 0x00010000},	/* INIT4 */
+			{0x000000e4, 0x00070003},	/* INIT5 */
+			{0x000000f4, 0x000f011f},	/* RANKCTL */
+			{0x00000100, 0x06090b07},	/* DRAMTMG0 */
+			{0x00000104, 0x0002020b},	/* DRAMTMG1 */
+			{0x00000108, 0x02030506},	/* DRAMTMG2 */
+			{0x0000010c, 0x00505000},	/* DRAMTMG3 */
+			{0x00000110, 0x03020204},	/* DRAMTMG4 */
+			{0x00000114, 0x01010303},	/* DRAMTMG5 */
+			{0x00000118, 0x02020003},	/* DRAMTMG6 */
+			{0x00000120, 0x00000303},	/* DRAMTMG8 */
+			{0x00000138, 0x00000025},	/* DRAMTMG14 */
+			{0x00000180, 0x003c000f},	/* ZQCTL0 */
+			{0x00000184, 0x00900000},	/* ZQCTL1 */
+			{0x00000190, 0x07020000},	/* DFITMG0 */
+			{0x00000198, 0x07000101},	/* DFILPCFG0 */
+			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
+			{0x00000240, 0x0900090c},	/* ODTCFG */
+			{0x00000244, 0x00000101},	/* ODTMAP */
+			{0x00000250, 0x00001f00},	/* SCHED */
+			{0x00000490, 0x00000001},	/* PCTRL_0 */
+			{0xffffffff, 0xffffffff}
+		}
+	},
+	{
+		{
+			{0x00000004, 0x0000008b},	/* PHYREG01 */
+			{0x00000014, 0x00000006},	/* PHYREG05 */
+			{0x00000018, 0x00000000},	/* PHYREG06 */
+			{0x0000001c, 0x00000003},	/* PHYREG07 */
+			{0xffffffff, 0xffffffff}
+		}
+	}
+},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-396.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-396.inc
new file mode 100644
index 0000000000..fb1468e83b
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-396.inc
@@ -0,0 +1,74 @@
+{
+	{
+		{
+			.rank = 0x1,
+			.col = 0xC,
+			.bk = 0x3,
+			.bw = 0x1,
+			.dbw = 0x0,
+			.row_3_4 = 0x0,
+			.cs0_row = 0x10,
+			.cs1_row = 0x10,
+			.cs0_high16bit_row = 0x10,
+			.cs1_high16bit_row = 0x10,
+			.ddrconfig = 0
+		},
+		{
+			{0x2b0d080d},
+			{0x0a020303},
+			{0x00000002},
+			{0x00001111},
+			{0x0000000c},
+			{0x0000021a},
+			0x000000ff
+		}
+	},
+	{
+		.ddr_freq = 396,	/* clock rate(MHz) */
+		.dramtype = LPDDR3,
+		.num_channels = 1,
+		.stride = 0,
+		.odt = 0
+	},
+	{
+		{
+			{0x00000000, 0x43041008},	/* MSTR */
+			{0x00000064, 0x0018002a},	/* RFSHTMG */
+			{0x000000d0, 0x00280002},	/* INIT0 */
+			{0x000000d4, 0x00010000},	/* INIT1 */
+			{0x000000d8, 0x00000803},	/* INIT2 */
+			{0x000000dc, 0x00830004},	/* INIT3 */
+			{0x000000e0, 0x00010000},	/* INIT4 */
+			{0x000000e4, 0x00080003},	/* INIT5 */
+			{0x000000f4, 0x000f011f},	/* RANKCTL */
+			{0x00000100, 0x070a0d08},	/* DRAMTMG0 */
+			{0x00000104, 0x0002020d},	/* DRAMTMG1 */
+			{0x00000108, 0x02030606},	/* DRAMTMG2 */
+			{0x0000010c, 0x00505000},	/* DRAMTMG3 */
+			{0x00000110, 0x04020205},	/* DRAMTMG4 */
+			{0x00000114, 0x01010303},	/* DRAMTMG5 */
+			{0x00000118, 0x02020003},	/* DRAMTMG6 */
+			{0x00000120, 0x00000303},	/* DRAMTMG8 */
+			{0x00000138, 0x0000002c},	/* DRAMTMG14 */
+			{0x00000180, 0x00480012},	/* ZQCTL0 */
+			{0x00000184, 0x00a00000},	/* ZQCTL1 */
+			{0x00000190, 0x07020000},	/* DFITMG0 */
+			{0x00000198, 0x07000101},	/* DFILPCFG0 */
+			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
+			{0x00000240, 0x09000a0c},	/* ODTCFG */
+			{0x00000244, 0x00000101},	/* ODTMAP */
+			{0x00000250, 0x00001f00},	/* SCHED */
+			{0x00000490, 0x00000001},	/* PCTRL_0 */
+			{0xffffffff, 0xffffffff}
+		}
+	},
+	{
+		{
+			{0x00000004, 0x0000008b},	/* PHYREG01 */
+			{0x00000014, 0x00000006},	/* PHYREG05 */
+			{0x00000018, 0x00000000},	/* PHYREG06 */
+			{0x0000001c, 0x00000003},	/* PHYREG07 */
+			{0xffffffff, 0xffffffff}
+		}
+	}
+},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-528.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-528.inc
new file mode 100644
index 0000000000..d6df8fde6b
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-528.inc
@@ -0,0 +1,74 @@
+{
+	{
+		{
+			.rank = 0x1,
+			.col = 0xC,
+			.bk = 0x3,
+			.bw = 0x1,
+			.dbw = 0x0,
+			.row_3_4 = 0x0,
+			.cs0_row = 0x10,
+			.cs1_row = 0x10,
+			.cs0_high16bit_row = 0x10,
+			.cs1_high16bit_row = 0x10,
+			.ddrconfig = 0
+		},
+		{
+			{0x2f110b11},
+			{0x0d030404},
+			{0x00000002},
+			{0x00001111},
+			{0x0000000c},
+			{0x00000322},
+			0x000000ff
+		}
+	},
+	{
+		.ddr_freq = 528,	/* clock rate(MHz) */
+		.dramtype = LPDDR3,
+		.num_channels = 1,
+		.stride = 0,
+		.odt = 0
+	},
+	{
+		{
+			{0x00000000, 0x43041008},	/* MSTR */
+			{0x00000064, 0x00200038},	/* RFSHTMG */
+			{0x000000d0, 0x00350002},	/* INIT0 */
+			{0x000000d4, 0x00010000},	/* INIT1 */
+			{0x000000d8, 0x00000a03},	/* INIT2 */
+			{0x000000dc, 0x00c30006},	/* INIT3 */
+			{0x000000e0, 0x00010000},	/* INIT4 */
+			{0x000000e4, 0x000a0004},	/* INIT5 */
+			{0x000000f4, 0x000f011f},	/* RANKCTL */
+			{0x00000100, 0x080e120b},	/* DRAMTMG0 */
+			{0x00000104, 0x00020212},	/* DRAMTMG1 */
+			{0x00000108, 0x02040607},	/* DRAMTMG2 */
+			{0x0000010c, 0x00505000},	/* DRAMTMG3 */
+			{0x00000110, 0x05020307},	/* DRAMTMG4 */
+			{0x00000114, 0x01010404},	/* DRAMTMG5 */
+			{0x00000118, 0x02020003},	/* DRAMTMG6 */
+			{0x00000120, 0x00000303},	/* DRAMTMG8 */
+			{0x00000138, 0x0000003b},	/* DRAMTMG14 */
+			{0x00000180, 0x00600018},	/* ZQCTL0 */
+			{0x00000184, 0x00e00000},	/* ZQCTL1 */
+			{0x00000190, 0x07030001},	/* DFITMG0 */
+			{0x00000198, 0x07000101},	/* DFILPCFG0 */
+			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
+			{0x00000240, 0x09010918},	/* ODTCFG */
+			{0x00000244, 0x00000101},	/* ODTMAP */
+			{0x00000250, 0x00001f00},	/* SCHED */
+			{0x00000490, 0x00000001},	/* PCTRL_0 */
+			{0xffffffff, 0xffffffff}
+		}
+	},
+	{
+		{
+			{0x00000004, 0x0000008b},	/* PHYREG01 */
+			{0x00000014, 0x00000008},	/* PHYREG05 */
+			{0x00000018, 0x00000000},	/* PHYREG06 */
+			{0x0000001c, 0x00000004},	/* PHYREG07 */
+			{0xffffffff, 0xffffffff}
+		}
+	}
+},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-664.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-664.inc
new file mode 100644
index 0000000000..64557fc4a1
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-664.inc
@@ -0,0 +1,74 @@
+{
+	{
+		{
+			.rank = 0x1,
+			.col = 0xC,
+			.bk = 0x3,
+			.bw = 0x1,
+			.dbw = 0x0,
+			.row_3_4 = 0x0,
+			.cs0_row = 0x10,
+			.cs1_row = 0x10,
+			.cs0_high16bit_row = 0x10,
+			.cs1_high16bit_row = 0x10,
+			.ddrconfig = 0
+		},
+		{
+			{0x32150d15},
+			{0x11030504},
+			{0x00000002},
+			{0x00001111},
+			{0x0000000c},
+			{0x0000032a},
+			0x000000ff
+		}
+	},
+	{
+		.ddr_freq = 664,	/* clock rate(MHz) */
+		.dramtype = LPDDR3,
+		.num_channels = 1,
+		.stride = 0,
+		.odt = 1
+	},
+	{
+		{
+			{0x00000000, 0x43041008},	/* MSTR */
+			{0x00000064, 0x00280046},	/* RFSHTMG */
+			{0x000000d0, 0x00420002},	/* INIT0 */
+			{0x000000d4, 0x00010000},	/* INIT1 */
+			{0x000000d8, 0x00000c03},	/* INIT2 */
+			{0x000000dc, 0x00030018},	/* INIT3 */
+			{0x000000e0, 0x00010000},	/* INIT4 */
+			{0x000000e4, 0x000c0005},	/* INIT5 */
+			{0x000000f4, 0x000f011f},	/* RANKCTL */
+			{0x00000100, 0x0a11160e},	/* DRAMTMG0 */
+			{0x00000104, 0x00030215},	/* DRAMTMG1 */
+			{0x00000108, 0x03050708},	/* DRAMTMG2 */
+			{0x0000010c, 0x00505000},	/* DRAMTMG3 */
+			{0x00000110, 0x06020408},	/* DRAMTMG4 */
+			{0x00000114, 0x01010505},	/* DRAMTMG5 */
+			{0x00000118, 0x02020004},	/* DRAMTMG6 */
+			{0x00000120, 0x00000404},	/* DRAMTMG8 */
+			{0x00000138, 0x0000004a},	/* DRAMTMG14 */
+			{0x00000180, 0x0078001e},	/* ZQCTL0 */
+			{0x00000184, 0x01100000},	/* ZQCTL1 */
+			{0x00000190, 0x07040002},	/* DFITMG0 */
+			{0x00000198, 0x07000101},	/* DFILPCFG0 */
+			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
+			{0x00000240, 0x0a020b1c},	/* ODTCFG */
+			{0x00000244, 0x00000101},	/* ODTMAP */
+			{0x00000250, 0x00001f00},	/* SCHED */
+			{0x00000490, 0x00000001},	/* PCTRL_0 */
+			{0xffffffff, 0xffffffff}
+		}
+	},
+	{
+		{
+			{0x00000004, 0x0000008b},	/* PHYREG01 */
+			{0x00000014, 0x0000000a},	/* PHYREG05 */
+			{0x00000018, 0x00000000},	/* PHYREG06 */
+			{0x0000001c, 0x00000006},	/* PHYREG07 */
+			{0xffffffff, 0xffffffff}
+		}
+	}
+},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-784.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-784.inc
new file mode 100644
index 0000000000..fa5d142e4d
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-784.inc
@@ -0,0 +1,74 @@
+{
+	{
+		{
+			.rank = 0x1,
+			.col = 0xC,
+			.bk = 0x3,
+			.bw = 0x1,
+			.dbw = 0x0,
+			.row_3_4 = 0x0,
+			.cs0_row = 0x10,
+			.cs1_row = 0x10,
+			.cs0_high16bit_row = 0x10,
+			.cs1_high16bit_row = 0x10,
+			.ddrconfig = 0
+		},
+		{
+			{0x36191119},
+			{0x14040606},
+			{0x00000002},
+			{0x00001111},
+			{0x0000000c},
+			{0x00000432},
+			0x000000ff
+		}
+	},
+	{
+		.ddr_freq = 784,	/* clock rate(MHz) */
+		.dramtype = LPDDR3,
+		.num_channels = 1,
+		.stride = 0,
+		.odt = 1
+	},
+	{
+		{
+			{0x00000000, 0x43041008},	/* MSTR */
+			{0x00000064, 0x002f0053},	/* RFSHTMG */
+			{0x000000d0, 0x004e0002},	/* INIT0 */
+			{0x000000d4, 0x00010000},	/* INIT1 */
+			{0x000000d8, 0x00000e03},	/* INIT2 */
+			{0x000000dc, 0x0043001a},	/* INIT3 */
+			{0x000000e0, 0x00010000},	/* INIT4 */
+			{0x000000e4, 0x000e0005},	/* INIT5 */
+			{0x000000f4, 0x000f011f},	/* RANKCTL */
+			{0x00000100, 0x0b141a10},	/* DRAMTMG0 */
+			{0x00000104, 0x00030319},	/* DRAMTMG1 */
+			{0x00000108, 0x03060809},	/* DRAMTMG2 */
+			{0x0000010c, 0x00606000},	/* DRAMTMG3 */
+			{0x00000110, 0x08020409},	/* DRAMTMG4 */
+			{0x00000114, 0x01010606},	/* DRAMTMG5 */
+			{0x00000118, 0x02020004},	/* DRAMTMG6 */
+			{0x00000120, 0x00000404},	/* DRAMTMG8 */
+			{0x00000138, 0x00000057},	/* DRAMTMG14 */
+			{0x00000180, 0x008e0024},	/* ZQCTL0 */
+			{0x00000184, 0x01400000},	/* ZQCTL1 */
+			{0x00000190, 0x07050002},	/* DFITMG0 */
+			{0x00000198, 0x07000101},	/* DFILPCFG0 */
+			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
+			{0x00000240, 0x0a020c24},	/* ODTCFG */
+			{0x00000244, 0x00000101},	/* ODTMAP */
+			{0x00000250, 0x00001f00},	/* SCHED */
+			{0x00000490, 0x00000001},	/* PCTRL_0 */
+			{0xffffffff, 0xffffffff}
+		}
+	},
+	{
+		{
+			{0x00000004, 0x0000008b},	/* PHYREG01 */
+			{0x00000014, 0x0000000c},	/* PHYREG05 */
+			{0x00000018, 0x00000000},	/* PHYREG06 */
+			{0x0000001c, 0x00000006},	/* PHYREG07 */
+			{0xffffffff, 0xffffffff}
+		}
+	}
+},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-924.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-924.inc
new file mode 100644
index 0000000000..5ac7700482
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-924.inc
@@ -0,0 +1,74 @@
+{
+	{
+		{
+			.rank = 0x1,
+			.col = 0xC,
+			.bk = 0x3,
+			.bw = 0x1,
+			.dbw = 0x0,
+			.row_3_4 = 0x0,
+			.cs0_row = 0x10,
+			.cs1_row = 0x10,
+			.cs0_high16bit_row = 0x10,
+			.cs1_high16bit_row = 0x10,
+			.ddrconfig = 0
+		},
+		{
+			{0x391d141d},
+			{0x17050706},
+			{0x00000002},
+			{0x00001111},
+			{0x0000000c},
+			{0x0000053a},
+			0x000000ff
+		}
+	},
+	{
+		.ddr_freq = 924,	/* clock rate(MHz) */
+		.dramtype = LPDDR3,
+		.num_channels = 1,
+		.stride = 0,
+		.odt = 1
+	},
+	{
+		{
+			{0x00000000, 0x43041008},	/* MSTR */
+			{0x00000064, 0x00380062},	/* RFSHTMG */
+			{0x000000d0, 0x005c0002},	/* INIT0 */
+			{0x000000d4, 0x00010000},	/* INIT1 */
+			{0x000000d8, 0x00001003},	/* INIT2 */
+			{0x000000dc, 0x0083001c},	/* INIT3 */
+			{0x000000e0, 0x00010000},	/* INIT4 */
+			{0x000000e4, 0x00100006},	/* INIT5 */
+			{0x000000f4, 0x000f011f},	/* RANKCTL */
+			{0x00000100, 0x0d181f13},	/* DRAMTMG0 */
+			{0x00000104, 0x0004031e},	/* DRAMTMG1 */
+			{0x00000108, 0x0407090a},	/* DRAMTMG2 */
+			{0x0000010c, 0x00707000},	/* DRAMTMG3 */
+			{0x00000110, 0x0902050b},	/* DRAMTMG4 */
+			{0x00000114, 0x01010707},	/* DRAMTMG5 */
+			{0x00000118, 0x02020005},	/* DRAMTMG6 */
+			{0x00000120, 0x00000505},	/* DRAMTMG8 */
+			{0x00000138, 0x00000066},	/* DRAMTMG14 */
+			{0x00000180, 0x00a7002a},	/* ZQCTL0 */
+			{0x00000184, 0x01800000},	/* ZQCTL1 */
+			{0x00000190, 0x07060003},	/* DFITMG0 */
+			{0x00000198, 0x07000101},	/* DFILPCFG0 */
+			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
+			{0x00000240, 0x0b030d2c},	/* ODTCFG */
+			{0x00000244, 0x00000101},	/* ODTMAP */
+			{0x00000250, 0x00001f00},	/* SCHED */
+			{0x00000490, 0x00000001},	/* PCTRL_0 */
+			{0xffffffff, 0xffffffff}
+		}
+	},
+	{
+		{
+			{0x00000004, 0x0000008b},	/* PHYREG01 */
+			{0x00000014, 0x0000000e},	/* PHYREG05 */
+			{0x00000018, 0x00000000},	/* PHYREG06 */
+			{0x0000001c, 0x00000008},	/* PHYREG07 */
+			{0xffffffff, 0xffffffff}
+		}
+	}
+},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-1056.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-1056.inc
new file mode 100644
index 0000000000..0f9624a18a
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-1056.inc
@@ -0,0 +1,78 @@
+{
+	{
+		{
+			.rank = 0x1,
+			.col = 0xB,
+			.bk = 0x3,
+			.bw = 0x1,
+			.dbw = 0x1,
+			.row_3_4 = 0x0,
+			.cs0_row = 0x11,
+			.cs1_row = 0x11,
+			.cs0_high16bit_row = 0x0,
+			.cs1_high16bit_row = 0x0,
+			.ddrconfig = 0
+		},
+		{
+			{0x41241522},
+			{0x15050a07},
+			{0x00000002},
+			{0x00001111},
+			{0x0000000c},
+			{0x00000554},
+			0x000000ff
+		}
+	},
+	{
+		.ddr_freq = 1056,	/* clock rate(MHz) */
+		.dramtype = LPDDR4,
+		.num_channels = 1,
+		.stride = 0,
+		.odt = 1
+	},
+	{
+		{
+			{0x00000000, 0x81081020},	/* MSTR */
+			{0x00000064, 0x00400094},	/* RFSHTMG */
+			{0x000000d0, 0x00030409},	/* INIT0 */
+			{0x000000d4, 0x00690000},	/* INIT1 */
+			{0x000000d8, 0x00000206},	/* INIT2 */
+			{0x000000dc, 0x0034001b},	/* INIT3 */
+			{0x000000e0, 0x00310000},	/* INIT4 */
+			{0x000000e8, 0x00110000},	/* INIT6 */
+			{0x000000ec, 0x00000000},	/* INIT7 */
+			{0x000000f4, 0x000f033f},	/* RANKCTL */
+			{0x00000100, 0x14161217},	/* DRAMTMG0 */
+			{0x00000104, 0x00040422},	/* DRAMTMG1 */
+			{0x00000108, 0x050a0e0f},	/* DRAMTMG2 */
+			{0x0000010c, 0x00808000},	/* DRAMTMG3 */
+			{0x00000110, 0x0a04060c},	/* DRAMTMG4 */
+			{0x00000114, 0x02040808},	/* DRAMTMG5 */
+			{0x00000118, 0x01010005},	/* DRAMTMG6 */
+			{0x0000011c, 0x00000401},	/* DRAMTMG7 */
+			{0x00000120, 0x00000606},	/* DRAMTMG8 */
+			{0x00000130, 0x00020000},	/* DRAMTMG12 */
+			{0x00000134, 0x0a100002},	/* DRAMTMG13 */
+			{0x00000138, 0x00000098},	/* DRAMTMG14 */
+			{0x00000180, 0x02100210},	/* ZQCTL0 */
+			{0x00000184, 0x01b00000},	/* ZQCTL1 */
+			{0x00000190, 0x07070001},	/* DFITMG0 */
+			{0x00000198, 0x07000101},	/* DFILPCFG0 */
+			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
+			{0x00000240, 0x0b050d3c},	/* ODTCFG */
+			{0x00000244, 0x00000101},	/* ODTMAP */
+			{0x00000250, 0x00001f00},	/* SCHED */
+			{0x00000490, 0x00000001},	/* PCTRL_0 */
+			{0xffffffff, 0xffffffff}
+		}
+	},
+	{
+		{
+			{0x00000004, 0x0000008d},	/* PHYREG01 */
+			{0x00000014, 0x00000014},	/* PHYREG05 */
+			{0x00000018, 0x00000000},	/* PHYREG06 */
+			{0x0000001c, 0x0000000a},	/* PHYREG07 */
+			{0xffffffff, 0xffffffff}
+		}
+	}
+},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-330.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-330.inc
new file mode 100644
index 0000000000..bed48dd948
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-330.inc
@@ -0,0 +1,78 @@
+{
+	{
+		{
+			.rank = 0x1,
+			.col = 0xB,
+			.bk = 0x3,
+			.bw = 0x1,
+			.dbw = 0x1,
+			.row_3_4 = 0x0,
+			.cs0_row = 0x11,
+			.cs1_row = 0x11,
+			.cs0_high16bit_row = 0x0,
+			.cs1_high16bit_row = 0x0,
+			.ddrconfig = 0
+		},
+		{
+			{0x2f0d060a},
+			{0x07020804},
+			{0x00000002},
+			{0x00001111},
+			{0x0000000c},
+			{0x00000244},
+			0x000000ff
+		}
+	},
+	{
+		.ddr_freq = 330,	/* clock rate(MHz) */
+		.dramtype = LPDDR4,
+		.num_channels = 1,
+		.stride = 0,
+		.odt = 0
+	},
+	{
+		{
+			{0x00000000, 0x81081020},	/* MSTR */
+			{0x00000064, 0x0014002f},	/* RFSHTMG */
+			{0x000000d0, 0x00020144},	/* INIT0 */
+			{0x000000d4, 0x00220000},	/* INIT1 */
+			{0x000000d8, 0x00000202},	/* INIT2 */
+			{0x000000dc, 0x00240012},	/* INIT3 */
+			{0x000000e0, 0x00310000},	/* INIT4 */
+			{0x000000e8, 0x00100000},	/* INIT6 */
+			{0x000000ec, 0x00000000},	/* INIT7 */
+			{0x000000f4, 0x000f033f},	/* RANKCTL */
+			{0x00000100, 0x0c070507},	/* DRAMTMG0 */
+			{0x00000104, 0x0003040b},	/* DRAMTMG1 */
+			{0x00000108, 0x04070c0d},	/* DRAMTMG2 */
+			{0x0000010c, 0x00505000},	/* DRAMTMG3 */
+			{0x00000110, 0x03040204},	/* DRAMTMG4 */
+			{0x00000114, 0x02030303},	/* DRAMTMG5 */
+			{0x00000118, 0x01010004},	/* DRAMTMG6 */
+			{0x0000011c, 0x00000301},	/* DRAMTMG7 */
+			{0x00000120, 0x00000303},	/* DRAMTMG8 */
+			{0x00000130, 0x00020000},	/* DRAMTMG12 */
+			{0x00000134, 0x00100002},	/* DRAMTMG13 */
+			{0x00000138, 0x00000030},	/* DRAMTMG14 */
+			{0x00000180, 0x00a500a5},	/* ZQCTL0 */
+			{0x00000184, 0x00900000},	/* ZQCTL1 */
+			{0x00000190, 0x07040000},	/* DFITMG0 */
+			{0x00000198, 0x07000101},	/* DFILPCFG0 */
+			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
+			{0x00000240, 0x0905092c},	/* ODTCFG */
+			{0x00000244, 0x00000101},	/* ODTMAP */
+			{0x00000250, 0x00001f00},	/* SCHED */
+			{0x00000490, 0x00000001},	/* PCTRL_0 */
+			{0xffffffff, 0xffffffff}
+		}
+	},
+	{
+		{
+			{0x00000004, 0x0000008d},	/* PHYREG01 */
+			{0x00000014, 0x0000000e},	/* PHYREG05 */
+			{0x00000018, 0x00000000},	/* PHYREG06 */
+			{0x0000001c, 0x00000008},	/* PHYREG07 */
+			{0xffffffff, 0xffffffff}
+		}
+	}
+},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-396.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-396.inc
new file mode 100644
index 0000000000..c83f5090dd
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-396.inc
@@ -0,0 +1,78 @@
+{
+	{
+		{
+			.rank = 0x1,
+			.col = 0xB,
+			.bk = 0x3,
+			.bw = 0x1,
+			.dbw = 0x1,
+			.row_3_4 = 0x0,
+			.cs0_row = 0x11,
+			.cs1_row = 0x11,
+			.cs0_high16bit_row = 0x0,
+			.cs1_high16bit_row = 0x0,
+			.ddrconfig = 0
+		},
+		{
+			{0x3110080d},
+			{0x08020804},
+			{0x00000002},
+			{0x00001111},
+			{0x0000000c},
+			{0x00000244},
+			0x000000ff
+		}
+	},
+	{
+		.ddr_freq = 396,	/* clock rate(MHz) */
+		.dramtype = LPDDR4,
+		.num_channels = 1,
+		.stride = 0,
+		.odt = 0
+	},
+	{
+		{
+			{0x00000000, 0x81081020},	/* MSTR */
+			{0x00000064, 0x00180038},	/* RFSHTMG */
+			{0x000000d0, 0x00020184},	/* INIT0 */
+			{0x000000d4, 0x00280000},	/* INIT1 */
+			{0x000000d8, 0x00000202},	/* INIT2 */
+			{0x000000dc, 0x00240012},	/* INIT3 */
+			{0x000000e0, 0x00310000},	/* INIT4 */
+			{0x000000e8, 0x00100000},	/* INIT6 */
+			{0x000000ec, 0x00000000},	/* INIT7 */
+			{0x000000f4, 0x000f033f},	/* RANKCTL */
+			{0x00000100, 0x0d080609},	/* DRAMTMG0 */
+			{0x00000104, 0x0003040d},	/* DRAMTMG1 */
+			{0x00000108, 0x04070c0d},	/* DRAMTMG2 */
+			{0x0000010c, 0x00505000},	/* DRAMTMG3 */
+			{0x00000110, 0x04040205},	/* DRAMTMG4 */
+			{0x00000114, 0x02030303},	/* DRAMTMG5 */
+			{0x00000118, 0x01010004},	/* DRAMTMG6 */
+			{0x0000011c, 0x00000301},	/* DRAMTMG7 */
+			{0x00000120, 0x00000303},	/* DRAMTMG8 */
+			{0x00000130, 0x00020000},	/* DRAMTMG12 */
+			{0x00000134, 0x00100002},	/* DRAMTMG13 */
+			{0x00000138, 0x00000039},	/* DRAMTMG14 */
+			{0x00000180, 0x00c600c6},	/* ZQCTL0 */
+			{0x00000184, 0x00a00000},	/* ZQCTL1 */
+			{0x00000190, 0x07040000},	/* DFITMG0 */
+			{0x00000198, 0x07000101},	/* DFILPCFG0 */
+			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
+			{0x00000240, 0x0905092c},	/* ODTCFG */
+			{0x00000244, 0x00000101},	/* ODTMAP */
+			{0x00000250, 0x00001f00},	/* SCHED */
+			{0x00000490, 0x00000001},	/* PCTRL_0 */
+			{0xffffffff, 0xffffffff}
+		}
+	},
+	{
+		{
+			{0x00000004, 0x0000008d},	/* PHYREG01 */
+			{0x00000014, 0x0000000e},	/* PHYREG05 */
+			{0x00000018, 0x00000000},	/* PHYREG06 */
+			{0x0000001c, 0x00000008},	/* PHYREG07 */
+			{0xffffffff, 0xffffffff}
+		}
+	}
+},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-528.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-528.inc
new file mode 100644
index 0000000000..e54edd3219
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-528.inc
@@ -0,0 +1,78 @@
+{
+	{
+		{
+			.rank = 0x1,
+			.col = 0xB,
+			.bk = 0x3,
+			.bw = 0x1,
+			.dbw = 0x1,
+			.row_3_4 = 0x0,
+			.cs0_row = 0x11,
+			.cs1_row = 0x11,
+			.cs0_high16bit_row = 0x0,
+			.cs1_high16bit_row = 0x0,
+			.ddrconfig = 0
+		},
+		{
+			{0x34140b11},
+			{0x0b030804},
+			{0x00000002},
+			{0x00001111},
+			{0x0000000c},
+			{0x00000344},
+			0x000000ff
+		}
+	},
+	{
+		.ddr_freq = 528,	/* clock rate(MHz) */
+		.dramtype = LPDDR4,
+		.num_channels = 1,
+		.stride = 0,
+		.odt = 0
+	},
+	{
+		{
+			{0x00000000, 0x81081020},	/* MSTR */
+			{0x00000064, 0x0020004a},	/* RFSHTMG */
+			{0x000000d0, 0x00020205},	/* INIT0 */
+			{0x000000d4, 0x00350000},	/* INIT1 */
+			{0x000000d8, 0x00000203},	/* INIT2 */
+			{0x000000dc, 0x00240012},	/* INIT3 */
+			{0x000000e0, 0x00310000},	/* INIT4 */
+			{0x000000e8, 0x00100000},	/* INIT6 */
+			{0x000000ec, 0x00000000},	/* INIT7 */
+			{0x000000f4, 0x000f033f},	/* RANKCTL */
+			{0x00000100, 0x0e0b090c},	/* DRAMTMG0 */
+			{0x00000104, 0x00030412},	/* DRAMTMG1 */
+			{0x00000108, 0x04070c0d},	/* DRAMTMG2 */
+			{0x0000010c, 0x00505000},	/* DRAMTMG3 */
+			{0x00000110, 0x05040306},	/* DRAMTMG4 */
+			{0x00000114, 0x02030404},	/* DRAMTMG5 */
+			{0x00000118, 0x01010004},	/* DRAMTMG6 */
+			{0x0000011c, 0x00000301},	/* DRAMTMG7 */
+			{0x00000120, 0x00000404},	/* DRAMTMG8 */
+			{0x00000130, 0x00020000},	/* DRAMTMG12 */
+			{0x00000134, 0x00100002},	/* DRAMTMG13 */
+			{0x00000138, 0x0000004c},	/* DRAMTMG14 */
+			{0x00000180, 0x01080108},	/* ZQCTL0 */
+			{0x00000184, 0x00e00000},	/* ZQCTL1 */
+			{0x00000190, 0x07040000},	/* DFITMG0 */
+			{0x00000198, 0x07000101},	/* DFILPCFG0 */
+			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
+			{0x00000240, 0x0905092c},	/* ODTCFG */
+			{0x00000244, 0x00000101},	/* ODTMAP */
+			{0x00000250, 0x00001f00},	/* SCHED */
+			{0x00000490, 0x00000001},	/* PCTRL_0 */
+			{0xffffffff, 0xffffffff}
+		}
+	},
+	{
+		{
+			{0x00000004, 0x0000008d},	/* PHYREG01 */
+			{0x00000014, 0x0000000e},	/* PHYREG05 */
+			{0x00000018, 0x00000000},	/* PHYREG06 */
+			{0x0000001c, 0x00000008},	/* PHYREG07 */
+			{0xffffffff, 0xffffffff}
+		}
+	}
+},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-664.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-664.inc
new file mode 100644
index 0000000000..a4b885d2cb
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-664.inc
@@ -0,0 +1,78 @@
+{
+	{
+		{
+			.rank = 0x1,
+			.col = 0xB,
+			.bk = 0x3,
+			.bw = 0x1,
+			.dbw = 0x1,
+			.row_3_4 = 0x0,
+			.cs0_row = 0x11,
+			.cs1_row = 0x11,
+			.cs0_high16bit_row = 0x0,
+			.cs1_high16bit_row = 0x0,
+			.ddrconfig = 0
+		},
+		{
+			{0x36170d15},
+			{0x0d030805},
+			{0x00000002},
+			{0x00001111},
+			{0x0000000c},
+			{0x00000344},
+			0x000000ff
+		}
+	},
+	{
+		.ddr_freq = 664,	/* clock rate(MHz) */
+		.dramtype = LPDDR4,
+		.num_channels = 1,
+		.stride = 0,
+		.odt = 1
+	},
+	{
+		{
+			{0x00000000, 0x81081020},	/* MSTR */
+			{0x00000064, 0x0028005d},	/* RFSHTMG */
+			{0x000000d0, 0x0002028a},	/* INIT0 */
+			{0x000000d4, 0x00420000},	/* INIT1 */
+			{0x000000d8, 0x00000204},	/* INIT2 */
+			{0x000000dc, 0x00240012},	/* INIT3 */
+			{0x000000e0, 0x00310000},	/* INIT4 */
+			{0x000000e8, 0x00110000},	/* INIT6 */
+			{0x000000ec, 0x00000000},	/* INIT7 */
+			{0x000000f4, 0x000f033f},	/* RANKCTL */
+			{0x00000100, 0x0f0e0b0e},	/* DRAMTMG0 */
+			{0x00000104, 0x00030415},	/* DRAMTMG1 */
+			{0x00000108, 0x04070d0d},	/* DRAMTMG2 */
+			{0x0000010c, 0x00505000},	/* DRAMTMG3 */
+			{0x00000110, 0x06040407},	/* DRAMTMG4 */
+			{0x00000114, 0x02030505},	/* DRAMTMG5 */
+			{0x00000118, 0x01010004},	/* DRAMTMG6 */
+			{0x0000011c, 0x00000301},	/* DRAMTMG7 */
+			{0x00000120, 0x00000404},	/* DRAMTMG8 */
+			{0x00000130, 0x00020000},	/* DRAMTMG12 */
+			{0x00000134, 0x00100002},	/* DRAMTMG13 */
+			{0x00000138, 0x00000060},	/* DRAMTMG14 */
+			{0x00000180, 0x014c014c},	/* ZQCTL0 */
+			{0x00000184, 0x01100000},	/* ZQCTL1 */
+			{0x00000190, 0x07040000},	/* DFITMG0 */
+			{0x00000198, 0x07000101},	/* DFILPCFG0 */
+			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
+			{0x00000240, 0x0a040b28},	/* ODTCFG */
+			{0x00000244, 0x00000101},	/* ODTMAP */
+			{0x00000250, 0x00001f00},	/* SCHED */
+			{0x00000490, 0x00000001},	/* PCTRL_0 */
+			{0xffffffff, 0xffffffff}
+		}
+	},
+	{
+		{
+			{0x00000004, 0x0000008d},	/* PHYREG01 */
+			{0x00000014, 0x0000000e},	/* PHYREG05 */
+			{0x00000018, 0x00000000},	/* PHYREG06 */
+			{0x0000001c, 0x00000008},	/* PHYREG07 */
+			{0xffffffff, 0xffffffff}
+		}
+	}
+},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-784.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-784.inc
new file mode 100644
index 0000000000..eb7a6bd047
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-784.inc
@@ -0,0 +1,78 @@
+{
+	{
+		{
+			.rank = 0x1,
+			.col = 0xB,
+			.bk = 0x3,
+			.bw = 0x1,
+			.dbw = 0x1,
+			.row_3_4 = 0x0,
+			.cs0_row = 0x11,
+			.cs1_row = 0x11,
+			.cs0_high16bit_row = 0x0,
+			.cs1_high16bit_row = 0x0,
+			.ddrconfig = 0
+		},
+		{
+			{0x391b1019},
+			{0x10040805},
+			{0x00000002},
+			{0x00001111},
+			{0x0000000c},
+			{0x00000444},
+			0x000000ff
+		}
+	},
+	{
+		.ddr_freq = 784,	/* clock rate(MHz) */
+		.dramtype = LPDDR4,
+		.num_channels = 1,
+		.stride = 0,
+		.odt = 1
+	},
+	{
+		{
+			{0x00000000, 0x81081020},	/* MSTR */
+			{0x00000064, 0x002f006e},	/* RFSHTMG */
+			{0x000000d0, 0x000202ff},	/* INIT0 */
+			{0x000000d4, 0x004e0000},	/* INIT1 */
+			{0x000000d8, 0x00000204},	/* INIT2 */
+			{0x000000dc, 0x00240012},	/* INIT3 */
+			{0x000000e0, 0x00310000},	/* INIT4 */
+			{0x000000e8, 0x00110000},	/* INIT6 */
+			{0x000000ec, 0x00000000},	/* INIT7 */
+			{0x000000f4, 0x000f033f},	/* RANKCTL */
+			{0x00000100, 0x10100d11},	/* DRAMTMG0 */
+			{0x00000104, 0x00030419},	/* DRAMTMG1 */
+			{0x00000108, 0x04070c0d},	/* DRAMTMG2 */
+			{0x0000010c, 0x00606000},	/* DRAMTMG3 */
+			{0x00000110, 0x08040409},	/* DRAMTMG4 */
+			{0x00000114, 0x02030606},	/* DRAMTMG5 */
+			{0x00000118, 0x01010004},	/* DRAMTMG6 */
+			{0x0000011c, 0x00000301},	/* DRAMTMG7 */
+			{0x00000120, 0x00000505},	/* DRAMTMG8 */
+			{0x00000130, 0x00020000},	/* DRAMTMG12 */
+			{0x00000134, 0x00100002},	/* DRAMTMG13 */
+			{0x00000138, 0x00000071},	/* DRAMTMG14 */
+			{0x00000180, 0x01880188},	/* ZQCTL0 */
+			{0x00000184, 0x01400000},	/* ZQCTL1 */
+			{0x00000190, 0x07040000},	/* DFITMG0 */
+			{0x00000198, 0x07000101},	/* DFILPCFG0 */
+			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
+			{0x00000240, 0x0a040b28},	/* ODTCFG */
+			{0x00000244, 0x00000101},	/* ODTMAP */
+			{0x00000250, 0x00001f00},	/* SCHED */
+			{0x00000490, 0x00000001},	/* PCTRL_0 */
+			{0xffffffff, 0xffffffff}
+		}
+	},
+	{
+		{
+			{0x00000004, 0x0000008d},	/* PHYREG01 */
+			{0x00000014, 0x0000000e},	/* PHYREG05 */
+			{0x00000018, 0x00000000},	/* PHYREG06 */
+			{0x0000001c, 0x00000008},	/* PHYREG07 */
+			{0xffffffff, 0xffffffff}
+		}
+	}
+},
diff --git a/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-924.inc b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-924.inc
new file mode 100644
index 0000000000..a40cca12a2
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-924.inc
@@ -0,0 +1,78 @@
+{
+	{
+		{
+			.rank = 0x1,
+			.col = 0xB,
+			.bk = 0x3,
+			.bw = 0x1,
+			.dbw = 0x1,
+			.row_3_4 = 0x0,
+			.cs0_row = 0x11,
+			.cs1_row = 0x11,
+			.cs0_high16bit_row = 0x0,
+			.cs1_high16bit_row = 0x0,
+			.ddrconfig = 0
+		},
+		{
+			{0x3e20121d},
+			{0x12050a07},
+			{0x00000002},
+			{0x00001111},
+			{0x0000000c},
+			{0x00000554},
+			0x000000ff
+		}
+	},
+	{
+		.ddr_freq = 924,	/* clock rate(MHz) */
+		.dramtype = LPDDR4,
+		.num_channels = 1,
+		.stride = 0,
+		.odt = 1
+	},
+	{
+		{
+			{0x00000000, 0x81081020},	/* MSTR */
+			{0x00000064, 0x00380082},	/* RFSHTMG */
+			{0x000000d0, 0x00020388},	/* INIT0 */
+			{0x000000d4, 0x005c0000},	/* INIT1 */
+			{0x000000d8, 0x00000205},	/* INIT2 */
+			{0x000000dc, 0x0034001b},	/* INIT3 */
+			{0x000000e0, 0x00310000},	/* INIT4 */
+			{0x000000e8, 0x00110000},	/* INIT6 */
+			{0x000000ec, 0x00000000},	/* INIT7 */
+			{0x000000f4, 0x000f033f},	/* RANKCTL */
+			{0x00000100, 0x12130f14},	/* DRAMTMG0 */
+			{0x00000104, 0x0004041e},	/* DRAMTMG1 */
+			{0x00000108, 0x050a0e0f},	/* DRAMTMG2 */
+			{0x0000010c, 0x00707000},	/* DRAMTMG3 */
+			{0x00000110, 0x0904050a},	/* DRAMTMG4 */
+			{0x00000114, 0x02040707},	/* DRAMTMG5 */
+			{0x00000118, 0x01010005},	/* DRAMTMG6 */
+			{0x0000011c, 0x00000401},	/* DRAMTMG7 */
+			{0x00000120, 0x00000606},	/* DRAMTMG8 */
+			{0x00000130, 0x00020000},	/* DRAMTMG12 */
+			{0x00000134, 0x0a100002},	/* DRAMTMG13 */
+			{0x00000138, 0x00000085},	/* DRAMTMG14 */
+			{0x00000180, 0x01ce01ce},	/* ZQCTL0 */
+			{0x00000184, 0x01800000},	/* ZQCTL1 */
+			{0x00000190, 0x07070001},	/* DFITMG0 */
+			{0x00000198, 0x07000101},	/* DFILPCFG0 */
+			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
+			{0x00000240, 0x0b050d3c},	/* ODTCFG */
+			{0x00000244, 0x00000101},	/* ODTMAP */
+			{0x00000250, 0x00001f00},	/* SCHED */
+			{0x00000490, 0x00000001},	/* PCTRL_0 */
+			{0xffffffff, 0xffffffff}
+		}
+	},
+	{
+		{
+			{0x00000004, 0x0000008d},	/* PHYREG01 */
+			{0x00000014, 0x00000014},	/* PHYREG05 */
+			{0x00000018, 0x00000000},	/* PHYREG06 */
+			{0x0000001c, 0x0000000a},	/* PHYREG07 */
+			{0xffffffff, 0xffffffff}
+		}
+	}
+},
diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
new file mode 100644
index 0000000000..c949bfed83
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -0,0 +1,3028 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * (C) Copyright 2020 Rockchip Electronics Co., Ltd.
+ */
+
+#include <common.h>
+#include <debug_uart.h>
+#include <dm.h>
+#include <ram.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/rk_atags.h>
+#include <asm/arch/cru_rv1126.h>
+#include <asm/arch/grf_rv1126.h>
+#include <asm/arch/sdram_common.h>
+#include <asm/arch/sdram_rv1126.h>
+
+/* define training flag */
+#define CA_TRAINING			(0x1 << 0)
+#define READ_GATE_TRAINING		(0x1 << 1)
+#define WRITE_LEVELING			(0x1 << 2)
+#define WRITE_TRAINING			(0x1 << 3)
+#define READ_TRAINING			(0x1 << 4)
+#define FULL_TRAINING			(0xff)
+
+#define SKEW_RX_SIGNAL			(0)
+#define SKEW_TX_SIGNAL			(1)
+#define SKEW_CA_SIGNAL			(2)
+
+#define DESKEW_MDF_ABS_VAL		(0)
+#define DESKEW_MDF_DIFF_VAL		(1)
+
+#ifdef CONFIG_TPL_BUILD
+#ifndef CONFIG_TPL_TINY_FRAMEWORK
+#error please defined CONFIG_TPL_TINY_FRAMEWORK for RV1126 !!!
+#endif
+#endif
+
+#ifdef CONFIG_TPL_BUILD
+
+struct dram_info {
+	void __iomem *pctl;
+	void __iomem *phy;
+	struct rv1126_cru *cru;
+	struct msch_regs *msch;
+	struct rv1126_ddrgrf *ddrgrf;
+	struct rv1126_grf *grf;
+	struct ram_info info;
+	struct rv1126_pmugrf *pmugrf;
+	u32 sr_idle;
+	u32 pd_idle;
+};
+
+#define GRF_BASE_ADDR			0xfe000000
+#define PMU_GRF_BASE_ADDR		0xfe020000
+#define DDR_GRF_BASE_ADDR		0xfe030000
+#define BUS_SGRF_BASE_ADDR		0xfe0a0000
+#define SERVER_MSCH_BASE_ADDR		0xfe800000
+#define CRU_BASE_ADDR			0xff490000
+#define DDR_PHY_BASE_ADDR		0xff4a0000
+#define UPCTL2_BASE_ADDR		0xffa50000
+
+#define SGRF_SOC_CON12			0x30
+#define SGRF_SOC_CON13			0x34
+
+struct dram_info dram_info;
+
+#define TPL_INIT_DDR_TYPE_DDR3
+#ifdef TPL_INIT_DDR_TYPE_DDR3
+struct rv1126_sdram_params sdram_configs[] = {
+	#include "sdram_inc/rv1126/sdram-rv1126-ddr3-detect-330.inc"
+	#include "sdram_inc/rv1126/sdram-rv1126-ddr3-detect-396.inc"
+	#include "sdram_inc/rv1126/sdram-rv1126-ddr3-detect-528.inc"
+	#include "sdram_inc/rv1126/sdram-rv1126-ddr3-detect-664.inc"
+	#include "sdram_inc/rv1126/sdram-rv1126-ddr3-detect-784.inc"
+	#include "sdram_inc/rv1126/sdram-rv1126-ddr3-detect-924.inc"
+};
+#elif defined TPL_INIT_DDR_TYPE_DDR4
+struct rv1126_sdram_params sdram_configs[] = {
+	#include "sdram_inc/rv1126/sdram-rv1126-ddr4-detect-330.inc"
+	#include "sdram_inc/rv1126/sdram-rv1126-ddr4-detect-396.inc"
+	#include "sdram_inc/rv1126/sdram-rv1126-ddr4-detect-528.inc"
+	#include "sdram_inc/rv1126/sdram-rv1126-ddr4-detect-664.inc"
+	#include "sdram_inc/rv1126/sdram-rv1126-ddr4-detect-784.inc"
+	#include "sdram_inc/rv1126/sdram-rv1126-ddr4-detect-924.inc"
+	#include "sdram_inc/rv1126/sdram-rv1126-ddr4-detect-1056.inc"
+};
+#elif defined TPL_INIT_DDR_TYPE_LPDDR3
+struct rv1126_sdram_params sdram_configs[] = {
+	#include "sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-330.inc"
+	#include "sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-396.inc"
+	#include "sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-528.inc"
+	#include "sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-664.inc"
+	#include "sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-784.inc"
+	#include "sdram_inc/rv1126/sdram-rv1126-lpddr3-detect-924.inc"
+};
+#elif defined TPL_INIT_DDR_TYPE_LPDDR4
+struct rv1126_sdram_params sdram_configs[] = {
+	#include "sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-330.inc"
+	#include "sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-396.inc"
+	#include "sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-528.inc"
+	#include "sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-664.inc"
+	#include "sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-784.inc"
+	#include "sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-924.inc"
+	#include "sdram_inc/rv1126/sdram-rv1126-lpddr4-detect-1056.inc"
+};
+#endif
+
+u32 common_info[] = {
+	#include "sdram_inc/rv1126/sdram-rv1126-loader_params.inc"
+};
+
+static struct rv1126_fsp_param fsp_param[MAX_IDX];
+
+static u8 lp3_odt_value;
+
+static u8 wrlvl_result[2][4];
+
+/* DDR configuration 0-9 */
+u16 ddr_cfg_2_rbc[] = {
+	((0 << 8) | (3 << 5) | (0 << 4) | (1 << 3) | 3), /* 0 */
+	((1 << 8) | (3 << 5) | (0 << 4) | (1 << 3) | 2), /* 1 */
+	((1 << 8) | (2 << 5) | (0 << 4) | (1 << 3) | 3), /* 2 */
+	((1 << 8) | (3 << 5) | (0 << 4) | (1 << 3) | 1), /* 3 */
+	((0 << 8) | (2 << 5) | (0 << 4) | (1 << 3) | 4), /* 4 */
+	((0 << 8) | (3 << 5) | (1 << 4) | (1 << 3) | 1), /* 5 */
+	((0 << 8) | (3 << 5) | (1 << 4) | (1 << 3) | 2), /* 6 */
+	((0 << 8) | (2 << 5) | (1 << 4) | (1 << 3) | 3), /* 7 */
+	((1 << 8) | (3 << 5) | (0 << 4) | (0 << 3) | 2), /* 8 */
+	((1 << 8) | (2 << 5) | (0 << 4) | (1 << 3) | 2) /* 9 */
+};
+
+/* DDR configuration 10-21 */
+u8 ddr4_cfg_2_rbc[] = {
+	((0 << 7) | (3 << 4) | (0 << 3) | (2 << 1) | 0), /* 10 */
+	((1 << 7) | (2 << 4) | (0 << 3) | (2 << 1) | 0), /* 11 */
+	((0 << 7) | (4 << 4) | (0 << 3) | (1 << 1) | 0), /* 12 */
+	((1 << 7) | (3 << 4) | (0 << 3) | (1 << 1) | 0), /* 13 */
+	((0 << 7) | (4 << 4) | (0 << 3) | (2 << 1) | 1), /* 14 */
+	((1 << 7) | (3 << 4) | (0 << 3) | (2 << 1) | 1), /* 15 */
+	((1 << 7) | (4 << 4) | (0 << 3) | (1 << 1) | 1), /* 16 */
+	((0 << 7) | (2 << 4) | (1 << 3) | (2 << 1) | 0), /* 17 */
+	((0 << 7) | (3 << 4) | (1 << 3) | (1 << 1) | 0), /* 18 */
+	((0 << 7) | (3 << 4) | (1 << 3) | (2 << 1) | 1), /* 19 */
+	((0 << 7) | (4 << 4) | (1 << 3) | (1 << 1) | 1), /* 20 */
+	((1 << 7) | (4 << 4) | (0 << 3) | (0 << 1) | 0) /* 21 */
+};
+
+/* DDR configuration 22-28 */
+u16 ddr_cfg_2_rbc_p2[] = {
+	((1 << 8) | (3 << 5) | (0 << 4) | (1 << 3) | 0), /* 22 */
+	((0 << 8) | (4 << 5) | (0 << 4) | (1 << 3) | 2), /* 23 */
+	((1 << 8) | (3 << 5) | (0 << 4) | (0 << 3) | 3), /* 24 */
+	((0 << 8) | (3 << 5) | (1 << 4) | (0 << 3) | 3), /* 25 */
+	((0 << 8) | (4 << 5) | (1 << 4) | (0 << 3) | 2), /* 26 */
+	((1 << 8) | (4 << 5) | (0 << 4) | (0 << 3) | 2), /* 27 */
+	((0 << 8) | (4 << 5) | (0 << 4) | (0 << 3) | 3) /* 28 */
+};
+
+u8 d4_rbc_2_d3_rbc[][2] = {
+	{10, 0},
+	{11, 2},
+	{12, 23},
+	{13, 1},
+	{14, 28},
+	{15, 24},
+	{16, 27},
+	{17, 7},
+	{18, 6},
+	{19, 25},
+	{20, 26},
+	{21, 3}
+};
+
+u32 addrmap[23][9] = {
+	{24, 0x00090909, 0x00000000, 0x00000000, 0x00001f00, 0x08080808,
+		0x08080808, 0x00000f0f, 0x3f3f}, /* 0 */
+	{23, 0x00080808, 0x00000000, 0x00000000, 0x00001f1f, 0x07070707,
+		0x07070707, 0x00000f0f, 0x3f3f}, /* 1 */
+	{23, 0x00090909, 0x00000000, 0x00000000, 0x00001f00, 0x08080808,
+		0x0f080808, 0x00000f0f, 0x3f3f}, /* 2 */
+	{22, 0x00070707, 0x00000000, 0x1f000000, 0x00001f1f, 0x06060606,
+		0x06060606, 0x00000f0f, 0x3f3f}, /* 3 */
+	{24, 0x000a0a0a, 0x00000000, 0x00000000, 0x00000000, 0x09090909,
+		0x0f090909, 0x00000f0f, 0x3f3f}, /* 4 */
+	{6, 0x00070707, 0x00000000, 0x1f000000, 0x00001f1f, 0x07070707,
+		0x07070707, 0x00000f0f, 0x3f3f}, /* 5 */
+	{7, 0x00080808, 0x00000000, 0x00000000, 0x00001f1f, 0x08080808,
+		0x08080808, 0x00000f0f, 0x3f3f}, /* 6 */
+	{8, 0x00090909, 0x00000000, 0x00000000, 0x00001f00, 0x09090909,
+		0x0f090909, 0x00000f0f, 0x3f3f}, /* 7 */
+	{22, 0x001f0808, 0x00000000, 0x00000000, 0x00001f1f, 0x06060606,
+		0x06060606, 0x00000f0f, 0x3f3f}, /* 8 */
+	{23, 0x00080808, 0x00000000, 0x00000000, 0x00001f1f, 0x07070707,
+		0x0f070707, 0x00000f0f, 0x3f3f}, /* 9 */
+
+	{24, 0x003f0a0a, 0x01010100, 0x01010101, 0x00001f1f, 0x08080808,
+		0x08080808, 0x00000f0f, 0x0801}, /* 10 */
+	{23, 0x003f0a0a, 0x01010100, 0x01010101, 0x00001f1f, 0x08080808,
+		0x0f080808, 0x00000f0f, 0x0801}, /* 11 */
+	{24, 0x003f0909, 0x00000007, 0x1f000000, 0x00001f1f, 0x07070707,
+		0x07070707, 0x00000f07, 0x0700}, /* 12 */
+	{23, 0x003f0909, 0x00000007, 0x1f000000, 0x00001f1f, 0x07070707,
+		0x07070707, 0x00000f0f, 0x0700}, /* 13 */
+	{24, 0x003f0909, 0x01010100, 0x01010101, 0x00001f1f, 0x07070707,
+		0x07070707, 0x00000f07, 0x3f01}, /* 14 */
+	{23, 0x003f0909, 0x01010100, 0x01010101, 0x00001f1f, 0x07070707,
+		0x07070707, 0x00000f0f, 0x3f01}, /* 15 */
+	{23, 0x003f0808, 0x00000007, 0x1f000000, 0x00001f1f, 0x06060606,
+		0x06060606, 0x00000f06, 0x3f00}, /* 16 */
+	{8, 0x003f0a0a, 0x01010100, 0x01010101, 0x00001f1f, 0x09090909,
+		0x0f090909, 0x00000f0f, 0x0801}, /* 17 */
+	{7, 0x003f0909, 0x00000007, 0x1f000000, 0x00001f1f, 0x08080808,
+		0x08080808, 0x00000f0f, 0x0700}, /* 18 */
+	{7, 0x003f0909, 0x01010100, 0x01010101, 0x00001f1f, 0x08080808,
+		0x08080808, 0x00000f0f, 0x3f01}, /* 19 */
+
+	{6, 0x003f0808, 0x00000007, 0x1f000000, 0x00001f1f, 0x07070707,
+		0x07070707, 0x00000f07, 0x3f00}, /* 20 */
+	{23, 0x003f0909, 0x00000006, 0x1f1f0000, 0x00001f1f, 0x06060606,
+		0x06060606, 0x00000f06, 0x0600}, /* 21 */
+	{21, 0x00060606, 0x00000000, 0x1f1f0000, 0x00001f1f, 0x05050505,
+		0x05050505, 0x00000f0f, 0x3f3f} /* 22 */
+};
+
+static u8 dq_sel[22][3] = {
+	{0x0, 0x17, 0x22},
+	{0x1, 0x18, 0x23},
+	{0x2, 0x19, 0x24},
+	{0x3, 0x1a, 0x25},
+	{0x4, 0x1b, 0x26},
+	{0x5, 0x1c, 0x27},
+	{0x6, 0x1d, 0x28},
+	{0x7, 0x1e, 0x29},
+	{0x8, 0x16, 0x21},
+	{0x9, 0x1f, 0x2a},
+	{0xa, 0x20, 0x2b},
+	{0x10, 0x1, 0xc},
+	{0x11, 0x2, 0xd},
+	{0x12, 0x3, 0xe},
+	{0x13, 0x4, 0xf},
+	{0x14, 0x5, 0x10},
+	{0x15, 0x6, 0x11},
+	{0x16, 0x7, 0x12},
+	{0x17, 0x8, 0x13},
+	{0x18, 0x0, 0xb},
+	{0x19, 0x9, 0x14},
+	{0x1a, 0xa, 0x15}
+};
+
+static u16 grp_addr[4] = {
+	ADD_GROUP_CS0_A,
+	ADD_GROUP_CS0_B,
+	ADD_GROUP_CS1_A,
+	ADD_GROUP_CS1_B
+};
+
+static u8 wrlvl_result_offset[2][4] = {
+	{0xa0 + 0x26, 0xa0 + 0x27, 0xd0 + 0x26, 0xd0 + 0x27},
+	{0xa0 + 0x28, 0xa0 + 0x29, 0xd0 + 0x28, 0xd0 + 0x29},
+};
+
+static u16 dqs_dq_skew_adr[16] = {
+	0x170 + 0,	/* SKEW_UPDATE_RX_CS0_DQS0 */
+	0x170 + 0xb,	/* SKEW_UPDATE_RX_CS0_DQS1 */
+	0x1d0 + 0,	/* SKEW_UPDATE_RX_CS0_DQS2 */
+	0x1d0 + 0xb,	/* SKEW_UPDATE_RX_CS0_DQS3 */
+	0x1a0 + 0,	/* SKEW_UPDATE_RX_CS1_DQS0 */
+	0x1a0 + 0xb,	/* SKEW_UPDATE_RX_CS1_DQS1 */
+	0x200 + 0,	/* SKEW_UPDATE_RX_CS1_DQS2 */
+	0x200 + 0xb,	/* SKEW_UPDATE_RX_CS1_DQS3 */
+	0x170 + 0x16,	/* SKEW_UPDATE_TX_CS0_DQS0 */
+	0x170 + 0x21,	/* SKEW_UPDATE_TX_CS0_DQS1 */
+	0x1d0 + 0x16,	/* SKEW_UPDATE_TX_CS0_DQS2 */
+	0x1d0 + 0x21,	/* SKEW_UPDATE_TX_CS0_DQS3 */
+	0x1a0 + 0x16,	/* SKEW_UPDATE_TX_CS1_DQS0 */
+	0x1a0 + 0x21,	/* SKEW_UPDATE_TX_CS1_DQS1 */
+	0x200 + 0x16,	/* SKEW_UPDATE_TX_CS1_DQS2 */
+	0x200 + 0x21,	/* SKEW_UPDATE_TX_CS1_DQS3 */
+};
+
+static void rkclk_ddr_reset(struct dram_info *dram,
+			    u32 ctl_srstn, u32 ctl_psrstn,
+			    u32 phy_srstn, u32 phy_psrstn)
+{
+	writel(UPCTL2_SRSTN_REQ(ctl_srstn) | UPCTL2_PSRSTN_REQ(ctl_psrstn) |
+	       UPCTL2_ASRSTN_REQ(ctl_srstn),
+	       BUS_SGRF_BASE_ADDR + SGRF_SOC_CON13);
+
+	writel(DDRPHY_SRSTN_REQ(phy_srstn) | DDRPHY_PSRSTN_REQ(phy_psrstn),
+	       &dram->cru->softrst_con[12]);
+}
+
+static void rkclk_set_dpll(struct dram_info *dram, unsigned int hz)
+{
+	unsigned int refdiv, postdiv1, postdiv2, fbdiv;
+	int delay = 1000;
+	u32 mhz = hz / MHz;
+
+	refdiv = 1;
+	if (mhz <= 100) {
+		postdiv1 = 6;
+		postdiv2 = 4;
+	} else if (mhz <= 150) {
+		postdiv1 = 4;
+		postdiv2 = 4;
+	} else if (mhz <= 200) {
+		postdiv1 = 6;
+		postdiv2 = 2;
+	} else if (mhz <= 300) {
+		postdiv1 = 4;
+		postdiv2 = 2;
+	} else if (mhz <= 400) {
+		postdiv1 = 6;
+		postdiv2 = 1;
+	} else {
+		postdiv1 = 4;
+		postdiv2 = 1;
+	}
+	fbdiv = (mhz * refdiv * postdiv1 * postdiv2) / 24;
+
+	writel(DPLL_MODE(CLOCK_FROM_XIN_OSC), &dram->cru->mode);
+
+	writel(0x1f000000, &dram->cru->clksel_con[64]);
+	writel(POSTDIV1(postdiv1) | FBDIV(fbdiv), &dram->cru->pll[1].con0);
+	writel(DSMPD(1) | POSTDIV2(postdiv2) | REFDIV(refdiv),
+	       &dram->cru->pll[1].con1);
+
+	while (delay > 0) {
+		udelay(1);
+		if (LOCK(readl(&dram->cru->pll[1].con1)))
+			break;
+		delay--;
+	}
+
+	writel(DPLL_MODE(CLOCK_FROM_PLL), &dram->cru->mode);
+}
+
+static void rkclk_configure_ddr(struct dram_info *dram,
+				struct rv1126_sdram_params *sdram_params)
+{
+	/* for inno ddr phy need freq / 2 */
+	rkclk_set_dpll(dram, sdram_params->base.ddr_freq * MHZ / 2);
+}
+
+static void phy_soft_reset(struct dram_info *dram)
+{
+	void __iomem *phy_base = dram->phy;
+
+	clrbits_le32(PHY_REG(phy_base, 0), 0x3 << 2);
+	udelay(1);
+	setbits_le32(PHY_REG(phy_base, 0), ANALOG_DERESET | DIGITAL_DERESET);
+	udelay(1);
+}
+
+static unsigned int
+	calculate_ddrconfig(struct rv1126_sdram_params *sdram_params)
+{
+	struct sdram_cap_info *cap_info = &sdram_params->ch.cap_info;
+	u32 cs, bw, die_bw, col, row, bank;
+	u32 cs1_row;
+	u32 i, tmp;
+	u32 ddrconf = -1;
+	u32 row_3_4;
+
+	cs = cap_info->rank;
+	bw = cap_info->bw;
+	die_bw = cap_info->dbw;
+	col = cap_info->col;
+	row = cap_info->cs0_row;
+	cs1_row = cap_info->cs1_row;
+	bank = cap_info->bk;
+	row_3_4 = cap_info->row_3_4;
+
+	if (sdram_params->base.dramtype == DDR4) {
+		if (cs == 2 && row == cs1_row && !row_3_4) {
+			tmp = ((row - 13) << 4) | (1 << 3) | (bw << 1) |
+			      die_bw;
+			for (i = 17; i < 21; i++) {
+				if (((tmp & 0xf) ==
+				     (ddr4_cfg_2_rbc[i - 10] & 0xf)) &&
+				    ((tmp & 0x70) <=
+				     (ddr4_cfg_2_rbc[i - 10] & 0x70))) {
+					ddrconf = i;
+					goto out;
+				}
+			}
+		}
+
+		tmp = ((cs - 1) << 7) | ((row - 13) << 4) | (bw << 1) | die_bw;
+		for (i = 10; i < 21; i++) {
+			if (((tmp & 0xf) == (ddr4_cfg_2_rbc[i - 10] & 0xf)) &&
+			    ((tmp & 0x70) <= (ddr4_cfg_2_rbc[i - 10] & 0x70)) &&
+			    ((tmp & 0x80) <= (ddr4_cfg_2_rbc[i - 10] & 0x80))) {
+				ddrconf = i;
+				goto out;
+			}
+		}
+	} else {
+		if (cs == 2 && row == cs1_row && bank == 3) {
+			for (i = 5; i < 8; i++) {
+				if (((bw + col - 10) == (ddr_cfg_2_rbc[i] &
+							 0x7)) &&
+				    ((row - 13) << 5) <= (ddr_cfg_2_rbc[i] &
+							  (0x7 << 5))) {
+					ddrconf = i;
+					goto out;
+				}
+			}
+		}
+
+		tmp = ((cs - 1) << 8) | ((row - 13) << 5) |
+		      ((bw + col - 10) << 0);
+		if (bank == 3)
+			tmp |= (1 << 3);
+
+		for (i = 0; i < 9; i++)
+			if (((tmp & 0x1f) == (ddr_cfg_2_rbc[i] & 0x1f)) &&
+			    ((tmp & (7 << 5)) <=
+			     (ddr_cfg_2_rbc[i] & (7 << 5))) &&
+			    ((tmp & (1 << 8)) <=
+			     (ddr_cfg_2_rbc[i] & (1 << 8)))) {
+				ddrconf = i;
+				goto out;
+			}
+		if (cs == 1 && bank == 3 && row <= 17 &&
+		    (col + bw) == 12)
+			ddrconf = 23;
+	}
+
+out:
+	if (ddrconf > 28)
+		printascii("calculate ddrconfig error\n");
+
+	if (sdram_params->base.dramtype == DDR4) {
+		for (i = 0; i < ARRAY_SIZE(d4_rbc_2_d3_rbc) ; i++) {
+			if (ddrconf == d4_rbc_2_d3_rbc[i][0]) {
+				if (ddrconf == 21 && row > 16)
+					printascii("warn:ddrconf21 row > 16\n");
+				else
+					ddrconf = d4_rbc_2_d3_rbc[i][1];
+				break;
+			}
+		}
+	}
+
+	return ddrconf;
+}
+
+static void sw_set_req(struct dram_info *dram)
+{
+	void __iomem *pctl_base = dram->pctl;
+
+	/* clear sw_done=0 */
+	writel(PCTL2_SW_DONE_CLEAR, pctl_base + DDR_PCTL2_SWCTL);
+}
+
+static void sw_set_ack(struct dram_info *dram)
+{
+	void __iomem *pctl_base = dram->pctl;
+
+	/* set sw_done=1 */
+	writel(PCTL2_SW_DONE, pctl_base + DDR_PCTL2_SWCTL);
+	while (1) {
+		/* wait programming done */
+		if (readl(pctl_base + DDR_PCTL2_SWSTAT) &
+				PCTL2_SW_DONE_ACK)
+			break;
+	}
+}
+
+static void set_ctl_address_map(struct dram_info *dram,
+				struct rv1126_sdram_params *sdram_params)
+{
+	struct sdram_cap_info *cap_info = &sdram_params->ch.cap_info;
+	void __iomem *pctl_base = dram->pctl;
+	u32 ddrconf = cap_info->ddrconfig;
+	u32 i, row;
+
+	row = cap_info->cs0_row;
+	if (sdram_params->base.dramtype == DDR4) {
+		for (i = 0; i < ARRAY_SIZE(d4_rbc_2_d3_rbc) ; i++) {
+			if (ddrconf == d4_rbc_2_d3_rbc[i][1]) {
+				ddrconf = d4_rbc_2_d3_rbc[i][0];
+				break;
+			}
+		}
+	}
+
+	if (ddrconf > ARRAY_SIZE(addrmap)) {
+		printascii("set ctl address map fail\n");
+		return;
+	}
+
+	sdram_copy_to_reg((u32 *)(pctl_base + DDR_PCTL2_ADDRMAP0),
+			  &addrmap[ddrconf][0], 9 * 4);
+
+	/* unused row set to 0xf */
+	for (i = 17; i >= row; i--)
+		setbits_le32(pctl_base + DDR_PCTL2_ADDRMAP6 +
+			((i - 12) * 8 / 32) * 4,
+			0xf << ((i - 12) * 8 % 32));
+
+	if (sdram_params->base.dramtype == LPDDR3 && cap_info->row_3_4)
+		setbits_le32(pctl_base + DDR_PCTL2_ADDRMAP6, 1 << 31);
+	if (sdram_params->base.dramtype == DDR4 && cap_info->bw == 0x1)
+		setbits_le32(pctl_base + DDR_PCTL2_PCCFG, 1 << 8);
+
+	if (cap_info->rank == 1)
+		clrsetbits_le32(pctl_base + DDR_PCTL2_ADDRMAP0, 0x1f, 0x1f);
+}
+
+static void phy_pll_set(struct dram_info *dram, u32 freq, u32 wait)
+{
+	void __iomem *phy_base = dram->phy;
+	u32 fbdiv, prediv, postdiv, postdiv_en;
+
+	if (wait) {
+		clrbits_le32(PHY_REG(phy_base, 0x53), PHY_PD_DISB);
+		while (!(readl(PHY_REG(phy_base, 0x90)) & PHY_PLL_LOCK))
+			continue;
+	} else {
+		freq /= MHz;
+		prediv = 1;
+		if (freq <= 200) {
+			fbdiv = 16;
+			postdiv = 2;
+			postdiv_en = 1;
+		} else if (freq <= 456) {
+			fbdiv = 8;
+			postdiv = 1;
+			postdiv_en = 1;
+		} else {
+			fbdiv = 4;
+			postdiv = 0;
+			postdiv_en = 0;
+		}
+		writel(fbdiv & 0xff, PHY_REG(phy_base, 0x50));
+		clrsetbits_le32(PHY_REG(phy_base, 0x51), PHY_PBDIV_BIT9_MASK,
+				(fbdiv >> 8) & 1);
+		clrsetbits_le32(PHY_REG(phy_base, 0x51), PHY_POSTDIV_EN_MASK,
+				postdiv_en << PHY_POSTDIV_EN_SHIFT);
+
+		clrsetbits_le32(PHY_REG(phy_base, 0x52),
+				PHY_PREDIV_MASK << PHY_PREDIV_SHIFT, prediv);
+		clrsetbits_le32(PHY_REG(phy_base, 0x53),
+				PHY_POSTDIV_MASK << PHY_POSTDIV_SHIFT,
+				postdiv << PHY_POSTDIV_SHIFT);
+	}
+}
+
+static const u16 d3_phy_drv_2_ohm[][2] = {
+	{PHY_DDR3_RON_506ohm, 506},
+	{PHY_DDR3_RON_253ohm, 253},
+	{PHY_DDR3_RON_169hm, 169},
+	{PHY_DDR3_RON_127ohm, 127},
+	{PHY_DDR3_RON_101ohm, 101},
+	{PHY_DDR3_RON_84ohm, 84},
+	{PHY_DDR3_RON_72ohm, 72},
+	{PHY_DDR3_RON_63ohm, 63},
+	{PHY_DDR3_RON_56ohm, 56},
+	{PHY_DDR3_RON_51ohm, 51},
+	{PHY_DDR3_RON_46ohm, 46},
+	{PHY_DDR3_RON_42ohm, 42},
+	{PHY_DDR3_RON_39ohm, 39},
+	{PHY_DDR3_RON_36ohm, 36},
+	{PHY_DDR3_RON_34ohm, 34},
+	{PHY_DDR3_RON_32ohm, 32},
+	{PHY_DDR3_RON_30ohm, 30},
+	{PHY_DDR3_RON_28ohm, 28},
+	{PHY_DDR3_RON_27ohm, 27},
+	{PHY_DDR3_RON_25ohm, 25},
+	{PHY_DDR3_RON_24ohm, 24},
+	{PHY_DDR3_RON_23ohm, 23},
+	{PHY_DDR3_RON_22ohm, 22}
+};
+
+static u16 d3_phy_odt_2_ohm[][2] = {
+	{PHY_DDR3_RTT_DISABLE, 0},
+	{PHY_DDR3_RTT_953ohm, 953},
+	{PHY_DDR3_RTT_483ohm, 483},
+	{PHY_DDR3_RTT_320ohm, 320},
+	{PHY_DDR3_RTT_241ohm, 241},
+	{PHY_DDR3_RTT_193ohm, 193},
+	{PHY_DDR3_RTT_161ohm, 161},
+	{PHY_DDR3_RTT_138ohm, 138},
+	{PHY_DDR3_RTT_121ohm, 121},
+	{PHY_DDR3_RTT_107ohm, 107},
+	{PHY_DDR3_RTT_97ohm, 97},
+	{PHY_DDR3_RTT_88ohm, 88},
+	{PHY_DDR3_RTT_80ohm, 80},
+	{PHY_DDR3_RTT_74ohm, 74},
+	{PHY_DDR3_RTT_69ohm, 69},
+	{PHY_DDR3_RTT_64ohm, 64},
+	{PHY_DDR3_RTT_60ohm, 60},
+	{PHY_DDR3_RTT_57ohm, 57},
+	{PHY_DDR3_RTT_54ohm, 54},
+	{PHY_DDR3_RTT_51ohm, 51},
+	{PHY_DDR3_RTT_48ohm, 48},
+	{PHY_DDR3_RTT_46ohm, 46},
+	{PHY_DDR3_RTT_44ohm, 44},
+	{PHY_DDR3_RTT_42ohm, 42}
+};
+
+static u16 d4lp3_phy_drv_2_ohm[][2] = {
+	{PHY_DDR4_LPDDR3_RON_570ohm, 570},
+	{PHY_DDR4_LPDDR3_RON_285ohm, 285},
+	{PHY_DDR4_LPDDR3_RON_190ohm, 190},
+	{PHY_DDR4_LPDDR3_RON_142ohm, 142},
+	{PHY_DDR4_LPDDR3_RON_114ohm, 114},
+	{PHY_DDR4_LPDDR3_RON_95ohm, 95},
+	{PHY_DDR4_LPDDR3_RON_81ohm, 81},
+	{PHY_DDR4_LPDDR3_RON_71ohm, 71},
+	{PHY_DDR4_LPDDR3_RON_63ohm, 63},
+	{PHY_DDR4_LPDDR3_RON_57ohm, 57},
+	{PHY_DDR4_LPDDR3_RON_52ohm, 52},
+	{PHY_DDR4_LPDDR3_RON_47ohm, 47},
+	{PHY_DDR4_LPDDR3_RON_44ohm, 44},
+	{PHY_DDR4_LPDDR3_RON_41ohm, 41},
+	{PHY_DDR4_LPDDR3_RON_38ohm, 38},
+	{PHY_DDR4_LPDDR3_RON_36ohm, 36},
+	{PHY_DDR4_LPDDR3_RON_34ohm, 34},
+	{PHY_DDR4_LPDDR3_RON_32ohm, 32},
+	{PHY_DDR4_LPDDR3_RON_30ohm, 30},
+	{PHY_DDR4_LPDDR3_RON_28ohm, 28},
+	{PHY_DDR4_LPDDR3_RON_27ohm, 27},
+	{PHY_DDR4_LPDDR3_RON_26ohm, 26},
+	{PHY_DDR4_LPDDR3_RON_25ohm, 25}
+};
+
+static u16 d4lp3_phy_odt_2_ohm[][2] = {
+	{PHY_DDR4_LPDDR3_RTT_DISABLE, 0},
+	{PHY_DDR4_LPDDR3_RTT_973ohm, 973},
+	{PHY_DDR4_LPDDR3_RTT_493ohm, 493},
+	{PHY_DDR4_LPDDR3_RTT_327ohm, 327},
+	{PHY_DDR4_LPDDR3_RTT_247ohm, 247},
+	{PHY_DDR4_LPDDR3_RTT_197ohm, 197},
+	{PHY_DDR4_LPDDR3_RTT_164ohm, 164},
+	{PHY_DDR4_LPDDR3_RTT_141ohm, 141},
+	{PHY_DDR4_LPDDR3_RTT_123ohm, 123},
+	{PHY_DDR4_LPDDR3_RTT_109ohm, 109},
+	{PHY_DDR4_LPDDR3_RTT_99ohm, 99},
+	{PHY_DDR4_LPDDR3_RTT_90ohm, 90},
+	{PHY_DDR4_LPDDR3_RTT_82ohm, 82},
+	{PHY_DDR4_LPDDR3_RTT_76ohm, 76},
+	{PHY_DDR4_LPDDR3_RTT_70ohm, 70},
+	{PHY_DDR4_LPDDR3_RTT_66ohm, 66},
+	{PHY_DDR4_LPDDR3_RTT_62ohm, 62},
+	{PHY_DDR4_LPDDR3_RTT_58ohm, 58},
+	{PHY_DDR4_LPDDR3_RTT_55ohm, 55},
+	{PHY_DDR4_LPDDR3_RTT_52ohm, 52},
+	{PHY_DDR4_LPDDR3_RTT_49ohm, 49},
+	{PHY_DDR4_LPDDR3_RTT_47ohm, 47},
+	{PHY_DDR4_LPDDR3_RTT_45ohm, 45},
+	{PHY_DDR4_LPDDR3_RTT_43ohm, 43}
+};
+
+static u16 lp4_phy_drv_2_ohm[][2] = {
+	{PHY_LPDDR4_RON_606ohm, 606},
+	{PHY_LPDDR4_RON_303ohm, 303},
+	{PHY_LPDDR4_RON_202ohm, 202},
+	{PHY_LPDDR4_RON_152ohm, 153},
+	{PHY_LPDDR4_RON_121ohm, 121},
+	{PHY_LPDDR4_RON_101ohm, 101},
+	{PHY_LPDDR4_RON_87ohm, 87},
+	{PHY_LPDDR4_RON_76ohm, 76},
+	{PHY_LPDDR4_RON_67ohm, 67},
+	{PHY_LPDDR4_RON_61ohm, 61},
+	{PHY_LPDDR4_RON_55ohm, 55},
+	{PHY_LPDDR4_RON_51ohm, 51},
+	{PHY_LPDDR4_RON_47ohm, 47},
+	{PHY_LPDDR4_RON_43ohm, 43},
+	{PHY_LPDDR4_RON_40ohm, 40},
+	{PHY_LPDDR4_RON_38ohm, 38},
+	{PHY_LPDDR4_RON_36ohm, 36},
+	{PHY_LPDDR4_RON_34ohm, 34},
+	{PHY_LPDDR4_RON_32ohm, 32},
+	{PHY_LPDDR4_RON_30ohm, 30},
+	{PHY_LPDDR4_RON_29ohm, 29},
+	{PHY_LPDDR4_RON_28ohm, 28},
+	{PHY_LPDDR4_RON_26ohm, 26}
+};
+
+static u16 lp4_phy_odt_2_ohm[][2] = {
+	{PHY_LPDDR4_RTT_DISABLE, 0},
+	{PHY_LPDDR4_RTT_998ohm, 998},
+	{PHY_LPDDR4_RTT_506ohm, 506},
+	{PHY_LPDDR4_RTT_336ohm, 336},
+	{PHY_LPDDR4_RTT_253ohm, 253},
+	{PHY_LPDDR4_RTT_202ohm, 202},
+	{PHY_LPDDR4_RTT_169ohm, 169},
+	{PHY_LPDDR4_RTT_144ohm, 144},
+	{PHY_LPDDR4_RTT_127ohm, 127},
+	{PHY_LPDDR4_RTT_112ohm, 112},
+	{PHY_LPDDR4_RTT_101ohm, 101},
+	{PHY_LPDDR4_RTT_92ohm, 92},
+	{PHY_LPDDR4_RTT_84ohm, 84},
+	{PHY_LPDDR4_RTT_78ohm, 78},
+	{PHY_LPDDR4_RTT_72ohm, 72},
+	{PHY_LPDDR4_RTT_67ohm, 67},
+	{PHY_LPDDR4_RTT_63ohm, 63},
+	{PHY_LPDDR4_RTT_60ohm, 60},
+	{PHY_LPDDR4_RTT_56ohm, 56},
+	{PHY_LPDDR4_RTT_53ohm, 53},
+	{PHY_LPDDR4_RTT_51ohm, 51},
+	{PHY_LPDDR4_RTT_48ohm, 48},
+	{PHY_LPDDR4_RTT_46ohm, 46},
+	{PHY_LPDDR4_RTT_44ohm, 44}
+};
+
+static u32 lp4_odt_calc(u32 odt_ohm)
+{
+	u32 odt;
+
+	if (odt_ohm == 0)
+		odt = LPDDR4_DQODT_DIS;
+	else if (odt_ohm <= 40)
+		odt = LPDDR4_DQODT_40;
+	else if (odt_ohm <= 48)
+		odt = LPDDR4_DQODT_48;
+	else if (odt_ohm <= 60)
+		odt = LPDDR4_DQODT_60;
+	else if (odt_ohm <= 80)
+		odt = LPDDR4_DQODT_80;
+	else if (odt_ohm <= 120)
+		odt = LPDDR4_DQODT_120;
+	else
+		odt = LPDDR4_DQODT_240;
+
+	return odt;
+}
+
+static void *get_ddr_drv_odt_info(u32 dramtype)
+{
+	struct sdram_head_info_index_v2 *index =
+		(struct sdram_head_info_index_v2 *)common_info;
+	void *ddr_info = 0;
+
+	if (dramtype == DDR4)
+		ddr_info = (void *)common_info + index->ddr4_index.offset * 4;
+	else if (dramtype == DDR3)
+		ddr_info = (void *)common_info + index->ddr3_index.offset * 4;
+	else if (dramtype == LPDDR3)
+		ddr_info = (void *)common_info + index->lp3_index.offset * 4;
+	else if (dramtype == LPDDR4)
+		ddr_info = (void *)common_info + index->lp4_index.offset * 4;
+	else
+		printascii("unsupported dram type\n");
+	return ddr_info;
+}
+
+static void set_lp4_vref(struct dram_info *dram, struct lp4_info *lp4_info,
+			 u32 freq_mhz, u32 dst_fsp)
+{
+	void __iomem *pctl_base = dram->pctl;
+	u32 ca_vref, dq_vref;
+
+	if (freq_mhz <= LP4_CA_ODT_EN_FREQ(lp4_info->ca_odten_freq))
+		ca_vref = LP4_CA_VREF(lp4_info->vref_when_odtoff);
+	else
+		ca_vref = LP4_CA_VREF(lp4_info->vref_when_odten);
+
+	if (freq_mhz <= LP4_DQ_ODT_EN_FREQ(lp4_info->dq_odten_freq))
+		dq_vref = LP4_DQ_VREF(lp4_info->vref_when_odtoff);
+	else
+		dq_vref = LP4_DQ_VREF(lp4_info->vref_when_odten);
+
+	if (ca_vref < 100)
+		ca_vref = 100;
+	if (ca_vref > 420)
+		ca_vref = 420;
+
+	if (ca_vref <= 300)
+		ca_vref = (0 << 6) | (ca_vref - 100) / 4;
+	else
+		ca_vref = (1 << 6) | (ca_vref - 220) / 4;
+
+	if (dq_vref < 100)
+		dq_vref = 100;
+	if (dq_vref > 420)
+		dq_vref = 420;
+
+	if (dq_vref <= 300)
+		dq_vref = (0 << 6) | (dq_vref - 100) / 4;
+	else
+		dq_vref = (1 << 6) | (dq_vref - 220) / 4;
+
+	sw_set_req(dram);
+	clrsetbits_le32(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +
+			DDR_PCTL2_INIT6,
+			PCTL2_MR_MASK << PCTL2_LPDDR4_MR12_SHIFT,
+			ca_vref << PCTL2_LPDDR4_MR12_SHIFT);
+
+	clrsetbits_le32(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +
+			DDR_PCTL2_INIT7,
+			PCTL2_MR_MASK << PCTL2_LPDDR4_MR14_SHIFT,
+			dq_vref << PCTL2_LPDDR4_MR14_SHIFT);
+	sw_set_ack(dram);
+}
+
+static void set_ds_odt(struct dram_info *dram,
+		       struct rv1126_sdram_params *sdram_params, u32 dst_fsp)
+{
+	void __iomem *phy_base = dram->phy;
+	void __iomem *pctl_base = dram->pctl;
+	u32 dramtype = sdram_params->base.dramtype;
+	struct ddr2_3_4_lp2_3_info *ddr_info;
+	struct lp4_info *lp4_info;
+	u32 i, j, tmp;
+	const u16 (*p_drv)[2];
+	const u16 (*p_odt)[2];
+	u32 drv_info, sr_info;
+	u32 phy_dq_drv_ohm, phy_clk_drv_ohm, phy_ca_drv_ohm, dram_drv_ohm;
+	u32 phy_odt_ohm, dram_odt_ohm;
+	u32 lp4_pu_cal, phy_lp4_drv_pd_en;
+	u32 phy_odt_up_en, phy_odt_dn_en;
+	u32 sr_dq, sr_clk;
+	u32 freq = sdram_params->base.ddr_freq;
+	u32 mr1_mr3, mr11, mr22, vref_out, vref_inner;
+	u32 phy_clk_drv = 0, phy_odt = 0, phy_ca_drv = 0, dram_caodt_ohm = 0;
+	u32 phy_dq_drv = 0;
+	u32 phy_odt_up = 0, phy_odt_dn = 0;
+
+	ddr_info = get_ddr_drv_odt_info(dramtype);
+	lp4_info = (void *)ddr_info;
+
+	if (!ddr_info)
+		return;
+
+	/* dram odt en freq control phy drv, dram odt and phy sr */
+	if (freq <= DRAMODT_EN_FREQ(ddr_info->odten_freq)) {
+		drv_info = ddr_info->drv_when_odtoff;
+		dram_odt_ohm = 0;
+		sr_info = ddr_info->sr_when_odtoff;
+		phy_lp4_drv_pd_en =
+			PHY_LP4_DRV_PULLDOWN_EN_ODTOFF(lp4_info->odt_info);
+	} else {
+		drv_info = ddr_info->drv_when_odten;
+		dram_odt_ohm = ODT_INFO_DRAM_ODT(ddr_info->odt_info);
+		sr_info = ddr_info->sr_when_odten;
+		phy_lp4_drv_pd_en =
+			PHY_LP4_DRV_PULLDOWN_EN_ODTEN(lp4_info->odt_info);
+	}
+	phy_dq_drv_ohm =
+		DRV_INFO_PHY_DQ_DRV(drv_info);
+	phy_clk_drv_ohm =
+		DRV_INFO_PHY_CLK_DRV(drv_info);
+	phy_ca_drv_ohm =
+		DRV_INFO_PHY_CA_DRV(drv_info);
+
+	sr_dq = DQ_SR_INFO(sr_info);
+	sr_clk = CLK_SR_INFO(sr_info);
+
+	/* phy odt en freq control dram drv and phy odt */
+	if (freq <= PHYODT_EN_FREQ(ddr_info->odten_freq)) {
+		dram_drv_ohm = DRV_INFO_DRAM_DQ_DRV(ddr_info->drv_when_odtoff);
+		lp4_pu_cal = LP4_DRV_PU_CAL_ODTOFF(lp4_info->odt_info);
+		phy_odt_ohm = 0;
+		phy_odt_up_en = 0;
+		phy_odt_dn_en = 0;
+	} else {
+		dram_drv_ohm =
+			DRV_INFO_DRAM_DQ_DRV(ddr_info->drv_when_odten);
+		phy_odt_ohm = ODT_INFO_PHY_ODT(ddr_info->odt_info);
+		phy_odt_up_en =
+			ODT_INFO_PULLUP_EN(ddr_info->odt_info);
+		phy_odt_dn_en =
+			ODT_INFO_PULLDOWN_EN(ddr_info->odt_info);
+		lp4_pu_cal = LP4_DRV_PU_CAL_ODTEN(lp4_info->odt_info);
+	}
+
+	if (dramtype == LPDDR4) {
+		if (phy_odt_ohm) {
+			phy_odt_up_en = 0;
+			phy_odt_dn_en = 1;
+		}
+		if (freq <= LP4_CA_ODT_EN_FREQ(lp4_info->ca_odten_freq))
+			dram_caodt_ohm = 0;
+		else
+			dram_caodt_ohm =
+				ODT_INFO_LP4_CA_ODT(lp4_info->odt_info);
+	}
+
+	if (dramtype == DDR3) {
+		p_drv = d3_phy_drv_2_ohm;
+		p_odt = d3_phy_odt_2_ohm;
+	} else if (dramtype == LPDDR4) {
+		p_drv = lp4_phy_drv_2_ohm;
+		p_odt = lp4_phy_odt_2_ohm;
+	} else {
+		p_drv = d4lp3_phy_drv_2_ohm;
+		p_odt = d4lp3_phy_odt_2_ohm;
+	}
+
+	for (i = ARRAY_SIZE(d3_phy_drv_2_ohm) - 1; ; i--) {
+		if (phy_dq_drv_ohm <= *(*(p_drv + i) + 1)) {
+			phy_dq_drv = **(p_drv + i);
+			break;
+		}
+		if (i == 0)
+			break;
+	}
+	for (i = ARRAY_SIZE(d3_phy_drv_2_ohm) - 1; ; i--) {
+		if (phy_clk_drv_ohm <= *(*(p_drv + i) + 1)) {
+			phy_clk_drv = **(p_drv + i);
+			break;
+		}
+		if (i == 0)
+			break;
+	}
+	for (i = ARRAY_SIZE(d3_phy_drv_2_ohm) - 1; ; i--) {
+		if (phy_ca_drv_ohm <= *(*(p_drv + i) + 1)) {
+			phy_ca_drv = **(p_drv + i);
+			break;
+		}
+		if (i == 0)
+			break;
+	}
+	if (!phy_odt_ohm)
+		phy_odt = 0;
+	else
+		for (i = ARRAY_SIZE(d4lp3_phy_odt_2_ohm) - 1; ; i--) {
+			if (phy_odt_ohm <= *(*(p_odt + i) + 1)) {
+				phy_odt = **(p_odt + i);
+				break;
+			}
+			if (i == 0)
+				break;
+		}
+
+	if (dramtype != LPDDR4) {
+		if (!phy_odt_ohm || (phy_odt_up_en && phy_odt_dn_en))
+			vref_inner = 0x80;
+		else if (phy_odt_up_en)
+			vref_inner = (2 * dram_drv_ohm + phy_odt_ohm) * 128 /
+				     (dram_drv_ohm + phy_odt_ohm);
+		else
+			vref_inner = phy_odt_ohm * 128 /
+				(phy_odt_ohm + dram_drv_ohm);
+
+		if (dramtype != DDR3 && dram_odt_ohm)
+			vref_out = (2 * phy_dq_drv_ohm + dram_odt_ohm) * 128 /
+				   (phy_dq_drv_ohm + dram_odt_ohm);
+		else
+			vref_out = 0x80;
+	} else {
+		/* for lp4 */
+		if (phy_odt_ohm)
+			vref_inner =
+				(PHY_LP4_DQ_VREF(lp4_info->vref_when_odten) *
+				 256) / 1000;
+		else
+			vref_inner =
+				(PHY_LP4_DQ_VREF(lp4_info->vref_when_odtoff) *
+				 256) / 1000;
+
+		vref_out = 0x80;
+	}
+
+	/* default ZQCALIB bypass mode */
+	clrsetbits_le32(PHY_REG(phy_base, 0x100), 0x1f, phy_ca_drv);
+	clrsetbits_le32(PHY_REG(phy_base, 0x101), 0x1f, phy_ca_drv);
+	clrsetbits_le32(PHY_REG(phy_base, 0x102), 0x1f, phy_clk_drv);
+	clrsetbits_le32(PHY_REG(phy_base, 0x103), 0x1f, phy_clk_drv);
+	/* clk / cmd slew rate */
+	clrsetbits_le32(PHY_REG(phy_base, 0x106), 0x1f, sr_clk);
+
+	phy_lp4_drv_pd_en = (~phy_lp4_drv_pd_en) & 1;
+	if (phy_odt_up_en)
+		phy_odt_up = phy_odt;
+	if (phy_odt_dn_en)
+		phy_odt_dn = phy_odt;
+
+	for (i = 0; i < 4; i++) {
+		j = 0x110 + i * 0x10;
+		clrsetbits_le32(PHY_REG(phy_base, j + 1), 0x1f, phy_odt_up);
+		clrsetbits_le32(PHY_REG(phy_base, j), 0x1f, phy_odt_dn);
+		clrsetbits_le32(PHY_REG(phy_base, j + 2), 0x1f, phy_dq_drv);
+		clrsetbits_le32(PHY_REG(phy_base, j + 3), 0x1f, phy_dq_drv);
+		writel(vref_inner, PHY_REG(phy_base, 0x118 + i * 0x10));
+
+		clrsetbits_le32(PHY_REG(phy_base, 0x114 + i * 0x10),
+				1 << 3, phy_lp4_drv_pd_en << 3);
+		/* dq slew rate */
+		clrsetbits_le32(PHY_REG(phy_base, 0x117 + i * 0x10),
+				0x1f, sr_dq);
+	}
+
+	/* reg_rx_vref_value_update */
+	setbits_le32(PHY_REG(phy_base, 0x71), 1 << 5);
+	clrbits_le32(PHY_REG(phy_base, 0x71), 1 << 5);
+
+	/* RAM VREF */
+	writel(vref_out, PHY_REG(phy_base, 0x105));
+	udelay(8000);
+
+	if (dramtype == LPDDR4)
+		set_lp4_vref(dram, lp4_info, freq, dst_fsp);
+
+	if (dramtype == DDR3 || dramtype == DDR4) {
+		mr1_mr3 = readl(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +
+				DDR_PCTL2_INIT3);
+		mr1_mr3 = mr1_mr3 >> PCTL2_DDR34_MR1_SHIFT & PCTL2_MR_MASK;
+	} else {
+		mr1_mr3 = readl(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +
+				DDR_PCTL2_INIT4);
+		mr1_mr3 = mr1_mr3 >> PCTL2_LPDDR234_MR3_SHIFT & PCTL2_MR_MASK;
+	}
+
+	if (dramtype == DDR3) {
+		mr1_mr3 &= ~(DDR3_DS_MASK | DDR3_RTT_NOM_MASK);
+		if (dram_drv_ohm == 34)
+			mr1_mr3 |= DDR3_DS_34;
+
+		if (dram_odt_ohm == 0)
+			mr1_mr3 |= DDR3_RTT_NOM_DIS;
+		else if (dram_odt_ohm <= 40)
+			mr1_mr3 |= DDR3_RTT_NOM_40;
+		else if (dram_odt_ohm <= 60)
+			mr1_mr3 |= DDR3_RTT_NOM_60;
+		else
+			mr1_mr3 |= DDR3_RTT_NOM_120;
+
+	} else if (dramtype == DDR4) {
+		mr1_mr3 &= ~(DDR4_DS_MASK | DDR4_RTT_NOM_MASK);
+		if (dram_drv_ohm == 48)
+			mr1_mr3 |= DDR4_DS_48;
+
+		if (dram_odt_ohm == 0)
+			mr1_mr3 |= DDR4_RTT_NOM_DIS;
+		else if (dram_odt_ohm <= 34)
+			mr1_mr3 |= DDR4_RTT_NOM_34;
+		else if (dram_odt_ohm <= 40)
+			mr1_mr3 |= DDR4_RTT_NOM_40;
+		else if (dram_odt_ohm <= 48)
+			mr1_mr3 |= DDR4_RTT_NOM_48;
+		else if (dram_odt_ohm <= 60)
+			mr1_mr3 |= DDR4_RTT_NOM_60;
+		else
+			mr1_mr3 |= DDR4_RTT_NOM_120;
+
+	} else if (dramtype == LPDDR3) {
+		if (dram_drv_ohm <= 34)
+			mr1_mr3 |= LPDDR3_DS_34;
+		else if (dram_drv_ohm <= 40)
+			mr1_mr3 |= LPDDR3_DS_40;
+		else if (dram_drv_ohm <= 48)
+			mr1_mr3 |= LPDDR3_DS_48;
+		else if (dram_drv_ohm <= 60)
+			mr1_mr3 |= LPDDR3_DS_60;
+		else if (dram_drv_ohm <= 80)
+			mr1_mr3 |= LPDDR3_DS_80;
+
+		if (dram_odt_ohm == 0)
+			lp3_odt_value = LPDDR3_ODT_DIS;
+		else if (dram_odt_ohm <= 60)
+			lp3_odt_value = LPDDR3_ODT_60;
+		else if (dram_odt_ohm <= 120)
+			lp3_odt_value = LPDDR3_ODT_120;
+		else
+			lp3_odt_value = LPDDR3_ODT_240;
+	} else {/* for lpddr4 */
+		/* MR3 for lp4 PU-CAL and PDDS */
+		mr1_mr3 &= ~(LPDDR4_PDDS_MASK | LPDDR4_PU_CAL_MASK);
+		mr1_mr3 |= lp4_pu_cal;
+
+		tmp = lp4_odt_calc(dram_drv_ohm);
+		if (!tmp)
+			tmp = LPDDR4_PDDS_240;
+		mr1_mr3 |= (tmp << LPDDR4_PDDS_SHIFT);
+
+		/* MR11 for lp4 ca odt, dq odt set */
+		mr11 = readl(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +
+			     DDR_PCTL2_INIT6);
+		mr11 = mr11 >> PCTL2_LPDDR4_MR11_SHIFT & PCTL2_MR_MASK;
+
+		mr11 &= ~(LPDDR4_DQODT_MASK | LPDDR4_CAODT_MASK);
+
+		tmp = lp4_odt_calc(dram_odt_ohm);
+		mr11 |= (tmp << LPDDR4_DQODT_SHIFT);
+
+		tmp = lp4_odt_calc(dram_caodt_ohm);
+		mr11 |= (tmp << LPDDR4_CAODT_SHIFT);
+		sw_set_req(dram);
+		clrsetbits_le32(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +
+				DDR_PCTL2_INIT6,
+				PCTL2_MR_MASK << PCTL2_LPDDR4_MR11_SHIFT,
+				mr11 << PCTL2_LPDDR4_MR11_SHIFT);
+		sw_set_ack(dram);
+
+		/* MR22 for soc odt/odt-ck/odt-cs/odt-ca */
+		mr22 = readl(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +
+			     DDR_PCTL2_INIT7);
+		mr22 = mr22 >> PCTL2_LPDDR4_MR22_SHIFT & PCTL2_MR_MASK;
+		mr22 &= ~LPDDR4_SOC_ODT_MASK;
+
+		tmp = lp4_odt_calc(phy_odt_ohm);
+		mr22 |= tmp;
+		mr22 = mr22 |
+		       (LP4_ODTE_CK_EN(lp4_info->cs_drv_ca_odt_info) <<
+			LPDDR4_ODTE_CK_SHIFT) |
+		       (LP4_ODTE_CS_EN(lp4_info->cs_drv_ca_odt_info) <<
+			LPDDR4_ODTE_CS_SHIFT) |
+		       (LP4_ODTD_CA_EN(lp4_info->cs_drv_ca_odt_info) <<
+			LPDDR4_ODTD_CA_SHIFT);
+
+		sw_set_req(dram);
+		clrsetbits_le32(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +
+				DDR_PCTL2_INIT7,
+				PCTL2_MR_MASK << PCTL2_LPDDR4_MR22_SHIFT,
+				mr22 << PCTL2_LPDDR4_MR22_SHIFT);
+		sw_set_ack(dram);
+	}
+
+	if (dramtype == DDR4 || dramtype == DDR3) {
+		sw_set_req(dram);
+		clrsetbits_le32(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +
+				DDR_PCTL2_INIT3,
+				PCTL2_MR_MASK << PCTL2_DDR34_MR1_SHIFT,
+				mr1_mr3 << PCTL2_DDR34_MR1_SHIFT);
+		sw_set_ack(dram);
+	} else {
+		sw_set_req(dram);
+		clrsetbits_le32(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +
+				DDR_PCTL2_INIT4,
+				PCTL2_MR_MASK << PCTL2_LPDDR234_MR3_SHIFT,
+				mr1_mr3 << PCTL2_LPDDR234_MR3_SHIFT);
+		sw_set_ack(dram);
+	}
+}
+
+static int sdram_cmd_dq_path_remap(struct dram_info *dram,
+				   struct rv1126_sdram_params *sdram_params)
+{
+	void __iomem *phy_base = dram->phy;
+	u32 dramtype = sdram_params->base.dramtype;
+	struct sdram_head_info_index_v2 *index =
+		(struct sdram_head_info_index_v2 *)common_info;
+	struct dq_map_info *map_info;
+
+	map_info = (struct dq_map_info *)((void *)common_info +
+		index->dq_map_index.offset * 4);
+
+	if (dramtype <= LPDDR4)
+		writel((map_info->byte_map[dramtype / 4] >>
+			((dramtype % 4) * 8)) & 0xff,
+		       PHY_REG(phy_base, 0x4f));
+
+	return 0;
+}
+
+static void phy_cfg(struct dram_info *dram,
+		    struct rv1126_sdram_params *sdram_params)
+{
+	struct sdram_cap_info *cap_info = &sdram_params->ch.cap_info;
+	void __iomem *phy_base = dram->phy;
+	u32 i, dq_map, tmp;
+	u32 byte1 = 0, byte0 = 0;
+
+	sdram_cmd_dq_path_remap(dram, sdram_params);
+
+	phy_pll_set(dram, sdram_params->base.ddr_freq * MHZ, 0);
+	for (i = 0; sdram_params->phy_regs.phy[i][0] != 0xFFFFFFFF; i++) {
+		writel(sdram_params->phy_regs.phy[i][1],
+		       phy_base + sdram_params->phy_regs.phy[i][0]);
+	}
+
+	clrbits_le32(PHY_REG(phy_base, 0x62), BIT(5));
+	dq_map = readl(PHY_REG(phy_base, 0x4f));
+	for (i = 0; i < 4; i++) {
+		if (((dq_map >> (i * 2)) & 0x3) == 0)
+			byte0 = i;
+		if (((dq_map >> (i * 2)) & 0x3) == 1)
+			byte1 = i;
+	}
+
+	tmp = readl(PHY_REG(phy_base, 0xf)) & (~PHY_DQ_WIDTH_MASK);
+	if (cap_info->bw == 2)
+		tmp |= 0xf;
+	else if (cap_info->bw == 1)
+		tmp |= ((1 << byte0) | (1 << byte1));
+	else
+		tmp |= (1 << byte0);
+
+	writel(tmp, PHY_REG(phy_base, 0xf));
+
+	/* lpddr4 odt control by phy, enable cs0 odt */
+	if (sdram_params->base.dramtype == LPDDR4)
+		clrsetbits_le32(PHY_REG(phy_base, 0x20), 0x7 << 4,
+				(1 << 6) | (1 << 4));
+	/* for ca training ca vref choose range1 */
+	setbits_le32(PHY_REG(phy_base, 0x1e), BIT(6));
+	setbits_le32(PHY_REG(phy_base, 0x1f), BIT(6));
+	/* for wr training PHY_0x7c[5], choose range0 */
+	clrbits_le32(PHY_REG(phy_base, 0x7c), BIT(5));
+}
+
+static int update_refresh_reg(struct dram_info *dram)
+{
+	void __iomem *pctl_base = dram->pctl;
+	u32 ret;
+
+	ret = readl(pctl_base + DDR_PCTL2_RFSHCTL3) ^ (1 << 1);
+	writel(ret, pctl_base + DDR_PCTL2_RFSHCTL3);
+
+	return 0;
+}
+
+/*
+ * rank = 1: cs0
+ * rank = 2: cs1
+ */
+int read_mr(struct dram_info *dram, u32 rank, u32 mr_num, u32 dramtype)
+{
+	u32 ret;
+	u32 i, temp;
+	u32 dqmap;
+
+	void __iomem *pctl_base = dram->pctl;
+	struct sdram_head_info_index_v2 *index =
+		(struct sdram_head_info_index_v2 *)common_info;
+	struct dq_map_info *map_info;
+
+	map_info = (struct dq_map_info *)((void *)common_info +
+		index->dq_map_index.offset * 4);
+
+	if (dramtype == LPDDR2)
+		dqmap = map_info->lp2_dq0_7_map;
+	else
+		dqmap = map_info->lp3_dq0_7_map;
+
+	pctl_read_mr(pctl_base, rank, mr_num);
+
+	ret = (readl(&dram->ddrgrf->ddr_grf_status[0]) & 0xff);
+
+	if (dramtype != LPDDR4) {
+		temp = 0;
+		for (i = 0; i < 8; i++) {
+			temp = temp | (((ret >> i) & 0x1) <<
+				       ((dqmap >> (i * 4)) & 0xf));
+		}
+	} else {
+		ret = (readl(&dram->ddrgrf->ddr_grf_status[1]) & 0xff);
+	}
+
+	return ret;
+}
+
+/* before call this function autorefresh should be disabled */
+void send_a_refresh(struct dram_info *dram)
+{
+	void __iomem *pctl_base = dram->pctl;
+
+	while (readl(pctl_base + DDR_PCTL2_DBGSTAT) & 0x3)
+		continue;
+	writel(0x3, pctl_base + DDR_PCTL2_DBGCMD);
+}
+
+void record_dq_prebit(struct dram_info *dram)
+{
+	u32 group, i, tmp;
+	void __iomem *phy_base = dram->phy;
+
+	for (group = 0; group < 4; group++) {
+		for (i = 0; i < ARRAY_SIZE(dq_sel); i++) {
+			/* l_loop_invdelaysel */
+			writel(dq_sel[i][0], PHY_REG(phy_base,
+						     grp_addr[group] + 0x2c));
+			tmp = readl(PHY_REG(phy_base, grp_addr[group] + 0x2e));
+			writel(tmp, PHY_REG(phy_base,
+					    grp_addr[group] + dq_sel[i][1]));
+
+			/* r_loop_invdelaysel */
+			writel(dq_sel[i][0], PHY_REG(phy_base,
+						     grp_addr[group] + 0x2d));
+			tmp = readl(PHY_REG(phy_base, grp_addr[group] + 0x2f));
+			writel(tmp, PHY_REG(phy_base,
+					    grp_addr[group] + dq_sel[i][2]));
+		}
+	}
+}
+
+static void update_dq_rx_prebit(struct dram_info *dram)
+{
+	void __iomem *phy_base = dram->phy;
+
+	clrsetbits_le32(PHY_REG(phy_base, 0x70), BIT(1) | BIT(6) | BIT(4),
+			BIT(4));
+	udelay(1);
+	clrbits_le32(PHY_REG(phy_base, 0x70), BIT(4));
+}
+
+static void update_dq_tx_prebit(struct dram_info *dram)
+{
+	void __iomem *phy_base = dram->phy;
+
+	clrbits_le32(PHY_REG(phy_base, 0x7a), BIT(1));
+	setbits_le32(PHY_REG(phy_base, 0x2), BIT(3));
+	setbits_le32(PHY_REG(phy_base, 0xc), BIT(6));
+	udelay(1);
+	clrbits_le32(PHY_REG(phy_base, 0xc), BIT(6));
+}
+
+static void update_ca_prebit(struct dram_info *dram)
+{
+	void __iomem *phy_base = dram->phy;
+
+	clrbits_le32(PHY_REG(phy_base, 0x25), BIT(2));
+	setbits_le32(PHY_REG(phy_base, 0x22), BIT(6));
+	udelay(1);
+	clrbits_le32(PHY_REG(phy_base, 0x22), BIT(6));
+}
+
+/*
+ * dir: 0: de-skew = delta_*
+ *	1: de-skew = reg val - delta_*
+ * delta_dir: value for differential signal: clk/
+ * delta_sig: value for single signal: ca/cmd
+ */
+static void modify_ca_deskew(struct dram_info *dram, u32 dir, int delta_dif,
+			     int delta_sig, u32 cs, u32 dramtype)
+{
+	void __iomem *phy_base = dram->phy;
+	u32 i, cs_en, tmp;
+
+	if (cs == 0)
+		cs_en = 1;
+	else if (cs == 2)
+		cs_en = 2;
+	else
+		cs_en = 3;
+
+	for (i = 0; i < 0x20; i++) {
+		if (dir == DESKEW_MDF_ABS_VAL)
+			tmp = delta_sig;
+		else
+			tmp = readl(PHY_REG(phy_base, 0x150 + i)) +
+			      delta_sig;
+		writel(tmp, PHY_REG(phy_base, 0x150 + i));
+	}
+
+	if (dir == DESKEW_MDF_ABS_VAL)
+		tmp = delta_dif;
+	else
+		tmp = readl(PHY_REG(phy_base, 0x150 + 0x17)) -
+		       delta_sig + delta_dif;
+	writel(tmp, PHY_REG(phy_base, 0x150 + 0x17));
+	writel(tmp, PHY_REG(phy_base, 0x150 + 0x18));
+	if (dramtype == LPDDR4) {
+		writel(tmp, PHY_REG(phy_base, 0x150 + 0x4));
+		writel(tmp, PHY_REG(phy_base, 0x150 + 0xa));
+
+		clrbits_le32(PHY_REG(phy_base, 0x10), cs_en << 6);
+		update_ca_prebit(dram);
+	}
+}
+
+static u32 get_min_value(struct dram_info *dram, u32 signal, u32 rank)
+{
+	u32 i, j, offset = 0;
+	u32 min = 0x3f;
+	void __iomem *phy_base = dram->phy;
+	u32 byte_en;
+
+	if (signal == SKEW_TX_SIGNAL)
+		offset = 8;
+
+	if (signal == SKEW_CA_SIGNAL) {
+		for (i = 0; i < 0x20; i++)
+			min = MIN(min, readl(PHY_REG(phy_base, 0x150  + i)));
+	} else {
+		byte_en = readl(PHY_REG(phy_base, 0xf)) & 0xf;
+		for (j = offset; j < offset + rank * 4; j++) {
+			if (!((byte_en >> (j % 4)) & 1))
+				continue;
+			for (i = 0; i < 11; i++)
+				min = MIN(min,
+					  readl(PHY_REG(phy_base,
+							dqs_dq_skew_adr[j] +
+							i)));
+		}
+	}
+
+	return min;
+}
+
+static u32 low_power_update(struct dram_info *dram, u32 en)
+{
+	void __iomem *pctl_base = dram->pctl;
+	u32 lp_stat = 0;
+
+	if (en) {
+		setbits_le32(pctl_base + DDR_PCTL2_PWRCTL, en & 0xf);
+	} else {
+		lp_stat = readl(pctl_base + DDR_PCTL2_PWRCTL) & 0xf;
+		clrbits_le32(pctl_base + DDR_PCTL2_PWRCTL, 0xf);
+	}
+
+	return lp_stat;
+}
+
+/*
+ * signal:
+ * dir: 0: de-skew = delta_*
+ *	1: de-skew = reg val - delta_*
+ * delta_dir: value for differential signal: dqs
+ * delta_sig: value for single signal: dq/dm
+ */
+static void modify_dq_deskew(struct dram_info *dram, u32 signal, u32 dir,
+			     int delta_dif, int delta_sig, u32 rank)
+{
+	void __iomem *phy_base = dram->phy;
+	u32 i, j, tmp, offset;
+	u32 byte_en;
+
+	byte_en = readl(PHY_REG(phy_base, 0xf)) & 0xf;
+
+	if (signal == SKEW_RX_SIGNAL)
+		offset = 0;
+	else
+		offset = 8;
+
+	for (j = offset; j < (offset + rank * 4); j++) {
+		if (!((byte_en >> (j % 4)) & 1))
+			continue;
+		for (i = 0; i < 0x9; i++) {
+			if (dir == DESKEW_MDF_ABS_VAL)
+				tmp = delta_sig;
+			else
+				tmp = delta_sig + readl(PHY_REG(phy_base,
+							dqs_dq_skew_adr[j] +
+							i));
+			writel(tmp, PHY_REG(phy_base, dqs_dq_skew_adr[j] + i));
+		}
+		if (dir == DESKEW_MDF_ABS_VAL)
+			tmp = delta_dif;
+		else
+			tmp = delta_dif + readl(PHY_REG(phy_base,
+						dqs_dq_skew_adr[j] + 9));
+		writel(tmp, PHY_REG(phy_base, dqs_dq_skew_adr[j] + 9));
+		writel(tmp, PHY_REG(phy_base, dqs_dq_skew_adr[j] + 0xa));
+	}
+	if (signal == SKEW_RX_SIGNAL)
+		update_dq_rx_prebit(dram);
+	else
+		update_dq_tx_prebit(dram);
+}
+
+static int data_training_rg(struct dram_info *dram, u32 cs, u32 dramtype)
+{
+	void __iomem *phy_base = dram->phy;
+	u32 ret;
+	u32 dis_auto_zq = 0;
+	u32 odt_val_up, odt_val_dn;
+	u32 i, j;
+	u32 weak_pull;
+
+	odt_val_dn = readl(PHY_REG(phy_base, 0x110));
+	odt_val_up = readl(PHY_REG(phy_base, 0x111));
+
+	if (dramtype != LPDDR4) {
+		for (i = 0; i < 4; i++) {
+			j = 0x110 + i * 0x10;
+			writel(PHY_DDR4_LPDDR3_RTT_247ohm,
+			       PHY_REG(phy_base, j));
+			writel(PHY_DDR4_LPDDR3_RTT_DISABLE,
+			       PHY_REG(phy_base, j + 0x1));
+		}
+	}
+	dis_auto_zq = pctl_dis_zqcs_aref(dram->pctl);
+	/* use normal read mode for data training */
+	clrbits_le32(PHY_REG(phy_base, 0xc), BIT(1));
+
+	if (dramtype == DDR4) {
+		weak_pull = readl(PHY_REG(phy_base, 0x114));
+		writel(weak_pull & ~(0x3), PHY_REG(phy_base, 0x114));
+		writel(weak_pull & ~(0x3), PHY_REG(phy_base, 0x124));
+		writel(weak_pull & ~(0x3), PHY_REG(phy_base, 0x134));
+		writel(weak_pull & ~(0x3), PHY_REG(phy_base, 0x144));
+	}
+
+	/* choose training cs */
+	clrsetbits_le32(PHY_REG(phy_base, 2), 0x33, (0x20 >> cs));
+	/* enable gate training */
+	clrsetbits_le32(PHY_REG(phy_base, 2), 0x33, (0x20 >> cs) | 1);
+	udelay(50);
+	ret = readl(PHY_REG(phy_base, 0x91));
+	/* disable gate training */
+	clrsetbits_le32(PHY_REG(phy_base, 2), 0x33, (0x20 >> cs) | 0);
+	clrbits_le32(PHY_REG(phy_base, 2), 0x30);
+	pctl_rest_zqcs_aref(dram->pctl, dis_auto_zq);
+
+	if (dramtype == DDR4) {
+		writel(weak_pull, PHY_REG(phy_base, 0x114));
+		writel(weak_pull, PHY_REG(phy_base, 0x124));
+		writel(weak_pull, PHY_REG(phy_base, 0x134));
+		writel(weak_pull, PHY_REG(phy_base, 0x144));
+	}
+
+	if (ret & 0x20)
+		ret = -1;
+	else
+		ret = (ret & 0xf) ^ (readl(PHY_REG(phy_base, 0xf)) & 0xf);
+
+	if (dramtype != LPDDR4) {
+		for (i = 0; i < 4; i++) {
+			j = 0x110 + i * 0x10;
+			writel(odt_val_dn, PHY_REG(phy_base, j));
+			writel(odt_val_up, PHY_REG(phy_base, j + 0x1));
+		}
+	}
+	return ret;
+}
+
+static int data_training_wl(struct dram_info *dram, u32 cs, u32 dramtype,
+			    u32 rank)
+{
+	void __iomem *pctl_base = dram->pctl;
+	void __iomem *phy_base = dram->phy;
+	u32 dis_auto_zq = 0;
+	u32 tmp;
+	u32 cur_fsp;
+	u32 timeout_us = 1000;
+
+	dis_auto_zq = pctl_dis_zqcs_aref(dram->pctl);
+
+	clrbits_le32(PHY_REG(phy_base, 0x7a), 0x1);
+
+	cur_fsp = readl(pctl_base + DDR_PCTL2_MSTR2) & 0x3;
+	tmp = readl(pctl_base + UMCTL2_REGS_FREQ(cur_fsp) + DDR_PCTL2_INIT3) &
+	      0xffff;
+	writel(tmp & 0xff, PHY_REG(phy_base, 0x3));
+
+	/* disable another cs's output */
+	if ((dramtype == DDR3 || dramtype == DDR4) && rank == 2)
+		pctl_write_mr(dram->pctl, (cs + 1) & 1, 1, tmp | (1 << 12),
+			      dramtype);
+	if (dramtype == DDR3 || dramtype == DDR4)
+		writel(0x40 | ((tmp >> 8) & 0x3f), PHY_REG(phy_base, 0x4));
+	else
+		writel(0x80 | ((tmp >> 8) & 0x3f), PHY_REG(phy_base, 0x4));
+
+	/* choose cs */
+	clrsetbits_le32(PHY_REG(phy_base, 2), (0x3 << 6) | (0x3 << 2),
+			((0x2 >> cs) << 6) | (0 << 2));
+	/* enable write leveling */
+	clrsetbits_le32(PHY_REG(phy_base, 2), (0x3 << 6) | (0x3 << 2),
+			((0x2 >> cs) << 6) | (1 << 2));
+
+	while (1) {
+		if ((readl(PHY_REG(phy_base, 0x92)) & 0xf) ==
+		    (readl(PHY_REG(phy_base, 0xf)) & 0xf))
+			break;
+
+		udelay(1);
+		if (timeout_us-- == 0) {
+			printascii("error: write leveling timeout\n");
+			while (1)
+				;
+		}
+	}
+
+	/* disable write leveling */
+	clrsetbits_le32(PHY_REG(phy_base, 2), (0x3 << 6) | (0x3 << 2),
+			((0x2 >> cs) << 6) | (0 << 2));
+	clrsetbits_le32(PHY_REG(phy_base, 2), 0x3 << 6, 0 << 6);
+
+	/* enable another cs's output */
+	if ((dramtype == DDR3 || dramtype == DDR4) && rank == 2)
+		pctl_write_mr(dram->pctl, (cs + 1) & 1, 1, tmp & ~(1 << 12),
+			      dramtype);
+
+	pctl_rest_zqcs_aref(dram->pctl, dis_auto_zq);
+
+	return 0;
+}
+
+char pattern[32] = {
+	0xaa, 0x55, 0xaa, 0x55, 0x55, 0xaa, 0x55, 0xaa,
+	0x55, 0xaa, 0x55, 0xaa, 0xaa, 0x55, 0xaa, 0x55,
+	0x55, 0x55, 0xaa, 0xaa, 0xaa, 0xaa, 0x55, 0x55,
+	0xaa, 0xaa, 0x55, 0x55, 0x55, 0x55, 0xaa, 0xaa
+};
+
+static int data_training_rd(struct dram_info *dram, u32 cs, u32 dramtype,
+			    u32 mhz)
+{
+	void __iomem *pctl_base = dram->pctl;
+	void __iomem *phy_base = dram->phy;
+	u32 trefi_1x, trfc_1x;
+	u32 dis_auto_zq = 0;
+	u32 timeout_us = 1000;
+	u32 dqs_default;
+	u32 cur_fsp;
+	u32 i;
+	struct sdram_head_info_index_v2 *index =
+		(struct sdram_head_info_index_v2 *)common_info;
+	struct dq_map_info *map_info;
+
+	map_info = (struct dq_map_info *)((void *)common_info +
+		index->dq_map_index.offset * 4);
+	/* only 1cs a time, 0:cs0 1 cs1 */
+	if (cs > 1)
+		return -1;
+
+	dqs_default = 0xf;
+	dis_auto_zq = pctl_dis_zqcs_aref(dram->pctl);
+
+	cur_fsp = readl(pctl_base + DDR_PCTL2_MSTR2) & 0x3;
+	/* config refresh timing */
+	trefi_1x = ((readl(pctl_base + UMCTL2_REGS_FREQ(cur_fsp) +
+			   DDR_PCTL2_RFSHTMG) >> 16) & 0xfff) * 32;
+	trfc_1x = readl(pctl_base + UMCTL2_REGS_FREQ(cur_fsp) +
+			DDR_PCTL2_RFSHTMG) & 0x3ff;
+	/* reg_phy_trefi[7:0] and reg_phy_trefi[13:8] */
+	clrsetbits_le32(PHY_REG(phy_base, 0x6e), 0xff, trefi_1x & 0xff);
+	clrsetbits_le32(PHY_REG(phy_base, 0x6f), 0x3f, (trefi_1x >> 8) & 0x3f);
+	/* reg_phy_trfc */
+	clrsetbits_le32(PHY_REG(phy_base, 0x57), 0xff, trfc_1x);
+	/* reg_max_refi_cnt */
+	clrsetbits_le32(PHY_REG(phy_base, 0x61), 0xf << 4, 0x8 << 4);
+
+	/* choose training cs */
+	clrsetbits_le32(PHY_REG(phy_base, 0x71), 0x3 << 6, (0x2 >> cs) << 6);
+
+	/* set dq map for ddr4 */
+	if (dramtype == DDR4) {
+		setbits_le32(PHY_REG(phy_base, 0x70), BIT(7));
+		for (i = 0; i < 4; i++) {
+			writel((map_info->ddr4_dq_map[cs * 2] >>
+				((i % 4) * 8)) & 0xff,
+				PHY_REG(phy_base, 0x238 + i));
+			writel((map_info->ddr4_dq_map[cs * 2 + 1] >>
+				((i % 4) * 8)) & 0xff,
+				PHY_REG(phy_base, 0x2b8 + i));
+		}
+	}
+
+	/* cha_l reg_l_rd_train_dqs_default[5:0] */
+	clrsetbits_le32(PHY_REG(phy_base, 0x230), 0x3f, dqs_default);
+	/* cha_h reg_h_rd_train_dqs_default[5:0] */
+	clrsetbits_le32(PHY_REG(phy_base, 0x234), 0x3f, dqs_default);
+	/* chb_l reg_l_rd_train_dqs_default[5:0] */
+	clrsetbits_le32(PHY_REG(phy_base, 0x2b0), 0x3f, dqs_default);
+	/* chb_h reg_h_rd_train_dqs_default[5:0] */
+	clrsetbits_le32(PHY_REG(phy_base, 0x2b4), 0x3f, dqs_default);
+
+	/* Choose the read train auto mode */
+	clrsetbits_le32(PHY_REG(phy_base, 0x70), 0x3, 0x1);
+	/* Enable the auto train of the read train */
+	clrsetbits_le32(PHY_REG(phy_base, 0x70), 0x3, 0x3);
+
+	/* Wait the train done. */
+	while (1) {
+		if ((readl(PHY_REG(phy_base, 0x93)) >> 7) & 0x1)
+			break;
+
+		udelay(1);
+		if (timeout_us-- == 0) {
+			printascii("error: read training timeout\n");
+			return -1;
+		}
+	}
+
+	/* Check the read train state */
+	if ((readl(PHY_REG(phy_base, 0x240)) & 0x3) ||
+	    (readl(PHY_REG(phy_base, 0x2c0)) & 0x3)) {
+		printascii("error: read training error\n");
+		return -1;
+	}
+
+	/* Exit the Read Training by setting */
+	clrbits_le32(PHY_REG(phy_base, 0x70), BIT(1));
+
+	pctl_rest_zqcs_aref(dram->pctl, dis_auto_zq);
+
+	return 0;
+}
+
+static int data_training_wr(struct dram_info *dram, u32 cs, u32 dramtype,
+			    u32 mhz, u32 dst_fsp)
+{
+	void __iomem *pctl_base = dram->pctl;
+	void __iomem *phy_base = dram->phy;
+	u32 trefi_1x, trfc_1x;
+	u32 dis_auto_zq = 0;
+	u32 timeout_us = 1000;
+	u32 cur_fsp;
+	u32 mr_tmp, cl, cwl, phy_fsp, offset = 0;
+
+	if (dramtype == LPDDR3 && mhz <= 400) {
+		phy_fsp = (readl(PHY_REG(phy_base, 0xc)) >> 0x2) & 0x3;
+		offset = (phy_fsp == 0) ? 0x5 : 0x387 + (phy_fsp - 1) * 3;
+		cl = readl(PHY_REG(phy_base, offset));
+		cwl = readl(PHY_REG(phy_base, offset + 2));
+
+		clrsetbits_le32(PHY_REG(phy_base, offset), 0x1f, 0x8);
+		clrsetbits_le32(PHY_REG(phy_base, offset + 2), 0x1f, 0x4);
+		pctl_write_mr(dram->pctl, 3, 2, 0x6, dramtype);
+	}
+
+	dis_auto_zq = pctl_dis_zqcs_aref(dram->pctl);
+
+	/* PHY_0x7b[7:0] reg_train_col_addr[7:0] */
+	clrsetbits_le32(PHY_REG(phy_base, 0x7b), 0xff, 0x0);
+	/* PHY_0x7c[4:2] reg_train_ba_addr[2:0] */
+	clrsetbits_le32(PHY_REG(phy_base, 0x7c), 0x7 << 2, 0x0 << 2);
+	/* PHY_0x7c[1:0] reg_train_col_addr[9:8] */
+	clrsetbits_le32(PHY_REG(phy_base, 0x7c), 0x3, 0x0);
+	/* PHY_0x7d[7:0] reg_train_row_addr[7:0] */
+	clrsetbits_le32(PHY_REG(phy_base, 0x7d), 0xff, 0x0);
+	/* PHY_0x7e[7:0] reg_train_row_addr[15:8] */
+	clrsetbits_le32(PHY_REG(phy_base, 0x7e), 0xff, 0x0);
+
+	/* PHY_0x71[3] wrtrain_check_data_value_random_gen */
+	clrbits_le32(PHY_REG(phy_base, 0x71), BIT(3));
+
+	/* config refresh timing */
+	cur_fsp = readl(pctl_base + DDR_PCTL2_MSTR2) & 0x3;
+	trefi_1x = ((readl(pctl_base + UMCTL2_REGS_FREQ(cur_fsp) +
+			   DDR_PCTL2_RFSHTMG) >> 16) & 0xfff) * 32;
+	trfc_1x = readl(pctl_base + UMCTL2_REGS_FREQ(cur_fsp) +
+			DDR_PCTL2_RFSHTMG) & 0x3ff;
+	/* reg_phy_trefi[7:0] and reg_phy_trefi[13:8] */
+	clrsetbits_le32(PHY_REG(phy_base, 0x6e), 0xff, trefi_1x & 0xff);
+	clrsetbits_le32(PHY_REG(phy_base, 0x6f), 0x3f, (trefi_1x >> 8) & 0x3f);
+	/* reg_phy_trfc */
+	clrsetbits_le32(PHY_REG(phy_base, 0x57), 0xff, trfc_1x);
+	/* reg_max_refi_cnt */
+	clrsetbits_le32(PHY_REG(phy_base, 0x61), 0xf << 4, 0x8 << 4);
+
+	/* choose training cs */
+	clrsetbits_le32(PHY_REG(phy_base, 0x7c), 0x3 << 6, (0x2 >> cs) << 6);
+
+	/* PHY_0x7a [4] reg_wr_train_dqs_default_bypass */
+	/* 0: Use the write-leveling value. */
+	/* 1: use reg0x233 0x237 0x2b3 0x2b7 */
+	setbits_le32(PHY_REG(phy_base, 0x7a), BIT(4));
+
+	/* PHY_0x7a [0] reg_dq_wr_train_auto */
+	setbits_le32(PHY_REG(phy_base, 0x7a), 0x1);
+
+	/* PHY_0x7a [1] reg_dq_wr_train_en */
+	setbits_le32(PHY_REG(phy_base, 0x7a), BIT(1));
+
+	send_a_refresh(dram);
+
+	while (1) {
+		if ((readl(PHY_REG(phy_base, 0x92)) >> 7) & 0x1)
+			break;
+
+		udelay(1);
+		if (timeout_us-- == 0) {
+			printascii("error: write training timeout\n");
+			while (1)
+				;
+		}
+	}
+
+	/* Check the write train state */
+	if ((readl(PHY_REG(phy_base, 0x90)) >> 5) & 0x7) {
+		printascii("error: write training error\n");
+		return -1;
+	}
+
+	/* PHY_0x7a [1] reg_dq_wr_train_en */
+	clrbits_le32(PHY_REG(phy_base, 0x7a), BIT(1));
+
+	pctl_rest_zqcs_aref(dram->pctl, dis_auto_zq);
+
+	/* save LPDDR4 write vref to fsp_param for dfs */
+	if (dramtype == LPDDR4) {
+		fsp_param[dst_fsp].vref_dq[cs] =
+			((readl(PHY_REG(phy_base, 0x384)) & 0x3f) +
+			 (readl(PHY_REG(phy_base, 0x385)) & 0x3f)) / 2;
+		/* add range info */
+		fsp_param[dst_fsp].vref_dq[cs] |=
+			((readl(PHY_REG(phy_base, 0x7c)) & BIT(5)) << 1);
+	}
+
+	if (dramtype == LPDDR3 && mhz <= 400) {
+		clrsetbits_le32(PHY_REG(phy_base, offset), 0x1f, cl);
+		clrsetbits_le32(PHY_REG(phy_base, offset + 2), 0x1f, cwl);
+		mr_tmp = readl(pctl_base + UMCTL2_REGS_FREQ(cur_fsp) +
+			       DDR_PCTL2_INIT3);
+		pctl_write_mr(dram->pctl, 3, 2, mr_tmp & PCTL2_MR_MASK,
+			      dramtype);
+	}
+
+	return 0;
+}
+
+static int data_training(struct dram_info *dram, u32 cs,
+			 struct rv1126_sdram_params *sdram_params, u32 dst_fsp,
+			 u32 training_flag)
+{
+	u32 ret = 0;
+
+	if (training_flag == FULL_TRAINING)
+		training_flag = READ_GATE_TRAINING | WRITE_LEVELING |
+				WRITE_TRAINING | READ_TRAINING;
+
+	if ((training_flag & WRITE_LEVELING) == WRITE_LEVELING) {
+		ret = data_training_wl(dram, cs,
+				       sdram_params->base.dramtype,
+				       sdram_params->ch.cap_info.rank);
+		if (ret != 0)
+			goto out;
+	}
+
+	if ((training_flag & READ_GATE_TRAINING) == READ_GATE_TRAINING) {
+		ret = data_training_rg(dram, cs,
+				       sdram_params->base.dramtype);
+		if (ret != 0)
+			goto out;
+	}
+
+	if ((training_flag & READ_TRAINING) == READ_TRAINING) {
+		ret = data_training_rd(dram, cs,
+				       sdram_params->base.dramtype,
+				       sdram_params->base.ddr_freq);
+		if (ret != 0)
+			goto out;
+	}
+
+	if ((training_flag & WRITE_TRAINING) == WRITE_TRAINING) {
+		ret = data_training_wr(dram, cs,
+				       sdram_params->base.dramtype,
+				       sdram_params->base.ddr_freq, dst_fsp);
+		if (ret != 0)
+			goto out;
+	}
+
+out:
+	return ret;
+}
+
+static int get_wrlvl_val(struct dram_info *dram,
+			 struct rv1126_sdram_params *sdram_params)
+{
+	u32 i, j, clk_skew;
+	void __iomem *phy_base = dram->phy;
+	u32 lp_stat;
+	int ret;
+
+	lp_stat = low_power_update(dram, 0);
+
+	clk_skew = readl(PHY_REG(phy_base, 0x150 + 0x17));
+
+	ret = data_training(dram, 0, sdram_params, 0, WRITE_LEVELING);
+	if (sdram_params->ch.cap_info.rank == 2)
+		ret |= data_training(dram, 1, sdram_params, 0, WRITE_LEVELING);
+
+	for (j = 0; j < 2; j++)
+		for (i = 0; i < 4; i++)
+			wrlvl_result[j][i] =
+				readl(PHY_REG(phy_base,
+					      wrlvl_result_offset[j][i])) -
+				clk_skew;
+
+	low_power_update(dram, lp_stat);
+
+	return ret;
+}
+
+static int high_freq_training(struct dram_info *dram,
+			      struct rv1126_sdram_params *sdram_params,
+			      u32 fsp)
+{
+	u32 i, j;
+	void __iomem *phy_base = dram->phy;
+	u32 dramtype = sdram_params->base.dramtype;
+	int min_val;
+	u32 dqs_skew, clk_skew, ca_skew;
+	int ret;
+
+	dqs_skew = 0;
+	for (j = 0; j < sdram_params->ch.cap_info.rank; j++)
+		for (i = 0; i < ARRAY_SIZE(wrlvl_result[0]); i++)
+			dqs_skew += wrlvl_result[j][i];
+	dqs_skew = dqs_skew / (sdram_params->ch.cap_info.rank *
+			       ARRAY_SIZE(wrlvl_result[0]));
+
+	clk_skew = 0x20 - dqs_skew;
+	dqs_skew = 0x20;
+
+	if (dramtype == LPDDR4) {
+		clk_skew = 0;
+		ca_skew = 0;
+	} else if (dramtype == LPDDR3) {
+		ca_skew = clk_skew - 4;
+	} else {
+		ca_skew = clk_skew;
+	}
+	modify_ca_deskew(dram, DESKEW_MDF_ABS_VAL, clk_skew, ca_skew, 3,
+			 dramtype);
+
+	writel(wrlvl_result[0][0] + clk_skew, PHY_REG(phy_base, 0x233));
+	writel(wrlvl_result[0][1] + clk_skew, PHY_REG(phy_base, 0x237));
+	writel(wrlvl_result[0][2] + clk_skew, PHY_REG(phy_base, 0x2b3));
+	writel(wrlvl_result[0][3] + clk_skew, PHY_REG(phy_base, 0x2b7));
+	ret = data_training(dram, 0, sdram_params, fsp, READ_GATE_TRAINING |
+			    READ_TRAINING | WRITE_TRAINING);
+	if (sdram_params->ch.cap_info.rank == 2) {
+		writel(wrlvl_result[1][0] + clk_skew, PHY_REG(phy_base, 0x233));
+		writel(wrlvl_result[1][1] + clk_skew, PHY_REG(phy_base, 0x237));
+		writel(wrlvl_result[1][2] + clk_skew, PHY_REG(phy_base, 0x2b3));
+		writel(wrlvl_result[1][3] + clk_skew, PHY_REG(phy_base, 0x2b7));
+		ret |= data_training(dram, 1, sdram_params, fsp,
+				     READ_GATE_TRAINING | READ_TRAINING |
+				     WRITE_TRAINING);
+	}
+	if (ret)
+		goto out;
+
+	record_dq_prebit(dram);
+
+	min_val = get_min_value(dram, SKEW_RX_SIGNAL,
+				sdram_params->ch.cap_info.rank) * -1;
+	modify_dq_deskew(dram, SKEW_RX_SIGNAL, DESKEW_MDF_DIFF_VAL,
+			 min_val, min_val, sdram_params->ch.cap_info.rank);
+
+	min_val = MIN(get_min_value(dram, SKEW_TX_SIGNAL,
+				    sdram_params->ch.cap_info.rank),
+		      get_min_value(dram, SKEW_CA_SIGNAL,
+				    sdram_params->ch.cap_info.rank)) * -1;
+
+	/* clk = 0, rx all skew -7, tx - min_value */
+	modify_ca_deskew(dram, DESKEW_MDF_DIFF_VAL, min_val, min_val, 3,
+			 dramtype);
+
+	modify_dq_deskew(dram, SKEW_TX_SIGNAL, DESKEW_MDF_DIFF_VAL,
+			 min_val, min_val, sdram_params->ch.cap_info.rank);
+
+	ret = data_training(dram, 0, sdram_params, 0, READ_GATE_TRAINING);
+	if (sdram_params->ch.cap_info.rank == 2)
+		ret |= data_training(dram, 1, sdram_params, 0,
+				     READ_GATE_TRAINING);
+out:
+	return ret;
+}
+
+static void set_ddrconfig(struct dram_info *dram, u32 ddrconfig)
+{
+	writel(ddrconfig, &dram->msch->deviceconf);
+	clrsetbits_le32(&dram->grf->noc_con0, 0x3 << 0, 0 << 0);
+}
+
+static void update_noc_timing(struct dram_info *dram,
+			      struct rv1126_sdram_params *sdram_params)
+{
+	writel(sdram_params->ch.noc_timings.ddrtiminga0.d32,
+	       &dram->msch->ddrtiminga0);
+	writel(sdram_params->ch.noc_timings.ddrtimingb0.d32,
+	       &dram->msch->ddrtimingb0);
+	writel(sdram_params->ch.noc_timings.ddrtimingc0.d32,
+	       &dram->msch->ddrtimingc0);
+	writel(sdram_params->ch.noc_timings.devtodev0.d32,
+	       &dram->msch->devtodev0);
+	writel(sdram_params->ch.noc_timings.ddrmode.d32, &dram->msch->ddrmode);
+	writel(sdram_params->ch.noc_timings.ddr4timing.d32,
+	       &dram->msch->ddr4timing);
+}
+
+static void dram_all_config(struct dram_info *dram,
+			    struct rv1126_sdram_params *sdram_params)
+{
+	struct sdram_cap_info *cap_info = &sdram_params->ch.cap_info;
+	u32 dram_type = sdram_params->base.dramtype;
+	void __iomem *pctl_base = dram->pctl;
+	u32 sys_reg2 = 0;
+	u32 sys_reg3 = 0;
+	u64 cs_cap[2];
+	u32 cs_pst;
+
+	set_ddrconfig(dram, cap_info->ddrconfig);
+	sdram_org_config(cap_info, &sdram_params->base, &sys_reg2,
+			 &sys_reg3, 0);
+	writel(sys_reg2, &dram->pmugrf->os_reg[2]);
+	writel(sys_reg3, &dram->pmugrf->os_reg[3]);
+
+	cs_cap[0] = sdram_get_cs_cap(cap_info, 0, dram_type);
+	cs_cap[1] = sdram_get_cs_cap(cap_info, 1, dram_type);
+
+	if (cap_info->rank == 2) {
+		cs_pst = (readl(pctl_base + DDR_PCTL2_ADDRMAP0) & 0x1f) +
+			6 + 2;
+		if (cs_pst > 28)
+			cs_cap[0] = 1 << cs_pst;
+	}
+
+	writel(((((cs_cap[1] >> 20) / 64) & 0xff) << 8) |
+			(((cs_cap[0] >> 20) / 64) & 0xff),
+			&dram->msch->devicesize);
+	update_noc_timing(dram, sdram_params);
+}
+
+static void enable_low_power(struct dram_info *dram,
+			     struct rv1126_sdram_params *sdram_params)
+{
+	void __iomem *pctl_base = dram->pctl;
+	u32 grf_lp_con;
+
+	writel(0x1f1f0617, &dram->ddrgrf->ddr_grf_con[1]);
+
+	if (sdram_params->base.dramtype == DDR4)
+		grf_lp_con = (0x7 << 16) | (1 << 1);
+	else if (sdram_params->base.dramtype == DDR3)
+		grf_lp_con = (0x7 << 16) | (1 << 0);
+	else
+		grf_lp_con = (0x7 << 16) | (1 << 2);
+
+	/* en lpckdis_en */
+	grf_lp_con = grf_lp_con | (0x1 << (9 + 16)) | (0x1 << 9);
+	writel(grf_lp_con, &dram->ddrgrf->ddr_grf_lp_con);
+
+	/* enable sr, pd */
+	if (dram->pd_idle == 0)
+		clrbits_le32(pctl_base + DDR_PCTL2_PWRCTL, (1 << 1));
+	else
+		setbits_le32(pctl_base + DDR_PCTL2_PWRCTL, (1 << 1));
+	if (dram->sr_idle == 0)
+		clrbits_le32(pctl_base + DDR_PCTL2_PWRCTL, 1);
+	else
+		setbits_le32(pctl_base + DDR_PCTL2_PWRCTL, 1);
+	setbits_le32(pctl_base + DDR_PCTL2_PWRCTL, (1 << 3));
+}
+
+static void ddr_set_atags(struct dram_info *dram,
+			  struct rv1126_sdram_params *sdram_params)
+{
+	struct sdram_cap_info *cap_info = &sdram_params->ch.cap_info;
+	u32 dram_type = sdram_params->base.dramtype;
+	void __iomem *pctl_base = dram->pctl;
+	struct tag_serial t_serial;
+	struct tag_ddr_mem t_ddrmem;
+	struct tag_soc_info t_socinfo;
+	u64 cs_cap[2];
+	u32 cs_pst = 0;
+
+	cs_cap[0] = sdram_get_cs_cap(cap_info, 0, dram_type);
+	cs_cap[1] = sdram_get_cs_cap(cap_info, 1, dram_type);
+
+	memset(&t_serial, 0, sizeof(struct tag_serial));
+
+	t_serial.version = 0;
+	t_serial.enable = 1;
+	t_serial.addr = CONFIG_DEBUG_UART_BASE;
+	t_serial.baudrate = CONFIG_BAUDRATE;
+	t_serial.m_mode = SERIAL_M_MODE_M0;
+	t_serial.id = 2;
+
+	atags_destroy();
+	atags_set_tag(ATAG_SERIAL,  &t_serial);
+
+	memset(&t_ddrmem, 0, sizeof(struct tag_ddr_mem));
+	if (cap_info->row_3_4) {
+		cs_cap[0] =  cs_cap[0] * 3 / 4;
+		cs_cap[1] =  cs_cap[1] * 3 / 4;
+	}
+	t_ddrmem.version = 0;
+	t_ddrmem.bank[0] = CONFIG_SYS_SDRAM_BASE;
+	if (cs_cap[1]) {
+		cs_pst = (readl(pctl_base + DDR_PCTL2_ADDRMAP0) & 0x1f) +
+			6 + 2;
+	}
+
+	if (cs_cap[1] && cs_pst > 27) {
+		t_ddrmem.count = 2;
+		t_ddrmem.bank[1] = 1 << cs_pst;
+		t_ddrmem.bank[2] = cs_cap[0];
+		t_ddrmem.bank[3] = cs_cap[1];
+	} else {
+		t_ddrmem.count = 1;
+		t_ddrmem.bank[1] = (u64)cs_cap[0] + (u64)cs_cap[1];
+	}
+
+	atags_set_tag(ATAG_DDR_MEM,  &t_ddrmem);
+
+	memset(&t_socinfo, 0, sizeof(struct tag_soc_info));
+	t_socinfo.version = 0;
+	t_socinfo.name = 0x1126;
+}
+
+static void print_ddr_info(struct rv1126_sdram_params *sdram_params)
+{
+	u32 split;
+
+	if ((readl(DDR_GRF_BASE_ADDR + DDR_GRF_SPLIT_CON) &
+	     (1 << SPLIT_BYPASS_OFFSET)) != 0)
+		split = 0;
+	else
+		split = readl(DDR_GRF_BASE_ADDR + DDR_GRF_SPLIT_CON) &
+			SPLIT_SIZE_MASK;
+
+	sdram_print_ddr_info(&sdram_params->ch.cap_info,
+			     &sdram_params->base, split);
+}
+
+static int sdram_init_(struct dram_info *dram,
+		       struct rv1126_sdram_params *sdram_params, u32 post_init)
+{
+	void __iomem *pctl_base = dram->pctl;
+	void __iomem *phy_base = dram->phy;
+	u32 ddr4_vref;
+	u32 mr_tmp;
+
+	rkclk_configure_ddr(dram, sdram_params);
+
+	rkclk_ddr_reset(dram, 1, 1, 1, 1);
+	udelay(10);
+
+	rkclk_ddr_reset(dram, 1, 1, 1, 0);
+	phy_cfg(dram, sdram_params);
+
+	rkclk_ddr_reset(dram, 1, 1, 0, 0);
+	phy_pll_set(dram, sdram_params->base.ddr_freq * MHZ, 1);
+
+	rkclk_ddr_reset(dram, 1, 0, 0, 0);
+	pctl_cfg(dram->pctl, &sdram_params->pctl_regs,
+		 dram->sr_idle, dram->pd_idle);
+
+	/* set frequency_mode */
+	setbits_le32(pctl_base + DDR_PCTL2_MSTR, 0x1 << 29);
+	/* set target_frequency to Frequency 0 */
+	clrsetbits_le32(pctl_base + DDR_PCTL2_MSTR2, 0x3, 0);
+
+	set_ds_odt(dram, sdram_params, 0);
+	sdram_params->ch.cap_info.ddrconfig = calculate_ddrconfig(sdram_params);
+	set_ctl_address_map(dram, sdram_params);
+
+	setbits_le32(pctl_base + DDR_PCTL2_DFIMISC, (1 << 5) | (1 << 4));
+
+	rkclk_ddr_reset(dram, 0, 0, 0, 0);
+
+	while ((readl(pctl_base + DDR_PCTL2_STAT) & 0x7) == 0)
+		continue;
+
+	if (sdram_params->base.dramtype == LPDDR3) {
+		pctl_write_mr(dram->pctl, 3, 11, lp3_odt_value, LPDDR3);
+	} else if (sdram_params->base.dramtype == LPDDR4) {
+		mr_tmp = readl(pctl_base + DDR_PCTL2_INIT6);
+		/* MR11 */
+		pctl_write_mr(dram->pctl, 3, 11,
+			      mr_tmp >> PCTL2_LPDDR4_MR11_SHIFT & PCTL2_MR_MASK,
+			      LPDDR4);
+		/* MR12 */
+		pctl_write_mr(dram->pctl, 3, 12,
+			      mr_tmp >> PCTL2_LPDDR4_MR12_SHIFT & PCTL2_MR_MASK,
+			      LPDDR4);
+
+		mr_tmp = readl(pctl_base + DDR_PCTL2_INIT7);
+		/* MR22 */
+		pctl_write_mr(dram->pctl, 3, 22,
+			      mr_tmp >> PCTL2_LPDDR4_MR22_SHIFT & PCTL2_MR_MASK,
+			      LPDDR4);
+		/* MR14 */
+		pctl_write_mr(dram->pctl, 3, 14,
+			      mr_tmp >> PCTL2_LPDDR4_MR14_SHIFT & PCTL2_MR_MASK,
+			      LPDDR4);
+	}
+
+	if (data_training(dram, 0, sdram_params, 0, READ_GATE_TRAINING) != 0) {
+		if (post_init != 0)
+			printascii("DTT cs0 error\n");
+		return -1;
+	}
+
+	if (post_init != 0 && sdram_params->ch.cap_info.rank == 2) {
+		if (data_training(dram, 1, sdram_params, 0,
+				  READ_GATE_TRAINING) != 0) {
+			printascii("DTT cs1 error\n");
+			return -1;
+		}
+	}
+
+	if (sdram_params->base.dramtype == DDR4) {
+		ddr4_vref = readl(PHY_REG(phy_base, 0x105)) * 39;
+		pctl_write_vrefdq(dram->pctl, 0x3, ddr4_vref,
+				  sdram_params->base.dramtype);
+	}
+
+	dram_all_config(dram, sdram_params);
+	enable_low_power(dram, sdram_params);
+
+	return 0;
+}
+
+static u64 dram_detect_cap(struct dram_info *dram,
+			   struct rv1126_sdram_params *sdram_params,
+			   unsigned char channel)
+{
+	struct sdram_cap_info *cap_info = &sdram_params->ch.cap_info;
+	void __iomem *pctl_base = dram->pctl;
+	void __iomem *phy_base = dram->phy;
+	u32 mr8;
+
+	u32 bktmp;
+	u32 coltmp;
+	u32 rowtmp;
+	u32 cs;
+	u32 bw = 1;
+	u32 dram_type = sdram_params->base.dramtype;
+	u32 pwrctl;
+
+	cap_info->bw = bw;
+	if (dram_type != LPDDR4) {
+		if (dram_type != DDR4) {
+			coltmp = 12;
+			bktmp = 3;
+			if (dram_type == LPDDR2)
+				rowtmp = 15;
+			else
+				rowtmp = 16;
+
+			if (sdram_detect_col(cap_info, coltmp) != 0)
+				goto cap_err;
+
+			sdram_detect_bank(cap_info, coltmp, bktmp);
+			sdram_detect_dbw(cap_info, dram_type);
+		} else {
+			coltmp = 10;
+			bktmp = 4;
+			rowtmp = 17;
+
+			cap_info->col = 10;
+			cap_info->bk = 2;
+			sdram_detect_bg(cap_info, coltmp);
+		}
+
+		if (sdram_detect_row(cap_info, coltmp, bktmp, rowtmp) != 0)
+			goto cap_err;
+
+		sdram_detect_row_3_4(cap_info, coltmp, bktmp);
+	} else {
+		mr8 = (read_mr(dram, 1, 8, dram_type) >> 2) & 0xf;
+		cap_info->col = 10;
+		cap_info->bk = 3;
+		cap_info->cs0_row = 14 + (mr8 + 1) / 2;
+		if (mr8 % 2)
+			cap_info->row_3_4 = 1;
+		else
+			cap_info->row_3_4 = 0;
+		cap_info->dbw = 1;
+		cap_info->bw = 2;
+	}
+
+	pwrctl = readl(pctl_base + DDR_PCTL2_PWRCTL);
+	writel(0, pctl_base + DDR_PCTL2_PWRCTL);
+
+	if (data_training(dram, 1, sdram_params, 0, READ_GATE_TRAINING) == 0)
+		cs = 1;
+	else
+		cs = 0;
+	cap_info->rank = cs + 1;
+
+	if (dram_type != LPDDR4) {
+		setbits_le32(PHY_REG(phy_base, 0xf), 0xf);
+
+		phy_soft_reset(dram);
+
+		if (data_training(dram, 0, sdram_params, 0,
+				  READ_GATE_TRAINING) == 0)
+			cap_info->bw = 2;
+		else
+			cap_info->bw = 1;
+	}
+
+	writel(pwrctl, pctl_base + DDR_PCTL2_PWRCTL);
+
+	cap_info->cs0_high16bit_row = cap_info->cs0_row;
+	if (cs) {
+		cap_info->cs1_row = cap_info->cs0_row;
+		cap_info->cs1_high16bit_row = cap_info->cs0_row;
+	} else {
+		cap_info->cs1_row = 0;
+		cap_info->cs1_high16bit_row = 0;
+	}
+
+	return 0;
+cap_err:
+	return -1;
+}
+
+static int dram_detect_cs1_row(struct dram_info *dram,
+			       struct rv1126_sdram_params *sdram_params,
+			       unsigned char channel)
+{
+	struct sdram_cap_info *cap_info = &sdram_params->ch.cap_info;
+	void __iomem *pctl_base = dram->pctl;
+	u32 ret = 0;
+	void __iomem *test_addr;
+	u32 row, bktmp, coltmp, bw;
+	u64 cs0_cap;
+	u32 byte_mask;
+	u32 cs_pst;
+	u32 cs_add = 0;
+	u32 max_row;
+
+	if (cap_info->rank == 2) {
+		cs_pst = (readl(pctl_base + DDR_PCTL2_ADDRMAP0) & 0x1f) +
+			6 + 2;
+		if (cs_pst < 28)
+			cs_add = 1;
+
+		cs0_cap = 1 << cs_pst;
+
+		if (sdram_params->base.dramtype == DDR4) {
+			if (cap_info->dbw == 0)
+				bktmp = cap_info->bk + 2;
+			else
+				bktmp = cap_info->bk + 1;
+		} else {
+			bktmp = cap_info->bk;
+		}
+		bw = cap_info->bw;
+		coltmp = cap_info->col;
+
+		if (bw == 2)
+			byte_mask = 0xFFFF;
+		else
+			byte_mask = 0xFF;
+
+		max_row = (cs_pst == 31) ? 30 : 31;
+
+		max_row = max_row - bktmp - coltmp - bw - cs_add + 1;
+
+		row = (cap_info->cs0_row > max_row) ? max_row :
+			cap_info->cs0_row;
+
+		for (; row > 12; row--) {
+			test_addr = (void __iomem *)(CONFIG_SYS_SDRAM_BASE +
+				    (u32)cs0_cap +
+				    (1ul << (row + bktmp + coltmp +
+					     cs_add + bw - 1ul)));
+
+			writel(0, CONFIG_SYS_SDRAM_BASE + (u32)cs0_cap);
+			writel(PATTERN, test_addr);
+
+			if (((readl(test_addr) & byte_mask) ==
+			     (PATTERN & byte_mask)) &&
+			    ((readl(CONFIG_SYS_SDRAM_BASE + (u32)cs0_cap) &
+			      byte_mask) == 0)) {
+				ret = row;
+				break;
+			}
+		}
+	}
+
+	return ret;
+}
+
+/* return: 0 = success, other = fail */
+static int sdram_init_detect(struct dram_info *dram,
+			     struct rv1126_sdram_params *sdram_params)
+{
+	struct sdram_cap_info *cap_info = &sdram_params->ch.cap_info;
+	u32 ret;
+	u32 sys_reg = 0;
+	u32 sys_reg3 = 0;
+
+	if (sdram_init_(dram, sdram_params, 0) != 0)
+		return -1;
+
+	if (sdram_params->base.dramtype == DDR3) {
+		writel(PATTERN, CONFIG_SYS_SDRAM_BASE);
+		if (readl(CONFIG_SYS_SDRAM_BASE) != PATTERN)
+			return -1;
+	}
+
+	if (dram_detect_cap(dram, sdram_params, 0) != 0)
+		return -1;
+
+	pctl_remodify_sdram_params(&sdram_params->pctl_regs, cap_info,
+				   sdram_params->base.dramtype);
+	ret = sdram_init_(dram, sdram_params, 1);
+	if (ret != 0)
+		goto out;
+
+	cap_info->cs1_row =
+		dram_detect_cs1_row(dram, sdram_params, 0);
+	if (cap_info->cs1_row) {
+		sys_reg = readl(&dram->pmugrf->os_reg[2]);
+		sys_reg3 = readl(&dram->pmugrf->os_reg[3]);
+		SYS_REG_ENC_CS1_ROW(cap_info->cs1_row,
+				    sys_reg, sys_reg3, 0);
+		writel(sys_reg, &dram->pmugrf->os_reg[2]);
+		writel(sys_reg3, &dram->pmugrf->os_reg[3]);
+	}
+
+	sdram_detect_high_row(cap_info);
+
+out:
+	return ret;
+}
+
+struct rv1126_sdram_params *get_default_sdram_config(u32 freq_mhz)
+{
+	u32 i;
+	u32 offset = 0;
+	struct ddr2_3_4_lp2_3_info *ddr_info;
+
+	if (!freq_mhz) {
+		ddr_info = get_ddr_drv_odt_info(sdram_configs[0].base.dramtype);
+		if (ddr_info)
+			freq_mhz =
+				(ddr_info->ddr_freq0_1 >> DDR_FREQ_F0_SHIFT) &
+				DDR_FREQ_MASK;
+		else
+			freq_mhz = 0;
+	}
+
+	for (i = 0; i < ARRAY_SIZE(sdram_configs); i++) {
+		if (sdram_configs[i].base.ddr_freq == 0 ||
+		    freq_mhz < sdram_configs[i].base.ddr_freq)
+			break;
+	}
+	offset = i == 0 ? 0 : i - 1;
+
+	return &sdram_configs[offset];
+}
+
+static const u16 pctl_need_update_reg[] = {
+	DDR_PCTL2_RFSHTMG,
+	DDR_PCTL2_INIT3,
+	DDR_PCTL2_INIT4,
+	DDR_PCTL2_INIT6,
+	DDR_PCTL2_INIT7,
+	DDR_PCTL2_DRAMTMG0,
+	DDR_PCTL2_DRAMTMG1,
+	DDR_PCTL2_DRAMTMG2,
+	DDR_PCTL2_DRAMTMG3,
+	DDR_PCTL2_DRAMTMG4,
+	DDR_PCTL2_DRAMTMG5,
+	DDR_PCTL2_DRAMTMG6,
+	DDR_PCTL2_DRAMTMG7,
+	DDR_PCTL2_DRAMTMG8,
+	DDR_PCTL2_DRAMTMG9,
+	DDR_PCTL2_DRAMTMG12,
+	DDR_PCTL2_DRAMTMG13,
+	DDR_PCTL2_DRAMTMG14,
+	DDR_PCTL2_ZQCTL0,
+	DDR_PCTL2_DFITMG0,
+	DDR_PCTL2_ODTCFG
+};
+
+static const u16 phy_need_update_reg[] = {
+	0x14,
+	0x18,
+	0x1c
+};
+
+static void pre_set_rate(struct dram_info *dram,
+			 struct rv1126_sdram_params *sdram_params,
+			 u32 dst_fsp, u32 dst_fsp_lp4)
+{
+	u32 i, j, find;
+	void __iomem *pctl_base = dram->pctl;
+	void __iomem *phy_base = dram->phy;
+	u32 phy_offset;
+	u32 mr_tmp;
+	u32 dramtype = sdram_params->base.dramtype;
+
+	sw_set_req(dram);
+	/* pctl timing update */
+	for (i = 0, find = 0; i < ARRAY_SIZE(pctl_need_update_reg); i++) {
+		for (j = find; sdram_params->pctl_regs.pctl[j][0] != 0xFFFFFFFF;
+		     j++) {
+			if (sdram_params->pctl_regs.pctl[j][0] ==
+			    pctl_need_update_reg[i]) {
+				writel(sdram_params->pctl_regs.pctl[j][1],
+				       pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +
+				       pctl_need_update_reg[i]);
+				find = j;
+				break;
+			}
+		}
+	}
+	sw_set_ack(dram);
+
+	/* phy timing update */
+	if (dst_fsp == 0)
+		phy_offset = 0;
+	else
+		phy_offset = PHY_REG(0, 0x387 - 5 + (dst_fsp - 1) * 3);
+	/* cl cwl al update */
+	for (i = 0, find = 0; i < ARRAY_SIZE(phy_need_update_reg); i++) {
+		for (j = find; sdram_params->phy_regs.phy[j][0] != 0xFFFFFFFF;
+		     j++) {
+			if (sdram_params->phy_regs.phy[j][0] ==
+			    phy_need_update_reg[i]) {
+				writel(sdram_params->phy_regs.phy[j][1],
+				       phy_base + phy_offset +
+				       phy_need_update_reg[i]);
+				find = j;
+				break;
+			}
+		}
+	}
+
+	set_ds_odt(dram, sdram_params, dst_fsp);
+	if (dramtype == LPDDR4) {
+		mr_tmp = readl(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +
+			       DDR_PCTL2_INIT4);
+		/* MR13 */
+		pctl_write_mr(dram->pctl, 3, 13,
+			      ((mr_tmp >> PCTL2_LPDDR4_MR13_SHIFT &
+			       PCTL2_MR_MASK) & (~(BIT(7) | BIT(6)))) |
+			      ((0x2 << 6) >> dst_fsp_lp4), dramtype);
+		writel(((mr_tmp >> PCTL2_LPDDR4_MR13_SHIFT &
+				      PCTL2_MR_MASK) & (~(BIT(7) | BIT(6)))) |
+				      ((0x2 << 6) >> dst_fsp_lp4),
+				       PHY_REG(phy_base, 0x1b));
+		/* MR3 */
+		pctl_write_mr(dram->pctl, 3, 3,
+			      mr_tmp >> PCTL2_LPDDR234_MR3_SHIFT &
+			      PCTL2_MR_MASK,
+			      dramtype);
+		writel(mr_tmp >> PCTL2_LPDDR234_MR3_SHIFT & PCTL2_MR_MASK,
+		       PHY_REG(phy_base, 0x19));
+
+		mr_tmp = readl(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +
+			       DDR_PCTL2_INIT3);
+		/* MR1 */
+		pctl_write_mr(dram->pctl, 3, 1,
+			      mr_tmp >> PCTL2_LPDDR234_MR1_SHIFT &
+			      PCTL2_MR_MASK,
+			      dramtype);
+		writel(mr_tmp >> PCTL2_LPDDR234_MR1_SHIFT & PCTL2_MR_MASK,
+		       PHY_REG(phy_base, 0x17));
+		/* MR2 */
+		pctl_write_mr(dram->pctl, 3, 2, mr_tmp & PCTL2_MR_MASK,
+			      dramtype);
+		writel(mr_tmp & PCTL2_MR_MASK,
+		       PHY_REG(phy_base, 0x18));
+
+		mr_tmp = readl(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +
+			       DDR_PCTL2_INIT6);
+		/* MR11 */
+		pctl_write_mr(dram->pctl, 3, 11,
+			      mr_tmp >> PCTL2_LPDDR4_MR11_SHIFT & PCTL2_MR_MASK,
+			      dramtype);
+		writel(mr_tmp >> PCTL2_LPDDR4_MR11_SHIFT & PCTL2_MR_MASK,
+		       PHY_REG(phy_base, 0x1a));
+		/* MR12 */
+		pctl_write_mr(dram->pctl, 3, 12,
+			      mr_tmp >> PCTL2_LPDDR4_MR12_SHIFT & PCTL2_MR_MASK,
+			      dramtype);
+
+		mr_tmp = readl(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +
+			       DDR_PCTL2_INIT7);
+		/* MR22 */
+		pctl_write_mr(dram->pctl, 3, 22,
+			      mr_tmp >> PCTL2_LPDDR4_MR22_SHIFT & PCTL2_MR_MASK,
+			      dramtype);
+		writel(mr_tmp >> PCTL2_LPDDR4_MR22_SHIFT & PCTL2_MR_MASK,
+		       PHY_REG(phy_base, 0x1d));
+		/* MR14 */
+		pctl_write_mr(dram->pctl, 3, 14,
+			      mr_tmp >> PCTL2_LPDDR4_MR14_SHIFT & PCTL2_MR_MASK,
+			      dramtype);
+		writel(mr_tmp >> PCTL2_LPDDR4_MR14_SHIFT & PCTL2_MR_MASK,
+		       PHY_REG(phy_base, 0x1c));
+	}
+
+	update_noc_timing(dram, sdram_params);
+}
+
+static void save_fsp_param(struct dram_info *dram, u32 dst_fsp,
+			   struct rv1126_sdram_params *sdram_params)
+{
+	void __iomem *pctl_base = dram->pctl;
+	void __iomem *phy_base = dram->phy;
+	struct rv1126_fsp_param *p_fsp_param = &fsp_param[dst_fsp];
+	u32 temp, temp1;
+	struct ddr2_3_4_lp2_3_info *ddr_info;
+
+	ddr_info = get_ddr_drv_odt_info(sdram_params->base.dramtype);
+
+	p_fsp_param->freq_mhz = sdram_params->base.ddr_freq;
+
+	if (sdram_params->base.dramtype == LPDDR4) {
+		p_fsp_param->rd_odt_up_en = 0;
+		p_fsp_param->rd_odt_down_en = 1;
+	} else {
+		p_fsp_param->rd_odt_up_en =
+			ODT_INFO_PULLUP_EN(ddr_info->odt_info);
+		p_fsp_param->rd_odt_down_en =
+			ODT_INFO_PULLDOWN_EN(ddr_info->odt_info);
+	}
+
+	if (p_fsp_param->rd_odt_up_en)
+		p_fsp_param->rd_odt = readl(PHY_REG(phy_base, 0x111));
+	else if (p_fsp_param->rd_odt_down_en)
+		p_fsp_param->rd_odt = readl(PHY_REG(phy_base, 0x110));
+	else
+		p_fsp_param->rd_odt = 0;
+	p_fsp_param->wr_dq_drv = readl(PHY_REG(phy_base, 0x112));
+	p_fsp_param->wr_ca_drv = readl(PHY_REG(phy_base, 0x100));
+	p_fsp_param->wr_ckcs_drv = readl(PHY_REG(phy_base, 0x102));
+	p_fsp_param->vref_inner = readl(PHY_REG(phy_base, 0x128));
+	p_fsp_param->vref_out = readl(PHY_REG(phy_base, 0x105));
+
+	if (sdram_params->base.dramtype == DDR3) {
+		temp = readl(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +
+			     DDR_PCTL2_INIT3);
+		temp = (temp >> PCTL2_DDR34_MR1_SHIFT) & PCTL2_MR_MASK;
+		p_fsp_param->ds_pdds = ((temp >> 1) & 0x1) |
+				       (((temp >> 5) & 0x1) << 1);
+		p_fsp_param->dq_odt = ((temp >> 2) & 0x1) |
+				      (((temp >> 6) & 0x1) << 1) |
+				      (((temp >> 9) & 0x1) << 2);
+		p_fsp_param->ca_odt = p_fsp_param->dq_odt;
+	} else if (sdram_params->base.dramtype == DDR4) {
+		temp = readl(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +
+			     DDR_PCTL2_INIT3);
+		temp = (temp >> PCTL2_DDR34_MR1_SHIFT) & PCTL2_MR_MASK;
+		p_fsp_param->ds_pdds = (temp >> 1) & 0x3;
+		p_fsp_param->dq_odt = (temp >> 8) & 0x7;
+		p_fsp_param->ca_odt = p_fsp_param->dq_odt;
+	} else if (sdram_params->base.dramtype == LPDDR3) {
+		temp = readl(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +
+			     DDR_PCTL2_INIT4);
+		temp = (temp >> PCTL2_LPDDR234_MR3_SHIFT) & PCTL2_MR_MASK;
+		p_fsp_param->ds_pdds = temp & 0xf;
+
+		p_fsp_param->dq_odt = lp3_odt_value;
+		p_fsp_param->ca_odt = p_fsp_param->dq_odt;
+	} else if (sdram_params->base.dramtype == LPDDR4) {
+		temp = readl(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +
+			     DDR_PCTL2_INIT4);
+		temp = (temp >> PCTL2_LPDDR234_MR3_SHIFT) & PCTL2_MR_MASK;
+		p_fsp_param->ds_pdds = (temp >> 3) & 0x7;
+
+		temp = readl(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +
+			     DDR_PCTL2_INIT6);
+		temp = (temp >> PCTL2_LPDDR4_MR11_SHIFT) & PCTL2_MR_MASK;
+		p_fsp_param->dq_odt = temp & 0x7;
+		p_fsp_param->ca_odt = (temp >> 4) & 0x7;
+
+		temp = MAX(readl(PHY_REG(phy_base, 0x3ae)),
+			   readl(PHY_REG(phy_base, 0x3ce)));
+		temp1 = MIN(readl(PHY_REG(phy_base, 0x3be)),
+			    readl(PHY_REG(phy_base, 0x3de)));
+		p_fsp_param->vref_ca[0] = (temp + temp1) / 2;
+		temp = MAX(readl(PHY_REG(phy_base, 0x3af)),
+			   readl(PHY_REG(phy_base, 0x3cf)));
+		temp1 = MIN(readl(PHY_REG(phy_base, 0x3bf)),
+			    readl(PHY_REG(phy_base, 0x3df)));
+		p_fsp_param->vref_ca[1] = (temp + temp1) / 2;
+		p_fsp_param->vref_ca[0] |=
+			(readl(PHY_REG(phy_base, 0x1e)) & BIT(6));
+		p_fsp_param->vref_ca[1] |=
+			(readl(PHY_REG(phy_base, 0x1e)) & BIT(6));
+
+		p_fsp_param->lp4_drv_pd_en = (readl(PHY_REG(phy_base, 0x114)) >>
+					      3) & 0x1;
+	}
+
+	p_fsp_param->noc_timings.ddrtiminga0 =
+		sdram_params->ch.noc_timings.ddrtiminga0;
+	p_fsp_param->noc_timings.ddrtimingb0 =
+		sdram_params->ch.noc_timings.ddrtimingb0;
+	p_fsp_param->noc_timings.ddrtimingc0 =
+		sdram_params->ch.noc_timings.ddrtimingc0;
+	p_fsp_param->noc_timings.devtodev0 =
+		sdram_params->ch.noc_timings.devtodev0;
+	p_fsp_param->noc_timings.ddrmode =
+		sdram_params->ch.noc_timings.ddrmode;
+	p_fsp_param->noc_timings.ddr4timing =
+		sdram_params->ch.noc_timings.ddr4timing;
+	p_fsp_param->noc_timings.agingx0 =
+		sdram_params->ch.noc_timings.agingx0;
+	p_fsp_param->noc_timings.aging0 =
+		sdram_params->ch.noc_timings.aging0;
+	p_fsp_param->noc_timings.aging1 =
+		sdram_params->ch.noc_timings.aging1;
+	p_fsp_param->noc_timings.aging2 =
+		sdram_params->ch.noc_timings.aging2;
+	p_fsp_param->noc_timings.aging3 =
+		sdram_params->ch.noc_timings.aging3;
+
+	p_fsp_param->flag = FSP_FLAG;
+}
+
+static void copy_fsp_param_to_ddr(void)
+{
+	u32 i;
+
+	printascii("fsp freq: ");
+	for (i = 0; i < MAX_IDX; i++) {
+		printascii("[");
+		printdec(i);
+		printascii("]");
+		printdec(fsp_param[i].freq_mhz);
+		printascii("Mhz ");
+	}
+	printascii("\n");
+
+	memcpy((void *)FSP_PARAM_STORE_ADDR, (void *)&fsp_param,
+	       sizeof(fsp_param));
+}
+
+void ddr_set_rate(struct dram_info *dram,
+		  struct rv1126_sdram_params *sdram_params,
+		  u32 freq, u32 cur_freq, u32 dst_fsp,
+		  u32 dst_fsp_lp4, u32 training_en)
+{
+	u32 dest_dll_off, cur_init3, dst_init3, cur_fsp, cur_dll_off;
+	u32 mr_tmp;
+	u32 lp_stat;
+	u32 dramtype = sdram_params->base.dramtype;
+	struct rv1126_sdram_params *sdram_params_new;
+	void __iomem *pctl_base = dram->pctl;
+	void __iomem *phy_base = dram->phy;
+
+	lp_stat = low_power_update(dram, 0);
+	sdram_params_new = get_default_sdram_config(freq);
+	sdram_params_new->ch.cap_info.rank = sdram_params->ch.cap_info.rank;
+
+	pre_set_rate(dram, sdram_params_new, dst_fsp, dst_fsp_lp4);
+
+	while ((readl(pctl_base + DDR_PCTL2_STAT) &
+			 PCTL2_OPERATING_MODE_MASK) ==
+			 PCTL2_OPERATING_MODE_SR)
+		continue;
+
+	dest_dll_off = 0;
+	dst_init3 = readl(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +
+			  DDR_PCTL2_INIT3);
+	if ((dramtype == DDR3 && (dst_init3 & 1)) ||
+	    (dramtype == DDR4 && !(dst_init3 & 1)))
+		dest_dll_off = 1;
+
+	cur_fsp = readl(pctl_base + DDR_PCTL2_MSTR2) & 0x3;
+	cur_init3 = readl(pctl_base + UMCTL2_REGS_FREQ(cur_fsp) +
+			  DDR_PCTL2_INIT3);
+	cur_init3 &= PCTL2_MR_MASK;
+	cur_dll_off = 1;
+	if ((dramtype == DDR3 && !(cur_init3 & 1)) ||
+	    (dramtype == DDR4 && (cur_init3 & 1)))
+		cur_dll_off = 0;
+
+	if (!cur_dll_off) {
+		if (dramtype == DDR3)
+			cur_init3 |= 1;
+		else
+			cur_init3 &= ~1;
+		pctl_write_mr(dram->pctl, 2, 1, cur_init3, dramtype);
+	}
+
+	setbits_le32(pctl_base + DDR_PCTL2_RFSHCTL3,
+		     PCTL2_DIS_AUTO_REFRESH);
+	update_refresh_reg(dram);
+
+	setbits_le32(pctl_base + DDR_PCTL2_PWRCTL, PCTL2_SELFREF_SW);
+	while (1) {
+		if (((readl(pctl_base + DDR_PCTL2_STAT) &
+		      PCTL2_SELFREF_TYPE_MASK) ==
+		     PCTL2_SELFREF_TYPE_SR_NOT_AUTO) &&
+		    ((readl(pctl_base + DDR_PCTL2_STAT) &
+		      PCTL2_OPERATING_MODE_MASK) ==
+		     PCTL2_OPERATING_MODE_SR)) {
+			break;
+		}
+	}
+
+	writel(PMUGRF_CON_DDRPHY_BUFFEREN_MASK |
+	       PMUGRF_CON_DDRPHY_BUFFEREN_EN,
+	       dram->pmugrf->soc_con[0]);
+	sw_set_req(dram);
+	clrbits_le32(pctl_base + DDR_PCTL2_DFIMISC,
+		     PCTL2_DFI_INIT_COMPLETE_EN);
+	sw_set_ack(dram);
+
+	sw_set_req(dram);
+	if ((dramtype == DDR3 || dramtype == DDR4) && dest_dll_off)
+		setbits_le32(pctl_base + DDR_PCTL2_MSTR, PCTL2_DLL_OFF_MODE);
+	else
+		clrbits_le32(pctl_base + DDR_PCTL2_MSTR, PCTL2_DLL_OFF_MODE);
+
+	setbits_le32(pctl_base + UMCTL2_REGS_FREQ(cur_fsp) + DDR_PCTL2_ZQCTL0,
+		     PCTL2_DIS_SRX_ZQCL);
+	setbits_le32(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) + DDR_PCTL2_ZQCTL0,
+		     PCTL2_DIS_SRX_ZQCL);
+	sw_set_ack(dram);
+
+	writel(DDR_MSCH_EN_MASK | (0x1 << DDR_MSCH_EN_SHIFT),
+	       dram->cru->clkgate_con[2]);
+	writel(CLK_DDR_UPCTL_EN_MASK | ACLK_DDR_UPCTL_EN_MASK |
+					(0x1 << CLK_DDR_UPCTL_EN_SHIFT) |
+					(0x1 << ACLK_DDR_UPCTL_EN_SHIFT),
+			BUS_SGRF_BASE_ADDR + SGRF_SOC_CON12);
+
+	clrbits_le32(PHY_REG(phy_base, 0), ANALOG_DERESET | DIGITAL_DERESET);
+	rkclk_set_dpll(dram, freq * MHz / 2);
+	phy_pll_set(dram, freq * MHz, 0);
+	phy_pll_set(dram, freq * MHz, 1);
+	setbits_le32(PHY_REG(phy_base, 0), ANALOG_DERESET | DIGITAL_DERESET);
+
+	writel(PMUGRF_CON_DDRPHY_BUFFEREN_MASK |
+			PMUGRF_CON_DDRPHY_BUFFEREN_DIS,
+			dram->pmugrf->soc_con[0]);
+	writel(DDR_MSCH_EN_MASK | (0x0 << DDR_MSCH_EN_SHIFT),
+	       dram->cru->clkgate_con[2]);
+	writel(CLK_DDR_UPCTL_EN_MASK | ACLK_DDR_UPCTL_EN_MASK |
+					(0x0 << CLK_DDR_UPCTL_EN_SHIFT) |
+					(0x0 << ACLK_DDR_UPCTL_EN_SHIFT),
+			BUS_SGRF_BASE_ADDR + SGRF_SOC_CON12);
+	while ((readl(pctl_base + DDR_PCTL2_DFISTAT) &
+	       PCTL2_DFI_INIT_COMPLETE) != PCTL2_DFI_INIT_COMPLETE)
+		continue;
+
+	sw_set_req(dram);
+	setbits_le32(pctl_base + DDR_PCTL2_MSTR, 0x1 << 29);
+	clrsetbits_le32(pctl_base + DDR_PCTL2_MSTR2, 0x3, dst_fsp);
+	sw_set_ack(dram);
+	update_refresh_reg(dram);
+	clrsetbits_le32(PHY_REG(phy_base, 0xc), 0x3 << 2, dst_fsp << 2);
+
+	clrbits_le32(pctl_base + DDR_PCTL2_PWRCTL, PCTL2_SELFREF_SW);
+	while ((readl(pctl_base + DDR_PCTL2_STAT) &
+	       PCTL2_OPERATING_MODE_MASK) == PCTL2_OPERATING_MODE_SR)
+		continue;
+
+	setbits_le32(PHY_REG(phy_base, 0x71), 1 << 5);
+	clrbits_le32(PHY_REG(phy_base, 0x71), 1 << 5);
+
+	mr_tmp = readl(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) + DDR_PCTL2_INIT4);
+	if (dramtype == LPDDR3) {
+		pctl_write_mr(dram->pctl, 3, 1,
+			      (dst_init3 >> PCTL2_LPDDR234_MR1_SHIFT) &
+			      PCTL2_MR_MASK,
+			      dramtype);
+		pctl_write_mr(dram->pctl, 3, 2, dst_init3 & PCTL2_MR_MASK,
+			      dramtype);
+		pctl_write_mr(dram->pctl, 3, 3,
+			      (mr_tmp >> PCTL2_LPDDR234_MR3_SHIFT) &
+			      PCTL2_MR_MASK,
+			      dramtype);
+		pctl_write_mr(dram->pctl, 3, 11, lp3_odt_value, dramtype);
+	} else if ((dramtype == DDR3) || (dramtype == DDR4)) {
+		pctl_write_mr(dram->pctl, 3, 1, dst_init3 & PCTL2_MR_MASK,
+			      dramtype);
+		if (!dest_dll_off) {
+			pctl_write_mr(dram->pctl, 3, 0,
+				      ((dst_init3 >> PCTL2_DDR34_MR0_SHIFT) &
+				      PCTL2_MR_MASK) | DDR3_DLL_RESET,
+				      dramtype);
+			udelay(2);
+		}
+		pctl_write_mr(dram->pctl, 3, 0,
+			      (dst_init3 >> PCTL2_DDR34_MR0_SHIFT &
+			       PCTL2_MR_MASK) & (~DDR3_DLL_RESET),
+			      dramtype);
+		pctl_write_mr(dram->pctl, 3, 2,
+			      ((mr_tmp >> PCTL2_DDR34_MR2_SHIFT) &
+			       PCTL2_MR_MASK), dramtype);
+		if (dramtype == DDR4) {
+			pctl_write_mr(dram->pctl, 3, 3, mr_tmp & PCTL2_MR_MASK,
+				      dramtype);
+			mr_tmp = readl(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +
+				       DDR_PCTL2_INIT6);
+			pctl_write_mr(dram->pctl, 3, 4,
+				      (mr_tmp >> PCTL2_DDR4_MR4_SHIFT) &
+				       PCTL2_MR_MASK,
+				      dramtype);
+			pctl_write_mr(dram->pctl, 3, 5,
+				      mr_tmp >> PCTL2_DDR4_MR5_SHIFT &
+				      PCTL2_MR_MASK,
+				      dramtype);
+
+			mr_tmp = readl(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +
+				       DDR_PCTL2_INIT7);
+			pctl_write_mr(dram->pctl, 3, 6,
+				      mr_tmp >> PCTL2_DDR4_MR6_SHIFT &
+				      PCTL2_MR_MASK,
+				      dramtype);
+		}
+	} else if (dramtype == LPDDR4) {
+		pctl_write_mr(dram->pctl, 3, 13,
+			      ((mr_tmp >> PCTL2_LPDDR4_MR13_SHIFT &
+			       PCTL2_MR_MASK) & (~(BIT(7)))) |
+			      dst_fsp_lp4 << 7, dramtype);
+	}
+
+	/* training */
+	high_freq_training(dram, sdram_params_new, dst_fsp);
+
+	clrbits_le32(pctl_base + DDR_PCTL2_RFSHCTL3,
+		     PCTL2_DIS_AUTO_REFRESH);
+	low_power_update(dram, lp_stat);
+
+	save_fsp_param(dram, dst_fsp, sdram_params_new);
+}
+
+static void ddr_set_rate_for_fsp(struct dram_info *dram,
+				 struct rv1126_sdram_params *sdram_params)
+{
+	struct ddr2_3_4_lp2_3_info *ddr_info;
+	u32 f0, f1, f2, f3;
+	u32 dramtype = sdram_params->base.dramtype;
+
+	ddr_info = get_ddr_drv_odt_info(dramtype);
+	if (!ddr_info)
+		return;
+
+	memset((void *)FSP_PARAM_STORE_ADDR, 0, sizeof(fsp_param));
+	memset((void *)&fsp_param, 0, sizeof(fsp_param));
+
+	f0 = (ddr_info->ddr_freq0_1 >> DDR_FREQ_F0_SHIFT) &
+	     DDR_FREQ_MASK;
+	f1 = (ddr_info->ddr_freq0_1 >> DDR_FREQ_F1_SHIFT) &
+	     DDR_FREQ_MASK;
+	f2 = (ddr_info->ddr_freq2_3 >> DDR_FREQ_F2_SHIFT) &
+	     DDR_FREQ_MASK;
+	f3 = (ddr_info->ddr_freq2_3 >> DDR_FREQ_F3_SHIFT) &
+	     DDR_FREQ_MASK;
+
+	if (get_wrlvl_val(dram, sdram_params))
+		printascii("get wrlvl value fail\n");
+	printascii("change to f1: ");
+	printdec(f1);
+	printascii("MHz\n");
+	ddr_set_rate(&dram_info, sdram_params, f1,
+		     sdram_params->base.ddr_freq, 1, 1, 1);
+	printascii("change to f2: ");
+	printdec(f2);
+	printascii("MHz\n");
+	ddr_set_rate(&dram_info, sdram_params, f2, f1, 2, 0, 1);
+	printascii("change to f3: ");
+	printdec(f3);
+	printascii("MHz\n");
+	ddr_set_rate(&dram_info, sdram_params, f3, f2, 3, 1, 1);
+	printascii("change to f0: ");
+	printdec(f0);
+	printascii("MHz\n");
+	ddr_set_rate(&dram_info, sdram_params, f0, f3, 0, 0, 1);
+}
+
+int get_uart_config(void)
+{
+	struct sdram_head_info_index_v2 *index =
+		(struct sdram_head_info_index_v2 *)common_info;
+	struct global_info *gbl_info;
+
+	gbl_info = (struct global_info *)((void *)common_info +
+		index->global_index.offset * 4);
+
+	return gbl_info->uart_info;
+}
+
+/* return: 0 = success, other = fail */
+int sdram_init(void)
+{
+	struct rv1126_sdram_params *sdram_params;
+	int ret = 0;
+	struct sdram_head_info_index_v2 *index =
+		(struct sdram_head_info_index_v2 *)common_info;
+	struct global_info *gbl_info;
+
+	dram_info.phy = (void *)DDR_PHY_BASE_ADDR;
+	dram_info.pctl = (void *)UPCTL2_BASE_ADDR;
+	dram_info.grf = (void *)GRF_BASE_ADDR;
+	dram_info.cru = (void *)CRU_BASE_ADDR;
+	dram_info.msch = (void *)SERVER_MSCH_BASE_ADDR;
+	dram_info.ddrgrf = (void *)DDR_GRF_BASE_ADDR;
+	dram_info.pmugrf = (void *)PMU_GRF_BASE_ADDR;
+
+	if (index->version_info != 2 ||
+	    (index->global_index.size != sizeof(struct global_info) / 4) ||
+	    (index->ddr3_index.size !=
+		sizeof(struct ddr2_3_4_lp2_3_info) / 4) ||
+	    (index->ddr4_index.size !=
+		sizeof(struct ddr2_3_4_lp2_3_info) / 4) ||
+	    (index->lp3_index.size !=
+		sizeof(struct ddr2_3_4_lp2_3_info) / 4) ||
+	    (index->lp4_index.size != (sizeof(struct lp4_info) / 4)) ||
+	    index->global_index.offset == 0 ||
+	    index->ddr3_index.offset == 0 ||
+	    index->ddr4_index.offset == 0 ||
+	    index->lp3_index.offset == 0 ||
+	    index->lp4_index.offset == 0) {
+		printascii("common info error\n");
+		goto error;
+	}
+
+	gbl_info = (struct global_info *)((void *)common_info +
+		index->global_index.offset * 4);
+
+	dram_info.sr_idle = SR_INFO(gbl_info->sr_pd_info);
+	dram_info.pd_idle = PD_INFO(gbl_info->sr_pd_info);
+
+	sdram_params = &sdram_configs[0];
+
+	if (sdram_params->base.dramtype == DDR3 ||
+	    sdram_params->base.dramtype == DDR4) {
+		if (DDR_2T_INFO(gbl_info->info_2t))
+			sdram_params->pctl_regs.pctl[0][1] |= 0x1 << 10;
+		else
+			sdram_params->pctl_regs.pctl[0][1] &=
+				~(0x1 << 10);
+	}
+	ret = sdram_init_detect(&dram_info, sdram_params);
+	if (ret) {
+		sdram_print_dram_type(sdram_params->base.dramtype);
+		printascii(", ");
+		printdec(sdram_params->base.ddr_freq);
+		printascii("MHz\n");
+		goto error;
+	}
+	print_ddr_info(sdram_params);
+
+	ddr_set_rate_for_fsp(&dram_info, sdram_params);
+	copy_fsp_param_to_ddr();
+
+	ddr_set_atags(&dram_info, sdram_params);
+
+	printascii("out\n");
+
+	return ret;
+error:
+	printascii("error\n");
+	return (-1);
+}
+#endif /* CONFIG_TPL_BUILD */

commit 78efceb66a65ca1300e4b39c83e83d64dea51b9c
Author: YouMin Chen <cym@rock-chips.com>
Date:   Mon May 25 17:12:24 2020 +0800

    rockchip: ram: add dram_spec_timing.h
    
    Change-Id: I4691d46584b78ed47390ea39a90e449e4c9d0bed
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/dram_spec_timing.h b/arch/arm/include/asm/arch-rockchip/dram_spec_timing.h
new file mode 100644
index 0000000000..c4f35fa5c6
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/dram_spec_timing.h
@@ -0,0 +1,447 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * Copyright (C) 2020 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef __ROCKCHIP_DRAM_SPEC_TIMING_H__
+#define __ROCKCHIP_DRAM_SPEC_TIMING_H__
+
+enum ddr3_speed_rate {
+	/* 5-5-5 */
+	DDR3_800D = 0,
+	/* 6-6-6 */
+	DDR3_800E = 1,
+	/* 6-6-6 */
+	DDR3_1066E = 2,
+	/* 7-7-7 */
+	DDR3_1066F = 3,
+	/* 8-8-8 */
+	DDR3_1066G = 4,
+	/* 7-7-7 */
+	DDR3_1333F = 5,
+	/* 8-8-8 */
+	DDR3_1333G = 6,
+	/* 9-9-9 */
+	DDR3_1333H = 7,
+	/* 10-10-10 */
+	DDR3_1333J = 8,
+	/* 8-8-8 */
+	DDR3_1600G = 9,
+	/* 9-9-9 */
+	DDR3_1600H = 10,
+	/* 10-10-10 */
+	DDR3_1600J = 11,
+	/* 11-11-11 */
+	DDR3_1600K = 12,
+	/* 10-10-10 */
+	DDR3_1866J = 13,
+	/* 11-11-11 */
+	DDR3_1866K = 14,
+	/* 12-12-12 */
+	DDR3_1866L = 15,
+	/* 13-13-13 */
+	DDR3_1866M = 16,
+	/* 11-11-11 */
+	DDR3_2133K = 17,
+	/* 12-12-12 */
+	DDR3_2133L = 18,
+	/* 13-13-13 */
+	DDR3_2133M = 19,
+	/* 14-14-14 */
+	DDR3_2133N = 20,
+	DDR3_DEFAULT = 21,
+};
+
+enum ddr4_speed_rate {
+	/* DDR4_1600J (10-10-10) */
+	DDR4_1600J = 0,
+	/* DDR4_1600K (11-11-11) */
+	DDR4_1600K = 1,
+	/* DDR4_1600L (12-12-12) */
+	DDR4_1600L = 2,
+	/* DDR4_1800L (12-12-12) */
+	DDR4_1866L = 3,
+	/* DDR4_1800M (13-13-13) */
+	DDR4_1866M = 4,
+	/* DDR4_1800N (14-14-14) */
+	DDR4_1866N = 5,
+	/* DDR4_2133N (14-14-14) */
+	DDR4_2133N = 6,
+	/* DDR4_2133P (15-15-15) */
+	DDR4_2133P = 7,
+	/* DDR4_2133R (16-16-16) */
+	DDR4_2133R = 8,
+	/* DDR4_2400P (15-15-15) */
+	DDR4_2400P = 9,
+	/* DDR4_2400R (16-16-16) */
+	DDR4_2400R = 10,
+	/* DDR4_2400U (18-18-18) */
+	DDR4_2400U = 11,
+	/* DEFAULT */
+	DDR4_DEFAULT = 12,
+};
+
+/* mr0 for ddr3 */
+#define DDR3_BL8		(0)
+#define DDR3_BC4_8		(1)
+#define DDR3_BC4		(2)
+#define DDR3_CL(n)		(((((n) - 4) & 0x7) << 4)\
+				| ((((n) - 4) & 0x8) >> 1))
+#define DDR3_WR(n)		(((n) & 0x7) << 9)
+#define DDR3_DLL_RESET		(1 << 8)
+#define DDR3_DLL_DERESET	(0 << 8)
+
+/* mr1 for ddr3 */
+#define DDR3_DLL_ENABLE		(0)
+#define DDR3_DLL_DISABLE	(1)
+#define DDR3_MR1_AL(n)		(((n) & 0x3) << 3)
+
+#define DDR3_DS_40		(0)
+#define DDR3_DS_34		BIT(1)
+#define DDR3_DS_MASK		((1 << 1) | (1 << 5))
+#define DDR3_RTT_NOM_MASK	((1 << 2) | (1 << 6) | (1 << 9))
+#define DDR3_RTT_NOM_DIS	(0)
+#define DDR3_RTT_NOM_60		BIT(2)
+#define DDR3_RTT_NOM_120	BIT(6)
+#define DDR3_RTT_NOM_40		((1 << 2) | (1 << 6))
+#define DDR3_TDQS		BIT(11)
+
+/* mr2 for ddr3 */
+#define DDR3_MR2_CWL(n)		((((n) - 5) & 0x7) << 3)
+#define DDR3_RTT_WR_DIS		(0)
+#define DDR3_RTT_WR_60		(1 << 9)
+#define DDR3_RTT_WR_120		(2 << 9)
+
+/*
+ * MR0 (Device Information)
+ * 0:DAI complete, 1:DAI still in progress
+ */
+#define LPDDR2_DAI		(0x1)
+/* 0:S2 or S4 SDRAM, 1:NVM */
+#define LPDDR2_DI		(0x1 << 1)
+/* 0:DNV not supported, 1:DNV supported */
+#define LPDDR2_DNVI		(0x1 << 2)
+#define LPDDR2_RZQI		(0x3 << 3)
+
+/*
+ * 00:RZQ self test not supported,
+ * 01:ZQ-pin may connect to VDDCA or float
+ * 10:ZQ-pin may short to GND.
+ * 11:ZQ-pin self test completed, no error condition detected.
+ */
+
+/* MR1 (Device Feature) */
+#define LPDDR2_BL4		(0x2)
+#define LPDDR2_BL8		(0x3)
+#define LPDDR2_BL16		(0x4)
+#define LPDDR2_N_WR(n)		(((n) - 2) << 5)
+
+/* MR2 (Device Feature 2) */
+#define LPDDR2_RL3_WL1		(0x1)
+#define LPDDR2_RL4_WL2		(0x2)
+#define LPDDR2_RL5_WL2		(0x3)
+#define LPDDR2_RL6_WL3		(0x4)
+#define LPDDR2_RL7_WL4		(0x5)
+#define LPDDR2_RL8_WL4		(0x6)
+
+/* MR3 (IO Configuration 1) */
+#define LPDDR2_DS_34		(0x1)
+#define LPDDR2_DS_40		(0x2)
+#define LPDDR2_DS_48		(0x3)
+#define LPDDR2_DS_60		(0x4)
+#define LPDDR2_DS_80		(0x6)
+/* optional */
+#define LPDDR2_DS_120		(0x7)
+
+/* MR4 (Device Temperature) */
+#define LPDDR2_TREF_MASK	(0x7)
+#define LPDDR2_4_TREF		(0x1)
+#define LPDDR2_2_TREF		(0x2)
+#define LPDDR2_1_TREF		(0x3)
+#define LPDDR2_025_TREF		(0x5)
+#define LPDDR2_025_TREF_DERATE	(0x6)
+
+#define LPDDR2_TUF		(0x1 << 7)
+
+/* MR8 (Basic configuration 4) */
+#define LPDDR2_S4		(0x0)
+#define LPDDR2_S2		(0x1)
+#define LPDDR2_N		(0x2)
+/* Unit:MB */
+#define LPDDR2_DENSITY(mr8)	(8 << (((mr8) >> 2) & 0xf))
+#define LPDDR2_IO_WIDTH(mr8)	(32 >> (((mr8) >> 6) & 0x3))
+
+/* MR10 (Calibration) */
+#define LPDDR2_ZQINIT		(0xff)
+#define LPDDR2_ZQCL		(0xab)
+#define LPDDR2_ZQCS		(0x56)
+#define LPDDR2_ZQRESET		(0xc3)
+
+/* MR16 (PASR Bank Mask), S2 SDRAM Only */
+#define LPDDR2_PASR_FULL	(0x0)
+#define LPDDR2_PASR_1_2		(0x1)
+#define LPDDR2_PASR_1_4		(0x2)
+#define LPDDR2_PASR_1_8		(0x3)
+
+/*
+ * MR0 (Device Information)
+ * 0:DAI complete,
+ * 1:DAI still in progress
+ */
+#define LPDDR3_DAI		(0x1)
+/*
+ * 00:RZQ self test not supported,
+ * 01:ZQ-pin may connect to VDDCA or float
+ * 10:ZQ-pin may short to GND.
+ * 11:ZQ-pin self test completed, no error condition detected.
+ */
+#define LPDDR3_RZQI		(0x3 << 3)
+/*
+ * 0:DRAM does not support WL(Set B),
+ * 1:DRAM support WL(Set B)
+ */
+#define LPDDR3_WL_SUPOT		BIT(6)
+/*
+ * 0:DRAM does not support RL=3,nWR=3,WL=1;
+ * 1:DRAM supports RL=3,nWR=3,WL=1 for frequencies <=166
+ */
+#define LPDDR3_RL3_SUPOT	BIT(7)
+
+/* MR1 (Device Feature) */
+#define LPDDR3_BL8		(0x3)
+#define LPDDR3_N_WR(n)		((n) << 5)
+
+/* MR2 (Device Feature 2), WL Set A,default */
+/* <=166MHz,optional*/
+#define LPDDR3_RL3_WL1		(0x1)
+/* <=400MHz*/
+#define LPDDR3_RL6_WL3		(0x4)
+/* <=533MHz*/
+#define LPDDR3_RL8_WL4		(0x6)
+/* <=600MHz*/
+#define LPDDR3_RL9_WL5		(0x7)
+/* <=667MHz,default*/
+#define LPDDR3_RL10_WL6		(0x8)
+/* <=733MHz*/
+#define LPDDR3_RL11_WL6		(0x9)
+/* <=800MHz*/
+#define LPDDR3_RL12_WL6		(0xa)
+/* <=933MHz*/
+#define LPDDR3_RL14_WL8		(0xc)
+/* <=1066MHz*/
+#define LPDDR3_RL16_WL8		(0xe)
+
+/* WL Set B, optional */
+/* <=667MHz,default*/
+#define LPDDR3_RL10_WL8		(0x8)
+/* <=733MHz*/
+#define LPDDR3_RL11_WL9		(0x9)
+/* <=800MHz*/
+#define LPDDR3_RL12_WL9		(0xa)
+/* <=933MHz*/
+#define LPDDR3_RL14_WL11	(0xc)
+/* <=1066MHz*/
+#define LPDDR3_RL16_WL13	(0xe)
+
+/* 1:enable nWR programming > 9(default)*/
+#define LPDDR3_N_WRE		BIT(4)
+/* 1:Select WL Set B*/
+#define LPDDR3_WL_S		BIT(6)
+/* 1:enable*/
+#define LPDDR3_WR_LEVEL		BIT(7)
+
+/* MR3 (IO Configuration 1) */
+#define LPDDR3_DS_34		(0x1)
+#define LPDDR3_DS_40		(0x2)
+#define LPDDR3_DS_48		(0x3)
+#define LPDDR3_DS_60		(0x4)
+#define LPDDR3_DS_80		(0x6)
+#define LPDDR3_DS_34D_40U	(0x9)
+#define LPDDR3_DS_40D_48U	(0xa)
+#define LPDDR3_DS_34D_48U	(0xb)
+
+/* MR4 (Device Temperature) */
+#define LPDDR3_TREF_MASK	(0x7)
+/* SDRAM Low temperature operating limit exceeded */
+#define LPDDR3_LT_EXED		(0x0)
+#define LPDDR3_4_TREF		(0x1)
+#define LPDDR3_2_TREF		(0x2)
+#define LPDDR3_1_TREF		(0x3)
+#define LPDDR3_05_TREF		(0x4)
+#define LPDDR3_025_TREF		(0x5)
+#define LPDDR3_025_TREF_DERATE	(0x6)
+/* SDRAM High temperature operating limit exceeded */
+#define LPDDR3_HT_EXED		(0x7)
+
+/* 1:value has changed since last read of MR4 */
+#define LPDDR3_TUF		(0x1 << 7)
+
+/* MR8 (Basic configuration 4) */
+#define LPDDR3_S8		(0x3)
+#define LPDDR3_DENSITY(mr8)	(8 << (((mr8) >> 2) & 0xf))
+#define LPDDR3_IO_WIDTH(mr8)	(32 >> (((mr8) >> 6) & 0x3))
+
+/* MR10 (Calibration) */
+#define LPDDR3_ZQINIT		(0xff)
+#define LPDDR3_ZQCL		(0xab)
+#define LPDDR3_ZQCS		(0x56)
+#define LPDDR3_ZQRESET		(0xc3)
+
+/* MR11 (ODT Control) */
+#define LPDDR3_ODT_60		(1)
+#define LPDDR3_ODT_120		(2)
+#define LPDDR3_ODT_240		(3)
+#define LPDDR3_ODT_DIS		(0)
+
+/* MR2 (Device Feature 2) */
+/* RL & nRTP for DBI-RD Disabled */
+#define LPDDR4_RL6_NRTP8	(0x0)
+#define LPDDR4_RL10_NRTP8	(0x1)
+#define LPDDR4_RL14_NRTP8	(0x2)
+#define LPDDR4_RL20_NRTP8	(0x3)
+#define LPDDR4_RL24_NRTP10	(0x4)
+#define LPDDR4_RL28_NRTP12	(0x5)
+#define LPDDR4_RL32_NRTP14	(0x6)
+#define LPDDR4_RL36_NRTP16	(0x7)
+/* RL & nRTP for DBI-RD Disabled */
+#define LPDDR4_RL12_NRTP8	(0x1)
+#define LPDDR4_RL16_NRTP8	(0x2)
+#define LPDDR4_RL22_NRTP8	(0x3)
+#define LPDDR4_RL28_NRTP10	(0x4)
+#define LPDDR4_RL32_NRTP12	(0x5)
+#define LPDDR4_RL36_NRTP14	(0x6)
+#define LPDDR4_RL40_NRTP16	(0x7)
+/* WL Set A,default */
+#define LPDDR4_A_WL4		(0x0 << 3)
+#define LPDDR4_A_WL6		(0x1 << 3)
+#define LPDDR4_A_WL8		(0x2 << 3)
+#define LPDDR4_A_WL10		(0x3 << 3)
+#define LPDDR4_A_WL12		(0x4 << 3)
+#define LPDDR4_A_WL14		(0x5 << 3)
+#define LPDDR4_A_WL16		(0x6 << 3)
+#define LPDDR4_A_WL18		(0x7 << 3)
+/* WL Set B, optional */
+#define LPDDR4_B_WL4		(0x0 << 3)
+#define LPDDR4_B_WL8		(0x1 << 3)
+#define LPDDR4_B_WL12		(0x2 << 3)
+#define LPDDR4_B_WL18		(0x3 << 3)
+#define LPDDR4_B_WL22		(0x4 << 3)
+#define LPDDR4_B_WL26		(0x5 << 3)
+#define LPDDR4_B_WL30		(0x6 << 3)
+#define LPDDR4_B_WL34		(0x7 << 3)
+/* 1:Select WL Set B*/
+#define LPDDR4_WL_B		BIT(6)
+/* 1:enable*/
+#define LPDDR4_WR_LEVEL		BIT(7)
+
+/* MR3 */
+#define LPDDR4_VDDQ_2_5		(0)
+#define LPDDR4_VDDQ_3		(1)
+#define LPDDR4_PU_CAL_MASK	(1)
+#define LPDDR4_WRPST_0_5_TCK	(0 << 1)
+#define LPDDR4_WRPST_1_5_TCK	(1 << 1)
+#define LPDDR4_PPR_EN		(1 << 2)
+/* PDDS */
+#define LPDDR4_PDDS_MASK	(0x7 << 3)
+#define LPDDR4_PDDS_SHIFT	(3)
+#define LPDDR4_PDDS_240		(0x1 << 3)
+#define LPDDR4_PDDS_120		(0x2 << 3)
+#define LPDDR4_PDDS_80		(0x3 << 3)
+#define LPDDR4_PDDS_60		(0x4 << 3)
+#define LPDDR4_PDDS_48		(0x5 << 3)
+#define LPDDR4_PDDS_40		(0x6 << 3)
+#define LPDDR4_DBI_RD_EN	BIT(6)
+#define LPDDR4_DBI_WR_EN	BIT(7)
+
+/* MR11 (ODT Control) */
+#define LPDDR4_DQODT_MASK	(0x7)
+#define LPDDR4_DQODT_SHIFT	(0x0)
+#define LPDDR4_DQODT_240	(1)
+#define LPDDR4_DQODT_120	(2)
+#define LPDDR4_DQODT_80		(3)
+#define LPDDR4_DQODT_60		(4)
+#define LPDDR4_DQODT_48		(5)
+#define LPDDR4_DQODT_40		(6)
+#define LPDDR4_DQODT_DIS	(0)
+#define LPDDR4_CAODT_MASK	(0x7 << 4)
+#define LPDDR4_CAODT_SHIFT	(4)
+#define LPDDR4_CAODT_240	(1 << 4)
+#define LPDDR4_CAODT_120	(2 << 4)
+#define LPDDR4_CAODT_80		(3 << 4)
+#define LPDDR4_CAODT_60		(4 << 4)
+#define LPDDR4_CAODT_48		(5 << 4)
+#define LPDDR4_CAODT_40		(6 << 4)
+#define LPDDR4_CAODT_DIS	(0 << 4)
+
+/* MR22 */
+#define LPDDR4_ODTE_CK_SHIFT	(3)
+#define LPDDR4_ODTE_CS_SHIFT	(4)
+#define LPDDR4_ODTD_CA_SHIFT	(5)
+#define LPDDR4_SOC_ODT_MASK	(0x7)
+#define LPDDR4_SOC_ODT_SHIFT	(0)
+#define LPDDR4_SOC_ODT_240	(1)
+#define LPDDR4_SOC_ODT_120	(2)
+#define LPDDR4_SOC_ODT_80	(3)
+#define LPDDR4_SOC_ODT_60	(4)
+#define LPDDR4_SOC_ODT_48	(5)
+#define LPDDR4_SOC_ODT_40	(6)
+#define LPDDR4_SOC_ODT_DIS	(0)
+
+/* mr0 for ddr4 */
+#define DDR4_BL8		(0)
+#define DDR4_BC4_8		(1)
+#define DDR4_BC4		(2)
+#define DDR4_WR_RTP(n)		((n) << 9)
+#define DDR4_CL(n)		((((n) & 0xe) << 3) | ((n) & 1) << 2)
+#define DDR4_DLL_RESET(n)	((n) << 8)
+#define DDR4_DLL_ON		BIT(0)
+#define DDR4_DLL_OFF		(0 << 0)
+
+/* mr1 for ddr4 */
+#define DDR4_AL			((n) << 3)
+#define DDR4_DS_34		(0)
+#define DDR4_DS_48		BIT(1)
+#define DDR4_DS_MASK		(0x3 << 1)
+#define DDR4_RTT_NOM_MASK	(0x7 << 8)
+#define DDR4_RTT_NOM_DIS	(0)
+#define DDR4_RTT_NOM_60		BIT(8)
+#define DDR4_RTT_NOM_120	(2 << 8)
+#define DDR4_RTT_NOM_40		(0x3 << 8)
+#define DDR4_RTT_NOM_240	(0x4 << 8)
+#define DDR4_RTT_NOM_48		(0x5 << 8)
+#define DDR4_RTT_NOM_80		(0x6 << 8)
+#define DDR4_RTT_NOM_34		(0x7 << 8)
+
+/* mr2 for ddr4 */
+#define DDR4_MR2_CWL(n)		((n) << 3)
+#define DDR4_RTT_WR_DIS		(0)
+#define DDR4_RTT_WR_120		BIT(9)
+#define DDR4_RTT_WR_240		(2 << 9)
+
+/* mr4 for ddr4 */
+#define DDR4_READ_PREAMBLE(n)	((n) << 11)
+#define DDR4_WRITE_PREAMBLE(n)	((n) << 12)
+#define DDR4_READ_PREAMBLE_TRAIN(n)	((n) << 10)
+
+/* mr5 for ddr4 */
+#define DDR4_RD_DBI(n)		((n) << 12)
+#define DDR4_WR_DBI(n)		((n) << 11)
+#define DDR4_DM(n)		((n) << 10)
+#define DDR4_RTT_PARK_DIS	(0 << 6)
+#define DDR4_RTT_PARK_60	(1 << 6)
+#define DDR4_RTT_PARK_120	(2 << 6)
+#define DDR4_RTT_PARK_40	(3 << 6)
+#define DDR4_RTT_PARK_240	(4 << 6)
+#define DDR4_RTT_PARK_48	(5 << 6)
+#define DDR4_RTT_PARK_80	(6 << 6)
+#define DDR4_RTT_PARK_34	(7 << 6)
+#define DIS_ODT_PD		(1 << 5)
+#define EN_ODT_PD		(0 << 5)
+
+/* mr6 for ddr4 */
+#define DDR4_TCCD_L(n)		(((n) - 4) << 10)
+
+#define PS_2_CLK(freq, ps)	(((uint64_t)(ps) / 100 * (uint64_t)(freq) +\
+				9999) / 10000)
+
+#endif /* __ROCKCHIP_DRAM_SPEC_TIMING_H__ */

commit 9994e22090510c80f78fde0be0e2babdf39d4aca
Author: YouMin Chen <cym@rock-chips.com>
Date:   Mon May 25 16:45:32 2020 +0800

    arm: rockchip: add CONFIG_ROCKCHIP_UART_MUX_SEL config
    
    CONFIG_ROCKCHIP_UART_MUX_SEL is used for selecting uart multiplexer
    in board_debug_uart_init.
    
    Change-Id: I75fb8eab76e4db8cd171d8d6c4462abe52ed168e
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 94be759035..43d3986f8a 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -711,6 +711,13 @@ config ROCKCHIP_FIT_IMAGE_PACK
 	help
 	  This enable fit image pack of U-Boot and TEE, it's used for make.sh script.
 
+config ROCKCHIP_UART_MUX_SEL_M
+	int "UART mux select"
+	default 0
+	depends on TPL
+	help
+	  This select uart multiplexer for debug uart iomux in board_debug_uart_init.
+
 config GICV2
 	bool "ARM GICv2"
 

commit 9ae0e26c7f7dd975cc54b57f24248bb8d9390c59
Author: YouMin Chen <cym@rock-chips.com>
Date:   Fri May 22 15:52:06 2020 +0800

    rockchip: rv1126: configure UART iomux in board_debug_uart_init
    
    Change-Id: I8820d87938209a83d493d16a0244874c75763c34
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126.c b/arch/arm/mach-rockchip/rv1126/rv1126.c
index 0c36a2767c..ff4574cbad 100644
--- a/arch/arm/mach-rockchip/rv1126/rv1126.c
+++ b/arch/arm/mach-rockchip/rv1126/rv1126.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
+#include <asm/arch/grf_rv1126.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -52,6 +53,8 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #define CRU_BASE		0xFF490000
 #define CRU_SOFTRST_CON02	0x308
+#define GRF_BASE		0xFE000000
+#define PMUGRF_BASE		0xFE020000
 #define SGRF_BASE		0xFE0A0000
 #define SGRF_CON_SCR1_BOOT_ADDR	0x0b0
 #define SGRF_SOC_CON3		0x00c
@@ -60,9 +63,442 @@ DECLARE_GLOBAL_DATA_PTR;
 #define PMUGRF_SOC_CON1		0xFE020104
 #define GRF_IOFUNC_CON3		0xFF01026C
 
+enum {
+	GPIO1A7_SHIFT		= 12,
+	GPIO1A7_MASK		= GENMASK(14, 12),
+	GPIO1A7_GPIO		= 0,
+	GPIO1A7_SDMMC0_D3,
+	GPIO1A7_UART3_TX_M1,
+	GPIO1A7_A7_JTAG_TMS_M0,
+	GPIO1A7_RISCV_JTAG_TMS,
+
+	GPIO1A6_SHIFT		= 8,
+	GPIO1A6_MASK		= GENMASK(10, 8),
+	GPIO1A6_GPIO		= 0,
+	GPIO1A6_SDMMC0_D2,
+	GPIO1A6_UART3_RX_M1,
+	GPIO1A6_A7_JTAG_TCK_M0,
+	GPIO1A6_RISCV_JTAG_TCK,
+
+	GPIO1A5_SHIFT		= 4,
+	GPIO1A5_MASK		= GENMASK(6, 4),
+	GPIO1A5_GPIO		= 0,
+	GPIO1A5_SDMMC0_D1,
+	GPIO1A5_TEST_CLK0_OUT,
+	GPIO1A5_UART2_TX_M0,
+	GPIO1A5_RISCV_JTAG_TRSTN,
+
+	GPIO1A4_SHIFT		= 0,
+	GPIO1A4_MASK		= GENMASK(2, 0),
+	GPIO1A4_GPIO		= 0,
+	GPIO1A4_SDMMC0_D0,
+	GPIO1A4_TEST_CLK1_OUT,
+	GPIO1A4_UART2_RX_M0,
+
+	GPIO1C3_SHIFT		= 12,
+	GPIO1C3_MASK		= GENMASK(14, 12),
+	GPIO1C3_GPIO		= 0,
+	GPIO1C3_UART0_TX,
+
+	GPIO1C2_SHIFT		= 8,
+	GPIO1C2_MASK		= GENMASK(10, 8),
+	GPIO1C2_GPIO		= 0,
+	GPIO1C2_UART0_RX,
+
+	GPIO1D5_SHIFT		= 4,
+	GPIO1D5_MASK		= GENMASK(6, 4),
+	GPIO1D5_GPIO		= 0,
+	GPIO1D5_SPI0_CS1N_M1,
+	GPIO1D5_I2S1_MCLK_M1,
+	GPIO1D5_UART4_TX_M2,
+
+	GPIO1D4_SHIFT		= 0,
+	GPIO1D4_MASK		= GENMASK(2, 0),
+	GPIO1D4_GPIO		= 0,
+	GPIO1D4_RESERVED0,
+	GPIO1D4_RESERVED1,
+	GPIO1D4_UART4_RX_M2,
+
+	GPIO1D1_SHIFT		= 4,
+	GPIO1D1_MASK		= GENMASK(6, 4),
+	GPIO1D1_GPIO		= 0,
+	GPIO1D1_RESERVED0,
+	GPIO1D1_SDMMC1_PWR,
+	GPIO1D1_RESERVED1,
+	GPIO1D1_I2C5_SDA_M2,
+	GPIO1D1_UART1_RX_M1,
+
+	GPIO1D0_SHIFT		= 0,
+	GPIO1D0_MASK		= GENMASK(2, 0),
+	GPIO1D0_GPIO		= 0,
+	GPIO1D0_I2S2_MCLK_M0,
+	GPIO1D0_SDMMC1_DET,
+	GPIO1D0_SPI1_CS1N_M1,
+	GPIO1D0_I2C5_SCL_M2,
+	GPIO1D0_UART1_TX_M1,
+
+	GPIO2A7_SHIFT		= 12,
+	GPIO2A7_MASK		= GENMASK(14, 12),
+	GPIO2A7_GPIO		= 0,
+	GPIO2A7_LCDC_D3,
+	GPIO2A7_I2S2_SDO_M1,
+	GPIO2A7_RESERVED,
+	GPIO2A7_UART4_RX_M1,
+	GPIO2A7_PWM4_M1,
+	GPIO2A7_SPI0_CS0N_M2,
+
+	GPIO2A6_SHIFT		= 8,
+	GPIO2A6_MASK		= GENMASK(10, 8),
+	GPIO2A6_GPIO		= 0,
+	GPIO2A6_LCDC_D2,
+	GPIO2A6_RGMII_COL_M1,
+	GPIO2A6_CIF_D2_M1,
+	GPIO2A6_UART4_TX_M1,
+	GPIO2A6_PWM5_M1,
+
+	GPIO2A1_SHIFT		= 4,
+	GPIO2A1_MASK		= GENMASK(6, 4),
+	GPIO2A1_GPIO		= 0,
+	GPIO2A1_SPI0_CLK_M1,
+	GPIO2A1_I2S1_SDO_M1,
+	GPIO2A1_UART5_RX_M2,
+
+	GPIO2A0_SHIFT		= 0,
+	GPIO2A0_MASK		= GENMASK(2, 0),
+	GPIO2A0_GPIO		= 0,
+	GPIO2A0_SPI0_CS0N_M1,
+	GPIO2A0_I2S1_SDI_M1,
+	GPIO2A0_UART5_TX_M2,
+
+	GPIO2B1_SHIFT		= 4,
+	GPIO2B1_MASK		= GENMASK(6, 4),
+	GPIO2B1_GPIO		= 0,
+	GPIO2B1_LCDC_D5,
+	GPIO2B1_I2S2_SCLK_M1,
+	GPIO2B1_RESERVED,
+	GPIO2B1_UART5_RX_M1,
+	GPIO2B1_PWM2_M1,
+	GPIO2B1_SPI0_MISO_M2,
+
+	GPIO2B0_SHIFT		= 0,
+	GPIO2B0_MASK		= GENMASK(2, 0),
+	GPIO2B0_GPIO		= 0,
+	GPIO2B0_LCDC_D4,
+	GPIO2B0_I2S2_SDI_M1,
+	GPIO2B0_RESERVED,
+	GPIO2B0_UART5_TX_M1,
+	GPIO2B0_PWM3_IR_M1,
+	GPIO2B0_SPI0_MOSI_M2,
+
+	GPIO3A7_SHIFT		= 12,
+	GPIO3A7_MASK		= GENMASK(14, 12),
+	GPIO3A7_GPIO		= 0,
+	GPIO3A7_CIF_D3_M0,
+	GPIO3A7_RGMII_RXD2_M0,
+	GPIO3A7_I2S0_SDI0_M1,
+	GPIO3A7_UART5_RX_M0,
+	GPIO3A7_CAN_TXD_M1,
+	GPIO3A7_PWM11_IR_M0,
+
+	GPIO3A6_SHIFT		= 8,
+	GPIO3A6_MASK		= GENMASK(10, 8),
+	GPIO3A6_GPIO		= 0,
+	GPIO3A6_CIF_D2_M0,
+	GPIO3A6_RGMII_COL_M0,
+	GPIO3A6_I2S0_SDO0_M1,
+	GPIO3A6_UART5_TX_M0,
+	GPIO3A6_CAN_RXD_M1,
+	GPIO3A6_PWM10_M0,
+
+	GPIO3A5_SHIFT		= 4,
+	GPIO3A5_MASK		= GENMASK(6, 4),
+	GPIO3A5_GPIO		= 0,
+	GPIO3A5_CIF_D1_M0,
+	GPIO3A5_RGMII_CRS_M0,
+	GPIO3A5_I2S0_LRCK_TX_M1,
+	GPIO3A5_UART4_RX_M0,
+	GPIO3A5_I2C3_SDA_M0,
+	GPIO3A5_PWM9_M0,
+
+	GPIO3A4_SHIFT		= 0,
+	GPIO3A4_MASK		= GENMASK(2, 0),
+	GPIO3A4_GPIO		= 0,
+	GPIO3A4_CIF_D0_M0,
+	GPIO3A4_RESERVED,
+	GPIO3A4_I2S0_SCLK_TX_M1,
+	GPIO3A4_UART4_TX_M0,
+	GPIO3A4_I2C3_SCL_M0,
+	GPIO3A4_PWM8_M0,
+
+	GPIO3A3_SHIFT		= 12,
+	GPIO3A3_MASK		= GENMASK(14, 12),
+	GPIO3A3_GPIO		= 0,
+	GPIO3A3_UART2_RX_M1,
+	GPIO3A3_A7_JTAG_TMS_M1,
+
+	GPIO3A2_SHIFT		= 8,
+	GPIO3A2_MASK		= GENMASK(10, 8),
+	GPIO3A2_GPIO		= 0,
+	GPIO3A2_UART2_TX_M1,
+	GPIO3A2_A7_JTAG_TCK_M1,
+
+	GPIO3A1_SHIFT		= 4,
+	GPIO3A1_MASK		= GENMASK(6, 4),
+	GPIO3A1_GPIO		= 0,
+	GPIO3A1_RESERVED0,
+	GPIO3A1_RESERVED1,
+	GPIO3A1_CAN_TXD_M0,
+	GPIO3A1_UART3_RX_M2,
+	GPIO3A1_PWM6_M1,
+	GPIO3A1_RESERVED2,
+	GPIO3A1_I2C4_SDA_M0,
+
+	GPIO3A0_SHIFT		= 0,
+	GPIO3A0_MASK		= GENMASK(2, 0),
+	GPIO3A0_GPIO		= 0,
+	GPIO3A0_RESERVED0,
+	GPIO3A0_RESERVED1,
+	GPIO3A0_CAN_RXD_M0,
+	GPIO3A0_UART3_TX_M2,
+	GPIO3A0_PWM7_IR_M1,
+	GPIO3A0_SPI1_CS1N_M2,
+	GPIO3A0_I2C4_SCL_M0,
+
+	GPIO3C7_SHIFT		= 12,
+	GPIO3C7_MASK		= GENMASK(14, 12),
+	GPIO3C7_GPIO		= 0,
+	GPIO3C7_CIF_HSYNC_M0,
+	GPIO3C7_RGMII_RXCLK_M0,
+	GPIO3C7_RESERVED,
+	GPIO3C7_UART3_RX_M0,
+
+	GPIO3C6_SHIFT		= 8,
+	GPIO3C6_MASK		= GENMASK(10, 0),
+	GPIO3C6_GPIO		= 0,
+	GPIO3C6_CIF_CLKOUT_M0,
+	GPIO3C6_RGMII_TXCLK_M0,
+	GPIO3C6_RESERVED,
+	GPIO3C6_UART3_TX_M0,
+
+	UART2_IO_SEL_SHIFT	= 8,
+	UART2_IO_SEL_MASK	= GENMASK(8, 8),
+	UART2_IO_SEL_M0		= 0,
+	UART2_IO_SEL_M1,
+
+	UART3_IO_SEL_SHIFT	= 10,
+	UART3_IO_SEL_MASK	= GENMASK(11, 10),
+	UART3_IO_SEL_M0		= 0,
+	UART3_IO_SEL_M1,
+	UART3_IO_SEL_M2,
+
+	UART4_IO_SEL_SHIFT	= 12,
+	UART4_IO_SEL_MASK	= GENMASK(13, 12),
+	UART4_IO_SEL_M0		= 0,
+	UART4_IO_SEL_M1,
+	UART4_IO_SEL_M2,
+
+	UART5_IO_SEL_SHIFT	= 14,
+	UART5_IO_SEL_MASK	= GENMASK(15, 14),
+	UART5_IO_SEL_M0		= 0,
+	UART5_IO_SEL_M1,
+	UART5_IO_SEL_M2,
+};
+
+enum {
+	UART1_IO_SEL_SHIFT	= 2,
+	UART1_IO_SEL_MASK	= GENMASK(2, 2),
+	UART1_IO_SEL_M0		= 0,
+	UART1_IO_SEL_M1,
+
+	GPIO0B7_SHIFT		= 12,
+	GPIO0B7_MASK		= GENMASK(14, 12),
+	GPIO0B7_GPIO		= 0,
+	GPIO0B7_RESERVED,
+	GPIO0B7_UART1_RX_M0,
+	GPIO0B7_PWM1_M0,
+
+	GPIO0B6_SHIFT		= 8,
+	GPIO0B6_MASK		= GENMASK(10, 8),
+	GPIO0B6_GPIO		= 0,
+	GPIO0B6_RESERVED,
+	GPIO0B6_UART1_TX_M0,
+	GPIO0B6_PWM0_M0,
+};
+
 void board_debug_uart_init(void)
 {
+#ifdef CONFIG_TPL_BUILD
+	writel(0x03fe0000, PMUGRF_BASE + 0x144);
+	writel((0x7 << (12 + 16)) | (1 << 12), PMUGRF_BASE + 0x8);
+#endif
+
+#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff560000)
+	static struct rv1126_grf * const grf = (void *)GRF_BASE;
+
+	/* UART0 Switch iomux */
+	rk_clrsetreg(&grf->gpio1c_iomux_l,
+		     GPIO1C3_MASK | GPIO1C2_MASK,
+		     GPIO1C3_UART0_TX << GPIO1C3_SHIFT |
+		     GPIO1C2_UART0_RX << GPIO1C2_SHIFT);
+
+#elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff410000)
+	static struct rv1126_pmugrf * const pmugrf = (void *)PMUGRF_BASE;
+#if defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+    (CONFIG_ROCKCHIP_UART_MUX_SEL_M == 0)
+	/* UART1 M0 */
+	rk_clrsetreg(&pmugrf->soc_con[6], UART1_IO_SEL_MASK,
+		     UART1_IO_SEL_M0 << UART1_IO_SEL_SHIFT);
+
+	/* Switch iomux */
+	rk_clrsetreg(&pmugrf->gpio0b_iomux_h,
+		     GPIO0B7_MASK | GPIO0B6_MASK,
+		     GPIO0B7_UART1_RX_M0 << GPIO0B7_SHIFT |
+		     GPIO0B6_UART1_TX_M0 << GPIO0B6_SHIFT);
+#else
+	/* UART1 M1 */
+	rk_clrsetreg(&pmugrf->soc_con[6], UART1_IO_SEL_MASK,
+		     UART1_IO_SEL_M1 << UART1_IO_SEL_SHIFT);
+
+	/* Switch iomux */
+	rk_clrsetreg(&topgrf->gpio1d_iomux_l,
+		     GPIO1D1_MASK | GPIO1D0_MASK,
+		     GPIO1D1_UART1_RX_M1 << GPIO1D1_SHIFT |
+		     GPIO1D0_UART1_TX_M1 << GPIO1D0_SHIFT);
+#endif
+
+#elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff570000)
+	static struct rv1126_grf * const grf = (void *)GRF_BASE;
+#if defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+    (CONFIG_ROCKCHIP_UART_MUX_SEL_M == 0)
+	/* Enable early UART2 channel m0 on the rv1126 */
+	rk_clrsetreg(&grf->iofunc_con2, UART2_IO_SEL_MASK,
+		     UART2_IO_SEL_M0 << UART2_IO_SEL_SHIFT);
+
+	/* Switch iomux */
+	rk_clrsetreg(&grf->gpio1a_iomux_h,
+		     GPIO1A5_MASK | GPIO1A4_MASK,
+		     GPIO1A5_UART2_TX_M0 << GPIO1A5_SHIFT |
+		     GPIO1A4_UART2_RX_M0 << GPIO1A4_SHIFT);
+#else
+	/* Enable early UART2 channel m1 on the rv1126 */
+	rk_clrsetreg(&grf->iofunc_con2, UART2_IO_SEL_MASK,
+		     UART2_IO_SEL_M1 << UART2_IO_SEL_SHIFT);
+
+	/* Switch iomux */
+	rk_clrsetreg(&grf->gpio3a_iomux_l,
+		     GPIO3A3_MASK | GPIO3A2_MASK,
+		     GPIO3A3_UART2_RX_M1 << GPIO3A3_SHIFT |
+		     GPIO3A2_UART2_TX_M1 << GPIO3A2_SHIFT);
+#endif
 
+#elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff580000)
+	static struct rv1126_grf * const grf = (void *)GRF_BASE;
+#if defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+    (CONFIG_ROCKCHIP_UART_MUX_SEL_M == 0)
+	/* UART3 m0*/
+	rk_clrsetreg(&grf->iofunc_con[2], UART3_IO_SEL_MASK,
+		     UART3_IO_SEL_M0 << UART3_IO_SEL_SHIFT);
+
+	/* Switch iomux */
+	rk_clrsetreg(&grf->gpio3c_iomux_h,
+		     GPIO3C7_MASK | GPIO3C6_MASK,
+		     GPIO3C7_UART3_RX_M0 << GPIO3C7_SHIFT |
+		     GPIO3C6_UART3_TX_M0 << GPIO3C6_SHIFT);
+#elif defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+      (CONFIG_ROCKCHIP_UART_MUX_SEL_M == 1)
+	/* UART3 m1*/
+	rk_clrsetreg(&grf->iofunc_con[2], UART3_IO_SEL_MASK,
+		     UART3_IO_SEL_M1 << UART3_IO_SEL_SHIFT);
+
+	/* Switch iomux */
+	rk_clrsetreg(&grf->gpio1a_iomux_h,
+		     GPIO1A7_MASK | GPIO1A6_MASK,
+		     GPIO1A7_UART3_TX_M1 << GPIO1A7_SHIFT |
+		     GPIO1A6_UART3_RX_M1 << GPIO1A6_SHIFT);
+#else
+	/* UART3 m2*/
+	rk_clrsetreg(&grf->iofunc_con[2], UART3_IO_SEL_MASK,
+		     UART3_IO_SEL_M2 << UART3_IO_SEL_SHIFT);
+
+	/* Switch iomux */
+	rk_clrsetreg(&grf->gpio3a_iomux_l,
+		     GPIO3A1_MASK | GPIO3A0_MASK,
+		     GPIO3A1_UART3_RX_M2 << GPIO3A1_SHIFT |
+		     GPIO3A0_UART3_TX_M2 << GPIO3A0_SHIFT);
+#endif
+
+#elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff590000)
+	static struct rv1126_grf * const grf = (void *)GRF_BASE;
+#if defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+    (CONFIG_ROCKCHIP_UART_MUX_SEL_M == 0)
+	/* UART4 m0*/
+	rk_clrsetreg(&grf->iofunc_con[2], UART4_IO_SEL_MASK,
+		     UART4_IO_SEL_M0 << UART4_IO_SEL_SHIFT);
+
+	/* Switch iomux */
+	rk_clrsetreg(&grf->gpio3a_iomux_h,
+		     GPIO3A5_MASK | GPIO3A4_MASK,
+		     GPIO3A5_UART4_RX_M0 << GPIO3A5_SHIFT |
+		     GPIO3A4_UART4_TX_M0 << GPIO3A4_SHIFT);
+#elif defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+      (CONFIG_ROCKCHIP_UART_MUX_SEL_M == 1)
+	/* UART4 m1*/
+	rk_clrsetreg(&grf->iofunc_con[2], UART4_IO_SEL_MASK,
+		     UART4_IO_SEL_M1 << UART4_IO_SEL_SHIFT);
+
+	/* Switch iomux */
+	rk_clrsetreg(&grf->gpio2a_iomux_h,
+		     GPIO2A7_MASK | GPIO2A6_MASK,
+		     GPIO2A7_UART4_RX_M1 << GPIO2A7_SHIFT |
+		     GPIO2A6_UART4_TX_M1 << GPIO2A6_SHIFT);
+#else
+	/* UART4 m2*/
+	rk_clrsetreg(&grf->iofunc_con[2], UART4_IO_SEL_MASK,
+		     UART4_IO_SEL_M2 << UART4_IO_SEL_SHIFT);
+
+	/* Switch iomux */
+	rk_clrsetreg(&grf->gpio1d_iomux_h,
+		     GPIO1D5_MASK | GPIO1D4_MASK,
+		     GPIO1D5_UART4_TX_M2 << GPIO1D5_SHIFT |
+		     GPIO1D4_UART4_RX_M2 << GPIO1D4_SHIFT);
+#endif
+
+#elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff5a0000)
+	static struct rv1126_grf * const grf = (void *)GRF_BASE;
+#if defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+    (CONFIG_ROCKCHIP_UART_MUX_SEL_M == 0)
+	/* UART5 m0*/
+	rk_clrsetreg(&grf->iofunc_con[2], UART5_IO_SEL_MASK,
+		     UART5_IO_SEL_M0 << UART5_IO_SEL_SHIFT);
+
+	/* Switch iomux */
+	rk_clrsetreg(&grf->gpio3a_iomux_h,
+		     GPIO3A7_MASK | GPIO3A6_MASK,
+		     GPIO3A7_UART5_RX_M0 << GPIO3A7_SHIFT |
+		     GPIO3A6_UART5_TX_M0 << GPIO3A6_SHIFT);
+#elif defined(CONFIG_ROCKCHIP_UART_MUX_SEL_M) && \
+      (CONFIG_ROCKCHIP_UART_MUX_SEL_M == 1)
+	/* UART5 m1*/
+	rk_clrsetreg(&grf->iofunc_con[2], UART5_IO_SEL_MASK,
+		     UART5_IO_SEL_M1 << UART5_IO_SEL_SHIFT);
+
+	/* Switch iomux */
+	rk_clrsetreg(&grf->gpio2b_iomux_l,
+		     GPIO2B1_MASK | GPIO2B0_MASK,
+		     GPIO2B1_UART5_RX_M1 << GPIO2B1_SHIFT |
+		     GPIO2B0_UART5_TX_M1 << GPIO2B0_SHIFT);
+#else
+	/* UART5 m2*/
+	rk_clrsetreg(&grf->iofunc_con[2], UART5_IO_SEL_MASK,
+		     UART5_IO_SEL_M2 << UART5_IO_SEL_SHIFT);
+
+	/* Switch iomux */
+	rk_clrsetreg(&grf->gpio2a_iomux_l,
+		     GPIO2A1_MASK | GPIO2A0_MASK,
+		     GPIO2A1_UART5_RX_M2 << GPIO2A1_SHIFT |
+		     GPIO2A0_UART5_TX_M2 << GPIO2A0_SHIFT);
+#endif
+#endif /* CONFIG_DEBUG_UART_BASE && CONFIG_DEBUG_UART_BASE == ... */
 }
 
 int arch_cpu_init(void)

commit 8ab3f2621b9dbbb6978ac8290938c51d74dc467d
Author: YouMin Chen <cym@rock-chips.com>
Date:   Fri May 22 15:07:04 2020 +0800

    rockchip: rv1126: not need syscon_rv1126.c when build TPL_TINY_FRAMEWORK
    
    Change-Id: I5396b568129e2decfe64ad6c589f134034ffd4c4
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rv1126/Makefile b/arch/arm/mach-rockchip/rv1126/Makefile
index 9a6e80b295..6ee0175790 100644
--- a/arch/arm/mach-rockchip/rv1126/Makefile
+++ b/arch/arm/mach-rockchip/rv1126/Makefile
@@ -4,6 +4,8 @@
 # SPDX-License-Identifier:     GPL-2.0+
 #
 
+ifneq ($(CONFIG_TPL_BUILD)$(CONFIG_TPL_TINY_FRAMEWORK),yy)
 obj-y += syscon_rv1126.o
+endif
 obj-y += clk_rv1126.o
 obj-y += rv1126.o

commit 9b31f80a47f626815f41c015eba0dbbe706255c1
Author: YouMin Chen <cym@rock-chips.com>
Date:   Fri May 22 15:05:37 2020 +0800

    driver: ram: rockchip: add sdram_head_info_v2
    
    Change-Id: I5715dbfb296fbc684cbd0f22270d3d3bc922bab1
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h b/arch/arm/include/asm/arch-rockchip/sdram_common.h
index c3db223b38..12db37b7d4 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_common.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_common.h
@@ -15,6 +15,207 @@
 #define MIN(a, b)	(((a) > (b)) ? (b) : (a))
 #define MAX(a, b)	(((a) > (b)) ? (a) : (b))
 
+/* get head info for initial */
+#define DDR_FREQ_F0_SHIFT		(0)
+#define DDR_FREQ_F1_SHIFT		(12)
+#define DDR_FREQ_F2_SHIFT		(0)
+#define DDR_FREQ_F3_SHIFT		(12)
+#define DDR_FREQ_F4_SHIFT		(0)
+#define DDR_FREQ_F5_SHIFT		(12)
+#define DDR_FREQ_MASK			(0xfff)
+
+#define UART_INFO_ID_SHIFT		(28)
+#define UART_INFO_IOMUX_SHIFT		(24)
+#define UART_INFO_BAUD_SHIFT		(0)
+#define UART_INFO_ID(n)			(((n) >> 28) & 0xf)
+#define UART_INFO_IOMUX(n)		(((n) >> 24) & 0xf)
+#define UART_INFO_BAUD(n)		((n) & 0xffffff)
+
+/* g_ch_info[15:0]: g_stdby_idle */
+#define STANDBY_IDLE(n)			((n) & 0xffff)
+
+#define SR_INFO(n)			(((n) >> 16) & 0xffff)
+#define PD_INFO(n)			((n) & 0xffff)
+
+#define FIRST_SCAN_CH(n)		(((n) >> 28) & 0xf)
+#define CHANNEL_MASK(n)			(((n) >> 24) & 0xf)
+#define STRIDE_TYPE(n)			(((n) >> 16) & 0xff)
+
+#define DDR_2T_INFO(n)			((n) & 1)
+#define SSMOD_SPREAD(n)			(((n) >> 1) & 0x1f)
+#define SSMOD_DIV(n)			(((n) >> 6) & 0xf)
+#define SSMOD_DOWNSPREAD(n)		(((n) >> 10) & 0x1)
+
+/* sdram_head_info_v2 define */
+/* for *_drv_odten and *_drv_odtoff */
+#define PHY_DQ_DRV_SHIFT		0
+#define PHY_CA_DRV_SHIFT		8
+#define PHY_CLK_DRV_SHIFT		16
+#define DRAM_DQ_DRV_SHIFT		24
+#define DRV_INFO_PHY_DQ_DRV(n)		((n) & 0xff)
+#define DRV_INFO_PHY_CA_DRV(n)		(((n) >> PHY_CA_DRV_SHIFT) & 0xff)
+#define DRV_INFO_PHY_CLK_DRV(n)		(((n) >> PHY_CLK_DRV_SHIFT) & 0xff)
+#define DRV_INFO_DRAM_DQ_DRV(n)		(((n) >> DRAM_DQ_DRV_SHIFT) & 0xff)
+
+/* for *_odt_info */
+#define DRAM_ODT_SHIFT			0
+#define PHY_ODT_SHIFT			8
+#define PHY_ODT_PUUP_EN_SHIFT		18
+#define PHY_ODT_PUDN_EN_SHIFT		19
+#define ODT_INFO_DRAM_ODT(n)		(((n) >> DRAM_ODT_SHIFT) & 0xff)
+#define ODT_INFO_PHY_ODT(n)		(((n) >> PHY_ODT_SHIFT) & 0x3ff)
+#define ODT_INFO_PULLUP_EN(n)		(((n) >> PHY_ODT_PUUP_EN_SHIFT) & 1)
+#define ODT_INFO_PULLDOWN_EN(n)		(((n) >> PHY_ODT_PUDN_EN_SHIFT) & 1)
+
+/* for *odt_en_freq; */
+#define DRAM_ODT_EN_FREQ_SHIFT		0
+#define PHY_ODT_EN_FREQ_SHIFT		12
+#define DRAMODT_EN_FREQ(n)		(((n) >> DRAM_ODT_EN_FREQ_SHIFT) & \
+					 0xfff)
+#define PHYODT_EN_FREQ(n)		(((n) >> PHY_ODT_EN_FREQ_SHIFT) & 0xfff)
+
+#define PHY_DQ_SR_SHIFT			0
+#define PHY_CA_SR_SHIFT			8
+#define PHY_CLK_SR_SHIFT		16
+#define DQ_SR_INFO(n)			(((n) >> PHY_DQ_SR_SHIFT) & 0xff)
+#define CA_SR_INFO(n)			(((n) >> PHY_CA_SR_SHIFT) & 0xff)
+#define CLK_SR_INFO(n)			(((n) >> PHY_CLK_SR_SHIFT) & 0xff)
+
+/* LP4 */
+#define LP4_CA_ODT_SHIFT			(18)
+#define LP4_DRV_PU_CAL_ODTEN_SHIFT		(26)
+#define LP4_DRV_PU_CAL_ODTOFF_SHIFT		(27)
+#define PHY_LP4_DRV_PULLDOWN_EN_ODTEN_SHIFT	(28)
+#define PHY_LP4_DRV_PULLDOWN_EN_ODTOFF_SHIFT	(29)
+#define ODT_INFO_LP4_CA_ODT(n)			(((n) >> LP4_CA_ODT_SHIFT) & \
+						 0xff)
+#define LP4_DRV_PU_CAL_ODTEN(n)		\
+	(((n) >> LP4_DRV_PU_CAL_ODTEN_SHIFT) & 1)
+#define LP4_DRV_PU_CAL_ODTOFF(n)	\
+	(((n) >> LP4_DRV_PU_CAL_ODTOFF_SHIFT) & 1)
+#define PHY_LP4_DRV_PULLDOWN_EN_ODTEN(n)	\
+	(((n) >> PHY_LP4_DRV_PULLDOWN_EN_ODTEN_SHIFT) & 1)
+#define PHY_LP4_DRV_PULLDOWN_EN_ODTOFF(n)	\
+	(((n) >> PHY_LP4_DRV_PULLDOWN_EN_ODTOFF_SHIFT) & 1)
+
+#define PHY_LP4_CS_DRV_ODTEN_SHIFT	(0)
+#define PHY_LP4_CS_DRV_ODTOFF_SHIFT	(8)
+#define LP4_ODTE_CK_SHIFT		(16)
+#define LP4_ODTE_CS_EN_SHIFT		(17)
+#define LP4_ODTD_CA_EN_SHIFT		(18)
+#define PHY_LP4_CS_DRV_ODTEN(n)		\
+	(((n) >> PHY_LP4_CS_DRV_ODTEN_SHIFT) & 0xff)
+#define PHY_LP4_CS_DRV_ODTOFF(n)	\
+	(((n) >> PHY_LP4_CS_DRV_ODTOFF_SHIFT) & 0xff)
+#define LP4_ODTE_CK_EN(n)		(((n) >> LP4_ODTE_CK_SHIFT) & 1)
+#define LP4_ODTE_CS_EN(n)		(((n) >> LP4_ODTE_CS_EN_SHIFT) & 1)
+#define LP4_ODTD_CA_EN(n)		(((n) >> LP4_ODTD_CA_EN_SHIFT) & 1)
+
+#define PHY_LP4_DQ_VREF_SHIFT		(0)
+#define LP4_DQ_VREF_SHIFT		(10)
+#define LP4_CA_VREF_SHIFT		(20)
+
+#define PHY_LP4_DQ_VREF(n)		\
+	(((n) >> PHY_LP4_DQ_VREF_SHIFT) & 0x3ff)
+#define LP4_DQ_VREF(n)			(((n) >> LP4_DQ_VREF_SHIFT) & 0x3ff)
+#define LP4_CA_VREF(n)			(((n) >> LP4_CA_VREF_SHIFT) & 0x3ff)
+
+#define LP4_DQ_ODT_EN_FREQ_SHIFT	(0)
+#define PHY_LP4_ODT_EN_FREQ_SHIFT	(12)
+#define LP4_CA_ODT_EN_FREQ_SHIFT	(0)
+#define PHY_LP4_ODT_EN_FREQ(n)		\
+	(((n) >> PHY_LP4_ODT_EN_FREQ_SHIFT) & 0xfff)
+#define LP4_DQ_ODT_EN_FREQ(n)		\
+	(((n) >> LP4_DQ_ODT_EN_FREQ_SHIFT) & 0xfff)
+#define LP4_CA_ODT_EN_FREQ(n)		\
+	(((n) >> LP4_CA_ODT_EN_FREQ_SHIFT) & 0xfff)
+
+struct sdram_head_info_v0 {
+	u32 start_tag;
+	u32 version_info;
+	u32 gcpu_gen_freq;
+	u32 g_d2_lp2_freq;
+	u32 g_d3_lp3_freq;
+	u32 g_d4_lp4_freq;
+	u32 g_uart_info;
+	u32 g_sr_pd_idle;
+	u32 g_ch_info;
+	u32 g_2t_info;
+	u32 reserved11;
+	u32 reserved12;
+	u32 reserved13;
+};
+
+struct index_info {
+	u8 offset;
+	u8 size;
+};
+
+struct sdram_head_info_index_v2 {
+	u32 start_tag;
+	u32 version_info;
+	struct index_info cpu_gen_index;
+	struct index_info global_index;
+
+	struct index_info ddr2_index;
+	struct index_info ddr3_index;
+
+	struct index_info ddr4_index;
+	struct index_info ddr5_index;
+
+	struct index_info lp2_index;
+	struct index_info lp3_index;
+
+	struct index_info lp4_index;
+	struct index_info lp5_index;
+
+	struct index_info skew_index;
+	struct index_info dq_map_index;
+};
+
+struct global_info {
+	u32 uart_info;
+	u32 sr_pd_info;
+	u32 ch_info;
+	u32 info_2t;
+	u32 reserved[4];
+};
+
+struct ddr2_3_4_lp2_3_info {
+	u32 ddr_freq0_1;
+	u32 ddr_freq2_3;
+	u32 ddr_freq4_5;
+	u32 drv_when_odten;
+	u32 drv_when_odtoff;
+	u32 odt_info;
+	u32 odten_freq;
+	u32 sr_when_odten;
+	u32 sr_when_odtoff;
+};
+
+struct lp4_info {
+	u32 ddr_freq0_1;
+	u32 ddr_freq2_3;
+	u32 ddr_freq4_5;
+	u32 drv_when_odten;
+	u32 drv_when_odtoff;
+	u32 odt_info;
+	u32 dq_odten_freq;
+	u32 sr_when_odten;
+	u32 sr_when_odtoff;
+	u32 ca_odten_freq;
+	u32 cs_drv_ca_odt_info;
+	u32 vref_when_odten;
+	u32 vref_when_odtoff;
+};
+
+struct dq_map_info {
+	u32 byte_map[2];
+	u32 lp3_dq0_7_map;
+	u32 lp2_dq0_7_map;
+	u32 ddr4_dq_map[4];
+};
+
 struct sdram_cap_info {
 	unsigned int rank;
 	unsigned int col;

commit 9442a4b3bb0b3d847e88a9b711c7bdd3eaa3ea37
Author: YouMin Chen <cym@rock-chips.com>
Date:   Fri May 22 15:02:33 2020 +0800

    driver: ram: rockchip: update the driver of sdram_pctl_px30
    
    Change-Id: I586065b41a22bbee266fa234e6513ef1dac5b37b
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_pctl_px30.h b/arch/arm/include/asm/arch-rockchip/sdram_pctl_px30.h
index b085652f72..4b77280d73 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_pctl_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_pctl_px30.h
@@ -8,7 +8,7 @@
 #include <asm/arch/sdram_common.h>
 
 struct ddr_pctl_regs {
-	u32 pctl[30][2];
+	u32 pctl[35][2];
 };
 
 /* ddr pctl registers define */
@@ -21,6 +21,7 @@ struct ddr_pctl_regs {
 #define DDR_PCTL2_MRCTRL2		0x1c
 #define DDR_PCTL2_DERATEEN		0x20
 #define DDR_PCTL2_DERATEINT		0x24
+#define DDR_PCTL2_MSTR2			0x28
 #define DDR_PCTL2_PWRCTL		0x30
 #define DDR_PCTL2_PWRTMG		0x34
 #define DDR_PCTL2_HWLPCTL		0x38
@@ -118,8 +119,100 @@ struct ddr_pctl_regs {
 #define DDR_PCTL2_PCFGW_n		0x408
 #define DDR_PCTL2_PCTRL_n		0x490
 
+#define UMCTL2_REGS_FREQ(n)	\
+	((0x1000 * (n) + (((n) > 0) ? 0x1000 : 0)))
+
 /* PCTL2_MRSTAT */
-#define MR_WR_BUSY			BIT(0)
+#define PCTL2_FREQUENCY_MODE_MASK	(1)
+#define PCTL2_FREQUENCY_MODE_SHIFT	(29)
+#define PCTL2_DLL_OFF_MODE		BIT(15)
+#define PCTL2_MR_WR_BUSY		BIT(0)
+/* PCTL2_STAT */
+#define PCTL2_SELFREF_TYPE_MASK		(3 << 4)
+#define PCTL2_SELFREF_TYPE_SR_NOT_AUTO	(2 << 4)
+#define PCTL2_OPERATING_MODE_MASK	(7)
+#define PCTL2_OPERATING_MODE_INIT	(1)
+#define PCTL2_OPERATING_MODE_SR		(3)
+/* PCTL2_MRCTRL0 */
+#define PCTL2_MR_WR			BIT(31)
+#define PCTL2_MR_ADDR_SHIFT		(12)
+#define PCTL2_MR_RANK_SHIFT		(4)
+#define PCTL2_MR_TYPE_WR		(0)
+#define PCTL2_MR_TYPE_RD		(1)
+/* PCTL2_MRCTRL1 */
+#define PCTL2_MR_ADDRESS_SHIFT		(8)
+#define PCTL2_MR_DATA_MASK		(0xff)
+/* PCTL2_DERATEEN */
+#define PCTL2_DERATE_ENABLE		(1)
+/* PCTL2_PWRCTL */
+#define PCTL2_SELFREF_SW		BIT(5)
+#define PCTL2_POWERDOWN_EN		BIT(1)
+#define PCTL2_SELFREF_EN		(1)
+/* PCTL2_PWRTMG */
+#define PCTL2_SELFREF_TO_X32_MASK	(0xFF)
+#define PCTL2_SELFREF_TO_X32_SHIFT	(16)
+#define PCTL2_POWERDOWN_TO_X32_MASK	(0x1F)
+/* PCTL2_INIT3 */
+#define PCTL2_DDR34_MR0_SHIFT		(16)
+#define PCTL2_LPDDR234_MR1_SHIFT	(16)
+#define PCTL2_DDR34_MR1_SHIFT		(0)
+#define PCTL2_LPDDR234_MR2_SHIFT	(0)
+/* PCTL2_INIT4 */
+#define PCTL2_DDR34_MR2_SHIFT		(16)
+#define PCTL2_LPDDR234_MR3_SHIFT	(16)
+#define PCTL2_DDR34_MR3_SHIFT		(0)
+#define PCTL2_LPDDR4_MR13_SHIFT		(0)
+
+/* PCTL2_INIT6 */
+#define PCTL2_DDR4_MR4_SHIFT		(16)
+#define PCTL2_LPDDR4_MR11_SHIFT		(16)
+#define PCTL2_DDR4_MR5_SHIFT		(0)
+#define PCTL2_LPDDR4_MR12_SHIFT		(0)
+
+/* PCTL2_INIT7 */
+#define PCTL2_LPDDR4_MR22_SHIFT		(16)
+#define PCTL2_DDR4_MR6_SHIFT		(0)
+#define PCTL2_LPDDR4_MR14_SHIFT		(0)
+
+#define PCTL2_MR_MASK			(0xffff)
+
+/* PCTL2_RFSHCTL3 */
+#define PCTL2_DIS_AUTO_REFRESH		(1)
+/* PCTL2_ZQCTL0 */
+#define PCTL2_DIS_AUTO_ZQ		BIT(31)
+#define PCTL2_DIS_SRX_ZQCL		BIT(30)
+/* PCTL2_DFILPCFG0 */
+#define PCTL2_DFI_LP_EN_SR		BIT(8)
+#define PCTL2_DFI_LP_EN_SR_MASK		BIT(8)
+#define PCTL2_DFI_LP_EN_SR_SHIFT	(8)
+/* PCTL2_DFIMISC */
+#define PCTL2_DFI_INIT_COMPLETE_EN	(1)
+/* PCTL2_DFISTAT */
+#define PCTL2_DFI_LP_ACK		BIT(1)
+#define PCTL2_DFI_INIT_COMPLETE		(1)
+/* PCTL2_DBG1 */
+#define PCTL2_DIS_HIF			BIT(1)
+/* PCTL2_DBGCAM */
+#define PCTL2_DBG_WR_Q_EMPTY		BIT(26)
+#define PCTL2_DBG_RD_Q_EMPTY		BIT(25)
+#define PCTL2_DBG_LPR_Q_DEPTH_MASK	(0xffff << 8)
+#define PCTL2_DBG_LPR_Q_DEPTH_EMPTY	(0x0 << 8)
+/* PCTL2_DBGCMD */
+#define PCTL2_RANK1_REFRESH		BIT(1)
+#define PCTL2_RANK0_REFRESH		(1)
+/* PCTL2_DBGSTAT */
+#define PCTL2_RANK1_REFRESH_BUSY	BIT(1)
+#define PCTL2_RANK0_REFRESH_BUSY	(1)
+/* PCTL2_SWCTL */
+#define PCTL2_SW_DONE			(1)
+#define PCTL2_SW_DONE_CLEAR		(0)
+/* PCTL2_SWSTAT */
+#define PCTL2_SW_DONE_ACK		(1)
+/* PCTL2_PSTAT */
+#define PCTL2_WR_PORT_BUSY_0		BIT(16)
+#define PCTL2_RD_PORT_BUSY_0		(1)
+/* PCTL2_PCTRLn */
+#define PCTL2_PORT_EN			(1)
 
 void pctl_read_mr(void __iomem *pctl_base, u32 rank, u32 mr_num);
 int pctl_write_mr(void __iomem *pctl_base, u32 rank, u32 mr_num, u32 arg,
diff --git a/drivers/ram/rockchip/sdram_pctl_px30.c b/drivers/ram/rockchip/sdram_pctl_px30.c
index ff87239ce8..b087de1cb2 100644
--- a/drivers/ram/rockchip/sdram_pctl_px30.c
+++ b/drivers/ram/rockchip/sdram_pctl_px30.c
@@ -20,7 +20,7 @@ void pctl_read_mr(void __iomem *pctl_base, u32 rank, u32 mr_num)
 	setbits_le32(pctl_base + DDR_PCTL2_MRCTRL0, 1u << 31);
 	while (readl(pctl_base + DDR_PCTL2_MRCTRL0) & (1u << 31))
 		continue;
-	while (readl(pctl_base + DDR_PCTL2_MRSTAT) & MR_WR_BUSY)
+	while (readl(pctl_base + DDR_PCTL2_MRSTAT) & PCTL2_MR_WR_BUSY)
 		continue;
 }
 
@@ -32,7 +32,7 @@ void pctl_read_mr(void __iomem *pctl_base, u32 rank, u32 mr_num)
 int pctl_write_mr(void __iomem *pctl_base, u32 rank, u32 mr_num, u32 arg,
 		  u32 dramtype)
 {
-	while (readl(pctl_base + DDR_PCTL2_MRSTAT) & MR_WR_BUSY)
+	while (readl(pctl_base + DDR_PCTL2_MRSTAT) & PCTL2_MR_WR_BUSY)
 		continue;
 	if (dramtype == DDR3 || dramtype == DDR4) {
 		writel((mr_num << 12) | (rank << 4) | (0 << 0),
@@ -48,7 +48,7 @@ int pctl_write_mr(void __iomem *pctl_base, u32 rank, u32 mr_num, u32 arg,
 	setbits_le32(pctl_base + DDR_PCTL2_MRCTRL0, 1u << 31);
 	while (readl(pctl_base + DDR_PCTL2_MRCTRL0) & (1u << 31))
 		continue;
-	while (readl(pctl_base + DDR_PCTL2_MRSTAT) & MR_WR_BUSY)
+	while (readl(pctl_base + DDR_PCTL2_MRSTAT) & PCTL2_MR_WR_BUSY)
 		continue;
 
 	return 0;
@@ -64,8 +64,7 @@ int pctl_write_vrefdq(void __iomem *pctl_base, u32 rank, u32 vrefrate,
 	u32 tccd_l, value;
 	u32 dis_auto_zq = 0;
 
-	if (dramtype != DDR4 || vrefrate < 4500 ||
-	    vrefrate > 9200)
+	if (dramtype != DDR4 || vrefrate < 4500 || vrefrate > 9250)
 		return (-1);
 
 	tccd_l = (readl(pctl_base + DDR_PCTL2_DRAMTMG4) >> 16) & 0xf;
@@ -164,16 +163,8 @@ u32 pctl_remodify_sdram_params(struct ddr_pctl_regs *pctl_regs,
 		break;
 	}
 
-	/*
-	 * If DDR3 or DDR4 MSTR.active_ranks=1,
-	 * it will gate memory clock when enter power down.
-	 * Force set active_ranks to 3 to workaround it.
-	 */
-	if (cap_info->rank == 2 || dram_type == DDR3 ||
-	    dram_type == DDR4)
-		tmp |= 3 << 24;
-	else
-		tmp |= 1 << 24;
+	/* active_ranks always keep 2 rank for dfi monitor */
+	tmp |= 3 << 24;
 
 	tmp |= (2 - cap_info->bw) << 12;
 

commit 0e0328714506be68d046c031bd7e249c6316dadb
Author: YouMin Chen <cym@rock-chips.com>
Date:   Fri May 22 14:59:45 2020 +0800

    rockchip: rv1126: add the struct of rv1126_pmugrf
    
    Change-Id: Idb6610023e52e3aa640b665f5a08ff142a660c6c
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/grf_rv1126.h b/arch/arm/include/asm/arch-rockchip/grf_rv1126.h
index ed7da89bdb..9e661dfbef 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rv1126.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rv1126.h
@@ -202,4 +202,52 @@ struct rv1126_grf {
 
 check_member(rv1126_grf, usb_id_con, 0x1031c);
 
+struct rv1126_pmugrf {
+	unsigned int gpio0a_iomux_l;
+	unsigned int gpio0a_iomux_h;
+	unsigned int gpio0b_iomux_l;
+	unsigned int gpio0b_iomux_h;
+	unsigned int gpio0c_iomux_l;
+	unsigned int reserved0[3];
+	unsigned int gpio0a_ds_l;
+	unsigned int gpio0a_ds_h;
+	unsigned int gpio0b_ds_l;
+	unsigned int gpio0b_ds_h;
+	unsigned int gpio0c_ds_l;
+	unsigned int osc_ds;
+	unsigned int reserved1[2];
+	unsigned int gpio0a_p;
+	unsigned int gpio0b_p;
+	unsigned int gpio0c_p_l;
+	unsigned int reserved2[1];
+	unsigned int gpio0a_ie;
+	unsigned int gpio0b_ie;
+	unsigned int gpio0c_ie_l;
+	unsigned int reserved3[1];
+	unsigned int gpio0a_smt;
+	unsigned int gpio0b_smt;
+	unsigned int gpio0c_smt_l;
+	unsigned int reserved4[(0x100 - 0x68) / 4 - 1];
+	unsigned int soc_con[7];
+	unsigned int reserved5[(0x140 - 0x118) / 4 - 1];
+	unsigned int io_vsel;
+	unsigned int io_vret;
+	unsigned int reserved6[(0x180 - 0x144) / 4 - 1];
+	unsigned int pmupvtm_clkdiv;
+	unsigned int reserved7[(0x200 - 0x180) / 4 - 1];
+	unsigned int os_reg[12];
+	unsigned int rstfunc_status;
+	unsigned int rstfunc_clr;
+	unsigned int reserved8[(0x380 - 0x234) / 4 - 1];
+	unsigned int sd_detect_con;
+	unsigned int reserved9[3];
+	unsigned int sd_detect_status;
+	unsigned int reserved10[3];
+	unsigned int sd_detect_clr;
+	unsigned int reserved11[3];
+	unsigned int sd_det_count;
+};
+
+check_member(rv1126_pmugrf, sd_det_count, 0x3b0);
+
 #endif

commit 99ca0554fa9709f0f6af9ce7170e7dc7b3da25a8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jun 4 17:28:52 2020 +0800

    common: image-fdt: ignore sysmem alloc for reseved memory at zero address
    
    Kernel will alloc reserved memory dynamically for the node.
    
    This patch avoids the sysmem warning dump.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I9b3a397c022450c152d479a60877551ee803ef91

diff --git a/common/image-fdt.c b/common/image-fdt.c
index 536715ccbd..ed0e57dbc9 100644
--- a/common/image-fdt.c
+++ b/common/image-fdt.c
@@ -182,7 +182,11 @@ int boot_fdt_add_sysmem_rsv_regions(void *fdt_blob)
 		rsv_addr = fdtdec_get_addr_size_auto_noparent(fdt_blob, offset,
 							      "reg", 0,
 							      &rsv_size, false);
-		if (rsv_addr == FDT_ADDR_T_NONE || !rsv_size)
+		/*
+		 * kernel will alloc reserved memory dynamically for the node
+		 * with start address from 0.
+		 */
+		if (rsv_addr == FDT_ADDR_T_NONE || !rsv_addr || !rsv_size)
 			continue;
 		debug("  sysmem: 'reserved-memory' %s: addr=%llx size=%llx\n",
 		      fdt_get_name(fdt_blob, offset, NULL),

commit 3cafcfcd6fb1b6698324f5c4557c865f31a8c5ce
Author: Simon Xue <xxm@rock-chips.com>
Date:   Fri Jun 5 09:37:59 2020 +0800

    misc: rockchip_decompress: fix param size
    
    Change-Id: Ia193a6035faff4bab66262cab2e97a3c6b94e45a
    Signed-off-by: Simon Xue <xxm@rock-chips.com>

diff --git a/drivers/misc/rockchip_decompress.c b/drivers/misc/rockchip_decompress.c
index 5e97be19bb..a69170088b 100644
--- a/drivers/misc/rockchip_decompress.c
+++ b/drivers/misc/rockchip_decompress.c
@@ -88,8 +88,8 @@ static int rockchip_decom_start(struct udevice *dev, void *buf)
 {
 	struct rockchip_decom_priv *priv = dev_get_priv(dev);
 	struct decom_param *param = (struct decom_param *)buf;
-	unsigned long limit_lo = param->size & 0xffffffff;
-	unsigned long limit_hi = param->size >> 32;
+	unsigned int limit_lo = param->size & 0xffffffff;
+	unsigned int limit_hi = param->size >> 32;
 
 	priv->done = false;
 
diff --git a/include/misc.h b/include/misc.h
index 04c960ddb3..73eb2cf43b 100644
--- a/include/misc.h
+++ b/include/misc.h
@@ -149,7 +149,7 @@ int misc_otp_write(struct udevice *dev, int offset, const void *buf, int size);
 struct decom_param {
 	unsigned long addr_src;
 	unsigned long addr_dst;
-	unsigned long size;
+	u64 size;
 	enum misc_mode mode;
 };
 

commit 913fb045d4ccfcd85b701ffd83bde08719f5f901
Author: Shunqing Chen <csq@rock-chips.com>
Date:   Tue May 12 17:00:04 2020 +0800

    fuel gauge: rk817/rk809: fix the issue of dsoc cannot reach 100
    
    Change-Id: I8b5c995509df71f23fdf73381ac0e55de727b5c2
    Signed-off-by: Shunqing Chen <csq@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk817.c b/drivers/power/fuel_gauge/fg_rk817.c
index 9f6a7c9e02..73e04f800e 100644
--- a/drivers/power/fuel_gauge/fg_rk817.c
+++ b/drivers/power/fuel_gauge/fg_rk817.c
@@ -992,6 +992,8 @@ static int rk817_bat_get_usb_state(struct rk817_battery_device *battery)
 
 static int rk817_bat_get_charger_type(struct rk817_battery_device *battery)
 {
+	u32 chrg_type;
+
 	/* check by ic hardware: this check make check work safer */
 	if ((rk817_bat_read(battery, PMIC_SYS_STS) & PLUG_IN_STS) == 0)
 		return NO_CHARGER;
@@ -1001,7 +1003,11 @@ static int rk817_bat_get_charger_type(struct rk817_battery_device *battery)
 		return DC_CHARGER;
 
 	/* check USB secondly */
-	return rk817_bat_get_usb_state(battery);
+	chrg_type = rk817_bat_get_usb_state(battery);
+	if (chrg_type != NO_CHARGER && battery->rsoc / 1000 >= 100)
+		chrg_type = CHARGE_FINISH;
+
+	return chrg_type;
 }
 
 static void rk817_bat_set_input_current(struct rk817_battery_device *battery,

commit cea9b5499bcd18a1d41b32c6ac4dbf4159e29803
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Thu Jun 4 16:00:22 2020 +0800

    video/drm: dsi: Fix device name for rk3288 dsi1
    
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
    Change-Id: Idcd5fb9331a9f038137197d4a53a07dd7c133f3b

diff --git a/drivers/video/drm/dw_mipi_dsi.c b/drivers/video/drm/dw_mipi_dsi.c
index 0d16cf39d8..acd71664c8 100644
--- a/drivers/video/drm/dw_mipi_dsi.c
+++ b/drivers/video/drm/dw_mipi_dsi.c
@@ -1112,7 +1112,12 @@ static int dw_mipi_dsi_connector_init(struct display_state *state)
 		struct udevice *dev;
 		int ret;
 
-		ret = uclass_get_device_by_name(UCLASS_DISPLAY, "dsi@ff968000",
+		ret = uclass_get_device_by_name(UCLASS_DISPLAY,
+#if defined(CONFIG_ROCKCHIP_RK3288)
+						"dsi@ff964000",
+#else
+						"dsi@ff968000",
+#endif
 						&dev);
 		if (ret)
 			return ret;

commit 66338042e0fcfc2731adfe4ba8d822fad9a03912
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Thu Jun 4 17:32:29 2020 +0800

    configs: rv1126: Enable rgb/mcu display
    
    Enable VOP and RGB interface on rv1126.
    
    Change-Id: I44b61d6fc5338c8a78a0178af339cadb2227b297
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index d22d3655c8..e3553602ea 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -24,6 +24,7 @@ CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_FIT_HW_CRYPTO=y
 # CONFIG_SPL_SYS_DCACHE_OFF is not set
 CONFIG_BOOTDELAY=0
+# CONFIG_CONSOLE_MUX is not set
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
@@ -109,7 +110,6 @@ CONFIG_DM_ETH=y
 CONFIG_DM_ETH_PHY=y
 CONFIG_DWC_ETH_QOS=y
 CONFIG_GMAC_ROCKCHIP=y
-CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_NANENG_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_PMIC=y
@@ -139,7 +139,10 @@ CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
 CONFIG_USB_GADGET_VENDOR_NUM=0x2207
 CONFIG_USB_GADGET_PRODUCT_NUM=0x110b
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_IRQ2GPIO_V2=y
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_RSA=y

commit c33e1feac9ca747b6ce5fe9e9f23130a60f89b95
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Thu Jun 4 17:31:29 2020 +0800

    drm/rockchip: vop: Enable gate bit
    
    Vop WIN with multi-region support(win2 of rv1126)
    should enable the bit.
    
    Change-Id: I3e2c4165e0d2c597ab839829f9cbed6a1e37c59a
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index d7e518a609..c78bf4093f 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -723,6 +723,7 @@ static int rockchip_vop_set_plane(struct display_state *state)
 
 	rockchip_vop_setup_csc_table(state);
 	VOP_WIN_SET(vop, enable, 1);
+	VOP_WIN_SET(vop, gate, 1);
 	vop_cfg_done(vop);
 
 	return 0;

commit 406bb09a237367013e7efc63876f50f2ae41deea
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Thu Jun 4 17:29:31 2020 +0800

    drm/rockchip: rgb: Add support for rv1126
    
    Add support for RGB/MCU interface on rv1126.
    
    Change-Id: I9b085f80e36fdadf6dcb46c3be034b65e645ddd4
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_rgb.c b/drivers/video/drm/rockchip_rgb.c
index 7c9f345d05..5f63ab2203 100644
--- a/drivers/video/drm/rockchip_rgb.c
+++ b/drivers/video/drm/rockchip_rgb.c
@@ -27,6 +27,9 @@
 #define RK1808_GRF_PD_VO_CON1		0x0444
 #define RK1808_RGB_DATA_SYNC_BYPASS(v)	HIWORD_UPDATE(v, 3, 3)
 
+#define RV1126_GRF_IOFUNC_CON3          0x1026c
+#define RV1126_LCDC_IO_BYPASS(v)        HIWORD_UPDATE(v, 0, 0)
+
 #define RK3288_GRF_SOC_CON6		0x025c
 #define RK3288_LVDS_LCDC_SEL(v)		HIWORD_UPDATE(v,  3,  3)
 #define RK3288_GRF_SOC_CON7		0x0260
@@ -49,7 +52,7 @@ struct rockchip_rgb_funcs {
 struct rockchip_rgb {
 	struct udevice *dev;
 	struct regmap *grf;
-	bool data_sync;
+	bool data_sync_bypass;
 	struct rockchip_phy *phy;
 	const struct rockchip_rgb_funcs *funcs;
 };
@@ -151,15 +154,30 @@ static int rockchip_rgb_probe(struct udevice *dev)
 	rgb->dev = dev;
 	rgb->funcs = connector->data;
 	rgb->grf = syscon_get_regmap(dev_get_parent(dev));
-	rgb->data_sync = dev_read_bool(dev, "rockchip,data-sync");
+	rgb->data_sync_bypass = dev_read_bool(dev, "rockchip,data-sync-bypass");
 
 	return 0;
 }
 
+static void rv1126_rgb_prepare(struct rockchip_rgb *rgb, int pipe)
+{
+	regmap_write(rgb->grf, RV1126_GRF_IOFUNC_CON3,
+		     RV1126_LCDC_IO_BYPASS(rgb->data_sync_bypass));
+}
+
+static const struct rockchip_rgb_funcs rv1126_rgb_funcs = {
+	.prepare = rv1126_rgb_prepare,
+};
+
+static const struct rockchip_connector rv1126_rgb_driver_data = {
+	 .funcs = &rockchip_rgb_connector_funcs,
+	 .data = &rv1126_rgb_funcs,
+};
+
 static void px30_rgb_prepare(struct rockchip_rgb *rgb, int pipe)
 {
 	regmap_write(rgb->grf, PX30_GRF_PD_VO_CON1, PX30_RGB_VOP_SEL(pipe) |
-		     PX30_RGB_DATA_SYNC_BYPASS(!rgb->data_sync));
+		     PX30_RGB_DATA_SYNC_BYPASS(rgb->data_sync_bypass));
 }
 
 static const struct rockchip_rgb_funcs px30_rgb_funcs = {
@@ -174,7 +192,7 @@ static const struct rockchip_connector px30_rgb_driver_data = {
 static void rk1808_rgb_prepare(struct rockchip_rgb *rgb, int pipe)
 {
 	regmap_write(rgb->grf, RK1808_GRF_PD_VO_CON1,
-		     RK1808_RGB_DATA_SYNC_BYPASS(!rgb->data_sync));
+		     RK1808_RGB_DATA_SYNC_BYPASS(rgb->data_sync_bypass));
 }
 
 static const struct rockchip_rgb_funcs rk1808_rgb_funcs = {
@@ -263,6 +281,10 @@ static const struct udevice_id rockchip_rgb_ids[] = {
 		.compatible = "rockchip,rv1108-rgb",
 		.data = (ulong)&rockchip_rgb_driver_data,
 	},
+	{
+		.compatible = "rockchip,rv1126-rgb",
+		.data = (ulong)&rv1126_rgb_driver_data,
+	},
 	{}
 };
 

commit a144d23d241817df9478019286ae5b45ec1bf3ed
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Wed Apr 29 14:58:58 2020 +0800

    drm/rockchip: vop: Add support for rv1126
    
    Change-Id: I762158891605c1a87fd7d3a7c685052ab9125b31
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_crtc.c b/drivers/video/drm/rockchip_crtc.c
index 6fec03a71c..bbc290040d 100644
--- a/drivers/video/drm/rockchip_crtc.c
+++ b/drivers/video/drm/rockchip_crtc.c
@@ -27,6 +27,11 @@ static const struct rockchip_crtc rv1108_vop_data = {
 	.data = &rv1108_vop,
 };
 
+static const struct rockchip_crtc rv1126_vop_data = {
+	.funcs = &rockchip_vop_funcs,
+	.data = &rv1126_vop,
+};
+
 static const struct rockchip_crtc px30_vop_lit_data = {
 	.funcs = &rockchip_vop_funcs,
 	.data = &px30_vop_lit,
@@ -94,6 +99,9 @@ static const struct udevice_id rockchip_vop_ids[] = {
 	}, {
 		.compatible = "rockchip,rv1108-vop",
 		.data = (ulong)&rv1108_vop_data,
+	}, {
+		.compatible = "rockchip,rv1126-vop",
+		.data = (ulong)&rv1126_vop_data,
 	}, {
 		.compatible = "rockchip,rk3126-vop",
 		.data = (ulong)&rk3036_vop_data,
diff --git a/drivers/video/drm/rockchip_crtc.h b/drivers/video/drm/rockchip_crtc.h
index 544104575d..b584b45cf9 100644
--- a/drivers/video/drm/rockchip_crtc.h
+++ b/drivers/video/drm/rockchip_crtc.h
@@ -44,4 +44,5 @@ extern const struct vop_data rk3399_vop_lit;
 extern const struct vop_data rk322x_vop;
 extern const struct vop_data rk3328_vop;
 extern const struct vop_data rv1108_vop;
+extern const struct vop_data rv1126_vop;
 #endif
diff --git a/drivers/video/drm/rockchip_vop.h b/drivers/video/drm/rockchip_vop.h
index 9d2ff8afb0..09d6f9ac96 100644
--- a/drivers/video/drm/rockchip_vop.h
+++ b/drivers/video/drm/rockchip_vop.h
@@ -401,6 +401,7 @@ struct vop_scl_regs {
 struct vop_win {
 	const struct vop_scl_regs *scl;
 
+	struct vop_reg gate;
 	struct vop_reg enable;
 	struct vop_reg format;
 	struct vop_reg ymirror;
diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index 7ca84db23e..fd1ea24e65 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -710,3 +710,92 @@ const struct vop_data rv1108_vop = {
 	.line_flag = &rk3366_vop_lite_line_flag,
 	.reg_len = RK3366_LIT_FRC_LOWER01_0 * 4,
 };
+
+static const struct vop_win rv1126_win2_data = {
+	.gate = VOP_REG(RV1126_WIN2_CTRL0, 0x1, 0),
+	.enable = VOP_REG(RV1126_WIN2_CTRL0, 0x1, 4),
+	.format = VOP_REG(RV1126_WIN2_CTRL0, 0x3, 5),
+	.rb_swap = VOP_REG(RV1126_WIN2_CTRL0, 0x1, 20),
+	.dsp_info = VOP_REG(RV1126_WIN2_DSP_INFO0, 0x0fff0fff, 0),
+	.dsp_st = VOP_REG(RV1126_WIN2_DSP_ST0, 0x1fff1fff, 0),
+	.yrgb_mst = VOP_REG(RV1126_WIN2_MST0, 0xffffffff, 0),
+	.yrgb_vir = VOP_REG(RV1126_WIN2_VIR0_1, 0x1fff, 0),
+};
+
+static const struct vop_ctrl rv1126_ctrl_data = {
+	.standby = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 1),
+	.axi_outstanding_max_num = VOP_REG(RK3366_LIT_SYS_CTRL1, 0x1f, 16),
+	.axi_max_outstanding_en = VOP_REG(RK3366_LIT_SYS_CTRL1, 0x1, 12),
+	.htotal_pw = VOP_REG(RK3366_LIT_DSP_HTOTAL_HS_END, 0x0fff0fff, 0),
+	.hact_st_end = VOP_REG(RK3366_LIT_DSP_HACT_ST_END, 0x0fff0fff, 0),
+	.vtotal_pw = VOP_REG(RK3366_LIT_DSP_VTOTAL_VS_END, 0x0fff0fff, 0),
+	.vact_st_end = VOP_REG(RK3366_LIT_DSP_VACT_ST_END, 0x0fff0fff, 0),
+	.vact_st_end_f1 = VOP_REG(RK3366_LIT_DSP_VACT_ST_END_F1, 0x0fff0fff, 0),
+	.vs_st_end_f1 = VOP_REG(RK3366_LIT_DSP_VS_ST_END_F1, 0x0fff0fff, 0),
+	.dsp_interlace = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 0),
+	.global_regdone_en = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 13),
+	.auto_gate_en = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 0),
+	.dsp_layer_sel = VOP_REG(RK3366_LIT_DSP_CTRL2, 0xff, 22),
+	.overlay_mode = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 4),
+	.core_dclk_div = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 13),
+	.dclk_ddr = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 14),
+	.rgb_en = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 0),
+	.rgb_pin_pol = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x7, 2),
+	.hdmi_en = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 8),
+	.hdmi_pin_pol = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x7, 10),
+	.lvds_en = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 16),
+	.lvds_pin_pol = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x7, 18),
+	.mipi_en = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 24),
+	.mipi_pin_pol = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x7, 26),
+	.mipi_dclk_pol = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 25),
+	.lvds_dclk_pol = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 17),
+	.hdmi_dclk_pol = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 9),
+	.rgb_dclk_pol = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 1),
+	.dither_down = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 8),
+	.dither_up = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 2),
+	.dsp_data_swap = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1f, 9),
+	.dsp_ccir656_avg = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 5),
+	.dsp_black = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 15),
+	.dsp_blank = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 14),
+	.dsp_outzero = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 3),
+	.dsp_lut_en = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 5),
+	.out_mode = VOP_REG(RK3366_LIT_DSP_CTRL2, 0xf, 16),
+	.dsp_background = VOP_REG(RK3366_LIT_DSP_BG, 0x00ffffff, 0),
+	.cfg_done = VOP_REG(RK3366_LIT_REG_CFG_DONE, 0x1, 0),
+
+	.bcsh_en = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x1, 0),
+	.bcsh_r2y_csc_mode = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x1, 1),
+	.bcsh_out_mode = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x3, 2),
+	.bcsh_y2r_csc_mode = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x3, 4),
+	.bcsh_y2r_en = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x1, 6),
+	.bcsh_r2y_en = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x1, 7),
+	.bcsh_color_bar = VOP_REG(RK3366_LIT_BCSH_COL_BAR, 0xffffff, 0),
+	.bcsh_brightness = VOP_REG(RK3366_LIT_BCSH_BCS, 0xff, 0),
+	.bcsh_contrast = VOP_REG(RK3366_LIT_BCSH_BCS, 0x1ff, 8),
+	.bcsh_sat_con = VOP_REG(RK3366_LIT_BCSH_BCS, 0x3ff, 20),
+	.bcsh_sin_hue = VOP_REG(RK3366_LIT_BCSH_H, 0x1ff, 0),
+	.bcsh_cos_hue = VOP_REG(RK3366_LIT_BCSH_H, 0x1ff, 16),
+
+	.mcu_pix_total = VOP_REG(RK3366_LIT_MCU_CTRL, 0x3f, 0),
+	.mcu_cs_pst = VOP_REG(RK3366_LIT_MCU_CTRL, 0xf, 6),
+	.mcu_cs_pend = VOP_REG(RK3366_LIT_MCU_CTRL, 0x3f, 10),
+	.mcu_rw_pst = VOP_REG(RK3366_LIT_MCU_CTRL, 0xf, 16),
+	.mcu_rw_pend = VOP_REG(RK3366_LIT_MCU_CTRL, 0x3f, 20),
+	.mcu_clk_sel = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 26),
+	.mcu_hold_mode = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 27),
+	.mcu_frame_st = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 28),
+	.mcu_rs = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 29),
+	.mcu_bypass = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 30),
+	.mcu_type = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 31),
+	.mcu_rw_bypass_port = VOP_REG(RK3366_LIT_MCU_RW_BYPASS_PORT,
+				      0xffffffff, 0),
+};
+
+const struct vop_data rv1126_vop = {
+	.version = VOP_VERSION(2, 7),
+	.max_output = {1920, 1080},
+	.ctrl = &rv1126_ctrl_data,
+	.win = &rv1126_win2_data,
+	.line_flag = &rk3366_vop_lite_line_flag,
+	.reg_len = RK3366_LIT_FLAG_REG * 4,
+};
diff --git a/drivers/video/drm/rockchip_vop_reg.h b/drivers/video/drm/rockchip_vop_reg.h
index 12052c6a71..c82d6adcab 100644
--- a/drivers/video/drm/rockchip_vop_reg.h
+++ b/drivers/video/drm/rockchip_vop_reg.h
@@ -965,4 +965,11 @@
 #define RK1808_GRF_PD_VO_CON1			0x00000444
 /* rk1808 register definition end*/
 
+/* RV1126 register definition start */
+#define RV1126_WIN2_CTRL0			0x0190
+#define RV1126_WIN2_VIR0_1			0x0198
+#define RV1126_WIN2_MST0			0x01a0
+#define RV1126_WIN2_DSP_INFO0			0x01a4
+#define RV1126_WIN2_DSP_ST0			0x01a8
+/* RV1126 register definition end   */
 #endif /* _ROCKCHIP_VOP_REG_H */

commit 081dec1b2b0ba94843ae28e95d7055cc065d95dc
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Wed Apr 29 14:56:01 2020 +0800

    drm/rockchip: Fix compile error when I2C_EDID disabled
    
    Change-Id: Ibb549312d9ee2468765e61ccf5c77742bd9f5d5d
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 57348e244e..19dde9c9f6 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -540,10 +540,11 @@ static int display_init(struct display_state *state)
 	struct rockchip_crtc *crtc = crtc_state->crtc;
 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
 	struct drm_display_mode *mode = &conn_state->mode;
-	int bpc;
 	int ret = 0;
 	static bool __print_once = false;
-
+#if defined(CONFIG_I2C_EDID)
+	int bpc;
+#endif
 	if (!__print_once) {
 		__print_once = true;
 		printf("Rockchip UBOOT DRM driver version: %s\n", DRIVER_VERSION);
@@ -617,10 +618,12 @@ static int display_init(struct display_state *state)
 		ret = video_bridge_read_edid(conn_state->bridge->dev,
 					     conn_state->edid, EDID_SIZE);
 		if (ret > 0) {
+#if defined(CONFIG_I2C_EDID)
 			ret = edid_get_drm_mode(conn_state->edid, ret, mode,
 						&bpc);
 			if (!ret)
 				edid_print_info((void *)&conn_state->edid);
+#endif
 		} else {
 			ret = video_bridge_get_timing(conn_state->bridge->dev);
 		}
@@ -628,6 +631,7 @@ static int display_init(struct display_state *state)
 		ret = conn_funcs->get_timing(state);
 	} else if (conn_funcs->get_edid) {
 		ret = conn_funcs->get_edid(state);
+#if defined(CONFIG_I2C_EDID)
 		if (!ret) {
 			ret = edid_get_drm_mode((void *)&conn_state->edid,
 						sizeof(conn_state->edid), mode,
@@ -635,6 +639,7 @@ static int display_init(struct display_state *state)
 			if (!ret)
 				edid_print_info((void *)&conn_state->edid);
 		}
+#endif
 	}
 
 	if (ret)

commit 619393876721f80f0ccdca8914d32fac059436f6
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Thu Jun 4 20:21:21 2020 +0800

    mtd: spinand: Assign initial value 0 for bad block marker
    
    This "= { }" smart initial methord is unreliable.
    
    Change-Id: I64860e8d056f44e99461a4fb68bc9b91c7f95732
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index 1fa82fb4f0..27f75228d6 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -691,7 +691,7 @@ static int spinand_mtd_block_isbad(struct mtd_info *mtd, loff_t offs)
 static int spinand_markbad(struct nand_device *nand, const struct nand_pos *pos)
 {
 	struct spinand_device *spinand = nand_to_spinand(nand);
-	u8 marker[2] = { };
+	u8 marker[2] = { 0, 0 };
 	struct nand_page_io_req req = {
 		.pos = *pos,
 		.ooboffs = 0,

commit 327380da2b6ca91c594755b87d57642c005e2be4
Author: Simon Xue <xxm@rock-chips.com>
Date:   Thu Jun 4 09:01:06 2020 +0800

    misc: rockchip_decompress: add limit decompressed buffer size
    
    In order to prevent physical memory from being written oversize,
    limit the decompressed buffer size, user can assign a size to
    decompress, the reserved destination buffer size is a choice
    
    Change-Id: I8723c5ec8d58ec1d443c5607987941cf67cf1a01
    Signed-off-by: Simon Xue <xxm@rock-chips.com>

diff --git a/drivers/misc/rockchip_decompress.c b/drivers/misc/rockchip_decompress.c
index 81be53e1a1..5e97be19bb 100644
--- a/drivers/misc/rockchip_decompress.c
+++ b/drivers/misc/rockchip_decompress.c
@@ -31,6 +31,8 @@ DECLARE_GLOBAL_DATA_PTR;
 #define DECOM_DICTID		0x44
 #define DECOM_CSL		0x48
 #define DECOM_CSH		0x4c
+#define DECOM_LMTSL             0x50
+#define DECOM_LMTSH             0x54
 
 #define LZ4_HEAD_CSUM_CHECK_EN	BIT(1)
 #define LZ4_BLOCK_CSUM_CHECK_EN	BIT(2)
@@ -86,6 +88,8 @@ static int rockchip_decom_start(struct udevice *dev, void *buf)
 {
 	struct rockchip_decom_priv *priv = dev_get_priv(dev);
 	struct decom_param *param = (struct decom_param *)buf;
+	unsigned long limit_lo = param->size & 0xffffffff;
+	unsigned long limit_hi = param->size >> 32;
 
 	priv->done = false;
 
@@ -109,6 +113,9 @@ static int rockchip_decom_start(struct udevice *dev, void *buf)
 	writel(param->addr_src, priv->base + DECOM_RADDR);
 	writel(param->addr_dst, priv->base + DECOM_WADDR);
 
+	writel(limit_lo, priv->base + DECOM_LMTSL);
+	writel(limit_hi, priv->base + DECOM_LMTSH);
+
 	writel(DECOM_INT_MASK, priv->base + DECOM_IEN);
 	writel(DECOM_ENABLE, priv->base + DECOM_ENR);
 

commit a6f23aea12a714815f701574631371fe806c13b7
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Jun 4 10:07:54 2020 +0800

    common: spl: define maximum decompressible size to prevent memory overrun
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ib0be02bc85cb16ccdd832abf9a56260b2f2e500d

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index bde63f4ae8..a606d40fd2 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -842,6 +842,14 @@ config SPL_KERNEL_COMPRESS_ADDR
 	  Load compressed kernel in this address, then call the
 	  decompress process to decompress the firmware.
 
+config SPL_KERNEL_DECOM_LIMIT_SIZE
+        hex "The decompress limit size"
+        depends on SPL && SPL_ROCKCHIP_HW_DECOMPRESS
+	default 0x1ff8000
+        help
+          Define kernel maximum decompressible size that prevent
+          memory overrun.
+
 config SPL_FDT_ADDR
 	hex "Device tree blob load address in spl"
 	depends on SPL
@@ -865,6 +873,14 @@ config SPL_RAMDISK_COMPRESS_ADDR
 	  Load compressed ramdisk in this address, then call the
 	  decompress process to decompress the firmware.
 
+config SPL_RAMDISK_DECOM_LIMIT_SIZE
+	hex "The decompress limit size"
+	depends on SPL && SPL_ROCKCHIP_HW_DECOMPRESS
+	default 0x3000000
+	help
+	  Define ramdisk maximum decompressible size that prevent
+	  memory overrun.
+
 config SPL_KERNEL_BOOT
 	bool "Enable boot kernel in SPL"
 	depends on SPL
diff --git a/common/spl/spl_rkfw.c b/common/spl/spl_rkfw.c
index 9445607424..0a63ee1e5f 100644
--- a/common/spl/spl_rkfw.c
+++ b/common/spl/spl_rkfw.c
@@ -351,7 +351,8 @@ static int rkfw_load_kernel(struct spl_load_info *info, u32 image_sector,
 		goto out;
 
 	ret = misc_decompress_start(dev, CONFIG_SPL_KERNEL_COMPRESS_ADDR,
-				    CONFIG_SPL_KERNEL_ADDR, hdr->kernel_size);
+				    CONFIG_SPL_KERNEL_ADDR,
+				    CONFIG_SPL_KERNEL_DECOM_LIMIT_SIZE);
 	if (ret)
 		goto out;
 
@@ -392,7 +393,7 @@ static int rkfw_load_kernel(struct spl_load_info *info, u32 image_sector,
 		ret = misc_decompress_start(dev,
 					    CONFIG_SPL_RAMDISK_COMPRESS_ADDR,
 					    CONFIG_SPL_RAMDISK_ADDR,
-					    hdr->kernel_size);
+					    CONFIG_SPL_RAMDISK_DECOM_LIMIT_SIZE);
 		if (ret)
 			goto out;
 #endif

commit 6c62cd54f5f64a6446ce10b6809dbdf761fabe68
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed Jun 3 19:33:37 2020 +0800

    configs: rv1126: increase the space of heap for SPL SPI Nand bbt
    
    Change-Id: If32f76b24c0deb4440ed47441f5627672c08fc27
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index b647c456bc..d22d3655c8 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -2,7 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SYS_MALLOC_F_LEN=0xc000
+CONFIG_SYS_MALLOC_F_LEN=0x10000
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh"
 CONFIG_ROCKCHIP_RV1126=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0

commit fd817f1d8be96aac4be3f3d0aa0bdb9ac73104b7
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Sun May 17 14:27:13 2020 +0800

    mtd: nand: fix error in BBT bit operation
    
    Change-Id: I51aab1342d8ded7ac6c19612d27abb8799b85850
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/bbt.c b/drivers/mtd/nand/bbt.c
index b071fdf38e..977080df57 100644
--- a/drivers/mtd/nand/bbt.c
+++ b/drivers/mtd/nand/bbt.c
@@ -391,13 +391,16 @@ int nanddev_bbt_set_block_status(struct nand_device *nand, unsigned int entry,
 	if (entry >= nanddev_neraseblocks(nand))
 		return -ERANGE;
 
-	pos[0] &= ~GENMASK(offs + bits_per_block - 1, offs);
+	if (offs + bits_per_block - 1 > 31)
+		pos[0] &= ~GENMASK(31, offs);
+	else
+		pos[0] &= ~GENMASK(offs + bits_per_block - 1, offs);
 	pos[0] |= val << offs;
 
 	if (bits_per_block + offs > BITS_PER_LONG) {
-		unsigned int rbits = bits_per_block + offs - BITS_PER_LONG;
+		unsigned int rbits = BITS_PER_LONG - offs;
 
-		pos[1] &= ~GENMASK(rbits - 1, 0);
+		pos[1] &= ~GENMASK(bits_per_block - rbits - 1, 0);
 		pos[1] |= val >> rbits;
 	}
 

commit 29f0ea3bb694657df898f1c9331601df6bb1a953
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Apr 27 11:45:50 2020 +0800

    mtd: nand: spi: select MTD_NAND_BBT_USING_FLASH
    
    Change-Id: I41a287ab79886982a5f12815afce0641fa641b45
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/Kconfig b/drivers/mtd/nand/spi/Kconfig
index 2197cb531f..1e69667ae9 100644
--- a/drivers/mtd/nand/spi/Kconfig
+++ b/drivers/mtd/nand/spi/Kconfig
@@ -3,5 +3,6 @@ menuconfig MTD_SPI_NAND
 	depends on MTD && DM_SPI
 	select MTD_NAND_CORE
 	select SPI_MEM
+	select MTD_NAND_BBT_USING_FLASH
 	help
 	  This is the framework for the SPI NAND device drivers.

commit 53bfae03927096b49fda494611cfc9fb0efdf445
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Apr 27 11:44:26 2020 +0800

    mtd: nand: add BBT using flash management strategy
    
    Change-Id: Ib71dfbcf68283d1118742ab29079cab395ff99ca
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 78ae04bdcb..b104b85a52 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -1,6 +1,14 @@
 config MTD_NAND_CORE
 	tristate
 
+config MTD_NAND_BBT_USING_FLASH
+	bool "Mtd Nand BBT using flash management strategy"
+	default n
+	help
+	  This is a simple flash BBT management strategy for Nand devices.
+
+	  Say Y when you want to use BBT in flash.
+
 source "drivers/mtd/nand/raw/Kconfig"
 
 source "drivers/mtd/nand/spi/Kconfig"
diff --git a/drivers/mtd/nand/bbt.c b/drivers/mtd/nand/bbt.c
index c6b16e411b..b071fdf38e 100644
--- a/drivers/mtd/nand/bbt.c
+++ b/drivers/mtd/nand/bbt.c
@@ -14,6 +14,217 @@
 #include <linux/slab.h>
 #endif
 
+#ifdef CONFIG_MTD_NAND_BBT_USING_FLASH
+
+#ifdef BBT_DEBUG
+#define BBT_DBG pr_err
+#else
+#define BBT_DBG(args...)
+#endif
+
+struct nanddev_bbt_info {
+	u8 pattern[4];
+	unsigned int version;
+};
+
+static u8 bbt_pattern[] = {'B', 'b', 't', '0' };
+
+/**
+ * nanddev_read_bbt() - Read the BBT (Bad Block Table)
+ * @nand: NAND device
+ * @block: bbt block address
+ * @update: true - get version and overwrite bbt.cache with new version;
+ *	false - get bbt version only;
+ *
+ * Initialize the in-memory BBT.
+ *
+ * Return: 0 in case of success, a negative error code otherwise.
+ */
+static int nanddev_read_bbt(struct nand_device *nand, u32 block, bool update)
+{
+	unsigned int bits_per_block = fls(NAND_BBT_BLOCK_NUM_STATUS);
+	unsigned int nblocks = nanddev_neraseblocks(nand);
+	unsigned int nbytes = DIV_ROUND_UP(nblocks * bits_per_block,
+					   BITS_PER_LONG) * 4;
+	struct mtd_info *mtd = nanddev_to_mtd(nand);
+	u8 *data_buf, *oob_buf;
+	struct nanddev_bbt_info *bbt_info;
+	struct mtd_oob_ops ops;
+	int bbt_page_num;
+	int ret = 0;
+	unsigned int version = 0;
+
+	if (!nand->bbt.cache)
+		return -ENOMEM;
+
+	if (block >= nblocks)
+		return -EINVAL;
+
+	/* aligned to page size, and even pages is better */
+	bbt_page_num = (sizeof(struct nanddev_bbt_info) + nbytes +
+		mtd->writesize - 1) >> mtd->writesize_shift;
+	bbt_page_num = (bbt_page_num + 1) / 2 * 2;
+	data_buf = kzalloc(bbt_page_num * mtd->writesize, GFP_KERNEL);
+	if (!data_buf)
+		return -ENOMEM;
+	oob_buf = kzalloc(bbt_page_num * mtd->oobsize, GFP_KERNEL);
+	if (!oob_buf) {
+		kfree(data_buf);
+
+		return -ENOMEM;
+	}
+
+	bbt_info = (struct nanddev_bbt_info *)(data_buf + nbytes);
+
+	memset(&ops, 0, sizeof(struct mtd_oob_ops));
+	ops.mode = MTD_OPS_RAW;
+	ops.datbuf = data_buf;
+	ops.len = bbt_page_num * mtd->writesize;
+	ops.oobbuf = oob_buf;
+	ops.ooblen = bbt_page_num * mtd->oobsize;
+	ops.ooboffs = 0;
+
+	/* Store one entry for each block */
+	ret = mtd_read_oob(mtd, block * mtd->erasesize, &ops);
+	if (ret && ret != -EUCLEAN) {
+		pr_err("%s fail %d\n", __func__, ret);
+		ret = -EIO;
+		goto out;
+	} else {
+		ret = 0;
+	}
+
+	if (oob_buf[0] != 0xff && !memcmp(bbt_pattern, bbt_info->pattern, 4))
+		version = bbt_info->version;
+
+	BBT_DBG("read_bbt from blk=%d tag=%d ver=%d\n", block, update, version);
+	if (update && version > nand->bbt.version) {
+		memcpy(nand->bbt.cache, data_buf, nbytes);
+		nand->bbt.version = version;
+	}
+
+out:
+	kfree(data_buf);
+	kfree(oob_buf);
+
+	return ret < 0 ? -EIO : version;
+}
+
+static int nanddev_write_bbt(struct nand_device *nand, u32 block)
+{
+	unsigned int bits_per_block = fls(NAND_BBT_BLOCK_NUM_STATUS);
+	unsigned int nblocks = nanddev_neraseblocks(nand);
+	unsigned int nbytes = DIV_ROUND_UP(nblocks * bits_per_block,
+					   BITS_PER_LONG) * 4;
+	struct mtd_info *mtd = nanddev_to_mtd(nand);
+	u8 *data_buf, *oob_buf;
+	struct nanddev_bbt_info *bbt_info;
+	struct mtd_oob_ops ops;
+	int bbt_page_num;
+	int ret = 0;
+	struct nand_pos pos;
+
+	BBT_DBG("write_bbt to blk=%d ver=%d\n", block, nand->bbt.version);
+	if (!nand->bbt.cache)
+		return -ENOMEM;
+
+	if (block >= nblocks)
+		return -EINVAL;
+
+	/* aligned to page size, and even pages is better */
+	bbt_page_num = (sizeof(struct nanddev_bbt_info) + nbytes +
+		mtd->writesize - 1) >> mtd->writesize_shift;
+	bbt_page_num = (bbt_page_num + 1) / 2 * 2;
+
+	data_buf = kzalloc(bbt_page_num * mtd->writesize, GFP_KERNEL);
+	if (!data_buf)
+		return -ENOMEM;
+	oob_buf = kzalloc(bbt_page_num * mtd->oobsize, GFP_KERNEL);
+	if (!oob_buf) {
+		kfree(data_buf);
+
+		return -ENOMEM;
+	}
+
+	bbt_info = (struct nanddev_bbt_info *)(data_buf + nbytes);
+
+	memcpy(data_buf, nand->bbt.cache, nbytes);
+	memcpy(bbt_info, bbt_pattern, 4);
+	bbt_info->version = nand->bbt.version;
+
+	/* Store one entry for each block */
+	nanddev_offs_to_pos(nand, block * mtd->erasesize, &pos);
+	ret = nand->ops->erase(nand, &pos);
+	if (ret)
+		goto out;
+
+	memset(&ops, 0, sizeof(struct mtd_oob_ops));
+	ops.mode = MTD_OPS_RAW;
+	ops.datbuf = data_buf;
+	ops.len = bbt_page_num * mtd->writesize;
+	ops.oobbuf = oob_buf;
+	ops.ooblen = bbt_page_num * mtd->oobsize;
+	ops.ooboffs = 0;
+	ret = mtd_write_oob(mtd, block * mtd->erasesize, &ops);
+
+out:
+	kfree(data_buf);
+	kfree(oob_buf);
+
+	return ret;
+}
+
+static __maybe_unused int nanddev_bbt_format(struct nand_device *nand)
+{
+	unsigned int nblocks = nanddev_neraseblocks(nand);
+	struct mtd_info *mtd = nanddev_to_mtd(nand);
+	struct nand_pos pos;
+	u32 start_block, block;
+
+	start_block = nblocks - NANDDEV_BBT_SCAN_MAXBLOCKS;
+
+	for (block = 0; block < nblocks; block++) {
+		nanddev_offs_to_pos(nand, block * mtd->erasesize, &pos);
+		if (nanddev_isbad(nand, &pos))
+			nanddev_bbt_set_block_status(nand, block,
+						     NAND_BBT_BLOCK_FACTORY_BAD);
+	}
+
+	for (block = 0; block < NANDDEV_BBT_SCAN_MAXBLOCKS; block++) {
+		if (nanddev_bbt_get_block_status(nand, start_block + block) ==
+			NAND_BBT_BLOCK_GOOD)
+			nanddev_bbt_set_block_status(nand, start_block + block,
+						     NAND_BBT_BLOCK_WORN);
+	}
+
+	return 0;
+}
+
+static int nanddev_scan_bbt(struct nand_device *nand)
+{
+	unsigned int nblocks = nanddev_neraseblocks(nand);
+	u32 start_block, block;
+	int ret = 0;
+
+	nand->bbt.version = 0;
+	start_block = nblocks - NANDDEV_BBT_SCAN_MAXBLOCKS;
+	for (block = 0; block < NANDDEV_BBT_SCAN_MAXBLOCKS; block++)
+		nanddev_read_bbt(nand, start_block + block, true);
+
+	nand->bbt.option |= NANDDEV_BBT_SCANNED;
+#ifndef CONFIG_SPL_BUILD
+	if (nand->bbt.version == 0) {
+		nanddev_bbt_format(nand);
+		ret = nanddev_bbt_update(nand);
+		if (ret)
+			pr_err("%s fail\n", __func__);
+	}
+#endif
+
+	return ret;
+}
+#endif
+
 /**
  * nanddev_bbt_init() - Initialize the BBT (Bad Block Table)
  * @nand: NAND device
@@ -61,6 +272,62 @@ EXPORT_SYMBOL_GPL(nanddev_bbt_cleanup);
  */
 int nanddev_bbt_update(struct nand_device *nand)
 {
+#ifdef CONFIG_MTD_NAND_BBT_USING_FLASH
+	if (nand->bbt.cache &&
+	    nand->bbt.option & NANDDEV_BBT_USE_FLASH) {
+		unsigned int nblocks = nanddev_neraseblocks(nand);
+		u32 bbt_version[NANDDEV_BBT_SCAN_MAXBLOCKS];
+		int start_block, block;
+		u32 min_version, block_des;
+		int ret, count = 0;
+
+		start_block = nblocks - NANDDEV_BBT_SCAN_MAXBLOCKS;
+		for (block = 0; block < NANDDEV_BBT_SCAN_MAXBLOCKS; block++) {
+			ret = nanddev_bbt_get_block_status(nand, start_block + block);
+			if (ret == NAND_BBT_BLOCK_FACTORY_BAD) {
+				bbt_version[block] = 0xFFFFFFFF;
+				continue;
+			}
+			ret = nanddev_read_bbt(nand, start_block + block,
+					       false);
+			if (ret < 0)
+				bbt_version[block] = 0xFFFFFFFF;
+			else if (ret == 0)
+				bbt_version[block] = 0;
+			else
+				bbt_version[block] = ret;
+		}
+get_min_ver:
+		min_version = 0xFFFFFFFF;
+		block_des = 0;
+		for (block = 0; block < NANDDEV_BBT_SCAN_MAXBLOCKS; block++) {
+			if (bbt_version[block] < min_version) {
+				min_version = bbt_version[block];
+				block_des = start_block + block;
+			}
+		}
+
+		if (block_des > 0) {
+			nand->bbt.version++;
+			ret = nanddev_write_bbt(nand, block_des);
+			bbt_version[block_des - start_block] = 0xFFFFFFFF;
+			if (ret) {
+				pr_err("%s blk= %d ret= %d\n", __func__,
+				       block_des, ret);
+				goto get_min_ver;
+			} else {
+				count++;
+				if (count < 2)
+					goto get_min_ver;
+				BBT_DBG("%s success\n", __func__);
+			}
+		} else {
+			pr_err("%s failed\n", __func__);
+
+			return -1;
+		}
+	}
+#endif
 	return 0;
 }
 EXPORT_SYMBOL_GPL(nanddev_bbt_update);
@@ -82,6 +349,12 @@ int nanddev_bbt_get_block_status(const struct nand_device *nand,
 	unsigned int offs = (entry * bits_per_block) % BITS_PER_LONG;
 	unsigned long status;
 
+#ifdef CONFIG_MTD_NAND_BBT_USING_FLASH
+	if (nand->bbt.option & NANDDEV_BBT_USE_FLASH &&
+	    !(nand->bbt.option & NANDDEV_BBT_SCANNED))
+		nanddev_scan_bbt((struct nand_device *)nand);
+#endif
+
 	if (entry >= nanddev_neraseblocks(nand))
 		return -ERANGE;
 

commit b8af31a74b204e73154ba6d3556ca3bbd4c66012
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Apr 27 11:30:58 2020 +0800

    mtd: nand: spi: enable using BBT in flash
    
    Change-Id: I4f793a10ae3f329c6be412785a01d0f117cd9b0b
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index 6198ae168a..1fa82fb4f0 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -1078,6 +1078,7 @@ static int spinand_init(struct spinand_device *spinand)
 			goto err_free_bufs;
 	}
 
+	nand->bbt.option = NANDDEV_BBT_USE_FLASH;
 	ret = nanddev_init(nand, &spinand_ops, THIS_MODULE);
 	if (ret)
 		goto err_manuf_cleanup;

commit d55257eea0279b321bb15c17c6e5c2966b97f8d8
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Apr 27 11:30:43 2020 +0800

    mtd: nand: Support using BBT in flash
    
    Change-Id: I67c8859a711156d1264f783ec2749139999228f3
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index a7595680d8..e37ea54278 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -122,12 +122,23 @@ struct nand_ecc_req {
 
 #define NAND_ECCREQ(str, stp) { .strength = (str), .step_size = (stp) }
 
+/* nand_bbt option */
+#define NANDDEV_BBT_USE_FLASH		BIT(0)
+#define NANDDEV_BBT_SCANNED		BIT(1)
+
+/* The maximum number of blocks to scan for a bbt */
+#define NANDDEV_BBT_SCAN_MAXBLOCKS	4
+
 /**
  * struct nand_bbt - bad block table object
  * @cache: in memory BBT cache
+ * @option: the option of BBT
+ * @version: current memory BBT cache version
  */
 struct nand_bbt {
 	unsigned long *cache;
+	unsigned int option;
+	unsigned int version;
 };
 
 struct nand_device;

commit 747423edb64907616669423b482da60412f40e86
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Jun 2 18:06:39 2020 +0800

    rockchip: spl: bring up to kernel when CONFIG_ROCKCHIP_BOOT_MODE_REG is 0
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I3f576fa0527a42ebede6ec252586cf681974fa97

diff --git a/arch/arm/include/asm/arch-rockchip/boot_mode.h b/arch/arm/include/asm/arch-rockchip/boot_mode.h
index f6b5835bb0..806a21d2c7 100644
--- a/arch/arm/include/asm/arch-rockchip/boot_mode.h
+++ b/arch/arm/include/asm/arch-rockchip/boot_mode.h
@@ -3,6 +3,8 @@
 
 /* high 24 bits is tag, low 8 bits is type */
 #define REBOOT_FLAG		0x5242C300
+/* cold boot */
+#define BOOT_COLD		0
 /* normal boot */
 #define BOOT_NORMAL		(REBOOT_FLAG + 0)
 /* enter loader rockusb mode */
diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index ff9a2d8286..abe9588059 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -284,6 +284,7 @@ void spl_next_stage(struct spl_image_info *spl)
 
 	reg_boot_mode = readl((void *)CONFIG_ROCKCHIP_BOOT_MODE_REG);
 	switch (reg_boot_mode) {
+	case BOOT_COLD:
 	case BOOT_PANIC:
 	case BOOT_WATCHDOG:
 	case BOOT_NORMAL:

commit 371e5b63adf515c8ceb2072b1b247784db230cf3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 3 11:55:19 2020 +0800

    rv1126: common.h: set fit as 1st boot image type
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Id36149c79eb0b08fbcb92bd2d55bb808a42bf9dd

diff --git a/include/configs/rv1126_common.h b/include/configs/rv1126_common.h
index 9d70795fb8..f62a778849 100644
--- a/include/configs/rv1126_common.h
+++ b/include/configs/rv1126_common.h
@@ -79,8 +79,8 @@
 	"boot_fit;"
 #else
 #define RKIMG_BOOTCOMMAND		\
-	"boot_uimage;"			\
 	"boot_fit;"			\
+	"boot_uimage;"			\
 	"boot_android ${devtype} ${devnum};"
 #endif
 #endif

commit 25047d3f40be1147590425f1e76f529d14ebd169
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 3 11:43:03 2020 +0800

    rockchip: board: update cli message format
    
    "Cmd interface" is easy to understand.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I0c74ad595f6c24abaf1b98bf7a09dc5060a4755d

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index baf6254492..c8f0cd34c0 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -343,7 +343,7 @@ static void board_debug_init(void)
 	}
 
 	if (IS_ENABLED(CONFIG_CONSOLE_DISABLE_CLI))
-		printf("CLI: off\n");
+		printf("Cmd interface: disabled\n");
 }
 
 #ifdef CONFIG_MTD_BLK

commit 360a291130cb78a906de30f326a7a3bdf57603c4
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue Jun 2 09:17:05 2020 +0800

    mtd: mtd_blk: Logical offset should not mix with map address
    
    1.Logical offset should not mix with map address
    2.Format with nand_read_skip_bad
    
    Change-Id: I0e5adec374ce4de437e4ce7368caec4c7c07e83b
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index 04c7447366..e3218a0d68 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -133,31 +133,33 @@ static __maybe_unused int mtd_map_read(struct mtd_info *mtd, loff_t offset,
 {
 	size_t left_to_read = *length;
 	u_char *p_buffer = buffer;
-	u32 erasesize = mtd->erasesize;
 	int rval;
 
 	while (left_to_read > 0) {
-		size_t block_offset = offset & (erasesize - 1);
+		size_t block_offset = offset & (mtd->erasesize - 1);
 		size_t read_length;
+		loff_t mapped_offset;
 
 		if (offset >= mtd->size)
 			return 0;
 
-		if (!get_mtd_blk_map_address(mtd, &offset)) {
-			if (mtd_block_isbad(mtd, offset & ~(erasesize - 1))) {
-				printf("Skip bad block 0x%08llx\n",
-				       offset & ~(erasesize - 1));
-				offset += erasesize - block_offset;
+		mapped_offset = offset;
+		if (!get_mtd_blk_map_address(mtd, &mapped_offset)) {
+			if (mtd_block_isbad(mtd, mapped_offset &
+					    ~(mtd->erasesize - 1))) {
+				printf("Skipping bad block 0x%08llx\n",
+				       offset & ~(mtd->erasesize - 1));
+				offset += mtd->erasesize - block_offset;
 				continue;
 			}
 		}
 
-		if (left_to_read < (erasesize - block_offset))
+		if (left_to_read < (mtd->erasesize - block_offset))
 			read_length = left_to_read;
 		else
-			read_length = erasesize - block_offset;
+			read_length = mtd->erasesize - block_offset;
 
-		rval = mtd_read(mtd, offset, read_length, &read_length,
+		rval = mtd_read(mtd, mapped_offset, read_length, &read_length,
 				p_buffer);
 		if (rval && rval != -EUCLEAN) {
 			printf("NAND read from offset %llx failed %d\n",

commit 301f8dd17dc05a74c384d2cd1e829d2e8c1b85f3
Author: Simon Glass <sjg@chromium.org>
Date:   Mon Feb 3 07:35:56 2020 -0700

    UPSTREAM: mtd: Rename free() to rfree()
    
    This function name conflicts with our desire to #define free() to
    something else on sandbox. Since it deals with resources, rename it to
    rfree().
    
    Change-Id: I2718843dd4646b7450c36e84cc16e6440c718959
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 8d38a8459b0de45f5ff41f3e11c278a5cf395fd0)

diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c
index 0809adfa19..3dff0596fa 100644
--- a/drivers/mtd/mtdcore.c
+++ b/drivers/mtd/mtdcore.c
@@ -1182,10 +1182,10 @@ int mtd_ooblayout_free(struct mtd_info *mtd, int section,
 	if (!mtd || section < 0)
 		return -EINVAL;
 
-	if (!mtd->ooblayout || !mtd->ooblayout->free)
+	if (!mtd->ooblayout || !mtd->ooblayout->rfree)
 		return -ENOTSUPP;
 
-	return mtd->ooblayout->free(mtd, section, oobfree);
+	return mtd->ooblayout->rfree(mtd, section, oobfree);
 }
 EXPORT_SYMBOL_GPL(mtd_ooblayout_free);
 
diff --git a/drivers/mtd/nand/raw/denali.c b/drivers/mtd/nand/raw/denali.c
index d9f3c32eb9..ea7098e315 100644
--- a/drivers/mtd/nand/raw/denali.c
+++ b/drivers/mtd/nand/raw/denali.c
@@ -1178,7 +1178,7 @@ static int denali_ooblayout_free(struct mtd_info *mtd, int section,
 
 static const struct mtd_ooblayout_ops denali_ooblayout_ops = {
 	.ecc = denali_ooblayout_ecc,
-	.free = denali_ooblayout_free,
+	.rfree = denali_ooblayout_free,
 };
 
 static int denali_multidev_fixup(struct denali_nand_info *denali)
diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index 6ded360f7f..6198ae168a 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -1011,7 +1011,7 @@ static int spinand_noecc_ooblayout_free(struct mtd_info *mtd, int section,
 
 static const struct mtd_ooblayout_ops spinand_noecc_ooblayout = {
 	.ecc = spinand_noecc_ooblayout_ecc,
-	.free = spinand_noecc_ooblayout_free,
+	.rfree = spinand_noecc_ooblayout_free,
 };
 
 static int spinand_init(struct spinand_device *spinand)
diff --git a/drivers/mtd/nand/spi/gigadevice.c b/drivers/mtd/nand/spi/gigadevice.c
index b273b49ae3..8de69abb8a 100644
--- a/drivers/mtd/nand/spi/gigadevice.c
+++ b/drivers/mtd/nand/spi/gigadevice.c
@@ -145,7 +145,7 @@ static int gd5f2gq4xexxg_ecc_get_status(struct spinand_device *spinand,
 
 static const struct mtd_ooblayout_ops gd5fxgq4xexxg_ooblayout = {
 	.ecc = gd5fxgq4xexxg_ooblayout_ecc,
-	.free = gd5fxgq4xexxg_ooblayout_free,
+	.rfree = gd5fxgq4xexxg_ooblayout_free,
 };
 
 static const struct spinand_info gigadevice_spinand_table[] = {
diff --git a/drivers/mtd/nand/spi/macronix.c b/drivers/mtd/nand/spi/macronix.c
index 662c561e50..1119677f6f 100644
--- a/drivers/mtd/nand/spi/macronix.c
+++ b/drivers/mtd/nand/spi/macronix.c
@@ -47,7 +47,7 @@ static int mx35lfxge4ab_ooblayout_free(struct mtd_info *mtd, int section,
 
 static const struct mtd_ooblayout_ops mx35lfxge4ab_ooblayout = {
 	.ecc = mx35lfxge4ab_ooblayout_ecc,
-	.free = mx35lfxge4ab_ooblayout_free,
+	.rfree = mx35lfxge4ab_ooblayout_free,
 };
 
 static int mx35lf1ge4ab_get_eccsr(struct spinand_device *spinand, u8 *eccsr)
diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c
index 83951c5d0f..9c24542f96 100644
--- a/drivers/mtd/nand/spi/micron.c
+++ b/drivers/mtd/nand/spi/micron.c
@@ -63,7 +63,7 @@ static int mt29f2g01abagd_ooblayout_free(struct mtd_info *mtd, int section,
 
 static const struct mtd_ooblayout_ops mt29f2g01abagd_ooblayout = {
 	.ecc = mt29f2g01abagd_ooblayout_ecc,
-	.free = mt29f2g01abagd_ooblayout_free,
+	.rfree = mt29f2g01abagd_ooblayout_free,
 };
 
 static int mt29f2g01abagd_ecc_get_status(struct spinand_device *spinand,
diff --git a/drivers/mtd/nand/spi/winbond.c b/drivers/mtd/nand/spi/winbond.c
index 53017d6e58..cc320236d5 100644
--- a/drivers/mtd/nand/spi/winbond.c
+++ b/drivers/mtd/nand/spi/winbond.c
@@ -59,7 +59,7 @@ static int w25m02gv_ooblayout_free(struct mtd_info *mtd, int section,
 
 static const struct mtd_ooblayout_ops w25m02gv_ooblayout = {
 	.ecc = w25m02gv_ooblayout_ecc,
-	.free = w25m02gv_ooblayout_free,
+	.rfree = w25m02gv_ooblayout_free,
 };
 
 static int w25m02gv_select_target(struct spinand_device *spinand,
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index ddd8e543fb..b848c0da3d 100644
--- a/include/linux/mtd/mtd.h
+++ b/include/linux/mtd/mtd.h
@@ -134,8 +134,8 @@ struct mtd_oob_region {
 struct mtd_ooblayout_ops {
 	int (*ecc)(struct mtd_info *mtd, int section,
 		   struct mtd_oob_region *oobecc);
-	int (*free)(struct mtd_info *mtd, int section,
-		    struct mtd_oob_region *oobfree);
+	int (*rfree)(struct mtd_info *mtd, int section,
+		     struct mtd_oob_region *oobfree);
 };
 
 /*

commit b16d7c2247c8bae53adea493aaa077e842a5bd67
Author: William Zhang <william.zhang@broadcom.com>
Date:   Wed Sep 4 10:51:13 2019 -0700

    UPSTREAM: drivers: nand: brcmnand: fix nand_chip ecc layout structure
    
    The current brcmnand driver is based on 4.18 linux kernel which uses
    mtd_set_ooblayout to set ecc layout. But nand base code in u-boot is from
    old kernel which does not use this new API and expect nand_chip.ecc.layout
    structure to be set. This cause nand_scan_tail function running into a bug
    check if the device has a different oob size than the default ones.
    
    This patch ports the brcmstb_choose_ecc_layout function from kernel 4.6.7
    that supports the ecc layout struture and replaces the mtd_set_ooblayout
    method
    
    Change-Id: I31aec45275decfb03af2829c744c3dda0e261d12
    Signed-off-by: William Zhang <william.zhang@broadcom.com>
    Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit e365de90517ba4686d7a88417b1a729f5891d376)

diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
index faa6da42d5..0745929253 100644
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -888,183 +888,131 @@ static inline bool is_hamming_ecc(struct brcmnand_controller *ctrl,
 }
 
 /*
- * Set mtd->ooblayout to the appropriate mtd_ooblayout_ops given
- * the layout/configuration.
- * Returns -ERRCODE on failure.
+ * Returns a nand_ecclayout strucutre for the given layout/configuration.
+ * Returns NULL on failure.
  */
-static int brcmnand_hamming_ooblayout_ecc(struct mtd_info *mtd, int section,
-					  struct mtd_oob_region *oobregion)
+static struct nand_ecclayout *brcmnand_create_layout(int ecc_level,
+						     struct brcmnand_host *host)
 {
-	struct nand_chip *chip = mtd_to_nand(mtd);
-	struct brcmnand_host *host = nand_get_controller_data(chip);
-	struct brcmnand_cfg *cfg = &host->hwcfg;
-	int sas = cfg->spare_area_size << cfg->sector_size_1k;
-	int sectors = cfg->page_size / (512 << cfg->sector_size_1k);
-
-	if (section >= sectors)
-		return -ERANGE;
-
-	oobregion->offset = (section * sas) + 6;
-	oobregion->length = 3;
-
-	return 0;
-}
-
-static int brcmnand_hamming_ooblayout_free(struct mtd_info *mtd, int section,
-					   struct mtd_oob_region *oobregion)
-{
-	struct nand_chip *chip = mtd_to_nand(mtd);
-	struct brcmnand_host *host = nand_get_controller_data(chip);
 	struct brcmnand_cfg *cfg = &host->hwcfg;
-	int sas = cfg->spare_area_size << cfg->sector_size_1k;
-	int sectors = cfg->page_size / (512 << cfg->sector_size_1k);
+	int i, j;
+	struct nand_ecclayout *layout;
+	int req;
+	int sectors;
+	int sas;
+	int idx1, idx2;
 
-	if (section >= sectors * 2)
-		return -ERANGE;
-
-	oobregion->offset = (section / 2) * sas;
-
-	if (section & 1) {
-		oobregion->offset += 9;
-		oobregion->length = 7;
-	} else {
-		oobregion->length = 6;
-
-		/* First sector of each page may have BBI */
-		if (!section) {
-			/*
-			 * Small-page NAND use byte 6 for BBI while large-page
-			 * NAND use byte 0.
-			 */
-			if (cfg->page_size > 512)
-				oobregion->offset++;
-			oobregion->length--;
+#ifndef __UBOOT__
+	layout = devm_kzalloc(&host->pdev->dev, sizeof(*layout), GFP_KERNEL);
+#else
+	layout = devm_kzalloc(host->pdev, sizeof(*layout), GFP_KERNEL);
+#endif
+	if (!layout)
+		return NULL;
+
+	sectors = cfg->page_size / (512 << cfg->sector_size_1k);
+	sas = cfg->spare_area_size << cfg->sector_size_1k;
+
+	/* Hamming */
+	if (is_hamming_ecc(host->ctrl, cfg)) {
+		for (i = 0, idx1 = 0, idx2 = 0; i < sectors; i++) {
+			/* First sector of each page may have BBI */
+			if (i == 0) {
+				layout->oobfree[idx2].offset = i * sas + 1;
+				/* Small-page NAND use byte 6 for BBI */
+				if (cfg->page_size == 512)
+					layout->oobfree[idx2].offset--;
+				layout->oobfree[idx2].length = 5;
+			} else {
+				layout->oobfree[idx2].offset = i * sas;
+				layout->oobfree[idx2].length = 6;
+			}
+			idx2++;
+			layout->eccpos[idx1++] = i * sas + 6;
+			layout->eccpos[idx1++] = i * sas + 7;
+			layout->eccpos[idx1++] = i * sas + 8;
+			layout->oobfree[idx2].offset = i * sas + 9;
+			layout->oobfree[idx2].length = 7;
+			idx2++;
+			/* Leave zero-terminated entry for OOBFREE */
+			if (idx1 >= MTD_MAX_ECCPOS_ENTRIES_LARGE ||
+			    idx2 >= MTD_MAX_OOBFREE_ENTRIES_LARGE - 1)
+				break;
 		}
-	}
-
-	return 0;
-}
-
-static const struct mtd_ooblayout_ops brcmnand_hamming_ooblayout_ops = {
-	.ecc = brcmnand_hamming_ooblayout_ecc,
-	.free = brcmnand_hamming_ooblayout_free,
-};
-
-static int brcmnand_bch_ooblayout_ecc(struct mtd_info *mtd, int section,
-				      struct mtd_oob_region *oobregion)
-{
-	struct nand_chip *chip = mtd_to_nand(mtd);
-	struct brcmnand_host *host = nand_get_controller_data(chip);
-	struct brcmnand_cfg *cfg = &host->hwcfg;
-	int sas = cfg->spare_area_size << cfg->sector_size_1k;
-	int sectors = cfg->page_size / (512 << cfg->sector_size_1k);
-
-	if (section >= sectors)
-		return -ERANGE;
 
-	oobregion->offset = (section * (sas + 1)) - chip->ecc.bytes;
-	oobregion->length = chip->ecc.bytes;
-
-	return 0;
-}
-
-static int brcmnand_bch_ooblayout_free_lp(struct mtd_info *mtd, int section,
-					  struct mtd_oob_region *oobregion)
-{
-	struct nand_chip *chip = mtd_to_nand(mtd);
-	struct brcmnand_host *host = nand_get_controller_data(chip);
-	struct brcmnand_cfg *cfg = &host->hwcfg;
-	int sas = cfg->spare_area_size << cfg->sector_size_1k;
-	int sectors = cfg->page_size / (512 << cfg->sector_size_1k);
-
-	if (section >= sectors)
-		return -ERANGE;
-
-	if (sas <= chip->ecc.bytes)
-		return 0;
-
-	oobregion->offset = section * sas;
-	oobregion->length = sas - chip->ecc.bytes;
-
-	if (!section) {
-		oobregion->offset++;
-		oobregion->length--;
+		return layout;
 	}
 
-	return 0;
-}
-
-static int brcmnand_bch_ooblayout_free_sp(struct mtd_info *mtd, int section,
-					  struct mtd_oob_region *oobregion)
-{
-	struct nand_chip *chip = mtd_to_nand(mtd);
-	struct brcmnand_host *host = nand_get_controller_data(chip);
-	struct brcmnand_cfg *cfg = &host->hwcfg;
-	int sas = cfg->spare_area_size << cfg->sector_size_1k;
+	/*
+	 * CONTROLLER_VERSION:
+	 *   < v5.0: ECC_REQ = ceil(BCH_T * 13/8)
+	 *  >= v5.0: ECC_REQ = ceil(BCH_T * 14/8)
+	 * But we will just be conservative.
+	 */
+	req = DIV_ROUND_UP(ecc_level * 14, 8);
+	if (req >= sas) {
+		dev_err(&host->pdev->dev,
+			"error: ECC too large for OOB (ECC bytes %d, spare sector %d)\n",
+			req, sas);
+		return NULL;
+	}
 
-	if (section > 1 || sas - chip->ecc.bytes < 6 ||
-	    (section && sas - chip->ecc.bytes == 6))
-		return -ERANGE;
+	layout->eccbytes = req * sectors;
+	for (i = 0, idx1 = 0, idx2 = 0; i < sectors; i++) {
+		for (j = sas - req; j < sas && idx1 <
+				MTD_MAX_ECCPOS_ENTRIES_LARGE; j++, idx1++)
+			layout->eccpos[idx1] = i * sas + j;
 
-	if (!section) {
-		oobregion->offset = 0;
-		oobregion->length = 5;
-	} else {
-		oobregion->offset = 6;
-		oobregion->length = sas - chip->ecc.bytes - 6;
+		/* First sector of each page may have BBI */
+		if (i == 0) {
+			if (cfg->page_size == 512 && (sas - req >= 6)) {
+				/* Small-page NAND use byte 6 for BBI */
+				layout->oobfree[idx2].offset = 0;
+				layout->oobfree[idx2].length = 5;
+				idx2++;
+				if (sas - req > 6) {
+					layout->oobfree[idx2].offset = 6;
+					layout->oobfree[idx2].length =
+						sas - req - 6;
+					idx2++;
+				}
+			} else if (sas > req + 1) {
+				layout->oobfree[idx2].offset = i * sas + 1;
+				layout->oobfree[idx2].length = sas - req - 1;
+				idx2++;
+			}
+		} else if (sas > req) {
+			layout->oobfree[idx2].offset = i * sas;
+			layout->oobfree[idx2].length = sas - req;
+			idx2++;
+		}
+		/* Leave zero-terminated entry for OOBFREE */
+		if (idx1 >= MTD_MAX_ECCPOS_ENTRIES_LARGE ||
+		    idx2 >= MTD_MAX_OOBFREE_ENTRIES_LARGE - 1)
+			break;
 	}
 
-	return 0;
+	return layout;
 }
 
-static const struct mtd_ooblayout_ops brcmnand_bch_lp_ooblayout_ops = {
-	.ecc = brcmnand_bch_ooblayout_ecc,
-	.free = brcmnand_bch_ooblayout_free_lp,
-};
-
-static const struct mtd_ooblayout_ops brcmnand_bch_sp_ooblayout_ops = {
-	.ecc = brcmnand_bch_ooblayout_ecc,
-	.free = brcmnand_bch_ooblayout_free_sp,
-};
-
-static int brcmstb_choose_ecc_layout(struct brcmnand_host *host)
+static struct nand_ecclayout *brcmstb_choose_ecc_layout(
+		struct brcmnand_host *host)
 {
+	struct nand_ecclayout *layout;
 	struct brcmnand_cfg *p = &host->hwcfg;
-	struct mtd_info *mtd = nand_to_mtd(&host->chip);
-	struct nand_ecc_ctrl *ecc = &host->chip.ecc;
 	unsigned int ecc_level = p->ecc_level;
-	int sas = p->spare_area_size << p->sector_size_1k;
-	int sectors = p->page_size / (512 << p->sector_size_1k);
 
 	if (p->sector_size_1k)
 		ecc_level <<= 1;
 
-	if (is_hamming_ecc(host->ctrl, p)) {
-		ecc->bytes = 3 * sectors;
-		mtd_set_ooblayout(mtd, &brcmnand_hamming_ooblayout_ops);
-		return 0;
-	}
-
-	/*
-	 * CONTROLLER_VERSION:
-	 *   < v5.0: ECC_REQ = ceil(BCH_T * 13/8)
-	 *  >= v5.0: ECC_REQ = ceil(BCH_T * 14/8)
-	 * But we will just be conservative.
-	 */
-	ecc->bytes = DIV_ROUND_UP(ecc_level * 14, 8);
-	if (p->page_size == 512)
-		mtd_set_ooblayout(mtd, &brcmnand_bch_sp_ooblayout_ops);
-	else
-		mtd_set_ooblayout(mtd, &brcmnand_bch_lp_ooblayout_ops);
-
-	if (ecc->bytes >= sas) {
+	layout = brcmnand_create_layout(ecc_level, host);
+	if (!layout) {
 		dev_err(&host->pdev->dev,
-			"error: ECC too large for OOB (ECC bytes %d, spare sector %d)\n",
-			ecc->bytes, sas);
-		return -EINVAL;
+				"no proper ecc_layout for this NAND cfg\n");
+		return NULL;
 	}
 
-	return 0;
+	return layout;
 }
 
 static void brcmnand_wp(struct mtd_info *mtd, int wp)
@@ -2383,9 +2331,9 @@ static int brcmnand_init_cs(struct brcmnand_host *host, ofnode dn)
 	/* only use our internal HW threshold */
 	mtd->bitflip_threshold = 1;
 
-	ret = brcmstb_choose_ecc_layout(host);
-	if (ret)
-		return ret;
+	chip->ecc.layout = brcmstb_choose_ecc_layout(host);
+	if (!chip->ecc.layout)
+		return -ENXIO;
 
 	ret = nand_scan_tail(mtd);
 	if (ret)

commit 5cc4c624ec9a7d38dd95b0e36378a40a40eab261
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 3 09:22:45 2020 +0800

    dm: uclass: move new uclass id to the end
    
    This patch handles the issue in SPL:
    
            U-Boot SPL board initspl_early_init()
               - found match at 'rv1126_syscon'
               - found match at 'rv1126_syscon'
               - found match at 'syscon'
               - found match at 'rockchip_rv1126_pmucru'
               - found match at 'rockchip_rv1126_cru'
               - found match at 'ns16550_serial'
               - found match at 'rockchip_rk3288_dw_mshc'
               - found match at 'rk_nandc_v6'
               - found match at 'rockchip_sfc'
               - found match at 'spi_nand'
               - found match at 'spi_flash_std'
               - found match at 'rockchip_crypto_v2'
               - found match at 'rockchip_secure_otp_v2'
            Cannot find uclass for id 36: please add the UCLASS_DRIVER() declaration for this UCLASS_... id
            Missing uclass for driver rockchip_secure_otp_v2
            secure_otp@0xff5d0000: ret=-96
            dm_scan_fdt() failed: -96
            dm_extended_scan_dt() failed: -96
            dm_init_and_scan() returned error -96
            spl_early_init() failed: -96
            ......
    
    The root cause is drivers/misc/rockchip-secure-otp-v2.S is pre-compile
    but not compile every time, it occupies the UCLASS_MISC id as 36.
    
    There are the same situation for other otp drivers, so let's move it to
    the end.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I58a2bec703c2af743d209192fefda6ff6167b01c

diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index dfe709611a..117bf7d4fe 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -37,7 +37,6 @@ enum uclass_id {
 	UCLASS_DISPLAY,		/* Display (e.g. DisplayPort, HDMI) */
 	UCLASS_DMA,		/* Direct Memory Access */
 	UCLASS_ETH,		/* Ethernet device */
-	UCLASS_ETH_PHY,		/* Ethernet PHY device */
 	UCLASS_GPIO,		/* Bank of general-purpose I/O pins */
 	UCLASS_FIRMWARE,	/* Firmware */
 	UCLASS_I2C,		/* I2C bus */
@@ -52,7 +51,6 @@ enum uclass_id {
 	UCLASS_LPC,		/* x86 'low pin count' interface */
 	UCLASS_MAILBOX,		/* Mailbox controller */
 	UCLASS_MASS_STORAGE,	/* Mass storage device */
-	UCLASS_MDIO,		/* MDIO bus */
 	UCLASS_MISC,		/* Miscellaneous device */
 	UCLASS_MMC,		/* SD / MMC card or chip */
 	UCLASS_MOD_EXP,		/* RSA Mod Exp device */
@@ -99,6 +97,7 @@ enum uclass_id {
 	UCLASS_VIDEO_CONSOLE,	/* Text console driver for video device */
 	UCLASS_VIDEO_CRTC,	/* Display Controller */
 	UCLASS_WDT,		/* Watchdot Timer driver */
+
 	UCLASS_FG,		/* Fuel gauge */
 	UCLASS_KEY,		/* Key */
 	UCLASS_RC,		/* Remote Controller */
@@ -106,6 +105,8 @@ enum uclass_id {
 	UCLASS_DVFS,		/* DVFS policy */
 	UCLASS_IO_DOMAIN,	/* IO domain */
 	UCLASS_CRYPTO,		/* Crypto */
+	UCLASS_ETH_PHY,		/* Ethernet PHY device */
+	UCLASS_MDIO,		/* MDIO bus */
 	UCLASS_COUNT,
 	UCLASS_INVALID = -1,
 };

commit e3d9a19adac6e26d17c8f980d3494b0f1664d599
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 3 10:21:50 2020 +0800

    Revert "misc: otp: re-compile the code due to the UCLASS_MISC is changed"
    
    This reverts commit 551ae2b92218c68335521ce3fededa6913c20828.
    
    Change-Id: Ic2723614182b8c4cf2a5433f97ce17bceac4f8dc
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/misc/rockchip-secure-otp-v2.S b/drivers/misc/rockchip-secure-otp-v2.S
index 61014c56a4..afb6b6edc2 100644
--- a/drivers/misc/rockchip-secure-otp-v2.S
+++ b/drivers/misc/rockchip-secure-otp-v2.S
@@ -20,7 +20,7 @@
 	.fpu softvfp
 	.type	rockchip_secure_otp_v2_ioctl, %function
 rockchip_secure_otp_v2_ioctl:
-.LFB268:
+.LFB272:
 	.file 1 "drivers/misc/rockchip-secure-otp-v2.c"
 	.loc 1 165 0
 	.cfi_startproc
@@ -55,7 +55,7 @@ rockchip_secure_otp_v2_ioctl:
 	.loc 1 178 0
 	bx	lr
 	.cfi_endproc
-.LFE268:
+.LFE272:
 	.size	rockchip_secure_otp_v2_ioctl, .-rockchip_secure_otp_v2_ioctl
 	.section	.text.rockchip_secure_otp_v2_read,"ax",%progbits
 	.align	1
@@ -65,7 +65,7 @@ rockchip_secure_otp_v2_ioctl:
 	.fpu softvfp
 	.type	rockchip_secure_otp_v2_read, %function
 rockchip_secure_otp_v2_read:
-.LFB264:
+.LFB268:
 	.loc 1 17 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
@@ -256,7 +256,7 @@ rockchip_secure_otp_v2_read:
 .L26:
 	.word	.LC0
 	.cfi_endproc
-.LFE264:
+.LFE268:
 	.size	rockchip_secure_otp_v2_read, .-rockchip_secure_otp_v2_read
 	.section	.text.rockchip_secure_otp_v2_ofdata_to_platdata,"ax",%progbits
 	.align	1
@@ -266,7 +266,7 @@ rockchip_secure_otp_v2_read:
 	.fpu softvfp
 	.type	rockchip_secure_otp_v2_ofdata_to_platdata, %function
 rockchip_secure_otp_v2_ofdata_to_platdata:
-.LFB269:
+.LFB273:
 	.loc 1 187 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
@@ -309,7 +309,7 @@ rockchip_secure_otp_v2_ofdata_to_platdata:
 .L29:
 	.word	.LC1
 	.cfi_endproc
-.LFE269:
+.LFE273:
 	.size	rockchip_secure_otp_v2_ofdata_to_platdata, .-rockchip_secure_otp_v2_ofdata_to_platdata
 	.section	.text.rockchip_secure_otp_v2_write,"ax",%progbits
 	.align	1
@@ -319,7 +319,7 @@ rockchip_secure_otp_v2_ofdata_to_platdata:
 	.fpu softvfp
 	.type	rockchip_secure_otp_v2_write, %function
 rockchip_secure_otp_v2_write:
-.LFB266:
+.LFB270:
 	.loc 1 114 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
@@ -613,7 +613,7 @@ rockchip_secure_otp_v2_write:
 	.word	.LC0
 	.word	100002
 	.cfi_endproc
-.LFE266:
+.LFE270:
 	.size	rockchip_secure_otp_v2_write, .-rockchip_secure_otp_v2_write
 	.global	_u_boot_list_2_driver_2_rockchip_secure_otp_v2
 	.section	.rodata.rockchip_otp_ids,"a",%progbits
@@ -653,7 +653,7 @@ rockchip_secure_otp_ops:
 	.size	_u_boot_list_2_driver_2_rockchip_secure_otp_v2, 68
 _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.word	.LC3
-	.word	38
+	.word	36
 	.word	rockchip_otp_ids
 	.space	16
 	.word	rockchip_secure_otp_v2_ofdata_to_platdata
@@ -700,15 +700,15 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.file 35 "include/log.h"
 	.section	.debug_info,"",%progbits
 .Ldebug_info0:
-	.4byte	0x1bd7
+	.4byte	0x1ce8
 	.2byte	0x4
 	.4byte	.Ldebug_abbrev0
 	.byte	0x4
 	.uleb128 0x1
-	.4byte	.LASF418
+	.4byte	.LASF425
 	.byte	0xc
-	.4byte	.LASF419
-	.4byte	.LASF420
+	.4byte	.LASF426
+	.4byte	.LASF427
 	.4byte	.Ldebug_ranges0+0x70
 	.4byte	0
 	.4byte	.Ldebug_line0
@@ -881,7 +881,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LASF27
 	.byte	0x8
 	.byte	0x81
-	.4byte	0x12e7
+	.4byte	0x13e3
 	.byte	0
 	.uleb128 0xe
 	.4byte	.LASF28
@@ -911,7 +911,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LASF32
 	.byte	0x8
 	.byte	0x86
-	.4byte	0x128e
+	.4byte	0x138a
 	.byte	0x14
 	.uleb128 0xe
 	.4byte	.LASF33
@@ -935,7 +935,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LASF36
 	.byte	0x8
 	.byte	0x8a
-	.4byte	0x132a
+	.4byte	0x1426
 	.byte	0x24
 	.uleb128 0xe
 	.4byte	.LASF37
@@ -1133,7 +1133,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1ff
 	.byte	0
 	.uleb128 0x18
-	.4byte	.LASF304
+	.4byte	.LASF302
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0x383
@@ -1864,12 +1864,12 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x196
 	.4byte	0x968
 	.uleb128 0x21
-	.4byte	.LASF338
+	.4byte	.LASF346
 	.byte	0x4
 	.4byte	0x50
 	.byte	0x18
 	.byte	0xe
-	.4byte	0xbbf
+	.4byte	0xbb3
 	.uleb128 0x22
 	.4byte	.LASF158
 	.byte	0
@@ -2140,14 +2140,8 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x22
 	.4byte	.LASF247
 	.byte	0x59
-	.uleb128 0x22
-	.4byte	.LASF248
-	.byte	0x5a
-	.uleb128 0x22
-	.4byte	.LASF249
-	.byte	0x5b
 	.uleb128 0x23
-	.4byte	.LASF250
+	.4byte	.LASF248
 	.sleb128 -1
 	.byte	0
 	.uleb128 0x24
@@ -2155,19 +2149,19 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x7b
 	.byte	0x23
 	.byte	0xf6
-	.4byte	0xbd2
+	.4byte	0xbc6
 	.uleb128 0x22
-	.4byte	.LASF251
+	.4byte	.LASF249
 	.byte	0x5
 	.byte	0
 	.uleb128 0xd
-	.4byte	.LASF252
+	.4byte	.LASF250
 	.byte	0x20
 	.byte	0x14
 	.byte	0xc
-	.4byte	0xc33
+	.4byte	0xc27
 	.uleb128 0xe
-	.4byte	.LASF253
+	.4byte	.LASF251
 	.byte	0x14
 	.byte	0x22
 	.4byte	0x37
@@ -2185,38 +2179,38 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x7b
 	.byte	0x8
 	.uleb128 0xe
-	.4byte	.LASF254
+	.4byte	.LASF252
 	.byte	0x14
 	.byte	0x25
 	.4byte	0x37
 	.byte	0xc
 	.uleb128 0xe
-	.4byte	.LASF255
+	.4byte	.LASF253
 	.byte	0x14
 	.byte	0x26
 	.4byte	0x89
 	.byte	0x10
 	.uleb128 0xe
-	.4byte	.LASF256
+	.4byte	.LASF254
 	.byte	0x14
 	.byte	0x28
 	.4byte	0x37
 	.byte	0x18
 	.uleb128 0xe
-	.4byte	.LASF257
+	.4byte	.LASF255
 	.byte	0x14
 	.byte	0x29
 	.4byte	0x37
 	.byte	0x1c
 	.byte	0
 	.uleb128 0xd
-	.4byte	.LASF258
+	.4byte	.LASF256
 	.byte	0x10
 	.byte	0x15
 	.byte	0x22
-	.4byte	0xc6f
+	.4byte	0xc63
 	.uleb128 0xe
-	.4byte	.LASF259
+	.4byte	.LASF257
 	.byte	0x15
 	.byte	0x23
 	.4byte	0x9f
@@ -2228,24 +2222,24 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x9f
 	.byte	0x4
 	.uleb128 0xe
-	.4byte	.LASF260
+	.4byte	.LASF258
 	.byte	0x15
 	.byte	0x25
 	.4byte	0x9f
 	.byte	0x8
 	.uleb128 0xe
-	.4byte	.LASF261
+	.4byte	.LASF259
 	.byte	0x15
 	.byte	0x26
 	.4byte	0xfc
 	.byte	0xc
 	.byte	0
 	.uleb128 0xd
-	.4byte	.LASF262
+	.4byte	.LASF260
 	.byte	0xf0
 	.byte	0x15
 	.byte	0x29
-	.4byte	0xe5a
+	.4byte	0xe4e
 	.uleb128 0xf
 	.ascii	"bd\000"
 	.byte	0x15
@@ -2259,199 +2253,199 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x37
 	.byte	0x4
 	.uleb128 0xe
-	.4byte	.LASF260
+	.4byte	.LASF258
 	.byte	0x15
 	.byte	0x2c
 	.4byte	0x7b
 	.byte	0x8
 	.uleb128 0xe
-	.4byte	.LASF263
+	.4byte	.LASF261
 	.byte	0x15
 	.byte	0x2d
 	.4byte	0x37
 	.byte	0xc
 	.uleb128 0xe
-	.4byte	.LASF264
+	.4byte	.LASF262
 	.byte	0x15
 	.byte	0x2e
 	.4byte	0x37
 	.byte	0x10
 	.uleb128 0xe
-	.4byte	.LASF265
+	.4byte	.LASF263
 	.byte	0x15
 	.byte	0x30
 	.4byte	0x37
 	.byte	0x14
 	.uleb128 0xe
-	.4byte	.LASF266
+	.4byte	.LASF264
 	.byte	0x15
 	.byte	0x31
 	.4byte	0x37
 	.byte	0x18
 	.uleb128 0xe
-	.4byte	.LASF267
+	.4byte	.LASF265
 	.byte	0x15
 	.byte	0x3d
 	.4byte	0x37
 	.byte	0x1c
 	.uleb128 0xe
-	.4byte	.LASF268
+	.4byte	.LASF266
 	.byte	0x15
 	.byte	0x41
 	.4byte	0x37
 	.byte	0x20
 	.uleb128 0xe
-	.4byte	.LASF269
+	.4byte	.LASF267
 	.byte	0x15
 	.byte	0x42
 	.4byte	0x37
 	.byte	0x24
 	.uleb128 0xe
-	.4byte	.LASF270
+	.4byte	.LASF268
 	.byte	0x15
 	.byte	0x44
 	.4byte	0x37
 	.byte	0x28
 	.uleb128 0xe
-	.4byte	.LASF271
+	.4byte	.LASF269
 	.byte	0x15
 	.byte	0x45
 	.4byte	0x37
 	.byte	0x2c
 	.uleb128 0xe
-	.4byte	.LASF272
+	.4byte	.LASF270
 	.byte	0x15
 	.byte	0x46
 	.4byte	0xc0
 	.byte	0x30
 	.uleb128 0xe
-	.4byte	.LASF273
+	.4byte	.LASF271
 	.byte	0x15
 	.byte	0x47
 	.4byte	0x37
 	.byte	0x34
 	.uleb128 0xe
-	.4byte	.LASF274
+	.4byte	.LASF272
 	.byte	0x15
 	.byte	0x48
 	.4byte	0x37
 	.byte	0x38
 	.uleb128 0xe
-	.4byte	.LASF275
+	.4byte	.LASF273
 	.byte	0x15
 	.byte	0x49
 	.4byte	0x37
 	.byte	0x3c
 	.uleb128 0xe
-	.4byte	.LASF276
+	.4byte	.LASF274
 	.byte	0x15
 	.byte	0x4a
 	.4byte	0x37
 	.byte	0x40
 	.uleb128 0xe
-	.4byte	.LASF277
+	.4byte	.LASF275
 	.byte	0x15
 	.byte	0x4b
-	.4byte	0xe5a
+	.4byte	0xe4e
 	.byte	0x44
 	.uleb128 0xe
-	.4byte	.LASF278
+	.4byte	.LASF276
 	.byte	0x15
 	.byte	0x4e
 	.4byte	0x250
 	.byte	0x48
 	.uleb128 0xe
-	.4byte	.LASF279
+	.4byte	.LASF277
 	.byte	0x15
 	.byte	0x4f
 	.4byte	0x250
 	.byte	0x4c
 	.uleb128 0xe
-	.4byte	.LASF280
+	.4byte	.LASF278
 	.byte	0x15
 	.byte	0x50
 	.4byte	0x283
 	.byte	0x50
 	.uleb128 0xe
-	.4byte	.LASF281
+	.4byte	.LASF279
 	.byte	0x15
 	.byte	0x57
 	.4byte	0x256
 	.byte	0x58
 	.uleb128 0xe
-	.4byte	.LASF282
+	.4byte	.LASF280
 	.byte	0x15
 	.byte	0x59
 	.4byte	0x256
 	.byte	0x5c
 	.uleb128 0xe
-	.4byte	.LASF283
+	.4byte	.LASF281
 	.byte	0x15
 	.byte	0x5c
 	.4byte	0x256
 	.byte	0x60
 	.uleb128 0xe
-	.4byte	.LASF284
+	.4byte	.LASF282
 	.byte	0x15
 	.byte	0x5e
 	.4byte	0x128
 	.byte	0x64
 	.uleb128 0xe
-	.4byte	.LASF285
+	.4byte	.LASF283
 	.byte	0x15
 	.byte	0x5f
 	.4byte	0x37
 	.byte	0x68
 	.uleb128 0xe
-	.4byte	.LASF286
+	.4byte	.LASF284
 	.byte	0x15
 	.byte	0x61
-	.4byte	0xed2
+	.4byte	0xec6
 	.byte	0x6c
 	.uleb128 0xf
 	.ascii	"jt\000"
 	.byte	0x15
 	.byte	0x63
-	.4byte	0xedd
+	.4byte	0xed1
 	.byte	0x70
 	.uleb128 0xe
-	.4byte	.LASF287
+	.4byte	.LASF285
 	.byte	0x15
 	.byte	0x64
-	.4byte	0xee3
+	.4byte	0xed7
 	.byte	0x74
 	.uleb128 0xe
-	.4byte	.LASF288
+	.4byte	.LASF286
 	.byte	0x15
 	.byte	0x6e
 	.4byte	0x7b
 	.byte	0x94
 	.uleb128 0xe
-	.4byte	.LASF289
+	.4byte	.LASF287
 	.byte	0x15
 	.byte	0x6f
 	.4byte	0x7b
 	.byte	0x98
 	.uleb128 0xe
-	.4byte	.LASF290
+	.4byte	.LASF288
 	.byte	0x15
 	.byte	0x71
 	.4byte	0x37
 	.byte	0x9c
 	.uleb128 0xe
-	.4byte	.LASF291
+	.4byte	.LASF289
 	.byte	0x15
 	.byte	0x72
 	.4byte	0x37
 	.byte	0xa0
 	.uleb128 0xe
-	.4byte	.LASF292
+	.4byte	.LASF290
 	.byte	0x15
 	.byte	0x73
 	.4byte	0x37
 	.byte	0xa4
 	.uleb128 0xe
-	.4byte	.LASF293
+	.4byte	.LASF291
 	.byte	0x15
 	.byte	0x7c
 	.4byte	0x250
@@ -2460,28 +2454,28 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LASF127
 	.byte	0x15
 	.byte	0x7d
-	.4byte	0xbd2
+	.4byte	0xbc6
 	.byte	0xb0
 	.uleb128 0xe
-	.4byte	.LASF294
+	.4byte	.LASF292
 	.byte	0x15
 	.byte	0x8a
 	.4byte	0xb5
 	.byte	0xd0
 	.uleb128 0xe
-	.4byte	.LASF295
+	.4byte	.LASF293
 	.byte	0x15
 	.byte	0x8f
-	.4byte	0xc33
+	.4byte	0xc27
 	.byte	0xd4
 	.uleb128 0xe
-	.4byte	.LASF296
+	.4byte	.LASF294
 	.byte	0x15
 	.byte	0x90
 	.4byte	0xfc
 	.byte	0xe4
 	.uleb128 0xe
-	.4byte	.LASF297
+	.4byte	.LASF295
 	.byte	0x15
 	.byte	0x91
 	.4byte	0x50
@@ -2489,13 +2483,13 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0xc6f
+	.4byte	0xc63
 	.uleb128 0xd
-	.4byte	.LASF298
+	.4byte	.LASF296
 	.byte	0x20
 	.byte	0x16
 	.byte	0x2c
-	.4byte	0xecd
+	.4byte	0xec1
 	.uleb128 0xe
 	.4byte	.LASF28
 	.byte	0x16
@@ -2509,109 +2503,109 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0xd2
 	.byte	0x4
 	.uleb128 0xe
-	.4byte	.LASF299
+	.4byte	.LASF297
 	.byte	0x16
 	.byte	0x2f
-	.4byte	0x1208
+	.4byte	0x1304
 	.byte	0x8
 	.uleb128 0xe
-	.4byte	.LASF300
+	.4byte	.LASF298
 	.byte	0x16
 	.byte	0x30
 	.4byte	0xd2
 	.byte	0xc
 	.uleb128 0xe
-	.4byte	.LASF301
+	.4byte	.LASF299
 	.byte	0x16
 	.byte	0x32
-	.4byte	0x1250
+	.4byte	0x134c
 	.byte	0x10
 	.uleb128 0xe
 	.4byte	.LASF34
 	.byte	0x16
 	.byte	0x33
-	.4byte	0xed2
+	.4byte	0xec6
 	.byte	0x14
 	.uleb128 0xe
-	.4byte	.LASF302
+	.4byte	.LASF300
 	.byte	0x16
 	.byte	0x34
-	.4byte	0xed2
+	.4byte	0xec6
 	.byte	0x18
 	.uleb128 0xe
-	.4byte	.LASF303
+	.4byte	.LASF301
 	.byte	0x16
 	.byte	0x35
-	.4byte	0xed2
+	.4byte	0xec6
 	.byte	0x1c
 	.byte	0
 	.uleb128 0x7
-	.4byte	0xe60
+	.4byte	0xe54
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0xe60
+	.4byte	0xe54
 	.uleb128 0x18
-	.4byte	.LASF305
+	.4byte	.LASF303
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0xed8
+	.4byte	0xecc
 	.uleb128 0xa
 	.4byte	0xd8
-	.4byte	0xef3
+	.4byte	0xee7
 	.uleb128 0x11
 	.4byte	0xcb
 	.byte	0x1f
 	.byte	0
 	.uleb128 0x2
-	.4byte	.LASF306
+	.4byte	.LASF304
 	.byte	0x15
 	.byte	0x97
-	.4byte	0xc6f
+	.4byte	0xc63
 	.uleb128 0x25
-	.4byte	0xef3
+	.4byte	0xee7
 	.uleb128 0x4
-	.4byte	.LASF307
+	.4byte	.LASF305
 	.byte	0x2
 	.byte	0xad
 	.4byte	0xfc
 	.uleb128 0xa
 	.4byte	0x90
-	.4byte	0xf19
+	.4byte	0xf0d
 	.uleb128 0xb
 	.byte	0
 	.uleb128 0x4
-	.4byte	.LASF308
+	.4byte	.LASF306
 	.byte	0x2
 	.byte	0xaf
-	.4byte	0xf0e
+	.4byte	0xf02
 	.uleb128 0x4
-	.4byte	.LASF309
+	.4byte	.LASF307
 	.byte	0x2
 	.byte	0xb0
-	.4byte	0xf0e
+	.4byte	0xf02
 	.uleb128 0x4
-	.4byte	.LASF310
+	.4byte	.LASF308
 	.byte	0x2
 	.byte	0xfe
 	.4byte	0xfc
 	.uleb128 0x4
-	.4byte	.LASF311
+	.4byte	.LASF309
 	.byte	0x2
 	.byte	0xff
 	.4byte	0xfc
 	.uleb128 0xc
-	.4byte	.LASF312
+	.4byte	.LASF310
 	.byte	0x2
 	.2byte	0x100
 	.4byte	0xfc
 	.uleb128 0xd
-	.4byte	.LASF313
+	.4byte	.LASF311
 	.byte	0x4
 	.byte	0x17
 	.byte	0x2e
-	.4byte	0xf6a
+	.4byte	0xf5e
 	.uleb128 0xe
-	.4byte	.LASF314
+	.4byte	.LASF312
 	.byte	0x17
 	.byte	0x2f
 	.4byte	0x11d
@@ -2620,192 +2614,318 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0x25
+	.uleb128 0xd
+	.4byte	.LASF313
+	.byte	0x40
+	.byte	0x17
+	.byte	0xa6
+	.4byte	0x1001
+	.uleb128 0xe
+	.4byte	.LASF28
+	.byte	0x17
+	.byte	0xa8
+	.4byte	0x1001
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF314
+	.byte	0x17
+	.byte	0xa9
+	.4byte	0x273
+	.byte	0x10
+	.uleb128 0xe
+	.4byte	.LASF315
+	.byte	0x17
+	.byte	0xaa
+	.4byte	0xb5
+	.byte	0x18
+	.uleb128 0xe
+	.4byte	.LASF155
+	.byte	0x17
+	.byte	0xab
+	.4byte	0x50
+	.byte	0x1c
+	.uleb128 0xe
+	.4byte	.LASF316
+	.byte	0x17
+	.byte	0xad
+	.4byte	0x102b
+	.byte	0x20
+	.uleb128 0xe
+	.4byte	.LASF317
+	.byte	0x17
+	.byte	0xae
+	.4byte	0x104a
+	.byte	0x24
+	.uleb128 0xe
+	.4byte	.LASF318
+	.byte	0x17
+	.byte	0xaf
+	.4byte	0x105f
+	.byte	0x28
+	.uleb128 0xe
+	.4byte	.LASF319
+	.byte	0x17
+	.byte	0xb0
+	.4byte	0x1070
+	.byte	0x2c
+	.uleb128 0xe
+	.4byte	.LASF320
+	.byte	0x17
+	.byte	0xb4
+	.4byte	0x105f
+	.byte	0x30
+	.uleb128 0xe
+	.4byte	.LASF47
+	.byte	0x17
+	.byte	0xb5
+	.4byte	0x1025
+	.byte	0x34
+	.uleb128 0xe
+	.4byte	.LASF321
+	.byte	0x17
+	.byte	0xb6
+	.4byte	0x50
+	.byte	0x38
+	.uleb128 0xe
+	.4byte	.LASF35
+	.byte	0x17
+	.byte	0xb7
+	.4byte	0x128
+	.byte	0x3c
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xd8
+	.4byte	0x1011
+	.uleb128 0x11
+	.4byte	0xcb
+	.byte	0xf
+	.byte	0
 	.uleb128 0x12
 	.4byte	0x50
-	.4byte	0xf7f
+	.4byte	0x1025
 	.uleb128 0x13
-	.4byte	0x250
+	.4byte	0x1025
+	.uleb128 0x13
+	.4byte	0x962
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0xf70
+	.4byte	0xf64
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x1011
+	.uleb128 0x12
+	.4byte	0x50
+	.4byte	0x104a
+	.uleb128 0x13
+	.4byte	0x1025
+	.uleb128 0x13
+	.4byte	0x128
+	.uleb128 0x13
+	.4byte	0x50
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x1031
+	.uleb128 0x12
+	.4byte	0x50
+	.4byte	0x105f
+	.uleb128 0x13
+	.4byte	0x1025
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x1050
+	.uleb128 0x26
+	.4byte	0x1070
+	.uleb128 0x13
+	.4byte	0x1025
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x1065
+	.uleb128 0x4
+	.4byte	.LASF322
+	.byte	0x17
+	.byte	0xbd
+	.4byte	0x1025
 	.uleb128 0xa
 	.4byte	0x90
-	.4byte	0xf95
+	.4byte	0x1091
 	.uleb128 0x11
 	.4byte	0xcb
 	.byte	0x5
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF315
+	.4byte	.LASF323
 	.byte	0x17
 	.2byte	0x1fd
-	.4byte	0xf51
+	.4byte	0xf45
 	.uleb128 0xc
-	.4byte	.LASF316
+	.4byte	.LASF324
 	.byte	0x17
 	.2byte	0x1fe
-	.4byte	0xf51
+	.4byte	0xf45
 	.uleb128 0xc
-	.4byte	.LASF317
+	.4byte	.LASF325
 	.byte	0x17
 	.2byte	0x200
-	.4byte	0xf51
+	.4byte	0xf45
 	.uleb128 0xc
-	.4byte	.LASF318
+	.4byte	.LASF326
 	.byte	0x17
 	.2byte	0x205
-	.4byte	0xee3
+	.4byte	0xed7
 	.uleb128 0xc
-	.4byte	.LASF319
+	.4byte	.LASF327
 	.byte	0x17
 	.2byte	0x206
-	.4byte	0xee3
+	.4byte	0xed7
 	.uleb128 0xa
 	.4byte	0xd8
-	.4byte	0xfe1
+	.4byte	0x10dd
 	.uleb128 0x11
 	.4byte	0xcb
 	.byte	0x3f
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF320
+	.4byte	.LASF328
 	.byte	0x17
 	.2byte	0x207
-	.4byte	0xfd1
+	.4byte	0x10cd
 	.uleb128 0xc
-	.4byte	.LASF321
+	.4byte	.LASF329
 	.byte	0x17
 	.2byte	0x209
-	.4byte	0xf85
+	.4byte	0x1081
 	.uleb128 0xc
-	.4byte	.LASF322
+	.4byte	.LASF330
 	.byte	0x17
 	.2byte	0x20a
-	.4byte	0xf85
+	.4byte	0x1081
 	.uleb128 0xc
-	.4byte	.LASF323
+	.4byte	.LASF331
 	.byte	0x17
 	.2byte	0x20b
-	.4byte	0xf51
+	.4byte	0xf45
 	.uleb128 0xc
-	.4byte	.LASF324
+	.4byte	.LASF332
 	.byte	0x17
 	.2byte	0x20c
-	.4byte	0xf51
+	.4byte	0xf45
 	.uleb128 0xc
-	.4byte	.LASF325
+	.4byte	.LASF333
 	.byte	0x17
 	.2byte	0x20d
-	.4byte	0xf6a
+	.4byte	0xf5e
 	.uleb128 0xa
-	.4byte	0xf6a
-	.4byte	0x1039
+	.4byte	0xf5e
+	.4byte	0x1135
 	.uleb128 0x11
 	.4byte	0xcb
 	.byte	0x3
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF326
+	.4byte	.LASF334
 	.byte	0x17
 	.2byte	0x20e
-	.4byte	0x1029
+	.4byte	0x1125
 	.uleb128 0xc
-	.4byte	.LASF327
+	.4byte	.LASF335
 	.byte	0x17
 	.2byte	0x20f
-	.4byte	0xf6a
+	.4byte	0xf5e
 	.uleb128 0xc
-	.4byte	.LASF328
+	.4byte	.LASF336
 	.byte	0x17
 	.2byte	0x210
 	.4byte	0x50
 	.uleb128 0xa
 	.4byte	0x9a
-	.4byte	0x106d
+	.4byte	0x1169
 	.uleb128 0x11
 	.4byte	0xcb
 	.byte	0x5
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x105d
+	.4byte	0x1159
 	.uleb128 0xc
-	.4byte	.LASF329
+	.4byte	.LASF337
 	.byte	0x17
 	.2byte	0x211
-	.4byte	0x106d
+	.4byte	0x1169
 	.uleb128 0xc
-	.4byte	.LASF330
+	.4byte	.LASF338
 	.byte	0x17
 	.2byte	0x212
-	.4byte	0x106d
+	.4byte	0x1169
 	.uleb128 0xc
-	.4byte	.LASF331
+	.4byte	.LASF339
 	.byte	0x17
 	.2byte	0x216
 	.4byte	0xf1
 	.uleb128 0xc
-	.4byte	.LASF332
+	.4byte	.LASF340
 	.byte	0x17
 	.2byte	0x217
 	.4byte	0xf1
 	.uleb128 0xc
-	.4byte	.LASF333
+	.4byte	.LASF341
 	.byte	0x17
 	.2byte	0x219
 	.4byte	0x50
 	.uleb128 0xa
 	.4byte	0xd8
-	.4byte	0x10bf
+	.4byte	0x11bb
 	.uleb128 0x17
 	.4byte	0xcb
 	.2byte	0x3ff
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF334
+	.4byte	.LASF342
 	.byte	0x17
 	.2byte	0x220
-	.4byte	0x10ae
+	.4byte	0x11aa
 	.uleb128 0xc
-	.4byte	.LASF335
+	.4byte	.LASF343
 	.byte	0x17
 	.2byte	0x222
 	.4byte	0x9f
 	.uleb128 0xc
-	.4byte	.LASF336
+	.4byte	.LASF344
 	.byte	0x17
 	.2byte	0x224
 	.4byte	0x9f
 	.uleb128 0xc
-	.4byte	.LASF337
+	.4byte	.LASF345
 	.byte	0x17
 	.2byte	0x230
-	.4byte	0xf51
-	.uleb128 0x26
-	.4byte	.LASF339
+	.4byte	0xf45
+	.uleb128 0x27
+	.4byte	.LASF347
 	.byte	0x4
 	.4byte	0x7b
 	.byte	0x17
 	.2byte	0x286
-	.4byte	0x1119
+	.4byte	0x1215
 	.uleb128 0x22
-	.4byte	.LASF340
+	.4byte	.LASF348
 	.byte	0
 	.uleb128 0x22
-	.4byte	.LASF341
+	.4byte	.LASF349
 	.byte	0x1
 	.uleb128 0x22
-	.4byte	.LASF342
+	.4byte	.LASF350
 	.byte	0x2
 	.uleb128 0x22
-	.4byte	.LASF343
+	.4byte	.LASF351
 	.byte	0x3
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF344
+	.4byte	.LASF352
 	.byte	0x17
 	.2byte	0x28c
-	.4byte	0x10ef
+	.4byte	0x11eb
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0x9f
@@ -2814,7 +2934,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x44
 	.byte	0x8
 	.byte	0xee
-	.4byte	0x1203
+	.4byte	0x12ff
 	.uleb128 0xe
 	.4byte	.LASF28
 	.byte	0x8
@@ -2828,79 +2948,79 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x980
 	.byte	0x4
 	.uleb128 0xe
-	.4byte	.LASF345
+	.4byte	.LASF353
 	.byte	0x8
 	.byte	0xf1
-	.4byte	0x135a
+	.4byte	0x1456
 	.byte	0x8
 	.uleb128 0xe
-	.4byte	.LASF346
+	.4byte	.LASF354
 	.byte	0x8
 	.byte	0xf2
-	.4byte	0xf7f
+	.4byte	0x146b
 	.byte	0xc
 	.uleb128 0xe
-	.4byte	.LASF347
+	.4byte	.LASF355
 	.byte	0x8
 	.byte	0xf3
-	.4byte	0xf7f
+	.4byte	0x146b
 	.byte	0x10
 	.uleb128 0xe
-	.4byte	.LASF348
+	.4byte	.LASF356
 	.byte	0x8
 	.byte	0xf4
-	.4byte	0xf7f
+	.4byte	0x146b
 	.byte	0x14
 	.uleb128 0xe
-	.4byte	.LASF349
+	.4byte	.LASF357
 	.byte	0x8
 	.byte	0xf5
-	.4byte	0xf7f
+	.4byte	0x146b
 	.byte	0x18
 	.uleb128 0xe
-	.4byte	.LASF350
+	.4byte	.LASF358
 	.byte	0x8
 	.byte	0xf6
-	.4byte	0xf7f
+	.4byte	0x146b
 	.byte	0x1c
 	.uleb128 0xe
-	.4byte	.LASF351
+	.4byte	.LASF359
 	.byte	0x8
 	.byte	0xf7
-	.4byte	0xf7f
+	.4byte	0x146b
 	.byte	0x20
 	.uleb128 0xe
-	.4byte	.LASF352
+	.4byte	.LASF360
 	.byte	0x8
 	.byte	0xf8
-	.4byte	0xf7f
+	.4byte	0x146b
 	.byte	0x24
 	.uleb128 0xe
-	.4byte	.LASF353
+	.4byte	.LASF361
 	.byte	0x8
 	.byte	0xf9
-	.4byte	0xf7f
+	.4byte	0x146b
 	.byte	0x28
 	.uleb128 0xe
-	.4byte	.LASF354
+	.4byte	.LASF362
 	.byte	0x8
 	.byte	0xfa
 	.4byte	0x50
 	.byte	0x2c
 	.uleb128 0xe
-	.4byte	.LASF355
+	.4byte	.LASF363
 	.byte	0x8
 	.byte	0xfb
 	.4byte	0x50
 	.byte	0x30
 	.uleb128 0xe
-	.4byte	.LASF356
+	.4byte	.LASF364
 	.byte	0x8
 	.byte	0xfc
 	.4byte	0x50
 	.byte	0x34
 	.uleb128 0xe
-	.4byte	.LASF357
+	.4byte	.LASF365
 	.byte	0x8
 	.byte	0xfd
 	.4byte	0x50
@@ -2919,18 +3039,18 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x112b
+	.4byte	0x1227
 	.uleb128 0x2
-	.4byte	.LASF299
+	.4byte	.LASF297
 	.byte	0x16
 	.byte	0xf
 	.4byte	0x9f
 	.uleb128 0xd
-	.4byte	.LASF358
+	.4byte	.LASF366
 	.byte	0x10
 	.byte	0x16
 	.byte	0x19
-	.4byte	0x1250
+	.4byte	0x134c
 	.uleb128 0xe
 	.4byte	.LASF28
 	.byte	0x16
@@ -2938,13 +3058,13 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0xeb
 	.byte	0
 	.uleb128 0xe
-	.4byte	.LASF359
+	.4byte	.LASF367
 	.byte	0x16
 	.byte	0x1b
 	.4byte	0x50
 	.byte	0x4
 	.uleb128 0xe
-	.4byte	.LASF360
+	.4byte	.LASF368
 	.byte	0x16
 	.byte	0x1c
 	.4byte	0x128
@@ -2953,66 +3073,66 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LASF47
 	.byte	0x16
 	.byte	0x1d
-	.4byte	0x1250
+	.4byte	0x134c
 	.byte	0xc
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x1213
-	.uleb128 0x27
+	.4byte	0x130f
+	.uleb128 0x28
 	.ascii	"gd\000"
 	.byte	0x16
 	.byte	0x57
-	.4byte	0x1260
+	.4byte	0x135c
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0xefe
-	.uleb128 0x28
-	.4byte	.LASF421
+	.4byte	0xef2
+	.uleb128 0x29
+	.4byte	.LASF428
 	.byte	0x4
 	.byte	0x19
 	.byte	0x33
-	.4byte	0x1288
-	.uleb128 0x29
+	.4byte	0x1384
+	.uleb128 0x2a
 	.ascii	"np\000"
 	.byte	0x19
 	.byte	0x34
-	.4byte	0x1288
-	.uleb128 0x2a
-	.4byte	.LASF361
+	.4byte	0x1384
+	.uleb128 0x2b
+	.4byte	.LASF369
 	.byte	0x19
 	.byte	0x35
 	.4byte	0xe4
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0xecd
+	.4byte	0xec1
 	.uleb128 0x2
-	.4byte	.LASF362
+	.4byte	.LASF370
 	.byte	0x19
 	.byte	0x36
-	.4byte	0x1266
+	.4byte	0x1362
 	.uleb128 0xc
-	.4byte	.LASF363
+	.4byte	.LASF371
 	.byte	0x1a
 	.2byte	0x3ba
 	.4byte	0xfc
 	.uleb128 0xc
-	.4byte	.LASF364
+	.4byte	.LASF372
 	.byte	0x1a
 	.2byte	0x3bb
 	.4byte	0xfc
 	.uleb128 0xc
-	.4byte	.LASF365
+	.4byte	.LASF373
 	.byte	0x1a
 	.2byte	0x3bc
 	.4byte	0xfc
 	.uleb128 0xd
-	.4byte	.LASF366
+	.4byte	.LASF374
 	.byte	0x4
 	.byte	0x1b
 	.byte	0xd
-	.4byte	0x12d6
+	.4byte	0x13d2
 	.uleb128 0xf
 	.ascii	"pid\000"
 	.byte	0x1b
@@ -3021,22 +3141,22 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.byte	0
 	.uleb128 0x4
-	.4byte	.LASF367
+	.4byte	.LASF375
 	.byte	0x1b
 	.byte	0x11
-	.4byte	0x12e1
+	.4byte	0x13dd
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x12bd
+	.4byte	0x13b9
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x1203
+	.4byte	0x12ff
 	.uleb128 0xd
 	.4byte	.LASF36
 	.byte	0x18
 	.byte	0x1c
 	.byte	0x23
-	.4byte	0x132a
+	.4byte	0x1426
 	.uleb128 0xe
 	.4byte	.LASF35
 	.byte	0x1c
@@ -3044,13 +3164,13 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x128
 	.byte	0
 	.uleb128 0xe
-	.4byte	.LASF368
+	.4byte	.LASF376
 	.byte	0x1c
 	.byte	0x25
-	.4byte	0x1444
+	.4byte	0x1555
 	.byte	0x4
 	.uleb128 0xe
-	.4byte	.LASF369
+	.4byte	.LASF377
 	.byte	0x1c
 	.byte	0x26
 	.4byte	0x283
@@ -3064,37 +3184,46 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x12ed
+	.4byte	0x13e9
 	.uleb128 0xd
-	.4byte	.LASF370
+	.4byte	.LASF378
 	.byte	0x8
 	.byte	0x8
 	.byte	0xb5
-	.4byte	0x1355
+	.4byte	0x1451
 	.uleb128 0xe
-	.4byte	.LASF371
+	.4byte	.LASF379
 	.byte	0x8
 	.byte	0xb6
 	.4byte	0xd2
 	.byte	0
 	.uleb128 0xe
-	.4byte	.LASF372
+	.4byte	.LASF380
 	.byte	0x8
 	.byte	0xb7
 	.4byte	0xfc
 	.byte	0x4
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x1330
+	.4byte	0x142c
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x1451
+	.uleb128 0x12
+	.4byte	0x50
+	.4byte	0x146b
+	.uleb128 0x13
+	.4byte	0x250
+	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x1355
+	.4byte	0x145c
 	.uleb128 0xd
-	.4byte	.LASF373
+	.4byte	.LASF381
 	.byte	0x48
 	.byte	0x1c
 	.byte	0x54
-	.4byte	0x1444
+	.4byte	0x1555
 	.uleb128 0xe
 	.4byte	.LASF28
 	.byte	0x1c
@@ -3108,85 +3237,85 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x980
 	.byte	0x4
 	.uleb128 0xe
-	.4byte	.LASF374
+	.4byte	.LASF382
 	.byte	0x1c
 	.byte	0x57
-	.4byte	0xf7f
+	.4byte	0x146b
 	.byte	0x8
 	.uleb128 0xe
-	.4byte	.LASF375
+	.4byte	.LASF383
 	.byte	0x1c
 	.byte	0x58
-	.4byte	0xf7f
+	.4byte	0x146b
 	.byte	0xc
 	.uleb128 0xe
-	.4byte	.LASF376
+	.4byte	.LASF384
 	.byte	0x1c
 	.byte	0x59
-	.4byte	0xf7f
+	.4byte	0x146b
 	.byte	0x10
 	.uleb128 0xe
-	.4byte	.LASF377
+	.4byte	.LASF385
 	.byte	0x1c
 	.byte	0x5a
-	.4byte	0xf7f
+	.4byte	0x146b
 	.byte	0x14
 	.uleb128 0xe
-	.4byte	.LASF378
+	.4byte	.LASF386
 	.byte	0x1c
 	.byte	0x5b
-	.4byte	0xf7f
+	.4byte	0x146b
 	.byte	0x18
 	.uleb128 0xe
-	.4byte	.LASF351
+	.4byte	.LASF359
 	.byte	0x1c
 	.byte	0x5c
-	.4byte	0xf7f
+	.4byte	0x146b
 	.byte	0x1c
 	.uleb128 0xe
-	.4byte	.LASF352
+	.4byte	.LASF360
 	.byte	0x1c
 	.byte	0x5d
-	.4byte	0xf7f
+	.4byte	0x146b
 	.byte	0x20
 	.uleb128 0xe
-	.4byte	.LASF379
+	.4byte	.LASF316
 	.byte	0x1c
 	.byte	0x5e
-	.4byte	0x1459
+	.4byte	0x156a
 	.byte	0x24
 	.uleb128 0xe
-	.4byte	.LASF380
+	.4byte	.LASF387
 	.byte	0x1c
 	.byte	0x5f
-	.4byte	0x1459
+	.4byte	0x156a
 	.byte	0x28
 	.uleb128 0xe
-	.4byte	.LASF354
+	.4byte	.LASF362
 	.byte	0x1c
 	.byte	0x60
 	.4byte	0x50
 	.byte	0x2c
 	.uleb128 0xe
-	.4byte	.LASF381
+	.4byte	.LASF388
 	.byte	0x1c
 	.byte	0x61
 	.4byte	0x50
 	.byte	0x30
 	.uleb128 0xe
-	.4byte	.LASF382
+	.4byte	.LASF389
 	.byte	0x1c
 	.byte	0x62
 	.4byte	0x50
 	.byte	0x34
 	.uleb128 0xe
-	.4byte	.LASF356
+	.4byte	.LASF364
 	.byte	0x1c
 	.byte	0x63
 	.4byte	0x50
 	.byte	0x38
 	.uleb128 0xe
-	.4byte	.LASF357
+	.4byte	.LASF365
 	.byte	0x1c
 	.byte	0x64
 	.4byte	0x50
@@ -3206,80 +3335,80 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x1360
+	.4byte	0x1471
 	.uleb128 0x12
 	.4byte	0x50
-	.4byte	0x1459
+	.4byte	0x156a
 	.uleb128 0x13
-	.4byte	0x132a
+	.4byte	0x1426
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x144a
+	.4byte	0x155b
 	.uleb128 0x4
-	.4byte	.LASF383
+	.4byte	.LASF390
 	.byte	0x1d
 	.byte	0x49
 	.4byte	0x7b
 	.uleb128 0x21
-	.4byte	.LASF384
+	.4byte	.LASF391
 	.byte	0x4
 	.4byte	0x7b
 	.byte	0x1e
 	.byte	0x14
-	.4byte	0x1499
+	.4byte	0x15aa
 	.uleb128 0x22
-	.4byte	.LASF385
+	.4byte	.LASF392
 	.byte	0x1
 	.uleb128 0x22
-	.4byte	.LASF386
+	.4byte	.LASF393
 	.byte	0x2
 	.uleb128 0x22
-	.4byte	.LASF387
+	.4byte	.LASF394
 	.byte	0x4
 	.uleb128 0x22
-	.4byte	.LASF388
+	.4byte	.LASF395
 	.byte	0x8
 	.uleb128 0x22
-	.4byte	.LASF389
+	.4byte	.LASF396
 	.byte	0x10
 	.byte	0
 	.uleb128 0xd
-	.4byte	.LASF390
+	.4byte	.LASF397
 	.byte	0x10
 	.byte	0x1e
 	.byte	0x60
-	.4byte	0x14d6
+	.4byte	0x15e7
 	.uleb128 0xe
-	.4byte	.LASF391
+	.4byte	.LASF398
 	.byte	0x1e
 	.byte	0x6a
-	.4byte	0x14f9
+	.4byte	0x160a
 	.byte	0
 	.uleb128 0xe
-	.4byte	.LASF392
+	.4byte	.LASF399
 	.byte	0x1e
 	.byte	0x74
-	.4byte	0x151d
+	.4byte	0x162e
 	.byte	0x4
 	.uleb128 0xe
-	.4byte	.LASF393
+	.4byte	.LASF400
 	.byte	0x1e
 	.byte	0x7e
-	.4byte	0x153c
+	.4byte	0x164d
 	.byte	0x8
 	.uleb128 0xe
-	.4byte	.LASF394
+	.4byte	.LASF401
 	.byte	0x1e
 	.byte	0x8b
-	.4byte	0x156a
+	.4byte	0x167b
 	.byte	0xc
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x1499
+	.4byte	0x15aa
 	.uleb128 0x12
 	.4byte	0x50
-	.4byte	0x14f9
+	.4byte	0x160a
 	.uleb128 0x13
 	.4byte	0x250
 	.uleb128 0x13
@@ -3291,10 +3420,10 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x14db
+	.4byte	0x15ec
 	.uleb128 0x12
 	.4byte	0x50
-	.4byte	0x151d
+	.4byte	0x162e
 	.uleb128 0x13
 	.4byte	0x250
 	.uleb128 0x13
@@ -3306,10 +3435,10 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x14ff
+	.4byte	0x1610
 	.uleb128 0x12
 	.4byte	0x50
-	.4byte	0x153c
+	.4byte	0x164d
 	.uleb128 0x13
 	.4byte	0x250
 	.uleb128 0x13
@@ -3319,10 +3448,10 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x1523
+	.4byte	0x1634
 	.uleb128 0x12
 	.4byte	0x50
-	.4byte	0x156a
+	.4byte	0x167b
 	.uleb128 0x13
 	.4byte	0x250
 	.uleb128 0x13
@@ -3338,13 +3467,13 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x1542
+	.4byte	0x1653
 	.uleb128 0xd
-	.4byte	.LASF395
+	.4byte	.LASF402
 	.byte	0x8
 	.byte	0x1f
 	.byte	0x36
-	.4byte	0x1595
+	.4byte	0x16a6
 	.uleb128 0xe
 	.4byte	.LASF60
 	.byte	0x1f
@@ -3352,105 +3481,105 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x128
 	.byte	0
 	.uleb128 0xe
-	.4byte	.LASF396
+	.4byte	.LASF403
 	.byte	0x1f
 	.byte	0x38
 	.4byte	0x37
 	.byte	0x4
 	.byte	0
-	.uleb128 0x2b
-	.4byte	.LASF397
+	.uleb128 0x2c
+	.4byte	.LASF404
 	.byte	0x1
 	.byte	0xb4
-	.4byte	0x14d6
+	.4byte	0x15e7
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	rockchip_secure_otp_ops
 	.uleb128 0xa
-	.4byte	0x1355
-	.4byte	0x15b6
+	.4byte	0x1451
+	.4byte	0x16c7
 	.uleb128 0x11
 	.4byte	0xcb
 	.byte	0x1
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x15a6
-	.uleb128 0x2b
-	.4byte	.LASF398
+	.4byte	0x16b7
+	.uleb128 0x2c
+	.4byte	.LASF405
 	.byte	0x1
 	.byte	0xc5
-	.4byte	0x15b6
+	.4byte	0x16c7
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	rockchip_otp_ids
-	.uleb128 0x2c
-	.4byte	.LASF399
+	.uleb128 0x2d
+	.4byte	.LASF406
 	.byte	0x1
 	.byte	0xcc
-	.4byte	0x112b
+	.4byte	0x1227
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	_u_boot_list_2_driver_2_rockchip_secure_otp_v2
-	.uleb128 0x2d
-	.4byte	.LASF400
+	.uleb128 0x2e
+	.4byte	.LASF407
 	.byte	0x1
 	.byte	0xba
 	.4byte	0x50
-	.4byte	.LFB269
-	.4byte	.LFE269-.LFB269
+	.4byte	.LFB273
+	.4byte	.LFE273-.LFB273
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x165b
-	.uleb128 0x2e
+	.4byte	0x176c
+	.uleb128 0x2f
 	.ascii	"dev\000"
 	.byte	0x1
 	.byte	0xba
 	.4byte	0x250
 	.4byte	.LLST18
-	.uleb128 0x2f
+	.uleb128 0x30
 	.ascii	"otp\000"
 	.byte	0x1
 	.byte	0xbc
-	.4byte	0x165b
+	.4byte	0x176c
 	.4byte	.LLST19
-	.uleb128 0x30
-	.4byte	.LVL31
-	.4byte	0x1b96
-	.4byte	0x1628
 	.uleb128 0x31
+	.4byte	.LVL31
+	.4byte	0x1ca7
+	.4byte	0x1739
+	.uleb128 0x32
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
 	.byte	0
-	.uleb128 0x30
-	.4byte	.LVL34
-	.4byte	0x1ba2
-	.4byte	0x163c
 	.uleb128 0x31
+	.4byte	.LVL34
+	.4byte	0x1cb3
+	.4byte	0x174d
+	.uleb128 0x32
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
 	.byte	0
-	.uleb128 0x32
+	.uleb128 0x33
 	.4byte	.LVL35
-	.4byte	0x1bad
-	.uleb128 0x31
+	.4byte	0x1cbe
+	.uleb128 0x32
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x31
+	.uleb128 0x32
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	.LC1
-	.uleb128 0x31
+	.uleb128 0x32
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x1
@@ -3459,250 +3588,250 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x1570
-	.uleb128 0x2d
-	.4byte	.LASF401
+	.4byte	0x1681
+	.uleb128 0x2e
+	.4byte	.LASF408
 	.byte	0x1
 	.byte	0xa3
 	.4byte	0x50
-	.4byte	.LFB268
-	.4byte	.LFE268-.LFB268
+	.4byte	.LFB272
+	.4byte	.LFE272-.LFB272
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x16cc
-	.uleb128 0x2e
+	.4byte	0x17dd
+	.uleb128 0x2f
 	.ascii	"dev\000"
 	.byte	0x1
 	.byte	0xa3
 	.4byte	0x250
 	.4byte	.LLST0
-	.uleb128 0x33
-	.4byte	.LASF402
+	.uleb128 0x34
+	.4byte	.LASF409
 	.byte	0x1
 	.byte	0xa3
 	.4byte	0x37
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x34
+	.uleb128 0x35
 	.ascii	"buf\000"
 	.byte	0x1
 	.byte	0xa4
 	.4byte	0x128
 	.uleb128 0x1
 	.byte	0x52
-	.uleb128 0x2f
+	.uleb128 0x30
 	.ascii	"ret\000"
 	.byte	0x1
 	.byte	0xa6
 	.4byte	0x50
 	.4byte	.LLST1
-	.uleb128 0x35
-	.4byte	0x16cc
+	.uleb128 0x36
+	.4byte	0x17dd
 	.4byte	.LBB18
 	.4byte	.Ldebug_ranges0+0
 	.byte	0x1
 	.byte	0xab
-	.uleb128 0x36
-	.4byte	0x16dc
+	.uleb128 0x37
+	.4byte	0x17ed
 	.4byte	.LLST2
 	.byte	0
 	.byte	0
-	.uleb128 0x37
-	.4byte	.LASF406
+	.uleb128 0x38
+	.4byte	.LASF413
 	.byte	0x1
 	.byte	0x9c
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x16e8
-	.uleb128 0x38
+	.4byte	0x17f9
+	.uleb128 0x39
 	.ascii	"buf\000"
 	.byte	0x1
 	.byte	0x9c
-	.4byte	0x1125
+	.4byte	0x1221
 	.byte	0
-	.uleb128 0x2d
-	.4byte	.LASF403
+	.uleb128 0x2e
+	.4byte	.LASF410
 	.byte	0x1
 	.byte	0x70
 	.4byte	0x50
-	.4byte	.LFB266
-	.4byte	.LFE266-.LFB266
+	.4byte	.LFB270
+	.4byte	.LFE270-.LFB270
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1927
-	.uleb128 0x2e
+	.4byte	0x1a38
+	.uleb128 0x2f
 	.ascii	"dev\000"
 	.byte	0x1
 	.byte	0x70
 	.4byte	0x250
 	.4byte	.LLST20
-	.uleb128 0x39
-	.4byte	.LASF404
+	.uleb128 0x3a
+	.4byte	.LASF411
 	.byte	0x1
 	.byte	0x70
 	.4byte	0x50
 	.4byte	.LLST21
-	.uleb128 0x2e
+	.uleb128 0x2f
 	.ascii	"buf\000"
 	.byte	0x1
 	.byte	0x71
 	.4byte	0x256
 	.4byte	.LLST22
-	.uleb128 0x39
+	.uleb128 0x3a
 	.4byte	.LASF51
 	.byte	0x1
 	.byte	0x71
 	.4byte	0x50
 	.4byte	.LLST23
-	.uleb128 0x2f
+	.uleb128 0x30
 	.ascii	"otp\000"
 	.byte	0x1
 	.byte	0x73
-	.4byte	0x165b
+	.4byte	0x176c
 	.4byte	.LLST24
-	.uleb128 0x2f
+	.uleb128 0x30
 	.ascii	"i\000"
 	.byte	0x1
 	.byte	0x74
 	.4byte	0x50
 	.4byte	.LLST25
-	.uleb128 0x3a
+	.uleb128 0x3b
 	.ascii	"n\000"
 	.byte	0x1
 	.byte	0x74
 	.4byte	0x50
-	.uleb128 0x2f
+	.uleb128 0x30
 	.ascii	"ret\000"
 	.byte	0x1
 	.byte	0x74
 	.4byte	0x50
 	.4byte	.LLST26
-	.uleb128 0x2b
-	.4byte	.LASF372
+	.uleb128 0x2c
+	.4byte	.LASF380
 	.byte	0x1
 	.byte	0x75
 	.4byte	0xeb
 	.uleb128 0x1
 	.byte	0x5a
-	.uleb128 0x3b
-	.4byte	.LASF405
+	.uleb128 0x3c
+	.4byte	.LASF412
 	.byte	0x1
 	.byte	0x76
 	.4byte	0xeb
 	.4byte	.LLST27
-	.uleb128 0x3c
+	.uleb128 0x3d
 	.4byte	.LBB39
 	.4byte	.LBE39-.LBB39
-	.4byte	0x17aa
-	.uleb128 0x2f
+	.4byte	0x18bb
+	.uleb128 0x30
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x8c
 	.4byte	0x9f
 	.4byte	.LLST28
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x3d
 	.4byte	.LBB54
 	.4byte	.LBE54-.LBB54
-	.4byte	0x17c7
-	.uleb128 0x2f
+	.4byte	0x18d8
+	.uleb128 0x30
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x91
 	.4byte	0x9f
 	.4byte	.LLST40
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x3d
 	.4byte	.LBB51
 	.4byte	.LBE51-.LBB51
-	.4byte	0x17e4
-	.uleb128 0x2f
+	.4byte	0x18f5
+	.uleb128 0x30
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x97
 	.4byte	0x9f
 	.4byte	.LLST39
 	.byte	0
-	.uleb128 0x3d
-	.4byte	0x1927
+	.uleb128 0x3e
+	.4byte	0x1a38
 	.4byte	.LBB40
 	.4byte	.Ldebug_ranges0+0x30
 	.byte	0x1
 	.byte	0x8f
-	.4byte	0x18c5
-	.uleb128 0x3e
-	.4byte	0x1937
-	.uleb128 0x36
-	.4byte	0x1958
+	.4byte	0x19d6
+	.uleb128 0x3f
+	.4byte	0x1a48
+	.uleb128 0x37
+	.4byte	0x1a69
 	.4byte	.LLST29
-	.uleb128 0x36
-	.4byte	0x194d
+	.uleb128 0x37
+	.4byte	0x1a5e
 	.4byte	.LLST30
-	.uleb128 0x36
-	.4byte	0x1942
+	.uleb128 0x37
+	.4byte	0x1a53
 	.4byte	.LLST31
-	.uleb128 0x3f
-	.4byte	.Ldebug_ranges0+0x30
 	.uleb128 0x40
-	.4byte	0x1961
+	.4byte	.Ldebug_ranges0+0x30
+	.uleb128 0x41
+	.4byte	0x1a72
 	.4byte	.LLST32
-	.uleb128 0x40
-	.4byte	0x196c
-	.4byte	.LLST33
 	.uleb128 0x41
+	.4byte	0x1a7d
+	.4byte	.LLST33
+	.uleb128 0x42
 	.4byte	.Ldebug_ranges0+0x58
-	.4byte	0x1841
-	.uleb128 0x40
-	.4byte	0x19af
+	.4byte	0x1952
+	.uleb128 0x41
+	.4byte	0x1ac0
 	.4byte	.LLST34
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x3d
 	.4byte	.LBB43
 	.4byte	.LBE43-.LBB43
-	.4byte	0x1858
-	.uleb128 0x40
-	.4byte	0x197c
+	.4byte	0x1969
+	.uleb128 0x41
+	.4byte	0x1a8d
 	.4byte	.LLST35
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x3d
 	.4byte	.LBB44
 	.4byte	.LBE44-.LBB44
-	.4byte	0x186f
-	.uleb128 0x40
-	.4byte	0x198d
+	.4byte	0x1980
+	.uleb128 0x41
+	.4byte	0x1a9e
 	.4byte	.LLST36
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x3d
 	.4byte	.LBB45
 	.4byte	.LBE45-.LBB45
-	.4byte	0x1886
-	.uleb128 0x40
-	.4byte	0x199e
+	.4byte	0x1997
+	.uleb128 0x41
+	.4byte	0x1aaf
 	.4byte	.LLST37
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x3d
 	.4byte	.LBB47
 	.4byte	.LBE47-.LBB47
-	.4byte	0x189d
-	.uleb128 0x40
-	.4byte	0x19bc
+	.4byte	0x19ae
+	.uleb128 0x41
+	.4byte	0x1acd
 	.4byte	.LLST38
 	.byte	0
-	.uleb128 0x30
-	.4byte	.LVL60
-	.4byte	0x1bb8
-	.4byte	0x18b4
 	.uleb128 0x31
+	.4byte	.LVL60
+	.4byte	0x1cc9
+	.4byte	0x19c5
+	.uleb128 0x32
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	.LC0
 	.byte	0
-	.uleb128 0x32
+	.uleb128 0x33
 	.4byte	.LVL73
-	.4byte	0x1bc3
-	.uleb128 0x31
+	.4byte	0x1cd4
+	.uleb128 0x32
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x1
@@ -3710,61 +3839,61 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x30
-	.4byte	.LVL38
-	.4byte	0x1b96
-	.4byte	0x18d9
 	.uleb128 0x31
+	.4byte	.LVL38
+	.4byte	0x1ca7
+	.4byte	0x19ea
+	.uleb128 0x32
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x77
 	.sleb128 0
 	.byte	0
-	.uleb128 0x30
-	.4byte	.LVL41
-	.4byte	0x1bce
-	.4byte	0x18ed
 	.uleb128 0x31
+	.4byte	.LVL41
+	.4byte	0x1cdf
+	.4byte	0x19fe
+	.uleb128 0x32
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x78
 	.sleb128 0
 	.byte	0
-	.uleb128 0x30
-	.4byte	.LVL45
-	.4byte	0x19c9
-	.4byte	0x1913
 	.uleb128 0x31
+	.4byte	.LVL45
+	.4byte	0x1ada
+	.4byte	0x1a24
+	.uleb128 0x32
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x77
 	.sleb128 0
-	.uleb128 0x31
+	.uleb128 0x32
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x31
+	.uleb128 0x32
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x76
 	.sleb128 0
-	.uleb128 0x31
+	.uleb128 0x32
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
 	.byte	0x78
 	.sleb128 0
 	.byte	0
-	.uleb128 0x32
+	.uleb128 0x33
 	.4byte	.LVL57
-	.4byte	0x1bb8
-	.uleb128 0x31
+	.4byte	0x1cc9
+	.uleb128 0x32
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
@@ -3772,218 +3901,218 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LC2
 	.byte	0
 	.byte	0
-	.uleb128 0x37
-	.4byte	.LASF407
+	.uleb128 0x38
+	.4byte	.LASF414
 	.byte	0x1
 	.byte	0x47
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x19c9
-	.uleb128 0x38
+	.4byte	0x1ada
+	.uleb128 0x39
 	.ascii	"otp\000"
 	.byte	0x1
 	.byte	0x47
-	.4byte	0x165b
-	.uleb128 0x42
-	.4byte	.LASF404
+	.4byte	0x176c
+	.uleb128 0x43
+	.4byte	.LASF411
 	.byte	0x1
 	.byte	0x48
 	.4byte	0x50
-	.uleb128 0x42
-	.4byte	.LASF372
+	.uleb128 0x43
+	.4byte	.LASF380
 	.byte	0x1
 	.byte	0x48
 	.4byte	0x90
-	.uleb128 0x38
+	.uleb128 0x39
 	.ascii	"i\000"
 	.byte	0x1
 	.byte	0x48
 	.4byte	0x50
-	.uleb128 0x43
-	.4byte	.LASF408
+	.uleb128 0x44
+	.4byte	.LASF415
 	.byte	0x1
 	.byte	0x4a
 	.4byte	0x50
-	.uleb128 0x43
-	.4byte	.LASF409
+	.uleb128 0x44
+	.4byte	.LASF416
 	.byte	0x1
 	.byte	0x4b
 	.4byte	0x9f
-	.uleb128 0x44
-	.4byte	0x1988
-	.uleb128 0x3a
+	.uleb128 0x45
+	.4byte	0x1a99
+	.uleb128 0x3b
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x5c
 	.4byte	0x9f
 	.byte	0
-	.uleb128 0x44
-	.4byte	0x1999
-	.uleb128 0x3a
+	.uleb128 0x45
+	.4byte	0x1aaa
+	.uleb128 0x3b
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x5d
 	.4byte	0x9f
 	.byte	0
-	.uleb128 0x44
-	.4byte	0x19aa
-	.uleb128 0x3a
+	.uleb128 0x45
+	.4byte	0x1abb
+	.uleb128 0x3b
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x5e
 	.4byte	0x9f
 	.byte	0
-	.uleb128 0x44
-	.4byte	0x19bb
-	.uleb128 0x3a
+	.uleb128 0x45
+	.4byte	0x1acc
+	.uleb128 0x3b
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x5f
 	.4byte	0x9f
 	.byte	0
-	.uleb128 0x45
-	.uleb128 0x3a
+	.uleb128 0x46
+	.uleb128 0x3b
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x62
 	.4byte	0x9f
 	.byte	0
 	.byte	0
-	.uleb128 0x2d
-	.4byte	.LASF410
+	.uleb128 0x2e
+	.4byte	.LASF417
 	.byte	0x1
 	.byte	0xf
 	.4byte	0x50
-	.4byte	.LFB264
-	.4byte	.LFE264-.LFB264
+	.4byte	.LFB268
+	.4byte	.LFE268-.LFB268
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1b7c
-	.uleb128 0x2e
+	.4byte	0x1c8d
+	.uleb128 0x2f
 	.ascii	"dev\000"
 	.byte	0x1
 	.byte	0xf
 	.4byte	0x250
 	.4byte	.LLST3
-	.uleb128 0x39
-	.4byte	.LASF404
+	.uleb128 0x3a
+	.4byte	.LASF411
 	.byte	0x1
 	.byte	0xf
 	.4byte	0x50
 	.4byte	.LLST4
-	.uleb128 0x2e
+	.uleb128 0x2f
 	.ascii	"buf\000"
 	.byte	0x1
 	.byte	0x10
 	.4byte	0x128
 	.4byte	.LLST5
-	.uleb128 0x39
+	.uleb128 0x3a
 	.4byte	.LASF51
 	.byte	0x1
 	.byte	0x10
 	.4byte	0x50
 	.4byte	.LLST6
-	.uleb128 0x2f
+	.uleb128 0x30
 	.ascii	"otp\000"
 	.byte	0x1
 	.byte	0x12
-	.4byte	0x165b
+	.4byte	0x176c
 	.4byte	.LLST7
-	.uleb128 0x2f
+	.uleb128 0x30
 	.ascii	"i\000"
 	.byte	0x1
 	.byte	0x13
 	.4byte	0x50
 	.4byte	.LLST8
-	.uleb128 0x3b
-	.4byte	.LASF408
+	.uleb128 0x3c
+	.4byte	.LASF415
 	.byte	0x1
 	.byte	0x13
 	.4byte	0x50
 	.4byte	.LLST9
-	.uleb128 0x2f
+	.uleb128 0x30
 	.ascii	"n\000"
 	.byte	0x1
 	.byte	0x13
 	.4byte	0x50
 	.4byte	.LLST10
-	.uleb128 0x2f
+	.uleb128 0x30
 	.ascii	"ret\000"
 	.byte	0x1
 	.byte	0x13
 	.4byte	0x50
 	.4byte	.LLST11
-	.uleb128 0x3b
-	.4byte	.LASF372
+	.uleb128 0x3c
+	.4byte	.LASF380
 	.byte	0x1
 	.byte	0x14
 	.4byte	0xeb
 	.4byte	.LLST12
-	.uleb128 0x3b
-	.4byte	.LASF409
+	.uleb128 0x3c
+	.4byte	.LASF416
 	.byte	0x1
 	.byte	0x15
 	.4byte	0x9f
 	.4byte	.LLST13
-	.uleb128 0x3b
-	.4byte	.LASF411
+	.uleb128 0x3c
+	.4byte	.LASF418
 	.byte	0x1
 	.byte	0x16
 	.4byte	0x50
 	.4byte	.LLST14
-	.uleb128 0x46
+	.uleb128 0x47
 	.ascii	"out\000"
 	.byte	0x1
 	.byte	0x40
 	.4byte	.L10
-	.uleb128 0x3c
+	.uleb128 0x3d
 	.4byte	.LBB22
 	.4byte	.LBE22-.LBB22
-	.4byte	0x1ab7
-	.uleb128 0x47
+	.4byte	0x1bc8
+	.uleb128 0x48
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x19
 	.4byte	0x9f
 	.byte	0
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x3d
 	.4byte	.LBB25
 	.4byte	.LBE25-.LBB25
-	.4byte	0x1ad4
-	.uleb128 0x2f
+	.4byte	0x1be5
+	.uleb128 0x30
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x2c
 	.4byte	0x9f
 	.4byte	.LLST16
 	.byte	0
-	.uleb128 0x41
+	.uleb128 0x42
 	.4byte	.Ldebug_ranges0+0x18
-	.4byte	0x1aea
-	.uleb128 0x47
+	.4byte	0x1bfb
+	.uleb128 0x48
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x2d
 	.4byte	0x9f
 	.byte	0x1
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x3d
 	.4byte	.LBB27
 	.4byte	.LBE27-.LBB27
-	.4byte	0x1b07
-	.uleb128 0x2f
+	.4byte	0x1c18
+	.uleb128 0x30
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x30
 	.4byte	0x9f
 	.4byte	.LLST17
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x3d
 	.4byte	.LBB28
 	.4byte	.LBE28-.LBB28
-	.4byte	0x1b22
-	.uleb128 0x48
+	.4byte	0x1c33
+	.uleb128 0x49
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x3d
@@ -3991,22 +4120,22 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x1
 	.byte	0x53
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x3d
 	.4byte	.LBB24
 	.4byte	.LBE24-.LBB24
-	.4byte	0x1b3f
-	.uleb128 0x2f
+	.4byte	0x1c50
+	.uleb128 0x30
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x42
 	.4byte	0x9f
 	.4byte	.LLST15
 	.byte	0
-	.uleb128 0x30
-	.4byte	.LVL6
-	.4byte	0x1b96
-	.4byte	0x1b54
 	.uleb128 0x31
+	.4byte	.LVL6
+	.4byte	0x1ca7
+	.4byte	0x1c65
+	.uleb128 0x32
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x3
@@ -4014,21 +4143,21 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0
-	.uleb128 0x30
-	.4byte	.LVL16
-	.4byte	0x1bb8
-	.4byte	0x1b6b
 	.uleb128 0x31
+	.4byte	.LVL16
+	.4byte	0x1cc9
+	.4byte	0x1c7c
+	.uleb128 0x32
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	.LC0
 	.byte	0
-	.uleb128 0x32
+	.uleb128 0x33
 	.4byte	.LVL24
-	.4byte	0x1bc3
-	.uleb128 0x31
+	.4byte	0x1cd4
+	.uleb128 0x32
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
@@ -4036,46 +4165,46 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF422
+	.uleb128 0x4a
+	.4byte	.LASF429
 	.byte	0x1a
 	.2byte	0x36f
 	.byte	0x3
-	.4byte	0x1b96
-	.uleb128 0x4a
+	.4byte	0x1ca7
+	.uleb128 0x4b
 	.ascii	"ptr\000"
 	.byte	0x1a
 	.2byte	0x36f
 	.4byte	0x128
 	.byte	0
-	.uleb128 0x4b
-	.4byte	.LASF412
-	.4byte	.LASF412
+	.uleb128 0x4c
+	.4byte	.LASF419
+	.4byte	.LASF419
 	.byte	0x8
 	.2byte	0x112
-	.uleb128 0x4c
-	.4byte	.LASF413
-	.4byte	.LASF413
+	.uleb128 0x4d
+	.4byte	.LASF420
+	.4byte	.LASF420
 	.byte	0x20
 	.byte	0x85
-	.uleb128 0x4c
-	.4byte	.LASF414
-	.4byte	.LASF414
+	.uleb128 0x4d
+	.4byte	.LASF421
+	.4byte	.LASF421
 	.byte	0x20
 	.byte	0x38
-	.uleb128 0x4c
-	.4byte	.LASF415
-	.4byte	.LASF415
+	.uleb128 0x4d
+	.4byte	.LASF422
+	.4byte	.LASF422
 	.byte	0x21
 	.byte	0x13
-	.uleb128 0x4c
-	.4byte	.LASF416
-	.4byte	.LASF416
+	.uleb128 0x4d
+	.4byte	.LASF423
+	.4byte	.LASF423
 	.byte	0x22
 	.byte	0xb
-	.uleb128 0x4b
-	.4byte	.LASF417
-	.4byte	.LASF417
+	.uleb128 0x4c
+	.4byte	.LASF424
+	.4byte	.LASF424
 	.byte	0x1a
 	.2byte	0x393
 	.byte	0
@@ -4533,6 +4662,15 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.byte	0
 	.uleb128 0x26
+	.uleb128 0x15
+	.byte	0x1
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x27
 	.uleb128 0x4
 	.byte	0x1
 	.uleb128 0x3
@@ -4549,7 +4687,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x27
+	.uleb128 0x28
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -4564,7 +4702,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x28
+	.uleb128 0x29
 	.uleb128 0x17
 	.byte	0x1
 	.uleb128 0x3
@@ -4579,7 +4717,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x29
+	.uleb128 0x2a
 	.uleb128 0xd
 	.byte	0
 	.uleb128 0x3
@@ -4592,7 +4730,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x2a
+	.uleb128 0x2b
 	.uleb128 0xd
 	.byte	0
 	.uleb128 0x3
@@ -4605,7 +4743,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x2b
+	.uleb128 0x2c
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -4620,7 +4758,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x2c
+	.uleb128 0x2d
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -4637,7 +4775,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x2d
+	.uleb128 0x2e
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -4662,7 +4800,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x2e
+	.uleb128 0x2f
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -4677,7 +4815,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x2f
+	.uleb128 0x30
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -4692,7 +4830,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x30
+	.uleb128 0x31
 	.uleb128 0x4109
 	.byte	0x1
 	.uleb128 0x11
@@ -4703,7 +4841,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x31
+	.uleb128 0x32
 	.uleb128 0x410a
 	.byte	0
 	.uleb128 0x2
@@ -4712,7 +4850,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x32
+	.uleb128 0x33
 	.uleb128 0x4109
 	.byte	0x1
 	.uleb128 0x11
@@ -4721,7 +4859,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x33
+	.uleb128 0x34
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -4736,7 +4874,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x34
+	.uleb128 0x35
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -4751,7 +4889,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x35
+	.uleb128 0x36
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -4766,7 +4904,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x36
+	.uleb128 0x37
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
@@ -4775,7 +4913,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x37
+	.uleb128 0x38
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -4794,7 +4932,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x38
+	.uleb128 0x39
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -4807,7 +4945,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x3a
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -4822,7 +4960,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x3a
+	.uleb128 0x3b
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -4835,7 +4973,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3b
+	.uleb128 0x3c
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -4850,7 +4988,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x3d
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x11
@@ -4861,7 +4999,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3d
+	.uleb128 0x3e
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -4878,21 +5016,21 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3e
+	.uleb128 0x3f
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3f
+	.uleb128 0x40
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x55
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x40
+	.uleb128 0x41
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -4901,7 +5039,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x41
+	.uleb128 0x42
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x55
@@ -4910,7 +5048,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x42
+	.uleb128 0x43
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -4923,7 +5061,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x43
+	.uleb128 0x44
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -4936,19 +5074,19 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x44
+	.uleb128 0x45
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x1
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x45
+	.uleb128 0x46
 	.uleb128 0xb
 	.byte	0x1
 	.byte	0
 	.byte	0
-	.uleb128 0x46
+	.uleb128 0x47
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x3
@@ -4961,7 +5099,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x1
 	.byte	0
 	.byte	0
-	.uleb128 0x47
+	.uleb128 0x48
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -4976,7 +5114,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x48
+	.uleb128 0x49
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -4991,7 +5129,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x49
+	.uleb128 0x4a
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -5008,7 +5146,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4a
+	.uleb128 0x4b
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -5021,7 +5159,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4b
+	.uleb128 0x4c
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -5038,7 +5176,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x5
 	.byte	0
 	.byte	0
-	.uleb128 0x4c
+	.uleb128 0x4d
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -5068,7 +5206,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x55
 	.4byte	.LVL36
-	.4byte	.LFE269
+	.4byte	.LFE273
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -5093,7 +5231,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL2
-	.4byte	.LFE268
+	.4byte	.LFE272
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -5109,7 +5247,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0xea
 	.byte	0x9f
 	.4byte	.LVL4
-	.4byte	.LFE268
+	.4byte	.LFE272
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xea
@@ -5144,7 +5282,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x57
 	.4byte	.LVL46
-	.4byte	.LFE266
+	.4byte	.LFE270
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -5158,7 +5296,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x51
 	.4byte	.LVL38-1
-	.4byte	.LFE266
+	.4byte	.LFE270
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
@@ -5169,7 +5307,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x52
 	.4byte	.LVL38-1
-	.4byte	.LFE266
+	.4byte	.LFE270
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
@@ -5180,7 +5318,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x53
 	.4byte	.LVL38-1
-	.4byte	.LFE266
+	.4byte	.LFE270
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
@@ -5191,7 +5329,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL40
-	.4byte	.LFE266
+	.4byte	.LFE270
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
@@ -5230,7 +5368,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x22
 	.byte	0x9f
 	.4byte	.LVL58
-	.4byte	.LFE266
+	.4byte	.LFE270
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
@@ -5249,7 +5387,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL56
-	.4byte	.LFE266
+	.4byte	.LFE270
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
@@ -5280,7 +5418,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x30
 	.byte	0x9f
 	.4byte	.LVL58
-	.4byte	.LFE266
+	.4byte	.LFE270
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
@@ -5419,7 +5557,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL6-1
-	.4byte	.LFE264
+	.4byte	.LFE268
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -5433,7 +5571,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x51
 	.4byte	.LVL6-1
-	.4byte	.LFE264
+	.4byte	.LFE268
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
@@ -5454,7 +5592,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.sleb128 1
 	.byte	0x9f
 	.4byte	.LVL10
-	.4byte	.LFE264
+	.4byte	.LFE268
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -5468,7 +5606,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x53
 	.4byte	.LVL6-1
-	.4byte	.LFE264
+	.4byte	.LFE268
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
@@ -5479,7 +5617,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL10
-	.4byte	.LFE264
+	.4byte	.LFE268
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
@@ -5506,7 +5644,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x1
 	.byte	0x9f
 	.4byte	.LVL29
-	.4byte	.LFE264
+	.4byte	.LFE268
 	.2byte	0x6
 	.byte	0x74
 	.sleb128 0
@@ -5530,7 +5668,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.sleb128 -1
 	.byte	0x9f
 	.4byte	.LVL23
-	.4byte	.LFE264
+	.4byte	.LFE268
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 -2
@@ -5567,7 +5705,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL15
-	.4byte	.LFE264
+	.4byte	.LFE268
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
@@ -5585,7 +5723,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.sleb128 1
 	.byte	0x9f
 	.4byte	.LVL10
-	.4byte	.LFE264
+	.4byte	.LFE268
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -5614,7 +5752,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x54
 	.4byte	.LVL29
-	.4byte	.LFE264
+	.4byte	.LFE268
 	.2byte	0x3
 	.byte	0x74
 	.sleb128 -1
@@ -5627,7 +5765,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x54
 	.4byte	.LVL29
-	.4byte	.LFE264
+	.4byte	.LFE268
 	.2byte	0x3
 	.byte	0x74
 	.sleb128 -1
@@ -5662,14 +5800,14 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.2byte	0
 	.2byte	0
+	.4byte	.LFB272
+	.4byte	.LFE272-.LFB272
 	.4byte	.LFB268
 	.4byte	.LFE268-.LFB268
-	.4byte	.LFB264
-	.4byte	.LFE264-.LFB264
-	.4byte	.LFB269
-	.4byte	.LFE269-.LFB269
-	.4byte	.LFB266
-	.4byte	.LFE266-.LFB266
+	.4byte	.LFB273
+	.4byte	.LFE273-.LFB273
+	.4byte	.LFB270
+	.4byte	.LFE270-.LFB270
 	.4byte	0
 	.4byte	0
 	.section	.debug_ranges,"",%progbits
@@ -5702,14 +5840,14 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LBE46
 	.4byte	0
 	.4byte	0
+	.4byte	.LFB272
+	.4byte	.LFE272
 	.4byte	.LFB268
 	.4byte	.LFE268
-	.4byte	.LFB264
-	.4byte	.LFE264
-	.4byte	.LFB269
-	.4byte	.LFE269
-	.4byte	.LFB266
-	.4byte	.LFE266
+	.4byte	.LFB273
+	.4byte	.LFE273
+	.4byte	.LFB270
+	.4byte	.LFE270
 	.4byte	0
 	.4byte	0
 	.section	.debug_line,"",%progbits
@@ -5719,81 +5857,81 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"parent_platdata\000"
 .LASF100:
 	.ascii	"off_mem_rsvmap\000"
-.LASF184:
+.LASF183:
 	.ascii	"UCLASS_I2C_EEPROM\000"
-.LASF305:
+.LASF303:
 	.ascii	"jt_funcs\000"
-.LASF189:
+.LASF188:
 	.ascii	"UCLASS_IRQ\000"
 .LASF150:
 	.ascii	"initrd_start\000"
-.LASF183:
+.LASF182:
 	.ascii	"UCLASS_I2C\000"
 .LASF13:
 	.ascii	"sizetype\000"
-.LASF319:
+.LASF327:
 	.ascii	"net_hostname\000"
 .LASF54:
 	.ascii	"start\000"
-.LASF224:
+.LASF222:
 	.ascii	"UCLASS_SPI\000"
-.LASF302:
+.LASF300:
 	.ascii	"child\000"
-.LASF187:
+.LASF186:
 	.ascii	"UCLASS_I2S\000"
-.LASF341:
+.LASF349:
 	.ascii	"NETLOOP_RESTART\000"
-.LASF185:
+.LASF184:
 	.ascii	"UCLASS_I2C_GENERIC\000"
-.LASF198:
+.LASF196:
 	.ascii	"UCLASS_MOD_EXP\000"
-.LASF247:
+.LASF245:
 	.ascii	"UCLASS_IO_DOMAIN\000"
-.LASF259:
+.LASF257:
 	.ascii	"using_pre_serial\000"
 .LASF37:
 	.ascii	"uclass_priv\000"
-.LASF219:
+.LASF217:
 	.ascii	"UCLASS_RKNAND\000"
 .LASF159:
 	.ascii	"UCLASS_DEMO\000"
-.LASF388:
+.LASF395:
 	.ascii	"OTP_S\000"
 .LASF108:
 	.ascii	"ih_magic\000"
 .LASF46:
 	.ascii	"list_head\000"
-.LASF352:
+.LASF360:
 	.ascii	"child_pre_probe\000"
-.LASF294:
+.LASF292:
 	.ascii	"pm_ctx_phys\000"
 .LASF163:
 	.ascii	"UCLASS_TEST_PROBE\000"
-.LASF300:
+.LASF298:
 	.ascii	"full_name\000"
-.LASF243:
+.LASF241:
 	.ascii	"UCLASS_KEY\000"
 .LASF80:
 	.ascii	"bi_intfreq\000"
 .LASF11:
 	.ascii	"phys_addr_t\000"
-.LASF392:
+.LASF399:
 	.ascii	"write\000"
-.LASF238:
+.LASF236:
 	.ascii	"UCLASS_VIDEO_BRIDGE\000"
 .LASF5:
 	.ascii	"__u8\000"
-.LASF340:
+.LASF348:
 	.ascii	"NETLOOP_CONTINUE\000"
-.LASF227:
+.LASF225:
 	.ascii	"UCLASS_SPI_GENERIC\000"
-.LASF290:
+.LASF288:
 	.ascii	"malloc_base\000"
-.LASF413:
+.LASF420:
 	.ascii	"dev_read_addr_ptr\000"
 .LASF56:
 	.ascii	"flash_info_t\000"
-.LASF203:
+.LASF201:
 	.ascii	"UCLASS_PANEL\000"
 .LASF125:
 	.ascii	"comp\000"
@@ -5805,7 +5943,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"UCLASS_CROS_EC\000"
 .LASF74:
 	.ascii	"bi_dsp_freq\000"
-.LASF398:
+.LASF405:
 	.ascii	"rockchip_otp_ids\000"
 .LASF122:
 	.ascii	"image_start\000"
@@ -5813,67 +5951,67 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"UCLASS_TEST_FDT\000"
 .LASF65:
 	.ascii	"bd_info\000"
-.LASF338:
+.LASF346:
 	.ascii	"uclass_id\000"
 .LASF112:
 	.ascii	"ih_load\000"
-.LASF386:
+.LASF393:
 	.ascii	"DECOM_GZIP\000"
-.LASF309:
+.LASF307:
 	.ascii	"__dtb_dt_spl_begin\000"
-.LASF378:
+.LASF386:
 	.ascii	"pre_remove\000"
 .LASF7:
 	.ascii	"__u32\000"
 .LASF35:
 	.ascii	"priv\000"
-.LASF293:
+.LASF291:
 	.ascii	"cur_serial_dev\000"
-.LASF325:
+.LASF333:
 	.ascii	"net_tx_packet\000"
-.LASF242:
+.LASF240:
 	.ascii	"UCLASS_FG\000"
-.LASF324:
+.LASF332:
 	.ascii	"net_server_ip\000"
-.LASF421:
+.LASF428:
 	.ascii	"ofnode_union\000"
-.LASF332:
+.LASF340:
 	.ascii	"net_native_vlan\000"
-.LASF240:
+.LASF238:
 	.ascii	"UCLASS_VIDEO_CRTC\000"
 .LASF175:
 	.ascii	"UCLASS_CODEC\000"
-.LASF287:
+.LASF285:
 	.ascii	"env_buf\000"
-.LASF407:
+.LASF414:
 	.ascii	"rockchip_secure_otp_write_byte\000"
 .LASF21:
 	.ascii	"errno\000"
 .LASF15:
 	.ascii	"long int\000"
-.LASF383:
+.LASF390:
 	.ascii	"__invalid_size_argument_for_IOC\000"
 .LASF69:
 	.ascii	"bi_flashsize\000"
 .LASF29:
 	.ascii	"platdata\000"
-.LASF208:
+.LASF206:
 	.ascii	"UCLASS_PHY\000"
 .LASF93:
 	.ascii	"IRQ_STACK_START_IN\000"
 .LASF104:
 	.ascii	"size_dt_strings\000"
-.LASF237:
+.LASF235:
 	.ascii	"UCLASS_VIDEO\000"
-.LASF399:
+.LASF406:
 	.ascii	"_u_boot_list_2_driver_2_rockchip_secure_otp_v2\000"
-.LASF271:
+.LASF269:
 	.ascii	"relocaddr\000"
-.LASF369:
+.LASF377:
 	.ascii	"dev_head\000"
-.LASF420:
+.LASF427:
 	.ascii	"/home/zzz/code/u-boot\000"
-.LASF335:
+.LASF343:
 	.ascii	"net_boot_file_size\000"
 .LASF114:
 	.ascii	"ih_dcrc\000"
@@ -5883,21 +6021,21 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"UCLASS_ROOT\000"
 .LASF44:
 	.ascii	"ide_bus_offset\000"
-.LASF322:
+.LASF330:
 	.ascii	"net_server_ethaddr\000"
 .LASF82:
 	.ascii	"bi_arch_number\000"
 .LASF3:
 	.ascii	"signed char\000"
-.LASF190:
+.LASF189:
 	.ascii	"UCLASS_KEYBOARD\000"
 .LASF18:
 	.ascii	"uint8_t\000"
-.LASF357:
+.LASF365:
 	.ascii	"per_child_platdata_auto_alloc_size\000"
 .LASF45:
 	.ascii	"udevice\000"
-.LASF416:
+.LASF423:
 	.ascii	"udelay\000"
 .LASF116:
 	.ascii	"ih_arch\000"
@@ -5905,13 +6043,13 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"totalsize\000"
 .LASF109:
 	.ascii	"ih_hcrc\000"
-.LASF273:
+.LASF271:
 	.ascii	"mon_len\000"
-.LASF394:
+.LASF401:
 	.ascii	"call\000"
 .LASF124:
 	.ascii	"load\000"
-.LASF232:
+.LASF230:
 	.ascii	"UCLASS_TPM\000"
 .LASF59:
 	.ascii	"lmb_property\000"
@@ -5921,73 +6059,73 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"unsigned char\000"
 .LASF84:
 	.ascii	"bi_andr_version\000"
-.LASF410:
+.LASF417:
 	.ascii	"rockchip_secure_otp_v2_read\000"
 .LASF157:
 	.ascii	"images\000"
-.LASF246:
+.LASF244:
 	.ascii	"UCLASS_DVFS\000"
 .LASF75:
 	.ascii	"bi_ddr_freq\000"
-.LASF191:
+.LASF190:
 	.ascii	"UCLASS_LED\000"
 .LASF111:
 	.ascii	"ih_size\000"
-.LASF406:
+.LASF413:
 	.ascii	"rockchip_secure_otp_v2_capability\000"
 .LASF39:
 	.ascii	"uclass_node\000"
-.LASF195:
-	.ascii	"UCLASS_MDIO\000"
 .LASF23:
 	.ascii	"_Bool\000"
-.LASF358:
+.LASF366:
 	.ascii	"property\000"
-.LASF344:
+.LASF352:
 	.ascii	"net_state\000"
-.LASF360:
+.LASF368:
 	.ascii	"value\000"
-.LASF186:
+.LASF185:
 	.ascii	"UCLASS_I2C_MUX\000"
 .LASF14:
 	.ascii	"char\000"
 .LASF25:
 	.ascii	"_binary_u_boot_bin_start\000"
-.LASF236:
+.LASF234:
 	.ascii	"UCLASS_USB_GADGET_GENERIC\000"
-.LASF342:
+.LASF350:
 	.ascii	"NETLOOP_SUCCESS\000"
 .LASF36:
 	.ascii	"uclass\000"
-.LASF366:
+.LASF374:
 	.ascii	"p_current\000"
-.LASF368:
+.LASF376:
 	.ascii	"uc_drv\000"
-.LASF339:
+.LASF347:
 	.ascii	"net_loop_state\000"
 .LASF43:
 	.ascii	"req_seq\000"
-.LASF303:
+.LASF301:
 	.ascii	"sibling\000"
-.LASF279:
+.LASF277:
 	.ascii	"dm_root_f\000"
+.LASF314:
+	.ascii	"enetaddr\000"
 .LASF174:
 	.ascii	"UCLASS_AMP\000"
-.LASF214:
+.LASF212:
 	.ascii	"UCLASS_PWRSEQ\000"
-.LASF361:
+.LASF369:
 	.ascii	"of_offset\000"
 .LASF140:
 	.ascii	"fit_hdr_fdt\000"
-.LASF333:
+.LASF341:
 	.ascii	"net_restart_wrap\000"
-.LASF321:
+.LASF329:
 	.ascii	"net_ethaddr\000"
-.LASF403:
+.LASF410:
 	.ascii	"rockchip_secure_otp_v2_write\000"
 .LASF42:
 	.ascii	"flags\000"
-.LASF417:
+.LASF424:
 	.ascii	"malloc_simple\000"
 .LASF117:
 	.ascii	"ih_type\000"
@@ -5995,17 +6133,17 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"off_dt_struct\000"
 .LASF70:
 	.ascii	"bi_flashoffset\000"
-.LASF334:
+.LASF342:
 	.ascii	"net_boot_file_name\000"
-.LASF371:
+.LASF379:
 	.ascii	"compatible\000"
 .LASF160:
 	.ascii	"UCLASS_TEST\000"
 .LASF110:
 	.ascii	"ih_time\000"
-.LASF264:
+.LASF262:
 	.ascii	"bus_clk\000"
-.LASF215:
+.LASF213:
 	.ascii	"UCLASS_RAM\000"
 .LASF179:
 	.ascii	"UCLASS_ETH\000"
@@ -6015,17 +6153,17 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"image_info\000"
 .LASF127:
 	.ascii	"arch\000"
-.LASF266:
+.LASF264:
 	.ascii	"mem_clk\000"
-.LASF409:
+.LASF416:
 	.ascii	"temp\000"
-.LASF263:
+.LASF261:
 	.ascii	"cpu_clk\000"
 .LASF50:
 	.ascii	"select_hwpart\000"
-.LASF326:
+.LASF334:
 	.ascii	"net_rx_packets\000"
-.LASF363:
+.LASF371:
 	.ascii	"mem_malloc_start\000"
 .LASF92:
 	.ascii	"_datarelro_start_ofs\000"
@@ -6035,97 +6173,99 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"ih_ep\000"
 .LASF61:
 	.ascii	"lmb_region\000"
-.LASF419:
+.LASF426:
 	.ascii	"drivers/misc/rockchip-secure-otp-v2.c\000"
-.LASF376:
+.LASF384:
 	.ascii	"pre_probe\000"
-.LASF415:
+.LASF422:
 	.ascii	"printf\000"
-.LASF387:
+.LASF394:
 	.ascii	"DECOM_ZLIB\000"
 .LASF135:
 	.ascii	"fit_uname_os\000"
 .LASF76:
 	.ascii	"bi_bootflags\000"
-.LASF323:
+.LASF331:
 	.ascii	"net_ip\000"
-.LASF285:
+.LASF283:
 	.ascii	"fdt_size\000"
-.LASF317:
+.LASF325:
 	.ascii	"net_dns_server\000"
-.LASF337:
+.LASF345:
 	.ascii	"net_ping_ip\000"
 .LASF63:
 	.ascii	"memory\000"
 .LASF95:
 	.ascii	"fdt_header\000"
-.LASF364:
+.LASF372:
 	.ascii	"mem_malloc_end\000"
-.LASF193:
+.LASF192:
 	.ascii	"UCLASS_MAILBOX\000"
 .LASF147:
 	.ascii	"rd_end\000"
-.LASF346:
+.LASF354:
 	.ascii	"bind\000"
-.LASF274:
+.LASF272:
 	.ascii	"irq_sp\000"
 .LASF152:
 	.ascii	"cmdline_start\000"
-.LASF262:
+.LASF321:
+	.ascii	"index\000"
+.LASF260:
 	.ascii	"global_data\000"
-.LASF381:
+.LASF388:
 	.ascii	"per_device_auto_alloc_size\000"
-.LASF222:
+.LASF220:
 	.ascii	"UCLASS_SCSI\000"
-.LASF234:
+.LASF232:
 	.ascii	"UCLASS_USB_DEV_GENERIC\000"
-.LASF194:
+.LASF193:
 	.ascii	"UCLASS_MASS_STORAGE\000"
 .LASF1:
 	.ascii	"long unsigned int\000"
 .LASF168:
 	.ascii	"UCLASS_SIMPLE_BUS\000"
-.LASF306:
+.LASF304:
 	.ascii	"gd_t\000"
-.LASF318:
+.LASF326:
 	.ascii	"net_nis_domain\000"
 .LASF142:
 	.ascii	"fit_noffset_fdt\000"
-.LASF397:
+.LASF404:
 	.ascii	"rockchip_secure_otp_ops\000"
-.LASF343:
+.LASF351:
 	.ascii	"NETLOOP_FAIL\000"
-.LASF241:
+.LASF239:
 	.ascii	"UCLASS_WDT\000"
-.LASF255:
+.LASF253:
 	.ascii	"timer_reset_value\000"
-.LASF275:
+.LASF273:
 	.ascii	"start_addr_sp\000"
 .LASF71:
 	.ascii	"bi_sramstart\000"
 .LASF26:
 	.ascii	"_binary_u_boot_bin_end\000"
-.LASF276:
+.LASF274:
 	.ascii	"reloc_off\000"
 .LASF103:
 	.ascii	"boot_cpuid_phys\000"
-.LASF254:
+.LASF252:
 	.ascii	"lastinc\000"
 .LASF138:
 	.ascii	"fit_uname_rd\000"
-.LASF228:
+.LASF226:
 	.ascii	"UCLASS_SYSCON\000"
 .LASF173:
 	.ascii	"UCLASS_CPU\000"
 .LASF133:
 	.ascii	"fit_uname_cfg\000"
-.LASF223:
+.LASF221:
 	.ascii	"UCLASS_SERIAL\000"
-.LASF331:
+.LASF339:
 	.ascii	"net_our_vlan\000"
-.LASF295:
+.LASF293:
 	.ascii	"serial\000"
-.LASF347:
+.LASF355:
 	.ascii	"probe\000"
 .LASF171:
 	.ascii	"UCLASS_BLK\000"
@@ -6133,55 +6273,57 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"image_info_t\000"
 .LASF167:
 	.ascii	"UCLASS_USB_EMUL\000"
-.LASF256:
+.LASF254:
 	.ascii	"tlb_addr\000"
-.LASF207:
+.LASF205:
 	.ascii	"UCLASS_PCI_GENERIC\000"
 .LASF123:
 	.ascii	"image_len\000"
 .LASF77:
 	.ascii	"bi_ip_addr\000"
-.LASF209:
+.LASF207:
 	.ascii	"UCLASS_PINCONFIG\000"
-.LASF230:
+.LASF317:
+	.ascii	"send\000"
+.LASF228:
 	.ascii	"UCLASS_THERMAL\000"
 .LASF131:
 	.ascii	"legacy_hdr_os_copy\000"
 .LASF9:
 	.ascii	"long long int\000"
-.LASF384:
+.LASF391:
 	.ascii	"misc_mode\000"
-.LASF284:
+.LASF282:
 	.ascii	"new_fdt\000"
 .LASF22:
 	.ascii	"___strtok\000"
-.LASF336:
+.LASF344:
 	.ascii	"net_boot_file_expected_size_in_blocks\000"
-.LASF395:
+.LASF402:
 	.ascii	"rockchip_otp_v2_platdata\000"
-.LASF345:
+.LASF353:
 	.ascii	"of_match\000"
-.LASF202:
+.LASF200:
 	.ascii	"UCLASS_NVME\000"
 .LASF129:
 	.ascii	"bootm_headers\000"
 .LASF55:
 	.ascii	"protect\000"
-.LASF233:
+.LASF231:
 	.ascii	"UCLASS_USB\000"
-.LASF373:
+.LASF381:
 	.ascii	"uclass_driver\000"
-.LASF244:
+.LASF242:
 	.ascii	"UCLASS_RC\000"
-.LASF288:
+.LASF286:
 	.ascii	"timebase_h\000"
-.LASF289:
+.LASF287:
 	.ascii	"timebase_l\000"
 .LASF177:
 	.ascii	"UCLASS_DISPLAY\000"
-.LASF330:
+.LASF338:
 	.ascii	"net_null_ethaddr\000"
-.LASF269:
+.LASF267:
 	.ascii	"env_valid\000"
 .LASF34:
 	.ascii	"parent\000"
@@ -6189,113 +6331,119 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"UCLASS_PCI_EMUL\000"
 .LASF38:
 	.ascii	"parent_priv\000"
-.LASF389:
+.LASF396:
 	.ascii	"OTP_NS\000"
-.LASF245:
+.LASF243:
 	.ascii	"UCLASS_CHARGE_DISPLAY\000"
-.LASF310:
+.LASF308:
 	.ascii	"load_addr\000"
 .LASF134:
 	.ascii	"fit_hdr_os\000"
 .LASF90:
 	.ascii	"_datarelrolocal_start_ofs\000"
-.LASF408:
+.LASF415:
 	.ascii	"timeout\000"
-.LASF261:
+.LASF259:
 	.ascii	"addr\000"
-.LASF391:
+.LASF398:
 	.ascii	"read\000"
 .LASF8:
 	.ascii	"unsigned int\000"
 .LASF16:
 	.ascii	"ushort\000"
-.LASF393:
+.LASF313:
+	.ascii	"eth_device\000"
+.LASF400:
 	.ascii	"ioctl\000"
-.LASF414:
+.LASF421:
 	.ascii	"dev_read_u32_default\000"
-.LASF283:
+.LASF281:
 	.ascii	"ufdt_blob\000"
-.LASF354:
+.LASF362:
 	.ascii	"priv_auto_alloc_size\000"
-.LASF291:
+.LASF289:
 	.ascii	"malloc_limit\000"
-.LASF211:
+.LASF209:
 	.ascii	"UCLASS_PMIC\000"
 .LASF130:
 	.ascii	"legacy_hdr_os\000"
 .LASF99:
 	.ascii	"off_dt_strings\000"
-.LASF307:
+.LASF305:
 	.ascii	"monitor_flash_len\000"
-.LASF196:
+.LASF194:
 	.ascii	"UCLASS_MISC\000"
 .LASF67:
 	.ascii	"bi_memsize\000"
 .LASF24:
 	.ascii	"image_base\000"
-.LASF229:
+.LASF227:
 	.ascii	"UCLASS_SYSRESET\000"
-.LASF367:
+.LASF375:
 	.ascii	"current\000"
-.LASF182:
+.LASF181:
 	.ascii	"UCLASS_FIRMWARE\000"
-.LASF192:
+.LASF191:
 	.ascii	"UCLASS_LPC\000"
-.LASF404:
+.LASF411:
 	.ascii	"offset\000"
-.LASF188:
+.LASF187:
 	.ascii	"UCLASS_IDE\000"
-.LASF390:
+.LASF397:
 	.ascii	"misc_ops\000"
-.LASF299:
+.LASF297:
 	.ascii	"phandle\000"
-.LASF355:
+.LASF363:
 	.ascii	"platdata_auto_alloc_size\000"
-.LASF382:
+.LASF389:
 	.ascii	"per_device_platdata_auto_alloc_size\000"
 .LASF156:
 	.ascii	"bootm_headers_t\000"
 .LASF73:
 	.ascii	"bi_arm_freq\000"
-.LASF217:
+.LASF215:
 	.ascii	"UCLASS_REMOTEPROC\000"
+.LASF318:
+	.ascii	"recv\000"
 .LASF126:
 	.ascii	"type\000"
 .LASF137:
 	.ascii	"fit_hdr_rd\000"
-.LASF268:
+.LASF266:
 	.ascii	"env_addr\000"
 .LASF72:
 	.ascii	"bi_sramsize\000"
-.LASF280:
+.LASF278:
 	.ascii	"uclass_root\000"
-.LASF181:
+.LASF180:
 	.ascii	"UCLASS_GPIO\000"
-.LASF212:
+.LASF210:
 	.ascii	"UCLASS_PWM\000"
 .LASF58:
 	.ascii	"long double\000"
-.LASF270:
+.LASF268:
 	.ascii	"ram_top\000"
-.LASF297:
+.LASF295:
 	.ascii	"console_evt\000"
 .LASF146:
 	.ascii	"rd_start\000"
-.LASF213:
+.LASF211:
 	.ascii	"UCLASS_POWER_DOMAIN\000"
-.LASF216:
+.LASF214:
 	.ascii	"UCLASS_REGULATOR\000"
-.LASF312:
+.LASF310:
 	.ascii	"save_size\000"
 .LASF172:
 	.ascii	"UCLASS_CLK\000"
 .LASF31:
 	.ascii	"uclass_platdata\000"
-.LASF412:
+.LASF419:
 	.ascii	"dev_get_platdata\000"
+.LASF315:
+	.ascii	"iobase\000"
 .LASF89:
 	.ascii	"_datarel_start_ofs\000"
-.LASF258:
+.LASF256:
 	.ascii	"pre_serial\000"
 .LASF119:
 	.ascii	"ih_name\000"
@@ -6303,23 +6451,23 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"ih_os\000"
 .LASF153:
 	.ascii	"cmdline_end\000"
-.LASF327:
+.LASF335:
 	.ascii	"net_rx_packet\000"
-.LASF251:
+.LASF249:
 	.ascii	"LOGF_MAX_CATEGORIES\000"
-.LASF282:
+.LASF280:
 	.ascii	"fdt_blob\000"
-.LASF370:
+.LASF378:
 	.ascii	"udevice_id\000"
 .LASF51:
 	.ascii	"size\000"
 .LASF10:
 	.ascii	"long long unsigned int\000"
-.LASF380:
+.LASF387:
 	.ascii	"destroy\000"
 .LASF107:
 	.ascii	"image_header\000"
-.LASF359:
+.LASF367:
 	.ascii	"length\000"
 .LASF20:
 	.ascii	"__be32\000"
@@ -6327,61 +6475,65 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"bi_flashstart\000"
 .LASF136:
 	.ascii	"fit_noffset_os\000"
-.LASF197:
+.LASF195:
 	.ascii	"UCLASS_MMC\000"
-.LASF250:
+.LASF320:
+	.ascii	"write_hwaddr\000"
+.LASF248:
 	.ascii	"UCLASS_INVALID\000"
-.LASF235:
+.LASF233:
 	.ascii	"UCLASS_USB_HUB\000"
-.LASF353:
+.LASF361:
 	.ascii	"child_post_remove\000"
 .LASF41:
 	.ascii	"sibling_node\000"
-.LASF286:
+.LASF284:
 	.ascii	"of_root\000"
-.LASF400:
+.LASF407:
 	.ascii	"rockchip_secure_otp_v2_ofdata_to_platdata\000"
-.LASF405:
+.LASF412:
 	.ascii	"data_temp\000"
 .LASF57:
 	.ascii	"flash_info\000"
 .LASF101:
 	.ascii	"version\000"
+.LASF319:
+	.ascii	"halt\000"
 .LASF62:
 	.ascii	"region\000"
 .LASF105:
 	.ascii	"size_dt_struct\000"
-.LASF278:
+.LASF276:
 	.ascii	"dm_root\000"
-.LASF296:
+.LASF294:
 	.ascii	"sys_start_tick\000"
-.LASF301:
+.LASF299:
 	.ascii	"properties\000"
-.LASF401:
+.LASF408:
 	.ascii	"rockchip_secure_otp_v2_ioctl\000"
-.LASF199:
+.LASF197:
 	.ascii	"UCLASS_MTD\000"
 .LASF94:
 	.ascii	"fdt32_t\000"
-.LASF277:
+.LASF275:
 	.ascii	"new_gd\000"
-.LASF201:
+.LASF199:
 	.ascii	"UCLASS_NORTHBRIDGE\000"
 .LASF78:
 	.ascii	"bi_enetaddr\000"
-.LASF304:
+.LASF302:
 	.ascii	"mtd_info\000"
-.LASF351:
+.LASF359:
 	.ascii	"child_post_bind\000"
-.LASF313:
+.LASF311:
 	.ascii	"in_addr\000"
-.LASF328:
+.LASF336:
 	.ascii	"net_rx_packet_len\000"
-.LASF379:
+.LASF316:
 	.ascii	"init\000"
-.LASF308:
+.LASF306:
 	.ascii	"__dtb_dt_begin\000"
-.LASF218:
+.LASF216:
 	.ascii	"UCLASS_RESET\000"
 .LASF139:
 	.ascii	"fit_noffset_rd\000"
@@ -6395,99 +6547,99 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"FIQ_STACK_START\000"
 .LASF154:
 	.ascii	"verify\000"
-.LASF362:
+.LASF370:
 	.ascii	"ofnode\000"
 .LASF28:
 	.ascii	"name\000"
-.LASF204:
+.LASF202:
 	.ascii	"UCLASS_PANEL_BACKLIGHT\000"
-.LASF231:
+.LASF229:
 	.ascii	"UCLASS_TIMER\000"
-.LASF226:
+.LASF224:
 	.ascii	"UCLASS_SPI_FLASH\000"
-.LASF267:
+.LASF265:
 	.ascii	"have_console\000"
 .LASF81:
 	.ascii	"bi_busfreq\000"
 .LASF6:
 	.ascii	"short int\000"
-.LASF210:
+.LASF208:
 	.ascii	"UCLASS_PINCTRL\000"
-.LASF220:
+.LASF218:
 	.ascii	"UCLASS_RAMDISK\000"
 .LASF165:
 	.ascii	"UCLASS_I2C_EMUL\000"
-.LASF225:
+.LASF223:
 	.ascii	"UCLASS_SPMI\000"
-.LASF348:
+.LASF356:
 	.ascii	"remove\000"
 .LASF162:
 	.ascii	"UCLASS_TEST_BUS\000"
-.LASF311:
+.LASF309:
 	.ascii	"save_addr\000"
-.LASF356:
+.LASF364:
 	.ascii	"per_child_auto_alloc_size\000"
-.LASF292:
+.LASF290:
 	.ascii	"malloc_ptr\000"
-.LASF396:
+.LASF403:
 	.ascii	"secure_conf_base\000"
 .LASF151:
 	.ascii	"initrd_end\000"
-.LASF375:
+.LASF383:
 	.ascii	"pre_unbind\000"
-.LASF260:
+.LASF258:
 	.ascii	"baudrate\000"
 .LASF91:
 	.ascii	"_datarellocal_start_ofs\000"
 .LASF40:
 	.ascii	"child_head\000"
-.LASF252:
+.LASF250:
 	.ascii	"arch_global_data\000"
-.LASF411:
+.LASF418:
 	.ascii	"offset_temp\000"
-.LASF249:
+.LASF247:
 	.ascii	"UCLASS_COUNT\000"
-.LASF265:
+.LASF263:
 	.ascii	"pci_clk\000"
 .LASF49:
 	.ascii	"block_drvr\000"
 .LASF53:
 	.ascii	"flash_id\000"
-.LASF248:
+.LASF246:
 	.ascii	"UCLASS_CRYPTO\000"
-.LASF298:
+.LASF296:
 	.ascii	"device_node\000"
-.LASF272:
+.LASF270:
 	.ascii	"ram_size\000"
 .LASF145:
 	.ascii	"fit_noffset_setup\000"
 .LASF106:
 	.ascii	"working_fdt\000"
-.LASF281:
+.LASF279:
 	.ascii	"fdt_blob_kern\000"
-.LASF320:
+.LASF328:
 	.ascii	"net_root_path\000"
 .LASF178:
 	.ascii	"UCLASS_DMA\000"
 .LASF86:
 	.ascii	"bd_t\000"
-.LASF314:
+.LASF312:
 	.ascii	"s_addr\000"
-.LASF402:
+.LASF409:
 	.ascii	"request\000"
-.LASF377:
+.LASF385:
 	.ascii	"post_probe\000"
-.LASF329:
+.LASF337:
 	.ascii	"net_bcast_ethaddr\000"
 .LASF83:
 	.ascii	"bi_boot_params\000"
 .LASF19:
 	.ascii	"uint32_t\000"
-.LASF365:
+.LASF373:
 	.ascii	"mem_malloc_brk\000"
-.LASF315:
+.LASF323:
 	.ascii	"net_gateway\000"
-.LASF418:
+.LASF425:
 	.ascii	"GNU C11 6.3.1 20170404 -mthumb -mthumb-interwork -m"
 	.ascii	"abi=aapcs-linux -mno-unaligned-access -mfloat-abi=s"
 	.ascii	"oft -march=armv7-a -mtune=cortex-a9 -mfpu=vfpv3-d16"
@@ -6497,15 +6649,17 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"s -fdata-sections -fno-common -ffixed-r9\000"
 .LASF66:
 	.ascii	"bi_memstart\000"
-.LASF385:
+.LASF392:
 	.ascii	"DECOM_LZ4\000"
-.LASF239:
+.LASF237:
 	.ascii	"UCLASS_VIDEO_CONSOLE\000"
-.LASF350:
+.LASF322:
+	.ascii	"eth_current\000"
+.LASF358:
 	.ascii	"ofdata_to_platdata\000"
 .LASF64:
 	.ascii	"reserved\000"
-.LASF422:
+.LASF429:
 	.ascii	"free\000"
 .LASF85:
 	.ascii	"bi_dram\000"
@@ -6519,41 +6673,39 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"legacy_hdr_valid\000"
 .LASF60:
 	.ascii	"base\000"
-.LASF221:
+.LASF219:
 	.ascii	"UCLASS_RTC\000"
-.LASF253:
+.LASF251:
 	.ascii	"timer_rate_hz\000"
 .LASF52:
 	.ascii	"sector_count\000"
 .LASF118:
 	.ascii	"ih_comp\000"
-.LASF374:
+.LASF382:
 	.ascii	"post_bind\000"
-.LASF349:
+.LASF357:
 	.ascii	"unbind\000"
 .LASF148:
 	.ascii	"ft_addr\000"
-.LASF180:
-	.ascii	"UCLASS_ETH_PHY\000"
 .LASF4:
 	.ascii	"uchar\000"
 .LASF149:
 	.ascii	"ft_len\000"
 .LASF47:
 	.ascii	"next\000"
-.LASF372:
+.LASF380:
 	.ascii	"data\000"
-.LASF200:
+.LASF198:
 	.ascii	"UCLASS_NOP\000"
 .LASF144:
 	.ascii	"fit_uname_setup\000"
 .LASF48:
 	.ascii	"prev\000"
-.LASF205:
+.LASF203:
 	.ascii	"UCLASS_PCH\000"
-.LASF206:
+.LASF204:
 	.ascii	"UCLASS_PCI\000"
-.LASF316:
+.LASF324:
 	.ascii	"net_netmask\000"
 .LASF33:
 	.ascii	"driver_data\000"
@@ -6563,7 +6715,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"UCLASS_ADC\000"
 .LASF164:
 	.ascii	"UCLASS_SPI_EMUL\000"
-.LASF257:
+.LASF255:
 	.ascii	"tlb_size\000"
 .LASF141:
 	.ascii	"fit_uname_fdt\000"

commit 551ae2b92218c68335521ce3fededa6913c20828
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jun 3 09:59:29 2020 +0800

    misc: otp: re-compile the code due to the UCLASS_MISC is changed
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Icec8cf342f8cb5f0cf5bdae5644c2814a76c5860

diff --git a/drivers/misc/rockchip-secure-otp-v2.S b/drivers/misc/rockchip-secure-otp-v2.S
index afb6b6edc2..61014c56a4 100644
--- a/drivers/misc/rockchip-secure-otp-v2.S
+++ b/drivers/misc/rockchip-secure-otp-v2.S
@@ -20,7 +20,7 @@
 	.fpu softvfp
 	.type	rockchip_secure_otp_v2_ioctl, %function
 rockchip_secure_otp_v2_ioctl:
-.LFB272:
+.LFB268:
 	.file 1 "drivers/misc/rockchip-secure-otp-v2.c"
 	.loc 1 165 0
 	.cfi_startproc
@@ -55,7 +55,7 @@ rockchip_secure_otp_v2_ioctl:
 	.loc 1 178 0
 	bx	lr
 	.cfi_endproc
-.LFE272:
+.LFE268:
 	.size	rockchip_secure_otp_v2_ioctl, .-rockchip_secure_otp_v2_ioctl
 	.section	.text.rockchip_secure_otp_v2_read,"ax",%progbits
 	.align	1
@@ -65,7 +65,7 @@ rockchip_secure_otp_v2_ioctl:
 	.fpu softvfp
 	.type	rockchip_secure_otp_v2_read, %function
 rockchip_secure_otp_v2_read:
-.LFB268:
+.LFB264:
 	.loc 1 17 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
@@ -256,7 +256,7 @@ rockchip_secure_otp_v2_read:
 .L26:
 	.word	.LC0
 	.cfi_endproc
-.LFE268:
+.LFE264:
 	.size	rockchip_secure_otp_v2_read, .-rockchip_secure_otp_v2_read
 	.section	.text.rockchip_secure_otp_v2_ofdata_to_platdata,"ax",%progbits
 	.align	1
@@ -266,7 +266,7 @@ rockchip_secure_otp_v2_read:
 	.fpu softvfp
 	.type	rockchip_secure_otp_v2_ofdata_to_platdata, %function
 rockchip_secure_otp_v2_ofdata_to_platdata:
-.LFB273:
+.LFB269:
 	.loc 1 187 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
@@ -309,7 +309,7 @@ rockchip_secure_otp_v2_ofdata_to_platdata:
 .L29:
 	.word	.LC1
 	.cfi_endproc
-.LFE273:
+.LFE269:
 	.size	rockchip_secure_otp_v2_ofdata_to_platdata, .-rockchip_secure_otp_v2_ofdata_to_platdata
 	.section	.text.rockchip_secure_otp_v2_write,"ax",%progbits
 	.align	1
@@ -319,7 +319,7 @@ rockchip_secure_otp_v2_ofdata_to_platdata:
 	.fpu softvfp
 	.type	rockchip_secure_otp_v2_write, %function
 rockchip_secure_otp_v2_write:
-.LFB270:
+.LFB266:
 	.loc 1 114 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
@@ -613,7 +613,7 @@ rockchip_secure_otp_v2_write:
 	.word	.LC0
 	.word	100002
 	.cfi_endproc
-.LFE270:
+.LFE266:
 	.size	rockchip_secure_otp_v2_write, .-rockchip_secure_otp_v2_write
 	.global	_u_boot_list_2_driver_2_rockchip_secure_otp_v2
 	.section	.rodata.rockchip_otp_ids,"a",%progbits
@@ -653,7 +653,7 @@ rockchip_secure_otp_ops:
 	.size	_u_boot_list_2_driver_2_rockchip_secure_otp_v2, 68
 _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.word	.LC3
-	.word	36
+	.word	38
 	.word	rockchip_otp_ids
 	.space	16
 	.word	rockchip_secure_otp_v2_ofdata_to_platdata
@@ -700,15 +700,15 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.file 35 "include/log.h"
 	.section	.debug_info,"",%progbits
 .Ldebug_info0:
-	.4byte	0x1ce8
+	.4byte	0x1bd7
 	.2byte	0x4
 	.4byte	.Ldebug_abbrev0
 	.byte	0x4
 	.uleb128 0x1
-	.4byte	.LASF425
+	.4byte	.LASF418
 	.byte	0xc
-	.4byte	.LASF426
-	.4byte	.LASF427
+	.4byte	.LASF419
+	.4byte	.LASF420
 	.4byte	.Ldebug_ranges0+0x70
 	.4byte	0
 	.4byte	.Ldebug_line0
@@ -881,7 +881,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LASF27
 	.byte	0x8
 	.byte	0x81
-	.4byte	0x13e3
+	.4byte	0x12e7
 	.byte	0
 	.uleb128 0xe
 	.4byte	.LASF28
@@ -911,7 +911,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LASF32
 	.byte	0x8
 	.byte	0x86
-	.4byte	0x138a
+	.4byte	0x128e
 	.byte	0x14
 	.uleb128 0xe
 	.4byte	.LASF33
@@ -935,7 +935,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LASF36
 	.byte	0x8
 	.byte	0x8a
-	.4byte	0x1426
+	.4byte	0x132a
 	.byte	0x24
 	.uleb128 0xe
 	.4byte	.LASF37
@@ -1133,7 +1133,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1ff
 	.byte	0
 	.uleb128 0x18
-	.4byte	.LASF302
+	.4byte	.LASF304
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0x383
@@ -1864,12 +1864,12 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x196
 	.4byte	0x968
 	.uleb128 0x21
-	.4byte	.LASF346
+	.4byte	.LASF338
 	.byte	0x4
 	.4byte	0x50
 	.byte	0x18
 	.byte	0xe
-	.4byte	0xbb3
+	.4byte	0xbbf
 	.uleb128 0x22
 	.4byte	.LASF158
 	.byte	0
@@ -2140,8 +2140,14 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x22
 	.4byte	.LASF247
 	.byte	0x59
-	.uleb128 0x23
+	.uleb128 0x22
 	.4byte	.LASF248
+	.byte	0x5a
+	.uleb128 0x22
+	.4byte	.LASF249
+	.byte	0x5b
+	.uleb128 0x23
+	.4byte	.LASF250
 	.sleb128 -1
 	.byte	0
 	.uleb128 0x24
@@ -2149,19 +2155,19 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x7b
 	.byte	0x23
 	.byte	0xf6
-	.4byte	0xbc6
+	.4byte	0xbd2
 	.uleb128 0x22
-	.4byte	.LASF249
+	.4byte	.LASF251
 	.byte	0x5
 	.byte	0
 	.uleb128 0xd
-	.4byte	.LASF250
+	.4byte	.LASF252
 	.byte	0x20
 	.byte	0x14
 	.byte	0xc
-	.4byte	0xc27
+	.4byte	0xc33
 	.uleb128 0xe
-	.4byte	.LASF251
+	.4byte	.LASF253
 	.byte	0x14
 	.byte	0x22
 	.4byte	0x37
@@ -2179,38 +2185,38 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x7b
 	.byte	0x8
 	.uleb128 0xe
-	.4byte	.LASF252
+	.4byte	.LASF254
 	.byte	0x14
 	.byte	0x25
 	.4byte	0x37
 	.byte	0xc
 	.uleb128 0xe
-	.4byte	.LASF253
+	.4byte	.LASF255
 	.byte	0x14
 	.byte	0x26
 	.4byte	0x89
 	.byte	0x10
 	.uleb128 0xe
-	.4byte	.LASF254
+	.4byte	.LASF256
 	.byte	0x14
 	.byte	0x28
 	.4byte	0x37
 	.byte	0x18
 	.uleb128 0xe
-	.4byte	.LASF255
+	.4byte	.LASF257
 	.byte	0x14
 	.byte	0x29
 	.4byte	0x37
 	.byte	0x1c
 	.byte	0
 	.uleb128 0xd
-	.4byte	.LASF256
+	.4byte	.LASF258
 	.byte	0x10
 	.byte	0x15
 	.byte	0x22
-	.4byte	0xc63
+	.4byte	0xc6f
 	.uleb128 0xe
-	.4byte	.LASF257
+	.4byte	.LASF259
 	.byte	0x15
 	.byte	0x23
 	.4byte	0x9f
@@ -2222,24 +2228,24 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x9f
 	.byte	0x4
 	.uleb128 0xe
-	.4byte	.LASF258
+	.4byte	.LASF260
 	.byte	0x15
 	.byte	0x25
 	.4byte	0x9f
 	.byte	0x8
 	.uleb128 0xe
-	.4byte	.LASF259
+	.4byte	.LASF261
 	.byte	0x15
 	.byte	0x26
 	.4byte	0xfc
 	.byte	0xc
 	.byte	0
 	.uleb128 0xd
-	.4byte	.LASF260
+	.4byte	.LASF262
 	.byte	0xf0
 	.byte	0x15
 	.byte	0x29
-	.4byte	0xe4e
+	.4byte	0xe5a
 	.uleb128 0xf
 	.ascii	"bd\000"
 	.byte	0x15
@@ -2253,199 +2259,199 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x37
 	.byte	0x4
 	.uleb128 0xe
-	.4byte	.LASF258
+	.4byte	.LASF260
 	.byte	0x15
 	.byte	0x2c
 	.4byte	0x7b
 	.byte	0x8
 	.uleb128 0xe
-	.4byte	.LASF261
+	.4byte	.LASF263
 	.byte	0x15
 	.byte	0x2d
 	.4byte	0x37
 	.byte	0xc
 	.uleb128 0xe
-	.4byte	.LASF262
+	.4byte	.LASF264
 	.byte	0x15
 	.byte	0x2e
 	.4byte	0x37
 	.byte	0x10
 	.uleb128 0xe
-	.4byte	.LASF263
+	.4byte	.LASF265
 	.byte	0x15
 	.byte	0x30
 	.4byte	0x37
 	.byte	0x14
 	.uleb128 0xe
-	.4byte	.LASF264
+	.4byte	.LASF266
 	.byte	0x15
 	.byte	0x31
 	.4byte	0x37
 	.byte	0x18
 	.uleb128 0xe
-	.4byte	.LASF265
+	.4byte	.LASF267
 	.byte	0x15
 	.byte	0x3d
 	.4byte	0x37
 	.byte	0x1c
 	.uleb128 0xe
-	.4byte	.LASF266
+	.4byte	.LASF268
 	.byte	0x15
 	.byte	0x41
 	.4byte	0x37
 	.byte	0x20
 	.uleb128 0xe
-	.4byte	.LASF267
+	.4byte	.LASF269
 	.byte	0x15
 	.byte	0x42
 	.4byte	0x37
 	.byte	0x24
 	.uleb128 0xe
-	.4byte	.LASF268
+	.4byte	.LASF270
 	.byte	0x15
 	.byte	0x44
 	.4byte	0x37
 	.byte	0x28
 	.uleb128 0xe
-	.4byte	.LASF269
+	.4byte	.LASF271
 	.byte	0x15
 	.byte	0x45
 	.4byte	0x37
 	.byte	0x2c
 	.uleb128 0xe
-	.4byte	.LASF270
+	.4byte	.LASF272
 	.byte	0x15
 	.byte	0x46
 	.4byte	0xc0
 	.byte	0x30
 	.uleb128 0xe
-	.4byte	.LASF271
+	.4byte	.LASF273
 	.byte	0x15
 	.byte	0x47
 	.4byte	0x37
 	.byte	0x34
 	.uleb128 0xe
-	.4byte	.LASF272
+	.4byte	.LASF274
 	.byte	0x15
 	.byte	0x48
 	.4byte	0x37
 	.byte	0x38
 	.uleb128 0xe
-	.4byte	.LASF273
+	.4byte	.LASF275
 	.byte	0x15
 	.byte	0x49
 	.4byte	0x37
 	.byte	0x3c
 	.uleb128 0xe
-	.4byte	.LASF274
+	.4byte	.LASF276
 	.byte	0x15
 	.byte	0x4a
 	.4byte	0x37
 	.byte	0x40
 	.uleb128 0xe
-	.4byte	.LASF275
+	.4byte	.LASF277
 	.byte	0x15
 	.byte	0x4b
-	.4byte	0xe4e
+	.4byte	0xe5a
 	.byte	0x44
 	.uleb128 0xe
-	.4byte	.LASF276
+	.4byte	.LASF278
 	.byte	0x15
 	.byte	0x4e
 	.4byte	0x250
 	.byte	0x48
 	.uleb128 0xe
-	.4byte	.LASF277
+	.4byte	.LASF279
 	.byte	0x15
 	.byte	0x4f
 	.4byte	0x250
 	.byte	0x4c
 	.uleb128 0xe
-	.4byte	.LASF278
+	.4byte	.LASF280
 	.byte	0x15
 	.byte	0x50
 	.4byte	0x283
 	.byte	0x50
 	.uleb128 0xe
-	.4byte	.LASF279
+	.4byte	.LASF281
 	.byte	0x15
 	.byte	0x57
 	.4byte	0x256
 	.byte	0x58
 	.uleb128 0xe
-	.4byte	.LASF280
+	.4byte	.LASF282
 	.byte	0x15
 	.byte	0x59
 	.4byte	0x256
 	.byte	0x5c
 	.uleb128 0xe
-	.4byte	.LASF281
+	.4byte	.LASF283
 	.byte	0x15
 	.byte	0x5c
 	.4byte	0x256
 	.byte	0x60
 	.uleb128 0xe
-	.4byte	.LASF282
+	.4byte	.LASF284
 	.byte	0x15
 	.byte	0x5e
 	.4byte	0x128
 	.byte	0x64
 	.uleb128 0xe
-	.4byte	.LASF283
+	.4byte	.LASF285
 	.byte	0x15
 	.byte	0x5f
 	.4byte	0x37
 	.byte	0x68
 	.uleb128 0xe
-	.4byte	.LASF284
+	.4byte	.LASF286
 	.byte	0x15
 	.byte	0x61
-	.4byte	0xec6
+	.4byte	0xed2
 	.byte	0x6c
 	.uleb128 0xf
 	.ascii	"jt\000"
 	.byte	0x15
 	.byte	0x63
-	.4byte	0xed1
+	.4byte	0xedd
 	.byte	0x70
 	.uleb128 0xe
-	.4byte	.LASF285
+	.4byte	.LASF287
 	.byte	0x15
 	.byte	0x64
-	.4byte	0xed7
+	.4byte	0xee3
 	.byte	0x74
 	.uleb128 0xe
-	.4byte	.LASF286
+	.4byte	.LASF288
 	.byte	0x15
 	.byte	0x6e
 	.4byte	0x7b
 	.byte	0x94
 	.uleb128 0xe
-	.4byte	.LASF287
+	.4byte	.LASF289
 	.byte	0x15
 	.byte	0x6f
 	.4byte	0x7b
 	.byte	0x98
 	.uleb128 0xe
-	.4byte	.LASF288
+	.4byte	.LASF290
 	.byte	0x15
 	.byte	0x71
 	.4byte	0x37
 	.byte	0x9c
 	.uleb128 0xe
-	.4byte	.LASF289
+	.4byte	.LASF291
 	.byte	0x15
 	.byte	0x72
 	.4byte	0x37
 	.byte	0xa0
 	.uleb128 0xe
-	.4byte	.LASF290
+	.4byte	.LASF292
 	.byte	0x15
 	.byte	0x73
 	.4byte	0x37
 	.byte	0xa4
 	.uleb128 0xe
-	.4byte	.LASF291
+	.4byte	.LASF293
 	.byte	0x15
 	.byte	0x7c
 	.4byte	0x250
@@ -2454,28 +2460,28 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LASF127
 	.byte	0x15
 	.byte	0x7d
-	.4byte	0xbc6
+	.4byte	0xbd2
 	.byte	0xb0
 	.uleb128 0xe
-	.4byte	.LASF292
+	.4byte	.LASF294
 	.byte	0x15
 	.byte	0x8a
 	.4byte	0xb5
 	.byte	0xd0
 	.uleb128 0xe
-	.4byte	.LASF293
+	.4byte	.LASF295
 	.byte	0x15
 	.byte	0x8f
-	.4byte	0xc27
+	.4byte	0xc33
 	.byte	0xd4
 	.uleb128 0xe
-	.4byte	.LASF294
+	.4byte	.LASF296
 	.byte	0x15
 	.byte	0x90
 	.4byte	0xfc
 	.byte	0xe4
 	.uleb128 0xe
-	.4byte	.LASF295
+	.4byte	.LASF297
 	.byte	0x15
 	.byte	0x91
 	.4byte	0x50
@@ -2483,13 +2489,13 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0xc63
+	.4byte	0xc6f
 	.uleb128 0xd
-	.4byte	.LASF296
+	.4byte	.LASF298
 	.byte	0x20
 	.byte	0x16
 	.byte	0x2c
-	.4byte	0xec1
+	.4byte	0xecd
 	.uleb128 0xe
 	.4byte	.LASF28
 	.byte	0x16
@@ -2503,109 +2509,109 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0xd2
 	.byte	0x4
 	.uleb128 0xe
-	.4byte	.LASF297
+	.4byte	.LASF299
 	.byte	0x16
 	.byte	0x2f
-	.4byte	0x1304
+	.4byte	0x1208
 	.byte	0x8
 	.uleb128 0xe
-	.4byte	.LASF298
+	.4byte	.LASF300
 	.byte	0x16
 	.byte	0x30
 	.4byte	0xd2
 	.byte	0xc
 	.uleb128 0xe
-	.4byte	.LASF299
+	.4byte	.LASF301
 	.byte	0x16
 	.byte	0x32
-	.4byte	0x134c
+	.4byte	0x1250
 	.byte	0x10
 	.uleb128 0xe
 	.4byte	.LASF34
 	.byte	0x16
 	.byte	0x33
-	.4byte	0xec6
+	.4byte	0xed2
 	.byte	0x14
 	.uleb128 0xe
-	.4byte	.LASF300
+	.4byte	.LASF302
 	.byte	0x16
 	.byte	0x34
-	.4byte	0xec6
+	.4byte	0xed2
 	.byte	0x18
 	.uleb128 0xe
-	.4byte	.LASF301
+	.4byte	.LASF303
 	.byte	0x16
 	.byte	0x35
-	.4byte	0xec6
+	.4byte	0xed2
 	.byte	0x1c
 	.byte	0
 	.uleb128 0x7
-	.4byte	0xe54
+	.4byte	0xe60
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0xe54
+	.4byte	0xe60
 	.uleb128 0x18
-	.4byte	.LASF303
+	.4byte	.LASF305
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0xecc
+	.4byte	0xed8
 	.uleb128 0xa
 	.4byte	0xd8
-	.4byte	0xee7
+	.4byte	0xef3
 	.uleb128 0x11
 	.4byte	0xcb
 	.byte	0x1f
 	.byte	0
 	.uleb128 0x2
-	.4byte	.LASF304
+	.4byte	.LASF306
 	.byte	0x15
 	.byte	0x97
-	.4byte	0xc63
+	.4byte	0xc6f
 	.uleb128 0x25
-	.4byte	0xee7
+	.4byte	0xef3
 	.uleb128 0x4
-	.4byte	.LASF305
+	.4byte	.LASF307
 	.byte	0x2
 	.byte	0xad
 	.4byte	0xfc
 	.uleb128 0xa
 	.4byte	0x90
-	.4byte	0xf0d
+	.4byte	0xf19
 	.uleb128 0xb
 	.byte	0
 	.uleb128 0x4
-	.4byte	.LASF306
+	.4byte	.LASF308
 	.byte	0x2
 	.byte	0xaf
-	.4byte	0xf02
+	.4byte	0xf0e
 	.uleb128 0x4
-	.4byte	.LASF307
+	.4byte	.LASF309
 	.byte	0x2
 	.byte	0xb0
-	.4byte	0xf02
+	.4byte	0xf0e
 	.uleb128 0x4
-	.4byte	.LASF308
+	.4byte	.LASF310
 	.byte	0x2
 	.byte	0xfe
 	.4byte	0xfc
 	.uleb128 0x4
-	.4byte	.LASF309
+	.4byte	.LASF311
 	.byte	0x2
 	.byte	0xff
 	.4byte	0xfc
 	.uleb128 0xc
-	.4byte	.LASF310
+	.4byte	.LASF312
 	.byte	0x2
 	.2byte	0x100
 	.4byte	0xfc
 	.uleb128 0xd
-	.4byte	.LASF311
+	.4byte	.LASF313
 	.byte	0x4
 	.byte	0x17
 	.byte	0x2e
-	.4byte	0xf5e
+	.4byte	0xf6a
 	.uleb128 0xe
-	.4byte	.LASF312
+	.4byte	.LASF314
 	.byte	0x17
 	.byte	0x2f
 	.4byte	0x11d
@@ -2614,318 +2620,192 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0x25
-	.uleb128 0xd
-	.4byte	.LASF313
-	.byte	0x40
-	.byte	0x17
-	.byte	0xa6
-	.4byte	0x1001
-	.uleb128 0xe
-	.4byte	.LASF28
-	.byte	0x17
-	.byte	0xa8
-	.4byte	0x1001
-	.byte	0
-	.uleb128 0xe
-	.4byte	.LASF314
-	.byte	0x17
-	.byte	0xa9
-	.4byte	0x273
-	.byte	0x10
-	.uleb128 0xe
-	.4byte	.LASF315
-	.byte	0x17
-	.byte	0xaa
-	.4byte	0xb5
-	.byte	0x18
-	.uleb128 0xe
-	.4byte	.LASF155
-	.byte	0x17
-	.byte	0xab
-	.4byte	0x50
-	.byte	0x1c
-	.uleb128 0xe
-	.4byte	.LASF316
-	.byte	0x17
-	.byte	0xad
-	.4byte	0x102b
-	.byte	0x20
-	.uleb128 0xe
-	.4byte	.LASF317
-	.byte	0x17
-	.byte	0xae
-	.4byte	0x104a
-	.byte	0x24
-	.uleb128 0xe
-	.4byte	.LASF318
-	.byte	0x17
-	.byte	0xaf
-	.4byte	0x105f
-	.byte	0x28
-	.uleb128 0xe
-	.4byte	.LASF319
-	.byte	0x17
-	.byte	0xb0
-	.4byte	0x1070
-	.byte	0x2c
-	.uleb128 0xe
-	.4byte	.LASF320
-	.byte	0x17
-	.byte	0xb4
-	.4byte	0x105f
-	.byte	0x30
-	.uleb128 0xe
-	.4byte	.LASF47
-	.byte	0x17
-	.byte	0xb5
-	.4byte	0x1025
-	.byte	0x34
-	.uleb128 0xe
-	.4byte	.LASF321
-	.byte	0x17
-	.byte	0xb6
-	.4byte	0x50
-	.byte	0x38
-	.uleb128 0xe
-	.4byte	.LASF35
-	.byte	0x17
-	.byte	0xb7
-	.4byte	0x128
-	.byte	0x3c
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xd8
-	.4byte	0x1011
-	.uleb128 0x11
-	.4byte	0xcb
-	.byte	0xf
-	.byte	0
-	.uleb128 0x12
-	.4byte	0x50
-	.4byte	0x1025
-	.uleb128 0x13
-	.4byte	0x1025
-	.uleb128 0x13
-	.4byte	0x962
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0xf64
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x1011
-	.uleb128 0x12
-	.4byte	0x50
-	.4byte	0x104a
-	.uleb128 0x13
-	.4byte	0x1025
-	.uleb128 0x13
-	.4byte	0x128
-	.uleb128 0x13
-	.4byte	0x50
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x1031
 	.uleb128 0x12
 	.4byte	0x50
-	.4byte	0x105f
-	.uleb128 0x13
-	.4byte	0x1025
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x1050
-	.uleb128 0x26
-	.4byte	0x1070
+	.4byte	0xf7f
 	.uleb128 0x13
-	.4byte	0x1025
+	.4byte	0x250
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x1065
-	.uleb128 0x4
-	.4byte	.LASF322
-	.byte	0x17
-	.byte	0xbd
-	.4byte	0x1025
+	.4byte	0xf70
 	.uleb128 0xa
 	.4byte	0x90
-	.4byte	0x1091
+	.4byte	0xf95
 	.uleb128 0x11
 	.4byte	0xcb
 	.byte	0x5
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF323
+	.4byte	.LASF315
 	.byte	0x17
 	.2byte	0x1fd
-	.4byte	0xf45
+	.4byte	0xf51
 	.uleb128 0xc
-	.4byte	.LASF324
+	.4byte	.LASF316
 	.byte	0x17
 	.2byte	0x1fe
-	.4byte	0xf45
+	.4byte	0xf51
 	.uleb128 0xc
-	.4byte	.LASF325
+	.4byte	.LASF317
 	.byte	0x17
 	.2byte	0x200
-	.4byte	0xf45
+	.4byte	0xf51
 	.uleb128 0xc
-	.4byte	.LASF326
+	.4byte	.LASF318
 	.byte	0x17
 	.2byte	0x205
-	.4byte	0xed7
+	.4byte	0xee3
 	.uleb128 0xc
-	.4byte	.LASF327
+	.4byte	.LASF319
 	.byte	0x17
 	.2byte	0x206
-	.4byte	0xed7
+	.4byte	0xee3
 	.uleb128 0xa
 	.4byte	0xd8
-	.4byte	0x10dd
+	.4byte	0xfe1
 	.uleb128 0x11
 	.4byte	0xcb
 	.byte	0x3f
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF328
+	.4byte	.LASF320
 	.byte	0x17
 	.2byte	0x207
-	.4byte	0x10cd
+	.4byte	0xfd1
 	.uleb128 0xc
-	.4byte	.LASF329
+	.4byte	.LASF321
 	.byte	0x17
 	.2byte	0x209
-	.4byte	0x1081
+	.4byte	0xf85
 	.uleb128 0xc
-	.4byte	.LASF330
+	.4byte	.LASF322
 	.byte	0x17
 	.2byte	0x20a
-	.4byte	0x1081
+	.4byte	0xf85
 	.uleb128 0xc
-	.4byte	.LASF331
+	.4byte	.LASF323
 	.byte	0x17
 	.2byte	0x20b
-	.4byte	0xf45
+	.4byte	0xf51
 	.uleb128 0xc
-	.4byte	.LASF332
+	.4byte	.LASF324
 	.byte	0x17
 	.2byte	0x20c
-	.4byte	0xf45
+	.4byte	0xf51
 	.uleb128 0xc
-	.4byte	.LASF333
+	.4byte	.LASF325
 	.byte	0x17
 	.2byte	0x20d
-	.4byte	0xf5e
+	.4byte	0xf6a
 	.uleb128 0xa
-	.4byte	0xf5e
-	.4byte	0x1135
+	.4byte	0xf6a
+	.4byte	0x1039
 	.uleb128 0x11
 	.4byte	0xcb
 	.byte	0x3
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF334
+	.4byte	.LASF326
 	.byte	0x17
 	.2byte	0x20e
-	.4byte	0x1125
+	.4byte	0x1029
 	.uleb128 0xc
-	.4byte	.LASF335
+	.4byte	.LASF327
 	.byte	0x17
 	.2byte	0x20f
-	.4byte	0xf5e
+	.4byte	0xf6a
 	.uleb128 0xc
-	.4byte	.LASF336
+	.4byte	.LASF328
 	.byte	0x17
 	.2byte	0x210
 	.4byte	0x50
 	.uleb128 0xa
 	.4byte	0x9a
-	.4byte	0x1169
+	.4byte	0x106d
 	.uleb128 0x11
 	.4byte	0xcb
 	.byte	0x5
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x1159
+	.4byte	0x105d
 	.uleb128 0xc
-	.4byte	.LASF337
+	.4byte	.LASF329
 	.byte	0x17
 	.2byte	0x211
-	.4byte	0x1169
+	.4byte	0x106d
 	.uleb128 0xc
-	.4byte	.LASF338
+	.4byte	.LASF330
 	.byte	0x17
 	.2byte	0x212
-	.4byte	0x1169
+	.4byte	0x106d
 	.uleb128 0xc
-	.4byte	.LASF339
+	.4byte	.LASF331
 	.byte	0x17
 	.2byte	0x216
 	.4byte	0xf1
 	.uleb128 0xc
-	.4byte	.LASF340
+	.4byte	.LASF332
 	.byte	0x17
 	.2byte	0x217
 	.4byte	0xf1
 	.uleb128 0xc
-	.4byte	.LASF341
+	.4byte	.LASF333
 	.byte	0x17
 	.2byte	0x219
 	.4byte	0x50
 	.uleb128 0xa
 	.4byte	0xd8
-	.4byte	0x11bb
+	.4byte	0x10bf
 	.uleb128 0x17
 	.4byte	0xcb
 	.2byte	0x3ff
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF342
+	.4byte	.LASF334
 	.byte	0x17
 	.2byte	0x220
-	.4byte	0x11aa
+	.4byte	0x10ae
 	.uleb128 0xc
-	.4byte	.LASF343
+	.4byte	.LASF335
 	.byte	0x17
 	.2byte	0x222
 	.4byte	0x9f
 	.uleb128 0xc
-	.4byte	.LASF344
+	.4byte	.LASF336
 	.byte	0x17
 	.2byte	0x224
 	.4byte	0x9f
 	.uleb128 0xc
-	.4byte	.LASF345
+	.4byte	.LASF337
 	.byte	0x17
 	.2byte	0x230
-	.4byte	0xf45
-	.uleb128 0x27
-	.4byte	.LASF347
+	.4byte	0xf51
+	.uleb128 0x26
+	.4byte	.LASF339
 	.byte	0x4
 	.4byte	0x7b
 	.byte	0x17
 	.2byte	0x286
-	.4byte	0x1215
+	.4byte	0x1119
 	.uleb128 0x22
-	.4byte	.LASF348
+	.4byte	.LASF340
 	.byte	0
 	.uleb128 0x22
-	.4byte	.LASF349
+	.4byte	.LASF341
 	.byte	0x1
 	.uleb128 0x22
-	.4byte	.LASF350
+	.4byte	.LASF342
 	.byte	0x2
 	.uleb128 0x22
-	.4byte	.LASF351
+	.4byte	.LASF343
 	.byte	0x3
 	.byte	0
 	.uleb128 0xc
-	.4byte	.LASF352
+	.4byte	.LASF344
 	.byte	0x17
 	.2byte	0x28c
-	.4byte	0x11eb
+	.4byte	0x10ef
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0x9f
@@ -2934,7 +2814,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x44
 	.byte	0x8
 	.byte	0xee
-	.4byte	0x12ff
+	.4byte	0x1203
 	.uleb128 0xe
 	.4byte	.LASF28
 	.byte	0x8
@@ -2948,79 +2828,79 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x980
 	.byte	0x4
 	.uleb128 0xe
-	.4byte	.LASF353
+	.4byte	.LASF345
 	.byte	0x8
 	.byte	0xf1
-	.4byte	0x1456
+	.4byte	0x135a
 	.byte	0x8
 	.uleb128 0xe
-	.4byte	.LASF354
+	.4byte	.LASF346
 	.byte	0x8
 	.byte	0xf2
-	.4byte	0x146b
+	.4byte	0xf7f
 	.byte	0xc
 	.uleb128 0xe
-	.4byte	.LASF355
+	.4byte	.LASF347
 	.byte	0x8
 	.byte	0xf3
-	.4byte	0x146b
+	.4byte	0xf7f
 	.byte	0x10
 	.uleb128 0xe
-	.4byte	.LASF356
+	.4byte	.LASF348
 	.byte	0x8
 	.byte	0xf4
-	.4byte	0x146b
+	.4byte	0xf7f
 	.byte	0x14
 	.uleb128 0xe
-	.4byte	.LASF357
+	.4byte	.LASF349
 	.byte	0x8
 	.byte	0xf5
-	.4byte	0x146b
+	.4byte	0xf7f
 	.byte	0x18
 	.uleb128 0xe
-	.4byte	.LASF358
+	.4byte	.LASF350
 	.byte	0x8
 	.byte	0xf6
-	.4byte	0x146b
+	.4byte	0xf7f
 	.byte	0x1c
 	.uleb128 0xe
-	.4byte	.LASF359
+	.4byte	.LASF351
 	.byte	0x8
 	.byte	0xf7
-	.4byte	0x146b
+	.4byte	0xf7f
 	.byte	0x20
 	.uleb128 0xe
-	.4byte	.LASF360
+	.4byte	.LASF352
 	.byte	0x8
 	.byte	0xf8
-	.4byte	0x146b
+	.4byte	0xf7f
 	.byte	0x24
 	.uleb128 0xe
-	.4byte	.LASF361
+	.4byte	.LASF353
 	.byte	0x8
 	.byte	0xf9
-	.4byte	0x146b
+	.4byte	0xf7f
 	.byte	0x28
 	.uleb128 0xe
-	.4byte	.LASF362
+	.4byte	.LASF354
 	.byte	0x8
 	.byte	0xfa
 	.4byte	0x50
 	.byte	0x2c
 	.uleb128 0xe
-	.4byte	.LASF363
+	.4byte	.LASF355
 	.byte	0x8
 	.byte	0xfb
 	.4byte	0x50
 	.byte	0x30
 	.uleb128 0xe
-	.4byte	.LASF364
+	.4byte	.LASF356
 	.byte	0x8
 	.byte	0xfc
 	.4byte	0x50
 	.byte	0x34
 	.uleb128 0xe
-	.4byte	.LASF365
+	.4byte	.LASF357
 	.byte	0x8
 	.byte	0xfd
 	.4byte	0x50
@@ -3039,18 +2919,18 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x1227
+	.4byte	0x112b
 	.uleb128 0x2
-	.4byte	.LASF297
+	.4byte	.LASF299
 	.byte	0x16
 	.byte	0xf
 	.4byte	0x9f
 	.uleb128 0xd
-	.4byte	.LASF366
+	.4byte	.LASF358
 	.byte	0x10
 	.byte	0x16
 	.byte	0x19
-	.4byte	0x134c
+	.4byte	0x1250
 	.uleb128 0xe
 	.4byte	.LASF28
 	.byte	0x16
@@ -3058,13 +2938,13 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0xeb
 	.byte	0
 	.uleb128 0xe
-	.4byte	.LASF367
+	.4byte	.LASF359
 	.byte	0x16
 	.byte	0x1b
 	.4byte	0x50
 	.byte	0x4
 	.uleb128 0xe
-	.4byte	.LASF368
+	.4byte	.LASF360
 	.byte	0x16
 	.byte	0x1c
 	.4byte	0x128
@@ -3073,66 +2953,66 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LASF47
 	.byte	0x16
 	.byte	0x1d
-	.4byte	0x134c
+	.4byte	0x1250
 	.byte	0xc
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x130f
-	.uleb128 0x28
+	.4byte	0x1213
+	.uleb128 0x27
 	.ascii	"gd\000"
 	.byte	0x16
 	.byte	0x57
-	.4byte	0x135c
+	.4byte	0x1260
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0xef2
-	.uleb128 0x29
-	.4byte	.LASF428
+	.4byte	0xefe
+	.uleb128 0x28
+	.4byte	.LASF421
 	.byte	0x4
 	.byte	0x19
 	.byte	0x33
-	.4byte	0x1384
-	.uleb128 0x2a
+	.4byte	0x1288
+	.uleb128 0x29
 	.ascii	"np\000"
 	.byte	0x19
 	.byte	0x34
-	.4byte	0x1384
-	.uleb128 0x2b
-	.4byte	.LASF369
+	.4byte	0x1288
+	.uleb128 0x2a
+	.4byte	.LASF361
 	.byte	0x19
 	.byte	0x35
 	.4byte	0xe4
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0xec1
+	.4byte	0xecd
 	.uleb128 0x2
-	.4byte	.LASF370
+	.4byte	.LASF362
 	.byte	0x19
 	.byte	0x36
-	.4byte	0x1362
+	.4byte	0x1266
 	.uleb128 0xc
-	.4byte	.LASF371
+	.4byte	.LASF363
 	.byte	0x1a
 	.2byte	0x3ba
 	.4byte	0xfc
 	.uleb128 0xc
-	.4byte	.LASF372
+	.4byte	.LASF364
 	.byte	0x1a
 	.2byte	0x3bb
 	.4byte	0xfc
 	.uleb128 0xc
-	.4byte	.LASF373
+	.4byte	.LASF365
 	.byte	0x1a
 	.2byte	0x3bc
 	.4byte	0xfc
 	.uleb128 0xd
-	.4byte	.LASF374
+	.4byte	.LASF366
 	.byte	0x4
 	.byte	0x1b
 	.byte	0xd
-	.4byte	0x13d2
+	.4byte	0x12d6
 	.uleb128 0xf
 	.ascii	"pid\000"
 	.byte	0x1b
@@ -3141,22 +3021,22 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.byte	0
 	.uleb128 0x4
-	.4byte	.LASF375
+	.4byte	.LASF367
 	.byte	0x1b
 	.byte	0x11
-	.4byte	0x13dd
+	.4byte	0x12e1
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x13b9
+	.4byte	0x12bd
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x12ff
+	.4byte	0x1203
 	.uleb128 0xd
 	.4byte	.LASF36
 	.byte	0x18
 	.byte	0x1c
 	.byte	0x23
-	.4byte	0x1426
+	.4byte	0x132a
 	.uleb128 0xe
 	.4byte	.LASF35
 	.byte	0x1c
@@ -3164,13 +3044,13 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x128
 	.byte	0
 	.uleb128 0xe
-	.4byte	.LASF376
+	.4byte	.LASF368
 	.byte	0x1c
 	.byte	0x25
-	.4byte	0x1555
+	.4byte	0x1444
 	.byte	0x4
 	.uleb128 0xe
-	.4byte	.LASF377
+	.4byte	.LASF369
 	.byte	0x1c
 	.byte	0x26
 	.4byte	0x283
@@ -3184,46 +3064,37 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x13e9
+	.4byte	0x12ed
 	.uleb128 0xd
-	.4byte	.LASF378
+	.4byte	.LASF370
 	.byte	0x8
 	.byte	0x8
 	.byte	0xb5
-	.4byte	0x1451
+	.4byte	0x1355
 	.uleb128 0xe
-	.4byte	.LASF379
+	.4byte	.LASF371
 	.byte	0x8
 	.byte	0xb6
 	.4byte	0xd2
 	.byte	0
 	.uleb128 0xe
-	.4byte	.LASF380
+	.4byte	.LASF372
 	.byte	0x8
 	.byte	0xb7
 	.4byte	0xfc
 	.byte	0x4
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x142c
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x1451
-	.uleb128 0x12
-	.4byte	0x50
-	.4byte	0x146b
-	.uleb128 0x13
-	.4byte	0x250
-	.byte	0
+	.4byte	0x1330
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x145c
+	.4byte	0x1355
 	.uleb128 0xd
-	.4byte	.LASF381
+	.4byte	.LASF373
 	.byte	0x48
 	.byte	0x1c
 	.byte	0x54
-	.4byte	0x1555
+	.4byte	0x1444
 	.uleb128 0xe
 	.4byte	.LASF28
 	.byte	0x1c
@@ -3237,85 +3108,85 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x980
 	.byte	0x4
 	.uleb128 0xe
-	.4byte	.LASF382
+	.4byte	.LASF374
 	.byte	0x1c
 	.byte	0x57
-	.4byte	0x146b
+	.4byte	0xf7f
 	.byte	0x8
 	.uleb128 0xe
-	.4byte	.LASF383
+	.4byte	.LASF375
 	.byte	0x1c
 	.byte	0x58
-	.4byte	0x146b
+	.4byte	0xf7f
 	.byte	0xc
 	.uleb128 0xe
-	.4byte	.LASF384
+	.4byte	.LASF376
 	.byte	0x1c
 	.byte	0x59
-	.4byte	0x146b
+	.4byte	0xf7f
 	.byte	0x10
 	.uleb128 0xe
-	.4byte	.LASF385
+	.4byte	.LASF377
 	.byte	0x1c
 	.byte	0x5a
-	.4byte	0x146b
+	.4byte	0xf7f
 	.byte	0x14
 	.uleb128 0xe
-	.4byte	.LASF386
+	.4byte	.LASF378
 	.byte	0x1c
 	.byte	0x5b
-	.4byte	0x146b
+	.4byte	0xf7f
 	.byte	0x18
 	.uleb128 0xe
-	.4byte	.LASF359
+	.4byte	.LASF351
 	.byte	0x1c
 	.byte	0x5c
-	.4byte	0x146b
+	.4byte	0xf7f
 	.byte	0x1c
 	.uleb128 0xe
-	.4byte	.LASF360
+	.4byte	.LASF352
 	.byte	0x1c
 	.byte	0x5d
-	.4byte	0x146b
+	.4byte	0xf7f
 	.byte	0x20
 	.uleb128 0xe
-	.4byte	.LASF316
+	.4byte	.LASF379
 	.byte	0x1c
 	.byte	0x5e
-	.4byte	0x156a
+	.4byte	0x1459
 	.byte	0x24
 	.uleb128 0xe
-	.4byte	.LASF387
+	.4byte	.LASF380
 	.byte	0x1c
 	.byte	0x5f
-	.4byte	0x156a
+	.4byte	0x1459
 	.byte	0x28
 	.uleb128 0xe
-	.4byte	.LASF362
+	.4byte	.LASF354
 	.byte	0x1c
 	.byte	0x60
 	.4byte	0x50
 	.byte	0x2c
 	.uleb128 0xe
-	.4byte	.LASF388
+	.4byte	.LASF381
 	.byte	0x1c
 	.byte	0x61
 	.4byte	0x50
 	.byte	0x30
 	.uleb128 0xe
-	.4byte	.LASF389
+	.4byte	.LASF382
 	.byte	0x1c
 	.byte	0x62
 	.4byte	0x50
 	.byte	0x34
 	.uleb128 0xe
-	.4byte	.LASF364
+	.4byte	.LASF356
 	.byte	0x1c
 	.byte	0x63
 	.4byte	0x50
 	.byte	0x38
 	.uleb128 0xe
-	.4byte	.LASF365
+	.4byte	.LASF357
 	.byte	0x1c
 	.byte	0x64
 	.4byte	0x50
@@ -3335,80 +3206,80 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x1471
+	.4byte	0x1360
 	.uleb128 0x12
 	.4byte	0x50
-	.4byte	0x156a
+	.4byte	0x1459
 	.uleb128 0x13
-	.4byte	0x1426
+	.4byte	0x132a
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x155b
+	.4byte	0x144a
 	.uleb128 0x4
-	.4byte	.LASF390
+	.4byte	.LASF383
 	.byte	0x1d
 	.byte	0x49
 	.4byte	0x7b
 	.uleb128 0x21
-	.4byte	.LASF391
+	.4byte	.LASF384
 	.byte	0x4
 	.4byte	0x7b
 	.byte	0x1e
 	.byte	0x14
-	.4byte	0x15aa
+	.4byte	0x1499
 	.uleb128 0x22
-	.4byte	.LASF392
+	.4byte	.LASF385
 	.byte	0x1
 	.uleb128 0x22
-	.4byte	.LASF393
+	.4byte	.LASF386
 	.byte	0x2
 	.uleb128 0x22
-	.4byte	.LASF394
+	.4byte	.LASF387
 	.byte	0x4
 	.uleb128 0x22
-	.4byte	.LASF395
+	.4byte	.LASF388
 	.byte	0x8
 	.uleb128 0x22
-	.4byte	.LASF396
+	.4byte	.LASF389
 	.byte	0x10
 	.byte	0
 	.uleb128 0xd
-	.4byte	.LASF397
+	.4byte	.LASF390
 	.byte	0x10
 	.byte	0x1e
 	.byte	0x60
-	.4byte	0x15e7
+	.4byte	0x14d6
 	.uleb128 0xe
-	.4byte	.LASF398
+	.4byte	.LASF391
 	.byte	0x1e
 	.byte	0x6a
-	.4byte	0x160a
+	.4byte	0x14f9
 	.byte	0
 	.uleb128 0xe
-	.4byte	.LASF399
+	.4byte	.LASF392
 	.byte	0x1e
 	.byte	0x74
-	.4byte	0x162e
+	.4byte	0x151d
 	.byte	0x4
 	.uleb128 0xe
-	.4byte	.LASF400
+	.4byte	.LASF393
 	.byte	0x1e
 	.byte	0x7e
-	.4byte	0x164d
+	.4byte	0x153c
 	.byte	0x8
 	.uleb128 0xe
-	.4byte	.LASF401
+	.4byte	.LASF394
 	.byte	0x1e
 	.byte	0x8b
-	.4byte	0x167b
+	.4byte	0x156a
 	.byte	0xc
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x15aa
+	.4byte	0x1499
 	.uleb128 0x12
 	.4byte	0x50
-	.4byte	0x160a
+	.4byte	0x14f9
 	.uleb128 0x13
 	.4byte	0x250
 	.uleb128 0x13
@@ -3420,10 +3291,10 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x15ec
+	.4byte	0x14db
 	.uleb128 0x12
 	.4byte	0x50
-	.4byte	0x162e
+	.4byte	0x151d
 	.uleb128 0x13
 	.4byte	0x250
 	.uleb128 0x13
@@ -3435,10 +3306,10 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x1610
+	.4byte	0x14ff
 	.uleb128 0x12
 	.4byte	0x50
-	.4byte	0x164d
+	.4byte	0x153c
 	.uleb128 0x13
 	.4byte	0x250
 	.uleb128 0x13
@@ -3448,10 +3319,10 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x1634
+	.4byte	0x1523
 	.uleb128 0x12
 	.4byte	0x50
-	.4byte	0x167b
+	.4byte	0x156a
 	.uleb128 0x13
 	.4byte	0x250
 	.uleb128 0x13
@@ -3467,13 +3338,13 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x1653
+	.4byte	0x1542
 	.uleb128 0xd
-	.4byte	.LASF402
+	.4byte	.LASF395
 	.byte	0x8
 	.byte	0x1f
 	.byte	0x36
-	.4byte	0x16a6
+	.4byte	0x1595
 	.uleb128 0xe
 	.4byte	.LASF60
 	.byte	0x1f
@@ -3481,105 +3352,105 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x128
 	.byte	0
 	.uleb128 0xe
-	.4byte	.LASF403
+	.4byte	.LASF396
 	.byte	0x1f
 	.byte	0x38
 	.4byte	0x37
 	.byte	0x4
 	.byte	0
-	.uleb128 0x2c
-	.4byte	.LASF404
+	.uleb128 0x2b
+	.4byte	.LASF397
 	.byte	0x1
 	.byte	0xb4
-	.4byte	0x15e7
+	.4byte	0x14d6
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	rockchip_secure_otp_ops
 	.uleb128 0xa
-	.4byte	0x1451
-	.4byte	0x16c7
+	.4byte	0x1355
+	.4byte	0x15b6
 	.uleb128 0x11
 	.4byte	0xcb
 	.byte	0x1
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x16b7
-	.uleb128 0x2c
-	.4byte	.LASF405
+	.4byte	0x15a6
+	.uleb128 0x2b
+	.4byte	.LASF398
 	.byte	0x1
 	.byte	0xc5
-	.4byte	0x16c7
+	.4byte	0x15b6
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	rockchip_otp_ids
-	.uleb128 0x2d
-	.4byte	.LASF406
+	.uleb128 0x2c
+	.4byte	.LASF399
 	.byte	0x1
 	.byte	0xcc
-	.4byte	0x1227
+	.4byte	0x112b
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	_u_boot_list_2_driver_2_rockchip_secure_otp_v2
-	.uleb128 0x2e
-	.4byte	.LASF407
+	.uleb128 0x2d
+	.4byte	.LASF400
 	.byte	0x1
 	.byte	0xba
 	.4byte	0x50
-	.4byte	.LFB273
-	.4byte	.LFE273-.LFB273
+	.4byte	.LFB269
+	.4byte	.LFE269-.LFB269
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x176c
-	.uleb128 0x2f
+	.4byte	0x165b
+	.uleb128 0x2e
 	.ascii	"dev\000"
 	.byte	0x1
 	.byte	0xba
 	.4byte	0x250
 	.4byte	.LLST18
-	.uleb128 0x30
+	.uleb128 0x2f
 	.ascii	"otp\000"
 	.byte	0x1
 	.byte	0xbc
-	.4byte	0x176c
+	.4byte	0x165b
 	.4byte	.LLST19
-	.uleb128 0x31
+	.uleb128 0x30
 	.4byte	.LVL31
-	.4byte	0x1ca7
-	.4byte	0x1739
-	.uleb128 0x32
+	.4byte	0x1b96
+	.4byte	0x1628
+	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
 	.byte	0
-	.uleb128 0x31
+	.uleb128 0x30
 	.4byte	.LVL34
-	.4byte	0x1cb3
-	.4byte	0x174d
-	.uleb128 0x32
+	.4byte	0x1ba2
+	.4byte	0x163c
+	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
 	.byte	0
-	.uleb128 0x33
-	.4byte	.LVL35
-	.4byte	0x1cbe
 	.uleb128 0x32
+	.4byte	.LVL35
+	.4byte	0x1bad
+	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x32
+	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	.LC1
-	.uleb128 0x32
+	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x1
@@ -3588,250 +3459,250 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x1681
-	.uleb128 0x2e
-	.4byte	.LASF408
+	.4byte	0x1570
+	.uleb128 0x2d
+	.4byte	.LASF401
 	.byte	0x1
 	.byte	0xa3
 	.4byte	0x50
-	.4byte	.LFB272
-	.4byte	.LFE272-.LFB272
+	.4byte	.LFB268
+	.4byte	.LFE268-.LFB268
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x17dd
-	.uleb128 0x2f
+	.4byte	0x16cc
+	.uleb128 0x2e
 	.ascii	"dev\000"
 	.byte	0x1
 	.byte	0xa3
 	.4byte	0x250
 	.4byte	.LLST0
-	.uleb128 0x34
-	.4byte	.LASF409
+	.uleb128 0x33
+	.4byte	.LASF402
 	.byte	0x1
 	.byte	0xa3
 	.4byte	0x37
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x35
+	.uleb128 0x34
 	.ascii	"buf\000"
 	.byte	0x1
 	.byte	0xa4
 	.4byte	0x128
 	.uleb128 0x1
 	.byte	0x52
-	.uleb128 0x30
+	.uleb128 0x2f
 	.ascii	"ret\000"
 	.byte	0x1
 	.byte	0xa6
 	.4byte	0x50
 	.4byte	.LLST1
-	.uleb128 0x36
-	.4byte	0x17dd
+	.uleb128 0x35
+	.4byte	0x16cc
 	.4byte	.LBB18
 	.4byte	.Ldebug_ranges0+0
 	.byte	0x1
 	.byte	0xab
-	.uleb128 0x37
-	.4byte	0x17ed
+	.uleb128 0x36
+	.4byte	0x16dc
 	.4byte	.LLST2
 	.byte	0
 	.byte	0
-	.uleb128 0x38
-	.4byte	.LASF413
+	.uleb128 0x37
+	.4byte	.LASF406
 	.byte	0x1
 	.byte	0x9c
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x17f9
-	.uleb128 0x39
+	.4byte	0x16e8
+	.uleb128 0x38
 	.ascii	"buf\000"
 	.byte	0x1
 	.byte	0x9c
-	.4byte	0x1221
+	.4byte	0x1125
 	.byte	0
-	.uleb128 0x2e
-	.4byte	.LASF410
+	.uleb128 0x2d
+	.4byte	.LASF403
 	.byte	0x1
 	.byte	0x70
 	.4byte	0x50
-	.4byte	.LFB270
-	.4byte	.LFE270-.LFB270
+	.4byte	.LFB266
+	.4byte	.LFE266-.LFB266
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1a38
-	.uleb128 0x2f
+	.4byte	0x1927
+	.uleb128 0x2e
 	.ascii	"dev\000"
 	.byte	0x1
 	.byte	0x70
 	.4byte	0x250
 	.4byte	.LLST20
-	.uleb128 0x3a
-	.4byte	.LASF411
+	.uleb128 0x39
+	.4byte	.LASF404
 	.byte	0x1
 	.byte	0x70
 	.4byte	0x50
 	.4byte	.LLST21
-	.uleb128 0x2f
+	.uleb128 0x2e
 	.ascii	"buf\000"
 	.byte	0x1
 	.byte	0x71
 	.4byte	0x256
 	.4byte	.LLST22
-	.uleb128 0x3a
+	.uleb128 0x39
 	.4byte	.LASF51
 	.byte	0x1
 	.byte	0x71
 	.4byte	0x50
 	.4byte	.LLST23
-	.uleb128 0x30
+	.uleb128 0x2f
 	.ascii	"otp\000"
 	.byte	0x1
 	.byte	0x73
-	.4byte	0x176c
+	.4byte	0x165b
 	.4byte	.LLST24
-	.uleb128 0x30
+	.uleb128 0x2f
 	.ascii	"i\000"
 	.byte	0x1
 	.byte	0x74
 	.4byte	0x50
 	.4byte	.LLST25
-	.uleb128 0x3b
+	.uleb128 0x3a
 	.ascii	"n\000"
 	.byte	0x1
 	.byte	0x74
 	.4byte	0x50
-	.uleb128 0x30
+	.uleb128 0x2f
 	.ascii	"ret\000"
 	.byte	0x1
 	.byte	0x74
 	.4byte	0x50
 	.4byte	.LLST26
-	.uleb128 0x2c
-	.4byte	.LASF380
+	.uleb128 0x2b
+	.4byte	.LASF372
 	.byte	0x1
 	.byte	0x75
 	.4byte	0xeb
 	.uleb128 0x1
 	.byte	0x5a
-	.uleb128 0x3c
-	.4byte	.LASF412
+	.uleb128 0x3b
+	.4byte	.LASF405
 	.byte	0x1
 	.byte	0x76
 	.4byte	0xeb
 	.4byte	.LLST27
-	.uleb128 0x3d
+	.uleb128 0x3c
 	.4byte	.LBB39
 	.4byte	.LBE39-.LBB39
-	.4byte	0x18bb
-	.uleb128 0x30
+	.4byte	0x17aa
+	.uleb128 0x2f
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x8c
 	.4byte	0x9f
 	.4byte	.LLST28
 	.byte	0
-	.uleb128 0x3d
+	.uleb128 0x3c
 	.4byte	.LBB54
 	.4byte	.LBE54-.LBB54
-	.4byte	0x18d8
-	.uleb128 0x30
+	.4byte	0x17c7
+	.uleb128 0x2f
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x91
 	.4byte	0x9f
 	.4byte	.LLST40
 	.byte	0
-	.uleb128 0x3d
+	.uleb128 0x3c
 	.4byte	.LBB51
 	.4byte	.LBE51-.LBB51
-	.4byte	0x18f5
-	.uleb128 0x30
+	.4byte	0x17e4
+	.uleb128 0x2f
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x97
 	.4byte	0x9f
 	.4byte	.LLST39
 	.byte	0
-	.uleb128 0x3e
-	.4byte	0x1a38
+	.uleb128 0x3d
+	.4byte	0x1927
 	.4byte	.LBB40
 	.4byte	.Ldebug_ranges0+0x30
 	.byte	0x1
 	.byte	0x8f
-	.4byte	0x19d6
-	.uleb128 0x3f
-	.4byte	0x1a48
-	.uleb128 0x37
-	.4byte	0x1a69
+	.4byte	0x18c5
+	.uleb128 0x3e
+	.4byte	0x1937
+	.uleb128 0x36
+	.4byte	0x1958
 	.4byte	.LLST29
-	.uleb128 0x37
-	.4byte	0x1a5e
+	.uleb128 0x36
+	.4byte	0x194d
 	.4byte	.LLST30
-	.uleb128 0x37
-	.4byte	0x1a53
+	.uleb128 0x36
+	.4byte	0x1942
 	.4byte	.LLST31
-	.uleb128 0x40
+	.uleb128 0x3f
 	.4byte	.Ldebug_ranges0+0x30
-	.uleb128 0x41
-	.4byte	0x1a72
+	.uleb128 0x40
+	.4byte	0x1961
 	.4byte	.LLST32
-	.uleb128 0x41
-	.4byte	0x1a7d
+	.uleb128 0x40
+	.4byte	0x196c
 	.4byte	.LLST33
-	.uleb128 0x42
-	.4byte	.Ldebug_ranges0+0x58
-	.4byte	0x1952
 	.uleb128 0x41
-	.4byte	0x1ac0
+	.4byte	.Ldebug_ranges0+0x58
+	.4byte	0x1841
+	.uleb128 0x40
+	.4byte	0x19af
 	.4byte	.LLST34
 	.byte	0
-	.uleb128 0x3d
+	.uleb128 0x3c
 	.4byte	.LBB43
 	.4byte	.LBE43-.LBB43
-	.4byte	0x1969
-	.uleb128 0x41
-	.4byte	0x1a8d
+	.4byte	0x1858
+	.uleb128 0x40
+	.4byte	0x197c
 	.4byte	.LLST35
 	.byte	0
-	.uleb128 0x3d
+	.uleb128 0x3c
 	.4byte	.LBB44
 	.4byte	.LBE44-.LBB44
-	.4byte	0x1980
-	.uleb128 0x41
-	.4byte	0x1a9e
+	.4byte	0x186f
+	.uleb128 0x40
+	.4byte	0x198d
 	.4byte	.LLST36
 	.byte	0
-	.uleb128 0x3d
+	.uleb128 0x3c
 	.4byte	.LBB45
 	.4byte	.LBE45-.LBB45
-	.4byte	0x1997
-	.uleb128 0x41
-	.4byte	0x1aaf
+	.4byte	0x1886
+	.uleb128 0x40
+	.4byte	0x199e
 	.4byte	.LLST37
 	.byte	0
-	.uleb128 0x3d
+	.uleb128 0x3c
 	.4byte	.LBB47
 	.4byte	.LBE47-.LBB47
-	.4byte	0x19ae
-	.uleb128 0x41
-	.4byte	0x1acd
+	.4byte	0x189d
+	.uleb128 0x40
+	.4byte	0x19bc
 	.4byte	.LLST38
 	.byte	0
-	.uleb128 0x31
+	.uleb128 0x30
 	.4byte	.LVL60
-	.4byte	0x1cc9
-	.4byte	0x19c5
-	.uleb128 0x32
+	.4byte	0x1bb8
+	.4byte	0x18b4
+	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	.LC0
 	.byte	0
-	.uleb128 0x33
-	.4byte	.LVL73
-	.4byte	0x1cd4
 	.uleb128 0x32
+	.4byte	.LVL73
+	.4byte	0x1bc3
+	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x1
@@ -3839,61 +3710,61 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x31
+	.uleb128 0x30
 	.4byte	.LVL38
-	.4byte	0x1ca7
-	.4byte	0x19ea
-	.uleb128 0x32
+	.4byte	0x1b96
+	.4byte	0x18d9
+	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x77
 	.sleb128 0
 	.byte	0
-	.uleb128 0x31
+	.uleb128 0x30
 	.4byte	.LVL41
-	.4byte	0x1cdf
-	.4byte	0x19fe
-	.uleb128 0x32
+	.4byte	0x1bce
+	.4byte	0x18ed
+	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x78
 	.sleb128 0
 	.byte	0
-	.uleb128 0x31
+	.uleb128 0x30
 	.4byte	.LVL45
-	.4byte	0x1ada
-	.4byte	0x1a24
-	.uleb128 0x32
+	.4byte	0x19c9
+	.4byte	0x1913
+	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x77
 	.sleb128 0
-	.uleb128 0x32
+	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
-	.uleb128 0x32
+	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x76
 	.sleb128 0
-	.uleb128 0x32
+	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
 	.byte	0x78
 	.sleb128 0
 	.byte	0
-	.uleb128 0x33
-	.4byte	.LVL57
-	.4byte	0x1cc9
 	.uleb128 0x32
+	.4byte	.LVL57
+	.4byte	0x1bb8
+	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
@@ -3901,218 +3772,218 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LC2
 	.byte	0
 	.byte	0
-	.uleb128 0x38
-	.4byte	.LASF414
+	.uleb128 0x37
+	.4byte	.LASF407
 	.byte	0x1
 	.byte	0x47
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x1ada
-	.uleb128 0x39
+	.4byte	0x19c9
+	.uleb128 0x38
 	.ascii	"otp\000"
 	.byte	0x1
 	.byte	0x47
-	.4byte	0x176c
-	.uleb128 0x43
-	.4byte	.LASF411
+	.4byte	0x165b
+	.uleb128 0x42
+	.4byte	.LASF404
 	.byte	0x1
 	.byte	0x48
 	.4byte	0x50
-	.uleb128 0x43
-	.4byte	.LASF380
+	.uleb128 0x42
+	.4byte	.LASF372
 	.byte	0x1
 	.byte	0x48
 	.4byte	0x90
-	.uleb128 0x39
+	.uleb128 0x38
 	.ascii	"i\000"
 	.byte	0x1
 	.byte	0x48
 	.4byte	0x50
-	.uleb128 0x44
-	.4byte	.LASF415
+	.uleb128 0x43
+	.4byte	.LASF408
 	.byte	0x1
 	.byte	0x4a
 	.4byte	0x50
-	.uleb128 0x44
-	.4byte	.LASF416
+	.uleb128 0x43
+	.4byte	.LASF409
 	.byte	0x1
 	.byte	0x4b
 	.4byte	0x9f
-	.uleb128 0x45
-	.4byte	0x1a99
-	.uleb128 0x3b
+	.uleb128 0x44
+	.4byte	0x1988
+	.uleb128 0x3a
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x5c
 	.4byte	0x9f
 	.byte	0
-	.uleb128 0x45
-	.4byte	0x1aaa
-	.uleb128 0x3b
+	.uleb128 0x44
+	.4byte	0x1999
+	.uleb128 0x3a
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x5d
 	.4byte	0x9f
 	.byte	0
-	.uleb128 0x45
-	.4byte	0x1abb
-	.uleb128 0x3b
+	.uleb128 0x44
+	.4byte	0x19aa
+	.uleb128 0x3a
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x5e
 	.4byte	0x9f
 	.byte	0
-	.uleb128 0x45
-	.4byte	0x1acc
-	.uleb128 0x3b
+	.uleb128 0x44
+	.4byte	0x19bb
+	.uleb128 0x3a
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x5f
 	.4byte	0x9f
 	.byte	0
-	.uleb128 0x46
-	.uleb128 0x3b
+	.uleb128 0x45
+	.uleb128 0x3a
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x62
 	.4byte	0x9f
 	.byte	0
 	.byte	0
-	.uleb128 0x2e
-	.4byte	.LASF417
+	.uleb128 0x2d
+	.4byte	.LASF410
 	.byte	0x1
 	.byte	0xf
 	.4byte	0x50
-	.4byte	.LFB268
-	.4byte	.LFE268-.LFB268
+	.4byte	.LFB264
+	.4byte	.LFE264-.LFB264
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1c8d
-	.uleb128 0x2f
+	.4byte	0x1b7c
+	.uleb128 0x2e
 	.ascii	"dev\000"
 	.byte	0x1
 	.byte	0xf
 	.4byte	0x250
 	.4byte	.LLST3
-	.uleb128 0x3a
-	.4byte	.LASF411
+	.uleb128 0x39
+	.4byte	.LASF404
 	.byte	0x1
 	.byte	0xf
 	.4byte	0x50
 	.4byte	.LLST4
-	.uleb128 0x2f
+	.uleb128 0x2e
 	.ascii	"buf\000"
 	.byte	0x1
 	.byte	0x10
 	.4byte	0x128
 	.4byte	.LLST5
-	.uleb128 0x3a
+	.uleb128 0x39
 	.4byte	.LASF51
 	.byte	0x1
 	.byte	0x10
 	.4byte	0x50
 	.4byte	.LLST6
-	.uleb128 0x30
+	.uleb128 0x2f
 	.ascii	"otp\000"
 	.byte	0x1
 	.byte	0x12
-	.4byte	0x176c
+	.4byte	0x165b
 	.4byte	.LLST7
-	.uleb128 0x30
+	.uleb128 0x2f
 	.ascii	"i\000"
 	.byte	0x1
 	.byte	0x13
 	.4byte	0x50
 	.4byte	.LLST8
-	.uleb128 0x3c
-	.4byte	.LASF415
+	.uleb128 0x3b
+	.4byte	.LASF408
 	.byte	0x1
 	.byte	0x13
 	.4byte	0x50
 	.4byte	.LLST9
-	.uleb128 0x30
+	.uleb128 0x2f
 	.ascii	"n\000"
 	.byte	0x1
 	.byte	0x13
 	.4byte	0x50
 	.4byte	.LLST10
-	.uleb128 0x30
+	.uleb128 0x2f
 	.ascii	"ret\000"
 	.byte	0x1
 	.byte	0x13
 	.4byte	0x50
 	.4byte	.LLST11
-	.uleb128 0x3c
-	.4byte	.LASF380
+	.uleb128 0x3b
+	.4byte	.LASF372
 	.byte	0x1
 	.byte	0x14
 	.4byte	0xeb
 	.4byte	.LLST12
-	.uleb128 0x3c
-	.4byte	.LASF416
+	.uleb128 0x3b
+	.4byte	.LASF409
 	.byte	0x1
 	.byte	0x15
 	.4byte	0x9f
 	.4byte	.LLST13
-	.uleb128 0x3c
-	.4byte	.LASF418
+	.uleb128 0x3b
+	.4byte	.LASF411
 	.byte	0x1
 	.byte	0x16
 	.4byte	0x50
 	.4byte	.LLST14
-	.uleb128 0x47
+	.uleb128 0x46
 	.ascii	"out\000"
 	.byte	0x1
 	.byte	0x40
 	.4byte	.L10
-	.uleb128 0x3d
+	.uleb128 0x3c
 	.4byte	.LBB22
 	.4byte	.LBE22-.LBB22
-	.4byte	0x1bc8
-	.uleb128 0x48
+	.4byte	0x1ab7
+	.uleb128 0x47
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x19
 	.4byte	0x9f
 	.byte	0
 	.byte	0
-	.uleb128 0x3d
+	.uleb128 0x3c
 	.4byte	.LBB25
 	.4byte	.LBE25-.LBB25
-	.4byte	0x1be5
-	.uleb128 0x30
+	.4byte	0x1ad4
+	.uleb128 0x2f
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x2c
 	.4byte	0x9f
 	.4byte	.LLST16
 	.byte	0
-	.uleb128 0x42
+	.uleb128 0x41
 	.4byte	.Ldebug_ranges0+0x18
-	.4byte	0x1bfb
-	.uleb128 0x48
+	.4byte	0x1aea
+	.uleb128 0x47
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x2d
 	.4byte	0x9f
 	.byte	0x1
 	.byte	0
-	.uleb128 0x3d
+	.uleb128 0x3c
 	.4byte	.LBB27
 	.4byte	.LBE27-.LBB27
-	.4byte	0x1c18
-	.uleb128 0x30
+	.4byte	0x1b07
+	.uleb128 0x2f
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x30
 	.4byte	0x9f
 	.4byte	.LLST17
 	.byte	0
-	.uleb128 0x3d
+	.uleb128 0x3c
 	.4byte	.LBB28
 	.4byte	.LBE28-.LBB28
-	.4byte	0x1c33
-	.uleb128 0x49
+	.4byte	0x1b22
+	.uleb128 0x48
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x3d
@@ -4120,22 +3991,22 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x1
 	.byte	0x53
 	.byte	0
-	.uleb128 0x3d
+	.uleb128 0x3c
 	.4byte	.LBB24
 	.4byte	.LBE24-.LBB24
-	.4byte	0x1c50
-	.uleb128 0x30
+	.4byte	0x1b3f
+	.uleb128 0x2f
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x42
 	.4byte	0x9f
 	.4byte	.LLST15
 	.byte	0
-	.uleb128 0x31
+	.uleb128 0x30
 	.4byte	.LVL6
-	.4byte	0x1ca7
-	.4byte	0x1c65
-	.uleb128 0x32
+	.4byte	0x1b96
+	.4byte	0x1b54
+	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x3
@@ -4143,21 +4014,21 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0
-	.uleb128 0x31
+	.uleb128 0x30
 	.4byte	.LVL16
-	.4byte	0x1cc9
-	.4byte	0x1c7c
-	.uleb128 0x32
+	.4byte	0x1bb8
+	.4byte	0x1b6b
+	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	.LC0
 	.byte	0
-	.uleb128 0x33
-	.4byte	.LVL24
-	.4byte	0x1cd4
 	.uleb128 0x32
+	.4byte	.LVL24
+	.4byte	0x1bc3
+	.uleb128 0x31
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
@@ -4165,46 +4036,46 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x4a
-	.4byte	.LASF429
+	.uleb128 0x49
+	.4byte	.LASF422
 	.byte	0x1a
 	.2byte	0x36f
 	.byte	0x3
-	.4byte	0x1ca7
-	.uleb128 0x4b
+	.4byte	0x1b96
+	.uleb128 0x4a
 	.ascii	"ptr\000"
 	.byte	0x1a
 	.2byte	0x36f
 	.4byte	0x128
 	.byte	0
-	.uleb128 0x4c
-	.4byte	.LASF419
-	.4byte	.LASF419
+	.uleb128 0x4b
+	.4byte	.LASF412
+	.4byte	.LASF412
 	.byte	0x8
 	.2byte	0x112
-	.uleb128 0x4d
-	.4byte	.LASF420
-	.4byte	.LASF420
+	.uleb128 0x4c
+	.4byte	.LASF413
+	.4byte	.LASF413
 	.byte	0x20
 	.byte	0x85
-	.uleb128 0x4d
-	.4byte	.LASF421
-	.4byte	.LASF421
+	.uleb128 0x4c
+	.4byte	.LASF414
+	.4byte	.LASF414
 	.byte	0x20
 	.byte	0x38
-	.uleb128 0x4d
-	.4byte	.LASF422
-	.4byte	.LASF422
+	.uleb128 0x4c
+	.4byte	.LASF415
+	.4byte	.LASF415
 	.byte	0x21
 	.byte	0x13
-	.uleb128 0x4d
-	.4byte	.LASF423
-	.4byte	.LASF423
-	.byte	0x22
-	.byte	0xb
 	.uleb128 0x4c
-	.4byte	.LASF424
-	.4byte	.LASF424
+	.4byte	.LASF416
+	.4byte	.LASF416
+	.byte	0x22
+	.byte	0xb
+	.uleb128 0x4b
+	.4byte	.LASF417
+	.4byte	.LASF417
 	.byte	0x1a
 	.2byte	0x393
 	.byte	0
@@ -4662,15 +4533,6 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.byte	0
 	.uleb128 0x26
-	.uleb128 0x15
-	.byte	0x1
-	.uleb128 0x27
-	.uleb128 0x19
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x27
 	.uleb128 0x4
 	.byte	0x1
 	.uleb128 0x3
@@ -4687,7 +4549,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x28
+	.uleb128 0x27
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -4702,7 +4564,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x29
+	.uleb128 0x28
 	.uleb128 0x17
 	.byte	0x1
 	.uleb128 0x3
@@ -4717,7 +4579,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x2a
+	.uleb128 0x29
 	.uleb128 0xd
 	.byte	0
 	.uleb128 0x3
@@ -4730,7 +4592,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x2b
+	.uleb128 0x2a
 	.uleb128 0xd
 	.byte	0
 	.uleb128 0x3
@@ -4743,7 +4605,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x2c
+	.uleb128 0x2b
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -4758,7 +4620,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x2d
+	.uleb128 0x2c
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -4775,7 +4637,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x2e
+	.uleb128 0x2d
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -4800,7 +4662,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x2f
+	.uleb128 0x2e
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -4815,7 +4677,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x30
+	.uleb128 0x2f
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -4830,7 +4692,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x31
+	.uleb128 0x30
 	.uleb128 0x4109
 	.byte	0x1
 	.uleb128 0x11
@@ -4841,7 +4703,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x32
+	.uleb128 0x31
 	.uleb128 0x410a
 	.byte	0
 	.uleb128 0x2
@@ -4850,7 +4712,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x33
+	.uleb128 0x32
 	.uleb128 0x4109
 	.byte	0x1
 	.uleb128 0x11
@@ -4859,7 +4721,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x34
+	.uleb128 0x33
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -4874,7 +4736,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x35
+	.uleb128 0x34
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -4889,7 +4751,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x36
+	.uleb128 0x35
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -4904,7 +4766,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x37
+	.uleb128 0x36
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
@@ -4913,7 +4775,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x38
+	.uleb128 0x37
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -4932,7 +4794,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x38
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -4945,7 +4807,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3a
+	.uleb128 0x39
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -4960,7 +4822,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x3b
+	.uleb128 0x3a
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -4973,7 +4835,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3c
+	.uleb128 0x3b
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -4988,7 +4850,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x3d
+	.uleb128 0x3c
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x11
@@ -4999,7 +4861,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3e
+	.uleb128 0x3d
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -5016,21 +4878,21 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3f
+	.uleb128 0x3e
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x40
+	.uleb128 0x3f
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x55
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x41
+	.uleb128 0x40
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -5039,7 +4901,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x42
+	.uleb128 0x41
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x55
@@ -5048,7 +4910,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x43
+	.uleb128 0x42
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -5061,7 +4923,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x44
+	.uleb128 0x43
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -5074,19 +4936,19 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x45
+	.uleb128 0x44
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x1
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x46
+	.uleb128 0x45
 	.uleb128 0xb
 	.byte	0x1
 	.byte	0
 	.byte	0
-	.uleb128 0x47
+	.uleb128 0x46
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x3
@@ -5099,7 +4961,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x1
 	.byte	0
 	.byte	0
-	.uleb128 0x48
+	.uleb128 0x47
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -5114,7 +4976,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x49
+	.uleb128 0x48
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -5129,7 +4991,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x4a
+	.uleb128 0x49
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -5146,7 +5008,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4b
+	.uleb128 0x4a
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -5159,7 +5021,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4c
+	.uleb128 0x4b
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -5176,7 +5038,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x5
 	.byte	0
 	.byte	0
-	.uleb128 0x4d
+	.uleb128 0x4c
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -5206,7 +5068,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x55
 	.4byte	.LVL36
-	.4byte	.LFE273
+	.4byte	.LFE269
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -5231,7 +5093,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL2
-	.4byte	.LFE272
+	.4byte	.LFE268
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -5247,7 +5109,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0xea
 	.byte	0x9f
 	.4byte	.LVL4
-	.4byte	.LFE272
+	.4byte	.LFE268
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xea
@@ -5282,7 +5144,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x57
 	.4byte	.LVL46
-	.4byte	.LFE270
+	.4byte	.LFE266
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -5296,7 +5158,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x51
 	.4byte	.LVL38-1
-	.4byte	.LFE270
+	.4byte	.LFE266
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
@@ -5307,7 +5169,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x52
 	.4byte	.LVL38-1
-	.4byte	.LFE270
+	.4byte	.LFE266
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
@@ -5318,7 +5180,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x53
 	.4byte	.LVL38-1
-	.4byte	.LFE270
+	.4byte	.LFE266
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
@@ -5329,7 +5191,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL40
-	.4byte	.LFE270
+	.4byte	.LFE266
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
@@ -5368,7 +5230,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x22
 	.byte	0x9f
 	.4byte	.LVL58
-	.4byte	.LFE270
+	.4byte	.LFE266
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
@@ -5387,7 +5249,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL56
-	.4byte	.LFE270
+	.4byte	.LFE266
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
@@ -5418,7 +5280,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x30
 	.byte	0x9f
 	.4byte	.LVL58
-	.4byte	.LFE270
+	.4byte	.LFE266
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
@@ -5557,7 +5419,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL6-1
-	.4byte	.LFE268
+	.4byte	.LFE264
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -5571,7 +5433,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x51
 	.4byte	.LVL6-1
-	.4byte	.LFE268
+	.4byte	.LFE264
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
@@ -5592,7 +5454,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.sleb128 1
 	.byte	0x9f
 	.4byte	.LVL10
-	.4byte	.LFE268
+	.4byte	.LFE264
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -5606,7 +5468,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x53
 	.4byte	.LVL6-1
-	.4byte	.LFE268
+	.4byte	.LFE264
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
@@ -5617,7 +5479,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL10
-	.4byte	.LFE268
+	.4byte	.LFE264
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
@@ -5644,7 +5506,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x1
 	.byte	0x9f
 	.4byte	.LVL29
-	.4byte	.LFE268
+	.4byte	.LFE264
 	.2byte	0x6
 	.byte	0x74
 	.sleb128 0
@@ -5668,7 +5530,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.sleb128 -1
 	.byte	0x9f
 	.4byte	.LVL23
-	.4byte	.LFE268
+	.4byte	.LFE264
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 -2
@@ -5705,7 +5567,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL15
-	.4byte	.LFE268
+	.4byte	.LFE264
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
@@ -5723,7 +5585,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.sleb128 1
 	.byte	0x9f
 	.4byte	.LVL10
-	.4byte	.LFE268
+	.4byte	.LFE264
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -5752,7 +5614,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x54
 	.4byte	.LVL29
-	.4byte	.LFE268
+	.4byte	.LFE264
 	.2byte	0x3
 	.byte	0x74
 	.sleb128 -1
@@ -5765,7 +5627,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.2byte	0x1
 	.byte	0x54
 	.4byte	.LVL29
-	.4byte	.LFE268
+	.4byte	.LFE264
 	.2byte	0x3
 	.byte	0x74
 	.sleb128 -1
@@ -5800,14 +5662,14 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.2byte	0
 	.2byte	0
-	.4byte	.LFB272
-	.4byte	.LFE272-.LFB272
 	.4byte	.LFB268
 	.4byte	.LFE268-.LFB268
-	.4byte	.LFB273
-	.4byte	.LFE273-.LFB273
-	.4byte	.LFB270
-	.4byte	.LFE270-.LFB270
+	.4byte	.LFB264
+	.4byte	.LFE264-.LFB264
+	.4byte	.LFB269
+	.4byte	.LFE269-.LFB269
+	.4byte	.LFB266
+	.4byte	.LFE266-.LFB266
 	.4byte	0
 	.4byte	0
 	.section	.debug_ranges,"",%progbits
@@ -5840,14 +5702,14 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LBE46
 	.4byte	0
 	.4byte	0
-	.4byte	.LFB272
-	.4byte	.LFE272
 	.4byte	.LFB268
 	.4byte	.LFE268
-	.4byte	.LFB273
-	.4byte	.LFE273
-	.4byte	.LFB270
-	.4byte	.LFE270
+	.4byte	.LFB264
+	.4byte	.LFE264
+	.4byte	.LFB269
+	.4byte	.LFE269
+	.4byte	.LFB266
+	.4byte	.LFE266
 	.4byte	0
 	.4byte	0
 	.section	.debug_line,"",%progbits
@@ -5857,81 +5719,81 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"parent_platdata\000"
 .LASF100:
 	.ascii	"off_mem_rsvmap\000"
-.LASF183:
+.LASF184:
 	.ascii	"UCLASS_I2C_EEPROM\000"
-.LASF303:
+.LASF305:
 	.ascii	"jt_funcs\000"
-.LASF188:
+.LASF189:
 	.ascii	"UCLASS_IRQ\000"
 .LASF150:
 	.ascii	"initrd_start\000"
-.LASF182:
+.LASF183:
 	.ascii	"UCLASS_I2C\000"
 .LASF13:
 	.ascii	"sizetype\000"
-.LASF327:
+.LASF319:
 	.ascii	"net_hostname\000"
 .LASF54:
 	.ascii	"start\000"
-.LASF222:
+.LASF224:
 	.ascii	"UCLASS_SPI\000"
-.LASF300:
+.LASF302:
 	.ascii	"child\000"
-.LASF186:
+.LASF187:
 	.ascii	"UCLASS_I2S\000"
-.LASF349:
+.LASF341:
 	.ascii	"NETLOOP_RESTART\000"
-.LASF184:
+.LASF185:
 	.ascii	"UCLASS_I2C_GENERIC\000"
-.LASF196:
+.LASF198:
 	.ascii	"UCLASS_MOD_EXP\000"
-.LASF245:
+.LASF247:
 	.ascii	"UCLASS_IO_DOMAIN\000"
-.LASF257:
+.LASF259:
 	.ascii	"using_pre_serial\000"
 .LASF37:
 	.ascii	"uclass_priv\000"
-.LASF217:
+.LASF219:
 	.ascii	"UCLASS_RKNAND\000"
 .LASF159:
 	.ascii	"UCLASS_DEMO\000"
-.LASF395:
+.LASF388:
 	.ascii	"OTP_S\000"
 .LASF108:
 	.ascii	"ih_magic\000"
 .LASF46:
 	.ascii	"list_head\000"
-.LASF360:
+.LASF352:
 	.ascii	"child_pre_probe\000"
-.LASF292:
+.LASF294:
 	.ascii	"pm_ctx_phys\000"
 .LASF163:
 	.ascii	"UCLASS_TEST_PROBE\000"
-.LASF298:
+.LASF300:
 	.ascii	"full_name\000"
-.LASF241:
+.LASF243:
 	.ascii	"UCLASS_KEY\000"
 .LASF80:
 	.ascii	"bi_intfreq\000"
 .LASF11:
 	.ascii	"phys_addr_t\000"
-.LASF399:
+.LASF392:
 	.ascii	"write\000"
-.LASF236:
+.LASF238:
 	.ascii	"UCLASS_VIDEO_BRIDGE\000"
 .LASF5:
 	.ascii	"__u8\000"
-.LASF348:
+.LASF340:
 	.ascii	"NETLOOP_CONTINUE\000"
-.LASF225:
+.LASF227:
 	.ascii	"UCLASS_SPI_GENERIC\000"
-.LASF288:
+.LASF290:
 	.ascii	"malloc_base\000"
-.LASF420:
+.LASF413:
 	.ascii	"dev_read_addr_ptr\000"
 .LASF56:
 	.ascii	"flash_info_t\000"
-.LASF201:
+.LASF203:
 	.ascii	"UCLASS_PANEL\000"
 .LASF125:
 	.ascii	"comp\000"
@@ -5943,7 +5805,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"UCLASS_CROS_EC\000"
 .LASF74:
 	.ascii	"bi_dsp_freq\000"
-.LASF405:
+.LASF398:
 	.ascii	"rockchip_otp_ids\000"
 .LASF122:
 	.ascii	"image_start\000"
@@ -5951,67 +5813,67 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"UCLASS_TEST_FDT\000"
 .LASF65:
 	.ascii	"bd_info\000"
-.LASF346:
+.LASF338:
 	.ascii	"uclass_id\000"
 .LASF112:
 	.ascii	"ih_load\000"
-.LASF393:
+.LASF386:
 	.ascii	"DECOM_GZIP\000"
-.LASF307:
+.LASF309:
 	.ascii	"__dtb_dt_spl_begin\000"
-.LASF386:
+.LASF378:
 	.ascii	"pre_remove\000"
 .LASF7:
 	.ascii	"__u32\000"
 .LASF35:
 	.ascii	"priv\000"
-.LASF291:
+.LASF293:
 	.ascii	"cur_serial_dev\000"
-.LASF333:
+.LASF325:
 	.ascii	"net_tx_packet\000"
-.LASF240:
+.LASF242:
 	.ascii	"UCLASS_FG\000"
-.LASF332:
+.LASF324:
 	.ascii	"net_server_ip\000"
-.LASF428:
+.LASF421:
 	.ascii	"ofnode_union\000"
-.LASF340:
+.LASF332:
 	.ascii	"net_native_vlan\000"
-.LASF238:
+.LASF240:
 	.ascii	"UCLASS_VIDEO_CRTC\000"
 .LASF175:
 	.ascii	"UCLASS_CODEC\000"
-.LASF285:
+.LASF287:
 	.ascii	"env_buf\000"
-.LASF414:
+.LASF407:
 	.ascii	"rockchip_secure_otp_write_byte\000"
 .LASF21:
 	.ascii	"errno\000"
 .LASF15:
 	.ascii	"long int\000"
-.LASF390:
+.LASF383:
 	.ascii	"__invalid_size_argument_for_IOC\000"
 .LASF69:
 	.ascii	"bi_flashsize\000"
 .LASF29:
 	.ascii	"platdata\000"
-.LASF206:
+.LASF208:
 	.ascii	"UCLASS_PHY\000"
 .LASF93:
 	.ascii	"IRQ_STACK_START_IN\000"
 .LASF104:
 	.ascii	"size_dt_strings\000"
-.LASF235:
+.LASF237:
 	.ascii	"UCLASS_VIDEO\000"
-.LASF406:
+.LASF399:
 	.ascii	"_u_boot_list_2_driver_2_rockchip_secure_otp_v2\000"
-.LASF269:
+.LASF271:
 	.ascii	"relocaddr\000"
-.LASF377:
+.LASF369:
 	.ascii	"dev_head\000"
-.LASF427:
+.LASF420:
 	.ascii	"/home/zzz/code/u-boot\000"
-.LASF343:
+.LASF335:
 	.ascii	"net_boot_file_size\000"
 .LASF114:
 	.ascii	"ih_dcrc\000"
@@ -6021,21 +5883,21 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"UCLASS_ROOT\000"
 .LASF44:
 	.ascii	"ide_bus_offset\000"
-.LASF330:
+.LASF322:
 	.ascii	"net_server_ethaddr\000"
 .LASF82:
 	.ascii	"bi_arch_number\000"
 .LASF3:
 	.ascii	"signed char\000"
-.LASF189:
+.LASF190:
 	.ascii	"UCLASS_KEYBOARD\000"
 .LASF18:
 	.ascii	"uint8_t\000"
-.LASF365:
+.LASF357:
 	.ascii	"per_child_platdata_auto_alloc_size\000"
 .LASF45:
 	.ascii	"udevice\000"
-.LASF423:
+.LASF416:
 	.ascii	"udelay\000"
 .LASF116:
 	.ascii	"ih_arch\000"
@@ -6043,13 +5905,13 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"totalsize\000"
 .LASF109:
 	.ascii	"ih_hcrc\000"
-.LASF271:
+.LASF273:
 	.ascii	"mon_len\000"
-.LASF401:
+.LASF394:
 	.ascii	"call\000"
 .LASF124:
 	.ascii	"load\000"
-.LASF230:
+.LASF232:
 	.ascii	"UCLASS_TPM\000"
 .LASF59:
 	.ascii	"lmb_property\000"
@@ -6059,73 +5921,73 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"unsigned char\000"
 .LASF84:
 	.ascii	"bi_andr_version\000"
-.LASF417:
+.LASF410:
 	.ascii	"rockchip_secure_otp_v2_read\000"
 .LASF157:
 	.ascii	"images\000"
-.LASF244:
+.LASF246:
 	.ascii	"UCLASS_DVFS\000"
 .LASF75:
 	.ascii	"bi_ddr_freq\000"
-.LASF190:
+.LASF191:
 	.ascii	"UCLASS_LED\000"
 .LASF111:
 	.ascii	"ih_size\000"
-.LASF413:
+.LASF406:
 	.ascii	"rockchip_secure_otp_v2_capability\000"
 .LASF39:
 	.ascii	"uclass_node\000"
+.LASF195:
+	.ascii	"UCLASS_MDIO\000"
 .LASF23:
 	.ascii	"_Bool\000"
-.LASF366:
+.LASF358:
 	.ascii	"property\000"
-.LASF352:
+.LASF344:
 	.ascii	"net_state\000"
-.LASF368:
+.LASF360:
 	.ascii	"value\000"
-.LASF185:
+.LASF186:
 	.ascii	"UCLASS_I2C_MUX\000"
 .LASF14:
 	.ascii	"char\000"
 .LASF25:
 	.ascii	"_binary_u_boot_bin_start\000"
-.LASF234:
+.LASF236:
 	.ascii	"UCLASS_USB_GADGET_GENERIC\000"
-.LASF350:
+.LASF342:
 	.ascii	"NETLOOP_SUCCESS\000"
 .LASF36:
 	.ascii	"uclass\000"
-.LASF374:
+.LASF366:
 	.ascii	"p_current\000"
-.LASF376:
+.LASF368:
 	.ascii	"uc_drv\000"
-.LASF347:
+.LASF339:
 	.ascii	"net_loop_state\000"
 .LASF43:
 	.ascii	"req_seq\000"
-.LASF301:
+.LASF303:
 	.ascii	"sibling\000"
-.LASF277:
+.LASF279:
 	.ascii	"dm_root_f\000"
-.LASF314:
-	.ascii	"enetaddr\000"
 .LASF174:
 	.ascii	"UCLASS_AMP\000"
-.LASF212:
+.LASF214:
 	.ascii	"UCLASS_PWRSEQ\000"
-.LASF369:
+.LASF361:
 	.ascii	"of_offset\000"
 .LASF140:
 	.ascii	"fit_hdr_fdt\000"
-.LASF341:
+.LASF333:
 	.ascii	"net_restart_wrap\000"
-.LASF329:
+.LASF321:
 	.ascii	"net_ethaddr\000"
-.LASF410:
+.LASF403:
 	.ascii	"rockchip_secure_otp_v2_write\000"
 .LASF42:
 	.ascii	"flags\000"
-.LASF424:
+.LASF417:
 	.ascii	"malloc_simple\000"
 .LASF117:
 	.ascii	"ih_type\000"
@@ -6133,17 +5995,17 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"off_dt_struct\000"
 .LASF70:
 	.ascii	"bi_flashoffset\000"
-.LASF342:
+.LASF334:
 	.ascii	"net_boot_file_name\000"
-.LASF379:
+.LASF371:
 	.ascii	"compatible\000"
 .LASF160:
 	.ascii	"UCLASS_TEST\000"
 .LASF110:
 	.ascii	"ih_time\000"
-.LASF262:
+.LASF264:
 	.ascii	"bus_clk\000"
-.LASF213:
+.LASF215:
 	.ascii	"UCLASS_RAM\000"
 .LASF179:
 	.ascii	"UCLASS_ETH\000"
@@ -6153,17 +6015,17 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"image_info\000"
 .LASF127:
 	.ascii	"arch\000"
-.LASF264:
+.LASF266:
 	.ascii	"mem_clk\000"
-.LASF416:
+.LASF409:
 	.ascii	"temp\000"
-.LASF261:
+.LASF263:
 	.ascii	"cpu_clk\000"
 .LASF50:
 	.ascii	"select_hwpart\000"
-.LASF334:
+.LASF326:
 	.ascii	"net_rx_packets\000"
-.LASF371:
+.LASF363:
 	.ascii	"mem_malloc_start\000"
 .LASF92:
 	.ascii	"_datarelro_start_ofs\000"
@@ -6173,99 +6035,97 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"ih_ep\000"
 .LASF61:
 	.ascii	"lmb_region\000"
-.LASF426:
+.LASF419:
 	.ascii	"drivers/misc/rockchip-secure-otp-v2.c\000"
-.LASF384:
+.LASF376:
 	.ascii	"pre_probe\000"
-.LASF422:
+.LASF415:
 	.ascii	"printf\000"
-.LASF394:
+.LASF387:
 	.ascii	"DECOM_ZLIB\000"
 .LASF135:
 	.ascii	"fit_uname_os\000"
 .LASF76:
 	.ascii	"bi_bootflags\000"
-.LASF331:
+.LASF323:
 	.ascii	"net_ip\000"
-.LASF283:
+.LASF285:
 	.ascii	"fdt_size\000"
-.LASF325:
+.LASF317:
 	.ascii	"net_dns_server\000"
-.LASF345:
+.LASF337:
 	.ascii	"net_ping_ip\000"
 .LASF63:
 	.ascii	"memory\000"
 .LASF95:
 	.ascii	"fdt_header\000"
-.LASF372:
+.LASF364:
 	.ascii	"mem_malloc_end\000"
-.LASF192:
+.LASF193:
 	.ascii	"UCLASS_MAILBOX\000"
 .LASF147:
 	.ascii	"rd_end\000"
-.LASF354:
+.LASF346:
 	.ascii	"bind\000"
-.LASF272:
+.LASF274:
 	.ascii	"irq_sp\000"
 .LASF152:
 	.ascii	"cmdline_start\000"
-.LASF321:
-	.ascii	"index\000"
-.LASF260:
+.LASF262:
 	.ascii	"global_data\000"
-.LASF388:
+.LASF381:
 	.ascii	"per_device_auto_alloc_size\000"
-.LASF220:
+.LASF222:
 	.ascii	"UCLASS_SCSI\000"
-.LASF232:
+.LASF234:
 	.ascii	"UCLASS_USB_DEV_GENERIC\000"
-.LASF193:
+.LASF194:
 	.ascii	"UCLASS_MASS_STORAGE\000"
 .LASF1:
 	.ascii	"long unsigned int\000"
 .LASF168:
 	.ascii	"UCLASS_SIMPLE_BUS\000"
-.LASF304:
+.LASF306:
 	.ascii	"gd_t\000"
-.LASF326:
+.LASF318:
 	.ascii	"net_nis_domain\000"
 .LASF142:
 	.ascii	"fit_noffset_fdt\000"
-.LASF404:
+.LASF397:
 	.ascii	"rockchip_secure_otp_ops\000"
-.LASF351:
+.LASF343:
 	.ascii	"NETLOOP_FAIL\000"
-.LASF239:
+.LASF241:
 	.ascii	"UCLASS_WDT\000"
-.LASF253:
+.LASF255:
 	.ascii	"timer_reset_value\000"
-.LASF273:
+.LASF275:
 	.ascii	"start_addr_sp\000"
 .LASF71:
 	.ascii	"bi_sramstart\000"
 .LASF26:
 	.ascii	"_binary_u_boot_bin_end\000"
-.LASF274:
+.LASF276:
 	.ascii	"reloc_off\000"
 .LASF103:
 	.ascii	"boot_cpuid_phys\000"
-.LASF252:
+.LASF254:
 	.ascii	"lastinc\000"
 .LASF138:
 	.ascii	"fit_uname_rd\000"
-.LASF226:
+.LASF228:
 	.ascii	"UCLASS_SYSCON\000"
 .LASF173:
 	.ascii	"UCLASS_CPU\000"
 .LASF133:
 	.ascii	"fit_uname_cfg\000"
-.LASF221:
+.LASF223:
 	.ascii	"UCLASS_SERIAL\000"
-.LASF339:
+.LASF331:
 	.ascii	"net_our_vlan\000"
-.LASF293:
+.LASF295:
 	.ascii	"serial\000"
-.LASF355:
+.LASF347:
 	.ascii	"probe\000"
 .LASF171:
 	.ascii	"UCLASS_BLK\000"
@@ -6273,57 +6133,55 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"image_info_t\000"
 .LASF167:
 	.ascii	"UCLASS_USB_EMUL\000"
-.LASF254:
+.LASF256:
 	.ascii	"tlb_addr\000"
-.LASF205:
+.LASF207:
 	.ascii	"UCLASS_PCI_GENERIC\000"
 .LASF123:
 	.ascii	"image_len\000"
 .LASF77:
 	.ascii	"bi_ip_addr\000"
-.LASF207:
+.LASF209:
 	.ascii	"UCLASS_PINCONFIG\000"
-.LASF317:
-	.ascii	"send\000"
-.LASF228:
+.LASF230:
 	.ascii	"UCLASS_THERMAL\000"
 .LASF131:
 	.ascii	"legacy_hdr_os_copy\000"
 .LASF9:
 	.ascii	"long long int\000"
-.LASF391:
+.LASF384:
 	.ascii	"misc_mode\000"
-.LASF282:
+.LASF284:
 	.ascii	"new_fdt\000"
 .LASF22:
 	.ascii	"___strtok\000"
-.LASF344:
+.LASF336:
 	.ascii	"net_boot_file_expected_size_in_blocks\000"
-.LASF402:
+.LASF395:
 	.ascii	"rockchip_otp_v2_platdata\000"
-.LASF353:
+.LASF345:
 	.ascii	"of_match\000"
-.LASF200:
+.LASF202:
 	.ascii	"UCLASS_NVME\000"
 .LASF129:
 	.ascii	"bootm_headers\000"
 .LASF55:
 	.ascii	"protect\000"
-.LASF231:
+.LASF233:
 	.ascii	"UCLASS_USB\000"
-.LASF381:
+.LASF373:
 	.ascii	"uclass_driver\000"
-.LASF242:
+.LASF244:
 	.ascii	"UCLASS_RC\000"
-.LASF286:
+.LASF288:
 	.ascii	"timebase_h\000"
-.LASF287:
+.LASF289:
 	.ascii	"timebase_l\000"
 .LASF177:
 	.ascii	"UCLASS_DISPLAY\000"
-.LASF338:
+.LASF330:
 	.ascii	"net_null_ethaddr\000"
-.LASF267:
+.LASF269:
 	.ascii	"env_valid\000"
 .LASF34:
 	.ascii	"parent\000"
@@ -6331,119 +6189,113 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"UCLASS_PCI_EMUL\000"
 .LASF38:
 	.ascii	"parent_priv\000"
-.LASF396:
+.LASF389:
 	.ascii	"OTP_NS\000"
-.LASF243:
+.LASF245:
 	.ascii	"UCLASS_CHARGE_DISPLAY\000"
-.LASF308:
+.LASF310:
 	.ascii	"load_addr\000"
 .LASF134:
 	.ascii	"fit_hdr_os\000"
 .LASF90:
 	.ascii	"_datarelrolocal_start_ofs\000"
-.LASF415:
+.LASF408:
 	.ascii	"timeout\000"
-.LASF259:
+.LASF261:
 	.ascii	"addr\000"
-.LASF398:
+.LASF391:
 	.ascii	"read\000"
 .LASF8:
 	.ascii	"unsigned int\000"
 .LASF16:
 	.ascii	"ushort\000"
-.LASF313:
-	.ascii	"eth_device\000"
-.LASF400:
+.LASF393:
 	.ascii	"ioctl\000"
-.LASF421:
+.LASF414:
 	.ascii	"dev_read_u32_default\000"
-.LASF281:
+.LASF283:
 	.ascii	"ufdt_blob\000"
-.LASF362:
+.LASF354:
 	.ascii	"priv_auto_alloc_size\000"
-.LASF289:
+.LASF291:
 	.ascii	"malloc_limit\000"
-.LASF209:
+.LASF211:
 	.ascii	"UCLASS_PMIC\000"
 .LASF130:
 	.ascii	"legacy_hdr_os\000"
 .LASF99:
 	.ascii	"off_dt_strings\000"
-.LASF305:
+.LASF307:
 	.ascii	"monitor_flash_len\000"
-.LASF194:
+.LASF196:
 	.ascii	"UCLASS_MISC\000"
 .LASF67:
 	.ascii	"bi_memsize\000"
 .LASF24:
 	.ascii	"image_base\000"
-.LASF227:
+.LASF229:
 	.ascii	"UCLASS_SYSRESET\000"
-.LASF375:
+.LASF367:
 	.ascii	"current\000"
-.LASF181:
+.LASF182:
 	.ascii	"UCLASS_FIRMWARE\000"
-.LASF191:
+.LASF192:
 	.ascii	"UCLASS_LPC\000"
-.LASF411:
+.LASF404:
 	.ascii	"offset\000"
-.LASF187:
+.LASF188:
 	.ascii	"UCLASS_IDE\000"
-.LASF397:
+.LASF390:
 	.ascii	"misc_ops\000"
-.LASF297:
+.LASF299:
 	.ascii	"phandle\000"
-.LASF363:
+.LASF355:
 	.ascii	"platdata_auto_alloc_size\000"
-.LASF389:
+.LASF382:
 	.ascii	"per_device_platdata_auto_alloc_size\000"
 .LASF156:
 	.ascii	"bootm_headers_t\000"
 .LASF73:
 	.ascii	"bi_arm_freq\000"
-.LASF215:
+.LASF217:
 	.ascii	"UCLASS_REMOTEPROC\000"
-.LASF318:
-	.ascii	"recv\000"
 .LASF126:
 	.ascii	"type\000"
 .LASF137:
 	.ascii	"fit_hdr_rd\000"
-.LASF266:
+.LASF268:
 	.ascii	"env_addr\000"
 .LASF72:
 	.ascii	"bi_sramsize\000"
-.LASF278:
+.LASF280:
 	.ascii	"uclass_root\000"
-.LASF180:
+.LASF181:
 	.ascii	"UCLASS_GPIO\000"
-.LASF210:
+.LASF212:
 	.ascii	"UCLASS_PWM\000"
 .LASF58:
 	.ascii	"long double\000"
-.LASF268:
+.LASF270:
 	.ascii	"ram_top\000"
-.LASF295:
+.LASF297:
 	.ascii	"console_evt\000"
 .LASF146:
 	.ascii	"rd_start\000"
-.LASF211:
+.LASF213:
 	.ascii	"UCLASS_POWER_DOMAIN\000"
-.LASF214:
+.LASF216:
 	.ascii	"UCLASS_REGULATOR\000"
-.LASF310:
+.LASF312:
 	.ascii	"save_size\000"
 .LASF172:
 	.ascii	"UCLASS_CLK\000"
 .LASF31:
 	.ascii	"uclass_platdata\000"
-.LASF419:
+.LASF412:
 	.ascii	"dev_get_platdata\000"
-.LASF315:
-	.ascii	"iobase\000"
 .LASF89:
 	.ascii	"_datarel_start_ofs\000"
-.LASF256:
+.LASF258:
 	.ascii	"pre_serial\000"
 .LASF119:
 	.ascii	"ih_name\000"
@@ -6451,23 +6303,23 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"ih_os\000"
 .LASF153:
 	.ascii	"cmdline_end\000"
-.LASF335:
+.LASF327:
 	.ascii	"net_rx_packet\000"
-.LASF249:
+.LASF251:
 	.ascii	"LOGF_MAX_CATEGORIES\000"
-.LASF280:
+.LASF282:
 	.ascii	"fdt_blob\000"
-.LASF378:
+.LASF370:
 	.ascii	"udevice_id\000"
 .LASF51:
 	.ascii	"size\000"
 .LASF10:
 	.ascii	"long long unsigned int\000"
-.LASF387:
+.LASF380:
 	.ascii	"destroy\000"
 .LASF107:
 	.ascii	"image_header\000"
-.LASF367:
+.LASF359:
 	.ascii	"length\000"
 .LASF20:
 	.ascii	"__be32\000"
@@ -6475,65 +6327,61 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"bi_flashstart\000"
 .LASF136:
 	.ascii	"fit_noffset_os\000"
-.LASF195:
+.LASF197:
 	.ascii	"UCLASS_MMC\000"
-.LASF320:
-	.ascii	"write_hwaddr\000"
-.LASF248:
+.LASF250:
 	.ascii	"UCLASS_INVALID\000"
-.LASF233:
+.LASF235:
 	.ascii	"UCLASS_USB_HUB\000"
-.LASF361:
+.LASF353:
 	.ascii	"child_post_remove\000"
 .LASF41:
 	.ascii	"sibling_node\000"
-.LASF284:
+.LASF286:
 	.ascii	"of_root\000"
-.LASF407:
+.LASF400:
 	.ascii	"rockchip_secure_otp_v2_ofdata_to_platdata\000"
-.LASF412:
+.LASF405:
 	.ascii	"data_temp\000"
 .LASF57:
 	.ascii	"flash_info\000"
 .LASF101:
 	.ascii	"version\000"
-.LASF319:
-	.ascii	"halt\000"
 .LASF62:
 	.ascii	"region\000"
 .LASF105:
 	.ascii	"size_dt_struct\000"
-.LASF276:
+.LASF278:
 	.ascii	"dm_root\000"
-.LASF294:
+.LASF296:
 	.ascii	"sys_start_tick\000"
-.LASF299:
+.LASF301:
 	.ascii	"properties\000"
-.LASF408:
+.LASF401:
 	.ascii	"rockchip_secure_otp_v2_ioctl\000"
-.LASF197:
+.LASF199:
 	.ascii	"UCLASS_MTD\000"
 .LASF94:
 	.ascii	"fdt32_t\000"
-.LASF275:
+.LASF277:
 	.ascii	"new_gd\000"
-.LASF199:
+.LASF201:
 	.ascii	"UCLASS_NORTHBRIDGE\000"
 .LASF78:
 	.ascii	"bi_enetaddr\000"
-.LASF302:
+.LASF304:
 	.ascii	"mtd_info\000"
-.LASF359:
+.LASF351:
 	.ascii	"child_post_bind\000"
-.LASF311:
+.LASF313:
 	.ascii	"in_addr\000"
-.LASF336:
+.LASF328:
 	.ascii	"net_rx_packet_len\000"
-.LASF316:
+.LASF379:
 	.ascii	"init\000"
-.LASF306:
+.LASF308:
 	.ascii	"__dtb_dt_begin\000"
-.LASF216:
+.LASF218:
 	.ascii	"UCLASS_RESET\000"
 .LASF139:
 	.ascii	"fit_noffset_rd\000"
@@ -6547,99 +6395,99 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"FIQ_STACK_START\000"
 .LASF154:
 	.ascii	"verify\000"
-.LASF370:
+.LASF362:
 	.ascii	"ofnode\000"
 .LASF28:
 	.ascii	"name\000"
-.LASF202:
+.LASF204:
 	.ascii	"UCLASS_PANEL_BACKLIGHT\000"
-.LASF229:
+.LASF231:
 	.ascii	"UCLASS_TIMER\000"
-.LASF224:
+.LASF226:
 	.ascii	"UCLASS_SPI_FLASH\000"
-.LASF265:
+.LASF267:
 	.ascii	"have_console\000"
 .LASF81:
 	.ascii	"bi_busfreq\000"
 .LASF6:
 	.ascii	"short int\000"
-.LASF208:
+.LASF210:
 	.ascii	"UCLASS_PINCTRL\000"
-.LASF218:
+.LASF220:
 	.ascii	"UCLASS_RAMDISK\000"
 .LASF165:
 	.ascii	"UCLASS_I2C_EMUL\000"
-.LASF223:
+.LASF225:
 	.ascii	"UCLASS_SPMI\000"
-.LASF356:
+.LASF348:
 	.ascii	"remove\000"
 .LASF162:
 	.ascii	"UCLASS_TEST_BUS\000"
-.LASF309:
+.LASF311:
 	.ascii	"save_addr\000"
-.LASF364:
+.LASF356:
 	.ascii	"per_child_auto_alloc_size\000"
-.LASF290:
+.LASF292:
 	.ascii	"malloc_ptr\000"
-.LASF403:
+.LASF396:
 	.ascii	"secure_conf_base\000"
 .LASF151:
 	.ascii	"initrd_end\000"
-.LASF383:
+.LASF375:
 	.ascii	"pre_unbind\000"
-.LASF258:
+.LASF260:
 	.ascii	"baudrate\000"
 .LASF91:
 	.ascii	"_datarellocal_start_ofs\000"
 .LASF40:
 	.ascii	"child_head\000"
-.LASF250:
+.LASF252:
 	.ascii	"arch_global_data\000"
-.LASF418:
+.LASF411:
 	.ascii	"offset_temp\000"
-.LASF247:
+.LASF249:
 	.ascii	"UCLASS_COUNT\000"
-.LASF263:
+.LASF265:
 	.ascii	"pci_clk\000"
 .LASF49:
 	.ascii	"block_drvr\000"
 .LASF53:
 	.ascii	"flash_id\000"
-.LASF246:
+.LASF248:
 	.ascii	"UCLASS_CRYPTO\000"
-.LASF296:
+.LASF298:
 	.ascii	"device_node\000"
-.LASF270:
+.LASF272:
 	.ascii	"ram_size\000"
 .LASF145:
 	.ascii	"fit_noffset_setup\000"
 .LASF106:
 	.ascii	"working_fdt\000"
-.LASF279:
+.LASF281:
 	.ascii	"fdt_blob_kern\000"
-.LASF328:
+.LASF320:
 	.ascii	"net_root_path\000"
 .LASF178:
 	.ascii	"UCLASS_DMA\000"
 .LASF86:
 	.ascii	"bd_t\000"
-.LASF312:
+.LASF314:
 	.ascii	"s_addr\000"
-.LASF409:
+.LASF402:
 	.ascii	"request\000"
-.LASF385:
+.LASF377:
 	.ascii	"post_probe\000"
-.LASF337:
+.LASF329:
 	.ascii	"net_bcast_ethaddr\000"
 .LASF83:
 	.ascii	"bi_boot_params\000"
 .LASF19:
 	.ascii	"uint32_t\000"
-.LASF373:
+.LASF365:
 	.ascii	"mem_malloc_brk\000"
-.LASF323:
+.LASF315:
 	.ascii	"net_gateway\000"
-.LASF425:
+.LASF418:
 	.ascii	"GNU C11 6.3.1 20170404 -mthumb -mthumb-interwork -m"
 	.ascii	"abi=aapcs-linux -mno-unaligned-access -mfloat-abi=s"
 	.ascii	"oft -march=armv7-a -mtune=cortex-a9 -mfpu=vfpv3-d16"
@@ -6649,17 +6497,15 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"s -fdata-sections -fno-common -ffixed-r9\000"
 .LASF66:
 	.ascii	"bi_memstart\000"
-.LASF392:
+.LASF385:
 	.ascii	"DECOM_LZ4\000"
-.LASF237:
+.LASF239:
 	.ascii	"UCLASS_VIDEO_CONSOLE\000"
-.LASF322:
-	.ascii	"eth_current\000"
-.LASF358:
+.LASF350:
 	.ascii	"ofdata_to_platdata\000"
 .LASF64:
 	.ascii	"reserved\000"
-.LASF429:
+.LASF422:
 	.ascii	"free\000"
 .LASF85:
 	.ascii	"bi_dram\000"
@@ -6673,39 +6519,41 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"legacy_hdr_valid\000"
 .LASF60:
 	.ascii	"base\000"
-.LASF219:
+.LASF221:
 	.ascii	"UCLASS_RTC\000"
-.LASF251:
+.LASF253:
 	.ascii	"timer_rate_hz\000"
 .LASF52:
 	.ascii	"sector_count\000"
 .LASF118:
 	.ascii	"ih_comp\000"
-.LASF382:
+.LASF374:
 	.ascii	"post_bind\000"
-.LASF357:
+.LASF349:
 	.ascii	"unbind\000"
 .LASF148:
 	.ascii	"ft_addr\000"
+.LASF180:
+	.ascii	"UCLASS_ETH_PHY\000"
 .LASF4:
 	.ascii	"uchar\000"
 .LASF149:
 	.ascii	"ft_len\000"
 .LASF47:
 	.ascii	"next\000"
-.LASF380:
+.LASF372:
 	.ascii	"data\000"
-.LASF198:
+.LASF200:
 	.ascii	"UCLASS_NOP\000"
 .LASF144:
 	.ascii	"fit_uname_setup\000"
 .LASF48:
 	.ascii	"prev\000"
-.LASF203:
+.LASF205:
 	.ascii	"UCLASS_PCH\000"
-.LASF204:
+.LASF206:
 	.ascii	"UCLASS_PCI\000"
-.LASF324:
+.LASF316:
 	.ascii	"net_netmask\000"
 .LASF33:
 	.ascii	"driver_data\000"
@@ -6715,7 +6563,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"UCLASS_ADC\000"
 .LASF164:
 	.ascii	"UCLASS_SPI_EMUL\000"
-.LASF255:
+.LASF257:
 	.ascii	"tlb_size\000"
 .LASF141:
 	.ascii	"fit_uname_fdt\000"

commit bfb4edbc07fcb6d2494b7906a843a6e9404f1a4a
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue Jun 2 17:27:43 2020 +0800

    mtd: spinand: Propagate ECC information to the MTD structure
    
    This is done by default in the raw NAND core (nand_base.c) but was
    missing in the SPI-NAND core. Without these two lines the ecc_strength
    and ecc_step_size values are not exported to the user through sysfs.
    
    Fixes: 7529df465248 ("mtd: nand: Add core infrastructure to support SPI NANDs")
    Cc: stable@vger.kernel.org
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
    Signed-off-by: Richard Weinberger <richard@nod.at>
    
    Change-Id: I37f29616e1522d9ce9e9d7ec18a473c73e1d1551
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index b3033fe35d..6ded360f7f 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -1104,6 +1104,10 @@ static int spinand_init(struct spinand_device *spinand)
 
 	mtd->oobavail = ret;
 
+	/* Propagate ECC information to mtd_info */
+	mtd->ecc_strength = nand->eccreq.strength;
+	mtd->ecc_step_size = nand->eccreq.step_size;
+
 	return 0;
 
 err_cleanup_nanddev:

commit 0ebe72919971edf964c2586b3e188f9cb18c3e99
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue Jun 2 17:26:02 2020 +0800

    mtd: spinand: Do not erase the block before writing a bad block marker
    
    Currently when marking a block, we use spinand_erase_op() to erase
    the block before writing the marker to the OOB area. Doing so without
    waiting for the operation to finish can lead to the marking failing
    silently and no bad block marker being written to the flash.
    
    In fact we don't need to do an erase at all before writing the BBM.
    The ECC is disabled for raw accesses to the OOB data and we don't
    need to work around any issues with chips reporting ECC errors as it
    is known to be the case for raw NAND.
    
    Fixes: 7529df465248 ("mtd: nand: Add core infrastructure to support SPI NANDs")
    Cc: stable@vger.kernel.org
    Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
    Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Link: https://lore.kernel.org/linux-mtd/20200218100432.32433-4-frieder.schrempf@kontron.de
    
    Change-Id: Ieaa72162810105bf5d62caf2efc16a1c2ef89d6d
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index d3dc260d31..b3033fe35d 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -701,7 +701,6 @@ static int spinand_markbad(struct nand_device *nand, const struct nand_pos *pos)
 	};
 	int ret;
 
-	/* Erase block before marking it bad. */
 	ret = spinand_select_target(spinand, pos->target);
 	if (ret)
 		return ret;
@@ -710,8 +709,6 @@ static int spinand_markbad(struct nand_device *nand, const struct nand_pos *pos)
 	if (ret)
 		return ret;
 
-	spinand_erase_op(spinand, pos);
-
 	return spinand_write_page(spinand, &req);
 }
 

commit 35a88e77a0580f79f0f588de696f42097692d2de
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue Jun 2 17:23:37 2020 +0800

    mtd: spinand: Explicitly use MTD_OPS_RAW to write the bad block marker to OOB
    
    When writing the bad block marker to the OOB area the access mode
    should be set to MTD_OPS_RAW as it is done for reading the marker.
    Currently this only works because req.mode is initialized to
    MTD_OPS_PLACE_OOB (0) and spinand_write_to_cache_op() checks for
    req.mode != MTD_OPS_AUTO_OOB.
    
    Fix this by explicitly setting req.mode to MTD_OPS_RAW.
    
    Fixes: 7529df465248 ("mtd: nand: Add core infrastructure to support SPI NANDs")
    Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
    Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Link: https://lore.kernel.org/linux-mtd/20200218100432.32433-3-frieder.schrempf@kontron.de
    
    Change-Id: Id415efc0cd8d61d97d98e0340729f8bc60fc28cf
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index a7130cea99..d3dc260d31 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -697,6 +697,7 @@ static int spinand_markbad(struct nand_device *nand, const struct nand_pos *pos)
 		.ooboffs = 0,
 		.ooblen = sizeof(marker),
 		.oobbuf.out = marker,
+		.mode = MTD_OPS_RAW,
 	};
 	int ret;
 

commit d537a52df3f9ec63b1988b030e1b26a1809462a3
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue Jun 2 17:19:06 2020 +0800

    mtd: spinand: Stop using spinand->oobbuf for buffering bad block markers
    
    For reading and writing the bad block markers, spinand->oobbuf is
    currently used as a buffer for the marker bytes. During the
    underlying read and write operations to actually get/set the content
    of the OOB area, the content of spinand->oobbuf is reused and changed
    by accessing it through spinand->oobbuf and/or spinand->databuf.
    
    This is a flaw in the original design of the SPI NAND core and at the
    latest from 13c15e07eedf ("mtd: spinand: Handle the case where
    PROGRAM LOAD does not reset the cache") on, it results in not having
    the bad block marker written at all, as the spinand->oobbuf is
    cleared to 0xff after setting the marker bytes to zero.
    
    To fix it, we now just store the two bytes for the marker on the
    stack and let the read/write operations copy it from/to the page
    buffer later.
    
    Fixes: 7529df465248 ("mtd: nand: Add core infrastructure to support SPI NANDs")
    Cc: stable@vger.kernel.org
    Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
    Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Link: https://lore.kernel.org/linux-mtd/20200218100432.32433-2-frieder.schrempf@kontron.de
    
    Change-Id: I5a47981f004c60d753da382ef6d683a7da1e436b
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index 2c4a7ba2e5..a7130cea99 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -651,25 +651,18 @@ static int spinand_mtd_write(struct mtd_info *mtd, loff_t to,
 static bool spinand_isbad(struct nand_device *nand, const struct nand_pos *pos)
 {
 	struct spinand_device *spinand = nand_to_spinand(nand);
+	u8 marker[2] = { };
 	struct nand_page_io_req req = {
 		.pos = *pos,
-		.ooblen = 2,
+		.ooblen = sizeof(marker),
 		.ooboffs = 0,
-		.oobbuf.in = spinand->oobbuf,
+		.oobbuf.in = marker,
 		.mode = MTD_OPS_RAW,
 	};
-	int ret;
-
-	memset(spinand->oobbuf, 0, 2);
-	ret = spinand_select_target(spinand, pos->target);
-	if (ret)
-		return ret;
 
-	ret = spinand_read_page(spinand, &req, false);
-	if (ret)
-		return ret;
-
-	if (spinand->oobbuf[0] != 0xff || spinand->oobbuf[1] != 0xff)
+	spinand_select_target(spinand, pos->target);
+	spinand_read_page(spinand, &req, false);
+	if (marker[0] != 0xff || marker[1] != 0xff)
 		return true;
 
 	return false;
@@ -698,11 +691,12 @@ static int spinand_mtd_block_isbad(struct mtd_info *mtd, loff_t offs)
 static int spinand_markbad(struct nand_device *nand, const struct nand_pos *pos)
 {
 	struct spinand_device *spinand = nand_to_spinand(nand);
+	u8 marker[2] = { };
 	struct nand_page_io_req req = {
 		.pos = *pos,
 		.ooboffs = 0,
-		.ooblen = 2,
-		.oobbuf.out = spinand->oobbuf,
+		.ooblen = sizeof(marker),
+		.oobbuf.out = marker,
 	};
 	int ret;
 
@@ -715,11 +709,8 @@ static int spinand_markbad(struct nand_device *nand, const struct nand_pos *pos)
 	if (ret)
 		return ret;
 
-	ret = spinand_erase_op(spinand, pos);
-	if (ret)
-		return ret;
+	spinand_erase_op(spinand, pos);
 
-	memset(spinand->oobbuf, 0, 2);
 	return spinand_write_page(spinand, &req);
 }
 

commit e0242caf530c51d6795273d4352c4440f18097c3
Author: Robert Marko <robert.marko@sartura.hr>
Date:   Tue Mar 3 20:25:40 2020 +0100

    UPSTREAM: mtd: spi-nand: Import Toshiba SPI-NAND support
    
    Linux has good support for Toshiba SPI-NAND, so lets import it.
    
    Signed-off-by: Robert Marko <robert.marko@sartura.hr>
    Tested-by: Luka Kovacic <luka.kovacic@sartura.hr>
    Cc: Luka Perkov <luka.perkov@sartura.hr>
    Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    Change-Id: I70a328bf28c7e8740d818958faf749016dd9ca77
    (cherry picked from commit 89127104848cea38bac5d40e3d6973fc203e2df6)

diff --git a/drivers/mtd/nand/spi/Makefile b/drivers/mtd/nand/spi/Makefile
index dd6bacae34..6c65b187e8 100644
--- a/drivers/mtd/nand/spi/Makefile
+++ b/drivers/mtd/nand/spi/Makefile
@@ -1,4 +1,4 @@
 # SPDX-License-Identifier: GPL-2.0
 
-spinand-objs := core.o gigadevice.o macronix.o micron.o winbond.o
+spinand-objs := core.o gigadevice.o macronix.o micron.o toshiba.o winbond.o
 obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index 1e3f785321..2c4a7ba2e5 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -833,6 +833,7 @@ static const struct spinand_manufacturer *spinand_manufacturers[] = {
 	&gigadevice_spinand_manufacturer,
 	&macronix_spinand_manufacturer,
 	&micron_spinand_manufacturer,
+	&toshiba_spinand_manufacturer,
 	&winbond_spinand_manufacturer,
 };
 
diff --git a/drivers/mtd/nand/spi/toshiba.c b/drivers/mtd/nand/spi/toshiba.c
new file mode 100644
index 0000000000..571104a5d9
--- /dev/null
+++ b/drivers/mtd/nand/spi/toshiba.c
@@ -0,0 +1,191 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2018 exceet electronics GmbH
+ * Copyright (c) 2018 Kontron Electronics GmbH
+ *
+ * Author: Frieder Schrempf <frieder.schrempf@kontron.de>
+ */
+
+#ifndef __UBOOT__
+#include <malloc.h>
+#include <linux/device.h>
+#include <linux/kernel.h>
+#endif
+#include <linux/mtd/spinand.h>
+
+#define SPINAND_MFR_TOSHIBA		0x98
+#define TOSH_STATUS_ECC_HAS_BITFLIPS_T	(3 << 4)
+
+static SPINAND_OP_VARIANTS(read_cache_variants,
+		SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
+
+static SPINAND_OP_VARIANTS(write_cache_variants,
+		SPINAND_PROG_LOAD(true, 0, NULL, 0));
+
+static SPINAND_OP_VARIANTS(update_cache_variants,
+		SPINAND_PROG_LOAD(false, 0, NULL, 0));
+
+static int tc58cxgxsx_ooblayout_ecc(struct mtd_info *mtd, int section,
+				     struct mtd_oob_region *region)
+{
+	if (section > 0)
+		return -ERANGE;
+
+	region->offset = mtd->oobsize / 2;
+	region->length = mtd->oobsize / 2;
+
+	return 0;
+}
+
+static int tc58cxgxsx_ooblayout_free(struct mtd_info *mtd, int section,
+				      struct mtd_oob_region *region)
+{
+	if (section > 0)
+		return -ERANGE;
+
+	/* 2 bytes reserved for BBM */
+	region->offset = 2;
+	region->length = (mtd->oobsize / 2) - 2;
+
+	return 0;
+}
+
+static const struct mtd_ooblayout_ops tc58cxgxsx_ooblayout = {
+	.ecc = tc58cxgxsx_ooblayout_ecc,
+	.rfree = tc58cxgxsx_ooblayout_free,
+};
+
+static int tc58cxgxsx_ecc_get_status(struct spinand_device *spinand,
+				      u8 status)
+{
+	struct nand_device *nand = spinand_to_nand(spinand);
+	u8 mbf = 0;
+	struct spi_mem_op op = SPINAND_GET_FEATURE_OP(0x30, &mbf);
+
+	switch (status & STATUS_ECC_MASK) {
+	case STATUS_ECC_NO_BITFLIPS:
+		return 0;
+
+	case STATUS_ECC_UNCOR_ERROR:
+		return -EBADMSG;
+
+	case STATUS_ECC_HAS_BITFLIPS:
+	case TOSH_STATUS_ECC_HAS_BITFLIPS_T:
+		/*
+		 * Let's try to retrieve the real maximum number of bitflips
+		 * in order to avoid forcing the wear-leveling layer to move
+		 * data around if it's not necessary.
+		 */
+		if (spi_mem_exec_op(spinand->slave, &op))
+			return nand->eccreq.strength;
+
+		mbf >>= 4;
+
+		if (WARN_ON(mbf > nand->eccreq.strength || !mbf))
+			return nand->eccreq.strength;
+
+		return mbf;
+
+	default:
+		break;
+	}
+
+	return -EINVAL;
+}
+
+static const struct spinand_info toshiba_spinand_table[] = {
+	/* 3.3V 1Gb */
+	SPINAND_INFO("TC58CVG0S3", 0xC2,
+		     NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     0,
+		     SPINAND_ECCINFO(&tc58cxgxsx_ooblayout,
+				     tc58cxgxsx_ecc_get_status)),
+	/* 3.3V 2Gb */
+	SPINAND_INFO("TC58CVG1S3", 0xCB,
+		     NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     0,
+		     SPINAND_ECCINFO(&tc58cxgxsx_ooblayout,
+				     tc58cxgxsx_ecc_get_status)),
+	/* 3.3V 4Gb */
+	SPINAND_INFO("TC58CVG2S0", 0xCD,
+		     NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     0,
+		     SPINAND_ECCINFO(&tc58cxgxsx_ooblayout,
+				     tc58cxgxsx_ecc_get_status)),
+	/* 1.8V 1Gb */
+	SPINAND_INFO("TC58CYG0S3", 0xB2,
+		     NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     0,
+		     SPINAND_ECCINFO(&tc58cxgxsx_ooblayout,
+				     tc58cxgxsx_ecc_get_status)),
+	/* 1.8V 2Gb */
+	SPINAND_INFO("TC58CYG1S3", 0xBB,
+		     NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     0,
+		     SPINAND_ECCINFO(&tc58cxgxsx_ooblayout,
+				     tc58cxgxsx_ecc_get_status)),
+	/* 1.8V 4Gb */
+	SPINAND_INFO("TC58CYG2S0", 0xBD,
+		     NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     0,
+		     SPINAND_ECCINFO(&tc58cxgxsx_ooblayout,
+				     tc58cxgxsx_ecc_get_status)),
+};
+
+static int toshiba_spinand_detect(struct spinand_device *spinand)
+{
+	u8 *id = spinand->id.data;
+	int ret;
+
+	/*
+	 * Toshiba SPI NAND read ID needs a dummy byte,
+	 * so the first byte in id is garbage.
+	 */
+	if (id[1] != SPINAND_MFR_TOSHIBA)
+		return 0;
+
+	ret = spinand_match_and_init(spinand, toshiba_spinand_table,
+				     ARRAY_SIZE(toshiba_spinand_table),
+				     id[2]);
+	if (ret)
+		return ret;
+
+	return 1;
+}
+
+static const struct spinand_manufacturer_ops toshiba_spinand_manuf_ops = {
+	.detect = toshiba_spinand_detect,
+};
+
+const struct spinand_manufacturer toshiba_spinand_manufacturer = {
+	.id = SPINAND_MFR_TOSHIBA,
+	.name = "Toshiba",
+	.ops = &toshiba_spinand_manuf_ops,
+};
diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
index be01e1e82e..83eafb184e 100644
--- a/include/linux/mtd/spinand.h
+++ b/include/linux/mtd/spinand.h
@@ -204,6 +204,7 @@ struct spinand_manufacturer {
 extern const struct spinand_manufacturer gigadevice_spinand_manufacturer;
 extern const struct spinand_manufacturer macronix_spinand_manufacturer;
 extern const struct spinand_manufacturer micron_spinand_manufacturer;
+extern const struct spinand_manufacturer toshiba_spinand_manufacturer;
 extern const struct spinand_manufacturer winbond_spinand_manufacturer;
 
 /**

commit d0999afb2e5f163c24f19da9c3f71f0d58679074
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Thu Apr 23 16:00:45 2020 +0800

    clk: rockchip: rk3308: add support to set and get sfc clock
    
    Change-Id: I322471da6e50b0bad328dde015d0d7d0466cc3a9
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
index 6269146175..46288468f2 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
@@ -275,6 +275,15 @@ enum {
 	EMMC_DIV_SHIFT		= 0,
 	EMMC_DIV_MASK		= 0xff << EMMC_DIV_SHIFT,
 
+	/* CRU_CLKSEL42_CON */
+	SCLK_SFC_SEL_SHIFT	= 14,
+	SCLK_SFC_SEL_MASK	= 0x3 << SCLK_SFC_SEL_SHIFT,
+	SCLK_SFC_SEL_DPLL	= 0,
+	SCLK_SFC_SEL_VPLL0,
+	SCLK_SFC_SEL_VPLL1,
+	SCLK_SFC_DIV_SHIFT	= 0,
+	SCLK_SFC_DIV_MASK	= 0x7f << SCLK_SFC_DIV_SHIFT,
+
 	/* CRU_CLKSEL43_CON */
 	MAC_CLK_SPEED_SEL_SHIFT = 15,
 	MAC_CLK_SPEED_SEL_MASK = 1 << MAC_CLK_SPEED_SEL_SHIFT,
diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index 7d9ecc9f70..23e1254dbd 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -889,6 +889,43 @@ static ulong rk3308_rtc32k_set_clk(struct rk3308_clk_priv *priv, ulong clk_id,
 	return rk3308_rtc32k_get_clk(priv, clk_id);
 }
 
+static ulong rk3308_sclk_sfc_get_clk(struct rk3308_clk_priv *priv)
+{
+	struct rk3308_cru *cru = priv->cru;
+	u32 div, con, sel, parent;
+
+	con = readl(&cru->clksel_con[42]);
+	div = (con & SCLK_SFC_DIV_MASK) >> SCLK_SFC_DIV_SHIFT;
+	sel = (con & SCLK_SFC_SEL_MASK) >> SCLK_SFC_SEL_SHIFT;
+
+	if (sel == SCLK_SFC_SEL_DPLL)
+		parent = priv->dpll_hz;
+	else if (sel == SCLK_SFC_SEL_VPLL0)
+		parent = priv->vpll0_hz;
+	else if (sel == SCLK_SFC_SEL_VPLL1)
+		parent = priv->vpll1_hz;
+	else
+		return -EINVAL;
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rk3308_sclk_sfc_set_clk(struct rk3308_clk_priv *priv, uint hz)
+{
+	struct rk3308_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->vpll0_hz, hz);
+	assert(src_clk_div - 1 <= 127);
+
+	rk_clrsetreg(&cru->clksel_con[42],
+		     SCLK_SFC_SEL_MASK | SCLK_SFC_DIV_MASK,
+		     SCLK_SFC_SEL_VPLL0 << SCLK_SFC_SEL_SHIFT |
+		     (src_clk_div - 1) << SCLK_SFC_DIV_SHIFT);
+
+	return rk3308_sclk_sfc_get_clk(priv);
+}
+
 static ulong rk3308_clk_get_rate(struct clk *clk)
 {
 	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
@@ -965,6 +1002,9 @@ static ulong rk3308_clk_get_rate(struct clk *clk)
 	case SCLK_RTC32K:
 		rate = rk3308_rtc32k_get_clk(priv, clk->id);
 		break;
+	case SCLK_SFC:
+		rate = rk3308_sclk_sfc_get_clk(priv);
+		break;
 	default:
 		return -ENOENT;
 	}
@@ -1046,6 +1086,9 @@ static ulong rk3308_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_RTC32K:
 		ret = rk3308_rtc32k_set_clk(priv, clk->id, rate);
 		break;
+	case SCLK_SFC:
+		ret = rk3308_sclk_sfc_set_clk(priv, rate);
+		break;
 	default:
 		return -ENOENT;
 	}

commit d47b686da888df954418ee16980083a297e58f37
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Tue Jun 2 16:08:37 2020 +0800

    clk: rockchip: rv1126: Add support to get dpll rate
    
    Change-Id: Icd7c40235d4627befc216812bfdcb288790e63e3
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rv1126.c b/drivers/clk/rockchip/clk_rv1126.c
index 230378055b..a1994216ac 100644
--- a/drivers/clk/rockchip/clk_rv1126.c
+++ b/drivers/clk/rockchip/clk_rv1126.c
@@ -1577,6 +1577,10 @@ static ulong rv1126_clk_get_rate(struct clk *clk)
 		rate = rockchip_pll_get_rate(&rv1126_pll_clks[HPLL], priv->cru,
 					     HPLL);
 		break;
+	case PLL_DPLL:
+		rate = rockchip_pll_get_rate(&rv1126_pll_clks[DPLL], priv->cru,
+					     DPLL);
+		break;
 	case HCLK_PDCORE_NIU:
 		rate = rv1126_pdcore_get_clk(priv);
 		break;

commit 664ab5ca74f3bc9d2f1ece5cd65b74712c870f25
Author: David Wu <david.wu@rock-chips.com>
Date:   Mon Jun 1 18:05:04 2020 +0800

    configs: rv1126: Enable GMAC
    
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Change-Id: I9cce5c1f8e5488365c6e1c14d27e528fa0e952e8

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index 2c20b5e986..b647c456bc 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -58,7 +58,8 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
+CONFIG_CMD_TFTP_BOOTM=y
+CONFIG_CMD_TFTP_FLASH=y
 # CONFIG_CMD_NFS is not set
 # CONFIG_CMD_MISC is not set
 CONFIG_CMD_MTD_BLK=y
@@ -104,6 +105,10 @@ CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SPI_FLASH_MTD=y
+CONFIG_DM_ETH=y
+CONFIG_DM_ETH_PHY=y
+CONFIG_DWC_ETH_QOS=y
+CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_NANENG_USB2=y
 CONFIG_PINCTRL=y

commit 225d5104202ac399a6aa2672c8ab58ac213cb69c
Author: David Wu <david.wu@rock-chips.com>
Date:   Mon Jun 1 14:17:55 2020 +0800

    configs: rv1126_common: reserve 1M nocache memory
    
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Change-Id: Ibc82c3dd0a19c2ae5a7997fda077f8cfea830abf

diff --git a/include/configs/rv1126_common.h b/include/configs/rv1126_common.h
index 933917f3f0..9d70795fb8 100644
--- a/include/configs/rv1126_common.h
+++ b/include/configs/rv1126_common.h
@@ -50,6 +50,7 @@
 #define CONFIG_SYS_SDRAM_BASE		0
 #define SDRAM_MAX_SIZE			0xfd000000
 
+#define CONFIG_SYS_NONCACHED_MEMORY    (1 << 20)       /* 1 MiB */
 #ifndef CONFIG_SPL_BUILD
 
 /* usb mass storage */

commit 63a2faadfe67f11b12c7a2e177e24893f284e46f
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Jun 2 17:49:16 2020 +0800

    net: dwc_eth_qos: Fix compile error for gpio
    
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Change-Id: Ife092cc2aca2c359fc465058e44ca645afbc8114

diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index 70090c7abd..ac78da8eac 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -38,7 +38,6 @@
 #include <phy.h>
 #include <reset.h>
 #include <wait_bit.h>
-#include <asm/gpio.h>
 #include <asm/io.h>
 #include <eth_phy.h>
 #ifdef CONFIG_ARCH_IMX8M
diff --git a/drivers/net/dwc_eth_qos.h b/drivers/net/dwc_eth_qos.h
index 39f8452c17..d0d9735ac8 100644
--- a/drivers/net/dwc_eth_qos.h
+++ b/drivers/net/dwc_eth_qos.h
@@ -6,6 +6,7 @@
 #ifndef _DWC_ETH_QOS_H
 #define _DWC_ETH_QOS_H
 
+#include <asm/gpio.h>
 #include <reset.h>
 
 #define EQOS_MAC_RXQ_CTRL0_RXQ0EN_NOT_ENABLED		0

commit dcfb333ad87c1687624bb1310c76574977aee637
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat May 9 19:27:05 2020 +0800

    net: gmac_rockchip: Add RV1126 gmac support
    
    This Soc is different from the previous Socs, need to
    define eqos_config, and follow the dwc_eth_qos driver
    process.
    
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Change-Id: I4a1c1605dd46ed31fb7ca15c7c26572739f636ec

diff --git a/drivers/net/gmac_rockchip.c b/drivers/net/gmac_rockchip.c
index efb583f4a0..2e9dab280f 100644
--- a/drivers/net/gmac_rockchip.c
+++ b/drivers/net/gmac_rockchip.c
@@ -16,6 +16,7 @@
 #include <asm/arch/clock.h>
 #include <asm/arch/hardware.h>
 #ifdef CONFIG_DWC_ETH_QOS
+#include <asm/arch/grf_rv1126.h>
 #include "dwc_eth_qos.h"
 #else
 #include <asm/arch/grf_px30.h>
@@ -417,6 +418,43 @@ static int rv1108_set_rmii_speed(struct rockchip_eth_dev *dev)
 
 	return 0;
 }
+#else
+static int rv1126_set_rgmii_speed(struct rockchip_eth_dev *dev)
+{
+	struct eqos_priv *priv = &dev->eqos;
+	struct clk clk_speed;
+	int ret;
+
+	ret = clk_get_by_name(priv->phy->dev, "clk_mac_speed",
+			      &clk_speed);
+	if (ret) {
+			printf("%s~(ret=%d):\n", __func__, ret);
+		return ret;
+	}
+
+	switch ( priv->phy->speed) {
+	case 10:
+		ret = clk_set_rate(&clk_speed, 2500000);
+		if (ret)
+			return ret;
+		break;
+	case 100:
+		ret = clk_set_rate(&clk_speed, 25000000);
+		if (ret)
+			return ret;
+		break;
+	case 1000:
+		ret = clk_set_rate(&clk_speed, 125000000);
+		if (ret)
+			return ret;
+		break;
+	default:
+		debug("Unknown phy speed: %d\n", priv->phy->speed);
+		return -EINVAL;
+	}
+
+	return 0;
+}
 #endif
 
 #ifndef CONFIG_DWC_ETH_QOS
@@ -673,6 +711,73 @@ static void rv1108_gmac_set_to_rmii(struct gmac_rockchip_platdata *pdata)
 		     RV1108_GMAC_PHY_INTF_SEL_MASK,
 		     RV1108_GMAC_PHY_INTF_SEL_RMII);
 }
+#else
+static void rv1126_set_to_rgmii(struct gmac_rockchip_platdata *pdata)
+{
+	struct rv1126_grf *grf;
+
+	enum {
+		RV1126_GMAC_PHY_INTF_SEL_SHIFT = 4,
+		RV1126_GMAC_PHY_INTF_SEL_MASK  = GENMASK(6, 4),
+		RV1126_GMAC_PHY_INTF_SEL_RGMII = BIT(4),
+
+		RV1126_RXCLK_M1_DLY_ENA_GMAC_MASK = BIT(3),
+		RV1126_RXCLK_M1_DLY_ENA_GMAC_DISABLE = 0,
+		RV1126_RXCLK_M1_DLY_ENA_GMAC_ENABLE = BIT(3),
+
+		RV1126_TXCLK_M1_DLY_ENA_GMAC_MASK = BIT(2),
+		RV1126_TXCLK_M1_DLY_ENA_GMAC_DISABLE = 0,
+		RV1126_TXCLK_M1_DLY_ENA_GMAC_ENABLE = BIT(2),
+
+		RV1126_RXCLK_M0_DLY_ENA_GMAC_MASK = BIT(1),
+		RV1126_RXCLK_M0_DLY_ENA_GMAC_DISABLE = 0,
+		RV1126_RXCLK_M0_DLY_ENA_GMAC_ENABLE = BIT(1),
+
+		RV1126_TXCLK_M0_DLY_ENA_GMAC_MASK = BIT(0),
+		RV1126_TXCLK_M0_DLY_ENA_GMAC_DISABLE = 0,
+		RV1126_TXCLK_M0_DLY_ENA_GMAC_ENABLE = BIT(0),
+	};
+	enum {
+		RV1126_M0_CLK_RX_DL_CFG_GMAC_SHIFT = 0x8,
+		RV1126_M0_CLK_RX_DL_CFG_GMAC_MASK = GENMASK(14, 8),
+
+		RV1126_M0_CLK_TX_DL_CFG_GMAC_SHIFT = 0x0,
+		RV1126_M0_CLK_TX_DL_CFG_GMAC_MASK = GENMASK(6, 0),
+	};
+	enum {
+		RV1126_M1_CLK_RX_DL_CFG_GMAC_SHIFT = 0x8,
+		RV1126_M1_CLK_RX_DL_CFG_GMAC_MASK = GENMASK(14, 8),
+
+		RV1126_M1_CLK_TX_DL_CFG_GMAC_SHIFT = 0x0,
+		RV1126_M1_CLK_TX_DL_CFG_GMAC_MASK = GENMASK(6, 0),
+	};
+
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
+	rk_clrsetreg(&grf->mac_con0,
+		     RV1126_TXCLK_M0_DLY_ENA_GMAC_MASK |
+		     RV1126_RXCLK_M0_DLY_ENA_GMAC_MASK |
+		     RV1126_TXCLK_M1_DLY_ENA_GMAC_MASK |
+		     RV1126_RXCLK_M1_DLY_ENA_GMAC_MASK |
+		     RV1126_GMAC_PHY_INTF_SEL_MASK,
+		     RV1126_TXCLK_M0_DLY_ENA_GMAC_ENABLE |
+		     RV1126_RXCLK_M0_DLY_ENA_GMAC_ENABLE |
+		     RV1126_TXCLK_M1_DLY_ENA_GMAC_ENABLE |
+		     RV1126_RXCLK_M1_DLY_ENA_GMAC_ENABLE |
+		     RV1126_GMAC_PHY_INTF_SEL_RGMII);
+
+	rk_clrsetreg(&grf->mac_con1,
+		     RV1126_M0_CLK_RX_DL_CFG_GMAC_MASK |
+		     RV1126_M0_CLK_TX_DL_CFG_GMAC_MASK,
+		     pdata->rx_delay << RV1126_M0_CLK_RX_DL_CFG_GMAC_SHIFT |
+		     pdata->tx_delay << RV1126_M0_CLK_TX_DL_CFG_GMAC_SHIFT);
+
+	rk_clrsetreg(&grf->mac_con2,
+		     RV1126_M1_CLK_RX_DL_CFG_GMAC_MASK |
+		     RV1126_M1_CLK_TX_DL_CFG_GMAC_MASK,
+		     pdata->rx_delay << RV1126_M1_CLK_RX_DL_CFG_GMAC_SHIFT |
+		     pdata->tx_delay << RV1126_M1_CLK_TX_DL_CFG_GMAC_SHIFT);
+}
 #endif
 
 static int gmac_rockchip_probe(struct udevice *dev)
@@ -894,6 +999,20 @@ const struct rk_gmac_ops rv1108_gmac_ops = {
 	.fix_mac_speed = rv1108_set_rmii_speed,
 	.set_to_rmii = rv1108_gmac_set_to_rmii,
 };
+#else
+const struct rk_gmac_ops rv1126_gmac_ops = {
+	.config = {
+		.reg_access_always_ok = false,
+		.mdio_wait = 10000,
+		.swr_wait = 200,
+		.config_mac = EQOS_MAC_RXQ_CTRL0_RXQ0EN_NOT_ENABLED,
+		.config_mac_mdio = EQOS_MAC_MDIO_ADDRESS_CR_100_150,
+		.ops = &eqos_rockchip_ops
+	},
+
+	.fix_mac_speed = rv1126_set_rgmii_speed,
+	.set_to_rgmii = rv1126_set_to_rgmii,
+};
 #endif
 
 static const struct udevice_id rockchip_gmac_ids[] = {
@@ -916,6 +1035,9 @@ static const struct udevice_id rockchip_gmac_ids[] = {
 	  .data = (ulong)&rk3399_gmac_ops },
 	{ .compatible = "rockchip,rv1108-gmac",
 	  .data = (ulong)&rv1108_gmac_ops },
+#else
+	{ .compatible = "rockchip,rv1126-gmac",
+	  .data = (ulong)&rv1126_gmac_ops },
 #endif
 	{ }
 };

commit 65dd574d8d6e68c77ecaff63e096d28625764c50
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat May 9 19:23:24 2020 +0800

    net: dwc_eth_qos: Add EQOS_MAC_MDIO_ADDRESS_CR_100_150 for Rockchip
    
    The Rockchip CSR clock range is from 100M to 150M, add
    EQOS_MAC_MDIO_ADDRESS_CR_100_150.
    
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Change-Id: Ib60f306cb9e8abec9557e92a6d04d76a7071b9ea

diff --git a/drivers/net/dwc_eth_qos.h b/drivers/net/dwc_eth_qos.h
index def2706271..39f8452c17 100644
--- a/drivers/net/dwc_eth_qos.h
+++ b/drivers/net/dwc_eth_qos.h
@@ -12,10 +12,10 @@
 #define EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_DCB		2
 #define EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_AV		1
 
+#define EQOS_MAC_MDIO_ADDRESS_CR_100_150		1
 #define EQOS_MAC_MDIO_ADDRESS_CR_20_35			2
 #define EQOS_MAC_MDIO_ADDRESS_CR_250_300		5
 
-
 struct eqos_config {
 	bool reg_access_always_ok;
 	int mdio_wait;

commit fc99c7ab0358f90c533f152c5a2e7a6bb1f4e7bf
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat May 9 19:11:23 2020 +0800

    net: dwc_eth_qos: Add eqos_rockchip_ops
    
    The eqos_rockchip_ops is simillar to eqos_stm32_ops, and
    export the eqos_rockchip_ops to use.
    
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Change-Id: I214b0b2fbe04a139de911435c4abf224264f5495

diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index 2ded1dd30c..70090c7abd 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -2153,6 +2153,22 @@ struct eqos_config eqos_imx_config = {
 	.ops = &eqos_imx_ops
 };
 
+struct eqos_ops eqos_rockchip_ops = {
+	.eqos_inval_desc = eqos_inval_desc_generic,
+	.eqos_flush_desc = eqos_flush_desc_generic,
+	.eqos_inval_buffer = eqos_inval_buffer_generic,
+	.eqos_flush_buffer = eqos_flush_buffer_generic,
+	.eqos_probe_resources = eqos_probe_resources_stm32,
+	.eqos_remove_resources = eqos_remove_resources_stm32,
+	.eqos_stop_resets = eqos_stop_resets_stm32,
+	.eqos_start_resets = eqos_start_resets_stm32,
+	.eqos_calibrate_pads = eqos_calibrate_pads_stm32,
+	.eqos_disable_calibration = eqos_disable_calibration_stm32,
+	.eqos_set_tx_clk_speed = eqos_set_tx_clk_speed_stm32,
+	.eqos_get_tick_clk_rate = eqos_get_tick_clk_rate_stm32,
+	.eqos_get_interface = eqos_get_interface_stm32
+};
+
 static const struct udevice_id eqos_ids[] = {
 	{
 		.compatible = "nvidia,tegra186-eqos",
diff --git a/drivers/net/dwc_eth_qos.h b/drivers/net/dwc_eth_qos.h
index 3125a301f0..def2706271 100644
--- a/drivers/net/dwc_eth_qos.h
+++ b/drivers/net/dwc_eth_qos.h
@@ -84,4 +84,6 @@ int eqos_recv(struct udevice *dev, int flags, uchar **packetp);
 int eqos_free_pkt(struct udevice *dev, uchar *packet, int length);
 int eqos_write_hwaddr(struct udevice *dev);
 
+extern struct eqos_ops eqos_rockchip_ops;
+
 #endif

commit 6f0a52e9525c0c82bd95a1d5f21d9816c04bd977
Author: David Wu <david.wu@rock-chips.com>
Date:   Thu Apr 30 17:38:35 2020 +0800

    net: gmac_rockchip: Add dwc_eth_qos support
    
    Change the original data structure so that Rockchip's Soc
    gmac controller can support the designware.c and dwc_eth_qos.c
    drivers, a Soc can only support one.
    
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Change-Id: I313674274fc2eddb7717ba76c537cd668d6a492b

diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index f58fbfc4ab..5bb8129cfc 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -276,7 +276,7 @@ config PIC32_ETH
 
 config GMAC_ROCKCHIP
 	bool "Rockchip Synopsys Designware Ethernet MAC"
-	depends on DM_ETH && ETH_DESIGNWARE
+	depends on DM_ETH && (ETH_DESIGNWARE || DWC_ETH_QOS)
 	help
 	  This driver provides Rockchip SoCs network support based on the
 	  Synopsys Designware driver.
diff --git a/drivers/net/gmac_rockchip.c b/drivers/net/gmac_rockchip.c
index 9007e4cdac..efb583f4a0 100644
--- a/drivers/net/gmac_rockchip.c
+++ b/drivers/net/gmac_rockchip.c
@@ -15,6 +15,9 @@
 #include <asm/arch/periph.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/hardware.h>
+#ifdef CONFIG_DWC_ETH_QOS
+#include "dwc_eth_qos.h"
+#else
 #include <asm/arch/grf_px30.h>
 #include <asm/arch/grf_rk1808.h>
 #include <asm/arch/grf_rk322x.h>
@@ -24,26 +27,42 @@
 #include <asm/arch/grf_rk3368.h>
 #include <asm/arch/grf_rk3399.h>
 #include <asm/arch/grf_rv1108.h>
-#include <dm/pinctrl.h>
-#include <dt-bindings/clock/rk3288-cru.h>
 #include "designware.h"
+#include <dt-bindings/clock/rk3288-cru.h>
+#endif
+#include <dm/pinctrl.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
+struct rockchip_eth_dev {
+#ifdef CONFIG_DWC_ETH_QOS
+	struct eqos_priv eqos;
+#else
+	struct dw_eth_dev dw;
+#endif
+};
+
 /*
  * Platform data for the gmac
  *
  * dw_eth_pdata: Required platform data for designware driver (must be first)
  */
 struct gmac_rockchip_platdata {
+#ifndef CONFIG_DWC_ETH_QOS
 	struct dw_eth_pdata dw_eth_pdata;
+#else
+	struct eth_pdata eth_pdata;
+#endif
 	bool clock_input;
 	int tx_delay;
 	int rx_delay;
 };
 
 struct rk_gmac_ops {
-	int (*fix_mac_speed)(struct dw_eth_dev *priv);
+#ifdef CONFIG_DWC_ETH_QOS
+	const struct eqos_config config;
+#endif
+	int (*fix_mac_speed)(struct rockchip_eth_dev *dev);
 	void (*set_to_rmii)(struct gmac_rockchip_platdata *pdata);
 	void (*set_to_rgmii)(struct gmac_rockchip_platdata *pdata);
 };
@@ -81,11 +100,17 @@ static int gmac_rockchip_ofdata_to_platdata(struct udevice *dev)
 	if (pdata->rx_delay == -ENOENT)
 		pdata->rx_delay = dev_read_u32_default(dev, "rx-delay", 0x10);
 
+#ifdef CONFIG_DWC_ETH_QOS
+	return 0;
+#else
 	return designware_eth_ofdata_to_platdata(dev);
+#endif
 }
 
-static int px30_gmac_fix_mac_speed(struct dw_eth_dev *priv)
+#ifndef CONFIG_DWC_ETH_QOS
+static int px30_gmac_fix_mac_speed(struct rockchip_eth_dev *dev)
 {
+	struct dw_eth_dev *priv = &dev->dw;
 	struct px30_grf *grf;
 	struct clk clk_speed;
 	int speed, ret;
@@ -125,8 +150,9 @@ static int px30_gmac_fix_mac_speed(struct dw_eth_dev *priv)
 	return 0;
 }
 
-static int rk1808_gmac_fix_mac_speed(struct dw_eth_dev *priv)
+static int rk1808_gmac_fix_mac_speed(struct rockchip_eth_dev *dev)
 {
+	struct dw_eth_dev *priv = &dev->dw;
 	struct clk clk_speed;
 	int ret;
 
@@ -159,8 +185,9 @@ static int rk1808_gmac_fix_mac_speed(struct dw_eth_dev *priv)
 	return 0;
 }
 
-static int rk3228_gmac_fix_mac_speed(struct dw_eth_dev *priv)
+static int rk3228_gmac_fix_mac_speed(struct rockchip_eth_dev *dev)
 {
+	struct dw_eth_dev *priv = &dev->dw;
 	struct rk322x_grf *grf;
 	int clk;
 	enum {
@@ -192,8 +219,9 @@ static int rk3228_gmac_fix_mac_speed(struct dw_eth_dev *priv)
 	return 0;
 }
 
-static int rk3288_gmac_fix_mac_speed(struct dw_eth_dev *priv)
+static int rk3288_gmac_fix_mac_speed(struct rockchip_eth_dev *dev)
 {
+	struct dw_eth_dev *priv = &dev->dw;
 	struct rk3288_grf *grf;
 	int clk;
 
@@ -218,8 +246,9 @@ static int rk3288_gmac_fix_mac_speed(struct dw_eth_dev *priv)
 	return 0;
 }
 
-static int rk3308_gmac_fix_mac_speed(struct dw_eth_dev *priv)
+static int rk3308_gmac_fix_mac_speed(struct rockchip_eth_dev *dev)
 {
+	struct dw_eth_dev *priv = &dev->dw;
 	struct rk3308_grf *grf;
 	struct clk clk_speed;
 	int speed, ret;
@@ -259,8 +288,9 @@ static int rk3308_gmac_fix_mac_speed(struct dw_eth_dev *priv)
 	return 0;
 }
 
-static int rk3328_gmac_fix_mac_speed(struct dw_eth_dev *priv)
+static int rk3328_gmac_fix_mac_speed(struct rockchip_eth_dev *dev)
 {
+	struct dw_eth_dev *priv = &dev->dw;
 	struct rk3328_grf_regs *grf;
 	int clk;
 	enum {
@@ -292,8 +322,9 @@ static int rk3328_gmac_fix_mac_speed(struct dw_eth_dev *priv)
 	return 0;
 }
 
-static int rk3368_gmac_fix_mac_speed(struct dw_eth_dev *priv)
+static int rk3368_gmac_fix_mac_speed(struct rockchip_eth_dev *dev)
 {
+	struct dw_eth_dev *priv = &dev->dw;
 	struct rk3368_grf *grf;
 	int clk;
 	enum {
@@ -324,8 +355,9 @@ static int rk3368_gmac_fix_mac_speed(struct dw_eth_dev *priv)
 	return 0;
 }
 
-static int rk3399_gmac_fix_mac_speed(struct dw_eth_dev *priv)
+static int rk3399_gmac_fix_mac_speed(struct rockchip_eth_dev *dev)
 {
+	struct dw_eth_dev *priv = &dev->dw;
 	struct rk3399_grf_regs *grf;
 	int clk;
 
@@ -350,8 +382,9 @@ static int rk3399_gmac_fix_mac_speed(struct dw_eth_dev *priv)
 	return 0;
 }
 
-static int rv1108_set_rmii_speed(struct dw_eth_dev *priv)
+static int rv1108_set_rmii_speed(struct rockchip_eth_dev *dev)
 {
+	struct dw_eth_dev *priv = &dev->dw;
 	struct rv1108_grf *grf;
 	int clk, speed;
 	enum {
@@ -384,7 +417,9 @@ static int rv1108_set_rmii_speed(struct dw_eth_dev *priv)
 
 	return 0;
 }
+#endif
 
+#ifndef CONFIG_DWC_ETH_QOS
 static void px30_gmac_set_to_rmii(struct gmac_rockchip_platdata *pdata)
 {
 	struct px30_grf *grf;
@@ -638,18 +673,31 @@ static void rv1108_gmac_set_to_rmii(struct gmac_rockchip_platdata *pdata)
 		     RV1108_GMAC_PHY_INTF_SEL_MASK,
 		     RV1108_GMAC_PHY_INTF_SEL_RMII);
 }
+#endif
 
 static int gmac_rockchip_probe(struct udevice *dev)
 {
 	struct gmac_rockchip_platdata *pdata = dev_get_platdata(dev);
 	struct rk_gmac_ops *ops =
 		(struct rk_gmac_ops *)dev_get_driver_data(dev);
-	struct dw_eth_pdata *dw_pdata = dev_get_platdata(dev);
-	struct eth_pdata *eth_pdata = &dw_pdata->eth_pdata;
+#ifdef CONFIG_DWC_ETH_QOS
+	struct eqos_config *config;
+#else
+	struct dw_eth_pdata *dw_pdata;
+#endif
+	struct eth_pdata *eth_pdata;
 	struct clk clk;
 	ulong rate;
 	int ret;
 
+#ifdef CONFIG_DWC_ETH_QOS
+	eth_pdata = &pdata->eth_pdata;
+	config = (struct eqos_config *)&ops->config;
+	eth_pdata->phy_interface = config->ops->eqos_get_interface(dev);
+#else
+	dw_pdata = &pdata->dw_eth_pdata;
+	eth_pdata = &dw_pdata->eth_pdata;
+#endif
 	/* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
 	ret = clk_set_defaults(dev);
 	if (ret)
@@ -700,39 +748,108 @@ static int gmac_rockchip_probe(struct udevice *dev)
 		return -ENXIO;
 	}
 
+#ifdef CONFIG_DWC_ETH_QOS
+	return eqos_probe(dev);
+#else
 	return designware_eth_probe(dev);
+#endif
+}
+
+static int gmac_rockchip_eth_write_hwaddr(struct udevice *dev)
+{
+#if defined(CONFIG_DWC_ETH_QOS)
+	return eqos_write_hwaddr(dev);
+#else
+	return designware_eth_write_hwaddr(dev);
+#endif
+}
+
+static int gmac_rockchip_eth_free_pkt(struct udevice *dev, uchar *packet,
+				      int length)
+{
+#ifdef CONFIG_DWC_ETH_QOS
+	return eqos_free_pkt(dev, packet, length);
+#else
+	return designware_eth_free_pkt(dev, packet, length);
+#endif
+}
+
+static int gmac_rockchip_eth_send(struct udevice *dev, void *packet,
+				  int length)
+{
+#ifdef CONFIG_DWC_ETH_QOS
+	return eqos_send(dev, packet, length);
+#else
+	return designware_eth_send(dev, packet, length);
+#endif
+}
+
+static int gmac_rockchip_eth_recv(struct udevice *dev, int flags,
+				  uchar **packetp)
+{
+#ifdef CONFIG_DWC_ETH_QOS
+	return eqos_recv(dev, flags, packetp);
+#else
+	return designware_eth_recv(dev, flags, packetp);
+#endif
 }
 
 static int gmac_rockchip_eth_start(struct udevice *dev)
 {
-	struct eth_pdata *pdata = dev_get_platdata(dev);
-	struct dw_eth_dev *priv = dev_get_priv(dev);
+	struct rockchip_eth_dev *priv = dev_get_priv(dev);
 	struct rk_gmac_ops *ops =
 		(struct rk_gmac_ops *)dev_get_driver_data(dev);
+#ifndef CONFIG_DWC_ETH_QOS
+	struct gmac_rockchip_platdata *pdata = dev_get_platdata(dev);
+	struct dw_eth_pdata *dw_pdata;
+	struct eth_pdata *eth_pdata;
+#endif
 	int ret;
 
-	ret = designware_eth_init(priv, pdata->enetaddr);
+#ifdef CONFIG_DWC_ETH_QOS
+	ret = eqos_init(dev);
+#else
+	dw_pdata = &pdata->dw_eth_pdata;
+	eth_pdata = &dw_pdata->eth_pdata;
+	ret = designware_eth_init((struct dw_eth_dev *)priv,
+				  eth_pdata->enetaddr);
+#endif
 	if (ret)
 		return ret;
 	ret = ops->fix_mac_speed(priv);
 	if (ret)
 		return ret;
-	ret = designware_eth_enable(priv);
+
+#ifdef CONFIG_DWC_ETH_QOS
+	eqos_enable(dev);
+#else
+	ret = designware_eth_enable((struct dw_eth_dev *)priv);
 	if (ret)
 		return ret;
+#endif
 
 	return 0;
 }
 
+static void gmac_rockchip_eth_stop(struct udevice *dev)
+{
+#ifdef CONFIG_DWC_ETH_QOS
+	eqos_stop(dev);
+#else
+	designware_eth_stop(dev);
+#endif
+}
+
 const struct eth_ops gmac_rockchip_eth_ops = {
 	.start			= gmac_rockchip_eth_start,
-	.send			= designware_eth_send,
-	.recv			= designware_eth_recv,
-	.free_pkt		= designware_eth_free_pkt,
-	.stop			= designware_eth_stop,
-	.write_hwaddr		= designware_eth_write_hwaddr,
+	.send			= gmac_rockchip_eth_send,
+	.recv			= gmac_rockchip_eth_recv,
+	.free_pkt		= gmac_rockchip_eth_free_pkt,
+	.stop			= gmac_rockchip_eth_stop,
+	.write_hwaddr		= gmac_rockchip_eth_write_hwaddr,
 };
 
+#ifndef CONFIG_DWC_ETH_QOS
 const struct rk_gmac_ops px30_gmac_ops = {
 	.fix_mac_speed = px30_gmac_fix_mac_speed,
 	.set_to_rmii = px30_gmac_set_to_rmii,
@@ -777,8 +894,10 @@ const struct rk_gmac_ops rv1108_gmac_ops = {
 	.fix_mac_speed = rv1108_set_rmii_speed,
 	.set_to_rmii = rv1108_gmac_set_to_rmii,
 };
+#endif
 
 static const struct udevice_id rockchip_gmac_ids[] = {
+#ifndef CONFIG_DWC_ETH_QOS
 	{ .compatible = "rockchip,px30-gmac",
 	  .data = (ulong)&px30_gmac_ops },
 	{ .compatible = "rockchip,rk1808-gmac",
@@ -797,6 +916,7 @@ static const struct udevice_id rockchip_gmac_ids[] = {
 	  .data = (ulong)&rk3399_gmac_ops },
 	{ .compatible = "rockchip,rv1108-gmac",
 	  .data = (ulong)&rv1108_gmac_ops },
+#endif
 	{ }
 };
 
@@ -807,7 +927,7 @@ U_BOOT_DRIVER(eth_gmac_rockchip) = {
 	.ofdata_to_platdata = gmac_rockchip_ofdata_to_platdata,
 	.probe	= gmac_rockchip_probe,
 	.ops	= &gmac_rockchip_eth_ops,
-	.priv_auto_alloc_size = sizeof(struct dw_eth_dev),
+	.priv_auto_alloc_size = sizeof(struct rockchip_eth_dev),
 	.platdata_auto_alloc_size = sizeof(struct gmac_rockchip_platdata),
 	.flags = DM_FLAG_ALLOC_PRIV_DMA,
 };

commit a494aeaa443cf2f4086c7182479e441c092537cc
Author: David Wu <david.wu@rock-chips.com>
Date:   Mon Jun 1 17:21:11 2020 +0800

    net: dwc_eth_qos: Fix the reset for RGMII
    
    When using rgmii Gigabit mode, the wait_for_bit_le32()
    reset method resulting in RX can not receive data, after
    this patch, works well.
    
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Change-Id: Id1d2405397d0c2f59b7bf1e341cdf66b023e4226

diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index ff3bce6489..2ded1dd30c 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -1114,7 +1114,7 @@ static int eqos_read_rom_hwaddr(struct udevice *dev)
 int eqos_init(struct udevice *dev)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
-	int ret;
+	int ret, limit = 10;
 	ulong rate;
 	u32 val;
 
@@ -1138,10 +1138,17 @@ int eqos_init(struct udevice *dev)
 
 	eqos->reg_access_ok = true;
 
-	ret = wait_for_bit_le32(&eqos->dma_regs->mode,
-				EQOS_DMA_MODE_SWR, false,
-				eqos->config->swr_wait, false);
-	if (ret) {
+	/* DMA SW reset */
+	val = readl(&eqos->dma_regs->mode);
+	val |= EQOS_DMA_MODE_SWR;
+	writel(val, &eqos->dma_regs->mode);
+	while (limit--) {
+		if (!(readl(&eqos->dma_regs->mode) & EQOS_DMA_MODE_SWR))
+			break;
+		mdelay(10);
+	}
+
+	if (limit < 0) {
 		pr_err("EQOS_DMA_MODE_SWR stuck");
 		goto err_stop_resets;
 	}

commit 23ca6f743ca0e906471ab3f4821aff6a474cbada
Author: David Wu <david.wu@rock-chips.com>
Date:   Thu Apr 30 15:14:59 2020 +0800

    net: dwc_eth_qos: Export common struct and interface at head file
    
    Open structure data and interface, so that Soc using dw_eth_qos
    controller can reference.
    
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Change-Id: Ic845d330465c1bb8f7868fb188e5bf30c865b9b5

diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index 06bc73c76a..ff3bce6489 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -45,6 +45,7 @@
 #include <asm/arch/clock.h>
 #include <asm/mach-imx/sys_proto.h>
 #endif
+#include "dwc_eth_qos.h"
 
 /* Core registers */
 
@@ -99,9 +100,6 @@ struct eqos_mac_regs {
 
 #define EQOS_MAC_RXQ_CTRL0_RXQ0EN_SHIFT			0
 #define EQOS_MAC_RXQ_CTRL0_RXQ0EN_MASK			3
-#define EQOS_MAC_RXQ_CTRL0_RXQ0EN_NOT_ENABLED		0
-#define EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_DCB		2
-#define EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_AV		1
 
 #define EQOS_MAC_RXQ_CTRL2_PSRQ0_SHIFT			0
 #define EQOS_MAC_RXQ_CTRL2_PSRQ0_MASK			0xff
@@ -122,8 +120,6 @@ struct eqos_mac_regs {
 #define EQOS_MAC_MDIO_ADDRESS_PA_SHIFT			21
 #define EQOS_MAC_MDIO_ADDRESS_RDA_SHIFT			16
 #define EQOS_MAC_MDIO_ADDRESS_CR_SHIFT			8
-#define EQOS_MAC_MDIO_ADDRESS_CR_20_35			2
-#define EQOS_MAC_MDIO_ADDRESS_CR_250_300		5
 #define EQOS_MAC_MDIO_ADDRESS_SKAP			BIT(4)
 #define EQOS_MAC_MDIO_ADDRESS_GOC_SHIFT			2
 #define EQOS_MAC_MDIO_ADDRESS_GOC_READ			3
@@ -276,65 +272,6 @@ struct eqos_desc {
 #define EQOS_DESC3_LD		BIT(28)
 #define EQOS_DESC3_BUF1V	BIT(24)
 
-struct eqos_config {
-	bool reg_access_always_ok;
-	int mdio_wait;
-	int swr_wait;
-	int config_mac;
-	int config_mac_mdio;
-	struct eqos_ops *ops;
-};
-
-struct eqos_ops {
-	void (*eqos_inval_desc)(void *desc);
-	void (*eqos_flush_desc)(void *desc);
-	void (*eqos_inval_buffer)(void *buf, size_t size);
-	void (*eqos_flush_buffer)(void *buf, size_t size);
-	int (*eqos_probe_resources)(struct udevice *dev);
-	int (*eqos_remove_resources)(struct udevice *dev);
-	int (*eqos_stop_resets)(struct udevice *dev);
-	int (*eqos_start_resets)(struct udevice *dev);
-	void (*eqos_stop_clks)(struct udevice *dev);
-	int (*eqos_start_clks)(struct udevice *dev);
-	int (*eqos_calibrate_pads)(struct udevice *dev);
-	int (*eqos_disable_calibration)(struct udevice *dev);
-	int (*eqos_set_tx_clk_speed)(struct udevice *dev);
-	ulong (*eqos_get_tick_clk_rate)(struct udevice *dev);
-	phy_interface_t (*eqos_get_interface)(struct udevice *dev);
-};
-
-struct eqos_priv {
-	struct udevice *dev;
-	const struct eqos_config *config;
-	fdt_addr_t regs;
-	struct eqos_mac_regs *mac_regs;
-	struct eqos_mtl_regs *mtl_regs;
-	struct eqos_dma_regs *dma_regs;
-	struct eqos_tegra186_regs *tegra186_regs;
-	struct reset_ctl reset_ctl;
-	struct gpio_desc phy_reset_gpio;
-	u32 reset_delays[3];
-	struct clk clk_master_bus;
-	struct clk clk_rx;
-	struct clk clk_ptp_ref;
-	struct clk clk_tx;
-	struct clk clk_ck;
-	struct clk clk_slave_bus;
-	struct mii_dev *mii;
-	struct phy_device *phy;
-	int phyaddr;
-	u32 max_speed;
-	void *descs;
-	struct eqos_desc *tx_descs;
-	struct eqos_desc *rx_descs;
-	int tx_desc_idx, rx_desc_idx;
-	void *tx_dma_buf;
-	void *rx_dma_buf;
-	void *rx_pkt;
-	bool started;
-	bool reg_access_ok;
-};
-
 /*
  * TX and RX descriptors are 16 bytes. This causes problems with the cache
  * maintenance on CPUs where the cache-line size exceeds the size of these
@@ -1120,7 +1057,7 @@ static int eqos_adjust_link(struct udevice *dev)
 	return 0;
 }
 
-static int eqos_write_hwaddr(struct udevice *dev)
+int eqos_write_hwaddr(struct udevice *dev)
 {
 	struct eth_pdata *plat = dev_get_platdata(dev);
 	struct eqos_priv *eqos = dev_get_priv(dev);
@@ -1174,7 +1111,7 @@ static int eqos_read_rom_hwaddr(struct udevice *dev)
 	return !is_valid_ethaddr(pdata->enetaddr);
 }
 
-static int eqos_init(struct udevice *dev)
+int eqos_init(struct udevice *dev)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
 	int ret;
@@ -1285,7 +1222,7 @@ err:
 	return ret;
 }
 
-static void eqos_enable(struct udevice *dev)
+void eqos_enable(struct udevice *dev)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
 	u32 val, tx_fifo_sz, rx_fifo_sz, tqs, rqs, pbl;
@@ -1529,7 +1466,7 @@ static int eqos_start(struct udevice *dev)
 	return 0;
 }
 
-static void eqos_stop(struct udevice *dev)
+void eqos_stop(struct udevice *dev)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
 	int i;
@@ -1584,7 +1521,7 @@ static void eqos_stop(struct udevice *dev)
 	debug("%s: OK\n", __func__);
 }
 
-static int eqos_send(struct udevice *dev, void *packet, int length)
+int eqos_send(struct udevice *dev, void *packet, int length)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
 	struct eqos_desc *tx_desc;
@@ -1626,7 +1563,7 @@ static int eqos_send(struct udevice *dev, void *packet, int length)
 	return -ETIMEDOUT;
 }
 
-static int eqos_recv(struct udevice *dev, int flags, uchar **packetp)
+int eqos_recv(struct udevice *dev, int flags, uchar **packetp)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
 	struct eqos_desc *rx_desc;
@@ -1651,7 +1588,7 @@ static int eqos_recv(struct udevice *dev, int flags, uchar **packetp)
 	return length;
 }
 
-static int eqos_free_pkt(struct udevice *dev, uchar *packet, int length)
+int eqos_free_pkt(struct udevice *dev, uchar *packet, int length)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
 	uchar *packet_expected;
@@ -2030,7 +1967,7 @@ static int eqos_remove_resources_imx(struct udevice *dev)
 	return 0;
 }
 
-static int eqos_probe(struct udevice *dev)
+int eqos_probe(struct udevice *dev)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
 	int ret;
diff --git a/drivers/net/dwc_eth_qos.h b/drivers/net/dwc_eth_qos.h
new file mode 100644
index 0000000000..3125a301f0
--- /dev/null
+++ b/drivers/net/dwc_eth_qos.h
@@ -0,0 +1,87 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2020
+ */
+
+#ifndef _DWC_ETH_QOS_H
+#define _DWC_ETH_QOS_H
+
+#include <reset.h>
+
+#define EQOS_MAC_RXQ_CTRL0_RXQ0EN_NOT_ENABLED		0
+#define EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_DCB		2
+#define EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_AV		1
+
+#define EQOS_MAC_MDIO_ADDRESS_CR_20_35			2
+#define EQOS_MAC_MDIO_ADDRESS_CR_250_300		5
+
+
+struct eqos_config {
+	bool reg_access_always_ok;
+	int mdio_wait;
+	int swr_wait;
+	int config_mac;
+	int config_mac_mdio;
+	struct eqos_ops *ops;
+};
+
+struct eqos_ops {
+	void (*eqos_inval_desc)(void *desc);
+	void (*eqos_flush_desc)(void *desc);
+	void (*eqos_inval_buffer)(void *buf, size_t size);
+	void (*eqos_flush_buffer)(void *buf, size_t size);
+	int (*eqos_probe_resources)(struct udevice *dev);
+	int (*eqos_remove_resources)(struct udevice *dev);
+	int (*eqos_stop_resets)(struct udevice *dev);
+	int (*eqos_start_resets)(struct udevice *dev);
+	void (*eqos_stop_clks)(struct udevice *dev);
+	int (*eqos_start_clks)(struct udevice *dev);
+	int (*eqos_calibrate_pads)(struct udevice *dev);
+	int (*eqos_disable_calibration)(struct udevice *dev);
+	int (*eqos_set_tx_clk_speed)(struct udevice *dev);
+	ulong (*eqos_get_tick_clk_rate)(struct udevice *dev);
+	phy_interface_t (*eqos_get_interface)(struct udevice *dev);
+};
+
+struct eqos_priv {
+	struct udevice *dev;
+	const struct eqos_config *config;
+	fdt_addr_t regs;
+	struct eqos_mac_regs *mac_regs;
+	struct eqos_mtl_regs *mtl_regs;
+	struct eqos_dma_regs *dma_regs;
+	struct eqos_tegra186_regs *tegra186_regs;
+	struct reset_ctl reset_ctl;
+	struct gpio_desc phy_reset_gpio;
+	u32 reset_delays[3];
+	struct clk clk_master_bus;
+	struct clk clk_rx;
+	struct clk clk_ptp_ref;
+	struct clk clk_tx;
+	struct clk clk_ck;
+	struct clk clk_slave_bus;
+	struct mii_dev *mii;
+	struct phy_device *phy;
+	int phyaddr;
+	u32 max_speed;
+	void *descs;
+	struct eqos_desc *tx_descs;
+	struct eqos_desc *rx_descs;
+	int tx_desc_idx, rx_desc_idx;
+	void *tx_dma_buf;
+	void *rx_dma_buf;
+	void *rx_pkt;
+	bool started;
+	bool reg_access_ok;
+};
+
+int eqos_init(struct udevice *dev);
+void eqos_enable(struct udevice *dev);
+int eqos_probe(struct udevice *dev);
+void eqos_stop(struct udevice *dev);
+int eqos_send(struct udevice *dev, void *packet, int length);
+int eqos_recv(struct udevice *dev, int flags, uchar **packetp);
+int eqos_free_pkt(struct udevice *dev, uchar *packet, int length);
+int eqos_write_hwaddr(struct udevice *dev);
+
+#endif

commit e2d5843168781dfe0ce9748b93b657571de4abb3
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat May 9 16:34:07 2020 +0800

    net: dwc_eth_qos: make eqos_start_clks and eqos_stop_clks optional
    
    If there are definitions for eqos_start_clks and eqos_stop_clks,
    then call these callback function.
    
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Change-Id: Id5ffc944a2c066d78a784aeb28ecb846b53e52fd

diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index 03fc30ffdf..06bc73c76a 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -1183,10 +1183,12 @@ static int eqos_init(struct udevice *dev)
 
 	debug("%s(dev=%p):\n", __func__, dev);
 
-	ret = eqos->config->ops->eqos_start_clks(dev);
-	if (ret < 0) {
-		pr_err("eqos_start_clks() failed: %d", ret);
-		goto err;
+	if (eqos->config->ops->eqos_start_clks) {
+		ret = eqos->config->ops->eqos_start_clks(dev);
+		if (ret < 0) {
+			pr_err("eqos_start_clks() failed: %d", ret);
+			goto err;
+		}
 	}
 
 	ret = eqos->config->ops->eqos_start_resets(dev);
@@ -1276,7 +1278,8 @@ err_shutdown_phy:
 err_stop_resets:
 	eqos->config->ops->eqos_stop_resets(dev);
 err_stop_clks:
-	eqos->config->ops->eqos_stop_clks(dev);
+	if (eqos->config->ops->eqos_stop_clks)
+		eqos->config->ops->eqos_stop_clks(dev);
 err:
 	pr_err("FAILED: %d", ret);
 	return ret;
@@ -1575,7 +1578,8 @@ static void eqos_stop(struct udevice *dev)
 		phy_shutdown(eqos->phy);
 	}
 	eqos->config->ops->eqos_stop_resets(dev);
-	eqos->config->ops->eqos_stop_clks(dev);
+	if (eqos->config->ops->eqos_stop_clks)
+		eqos->config->ops->eqos_stop_clks(dev);
 
 	debug("%s: OK\n", __func__);
 }

commit 5bcea7aac5bc26e79c06285f0762b9b50d57b418
Author: David Wu <david.wu@rock-chips.com>
Date:   Thu Apr 30 11:08:29 2020 +0800

    net: dwc_eth_qos: Split eqos_start() to get link speed
    
    For Rockchip, need to obtain the current link speed to
    configure the tx clocks, (for example, in rgmii mode,
    1000M link: 125M, 100M link: 25M, 10M link is 2.5M rate)
    and then enable gmac. So after the adjust_link(), before
    the start gamc, this intermediate stage needs to configure
    the clock according to the current link speed.
    
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Change-Id: I9a46da28abca0544cb0a56b0a0574e2fd1de0c52

diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index 7d27687f67..03fc30ffdf 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -1174,19 +1174,15 @@ static int eqos_read_rom_hwaddr(struct udevice *dev)
 	return !is_valid_ethaddr(pdata->enetaddr);
 }
 
-static int eqos_start(struct udevice *dev)
+static int eqos_init(struct udevice *dev)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
-	int ret, i;
+	int ret;
 	ulong rate;
-	u32 val, tx_fifo_sz, rx_fifo_sz, tqs, rqs, pbl;
-	ulong last_rx_desc;
+	u32 val;
 
 	debug("%s(dev=%p):\n", __func__, dev);
 
-	eqos->tx_desc_idx = 0;
-	eqos->rx_desc_idx = 0;
-
 	ret = eqos->config->ops->eqos_start_clks(dev);
 	if (ret < 0) {
 		pr_err("eqos_start_clks() failed: %d", ret);
@@ -1272,6 +1268,30 @@ static int eqos_start(struct udevice *dev)
 		goto err_shutdown_phy;
 	}
 
+	debug("%s: OK\n", __func__);
+	return 0;
+
+err_shutdown_phy:
+	phy_shutdown(eqos->phy);
+err_stop_resets:
+	eqos->config->ops->eqos_stop_resets(dev);
+err_stop_clks:
+	eqos->config->ops->eqos_stop_clks(dev);
+err:
+	pr_err("FAILED: %d", ret);
+	return ret;
+}
+
+static void eqos_enable(struct udevice *dev)
+{
+	struct eqos_priv *eqos = dev_get_priv(dev);
+	u32 val, tx_fifo_sz, rx_fifo_sz, tqs, rqs, pbl;
+	ulong last_rx_desc;
+	int i;
+
+	eqos->tx_desc_idx = 0;
+	eqos->rx_desc_idx = 0;
+
 	/* Configure MTL */
 	writel(0x60, &eqos->mtl_regs->txq0_quantum_weight - 0x100);
 
@@ -1491,19 +1511,19 @@ static int eqos_start(struct udevice *dev)
 	writel(last_rx_desc, &eqos->dma_regs->ch0_rxdesc_tail_pointer);
 
 	eqos->started = true;
+}
 
-	debug("%s: OK\n", __func__);
-	return 0;
+static int eqos_start(struct udevice *dev)
+{
+	int ret;
 
-err_shutdown_phy:
-	phy_shutdown(eqos->phy);
-err_stop_resets:
-	eqos->config->ops->eqos_stop_resets(dev);
-err_stop_clks:
-	eqos->config->ops->eqos_stop_clks(dev);
-err:
-	pr_err("FAILED: %d", ret);
-	return ret;
+	ret = eqos_init(dev);
+	if (ret)
+		return ret;
+
+	eqos_enable(dev);
+
+	return 0;
 }
 
 static void eqos_stop(struct udevice *dev)

commit b29cefabfdff7d0bf5fe64a8ffc2b15995949f8c
Author: David Wu <david.wu@rock-chips.com>
Date:   Thu Apr 30 10:14:02 2020 +0800

    net: dwc_eth_qos: Make clk_rx and clk_tx optional
    
    For others using, clk_rx and clk_tx may not be necessary,
    and their clock names are different.
    
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Change-Id: I952ac6cc6a4278c887b530bd6d387752358c89a8

diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index faf8458169..7d27687f67 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -612,16 +612,20 @@ static int eqos_start_clks_stm32(struct udevice *dev)
 		goto err;
 	}
 
-	ret = clk_enable(&eqos->clk_rx);
-	if (ret < 0) {
-		pr_err("clk_enable(clk_rx) failed: %d", ret);
-		goto err_disable_clk_master_bus;
+	if (clk_valid(&eqos->clk_rx)) {
+		ret = clk_enable(&eqos->clk_rx);
+		if (ret < 0) {
+			pr_err("clk_enable(clk_rx) failed: %d", ret);
+			goto err_disable_clk_master_bus;
+		}
 	}
 
-	ret = clk_enable(&eqos->clk_tx);
-	if (ret < 0) {
-		pr_err("clk_enable(clk_tx) failed: %d", ret);
-		goto err_disable_clk_rx;
+	if (clk_valid(&eqos->clk_tx)) {
+		ret = clk_enable(&eqos->clk_tx);
+		if (ret < 0) {
+			pr_err("clk_enable(clk_tx) failed: %d", ret);
+			goto err_disable_clk_rx;
+		}
 	}
 
 	if (clk_valid(&eqos->clk_ck)) {
@@ -638,9 +642,11 @@ static int eqos_start_clks_stm32(struct udevice *dev)
 
 #ifdef CONFIG_CLK
 err_disable_clk_tx:
-	clk_disable(&eqos->clk_tx);
+	if (clk_valid(&eqos->clk_tx))
+		clk_disable(&eqos->clk_tx);
 err_disable_clk_rx:
-	clk_disable(&eqos->clk_rx);
+	if (clk_valid(&eqos->clk_rx))
+		clk_disable(&eqos->clk_rx);
 err_disable_clk_master_bus:
 	clk_disable(&eqos->clk_master_bus);
 err:
@@ -678,8 +684,10 @@ static void eqos_stop_clks_stm32(struct udevice *dev)
 
 	debug("%s(dev=%p):\n", __func__, dev);
 
-	clk_disable(&eqos->clk_tx);
-	clk_disable(&eqos->clk_rx);
+	if (clk_valid(&eqos->clk_tx))
+		clk_disable(&eqos->clk_tx);
+	if (clk_valid(&eqos->clk_rx))
+		clk_disable(&eqos->clk_rx);
 	clk_disable(&eqos->clk_master_bus);
 	if (clk_valid(&eqos->clk_ck))
 		clk_disable(&eqos->clk_ck);
@@ -1842,20 +1850,16 @@ static int eqos_probe_resources_stm32(struct udevice *dev)
 	ret = clk_get_by_name(dev, "stmmaceth", &eqos->clk_master_bus);
 	if (ret) {
 		pr_err("clk_get_by_name(master_bus) failed: %d", ret);
-		goto err_probe;
+		return ret;
 	}
 
 	ret = clk_get_by_name(dev, "mac-clk-rx", &eqos->clk_rx);
-	if (ret) {
-		pr_err("clk_get_by_name(rx) failed: %d", ret);
-		goto err_free_clk_master_bus;
-	}
+	if (ret)
+		pr_warn("clk_get_by_name(rx) failed: %d", ret);
 
 	ret = clk_get_by_name(dev, "mac-clk-tx", &eqos->clk_tx);
-	if (ret) {
-		pr_err("clk_get_by_name(tx) failed: %d", ret);
-		goto err_free_clk_rx;
-	}
+	if (ret)
+		pr_warn("clk_get_by_name(tx) failed: %d", ret);
 
 	/*  Get ETH_CLK clocks (optional) */
 	ret = clk_get_by_name(dev, "eth-ck", &eqos->clk_ck);
@@ -1900,15 +1904,6 @@ static int eqos_probe_resources_stm32(struct udevice *dev)
 
 	debug("%s: OK\n", __func__);
 	return 0;
-
-err_free_clk_rx:
-	clk_free(&eqos->clk_rx);
-err_free_clk_master_bus:
-	clk_free(&eqos->clk_master_bus);
-err_probe:
-
-	debug("%s: returns %d\n", __func__, ret);
-	return ret;
 }
 
 static phy_interface_t eqos_get_interface_stm32(struct udevice *dev)
@@ -1990,8 +1985,10 @@ static int eqos_remove_resources_stm32(struct udevice *dev)
 
 	debug("%s(dev=%p):\n", __func__, dev);
 
-	clk_free(&eqos->clk_tx);
-	clk_free(&eqos->clk_rx);
+	if (clk_valid(&eqos->clk_tx))
+		clk_free(&eqos->clk_tx);
+	if (clk_valid(&eqos->clk_rx))
+		clk_free(&eqos->clk_rx);
 	clk_free(&eqos->clk_master_bus);
 	if (clk_valid(&eqos->clk_ck))
 		clk_free(&eqos->clk_ck);

commit bbbbc81c0129455242cdb918e5076042ce59e8d4
Author: David Wu <david.wu@rock-chips.com>
Date:   Thu Apr 30 09:09:29 2020 +0800

    net: dwc_eth_qos: Move interface() to eqos_ops structure
    
    After moving to eqos_ops, if eqos_config is defined
    outside file, can not export interface() definition,
    only export eqos_ops struct defined in dwc_eth_qos.c.
    
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Change-Id: Ibc60f49f36bb2011454370ed7fcc6d9db3b34d9f

diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index 902df81f52..faf8458169 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -282,7 +282,6 @@ struct eqos_config {
 	int swr_wait;
 	int config_mac;
 	int config_mac_mdio;
-	phy_interface_t (*interface)(struct udevice *dev);
 	struct eqos_ops *ops;
 };
 
@@ -301,6 +300,7 @@ struct eqos_ops {
 	int (*eqos_disable_calibration)(struct udevice *dev);
 	int (*eqos_set_tx_clk_speed)(struct udevice *dev);
 	ulong (*eqos_get_tick_clk_rate)(struct udevice *dev);
+	phy_interface_t (*eqos_get_interface)(struct udevice *dev);
 };
 
 struct eqos_priv {
@@ -1226,7 +1226,7 @@ static int eqos_start(struct udevice *dev)
 		addr = DWC_NET_PHYADDR;
 #endif
 		eqos->phy = phy_connect(eqos->mii, addr, dev,
-					eqos->config->interface(dev));
+		 eqos->config->ops->eqos_get_interface(dev));
 		if (!eqos->phy) {
 			pr_err("phy_connect() failed");
 			goto err_stop_resets;
@@ -1826,7 +1826,7 @@ static int eqos_probe_resources_stm32(struct udevice *dev)
 
 	debug("%s(dev=%p):\n", __func__, dev);
 
-	interface = eqos->config->interface(dev);
+	interface = eqos->config->ops->eqos_get_interface(dev);
 
 	if (interface == PHY_INTERFACE_MODE_NONE) {
 		pr_err("Invalid PHY interface\n");
@@ -1937,7 +1937,7 @@ static int eqos_probe_resources_imx(struct udevice *dev)
 
 	debug("%s(dev=%p):\n", __func__, dev);
 
-	interface = eqos->config->interface(dev);
+	interface = eqos->config->ops->eqos_get_interface(dev);
 
 	if (interface == PHY_INTERFACE_MODE_NONE) {
 		pr_err("Invalid PHY interface\n");
@@ -2121,7 +2121,8 @@ static struct eqos_ops eqos_tegra186_ops = {
 	.eqos_calibrate_pads = eqos_calibrate_pads_tegra186,
 	.eqos_disable_calibration = eqos_disable_calibration_tegra186,
 	.eqos_set_tx_clk_speed = eqos_set_tx_clk_speed_tegra186,
-	.eqos_get_tick_clk_rate = eqos_get_tick_clk_rate_tegra186
+	.eqos_get_tick_clk_rate = eqos_get_tick_clk_rate_tegra186,
+	.eqos_get_interface = eqos_get_interface_tegra186
 };
 
 static const struct eqos_config eqos_tegra186_config = {
@@ -2130,7 +2131,6 @@ static const struct eqos_config eqos_tegra186_config = {
 	.swr_wait = 10,
 	.config_mac = EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_DCB,
 	.config_mac_mdio = EQOS_MAC_MDIO_ADDRESS_CR_20_35,
-	.interface = eqos_get_interface_tegra186,
 	.ops = &eqos_tegra186_ops
 };
 
@@ -2148,7 +2148,8 @@ static struct eqos_ops eqos_stm32_ops = {
 	.eqos_calibrate_pads = eqos_calibrate_pads_stm32,
 	.eqos_disable_calibration = eqos_disable_calibration_stm32,
 	.eqos_set_tx_clk_speed = eqos_set_tx_clk_speed_stm32,
-	.eqos_get_tick_clk_rate = eqos_get_tick_clk_rate_stm32
+	.eqos_get_tick_clk_rate = eqos_get_tick_clk_rate_stm32,
+	.eqos_get_interface = eqos_get_interface_stm32
 };
 
 static const struct eqos_config eqos_stm32_config = {
@@ -2157,7 +2158,6 @@ static const struct eqos_config eqos_stm32_config = {
 	.swr_wait = 50,
 	.config_mac = EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_AV,
 	.config_mac_mdio = EQOS_MAC_MDIO_ADDRESS_CR_250_300,
-	.interface = eqos_get_interface_stm32,
 	.ops = &eqos_stm32_ops
 };
 
@@ -2175,7 +2175,8 @@ static struct eqos_ops eqos_imx_ops = {
 	.eqos_calibrate_pads = eqos_calibrate_pads_imx,
 	.eqos_disable_calibration = eqos_disable_calibration_imx,
 	.eqos_set_tx_clk_speed = eqos_set_tx_clk_speed_imx,
-	.eqos_get_tick_clk_rate = eqos_get_tick_clk_rate_imx
+	.eqos_get_tick_clk_rate = eqos_get_tick_clk_rate_imx,
+	.eqos_get_interface = eqos_get_interface_imx
 };
 
 struct eqos_config eqos_imx_config = {
@@ -2184,7 +2185,6 @@ struct eqos_config eqos_imx_config = {
 	.swr_wait = 50,
 	.config_mac = EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_DCB,
 	.config_mac_mdio = EQOS_MAC_MDIO_ADDRESS_CR_250_300,
-	.interface = eqos_get_interface_imx,
 	.ops = &eqos_imx_ops
 };
 

commit 13105a0ba7c607f7932189077887850439236c53
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Apr 29 18:37:12 2020 +0800

    net: dwc_eth_qos: Add option "snps,reset-gpio" phy-rst gpio for stm32
    
    It can be seen that most of the Socs using STM mac, "snps,reset-gpio"
    gpio is used, adding this option makes reset function more general.
    
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Change-Id: I428c7158c113143a7e51296705fabde6f05eb0f6

diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index d37912f315..902df81f52 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -313,6 +313,7 @@ struct eqos_priv {
 	struct eqos_tegra186_regs *tegra186_regs;
 	struct reset_ctl reset_ctl;
 	struct gpio_desc phy_reset_gpio;
+	u32 reset_delays[3];
 	struct clk clk_master_bus;
 	struct clk clk_rx;
 	struct clk clk_ptp_ref;
@@ -738,6 +739,15 @@ static int eqos_start_resets_stm32(struct udevice *dev)
 
 	debug("%s(dev=%p):\n", __func__, dev);
 	if (dm_gpio_is_valid(&eqos->phy_reset_gpio)) {
+		ret = dm_gpio_set_value(&eqos->phy_reset_gpio, 0);
+		if (ret < 0) {
+			pr_err("dm_gpio_set_value(phy_reset, deassert) failed: %d",
+			       ret);
+			return ret;
+		}
+
+		udelay(eqos->reset_delays[0]);
+
 		ret = dm_gpio_set_value(&eqos->phy_reset_gpio, 1);
 		if (ret < 0) {
 			pr_err("dm_gpio_set_value(phy_reset, assert) failed: %d",
@@ -745,7 +755,7 @@ static int eqos_start_resets_stm32(struct udevice *dev)
 			return ret;
 		}
 
-		udelay(2);
+		udelay(eqos->reset_delays[1]);
 
 		ret = dm_gpio_set_value(&eqos->phy_reset_gpio, 0);
 		if (ret < 0) {
@@ -753,6 +763,8 @@ static int eqos_start_resets_stm32(struct udevice *dev)
 			       ret);
 			return ret;
 		}
+
+		udelay(eqos->reset_delays[2]);
 	}
 	debug("%s: OK\n", __func__);
 
@@ -1863,11 +1875,29 @@ static int eqos_probe_resources_stm32(struct udevice *dev)
 		if (ret)
 			pr_warn("gpio_request_by_name(phy reset) not provided %d",
 				ret);
+		else
+			eqos->reset_delays[1] = 2;
 
 		eqos->phyaddr = ofnode_read_u32_default(phandle_args.node,
 							"reg", -1);
 	}
 
+	if (!dm_gpio_is_valid(&eqos->phy_reset_gpio)) {
+		int reset_flags = GPIOD_IS_OUT;
+
+		if (dev_read_bool(dev, "snps,reset-active-low"))
+			reset_flags |= GPIOD_ACTIVE_LOW;
+
+		ret = gpio_request_by_name(dev, "snps,reset-gpio", 0,
+					   &eqos->phy_reset_gpio, reset_flags);
+		if (ret == 0)
+			ret = dev_read_u32_array(dev, "snps,reset-delays-us",
+						 eqos->reset_delays, 3);
+		else
+			pr_warn("gpio_request_by_name(snps,reset-gpio) failed: %d",
+				ret);
+	}
+
 	debug("%s: OK\n", __func__);
 	return 0;
 

commit dcf8de121a2f2053b3fe816298f139747eb6ccee
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Apr 29 17:49:56 2020 +0800

    net: dwc_eth_qos: Use dev_ functions calls to get FDT data
    
    It seems dev_ functions are more general than fdt_ functions.
    
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Change-Id: Ia1d19c61fb8a2c8540b3dfda53b6aeb3b72acb7f

diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index e01137f5dc..d37912f315 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -1888,8 +1888,7 @@ static phy_interface_t eqos_get_interface_stm32(struct udevice *dev)
 
 	debug("%s(dev=%p):\n", __func__, dev);
 
-	phy_mode = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "phy-mode",
-			       NULL);
+	phy_mode = dev_read_string(dev, "phy-mode");
 	if (phy_mode)
 		interface = phy_get_interface_by_name(phy_mode);
 
@@ -1990,9 +1989,9 @@ static int eqos_probe(struct udevice *dev)
 	eqos->dev = dev;
 	eqos->config = (void *)dev_get_driver_data(dev);
 
-	eqos->regs = devfdt_get_addr(dev);
+	eqos->regs = dev_read_addr(dev);
 	if (eqos->regs == FDT_ADDR_T_NONE) {
-		pr_err("devfdt_get_addr() failed");
+		pr_err("dev_read_addr() failed");
 		return -ENODEV;
 	}
 	eqos->mac_regs = (void *)(eqos->regs + EQOS_MAC_REGS_BASE);

commit 4d0fb6f008267ddadf5f0d0972972a38b33a454c
Author: Ye Li <ye.li@nxp.com>
Date:   Sun May 3 22:41:20 2020 +0800

    UPSTREAM: eQos: Implement the read_rom_hwaddr callback
    
    Implement the read_rom_hwaddr callback to load MAC address from fuse
    for imx8m platforms.
    
    Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
    Signed-off-by: Ye Li <ye.li@nxp.com>
    Signed-off-by: Peng Fan <peng.fan@nxp.com>
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Change-Id: I4204948ae6a0408f7d642007d27923a3c6941562

diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index e83125d19c..e01137f5dc 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -1144,6 +1144,16 @@ static int eqos_write_hwaddr(struct udevice *dev)
 	return 0;
 }
 
+static int eqos_read_rom_hwaddr(struct udevice *dev)
+{
+	struct eth_pdata *pdata = dev_get_platdata(dev);
+
+#ifdef CONFIG_ARCH_IMX8M
+	imx_get_mac_from_fuse(dev->req_seq, pdata->enetaddr);
+#endif
+	return !is_valid_ethaddr(pdata->enetaddr);
+}
+
 static int eqos_start(struct udevice *dev)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
@@ -2065,6 +2075,7 @@ static const struct eth_ops eqos_ops = {
 	.recv = eqos_recv,
 	.free_pkt = eqos_free_pkt,
 	.write_hwaddr = eqos_write_hwaddr,
+	.read_rom_hwaddr	= eqos_read_rom_hwaddr,
 };
 
 static struct eqos_ops eqos_tegra186_ops = {

commit ad018a0c24c9ef2315a766cad2e3df60b1124bbe
Author: Fugang Duan <fugang.duan@nxp.com>
Date:   Sun May 3 22:41:18 2020 +0800

    UPSTREAM: net: eqos: implement callbaks to get interface and set txclk rate
    
    Implement the callbacks to get phy mode interface and txclk
    rate configuration.
    
    Reviewed-by: Ye Li <ye.li@nxp.com>
    Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
    Signed-off-by: Peng Fan <peng.fan@nxp.com>
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Change-Id: I0a5265347936c1bc821c175eea1698d2624d4873

diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index e9322816b7..e83125d19c 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -41,6 +41,10 @@
 #include <asm/gpio.h>
 #include <asm/io.h>
 #include <eth_phy.h>
+#ifdef CONFIG_ARCH_IMX8M
+#include <asm/arch/clock.h>
+#include <asm/mach-imx/sys_proto.h>
+#endif
 
 /* Core registers */
 
@@ -866,11 +870,19 @@ static ulong eqos_get_tick_clk_rate_stm32(struct udevice *dev)
 #endif
 }
 
-static ulong eqos_get_tick_clk_rate_imx(struct udevice *dev)
+__weak u32 imx_get_eqos_csr_clk(void)
 {
-	/* TODO: retrieve from CSR clock */
 	return 100 * 1000000;
 }
+__weak int imx_eqos_txclk_set_rate(unsigned long rate)
+{
+	return 0;
+}
+
+static ulong eqos_get_tick_clk_rate_imx(struct udevice *dev)
+{
+	return imx_get_eqos_csr_clk();
+}
 
 static int eqos_calibrate_pads_stm32(struct udevice *dev)
 {
@@ -995,6 +1007,33 @@ static int eqos_set_tx_clk_speed_stm32(struct udevice *dev)
 
 static int eqos_set_tx_clk_speed_imx(struct udevice *dev)
 {
+	struct eqos_priv *eqos = dev_get_priv(dev);
+	ulong rate;
+	int ret;
+
+	debug("%s(dev=%p):\n", __func__, dev);
+
+	switch (eqos->phy->speed) {
+	case SPEED_1000:
+		rate = 125 * 1000 * 1000;
+		break;
+	case SPEED_100:
+		rate = 25 * 1000 * 1000;
+		break;
+	case SPEED_10:
+		rate = 2.5 * 1000 * 1000;
+		break;
+	default:
+		pr_err("invalid speed %d", eqos->phy->speed);
+		return -EINVAL;
+	}
+
+	ret = imx_eqos_txclk_set_rate(rate);
+	if (ret < 0) {
+		pr_err("imx (tx_clk, %lu) failed: %d", rate, ret);
+		return ret;
+	}
+
 	return 0;
 }
 
@@ -1872,7 +1911,17 @@ static int eqos_probe_resources_imx(struct udevice *dev)
 
 static phy_interface_t eqos_get_interface_imx(struct udevice *dev)
 {
-	return PHY_INTERFACE_MODE_RGMII;
+	const char *phy_mode;
+	phy_interface_t interface = PHY_INTERFACE_MODE_NONE;
+
+	debug("%s(dev=%p):\n", __func__, dev);
+
+	phy_mode = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "phy-mode",
+			       NULL);
+	if (phy_mode)
+		interface = phy_get_interface_by_name(phy_mode);
+
+	return interface;
 }
 
 static int eqos_remove_resources_tegra186(struct udevice *dev)

commit a7b3400fe083da55d441fee887b825aa3c422606
Author: Fugang Duan <fugang.duan@nxp.com>
Date:   Sun May 3 22:41:17 2020 +0800

    UPSTREAM: net: dwc_eth_qos: add dwc eqos for imx support
    
    Add dwc eqos for imx support.
    
    Reviewed-by: Ye Li <ye.li@nxp.com>
    Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
    Signed-off-by: Peng Fan <peng.fan@nxp.com>
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Change-Id: I49127be057a49e6b45e37f940d523d808c20343b

diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index f5723e102e..e9322816b7 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -80,6 +80,7 @@ struct eqos_mac_regs {
 #define EQOS_MAC_CONFIGURATION_PS			BIT(15)
 #define EQOS_MAC_CONFIGURATION_FES			BIT(14)
 #define EQOS_MAC_CONFIGURATION_DM			BIT(13)
+#define EQOS_MAC_CONFIGURATION_LM			BIT(12)
 #define EQOS_MAC_CONFIGURATION_TE			BIT(1)
 #define EQOS_MAC_CONFIGURATION_RE			BIT(0)
 
@@ -101,11 +102,19 @@ struct eqos_mac_regs {
 #define EQOS_MAC_RXQ_CTRL2_PSRQ0_SHIFT			0
 #define EQOS_MAC_RXQ_CTRL2_PSRQ0_MASK			0xff
 
+#define EQOS_MAC_HW_FEATURE0_MMCSEL_SHIFT		8
+#define EQOS_MAC_HW_FEATURE0_HDSEL_SHIFT		2
+#define EQOS_MAC_HW_FEATURE0_GMIISEL_SHIFT		1
+#define EQOS_MAC_HW_FEATURE0_MIISEL_SHIFT		0
+
 #define EQOS_MAC_HW_FEATURE1_TXFIFOSIZE_SHIFT		6
 #define EQOS_MAC_HW_FEATURE1_TXFIFOSIZE_MASK		0x1f
 #define EQOS_MAC_HW_FEATURE1_RXFIFOSIZE_SHIFT		0
 #define EQOS_MAC_HW_FEATURE1_RXFIFOSIZE_MASK		0x1f
 
+#define EQOS_MAC_HW_FEATURE3_ASP_SHIFT			28
+#define EQOS_MAC_HW_FEATURE3_ASP_MASK			0x3
+
 #define EQOS_MAC_MDIO_ADDRESS_PA_SHIFT			21
 #define EQOS_MAC_MDIO_ADDRESS_RDA_SHIFT			16
 #define EQOS_MAC_MDIO_ADDRESS_CR_SHIFT			8
@@ -153,6 +162,8 @@ struct eqos_mtl_regs {
 #define EQOS_MTL_RXQ0_OPERATION_MODE_RFA_MASK		0x3f
 #define EQOS_MTL_RXQ0_OPERATION_MODE_EHFC		BIT(7)
 #define EQOS_MTL_RXQ0_OPERATION_MODE_RSF		BIT(5)
+#define EQOS_MTL_RXQ0_OPERATION_MODE_FEP		BIT(4)
+#define EQOS_MTL_RXQ0_OPERATION_MODE_FUP		BIT(3)
 
 #define EQOS_MTL_RXQ0_DEBUG_PRXQ_SHIFT			16
 #define EQOS_MTL_RXQ0_DEBUG_PRXQ_MASK			0x7fff
@@ -367,7 +378,7 @@ static void eqos_inval_desc_tegra186(void *desc)
 #endif
 }
 
-static void eqos_inval_desc_stm32(void *desc)
+static void eqos_inval_desc_generic(void *desc)
 {
 #ifndef CONFIG_SYS_NONCACHED_MEMORY
 	unsigned long start = rounddown((unsigned long)desc, ARCH_DMA_MINALIGN);
@@ -385,7 +396,7 @@ static void eqos_flush_desc_tegra186(void *desc)
 #endif
 }
 
-static void eqos_flush_desc_stm32(void *desc)
+static void eqos_flush_desc_generic(void *desc)
 {
 #ifndef CONFIG_SYS_NONCACHED_MEMORY
 	unsigned long start = rounddown((unsigned long)desc, ARCH_DMA_MINALIGN);
@@ -404,7 +415,7 @@ static void eqos_inval_buffer_tegra186(void *buf, size_t size)
 	invalidate_dcache_range(start, end);
 }
 
-static void eqos_inval_buffer_stm32(void *buf, size_t size)
+static void eqos_inval_buffer_generic(void *buf, size_t size)
 {
 	unsigned long start = rounddown((unsigned long)buf, ARCH_DMA_MINALIGN);
 	unsigned long end = roundup((unsigned long)buf + size,
@@ -418,7 +429,7 @@ static void eqos_flush_buffer_tegra186(void *buf, size_t size)
 	flush_cache((unsigned long)buf, size);
 }
 
-static void eqos_flush_buffer_stm32(void *buf, size_t size)
+static void eqos_flush_buffer_generic(void *buf, size_t size)
 {
 	unsigned long start = rounddown((unsigned long)buf, ARCH_DMA_MINALIGN);
 	unsigned long end = roundup((unsigned long)buf + size,
@@ -521,6 +532,7 @@ static int eqos_mdio_write(struct mii_dev *bus, int mdio_addr, int mdio_devad,
 
 static int eqos_start_clks_tegra186(struct udevice *dev)
 {
+#ifdef CONFIG_CLK
 	struct eqos_priv *eqos = dev_get_priv(dev);
 	int ret;
 
@@ -561,10 +573,12 @@ static int eqos_start_clks_tegra186(struct udevice *dev)
 		pr_err("clk_enable(clk_tx) failed: %d", ret);
 		goto err_disable_clk_ptp_ref;
 	}
+#endif
 
 	debug("%s: OK\n", __func__);
 	return 0;
 
+#ifdef CONFIG_CLK
 err_disable_clk_ptp_ref:
 	clk_disable(&eqos->clk_ptp_ref);
 err_disable_clk_rx:
@@ -576,10 +590,12 @@ err_disable_clk_slave_bus:
 err:
 	debug("%s: FAILED: %d\n", __func__, ret);
 	return ret;
+#endif
 }
 
 static int eqos_start_clks_stm32(struct udevice *dev)
 {
+#ifdef CONFIG_CLK
 	struct eqos_priv *eqos = dev_get_priv(dev);
 	int ret;
 
@@ -610,10 +626,12 @@ static int eqos_start_clks_stm32(struct udevice *dev)
 			goto err_disable_clk_tx;
 		}
 	}
+#endif
 
 	debug("%s: OK\n", __func__);
 	return 0;
 
+#ifdef CONFIG_CLK
 err_disable_clk_tx:
 	clk_disable(&eqos->clk_tx);
 err_disable_clk_rx:
@@ -623,10 +641,17 @@ err_disable_clk_master_bus:
 err:
 	debug("%s: FAILED: %d\n", __func__, ret);
 	return ret;
+#endif
+}
+
+static int eqos_start_clks_imx(struct udevice *dev)
+{
+	return 0;
 }
 
 static void eqos_stop_clks_tegra186(struct udevice *dev)
 {
+#ifdef CONFIG_CLK
 	struct eqos_priv *eqos = dev_get_priv(dev);
 
 	debug("%s(dev=%p):\n", __func__, dev);
@@ -636,12 +661,14 @@ static void eqos_stop_clks_tegra186(struct udevice *dev)
 	clk_disable(&eqos->clk_rx);
 	clk_disable(&eqos->clk_master_bus);
 	clk_disable(&eqos->clk_slave_bus);
+#endif
 
 	debug("%s: OK\n", __func__);
 }
 
 static void eqos_stop_clks_stm32(struct udevice *dev)
 {
+#ifdef CONFIG_CLK
 	struct eqos_priv *eqos = dev_get_priv(dev);
 
 	debug("%s(dev=%p):\n", __func__, dev);
@@ -651,10 +678,16 @@ static void eqos_stop_clks_stm32(struct udevice *dev)
 	clk_disable(&eqos->clk_master_bus);
 	if (clk_valid(&eqos->clk_ck))
 		clk_disable(&eqos->clk_ck);
+#endif
 
 	debug("%s: OK\n", __func__);
 }
 
+static void eqos_stop_clks_imx(struct udevice *dev)
+{
+	/* empty */
+}
+
 static int eqos_start_resets_tegra186(struct udevice *dev)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
@@ -722,6 +755,11 @@ static int eqos_start_resets_stm32(struct udevice *dev)
 	return 0;
 }
 
+static int eqos_start_resets_imx(struct udevice *dev)
+{
+	return 0;
+}
+
 static int eqos_stop_resets_tegra186(struct udevice *dev)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
@@ -749,6 +787,11 @@ static int eqos_stop_resets_stm32(struct udevice *dev)
 	return 0;
 }
 
+static int eqos_stop_resets_imx(struct udevice *dev)
+{
+	return 0;
+}
+
 static int eqos_calibrate_pads_tegra186(struct udevice *dev)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
@@ -803,16 +846,30 @@ static int eqos_disable_calibration_tegra186(struct udevice *dev)
 
 static ulong eqos_get_tick_clk_rate_tegra186(struct udevice *dev)
 {
+#ifdef CONFIG_CLK
 	struct eqos_priv *eqos = dev_get_priv(dev);
 
 	return clk_get_rate(&eqos->clk_slave_bus);
+#else
+	return 0;
+#endif
 }
 
 static ulong eqos_get_tick_clk_rate_stm32(struct udevice *dev)
 {
+#ifdef CONFIG_CLK
 	struct eqos_priv *eqos = dev_get_priv(dev);
 
 	return clk_get_rate(&eqos->clk_master_bus);
+#else
+	return 0;
+#endif
+}
+
+static ulong eqos_get_tick_clk_rate_imx(struct udevice *dev)
+{
+	/* TODO: retrieve from CSR clock */
+	return 100 * 1000000;
 }
 
 static int eqos_calibrate_pads_stm32(struct udevice *dev)
@@ -820,11 +877,21 @@ static int eqos_calibrate_pads_stm32(struct udevice *dev)
 	return 0;
 }
 
+static int eqos_calibrate_pads_imx(struct udevice *dev)
+{
+	return 0;
+}
+
 static int eqos_disable_calibration_stm32(struct udevice *dev)
 {
 	return 0;
 }
 
+static int eqos_disable_calibration_imx(struct udevice *dev)
+{
+	return 0;
+}
+
 static int eqos_set_full_duplex(struct udevice *dev)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
@@ -889,6 +956,7 @@ static int eqos_set_mii_speed_10(struct udevice *dev)
 
 static int eqos_set_tx_clk_speed_tegra186(struct udevice *dev)
 {
+#ifdef CONFIG_CLK
 	struct eqos_priv *eqos = dev_get_priv(dev);
 	ulong rate;
 	int ret;
@@ -915,6 +983,7 @@ static int eqos_set_tx_clk_speed_tegra186(struct udevice *dev)
 		pr_err("clk_set_rate(tx_clk, %lu) failed: %d", rate, ret);
 		return ret;
 	}
+#endif
 
 	return 0;
 }
@@ -924,6 +993,11 @@ static int eqos_set_tx_clk_speed_stm32(struct udevice *dev)
 	return 0;
 }
 
+static int eqos_set_tx_clk_speed_imx(struct udevice *dev)
+{
+	return 0;
+}
+
 static int eqos_adjust_link(struct udevice *dev)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
@@ -1130,6 +1204,7 @@ static int eqos_start(struct udevice *dev)
 	}
 
 	/* Configure MTL */
+	writel(0x60, &eqos->mtl_regs->txq0_quantum_weight - 0x100);
 
 	/* Enable Store and Forward mode for TX */
 	/* Program Tx operating mode */
@@ -1143,7 +1218,9 @@ static int eqos_start(struct udevice *dev)
 
 	/* Enable Store and Forward mode for RX, since no jumbo frame */
 	setbits_le32(&eqos->mtl_regs->rxq0_operation_mode,
-		     EQOS_MTL_RXQ0_OPERATION_MODE_RSF);
+		     EQOS_MTL_RXQ0_OPERATION_MODE_RSF |
+		     EQOS_MTL_RXQ0_OPERATION_MODE_FEP |
+		     EQOS_MTL_RXQ0_OPERATION_MODE_FUP);
 
 	/* Transmit/Receive queue fifo size; use all RAM for 1 queue */
 	val = readl(&eqos->mac_regs->hw_feature1);
@@ -1219,6 +1296,19 @@ static int eqos_start(struct udevice *dev)
 			eqos->config->config_mac <<
 			EQOS_MAC_RXQ_CTRL0_RXQ0EN_SHIFT);
 
+	clrsetbits_le32(&eqos->mac_regs->rxq_ctrl0,
+			EQOS_MAC_RXQ_CTRL0_RXQ0EN_MASK <<
+			EQOS_MAC_RXQ_CTRL0_RXQ0EN_SHIFT,
+			0x2 <<
+			EQOS_MAC_RXQ_CTRL0_RXQ0EN_SHIFT);
+
+	/* Multicast and Broadcast Queue Enable */
+	setbits_le32(&eqos->mac_regs->unused_0a4,
+		     0x00100000);
+	/* enable promise mode */
+	setbits_le32(&eqos->mac_regs->unused_004[1],
+		     0x1);
+
 	/* Set TX flow control parameters */
 	/* Set Pause Time */
 	setbits_le32(&eqos->mac_regs->q0_tx_flow_ctrl,
@@ -1296,7 +1386,11 @@ static int eqos_start(struct udevice *dev)
 		rx_desc->des0 = (u32)(ulong)(eqos->rx_dma_buf +
 					     (i * EQOS_MAX_PACKET_SIZE));
 		rx_desc->des3 = EQOS_DESC3_OWN | EQOS_DESC3_BUF1V;
+		mb();
 		eqos->config->ops->eqos_flush_desc(rx_desc);
+		eqos->config->ops->eqos_inval_buffer(eqos->rx_dma_buf +
+						(i * EQOS_MAX_PACKET_SIZE),
+						EQOS_MAX_PACKET_SIZE);
 	}
 
 	writel(0, &eqos->dma_regs->ch0_txdesc_list_haddress);
@@ -1310,14 +1404,12 @@ static int eqos_start(struct udevice *dev)
 	       &eqos->dma_regs->ch0_rxdesc_ring_length);
 
 	/* Enable everything */
-
-	setbits_le32(&eqos->mac_regs->configuration,
-		     EQOS_MAC_CONFIGURATION_TE | EQOS_MAC_CONFIGURATION_RE);
-
 	setbits_le32(&eqos->dma_regs->ch0_tx_control,
 		     EQOS_DMA_CH0_TX_CONTROL_ST);
 	setbits_le32(&eqos->dma_regs->ch0_rx_control,
 		     EQOS_DMA_CH0_RX_CONTROL_SR);
+	setbits_le32(&eqos->mac_regs->configuration,
+		     EQOS_MAC_CONFIGURATION_TE | EQOS_MAC_CONFIGURATION_RE);
 
 	/* TX tail pointer not written until we need to TX a packet */
 	/*
@@ -1482,6 +1574,8 @@ static int eqos_free_pkt(struct udevice *dev, uchar *packet, int length)
 		return -EINVAL;
 	}
 
+	eqos->config->ops->eqos_inval_buffer(packet, length);
+
 	rx_desc = &(eqos->rx_descs[eqos->rx_desc_idx]);
 
 	rx_desc->des0 = 0;
@@ -1758,17 +1852,42 @@ static phy_interface_t eqos_get_interface_tegra186(struct udevice *dev)
 	return PHY_INTERFACE_MODE_MII;
 }
 
+static int eqos_probe_resources_imx(struct udevice *dev)
+{
+	struct eqos_priv *eqos = dev_get_priv(dev);
+	phy_interface_t interface;
+
+	debug("%s(dev=%p):\n", __func__, dev);
+
+	interface = eqos->config->interface(dev);
+
+	if (interface == PHY_INTERFACE_MODE_NONE) {
+		pr_err("Invalid PHY interface\n");
+		return -EINVAL;
+	}
+
+	debug("%s: OK\n", __func__);
+	return 0;
+}
+
+static phy_interface_t eqos_get_interface_imx(struct udevice *dev)
+{
+	return PHY_INTERFACE_MODE_RGMII;
+}
+
 static int eqos_remove_resources_tegra186(struct udevice *dev)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
 
 	debug("%s(dev=%p):\n", __func__, dev);
 
+#ifdef CONFIG_CLK
 	clk_free(&eqos->clk_tx);
 	clk_free(&eqos->clk_ptp_ref);
 	clk_free(&eqos->clk_rx);
 	clk_free(&eqos->clk_slave_bus);
 	clk_free(&eqos->clk_master_bus);
+#endif
 	dm_gpio_free(dev, &eqos->phy_reset_gpio);
 	reset_free(&eqos->reset_ctl);
 
@@ -1778,6 +1897,7 @@ static int eqos_remove_resources_tegra186(struct udevice *dev)
 
 static int eqos_remove_resources_stm32(struct udevice *dev)
 {
+#ifdef CONFIG_CLK
 	struct eqos_priv *eqos = dev_get_priv(dev);
 
 	debug("%s(dev=%p):\n", __func__, dev);
@@ -1787,6 +1907,7 @@ static int eqos_remove_resources_stm32(struct udevice *dev)
 	clk_free(&eqos->clk_master_bus);
 	if (clk_valid(&eqos->clk_ck))
 		clk_free(&eqos->clk_ck);
+#endif
 
 	if (dm_gpio_is_valid(&eqos->phy_reset_gpio))
 		dm_gpio_free(dev, &eqos->phy_reset_gpio);
@@ -1795,6 +1916,11 @@ static int eqos_remove_resources_stm32(struct udevice *dev)
 	return 0;
 }
 
+static int eqos_remove_resources_imx(struct udevice *dev)
+{
+	return 0;
+}
+
 static int eqos_probe(struct udevice *dev)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
@@ -1920,10 +2046,10 @@ static const struct eqos_config eqos_tegra186_config = {
 };
 
 static struct eqos_ops eqos_stm32_ops = {
-	.eqos_inval_desc = eqos_inval_desc_stm32,
-	.eqos_flush_desc = eqos_flush_desc_stm32,
-	.eqos_inval_buffer = eqos_inval_buffer_stm32,
-	.eqos_flush_buffer = eqos_flush_buffer_stm32,
+	.eqos_inval_desc = eqos_inval_desc_generic,
+	.eqos_flush_desc = eqos_flush_desc_generic,
+	.eqos_inval_buffer = eqos_inval_buffer_generic,
+	.eqos_flush_buffer = eqos_flush_buffer_generic,
 	.eqos_probe_resources = eqos_probe_resources_stm32,
 	.eqos_remove_resources = eqos_remove_resources_stm32,
 	.eqos_stop_resets = eqos_stop_resets_stm32,
@@ -1946,6 +2072,33 @@ static const struct eqos_config eqos_stm32_config = {
 	.ops = &eqos_stm32_ops
 };
 
+static struct eqos_ops eqos_imx_ops = {
+	.eqos_inval_desc = eqos_inval_desc_generic,
+	.eqos_flush_desc = eqos_flush_desc_generic,
+	.eqos_inval_buffer = eqos_inval_buffer_generic,
+	.eqos_flush_buffer = eqos_flush_buffer_generic,
+	.eqos_probe_resources = eqos_probe_resources_imx,
+	.eqos_remove_resources = eqos_remove_resources_imx,
+	.eqos_stop_resets = eqos_stop_resets_imx,
+	.eqos_start_resets = eqos_start_resets_imx,
+	.eqos_stop_clks = eqos_stop_clks_imx,
+	.eqos_start_clks = eqos_start_clks_imx,
+	.eqos_calibrate_pads = eqos_calibrate_pads_imx,
+	.eqos_disable_calibration = eqos_disable_calibration_imx,
+	.eqos_set_tx_clk_speed = eqos_set_tx_clk_speed_imx,
+	.eqos_get_tick_clk_rate = eqos_get_tick_clk_rate_imx
+};
+
+struct eqos_config eqos_imx_config = {
+	.reg_access_always_ok = false,
+	.mdio_wait = 10000,
+	.swr_wait = 50,
+	.config_mac = EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_DCB,
+	.config_mac_mdio = EQOS_MAC_MDIO_ADDRESS_CR_250_300,
+	.interface = eqos_get_interface_imx,
+	.ops = &eqos_imx_ops
+};
+
 static const struct udevice_id eqos_ids[] = {
 	{
 		.compatible = "nvidia,tegra186-eqos",
@@ -1955,6 +2108,10 @@ static const struct udevice_id eqos_ids[] = {
 		.compatible = "snps,dwmac-4.20a",
 		.data = (ulong)&eqos_stm32_config
 	},
+	{
+		.compatible = "fsl,imx-eqos",
+		.data = (ulong)&eqos_imx_config
+	},
 
 	{ }
 };
@@ -1962,7 +2119,7 @@ static const struct udevice_id eqos_ids[] = {
 U_BOOT_DRIVER(eth_eqos) = {
 	.name = "eth_eqos",
 	.id = UCLASS_ETH,
-	.of_match = eqos_ids,
+	.of_match = of_match_ptr(eqos_ids),
 	.probe = eqos_probe,
 	.remove = eqos_remove,
 	.ops = &eqos_ops,

commit 8e3eceb05327e4356aef6783dfc75e6b6e083392
Author: Ye Li <ye.li@nxp.com>
Date:   Sun May 3 22:41:15 2020 +0800

    UPSTREAM: net: Update eQos driver and FEC driver to use eth phy interfaces
    
    Update eQoS and fec ethernet drivers to support shared MDIO framework
    
    Signed-off-by: Ye Li <ye.li@nxp.com>
    Signed-off-by: Peng Fan <peng.fan@nxp.com>
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Change-Id: Iaf5f3ca585190c6469b68195aaea2499242a0096

diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index b5efe0792c..f5723e102e 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -40,6 +40,7 @@
 #include <wait_bit.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
+#include <eth_phy.h>
 
 /* Core registers */
 
@@ -1082,7 +1083,14 @@ static int eqos_start(struct udevice *dev)
 	 * don't need to reconnect/reconfigure again
 	 */
 	if (!eqos->phy) {
-		eqos->phy = phy_connect(eqos->mii, eqos->phyaddr, dev,
+		int addr = -1;
+#ifdef CONFIG_DM_ETH_PHY
+		addr = eth_phy_get_addr(dev);
+#endif
+#ifdef DWC_NET_PHYADDR
+		addr = DWC_NET_PHYADDR;
+#endif
+		eqos->phy = phy_connect(eqos->mii, addr, dev,
 					eqos->config->interface(dev));
 		if (!eqos->phy) {
 			pr_err("phy_connect() failed");
@@ -1819,23 +1827,32 @@ static int eqos_probe(struct udevice *dev)
 		goto err_remove_resources_core;
 	}
 
-	eqos->mii = mdio_alloc();
+#ifdef CONFIG_DM_ETH_PHY
+	eqos->mii = eth_phy_get_mdio_bus(dev);
+#endif
 	if (!eqos->mii) {
-		pr_err("mdio_alloc() failed");
-		ret = -ENOMEM;
-		goto err_remove_resources_tegra;
-	}
-	eqos->mii->read = eqos_mdio_read;
-	eqos->mii->write = eqos_mdio_write;
-	eqos->mii->priv = eqos;
-	strcpy(eqos->mii->name, dev->name);
+		eqos->mii = mdio_alloc();
+		if (!eqos->mii) {
+			pr_err("mdio_alloc() failed");
+			ret = -ENOMEM;
+			goto err_remove_resources_tegra;
+		}
+		eqos->mii->read = eqos_mdio_read;
+		eqos->mii->write = eqos_mdio_write;
+		eqos->mii->priv = eqos;
+		strcpy(eqos->mii->name, dev->name);
 
-	ret = mdio_register(eqos->mii);
-	if (ret < 0) {
-		pr_err("mdio_register() failed: %d", ret);
-		goto err_free_mdio;
+		ret = mdio_register(eqos->mii);
+		if (ret < 0) {
+			pr_err("mdio_register() failed: %d", ret);
+			goto err_free_mdio;
+		}
 	}
 
+#ifdef CONFIG_DM_ETH_PHY
+	eth_phy_set_mdio_bus(dev, eqos->mii);
+#endif
+
 	debug("%s: OK\n", __func__);
 	return 0;
 
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index f16b2990d7..133359089c 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -24,6 +24,10 @@
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/mach-imx/sys_proto.h>
+#include <asm-generic/gpio.h>
+
+#include "fec_mxc.h"
+#include <eth_phy.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -1245,14 +1249,29 @@ static int fecmxc_probe(struct udevice *dev)
 	}
 
 	fec_reg_setup(priv);
-	priv->dev_id = (dev_id == -1) ? 0 : dev_id;
 
-	bus = fec_get_miibus(dev, dev_id);
+	priv->dev_id = dev->seq;
+
+#ifdef CONFIG_DM_ETH_PHY
+	bus = eth_phy_get_mdio_bus(dev);
+#endif
+
+	if (!bus) {
+#ifdef CONFIG_FEC_MXC_MDIO_BASE
+		bus = fec_get_miibus((ulong)CONFIG_FEC_MXC_MDIO_BASE, dev->seq);
+#else
+		bus = fec_get_miibus((ulong)priv->eth, dev->seq);
+#endif
+	}
 	if (!bus) {
 		ret = -ENOMEM;
 		goto err_mii;
 	}
 
+#ifdef CONFIG_DM_ETH_PHY
+	eth_phy_set_mdio_bus(dev, bus);
+#endif
+
 	priv->bus = bus;
 	priv->xcv_type = CONFIG_FEC_XCV_TYPE;
 	priv->interface = pdata->phy_interface;

commit 70664e19a3db7f23427264fc090100213d4eeaab
Author: Ye Li <ye.li@nxp.com>
Date:   Sun May 3 22:41:14 2020 +0800

    UPSTREAM: net: Add eth phy generic driver for shared MDIO
    
    For dual ethernet controllers, the HW design may connect ETH phys to
    one MDIO ports. So two different ethernet drivers have to share MDIO bus.
    Since two ethernet drivers are independent, we can't ensure their probe
    order.
    
    To resolve this problem, introduce an eth phy generic driver and uclass.
    
    After eth-uclass binds, we search the mdio node and binds the phy node
    with the eth-phy-generic driver.
    
    When one eth driver get its phy device, the parent of phy device will
    probe prior than phy device. So this ensure the eth driver ownes the
    MDIO bus will be probed before using its MDIO.
    
    Signed-off-by: Ye Li <ye.li@nxp.com>
    Signed-off-by: Peng Fan <peng.fan@nxp.com>
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Change-Id: Ice83493e9e1caf3842f9ce0c129e29ad46cc0532

diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index e20373f2d6..f58fbfc4ab 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -23,6 +23,12 @@ config DM_MDIO
 	  This is currently implemented in net/mdio-uclass.c
 	  Look in include/miiphy.h for details.
 
+config DM_ETH_PHY
+	bool "Enable Driver Model for Ethernet Generic PHY drivers"
+	depends on DM
+	help
+	  Enable driver model for Ethernet Generic PHY .
+
 menuconfig NETDEVICES
 	bool "Network device support"
 	depends on NET
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 94a4fd8701..4a5110b107 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -18,6 +18,7 @@ obj-$(CONFIG_TULIP) += dc2114x.o
 obj-$(CONFIG_ETH_DESIGNWARE) += designware.o
 obj-$(CONFIG_DRIVER_DM9000) += dm9000x.o
 obj-$(CONFIG_DNET) += dnet.o
+obj-$(CONFIG_DM_ETH_PHY) += eth-phy-uclass.o
 obj-$(CONFIG_E1000) += e1000.o
 obj-$(CONFIG_E1000_SPI) += e1000_spi.o
 obj-$(CONFIG_EEPRO100) += eepro100.o
diff --git a/drivers/net/eth-phy-uclass.c b/drivers/net/eth-phy-uclass.c
new file mode 100644
index 0000000000..b383f45527
--- /dev/null
+++ b/drivers/net/eth-phy-uclass.c
@@ -0,0 +1,122 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020 NXP
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <net.h>
+#include <dm/device-internal.h>
+#include <dm/uclass-internal.h>
+#include <dm/lists.h>
+
+struct eth_phy_device_priv {
+	struct mii_dev *mdio_bus;
+};
+
+int eth_phy_binds_nodes(struct udevice *eth_dev)
+{
+	ofnode mdio_node, phy_node;
+	const char *node_name;
+	int ret;
+
+	mdio_node = dev_read_subnode(eth_dev, "mdio");
+	if (!ofnode_valid(mdio_node)) {
+		debug("%s: %s mdio subnode not found!", __func__,
+		      eth_dev->name);
+		return -ENXIO;
+	}
+
+	ofnode_for_each_subnode(phy_node, mdio_node) {
+		node_name = ofnode_get_name(phy_node);
+
+		debug("* Found child node: '%s'\n", node_name);
+
+		ret = device_bind_driver_to_node(eth_dev,
+						 "eth_phy_generic_drv",
+						 node_name, phy_node, NULL);
+		if (ret) {
+			debug("  - Eth phy binding error: %d\n", ret);
+			continue;
+		}
+
+		debug("  - bound phy device: '%s'\n", node_name);
+	}
+
+	return 0;
+}
+
+int eth_phy_set_mdio_bus(struct udevice *eth_dev, struct mii_dev *mdio_bus)
+{
+	struct udevice *dev;
+	struct eth_phy_device_priv *uc_priv;
+
+	for (uclass_first_device(UCLASS_ETH_PHY, &dev); dev;
+	     uclass_next_device(&dev)) {
+		if (dev->parent == eth_dev) {
+			uc_priv = (struct eth_phy_device_priv *)(dev->uclass_priv);
+
+			if (!uc_priv->mdio_bus)
+				uc_priv->mdio_bus = mdio_bus;
+		}
+	}
+
+	return 0;
+}
+
+struct mii_dev *eth_phy_get_mdio_bus(struct udevice *eth_dev)
+{
+	int ret;
+	struct udevice *phy_dev;
+	struct eth_phy_device_priv *uc_priv;
+
+	/* Will probe the parent of phy device, then phy device */
+	ret = uclass_get_device_by_phandle(UCLASS_ETH_PHY, eth_dev,
+					   "phy-handle", &phy_dev);
+	if (!ret) {
+		if (eth_dev != phy_dev->parent) {
+			/*
+			 * phy_dev is shared and controlled by
+			 * other eth controller
+			 */
+			uc_priv = (struct eth_phy_device_priv *)(phy_dev->uclass_priv);
+			if (uc_priv->mdio_bus)
+				printf("Get shared mii bus on %s\n", eth_dev->name);
+			else
+				printf("Can't get shared mii bus on %s\n", eth_dev->name);
+
+			return uc_priv->mdio_bus;
+		}
+	} else {
+		printf("FEC: can't find phy-handle\n");
+	}
+
+	return NULL;
+}
+
+int eth_phy_get_addr(struct udevice *dev)
+{
+	struct ofnode_phandle_args phandle_args;
+	int reg;
+
+	if (dev_read_phandle_with_args(dev, "phy-handle", NULL, 0, 0,
+				       &phandle_args)) {
+		debug("Failed to find phy-handle");
+		return -ENODEV;
+	}
+
+	reg = ofnode_read_u32_default(phandle_args.node, "reg", 0);
+
+	return reg;
+}
+
+UCLASS_DRIVER(eth_phy_generic) = {
+	.id		= UCLASS_ETH_PHY,
+	.name		= "eth_phy_generic",
+	.per_device_auto_alloc_size = sizeof(struct eth_phy_device_priv),
+};
+
+U_BOOT_DRIVER(eth_phy_generic_drv) = {
+	.name		= "eth_phy_generic_drv",
+	.id		= UCLASS_ETH_PHY,
+};
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index b5ea2e01fe..dfe709611a 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -37,6 +37,7 @@ enum uclass_id {
 	UCLASS_DISPLAY,		/* Display (e.g. DisplayPort, HDMI) */
 	UCLASS_DMA,		/* Direct Memory Access */
 	UCLASS_ETH,		/* Ethernet device */
+	UCLASS_ETH_PHY,		/* Ethernet PHY device */
 	UCLASS_GPIO,		/* Bank of general-purpose I/O pins */
 	UCLASS_FIRMWARE,	/* Firmware */
 	UCLASS_I2C,		/* I2C bus */
diff --git a/include/eth_phy.h b/include/eth_phy.h
new file mode 100644
index 0000000000..19c496551b
--- /dev/null
+++ b/include/eth_phy.h
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2020 NXP
+ */
+
+#ifndef _eth_phy_h_
+#define _eth_phy_h_
+
+#include <dm.h>
+#include <phy.h>
+
+int eth_phy_binds_nodes(struct udevice *eth_dev);
+int eth_phy_set_mdio_bus(struct udevice *eth_dev, struct mii_dev *mdio_bus);
+struct mii_dev *eth_phy_get_mdio_bus(struct udevice *eth_dev);
+int eth_phy_get_addr(struct udevice *dev);
+
+#endif
diff --git a/net/eth-uclass.c b/net/eth-uclass.c
index d30b04ba86..ff28351a0d 100644
--- a/net/eth-uclass.c
+++ b/net/eth-uclass.c
@@ -13,6 +13,7 @@
 #include <dm/device-internal.h>
 #include <dm/uclass-internal.h>
 #include "eth_internal.h"
+#include <eth_phy.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -443,6 +444,10 @@ static int eth_post_bind(struct udevice *dev)
 		return -EINVAL;
 	}
 
+#ifdef CONFIG_DM_ETH_PHY
+	eth_phy_binds_nodes(dev);
+#endif
+
 	return 0;
 }
 

commit 8a2d844d7d70ac9d97f9e6e344ff56ced05f8e3e
Author: Alex Marginean <alexm.osslist@gmail.com>
Date:   Mon Jun 3 19:10:30 2019 +0300

    UPSTREAM: net: introduce MDIO DM class for MDIO devices
    
    Adds UCLASS_MDIO DM class supporting MDIO buses that are probed as
    stand-alone devices.  Useful in particular for systems that support
    DM_ETH and have a stand-alone MDIO hardware block shared by multiple
    Ethernet interfaces.
    
    Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Acked-by: Joe Hershberger <joe.hershberger@ni.com>
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Change-Id: I8e106f4360aa46289e0ed551f8f685cad9dc6269

diff --git a/cmd/mdio.c b/cmd/mdio.c
index 21dc103736..5c2d91a830 100644
--- a/cmd/mdio.c
+++ b/cmd/mdio.c
@@ -195,6 +195,11 @@ static int do_mdio(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	if (argc < 2)
 		return CMD_RET_USAGE;
 
+#ifdef CONFIG_DM_MDIO
+	/* probe DM MII device before any operation so they are all accesible */
+	dm_mdio_probe_devices();
+#endif
+
 	/*
 	 * We use the last specified parameters, unless new ones are
 	 * entered.
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index ba2e81491d..e20373f2d6 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -10,6 +10,19 @@ config DM_ETH
 	  This is currently implemented in net/eth.c
 	  Look in include/net.h for details.
 
+config DM_MDIO
+	bool "Enable Driver Model for MDIO devices"
+	depends on DM_ETH && PHYLIB
+	help
+	  Enable driver model for MDIO devices
+
+	  Adds UCLASS_MDIO DM class supporting MDIO buses that are probed as
+	  stand-alone devices.  Useful in particular for systems that support
+	  DM_ETH and have a stand-alone MDIO hardware block shared by multiple
+	  Ethernet interfaces.
+	  This is currently implemented in net/mdio-uclass.c
+	  Look in include/miiphy.h for details.
+
 menuconfig NETDEVICES
 	bool "Network device support"
 	depends on NET
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index aa016578f0..b5ea2e01fe 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -51,6 +51,7 @@ enum uclass_id {
 	UCLASS_LPC,		/* x86 'low pin count' interface */
 	UCLASS_MAILBOX,		/* Mailbox controller */
 	UCLASS_MASS_STORAGE,	/* Mass storage device */
+	UCLASS_MDIO,		/* MDIO bus */
 	UCLASS_MISC,		/* Miscellaneous device */
 	UCLASS_MMC,		/* SD / MMC card or chip */
 	UCLASS_MOD_EXP,		/* RSA Mod Exp device */
diff --git a/include/miiphy.h b/include/miiphy.h
index fe8928a3a9..89ad6760ab 100644
--- a/include/miiphy.h
+++ b/include/miiphy.h
@@ -118,4 +118,53 @@ int bb_miiphy_write(struct mii_dev *miidev, int addr, int devad, int reg,
 #define ESTATUS_1000XF		0x8000
 #define ESTATUS_1000XH		0x4000
 
+#ifdef CONFIG_DM_MDIO
+
+/**
+ * struct mdio_perdev_priv - Per-device class data for MDIO DM
+ *
+ * @mii_bus: Supporting MII legacy bus
+ */
+struct mdio_perdev_priv {
+	struct mii_dev *mii_bus;
+};
+
+/**
+ * struct mdio_ops - MDIO bus operations
+ *
+ * @read: Read from a PHY register
+ * @write: Write to a PHY register
+ * @reset: Reset the MDIO bus, NULL if not supported
+ */
+struct mdio_ops {
+	int (*read)(struct udevice *mdio_dev, int addr, int devad, int reg);
+	int (*write)(struct udevice *mdio_dev, int addr, int devad, int reg,
+		     u16 val);
+	int (*reset)(struct udevice *mdio_dev);
+};
+
+#define mdio_get_ops(dev) ((struct mdio_ops *)(dev)->driver->ops)
+
+/**
+ * dm_mdio_probe_devices - Call probe on all MII devices, currently used for
+ * MDIO console commands.
+ */
+void dm_mdio_probe_devices(void);
+
+/**
+ * dm_mdio_phy_connect - Wrapper over phy_connect for DM MDIO
+ *
+ * @dev: mdio dev
+ * @addr: PHY address on MDIO bus
+ * @ethdev: ethernet device to connect to the PHY
+ * @interface: MAC-PHY protocol
+ *
+ * @return pointer to phy_device, or 0 on error
+ */
+struct phy_device *dm_mdio_phy_connect(struct udevice *dev, int addr,
+				       struct udevice *ethdev,
+				       phy_interface_t interface);
+
+#endif
+
 #endif
diff --git a/net/Makefile b/net/Makefile
index 9cd7c97add..718a15a376 100644
--- a/net/Makefile
+++ b/net/Makefile
@@ -17,6 +17,7 @@ obj-$(CONFIG_NET)      += eth-uclass.o
 else
 obj-$(CONFIG_NET)      += eth_legacy.o
 endif
+obj-$(CONFIG_DM_MDIO)  += mdio-uclass.o
 obj-$(CONFIG_NET)      += eth_common.o
 obj-$(CONFIG_CMD_LINK_LOCAL) += link_local.o
 obj-$(CONFIG_NET)      += net.o
diff --git a/net/mdio-uclass.c b/net/mdio-uclass.c
new file mode 100644
index 0000000000..36a404ff44
--- /dev/null
+++ b/net/mdio-uclass.c
@@ -0,0 +1,115 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2019
+ * Alex Marginean, NXP
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <miiphy.h>
+#include <dm/device-internal.h>
+#include <dm/uclass-internal.h>
+
+void dm_mdio_probe_devices(void)
+{
+	struct udevice *it;
+	struct uclass *uc;
+
+	uclass_get(UCLASS_MDIO, &uc);
+	uclass_foreach_dev(it, uc) {
+		device_probe(it);
+	}
+}
+
+static int dm_mdio_post_bind(struct udevice *dev)
+{
+	/*
+	 * MDIO command doesn't like spaces in names, don't allow them to keep
+	 * it happy
+	 */
+	if (strchr(dev->name, ' ')) {
+		debug("\nError: MDIO device name \"%s\" has a space!\n",
+		      dev->name);
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+/*
+ * Following read/write/reset functions are registered with legacy MII code.
+ * These are called for PHY operations by upper layers and we further call the
+ * DM MDIO driver functions.
+ */
+static int mdio_read(struct mii_dev *mii_bus, int addr, int devad, int reg)
+{
+	struct udevice *dev = mii_bus->priv;
+
+	return mdio_get_ops(dev)->read(dev, addr, devad, reg);
+}
+
+static int mdio_write(struct mii_dev *mii_bus, int addr, int devad, int reg,
+		      u16 val)
+{
+	struct udevice *dev = mii_bus->priv;
+
+	return mdio_get_ops(dev)->write(dev, addr, devad, reg, val);
+}
+
+static int mdio_reset(struct mii_dev *mii_bus)
+{
+	struct udevice *dev = mii_bus->priv;
+
+	if (mdio_get_ops(dev)->reset)
+		return mdio_get_ops(dev)->reset(dev);
+	else
+		return 0;
+}
+
+static int dm_mdio_post_probe(struct udevice *dev)
+{
+	struct mdio_perdev_priv *pdata = dev_get_uclass_priv(dev);
+
+	pdata->mii_bus = mdio_alloc();
+	pdata->mii_bus->read = mdio_read;
+	pdata->mii_bus->write = mdio_write;
+	pdata->mii_bus->reset = mdio_reset;
+	pdata->mii_bus->priv = dev;
+	strncpy(pdata->mii_bus->name, dev->name, MDIO_NAME_LEN);
+
+	return mdio_register(pdata->mii_bus);
+}
+
+static int dm_mdio_pre_remove(struct udevice *dev)
+{
+	struct mdio_perdev_priv *pdata = dev_get_uclass_priv(dev);
+	struct mdio_ops *ops = mdio_get_ops(dev);
+
+	if (ops->reset)
+		ops->reset(dev);
+	mdio_unregister(pdata->mii_bus);
+	mdio_free(pdata->mii_bus);
+
+	return 0;
+}
+
+struct phy_device *dm_mdio_phy_connect(struct udevice *dev, int addr,
+				       struct udevice *ethdev,
+				       phy_interface_t interface)
+{
+	struct mdio_perdev_priv *pdata = dev_get_uclass_priv(dev);
+
+	if (device_probe(dev))
+		return 0;
+
+	return phy_connect(pdata->mii_bus, addr, ethdev, interface);
+}
+
+UCLASS_DRIVER(mdio) = {
+	.id = UCLASS_MDIO,
+	.name = "mdio",
+	.post_bind  = dm_mdio_post_bind,
+	.post_probe = dm_mdio_post_probe,
+	.pre_remove = dm_mdio_pre_remove,
+	.per_device_auto_alloc_size = sizeof(struct mdio_perdev_priv),
+};

commit 01b8c4d110abb0dcbe36dc5b6b10d93b2b8e2667
Author: Joe Hershberger <joe.hershberger@ni.com>
Date:   Fri Apr 13 15:26:38 2018 -0500

    UPSTREAM: net: Make core net code depend on NET instead of CMD_NET
    
    No commands are necessary to have a network stack.
    
    Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
    
    Reviewed-by: Duncan Hare <dh@synoia.com>
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Change-Id: I84cbc5d7fc65f2f4b9b85285226727d3f43363ab

diff --git a/net/Makefile b/net/Makefile
index 6dfd82e647..9cd7c97add 100644
--- a/net/Makefile
+++ b/net/Makefile
@@ -13,13 +13,13 @@ obj-$(CONFIG_CMD_NET)  += bootp.o
 obj-$(CONFIG_CMD_CDP)  += cdp.o
 obj-$(CONFIG_CMD_DNS)  += dns.o
 ifdef CONFIG_DM_ETH
-obj-$(CONFIG_CMD_NET)  += eth-uclass.o
+obj-$(CONFIG_NET)      += eth-uclass.o
 else
-obj-$(CONFIG_CMD_NET)  += eth_legacy.o
+obj-$(CONFIG_NET)      += eth_legacy.o
 endif
-obj-$(CONFIG_CMD_NET)  += eth_common.o
+obj-$(CONFIG_NET)      += eth_common.o
 obj-$(CONFIG_CMD_LINK_LOCAL) += link_local.o
-obj-$(CONFIG_CMD_NET)  += net.o
+obj-$(CONFIG_NET)      += net.o
 obj-$(CONFIG_CMD_NFS)  += nfs.o
 obj-$(CONFIG_CMD_PING) += ping.o
 obj-$(CONFIG_CMD_RARP) += rarp.o

commit 07314278086d5b71916c9eae591bcf1bf265a663
Author: Marek Vasut <marex@denx.de>
Date:   Mon Mar 23 02:11:46 2020 +0100

    UPSTREAM: net: dwc_eth_qos: Prevent DMA from writing updated RX DMA descriptor
    
    The DMA may attempt to write a DMA descriptor in the ring while it is
    being updated. By writing the DMA descriptor buffer address to 0, it
    is assured the DMA will not use such a buffer and the buffer can be
    updated without any interference.
    
    Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
    Signed-off-by: Marek Vasut <marex@denx.de>
    Cc: Joe Hershberger <joe.hershberger@ni.com>
    Cc: Patrice Chotard <patrice.chotard@st.com>
    Cc: Patrick Delaunay <patrick.delaunay@st.com>
    Cc: Ramon Fried <rfried.dev@gmail.com>
    Cc: Stephen Warren <swarren@nvidia.com>
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Change-Id: If70a57f195c146d571de20385b55ff75f7dea7db

diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index fc48a46e2a..b5efe0792c 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -1476,8 +1476,10 @@ static int eqos_free_pkt(struct udevice *dev, uchar *packet, int length)
 
 	rx_desc = &(eqos->rx_descs[eqos->rx_desc_idx]);
 
+	rx_desc->des0 = 0;
+	mb();
+	eqos->config->ops->eqos_flush_desc(rx_desc);
 	eqos->config->ops->eqos_inval_buffer(packet, length);
-
 	rx_desc->des0 = (u32)(ulong)packet;
 	rx_desc->des1 = 0;
 	rx_desc->des2 = 0;

commit 076e66fb703709cbe72353619ebd6d8bfd625ca4
Author: Marek Vasut <marex@denx.de>
Date:   Mon Mar 23 02:09:55 2020 +0100

    UPSTREAM: net: dwc_eth_qos: Invalidate RX packet DMA buffer
    
    This patch prevents an issue where the RX packet might have been
    accessed by the CPU, which now has cached data from the packet in
    the caches and possibly various write buffers, and these data may
    be evicted from the caches into the DRAM while the buffer is also
    written by the DMA.
    
    By invalidating the buffer after the CPU accessed it and before the
    DMA populates the buffer, it is assured that the buffer will not be
    corrupted.
    
    Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
    Signed-off-by: Marek Vasut <marex@denx.de>
    Cc: Joe Hershberger <joe.hershberger@ni.com>
    Cc: Patrice Chotard <patrice.chotard@st.com>
    Cc: Patrick Delaunay <patrick.delaunay@st.com>
    Cc: Ramon Fried <rfried.dev@gmail.com>
    Cc: Stephen Warren <swarren@nvidia.com>
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Change-Id: I6271396aad6abac3fb11e5e742a3b2c9e7cc355b

diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index d88249e6ed..fc48a46e2a 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -1475,6 +1475,9 @@ static int eqos_free_pkt(struct udevice *dev, uchar *packet, int length)
 	}
 
 	rx_desc = &(eqos->rx_descs[eqos->rx_desc_idx]);
+
+	eqos->config->ops->eqos_inval_buffer(packet, length);
+
 	rx_desc->des0 = (u32)(ulong)packet;
 	rx_desc->des1 = 0;
 	rx_desc->des2 = 0;
@@ -1537,6 +1540,9 @@ static int eqos_probe_resources_core(struct udevice *dev)
 	}
 	debug("%s: rx_pkt=%p\n", __func__, eqos->rx_pkt);
 
+	eqos->config->ops->eqos_inval_buffer(eqos->rx_dma_buf,
+			EQOS_MAX_PACKET_SIZE * EQOS_DESCRIPTORS_RX);
+
 	debug("%s: OK\n", __func__);
 	return 0;
 

commit 865fce80b799dfba06699fb7b89c2a45f3c40fe6
Author: Marek Vasut <marex@denx.de>
Date:   Mon Mar 23 02:09:21 2020 +0100

    UPSTREAM: net: dwc_eth_qos: Invalidate RX descriptor before reading
    
    The current code polls the RX desciptor ring for new packets by reading
    the RX descriptor status. This works by accident, as the RX descriptors
    are often in non-cacheable memory. However, the driver does support use
    of RX descriptors in cacheable memory.
    
    This patch adds a missing RX descriptor invalidation, which assures the
    CPU will read a fresh copy of the RX descriptor instead of a cached one.
    
    Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
    Signed-off-by: Marek Vasut <marex@denx.de>
    Cc: Joe Hershberger <joe.hershberger@ni.com>
    Cc: Patrice Chotard <patrice.chotard@st.com>
    Cc: Patrick Delaunay <patrick.delaunay@st.com>
    Cc: Ramon Fried <rfried.dev@gmail.com>
    Cc: Stephen Warren <swarren@nvidia.com>
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Change-Id: Ia05e8a43d707088bc3699b7d00434c8d12d2692f

diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index 9eca8e4624..d88249e6ed 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -1442,6 +1442,7 @@ static int eqos_recv(struct udevice *dev, int flags, uchar **packetp)
 	debug("%s(dev=%p, flags=%x):\n", __func__, dev, flags);
 
 	rx_desc = &(eqos->rx_descs[eqos->rx_desc_idx]);
+	eqos->config->ops->eqos_inval_desc(rx_desc);
 	if (rx_desc->des3 & EQOS_DESC3_OWN) {
 		debug("%s: RX packet not available\n", __func__);
 		return -EAGAIN;

commit 6399c699b8045b5ccd61deb0716e4aca65153bf6
Author: Marek Vasut <marex@denx.de>
Date:   Mon Mar 23 02:09:01 2020 +0100

    UPSTREAM: net: dwc_eth_qos: Flush the RX descriptors on init
    
    Currently the code only flushes the first RX descriptor, not every entry
    in the RX descriptor ring. Fix this, to make sure the DMA engine can pick
    the RX descriptors correctly.
    
    Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
    Signed-off-by: Marek Vasut <marex@denx.de>
    Cc: Joe Hershberger <joe.hershberger@ni.com>
    Cc: Patrice Chotard <patrice.chotard@st.com>
    Cc: Patrick Delaunay <patrick.delaunay@st.com>
    Cc: Ramon Fried <rfried.dev@gmail.com>
    Cc: Stephen Warren <swarren@nvidia.com>
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Change-Id: I7a37f8a1fd51b2b7ca4fb557885d711ebd72c49c

diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index 7ae1a8ba5b..9eca8e4624 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -1288,8 +1288,8 @@ static int eqos_start(struct udevice *dev)
 		rx_desc->des0 = (u32)(ulong)(eqos->rx_dma_buf +
 					     (i * EQOS_MAX_PACKET_SIZE));
 		rx_desc->des3 = EQOS_DESC3_OWN | EQOS_DESC3_BUF1V;
+		eqos->config->ops->eqos_flush_desc(rx_desc);
 	}
-	eqos->config->ops->eqos_flush_desc(eqos->descs);
 
 	writel(0, &eqos->dma_regs->ch0_txdesc_list_haddress);
 	writel((ulong)eqos->tx_descs, &eqos->dma_regs->ch0_txdesc_list_address);

commit 364f8fdc575365e567134a325b71382cb9d58e24
Author: Marek Vasut <marex@denx.de>
Date:   Mon Mar 23 02:03:50 2020 +0100

    UPSTREAM: net: dwc_eth_qos: Correctly wrap around TX descriptor tail pointer
    
    This code programs the next descriptor in the TX descriptor ring into
    the hardware as the last valid TX descriptor. The problem is that if
    the currenty descriptor is the last one in the array, the code will
    not wrap around correctly and use TX descriptor 0 again, but instead
    will use TX descriptor at address right past the TX descriptor ring,
    which is the first descriptor in the RX ring.
    
    Fix this by adding the necessary wrap-around.
    
    Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
    Signed-off-by: Marek Vasut <marex@denx.de>
    Cc: Joe Hershberger <joe.hershberger@ni.com>
    Cc: Patrice Chotard <patrice.chotard@st.com>
    Cc: Patrick Delaunay <patrick.delaunay@st.com>
    Cc: Ramon Fried <rfried.dev@gmail.com>
    Cc: Stephen Warren <swarren@nvidia.com>
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Change-Id: Iaf0f5dba76c232af1cbef628c099aaf43542757d

diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index 9f532e873e..7ae1a8ba5b 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -1418,7 +1418,8 @@ static int eqos_send(struct udevice *dev, void *packet, int length)
 	tx_desc->des3 = EQOS_DESC3_OWN | EQOS_DESC3_FD | EQOS_DESC3_LD | length;
 	eqos->config->ops->eqos_flush_desc(tx_desc);
 
-	writel((ulong)(tx_desc + 1), &eqos->dma_regs->ch0_txdesc_tail_pointer);
+	writel((ulong)(&(eqos->tx_descs[eqos->tx_desc_idx])),
+		&eqos->dma_regs->ch0_txdesc_tail_pointer);
 
 	for (i = 0; i < 1000000; i++) {
 		eqos->config->ops->eqos_inval_desc(tx_desc);

commit 6143c348bd705a3b4569488cd0dc6e3a6ba59630
Author: Marek Vasut <marex@denx.de>
Date:   Mon Mar 23 02:02:57 2020 +0100

    UPSTREAM: net: dwc_eth_qos: Fully rewrite RX descriptor field 3
    
    The RX descriptor field 3 should contain only OWN and BUF1V bits before
    being used for receiving data by the DMA engine. However, right now, if
    the descriptor was already used for receiving data and is being cleared,
    the field 3 is only modified and the aforementioned two bits are ORRed
    into the field. This could lead to a residual dirty bits being left in
    the field 3 from previous transfer, and it generally does. Fully set the
    field 3 instead to clear those residual dirty bits.
    
    Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
    Signed-off-by: Marek Vasut <marex@denx.de>
    Cc: Joe Hershberger <joe.hershberger@ni.com>
    Cc: Patrice Chotard <patrice.chotard@st.com>
    Cc: Patrick Delaunay <patrick.delaunay@st.com>
    Cc: Ramon Fried <rfried.dev@gmail.com>
    Cc: Stephen Warren <swarren@nvidia.com>
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Change-Id: I5b116fa58de65b3958c3ddd87f6c182c532b9542

diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index 1fe716d786..9f532e873e 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -1287,7 +1287,7 @@ static int eqos_start(struct udevice *dev)
 		struct eqos_desc *rx_desc = &(eqos->rx_descs[i]);
 		rx_desc->des0 = (u32)(ulong)(eqos->rx_dma_buf +
 					     (i * EQOS_MAX_PACKET_SIZE));
-		rx_desc->des3 |= EQOS_DESC3_OWN | EQOS_DESC3_BUF1V;
+		rx_desc->des3 = EQOS_DESC3_OWN | EQOS_DESC3_BUF1V;
 	}
 	eqos->config->ops->eqos_flush_desc(eqos->descs);
 
@@ -1481,7 +1481,7 @@ static int eqos_free_pkt(struct udevice *dev, uchar *packet, int length)
 	 * writes to the rest of the descriptor too.
 	 */
 	mb();
-	rx_desc->des3 |= EQOS_DESC3_OWN | EQOS_DESC3_BUF1V;
+	rx_desc->des3 = EQOS_DESC3_OWN | EQOS_DESC3_BUF1V;
 	eqos->config->ops->eqos_flush_desc(rx_desc);
 
 	writel((ulong)rx_desc, &eqos->dma_regs->ch0_rxdesc_tail_pointer);

commit 83d31c080c5c47ebba82e261b5345bdd323ae5e5
Author: Patrick Delaunay <patrick.delaunay@st.com>
Date:   Wed Mar 18 10:50:16 2020 +0100

    UPSTREAM: net: dwc_eth_qos: implement phy reg and max-speed for stm32
    
    Add management of property "reg" to configure @ of phy and
    also "max-speed" property to specify maximum speed in Mbit/s
    supported by the device
    
    Signed-off-by: Christophe Roullier <christophe.roullier@st.com>
    Reviewed-by: Patrick DELAUNAY <patrick.delaunay@st.com>
    Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Change-Id: I6ecabcffc4782f1e641d8ee1021f6c3caf360707

diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index 951bfa7a2b..1fe716d786 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -305,6 +305,8 @@ struct eqos_priv {
 	struct clk clk_slave_bus;
 	struct mii_dev *mii;
 	struct phy_device *phy;
+	int phyaddr;
+	u32 max_speed;
 	void *descs;
 	struct eqos_desc *tx_descs;
 	struct eqos_desc *rx_descs;
@@ -1080,12 +1082,21 @@ static int eqos_start(struct udevice *dev)
 	 * don't need to reconnect/reconfigure again
 	 */
 	if (!eqos->phy) {
-		eqos->phy = phy_connect(eqos->mii, -1, dev,
+		eqos->phy = phy_connect(eqos->mii, eqos->phyaddr, dev,
 					eqos->config->interface(dev));
 		if (!eqos->phy) {
 			pr_err("phy_connect() failed");
 			goto err_stop_resets;
 		}
+
+		if (eqos->max_speed) {
+			ret = phy_set_supported(eqos->phy, eqos->max_speed);
+			if (ret) {
+				pr_err("phy_set_supported() failed: %d", ret);
+				goto err_shutdown_phy;
+			}
+		}
+
 		ret = phy_config(eqos->phy);
 		if (ret < 0) {
 			pr_err("phy_config() failed: %d", ret);
@@ -1653,6 +1664,8 @@ static int eqos_probe_resources_stm32(struct udevice *dev)
 	if (ret)
 		return -EINVAL;
 
+	eqos->max_speed = dev_read_u32_default(dev, "max-speed", 0);
+
 	ret = clk_get_by_name(dev, "stmmaceth", &eqos->clk_master_bus);
 	if (ret) {
 		pr_err("clk_get_by_name(master_bus) failed: %d", ret);
@@ -1676,6 +1689,7 @@ static int eqos_probe_resources_stm32(struct udevice *dev)
 	if (ret)
 		pr_warn("No phy clock provided %d", ret);
 
+	eqos->phyaddr = -1;
 	ret = dev_read_phandle_with_args(dev, "phy-handle", NULL, 0, 0,
 					 &phandle_args);
 	if (!ret) {
@@ -1688,6 +1702,9 @@ static int eqos_probe_resources_stm32(struct udevice *dev)
 		if (ret)
 			pr_warn("gpio_request_by_name(phy reset) not provided %d",
 				ret);
+
+		eqos->phyaddr = ofnode_read_u32_default(phandle_args.node,
+							"reg", -1);
 	}
 
 	debug("%s: OK\n", __func__);

commit 5bd3c53883fa7a29a5812702c076abb4e413d6f2
Author: Christophe Roullier <christophe.roullier@st.com>
Date:   Wed Mar 18 10:50:15 2020 +0100

    UPSTREAM: net: dwc_eth_qos: implement reset-gpios for stm32
    
    Add management of property "reset-gpios" in the node identified by
    "phy-handle" to configure any GPIO used to reset the PHY.
    
    Signed-off-by: Christophe Roullier <christophe.roullier@st.com>
    Reviewed-by: Patrice CHOTARD <patrice.chotard@st.com>
    Reviewed-by: Patrick DELAUNAY <patrick.delaunay@st.com>
    Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Change-Id: Ia7dfcafc2e2f90a5ca48205dd2562fb62a3d6d84

diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index 36ed854561..951bfa7a2b 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -693,6 +693,29 @@ static int eqos_start_resets_tegra186(struct udevice *dev)
 
 static int eqos_start_resets_stm32(struct udevice *dev)
 {
+	struct eqos_priv *eqos = dev_get_priv(dev);
+	int ret;
+
+	debug("%s(dev=%p):\n", __func__, dev);
+	if (dm_gpio_is_valid(&eqos->phy_reset_gpio)) {
+		ret = dm_gpio_set_value(&eqos->phy_reset_gpio, 1);
+		if (ret < 0) {
+			pr_err("dm_gpio_set_value(phy_reset, assert) failed: %d",
+			       ret);
+			return ret;
+		}
+
+		udelay(2);
+
+		ret = dm_gpio_set_value(&eqos->phy_reset_gpio, 0);
+		if (ret < 0) {
+			pr_err("dm_gpio_set_value(phy_reset, deassert) failed: %d",
+			       ret);
+			return ret;
+		}
+	}
+	debug("%s: OK\n", __func__);
+
 	return 0;
 }
 
@@ -708,6 +731,18 @@ static int eqos_stop_resets_tegra186(struct udevice *dev)
 
 static int eqos_stop_resets_stm32(struct udevice *dev)
 {
+	struct eqos_priv *eqos = dev_get_priv(dev);
+	int ret;
+
+	if (dm_gpio_is_valid(&eqos->phy_reset_gpio)) {
+		ret = dm_gpio_set_value(&eqos->phy_reset_gpio, 1);
+		if (ret < 0) {
+			pr_err("dm_gpio_set_value(phy_reset, assert) failed: %d",
+			       ret);
+			return ret;
+		}
+	}
+
 	return 0;
 }
 
@@ -1603,6 +1638,7 @@ static int eqos_probe_resources_stm32(struct udevice *dev)
 	struct eqos_priv *eqos = dev_get_priv(dev);
 	int ret;
 	phy_interface_t interface;
+	struct ofnode_phandle_args phandle_args;
 
 	debug("%s(dev=%p):\n", __func__, dev);
 
@@ -1640,6 +1676,20 @@ static int eqos_probe_resources_stm32(struct udevice *dev)
 	if (ret)
 		pr_warn("No phy clock provided %d", ret);
 
+	ret = dev_read_phandle_with_args(dev, "phy-handle", NULL, 0, 0,
+					 &phandle_args);
+	if (!ret) {
+		/* search "reset-gpios" in phy node */
+		ret = gpio_request_by_name_nodev(phandle_args.node,
+						 "reset-gpios", 0,
+						 &eqos->phy_reset_gpio,
+						 GPIOD_IS_OUT |
+						 GPIOD_IS_OUT_ACTIVE);
+		if (ret)
+			pr_warn("gpio_request_by_name(phy reset) not provided %d",
+				ret);
+	}
+
 	debug("%s: OK\n", __func__);
 	return 0;
 
@@ -1703,6 +1753,9 @@ static int eqos_remove_resources_stm32(struct udevice *dev)
 	if (clk_valid(&eqos->clk_ck))
 		clk_free(&eqos->clk_ck);
 
+	if (dm_gpio_is_valid(&eqos->phy_reset_gpio))
+		dm_gpio_free(dev, &eqos->phy_reset_gpio);
+
 	debug("%s: OK\n", __func__);
 	return 0;
 }

commit 369f6fd338b651f5808b1889e2fb216a0049e42b
Author: Marek Vasut <marex@denx.de>
Date:   Wed Dec 18 07:48:50 2019 +0100

    UPSTREAM: net: dwc_eth_qos: Pass -1 to phy_connect() to scan for all PHYs
    
    PHY address 0 is a valid PHY address, to scan for all PHYs, pass -1 to
    phy_connect(). Passing 0 used to work before be accident, but does no
    longer.
    
    Signed-off-by: Marek Vasut <marex@denx.de>
    Cc: Joe Hershberger <joe.hershberger@ni.com>
    Cc: Patrice Chotard <patrice.chotard@st.com>
    Cc: Patrick Delaunay <patrick.delaunay@st.com>
    Cc: Ramon Fried <rfried.dev@gmail.com>
    Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
    Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
    Acked-by: Joe Hershberger <joe.hershberger@ni.com>
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Change-Id: Ibc8a780b8a7e1be6f827ca901d0b1f2b384ca627

diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index fd5077a63c..36ed854561 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -1045,7 +1045,7 @@ static int eqos_start(struct udevice *dev)
 	 * don't need to reconnect/reconfigure again
 	 */
 	if (!eqos->phy) {
-		eqos->phy = phy_connect(eqos->mii, 0, dev,
+		eqos->phy = phy_connect(eqos->mii, -1, dev,
 					eqos->config->interface(dev));
 		if (!eqos->phy) {
 			pr_err("phy_connect() failed");

commit 1e8d5d80b6b0adbeed4bfa0a78cc7ed757ecea66
Author: Patrick Delaunay <patrick.delaunay@st.com>
Date:   Thu Aug 1 11:29:03 2019 +0200

    UPSTREAM: net: dwc_et_qos: update weak function board_interface_eth_init
    
    Align the board and driver prototype for board_interface_eth_init
    to avoid execution issue (the interface_type parameter is defined
    as int or phy_interface_t).
    
    To have a generic weak function (it should be reused by other driver)
    I change the prototype to use directly udevice.
    
    This prototype is added in netdev.h to allow compilation check
    and avoid warning when compiling with W=1 on file
    board/st/stm32mp1/stm32mp1.c
    
    warning: no previous prototype for 'board_interface_eth_init'\
    [-Wmissing-prototypes]
         int board_interface_eth_init(int interface_type, ....
             ^~~~~~~~~~~~~~~~~~~~~~~~
    
    Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
    Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
    Acked-by: Joe Hershberger <joe.hershberger@ni.com>
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Change-Id: I7301e49ef8e51ecdde0629a69d7bcc07465952d0

diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c
index 76917b022e..5398632667 100644
--- a/board/st/stm32mp1/stm32mp1.c
+++ b/board/st/stm32mp1/stm32mp1.c
@@ -12,6 +12,9 @@
 #include <i2c.h>
 #include <led.h>
 #include <misc.h>
+#include <mtd.h>
+#include <mtd_node.h>
+#include <netdev.h>
 #include <phy.h>
 #include <reset.h>
 #include <syscon.h>
@@ -504,3 +507,73 @@ void board_quiesce_devices(void)
 {
 	setup_led(LEDST_OFF);
 }
+
+/* eth init function : weak called in eqos driver */
+int board_interface_eth_init(struct udevice *dev,
+			     phy_interface_t interface_type)
+{
+	u8 *syscfg;
+	u32 value;
+	bool eth_clk_sel_reg = false;
+	bool eth_ref_clk_sel_reg = false;
+
+	/* Gigabit Ethernet 125MHz clock selection. */
+	eth_clk_sel_reg = dev_read_bool(dev, "st,eth_clk_sel");
+
+	/* Ethernet 50Mhz RMII clock selection */
+	eth_ref_clk_sel_reg =
+		dev_read_bool(dev, "st,eth_ref_clk_sel");
+
+	syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
+
+	if (!syscfg)
+		return -ENODEV;
+
+	switch (interface_type) {
+	case PHY_INTERFACE_MODE_MII:
+		value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
+			SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
+		debug("%s: PHY_INTERFACE_MODE_MII\n", __func__);
+		break;
+	case PHY_INTERFACE_MODE_GMII:
+		if (eth_clk_sel_reg)
+			value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
+				SYSCFG_PMCSETR_ETH_CLK_SEL;
+		else
+			value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII;
+		debug("%s: PHY_INTERFACE_MODE_GMII\n", __func__);
+		break;
+	case PHY_INTERFACE_MODE_RMII:
+		if (eth_ref_clk_sel_reg)
+			value = SYSCFG_PMCSETR_ETH_SEL_RMII |
+				SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
+		else
+			value = SYSCFG_PMCSETR_ETH_SEL_RMII;
+		debug("%s: PHY_INTERFACE_MODE_RMII\n", __func__);
+		break;
+	case PHY_INTERFACE_MODE_RGMII:
+	case PHY_INTERFACE_MODE_RGMII_ID:
+	case PHY_INTERFACE_MODE_RGMII_RXID:
+	case PHY_INTERFACE_MODE_RGMII_TXID:
+		if (eth_clk_sel_reg)
+			value = SYSCFG_PMCSETR_ETH_SEL_RGMII |
+				SYSCFG_PMCSETR_ETH_CLK_SEL;
+		else
+			value = SYSCFG_PMCSETR_ETH_SEL_RGMII;
+		debug("%s: PHY_INTERFACE_MODE_RGMII\n", __func__);
+		break;
+	default:
+		debug("%s: Do not manage %d interface\n",
+		      __func__, interface_type);
+		/* Do not manage others interfaces */
+		return -EINVAL;
+	}
+
+	/* clear and set ETH configuration bits */
+	writel(SYSCFG_PMCSETR_ETH_SEL_MASK | SYSCFG_PMCSETR_ETH_SELMII |
+	       SYSCFG_PMCSETR_ETH_REF_CLK_SEL | SYSCFG_PMCSETR_ETH_CLK_SEL,
+	       syscfg + SYSCFG_PMCCLRR);
+	writel(value, syscfg + SYSCFG_PMCSETR);
+
+	return 0;
+}
diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index 0e7534b918..fd5077a63c 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -1592,8 +1592,8 @@ err_free_reset_eqos:
 }
 
 /* board-specific Ethernet Interface initializations. */
-__weak int board_interface_eth_init(int interface_type, bool eth_clk_sel_reg,
-				    bool eth_ref_clk_sel_reg)
+__weak int board_interface_eth_init(struct udevice *dev,
+				    phy_interface_t interface_type)
 {
 	return 0;
 }
@@ -1603,8 +1603,6 @@ static int eqos_probe_resources_stm32(struct udevice *dev)
 	struct eqos_priv *eqos = dev_get_priv(dev);
 	int ret;
 	phy_interface_t interface;
-	bool eth_clk_sel_reg = false;
-	bool eth_ref_clk_sel_reg = false;
 
 	debug("%s(dev=%p):\n", __func__, dev);
 
@@ -1615,15 +1613,7 @@ static int eqos_probe_resources_stm32(struct udevice *dev)
 		return -EINVAL;
 	}
 
-	/* Gigabit Ethernet 125MHz clock selection. */
-	eth_clk_sel_reg = dev_read_bool(dev, "st,eth_clk_sel");
-
-	/* Ethernet 50Mhz RMII clock selection */
-	eth_ref_clk_sel_reg =
-		dev_read_bool(dev, "st,eth_ref_clk_sel");
-
-	ret = board_interface_eth_init(interface, eth_clk_sel_reg,
-				       eth_ref_clk_sel_reg);
+	ret = board_interface_eth_init(dev, interface);
 	if (ret)
 		return -EINVAL;
 
diff --git a/include/netdev.h b/include/netdev.h
index b9bfebac67..426158a266 100644
--- a/include/netdev.h
+++ b/include/netdev.h
@@ -11,6 +11,7 @@
 
 #ifndef _NETDEV_H_
 #define _NETDEV_H_
+#include <phy_interface.h>
 
 /*
  * Board and CPU-specific initialization functions
@@ -22,6 +23,8 @@
  */
 
 int board_eth_init(bd_t *bis);
+int board_interface_eth_init(struct udevice *dev,
+			     phy_interface_t interface_type);
 int cpu_eth_init(bd_t *bis);
 
 /* Driver initialization prototypes */

commit 8aaada72f08318cc389548ef622179d7e190f020
Author: Patrick Delaunay <patrick.delaunay@st.com>
Date:   Thu Aug 1 11:29:02 2019 +0200

    UPSTREAM: net: dwc_eth_qos: Change eqos_ops function to static
    
    This patch solves many warnings when compiling with W=1:
    warning: no previous prototype for '....' [-Wmissing-prototypes]
    
    Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
    Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
    Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
    Acked-by: Joe Hershberger <joe.hershberger@ni.com>
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Change-Id: Ice01d9d56324b450f313a4a74e5039581e20a08e

diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index 74206e262d..0e7534b918 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -622,7 +622,7 @@ err:
 	return ret;
 }
 
-void eqos_stop_clks_tegra186(struct udevice *dev)
+static void eqos_stop_clks_tegra186(struct udevice *dev)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
 
@@ -637,7 +637,7 @@ void eqos_stop_clks_tegra186(struct udevice *dev)
 	debug("%s: OK\n", __func__);
 }
 
-void eqos_stop_clks_stm32(struct udevice *dev)
+static void eqos_stop_clks_stm32(struct udevice *dev)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
 
@@ -1291,7 +1291,7 @@ err:
 	return ret;
 }
 
-void eqos_stop(struct udevice *dev)
+static void eqos_stop(struct udevice *dev)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
 	int i;
@@ -1345,7 +1345,7 @@ void eqos_stop(struct udevice *dev)
 	debug("%s: OK\n", __func__);
 }
 
-int eqos_send(struct udevice *dev, void *packet, int length)
+static int eqos_send(struct udevice *dev, void *packet, int length)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
 	struct eqos_desc *tx_desc;
@@ -1386,7 +1386,7 @@ int eqos_send(struct udevice *dev, void *packet, int length)
 	return -ETIMEDOUT;
 }
 
-int eqos_recv(struct udevice *dev, int flags, uchar **packetp)
+static int eqos_recv(struct udevice *dev, int flags, uchar **packetp)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
 	struct eqos_desc *rx_desc;
@@ -1410,7 +1410,7 @@ int eqos_recv(struct udevice *dev, int flags, uchar **packetp)
 	return length;
 }
 
-int eqos_free_pkt(struct udevice *dev, uchar *packet, int length)
+static int eqos_free_pkt(struct udevice *dev, uchar *packet, int length)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
 	uchar *packet_expected;

commit 7a4c4edd4e04bb8e64a7a0e1b008fce5ad673824
Author: Christophe Roullier <christophe.roullier@st.com>
Date:   Fri May 17 15:08:44 2019 +0200

    UPSTREAM: net: dwc_eth_qos: add Ethernet stm32mp1 support
    
    Synopsys GMAC 4.20 is used. And Phy mode for eval and disco is RMII
    with PHY Realtek RTL8211 (RGMII)
    We also support some other PHY config on stm32mp157c
    PHY_MODE        (MII,GMII, RMII, RGMII) and in normal,
    PHY wo crystal (25Mhz and 50Mhz), No 125Mhz from PHY config
    
    Signed-off-by: Christophe Roullier <christophe.roullier@st.com>
    Acked-by: Joe Hershberger <joe.hershberger@ni.com>
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Change-Id: Ie696f22dd260f6712c61744c60dc9d5a64737a5a

diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index 232e8034df..74206e262d 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -27,7 +27,6 @@
  *    supports a single RGMII PHY. This configuration also has SW control over
  *    all clock and reset signals to the HW block.
  */
-
 #include <common.h>
 #include <clk.h>
 #include <dm.h>
@@ -96,6 +95,7 @@ struct eqos_mac_regs {
 #define EQOS_MAC_RXQ_CTRL0_RXQ0EN_MASK			3
 #define EQOS_MAC_RXQ_CTRL0_RXQ0EN_NOT_ENABLED		0
 #define EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_DCB		2
+#define EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_AV		1
 
 #define EQOS_MAC_RXQ_CTRL2_PSRQ0_SHIFT			0
 #define EQOS_MAC_RXQ_CTRL2_PSRQ0_MASK			0xff
@@ -109,6 +109,7 @@ struct eqos_mac_regs {
 #define EQOS_MAC_MDIO_ADDRESS_RDA_SHIFT			16
 #define EQOS_MAC_MDIO_ADDRESS_CR_SHIFT			8
 #define EQOS_MAC_MDIO_ADDRESS_CR_20_35			2
+#define EQOS_MAC_MDIO_ADDRESS_CR_250_300		5
 #define EQOS_MAC_MDIO_ADDRESS_SKAP			BIT(4)
 #define EQOS_MAC_MDIO_ADDRESS_GOC_SHIFT			2
 #define EQOS_MAC_MDIO_ADDRESS_GOC_READ			3
@@ -261,6 +262,29 @@ struct eqos_desc {
 
 struct eqos_config {
 	bool reg_access_always_ok;
+	int mdio_wait;
+	int swr_wait;
+	int config_mac;
+	int config_mac_mdio;
+	phy_interface_t (*interface)(struct udevice *dev);
+	struct eqos_ops *ops;
+};
+
+struct eqos_ops {
+	void (*eqos_inval_desc)(void *desc);
+	void (*eqos_flush_desc)(void *desc);
+	void (*eqos_inval_buffer)(void *buf, size_t size);
+	void (*eqos_flush_buffer)(void *buf, size_t size);
+	int (*eqos_probe_resources)(struct udevice *dev);
+	int (*eqos_remove_resources)(struct udevice *dev);
+	int (*eqos_stop_resets)(struct udevice *dev);
+	int (*eqos_start_resets)(struct udevice *dev);
+	void (*eqos_stop_clks)(struct udevice *dev);
+	int (*eqos_start_clks)(struct udevice *dev);
+	int (*eqos_calibrate_pads)(struct udevice *dev);
+	int (*eqos_disable_calibration)(struct udevice *dev);
+	int (*eqos_set_tx_clk_speed)(struct udevice *dev);
+	ulong (*eqos_get_tick_clk_rate)(struct udevice *dev);
 };
 
 struct eqos_priv {
@@ -277,6 +301,7 @@ struct eqos_priv {
 	struct clk clk_rx;
 	struct clk clk_ptp_ref;
 	struct clk clk_tx;
+	struct clk clk_ck;
 	struct clk clk_slave_bus;
 	struct mii_dev *mii;
 	struct phy_device *phy;
@@ -328,7 +353,7 @@ static void eqos_free_descs(void *descs)
 #endif
 }
 
-static void eqos_inval_desc(void *desc)
+static void eqos_inval_desc_tegra186(void *desc)
 {
 #ifndef CONFIG_SYS_NONCACHED_MEMORY
 	unsigned long start = (unsigned long)desc & ~(ARCH_DMA_MINALIGN - 1);
@@ -339,14 +364,36 @@ static void eqos_inval_desc(void *desc)
 #endif
 }
 
-static void eqos_flush_desc(void *desc)
+static void eqos_inval_desc_stm32(void *desc)
+{
+#ifndef CONFIG_SYS_NONCACHED_MEMORY
+	unsigned long start = rounddown((unsigned long)desc, ARCH_DMA_MINALIGN);
+	unsigned long end = roundup((unsigned long)desc + EQOS_DESCRIPTOR_SIZE,
+				    ARCH_DMA_MINALIGN);
+
+	invalidate_dcache_range(start, end);
+#endif
+}
+
+static void eqos_flush_desc_tegra186(void *desc)
 {
 #ifndef CONFIG_SYS_NONCACHED_MEMORY
 	flush_cache((unsigned long)desc, EQOS_DESCRIPTOR_SIZE);
 #endif
 }
 
-static void eqos_inval_buffer(void *buf, size_t size)
+static void eqos_flush_desc_stm32(void *desc)
+{
+#ifndef CONFIG_SYS_NONCACHED_MEMORY
+	unsigned long start = rounddown((unsigned long)desc, ARCH_DMA_MINALIGN);
+	unsigned long end = roundup((unsigned long)desc + EQOS_DESCRIPTOR_SIZE,
+				    ARCH_DMA_MINALIGN);
+
+	flush_dcache_range(start, end);
+#endif
+}
+
+static void eqos_inval_buffer_tegra186(void *buf, size_t size)
 {
 	unsigned long start = (unsigned long)buf & ~(ARCH_DMA_MINALIGN - 1);
 	unsigned long end = ALIGN(start + size, ARCH_DMA_MINALIGN);
@@ -354,11 +401,29 @@ static void eqos_inval_buffer(void *buf, size_t size)
 	invalidate_dcache_range(start, end);
 }
 
-static void eqos_flush_buffer(void *buf, size_t size)
+static void eqos_inval_buffer_stm32(void *buf, size_t size)
+{
+	unsigned long start = rounddown((unsigned long)buf, ARCH_DMA_MINALIGN);
+	unsigned long end = roundup((unsigned long)buf + size,
+				    ARCH_DMA_MINALIGN);
+
+	invalidate_dcache_range(start, end);
+}
+
+static void eqos_flush_buffer_tegra186(void *buf, size_t size)
 {
 	flush_cache((unsigned long)buf, size);
 }
 
+static void eqos_flush_buffer_stm32(void *buf, size_t size)
+{
+	unsigned long start = rounddown((unsigned long)buf, ARCH_DMA_MINALIGN);
+	unsigned long end = roundup((unsigned long)buf + size,
+				    ARCH_DMA_MINALIGN);
+
+	flush_dcache_range(start, end);
+}
+
 static int eqos_mdio_wait_idle(struct eqos_priv *eqos)
 {
 	return wait_for_bit_le32(&eqos->mac_regs->mdio_address,
@@ -387,14 +452,14 @@ static int eqos_mdio_read(struct mii_dev *bus, int mdio_addr, int mdio_devad,
 		EQOS_MAC_MDIO_ADDRESS_C45E;
 	val |= (mdio_addr << EQOS_MAC_MDIO_ADDRESS_PA_SHIFT) |
 		(mdio_reg << EQOS_MAC_MDIO_ADDRESS_RDA_SHIFT) |
-		(EQOS_MAC_MDIO_ADDRESS_CR_20_35 <<
+		(eqos->config->config_mac_mdio <<
 		 EQOS_MAC_MDIO_ADDRESS_CR_SHIFT) |
 		(EQOS_MAC_MDIO_ADDRESS_GOC_READ <<
 		 EQOS_MAC_MDIO_ADDRESS_GOC_SHIFT) |
 		EQOS_MAC_MDIO_ADDRESS_GB;
 	writel(val, &eqos->mac_regs->mdio_address);
 
-	udelay(10);
+	udelay(eqos->config->mdio_wait);
 
 	ret = eqos_mdio_wait_idle(eqos);
 	if (ret) {
@@ -433,14 +498,14 @@ static int eqos_mdio_write(struct mii_dev *bus, int mdio_addr, int mdio_devad,
 		EQOS_MAC_MDIO_ADDRESS_C45E;
 	val |= (mdio_addr << EQOS_MAC_MDIO_ADDRESS_PA_SHIFT) |
 		(mdio_reg << EQOS_MAC_MDIO_ADDRESS_RDA_SHIFT) |
-		(EQOS_MAC_MDIO_ADDRESS_CR_20_35 <<
+		(eqos->config->config_mac_mdio <<
 		 EQOS_MAC_MDIO_ADDRESS_CR_SHIFT) |
 		(EQOS_MAC_MDIO_ADDRESS_GOC_WRITE <<
 		 EQOS_MAC_MDIO_ADDRESS_GOC_SHIFT) |
 		EQOS_MAC_MDIO_ADDRESS_GB;
 	writel(val, &eqos->mac_regs->mdio_address);
 
-	udelay(10);
+	udelay(eqos->config->mdio_wait);
 
 	ret = eqos_mdio_wait_idle(eqos);
 	if (ret) {
@@ -510,6 +575,53 @@ err:
 	return ret;
 }
 
+static int eqos_start_clks_stm32(struct udevice *dev)
+{
+	struct eqos_priv *eqos = dev_get_priv(dev);
+	int ret;
+
+	debug("%s(dev=%p):\n", __func__, dev);
+
+	ret = clk_enable(&eqos->clk_master_bus);
+	if (ret < 0) {
+		pr_err("clk_enable(clk_master_bus) failed: %d", ret);
+		goto err;
+	}
+
+	ret = clk_enable(&eqos->clk_rx);
+	if (ret < 0) {
+		pr_err("clk_enable(clk_rx) failed: %d", ret);
+		goto err_disable_clk_master_bus;
+	}
+
+	ret = clk_enable(&eqos->clk_tx);
+	if (ret < 0) {
+		pr_err("clk_enable(clk_tx) failed: %d", ret);
+		goto err_disable_clk_rx;
+	}
+
+	if (clk_valid(&eqos->clk_ck)) {
+		ret = clk_enable(&eqos->clk_ck);
+		if (ret < 0) {
+			pr_err("clk_enable(clk_ck) failed: %d", ret);
+			goto err_disable_clk_tx;
+		}
+	}
+
+	debug("%s: OK\n", __func__);
+	return 0;
+
+err_disable_clk_tx:
+	clk_disable(&eqos->clk_tx);
+err_disable_clk_rx:
+	clk_disable(&eqos->clk_rx);
+err_disable_clk_master_bus:
+	clk_disable(&eqos->clk_master_bus);
+err:
+	debug("%s: FAILED: %d\n", __func__, ret);
+	return ret;
+}
+
 void eqos_stop_clks_tegra186(struct udevice *dev)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
@@ -525,6 +637,21 @@ void eqos_stop_clks_tegra186(struct udevice *dev)
 	debug("%s: OK\n", __func__);
 }
 
+void eqos_stop_clks_stm32(struct udevice *dev)
+{
+	struct eqos_priv *eqos = dev_get_priv(dev);
+
+	debug("%s(dev=%p):\n", __func__, dev);
+
+	clk_disable(&eqos->clk_tx);
+	clk_disable(&eqos->clk_rx);
+	clk_disable(&eqos->clk_master_bus);
+	if (clk_valid(&eqos->clk_ck))
+		clk_disable(&eqos->clk_ck);
+
+	debug("%s: OK\n", __func__);
+}
+
 static int eqos_start_resets_tegra186(struct udevice *dev)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
@@ -564,6 +691,11 @@ static int eqos_start_resets_tegra186(struct udevice *dev)
 	return 0;
 }
 
+static int eqos_start_resets_stm32(struct udevice *dev)
+{
+	return 0;
+}
+
 static int eqos_stop_resets_tegra186(struct udevice *dev)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
@@ -574,6 +706,11 @@ static int eqos_stop_resets_tegra186(struct udevice *dev)
 	return 0;
 }
 
+static int eqos_stop_resets_stm32(struct udevice *dev)
+{
+	return 0;
+}
+
 static int eqos_calibrate_pads_tegra186(struct udevice *dev)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
@@ -633,6 +770,23 @@ static ulong eqos_get_tick_clk_rate_tegra186(struct udevice *dev)
 	return clk_get_rate(&eqos->clk_slave_bus);
 }
 
+static ulong eqos_get_tick_clk_rate_stm32(struct udevice *dev)
+{
+	struct eqos_priv *eqos = dev_get_priv(dev);
+
+	return clk_get_rate(&eqos->clk_master_bus);
+}
+
+static int eqos_calibrate_pads_stm32(struct udevice *dev)
+{
+	return 0;
+}
+
+static int eqos_disable_calibration_stm32(struct udevice *dev)
+{
+	return 0;
+}
+
 static int eqos_set_full_duplex(struct udevice *dev)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
@@ -727,6 +881,11 @@ static int eqos_set_tx_clk_speed_tegra186(struct udevice *dev)
 	return 0;
 }
 
+static int eqos_set_tx_clk_speed_stm32(struct udevice *dev)
+{
+	return 0;
+}
+
 static int eqos_adjust_link(struct udevice *dev)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
@@ -767,23 +926,23 @@ static int eqos_adjust_link(struct udevice *dev)
 	}
 
 	if (en_calibration) {
-		ret = eqos_calibrate_pads_tegra186(dev);
+		ret = eqos->config->ops->eqos_calibrate_pads(dev);
 		if (ret < 0) {
-			pr_err("eqos_calibrate_pads_tegra186() failed: %d", ret);
+			pr_err("eqos_calibrate_pads() failed: %d",
+			       ret);
 			return ret;
 		}
 	} else {
-		ret = eqos_disable_calibration_tegra186(dev);
+		ret = eqos->config->ops->eqos_disable_calibration(dev);
 		if (ret < 0) {
-			pr_err("eqos_disable_calibration_tegra186() failed: %d",
-			      ret);
+			pr_err("eqos_disable_calibration() failed: %d",
+			       ret);
 			return ret;
 		}
 	}
-
-	ret = eqos_set_tx_clk_speed_tegra186(dev);
+	ret = eqos->config->ops->eqos_set_tx_clk_speed(dev);
 	if (ret < 0) {
-		pr_err("eqos_set_tx_clk_speed_tegra186() failed: %d", ret);
+		pr_err("eqos_set_tx_clk_speed() failed: %d", ret);
 		return ret;
 	}
 
@@ -847,15 +1006,15 @@ static int eqos_start(struct udevice *dev)
 	eqos->tx_desc_idx = 0;
 	eqos->rx_desc_idx = 0;
 
-	ret = eqos_start_clks_tegra186(dev);
+	ret = eqos->config->ops->eqos_start_clks(dev);
 	if (ret < 0) {
-		pr_err("eqos_start_clks_tegra186() failed: %d", ret);
+		pr_err("eqos_start_clks() failed: %d", ret);
 		goto err;
 	}
 
-	ret = eqos_start_resets_tegra186(dev);
+	ret = eqos->config->ops->eqos_start_resets(dev);
 	if (ret < 0) {
-		pr_err("eqos_start_resets_tegra186() failed: %d", ret);
+		pr_err("eqos_start_resets() failed: %d", ret);
 		goto err_stop_clks;
 	}
 
@@ -864,32 +1023,41 @@ static int eqos_start(struct udevice *dev)
 	eqos->reg_access_ok = true;
 
 	ret = wait_for_bit_le32(&eqos->dma_regs->mode,
-				EQOS_DMA_MODE_SWR, false, 10, false);
+				EQOS_DMA_MODE_SWR, false,
+				eqos->config->swr_wait, false);
 	if (ret) {
 		pr_err("EQOS_DMA_MODE_SWR stuck");
 		goto err_stop_resets;
 	}
 
-	ret = eqos_calibrate_pads_tegra186(dev);
+	ret = eqos->config->ops->eqos_calibrate_pads(dev);
 	if (ret < 0) {
-		pr_err("eqos_calibrate_pads_tegra186() failed: %d", ret);
+		pr_err("eqos_calibrate_pads() failed: %d", ret);
 		goto err_stop_resets;
 	}
+	rate = eqos->config->ops->eqos_get_tick_clk_rate(dev);
 
-	rate = eqos_get_tick_clk_rate_tegra186(dev);
 	val = (rate / 1000000) - 1;
 	writel(val, &eqos->mac_regs->us_tic_counter);
 
-	eqos->phy = phy_connect(eqos->mii, 0, dev, 0);
+	/*
+	 * if PHY was already connected and configured,
+	 * don't need to reconnect/reconfigure again
+	 */
 	if (!eqos->phy) {
-		pr_err("phy_connect() failed");
-		goto err_stop_resets;
-	}
-	ret = phy_config(eqos->phy);
-	if (ret < 0) {
-		pr_err("phy_config() failed: %d", ret);
-		goto err_shutdown_phy;
+		eqos->phy = phy_connect(eqos->mii, 0, dev,
+					eqos->config->interface(dev));
+		if (!eqos->phy) {
+			pr_err("phy_connect() failed");
+			goto err_stop_resets;
+		}
+		ret = phy_config(eqos->phy);
+		if (ret < 0) {
+			pr_err("phy_config() failed: %d", ret);
+			goto err_shutdown_phy;
+		}
 	}
+
 	ret = phy_startup(eqos->phy);
 	if (ret < 0) {
 		pr_err("phy_startup() failed: %d", ret);
@@ -994,7 +1162,7 @@ static int eqos_start(struct udevice *dev)
 	clrsetbits_le32(&eqos->mac_regs->rxq_ctrl0,
 			EQOS_MAC_RXQ_CTRL0_RXQ0EN_MASK <<
 			EQOS_MAC_RXQ_CTRL0_RXQ0EN_SHIFT,
-			EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_DCB <<
+			eqos->config->config_mac <<
 			EQOS_MAC_RXQ_CTRL0_RXQ0EN_SHIFT);
 
 	/* Set TX flow control parameters */
@@ -1075,7 +1243,7 @@ static int eqos_start(struct udevice *dev)
 					     (i * EQOS_MAX_PACKET_SIZE));
 		rx_desc->des3 |= EQOS_DESC3_OWN | EQOS_DESC3_BUF1V;
 	}
-	flush_cache((unsigned long)eqos->descs, EQOS_DESCRIPTORS_SIZE);
+	eqos->config->ops->eqos_flush_desc(eqos->descs);
 
 	writel(0, &eqos->dma_regs->ch0_txdesc_list_haddress);
 	writel((ulong)eqos->tx_descs, &eqos->dma_regs->ch0_txdesc_list_address);
@@ -1114,11 +1282,10 @@ static int eqos_start(struct udevice *dev)
 
 err_shutdown_phy:
 	phy_shutdown(eqos->phy);
-	eqos->phy = NULL;
 err_stop_resets:
-	eqos_stop_resets_tegra186(dev);
+	eqos->config->ops->eqos_stop_resets(dev);
 err_stop_clks:
-	eqos_stop_clks_tegra186(dev);
+	eqos->config->ops->eqos_stop_clks(dev);
 err:
 	pr_err("FAILED: %d", ret);
 	return ret;
@@ -1171,10 +1338,9 @@ void eqos_stop(struct udevice *dev)
 
 	if (eqos->phy) {
 		phy_shutdown(eqos->phy);
-		eqos->phy = NULL;
 	}
-	eqos_stop_resets_tegra186(dev);
-	eqos_stop_clks_tegra186(dev);
+	eqos->config->ops->eqos_stop_resets(dev);
+	eqos->config->ops->eqos_stop_clks(dev);
 
 	debug("%s: OK\n", __func__);
 }
@@ -1189,7 +1355,7 @@ int eqos_send(struct udevice *dev, void *packet, int length)
 	      length);
 
 	memcpy(eqos->tx_dma_buf, packet, length);
-	eqos_flush_buffer(eqos->tx_dma_buf, length);
+	eqos->config->ops->eqos_flush_buffer(eqos->tx_dma_buf, length);
 
 	tx_desc = &(eqos->tx_descs[eqos->tx_desc_idx]);
 	eqos->tx_desc_idx++;
@@ -1204,12 +1370,12 @@ int eqos_send(struct udevice *dev, void *packet, int length)
 	 */
 	mb();
 	tx_desc->des3 = EQOS_DESC3_OWN | EQOS_DESC3_FD | EQOS_DESC3_LD | length;
-	eqos_flush_desc(tx_desc);
+	eqos->config->ops->eqos_flush_desc(tx_desc);
 
 	writel((ulong)(tx_desc + 1), &eqos->dma_regs->ch0_txdesc_tail_pointer);
 
 	for (i = 0; i < 1000000; i++) {
-		eqos_inval_desc(tx_desc);
+		eqos->config->ops->eqos_inval_desc(tx_desc);
 		if (!(readl(&tx_desc->des3) & EQOS_DESC3_OWN))
 			return 0;
 		udelay(1);
@@ -1239,7 +1405,7 @@ int eqos_recv(struct udevice *dev, int flags, uchar **packetp)
 	length = rx_desc->des3 & 0x7fff;
 	debug("%s: *packetp=%p, length=%d\n", __func__, *packetp, length);
 
-	eqos_inval_buffer(*packetp, length);
+	eqos->config->ops->eqos_inval_buffer(*packetp, length);
 
 	return length;
 }
@@ -1270,7 +1436,7 @@ int eqos_free_pkt(struct udevice *dev, uchar *packet, int length)
 	 */
 	mb();
 	rx_desc->des3 |= EQOS_DESC3_OWN | EQOS_DESC3_BUF1V;
-	eqos_flush_desc(rx_desc);
+	eqos->config->ops->eqos_flush_desc(rx_desc);
 
 	writel((ulong)rx_desc, &eqos->dma_regs->ch0_rxdesc_tail_pointer);
 
@@ -1305,7 +1471,7 @@ static int eqos_probe_resources_core(struct udevice *dev)
 		ret = -ENOMEM;
 		goto err_free_descs;
 	}
-	debug("%s: rx_dma_buf=%p\n", __func__, eqos->rx_dma_buf);
+	debug("%s: tx_dma_buf=%p\n", __func__, eqos->tx_dma_buf);
 
 	eqos->rx_dma_buf = memalign(EQOS_BUFFER_ALIGN, EQOS_RX_BUFFER_SIZE);
 	if (!eqos->rx_dma_buf) {
@@ -1313,7 +1479,7 @@ static int eqos_probe_resources_core(struct udevice *dev)
 		ret = -ENOMEM;
 		goto err_free_tx_dma_buf;
 	}
-	debug("%s: tx_dma_buf=%p\n", __func__, eqos->tx_dma_buf);
+	debug("%s: rx_dma_buf=%p\n", __func__, eqos->rx_dma_buf);
 
 	eqos->rx_pkt = malloc(EQOS_MAX_PACKET_SIZE);
 	if (!eqos->rx_pkt) {
@@ -1425,6 +1591,98 @@ err_free_reset_eqos:
 	return ret;
 }
 
+/* board-specific Ethernet Interface initializations. */
+__weak int board_interface_eth_init(int interface_type, bool eth_clk_sel_reg,
+				    bool eth_ref_clk_sel_reg)
+{
+	return 0;
+}
+
+static int eqos_probe_resources_stm32(struct udevice *dev)
+{
+	struct eqos_priv *eqos = dev_get_priv(dev);
+	int ret;
+	phy_interface_t interface;
+	bool eth_clk_sel_reg = false;
+	bool eth_ref_clk_sel_reg = false;
+
+	debug("%s(dev=%p):\n", __func__, dev);
+
+	interface = eqos->config->interface(dev);
+
+	if (interface == PHY_INTERFACE_MODE_NONE) {
+		pr_err("Invalid PHY interface\n");
+		return -EINVAL;
+	}
+
+	/* Gigabit Ethernet 125MHz clock selection. */
+	eth_clk_sel_reg = dev_read_bool(dev, "st,eth_clk_sel");
+
+	/* Ethernet 50Mhz RMII clock selection */
+	eth_ref_clk_sel_reg =
+		dev_read_bool(dev, "st,eth_ref_clk_sel");
+
+	ret = board_interface_eth_init(interface, eth_clk_sel_reg,
+				       eth_ref_clk_sel_reg);
+	if (ret)
+		return -EINVAL;
+
+	ret = clk_get_by_name(dev, "stmmaceth", &eqos->clk_master_bus);
+	if (ret) {
+		pr_err("clk_get_by_name(master_bus) failed: %d", ret);
+		goto err_probe;
+	}
+
+	ret = clk_get_by_name(dev, "mac-clk-rx", &eqos->clk_rx);
+	if (ret) {
+		pr_err("clk_get_by_name(rx) failed: %d", ret);
+		goto err_free_clk_master_bus;
+	}
+
+	ret = clk_get_by_name(dev, "mac-clk-tx", &eqos->clk_tx);
+	if (ret) {
+		pr_err("clk_get_by_name(tx) failed: %d", ret);
+		goto err_free_clk_rx;
+	}
+
+	/*  Get ETH_CLK clocks (optional) */
+	ret = clk_get_by_name(dev, "eth-ck", &eqos->clk_ck);
+	if (ret)
+		pr_warn("No phy clock provided %d", ret);
+
+	debug("%s: OK\n", __func__);
+	return 0;
+
+err_free_clk_rx:
+	clk_free(&eqos->clk_rx);
+err_free_clk_master_bus:
+	clk_free(&eqos->clk_master_bus);
+err_probe:
+
+	debug("%s: returns %d\n", __func__, ret);
+	return ret;
+}
+
+static phy_interface_t eqos_get_interface_stm32(struct udevice *dev)
+{
+	const char *phy_mode;
+	phy_interface_t interface = PHY_INTERFACE_MODE_NONE;
+
+	debug("%s(dev=%p):\n", __func__, dev);
+
+	phy_mode = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "phy-mode",
+			       NULL);
+	if (phy_mode)
+		interface = phy_get_interface_by_name(phy_mode);
+
+	return interface;
+}
+
+static phy_interface_t eqos_get_interface_tegra186(struct udevice *dev)
+{
+	return PHY_INTERFACE_MODE_MII;
+}
+
 static int eqos_remove_resources_tegra186(struct udevice *dev)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
@@ -1443,6 +1701,22 @@ static int eqos_remove_resources_tegra186(struct udevice *dev)
 	return 0;
 }
 
+static int eqos_remove_resources_stm32(struct udevice *dev)
+{
+	struct eqos_priv *eqos = dev_get_priv(dev);
+
+	debug("%s(dev=%p):\n", __func__, dev);
+
+	clk_free(&eqos->clk_tx);
+	clk_free(&eqos->clk_rx);
+	clk_free(&eqos->clk_master_bus);
+	if (clk_valid(&eqos->clk_ck))
+		clk_free(&eqos->clk_ck);
+
+	debug("%s: OK\n", __func__);
+	return 0;
+}
+
 static int eqos_probe(struct udevice *dev)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
@@ -1469,15 +1743,16 @@ static int eqos_probe(struct udevice *dev)
 		return ret;
 	}
 
-	ret = eqos_probe_resources_tegra186(dev);
+	ret = eqos->config->ops->eqos_probe_resources(dev);
 	if (ret < 0) {
-		pr_err("eqos_probe_resources_tegra186() failed: %d", ret);
+		pr_err("eqos_probe_resources() failed: %d", ret);
 		goto err_remove_resources_core;
 	}
 
 	eqos->mii = mdio_alloc();
 	if (!eqos->mii) {
 		pr_err("mdio_alloc() failed");
+		ret = -ENOMEM;
 		goto err_remove_resources_tegra;
 	}
 	eqos->mii->read = eqos_mdio_read;
@@ -1497,7 +1772,7 @@ static int eqos_probe(struct udevice *dev)
 err_free_mdio:
 	mdio_free(eqos->mii);
 err_remove_resources_tegra:
-	eqos_remove_resources_tegra186(dev);
+	eqos->config->ops->eqos_remove_resources(dev);
 err_remove_resources_core:
 	eqos_remove_resources_core(dev);
 
@@ -1513,7 +1788,8 @@ static int eqos_remove(struct udevice *dev)
 
 	mdio_unregister(eqos->mii);
 	mdio_free(eqos->mii);
-	eqos_remove_resources_tegra186(dev);
+	eqos->config->ops->eqos_remove_resources(dev);
+
 	eqos_probe_resources_core(dev);
 
 	debug("%s: OK\n", __func__);
@@ -1529,8 +1805,58 @@ static const struct eth_ops eqos_ops = {
 	.write_hwaddr = eqos_write_hwaddr,
 };
 
+static struct eqos_ops eqos_tegra186_ops = {
+	.eqos_inval_desc = eqos_inval_desc_tegra186,
+	.eqos_flush_desc = eqos_flush_desc_tegra186,
+	.eqos_inval_buffer = eqos_inval_buffer_tegra186,
+	.eqos_flush_buffer = eqos_flush_buffer_tegra186,
+	.eqos_probe_resources = eqos_probe_resources_tegra186,
+	.eqos_remove_resources = eqos_remove_resources_tegra186,
+	.eqos_stop_resets = eqos_stop_resets_tegra186,
+	.eqos_start_resets = eqos_start_resets_tegra186,
+	.eqos_stop_clks = eqos_stop_clks_tegra186,
+	.eqos_start_clks = eqos_start_clks_tegra186,
+	.eqos_calibrate_pads = eqos_calibrate_pads_tegra186,
+	.eqos_disable_calibration = eqos_disable_calibration_tegra186,
+	.eqos_set_tx_clk_speed = eqos_set_tx_clk_speed_tegra186,
+	.eqos_get_tick_clk_rate = eqos_get_tick_clk_rate_tegra186
+};
+
 static const struct eqos_config eqos_tegra186_config = {
 	.reg_access_always_ok = false,
+	.mdio_wait = 10,
+	.swr_wait = 10,
+	.config_mac = EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_DCB,
+	.config_mac_mdio = EQOS_MAC_MDIO_ADDRESS_CR_20_35,
+	.interface = eqos_get_interface_tegra186,
+	.ops = &eqos_tegra186_ops
+};
+
+static struct eqos_ops eqos_stm32_ops = {
+	.eqos_inval_desc = eqos_inval_desc_stm32,
+	.eqos_flush_desc = eqos_flush_desc_stm32,
+	.eqos_inval_buffer = eqos_inval_buffer_stm32,
+	.eqos_flush_buffer = eqos_flush_buffer_stm32,
+	.eqos_probe_resources = eqos_probe_resources_stm32,
+	.eqos_remove_resources = eqos_remove_resources_stm32,
+	.eqos_stop_resets = eqos_stop_resets_stm32,
+	.eqos_start_resets = eqos_start_resets_stm32,
+	.eqos_stop_clks = eqos_stop_clks_stm32,
+	.eqos_start_clks = eqos_start_clks_stm32,
+	.eqos_calibrate_pads = eqos_calibrate_pads_stm32,
+	.eqos_disable_calibration = eqos_disable_calibration_stm32,
+	.eqos_set_tx_clk_speed = eqos_set_tx_clk_speed_stm32,
+	.eqos_get_tick_clk_rate = eqos_get_tick_clk_rate_stm32
+};
+
+static const struct eqos_config eqos_stm32_config = {
+	.reg_access_always_ok = false,
+	.mdio_wait = 10000,
+	.swr_wait = 50,
+	.config_mac = EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_AV,
+	.config_mac_mdio = EQOS_MAC_MDIO_ADDRESS_CR_250_300,
+	.interface = eqos_get_interface_stm32,
+	.ops = &eqos_stm32_ops
 };
 
 static const struct udevice_id eqos_ids[] = {
@@ -1538,6 +1864,11 @@ static const struct udevice_id eqos_ids[] = {
 		.compatible = "nvidia,tegra186-eqos",
 		.data = (ulong)&eqos_tegra186_config
 	},
+	{
+		.compatible = "snps,dwmac-4.20a",
+		.data = (ulong)&eqos_stm32_config
+	},
+
 	{ }
 };
 

commit 8f873b891fc193d0ee79f73e4f7c3868d968ccfe
Author: Alex Marginean <alexandru.marginean@nxp.com>
Date:   Thu Jul 11 18:32:56 2019 +0300

    UPSTREAM: net: add comments to phy APIs
    
    Added a comment on the limitations of phy_find_by_mask API when scanning
    MDIO buses with multiple PHYs present.  Added short descriptions to the
    other APIs in phy.h for consistency.
    
    Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
    Acked-by: Joe Hershberger <joe.hershberger@ni.com>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Change-Id: Ic726c545a9e2c7a68eb565e01848f6e6e9475111

diff --git a/include/phy.h b/include/phy.h
index 17af3e9732..f57797ec80 100644
--- a/include/phy.h
+++ b/include/phy.h
@@ -247,15 +247,71 @@ static inline int is_10g_interface(phy_interface_t interface)
 
 #endif
 
+/**
+ * phy_init() - Initializes the PHY drivers
+ *
+ * This function registers all available PHY drivers
+ *
+ * @return 0 if OK, -ve on error
+ */
 int phy_init(void);
+
+/**
+ * phy_reset() - Resets the specified PHY
+ *
+ * Issues a reset of the PHY and waits for it to complete
+ *
+ * @phydev:	PHY to reset
+ * @return 0 if OK, -ve on error
+ */
 int phy_reset(struct phy_device *phydev);
+
+/**
+ * phy_find_by_mask() - Searches for a PHY on the specified MDIO bus
+ *
+ * The function checks the PHY addresses flagged in phy_mask and returns a
+ * phy_device pointer if it detects a PHY.
+ * This function should only be called if just one PHY is expected to be present
+ * in the set of addresses flagged in phy_mask.  If multiple PHYs are present,
+ * it is undefined which of these PHYs is returned.
+ *
+ * @bus:	MII/MDIO bus to scan
+ * @phy_mask:	bitmap of PYH addresses to scan
+ * @interface:	type of MAC-PHY interface
+ * @return pointer to phy_device if a PHY is found, or NULL otherwise
+ */
 struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask,
 		phy_interface_t interface);
+
 #ifdef CONFIG_DM_ETH
+
+/**
+ * phy_connect_dev() - Associates the given pair of PHY and Ethernet devices
+ * @phydev:	PHY device
+ * @dev:	Ethernet device
+ */
 void phy_connect_dev(struct phy_device *phydev, struct udevice *dev);
+
+/**
+ * phy_connect() - Creates a PHY device for the Ethernet interface
+ *
+ * Creates a PHY device for the PHY at the given address, if one doesn't exist
+ * already, and associates it with the Ethernet device.
+ * The function may be called with addr <= 0, in this case addr value is ignored
+ * and the bus is scanned to detect a PHY.  Scanning should only be used if only
+ * one PHY is expected to be present on the MDIO bus, otherwise it is undefined
+ * which PHY is returned.
+ *
+ * @bus:	MII/MDIO bus that hosts the PHY
+ * @addr:	PHY address on MDIO bus
+ * @dev:	Ethernet device to associate to the PHY
+ * @interface:	type of MAC-PHY interface
+ * @return pointer to phy_device if a PHY is found, or NULL otherwise
+ */
 struct phy_device *phy_connect(struct mii_dev *bus, int addr,
 				struct udevice *dev,
 				phy_interface_t interface);
+
 static inline ofnode phy_get_ofnode(struct phy_device *phydev)
 {
 	if (ofnode_valid(phydev->node))
@@ -264,10 +320,34 @@ static inline ofnode phy_get_ofnode(struct phy_device *phydev)
 		return dev_ofnode(phydev->dev);
 }
 #else
+
+/**
+ * phy_connect_dev() - Associates the given pair of PHY and Ethernet devices
+ * @phydev:	PHY device
+ * @dev:	Ethernet device
+ */
 void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev);
+
+/**
+ * phy_connect() - Creates a PHY device for the Ethernet interface
+ *
+ * Creates a PHY device for the PHY at the given address, if one doesn't exist
+ * already, and associates it with the Ethernet device.
+ * The function may be called with addr <= 0, in this case addr value is ignored
+ * and the bus is scanned to detect a PHY.  Scanning should only be used if only
+ * one PHY is expected to be present on the MDIO bus, otherwise it is undefined
+ * which PHY is returned.
+ *
+ * @bus:	MII/MDIO bus that hosts the PHY
+ * @addr:	PHY address on MDIO bus
+ * @dev:	Ethernet device to associate to the PHY
+ * @interface:	type of MAC-PHY interface
+ * @return pointer to phy_device if a PHY is found, or NULL otherwise
+ */
 struct phy_device *phy_connect(struct mii_dev *bus, int addr,
 				struct eth_device *dev,
 				phy_interface_t interface);
+
 static inline ofnode phy_get_ofnode(struct phy_device *phydev)
 {
 	return ofnode_null();

commit 7965f3d3316c67bf36bb684cb482c1f2c0c8d5da
Author: Carlo Caione <ccaione@baylibre.com>
Date:   Fri Feb 8 17:25:06 2019 +0000

    UPSTREAM: net: phy: Add generic helpers to access MMD PHY registers
    
    Two new helper functions (phy_read_mmd() and phy_write_mmd()) are added
    to allow access to the MMD PHY registers.
    
    The MMD PHY registers can be accessed by several means:
    
    1. Using two new MMD access function hooks in the PHY driver. These
    functions can be implemented when the PHY driver does not support the
    standard IEEE Compatible clause 45 access mechanism described in clause
    22 or if the PHY uses its own non-standard access mechanism.
    
    2. Direct access for C45 PHYs and C22 PHYs when accessing the reachable
    DEVADs.
    
    3. The standard clause 45 access extensions to the MMD registers through
    the indirection registers (clause 22) in all the other cases.
    
    Signed-off-by: Carlo Caione <ccaione@baylibre.com>
    Acked-by: Joe Hershberger <joe.hershberger@ni.com>
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Change-Id: I53a73274b6386f8a510b590a0f7ce1923f7b5528

diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index 16e965018e..e02d4708d7 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -542,6 +542,10 @@ int phy_register(struct phy_driver *drv)
 		drv->readext += gd->reloc_off;
 	if (drv->writeext)
 		drv->writeext += gd->reloc_off;
+	if (drv->read_mmd)
+		drv->read_mmd += gd->reloc_off;
+	if (drv->write_mmd)
+		drv->write_mmd += gd->reloc_off;
 #endif
 	return 0;
 }
diff --git a/include/phy.h b/include/phy.h
index e61aa1daca..17af3e9732 100644
--- a/include/phy.h
+++ b/include/phy.h
@@ -102,6 +102,14 @@ struct phy_driver {
 	int (*readext)(struct phy_device *phydev, int addr, int devad, int reg);
 	int (*writeext)(struct phy_device *phydev, int addr, int devad, int reg,
 			u16 val);
+
+	/* Phy specific driver override for reading a MMD register */
+	int (*read_mmd)(struct phy_device *phydev, int devad, int reg);
+
+	/* Phy specific driver override for writing a MMD register */
+	int (*write_mmd)(struct phy_device *phydev, int devad, int reg,
+			 u16 val);
+
 	struct list_head list;
 };
 
@@ -166,6 +174,68 @@ static inline int phy_write(struct phy_device *phydev, int devad, int regnum,
 	return bus->write(bus, phydev->addr, devad, regnum, val);
 }
 
+static inline void phy_mmd_start_indirect(struct phy_device *phydev, int devad,
+					  int regnum)
+{
+	/* Write the desired MMD Devad */
+	phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_CTRL, devad);
+
+	/* Write the desired MMD register address */
+	phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA, regnum);
+
+	/* Select the Function : DATA with no post increment */
+	phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_CTRL,
+		  (devad | MII_MMD_CTRL_NOINCR));
+}
+
+static inline int phy_read_mmd(struct phy_device *phydev, int devad,
+			       int regnum)
+{
+	struct phy_driver *drv = phydev->drv;
+
+	if (regnum > (u16)~0 || devad > 32)
+		return -EINVAL;
+
+	/* driver-specific access */
+	if (drv->read_mmd)
+		return drv->read_mmd(phydev, devad, regnum);
+
+	/* direct C45 / C22 access */
+	if ((drv->features & PHY_10G_FEATURES) == PHY_10G_FEATURES ||
+	    devad == MDIO_DEVAD_NONE || !devad)
+		return phy_read(phydev, devad, regnum);
+
+	/* indirect C22 access */
+	phy_mmd_start_indirect(phydev, devad, regnum);
+
+	/* Read the content of the MMD's selected register */
+	return phy_read(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA);
+}
+
+static inline int phy_write_mmd(struct phy_device *phydev, int devad,
+				int regnum, u16 val)
+{
+	struct phy_driver *drv = phydev->drv;
+
+	if (regnum > (u16)~0 || devad > 32)
+		return -EINVAL;
+
+	/* driver-specific access */
+	if (drv->write_mmd)
+		return drv->write_mmd(phydev, devad, regnum, val);
+
+	/* direct C45 / C22 access */
+	if ((drv->features & PHY_10G_FEATURES) == PHY_10G_FEATURES ||
+	    devad == MDIO_DEVAD_NONE || !devad)
+		return phy_write(phydev, devad, regnum, val);
+
+	/* indirect C22 access */
+	phy_mmd_start_indirect(phydev, devad, regnum);
+
+	/* Write the data into MMD's selected register */
+	return phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA, val);
+}
+
 #ifdef CONFIG_PHYLIB_10G
 extern struct phy_driver gen10g_driver;
 

commit 5b8d12099d0f90c43503b9a899c542ca1861e9c4
Author: Pankaj Bansal <pankaj.bansal@nxp.com>
Date:   Fri Nov 16 06:26:18 2018 +0000

    UPSTREAM: net: phy: Add clause 45 identifier to phy_device
    
    The phy devices can be accessed via clause 22 or via clause 45.
    This information can be deduced when we read phy id. if the phy id
    is read without giving any MDIO Manageable Device Address (MMD), then
    it conforms to clause 22. otherwise it conforms to clause 45.
    
    Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
    Acked-by: Joe Hershberger <joe.hershberger@ni.com>
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Change-Id: Iae1c8e2414b655639c42f7098a097c6a0a1e5792

diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index 2e0eabf591..16e965018e 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -611,7 +611,7 @@ static struct phy_driver *get_phy_driver(struct phy_device *phydev,
 }
 
 static struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
-					    u32 phy_id,
+					    u32 phy_id, bool is_c45,
 					    phy_interface_t interface)
 {
 	struct phy_device *dev;
@@ -639,6 +639,7 @@ static struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
 
 	dev->addr = addr;
 	dev->phy_id = phy_id;
+	dev->is_c45 = is_c45;
 	dev->bus = bus;
 
 	dev->drv = get_phy_driver(dev, interface);
@@ -687,12 +688,17 @@ static struct phy_device *create_phy_by_mask(struct mii_dev *bus,
 		unsigned phy_mask, int devad, phy_interface_t interface)
 {
 	u32 phy_id = 0xffffffff;
+	bool is_c45;
+
 	while (phy_mask) {
 		int addr = ffs(phy_mask) - 1;
 		int r = get_phy_id(bus, addr, devad, &phy_id);
 		/* If the PHY ID is mostly f's, we didn't find anything */
-		if (r == 0 && (phy_id & 0x1fffffff) != 0x1fffffff)
-			return phy_device_create(bus, addr, phy_id, interface);
+		if (r == 0 && (phy_id & 0x1fffffff) != 0x1fffffff) {
+			is_c45 = (devad == MDIO_DEVAD_NONE) ? false : true;
+			return phy_device_create(bus, addr, phy_id, is_c45,
+						 interface);
+		}
 		phy_mask &= ~(1 << addr);
 	}
 	return NULL;
@@ -870,9 +876,9 @@ struct phy_device *phy_connect(struct mii_dev *bus, int addr,
 	sn = fdt_first_subnode(gd->fdt_blob, dev_of_offset(dev));
 	while (sn > 0) {
 		name = fdt_get_name(gd->fdt_blob, sn, NULL);
-		if (name != NULL && strcmp(name, "fixed-link") == 0) {
-			phydev = phy_device_create(bus,
-						   sn, PHY_FIXED_ID, interface);
+		if (name && strcmp(name, "fixed-link") == 0) {
+			phydev = phy_device_create(bus, sn, PHY_FIXED_ID, false,
+						   interface);
 			break;
 		}
 		sn = fdt_next_subnode(gd->fdt_blob, sn);
diff --git a/include/phy.h b/include/phy.h
index 2fa3c86154..e61aa1daca 100644
--- a/include/phy.h
+++ b/include/phy.h
@@ -139,6 +139,7 @@ struct phy_device {
 	int pause;
 	int asym_pause;
 	u32 phy_id;
+	bool is_c45;
 	u32 flags;
 };
 

commit 296978b3f4dcdb16ac229ae48519db4662f4a835
Author: Priyanka Jain <priyanka.jain@nxp.com>
Date:   Thu Oct 11 04:47:05 2018 +0000

    UPSTREAM: net/phy: Add phy-id for IN112525_S03
    
    Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
    Acked-by: Joe Hershberger <joe.hershberger@ni.com>
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Change-Id: Ib26103a02f63a0baa0feb09a10def83097e7458b

diff --git a/include/phy.h b/include/phy.h
index edf368ae73..2fa3c86154 100644
--- a/include/phy.h
+++ b/include/phy.h
@@ -274,7 +274,9 @@ static inline bool phy_interface_is_sgmii(struct phy_device *phydev)
 }
 
 /* PHY UIDs for various PHYs that are referenced in external code */
-#define PHY_UID_CS4340  0x13e51002
-#define PHY_UID_TN2020	0x00a19410
+#define PHY_UID_CS4340  	0x13e51002
+#define PHY_UID_CS4223  	0x03e57003
+#define PHY_UID_TN2020		0x00a19410
+#define PHY_UID_IN112525_S03	0x02107440
 
 #endif

commit 7ef89642968ef79d13d99a322c4c4b25d58fffa7
Author: Grygorii Strashko <grygorii.strashko@ti.com>
Date:   Thu Jul 5 12:02:48 2018 -0500

    UPSTREAM: net: phy: add ofnode node to struct phy_device
    
    Now the UCLASS_ETH device "node" field is owerwritten by some network drivers in
    case of Ethernet PHYs which are linked to UCLASS_ETH device using
    "phy-handle" DT property and when Ethernet PHY driver needs to read some
    additional information from DT. In such cases following happens (in
    general):
    
    - network drivers
            priv->phydev = phy_connect(priv->bus, priv->phyaddr, dev,
                                       priv->interface);
            <-- phydev is connected to dev which is UCLASS_ETH device
    
            if (priv->phy_of_handle > 0)
                    dev_set_of_offset(priv->phydev->dev, priv->phy_of_handle);
            <-- phydev->dev->node is overwritten by phy-handle DT node
    
    - PHY driver in .config() callback
            int node = dev_of_offset(dev);
            <-- PHY driver uses overwritten dev->node
            const void *fdt = gd->fdt_blob;
    
             if (fdtdec_get_bool(fdt, node, "property"))
                    ...
    
    As result, UCLASS_ETH device can't be used any more for DT accessing.
    
    This patch adds additional ofnode node field to struct phy_device which can
    be set explicitly by network drivers and used by PHY drivers, so
    overwriting can be avoided. Also add helper function phy_get_ofnode()
    which will check and return phy_device->node or dev_ofnode(phydev->dev) for
    backward compatibility with existing drivers.
    
    Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
    Acked-by: Joe Hershberger <joe.hershberger@ni.com>
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Change-Id: I31fcf01cfb19894bc90d198d9138c1fd3e25802e

diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index 5be51d73ce..2e0eabf591 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -631,6 +631,10 @@ static struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
 	dev->link = 0;
 	dev->interface = interface;
 
+#ifdef CONFIG_DM_ETH
+	dev->node = ofnode_null();
+#endif
+
 	dev->autoneg = AUTONEG_ENABLE;
 
 	dev->addr = addr;
diff --git a/include/phy.h b/include/phy.h
index cf96454f58..edf368ae73 100644
--- a/include/phy.h
+++ b/include/phy.h
@@ -10,6 +10,7 @@
 #ifndef _PHY_H
 #define _PHY_H
 
+#include <dm.h>
 #include <linux/list.h>
 #include <linux/mii.h>
 #include <linux/ethtool.h>
@@ -113,6 +114,7 @@ struct phy_device {
 
 #ifdef CONFIG_DM_ETH
 	struct udevice *dev;
+	ofnode node;
 #else
 	struct eth_device *dev;
 #endif
@@ -183,11 +185,22 @@ void phy_connect_dev(struct phy_device *phydev, struct udevice *dev);
 struct phy_device *phy_connect(struct mii_dev *bus, int addr,
 				struct udevice *dev,
 				phy_interface_t interface);
+static inline ofnode phy_get_ofnode(struct phy_device *phydev)
+{
+	if (ofnode_valid(phydev->node))
+		return phydev->node;
+	else
+		return dev_ofnode(phydev->dev);
+}
 #else
 void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev);
 struct phy_device *phy_connect(struct mii_dev *bus, int addr,
 				struct eth_device *dev,
 				phy_interface_t interface);
+static inline ofnode phy_get_ofnode(struct phy_device *phydev)
+{
+	return ofnode_null();
+}
 #endif
 int phy_startup(struct phy_device *phydev);
 int phy_config(struct phy_device *phydev);

commit 22e6d8f7d5a006f07b65222ddd7d66d9acfb0773
Author: Joe Hershberger <joe.hershberger@ni.com>
Date:   Tue Jul 17 15:02:30 2018 -0500

    UPSTREAM: phy: Break include cycle
    
    Because some phy wants to export some functions [1], export.h was
    including the whole phy subsystem which pulls in lots of stuff that
    causes some ordering and redefinition issues. Split out the only part
    that is actually needed in export.h and include it there and in phy.h.
    
    [1] commit 95279315076c ("board/ls2085rdb: Export functions for
                              standalone AQ FW load apps")
    
    Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Change-Id: I201c0c637ffd3fbba5b276ac06882d399e817511

diff --git a/include/exports.h b/include/exports.h
index ebe81d914c..a4b862f191 100644
--- a/include/exports.h
+++ b/include/exports.h
@@ -3,8 +3,7 @@
 
 #ifndef __ASSEMBLY__
 #ifdef CONFIG_PHY_AQUANTIA
-#include <miiphy.h>
-#include <phy.h>
+#include <phy_interface.h>
 #endif
 
 struct spi_slave;
diff --git a/include/phy.h b/include/phy.h
index a0b1f12317..cf96454f58 100644
--- a/include/phy.h
+++ b/include/phy.h
@@ -14,6 +14,7 @@
 #include <linux/mii.h>
 #include <linux/ethtool.h>
 #include <linux/mdio.h>
+#include <phy_interface.h>
 
 #define PHY_FIXED_ID		0xa5a55a5a
 
@@ -49,58 +50,6 @@
 #endif
 
 
-typedef enum {
-	PHY_INTERFACE_MODE_MII,
-	PHY_INTERFACE_MODE_GMII,
-	PHY_INTERFACE_MODE_SGMII,
-	PHY_INTERFACE_MODE_SGMII_2500,
-	PHY_INTERFACE_MODE_QSGMII,
-	PHY_INTERFACE_MODE_TBI,
-	PHY_INTERFACE_MODE_RMII,
-	PHY_INTERFACE_MODE_RGMII,
-	PHY_INTERFACE_MODE_RGMII_ID,
-	PHY_INTERFACE_MODE_RGMII_RXID,
-	PHY_INTERFACE_MODE_RGMII_TXID,
-	PHY_INTERFACE_MODE_RTBI,
-	PHY_INTERFACE_MODE_XGMII,
-	PHY_INTERFACE_MODE_XAUI,
-	PHY_INTERFACE_MODE_RXAUI,
-	PHY_INTERFACE_MODE_SFI,
-	PHY_INTERFACE_MODE_NONE,	/* Must be last */
-
-	PHY_INTERFACE_MODE_COUNT,
-} phy_interface_t;
-
-static const char *phy_interface_strings[] = {
-	[PHY_INTERFACE_MODE_MII]		= "mii",
-	[PHY_INTERFACE_MODE_GMII]		= "gmii",
-	[PHY_INTERFACE_MODE_SGMII]		= "sgmii",
-	[PHY_INTERFACE_MODE_SGMII_2500]		= "sgmii-2500",
-	[PHY_INTERFACE_MODE_QSGMII]		= "qsgmii",
-	[PHY_INTERFACE_MODE_TBI]		= "tbi",
-	[PHY_INTERFACE_MODE_RMII]		= "rmii",
-	[PHY_INTERFACE_MODE_RGMII]		= "rgmii",
-	[PHY_INTERFACE_MODE_RGMII_ID]		= "rgmii-id",
-	[PHY_INTERFACE_MODE_RGMII_RXID]		= "rgmii-rxid",
-	[PHY_INTERFACE_MODE_RGMII_TXID]		= "rgmii-txid",
-	[PHY_INTERFACE_MODE_RTBI]		= "rtbi",
-	[PHY_INTERFACE_MODE_XGMII]		= "xgmii",
-	[PHY_INTERFACE_MODE_XAUI]		= "xaui",
-	[PHY_INTERFACE_MODE_RXAUI]		= "rxaui",
-	[PHY_INTERFACE_MODE_SFI]		= "sfi",
-	[PHY_INTERFACE_MODE_NONE]		= "",
-};
-
-static inline const char *phy_string_for_interface(phy_interface_t i)
-{
-	/* Default to unknown */
-	if (i > PHY_INTERFACE_MODE_NONE)
-		i = PHY_INTERFACE_MODE_NONE;
-
-	return phy_interface_strings[i];
-}
-
-
 struct phy_device;
 
 #define MDIO_NAME_LEN 32
diff --git a/include/phy_interface.h b/include/phy_interface.h
new file mode 100644
index 0000000000..0760d65de5
--- /dev/null
+++ b/include/phy_interface.h
@@ -0,0 +1,65 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ *	Andy Fleming <afleming@gmail.com>
+ *
+ * This file pretty much stolen from Linux's mii.h/ethtool.h/phy.h
+ */
+
+#ifndef _PHY_INTERFACE_H
+#define _PHY_INTERFACE_H
+
+typedef enum {
+	PHY_INTERFACE_MODE_MII,
+	PHY_INTERFACE_MODE_GMII,
+	PHY_INTERFACE_MODE_SGMII,
+	PHY_INTERFACE_MODE_SGMII_2500,
+	PHY_INTERFACE_MODE_QSGMII,
+	PHY_INTERFACE_MODE_TBI,
+	PHY_INTERFACE_MODE_RMII,
+	PHY_INTERFACE_MODE_RGMII,
+	PHY_INTERFACE_MODE_RGMII_ID,
+	PHY_INTERFACE_MODE_RGMII_RXID,
+	PHY_INTERFACE_MODE_RGMII_TXID,
+	PHY_INTERFACE_MODE_RTBI,
+	PHY_INTERFACE_MODE_XGMII,
+	PHY_INTERFACE_MODE_XAUI,
+	PHY_INTERFACE_MODE_RXAUI,
+	PHY_INTERFACE_MODE_SFI,
+	PHY_INTERFACE_MODE_INTERNAL,
+	PHY_INTERFACE_MODE_NONE,	/* Must be last */
+
+	PHY_INTERFACE_MODE_COUNT,
+} phy_interface_t;
+
+static const char * const phy_interface_strings[] = {
+	[PHY_INTERFACE_MODE_MII]		= "mii",
+	[PHY_INTERFACE_MODE_GMII]		= "gmii",
+	[PHY_INTERFACE_MODE_SGMII]		= "sgmii",
+	[PHY_INTERFACE_MODE_SGMII_2500]		= "sgmii-2500",
+	[PHY_INTERFACE_MODE_QSGMII]		= "qsgmii",
+	[PHY_INTERFACE_MODE_TBI]		= "tbi",
+	[PHY_INTERFACE_MODE_RMII]		= "rmii",
+	[PHY_INTERFACE_MODE_RGMII]		= "rgmii",
+	[PHY_INTERFACE_MODE_RGMII_ID]		= "rgmii-id",
+	[PHY_INTERFACE_MODE_RGMII_RXID]		= "rgmii-rxid",
+	[PHY_INTERFACE_MODE_RGMII_TXID]		= "rgmii-txid",
+	[PHY_INTERFACE_MODE_RTBI]		= "rtbi",
+	[PHY_INTERFACE_MODE_XGMII]		= "xgmii",
+	[PHY_INTERFACE_MODE_XAUI]		= "xaui",
+	[PHY_INTERFACE_MODE_RXAUI]		= "rxaui",
+	[PHY_INTERFACE_MODE_SFI]		= "sfi",
+	[PHY_INTERFACE_MODE_INTERNAL]		= "internal",
+	[PHY_INTERFACE_MODE_NONE]		= "",
+};
+
+static inline const char *phy_string_for_interface(phy_interface_t i)
+{
+	/* Default to unknown */
+	if (i > PHY_INTERFACE_MODE_NONE)
+		i = PHY_INTERFACE_MODE_NONE;
+
+	return phy_interface_strings[i];
+}
+
+#endif /* _PHY_INTERFACE_H */

commit 147c366e79f87e3ee85a7069ad9fdbdd403b93d3
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Thu Jul 26 02:39:39 2018 -0700

    UPSTREAM: linux/mii.h: Sync with Linux kernel v4.17
    
    This syncs U-Boot's include/linux/mii.h with Linux kernel v4.17
    include/uapi/linux/mii.h.
    
    While we are here, this also fixes some style issues.
    
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Acked-by: Joe Hershberger <joe.hershberger@ni.com>
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Change-Id: I9e2089fc5a8d87e09b6d1470c08ddb039171b4c2

diff --git a/include/linux/mii.h b/include/linux/mii.h
index 19afb746cd..21db032340 100644
--- a/include/linux/mii.h
+++ b/include/linux/mii.h
@@ -1,3 +1,4 @@
+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
 /*
  * linux/mii.h: definitions for MII-compatible transceivers
  * Originally drivers/net/sunhme.h.
@@ -9,53 +10,55 @@
 #define __LINUX_MII_H__
 
 /* Generic MII registers. */
-
-#define MII_BMCR	    0x00	/* Basic mode control register */
-#define MII_BMSR	    0x01	/* Basic mode status register  */
-#define MII_PHYSID1	    0x02	/* PHYS ID 1		       */
-#define MII_PHYSID2	    0x03	/* PHYS ID 2		       */
-#define MII_ADVERTISE	    0x04	/* Advertisement control reg   */
-#define MII_LPA		    0x05	/* Link partner ability reg    */
-#define MII_EXPANSION	    0x06	/* Expansion register	       */
-#define MII_CTRL1000	    0x09	/* 1000BASE-T control	       */
-#define MII_STAT1000	    0x0a	/* 1000BASE-T status	       */
-#define MII_ESTATUS	    0x0f	/* Extended Status */
-#define MII_DCOUNTER	    0x12	/* Disconnect counter	       */
-#define MII_FCSCOUNTER	    0x13	/* False carrier counter       */
-#define MII_NWAYTEST	    0x14	/* N-way auto-neg test reg     */
-#define MII_RERRCOUNTER     0x15	/* Receive error counter       */
-#define MII_SREVISION	    0x16	/* Silicon revision	       */
-#define MII_RESV1	    0x17	/* Reserved...		       */
-#define MII_LBRERROR	    0x18	/* Lpback, rx, bypass error    */
-#define MII_PHYADDR	    0x19	/* PHY address		       */
-#define MII_RESV2	    0x1a	/* Reserved...		       */
-#define MII_TPISTATUS	    0x1b	/* TPI status for 10mbps       */
-#define MII_NCONFIG	    0x1c	/* Network interface config    */
+#define MII_BMCR		0x00	/* Basic mode control register */
+#define MII_BMSR		0x01	/* Basic mode status register  */
+#define MII_PHYSID1		0x02	/* PHYS ID 1                   */
+#define MII_PHYSID2		0x03	/* PHYS ID 2                   */
+#define MII_ADVERTISE		0x04	/* Advertisement control reg   */
+#define MII_LPA			0x05	/* Link partner ability reg    */
+#define MII_EXPANSION		0x06	/* Expansion register          */
+#define MII_CTRL1000		0x09	/* 1000BASE-T control          */
+#define MII_STAT1000		0x0a	/* 1000BASE-T status           */
+#define MII_MMD_CTRL		0x0d	/* MMD Access Control Register */
+#define MII_MMD_DATA		0x0e	/* MMD Access Data Register */
+#define MII_ESTATUS		0x0f	/* Extended Status             */
+#define MII_DCOUNTER		0x12	/* Disconnect counter          */
+#define MII_FCSCOUNTER		0x13	/* False carrier counter       */
+#define MII_NWAYTEST		0x14	/* N-way auto-neg test reg     */
+#define MII_RERRCOUNTER		0x15	/* Receive error counter       */
+#define MII_SREVISION		0x16	/* Silicon revision            */
+#define MII_RESV1		0x17	/* Reserved...                 */
+#define MII_LBRERROR		0x18	/* Lpback, rx, bypass error    */
+#define MII_PHYADDR		0x19	/* PHY address                 */
+#define MII_RESV2		0x1a	/* Reserved...                 */
+#define MII_TPISTATUS		0x1b	/* TPI status for 10mbps       */
+#define MII_NCONFIG		0x1c	/* Network interface config    */
 
 /* Basic mode control register. */
-#define BMCR_RESV		0x003f	/* Unused...		       */
-#define BMCR_SPEED1000		0x0040	/* MSB of Speed (1000)	       */
-#define BMCR_CTST		0x0080	/* Collision test	       */
-#define BMCR_FULLDPLX		0x0100	/* Full duplex		       */
+#define BMCR_RESV		0x003f	/* Unused...                   */
+#define BMCR_SPEED1000		0x0040	/* MSB of Speed (1000)         */
+#define BMCR_CTST		0x0080	/* Collision test              */
+#define BMCR_FULLDPLX		0x0100	/* Full duplex                 */
 #define BMCR_ANRESTART		0x0200	/* Auto negotiation restart    */
-#define BMCR_ISOLATE		0x0400	/* Disconnect DP83840 from MII */
-#define BMCR_PDOWN		0x0800	/* Powerdown the DP83840       */
+#define BMCR_ISOLATE		0x0400	/* Isolate data paths from MII */
+#define BMCR_PDOWN		0x0800	/* Enable low power state      */
 #define BMCR_ANENABLE		0x1000	/* Enable auto negotiation     */
-#define BMCR_SPEED100		0x2000	/* Select 100Mbps	       */
-#define BMCR_LOOPBACK		0x4000	/* TXD loopback bits	       */
-#define BMCR_RESET		0x8000	/* Reset the DP83840	       */
+#define BMCR_SPEED100		0x2000	/* Select 100Mbps              */
+#define BMCR_LOOPBACK		0x4000	/* TXD loopback bits           */
+#define BMCR_RESET		0x8000	/* Reset to default state      */
+#define BMCR_SPEED10		0x0000	/* Select 10Mbps               */
 
 /* Basic mode status register. */
-#define BMSR_ERCAP		0x0001	/* Ext-reg capability	       */
-#define BMSR_JCD		0x0002	/* Jabber detected	       */
-#define BMSR_LSTATUS		0x0004	/* Link status		       */
+#define BMSR_ERCAP		0x0001	/* Ext-reg capability          */
+#define BMSR_JCD		0x0002	/* Jabber detected             */
+#define BMSR_LSTATUS		0x0004	/* Link status                 */
 #define BMSR_ANEGCAPABLE	0x0008	/* Able to do auto-negotiation */
 #define BMSR_RFAULT		0x0010	/* Remote fault detected       */
 #define BMSR_ANEGCOMPLETE	0x0020	/* Auto-negotiation complete   */
-#define BMSR_RESV		0x00c0	/* Unused...		       */
-#define BMSR_ESTATEN		0x0100	/* Extended Status in R15 */
-#define BMSR_100HALF2		0x0200	/* Can do 100BASE-T2 HDX */
-#define BMSR_100FULL2		0x0400	/* Can do 100BASE-T2 FDX */
+#define BMSR_RESV		0x00c0	/* Unused...                   */
+#define BMSR_ESTATEN		0x0100	/* Extended Status in R15      */
+#define BMSR_100HALF2		0x0200	/* Can do 100BASE-T2 HDX       */
+#define BMSR_100FULL2		0x0400	/* Can do 100BASE-T2 FDX       */
 #define BMSR_10HALF		0x0800	/* Can do 10mbps, half-duplex  */
 #define BMSR_10FULL		0x1000	/* Can do 10mbps, full-duplex  */
 #define BMSR_100HALF		0x2000	/* Can do 100mbps, half-duplex */
@@ -63,7 +66,7 @@
 #define BMSR_100BASE4		0x8000	/* Can do 100mbps, 4k packets  */
 
 /* Advertisement control register. */
-#define ADVERTISE_SLCT		0x001f	/* Selector bits	       */
+#define ADVERTISE_SLCT		0x001f	/* Selector bits               */
 #define ADVERTISE_CSMA		0x0001	/* Only selector supported     */
 #define ADVERTISE_10HALF	0x0020	/* Try for 10mbps half-duplex  */
 #define ADVERTISE_1000XFULL	0x0020	/* Try for 1000BASE-X full-duplex */
@@ -72,19 +75,19 @@
 #define ADVERTISE_100HALF	0x0080	/* Try for 100mbps half-duplex */
 #define ADVERTISE_1000XPAUSE	0x0080	/* Try for 1000BASE-X pause    */
 #define ADVERTISE_100FULL	0x0100	/* Try for 100mbps full-duplex */
-#define ADVERTISE_1000XPSE_ASYM 0x0100	/* Try for 1000BASE-X asym pause */
+#define ADVERTISE_1000XPSE_ASYM	0x0100	/* Try for 1000BASE-X asym pause */
 #define ADVERTISE_100BASE4	0x0200	/* Try for 100mbps 4k packets  */
-#define ADVERTISE_PAUSE_CAP	0x0400	/* Try for pause	       */
+#define ADVERTISE_PAUSE_CAP	0x0400	/* Try for pause               */
 #define ADVERTISE_PAUSE_ASYM	0x0800	/* Try for asymetric pause     */
-#define ADVERTISE_RESV		0x1000	/* Unused...		       */
+#define ADVERTISE_RESV		0x1000	/* Unused...                   */
 #define ADVERTISE_RFAULT	0x2000	/* Say we can detect faults    */
 #define ADVERTISE_LPACK		0x4000	/* Ack link partners response  */
-#define ADVERTISE_NPAGE		0x8000	/* Next page bit	       */
+#define ADVERTISE_NPAGE		0x8000	/* Next page bit               */
 
-#define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | \
-			ADVERTISE_CSMA)
-#define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \
-		       ADVERTISE_100HALF | ADVERTISE_100FULL)
+#define ADVERTISE_FULL		(ADVERTISE_100FULL | ADVERTISE_10FULL | \
+				 ADVERTISE_CSMA)
+#define ADVERTISE_ALL		(ADVERTISE_10HALF | ADVERTISE_10FULL | \
+				 ADVERTISE_100HALF | ADVERTISE_100FULL)
 
 /* Link partner ability register. */
 #define LPA_SLCT		0x001f	/* Same as advertise selector  */
@@ -97,12 +100,12 @@
 #define LPA_100FULL		0x0100	/* Can do 100mbps full-duplex  */
 #define LPA_1000XPAUSE_ASYM	0x0100	/* Can do 1000BASE-X pause asym*/
 #define LPA_100BASE4		0x0200	/* Can do 100mbps 4k packets   */
-#define LPA_PAUSE_CAP		0x0400	/* Can pause		       */
+#define LPA_PAUSE_CAP		0x0400	/* Can pause                   */
 #define LPA_PAUSE_ASYM		0x0800	/* Can pause asymetrically     */
-#define LPA_RESV		0x1000	/* Unused...		       */
+#define LPA_RESV		0x1000	/* Unused...                   */
 #define LPA_RFAULT		0x2000	/* Link partner faulted        */
 #define LPA_LPACK		0x4000	/* Link partner acked us       */
-#define LPA_NPAGE		0x8000	/* Next page bit	       */
+#define LPA_NPAGE		0x8000	/* Next page bit               */
 
 #define LPA_DUPLEX		(LPA_10FULL | LPA_100FULL)
 #define LPA_100			(LPA_100FULL | LPA_100HALF | LPA_100BASE4)
@@ -113,21 +116,23 @@
 #define EXPANSION_ENABLENPAGE	0x0004	/* This enables npage words    */
 #define EXPANSION_NPCAPABLE	0x0008	/* Link partner supports npage */
 #define EXPANSION_MFAULTS	0x0010	/* Multiple faults detected    */
-#define EXPANSION_RESV		0xffe0	/* Unused...		       */
+#define EXPANSION_RESV		0xffe0	/* Unused...                   */
 
 #define ESTATUS_1000_XFULL	0x8000	/* Can do 1000BX Full */
 #define ESTATUS_1000_XHALF	0x4000	/* Can do 1000BX Half */
-#define ESTATUS_1000_TFULL	0x2000	/* Can do 1000BT Full */
-#define ESTATUS_1000_THALF	0x1000	/* Can do 1000BT Half */
+#define ESTATUS_1000_TFULL	0x2000	/* Can do 1000BT Full          */
+#define ESTATUS_1000_THALF	0x1000	/* Can do 1000BT Half          */
 
 /* N-way test register. */
-#define NWAYTEST_RESV1		0x00ff	/* Unused...		       */
+#define NWAYTEST_RESV1		0x00ff	/* Unused...                   */
 #define NWAYTEST_LOOPBACK	0x0100	/* Enable loopback for N-way   */
-#define NWAYTEST_RESV2		0xfe00	/* Unused...		       */
+#define NWAYTEST_RESV2		0xfe00	/* Unused...                   */
 
 /* 1000BASE-T Control register */
-#define ADVERTISE_1000FULL	0x0200	/* Advertise 1000BASE-T full duplex */
-#define ADVERTISE_1000HALF	0x0100	/* Advertise 1000BASE-T half duplex */
+#define ADVERTISE_1000FULL	0x0200  /* Advertise 1000BASE-T full duplex */
+#define ADVERTISE_1000HALF	0x0100  /* Advertise 1000BASE-T half duplex */
+#define CTL1000_AS_MASTER	0x0800
+#define CTL1000_ENABLE_MASTER	0x1000
 
 /* 1000BASE-T Status register */
 #define LPA_1000LOCALRXOK	0x2000	/* Link partner local receiver status */
@@ -139,6 +144,13 @@
 #define FLOW_CTRL_TX		0x01
 #define FLOW_CTRL_RX		0x02
 
+/* MMD Access Control register fields */
+#define MII_MMD_CTRL_DEVAD_MASK	0x1f	/* Mask MMD DEVAD*/
+#define MII_MMD_CTRL_ADDR	0x0000	/* Address */
+#define MII_MMD_CTRL_NOINCR	0x4000	/* no post increment */
+#define MII_MMD_CTRL_INCR_RDWT	0x8000	/* post increment on reads & writes */
+#define MII_MMD_CTRL_INCR_ON_WT	0xC000	/* post increment on writes only */
+
 /**
  * mii_nway_result
  * @negotiated: value of MII ANAR and'd with ANLPAR

commit 827e2ae92e2103f82dab5b54228ad24e40db6263
Author: Fabrice Gasnier <fabrice.gasnier@st.com>
Date:   Tue Jul 24 16:31:28 2018 +0200

    UPSTREAM: clk: add clk_valid()
    
    Add clk_valid() to check for optional clocks are valid.
    Call clk_valid() in test/dm/clk.c and add relevant test routine to
    sandbox clk tests.
    
    Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Change-Id: I78b1edea1f8ef54d3aa3f7610d39d79dd994d1bf

diff --git a/arch/sandbox/include/asm/clk.h b/arch/sandbox/include/asm/clk.h
index 01b5ba4e07..adca78cbf3 100644
--- a/arch/sandbox/include/asm/clk.h
+++ b/arch/sandbox/include/asm/clk.h
@@ -139,5 +139,13 @@ int sandbox_clk_test_free(struct udevice *dev);
  * @return:	0 if OK, or a negative error code.
  */
 int sandbox_clk_test_release_bulk(struct udevice *dev);
+/**
+ * sandbox_clk_test_valid - Ask the sandbox clock test device to check its
+ * clocks are valid.
+ *
+ * @dev:	The sandbox clock test (client) devivce.
+ * @return:	0 if OK, or a negative error code.
+ */
+int sandbox_clk_test_valid(struct udevice *dev);
 
 #endif
diff --git a/drivers/clk/clk_sandbox_test.c b/drivers/clk/clk_sandbox_test.c
index d0898815b3..ee69eed690 100644
--- a/drivers/clk/clk_sandbox_test.c
+++ b/drivers/clk/clk_sandbox_test.c
@@ -117,6 +117,19 @@ int sandbox_clk_test_release_bulk(struct udevice *dev)
 	return clk_release_bulk(&sbct->bulk);
 }
 
+int sandbox_clk_test_valid(struct udevice *dev)
+{
+	struct sandbox_clk_test *sbct = dev_get_priv(dev);
+	int i;
+
+	for (i = 0; i < SANDBOX_CLK_TEST_ID_COUNT; i++) {
+		if (!clk_valid(&sbct->clks[i]))
+			return -EINVAL;
+	}
+
+	return 0;
+}
+
 static const struct udevice_id sandbox_clk_test_ids[] = {
 	{ .compatible = "sandbox,clk-test" },
 	{ }
diff --git a/include/clk.h b/include/clk.h
index f89b3acdba..16cbf6db81 100644
--- a/include/clk.h
+++ b/include/clk.h
@@ -317,4 +317,14 @@ int soc_clk_dump(void);
 
 int clks_probe(void);
 
+/**
+ * clk_valid() - check if clk is valid
+ *
+ * @clk:	the clock to check
+ * @return true if valid, or false
+ */
+static inline bool clk_valid(struct clk *clk)
+{
+	return !!clk->dev;
+}
 #endif
diff --git a/test/dm/clk.c b/test/dm/clk.c
index d3649103ee..344e2555f0 100644
--- a/test/dm/clk.c
+++ b/test/dm/clk.c
@@ -29,6 +29,7 @@ static int dm_test_clk(struct unit_test_state *uts)
 	ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test",
 					      &dev_test));
 	ut_assertok(sandbox_clk_test_get(dev_test));
+	ut_assertok(sandbox_clk_test_valid(dev_test));
 
 	ut_asserteq(1234,
 		    sandbox_clk_test_get_rate(dev_test,

commit ee601a06f78a64ba2316087de7af95160e540702
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu May 28 19:37:49 2020 +0800

    configs: rv1126: define CONFIG_OF_U_BOOT_REMOVE_PROPS
    
    In order to use gmac without kernel dtb.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I3a74262ac6090410bc7f0c09a70fc92fe36aee5a

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index 45eeed69bf..2c20b5e986 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -68,6 +68,7 @@ CONFIG_SPL_OF_CONTROL=y
 CONFIG_SPL_DTB_MINIMUM=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_U_BOOT_REMOVE_PROPS="interrupt-parent"
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y

commit c48a3a80d2169914a6b90ad1a3895e69b7797cae
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu May 28 11:40:57 2020 +0800

    dts: Kconfig: introduce U-Boot list of device tree properties to drop
    
    Since kernel dtb feature is enabled, U-Boot prop use the same device tree as SPL.
    At sometimes there is different require for list of device tree properties to drop
    for U-Boot prop, so providing this configure which has higher priority, that if it
    is defined empty string, fallback to use OF_SPL_REMOVE_PROPS.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I83b97226c01c320d3a51a6cb0b181016dc5c0067

diff --git a/dts/Kconfig b/dts/Kconfig
index 7dfd5990d2..16f281ae45 100644
--- a/dts/Kconfig
+++ b/dts/Kconfig
@@ -248,6 +248,16 @@ config OF_SPL_REMOVE_PROPS
 	  can be discarded. This option defines the list of properties to
 	  discard.
 
+config OF_U_BOOT_REMOVE_PROPS
+	string "List of device tree properties to drop for U-Boot"
+	depends on USING_KERNEL_DTB
+	default ""
+	help
+	  Since kernel dtb feature is enabled, U-Boot prop use the same device tree as SPL.
+	  At sometimes there is different require for list of device tree properties to drop
+	  for U-Boot prop, so providing this configure which has higher priority, that if it
+	  is defined empty string, fallback to use OF_SPL_REMOVE_PROPS.
+
 config SPL_OF_PLATDATA
 	bool "Generate platform data for use in SPL"
 	depends on SPL_OF_CONTROL
diff --git a/dts/Makefile b/dts/Makefile
index ec341cad35..5383dd6f9a 100644
--- a/dts/Makefile
+++ b/dts/Makefile
@@ -32,11 +32,18 @@ fdtgrep_props := -b u-boot,dm-pre-reloc -b u-boot,dm-tpl
 else
 fdtgrep_props := -b u-boot,dm-pre-reloc -b u-boot,dm-spl
 endif
+
 quiet_cmd_fdtgrep = FDTGREP $@
       cmd_fdtgrep = $(objtree)/tools/fdtgrep $(fdtgrep_props) -RT $< \
+                -n /chosen -n /config -O dtb | \
+        $(objtree)/tools/fdtgrep -r -O dtb - -o $@ \
+                $(addprefix -P ,$(subst $\",,$(CONFIG_OF_SPL_REMOVE_PROPS)))
+
+quiet_cmd_fdtgrep_uboot = FDTGREP $@
+      cmd_fdtgrep_uboot = $(objtree)/tools/fdtgrep $(fdtgrep_props) -RT $< \
 		-n /chosen -n /config -O dtb | \
 	$(objtree)/tools/fdtgrep -r -O dtb - -o $@ \
-		$(addprefix -P ,$(subst $\",,$(CONFIG_OF_SPL_REMOVE_PROPS)))
+		$(addprefix -P ,$(subst $\",,$(CONFIG_OF_U_BOOT_REMOVE_PROPS)))
 
 fdtgrep_tpl_props := -b u-boot,dm-pre-reloc -b u-boot,dm-tpl
 quiet_cmd_fdtgrep_tpl = FDTGREP $@
@@ -63,9 +70,14 @@ $(obj)/dt-spl.dtb: $(DTB) $(objtree)/tools/fdtgrep FORCE
 	$(call if_changed,fdtgrep)
 endif
 
+# Normally, usbplug is enabled with kernel dtb disabled
 ifneq ($(CONFIG_USING_KERNEL_DTB)$(CONFIG_SUPPORT_USBPLUG),)
 $(obj)/dt.dtb: $(DTB) $(objtree)/tools/fdtgrep FORCE
+ifneq ($(CONFIG_OF_U_BOOT_REMOVE_PROPS), "")
+	$(call if_changed,fdtgrep_uboot)
+else
 	$(call if_changed,fdtgrep)
+endif
 else
 $(obj)/dt.dtb: $(DTB) FORCE
 	$(call if_changed,shipped)

commit 1619e70322c99b5e6a193f08c275e00b12d576ff
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu May 28 19:21:22 2020 +0800

    rockchip: dts: rv1126: add gmac support
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I19edafc1fc9402d6f9a4123c935e8a0881071960

diff --git a/arch/arm/dts/rv1126-u-boot.dtsi b/arch/arm/dts/rv1126-u-boot.dtsi
index eb4739a8f5..27a7820cdd 100644
--- a/arch/arm/dts/rv1126-u-boot.dtsi
+++ b/arch/arm/dts/rv1126-u-boot.dtsi
@@ -143,3 +143,102 @@
 	u-boot,dm-pre-reloc;
 	status = "okay";
 };
+
+&pinctrl {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&gpio3 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&gmac {
+	u-boot,dm-pre-reloc;
+
+	phy-mode = "rgmii";
+	clock_in_out = "input";
+
+	snps,reset-gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_LOW>;
+	snps,reset-active-low;
+	/* Reset time is 20ms, 100ms for rtl8211f */
+	snps,reset-delays-us = <0 20000 100000>;
+
+	assigned-clocks = <&cru CLK_GMAC_SRC>, <&cru CLK_GMAC_TX_RX>, <&cru CLK_GMAC_ETHERNET_OUT>;
+	assigned-clock-parents = <&cru CLK_GMAC_SRC_M1>, <&cru RGMII_MODE_CLK>;
+	assigned-clock-rates = <125000000>, <0>, <25000000>;
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&rgmiim1_pins &clk_out_ethernetm1_pins>;
+
+	tx_delay = <0x2a>;
+	rx_delay = <0x1a>;
+
+	phy-handle = <&phy>;
+	status = "okay";
+};
+
+&mdio {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+
+	phy: phy@0 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		u-boot,dm-pre-reloc;
+		reg = <0x0>;
+		clocks = <&cru CLK_GMAC_ETHERNET_OUT>;
+	};
+};
+
+&stmmac_axi_setup {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+	queue0 {
+		u-boot,dm-pre-reloc;
+	};
+};
+
+&mtl_rx_setup {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+	queue0 {
+		u-boot,dm-pre-reloc;
+	};
+};
+
+&mtl_tx_setup {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&gmac_clkin_m0 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&gmac_clkini_m1 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&rgmiim1_pins {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&clk_out_ethernetm1_pins{
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&pcfg_pull_none {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&pcfg_pull_none_drv_level_12 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+

commit 11a331d232dea79e25443776ebc3044cbe91d259
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu May 28 19:08:44 2020 +0800

    cmd: source: update terminal value
    
    According to commit:
    (40d08d0 tools: mkimage: support pack empty file for multi image)
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ie370e9137b7441bd75582c95b3f60d76d8945629

diff --git a/cmd/source.c b/cmd/source.c
index d724d63eb7..45e9794b2f 100644
--- a/cmd/source.c
+++ b/cmd/source.c
@@ -84,7 +84,7 @@ source (ulong addr, const char *fit_uname)
 		 * past the zero-terminated sequence of image lengths to get
 		 * to the actual image data
 		 */
-		while (*data++);
+		while (*data++ != IMAGE_PARAM_INVAL);
 		break;
 #endif
 #if defined(CONFIG_FIT)

commit 24f48ac9a88321d38657a9c41950e2527e165635
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Tue Jun 2 11:00:04 2020 +0800

    clk: rockchip: rv1126: Change pclk pdbus parent to gpll
    
    As dmac aclk comes from hclk pdbus, dmac pclk comes frome pclk pdbus,
    dmac aclk should be an integer multiple of dmac pclk and the same
    parent with dmac pclk. so let hclk pdbus and pclk pdbus only come from
    gpll.
    
    Change-Id: Idd2f362fcf160352dcb4577ad8a13b4dbec7c65f
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rv1126.c b/drivers/clk/rockchip/clk_rv1126.c
index 695d955947..230378055b 100644
--- a/drivers/clk/rockchip/clk_rv1126.c
+++ b/drivers/clk/rockchip/clk_rv1126.c
@@ -687,11 +687,11 @@ static ulong rv1126_pdbus_set_clk(struct rv1126_clk_priv *priv, ulong clk_id,
 			     (src_clk_div - 1) << HCLK_PDBUS_DIV_SHIFT);
 		break;
 	case PCLK_PDBUS:
-		src_clk_div = DIV_ROUND_UP(priv->cpll_hz, rate);
+		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);
 		assert(src_clk_div - 1 <= 31);
 		rk_clrsetreg(&cru->clksel_con[3],
 			     PCLK_PDBUS_SEL_MASK | PCLK_PDBUS_DIV_MASK,
-			     PCLK_PDBUS_SEL_CPLL << PCLK_PDBUS_SEL_SHIFT |
+			     PCLK_PDBUS_SEL_GPLL << PCLK_PDBUS_SEL_SHIFT |
 			     (src_clk_div - 1) << PCLK_PDBUS_DIV_SHIFT);
 		break;
 

commit 33e40bac6a1078fbf3dd63afbbd54ec84683b34a
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jun 1 12:43:48 2020 +0800

    mmc: dw_mmc: set DWMCI_CARDTHRCTL
    
    Since v2.80a, dwmmc controller introduced the card write threshold for
    HS200 & HS400 mode. So CardThrCtl can be supported during write operation, not
    only read operation.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I7f345660107c2978d2f874d36f2dffd2acdfbcb6

diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index f8347f0c52..6d7cfdfd45 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -581,6 +581,7 @@ static int dwmci_init(struct mmc *mmc)
 {
 	struct dwmci_host *host = mmc->priv;
 	uint32_t use_dma;
+	uint32_t verid;
 
 	if (host->board_init)
 		host->board_init(host);
@@ -595,6 +596,10 @@ static int dwmci_init(struct mmc *mmc)
 	dwmci_writel(host, DWMCI_PWREN, 1);
 #endif
 
+	verid = dwmci_readl(host, DWMCI_VERID) & 0x0000ffff;
+	if (verid >= DW_MMC_240A)
+		dwmci_writel(host, DWMCI_CARDTHRCTL, DWMCI_CDTHRCTRL_CONFIG);
+
 	if (!dwmci_wait_reset(host, DWMCI_RESET_ALL)) {
 		debug("%s[%d] Fail-reset!!\n", __func__, __LINE__);
 		return -EIO;
diff --git a/include/dwmmc.h b/include/dwmmc.h
index 9e5966d320..ddae2ec639 100644
--- a/include/dwmmc.h
+++ b/include/dwmmc.h
@@ -48,6 +48,7 @@
 #define DWMCI_IDINTEN		0x090
 #define DWMCI_DSCADDR		0x094
 #define DWMCI_BUFADDR		0x098
+#define DWMCI_CARDTHRCTL	0x100
 #define DWMCI_DATA		0x200
 
 /* Interrupt Mask register */
@@ -141,6 +142,12 @@
  */
 #define DWMCI_MSIZE    0x6
 
+/* The DW MMC Controller Version */
+#define DW_MMC_240A		0x240a
+
+/* sdmmc cardthrctl set */
+#define DWMCI_CDTHRCTRL_CONFIG (1 + (0x200 << 16))
+
 /**
  * struct dwmci_host - Information about a designware MMC host
  *

commit ca0130caa22b11b11ea201cb600762e279b336f2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 1 14:42:33 2020 +0800

    common: image-fit: correct fit_set_totalsize()
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I2febc67bf0b16611cd54afad75fa79ac7454f4a5

diff --git a/common/image-fit.c b/common/image-fit.c
index a69b716b2b..1327039cf1 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -1094,7 +1094,7 @@ int fit_set_timestamp(void *fit, int noffset, time_t timestamp)
 	return 0;
 }
 
-int fit_set_totalsize(void *fit, int noffset, time_t totalsize)
+int fit_set_totalsize(void *fit, int noffset, int totalsize)
 {
 	uint32_t t;
 	int ret;
@@ -1102,12 +1102,8 @@ int fit_set_totalsize(void *fit, int noffset, time_t totalsize)
 	t = cpu_to_uimage(totalsize);
 	ret = fdt_setprop(fit, noffset, FIT_TOTALSIZE_PROP, &t,
 				sizeof(uint32_t));
-	if (ret) {
-		printf("Can't set '%s' property for '%s' node (%s)\n",
-		      FIT_TOTALSIZE_PROP, fit_get_name(fit, noffset, NULL),
-		      fdt_strerror(ret));
+	if (ret)
 		return ret == -FDT_ERR_NOSPACE ? -ENOSPC : -1;
-	}
 
 	return 0;
 }
diff --git a/include/image.h b/include/image.h
index 6f642704e8..9ddbc50324 100644
--- a/include/image.h
+++ b/include/image.h
@@ -1026,7 +1026,7 @@ int fit_image_check_hash(const void *fit, int noffset, const void *data,
 			 size_t size, char **err_msgp);
 
 int fit_set_timestamp(void *fit, int noffset, time_t timestamp);
-int fit_set_totalsize(void *fit, int noffset, time_t totalsize);
+int fit_set_totalsize(void *fit, int noffset, int totalsize);
 
 int fit_get_image_defconf_node(const void *fit,
 			       int *images_noffset, int *def_noffset);

commit 012d0ecf965ba46cac85546e8b5229d6effbf399
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Fri May 29 11:47:30 2020 +0800

    rockchip: rv1126: disable force_jtag
    
    Change-Id: I16b1c30495e68ac58845e9f45014319384a4d5a6
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126.c b/arch/arm/mach-rockchip/rv1126/rv1126.c
index 34b774d593..0c36a2767c 100644
--- a/arch/arm/mach-rockchip/rv1126/rv1126.c
+++ b/arch/arm/mach-rockchip/rv1126/rv1126.c
@@ -58,6 +58,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define SCR1_START_ADDR		0x208000
 #define CRU_SOFTRST_CON11	0xFF49032C
 #define PMUGRF_SOC_CON1		0xFE020104
+#define GRF_IOFUNC_CON3		0xFF01026C
 
 void board_debug_uart_init(void)
 {
@@ -71,6 +72,9 @@ int arch_cpu_init(void)
 	writel(0, FIREWALL_APB_BASE + FW_DDR_CON_REG);
 #endif
 
+	/* disable force jtag mux route to both group0 and group1 */
+	writel(0x00300000, GRF_IOFUNC_CON3);
+
 #if !defined(CONFIG_TPL_BUILD)
 	int delay;
 

commit 7c7344b17a390cd8201fc99153fd72e579b46395
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 29 09:23:36 2020 +0800

    rockchip: rv1126: use imply for CONFIG_ROCKCHIP_GPIO_V2
    
    Fixes warning from rv1126-usbplug_defconfig:
            ......
            warning: (ROCKCHIP_RV1126) selects ROCKCHIP_GPIO_V2 which has unmet direct dependencies (ROCKCHIP_GPIO)
            warning: (ROCKCHIP_RV1126) selects ROCKCHIP_GPIO_V2 which has unmet direct dependencies (ROCKCHIP_GPIO)
            ......
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I2c7d64e9cdd03f3e8dcbbb948d747a67d7dff4da

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index c6dfed4b69..94be759035 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -429,7 +429,7 @@ config ROCKCHIP_RV1126
 	select SUPPORT_SPL
 	select SPL if !SUPPORT_USBPLUG
 	select BOARD_LATE_INIT if !SUPPORT_USBPLUG
-	select ROCKCHIP_GPIO_V2
+	imply ROCKCHIP_GPIO_V2
 	help
 	  The Rockchip RV1126 is a ARM-based SoC with a quad-core Cortex-A7
 	  and a risc-v core.

commit d44b14ecc86908582e130e2b34ebb41926f6c339
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon May 25 16:33:01 2020 +0800

    configs: rv1126: enable optee client v2
    
    Enable otp verified-boot flag verify for U-Boot proper.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I64547de92cde34f71e14b418c4c2e64ae70fa676

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index 809ab25e00..45eeed69bf 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -141,3 +141,5 @@ CONFIG_SPL_RSA=y
 CONFIG_SHA512=y
 CONFIG_ERRNO_STR=y
 # CONFIG_EFI_LOADER is not set
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V2=y

commit e59905bf16f6e10296d2177d255e06a02d59e374
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu May 28 16:31:57 2020 +0800

    irq: use CONFIG_ROCKCHIP_GPIO_V2 instead of CONFIG_IRQ2GPIO_V2
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Id8b232efce483501053bcbd779a444d395c061fc

diff --git a/drivers/irq/Kconfig b/drivers/irq/Kconfig
index 96b90be9f5..278da83475 100644
--- a/drivers/irq/Kconfig
+++ b/drivers/irq/Kconfig
@@ -5,9 +5,3 @@ config IRQ
 	help
 	  Provide IRQ support for platforms
 
-config IRQ2GPIO_V2
-	bool "Enable irq to gpio v2 transfer"
-	depends on IRQ
-	help
-	  Some platform with new GPIO IP implements the low/high
-	  registers with write mask. This configure handles it.
diff --git a/drivers/irq/Makefile b/drivers/irq/Makefile
index 745bdea23c..b9b1c272a6 100644
--- a/drivers/irq/Makefile
+++ b/drivers/irq/Makefile
@@ -6,7 +6,7 @@
 
 obj-y += irq-gic.o
 
-ifdef CONFIG_IRQ2GPIO_V2
+ifdef CONFIG_ROCKCHIP_GPIO_V2
 obj-y += irq-gpio-v2.o
 else
 obj-y += irq-gpio.o

commit 1c0910cb6f1f62fa0131c9b70c643244203339de
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Thu May 28 11:20:50 2020 +0800

    rockchip: rv1126: select ROCKCHIP_GPIO_V2
    
    Change-Id: Id6c97ee21e5692b873c5711340b3e85ead06e679
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 39fa942978..c6dfed4b69 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -429,6 +429,7 @@ config ROCKCHIP_RV1126
 	select SUPPORT_SPL
 	select SPL if !SUPPORT_USBPLUG
 	select BOARD_LATE_INIT if !SUPPORT_USBPLUG
+	select ROCKCHIP_GPIO_V2
 	help
 	  The Rockchip RV1126 is a ARM-based SoC with a quad-core Cortex-A7
 	  and a risc-v core.

commit d1aef94b5af0d0191a8f53dfdd2a1d661a1c54cd
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Wed May 27 11:36:26 2020 +0800

    gpio/rockchip: rk_gpio support v2 gpio controller
    
    The v2 gpio controller add write enable bit for some register,
    such as data register, data direction register and so on.
    
    This patch support v2 gpio controller by redefine the read and
    write operation functions.
    
    Change-Id: I2adbcca06a37c48e6f494b89833cd034ba0dae29
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/gpio.h b/arch/arm/include/asm/arch-rockchip/gpio.h
index e39218d0a9..84b11b7dd5 100644
--- a/arch/arm/include/asm/arch-rockchip/gpio.h
+++ b/arch/arm/include/asm/arch-rockchip/gpio.h
@@ -7,6 +7,7 @@
 #ifndef _ASM_ARCH_GPIO_H
 #define _ASM_ARCH_GPIO_H
 
+#ifndef CONFIG_ROCKCHIP_GPIO_V2
 struct rockchip_gpio_regs {
 	u32 swport_dr;
 	u32 swport_ddr;
@@ -24,5 +25,40 @@ struct rockchip_gpio_regs {
 	u32 ls_sync;
 };
 check_member(rockchip_gpio_regs, ls_sync, 0x60);
+#else
+struct rockchip_gpio_regs {
+	u32 swport_dr_l;                        /* ADDRESS OFFSET: 0x0000 */
+	u32 swport_dr_h;                        /* ADDRESS OFFSET: 0x0004 */
+	u32 swport_ddr_l;                       /* ADDRESS OFFSET: 0x0008 */
+	u32 swport_ddr_h;                       /* ADDRESS OFFSET: 0x000c */
+	u32 int_en_l;                           /* ADDRESS OFFSET: 0x0010 */
+	u32 int_en_h;                           /* ADDRESS OFFSET: 0x0014 */
+	u32 int_mask_l;                         /* ADDRESS OFFSET: 0x0018 */
+	u32 int_mask_h;                         /* ADDRESS OFFSET: 0x001c */
+	u32 int_type_l;                         /* ADDRESS OFFSET: 0x0020 */
+	u32 int_type_h;                         /* ADDRESS OFFSET: 0x0024 */
+	u32 int_polarity_l;                     /* ADDRESS OFFSET: 0x0028 */
+	u32 int_polarity_h;                     /* ADDRESS OFFSET: 0x002c */
+	u32 int_bothedge_l;                     /* ADDRESS OFFSET: 0x0030 */
+	u32 int_bothedge_h;                     /* ADDRESS OFFSET: 0x0034 */
+	u32 debounce_l;                         /* ADDRESS OFFSET: 0x0038 */
+	u32 debounce_h;                         /* ADDRESS OFFSET: 0x003c */
+	u32 dbclk_div_en_l;                     /* ADDRESS OFFSET: 0x0040 */
+	u32 dbclk_div_en_h;                     /* ADDRESS OFFSET: 0x0044 */
+	u32 dbclk_div_con;                      /* ADDRESS OFFSET: 0x0048 */
+	u32 reserved004c;                       /* ADDRESS OFFSET: 0x004c */
+	u32 int_status;                         /* ADDRESS OFFSET: 0x0050 */
+	u32 reserved0054;                       /* ADDRESS OFFSET: 0x0054 */
+	u32 int_rawstatus;                      /* ADDRESS OFFSET: 0x0058 */
+	u32 reserved005c;                       /* ADDRESS OFFSET: 0x005c */
+	u32 port_eoi_l;                         /* ADDRESS OFFSET: 0x0060 */
+	u32 port_eoi_h;                         /* ADDRESS OFFSET: 0x0064 */
+	u32 reserved0068[2];                    /* ADDRESS OFFSET: 0x0068 */
+	u32 ext_port;                           /* ADDRESS OFFSET: 0x0070 */
+	u32 reserved0074;                       /* ADDRESS OFFSET: 0x0074 */
+	u32 ver_id;                             /* ADDRESS OFFSET: 0x0078 */
+};
+check_member(rockchip_gpio_regs, ver_id, 0x0078);
+#endif
 
 #endif
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index ffeda9425a..e968e9edd4 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -144,6 +144,19 @@ config ROCKCHIP_GPIO
 	  The GPIOs for a device are defined in the device tree with one node
 	  for each bank.
 
+config ROCKCHIP_GPIO_V2
+	bool "Rockchip GPIO driver version 2.0"
+	depends on ROCKCHIP_GPIO
+	default n
+	help
+	  Support GPIO access on Rockchip SoCs. The GPIOs are arranged into
+	  a number of banks (different for each SoC type) each with 32 GPIOs.
+	  The GPIOs for a device are defined in the device tree with one node
+	  for each bank.
+
+	  Support version 2.0 GPIO controller, which support write enable bits
+	  for some registers, such as dr, ddr.
+
 config SANDBOX_GPIO
 	bool "Enable sandbox GPIO driver"
 	depends on SANDBOX && DM && DM_GPIO
diff --git a/drivers/gpio/rk_gpio.c b/drivers/gpio/rk_gpio.c
index eff0d2af63..c3f72c54e3 100644
--- a/drivers/gpio/rk_gpio.c
+++ b/drivers/gpio/rk_gpio.c
@@ -1,8 +1,9 @@
 /*
  * (C) Copyright 2015 Google, Inc
  *
- * (C) Copyright 2008-2014 Rockchip Electronics
+ * (C) Copyright 2008-2020 Rockchip Electronics
  * Peter, Software Engineering, <superpeter.cai@gmail.com>.
+ * Jianqun Xu, Software Engineering, <jay.xu@rock-chips.com>.
  *
  * SPDX-License-Identifier:     GPL-2.0+
  */
@@ -23,6 +24,30 @@ enum {
 
 #define OFFSET_TO_BIT(bit)	(1UL << (bit))
 
+#ifdef CONFIG_ROCKCHIP_GPIO_V2
+#define REG_L(R)	(R##_l)
+#define REG_H(R)	(R##_h)
+#define READ_REG(REG)	((readl(REG_L(REG)) & 0xFFFF) | \
+			((readl(REG_H(REG)) & 0xFFFF) << 16))
+#define WRITE_REG(REG, VAL)	\
+{\
+	writel(((VAL) & 0xFFFF) | 0xFFFF0000, REG_L(REG)); \
+	writel((((VAL) & 0xFFFF0000) >> 16) | 0xFFFF0000, REG_H(REG));\
+}
+#define CLRBITS_LE32(REG, MASK)	WRITE_REG(REG, READ_REG(REG) & ~(MASK))
+#define SETBITS_LE32(REG, MASK)	WRITE_REG(REG, READ_REG(REG) | (MASK))
+#define CLRSETBITS_LE32(REG, MASK, VAL)	WRITE_REG(REG, \
+				(READ_REG(REG) & ~(MASK)) | (VAL))
+
+#else
+#define READ_REG(REG)			readl(REG)
+#define WRITE_REG(REG, VAL)		writel(VAL, REG)
+#define CLRBITS_LE32(REG, MASK)		clrbits_le32(REG, MASK)
+#define SETBITS_LE32(REG, MASK)		setbits_le32(REG, MASK)
+#define CLRSETBITS_LE32(REG, MASK, VAL)	clrsetbits_le32(REG, MASK, VAL)
+#endif
+
+
 struct rockchip_gpio_priv {
 	struct rockchip_gpio_regs *regs;
 	struct udevice *pinctrl;
@@ -35,7 +60,7 @@ static int rockchip_gpio_direction_input(struct udevice *dev, unsigned offset)
 	struct rockchip_gpio_priv *priv = dev_get_priv(dev);
 	struct rockchip_gpio_regs *regs = priv->regs;
 
-	clrbits_le32(&regs->swport_ddr, OFFSET_TO_BIT(offset));
+	CLRBITS_LE32(&regs->swport_ddr, OFFSET_TO_BIT(offset));
 
 	return 0;
 }
@@ -47,8 +72,8 @@ static int rockchip_gpio_direction_output(struct udevice *dev, unsigned offset,
 	struct rockchip_gpio_regs *regs = priv->regs;
 	int mask = OFFSET_TO_BIT(offset);
 
-	clrsetbits_le32(&regs->swport_dr, mask, value ? mask : 0);
-	setbits_le32(&regs->swport_ddr, mask);
+	CLRSETBITS_LE32(&regs->swport_dr, mask, value ? mask : 0);
+	SETBITS_LE32(&regs->swport_ddr, mask);
 
 	return 0;
 }
@@ -68,7 +93,7 @@ static int rockchip_gpio_set_value(struct udevice *dev, unsigned offset,
 	struct rockchip_gpio_regs *regs = priv->regs;
 	int mask = OFFSET_TO_BIT(offset);
 
-	clrsetbits_le32(&regs->swport_dr, mask, value ? mask : 0);
+	CLRSETBITS_LE32(&regs->swport_dr, mask, value ? mask : 0);
 
 	return 0;
 }
@@ -90,7 +115,8 @@ static int rockchip_gpio_get_function(struct udevice *dev, unsigned offset)
 	/* If it's not 0, then it is not a GPIO */
 	if (ret)
 		return GPIOF_FUNC;
-	is_output = readl(&regs->swport_ddr) & OFFSET_TO_BIT(offset);
+
+	is_output = READ_REG(&regs->swport_ddr) & OFFSET_TO_BIT(offset);
 
 	return is_output ? GPIOF_OUTPUT : GPIOF_INPUT;
 #endif

commit 7d13e745d65af22312c45b93090e0abba4f554cc
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Thu May 28 11:01:58 2020 +0800

    gpio/rockchip: rk_gpio correct pin count for each bank
    
    Do 'gpio status -a' will cause system crash, due to the pins number
    error for gpio4 (last gpio controller).
    
    Test on RV1126 IOTEST board, which has only 8 pins for GPIO4.
    
    Change-Id: I4150abd0ca97bc4f3043eb7fcae2287818125031
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/drivers/gpio/rk_gpio.c b/drivers/gpio/rk_gpio.c
index 11fc3e26bd..eff0d2af63 100644
--- a/drivers/gpio/rk_gpio.c
+++ b/drivers/gpio/rk_gpio.c
@@ -101,6 +101,7 @@ static int rockchip_gpio_probe(struct udevice *dev)
 	struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
 	struct rockchip_gpio_priv *priv = dev_get_priv(dev);
 	char *end;
+	int pins_num;
 	int ret;
 
 	priv->regs = dev_read_addr_ptr(dev);
@@ -114,6 +115,10 @@ static int rockchip_gpio_probe(struct udevice *dev)
 	priv->name[0] = 'A' + priv->bank;
 	uc_priv->bank_name = priv->name;
 
+	pins_num = pinctrl_get_pins_count(priv->pinctrl);
+	if ((priv->bank + 1) * ROCKCHIP_GPIOS_PER_BANK >= pins_num)
+		uc_priv->gpio_count = pins_num - priv->bank * ROCKCHIP_GPIOS_PER_BANK;
+
 	return 0;
 }
 

commit 33f8d8a65e85191a1fdeeae37fda3fa465daa7e5
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Thu May 28 11:01:16 2020 +0800

    pinctrl: export pinctrl_get_pins_count as generic API
    
    Change-Id: I0c5e4977b068a09276a1d0561058679bd1791e0a
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/drivers/pinctrl/pinctrl-uclass.c b/drivers/pinctrl/pinctrl-uclass.c
index a0a326a142..ac6f975ae6 100644
--- a/drivers/pinctrl/pinctrl-uclass.c
+++ b/drivers/pinctrl/pinctrl-uclass.c
@@ -244,6 +244,16 @@ int pinctrl_get_gpio_mux(struct udevice *dev, int banknum, int index)
 	return ops->get_gpio_mux(dev, banknum, index);
 }
 
+int pinctrl_get_pins_count(struct udevice *dev)
+{
+	struct pinctrl_ops *ops = pinctrl_get_ops(dev);
+
+	if (!ops->get_pins_count)
+		return -ENOSYS;
+
+	return ops->get_pins_count(dev);
+}
+
 /**
  * pinconfig_post_bind() - post binding for PINCTRL uclass
  * Recursively bind child nodes as pinconfig devices in case of full pinctrl.
diff --git a/include/dm/pinctrl.h b/include/dm/pinctrl.h
index 0eb4b924d4..d87c84eefb 100644
--- a/include/dm/pinctrl.h
+++ b/include/dm/pinctrl.h
@@ -329,4 +329,14 @@ int pinctrl_decode_pin_config(const void *blob, int node);
 */
 int pinctrl_get_gpio_mux(struct udevice *dev, int banknum, int index);
 
+/**
+ * pinctrl_get_pins_count() - get the total pins count for all GPIOs
+ *
+ * This allows the total pins count for all GPIO to be obtained.
+ *
+ * @dev:	Pinctrl device to use
+ * @return pins count
+*/
+int pinctrl_get_pins_count(struct udevice *dev);
+
 #endif /* __PINCTRL_H */

commit 09989a56e1ece8b1393c7771aff92e75eaa2fdb7
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Thu May 28 11:00:33 2020 +0800

    pinctrl/rockchip: pinctrol support get_pins_count operation
    
    Change-Id: I8459d9e21a7c95e62c053ea7848b189b714ddbfd
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index de5652319c..6d652415e2 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -2977,7 +2977,16 @@ static int rockchip_pinctrl_set_state(struct udevice *dev,
 	return 0;
 }
 
+static int rockchip_pinctrl_get_pins_count(struct udevice *dev)
+{
+	struct rockchip_pinctrl_priv *priv = dev_get_priv(dev);
+	struct rockchip_pin_ctrl *ctrl = priv->ctrl;
+
+	return ctrl->nr_pins;
+}
+
 static struct pinctrl_ops rockchip_pinctrl_ops = {
+	.get_pins_count			= rockchip_pinctrl_get_pins_count,
 	.set_state			= rockchip_pinctrl_set_state,
 	.get_gpio_mux			= rockchip_pinctrl_get_gpio_mux,
 };

commit 17a682eab6c923982af4836ed8f202811a37daee
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 22 17:28:27 2020 +0800

    common: fit: verify otp verified-boot flag along with kernel image
    
    Don't verify otp verified-boot flag for every image, the same as
    signature verify.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I48c230db4429c9530066d0f42de1eea7609ba4b5

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 11e7493d78..baf6254492 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -836,7 +836,7 @@ int fit_board_verify_required_sigs(void)
 
 	ret = trusty_read_vbootkey_enable_flag(&vboot);
 	if (ret) {
-		printf("Can't read verified-boot flag\n");
+		printf("Can't read verified-boot flag, ret=%d\n", ret);
 		return 1;
 	}
 #endif
diff --git a/common/image-fit.c b/common/image-fit.c
index 25c1d33cb0..a69b716b2b 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -1971,15 +1971,6 @@ int fit_image_load_index(bootm_headers_t *images, ulong addr,
 	const char *prop_name;
 	int ret;
 
-#ifndef USE_HOSTCC
-	/* If board required sigs, check self */
-	if (fit_board_verify_required_sigs() &&
-	    !IS_ENABLED(CONFIG_FIT_SIGNATURE)) {
-		printf("Verified-boot requires CONFIG_FIT_SIGNATURE enabled\n");
-		hang();
-	}
-#endif
-
 	fit = map_sysmem(addr, 0);
 	fit_uname = fit_unamep ? *fit_unamep : NULL;
 	fit_uname_config = fit_uname_configp ? *fit_uname_configp : NULL;
@@ -2020,6 +2011,14 @@ int fit_image_load_index(bootm_headers_t *images, ulong addr,
 		fit_base_uname_config = fdt_get_name(fit, cfg_noffset, NULL);
 		printf("   Using '%s' configuration\n", fit_base_uname_config);
 		if (image_type == IH_TYPE_KERNEL) {
+#ifndef USE_HOSTCC
+			/* If board required sigs, check self */
+			if (fit_board_verify_required_sigs() &&
+			    !IS_ENABLED(CONFIG_FIT_SIGNATURE)) {
+				printf("Verified-boot requires CONFIG_FIT_SIGNATURE enabled\n");
+				hang();
+			}
+#endif
 			/* Remember (and possibly verify) this config */
 			images->fit_uname_cfg = fit_base_uname_config;
 			if (IMAGE_ENABLE_VERIFY) {

commit 432f85160bd5695feeffc92aff3a16154d5a5fed
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon May 25 15:52:46 2020 +0800

    rochchip: board: map op-tee memory as dcache enabled
    
    For all 32-bit platforms with CONFIG_OPTEE_V2 enabled.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I991af1639a51938a880f839b2cba472495e0afc3

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 20170526c8..11e7493d78 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -415,15 +415,16 @@ int board_fdt_fixup(void *blob)
 	return rk_board_fdt_fixup(blob);
 }
 
-#ifdef CONFIG_ARM64_BOOT_AARCH32
+#if defined(CONFIG_ARM64_BOOT_AARCH32) || \
+    (!defined(CONFIG_ARM64) && defined(CONFIG_OPTEE_V2))
 /*
- * Fixup MMU region attr for OP-TEE on ARMv8 CPU:
+ * (1) Fixup MMU region attr for OP-TEE on (AArch32 + ARMv8)
  *
  * What ever U-Boot is 64-bit or 32-bit mode, the OP-TEE is always 64-bit mode.
  *
  * Common for OP-TEE:
  *	64-bit mode: dcache is always enabled;
- *	32-bit mode: dcache is always disabled(Due to some unknown issue);
+ *	32-bit mode: dcache is always disabled(Due to rockchip sip calls);
  *
  * Common for U-Boot:
  *	64-bit mode: MMU table is static defined in rkxxx.c file, all memory
@@ -441,6 +442,14 @@ int board_fdt_fixup(void *blob)
  *	When CONFIG_ARM64_BOOT_AARCH32 is enabled, U-Boot is 32-bit mode while
  *	OP-TEE is still 64-bit mode. U-Boot would not map MMU table for OP-TEE
  *	region(but OP-TEE requires it cacheable) so we fixup here.
+ *
+ *
+ * (2) Fixup MMU region attr for OP-TEE on (ARMv7 + CONFIG_OPTEE_V2)
+ *
+ * OP-TEE for CONFIG_OPTEE_V1: dcache is always disabled;
+ * OP-TEE for CONFIG_OPTEE_V2: dcache is always enabled;
+ *
+ * So U-Boot should map OP-TEE memory as dcache enabled for CONFIG_OPTEE_V2.
  */
 int board_initr_caches_fixup(void)
 {

commit 020c79da1eb22b55b784800304d463f4f5a05ced
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Fri May 22 19:01:29 2020 +0800

    lib: optee_client: communicate with optee os v2 32 bits
    
    Change-Id: Ic352f86e73631b64110b9d0d1742dc6b98e97d59
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/OpteeClientSMC.c b/lib/optee_clientApi/OpteeClientSMC.c
index b4d8007462..5dd8ce32da 100644
--- a/lib/optee_clientApi/OpteeClientSMC.c
+++ b/lib/optee_clientApi/OpteeClientSMC.c
@@ -115,7 +115,6 @@ TEEC_Result TEEC_SMC_OpenSession(TEEC_Context *context,
 #endif
 
 #ifdef CONFIG_OPTEE_V2
-#if defined CONFIG_ARM64 || defined CONFIG_ARM64_BOOT_AARCH32
 	uint8_t * session_uuid = (uint8_t *)&TeeSmcMetaSession->uuid;
 	tee_uuid_to_octets(session_uuid, destination);
 	memcpy((void *)&TeeSmc32Param[0].u.value, &TeeSmcMetaSession->uuid, sizeof(TeeSmcMetaSession->uuid));
@@ -125,9 +124,6 @@ TEEC_Result TEEC_SMC_OpenSession(TEEC_Context *context,
 				OPTEE_MSG_ATTR_META_V2;
 	TeeSmc32Param[1].attr = OPTEE_MSG_ATTR_TYPE_VALUE_INPUT_V2 |
 				OPTEE_MSG_ATTR_META_V2;
-#else
-	printf("TEEC: Not support! All rockchips use optee v2.5 are 64 bits! \n");
-#endif
 #endif
 
 	SetTeeSmc32Params(operation, TeeSmc32Param + MetaNum);
@@ -307,12 +303,8 @@ void SetTeeSmc32Params(TEEC_Operation *operation,
 #endif
 
 #ifdef CONFIG_OPTEE_V2
-#if defined CONFIG_ARM64 || defined CONFIG_ARM64_BOOT_AARCH32
 			attr += (OPTEE_MSG_ATTR_TYPE_TMEM_INPUT_V2 - TEEC_MEMREF_TEMP_INPUT);
 			debug("TEEC: OPTEE_OS_V2 ARCH64 attr %x\n", attr);
-#else
-			printf("TEEC: Not support! All rockchips use optee v2 are 64 bits! \n");
-#endif
 #endif
 
 			TeeSmc32Param[ParamCount].attr = attr;

commit 4770b276c4a92b452e5a2b82a0587f30123748c2
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Mon Mar 16 09:46:10 2020 +0800

    lib: optee_client: free section in write and truncate func
    
    Change-Id: Ifd7b53d4c2d1e08591192aa44f04af2b1ff07e5b
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/OpteeClientRkFs.c b/lib/optee_clientApi/OpteeClientRkFs.c
index f211372905..d38bcfc2df 100644
--- a/lib/optee_clientApi/OpteeClientRkFs.c
+++ b/lib/optee_clientApi/OpteeClientRkFs.c
@@ -1173,9 +1173,18 @@ static int tee_fs_write(struct tee_fs_rpc *fsrpc)
 		printf("TEEC: rkss_begin_commit failed!");
 		return -1;
 	}
+	int num;
+	if (p.size != 0) {
+		num = p.size / RKSS_DATA_LEN + 1;
+		ret = rkss_decref_multi_usedflags_sections(p.index, num);
+		if (ret < 0) {
+			printf("TEEC: rkss_decref_multi_usedflags_sections error !\n");
+			return -1;
+		}
+	}
 
 	p.size = fsrpc->len;
-	int num = fsrpc->len / RKSS_DATA_LEN + 1;
+	num = fsrpc->len / RKSS_DATA_LEN + 1;
 	p.index = rkss_get_empty_section_from_usedflags(num);
 	debug("TEEC: Get Empty section in %d\n", p.index);
 	p.used = 1;
@@ -1397,6 +1406,9 @@ static int tee_fs_rename(struct tee_fs_rpc *fsrpc)
 
 static int tee_fs_truncate(struct tee_fs_rpc *fsrpc)
 {
+	int section_num, new_section_num, free_section_num;
+	uint16_t free_index;
+
 	debug("TEEC: tee_fs_truncate: fd:%d, lenth:%d\n", fsrpc->fd, fsrpc->arg);
 	if (fsrpc->fd < 0)
 	{
@@ -1416,14 +1428,27 @@ static int tee_fs_truncate(struct tee_fs_rpc *fsrpc)
 		printf("TEEC: rkss_begin_commit failed!");
 		return -1;
 	}
-
-	p.size = fsrpc->arg;
-	ret = rkss_write_back_ptable(fsrpc->fd, &p);
-	if (ret < 0)
-	{
-		printf("TEEC: tee_fs_write: write ptable error!\n");
+	if (p.size < fsrpc->arg) {
+		printf("TEEC: truncate size not support!\n ");
 		return -1;
+	} else {
+		section_num = p.size / RKSS_DATA_LEN + 1;
+		new_section_num = fsrpc->arg / RKSS_DATA_LEN + 1;
+		free_section_num = section_num - new_section_num;
+		free_index = p.index + new_section_num;
+		ret = rkss_decref_multi_usedflags_sections(free_index, free_section_num);
+		if (ret < 0) {
+			printf("TEEC: rkss_decref_multi_usedflags_sections error!\n");
+			return -1;
+		}
+		p.size = fsrpc->arg;
+		ret = rkss_write_back_ptable(fsrpc->fd, &p);
+		if (ret < 0) {
+			printf("TEEC: rkss_write_back_ptable error!\n");
+			return -1;
+		}
 	}
+
 	ret = rkss_finish_commit();
 	if (ret < 0) {
 		printf("TEEC: rkss_finish_commit failed!");

commit d1ffb5dd4317afb75fe2c8f8c0bfe2b996bb28f7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed May 27 16:55:34 2020 +0800

    rockchip: dts: rv1126: sync from kernel-4.19
    
    from kernel-4.19:
    (3bd4dd9 ARM: dts: rv1126: Add CPU idle states node.)
    
    otp and secure-otp nodes are only defined in U-Boot.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I2fcdf677bd86a477dc087d3e4986ee6cd2dfe4de

diff --git a/arch/arm/dts/rv1126-u-boot.dtsi b/arch/arm/dts/rv1126-u-boot.dtsi
index 3af991ef94..eb4739a8f5 100644
--- a/arch/arm/dts/rv1126-u-boot.dtsi
+++ b/arch/arm/dts/rv1126-u-boot.dtsi
@@ -14,6 +14,20 @@
 		stdout-path = &uart2;
 		u-boot,spl-boot-order = &spi_nand, &spi_nor, &nandc, &emmc;
 	};
+
+	crypto: crypto@ff500000 {
+		compatible = "rockchip,rv1126-crypto";
+		reg = <0xff500000 0x10000>;
+		clock-names = "sclk_crypto", "sclk_crypto_apk";
+		clocks = <&cru CLK_CRYPTO_CORE>, <&cru CLK_CRYPTO_PKA>;
+		clock-frequency = <200000000>, <300000000>;
+	};
+
+	secure_otp: secure_otp@0xff5d0000 {
+		compatible = "rockchip,rv1126-secure-otp";
+		reg = <0xff5d0000 0x4000>;
+		secure_conf = <0xfe0a0008>;
+	};
 };
 
 &uart2 {
diff --git a/arch/arm/dts/rv1126.dtsi b/arch/arm/dts/rv1126.dtsi
index 392bb203c9..851c717a94 100644
--- a/arch/arm/dts/rv1126.dtsi
+++ b/arch/arm/dts/rv1126.dtsi
@@ -9,7 +9,9 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/soc/rockchip,boot-mode.h>
 #include <dt-bindings/soc/rockchip-system-status.h>
+#include <dt-bindings/suspend/rockchip-rv1126.h>
 #include "rv1126-dram-default-timing.dtsi"
 
 / {
@@ -50,6 +52,7 @@
 			enable-method = "psci";
 			clocks = <&cru ARMCLK>;
 			operating-points-v2 = <&cpu0_opp_table>;
+			cpu-idle-states = <&CPU_SLEEP>;
 		};
 
 		cpu1: cpu@f01 {
@@ -59,6 +62,7 @@
 			enable-method = "psci";
 			clocks = <&cru ARMCLK>;
 			operating-points-v2 = <&cpu0_opp_table>;
+			cpu-idle-states = <&CPU_SLEEP>;
 		};
 
 		cpu2: cpu@f02 {
@@ -68,6 +72,7 @@
 			enable-method = "psci";
 			clocks = <&cru ARMCLK>;
 			operating-points-v2 = <&cpu0_opp_table>;
+			cpu-idle-states = <&CPU_SLEEP>;
 		};
 
 		cpu3: cpu@f03 {
@@ -77,32 +82,68 @@
 			enable-method = "psci";
 			clocks = <&cru ARMCLK>;
 			operating-points-v2 = <&cpu0_opp_table>;
+			cpu-idle-states = <&CPU_SLEEP>;
 		};
+
+		idle-states {
+			entry-method = "psci";
+
+			CPU_SLEEP: cpu-sleep {
+				compatible = "arm,idle-state";
+				local-timer-stop;
+				arm,psci-suspend-param = <0x0010000>;
+				entry-latency-us = <120>;
+				exit-latency-us = <250>;
+				min-residency-us = <900>;
+			};
+		};
+
 	};
 
 	cpu0_opp_table: cpu0-opp-table {
 		compatible = "operating-points-v2";
 		opp-shared;
+		rockchip,reboot-freq = <816000>;
 
 		opp-408000000 {
 			opp-hz = /bits/ 64 <408000000>;
-			opp-microvolt = <800000 800000 945000>;
+			opp-microvolt = <725000 725000 1100000>;
 			clock-latency-ns = <40000>;
-			opp-suspend;
 		};
 		opp-600000000 {
 			opp-hz = /bits/ 64 <600000000>;
-			opp-microvolt = <800000 800000 945000>;
+			opp-microvolt = <725000 725000 1000000>;
 			clock-latency-ns = <40000>;
 		};
 		opp-816000000 {
 			opp-hz = /bits/ 64 <816000000>;
-			opp-microvolt = <800000 800000 945000>;
+			opp-microvolt = <725000 725000 1000000>;
 			clock-latency-ns = <40000>;
+			opp-suspend;
 		};
 		opp-1008000000 {
 			opp-hz = /bits/ 64 <1008000000>;
-			opp-microvolt = <800000 800000 945000>;
+			opp-microvolt = <775000 775000 1000000>;
+			clock-latency-ns = <40000>;
+		};
+		opp-1200000000 {
+			opp-hz = /bits/ 64 <1200000000>;
+			opp-microvolt = <825000 825000 1000000>;
+			clock-latency-ns = <40000>;
+		};
+		opp-1296000000 {
+			opp-hz = /bits/ 64 <1296000000>;
+			opp-microvolt = <875000 875000 1000000>;
+			clock-latency-ns = <40000>;
+		};
+		opp-1416000000 {
+			opp-hz = /bits/ 64 <1416000000>;
+			opp-microvolt = <925000 925000 1000000>;
+			clock-latency-ns = <40000>;
+		};
+		opp-1512000000 {
+			opp-hz = /bits/ 64 <1512000000>;
+			opp-microvolt = <975000 975000 1000000>;
 			clock-latency-ns = <40000>;
 		};
 	};
@@ -116,6 +157,83 @@
 		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
 	};
 
+	bus_soc: bus-soc {
+		compatible = "rockchip,rv1126-bus";
+		rockchip,busfreq-policy = "smc";
+		soc-bus0 {
+			bus-id = <0>;
+			cfg-val = <0x00300020>;
+			enable-msk = <0x7144>;
+			status = "okay";
+		};
+		soc-bus1 {
+			bus-id = <1>;
+			cfg-val = <0x00300020>;
+			enable-msk = <0x70ff>;
+			status = "disabled";
+		};
+		soc-bus2 {
+			bus-id = <2>;
+			cfg-val = <0x00300020>;
+			enable-msk = <0x70ff>;
+			status = "disabled";
+		};
+		soc-bus3 {
+			bus-id = <3>;
+			cfg-val = <0x00300020>;
+			enable-msk = <0x70ff>;
+			status = "disabled";
+		};
+		soc-bus4 {
+			bus-id = <4>;
+			cfg-val = <0x00300020>;
+			enable-msk = <0x7011>;
+			status = "disabled";
+		};
+		soc-bus5 {
+			bus-id = <5>;
+			cfg-val = <0x00300020>;
+			enable-msk = <0x7011>;
+			status = "disabled";
+		};
+		soc-bus6 {
+			bus-id = <6>;
+			cfg-val = <0x00300020>;
+			enable-msk = <0x7011>;
+			status = "disabled";
+		};
+		soc-bus7 {
+			bus-id = <7>;
+			cfg-val = <0x00300020>;
+			enable-msk = <0x0>;
+			status = "disabled";
+		};
+		soc-bus8 {
+			bus-id = <8>;
+			cfg-val = <0x00300020>;
+			enable-msk = <0x0>;
+			status = "disabled";
+		};
+		soc-bus9 {
+			bus-id = <9>;
+			cfg-val = <0x00300020>;
+			enable-msk = <0x0>;
+			status = "disabled";
+		};
+		soc-bus10 {
+			bus-id = <10>;
+			cfg-val = <0x00300020>;
+			enable-msk = <0x0>;
+			status = "disabled";
+		};
+		soc-bus11 {
+			bus-id = <11>;
+			cfg-val = <0x00300020>;
+			enable-msk = <0x7000>;
+			status = "okey";
+		};
+	};
+
 	display_subsystem: display-subsystem {
 		compatible = "rockchip,display-subsystem";
 		ports = <&vop_out>;
@@ -152,6 +270,14 @@
 		status = "disabled";
 	};
 
+	firmware {
+		optee: optee {
+			compatible = "linaro,optee-tz";
+			method = "smc";
+			status = "disabled";
+		};
+	};
+
 	mpp_srv: mpp-srv {
 		compatible = "rockchip,mpp-service";
 		rockchip,taskqueue-count = <3>;
@@ -164,25 +290,66 @@
 		method = "smc";
 	};
 
-	rgb: rgb {
-		compatible = "rockchip,rv1126-rgb";
+	reserved-memory {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		isp_reserved: isp {
+			compatible = "shared-dma-pool";
+			reusable;
+			size = <0x6800000>;
+		};
+
+		ramoops: ramoops@8000000 {
+			compatible = "ramoops";
+			reg = <0x8000000 0x100000>;
+			record-size = <0x20000>;
+			console-size = <0x40000>;
+			ftrace-size = <0x00000>;
+			pmsg-size = <0x40000>;
+			status = "disabled";
+		};
+	};
+
+	rockchip_suspend: rockchip-suspend {
+		compatible = "rockchip,pm-rv1126";
 		status = "disabled";
+		rockchip,sleep-debug-en = <0>;
+		rockchip,sleep-mode-config = <
+			(0
+			| RKPM_SLP_ARMOFF
+			| RKPM_SLP_PMU_PMUALIVE_32K
+			| RKPM_SLP_PMU_DIS_OSC
+			| RKPM_SLP_PMIC_LP
+			)
+		>;
+		rockchip,wakeup-config = <
+			(0
+			| RKPM_GPIO_WKUP_EN
+			)
+		>;
+	};
 
-		ports {
-			#address-cells = <1>;
-			#size-cells = <0>;
+	rockchip_system_monitor: rockchip-system-monitor {
+		compatible = "rockchip,system-monitor";
+	};
 
-			port@0 {
-				reg = <0>;
-				#address-cells = <1>;
-				#size-cells = <0>;
+	thermal_zones: thermal-zones {
+		cpu_thermal: cpu-thermal {
+			polling-delay-passive = <20>; /* milliseconds */
+			polling-delay = <1000>; /* milliseconds */
+			sustainable-power = <977>; /* milliwatts */
 
-				rgb_in_vop: endpoint@0 {
-					reg = <0>;
-					remote-endpoint = <&vop_out_rgb>;
-				};
-			};
+			thermal-sensors = <&cpu_tsadc 0>;
+		};
+
+		npu_thermal: npu-thermal {
+			polling-delay-passive = <20>; /* milliseconds */
+			polling-delay = <1000>; /* milliseconds */
+			sustainable-power = <977>; /* milliwatts */
 
+			thermal-sensors = <&npu_tsadc 0>;
 		};
 	};
 
@@ -202,123 +369,176 @@
 		#clock-cells = <0>;
 	};
 
+	gmac_clkin_m0: external-gmac-clockm0 {
+		compatible = "fixed-clock";
+		clock-frequency = <125000000>;
+		clock-output-names = "clk_gmac_rgmii_clkin_m0";
+		#clock-cells = <0>;
+	};
+
+	gmac_clkini_m1: external-gmac-clockm1 {
+		compatible = "fixed-clock";
+		clock-frequency = <125000000>;
+		clock-output-names = "clk_gmac_rgmii_clkin_m1";
+		#clock-cells = <0>;
+	};
+
 	grf: syscon@fe000000 {
-		compatible = "rockchip,rv1126-grf", "syscon";
+		compatible = "rockchip,rv1126-grf", "syscon", "simple-mfd";
 		reg = <0xfe000000 0x20000>;
+
+		rgb: rgb {
+			compatible = "rockchip,rv1126-rgb";
+			status = "disabled";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+					#address-cells = <1>;
+					#size-cells = <0>;
+
+					rgb_in_vop: endpoint@0 {
+						reg = <0>;
+						remote-endpoint = <&vop_out_rgb>;
+					};
+				};
+
+			};
+		};
 	};
 
 	pmugrf: syscon@fe020000 {
-		compatible = "rockchip,rv1126-pmugrf", "syscon";
+		compatible = "rockchip,rv1126-pmugrf", "syscon", "simple-mfd";
 		reg = <0xfe020000 0x1000>;
 
 		pmu_io_domains: io-domains {
 			compatible = "rockchip,rv1126-pmu-io-voltage-domain";
 		};
+
+		reboot-mode {
+			compatible = "syscon-reboot-mode";
+			offset = <0x200>;
+			mode-bootloader = <BOOT_BL_DOWNLOAD>;
+			mode-charge = <BOOT_CHARGING>;
+			mode-fastboot = <BOOT_FASTBOOT>;
+			mode-loader = <BOOT_BL_DOWNLOAD>;
+			mode-normal = <BOOT_NORMAL>;
+			mode-recovery = <BOOT_RECOVERY>;
+			mode-ums = <BOOT_UMS>;
+		};
+	};
+
+	qos_usb_host: qos@fe810000 {
+		compatible = "syscon";
+		reg = <0xfe810000 0x20>;
 	};
 
-	qos_usb_host: qos@fe810008 {
+	qos_usb_otg: qos@fe810080 {
 		compatible = "syscon";
-		reg = <0xfe810008 0x20>;
+		reg = <0xfe810080 0x20>;
 	};
 
-	qos_usb_otg: qos@fe810088 {
+	qos_npu: qos@fe850000 {
 		compatible = "syscon";
-		reg = <0xfe810088 0x20>;
+		reg = <0xfe850000 0x20>;
 	};
 
-	qos_npu: qos@fe850008 {
+	qos_emmc: qos@fe860000 {
 		compatible = "syscon";
-		reg = <0xfe850008 0x20>;
+		reg = <0xfe860000 0x20>;
 	};
 
-	qos_emmc: qos@fe860008 {
+	qos_nandc: qos@fe860080 {
 		compatible = "syscon";
-		reg = <0xfe860008 0x20>;
+		reg = <0xfe860080 0x20>;
 	};
 
-	qos_nandc: qos@fe860088 {
+	qos_sfc: qos@fe860200 {
 		compatible = "syscon";
-		reg = <0xe860088 0x20>;
+		reg = <0xfe860200 0x20>;
 	};
 
-	qos_sfc: qos@fe860208 {
+	qos_sdio: qos@fe86c000 {
 		compatible = "syscon";
-		reg = <0xfe860208 0x20>;
+		reg = <0xfe86c000 0x20>;
 	};
 
-	qos_sdmmc: qos@fe868008 {
+	qos_vepu_rd0: qos@fe870000 {
 		compatible = "syscon";
-		reg = <0xfe868008  0x20>;
+		reg = <0xfe870000 0x20>;
 	};
 
-	qos_sdio: qos@fe86c008 {
+	qos_vepu_rd1: qos@fe870080 {
 		compatible = "syscon";
-		reg = <0xfe86c008 0x20>;
+		reg = <0xfe870080 0x20>;
 	};
 
-	qos_vepu_rd0: qos@fe870008 {
+	qos_vepu_wr: qos@fe870100 {
 		compatible = "syscon";
-		reg = <0xfe870008 0x20>;
+		reg = <0xfe870100 0x20>;
 	};
 
-	qos_vepu_rd1: qos@fe870088 {
+	qos_ispp_m0: qos@fe880000 {
 		compatible = "syscon";
-		reg = <0xfe870088 0x20>;
+		reg = <0xfe880000 0x20>;
 	};
 
-	qos_vepu_wr: qos@fe870108 {
+	qos_ispp_m1: qos@fe880080 {
 		compatible = "syscon";
-		reg = <0xfe870108 0x20>;
+		reg = <0xfe880080 0x20>;
 	};
 
-	qos_ispp_m0: qos@fe880018 {
+	qos_isp: qos@fe890000 {
 		compatible = "syscon";
-		reg = <0xfe880018 0x20>;
+		reg = <0xfe890000 0x20>;
 	};
 
-	qos_ispp_m1: qos@fe880098 {
+	qos_cif_lite: qos@fe890080 {
 		compatible = "syscon";
-		reg = <0xfe880098 0x20>;
+		reg = <0xfe890080 0x20>;
 	};
 
-	qos_isp: qos@fe890008 {
+	qos_cif: qos@fe890100 {
 		compatible = "syscon";
-		reg = <0xfe890008 0x20>;
+		reg = <0xfe890100 0x20>;
 	};
 
-	qos_cif_lite: qos@fe890088 {
+	qos_iep: qos@fe8a0000 {
 		compatible = "syscon";
-		reg = <0xfe890088 0x20>;
+		reg = <0xfe8a0000 0x20>;
 	};
 
-	qos_cif: qos@fe890108 {
+	qos_rga_rd: qos@fe8a0080 {
 		compatible = "syscon";
-		reg = <0xfe890108 0x20>;
+		reg = <0xfe8a0080 0x20>;
 	};
 
-	qos_iep: qos@fe8a0008 {
+	qos_rga_wr: qos@fe8a0100 {
 		compatible = "syscon";
-		reg = <0xfe8a0008 0x20>;
+		reg = <0xfe8a0100 0x20>;
 	};
 
-	qos_rga_rd: qos@fe8a0088 {
+	qos_vop: qos@fe8a0180 {
 		compatible = "syscon";
-		reg = <0xfe8a0088 0x20>;
+		reg = <0xfe8a0180 0x20>;
 	};
 
-	qos_rga_wr: qos@fe8a0108 {
+	qos_vdpu: qos@fe8b0000 {
 		compatible = "syscon";
-		reg = <0xfe8a0108 0x20>;
+		reg = <0xfe8b0000 0x20>;
 	};
 
-	qos_vop: qos@fe8a0188 {
+	qos_jpeg: qos@fe8c0000 {
 		compatible = "syscon";
-		reg = <0xfe8a0188 0x20>;
+		reg = <0xfe8c0000 0x20>;
 	};
 
-	qos_vdpu: qos@fe8b0008 {
+	qos_crypto: qos@fe8d0000 {
 		compatible = "syscon";
-		reg = <0xfe8b0008 0x20>;
+		reg = <0xfe8d0000 0x20>;
 	};
 
 	gic: interrupt-controller@feff0000 {
@@ -334,17 +554,31 @@
 		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
 	};
 
+	arm-debug@ff010000 {
+		compatible = "rockchip,debug";
+		reg = <0xff010000 0x1000>,
+		      <0xff012000 0x1000>,
+		      <0xff014000 0x1000>,
+		      <0xff016000 0x1000>;
+	};
+
 	pvtm@ff040000 {
 		compatible = "rockchip,rv1126-cpu-pvtm";
 		reg = <0xff040000 0x100>;
-		clocks = <&cru CLK_CPUPVTM>, <&cru PCLK_CPUPVTM>;
-		clock-names = "clk", "pclk";
-		resets = <&cru SRST_CPUPVTM>, <&cru SRST_CPUPVTM_P>;
-		reset-names = "clk", "pclk";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		pvtm@0 {
+			reg = <0>;
+			clocks = <&cru CLK_CPUPVTM>, <&cru PCLK_CPUPVTM>;
+			clock-names = "clk", "pclk";
+			resets = <&cru SRST_CPUPVTM>, <&cru SRST_CPUPVTM_P>;
+			reset-names = "rst", "rst-p";
+		};
 	};
 
 	pmu: power-management@ff3e0000 {
-		compatible = "rockchip,rv1126-pmu", "syscon";
+		compatible = "rockchip,rv1126-pmu", "syscon", "simple-mfd";
 		reg = <0xff3e0000 0x1000>;
 
 		power: power-controller {
@@ -352,7 +586,7 @@
 			#power-domain-cells = <1>;
 			#address-cells = <1>;
 			#size-cells = <0>;
-			status = "disabled";
+			status = "okay";
 
 			/* These power domains are grouped by VD_NPU */
 			pd_npu@RV1126_PD_NPU {
@@ -374,6 +608,14 @@
 					 <&qos_vepu_wr>;
 			};
 			/* These power domains are grouped by VD_LOGIC */
+			pd_crypto@RV1126_PD_CRYPTO {
+				reg = <RV1126_PD_CRYPTO>;
+				clocks = <&cru ACLK_CRYPTO>,
+					 <&cru HCLK_CRYPTO>,
+					 <&cru CLK_CRYPTO_CORE>,
+					 <&cru CLK_CRYPTO_PKA>;
+				pm_qos = <&qos_crypto>;
+			};
 			pd_vi@RV1126_PD_VI {
 				reg = <RV1126_PD_VI>;
 				clocks = <&cru ACLK_ISP>,
@@ -424,7 +666,8 @@
 					 <&cru CLK_VDEC_HEVC_CA>,
 					 <&cru ACLK_JPEG>,
 					 <&cru HCLK_JPEG>;
-				pm_qos = <&qos_vdpu>;
+				pm_qos = <&qos_vdpu>,
+					 <&qos_jpeg>;
 			};
 			pd_nvm@RV1126_PD_NVM {
 				reg = <RV1126_PD_NVM>;
@@ -437,8 +680,7 @@
 					 <&cru SCLK_SFC>;
 				pm_qos = <&qos_emmc>,
 					 <&qos_nandc>,
-					 <&qos_sfc>,
-					 <&qos_sdmmc>;
+					 <&qos_sfc>;
 			};
 			pd_sdio@RV1126_PD_SDIO {
 				reg = <RV1126_PD_SDIO>;
@@ -478,6 +720,7 @@
 		interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 		#address-cells = <1>;
 		#size-cells = <0>;
+		rockchip,grf = <&pmugrf>;
 		clocks = <&pmucru CLK_I2C2>, <&pmucru PCLK_I2C2>;
 		clock-names = "i2c", "pclk";
 		pinctrl-names = "default";
@@ -610,6 +853,7 @@
 		reg = <0xff450000 0x1000>;
 		interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 		#address-cells = <1>;
+		#size-cells = <0>;
 		clocks = <&pmucru CLK_SPI0>, <&pmucru PCLK_SPI0>;
 		clock-names = "spiclk", "apb_pclk";
 		dmas = <&dmac 1>, <&dmac 0>;
@@ -623,10 +867,17 @@
 	pvtm@ff470000 {
 		compatible = "rockchip,rv1126-pmu-pvtm";
 		reg = <0xff470000 0x100>;
-		clocks = <&pmucru CLK_PMUPVTM>, <&pmucru PCLK_PMUPVTM>;
-		clock-names = "clk", "pclk";
-		resets = <&pmucru SRST_PMUPVTM>, <&pmucru SRST_PMUPVTM_P>;
-		reset-names = "clk", "pclk";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		pvtm@2 {
+			reg = <2>;
+			clocks = <&pmucru CLK_PMUPVTM>, <&pmucru PCLK_PMUPVTM>;
+			clock-names = "clk", "pclk";
+			resets = <&pmucru SRST_PMUPVTM>,
+				 <&pmucru SRST_PMUPVTM_P>;
+			reset-names = "rst", "rst-p";
+		};
 	};
 
 	pmucru: clock-controller@ff480000 {
@@ -654,8 +905,8 @@
 			<&cru HCLK_PDCORE_NIU>;
 		assigned-clock-rates =
 			<32768>, <1188000000>,
-			<100000000>, <1000000000>,
-			<1600000000>, <600000000>,
+			<100000000>, <500000000>,
+			<1400000000>, <600000000>,
 			<500000000>, <200000000>,
 			<100000000>, <300000000>,
 			<200000000>, <150000000>,
@@ -685,12 +936,12 @@
 	u2phy0: usb2-phy@ff4c0000 {
 		compatible = "rockchip,rv1126-usb2phy";
 		reg = <0xff4c0000 0x8000>;
+		rockchip,grf = <&grf>;
 		clocks = <&pmucru CLK_USBPHY_OTG_REF>, <&cru PCLK_USBPHY_OTG>;
 		clock-names = "phyclk", "pclk";
 		resets = <&cru SRST_USBPHYPOR_OTG>, <&cru SRST_USBPHY_OTG_P>;
 		reset-names = "u2phy", "u2phy-apb";
 		#clock-cells = <0>;
-		clock-output-names = "usb480m_phy0";
 		status = "disabled";
 
 		u2phy_otg: otg-port {
@@ -708,12 +959,15 @@
 	u2phy1: usb2-phy@ff4c8000 {
 		compatible = "rockchip,rv1126-usb2phy";
 		reg = <0xff4c8000 0x8000>;
+		rockchip,grf = <&grf>;
 		clocks = <&pmucru CLK_USBPHY_HOST_REF>, <&cru PCLK_USBPHY_HOST>;
 		clock-names = "phyclk", "pclk";
+		assigned-clocks = <&cru USB480M>;
+		assigned-clock-parents = <&u2phy1>;
 		resets = <&cru SRST_USBPHYPOR_HOST>, <&cru SRST_USBPHY_HOST_P>;
 		reset-names = "u2phy", "u2phy-apb";
 		#clock-cells = <0>;
-		clock-output-names = "usb480m_phy1";
+		clock-output-names = "usb480m_phy";
 		status = "disabled";
 
 		u2phy_host: host-port {
@@ -728,6 +982,8 @@
 	mipi_dphy: mipi-dphy@ff4d0000 {
 		compatible = "rockchip,rv1126-mipi-dphy", "rockchip,rk1808-mipi-dphy";
 		reg = <0xff4d0000 0x500>;
+		assigned-clocks = <&pmucru CLK_MIPIDSIPHY_REF>;
+		assigned-clock-rates = <24000000>;
 		clocks = <&pmucru CLK_MIPIDSIPHY_REF>, <&cru PCLK_DSIPHY>;
 		clock-names = "ref", "pclk";
 		clock-output-names = "mipi_dphy_pll";
@@ -739,12 +995,20 @@
 		status = "disabled";
 	};
 
-	crypto: crypto@ff500000 {
-		compatible = "rockchip,rv1126-crypto";
-		reg = <0xff500000 0x10000>;
-		clock-names = "sclk_crypto", "sclk_crypto_apk";
-		clocks = <&cru CLK_CRYPTO_CORE>, <&cru CLK_CRYPTO_PKA>;
-		clock-frequency = <200000000>, <300000000>;
+	rng: rng@ff500000 {
+		compatible = "rockchip,cryptov2-rng";
+		reg = <0xff500000 0x4000>;
+		clocks = <&cru CLK_CRYPTO_CORE>, <&cru CLK_CRYPTO_PKA>,
+			<&cru ACLK_CRYPTO>, <&cru HCLK_CRYPTO>;
+		clock-names = "clk_crypto", "clk_crypto_apk",
+				"aclk_crypto", "hclk_crypto";
+		assigned-clocks = <&cru CLK_CRYPTO_CORE>, <&cru CLK_CRYPTO_PKA>,
+					<&cru ACLK_CRYPTO>, <&cru HCLK_CRYPTO>;
+		assigned-clock-rates = <150000000>, <150000000>,
+					<200000000>, <100000000>;
+		power-domains = <&power RV1126_PD_CRYPTO>;
+		resets = <&cru SRST_CRYPTO_CORE>;
+		reset-names = "reset";
 		status = "disabled";
 	};
 
@@ -924,6 +1188,7 @@
 		reg = <0xff5b0000 0x1000>;
 		interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 		#address-cells = <1>;
+		#size-cells = <0>;
 		clocks = <&cru CLK_SPI1>, <&cru PCLK_SPI1>;
 		clock-names = "spiclk", "apb_pclk";
 		dmas = <&dmac 3>, <&dmac 2>;
@@ -958,12 +1223,6 @@
 		};
 	};
 
-	secure_otp: secure_otp@0xff5d0000 {
-		compatible = "rockchip,rv1126-secure-otp";
-		reg = <0xff5d0000 0x4000>;
-		secure_conf = <0xfe0a0008>;
-	};
-
 	saradc: saradc@ff5e0000 {
 		compatible = "rockchip,rk3399-saradc";
 		reg = <0xff5e0000 0x100>;
@@ -979,9 +1238,10 @@
 	cpu_tsadc: tsadc@ff5f0000 {
 		compatible = "rockchip,rv1126-tsadc";
 		reg = <0xff5f0000 0x100>;
+		rockchip,grf = <&grf>;
 		interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
 		assigned-clocks = <&cru CLK_CPU_TSADC>;
-		assigned-clock-rates = <600000>;
+		assigned-clock-rates = <4000000>;
 		clocks = <&cru CLK_CPU_TSADC>, <&cru PCLK_CPU_TSADC>,
 			 <&cru CLK_CPU_TSADCPHY>;
 		clock-names = "tsadc", "apb_pclk", "phy_clk";
@@ -996,9 +1256,10 @@
 	npu_tsadc: tsadc@ff5f8000 {
 		compatible = "rockchip,rv1126-tsadc";
 		reg = <0xff5f8000 0x100>;
+		rockchip,grf = <&grf>;
 		interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
 		assigned-clocks = <&cru CLK_NPU_TSADC>;
-		assigned-clock-rates = <600000>;
+		assigned-clock-rates = <4000000>;
 		clocks = <&cru CLK_NPU_TSADC>, <&cru PCLK_NPU_TSADC>,
 			 <&cru CLK_NPU_TSADCPHY>;
 		clock-names = "tsadc", "apb_pclk", "phy_clk";
@@ -1015,7 +1276,7 @@
 		reg = <0xff610000 0x100>;
 		interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
 		assigned-clocks = <&cru CLK_CAN>;
-		assigned-clock-rates = <100000000>;
+		assigned-clock-rates = <200000000>;
 		clocks = <&cru CLK_CAN>, <&cru PCLK_CAN>;
 		clock-names = "baudclk", "apb_pclk";
 		resets = <&cru SRST_CAN>, <&cru SRST_CAN_P>;
@@ -1023,6 +1284,14 @@
 		status = "disabled";
 	};
 
+	rktimer: rktimer@ff660000 {
+		compatible = "rockchip,rk3288-timer";
+		reg = <0xff660000 0x20>;
+		interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru PCLK_TIMER>, <&cru CLK_TIMER0>;
+		clock-names = "pclk", "timer";
+	};
+
 	wdt: watchdog@ff680000 {
 		compatible = "rockchip,rv1126-wdt", "snps,dw-wdt";
 		reg = <0xff680000 0x100>;
@@ -1044,11 +1313,10 @@
 
 	hw_decompress: decompress@ff6c0000 {
 		compatible = "rockchip,hw-decompress";
-		reg = <0xff6c0000 0x10000>;
+		reg = <0xff6c0000 0x1000>;
 		interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru ACLK_DECOM>, <&cru DCLK_DECOM>, <&cru PCLK_DECOM>;
 		clock-names = "aclk", "dclk", "pclk";
-		soft-reset-addr = <0xff490314>;
 		status = "disabled";
 	};
 
@@ -1198,14 +1466,68 @@
 		};
 	};
 
+	rkcif: rkcif@ffae0000 {
+		compatible = "rockchip,rv1126-cif";
+		reg = <0xffae0000 0x10000>;
+		reg-names = "cif_regs";
+		interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "cif-intr";
+		clocks = <&cru ACLK_CIF>, <&cru ACLK_CIFLITE>,
+			 <&cru HCLK_CIF>, <&cru HCLK_CIFLITE>,
+			 <&cru DCLK_CIF>, <&cru DCLK_CIFLITE>;
+		clock-names = "aclk_cif", "aclk_cif_lite",
+			      "hclk_cif", "hclk_cif_lite",
+			      "dclk_cif", "dclk_cif_lite";
+		resets = <&cru SRST_CIF_A>, <&cru SRST_CIF_H>,
+			 <&cru SRST_CIF_D>, <&cru SRST_CIF_P>,
+			 <&cru SRST_CIF_I>, <&cru SRST_CIF_RX_P>,
+			 <&cru SRST_CIFLITE_A>, <&cru SRST_CIFLITE_H>,
+			 <&cru SRST_CIFLITE_D>, <&cru SRST_CIFLITE_RX_P>;
+		reset-names = "rst_cif_a", "rst_cif_h",
+			      "rst_cif_d", "rst_cif_p",
+			      "rst_cif_i", "rst_cif_rx_p",
+			      "rst_cif_lite_a", "rst_cif_lite_h",
+			      "rst_cif_lite_d", "rst_cif_lite_rx_p";
+		assigned-clocks = <&cru DCLK_CIF>, <&cru DCLK_CIFLITE>;
+		assigned-clock-rates = <300000000>, <300000000>;
+		power-domains = <&power RV1126_PD_VI>;
+		iommus = <&rkcif_mmu>;
+		status = "disabled";
+	};
+
+	rkcif_mmu: iommu@ffae0800 {
+		compatible = "rockchip,iommu";
+		reg = <0xffae0800 0x100>;
+		interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "cif_mmu";
+		clocks = <&cru ACLK_CIF>, <&cru HCLK_CIF>;
+		clock-names = "aclk", "hclk";
+		power-domains = <&power RV1126_PD_VI>;
+		#iommu-cells = <0>;
+		status = "disabled";
+	};
+
+	rk_rga: rk_rga@ffaf0000 {
+		compatible = "rockchip,rga2";
+		reg = <0xffaf0000 0x1000>;
+		interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru CLK_RGA_CORE>;
+		clock-names = "aclk_rga", "hclk_rga", "clk_rga";
+		power-domains = <&power RV1126_PD_VO>;
+		dma-coherent;
+		status = "disable";
+	};
+
 	vop: vop@ffb00000 {
 		compatible = "rockchip,rv1126-vop";
 		reg = <0xffb00000 0x200>, <0xffb00a00 0x400>;
 		reg-names = "regs", "gamma_lut";
+		rockchip,grf = <&grf>;
 		interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru ACLK_VOP>, <&cru DCLK_VOP>, <&cru HCLK_VOP>;
 		clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
 		iommus = <&vop_mmu>;
+		power-domains = <&power RV1126_PD_VO>;
 		status = "disabled";
 
 		vop_out: port {
@@ -1233,6 +1555,20 @@
 		clock-names = "aclk", "iface";
 		#iommu-cells = <0>;
 		rockchip,disable-device-link-resume;
+		power-domains = <&power RV1126_PD_VO>;
+		status = "disabled";
+	};
+
+	mipi_csi2: mipi-csi2@ffb10000 {
+		compatible = "rockchip,rv1126-mipi-csi2";
+		reg = <0xffb10000 0x10000>;
+		reg-names = "csihost_regs";
+		interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "csi-intr1", "csi-intr2";
+		clocks = <&cru PCLK_CSIHOST>, <&cru SRST_CSIHOST_P>;
+		clock-names = "pclk_csi2host", "srst_csihost_p";
+		power-domains = <&power RV1126_PD_VI>;
 		status = "disabled";
 	};
 
@@ -1249,6 +1585,7 @@
 		rockchip,grf = <&grf>;
 		#address-cells = <1>;
 		#size-cells = <0>;
+		power-domains = <&power RV1126_PD_VO>;
 		status = "disabled";
 
 		ports {
@@ -1270,8 +1607,11 @@
 		clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>,
 			 <&cru CLK_ISP>;
 		clock-names = "aclk_isp", "hclk_isp", "clk_isp";
+		assigned-clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>;
+		assigned-clock-rates = <500000000>, <250000000>;
 		power-domains = <&power RV1126_PD_VI>;
-		iommus = <&rkisp_mmu>;
+		/* iommus = <&rkisp_mmu>; */
+		memory-region = <&isp_reserved>;
 		status = "disabled";
 	};
 
@@ -1297,6 +1637,10 @@
 		clocks = <&cru ACLK_ISPP>, <&cru HCLK_ISPP>,
 			 <&cru CLK_ISPP>;
 		clock-names = "aclk_ispp", "hclk_ispp", "clk_ispp";
+		assigned-clocks = <&cru ACLK_ISPP>, <&cru HCLK_ISPP>,
+				  <&cru CLK_ISPP>;
+		assigned-clock-rates = <500000000>, <250000000>,
+				       <400000000>;
 		power-domains = <&power RV1126_PD_ISPP>;
 		iommus = <&rkispp_mmu>;
 		status = "disabled";
@@ -1317,6 +1661,86 @@
 		status = "disabled";
 	};
 
+	rkvdec: rkvdec@ffb80000 {
+		compatible = "rockchip,rkv-decoder-v1";
+		reg = <0xffb80000 0x400>;
+		interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "irq_dec";
+		clocks = <&cru ACLK_VDEC>, <&cru HCLK_VDEC>,
+			 <&cru CLK_VDEC_CA>, <&cru CLK_VDEC_CORE>,
+			 <&cru CLK_VDEC_HEVC_CA>;
+		clock-names = "aclk_vcodec", "hclk_vcodec","clk_cabac",
+			      "clk_core", "clk_hevc_cabac";
+		resets = <&cru SRST_VDEC_A>, <&cru SRST_VDEC_H>,
+			 <&cru SRST_VDEC_CA>, <&cru SRST_VDEC_CORE>,
+			 <&cru SRST_VDEC_HEVC_CA>;
+		reset-names = "video_a", "video_h", "video_cabac",
+			      "video_core", "video_hevc_cabac";
+		power-domains = <&power RV1126_PD_VDPU>;
+		iommus = <&rkvdec_mmu>;
+		rockchip,srv = <&mpp_srv>;
+		rockchip,taskqueue-node = <0>;
+		rockchip,resetgroup-node = <0>;
+		status = "disabled";
+	};
+
+	rkvdec_mmu: iommu@ffb80480 {
+		compatible = "rockchip,iommu";
+		reg = <0xffb80480 0x40>, <0xffb804c0 0x40>;
+		interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "rkvdec_mmu";
+		clocks = <&cru ACLK_VDEC>, <&cru HCLK_VDEC>;
+		clock-names = "aclk", "iface";
+		power-domains = <&power RV1126_PD_VDPU>;
+		#iommu-cells = <0>;
+		status = "disabled";
+	};
+
+	vepu: vepu@ffb90000 {
+		compatible = "rockchip,vpu-encoder-v2";
+		reg = <0xffb90000 0x400>;
+		interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_JPEG>, <&cru HCLK_JPEG>;
+		clock-names = "aclk_vcodec", "hclk_vcodec";
+		resets = <&cru SRST_JPEG_A>, <&cru SRST_JPEG_H>;
+		reset-names = "shared_video_a", "shared_video_h";
+		iommus = <&vpu_mmu>;
+		rockchip,srv = <&mpp_srv>;
+		rockchip,taskqueue-node = <1>;
+		rockchip,resetgroup-node = <1>;
+		power-domains = <&power RV1126_PD_VDPU>;
+		status = "disabled";
+	};
+
+	vdpu: vdpu@ffb90400 {
+		compatible = "rockchip,vpu-decoder-v2";
+		reg = <0xffb90400 0x400>;
+		interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "irq_dec";
+		clocks = <&cru ACLK_JPEG>, <&cru HCLK_JPEG>;
+		clock-names = "aclk_vcodec", "hclk_vcodec";
+		resets = <&cru SRST_JPEG_A>, <&cru SRST_JPEG_H>;
+		reset-names = "shared_video_a", "shared_video_h";
+		iommus = <&vpu_mmu>;
+		power-domains = <&power RV1126_PD_VDPU>;
+		rockchip,srv = <&mpp_srv>;
+		rockchip,taskqueue-node = <1>;
+		rockchip,resetgroup-node = <1>;
+		status = "disabled";
+	};
+
+	vpu_mmu: iommu@ffb90800 {
+		compatible = "rockchip,iommu";
+		reg = <0xffb90800 0x40>;
+		interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "vpu_mmu";
+		clock-names = "aclk", "iface";
+		clocks = <&cru ACLK_JPEG>, <&cru HCLK_JPEG>;
+		power-domains = <&power RV1126_PD_VDPU>;
+		#iommu-cells = <0>;
+		status = "disabled";
+	};
+
 	rkvenc: rkvenc@ffbb0000 {
 		compatible = "rockchip,rkv-encoder-v1";
 		reg = <0xffbb0000 0x400>;
@@ -1328,6 +1752,9 @@
 		resets = <&cru SRST_VENC_A>, <&cru SRST_VENC_H>,
 			<&cru SRST_VENC_CORE>;
 		reset-names = "video_a", "video_h", "video_core";
+		assigned-clocks = <&cru ACLK_VENC>, <&cru CLK_VENC_CORE>;
+		assigned-clock-rates = <297000000>, <594000000>;
+		operating-points-v2 = <&rkvenc_opp_table>;
 		iommus = <&rkvenc_mmu>;
 		node-name = "rkvenc";
 		rockchip,srv = <&mpp_srv>;
@@ -1337,6 +1764,28 @@
 		status = "disabled";
 	};
 
+	rkvenc_opp_table: rkvenc-opp-table {
+		compatible = "operating-points-v2";
+
+		/* The source clock is CLK_VENC_CORE */
+		opp-297000000 {
+			opp-hz = /bits/ 64 <297000000>;
+			opp-microvolt = <725000 725000 1000000>;
+		};
+		opp-396000000 {
+			opp-hz = /bits/ 64 <396000000>;
+			opp-microvolt = <725000 725000 1000000>;
+		};
+		opp-500000000 {
+			opp-hz = /bits/ 64 <500000000>;
+			opp-microvolt = <750000 750000 1000000>;
+		};
+		opp-594000000 {
+			opp-hz = /bits/ 64 <594000000>;
+			opp-microvolt = <800000 800000 1000000>;
+		};
+	};
+
 	rkvenc_mmu: iommu@ffbb0f00 {
 		compatible = "rockchip,iommu";
 		reg = <0xffbb0f00 0x40>, <0xffbb0f40 0x40>;
@@ -1354,10 +1803,16 @@
 	pvtm@ffc00000 {
 		compatible = "rockchip,rv1126-npu-pvtm";
 		reg = <0xffc00000 0x100>;
-		clocks = <&cru CLK_NPUPVTM>, <&cru PCLK_NPUPVTM>;
-		clock-names = "clk", "pclk";
-		resets = <&cru SRST_NPUPVTM>, <&cru SRST_NPUPVTM_P>;
-		reset-names = "clk", "pclk";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		pvtm@1 {
+			reg = <1>;
+			clocks = <&cru CLK_NPUPVTM>, <&cru PCLK_NPUPVTM>;
+			clock-names = "clk", "pclk";
+			resets = <&cru SRST_NPUPVTM>, <&cru SRST_NPUPVTM_P>;
+			reset-names = "rts", "rst-p";
+		};
 	};
 
 	gmac: ethernet@ffc40000 {
@@ -1370,7 +1825,7 @@
 		clocks = <&cru CLK_GMAC_SRC>, <&cru CLK_GMAC_TX_RX>,
 			 <&cru CLK_GMAC_TX_RX>, <&cru CLK_GMAC_REF>,
 			 <&cru ACLK_GMAC>, <&cru PCLK_GMAC>,
-			 <&cru RGMII_MODE_CLK>, <&cru CLK_GMAC_PTPREF>;
+			 <&cru CLK_GMAC_TX_RX>, <&cru CLK_GMAC_PTPREF>;
 		clock-names = "stmmaceth", "mac_clk_rx",
 			      "mac_clk_tx", "clk_mac_refout",
 			      "aclk_mac", "pclk_mac",
@@ -1418,6 +1873,10 @@
 		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
 		fifo-depth = <0x100>;
 		max-frequency = <200000000>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
+		power-domains = <&power RV1126_PD_NVM>;
+		rockchip,use-v2-tuning;
 		status = "disabled";
 	};
 
@@ -1429,9 +1888,9 @@
 			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
 		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
 		fifo-depth = <0x100>;
-		max-frequency = <100000000>;
+		max-frequency = <200000000>;
 		pinctrl-names = "default";
-		pinctrl-0 = <&sdmmc1_clk &sdmmc1_cmd &sdmmc1_det &sdmmc1_bus4>;
+		pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_det &sdmmc0_bus4>;
 		status = "disabled";
 	};
 
@@ -1443,9 +1902,10 @@
 			 <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
 		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
 		fifo-depth = <0x100>;
-		max-frequency = <150000000>;
+		max-frequency = <200000000>;
 		pinctrl-names = "default";
-		pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_bus4>;
+		pinctrl-0 = <&sdmmc1_clk &sdmmc1_cmd &sdmmc1_bus4>;
+		power-domains = <&power RV1126_PD_SDIO>;
 		status = "disabled";
 	};
 
@@ -1456,6 +1916,9 @@
 		nandc_id = <0>;
 		clocks = <&cru CLK_NANDC>, <&cru HCLK_NANDC>;
 		clock-names = "clk_nandc", "hclk_nandc";
+		pinctrl-names = "default";
+		pinctrl-0 = <&flash_pins>;
+		power-domains = <&power RV1126_PD_NVM>;
 		status = "disabled";
 	};
 
@@ -1467,16 +1930,64 @@
 		clock-names = "clk_sfc", "hclk_sfc";
 		assigned-clocks = <&cru SCLK_SFC>;
 		assigned-clock-rates = <80000000>;
+		power-domains = <&power RV1126_PD_NVM>;
+		status = "disabled";
+	};
+
+	npu: npu@ffbc0000 {
+		compatible = "rockchip,npu";
+		reg = <0xffbc0000 0x4000>;
+		clocks = <&cru ACLK_NPU>, <&cru HCLK_NPU>, <&cru PCLK_PDNPU>, <&cru CLK_CORE_NPU>;
+		clock-names = "aclk_npu", "hclk_npu", "pclk_pdnpu", "sclk_npu";
+		assigned-clocks = <&cru CLK_CORE_NPU>;
+		assigned-clock-rates = <396000000>;
+		operating-points-v2 = <&npu_opp_table>;
+		interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+		power-domains = <&power RV1126_PD_NPU>;
 		status = "disabled";
 	};
 
+	npu_opp_table: npu-opp-table {
+		compatible = "operating-points-v2";
+
+		opp-200000000 {
+			opp-hz = /bits/ 64 <200000000>;
+			opp-microvolt = <725000 725000 1000000>;
+		};
+		opp-300000000 {
+			opp-hz = /bits/ 64 <300000000>;
+			opp-microvolt = <725000 725000 1000000>;
+		};
+		opp-396000000 {
+			opp-hz = /bits/ 64 <396000000>;
+			opp-microvolt = <725000 725000 1000000>;
+		};
+		opp-500000000 {
+			opp-hz = /bits/ 64 <500000000>;
+			opp-microvolt = <725000 725000 1000000>;
+		};
+		opp-600000000 {
+			opp-hz = /bits/ 64 <600000000>;
+			opp-microvolt = <725000 725000 1000000>;
+		};
+		opp-700000000 {
+			opp-hz = /bits/ 64 <700000000>;
+			opp-microvolt = <775000 775000 1000000>;
+		};
+		opp-800000000 {
+			opp-hz = /bits/ 64 <800000000>;
+			opp-microvolt = <825000 825000 1000000>;
+		};
+	};
+
 	usbdrd: usb0 {
 		compatible = "rockchip,rv1126-dwc3", "rockchip,rk3399-dwc3";
 		#address-cells = <1>;
 		#size-cells = <1>;
 		ranges;
-		clocks = <&cru CLK_USBOTG_REF>, <&cru ACLK_USBOTG>;
-		clock-names = "ref_clk", "bus_clk";
+		clocks = <&cru CLK_USBOTG_REF>, <&cru ACLK_USBOTG>,
+			 <&cru HCLK_PDUSB>;
+		clock-names = "ref_clk", "bus_clk", "hclk";
 		status = "disabled";
 
 		usbdrd_dwc3: dwc3@ffd00000 {
@@ -1503,7 +2014,7 @@
 
 	usb_host0_ehci: usb@ffe00000 {
 		compatible = "generic-ehci";
-		reg = <0xffe00000 0x20000>;
+		reg = <0xffe00000 0x10000>;
 		interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru HCLK_USBHOST>, <&cru HCLK_USBHOST_ARB>,
 			 <&u2phy1>;
@@ -1516,7 +2027,7 @@
 
 	usb_host0_ohci: usb@ffe10000 {
 		compatible = "generic-ohci";
-		reg = <0xffe20000 0x20000>;
+		reg = <0xffe10000 0x10000>;
 		interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru HCLK_USBHOST>, <&cru HCLK_USBHOST_ARB>,
 			 <&u2phy1>;
@@ -1539,7 +2050,7 @@
 			compatible = "rockchip,gpio-bank";
 			reg = <0xff460000 0x100>;
 			interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&pmucru PCLK_GPIO0>;
+			clocks = <&pmucru PCLK_GPIO0>, <&pmucru DBCLK_GPIO0>;
 
 			gpio-controller;
 			#gpio-cells = <2>;
@@ -1552,7 +2063,7 @@
 			compatible = "rockchip,gpio-bank";
 			reg = <0xff620000 0x100>;
 			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&cru PCLK_GPIO1>;
+			clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>;
 
 			gpio-controller;
 			#gpio-cells = <2>;
@@ -1565,7 +2076,7 @@
 			compatible = "rockchip,gpio-bank";
 			reg = <0xff630000 0x100>;
 			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&cru PCLK_GPIO2>;
+			clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>;
 
 			gpio-controller;
 			#gpio-cells = <2>;
@@ -1578,7 +2089,7 @@
 			compatible = "rockchip,gpio-bank";
 			reg = <0xff640000 0x100>;
 			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&cru PCLK_GPIO3>;
+			clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>;
 
 			gpio-controller;
 			#gpio-cells = <2>;
@@ -1591,7 +2102,7 @@
 			compatible = "rockchip,gpio-bank";
 			reg = <0xff650000 0x100>;
 			interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&cru PCLK_GPIO4>;
+			clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>;
 
 			gpio-controller;
 			#gpio-cells = <2>;
diff --git a/include/dt-bindings/suspend/rockchip-rv1126.h b/include/dt-bindings/suspend/rockchip-rv1126.h
new file mode 100644
index 0000000000..7c28c2bd76
--- /dev/null
+++ b/include/dt-bindings/suspend/rockchip-rv1126.h
@@ -0,0 +1,46 @@
+/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
+/*
+ * Header providing constants for Rockchip suspend bindings.
+ *
+ * Copyright (C) 2020, Fuzhou Rockchip Electronics Co., Ltd
+ * Author: XiaoDong.Huang
+ */
+
+#ifndef __DT_BINDINGS_RV1126_PM_H__
+#define __DT_BINDINGS_RV1126_PM_H__
+/******************************bits ops************************************/
+
+#ifndef BIT
+#define BIT(nr)				(1 << (nr))
+#endif
+
+#define RKPM_SLP_ARMPD			BIT(0)
+#define RKPM_SLP_ARMOFF			BIT(1)
+#define RKPM_SLP_ARMOFF_DDRPD		BIT(2)
+#define RKPM_SLP_ARMOFF_LOGOFF		BIT(3)
+
+/* all plls except ddr's pll*/
+#define RKPM_SLP_PMU_HW_PLLS_PD		BIT(8)
+#define RKPM_SLP_PMU_PMUALIVE_32K	BIT(9)
+#define RKPM_SLP_PMU_DIS_OSC		BIT(10)
+
+#define RKPM_SLP_CLK_GT			BIT(16)
+#define RKPM_SLP_PMIC_LP		BIT(17)
+
+#define RKPM_SLP_32K_EXT		BIT(24)
+#define RKPM_SLP_TIME_OUT_WKUP		BIT(25)
+#define RKPM_SLP_PMU_DBG		BIT(26)
+
+/* the wake up source */
+#define RKPM_CPU0_WKUP_EN		BIT(0)
+#define RKPM_CPU1_WKUP_EN		BIT(1)
+#define RKPM_CPU2_WKUP_EN		BIT(2)
+#define RKPM_CPU3_WKUP_EN		BIT(3)
+#define RKPM_GPIO_WKUP_EN		BIT(4)
+#define RKPM_SDMMC_WKUP_EN		BIT(5)
+#define RKPM_SDIO_WKUP_EN		BIT(6)
+#define RKPM_USB_WKUP_EN		BIT(7)
+#define RKPM_UART1_WKUP_EN		BIT(8)
+#define RKPM_SYSINT_WKUP_EN		BIT(9)
+#define RKPM_TIME_OUT_WKUP_EN		BIT(10)
+#endif

commit d5cc49d9e2c350ac6fe48a657c92c129e45fdd0f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed May 27 17:48:27 2020 +0800

    core: dump: update "dm uclass" print format
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I751a9458721df165e6cfb1ce34d00dc85edf4716

diff --git a/drivers/core/dump.c b/drivers/core/dump.c
index 2264e5f6af..81b0a00fc3 100644
--- a/drivers/core/dump.c
+++ b/drivers/core/dump.c
@@ -65,8 +65,10 @@ void dm_dump_all(void)
  */
 static void dm_display_line(struct udevice *dev)
 {
-	printf("- %c %s @ %08lx",
-	       dev->flags & DM_FLAG_ACTIVATED ? '*' : ' ',
+	printf("  %c [ %c ] %s @ %08lx",
+	       dev_read_bool(dev, "u-boot,dm-pre-reloc") ||
+	       dev_read_bool(dev, "u-boot,dm-spl") ? '*' : ' ',
+	       dev->flags & DM_FLAG_ACTIVATED ? '+' : ' ',
 	       dev->name, (ulong)map_to_sysmem(dev));
 	if (dev->seq != -1 || dev->req_seq != -1)
 		printf(", seq %d, (req %d)", dev->seq, dev->req_seq);

commit 66a980ae4959fd773e099e4619f02d0e840391a7
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Wed May 27 16:11:43 2020 +0800

    ARM: dts: rv1126: Change some clocks to PMUCRU
    
    Change-Id: I41b1ed6774dc8f124cd4d973c186818eb1ddb746
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/dts/rv1126.dtsi b/arch/arm/dts/rv1126.dtsi
index 856bdfb9d9..392bb203c9 100644
--- a/arch/arm/dts/rv1126.dtsi
+++ b/arch/arm/dts/rv1126.dtsi
@@ -465,7 +465,7 @@
 		interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 		#address-cells = <1>;
 		#size-cells = <0>;
-		clocks = <&cru CLK_I2C0>, <&cru PCLK_I2C0>;
+		clocks = <&pmucru CLK_I2C0>, <&pmucru PCLK_I2C0>;
 		clock-names = "i2c", "pclk";
 		pinctrl-names = "default";
 		pinctrl-0 = <&i2c0_xfer>;
@@ -478,7 +478,7 @@
 		interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 		#address-cells = <1>;
 		#size-cells = <0>;
-		clocks = <&cru CLK_I2C2>, <&cru PCLK_I2C2>;
+		clocks = <&pmucru CLK_I2C2>, <&pmucru PCLK_I2C2>;
 		clock-names = "i2c", "pclk";
 		pinctrl-names = "default";
 		pinctrl-0 = <&i2c2_xfer>;
@@ -510,7 +510,7 @@
 		reg-io-width = <4>;
 		dmas = <&dmac 7>, <&dmac 6>;
 		clock-frequency = <24000000>;
-		clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
+		clocks = <&pmucru SCLK_UART1>, <&pmucru PCLK_UART1>;
 		clock-names = "baudclk", "apb_pclk";
 		pinctrl-names = "default";
 		pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>;
@@ -523,7 +523,7 @@
 		#pwm-cells = <3>;
 		pinctrl-names = "active";
 		pinctrl-0 = <&pwm0m0_pins>;
-		clocks = <&cru CLK_PWM0>, <&cru PCLK_PWM0>;
+		clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
 		clock-names = "pwm", "pclk";
 		status = "disabled";
 	};
@@ -534,7 +534,7 @@
 		#pwm-cells = <3>;
 		pinctrl-names = "active";
 		pinctrl-0 = <&pwm1m0_pins>;
-		clocks = <&cru CLK_PWM0>, <&cru PCLK_PWM0>;
+		clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
 		clock-names = "pwm", "pclk";
 		status = "disabled";
 	};
@@ -545,7 +545,7 @@
 		#pwm-cells = <3>;
 		pinctrl-names = "active";
 		pinctrl-0 = <&pwm2m0_pins>;
-		clocks = <&cru CLK_PWM0>, <&cru PCLK_PWM0>;
+		clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
 		clock-names = "pwm", "pclk";
 		status = "disabled";
 	};
@@ -556,7 +556,7 @@
 		#pwm-cells = <3>;
 		pinctrl-names = "active";
 		pinctrl-0 = <&pwm3m0_pins>;
-		clocks = <&cru CLK_PWM0>, <&cru PCLK_PWM0>;
+		clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
 		clock-names = "pwm", "pclk";
 		status = "disabled";
 	};
@@ -567,7 +567,7 @@
 		#pwm-cells = <3>;
 		pinctrl-names = "active";
 		pinctrl-0 = <&pwm4m0_pins>;
-		clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
+		clocks = <&pmucru CLK_PWM1>, <&pmucru PCLK_PWM1>;
 		clock-names = "pwm", "pclk";
 		status = "disabled";
 	};
@@ -578,7 +578,7 @@
 		#pwm-cells = <3>;
 		pinctrl-names = "active";
 		pinctrl-0 = <&pwm5m0_pins>;
-		clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
+		clocks = <&pmucru CLK_PWM1>, <&pmucru PCLK_PWM1>;
 		clock-names = "pwm", "pclk";
 		status = "disabled";
 	};
@@ -589,7 +589,7 @@
 		#pwm-cells = <3>;
 		pinctrl-names = "active";
 		pinctrl-0 = <&pwm6m0_pins>;
-		clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
+		clocks = <&pmucru CLK_PWM1>, <&pmucru PCLK_PWM1>;
 		clock-names = "pwm", "pclk";
 		status = "disabled";
 	};
@@ -600,7 +600,7 @@
 		#pwm-cells = <3>;
 		pinctrl-names = "active";
 		pinctrl-0 = <&pwm7m0_pins>;
-		clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
+		clocks = <&pmucru CLK_PWM1>, <&pmucru PCLK_PWM1>;
 		clock-names = "pwm", "pclk";
 		status = "disabled";
 	};
@@ -610,7 +610,7 @@
 		reg = <0xff450000 0x1000>;
 		interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 		#address-cells = <1>;
-		clocks = <&cru CLK_SPI0>, <&cru PCLK_SPI0>;
+		clocks = <&pmucru CLK_SPI0>, <&pmucru PCLK_SPI0>;
 		clock-names = "spiclk", "apb_pclk";
 		dmas = <&dmac 1>, <&dmac 0>;
 		dma-names = "tx", "rx";
@@ -625,7 +625,7 @@
 		reg = <0xff470000 0x100>;
 		clocks = <&pmucru CLK_PMUPVTM>, <&pmucru PCLK_PMUPVTM>;
 		clock-names = "clk", "pclk";
-		resets = <&cru SRST_PMUPVTM>, <&cru SRST_PMUPVTM_P>;
+		resets = <&pmucru SRST_PMUPVTM>, <&pmucru SRST_PMUPVTM_P>;
 		reset-names = "clk", "pclk";
 	};
 
@@ -685,7 +685,7 @@
 	u2phy0: usb2-phy@ff4c0000 {
 		compatible = "rockchip,rv1126-usb2phy";
 		reg = <0xff4c0000 0x8000>;
-		clocks = <&cru CLK_USBPHY_OTG_REF>, <&cru PCLK_USBPHY_OTG>;
+		clocks = <&pmucru CLK_USBPHY_OTG_REF>, <&cru PCLK_USBPHY_OTG>;
 		clock-names = "phyclk", "pclk";
 		resets = <&cru SRST_USBPHYPOR_OTG>, <&cru SRST_USBPHY_OTG_P>;
 		reset-names = "u2phy", "u2phy-apb";
@@ -708,7 +708,7 @@
 	u2phy1: usb2-phy@ff4c8000 {
 		compatible = "rockchip,rv1126-usb2phy";
 		reg = <0xff4c8000 0x8000>;
-		clocks = <&cru CLK_USBPHY_HOST_REF>, <&cru PCLK_USBPHY_HOST>;
+		clocks = <&pmucru CLK_USBPHY_HOST_REF>, <&cru PCLK_USBPHY_HOST>;
 		clock-names = "phyclk", "pclk";
 		resets = <&cru SRST_USBPHYPOR_HOST>, <&cru SRST_USBPHY_HOST_P>;
 		reset-names = "u2phy", "u2phy-apb";
@@ -728,7 +728,7 @@
 	mipi_dphy: mipi-dphy@ff4d0000 {
 		compatible = "rockchip,rv1126-mipi-dphy", "rockchip,rk1808-mipi-dphy";
 		reg = <0xff4d0000 0x500>;
-		clocks = <&cru CLK_MIPIDSIPHY_REF>, <&cru PCLK_DSIPHY>;
+		clocks = <&pmucru CLK_MIPIDSIPHY_REF>, <&cru PCLK_DSIPHY>;
 		clock-names = "ref", "pclk";
 		clock-output-names = "mipi_dphy_pll";
 		#clock-cells = <0>;

commit 25a7c60a0b2d9ee7be391cfefc6cc5698bee159c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed May 27 15:39:33 2020 +0800

    Revert "regulator: pwm: remove init voltage setting"
    
    This reverts commit ef473e3642fe16fd46ded9815791b623cd11c4f3.
    
    We merged this commit while we didn't notice that this driver gets
    init voltage from legacy "rockchip,pwm_voltage = <...>", but regulator
    uclass gets it from "regulator-init-microvolt = <...>". so we have to
    revert this commit to compatible the legacy one.
    
    Change-Id: I52606d9a9268659d3d77f7d29d1eed1d80b30b1e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/pwm_regulator.c b/drivers/power/regulator/pwm_regulator.c
index 24c28a85a1..4582737fe1 100644
--- a/drivers/power/regulator/pwm_regulator.c
+++ b/drivers/power/regulator/pwm_regulator.c
@@ -139,6 +139,12 @@ static int pwm_regulator_probe(struct udevice *dev)
 	priv->max_voltage = uc_pdata->max_uV;
 	priv->min_voltage = uc_pdata->min_uV;
 
+	if (priv->init_voltage > 0) {
+		debug("pwm-regulator(%s): init %d uV\n",
+		       dev->name, priv->init_voltage);
+		pwm_regulator_set_voltage(dev, priv->init_voltage);
+	}
+
 	return 0;
 }
 

commit 7c79bd2280c1e197d44847f2be25f30d783de1b3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed May 27 11:41:40 2020 +0800

    common: board_r: fix mtd blk compile error
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ie24f8c9c7e0b2642d021ec5ce673e17b5c815514

diff --git a/common/board_r.c b/common/board_r.c
index cbb88b3538..b633c358b7 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -933,7 +933,7 @@ static init_fnc_t init_sequence_r[] = {
 	initr_onenand,
 #endif
 #ifdef CONFIG_MTD_BLK
-	initr_mtd_blk
+	initr_mtd_blk,
 #endif
 #ifdef CONFIG_MMC
 	initr_mmc,

commit ddb43797d55201e36492e7f6b92bd19e35d9ef3f
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri May 22 11:42:20 2020 +0800

    spl: mtd_blk: apply mtd_blk_map_partitions()
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I9ed6ff49d5e366797ae1b4d9128432d1ad0e7728

diff --git a/common/spl/spl_mtd_blk.c b/common/spl/spl_mtd_blk.c
index 3dac0ff737..e8d17beb08 100644
--- a/common/spl/spl_mtd_blk.c
+++ b/common/spl/spl_mtd_blk.c
@@ -9,6 +9,7 @@
 #include <errno.h>
 #include <image.h>
 #include <malloc.h>
+#include <mtd_blk.h>
 #include <part.h>
 #include <spl.h>
 #include <spl_ab.h>
@@ -125,7 +126,9 @@ int spl_mtd_load_image(struct spl_image_info *spl_image,
 	desc = find_mtd_device(spl_mtd_get_device_index(bootdev->boot_device));
 	if (!desc)
 		return -ENODEV;
-
+#ifdef CONFIG_SPL_LIBDISK_SUPPORT
+	mtd_blk_map_partitions(desc);
+#endif
 	if (IS_ENABLED(CONFIG_SPL_LOAD_FIT)) {
 		header = (struct image_header *)(CONFIG_SYS_TEXT_BASE -
 					 sizeof(struct image_header));

commit 4e2ae7292ac40e58414f806ff5a5eca0487dbfa3
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon May 25 18:01:12 2020 +0800

    common: board_r: apply mtd_blk_map_partitions()
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I2e1fd21a6a41f8b86ab6f52c69631018a88445ec

diff --git a/common/board_r.c b/common/board_r.c
index 3151530073..cbb88b3538 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -453,6 +453,21 @@ static int initr_mmc(void)
 }
 #endif
 
+#ifdef CONFIG_MTD_BLK
+static int initr_mtd_blk(void)
+{
+#ifndef CONFIG_USING_KERNEL_DTB
+	struct blk_desc *dev_desc;
+
+	puts("mtd_blk:   ");
+	dev_desc = rockchip_get_bootdev();
+	if (dev_desc)
+		mtd_blk_map_partitions(dev_desc);
+#endif
+	return 0;
+}
+#endif
+
 #if !defined(CONFIG_USING_KERNEL_DTB) || !defined(CONFIG_ENV_IS_NOWHERE)
 /*
  * Tell if it's OK to load the environment early in boot.
@@ -917,6 +932,9 @@ static init_fnc_t init_sequence_r[] = {
 #ifdef CONFIG_CMD_ONENAND
 	initr_onenand,
 #endif
+#ifdef CONFIG_MTD_BLK
+	initr_mtd_blk
+#endif
 #ifdef CONFIG_MMC
 	initr_mmc,
 #endif

commit 459f5cb0d977813c227f14033014f7e96c13833b
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri May 22 11:41:13 2020 +0800

    rockchip: board: apply mtd_blk_map_partitions()
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I8c693d047349f3f688eb3304ca99b091110ebf01

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index ffb1be2653..20170526c8 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -22,6 +22,7 @@
 #include <memblk.h>
 #include <misc.h>
 #include <of_live.h>
+#include <mtd_blk.h>
 #include <ram.h>
 #include <rockchip_debugger.h>
 #include <syscon.h>
@@ -345,6 +346,17 @@ static void board_debug_init(void)
 		printf("CLI: off\n");
 }
 
+#ifdef CONFIG_MTD_BLK
+static void board_mtd_blk_map_partitions(void)
+{
+	struct blk_desc *dev_desc;
+
+	dev_desc = rockchip_get_bootdev();
+	if (dev_desc)
+		mtd_blk_map_partitions(dev_desc);
+}
+#endif
+
 int board_init(void)
 {
 	board_debug_init();
@@ -354,6 +366,9 @@ int board_init(void)
 #endif
 
 #ifdef CONFIG_USING_KERNEL_DTB
+#ifdef CONFIG_MTD_BLK
+	board_mtd_blk_map_partitions();
+#endif
 	init_kernel_dtb();
 #endif
 	early_download();

commit a07b97f2233a293b4294b84029dfa6a0899627ec
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri May 22 11:58:49 2020 +0800

    mtd: mtd_blk: map the part address if dev is mtd_blk
    
    The blk_dread will occor error if the image is packed with multiple
    firmwares, for example boot.img, when nand or spi nand have bad block.
    So call mtd_blk_map_table_init to remap part address to make sure
    reading correct data.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Icebc6b1c5a10758efa615424d0706b9ed6ec23ad

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index 956bb8ad15..04c7447366 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -103,6 +103,30 @@ static bool get_mtd_blk_map_address(struct mtd_info *mtd, loff_t *off)
 	return mapped;
 }
 
+void mtd_blk_map_partitions(struct blk_desc *desc)
+{
+	disk_partition_t info;
+	int i, ret;
+
+	if (!desc)
+		return;
+
+	if (desc->if_type != IF_TYPE_MTD)
+		return;
+
+	for (i = 1; i < MAX_SEARCH_PARTITIONS; i++) {
+		ret = part_get_info(desc, i, &info);
+		if (ret != 0)
+			continue;
+
+		if (mtd_blk_map_table_init(desc,
+					   info.start << 9,
+					   info.size << 9)) {
+			printf("mtd block map table fail\n");
+		}
+	}
+}
+
 static __maybe_unused int mtd_map_read(struct mtd_info *mtd, loff_t offset,
 				       size_t *length, size_t *actual,
 				       loff_t lim, u_char *buffer)
diff --git a/include/mtd_blk.h b/include/mtd_blk.h
index 5063e989a7..eadea048db 100644
--- a/include/mtd_blk.h
+++ b/include/mtd_blk.h
@@ -15,5 +15,6 @@ char *mtd_part_parse(void);
 int mtd_blk_map_table_init(struct blk_desc *desc,
 			   loff_t offset,
 			   size_t length);
+void mtd_blk_map_partitions(struct blk_desc *desc);
 
 #endif

commit 2b7be5df0e546fa0acff8a291f3c3e902c50f0cb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon May 25 16:43:58 2020 +0800

    rockchip: spl: fix verified-boot flag state print
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ic787533a9a4bdb985a63750dbed9c5c112f30da4

diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index 6e1fb789cc..ff9a2d8286 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -328,7 +328,7 @@ int fit_board_verify_required_sigs(void)
 		return 1;
 	}
 #endif
-	printf("## Verified-boot: %d\n", vboot);
+	printf("## Verified-boot: %d\n", vboot == 0xff);
 
 	return vboot == 0xff;
 }

commit 69808149dcac8aea2de7e0e5bb59634105b6c21d
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue May 26 17:36:47 2020 +0800

    spl: rkfw: call misc_decompress_stop() to clear the decompress irq
    
    Otherwise the next stage will respond to the decompress completed interrupt.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ie56a7eb939374bd5aac326bb3cd022225bf71dd2

diff --git a/common/spl/spl_rkfw.c b/common/spl/spl_rkfw.c
index 04fc2c2605..9445607424 100644
--- a/common/spl/spl_rkfw.c
+++ b/common/spl/spl_rkfw.c
@@ -385,6 +385,10 @@ static int rkfw_load_kernel(struct spl_load_info *info, u32 image_sector,
 			udelay(10);
 		}
 
+		ret = misc_decompress_stop(dev);
+		if (ret)
+			goto out;
+
 		ret = misc_decompress_start(dev,
 					    CONFIG_SPL_RAMDISK_COMPRESS_ADDR,
 					    CONFIG_SPL_RAMDISK_ADDR,

commit 9bddc4c3dc87df466c3b82f245ee1b4ca3ab10a6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue May 26 15:23:52 2020 +0800

    rockchip: dts: rv1109 remove unused files
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Id6ce34e554cd392f8361580feb9af31f6a7635ce

diff --git a/arch/arm/dts/rv1109-evb-ddr3-v10.dts b/arch/arm/dts/rv1109-evb-ddr3-v10.dts
deleted file mode 100644
index cc71c36556..0000000000
--- a/arch/arm/dts/rv1109-evb-ddr3-v10.dts
+++ /dev/null
@@ -1,17 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd.
- */
-
-/dts-v1/;
-
-#include "rv1109-evb-v10.dtsi"
-
-/ {
-	model = "Rockchip RV1109 EVB DDR3 Board";
-	compatible = "rockchip,rv1109-evb-ddr3-v10", "rockchip,rv1109";
-
-	chosen {
-		bootargs = "clk_ignore_unused earlycon=uart8250,mmio32,0xff570000 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rootfstype=ext4 rootwait";
-	};
-};
diff --git a/arch/arm/dts/rv1109-evb-v10.dtsi b/arch/arm/dts/rv1109-evb-v10.dtsi
deleted file mode 100644
index 6ffb60883f..0000000000
--- a/arch/arm/dts/rv1109-evb-v10.dtsi
+++ /dev/null
@@ -1,68 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd.
- */
-
-/dts-v1/;
-
-#include "rv1109.dtsi"
-
-/ {
-	model = "Rockchip RV1109 EVB Board";
-	compatible = "rockchip,rv1109-evb-v10", "rockchip,rv1109";
-};
-
-&emmc {
-	bus-width = <8>;
-	cap-mmc-highspeed;
-	non-removable;
-	mmc-hs200-1_8v;
-	rockchip,default-sample-phase = <90>;
-	supports-emmc;
-	status = "okay";
-};
-
-&fiq_debugger {
-	status = "okay";
-};
-
-&gmac {
-	phy-mode = "rgmii";
-	clock_in_out = "input";
-	snps,reset-gpio = <&gpio2 RK_PC0 GPIO_ACTIVE_LOW>;
-	snps,reset-active-low;
-	/* Reset time is 20ms, 100ms for rtl8211f */
-	snps,reset-delays-us = <0 20000 100000>;
-	assigned-clocks = <&cru CLK_GMAC_SRC>;
-	assigned-clock-parents = <&cru CLK_GMAC_RGMII_M1>;
-	assigned-clocks = <&cru CLK_GMAC_ETHERNET_OUT>;
-	assigned-clock-rates = <25000000>;
-	tx_delay = <0x40>;
-	rx_delay = <0x3a>;
-	status = "okay";
-};
-
-&sdmmc {
-	bus-width = <4>;
-	cap-mmc-highspeed;
-	cap-sd-highspeed;
-	card-detect-delay = <200>;
-	rockchip,default-sample-phase = <90>;
-	supports-sd;
-	sd-uhs-sdr12;
-	sd-uhs-sdr25;
-	sd-uhs-sdr104;
-	status = "okay";
-};
-
-&sdio {
-	bus-width = <4>;
-	cap-sd-highspeed;
-	cap-sdio-irq;
-	keep-power-in-suspend;
-	non-removable;
-	rockchip,default-sample-phase = <90>;
-	sd-uhs-sdr104;
-	supports-sdio;
-	status = "okay";
-};
diff --git a/arch/arm/dts/rv1109.dtsi b/arch/arm/dts/rv1109.dtsi
deleted file mode 100644
index 98da788a03..0000000000
--- a/arch/arm/dts/rv1109.dtsi
+++ /dev/null
@@ -1,24 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd.
- */
-
-/dts-v1/;
-
-#include "rv1126.dtsi"
-
-/ {
-	compatible = "rockchip,rv1109";
-
-	cpus {
-		/delete-node/ cpu@f02;
-		/delete-node/ cpu@f03;
-	};
-
-	arm-pmu {
-		interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
-		interrupt-affinity = <&cpu0>, <&cpu1>;
-	};
-};
-

commit 37bbf320ac3215fc728f0385b8e7971d4839834d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue May 26 15:19:23 2020 +0800

    configs: rv1109: sync from rv1126_defconfig
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I995c96f730c080ee082b092062daab8efec4945d

diff --git a/configs/rv1109_defconfig b/configs/rv1109_defconfig
index 8b770b292b..bf41ef4858 100644
--- a/configs/rv1109_defconfig
+++ b/configs/rv1109_defconfig
@@ -12,7 +12,6 @@ CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
-CONFIG_SPL_STACK_R_ADDR=0x3fe0000
 CONFIG_TARGET_EVB_RV1126=y
 CONFIG_SPL_NAND_SUPPORT=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
@@ -31,7 +30,6 @@ CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_BOARD_INIT=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
-CONFIG_SPL_STACK_R=y
 CONFIG_SPL_SHA256_SUPPORT=y
 CONFIG_SPL_CRYPTO_SUPPORT=y
 CONFIG_SPL_HASH_SUPPORT=y
@@ -70,7 +68,6 @@ CONFIG_SPL_OF_CONTROL=y
 CONFIG_SPL_DTB_MINIMUM=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
-CONFIG_MKIMAGE_DTC_PATH="scripts/dtc/dtc"
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y
@@ -86,6 +83,8 @@ CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y
 CONFIG_RK8XX_PWRKEY=y
 CONFIG_ADC_KEY=y
+CONFIG_SPL_MISC=y
+CONFIG_SPL_ROCKCHIP_SECURE_OTP_V2=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MTD=y

commit f30634031c694bad9fd0acc06c6e9a8141435d93
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue May 26 15:18:25 2020 +0800

    configs: rv1126: clean with make savedefconfig
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ib817179165d697b9544099ac5f1409a6d91d333f

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index fb95347ff0..809ab25e00 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -68,7 +68,6 @@ CONFIG_SPL_OF_CONTROL=y
 CONFIG_SPL_DTB_MINIMUM=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
-CONFIG_MKIMAGE_DTC_PATH="dtc"
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y

commit c10175d5210e433fe53d3bb5c1bb378826080b8e
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue May 26 09:36:43 2020 +0800

    configs: rv1126: support fastboot
    
    1.support boot kernel by spl
    2.support pressing key to enter uboot
    3.rename the defconfig
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I56e4aa9d90a7fa3efae9e0d7dbdf73741eeb9040

diff --git a/configs/rv1126_emmc_defconfig b/configs/rv1126-emmc-tb_defconfig
similarity index 88%
rename from configs/rv1126_emmc_defconfig
rename to configs/rv1126-emmc-tb_defconfig
index f70a23f34e..7063613096 100644
--- a/configs/rv1126_emmc_defconfig
+++ b/configs/rv1126-emmc-tb_defconfig
@@ -8,7 +8,6 @@ CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
-CONFIG_SPL_STACK_R_ADDR=0x3fe0000
 CONFIG_TARGET_EVB_RV1126=y
 CONFIG_DEFAULT_DEVICE_TREE="rv1126-evb"
 CONFIG_DEBUG_UART=y
@@ -17,12 +16,17 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 # CONFIG_SKIP_RELOCATE_UBOOT is not set
+CONFIG_SPL_ADC_SUPPORT=y
 CONFIG_SPL_BOARD_INIT=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
-CONFIG_SPL_STACK_R=y
 CONFIG_SPL_OPTEE=y
 CONFIG_SPL_LOAD_RKFW=y
+CONFIG_SPL_KERNEL_ADDR=0x608000
+CONFIG_SPL_KERNEL_COMPRESS_ADDR=0x4800000
+CONFIG_SPL_RAMDISK_ADDR=0x2800000
+CONFIG_SPL_RAMDISK_COMPRESS_ADDR=0x5800000
+CONFIG_SPL_KERNEL_BOOT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
@@ -62,12 +66,17 @@ CONFIG_DM_CRYPTO=y
 CONFIG_ROCKCHIP_CRYPTO_V2=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_SPL_INPUT=y
 CONFIG_DM_KEY=y
 CONFIG_RK8XX_PWRKEY=y
 CONFIG_ADC_KEY=y
+CONFIG_SPL_ADC_KEY=y
+CONFIG_SPL_MISC=y
+CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_MMC_USE_PRE_CONFIG=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_NANENG_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_PMIC=y
 # CONFIG_SPL_PMIC_CHILDREN is not set

commit 5410c5c27311ba75f17e73f9ab39752f46bba38d
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Thu Apr 16 17:21:38 2020 +0800

    clk: rockchip: rv1126: Add clock init for isp and vop
    
    Change-Id: I1c4a1267e90f84f6f7777a35e0ad5824b6eff2d1
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rv1126.h b/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
index 7c0dbad74e..ea5b7d3427 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
@@ -26,6 +26,14 @@
 #define HCLK_PDCORE_HZ	(200 * MHz)
 #define HCLK_PDAUDIO_HZ	(150 * MHz)
 #define CLK_OSC0_DIV_HZ	(32768)
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_KERNEL_BOOT)
+#define ACLK_PDVI_HZ	(500 * MHz)
+#define CLK_ISP_HZ	(500 * MHz)
+#define ACLK_PDISPP_HZ	(500 * MHz)
+#define CLK_ISPP_HZ	(400 * MHz)
+#define ACLK_VOP_HZ	(300 * MHz)
+#define DCLK_VOP_HZ	(65 * MHz)
+#endif
 
 /* RV1126 pll id */
 enum rv1126_pll_id {
diff --git a/drivers/clk/rockchip/clk_rv1126.c b/drivers/clk/rockchip/clk_rv1126.c
index 6d817224bf..695d955947 100644
--- a/drivers/clk/rockchip/clk_rv1126.c
+++ b/drivers/clk/rockchip/clk_rv1126.c
@@ -2097,6 +2097,14 @@ static void rv1126_clk_init(struct rv1126_clk_priv *priv)
 	rv1126_pdphp_set_clk(priv, HCLK_PDPHP, HCLK_PDPHP_HZ);
 	rv1126_pdcore_set_clk(priv, HCLK_PDCORE_HZ);
 	rv1126_pdaudio_set_clk(priv, HCLK_PDAUDIO_HZ);
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_KERNEL_BOOT)
+	rv1126_clk_pdvi_ispp_set_clk(priv, ACLK_PDVI, ACLK_PDVI_HZ);
+	rv1126_clk_isp_set_clk(priv, CLK_ISP_HZ);
+	rv1126_clk_pdvi_ispp_set_clk(priv, ACLK_PDISPP, ACLK_PDISPP_HZ);
+	rv1126_clk_pdvi_ispp_set_clk(priv, CLK_ISPP, CLK_ISPP_HZ);
+	rv1126_aclk_vop_set_clk(priv, ACLK_VOP_HZ);
+	rv1126_dclk_vop_set_clk(priv, DCLK_VOP_HZ);
+#endif
 }
 
 static int rv1126_clk_probe(struct udevice *dev)

commit 5ecc545e4e271b53570b3b8c6e5fced844b0e0b0
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Thu Apr 16 21:35:47 2020 +0800

    clk: rockchip: rv1126: Add support for decom clock
    
    Change-Id: I90eacb03ed191b804911429af5ad80daab3776cc
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rv1126.h b/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
index 18c2af1b40..7c0dbad74e 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
@@ -282,6 +282,16 @@ enum {
 	CLK_SARADC_DIV_SHIFT	= 0,
 	CLK_SARADC_DIV_MASK	= 0x7ff,
 
+#ifdef CONFIG_SPL_BUILD
+	/* CRU_CLK_SEL25_CON */
+	DCLK_DECOM_SEL_SHIFT	= 15,
+	DCLK_DECOM_SEL_MASK	= 1 << DCLK_DECOM_SEL_SHIFT,
+	DCLK_DECOM_SEL_GPLL	= 0,
+	DCLK_DECOM_SEL_CPLL,
+	DCLK_DECOM_DIV_SHIFT	= 8,
+	DCLK_DECOM_DIV_MASK	= 0x7f << DCLK_DECOM_DIV_SHIFT,
+#endif
+
 	/* CRU_CLK_SEL26_CON */
 	HCLK_PDAUDIO_DIV_SHIFT	= 0,
 	HCLK_PDAUDIO_DIV_MASK	= 0x1f,
diff --git a/drivers/clk/rockchip/clk_rv1126.c b/drivers/clk/rockchip/clk_rv1126.c
index 0d116f5b6c..6d817224bf 100644
--- a/drivers/clk/rockchip/clk_rv1126.c
+++ b/drivers/clk/rockchip/clk_rv1126.c
@@ -1518,6 +1518,39 @@ static ulong rv1126_clk_isp_set_clk(struct rv1126_clk_priv *priv, ulong rate)
 
 	return rv1126_clk_isp_get_clk(priv);
 }
+
+static ulong rv1126_dclk_decom_get_clk(struct rv1126_clk_priv *priv)
+{
+	struct rv1126_cru *cru = priv->cru;
+	u32 div, sel, con, parent;
+
+	con = readl(&cru->clksel_con[25]);
+	div = (con & DCLK_DECOM_DIV_MASK) >> DCLK_DECOM_DIV_SHIFT;
+	sel = (con & DCLK_DECOM_SEL_MASK) >> DCLK_DECOM_SEL_SHIFT;
+	if (sel == DCLK_DECOM_SEL_GPLL)
+		parent = priv->gpll_hz;
+	else if (sel == DCLK_DECOM_SEL_CPLL)
+		parent = priv->cpll_hz;
+	else
+		return -ENOENT;
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rv1126_dclk_decom_set_clk(struct rv1126_clk_priv *priv, ulong rate)
+{
+	struct rv1126_cru *cru = priv->cru;
+	u32 src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);
+	assert(src_clk_div - 1 <= 127);
+	rk_clrsetreg(&cru->clksel_con[25],
+		     DCLK_DECOM_SEL_MASK | DCLK_DECOM_DIV_MASK,
+		     DCLK_DECOM_SEL_GPLL << DCLK_DECOM_SEL_SHIFT |
+		     (src_clk_div - 1) << DCLK_DECOM_DIV_SHIFT);
+
+	return rv1126_dclk_decom_get_clk(priv);
+}
 #endif
 
 static ulong rv1126_clk_get_rate(struct clk *clk)
@@ -1622,6 +1655,9 @@ static ulong rv1126_clk_get_rate(struct clk *clk)
 	case CLK_ISPP:
 		rate = rv1126_clk_pdvi_ispp_get_clk(priv, clk->id);
 		break;
+	case DCLK_DECOM:
+		rate = rv1126_dclk_decom_get_clk(priv);
+		break;
 #endif
 	default:
 		return -ENOENT;
@@ -1732,6 +1768,9 @@ static ulong rv1126_clk_set_rate(struct clk *clk, ulong rate)
 	case CLK_ISPP:
 		ret = rv1126_clk_pdvi_ispp_set_clk(priv, clk->id, rate);
 		break;
+	case DCLK_DECOM:
+		ret = rv1126_dclk_decom_set_clk(priv, rate);
+		break;
 #endif
 	default:
 		return -ENOENT;

commit c17ccbf6fd302d07c7f5440e01ab8c0cfdbf9fb1
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Thu Apr 16 16:27:09 2020 +0800

    clk: rockchip: rv1126: Add support for isp and ispp clocks
    
    Change-Id: Icfd87f56c30bfa81b6e7fecadcda090c26a8c465
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rv1126.h b/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
index 757ddd89f0..18c2af1b40 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
@@ -302,6 +302,26 @@ enum {
 	DCLK_VOP_DIV_SHIFT	= 0,
 	DCLK_VOP_DIV_MASK	= 0xff,
 
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_KERNEL_BOOT)
+	/* CRU_CLK_SEL49_CON */
+	ACLK_PDVI_SEL_SHIFT	= 6,
+	ACLK_PDVI_SEL_MASK	= 0x3 << ACLK_PDVI_SEL_SHIFT,
+	ACLK_PDVI_SEL_CPLL	= 0,
+	ACLK_PDVI_SEL_GPLL,
+	ACLK_PDVI_SEL_HPLL,
+	ACLK_PDVI_DIV_SHIFT	= 0,
+	ACLK_PDVI_DIV_MASK	= 0x1f,
+
+	/* CRU_CLK_SEL50_CON */
+	CLK_ISP_SEL_SHIFT	= 6,
+	CLK_ISP_SEL_MASK	= 0x3 << CLK_ISP_SEL_SHIFT,
+	CLK_ISP_SEL_GPLL	= 0,
+	CLK_ISP_SEL_CPLL,
+	CLK_ISP_SEL_HPLL,
+	CLK_ISP_DIV_SHIFT	= 0,
+	CLK_ISP_DIV_MASK	= 0x1f,
+#endif
+
 	/* CRU_CLK_SEL53_CON */
 	HCLK_PDPHP_DIV_SHIFT	= 8,
 	HCLK_PDPHP_DIV_MASK	= 0x1f << HCLK_PDPHP_DIV_SHIFT,
@@ -355,6 +375,26 @@ enum {
 	CLK_GMAC_SRC_DIV_SHIFT	= 0,
 	CLK_GMAC_SRC_DIV_MASK	= 0x1f << CLK_GMAC_SRC_DIV_SHIFT,
 
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_KERNEL_BOOT)
+	/* CRU_CLK_SEL68_CON */
+	ACLK_PDISPP_SEL_SHIFT	= 6,
+	ACLK_PDISPP_SEL_MASK	= 0x3 << ACLK_PDISPP_SEL_SHIFT,
+	ACLK_PDISPP_SEL_CPLL	= 0,
+	ACLK_PDISPP_SEL_GPLL,
+	ACLK_PDISPP_SEL_HPLL,
+	ACLK_PDISPP_DIV_SHIFT	= 0,
+	ACLK_PDISPP_DIV_MASK	= 0x1f,
+
+	/* CRU_CLK_SEL69_CON */
+	CLK_ISPP_SEL_SHIFT	= 6,
+	CLK_ISPP_SEL_MASK	= 0x3 << CLK_ISPP_SEL_SHIFT,
+	CLK_ISPP_SEL_CPLL	= 0,
+	CLK_ISPP_SEL_GPLL,
+	CLK_ISPP_SEL_HPLL,
+	CLK_ISPP_DIV_SHIFT	= 0,
+	CLK_ISPP_DIV_MASK	= 0x1f,
+#endif
+
 	/* CRU_GMAC_CON */
 	GMAC_SRC_M1_SEL_SHIFT	= 5,
 	GMAC_SRC_M1_SEL_MASK	= 0x1 << GMAC_SRC_M1_SEL_SHIFT,
diff --git a/drivers/clk/rockchip/clk_rv1126.c b/drivers/clk/rockchip/clk_rv1126.c
index 0ff0e47c6c..0d116f5b6c 100644
--- a/drivers/clk/rockchip/clk_rv1126.c
+++ b/drivers/clk/rockchip/clk_rv1126.c
@@ -1396,6 +1396,130 @@ static ulong rv1126_pclk_gmac_get_clk(struct rv1126_clk_priv *priv)
 	return DIV_TO_RATE(parent, div);
 }
 
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_KERNEL_BOOT)
+static ulong rv1126_clk_pdvi_ispp_get_clk(struct rv1126_clk_priv *priv,
+					  ulong clk_id)
+{
+	struct rv1126_cru *cru = priv->cru;
+	u32 div, sel, con, parent, con_id;
+
+	switch (clk_id) {
+	case ACLK_PDVI:
+		con_id = 49;
+		break;
+	case ACLK_PDISPP:
+		con_id = 68;
+		break;
+	case CLK_ISPP:
+		con_id = 69;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	con = readl(&cru->clksel_con[con_id]);
+	div = (con & ACLK_PDVI_DIV_MASK) >> ACLK_PDVI_DIV_SHIFT;
+	sel = (con & ACLK_PDVI_SEL_MASK) >> ACLK_PDVI_SEL_SHIFT;
+	if (sel == ACLK_PDVI_SEL_GPLL)
+		parent = priv->gpll_hz;
+	else if (sel == ACLK_PDVI_SEL_CPLL)
+		parent = priv->cpll_hz;
+	else if (sel == ACLK_PDVI_SEL_HPLL)
+		parent = priv->hpll_hz;
+	else
+		return -ENOENT;
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rv1126_clk_pdvi_ispp_set_clk(struct rv1126_clk_priv *priv,
+					  ulong clk_id, ulong rate)
+{
+	struct rv1126_cru *cru = priv->cru;
+	u32 parent, sel, src_clk_div, con_id;
+
+	switch (clk_id) {
+	case ACLK_PDVI:
+		con_id = 49;
+		break;
+	case ACLK_PDISPP:
+		con_id = 68;
+		break;
+	case CLK_ISPP:
+		con_id = 69;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	if (!(priv->cpll_hz % rate)) {
+		parent = priv->cpll_hz;
+		sel = ACLK_PDVI_SEL_CPLL;
+	} else if (!(priv->hpll_hz % rate)) {
+		parent = priv->hpll_hz;
+		sel = ACLK_PDVI_SEL_HPLL;
+	} else {
+		parent = priv->gpll_hz;
+		sel = ACLK_PDVI_SEL_GPLL;
+	}
+
+	src_clk_div = DIV_ROUND_UP(parent, rate);
+	assert(src_clk_div - 1 <= 31);
+	rk_clrsetreg(&cru->clksel_con[con_id],
+		     ACLK_PDVI_SEL_MASK | ACLK_PDVI_DIV_MASK,
+		     sel << ACLK_PDVI_SEL_SHIFT |
+		     (src_clk_div - 1) << ACLK_PDVI_DIV_SHIFT);
+
+	return rv1126_clk_pdvi_ispp_get_clk(priv, clk_id);
+}
+
+static ulong rv1126_clk_isp_get_clk(struct rv1126_clk_priv *priv)
+{
+	struct rv1126_cru *cru = priv->cru;
+	u32 div, sel, con, parent;
+
+	con = readl(&cru->clksel_con[50]);
+	div = (con & CLK_ISP_DIV_MASK) >> CLK_ISP_DIV_SHIFT;
+	sel = (con & CLK_ISP_SEL_MASK) >> CLK_ISP_SEL_SHIFT;
+	if (sel == CLK_ISP_SEL_GPLL)
+		parent = priv->gpll_hz;
+	else if (sel == CLK_ISP_SEL_CPLL)
+		parent = priv->cpll_hz;
+	else if (sel == CLK_ISP_SEL_HPLL)
+		parent = priv->hpll_hz;
+	else
+		return -ENOENT;
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rv1126_clk_isp_set_clk(struct rv1126_clk_priv *priv, ulong rate)
+{
+	struct rv1126_cru *cru = priv->cru;
+	u32 parent, sel, src_clk_div;
+
+	if (!(priv->cpll_hz % rate)) {
+		parent = priv->cpll_hz;
+		sel = CLK_ISP_SEL_CPLL;
+	} else if (!(priv->hpll_hz % rate)) {
+		parent = priv->hpll_hz;
+		sel = CLK_ISP_SEL_HPLL;
+	} else {
+		parent = priv->gpll_hz;
+		sel = CLK_ISP_SEL_GPLL;
+	}
+
+	src_clk_div = DIV_ROUND_UP(parent, rate);
+	assert(src_clk_div - 1 <= 31);
+	rk_clrsetreg(&cru->clksel_con[50],
+		     CLK_ISP_SEL_MASK | CLK_ISP_DIV_MASK,
+		     sel << CLK_ISP_SEL_SHIFT |
+		     (src_clk_div - 1) << CLK_ISP_DIV_SHIFT);
+
+	return rv1126_clk_isp_get_clk(priv);
+}
+#endif
+
 static ulong rv1126_clk_get_rate(struct clk *clk)
 {
 	struct rv1126_clk_priv *priv = dev_get_priv(clk->dev);
@@ -1489,6 +1613,16 @@ static ulong rv1126_clk_get_rate(struct clk *clk)
 	case PCLK_GMAC:
 		rate = rv1126_pclk_gmac_get_clk(priv);
 		break;
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_KERNEL_BOOT)
+	case CLK_ISP:
+		rate = rv1126_clk_isp_get_clk(priv);
+		break;
+	case ACLK_PDVI:
+	case ACLK_PDISPP:
+	case CLK_ISPP:
+		rate = rv1126_clk_pdvi_ispp_get_clk(priv, clk->id);
+		break;
+#endif
 	default:
 		return -ENOENT;
 	}
@@ -1589,6 +1723,16 @@ static ulong rv1126_clk_set_rate(struct clk *clk, ulong rate)
 	case CLK_GMAC_TX_RX:
 		ret = rv1126_gmac_tx_rx_set_clk(priv, rate);
 		break;
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_KERNEL_BOOT)
+	case CLK_ISP:
+		ret = rv1126_clk_isp_set_clk(priv, rate);
+		break;
+	case ACLK_PDVI:
+	case ACLK_PDISPP:
+	case CLK_ISPP:
+		ret = rv1126_clk_pdvi_ispp_set_clk(priv, clk->id, rate);
+		break;
+#endif
 	default:
 		return -ENOENT;
 	}

commit c402731f2db1641a89fc28973e0c0b6a044af7d1
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Sun May 24 23:34:36 2020 +0800

    mtd: mtd_blk: Add api to get mtd_blk mapped address
    
    Change-Id: I197df5f03e0894584cd2ffb3b7ac1423e84e43df
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index 386e104d64..956bb8ad15 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -82,6 +82,27 @@ int mtd_blk_map_table_init(struct blk_desc *desc,
 	}
 }
 
+static bool get_mtd_blk_map_address(struct mtd_info *mtd, loff_t *off)
+{
+	bool mapped;
+	loff_t offset = *off;
+	size_t block_offset = offset & (mtd->erasesize - 1);
+
+	mapped = false;
+	if (!mtd_map_blk_table ||
+	    mtd_map_blk_table[(u64)offset >> mtd->erasesize_shift] ==
+	    MTD_BLK_TABLE_BLOCK_UNKNOWN ||
+	    mtd_map_blk_table[(u64)offset >> mtd->erasesize_shift] ==
+	    0xffffffff)
+		return mapped;
+
+	mapped = true;
+	*off = (loff_t)(((u32)mtd_map_blk_table[(u64)offset >>
+		mtd->erasesize_shift] << mtd->erasesize_shift) + block_offset);
+
+	return mapped;
+}
+
 static __maybe_unused int mtd_map_read(struct mtd_info *mtd, loff_t offset,
 				       size_t *length, size_t *actual,
 				       loff_t lim, u_char *buffer)
@@ -94,23 +115,11 @@ static __maybe_unused int mtd_map_read(struct mtd_info *mtd, loff_t offset,
 	while (left_to_read > 0) {
 		size_t block_offset = offset & (erasesize - 1);
 		size_t read_length;
-		loff_t mapped_offset;
-		bool mapped;
 
 		if (offset >= mtd->size)
 			return 0;
 
-		mapped_offset = offset;
-		mapped = false;
-		if (mtd_map_blk_table &&
-		    mtd_map_blk_table[(u64)offset >> mtd->erasesize_shift] !=
-		    MTD_BLK_TABLE_BLOCK_UNKNOWN)  {
-			mapped = true;
-			mapped_offset = (loff_t)(((u32)mtd_map_blk_table[(u64)offset >>
-				mtd->erasesize_shift] << mtd->erasesize_shift) + block_offset);
-		}
-
-		if (!mapped) {
+		if (!get_mtd_blk_map_address(mtd, &offset)) {
 			if (mtd_block_isbad(mtd, offset & ~(erasesize - 1))) {
 				printf("Skip bad block 0x%08llx\n",
 				       offset & ~(erasesize - 1));
@@ -124,11 +133,11 @@ static __maybe_unused int mtd_map_read(struct mtd_info *mtd, loff_t offset,
 		else
 			read_length = erasesize - block_offset;
 
-		rval = mtd_read(mtd, mapped_offset, read_length, &read_length,
+		rval = mtd_read(mtd, offset, read_length, &read_length,
 				p_buffer);
 		if (rval && rval != -EUCLEAN) {
 			printf("NAND read from offset %llx failed %d\n",
-			       mapped_offset, rval);
+			       offset, rval);
 			*length -= left_to_read;
 			return rval;
 		}

commit eaa66b0d6a7c944700f8c75ae91690069378513f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 22 18:02:06 2020 +0800

    tools: fit: add "/totalsize" property for itb size
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I1aa87d5c0e1dd39762c470b134c4d8a57cab4f29

diff --git a/tools/fit_image.c b/tools/fit_image.c
index 12cb757bcf..8442e72bff 100644
--- a/tools/fit_image.c
+++ b/tools/fit_image.c
@@ -99,7 +99,8 @@ static int fit_add_file_data(struct image_tool_params *params, size_t size_inc,
 	/* for first image creation, add a timestamp at offset 0 i.e., root  */
 	if (params->datafile) {
 		time_t time = imagetool_get_source_date(params, sbuf.st_mtime);
-		ret = fit_set_timestamp(ptr, 0, time);
+		ret  = fit_set_timestamp(ptr, 0, time);
+		ret |= fit_set_totalsize(ptr, 0, sbuf.st_size);
 	}
 
 	if (!ret) {

commit c516743f40686d323726a36071f50d1d6bdf176a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 22 18:01:42 2020 +0800

    common: fit: add fit_set_totalsize() interface
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ib10984da99aa82d5dd4bbfe2b13233e7155aee41

diff --git a/common/image-fit.c b/common/image-fit.c
index beb6c9a0d8..25c1d33cb0 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -1094,6 +1094,24 @@ int fit_set_timestamp(void *fit, int noffset, time_t timestamp)
 	return 0;
 }
 
+int fit_set_totalsize(void *fit, int noffset, time_t totalsize)
+{
+	uint32_t t;
+	int ret;
+
+	t = cpu_to_uimage(totalsize);
+	ret = fdt_setprop(fit, noffset, FIT_TOTALSIZE_PROP, &t,
+				sizeof(uint32_t));
+	if (ret) {
+		printf("Can't set '%s' property for '%s' node (%s)\n",
+		      FIT_TOTALSIZE_PROP, fit_get_name(fit, noffset, NULL),
+		      fdt_strerror(ret));
+		return ret == -FDT_ERR_NOSPACE ? -ENOSPC : -1;
+	}
+
+	return 0;
+}
+
 int fit_get_image_defconf_node(const void *fit, int *images_noffset, int *def_noffset)
 {
 	int images_node, confs_node, defconf_node;
diff --git a/include/image.h b/include/image.h
index a6d4a0fd35..6f642704e8 100644
--- a/include/image.h
+++ b/include/image.h
@@ -919,6 +919,7 @@ int bootz_setup(ulong image, ulong *start, ulong *end);
 #define FIT_DATA_OFFSET_PROP	"data-offset"
 #define FIT_DATA_SIZE_PROP	"data-size"
 #define FIT_TIMESTAMP_PROP	"timestamp"
+#define FIT_TOTALSIZE_PROP	"totalsize"
 #define FIT_DESC_PROP		"description"
 #define FIT_ARCH_PROP		"arch"
 #define FIT_TYPE_PROP		"type"
@@ -1025,6 +1026,7 @@ int fit_image_check_hash(const void *fit, int noffset, const void *data,
 			 size_t size, char **err_msgp);
 
 int fit_set_timestamp(void *fit, int noffset, time_t timestamp);
+int fit_set_totalsize(void *fit, int noffset, time_t totalsize);
 
 int fit_get_image_defconf_node(const void *fit,
 			       int *images_noffset, int *def_noffset);

commit b4b532de543d66b5c8ce858e2317ed523cb14632
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 22 17:40:45 2020 +0800

    configs: rv1126: verify otp verified-boot flag for SPL
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I7277606c3e46ba1f10f49e9d2cbdea68ba30bc59

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index 7d7b544baa..fb95347ff0 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -84,6 +84,8 @@ CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y
 CONFIG_RK8XX_PWRKEY=y
 CONFIG_ADC_KEY=y
+CONFIG_SPL_MISC=y
+CONFIG_SPL_ROCKCHIP_SECURE_OTP_V2=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MTD=y

commit c22a6b218d91e5643c411e1168bd6a9067d5f189
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 22 17:27:01 2020 +0800

    rockchip: return boolean for otp verified-boot flag
    
    Print this important information.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ibf59f5c13285960d3b022a9c67d6cee3a274eaf1

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 6832ef99a4..ffb1be2653 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -816,6 +816,8 @@ int fit_board_verify_required_sigs(void)
 		return 1;
 	}
 #endif
+	printf("## Verified-boot: %d\n", vboot);
+
 	return vboot;
 }
 
diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index abafad60b5..6e1fb789cc 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -328,5 +328,7 @@ int fit_board_verify_required_sigs(void)
 		return 1;
 	}
 #endif
-	return vboot;
+	printf("## Verified-boot: %d\n", vboot);
+
+	return vboot == 0xff;
 }

commit 1ab43d022eb8ea93b4ad4afe516b6cc2ae49b0fe
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon May 25 11:04:16 2020 +0800

    rockchip: its: remove unused property
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I540d4e741d362c0f2d871d4f14700507e2653b31

diff --git a/arch/arm/mach-rockchip/kernel_arm.its b/arch/arm/mach-rockchip/kernel_arm.its
index d22547e4d3..cff4dafa99 100644
--- a/arch/arm/mach-rockchip/kernel_arm.its
+++ b/arch/arm/mach-rockchip/kernel_arm.its
@@ -13,8 +13,6 @@
 
 	images {
 		fdt {
-			description = "Device tree blob";
-			image = "rk-kernel.dtb";
 			data = /incbin/("images/rk-kernel.dtb");
 			type = "flat_dt";
 			arch = "arm";
@@ -26,8 +24,6 @@
 		};
 
 		kernel {
-			description = "Kernel Image";
-			image = "kernel.img";
 			data = /incbin/("images/kernel.img");
 			type = "kernel";
 			arch = "arm";
@@ -41,8 +37,6 @@
 		};
 
 		ramdisk {
-			description = "Ramdisk Image";
-			image = "ramdisk.img";
 			data = /incbin/("images/ramdisk.img");
 			type = "ramdisk";
 			arch = "arm";
@@ -55,8 +49,6 @@
 		};
 
 		resource {
-			description = "Resource Image";
-			image = "resource.img";
 			data = /incbin/("images/resource.img");
 			type = "multi";
 			arch = "arm";
diff --git a/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh b/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh
index c935512bd7..b7a580a764 100755
--- a/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh
+++ b/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh
@@ -16,7 +16,6 @@ cat << EOF
 	images {
 		uboot {
 			description = "U-Boot";
-			image = "u-boot-nodtb.bin";
 			data = /incbin/("./u-boot-nodtb.bin");
 			type = "standalone";
 			os = "U-Boot";
@@ -35,7 +34,6 @@ cat << EOF
 		};
 		optee {
 			description = "OP-TEE";
-			image = "tee.bin";
 			data = /incbin/("./tee.bin");
 			type = "firmware";
 			arch = "arm";
@@ -59,7 +57,6 @@ cat << EOF
 		};
 		fdt {
 			description = "U-Boot dtb";
-			image = "u-boot.dtb";
 			data = /incbin/("./u-boot.dtb");
 			type = "flat_dt";
 			compression = "none";
@@ -76,7 +73,6 @@ MCU_LOAD_ADDR=$(echo "obase=16;${MCU_LOAD_ADDR}"|bc)
 cat  << EOF
 		mcu {
 			description = "mcu";
-			image="mcu.bin";
 			data = /incbin/("./mcu.bin");
 			type = "standalone";
 			compression = "none";

commit f1d6518991362e5ee19e47eb8083c3eccc8119f6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon May 25 11:04:04 2020 +0800

    rockchip: board: fix typo
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I21bf8e925b2746ca62344ffa49b9ccb7c7cdb7c7

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 1653cffa11..6832ef99a4 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -406,11 +406,11 @@ int board_fdt_fixup(void *blob)
  *
  * What ever U-Boot is 64-bit or 32-bit mode, the OP-TEE is always 64-bit mode.
  *
- * Command for OP-TEE:
+ * Common for OP-TEE:
  *	64-bit mode: dcache is always enabled;
  *	32-bit mode: dcache is always disabled(Due to some unknown issue);
  *
- * Command for U-Boot:
+ * Common for U-Boot:
  *	64-bit mode: MMU table is static defined in rkxxx.c file, all memory
  *		     regions are mapped. That's good to match OP-TEE MMU policy.
  *

commit d6f41d79d95d5fa4a9928179b0c2c55fbfa77118
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue May 19 16:50:47 2020 +0800

    configs: add rv1126-usbplug_defconfig
    
    - enable CONFIG_SUPPORT_USBPLUG to generate mininum usbplug.bin
    - only "rockusb" command is supported
    - run_command_list() doesn't support powerful syntax, it falls
      back to run_command().
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>
    Change-Id: I67ac23aedc48359032c9b44cbf417515090cbd95

diff --git a/configs/rv1126-usbplug_defconfig b/configs/rv1126-usbplug_defconfig
new file mode 100644
index 0000000000..d0719c1f0c
--- /dev/null
+++ b/configs/rv1126-usbplug_defconfig
@@ -0,0 +1,100 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0xc000
+CONFIG_ROCKCHIP_RV1126=y
+# CONFIG_RKIMG_BOOTLOADER is not set
+# CONFIG_ROCKCHIP_PRELOADER_ATAGS is not set
+CONFIG_TARGET_EVB_RV1126=y
+CONFIG_DEFAULT_DEVICE_TREE="rv1126-evb"
+CONFIG_DEBUG_UART=y
+# CONFIG_DISTRO_DEFAULTS is not set
+# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
+# CONFIG_PASS_DEVICE_SERIAL_BY_FDT is not set
+CONFIG_CONSOLE_SERIAL_SKIP_INIT=y
+# CONFIG_DISPLAY_CPUINFO is not set
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_SUPPORT_USBPLUG=y
+# CONFIG_CMDLINE is not set
+CONFIG_U_BOOT_CMD_ALWAYS=y
+# CONFIG_AUTOBOOT is not set
+# CONFIG_FASTBOOT is not set
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_CONSOLE is not set
+# CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_BOOTM is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_FDT is not set
+# CONFIG_CMD_GO is not set
+# CONFIG_CMD_RUN is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_EXPORTENV is not set
+# CONFIG_CMD_IMPORTENV is not set
+# CONFIG_CMD_EDITENV is not set
+# CONFIG_CMD_SAVEENV is not set
+# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_CRC32 is not set
+# CONFIG_CMD_MEMORY is not set
+# CONFIG_CMD_DM is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+# CONFIG_CMD_ECHO is not set
+# CONFIG_CMD_ITEST is not set
+# CONFIG_CMD_SOURCE is not set
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_NET is not set
+# CONFIG_CMD_NFS is not set
+# CONFIG_CMD_MISC is not set
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+# CONFIG_DM_WARN is not set
+# CONFIG_DM_DEVICE_REMOVE is not set
+# CONFIG_DM_STDIO is not set
+# CONFIG_DM_SEQ_ALIAS is not set
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+# CONFIG_SIMPLE_BUS is not set
+# CONFIG_OF_TRANSLATE is not set
+# CONFIG_ADC is not set
+# CONFIG_SARADC_ROCKCHIP is not set
+CONFIG_CLK=y
+# CONFIG_DM_I2C is not set
+# CONFIG_INPUT is not set
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MTD=y
+CONFIG_MTD_BLK=y
+CONFIG_MTD_DEVICE=y
+CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0x1
+CONFIG_SF_DEFAULT_SPEED=50000000
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPI_FLASH_MTD=y
+# CONFIG_DM_REGULATOR is not set
+# CONFIG_DM_PWM is not set
+CONFIG_BAUDRATE=1500000
+# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
+# CONFIG_SERIAL_PRESENT is not set
+# CONFIG_SPL_SERIAL_PRESENT is not set
+CONFIG_DEBUG_UART_BASE=0xff570000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_ROCKCHIP_SFC=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x110b
+CONFIG_USB_GADGET_DOWNLOAD=y
+# CONFIG_SYS_WHITE_ON_BLACK is not set
+CONFIG_USE_TINY_PRINTF=y
+# CONFIG_SYSMEM is not set
+# CONFIG_BIDRAM is not set
+# CONFIG_EFI_LOADER is not set

commit f79adc89c30499428a3015800a14d84391090d6a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue May 19 16:48:22 2020 +0800

    rockchip: rv1126: support usbplug
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>
    Change-Id: I841df666100e78dda2bac4b7ce9a8495a5e4a171

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 454a419d79..39fa942978 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -423,12 +423,12 @@ endif
 config ROCKCHIP_RV1126
 	bool "Support Rockchip RV1126"
 	select CPU_V7
-	select GICV2
-	select ARM_SMCCC
-	select BOARD_LATE_INIT
-	select SUPPORT_SPL
+	select GICV2 if !SUPPORT_USBPLUG
+	select ARM_SMCCC if !SUPPORT_USBPLUG
 	select SUPPORT_TPL
-	select SPL
+	select SUPPORT_SPL
+	select SPL if !SUPPORT_USBPLUG
+	select BOARD_LATE_INIT if !SUPPORT_USBPLUG
 	help
 	  The Rockchip RV1126 is a ARM-based SoC with a quad-core Cortex-A7
 	  and a risc-v core.
diff --git a/arch/arm/mach-rockchip/rv1126/rv1126.c b/arch/arm/mach-rockchip/rv1126/rv1126.c
index 8ef9ab2d42..34b774d593 100644
--- a/arch/arm/mach-rockchip/rv1126/rv1126.c
+++ b/arch/arm/mach-rockchip/rv1126/rv1126.c
@@ -56,6 +56,8 @@ DECLARE_GLOBAL_DATA_PTR;
 #define SGRF_CON_SCR1_BOOT_ADDR	0x0b0
 #define SGRF_SOC_CON3		0x00c
 #define SCR1_START_ADDR		0x208000
+#define CRU_SOFTRST_CON11	0xFF49032C
+#define PMUGRF_SOC_CON1		0xFE020104
 
 void board_debug_uart_init(void)
 {
@@ -64,7 +66,7 @@ void board_debug_uart_init(void)
 
 int arch_cpu_init(void)
 {
-#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
+#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD) || defined(CONFIG_SUPPORT_USBPLUG)
 	/* Just set region 0 to unsecure */
 	writel(0, FIREWALL_APB_BASE + FW_DDR_CON_REG);
 #endif
@@ -141,6 +143,16 @@ int arch_cpu_init(void)
 	writel(0x101, CRYPTO_PRIORITY_REG);
 #endif
 
+#if defined(CONFIG_SUPPORT_USBPLUG)
+	/* reset usbphy_otg usbphypor_otg */
+	writel(((0x1 << 6 | (1 << 8)) << 16) | (0x1 << 6) | (1 << 8), CRU_SOFTRST_CON11);
+	udelay(50);
+	writel(((0x1 << 6 | (1 << 8)) << 16) | (0), CRU_SOFTRST_CON11);
+
+	/* hold pmugrf's io reset */
+	writel(0x1 << 7 | 1 << 23, PMUGRF_SOC_CON1);
+#endif
+
 	return 0;
 }
 
diff --git a/include/configs/evb_rv1126.h b/include/configs/evb_rv1126.h
index b29d8dc8a6..5688faa496 100644
--- a/include/configs/evb_rv1126.h
+++ b/include/configs/evb_rv1126.h
@@ -9,7 +9,10 @@
 
 #include <configs/rv1126_common.h>
 
+#ifndef CONFIG_SUPPORT_USBPLUG
 #define CONFIG_SUPPORT_EMMC_RPMB
+#endif
+
 #define CONFIG_SYS_MMC_ENV_DEV 0
 
 #define ROCKCHIP_DEVICE_SETTINGS \
diff --git a/include/configs/rv1126_common.h b/include/configs/rv1126_common.h
index e3803c1827..933917f3f0 100644
--- a/include/configs/rv1126_common.h
+++ b/include/configs/rv1126_common.h
@@ -15,7 +15,12 @@
 #define CONFIG_SKIP_LOWLEVEL_INIT
 #define CONFIG_SYS_NS16550_MEM32
 
+#ifdef CONFIG_SUPPORT_USBPLUG
+#define CONFIG_SYS_TEXT_BASE		0x00000000
+#else
 #define CONFIG_SYS_TEXT_BASE		0x00400000
+#endif
+
 #define CONFIG_SYS_INIT_SP_ADDR		0x00580000
 #define CONFIG_SYS_LOAD_ADDR		0x00C00800
 #define CONFIG_SYS_BOOTM_LEN		(64 << 20)

commit e90e674ffd0e9d4bc698ce3491c37e4b38405359
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu May 21 21:45:01 2020 +0800

    rockchip: add usbplug support
    
    The output usbplug.bin is used to replace the rockchip
    usbplug binary in the "rkbin" repository.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I0ec488bd37f3b3e96232f2ed653a0af453199105

diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 89e732aeed..f1c33f87fd 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -20,13 +20,18 @@ ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
 # inside of boot_mode.c when CONFIG_BOOT_MODE_REG is 0.  This way,
 # we can have the preprocessor correctly recognise both 0x0 and 0
 # meaning "turn it off".
+
+obj-y += chip_info.o
+ifndef CONFIG_SUPPORT_USBPLUG
 obj-y += boot_mode.o
 obj-y += boot_rkimg.o
 obj-y += board.o
-obj-y += chip_info.o
 obj-y += iomem.o
 obj-y += memblk.o
 obj-y += hotkey.o
+else
+obj-y += usbplug.o
+endif
 
 obj-$(CONFIG_USING_KERNEL_DTB) += kernel_dtb.o
 obj-$(CONFIG_ROCKCHIP_FIT_IMAGE) += fit.o
diff --git a/arch/arm/mach-rockchip/usbplug.c b/arch/arm/mach-rockchip/usbplug.c
new file mode 100644
index 0000000000..c0cd1226fe
--- /dev/null
+++ b/arch/arm/mach-rockchip/usbplug.c
@@ -0,0 +1,65 @@
+/*
+ * (C) Copyright 2020 Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <debug_uart.h>
+#include <malloc.h>
+#include <mmc.h>
+#include <stdlib.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static char *bootdev_rockusb_cmd(void)
+{
+	const char *devtype, *devnum;
+	const char *bootdev_list[] = {
+		"mmc",		"0",
+		"mtd_blk",	"0",
+		"mtd_blk",	"1",
+		"mtd_blk",	"2",
+		"rknand",	"0",
+		"rksfc",	"0",
+		"rksfc",	"1",
+		NULL,		NULL,
+	};
+	char *cmd;
+	int i = 0;
+
+	devtype = bootdev_list[0];
+	devnum = bootdev_list[1];
+	while (devtype) {
+		if (!strcmp("mmc", devtype))
+			mmc_initialize(gd->bd);
+
+		if (blk_get_devnum_by_typename(devtype, atoi(devnum)))
+			break;
+
+		i += 2;
+		devtype = bootdev_list[i];
+		devnum = bootdev_list[i + 1];
+	}
+
+	if (!devtype) {
+		printf("No boot device\n");
+		return NULL;
+	}
+
+	printf("Bootdev: %s %s\n", devtype, devnum);
+
+	cmd = malloc(32);
+	if (!cmd)
+		return NULL;
+
+	snprintf(cmd, 32, "rockusb 0 %s %s", devtype, devnum);
+
+	return cmd;
+}
+
+int board_init(void)
+{
+	return run_command(bootdev_rockusb_cmd(), 0);
+}
+

commit 4a2b8db466479ddec6ee85f9fe9d7f934016be9a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue May 19 11:16:07 2020 +0800

    common: add usbplug support
    
    - disable some message
    - add "usbplug.bin" generation
    - add minimum usbplug dtb support
    - add individual board_init_r() init sequence.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If48ee49247fca6108db3a1fbab3b403241b3a8eb

diff --git a/Makefile b/Makefile
index 2f134ccbf3..de68fa12be 100644
--- a/Makefile
+++ b/Makefile
@@ -771,6 +771,7 @@ endif
 
 # Always append ALL so that arch config.mk's can add custom ones
 ALL-y += u-boot.srec u-boot.bin u-boot.sym System.map binary_size_check
+ALL-$(CONFIG_SUPPORT_USBPLUG) += usbplug.bin
 
 ALL-$(CONFIG_ONENAND_U_BOOT) += u-boot-onenand.bin
 ifeq ($(CONFIG_SPL_FSL_PBL),y)
@@ -922,6 +923,11 @@ u-boot.bin: u-boot-nodtb.bin FORCE
 	$(call if_changed,copy)
 endif
 
+ifeq ($(CONFIG_SUPPORT_USBPLUG),y)
+usbplug.bin: u-boot.bin
+	$(call if_changed,copy)
+endif
+
 %.imx: %.bin
 	$(Q)$(MAKE) $(build)=arch/arm/mach-imx $@
 
@@ -1355,12 +1361,21 @@ prepare: prepare0
 # Generate some files
 # ---------------------------------------------------------------------------
 
+ifeq ($(CONFIG_SUPPORT_USBPLUG),)
 define filechk_version.h
 	(echo \#define PLAIN_VERSION \"$(UBOOTRELEASE)\"; \
 	echo \#define U_BOOT_VERSION \"U-Boot \" PLAIN_VERSION; \
 	echo \#define CC_VERSION_STRING \"$$(LC_ALL=C $(CC) --version | head -n 1)\"; \
 	echo \#define LD_VERSION_STRING \"$$(LC_ALL=C $(LD) --version | head -n 1)\"; )
 endef
+else
+define filechk_version.h
+        (echo \#define PLAIN_VERSION \"$(UBOOTRELEASE)\"; \
+        echo \#define U_BOOT_VERSION \"USB-PLUG \" PLAIN_VERSION; \
+        echo \#define CC_VERSION_STRING \"$$(LC_ALL=C $(CC) --version | head -n 1)\"; \
+        echo \#define LD_VERSION_STRING \"$$(LC_ALL=C $(LD) --version | head -n 1)\"; )
+endef
+endif
 
 # The SOURCE_DATE_EPOCH mechanism requires a date that behaves like GNU date.
 # The BSD date on the other hand behaves different and would produce errors
diff --git a/common/Kconfig b/common/Kconfig
index c0708ec76a..e433dc048c 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -674,3 +674,4 @@ config HASH
 endmenu
 
 source "common/spl/Kconfig"
+source "common/usbplug/Kconfig"
diff --git a/common/Makefile b/common/Makefile
index e09461f58a..468318aedf 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -8,6 +8,8 @@
 # core
 ifndef CONFIG_SPL_BUILD
 obj-y += init/
+obj-$(CONFIG_SUPPORT_USBPLUG) += usbplug/
+
 obj-y += main.o
 obj-y += exports.o
 obj-$(CONFIG_HASH) += hash.o
@@ -21,7 +23,9 @@ endif
 
 # # boards
 obj-y += board_f.o
+ifndef CONFIG_SUPPORT_USBPLUG
 obj-y += board_r.o
+endif
 obj-$(CONFIG_DISPLAY_BOARDINFO) += board_info.o
 obj-$(CONFIG_DISPLAY_BOARDINFO_LATE) += board_info.o
 
diff --git a/common/board_f.c b/common/board_f.c
index 489a7d111e..c88691439b 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -160,7 +160,9 @@ static int announce_pre_serial(void)
 
 static int announce_dram_init(void)
 {
+#ifndef CONFIG_SUPPORT_USBPLUG
 	puts("DRAM:  ");
+#endif
 	return 0;
 }
 
@@ -188,10 +190,12 @@ static int show_dram_config(void)
 #ifdef CONFIG_BIDRAM
 	size += bidram_append_size();
 #endif
+
+#ifndef CONFIG_SUPPORT_USBPLUG
 	print_size(size, "");
 	board_add_ram_info(0);
 	putc('\n');
-
+#endif
 	return 0;
 }
 
@@ -672,8 +676,10 @@ static int setup_reloc(void)
 #endif
 	memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
 
+#ifndef CONFIG_SUPPORT_USBPLUG
 	printf("Relocation Offset: %08lx, fdt: %08lx\n",
 	      gd->reloc_off, (ulong)gd->new_fdt);
+#endif
 	debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
 	      gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
 	      gd->start_addr_sp);
diff --git a/common/usbplug/Kconfig b/common/usbplug/Kconfig
new file mode 100644
index 0000000000..04fb1b8df9
--- /dev/null
+++ b/common/usbplug/Kconfig
@@ -0,0 +1,10 @@
+menu "USBPLUG"
+
+config SUPPORT_USBPLUG
+	bool "Support USB PLUG"
+	default n
+	help
+	  Support to build U-Boot as usb plug image for download firmware.
+
+endmenu
+
diff --git a/common/usbplug/Makefile b/common/usbplug/Makefile
new file mode 100644
index 0000000000..d2889dd69b
--- /dev/null
+++ b/common/usbplug/Makefile
@@ -0,0 +1,2 @@
+obj-y += usbplug.o
+
diff --git a/common/usbplug/usbplug.c b/common/usbplug/usbplug.c
new file mode 100644
index 0000000000..31bd1fae04
--- /dev/null
+++ b/common/usbplug/usbplug.c
@@ -0,0 +1,81 @@
+/*
+ * (C) Copyright 2020 Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <mapmem.h>
+#include <malloc.h>
+#include <dm/root.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static void initr_reloc(void)
+{
+	/* tell others: relocation done */
+	gd->flags |= GD_FLG_RELOC | GD_FLG_FULL_MALLOC_INIT;
+}
+
+#ifdef CONFIG_ARM
+static void initr_caches(void)
+{
+	icache_enable();
+	dcache_enable();
+}
+#endif
+
+static void initr_malloc(void)
+{
+	ulong malloc_start;
+
+	/* The malloc area is immediately below the monitor copy in DRAM */
+	malloc_start = gd->relocaddr - TOTAL_MALLOC_LEN;
+	mem_malloc_init((ulong)map_sysmem(malloc_start, TOTAL_MALLOC_LEN),
+			TOTAL_MALLOC_LEN);
+}
+
+#ifdef CONFIG_DM
+static int initr_dm(void)
+{
+	/* Save the pre-reloc driver model and start a new one */
+	gd->dm_root_f = gd->dm_root;
+	gd->dm_root = NULL;
+
+	return dm_init_and_scan(false);
+}
+#endif
+
+/*
+ * The below functions are all __weak declared.
+ */
+int dram_init(void)
+{
+#if CONFIG_SYS_MALLOC_LEN > SZ_64M
+	"CONFIG_SYS_MALLOC_LEN is over 64MB"
+#endif
+	gd->ram_size = SZ_64M; /* default */
+
+	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+	gd->bd->bi_dram[0].size  = gd->ram_size;
+
+	return 0;
+}
+
+/* Refers to common/board_r.c */
+void board_init_r(gd_t *new_gd, ulong dest_addr)
+{
+	initr_reloc();
+#ifdef CONFIG_ARM
+	initr_caches();
+#endif
+	initr_malloc();
+#ifdef CONFIG_DM
+	initr_dm();
+#endif
+	/* Setup chipselects, entering usb-plug mode */
+	board_init();
+
+	hang();
+}
+
diff --git a/dts/Makefile b/dts/Makefile
index 170559d288..ec341cad35 100644
--- a/dts/Makefile
+++ b/dts/Makefile
@@ -63,7 +63,7 @@ $(obj)/dt-spl.dtb: $(DTB) $(objtree)/tools/fdtgrep FORCE
 	$(call if_changed,fdtgrep)
 endif
 
-ifeq ($(CONFIG_USING_KERNEL_DTB),y)
+ifneq ($(CONFIG_USING_KERNEL_DTB)$(CONFIG_SUPPORT_USBPLUG),)
 $(obj)/dt.dtb: $(DTB) $(objtree)/tools/fdtgrep FORCE
 	$(call if_changed,fdtgrep)
 else

commit 954246924665312ccf9d6ac3a87543ca75e6ef51
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue May 19 11:25:19 2020 +0800

    gadget: rockusb: support usbplug download mode
    
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ic265243834ce294e6d979bcae89774a42600e5f3

diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index 25900ce6b2..4bc2ac78a7 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -74,7 +74,11 @@ int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
 		dev->idProduct = __constant_cpu_to_le16(CONFIG_ROCKUSB_G_DNL_PID);
 
 		/* Enumerate as a loader device */
+#if defined(CONFIG_SUPPORT_USBPLUG)
+		dev->bcdUSB = cpu_to_le16(0x0200);
+#else
 		dev->bcdUSB = cpu_to_le16(0x0201);
+#endif
 	} else if (!strncmp(name, "usb_dnl_fastboot", 16)) {
 		/* Fix to Google's VID and PID */
 		dev->idVendor  = __constant_cpu_to_le16(0x18d1);

commit d45e5655df6897d05248162536e6fdc3381d936d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue May 19 11:22:40 2020 +0800

    dm: serial: allow skip console serial init
    
    Always use debug uart.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Id751856abd7be219e8acb4c5986469a804051934

diff --git a/common/Kconfig b/common/Kconfig
index 59ad5fd411..c0708ec76a 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -256,6 +256,11 @@ config CONSOLE_DISABLE_CLI
 	help
 	  This disable CLI interactive in verified-boot.
 
+config CONSOLE_SERIAL_SKIP_INIT
+	bool "Skip console serial init"
+	help
+	  Skip console serial init and always use debug uart.
+
 config DISABLE_CONSOLE
 	bool "disable console in & out"
 	help
diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c
index c397356125..47e24e874d 100644
--- a/drivers/serial/serial-uclass.c
+++ b/drivers/serial/serial-uclass.c
@@ -28,6 +28,7 @@ static const unsigned long baudrate_table[] = CONFIG_SYS_BAUDRATE_TABLE;
 #error "Serial is required before relocation - define CONFIG_$(SPL_)SYS_MALLOC_F_LEN to make this work"
 #endif
 
+#ifndef CONFIG_CONSOLE_SERIAL_SKIP_INIT
 static int serial_check_stdout(const void *blob, struct udevice **devp)
 {
 	int node;
@@ -87,8 +88,9 @@ static int serial_check_stdout(const void *blob, struct udevice **devp)
 
 	return -ENODEV;
 }
+#endif
 
-#ifdef CONFIG_OF_LIVE
+#if defined(CONFIG_OF_LIVE) && !defined(CONFIG_CONSOLE_SERIAL_SKIP_INIT)
 /*
  * Hide and present pinctrl prop int live device tree
  *
@@ -146,6 +148,7 @@ static inline void serial_console_hide_prop(char **p1, char **p2) {}
 static inline void serial_console_present_prop(char *p1, char *p2) {}
 #endif
 
+#ifndef CONFIG_CONSOLE_SERIAL_SKIP_INIT
 static void serial_find_console_or_panic(void)
 {
 	const void *blob = gd->fdt_blob;
@@ -227,6 +230,9 @@ int serial_init(void)
 
 	return 0;
 }
+#else
+int serial_init(void) { return 0; }
+#endif
 
 /* Called after relocation */
 void serial_initialize(void)

commit 50c379531a1a8d7fddea62df3e84196a102a37c5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue May 19 11:39:33 2020 +0800

    rockchip: rkimg: add configure wrap for kernel dtb code
    
    Allow disable some configure without bringing compile error.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I6fddf3368c3e63b82cfb071a2cfe70ebcad7de7b

diff --git a/arch/arm/mach-rockchip/boot_rkimg.c b/arch/arm/mach-rockchip/boot_rkimg.c
index 99fdfcffa7..28482b014f 100644
--- a/arch/arm/mach-rockchip/boot_rkimg.c
+++ b/arch/arm/mach-rockchip/boot_rkimg.c
@@ -330,6 +330,8 @@ out:
 	run_command("run bootcmd", 0);
 }
 
+#if defined(CONFIG_USING_KERNEL_DTB) || defined(CONFIG_CMD_BOOTM) || \
+    defined(CONFIG_CMD_BOOTZ) || defined(CONFIG_CMD_BOOTI)
 #ifdef CONFIG_ROCKCHIP_DTB_VERIFY
 #ifdef CONFIG_DM_CRYPTO
 static int crypto_csum(u32 cap, char *input, u32 input_len, u8 *output)
@@ -512,3 +514,4 @@ int rockchip_read_dtb_file(void *fdt_addr)
 
 	return 0;
 }
+#endif

commit 95ce6b2a3b286c8b12caa577e8e35ee794d0833f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu May 14 15:02:05 2020 +0800

    arm: Kconfig: use "imply" for some configures
    
    Allow to disable them in board defconfig.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I3519c2c23e9e5407637c8dba73e9645a0480cdd8

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index c55dc521d2..7e64a9ab71 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1133,20 +1133,20 @@ config ARCH_ROCKCHIP
 	select SYS_THUMB_BUILD if !ARM64
 	select SPL_SYS_MALLOC_SIMPLE if SPL
 	select DM_GPIO
-	select DM_I2C
 	select DM_MMC if !DM_RAMDISK
 	select DM_SERIAL
 	select DM_SPI
 	select DM_SPI_FLASH
 	select DM_USB if USB
-	select DM_PWM
-	select DM_REGULATOR
 	select CMD_ROCKUSB if USB_GADGET_DOWNLOAD
 	select ENABLE_ARM_SOC_BOOT0_HOOK
 	select SYS_NS16550
 	select SPI
 	select DEBUG_UART_BOARD_INIT
 	select PANIC_HANG
+	imply DM_I2C
+	imply DM_PWM
+	imply DM_REGULATOR
 	imply CMD_FASTBOOT
 	imply FASTBOOT
 	imply FAT_WRITE

commit f6aff21fa1c8bf231f0872f4002f97025c93349a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue May 19 11:24:47 2020 +0800

    cmd: rockusb: import U_BOOT_CMD_ALWAYS
    
    rockusb command is required for usbplug feature in the furture.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I9998ba07e2f7faddae6a830987bea2d6018f431a

diff --git a/cmd/rockusb.c b/cmd/rockusb.c
index 364b02db76..024216183d 100644
--- a/cmd/rockusb.c
+++ b/cmd/rockusb.c
@@ -259,7 +259,7 @@ cleanup_rkusb:
 	return rc;
 }
 
-U_BOOT_CMD(rockusb, 4, 1, do_rkusb,
-	   "Use the rockusb Protocol",
-	   "<USB_controller> <devtype> <dev[:part]>  e.g. rockusb 0 mmc 0\n"
+U_BOOT_CMD_ALWAYS(rockusb, 4, 1, do_rkusb,
+		  "Use the rockusb Protocol",
+		  "<USB_controller> <devtype> <dev[:part]>  e.g. rockusb 0 mmc 0\n"
 );

commit 3d8049ad2f144b81e0bdb27a42fb1f2d477b8f83
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 15 08:55:20 2020 +0800

    common: add U_BOOT_CMD_ALWAYS() support
    
    This function is used to support some special U-Boot commands with
    U_BOOT_CMD_ALWAYS() declared even when CONFIG_CMDLINE is disabled.
    
    It's used when developers requires a critial u-boot.bin by disabling
    the U_BOOT_CMD() and using a simple CLI instead.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I768637592a4d85c7fea00564e96fb80f21ab65fe

diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds
index 515e0fea6f..cc02615043 100644
--- a/arch/arm/cpu/u-boot.lds
+++ b/arch/arm/cpu/u-boot.lds
@@ -15,7 +15,7 @@ OUTPUT_ARCH(arm)
 ENTRY(_start)
 SECTIONS
 {
-#ifndef CONFIG_CMDLINE
+#if !defined(CONFIG_CMDLINE) && !defined(CONFIG_U_BOOT_CMD_ALWAYS)
 	/DISCARD/ : { *(.u_boot_list_2_cmd_*) }
 #endif
 #if defined(CONFIG_ARMV7_SECURE_BASE) && defined(CONFIG_ARMV7_NONSEC)
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 4e32dc6323..b522771ce0 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -30,6 +30,14 @@ config SYS_PROMPT
 	  This string is displayed in the command line to the left of the
 	  cursor.
 
+config U_BOOT_CMD_ALWAYS
+	bool "Enable cmd with U_BOOT_CMD_ALWAYS() declared"
+	depends on !CMDLINE
+	help
+	  This function is used to support some special U-Boot commands with
+	  U_BOOT_CMD_ALWAYS() declared even when CONFIG_CMDLINE is disabled.
+	  It reduces the image size and works with simple CLI.
+
 menu "Autoboot options"
 
 config AUTOBOOT
diff --git a/include/command.h b/include/command.h
index 767cabb3df..681084b9ea 100644
--- a/include/command.h
+++ b/include/command.h
@@ -221,4 +221,14 @@ int board_run_command(const char *cmdline);
 	U_BOOT_CMD_MKENT_COMPLETE(_name, _maxargs, _rep, _cmd,		\
 					_usage, _help, NULL)
 
+#ifdef CONFIG_U_BOOT_CMD_ALWAYS
+#define U_BOOT_CMD_ALWAYS(_name, _maxargs, _rep, _cmd, _usage, _help)	\
+	ll_entry_declare(cmd_tbl_t, _name, cmd) =			\
+			{ #_name, _maxargs, _rep, _cmd, _usage,		\
+				_CMD_HELP(_help) _CMD_COMPLETE(NULL) }
+#else
+#define U_BOOT_CMD_ALWAYS(_name, _maxargs, _rep, _cmd, _usage, _help)	\
+		U_BOOT_CMD(_name, _maxargs, _rep, _cmd, _usage, _help)
+#endif
+
 #endif	/* __COMMAND_H */

commit aedbab3f0f0cf6369774aacbce515930e65dcaf4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu May 14 15:59:53 2020 +0800

    common: cli: allow fall back to simple cli
    
    The simple CLI mode only support run_command() which can't support
    powerful command line syntax like if...then...else...fi conditionals
    or `&&' and '||'.
    
    The run_command_list() falls back to run_command().
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I136cba71e02fd1f57c9a395b37679d9a885ba4a0

diff --git a/common/Makefile b/common/Makefile
index a2c78cc509..e09461f58a 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -59,7 +59,7 @@ obj-$(CONFIG_MENU) += menu.o
 obj-$(CONFIG_UPDATE_TFTP) += update.o
 obj-$(CONFIG_DFU_TFTP) += update.o
 obj-$(CONFIG_USB_KEYBOARD) += usb_kbd.o
-obj-$(CONFIG_CMDLINE) += cli_readline.o cli_simple.o
+obj-y += cli_readline.o cli_simple.o
 
 endif # !CONFIG_SPL_BUILD
 
diff --git a/common/cli.c b/common/cli.c
index a96db7e3e1..d4074a7ef8 100644
--- a/common/cli.c
+++ b/common/cli.c
@@ -18,7 +18,11 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#ifdef CONFIG_CMDLINE
+__weak int board_run_command(const char *cmdline)
+{
+	return cli_simple_run_command_list((char *)cmdline, 0);
+}
+
 /*
  * Run a command using the selected parser.
  *
@@ -69,7 +73,6 @@ int run_command_repeatable(const char *cmd, int flag)
 	return 0;
 #endif
 }
-#endif /* CONFIG_CMDLINE */
 
 int run_command_list(const char *cmd, int len, int flag)
 {
diff --git a/common/command.c b/common/command.c
index e5d9b9cf95..7171557265 100644
--- a/common/command.c
+++ b/common/command.c
@@ -85,7 +85,6 @@ int _do_help(cmd_tbl_t *cmd_start, int cmd_items, cmd_tbl_t *cmdtp, int flag,
 /* find command table entry for a command */
 cmd_tbl_t *find_cmd_tbl(const char *cmd, cmd_tbl_t *table, int table_len)
 {
-#ifdef CONFIG_CMDLINE
 	cmd_tbl_t *cmdtp;
 	cmd_tbl_t *cmdtp_temp = table;	/* Init value */
 	const char *p;
@@ -112,7 +111,6 @@ cmd_tbl_t *find_cmd_tbl(const char *cmd, cmd_tbl_t *table, int table_len)
 	if (n_found == 1) {			/* exactly one match */
 		return cmdtp_temp;
 	}
-#endif /* CONFIG_CMDLINE */
 
 	return NULL;	/* not found or ambiguous command */
 }

commit f3ff8d72ffe1e1fdf0a4370a783ad1e4156d0768
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue May 19 11:23:10 2020 +0800

    sysmem: fix compile error
    
    Error msg: multiple definition of `sysmem_overflow_check'.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I46de1ef35f2decfab7412c415b7f734e3459e5d9

diff --git a/include/sysmem.h b/include/sysmem.h
index f6e7a2c105..0c7b94c421 100644
--- a/include/sysmem.h
+++ b/include/sysmem.h
@@ -148,8 +148,7 @@ static inline int sysmem_init(void) { return 0; }
 static inline int sysmem_initr(void) { return 0; }
 static inline int sysmem_free(phys_addr_t base) { return 0; }
 static inline void sysmem_dump(void) {}
-void sysmem_overflow_check(void) {}
-
+static inline void sysmem_overflow_check(void) {}
 __weak int board_sysmem_reserve(struct sysmem *sysmem) { return 0; }
 
 static inline void *sysmem_alloc(enum memblk_id id, phys_size_t size)

commit a3320fac1532c35df7f524d50be233dcf1992143
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 15 09:46:52 2020 +0800

    bidram: fix compile error
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ia459afb9f821fa22352615de2fd132cc43ec462e

diff --git a/include/bidram.h b/include/bidram.h
index 7ba0497389..51d10ec70b 100644
--- a/include/bidram.h
+++ b/include/bidram.h
@@ -19,6 +19,7 @@ struct bidram {
 	u64 size_u64[MEM_RESV_COUNT];
 };
 
+#ifdef CONFIG_BIDRAM
 /**
  * bidram_initr() - Initial bidram after relocation.
  *
@@ -104,5 +105,25 @@ parse_fn_t board_bidram_parse_fn(void);
  * @return 0 on success, otherwise error
  */
 int board_bidram_reserve(struct bidram *bidram);
+#else
+static inline int bidram_initr(void) { return 0; }
+static inline phys_size_t bidram_get_ram_size(void) { return 0; }
+static inline void bidram_gen_gd_bi_dram(void) { }
+static inline int bidram_reserve(enum memblk_id id, phys_addr_t base,
+				 phys_size_t size) { return 0; }
+static inline int bidram_reserve_by_name(const char *name, phys_addr_t base,
+					 phys_size_t size) { return 0; }
+static inline void bidram_dump(void) {}
+static inline int bidram_fixup(void) { return 0; }
+static inline u64 bidram_append_size(void) { return 0; }
+static inline parse_fn_t board_bidram_parse_fn(void) { return NULL; }
+static inline int board_bidram_reserve(struct bidram *bidram) { return 0; }
+static inline struct memblock *
+	bidram_reserved_is_overlap(phys_addr_t base, phys_size_t size)
+{
+	return NULL;
+}
+
+#endif
 
 #endif /* _BIDRAM_H */

commit 598c6b730e541382a5c9ed5b76cffaad705c62d3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue May 19 16:26:55 2020 +0800

    common: fdt_support: update code wrap by configure
    
    It avoids compile error while disabling CONFIG_ARCH_FIXUP_FDT_MEMORY.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I283a335c2ecf559e42544ab138af414423d8a888

diff --git a/common/fdt_support.c b/common/fdt_support.c
index 5ed1d25974..1577c97c8f 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -558,7 +558,6 @@ int fdt_fixup_memory_banks(void *blob, u64 start[], u64 size[], int banks)
 	}
 	return 0;
 }
-#endif
 
 int fdt_fixup_memory(void *blob, u64 start, u64 size)
 {
@@ -594,6 +593,7 @@ int fdt_update_reserved_memory(void *blob, char *name, u64 start, u64 size)
 
 	return nodeoffset;
 }
+#endif
 
 void fdt_fixup_ethernet(void *fdt)
 {

commit d41e543aa631e97f99616cd7a55a97e2d719cd0b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu May 21 20:45:18 2020 +0800

    common: spl: initial spl->next_stage
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I5066612be4c90ff674b61034768eeaba9b9c9b85

diff --git a/common/spl/spl.c b/common/spl/spl.c
index 1def89970d..b53b789e2d 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -83,7 +83,10 @@ void __weak spl_perform_fixups(struct spl_image_info *spl_image)
 }
 
 /* Get the next stage process */
-__weak void spl_next_stage(struct spl_image_info *spl) {}
+__weak void spl_next_stage(struct spl_image_info *spl)
+{
+	spl->next_stage = SPL_NEXT_STAGE_UBOOT;
+}
 
 /* Weak default function for arch/board-specific preppare before jumping */
 int __weak spl_board_prepare_for_jump(struct spl_image_info *spl_image)

commit a1247eb812cd967c1970167fa4cafcd4a141bf97
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu May 21 20:44:16 2020 +0800

    rockchip: spl: fix typo
    
    Use upper case "V2".
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I4b252687c560e13ab78812eb72b59806393beb12

diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index ef086d1f66..abafad60b5 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -316,7 +316,7 @@ void spl_hang_reset(void)
 int fit_board_verify_required_sigs(void)
 {
 	uint8_t vboot = 0;
-#if defined(CONFIG_SPL_ROCKCHIP_SECURE_OTP) || defined(CONFIG_SPL_ROCKCHIP_SECURE_OTP_v2)
+#if defined(CONFIG_SPL_ROCKCHIP_SECURE_OTP) || defined(CONFIG_SPL_ROCKCHIP_SECURE_OTP_V2)
 	struct udevice *dev;
 
 	dev = misc_otp_get_device(OTP_S);

commit 869c6dc2a9eb177356fe3d94aa2c3b79c7f4beff
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu May 21 20:42:10 2020 +0800

    include: boot_rkimg: define more partition name
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ia8c58e2acca485771ef6a2747bdcbb8326dbfebc

diff --git a/include/boot_rkimg.h b/include/boot_rkimg.h
index db826e7357..85467b5196 100644
--- a/include/boot_rkimg.h
+++ b/include/boot_rkimg.h
@@ -48,6 +48,8 @@ struct rockchip_image {
 #define TAG_KERNEL			0x4C4E524B
 #define BCB_MESSAGE_BLK_OFFSET		(16 * 1024 >> 9)
 
+#define PART_UBOOT			"uboot"
+#define PART_TRUST			"trust"
 #define PART_MISC			"misc"
 #define PART_RESOURCE			"resource"
 #define PART_KERNEL			"kernel"

commit f0130a039298507968acc4fd684c70b008200239
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu May 21 11:55:47 2020 +0800

    rockchip: rv1126: call hang() if timeout when set the pmu
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ib92d97e4a2faf3d6002cc6236b576b4c820ad6d9

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126.c b/arch/arm/mach-rockchip/rv1126/rv1126.c
index fe098b8e97..8ef9ab2d42 100644
--- a/arch/arm/mach-rockchip/rv1126/rv1126.c
+++ b/arch/arm/mach-rockchip/rv1126/rv1126.c
@@ -78,8 +78,10 @@ int arch_cpu_init(void)
 	do {
 		udelay(1);
 		delay--;
-		if (delay == 0)
-			break;
+		if (delay == 0) {
+			printf("Fail to set domain.");
+			hang();
+		}
 	} while (readl(PMU_BASE_ADDR + PMU_PWR_DWN_ST));
 
 	/* release all idle request */
@@ -91,8 +93,10 @@ int arch_cpu_init(void)
 	do {
 		udelay(1);
 		delay--;
-		if (delay == 0)
-			break;
+		if (delay == 0) {
+			printf("Fail to get ack on domain.\n");
+			hang();
+		}
 	} while (readl(PMU_BASE_ADDR + PMU_BUS_IDLE_ACK));
 
 	delay = 1000;
@@ -100,8 +104,10 @@ int arch_cpu_init(void)
 	do {
 		udelay(1);
 		delay--;
-		if (delay == 0)
-			break;
+		if (delay == 0) {
+			printf("Fail to set idle on domain.\n");
+			hang();
+		}
 	} while (readl(PMU_BASE_ADDR + PMU_BUS_IDLE_ST));
 
 	writel(0x303, USB_HOST_PRIORITY_REG);

commit 6cc5f5cc85e42d4816fc46aa361319525e721f8b
Author: Simon Glass <sjg@chromium.org>
Date:   Sat May 18 11:59:54 2019 -0600

    UPSTREAM: spi: Avoid using malloc() in a critical function
    
    In general we should avoid calling malloc() and free() repeatedly in
    U-Boot lest we turn it into tianocore. In SPL this can make SPI flash
    unusable since free() is often a nop and allocation space is limited.
    
    In any case, these seems no need for malloc() since the number of bytes
    is very small, perhaps less than 8.
    
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Fixes: d13f5b254a (spi: Extend the core to ease integration of SPI
            memory controllers)
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit ca2abb75a086d8b0bdb51689f331ba8f1a146379)
    Change-Id: Ia76abf7491780b1984eb81c6c78796bcc0141095

diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c
index b86eee75bc..7aabebeff5 100644
--- a/drivers/spi/spi-mem.c
+++ b/drivers/spi/spi-mem.c
@@ -201,7 +201,6 @@ int spi_mem_exec_op(struct spi_slave *slave, const struct spi_mem_op *op)
 	unsigned int pos = 0;
 	const u8 *tx_buf = NULL;
 	u8 *rx_buf = NULL;
-	u8 *op_buf;
 	int op_len;
 	u32 flag;
 	int ret;
@@ -338,7 +337,17 @@ int spi_mem_exec_op(struct spi_slave *slave, const struct spi_mem_op *op)
 	}
 
 	op_len = sizeof(op->cmd.opcode) + op->addr.nbytes + op->dummy.nbytes;
-	op_buf = calloc(1, op_len);
+
+	/*
+	 * Avoid using malloc() here so that we can use this code in SPL where
+	 * simple malloc may be used. That implementation does not allow free()
+	 * so repeated calls to this code can exhaust the space.
+	 *
+	 * The value of op_len is small, since it does not include the actual
+	 * data being sent, only the op-code and address. In fact, it should be
+	 * possible to just use a small fixed value here instead of op_len.
+	 */
+	u8 op_buf[op_len];
 
 	op_buf[pos++] = op->cmd.opcode;
 
@@ -382,8 +391,6 @@ int spi_mem_exec_op(struct spi_slave *slave, const struct spi_mem_op *op)
 		debug("%02x ", tx_buf ? tx_buf[i] : rx_buf[i]);
 	debug("[ret %d]\n", ret);
 
-	free(op_buf);
-
 	if (ret < 0)
 		return ret;
 #endif /* __UBOOT__ */

commit 3dc0a5efc597d1fd4dde518da781b8314d46f817
Author: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Date:   Tue Mar 26 10:01:24 2019 +0100

    UPSTREAM: spi: spi-mem: Check if exec_op function is set before calling it
    
    Add check if exec_op is set before calling it.
    At the moment it is called unconditionally, which leads to a crash if it
    is not set correctly.
    
    Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 567a3eb7956f98af4ed065499898c6d0ac6443c7)
    Change-Id: Ie9fdf0cbee364fc33965e3234d7457702bd0120f

diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c
index 1bb0987edb..b86eee75bc 100644
--- a/drivers/spi/spi-mem.c
+++ b/drivers/spi/spi-mem.c
@@ -214,7 +214,7 @@ int spi_mem_exec_op(struct spi_slave *slave, const struct spi_mem_op *op)
 	if (ret < 0)
 		return ret;
 
-	if (ops->mem_ops) {
+	if (ops->mem_ops && ops->mem_ops->exec_op) {
 #ifndef __UBOOT__
 		/*
 		 * Flush the message queue before executing our SPI memory

commit cbd9216dad6e8e09917866ba7ee2afa25c30ed34
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue May 19 23:35:42 2020 +0800

    spi: rockchip_sfc: Change SPI Nand dummy cycles as X8bits address
    
    Spetial patch for GD devices cause u-boot SPI Nand MTD bad
    supporting for GD, and the u-boot mainline haven't synchronize
    with Linux.
    
    reference to following Linux commit:
    commit f1541773af49ecd1edae29c8ac0775253a0b0760
    Author: Chuanhong Guo <gch981213@gmail.com>
    Date:   Sat Feb 8 15:43:50 2020 +0800
    
        mtd: spinand: rework detect procedure for different READ_ID operation
    
        Currently there are 3 different variants of read_id implementation:
        1. opcode only. Found in GD5FxGQ4xF.
        2. opcode + 1 addr byte. Found in GD5GxGQ4xA/E
        3. opcode + 1 dummy byte. Found in other currently supported chips.
    
        Original implementation was for variant 1 and let detect function
        of chips with variant 2 and 3 to ignore the first byte. This isn't
        robust:
    
        1. For chips of variant 2, if SPI master doesn't keep MOSI low
        during read, chip will get a random id offset, and the entire id
        buffer will shift by that offset, causing detect failure.
    
        2. For chips of variant 1, if it happens to get a devid that equals
        to manufacture id of variant 2 or 3 chips, it'll get incorrectly
        detected.
    
        This patch reworks detect procedure to address problems above. New
        logic do detection for all variants separatedly, in 1-2-3 order.
        Since all current detect methods do exactly the same id matching
        procedure, unify them into core.c and remove detect method from
        manufacture_ops.
    
    Change-Id: If60d0281eb963486639d5b4ce1939ad2b219c8d6
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/spi/rockchip_sfc.c b/drivers/spi/rockchip_sfc.c
index 453958309e..5af05d064a 100644
--- a/drivers/spi/rockchip_sfc.c
+++ b/drivers/spi/rockchip_sfc.c
@@ -561,7 +561,17 @@ static int rockchip_sfc_xfer(struct udevice *dev, unsigned int bitlen,
 			data_buf = NULL;
 		}
 
-		ret = rockchip_sfc_do_xfer(sfc, data_buf, len);
+		if (sfc->cmd == 0x9f && len == 4) {
+			/* SPI Nand read id */
+			sfc->addr_bits = SFC_ADDR_XBITS;
+			sfc->addr_xbits_ext = 8;
+			sfc->dummy_bits = 0;
+			sfc->addr = 0;
+			((u8 *)data_buf)[0] = 0xff;
+			ret = rockchip_sfc_do_xfer(sfc, &((u8 *)data_buf)[1], 3);
+		} else {
+			ret = rockchip_sfc_do_xfer(sfc, data_buf, len);
+		}
 	}
 
 	return ret;

commit 113ced8fa404a3284c0eb76492b52eba6d82dfa7
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed May 20 13:08:14 2020 +0800

    spi: rockchip_sfc: Remove useless abit setting
    
    Change-Id: I98bdc2eca772eaa5934f2980916438eca2492afd
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/spi/rockchip_sfc.c b/drivers/spi/rockchip_sfc.c
index 2ae5bb9674..453958309e 100644
--- a/drivers/spi/rockchip_sfc.c
+++ b/drivers/spi/rockchip_sfc.c
@@ -265,7 +265,7 @@ static void rockchip_sfc_setup_xfer(struct rockchip_sfc *sfc, u32 trb)
 	    sfc->addr_bits == SFC_ADDR_32BITS)
 		data_width = rockchip_sfc_get_if_type(sfc);
 
-	if (sfc->addr_bits & SFC_ADDR_XBITS)
+	if (sfc->addr_bits == SFC_ADDR_XBITS)
 		writel(sfc->addr_xbits_ext - 1, &regs->abit);
 
 	val |= (data_width << SFC_DATA_WIDTH_SHIFT);

commit c2bb46e4a526f2e968b560da617bc29040eb79b0
Author: shengfei Xu <xsf@rock-chips.com>
Date:   Tue May 19 10:47:38 2020 +0800

    irq: gicv3: Enables Group 1 interrupts for the current Security state
    
    When a CPU enters a low power state, the registers ICC_IGRPEN1_EL1 is lost.
    It need to re-initialise.
    
    Signed-off-by: shengfei Xu <xsf@rock-chips.com>
    Change-Id: I62d9eed2b29190134d95ebd153f21aa764c4ab3b

diff --git a/drivers/irq/irq-gic.c b/drivers/irq/irq-gic.c
index 43a1abcfdc..f8b8a0dc71 100644
--- a/drivers/irq/irq-gic.c
+++ b/drivers/irq/irq-gic.c
@@ -320,6 +320,11 @@ static int gic_irq_resume(void)
 	gicd_writel(gicd_save.ctlr, GICD_CTLR);
 	dsb();
 
+#if defined(CONFIG_GICV3)
+	asm volatile("msr " __stringify(ICC_IGRPEN1_EL1) ", %0" : : "r" (1));
+	dsb();
+#endif
+
 	return 0;
 }
 

commit b4e07918865cbace618372954983cb09bd371740
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue May 12 16:52:21 2020 +0800

    mtd: mtd_blk: Change to use erasesize_shift for calculating
    
    Change-Id: Iba08a6df807db9ca582bc22864f4cc51ac5ca121
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index 1fceb00691..386e104d64 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -47,15 +47,15 @@ int mtd_blk_map_table_init(struct blk_desc *desc,
 	if (!mtd) {
 		return -ENODEV;
 	} else {
-		blk_total = (mtd->size + mtd->erasesize - 1) / mtd->erasesize;
+		blk_total = (mtd->size + mtd->erasesize - 1) >> mtd->erasesize_shift;
 		if (!mtd_map_blk_table) {
 			mtd_map_blk_table = (int *)malloc(blk_total * 4);
 			memset(mtd_map_blk_table, MTD_BLK_TABLE_BLOCK_UNKNOWN,
 			       blk_total * 4);
 		}
 
-		blk_begin = (u32)offset / mtd->erasesize;
-		blk_cnt = ((u32)(offset % mtd->erasesize + length) / mtd->erasesize);
+		blk_begin = (u32)offset >> mtd->erasesize_shift;
+		blk_cnt = ((u32)((offset & mtd->erasesize_mask) + length) >> mtd->erasesize_shift);
 		if ((blk_begin + blk_cnt) > blk_total)
 			blk_cnt = blk_total - blk_begin;
 
@@ -68,7 +68,7 @@ int mtd_blk_map_table_init(struct blk_desc *desc,
 			if (j >= blk_cnt)
 				mtd_map_blk_table[blk_begin + i] = MTD_BLK_TABLE_BLOCK_SHIFT;
 			for (; j < blk_cnt; j++) {
-				if (!mtd_block_isbad(mtd, (blk_begin + j) * mtd->erasesize)) {
+				if (!mtd_block_isbad(mtd, (blk_begin + j) << mtd->erasesize_shift)) {
 					mtd_map_blk_table[blk_begin + i] = blk_begin + j;
 					j++;
 					if (j == blk_cnt)
@@ -103,11 +103,11 @@ static __maybe_unused int mtd_map_read(struct mtd_info *mtd, loff_t offset,
 		mapped_offset = offset;
 		mapped = false;
 		if (mtd_map_blk_table &&
-		    mtd_map_blk_table[(u64)offset / erasesize] !=
+		    mtd_map_blk_table[(u64)offset >> mtd->erasesize_shift] !=
 		    MTD_BLK_TABLE_BLOCK_UNKNOWN)  {
 			mapped = true;
-			mapped_offset = (loff_t)((u32)mtd_map_blk_table[(u64)offset /
-				erasesize] * erasesize + block_offset);
+			mapped_offset = (loff_t)(((u32)mtd_map_blk_table[(u64)offset >>
+				mtd->erasesize_shift] << mtd->erasesize_shift) + block_offset);
 		}
 
 		if (!mapped) {

commit c53a0c58e7d989003cedd190841590e6be3b1a8e
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue May 19 21:22:59 2020 +0800

    rockchip: atags: support parse mtd block dev type
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ie446393b6f96667f37b2050e32a366b7d7265a94

diff --git a/arch/arm/include/asm/arch-rockchip/rk_atags.h b/arch/arm/include/asm/arch-rockchip/rk_atags.h
index 9d8aa8ca9d..4025960129 100644
--- a/arch/arm/include/asm/arch-rockchip/rk_atags.h
+++ b/arch/arm/include/asm/arch-rockchip/rk_atags.h
@@ -41,6 +41,9 @@
 #define BOOT_TYPE_SPI_NOR	(1 << 4)
 #define BOOT_TYPE_SPI_NAND	(1 << 5)
 #define BOOT_TYPE_RAM		(1 << 6)
+#define BOOT_TYPE_MTD_BLK_NAND	(1 << 7)
+#define BOOT_TYPE_MTD_BLK_SPI_NAND	(1 << 8)
+#define BOOT_TYPE_MTD_BLK_SPI_NOR	(1 << 9)
 
 /* define sd card function */
 #define SD_UNKNOWN_CARD		0
diff --git a/arch/arm/mach-rockchip/param.c b/arch/arm/mach-rockchip/param.c
index 5b2ae8ff78..f006609384 100644
--- a/arch/arm/mach-rockchip/param.c
+++ b/arch/arm/mach-rockchip/param.c
@@ -221,6 +221,24 @@ int param_parse_bootdev(char **devtype, char **devnum)
 			*devtype = "ramdisk";
 			*devnum = "0";
 			break;
+#endif
+#ifdef CONFIG_NAND
+		case BOOT_TYPE_MTD_BLK_NAND:
+			*devtype = "mtd";
+			*devnum = "0";
+			break;
+#endif
+#ifdef CONFIG_MTD_SPI_NAND
+		case BOOT_TYPE_MTD_BLK_SPI_NAND:
+			*devtype = "mtd";
+			*devnum = "1";
+			break;
+#endif
+#ifdef CONFIG_SPI_FLASH_MTD
+		case BOOT_TYPE_MTD_BLK_SPI_NOR:
+			*devtype = "mtd";
+			*devnum = "2";
+			break;
 #endif
 		default:
 			printf("Unknown bootdev type: 0x%x\n",
diff --git a/arch/arm/mach-rockchip/rk_atags.c b/arch/arm/mach-rockchip/rk_atags.c
index b3d05abc67..df9b05bdd0 100644
--- a/arch/arm/mach-rockchip/rk_atags.c
+++ b/arch/arm/mach-rockchip/rk_atags.c
@@ -41,7 +41,21 @@ static int spl_bootdev_map[] = {
 	BOOT_TYPE_EMMC,
 	BOOT_TYPE_SD0,
 	BOOT_TYPE_UNKNOWN,
-	BOOT_TYPE_NAND
+	BOOT_TYPE_NAND,
+	BOOT_TYPE_UNKNOWN,
+	BOOT_TYPE_UNKNOWN,
+	BOOT_TYPE_UNKNOWN,
+	BOOT_TYPE_UNKNOWN,
+	BOOT_TYPE_UNKNOWN,
+	BOOT_TYPE_UNKNOWN,
+	BOOT_TYPE_UNKNOWN,
+	BOOT_TYPE_UNKNOWN,
+	BOOT_TYPE_UNKNOWN,
+	BOOT_TYPE_UNKNOWN,
+	BOOT_TYPE_UNKNOWN,
+	BOOT_TYPE_MTD_BLK_NAND,
+	BOOT_TYPE_MTD_BLK_SPI_NAND,
+	BOOT_TYPE_MTD_BLK_SPI_NOR
 };
 #endif
 

commit 1ff581bb9ed8deefd78faf794daf33c28dd896a3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon May 18 16:08:58 2020 +0800

    scripts: fit: refactor code
    
    - update coding style;
    - simply some code logic.
    - remove some unused file.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I0246dcf5aae6bb73771406518fdaf622bfd9bb2b

diff --git a/make.sh b/make.sh
index f22d185e91..d75c8fd94e 100755
--- a/make.sh
+++ b/make.sh
@@ -171,19 +171,10 @@ function process_args()
 				help
 				exit 0
 				;;
-
 			''|loader|trust|uboot|spl*|debug*|itb|env|EXT_DTB=*|nopack|fit*)
 				ARG_SUBCMD=$1
 				shift 1
 				;;
-			--boot_img|--rollback-index-boot|--rollback-index-uboot)
-				ARG_FIT_TOTAL="$ARG_FIT_TOTAL $1 $2 "
-				shift 2
-				;;
-			--spl-new|--no-check)
-				ARG_FIT_TOTAL="$ARG_FIT_TOTAL $1 "
-				shift 1
-				;;
 			map|sym|elf*)
 				ARG_SUBCMD=$1
 				if [ "$2" = "spl" -o "$2" = "tpl" ]; then
@@ -192,8 +183,7 @@ function process_args()
 				fi
 				shift 1
 				;;
-
-			*.ini|*.INI)
+			*.ini)
 				if [ ! -f $1 ]; then
 					echo "ERROR: No $1"
 				fi
@@ -204,11 +194,18 @@ function process_args()
 				fi
 				shift 1
 				;;
-
 			*)
+				# out scripts args
+				NUM=$(./scripts/fit-mkimg.sh --p-check $1)
+				if [ $NUM -ne 0 ]; then
+					[ $NUM -eq 1 ] && ARG_FIT="${ARG_FIT} $1"
+					[ $NUM -eq 2 ] && ARG_FIT="${ARG_FIT} $1 $2"
+					shift ${NUM}
+					continue
 				# FUNC address
-				if [ -z $(echo $1 | sed 's/[0-9,a-f,A-F,x,X,-]//g') ]; then
+				elif [ -z $(echo $1 | sed 's/[0-9,a-f,A-F,x,X,-]//g') ]; then
 					ARG_FUNCADDR=$1
+				# xxx_defconfig
 				else
 					ARG_BOARD=$1
 					if [ ! -f configs/${ARG_BOARD}_defconfig ]; then
@@ -300,7 +297,7 @@ function sub_commands()
 
 		fit)
 			if [ "$opt" = "ns" ]; then
-				./scripts/fit-vboot.sh --no-vboot $ARG_FIT_TOTAL
+				./scripts/fit-mkimg.sh --uboot --boot --no-vboot ${ARG_FIT}
 			fi
 			exit 0
 			;;
@@ -346,7 +343,7 @@ function sub_commands()
 			;;
 
 		--rollback-index*)
-			pack_fit_image $ARG_FIT_TOTAL
+			pack_fit_image ${ARG_FIT}
 			exit 0
 			;;
 
@@ -508,7 +505,7 @@ function select_ini_file()
 
 function handle_args_late()
 {
-	ARG_FIT_TOTAL="$ARG_FIT_TOTAL --ini-trust $INI_TRUST --ini-loader $INI_LOADER"
+	ARG_FIT="${ARG_FIT} --ini-trust $INI_TRUST --ini-loader $INI_LOADER"
 }
 
 function pack_uboot_image()
@@ -729,11 +726,11 @@ function pack_trust_image()
 function pack_fit_image()
 {
 	if grep -q '^CONFIG_FIT_SIGNATURE=y' .config ; then
-		./scripts/fit-vboot.sh $ARG_FIT_TOTAL
+		./scripts/fit-mkimg.sh --uboot --boot ${ARG_FIT}
 	else
 		rm uboot.img trust*.img -rf
-		./scripts/fit-vboot-uboot.sh --no-vboot --no-rebuild $ARG_FIT_TOTAL
-		echo "pack uboot.img (with uboot trust) okay! Input: $INI_TRUST"
+		./scripts/fit-mkimg.sh --uboot --no-vboot --no-rebuild ${ARG_FIT}
+		echo "pack uboot.img okay! Input: $INI_TRUST"
 	fi
 }
 
@@ -745,7 +742,7 @@ function pack_images()
 			pack_trust_image
 			pack_loader_image
 		elif [ "$IMAGE_FORMAT" = "FIT" ]; then
-			pack_fit_image $ARG_ROLLBACK_IDX_UBOOT $ARG_ROLLBACK_IDX_BOOT $ARG_FIT_TOTAL
+			pack_fit_image ${ARG_FIT}
 		fi
 	fi
 }
@@ -787,3 +784,4 @@ clean_files
 make CROSS_COMPILE=${TOOLCHAIN_GCC} ${OPTION} all --jobs=${JOB}
 pack_images
 finish
+
diff --git a/scripts/fit-base.sh b/scripts/fit-base.sh
deleted file mode 100755
index b41ef8ffd8..0000000000
--- a/scripts/fit-base.sh
+++ /dev/null
@@ -1,518 +0,0 @@
-#!/bin/bash
-#
-# Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd
-#
-# SPDX-License-Identifier: GPL-2.0
-#
-set -e
-
-KEY_DIR="keys"
-FIT_DIR="fit"
-FIT_DIR_UNPACK="$FIT_DIR/unpack"
-# offset
-FIT_NS_OFFS_UBOOT="0xa00"
-FIT_NS_OFFS_BOOT="0x800"
-FIT_S_OFFS_UBOOT="0xc00"
-FIT_S_OFFS_BOOT="0xc00"
-# itb
-FIT_ITB_UBOOT="$FIT_DIR/uboot.itb"
-FIT_ITB_BOOT="$FIT_DIR/boot.itb"
-# resign
-FIT_ITB_RESIG="$FIT_DIR/sig-new.itb"
-FIT_ITB_RESIG_BACKUP="$FIT_DIR/sig-backup.itb"
-FIT_SIG_P1="$FIT_DIR/sig.p1"
-FIT_SIG_P2="$FIT_DIR/sig.p2.sig"
-FIT_SIG_P3="$FIT_DIR/sig.p3"
-# data to sign
-FIT_DATA2SIG_UBOOT="$FIT_DIR/uboot.data2sign"
-FIT_DATA2SIG_BOOT="$FIT_DIR/boot.data2sign"
-# unmap
-FIT_UNMAP_ITB_UBOOT="$FIT_DIR/uboot_unmap_itb.its"
-FIT_UNMAP_KEY_UBOOT="$FIT_DIR/uboot_unmap_key.its"
-FIT_UNMAP_ITB_BOOT="$FIT_DIR/boot_unmap_itb.its"
-FIT_UNMAP_KEY_BOOT="$FIT_DIR/boot_unmap_key.its"
-# file
-CHIP_FILE="arch/arm/lib/.asm-offsets.s.cmd"
-# placeholder address
-FIT_FDT_ADDR_PLACEHOLDER="0xffffff00"
-FIT_KERNEL_ADDR_PLACEHOLDER="0xffffff01"
-FIT_RAMDISK_ADDR_PLACEHOLDER="0xffffff02"
-# output
-FIT_IMG_UBOOT="uboot.img"
-FIT_IMG_BOOT="boot.img"
-
-function usage_pack()
-{
-	echo
-	echo "usage:"
-	echo "    $0 [args]"
-	echo
-	echo "args:"
-	if [[ "$0" = *fit-vboot-boot.sh ]]; then
-		echo "    --rollback-index-boot   <decimal integer>"
-	elif [[ "$0" = *fit-vboot-uboot.sh ]]; then
-		echo "    --rollback-index-uboot  <decimal integer>"
-	else
-		echo "    --rollback-index-boot   <decimal integer>"
-		echo "    --rollback-index-uboot  <decimal integer>"
-	fi
-	echo "    --no-vboot"
-	echo "    --no-check"
-	echo "    --spl-new"
-	echo
-}
-
-function arg_check_decimal()
-{
-	if [ -z $1 ]; then
-		echo "ERROR: $1 is not a decimal integer"
-		usage_pack
-		exit 1
-	fi
-
-	decimal=`echo $1 |sed 's/[0-9]//g'`
-	if [ ! -z $decimal ]; then
-		echo "ERROR: $1 is not a decimal integer"
-		usage_pack
-		exit 1
-	fi
-}
-
-function fit_process_args()
-{
-	while [ $# -gt 0 ]; do
-		case $1 in
-			--no-vboot)     # Force to build non-vboot image
-				ARG_NO_VBOOT="y"
-				shift 1
-				;;
-			--no-rebuild)   # No rebuild with "./make.sh"
-				ARG_NO_REBUILD="y"
-				shift 1
-				;;
-			--no-check)     # No hostcc fit signature check
-				ARG_NO_CHECK="y"
-				shift 1
-				;;
-			--ini-trust)    # Assign trust ini file
-				ARG_INI_TRUST=$2
-				shift 2
-				;;
-			--ini-loader)   # Assign loader ini file
-				ARG_INI_LOADER=$2
-				shift 2
-				;;
-			--spl-new)      # Use current build u-boot-spl.bin to pack loader
-				ARG_SPL_NEW="y"
-				shift 1
-				;;
-			--rollback-index-boot)
-				ARG_ROLLBACK_IDX_BOOT=$2
-				arg_check_decimal $2
-				shift 2
-				;;
-			--rollback-index-uboot)
-				ARG_ROLLBACK_IDX_UBOOT=$2
-				arg_check_decimal $2
-				shift 2
-				;;
-			--boot_img)
-				ARGS_EXT_BOOT_IMG=$2
-				shift 2
-				;;
-			*)
-				usage_pack
-				exit 1
-				;;
-		esac
-	done
-}
-
-function its_file_check()
-{
-	cat $1 | while read line
-	do
-		image=`echo $line | sed -n "/incbin/p" | awk -F '"' '{ printf $2 }' | tr -d ' '`
-		if [ ! -f $image ]; then
-			echo "ERROR: No $image"
-			exit 1
-		fi
-	done
-}
-
-function fit_rebuild()
-{
-	if [ "$ARG_NO_REBUILD" != "y" ]; then
-		./make.sh nopack
-	fi
-
-	if [ -d $FIT_DIR ]; then
-		rm $FIT_DIR -rf
-	fi
-
-	mkdir -p $FIT_DIR
-	mkdir -p $FIT_DIR_UNPACK
-}
-
-function fit_uboot_make_itb()
-{
-	./make.sh itb $ARG_INI_TRUST
-	its_file_check u-boot.its
-
-	# output uboot.itb
-	if [ "$ARG_NO_VBOOT" = "y" ]; then
-		SIGN_MSG="no-signed"
-		./tools/mkimage -f u-boot.its -E -p $FIT_NS_OFFS_UBOOT $FIT_ITB_UBOOT
-		if [ "$ARG_SPL_NEW" = "y" ]; then
-			./make.sh spl-s $ARG_INI_LOADER
-			echo "pack loader with: spl/u-boot-spl.bin"
-		else
-			./make.sh loader $ARG_INI_LOADER
-		fi
-	else
-		SIGN_MSG="signed"
-		if [ ! -f $KEY_DIR/dev.key ]; then
-			echo "ERROR: No $KEY_DIR/dev.key"
-			exit 1
-		elif [ ! -f $KEY_DIR/dev.crt ]; then
-			echo "ERROR: No $KEY_DIR/dev.crt"
-			exit 1
-		fi
-
-		if ! grep  -q '^CONFIG_SPL_FIT_SIGNATURE=y' .config ; then
-			echo "ERROR: CONFIG_SPL_FIT_SIGNATURE is disabled"
-			exit 1
-		fi
-
-		if grep -q '^CONFIG_SPL_FIT_ROLLBACK_PROTECT=y' .config ; then
-			SPL_ROLLBACK_PROTECT="y"
-			if [ -z $ARG_ROLLBACK_IDX_UBOOT ]; then
-				echo "ERROR: No args \"--rollback-index-uboot <n>\""
-				exit 1
-			fi
-		fi
-
-		if [ "$SPL_ROLLBACK_PROTECT" = "y" ]; then
-			version=`grep 'rollback-index' u-boot.its | awk -F '=' '{ printf $2 }' `
-			sed -i "s/$version/ <$ARG_ROLLBACK_IDX_UBOOT>;/g" u-boot.its
-		fi
-
-		# We need a u-boot.dtb with RSA pub-key insert
-		if ! fdtget -l u-boot.dtb /signature >/dev/null 2>&1 ; then
-			./tools/mkimage -f u-boot.its -k $KEY_DIR/ -K u-boot.dtb -E -p $FIT_S_OFFS_UBOOT -r $FIT_ITB_UBOOT
-			echo "Insert RSA pub into u-boot.dtb"
-		fi
-
-		# Pack
-		./tools/mkimage -f u-boot.its -k $KEY_DIR/ -K spl/u-boot-spl.dtb -E -p $FIT_S_OFFS_UBOOT -r $FIT_ITB_UBOOT
-		mv data2sign.bin $FIT_DATA2SIG_UBOOT
-
-		# rollback-index read back check
-		if [ "$SPL_ROLLBACK_PROTECT" = "y" ]; then
-			ROLLBACK_IDX_UBOOT=`fdtget -ti $FIT_ITB_UBOOT /configurations/conf@1 rollback-index`
-			if [ "$ROLLBACK_IDX_UBOOT" != "$ARG_ROLLBACK_IDX_UBOOT" ]; then
-				echo "ERROR: Failed to set rollback-index for $FIT_ITB_UBOOT";
-				exit 1
-			fi
-		fi
-
-		if [ "$ARG_NO_CHECK" != "y" ]; then
-			if [ "$ARG_SPL_NEW" = "y" ]; then
-				./tools/fit_check_sign -f $FIT_ITB_UBOOT -k spl/u-boot-spl.dtb -s
-			else
-				# unpack legacy u-boot-spl.dtb
-				spl_file="../rkbin/"`sed -n "/FlashBoot=/s/FlashBoot=//p" $ARG_INI_LOADER |tr -d '\r'`
-				offs=`fdtdump -s $spl_file | head -1 | awk -F ":" '{ print $2 }' | sed "s/ found fdt at offset //g" | tr -d " "`
-				if [ -z $offs ]; then
-					echo "ERROR: invalid $spl_file, unable to find fdt blob"
-				fi
-				offs=`printf %d $offs` # hex -> dec
-				dd if=$spl_file of=spl/u-boot-spl-legacy.dtb bs=$offs skip=1  >/dev/null 2>&1
-
-				# check
-				./tools/fit_check_sign -f $FIT_ITB_UBOOT -k spl/u-boot-spl-legacy.dtb -s
-			fi
-		fi
-
-		# minimize spl dtb
-		if grep  -q '^CONFIG_SPL_FIT_HW_CRYPTO=y' .config ; then
-			fdtput -tx spl/u-boot-spl.dtb /signature/key-dev rsa,r-squared 0x0
-			if grep  -q '^CONFIG_SPL_ROCKCHIP_CRYPTO_V1=y' .config ; then
-				fdtput -tx spl/u-boot-spl.dtb /signature/key-dev rsa,np 0x0
-			else
-				fdtput -tx spl/u-boot-spl.dtb /signature/key-dev rsa,c 0x0
-			fi
-		else
-			fdtput -tx spl/u-boot-spl.dtb /signature/key-dev rsa,c 0x0
-			fdtput -tx spl/u-boot-spl.dtb /signature/key-dev rsa,np 0x0
-			fdtput -tx spl/u-boot-spl.dtb /signature/key-dev rsa,exponent-BN 0x0
-		fi
-
-		# repack spl which has rsa pub-key insert
-		rm *_loader_*.bin -rf
-		if [ "$ARG_SPL_NEW" = "y" ]; then
-			cat spl/u-boot-spl-nodtb.bin > spl/u-boot-spl.bin
-			if ! grep  -q '^CONFIG_SPL_SEPARATE_BSS=y' .config ; then
-				cat spl/u-boot-spl-pad.bin >> spl/u-boot-spl.bin
-			fi
-			cat spl/u-boot-spl.dtb >> spl/u-boot-spl.bin
-
-			./make.sh spl-s $ARG_INI_LOADER
-			echo "pack loader with: spl/u-boot-spl.bin"
-		else
-			./make.sh loader $ARG_INI_LOADER
-		fi
-	fi
-
-	# clean
-	mv u-boot.its $FIT_DIR
-	cp tee.bin $FIT_DIR
-	cp u-boot-nodtb.bin $FIT_DIR
-	cp u-boot.dtb $FIT_DIR
-	cp spl/u-boot-spl.bin $FIT_DIR
-	cp spl/u-boot-spl.dtb $FIT_DIR
-	rm u-boot.itb u-boot.img u-boot-dtb.img -rf
-	./scripts/dtc/dtc -I dtb -O dts $FIT_ITB_UBOOT -o $FIT_UNMAP_ITB_UBOOT >/dev/null 2>&1
-	./scripts/dtc/dtc -I dtb -O dts spl/u-boot-spl.dtb -o $FIT_UNMAP_KEY_UBOOT >/dev/null 2>&1
-}
-
-function fit_boot_make_itb()
-{
-	if [ ! -z $ARGS_EXT_BOOT_IMG ]; then
-		./scripts/fit-unpack.sh -f $ARGS_EXT_BOOT_IMG -o $FIT_DIR/unpack
-		FIT_ITS_BOOT="$FIT_DIR/unpack/image.its"
-	else
-		FIT_ITS_BOOT="kernel_arm.its"
-		cp arch/arm/mach-rockchip/$FIT_ITS_BOOT ./
-		its_file_check $FIT_ITS_BOOT
-	fi
-
-	# output boot.itb
-	if [ "$ARG_NO_VBOOT" = "y" ]; then
-		SIGN_MSG="no-signed"
-		./tools/mkimage -f $FIT_ITS_BOOT -E -p $FIT_NS_OFFS_BOOT $FIT_ITB_BOOT
-	else
-		SIGN_MSG="signed"
-
-		if [ ! -f $KEY_DIR/dev.key ]; then
-			echo "ERROR: No $KEY_DIR/dev.key"
-			exit 1
-		elif [ ! -f $KEY_DIR/dev.crt ]; then
-			echo "ERROR: No $KEY_DIR/dev.crt"
-			exit 1
-		fi
-
-		if ! grep -q '^CONFIG_FIT_SIGNATURE=y' .config ; then
-			echo "ERROR: CONFIG_FIT_SIGNATURE is disabled"
-			exit 1
-		fi
-
-		if grep -q '^CONFIG_FIT_ROLLBACK_PROTECT=y' .config ; then
-			ROLLBACK_PROTECT="y"
-			if [ -z $ARG_ROLLBACK_IDX_BOOT ]; then
-				echo "ERROR: No args \"--rollback-index-boot <n>\""
-				exit 1
-			fi
-		fi
-
-		# fixup entry and load address
-		COMM_FILE=`sed -n "/_common.h/p" $CHIP_FILE | awk '{ print $1 }'`
-		FDT_ADDR_R=`awk /fdt_addr_r/            $COMM_FILE | awk -F '=' '{ print $2 }' | awk -F '\\' '{ print $1 }'`
-		KERNEL_ADDR_R=`awk /kernel_addr_r/      $COMM_FILE | awk -F '=' '{ print $2 }' | awk -F '\\' '{ print $1 }'`
-		RMADISK_ADDR_R=`awk /ramdisk_addr_r/    $COMM_FILE | awk -F '=' '{ print $2 }' | awk -F '\\' '{ print $1 }'`
-		sed -i "s/$FIT_FDT_ADDR_PLACEHOLDER/$FDT_ADDR_R/g"         $FIT_ITS_BOOT
-		sed -i "s/$FIT_KERNEL_ADDR_PLACEHOLDER/$KERNEL_ADDR_R/g"   $FIT_ITS_BOOT
-		sed -i "s/$FIT_RAMDISK_ADDR_PLACEHOLDER/$RMADISK_ADDR_R/g" $FIT_ITS_BOOT
-
-		if grep -q '^CONFIG_ARM64=y' .config ; then
-			sed -i 's/arch = "arm";/arch = "arm64";/g' $FIT_ITS_BOOT
-		fi
-
-		if [ "$ROLLBACK_PROTECT" = "y" ]; then
-			version=`grep 'rollback-index' $FIT_ITS_BOOT | awk -F '=' '{ printf $2 }' `
-			sed -i "s/$version/ <$ARG_ROLLBACK_IDX_BOOT>;/g" $FIT_ITS_BOOT
-		fi
-
-		./tools/mkimage -f $FIT_ITS_BOOT -k $KEY_DIR/ -K u-boot.dtb -E -p $FIT_S_OFFS_BOOT -r $FIT_ITB_BOOT
-		mv data2sign.bin $FIT_DATA2SIG_BOOT
-
-		# rollback-index read back check
-		if [ "$ROLLBACK_PROTECT" = "y" ]; then
-			ROLLBACK_IDX_BOOT=`fdtget -ti $FIT_ITB_BOOT /configurations/conf@1 rollback-index`
-			if [ "$ROLLBACK_IDX_BOOT" != "$ARG_ROLLBACK_IDX_BOOT" ]; then
-				echo "ERROR: Failed to set rollback-index for $FIT_ITB_BOOT";
-				exit 1
-			fi
-		fi
-
-		if [ "$ARG_NO_CHECK" != "y" ]; then
-			./tools/fit_check_sign -f $FIT_ITB_BOOT -k u-boot.dtb
-		fi
-
-		# minimize u-boot dtb
-		if grep  -q '^CONFIG_FIT_HW_CRYPTO=y' .config ; then
-			fdtput -tx u-boot.dtb /signature/key-dev rsa,r-squared 0x0
-			if grep  -q '^CONFIG_ROCKCHIP_CRYPTO_V1=y' .config ; then
-				fdtput -tx u-boot.dtb /signature/key-dev rsa,np 0x0
-			else
-				fdtput -tx u-boot.dtb /signature/key-dev rsa,c 0x0
-			fi
-		else
-			fdtput -tx u-boot.dtb /signature/key-dev rsa,c 0x0
-			fdtput -tx u-boot.dtb /signature/key-dev rsa,np 0x0
-			fdtput -tx u-boot.dtb /signature/key-dev rsa,exponent-BN 0x0
-		fi
-	fi
-
-	# clean
-	mv $FIT_ITS_BOOT $FIT_DIR
-	./scripts/dtc/dtc -I dtb -O dts $FIT_ITB_BOOT -o $FIT_UNMAP_ITB_BOOT >/dev/null 2>&1
-	./scripts/dtc/dtc -I dtb -O dts u-boot.dtb    -o $FIT_UNMAP_KEY_BOOT >/dev/null 2>&1
-}
-
-function fit_uboot_make_img()
-{
-	ITB_FILE=$1
-
-	if [ -z $ITB_FILE ]; then
-		ITB_FILE=$FIT_ITB_UBOOT
-	fi
-
-	ITB_MAX_NUM=`sed -n "/SPL_FIT_IMAGE_MULTIPLE/p" .config | awk -F "=" '{ print $2 }'`
-	ITB_MAX_KB=`sed  -n "/SPL_FIT_IMAGE_KB/p" .config | awk -F "=" '{ print $2 }'`
-	ITB_MAX_BS=$((ITB_MAX_KB*1024))
-	FIT_MAX_BS=$((ITB_MAX_BS*ITB_MAX_NUM))
-	THIS_BS=`ls -l $ITB_FILE | awk '{print $5}'`
-
-	if [ $THIS_BS -eq $FIT_MAX_BS ]; then
-		echo
-		echo "ERROR: $ITB_FILE is too big, maybe it's not a .itb ?"
-		exit 1
-	elif [ $THIS_BS -gt $ITB_MAX_BS ]; then
-		echo
-		echo "ERROR: pack $FIT_IMG_UBOOT failed! $ITB_FILE actual: $THIS_BS bytes, max limit: $ITB_MAX_BS bytes"
-		exit 1
-	fi
-
-	# multiple backup
-	rm $FIT_IMG_UBOOT -rf
-	for ((i = 0; i < $ITB_MAX_NUM; i++));
-	do
-		cat $ITB_FILE >> $FIT_IMG_UBOOT
-		truncate -s %${ITB_MAX_KB}K $FIT_IMG_UBOOT
-	done
-}
-
-function fit_boot_make_img()
-{
-	ITB_FILE=$1
-
-	if [ -z $ITB_FILE ]; then
-		ITB_FILE=$FIT_ITB_BOOT
-	fi
-
-	if [ "$ITB_FILE" != "$FIT_IMG_BOOT" ]; then
-		cp $ITB_FILE $FIT_IMG_BOOT -f
-	fi
-}
-
-function usage_resign()
-{
-	echo
-	echo "usage:"
-	echo "    $0 -f [itb_image] -s [sig]"
-	echo
-}
-
-function fit_resign()
-{
-	if [ $# -ne 4 ]; then
-		usage_resign
-		exit 1
-	fi
-
-	while [ $# -gt 0 ]; do
-		case $1 in
-			-f)
-				FIT_ITB=$2
-				shift 2
-				;;
-			-s)
-				FIT_SIG=$2
-				shift 2
-				;;
-			*)
-				usage_resign
-				exit 1
-				;;
-		esac
-	done
-
-	# check
-	if [ ! -f $FIT_ITB ]; then
-		echo "ERROR: No $FIT_ITB"
-		exit 1
-	elif [ ! -f $FIT_SIG ]; then
-		echo "ERROR: No $FIT_SIG"
-		exit 1
-	fi
-
-	# confirm location
-	SIG_SZ=`ls -l ${FIT_SIG} | awk '{ print $5 }'`
-	LEN=`./tools/fit_info -f $FIT_ITB -n /configurations/conf@1/signature@1 -p value | sed -n "/LEN:/p" | awk '{ print $2 }'`
-	OFF=`./tools/fit_info -f $FIT_ITB -n /configurations/conf@1/signature@1 -p value | sed -n "/OFF:/p" | awk '{ print $2 }'`
-	END=`./tools/fit_info -f $FIT_ITB -n /configurations/conf@1/signature@1 -p value | sed -n "/END:/p" | awk '{ print $2 }'`
-
-	if [ -z $LEN ]; then
-		echo "ERROR: No valid signature in $FIT_ITB"
-		exit 1
-	elif [ "$SIG_SZ" -ne "$LEN" ]; then
-		echo "ERROR: $FIT_SIG size $SIG_SZ != $FIT_ITB Signature size $LEN"
-		exit 1
-	fi
-
-	# backup
-	cp $FIT_ITB  $FIT_ITB_RESIG_BACKUP
-	cp $FIT_SIG  $FIT_SIG_P2
-
-	# generate .itb
-	dd if=$FIT_ITB of=$FIT_SIG_P1 count=1 bs=$OFF
-	dd if=$FIT_ITB of=$FIT_SIG_P3 skip=1 ibs=$END
-	cat $FIT_SIG_P1  >  $FIT_ITB
-	cat $FIT_SIG     >> $FIT_ITB
-	cat $FIT_SIG_P3  >> $FIT_ITB
-
-	# generate
-	echo
-	if fdtget -l $FIT_ITB /images/uboot@1 >/dev/null 2>&1 ; then
-		fit_uboot_make_img  $FIT_ITB
-		echo "Image(re-signed):  $FIT_IMG_UBOOT is ready"
-	else
-		fit_boot_make_img $FIT_ITB
-		echo "Image(re-signed):  $FIT_IMG_BOOT is ready"
-	fi
-}
-
-function fit_verbose_uboot()
-{
-	if [ "$SPL_ROLLBACK_PROTECT" = "y" ]; then
-		echo "Image($SIGN_MSG, rollback-index=$ROLLBACK_IDX_UBOOT):  $FIT_IMG_UBOOT (with uboot trust) is ready"
-	else
-		echo "Image($SIGN_MSG):  $FIT_IMG_UBOOT (with uboot trust) is ready"
-	fi
-}
-
-function fit_verbose_boot()
-{
-	if [ "$ROLLBACK_PROTECT" = "y" ]; then
-		echo "Image($SIGN_MSG, rollback-index=$ROLLBACK_IDX_BOOT):  $FIT_IMG_BOOT (with kernel dtb ramdisk resource) is ready"
-	else
-		echo "Image($SIGN_MSG):  $FIT_IMG_BOOT (with kernel dtb ramdisk resource) is ready"
-	fi
-}
-
-function fit_verbose_loader()
-{
-	LOADER=`ls *loader*.bin`
-	echo "Image(no-signed):  $LOADER (with spl, ddr, usbplug) is ready"
-}
diff --git a/scripts/fit-mkimg.sh b/scripts/fit-mkimg.sh
new file mode 100755
index 0000000000..9618dcf993
--- /dev/null
+++ b/scripts/fit-mkimg.sh
@@ -0,0 +1,493 @@
+#!/bin/bash
+#
+# Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier: GPL-2.0
+#
+set -e
+
+FIT_DIR="fit"
+IMG_UBOOT="uboot.img"
+IMG_BOOT="boot.img"
+ITB_UBOOT="${FIT_DIR}/uboot.itb"
+ITB_BOOT="${FIT_DIR}/boot.itb"
+SIG_UBOOT="${FIT_DIR}/uboot.data2sign"
+SIG_BOOT="${FIT_DIR}/boot.data2sign"
+# offs
+OFFS_NS_UBOOT="0xa00"
+OFFS_S_UBOOT="0xc00"
+OFFS_NS_BOOT="0x800"
+OFFS_S_BOOT="0xc00"
+# file
+CHIP_FILE="arch/arm/lib/.asm-offsets.s.cmd"
+# placeholder address
+FDT_ADDR_PLACEHOLDER="0xffffff00"
+KERNEL_ADDR_PLACEHOLDER="0xffffff01"
+RAMDISK_ADDR_PLACEHOLDER="0xffffff02"
+# tools
+MKIMAGE="./tools/mkimage"
+FIT_UNPACK="./scripts/fit-unpack.sh"
+CHECK_SIGN="./tools/fit_check_sign"
+# key
+KEY_DIR="keys/"
+RSA_PRI_KEY="keys/dev.key"
+RSA_PUB_KEY="keys/dev.crt"
+SIGNATURE_KEY_NODE="/signature/key-dev"
+SPL_DTB="spl/u-boot-spl.dtb"
+UBOOT_DTB="u-boot.dtb"
+# its
+ITS_UBOOT="u-boot.its"
+
+function help()
+{
+	echo
+	echo "usage:"
+	echo "    $0 [args]"
+	echo
+	echo "args:"
+	echo "    --rollback-index-boot   <decimal integer>"
+	echo "    --rollback-index-uboot  <decimal integer>"
+	echo "    --ini-trust"
+	echo "    --ini-loader"
+	echo "    --no-vboot"
+	echo "    --no-check"
+	echo "    --no-rebuild"
+	echo "    --spl-new"
+	echo "    --uboot"
+	echo "    --boot"
+	echo "    --boot_img"
+	echo "    --p-check"
+	echo
+}
+
+function arg_check_decimal()
+{
+	if [ -z $1 ]; then
+		help
+		exit 1
+	fi
+
+	decimal=`echo $1 |sed 's/[0-9]//g'`
+	if [ ! -z ${decimal} ]; then
+		echo "ERROR: $1 is not decimal integer"
+		help
+		exit 1
+	fi
+}
+
+function check_its()
+{
+	cat $1 | while read line
+	do
+		file=`echo ${line} | sed -n "/incbin/p" | awk -F '"' '{ printf $2 }' | tr -d ' '`
+		if [ ! -f ${file} ]; then
+			echo "ERROR: No ${file}"
+			exit 1
+		fi
+	done
+}
+
+function validate_arg()
+{
+	case $1 in
+		--uboot|--boot|--no-vboot|--no-rebuild|--no-check|--spl-new)
+			shift=1
+			;;
+		--ini-trust|--ini-loader|--rollback-index-boot|--rollback-index-uboot|--boot_img)
+			shift=2
+			;;
+		*)
+			shift=0
+			;;
+	esac
+	echo ${shift}
+}
+
+function fit_process_args()
+{
+	if [ $# -eq 0 ]; then
+		help
+		exit 0
+	fi
+
+	while [ $# -gt 0 ]; do
+		case $1 in
+			--p-check)
+				ARG_VALIDATE=$2
+				shift 2
+				;;
+			--uboot)
+				ARG_PACK_UBOOT="y"
+				shift 1
+				;;
+			--boot)
+				ARG_PACK_BOOT="y"
+				shift 1
+				;;
+			--no-vboot)     # Force to build non-vboot image
+				ARG_NO_VBOOT="y"
+				shift 1
+				;;
+			--no-rebuild)   # No rebuild with "./make.sh"
+				ARG_NO_REBUILD="y"
+				shift 1
+				;;
+			--no-check)     # No hostcc fit signature check
+				ARG_NO_CHECK="y"
+				shift 1
+				;;
+			--ini-trust)    # Assign trust ini file
+				ARG_INI_TRUST=$2
+				shift 2
+				;;
+			--ini-loader)   # Assign loader ini file
+				ARG_INI_LOADER=$2
+				shift 2
+				;;
+			--spl-new)      # Use current build u-boot-spl.bin to pack loader
+				ARG_SPL_NEW="y"
+				shift 1
+				;;
+			--rollback-index-boot)
+				ARG_ROLLBACK_IDX_BOOT=$2
+				arg_check_decimal $2
+				shift 2
+				;;
+			--rollback-index-uboot)
+				ARG_ROLLBACK_IDX_UBOOT=$2
+				arg_check_decimal $2
+				shift 2
+				;;
+			--boot_img)     # external boot.img
+				ARG_EXT_BOOT=$2
+				shift 2
+				;;
+			*)
+				help
+				exit 1
+				;;
+		esac
+	done
+}
+
+function fit_rebuild()
+{
+	if [ "${ARG_NO_REBUILD}" != "y" ]; then
+		./make.sh nopack # Always no pack
+	fi
+
+	rm ${FIT_DIR} -rf
+	mkdir -p ${FIT_DIR}
+}
+
+function fit_gen_uboot_itb()
+{
+	./make.sh itb ${ARG_INI_TRUST}
+	check_its ${ITS_UBOOT}
+
+	if [ "${ARG_NO_VBOOT}" == "y" ]; then
+		${MKIMAGE} -f ${ITS_UBOOT} -E -p ${OFFS_NS_UBOOT} ${ITB_UBOOT}
+		if [ "${ARG_SPL_NEW}" == "y" ]; then
+			./make.sh spl-s ${ARG_INI_LOADER}
+			echo "pack loader with new: spl/u-boot-spl.bin"
+		else
+			./make.sh loader ${ARG_INI_LOADER}
+		fi
+	else
+		if [ ! -f ${RSA_PRI_KEY} ]; then
+			echo "ERROR: No ${RSA_PRI_KEY} "
+			exit 1
+		elif [ ! -f ${RSA_PUB_KEY} ]; then
+			echo "ERROR: No ${RSA_PUB_KEY} "
+			exit 1
+		fi
+
+		if ! grep -q '^CONFIG_SPL_FIT_SIGNATURE=y' .config ; then
+			echo "ERROR: CONFIG_SPL_FIT_SIGNATURE is disabled"
+			exit 1
+		fi
+
+		if grep -q '^CONFIG_SPL_FIT_ROLLBACK_PROTECT=y' .config ; then
+			ARG_SPL_ROLLBACK_PROTECT="y"
+			if [ -z ${ARG_ROLLBACK_IDX_UBOOT} ]; then
+				echo "ERROR: No arg \"--rollback-index-uboot <n>\""
+				exit 1
+			fi
+		fi
+
+		if [ "${ARG_SPL_ROLLBACK_PROTECT}" == "y" ]; then
+			VERSION=`grep 'rollback-index' ${ITS_UBOOT} | awk -F '=' '{ printf $2 }' `
+			sed -i "s/${VERSION}/ <${ARG_ROLLBACK_IDX_UBOOT}>;/g" ${ITS_UBOOT}
+		fi
+
+		# u-boot.dtb must contains rsa key
+		if ! fdtget -l ${UBOOT_DTB} /signature >/dev/null 2>&1 ; then
+			${MKIMAGE} -f ${ITS_UBOOT} -k ${KEY_DIR} -K ${UBOOT_DTB} -E -p ${OFFS_S_UBOOT} -r ${ITB_UBOOT}
+			echo "Adding RSA public key into ${UBOOT_DTB}"
+		fi
+
+		# Pack
+		${MKIMAGE} -f ${ITS_UBOOT} -k ${KEY_DIR} -K ${SPL_DTB} -E -p ${OFFS_S_UBOOT} -r ${ITB_UBOOT}
+		mv data2sign.bin ${SIG_UBOOT}
+
+		# rollback-index read back check
+		if [ "${ARG_SPL_ROLLBACK_PROTECT}" == "y" ]; then
+			VERSION=`fdtget -ti ${ITB_UBOOT} /configurations/conf rollback-index`
+			if [ "${VERSION}" != "${ARG_ROLLBACK_IDX_UBOOT}" ]; then
+				echo "ERROR: Failed to set rollback-index for ${ITB_UBOOT}";
+				exit 1
+			fi
+		fi
+
+		# host check signature
+		if [ "${ARG_NO_CHECK}" != "y" ]; then
+			if [ "${ARG_SPL_NEW}" == "y" ]; then
+				 ${CHECK_SIGN} -f ${ITB_UBOOT} -k ${SPL_DTB} -s
+			else
+				spl_file="../rkbin/"`sed -n "/FlashBoot=/s/FlashBoot=//p" ${ARG_INI_LOADER}  |tr -d '\r'`
+				offs=`fdtdump -s ${spl_file} | head -1 | awk -F ":" '{ print $2 }' | sed "s/ found fdt at offset //g" | tr -d " "`
+				if [ -z ${offs}  ]; then
+					echo "ERROR: invalid ${spl_file} , unable to find fdt blob"
+				fi
+				offs=`printf %d ${offs} ` # hex -> dec
+				dd if=${spl_file} of=spl/u-boot-spl-old.dtb bs=${offs} skip=1 >/dev/null 2>&1
+				${CHECK_SIGN} -f ${ITB_UBOOT} -k spl/u-boot-spl-old.dtb -s
+			fi
+		fi
+
+		# minimize u-boot-spl.dtb
+		if grep -q '^CONFIG_SPL_FIT_HW_CRYPTO=y' .config ; then
+			fdtput -tx ${SPL_DTB} ${SIGNATURE_KEY_NODE} rsa,r-squared 0x0
+			if grep -q '^CONFIG_SPL_ROCKCHIP_CRYPTO_V1=y' .config ; then
+				fdtput -tx ${SPL_DTB} ${SIGNATURE_KEY_NODE} rsa,np 0x0
+			else
+				fdtput -tx ${SPL_DTB} ${SIGNATURE_KEY_NODE} rsa,c 0x0
+			fi
+		else
+			fdtput -tx ${SPL_DTB} ${SIGNATURE_KEY_NODE} rsa,c 0x0
+			fdtput -tx ${SPL_DTB} ${SIGNATURE_KEY_NODE} rsa,np 0x0
+			fdtput -tx ${SPL_DTB} ${SIGNATURE_KEY_NODE} rsa,exponent-BN 0x0
+		fi
+
+		# repack spl
+		rm -f *_loader_*.bin
+		if [ "${ARG_SPL_NEW}" == "y" ]; then
+			cat spl/u-boot-spl-nodtb.bin > spl/u-boot-spl.bin
+			if ! grep -q '^CONFIG_SPL_SEPARATE_BSS=y' .config ; then
+				cat spl/u-boot-spl-pad.bin >> spl/u-boot-spl.bin
+			fi
+			cat ${SPL_DTB} >> spl/u-boot-spl.bin
+
+			./make.sh spl-s ${ARG_INI_LOADER}
+			echo "pack loader with new: spl/u-boot-spl.bin"
+		else
+			./make.sh loader ${ARG_INI_LOADER}
+		fi
+	fi
+
+	rm -f u-boot.itb u-boot.img u-boot-dtb.img
+}
+
+function fit_gen_boot_itb()
+{
+	if [ ! -z ${ARG_EXT_BOOT} ]; then
+		${FIT_UNPACK} -f ${ARG_EXT_BOOT} -o ${FIT_DIR}/unpack
+		ITS_BOOT="${FIT_DIR}/unpack/image.its"
+	else
+		ITS_BOOT="kernel_arm.its"
+		cp arch/arm/mach-rockchip/${ITS_BOOT} ./
+		check_its ${ITS_BOOT}
+	fi
+
+	if [ "${ARG_NO_VBOOT}" == "y" ]; then
+		${MKIMAGE} -f ${ITS_BOOT} -E -p ${OFFS_NS_BOOT} ${ITB_BOOT}
+	else
+		if [ ! -f ${RSA_PRI_KEY}  ]; then
+			echo "ERROR: No ${RSA_PRI_KEY}"
+			exit 1
+		elif [ ! -f ${RSA_PUB_KEY}  ]; then
+			echo "ERROR: No ${RSA_PUB_KEY}"
+			exit 1
+		fi
+
+		if ! grep -q '^CONFIG_FIT_SIGNATURE=y' .config ; then
+			echo "ERROR: CONFIG_FIT_SIGNATURE is disabled"
+			exit 1
+		fi
+
+		if grep -q '^CONFIG_FIT_ROLLBACK_PROTECT=y' .config ; then
+			ARG_ROLLBACK_PROTECT="y"
+			if [ -z ${ARG_ROLLBACK_IDX_BOOT} ]; then
+				echo "ERROR: No arg \"--rollback-index-boot <n>\""
+				exit 1
+			fi
+		fi
+
+		# fixup
+		COMMON_FILE=`sed -n "/_common.h/p" ${CHIP_FILE} | awk '{ print $1 }'`
+		FDT_ADDR_R=`awk /fdt_addr_r/         ${COMMON_FILE} | awk -F '=' '{ print $2 }' | awk -F '\\' '{ print $1 }'`
+		KERNEL_ADDR_R=`awk /kernel_addr_r/   ${COMMON_FILE} | awk -F '=' '{ print $2 }' | awk -F '\\' '{ print $1 }'`
+		RMADISK_ADDR_R=`awk /ramdisk_addr_r/ ${COMMON_FILE} | awk -F '=' '{ print $2 }' | awk -F '\\' '{ print $1 }'`
+		sed -i "s/${FDT_ADDR_PLACEHOLDER}/${FDT_ADDR_R}/g"         ${ITS_BOOT}
+		sed -i "s/${KERNEL_ADDR_PLACEHOLDER}/${KERNEL_ADDR_R}/g"   ${ITS_BOOT}
+		sed -i "s/${RAMDISK_ADDR_PLACEHOLDER}/${RMADISK_ADDR_R}/g" ${ITS_BOOT}
+		if grep -q '^CONFIG_ARM64=y' .config ; then
+			sed -i 's/arch = "arm";/arch = "arm64";/g' ${ITS_BOOT}
+		fi
+
+		if [ "${ARG_ROLLBACK_PROTECT}" == "y" ]; then
+			VERSION=`grep 'rollback-index' ${ITS_BOOT} | awk -F '=' '{ printf $2 }' `
+			sed -i "s/${VERSION}/ <${ARG_ROLLBACK_IDX_BOOT}>;/g" ${ITS_BOOT}
+		fi
+
+		${MKIMAGE} -f ${ITS_BOOT} -k ${KEY_DIR} -K ${UBOOT_DTB} -E -p ${OFFS_S_BOOT} -r ${ITB_BOOT}
+		mv data2sign.bin ${SIG_BOOT}
+
+		# rollback-index read back check
+		if [ "${ARG_ROLLBACK_PROTECT}" == "y" ]; then
+			VERSION=`fdtget -ti ${ITB_BOOT} /configurations/conf rollback-index`
+			if [ "${VERSION}" != "${ARG_ROLLBACK_IDX_BOOT}" ]; then
+				echo "ERROR: Failed to set rollback-index for ${ITB_BOOT}";
+				exit 1
+			fi
+		fi
+
+		if [ "${ARG_NO_CHECK}" != "y" ]; then
+			 ${CHECK_SIGN} -f ${ITB_BOOT} -k ${UBOOT_DTB}
+		fi
+
+		# minimize u-boot.dtb
+		if grep -q '^CONFIG_FIT_HW_CRYPTO=y' .config ; then
+			fdtput -tx ${UBOOT_DTB} ${SIGNATURE_KEY_NODE} rsa,r-squared 0x0
+			if grep -q '^CONFIG_ROCKCHIP_CRYPTO_V1=y' .config ; then
+				fdtput -tx ${UBOOT_DTB} ${SIGNATURE_KEY_NODE} rsa,np 0x0
+			else
+				fdtput -tx ${UBOOT_DTB} ${SIGNATURE_KEY_NODE} rsa,c 0x0
+			fi
+		else
+			fdtput -tx ${UBOOT_DTB} ${SIGNATURE_KEY_NODE} rsa,c 0x0
+			fdtput -tx ${UBOOT_DTB} ${SIGNATURE_KEY_NODE} rsa,np 0x0
+			fdtput -tx ${UBOOT_DTB} ${SIGNATURE_KEY_NODE} rsa,exponent-BN 0x0
+		fi
+	fi
+}
+
+function fit_gen_uboot_img()
+{
+	ITB=$1
+
+	if [ -z ${ITB} ]; then
+		ITB=${ITB_UBOOT}
+	fi
+
+	ITB_MAX_NUM=`sed -n "/SPL_FIT_IMAGE_MULTIPLE/p" .config | awk -F "=" '{ print $2 }'`
+	ITB_MAX_KB=`sed  -n "/SPL_FIT_IMAGE_KB/p" .config | awk -F "=" '{ print $2 }'`
+	ITB_MAX_BS=$((ITB_MAX_KB*1024))
+	ITB_BS=`ls -l ${ITB} | awk '{ print $5 }'`
+
+	if [ ${ITB_BS} -gt ${ITB_MAX_BS} ]; then
+		echo "ERROR: pack ${IMG_UBOOT} failed! ${ITB} actual: ${ITB_BS} bytes, max limit: ${ITB_MAX_BS} bytes"
+		exit 1
+	fi
+
+	rm -f ${IMG_UBOOT}
+	for ((i = 0; i < ${ITB_MAX_NUM}; i++));
+	do
+		cat ${ITB} >> ${IMG_UBOOT}
+		truncate -s %${ITB_MAX_KB}K ${IMG_UBOOT}
+	done
+}
+
+function fit_gen_boot_img()
+{
+	ITB=$1
+
+	if [ -z ${ITB} ]; then
+		ITB=${ITB_BOOT}
+	fi
+
+	if [ "${ITB}" != "${IMG_BOOT}" ]; then
+		cp ${ITB} ${IMG_BOOT} -f
+	fi
+}
+
+function fit_msg_uboot()
+{
+	if [ "${ARG_NO_VBOOT}" == "y" ]; then
+		MSG="no-signed"
+	else
+		MSG="signed"
+	fi
+
+	if [ "${ARG_SPL_ROLLBACK_PROTECT}" == "y" ]; then
+		echo "Image(${MSG}, rollback-index=${ARG_ROLLBACK_IDX_UBOOT}):  ${IMG_UBOOT} (with uboot trust) is ready"
+	else
+		echo "Image(${MSG}):  ${IMG_UBOOT} (FIT with uboot, trust) is ready"
+	fi
+}
+
+function fit_msg_boot()
+{
+	if [ "${ARG_NO_VBOOT}" == "y" ]; then
+		MSG="no-signed"
+	else
+		MSG="signed"
+	fi
+
+	if [ "${ARG_ROLLBACK_PROTECT}" == "y" ]; then
+		echo "Image(${MSG}, rollback-index=${ARG_ROLLBACK_IDX_BOOT}):  ${IMG_BOOT} is ready"
+	else
+		echo "Image(${MSG}):  ${IMG_BOOT} (FIT with kernel, fdt, resource...) is ready"
+	fi
+}
+
+function fit_msg_loader()
+{
+	LOADER=`ls *loader*.bin`
+	echo "Image(no-signed):  ${LOADER} (with spl, ddr, usbplug) is ready"
+}
+
+function fit_vboot_uboot()
+{
+	fit_rebuild
+	fit_gen_uboot_itb
+	fit_gen_uboot_img
+	echo
+	fit_msg_uboot
+}
+
+function fit_vboot_boot()
+{
+	fit_rebuild
+	fit_boot_make_itb
+	fit_boot_make_img
+	echo
+	fit_verbose_boot
+}
+
+function fit_vboot()
+{
+	fit_rebuild
+	fit_gen_boot_itb
+	fit_gen_boot_img
+	fit_gen_uboot_itb
+	fit_gen_uboot_img
+	echo
+
+	fit_msg_uboot
+	fit_msg_boot
+	fit_msg_loader
+	echo
+}
+
+fit_process_args $*
+if [ ! -z "${ARG_VALIDATE}" ]; then
+	validate_arg ${ARG_VALIDATE}
+elif [ "${ARG_PACK_UBOOT}${ARG_PACK_BOOT}" == "yy" ]; then
+	fit_vboot
+elif [ "${ARG_PACK_UBOOT}" == "y" ]; then
+	fit_vboot_uboot
+elif [ "${ARG_PACK_BOOT}" == "y" ]; then
+	fit_vboot_boot
+fi
+
diff --git a/scripts/fit-repack.sh b/scripts/fit-repack.sh
deleted file mode 100755
index 11fa2e8ff7..0000000000
--- a/scripts/fit-repack.sh
+++ /dev/null
@@ -1,84 +0,0 @@
-#!/bin/bash
-#
-# Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd
-#
-# SPDX-License-Identifier: GPL-2.0
-#
-
-set -e
-
-IMAGE_OFFS="0x800"
-IMAGE_ITS="image.its"
-IMAGE_ITB="image.itb"
-
-function usage()
-{
-	echo
-	echo "usage:"
-	echo "    $0 -f [fit/itb] -o [output]"
-	echo
-}
-
-function args_process()
-{
-	if [ $# -ne 4 -a $# -ne 2 ]; then
-		usage
-		exit 1
-	fi
-
-	while [ $# -gt 0 ]; do
-		case $1 in
-			-f)
-				IMAGE_ORG=$2
-				shift 2
-				;;
-			-o)
-				IMAGE_DIR=$2
-				shift 2
-				;;
-			*)
-				usage
-				exit 1
-				;;
-		esac
-	done
-
-	if [ ! -f $IMAGE_ORG ]; then
-		echo "ERROR: No $IMAGE_ORG"
-		exit 1
-	fi
-
-	if [ -z $IMAGE_DIR ]; then
-		IMAGE_DIR="out"
-	fi
-
-	mkdir -p $IMAGE_DIR
-}
-
-function fit_repack()
-{
-	./scripts/fit-unpack.sh -f $IMAGE_ORG -o $IMAGE_DIR
-	FIT_IMAGE_ITS=$IMAGE_DIR/$IMAGE_ITS
-
-	if grep -q 'hashed-nodes' $FIT_IMAGE_ITS ; then
-		echo "ERROR: $IMAGE_ORG was signed, unsupport to repack it!"
-		exit 1
-	fi
-
-	if grep -q 'uboot@1' $FIT_IMAGE_ITS ; then
-		IMAGE_NAME="uboot.img"
-	else
-		IMAGE_NAME="boot.img"
-	fi
-
-	rm -rf IMAGE_NAME
-	./tools/mkimage -f $FIT_IMAGE_ITS -E -p $IMAGE_OFFS $IMAGE_NAME
-
-	echo
-	echo "Image: $IMAGE_NAME is ready."
-	echo
-}
-
-args_process $*
-fit_repack
-
diff --git a/scripts/fit-resign.sh b/scripts/fit-resign.sh
index b09805cb83..752f6ea8df 100755
--- a/scripts/fit-resign.sh
+++ b/scripts/fit-resign.sh
@@ -6,7 +6,109 @@
 #
 set -e
 
-# openssl dgst -sha256 -sign keys/dev.key -out sha256-rsa2048.sign fit/boot.data2sign
+# [Keys]
+#	mkdir -p keys
+#	openssl genpkey -algorithm RSA -out keys/dev.key -pkeyopt rsa_keygen_bits:2048 -pkeyopt rsa_keygen_pubexp:65537
+#	openssl req -batch -new -x509 -key keys/dev.key -out keys/dev.crt
+# [Sign]
+#	openssl dgst -sha256 -sign keys/dev.key -out sha256-rsa2048.sign fit/boot.data2sign
+
+IMG_UBOOT="uboot.img"
+IMG_BOOT="boot.img"
+
+function usage_resign()
+{
+	echo
+	echo "usage:"
+	echo "    $0 -f [itb] -s [sig]"
+	echo
+}
+
+function fit_resign()
+{
+	if [ $# -ne 4 ]; then
+		usage_resign
+		exit 1
+	fi
+
+	while [ $# -gt 0 ]; do
+		case $1 in
+			-f)
+				ITB=$2
+				shift 2
+				;;
+			-s)
+				SIG=$2
+				shift 2
+				;;
+			*)
+				usage_resign
+				exit 1
+				;;
+		esac
+	done
+
+	if [ ! -f ${ITB} ]; then
+		echo "ERROR: No ${ITB}"
+		exit 1
+	elif [ ! -f ${SIG} ]; then
+		echo "ERROR: No ${SIG}"
+		exit 1
+	fi
+
+	copies=`strings ${ITB} | grep "signer-version"  | wc -l`
+	if [ ${copies} -ne 1 ]; then
+		echo "ERROR: ${ITB} seems not a itb but a image, ${copies}"
+		exit 1
+	fi
+
+	SIG_SZ=`ls -l ${SIG} | awk '{ print $5 }'`
+	LEN=`./tools/fit_info -f ${ITB} -n /configurations/conf/signature -p value | sed -n "/LEN:/p" | awk '{ print $2 }'`
+	OFF=`./tools/fit_info -f ${ITB} -n /configurations/conf/signature -p value | sed -n "/OFF:/p" | awk '{ print $2 }'`
+	END=`./tools/fit_info -f ${ITB} -n /configurations/conf/signature -p value | sed -n "/END:/p" | awk '{ print $2 }'`
+
+	if [ -z ${LEN} ]; then
+		echo "ERROR: No signature in ${ITB}"
+		exit 1
+		strings uboot.img | grep "rollback-index" | wc -l
+	elif [ "${SIG_SZ}" -ne "${LEN}" ]; then
+		echo "ERROR: ${SIG} size ${SIG_SZ} != ${ITB} Signature size ${LEN}"
+		exit 1
+	fi
+
+	dd if=${ITB} of=${ITB}.half1 count=1 bs=${OFF}
+	dd if=${ITB} of=${ITB}.half2 skip=1 ibs=${END}
+
+	ITB_RESIGN="${ITB}.resign"
+	cat ${ITB}.half1  >  ${ITB_RESIGN}
+	cat ${SIG}        >> ${ITB_RESIGN}
+	cat ${ITB}.half2  >> ${ITB_RESIGN}
+	echo
+
+	if fdtget -l ${ITB_RESIGN} /images/uboot >/dev/null 2>&1 ; then
+		ITB_MAX_NUM=`sed -n "/SPL_FIT_IMAGE_MULTIPLE/p" .config | awk -F "=" '{ print $2 }'`
+		ITB_MAX_KB=`sed  -n "/SPL_FIT_IMAGE_KB/p" .config | awk -F "=" '{ print $2 }'`
+		ITB_MAX_BS=$((ITB_MAX_KB*1024))
+		ITB_BS=`ls -l ${ITB} | awk '{ print $5 }'`
+		if [ ${ITB_BS} -gt ${ITB_MAX_BS} ]; then
+			echo "ERROR: pack ${IMG_UBOOT} failed! ${ITB} actual: ${ITB_BS} bytes, max limit: ${ITB_MAX_BS} bytes"
+			exit 1
+		fi
+
+		rm -f ${IMG_UBOOT}
+		for ((i = 0; i < ${ITB_MAX_NUM}; i++));
+		do
+			cat ${ITB_RESIGN} >> ${IMG_UBOOT}
+			truncate -s %${ITB_MAX_KB}K ${IMG_UBOOT}
+		done
+		echo "Image(re-signed):  ${IMG_UBOOT} is ready"
+	else
+		cp ${ITB_RESIGN} ${IMG_BOOT}
+		echo "Image(re-signed):  ${IMG_BOOT} is ready"
+	fi
+
+	rm -f ${ITB}.half1 ${ITB}.half2 ${ITB_RESIGN}
+}
 
-source scripts/fit-base.sh
 fit_resign $*
+
diff --git a/scripts/fit-unpack.sh b/scripts/fit-unpack.sh
index f3771c7287..e29c314681 100755
--- a/scripts/fit-unpack.sh
+++ b/scripts/fit-unpack.sh
@@ -6,13 +6,11 @@
 #
 set -e
 
-IMAGE_ITS="image.its"
-
 function usage()
 {
 	echo
 	echo "usage:"
-	echo "    $0 -f [fit/itb] -o [output]"
+	echo "    $0 -f [fit/itb] -o [out]"
 	echo
 }
 
@@ -26,11 +24,11 @@ function args_process()
 	while [ $# -gt 0 ]; do
 		case $1 in
 			-f)
-				IMAGE=$2
+				ITB=$2
 				shift 2
 				;;
 			-o)
-				IMAGE_DIR=$2
+				OUT=$2
 				shift 2
 				;;
 			*)
@@ -40,105 +38,98 @@ function args_process()
 		esac
 	done
 
-	if [ ! -f $IMAGE ]; then
-		echo "ERROR: No $IMAGE"
+	if [ ! -f ${ITB} ]; then
+		echo "ERROR: No ${ITB}"
 		exit 1
 	fi
 
-	if [ -z $IMAGE_DIR ]; then
-		IMAGE_DIR="out"
+	if [ -z ${OUT} ]; then
+		OUT="out"
 	fi
-
-	mkdir -p $IMAGE_DIR
 }
 
-function gen_images()
+unpack_itb()
 {
-	printf "\n# Unpack $IMAGE to directory $IMAGE_DIR/\n"
-	fdtget -l $IMAGE /images > $IMAGE_DIR/unpack.txt
-	cat $IMAGE_DIR/unpack.txt | while read line
+	mkdir -p ${OUT}
+	echo "Unpack to directory ${OUT}:"
+
+	for NAME in `fdtget -l ${ITB} /images`
 	do
-		# generate image
-		NODE="/images/${line}"
-		NAME=`fdtget -ts $IMAGE $NODE image`
-		OFFS=`fdtget -ti $IMAGE $NODE data-position`
-		SIZE=`fdtget -ti $IMAGE $NODE data-size`
-		if [ -z $OFFS ]; then
+		# generate ITB
+		NODE="/images/${NAME}"
+		OFFS=`fdtget -ti ${ITB} ${NODE} data-position`
+		SIZE=`fdtget -ti ${ITB} ${NODE} data-size`
+		if [ -z ${OFFS} ]; then
 			continue;
 		fi
 
-		if [ $SIZE -ne 0 ]; then
-			dd if=$IMAGE of=$IMAGE_DIR/dd.tmp  bs=$OFFS skip=1  >/dev/null 2>&1
-			dd if=$IMAGE_DIR/dd.tmp of=$IMAGE_DIR/$NAME bs=$SIZE count=1 >/dev/null 2>&1
-			rm $IMAGE_DIR/dd.tmp
+		if [ ${SIZE} -ne 0 ]; then
+			dd if=${ITB} of=${OUT}/${NAME} bs=${SIZE} count=1 skip=${OFFS} iflag=skip_bytes >/dev/null 2>&1
 		else
-			touch $IMAGE_DIR/$NAME
+			touch ${OUT}/${NAME}
 		fi
 
 		# hash verify
-		algo=`fdtget -ts $IMAGE $NODE/hash@1 algo`
-		if [ -z $algo ]; then
-			printf "    %-20s: %d bytes" $NAME $SIZE
-			continue;
-		fi
-
-		data=`fdtget -tx $IMAGE $NODE/hash@1 value`
-		data=`echo " "$data | sed "s/ / 0x/g"`
-		csum=`"$algo"sum $IMAGE_DIR/$NAME | awk '{ print $1}'`
-
-		hash=""
-		for((i=1;;i++));
-		do
-			hex=`echo $data | awk -v idx=$i '{ print $idx }'`
-			if [ -z $hex ]; then
-				break;
-			fi
-
-			hex=`printf "%08x" $hex` # align !!
-			hash="$hash$hex"
-		done
-
-		printf "  %-20s: %d bytes... %s" $NAME $SIZE $algo
-		if [ "$csum" = "$hash" -o $SIZE -eq 0 ]; then
-			echo "+"
+		ALGO=`fdtget -ts ${ITB} ${NODE}/hash algo`
+		if [ -z ${ALGO} ]; then
+			printf "    %-20s: %d bytes" ${NAME} ${SIZE}
 		else
-			echo "-"
+			VALUE=`fdtget -tx ${ITB} ${NODE}/hash value`
+			VALUE=`echo " "${VALUE} | sed "s/ / 0x/g"`
+			CSUM=`"${ALGO}"sum ${OUT}/${NAME} | awk '{ print $1}'`
+
+			HASH=""
+			for((i=1;;i++));
+			do
+				HEX=`echo ${VALUE} | awk -v idx=$i '{ print $idx }'`
+				if [ -z ${HEX} ]; then
+					break;
+				fi
+
+				HEX=`printf "%08x" ${HEX}`
+				HASH="${HASH}${HEX}"
+			done
+
+			printf "  %-20s: %d bytes... %s" ${NAME} ${SIZE} ${ALGO}
+			if [ "${CSUM}" == "${HASH}" -o ${SIZE} -eq 0 ]; then
+				echo "+"
+			else
+				echo "-"
+			fi
 		fi
 	done
-
 	echo
 }
 
 function gen_its()
 {
-	./scripts/dtc/dtc -I dtb -O dts $IMAGE -o $IMAGE_DIR/$IMAGE_ITS >/dev/null 2>&1
-
-	FIT_IMAGE_ITS=$IMAGE_DIR/$IMAGE_ITS
-
-	# remove
-	sed -i "/memreserve/d"       $FIT_IMAGE_ITS
-	sed -i "/data-size/d"        $FIT_IMAGE_ITS
-	sed -i "/data-position/d"    $FIT_IMAGE_ITS
-	sed -i "/value/d"            $FIT_IMAGE_ITS
-	sed -i "/hashed-strings/d"   $FIT_IMAGE_ITS
-	sed -i "/hashed-nodes/d"     $FIT_IMAGE_ITS
-	sed -i "/signer-version/d"   $FIT_IMAGE_ITS
-	sed -i "/signer-name/d"      $FIT_IMAGE_ITS
-	sed -i "/timestamp/d"        $FIT_IMAGE_ITS
+	ITS=${OUT}/image.its
+	TMP_ITB=${OUT}/image.tmp
 
 	# add placeholder
-	sed -i '/image = /a\	\	\	data = /incbin/("IMAGE_PATH");' $FIT_IMAGE_ITS
-
-	# fixup placeholder: "data = /incbin/("...");"
-	num=`grep 'image =' $FIT_IMAGE_ITS | wc -l`
-	for ((i = 1; i <= $num; i++));
-	do
-		NAME=`grep 'image =' $FIT_IMAGE_ITS | sed -n ''${i}p'' | awk '{ printf $3 }' | tr -d '";'`
-		sed -i ''$i',/IMAGE_PATH/{s/IMAGE_PATH/.\/'$NAME'/}'  $FIT_IMAGE_ITS
+	cp -a ${ITB} ${TMP_ITB}
+	for NAME in `fdtget -l ${ITB} /images`; do
+		fdtput -t s ${TMP_ITB} /images/${NAME} data "/INCBIN/(${NAME})"
 	done
+	dtc -I dtb -O dts ${TMP_ITB} -o ${ITS}
+	rm -f ${TMP_ITB}
+
+	# fixup placeholder: data = "/INCBIN/(...)"; -> data = /incbin/("...");
+	sed -i "s/\"\/INCBIN\/(\(.*\))\"/\/incbin\/(\"\1\")/" ${ITS}
+
+	# remove
+	sed -i "/memreserve/d"		${ITS}
+	sed -i "/timestamp/d"		${ITS}
+	sed -i "/data-size/d"		${ITS}
+	sed -i "/data-position/d"	${ITS}
+	sed -i "/value/d"		${ITS}
+	sed -i "/hashed-strings/d"	${ITS}
+	sed -i "/hashed-nodes/d"	${ITS}
+	sed -i "/signer-version/d"	${ITS}
+	sed -i "/signer-name/d"		${ITS}
 }
 
 args_process $*
-gen_images
+unpack_itb
 gen_its
 
diff --git a/scripts/fit-vboot-boot.sh b/scripts/fit-vboot-boot.sh
deleted file mode 100755
index e9fa2d0324..0000000000
--- a/scripts/fit-vboot-boot.sh
+++ /dev/null
@@ -1,15 +0,0 @@
-#!/bin/bash
-#
-# Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd
-#
-# SPDX-License-Identifier: GPL-2.0
-#
-
-source scripts/fit-base.sh
-
-fit_process_args $*
-fit_rebuild
-fit_boot_make_itb
-fit_boot_make_img
-echo
-fit_verbose_boot
diff --git a/scripts/fit-vboot-kernel.sh b/scripts/fit-vboot-kernel.sh
deleted file mode 100755
index 20e1e2f745..0000000000
--- a/scripts/fit-vboot-kernel.sh
+++ /dev/null
@@ -1,15 +0,0 @@
-#!/bin/bash
-#
-# Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd
-#
-# SPDX-License-Identifier: GPL-2.0
-#
-
-source scripts/fit-base.sh
-
-fit_process_args $*
-fit_rebuild
-fit_kernel_make_itb
-fit_kernel_make_img
-echo
-fit_verbose_kernel
diff --git a/scripts/fit-vboot-uboot.sh b/scripts/fit-vboot-uboot.sh
deleted file mode 100755
index cb80e658ef..0000000000
--- a/scripts/fit-vboot-uboot.sh
+++ /dev/null
@@ -1,15 +0,0 @@
-#!/bin/bash
-#
-# Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd
-#
-# SPDX-License-Identifier: GPL-2.0
-#
-
-source scripts/fit-base.sh
-
-fit_process_args $*
-fit_rebuild
-fit_uboot_make_itb
-fit_uboot_make_img
-echo
-fit_verbose_uboot
diff --git a/scripts/fit-vboot.sh b/scripts/fit-vboot.sh
deleted file mode 100755
index 36958112c1..0000000000
--- a/scripts/fit-vboot.sh
+++ /dev/null
@@ -1,20 +0,0 @@
-#!/bin/bash
-#
-# Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd
-#
-# SPDX-License-Identifier: GPL-2.0
-#
-
-source scripts/fit-base.sh
-fit_process_args $*
-fit_rebuild
-fit_boot_make_itb
-fit_boot_make_img
-fit_uboot_make_itb
-fit_uboot_make_img
-
-echo
-fit_verbose_uboot
-fit_verbose_boot
-fit_verbose_loader
-echo

commit 5bce9eeca6f6e7ca7795e8bfe8abd66f23eb5736
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon May 18 09:36:38 2020 +0800

    configs: rv1126: use DTC from host pc
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I9978690015a0a8533a2e5de5a3a63d25cf095e28

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index 6b99702d04..7d7b544baa 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -68,7 +68,7 @@ CONFIG_SPL_OF_CONTROL=y
 CONFIG_SPL_DTB_MINIMUM=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
-CONFIG_MKIMAGE_DTC_PATH="scripts/dtc/dtc"
+CONFIG_MKIMAGE_DTC_PATH="dtc"
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y

commit 1e6f900d039e92095b7303391ed8dee02ec5e528
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon May 18 09:34:50 2020 +0800

    rockchip: its: remove "@" for nodes
    
    Fix the warning:
            <stdout>: Warning (unit_address_vs_reg): Node /images/uboot@1 has a unit name, but no reg property
            <stdout>: Warning (unit_address_vs_reg): Node /images/uboot@1/hash@1 has a unit name, but no reg property
            <stdout>: Warning (unit_address_vs_reg): Node /images/optee@1 has a unit name, but no reg property
            <stdout>: Warning (unit_address_vs_reg): Node /images/optee@1/hash@1 has a unit name, but no reg property
            <stdout>: Warning (unit_address_vs_reg): Node /images/fdt@1 has a unit name, but no reg property
            <stdout>: Warning (unit_address_vs_reg): Node /images/fdt@1/hash@1 has a unit name, but no reg property
            <stdout>: Warning (unit_address_vs_reg): Node /configurations/conf@1 has a unit name, but no reg property
            ......
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If48fa120294ff6061922de3c277654744cdebe02

diff --git a/arch/arm/mach-rockchip/kernel_arm.its b/arch/arm/mach-rockchip/kernel_arm.its
index baa966b777..d22547e4d3 100644
--- a/arch/arm/mach-rockchip/kernel_arm.its
+++ b/arch/arm/mach-rockchip/kernel_arm.its
@@ -12,7 +12,7 @@
 	#address-cells = <1>;
 
 	images {
-		fdt@1 {
+		fdt {
 			description = "Device tree blob";
 			image = "rk-kernel.dtb";
 			data = /incbin/("images/rk-kernel.dtb");
@@ -20,12 +20,12 @@
 			arch = "arm";
 			compression = "none";
 			load  = <0xffffff00>;
-			hash@1 {
+			hash {
 				algo = "sha256";
 			};
 		};
 
-		kernel@1 {
+		kernel {
 			description = "Kernel Image";
 			image = "kernel.img";
 			data = /incbin/("images/kernel.img");
@@ -35,12 +35,12 @@
 			compression = "none";
 			entry = <0xffffff01>;
 			load  = <0xffffff01>;
-			hash@1 {
+			hash {
 				algo = "sha256";
 			};
 		};
 
-		ramdisk@1 {
+		ramdisk {
 			description = "Ramdisk Image";
 			image = "ramdisk.img";
 			data = /incbin/("images/ramdisk.img");
@@ -49,34 +49,34 @@
 			os = "linux";
 			compression = "none";
 			load  = <0xffffff02>;
-			hash@1 {
+			hash {
 				algo = "sha256";
 			};
 		};
 
-		resource@1 {
+		resource {
 			description = "Resource Image";
 			image = "resource.img";
 			data = /incbin/("images/resource.img");
 			type = "multi";
 			arch = "arm";
 			compression = "none";
-			hash@1 {
+			hash {
 				algo = "sha256";
 			};
 		};
 	};
 
 	configurations {
-		default = "conf@1";
-		conf@1 {
+		default = "conf";
+		conf {
 			description = "Boot Linux kernel with FDT blob";
 			rollback-index = <0x0>;
-			fdt = "fdt@1";
-			kernel = "kernel@1";
-			ramdisk = "ramdisk@1";
-			multi = "resource@1";
-			signature@1 {
+			fdt = "fdt";
+			kernel = "kernel";
+			ramdisk = "ramdisk";
+			multi = "resource";
+			signature {
 				algo = "sha256,rsa2048";
 				key-name-hint = "dev";
 				sign-images = "fdt", "kernel", "ramdisk", "multi";
diff --git a/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh b/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh
index aeb047987f..c935512bd7 100755
--- a/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh
+++ b/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh
@@ -14,7 +14,7 @@ cat << EOF
 	#address-cells = <1>;
 
 	images {
-		uboot@1 {
+		uboot {
 			description = "U-Boot";
 			image = "u-boot-nodtb.bin";
 			data = /incbin/("./u-boot-nodtb.bin");
@@ -29,11 +29,11 @@ DARM_BASE=`sed -n "/CONFIG_SYS_SDRAM_BASE=/s/CONFIG_SYS_SDRAM_BASE=//p" ${OUTDIR
 UBOOT_BASE=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
 echo "			load = <"$UBOOT_BASE">;"
 cat << EOF
-			hash@1 {
+			hash {
 				algo = "sha256";
 			};
 		};
-		optee@1 {
+		optee {
 			description = "OP-TEE";
 			image = "tee.bin";
 			data = /incbin/("./tee.bin");
@@ -53,17 +53,17 @@ TEE_LOAD_ADDR=$(echo "obase=16;${TEE_LOAD_ADDR}"|bc)
 echo "			load = <0x"$TEE_LOAD_ADDR">;"
 echo "			entry = <0x"$TEE_LOAD_ADDR">;"
 cat << EOF
-			hash@1 {
+			hash {
 				algo = "sha256";
 			};
 		};
-		fdt@1 {
+		fdt {
 			description = "U-Boot dtb";
 			image = "u-boot.dtb";
 			data = /incbin/("./u-boot.dtb");
 			type = "flat_dt";
 			compression = "none";
-			hash@1 {
+			hash {
 				algo = "sha256";
 			};
 		};
@@ -74,7 +74,7 @@ if [ "$MCU_OFFSET" != "" ]; then
 MCU_LOAD_ADDR=$((DARM_BASE+$MCU_OFFSET))
 MCU_LOAD_ADDR=$(echo "obase=16;${MCU_LOAD_ADDR}"|bc)
 cat  << EOF
-		mcu@1 {
+		mcu {
 			description = "mcu";
 			image="mcu.bin";
 			data = /incbin/("./mcu.bin");
@@ -84,7 +84,7 @@ EOF
 echo "			load = <0x"$MCU_LOAD_ADDR">;"
 cat  << EOF
 			arch = "riscv";
-			hash@1 {
+			hash {
 				algo = "sha256";
 			};
 		};
@@ -95,21 +95,21 @@ cat  << EOF
 	};
 
 	configurations {
-		default = "conf@1";
-		conf@1 {
+		default = "conf";
+		conf {
 			description = "Rockchip armv7 with OP-TEE";
 			rollback-index = <0x0>;
-			firmware = "optee@1";
-			loadables = "uboot@1";
-			fdt = "fdt@1";
+			firmware = "optee";
+			loadables = "uboot";
+			fdt = "fdt";
 EOF
 
 if [ "$MCU_OFFSET" != "" ]; then
-echo "			standalone = \"mcu@1\";"
+echo "			standalone = \"mcu\";"
 fi
 
 cat  << EOF
-			signature@1 {
+			signature {
 				algo = "sha256,rsa2048";
 				key-name-hint = "dev";
 EOF

commit 4405dc8ff2270ef1e826064752b5aff80c29a7cb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon May 18 09:36:10 2020 +0800

    Revert "tools: fit_image: add -Wno-unit_address_vs_reg"
    
    This reverts commit 75e20461a617f95477ad86dfeb7b361f0533b884.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If549e8a3129569b82c625b0afb0b453f4ad56f60

diff --git a/tools/fit_image.c b/tools/fit_image.c
index 68caa4349e..12cb757bcf 100644
--- a/tools/fit_image.c
+++ b/tools/fit_image.c
@@ -707,7 +707,7 @@ static int fit_handle_file(struct image_tool_params *params)
 		*cmd = '\0';
 	} else if (params->datafile) {
 		/* dtc -I dts -O dtb -p 500 datafile > tmpfile */
-		snprintf(cmd, sizeof(cmd), "%s -Wno-unit_address_vs_reg %s \"%s\" > \"%s\"",
+		snprintf(cmd, sizeof(cmd), "%s %s \"%s\" > \"%s\"",
 			 MKIMAGE_DTC, params->dtc, params->datafile, tmpfile);
 		debug("Trying to execute \"%s\"\n", cmd);
 	} else {

commit 8c5bfb85bbe9feab8ef7b082a6ef0dc1d8d3b0a4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon May 18 16:20:02 2020 +0800

    rockchip: fit: verify resource depends on CONFIG_FIT_SIGNATURE
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I4ab2b177aeae5ecdb843a8215ccab221c3045eae

diff --git a/arch/arm/mach-rockchip/fit.c b/arch/arm/mach-rockchip/fit.c
index 00be11edc7..684fab0cfe 100644
--- a/arch/arm/mach-rockchip/fit.c
+++ b/arch/arm/mach-rockchip/fit.c
@@ -319,7 +319,8 @@ static int fit_image_load_resource(const void *fit, struct blk_desc *dev_desc,
 
 	*addr = (ulong)data;
 
-	return fit_image_load_one(fit, dev_desc, part, FIT_MULTI_PROP, data, 1);
+	return fit_image_load_one(fit, dev_desc, part, FIT_MULTI_PROP,
+				  data, IS_ENABLED(CONFIG_FIT_SIGNATURE));
 }
 
 #else

commit 15ede2a15c2a86f575c86ef3f4b775e648fd3037
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Thu May 14 16:28:03 2020 +0800

    clk: rockchip: rk3036: Add support for vop
    
    Change-Id: I0f057350a6ad07f61aaf42c84e50c452ee662f46
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3036.h b/arch/arm/include/asm/arch-rockchip/cru_rk3036.h
index 572138171e..45a488e28e 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3036.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3036.h
@@ -187,6 +187,24 @@ enum {
 	NANDC_SEL_DPLL,
 	NANDC_SEL_GPLL,
 
+	/* CRU_CLKSEL28_CON */
+	LCDC_DCLK_DIV_SHIFT	= 8,
+	LCDC_DCLK_DIV_MASK	= 0xff << LCDC_DCLK_DIV_SHIFT,
+	LCDC_DCLK_SEL_SHIFT	= 0,
+	LCDC_DCLK_SEL_MASK	= 0x3 << LCDC_DCLK_SEL_SHIFT,
+	LCDC_DCLK_SEL_APLL	= 0,
+	LCDC_DCLK_SEL_DPLL,
+	LCDC_DCLK_SEL_GPLL,
+
+	/* CRU_CLKSEL31_CON */
+	LCDC_ACLK_SEL_SHIFT	= 14,
+	LCDC_ACLK_SEL_MASK	= 0x3 << LCDC_ACLK_SEL_SHIFT,
+	LCDC_ACLK_SEL_APLL	= 0,
+	LCDC_ACLK_SEL_DPLL,
+	LCDC_ACLK_SEL_GPLL,
+	LCDC_ACLK_DIV_SHIFT	= 8,
+	LCDC_ACLK_DIV_MASK	= 0x1f << LCDC_ACLK_DIV_SHIFT,
+
 	/* CRU_SOFTRST5_CON */
 	DDRCTRL_PSRST_SHIFT	= 11,
 	DDRCTRL_SRST_SHIFT	= 10,
diff --git a/drivers/clk/rockchip/clk_rk3036.c b/drivers/clk/rockchip/clk_rk3036.c
index b7c93584ec..8061fc1a77 100644
--- a/drivers/clk/rockchip/clk_rk3036.c
+++ b/drivers/clk/rockchip/clk_rk3036.c
@@ -308,13 +308,82 @@ static ulong rockchip_mmc_set_clk(struct rk3036_cru *cru, uint clk_general_rate,
 	return rockchip_mmc_get_clk(cru, clk_general_rate, periph);
 }
 
+static ulong rockchip_dclk_lcdc_get_clk(struct rk3036_cru *cru,
+					uint clk_general_rate)
+{
+	u32 con, div, sel, parent;
+
+	con = readl(&cru->cru_clksel_con[28]);
+	div = (con & LCDC_DCLK_DIV_MASK) >> LCDC_DCLK_DIV_SHIFT;
+	sel = (con & LCDC_DCLK_SEL_MASK) >> LCDC_DCLK_SEL_SHIFT;
+	if (sel == LCDC_DCLK_SEL_GPLL)
+		parent = clk_general_rate;
+	else
+		return -ENOENT;
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rockchip_dclk_lcdc_set_clk(struct rk3036_cru *cru,
+					uint clk_general_rate, uint freq)
+{
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(clk_general_rate, freq);
+	assert(src_clk_div - 1 <= 255);
+
+	rk_clrsetreg(&cru->cru_clksel_con[28],
+		     LCDC_DCLK_SEL_MASK | LCDC_DCLK_DIV_MASK,
+		     LCDC_DCLK_SEL_GPLL << LCDC_DCLK_SEL_SHIFT |
+		     (src_clk_div - 1) << LCDC_DCLK_DIV_SHIFT);
+
+	return rockchip_dclk_lcdc_get_clk(cru, clk_general_rate);
+}
+
+static ulong rockchip_aclk_lcdc_get_clk(struct rk3036_cru *cru,
+					uint clk_general_rate)
+{
+	u32 con, div, sel, parent;
+
+	con = readl(&cru->cru_clksel_con[31]);
+	div = (con & LCDC_ACLK_DIV_MASK) >> LCDC_ACLK_DIV_SHIFT;
+	sel = (con & LCDC_ACLK_SEL_MASK) >> LCDC_ACLK_SEL_SHIFT;
+	if (sel == LCDC_ACLK_SEL_GPLL)
+		parent = clk_general_rate;
+	else
+		return -ENOENT;
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rockchip_aclk_lcdc_set_clk(struct rk3036_cru *cru,
+					uint clk_general_rate, uint freq)
+{
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(clk_general_rate, freq);
+	assert(src_clk_div - 1 <= 31);
+
+	rk_clrsetreg(&cru->cru_clksel_con[31],
+		     LCDC_ACLK_SEL_MASK | LCDC_ACLK_DIV_MASK,
+		     LCDC_ACLK_SEL_GPLL << LCDC_ACLK_SEL_SHIFT |
+		     (src_clk_div - 1) << LCDC_ACLK_DIV_SHIFT);
+
+	return rockchip_aclk_lcdc_get_clk(cru, clk_general_rate);
+}
+
 static ulong rk3036_clk_get_rate(struct clk *clk)
 {
 	struct rk3036_clk_priv *priv = dev_get_priv(clk->dev);
+	ulong gclk_rate = rkclk_pll_get_rate(priv->cru, CLK_GENERAL);
 
 	switch (clk->id) {
 	case 0 ... 63:
 		return rkclk_pll_get_rate(priv->cru, clk->id);
+	case SCLK_LCDC:
+		return rockchip_dclk_lcdc_get_clk(priv->cru, gclk_rate);
+	case ACLK_LCDC:
+		return rockchip_aclk_lcdc_get_clk(priv->cru, gclk_rate);
 	default:
 		return -ENOENT;
 	}
@@ -334,6 +403,14 @@ static ulong rk3036_clk_set_rate(struct clk *clk, ulong rate)
 		new_rate = rockchip_mmc_set_clk(priv->cru, gclk_rate,
 						clk->id, rate);
 		break;
+	case SCLK_LCDC:
+		new_rate = rockchip_dclk_lcdc_set_clk(priv->cru, gclk_rate,
+						      rate);
+		break;
+	case ACLK_LCDC:
+		new_rate = rockchip_aclk_lcdc_set_clk(priv->cru, gclk_rate,
+						      rate);
+		break;
 	default:
 		return -ENOENT;
 	}

commit b6e67ca896e796acd8b3e0af946ec94ab0b9f9a9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed May 13 11:47:37 2020 +0800

    make.sh: merge all fit common args to a variable
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Id485dd311c534260255cfb771b015d83ee401e80

diff --git a/make.sh b/make.sh
index 641ddba142..f22d185e91 100755
--- a/make.sh
+++ b/make.sh
@@ -176,22 +176,12 @@ function process_args()
 				ARG_SUBCMD=$1
 				shift 1
 				;;
-
-			--rollback-index-uboot)
-				ARG_ROLLBACK_IDX_UBOOT="$1 "$2
+			--boot_img|--rollback-index-boot|--rollback-index-uboot)
+				ARG_FIT_TOTAL="$ARG_FIT_TOTAL $1 $2 "
 				shift 2
 				;;
-
-			--rollback-index-boot)
-				ARG_ROLLBACK_IDX_BOOT="$1 "$2
-				shift 2
-				;;
-			--boot_img)
-				ARG_EXT_BOOT_IMG="$1 "$2
-				shift 2
-				;;
-			--spl-new)
-				ARG_SPL_NEW=$1
+			--spl-new|--no-check)
+				ARG_FIT_TOTAL="$ARG_FIT_TOTAL $1 "
 				shift 1
 				;;
 			map|sym|elf*)
@@ -310,7 +300,7 @@ function sub_commands()
 
 		fit)
 			if [ "$opt" = "ns" ]; then
-				./scripts/fit-vboot.sh --no-vboot --ini-trust $INI_TRUST --ini-loader $INI_LOADER $ARG_SPL_NEW $ARG_EXT_BOOT_IMG
+				./scripts/fit-vboot.sh --no-vboot $ARG_FIT_TOTAL
 			fi
 			exit 0
 			;;
@@ -356,7 +346,7 @@ function sub_commands()
 			;;
 
 		--rollback-index*)
-			pack_fit_image $ARG_ROLLBACK_IDX_UBOOT $ARG_ROLLBACK_IDX_BOOT --ini-trust $INI_TRUST --ini-loader $INI_LOADER  $ARG_SPL_NEW $ARG_EXT_BOOT_IMG
+			pack_fit_image $ARG_FIT_TOTAL
 			exit 0
 			;;
 
@@ -516,6 +506,11 @@ function select_ini_file()
 	fi
 }
 
+function handle_args_late()
+{
+	ARG_FIT_TOTAL="$ARG_FIT_TOTAL --ini-trust $INI_TRUST --ini-loader $INI_LOADER"
+}
+
 function pack_uboot_image()
 {
 	if [ "$IMAGE_FORMAT" != "RKFW" ]; then
@@ -734,10 +729,10 @@ function pack_trust_image()
 function pack_fit_image()
 {
 	if grep -q '^CONFIG_FIT_SIGNATURE=y' .config ; then
-		./scripts/fit-vboot.sh $ARG_ROLLBACK_IDX_UBOOT $ARG_ROLLBACK_IDX_BOOT --ini-trust $INI_TRUST --ini-loader $INI_LOADER $ARG_SPL_NEW $ARG_EXT_BOOT_IMG
+		./scripts/fit-vboot.sh $ARG_FIT_TOTAL
 	else
 		rm uboot.img trust*.img -rf
-		./scripts/fit-vboot-uboot.sh --no-vboot --no-rebuild --ini-trust $INI_TRUST --ini-loader $INI_LOADER  $ARG_SPL_NEW $ARG_EXT_BOOT_IMG
+		./scripts/fit-vboot-uboot.sh --no-vboot --no-rebuild $ARG_FIT_TOTAL
 		echo "pack uboot.img (with uboot trust) okay! Input: $INI_TRUST"
 	fi
 }
@@ -750,7 +745,7 @@ function pack_images()
 			pack_trust_image
 			pack_loader_image
 		elif [ "$IMAGE_FORMAT" = "FIT" ]; then
-			pack_fit_image $ARG_ROLLBACK_IDX_UBOOT $ARG_ROLLBACK_IDX_BOOT --ini-trust $INI_TRUST --ini-loader $INI_LOADER  $ARG_SPL_NEW $ARG_EXT_BOOT_IMG
+			pack_fit_image $ARG_ROLLBACK_IDX_UBOOT $ARG_ROLLBACK_IDX_BOOT $ARG_FIT_TOTAL
 		fi
 	fi
 }
@@ -786,6 +781,7 @@ select_toolchain
 select_chip_info
 fixup_platform_configure
 select_ini_file
+handle_args_late
 sub_commands
 clean_files
 make CROSS_COMPILE=${TOOLCHAIN_GCC} ${OPTION} all --jobs=${JOB}

commit 6402f0407c94531ea1f87cdcad2e50cd655839d3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed May 13 11:44:05 2020 +0800

    scripts: fit: support repack rollback-index version
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I3b183e6a7868a5a769d41179f62a5ec0a23b41f5

diff --git a/scripts/fit-base.sh b/scripts/fit-base.sh
index dbe0267491..b41ef8ffd8 100755
--- a/scripts/fit-base.sh
+++ b/scripts/fit-base.sh
@@ -193,7 +193,8 @@ function fit_uboot_make_itb()
 		fi
 
 		if [ "$SPL_ROLLBACK_PROTECT" = "y" ]; then
-			sed -i "s/rollback-index = <0x0>/rollback-index = <$ARG_ROLLBACK_IDX_UBOOT>/g" u-boot.its
+			version=`grep 'rollback-index' u-boot.its | awk -F '=' '{ printf $2 }' `
+			sed -i "s/$version/ <$ARG_ROLLBACK_IDX_UBOOT>;/g" u-boot.its
 		fi
 
 		# We need a u-boot.dtb with RSA pub-key insert
@@ -328,7 +329,8 @@ function fit_boot_make_itb()
 		fi
 
 		if [ "$ROLLBACK_PROTECT" = "y" ]; then
-			sed -i "s/rollback-index = <0x0>/rollback-index = <$ARG_ROLLBACK_IDX_BOOT>/g" $FIT_ITS_BOOT
+			version=`grep 'rollback-index' $FIT_ITS_BOOT | awk -F '=' '{ printf $2 }' `
+			sed -i "s/$version/ <$ARG_ROLLBACK_IDX_BOOT>;/g" $FIT_ITS_BOOT
 		fi
 
 		./tools/mkimage -f $FIT_ITS_BOOT -k $KEY_DIR/ -K u-boot.dtb -E -p $FIT_S_OFFS_BOOT -r $FIT_ITB_BOOT

commit 8d861ed2ec5b98e790eacd6a47360fddc853f6c5
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue May 12 11:59:28 2020 +0800

    configs: rv1126: delete usedless config
    
    It is needless to relocate the spl, so delete usedless config.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ie05c705ef113a978de405048bcfc8283d510a0b6

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index eec9fd4561..6b99702d04 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -12,7 +12,6 @@ CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
-CONFIG_SPL_STACK_R_ADDR=0x3fe0000
 CONFIG_TARGET_EVB_RV1126=y
 CONFIG_SPL_NAND_SUPPORT=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
@@ -31,7 +30,6 @@ CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_BOARD_INIT=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
-CONFIG_SPL_STACK_R=y
 CONFIG_SPL_SHA256_SUPPORT=y
 CONFIG_SPL_CRYPTO_SUPPORT=y
 CONFIG_SPL_HASH_SUPPORT=y

commit 66e508b96c7ef11c51d96f84d5d4362198dc76eb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed May 13 18:34:19 2020 +0800

    rockchip: board: implement board_fit_image_post_process()
    
    Don't override the kernel dtb which maybe processed with overlay,
    hw-id dtb or other handling.
    
    The fdt under root "/images" is only used for running fit generic
    boot sequence.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ibc0ec1dfa1d53952d80fcc24acea5b4ddeac3431

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index bebe2f9c53..1653cffa11 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -818,3 +818,16 @@ int fit_board_verify_required_sigs(void)
 #endif
 	return vboot;
 }
+
+#ifdef CONFIG_FIT_IMAGE_POST_PROCESS
+void board_fit_image_post_process(void **p_image, size_t *p_size)
+{
+	/* Avoid overriding proccessed(overlay, hw-dtb, ...) kernel dtb */
+#ifdef CONFIG_USING_KERNEL_DTB
+	if (!fdt_check_header(*p_image) && !fdt_check_header(gd->fdt_blob)) {
+		*p_image = (void *)gd->fdt_blob;
+		*p_size = (size_t)fdt_totalsize(gd->fdt_blob);
+	}
+#endif
+}
+#endif

commit a1daefc8e61099cd3e2c89eba707e5fa507c749b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed May 13 17:57:04 2020 +0800

    rockchip: fit: refactor code
    
    - update coding style;
    - verify dtb or resource signature before use.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Iff763d5ab9e9f3b5e4ef5cc59065cd1ad782fcf0

diff --git a/arch/arm/include/asm/arch-rockchip/fit.h b/arch/arm/include/asm/arch-rockchip/fit.h
index 21bb36fd4b..ed3338772a 100644
--- a/arch/arm/include/asm/arch-rockchip/fit.h
+++ b/arch/arm/include/asm/arch-rockchip/fit.h
@@ -9,10 +9,12 @@
 
 #define FIT_I(fmt, args...)	printf("FIT: "fmt, ##args)
 
+ulong fit_image_get_bootables_size(const void *fit);
 void *fit_image_load_bootables(ulong *size);
-ulong fit_image_get_bootable_size(void *fit);
-int fit_sysmem_free_each(void *fit);
-int fit_image_fixup_and_sysmem_rsv(void *fit);
+
+int fit_image_pre_process(const void *fit);
+int fit_image_fail_process(const void *fit);
+
 int rockchip_read_fit_dtb(void *fdt_addr, char **hash, int *hash_size);
 
 #endif
diff --git a/arch/arm/mach-rockchip/fit.c b/arch/arm/mach-rockchip/fit.c
index 445c466993..00be11edc7 100644
--- a/arch/arm/mach-rockchip/fit.c
+++ b/arch/arm/mach-rockchip/fit.c
@@ -20,23 +20,24 @@ DECLARE_GLOBAL_DATA_PTR;
  */
 #define FIT_FDT_MAX_SIZE		SZ_4K
 
-static int fit_is_ext_type(void *fit)
+static int fit_is_ext_type(const void *fit)
 {
 	return fdt_totalsize(fit) < FIT_FDT_MAX_SIZE;
 }
 
-static int fit_is_signed(void *fit, const void *sig_blob)
+static int fit_is_signed(const void *fit, const void *sig_blob)
 {
 	return fdt_subnode_offset(sig_blob, 0, FIT_SIG_NODENAME) < 0 ? 0 : 1;
 }
 
-static inline int fit_is_placeholder_addr(ulong addr)
+static inline int fit_image_addr_is_placeholder(ulong addr)
 {
 	return (addr & 0xffffff00) == FIT_PLACEHOLDER_ADDR;
 }
 
-static int fit_is_required(void *fit, const void *sig_blob)
+static int fit_sig_require_conf(const void *fit, const void *sig_blob)
 {
+	const char *required;
 	int sig_node;
 	int noffset;
 
@@ -45,8 +46,6 @@ static int fit_is_required(void *fit, const void *sig_blob)
 		return 0;
 
 	fdt_for_each_subnode(noffset, sig_blob, sig_node) {
-		const char *required;
-
 		required = fdt_getprop(sig_blob, noffset, "required", NULL);
 		if (required && !strcmp(required, "conf"))
 			return 1;
@@ -55,211 +54,118 @@ static int fit_is_required(void *fit, const void *sig_blob)
 	return 0;
 }
 
-int fit_fixup_load_entry(void *fit, int images, int defconf,
-			 char *name, ulong *load, ulong new_addr)
+static int fit_image_get_subnode(const void *fit, int noffset, const char *name)
 {
-	const char *uname;
-	int uname_cfg;
-	int err;
-
-	if (!fit_is_placeholder_addr(*load) ||
-		fit_is_required(fit, gd_fdt_blob()))
-		return 0;
+	int sub_noffset;
 
-	*load = new_addr;
-
-	uname = fdt_getprop(fit, defconf, name, NULL);
-	if (!uname)
-		return -ENODEV;
+	fdt_for_each_subnode(sub_noffset, fit, noffset) {
+		if (!strncmp(fit_get_name(fit, sub_noffset, NULL),
+			     name, strlen(name)))
+			return sub_noffset;
+	}
 
-	uname_cfg = fdt_subnode_offset(fit, images, uname);
-	if (uname_cfg < 0)
-		return -ENODEV;
+	return -ENOENT;
+}
 
-	err = fit_image_set_load(fit, uname_cfg, new_addr);
-	if (err)
-		return err;
+int fit_default_conf_get_node(const void *fit, const char *prop_name)
+{
+	int conf_noffset;
 
-	fit_image_set_entry(fit, uname_cfg, new_addr);
+	conf_noffset = fit_conf_get_node(fit, NULL); /* NULL for default conf */
+	if (conf_noffset < 0)
+		return conf_noffset;
 
-	return 0;
+	return fit_conf_get_prop_node(fit, conf_noffset, prop_name);
 }
 
-static int fit_get_load_and_data(void *fit, int images, int defconf,
-				 const char *name, ulong *load,
-				 int *offset, int *size)
+int fix_image_set_addr(const void *fit, const char *prop_name,
+		       ulong old, ulong new)
 {
-	const char *uname;
-	int uname_cfg;
-	int off, sz;
-	int err;
-
-	uname = fdt_getprop(fit, defconf, name, NULL);
-	if (!uname)
-		return -ENODEV;
+	int noffset;
 
-	uname_cfg = fdt_subnode_offset(fit, images, uname);
-	if (uname_cfg < 0)
-		return -ENODEV;
+	/* do not fix if verified-boot */
+	if (!fit_image_addr_is_placeholder(old) ||
+	     fit_sig_require_conf(fit, gd_fdt_blob()))
+		return 0;
 
-	err = fit_image_get_data_size(fit, uname_cfg, &sz);
-	if (err)
-		return err;
-
-	err = fit_image_get_data_position(fit, uname_cfg, &off);
-	if (!err) {
-		off -= fdt_totalsize(fit);
-	} else {
-		err = fit_image_get_data_offset(fit, uname_cfg, &off);
-		if (err)
-			return err;
-	}
+	noffset = fit_default_conf_get_node(fit, prop_name);
+	if (noffset < 0)
+		return noffset;
 
 	/* optional */
-	if (load) {
-		err = fit_image_get_load(fit, uname_cfg, load);
-		if (err)
-			return err;
-	}
+	fit_image_set_entry(fit, noffset, new);
 
-	*offset = off;
-	*size = sz;
-
-	return 0;
+	return fit_image_set_load(fit, noffset, new);
 }
 
-int fit_image_fixup_and_sysmem_rsv(void *fit)
+static int fdt_image_get_offset_size(const void *fit, const char *prop_name,
+				     int *offset, int *size)
 {
-	ulong load, kaddr, faddr, raddr;
-	int images, defconf;
-	int offset, size;
-	int err;
-
-	faddr = env_get_ulong("fdt_addr_r", 16, 0);
-	kaddr = env_get_ulong("kernel_addr_r", 16, 0);
-	raddr = env_get_ulong("ramdisk_addr_r", 16, 0);
-
-	if (!faddr || !kaddr || !raddr)
-		return -EINVAL;
-
-	if (fit_get_image_defconf_node(fit, &images, &defconf)) {
-		FIT_I("Failed to get default config\n");
-		return -ENODEV;
-	}
-
-	/* fdt */
-	if (fit_get_load_and_data(fit, images, defconf, FIT_FDT_PROP,
-				  &load, &offset, &size)) {
-		FIT_I("Invalid fdt node\n");
-		return -ENOENT;
-	}
-
-#ifdef CONFIG_USING_KERNEL_DTB
-	sysmem_free((phys_addr_t)gd->fdt_blob);
-#endif
-	if (fit_fixup_load_entry(fit, images, defconf,
-				 FIT_FDT_PROP, &load, faddr)) {
-		FIT_I("Failed to fixup fdt load addr\n");
-		return -EINVAL;
-	}
-
-	if (!sysmem_alloc_base(MEM_FDT, (phys_addr_t)load,
-			       ALIGN(size, RK_BLK_SIZE)))
-		return -ENOMEM;
-
-	/* kernel */
-	if (fit_get_load_and_data(fit, images, defconf, FIT_KERNEL_PROP,
-				  &load, &offset, &size)) {
-		FIT_I("Invalid kernel node\n");
-		return -EINVAL;
-	}
-
-	if (fit_fixup_load_entry(fit, images, defconf,
-				 FIT_KERNEL_PROP, &load, kaddr)) {
-		FIT_I("Failed to fixup kernel load addr\n");
-		return -EINVAL;
-	}
+	int sz, offs;
+	int noffset;
+	int ret;
 
-	if (!sysmem_alloc_base(MEM_KERNEL, (phys_addr_t)load,
-			       ALIGN(size, RK_BLK_SIZE)))
-		return -ENOMEM;
+	noffset = fit_default_conf_get_node(fit, prop_name);
+	if (noffset < 0)
+		return noffset;
 
-	/* ramdisk(optional) */
-	err = fit_get_load_and_data(fit, images, defconf, FIT_RAMDISK_PROP,
-				    &load, &offset, &size);
-	if (err && err != -ENODEV) {
-		FIT_I("Invalid ramdisk node\n");
-		return err;
-	}
+	ret = fit_image_get_data_size(fit, noffset, &sz);
+	if (ret)
+		return ret;
 
-	if (size) {
-		if (fit_fixup_load_entry(fit, images, defconf,
-					 FIT_RAMDISK_PROP, &load, raddr)) {
-			FIT_I("Failed to fixup ramdisk load addr\n");
-			return -EINVAL;
-		}
+	ret = fit_image_get_data_position(fit, noffset, &offs);
+	if (!ret)
+		offs -= fdt_totalsize(fit);
+	else
+		ret = fit_image_get_data_offset(fit, noffset, &offs);
 
-		if (!sysmem_alloc_base(MEM_RAMDISK, (phys_addr_t)load,
-				       ALIGN(size, RK_BLK_SIZE)))
-			return -ENOMEM;
-	}
+	*offset = offs;
+	*size = sz;
 
-	return 0;
+	return ret;
 }
 
-int fit_sysmem_free_each(void *fit)
+static int fdt_image_get_load(const void *fit, const char *prop_name,
+			      ulong *load)
 {
-	ulong raddr, kaddr, faddr;
-
-	raddr = env_get_ulong("ramdisk_addr_r", 16, 0);
-	kaddr = env_get_ulong("kernel_addr_r", 16, 0);
-	faddr = env_get_ulong("fdt_addr_r", 16, 0);
+	int noffset;
 
-	sysmem_free((phys_addr_t)fit);
-	sysmem_free((phys_addr_t)raddr);
-	sysmem_free((phys_addr_t)kaddr);
-	sysmem_free((phys_addr_t)faddr);
+	noffset = fit_default_conf_get_node(fit, prop_name);
+	if (noffset < 0)
+		return noffset;
 
-	return 0;
+	return fit_image_get_load(fit, noffset, load);
 }
 
-static int fit_image_load_one(void *fit, struct blk_desc *dev_desc,
-			      disk_partition_t *part, int images,
-			      int defconf, char *name, void *dst)
+static int fit_image_get_param(const void *fit, const char *prop_name,
+			       ulong *load, int *offset, int *size)
 {
-	u32 blknum, blkoff;
-	int offset, size;
-
-	if (fit_get_load_and_data(fit, images, defconf, name,
-				  NULL, &offset, &size))
-		return -EINVAL;
-
-	blkoff = (FIT_ALIGN(fdt_totalsize(fit)) + offset) / dev_desc->blksz;
-	blknum = DIV_ROUND_UP(size, dev_desc->blksz);
+	int ret;
 
-	if (blk_dread(dev_desc, part->start + blkoff, blknum, dst) != blknum)
-		return -EIO;
+	ret = fdt_image_get_offset_size(fit, prop_name, offset, size);
+	if (ret < 0)
+		return ret;
 
-	return 0;
+	return fdt_image_get_load(fit, prop_name, load);
 }
 
 static void *fit_get_blob(struct blk_desc *dev_desc, disk_partition_t *part)
 {
 	void *fit, *fdt;
-	int blknum;
+	int blk_num;
 
-	blknum = DIV_ROUND_UP(sizeof(struct fdt_header), dev_desc->blksz);
-	fdt = memalign(ARCH_DMA_MINALIGN, blknum * dev_desc->blksz);
+	blk_num = DIV_ROUND_UP(sizeof(struct fdt_header), dev_desc->blksz);
+	fdt = memalign(ARCH_DMA_MINALIGN, blk_num * dev_desc->blksz);
 	if (!fdt)
 		return NULL;
 
-	if (blk_dread(dev_desc, part->start, blknum, fdt) != blknum) {
+	if (blk_dread(dev_desc, part->start, blk_num, fdt) != blk_num) {
 		debug("Failed to read fdt header\n");
 		goto fail;
 	}
 
 	if (fdt_check_header(fdt)) {
-		debug("Invalid fdt header\n");
+		debug("No fdt header\n");
 		goto fail;
 	}
 
@@ -268,16 +174,16 @@ static void *fit_get_blob(struct blk_desc *dev_desc, disk_partition_t *part)
 		goto fail;
 	}
 
-	blknum = DIV_ROUND_UP(fdt_totalsize(fdt), dev_desc->blksz);
-	fit = memalign(ARCH_DMA_MINALIGN, blknum * dev_desc->blksz);
+	blk_num = DIV_ROUND_UP(fdt_totalsize(fdt), dev_desc->blksz);
+	fit = memalign(ARCH_DMA_MINALIGN, blk_num * dev_desc->blksz);
 	if (!fit) {
 		debug("No memory\n");
 		goto fail;
 	}
 
-	if (blk_dread(dev_desc, part->start, blknum, fit) != blknum) {
+	if (blk_dread(dev_desc, part->start, blk_num, fit) != blk_num) {
 		free(fit);
-		debug("Failed to read fit\n");
+		debug("Failed to read fit blob\n");
 		goto fail;
 	}
 
@@ -288,126 +194,156 @@ fail:
 	return NULL;
 }
 
-#ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
-static int fit_image_load_resource(void *fit, struct blk_desc *dev_desc,
-				   disk_partition_t *part, int images,
-				   int defconf, ulong *addr)
+static int fit_image_fixup_alloc(const void *fit, const char *prop_name,
+				 const char *addr_name, enum memblk_id mem)
 {
-	ulong fdt_addr_r, dst;
-	int offset, size;
-	int err;
-
-	err = fit_get_load_and_data(fit, images, defconf, FIT_MULTI_PROP,
-				    NULL, &offset, &size);
-	if (err)
-		return err;
+	ulong load, addr;
+	int offset, size = 0;
+	int ret;
 
-	fdt_addr_r = env_get_ulong("fdt_addr_r", 16, 0);
-	if (!fdt_addr_r)
+	addr = env_get_ulong(addr_name, 16, 0);
+	if (!addr)
 		return -EINVAL;
 
-	/* reserve enough space before fdt */
-	dst = fdt_addr_r -
-		ALIGN(size, dev_desc->blksz) - CONFIG_SYS_FDT_PAD;
+	ret = fit_image_get_param(fit, prop_name, &load, &offset, &size);
+	if (ret)
+		return (ret == -FDT_ERR_NOTFOUND) ? 0 : ret;
+
+	if (!size)
+		return 0;
+
+	ret = fix_image_set_addr(fit, prop_name, load, addr);
+	if (ret)
+		return ret;
 
-	if (!sysmem_alloc_base(MEM_RESOURCE, (phys_addr_t)dst,
-			       ALIGN(size, dev_desc->blksz)))
+	if (!sysmem_alloc_base(mem, (phys_addr_t)addr,
+			       ALIGN(size, RK_BLK_SIZE)))
 		return -ENOMEM;
 
-	*addr = dst;
+	return 0;
+}
+
+int fit_image_pre_process(const void *fit)
+{
+	int ret;
+
+#ifdef CONFIG_USING_KERNEL_DTB
+	sysmem_free((phys_addr_t)gd->fdt_blob);
+#endif
+	ret = fit_image_fixup_alloc(fit, FIT_FDT_PROP,
+				    "fdt_addr_r", MEM_FDT);
+	if (ret < 0)
+		return ret;
+
+	ret = fit_image_fixup_alloc(fit, FIT_KERNEL_PROP,
+				    "kernel_addr_r", MEM_KERNEL);
+	if (ret < 0)
+		return ret;
 
-	return fit_image_load_one(fit, dev_desc, part, images, defconf,
-				  FIT_MULTI_PROP, (void *)dst);
+	return fit_image_fixup_alloc(fit, FIT_RAMDISK_PROP,
+				     "ramdisk_addr_r", MEM_RAMDISK);
 }
-#else
 
-static int fit_image_load_fdt(void *fit, struct blk_desc *dev_desc,
-			      disk_partition_t *part, int images,
-			      int defconf, void *dst)
+int fit_image_fail_process(const void *fit)
 {
-	return fit_image_load_one(fit, dev_desc, part, images,
-				  defconf, FIT_FDT_PROP, dst);
+	ulong raddr, kaddr, faddr;
+
+	raddr = env_get_ulong("ramdisk_addr_r", 16, 0);
+	kaddr = env_get_ulong("kernel_addr_r", 16, 0);
+	faddr = env_get_ulong("fdt_addr_r", 16, 0);
+
+	sysmem_free((phys_addr_t)fit);
+	sysmem_free((phys_addr_t)raddr);
+	sysmem_free((phys_addr_t)kaddr);
+	sysmem_free((phys_addr_t)faddr);
+
+	return 0;
 }
 
-static int fit_image_get_fdt_hash(void *fit, int images, int defconf,
-				  char **hash, int *hash_size)
+static int fit_image_load_one(const void *fit, struct blk_desc *dev_desc,
+			      disk_partition_t *part, char *prop_name,
+			      void *data, int check_hash)
 {
-	const char *fdt_name;
-	const char *name;
-	uint8_t *fit_value2;
-	uint8_t *fit_value;
-	int fit_value_len;
-	int hash_off;
-	int fdt_off;
-	int found = 0;
-	char *algo;
-
-	fdt_name = fdt_getprop(fit, defconf, FIT_FDT_PROP, NULL);
-	if (!fdt_name)
-		return -EBADF;
-
-	fdt_off = fdt_subnode_offset(fit, images, fdt_name);
-	if (fdt_off < 0)
-		return -EBADF;
-
-	fdt_for_each_subnode(hash_off, fit, fdt_off) {
-		name = fit_get_name(fit, hash_off, NULL);
-		if (!strncmp(name, FIT_HASH_NODENAME,
-			     strlen(FIT_HASH_NODENAME))) {
-			found = 1;
-			break;
-		}
-	}
+	u32 blk_num, blk_off;
+	int offset, size;
+	int noffset, ret;
+	char *msg = "";
 
-	if (!found)
-		return -ENODEV;
+	ret = fdt_image_get_offset_size(fit, prop_name, &offset, &size);
+	if (ret)
+		return ret;
 
-	if (fit_image_hash_get_algo(fit, hash_off, &algo))
-		return -EINVAL;
+	blk_off = (FIT_ALIGN(fdt_totalsize(fit)) + offset) / dev_desc->blksz;
+	blk_num = DIV_ROUND_UP(size, dev_desc->blksz);
+	if (blk_dread(dev_desc, part->start + blk_off, blk_num, data) != blk_num)
+		return -EIO;
 
-	if (fit_image_hash_get_value(fit, hash_off, &fit_value,
-				     &fit_value_len))
-		return -EINVAL;
+	if (check_hash) {
+		int hash_noffset;
 
-	if (!strcmp(algo, "sha1"))
-		*hash_size = 20;
-	else if (!strcmp(algo, "sha256"))
-		*hash_size = 32;
-	else
-		return -EINVAL;
+		noffset = fit_default_conf_get_node(fit, prop_name);
+		if (noffset < 0)
+			return noffset;
 
-	/* avoid freed */
-	fit_value2 = malloc(fit_value_len);
-	if (!fit_value2)
-		return -ENOMEM;
+		hash_noffset = fit_image_get_subnode(fit, noffset,
+						     FIT_HASH_NODENAME);
+		if (hash_noffset < 0)
+			return hash_noffset;
+
+		printf("%s: ", fdt_get_name(fit, noffset, NULL));
+		ret = fit_image_check_hash(fit, hash_noffset, data, size, &msg);
+		if (ret)
+			return ret;
 
-	memcpy(fit_value2, fit_value, fit_value_len);
-	*hash = (char *)fit_value2;
+		puts("+\n");
+	}
 
 	return 0;
 }
+
+#ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
+static int fit_image_load_resource(const void *fit, struct blk_desc *dev_desc,
+				   disk_partition_t *part, ulong *addr)
+{
+	int offset, size;
+	int ret;
+	void *data;
+
+	ret = fdt_image_get_offset_size(fit, FIT_MULTI_PROP, &offset, &size);
+	if (ret)
+		return ret;
+
+	data = malloc(ALIGN(size, dev_desc->blksz));
+	if (!data)
+		return -ENOMEM;
+
+	*addr = (ulong)data;
+
+	return fit_image_load_one(fit, dev_desc, part, FIT_MULTI_PROP, data, 1);
+}
+
+#else
+static int fit_image_load_fdt(const void *fit, struct blk_desc *dev_desc,
+			      disk_partition_t *part, void *data)
+{
+	return fit_image_load_one(fit, dev_desc, part, FIT_FDT_PROP, data, 1);
+}
 #endif
 
-ulong fit_image_get_bootable_size(void *fit)
+/* Calculate what we really need */
+ulong fit_image_get_bootables_size(const void *fit)
 {
 	ulong off[3] = { 0, 0, 0 };
 	ulong max_off, load;
-	int images, defconf;
 	int offset, size;
 
-	if (fit_get_image_defconf_node(fit, &images, &defconf))
-		return -ENODEV;
-
-	if (!fit_get_load_and_data(fit, images, defconf, FIT_FDT_PROP,
-				   &load, &offset, &size))
+	if (!fit_image_get_param(fit, FIT_FDT_PROP, &load, &offset, &size))
 		off[0] = offset + FIT_ALIGN(size);
 
-	if (!fit_get_load_and_data(fit, images, defconf, FIT_KERNEL_PROP,
-				   &load, &offset, &size))
+	if (!fit_image_get_param(fit, FIT_KERNEL_PROP, &load, &offset, &size))
 		off[1] = offset + FIT_ALIGN(size);
 
-	if (!fit_get_load_and_data(fit, images, defconf, FIT_RAMDISK_PROP,
-				   &load, &offset, &size))
+	if (!fit_image_get_param(fit, FIT_RAMDISK_PROP, &load, &offset, &size))
 		off[2] = offset + FIT_ALIGN(size);
 
 	max_off = max(off[0],  off[1]);
@@ -421,14 +357,12 @@ void *fit_image_load_bootables(ulong *size)
 	struct blk_desc *dev_desc;
 	disk_partition_t part;
 	char *part_name;
-	int blknum;
+	int blk_num;
 	void *fit;
 
 	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		FIT_I("No dev_desc\n");
+	if (!dev_desc)
 		return NULL;
-	}
 
 	if (rockchip_get_boot_mode() == BOOT_MODE_RECOVERY)
 		part_name = PART_RECOVERY;
@@ -446,18 +380,18 @@ void *fit_image_load_bootables(ulong *size)
 		return NULL;
 	}
 
-	*size = fit_image_get_bootable_size(fit);
+	*size = fit_image_get_bootables_size(fit);
 	if (*size == 0) {
-		FIT_I("No bootable image size\n");
+		FIT_I("No bootable image\n");
 		return NULL;
 	}
 
-	blknum = DIV_ROUND_UP(*size, dev_desc->blksz);
-	fit = sysmem_alloc(MEM_FIT, blknum * dev_desc->blksz);
+	blk_num = DIV_ROUND_UP(*size, dev_desc->blksz);
+	fit = sysmem_alloc(MEM_FIT, blk_num * dev_desc->blksz);
 	if (!fit)
 		return NULL;
 
-	if (blk_dread(dev_desc, part.start, blknum, fit) != blknum) {
+	if (blk_dread(dev_desc, part.start, blk_num, fit) != blk_num) {
 		FIT_I("Failed to load bootable images\n");
 		return NULL;
 	}
@@ -465,27 +399,28 @@ void *fit_image_load_bootables(ulong *size)
 	return fit;
 }
 
-static void verbose_msg(void *fit, int defconf)
+static void fit_msg(const void *fit)
 {
-	FIT_I("%ssigned, %sconf-required\n",
+	FIT_I("%ssigned, %sconf required\n",
 	      fit_is_signed(fit, gd_fdt_blob()) ? "" : "no ",
-	      fit_is_required(fit, gd_fdt_blob()) ? "" : "no ");
+	      fit_sig_require_conf(fit, gd_fdt_blob()) ? "" : "no ");
 
 #ifndef CONFIG_ROCKCHIP_RESOURCE_IMAGE
-	printf("DTB: %s\n",
-	       (char *)fdt_getprop(fit, defconf, FIT_FDT_PROP, NULL));
+	int noffset;
+
+	noffset = fit_default_conf_get_node(fit, FIT_FDT_PROP);
+	printf("DTB: %s\n", fdt_get_name(fit, noffset, NULL));
 #endif
 }
 
 int rockchip_read_fit_dtb(void *fdt_addr, char **hash, int *hash_size)
 {
+	int conf_noffset __maybe_unused;
+	ulong rsce __maybe_unused;
 	struct blk_desc *dev_desc;
 	disk_partition_t part;
 	char *part_name;
 	void *fit;
-	ulong rsce __maybe_unused;
-	int images;
-	int defconf;
 	int ret;
 
 	dev_desc = rockchip_get_bootdev();
@@ -511,15 +446,20 @@ int rockchip_read_fit_dtb(void *fdt_addr, char **hash, int *hash_size)
 		return -EINVAL;
 	}
 
-	if (fit_get_image_defconf_node(fit, &images, &defconf)) {
-		FIT_I("Failed to get /images and /configures default\n");
-		ret = -ENODEV;
-		goto out;
-	}
+#ifdef CONFIG_FIT_SIGNATURE
+	conf_noffset = fit_conf_get_node(fit, NULL); /* NULL for default conf */
+	if (conf_noffset < 0)
+		return conf_noffset;
+
+	printf("%s: ", fdt_get_name(fit, conf_noffset, NULL));
+	if (fit_config_verify(fit, conf_noffset))
+		return -EACCES;
+
+	puts("\n");
+#endif
 
 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
-	ret = fit_image_load_resource(fit, dev_desc, &part,
-				      images, defconf, &rsce);
+	ret = fit_image_load_resource(fit, dev_desc, &part, &rsce);
 	if (ret) {
 		FIT_I("Failed to load resource\n");
 		goto out;
@@ -533,21 +473,14 @@ int rockchip_read_fit_dtb(void *fdt_addr, char **hash, int *hash_size)
 
 	ret = rockchip_read_resource_dtb(fdt_addr, hash, hash_size);
 #else
-	ret = fit_image_load_fdt(fit, dev_desc, &part, images,
-				 defconf, fdt_addr);
+	ret = fit_image_load_fdt(fit, dev_desc, &part, fdt_addr);
 	if (ret) {
 		FIT_I("Failed to load fdt\n");
 		goto out;
 	}
-
-	ret = fit_image_get_fdt_hash(fit, images, defconf, hash, hash_size);
-	if (ret) {
-		FIT_I("Failed to get fdt hash\n");
-		goto out;
-	}
 #endif
 
-	verbose_msg(fit, defconf);
+	fit_msg(fit);
 out:
 	free(fit);
 
diff --git a/cmd/bootfit.c b/cmd/bootfit.c
index e5c869fb41..4c0890aa7e 100644
--- a/cmd/bootfit.c
+++ b/cmd/bootfit.c
@@ -30,7 +30,7 @@ static void *do_boot_fit_ram(char *const argv[], ulong *data_size)
 		return NULL;
 	}
 
-	size = fit_image_get_bootable_size(fit);
+	size = fit_image_get_bootables_size(fit);
 	if (!size) {
 		FIT_I("Failed to get bootable image size\n");
 		return NULL;
@@ -83,8 +83,8 @@ static int do_boot_fit(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 		goto out;
 	}
 
-	/* reserve memory to avoid memory overlap and fixup entry & load !! */
-	if (fit_image_fixup_and_sysmem_rsv(fit))
+	/* fixup entry/load and alloc sysmem */
+	if (fit_image_pre_process(fit))
 		goto out;
 
 	env_set("bootm-no-reloc", "y");
@@ -104,7 +104,7 @@ static int do_boot_fit(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 		BOOTM_STATE_OS_GO, &images, 1);
 
 	if (ret && argc != 1) {
-		fit_sysmem_free_each(fit);
+		fit_image_fail_process(fit);
 		goto out;
 	}
 

commit 10d2eb488f6db8a8c902afd2aa09a2b3387e479e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed May 13 18:33:40 2020 +0800

    Kconfig: remove depend option for CONFIG_FIT_IMAGE_POST_PROCESS
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I7019b8610587c02a2e4473432a66a35af5299b52

diff --git a/Kconfig b/Kconfig
index ceb90a8ab9..1d3c0e2c88 100644
--- a/Kconfig
+++ b/Kconfig
@@ -248,7 +248,6 @@ config FIT_BEST_MATCH
 
 config FIT_IMAGE_POST_PROCESS
 	bool "Enable post-processing of FIT artifacts after loading by U-Boot"
-	depends on TI_SECURE_DEVICE
 	help
 	  Allows doing any sort of manipulation to blobs after they got extracted
 	  from FIT images like stripping off headers or modifying the size of the

commit d4229e7722417173f2e8271295cc5d3bc440d99b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed May 13 17:56:36 2020 +0800

    image: fit: export fit_image_check_hash()
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I41c5c853e9fdad0a9e64c823a68cc88fb68a7e55

diff --git a/common/image-fit.c b/common/image-fit.c
index 259ac75792..beb6c9a0d8 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -1223,8 +1223,8 @@ int calculate_hash(const void *data, int data_len, const char *algo,
 #endif
 #endif
 
-static int fit_image_check_hash(const void *fit, int noffset, const void *data,
-				size_t size, char **err_msgp)
+int fit_image_check_hash(const void *fit, int noffset, const void *data,
+			 size_t size, char **err_msgp)
 {
 	uint8_t value[FIT_MAX_HASH_LEN];
 	int value_len;
diff --git a/include/image.h b/include/image.h
index cc84b49728..a6d4a0fd35 100644
--- a/include/image.h
+++ b/include/image.h
@@ -1021,6 +1021,8 @@ int fit_image_get_rollback_index(const void *fit, int noffset, uint32_t *index);
 int fit_image_hash_get_algo(const void *fit, int noffset, char **algo);
 int fit_image_hash_get_value(const void *fit, int noffset, uint8_t **value,
 				int *value_len);
+int fit_image_check_hash(const void *fit, int noffset, const void *data,
+			 size_t size, char **err_msgp);
 
 int fit_set_timestamp(void *fit, int noffset, time_t timestamp);
 

commit b3622f5b4f5c85c93f0b1ceef66f7aa9d6f896db
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue May 12 17:37:43 2020 +0800

    common: board_r: skip initr_nand() if kernel dtb is enabled
    
    Nand will be initialized at init_kernel_dtb().
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I41ec1edfcb6328cbe02435143f212453e1638c80

diff --git a/common/board_r.c b/common/board_r.c
index f1b1b83c1d..3151530073 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -420,9 +420,11 @@ static int initr_spi(void)
 /* go init the NAND */
 static int initr_nand(void)
 {
+#ifndef CONFIG_USING_KERNEL_DTB
 	puts("NAND:  ");
 	nand_init();
 	printf("%lu MiB\n", nand_size() / 1024);
+#endif
 	return 0;
 }
 #endif

commit b53ffe05bf81a1fd0160e81df74a5925c95612d3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue May 12 15:13:55 2020 +0800

    make.sh: fit: change "--new-spl" to "--spl-new"
    
    use "--spl" as prefix in order to add more spl subcommands
    in the future.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I6e90e0a4b38030bf64bb25f87b6eb6b03f0000fc

diff --git a/make.sh b/make.sh
index 09c1c1c9e0..641ddba142 100755
--- a/make.sh
+++ b/make.sh
@@ -190,8 +190,8 @@ function process_args()
 				ARG_EXT_BOOT_IMG="$1 "$2
 				shift 2
 				;;
-			--new-spl)
-				ARG_NEW_SPL=$1
+			--spl-new)
+				ARG_SPL_NEW=$1
 				shift 1
 				;;
 			map|sym|elf*)
@@ -310,7 +310,7 @@ function sub_commands()
 
 		fit)
 			if [ "$opt" = "ns" ]; then
-				./scripts/fit-vboot.sh --no-vboot --ini-trust $INI_TRUST --ini-loader $INI_LOADER $ARG_NEW_SPL $ARG_EXT_BOOT_IMG
+				./scripts/fit-vboot.sh --no-vboot --ini-trust $INI_TRUST --ini-loader $INI_LOADER $ARG_SPL_NEW $ARG_EXT_BOOT_IMG
 			fi
 			exit 0
 			;;
@@ -356,7 +356,7 @@ function sub_commands()
 			;;
 
 		--rollback-index*)
-			pack_fit_image $ARG_ROLLBACK_IDX_UBOOT $ARG_ROLLBACK_IDX_BOOT --ini-trust $INI_TRUST --ini-loader $INI_LOADER  $ARG_NEW_SPL $ARG_EXT_BOOT_IMG
+			pack_fit_image $ARG_ROLLBACK_IDX_UBOOT $ARG_ROLLBACK_IDX_BOOT --ini-trust $INI_TRUST --ini-loader $INI_LOADER  $ARG_SPL_NEW $ARG_EXT_BOOT_IMG
 			exit 0
 			;;
 
@@ -734,10 +734,10 @@ function pack_trust_image()
 function pack_fit_image()
 {
 	if grep -q '^CONFIG_FIT_SIGNATURE=y' .config ; then
-		./scripts/fit-vboot.sh $ARG_ROLLBACK_IDX_UBOOT $ARG_ROLLBACK_IDX_BOOT --ini-trust $INI_TRUST --ini-loader $INI_LOADER $ARG_NEW_SPL $ARG_EXT_BOOT_IMG
+		./scripts/fit-vboot.sh $ARG_ROLLBACK_IDX_UBOOT $ARG_ROLLBACK_IDX_BOOT --ini-trust $INI_TRUST --ini-loader $INI_LOADER $ARG_SPL_NEW $ARG_EXT_BOOT_IMG
 	else
 		rm uboot.img trust*.img -rf
-		./scripts/fit-vboot-uboot.sh --no-vboot --no-rebuild --ini-trust $INI_TRUST --ini-loader $INI_LOADER  $ARG_NEW_SPL $ARG_EXT_BOOT_IMG
+		./scripts/fit-vboot-uboot.sh --no-vboot --no-rebuild --ini-trust $INI_TRUST --ini-loader $INI_LOADER  $ARG_SPL_NEW $ARG_EXT_BOOT_IMG
 		echo "pack uboot.img (with uboot trust) okay! Input: $INI_TRUST"
 	fi
 }
@@ -750,7 +750,7 @@ function pack_images()
 			pack_trust_image
 			pack_loader_image
 		elif [ "$IMAGE_FORMAT" = "FIT" ]; then
-			pack_fit_image $ARG_ROLLBACK_IDX_UBOOT $ARG_ROLLBACK_IDX_BOOT --ini-trust $INI_TRUST --ini-loader $INI_LOADER  $ARG_NEW_SPL $ARG_EXT_BOOT_IMG
+			pack_fit_image $ARG_ROLLBACK_IDX_UBOOT $ARG_ROLLBACK_IDX_BOOT --ini-trust $INI_TRUST --ini-loader $INI_LOADER  $ARG_SPL_NEW $ARG_EXT_BOOT_IMG
 		fi
 	fi
 }
diff --git a/scripts/fit-base.sh b/scripts/fit-base.sh
index 446a120826..dbe0267491 100755
--- a/scripts/fit-base.sh
+++ b/scripts/fit-base.sh
@@ -58,7 +58,7 @@ function usage_pack()
 	fi
 	echo "    --no-vboot"
 	echo "    --no-check"
-	echo "    --new-spl"
+	echo "    --spl-new"
 	echo
 }
 
@@ -102,8 +102,8 @@ function fit_process_args()
 				ARG_INI_LOADER=$2
 				shift 2
 				;;
-			--new-spl)      # Use current build u-boot-spl.bin to pack loader
-				ARG_NEW_SPL="y"
+			--spl-new)      # Use current build u-boot-spl.bin to pack loader
+				ARG_SPL_NEW="y"
 				shift 1
 				;;
 			--rollback-index-boot)
@@ -163,7 +163,7 @@ function fit_uboot_make_itb()
 	if [ "$ARG_NO_VBOOT" = "y" ]; then
 		SIGN_MSG="no-signed"
 		./tools/mkimage -f u-boot.its -E -p $FIT_NS_OFFS_UBOOT $FIT_ITB_UBOOT
-		if [ "$ARG_NEW_SPL" = "y" ]; then
+		if [ "$ARG_SPL_NEW" = "y" ]; then
 			./make.sh spl-s $ARG_INI_LOADER
 			echo "pack loader with: spl/u-boot-spl.bin"
 		else
@@ -216,7 +216,7 @@ function fit_uboot_make_itb()
 		fi
 
 		if [ "$ARG_NO_CHECK" != "y" ]; then
-			if [ "$ARG_NEW_SPL" = "y" ]; then
+			if [ "$ARG_SPL_NEW" = "y" ]; then
 				./tools/fit_check_sign -f $FIT_ITB_UBOOT -k spl/u-boot-spl.dtb -s
 			else
 				# unpack legacy u-boot-spl.dtb
@@ -249,7 +249,7 @@ function fit_uboot_make_itb()
 
 		# repack spl which has rsa pub-key insert
 		rm *_loader_*.bin -rf
-		if [ "$ARG_NEW_SPL" = "y" ]; then
+		if [ "$ARG_SPL_NEW" = "y" ]; then
 			cat spl/u-boot-spl-nodtb.bin > spl/u-boot-spl.bin
 			if ! grep  -q '^CONFIG_SPL_SEPARATE_BSS=y' .config ; then
 				cat spl/u-boot-spl-pad.bin >> spl/u-boot-spl.bin

commit 4175c72296c81593e2eebf0dc0a503b569250261
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat May 9 10:56:52 2020 +0800

    rockchip: board: move ramdisk to BL32 address if disabled
    
    This fix sysmem alloc issue on the board with critical memory,
    ie. 256MB.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I8a01ef2fdf914e0c590b1d96e37aa61be39ad24d

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 09539992d5..bebe2f9c53 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -238,12 +238,30 @@ static void env_fixup(void)
 		}
 	}
 #endif
-	/* If bl32 is disabled, maybe kernel can be load to lower address. */
+	/* If BL32 is disabled, move kernel to lower address. */
 	if (!(gd->flags & GD_FLG_BL32_ENABLED)) {
 		addr_r = env_get("kernel_addr_no_bl32_r");
 		if (addr_r)
 			env_set("kernel_addr_r", addr_r);
-	/* If bl32 is enlarged, we move ramdisk addr right behind it */
+
+		/*
+		 * 0x0a200000 and 0x08400000 are rockchip traditional address
+		 * of BL32 and ramdisk:
+		 *
+		 * |------------|------------|
+		 * |    BL32    |  ramdisk   |
+		 * |------------|------------|
+		 *
+		 * Move ramdisk to BL32 address to fix sysmem alloc failed
+		 * issue on the board with critical memory(ie. 256MB).
+		 */
+		if (gd->ram_size > SZ_128M && gd->ram_size <= SZ_256M) {
+			u_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0);
+			if (u_addr_r == 0x0a200000)
+				env_set("ramdisk_addr_r", "0x08400000");
+		}
+
+	/* If BL32 is enlarged, move ramdisk right behind it */
 	} else {
 		mem = param_parse_optee_mem();
 		end = mem.base + mem.size;

commit cf53642aa688c2641dc1b495ecefb22956d17e88
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Sat May 9 15:36:23 2020 +0800

    drm/rockchip: filter the edid modes accordinig to vop max output resolution
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: Id338a2b3bc659799c4fb391d36fa814c44e0274d

diff --git a/drivers/video/drm/dw_hdmi.c b/drivers/video/drm/dw_hdmi.c
index 2f8736cc65..fe82317666 100644
--- a/drivers/video/drm/dw_hdmi.c
+++ b/drivers/video/drm/dw_hdmi.c
@@ -2423,6 +2423,8 @@ int rockchip_dw_hdmi_get_timing(struct display_state *state)
 	drm_rk_filter_whitelist(&hdmi->edid_data);
 	if (hdmi->phy.ops->mode_valid)
 		hdmi->phy.ops->mode_valid(hdmi, state);
+	drm_mode_max_resolution_filter(&hdmi->edid_data,
+				       &state->crtc_state.max_output);
 	if (!drm_mode_prune_invalid(&hdmi->edid_data)) {
 		printf("can't find valid hdmi mode\n");
 		return -EINVAL;
diff --git a/drivers/video/drm/rockchip_crtc.h b/drivers/video/drm/rockchip_crtc.h
index 4727d58740..544104575d 100644
--- a/drivers/video/drm/rockchip_crtc.h
+++ b/drivers/video/drm/rockchip_crtc.h
@@ -16,6 +16,7 @@ struct rockchip_crtc {
 };
 
 struct rockchip_crtc_funcs {
+	int (*preinit)(struct display_state *state);
 	int (*init)(struct display_state *state);
 	void (*deinit)(struct display_state *state);
 	int (*set_plane)(struct display_state *state);
diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 6280554567..57348e244e 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -338,6 +338,23 @@ static int display_get_timing_from_dts(struct panel_state *panel_state,
 	return 0;
 }
 
+/**
+ * drm_mode_max_resolution_filter - mark modes out of vop max resolution
+ * @edid_data: structure store mode list
+ * @max_output: vop max output resolution
+ */
+void drm_mode_max_resolution_filter(struct hdmi_edid_data *edid_data,
+				    struct vop_rect *max_output)
+{
+	int i;
+
+	for (i = 0; i < edid_data->modes; i++) {
+		if (edid_data->mode_buf[i].hdisplay > max_output->width ||
+		    edid_data->mode_buf[i].vdisplay > max_output->height)
+			edid_data->mode_buf[i].invalid = true;
+	}
+}
+
 /**
  * drm_mode_set_crtcinfo - set CRTC modesetting timing parameters
  * @p: mode
@@ -552,6 +569,12 @@ static int display_init(struct display_state *state)
 		return -ENODEV;
 	}
 
+	if (crtc_funcs->preinit) {
+		ret = crtc_funcs->preinit(state);
+		if (ret)
+			return ret;
+	}
+
 	if (panel_state->panel)
 		rockchip_panel_init(panel_state->panel);
 
diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index b37425df7b..73a78a13af 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -62,6 +62,11 @@ struct rockchip_mcu_timing {
 	int mcu_hold_mode;
 };
 
+struct vop_rect {
+	int width;
+	int height;
+};
+
 struct crtc_state {
 	struct udevice *dev;
 	struct rockchip_crtc *crtc;
@@ -85,6 +90,7 @@ struct crtc_state {
 	bool yuv_overlay;
 	struct rockchip_mcu_timing mcu_timing;
 	u32 dual_channel_swap;
+	struct vop_rect max_output;
 };
 
 struct panel_state {
@@ -176,4 +182,7 @@ int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val);
 bool drm_mode_is_420(const struct drm_display_info *display,
 		     struct drm_display_mode *mode);
 
+void drm_mode_max_resolution_filter(struct hdmi_edid_data *edid_data,
+				    struct vop_rect *max_output);
+
 #endif
diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index 76d6f7a830..d7e518a609 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -193,6 +193,15 @@ static void vop_mcu_mode(struct display_state *state, struct vop *vop)
 	VOP_CTRL_SET(vop, mcu_rw_pend, crtc_state->mcu_timing.mcu_rw_pend);
 }
 
+static int rockchip_vop_preinit(struct display_state *state)
+{
+	const struct vop_data *vop_data = state->crtc_state.crtc->data;
+
+	state->crtc_state.max_output = vop_data->max_output;
+
+	return 0;
+}
+
 static int rockchip_vop_init(struct display_state *state)
 {
 	struct crtc_state *crtc_state = &state->crtc_state;
@@ -239,7 +248,6 @@ static int rockchip_vop_init(struct display_state *state)
 	vop->csc_table = vop_data->csc_table;
 	vop->win_csc = vop_data->win_csc;
 	vop->version = vop_data->version;
-	vop->max_output = vop_data->max_output;
 
 	/* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
 	ret = clk_set_defaults(crtc_state->dev);
@@ -505,12 +513,6 @@ static void scl_vop_cal_scl_fac(struct vop *vop,
 	if (!vop->win->scl)
 		return;
 
-	if (dst_w > vop->max_output.width) {
-		printf("Maximum destination width %d exceeded\n",
-		       vop->max_output.width);
-		return;
-	}
-
 	if (!vop->win->scl->ext) {
 		VOP_SCL_SET(vop, scale_yrgb_x,
 			    scl_cal_scale2(src_w, dst_w));
@@ -658,6 +660,14 @@ static int rockchip_vop_set_plane(struct display_state *state)
 	int xvir = crtc_state->xvir;
 	int x_mirror = 0, y_mirror = 0;
 
+	if ((crtc_w > crtc_state->max_output.width) ||
+	    (crtc_h > crtc_state->max_output.height)){
+		printf("Maximum destination %dx%d exceeded\n",
+		       crtc_state->max_output.width,
+		       crtc_state->max_output.height);
+		return -EINVAL;
+	}
+
 	act_info = (src_h - 1) << 16;
 	act_info |= (src_w - 1) & 0xffff;
 
@@ -817,6 +827,7 @@ static int rockchip_vop_send_mcu_cmd(struct display_state *state,
 }
 
 const struct rockchip_crtc_funcs rockchip_vop_funcs = {
+	.preinit = rockchip_vop_preinit,
 	.init = rockchip_vop_init,
 	.set_plane = rockchip_vop_set_plane,
 	.prepare = rockchip_vop_prepare,
diff --git a/drivers/video/drm/rockchip_vop.h b/drivers/video/drm/rockchip_vop.h
index 130e2a1cd6..9d2ff8afb0 100644
--- a/drivers/video/drm/rockchip_vop.h
+++ b/drivers/video/drm/rockchip_vop.h
@@ -6,6 +6,7 @@
 
 #ifndef _ROCKCHIP_VOP_H_
 #define _ROCKCHIP_VOP_H_
+#include "rockchip_display.h"
 
 /*
  * major: IP major vertion, used for IP structure
@@ -426,11 +427,6 @@ struct vop_grf_ctrl {
 	struct vop_reg grf_dclk_inv;
 };
 
-struct vop_rect {
-	int width;
-	int height;
-};
-
 struct vop_csc_table {
 	const uint32_t *r2y_bt601;
 	const uint32_t *r2y_bt601_12_235;
@@ -477,7 +473,6 @@ struct vop {
 	const struct vop_csc_table *csc_table;
 	const struct vop_csc *win_csc;
 	int win_offset;
-	struct vop_rect max_output;
 };
 
 static inline void vop_writel(struct vop *vop, uint32_t offset, uint32_t v)

commit af50552e4ffa9df3be2e3d39caf43c1b8472a8f4
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Sat May 9 10:29:39 2020 +0800

    drm/rockchip: vop: fix win2 csc register define error
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: Ice649d5319b488a8a0aea4d9545d462b33fec05c

diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index f382b12d55..7ca84db23e 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -285,6 +285,13 @@ static const struct vop_csc rk3399_win0_csc = {
 	.r2y_offset = RK3399_WIN0_YUV2YUV_R2Y,
 };
 
+static const struct vop_csc rk3399_win2_csc = {
+	.r2r_en = VOP_REG(RK3399_YUV2YUV_WIN, 0x1, 16),
+	.r2y_en = VOP_REG(RK3399_YUV2YUV_WIN, 0x1, 18),
+	.r2r_offset = RK3399_WIN2_YUV2YUV_3X3,
+
+};
+
 const struct vop_data rk3399_vop_big = {
 	.version = VOP_VERSION(3, 5),
 	.max_output = {4096, 2160},
@@ -304,7 +311,7 @@ const struct vop_data rk3399_vop_lit = {
 	.win = &rk3368_win23_data,
 	.line_flag = &rk3366_vop_line_flag,
 	.csc_table = &rk3399_csc_table,
-	.win_csc = &rk3399_win0_csc,
+	.win_csc = &rk3399_win2_csc,
 	.reg_len = RK3399_DSP_VACT_ST_END_F1 * 4,
 };
 

commit f3797579f0d06cd09733347bf361fd3fbcdb3d9b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 8 16:43:42 2020 +0800

    scripts: fit: support repack boot itb image
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I3e529dd9c274196a633a77829d554b2625a77264

diff --git a/scripts/fit-repack.sh b/scripts/fit-repack.sh
new file mode 100755
index 0000000000..11fa2e8ff7
--- /dev/null
+++ b/scripts/fit-repack.sh
@@ -0,0 +1,84 @@
+#!/bin/bash
+#
+# Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier: GPL-2.0
+#
+
+set -e
+
+IMAGE_OFFS="0x800"
+IMAGE_ITS="image.its"
+IMAGE_ITB="image.itb"
+
+function usage()
+{
+	echo
+	echo "usage:"
+	echo "    $0 -f [fit/itb] -o [output]"
+	echo
+}
+
+function args_process()
+{
+	if [ $# -ne 4 -a $# -ne 2 ]; then
+		usage
+		exit 1
+	fi
+
+	while [ $# -gt 0 ]; do
+		case $1 in
+			-f)
+				IMAGE_ORG=$2
+				shift 2
+				;;
+			-o)
+				IMAGE_DIR=$2
+				shift 2
+				;;
+			*)
+				usage
+				exit 1
+				;;
+		esac
+	done
+
+	if [ ! -f $IMAGE_ORG ]; then
+		echo "ERROR: No $IMAGE_ORG"
+		exit 1
+	fi
+
+	if [ -z $IMAGE_DIR ]; then
+		IMAGE_DIR="out"
+	fi
+
+	mkdir -p $IMAGE_DIR
+}
+
+function fit_repack()
+{
+	./scripts/fit-unpack.sh -f $IMAGE_ORG -o $IMAGE_DIR
+	FIT_IMAGE_ITS=$IMAGE_DIR/$IMAGE_ITS
+
+	if grep -q 'hashed-nodes' $FIT_IMAGE_ITS ; then
+		echo "ERROR: $IMAGE_ORG was signed, unsupport to repack it!"
+		exit 1
+	fi
+
+	if grep -q 'uboot@1' $FIT_IMAGE_ITS ; then
+		IMAGE_NAME="uboot.img"
+	else
+		IMAGE_NAME="boot.img"
+	fi
+
+	rm -rf IMAGE_NAME
+	./tools/mkimage -f $FIT_IMAGE_ITS -E -p $IMAGE_OFFS $IMAGE_NAME
+
+	echo
+	echo "Image: $IMAGE_NAME is ready."
+	echo
+}
+
+args_process $*
+fit_repack
+

commit 43816dcece2f2c07da42a6641086f54672c41e31
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 8 16:40:59 2020 +0800

    make.sh: fit: support "--boot_img" to sign image
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I2717acc851e7a07cdadfebccd46996238846c32e

diff --git a/make.sh b/make.sh
index 4badbf29ed..09c1c1c9e0 100755
--- a/make.sh
+++ b/make.sh
@@ -178,15 +178,18 @@ function process_args()
 				;;
 
 			--rollback-index-uboot)
-				ARG_ROLLBACK_IDX_UBOOT="--rollback-index-uboot "$2
+				ARG_ROLLBACK_IDX_UBOOT="$1 "$2
 				shift 2
 				;;
 
 			--rollback-index-boot)
-				ARG_ROLLBACK_IDX_BOOT="--rollback-index-boot "$2
+				ARG_ROLLBACK_IDX_BOOT="$1 "$2
+				shift 2
+				;;
+			--boot_img)
+				ARG_EXT_BOOT_IMG="$1 "$2
 				shift 2
 				;;
-
 			--new-spl)
 				ARG_NEW_SPL=$1
 				shift 1
@@ -307,7 +310,7 @@ function sub_commands()
 
 		fit)
 			if [ "$opt" = "ns" ]; then
-				./scripts/fit-vboot.sh --no-vboot --ini-trust $INI_TRUST --ini-loader $INI_LOADER $ARG_NEW_SPL
+				./scripts/fit-vboot.sh --no-vboot --ini-trust $INI_TRUST --ini-loader $INI_LOADER $ARG_NEW_SPL $ARG_EXT_BOOT_IMG
 			fi
 			exit 0
 			;;
@@ -353,7 +356,7 @@ function sub_commands()
 			;;
 
 		--rollback-index*)
-			pack_fit_image $ARG_ROLLBACK_IDX_UBOOT $ARG_ROLLBACK_IDX_BOOT --ini-trust $INI_TRUST --ini-loader $INI_LOADER  $ARG_NEW_SPL
+			pack_fit_image $ARG_ROLLBACK_IDX_UBOOT $ARG_ROLLBACK_IDX_BOOT --ini-trust $INI_TRUST --ini-loader $INI_LOADER  $ARG_NEW_SPL $ARG_EXT_BOOT_IMG
 			exit 0
 			;;
 
@@ -731,10 +734,10 @@ function pack_trust_image()
 function pack_fit_image()
 {
 	if grep -q '^CONFIG_FIT_SIGNATURE=y' .config ; then
-		./scripts/fit-vboot.sh $ARG_ROLLBACK_IDX_UBOOT $ARG_ROLLBACK_IDX_BOOT --ini-trust $INI_TRUST --ini-loader $INI_LOADER $ARG_NEW_SPL
+		./scripts/fit-vboot.sh $ARG_ROLLBACK_IDX_UBOOT $ARG_ROLLBACK_IDX_BOOT --ini-trust $INI_TRUST --ini-loader $INI_LOADER $ARG_NEW_SPL $ARG_EXT_BOOT_IMG
 	else
 		rm uboot.img trust*.img -rf
-		./scripts/fit-vboot-uboot.sh --no-vboot --no-rebuild --ini-trust $INI_TRUST --ini-loader $INI_LOADER  $ARG_NEW_SPL
+		./scripts/fit-vboot-uboot.sh --no-vboot --no-rebuild --ini-trust $INI_TRUST --ini-loader $INI_LOADER  $ARG_NEW_SPL $ARG_EXT_BOOT_IMG
 		echo "pack uboot.img (with uboot trust) okay! Input: $INI_TRUST"
 	fi
 }
@@ -747,7 +750,7 @@ function pack_images()
 			pack_trust_image
 			pack_loader_image
 		elif [ "$IMAGE_FORMAT" = "FIT" ]; then
-			pack_fit_image $ARG_ROLLBACK_IDX_UBOOT $ARG_ROLLBACK_IDX_BOOT --ini-trust $INI_TRUST --ini-loader $INI_LOADER  $ARG_NEW_SPL
+			pack_fit_image $ARG_ROLLBACK_IDX_UBOOT $ARG_ROLLBACK_IDX_BOOT --ini-trust $INI_TRUST --ini-loader $INI_LOADER  $ARG_NEW_SPL $ARG_EXT_BOOT_IMG
 		fi
 	fi
 }

commit ae994be4c156b720cb15cfba8bdde327d2c3c862
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 8 16:40:05 2020 +0800

    scripts: fit: support "--boot_img" args to sign image
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I0ce040df7b66089462d19a63e144f28ce9cc7fc1

diff --git a/scripts/fit-base.sh b/scripts/fit-base.sh
index a2a6a49a5f..446a120826 100755
--- a/scripts/fit-base.sh
+++ b/scripts/fit-base.sh
@@ -6,31 +6,32 @@
 #
 set -e
 
-FIT_DIR="fit"
 KEY_DIR="keys"
+FIT_DIR="fit"
+FIT_DIR_UNPACK="$FIT_DIR/unpack"
+# offset
 FIT_NS_OFFS_UBOOT="0xa00"
 FIT_NS_OFFS_BOOT="0x800"
 FIT_S_OFFS_UBOOT="0xc00"
 FIT_S_OFFS_BOOT="0xc00"
 # itb
-FIT_ITB_UBOOT="fit/uboot.itb"
-FIT_ITB_BOOT="fit/boot.itb"
+FIT_ITB_UBOOT="$FIT_DIR/uboot.itb"
+FIT_ITB_BOOT="$FIT_DIR/boot.itb"
 # resign
-FIT_ITB_RESIG="fit/sig-new.itb"
-FIT_ITB_RESIG_BACKUP="fit/sig-backup.itb"
-FIT_SIG_P1="fit/sig.p1"
-FIT_SIG_P2="fit/sig.p2.sig"
-FIT_SIG_P3="fit/sig.p3"
-# data to be signed
-FIT_DATA2SIG_UBOOT="fit/uboot.data2sign"
-FIT_DATA2SIG_BOOT="fit/boot.data2sign"
+FIT_ITB_RESIG="$FIT_DIR/sig-new.itb"
+FIT_ITB_RESIG_BACKUP="$FIT_DIR/sig-backup.itb"
+FIT_SIG_P1="$FIT_DIR/sig.p1"
+FIT_SIG_P2="$FIT_DIR/sig.p2.sig"
+FIT_SIG_P3="$FIT_DIR/sig.p3"
+# data to sign
+FIT_DATA2SIG_UBOOT="$FIT_DIR/uboot.data2sign"
+FIT_DATA2SIG_BOOT="$FIT_DIR/boot.data2sign"
 # unmap
-FIT_UNMAP_ITB_UBOOT="fit/uboot_unmap_itb.dts"
-FIT_UNMAP_ITB_BOOT="fit/boot_unmap_itb.dts"
-FIT_UNMAP_KEY_UBOOT="fit/uboot_unmap_key.dts"
-FIT_UNMAP_KEY_BOOT="fit/boot_unmap_key.dts"
+FIT_UNMAP_ITB_UBOOT="$FIT_DIR/uboot_unmap_itb.its"
+FIT_UNMAP_KEY_UBOOT="$FIT_DIR/uboot_unmap_key.its"
+FIT_UNMAP_ITB_BOOT="$FIT_DIR/boot_unmap_itb.its"
+FIT_UNMAP_KEY_BOOT="$FIT_DIR/boot_unmap_key.its"
 # file
-FIT_ITS_BOOT="kernel_arm.its"
 CHIP_FILE="arch/arm/lib/.asm-offsets.s.cmd"
 # placeholder address
 FIT_FDT_ADDR_PLACEHOLDER="0xffffff00"
@@ -115,6 +116,10 @@ function fit_process_args()
 				arg_check_decimal $2
 				shift 2
 				;;
+			--boot_img)
+				ARGS_EXT_BOOT_IMG=$2
+				shift 2
+				;;
 			*)
 				usage_pack
 				exit 1
@@ -146,6 +151,7 @@ function fit_rebuild()
 	fi
 
 	mkdir -p $FIT_DIR
+	mkdir -p $FIT_DIR_UNPACK
 }
 
 function fit_uboot_make_itb()
@@ -271,8 +277,14 @@ function fit_uboot_make_itb()
 
 function fit_boot_make_itb()
 {
-	cp arch/arm/mach-rockchip/$FIT_ITS_BOOT ./
-	its_file_check $FIT_ITS_BOOT
+	if [ ! -z $ARGS_EXT_BOOT_IMG ]; then
+		./scripts/fit-unpack.sh -f $ARGS_EXT_BOOT_IMG -o $FIT_DIR/unpack
+		FIT_ITS_BOOT="$FIT_DIR/unpack/image.its"
+	else
+		FIT_ITS_BOOT="kernel_arm.its"
+		cp arch/arm/mach-rockchip/$FIT_ITS_BOOT ./
+		its_file_check $FIT_ITS_BOOT
+	fi
 
 	# output boot.itb
 	if [ "$ARG_NO_VBOOT" = "y" ]; then

commit 436376efb7004be2d944d59ca26c29890f93fae7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 8 16:43:31 2020 +0800

    scripts: fit: support unpack its from itb file
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I0bec62cc6ba31b2c7e7293f32f751e4a639c7917

diff --git a/scripts/fit-unpack.sh b/scripts/fit-unpack.sh
index ac973e80ad..f3771c7287 100755
--- a/scripts/fit-unpack.sh
+++ b/scripts/fit-unpack.sh
@@ -6,6 +6,8 @@
 #
 set -e
 
+IMAGE_ITS="image.its"
+
 function usage()
 {
 	echo
@@ -104,10 +106,39 @@ function gen_images()
 		fi
 	done
 
-	rm $output/unpack.txt
 	echo
 }
 
+function gen_its()
+{
+	./scripts/dtc/dtc -I dtb -O dts $IMAGE -o $IMAGE_DIR/$IMAGE_ITS >/dev/null 2>&1
+
+	FIT_IMAGE_ITS=$IMAGE_DIR/$IMAGE_ITS
+
+	# remove
+	sed -i "/memreserve/d"       $FIT_IMAGE_ITS
+	sed -i "/data-size/d"        $FIT_IMAGE_ITS
+	sed -i "/data-position/d"    $FIT_IMAGE_ITS
+	sed -i "/value/d"            $FIT_IMAGE_ITS
+	sed -i "/hashed-strings/d"   $FIT_IMAGE_ITS
+	sed -i "/hashed-nodes/d"     $FIT_IMAGE_ITS
+	sed -i "/signer-version/d"   $FIT_IMAGE_ITS
+	sed -i "/signer-name/d"      $FIT_IMAGE_ITS
+	sed -i "/timestamp/d"        $FIT_IMAGE_ITS
+
+	# add placeholder
+	sed -i '/image = /a\	\	\	data = /incbin/("IMAGE_PATH");' $FIT_IMAGE_ITS
+
+	# fixup placeholder: "data = /incbin/("...");"
+	num=`grep 'image =' $FIT_IMAGE_ITS | wc -l`
+	for ((i = 1; i <= $num; i++));
+	do
+		NAME=`grep 'image =' $FIT_IMAGE_ITS | sed -n ''${i}p'' | awk '{ printf $3 }' | tr -d '";'`
+		sed -i ''$i',/IMAGE_PATH/{s/IMAGE_PATH/.\/'$NAME'/}'  $FIT_IMAGE_ITS
+	done
+}
+
 args_process $*
 gen_images
+gen_its
 

commit 5facc6b84e42d8fb07a96523784a4c8c1cd4299f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 8 13:02:27 2020 +0800

    scripts: fit: update variant name
    
    Use upper case.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Icd3a42c897c93ceaed593906bbda12bd9d2e663e

diff --git a/scripts/fit-unpack.sh b/scripts/fit-unpack.sh
index 2fb7ba5eb4..ac973e80ad 100755
--- a/scripts/fit-unpack.sh
+++ b/scripts/fit-unpack.sh
@@ -24,11 +24,11 @@ function args_process()
 	while [ $# -gt 0 ]; do
 		case $1 in
 			-f)
-				file=$2
+				IMAGE=$2
 				shift 2
 				;;
 			-o)
-				output=$2
+				IMAGE_DIR=$2
 				shift 2
 				;;
 			*)
@@ -38,51 +38,51 @@ function args_process()
 		esac
 	done
 
-	if [ ! -f $file ]; then
-		echo "ERROR: No $file"
+	if [ ! -f $IMAGE ]; then
+		echo "ERROR: No $IMAGE"
 		exit 1
 	fi
 
-	if [ -z $output ]; then
-		output="out"
+	if [ -z $IMAGE_DIR ]; then
+		IMAGE_DIR="out"
 	fi
 
-	mkdir -p $output
+	mkdir -p $IMAGE_DIR
 }
 
 function gen_images()
 {
-	printf "\n# Unpack $file to directory $output/\n"
-	fdtget -l $file /images > $output/unpack.txt
-	cat $output/unpack.txt | while read line
+	printf "\n# Unpack $IMAGE to directory $IMAGE_DIR/\n"
+	fdtget -l $IMAGE /images > $IMAGE_DIR/unpack.txt
+	cat $IMAGE_DIR/unpack.txt | while read line
 	do
 		# generate image
-		node="/images/${line}"
-		name=`fdtget -ts $file $node image`
-		offs=`fdtget -ti $file $node data-position`
-		size=`fdtget -ti $file $node data-size`
-		if [ -z $offs ]; then
+		NODE="/images/${line}"
+		NAME=`fdtget -ts $IMAGE $NODE image`
+		OFFS=`fdtget -ti $IMAGE $NODE data-position`
+		SIZE=`fdtget -ti $IMAGE $NODE data-size`
+		if [ -z $OFFS ]; then
 			continue;
 		fi
 
-		if [ $size -ne 0 ]; then
-			dd if=$file of=$output/dd.tmp  bs=$offs skip=1  >/dev/null 2>&1
-			dd if=$output/dd.tmp of=$output/$name bs=$size count=1 >/dev/null 2>&1
-			rm $output/dd.tmp
+		if [ $SIZE -ne 0 ]; then
+			dd if=$IMAGE of=$IMAGE_DIR/dd.tmp  bs=$OFFS skip=1  >/dev/null 2>&1
+			dd if=$IMAGE_DIR/dd.tmp of=$IMAGE_DIR/$NAME bs=$SIZE count=1 >/dev/null 2>&1
+			rm $IMAGE_DIR/dd.tmp
 		else
-			touch $output/$name
+			touch $IMAGE_DIR/$NAME
 		fi
 
 		# hash verify
-		algo=`fdtget -ts $file $node/hash@1 algo`
+		algo=`fdtget -ts $IMAGE $NODE/hash@1 algo`
 		if [ -z $algo ]; then
-			printf "    %-20s: %d bytes" $name $size
+			printf "    %-20s: %d bytes" $NAME $SIZE
 			continue;
 		fi
 
-		data=`fdtget -tx $file $node/hash@1 value`
+		data=`fdtget -tx $IMAGE $NODE/hash@1 value`
 		data=`echo " "$data | sed "s/ / 0x/g"`
-		csum=`"$algo"sum $output/$name | awk '{ print $1}'`
+		csum=`"$algo"sum $IMAGE_DIR/$NAME | awk '{ print $1}'`
 
 		hash=""
 		for((i=1;;i++));
@@ -96,8 +96,8 @@ function gen_images()
 			hash="$hash$hex"
 		done
 
-		printf "  %-20s: %d bytes... %s" $name $size $algo
-		if [ "$csum" = "$hash" -o $size -eq 0 ]; then
+		printf "  %-20s: %d bytes... %s" $NAME $SIZE $algo
+		if [ "$csum" = "$hash" -o $SIZE -eq 0 ]; then
 			echo "+"
 		else
 			echo "-"

commit ca6206136c4290108b7e507c2c86cc6ff1fe0637
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 8 09:36:02 2020 +0800

    scripts: fit: fixup "arch" property for arm64
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ie45b89215bd5ae636e4753fc47bfb60a3829b40f

diff --git a/scripts/fit-base.sh b/scripts/fit-base.sh
index bac715df20..a2a6a49a5f 100755
--- a/scripts/fit-base.sh
+++ b/scripts/fit-base.sh
@@ -30,6 +30,7 @@ FIT_UNMAP_ITB_BOOT="fit/boot_unmap_itb.dts"
 FIT_UNMAP_KEY_UBOOT="fit/uboot_unmap_key.dts"
 FIT_UNMAP_KEY_BOOT="fit/boot_unmap_key.dts"
 # file
+FIT_ITS_BOOT="kernel_arm.its"
 CHIP_FILE="arch/arm/lib/.asm-offsets.s.cmd"
 # placeholder address
 FIT_FDT_ADDR_PLACEHOLDER="0xffffff00"
@@ -270,12 +271,6 @@ function fit_uboot_make_itb()
 
 function fit_boot_make_itb()
 {
-	if grep -q '^CONFIG_ARM64=y' .config ; then
-		FIT_ITS_BOOT="kernel_arm64.its"
-	else
-		FIT_ITS_BOOT="kernel_arm.its"
-	fi
-
 	cp arch/arm/mach-rockchip/$FIT_ITS_BOOT ./
 	its_file_check $FIT_ITS_BOOT
 
@@ -315,6 +310,11 @@ function fit_boot_make_itb()
 		sed -i "s/$FIT_FDT_ADDR_PLACEHOLDER/$FDT_ADDR_R/g"         $FIT_ITS_BOOT
 		sed -i "s/$FIT_KERNEL_ADDR_PLACEHOLDER/$KERNEL_ADDR_R/g"   $FIT_ITS_BOOT
 		sed -i "s/$FIT_RAMDISK_ADDR_PLACEHOLDER/$RMADISK_ADDR_R/g" $FIT_ITS_BOOT
+
+		if grep -q '^CONFIG_ARM64=y' .config ; then
+			sed -i 's/arch = "arm";/arch = "arm64";/g' $FIT_ITS_BOOT
+		fi
+
 		if [ "$ROLLBACK_PROTECT" = "y" ]; then
 			sed -i "s/rollback-index = <0x0>/rollback-index = <$ARG_ROLLBACK_IDX_BOOT>/g" $FIT_ITS_BOOT
 		fi

commit 5a157e97d57cf1982680f08fb2986d4206700d47
Merge: 23858492ef 725378455f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue May 12 10:37:37 2020 +0800

    Merge branch 'thunder-boot' into next-dev

commit 23858492efbd6afb687aef87ff1ec276310cdfd5
Author: Shunqing Chen <csq@rock-chips.com>
Date:   Sat Mar 21 09:32:05 2020 +0800

    power: charge animation: fix the issue that did not auto turn off screen
    
    1.set auto_wakeup_screen_invert to 1 and set auto_off_screen_interval to 0.
    2.set auto_screen_off_timeout to 1.
    2.press power key to turn on screen.
    3.screen will not be turned off at this time.
    
    Change-Id: Ifc92f23a38d8ba0da4f6e37625b4114edb42f6a8
    Signed-off-by: Shunqing Chen <csq@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index fa0a752085..66b661158f 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -155,7 +155,9 @@ static int check_key_press(struct udevice *dev)
 				state = KEY_PRESS_DOWN;
 			}
 		}
-	} else if (pdata->auto_off_screen_interval) {
+	}
+	if (!pdata->auto_wakeup_screen_invert &&
+	    pdata->auto_off_screen_interval) {
 		if (priv->auto_screen_off_timeout &&
 		    get_timer(priv->auto_screen_off_timeout) >
 		    pdata->auto_off_screen_interval * 1000) {	/* 1000ms */

commit c9e94690bae8a96b23658fb09c0c37d6f41e0cff
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Sun Apr 26 09:56:58 2020 +0800

    mtd: mtd_blk: Optimize map table reinitialization
    
    Change-Id: Ie27c8a215568755857cf67444637b1d89f55bd3a
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index c24f2fcdb9..1fceb00691 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -18,6 +18,9 @@
 #define MTD_PART_INFO_MAX_SIZE		512
 #define MTD_SINGLE_PART_INFO_MAX_SIZE	40
 
+#define MTD_BLK_TABLE_BLOCK_UNKNOWN	(-2)
+#define MTD_BLK_TABLE_BLOCK_SHIFT	(-1)
+
 static int *mtd_map_blk_table;
 
 int mtd_blk_map_table_init(struct blk_desc *desc,
@@ -47,19 +50,23 @@ int mtd_blk_map_table_init(struct blk_desc *desc,
 		blk_total = (mtd->size + mtd->erasesize - 1) / mtd->erasesize;
 		if (!mtd_map_blk_table) {
 			mtd_map_blk_table = (int *)malloc(blk_total * 4);
-			for (i = 0; i < blk_total; i++)
-				mtd_map_blk_table[i] = i;
+			memset(mtd_map_blk_table, MTD_BLK_TABLE_BLOCK_UNKNOWN,
+			       blk_total * 4);
 		}
 
 		blk_begin = (u32)offset / mtd->erasesize;
 		blk_cnt = ((u32)(offset % mtd->erasesize + length) / mtd->erasesize);
 		if ((blk_begin + blk_cnt) > blk_total)
 			blk_cnt = blk_total - blk_begin;
+
+		if (mtd_map_blk_table[blk_begin] != MTD_BLK_TABLE_BLOCK_UNKNOWN)
+			return 0;
+
 		j = 0;
 		 /* should not across blk_cnt */
 		for (i = 0; i < blk_cnt; i++) {
 			if (j >= blk_cnt)
-				mtd_map_blk_table[blk_begin + i] = -1;
+				mtd_map_blk_table[blk_begin + i] = MTD_BLK_TABLE_BLOCK_SHIFT;
 			for (; j < blk_cnt; j++) {
 				if (!mtd_block_isbad(mtd, (blk_begin + j) * mtd->erasesize)) {
 					mtd_map_blk_table[blk_begin + i] = blk_begin + j;
@@ -95,7 +102,9 @@ static __maybe_unused int mtd_map_read(struct mtd_info *mtd, loff_t offset,
 
 		mapped_offset = offset;
 		mapped = false;
-		if (mtd_map_blk_table)  {
+		if (mtd_map_blk_table &&
+		    mtd_map_blk_table[(u64)offset / erasesize] !=
+		    MTD_BLK_TABLE_BLOCK_UNKNOWN)  {
 			mapped = true;
 			mapped_offset = (loff_t)((u32)mtd_map_blk_table[(u64)offset /
 				erasesize] * erasesize + block_offset);
diff --git a/include/mtd_blk.h b/include/mtd_blk.h
index 35ab58ef63..5063e989a7 100644
--- a/include/mtd_blk.h
+++ b/include/mtd_blk.h
@@ -12,5 +12,8 @@
  * @return mtd part info. If fail, return NULL
  */
 char *mtd_part_parse(void);
+int mtd_blk_map_table_init(struct blk_desc *desc,
+			   loff_t offset,
+			   size_t length);
 
 #endif

commit 725378455f5cbedcb6bb7dd2d182533d823435d7
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Sat May 9 17:06:23 2020 +0800

    rockchip: dts: rv1126: add mmc-ecsd to emmc node
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Iddf35b82a9aed0e25a407a844949f932e2c26c17

diff --git a/arch/arm/dts/rv1126-u-boot.dtsi b/arch/arm/dts/rv1126-u-boot.dtsi
index 19766a0514..3af991ef94 100644
--- a/arch/arm/dts/rv1126-u-boot.dtsi
+++ b/arch/arm/dts/rv1126-u-boot.dtsi
@@ -26,6 +26,7 @@
 };
 
 &emmc {
+	mmc-ecsd = <0x0020f000>;
 	u-boot,dm-spl;
 };
 

commit 2438a166f4d748d9819af263fe94f22957ad7fd3
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Thu Apr 23 17:20:19 2020 +0800

    clk: rockchip: rv1126: Add support for gmac
    
    Change-Id: I10ade6acbbfe5dd23e33a250ef601948606bc57e
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rv1126.h b/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
index ee8ccaeefe..757ddd89f0 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
@@ -337,11 +337,43 @@ enum {
 	CLK_NANDC_DIV_SHIFT	= 0,
 	CLK_NANDC_DIV_MASK	= 0xff,
 
+	/* CRU_CLK_SEL61_CON */
+	CLK_GMAC_OUT_SEL_SHIFT	= 15,
+	CLK_GMAC_OUT_SEL_MASK	= 0x1 << CLK_GMAC_OUT_SEL_SHIFT,
+	CLK_GMAC_OUT_SEL_CPLL	= 0,
+	CLK_GMAC_OUT_SEL_GPLL,
+	CLK_GMAC_OUT_DIV_SHIFT	= 8,
+	CLK_GMAC_OUT_DIV_MASK	= 0x1f << CLK_GMAC_OUT_DIV_SHIFT,
+
+	/* CRU_CLK_SEL63_CON */
+	PCLK_GMAC_DIV_SHIFT	= 8,
+	PCLK_GMAC_DIV_MASK	= 0x1f << PCLK_GMAC_DIV_SHIFT,
+	CLK_GMAC_SRC_SEL_SHIFT	= 7,
+	CLK_GMAC_SRC_SEL_MASK	= 0x1 << CLK_GMAC_SRC_SEL_SHIFT,
+	CLK_GMAC_SRC_SEL_CPLL	= 0,
+	CLK_GMAC_SRC_SEL_GPLL,
+	CLK_GMAC_SRC_DIV_SHIFT	= 0,
+	CLK_GMAC_SRC_DIV_MASK	= 0x1f << CLK_GMAC_SRC_DIV_SHIFT,
+
 	/* CRU_GMAC_CON */
 	GMAC_SRC_M1_SEL_SHIFT	= 5,
 	GMAC_SRC_M1_SEL_MASK	= 0x1 << GMAC_SRC_M1_SEL_SHIFT,
 	GMAC_SRC_M1_SEL_INT	= 0,
 	GMAC_SRC_M1_SEL_EXT,
+	GMAC_MODE_SEL_SHIFT	= 4,
+	GMAC_MODE_SEL_MASK	= 0x1 << GMAC_MODE_SEL_SHIFT,
+	GMAC_RGMII_MODE		= 0,
+	GMAC_RMII_MODE,
+	RGMII_CLK_SEL_SHIFT	= 2,
+	RGMII_CLK_SEL_MASK	= 0x3 << RGMII_CLK_SEL_SHIFT,
+	RGMII_CLK_DIV0		= 0,
+	RGMII_CLK_DIV1,
+	RGMII_CLK_DIV50,
+	RGMII_CLK_DIV5,
+	RMII_CLK_SEL_SHIFT	= 1,
+	RMII_CLK_SEL_MASK	= 0x1 << RMII_CLK_SEL_SHIFT,
+	RMII_CLK_DIV20		= 0,
+	RMII_CLK_DIV2,
 	GMAC_SRC_M0_SEL_SHIFT	= 0,
 	GMAC_SRC_M0_SEL_MASK	= 0x1,
 	GMAC_SRC_M0_SEL_INT	= 0,
diff --git a/drivers/clk/rockchip/clk_rv1126.c b/drivers/clk/rockchip/clk_rv1126.c
index 0d587bf812..0ff0e47c6c 100644
--- a/drivers/clk/rockchip/clk_rv1126.c
+++ b/drivers/clk/rockchip/clk_rv1126.c
@@ -1288,6 +1288,114 @@ static ulong rv1126_scr1_set_clk(struct rv1126_clk_priv *priv, ulong rate)
 	return rv1126_scr1_get_clk(priv);
 }
 
+static ulong rv1126_gmac_src_get_clk(struct rv1126_clk_priv *priv)
+{
+	struct rv1126_cru *cru = priv->cru;
+	u32 div, sel, con, parent;
+
+	con = readl(&cru->clksel_con[63]);
+	div = (con & CLK_GMAC_SRC_DIV_MASK) >> CLK_GMAC_SRC_DIV_SHIFT;
+	sel = (con & CLK_GMAC_SRC_SEL_MASK) >> CLK_GMAC_SRC_SEL_SHIFT;
+	if (sel == CLK_GMAC_SRC_SEL_CPLL)
+		parent = priv->cpll_hz;
+	else if (sel == CLK_GMAC_SRC_SEL_GPLL)
+		parent = priv->gpll_hz;
+	else
+		return -ENOENT;
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rv1126_gmac_src_set_clk(struct rv1126_clk_priv *priv, ulong rate)
+{
+	struct rv1126_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->cpll_hz, rate);
+	assert(src_clk_div - 1 <= 31);
+	rk_clrsetreg(&cru->clksel_con[63],
+		     CLK_GMAC_SRC_SEL_MASK | CLK_GMAC_SRC_DIV_MASK,
+		     CLK_GMAC_SRC_SEL_CPLL << CLK_GMAC_SRC_SEL_SHIFT |
+		     (src_clk_div - 1) << CLK_GMAC_SRC_DIV_SHIFT);
+
+	return rv1126_gmac_src_get_clk(priv);
+}
+
+static ulong rv1126_gmac_out_get_clk(struct rv1126_clk_priv *priv)
+{
+	struct rv1126_cru *cru = priv->cru;
+	u32 div, sel, con, parent;
+
+	con = readl(&cru->clksel_con[61]);
+	div = (con & CLK_GMAC_OUT_DIV_MASK) >> CLK_GMAC_OUT_DIV_SHIFT;
+	sel = (con & CLK_GMAC_OUT_SEL_MASK) >> CLK_GMAC_OUT_SEL_SHIFT;
+	if (sel == CLK_GMAC_OUT_SEL_CPLL)
+		parent = priv->cpll_hz;
+	else if (sel == CLK_GMAC_OUT_SEL_GPLL)
+		parent = priv->gpll_hz;
+	else
+		return -ENOENT;
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rv1126_gmac_out_set_clk(struct rv1126_clk_priv *priv, ulong rate)
+{
+	struct rv1126_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->cpll_hz, rate);
+	assert(src_clk_div - 1 <= 31);
+	rk_clrsetreg(&cru->clksel_con[61],
+		     CLK_GMAC_OUT_SEL_MASK | CLK_GMAC_OUT_DIV_MASK,
+		     CLK_GMAC_OUT_SEL_CPLL << CLK_GMAC_OUT_SEL_SHIFT |
+		     (src_clk_div - 1) << CLK_GMAC_OUT_DIV_SHIFT);
+
+	return rv1126_gmac_out_get_clk(priv);
+}
+
+static ulong rv1126_gmac_tx_rx_set_clk(struct rv1126_clk_priv *priv, ulong rate)
+{
+	struct rv1126_cru *cru = priv->cru;
+	u32 con, sel, div_sel;
+
+	con = readl(&cru->gmac_con);
+	sel = (con & GMAC_MODE_SEL_MASK) >> GMAC_MODE_SEL_SHIFT;
+
+	if (sel == GMAC_RGMII_MODE) {
+		if (rate == 2500000)
+			div_sel = RGMII_CLK_DIV50;
+		else if (rate == 25000000)
+			div_sel = RGMII_CLK_DIV5;
+		else
+			div_sel = RGMII_CLK_DIV0;
+		rk_clrsetreg(&cru->gmac_con, RGMII_CLK_SEL_MASK,
+			     div_sel << RGMII_CLK_SEL_SHIFT);
+	} else if (sel == GMAC_RMII_MODE) {
+		if (rate == 2500000)
+			div_sel = RMII_CLK_DIV20;
+		else
+			div_sel = RMII_CLK_DIV2;
+		rk_clrsetreg(&cru->gmac_con, RMII_CLK_SEL_MASK,
+			     div_sel << RMII_CLK_SEL_SHIFT);
+	}
+
+	return 0;
+}
+
+static ulong rv1126_pclk_gmac_get_clk(struct rv1126_clk_priv *priv)
+{
+	struct rv1126_cru *cru = priv->cru;
+	u32 div, con, parent;
+
+	parent = rv1126_pdphp_get_clk(priv, ACLK_PDPHP);
+
+	con = readl(&cru->clksel_con[63]);
+	div = (con & PCLK_GMAC_DIV_MASK) >> PCLK_GMAC_DIV_SHIFT;
+
+	return DIV_TO_RATE(parent, div);
+}
+
 static ulong rv1126_clk_get_rate(struct clk *clk)
 {
 	struct rv1126_clk_priv *priv = dev_get_priv(clk->dev);
@@ -1372,6 +1480,15 @@ static ulong rv1126_clk_get_rate(struct clk *clk)
 	case CLK_SCR1_CORE:
 		rate = rv1126_scr1_get_clk(priv);
 		break;
+	case CLK_GMAC_SRC:
+		rate = rv1126_gmac_src_get_clk(priv);
+		break;
+	case CLK_GMAC_ETHERNET_OUT:
+		rate = rv1126_gmac_out_get_clk(priv);
+		break;
+	case PCLK_GMAC:
+		rate = rv1126_pclk_gmac_get_clk(priv);
+		break;
 	default:
 		return -ENOENT;
 	}
@@ -1463,6 +1580,15 @@ static ulong rv1126_clk_set_rate(struct clk *clk, ulong rate)
 	case CLK_SCR1_CORE:
 		ret = rv1126_scr1_set_clk(priv, rate);
 		break;
+	case CLK_GMAC_SRC:
+		ret = rv1126_gmac_src_set_clk(priv, rate);
+		break;
+	case CLK_GMAC_ETHERNET_OUT:
+		ret = rv1126_gmac_out_set_clk(priv, rate);
+		break;
+	case CLK_GMAC_TX_RX:
+		ret = rv1126_gmac_tx_rx_set_clk(priv, rate);
+		break;
 	default:
 		return -ENOENT;
 	}
@@ -1643,6 +1769,21 @@ static int rv1126_gmac_src_m1_set_parent(struct clk *clk, struct clk *parent)
 	return 0;
 }
 
+static int rv1126_gmac_tx_rx_set_parent(struct clk *clk, struct clk *parent)
+{
+	struct rv1126_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rv1126_cru *cru = priv->cru;
+
+	if (parent->id == RGMII_MODE_CLK)
+		rk_clrsetreg(&cru->gmac_con, GMAC_MODE_SEL_MASK,
+			     GMAC_RGMII_MODE << GMAC_MODE_SEL_SHIFT);
+	else
+		rk_clrsetreg(&cru->gmac_con, GMAC_MODE_SEL_MASK,
+			     GMAC_RMII_MODE << GMAC_MODE_SEL_SHIFT);
+
+	return 0;
+}
+
 static int rv1126_clk_set_parent(struct clk *clk, struct clk *parent)
 {
 	switch (clk->id) {
@@ -1652,6 +1793,8 @@ static int rv1126_clk_set_parent(struct clk *clk, struct clk *parent)
 		return rv1126_gmac_src_m0_set_parent(clk, parent);
 	case CLK_GMAC_SRC_M1:
 		return rv1126_gmac_src_m1_set_parent(clk, parent);
+	case CLK_GMAC_TX_RX:
+		return rv1126_gmac_tx_rx_set_parent(clk, parent);
 	default:
 		return -ENOENT;
 	}

commit 2d2c232ae5ddc31343ec7da30e7145bfd373f57f
Author: Hans Yang <yhx@rock-chips.com>
Date:   Fri May 8 09:25:12 2020 +0800

    configs: rk3036: enable CONFIG_RKSFC_NAND
    
    Change-Id: I24fc4806a4a70bcceadcda7ca79c6e0151416b00
    Signed-off-by: Hans Yang <yhx@rock-chips.com>

diff --git a/configs/rk3036_defconfig b/configs/rk3036_defconfig
index 28ea56a8c8..66a219d274 100644
--- a/configs/rk3036_defconfig
+++ b/configs/rk3036_defconfig
@@ -81,6 +81,8 @@ CONFIG_SPL_RAM=y
 CONFIG_DM_RESET=y
 CONFIG_RKNAND=y
 CONFIG_RKFLASH=y
+CONFIG_RKNANDC_NAND=y
+CONFIG_RKSFC_NAND=y
 CONFIG_RKSFC_NOR=y
 # CONFIG_TPL_DM_SERIAL is not set
 CONFIG_DEBUG_UART_BASE=0x20068000

commit b0c9708366a121d23e23405ac9256bb63e430a40
Merge: ab6f8011c4 311b6440bf
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 8 15:52:44 2020 +0800

    Merge branch 'next-dev' into thunder-boot

commit 311b6440bfc444f486f1ab55a6faa32645019d7f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 8 09:32:33 2020 +0800

    rockchip: kernel_arm.its: update descriptions
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I329a361dabf320be9be658ebd832e0c06ec5666f

diff --git a/arch/arm/mach-rockchip/kernel_arm.its b/arch/arm/mach-rockchip/kernel_arm.its
index 871f90d42b..baa966b777 100644
--- a/arch/arm/mach-rockchip/kernel_arm.its
+++ b/arch/arm/mach-rockchip/kernel_arm.its
@@ -8,12 +8,12 @@
 
 /dts-v1/;
 / {
-	description = "U-Boot FIT source file for arm";
+	description = "FIT source file for Linux";
 	#address-cells = <1>;
 
 	images {
 		fdt@1 {
-			description = "Device tree blob for arm";
+			description = "Device tree blob";
 			image = "rk-kernel.dtb";
 			data = /incbin/("images/rk-kernel.dtb");
 			type = "flat_dt";
@@ -26,7 +26,7 @@
 		};
 
 		kernel@1 {
-			description = "Kernel for arm";
+			description = "Kernel Image";
 			image = "kernel.img";
 			data = /incbin/("images/kernel.img");
 			type = "kernel";
@@ -41,7 +41,7 @@
 		};
 
 		ramdisk@1 {
-			description = "Ramdisk for arm";
+			description = "Ramdisk Image";
 			image = "ramdisk.img";
 			data = /incbin/("images/ramdisk.img");
 			type = "ramdisk";
@@ -55,7 +55,7 @@
 		};
 
 		resource@1 {
-			description = "Resource for arm";
+			description = "Resource Image";
 			image = "resource.img";
 			data = /incbin/("images/resource.img");
 			type = "multi";

commit 98a624f3ed2bd311e851ddef30c33411066d5f11
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 8 09:27:21 2020 +0800

    rockchip: remove kernel_arm64.its
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I03215ddcba76564529c08147b68b2acaf745bc0c

diff --git a/arch/arm/mach-rockchip/kernel_arm64.its b/arch/arm/mach-rockchip/kernel_arm64.its
deleted file mode 100644
index 226e35b567..0000000000
--- a/arch/arm/mach-rockchip/kernel_arm64.its
+++ /dev/null
@@ -1,86 +0,0 @@
-/*
- * Copyright (C) 2020 Fuzhou Rockchip Electronics Co., Ltd
- *
- * Minimal dts for a FIT image.
- *
- * SPDX-License-Identifier: GPL-2.0
- */
-
-/dts-v1/;
-/ {
-	description = "U-Boot FIT source file for arm64";
-	#address-cells = <1>;
-
-	images {
-		fdt@1 {
-			description = "Device tree blob for arm64";
-			image = "rk-kernel.dtb";
-			data = /incbin/("images/rk-kernel.dtb");
-			type = "flat_dt";
-			arch = "arm64";
-			compression = "none";
-			load  = <0xffffff00>;
-			hash@1 {
-				algo = "sha256";
-			};
-		};
-
-		kernel@1 {
-			description = "Kernel for arm64";
-			image = "kernel.img";
-			data = /incbin/("images/kernel.img");
-			type = "kernel";
-			arch = "arm64";
-			os = "linux";
-			compression = "none";
-			entry = <0xffffff01>;
-			load  = <0xffffff01>;
-			hash@1 {
-				algo = "sha256";
-			};
-		};
-
-		ramdisk@1 {
-			description = "Ramdisk for arm64";
-			image = "ramdisk.img";
-			data = /incbin/("images/ramdisk.img");
-			type = "ramdisk";
-			arch = "arm64";
-			os = "linux";
-			compression = "none";
-			load  = <0xffffff02>;
-			hash@1 {
-				algo = "sha256";
-			};
-		};
-
-		resource@1 {
-			description = "Resource for arm64";
-			image = "resource.img";
-			data = /incbin/("images/resource.img");
-			type = "multi";
-			arch = "arm64";
-			compression = "none";
-			hash@1 {
-				algo = "sha256";
-			};
-		};
-	};
-
-	configurations {
-		default = "conf@1";
-		conf@1 {
-			description = "Boot Linux kernel with FDT blob";
-			rollback-index = <0x0>;
-			fdt = "fdt@1";
-			kernel = "kernel@1";
-			ramdisk = "ramdisk@1";
-			multi = "resource@1";
-			signature@1 {
-				algo = "sha256,rsa2048";
-				key-name-hint = "dev";
-				sign-images = "fdt", "kernel", "ramdisk", "multi";
-			};
-		};
-	};
-};

commit 2056aa9f86373808c70196cf4bcede35e66091db
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed May 6 22:10:17 2020 +0800

    drivers: mmc: pass the mmc ext_csd to kernel
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I95dbd0da5d8750e5b19f00a54596ca484f72ecb2

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index fdaf5a0ba3..14141601a3 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -572,7 +572,17 @@ static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
 
 	err = mmc_send_cmd(mmc, &cmd, &data);
 	memcpy(mmc_ext_csd, ext_csd, 512);
-
+#if defined(CONFIG_MMC_USE_PRE_CONFIG) && defined(CONFIG_SPL_BUILD)
+	char *mmc_ecsd_base = NULL;
+	ulong mmc_ecsd;
+
+	mmc_ecsd = dev_read_u32_default(mmc->dev, "mmc-ecsd", 0);
+	mmc_ecsd_base = (char *)mmc_ecsd;
+	if (mmc_ecsd_base) {
+		memcpy(mmc_ecsd_base, ext_csd, 512);
+		*(unsigned int *)(mmc_ecsd_base + 512) = 0x55aa55aa;
+	}
+#endif
 	return err;
 }
 

commit ab6f8011c491ddaacbaf3667c5ed9aa79aad6538
Merge: f78661739a e68ead627b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed May 6 18:29:50 2020 +0800

    Merge branch 'next-dev' into thunder-boot

commit e68ead627bf377b0093270b83ec565be46d72eed
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Apr 27 17:45:54 2020 +0800

    disk: part: auto append android a/b slot suffix when query partition
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I13d6e46f362c0f2d50824fd6bc858521d2d35433

diff --git a/disk/part.c b/disk/part.c
index e7ef19154e..55a20be9ba 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -11,6 +11,9 @@
 #include <ide.h>
 #include <malloc.h>
 #include <part.h>
+#ifdef CONFIG_SPL_AB
+#include <spl_ab.h>
+#endif
 #include <ubifs_uboot.h>
 #ifdef CONFIG_ANDROID_AB
 #include <android_avb/avb_ops_user.h>
@@ -671,7 +674,6 @@ cleanup:
 	return ret;
 }
 
-#ifdef CONFIG_ANDROID_AB
 /*
  * For android A/B system, we append the current slot suffix quietly,
  * this takes over the responsibility of slot suffix appending from
@@ -688,14 +690,18 @@ int part_get_info_by_name(struct blk_desc *dev_desc, const char *name,
 	part_drv = part_driver_lookup_type(dev_desc);
 	if (!part_drv)
 		return -1;
-#ifndef CONFIG_SPL_BUILD
+#if defined(CONFIG_ANDROID_AB) && !defined(CONFIG_SPL_BUILD)
 	/* 1. Query partition with A/B slot suffix */
 	if (rk_avb_append_part_slot(name, name_slot))
 		return -1;
+#elif defined(CONFIG_SPL_AB) && defined(CONFIG_SPL_BUILD)
+	if (spl_ab_append_part_slot(dev_desc, name, name_slot))
+		return -1;
+#else
+	strcpy(name_slot, name);
 #endif
 retry:
 	debug("## Query partition(%d): %s\n", none_slot_try, name_slot);
-
 	for (i = 1; i < part_drv->max_entries; i++) {
 		ret = part_drv->get_info(dev_desc, i, info);
 		if (ret != 0) {
@@ -718,33 +724,6 @@ retry:
 	return -1;
 }
 
-#else
-int part_get_info_by_name(struct blk_desc *dev_desc, const char *name,
-			  disk_partition_t *info)
-{
-	struct part_driver *part_drv;
-	int ret;
-	int i;
-
-	part_drv = part_driver_lookup_type(dev_desc);
-	if (!part_drv)
-		return -1;
-	for (i = 1; i < part_drv->max_entries; i++) {
-		ret = part_drv->get_info(dev_desc, i, info);
-		if (ret != 0) {
-			/* no more entries in table */
-			break;
-		}
-		if (strcmp(name, (const char *)info->name) == 0) {
-			/* matched */
-			return i;
-		}
-	}
-
-	return -1;
-}
-#endif
-
 void part_set_generic_name(const struct blk_desc *dev_desc,
 	int part_num, char *name)
 {

commit 1e33e3cb7c543a31ca9ba7d940328073e397b0fb
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Apr 27 17:05:50 2020 +0800

    common: spl: ab: update new function to support ab system
    
    Add spl_ab_append_part_slot()
    Delete spl_get_partitions_sector()
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I116d6d708604762203974dc66a39be1a0e7b6bbe

diff --git a/common/spl/spl_ab.c b/common/spl/spl_ab.c
index 428e44cd81..2c6f71f9d2 100644
--- a/common/spl/spl_ab.c
+++ b/common/spl/spl_ab.c
@@ -242,26 +242,24 @@ out:
 	return 0;
 }
 
-int spl_get_partitions_sector(struct blk_desc *dev_desc, char *partition,
-			       u32 *sectors)
+int spl_ab_append_part_slot(struct blk_desc *dev_desc,
+			    const char *part_name,
+			    char *new_name)
 {
-	disk_partition_t part_info;
-	char part[10] = {0};
-	char slot[3] = {0};
-
-	if (!partition || !sectors)
-		return -EFAULT;
+	char slot_suffix[3] = {0};
 
-	spl_get_current_slot(dev_desc, "misc", slot);
-	if (strlen(partition) > 8)
-		return -ENOMEM;
+	if (!strcmp(part_name, "misc")) {
+		strcat(new_name, part_name);
+		return 0;
+	}
 
-	strcat(part, partition);
-	strcat(part, slot);
-	if (part_get_info_by_name(dev_desc, part, &part_info) < 0)
-		return -ENODEV;
+	if (spl_get_current_slot(dev_desc, "misc", slot_suffix)) {
+		printf("%s: failed to get slot suffix !\n", __func__);
+		return -1;
+	}
 
-	*sectors = part_info.start;
+	strcpy(new_name, part_name);
+	strcat(new_name, slot_suffix);
 
 	return 0;
 }
diff --git a/include/spl_ab.h b/include/spl_ab.h
index b5be70f5bf..fc854787cd 100644
--- a/include/spl_ab.h
+++ b/include/spl_ab.h
@@ -24,13 +24,16 @@ int spl_get_current_slot(struct blk_desc *dev_desc, char *partition,
 			 char *slot);
 
 /*
- * spl_get_partitions_sector
+ * spl_ab_append_part_slot
  *
  * @dev_desc: block description
- * @partition: partition name
- * @sectors: firmware load address
+ * @part_name: partition name
+ * @new_name: append the slot suffix
+ *
+ * return: 0 success, others fail.
  */
-int spl_get_partitions_sector(struct blk_desc *dev_desc, char *partition,
-			       u32 *sectors);
+int spl_ab_append_part_slot(struct blk_desc *dev_desc,
+			    const char *part_name,
+			    char *new_name);
 
  #endif

commit 9561619343197e660df2d6b25e802c0be3b48bab
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Apr 27 16:59:03 2020 +0800

    common: spl: mmc: delete ab system support in rkfw process
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I9cafffa266fbbe2c18c4300fdddb89944430cc0c

diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c
index 6be61dd8d3..6baec6c921 100644
--- a/common/spl/spl_mmc.c
+++ b/common/spl/spl_mmc.c
@@ -9,7 +9,6 @@
 #include <common.h>
 #include <dm.h>
 #include <spl.h>
-#include <spl_ab.h>
 #include <spl_rkfw.h>
 #include <linux/compiler.h>
 #include <errno.h>
@@ -74,15 +73,6 @@ int mmc_load_image_raw_sector(struct spl_image_info *spl_image,
 	load.bl_len = mmc->read_bl_len;
 	load.read = h_spl_load_read;
 
-#ifdef CONFIG_SPL_AB
-	char trust_partition[] = "trust";
-	char uboot_partition[] = "uboot";
-
-	spl_get_partitions_sector(mmc_get_blk_desc(mmc), trust_partition,
-				  &trust_sectors);
-	spl_get_partitions_sector(mmc_get_blk_desc(mmc), uboot_partition,
-				  &uboot_sectors);
-#endif
 	ret = spl_load_rkfw_image(spl_image, &load,
 				  trust_sectors,
 				  uboot_sectors,

commit f78661739a233e9c1e4ef31e34d568f2bf9499f6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Apr 29 19:45:19 2020 +0800

    configs: add rv1109 defconfig
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I1a6bd138ac3a205d54e5bcabeb9df0c7e493b0fb

diff --git a/configs/rv1109_defconfig b/configs/rv1109_defconfig
new file mode 100644
index 0000000000..8b770b292b
--- /dev/null
+++ b/configs/rv1109_defconfig
@@ -0,0 +1,144 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0xc000
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh"
+CONFIG_ROCKCHIP_RV1109=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_ROCKCHIP_FIT_IMAGE=y
+CONFIG_ROCKCHIP_UIMAGE=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_STACK_R_ADDR=0x3fe0000
+CONFIG_TARGET_EVB_RV1126=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_DEFAULT_DEVICE_TREE="rv1109-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_FIT_HW_CRYPTO=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_HW_CRYPTO=y
+# CONFIG_SPL_SYS_DCACHE_OFF is not set
+CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_SPL_BOARD_INIT=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_SHA256_SUPPORT=y
+CONFIG_SPL_CRYPTO_SUPPORT=y
+CONFIG_SPL_HASH_SUPPORT=y
+CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_OPTEE=y
+CONFIG_FASTBOOT_BUF_ADDR=0x800800
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPT=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_ITEST is not set
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_NET is not set
+# CONFIG_CMD_NFS is not set
+# CONFIG_CMD_MISC is not set
+CONFIG_CMD_MTD_BLK=y
+# CONFIG_ISO_PARTITION is not set
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_SPL_DTB_MINIMUM=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_MKIMAGE_DTC_PATH="scripts/dtc/dtc"
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_DM_CRYPTO=y
+CONFIG_SPL_DM_CRYPTO=y
+CONFIG_ROCKCHIP_CRYPTO_V2=y
+CONFIG_SPL_ROCKCHIP_CRYPTO_V2=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_RK8XX_PWRKEY=y
+CONFIG_ADC_KEY=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MTD=y
+CONFIG_MTD_BLK=y
+CONFIG_MTD_DEVICE=y
+CONFIG_NAND=y
+CONFIG_NAND_ROCKCHIP=y
+CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
+CONFIG_SYS_NAND_U_BOOT_OFFS=0x4000
+CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND=0x10000
+CONFIG_MTD_SPI_NAND=y
+CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0x1
+CONFIG_SF_DEFAULT_SPEED=50000000
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPI_FLASH_MTD=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_NANENG_USB2=y
+CONFIG_PINCTRL=y
+CONFIG_DM_PMIC=y
+# CONFIG_SPL_PMIC_CHILDREN is not set
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0xff570000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_ROCKCHIP_SFC=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x110b
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_IRQ2GPIO_V2=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_RSA=y
+CONFIG_SPL_RSA=y
+CONFIG_SHA512=y
+CONFIG_ERRNO_STR=y
+# CONFIG_EFI_LOADER is not set

commit c0bb763bf0dff13be0cb6b01f5090e7f28c800bf
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Apr 29 19:45:01 2020 +0800

    rockchip: add RV1109 support
    
    The Rockchip RV1109 is a ARM-based SoC with a dual-core Cortex-A7
    and a risc-v core.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I4d60512dccf1c72b5c592afea6c5cfeb93ec628b

diff --git a/arch/arm/dts/rv1109-evb.dts b/arch/arm/dts/rv1109-evb.dts
new file mode 100644
index 0000000000..b4764fcf61
--- /dev/null
+++ b/arch/arm/dts/rv1109-evb.dts
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd.
+ */
+
+/dts-v1/;
+#include "rv1126-evb.dts"
+
+/ {
+	model = "Rockchip RV1109 Evaluation Board";
+	compatible = "rockchip,rv1109-evb", "rockchip,rv1109";
+};
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index f52f6a7e1a..454a419d79 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -433,6 +433,13 @@ config ROCKCHIP_RV1126
 	  The Rockchip RV1126 is a ARM-based SoC with a quad-core Cortex-A7
 	  and a risc-v core.
 
+config ROCKCHIP_RV1109
+	bool "Support Rockchip RV1109"
+	select ROCKCHIP_RV1126
+	help
+	  The Rockchip RV1109 is a ARM-based SoC with a dual-core Cortex-A7
+	  and a risc-v core.
+
 config SPL_ROCKCHIP_BACK_TO_BROM
 	bool "SPL returns to bootrom"
 	default y if ROCKCHIP_RK3036
diff --git a/arch/arm/mach-rockchip/chip_info.c b/arch/arm/mach-rockchip/chip_info.c
index aaddd0de94..232facc0fd 100644
--- a/arch/arm/mach-rockchip/chip_info.c
+++ b/arch/arm/mach-rockchip/chip_info.c
@@ -91,6 +91,8 @@ int rockchip_rockusb_get_chip_info(unsigned int chip_info[])
 		chip_info[0] = 0x33333043;
 #elif defined(CONFIG_ROCKCHIP_RK1808)
 		chip_info[0] = 0x31383041;
+#elif defined(CONFIG_ROCKCHIP_RV1109)
+		chip_info[0] = 0x31313039;
 #elif defined(CONFIG_ROCKCHIP_RV1126)
 		chip_info[0] = 0x31313236;
 #endif

commit 2d3e1fe4646104a3f7df3e9326a5d82e89ed2606
Merge: 69c44458d7 c495a36ee4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed May 6 10:47:46 2020 +0800

    Merge branch 'next-dev' into thunder-boot

commit c495a36ee4ae2ff2bd174a11b874b56aeba63b95
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed May 6 10:19:32 2020 +0800

    rockchip: resource: fix reading hw-id dtbs failed
    
    - search order: hw-id dtbs => rk-kernel.dtb.
    - initial resource list if empty.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I8f174aad96f1afc4b9792d2fe5cffb841a730233

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 1b432f75a4..41c2873055 100644
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -824,6 +824,11 @@ static struct resource_file *rockchip_read_hwid_dtb(void)
 	struct resource_file *file;
 	struct list_head *node;
 
+	if (list_empty(&entrys_head)) {
+		if (init_resource_list())
+			return NULL;
+	}
+
 	/* Find dtb file according to hardware id(GPIO/ADC) */
 	list_for_each(node, &entrys_head) {
 		file = list_entry(node, struct resource_file, link);
@@ -849,10 +854,13 @@ int rockchip_read_resource_dtb(void *fdt_addr, char **hash, int *hash_size)
 	struct resource_file *file;
 	int ret;
 
-	file = get_file_info(DTB_FILE);
 #ifdef CONFIG_ROCKCHIP_HWID_DTB
+	file = rockchip_read_hwid_dtb();
+	/* If dtbs matched hardware id(GPIO/ADC) not found, try the default */
 	if (!file)
-		file = rockchip_read_hwid_dtb();
+		file = get_file_info(DTB_FILE);
+#else
+	file = get_file_info(DTB_FILE);
 #endif
 	if (!file)
 		return -ENODEV;

commit a79e8fe670b56a7a8a5a00e96d14572d6b7c0a36
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed May 6 10:17:53 2020 +0800

    rockchip: fit: read kernel dtb from resource file firstly
    
    In order to support reading hw-id dtbs from resource file.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I2a8e8f69ebb1dcba71375c67e08aea8ee68af9e2

diff --git a/arch/arm/mach-rockchip/fit.c b/arch/arm/mach-rockchip/fit.c
index dda3d3f060..445c466993 100644
--- a/arch/arm/mach-rockchip/fit.c
+++ b/arch/arm/mach-rockchip/fit.c
@@ -243,47 +243,6 @@ static int fit_image_load_one(void *fit, struct blk_desc *dev_desc,
 	return 0;
 }
 
-static int fit_image_load_fdt(void *fit, struct blk_desc *dev_desc,
-			      disk_partition_t *part, int images,
-			      int defconf, void *dst)
-{
-	return fit_image_load_one(fit, dev_desc, part, images,
-				  defconf, FIT_FDT_PROP, dst);
-}
-
-#ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
-static int fit_image_load_resource(void *fit, struct blk_desc *dev_desc,
-				   disk_partition_t *part, int images,
-				   int defconf, ulong *addr)
-{
-	ulong fdt_addr_r, dst;
-	int offset, size;
-	int err;
-
-	err = fit_get_load_and_data(fit, images, defconf, FIT_MULTI_PROP,
-				    NULL, &offset, &size);
-	if (err)
-		return err;
-
-	fdt_addr_r = env_get_ulong("fdt_addr_r", 16, 0);
-	if (!fdt_addr_r)
-		return -EINVAL;
-
-	/* reserve enough space before fdt */
-	dst = fdt_addr_r -
-		ALIGN(size, dev_desc->blksz) - CONFIG_SYS_FDT_PAD;
-
-	if (!sysmem_alloc_base(MEM_RESOURCE, (phys_addr_t)dst,
-			       ALIGN(size, dev_desc->blksz)))
-		return -ENOMEM;
-
-	*addr = dst;
-
-	return fit_image_load_one(fit, dev_desc, part, images, defconf,
-				  FIT_MULTI_PROP, (void *)dst);
-}
-#endif
-
 static void *fit_get_blob(struct blk_desc *dev_desc, disk_partition_t *part)
 {
 	void *fit, *fdt;
@@ -329,6 +288,47 @@ fail:
 	return NULL;
 }
 
+#ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
+static int fit_image_load_resource(void *fit, struct blk_desc *dev_desc,
+				   disk_partition_t *part, int images,
+				   int defconf, ulong *addr)
+{
+	ulong fdt_addr_r, dst;
+	int offset, size;
+	int err;
+
+	err = fit_get_load_and_data(fit, images, defconf, FIT_MULTI_PROP,
+				    NULL, &offset, &size);
+	if (err)
+		return err;
+
+	fdt_addr_r = env_get_ulong("fdt_addr_r", 16, 0);
+	if (!fdt_addr_r)
+		return -EINVAL;
+
+	/* reserve enough space before fdt */
+	dst = fdt_addr_r -
+		ALIGN(size, dev_desc->blksz) - CONFIG_SYS_FDT_PAD;
+
+	if (!sysmem_alloc_base(MEM_RESOURCE, (phys_addr_t)dst,
+			       ALIGN(size, dev_desc->blksz)))
+		return -ENOMEM;
+
+	*addr = dst;
+
+	return fit_image_load_one(fit, dev_desc, part, images, defconf,
+				  FIT_MULTI_PROP, (void *)dst);
+}
+#else
+
+static int fit_image_load_fdt(void *fit, struct blk_desc *dev_desc,
+			      disk_partition_t *part, int images,
+			      int defconf, void *dst)
+{
+	return fit_image_load_one(fit, dev_desc, part, images,
+				  defconf, FIT_FDT_PROP, dst);
+}
+
 static int fit_image_get_fdt_hash(void *fit, int images, int defconf,
 				  char **hash, int *hash_size)
 {
@@ -386,6 +386,7 @@ static int fit_image_get_fdt_hash(void *fit, int images, int defconf,
 
 	return 0;
 }
+#endif
 
 ulong fit_image_get_bootable_size(void *fit)
 {
@@ -470,8 +471,10 @@ static void verbose_msg(void *fit, int defconf)
 	      fit_is_signed(fit, gd_fdt_blob()) ? "" : "no ",
 	      fit_is_required(fit, gd_fdt_blob()) ? "" : "no ");
 
+#ifndef CONFIG_ROCKCHIP_RESOURCE_IMAGE
 	printf("DTB: %s\n",
 	       (char *)fdt_getprop(fit, defconf, FIT_FDT_PROP, NULL));
+#endif
 }
 
 int rockchip_read_fit_dtb(void *fdt_addr, char **hash, int *hash_size)
@@ -480,10 +483,10 @@ int rockchip_read_fit_dtb(void *fdt_addr, char **hash, int *hash_size)
 	disk_partition_t part;
 	char *part_name;
 	void *fit;
-	ulong rsce;
+	ulong rsce __maybe_unused;
 	int images;
 	int defconf;
-	int err;
+	int ret;
 
 	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {
@@ -496,10 +499,10 @@ int rockchip_read_fit_dtb(void *fdt_addr, char **hash, int *hash_size)
 	else
 		part_name = PART_BOOT;
 
-	err = part_get_info_by_name(dev_desc, part_name, &part);
-	if (err < 0) {
+	ret = part_get_info_by_name(dev_desc, part_name, &part);
+	if (ret < 0) {
 		FIT_I("No %s partition\n", part_name);
-		return err;
+		return ret;
 	}
 
 	fit = fit_get_blob(dev_desc, &part);
@@ -510,41 +513,43 @@ int rockchip_read_fit_dtb(void *fdt_addr, char **hash, int *hash_size)
 
 	if (fit_get_image_defconf_node(fit, &images, &defconf)) {
 		FIT_I("Failed to get /images and /configures default\n");
-		err = -ENODEV;
+		ret = -ENODEV;
 		goto out;
 	}
 
-	if (fit_image_load_fdt(fit, dev_desc, &part,
-			       images, defconf, fdt_addr)) {
-		FIT_I("Failed to load fdt\n");
-		err = -EINVAL;
+#ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
+	ret = fit_image_load_resource(fit, dev_desc, &part,
+				      images, defconf, &rsce);
+	if (ret) {
+		FIT_I("Failed to load resource\n");
 		goto out;
 	}
 
-	err = fit_image_get_fdt_hash(fit, images, defconf, hash, hash_size);
-	if (err && err != -ENODEV) {
-		FIT_I("Failed to get fdt hash\n");
-		err = -EINVAL;
+	ret = resource_create_ram_list(dev_desc, (void *)rsce);
+	if (ret) {
+		FIT_I("Failed to create resource list\n");
 		goto out;
 	}
 
-	verbose_msg(fit, defconf);
+	ret = rockchip_read_resource_dtb(fdt_addr, hash, hash_size);
+#else
+	ret = fit_image_load_fdt(fit, dev_desc, &part, images,
+				 defconf, fdt_addr);
+	if (ret) {
+		FIT_I("Failed to load fdt\n");
+		goto out;
+	}
 
-	/* load resource file */
-#ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
-	err = fit_image_load_resource(fit, dev_desc, &part,
-				      images, defconf, &rsce);
-	if (!err) {
-		if (resource_create_ram_list(dev_desc, (void *)rsce))
-			FIT_I("Failed to create resource list\n");
-	} else if (err == -ENODEV) {
-		FIT_I("No resource file\n");
-	} else {
-		FIT_I("Failed to load resource file\n");
+	ret = fit_image_get_fdt_hash(fit, images, defconf, hash, hash_size);
+	if (ret) {
+		FIT_I("Failed to get fdt hash\n");
+		goto out;
 	}
 #endif
+
+	verbose_msg(fit, defconf);
 out:
 	free(fit);
 
-	return err;
+	return ret;
 }

commit 69c44458d7fa77c934840527c02dd2f121881df4
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Sat May 2 16:32:40 2020 +0800

    rockchip: dts: rv1126: fix saradc compatible
    
    The saradc of rv1126 is 6-channel 10 bits like rk3399.
    
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
    Change-Id: I5b92d2995bfa15c0ce62c262a3d978cfeda863e5

diff --git a/arch/arm/dts/rv1126.dtsi b/arch/arm/dts/rv1126.dtsi
index 23f8005ec2..856bdfb9d9 100644
--- a/arch/arm/dts/rv1126.dtsi
+++ b/arch/arm/dts/rv1126.dtsi
@@ -965,7 +965,7 @@
 	};
 
 	saradc: saradc@ff5e0000 {
-		compatible = "rockchip,saradc";
+		compatible = "rockchip,rk3399-saradc";
 		reg = <0xff5e0000 0x100>;
 		interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
 		#io-channel-cells = <1>;

commit c64e256218dfdfd11d1ab7a4998201ed6cc45beb
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Thu Apr 16 20:17:58 2020 +0800

    tools: add pack kernel tool for rv1108
    
    Change-Id: I9a8e1b2884bcc26144162e3ca838750bef69907a
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>
    Signed-off-by: Zhichao Yu <zhichao.yu@rock-chips.com>

diff --git a/tools/rockchip/loaderimage.c b/tools/rockchip/loaderimage.c
index 43cdaa18df..db0cfcd186 100644
--- a/tools/rockchip/loaderimage.c
+++ b/tools/rockchip/loaderimage.c
@@ -18,10 +18,11 @@ extern uint32_t crc32_rk(uint32_t, const unsigned char *, uint32_t);
 #define OPT_UNPACK "--unpack"
 #define OPT_UBOOT "--uboot"
 #define OPT_TRUSTOS "--trustos"
+#define OPT_KERNEL "--kernel"
 #define OPT_SIZE "--size"
 #define OPT_VERSION "--version"
 #define OPT_INFO "--info"
-#define OPT_PREPATH             "--prepath"
+#define OPT_PREPATH "--prepath"
 
 /* pack or unpack */
 #define MODE_PACK 0
@@ -32,6 +33,7 @@ extern uint32_t crc32_rk(uint32_t, const unsigned char *, uint32_t);
 /* image type */
 #define IMAGE_UBOOT 0
 #define IMAGE_TRUST 1
+#define IMAGE_KERNEL 2
 
 /* magic and hash size */
 #define LOADER_MAGIC_SIZE 8
@@ -62,6 +64,14 @@ extern uint32_t crc32_rk(uint32_t, const unsigned char *, uint32_t);
 #define RK_TRUST_MAGIC "TOS     "
 #define RK_TRUST_RUNNING_ADDR (CONFIG_SYS_TEXT_BASE + SZ_128M + SZ_4M)
 
+#define KERNEL_NAME		"kernel"
+#define KERNEL_NUM		1
+#define KERNEL_MAX_SIZE		30720 * 1024
+#define KERNEL_VERSION_STRING	"kernel os"
+
+#define RK_KERNEL_MAGIC		"KERNEL"
+#define RK_KERNEL_RUNNING_ADDR	(CONFIG_SYS_TEXT_BASE + SZ_4M)
+
 typedef struct tag_second_loader_hdr {
 	uint8_t magic[LOADER_MAGIC_SIZE]; /* magic */
 	uint32_t version;
@@ -72,7 +82,8 @@ typedef struct tag_second_loader_hdr {
 	uint32_t hash_len;              /* 20 or 32 , 0 is no hash */
 	uint8_t hash[LOADER_HASH_SIZE]; /* sha */
 
-	uint8_t reserved[1024 - 32 - 32];
+	unsigned int js_hash;			/*js hsah*/
+	unsigned char reserved[1024-32-32-4];
 	uint32_t signTag;     /* 0x4E474953 */
 	uint32_t signlen;     /* maybe 128 or 256 */
 	uint8_t rsaHash[256]; /* maybe 128 or 256, using max size 256 */
@@ -81,7 +92,7 @@ typedef struct tag_second_loader_hdr {
 
 void usage(const char *prog)
 {
-	fprintf(stderr, "Usage: %s [--pack|--unpack] [--uboot|--trustos]\
+	fprintf(stderr, "Usage: %s [--pack|--unpack] [--uboot|--trustos|--kernel]\
 		file_in "
 	        "file_out [load_addr]  [--size] [size number]\
 		[--version] "
@@ -112,6 +123,17 @@ unsigned int str2hex(char *str)
 	return value;
 }
 
+static uint32_t js_hash(uint8_t *buf, uint32_t len)
+{
+	uint32_t hash = 0x47C6A7E6;
+	uint32_t i;
+
+	for (i = 0; i < len; i++)
+		hash ^= ((hash << 5) + buf[i] + (hash >> 2));
+
+	return hash;
+}
+
 int main(int argc, char *argv[])
 {
 	int mode = -1, image = -1;
@@ -152,6 +174,13 @@ int main(int argc, char *argv[])
 			/* detect whether loader address is delivered */
 			if ((argv[i + 1]) && (strncmp(argv[i + 1], "--", 2)))
 				in_loader_addr = str2hex(argv[++i]);
+		} else if (!strcmp(argv[i], OPT_KERNEL)) {
+			image = IMAGE_KERNEL;
+			file_in = argv[++i];
+			file_out = argv[++i];
+			/* detect whether loader address is delivered */
+			if ((argv[i + 1]) && (strncmp(argv[i + 1], "--", 2)))
+				in_loader_addr = str2hex(argv[++i]);
 		} else if (!strcmp(argv[i], OPT_SIZE)) {
 			in_size = strtoul(argv[++i], NULL, 10);
 			/*
@@ -198,6 +227,15 @@ int main(int argc, char *argv[])
 		max_num = in_num ? in_num : TRUST_NUM;
 		loader_addr =
 		        (in_loader_addr == -1) ? RK_TRUST_RUNNING_ADDR : in_loader_addr;
+	} else if (image == IMAGE_KERNEL) {
+		name = KERNEL_NAME;
+		magic = RK_KERNEL_MAGIC;
+		version = KERNEL_VERSION_STRING;
+		max_size = in_size ? in_size : KERNEL_MAX_SIZE;
+		max_num = in_num ? in_num : KERNEL_NUM;
+		loader_addr =
+		        (in_loader_addr == -1) ? RK_KERNEL_RUNNING_ADDR : in_loader_addr;
+
 	} else if (mode == MODE_INFO) {
 
 	} else {
@@ -261,7 +299,7 @@ int main(int argc, char *argv[])
 		hdr.crc32 = crc32_rk(
 		                    0, (const unsigned char *)buf + sizeof(second_loader_hdr), size);
 		printf("crc = 0x%08x\n", hdr.crc32);
-
+		hdr.js_hash = js_hash((uint8_t *)buf + sizeof(second_loader_hdr), size);
 #ifndef CONFIG_SECUREBOOT_SHA256
 		SHA_CTX ctx;
 		uint8_t *sha;
@@ -300,8 +338,11 @@ int main(int argc, char *argv[])
 
 		printf("%s version: %s\n", name, version);
 		memcpy(buf, &hdr, sizeof(second_loader_hdr));
-		for (i = 0; i < max_num; i++)
-			fwrite(buf, max_size, 1, fo);
+		if (image == IMAGE_KERNEL)
+			fwrite(buf, size + sizeof(second_loader_hdr), 1, fo);
+		else
+			for (i = 0; i < max_num; i++)
+				fwrite(buf, max_size, 1, fo);
 
 		printf("pack %s success! \n", file_out);
 		fclose(fi);

commit 28e73e3a8ef10cdf6a85a605b30ae62c0704008a
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Apr 28 16:24:52 2020 +0800

    configs: rv1126: enable system dcache
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I04f086f91ef719a6ea3afa25bf6138b6d412af00

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index 26b5727d7f..eec9fd4561 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -23,6 +23,7 @@ CONFIG_FIT=y
 CONFIG_FIT_HW_CRYPTO=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_FIT_HW_CRYPTO=y
+# CONFIG_SPL_SYS_DCACHE_OFF is not set
 CONFIG_BOOTDELAY=0
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set

commit 9c00c79ad8a2faf57d33727dd542b5bd372c7bd1
Merge: 7e0be77742 db9b4c53f2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Apr 29 09:52:58 2020 +0800

    Merge branch 'next-dev' into thunder-boot

commit db9b4c53f22e3b5cbec3fca34a69650ad2d1e0a6
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Apr 28 16:02:44 2020 +0800

    common: spl: change TLB memory base align to SZ_16K
    
    According to armv7 spec, translation table base 0 address is align to
    2^(14-n). The n is set by TTBCR and is set to zero in uboot.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I3d4c3f7165d3ef27bcc51d90471830f5e6dccae5

diff --git a/common/spl/spl.c b/common/spl/spl.c
index 7835b1871d..1def89970d 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -253,9 +253,9 @@ static int spl_dcache_enable(void)
 		free_bd = true;
 	}
 #endif
-	/* TLB memory should be 64KB base align and 4KB end align */
+	/* TLB memory should be SZ_16K base align and 4KB end align */
 	gd->arch.tlb_size = PGTABLE_SIZE;
-	gd->arch.tlb_addr = (ulong)memalign(SZ_64K, ALIGN(PGTABLE_SIZE, SZ_4K));
+	gd->arch.tlb_addr = (ulong)memalign(SZ_16K, ALIGN(PGTABLE_SIZE, SZ_4K));
 	if (!gd->arch.tlb_addr) {
 		debug("spl: no TLB memory\n");
 		return -ENOMEM;

commit 9b9964b191c820e9bddda752e8ed9b861a8b3261
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 28 15:07:05 2020 +0800

    make.sh: support pack loader with spl in rkbin
    
    Use args: "--new-spl" to pack loader with current build one.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Idfb4ca4135194c4cfb9d42eb3af0aecfc31be108

diff --git a/make.sh b/make.sh
index abb69f541b..8be5e22d39 100755
--- a/make.sh
+++ b/make.sh
@@ -186,6 +186,10 @@ function process_args()
 				shift 2
 				;;
 
+			--new-spl)
+				ARG_NEW_SPL=$1
+				shift 1
+				;;
 			map|sym|elf*)
 				ARG_SUBCMD=$1
 				if [ "$2" = "spl" -o "$2" = "tpl" ]; then
@@ -302,7 +306,7 @@ function sub_commands()
 
 		fit)
 			if [ "$opt" = "ns" ]; then
-				./scripts/fit-vboot.sh --no-vboot --ini-trust $INI_TRUST --ini-loader $INI_LOADER
+				./scripts/fit-vboot.sh --no-vboot --ini-trust $INI_TRUST --ini-loader $INI_LOADER $ARG_NEW_SPL
 			fi
 			exit 0
 			;;
@@ -348,7 +352,7 @@ function sub_commands()
 			;;
 
 		--rollback-index*)
-			pack_fit_image $ARG_ROLLBACK_IDX_UBOOT $ARG_ROLLBACK_IDX_BOOT --ini-trust $INI_TRUST --ini-loader $INI_LOADER
+			pack_fit_image $ARG_ROLLBACK_IDX_UBOOT $ARG_ROLLBACK_IDX_BOOT --ini-trust $INI_TRUST --ini-loader $INI_LOADER  $ARG_NEW_SPL
 			exit 0
 			;;
 
@@ -726,10 +730,10 @@ function pack_trust_image()
 function pack_fit_image()
 {
 	if grep -q '^CONFIG_FIT_SIGNATURE=y' .config ; then
-		./scripts/fit-vboot.sh $ARG_ROLLBACK_IDX_UBOOT $ARG_ROLLBACK_IDX_BOOT --ini-trust $INI_TRUST --ini-loader $INI_LOADER
+		./scripts/fit-vboot.sh $ARG_ROLLBACK_IDX_UBOOT $ARG_ROLLBACK_IDX_BOOT --ini-trust $INI_TRUST --ini-loader $INI_LOADER $ARG_NEW_SPL
 	else
 		rm uboot.img trust*.img -rf
-		./scripts/fit-vboot-uboot.sh --no-vboot --no-rebuild --ini-trust $INI_TRUST --ini-loader $INI_LOADER
+		./scripts/fit-vboot-uboot.sh --no-vboot --no-rebuild --ini-trust $INI_TRUST --ini-loader $INI_LOADER  $ARG_NEW_SPL
 		echo "pack uboot.img (with uboot trust) okay! Input: $INI_TRUST"
 	fi
 }
@@ -742,7 +746,7 @@ function pack_images()
 			pack_trust_image
 			pack_loader_image
 		elif [ "$IMAGE_FORMAT" = "FIT" ]; then
-			pack_fit_image $ARG_ROLLBACK_IDX_UBOOT $ARG_ROLLBACK_IDX_BOOT --ini-trust $INI_TRUST --ini-loader $INI_LOADER
+			pack_fit_image $ARG_ROLLBACK_IDX_UBOOT $ARG_ROLLBACK_IDX_BOOT --ini-trust $INI_TRUST --ini-loader $INI_LOADER  $ARG_NEW_SPL
 		fi
 	fi
 }

commit fe3372b26595022531bf19c4e55732dccba9ce69
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 28 15:04:12 2020 +0800

    scripts: fit: support pack loader with spl in rkbin
    
    Use args: "--new-spl" to pack loader with current build one.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I194a7df4a258f473bfa94aa949a33ea7d06ffbde

diff --git a/scripts/fit-base.sh b/scripts/fit-base.sh
index 7e76703406..bac715df20 100755
--- a/scripts/fit-base.sh
+++ b/scripts/fit-base.sh
@@ -56,6 +56,7 @@ function usage_pack()
 	fi
 	echo "    --no-vboot"
 	echo "    --no-check"
+	echo "    --new-spl"
 	echo
 }
 
@@ -79,26 +80,30 @@ function fit_process_args()
 {
 	while [ $# -gt 0 ]; do
 		case $1 in
-			--no-vboot)
+			--no-vboot)     # Force to build non-vboot image
 				ARG_NO_VBOOT="y"
 				shift 1
 				;;
-			--no-rebuild)
+			--no-rebuild)   # No rebuild with "./make.sh"
 				ARG_NO_REBUILD="y"
 				shift 1
 				;;
-			--no-check)
+			--no-check)     # No hostcc fit signature check
 				ARG_NO_CHECK="y"
 				shift 1
 				;;
-			--ini-trust)
+			--ini-trust)    # Assign trust ini file
 				ARG_INI_TRUST=$2
 				shift 2
 				;;
-			--ini-loader)
+			--ini-loader)   # Assign loader ini file
 				ARG_INI_LOADER=$2
 				shift 2
 				;;
+			--new-spl)      # Use current build u-boot-spl.bin to pack loader
+				ARG_NEW_SPL="y"
+				shift 1
+				;;
 			--rollback-index-boot)
 				ARG_ROLLBACK_IDX_BOOT=$2
 				arg_check_decimal $2
@@ -117,7 +122,7 @@ function fit_process_args()
 	done
 }
 
-function its_file_existence_check()
+function its_file_check()
 {
 	cat $1 | while read line
 	do
@@ -145,13 +150,18 @@ function fit_rebuild()
 function fit_uboot_make_itb()
 {
 	./make.sh itb $ARG_INI_TRUST
-	its_file_existence_check u-boot.its
+	its_file_check u-boot.its
 
 	# output uboot.itb
 	if [ "$ARG_NO_VBOOT" = "y" ]; then
 		SIGN_MSG="no-signed"
 		./tools/mkimage -f u-boot.its -E -p $FIT_NS_OFFS_UBOOT $FIT_ITB_UBOOT
-		./make.sh loader $ARG_INI_LOADER
+		if [ "$ARG_NEW_SPL" = "y" ]; then
+			./make.sh spl-s $ARG_INI_LOADER
+			echo "pack loader with: spl/u-boot-spl.bin"
+		else
+			./make.sh loader $ARG_INI_LOADER
+		fi
 	else
 		SIGN_MSG="signed"
 		if [ ! -f $KEY_DIR/dev.key ]; then
@@ -199,7 +209,21 @@ function fit_uboot_make_itb()
 		fi
 
 		if [ "$ARG_NO_CHECK" != "y" ]; then
-			./tools/fit_check_sign -f $FIT_ITB_UBOOT -k spl/u-boot-spl.dtb -s
+			if [ "$ARG_NEW_SPL" = "y" ]; then
+				./tools/fit_check_sign -f $FIT_ITB_UBOOT -k spl/u-boot-spl.dtb -s
+			else
+				# unpack legacy u-boot-spl.dtb
+				spl_file="../rkbin/"`sed -n "/FlashBoot=/s/FlashBoot=//p" $ARG_INI_LOADER |tr -d '\r'`
+				offs=`fdtdump -s $spl_file | head -1 | awk -F ":" '{ print $2 }' | sed "s/ found fdt at offset //g" | tr -d " "`
+				if [ -z $offs ]; then
+					echo "ERROR: invalid $spl_file, unable to find fdt blob"
+				fi
+				offs=`printf %d $offs` # hex -> dec
+				dd if=$spl_file of=spl/u-boot-spl-legacy.dtb bs=$offs skip=1  >/dev/null 2>&1
+
+				# check
+				./tools/fit_check_sign -f $FIT_ITB_UBOOT -k spl/u-boot-spl-legacy.dtb -s
+			fi
 		fi
 
 		# minimize spl dtb
@@ -217,13 +241,19 @@ function fit_uboot_make_itb()
 		fi
 
 		# repack spl which has rsa pub-key insert
-		ls *_loader_*.bin >/dev/null 2>&1 && rm *_loader_*.bin
-		cat spl/u-boot-spl-nodtb.bin > spl/u-boot-spl.bin
-		if ! grep  -q '^CONFIG_SPL_SEPARATE_BSS=y' .config ; then
-			cat spl/u-boot-spl-pad.bin >> spl/u-boot-spl.bin
+		rm *_loader_*.bin -rf
+		if [ "$ARG_NEW_SPL" = "y" ]; then
+			cat spl/u-boot-spl-nodtb.bin > spl/u-boot-spl.bin
+			if ! grep  -q '^CONFIG_SPL_SEPARATE_BSS=y' .config ; then
+				cat spl/u-boot-spl-pad.bin >> spl/u-boot-spl.bin
+			fi
+			cat spl/u-boot-spl.dtb >> spl/u-boot-spl.bin
+
+			./make.sh spl-s $ARG_INI_LOADER
+			echo "pack loader with: spl/u-boot-spl.bin"
+		else
+			./make.sh loader $ARG_INI_LOADER
 		fi
-		cat spl/u-boot-spl.dtb >> spl/u-boot-spl.bin
-		./make.sh spl-s $ARG_INI_LOADER
 	fi
 
 	# clean
@@ -233,7 +263,7 @@ function fit_uboot_make_itb()
 	cp u-boot.dtb $FIT_DIR
 	cp spl/u-boot-spl.bin $FIT_DIR
 	cp spl/u-boot-spl.dtb $FIT_DIR
-	ls u-boot.itb u-boot.img u-boot-dtb.img >/dev/null 2>&1 && rm u-boot.itb u-boot.img u-boot-dtb.img -rf
+	rm u-boot.itb u-boot.img u-boot-dtb.img -rf
 	./scripts/dtc/dtc -I dtb -O dts $FIT_ITB_UBOOT -o $FIT_UNMAP_ITB_UBOOT >/dev/null 2>&1
 	./scripts/dtc/dtc -I dtb -O dts spl/u-boot-spl.dtb -o $FIT_UNMAP_KEY_UBOOT >/dev/null 2>&1
 }
@@ -247,7 +277,7 @@ function fit_boot_make_itb()
 	fi
 
 	cp arch/arm/mach-rockchip/$FIT_ITS_BOOT ./
-	its_file_existence_check $FIT_ITS_BOOT
+	its_file_check $FIT_ITS_BOOT
 
 	# output boot.itb
 	if [ "$ARG_NO_VBOOT" = "y" ]; then
@@ -351,7 +381,7 @@ function fit_uboot_make_img()
 	fi
 
 	# multiple backup
-	ls $FIT_IMG_UBOOT >/dev/null 2>&1 && rm $FIT_IMG_UBOOT
+	rm $FIT_IMG_UBOOT -rf
 	for ((i = 0; i < $ITB_MAX_NUM; i++));
 	do
 		cat $ITB_FILE >> $FIT_IMG_UBOOT

commit 7e0be77742a5903a97b5f26200cf9bf3a517d318
Merge: e9e0746f31 b768b9152f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 27 18:03:41 2020 +0800

    Merge branch 'next-dev' into thunder-boot

commit e9e0746f312479862275123a4eba3284d05cf37b
Merge: 00c95c4989 88ea3acb7b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 27 16:54:06 2020 +0800

    Merge branch 'next-dev' into thunder-boot

commit b768b9152f5a531ad2bd6146094fc9cea0f93b71
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Apr 26 20:57:41 2020 +0800

    make.sh: refactor code
    
    - Mainly for refactoring args parse logic to support args
      without args order and relation requirement.
    - Unify trust and loader ini file parse and available for
      all functions.
    - Clean coding style.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I9dae6b7e535bef8c5ca1c2542d89ee8e08cee715

diff --git a/make.sh b/make.sh
index deb450c217..abb69f541b 100755
--- a/make.sh
+++ b/make.sh
@@ -6,11 +6,6 @@
 #
 
 set -e
-BOARD=$1
-SUBCMD=$1
-FUNCADDR=$1
-FILE=$2
-ARGS=$*
 JOB=`sed -n "N;/processor/p" /proc/cpuinfo|wc -l`
 SUPPORT_LIST=`ls configs/*[r,p][x,v,k][0-9][0-9]*_defconfig`
 
@@ -81,6 +76,9 @@ RKCHIP_LABEL="-"
 RKCHIP_LOADER="-"
 RKCHIP_TRUST="-"
 
+INI_TRUST=
+INI_LOADER=
+
 # Declare rkbin repository path, updated in prepare()
 RKBIN=
 
@@ -97,19 +95,20 @@ PLATFORM_RSA=
 PLATFORM_SHA=
 PLATFORM_UBOOT_IMG_SIZE=
 PLATFORM_TRUST_IMG_SIZE=
-PACK_FORMAT="rk"
-NOPACK="n"
+
+IMAGE_FORMAT="RKFW"
+IMAGE_NOPACK="n"
 
 #########################################################################################################
 function help()
 {
 	echo
 	echo "Usage:"
-	echo "	./make.sh [board|subcmd|EXT_DTB=<file>]"
+	echo "	./make.sh [board|sub-command]"
 	echo
-	echo "	 - board:   board name of defconfig"
-	echo "	 - subcmd:  |elf*|loader*|spl*|itb|trust*|uboot|map|sym|<addr>|EXT_DTB=*"
-	echo "	 - ini:     assigned ini file to pack trust/loader"
+	echo "	 - board:        board name of defconfig"
+	echo "	 - sub-command:  elf*|loader*|spl*|itb|trust*|uboot|map|sym|<addr>|EXT_DTB=*"
+	echo "	 - ini:          assigned ini file to pack trust/loader"
 	echo
 	echo "Output:"
 	echo "	 When board built okay, there are uboot/trust/loader images in current directory"
@@ -146,58 +145,11 @@ function help()
 
 function prepare()
 {
-	case $BOARD in
-		# Parse from exit .config
-		''|elf*|loader*|spl*|itb|debug*|trust|uboot|map|sym|env|EXT_DTB=*|fit*|nopack|--rollback-index*)
-		if [ ! -f .config ]; then
-			echo
-			echo "ERROR: No .config"
-			help
-			exit 1
-		fi
-		;;
-	esac
-
-	# Parse help and make defconfig
-	case $BOARD in
-		#Help
-		--help|-help|help|--h|-h)
-		help
-		exit 0
-		;;
-
-		#Subcmd
-		''|elf*|loader*|spl*|itb|debug*|trust*|uboot|map|sym|env|EXT_DTB=*|fit*|nopack|--rollback-index*)
-		;;
-
-		*)
-		#Func address is valid ?
-		if [ -z $(echo ${FUNCADDR} | sed 's/[0-9,a-f,A-F,x,X,-]//g') ]; then
-			return
-		elif [ ! -f configs/${BOARD}_defconfig ]; then
-			echo -e "\n${SUPPORT_LIST}\n"
-			echo "ERROR: No configs/${BOARD}_defconfig"
-			exit 1
-		else
-			echo "make for ${BOARD}_defconfig by -j${JOB}"
-			make ${BOARD}_defconfig ${OPTION}
-			# Skip 1st args
-			ARGS=`echo $ARGS | awk '{ $1=""; print $0 }'`
-		fi
-		;;
-	esac
-
-	# Initialize RKBIN
 	if [ -d ${RKBIN_TOOLS} ]; then
 		absolute_path=$(cd `dirname ${RKBIN_TOOLS}`; pwd)
 		RKBIN=${absolute_path}
 	else
-		echo
-		echo "No '../rkbin/' repository, please download it before pack image!"
-		echo "How to obtain? 3 ways:"
-		echo "	1. Login your Rockchip gerrit account: \"Projects\" -> \"List\" -> search \"rk/rkbin\" repository"
-		echo "	2. Github repository: https://github.com/rockchip-linux/rkbin"
-		echo "	3. Download full release SDK repository"
+		echo "ERROR: No ../rkbin repository"
 		exit 1
 	fi
 
@@ -206,7 +158,80 @@ function prepare()
 	fi
 
 	if grep  -q '^CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y' .config ; then
-		PACK_FORMAT="fit"
+		IMAGE_FORMAT="FIT"
+	fi
+}
+
+function process_args()
+{
+	while [ $# -gt 0 ]; do
+		case $1 in
+			--help|-help|help|--h|-h)
+				help
+				exit 0
+				;;
+
+			''|loader|trust|uboot|spl*|debug*|itb|env|EXT_DTB=*|nopack|fit*)
+				ARG_SUBCMD=$1
+				shift 1
+				;;
+
+			--rollback-index-uboot)
+				ARG_ROLLBACK_IDX_UBOOT="--rollback-index-uboot "$2
+				shift 2
+				;;
+
+			--rollback-index-boot)
+				ARG_ROLLBACK_IDX_BOOT="--rollback-index-boot "$2
+				shift 2
+				;;
+
+			map|sym|elf*)
+				ARG_SUBCMD=$1
+				if [ "$2" = "spl" -o "$2" = "tpl" ]; then
+					ARG_S_TPL=$2
+					shift 1
+				fi
+				shift 1
+				;;
+
+			*.ini|*.INI)
+				if [ ! -f $1 ]; then
+					echo "ERROR: No $1"
+				fi
+				if grep -q 'CODE471_OPTION' $1 ; then
+					ARG_INI_LOADER=$1
+				elif grep -Eq ''BL31_OPTION'|'TOS'' $1 ; then
+					ARG_INI_TRUST=$1
+				fi
+				shift 1
+				;;
+
+			*)
+				# FUNC address
+				if [ -z $(echo $1 | sed 's/[0-9,a-f,A-F,x,X,-]//g') ]; then
+					ARG_FUNCADDR=$1
+				else
+					ARG_BOARD=$1
+					if [ ! -f configs/${ARG_BOARD}_defconfig ]; then
+						echo -e "\n${SUPPORT_LIST}\n"
+						echo "ERROR: No configs/${ARG_BOARD}_defconfig"
+						exit 1
+					else
+						echo "make for ${ARG_BOARD}_defconfig by -j${JOB}"
+						make ${ARG_BOARD}_defconfig ${OPTION}
+					fi
+				fi
+				shift 1
+				;;
+		esac
+	done
+
+	if [ ! -f .config ]; then
+		echo
+		echo "ERROR: No .config"
+		help
+		exit 1
 	fi
 }
 
@@ -238,133 +263,135 @@ function select_toolchain()
 function sub_commands()
 {
 	# skip "--" parameter, such as "--rollback-index-..."
-	if [[ "$SUBCMD" != "--*" ]]; then
-		cmd=${SUBCMD%-*}
-		opt=${SUBCMD#*-}
+	if [[ "$ARG_SUBCMD" != "--*" ]]; then
+		cmd=${ARG_SUBCMD%-*}
+		opt=${ARG_SUBCMD#*-}
 	else
-		cmd=$SUBCMD
+		cmd=$ARG_SUBCMD
 	fi
 
-	elf=u-boot
-	map=u-boot.map
-	sym=u-boot.sym
-
-	if [ "$FILE" == "tpl" -o "$FILE" == "spl" ]; then
-		elf=`find -name u-boot-${FILE}`
-		map=`find -name u-boot-${FILE}.map`
-		sym=`find -name u-boot-${FILE}.sym`
+	if [ "$ARG_S_TPL" == "tpl" -o "$ARG_S_TPL" == "spl" ]; then
+		elf=`find -name u-boot-${ARG_S_TPL}`
+		map=`find -name u-boot-${ARG_S_TPL}.map`
+		sym=`find -name u-boot-${ARG_S_TPL}.sym`
+	else
+		elf=u-boot
+		map=u-boot.map
+		sym=u-boot.sym
 	fi
 
 	case $cmd in
 		elf)
-		if [ ! -f ${elf} ]; then
-			echo "ERROR: No elf: ${elf}"
-			exit 1
-		else
-			# default 'cmd' without option, use '-D'
-			if [ "${cmd}" = 'elf' -a "${opt}" = 'elf' ]; then
-				opt=D
+			if [ ! -f ${elf} ]; then
+				echo "ERROR: No elf: ${elf}"
+				exit 1
+			else
+				# default 'cmd' without option, use '-D'
+				if [ "${cmd}" = 'elf' -a "${opt}" = 'elf' ]; then
+					opt=D
+				fi
+				${TOOLCHAIN_OBJDUMP} -${opt} ${elf} | less
+				exit 0
 			fi
-			${TOOLCHAIN_OBJDUMP} -${opt} ${elf} | less
-			exit 0
-		fi
-		;;
+			;;
 
 		debug)
-		./scripts/rkpatch.sh ${opt}
-		exit 0
-		;;
+			./scripts/rkpatch.sh ${opt}
+			exit 0
+			;;
 
 		fit)
-		if [ "$opt" = "ns" ]; then
-			./scripts/fit-vboot.sh --no-vboot
-		fi
-		exit 0
-		;;
+			if [ "$opt" = "ns" ]; then
+				./scripts/fit-vboot.sh --no-vboot --ini-trust $INI_TRUST --ini-loader $INI_LOADER
+			fi
+			exit 0
+			;;
 
 		map)
-		cat ${map} | less
-		exit 0
-		;;
+			cat ${map} | less
+			exit 0
+			;;
 
 		sym)
-		cat ${sym} | less
-		exit 0
-		;;
+			cat ${sym} | less
+			exit 0
+			;;
 
 		trust)
-		pack_trust_image
-		exit 0
-		;;
+			pack_trust_image
+			exit 0
+			;;
 
 		loader)
-		pack_loader_image
-		exit 0
-		;;
+			pack_loader_image
+			exit 0
+			;;
 
 		spl)
-		pack_spl_loader_image ${opt}
-		exit 0
-		;;
+			pack_spl_loader_image ${opt}
+			exit 0
+			;;
 
 		itb)
-		pack_uboot_itb_image
-		exit 0
-		;;
+			pack_uboot_itb_image
+			exit 0
+			;;
 
 		uboot)
-		pack_uboot_image ${opt}
-		exit 0
-		;;
+			pack_uboot_image
+			exit 0
+			;;
 
 		env)
-		make CROSS_COMPILE=${TOOLCHAIN_GCC} envtools	
-		exit 0
-		;;
+			make CROSS_COMPILE=${TOOLCHAIN_GCC} envtools
+			exit 0
+			;;
 
 		--rollback-index*)
-		pack_fit_image $ARGS
-		exit 0
-		;;
+			pack_fit_image $ARG_ROLLBACK_IDX_UBOOT $ARG_ROLLBACK_IDX_BOOT --ini-trust $INI_TRUST --ini-loader $INI_LOADER
+			exit 0
+			;;
 
 		EXT_DTB=*)
-		OPTION=${SUBCMD}
-		;;
+			OPTION=${ARG_SUBCMD}
+			;;
 
 		nopack)
-		NOPACK="y"
-		;;
+			IMAGE_NOPACK="y"
+			;;
 
 		*)
-		# Search function and code position of address
-		RELOC_OFF=${FUNCADDR#*-}
-		FUNCADDR=${FUNCADDR%-*}
-		if [ -z $(echo ${FUNCADDR} | sed 's/[0-9,a-f,A-F,x,X,-]//g') ] && [ ${FUNCADDR} ]; then
-			# With prefix: '0x' or '0X'
-			if [ `echo ${FUNCADDR} | sed -n "/0[x,X]/p" | wc -l` -ne 0 ]; then
-				FUNCADDR=`echo $FUNCADDR | awk '{ print strtonum($0) }'`
-				FUNCADDR=`echo "obase=16;${FUNCADDR}"|bc |tr '[A-Z]' '[a-z]'`
-			fi
-			if [ `echo ${RELOC_OFF} | sed -n "/0[x,X]/p" | wc -l` -ne 0 ] && [ ${RELOC_OFF} ]; then
-				RELOC_OFF=`echo $RELOC_OFF | awk '{ print strtonum($0) }'`
-				RELOC_OFF=`echo "obase=16;${RELOC_OFF}"|bc |tr '[A-Z]' '[a-z]'`
-			fi
+			# Search function and code position of address
+			FUNCADDR=$ARG_FUNCADDR
+
+			RELOC_OFF=${FUNCADDR#*-}
+			FUNCADDR=${FUNCADDR%-*}
+			if [ -z $(echo ${FUNCADDR} | sed 's/[0-9,a-f,A-F,x,X,-]//g') ] && [ ${FUNCADDR} ]; then
+				# With prefix: '0x' or '0X'
+				if [ `echo ${FUNCADDR} | sed -n "/0[x,X]/p" | wc -l` -ne 0 ]; then
+					FUNCADDR=`echo $FUNCADDR | awk '{ print strtonum($0) }'`
+					FUNCADDR=`echo "obase=16;${FUNCADDR}"|bc |tr '[A-Z]' '[a-z]'`
+				fi
+				if [ `echo ${RELOC_OFF} | sed -n "/0[x,X]/p" | wc -l` -ne 0 ] && [ ${RELOC_OFF} ]; then
+					RELOC_OFF=`echo $RELOC_OFF | awk '{ print strtonum($0) }'`
+					RELOC_OFF=`echo "obase=16;${RELOC_OFF}"|bc |tr '[A-Z]' '[a-z]'`
+				fi
 
-			# If reloc address is assigned, do sub
-			if [ "${FUNCADDR}" != "${RELOC_OFF}" ]; then
-				# Hex -> Dec -> SUB -> Hex
-				FUNCADDR=`echo $((16#${FUNCADDR}))`
-				RELOC_OFF=`echo $((16#${RELOC_OFF}))`
-				FUNCADDR=$((FUNCADDR-RELOC_OFF))
-				FUNCADDR=$(echo "obase=16;${FUNCADDR}"|bc |tr '[A-Z]' '[a-z]')
-			fi
+				# If reloc address is assigned, do sub
+				if [ "${FUNCADDR}" != "${RELOC_OFF}" ]; then
+					# Hex -> Dec -> SUB -> Hex
+					FUNCADDR=`echo $((16#${FUNCADDR}))`
+					RELOC_OFF=`echo $((16#${RELOC_OFF}))`
+					FUNCADDR=$((FUNCADDR-RELOC_OFF))
+					FUNCADDR=$(echo "obase=16;${FUNCADDR}"|bc |tr '[A-Z]' '[a-z]')
+				fi
 
-			echo
-			sed -n "/${FUNCADDR}/p" ${sym}
-			${TOOLCHAIN_ADDR2LINE} -e ${elf} ${FUNCADDR}
-			exit 0
-		fi
-		;;
+				echo
+				sed -n "/${FUNCADDR}/p" ${sym}
+				${TOOLCHAIN_ADDR2LINE} -e ${elf} ${FUNCADDR}
+				exit 0
+			fi
+			;;
 	esac
 }
 
@@ -409,28 +436,26 @@ function select_chip_info()
 	if [ "$RKCHIP_LABEL" = "-" ]; then
 		RKCHIP_LABEL=${RKCHIP}
 	fi
-
-	# echo "## $FUNCNAME: $RKCHIP, $RKCHIP_LOADER, $RKCHIP_TRUST, $RKCHIP_LABEL,"
 }
 
 function fixup_platform_configure()
 {
-	cfg_u_kb="-" cfg_u_num="-" cfg_t_kb="-" cfg_t_num="-"  cfg_sha="-" cfg_rsa="-"
+	u_kb="-" u_num="-" t_kb="-" t_num="-"  sha="-" rsa="-"
 
 	for item in "${CHIP_CFG_FIXUP_TABLE[@]}"
 	do
 		config_xxx=`echo $item | awk '{ print $1 }'`
 		if grep  -q "^${config_xxx}=y" .config ; then
 			# <*> Fixup rsa/sha pack mode for platforms
-			cfg_rsa=`echo $item | awk '{ print $2 }'`
-			cfg_sha=`echo $item | awk '{ print $3 }'`
+			rsa=`echo $item | awk '{ print $2 }'`
+			sha=`echo $item | awk '{ print $3 }'`
 
 			# <*> Fixup images size pack for platforms, and ini file
 			if grep -q '^CONFIG_ARM64_BOOT_AARCH32=y' .config ; then
-				cfg_u_kb=`echo  $item | awk '{ print $6 }' | awk -F "," '{ print $1 }'`
-				cfg_u_num=`echo $item | awk '{ print $7 }' | awk -F "," '{ print $1 }'`
-				cfg_t_kb=`echo  $item | awk '{ print $6 }' | awk -F "," '{ print $2 }'`
-				cfg_t_num=`echo $item | awk '{ print $7 }' | awk -F "," '{ print $2 }'`
+				u_kb=`echo  $item | awk '{ print $6 }' | awk -F "," '{ print $1 }'`
+				t_kb=`echo  $item | awk '{ print $6 }' | awk -F "," '{ print $2 }'`
+				u_num=`echo $item | awk '{ print $7 }' | awk -F "," '{ print $1 }'`
+				t_num=`echo $item | awk '{ print $7 }' | awk -F "," '{ print $2 }'`
 
 				PAD_LOADER=`echo $item | awk '{ print $8 }'`
 				PAD_TRUST=`echo  $item | awk '{ print $9 }'`
@@ -442,34 +467,50 @@ function fixup_platform_configure()
 				fi
 				RKCHIP_LABEL=${RKCHIP_LABEL}"AARCH32"
 			else
-				cfg_u_kb=`echo  $item | awk '{ print $4 }' | awk -F "," '{ print $1 }'`
-				cfg_u_num=`echo $item | awk '{ print $5 }' | awk -F "," '{ print $1 }'`
-				cfg_t_kb=`echo  $item | awk '{ print $4 }' | awk -F "," '{ print $2 }'`
-				cfg_t_num=`echo $item | awk '{ print $5 }' | awk -F "," '{ print $2 }'`
+				u_kb=`echo  $item | awk '{ print $4 }' | awk -F "," '{ print $1 }'`
+				t_kb=`echo  $item | awk '{ print $4 }' | awk -F "," '{ print $2 }'`
+				u_num=`echo $item | awk '{ print $5 }' | awk -F "," '{ print $1 }'`
+				t_num=`echo $item | awk '{ print $5 }' | awk -F "," '{ print $2 }'`
 			fi
 		fi
 	done
 
-	if [ "$cfg_sha" != "-" ]; then
-		PLATFORM_SHA="--sha $cfg_sha"
+	if [ "$sha" != "-" ]; then
+		PLATFORM_SHA="--sha $sha"
 	fi
-	if [ "$cfg_rsa" != "-" ]; then
-		PLATFORM_RSA="--rsa $cfg_rsa"
+	if [ "$rsa" != "-" ]; then
+		PLATFORM_RSA="--rsa $rsa"
 	fi
-	if [ "$cfg_u_kb" != "-" ]; then
-		PLATFORM_UBOOT_IMG_SIZE="--size $cfg_u_kb $cfg_u_num"
+	if [ "$u_kb" != "-" ]; then
+		PLATFORM_UBOOT_IMG_SIZE="--size $u_kb $u_num"
 	fi
-	if [ "$cfg_t_kb" != "-" ]; then
-		PLATFORM_TRUST_IMG_SIZE="--size $cfg_t_kb $cfg_t_num"
+	if [ "$t_kb" != "-" ]; then
+		PLATFORM_TRUST_IMG_SIZE="--size $t_kb $t_num"
 	fi
+}
 
-	# echo "## $FUNCNAME: $PLATFORM_RSA, $PLATFORM_SHA, $PLATFORM_TRUST_IMG_SIZE, $PLATFORM_UBOOT_IMG_SIZE"
-	# echo "## $FUNCNAME: $RKCHIP_LOADER, $RKCHIP_TRUST, $RKCHIP_LABEL"
+function select_ini_file()
+{
+	# default
+	INI_LOADER=${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL.ini
+	if [ "$ARM64_TRUSTZONE" = "y" ]; then
+		INI_TRUST=${RKBIN}/RKTRUST/${RKCHIP_TRUST}TRUST.ini
+	else
+		INI_TRUST=${RKBIN}/RKTRUST/${RKCHIP_TRUST}TOS.ini
+	fi
+
+	# args
+	if [ "$ARG_INI_TRUST" != "" ]; then
+		INI_TRUST=$ARG_INI_TRUST
+	fi
+	if [ "$ARG_INI_LOADER" != "" ]; then
+		INI_LOADER=$ARG_INI_LOADER
+	fi
 }
 
 function pack_uboot_image()
 {
-	if [ "$PACK_FORMAT" != "rk" ]; then
+	if [ "$IMAGE_FORMAT" != "RKFW" ]; then
 		return
 	fi
 
@@ -502,14 +543,10 @@ function pack_uboot_image()
 
 function pack_uboot_itb_image()
 {
-	if [ "$ARM64_TRUSTZONE" = "y" ]; then
-		ini=${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST.ini
-	else
-		ini=${RKBIN}/RKTRUST/${RKCHIP_TRUST}TOS.ini
-	fi
+	ini=$INI_TRUST
 
-	if [ ! -f $ini ]; then
-		echo "pack trust failed! Can't find: $ini"
+	if [ ! -f $INI_TRUST ]; then
+		echo "pack trust failed! Can't find: $INI_TRUST"
 		return
 	fi
 
@@ -552,6 +589,7 @@ function pack_uboot_itb_image()
 		./tools/mkimage -f u-boot.its -E u-boot.itb
 		echo "pack u-boot.itb okay! Input: $ini"
 	fi
+	echo
 }
 
 function pack_spl_loader_image()
@@ -559,13 +597,9 @@ function pack_spl_loader_image()
 	mode=$1
 	tmp_dir=${RKBIN}/tmp
 	tmp_ini=${tmp_dir}/${RKCHIP_LOADER}MINIALL.ini
-	if [ "$FILE" != "" ]; then
-		ini=$FILE;
-	else
-		ini=${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL.ini
-	fi
-	if [ ! -f $ini ]; then
-		echo "pack TPL+SPL loader failed! Can't find: $ini"
+	ini=$INI_LOADER
+	if [ ! -f $INI_LOADER ]; then
+		echo "pack loader failed! Can't find: $INI_LOADER"
 		return
 	fi
 
@@ -601,18 +635,9 @@ function pack_spl_loader_image()
 
 function pack_loader_image()
 {
-	if [ "$PACK_FORMAT" != "rk" ]; then
-		return
-	fi
-
-	if [ "$FILE" != "" ]; then
-		ini=$FILE;
-	else
-		ini=${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL.ini
-	fi
-
-	if [ ! -f $ini ]; then
-		echo "pack loader failed! Can't find: $ini"
+	ini=$INI_LOADER
+	if [ ! -f $INI_LOADER ]; then
+		echo "pack loader failed! Can't find: $INI_LOADER"
 		return
 	fi
 
@@ -672,22 +697,14 @@ function pack_arm64_trust_image()
 
 function pack_trust_image()
 {
-	if [ "$PACK_FORMAT" != "rk" ]; then
+	if [ "$IMAGE_FORMAT" != "RKFW" ]; then
 		return
 	fi
 
 	rm trust*.img -rf
-	if [ "$FILE" != "" ]; then
-		ini=$FILE;
-	else
-		if [ "$ARM64_TRUSTZONE" = "y" ]; then
-			ini=${RKBIN}/RKTRUST/${RKCHIP_TRUST}TRUST.ini
-		else
-			ini=${RKBIN}/RKTRUST/${RKCHIP_TRUST}TOS.ini
-		fi
-	fi
-	if [ ! -f $ini ]; then
-		echo "pack trust failed! Can't find: $ini"
+	ini=$INI_TRUST
+	if [ ! -f $INI_TRUST ]; then
+		echo "pack trust failed! Can't find: $INI_TRUST"
 		return
 	fi
 
@@ -709,23 +726,23 @@ function pack_trust_image()
 function pack_fit_image()
 {
 	if grep -q '^CONFIG_FIT_SIGNATURE=y' .config ; then
-		./scripts/fit-vboot.sh $*
+		./scripts/fit-vboot.sh $ARG_ROLLBACK_IDX_UBOOT $ARG_ROLLBACK_IDX_BOOT --ini-trust $INI_TRUST --ini-loader $INI_LOADER
 	else
 		rm uboot.img trust*.img -rf
-		./scripts/fit-vboot-uboot.sh --no-vboot --no-rebuild
-		echo "pack uboot.img (with uboot trust) okay! Input: $ini"
+		./scripts/fit-vboot-uboot.sh --no-vboot --no-rebuild --ini-trust $INI_TRUST --ini-loader $INI_LOADER
+		echo "pack uboot.img (with uboot trust) okay! Input: $INI_TRUST"
 	fi
 }
 
 function pack_images()
 {
-	if [ "$NOPACK" != "y" ]; then
-		if [ "$PACK_FORMAT" = "rk" ]; then
+	if [ "$IMAGE_NOPACK" != "y" ]; then
+		if [ "$IMAGE_FORMAT" = "RKFW" ]; then
 			pack_uboot_image
 			pack_trust_image
 			pack_loader_image
-		elif [ "$PACK_FORMAT" = "fit" ]; then
-			pack_fit_image $ARGS
+		elif [ "$IMAGE_FORMAT" = "FIT" ]; then
+			pack_fit_image $ARG_ROLLBACK_IDX_UBOOT $ARG_ROLLBACK_IDX_BOOT --ini-trust $INI_TRUST --ini-loader $INI_LOADER
 		fi
 	fi
 }
@@ -748,17 +765,19 @@ function finish()
 	echo
 	if [ ! -z "$OPTION" ]; then
 		echo "Platform ${RKCHIP_LABEL} is build OK, with exist .config ($OPTION)"
-	elif [ "$BOARD" = '' -o "$BOARD" = 'nopack' ]; then
+	elif [ "$ARG_BOARD" = '' ]; then
 		echo "Platform ${RKCHIP_LABEL} is build OK, with exist .config"
 	else
-		echo "Platform ${RKCHIP_LABEL} is build OK, with new .config(make ${BOARD}_defconfig)"
+		echo "Platform ${RKCHIP_LABEL} is build OK, with new .config(make ${ARG_BOARD}_defconfig)"
 	fi
 }
 
+process_args $*
 prepare
 select_toolchain
 select_chip_info
 fixup_platform_configure
+select_ini_file
 sub_commands
 clean_files
 make CROSS_COMPILE=${TOOLCHAIN_GCC} ${OPTION} all --jobs=${JOB}

commit 83fcbb4dc71f69cab571c02d66ff48937439d863
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 27 16:42:36 2020 +0800

    scritps: fit: use default spl binary from rkbin for non-vboot
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I9c53e82567cf550ea5a897ad62c4815b69cd16c1

diff --git a/scripts/fit-base.sh b/scripts/fit-base.sh
index 3aef49658d..7e76703406 100755
--- a/scripts/fit-base.sh
+++ b/scripts/fit-base.sh
@@ -151,10 +151,9 @@ function fit_uboot_make_itb()
 	if [ "$ARG_NO_VBOOT" = "y" ]; then
 		SIGN_MSG="no-signed"
 		./tools/mkimage -f u-boot.its -E -p $FIT_NS_OFFS_UBOOT $FIT_ITB_UBOOT
-		./make.sh spl-s $ARG_INI_LOADER
+		./make.sh loader $ARG_INI_LOADER
 	else
 		SIGN_MSG="signed"
-
 		if [ ! -f $KEY_DIR/dev.key ]; then
 			echo "ERROR: No $KEY_DIR/dev.key"
 			exit 1

commit 13b1806c203b4a6350f221033d207d1866946f1f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 27 14:51:23 2020 +0800

    scripts: fit: support ini file assignment
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Idc51bce6e1e292ddb6cf1ec88c74c7a3a8527b00

diff --git a/scripts/fit-base.sh b/scripts/fit-base.sh
index b5c18dbabb..3aef49658d 100755
--- a/scripts/fit-base.sh
+++ b/scripts/fit-base.sh
@@ -91,6 +91,14 @@ function fit_process_args()
 				ARG_NO_CHECK="y"
 				shift 1
 				;;
+			--ini-trust)
+				ARG_INI_TRUST=$2
+				shift 2
+				;;
+			--ini-loader)
+				ARG_INI_LOADER=$2
+				shift 2
+				;;
 			--rollback-index-boot)
 				ARG_ROLLBACK_IDX_BOOT=$2
 				arg_check_decimal $2
@@ -136,14 +144,14 @@ function fit_rebuild()
 
 function fit_uboot_make_itb()
 {
-	./make.sh itb
+	./make.sh itb $ARG_INI_TRUST
 	its_file_existence_check u-boot.its
 
 	# output uboot.itb
 	if [ "$ARG_NO_VBOOT" = "y" ]; then
 		SIGN_MSG="no-signed"
 		./tools/mkimage -f u-boot.its -E -p $FIT_NS_OFFS_UBOOT $FIT_ITB_UBOOT
-		./make.sh spl-s
+		./make.sh spl-s $ARG_INI_LOADER
 	else
 		SIGN_MSG="signed"
 
@@ -216,7 +224,7 @@ function fit_uboot_make_itb()
 			cat spl/u-boot-spl-pad.bin >> spl/u-boot-spl.bin
 		fi
 		cat spl/u-boot-spl.dtb >> spl/u-boot-spl.bin
-		./make.sh spl-s
+		./make.sh spl-s $ARG_INI_LOADER
 	fi
 
 	# clean

commit 88ea3acb7b9f995be1ac2c409d130c9649b664db
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Apr 27 09:23:46 2020 +0800

    spi: rockchip_sfc: Support setting SPI Nand write xbits address
    
    Change-Id: I09d746191323c1e14d8993e71df6d1d5fd621910
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/spi/rockchip_sfc.c b/drivers/spi/rockchip_sfc.c
index 6891b54d54..2ae5bb9674 100644
--- a/drivers/spi/rockchip_sfc.c
+++ b/drivers/spi/rockchip_sfc.c
@@ -127,6 +127,7 @@ struct rockchip_sfc {
 	u32 cmd;
 	u32 addr;
 	u8 addr_bits;
+	u8 addr_xbits_ext;
 	u8 dummy_bits;
 	u8 rw;
 	u32 trb;
@@ -264,6 +265,9 @@ static void rockchip_sfc_setup_xfer(struct rockchip_sfc *sfc, u32 trb)
 	    sfc->addr_bits == SFC_ADDR_32BITS)
 		data_width = rockchip_sfc_get_if_type(sfc);
 
+	if (sfc->addr_bits & SFC_ADDR_XBITS)
+		writel(sfc->addr_xbits_ext - 1, &regs->abit);
+
 	val |= (data_width << SFC_DATA_WIDTH_SHIFT);
 
 	rockchip_sfc_wait_idle(sfc, 10);
@@ -524,11 +528,13 @@ static int rockchip_sfc_xfer(struct udevice *dev, unsigned int bitlen,
 			break;
 		case 3: /* Nand prog,  */
 			sfc->addr_bits = SFC_ADDR_XBITS;
+			sfc->addr_xbits_ext = 16;
 			sfc->dummy_bits = 0;
 			sfc->addr = pcmd[2] | pcmd[1] << 8;
 			break;
 		case 2: /* Nand read/write feature */
 			sfc->addr_bits = SFC_ADDR_XBITS;
+			sfc->addr_xbits_ext = 8;
 			sfc->dummy_bits = 0;
 			sfc->addr = pcmd[1];
 			break;

commit db7f180f861afeef3d428d4b05980f5189fa5b4b
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Sun Apr 26 11:09:22 2020 +0800

    disk: part: fix compile error in spl
    
    undefined reference to `rk_avb_append_part_slot'
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I21d44387affdc11708e4b091d51850eaaaa2d2dc

diff --git a/disk/part.c b/disk/part.c
index 6b8942fe68..e7ef19154e 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -688,11 +688,11 @@ int part_get_info_by_name(struct blk_desc *dev_desc, const char *name,
 	part_drv = part_driver_lookup_type(dev_desc);
 	if (!part_drv)
 		return -1;
-
+#ifndef CONFIG_SPL_BUILD
 	/* 1. Query partition with A/B slot suffix */
 	if (rk_avb_append_part_slot(name, name_slot))
 		return -1;
-
+#endif
 retry:
 	debug("## Query partition(%d): %s\n", none_slot_try, name_slot);
 

commit f1419102787b9b890db98d7eaf9e3362129e592a
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Sun Apr 26 11:05:56 2020 +0800

    common: android: fix compile error if only enable ab system
    
    error: ‘reset_cpu_if_android_ab’ defined but not used
    [-Werror=unused-function]
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I724ea99df27f9f572aa0913491eddb2b5e248e38

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index f0999b5c0d..4ed65e8f76 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -122,18 +122,6 @@ static int get_partition_unique_uuid(char *partition,
 	return 0;
 }
 
-static void reset_cpu_if_android_ab(void)
-{
-	printf("Reset in AB system.\n");
-	flushc();
-	/*
-	 * Since we use the retry-count in ab system, then can
-	 * try reboot if verify fail until the retry-count is
-	 * equal to zero.
-	 */
-	reset_cpu(0);
-}
-
 static void update_root_uuid_if_android_ab(void)
 {
 	/*
@@ -226,11 +214,26 @@ static int decrease_tries_if_android_ab(char *slot_suffix)
 	return 0;
 }
 #else
-static inline void reset_cpu_if_android_ab(void) {}
 static inline void update_root_uuid_if_android_ab(void) {}
 static inline int decrease_tries_if_android_ab(char *slot_suffix) { return 0; }
 #endif
 
+#if defined(CONFIG_ANDROID_AB) && defined(CONFIG_ANDROID_AVB)
+static void reset_cpu_if_android_ab(void)
+{
+	printf("Reset in AB system.\n");
+	flushc();
+	/*
+	 * Since we use the retry-count in ab system, then can
+	 * try reboot if verify fail until the retry-count is
+	 * equal to zero.
+	 */
+	reset_cpu(0);
+}
+#else
+static inline void reset_cpu_if_android_ab(void) {}
+#endif
+
 int android_bootloader_message_load(
 	struct blk_desc *dev_desc,
 	const disk_partition_t *part_info,

commit 4736384cd0c48cb793f0cf74b6849fad45e30d1f
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Sun Apr 26 10:34:08 2020 +0800

    spl: Kconfig: add SPL_AB depends on SPL_EFI_PARTITION
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Id4500ae748f965235aac278baee07f278d88d70a

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 317d81d33a..bde63f4ae8 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -800,7 +800,7 @@ config SPL_OPTEE
 
 config SPL_AB
 	bool "Support AB system boot"
-	depends on SPL
+	depends on SPL && SPL_EFI_PARTITION
 	help
 	  Enable this config to support AB system boot.
 

commit bdf7b34b6003baa838016cb08feb3a14092fdfd9
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Apr 27 11:20:01 2020 +0800

    mtd: nand: Fix memory allocation in nanddev_bbt_init()
    
    Fix the size of the buffer allocated to store the in-memory BBT.
    This bug was previously hidden by a different bug, that was fixed in
    commit e4fd10db8b8 ("mtd: nand: Fix nanddev_neraseblocks()").
    
    Fixes: ed99f7731 ("mtd: nand: Add core infrastructure to deal with NAND devices")
    Change-Id: I365fdfe053ef352661a832b33a232cbb18e81be6
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/bbt.c b/drivers/mtd/nand/bbt.c
index 7e0ad3190c..c6b16e411b 100644
--- a/drivers/mtd/nand/bbt.c
+++ b/drivers/mtd/nand/bbt.c
@@ -29,7 +29,8 @@ int nanddev_bbt_init(struct nand_device *nand)
 	unsigned int nwords = DIV_ROUND_UP(nblocks * bits_per_block,
 					   BITS_PER_LONG);
 
-	nand->bbt.cache = kzalloc(nwords, GFP_KERNEL);
+	nand->bbt.cache = kcalloc(nwords, sizeof(*nand->bbt.cache),
+				  GFP_KERNEL);
 	if (!nand->bbt.cache)
 		return -ENOMEM;
 

commit 85c83705f8567fdead5b0f3272bcf5cfcff87050
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Apr 27 11:11:35 2020 +0800

    mtd: nand: Fix nanddev_neraseblocks()
    
    nanddev_neraseblocks() currently returns the number pages per LUN
    instead of the total number of eraseblocks.
    
    Change-Id: Id5ec7cd7170dae28acbfa568941ffea8e8907361
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 13e8dd1103..a7595680d8 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -324,9 +324,8 @@ static inline unsigned int nanddev_ntargets(const struct nand_device *nand)
  */
 static inline unsigned int nanddev_neraseblocks(const struct nand_device *nand)
 {
-	return (u64)nand->memorg.luns_per_target *
-	       nand->memorg.eraseblocks_per_lun *
-	       nand->memorg.pages_per_eraseblock;
+	return nand->memorg.ntargets * nand->memorg.luns_per_target *
+	       nand->memorg.eraseblocks_per_lun;
 }
 
 /**

commit 9b31ae46e21d8ae0e65bce03fe96d0ad1dfa0c86
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Apr 26 15:12:55 2020 +0800

    rockchip: dts: rk3399pro-npu: remove ramdisk-ro node
    
    This device is decleared by U_BOOT_DEVICE().
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I3e4c64e8fa0baad7d3770b98a96d3c5c787ea6b2

diff --git a/arch/arm/dts/rk3399pro-npu-evb.dts b/arch/arm/dts/rk3399pro-npu-evb.dts
index 00e521c36b..2b66de12dc 100644
--- a/arch/arm/dts/rk3399pro-npu-evb.dts
+++ b/arch/arm/dts/rk3399pro-npu-evb.dts
@@ -16,12 +16,6 @@
 	chosen {
 		stdout-path = &uart2;
 	};
-
-	ramdisk-ro {
-		u-boot,dm-pre-reloc;
-		compatible = "ramdisk-ro";
-		status = "okay";
-	};
 };
 
 &dmc {

commit a527a681cb0856f4995b35f5dbccb417da5278f7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Apr 26 14:31:32 2020 +0800

    rk1808: remove rkimg_bootdev
    
    It's defined in rockchip-common.h now.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I9e29b309f22a0a8d97a6b6111b59f594708280f8

diff --git a/include/configs/rk1808_common.h b/include/configs/rk1808_common.h
index d3007380bb..bb9f432f08 100644
--- a/include/configs/rk1808_common.h
+++ b/include/configs/rk1808_common.h
@@ -54,13 +54,6 @@
 
 #include <config_distro_bootcmd.h>
 
-#ifdef CONFIG_DM_RAMDISK
-#undef RKIMG_DET_BOOTDEV
-#define RKIMG_DET_BOOTDEV \
-	"rkimg_bootdev=" \
-	"setenv devtype ramdisk; setenv devnum 0; \0"
-#endif
-
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	ENV_MEM_LAYOUT_SETTINGS \
 	"partitions=" PARTS_DEFAULT \

commit 8e2870c0cf500c9370d3a48ac6eed51fe28c5b72
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Apr 26 14:31:03 2020 +0800

    rockchip: common: add rkimg_bootdev for dm ramdisk
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Iea6b8cdd7c629be136e83de8e9626394a85b410d

diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index 591bcb46d3..4103342d42 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -113,6 +113,11 @@
 	"name=security,size=2M,uuid=${uuid_gpt_security};" \
 	"name=userdata,size=-,uuid=${uuid_gpt_userdata};\0"
 
+#ifdef CONFIG_DM_RAMDISK
+#define RKIMG_DET_BOOTDEV \
+	"rkimg_bootdev=" \
+	"setenv devtype ramdisk; setenv devnum 0; \0"
+#else
 #define RKIMG_DET_BOOTDEV \
 	"rkimg_bootdev=" \
 	"if mmc dev 1 && rkimgtest mmc 1; then " \
@@ -132,6 +137,7 @@
 	"elif rksfc dev 1; then " \
 		"setenv devtype spinor; setenv devnum 1;" \
 	"fi; \0"
+#endif
 
 #if defined(CONFIG_AVB_VBMETA_PUBLIC_KEY_VALIDATE)
 #define RKIMG_BOOTCOMMAND			\

commit 5d458522616ce5bad99f61ea23f49faa9fd7e730
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Apr 26 15:00:09 2020 +0800

    ram: ramdisk_ro: add u-boot device definition
    
    In order not to add the device info in dts.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I334c2c99a71476545f311d26b32d7954ca8d8dfd

diff --git a/drivers/ram/ramdisk_ro.c b/drivers/ram/ramdisk_ro.c
index 47fad6dbe6..c1179edacb 100644
--- a/drivers/ram/ramdisk_ro.c
+++ b/drivers/ram/ramdisk_ro.c
@@ -63,3 +63,7 @@ U_BOOT_DRIVER(ramdisk_ro) = {
 	.of_match	= ramdisk_ro_ids,
 	.bind		= ramdisk_ro_bind,
 };
+
+U_BOOT_DEVICE(ramdisk_ro) = {
+	.name		= "ramdisk-ro",
+};

commit aedeb70ba0911e336a88a7fd1b320fa86a143ff3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Apr 26 14:41:23 2020 +0800

    ram: Kconfig: RAMDISK_RO requires rkparam partition
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I166450ab0d406d2a452afb137c57511def54760c

diff --git a/drivers/ram/Kconfig b/drivers/ram/Kconfig
index 3139af0833..b45def497d 100644
--- a/drivers/ram/Kconfig
+++ b/drivers/ram/Kconfig
@@ -43,7 +43,7 @@ config DM_RAMDISK
 
 config RAMDISK_RO
         bool "Enable read only ramdisk support"
-        depends on DM_RAMDISK
+        depends on DM_RAMDISK && RKPARM_PARTITION
         help
           This enables the read only ramdisk support.
 
diff --git a/drivers/ram/Makefile b/drivers/ram/Makefile
index b4dd4d3293..287cb08be9 100644
--- a/drivers/ram/Makefile
+++ b/drivers/ram/Makefile
@@ -10,5 +10,8 @@ obj-$(CONFIG_STM32_SDRAM) += stm32_sdram.o
 obj-$(CONFIG_ARCH_BMIPS) += bmips_ram.o
 
 obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
+
+ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_DM_RAMDISK) += ramdisk-uclass.o
 obj-$(CONFIG_RAMDISK_RO) += ramdisk_ro.o
+endif

commit 00c95c4989dfb86aad34588c1c3415a5565dbf1d
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Apr 24 09:44:00 2020 +0800

    rockchip: spl: implement fit_board_verify_required_sigs()
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I5dbebf21a8c3ae76550fec7262bee66c256b5682

diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index ae6b195829..ef086d1f66 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -8,6 +8,7 @@
 #include <debug_uart.h>
 #include <dm.h>
 #include <key.h>
+#include <misc.h>
 #include <ram.h>
 #include <spl.h>
 #include <optee_include/OpteeClientInterface.h>
@@ -311,3 +312,21 @@ void spl_hang_reset(void)
 	do_reset(NULL, 0, 0, NULL);
 #endif
 }
+
+int fit_board_verify_required_sigs(void)
+{
+	uint8_t vboot = 0;
+#if defined(CONFIG_SPL_ROCKCHIP_SECURE_OTP) || defined(CONFIG_SPL_ROCKCHIP_SECURE_OTP_v2)
+	struct udevice *dev;
+
+	dev = misc_otp_get_device(OTP_S);
+	if (!dev)
+		return 1;
+
+	if (misc_otp_read(dev, 0, &vboot, 1)) {
+		printf("Can't read verified-boot flag\n");
+		return 1;
+	}
+#endif
+	return vboot;
+}

commit 4d06e4de7476158c62ed3d6d477492cc9bb27ba3
Author: zain wang <wzz@rock-chips.com>
Date:   Fri Apr 24 14:40:46 2020 +0800

    tools: trust_merger: copy ImageSize from Component to ComponentData
    
    rk3399_miniloader_v1.25 read ImageSize from ComponentData first now.
    So copy ImageSize to ComponentData (named LoadSize).
    
    For other chips, ComponentDate->LoadSize is reserved area, it no
    inflence on other chips.
    
    Signed-off-by: zain wang <wzz@rock-chips.com>
    Change-Id: I51468aa3fad90d8999c1943ab9c720f7c90cefc1

diff --git a/tools/rockchip/trust_merger.c b/tools/rockchip/trust_merger.c
index f36b5c8008..627108ea81 100644
--- a/tools/rockchip/trust_merger.c
+++ b/tools/rockchip/trust_merger.c
@@ -606,6 +606,7 @@ static bool mergetrust(void)
 		pComponent->ComponentID = pEntry->id;
 		pComponent->StorageAddr = (OutFileSize >> 9);
 		pComponent->ImageSize = (pEntry->align_size >> 9);
+		pComponentData->LoadSize = pComponent->ImageSize;
 
 		LOGD("bl3%c: LoadAddr = 0x%08x, StorageAddr = %d, ImageSize = %d\n",
 		     (char)((pEntry->id & 0xFF000000) >> 24), pComponentData->LoadAddr,
diff --git a/tools/rockchip/trust_merger.h b/tools/rockchip/trust_merger.h
index e25683fdf3..e00ab52400 100644
--- a/tools/rockchip/trust_merger.h
+++ b/tools/rockchip/trust_merger.h
@@ -114,7 +114,8 @@ typedef struct {
 typedef struct {
 	uint32_t HashData[8];
 	uint32_t LoadAddr;
-	uint32_t reserved[3];
+	uint32_t LoadSize;
+	uint32_t reserved[2];
 } COMPONENT_DATA, *PCOMPONENT_DATA;
 
 

commit 19a7802737b6aafb633a80943f955ded331b369e
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Apr 24 09:42:48 2020 +0800

    mtd: mtd_blk: skip bad block if mtd map isn't initiated
    
    Change-Id: I3a2b5d311b43cc82135ecd84956e7a365c5910db
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index ed4f9a6b25..c24f2fcdb9 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -44,7 +44,7 @@ int mtd_blk_map_table_init(struct blk_desc *desc,
 	if (!mtd) {
 		return -ENODEV;
 	} else {
-		blk_total = mtd->size / mtd->erasesize;
+		blk_total = (mtd->size + mtd->erasesize - 1) / mtd->erasesize;
 		if (!mtd_map_blk_table) {
 			mtd_map_blk_table = (int *)malloc(blk_total * 4);
 			for (i = 0; i < blk_total; i++)
@@ -52,7 +52,9 @@ int mtd_blk_map_table_init(struct blk_desc *desc,
 		}
 
 		blk_begin = (u32)offset / mtd->erasesize;
-		blk_cnt = (u32)length / mtd->erasesize;
+		blk_cnt = ((u32)(offset % mtd->erasesize + length) / mtd->erasesize);
+		if ((blk_begin + blk_cnt) > blk_total)
+			blk_cnt = blk_total - blk_begin;
 		j = 0;
 		 /* should not across blk_cnt */
 		for (i = 0; i < blk_cnt; i++) {
@@ -86,15 +88,20 @@ static __maybe_unused int mtd_map_read(struct mtd_info *mtd, loff_t offset,
 		size_t block_offset = offset & (erasesize - 1);
 		size_t read_length;
 		loff_t mapped_offset;
+		bool mapped;
 
 		if (offset >= mtd->size)
 			return 0;
 
 		mapped_offset = offset;
+		mapped = false;
 		if (mtd_map_blk_table)  {
+			mapped = true;
 			mapped_offset = (loff_t)((u32)mtd_map_blk_table[(u64)offset /
 				erasesize] * erasesize + block_offset);
-		} else {
+		}
+
+		if (!mapped) {
 			if (mtd_block_isbad(mtd, offset & ~(erasesize - 1))) {
 				printf("Skip bad block 0x%08llx\n",
 				       offset & ~(erasesize - 1));

commit a5373663e81be1530154976d0f815d5436125ce6
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Apr 24 09:44:00 2020 +0800

    rockchip: spl: implement fit_board_verify_required_sigs()
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I5dbebf21a8c3ae76550fec7262bee66c256b5682

diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index ae6b195829..ef086d1f66 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -8,6 +8,7 @@
 #include <debug_uart.h>
 #include <dm.h>
 #include <key.h>
+#include <misc.h>
 #include <ram.h>
 #include <spl.h>
 #include <optee_include/OpteeClientInterface.h>
@@ -311,3 +312,21 @@ void spl_hang_reset(void)
 	do_reset(NULL, 0, 0, NULL);
 #endif
 }
+
+int fit_board_verify_required_sigs(void)
+{
+	uint8_t vboot = 0;
+#if defined(CONFIG_SPL_ROCKCHIP_SECURE_OTP) || defined(CONFIG_SPL_ROCKCHIP_SECURE_OTP_v2)
+	struct udevice *dev;
+
+	dev = misc_otp_get_device(OTP_S);
+	if (!dev)
+		return 1;
+
+	if (misc_otp_read(dev, 0, &vboot, 1)) {
+		printf("Can't read verified-boot flag\n");
+		return 1;
+	}
+#endif
+	return vboot;
+}

commit 5033bc62feb0a935bf71dd6d960da9b184da7840
Author: zain wang <wzz@rock-chips.com>
Date:   Fri Apr 24 14:40:46 2020 +0800

    tools: trust_merger: copy ImageSize from Component to ComponentData
    
    rk3399_miniloader_v1.25 read ImageSize from ComponentData first now.
    So copy ImageSize to ComponentData (named LoadSize).
    
    For other chips, ComponentDate->LoadSize is reserved area, it no
    inflence on other chips.
    
    Signed-off-by: zain wang <wzz@rock-chips.com>
    Change-Id: I51468aa3fad90d8999c1943ab9c720f7c90cefc1

diff --git a/tools/rockchip/trust_merger.c b/tools/rockchip/trust_merger.c
index f36b5c8008..627108ea81 100644
--- a/tools/rockchip/trust_merger.c
+++ b/tools/rockchip/trust_merger.c
@@ -606,6 +606,7 @@ static bool mergetrust(void)
 		pComponent->ComponentID = pEntry->id;
 		pComponent->StorageAddr = (OutFileSize >> 9);
 		pComponent->ImageSize = (pEntry->align_size >> 9);
+		pComponentData->LoadSize = pComponent->ImageSize;
 
 		LOGD("bl3%c: LoadAddr = 0x%08x, StorageAddr = %d, ImageSize = %d\n",
 		     (char)((pEntry->id & 0xFF000000) >> 24), pComponentData->LoadAddr,
diff --git a/tools/rockchip/trust_merger.h b/tools/rockchip/trust_merger.h
index e25683fdf3..e00ab52400 100644
--- a/tools/rockchip/trust_merger.h
+++ b/tools/rockchip/trust_merger.h
@@ -114,7 +114,8 @@ typedef struct {
 typedef struct {
 	uint32_t HashData[8];
 	uint32_t LoadAddr;
-	uint32_t reserved[3];
+	uint32_t LoadSize;
+	uint32_t reserved[2];
 } COMPONENT_DATA, *PCOMPONENT_DATA;
 
 

commit d6290238894eff0376dcf9b0fdf0c7ca7449d6e7
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Apr 24 09:42:48 2020 +0800

    mtd: mtd_blk: skip bad block if mtd map isn't initiated
    
    Change-Id: I3a2b5d311b43cc82135ecd84956e7a365c5910db
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index ed4f9a6b25..c24f2fcdb9 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -44,7 +44,7 @@ int mtd_blk_map_table_init(struct blk_desc *desc,
 	if (!mtd) {
 		return -ENODEV;
 	} else {
-		blk_total = mtd->size / mtd->erasesize;
+		blk_total = (mtd->size + mtd->erasesize - 1) / mtd->erasesize;
 		if (!mtd_map_blk_table) {
 			mtd_map_blk_table = (int *)malloc(blk_total * 4);
 			for (i = 0; i < blk_total; i++)
@@ -52,7 +52,9 @@ int mtd_blk_map_table_init(struct blk_desc *desc,
 		}
 
 		blk_begin = (u32)offset / mtd->erasesize;
-		blk_cnt = (u32)length / mtd->erasesize;
+		blk_cnt = ((u32)(offset % mtd->erasesize + length) / mtd->erasesize);
+		if ((blk_begin + blk_cnt) > blk_total)
+			blk_cnt = blk_total - blk_begin;
 		j = 0;
 		 /* should not across blk_cnt */
 		for (i = 0; i < blk_cnt; i++) {
@@ -86,15 +88,20 @@ static __maybe_unused int mtd_map_read(struct mtd_info *mtd, loff_t offset,
 		size_t block_offset = offset & (erasesize - 1);
 		size_t read_length;
 		loff_t mapped_offset;
+		bool mapped;
 
 		if (offset >= mtd->size)
 			return 0;
 
 		mapped_offset = offset;
+		mapped = false;
 		if (mtd_map_blk_table)  {
+			mapped = true;
 			mapped_offset = (loff_t)((u32)mtd_map_blk_table[(u64)offset /
 				erasesize] * erasesize + block_offset);
-		} else {
+		}
+
+		if (!mapped) {
 			if (mtd_block_isbad(mtd, offset & ~(erasesize - 1))) {
 				printf("Skip bad block 0x%08llx\n",
 				       offset & ~(erasesize - 1));

commit a46b05016b00bae1541757b4edb054c8e0d6e2f7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 23 20:12:56 2020 +0800

    scripts: add uimage pack script
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Id1570789d84f8aba3a6b857e92cc2941e640aaa4

diff --git a/scripts/uimage-pack.sh b/scripts/uimage-pack.sh
new file mode 100755
index 0000000000..57222bae03
--- /dev/null
+++ b/scripts/uimage-pack.sh
@@ -0,0 +1,21 @@
+#!/bin/bash
+#
+# Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier: GPL-2.0
+#
+set -e
+
+IMG_DIR=images
+IMG_NAME=boot.img
+
+if grep -Eq ''^CONFIG_ARM64=y'|'^CONFIG_ARM64_BOOT_AARCH32=y'' .config ; then
+	ARCH=arm64
+else
+	ARCH=arm
+fi
+
+echo
+./tools/mkimage -n 'Multi Images' -A $ARCH -O linux -T multi -C none -a 0xffffffff -e 0xffffffff -d ${IMG_DIR}/kernel.img:${IMG_DIR}/ramdisk.img:${IMG_DIR}/rk-kernel.dtb:${IMG_DIR}/resource.img $IMG_NAME
+echo
+

commit 0fb435fa051047f1ecd4293f97f5ebcb139ebd9a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 23 19:53:56 2020 +0800

    scripts: fit-unpack: add hash verify
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I11982ee2e6fb09f5c0007334832d7decb6025756

diff --git a/scripts/fit-unpack.sh b/scripts/fit-unpack.sh
index cfef5a98ad..2fb7ba5eb4 100755
--- a/scripts/fit-unpack.sh
+++ b/scripts/fit-unpack.sh
@@ -52,10 +52,11 @@ function args_process()
 
 function gen_images()
 {
-	printf "\n## Unpack $file to directory $output/\n"
+	printf "\n# Unpack $file to directory $output/\n"
 	fdtget -l $file /images > $output/unpack.txt
 	cat $output/unpack.txt | while read line
 	do
+		# generate image
 		node="/images/${line}"
 		name=`fdtget -ts $file $node image`
 		offs=`fdtget -ti $file $node data-position`
@@ -64,7 +65,6 @@ function gen_images()
 			continue;
 		fi
 
-		printf "    %-15s: %d bytes\n" ${name} $size
 		if [ $size -ne 0 ]; then
 			dd if=$file of=$output/dd.tmp  bs=$offs skip=1  >/dev/null 2>&1
 			dd if=$output/dd.tmp of=$output/$name bs=$size count=1 >/dev/null 2>&1
@@ -72,6 +72,36 @@ function gen_images()
 		else
 			touch $output/$name
 		fi
+
+		# hash verify
+		algo=`fdtget -ts $file $node/hash@1 algo`
+		if [ -z $algo ]; then
+			printf "    %-20s: %d bytes" $name $size
+			continue;
+		fi
+
+		data=`fdtget -tx $file $node/hash@1 value`
+		data=`echo " "$data | sed "s/ / 0x/g"`
+		csum=`"$algo"sum $output/$name | awk '{ print $1}'`
+
+		hash=""
+		for((i=1;;i++));
+		do
+			hex=`echo $data | awk -v idx=$i '{ print $idx }'`
+			if [ -z $hex ]; then
+				break;
+			fi
+
+			hex=`printf "%08x" $hex` # align !!
+			hash="$hash$hex"
+		done
+
+		printf "  %-20s: %d bytes... %s" $name $size $algo
+		if [ "$csum" = "$hash" -o $size -eq 0 ]; then
+			echo "+"
+		else
+			echo "-"
+		fi
 	done
 
 	rm $output/unpack.txt
@@ -79,4 +109,5 @@ function gen_images()
 }
 
 args_process $*
-gen_images
\ No newline at end of file
+gen_images
+

commit 1f21bf610b77e407869c4efc5d02a312f10bf2c5
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Apr 3 13:02:52 2020 +0800

    mtd: mtd_blk: add flash map block management
    
    1.SPI Nand MTD partition bad block will not be detected if the address
    isn't begin with the partition first block.
    2.To avoid this problem, we should use map partition block address to
    get right data.
    3.It's compatible if the map table isn't initialed.
    
    Change-Id: I11858b9b30a8fffecdbad804b1bad7b247b51d23
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index 1c233c3658..ed4f9a6b25 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -18,6 +18,113 @@
 #define MTD_PART_INFO_MAX_SIZE		512
 #define MTD_SINGLE_PART_INFO_MAX_SIZE	40
 
+static int *mtd_map_blk_table;
+
+int mtd_blk_map_table_init(struct blk_desc *desc,
+			   loff_t offset,
+			   size_t length)
+{
+	u32 blk_total, blk_begin, blk_cnt;
+	struct mtd_info *mtd = NULL;
+	int i, j;
+
+	if (!desc)
+		return -ENODEV;
+
+	if (desc->devnum == BLK_MTD_NAND) {
+#if defined(CONFIG_NAND) && !defined(CONFIG_SPL_BUILD)
+		mtd = dev_get_priv(desc->bdev->parent);
+#endif
+	} else if (desc->devnum == BLK_MTD_SPI_NAND) {
+#if defined(CONFIG_MTD_SPI_NAND) && !defined(CONFIG_SPL_BUILD)
+		mtd = desc->bdev->priv;
+#endif
+	}
+
+	if (!mtd) {
+		return -ENODEV;
+	} else {
+		blk_total = mtd->size / mtd->erasesize;
+		if (!mtd_map_blk_table) {
+			mtd_map_blk_table = (int *)malloc(blk_total * 4);
+			for (i = 0; i < blk_total; i++)
+				mtd_map_blk_table[i] = i;
+		}
+
+		blk_begin = (u32)offset / mtd->erasesize;
+		blk_cnt = (u32)length / mtd->erasesize;
+		j = 0;
+		 /* should not across blk_cnt */
+		for (i = 0; i < blk_cnt; i++) {
+			if (j >= blk_cnt)
+				mtd_map_blk_table[blk_begin + i] = -1;
+			for (; j < blk_cnt; j++) {
+				if (!mtd_block_isbad(mtd, (blk_begin + j) * mtd->erasesize)) {
+					mtd_map_blk_table[blk_begin + i] = blk_begin + j;
+					j++;
+					if (j == blk_cnt)
+						j++;
+					break;
+				}
+			}
+		}
+
+		return 0;
+	}
+}
+
+static __maybe_unused int mtd_map_read(struct mtd_info *mtd, loff_t offset,
+				       size_t *length, size_t *actual,
+				       loff_t lim, u_char *buffer)
+{
+	size_t left_to_read = *length;
+	u_char *p_buffer = buffer;
+	u32 erasesize = mtd->erasesize;
+	int rval;
+
+	while (left_to_read > 0) {
+		size_t block_offset = offset & (erasesize - 1);
+		size_t read_length;
+		loff_t mapped_offset;
+
+		if (offset >= mtd->size)
+			return 0;
+
+		mapped_offset = offset;
+		if (mtd_map_blk_table)  {
+			mapped_offset = (loff_t)((u32)mtd_map_blk_table[(u64)offset /
+				erasesize] * erasesize + block_offset);
+		} else {
+			if (mtd_block_isbad(mtd, offset & ~(erasesize - 1))) {
+				printf("Skip bad block 0x%08llx\n",
+				       offset & ~(erasesize - 1));
+				offset += erasesize - block_offset;
+				continue;
+			}
+		}
+
+		if (left_to_read < (erasesize - block_offset))
+			read_length = left_to_read;
+		else
+			read_length = erasesize - block_offset;
+
+		rval = mtd_read(mtd, mapped_offset, read_length, &read_length,
+				p_buffer);
+		if (rval && rval != -EUCLEAN) {
+			printf("NAND read from offset %llx failed %d\n",
+			       mapped_offset, rval);
+			*length -= left_to_read;
+			return rval;
+		}
+
+		left_to_read -= read_length;
+		offset       += read_length;
+		p_buffer     += read_length;
+	}
+
+	return 0;
+}
+
 char *mtd_part_parse(void)
 {
 	char mtd_part_info_temp[MTD_SINGLE_PART_INFO_MAX_SIZE] = {0};
@@ -122,27 +229,22 @@ ulong mtd_dread(struct udevice *udev, lbaint_t start,
 		ret = nand_read_skip_bad(mtd, off, &rwsize,
 					 NULL, mtd->size,
 					 (u_char *)(dst));
+#else
+		ret = mtd_map_read(mtd, off, &rwsize,
+				   NULL, mtd->size,
+				   (u_char *)(dst));
+#endif
 		if (!ret)
 			return blkcnt;
 		else
-#endif
 			return 0;
 	} else if (desc->devnum == BLK_MTD_SPI_NAND) {
-#if defined(CONFIG_MTD_SPI_NAND) && !defined(CONFIG_SPL_BUILD)
-		ret = nand_read_skip_bad(mtd, off, &rwsize,
-					 NULL, mtd->size,
-					 (u_char *)(dst));
+		ret = mtd_map_read(mtd, off, &rwsize,
+				   NULL, mtd->size,
+				   (u_char *)(dst));
 		if (!ret)
 			return blkcnt;
 		else
-#elif defined(CONFIG_SPL_BUILD)
-		size_t retlen;
-
-		mtd_read(mtd, off, rwsize, &retlen, dst);
-		if (retlen == rwsize)
-			return blkcnt;
-		else
-#endif
 			return 0;
 	} else if (desc->devnum == BLK_MTD_SPI_NOR) {
 #if defined(CONFIG_SPI_FLASH_MTD) || defined(CONFIG_SPL_BUILD)

commit 94b85d035db9aedd6602c619c2e2595e0cfc24ea
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Apr 23 16:53:24 2020 +0800

    misc: otp: use buffer to store capability
    
    ioctl() should return error code but not data.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ica1242619ed59728acbeda7db493e5710f410a17

diff --git a/drivers/misc/rockchip-secure-otp-v2.S b/drivers/misc/rockchip-secure-otp-v2.S
index 333893a1f7..afb6b6edc2 100644
--- a/drivers/misc/rockchip-secure-otp-v2.S
+++ b/drivers/misc/rockchip-secure-otp-v2.S
@@ -20,25 +20,42 @@
 	.fpu softvfp
 	.type	rockchip_secure_otp_v2_ioctl, %function
 rockchip_secure_otp_v2_ioctl:
-.LFB271:
+.LFB272:
 	.file 1 "drivers/misc/rockchip-secure-otp-v2.c"
-	.loc 1 158 0
+	.loc 1 165 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 .LVL0:
-	.loc 1 161 0
+	.loc 1 168 0
 	movw	r3, #27908
 	cmp	r1, r3
-	.loc 1 170 0
-	ite	eq
-	moveq	r0, #8
 .LVL1:
+.LBB18:
+.LBB19:
+	.loc 1 158 0
+	ittte	eq
+	moveq	r3, #8
+.LBE19:
+.LBE18:
+	.loc 1 171 0
+	moveq	r0, #0
+.LVL2:
+.LBB21:
+.LBB20:
+	.loc 1 158 0
+	streq	r3, [r2]
+.LVL3:
+.LBE20:
+.LBE21:
+	.loc 1 166 0
 	mvnne	r0, #21
+.LVL4:
+	.loc 1 178 0
 	bx	lr
 	.cfi_endproc
-.LFE271:
+.LFE272:
 	.size	rockchip_secure_otp_v2_ioctl, .-rockchip_secure_otp_v2_ioctl
 	.section	.text.rockchip_secure_otp_v2_read,"ax",%progbits
 	.align	1
@@ -53,7 +70,7 @@ rockchip_secure_otp_v2_read:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2:
+.LVL5:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
 	.cfi_offset 4, -32
@@ -70,15 +87,15 @@ rockchip_secure_otp_v2_read:
 	mov	r6, r2
 	.loc 1 18 0
 	bl	dev_get_platdata
-.LVL3:
+.LVL6:
 	mov	r3, #768
 	mov	r5, r0
-.LVL4:
-.LBB16:
+.LVL7:
+.LBB22:
 	.loc 1 25 0
 	movs	r1, #0
-.LVL5:
-.L6:
+.LVL8:
+.L7:
 	.loc 1 25 0 is_stmt 0 discriminator 3
 	.syntax unified
 @ 25 "drivers/misc/rockchip-secure-otp-v2.c" 1
@@ -89,44 +106,44 @@ rockchip_secure_otp_v2_read:
 	ldr	r2, [r5]
 	str	r1, [r2, r3]
 	adds	r3, r3, #4
-.LBE16:
+.LBE22:
 	.loc 1 24 0 is_stmt 1 discriminator 3
 	cmp	r3, #896
-	bne	.L6
+	bne	.L7
 	subs	r6, r6, #1
-.LVL6:
+.LVL9:
 	.loc 1 24 0 is_stmt 0
 	mov	r4, r8
-.LBB17:
+.LBB23:
 	.loc 1 45 0 is_stmt 1
 	mov	fp, #1
-.LVL7:
-.L7:
-.LBE17:
+.LVL10:
+.L8:
+.LBE23:
 	.loc 1 27 0 discriminator 1
 	sub	r3, r4, r8
 	cmp	r10, r3
-	bgt	.L14
+	bgt	.L15
 	.loc 1 19 0
 	movs	r0, #0
-	b	.L9
-.L14:
-.LVL8:
+	b	.L10
+.L15:
+.LVL11:
 	.loc 1 30 0
 	cmp	r4, #448
-	ble	.L8
-.L24:
-.LVL9:
+	ble	.L9
+.L25:
+.LVL12:
 	.loc 1 40 0
 	mov	r0, #-1
-.LVL10:
-.L9:
+.LVL13:
+.L10:
 	mov	r3, #768
-.LBB18:
+.LBB24:
 	.loc 1 66 0
 	movs	r1, #255
-.LVL11:
-.L15:
+.LVL14:
+.L16:
 	.loc 1 66 0 is_stmt 0 discriminator 3
 	.syntax unified
 @ 66 "drivers/misc/rockchip-secure-otp-v2.c" 1
@@ -137,32 +154,32 @@ rockchip_secure_otp_v2_read:
 	ldr	r2, [r5]
 	str	r1, [r2, r3]
 	adds	r3, r3, #4
-.LBE18:
+.LBE24:
 	.loc 1 65 0 is_stmt 1 discriminator 3
 	cmp	r3, #896
-	bne	.L15
+	bne	.L16
 	.loc 1 69 0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL12:
-.L8:
+.LVL15:
+.L9:
 	.loc 1 36 0
-	cbz	r4, .L10
+	cbz	r4, .L11
 	.loc 1 36 0 is_stmt 0 discriminator 1
 	sub	r3, r4, #16
 	cmp	r3, #31
-	bls	.L10
+	bls	.L11
 	.loc 1 36 0 discriminator 2
 	sub	r3, r4, #104
 	cmp	r3, #284
-	bls	.L10
+	bls	.L11
 	.loc 1 39 0 is_stmt 1
-	ldr	r0, .L25
+	ldr	r0, .L26
 	bl	printf
-.LVL13:
-	b	.L24
-.L10:
-.LVL14:
-.LBB19:
+.LVL16:
+	b	.L25
+.L11:
+.LVL17:
+.LBB25:
 	.loc 1 44 0
 	.syntax unified
 @ 44 "drivers/misc/rockchip-secure-otp-v2.c" 1
@@ -172,9 +189,9 @@ rockchip_secure_otp_v2_read:
 	.syntax unified
 	ldr	r3, [r5]
 	str	r4, [r3, #28]
-.LVL15:
-.LBE19:
-.LBB20:
+.LVL18:
+.LBE25:
+.LBB26:
 	.loc 1 45 0
 	.syntax unified
 @ 45 "drivers/misc/rockchip-secure-otp-v2.c" 1
@@ -185,58 +202,58 @@ rockchip_secure_otp_v2_read:
 	ldr	r3, [r5]
 	movw	r7, #10002
 	str	fp, [r3, #32]
-.LVL16:
-.L13:
-.LBE20:
-.LBB21:
+.LVL19:
+.L14:
+.LBE26:
+.LBB27:
 	.loc 1 48 0
 	ldr	r3, [r5]
 	ldr	r3, [r3, #48]
-.LVL17:
+.LVL20:
 	.syntax unified
 @ 48 "drivers/misc/rockchip-secure-otp-v2.c" 1
 	dmb sy
 @ 0 "" 2
-.LVL18:
+.LVL21:
 	.thumb
 	.syntax unified
-.LBE21:
+.LBE27:
 	.loc 1 49 0
-	cbz	r3, .L11
+	cbz	r3, .L12
 	.loc 1 52 0
 	subs	r7, r7, #1
-.LVL19:
-	beq	.L24
-.LVL20:
+.LVL22:
+	beq	.L25
+.LVL23:
 	.loc 1 58 0
 	movs	r0, #1
 	bl	udelay
-.LVL21:
+.LVL24:
 	.loc 1 48 0
-	b	.L13
-.LVL22:
-.L11:
-.LBB22:
+	b	.L14
+.LVL25:
+.L12:
+.LBB28:
 	.loc 1 61 0 discriminator 2
 	ldr	r3, [r5]
-.LVL23:
+.LVL26:
 	ldr	r3, [r3, #36]
-.LVL24:
+.LVL27:
 	.syntax unified
 @ 61 "drivers/misc/rockchip-secure-otp-v2.c" 1
 	dmb sy
 @ 0 "" 2
 	.thumb
 	.syntax unified
-.LBE22:
+.LBE28:
 	strb	r3, [r6, #1]!
-.LVL25:
+.LVL28:
 	adds	r4, r4, #1
-.LVL26:
-	b	.L7
-.L26:
+.LVL29:
+	b	.L8
+.L27:
 	.align	2
-.L25:
+.L26:
 	.word	.LC0
 	.cfi_endproc
 .LFE268:
@@ -249,50 +266,50 @@ rockchip_secure_otp_v2_read:
 	.fpu softvfp
 	.type	rockchip_secure_otp_v2_ofdata_to_platdata, %function
 rockchip_secure_otp_v2_ofdata_to_platdata:
-.LFB272:
-	.loc 1 179 0
+.LFB273:
+	.loc 1 187 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL27:
+.LVL30:
 	push	{r3, r4, r5, lr}
 	.cfi_def_cfa_offset 16
 	.cfi_offset 3, -16
 	.cfi_offset 4, -12
 	.cfi_offset 5, -8
 	.cfi_offset 14, -4
-	.loc 1 179 0
+	.loc 1 187 0
 	mov	r5, r0
-	.loc 1 180 0
+	.loc 1 188 0
 	bl	dev_get_platdata
-.LVL28:
+.LVL31:
 	mov	r4, r0
-.LVL29:
-	.loc 1 182 0
+.LVL32:
+	.loc 1 190 0
 	mov	r0, r5
-.LVL30:
+.LVL33:
 	bl	dev_read_addr_ptr
-.LVL31:
-	.loc 1 183 0
+.LVL34:
+	.loc 1 191 0
 	movs	r2, #0
-	.loc 1 182 0
+	.loc 1 190 0
 	str	r0, [r4]
-	.loc 1 183 0
-	ldr	r1, .L28
+	.loc 1 191 0
+	ldr	r1, .L29
 	mov	r0, r5
 	bl	dev_read_u32_default
-.LVL32:
+.LVL35:
 	str	r0, [r4, #4]
-	.loc 1 187 0
+	.loc 1 195 0
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.LVL33:
-.L29:
+.LVL36:
+.L30:
 	.align	2
-.L28:
+.L29:
 	.word	.LC1
 	.cfi_endproc
-.LFE272:
+.LFE273:
 	.size	rockchip_secure_otp_v2_ofdata_to_platdata, .-rockchip_secure_otp_v2_ofdata_to_platdata
 	.section	.text.rockchip_secure_otp_v2_write,"ax",%progbits
 	.align	1
@@ -307,7 +324,7 @@ rockchip_secure_otp_v2_write:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL34:
+.LVL37:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 40
 	.cfi_offset 4, -32
@@ -325,22 +342,22 @@ rockchip_secure_otp_v2_write:
 	mov	r7, r0
 	.loc 1 115 0
 	bl	dev_get_platdata
-.LVL35:
+.LVL38:
 	mov	r4, r0
-.LVL36:
+.LVL39:
 	.loc 1 118 0
 	mov	r0, r8
-.LVL37:
+.LVL40:
 	bl	malloc_simple
-.LVL38:
+.LVL41:
 	.loc 1 120 0
 	mov	r6, r0
-	cbnz	r0, .L31
-.LVL39:
-.L63:
+	cbnz	r0, .L32
+.LVL42:
+.L64:
 	.loc 1 133 0
 	mov	r7, #-1
-.L30:
+.L31:
 	.loc 1 154 0
 	mov	r0, r7
 	add	sp, sp, #8
@@ -348,36 +365,36 @@ rockchip_secure_otp_v2_write:
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL40:
-.L31:
+.LVL43:
+.L32:
 	.cfi_restore_state
 	.loc 1 123 0
 	mov	r2, r0
 	mov	r3, r8
 	mov	r0, r7
-.LVL41:
+.LVL44:
 	mov	r1, r5
 	bl	rockchip_secure_otp_v2_read
-.LVL42:
+.LVL45:
 	.loc 1 124 0
 	mov	r7, r0
-.LVL43:
+.LVL46:
 	cmp	r0, #0
-	bne	.L63
+	bne	.L64
 	mov	r3, r6
-.L34:
-.LVL44:
+.L35:
+.LVL47:
 	.loc 1 129 0 discriminator 1
 	subs	r2, r3, r6
 	cmp	r8, r2
-	bgt	.L35
+	bgt	.L36
 	mov	r3, #512
-.LVL45:
-.LBB33:
+.LVL48:
+.LBB39:
 	.loc 1 140 0 discriminator 3
 	movs	r1, #0
-.L36:
-.LVL46:
+.L37:
+.LVL49:
 	.syntax unified
 @ 140 "drivers/misc/rockchip-secure-otp-v2.c" 1
 	dmb sy
@@ -386,33 +403,33 @@ rockchip_secure_otp_v2_write:
 	.syntax unified
 	ldr	r2, [r4]
 	str	r1, [r2, r3]
-.LVL47:
+.LVL50:
 	adds	r3, r3, #4
-.LBE33:
+.LBE39:
 	.loc 1 139 0 discriminator 3
 	cmp	r3, #640
-	bne	.L36
+	bne	.L37
 	movs	r6, #0
-.LVL48:
-.LBB34:
-.LBB35:
+.LVL51:
+.LBB40:
+.LBB41:
 	.loc 1 82 0 discriminator 1
 	sub	r2, r5, #104
 	sub	r3, r5, #16
 	str	r3, [sp]
-.LVL49:
-.L37:
-.LBE35:
-.LBE34:
+.LVL52:
+.L38:
+.LBE41:
+.LBE40:
 	.loc 1 142 0 discriminator 1
 	cmp	r6, r8
-	blt	.L44
+	blt	.L45
 	mov	r3, #512
-.LBB45:
+.LBB51:
 	.loc 1 151 0 discriminator 3
 	movs	r1, #255
-.L45:
-.LVL50:
+.L46:
+.LVL53:
 	.syntax unified
 @ 151 "drivers/misc/rockchip-secure-otp-v2.c" 1
 	dmb sy
@@ -422,62 +439,62 @@ rockchip_secure_otp_v2_write:
 	ldr	r2, [r4]
 	str	r1, [r2, r3]
 	adds	r3, r3, #4
-.LBE45:
+.LBE51:
 	.loc 1 150 0 discriminator 3
 	cmp	r3, #640
-	bne	.L45
-	b	.L30
-.LVL51:
-.L35:
+	bne	.L46
+	b	.L31
+.LVL54:
+.L36:
 	.loc 1 130 0
 	ldrb	r2, [r3], #1	@ zero_extendqisi2
-.LVL52:
+.LVL55:
 	cmp	r2, #0
-	beq	.L34
+	beq	.L35
 	.loc 1 131 0
-	ldr	r0, .L64
-.LVL53:
+	ldr	r0, .L65
+.LVL56:
 	bl	printf
-.LVL54:
-	b	.L63
-.LVL55:
-.L44:
-.LBB46:
-.LBB42:
+.LVL57:
+	b	.L64
+.LVL58:
+.L45:
+.LBB52:
+.LBB48:
 	.loc 1 78 0
 	cmp	r5, #448
-.LBE42:
-.LBE46:
+.LBE48:
+.LBE52:
 	.loc 1 143 0
 	ldrb	r3, [r10, r6]	@ zero_extendqisi2
-.LVL56:
-.LBB47:
-.LBB43:
+.LVL59:
+.LBB53:
+.LBB49:
 	.loc 1 78 0
-	bgt	.L40
+	bgt	.L41
 	.loc 1 82 0
-	cbz	r5, .L39
+	cbz	r5, .L40
 	ldr	r1, [sp]
 	cmp	r1, #31
-	bls	.L39
+	bls	.L40
 	cmp	r2, #284
-	bls	.L39
+	bls	.L40
 	.loc 1 85 0
-	ldr	r0, .L64+4
+	ldr	r0, .L65+4
 	bl	printf
-.LVL57:
-.L40:
-.LBB36:
+.LVL60:
+.L41:
+.LBB42:
 	.loc 1 95 0 discriminator 3
 	mov	r3, #512
-.LBE36:
-.LBE43:
-.LBE47:
-.LBB48:
+.LBE42:
+.LBE49:
+.LBE53:
+.LBB54:
 	.loc 1 145 0 discriminator 3
 	movs	r1, #255
-.L43:
-.LVL58:
+.L44:
+.LVL61:
 	.syntax unified
 @ 145 "drivers/misc/rockchip-secure-otp-v2.c" 1
 	dmb sy
@@ -487,21 +504,21 @@ rockchip_secure_otp_v2_write:
 	ldr	r2, [r4]
 	str	r1, [r2, r3]
 	adds	r3, r3, #4
-.LBE48:
+.LBE54:
 	.loc 1 144 0 discriminator 3
 	cmp	r3, #640
-	bne	.L43
-	b	.L63
-.LVL59:
-.L39:
-.LBB49:
-.LBB44:
+	bne	.L44
+	b	.L64
+.LVL62:
+.L40:
+.LBB55:
+.LBB50:
 	.loc 1 89 0
-	cbz	r3, .L41
+	cbz	r3, .L42
 	adds	r0, r5, r6
 	lsls	r0, r0, #3
-.LVL60:
-.LBB37:
+.LVL63:
+.LBB43:
 	.loc 1 92 0
 	.syntax unified
 @ 92 "drivers/misc/rockchip-secure-otp-v2.c" 1
@@ -511,9 +528,9 @@ rockchip_secure_otp_v2_write:
 	.syntax unified
 	ldr	r1, [r4]
 	str	r0, [r1, #52]
-.LVL61:
-.LBE37:
-.LBB38:
+.LVL64:
+.LBE43:
+.LBB44:
 	.loc 1 93 0
 	.syntax unified
 @ 93 "drivers/misc/rockchip-secure-otp-v2.c" 1
@@ -523,11 +540,11 @@ rockchip_secure_otp_v2_write:
 	.syntax unified
 	ldr	r1, [r4]
 	movs	r0, #7
-.LVL62:
+.LVL65:
 	str	r0, [r1, #56]
-.LVL63:
-.LBE38:
-.LBB39:
+.LVL66:
+.LBE44:
+.LBB45:
 	.loc 1 94 0
 	.syntax unified
 @ 94 "drivers/misc/rockchip-secure-otp-v2.c" 1
@@ -537,9 +554,9 @@ rockchip_secure_otp_v2_write:
 	.syntax unified
 	ldr	r1, [r4]
 	str	r3, [r1, #60]
-.LVL64:
-.LBE39:
-.LBB40:
+.LVL67:
+.LBE45:
+.LBB46:
 	.loc 1 95 0
 	.syntax unified
 @ 95 "drivers/misc/rockchip-secure-otp-v2.c" 1
@@ -547,51 +564,51 @@ rockchip_secure_otp_v2_write:
 @ 0 "" 2
 	.thumb
 	.syntax unified
-	ldr	fp, .L64+8
+	ldr	fp, .L65+8
 	movs	r0, #1
 	ldr	r1, [r4]
 	str	r0, [r1, #68]
-.LVL65:
-.L42:
-.LBE40:
-.LBB41:
+.LVL68:
+.L43:
+.LBE46:
+.LBB47:
 	.loc 1 98 0
 	ldr	r1, [r4]
 	ldr	r1, [r1, #72]
-.LVL66:
+.LVL69:
 	.syntax unified
 @ 98 "drivers/misc/rockchip-secure-otp-v2.c" 1
 	dmb sy
 @ 0 "" 2
-.LVL67:
+.LVL70:
 	.thumb
 	.syntax unified
-.LBE41:
+.LBE47:
 	.loc 1 99 0
-	cbz	r1, .L41
+	cbz	r1, .L42
 	.loc 1 102 0
 	subs	fp, fp, #1
-.LVL68:
+.LVL71:
 	str	r2, [sp, #4]
-	beq	.L40
-.LVL69:
+	beq	.L41
+.LVL72:
 	.loc 1 106 0
 	movs	r0, #1
 	bl	udelay
-.LVL70:
+.LVL73:
 	ldr	r2, [sp, #4]
-	b	.L42
-.LVL71:
-.L41:
-.LBE44:
-.LBE49:
+	b	.L43
+.LVL74:
+.L42:
+.LBE50:
+.LBE55:
 	.loc 1 142 0
 	adds	r6, r6, #1
-.LVL72:
-	b	.L37
-.L65:
+.LVL75:
+	b	.L38
+.L66:
 	.align	2
-.L64:
+.L65:
 	.word	.LC2
 	.word	.LC0
 	.word	100002
@@ -683,7 +700,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.file 35 "include/log.h"
 	.section	.debug_info,"",%progbits
 .Ldebug_info0:
-	.4byte	0x1cb6
+	.4byte	0x1ce8
 	.2byte	0x4
 	.4byte	.Ldebug_abbrev0
 	.byte	0x4
@@ -692,7 +709,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0xc
 	.4byte	.LASF426
 	.4byte	.LASF427
-	.4byte	.Ldebug_ranges0+0x58
+	.4byte	.Ldebug_ranges0+0x70
 	.4byte	0
 	.4byte	.Ldebug_line0
 	.uleb128 0x2
@@ -864,7 +881,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LASF27
 	.byte	0x8
 	.byte	0x81
-	.4byte	0x13dd
+	.4byte	0x13e3
 	.byte	0
 	.uleb128 0xe
 	.4byte	.LASF28
@@ -894,7 +911,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LASF32
 	.byte	0x8
 	.byte	0x86
-	.4byte	0x1384
+	.4byte	0x138a
 	.byte	0x14
 	.uleb128 0xe
 	.4byte	.LASF33
@@ -918,7 +935,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LASF36
 	.byte	0x8
 	.byte	0x8a
-	.4byte	0x1420
+	.4byte	0x1426
 	.byte	0x24
 	.uleb128 0xe
 	.4byte	.LASF37
@@ -2489,7 +2506,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LASF297
 	.byte	0x16
 	.byte	0x2f
-	.4byte	0x12fe
+	.4byte	0x1304
 	.byte	0x8
 	.uleb128 0xe
 	.4byte	.LASF298
@@ -2501,7 +2518,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LASF299
 	.byte	0x16
 	.byte	0x32
-	.4byte	0x1346
+	.4byte	0x134c
 	.byte	0x10
 	.uleb128 0xe
 	.4byte	.LASF34
@@ -2909,12 +2926,15 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x17
 	.2byte	0x28c
 	.4byte	0x11eb
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x9f
 	.uleb128 0xd
 	.4byte	.LASF27
 	.byte	0x44
 	.byte	0x8
 	.byte	0xee
-	.4byte	0x12f9
+	.4byte	0x12ff
 	.uleb128 0xe
 	.4byte	.LASF28
 	.byte	0x8
@@ -2931,55 +2951,55 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LASF353
 	.byte	0x8
 	.byte	0xf1
-	.4byte	0x1450
+	.4byte	0x1456
 	.byte	0x8
 	.uleb128 0xe
 	.4byte	.LASF354
 	.byte	0x8
 	.byte	0xf2
-	.4byte	0x1465
+	.4byte	0x146b
 	.byte	0xc
 	.uleb128 0xe
 	.4byte	.LASF355
 	.byte	0x8
 	.byte	0xf3
-	.4byte	0x1465
+	.4byte	0x146b
 	.byte	0x10
 	.uleb128 0xe
 	.4byte	.LASF356
 	.byte	0x8
 	.byte	0xf4
-	.4byte	0x1465
+	.4byte	0x146b
 	.byte	0x14
 	.uleb128 0xe
 	.4byte	.LASF357
 	.byte	0x8
 	.byte	0xf5
-	.4byte	0x1465
+	.4byte	0x146b
 	.byte	0x18
 	.uleb128 0xe
 	.4byte	.LASF358
 	.byte	0x8
 	.byte	0xf6
-	.4byte	0x1465
+	.4byte	0x146b
 	.byte	0x1c
 	.uleb128 0xe
 	.4byte	.LASF359
 	.byte	0x8
 	.byte	0xf7
-	.4byte	0x1465
+	.4byte	0x146b
 	.byte	0x20
 	.uleb128 0xe
 	.4byte	.LASF360
 	.byte	0x8
 	.byte	0xf8
-	.4byte	0x1465
+	.4byte	0x146b
 	.byte	0x24
 	.uleb128 0xe
 	.4byte	.LASF361
 	.byte	0x8
 	.byte	0xf9
-	.4byte	0x1465
+	.4byte	0x146b
 	.byte	0x28
 	.uleb128 0xe
 	.4byte	.LASF362
@@ -3019,7 +3039,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x1221
+	.4byte	0x1227
 	.uleb128 0x2
 	.4byte	.LASF297
 	.byte	0x16
@@ -3030,7 +3050,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x10
 	.byte	0x16
 	.byte	0x19
-	.4byte	0x1346
+	.4byte	0x134c
 	.uleb128 0xe
 	.4byte	.LASF28
 	.byte	0x16
@@ -3053,17 +3073,17 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LASF47
 	.byte	0x16
 	.byte	0x1d
-	.4byte	0x1346
+	.4byte	0x134c
 	.byte	0xc
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x1309
+	.4byte	0x130f
 	.uleb128 0x28
 	.ascii	"gd\000"
 	.byte	0x16
 	.byte	0x57
-	.4byte	0x1356
+	.4byte	0x135c
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0xef2
@@ -3072,12 +3092,12 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x4
 	.byte	0x19
 	.byte	0x33
-	.4byte	0x137e
+	.4byte	0x1384
 	.uleb128 0x2a
 	.ascii	"np\000"
 	.byte	0x19
 	.byte	0x34
-	.4byte	0x137e
+	.4byte	0x1384
 	.uleb128 0x2b
 	.4byte	.LASF369
 	.byte	0x19
@@ -3091,7 +3111,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LASF370
 	.byte	0x19
 	.byte	0x36
-	.4byte	0x135c
+	.4byte	0x1362
 	.uleb128 0xc
 	.4byte	.LASF371
 	.byte	0x1a
@@ -3112,7 +3132,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x4
 	.byte	0x1b
 	.byte	0xd
-	.4byte	0x13cc
+	.4byte	0x13d2
 	.uleb128 0xf
 	.ascii	"pid\000"
 	.byte	0x1b
@@ -3124,19 +3144,19 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LASF375
 	.byte	0x1b
 	.byte	0x11
-	.4byte	0x13d7
+	.4byte	0x13dd
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x13b3
+	.4byte	0x13b9
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x12f9
+	.4byte	0x12ff
 	.uleb128 0xd
 	.4byte	.LASF36
 	.byte	0x18
 	.byte	0x1c
 	.byte	0x23
-	.4byte	0x1420
+	.4byte	0x1426
 	.uleb128 0xe
 	.4byte	.LASF35
 	.byte	0x1c
@@ -3147,7 +3167,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LASF376
 	.byte	0x1c
 	.byte	0x25
-	.4byte	0x154f
+	.4byte	0x1555
 	.byte	0x4
 	.uleb128 0xe
 	.4byte	.LASF377
@@ -3164,13 +3184,13 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x13e3
+	.4byte	0x13e9
 	.uleb128 0xd
 	.4byte	.LASF378
 	.byte	0x8
 	.byte	0x8
 	.byte	0xb5
-	.4byte	0x144b
+	.4byte	0x1451
 	.uleb128 0xe
 	.4byte	.LASF379
 	.byte	0x8
@@ -3185,25 +3205,25 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x4
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x1426
+	.4byte	0x142c
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x144b
+	.4byte	0x1451
 	.uleb128 0x12
 	.4byte	0x50
-	.4byte	0x1465
+	.4byte	0x146b
 	.uleb128 0x13
 	.4byte	0x250
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x1456
+	.4byte	0x145c
 	.uleb128 0xd
 	.4byte	.LASF381
 	.byte	0x48
 	.byte	0x1c
 	.byte	0x54
-	.4byte	0x154f
+	.4byte	0x1555
 	.uleb128 0xe
 	.4byte	.LASF28
 	.byte	0x1c
@@ -3220,55 +3240,55 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LASF382
 	.byte	0x1c
 	.byte	0x57
-	.4byte	0x1465
+	.4byte	0x146b
 	.byte	0x8
 	.uleb128 0xe
 	.4byte	.LASF383
 	.byte	0x1c
 	.byte	0x58
-	.4byte	0x1465
+	.4byte	0x146b
 	.byte	0xc
 	.uleb128 0xe
 	.4byte	.LASF384
 	.byte	0x1c
 	.byte	0x59
-	.4byte	0x1465
+	.4byte	0x146b
 	.byte	0x10
 	.uleb128 0xe
 	.4byte	.LASF385
 	.byte	0x1c
 	.byte	0x5a
-	.4byte	0x1465
+	.4byte	0x146b
 	.byte	0x14
 	.uleb128 0xe
 	.4byte	.LASF386
 	.byte	0x1c
 	.byte	0x5b
-	.4byte	0x1465
+	.4byte	0x146b
 	.byte	0x18
 	.uleb128 0xe
 	.4byte	.LASF359
 	.byte	0x1c
 	.byte	0x5c
-	.4byte	0x1465
+	.4byte	0x146b
 	.byte	0x1c
 	.uleb128 0xe
 	.4byte	.LASF360
 	.byte	0x1c
 	.byte	0x5d
-	.4byte	0x1465
+	.4byte	0x146b
 	.byte	0x20
 	.uleb128 0xe
 	.4byte	.LASF316
 	.byte	0x1c
 	.byte	0x5e
-	.4byte	0x1564
+	.4byte	0x156a
 	.byte	0x24
 	.uleb128 0xe
 	.4byte	.LASF387
 	.byte	0x1c
 	.byte	0x5f
-	.4byte	0x1564
+	.4byte	0x156a
 	.byte	0x28
 	.uleb128 0xe
 	.4byte	.LASF362
@@ -3315,16 +3335,16 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x146b
+	.4byte	0x1471
 	.uleb128 0x12
 	.4byte	0x50
-	.4byte	0x1564
+	.4byte	0x156a
 	.uleb128 0x13
-	.4byte	0x1420
+	.4byte	0x1426
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x1555
+	.4byte	0x155b
 	.uleb128 0x4
 	.4byte	.LASF390
 	.byte	0x1d
@@ -3336,7 +3356,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x7b
 	.byte	0x1e
 	.byte	0x14
-	.4byte	0x15b0
+	.4byte	0x15aa
 	.uleb128 0x22
 	.4byte	.LASF392
 	.byte	0x1
@@ -3352,49 +3372,43 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x22
 	.4byte	.LASF396
 	.byte	0x10
-	.uleb128 0x22
-	.4byte	.LASF397
-	.byte	0x20
-	.uleb128 0x22
-	.4byte	.LASF398
-	.byte	0x40
 	.byte	0
 	.uleb128 0xd
-	.4byte	.LASF399
+	.4byte	.LASF397
 	.byte	0x10
 	.byte	0x1e
-	.byte	0x57
-	.4byte	0x15ed
+	.byte	0x60
+	.4byte	0x15e7
 	.uleb128 0xe
-	.4byte	.LASF400
+	.4byte	.LASF398
 	.byte	0x1e
-	.byte	0x61
-	.4byte	0x1610
+	.byte	0x6a
+	.4byte	0x160a
 	.byte	0
 	.uleb128 0xe
-	.4byte	.LASF401
+	.4byte	.LASF399
 	.byte	0x1e
-	.byte	0x6b
-	.4byte	0x1634
+	.byte	0x74
+	.4byte	0x162e
 	.byte	0x4
 	.uleb128 0xe
-	.4byte	.LASF402
+	.4byte	.LASF400
 	.byte	0x1e
-	.byte	0x75
-	.4byte	0x1653
+	.byte	0x7e
+	.4byte	0x164d
 	.byte	0x8
 	.uleb128 0xe
-	.4byte	.LASF403
+	.4byte	.LASF401
 	.byte	0x1e
-	.byte	0x82
-	.4byte	0x1681
+	.byte	0x8b
+	.4byte	0x167b
 	.byte	0xc
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x15b0
+	.4byte	0x15aa
 	.uleb128 0x12
 	.4byte	0x50
-	.4byte	0x1610
+	.4byte	0x160a
 	.uleb128 0x13
 	.4byte	0x250
 	.uleb128 0x13
@@ -3406,10 +3420,10 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x15f2
+	.4byte	0x15ec
 	.uleb128 0x12
 	.4byte	0x50
-	.4byte	0x1634
+	.4byte	0x162e
 	.uleb128 0x13
 	.4byte	0x250
 	.uleb128 0x13
@@ -3421,10 +3435,10 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x1616
+	.4byte	0x1610
 	.uleb128 0x12
 	.4byte	0x50
-	.4byte	0x1653
+	.4byte	0x164d
 	.uleb128 0x13
 	.4byte	0x250
 	.uleb128 0x13
@@ -3434,10 +3448,10 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x163a
+	.4byte	0x1634
 	.uleb128 0x12
 	.4byte	0x50
-	.4byte	0x1681
+	.4byte	0x167b
 	.uleb128 0x13
 	.4byte	0x250
 	.uleb128 0x13
@@ -3453,13 +3467,13 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x1659
+	.4byte	0x1653
 	.uleb128 0xd
-	.4byte	.LASF404
+	.4byte	.LASF402
 	.byte	0x8
 	.byte	0x1f
 	.byte	0x36
-	.4byte	0x16ac
+	.4byte	0x16a6
 	.uleb128 0xe
 	.4byte	.LASF60
 	.byte	0x1f
@@ -3467,71 +3481,71 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x128
 	.byte	0
 	.uleb128 0xe
-	.4byte	.LASF405
+	.4byte	.LASF403
 	.byte	0x1f
 	.byte	0x38
 	.4byte	0x37
 	.byte	0x4
 	.byte	0
 	.uleb128 0x2c
-	.4byte	.LASF406
+	.4byte	.LASF404
 	.byte	0x1
-	.byte	0xac
-	.4byte	0x15ed
+	.byte	0xb4
+	.4byte	0x15e7
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	rockchip_secure_otp_ops
 	.uleb128 0xa
-	.4byte	0x144b
-	.4byte	0x16cd
+	.4byte	0x1451
+	.4byte	0x16c7
 	.uleb128 0x11
 	.4byte	0xcb
 	.byte	0x1
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x16bd
+	.4byte	0x16b7
 	.uleb128 0x2c
-	.4byte	.LASF407
+	.4byte	.LASF405
 	.byte	0x1
-	.byte	0xbd
-	.4byte	0x16cd
+	.byte	0xc5
+	.4byte	0x16c7
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	rockchip_otp_ids
 	.uleb128 0x2d
-	.4byte	.LASF408
+	.4byte	.LASF406
 	.byte	0x1
-	.byte	0xc4
-	.4byte	0x1221
+	.byte	0xcc
+	.4byte	0x1227
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	_u_boot_list_2_driver_2_rockchip_secure_otp_v2
 	.uleb128 0x2e
-	.4byte	.LASF409
+	.4byte	.LASF407
 	.byte	0x1
-	.byte	0xb2
+	.byte	0xba
 	.4byte	0x50
-	.4byte	.LFB272
-	.4byte	.LFE272-.LFB272
+	.4byte	.LFB273
+	.4byte	.LFE273-.LFB273
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1772
+	.4byte	0x176c
 	.uleb128 0x2f
 	.ascii	"dev\000"
 	.byte	0x1
-	.byte	0xb2
+	.byte	0xba
 	.4byte	0x250
-	.4byte	.LLST16
+	.4byte	.LLST18
 	.uleb128 0x30
 	.ascii	"otp\000"
 	.byte	0x1
-	.byte	0xb4
-	.4byte	0x1772
-	.4byte	.LLST17
+	.byte	0xbc
+	.4byte	0x176c
+	.4byte	.LLST19
 	.uleb128 0x31
-	.4byte	.LVL28
-	.4byte	0x1c75
-	.4byte	0x173f
+	.4byte	.LVL31
+	.4byte	0x1ca7
+	.4byte	0x1739
 	.uleb128 0x32
 	.uleb128 0x1
 	.byte	0x50
@@ -3540,9 +3554,9 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x31
-	.4byte	.LVL31
-	.4byte	0x1c81
-	.4byte	0x1753
+	.4byte	.LVL34
+	.4byte	0x1cb3
+	.4byte	0x174d
 	.uleb128 0x32
 	.uleb128 0x1
 	.byte	0x50
@@ -3551,8 +3565,8 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x33
-	.4byte	.LVL32
-	.4byte	0x1c8c
+	.4byte	.LVL35
+	.4byte	0x1cbe
 	.uleb128 0x32
 	.uleb128 0x1
 	.byte	0x50
@@ -3574,46 +3588,69 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x1687
+	.4byte	0x1681
 	.uleb128 0x2e
-	.4byte	.LASF410
+	.4byte	.LASF408
 	.byte	0x1
-	.byte	0x9c
+	.byte	0xa3
 	.4byte	0x50
-	.4byte	.LFB271
-	.4byte	.LFE271-.LFB271
+	.4byte	.LFB272
+	.4byte	.LFE272-.LFB272
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x17c7
+	.4byte	0x17dd
 	.uleb128 0x2f
 	.ascii	"dev\000"
 	.byte	0x1
-	.byte	0x9c
+	.byte	0xa3
 	.4byte	0x250
 	.4byte	.LLST0
 	.uleb128 0x34
-	.4byte	.LASF411
+	.4byte	.LASF409
 	.byte	0x1
-	.byte	0x9c
+	.byte	0xa3
 	.4byte	0x37
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x35
 	.ascii	"buf\000"
 	.byte	0x1
-	.byte	0x9d
+	.byte	0xa4
 	.4byte	0x128
 	.uleb128 0x1
 	.byte	0x52
-	.uleb128 0x36
+	.uleb128 0x30
 	.ascii	"ret\000"
 	.byte	0x1
-	.byte	0x9f
+	.byte	0xa6
 	.4byte	0x50
-	.sleb128 -22
+	.4byte	.LLST1
+	.uleb128 0x36
+	.4byte	0x17dd
+	.4byte	.LBB18
+	.4byte	.Ldebug_ranges0+0
+	.byte	0x1
+	.byte	0xab
+	.uleb128 0x37
+	.4byte	0x17ed
+	.4byte	.LLST2
+	.byte	0
+	.byte	0
+	.uleb128 0x38
+	.4byte	.LASF413
+	.byte	0x1
+	.byte	0x9c
+	.4byte	0x50
+	.byte	0x1
+	.4byte	0x17f9
+	.uleb128 0x39
+	.ascii	"buf\000"
+	.byte	0x1
+	.byte	0x9c
+	.4byte	0x1221
 	.byte	0
 	.uleb128 0x2e
-	.4byte	.LASF412
+	.4byte	.LASF410
 	.byte	0x1
 	.byte	0x70
 	.4byte	0x50
@@ -3621,44 +3658,44 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LFE270-.LFB270
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1a06
+	.4byte	0x1a38
 	.uleb128 0x2f
 	.ascii	"dev\000"
 	.byte	0x1
 	.byte	0x70
 	.4byte	0x250
-	.4byte	.LLST18
-	.uleb128 0x37
-	.4byte	.LASF413
+	.4byte	.LLST20
+	.uleb128 0x3a
+	.4byte	.LASF411
 	.byte	0x1
 	.byte	0x70
 	.4byte	0x50
-	.4byte	.LLST19
+	.4byte	.LLST21
 	.uleb128 0x2f
 	.ascii	"buf\000"
 	.byte	0x1
 	.byte	0x71
 	.4byte	0x256
-	.4byte	.LLST20
-	.uleb128 0x37
+	.4byte	.LLST22
+	.uleb128 0x3a
 	.4byte	.LASF51
 	.byte	0x1
 	.byte	0x71
 	.4byte	0x50
-	.4byte	.LLST21
+	.4byte	.LLST23
 	.uleb128 0x30
 	.ascii	"otp\000"
 	.byte	0x1
 	.byte	0x73
-	.4byte	0x1772
-	.4byte	.LLST22
+	.4byte	0x176c
+	.4byte	.LLST24
 	.uleb128 0x30
 	.ascii	"i\000"
 	.byte	0x1
 	.byte	0x74
 	.4byte	0x50
-	.4byte	.LLST23
-	.uleb128 0x38
+	.4byte	.LLST25
+	.uleb128 0x3b
 	.ascii	"n\000"
 	.byte	0x1
 	.byte	0x74
@@ -3668,7 +3705,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x1
 	.byte	0x74
 	.4byte	0x50
-	.4byte	.LLST24
+	.4byte	.LLST26
 	.uleb128 0x2c
 	.4byte	.LASF380
 	.byte	0x1
@@ -3676,114 +3713,114 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0xeb
 	.uleb128 0x1
 	.byte	0x5a
-	.uleb128 0x39
-	.4byte	.LASF414
+	.uleb128 0x3c
+	.4byte	.LASF412
 	.byte	0x1
 	.byte	0x76
 	.4byte	0xeb
-	.4byte	.LLST25
-	.uleb128 0x3a
-	.4byte	.LBB33
-	.4byte	.LBE33-.LBB33
-	.4byte	0x1889
+	.4byte	.LLST27
+	.uleb128 0x3d
+	.4byte	.LBB39
+	.4byte	.LBE39-.LBB39
+	.4byte	0x18bb
 	.uleb128 0x30
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x8c
 	.4byte	0x9f
-	.4byte	.LLST26
+	.4byte	.LLST28
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LBB48
-	.4byte	.LBE48-.LBB48
-	.4byte	0x18a6
+	.uleb128 0x3d
+	.4byte	.LBB54
+	.4byte	.LBE54-.LBB54
+	.4byte	0x18d8
 	.uleb128 0x30
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x91
 	.4byte	0x9f
-	.4byte	.LLST38
+	.4byte	.LLST40
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LBB45
-	.4byte	.LBE45-.LBB45
-	.4byte	0x18c3
+	.uleb128 0x3d
+	.4byte	.LBB51
+	.4byte	.LBE51-.LBB51
+	.4byte	0x18f5
 	.uleb128 0x30
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x97
 	.4byte	0x9f
-	.4byte	.LLST37
+	.4byte	.LLST39
 	.byte	0
-	.uleb128 0x3b
-	.4byte	0x1a06
-	.4byte	.LBB34
-	.4byte	.Ldebug_ranges0+0x18
+	.uleb128 0x3e
+	.4byte	0x1a38
+	.4byte	.LBB40
+	.4byte	.Ldebug_ranges0+0x30
 	.byte	0x1
 	.byte	0x8f
-	.4byte	0x19a4
-	.uleb128 0x3c
-	.4byte	0x1a16
-	.uleb128 0x3d
-	.4byte	0x1a37
-	.4byte	.LLST27
-	.uleb128 0x3d
-	.4byte	0x1a2c
-	.4byte	.LLST28
-	.uleb128 0x3d
-	.4byte	0x1a21
-	.4byte	.LLST29
-	.uleb128 0x3e
-	.4byte	.Ldebug_ranges0+0x18
+	.4byte	0x19d6
 	.uleb128 0x3f
-	.4byte	0x1a40
+	.4byte	0x1a48
+	.uleb128 0x37
+	.4byte	0x1a69
+	.4byte	.LLST29
+	.uleb128 0x37
+	.4byte	0x1a5e
 	.4byte	.LLST30
-	.uleb128 0x3f
-	.4byte	0x1a4b
+	.uleb128 0x37
+	.4byte	0x1a53
 	.4byte	.LLST31
 	.uleb128 0x40
-	.4byte	.Ldebug_ranges0+0x40
-	.4byte	0x1920
-	.uleb128 0x3f
-	.4byte	0x1a8e
+	.4byte	.Ldebug_ranges0+0x30
+	.uleb128 0x41
+	.4byte	0x1a72
 	.4byte	.LLST32
-	.byte	0
-	.uleb128 0x3a
-	.4byte	.LBB37
-	.4byte	.LBE37-.LBB37
-	.4byte	0x1937
-	.uleb128 0x3f
-	.4byte	0x1a5b
+	.uleb128 0x41
+	.4byte	0x1a7d
 	.4byte	.LLST33
-	.byte	0
-	.uleb128 0x3a
-	.4byte	.LBB38
-	.4byte	.LBE38-.LBB38
-	.4byte	0x194e
-	.uleb128 0x3f
-	.4byte	0x1a6c
+	.uleb128 0x42
+	.4byte	.Ldebug_ranges0+0x58
+	.4byte	0x1952
+	.uleb128 0x41
+	.4byte	0x1ac0
 	.4byte	.LLST34
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LBB39
-	.4byte	.LBE39-.LBB39
-	.4byte	0x1965
-	.uleb128 0x3f
-	.4byte	0x1a7d
+	.uleb128 0x3d
+	.4byte	.LBB43
+	.4byte	.LBE43-.LBB43
+	.4byte	0x1969
+	.uleb128 0x41
+	.4byte	0x1a8d
 	.4byte	.LLST35
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LBB41
-	.4byte	.LBE41-.LBB41
-	.4byte	0x197c
-	.uleb128 0x3f
-	.4byte	0x1a9b
+	.uleb128 0x3d
+	.4byte	.LBB44
+	.4byte	.LBE44-.LBB44
+	.4byte	0x1980
+	.uleb128 0x41
+	.4byte	0x1a9e
 	.4byte	.LLST36
 	.byte	0
+	.uleb128 0x3d
+	.4byte	.LBB45
+	.4byte	.LBE45-.LBB45
+	.4byte	0x1997
+	.uleb128 0x41
+	.4byte	0x1aaf
+	.4byte	.LLST37
+	.byte	0
+	.uleb128 0x3d
+	.4byte	.LBB47
+	.4byte	.LBE47-.LBB47
+	.4byte	0x19ae
+	.uleb128 0x41
+	.4byte	0x1acd
+	.4byte	.LLST38
+	.byte	0
 	.uleb128 0x31
-	.4byte	.LVL57
-	.4byte	0x1c97
-	.4byte	0x1993
+	.4byte	.LVL60
+	.4byte	0x1cc9
+	.4byte	0x19c5
 	.uleb128 0x32
 	.uleb128 0x1
 	.byte	0x50
@@ -3792,8 +3829,8 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LC0
 	.byte	0
 	.uleb128 0x33
-	.4byte	.LVL70
-	.4byte	0x1ca2
+	.4byte	.LVL73
+	.4byte	0x1cd4
 	.uleb128 0x32
 	.uleb128 0x1
 	.byte	0x50
@@ -3803,9 +3840,9 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.byte	0
 	.uleb128 0x31
-	.4byte	.LVL35
-	.4byte	0x1c75
-	.4byte	0x19b8
+	.4byte	.LVL38
+	.4byte	0x1ca7
+	.4byte	0x19ea
 	.uleb128 0x32
 	.uleb128 0x1
 	.byte	0x50
@@ -3814,9 +3851,9 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x31
-	.4byte	.LVL38
-	.4byte	0x1cad
-	.4byte	0x19cc
+	.4byte	.LVL41
+	.4byte	0x1cdf
+	.4byte	0x19fe
 	.uleb128 0x32
 	.uleb128 0x1
 	.byte	0x50
@@ -3825,9 +3862,9 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x31
-	.4byte	.LVL42
-	.4byte	0x1aa8
-	.4byte	0x19f2
+	.4byte	.LVL45
+	.4byte	0x1ada
+	.4byte	0x1a24
 	.uleb128 0x32
 	.uleb128 0x1
 	.byte	0x50
@@ -3854,8 +3891,8 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x33
-	.4byte	.LVL54
-	.4byte	0x1c97
+	.4byte	.LVL57
+	.4byte	0x1cc9
 	.uleb128 0x32
 	.uleb128 0x1
 	.byte	0x50
@@ -3864,20 +3901,20 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LC2
 	.byte	0
 	.byte	0
-	.uleb128 0x41
-	.4byte	.LASF429
+	.uleb128 0x38
+	.4byte	.LASF414
 	.byte	0x1
 	.byte	0x47
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x1aa8
-	.uleb128 0x42
+	.4byte	0x1ada
+	.uleb128 0x39
 	.ascii	"otp\000"
 	.byte	0x1
 	.byte	0x47
-	.4byte	0x1772
+	.4byte	0x176c
 	.uleb128 0x43
-	.4byte	.LASF413
+	.4byte	.LASF411
 	.byte	0x1
 	.byte	0x48
 	.4byte	0x50
@@ -3886,7 +3923,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x1
 	.byte	0x48
 	.4byte	0x90
-	.uleb128 0x42
+	.uleb128 0x39
 	.ascii	"i\000"
 	.byte	0x1
 	.byte	0x48
@@ -3902,39 +3939,39 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x4b
 	.4byte	0x9f
 	.uleb128 0x45
-	.4byte	0x1a67
-	.uleb128 0x38
+	.4byte	0x1a99
+	.uleb128 0x3b
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x5c
 	.4byte	0x9f
 	.byte	0
 	.uleb128 0x45
-	.4byte	0x1a78
-	.uleb128 0x38
+	.4byte	0x1aaa
+	.uleb128 0x3b
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x5d
 	.4byte	0x9f
 	.byte	0
 	.uleb128 0x45
-	.4byte	0x1a89
-	.uleb128 0x38
+	.4byte	0x1abb
+	.uleb128 0x3b
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x5e
 	.4byte	0x9f
 	.byte	0
 	.uleb128 0x45
-	.4byte	0x1a9a
-	.uleb128 0x38
+	.4byte	0x1acc
+	.uleb128 0x3b
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x5f
 	.4byte	0x9f
 	.byte	0
 	.uleb128 0x46
-	.uleb128 0x38
+	.uleb128 0x3b
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x62
@@ -3950,88 +3987,88 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LFE268-.LFB268
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1c5b
+	.4byte	0x1c8d
 	.uleb128 0x2f
 	.ascii	"dev\000"
 	.byte	0x1
 	.byte	0xf
 	.4byte	0x250
-	.4byte	.LLST1
-	.uleb128 0x37
-	.4byte	.LASF413
+	.4byte	.LLST3
+	.uleb128 0x3a
+	.4byte	.LASF411
 	.byte	0x1
 	.byte	0xf
 	.4byte	0x50
-	.4byte	.LLST2
+	.4byte	.LLST4
 	.uleb128 0x2f
 	.ascii	"buf\000"
 	.byte	0x1
 	.byte	0x10
 	.4byte	0x128
-	.4byte	.LLST3
-	.uleb128 0x37
+	.4byte	.LLST5
+	.uleb128 0x3a
 	.4byte	.LASF51
 	.byte	0x1
 	.byte	0x10
 	.4byte	0x50
-	.4byte	.LLST4
+	.4byte	.LLST6
 	.uleb128 0x30
 	.ascii	"otp\000"
 	.byte	0x1
 	.byte	0x12
-	.4byte	0x1772
-	.4byte	.LLST5
+	.4byte	0x176c
+	.4byte	.LLST7
 	.uleb128 0x30
 	.ascii	"i\000"
 	.byte	0x1
 	.byte	0x13
 	.4byte	0x50
-	.4byte	.LLST6
-	.uleb128 0x39
+	.4byte	.LLST8
+	.uleb128 0x3c
 	.4byte	.LASF415
 	.byte	0x1
 	.byte	0x13
 	.4byte	0x50
-	.4byte	.LLST7
+	.4byte	.LLST9
 	.uleb128 0x30
 	.ascii	"n\000"
 	.byte	0x1
 	.byte	0x13
 	.4byte	0x50
-	.4byte	.LLST8
+	.4byte	.LLST10
 	.uleb128 0x30
 	.ascii	"ret\000"
 	.byte	0x1
 	.byte	0x13
 	.4byte	0x50
-	.4byte	.LLST9
-	.uleb128 0x39
+	.4byte	.LLST11
+	.uleb128 0x3c
 	.4byte	.LASF380
 	.byte	0x1
 	.byte	0x14
 	.4byte	0xeb
-	.4byte	.LLST10
-	.uleb128 0x39
+	.4byte	.LLST12
+	.uleb128 0x3c
 	.4byte	.LASF416
 	.byte	0x1
 	.byte	0x15
 	.4byte	0x9f
-	.4byte	.LLST11
-	.uleb128 0x39
+	.4byte	.LLST13
+	.uleb128 0x3c
 	.4byte	.LASF418
 	.byte	0x1
 	.byte	0x16
 	.4byte	0x50
-	.4byte	.LLST12
+	.4byte	.LLST14
 	.uleb128 0x47
 	.ascii	"out\000"
 	.byte	0x1
 	.byte	0x40
-	.4byte	.L9
-	.uleb128 0x3a
-	.4byte	.LBB16
-	.4byte	.LBE16-.LBB16
-	.4byte	0x1b96
+	.4byte	.L10
+	.uleb128 0x3d
+	.4byte	.LBB22
+	.4byte	.LBE22-.LBB22
+	.4byte	0x1bc8
 	.uleb128 0x48
 	.ascii	"__v\000"
 	.byte	0x1
@@ -4039,20 +4076,20 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x9f
 	.byte	0
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LBB19
-	.4byte	.LBE19-.LBB19
-	.4byte	0x1bb3
+	.uleb128 0x3d
+	.4byte	.LBB25
+	.4byte	.LBE25-.LBB25
+	.4byte	0x1be5
 	.uleb128 0x30
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x2c
 	.4byte	0x9f
-	.4byte	.LLST14
+	.4byte	.LLST16
 	.byte	0
-	.uleb128 0x40
-	.4byte	.Ldebug_ranges0+0
-	.4byte	0x1bc9
+	.uleb128 0x42
+	.4byte	.Ldebug_ranges0+0x18
+	.4byte	0x1bfb
 	.uleb128 0x48
 	.ascii	"__v\000"
 	.byte	0x1
@@ -4060,21 +4097,21 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x9f
 	.byte	0x1
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LBB21
-	.4byte	.LBE21-.LBB21
-	.4byte	0x1be6
+	.uleb128 0x3d
+	.4byte	.LBB27
+	.4byte	.LBE27-.LBB27
+	.4byte	0x1c18
 	.uleb128 0x30
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x30
 	.4byte	0x9f
-	.4byte	.LLST15
-	.byte	0
-	.uleb128 0x3a
-	.4byte	.LBB22
-	.4byte	.LBE22-.LBB22
-	.4byte	0x1c01
+	.4byte	.LLST17
+	.byte	0
+	.uleb128 0x3d
+	.4byte	.LBB28
+	.4byte	.LBE28-.LBB28
+	.4byte	0x1c33
 	.uleb128 0x49
 	.ascii	"__v\000"
 	.byte	0x1
@@ -4083,21 +4120,21 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x1
 	.byte	0x53
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LBB18
-	.4byte	.LBE18-.LBB18
-	.4byte	0x1c1e
+	.uleb128 0x3d
+	.4byte	.LBB24
+	.4byte	.LBE24-.LBB24
+	.4byte	0x1c50
 	.uleb128 0x30
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x42
 	.4byte	0x9f
-	.4byte	.LLST13
+	.4byte	.LLST15
 	.byte	0
 	.uleb128 0x31
-	.4byte	.LVL3
-	.4byte	0x1c75
-	.4byte	0x1c33
+	.4byte	.LVL6
+	.4byte	0x1ca7
+	.4byte	0x1c65
 	.uleb128 0x32
 	.uleb128 0x1
 	.byte	0x50
@@ -4107,9 +4144,9 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x50
 	.byte	0
 	.uleb128 0x31
-	.4byte	.LVL13
-	.4byte	0x1c97
-	.4byte	0x1c4a
+	.4byte	.LVL16
+	.4byte	0x1cc9
+	.4byte	0x1c7c
 	.uleb128 0x32
 	.uleb128 0x1
 	.byte	0x50
@@ -4118,8 +4155,8 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LC0
 	.byte	0
 	.uleb128 0x33
-	.4byte	.LVL21
-	.4byte	0x1ca2
+	.4byte	.LVL24
+	.4byte	0x1cd4
 	.uleb128 0x32
 	.uleb128 0x1
 	.byte	0x50
@@ -4129,11 +4166,11 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.byte	0
 	.uleb128 0x4a
-	.4byte	.LASF430
+	.4byte	.LASF429
 	.byte	0x1a
 	.2byte	0x36f
 	.byte	0x3
-	.4byte	0x1c75
+	.4byte	0x1ca7
 	.uleb128 0x4b
 	.ascii	"ptr\000"
 	.byte	0x1a
@@ -4853,7 +4890,50 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.byte	0
 	.uleb128 0x36
-	.uleb128 0x34
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x52
+	.uleb128 0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x37
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x38
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x20
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x39
+	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
 	.uleb128 0x8
@@ -4863,11 +4943,9 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0xb
 	.uleb128 0x49
 	.uleb128 0x13
-	.uleb128 0x1c
-	.uleb128 0xd
 	.byte	0
 	.byte	0
-	.uleb128 0x37
+	.uleb128 0x3a
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -4882,7 +4960,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x38
+	.uleb128 0x3b
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -4895,7 +4973,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x3c
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -4910,7 +4988,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x3a
+	.uleb128 0x3d
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x11
@@ -4921,7 +4999,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3b
+	.uleb128 0x3e
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -4938,30 +5016,21 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3c
-	.uleb128 0x5
-	.byte	0
-	.uleb128 0x31
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x3d
+	.uleb128 0x3f
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x3e
+	.uleb128 0x40
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x55
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x3f
+	.uleb128 0x41
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -4970,7 +5039,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x40
+	.uleb128 0x42
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x55
@@ -4979,38 +5048,6 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x41
-	.uleb128 0x2e
-	.byte	0x1
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x27
-	.uleb128 0x19
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x20
-	.uleb128 0xb
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x42
-	.uleb128 0x5
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.byte	0
-	.byte	0
 	.uleb128 0x43
 	.uleb128 0x5
 	.byte	0
@@ -5159,17 +5196,17 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.section	.debug_loc,"",%progbits
 .Ldebug_loc0:
-.LLST16:
-	.4byte	.LVL27
-	.4byte	.LVL28-1
+.LLST18:
+	.4byte	.LVL30
+	.4byte	.LVL31-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL28-1
-	.4byte	.LVL33
+	.4byte	.LVL31-1
+	.4byte	.LVL36
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL33
-	.4byte	.LFE272
+	.4byte	.LVL36
+	.4byte	.LFE273
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -5177,24 +5214,24 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST17:
-	.4byte	.LVL29
-	.4byte	.LVL30
+.LLST19:
+	.4byte	.LVL32
+	.4byte	.LVL33
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL30
 	.4byte	.LVL33
+	.4byte	.LVL36
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
 .LLST0:
 	.4byte	.LVL0
-	.4byte	.LVL1
+	.4byte	.LVL2
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1
-	.4byte	.LFE271
+	.4byte	.LVL2
+	.4byte	.LFE272
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -5202,27 +5239,49 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST18:
-	.4byte	.LVL34
-	.4byte	.LVL35-1
+.LLST1:
+	.4byte	.LVL0
+	.4byte	.LVL3
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xea
+	.byte	0x9f
+	.4byte	.LVL4
+	.4byte	.LFE272
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xea
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST2:
+	.4byte	.LVL1
+	.4byte	.LVL3
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST20:
+	.4byte	.LVL37
+	.4byte	.LVL38-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL35-1
-	.4byte	.LVL39
+	.4byte	.LVL38-1
+	.4byte	.LVL42
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL39
-	.4byte	.LVL40
+	.4byte	.LVL42
+	.4byte	.LVL43
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL40
 	.4byte	.LVL43
+	.4byte	.LVL46
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL43
+	.4byte	.LVL46
 	.4byte	.LFE270
 	.2byte	0x4
 	.byte	0xf3
@@ -5231,53 +5290,53 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST19:
-	.4byte	.LVL34
-	.4byte	.LVL35-1
+.LLST21:
+	.4byte	.LVL37
+	.4byte	.LVL38-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL35-1
+	.4byte	.LVL38-1
 	.4byte	.LFE270
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST20:
-	.4byte	.LVL34
-	.4byte	.LVL35-1
+.LLST22:
+	.4byte	.LVL37
+	.4byte	.LVL38-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL35-1
+	.4byte	.LVL38-1
 	.4byte	.LFE270
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
-.LLST21:
-	.4byte	.LVL34
-	.4byte	.LVL35-1
+.LLST23:
+	.4byte	.LVL37
+	.4byte	.LVL38-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL35-1
+	.4byte	.LVL38-1
 	.4byte	.LFE270
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST22:
-	.4byte	.LVL36
-	.4byte	.LVL37
+.LLST24:
+	.4byte	.LVL39
+	.4byte	.LVL40
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL37
+	.4byte	.LVL40
 	.4byte	.LFE270
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST23:
-	.4byte	.LVL44
-	.4byte	.LVL45
+.LLST25:
+	.4byte	.LVL47
+	.4byte	.LVL48
 	.2byte	0x6
 	.byte	0x73
 	.sleb128 0
@@ -5285,12 +5344,12 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL49
-	.4byte	.LVL51
+	.4byte	.LVL52
+	.4byte	.LVL54
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL51
-	.4byte	.LVL52
+	.4byte	.LVL54
+	.4byte	.LVL55
 	.2byte	0x6
 	.byte	0x73
 	.sleb128 0
@@ -5298,8 +5357,8 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL52
-	.4byte	.LVL54-1
+	.4byte	.LVL55
+	.4byte	.LVL57-1
 	.2byte	0x7
 	.byte	0x76
 	.sleb128 0
@@ -5308,157 +5367,157 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.sleb128 0
 	.byte	0x22
 	.byte	0x9f
-	.4byte	.LVL55
+	.4byte	.LVL58
 	.4byte	.LFE270
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST24:
-	.4byte	.LVL42
-	.4byte	.LVL49
+.LLST26:
+	.4byte	.LVL45
+	.4byte	.LVL52
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL49
-	.4byte	.LVL51
+	.4byte	.LVL52
+	.4byte	.LVL54
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL51
-	.4byte	.LVL53
+	.4byte	.LVL54
+	.4byte	.LVL56
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL53
+	.4byte	.LVL56
 	.4byte	.LFE270
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST25:
-	.4byte	.LVL38
-	.4byte	.LVL39
+.LLST27:
+	.4byte	.LVL41
+	.4byte	.LVL42
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL40
-	.4byte	.LVL41
+	.4byte	.LVL43
+	.4byte	.LVL44
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL41
-	.4byte	.LVL48
+	.4byte	.LVL44
+	.4byte	.LVL51
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL51
-	.4byte	.LVL55
+	.4byte	.LVL54
+	.4byte	.LVL58
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST26:
-	.4byte	.LVL46
-	.4byte	.LVL51
+.LLST28:
+	.4byte	.LVL49
+	.4byte	.LVL54
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL55
+	.4byte	.LVL58
 	.4byte	.LFE270
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST38:
-	.4byte	.LVL58
-	.4byte	.LVL59
+.LLST40:
+	.4byte	.LVL61
+	.4byte	.LVL62
 	.2byte	0x3
 	.byte	0x8
 	.byte	0xff
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST37:
-	.4byte	.LVL50
-	.4byte	.LVL51
+.LLST39:
+	.4byte	.LVL53
+	.4byte	.LVL54
 	.2byte	0x3
 	.byte	0x8
 	.byte	0xff
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST27:
-	.4byte	.LVL56
-	.4byte	.LVL71
+.LLST29:
+	.4byte	.LVL59
+	.4byte	.LVL74
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST28:
-	.4byte	.LVL56
-	.4byte	.LVL57-1
+.LLST30:
+	.4byte	.LVL59
+	.4byte	.LVL60-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL59
-	.4byte	.LVL65
+	.4byte	.LVL62
+	.4byte	.LVL68
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST29:
-	.4byte	.LVL56
-	.4byte	.LVL71
+.LLST31:
+	.4byte	.LVL59
+	.4byte	.LVL74
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST30:
-	.4byte	.LVL65
+.LLST32:
 	.4byte	.LVL68
+	.4byte	.LVL71
 	.2byte	0x3
 	.byte	0x7b
 	.sleb128 -2
 	.byte	0x9f
-	.4byte	.LVL68
-	.4byte	.LVL69
+	.4byte	.LVL71
+	.4byte	.LVL72
 	.2byte	0x3
 	.byte	0x7b
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL69
-	.4byte	.LVL71
+	.4byte	.LVL72
+	.4byte	.LVL74
 	.2byte	0x3
 	.byte	0x7b
 	.sleb128 -2
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST31:
-	.4byte	.LVL67
-	.4byte	.LVL70-1
+.LLST33:
+	.4byte	.LVL70
+	.4byte	.LVL73-1
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST32:
-	.4byte	.LVL64
-	.4byte	.LVL71
+.LLST34:
+	.4byte	.LVL67
+	.4byte	.LVL74
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST33:
-	.4byte	.LVL60
-	.4byte	.LVL62
+.LLST35:
+	.4byte	.LVL63
+	.4byte	.LVL65
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL62
-	.4byte	.LVL63
+	.4byte	.LVL65
+	.4byte	.LVL66
 	.2byte	0x5
 	.byte	0x74
 	.sleb128 0
 	.byte	0x6
 	.byte	0x23
 	.uleb128 0x34
-	.4byte	.LVL63
-	.4byte	.LVL71
+	.4byte	.LVL66
+	.4byte	.LVL74
 	.2byte	0x8
 	.byte	0x75
 	.sleb128 0
@@ -5470,34 +5529,34 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST34:
-	.4byte	.LVL61
-	.4byte	.LVL71
+.LLST36:
+	.4byte	.LVL64
+	.4byte	.LVL74
 	.2byte	0x2
 	.byte	0x37
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST35:
-	.4byte	.LVL63
-	.4byte	.LVL65
+.LLST37:
+	.4byte	.LVL66
+	.4byte	.LVL68
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST36:
-	.4byte	.LVL66
-	.4byte	.LVL70-1
+.LLST38:
+	.4byte	.LVL69
+	.4byte	.LVL73-1
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST1:
-	.4byte	.LVL2
-	.4byte	.LVL3-1
+.LLST3:
+	.4byte	.LVL5
+	.4byte	.LVL6-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL3-1
+	.4byte	.LVL6-1
 	.4byte	.LFE268
 	.2byte	0x4
 	.byte	0xf3
@@ -5506,33 +5565,33 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST2:
-	.4byte	.LVL2
-	.4byte	.LVL3-1
+.LLST4:
+	.4byte	.LVL5
+	.4byte	.LVL6-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL3-1
+	.4byte	.LVL6-1
 	.4byte	.LFE268
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST3:
-	.4byte	.LVL2
-	.4byte	.LVL3-1
+.LLST5:
+	.4byte	.LVL5
+	.4byte	.LVL6-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL3-1
-	.4byte	.LVL6
+	.4byte	.LVL6-1
+	.4byte	.LVL9
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL6
-	.4byte	.LVL7
+	.4byte	.LVL9
+	.4byte	.LVL10
 	.2byte	0x3
 	.byte	0x76
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL7
+	.4byte	.LVL10
 	.4byte	.LFE268
 	.2byte	0x4
 	.byte	0xf3
@@ -5541,31 +5600,31 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST4:
-	.4byte	.LVL2
-	.4byte	.LVL3-1
+.LLST6:
+	.4byte	.LVL5
+	.4byte	.LVL6-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL3-1
+	.4byte	.LVL6-1
 	.4byte	.LFE268
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
-.LLST5:
-	.4byte	.LVL4
+.LLST7:
 	.4byte	.LVL7
+	.4byte	.LVL10
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL7
+	.4byte	.LVL10
 	.4byte	.LFE268
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST6:
-	.4byte	.LVL7
-	.4byte	.LVL25
+.LLST8:
+	.4byte	.LVL10
+	.4byte	.LVL28
 	.2byte	0x6
 	.byte	0x74
 	.sleb128 0
@@ -5573,8 +5632,8 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL25
-	.4byte	.LVL26
+	.4byte	.LVL28
+	.4byte	.LVL29
 	.2byte	0x8
 	.byte	0x74
 	.sleb128 0
@@ -5584,7 +5643,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x23
 	.uleb128 0x1
 	.byte	0x9f
-	.4byte	.LVL26
+	.4byte	.LVL29
 	.4byte	.LFE268
 	.2byte	0x6
 	.byte	0x74
@@ -5595,20 +5654,20 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST7:
-	.4byte	.LVL16
+.LLST9:
 	.4byte	.LVL19
+	.4byte	.LVL22
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 -2
 	.byte	0x9f
-	.4byte	.LVL19
-	.4byte	.LVL20
+	.4byte	.LVL22
+	.4byte	.LVL23
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL20
+	.4byte	.LVL23
 	.4byte	.LFE268
 	.2byte	0x3
 	.byte	0x77
@@ -5616,54 +5675,54 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST8:
-	.4byte	.LVL4
-	.4byte	.LVL5
+.LLST10:
+	.4byte	.LVL7
+	.4byte	.LVL8
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL10
-	.4byte	.LVL11
+	.4byte	.LVL13
+	.4byte	.LVL14
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST9:
-	.4byte	.LVL4
-	.4byte	.LVL9
+.LLST11:
+	.4byte	.LVL7
+	.4byte	.LVL12
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL9
-	.4byte	.LVL10
+	.4byte	.LVL12
+	.4byte	.LVL13
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL10
-	.4byte	.LVL12
+	.4byte	.LVL13
+	.4byte	.LVL15
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL12
+	.4byte	.LVL15
 	.4byte	.LFE268
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST10:
-	.4byte	.LVL4
-	.4byte	.LVL6
+.LLST12:
+	.4byte	.LVL7
+	.4byte	.LVL9
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL6
-	.4byte	.LVL7
+	.4byte	.LVL9
+	.4byte	.LVL10
 	.2byte	0x3
 	.byte	0x76
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL7
+	.4byte	.LVL10
 	.4byte	.LFE268
 	.2byte	0x4
 	.byte	0xf3
@@ -5672,27 +5731,27 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST11:
-	.4byte	.LVL18
-	.4byte	.LVL21-1
+.LLST13:
+	.4byte	.LVL21
+	.4byte	.LVL24-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL22
-	.4byte	.LVL23
+	.4byte	.LVL25
+	.4byte	.LVL26
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST12:
-	.4byte	.LVL8
-	.4byte	.LVL10
+.LLST14:
+	.4byte	.LVL11
+	.4byte	.LVL13
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL12
-	.4byte	.LVL26
+	.4byte	.LVL15
+	.4byte	.LVL29
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL26
+	.4byte	.LVL29
 	.4byte	.LFE268
 	.2byte	0x3
 	.byte	0x74
@@ -5700,12 +5759,12 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST14:
-	.4byte	.LVL14
-	.4byte	.LVL26
+.LLST16:
+	.4byte	.LVL17
+	.4byte	.LVL29
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL26
+	.4byte	.LVL29
 	.4byte	.LFE268
 	.2byte	0x3
 	.byte	0x74
@@ -5713,20 +5772,20 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST15:
-	.4byte	.LVL17
-	.4byte	.LVL21-1
+.LLST17:
+	.4byte	.LVL20
+	.4byte	.LVL24-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL22
-	.4byte	.LVL23
+	.4byte	.LVL25
+	.4byte	.LVL26
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST13:
-	.4byte	.LVL11
-	.4byte	.LVL12
+.LLST15:
+	.4byte	.LVL14
+	.4byte	.LVL15
 	.2byte	0x3
 	.byte	0x8
 	.byte	0xff
@@ -5741,46 +5800,52 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.2byte	0
 	.2byte	0
-	.4byte	.LFB271
-	.4byte	.LFE271-.LFB271
-	.4byte	.LFB268
-	.4byte	.LFE268-.LFB268
 	.4byte	.LFB272
 	.4byte	.LFE272-.LFB272
+	.4byte	.LFB268
+	.4byte	.LFE268-.LFB268
+	.4byte	.LFB273
+	.4byte	.LFE273-.LFB273
 	.4byte	.LFB270
 	.4byte	.LFE270-.LFB270
 	.4byte	0
 	.4byte	0
 	.section	.debug_ranges,"",%progbits
 .Ldebug_ranges0:
-	.4byte	.LBB17
-	.4byte	.LBE17
-	.4byte	.LBB20
-	.4byte	.LBE20
+	.4byte	.LBB18
+	.4byte	.LBE18
+	.4byte	.LBB21
+	.4byte	.LBE21
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB34
-	.4byte	.LBE34
-	.4byte	.LBB46
-	.4byte	.LBE46
-	.4byte	.LBB47
-	.4byte	.LBE47
-	.4byte	.LBB49
-	.4byte	.LBE49
+	.4byte	.LBB23
+	.4byte	.LBE23
+	.4byte	.LBB26
+	.4byte	.LBE26
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB36
-	.4byte	.LBE36
 	.4byte	.LBB40
 	.4byte	.LBE40
+	.4byte	.LBB52
+	.4byte	.LBE52
+	.4byte	.LBB53
+	.4byte	.LBE53
+	.4byte	.LBB55
+	.4byte	.LBE55
+	.4byte	0
+	.4byte	0
+	.4byte	.LBB42
+	.4byte	.LBE42
+	.4byte	.LBB46
+	.4byte	.LBE46
 	.4byte	0
 	.4byte	0
-	.4byte	.LFB271
-	.4byte	.LFE271
-	.4byte	.LFB268
-	.4byte	.LFE268
 	.4byte	.LFB272
 	.4byte	.LFE272
+	.4byte	.LFB268
+	.4byte	.LFE268
+	.4byte	.LFB273
+	.4byte	.LFE273
 	.4byte	.LFB270
 	.4byte	.LFE270
 	.4byte	0
@@ -5850,7 +5915,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"bi_intfreq\000"
 .LASF11:
 	.ascii	"phys_addr_t\000"
-.LASF401:
+.LASF399:
 	.ascii	"write\000"
 .LASF236:
 	.ascii	"UCLASS_VIDEO_BRIDGE\000"
@@ -5878,7 +5943,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"UCLASS_CROS_EC\000"
 .LASF74:
 	.ascii	"bi_dsp_freq\000"
-.LASF407:
+.LASF405:
 	.ascii	"rockchip_otp_ids\000"
 .LASF122:
 	.ascii	"image_start\000"
@@ -5918,7 +5983,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"UCLASS_CODEC\000"
 .LASF285:
 	.ascii	"env_buf\000"
-.LASF429:
+.LASF414:
 	.ascii	"rockchip_secure_otp_write_byte\000"
 .LASF21:
 	.ascii	"errno\000"
@@ -5938,7 +6003,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"size_dt_strings\000"
 .LASF235:
 	.ascii	"UCLASS_VIDEO\000"
-.LASF408:
+.LASF406:
 	.ascii	"_u_boot_list_2_driver_2_rockchip_secure_otp_v2\000"
 .LASF269:
 	.ascii	"relocaddr\000"
@@ -5980,7 +6045,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"ih_hcrc\000"
 .LASF271:
 	.ascii	"mon_len\000"
-.LASF403:
+.LASF401:
 	.ascii	"call\000"
 .LASF124:
 	.ascii	"load\000"
@@ -6006,6 +6071,8 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"UCLASS_LED\000"
 .LASF111:
 	.ascii	"ih_size\000"
+.LASF413:
+	.ascii	"rockchip_secure_otp_v2_capability\000"
 .LASF39:
 	.ascii	"uclass_node\000"
 .LASF23:
@@ -6016,8 +6083,6 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"net_state\000"
 .LASF368:
 	.ascii	"value\000"
-.LASF397:
-	.ascii	"EFUSE_S\000"
 .LASF185:
 	.ascii	"UCLASS_I2C_MUX\000"
 .LASF14:
@@ -6056,7 +6121,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"net_restart_wrap\000"
 .LASF329:
 	.ascii	"net_ethaddr\000"
-.LASF412:
+.LASF410:
 	.ascii	"rockchip_secure_otp_v2_write\000"
 .LASF42:
 	.ascii	"flags\000"
@@ -6166,7 +6231,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"net_nis_domain\000"
 .LASF142:
 	.ascii	"fit_noffset_fdt\000"
-.LASF406:
+.LASF404:
 	.ascii	"rockchip_secure_otp_ops\000"
 .LASF351:
 	.ascii	"NETLOOP_FAIL\000"
@@ -6234,7 +6299,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"___strtok\000"
 .LASF344:
 	.ascii	"net_boot_file_expected_size_in_blocks\000"
-.LASF404:
+.LASF402:
 	.ascii	"rockchip_otp_v2_platdata\000"
 .LASF353:
 	.ascii	"of_match\000"
@@ -6280,7 +6345,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"timeout\000"
 .LASF259:
 	.ascii	"addr\000"
-.LASF400:
+.LASF398:
 	.ascii	"read\000"
 .LASF8:
 	.ascii	"unsigned int\000"
@@ -6288,7 +6353,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"ushort\000"
 .LASF313:
 	.ascii	"eth_device\000"
-.LASF402:
+.LASF400:
 	.ascii	"ioctl\000"
 .LASF421:
 	.ascii	"dev_read_u32_default\000"
@@ -6320,11 +6385,11 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"UCLASS_FIRMWARE\000"
 .LASF191:
 	.ascii	"UCLASS_LPC\000"
-.LASF413:
+.LASF411:
 	.ascii	"offset\000"
 .LASF187:
 	.ascii	"UCLASS_IDE\000"
-.LASF399:
+.LASF397:
 	.ascii	"misc_ops\000"
 .LASF297:
 	.ascii	"phandle\000"
@@ -6424,9 +6489,9 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"sibling_node\000"
 .LASF284:
 	.ascii	"of_root\000"
-.LASF409:
+.LASF407:
 	.ascii	"rockchip_secure_otp_v2_ofdata_to_platdata\000"
-.LASF414:
+.LASF412:
 	.ascii	"data_temp\000"
 .LASF57:
 	.ascii	"flash_info\000"
@@ -6438,15 +6503,13 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"region\000"
 .LASF105:
 	.ascii	"size_dt_struct\000"
-.LASF398:
-	.ascii	"EFUSE_NS\000"
 .LASF276:
 	.ascii	"dm_root\000"
 .LASF294:
 	.ascii	"sys_start_tick\000"
 .LASF299:
 	.ascii	"properties\000"
-.LASF410:
+.LASF408:
 	.ascii	"rockchip_secure_otp_v2_ioctl\000"
 .LASF197:
 	.ascii	"UCLASS_MTD\000"
@@ -6518,7 +6581,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"per_child_auto_alloc_size\000"
 .LASF290:
 	.ascii	"malloc_ptr\000"
-.LASF405:
+.LASF403:
 	.ascii	"secure_conf_base\000"
 .LASF151:
 	.ascii	"initrd_end\000"
@@ -6562,7 +6625,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"bd_t\000"
 .LASF312:
 	.ascii	"s_addr\000"
-.LASF411:
+.LASF409:
 	.ascii	"request\000"
 .LASF385:
 	.ascii	"post_probe\000"
@@ -6596,7 +6659,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"ofdata_to_platdata\000"
 .LASF64:
 	.ascii	"reserved\000"
-.LASF430:
+.LASF429:
 	.ascii	"free\000"
 .LASF85:
 	.ascii	"bi_dram\000"

commit c891a1cd82bda999a037decb5a70ae1f736e09d2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 23 20:12:56 2020 +0800

    scripts: add uimage pack script
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Id1570789d84f8aba3a6b857e92cc2941e640aaa4

diff --git a/scripts/uimage-pack.sh b/scripts/uimage-pack.sh
new file mode 100755
index 0000000000..57222bae03
--- /dev/null
+++ b/scripts/uimage-pack.sh
@@ -0,0 +1,21 @@
+#!/bin/bash
+#
+# Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier: GPL-2.0
+#
+set -e
+
+IMG_DIR=images
+IMG_NAME=boot.img
+
+if grep -Eq ''^CONFIG_ARM64=y'|'^CONFIG_ARM64_BOOT_AARCH32=y'' .config ; then
+	ARCH=arm64
+else
+	ARCH=arm
+fi
+
+echo
+./tools/mkimage -n 'Multi Images' -A $ARCH -O linux -T multi -C none -a 0xffffffff -e 0xffffffff -d ${IMG_DIR}/kernel.img:${IMG_DIR}/ramdisk.img:${IMG_DIR}/rk-kernel.dtb:${IMG_DIR}/resource.img $IMG_NAME
+echo
+

commit 72a681d49053990b221c1198c2fac2ccede028dd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 23 19:53:56 2020 +0800

    scripts: fit-unpack: add hash verify
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I11982ee2e6fb09f5c0007334832d7decb6025756

diff --git a/scripts/fit-unpack.sh b/scripts/fit-unpack.sh
index cfef5a98ad..2fb7ba5eb4 100755
--- a/scripts/fit-unpack.sh
+++ b/scripts/fit-unpack.sh
@@ -52,10 +52,11 @@ function args_process()
 
 function gen_images()
 {
-	printf "\n## Unpack $file to directory $output/\n"
+	printf "\n# Unpack $file to directory $output/\n"
 	fdtget -l $file /images > $output/unpack.txt
 	cat $output/unpack.txt | while read line
 	do
+		# generate image
 		node="/images/${line}"
 		name=`fdtget -ts $file $node image`
 		offs=`fdtget -ti $file $node data-position`
@@ -64,7 +65,6 @@ function gen_images()
 			continue;
 		fi
 
-		printf "    %-15s: %d bytes\n" ${name} $size
 		if [ $size -ne 0 ]; then
 			dd if=$file of=$output/dd.tmp  bs=$offs skip=1  >/dev/null 2>&1
 			dd if=$output/dd.tmp of=$output/$name bs=$size count=1 >/dev/null 2>&1
@@ -72,6 +72,36 @@ function gen_images()
 		else
 			touch $output/$name
 		fi
+
+		# hash verify
+		algo=`fdtget -ts $file $node/hash@1 algo`
+		if [ -z $algo ]; then
+			printf "    %-20s: %d bytes" $name $size
+			continue;
+		fi
+
+		data=`fdtget -tx $file $node/hash@1 value`
+		data=`echo " "$data | sed "s/ / 0x/g"`
+		csum=`"$algo"sum $output/$name | awk '{ print $1}'`
+
+		hash=""
+		for((i=1;;i++));
+		do
+			hex=`echo $data | awk -v idx=$i '{ print $idx }'`
+			if [ -z $hex ]; then
+				break;
+			fi
+
+			hex=`printf "%08x" $hex` # align !!
+			hash="$hash$hex"
+		done
+
+		printf "  %-20s: %d bytes... %s" $name $size $algo
+		if [ "$csum" = "$hash" -o $size -eq 0 ]; then
+			echo "+"
+		else
+			echo "-"
+		fi
 	done
 
 	rm $output/unpack.txt
@@ -79,4 +109,5 @@ function gen_images()
 }
 
 args_process $*
-gen_images
\ No newline at end of file
+gen_images
+

commit 0d7422431a4995c062114877f856cf6660f20947
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Apr 3 13:02:52 2020 +0800

    mtd: mtd_blk: add flash map block management
    
    1.SPI Nand MTD partition bad block will not be detected if the address
    isn't begin with the partition first block.
    2.To avoid this problem, we should use map partition block address to
    get right data.
    3.It's compatible if the map table isn't initialed.
    
    Change-Id: I11858b9b30a8fffecdbad804b1bad7b247b51d23
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index 1c233c3658..ed4f9a6b25 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -18,6 +18,113 @@
 #define MTD_PART_INFO_MAX_SIZE		512
 #define MTD_SINGLE_PART_INFO_MAX_SIZE	40
 
+static int *mtd_map_blk_table;
+
+int mtd_blk_map_table_init(struct blk_desc *desc,
+			   loff_t offset,
+			   size_t length)
+{
+	u32 blk_total, blk_begin, blk_cnt;
+	struct mtd_info *mtd = NULL;
+	int i, j;
+
+	if (!desc)
+		return -ENODEV;
+
+	if (desc->devnum == BLK_MTD_NAND) {
+#if defined(CONFIG_NAND) && !defined(CONFIG_SPL_BUILD)
+		mtd = dev_get_priv(desc->bdev->parent);
+#endif
+	} else if (desc->devnum == BLK_MTD_SPI_NAND) {
+#if defined(CONFIG_MTD_SPI_NAND) && !defined(CONFIG_SPL_BUILD)
+		mtd = desc->bdev->priv;
+#endif
+	}
+
+	if (!mtd) {
+		return -ENODEV;
+	} else {
+		blk_total = mtd->size / mtd->erasesize;
+		if (!mtd_map_blk_table) {
+			mtd_map_blk_table = (int *)malloc(blk_total * 4);
+			for (i = 0; i < blk_total; i++)
+				mtd_map_blk_table[i] = i;
+		}
+
+		blk_begin = (u32)offset / mtd->erasesize;
+		blk_cnt = (u32)length / mtd->erasesize;
+		j = 0;
+		 /* should not across blk_cnt */
+		for (i = 0; i < blk_cnt; i++) {
+			if (j >= blk_cnt)
+				mtd_map_blk_table[blk_begin + i] = -1;
+			for (; j < blk_cnt; j++) {
+				if (!mtd_block_isbad(mtd, (blk_begin + j) * mtd->erasesize)) {
+					mtd_map_blk_table[blk_begin + i] = blk_begin + j;
+					j++;
+					if (j == blk_cnt)
+						j++;
+					break;
+				}
+			}
+		}
+
+		return 0;
+	}
+}
+
+static __maybe_unused int mtd_map_read(struct mtd_info *mtd, loff_t offset,
+				       size_t *length, size_t *actual,
+				       loff_t lim, u_char *buffer)
+{
+	size_t left_to_read = *length;
+	u_char *p_buffer = buffer;
+	u32 erasesize = mtd->erasesize;
+	int rval;
+
+	while (left_to_read > 0) {
+		size_t block_offset = offset & (erasesize - 1);
+		size_t read_length;
+		loff_t mapped_offset;
+
+		if (offset >= mtd->size)
+			return 0;
+
+		mapped_offset = offset;
+		if (mtd_map_blk_table)  {
+			mapped_offset = (loff_t)((u32)mtd_map_blk_table[(u64)offset /
+				erasesize] * erasesize + block_offset);
+		} else {
+			if (mtd_block_isbad(mtd, offset & ~(erasesize - 1))) {
+				printf("Skip bad block 0x%08llx\n",
+				       offset & ~(erasesize - 1));
+				offset += erasesize - block_offset;
+				continue;
+			}
+		}
+
+		if (left_to_read < (erasesize - block_offset))
+			read_length = left_to_read;
+		else
+			read_length = erasesize - block_offset;
+
+		rval = mtd_read(mtd, mapped_offset, read_length, &read_length,
+				p_buffer);
+		if (rval && rval != -EUCLEAN) {
+			printf("NAND read from offset %llx failed %d\n",
+			       mapped_offset, rval);
+			*length -= left_to_read;
+			return rval;
+		}
+
+		left_to_read -= read_length;
+		offset       += read_length;
+		p_buffer     += read_length;
+	}
+
+	return 0;
+}
+
 char *mtd_part_parse(void)
 {
 	char mtd_part_info_temp[MTD_SINGLE_PART_INFO_MAX_SIZE] = {0};
@@ -122,27 +229,22 @@ ulong mtd_dread(struct udevice *udev, lbaint_t start,
 		ret = nand_read_skip_bad(mtd, off, &rwsize,
 					 NULL, mtd->size,
 					 (u_char *)(dst));
+#else
+		ret = mtd_map_read(mtd, off, &rwsize,
+				   NULL, mtd->size,
+				   (u_char *)(dst));
+#endif
 		if (!ret)
 			return blkcnt;
 		else
-#endif
 			return 0;
 	} else if (desc->devnum == BLK_MTD_SPI_NAND) {
-#if defined(CONFIG_MTD_SPI_NAND) && !defined(CONFIG_SPL_BUILD)
-		ret = nand_read_skip_bad(mtd, off, &rwsize,
-					 NULL, mtd->size,
-					 (u_char *)(dst));
+		ret = mtd_map_read(mtd, off, &rwsize,
+				   NULL, mtd->size,
+				   (u_char *)(dst));
 		if (!ret)
 			return blkcnt;
 		else
-#elif defined(CONFIG_SPL_BUILD)
-		size_t retlen;
-
-		mtd_read(mtd, off, rwsize, &retlen, dst);
-		if (retlen == rwsize)
-			return blkcnt;
-		else
-#endif
 			return 0;
 	} else if (desc->devnum == BLK_MTD_SPI_NOR) {
 #if defined(CONFIG_SPI_FLASH_MTD) || defined(CONFIG_SPL_BUILD)

commit f394ba0e8502f73a3427de74fe0e0cd1f4b58869
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Apr 23 16:53:24 2020 +0800

    misc: otp: use buffer to store capability
    
    ioctl() should return error code but not data.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ica1242619ed59728acbeda7db493e5710f410a17

diff --git a/drivers/misc/rockchip-secure-otp-v2.S b/drivers/misc/rockchip-secure-otp-v2.S
index 333893a1f7..afb6b6edc2 100644
--- a/drivers/misc/rockchip-secure-otp-v2.S
+++ b/drivers/misc/rockchip-secure-otp-v2.S
@@ -20,25 +20,42 @@
 	.fpu softvfp
 	.type	rockchip_secure_otp_v2_ioctl, %function
 rockchip_secure_otp_v2_ioctl:
-.LFB271:
+.LFB272:
 	.file 1 "drivers/misc/rockchip-secure-otp-v2.c"
-	.loc 1 158 0
+	.loc 1 165 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 .LVL0:
-	.loc 1 161 0
+	.loc 1 168 0
 	movw	r3, #27908
 	cmp	r1, r3
-	.loc 1 170 0
-	ite	eq
-	moveq	r0, #8
 .LVL1:
+.LBB18:
+.LBB19:
+	.loc 1 158 0
+	ittte	eq
+	moveq	r3, #8
+.LBE19:
+.LBE18:
+	.loc 1 171 0
+	moveq	r0, #0
+.LVL2:
+.LBB21:
+.LBB20:
+	.loc 1 158 0
+	streq	r3, [r2]
+.LVL3:
+.LBE20:
+.LBE21:
+	.loc 1 166 0
 	mvnne	r0, #21
+.LVL4:
+	.loc 1 178 0
 	bx	lr
 	.cfi_endproc
-.LFE271:
+.LFE272:
 	.size	rockchip_secure_otp_v2_ioctl, .-rockchip_secure_otp_v2_ioctl
 	.section	.text.rockchip_secure_otp_v2_read,"ax",%progbits
 	.align	1
@@ -53,7 +70,7 @@ rockchip_secure_otp_v2_read:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2:
+.LVL5:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
 	.cfi_offset 4, -32
@@ -70,15 +87,15 @@ rockchip_secure_otp_v2_read:
 	mov	r6, r2
 	.loc 1 18 0
 	bl	dev_get_platdata
-.LVL3:
+.LVL6:
 	mov	r3, #768
 	mov	r5, r0
-.LVL4:
-.LBB16:
+.LVL7:
+.LBB22:
 	.loc 1 25 0
 	movs	r1, #0
-.LVL5:
-.L6:
+.LVL8:
+.L7:
 	.loc 1 25 0 is_stmt 0 discriminator 3
 	.syntax unified
 @ 25 "drivers/misc/rockchip-secure-otp-v2.c" 1
@@ -89,44 +106,44 @@ rockchip_secure_otp_v2_read:
 	ldr	r2, [r5]
 	str	r1, [r2, r3]
 	adds	r3, r3, #4
-.LBE16:
+.LBE22:
 	.loc 1 24 0 is_stmt 1 discriminator 3
 	cmp	r3, #896
-	bne	.L6
+	bne	.L7
 	subs	r6, r6, #1
-.LVL6:
+.LVL9:
 	.loc 1 24 0 is_stmt 0
 	mov	r4, r8
-.LBB17:
+.LBB23:
 	.loc 1 45 0 is_stmt 1
 	mov	fp, #1
-.LVL7:
-.L7:
-.LBE17:
+.LVL10:
+.L8:
+.LBE23:
 	.loc 1 27 0 discriminator 1
 	sub	r3, r4, r8
 	cmp	r10, r3
-	bgt	.L14
+	bgt	.L15
 	.loc 1 19 0
 	movs	r0, #0
-	b	.L9
-.L14:
-.LVL8:
+	b	.L10
+.L15:
+.LVL11:
 	.loc 1 30 0
 	cmp	r4, #448
-	ble	.L8
-.L24:
-.LVL9:
+	ble	.L9
+.L25:
+.LVL12:
 	.loc 1 40 0
 	mov	r0, #-1
-.LVL10:
-.L9:
+.LVL13:
+.L10:
 	mov	r3, #768
-.LBB18:
+.LBB24:
 	.loc 1 66 0
 	movs	r1, #255
-.LVL11:
-.L15:
+.LVL14:
+.L16:
 	.loc 1 66 0 is_stmt 0 discriminator 3
 	.syntax unified
 @ 66 "drivers/misc/rockchip-secure-otp-v2.c" 1
@@ -137,32 +154,32 @@ rockchip_secure_otp_v2_read:
 	ldr	r2, [r5]
 	str	r1, [r2, r3]
 	adds	r3, r3, #4
-.LBE18:
+.LBE24:
 	.loc 1 65 0 is_stmt 1 discriminator 3
 	cmp	r3, #896
-	bne	.L15
+	bne	.L16
 	.loc 1 69 0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL12:
-.L8:
+.LVL15:
+.L9:
 	.loc 1 36 0
-	cbz	r4, .L10
+	cbz	r4, .L11
 	.loc 1 36 0 is_stmt 0 discriminator 1
 	sub	r3, r4, #16
 	cmp	r3, #31
-	bls	.L10
+	bls	.L11
 	.loc 1 36 0 discriminator 2
 	sub	r3, r4, #104
 	cmp	r3, #284
-	bls	.L10
+	bls	.L11
 	.loc 1 39 0 is_stmt 1
-	ldr	r0, .L25
+	ldr	r0, .L26
 	bl	printf
-.LVL13:
-	b	.L24
-.L10:
-.LVL14:
-.LBB19:
+.LVL16:
+	b	.L25
+.L11:
+.LVL17:
+.LBB25:
 	.loc 1 44 0
 	.syntax unified
 @ 44 "drivers/misc/rockchip-secure-otp-v2.c" 1
@@ -172,9 +189,9 @@ rockchip_secure_otp_v2_read:
 	.syntax unified
 	ldr	r3, [r5]
 	str	r4, [r3, #28]
-.LVL15:
-.LBE19:
-.LBB20:
+.LVL18:
+.LBE25:
+.LBB26:
 	.loc 1 45 0
 	.syntax unified
 @ 45 "drivers/misc/rockchip-secure-otp-v2.c" 1
@@ -185,58 +202,58 @@ rockchip_secure_otp_v2_read:
 	ldr	r3, [r5]
 	movw	r7, #10002
 	str	fp, [r3, #32]
-.LVL16:
-.L13:
-.LBE20:
-.LBB21:
+.LVL19:
+.L14:
+.LBE26:
+.LBB27:
 	.loc 1 48 0
 	ldr	r3, [r5]
 	ldr	r3, [r3, #48]
-.LVL17:
+.LVL20:
 	.syntax unified
 @ 48 "drivers/misc/rockchip-secure-otp-v2.c" 1
 	dmb sy
 @ 0 "" 2
-.LVL18:
+.LVL21:
 	.thumb
 	.syntax unified
-.LBE21:
+.LBE27:
 	.loc 1 49 0
-	cbz	r3, .L11
+	cbz	r3, .L12
 	.loc 1 52 0
 	subs	r7, r7, #1
-.LVL19:
-	beq	.L24
-.LVL20:
+.LVL22:
+	beq	.L25
+.LVL23:
 	.loc 1 58 0
 	movs	r0, #1
 	bl	udelay
-.LVL21:
+.LVL24:
 	.loc 1 48 0
-	b	.L13
-.LVL22:
-.L11:
-.LBB22:
+	b	.L14
+.LVL25:
+.L12:
+.LBB28:
 	.loc 1 61 0 discriminator 2
 	ldr	r3, [r5]
-.LVL23:
+.LVL26:
 	ldr	r3, [r3, #36]
-.LVL24:
+.LVL27:
 	.syntax unified
 @ 61 "drivers/misc/rockchip-secure-otp-v2.c" 1
 	dmb sy
 @ 0 "" 2
 	.thumb
 	.syntax unified
-.LBE22:
+.LBE28:
 	strb	r3, [r6, #1]!
-.LVL25:
+.LVL28:
 	adds	r4, r4, #1
-.LVL26:
-	b	.L7
-.L26:
+.LVL29:
+	b	.L8
+.L27:
 	.align	2
-.L25:
+.L26:
 	.word	.LC0
 	.cfi_endproc
 .LFE268:
@@ -249,50 +266,50 @@ rockchip_secure_otp_v2_read:
 	.fpu softvfp
 	.type	rockchip_secure_otp_v2_ofdata_to_platdata, %function
 rockchip_secure_otp_v2_ofdata_to_platdata:
-.LFB272:
-	.loc 1 179 0
+.LFB273:
+	.loc 1 187 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL27:
+.LVL30:
 	push	{r3, r4, r5, lr}
 	.cfi_def_cfa_offset 16
 	.cfi_offset 3, -16
 	.cfi_offset 4, -12
 	.cfi_offset 5, -8
 	.cfi_offset 14, -4
-	.loc 1 179 0
+	.loc 1 187 0
 	mov	r5, r0
-	.loc 1 180 0
+	.loc 1 188 0
 	bl	dev_get_platdata
-.LVL28:
+.LVL31:
 	mov	r4, r0
-.LVL29:
-	.loc 1 182 0
+.LVL32:
+	.loc 1 190 0
 	mov	r0, r5
-.LVL30:
+.LVL33:
 	bl	dev_read_addr_ptr
-.LVL31:
-	.loc 1 183 0
+.LVL34:
+	.loc 1 191 0
 	movs	r2, #0
-	.loc 1 182 0
+	.loc 1 190 0
 	str	r0, [r4]
-	.loc 1 183 0
-	ldr	r1, .L28
+	.loc 1 191 0
+	ldr	r1, .L29
 	mov	r0, r5
 	bl	dev_read_u32_default
-.LVL32:
+.LVL35:
 	str	r0, [r4, #4]
-	.loc 1 187 0
+	.loc 1 195 0
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.LVL33:
-.L29:
+.LVL36:
+.L30:
 	.align	2
-.L28:
+.L29:
 	.word	.LC1
 	.cfi_endproc
-.LFE272:
+.LFE273:
 	.size	rockchip_secure_otp_v2_ofdata_to_platdata, .-rockchip_secure_otp_v2_ofdata_to_platdata
 	.section	.text.rockchip_secure_otp_v2_write,"ax",%progbits
 	.align	1
@@ -307,7 +324,7 @@ rockchip_secure_otp_v2_write:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL34:
+.LVL37:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 40
 	.cfi_offset 4, -32
@@ -325,22 +342,22 @@ rockchip_secure_otp_v2_write:
 	mov	r7, r0
 	.loc 1 115 0
 	bl	dev_get_platdata
-.LVL35:
+.LVL38:
 	mov	r4, r0
-.LVL36:
+.LVL39:
 	.loc 1 118 0
 	mov	r0, r8
-.LVL37:
+.LVL40:
 	bl	malloc_simple
-.LVL38:
+.LVL41:
 	.loc 1 120 0
 	mov	r6, r0
-	cbnz	r0, .L31
-.LVL39:
-.L63:
+	cbnz	r0, .L32
+.LVL42:
+.L64:
 	.loc 1 133 0
 	mov	r7, #-1
-.L30:
+.L31:
 	.loc 1 154 0
 	mov	r0, r7
 	add	sp, sp, #8
@@ -348,36 +365,36 @@ rockchip_secure_otp_v2_write:
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL40:
-.L31:
+.LVL43:
+.L32:
 	.cfi_restore_state
 	.loc 1 123 0
 	mov	r2, r0
 	mov	r3, r8
 	mov	r0, r7
-.LVL41:
+.LVL44:
 	mov	r1, r5
 	bl	rockchip_secure_otp_v2_read
-.LVL42:
+.LVL45:
 	.loc 1 124 0
 	mov	r7, r0
-.LVL43:
+.LVL46:
 	cmp	r0, #0
-	bne	.L63
+	bne	.L64
 	mov	r3, r6
-.L34:
-.LVL44:
+.L35:
+.LVL47:
 	.loc 1 129 0 discriminator 1
 	subs	r2, r3, r6
 	cmp	r8, r2
-	bgt	.L35
+	bgt	.L36
 	mov	r3, #512
-.LVL45:
-.LBB33:
+.LVL48:
+.LBB39:
 	.loc 1 140 0 discriminator 3
 	movs	r1, #0
-.L36:
-.LVL46:
+.L37:
+.LVL49:
 	.syntax unified
 @ 140 "drivers/misc/rockchip-secure-otp-v2.c" 1
 	dmb sy
@@ -386,33 +403,33 @@ rockchip_secure_otp_v2_write:
 	.syntax unified
 	ldr	r2, [r4]
 	str	r1, [r2, r3]
-.LVL47:
+.LVL50:
 	adds	r3, r3, #4
-.LBE33:
+.LBE39:
 	.loc 1 139 0 discriminator 3
 	cmp	r3, #640
-	bne	.L36
+	bne	.L37
 	movs	r6, #0
-.LVL48:
-.LBB34:
-.LBB35:
+.LVL51:
+.LBB40:
+.LBB41:
 	.loc 1 82 0 discriminator 1
 	sub	r2, r5, #104
 	sub	r3, r5, #16
 	str	r3, [sp]
-.LVL49:
-.L37:
-.LBE35:
-.LBE34:
+.LVL52:
+.L38:
+.LBE41:
+.LBE40:
 	.loc 1 142 0 discriminator 1
 	cmp	r6, r8
-	blt	.L44
+	blt	.L45
 	mov	r3, #512
-.LBB45:
+.LBB51:
 	.loc 1 151 0 discriminator 3
 	movs	r1, #255
-.L45:
-.LVL50:
+.L46:
+.LVL53:
 	.syntax unified
 @ 151 "drivers/misc/rockchip-secure-otp-v2.c" 1
 	dmb sy
@@ -422,62 +439,62 @@ rockchip_secure_otp_v2_write:
 	ldr	r2, [r4]
 	str	r1, [r2, r3]
 	adds	r3, r3, #4
-.LBE45:
+.LBE51:
 	.loc 1 150 0 discriminator 3
 	cmp	r3, #640
-	bne	.L45
-	b	.L30
-.LVL51:
-.L35:
+	bne	.L46
+	b	.L31
+.LVL54:
+.L36:
 	.loc 1 130 0
 	ldrb	r2, [r3], #1	@ zero_extendqisi2
-.LVL52:
+.LVL55:
 	cmp	r2, #0
-	beq	.L34
+	beq	.L35
 	.loc 1 131 0
-	ldr	r0, .L64
-.LVL53:
+	ldr	r0, .L65
+.LVL56:
 	bl	printf
-.LVL54:
-	b	.L63
-.LVL55:
-.L44:
-.LBB46:
-.LBB42:
+.LVL57:
+	b	.L64
+.LVL58:
+.L45:
+.LBB52:
+.LBB48:
 	.loc 1 78 0
 	cmp	r5, #448
-.LBE42:
-.LBE46:
+.LBE48:
+.LBE52:
 	.loc 1 143 0
 	ldrb	r3, [r10, r6]	@ zero_extendqisi2
-.LVL56:
-.LBB47:
-.LBB43:
+.LVL59:
+.LBB53:
+.LBB49:
 	.loc 1 78 0
-	bgt	.L40
+	bgt	.L41
 	.loc 1 82 0
-	cbz	r5, .L39
+	cbz	r5, .L40
 	ldr	r1, [sp]
 	cmp	r1, #31
-	bls	.L39
+	bls	.L40
 	cmp	r2, #284
-	bls	.L39
+	bls	.L40
 	.loc 1 85 0
-	ldr	r0, .L64+4
+	ldr	r0, .L65+4
 	bl	printf
-.LVL57:
-.L40:
-.LBB36:
+.LVL60:
+.L41:
+.LBB42:
 	.loc 1 95 0 discriminator 3
 	mov	r3, #512
-.LBE36:
-.LBE43:
-.LBE47:
-.LBB48:
+.LBE42:
+.LBE49:
+.LBE53:
+.LBB54:
 	.loc 1 145 0 discriminator 3
 	movs	r1, #255
-.L43:
-.LVL58:
+.L44:
+.LVL61:
 	.syntax unified
 @ 145 "drivers/misc/rockchip-secure-otp-v2.c" 1
 	dmb sy
@@ -487,21 +504,21 @@ rockchip_secure_otp_v2_write:
 	ldr	r2, [r4]
 	str	r1, [r2, r3]
 	adds	r3, r3, #4
-.LBE48:
+.LBE54:
 	.loc 1 144 0 discriminator 3
 	cmp	r3, #640
-	bne	.L43
-	b	.L63
-.LVL59:
-.L39:
-.LBB49:
-.LBB44:
+	bne	.L44
+	b	.L64
+.LVL62:
+.L40:
+.LBB55:
+.LBB50:
 	.loc 1 89 0
-	cbz	r3, .L41
+	cbz	r3, .L42
 	adds	r0, r5, r6
 	lsls	r0, r0, #3
-.LVL60:
-.LBB37:
+.LVL63:
+.LBB43:
 	.loc 1 92 0
 	.syntax unified
 @ 92 "drivers/misc/rockchip-secure-otp-v2.c" 1
@@ -511,9 +528,9 @@ rockchip_secure_otp_v2_write:
 	.syntax unified
 	ldr	r1, [r4]
 	str	r0, [r1, #52]
-.LVL61:
-.LBE37:
-.LBB38:
+.LVL64:
+.LBE43:
+.LBB44:
 	.loc 1 93 0
 	.syntax unified
 @ 93 "drivers/misc/rockchip-secure-otp-v2.c" 1
@@ -523,11 +540,11 @@ rockchip_secure_otp_v2_write:
 	.syntax unified
 	ldr	r1, [r4]
 	movs	r0, #7
-.LVL62:
+.LVL65:
 	str	r0, [r1, #56]
-.LVL63:
-.LBE38:
-.LBB39:
+.LVL66:
+.LBE44:
+.LBB45:
 	.loc 1 94 0
 	.syntax unified
 @ 94 "drivers/misc/rockchip-secure-otp-v2.c" 1
@@ -537,9 +554,9 @@ rockchip_secure_otp_v2_write:
 	.syntax unified
 	ldr	r1, [r4]
 	str	r3, [r1, #60]
-.LVL64:
-.LBE39:
-.LBB40:
+.LVL67:
+.LBE45:
+.LBB46:
 	.loc 1 95 0
 	.syntax unified
 @ 95 "drivers/misc/rockchip-secure-otp-v2.c" 1
@@ -547,51 +564,51 @@ rockchip_secure_otp_v2_write:
 @ 0 "" 2
 	.thumb
 	.syntax unified
-	ldr	fp, .L64+8
+	ldr	fp, .L65+8
 	movs	r0, #1
 	ldr	r1, [r4]
 	str	r0, [r1, #68]
-.LVL65:
-.L42:
-.LBE40:
-.LBB41:
+.LVL68:
+.L43:
+.LBE46:
+.LBB47:
 	.loc 1 98 0
 	ldr	r1, [r4]
 	ldr	r1, [r1, #72]
-.LVL66:
+.LVL69:
 	.syntax unified
 @ 98 "drivers/misc/rockchip-secure-otp-v2.c" 1
 	dmb sy
 @ 0 "" 2
-.LVL67:
+.LVL70:
 	.thumb
 	.syntax unified
-.LBE41:
+.LBE47:
 	.loc 1 99 0
-	cbz	r1, .L41
+	cbz	r1, .L42
 	.loc 1 102 0
 	subs	fp, fp, #1
-.LVL68:
+.LVL71:
 	str	r2, [sp, #4]
-	beq	.L40
-.LVL69:
+	beq	.L41
+.LVL72:
 	.loc 1 106 0
 	movs	r0, #1
 	bl	udelay
-.LVL70:
+.LVL73:
 	ldr	r2, [sp, #4]
-	b	.L42
-.LVL71:
-.L41:
-.LBE44:
-.LBE49:
+	b	.L43
+.LVL74:
+.L42:
+.LBE50:
+.LBE55:
 	.loc 1 142 0
 	adds	r6, r6, #1
-.LVL72:
-	b	.L37
-.L65:
+.LVL75:
+	b	.L38
+.L66:
 	.align	2
-.L64:
+.L65:
 	.word	.LC2
 	.word	.LC0
 	.word	100002
@@ -683,7 +700,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.file 35 "include/log.h"
 	.section	.debug_info,"",%progbits
 .Ldebug_info0:
-	.4byte	0x1cb6
+	.4byte	0x1ce8
 	.2byte	0x4
 	.4byte	.Ldebug_abbrev0
 	.byte	0x4
@@ -692,7 +709,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0xc
 	.4byte	.LASF426
 	.4byte	.LASF427
-	.4byte	.Ldebug_ranges0+0x58
+	.4byte	.Ldebug_ranges0+0x70
 	.4byte	0
 	.4byte	.Ldebug_line0
 	.uleb128 0x2
@@ -864,7 +881,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LASF27
 	.byte	0x8
 	.byte	0x81
-	.4byte	0x13dd
+	.4byte	0x13e3
 	.byte	0
 	.uleb128 0xe
 	.4byte	.LASF28
@@ -894,7 +911,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LASF32
 	.byte	0x8
 	.byte	0x86
-	.4byte	0x1384
+	.4byte	0x138a
 	.byte	0x14
 	.uleb128 0xe
 	.4byte	.LASF33
@@ -918,7 +935,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LASF36
 	.byte	0x8
 	.byte	0x8a
-	.4byte	0x1420
+	.4byte	0x1426
 	.byte	0x24
 	.uleb128 0xe
 	.4byte	.LASF37
@@ -2489,7 +2506,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LASF297
 	.byte	0x16
 	.byte	0x2f
-	.4byte	0x12fe
+	.4byte	0x1304
 	.byte	0x8
 	.uleb128 0xe
 	.4byte	.LASF298
@@ -2501,7 +2518,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LASF299
 	.byte	0x16
 	.byte	0x32
-	.4byte	0x1346
+	.4byte	0x134c
 	.byte	0x10
 	.uleb128 0xe
 	.4byte	.LASF34
@@ -2909,12 +2926,15 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x17
 	.2byte	0x28c
 	.4byte	0x11eb
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x9f
 	.uleb128 0xd
 	.4byte	.LASF27
 	.byte	0x44
 	.byte	0x8
 	.byte	0xee
-	.4byte	0x12f9
+	.4byte	0x12ff
 	.uleb128 0xe
 	.4byte	.LASF28
 	.byte	0x8
@@ -2931,55 +2951,55 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LASF353
 	.byte	0x8
 	.byte	0xf1
-	.4byte	0x1450
+	.4byte	0x1456
 	.byte	0x8
 	.uleb128 0xe
 	.4byte	.LASF354
 	.byte	0x8
 	.byte	0xf2
-	.4byte	0x1465
+	.4byte	0x146b
 	.byte	0xc
 	.uleb128 0xe
 	.4byte	.LASF355
 	.byte	0x8
 	.byte	0xf3
-	.4byte	0x1465
+	.4byte	0x146b
 	.byte	0x10
 	.uleb128 0xe
 	.4byte	.LASF356
 	.byte	0x8
 	.byte	0xf4
-	.4byte	0x1465
+	.4byte	0x146b
 	.byte	0x14
 	.uleb128 0xe
 	.4byte	.LASF357
 	.byte	0x8
 	.byte	0xf5
-	.4byte	0x1465
+	.4byte	0x146b
 	.byte	0x18
 	.uleb128 0xe
 	.4byte	.LASF358
 	.byte	0x8
 	.byte	0xf6
-	.4byte	0x1465
+	.4byte	0x146b
 	.byte	0x1c
 	.uleb128 0xe
 	.4byte	.LASF359
 	.byte	0x8
 	.byte	0xf7
-	.4byte	0x1465
+	.4byte	0x146b
 	.byte	0x20
 	.uleb128 0xe
 	.4byte	.LASF360
 	.byte	0x8
 	.byte	0xf8
-	.4byte	0x1465
+	.4byte	0x146b
 	.byte	0x24
 	.uleb128 0xe
 	.4byte	.LASF361
 	.byte	0x8
 	.byte	0xf9
-	.4byte	0x1465
+	.4byte	0x146b
 	.byte	0x28
 	.uleb128 0xe
 	.4byte	.LASF362
@@ -3019,7 +3039,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x1221
+	.4byte	0x1227
 	.uleb128 0x2
 	.4byte	.LASF297
 	.byte	0x16
@@ -3030,7 +3050,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x10
 	.byte	0x16
 	.byte	0x19
-	.4byte	0x1346
+	.4byte	0x134c
 	.uleb128 0xe
 	.4byte	.LASF28
 	.byte	0x16
@@ -3053,17 +3073,17 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LASF47
 	.byte	0x16
 	.byte	0x1d
-	.4byte	0x1346
+	.4byte	0x134c
 	.byte	0xc
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x1309
+	.4byte	0x130f
 	.uleb128 0x28
 	.ascii	"gd\000"
 	.byte	0x16
 	.byte	0x57
-	.4byte	0x1356
+	.4byte	0x135c
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0xef2
@@ -3072,12 +3092,12 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x4
 	.byte	0x19
 	.byte	0x33
-	.4byte	0x137e
+	.4byte	0x1384
 	.uleb128 0x2a
 	.ascii	"np\000"
 	.byte	0x19
 	.byte	0x34
-	.4byte	0x137e
+	.4byte	0x1384
 	.uleb128 0x2b
 	.4byte	.LASF369
 	.byte	0x19
@@ -3091,7 +3111,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LASF370
 	.byte	0x19
 	.byte	0x36
-	.4byte	0x135c
+	.4byte	0x1362
 	.uleb128 0xc
 	.4byte	.LASF371
 	.byte	0x1a
@@ -3112,7 +3132,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x4
 	.byte	0x1b
 	.byte	0xd
-	.4byte	0x13cc
+	.4byte	0x13d2
 	.uleb128 0xf
 	.ascii	"pid\000"
 	.byte	0x1b
@@ -3124,19 +3144,19 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LASF375
 	.byte	0x1b
 	.byte	0x11
-	.4byte	0x13d7
+	.4byte	0x13dd
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x13b3
+	.4byte	0x13b9
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x12f9
+	.4byte	0x12ff
 	.uleb128 0xd
 	.4byte	.LASF36
 	.byte	0x18
 	.byte	0x1c
 	.byte	0x23
-	.4byte	0x1420
+	.4byte	0x1426
 	.uleb128 0xe
 	.4byte	.LASF35
 	.byte	0x1c
@@ -3147,7 +3167,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LASF376
 	.byte	0x1c
 	.byte	0x25
-	.4byte	0x154f
+	.4byte	0x1555
 	.byte	0x4
 	.uleb128 0xe
 	.4byte	.LASF377
@@ -3164,13 +3184,13 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x13e3
+	.4byte	0x13e9
 	.uleb128 0xd
 	.4byte	.LASF378
 	.byte	0x8
 	.byte	0x8
 	.byte	0xb5
-	.4byte	0x144b
+	.4byte	0x1451
 	.uleb128 0xe
 	.4byte	.LASF379
 	.byte	0x8
@@ -3185,25 +3205,25 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x4
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x1426
+	.4byte	0x142c
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x144b
+	.4byte	0x1451
 	.uleb128 0x12
 	.4byte	0x50
-	.4byte	0x1465
+	.4byte	0x146b
 	.uleb128 0x13
 	.4byte	0x250
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x1456
+	.4byte	0x145c
 	.uleb128 0xd
 	.4byte	.LASF381
 	.byte	0x48
 	.byte	0x1c
 	.byte	0x54
-	.4byte	0x154f
+	.4byte	0x1555
 	.uleb128 0xe
 	.4byte	.LASF28
 	.byte	0x1c
@@ -3220,55 +3240,55 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LASF382
 	.byte	0x1c
 	.byte	0x57
-	.4byte	0x1465
+	.4byte	0x146b
 	.byte	0x8
 	.uleb128 0xe
 	.4byte	.LASF383
 	.byte	0x1c
 	.byte	0x58
-	.4byte	0x1465
+	.4byte	0x146b
 	.byte	0xc
 	.uleb128 0xe
 	.4byte	.LASF384
 	.byte	0x1c
 	.byte	0x59
-	.4byte	0x1465
+	.4byte	0x146b
 	.byte	0x10
 	.uleb128 0xe
 	.4byte	.LASF385
 	.byte	0x1c
 	.byte	0x5a
-	.4byte	0x1465
+	.4byte	0x146b
 	.byte	0x14
 	.uleb128 0xe
 	.4byte	.LASF386
 	.byte	0x1c
 	.byte	0x5b
-	.4byte	0x1465
+	.4byte	0x146b
 	.byte	0x18
 	.uleb128 0xe
 	.4byte	.LASF359
 	.byte	0x1c
 	.byte	0x5c
-	.4byte	0x1465
+	.4byte	0x146b
 	.byte	0x1c
 	.uleb128 0xe
 	.4byte	.LASF360
 	.byte	0x1c
 	.byte	0x5d
-	.4byte	0x1465
+	.4byte	0x146b
 	.byte	0x20
 	.uleb128 0xe
 	.4byte	.LASF316
 	.byte	0x1c
 	.byte	0x5e
-	.4byte	0x1564
+	.4byte	0x156a
 	.byte	0x24
 	.uleb128 0xe
 	.4byte	.LASF387
 	.byte	0x1c
 	.byte	0x5f
-	.4byte	0x1564
+	.4byte	0x156a
 	.byte	0x28
 	.uleb128 0xe
 	.4byte	.LASF362
@@ -3315,16 +3335,16 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x146b
+	.4byte	0x1471
 	.uleb128 0x12
 	.4byte	0x50
-	.4byte	0x1564
+	.4byte	0x156a
 	.uleb128 0x13
-	.4byte	0x1420
+	.4byte	0x1426
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x1555
+	.4byte	0x155b
 	.uleb128 0x4
 	.4byte	.LASF390
 	.byte	0x1d
@@ -3336,7 +3356,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x7b
 	.byte	0x1e
 	.byte	0x14
-	.4byte	0x15b0
+	.4byte	0x15aa
 	.uleb128 0x22
 	.4byte	.LASF392
 	.byte	0x1
@@ -3352,49 +3372,43 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x22
 	.4byte	.LASF396
 	.byte	0x10
-	.uleb128 0x22
-	.4byte	.LASF397
-	.byte	0x20
-	.uleb128 0x22
-	.4byte	.LASF398
-	.byte	0x40
 	.byte	0
 	.uleb128 0xd
-	.4byte	.LASF399
+	.4byte	.LASF397
 	.byte	0x10
 	.byte	0x1e
-	.byte	0x57
-	.4byte	0x15ed
+	.byte	0x60
+	.4byte	0x15e7
 	.uleb128 0xe
-	.4byte	.LASF400
+	.4byte	.LASF398
 	.byte	0x1e
-	.byte	0x61
-	.4byte	0x1610
+	.byte	0x6a
+	.4byte	0x160a
 	.byte	0
 	.uleb128 0xe
-	.4byte	.LASF401
+	.4byte	.LASF399
 	.byte	0x1e
-	.byte	0x6b
-	.4byte	0x1634
+	.byte	0x74
+	.4byte	0x162e
 	.byte	0x4
 	.uleb128 0xe
-	.4byte	.LASF402
+	.4byte	.LASF400
 	.byte	0x1e
-	.byte	0x75
-	.4byte	0x1653
+	.byte	0x7e
+	.4byte	0x164d
 	.byte	0x8
 	.uleb128 0xe
-	.4byte	.LASF403
+	.4byte	.LASF401
 	.byte	0x1e
-	.byte	0x82
-	.4byte	0x1681
+	.byte	0x8b
+	.4byte	0x167b
 	.byte	0xc
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x15b0
+	.4byte	0x15aa
 	.uleb128 0x12
 	.4byte	0x50
-	.4byte	0x1610
+	.4byte	0x160a
 	.uleb128 0x13
 	.4byte	0x250
 	.uleb128 0x13
@@ -3406,10 +3420,10 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x15f2
+	.4byte	0x15ec
 	.uleb128 0x12
 	.4byte	0x50
-	.4byte	0x1634
+	.4byte	0x162e
 	.uleb128 0x13
 	.4byte	0x250
 	.uleb128 0x13
@@ -3421,10 +3435,10 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x1616
+	.4byte	0x1610
 	.uleb128 0x12
 	.4byte	0x50
-	.4byte	0x1653
+	.4byte	0x164d
 	.uleb128 0x13
 	.4byte	0x250
 	.uleb128 0x13
@@ -3434,10 +3448,10 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x163a
+	.4byte	0x1634
 	.uleb128 0x12
 	.4byte	0x50
-	.4byte	0x1681
+	.4byte	0x167b
 	.uleb128 0x13
 	.4byte	0x250
 	.uleb128 0x13
@@ -3453,13 +3467,13 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x1659
+	.4byte	0x1653
 	.uleb128 0xd
-	.4byte	.LASF404
+	.4byte	.LASF402
 	.byte	0x8
 	.byte	0x1f
 	.byte	0x36
-	.4byte	0x16ac
+	.4byte	0x16a6
 	.uleb128 0xe
 	.4byte	.LASF60
 	.byte	0x1f
@@ -3467,71 +3481,71 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x128
 	.byte	0
 	.uleb128 0xe
-	.4byte	.LASF405
+	.4byte	.LASF403
 	.byte	0x1f
 	.byte	0x38
 	.4byte	0x37
 	.byte	0x4
 	.byte	0
 	.uleb128 0x2c
-	.4byte	.LASF406
+	.4byte	.LASF404
 	.byte	0x1
-	.byte	0xac
-	.4byte	0x15ed
+	.byte	0xb4
+	.4byte	0x15e7
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	rockchip_secure_otp_ops
 	.uleb128 0xa
-	.4byte	0x144b
-	.4byte	0x16cd
+	.4byte	0x1451
+	.4byte	0x16c7
 	.uleb128 0x11
 	.4byte	0xcb
 	.byte	0x1
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x16bd
+	.4byte	0x16b7
 	.uleb128 0x2c
-	.4byte	.LASF407
+	.4byte	.LASF405
 	.byte	0x1
-	.byte	0xbd
-	.4byte	0x16cd
+	.byte	0xc5
+	.4byte	0x16c7
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	rockchip_otp_ids
 	.uleb128 0x2d
-	.4byte	.LASF408
+	.4byte	.LASF406
 	.byte	0x1
-	.byte	0xc4
-	.4byte	0x1221
+	.byte	0xcc
+	.4byte	0x1227
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	_u_boot_list_2_driver_2_rockchip_secure_otp_v2
 	.uleb128 0x2e
-	.4byte	.LASF409
+	.4byte	.LASF407
 	.byte	0x1
-	.byte	0xb2
+	.byte	0xba
 	.4byte	0x50
-	.4byte	.LFB272
-	.4byte	.LFE272-.LFB272
+	.4byte	.LFB273
+	.4byte	.LFE273-.LFB273
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1772
+	.4byte	0x176c
 	.uleb128 0x2f
 	.ascii	"dev\000"
 	.byte	0x1
-	.byte	0xb2
+	.byte	0xba
 	.4byte	0x250
-	.4byte	.LLST16
+	.4byte	.LLST18
 	.uleb128 0x30
 	.ascii	"otp\000"
 	.byte	0x1
-	.byte	0xb4
-	.4byte	0x1772
-	.4byte	.LLST17
+	.byte	0xbc
+	.4byte	0x176c
+	.4byte	.LLST19
 	.uleb128 0x31
-	.4byte	.LVL28
-	.4byte	0x1c75
-	.4byte	0x173f
+	.4byte	.LVL31
+	.4byte	0x1ca7
+	.4byte	0x1739
 	.uleb128 0x32
 	.uleb128 0x1
 	.byte	0x50
@@ -3540,9 +3554,9 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x31
-	.4byte	.LVL31
-	.4byte	0x1c81
-	.4byte	0x1753
+	.4byte	.LVL34
+	.4byte	0x1cb3
+	.4byte	0x174d
 	.uleb128 0x32
 	.uleb128 0x1
 	.byte	0x50
@@ -3551,8 +3565,8 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x33
-	.4byte	.LVL32
-	.4byte	0x1c8c
+	.4byte	.LVL35
+	.4byte	0x1cbe
 	.uleb128 0x32
 	.uleb128 0x1
 	.byte	0x50
@@ -3574,46 +3588,69 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x1687
+	.4byte	0x1681
 	.uleb128 0x2e
-	.4byte	.LASF410
+	.4byte	.LASF408
 	.byte	0x1
-	.byte	0x9c
+	.byte	0xa3
 	.4byte	0x50
-	.4byte	.LFB271
-	.4byte	.LFE271-.LFB271
+	.4byte	.LFB272
+	.4byte	.LFE272-.LFB272
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x17c7
+	.4byte	0x17dd
 	.uleb128 0x2f
 	.ascii	"dev\000"
 	.byte	0x1
-	.byte	0x9c
+	.byte	0xa3
 	.4byte	0x250
 	.4byte	.LLST0
 	.uleb128 0x34
-	.4byte	.LASF411
+	.4byte	.LASF409
 	.byte	0x1
-	.byte	0x9c
+	.byte	0xa3
 	.4byte	0x37
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x35
 	.ascii	"buf\000"
 	.byte	0x1
-	.byte	0x9d
+	.byte	0xa4
 	.4byte	0x128
 	.uleb128 0x1
 	.byte	0x52
-	.uleb128 0x36
+	.uleb128 0x30
 	.ascii	"ret\000"
 	.byte	0x1
-	.byte	0x9f
+	.byte	0xa6
 	.4byte	0x50
-	.sleb128 -22
+	.4byte	.LLST1
+	.uleb128 0x36
+	.4byte	0x17dd
+	.4byte	.LBB18
+	.4byte	.Ldebug_ranges0+0
+	.byte	0x1
+	.byte	0xab
+	.uleb128 0x37
+	.4byte	0x17ed
+	.4byte	.LLST2
+	.byte	0
+	.byte	0
+	.uleb128 0x38
+	.4byte	.LASF413
+	.byte	0x1
+	.byte	0x9c
+	.4byte	0x50
+	.byte	0x1
+	.4byte	0x17f9
+	.uleb128 0x39
+	.ascii	"buf\000"
+	.byte	0x1
+	.byte	0x9c
+	.4byte	0x1221
 	.byte	0
 	.uleb128 0x2e
-	.4byte	.LASF412
+	.4byte	.LASF410
 	.byte	0x1
 	.byte	0x70
 	.4byte	0x50
@@ -3621,44 +3658,44 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LFE270-.LFB270
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1a06
+	.4byte	0x1a38
 	.uleb128 0x2f
 	.ascii	"dev\000"
 	.byte	0x1
 	.byte	0x70
 	.4byte	0x250
-	.4byte	.LLST18
-	.uleb128 0x37
-	.4byte	.LASF413
+	.4byte	.LLST20
+	.uleb128 0x3a
+	.4byte	.LASF411
 	.byte	0x1
 	.byte	0x70
 	.4byte	0x50
-	.4byte	.LLST19
+	.4byte	.LLST21
 	.uleb128 0x2f
 	.ascii	"buf\000"
 	.byte	0x1
 	.byte	0x71
 	.4byte	0x256
-	.4byte	.LLST20
-	.uleb128 0x37
+	.4byte	.LLST22
+	.uleb128 0x3a
 	.4byte	.LASF51
 	.byte	0x1
 	.byte	0x71
 	.4byte	0x50
-	.4byte	.LLST21
+	.4byte	.LLST23
 	.uleb128 0x30
 	.ascii	"otp\000"
 	.byte	0x1
 	.byte	0x73
-	.4byte	0x1772
-	.4byte	.LLST22
+	.4byte	0x176c
+	.4byte	.LLST24
 	.uleb128 0x30
 	.ascii	"i\000"
 	.byte	0x1
 	.byte	0x74
 	.4byte	0x50
-	.4byte	.LLST23
-	.uleb128 0x38
+	.4byte	.LLST25
+	.uleb128 0x3b
 	.ascii	"n\000"
 	.byte	0x1
 	.byte	0x74
@@ -3668,7 +3705,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x1
 	.byte	0x74
 	.4byte	0x50
-	.4byte	.LLST24
+	.4byte	.LLST26
 	.uleb128 0x2c
 	.4byte	.LASF380
 	.byte	0x1
@@ -3676,114 +3713,114 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0xeb
 	.uleb128 0x1
 	.byte	0x5a
-	.uleb128 0x39
-	.4byte	.LASF414
+	.uleb128 0x3c
+	.4byte	.LASF412
 	.byte	0x1
 	.byte	0x76
 	.4byte	0xeb
-	.4byte	.LLST25
-	.uleb128 0x3a
-	.4byte	.LBB33
-	.4byte	.LBE33-.LBB33
-	.4byte	0x1889
+	.4byte	.LLST27
+	.uleb128 0x3d
+	.4byte	.LBB39
+	.4byte	.LBE39-.LBB39
+	.4byte	0x18bb
 	.uleb128 0x30
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x8c
 	.4byte	0x9f
-	.4byte	.LLST26
+	.4byte	.LLST28
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LBB48
-	.4byte	.LBE48-.LBB48
-	.4byte	0x18a6
+	.uleb128 0x3d
+	.4byte	.LBB54
+	.4byte	.LBE54-.LBB54
+	.4byte	0x18d8
 	.uleb128 0x30
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x91
 	.4byte	0x9f
-	.4byte	.LLST38
+	.4byte	.LLST40
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LBB45
-	.4byte	.LBE45-.LBB45
-	.4byte	0x18c3
+	.uleb128 0x3d
+	.4byte	.LBB51
+	.4byte	.LBE51-.LBB51
+	.4byte	0x18f5
 	.uleb128 0x30
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x97
 	.4byte	0x9f
-	.4byte	.LLST37
+	.4byte	.LLST39
 	.byte	0
-	.uleb128 0x3b
-	.4byte	0x1a06
-	.4byte	.LBB34
-	.4byte	.Ldebug_ranges0+0x18
+	.uleb128 0x3e
+	.4byte	0x1a38
+	.4byte	.LBB40
+	.4byte	.Ldebug_ranges0+0x30
 	.byte	0x1
 	.byte	0x8f
-	.4byte	0x19a4
-	.uleb128 0x3c
-	.4byte	0x1a16
-	.uleb128 0x3d
-	.4byte	0x1a37
-	.4byte	.LLST27
-	.uleb128 0x3d
-	.4byte	0x1a2c
-	.4byte	.LLST28
-	.uleb128 0x3d
-	.4byte	0x1a21
-	.4byte	.LLST29
-	.uleb128 0x3e
-	.4byte	.Ldebug_ranges0+0x18
+	.4byte	0x19d6
 	.uleb128 0x3f
-	.4byte	0x1a40
+	.4byte	0x1a48
+	.uleb128 0x37
+	.4byte	0x1a69
+	.4byte	.LLST29
+	.uleb128 0x37
+	.4byte	0x1a5e
 	.4byte	.LLST30
-	.uleb128 0x3f
-	.4byte	0x1a4b
+	.uleb128 0x37
+	.4byte	0x1a53
 	.4byte	.LLST31
 	.uleb128 0x40
-	.4byte	.Ldebug_ranges0+0x40
-	.4byte	0x1920
-	.uleb128 0x3f
-	.4byte	0x1a8e
+	.4byte	.Ldebug_ranges0+0x30
+	.uleb128 0x41
+	.4byte	0x1a72
 	.4byte	.LLST32
-	.byte	0
-	.uleb128 0x3a
-	.4byte	.LBB37
-	.4byte	.LBE37-.LBB37
-	.4byte	0x1937
-	.uleb128 0x3f
-	.4byte	0x1a5b
+	.uleb128 0x41
+	.4byte	0x1a7d
 	.4byte	.LLST33
-	.byte	0
-	.uleb128 0x3a
-	.4byte	.LBB38
-	.4byte	.LBE38-.LBB38
-	.4byte	0x194e
-	.uleb128 0x3f
-	.4byte	0x1a6c
+	.uleb128 0x42
+	.4byte	.Ldebug_ranges0+0x58
+	.4byte	0x1952
+	.uleb128 0x41
+	.4byte	0x1ac0
 	.4byte	.LLST34
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LBB39
-	.4byte	.LBE39-.LBB39
-	.4byte	0x1965
-	.uleb128 0x3f
-	.4byte	0x1a7d
+	.uleb128 0x3d
+	.4byte	.LBB43
+	.4byte	.LBE43-.LBB43
+	.4byte	0x1969
+	.uleb128 0x41
+	.4byte	0x1a8d
 	.4byte	.LLST35
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LBB41
-	.4byte	.LBE41-.LBB41
-	.4byte	0x197c
-	.uleb128 0x3f
-	.4byte	0x1a9b
+	.uleb128 0x3d
+	.4byte	.LBB44
+	.4byte	.LBE44-.LBB44
+	.4byte	0x1980
+	.uleb128 0x41
+	.4byte	0x1a9e
 	.4byte	.LLST36
 	.byte	0
+	.uleb128 0x3d
+	.4byte	.LBB45
+	.4byte	.LBE45-.LBB45
+	.4byte	0x1997
+	.uleb128 0x41
+	.4byte	0x1aaf
+	.4byte	.LLST37
+	.byte	0
+	.uleb128 0x3d
+	.4byte	.LBB47
+	.4byte	.LBE47-.LBB47
+	.4byte	0x19ae
+	.uleb128 0x41
+	.4byte	0x1acd
+	.4byte	.LLST38
+	.byte	0
 	.uleb128 0x31
-	.4byte	.LVL57
-	.4byte	0x1c97
-	.4byte	0x1993
+	.4byte	.LVL60
+	.4byte	0x1cc9
+	.4byte	0x19c5
 	.uleb128 0x32
 	.uleb128 0x1
 	.byte	0x50
@@ -3792,8 +3829,8 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LC0
 	.byte	0
 	.uleb128 0x33
-	.4byte	.LVL70
-	.4byte	0x1ca2
+	.4byte	.LVL73
+	.4byte	0x1cd4
 	.uleb128 0x32
 	.uleb128 0x1
 	.byte	0x50
@@ -3803,9 +3840,9 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.byte	0
 	.uleb128 0x31
-	.4byte	.LVL35
-	.4byte	0x1c75
-	.4byte	0x19b8
+	.4byte	.LVL38
+	.4byte	0x1ca7
+	.4byte	0x19ea
 	.uleb128 0x32
 	.uleb128 0x1
 	.byte	0x50
@@ -3814,9 +3851,9 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x31
-	.4byte	.LVL38
-	.4byte	0x1cad
-	.4byte	0x19cc
+	.4byte	.LVL41
+	.4byte	0x1cdf
+	.4byte	0x19fe
 	.uleb128 0x32
 	.uleb128 0x1
 	.byte	0x50
@@ -3825,9 +3862,9 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x31
-	.4byte	.LVL42
-	.4byte	0x1aa8
-	.4byte	0x19f2
+	.4byte	.LVL45
+	.4byte	0x1ada
+	.4byte	0x1a24
 	.uleb128 0x32
 	.uleb128 0x1
 	.byte	0x50
@@ -3854,8 +3891,8 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x33
-	.4byte	.LVL54
-	.4byte	0x1c97
+	.4byte	.LVL57
+	.4byte	0x1cc9
 	.uleb128 0x32
 	.uleb128 0x1
 	.byte	0x50
@@ -3864,20 +3901,20 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LC2
 	.byte	0
 	.byte	0
-	.uleb128 0x41
-	.4byte	.LASF429
+	.uleb128 0x38
+	.4byte	.LASF414
 	.byte	0x1
 	.byte	0x47
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x1aa8
-	.uleb128 0x42
+	.4byte	0x1ada
+	.uleb128 0x39
 	.ascii	"otp\000"
 	.byte	0x1
 	.byte	0x47
-	.4byte	0x1772
+	.4byte	0x176c
 	.uleb128 0x43
-	.4byte	.LASF413
+	.4byte	.LASF411
 	.byte	0x1
 	.byte	0x48
 	.4byte	0x50
@@ -3886,7 +3923,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x1
 	.byte	0x48
 	.4byte	0x90
-	.uleb128 0x42
+	.uleb128 0x39
 	.ascii	"i\000"
 	.byte	0x1
 	.byte	0x48
@@ -3902,39 +3939,39 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x4b
 	.4byte	0x9f
 	.uleb128 0x45
-	.4byte	0x1a67
-	.uleb128 0x38
+	.4byte	0x1a99
+	.uleb128 0x3b
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x5c
 	.4byte	0x9f
 	.byte	0
 	.uleb128 0x45
-	.4byte	0x1a78
-	.uleb128 0x38
+	.4byte	0x1aaa
+	.uleb128 0x3b
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x5d
 	.4byte	0x9f
 	.byte	0
 	.uleb128 0x45
-	.4byte	0x1a89
-	.uleb128 0x38
+	.4byte	0x1abb
+	.uleb128 0x3b
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x5e
 	.4byte	0x9f
 	.byte	0
 	.uleb128 0x45
-	.4byte	0x1a9a
-	.uleb128 0x38
+	.4byte	0x1acc
+	.uleb128 0x3b
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x5f
 	.4byte	0x9f
 	.byte	0
 	.uleb128 0x46
-	.uleb128 0x38
+	.uleb128 0x3b
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x62
@@ -3950,88 +3987,88 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LFE268-.LFB268
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1c5b
+	.4byte	0x1c8d
 	.uleb128 0x2f
 	.ascii	"dev\000"
 	.byte	0x1
 	.byte	0xf
 	.4byte	0x250
-	.4byte	.LLST1
-	.uleb128 0x37
-	.4byte	.LASF413
+	.4byte	.LLST3
+	.uleb128 0x3a
+	.4byte	.LASF411
 	.byte	0x1
 	.byte	0xf
 	.4byte	0x50
-	.4byte	.LLST2
+	.4byte	.LLST4
 	.uleb128 0x2f
 	.ascii	"buf\000"
 	.byte	0x1
 	.byte	0x10
 	.4byte	0x128
-	.4byte	.LLST3
-	.uleb128 0x37
+	.4byte	.LLST5
+	.uleb128 0x3a
 	.4byte	.LASF51
 	.byte	0x1
 	.byte	0x10
 	.4byte	0x50
-	.4byte	.LLST4
+	.4byte	.LLST6
 	.uleb128 0x30
 	.ascii	"otp\000"
 	.byte	0x1
 	.byte	0x12
-	.4byte	0x1772
-	.4byte	.LLST5
+	.4byte	0x176c
+	.4byte	.LLST7
 	.uleb128 0x30
 	.ascii	"i\000"
 	.byte	0x1
 	.byte	0x13
 	.4byte	0x50
-	.4byte	.LLST6
-	.uleb128 0x39
+	.4byte	.LLST8
+	.uleb128 0x3c
 	.4byte	.LASF415
 	.byte	0x1
 	.byte	0x13
 	.4byte	0x50
-	.4byte	.LLST7
+	.4byte	.LLST9
 	.uleb128 0x30
 	.ascii	"n\000"
 	.byte	0x1
 	.byte	0x13
 	.4byte	0x50
-	.4byte	.LLST8
+	.4byte	.LLST10
 	.uleb128 0x30
 	.ascii	"ret\000"
 	.byte	0x1
 	.byte	0x13
 	.4byte	0x50
-	.4byte	.LLST9
-	.uleb128 0x39
+	.4byte	.LLST11
+	.uleb128 0x3c
 	.4byte	.LASF380
 	.byte	0x1
 	.byte	0x14
 	.4byte	0xeb
-	.4byte	.LLST10
-	.uleb128 0x39
+	.4byte	.LLST12
+	.uleb128 0x3c
 	.4byte	.LASF416
 	.byte	0x1
 	.byte	0x15
 	.4byte	0x9f
-	.4byte	.LLST11
-	.uleb128 0x39
+	.4byte	.LLST13
+	.uleb128 0x3c
 	.4byte	.LASF418
 	.byte	0x1
 	.byte	0x16
 	.4byte	0x50
-	.4byte	.LLST12
+	.4byte	.LLST14
 	.uleb128 0x47
 	.ascii	"out\000"
 	.byte	0x1
 	.byte	0x40
-	.4byte	.L9
-	.uleb128 0x3a
-	.4byte	.LBB16
-	.4byte	.LBE16-.LBB16
-	.4byte	0x1b96
+	.4byte	.L10
+	.uleb128 0x3d
+	.4byte	.LBB22
+	.4byte	.LBE22-.LBB22
+	.4byte	0x1bc8
 	.uleb128 0x48
 	.ascii	"__v\000"
 	.byte	0x1
@@ -4039,20 +4076,20 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x9f
 	.byte	0
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LBB19
-	.4byte	.LBE19-.LBB19
-	.4byte	0x1bb3
+	.uleb128 0x3d
+	.4byte	.LBB25
+	.4byte	.LBE25-.LBB25
+	.4byte	0x1be5
 	.uleb128 0x30
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x2c
 	.4byte	0x9f
-	.4byte	.LLST14
+	.4byte	.LLST16
 	.byte	0
-	.uleb128 0x40
-	.4byte	.Ldebug_ranges0+0
-	.4byte	0x1bc9
+	.uleb128 0x42
+	.4byte	.Ldebug_ranges0+0x18
+	.4byte	0x1bfb
 	.uleb128 0x48
 	.ascii	"__v\000"
 	.byte	0x1
@@ -4060,21 +4097,21 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	0x9f
 	.byte	0x1
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LBB21
-	.4byte	.LBE21-.LBB21
-	.4byte	0x1be6
+	.uleb128 0x3d
+	.4byte	.LBB27
+	.4byte	.LBE27-.LBB27
+	.4byte	0x1c18
 	.uleb128 0x30
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x30
 	.4byte	0x9f
-	.4byte	.LLST15
-	.byte	0
-	.uleb128 0x3a
-	.4byte	.LBB22
-	.4byte	.LBE22-.LBB22
-	.4byte	0x1c01
+	.4byte	.LLST17
+	.byte	0
+	.uleb128 0x3d
+	.4byte	.LBB28
+	.4byte	.LBE28-.LBB28
+	.4byte	0x1c33
 	.uleb128 0x49
 	.ascii	"__v\000"
 	.byte	0x1
@@ -4083,21 +4120,21 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x1
 	.byte	0x53
 	.byte	0
-	.uleb128 0x3a
-	.4byte	.LBB18
-	.4byte	.LBE18-.LBB18
-	.4byte	0x1c1e
+	.uleb128 0x3d
+	.4byte	.LBB24
+	.4byte	.LBE24-.LBB24
+	.4byte	0x1c50
 	.uleb128 0x30
 	.ascii	"__v\000"
 	.byte	0x1
 	.byte	0x42
 	.4byte	0x9f
-	.4byte	.LLST13
+	.4byte	.LLST15
 	.byte	0
 	.uleb128 0x31
-	.4byte	.LVL3
-	.4byte	0x1c75
-	.4byte	0x1c33
+	.4byte	.LVL6
+	.4byte	0x1ca7
+	.4byte	0x1c65
 	.uleb128 0x32
 	.uleb128 0x1
 	.byte	0x50
@@ -4107,9 +4144,9 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x50
 	.byte	0
 	.uleb128 0x31
-	.4byte	.LVL13
-	.4byte	0x1c97
-	.4byte	0x1c4a
+	.4byte	.LVL16
+	.4byte	0x1cc9
+	.4byte	0x1c7c
 	.uleb128 0x32
 	.uleb128 0x1
 	.byte	0x50
@@ -4118,8 +4155,8 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.4byte	.LC0
 	.byte	0
 	.uleb128 0x33
-	.4byte	.LVL21
-	.4byte	0x1ca2
+	.4byte	.LVL24
+	.4byte	0x1cd4
 	.uleb128 0x32
 	.uleb128 0x1
 	.byte	0x50
@@ -4129,11 +4166,11 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.byte	0
 	.uleb128 0x4a
-	.4byte	.LASF430
+	.4byte	.LASF429
 	.byte	0x1a
 	.2byte	0x36f
 	.byte	0x3
-	.4byte	0x1c75
+	.4byte	0x1ca7
 	.uleb128 0x4b
 	.ascii	"ptr\000"
 	.byte	0x1a
@@ -4853,7 +4890,50 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.byte	0
 	.uleb128 0x36
-	.uleb128 0x34
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x52
+	.uleb128 0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x37
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x38
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x20
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x39
+	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
 	.uleb128 0x8
@@ -4863,11 +4943,9 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0xb
 	.uleb128 0x49
 	.uleb128 0x13
-	.uleb128 0x1c
-	.uleb128 0xd
 	.byte	0
 	.byte	0
-	.uleb128 0x37
+	.uleb128 0x3a
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -4882,7 +4960,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x38
+	.uleb128 0x3b
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -4895,7 +4973,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x39
+	.uleb128 0x3c
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -4910,7 +4988,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x3a
+	.uleb128 0x3d
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x11
@@ -4921,7 +4999,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3b
+	.uleb128 0x3e
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -4938,30 +5016,21 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3c
-	.uleb128 0x5
-	.byte	0
-	.uleb128 0x31
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x3d
+	.uleb128 0x3f
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x3e
+	.uleb128 0x40
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x55
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x3f
+	.uleb128 0x41
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -4970,7 +5039,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x40
+	.uleb128 0x42
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x55
@@ -4979,38 +5048,6 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x41
-	.uleb128 0x2e
-	.byte	0x1
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x27
-	.uleb128 0x19
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x20
-	.uleb128 0xb
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x42
-	.uleb128 0x5
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.byte	0
-	.byte	0
 	.uleb128 0x43
 	.uleb128 0x5
 	.byte	0
@@ -5159,17 +5196,17 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.section	.debug_loc,"",%progbits
 .Ldebug_loc0:
-.LLST16:
-	.4byte	.LVL27
-	.4byte	.LVL28-1
+.LLST18:
+	.4byte	.LVL30
+	.4byte	.LVL31-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL28-1
-	.4byte	.LVL33
+	.4byte	.LVL31-1
+	.4byte	.LVL36
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL33
-	.4byte	.LFE272
+	.4byte	.LVL36
+	.4byte	.LFE273
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -5177,24 +5214,24 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST17:
-	.4byte	.LVL29
-	.4byte	.LVL30
+.LLST19:
+	.4byte	.LVL32
+	.4byte	.LVL33
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL30
 	.4byte	.LVL33
+	.4byte	.LVL36
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
 .LLST0:
 	.4byte	.LVL0
-	.4byte	.LVL1
+	.4byte	.LVL2
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1
-	.4byte	.LFE271
+	.4byte	.LVL2
+	.4byte	.LFE272
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -5202,27 +5239,49 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST18:
-	.4byte	.LVL34
-	.4byte	.LVL35-1
+.LLST1:
+	.4byte	.LVL0
+	.4byte	.LVL3
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xea
+	.byte	0x9f
+	.4byte	.LVL4
+	.4byte	.LFE272
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xea
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST2:
+	.4byte	.LVL1
+	.4byte	.LVL3
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST20:
+	.4byte	.LVL37
+	.4byte	.LVL38-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL35-1
-	.4byte	.LVL39
+	.4byte	.LVL38-1
+	.4byte	.LVL42
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL39
-	.4byte	.LVL40
+	.4byte	.LVL42
+	.4byte	.LVL43
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL40
 	.4byte	.LVL43
+	.4byte	.LVL46
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL43
+	.4byte	.LVL46
 	.4byte	.LFE270
 	.2byte	0x4
 	.byte	0xf3
@@ -5231,53 +5290,53 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST19:
-	.4byte	.LVL34
-	.4byte	.LVL35-1
+.LLST21:
+	.4byte	.LVL37
+	.4byte	.LVL38-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL35-1
+	.4byte	.LVL38-1
 	.4byte	.LFE270
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST20:
-	.4byte	.LVL34
-	.4byte	.LVL35-1
+.LLST22:
+	.4byte	.LVL37
+	.4byte	.LVL38-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL35-1
+	.4byte	.LVL38-1
 	.4byte	.LFE270
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
-.LLST21:
-	.4byte	.LVL34
-	.4byte	.LVL35-1
+.LLST23:
+	.4byte	.LVL37
+	.4byte	.LVL38-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL35-1
+	.4byte	.LVL38-1
 	.4byte	.LFE270
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST22:
-	.4byte	.LVL36
-	.4byte	.LVL37
+.LLST24:
+	.4byte	.LVL39
+	.4byte	.LVL40
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL37
+	.4byte	.LVL40
 	.4byte	.LFE270
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST23:
-	.4byte	.LVL44
-	.4byte	.LVL45
+.LLST25:
+	.4byte	.LVL47
+	.4byte	.LVL48
 	.2byte	0x6
 	.byte	0x73
 	.sleb128 0
@@ -5285,12 +5344,12 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL49
-	.4byte	.LVL51
+	.4byte	.LVL52
+	.4byte	.LVL54
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL51
-	.4byte	.LVL52
+	.4byte	.LVL54
+	.4byte	.LVL55
 	.2byte	0x6
 	.byte	0x73
 	.sleb128 0
@@ -5298,8 +5357,8 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL52
-	.4byte	.LVL54-1
+	.4byte	.LVL55
+	.4byte	.LVL57-1
 	.2byte	0x7
 	.byte	0x76
 	.sleb128 0
@@ -5308,157 +5367,157 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.sleb128 0
 	.byte	0x22
 	.byte	0x9f
-	.4byte	.LVL55
+	.4byte	.LVL58
 	.4byte	.LFE270
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST24:
-	.4byte	.LVL42
-	.4byte	.LVL49
+.LLST26:
+	.4byte	.LVL45
+	.4byte	.LVL52
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL49
-	.4byte	.LVL51
+	.4byte	.LVL52
+	.4byte	.LVL54
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL51
-	.4byte	.LVL53
+	.4byte	.LVL54
+	.4byte	.LVL56
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL53
+	.4byte	.LVL56
 	.4byte	.LFE270
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST25:
-	.4byte	.LVL38
-	.4byte	.LVL39
+.LLST27:
+	.4byte	.LVL41
+	.4byte	.LVL42
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL40
-	.4byte	.LVL41
+	.4byte	.LVL43
+	.4byte	.LVL44
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL41
-	.4byte	.LVL48
+	.4byte	.LVL44
+	.4byte	.LVL51
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL51
-	.4byte	.LVL55
+	.4byte	.LVL54
+	.4byte	.LVL58
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST26:
-	.4byte	.LVL46
-	.4byte	.LVL51
+.LLST28:
+	.4byte	.LVL49
+	.4byte	.LVL54
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL55
+	.4byte	.LVL58
 	.4byte	.LFE270
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST38:
-	.4byte	.LVL58
-	.4byte	.LVL59
+.LLST40:
+	.4byte	.LVL61
+	.4byte	.LVL62
 	.2byte	0x3
 	.byte	0x8
 	.byte	0xff
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST37:
-	.4byte	.LVL50
-	.4byte	.LVL51
+.LLST39:
+	.4byte	.LVL53
+	.4byte	.LVL54
 	.2byte	0x3
 	.byte	0x8
 	.byte	0xff
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST27:
-	.4byte	.LVL56
-	.4byte	.LVL71
+.LLST29:
+	.4byte	.LVL59
+	.4byte	.LVL74
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST28:
-	.4byte	.LVL56
-	.4byte	.LVL57-1
+.LLST30:
+	.4byte	.LVL59
+	.4byte	.LVL60-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL59
-	.4byte	.LVL65
+	.4byte	.LVL62
+	.4byte	.LVL68
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST29:
-	.4byte	.LVL56
-	.4byte	.LVL71
+.LLST31:
+	.4byte	.LVL59
+	.4byte	.LVL74
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST30:
-	.4byte	.LVL65
+.LLST32:
 	.4byte	.LVL68
+	.4byte	.LVL71
 	.2byte	0x3
 	.byte	0x7b
 	.sleb128 -2
 	.byte	0x9f
-	.4byte	.LVL68
-	.4byte	.LVL69
+	.4byte	.LVL71
+	.4byte	.LVL72
 	.2byte	0x3
 	.byte	0x7b
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL69
-	.4byte	.LVL71
+	.4byte	.LVL72
+	.4byte	.LVL74
 	.2byte	0x3
 	.byte	0x7b
 	.sleb128 -2
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST31:
-	.4byte	.LVL67
-	.4byte	.LVL70-1
+.LLST33:
+	.4byte	.LVL70
+	.4byte	.LVL73-1
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST32:
-	.4byte	.LVL64
-	.4byte	.LVL71
+.LLST34:
+	.4byte	.LVL67
+	.4byte	.LVL74
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST33:
-	.4byte	.LVL60
-	.4byte	.LVL62
+.LLST35:
+	.4byte	.LVL63
+	.4byte	.LVL65
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL62
-	.4byte	.LVL63
+	.4byte	.LVL65
+	.4byte	.LVL66
 	.2byte	0x5
 	.byte	0x74
 	.sleb128 0
 	.byte	0x6
 	.byte	0x23
 	.uleb128 0x34
-	.4byte	.LVL63
-	.4byte	.LVL71
+	.4byte	.LVL66
+	.4byte	.LVL74
 	.2byte	0x8
 	.byte	0x75
 	.sleb128 0
@@ -5470,34 +5529,34 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST34:
-	.4byte	.LVL61
-	.4byte	.LVL71
+.LLST36:
+	.4byte	.LVL64
+	.4byte	.LVL74
 	.2byte	0x2
 	.byte	0x37
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST35:
-	.4byte	.LVL63
-	.4byte	.LVL65
+.LLST37:
+	.4byte	.LVL66
+	.4byte	.LVL68
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST36:
-	.4byte	.LVL66
-	.4byte	.LVL70-1
+.LLST38:
+	.4byte	.LVL69
+	.4byte	.LVL73-1
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST1:
-	.4byte	.LVL2
-	.4byte	.LVL3-1
+.LLST3:
+	.4byte	.LVL5
+	.4byte	.LVL6-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL3-1
+	.4byte	.LVL6-1
 	.4byte	.LFE268
 	.2byte	0x4
 	.byte	0xf3
@@ -5506,33 +5565,33 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST2:
-	.4byte	.LVL2
-	.4byte	.LVL3-1
+.LLST4:
+	.4byte	.LVL5
+	.4byte	.LVL6-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL3-1
+	.4byte	.LVL6-1
 	.4byte	.LFE268
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST3:
-	.4byte	.LVL2
-	.4byte	.LVL3-1
+.LLST5:
+	.4byte	.LVL5
+	.4byte	.LVL6-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL3-1
-	.4byte	.LVL6
+	.4byte	.LVL6-1
+	.4byte	.LVL9
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL6
-	.4byte	.LVL7
+	.4byte	.LVL9
+	.4byte	.LVL10
 	.2byte	0x3
 	.byte	0x76
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL7
+	.4byte	.LVL10
 	.4byte	.LFE268
 	.2byte	0x4
 	.byte	0xf3
@@ -5541,31 +5600,31 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST4:
-	.4byte	.LVL2
-	.4byte	.LVL3-1
+.LLST6:
+	.4byte	.LVL5
+	.4byte	.LVL6-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL3-1
+	.4byte	.LVL6-1
 	.4byte	.LFE268
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
-.LLST5:
-	.4byte	.LVL4
+.LLST7:
 	.4byte	.LVL7
+	.4byte	.LVL10
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL7
+	.4byte	.LVL10
 	.4byte	.LFE268
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST6:
-	.4byte	.LVL7
-	.4byte	.LVL25
+.LLST8:
+	.4byte	.LVL10
+	.4byte	.LVL28
 	.2byte	0x6
 	.byte	0x74
 	.sleb128 0
@@ -5573,8 +5632,8 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL25
-	.4byte	.LVL26
+	.4byte	.LVL28
+	.4byte	.LVL29
 	.2byte	0x8
 	.byte	0x74
 	.sleb128 0
@@ -5584,7 +5643,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x23
 	.uleb128 0x1
 	.byte	0x9f
-	.4byte	.LVL26
+	.4byte	.LVL29
 	.4byte	.LFE268
 	.2byte	0x6
 	.byte	0x74
@@ -5595,20 +5654,20 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST7:
-	.4byte	.LVL16
+.LLST9:
 	.4byte	.LVL19
+	.4byte	.LVL22
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 -2
 	.byte	0x9f
-	.4byte	.LVL19
-	.4byte	.LVL20
+	.4byte	.LVL22
+	.4byte	.LVL23
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL20
+	.4byte	.LVL23
 	.4byte	.LFE268
 	.2byte	0x3
 	.byte	0x77
@@ -5616,54 +5675,54 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST8:
-	.4byte	.LVL4
-	.4byte	.LVL5
+.LLST10:
+	.4byte	.LVL7
+	.4byte	.LVL8
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL10
-	.4byte	.LVL11
+	.4byte	.LVL13
+	.4byte	.LVL14
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST9:
-	.4byte	.LVL4
-	.4byte	.LVL9
+.LLST11:
+	.4byte	.LVL7
+	.4byte	.LVL12
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL9
-	.4byte	.LVL10
+	.4byte	.LVL12
+	.4byte	.LVL13
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL10
-	.4byte	.LVL12
+	.4byte	.LVL13
+	.4byte	.LVL15
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL12
+	.4byte	.LVL15
 	.4byte	.LFE268
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST10:
-	.4byte	.LVL4
-	.4byte	.LVL6
+.LLST12:
+	.4byte	.LVL7
+	.4byte	.LVL9
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL6
-	.4byte	.LVL7
+	.4byte	.LVL9
+	.4byte	.LVL10
 	.2byte	0x3
 	.byte	0x76
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL7
+	.4byte	.LVL10
 	.4byte	.LFE268
 	.2byte	0x4
 	.byte	0xf3
@@ -5672,27 +5731,27 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST11:
-	.4byte	.LVL18
-	.4byte	.LVL21-1
+.LLST13:
+	.4byte	.LVL21
+	.4byte	.LVL24-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL22
-	.4byte	.LVL23
+	.4byte	.LVL25
+	.4byte	.LVL26
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST12:
-	.4byte	.LVL8
-	.4byte	.LVL10
+.LLST14:
+	.4byte	.LVL11
+	.4byte	.LVL13
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL12
-	.4byte	.LVL26
+	.4byte	.LVL15
+	.4byte	.LVL29
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL26
+	.4byte	.LVL29
 	.4byte	.LFE268
 	.2byte	0x3
 	.byte	0x74
@@ -5700,12 +5759,12 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST14:
-	.4byte	.LVL14
-	.4byte	.LVL26
+.LLST16:
+	.4byte	.LVL17
+	.4byte	.LVL29
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL26
+	.4byte	.LVL29
 	.4byte	.LFE268
 	.2byte	0x3
 	.byte	0x74
@@ -5713,20 +5772,20 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST15:
-	.4byte	.LVL17
-	.4byte	.LVL21-1
+.LLST17:
+	.4byte	.LVL20
+	.4byte	.LVL24-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL22
-	.4byte	.LVL23
+	.4byte	.LVL25
+	.4byte	.LVL26
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST13:
-	.4byte	.LVL11
-	.4byte	.LVL12
+.LLST15:
+	.4byte	.LVL14
+	.4byte	.LVL15
 	.2byte	0x3
 	.byte	0x8
 	.byte	0xff
@@ -5741,46 +5800,52 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.byte	0
 	.2byte	0
 	.2byte	0
-	.4byte	.LFB271
-	.4byte	.LFE271-.LFB271
-	.4byte	.LFB268
-	.4byte	.LFE268-.LFB268
 	.4byte	.LFB272
 	.4byte	.LFE272-.LFB272
+	.4byte	.LFB268
+	.4byte	.LFE268-.LFB268
+	.4byte	.LFB273
+	.4byte	.LFE273-.LFB273
 	.4byte	.LFB270
 	.4byte	.LFE270-.LFB270
 	.4byte	0
 	.4byte	0
 	.section	.debug_ranges,"",%progbits
 .Ldebug_ranges0:
-	.4byte	.LBB17
-	.4byte	.LBE17
-	.4byte	.LBB20
-	.4byte	.LBE20
+	.4byte	.LBB18
+	.4byte	.LBE18
+	.4byte	.LBB21
+	.4byte	.LBE21
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB34
-	.4byte	.LBE34
-	.4byte	.LBB46
-	.4byte	.LBE46
-	.4byte	.LBB47
-	.4byte	.LBE47
-	.4byte	.LBB49
-	.4byte	.LBE49
+	.4byte	.LBB23
+	.4byte	.LBE23
+	.4byte	.LBB26
+	.4byte	.LBE26
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB36
-	.4byte	.LBE36
 	.4byte	.LBB40
 	.4byte	.LBE40
+	.4byte	.LBB52
+	.4byte	.LBE52
+	.4byte	.LBB53
+	.4byte	.LBE53
+	.4byte	.LBB55
+	.4byte	.LBE55
+	.4byte	0
+	.4byte	0
+	.4byte	.LBB42
+	.4byte	.LBE42
+	.4byte	.LBB46
+	.4byte	.LBE46
 	.4byte	0
 	.4byte	0
-	.4byte	.LFB271
-	.4byte	.LFE271
-	.4byte	.LFB268
-	.4byte	.LFE268
 	.4byte	.LFB272
 	.4byte	.LFE272
+	.4byte	.LFB268
+	.4byte	.LFE268
+	.4byte	.LFB273
+	.4byte	.LFE273
 	.4byte	.LFB270
 	.4byte	.LFE270
 	.4byte	0
@@ -5850,7 +5915,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"bi_intfreq\000"
 .LASF11:
 	.ascii	"phys_addr_t\000"
-.LASF401:
+.LASF399:
 	.ascii	"write\000"
 .LASF236:
 	.ascii	"UCLASS_VIDEO_BRIDGE\000"
@@ -5878,7 +5943,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"UCLASS_CROS_EC\000"
 .LASF74:
 	.ascii	"bi_dsp_freq\000"
-.LASF407:
+.LASF405:
 	.ascii	"rockchip_otp_ids\000"
 .LASF122:
 	.ascii	"image_start\000"
@@ -5918,7 +5983,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"UCLASS_CODEC\000"
 .LASF285:
 	.ascii	"env_buf\000"
-.LASF429:
+.LASF414:
 	.ascii	"rockchip_secure_otp_write_byte\000"
 .LASF21:
 	.ascii	"errno\000"
@@ -5938,7 +6003,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"size_dt_strings\000"
 .LASF235:
 	.ascii	"UCLASS_VIDEO\000"
-.LASF408:
+.LASF406:
 	.ascii	"_u_boot_list_2_driver_2_rockchip_secure_otp_v2\000"
 .LASF269:
 	.ascii	"relocaddr\000"
@@ -5980,7 +6045,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"ih_hcrc\000"
 .LASF271:
 	.ascii	"mon_len\000"
-.LASF403:
+.LASF401:
 	.ascii	"call\000"
 .LASF124:
 	.ascii	"load\000"
@@ -6006,6 +6071,8 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"UCLASS_LED\000"
 .LASF111:
 	.ascii	"ih_size\000"
+.LASF413:
+	.ascii	"rockchip_secure_otp_v2_capability\000"
 .LASF39:
 	.ascii	"uclass_node\000"
 .LASF23:
@@ -6016,8 +6083,6 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"net_state\000"
 .LASF368:
 	.ascii	"value\000"
-.LASF397:
-	.ascii	"EFUSE_S\000"
 .LASF185:
 	.ascii	"UCLASS_I2C_MUX\000"
 .LASF14:
@@ -6056,7 +6121,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"net_restart_wrap\000"
 .LASF329:
 	.ascii	"net_ethaddr\000"
-.LASF412:
+.LASF410:
 	.ascii	"rockchip_secure_otp_v2_write\000"
 .LASF42:
 	.ascii	"flags\000"
@@ -6166,7 +6231,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"net_nis_domain\000"
 .LASF142:
 	.ascii	"fit_noffset_fdt\000"
-.LASF406:
+.LASF404:
 	.ascii	"rockchip_secure_otp_ops\000"
 .LASF351:
 	.ascii	"NETLOOP_FAIL\000"
@@ -6234,7 +6299,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"___strtok\000"
 .LASF344:
 	.ascii	"net_boot_file_expected_size_in_blocks\000"
-.LASF404:
+.LASF402:
 	.ascii	"rockchip_otp_v2_platdata\000"
 .LASF353:
 	.ascii	"of_match\000"
@@ -6280,7 +6345,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"timeout\000"
 .LASF259:
 	.ascii	"addr\000"
-.LASF400:
+.LASF398:
 	.ascii	"read\000"
 .LASF8:
 	.ascii	"unsigned int\000"
@@ -6288,7 +6353,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"ushort\000"
 .LASF313:
 	.ascii	"eth_device\000"
-.LASF402:
+.LASF400:
 	.ascii	"ioctl\000"
 .LASF421:
 	.ascii	"dev_read_u32_default\000"
@@ -6320,11 +6385,11 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"UCLASS_FIRMWARE\000"
 .LASF191:
 	.ascii	"UCLASS_LPC\000"
-.LASF413:
+.LASF411:
 	.ascii	"offset\000"
 .LASF187:
 	.ascii	"UCLASS_IDE\000"
-.LASF399:
+.LASF397:
 	.ascii	"misc_ops\000"
 .LASF297:
 	.ascii	"phandle\000"
@@ -6424,9 +6489,9 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"sibling_node\000"
 .LASF284:
 	.ascii	"of_root\000"
-.LASF409:
+.LASF407:
 	.ascii	"rockchip_secure_otp_v2_ofdata_to_platdata\000"
-.LASF414:
+.LASF412:
 	.ascii	"data_temp\000"
 .LASF57:
 	.ascii	"flash_info\000"
@@ -6438,15 +6503,13 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"region\000"
 .LASF105:
 	.ascii	"size_dt_struct\000"
-.LASF398:
-	.ascii	"EFUSE_NS\000"
 .LASF276:
 	.ascii	"dm_root\000"
 .LASF294:
 	.ascii	"sys_start_tick\000"
 .LASF299:
 	.ascii	"properties\000"
-.LASF410:
+.LASF408:
 	.ascii	"rockchip_secure_otp_v2_ioctl\000"
 .LASF197:
 	.ascii	"UCLASS_MTD\000"
@@ -6518,7 +6581,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"per_child_auto_alloc_size\000"
 .LASF290:
 	.ascii	"malloc_ptr\000"
-.LASF405:
+.LASF403:
 	.ascii	"secure_conf_base\000"
 .LASF151:
 	.ascii	"initrd_end\000"
@@ -6562,7 +6625,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"bd_t\000"
 .LASF312:
 	.ascii	"s_addr\000"
-.LASF411:
+.LASF409:
 	.ascii	"request\000"
 .LASF385:
 	.ascii	"post_probe\000"
@@ -6596,7 +6659,7 @@ _u_boot_list_2_driver_2_rockchip_secure_otp_v2:
 	.ascii	"ofdata_to_platdata\000"
 .LASF64:
 	.ascii	"reserved\000"
-.LASF430:
+.LASF429:
 	.ascii	"free\000"
 .LASF85:
 	.ascii	"bi_dram\000"

commit 2bc8e1106f2fe9a05dd3037ecee701b18db83136
Merge: ebe6646df9 5c8c82be5c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 23 16:43:12 2020 +0800

    Merge branch 'next-dev' into thunder-boot

commit 5c8c82be5c8b87d33f2dd62feebfa5c3690c5dcb
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Apr 23 15:35:34 2020 +0800

    arm: shield executing arm_init_before_mmu in spl
    
    The device do not initialize the cache and mmu in bootrom and ddr,
    so the spl do not need to clear the cache and disable mmu in function
    arm_init_before_mmu.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: If7b19fa762c4803dcfc58c7b16fd8236a2262729

diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c
index f0c1b03728..ce37d95378 100644
--- a/arch/arm/lib/cache-cp15.c
+++ b/arch/arm/lib/cache-cp15.c
@@ -110,7 +110,12 @@ static inline void mmu_setup(void)
 	int i;
 	u32 reg;
 
+#ifndef CONFIG_SPL_BUILD
+	/* bootrom and ddr didn't initial dcache,
+	 * skip this to save boot time.
+	 */
 	arm_init_before_mmu();
+#endif
 	/* Set up an identity-mapping for all 4GB, rw for everyone */
 	for (i = 0; i < ((4096ULL * 1024 * 1024) >> MMU_SECTION_SHIFT); i++)
 		set_section_dcache(i, DCACHE_OFF);

commit dc33c2319229447341e664d9306fbf9edf7e2b28
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 23 10:00:39 2020 +0800

    misc: rockchip_decompress: use buffer to store capability
    
    ioctl() should return error code but not data.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I66eaefc64a20303400b730cc46f3814a9f050cf0

diff --git a/drivers/misc/rockchip_decompress.c b/drivers/misc/rockchip_decompress.c
index 707bdbd781..81be53e1a1 100644
--- a/drivers/misc/rockchip_decompress.c
+++ b/drivers/misc/rockchip_decompress.c
@@ -143,9 +143,11 @@ static int rockchip_decom_done_poll(struct udevice *dev)
 	return -EINVAL;
 }
 
-static int rockchip_decom_ability(void)
+static int rockchip_decom_capability(u32 *buf)
 {
-	return DECOM_GZIP;
+	*buf = DECOM_GZIP;
+
+	return 0;
 }
 
 /* Caller must fill in param @buf which represent struct decom_param */
@@ -165,7 +167,7 @@ static int rockchip_decom_ioctl(struct udevice *dev, unsigned long request,
 		ret = rockchip_decom_stop(dev);
 		break;
 	case IOCTL_REQ_CAPABILITY:
-		ret = rockchip_decom_ability();
+		ret = rockchip_decom_capability(buf);
 	}
 
 	return ret;

commit 40f8ee7a997d5b116a81d9229b11eb1ebac6ddbf
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 23 09:59:49 2020 +0800

    misc: rockchip-efuse: implement IOCTL_REQ_CAPABILITY of ioctl()
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I8ae7b1bad8a892173bee442e1163cb5872b169e5

diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c
index a6dff3d5fd..325d48401a 100644
--- a/drivers/misc/rockchip-efuse.c
+++ b/drivers/misc/rockchip-efuse.c
@@ -378,8 +378,31 @@ static int rockchip_efuse_read(struct udevice *dev, int offset,
 	return (*efuse_read)(dev, offset, buf, size);
 }
 
+static int rockchip_efuse_capatiblity(struct udevice *dev, u32 *buf)
+{
+	*buf = device_is_compatible(dev, "rockchip,rk3288-secure-efuse") ?
+	       OTP_S : OTP_NS;
+
+	return 0;
+}
+
+static int rockchip_efuse_ioctl(struct udevice *dev, unsigned long request,
+				void *buf)
+{
+	int ret = -EINVAL;
+
+	switch (request) {
+	case IOCTL_REQ_CAPABILITY:
+		ret = rockchip_efuse_capatiblity(dev, buf);
+		break;
+	}
+
+	return ret;
+}
+
 static const struct misc_ops rockchip_efuse_ops = {
 	.read = rockchip_efuse_read,
+	.ioctl = rockchip_efuse_ioctl,
 };
 
 static int rockchip_efuse_ofdata_to_platdata(struct udevice *dev)

commit 374c241cf9da23ca2663096eb07e0d4e8e403bb1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 23 09:58:15 2020 +0800

    misc: add a common api to get device by capability
    
    fix: ioctl() should return error code but not capability.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I8030a1842692697f32f87e765ce3d68d1adb1c11

diff --git a/drivers/misc/misc-uclass.c b/drivers/misc/misc-uclass.c
index d9eea3dac5..2163830878 100644
--- a/drivers/misc/misc-uclass.c
+++ b/drivers/misc/misc-uclass.c
@@ -56,6 +56,33 @@ int misc_call(struct udevice *dev, int msgid, void *tx_msg, int tx_size,
 	return ops->call(dev, msgid, tx_msg, tx_size, rx_msg, rx_size);
 }
 
+struct udevice *misc_get_device_by_capability(u32 capability)
+{
+	const struct misc_ops *ops;
+	struct udevice *dev;
+	struct uclass *uc;
+	int ret;
+	u32 cap;
+
+	ret = uclass_get(UCLASS_MISC, &uc);
+	if (ret)
+		return NULL;
+
+	for (uclass_first_device(UCLASS_MISC, &dev);
+	     dev;
+	     uclass_next_device(&dev)) {
+		ops = device_get_ops(dev);
+		if (!ops || !ops->ioctl)
+			continue;
+
+		ret = ops->ioctl(dev, IOCTL_REQ_CAPABILITY, &cap);
+		if (!ret && ((cap & capability) == capability))
+			return dev;
+	}
+
+	return NULL;
+}
+
 UCLASS_DRIVER(misc) = {
 	.id		= UCLASS_MISC,
 	.name		= "misc",
diff --git a/drivers/misc/misc_decompress.c b/drivers/misc/misc_decompress.c
index 8ee3923902..1fbc8d3e1f 100644
--- a/drivers/misc/misc_decompress.c
+++ b/drivers/misc/misc_decompress.c
@@ -44,29 +44,7 @@ static int misc_gzip_parse_header(const unsigned char *src, unsigned long len)
 
 struct udevice *misc_decompress_get_device(u32 capability)
 {
-	const struct misc_ops *ops;
-	struct udevice *dev;
-	struct uclass *uc;
-	int ret;
-	u32 cap;
-
-	ret = uclass_get(UCLASS_MISC, &uc);
-	if (ret)
-		return NULL;
-
-	for (uclass_first_device(UCLASS_MISC, &dev);
-	     dev;
-	     uclass_next_device(&dev)) {
-		ops = device_get_ops(dev);
-		if (!ops || !ops->ioctl)
-			continue;
-
-		cap = ops->ioctl(dev, IOCTL_REQ_CAPABILITY, NULL);
-		if ((cap & capability) == capability)
-			return dev;
-	}
-
-	return NULL;
+	return misc_get_device_by_capability(capability);
 }
 
 int misc_decompress_start(struct udevice *dev, unsigned long src,
diff --git a/drivers/misc/misc_otp.c b/drivers/misc/misc_otp.c
index c880f1aa93..7b03fdb649 100644
--- a/drivers/misc/misc_otp.c
+++ b/drivers/misc/misc_otp.c
@@ -10,29 +10,7 @@
 
 struct udevice *misc_otp_get_device(u32 capability)
 {
-	const struct misc_ops *ops;
-	struct udevice *dev;
-	struct uclass *uc;
-	int ret;
-	u32 cap;
-
-	ret = uclass_get(UCLASS_MISC, &uc);
-	if (ret)
-		return NULL;
-
-	for (uclass_first_device(UCLASS_MISC, &dev);
-	     dev;
-	     uclass_next_device(&dev)) {
-		ops = device_get_ops(dev);
-		if (!ops || !ops->ioctl)
-			continue;
-
-		cap = ops->ioctl(dev, IOCTL_REQ_CAPABILITY, NULL);
-		if ((cap & capability) == capability)
-			return dev;
-	}
-
-	return NULL;
+	return misc_get_device_by_capability(capability);
 }
 
 int misc_otp_read(struct udevice *dev, int offset, void *buf, int size)
diff --git a/include/misc.h b/include/misc.h
index b1b6c82dcf..04c960ddb3 100644
--- a/include/misc.h
+++ b/include/misc.h
@@ -76,6 +76,17 @@ int misc_ioctl(struct udevice *dev, unsigned long request, void *buf);
 int misc_call(struct udevice *dev, int msgid, void *tx_msg, int tx_size,
 	      void *rx_msg, int rx_size);
 
+/*
+ * Get a misc device by capability
+ *
+ * The caller can get a misc device according to capability request, the driver
+ * must implement the IOCTL_REQ_CAPABILITY callback.
+ *
+ * @capability: the value of enum misc_mode.
+ * @return the require device if OK, NULL on error
+ */
+struct udevice *misc_get_device_by_capability(u32 capability);
+
 /*
  * struct misc_ops - Driver model Misc operations
  *

commit 1cef1b20c4e10aadfa427e1de63a0750321327ea
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 23 10:13:06 2020 +0800

    dm: misc: merge generic header file into misc.h
    
    Puting the generic function declaration together that the
    caller don't need care too much about different header file.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ib37d1550e5a747d8f18e30c428ea8f613f9cc006

diff --git a/common/spl/spl_rkfw.c b/common/spl/spl_rkfw.c
index b441949eb8..31864c2297 100644
--- a/common/spl/spl_rkfw.c
+++ b/common/spl/spl_rkfw.c
@@ -8,7 +8,6 @@
 #include <errno.h>
 #include <malloc.h>
 #include <misc.h>
-#include <misc_decompress.h>
 #include <spl.h>
 #include <spl_rkfw.h>
 #include <linux/kernel.h>
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 4892f9bba2..5ecc1032c9 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -5,7 +5,7 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
 
-obj-$(CONFIG_$(SPL_TPL_)MISC) += misc-uclass.o
+obj-$(CONFIG_$(SPL_TPL_)MISC) += misc-uclass.o misc_decompress.o misc_otp.o
 obj-$(CONFIG_ALI152X) += ali512x.o
 obj-$(CONFIG_ALTERA_SYSID) += altera_sysid.o
 obj-$(CONFIG_ATSHA204A) += atsha204a-i2c.o
@@ -56,4 +56,3 @@ obj-$(CONFIG_ROCKCHIP_OTP) += rockchip-otp.o
 obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_SECURE_OTP) += rockchip-secure-otp.o
 obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_SECURE_OTP_V2) += rockchip-secure-otp-v2.o
 obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_HW_DECOMPRESS) += rockchip_decompress.o
-obj-$(CONFIG_$(SPL_TPL_)MISC) += misc_decompress.o misc_otp.o
diff --git a/drivers/misc/misc_decompress.c b/drivers/misc/misc_decompress.c
index a45cb5c9ad..8ee3923902 100644
--- a/drivers/misc/misc_decompress.c
+++ b/drivers/misc/misc_decompress.c
@@ -6,7 +6,6 @@
 #include <dm.h>
 #include <dm/uclass.h>
 #include <misc.h>
-#include <misc_decompress.h>
 
 #define HEAD_CRC		2
 #define EXTRA_FIELD		4
diff --git a/drivers/misc/rockchip_decompress.c b/drivers/misc/rockchip_decompress.c
index 90553a4260..707bdbd781 100644
--- a/drivers/misc/rockchip_decompress.c
+++ b/drivers/misc/rockchip_decompress.c
@@ -7,7 +7,6 @@
 #include <dm.h>
 #include <linux/bitops.h>
 #include <misc.h>
-#include <misc_decompress.h>
 #include <irq-generic.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/include/misc.h b/include/misc.h
index b817f61e24..b1b6c82dcf 100644
--- a/include/misc.h
+++ b/include/misc.h
@@ -129,4 +129,23 @@ struct misc_ops {
 		    void *rx_msg, int rx_size);
 };
 
+/* generic layer for otp */
+struct udevice *misc_otp_get_device(u32 capability);
+int misc_otp_read(struct udevice *dev, int offset, void *buf, int size);
+int misc_otp_write(struct udevice *dev, int offset, const void *buf, int size);
+
+/* generic layer for decompress */
+struct decom_param {
+	unsigned long addr_src;
+	unsigned long addr_dst;
+	unsigned long size;
+	enum misc_mode mode;
+};
+
+struct udevice *misc_decompress_get_device(u32 capability);
+int misc_decompress_start(struct udevice *dev, unsigned long src,
+			  unsigned long dst, unsigned long size);
+int misc_decompress_stop(struct udevice *dev);
+int misc_decompress_is_complete(struct udevice *dev);
+
 #endif	/* _MISC_H_ */
diff --git a/include/misc_decompress.h b/include/misc_decompress.h
deleted file mode 100644
index 121af0ae9a..0000000000
--- a/include/misc_decompress.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/* SPDX-License-Identifier:     GPL-2.0+ */
-/*
- * (C) Copyright 2020 Rockchip Electronics Co., Ltd
- */
-
-#ifndef _MISC_DECOMPRESS_H_
-#define _MISC_DECOMPRESS_H_
-
-struct decom_param {
-	unsigned long addr_src;
-	unsigned long addr_dst;
-	unsigned long size;
-	enum misc_mode mode;
-};
-
-struct udevice *misc_decompress_get_device(u32 capability);
-int misc_decompress_start(struct udevice *dev, unsigned long src,
-			  unsigned long dst, unsigned long size);
-int misc_decompress_stop(struct udevice *dev);
-int misc_decompress_is_complete(struct udevice *dev);
-
-#endif
diff --git a/include/misc_otp.h b/include/misc_otp.h
deleted file mode 100644
index 7d9b2288a6..0000000000
--- a/include/misc_otp.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/* SPDX-License-Identifier:     GPL-2.0+ */
-/*
- * (C) Copyright 2020 Rockchip Electronics Co., Ltd
- */
-
-#ifndef __MISC_OTP_H__
-#define __MISC_OTP_H__
-
-struct udevice *misc_otp_get_device(u32 capability);
-int misc_otp_read(struct udevice *dev, int offset, void *buf, int size);
-int misc_otp_write(struct udevice *dev, int offset, const void *buf, int size);
-
-#endif

commit ebe6646df9795f2695d7f3deb5c0902447f4a540
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Apr 22 16:11:53 2020 +0800

    configs: rv1126: support nand & spi nand
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I45b37b82fe50507f4b242ae3f768546678910e8f

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index 8efba88145..26b5727d7f 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -14,6 +14,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL_STACK_R_ADDR=0x3fe0000
 CONFIG_TARGET_EVB_RV1126=y
+CONFIG_SPL_NAND_SUPPORT=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
 CONFIG_DEFAULT_DEVICE_TREE="rv1126-evb"
@@ -51,6 +52,7 @@ CONFIG_CMD_GPT=y
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
@@ -88,6 +90,12 @@ CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MTD=y
 CONFIG_MTD_BLK=y
 CONFIG_MTD_DEVICE=y
+CONFIG_NAND=y
+CONFIG_NAND_ROCKCHIP=y
+CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
+CONFIG_SYS_NAND_U_BOOT_OFFS=0x4000
+CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND=0x10000
+CONFIG_MTD_SPI_NAND=y
 CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0x1
 CONFIG_SF_DEFAULT_SPEED=50000000

commit fd85085a4b37058460088d99fe39cad4e08f9fdb
Merge: 6baa281141 14be0258b5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 23 14:13:56 2020 +0800

    Merge branch 'next-dev' into thunder-boot

commit 14be0258b50b8ea42e3c6d32115fd2b203bfcb4a
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Apr 22 15:46:35 2020 +0800

    rockchip: spl-boot-order: adjust nand flash dectecting strategy
    
    Now the nand device is attached to mtd block, so change its dectecting
    strategy.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I7b5063ad1d1ba2d8305c84e4d67e09932b30574b

diff --git a/arch/arm/mach-rockchip/spl-boot-order.c b/arch/arm/mach-rockchip/spl-boot-order.c
index 81a03c580e..5894255a52 100644
--- a/arch/arm/mach-rockchip/spl-boot-order.c
+++ b/arch/arm/mach-rockchip/spl-boot-order.c
@@ -29,7 +29,6 @@
  *   -1, for unspecified failures
  *   a positive integer (from the BOOT_DEVICE_... family) on succes.
  */
-
 static int spl_node_to_boot_device(int node)
 {
 	struct udevice *parent;
@@ -76,13 +75,32 @@ static int spl_node_to_boot_device(int node)
 		return BOOT_DEVICE_SPI;
 #else
 		return BOOT_DEVICE_MTD_BLK_SPI_NOR;
-	if (!uclass_get_device_by_of_offset(UCLASS_MTD, node, &parent))
-		return BOOT_DEVICE_MTD_BLK_SPI_NAND;
-#endif
 
-#ifdef CONFIG_SPL_NAND_SUPPORT
-	if (!rk_nand_init())
-		return BOOT_DEVICE_NAND;
+	if (!uclass_get_device_by_of_offset(UCLASS_MTD, node, &parent)) {
+		struct udevice *dev;
+		struct blk_desc *desc = NULL;
+
+		for (device_find_first_child(parent, &dev);
+		     dev;
+		     device_find_next_child(&dev)) {
+			if (device_get_uclass_id(dev) == UCLASS_BLK) {
+				desc = dev_get_uclass_platdata(dev);
+				break;
+			}
+		}
+
+		if (!desc)
+			return -ENOENT;
+
+		switch (desc->devnum) {
+		case 0:
+			return BOOT_DEVICE_MTD_BLK_NAND;
+		case 1:
+			return BOOT_DEVICE_MTD_BLK_SPI_NAND;
+		default:
+			return -ENOSYS;
+		}
+	}
 #endif
 
 	return -1;

commit f21c060e4b287d9f35a704307e55cfa61c7ce855
Author: Lei Chen <lei.chen@rock-chips.com>
Date:   Wed Apr 1 14:08:30 2020 +0800

    driver: input: update RK remote control driver
    
    This patch updates the RC driver to accommodate the new framework
    
    Signed-off-by: Lei Chen <lei.chen@rock-chips.com>
    Change-Id: I3ff2b5844ce5f1776ac2f94b3cbd42eb5d73cc41

diff --git a/drivers/input/rc-uclass.c b/drivers/input/rc-uclass.c
index 3504e48cf4..c1517a1e9e 100644
--- a/drivers/input/rc-uclass.c
+++ b/drivers/input/rc-uclass.c
@@ -27,7 +27,7 @@ int rc_get_repeat(struct udevice *dev)
 	return ops->get_repeat(dev);
 }
 
-UCLASS_DRIVER(key) = {
+UCLASS_DRIVER(rc) = {
 	.id		= UCLASS_RC,
 	.name		= "rc",
 };
diff --git a/drivers/input/rockchip_ir.c b/drivers/input/rockchip_ir.c
index 6579284b9e..511ecf800b 100644
--- a/drivers/input/rockchip_ir.c
+++ b/drivers/input/rockchip_ir.c
@@ -1,11 +1,11 @@
 /*
  * (C) Copyright 2017 Rockchip Electronics Co., Ltd
  *
- * SPDX-License-Identifier:     GPL-2.0+
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
-#include <clk.h>
 #include <common.h>
+#include <clk.h>
 #include <dm.h>
 #include <dm/pinctrl.h>
 #include <errno.h>
@@ -19,7 +19,7 @@
 
 #include <asm/arch/periph.h>
 #include <asm/io.h>
-
+#include <dm/ofnode.h>
 DECLARE_GLOBAL_DATA_PTR;
 
 static struct nec_dec nec;
@@ -71,26 +71,29 @@ static int ir_parse_keys(struct udevice *dev)
 	int i, j;
 	int len;
 	int ret;
-	int subnode;
-	int node = dev_of_offset(dev);
-	const void *blob = gd->fdt_blob;
+	u32 val;
+	ofnode node;
 
 	i = 0;
-	fdt_for_each_subnode(subnode, blob, node) {
-		rc_map[i].usercode = fdtdec_get_uint(blob, subnode,
-						     "rockchip,usercode",
-						     1234u);
-		if (rc_map[i].usercode == 1234u) {
+	dev_for_each_subnode(node, dev) {
+		ret = ofnode_read_u32(node, "rockchip,usercode", &val);
+		if (ret) {
+			debug("unable to get usercode\n");
+			return -1;
+		}
+		rc_map[i].usercode = val;
+		if (rc_map[i].usercode == 0) {
 			debug("missing usercode property in the dts\n");
 			return -1;
 		}
 		debug("add new usercode:0x%x\n", rc_map[i].usercode);
-		fdt_get_property(blob, subnode, "rockchip,key_table", &len);
+		len = ofnode_read_size(node, "rockchip,key_table");
 		len /= sizeof(u32);
 		debug("len:%d\n", len);
 		rc_map[i].nbuttons = len / 2;
-		ret = fdtdec_get_int_array(blob, subnode, "rockchip,key_table",
-					   (u32 *)rc_map[i].scan, len);
+
+		ret = ofnode_read_u32_array(node, "rockchip,key_table",
+					    (u32 *)rc_map[i].scan, len);
 		if (ret) {
 			debug("missing key_table property in the dts\n");
 			return -1;
@@ -120,9 +123,6 @@ static int ir_nec_decode(struct rockchip_ir_priv *priv, struct ir_raw_event *ev)
 	u8 __maybe_unused address, not_address, command, not_command;
 	struct nec_dec *data = &nec;
 
-	debug("NEC decode started at state %d (%uus %s)\n",
-	      data->state, TO_US(ev->duration), TO_STR(ev->pulse));
-
 	switch (data->state) {
 	case STATE_INACTIVE:
 		if (!ev->pulse)
@@ -161,11 +161,12 @@ static int ir_nec_decode(struct rockchip_ir_priv *priv, struct ir_raw_event *ev)
 			break;
 
 		data->bits <<= 1;
-		if (eq_margin(ev->duration, NEC_BIT_1_SPACE, NEC_UNIT / 2))
+		if (eq_margin(ev->duration, NEC_BIT_1_SPACE, NEC_UNIT / 2)) {
 			data->bits |= 1;
-		else if (!eq_margin(ev->duration, NEC_BIT_0_SPACE,
-				    NEC_UNIT / 2))
+		} else if (!eq_margin(ev->duration, NEC_BIT_0_SPACE,
+				    NEC_UNIT / 2)) {
 			break;
+		}
 		data->count++;
 
 		if (data->count == NEC_NBITS) {
@@ -180,11 +181,12 @@ static int ir_nec_decode(struct rockchip_ir_priv *priv, struct ir_raw_event *ev)
 			}
 			usercode = address << 8 | not_address;
 			scancode = command << 8 | not_command;
-			debug("raw usercode 0x%04x scancode 0x%04x\n",
-			      usercode, scancode);
+
 			/* change to dts format */
 			usercode = bitrev16(usercode);
 			scancode = (bitrev16(scancode) >> 8) & 0xFF;
+			debug("usercode 0x%04x scancode 0x%04x\n",
+			      usercode, scancode);
 
 			data->state = STATE_INACTIVE;
 			ret = ir_lookup_by_scancode(priv, usercode, scancode);
@@ -226,6 +228,7 @@ static void rockchip_ir_irq(int irq, void *data)
 	}
 	writel(PWM_CH_INT(priv->id),
 	       priv->base + PWM_STA_REG(priv->id));
+
 	ev.duration = cycle * priv->period;
 	ir_nec_decode(priv, &ev);
 }
@@ -253,16 +256,25 @@ static void rockchip_ir_hw_init(struct udevice *dev)
 
 static int rockchip_ir_ofdata_to_platdata(struct udevice *dev)
 {
-	int node = dev_of_offset(dev);
-	const void *blob = gd->fdt_blob;
+	ofnode node;
+	int ret;
+	int subnode_num = 0;
+	u32 val;
 	struct rockchip_ir_priv *priv = dev_get_priv(dev);
 
-	priv->num = fdtdec_get_child_count(blob, node);
+	dev_for_each_subnode(node, dev) {
+		ret = ofnode_read_u32(node, "rockchip,usercode", &val);
+		if (!ret)
+			subnode_num++;
+	}
+
+	priv->num = subnode_num;
+
 	if (priv->num == 0) {
 		debug("no ir map in dts\n");
 		return -1;
 	}
-	priv->base = devfdt_get_addr(dev);
+	priv->base = dev_read_addr(dev);
 	priv->id = (priv->base >> 4) & 0xF;
 
 	return 0;
@@ -286,7 +298,6 @@ static int rockchip_ir_probe(struct udevice *dev)
 		debug("%s: failed to parse keys\n", __func__);
 		return -EINVAL;
 	}
-
 	/*
 	 * The PWM does not have decicated interrupt number in dts and can
 	 * not get periph_id by pinctrl framework, so let's init then here.
@@ -297,12 +308,6 @@ static int rockchip_ir_probe(struct udevice *dev)
 		return -EINVAL;
 	}
 
-	ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_PWM0 + priv->id);
-	if (ret) {
-		debug("%s pwm%d pinctrl init fail\n", __func__, priv->id);
-		return -EINVAL;
-	}
-
 	ret = clk_get_by_index(dev, 0, &clk);
 	if (ret) {
 		debug("%s get clock fail!\n", __func__);
diff --git a/include/linux/input.h b/include/linux/input.h
index 3662c9f0a7..804d5f0971 100644
--- a/include/linux/input.h
+++ b/include/linux/input.h
@@ -149,5 +149,6 @@
 #define KEY_RIGHTMETA		126
 #define KEY_COMPOSE		127
 #define KEY_FN			0x1d0
+#define KEY_REPLY               232     /* AC Reply */
 
 #endif

commit 6baa281141d3a7e267f6cf7d4a78a15bdaed8f3b
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Tue Apr 21 15:14:29 2020 +0800

    rockchip: dts: rv1126: nand fix reg address
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: I712862224d9650d0313a76b36af6549388e16f25

diff --git a/arch/arm/dts/rv1126.dtsi b/arch/arm/dts/rv1126.dtsi
index 46d71c5a19..23f8005ec2 100644
--- a/arch/arm/dts/rv1126.dtsi
+++ b/arch/arm/dts/rv1126.dtsi
@@ -1451,7 +1451,7 @@
 
 	nandc: nandc@ffc80000 {
 		compatible = "rockchip,rk-nandc";
-		reg = <0x0 0xffc80000 0x0 0x4000>;
+		reg = <0xffc80000 0x4000>;
 		interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
 		nandc_id = <0>;
 		clocks = <&cru CLK_NANDC>, <&cru HCLK_NANDC>;

commit f3a2c32e2d6d794daa75ce7fe560db6ccd943f45
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed Apr 22 09:55:34 2020 +0800

    rkflash: enable reinit SNOR from snor flash packet
    
    Change-Id: I21fa94d1ded675323a02c8a8d7073b31290bc7c7
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/rkflash_api.c b/drivers/rkflash/rkflash_api.c
index 797b676fd4..88e1f1e8ce 100644
--- a/drivers/rkflash/rkflash_api.c
+++ b/drivers/rkflash/rkflash_api.c
@@ -9,14 +9,79 @@
 
 #include "rkflash_api.h"
 #include "rkflash_blk.h"
+#include "rkflash_debug.h"
 
 #ifdef CONFIG_RKSFC_NOR
+
+#define IDB_ALIGN_64			128	/* 64 KB */
+#define IDB_ALIGN_32			64	/* 32 KB */
+
+static void P_RC4(u8 *buf, u16 len)
+{
+	u8 S[256], K[256], temp;
+	u16 i, j, t, x;
+	u8 key[16] = {124, 78, 3, 4, 85, 5, 9, 7,
+		      45, 44, 123, 56, 23, 13, 23, 17};
+
+	j = 0;
+	for (i = 0; i < 256; i++) {
+		S[i] = (u8)i;
+		j &= 0x0f;
+		K[i] = key[j];
+		j++;
+	}
+
+	j = 0;
+	for (i = 0; i < 256; i++) {
+		j = (j + S[i] + K[i]) % 256;
+		temp = S[i];
+		S[i] = S[j];
+		S[j] = temp;
+	}
+
+	i = 0;
+	j = 0;
+	for (x = 0; x < len; x++) {
+		i = (i + 1) % 256;
+		j = (j + S[i]) % 256;
+		temp = S[i];
+		S[i] = S[j];
+		S[j] = temp;
+		t = (S[i] + (S[j] % 256)) % 256;
+		buf[x] = buf[x] ^ S[t];
+	}
+}
+
 int rksfc_nor_init(struct udevice *udev)
 {
 	struct rkflash_info *priv = dev_get_priv(udev);
 	struct SFNOR_DEV *p_dev = (struct SFNOR_DEV *)&priv->flash_dev_info;
+	struct snor_info_packet *packet;
+	struct id_block_tag *idb_tag;
+	int ret;
+
+	ret = snor_init(p_dev);
+	if (ret == SFC_OK && p_dev->read_lines == DATA_LINES_X1) {
+		idb_tag = kzalloc(NOR_SECS_PAGE * 512, GFP_KERNEL);
+		if (!idb_tag)
+			return SFC_OK;
+
+		if (sfc_get_version() >= SFC_VER_4)
+			snor_read(p_dev, IDB_ALIGN_32, NOR_SECS_PAGE,
+				  idb_tag);
+		else
+			snor_read(p_dev, IDB_ALIGN_64, NOR_SECS_PAGE,
+				  idb_tag);
+		packet = (struct snor_info_packet *)&idb_tag->dev_param[0];
+		if (idb_tag->id == IDB_BLOCK_TAG_ID) {
+			P_RC4((u8 *)idb_tag, sizeof(struct id_block_tag));
+			snor_reinit_from_table_packet(p_dev, packet);
+			rkflash_print_error("snor reinit, ret= %d\n", ret);
+		}
+		kfree(idb_tag);
+	}
 
-	return snor_init(p_dev);
+	return ret;
 }
 
 u32 rksfc_nor_get_capacity(struct udevice *udev)

commit 9371a438f4be7dfddd6136e58bec2a34c531ba5a
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed Apr 22 09:26:50 2020 +0800

    rkflash: support SNOR reinit from snor flash packet
    
    That snor_info_packet is SPI Nor information placed in IDB header
    area, each progress can parse it to get flash information.
    
    Change-Id: I63621a5b92c2fb85b588365d9415fbb40eece8a3
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/flash_com.h b/drivers/rkflash/flash_com.h
index b60875d382..8c23d1fd2b 100644
--- a/drivers/rkflash/flash_com.h
+++ b/drivers/rkflash/flash_com.h
@@ -19,8 +19,8 @@
 
 #define NAND_IDB_START    64 /* 32 KB*/
 #define NAND_IDB_SIZE    512 /* 256 KB*/
-#define NAND_IDB_END    NAND_IDB_START + NAND_IDB_SIZE - 1
-#define DEFAULT_IDB_RESERVED_BLOCK	16
+#define NAND_IDB_END    (NAND_IDB_START + NAND_IDB_SIZE - 1)
+#define DEFAULT_IDB_RESERVED_BLOCK	8
 
 #define FULL_SLC			0
 #define SLC				1
diff --git a/drivers/rkflash/sfc.h b/drivers/rkflash/sfc.h
index bcbbcc3a9f..a5c6b10c51 100644
--- a/drivers/rkflash/sfc.h
+++ b/drivers/rkflash/sfc.h
@@ -189,6 +189,21 @@ struct rk_sfc_op {
 	union SFCCTRL_DATA sfctrl;
 };
 
+#define IDB_BLOCK_TAG_ID	0xFCDC8C3B
+
+struct id_block_tag {
+	u32 id;
+	u32 version;
+	u32 flags;
+	u16 boot_img_offset;
+	u8  reserved1[10];
+	u32 dev_param[8];
+	u8  reserved2[506 - 56];
+	u16 data_img_len;
+	u16 boot_img_len;
+	u8  reserved3[512 - 510];
+} __packed;
+
 int sfc_init(void __iomem *reg_addr);
 int sfc_request(struct rk_sfc_op *op, u32 addr, void *data, u32 size);
 u16 sfc_get_version(void);
diff --git a/drivers/rkflash/sfc_nor.c b/drivers/rkflash/sfc_nor.c
index d55d891212..2014fed23f 100644
--- a/drivers/rkflash/sfc_nor.c
+++ b/drivers/rkflash/sfc_nor.c
@@ -578,30 +578,16 @@ static void *snor_flash_info_adjust(struct flash_info *spi_flash_info)
 	return 0;
 }
 
-int snor_init(struct SFNOR_DEV *p_dev)
+static int snor_parse_flash_table(struct SFNOR_DEV *p_dev,
+				  struct flash_info *g_spi_flash_info)
 {
-	struct flash_info *g_spi_flash_info;
-	u32 i, ret;
-	u8 id_byte[5];
-
-	if (!p_dev)
-		return SFC_PARAM_ERR;
-
-	memset((void *)p_dev, 0, sizeof(struct SFNOR_DEV));
-	p_dev->max_iosize = sfc_get_max_iosize();
-	snor_read_id(id_byte);
-	rkflash_print_error("sfc nor id: %x %x %x\n",
-			    id_byte[0], id_byte[1], id_byte[2]);
-	if (0xFF == id_byte[0] || 0x00 == id_byte[0])
-		return SFC_ERROR;
+	int i, ret;
 
-	p_dev->manufacturer = id_byte[0];
-	p_dev->mem_type = id_byte[1];
-
-	g_spi_flash_info = snor_get_flash_info(id_byte);
 	if (g_spi_flash_info) {
 		snor_flash_info_adjust(g_spi_flash_info);
-		p_dev->capacity = 1 << g_spi_flash_info->density;
+		p_dev->manufacturer = (g_spi_flash_info->id >> 16) & 0xFF;
+		p_dev->mem_type = (g_spi_flash_info->id >> 8) & 0xFF;
+		p_dev->capacity = 1 << ((g_spi_flash_info->id & 0xFF) - 9);
 		p_dev->blk_size = g_spi_flash_info->block_size;
 		p_dev->page_size = NOR_SECS_PAGE;
 		p_dev->read_cmd = g_spi_flash_info->read_cmd;
@@ -620,6 +606,7 @@ int snor_init(struct SFNOR_DEV *p_dev)
 			p_dev->write_status = snor_write_status1;
 		else if (i == 2)
 			p_dev->write_status = snor_write_status2;
+
 		if (g_spi_flash_info->feature & FEA_4BIT_READ) {
 			ret = SFC_OK;
 			if (g_spi_flash_info->QE_bits)
@@ -640,7 +627,34 @@ int snor_init(struct SFNOR_DEV *p_dev)
 
 		if ((g_spi_flash_info->feature & FEA_4BYTE_ADDR_MODE))
 			snor_enter_4byte_mode();
+	}
+
+	return SFC_OK;
+}
+
+int snor_init(struct SFNOR_DEV *p_dev)
+{
+	struct flash_info *g_spi_flash_info;
+	u8 id_byte[5];
+
+	if (!p_dev)
+		return SFC_PARAM_ERR;
+
+	memset((void *)p_dev, 0, sizeof(struct SFNOR_DEV));
+	p_dev->max_iosize = sfc_get_max_iosize();
+
+	snor_read_id(id_byte);
+	rkflash_print_error("sfc nor id: %x %x %x\n",
+			    id_byte[0], id_byte[1], id_byte[2]);
+	if (0xFF == id_byte[0] || 0x00 == id_byte[0])
+		return SFC_ERROR;
+
+	g_spi_flash_info = snor_get_flash_info(id_byte);
+	if (g_spi_flash_info) {
+		snor_parse_flash_table(p_dev, g_spi_flash_info);
 	} else {
+		p_dev->manufacturer = id_byte[0];
+		p_dev->mem_type = id_byte[1];
 		p_dev->capacity = 1 << (id_byte[2] - 9);
 		p_dev->QE_bits = 0;
 		p_dev->blk_size = NOR_SECS_BLK;
@@ -652,6 +666,7 @@ int snor_init(struct SFNOR_DEV *p_dev)
 		p_dev->prog_lines = DATA_LINES_X1;
 		p_dev->read_lines = DATA_LINES_X1;
 		p_dev->write_status = snor_write_status;
+		snor_reset_device();
 	}
 
 	rkflash_print_info("addr_mode: %x\n", p_dev->addr_mode);
@@ -661,7 +676,42 @@ int snor_init(struct SFNOR_DEV *p_dev)
 	rkflash_print_info("prog_cmd: %x\n", p_dev->prog_cmd);
 	rkflash_print_info("blk_erase_cmd: %x\n", p_dev->blk_erase_cmd);
 	rkflash_print_info("sec_erase_cmd: %x\n", p_dev->sec_erase_cmd);
+	rkflash_print_info("capacity: %x\n", p_dev->capacity);
 
 	return SFC_OK;
 }
 
+int snor_reinit_from_table_packet(struct SFNOR_DEV *p_dev,
+				  struct snor_info_packet *packet)
+{
+	struct flash_info g_spi_flash_info;
+	u8 id_byte[5];
+	int ret;
+
+	if (!p_dev || packet->id != SNOR_INFO_PACKET_ID)
+		return SFC_PARAM_ERR;
+
+	snor_read_id(id_byte);
+	if (0xFF == id_byte[0] || 0x00 == id_byte[0])
+		return SFC_ERROR;
+
+	g_spi_flash_info.id = id_byte[0] << 16 | id_byte[1] << 8 | id_byte[2];
+	g_spi_flash_info.block_size = NOR_SECS_BLK;
+	g_spi_flash_info.sector_size = NOR_SECS_PAGE;
+	g_spi_flash_info.read_cmd = packet->read_cmd;
+	g_spi_flash_info.prog_cmd = packet->prog_cmd;
+	g_spi_flash_info.read_cmd_4 = packet->read_cmd_4;
+	g_spi_flash_info.prog_cmd_4 = packet->prog_cmd_4;
+	if (id_byte[2] >=  0x19)
+		g_spi_flash_info.read_cmd_4 = CMD_FAST_4READ_X4;
+	g_spi_flash_info.sector_erase_cmd = packet->sector_erase_cmd;
+	g_spi_flash_info.block_erase_cmd = packet->block_erase_cmd;
+	g_spi_flash_info.feature = packet->feature;
+	g_spi_flash_info.density = id_byte[2] - 9;
+	g_spi_flash_info.QE_bits = packet->QE_bits;
+
+	ret = snor_parse_flash_table(p_dev, &g_spi_flash_info);
+
+	return ret;
+}
+
diff --git a/drivers/rkflash/sfc_nor.h b/drivers/rkflash/sfc_nor.h
index 6c91bb2eaf..e564b8ed1a 100644
--- a/drivers/rkflash/sfc_nor.h
+++ b/drivers/rkflash/sfc_nor.h
@@ -134,6 +134,30 @@ struct flash_info {
 	u8 reserved2;
 };
 
+/* flash table packet for easy boot */
+#define SNOR_INFO_PACKET_ID	0x464E494E
+#define SNOR_INFO_PACKET_HEAD_LEN	14
+
+#define SNOR_INFO_PACKET_SPI_MODE_RATE_SHIFT	25
+
+struct snor_info_packet {
+	u32 id;
+	u32 head_hash; /*hash for head, check by bootrom.*/
+	u16 head_len;  /*320 - 16 bytes*/
+	u16 version;
+	u8 read_cmd;
+	u8 prog_cmd;
+	u8 read_cmd_4;
+	u8 prog_cmd_4;
+
+	u8 sector_erase_cmd;
+	u8 block_erase_cmd;
+	u8 feature;
+	u8 QE_bits;
+
+	u32 spi_mode;
+};
+
 int snor_init(struct SFNOR_DEV *p_dev);
 u32 snor_get_capacity(struct SFNOR_DEV *p_dev);
 int snor_read(struct SFNOR_DEV *p_dev, u32 sec, u32 n_sec, void *p_data);
@@ -146,5 +170,6 @@ int snor_prog_page(struct SFNOR_DEV *p_dev, u32 addr, void *p_data, u32 size);
 int snor_read_data(struct SFNOR_DEV *p_dev, u32 addr, void *p_data, u32 size);
 int snor_reset_device(void);
 int snor_disable_QE(struct SFNOR_DEV *p_dev);
-
+int snor_reinit_from_table_packet(struct SFNOR_DEV *p_dev,
+				  struct snor_info_packet *packet);
 #endif

commit 710cfa3daa59ea6db236c78b0284a94f04279cac
Merge: 92916bd121 e65bf00a8c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Apr 22 18:15:33 2020 +0800

    Merge branch 'next-dev' into thunder-boot

commit e65bf00a8cc4457af9d351e0129b24292fd5b7ff
Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date:   Tue Apr 21 09:48:45 2020 +0800

    spl: drivers: mtd: nand: raw: switch to the device model
    
    Switch to the device model and support mtd.
    
    Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
    Change-Id: Idfb60cec7a375254a423677b1c3f1da4be954eb5

diff --git a/drivers/mtd/nand/raw/rockchip_nand_spl.c b/drivers/mtd/nand/raw/rockchip_nand_spl.c
index 7cf318141d..a1e2c26e64 100644
--- a/drivers/mtd/nand/raw/rockchip_nand_spl.c
+++ b/drivers/mtd/nand/raw/rockchip_nand_spl.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <dm.h>
 #include <fdtdec.h>
 #include <fdt_support.h>
 #include <inttypes.h>
@@ -80,6 +81,8 @@ struct rk_nand {
 	u8 chipnr;
 	u8 id[5];
 	u8 *databuf;
+	struct udevice *dev;
+	struct mtd_info *mtd;
 };
 
 struct rk_nand *g_rk_nand;
@@ -248,10 +251,175 @@ static void read_flash_id(struct rk_nand *rknand, uint8_t *id)
 	id[3] = readb(bank_base);
 	id[4] = readb(bank_base);
 	rockchip_nand_select_chip(rknand->regs, -1);
-	printf("%s %x %x %x %x %x\n", __func__, id[0], id[1], id[2], id[3],
-	       id[4]);
+	if (id[0] != 0xFF && id[0] != 0x00)
+		printf("NAND:%x %x\n", id[0], id[1]);
 }
 
+#ifdef CONFIG_NAND_ROCKCHIP_DT
+static const struct udevice_id rockchip_nandc_ids[] = {
+	{ .compatible = "rockchip,rk-nandc" },
+	{ }
+};
+
+static int spl_nand_block_isbad(struct mtd_info *mtd, loff_t ofs)
+{
+	return is_badblock(ofs / CONFIG_SYS_NAND_PAGE_SIZE);
+}
+
+static int spl_nand_read_page(struct mtd_info *mtd, loff_t from, size_t len,
+			      size_t *retlen, u_char *buf)
+{
+	int read_size, offset, read_len;
+	unsigned int page;
+	unsigned int max_pages = CONFIG_SYS_NAND_SIZE /
+				CONFIG_SYS_NAND_PAGE_SIZE;
+
+	/* Convert to page number */
+	page = from / CONFIG_SYS_NAND_PAGE_SIZE;
+	offset = from & (CONFIG_SYS_NAND_PAGE_SIZE - 1);
+	read_len = len;
+	*retlen = 0;
+
+	while (read_len) {
+		read_size = CONFIG_SYS_NAND_PAGE_SIZE - offset;
+		if (read_size > read_len)
+			read_size = read_len;
+		if (offset || read_size < CONFIG_SYS_NAND_PAGE_SIZE) {
+			if (nandc_read_page(page, g_rk_nand->databuf) < 0)
+				return -EIO;
+			memcpy(buf, g_rk_nand->databuf + offset, read_size);
+			offset = 0;
+		} else {
+			if (nandc_read_page(page, buf) < 0)
+				return -EIO;
+		}
+		page++;
+		read_len -= read_size;
+		buf += read_size;
+		if (page >= max_pages)
+			return -EIO;
+	}
+
+	*retlen = len;
+
+	return 0;
+}
+
+static int rockchip_nandc_probe(struct udevice *dev)
+{
+	const void *blob = gd->fdt_blob;
+	struct rk_nand *rknand = dev_get_priv(dev);
+	struct mtd_info *mtd = dev_get_uclass_priv(dev);
+	fdt_addr_t regs;
+	int ret = -ENODEV;
+	int node;
+
+	g_rk_nand = rknand;
+	rknand->dev = dev;
+
+	node = fdtdec_next_compatible(blob, 0, COMPAT_ROCKCHIP_NANDC);
+
+	if (node < 0) {
+		printf("Nand node not found\n");
+		return -ENODEV;
+	}
+
+	if (!fdtdec_get_is_enabled(blob, node)) {
+		debug("Nand disabled in device tree\n");
+		return -ENODEV;
+	}
+
+	regs = fdt_get_base_address(blob, node);
+	if (!regs) {
+		debug("Nand address not found\n");
+		return -ENODEV;
+	}
+
+	rknand->regs = (void *)regs;
+
+	nandc_init(g_rk_nand);
+	read_flash_id(g_rk_nand, g_rk_nand->id);
+
+	if (g_rk_nand->id[0] == g_rk_nand->id[1])
+		return -ENODEV;
+
+	if (g_rk_nand->id[1] == 0xA1 || g_rk_nand->id[1] == 0xF1 ||
+	    g_rk_nand->id[1] == 0xD1 || g_rk_nand->id[1] == 0xAA ||
+	    g_rk_nand->id[1] == 0xDA || g_rk_nand->id[1] == 0xAC ||
+	    g_rk_nand->id[1] == 0xDC || g_rk_nand->id[1] == 0xA3 ||
+	    g_rk_nand->id[1] == 0xD3 || g_rk_nand->id[1] == 0x95 ||
+	    g_rk_nand->id[1] == 0x48) {
+		g_rk_nand->chipnr = 1;
+		g_rk_nand->databuf = kzalloc(CONFIG_SYS_NAND_PAGE_SIZE,
+					     GFP_KERNEL);
+		if (!g_rk_nand)
+			return -ENOMEM;
+		mtd->_block_isbad = spl_nand_block_isbad;
+		mtd->_read = spl_nand_read_page;
+		mtd->size = CONFIG_SYS_NAND_SIZE;
+		mtd->writesize = CONFIG_SYS_NAND_PAGE_SIZE;
+		mtd->type = MTD_NANDFLASH;
+		mtd->dev = rknand->dev;
+		mtd->priv = rknand;
+		add_mtd_device(mtd);
+		mtd->name = "rk-nand";
+		rknand->mtd = mtd;
+		ret = 0;
+	}
+
+	return ret;
+}
+
+static int rockchip_nandc_bind(struct udevice *udev)
+{
+	int ret = 0;
+
+#ifdef CONFIG_MTD_BLK
+	struct udevice *bdev;
+
+	ret = blk_create_devicef(udev, "mtd_blk", "blk", IF_TYPE_MTD,
+				 BLK_MTD_NAND, 512, 0, &bdev);
+	if (ret)
+		printf("Cannot create block device\n");
+#endif
+	return ret;
+}
+
+U_BOOT_DRIVER(rk_nandc_v6) = {
+	.name           = "rk_nandc_v6",
+	.id             = UCLASS_MTD,
+	.of_match       = rockchip_nandc_ids,
+	.bind		= rockchip_nandc_bind,
+	.probe          = rockchip_nandc_probe,
+	.priv_auto_alloc_size = sizeof(struct rk_nand),
+};
+
+void board_nand_init(void)
+{
+	struct udevice *dev;
+	int ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_MTD,
+					  DM_GET_DRIVER(rk_nandc_v6),
+					  &dev);
+	if (ret && ret != -ENODEV)
+		pr_err("Failed to initialize NAND controller. (error %d)\n",
+		       ret);
+}
+
+int nand_spl_load_image(u32 offs, u32 size, void *buf)
+{
+	return -EIO;
+}
+
+void nand_init(void){};
+
+int rk_nand_init(void)
+{
+	return -ENODEV;
+}
+
+#else
 void board_nand_init(void)
 {
 	const void *blob = gd->fdt_blob;
@@ -271,18 +439,18 @@ void board_nand_init(void)
 
 	if (node < 0) {
 		printf("Nand node not found\n");
-		goto err;
+		return;
 	}
 
 	if (!fdtdec_get_is_enabled(blob, node)) {
 		debug("Nand disabled in device tree\n");
-		goto err;
+		return;
 	}
 
 	regs = fdt_get_base_address(blob, node);
-	if (regs == FDT_ADDR_T_NONE) {
+	if (!regs) {
 		debug("Nand address not found\n");
-		goto err;
+		return;
 	}
 
 	g_rk_nand = kzalloc(sizeof(*g_rk_nand), GFP_KERNEL);
@@ -290,12 +458,24 @@ void board_nand_init(void)
 	g_rk_nand->databuf = kzalloc(CONFIG_SYS_NAND_PAGE_SIZE, GFP_KERNEL);
 	nandc_init(g_rk_nand);
 	read_flash_id(g_rk_nand, g_rk_nand->id);
-	if (g_rk_nand->id[0] != 0xFF && g_rk_nand->id[1] != 0xFF &&
-	    g_rk_nand->id[0] != 0x00 && g_rk_nand->id[1] != 0x00)
+
+	if (g_rk_nand->id[0] == g_rk_nand->id[1])
+		goto err;
+
+	if (g_rk_nand->id[1] == 0xA1 || g_rk_nand->id[1] == 0xF1 ||
+	    g_rk_nand->id[1] == 0xD1 || g_rk_nand->id[1] == 0xAA ||
+	    g_rk_nand->id[1] == 0xDA || g_rk_nand->id[1] == 0xAC ||
+	    g_rk_nand->id[1] == 0xDC || g_rk_nand->id[1] == 0xA3 ||
+	    g_rk_nand->id[1] == 0xD3 || g_rk_nand->id[1] == 0x95 ||
+	    g_rk_nand->id[1] == 0x48) {
 		g_rk_nand->chipnr = 1;
-	return;
+		return;
+	}
+
 err:
+	kfree(g_rk_nand->databuf);
 	kfree(g_rk_nand);
+	g_rk_nand = NULL;
 }
 
 int nand_spl_load_image(u32 offs, u32 size, void *buf)
@@ -351,5 +531,7 @@ int rk_nand_init(void)
 	else
 		return -ENODEV;
 }
+#endif
 
 void nand_deselect(void) {}
+

commit 6a8fa29e04ab3f8082d56d7e5ad1169310ec9d9b
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Apr 20 16:00:20 2020 +0800

    misc: otp: realize otp interface layer function
    
    Realize otp read & write functions for application layer calling.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ic8f698b36fce4c1c6cd7a2848afd370567b43448

diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index e9e3e6e676..4892f9bba2 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -56,4 +56,4 @@ obj-$(CONFIG_ROCKCHIP_OTP) += rockchip-otp.o
 obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_SECURE_OTP) += rockchip-secure-otp.o
 obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_SECURE_OTP_V2) += rockchip-secure-otp-v2.o
 obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_HW_DECOMPRESS) += rockchip_decompress.o
-obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_HW_DECOMPRESS) += misc_decompress.o
+obj-$(CONFIG_$(SPL_TPL_)MISC) += misc_decompress.o misc_otp.o
diff --git a/drivers/misc/misc_otp.c b/drivers/misc/misc_otp.c
new file mode 100644
index 0000000000..c880f1aa93
--- /dev/null
+++ b/drivers/misc/misc_otp.c
@@ -0,0 +1,46 @@
+// SPDX-License-Identifier:     GPL-2.0+
+/*
+ * Copyright (C) 2020 Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/uclass.h>
+#include <misc.h>
+
+struct udevice *misc_otp_get_device(u32 capability)
+{
+	const struct misc_ops *ops;
+	struct udevice *dev;
+	struct uclass *uc;
+	int ret;
+	u32 cap;
+
+	ret = uclass_get(UCLASS_MISC, &uc);
+	if (ret)
+		return NULL;
+
+	for (uclass_first_device(UCLASS_MISC, &dev);
+	     dev;
+	     uclass_next_device(&dev)) {
+		ops = device_get_ops(dev);
+		if (!ops || !ops->ioctl)
+			continue;
+
+		cap = ops->ioctl(dev, IOCTL_REQ_CAPABILITY, NULL);
+		if ((cap & capability) == capability)
+			return dev;
+	}
+
+	return NULL;
+}
+
+int misc_otp_read(struct udevice *dev, int offset, void *buf, int size)
+{
+	return misc_read(dev, offset, buf, size);
+}
+
+int misc_otp_write(struct udevice *dev, int offset, const void *buf, int size)
+{
+	return misc_write(dev, offset, (void *)buf, size);
+}
diff --git a/include/misc_otp.h b/include/misc_otp.h
new file mode 100644
index 0000000000..7d9b2288a6
--- /dev/null
+++ b/include/misc_otp.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2020 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef __MISC_OTP_H__
+#define __MISC_OTP_H__
+
+struct udevice *misc_otp_get_device(u32 capability);
+int misc_otp_read(struct udevice *dev, int offset, void *buf, int size);
+int misc_otp_write(struct udevice *dev, int offset, const void *buf, int size);
+
+#endif

commit f9519410b1f489c55be4d7fe6f3e04a00620c680
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Apr 20 15:53:22 2020 +0800

    misc: otp: support rockchip secure otp version 2 driver
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I10a8cc92f2130c1f1957fd36fb924d9846707e65

diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index e1cd1f0a11..4777495e15 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -86,6 +86,12 @@ config SPL_ROCKCHIP_SECURE_OTP
 	help
 	  Support read & write secure otp in spl.
 
+config SPL_ROCKCHIP_SECURE_OTP_V2
+	bool "Rockchip Secure OTP Version 2 Support in spl"
+	depends on SPL_MISC
+	help
+	  Support read & write secure otp in spl. Support platforms: rv1126.
+
 config CMD_CROS_EC
 	bool "Enable crosec command"
 	depends on CROS_EC
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index be4088867e..e9e3e6e676 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -54,5 +54,6 @@ obj-$(CONFIG_QFW) += qfw.o
 obj-$(CONFIG_ROCKCHIP_EFUSE) += rockchip-efuse.o
 obj-$(CONFIG_ROCKCHIP_OTP) += rockchip-otp.o
 obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_SECURE_OTP) += rockchip-secure-otp.o
+obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_SECURE_OTP_V2) += rockchip-secure-otp-v2.o
 obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_HW_DECOMPRESS) += rockchip_decompress.o
 obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_HW_DECOMPRESS) += misc_decompress.o
diff --git a/drivers/misc/rockchip-secure-otp-v2.S b/drivers/misc/rockchip-secure-otp-v2.S
new file mode 100644
index 0000000000..333893a1f7
--- /dev/null
+++ b/drivers/misc/rockchip-secure-otp-v2.S
@@ -0,0 +1,6660 @@
+	.arch armv7-a
+	.eabi_attribute 20, 1
+	.eabi_attribute 21, 1
+	.eabi_attribute 23, 3
+	.eabi_attribute 24, 1
+	.eabi_attribute 25, 1
+	.eabi_attribute 26, 2
+	.eabi_attribute 30, 4
+	.eabi_attribute 34, 0
+	.eabi_attribute 18, 2
+	.file	"rockchip-secure-otp-v2.c"
+	.text
+.Ltext0:
+	.cfi_sections	.debug_frame
+	.section	.text.rockchip_secure_otp_v2_ioctl,"ax",%progbits
+	.align	1
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rockchip_secure_otp_v2_ioctl, %function
+rockchip_secure_otp_v2_ioctl:
+.LFB271:
+	.file 1 "drivers/misc/rockchip-secure-otp-v2.c"
+	.loc 1 158 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL0:
+	.loc 1 161 0
+	movw	r3, #27908
+	cmp	r1, r3
+	.loc 1 170 0
+	ite	eq
+	moveq	r0, #8
+.LVL1:
+	mvnne	r0, #21
+	bx	lr
+	.cfi_endproc
+.LFE271:
+	.size	rockchip_secure_otp_v2_ioctl, .-rockchip_secure_otp_v2_ioctl
+	.section	.text.rockchip_secure_otp_v2_read,"ax",%progbits
+	.align	1
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rockchip_secure_otp_v2_read, %function
+rockchip_secure_otp_v2_read:
+.LFB268:
+	.loc 1 17 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL2:
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 1 17 0
+	mov	r8, r1
+	mov	r10, r3
+	mov	r6, r2
+	.loc 1 18 0
+	bl	dev_get_platdata
+.LVL3:
+	mov	r3, #768
+	mov	r5, r0
+.LVL4:
+.LBB16:
+	.loc 1 25 0
+	movs	r1, #0
+.LVL5:
+.L6:
+	.loc 1 25 0 is_stmt 0 discriminator 3
+	.syntax unified
+@ 25 "drivers/misc/rockchip-secure-otp-v2.c" 1
+	dmb sy
+@ 0 "" 2
+	.thumb
+	.syntax unified
+	ldr	r2, [r5]
+	str	r1, [r2, r3]
+	adds	r3, r3, #4
+.LBE16:
+	.loc 1 24 0 is_stmt 1 discriminator 3
+	cmp	r3, #896
+	bne	.L6
+	subs	r6, r6, #1
+.LVL6:
+	.loc 1 24 0 is_stmt 0
+	mov	r4, r8
+.LBB17:
+	.loc 1 45 0 is_stmt 1
+	mov	fp, #1
+.LVL7:
+.L7:
+.LBE17:
+	.loc 1 27 0 discriminator 1
+	sub	r3, r4, r8
+	cmp	r10, r3
+	bgt	.L14
+	.loc 1 19 0
+	movs	r0, #0
+	b	.L9
+.L14:
+.LVL8:
+	.loc 1 30 0
+	cmp	r4, #448
+	ble	.L8
+.L24:
+.LVL9:
+	.loc 1 40 0
+	mov	r0, #-1
+.LVL10:
+.L9:
+	mov	r3, #768
+.LBB18:
+	.loc 1 66 0
+	movs	r1, #255
+.LVL11:
+.L15:
+	.loc 1 66 0 is_stmt 0 discriminator 3
+	.syntax unified
+@ 66 "drivers/misc/rockchip-secure-otp-v2.c" 1
+	dmb sy
+@ 0 "" 2
+	.thumb
+	.syntax unified
+	ldr	r2, [r5]
+	str	r1, [r2, r3]
+	adds	r3, r3, #4
+.LBE18:
+	.loc 1 65 0 is_stmt 1 discriminator 3
+	cmp	r3, #896
+	bne	.L15
+	.loc 1 69 0
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL12:
+.L8:
+	.loc 1 36 0
+	cbz	r4, .L10
+	.loc 1 36 0 is_stmt 0 discriminator 1
+	sub	r3, r4, #16
+	cmp	r3, #31
+	bls	.L10
+	.loc 1 36 0 discriminator 2
+	sub	r3, r4, #104
+	cmp	r3, #284
+	bls	.L10
+	.loc 1 39 0 is_stmt 1
+	ldr	r0, .L25
+	bl	printf
+.LVL13:
+	b	.L24
+.L10:
+.LVL14:
+.LBB19:
+	.loc 1 44 0
+	.syntax unified
+@ 44 "drivers/misc/rockchip-secure-otp-v2.c" 1
+	dmb sy
+@ 0 "" 2
+	.thumb
+	.syntax unified
+	ldr	r3, [r5]
+	str	r4, [r3, #28]
+.LVL15:
+.LBE19:
+.LBB20:
+	.loc 1 45 0
+	.syntax unified
+@ 45 "drivers/misc/rockchip-secure-otp-v2.c" 1
+	dmb sy
+@ 0 "" 2
+	.thumb
+	.syntax unified
+	ldr	r3, [r5]
+	movw	r7, #10002
+	str	fp, [r3, #32]
+.LVL16:
+.L13:
+.LBE20:
+.LBB21:
+	.loc 1 48 0
+	ldr	r3, [r5]
+	ldr	r3, [r3, #48]
+.LVL17:
+	.syntax unified
+@ 48 "drivers/misc/rockchip-secure-otp-v2.c" 1
+	dmb sy
+@ 0 "" 2
+.LVL18:
+	.thumb
+	.syntax unified
+.LBE21:
+	.loc 1 49 0
+	cbz	r3, .L11
+	.loc 1 52 0
+	subs	r7, r7, #1
+.LVL19:
+	beq	.L24
+.LVL20:
+	.loc 1 58 0
+	movs	r0, #1
+	bl	udelay
+.LVL21:
+	.loc 1 48 0
+	b	.L13
+.LVL22:
+.L11:
+.LBB22:
+	.loc 1 61 0 discriminator 2
+	ldr	r3, [r5]
+.LVL23:
+	ldr	r3, [r3, #36]
+.LVL24:
+	.syntax unified
+@ 61 "drivers/misc/rockchip-secure-otp-v2.c" 1
+	dmb sy
+@ 0 "" 2
+	.thumb
+	.syntax unified
+.LBE22:
+	strb	r3, [r6, #1]!
+.LVL25:
+	adds	r4, r4, #1
+.LVL26:
+	b	.L7
+.L26:
+	.align	2
+.L25:
+	.word	.LC0
+	.cfi_endproc
+.LFE268:
+	.size	rockchip_secure_otp_v2_read, .-rockchip_secure_otp_v2_read
+	.section	.text.rockchip_secure_otp_v2_ofdata_to_platdata,"ax",%progbits
+	.align	1
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rockchip_secure_otp_v2_ofdata_to_platdata, %function
+rockchip_secure_otp_v2_ofdata_to_platdata:
+.LFB272:
+	.loc 1 179 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL27:
+	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 1 179 0
+	mov	r5, r0
+	.loc 1 180 0
+	bl	dev_get_platdata
+.LVL28:
+	mov	r4, r0
+.LVL29:
+	.loc 1 182 0
+	mov	r0, r5
+.LVL30:
+	bl	dev_read_addr_ptr
+.LVL31:
+	.loc 1 183 0
+	movs	r2, #0
+	.loc 1 182 0
+	str	r0, [r4]
+	.loc 1 183 0
+	ldr	r1, .L28
+	mov	r0, r5
+	bl	dev_read_u32_default
+.LVL32:
+	str	r0, [r4, #4]
+	.loc 1 187 0
+	movs	r0, #0
+	pop	{r3, r4, r5, pc}
+.LVL33:
+.L29:
+	.align	2
+.L28:
+	.word	.LC1
+	.cfi_endproc
+.LFE272:
+	.size	rockchip_secure_otp_v2_ofdata_to_platdata, .-rockchip_secure_otp_v2_ofdata_to_platdata
+	.section	.text.rockchip_secure_otp_v2_write,"ax",%progbits
+	.align	1
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rockchip_secure_otp_v2_write, %function
+rockchip_secure_otp_v2_write:
+.LFB270:
+	.loc 1 114 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL34:
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 1 114 0
+	mov	r8, r3
+	mov	r5, r1
+	mov	r10, r2
+	mov	r7, r0
+	.loc 1 115 0
+	bl	dev_get_platdata
+.LVL35:
+	mov	r4, r0
+.LVL36:
+	.loc 1 118 0
+	mov	r0, r8
+.LVL37:
+	bl	malloc_simple
+.LVL38:
+	.loc 1 120 0
+	mov	r6, r0
+	cbnz	r0, .L31
+.LVL39:
+.L63:
+	.loc 1 133 0
+	mov	r7, #-1
+.L30:
+	.loc 1 154 0
+	mov	r0, r7
+	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL40:
+.L31:
+	.cfi_restore_state
+	.loc 1 123 0
+	mov	r2, r0
+	mov	r3, r8
+	mov	r0, r7
+.LVL41:
+	mov	r1, r5
+	bl	rockchip_secure_otp_v2_read
+.LVL42:
+	.loc 1 124 0
+	mov	r7, r0
+.LVL43:
+	cmp	r0, #0
+	bne	.L63
+	mov	r3, r6
+.L34:
+.LVL44:
+	.loc 1 129 0 discriminator 1
+	subs	r2, r3, r6
+	cmp	r8, r2
+	bgt	.L35
+	mov	r3, #512
+.LVL45:
+.LBB33:
+	.loc 1 140 0 discriminator 3
+	movs	r1, #0
+.L36:
+.LVL46:
+	.syntax unified
+@ 140 "drivers/misc/rockchip-secure-otp-v2.c" 1
+	dmb sy
+@ 0 "" 2
+	.thumb
+	.syntax unified
+	ldr	r2, [r4]
+	str	r1, [r2, r3]
+.LVL47:
+	adds	r3, r3, #4
+.LBE33:
+	.loc 1 139 0 discriminator 3
+	cmp	r3, #640
+	bne	.L36
+	movs	r6, #0
+.LVL48:
+.LBB34:
+.LBB35:
+	.loc 1 82 0 discriminator 1
+	sub	r2, r5, #104
+	sub	r3, r5, #16
+	str	r3, [sp]
+.LVL49:
+.L37:
+.LBE35:
+.LBE34:
+	.loc 1 142 0 discriminator 1
+	cmp	r6, r8
+	blt	.L44
+	mov	r3, #512
+.LBB45:
+	.loc 1 151 0 discriminator 3
+	movs	r1, #255
+.L45:
+.LVL50:
+	.syntax unified
+@ 151 "drivers/misc/rockchip-secure-otp-v2.c" 1
+	dmb sy
+@ 0 "" 2
+	.thumb
+	.syntax unified
+	ldr	r2, [r4]
+	str	r1, [r2, r3]
+	adds	r3, r3, #4
+.LBE45:
+	.loc 1 150 0 discriminator 3
+	cmp	r3, #640
+	bne	.L45
+	b	.L30
+.LVL51:
+.L35:
+	.loc 1 130 0
+	ldrb	r2, [r3], #1	@ zero_extendqisi2
+.LVL52:
+	cmp	r2, #0
+	beq	.L34
+	.loc 1 131 0
+	ldr	r0, .L64
+.LVL53:
+	bl	printf
+.LVL54:
+	b	.L63
+.LVL55:
+.L44:
+.LBB46:
+.LBB42:
+	.loc 1 78 0
+	cmp	r5, #448
+.LBE42:
+.LBE46:
+	.loc 1 143 0
+	ldrb	r3, [r10, r6]	@ zero_extendqisi2
+.LVL56:
+.LBB47:
+.LBB43:
+	.loc 1 78 0
+	bgt	.L40
+	.loc 1 82 0
+	cbz	r5, .L39
+	ldr	r1, [sp]
+	cmp	r1, #31
+	bls	.L39
+	cmp	r2, #284
+	bls	.L39
+	.loc 1 85 0
+	ldr	r0, .L64+4
+	bl	printf
+.LVL57:
+.L40:
+.LBB36:
+	.loc 1 95 0 discriminator 3
+	mov	r3, #512
+.LBE36:
+.LBE43:
+.LBE47:
+.LBB48:
+	.loc 1 145 0 discriminator 3
+	movs	r1, #255
+.L43:
+.LVL58:
+	.syntax unified
+@ 145 "drivers/misc/rockchip-secure-otp-v2.c" 1
+	dmb sy
+@ 0 "" 2
+	.thumb
+	.syntax unified
+	ldr	r2, [r4]
+	str	r1, [r2, r3]
+	adds	r3, r3, #4
+.LBE48:
+	.loc 1 144 0 discriminator 3
+	cmp	r3, #640
+	bne	.L43
+	b	.L63
+.LVL59:
+.L39:
+.LBB49:
+.LBB44:
+	.loc 1 89 0
+	cbz	r3, .L41
+	adds	r0, r5, r6
+	lsls	r0, r0, #3
+.LVL60:
+.LBB37:
+	.loc 1 92 0
+	.syntax unified
+@ 92 "drivers/misc/rockchip-secure-otp-v2.c" 1
+	dmb sy
+@ 0 "" 2
+	.thumb
+	.syntax unified
+	ldr	r1, [r4]
+	str	r0, [r1, #52]
+.LVL61:
+.LBE37:
+.LBB38:
+	.loc 1 93 0
+	.syntax unified
+@ 93 "drivers/misc/rockchip-secure-otp-v2.c" 1
+	dmb sy
+@ 0 "" 2
+	.thumb
+	.syntax unified
+	ldr	r1, [r4]
+	movs	r0, #7
+.LVL62:
+	str	r0, [r1, #56]
+.LVL63:
+.LBE38:
+.LBB39:
+	.loc 1 94 0
+	.syntax unified
+@ 94 "drivers/misc/rockchip-secure-otp-v2.c" 1
+	dmb sy
+@ 0 "" 2
+	.thumb
+	.syntax unified
+	ldr	r1, [r4]
+	str	r3, [r1, #60]
+.LVL64:
+.LBE39:
+.LBB40:
+	.loc 1 95 0
+	.syntax unified
+@ 95 "drivers/misc/rockchip-secure-otp-v2.c" 1
+	dmb sy
+@ 0 "" 2
+	.thumb
+	.syntax unified
+	ldr	fp, .L64+8
+	movs	r0, #1
+	ldr	r1, [r4]
+	str	r0, [r1, #68]
+.LVL65:
+.L42:
+.LBE40:
+.LBB41:
+	.loc 1 98 0
+	ldr	r1, [r4]
+	ldr	r1, [r1, #72]
+.LVL66:
+	.syntax unified
+@ 98 "drivers/misc/rockchip-secure-otp-v2.c" 1
+	dmb sy
+@ 0 "" 2
+.LVL67:
+	.thumb
+	.syntax unified
+.LBE41:
+	.loc 1 99 0
+	cbz	r1, .L41
+	.loc 1 102 0
+	subs	fp, fp, #1
+.LVL68:
+	str	r2, [sp, #4]
+	beq	.L40
+.LVL69:
+	.loc 1 106 0
+	movs	r0, #1
+	bl	udelay
+.LVL70:
+	ldr	r2, [sp, #4]
+	b	.L42
+.LVL71:
+.L41:
+.LBE44:
+.LBE49:
+	.loc 1 142 0
+	adds	r6, r6, #1
+.LVL72:
+	b	.L37
+.L65:
+	.align	2
+.L64:
+	.word	.LC2
+	.word	.LC0
+	.word	100002
+	.cfi_endproc
+.LFE270:
+	.size	rockchip_secure_otp_v2_write, .-rockchip_secure_otp_v2_write
+	.global	_u_boot_list_2_driver_2_rockchip_secure_otp_v2
+	.section	.rodata.rockchip_otp_ids,"a",%progbits
+	.align	2
+	.type	rockchip_otp_ids, %object
+	.size	rockchip_otp_ids, 16
+rockchip_otp_ids:
+	.word	.LC4
+	.space	4
+	.space	8
+	.section	.rodata.rockchip_secure_otp_ops,"a",%progbits
+	.align	2
+	.type	rockchip_secure_otp_ops, %object
+	.size	rockchip_secure_otp_ops, 16
+rockchip_secure_otp_ops:
+	.word	rockchip_secure_otp_v2_read
+	.word	rockchip_secure_otp_v2_write
+	.word	rockchip_secure_otp_v2_ioctl
+	.space	4
+	.section	.rodata.rockchip_secure_otp_v2_ofdata_to_platdata.str1.1,"aMS",%progbits,1
+.LC1:
+	.ascii	"secure_conf\000"
+	.section	.rodata.rockchip_secure_otp_v2_read.str1.1,"aMS",%progbits,1
+.LC0:
+	.ascii	"Please input correct addr\012\000"
+	.section	.rodata.rockchip_secure_otp_v2_write.str1.1,"aMS",%progbits,1
+.LC2:
+	.ascii	"The zone is written.\012\000"
+	.section	.rodata.str1.1,"aMS",%progbits,1
+.LC3:
+	.ascii	"rockchip_secure_otp_v2\000"
+.LC4:
+	.ascii	"rockchip,rv1126-secure-otp\000"
+	.section	.u_boot_list_2_driver_2_rockchip_secure_otp_v2,"aw",%progbits
+	.align	2
+	.type	_u_boot_list_2_driver_2_rockchip_secure_otp_v2, %object
+	.size	_u_boot_list_2_driver_2_rockchip_secure_otp_v2, 68
+_u_boot_list_2_driver_2_rockchip_secure_otp_v2:
+	.word	.LC3
+	.word	36
+	.word	rockchip_otp_ids
+	.space	16
+	.word	rockchip_secure_otp_v2_ofdata_to_platdata
+	.space	16
+	.word	8
+	.space	8
+	.word	rockchip_secure_otp_ops
+	.space	4
+	.text
+.Letext0:
+	.file 2 "include/common.h"
+	.file 3 "./arch/arm/include/asm/types.h"
+	.file 4 "include/linux/types.h"
+	.file 5 "include/errno.h"
+	.file 6 "include/linux/string.h"
+	.file 7 "include/efi.h"
+	.file 8 "include/dm/device.h"
+	.file 9 "include/ide.h"
+	.file 10 "include/linux/list.h"
+	.file 11 "include/part.h"
+	.file 12 "include/flash.h"
+	.file 13 "include/lmb.h"
+	.file 14 "include/asm-generic/u-boot.h"
+	.file 15 "./arch/arm/include/asm/u-boot-arm.h"
+	.file 16 "include/linux/libfdt_env.h"
+	.file 17 "include/linux/../../scripts/dtc/libfdt/fdt.h"
+	.file 18 "include/linux/libfdt.h"
+	.file 19 "include/image.h"
+	.file 20 "./arch/arm/include/asm/global_data.h"
+	.file 21 "include/asm-generic/global_data.h"
+	.file 22 "include/dm/of.h"
+	.file 23 "include/net.h"
+	.file 24 "include/dm/uclass-id.h"
+	.file 25 "include/dm/ofnode.h"
+	.file 26 "include/malloc.h"
+	.file 27 "include/linux/compat.h"
+	.file 28 "include/dm/uclass.h"
+	.file 29 "include/asm-generic/ioctl.h"
+	.file 30 "include/misc.h"
+	.file 31 "include/rockchip-otp-v2.h"
+	.file 32 "include/dm/read.h"
+	.file 33 "include/stdio.h"
+	.file 34 "include/linux/delay.h"
+	.file 35 "include/log.h"
+	.section	.debug_info,"",%progbits
+.Ldebug_info0:
+	.4byte	0x1cb6
+	.2byte	0x4
+	.4byte	.Ldebug_abbrev0
+	.byte	0x4
+	.uleb128 0x1
+	.4byte	.LASF425
+	.byte	0xc
+	.4byte	.LASF426
+	.4byte	.LASF427
+	.4byte	.Ldebug_ranges0+0x58
+	.4byte	0
+	.4byte	.Ldebug_line0
+	.uleb128 0x2
+	.4byte	.LASF4
+	.byte	0x2
+	.byte	0xd
+	.4byte	0x30
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x8
+	.4byte	.LASF0
+	.uleb128 0x3
+	.byte	0x4
+	.byte	0x7
+	.4byte	.LASF1
+	.uleb128 0x3
+	.byte	0x2
+	.byte	0x7
+	.4byte	.LASF2
+	.uleb128 0x4
+	.4byte	.LASF21
+	.byte	0x5
+	.byte	0xc
+	.4byte	0x50
+	.uleb128 0x5
+	.byte	0x4
+	.byte	0x5
+	.ascii	"int\000"
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x6
+	.4byte	.LASF3
+	.uleb128 0x2
+	.4byte	.LASF5
+	.byte	0x3
+	.byte	0xc
+	.4byte	0x30
+	.uleb128 0x3
+	.byte	0x2
+	.byte	0x5
+	.4byte	.LASF6
+	.uleb128 0x2
+	.4byte	.LASF7
+	.byte	0x3
+	.byte	0x12
+	.4byte	0x7b
+	.uleb128 0x3
+	.byte	0x4
+	.byte	0x7
+	.4byte	.LASF8
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x5
+	.4byte	.LASF9
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF10
+	.uleb128 0x6
+	.ascii	"u8\000"
+	.byte	0x3
+	.byte	0x1f
+	.4byte	0x30
+	.uleb128 0x7
+	.4byte	0x90
+	.uleb128 0x6
+	.ascii	"u32\000"
+	.byte	0x3
+	.byte	0x25
+	.4byte	0x7b
+	.uleb128 0x6
+	.ascii	"u64\000"
+	.byte	0x3
+	.byte	0x28
+	.4byte	0x89
+	.uleb128 0x2
+	.4byte	.LASF11
+	.byte	0x3
+	.byte	0x35
+	.4byte	0x37
+	.uleb128 0x2
+	.4byte	.LASF12
+	.byte	0x3
+	.byte	0x36
+	.4byte	0x37
+	.uleb128 0x3
+	.byte	0x4
+	.byte	0x7
+	.4byte	.LASF13
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xdf
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x8
+	.4byte	.LASF14
+	.uleb128 0x7
+	.4byte	0xd8
+	.uleb128 0x3
+	.byte	0x4
+	.byte	0x5
+	.4byte	.LASF15
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xd8
+	.uleb128 0x2
+	.4byte	.LASF16
+	.byte	0x4
+	.byte	0x59
+	.4byte	0x3e
+	.uleb128 0x2
+	.4byte	.LASF17
+	.byte	0x4
+	.byte	0x5b
+	.4byte	0x37
+	.uleb128 0x2
+	.4byte	.LASF18
+	.byte	0x4
+	.byte	0x69
+	.4byte	0x5e
+	.uleb128 0x2
+	.4byte	.LASF19
+	.byte	0x4
+	.byte	0x6b
+	.4byte	0x70
+	.uleb128 0x2
+	.4byte	.LASF20
+	.byte	0x4
+	.byte	0x97
+	.4byte	0x70
+	.uleb128 0x9
+	.byte	0x4
+	.uleb128 0x4
+	.4byte	.LASF22
+	.byte	0x6
+	.byte	0xb
+	.4byte	0xeb
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x2
+	.4byte	.LASF23
+	.uleb128 0xa
+	.4byte	0xd8
+	.4byte	0x147
+	.uleb128 0xb
+	.byte	0
+	.uleb128 0xc
+	.4byte	.LASF24
+	.byte	0x7
+	.2byte	0x140
+	.4byte	0x13c
+	.uleb128 0xc
+	.4byte	.LASF25
+	.byte	0x7
+	.2byte	0x143
+	.4byte	0x13c
+	.uleb128 0xc
+	.4byte	.LASF26
+	.byte	0x7
+	.2byte	0x143
+	.4byte	0x13c
+	.uleb128 0xd
+	.4byte	.LASF45
+	.byte	0x54
+	.byte	0x8
+	.byte	0x80
+	.4byte	0x250
+	.uleb128 0xe
+	.4byte	.LASF27
+	.byte	0x8
+	.byte	0x81
+	.4byte	0x13dd
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF28
+	.byte	0x8
+	.byte	0x82
+	.4byte	0xd2
+	.byte	0x4
+	.uleb128 0xe
+	.4byte	.LASF29
+	.byte	0x8
+	.byte	0x83
+	.4byte	0x128
+	.byte	0x8
+	.uleb128 0xe
+	.4byte	.LASF30
+	.byte	0x8
+	.byte	0x84
+	.4byte	0x128
+	.byte	0xc
+	.uleb128 0xe
+	.4byte	.LASF31
+	.byte	0x8
+	.byte	0x85
+	.4byte	0x128
+	.byte	0x10
+	.uleb128 0xe
+	.4byte	.LASF32
+	.byte	0x8
+	.byte	0x86
+	.4byte	0x1384
+	.byte	0x14
+	.uleb128 0xe
+	.4byte	.LASF33
+	.byte	0x8
+	.byte	0x87
+	.4byte	0xfc
+	.byte	0x18
+	.uleb128 0xe
+	.4byte	.LASF34
+	.byte	0x8
+	.byte	0x88
+	.4byte	0x250
+	.byte	0x1c
+	.uleb128 0xe
+	.4byte	.LASF35
+	.byte	0x8
+	.byte	0x89
+	.4byte	0x128
+	.byte	0x20
+	.uleb128 0xe
+	.4byte	.LASF36
+	.byte	0x8
+	.byte	0x8a
+	.4byte	0x1420
+	.byte	0x24
+	.uleb128 0xe
+	.4byte	.LASF37
+	.byte	0x8
+	.byte	0x8b
+	.4byte	0x128
+	.byte	0x28
+	.uleb128 0xe
+	.4byte	.LASF38
+	.byte	0x8
+	.byte	0x8c
+	.4byte	0x128
+	.byte	0x2c
+	.uleb128 0xe
+	.4byte	.LASF39
+	.byte	0x8
+	.byte	0x8d
+	.4byte	0x283
+	.byte	0x30
+	.uleb128 0xe
+	.4byte	.LASF40
+	.byte	0x8
+	.byte	0x8e
+	.4byte	0x283
+	.byte	0x38
+	.uleb128 0xe
+	.4byte	.LASF41
+	.byte	0x8
+	.byte	0x8f
+	.4byte	0x283
+	.byte	0x40
+	.uleb128 0xe
+	.4byte	.LASF42
+	.byte	0x8
+	.byte	0x90
+	.4byte	0x112
+	.byte	0x48
+	.uleb128 0xe
+	.4byte	.LASF43
+	.byte	0x8
+	.byte	0x91
+	.4byte	0x50
+	.byte	0x4c
+	.uleb128 0xf
+	.ascii	"seq\000"
+	.byte	0x8
+	.byte	0x92
+	.4byte	0x50
+	.byte	0x50
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x16b
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x25c
+	.uleb128 0x10
+	.uleb128 0xa
+	.4byte	0xfc
+	.4byte	0x268
+	.uleb128 0xb
+	.byte	0
+	.uleb128 0x4
+	.4byte	.LASF44
+	.byte	0x9
+	.byte	0x10
+	.4byte	0x25d
+	.uleb128 0xa
+	.4byte	0x30
+	.4byte	0x283
+	.uleb128 0x11
+	.4byte	0xcb
+	.byte	0x5
+	.byte	0
+	.uleb128 0xd
+	.4byte	.LASF46
+	.byte	0x8
+	.byte	0xa
+	.byte	0x16
+	.4byte	0x2a8
+	.uleb128 0xe
+	.4byte	.LASF47
+	.byte	0xa
+	.byte	0x17
+	.4byte	0x2a8
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF48
+	.byte	0xa
+	.byte	0x17
+	.4byte	0x2a8
+	.byte	0x4
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x283
+	.uleb128 0xd
+	.4byte	.LASF49
+	.byte	0x8
+	.byte	0xb
+	.byte	0xf
+	.4byte	0x2d3
+	.uleb128 0xe
+	.4byte	.LASF28
+	.byte	0xb
+	.byte	0x10
+	.4byte	0xeb
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF50
+	.byte	0xb
+	.byte	0x11
+	.4byte	0x2ec
+	.byte	0x4
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x2ae
+	.uleb128 0x12
+	.4byte	0x50
+	.4byte	0x2ec
+	.uleb128 0x13
+	.4byte	0x50
+	.uleb128 0x13
+	.4byte	0x50
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x2d8
+	.uleb128 0xa
+	.4byte	0x2d3
+	.4byte	0x2fd
+	.uleb128 0xb
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x2f2
+	.uleb128 0x4
+	.4byte	.LASF49
+	.byte	0xb
+	.byte	0xce
+	.4byte	0x2fd
+	.uleb128 0x14
+	.2byte	0xa10
+	.byte	0xc
+	.byte	0x13
+	.4byte	0x361
+	.uleb128 0xe
+	.4byte	.LASF51
+	.byte	0xc
+	.byte	0x14
+	.4byte	0xfc
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF52
+	.byte	0xc
+	.byte	0x15
+	.4byte	0xf1
+	.byte	0x4
+	.uleb128 0xe
+	.4byte	.LASF53
+	.byte	0xc
+	.byte	0x16
+	.4byte	0xfc
+	.byte	0x8
+	.uleb128 0xe
+	.4byte	.LASF54
+	.byte	0xc
+	.byte	0x17
+	.4byte	0x361
+	.byte	0xc
+	.uleb128 0x15
+	.4byte	.LASF55
+	.byte	0xc
+	.byte	0x18
+	.4byte	0x372
+	.2byte	0x80c
+	.uleb128 0x16
+	.ascii	"mtd\000"
+	.byte	0xc
+	.byte	0x31
+	.4byte	0x388
+	.2byte	0xa0c
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xfc
+	.4byte	0x372
+	.uleb128 0x17
+	.4byte	0xcb
+	.2byte	0x1ff
+	.byte	0
+	.uleb128 0xa
+	.4byte	0x25
+	.4byte	0x383
+	.uleb128 0x17
+	.4byte	0xcb
+	.2byte	0x1ff
+	.byte	0
+	.uleb128 0x18
+	.4byte	.LASF302
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x383
+	.uleb128 0x2
+	.4byte	.LASF56
+	.byte	0xc
+	.byte	0x37
+	.4byte	0x30d
+	.uleb128 0xa
+	.4byte	0x38e
+	.4byte	0x3a4
+	.uleb128 0xb
+	.byte	0
+	.uleb128 0x4
+	.4byte	.LASF57
+	.byte	0xc
+	.byte	0x39
+	.4byte	0x399
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x4
+	.4byte	.LASF58
+	.uleb128 0xd
+	.4byte	.LASF59
+	.byte	0x8
+	.byte	0xd
+	.byte	0x10
+	.4byte	0x3db
+	.uleb128 0xe
+	.4byte	.LASF60
+	.byte	0xd
+	.byte	0x11
+	.4byte	0xb5
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF51
+	.byte	0xd
+	.byte	0x12
+	.4byte	0xc0
+	.byte	0x4
+	.byte	0
+	.uleb128 0xd
+	.4byte	.LASF61
+	.byte	0x90
+	.byte	0xd
+	.byte	0x15
+	.4byte	0x40c
+	.uleb128 0xf
+	.ascii	"cnt\000"
+	.byte	0xd
+	.byte	0x16
+	.4byte	0x37
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF51
+	.byte	0xd
+	.byte	0x17
+	.4byte	0xc0
+	.byte	0x4
+	.uleb128 0xe
+	.4byte	.LASF62
+	.byte	0xd
+	.byte	0x18
+	.4byte	0x40c
+	.byte	0x8
+	.byte	0
+	.uleb128 0xa
+	.4byte	0x3b6
+	.4byte	0x41c
+	.uleb128 0x11
+	.4byte	0xcb
+	.byte	0x10
+	.byte	0
+	.uleb128 0x19
+	.ascii	"lmb\000"
+	.2byte	0x120
+	.byte	0xd
+	.byte	0x1b
+	.4byte	0x442
+	.uleb128 0xe
+	.4byte	.LASF63
+	.byte	0xd
+	.byte	0x1c
+	.4byte	0x3db
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF64
+	.byte	0xd
+	.byte	0x1d
+	.4byte	0x3db
+	.byte	0x90
+	.byte	0
+	.uleb128 0x1a
+	.ascii	"lmb\000"
+	.byte	0xd
+	.byte	0x20
+	.4byte	0x41c
+	.uleb128 0x1b
+	.byte	0x10
+	.byte	0xe
+	.byte	0x5d
+	.4byte	0x46e
+	.uleb128 0xe
+	.4byte	.LASF54
+	.byte	0xe
+	.byte	0x5e
+	.4byte	0xaa
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF51
+	.byte	0xe
+	.byte	0x5f
+	.4byte	0xaa
+	.byte	0x8
+	.byte	0
+	.uleb128 0xd
+	.4byte	.LASF65
+	.byte	0x70
+	.byte	0xe
+	.byte	0x1b
+	.4byte	0x56b
+	.uleb128 0xe
+	.4byte	.LASF66
+	.byte	0xe
+	.byte	0x1c
+	.4byte	0x37
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF67
+	.byte	0xe
+	.byte	0x1d
+	.4byte	0xc0
+	.byte	0x4
+	.uleb128 0xe
+	.4byte	.LASF68
+	.byte	0xe
+	.byte	0x1e
+	.4byte	0x37
+	.byte	0x8
+	.uleb128 0xe
+	.4byte	.LASF69
+	.byte	0xe
+	.byte	0x1f
+	.4byte	0x37
+	.byte	0xc
+	.uleb128 0xe
+	.4byte	.LASF70
+	.byte	0xe
+	.byte	0x20
+	.4byte	0x37
+	.byte	0x10
+	.uleb128 0xe
+	.4byte	.LASF71
+	.byte	0xe
+	.byte	0x21
+	.4byte	0x37
+	.byte	0x14
+	.uleb128 0xe
+	.4byte	.LASF72
+	.byte	0xe
+	.byte	0x22
+	.4byte	0x37
+	.byte	0x18
+	.uleb128 0xe
+	.4byte	.LASF73
+	.byte	0xe
+	.byte	0x24
+	.4byte	0x37
+	.byte	0x1c
+	.uleb128 0xe
+	.4byte	.LASF74
+	.byte	0xe
+	.byte	0x25
+	.4byte	0x37
+	.byte	0x20
+	.uleb128 0xe
+	.4byte	.LASF75
+	.byte	0xe
+	.byte	0x26
+	.4byte	0x37
+	.byte	0x24
+	.uleb128 0xe
+	.4byte	.LASF76
+	.byte	0xe
+	.byte	0x31
+	.4byte	0x37
+	.byte	0x28
+	.uleb128 0xe
+	.4byte	.LASF77
+	.byte	0xe
+	.byte	0x32
+	.4byte	0x37
+	.byte	0x2c
+	.uleb128 0xe
+	.4byte	.LASF78
+	.byte	0xe
+	.byte	0x33
+	.4byte	0x273
+	.byte	0x30
+	.uleb128 0xe
+	.4byte	.LASF79
+	.byte	0xe
+	.byte	0x34
+	.4byte	0x3e
+	.byte	0x36
+	.uleb128 0xe
+	.4byte	.LASF80
+	.byte	0xe
+	.byte	0x35
+	.4byte	0x37
+	.byte	0x38
+	.uleb128 0xe
+	.4byte	.LASF81
+	.byte	0xe
+	.byte	0x36
+	.4byte	0x37
+	.byte	0x3c
+	.uleb128 0xe
+	.4byte	.LASF82
+	.byte	0xe
+	.byte	0x57
+	.4byte	0xfc
+	.byte	0x40
+	.uleb128 0xe
+	.4byte	.LASF83
+	.byte	0xe
+	.byte	0x58
+	.4byte	0xfc
+	.byte	0x44
+	.uleb128 0xe
+	.4byte	.LASF84
+	.byte	0xe
+	.byte	0x5b
+	.4byte	0x7b
+	.byte	0x48
+	.uleb128 0xe
+	.4byte	.LASF85
+	.byte	0xe
+	.byte	0x60
+	.4byte	0x56b
+	.byte	0x50
+	.byte	0
+	.uleb128 0xa
+	.4byte	0x44d
+	.4byte	0x57b
+	.uleb128 0x11
+	.4byte	0xcb
+	.byte	0x1
+	.byte	0
+	.uleb128 0x2
+	.4byte	.LASF86
+	.byte	0xe
+	.byte	0x62
+	.4byte	0x46e
+	.uleb128 0x4
+	.4byte	.LASF87
+	.byte	0xf
+	.byte	0x13
+	.4byte	0xfc
+	.uleb128 0x4
+	.4byte	.LASF88
+	.byte	0xf
+	.byte	0x14
+	.4byte	0xfc
+	.uleb128 0x4
+	.4byte	.LASF89
+	.byte	0xf
+	.byte	0x15
+	.4byte	0xfc
+	.uleb128 0x4
+	.4byte	.LASF90
+	.byte	0xf
+	.byte	0x16
+	.4byte	0xfc
+	.uleb128 0x4
+	.4byte	.LASF91
+	.byte	0xf
+	.byte	0x17
+	.4byte	0xfc
+	.uleb128 0x4
+	.4byte	.LASF92
+	.byte	0xf
+	.byte	0x18
+	.4byte	0xfc
+	.uleb128 0x4
+	.4byte	.LASF93
+	.byte	0xf
+	.byte	0x19
+	.4byte	0xfc
+	.uleb128 0x2
+	.4byte	.LASF94
+	.byte	0x10
+	.byte	0x11
+	.4byte	0x11d
+	.uleb128 0xd
+	.4byte	.LASF95
+	.byte	0x28
+	.byte	0x11
+	.byte	0x39
+	.4byte	0x663
+	.uleb128 0xe
+	.4byte	.LASF96
+	.byte	0x11
+	.byte	0x3a
+	.4byte	0x5d3
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF97
+	.byte	0x11
+	.byte	0x3b
+	.4byte	0x5d3
+	.byte	0x4
+	.uleb128 0xe
+	.4byte	.LASF98
+	.byte	0x11
+	.byte	0x3c
+	.4byte	0x5d3
+	.byte	0x8
+	.uleb128 0xe
+	.4byte	.LASF99
+	.byte	0x11
+	.byte	0x3d
+	.4byte	0x5d3
+	.byte	0xc
+	.uleb128 0xe
+	.4byte	.LASF100
+	.byte	0x11
+	.byte	0x3e
+	.4byte	0x5d3
+	.byte	0x10
+	.uleb128 0xe
+	.4byte	.LASF101
+	.byte	0x11
+	.byte	0x3f
+	.4byte	0x5d3
+	.byte	0x14
+	.uleb128 0xe
+	.4byte	.LASF102
+	.byte	0x11
+	.byte	0x40
+	.4byte	0x5d3
+	.byte	0x18
+	.uleb128 0xe
+	.4byte	.LASF103
+	.byte	0x11
+	.byte	0x43
+	.4byte	0x5d3
+	.byte	0x1c
+	.uleb128 0xe
+	.4byte	.LASF104
+	.byte	0x11
+	.byte	0x46
+	.4byte	0x5d3
+	.byte	0x20
+	.uleb128 0xe
+	.4byte	.LASF105
+	.byte	0x11
+	.byte	0x49
+	.4byte	0x5d3
+	.byte	0x24
+	.byte	0
+	.uleb128 0xc
+	.4byte	.LASF106
+	.byte	0x12
+	.2byte	0x136
+	.4byte	0x66f
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x5de
+	.uleb128 0x1c
+	.4byte	.LASF107
+	.byte	0x40
+	.byte	0x13
+	.2byte	0x135
+	.4byte	0x71f
+	.uleb128 0x1d
+	.4byte	.LASF108
+	.byte	0x13
+	.2byte	0x136
+	.4byte	0x11d
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF109
+	.byte	0x13
+	.2byte	0x137
+	.4byte	0x11d
+	.byte	0x4
+	.uleb128 0x1d
+	.4byte	.LASF110
+	.byte	0x13
+	.2byte	0x138
+	.4byte	0x11d
+	.byte	0x8
+	.uleb128 0x1d
+	.4byte	.LASF111
+	.byte	0x13
+	.2byte	0x139
+	.4byte	0x11d
+	.byte	0xc
+	.uleb128 0x1d
+	.4byte	.LASF112
+	.byte	0x13
+	.2byte	0x13a
+	.4byte	0x11d
+	.byte	0x10
+	.uleb128 0x1d
+	.4byte	.LASF113
+	.byte	0x13
+	.2byte	0x13b
+	.4byte	0x11d
+	.byte	0x14
+	.uleb128 0x1d
+	.4byte	.LASF114
+	.byte	0x13
+	.2byte	0x13c
+	.4byte	0x11d
+	.byte	0x18
+	.uleb128 0x1d
+	.4byte	.LASF115
+	.byte	0x13
+	.2byte	0x13d
+	.4byte	0x107
+	.byte	0x1c
+	.uleb128 0x1d
+	.4byte	.LASF116
+	.byte	0x13
+	.2byte	0x13e
+	.4byte	0x107
+	.byte	0x1d
+	.uleb128 0x1d
+	.4byte	.LASF117
+	.byte	0x13
+	.2byte	0x13f
+	.4byte	0x107
+	.byte	0x1e
+	.uleb128 0x1d
+	.4byte	.LASF118
+	.byte	0x13
+	.2byte	0x140
+	.4byte	0x107
+	.byte	0x1f
+	.uleb128 0x1d
+	.4byte	.LASF119
+	.byte	0x13
+	.2byte	0x141
+	.4byte	0x71f
+	.byte	0x20
+	.byte	0
+	.uleb128 0xa
+	.4byte	0x107
+	.4byte	0x72f
+	.uleb128 0x11
+	.4byte	0xcb
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x1e
+	.4byte	.LASF120
+	.byte	0x13
+	.2byte	0x142
+	.4byte	0x675
+	.uleb128 0x1c
+	.4byte	.LASF121
+	.byte	0x18
+	.byte	0x13
+	.2byte	0x144
+	.4byte	0x7bd
+	.uleb128 0x1d
+	.4byte	.LASF54
+	.byte	0x13
+	.2byte	0x145
+	.4byte	0xfc
+	.byte	0
+	.uleb128 0x1f
+	.ascii	"end\000"
+	.byte	0x13
+	.2byte	0x145
+	.4byte	0xfc
+	.byte	0x4
+	.uleb128 0x1d
+	.4byte	.LASF122
+	.byte	0x13
+	.2byte	0x146
+	.4byte	0xfc
+	.byte	0x8
+	.uleb128 0x1d
+	.4byte	.LASF123
+	.byte	0x13
+	.2byte	0x146
+	.4byte	0xfc
+	.byte	0xc
+	.uleb128 0x1d
+	.4byte	.LASF124
+	.byte	0x13
+	.2byte	0x147
+	.4byte	0xfc
+	.byte	0x10
+	.uleb128 0x1d
+	.4byte	.LASF125
+	.byte	0x13
+	.2byte	0x148
+	.4byte	0x107
+	.byte	0x14
+	.uleb128 0x1d
+	.4byte	.LASF126
+	.byte	0x13
+	.2byte	0x148
+	.4byte	0x107
+	.byte	0x15
+	.uleb128 0x1f
+	.ascii	"os\000"
+	.byte	0x13
+	.2byte	0x148
+	.4byte	0x107
+	.byte	0x16
+	.uleb128 0x1d
+	.4byte	.LASF127
+	.byte	0x13
+	.2byte	0x149
+	.4byte	0x107
+	.byte	0x17
+	.byte	0
+	.uleb128 0x1e
+	.4byte	.LASF128
+	.byte	0x13
+	.2byte	0x14a
+	.4byte	0x73b
+	.uleb128 0x20
+	.4byte	.LASF129
+	.2byte	0x1e4
+	.byte	0x13
+	.2byte	0x150
+	.4byte	0x95c
+	.uleb128 0x1d
+	.4byte	.LASF130
+	.byte	0x13
+	.2byte	0x156
+	.4byte	0x95c
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF131
+	.byte	0x13
+	.2byte	0x157
+	.4byte	0x72f
+	.byte	0x4
+	.uleb128 0x1d
+	.4byte	.LASF132
+	.byte	0x13
+	.2byte	0x158
+	.4byte	0xfc
+	.byte	0x44
+	.uleb128 0x1d
+	.4byte	.LASF133
+	.byte	0x13
+	.2byte	0x15b
+	.4byte	0xd2
+	.byte	0x48
+	.uleb128 0x1d
+	.4byte	.LASF134
+	.byte	0x13
+	.2byte	0x15d
+	.4byte	0x128
+	.byte	0x4c
+	.uleb128 0x1d
+	.4byte	.LASF135
+	.byte	0x13
+	.2byte	0x15e
+	.4byte	0xd2
+	.byte	0x50
+	.uleb128 0x1d
+	.4byte	.LASF136
+	.byte	0x13
+	.2byte	0x15f
+	.4byte	0x50
+	.byte	0x54
+	.uleb128 0x1d
+	.4byte	.LASF137
+	.byte	0x13
+	.2byte	0x161
+	.4byte	0x128
+	.byte	0x58
+	.uleb128 0x1d
+	.4byte	.LASF138
+	.byte	0x13
+	.2byte	0x162
+	.4byte	0xd2
+	.byte	0x5c
+	.uleb128 0x1d
+	.4byte	.LASF139
+	.byte	0x13
+	.2byte	0x163
+	.4byte	0x50
+	.byte	0x60
+	.uleb128 0x1d
+	.4byte	.LASF140
+	.byte	0x13
+	.2byte	0x165
+	.4byte	0x128
+	.byte	0x64
+	.uleb128 0x1d
+	.4byte	.LASF141
+	.byte	0x13
+	.2byte	0x166
+	.4byte	0xd2
+	.byte	0x68
+	.uleb128 0x1d
+	.4byte	.LASF142
+	.byte	0x13
+	.2byte	0x167
+	.4byte	0x50
+	.byte	0x6c
+	.uleb128 0x1d
+	.4byte	.LASF143
+	.byte	0x13
+	.2byte	0x169
+	.4byte	0x128
+	.byte	0x70
+	.uleb128 0x1d
+	.4byte	.LASF144
+	.byte	0x13
+	.2byte	0x16a
+	.4byte	0xd2
+	.byte	0x74
+	.uleb128 0x1d
+	.4byte	.LASF145
+	.byte	0x13
+	.2byte	0x16b
+	.4byte	0x50
+	.byte	0x78
+	.uleb128 0x1f
+	.ascii	"os\000"
+	.byte	0x13
+	.2byte	0x16f
+	.4byte	0x7bd
+	.byte	0x7c
+	.uleb128 0x1f
+	.ascii	"ep\000"
+	.byte	0x13
+	.2byte	0x170
+	.4byte	0xfc
+	.byte	0x94
+	.uleb128 0x1d
+	.4byte	.LASF146
+	.byte	0x13
+	.2byte	0x172
+	.4byte	0xfc
+	.byte	0x98
+	.uleb128 0x1d
+	.4byte	.LASF147
+	.byte	0x13
+	.2byte	0x172
+	.4byte	0xfc
+	.byte	0x9c
+	.uleb128 0x1d
+	.4byte	.LASF148
+	.byte	0x13
+	.2byte	0x174
+	.4byte	0xeb
+	.byte	0xa0
+	.uleb128 0x1d
+	.4byte	.LASF149
+	.byte	0x13
+	.2byte	0x175
+	.4byte	0xfc
+	.byte	0xa4
+	.uleb128 0x1d
+	.4byte	.LASF150
+	.byte	0x13
+	.2byte	0x177
+	.4byte	0xfc
+	.byte	0xa8
+	.uleb128 0x1d
+	.4byte	.LASF151
+	.byte	0x13
+	.2byte	0x178
+	.4byte	0xfc
+	.byte	0xac
+	.uleb128 0x1d
+	.4byte	.LASF152
+	.byte	0x13
+	.2byte	0x179
+	.4byte	0xfc
+	.byte	0xb0
+	.uleb128 0x1d
+	.4byte	.LASF153
+	.byte	0x13
+	.2byte	0x17a
+	.4byte	0xfc
+	.byte	0xb4
+	.uleb128 0x1f
+	.ascii	"kbd\000"
+	.byte	0x13
+	.2byte	0x17b
+	.4byte	0x962
+	.byte	0xb8
+	.uleb128 0x1d
+	.4byte	.LASF154
+	.byte	0x13
+	.2byte	0x17e
+	.4byte	0x50
+	.byte	0xbc
+	.uleb128 0x1d
+	.4byte	.LASF155
+	.byte	0x13
+	.2byte	0x18b
+	.4byte	0x50
+	.byte	0xc0
+	.uleb128 0x1f
+	.ascii	"lmb\000"
+	.byte	0x13
+	.2byte	0x18e
+	.4byte	0x41c
+	.byte	0xc4
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x72f
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x57b
+	.uleb128 0x1e
+	.4byte	.LASF156
+	.byte	0x13
+	.2byte	0x194
+	.4byte	0x7c9
+	.uleb128 0xc
+	.4byte	.LASF157
+	.byte	0x13
+	.2byte	0x196
+	.4byte	0x968
+	.uleb128 0x21
+	.4byte	.LASF346
+	.byte	0x4
+	.4byte	0x50
+	.byte	0x18
+	.byte	0xe
+	.4byte	0xbb3
+	.uleb128 0x22
+	.4byte	.LASF158
+	.byte	0
+	.uleb128 0x22
+	.4byte	.LASF159
+	.byte	0x1
+	.uleb128 0x22
+	.4byte	.LASF160
+	.byte	0x2
+	.uleb128 0x22
+	.4byte	.LASF161
+	.byte	0x3
+	.uleb128 0x22
+	.4byte	.LASF162
+	.byte	0x4
+	.uleb128 0x22
+	.4byte	.LASF163
+	.byte	0x5
+	.uleb128 0x22
+	.4byte	.LASF164
+	.byte	0x6
+	.uleb128 0x22
+	.4byte	.LASF165
+	.byte	0x7
+	.uleb128 0x22
+	.4byte	.LASF166
+	.byte	0x8
+	.uleb128 0x22
+	.4byte	.LASF167
+	.byte	0x9
+	.uleb128 0x22
+	.4byte	.LASF168
+	.byte	0xa
+	.uleb128 0x22
+	.4byte	.LASF169
+	.byte	0xb
+	.uleb128 0x22
+	.4byte	.LASF170
+	.byte	0xc
+	.uleb128 0x22
+	.4byte	.LASF171
+	.byte	0xd
+	.uleb128 0x22
+	.4byte	.LASF172
+	.byte	0xe
+	.uleb128 0x22
+	.4byte	.LASF173
+	.byte	0xf
+	.uleb128 0x22
+	.4byte	.LASF174
+	.byte	0x10
+	.uleb128 0x22
+	.4byte	.LASF175
+	.byte	0x11
+	.uleb128 0x22
+	.4byte	.LASF176
+	.byte	0x12
+	.uleb128 0x22
+	.4byte	.LASF177
+	.byte	0x13
+	.uleb128 0x22
+	.4byte	.LASF178
+	.byte	0x14
+	.uleb128 0x22
+	.4byte	.LASF179
+	.byte	0x15
+	.uleb128 0x22
+	.4byte	.LASF180
+	.byte	0x16
+	.uleb128 0x22
+	.4byte	.LASF181
+	.byte	0x17
+	.uleb128 0x22
+	.4byte	.LASF182
+	.byte	0x18
+	.uleb128 0x22
+	.4byte	.LASF183
+	.byte	0x19
+	.uleb128 0x22
+	.4byte	.LASF184
+	.byte	0x1a
+	.uleb128 0x22
+	.4byte	.LASF185
+	.byte	0x1b
+	.uleb128 0x22
+	.4byte	.LASF186
+	.byte	0x1c
+	.uleb128 0x22
+	.4byte	.LASF187
+	.byte	0x1d
+	.uleb128 0x22
+	.4byte	.LASF188
+	.byte	0x1e
+	.uleb128 0x22
+	.4byte	.LASF189
+	.byte	0x1f
+	.uleb128 0x22
+	.4byte	.LASF190
+	.byte	0x20
+	.uleb128 0x22
+	.4byte	.LASF191
+	.byte	0x21
+	.uleb128 0x22
+	.4byte	.LASF192
+	.byte	0x22
+	.uleb128 0x22
+	.4byte	.LASF193
+	.byte	0x23
+	.uleb128 0x22
+	.4byte	.LASF194
+	.byte	0x24
+	.uleb128 0x22
+	.4byte	.LASF195
+	.byte	0x25
+	.uleb128 0x22
+	.4byte	.LASF196
+	.byte	0x26
+	.uleb128 0x22
+	.4byte	.LASF197
+	.byte	0x27
+	.uleb128 0x22
+	.4byte	.LASF198
+	.byte	0x28
+	.uleb128 0x22
+	.4byte	.LASF199
+	.byte	0x29
+	.uleb128 0x22
+	.4byte	.LASF200
+	.byte	0x2a
+	.uleb128 0x22
+	.4byte	.LASF201
+	.byte	0x2b
+	.uleb128 0x22
+	.4byte	.LASF202
+	.byte	0x2c
+	.uleb128 0x22
+	.4byte	.LASF203
+	.byte	0x2d
+	.uleb128 0x22
+	.4byte	.LASF204
+	.byte	0x2e
+	.uleb128 0x22
+	.4byte	.LASF205
+	.byte	0x2f
+	.uleb128 0x22
+	.4byte	.LASF206
+	.byte	0x30
+	.uleb128 0x22
+	.4byte	.LASF207
+	.byte	0x31
+	.uleb128 0x22
+	.4byte	.LASF208
+	.byte	0x32
+	.uleb128 0x22
+	.4byte	.LASF209
+	.byte	0x33
+	.uleb128 0x22
+	.4byte	.LASF210
+	.byte	0x34
+	.uleb128 0x22
+	.4byte	.LASF211
+	.byte	0x35
+	.uleb128 0x22
+	.4byte	.LASF212
+	.byte	0x36
+	.uleb128 0x22
+	.4byte	.LASF213
+	.byte	0x37
+	.uleb128 0x22
+	.4byte	.LASF214
+	.byte	0x38
+	.uleb128 0x22
+	.4byte	.LASF215
+	.byte	0x39
+	.uleb128 0x22
+	.4byte	.LASF216
+	.byte	0x3a
+	.uleb128 0x22
+	.4byte	.LASF217
+	.byte	0x3b
+	.uleb128 0x22
+	.4byte	.LASF218
+	.byte	0x3c
+	.uleb128 0x22
+	.4byte	.LASF219
+	.byte	0x3d
+	.uleb128 0x22
+	.4byte	.LASF220
+	.byte	0x3e
+	.uleb128 0x22
+	.4byte	.LASF221
+	.byte	0x3f
+	.uleb128 0x22
+	.4byte	.LASF222
+	.byte	0x40
+	.uleb128 0x22
+	.4byte	.LASF223
+	.byte	0x41
+	.uleb128 0x22
+	.4byte	.LASF224
+	.byte	0x42
+	.uleb128 0x22
+	.4byte	.LASF225
+	.byte	0x43
+	.uleb128 0x22
+	.4byte	.LASF226
+	.byte	0x44
+	.uleb128 0x22
+	.4byte	.LASF227
+	.byte	0x45
+	.uleb128 0x22
+	.4byte	.LASF228
+	.byte	0x46
+	.uleb128 0x22
+	.4byte	.LASF229
+	.byte	0x47
+	.uleb128 0x22
+	.4byte	.LASF230
+	.byte	0x48
+	.uleb128 0x22
+	.4byte	.LASF231
+	.byte	0x49
+	.uleb128 0x22
+	.4byte	.LASF232
+	.byte	0x4a
+	.uleb128 0x22
+	.4byte	.LASF233
+	.byte	0x4b
+	.uleb128 0x22
+	.4byte	.LASF234
+	.byte	0x4c
+	.uleb128 0x22
+	.4byte	.LASF235
+	.byte	0x4d
+	.uleb128 0x22
+	.4byte	.LASF236
+	.byte	0x4e
+	.uleb128 0x22
+	.4byte	.LASF237
+	.byte	0x4f
+	.uleb128 0x22
+	.4byte	.LASF238
+	.byte	0x50
+	.uleb128 0x22
+	.4byte	.LASF239
+	.byte	0x51
+	.uleb128 0x22
+	.4byte	.LASF240
+	.byte	0x52
+	.uleb128 0x22
+	.4byte	.LASF241
+	.byte	0x53
+	.uleb128 0x22
+	.4byte	.LASF242
+	.byte	0x54
+	.uleb128 0x22
+	.4byte	.LASF243
+	.byte	0x55
+	.uleb128 0x22
+	.4byte	.LASF244
+	.byte	0x56
+	.uleb128 0x22
+	.4byte	.LASF245
+	.byte	0x57
+	.uleb128 0x22
+	.4byte	.LASF246
+	.byte	0x58
+	.uleb128 0x22
+	.4byte	.LASF247
+	.byte	0x59
+	.uleb128 0x23
+	.4byte	.LASF248
+	.sleb128 -1
+	.byte	0
+	.uleb128 0x24
+	.byte	0x4
+	.4byte	0x7b
+	.byte	0x23
+	.byte	0xf6
+	.4byte	0xbc6
+	.uleb128 0x22
+	.4byte	.LASF249
+	.byte	0x5
+	.byte	0
+	.uleb128 0xd
+	.4byte	.LASF250
+	.byte	0x20
+	.byte	0x14
+	.byte	0xc
+	.4byte	0xc27
+	.uleb128 0xe
+	.4byte	.LASF251
+	.byte	0x14
+	.byte	0x22
+	.4byte	0x37
+	.byte	0
+	.uleb128 0xf
+	.ascii	"tbu\000"
+	.byte	0x14
+	.byte	0x23
+	.4byte	0x7b
+	.byte	0x4
+	.uleb128 0xf
+	.ascii	"tbl\000"
+	.byte	0x14
+	.byte	0x24
+	.4byte	0x7b
+	.byte	0x8
+	.uleb128 0xe
+	.4byte	.LASF252
+	.byte	0x14
+	.byte	0x25
+	.4byte	0x37
+	.byte	0xc
+	.uleb128 0xe
+	.4byte	.LASF253
+	.byte	0x14
+	.byte	0x26
+	.4byte	0x89
+	.byte	0x10
+	.uleb128 0xe
+	.4byte	.LASF254
+	.byte	0x14
+	.byte	0x28
+	.4byte	0x37
+	.byte	0x18
+	.uleb128 0xe
+	.4byte	.LASF255
+	.byte	0x14
+	.byte	0x29
+	.4byte	0x37
+	.byte	0x1c
+	.byte	0
+	.uleb128 0xd
+	.4byte	.LASF256
+	.byte	0x10
+	.byte	0x15
+	.byte	0x22
+	.4byte	0xc63
+	.uleb128 0xe
+	.4byte	.LASF257
+	.byte	0x15
+	.byte	0x23
+	.4byte	0x9f
+	.byte	0
+	.uleb128 0xf
+	.ascii	"id\000"
+	.byte	0x15
+	.byte	0x24
+	.4byte	0x9f
+	.byte	0x4
+	.uleb128 0xe
+	.4byte	.LASF258
+	.byte	0x15
+	.byte	0x25
+	.4byte	0x9f
+	.byte	0x8
+	.uleb128 0xe
+	.4byte	.LASF259
+	.byte	0x15
+	.byte	0x26
+	.4byte	0xfc
+	.byte	0xc
+	.byte	0
+	.uleb128 0xd
+	.4byte	.LASF260
+	.byte	0xf0
+	.byte	0x15
+	.byte	0x29
+	.4byte	0xe4e
+	.uleb128 0xf
+	.ascii	"bd\000"
+	.byte	0x15
+	.byte	0x2a
+	.4byte	0x962
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF42
+	.byte	0x15
+	.byte	0x2b
+	.4byte	0x37
+	.byte	0x4
+	.uleb128 0xe
+	.4byte	.LASF258
+	.byte	0x15
+	.byte	0x2c
+	.4byte	0x7b
+	.byte	0x8
+	.uleb128 0xe
+	.4byte	.LASF261
+	.byte	0x15
+	.byte	0x2d
+	.4byte	0x37
+	.byte	0xc
+	.uleb128 0xe
+	.4byte	.LASF262
+	.byte	0x15
+	.byte	0x2e
+	.4byte	0x37
+	.byte	0x10
+	.uleb128 0xe
+	.4byte	.LASF263
+	.byte	0x15
+	.byte	0x30
+	.4byte	0x37
+	.byte	0x14
+	.uleb128 0xe
+	.4byte	.LASF264
+	.byte	0x15
+	.byte	0x31
+	.4byte	0x37
+	.byte	0x18
+	.uleb128 0xe
+	.4byte	.LASF265
+	.byte	0x15
+	.byte	0x3d
+	.4byte	0x37
+	.byte	0x1c
+	.uleb128 0xe
+	.4byte	.LASF266
+	.byte	0x15
+	.byte	0x41
+	.4byte	0x37
+	.byte	0x20
+	.uleb128 0xe
+	.4byte	.LASF267
+	.byte	0x15
+	.byte	0x42
+	.4byte	0x37
+	.byte	0x24
+	.uleb128 0xe
+	.4byte	.LASF268
+	.byte	0x15
+	.byte	0x44
+	.4byte	0x37
+	.byte	0x28
+	.uleb128 0xe
+	.4byte	.LASF269
+	.byte	0x15
+	.byte	0x45
+	.4byte	0x37
+	.byte	0x2c
+	.uleb128 0xe
+	.4byte	.LASF270
+	.byte	0x15
+	.byte	0x46
+	.4byte	0xc0
+	.byte	0x30
+	.uleb128 0xe
+	.4byte	.LASF271
+	.byte	0x15
+	.byte	0x47
+	.4byte	0x37
+	.byte	0x34
+	.uleb128 0xe
+	.4byte	.LASF272
+	.byte	0x15
+	.byte	0x48
+	.4byte	0x37
+	.byte	0x38
+	.uleb128 0xe
+	.4byte	.LASF273
+	.byte	0x15
+	.byte	0x49
+	.4byte	0x37
+	.byte	0x3c
+	.uleb128 0xe
+	.4byte	.LASF274
+	.byte	0x15
+	.byte	0x4a
+	.4byte	0x37
+	.byte	0x40
+	.uleb128 0xe
+	.4byte	.LASF275
+	.byte	0x15
+	.byte	0x4b
+	.4byte	0xe4e
+	.byte	0x44
+	.uleb128 0xe
+	.4byte	.LASF276
+	.byte	0x15
+	.byte	0x4e
+	.4byte	0x250
+	.byte	0x48
+	.uleb128 0xe
+	.4byte	.LASF277
+	.byte	0x15
+	.byte	0x4f
+	.4byte	0x250
+	.byte	0x4c
+	.uleb128 0xe
+	.4byte	.LASF278
+	.byte	0x15
+	.byte	0x50
+	.4byte	0x283
+	.byte	0x50
+	.uleb128 0xe
+	.4byte	.LASF279
+	.byte	0x15
+	.byte	0x57
+	.4byte	0x256
+	.byte	0x58
+	.uleb128 0xe
+	.4byte	.LASF280
+	.byte	0x15
+	.byte	0x59
+	.4byte	0x256
+	.byte	0x5c
+	.uleb128 0xe
+	.4byte	.LASF281
+	.byte	0x15
+	.byte	0x5c
+	.4byte	0x256
+	.byte	0x60
+	.uleb128 0xe
+	.4byte	.LASF282
+	.byte	0x15
+	.byte	0x5e
+	.4byte	0x128
+	.byte	0x64
+	.uleb128 0xe
+	.4byte	.LASF283
+	.byte	0x15
+	.byte	0x5f
+	.4byte	0x37
+	.byte	0x68
+	.uleb128 0xe
+	.4byte	.LASF284
+	.byte	0x15
+	.byte	0x61
+	.4byte	0xec6
+	.byte	0x6c
+	.uleb128 0xf
+	.ascii	"jt\000"
+	.byte	0x15
+	.byte	0x63
+	.4byte	0xed1
+	.byte	0x70
+	.uleb128 0xe
+	.4byte	.LASF285
+	.byte	0x15
+	.byte	0x64
+	.4byte	0xed7
+	.byte	0x74
+	.uleb128 0xe
+	.4byte	.LASF286
+	.byte	0x15
+	.byte	0x6e
+	.4byte	0x7b
+	.byte	0x94
+	.uleb128 0xe
+	.4byte	.LASF287
+	.byte	0x15
+	.byte	0x6f
+	.4byte	0x7b
+	.byte	0x98
+	.uleb128 0xe
+	.4byte	.LASF288
+	.byte	0x15
+	.byte	0x71
+	.4byte	0x37
+	.byte	0x9c
+	.uleb128 0xe
+	.4byte	.LASF289
+	.byte	0x15
+	.byte	0x72
+	.4byte	0x37
+	.byte	0xa0
+	.uleb128 0xe
+	.4byte	.LASF290
+	.byte	0x15
+	.byte	0x73
+	.4byte	0x37
+	.byte	0xa4
+	.uleb128 0xe
+	.4byte	.LASF291
+	.byte	0x15
+	.byte	0x7c
+	.4byte	0x250
+	.byte	0xa8
+	.uleb128 0xe
+	.4byte	.LASF127
+	.byte	0x15
+	.byte	0x7d
+	.4byte	0xbc6
+	.byte	0xb0
+	.uleb128 0xe
+	.4byte	.LASF292
+	.byte	0x15
+	.byte	0x8a
+	.4byte	0xb5
+	.byte	0xd0
+	.uleb128 0xe
+	.4byte	.LASF293
+	.byte	0x15
+	.byte	0x8f
+	.4byte	0xc27
+	.byte	0xd4
+	.uleb128 0xe
+	.4byte	.LASF294
+	.byte	0x15
+	.byte	0x90
+	.4byte	0xfc
+	.byte	0xe4
+	.uleb128 0xe
+	.4byte	.LASF295
+	.byte	0x15
+	.byte	0x91
+	.4byte	0x50
+	.byte	0xe8
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xc63
+	.uleb128 0xd
+	.4byte	.LASF296
+	.byte	0x20
+	.byte	0x16
+	.byte	0x2c
+	.4byte	0xec1
+	.uleb128 0xe
+	.4byte	.LASF28
+	.byte	0x16
+	.byte	0x2d
+	.4byte	0xd2
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF126
+	.byte	0x16
+	.byte	0x2e
+	.4byte	0xd2
+	.byte	0x4
+	.uleb128 0xe
+	.4byte	.LASF297
+	.byte	0x16
+	.byte	0x2f
+	.4byte	0x12fe
+	.byte	0x8
+	.uleb128 0xe
+	.4byte	.LASF298
+	.byte	0x16
+	.byte	0x30
+	.4byte	0xd2
+	.byte	0xc
+	.uleb128 0xe
+	.4byte	.LASF299
+	.byte	0x16
+	.byte	0x32
+	.4byte	0x1346
+	.byte	0x10
+	.uleb128 0xe
+	.4byte	.LASF34
+	.byte	0x16
+	.byte	0x33
+	.4byte	0xec6
+	.byte	0x14
+	.uleb128 0xe
+	.4byte	.LASF300
+	.byte	0x16
+	.byte	0x34
+	.4byte	0xec6
+	.byte	0x18
+	.uleb128 0xe
+	.4byte	.LASF301
+	.byte	0x16
+	.byte	0x35
+	.4byte	0xec6
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x7
+	.4byte	0xe54
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xe54
+	.uleb128 0x18
+	.4byte	.LASF303
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xecc
+	.uleb128 0xa
+	.4byte	0xd8
+	.4byte	0xee7
+	.uleb128 0x11
+	.4byte	0xcb
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x2
+	.4byte	.LASF304
+	.byte	0x15
+	.byte	0x97
+	.4byte	0xc63
+	.uleb128 0x25
+	.4byte	0xee7
+	.uleb128 0x4
+	.4byte	.LASF305
+	.byte	0x2
+	.byte	0xad
+	.4byte	0xfc
+	.uleb128 0xa
+	.4byte	0x90
+	.4byte	0xf0d
+	.uleb128 0xb
+	.byte	0
+	.uleb128 0x4
+	.4byte	.LASF306
+	.byte	0x2
+	.byte	0xaf
+	.4byte	0xf02
+	.uleb128 0x4
+	.4byte	.LASF307
+	.byte	0x2
+	.byte	0xb0
+	.4byte	0xf02
+	.uleb128 0x4
+	.4byte	.LASF308
+	.byte	0x2
+	.byte	0xfe
+	.4byte	0xfc
+	.uleb128 0x4
+	.4byte	.LASF309
+	.byte	0x2
+	.byte	0xff
+	.4byte	0xfc
+	.uleb128 0xc
+	.4byte	.LASF310
+	.byte	0x2
+	.2byte	0x100
+	.4byte	0xfc
+	.uleb128 0xd
+	.4byte	.LASF311
+	.byte	0x4
+	.byte	0x17
+	.byte	0x2e
+	.4byte	0xf5e
+	.uleb128 0xe
+	.4byte	.LASF312
+	.byte	0x17
+	.byte	0x2f
+	.4byte	0x11d
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x25
+	.uleb128 0xd
+	.4byte	.LASF313
+	.byte	0x40
+	.byte	0x17
+	.byte	0xa6
+	.4byte	0x1001
+	.uleb128 0xe
+	.4byte	.LASF28
+	.byte	0x17
+	.byte	0xa8
+	.4byte	0x1001
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF314
+	.byte	0x17
+	.byte	0xa9
+	.4byte	0x273
+	.byte	0x10
+	.uleb128 0xe
+	.4byte	.LASF315
+	.byte	0x17
+	.byte	0xaa
+	.4byte	0xb5
+	.byte	0x18
+	.uleb128 0xe
+	.4byte	.LASF155
+	.byte	0x17
+	.byte	0xab
+	.4byte	0x50
+	.byte	0x1c
+	.uleb128 0xe
+	.4byte	.LASF316
+	.byte	0x17
+	.byte	0xad
+	.4byte	0x102b
+	.byte	0x20
+	.uleb128 0xe
+	.4byte	.LASF317
+	.byte	0x17
+	.byte	0xae
+	.4byte	0x104a
+	.byte	0x24
+	.uleb128 0xe
+	.4byte	.LASF318
+	.byte	0x17
+	.byte	0xaf
+	.4byte	0x105f
+	.byte	0x28
+	.uleb128 0xe
+	.4byte	.LASF319
+	.byte	0x17
+	.byte	0xb0
+	.4byte	0x1070
+	.byte	0x2c
+	.uleb128 0xe
+	.4byte	.LASF320
+	.byte	0x17
+	.byte	0xb4
+	.4byte	0x105f
+	.byte	0x30
+	.uleb128 0xe
+	.4byte	.LASF47
+	.byte	0x17
+	.byte	0xb5
+	.4byte	0x1025
+	.byte	0x34
+	.uleb128 0xe
+	.4byte	.LASF321
+	.byte	0x17
+	.byte	0xb6
+	.4byte	0x50
+	.byte	0x38
+	.uleb128 0xe
+	.4byte	.LASF35
+	.byte	0x17
+	.byte	0xb7
+	.4byte	0x128
+	.byte	0x3c
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xd8
+	.4byte	0x1011
+	.uleb128 0x11
+	.4byte	0xcb
+	.byte	0xf
+	.byte	0
+	.uleb128 0x12
+	.4byte	0x50
+	.4byte	0x1025
+	.uleb128 0x13
+	.4byte	0x1025
+	.uleb128 0x13
+	.4byte	0x962
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xf64
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x1011
+	.uleb128 0x12
+	.4byte	0x50
+	.4byte	0x104a
+	.uleb128 0x13
+	.4byte	0x1025
+	.uleb128 0x13
+	.4byte	0x128
+	.uleb128 0x13
+	.4byte	0x50
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x1031
+	.uleb128 0x12
+	.4byte	0x50
+	.4byte	0x105f
+	.uleb128 0x13
+	.4byte	0x1025
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x1050
+	.uleb128 0x26
+	.4byte	0x1070
+	.uleb128 0x13
+	.4byte	0x1025
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x1065
+	.uleb128 0x4
+	.4byte	.LASF322
+	.byte	0x17
+	.byte	0xbd
+	.4byte	0x1025
+	.uleb128 0xa
+	.4byte	0x90
+	.4byte	0x1091
+	.uleb128 0x11
+	.4byte	0xcb
+	.byte	0x5
+	.byte	0
+	.uleb128 0xc
+	.4byte	.LASF323
+	.byte	0x17
+	.2byte	0x1fd
+	.4byte	0xf45
+	.uleb128 0xc
+	.4byte	.LASF324
+	.byte	0x17
+	.2byte	0x1fe
+	.4byte	0xf45
+	.uleb128 0xc
+	.4byte	.LASF325
+	.byte	0x17
+	.2byte	0x200
+	.4byte	0xf45
+	.uleb128 0xc
+	.4byte	.LASF326
+	.byte	0x17
+	.2byte	0x205
+	.4byte	0xed7
+	.uleb128 0xc
+	.4byte	.LASF327
+	.byte	0x17
+	.2byte	0x206
+	.4byte	0xed7
+	.uleb128 0xa
+	.4byte	0xd8
+	.4byte	0x10dd
+	.uleb128 0x11
+	.4byte	0xcb
+	.byte	0x3f
+	.byte	0
+	.uleb128 0xc
+	.4byte	.LASF328
+	.byte	0x17
+	.2byte	0x207
+	.4byte	0x10cd
+	.uleb128 0xc
+	.4byte	.LASF329
+	.byte	0x17
+	.2byte	0x209
+	.4byte	0x1081
+	.uleb128 0xc
+	.4byte	.LASF330
+	.byte	0x17
+	.2byte	0x20a
+	.4byte	0x1081
+	.uleb128 0xc
+	.4byte	.LASF331
+	.byte	0x17
+	.2byte	0x20b
+	.4byte	0xf45
+	.uleb128 0xc
+	.4byte	.LASF332
+	.byte	0x17
+	.2byte	0x20c
+	.4byte	0xf45
+	.uleb128 0xc
+	.4byte	.LASF333
+	.byte	0x17
+	.2byte	0x20d
+	.4byte	0xf5e
+	.uleb128 0xa
+	.4byte	0xf5e
+	.4byte	0x1135
+	.uleb128 0x11
+	.4byte	0xcb
+	.byte	0x3
+	.byte	0
+	.uleb128 0xc
+	.4byte	.LASF334
+	.byte	0x17
+	.2byte	0x20e
+	.4byte	0x1125
+	.uleb128 0xc
+	.4byte	.LASF335
+	.byte	0x17
+	.2byte	0x20f
+	.4byte	0xf5e
+	.uleb128 0xc
+	.4byte	.LASF336
+	.byte	0x17
+	.2byte	0x210
+	.4byte	0x50
+	.uleb128 0xa
+	.4byte	0x9a
+	.4byte	0x1169
+	.uleb128 0x11
+	.4byte	0xcb
+	.byte	0x5
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x1159
+	.uleb128 0xc
+	.4byte	.LASF337
+	.byte	0x17
+	.2byte	0x211
+	.4byte	0x1169
+	.uleb128 0xc
+	.4byte	.LASF338
+	.byte	0x17
+	.2byte	0x212
+	.4byte	0x1169
+	.uleb128 0xc
+	.4byte	.LASF339
+	.byte	0x17
+	.2byte	0x216
+	.4byte	0xf1
+	.uleb128 0xc
+	.4byte	.LASF340
+	.byte	0x17
+	.2byte	0x217
+	.4byte	0xf1
+	.uleb128 0xc
+	.4byte	.LASF341
+	.byte	0x17
+	.2byte	0x219
+	.4byte	0x50
+	.uleb128 0xa
+	.4byte	0xd8
+	.4byte	0x11bb
+	.uleb128 0x17
+	.4byte	0xcb
+	.2byte	0x3ff
+	.byte	0
+	.uleb128 0xc
+	.4byte	.LASF342
+	.byte	0x17
+	.2byte	0x220
+	.4byte	0x11aa
+	.uleb128 0xc
+	.4byte	.LASF343
+	.byte	0x17
+	.2byte	0x222
+	.4byte	0x9f
+	.uleb128 0xc
+	.4byte	.LASF344
+	.byte	0x17
+	.2byte	0x224
+	.4byte	0x9f
+	.uleb128 0xc
+	.4byte	.LASF345
+	.byte	0x17
+	.2byte	0x230
+	.4byte	0xf45
+	.uleb128 0x27
+	.4byte	.LASF347
+	.byte	0x4
+	.4byte	0x7b
+	.byte	0x17
+	.2byte	0x286
+	.4byte	0x1215
+	.uleb128 0x22
+	.4byte	.LASF348
+	.byte	0
+	.uleb128 0x22
+	.4byte	.LASF349
+	.byte	0x1
+	.uleb128 0x22
+	.4byte	.LASF350
+	.byte	0x2
+	.uleb128 0x22
+	.4byte	.LASF351
+	.byte	0x3
+	.byte	0
+	.uleb128 0xc
+	.4byte	.LASF352
+	.byte	0x17
+	.2byte	0x28c
+	.4byte	0x11eb
+	.uleb128 0xd
+	.4byte	.LASF27
+	.byte	0x44
+	.byte	0x8
+	.byte	0xee
+	.4byte	0x12f9
+	.uleb128 0xe
+	.4byte	.LASF28
+	.byte	0x8
+	.byte	0xef
+	.4byte	0xeb
+	.byte	0
+	.uleb128 0xf
+	.ascii	"id\000"
+	.byte	0x8
+	.byte	0xf0
+	.4byte	0x980
+	.byte	0x4
+	.uleb128 0xe
+	.4byte	.LASF353
+	.byte	0x8
+	.byte	0xf1
+	.4byte	0x1450
+	.byte	0x8
+	.uleb128 0xe
+	.4byte	.LASF354
+	.byte	0x8
+	.byte	0xf2
+	.4byte	0x1465
+	.byte	0xc
+	.uleb128 0xe
+	.4byte	.LASF355
+	.byte	0x8
+	.byte	0xf3
+	.4byte	0x1465
+	.byte	0x10
+	.uleb128 0xe
+	.4byte	.LASF356
+	.byte	0x8
+	.byte	0xf4
+	.4byte	0x1465
+	.byte	0x14
+	.uleb128 0xe
+	.4byte	.LASF357
+	.byte	0x8
+	.byte	0xf5
+	.4byte	0x1465
+	.byte	0x18
+	.uleb128 0xe
+	.4byte	.LASF358
+	.byte	0x8
+	.byte	0xf6
+	.4byte	0x1465
+	.byte	0x1c
+	.uleb128 0xe
+	.4byte	.LASF359
+	.byte	0x8
+	.byte	0xf7
+	.4byte	0x1465
+	.byte	0x20
+	.uleb128 0xe
+	.4byte	.LASF360
+	.byte	0x8
+	.byte	0xf8
+	.4byte	0x1465
+	.byte	0x24
+	.uleb128 0xe
+	.4byte	.LASF361
+	.byte	0x8
+	.byte	0xf9
+	.4byte	0x1465
+	.byte	0x28
+	.uleb128 0xe
+	.4byte	.LASF362
+	.byte	0x8
+	.byte	0xfa
+	.4byte	0x50
+	.byte	0x2c
+	.uleb128 0xe
+	.4byte	.LASF363
+	.byte	0x8
+	.byte	0xfb
+	.4byte	0x50
+	.byte	0x30
+	.uleb128 0xe
+	.4byte	.LASF364
+	.byte	0x8
+	.byte	0xfc
+	.4byte	0x50
+	.byte	0x34
+	.uleb128 0xe
+	.4byte	.LASF365
+	.byte	0x8
+	.byte	0xfd
+	.4byte	0x50
+	.byte	0x38
+	.uleb128 0xf
+	.ascii	"ops\000"
+	.byte	0x8
+	.byte	0xfe
+	.4byte	0x256
+	.byte	0x3c
+	.uleb128 0xe
+	.4byte	.LASF42
+	.byte	0x8
+	.byte	0xff
+	.4byte	0x112
+	.byte	0x40
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x1221
+	.uleb128 0x2
+	.4byte	.LASF297
+	.byte	0x16
+	.byte	0xf
+	.4byte	0x9f
+	.uleb128 0xd
+	.4byte	.LASF366
+	.byte	0x10
+	.byte	0x16
+	.byte	0x19
+	.4byte	0x1346
+	.uleb128 0xe
+	.4byte	.LASF28
+	.byte	0x16
+	.byte	0x1a
+	.4byte	0xeb
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF367
+	.byte	0x16
+	.byte	0x1b
+	.4byte	0x50
+	.byte	0x4
+	.uleb128 0xe
+	.4byte	.LASF368
+	.byte	0x16
+	.byte	0x1c
+	.4byte	0x128
+	.byte	0x8
+	.uleb128 0xe
+	.4byte	.LASF47
+	.byte	0x16
+	.byte	0x1d
+	.4byte	0x1346
+	.byte	0xc
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x1309
+	.uleb128 0x28
+	.ascii	"gd\000"
+	.byte	0x16
+	.byte	0x57
+	.4byte	0x1356
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xef2
+	.uleb128 0x29
+	.4byte	.LASF428
+	.byte	0x4
+	.byte	0x19
+	.byte	0x33
+	.4byte	0x137e
+	.uleb128 0x2a
+	.ascii	"np\000"
+	.byte	0x19
+	.byte	0x34
+	.4byte	0x137e
+	.uleb128 0x2b
+	.4byte	.LASF369
+	.byte	0x19
+	.byte	0x35
+	.4byte	0xe4
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xec1
+	.uleb128 0x2
+	.4byte	.LASF370
+	.byte	0x19
+	.byte	0x36
+	.4byte	0x135c
+	.uleb128 0xc
+	.4byte	.LASF371
+	.byte	0x1a
+	.2byte	0x3ba
+	.4byte	0xfc
+	.uleb128 0xc
+	.4byte	.LASF372
+	.byte	0x1a
+	.2byte	0x3bb
+	.4byte	0xfc
+	.uleb128 0xc
+	.4byte	.LASF373
+	.byte	0x1a
+	.2byte	0x3bc
+	.4byte	0xfc
+	.uleb128 0xd
+	.4byte	.LASF374
+	.byte	0x4
+	.byte	0x1b
+	.byte	0xd
+	.4byte	0x13cc
+	.uleb128 0xf
+	.ascii	"pid\000"
+	.byte	0x1b
+	.byte	0xe
+	.4byte	0x50
+	.byte	0
+	.byte	0
+	.uleb128 0x4
+	.4byte	.LASF375
+	.byte	0x1b
+	.byte	0x11
+	.4byte	0x13d7
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x13b3
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x12f9
+	.uleb128 0xd
+	.4byte	.LASF36
+	.byte	0x18
+	.byte	0x1c
+	.byte	0x23
+	.4byte	0x1420
+	.uleb128 0xe
+	.4byte	.LASF35
+	.byte	0x1c
+	.byte	0x24
+	.4byte	0x128
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF376
+	.byte	0x1c
+	.byte	0x25
+	.4byte	0x154f
+	.byte	0x4
+	.uleb128 0xe
+	.4byte	.LASF377
+	.byte	0x1c
+	.byte	0x26
+	.4byte	0x283
+	.byte	0x8
+	.uleb128 0xe
+	.4byte	.LASF41
+	.byte	0x1c
+	.byte	0x27
+	.4byte	0x283
+	.byte	0x10
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x13e3
+	.uleb128 0xd
+	.4byte	.LASF378
+	.byte	0x8
+	.byte	0x8
+	.byte	0xb5
+	.4byte	0x144b
+	.uleb128 0xe
+	.4byte	.LASF379
+	.byte	0x8
+	.byte	0xb6
+	.4byte	0xd2
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF380
+	.byte	0x8
+	.byte	0xb7
+	.4byte	0xfc
+	.byte	0x4
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x1426
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x144b
+	.uleb128 0x12
+	.4byte	0x50
+	.4byte	0x1465
+	.uleb128 0x13
+	.4byte	0x250
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x1456
+	.uleb128 0xd
+	.4byte	.LASF381
+	.byte	0x48
+	.byte	0x1c
+	.byte	0x54
+	.4byte	0x154f
+	.uleb128 0xe
+	.4byte	.LASF28
+	.byte	0x1c
+	.byte	0x55
+	.4byte	0xd2
+	.byte	0
+	.uleb128 0xf
+	.ascii	"id\000"
+	.byte	0x1c
+	.byte	0x56
+	.4byte	0x980
+	.byte	0x4
+	.uleb128 0xe
+	.4byte	.LASF382
+	.byte	0x1c
+	.byte	0x57
+	.4byte	0x1465
+	.byte	0x8
+	.uleb128 0xe
+	.4byte	.LASF383
+	.byte	0x1c
+	.byte	0x58
+	.4byte	0x1465
+	.byte	0xc
+	.uleb128 0xe
+	.4byte	.LASF384
+	.byte	0x1c
+	.byte	0x59
+	.4byte	0x1465
+	.byte	0x10
+	.uleb128 0xe
+	.4byte	.LASF385
+	.byte	0x1c
+	.byte	0x5a
+	.4byte	0x1465
+	.byte	0x14
+	.uleb128 0xe
+	.4byte	.LASF386
+	.byte	0x1c
+	.byte	0x5b
+	.4byte	0x1465
+	.byte	0x18
+	.uleb128 0xe
+	.4byte	.LASF359
+	.byte	0x1c
+	.byte	0x5c
+	.4byte	0x1465
+	.byte	0x1c
+	.uleb128 0xe
+	.4byte	.LASF360
+	.byte	0x1c
+	.byte	0x5d
+	.4byte	0x1465
+	.byte	0x20
+	.uleb128 0xe
+	.4byte	.LASF316
+	.byte	0x1c
+	.byte	0x5e
+	.4byte	0x1564
+	.byte	0x24
+	.uleb128 0xe
+	.4byte	.LASF387
+	.byte	0x1c
+	.byte	0x5f
+	.4byte	0x1564
+	.byte	0x28
+	.uleb128 0xe
+	.4byte	.LASF362
+	.byte	0x1c
+	.byte	0x60
+	.4byte	0x50
+	.byte	0x2c
+	.uleb128 0xe
+	.4byte	.LASF388
+	.byte	0x1c
+	.byte	0x61
+	.4byte	0x50
+	.byte	0x30
+	.uleb128 0xe
+	.4byte	.LASF389
+	.byte	0x1c
+	.byte	0x62
+	.4byte	0x50
+	.byte	0x34
+	.uleb128 0xe
+	.4byte	.LASF364
+	.byte	0x1c
+	.byte	0x63
+	.4byte	0x50
+	.byte	0x38
+	.uleb128 0xe
+	.4byte	.LASF365
+	.byte	0x1c
+	.byte	0x64
+	.4byte	0x50
+	.byte	0x3c
+	.uleb128 0xf
+	.ascii	"ops\000"
+	.byte	0x1c
+	.byte	0x65
+	.4byte	0x256
+	.byte	0x40
+	.uleb128 0xe
+	.4byte	.LASF42
+	.byte	0x1c
+	.byte	0x66
+	.4byte	0x112
+	.byte	0x44
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x146b
+	.uleb128 0x12
+	.4byte	0x50
+	.4byte	0x1564
+	.uleb128 0x13
+	.4byte	0x1420
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x1555
+	.uleb128 0x4
+	.4byte	.LASF390
+	.byte	0x1d
+	.byte	0x49
+	.4byte	0x7b
+	.uleb128 0x21
+	.4byte	.LASF391
+	.byte	0x4
+	.4byte	0x7b
+	.byte	0x1e
+	.byte	0x14
+	.4byte	0x15b0
+	.uleb128 0x22
+	.4byte	.LASF392
+	.byte	0x1
+	.uleb128 0x22
+	.4byte	.LASF393
+	.byte	0x2
+	.uleb128 0x22
+	.4byte	.LASF394
+	.byte	0x4
+	.uleb128 0x22
+	.4byte	.LASF395
+	.byte	0x8
+	.uleb128 0x22
+	.4byte	.LASF396
+	.byte	0x10
+	.uleb128 0x22
+	.4byte	.LASF397
+	.byte	0x20
+	.uleb128 0x22
+	.4byte	.LASF398
+	.byte	0x40
+	.byte	0
+	.uleb128 0xd
+	.4byte	.LASF399
+	.byte	0x10
+	.byte	0x1e
+	.byte	0x57
+	.4byte	0x15ed
+	.uleb128 0xe
+	.4byte	.LASF400
+	.byte	0x1e
+	.byte	0x61
+	.4byte	0x1610
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF401
+	.byte	0x1e
+	.byte	0x6b
+	.4byte	0x1634
+	.byte	0x4
+	.uleb128 0xe
+	.4byte	.LASF402
+	.byte	0x1e
+	.byte	0x75
+	.4byte	0x1653
+	.byte	0x8
+	.uleb128 0xe
+	.4byte	.LASF403
+	.byte	0x1e
+	.byte	0x82
+	.4byte	0x1681
+	.byte	0xc
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x15b0
+	.uleb128 0x12
+	.4byte	0x50
+	.4byte	0x1610
+	.uleb128 0x13
+	.4byte	0x250
+	.uleb128 0x13
+	.4byte	0x50
+	.uleb128 0x13
+	.4byte	0x128
+	.uleb128 0x13
+	.4byte	0x50
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x15f2
+	.uleb128 0x12
+	.4byte	0x50
+	.4byte	0x1634
+	.uleb128 0x13
+	.4byte	0x250
+	.uleb128 0x13
+	.4byte	0x50
+	.uleb128 0x13
+	.4byte	0x256
+	.uleb128 0x13
+	.4byte	0x50
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x1616
+	.uleb128 0x12
+	.4byte	0x50
+	.4byte	0x1653
+	.uleb128 0x13
+	.4byte	0x250
+	.uleb128 0x13
+	.4byte	0x37
+	.uleb128 0x13
+	.4byte	0x128
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x163a
+	.uleb128 0x12
+	.4byte	0x50
+	.4byte	0x1681
+	.uleb128 0x13
+	.4byte	0x250
+	.uleb128 0x13
+	.4byte	0x50
+	.uleb128 0x13
+	.4byte	0x128
+	.uleb128 0x13
+	.4byte	0x50
+	.uleb128 0x13
+	.4byte	0x128
+	.uleb128 0x13
+	.4byte	0x50
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x1659
+	.uleb128 0xd
+	.4byte	.LASF404
+	.byte	0x8
+	.byte	0x1f
+	.byte	0x36
+	.4byte	0x16ac
+	.uleb128 0xe
+	.4byte	.LASF60
+	.byte	0x1f
+	.byte	0x37
+	.4byte	0x128
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF405
+	.byte	0x1f
+	.byte	0x38
+	.4byte	0x37
+	.byte	0x4
+	.byte	0
+	.uleb128 0x2c
+	.4byte	.LASF406
+	.byte	0x1
+	.byte	0xac
+	.4byte	0x15ed
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	rockchip_secure_otp_ops
+	.uleb128 0xa
+	.4byte	0x144b
+	.4byte	0x16cd
+	.uleb128 0x11
+	.4byte	0xcb
+	.byte	0x1
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x16bd
+	.uleb128 0x2c
+	.4byte	.LASF407
+	.byte	0x1
+	.byte	0xbd
+	.4byte	0x16cd
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	rockchip_otp_ids
+	.uleb128 0x2d
+	.4byte	.LASF408
+	.byte	0x1
+	.byte	0xc4
+	.4byte	0x1221
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	_u_boot_list_2_driver_2_rockchip_secure_otp_v2
+	.uleb128 0x2e
+	.4byte	.LASF409
+	.byte	0x1
+	.byte	0xb2
+	.4byte	0x50
+	.4byte	.LFB272
+	.4byte	.LFE272-.LFB272
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x1772
+	.uleb128 0x2f
+	.ascii	"dev\000"
+	.byte	0x1
+	.byte	0xb2
+	.4byte	0x250
+	.4byte	.LLST16
+	.uleb128 0x30
+	.ascii	"otp\000"
+	.byte	0x1
+	.byte	0xb4
+	.4byte	0x1772
+	.4byte	.LLST17
+	.uleb128 0x31
+	.4byte	.LVL28
+	.4byte	0x1c75
+	.4byte	0x173f
+	.uleb128 0x32
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x31
+	.4byte	.LVL31
+	.4byte	0x1c81
+	.4byte	0x1753
+	.uleb128 0x32
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x33
+	.4byte	.LVL32
+	.4byte	0x1c8c
+	.uleb128 0x32
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x32
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x32
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x1687
+	.uleb128 0x2e
+	.4byte	.LASF410
+	.byte	0x1
+	.byte	0x9c
+	.4byte	0x50
+	.4byte	.LFB271
+	.4byte	.LFE271-.LFB271
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x17c7
+	.uleb128 0x2f
+	.ascii	"dev\000"
+	.byte	0x1
+	.byte	0x9c
+	.4byte	0x250
+	.4byte	.LLST0
+	.uleb128 0x34
+	.4byte	.LASF411
+	.byte	0x1
+	.byte	0x9c
+	.4byte	0x37
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x35
+	.ascii	"buf\000"
+	.byte	0x1
+	.byte	0x9d
+	.4byte	0x128
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x36
+	.ascii	"ret\000"
+	.byte	0x1
+	.byte	0x9f
+	.4byte	0x50
+	.sleb128 -22
+	.byte	0
+	.uleb128 0x2e
+	.4byte	.LASF412
+	.byte	0x1
+	.byte	0x70
+	.4byte	0x50
+	.4byte	.LFB270
+	.4byte	.LFE270-.LFB270
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x1a06
+	.uleb128 0x2f
+	.ascii	"dev\000"
+	.byte	0x1
+	.byte	0x70
+	.4byte	0x250
+	.4byte	.LLST18
+	.uleb128 0x37
+	.4byte	.LASF413
+	.byte	0x1
+	.byte	0x70
+	.4byte	0x50
+	.4byte	.LLST19
+	.uleb128 0x2f
+	.ascii	"buf\000"
+	.byte	0x1
+	.byte	0x71
+	.4byte	0x256
+	.4byte	.LLST20
+	.uleb128 0x37
+	.4byte	.LASF51
+	.byte	0x1
+	.byte	0x71
+	.4byte	0x50
+	.4byte	.LLST21
+	.uleb128 0x30
+	.ascii	"otp\000"
+	.byte	0x1
+	.byte	0x73
+	.4byte	0x1772
+	.4byte	.LLST22
+	.uleb128 0x30
+	.ascii	"i\000"
+	.byte	0x1
+	.byte	0x74
+	.4byte	0x50
+	.4byte	.LLST23
+	.uleb128 0x38
+	.ascii	"n\000"
+	.byte	0x1
+	.byte	0x74
+	.4byte	0x50
+	.uleb128 0x30
+	.ascii	"ret\000"
+	.byte	0x1
+	.byte	0x74
+	.4byte	0x50
+	.4byte	.LLST24
+	.uleb128 0x2c
+	.4byte	.LASF380
+	.byte	0x1
+	.byte	0x75
+	.4byte	0xeb
+	.uleb128 0x1
+	.byte	0x5a
+	.uleb128 0x39
+	.4byte	.LASF414
+	.byte	0x1
+	.byte	0x76
+	.4byte	0xeb
+	.4byte	.LLST25
+	.uleb128 0x3a
+	.4byte	.LBB33
+	.4byte	.LBE33-.LBB33
+	.4byte	0x1889
+	.uleb128 0x30
+	.ascii	"__v\000"
+	.byte	0x1
+	.byte	0x8c
+	.4byte	0x9f
+	.4byte	.LLST26
+	.byte	0
+	.uleb128 0x3a
+	.4byte	.LBB48
+	.4byte	.LBE48-.LBB48
+	.4byte	0x18a6
+	.uleb128 0x30
+	.ascii	"__v\000"
+	.byte	0x1
+	.byte	0x91
+	.4byte	0x9f
+	.4byte	.LLST38
+	.byte	0
+	.uleb128 0x3a
+	.4byte	.LBB45
+	.4byte	.LBE45-.LBB45
+	.4byte	0x18c3
+	.uleb128 0x30
+	.ascii	"__v\000"
+	.byte	0x1
+	.byte	0x97
+	.4byte	0x9f
+	.4byte	.LLST37
+	.byte	0
+	.uleb128 0x3b
+	.4byte	0x1a06
+	.4byte	.LBB34
+	.4byte	.Ldebug_ranges0+0x18
+	.byte	0x1
+	.byte	0x8f
+	.4byte	0x19a4
+	.uleb128 0x3c
+	.4byte	0x1a16
+	.uleb128 0x3d
+	.4byte	0x1a37
+	.4byte	.LLST27
+	.uleb128 0x3d
+	.4byte	0x1a2c
+	.4byte	.LLST28
+	.uleb128 0x3d
+	.4byte	0x1a21
+	.4byte	.LLST29
+	.uleb128 0x3e
+	.4byte	.Ldebug_ranges0+0x18
+	.uleb128 0x3f
+	.4byte	0x1a40
+	.4byte	.LLST30
+	.uleb128 0x3f
+	.4byte	0x1a4b
+	.4byte	.LLST31
+	.uleb128 0x40
+	.4byte	.Ldebug_ranges0+0x40
+	.4byte	0x1920
+	.uleb128 0x3f
+	.4byte	0x1a8e
+	.4byte	.LLST32
+	.byte	0
+	.uleb128 0x3a
+	.4byte	.LBB37
+	.4byte	.LBE37-.LBB37
+	.4byte	0x1937
+	.uleb128 0x3f
+	.4byte	0x1a5b
+	.4byte	.LLST33
+	.byte	0
+	.uleb128 0x3a
+	.4byte	.LBB38
+	.4byte	.LBE38-.LBB38
+	.4byte	0x194e
+	.uleb128 0x3f
+	.4byte	0x1a6c
+	.4byte	.LLST34
+	.byte	0
+	.uleb128 0x3a
+	.4byte	.LBB39
+	.4byte	.LBE39-.LBB39
+	.4byte	0x1965
+	.uleb128 0x3f
+	.4byte	0x1a7d
+	.4byte	.LLST35
+	.byte	0
+	.uleb128 0x3a
+	.4byte	.LBB41
+	.4byte	.LBE41-.LBB41
+	.4byte	0x197c
+	.uleb128 0x3f
+	.4byte	0x1a9b
+	.4byte	.LLST36
+	.byte	0
+	.uleb128 0x31
+	.4byte	.LVL57
+	.4byte	0x1c97
+	.4byte	0x1993
+	.uleb128 0x32
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC0
+	.byte	0
+	.uleb128 0x33
+	.4byte	.LVL70
+	.4byte	0x1ca2
+	.uleb128 0x32
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x31
+	.4byte	.LVL35
+	.4byte	0x1c75
+	.4byte	0x19b8
+	.uleb128 0x32
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x31
+	.4byte	.LVL38
+	.4byte	0x1cad
+	.4byte	0x19cc
+	.uleb128 0x32
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.uleb128 0x31
+	.4byte	.LVL42
+	.4byte	0x1aa8
+	.4byte	0x19f2
+	.uleb128 0x32
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x32
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x32
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x32
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.uleb128 0x33
+	.4byte	.LVL54
+	.4byte	0x1c97
+	.uleb128 0x32
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC2
+	.byte	0
+	.byte	0
+	.uleb128 0x41
+	.4byte	.LASF429
+	.byte	0x1
+	.byte	0x47
+	.4byte	0x50
+	.byte	0x1
+	.4byte	0x1aa8
+	.uleb128 0x42
+	.ascii	"otp\000"
+	.byte	0x1
+	.byte	0x47
+	.4byte	0x1772
+	.uleb128 0x43
+	.4byte	.LASF413
+	.byte	0x1
+	.byte	0x48
+	.4byte	0x50
+	.uleb128 0x43
+	.4byte	.LASF380
+	.byte	0x1
+	.byte	0x48
+	.4byte	0x90
+	.uleb128 0x42
+	.ascii	"i\000"
+	.byte	0x1
+	.byte	0x48
+	.4byte	0x50
+	.uleb128 0x44
+	.4byte	.LASF415
+	.byte	0x1
+	.byte	0x4a
+	.4byte	0x50
+	.uleb128 0x44
+	.4byte	.LASF416
+	.byte	0x1
+	.byte	0x4b
+	.4byte	0x9f
+	.uleb128 0x45
+	.4byte	0x1a67
+	.uleb128 0x38
+	.ascii	"__v\000"
+	.byte	0x1
+	.byte	0x5c
+	.4byte	0x9f
+	.byte	0
+	.uleb128 0x45
+	.4byte	0x1a78
+	.uleb128 0x38
+	.ascii	"__v\000"
+	.byte	0x1
+	.byte	0x5d
+	.4byte	0x9f
+	.byte	0
+	.uleb128 0x45
+	.4byte	0x1a89
+	.uleb128 0x38
+	.ascii	"__v\000"
+	.byte	0x1
+	.byte	0x5e
+	.4byte	0x9f
+	.byte	0
+	.uleb128 0x45
+	.4byte	0x1a9a
+	.uleb128 0x38
+	.ascii	"__v\000"
+	.byte	0x1
+	.byte	0x5f
+	.4byte	0x9f
+	.byte	0
+	.uleb128 0x46
+	.uleb128 0x38
+	.ascii	"__v\000"
+	.byte	0x1
+	.byte	0x62
+	.4byte	0x9f
+	.byte	0
+	.byte	0
+	.uleb128 0x2e
+	.4byte	.LASF417
+	.byte	0x1
+	.byte	0xf
+	.4byte	0x50
+	.4byte	.LFB268
+	.4byte	.LFE268-.LFB268
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x1c5b
+	.uleb128 0x2f
+	.ascii	"dev\000"
+	.byte	0x1
+	.byte	0xf
+	.4byte	0x250
+	.4byte	.LLST1
+	.uleb128 0x37
+	.4byte	.LASF413
+	.byte	0x1
+	.byte	0xf
+	.4byte	0x50
+	.4byte	.LLST2
+	.uleb128 0x2f
+	.ascii	"buf\000"
+	.byte	0x1
+	.byte	0x10
+	.4byte	0x128
+	.4byte	.LLST3
+	.uleb128 0x37
+	.4byte	.LASF51
+	.byte	0x1
+	.byte	0x10
+	.4byte	0x50
+	.4byte	.LLST4
+	.uleb128 0x30
+	.ascii	"otp\000"
+	.byte	0x1
+	.byte	0x12
+	.4byte	0x1772
+	.4byte	.LLST5
+	.uleb128 0x30
+	.ascii	"i\000"
+	.byte	0x1
+	.byte	0x13
+	.4byte	0x50
+	.4byte	.LLST6
+	.uleb128 0x39
+	.4byte	.LASF415
+	.byte	0x1
+	.byte	0x13
+	.4byte	0x50
+	.4byte	.LLST7
+	.uleb128 0x30
+	.ascii	"n\000"
+	.byte	0x1
+	.byte	0x13
+	.4byte	0x50
+	.4byte	.LLST8
+	.uleb128 0x30
+	.ascii	"ret\000"
+	.byte	0x1
+	.byte	0x13
+	.4byte	0x50
+	.4byte	.LLST9
+	.uleb128 0x39
+	.4byte	.LASF380
+	.byte	0x1
+	.byte	0x14
+	.4byte	0xeb
+	.4byte	.LLST10
+	.uleb128 0x39
+	.4byte	.LASF416
+	.byte	0x1
+	.byte	0x15
+	.4byte	0x9f
+	.4byte	.LLST11
+	.uleb128 0x39
+	.4byte	.LASF418
+	.byte	0x1
+	.byte	0x16
+	.4byte	0x50
+	.4byte	.LLST12
+	.uleb128 0x47
+	.ascii	"out\000"
+	.byte	0x1
+	.byte	0x40
+	.4byte	.L9
+	.uleb128 0x3a
+	.4byte	.LBB16
+	.4byte	.LBE16-.LBB16
+	.4byte	0x1b96
+	.uleb128 0x48
+	.ascii	"__v\000"
+	.byte	0x1
+	.byte	0x19
+	.4byte	0x9f
+	.byte	0
+	.byte	0
+	.uleb128 0x3a
+	.4byte	.LBB19
+	.4byte	.LBE19-.LBB19
+	.4byte	0x1bb3
+	.uleb128 0x30
+	.ascii	"__v\000"
+	.byte	0x1
+	.byte	0x2c
+	.4byte	0x9f
+	.4byte	.LLST14
+	.byte	0
+	.uleb128 0x40
+	.4byte	.Ldebug_ranges0+0
+	.4byte	0x1bc9
+	.uleb128 0x48
+	.ascii	"__v\000"
+	.byte	0x1
+	.byte	0x2d
+	.4byte	0x9f
+	.byte	0x1
+	.byte	0
+	.uleb128 0x3a
+	.4byte	.LBB21
+	.4byte	.LBE21-.LBB21
+	.4byte	0x1be6
+	.uleb128 0x30
+	.ascii	"__v\000"
+	.byte	0x1
+	.byte	0x30
+	.4byte	0x9f
+	.4byte	.LLST15
+	.byte	0
+	.uleb128 0x3a
+	.4byte	.LBB22
+	.4byte	.LBE22-.LBB22
+	.4byte	0x1c01
+	.uleb128 0x49
+	.ascii	"__v\000"
+	.byte	0x1
+	.byte	0x3d
+	.4byte	0x9f
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0
+	.uleb128 0x3a
+	.4byte	.LBB18
+	.4byte	.LBE18-.LBB18
+	.4byte	0x1c1e
+	.uleb128 0x30
+	.ascii	"__v\000"
+	.byte	0x1
+	.byte	0x42
+	.4byte	0x9f
+	.4byte	.LLST13
+	.byte	0
+	.uleb128 0x31
+	.4byte	.LVL3
+	.4byte	0x1c75
+	.4byte	0x1c33
+	.uleb128 0x32
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0
+	.uleb128 0x31
+	.4byte	.LVL13
+	.4byte	0x1c97
+	.4byte	0x1c4a
+	.uleb128 0x32
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC0
+	.byte	0
+	.uleb128 0x33
+	.4byte	.LVL21
+	.4byte	0x1ca2
+	.uleb128 0x32
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x4a
+	.4byte	.LASF430
+	.byte	0x1a
+	.2byte	0x36f
+	.byte	0x3
+	.4byte	0x1c75
+	.uleb128 0x4b
+	.ascii	"ptr\000"
+	.byte	0x1a
+	.2byte	0x36f
+	.4byte	0x128
+	.byte	0
+	.uleb128 0x4c
+	.4byte	.LASF419
+	.4byte	.LASF419
+	.byte	0x8
+	.2byte	0x112
+	.uleb128 0x4d
+	.4byte	.LASF420
+	.4byte	.LASF420
+	.byte	0x20
+	.byte	0x85
+	.uleb128 0x4d
+	.4byte	.LASF421
+	.4byte	.LASF421
+	.byte	0x20
+	.byte	0x38
+	.uleb128 0x4d
+	.4byte	.LASF422
+	.4byte	.LASF422
+	.byte	0x21
+	.byte	0x13
+	.uleb128 0x4d
+	.4byte	.LASF423
+	.4byte	.LASF423
+	.byte	0x22
+	.byte	0xb
+	.uleb128 0x4c
+	.4byte	.LASF424
+	.4byte	.LASF424
+	.byte	0x1a
+	.2byte	0x393
+	.byte	0
+	.section	.debug_abbrev,"",%progbits
+.Ldebug_abbrev0:
+	.uleb128 0x1
+	.uleb128 0x11
+	.byte	0x1
+	.uleb128 0x25
+	.uleb128 0xe
+	.uleb128 0x13
+	.uleb128 0xb
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x1b
+	.uleb128 0xe
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x10
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x2
+	.uleb128 0x16
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x24
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3e
+	.uleb128 0xb
+	.uleb128 0x3
+	.uleb128 0xe
+	.byte	0
+	.byte	0
+	.uleb128 0x4
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.byte	0
+	.byte	0
+	.uleb128 0x5
+	.uleb128 0x24
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3e
+	.uleb128 0xb
+	.uleb128 0x3
+	.uleb128 0x8
+	.byte	0
+	.byte	0
+	.uleb128 0x6
+	.uleb128 0x16
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x7
+	.uleb128 0x26
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.uleb128 0xf
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x9
+	.uleb128 0xf
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0xa
+	.uleb128 0x1
+	.byte	0x1
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0x21
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0xc
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.byte	0
+	.byte	0
+	.uleb128 0xd
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0xe
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0xf
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x10
+	.uleb128 0x26
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x11
+	.uleb128 0x21
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2f
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x12
+	.uleb128 0x15
+	.byte	0x1
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x13
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x14
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0xb
+	.uleb128 0x5
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x15
+	.uleb128 0xd
+	.byte	0
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+	.uleb128 0xb
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+	.uleb128 0x3c
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+	.uleb128 0xd
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+	.uleb128 0xd
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+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0xb
+	.byte	0
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+	.uleb128 0x13
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+	.uleb128 0x1
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+	.uleb128 0x4
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+	.uleb128 0xe
+	.uleb128 0xb
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+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
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+	.byte	0
+	.byte	0
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+	.uleb128 0x28
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+	.uleb128 0x4
+	.byte	0x1
+	.uleb128 0xb
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+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
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+	.byte	0
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+	.uleb128 0x35
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x26
+	.uleb128 0x15
+	.byte	0x1
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x1
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+	.byte	0
+	.byte	0
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+	.uleb128 0x4
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0xb
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+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x1
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+	.byte	0
+	.byte	0
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+	.uleb128 0x34
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+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3f
+	.uleb128 0x19
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+	.uleb128 0xb
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+	.byte	0
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+	.uleb128 0xd
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+	.uleb128 0x3
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+	.uleb128 0xb
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+	.byte	0
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+	.uleb128 0xd
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+	.uleb128 0x34
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+	.uleb128 0x3
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+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
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+	.uleb128 0x2
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+	.uleb128 0x2e
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+	.uleb128 0x11
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+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
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+	.byte	0
+	.byte	0
+	.uleb128 0x2f
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
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+	.uleb128 0xb
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+	.byte	0
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+	.uleb128 0x30
+	.uleb128 0x34
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+	.uleb128 0x3
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+	.uleb128 0x4109
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+	.uleb128 0x1
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+	.uleb128 0x32
+	.uleb128 0x410a
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+	.uleb128 0x18
+	.uleb128 0x2111
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+	.uleb128 0x4109
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+	.uleb128 0x3e
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+	.uleb128 0x2e
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+	.uleb128 0x3b
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+	.uleb128 0xb
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+	.byte	0
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+	.uleb128 0x34
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+	.uleb128 0x3
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+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
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+	.uleb128 0x4a
+	.uleb128 0x2e
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+	.uleb128 0x3
+	.uleb128 0xe
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+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
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+	.uleb128 0x19
+	.uleb128 0x20
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
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+	.uleb128 0x4b
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x4c
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x4d
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.byte	0
+	.section	.debug_loc,"",%progbits
+.Ldebug_loc0:
+.LLST16:
+	.4byte	.LVL27
+	.4byte	.LVL28-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL28-1
+	.4byte	.LVL33
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL33
+	.4byte	.LFE272
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST17:
+	.4byte	.LVL29
+	.4byte	.LVL30
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL30
+	.4byte	.LVL33
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST0:
+	.4byte	.LVL0
+	.4byte	.LVL1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1
+	.4byte	.LFE271
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST18:
+	.4byte	.LVL34
+	.4byte	.LVL35-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL35-1
+	.4byte	.LVL39
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL39
+	.4byte	.LVL40
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL40
+	.4byte	.LVL43
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL43
+	.4byte	.LFE270
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST19:
+	.4byte	.LVL34
+	.4byte	.LVL35-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL35-1
+	.4byte	.LFE270
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST20:
+	.4byte	.LVL34
+	.4byte	.LVL35-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL35-1
+	.4byte	.LFE270
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST21:
+	.4byte	.LVL34
+	.4byte	.LVL35-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL35-1
+	.4byte	.LFE270
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST22:
+	.4byte	.LVL36
+	.4byte	.LVL37
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL37
+	.4byte	.LFE270
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST23:
+	.4byte	.LVL44
+	.4byte	.LVL45
+	.2byte	0x6
+	.byte	0x73
+	.sleb128 0
+	.byte	0x76
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL49
+	.4byte	.LVL51
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL51
+	.4byte	.LVL52
+	.2byte	0x6
+	.byte	0x73
+	.sleb128 0
+	.byte	0x76
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL52
+	.4byte	.LVL54-1
+	.2byte	0x7
+	.byte	0x76
+	.sleb128 0
+	.byte	0x20
+	.byte	0x73
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.4byte	.LVL55
+	.4byte	.LFE270
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST24:
+	.4byte	.LVL42
+	.4byte	.LVL49
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL49
+	.4byte	.LVL51
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL51
+	.4byte	.LVL53
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL53
+	.4byte	.LFE270
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST25:
+	.4byte	.LVL38
+	.4byte	.LVL39
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL40
+	.4byte	.LVL41
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL41
+	.4byte	.LVL48
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL51
+	.4byte	.LVL55
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST26:
+	.4byte	.LVL46
+	.4byte	.LVL51
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL55
+	.4byte	.LFE270
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST38:
+	.4byte	.LVL58
+	.4byte	.LVL59
+	.2byte	0x3
+	.byte	0x8
+	.byte	0xff
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST37:
+	.4byte	.LVL50
+	.4byte	.LVL51
+	.2byte	0x3
+	.byte	0x8
+	.byte	0xff
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST27:
+	.4byte	.LVL56
+	.4byte	.LVL71
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST28:
+	.4byte	.LVL56
+	.4byte	.LVL57-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL59
+	.4byte	.LVL65
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST29:
+	.4byte	.LVL56
+	.4byte	.LVL71
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST30:
+	.4byte	.LVL65
+	.4byte	.LVL68
+	.2byte	0x3
+	.byte	0x7b
+	.sleb128 -2
+	.byte	0x9f
+	.4byte	.LVL68
+	.4byte	.LVL69
+	.2byte	0x3
+	.byte	0x7b
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL69
+	.4byte	.LVL71
+	.2byte	0x3
+	.byte	0x7b
+	.sleb128 -2
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST31:
+	.4byte	.LVL67
+	.4byte	.LVL70-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST32:
+	.4byte	.LVL64
+	.4byte	.LVL71
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST33:
+	.4byte	.LVL60
+	.4byte	.LVL62
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL62
+	.4byte	.LVL63
+	.2byte	0x5
+	.byte	0x74
+	.sleb128 0
+	.byte	0x6
+	.byte	0x23
+	.uleb128 0x34
+	.4byte	.LVL63
+	.4byte	.LVL71
+	.2byte	0x8
+	.byte	0x75
+	.sleb128 0
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x33
+	.byte	0x24
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST34:
+	.4byte	.LVL61
+	.4byte	.LVL71
+	.2byte	0x2
+	.byte	0x37
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST35:
+	.4byte	.LVL63
+	.4byte	.LVL65
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST36:
+	.4byte	.LVL66
+	.4byte	.LVL70-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST1:
+	.4byte	.LVL2
+	.4byte	.LVL3-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL3-1
+	.4byte	.LFE268
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST2:
+	.4byte	.LVL2
+	.4byte	.LVL3-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL3-1
+	.4byte	.LFE268
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST3:
+	.4byte	.LVL2
+	.4byte	.LVL3-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL3-1
+	.4byte	.LVL6
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL6
+	.4byte	.LVL7
+	.2byte	0x3
+	.byte	0x76
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL7
+	.4byte	.LFE268
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST4:
+	.4byte	.LVL2
+	.4byte	.LVL3-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL3-1
+	.4byte	.LFE268
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST5:
+	.4byte	.LVL4
+	.4byte	.LVL7
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL7
+	.4byte	.LFE268
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST6:
+	.4byte	.LVL7
+	.4byte	.LVL25
+	.2byte	0x6
+	.byte	0x74
+	.sleb128 0
+	.byte	0x78
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL25
+	.4byte	.LVL26
+	.2byte	0x8
+	.byte	0x74
+	.sleb128 0
+	.byte	0x78
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x9f
+	.4byte	.LVL26
+	.4byte	.LFE268
+	.2byte	0x6
+	.byte	0x74
+	.sleb128 0
+	.byte	0x78
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST7:
+	.4byte	.LVL16
+	.4byte	.LVL19
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 -2
+	.byte	0x9f
+	.4byte	.LVL19
+	.4byte	.LVL20
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL20
+	.4byte	.LFE268
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 -2
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST8:
+	.4byte	.LVL4
+	.4byte	.LVL5
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL10
+	.4byte	.LVL11
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST9:
+	.4byte	.LVL4
+	.4byte	.LVL9
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL9
+	.4byte	.LVL10
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL10
+	.4byte	.LVL12
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL12
+	.4byte	.LFE268
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST10:
+	.4byte	.LVL4
+	.4byte	.LVL6
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL6
+	.4byte	.LVL7
+	.2byte	0x3
+	.byte	0x76
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL7
+	.4byte	.LFE268
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST11:
+	.4byte	.LVL18
+	.4byte	.LVL21-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL22
+	.4byte	.LVL23
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST12:
+	.4byte	.LVL8
+	.4byte	.LVL10
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL12
+	.4byte	.LVL26
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL26
+	.4byte	.LFE268
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST14:
+	.4byte	.LVL14
+	.4byte	.LVL26
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL26
+	.4byte	.LFE268
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST15:
+	.4byte	.LVL17
+	.4byte	.LVL21-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL22
+	.4byte	.LVL23
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST13:
+	.4byte	.LVL11
+	.4byte	.LVL12
+	.2byte	0x3
+	.byte	0x8
+	.byte	0xff
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+	.section	.debug_aranges,"",%progbits
+	.4byte	0x34
+	.2byte	0x2
+	.4byte	.Ldebug_info0
+	.byte	0x4
+	.byte	0
+	.2byte	0
+	.2byte	0
+	.4byte	.LFB271
+	.4byte	.LFE271-.LFB271
+	.4byte	.LFB268
+	.4byte	.LFE268-.LFB268
+	.4byte	.LFB272
+	.4byte	.LFE272-.LFB272
+	.4byte	.LFB270
+	.4byte	.LFE270-.LFB270
+	.4byte	0
+	.4byte	0
+	.section	.debug_ranges,"",%progbits
+.Ldebug_ranges0:
+	.4byte	.LBB17
+	.4byte	.LBE17
+	.4byte	.LBB20
+	.4byte	.LBE20
+	.4byte	0
+	.4byte	0
+	.4byte	.LBB34
+	.4byte	.LBE34
+	.4byte	.LBB46
+	.4byte	.LBE46
+	.4byte	.LBB47
+	.4byte	.LBE47
+	.4byte	.LBB49
+	.4byte	.LBE49
+	.4byte	0
+	.4byte	0
+	.4byte	.LBB36
+	.4byte	.LBE36
+	.4byte	.LBB40
+	.4byte	.LBE40
+	.4byte	0
+	.4byte	0
+	.4byte	.LFB271
+	.4byte	.LFE271
+	.4byte	.LFB268
+	.4byte	.LFE268
+	.4byte	.LFB272
+	.4byte	.LFE272
+	.4byte	.LFB270
+	.4byte	.LFE270
+	.4byte	0
+	.4byte	0
+	.section	.debug_line,"",%progbits
+.Ldebug_line0:
+	.section	.debug_str,"MS",%progbits,1
+.LASF30:
+	.ascii	"parent_platdata\000"
+.LASF100:
+	.ascii	"off_mem_rsvmap\000"
+.LASF183:
+	.ascii	"UCLASS_I2C_EEPROM\000"
+.LASF303:
+	.ascii	"jt_funcs\000"
+.LASF188:
+	.ascii	"UCLASS_IRQ\000"
+.LASF150:
+	.ascii	"initrd_start\000"
+.LASF182:
+	.ascii	"UCLASS_I2C\000"
+.LASF13:
+	.ascii	"sizetype\000"
+.LASF327:
+	.ascii	"net_hostname\000"
+.LASF54:
+	.ascii	"start\000"
+.LASF222:
+	.ascii	"UCLASS_SPI\000"
+.LASF300:
+	.ascii	"child\000"
+.LASF186:
+	.ascii	"UCLASS_I2S\000"
+.LASF349:
+	.ascii	"NETLOOP_RESTART\000"
+.LASF184:
+	.ascii	"UCLASS_I2C_GENERIC\000"
+.LASF196:
+	.ascii	"UCLASS_MOD_EXP\000"
+.LASF245:
+	.ascii	"UCLASS_IO_DOMAIN\000"
+.LASF257:
+	.ascii	"using_pre_serial\000"
+.LASF37:
+	.ascii	"uclass_priv\000"
+.LASF217:
+	.ascii	"UCLASS_RKNAND\000"
+.LASF159:
+	.ascii	"UCLASS_DEMO\000"
+.LASF395:
+	.ascii	"OTP_S\000"
+.LASF108:
+	.ascii	"ih_magic\000"
+.LASF46:
+	.ascii	"list_head\000"
+.LASF360:
+	.ascii	"child_pre_probe\000"
+.LASF292:
+	.ascii	"pm_ctx_phys\000"
+.LASF163:
+	.ascii	"UCLASS_TEST_PROBE\000"
+.LASF298:
+	.ascii	"full_name\000"
+.LASF241:
+	.ascii	"UCLASS_KEY\000"
+.LASF80:
+	.ascii	"bi_intfreq\000"
+.LASF11:
+	.ascii	"phys_addr_t\000"
+.LASF401:
+	.ascii	"write\000"
+.LASF236:
+	.ascii	"UCLASS_VIDEO_BRIDGE\000"
+.LASF5:
+	.ascii	"__u8\000"
+.LASF348:
+	.ascii	"NETLOOP_CONTINUE\000"
+.LASF225:
+	.ascii	"UCLASS_SPI_GENERIC\000"
+.LASF288:
+	.ascii	"malloc_base\000"
+.LASF420:
+	.ascii	"dev_read_addr_ptr\000"
+.LASF56:
+	.ascii	"flash_info_t\000"
+.LASF201:
+	.ascii	"UCLASS_PANEL\000"
+.LASF125:
+	.ascii	"comp\000"
+.LASF120:
+	.ascii	"image_header_t\000"
+.LASF155:
+	.ascii	"state\000"
+.LASF176:
+	.ascii	"UCLASS_CROS_EC\000"
+.LASF74:
+	.ascii	"bi_dsp_freq\000"
+.LASF407:
+	.ascii	"rockchip_otp_ids\000"
+.LASF122:
+	.ascii	"image_start\000"
+.LASF161:
+	.ascii	"UCLASS_TEST_FDT\000"
+.LASF65:
+	.ascii	"bd_info\000"
+.LASF346:
+	.ascii	"uclass_id\000"
+.LASF112:
+	.ascii	"ih_load\000"
+.LASF393:
+	.ascii	"DECOM_GZIP\000"
+.LASF307:
+	.ascii	"__dtb_dt_spl_begin\000"
+.LASF386:
+	.ascii	"pre_remove\000"
+.LASF7:
+	.ascii	"__u32\000"
+.LASF35:
+	.ascii	"priv\000"
+.LASF291:
+	.ascii	"cur_serial_dev\000"
+.LASF333:
+	.ascii	"net_tx_packet\000"
+.LASF240:
+	.ascii	"UCLASS_FG\000"
+.LASF332:
+	.ascii	"net_server_ip\000"
+.LASF428:
+	.ascii	"ofnode_union\000"
+.LASF340:
+	.ascii	"net_native_vlan\000"
+.LASF238:
+	.ascii	"UCLASS_VIDEO_CRTC\000"
+.LASF175:
+	.ascii	"UCLASS_CODEC\000"
+.LASF285:
+	.ascii	"env_buf\000"
+.LASF429:
+	.ascii	"rockchip_secure_otp_write_byte\000"
+.LASF21:
+	.ascii	"errno\000"
+.LASF15:
+	.ascii	"long int\000"
+.LASF390:
+	.ascii	"__invalid_size_argument_for_IOC\000"
+.LASF69:
+	.ascii	"bi_flashsize\000"
+.LASF29:
+	.ascii	"platdata\000"
+.LASF206:
+	.ascii	"UCLASS_PHY\000"
+.LASF93:
+	.ascii	"IRQ_STACK_START_IN\000"
+.LASF104:
+	.ascii	"size_dt_strings\000"
+.LASF235:
+	.ascii	"UCLASS_VIDEO\000"
+.LASF408:
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+.LASF255:
+	.ascii	"tlb_size\000"
+.LASF141:
+	.ascii	"fit_uname_fdt\000"
+	.ident	"GCC: (Linaro GCC 6.3-2017.05) 6.3.1 20170404"
+	.section	.note.GNU-stack,"",%progbits
diff --git a/include/rockchip-otp-v2.h b/include/rockchip-otp-v2.h
new file mode 100644
index 0000000000..4fc143cc55
--- /dev/null
+++ b/include/rockchip-otp-v2.h
@@ -0,0 +1,60 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _ROCKCHIP_OTP_V2_H_
+#define _ROCKCHIP_OTP_V2_H_
+
+#define NVM_CEB			0x00
+#define NVM_RSTB		0x04
+#define NVM_TCSRST		0x08
+#define NVM_TCEW		0x0c
+#define NVM_TRW			0x10
+#define NVM_TRS			0x14
+#define NVM_ST			0x18
+#define NVM_RADDR		0x1c
+#define NVM_RSTART		0x20
+#define NVM_RDATA		0x24
+#define NVM_TRWH		0x28
+#define NVM_TREW		0x2c
+#define NVM_READ_ST		0x30
+#define NVM_PRADDR		0x34
+#define NVM_PRLEN		0x38
+#define NVM_PRDATA		0x3c
+#define NVM_FAILTIME		0x40
+#define NVM_PRSTART		0x44
+#define NVM_PRSTATE		0x48
+#define NVM_PRSUCCESS		0x4c
+#define NVM_TAS			0x50
+#define NVM_TWWL		0x54
+#define NVM_TDLEH		0x58
+#define NVM_TDPD		0x5c
+#define NVM_TPES		0x60
+#define NVM_TCPS		0x64
+#define NVM_TPW			0x68
+#define NVM_TCPH		0x6c
+#define NVM_TPEH		0x70
+#define NVM_TPTPD		0x74
+#define NVM_TPGMAS		0x78
+#define OTPC_INT_ST		0x7c
+#define NVM_INT_EN		0x80
+#define OTP_PROG_MASK_BASE	0x0200
+#define OTP_READ_MASK_BASE	0x0300
+#define OTP_MASK_BYPASS		0x0400
+#define OTP_MASK_INT_CON	0x0404
+#define OTP_MASK_INT_STATUS	0x0408
+#define OTP_MASK_STATUS		0x040C
+#define OTP_MASK_PROG_LOCK	0x0410
+#define OTP_MASK_READ_LOCK	0x0414
+#define OTP_MASK_BYPASS_LOCK	0x0418
+#define OTP_SLICE_LOCK		0x041c
+#define OTP_SLICE		0x0420
+
+struct rockchip_otp_v2_platdata {
+	void __iomem *base;
+	unsigned long secure_conf_base;
+};
+
+#endif
+

commit 5b7d32987c5cc08642f650c149fa2ee28f40e242
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Apr 20 15:07:10 2020 +0800

    drivers: misc: use misc_mode to distinguish different device
    
    The misc attach different device. We use the misc_mode to show
    different device's capability.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ibce5bb0465e452a7e783c5859f1e8ab2bfd8b0c5

diff --git a/common/spl/spl_rkfw.c b/common/spl/spl_rkfw.c
index e7fbe662ef..b441949eb8 100644
--- a/common/spl/spl_rkfw.c
+++ b/common/spl/spl_rkfw.c
@@ -7,6 +7,7 @@
 #include <android_image.h>
 #include <errno.h>
 #include <malloc.h>
+#include <misc.h>
 #include <misc_decompress.h>
 #include <spl.h>
 #include <spl_rkfw.h>
@@ -343,7 +344,7 @@ static int rkfw_load_kernel(struct spl_load_info *info, u32 image_sector,
 	}
 #ifdef CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS
 	struct udevice *dev;
-	u32 cap = GZIP_MOD;
+	u32 cap = DECOM_GZIP;
 
 	dev = misc_decompress_get_device(cap);
 
diff --git a/drivers/misc/misc_decompress.c b/drivers/misc/misc_decompress.c
index 1cfcf248e0..a45cb5c9ad 100644
--- a/drivers/misc/misc_decompress.c
+++ b/drivers/misc/misc_decompress.c
@@ -79,7 +79,7 @@ int misc_decompress_start(struct udevice *dev, unsigned long src,
 	param.addr_src = src;
 	param.size = size;
 	if (misc_gzip_parse_header((unsigned char *)src, 0xffff) > 0) {
-		param.mode = GZIP_MOD;
+		param.mode = DECOM_GZIP;
 	} else {
 		printf("Unsupported decompression format.\n");
 		return -EPERM;
diff --git a/drivers/misc/rockchip_decompress.c b/drivers/misc/rockchip_decompress.c
index 84849ff852..90553a4260 100644
--- a/drivers/misc/rockchip_decompress.c
+++ b/drivers/misc/rockchip_decompress.c
@@ -63,6 +63,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define DECOM_GZIP_MODE		BIT(4)
 #define DECOM_ZLIB_MODE		BIT(5)
 #define DECOM_DEFLATE_MODE	BIT(0)
+#define DECOM_LZ4_MODE		0
 
 #define DECOM_ENABLE		0x1
 #define DECOM_DISABLE		0x0
@@ -92,17 +93,17 @@ static int rockchip_decom_start(struct udevice *dev, void *buf)
 	writel(0x00800080, priv->soft_reset_base);
 	writel(0x00800000, priv->soft_reset_base);
 
-	if (param->mode == LZ4_MOD)
+	if (param->mode == DECOM_LZ4)
 		writel(LZ4_CONT_CSUM_CHECK_EN |
 		       LZ4_HEAD_CSUM_CHECK_EN |
 		       LZ4_BLOCK_CSUM_CHECK_EN |
-		       LZ4_MOD, priv->base + DECOM_CTRL);
+		       DECOM_LZ4_MODE, priv->base + DECOM_CTRL);
 
-	if (param->mode == GZIP_MOD)
+	if (param->mode == DECOM_GZIP)
 		writel(DECOM_DEFLATE_MODE | DECOM_GZIP_MODE,
 		       priv->base + DECOM_CTRL);
 
-	if (param->mode == ZLIB_MOD)
+	if (param->mode == DECOM_ZLIB)
 		writel(DECOM_DEFLATE_MODE | DECOM_ZLIB_MODE,
 		       priv->base + DECOM_CTRL);
 
@@ -145,7 +146,7 @@ static int rockchip_decom_done_poll(struct udevice *dev)
 
 static int rockchip_decom_ability(void)
 {
-	return GZIP_MOD;
+	return DECOM_GZIP;
 }
 
 /* Caller must fill in param @buf which represent struct decom_param */
diff --git a/include/misc.h b/include/misc.h
index 64468bf356..b817f61e24 100644
--- a/include/misc.h
+++ b/include/misc.h
@@ -17,6 +17,14 @@
 #define IOCTL_REQ_POLL		_IO('m', 0x03)
 #define IOCTL_REQ_CAPABILITY	_IO('m', 0x04)
 
+enum misc_mode {
+	DECOM_LZ4	= BIT(0),
+	DECOM_GZIP	= BIT(1),
+	DECOM_ZLIB	= BIT(2),
+	OTP_S		= BIT(3),
+	OTP_NS		= BIT(4),
+};
+
 /*
  * Read the device to buffer, optional.
  *
diff --git a/include/misc_decompress.h b/include/misc_decompress.h
index dd89da1744..121af0ae9a 100644
--- a/include/misc_decompress.h
+++ b/include/misc_decompress.h
@@ -6,17 +6,11 @@
 #ifndef _MISC_DECOMPRESS_H_
 #define _MISC_DECOMPRESS_H_
 
-enum decom_mod {
-	LZ4_MOD,
-	GZIP_MOD,
-	ZLIB_MOD,
-};
-
 struct decom_param {
 	unsigned long addr_src;
 	unsigned long addr_dst;
 	unsigned long size;
-	enum decom_mod mode;
+	enum misc_mode mode;
 };
 
 struct udevice *misc_decompress_get_device(u32 capability);

commit 2ca0cbb64a2ca870979722d882d59de0f0a0868c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Apr 22 09:09:53 2020 +0800

    dm: sysreset: disable psci sysreset for SPL and TPL
    
    SPL is the stage early than atf/op-tee that psci sysreset
    is not supported.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I46b988b3776638265bf8f374a10f9027d1ebc90f

diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
index 2b66ed12fb..0aa37f6b30 100644
--- a/drivers/sysreset/Makefile
+++ b/drivers/sysreset/Makefile
@@ -8,9 +8,6 @@ obj-$(CONFIG_$(SPL_TPL_)SYSRESET) += sysreset-uclass.o
 
 ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_SYSRESET) += sysreset-syscon-reboot.o
-endif
-
-ifndef CONFIG_TPL_BUILD
 obj-$(CONFIG_SYSRESET_PSCI) += sysreset_psci.o
 endif
 
diff --git a/drivers/sysreset/sysreset-uclass.c b/drivers/sysreset/sysreset-uclass.c
index 43d433ead5..6c3bb8fedb 100644
--- a/drivers/sysreset/sysreset-uclass.c
+++ b/drivers/sysreset/sysreset-uclass.c
@@ -34,7 +34,7 @@ int sysreset_walk(enum sysreset_t type)
 	 * Use psci sysreset as primary for rockchip platforms,
 	 * "rockchip_reset" is applied if PSCI is disabled.
 	 */
-#if !defined(CONFIG_TPL_BUILD) && \
+#if !defined(CONFIG_SPL_BUILD) && \
      defined(CONFIG_ARCH_ROCKCHIP) && defined(CONFIG_SYSRESET_PSCI)
 	ret = uclass_get_device_by_driver(UCLASS_SYSRESET,
 					  DM_GET_DRIVER(psci_sysreset), &dev);

commit 92916bd121af8b134bea5ebc3d9c2632184132dc
Merge: 98894c7310 cead3ab891
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Apr 22 12:56:53 2020 +0800

    Merge branch 'next-dev' into thunder-boot

commit cead3ab891cef68514baac565c0c1400adf599f6
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Apr 15 15:34:19 2020 +0800

    rockchip: spl: support spl_hang_reset
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I2be2671c7b1848d8d1af654319c4e7a518b484eb

diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index 1c70af54ef..ae6b195829 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -302,3 +302,12 @@ int spl_board_prepare_for_jump(struct spl_image_info *spl_image)
 #endif
 	return 0;
 }
+
+void spl_hang_reset(void)
+{
+	printf("# Reset the board to bootrom #\n");
+#if defined(CONFIG_SPL_SYSRESET) && defined(CONFIG_SPL_DRIVERS_MISC_SUPPORT)
+	writel(BOOT_BROM_DOWNLOAD, CONFIG_ROCKCHIP_BOOT_MODE_REG);
+	do_reset(NULL, 0, 0, NULL);
+#endif
+}

commit e663d2b596fd0029d58f1b4e63b30ff230480dbb
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Apr 15 15:20:51 2020 +0800

    lib: hang: reset the device if hang in spl
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ica9426db31809dc316ef0cad3e4b2c0ff7985632

diff --git a/lib/hang.c b/lib/hang.c
index 9246e12455..1ceafd4257 100644
--- a/lib/hang.c
+++ b/lib/hang.c
@@ -11,6 +11,9 @@
 #include <common.h>
 #include <bootstage.h>
 
+#ifdef CONFIG_SPL_BUILD
+__weak void spl_hang_reset(void) {}
+#endif
 /**
  * hang - stop processing by staying in an endless loop
  *
@@ -26,6 +29,9 @@ void hang(void)
 	puts("### ERROR ### Please RESET the board ###\n");
 #endif
 	bootstage_error(BOOTSTAGE_ID_NEED_RESET);
+#ifdef CONFIG_SPL_BUILD
+	spl_hang_reset();
+#endif
 	for (;;)
 		;
 }

commit 346c39b3419d1f4772ff737ef8551473070bb6f4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 16 10:47:28 2020 +0800

    rockchip: board: implement fit_board_verify_required_sigs()
    
    Get otp/efuse key status by optee client.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I820d387558fb50221d4025cab9c10168024558f7

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 2cc102dfe5..09539992d5 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -785,3 +785,18 @@ void autoboot_command_fail_handle(void)
 #endif
 #endif
 }
+
+int fit_board_verify_required_sigs(void)
+{
+	uint8_t vboot = 0;
+#ifdef CONFIG_OPTEE_CLIENT
+	int ret;
+
+	ret = trusty_read_vbootkey_enable_flag(&vboot);
+	if (ret) {
+		printf("Can't read verified-boot flag\n");
+		return 1;
+	}
+#endif
+	return vboot;
+}

commit 90b678f6a0ec398222cecd32c852e6f32255c75a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Apr 17 18:05:05 2020 +0800

    cmd: charge: clean code
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ief810522d1bd55eccce6d096d3a945fac61fa00a

diff --git a/cmd/charge.c b/cmd/charge.c
index bb7a89d771..e14404ed47 100644
--- a/cmd/charge.c
+++ b/cmd/charge.c
@@ -13,10 +13,14 @@
 static int do_charge_display(cmd_tbl_t *cmdtp, int flag, int argc,
 			     char *const argv[])
 {
-	int on_soc, on_voltage, screen_voltage;
-	int ret, save[3];
-	struct udevice *dev;
+
 	struct charge_animation_pdata *pdata;
+	struct udevice *dev;
+	int screen_voltage;
+	int on_voltage;
+	int on_soc;
+	int save[3];
+	int ret;
 
 	if (argc != 4 && argc != 1)
 		return CMD_RET_USAGE;

commit 98894c7310d257f1f30fe642313c874111e18440
Merge: 9b54bc37d9 52387546ad
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 21 16:19:07 2020 +0800

    Merge branch 'next-dev' into thunder-boot

commit 52387546ad6508ba4456ac34ba771acffb3fe839
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Apr 17 11:04:56 2020 +0800

    rockchip: spl: read key without depending on CONFIG_DM_KEY
    
    Key read can be access with key uclass or a tiny key read interface,
    such as CONFIG_SPL_ADC_KEY.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ic1abdee3f778fd1d0d57ab270d5cead81a580fa9

diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index cb370c0625..1c70af54ef 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -265,13 +265,10 @@ void spl_perform_fixups(struct spl_image_info *spl_image)
 #ifdef CONFIG_SPL_KERNEL_BOOT
 static int spl_rockchip_dnl_key_pressed(void)
 {
-	int key = false;
-#if defined(CONFIG_DM_KEY) && defined(CONFIG_SPL_INPUT)
-	key = key_read(KEY_VOLUMEUP);
-
-	return key_is_pressed(key);
+#if defined(CONFIG_SPL_INPUT)
+	return key_read(KEY_VOLUMEUP);
 #else
-	return key;
+	return 0;
 #endif
 }
 

commit abedddcfae5a7ffcb9a1cb037067a3b34e711b01
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Apr 17 10:50:10 2020 +0800

    input: add spl adc key driver
    
    Providing a mininum adc key driver for SPL, which does not
    depend on key uclass, but ADC uclass is still required.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I80f861780acd9c47d345b95762a4dd39d19ea6fc

diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig
index 2c6a1e24dc..ab432429aa 100644
--- a/drivers/input/Kconfig
+++ b/drivers/input/Kconfig
@@ -105,6 +105,12 @@ config ADC_KEY
 	help
 	  This adds a driver for the adc keys support.
 
+config SPL_ADC_KEY
+        bool "Enable SPL adc keys support without DM"
+        depends on SPL_INPUT
+        help
+          This adds a driver for the SPL adc keys support
+
 config GPIO_KEY
 	bool "Enable gpio keys support"
 	depends on DM_KEY
diff --git a/drivers/input/Makefile b/drivers/input/Makefile
index 14149bf2aa..d7ce0f3c73 100644
--- a/drivers/input/Makefile
+++ b/drivers/input/Makefile
@@ -28,4 +28,7 @@ ifdef CONFIG_PS2KBD
 obj-y += keyboard.o pc_keyb.o
 obj-$(CONFIG_PS2MULT) += ps2mult.o ps2ser.o
 endif
+
+else
+obj-$(CONFIG_SPL_ADC_KEY) += spl_adc_key.o
 endif
diff --git a/drivers/input/spl_adc_key.c b/drivers/input/spl_adc_key.c
new file mode 100644
index 0000000000..be234c6a2e
--- /dev/null
+++ b/drivers/input/spl_adc_key.c
@@ -0,0 +1,73 @@
+/*
+ * (C) Copyright 2020 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <adc.h>
+#include <fdtdec.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int key_read(int code)
+{
+	const void *fdt_blob = gd->fdt_blob;
+	int adc_node, offset;
+	int cd, channel, adc;
+	int ret, vref, mv;
+	int min, max;
+	int margin = 30;
+	uint val;
+	u32 chn[2];
+
+	adc_node = fdt_node_offset_by_compatible(fdt_blob, 0, "adc-keys");
+	if (adc_node < 0) {
+		debug("No 'adc-keys' node, ret=%d\n", adc_node);
+		return 0;
+	}
+
+	ret = fdtdec_get_int_array(fdt_blob, adc_node, "io-channels",
+				   chn, ARRAY_SIZE(chn));
+	if (ret) {
+		debug("Can't read 'io-channels', ret=%d\n", ret);
+		return 0;
+	}
+
+	vref = fdtdec_get_int(fdt_blob, adc_node,
+			      "keyup-threshold-microvolt", -1);
+	if (vref < 0) {
+		debug("Can't read 'keyup-threshold-microvolt'\n");
+		return 0;
+	}
+
+	channel = chn[1];
+
+	for (offset = fdt_first_subnode(fdt_blob, adc_node);
+	     offset >= 0;
+	     offset = fdt_next_subnode(fdt_blob, offset)) {
+		cd = fdtdec_get_int(fdt_blob, offset, "linux,code", -1);
+		if (cd == code) {
+			mv = fdtdec_get_int(fdt_blob, offset,
+					    "press-threshold-microvolt", -1);
+			if (mv < 0) {
+				debug("Can't read 'press-threshold-microvolt'\n");
+				return 0;
+			}
+
+			adc = mv / (vref / 1024); /* 10-bit adc */
+			max = adc + margin;
+			min = adc > margin ? adc - margin : 0;
+			ret = adc_channel_single_shot("saradc", channel, &val);
+			if (ret) {
+				debug("Failed to read adc%d, ret=%d\n",
+				      channel, ret);
+				return 0;
+			}
+
+			return (val >= min && val <= max);
+		}
+	}
+
+	return 0;
+}

commit 3509e794f30d685a139bfe7d55ef5b5b8904ca61
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Apr 17 10:49:03 2020 +0800

    input: Makefile: clean for SPL build
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I8ea0bd45ef86802e2992a44793a91eb8bb7b08fc

diff --git a/drivers/input/Makefile b/drivers/input/Makefile
index 3d6469cd70..14149bf2aa 100644
--- a/drivers/input/Makefile
+++ b/drivers/input/Makefile
@@ -5,7 +5,7 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
 
-obj-$(CONFIG_DM_KEY) += key-uclass.o
+obj-$(CONFIG_$(SPL_)DM_KEY) += key-uclass.o
 obj-$(CONFIG_DM_RC) += rc-uclass.o
 obj-$(CONFIG_RK_IR) += rockchip_ir.o
 
@@ -13,7 +13,6 @@ obj-y += input.o
 obj-$(CONFIG_$(SPL_TPL_)CROS_EC_KEYB) += cros_ec_keyb.o
 obj-$(CONFIG_$(SPL_TPL_)OF_CONTROL) += key_matrix.o
 obj-$(CONFIG_$(SPL_TPL_)DM_KEYBOARD) += keyboard-uclass.o
-obj-$(CONFIG_RK8XX_PWRKEY) += rk8xx_pwrkey.o
 
 ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_I8042_KEYB) += i8042.o
@@ -21,12 +20,12 @@ obj-$(CONFIG_TEGRA_KEYBOARD) += tegra-kbc.o
 obj-$(CONFIG_TWL4030_INPUT) += twl4030.o
 obj-$(CONFIG_TWL6030_INPUT) += twl6030.o
 obj-$(CONFIG_RK8XX_PWRKEY) += rk8xx_pwrkey.o
+obj-$(CONFIG_ADC_KEY) += adc_key.o
+obj-$(CONFIG_GPIO_KEY) += gpio_key.o
+obj-$(CONFIG_RK_KEY) += rk_key.o
+obj-$(CONFIG_RK8XX_PWRKEY) += rk8xx_pwrkey.o
 ifdef CONFIG_PS2KBD
 obj-y += keyboard.o pc_keyb.o
 obj-$(CONFIG_PS2MULT) += ps2mult.o ps2ser.o
 endif
 endif
-
-obj-$(CONFIG_ADC_KEY) += adc_key.o
-obj-$(CONFIG_GPIO_KEY) += gpio_key.o
-obj-$(CONFIG_RK_KEY) += rk_key.o

commit 35ef9ac329910cb8aa8a5bbb1fe391fd0c96fb47
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Apr 17 10:45:25 2020 +0800

    dm: adc: decoupling regulator from adc uclass
    
    Regulator should be a option but not mandory for dm adc.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I5fdda2d76dd8ce75673732cc0563d7a18be211e2

diff --git a/drivers/adc/Kconfig b/drivers/adc/Kconfig
index 8094420548..2130cbbbca 100644
--- a/drivers/adc/Kconfig
+++ b/drivers/adc/Kconfig
@@ -11,6 +11,13 @@ config ADC
 	  - support supply's phandle with auto-enable
 	  - supply polarity setting in fdt
 
+config ADC_REQ_REGULATOR
+	bool "Enable regulator control for ADC drivers"
+	depends on ADC
+	default n
+	help
+	  ADC may depend on regulator power supply and require control.
+
 config ADC_EXYNOS
 	bool "Enable Exynos 54xx ADC driver"
 	help
diff --git a/drivers/adc/adc-uclass.c b/drivers/adc/adc-uclass.c
index a4c20f4d35..e8c7262b09 100644
--- a/drivers/adc/adc-uclass.c
+++ b/drivers/adc/adc-uclass.c
@@ -47,6 +47,7 @@ static int check_channel(struct udevice *dev, int value, bool number_or_mask,
 	return -EINVAL;
 }
 
+#ifdef CONFIG_ADC_REQ_REGULATOR
 static int adc_supply_enable(struct udevice *dev)
 {
 	struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
@@ -68,6 +69,9 @@ static int adc_supply_enable(struct udevice *dev)
 
 	return ret;
 }
+#else
+static inline int adc_supply_enable(struct udevice *dev) { return 0; }
+#endif
 
 int adc_data_mask(struct udevice *dev, unsigned int *data_mask)
 {
@@ -256,6 +260,7 @@ try_manual:
 	return _adc_channels_single_shot(dev, channel_mask, channels);
 }
 
+#ifdef CONFIG_ADC_REQ_REGULATOR
 static int adc_vdd_platdata_update(struct udevice *dev)
 {
 	struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
@@ -280,7 +285,11 @@ static int adc_vdd_platdata_update(struct udevice *dev)
 
 	return 0;
 }
+#else
+static inline int adc_vdd_platdata_update(struct udevice *dev) { return 0; }
+#endif
 
+#ifdef CONFIG_ADC_REQ_REGULATOR
 static int adc_vss_platdata_update(struct udevice *dev)
 {
 	struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
@@ -299,6 +308,9 @@ static int adc_vss_platdata_update(struct udevice *dev)
 
 	return 0;
 }
+#else
+static inline int adc_vss_platdata_update(struct udevice *dev) { return 0; }
+#endif
 
 int adc_vdd_value(struct udevice *dev, int *uV)
 {

commit 1f452cbf59439faa68086742adbe925c9df6b5d0
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 16 10:42:37 2020 +0800

    fit: support board sig verify require
    
    Not allow non-signature image to boot if board requires
    signature verify.
    
    The board signature verify usually depends on otp/efuse
    key is enabled or disabled.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I4e4dd201e74712a53cb0f481463b48532e30bb40

diff --git a/common/image-fit.c b/common/image-fit.c
index d0403e5e47..259ac75792 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -1925,6 +1925,13 @@ static const char *fit_get_image_type_property(int type)
 	return "unknown";
 }
 
+#ifndef USE_HOSTCC
+__weak int fit_board_verify_required_sigs(void)
+{
+	return 0;
+}
+#endif
+
 int fit_image_load_index(bootm_headers_t *images, ulong addr,
 			 const char **fit_unamep, const char **fit_uname_configp,
 			 int arch, int image_type, int image_index, int bootstage_id,
@@ -1946,6 +1953,15 @@ int fit_image_load_index(bootm_headers_t *images, ulong addr,
 	const char *prop_name;
 	int ret;
 
+#ifndef USE_HOSTCC
+	/* If board required sigs, check self */
+	if (fit_board_verify_required_sigs() &&
+	    !IS_ENABLED(CONFIG_FIT_SIGNATURE)) {
+		printf("Verified-boot requires CONFIG_FIT_SIGNATURE enabled\n");
+		hang();
+	}
+#endif
+
 	fit = map_sysmem(addr, 0);
 	fit_uname = fit_unamep ? *fit_unamep : NULL;
 	fit_uname_config = fit_uname_configp ? *fit_uname_configp : NULL;
diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index d36b1565d3..7b30ad331b 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -401,6 +401,13 @@ static int spl_internal_load_simple_fit(struct spl_image_info *spl_image,
 		return -1;
 	}
 
+	/* if board sigs verify required, check self */
+	if (fit_board_verify_required_sigs() &&
+	    !IS_ENABLED(CONFIG_SPL_FIT_SIGNATURE)) {
+		printf("Verified-boot requires CONFIG_SPL_FIT_SIGNATURE enabled\n");
+		hang();
+	}
+
 	/* verify the configure node by keys, if required */
 #ifdef CONFIG_SPL_FIT_SIGNATURE
 	int conf_noffset;
diff --git a/include/image.h b/include/image.h
index afe2d06744..cc84b49728 100644
--- a/include/image.h
+++ b/include/image.h
@@ -1056,6 +1056,8 @@ int fit_image_verify_with_data(const void *fit, int image_noffset,
 int fit_image_verify(const void *fit, int noffset);
 int fit_config_verify(const void *fit, int conf_noffset);
 int fit_all_image_verify(const void *fit);
+int fit_board_verify_required_sigs(void);
+
 int fit_image_check_os(const void *fit, int noffset, uint8_t os);
 int fit_image_check_arch(const void *fit, int noffset, uint8_t arch);
 int fit_image_check_type(const void *fit, int noffset, uint8_t type);

commit 9b54bc37d968eb207206bd39ff983a99bbc79356
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Apr 21 11:33:40 2020 +0800

    rockchip: rv1126: add CONFIG_SYS_NAND_U_BOOT_OFFS
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I3ec5c590ca135349e8b014b5ca4968ddc4fb26a1

diff --git a/include/configs/rv1126_common.h b/include/configs/rv1126_common.h
index 4de3fc136a..e3803c1827 100644
--- a/include/configs/rv1126_common.h
+++ b/include/configs/rv1126_common.h
@@ -40,6 +40,7 @@
 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
 #define CONFIG_SYS_NAND_PAGE_COUNT	64
 #define CONFIG_SYS_NAND_SIZE		(256 * 1024 * 1024)
+#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x4000
 
 #define CONFIG_SYS_SDRAM_BASE		0
 #define SDRAM_MAX_SIZE			0xfd000000

commit 358df1d7ed24befaf2756cae8465e6b4de9d4adb
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Apr 20 17:03:03 2020 +0800

    rockchip: rv1126: add nand flash config
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ibe1b30b09e4579e9acfac41730c5e862db0a345f

diff --git a/include/configs/rv1126_common.h b/include/configs/rv1126_common.h
index 86fb9e661c..4de3fc136a 100644
--- a/include/configs/rv1126_common.h
+++ b/include/configs/rv1126_common.h
@@ -34,6 +34,13 @@
 /* MMC/SD IP block */
 #define CONFIG_BOUNCE_BUFFER
 
+/* Nand */
+#define CONFIG_SYS_MAX_NAND_DEVICE	1
+#define CONFIG_SYS_NAND_ONFI_DETECTION
+#define CONFIG_SYS_NAND_PAGE_SIZE	2048
+#define CONFIG_SYS_NAND_PAGE_COUNT	64
+#define CONFIG_SYS_NAND_SIZE		(256 * 1024 * 1024)
+
 #define CONFIG_SYS_SDRAM_BASE		0
 #define SDRAM_MAX_SIZE			0xfd000000
 

commit 11a8d4b2e0415d1ba452fe36676b20905b6f210d
Merge: 997b8b191b d300a21655
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 21 11:09:09 2020 +0800

    Merge branch 'next-dev' into thunder-boot

commit d300a21655c16d7cdc9546c8804c1eac94ae58dd
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Apr 20 20:50:50 2020 +0800

    spl: mtd_blk: support load fit firmware
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I3a32874977a7aa654b8e3fb432e3637b900525ab

diff --git a/common/spl/spl_mtd_blk.c b/common/spl/spl_mtd_blk.c
index d933af3b74..3dac0ff737 100644
--- a/common/spl/spl_mtd_blk.c
+++ b/common/spl/spl_mtd_blk.c
@@ -66,7 +66,6 @@ struct blk_desc *find_mtd_device(int dev_num)
 	return desc;
 }
 
-#ifdef CONFIG_SPL_LOAD_RKFW
 static ulong mtd_spl_load_read(struct spl_load_info *load, ulong sector,
 			       ulong count, void *buf)
 {
@@ -75,6 +74,7 @@ static ulong mtd_spl_load_read(struct spl_load_info *load, ulong sector,
 	return blk_dread(desc, sector, count, buf);
 }
 
+#ifdef CONFIG_SPL_LOAD_RKFW
 int spl_mtd_load_rkfw(struct spl_image_info *spl_image, struct blk_desc *desc)
 {
 	int ret = -1;
@@ -118,15 +118,46 @@ int spl_mtd_load_rkfw(struct spl_image_info *spl_image, struct blk_desc *desc)
 int spl_mtd_load_image(struct spl_image_info *spl_image,
 		       struct spl_boot_device *bootdev)
 {
+	struct image_header *header;
 	struct blk_desc *desc;
-	int ret = 0;
+	int ret = -1;
 
 	desc = find_mtd_device(spl_mtd_get_device_index(bootdev->boot_device));
 	if (!desc)
 		return -ENODEV;
+
+	if (IS_ENABLED(CONFIG_SPL_LOAD_FIT)) {
+		header = (struct image_header *)(CONFIG_SYS_TEXT_BASE -
+					 sizeof(struct image_header));
+		ret = blk_dread(desc, CONFIG_SYS_NAND_U_BOOT_OFFS, 1, header);
+		if (ret != 1)
+			return -ENODEV;
+
+#ifdef CONFIG_SPL_FIT_IMAGE_MULTIPLE
+		if (image_get_magic(header) == FDT_MAGIC ||
+		    CONFIG_SPL_FIT_IMAGE_MULTIPLE > 1) {
+#else
+		if (image_get_magic(header) == FDT_MAGIC) {
+#endif
+			struct spl_load_info load;
+
+			load.dev = desc;
+			load.priv = NULL;
+			load.filename = NULL;
+			load.bl_len = desc->blksz;
+			load.read = mtd_spl_load_read;
+
+			ret = spl_load_simple_fit(spl_image, &load,
+						  CONFIG_SYS_NAND_U_BOOT_OFFS,
+						  header);
+		}
+
+	} else if (IS_ENABLED(CONFIG_SPL_LOAD_RKFW)) {
 #ifdef CONFIG_SPL_LOAD_RKFW
-	ret = spl_mtd_load_rkfw(spl_image, desc);
+		ret = spl_mtd_load_rkfw(spl_image, desc);
 #endif
+	}
+
 	return ret;
 }
 

commit 1540ca37555327e9962dc1ae3b7cdc80a6511cc4
Author: Simon Xue <xxm@rock-chips.com>
Date:   Fri Apr 17 09:44:55 2020 +0800

    misc: decompress: reset decompress before starting decompress
    
    Change-Id: Id1031a204bb1ae4ebe5e1ea7c86b10e0d49dfd4b
    Signed-off-by: Simon Xue <xxm@rock-chips.com>

diff --git a/drivers/misc/rockchip_decompress.c b/drivers/misc/rockchip_decompress.c
index bf01cd733c..84849ff852 100644
--- a/drivers/misc/rockchip_decompress.c
+++ b/drivers/misc/rockchip_decompress.c
@@ -78,6 +78,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 struct rockchip_decom_priv {
 	void __iomem *base;
+	unsigned long soft_reset_base;
 	bool done;
 };
 
@@ -88,6 +89,9 @@ static int rockchip_decom_start(struct udevice *dev, void *buf)
 
 	priv->done = false;
 
+	writel(0x00800080, priv->soft_reset_base);
+	writel(0x00800000, priv->soft_reset_base);
+
 	if (param->mode == LZ4_MOD)
 		writel(LZ4_CONT_CSUM_CHECK_EN |
 		       LZ4_HEAD_CSUM_CHECK_EN |
@@ -179,6 +183,9 @@ static int rockchip_decom_ofdata_to_platdata(struct udevice *dev)
 	if (!priv->base)
 		return -ENOENT;
 
+	priv->soft_reset_base = dev_read_u32_default(dev, "soft-reset-addr", 0)
+					& 0xffffffff;
+
 	return 0;
 }
 

commit e65ea10ce40712117233e0614bff5f0d32366dae
Author: Cody Xie <cody.xie@rock-chips.com>
Date:   Mon Apr 20 21:10:46 2020 +0800

    .gitignore: Ignore more generated files
    
    Signed-off-by: Cody Xie <cody.xie@rock-chips.com>
    Change-Id: Id0536ad67acfb48c34f1be5bd564a1096c9a43af

diff --git a/.gitignore b/.gitignore
index 995a023cca..f72f3a2fd4 100644
--- a/.gitignore
+++ b/.gitignore
@@ -48,6 +48,7 @@ fit-dtb.blob
 # Generated files
 #
 /LOG
+/fit/
 /spl/
 /tpl/
 /defconfig

commit ae52cbcb84e5829605115a096f00eccf97552268
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Apr 20 17:45:54 2020 +0800

    spi: rokchip_sfc: set sfc clock
    
    Change-Id: I1f2ae108b7557cfe9b55e21d1ecaec5492efea87
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/spi/rockchip_sfc.c b/drivers/spi/rockchip_sfc.c
index 68cf67d1b1..6891b54d54 100644
--- a/drivers/spi/rockchip_sfc.c
+++ b/drivers/spi/rockchip_sfc.c
@@ -103,6 +103,10 @@ check_member(rockchip_sfc_reg, data, 0x108);
 
 #define SFC_MAX_TRB		(512 * 31)
 
+#define SFC_MAX_RATE		(150 * 1000 * 1000)
+#define SFC_DEFAULT_RATE	(80 * 1000 * 1000)
+#define SFC_MIN_RATE		(10 * 1000 * 1000)
+
 enum rockchip_sfc_if_type {
 	IF_TYPE_STD,
 	IF_TYPE_DUAL,
@@ -150,6 +154,9 @@ static int rockchip_sfc_ofdata_to_platdata(struct udevice *bus)
 
 	plat->frequency = ofnode_read_u32_default(subnode, "spi-max-frequency",
 						  100000000);
+	if (plat->frequency > SFC_MAX_RATE || plat->frequency < SFC_MIN_RATE)
+		plat->frequency = SFC_DEFAULT_RATE;
+	sfc->max_freq = plat->frequency;
 
 	return 0;
 }
@@ -158,7 +165,10 @@ static int rockchip_sfc_probe(struct udevice *bus)
 {
 	struct rockchip_sfc_platdata *plat = dev_get_platdata(bus);
 	struct rockchip_sfc *sfc = dev_get_priv(bus);
+	struct dm_spi_bus *dm_spi_bus;
 
+	dm_spi_bus = bus->uclass_priv;
+	dm_spi_bus->max_hz = plat->frequency;
 	sfc->regbase = (struct rockchip_sfc_reg *)plat->base;
 
 	return 0;
@@ -559,6 +569,8 @@ static int rockchip_sfc_set_speed(struct udevice *bus, uint speed)
 		speed = sfc->max_freq;
 
 	sfc->speed_hz = speed;
+	clk_set_rate(&sfc->clk, sfc->speed_hz);
+	SFC_DBG("%s clk= %ld\n", __func__, clk_get_rate(&sfc->clk));
 
 	return 0;
 }

commit 997b8b191b5cd8508bf99953b69b53d8765886c2
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Apr 9 22:39:26 2020 +0800

    rockchip: dts: rv1126: add secure otp node
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I56af5482bca3694ef4a6100b36e975395e1fc766

diff --git a/arch/arm/dts/rv1126-u-boot.dtsi b/arch/arm/dts/rv1126-u-boot.dtsi
index 45b702d58c..19766a0514 100644
--- a/arch/arm/dts/rv1126-u-boot.dtsi
+++ b/arch/arm/dts/rv1126-u-boot.dtsi
@@ -104,6 +104,11 @@
 	status = "okay";
 };
 
+&secure_otp {
+	u-boot,dm-spl;
+	status = "okay";
+};
+
 &u2phy0 {
 	u-boot,dm-pre-reloc;
 	status = "okay";
diff --git a/arch/arm/dts/rv1126.dtsi b/arch/arm/dts/rv1126.dtsi
index c998765f1a..46d71c5a19 100644
--- a/arch/arm/dts/rv1126.dtsi
+++ b/arch/arm/dts/rv1126.dtsi
@@ -958,6 +958,12 @@
 		};
 	};
 
+	secure_otp: secure_otp@0xff5d0000 {
+		compatible = "rockchip,rv1126-secure-otp";
+		reg = <0xff5d0000 0x4000>;
+		secure_conf = <0xfe0a0008>;
+	};
+
 	saradc: saradc@ff5e0000 {
 		compatible = "rockchip,saradc";
 		reg = <0xff5e0000 0x100>;

commit e0058109d40b83019780bafa0b6df986e6b44764
Merge: b0a6db3b4a 4e45d60523
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 20 20:18:44 2020 +0800

    Merge branch 'next-dev' into thunder-boot

commit 4e45d60523f5b179614e178e95fbd3f707bf8120
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 20 20:05:36 2020 +0800

    make.sh: remove file before build
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ic87dc270a8e090c21eaae643cd9edb9e22cac767

diff --git a/make.sh b/make.sh
index 012792526f..deb450c217 100755
--- a/make.sh
+++ b/make.sh
@@ -711,8 +711,8 @@ function pack_fit_image()
 	if grep -q '^CONFIG_FIT_SIGNATURE=y' .config ; then
 		./scripts/fit-vboot.sh $*
 	else
-		./scripts/fit-vboot-uboot.sh --no-vboot --no-rebuild
 		rm uboot.img trust*.img -rf
+		./scripts/fit-vboot-uboot.sh --no-vboot --no-rebuild
 		echo "pack uboot.img (with uboot trust) okay! Input: $ini"
 	fi
 }

commit 2d1531fa312f0e694da0532cb7a13b895ffb351d
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Mon Apr 20 14:43:37 2020 +0800

    drivers: rknand: zftl: strengthen the parameter judgment for write loader API
    
    The write loader function may call by mistake if the system
    is unstable, which will cause flash reading and writing errors
    and data loss.
    
    bug log:
    MT RR 15 row=dae38,count 15,status=-1
    MT RR 15 row=dae38,count 15,status=-1
    flash_read_page_en 0 dae38 error_ecc -1 1
    load_l2p_region = 0,2,ffffffff, dae1e
    
    Change-Id: Iac55e7807d739f08146ea2d81265857e6136e5d0
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/drivers/rknand/rk_zftl_arm_v8.S b/drivers/rknand/rk_zftl_arm_v8.S
index f1b34d6a34..9e55dd762d 100644
--- a/drivers/rknand/rk_zftl_arm_v8.S
+++ b/drivers/rknand/rk_zftl_arm_v8.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2019-09-18
+ * date: 2020-04-17
  */
 	.arch armv8-a
 	.file	"rk_zftl_arm_v8.S"
@@ -534,10 +534,10 @@ zftl_get_gc_node.part.9:
 	ldr	x0, [x0, #:lo12:.LANCHOR12]
 	b	_list_get_gc_head_node.isra.2
 	.size	zftl_get_gc_node.part.9, .-zftl_get_gc_node.part.9
-	.section	.text.nandc_de_cs.constprop.30,"ax",@progbits
+	.section	.text.nandc_de_cs.constprop.31,"ax",@progbits
 	.align	2
-	.type	nandc_de_cs.constprop.30, %function
-nandc_de_cs.constprop.30:
+	.type	nandc_de_cs.constprop.31, %function
+nandc_de_cs.constprop.31:
 	adrp	x0, .LANCHOR13
 	ldr	x1, [x0, #:lo12:.LANCHOR13]
 	ldr	w0, [x1]
@@ -545,7 +545,7 @@ nandc_de_cs.constprop.30:
 	and	w0, w0, -131073
 	str	w0, [x1]
 	ret
-	.size	nandc_de_cs.constprop.30, .-nandc_de_cs.constprop.30
+	.size	nandc_de_cs.constprop.31, .-nandc_de_cs.constprop.31
 	.section	.text.nand_flash_print_info,"ax",@progbits
 	.align	2
 	.global	nand_flash_print_info
@@ -677,37 +677,39 @@ nand_flash_print_info:
 .L98:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	tbz	x0, 12, .L99
-	adrp	x0, .LANCHOR0
-	ldrb	w1, [x0, #:lo12:.LANCHOR0]
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
+	ldrb	w1, [x0, 22]
 	adrp	x0, .LC14
 	add	x0, x0, :lo12:.LC14
 	bl	printf
 .L99:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	tbz	x0, 12, .L100
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
-	ldrb	w1, [x0, 22]
+	adrp	x0, .LANCHOR18
+	ldrb	w1, [x0, #:lo12:.LANCHOR18]
 	adrp	x0, .LC15
 	add	x0, x0, :lo12:.LC15
 	bl	printf
 .L100:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	tbz	x0, 12, .L101
-	adrp	x0, .LANCHOR18
-	ldrb	w1, [x0, #:lo12:.LANCHOR18]
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
+	ldrb	w1, [x0, 16]
 	adrp	x0, .LC16
 	add	x0, x0, :lo12:.LC16
+	and	w1, w1, 1
 	bl	printf
 .L101:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	tbz	x0, 12, .L102
 	adrp	x0, .LANCHOR16
 	ldr	x0, [x0, #:lo12:.LANCHOR16]
-	ldrb	w1, [x0, 16]
+	ldrh	w1, [x0, 16]
 	adrp	x0, .LC17
 	add	x0, x0, :lo12:.LC17
-	and	w1, w1, 1
+	ubfx	x1, x1, 1, 1
 	bl	printf
 .L102:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
@@ -717,7 +719,7 @@ nand_flash_print_info:
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC18
 	add	x0, x0, :lo12:.LC18
-	ubfx	x1, x1, 1, 1
+	ubfx	x1, x1, 2, 1
 	bl	printf
 .L103:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
@@ -727,7 +729,7 @@ nand_flash_print_info:
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC19
 	add	x0, x0, :lo12:.LC19
-	ubfx	x1, x1, 2, 1
+	ubfx	x1, x1, 3, 1
 	bl	printf
 .L104:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
@@ -737,7 +739,7 @@ nand_flash_print_info:
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC20
 	add	x0, x0, :lo12:.LC20
-	ubfx	x1, x1, 3, 1
+	ubfx	x1, x1, 4, 1
 	bl	printf
 .L105:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
@@ -747,7 +749,7 @@ nand_flash_print_info:
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC21
 	add	x0, x0, :lo12:.LC21
-	ubfx	x1, x1, 4, 1
+	ubfx	x1, x1, 5, 1
 	bl	printf
 .L106:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
@@ -757,7 +759,7 @@ nand_flash_print_info:
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC22
 	add	x0, x0, :lo12:.LC22
-	ubfx	x1, x1, 5, 1
+	ubfx	x1, x1, 6, 1
 	bl	printf
 .L107:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
@@ -767,27 +769,27 @@ nand_flash_print_info:
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC23
 	add	x0, x0, :lo12:.LC23
-	ubfx	x1, x1, 6, 1
+	ubfx	x1, x1, 7, 1
 	bl	printf
 .L108:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	tbz	x0, 12, .L109
 	adrp	x0, .LANCHOR16
 	ldr	x0, [x0, #:lo12:.LANCHOR16]
-	ldrh	w1, [x0, 16]
+	ldrb	w1, [x0, 17]
 	adrp	x0, .LC24
 	add	x0, x0, :lo12:.LC24
-	ubfx	x1, x1, 7, 1
+	and	w1, w1, 1
 	bl	printf
 .L109:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	tbz	x0, 12, .L110
 	adrp	x0, .LANCHOR16
 	ldr	x0, [x0, #:lo12:.LANCHOR16]
-	ldrb	w1, [x0, 17]
+	ldrh	w1, [x0, 16]
 	adrp	x0, .LC25
 	add	x0, x0, :lo12:.LC25
-	and	w1, w1, 1
+	ubfx	x1, x1, 9, 1
 	bl	printf
 .L110:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
@@ -797,25 +799,25 @@ nand_flash_print_info:
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC26
 	add	x0, x0, :lo12:.LC26
-	ubfx	x1, x1, 9, 1
+	ubfx	x1, x1, 10, 1
 	bl	printf
 .L111:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	tbz	x0, 12, .L112
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
-	ldrh	w1, [x0, 16]
+	adrp	x0, .LANCHOR19
+	ldrb	w2, [x0, #:lo12:.LANCHOR19]
+	adrp	x0, .LANCHOR0
+	ldrb	w1, [x0, #:lo12:.LANCHOR0]
 	adrp	x0, .LC27
 	add	x0, x0, :lo12:.LC27
-	ubfx	x1, x1, 10, 1
 	bl	printf
 .L112:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	tbz	x0, 12, .L113
-	adrp	x0, .LANCHOR19
-	ldrb	w2, [x0, #:lo12:.LANCHOR19]
-	adrp	x0, .LANCHOR0
-	ldrb	w1, [x0, #:lo12:.LANCHOR0]
+	adrp	x0, .LANCHOR20
+	add	x0, x0, :lo12:.LANCHOR20
+	ldrb	w2, [x0, 11]
+	ldrb	w1, [x0, 10]
 	adrp	x0, .LC28
 	add	x0, x0, :lo12:.LC28
 	bl	printf
@@ -824,30 +826,20 @@ nand_flash_print_info:
 	tbz	x0, 12, .L114
 	adrp	x0, .LANCHOR20
 	add	x0, x0, :lo12:.LANCHOR20
-	ldrb	w2, [x0, 11]
-	ldrb	w1, [x0, 10]
+	ldrb	w2, [x0, 9]
+	ldrb	w1, [x0, 8]
 	adrp	x0, .LC29
 	add	x0, x0, :lo12:.LC29
 	bl	printf
 .L114:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L115
-	adrp	x0, .LANCHOR20
-	add	x0, x0, :lo12:.LANCHOR20
-	ldrb	w2, [x0, 9]
-	ldrb	w1, [x0, 8]
-	adrp	x0, .LC30
-	add	x0, x0, :lo12:.LC30
-	bl	printf
-.L115:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	tbz	x0, 12, .L85
 	adrp	x0, .LANCHOR21
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ldrb	w1, [x0, #:lo12:.LANCHOR21]
-	adrp	x0, .LC31
-	add	x0, x0, :lo12:.LC31
+	adrp	x0, .LC30
+	add	x0, x0, :lo12:.LC30
 	b	printf
 .L85:
 	ldr	x19, [sp, 16]
@@ -862,11 +854,11 @@ timer_delay_ns:
 	sub	sp, sp, #16
 	lsr	w0, w0, 4
 	str	w0, [sp, 12]
-.L209:
+.L205:
 	ldr	w0, [sp, 12]
 	sub	w1, w0, #1
 	str	w1, [sp, 12]
-	cbnz	w0, .L209
+	cbnz	w0, .L205
 	add	sp, sp, 16
 	ret
 	.size	timer_delay_ns, .-timer_delay_ns
@@ -913,20 +905,20 @@ toshiba_set_rr_para:
 	add	x8, x8, :lo12:.LANCHOR24
 	add	x10, x10, :lo12:.LANCHOR25
 	cmp	w0, w2
-	bhi	.L222
+	bhi	.L218
 	ret
-.L216:
+.L212:
 	cmp	w0, 35
-	bne	.L218
+	bne	.L214
 	ldrsb	w0, [x3, x2]
-	b	.L223
-.L218:
+	b	.L219
+.L214:
 	ldrsb	w0, [x10, w11, sxtw]
-	b	.L223
-.L222:
+	b	.L219
+.L218:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
-.L219:
+.L215:
 	mov	w0, 85
 	str	w0, [x4, 8]
 	add	x0, x5, :lo12:.LANCHOR23
@@ -936,14 +928,14 @@ toshiba_set_rr_para:
 	bl	timer_delay_ns
 	ldrb	w0, [x8]
 	cmp	w0, 34
-	bne	.L216
+	bne	.L212
 	ldrsb	w0, [x7, x2]
-.L223:
+.L219:
 	str	w0, [x4]
 	add	x2, x2, 1
 	ldrb	w0, [x6]
 	cmp	w0, w2
-	bhi	.L219
+	bhi	.L215
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	toshiba_set_rr_para, .-toshiba_set_rr_para
@@ -964,10 +956,10 @@ hynix_set_rr_para:
 	cmp	w3, 8
 	mov	x3, 32
 	umaddl	x1, w1, w5, x3
-	beq	.L225
+	beq	.L221
 	mov	w3, 160
 	umaddl	x1, w3, w0, x1
-.L225:
+.L221:
 	ubfiz	x0, x0, 8, 8
 	mov	x3, 0
 	add	x2, x2, x0
@@ -975,14 +967,14 @@ hynix_set_rr_para:
 	add	x4, x4, x1
 	cmp	w5, w3, uxtb
 	str	w0, [x2, 2056]
-	bhi	.L232
+	bhi	.L228
 	mov	w0, 22
 	str	w0, [x2, 2056]
 	ret
-.L232:
+.L228:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
-.L228:
+.L224:
 	ldrb	w0, [x6, x3]
 	str	w0, [x2, 2052]
 	mov	w0, 120
@@ -991,7 +983,7 @@ hynix_set_rr_para:
 	str	w0, [x2, 2048]
 	add	x3, x3, 1
 	cmp	w5, w3, uxtb
-	bhi	.L228
+	bhi	.L224
 	mov	w0, 22
 	str	w0, [x2, 2056]
 	ldp	x29, x30, [sp], 16
@@ -1007,14 +999,14 @@ hynix_reconfig_rr_para:
 	sub	w1, w1, #1
 	and	w1, w1, 255
 	cmp	w1, 7
-	bhi	.L239
+	bhi	.L235
 	adrp	x8, .LANCHOR27
 	and	w0, w0, 255
 	sxtw	x7, w0
 	ldr	x1, [x8, #:lo12:.LANCHOR27]
 	add	x1, x1, x7
 	ldrb	w1, [x1, 120]
-	cbz	w1, .L239
+	cbz	w1, .L235
 	stp	x29, x30, [sp, -16]!
 	mov	w1, 0
 	add	x29, sp, 0
@@ -1024,7 +1016,7 @@ hynix_reconfig_rr_para:
 	strb	wzr, [x0, 120]
 	ldp	x29, x30, [sp], 16
 	ret
-.L239:
+.L235:
 	ret
 	.size	hynix_reconfig_rr_para, .-hynix_reconfig_rr_para
 	.section	.text.nandc_set_ddr_para,"ax",@progbits
@@ -1042,10 +1034,10 @@ nandc_set_ddr_para:
 	lsl	w0, w0, 8
 	orr	w1, w1, w0
 	orr	w1, w1, 3
-	bne	.L243
+	bne	.L239
 	str	w1, [x2, 80]
 	ret
-.L243:
+.L239:
 	str	w1, [x2, 304]
 	ret
 	.size	nandc_set_ddr_para, .-nandc_set_ddr_para
@@ -1059,14 +1051,14 @@ nandc_get_ddr_para:
 	cmp	w0, 9
 	adrp	x0, .LANCHOR13
 	ldr	x0, [x0, #:lo12:.LANCHOR13]
-	bne	.L246
+	bne	.L242
 	ldr	w0, [x0, 80]
-.L248:
+.L244:
 	ubfx	x0, x0, 8, 8
 	ret
-.L246:
+.L242:
 	ldr	w0, [x0, 304]
-	b	.L248
+	b	.L244
 	.size	nandc_get_ddr_para, .-nandc_get_ddr_para
 	.section	.text.nandc_set_if_mode,"ax",@progbits
 	.align	2
@@ -1078,7 +1070,7 @@ nandc_set_if_mode:
 	tst	w0, 6
 	ldr	x2, [x1, #:lo12:.LANCHOR13]
 	ldr	w1, [x2]
-	beq	.L250
+	beq	.L246
 	tst	x0, 4
 	orr	w1, w1, 24576
 	adrp	x0, .LANCHOR28
@@ -1090,7 +1082,7 @@ nandc_set_if_mode:
 	cmp	w0, 9
 	mov	w0, 4099
 	movk	w0, 0x10, lsl 16
-	bne	.L252
+	bne	.L248
 	mov	w3, 8321
 	str	w3, [x2, 8]
 	str	w0, [x2, 80]
@@ -1098,10 +1090,10 @@ nandc_set_if_mode:
 	str	w0, [x2, 84]
 	mov	w0, 39
 	str	w0, [x2, 84]
-.L253:
+.L249:
 	str	w1, [x2]
 	ret
-.L252:
+.L248:
 	mov	w3, 8322
 	str	w3, [x2, 344]
 	str	w0, [x2, 304]
@@ -1109,10 +1101,10 @@ nandc_set_if_mode:
 	str	w0, [x2, 308]
 	mov	w0, 39
 	str	w0, [x2, 308]
-	b	.L253
-.L250:
+	b	.L249
+.L246:
 	and	w1, w1, -8193
-	b	.L253
+	b	.L249
 	.size	nandc_set_if_mode, .-nandc_set_if_mode
 	.section	.text.nandc_cs,"ax",@progbits
 	.align	2
@@ -1143,14 +1135,14 @@ flash_wait_device_ready_raw:
 	mov	w20, w2
 	ldrb	w0, [x0, #:lo12:.LANCHOR18]
 	cmp	w0, w21
-	bhi	.L258
+	bhi	.L254
 	adrp	x1, .LANCHOR29
 	adrp	x0, .LC0
-	mov	w2, 691
+	mov	w2, 704
 	add	x1, x1, :lo12:.LANCHOR29
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L258:
+.L254:
 	adrp	x0, .LANCHOR30
 	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w5, [x0, w21, sxtw]
@@ -1164,7 +1156,7 @@ flash_wait_device_ready_raw:
 	and	w19, w19, 255
 	add	x2, x4, x2
 	mov	w4, 120
-.L261:
+.L257:
 	str	w4, [x2, 2056]
 	mov	w0, 120
 	str	w19, [x2, 2052]
@@ -1174,10 +1166,10 @@ flash_wait_device_ready_raw:
 	ldr	w3, [x2, 2048]
 	and	w3, w3, 255
 	bics	wzr, w20, w3
-	bne	.L261
+	bne	.L257
 	cmp	w3, 255
-	beq	.L261
-	bl	nandc_de_cs.constprop.30
+	beq	.L257
+	bl	nandc_de_cs.constprop.31
 	ldr	x21, [sp, 32]
 	mov	w0, w3
 	ldp	x19, x20, [sp, 16]
@@ -1204,31 +1196,31 @@ flash_wait_device_ready:
 	and	w4, w4, w5
 	and	w1, w3, w0
 	and	w4, w4, 255
-	bne	.L265
+	bne	.L261
 	adrp	x0, .LANCHOR0
 	adrp	x5, .LANCHOR1
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L266
+	cbz	w0, .L262
 	ldrb	w0, [x5, #:lo12:.LANCHOR1]
-	cbz	w0, .L265
-.L266:
+	cbz	w0, .L261
+.L262:
 	adrp	x0, .LANCHOR2
 	ldrh	w3, [x0, #:lo12:.LANCHOR2]
 	udiv	w0, w1, w3
 	mul	w0, w0, w3
 	sub	w3, w1, w0
 	ldrb	w1, [x5, #:lo12:.LANCHOR1]
-	cbz	w1, .L267
+	cbz	w1, .L263
 	add	w1, w0, w3, lsl 1
-.L265:
+.L261:
 	mov	w0, w4
 	b	flash_wait_device_ready_raw
-.L267:
+.L263:
 	adrp	x5, .LANCHOR3
 	add	x5, x5, :lo12:.LANCHOR3
 	ldrh	w3, [x5, w3, uxtw 1]
 	add	w1, w3, w0
-	b	.L265
+	b	.L261
 	.size	flash_wait_device_ready, .-flash_wait_device_ready
 	.section	.text.nandc_de_cs,"ax",@progbits
 	.align	2
@@ -1253,72 +1245,83 @@ nandc_wait_flash_ready_no_delay:
 	movk	w2, 0x1, lsl 16
 	adrp	x3, .LANCHOR13
 	add	x29, sp, 0
-.L277:
+.L273:
 	ldr	x0, [x3, #:lo12:.LANCHOR13]
 	ldr	w0, [x0]
 	str	w0, [x29, 24]
 	ldr	w0, [x29, 24]
-	tbnz	x0, 9, .L278
+	tbnz	x0, 9, .L274
 	mov	w0, 10
 	bl	timer_delay_ns
 	subs	w2, w2, #1
-	bne	.L277
+	bne	.L273
 	mov	w0, -1
-.L275:
+.L271:
 	ldp	x29, x30, [sp], 32
 	ret
-.L278:
+.L274:
 	mov	w0, 0
-	b	.L275
+	b	.L271
 	.size	nandc_wait_flash_ready_no_delay, .-nandc_wait_flash_ready_no_delay
 	.section	.text.zftl_flash_enter_slc_mode,"ax",@progbits
 	.align	2
 	.global	zftl_flash_enter_slc_mode
 	.type	zftl_flash_enter_slc_mode, %function
 zftl_flash_enter_slc_mode:
-	adrp	x1, .LANCHOR0
-	ldrb	w1, [x1, #:lo12:.LANCHOR0]
-	cbz	w1, .L281
-	adrp	x2, .LANCHOR13
-	and	x0, x0, 255
-	cmp	w1, 1
-	ldr	x4, [x2, #:lo12:.LANCHOR13]
-	bne	.L284
-.L304:
-	adrp	x1, .LANCHOR32+29
-	ldrb	w1, [x1, #:lo12:.LANCHOR32+29]
-	cbz	w1, .L281
-	add	x0, x0, 8
-	add	x0, x4, x0, lsl 8
-	str	w1, [x0, 8]
+	and	x4, x0, 255
+	adrp	x0, .LANCHOR0
+	ldrb	w0, [x0, #:lo12:.LANCHOR0]
+	cbz	w0, .L296
+	adrp	x1, .LANCHOR13
+	cmp	w0, 1
+	ldr	x5, [x1, #:lo12:.LANCHOR13]
+	bne	.L280
+	adrp	x0, .LANCHOR32+29
+	ldrb	w0, [x0, #:lo12:.LANCHOR32+29]
+	cbz	w0, .L296
+	add	x4, x4, 8
+	add	x4, x5, x4, lsl 8
+	str	w0, [x4, 8]
 	ret
-.L284:
-	cmp	w1, 2
-	bne	.L286
-	adrp	x1, .LANCHOR33
-	add	x1, x1, :lo12:.LANCHOR33
-	ldrb	w2, [x1, x0]
-	cbz	w2, .L281
-	strb	wzr, [x1, x0]
-	b	.L304
-.L286:
-	cmp	w1, 3
-	bne	.L281
-	adrp	x1, .LANCHOR33
-	sxtw	x2, w0
-	add	x1, x1, :lo12:.LANCHOR33
-	ldrb	w3, [x1, x2]
-	cbz	w3, .L281
-	ubfiz	x0, x0, 8, 8
+.L280:
 	stp	x29, x30, [sp, -16]!
-	add	x4, x4, x0
-	mov	w0, 239
+	cmp	w0, 2
 	add	x29, sp, 0
-	strb	wzr, [x1, x2]
+	bne	.L282
+	adrp	x0, .LANCHOR33
+	add	x0, x0, :lo12:.LANCHOR33
+	ldrb	w1, [x0, x4]
+	cbz	w1, .L277
+	adrp	x6, .LANCHOR32
+	add	x6, x6, :lo12:.LANCHOR32
+	strb	wzr, [x0, x4]
+	ldrb	w0, [x6, 29]
+	cbz	w0, .L277
+	bl	nandc_wait_flash_ready_no_delay
+	add	x4, x4, 8
+	add	x4, x5, x4, lsl 8
+	ldrb	w0, [x6, 29]
+	str	w0, [x4, 8]
+.L277:
+	ldp	x29, x30, [sp], 16
+	ret
+.L282:
+	cmp	w0, 3
+	bne	.L277
+	adrp	x6, .LANCHOR33
+	sxtw	x7, w4
+	add	x6, x6, :lo12:.LANCHOR33
+	ldrb	w0, [x6, x7]
+	cbz	w0, .L277
+	bl	nandc_wait_flash_ready_no_delay
+	ubfiz	x4, x4, 8, 8
+	add	x4, x5, x4
+	mov	w0, 239
+	strb	wzr, [x6, x7]
 	str	w0, [x4, 2056]
 	mov	w0, 145
 	str	w0, [x4, 2052]
-	mov	w0, 50
+	mov	w0, 100
 	bl	timer_delay_ns
 	str	wzr, [x4, 2048]
 	mov	w0, 1
@@ -1330,11 +1333,8 @@ zftl_flash_enter_slc_mode:
 	bl	nandc_wait_flash_ready_no_delay
 	mov	w0, 218
 	str	w0, [x4, 2056]
-	mov	w0, 150
-	bl	timer_delay_ns
-	ldp	x29, x30, [sp], 16
-	b	nandc_wait_flash_ready_no_delay
-.L281:
+	b	.L277
+.L296:
 	ret
 	.size	zftl_flash_enter_slc_mode, .-zftl_flash_enter_slc_mode
 	.section	.text.zftl_flash_exit_slc_mode,"ax",@progbits
@@ -1342,69 +1342,77 @@ zftl_flash_enter_slc_mode:
 	.global	zftl_flash_exit_slc_mode
 	.type	zftl_flash_exit_slc_mode, %function
 zftl_flash_exit_slc_mode:
-	adrp	x1, .LANCHOR0
-	ldrb	w1, [x1, #:lo12:.LANCHOR0]
-	cbz	w1, .L305
-	adrp	x2, .LANCHOR13
-	and	x0, x0, 255
-	cmp	w1, 1
-	ldr	x4, [x2, #:lo12:.LANCHOR13]
-	bne	.L308
-	adrp	x1, .LANCHOR32+30
-	ldrb	w1, [x1, #:lo12:.LANCHOR32+30]
-.L330:
-	cbz	w1, .L305
-	add	x0, x0, 8
-	add	x0, x4, x0, lsl 8
-	str	w1, [x0, 8]
+	and	x4, x0, 255
+	adrp	x0, .LANCHOR0
+	ldrb	w0, [x0, #:lo12:.LANCHOR0]
+	cbz	w0, .L319
+	adrp	x1, .LANCHOR13
+	cmp	w0, 1
+	ldr	x5, [x1, #:lo12:.LANCHOR13]
+	bne	.L301
+	adrp	x0, .LANCHOR32+30
+	ldrb	w0, [x0, #:lo12:.LANCHOR32+30]
+	cbz	w0, .L319
+	add	x4, x4, 8
+	add	x4, x5, x4, lsl 8
+	str	w0, [x4, 8]
 	ret
-.L308:
-	cmp	w1, 2
-	bne	.L310
-	adrp	x2, .LANCHOR33
-	add	x2, x2, :lo12:.LANCHOR33
-	ldrb	w1, [x2, x0]
-	cbnz	w1, .L305
-	adrp	x1, .LANCHOR32
-	add	x1, x1, :lo12:.LANCHOR32
-	mov	w5, 4
-	ldrb	w3, [x1, 12]
-	ldrb	w1, [x1, 30]
-	cmp	w3, 2
-	csel	w3, w3, w5, eq
-	strb	w3, [x2, x0]
-	b	.L330
-.L310:
-	cmp	w1, 3
-	bne	.L305
-	adrp	x2, .LANCHOR33
-	sxtw	x5, w0
-	add	x2, x2, :lo12:.LANCHOR33
-	ldrb	w1, [x2, x5]
-	cbnz	w1, .L305
-	adrp	x3, .LANCHOR32
-	add	x3, x3, :lo12:.LANCHOR32
+.L301:
 	stp	x29, x30, [sp, -16]!
-	ubfiz	x0, x0, 8, 8
-	add	x4, x4, x0
-	mov	w6, 4
+	cmp	w0, 2
 	add	x29, sp, 0
-	ldrb	w1, [x3, 12]
+	bne	.L303
+	adrp	x0, .LANCHOR33
+	add	x0, x0, :lo12:.LANCHOR33
+	ldrb	w1, [x0, x4]
+	cbnz	w1, .L298
+	adrp	x6, .LANCHOR32
+	add	x6, x6, :lo12:.LANCHOR32
+	mov	w2, 4
+	ldrb	w1, [x6, 12]
+	cmp	w1, 2
+	csel	w1, w1, w2, eq
+	strb	w1, [x0, x4]
+	ldrb	w0, [x6, 30]
+	cbz	w0, .L298
+	bl	nandc_wait_flash_ready_no_delay
+	add	x4, x4, 8
+	add	x4, x5, x4, lsl 8
+	ldrb	w0, [x6, 30]
+	str	w0, [x4, 8]
+.L298:
+	ldp	x29, x30, [sp], 16
+	ret
+.L303:
+	cmp	w0, 3
+	bne	.L298
+	adrp	x6, .LANCHOR33
+	sxtw	x7, w4
+	add	x6, x6, :lo12:.LANCHOR33
+	ldrb	w0, [x6, x7]
+	cbnz	w0, .L298
+	bl	nandc_wait_flash_ready_no_delay
+	ubfiz	x4, x4, 8, 8
+	adrp	x2, .LANCHOR32
+	add	x2, x2, :lo12:.LANCHOR32
+	add	x4, x5, x4
+	mov	w1, 4
+	ldrb	w0, [x2, 12]
+	cmp	w0, 2
+	csel	w0, w0, w1, eq
+	strb	w0, [x6, x7]
 	mov	w0, 239
 	str	w0, [x4, 2056]
 	mov	w0, 145
-	cmp	w1, 2
 	str	w0, [x4, 2052]
-	csel	w1, w1, w6, eq
-	mov	w0, 50
-	strb	w1, [x2, x5]
+	mov	w0, 100
 	bl	timer_delay_ns
-	ldrb	w0, [x3, 7]
+	ldrb	w0, [x2, 7]
 	cmp	w0, 9
 	mov	w0, 1
-	bne	.L313
+	bne	.L306
 	str	w0, [x4, 2048]
-.L314:
+.L307:
 	str	w0, [x4, 2048]
 	mov	w0, 150
 	str	wzr, [x4, 2048]
@@ -1413,15 +1421,12 @@ zftl_flash_exit_slc_mode:
 	bl	nandc_wait_flash_ready_no_delay
 	mov	w0, 223
 	str	w0, [x4, 2056]
-	mov	w0, 150
-	bl	timer_delay_ns
-	ldp	x29, x30, [sp], 16
-	b	nandc_wait_flash_ready_no_delay
-.L313:
-	ldrb	w1, [x2, x5]
+	b	.L298
+.L306:
+	ldrb	w1, [x6, x7]
 	str	w1, [x4, 2048]
-	b	.L314
-.L305:
+	b	.L307
+.L319:
 	ret
 	.size	zftl_flash_exit_slc_mode, .-zftl_flash_exit_slc_mode
 	.section	.text.flash_start_page_read,"ax",@progbits
@@ -1430,7 +1435,7 @@ zftl_flash_exit_slc_mode:
 	.type	flash_start_page_read, %function
 flash_start_page_read:
 	stp	x29, x30, [sp, -64]!
-	mov	w7, 24
+	mov	w8, 24
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 255
@@ -1440,7 +1445,7 @@ flash_start_page_read:
 	mov	w21, w1
 	ldrb	w0, [x0, #:lo12:.LANCHOR31]
 	str	x23, [sp, 48]
-	sub	w22, w7, w0
+	sub	w22, w8, w0
 	lsl	w19, w19, w0
 	sub	w19, w19, #1
 	lsr	w0, w1, w22
@@ -1450,75 +1455,75 @@ flash_start_page_read:
 	mov	x23, x0
 	ldrb	w1, [x0, #:lo12:.LANCHOR18]
 	cmp	w1, w19
-	bhi	.L332
+	bhi	.L322
 	adrp	x1, .LANCHOR34
 	adrp	x0, .LC0
-	mov	w2, 866
+	mov	w2, 882
 	add	x1, x1, :lo12:.LANCHOR34
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L332:
+.L322:
 	ldrb	w0, [x23, #:lo12:.LANCHOR18]
 	cmp	w0, w19
-	bls	.L331
+	bls	.L321
 	adrp	x0, .LANCHOR30
 	add	x0, x0, :lo12:.LANCHOR30
-	mov	w7, 1
-	lsl	w7, w7, w22
-	sub	w7, w7, #1
-	ldrb	w10, [x0, w19, sxtw]
+	mov	w8, 1
+	lsl	w8, w8, w22
+	sub	w8, w8, #1
+	ldrb	w11, [x0, w19, sxtw]
 	adrp	x0, .LANCHOR13
-	and	w7, w7, w21
+	and	w8, w8, w21
 	ubfx	x21, x21, 24, 2
-	ldr	x8, [x0, #:lo12:.LANCHOR13]
-	mov	w0, w10
+	ldr	x10, [x0, #:lo12:.LANCHOR13]
+	mov	w0, w11
 	bl	nandc_cs
-	cbnz	w21, .L334
-	mov	w0, w7
+	cbnz	w21, .L324
+	mov	w0, w8
 	bl	slc_phy_page_address_calc
-	mov	w7, w0
+	mov	w8, w0
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L335
-	mov	w0, w10
+	cbz	w0, .L325
+	mov	w0, w11
 	bl	zftl_flash_enter_slc_mode
-.L335:
-	ubfiz	x0, x10, 8, 8
+.L325:
+	ubfiz	x0, x11, 8, 8
 	ldr	x23, [sp, 48]
-	add	x0, x8, x0
-	and	w1, w7, 255
+	add	x0, x10, x0
+	and	w1, w8, 255
 	ldp	x21, x22, [sp, 32]
 	str	wzr, [x0, 2056]
 	str	wzr, [x0, 2052]
 	str	wzr, [x0, 2052]
 	str	w1, [x0, 2052]
-	lsr	w1, w7, 8
+	lsr	w1, w8, 8
 	str	w1, [x0, 2052]
-	lsr	w7, w7, 16
-	str	w7, [x0, 2052]
+	lsr	w8, w8, 16
+	str	w8, [x0, 2052]
 	str	w20, [x0, 2056]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 64
-	b	nandc_de_cs.constprop.30
-.L334:
+	b	nandc_de_cs.constprop.31
+.L324:
 	adrp	x0, .LANCHOR16
 	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L336
+	bne	.L326
 	adrp	x0, .LANCHOR35
 	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbnz	w0, .L336
-	sxtw	x0, w10
+	cbnz	w0, .L326
+	sxtw	x0, w11
 	add	x0, x0, 8
-	add	x0, x8, x0, lsl 8
+	add	x0, x10, x0, lsl 8
 	str	w21, [x0, 8]
-	b	.L335
-.L336:
-	mov	w0, w10
+	b	.L325
+.L326:
+	mov	w0, w11
 	bl	zftl_flash_exit_slc_mode
-	b	.L335
-.L331:
+	b	.L325
+.L321:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
@@ -1537,23 +1542,23 @@ nandc_wait_flash_ready:
 	mov	w2, 34464
 	adrp	x3, .LANCHOR13
 	movk	w2, 0x1, lsl 16
-.L343:
+.L333:
 	ldr	x0, [x3, #:lo12:.LANCHOR13]
 	ldr	w0, [x0]
 	str	w0, [x29, 24]
 	ldr	w0, [x29, 24]
-	tbnz	x0, 9, .L344
+	tbnz	x0, 9, .L334
 	mov	w0, 10
 	bl	timer_delay_ns
 	subs	w2, w2, #1
-	bne	.L343
+	bne	.L333
 	mov	w0, -1
-.L341:
+.L331:
 	ldp	x29, x30, [sp], 32
 	ret
-.L344:
+.L334:
 	mov	w0, 0
-	b	.L341
+	b	.L331
 	.size	nandc_wait_flash_ready, .-nandc_wait_flash_ready
 	.section	.text.sandisk_set_rr_para,"ax",@progbits
 	.align	2
@@ -1584,22 +1589,22 @@ sandisk_set_rr_para:
 	add	x2, x2, x1
 	add	x1, x0, x1
 	mov	x0, 0
-.L348:
+.L338:
 	cmp	w4, w0
-	bhi	.L351
+	bhi	.L341
 	ldp	x29, x30, [sp], 16
 	b	nandc_wait_flash_ready
-.L351:
+.L341:
 	cmp	w5, 67
-	bne	.L349
+	bne	.L339
 	ldrsb	w6, [x1, x0]
-.L353:
+.L343:
 	add	x0, x0, 1
 	str	w6, [x3]
-	b	.L348
-.L349:
+	b	.L338
+.L339:
 	ldrsb	w6, [x2, x0]
-	b	.L353
+	b	.L343
 	.size	sandisk_set_rr_para, .-sandisk_set_rr_para
 	.section	.text.toshiba_3d_set_tlc_rr_para,"ax",@progbits
 	.align	2
@@ -1671,7 +1676,7 @@ toshiba_3d_set_slc_rr_para:
 toshiba_tlc_set_rr_para:
 	mov	w6, 239
 	uxtw	x1, w1
-	cbz	w2, .L358
+	cbz	w2, .L348
 	stp	x29, x30, [sp, -16]!
 	mov	x4, x0
 	mov	x2, 7
@@ -1703,9 +1708,9 @@ toshiba_tlc_set_rr_para:
 	str	w0, [x4]
 	str	wzr, [x4]
 	ldp	x29, x30, [sp], 16
-.L361:
+.L351:
 	b	nandc_wait_flash_ready
-.L358:
+.L348:
 	str	w6, [x0, 8]
 	mov	w2, 20
 	str	w2, [x0, 4]
@@ -1716,7 +1721,7 @@ toshiba_tlc_set_rr_para:
 	str	wzr, [x0]
 	str	wzr, [x0]
 	str	wzr, [x0]
-	b	.L361
+	b	.L351
 	.size	toshiba_tlc_set_rr_para, .-toshiba_tlc_set_rr_para
 	.section	.text.flash_erase_duplane_block,"ax",@progbits
 	.align	2
@@ -1737,17 +1742,17 @@ flash_erase_duplane_block:
 	mov	w20, w3
 	mov	x19, x0
 	cmp	w1, w22
-	bhi	.L365
+	bhi	.L355
 	adrp	x1, .LANCHOR40
 	adrp	x0, .LC0
-	mov	w2, 598
+	mov	w2, 608
 	add	x1, x1, :lo12:.LANCHOR40
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L365:
+.L355:
 	ldrb	w0, [x19, #:lo12:.LANCHOR18]
 	cmp	w0, w22
-	bls	.L372
+	bls	.L362
 	adrp	x0, .LANCHOR30
 	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w22, [x0, w22, sxtw]
@@ -1758,21 +1763,21 @@ flash_erase_duplane_block:
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	add	x23, x19, 8
 	add	x23, x25, x23, lsl 8
-	tbz	x0, 4, .L367
-	adrp	x0, .LC32
+	tbz	x0, 4, .L357
+	adrp	x0, .LC31
 	mov	w3, w20
 	mov	w2, w21
 	mov	w1, w22
-	add	x0, x0, :lo12:.LC32
+	add	x0, x0, :lo12:.LC31
 	bl	printf
-.L367:
+.L357:
 	bl	nandc_wait_flash_ready
 	mov	w0, w22
 	bl	nandc_cs
 	mov	w0, w22
-	cbnz	w24, .L368
+	cbnz	w24, .L358
 	bl	zftl_flash_enter_slc_mode
-.L369:
+.L359:
 	add	x25, x25, x19, lsl 8
 	mov	w0, 96
 	str	w0, [x25, 2056]
@@ -1784,7 +1789,7 @@ flash_erase_duplane_block:
 	str	w0, [x25, 2052]
 	adrp	x0, .LANCHOR41
 	ldrb	w0, [x0, #:lo12:.LANCHOR41]
-	cbnz	w0, .L373
+	cbnz	w0, .L363
 	mov	w0, 208
 	str	w0, [x25, 2056]
 	mov	w19, 5
@@ -1792,7 +1797,7 @@ flash_erase_duplane_block:
 	mov	x0, x23
 	bl	flash_read_status
 	and	w5, w0, w19
-.L370:
+.L360:
 	mov	w0, 96
 	str	w0, [x25, 2056]
 	and	w0, w20, 255
@@ -1808,32 +1813,32 @@ flash_erase_duplane_block:
 	mov	x0, x23
 	bl	flash_read_status
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.30
+	bl	nandc_de_cs.constprop.31
 	and	w19, w2, w19
 	orr	w19, w19, w5
-	cbz	w19, .L371
-	adrp	x0, .LC33
+	cbz	w19, .L361
+	adrp	x0, .LC32
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC33
+	add	x0, x0, :lo12:.LC32
 	bl	printf
-.L371:
+.L361:
 	mov	w0, w19
-.L364:
+.L354:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L368:
+.L358:
 	bl	zftl_flash_exit_slc_mode
-	b	.L369
-.L373:
+	b	.L359
+.L363:
 	mov	w5, 0
-	b	.L370
-.L372:
+	b	.L360
+.L362:
 	mov	w0, -1
-	b	.L364
+	b	.L354
 	.size	flash_erase_duplane_block, .-flash_erase_duplane_block
 	.section	.text.flash_erase_block_en,"ax",@progbits
 	.align	2
@@ -1861,17 +1866,17 @@ flash_erase_block_en:
 	ldrb	w1, [x0, #:lo12:.LANCHOR18]
 	and	w19, w19, w2
 	cmp	w1, w22
-	bhi	.L382
+	bhi	.L372
 	adrp	x1, .LANCHOR42
 	adrp	x0, .LC0
-	mov	w2, 645
+	mov	w2, 657
 	add	x1, x1, :lo12:.LANCHOR42
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L382:
+.L372:
 	ldrb	w0, [x20, #:lo12:.LANCHOR18]
 	cmp	w0, w22
-	bls	.L388
+	bls	.L378
 	adrp	x0, .LANCHOR30
 	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w21, [x0, w22, sxtw]
@@ -1882,21 +1887,21 @@ flash_erase_block_en:
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	add	x25, x20, 8
 	add	x25, x26, x25, lsl 8
-	tbz	x0, 4, .L384
-	adrp	x0, .LC34
+	tbz	x0, 4, .L374
+	adrp	x0, .LC33
 	mov	w3, w24
 	mov	w2, w23
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC34
+	add	x0, x0, :lo12:.LC33
 	bl	printf
-.L384:
+.L374:
 	bl	nandc_wait_flash_ready
 	mov	w0, w21
 	bl	nandc_cs
 	mov	w0, w21
-	cbnz	w24, .L385
+	cbnz	w24, .L375
 	bl	zftl_flash_enter_slc_mode
-.L386:
+.L376:
 	add	x0, x26, x20, lsl 8
 	mov	w1, 96
 	str	w1, [x0, 2056]
@@ -1911,34 +1916,34 @@ flash_erase_block_en:
 	bl	nandc_wait_flash_ready
 	mov	x0, x25
 	bl	flash_read_status
-	mov	w19, w0
-	bl	nandc_de_cs.constprop.30
+	mov	w3, w0
+	bl	nandc_de_cs.constprop.31
 	mov	w0, 5
-	ands	w19, w19, w0
-	beq	.L387
+	ands	w3, w3, w0
+	beq	.L377
 	adrp	x0, .LANCHOR2
-	mov	w3, w19
 	mov	w1, w22
 	ldrh	w2, [x0, #:lo12:.LANCHOR2]
-	adrp	x0, .LC35
-	add	x0, x0, :lo12:.LC35
+	adrp	x0, .LC34
+	add	x0, x0, :lo12:.LC34
 	udiv	w2, w23, w2
 	bl	printf
-.L387:
-	mov	w0, w19
-.L381:
+	mov	w3, -1
+.L377:
+	mov	w0, w3
+.L371:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L385:
+.L375:
 	bl	zftl_flash_exit_slc_mode
-	b	.L386
-.L388:
+	b	.L376
+.L378:
 	mov	w0, -1
-	b	.L381
+	b	.L371
 	.size	flash_erase_block_en, .-flash_erase_block_en
 	.section	.text.flash_erase_block,"ax",@progbits
 	.align	2
@@ -1972,36 +1977,36 @@ flash_erase_all:
 	ldrb	w1, [x0, 13]
 	mul	w20, w20, w1
 	and	w20, w20, 65535
-.L398:
+.L388:
 	ldrb	w0, [x22]
 	cmp	w0, w19
-	bhi	.L401
+	bhi	.L391
 	ldp	x19, x20, [sp, 16]
 	mov	w1, 0
 	ldp	x21, x22, [sp, 32]
-	adrp	x0, .LC36
+	adrp	x0, .LC35
 	ldp	x23, x24, [sp, 48]
-	add	x0, x0, :lo12:.LC36
+	add	x0, x0, :lo12:.LC35
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	b	printf
-.L401:
+.L391:
 	add	x0, x24, :lo12:.LANCHOR30
 	mov	w21, 0
 	ldrb	w25, [x0, w19, sxtw]
-.L399:
+.L389:
 	cmp	w20, w21, uxth
-	bhi	.L400
+	bhi	.L390
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L398
-.L400:
+	b	.L388
+.L390:
 	ldrh	w1, [x23]
 	mov	w0, w25
 	mul	w1, w1, w21
 	add	w21, w21, 1
 	bl	flash_erase_block
-	b	.L399
+	b	.L389
 	.size	flash_erase_all, .-flash_erase_all
 	.section	.text.flash_start_plane_read,"ax",@progbits
 	.align	2
@@ -2030,23 +2035,23 @@ flash_start_plane_read:
 	and	w19, w19, w1
 	ldrb	w0, [x0, #:lo12:.LANCHOR18]
 	cmp	w0, w20
-	bhi	.L404
+	bhi	.L394
 	adrp	x1, .LANCHOR43
 	adrp	x0, .LC0
-	mov	w2, 965
+	mov	w2, 981
 	add	x1, x1, :lo12:.LANCHOR43
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L404:
+.L394:
 	adrp	x0, .LANCHOR30
 	add	x0, x0, :lo12:.LANCHOR30
-	ldrb	w7, [x0, w20, sxtw]
+	ldrb	w8, [x0, w20, sxtw]
 	adrp	x0, .LANCHOR13
-	ldr	x10, [x0, #:lo12:.LANCHOR13]
-	mov	w0, w7
+	ldr	x11, [x0, #:lo12:.LANCHOR13]
+	mov	w0, w8
 	bl	nandc_cs
-	adrp	x8, .LANCHOR16
-	cbnz	w21, .L405
+	adrp	x10, .LANCHOR16
+	cbnz	w21, .L395
 	mov	w0, w22
 	bl	slc_phy_page_address_calc
 	mov	w22, w0
@@ -2055,25 +2060,25 @@ flash_start_plane_read:
 	mov	w19, w0
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L406
-	mov	w0, w7
+	cbz	w0, .L396
+	mov	w0, w8
 	bl	zftl_flash_enter_slc_mode
-.L406:
+.L396:
 	adrp	x0, .LANCHOR20
-	and	x4, x7, 255
+	and	x4, x8, 255
 	add	x1, x0, :lo12:.LANCHOR20
-	add	x4, x10, x4, lsl 8
+	add	x4, x11, x4, lsl 8
 	and	w3, w22, 255
 	and	w6, w19, 255
 	lsr	w5, w19, 8
 	lsr	w19, w19, 16
-	ldrb	w11, [x1, 8]
+	ldrb	w7, [x1, 8]
 	ldrb	w2, [x1, 16]
-	str	w11, [x4, 2056]
+	str	w7, [x4, 2056]
 	cmp	w2, 1
 	lsr	w2, w22, 8
 	lsr	w22, w22, 16
-	bne	.L408
+	bne	.L398
 	str	wzr, [x4, 2052]
 	str	wzr, [x4, 2052]
 	str	w3, [x4, 2052]
@@ -2082,17 +2087,17 @@ flash_start_plane_read:
 	str	w22, [x4, 2052]
 	str	w0, [x4, 2056]
 	bl	nandc_wait_flash_ready
-	ldr	x0, [x8, #:lo12:.LANCHOR16]
+	ldr	x0, [x10, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L409
-	cbz	w21, .L409
+	bne	.L399
+	cbz	w21, .L399
 	str	w21, [x4, 2056]
-.L409:
+.L399:
 	str	wzr, [x4, 2056]
 	str	wzr, [x4, 2052]
 	str	wzr, [x4, 2052]
-.L422:
+.L412:
 	ldp	x21, x22, [sp, 32]
 	str	w6, [x4, 2052]
 	str	w5, [x4, 2052]
@@ -2101,39 +2106,39 @@ flash_start_plane_read:
 	str	w0, [x4, 2056]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
-	b	nandc_de_cs.constprop.30
-.L405:
-	ldr	x0, [x8, #:lo12:.LANCHOR16]
+	b	nandc_de_cs.constprop.31
+.L395:
+	ldr	x0, [x10, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L407
+	bne	.L397
 	adrp	x0, .LANCHOR35
 	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbnz	w0, .L407
-	sxtw	x0, w7
+	cbnz	w0, .L397
+	sxtw	x0, w8
 	add	x0, x0, 8
-	add	x0, x10, x0, lsl 8
+	add	x0, x11, x0, lsl 8
 	str	w21, [x0, 8]
-	b	.L406
-.L407:
-	mov	w0, w7
+	b	.L396
+.L397:
+	mov	w0, w8
 	bl	zftl_flash_exit_slc_mode
-	b	.L406
-.L408:
+	b	.L396
+.L398:
 	str	w3, [x4, 2052]
-	ldr	x1, [x8, #:lo12:.LANCHOR16]
+	ldr	x1, [x10, #:lo12:.LANCHOR16]
 	str	w2, [x4, 2052]
 	str	w22, [x4, 2052]
 	ldrb	w1, [x1, 12]
 	cmp	w1, 3
-	bne	.L411
-	cbz	w21, .L411
+	bne	.L401
+	cbz	w21, .L401
 	str	w21, [x4, 2056]
-.L411:
+.L401:
 	add	x0, x0, :lo12:.LANCHOR20
 	ldrb	w0, [x0, 9]
 	str	w0, [x4, 2056]
-	b	.L422
+	b	.L412
 	.size	flash_start_plane_read, .-flash_start_plane_read
 	.section	.text.flash_set_interface_mode,"ax",@progbits
 	.align	2
@@ -2154,39 +2159,39 @@ flash_set_interface_mode:
 	add	x21, x21, :lo12:.LANCHOR14
 	str	x25, [sp, 64]
 	mov	x25, 0
-.L436:
+.L426:
 	adrp	x0, .LANCHOR13
 	ldr	x19, [x0, #:lo12:.LANCHOR13]
 	lsl	x0, x25, 3
 	ldrb	w24, [x0, x22]
 	cmp	w24, 69
-	beq	.L424
+	beq	.L414
 	add	w0, w24, 119
 	cmp	w24, 44
 	and	w1, w0, 255
 	cset	w2, eq
 	cmp	w1, 18
-	bhi	.L437
+	bhi	.L427
 	mov	x0, 32769
 	movk	x0, 0x4, lsl 16
 	lsr	x0, x0, x1
 	mvn	x0, x0
-.L425:
+.L415:
 	and	w0, w0, 1
 	eor	w0, w0, 1
 	orr	w0, w2, w0
-	cbz	w0, .L426
-.L424:
+	cbz	w0, .L416
+.L414:
 	ldrb	w1, [x20]
 	cmp	w23, 1
-	bne	.L427
-	tbz	x1, 0, .L426
+	bne	.L417
+	tbz	x1, 0, .L416
 	ldr	w0, [x21]
-	tbz	x0, 12, .L428
-	adrp	x0, .LC37
-	add	x0, x0, :lo12:.LC37
+	tbz	x0, 12, .L418
+	adrp	x0, .LC36
+	add	x0, x0, :lo12:.LC36
 	bl	printf
-.L428:
+.L418:
 	add	x0, x19, x25, lsl 8
 	mov	w1, 239
 	cmp	w24, 44
@@ -2194,19 +2199,19 @@ flash_set_interface_mode:
 	mov	w1, 137
 	ccmp	w24, w1, 4, ne
 	mov	w1, 1
-	bne	.L429
+	bne	.L419
 	str	w1, [x0, 2052]
 	mov	w1, 5
-.L459:
+.L449:
 	str	w1, [x0, 2048]
-.L434:
+.L424:
 	str	wzr, [x0, 2048]
 	str	wzr, [x0, 2048]
 	str	wzr, [x0, 2048]
-.L426:
+.L416:
 	add	x25, x25, 1
 	cmp	x25, 4
-	bne	.L436
+	bne	.L426
 	bl	nandc_wait_flash_ready
 	ldr	x25, [sp, 64]
 	mov	w0, 0
@@ -2215,50 +2220,50 @@ flash_set_interface_mode:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L437:
+.L427:
 	mov	x0, 1
-	b	.L425
-.L429:
+	b	.L415
+.L419:
 	cmp	w24, 155
-	bne	.L431
+	bne	.L421
 	str	w1, [x0, 2052]
 	mov	w1, 3
-	b	.L459
-.L431:
+	b	.L449
+.L421:
 	mov	w2, 128
 	str	w2, [x0, 2052]
-	b	.L459
-.L427:
-	tbz	x1, 2, .L426
+	b	.L449
+.L417:
+	tbz	x1, 2, .L416
 	ldr	w0, [x21]
-	tbz	x0, 12, .L432
-	adrp	x0, .LC38
-	add	x0, x0, :lo12:.LC38
+	tbz	x0, 12, .L422
+	adrp	x0, .LC37
+	add	x0, x0, :lo12:.LC37
 	bl	printf
-.L432:
+.L422:
 	add	x0, x19, x25, lsl 8
 	mov	w1, 239
 	cmp	w24, 44
 	str	w1, [x0, 2056]
 	mov	w1, 137
 	ccmp	w24, w1, 4, ne
-	bne	.L433
+	bne	.L423
 	mov	w1, 1
 	str	w1, [x0, 2052]
 	mov	w1, 35
-	b	.L459
-.L433:
+	b	.L449
+.L423:
 	cmp	w24, 155
-	bne	.L435
+	bne	.L425
 	mov	w1, 1
 	str	w1, [x0, 2052]
 	mov	w1, 37
-	b	.L459
-.L435:
+	b	.L449
+.L425:
 	mov	w1, 128
 	str	w1, [x0, 2052]
 	str	wzr, [x0, 2048]
-	b	.L434
+	b	.L424
 	.size	flash_set_interface_mode, .-flash_set_interface_mode
 	.section	.text.mt_auto_read_calibration_config,"ax",@progbits
 	.align	2
@@ -2338,23 +2343,23 @@ flash_read_id:
 	strb	w0, [x8, 6]
 	ldr	w0, [x2, 2048]
 	strb	w0, [x8, 7]
-	bl	nandc_de_cs.constprop.30
+	bl	nandc_de_cs.constprop.31
 	ldrb	w2, [x8]
 	sub	w0, w2, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bhi	.L463
+	bhi	.L453
 	ldrb	w7, [x8, 5]
 	add	w1, w10, 1
 	ldrb	w6, [x8, 4]
-	adrp	x0, .LC39
+	adrp	x0, .LC38
 	ldrb	w5, [x8, 3]
-	add	x0, x0, :lo12:.LC39
+	add	x0, x0, :lo12:.LC38
 	ldrb	w4, [x8, 2]
 	ldrb	w3, [x8, 1]
 	ldp	x29, x30, [sp], 16
 	b	printf
-.L463:
+.L453:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	flash_read_id, .-flash_read_id
@@ -2425,8 +2430,8 @@ flash_read_otp_data:
 	str	w0, [x19, 2056]
 	str	w4, [x19, 2052]
 	mov	w1, w20
-	adrp	x0, .LC40
-	add	x0, x0, :lo12:.LC40
+	adrp	x0, .LC39
+	add	x0, x0, :lo12:.LC39
 	ldr	w2, [x19, 2048]
 	ldr	w3, [x19, 2048]
 	ldr	w4, [x19, 2048]
@@ -2445,12 +2450,12 @@ flash_read_otp_data:
 	str	w0, [x19, 2056]
 	bl	nandc_wait_flash_ready
 	mov	x0, 0
-.L469:
+.L459:
 	ldr	w1, [x19, 2048]
 	strb	w1, [x21, x0]
 	add	x0, x0, 1
 	cmp	x0, 16384
-	bne	.L469
+	bne	.L459
 	mov	w0, 239
 	str	w0, [x19, 2056]
 	mov	w0, 144
@@ -2464,66 +2469,74 @@ flash_read_otp_data:
 	str	wzr, [x19, 2048]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
-	b	nandc_de_cs.constprop.30
+	b	nandc_de_cs.constprop.31
 	.size	flash_read_otp_data, .-flash_read_otp_data
 	.section	.text.sandisk_prog_test_bad_block,"ax",@progbits
 	.align	2
 	.global	sandisk_prog_test_bad_block
 	.type	sandisk_prog_test_bad_block, %function
 sandisk_prog_test_bad_block:
-	stp	x29, x30, [sp, -32]!
-	mov	w5, w1
+	stp	x29, x30, [sp, -48]!
+	mov	w4, w1
 	adrp	x1, .LANCHOR13
 	and	x2, x0, 255
 	add	x29, sp, 0
-	ldr	x4, [x1, #:lo12:.LANCHOR13]
-	adrp	x1, .LANCHOR32+29
-	str	x19, [sp, 16]
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR32
+	ldr	x19, [x1, #:lo12:.LANCHOR13]
+	add	x1, x20, :lo12:.LANCHOR32
+	str	x21, [sp, 32]
 	mov	x0, x2
-	ldrb	w1, [x1, #:lo12:.LANCHOR32+29]
 	add	x2, x2, 8
-	add	x2, x4, x2, lsl 8
-	cbz	w1, .L473
-.L483:
+	ldrb	w1, [x1, 29]
+	add	x2, x19, x2, lsl 8
+	cbz	w1, .L463
+.L477:
 	ubfiz	x0, x0, 8, 8
 	str	w1, [x2, 8]
-	add	x4, x4, x0
+	add	x19, x19, x0
 	mov	w0, 128
-	str	w0, [x4, 2056]
-	and	w0, w5, 255
-	str	wzr, [x4, 2052]
-	str	wzr, [x4, 2052]
-	str	w0, [x4, 2052]
-	lsr	w0, w5, 8
-	str	w0, [x4, 2052]
-	lsr	w0, w5, 16
-	str	w0, [x4, 2052]
+	str	w0, [x19, 2056]
+	and	w0, w4, 255
+	str	wzr, [x19, 2052]
+	str	wzr, [x19, 2052]
+	str	w0, [x19, 2052]
+	lsr	w0, w4, 8
+	str	w0, [x19, 2052]
+	lsr	w0, w4, 16
+	str	w0, [x19, 2052]
 	mov	w0, 16
-	str	w0, [x4, 2056]
+	str	w0, [x19, 2056]
 	bl	nandc_wait_flash_ready
 	mov	w0, 112
-	str	w0, [x4, 2056]
+	str	w0, [x19, 2056]
 	mov	w0, 80
 	bl	timer_delay_ns
-	ldr	w2, [x4, 2048]
+	ldr	w2, [x19, 2048]
 	mov	w0, 5
-	ands	w19, w2, w0
-	beq	.L472
+	ands	w21, w2, w0
+	beq	.L465
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L472
-	adrp	x0, .LC41
-	mov	w1, w5
-	add	x0, x0, :lo12:.LC41
+	tbz	x0, 12, .L465
+	adrp	x0, .LC40
+	mov	w1, w4
+	add	x0, x0, :lo12:.LC40
 	bl	printf
-.L472:
-	mov	w0, w19
-	ldr	x19, [sp, 16]
-	ldp	x29, x30, [sp], 32
+.L465:
+	add	x20, x20, :lo12:.LANCHOR32
+	ldrb	w0, [x20, 30]
+	cbz	w0, .L462
+	str	w0, [x19, 2056]
+.L462:
+	mov	w0, w21
+	ldr	x21, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
 	ret
-.L473:
+.L463:
 	mov	w1, 162
-	b	.L483
+	b	.L477
 	.size	sandisk_prog_test_bad_block, .-sandisk_prog_test_bad_block
 	.section	.text.nandc_rdy_status,"ax",@progbits
 	.align	2
@@ -2556,18 +2569,18 @@ nandc_bch_sel:
 	ldrb	w1, [x1, #:lo12:.LANCHOR28]
 	cmp	w1, 9
 	adrp	x1, .LANCHOR13
-	bne	.L487
+	bne	.L481
 	ldr	x1, [x1, #:lo12:.LANCHOR13]
 	cmp	w0, 70
 	ldr	w2, [sp, 8]
 	str	w2, [x1, 16]
-	beq	.L493
+	beq	.L487
 	cmp	w0, 60
-	beq	.L494
+	beq	.L488
 	cmp	w0, 40
 	cset	w0, eq
 	add	w0, w0, 1
-.L488:
+.L482:
 	str	wzr, [sp]
 	ldr	w2, [sp]
 	bfi	w2, w0, 25, 3
@@ -2577,16 +2590,16 @@ nandc_bch_sel:
 	str	w0, [sp]
 	ldr	w0, [sp]
 	str	w0, [x1, 32]
-.L486:
+.L480:
 	add	sp, sp, 16
 	ret
-.L493:
+.L487:
 	mov	w0, 0
-	b	.L488
-.L494:
+	b	.L482
+.L488:
 	mov	w0, 3
-	b	.L488
-.L487:
+	b	.L482
+.L481:
 	ldr	x2, [x1, #:lo12:.LANCHOR13]
 	mov	w3, 16
 	ldr	w1, [sp, 8]
@@ -2599,20 +2612,20 @@ nandc_bch_sel:
 	ldr	w1, [sp]
 	and	w1, w1, -262145
 	str	w1, [sp]
-	bne	.L490
-.L497:
+	bne	.L484
+.L491:
 	ldr	w0, [sp]
 	and	w0, w0, -17
-	b	.L498
-.L490:
+	b	.L492
+.L484:
 	cmp	w0, 24
-	bne	.L492
+	bne	.L486
 	ldr	w0, [sp]
 	orr	w0, w0, 16
-.L498:
-	str	w0, [sp]
-	b	.L491
 .L492:
+	str	w0, [sp]
+	b	.L485
+.L486:
 	ldr	w1, [sp]
 	cmp	w0, 40
 	orr	w1, w1, 262144
@@ -2620,14 +2633,14 @@ nandc_bch_sel:
 	ldr	w1, [sp]
 	orr	w1, w1, 16
 	str	w1, [sp]
-	beq	.L497
-.L491:
+	beq	.L491
+.L485:
 	ldr	w0, [sp]
 	orr	w0, w0, 1
 	str	w0, [sp]
 	ldr	w0, [sp]
 	str	w0, [x2, 12]
-	b	.L486
+	b	.L480
 	.size	nandc_bch_sel, .-nandc_bch_sel
 	.section	.text.zftl_nandc_get_irq_status,"ax",@progbits
 	.align	2
@@ -2637,10 +2650,10 @@ zftl_nandc_get_irq_status:
 	adrp	x1, .LANCHOR28
 	ldrb	w1, [x1, #:lo12:.LANCHOR28]
 	cmp	w1, 9
-	bne	.L500
+	bne	.L494
 	ldr	w0, [x0, 296]
 	ret
-.L500:
+.L494:
 	ldr	w0, [x0, 372]
 	ret
 	.size	zftl_nandc_get_irq_status, .-zftl_nandc_get_irq_status
@@ -2683,7 +2696,7 @@ nandc_xfer_start:
 	ldrb	w0, [x0, #:lo12:.LANCHOR28]
 	cmp	w0, 9
 	add	w0, w1, 1
-	bne	.L506
+	bne	.L500
 	str	wzr, [x29, 56]
 	mov	w5, 1
 	ubfx	x0, x0, 1, 6
@@ -2713,14 +2726,14 @@ nandc_xfer_start:
 	str	w0, [x29, 56]
 	adrp	x0, .LANCHOR47
 	ldrb	w0, [x0, #:lo12:.LANCHOR47]
-	cbz	w0, .L507
+	cbz	w0, .L501
 	adrp	x0, .LANCHOR48
 	ldrb	w0, [x0, #:lo12:.LANCHOR48]
-	cbz	w0, .L507
+	cbz	w0, .L501
 	ldr	w0, [x29, 56]
 	orr	w0, w0, 512
 	str	w0, [x29, 56]
-.L507:
+.L501:
 	ldr	w0, [x29, 56]
 	add	x19, x4, :lo12:.LANCHOR49
 	add	x1, x2, 63
@@ -2783,12 +2796,12 @@ nandc_xfer_start:
 	str	w1, [x29, 56]
 	ldr	w1, [x29, 56]
 	str	w1, [x0, 16]
-.L505:
+.L499:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 80
 	ret
-.L506:
+.L500:
 	ldr	x5, [x21, #:lo12:.LANCHOR13]
 	mov	w7, 16
 	ubfx	x0, x0, 1, 6
@@ -2826,7 +2839,7 @@ nandc_xfer_start:
 	ldr	w5, [x29, 56]
 	bfi	w5, w0, 22, 6
 	str	w5, [x29, 56]
-	cbz	w20, .L509
+	cbz	w20, .L503
 	adrp	x0, .LANCHOR46
 	ubfx	x1, x1, 1, 7
 	ldr	x8, [x4, #:lo12:.LANCHOR49]
@@ -2837,11 +2850,11 @@ nandc_xfer_start:
 	mov	w0, 128
 	csel	w5, w5, w0, cc
 	mov	w0, 0
-.L511:
+.L505:
 	add	w7, w5, w0
 	cmp	x3, x1
-	bne	.L512
-.L513:
+	bne	.L506
+.L507:
 	add	x19, x4, :lo12:.LANCHOR49
 	ldr	x0, [x4, #:lo12:.LANCHOR49]
 	add	x1, x2, 63
@@ -2904,8 +2917,8 @@ nandc_xfer_start:
 	str	w1, [x29, 56]
 	ldr	w1, [x29, 56]
 	str	w1, [x0, 8]
-	b	.L505
-.L512:
+	b	.L499
+.L506:
 	ldrh	w10, [x3]
 	and	x0, x0, 4294967292
 	ldrh	w6, [x3, 2]
@@ -2913,11 +2926,11 @@ nandc_xfer_start:
 	orr	x6, x10, x6, lsl 16
 	str	w6, [x8, x0]
 	mov	w0, w7
-	b	.L511
-.L509:
+	b	.L505
+.L503:
 	ldr	x0, [x4, #:lo12:.LANCHOR49]
 	str	w6, [x0]
-	b	.L513
+	b	.L507
 	.size	nandc_xfer_start, .-nandc_xfer_start
 	.section	.text.nandc_set_seed,"ax",@progbits
 	.align	2
@@ -2938,10 +2951,10 @@ nandc_set_seed:
 	cmp	w1, 9
 	adrp	x1, .LANCHOR13
 	ldr	x1, [x1, #:lo12:.LANCHOR13]
-	bne	.L524
+	bne	.L518
 	str	w0, [x1, 520]
 	ret
-.L524:
+.L518:
 	str	w0, [x1, 336]
 	ret
 	.size	nandc_set_seed, .-nandc_set_seed
@@ -2956,40 +2969,40 @@ zftl_flash_de_init:
 	bl	nandc_wait_flash_ready
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L529
+	cbz	w0, .L523
 	adrp	x0, .LANCHOR19
 	ldrb	w0, [x0, #:lo12:.LANCHOR19]
-	cbnz	w0, .L529
+	cbnz	w0, .L523
 	adrp	x0, .LANCHOR28
 	ldrb	w0, [x0, #:lo12:.LANCHOR28]
 	cmp	w0, 9
-	beq	.L529
+	beq	.L523
 	mov	w0, 0
 	bl	zftl_flash_exit_slc_mode
-.L529:
+.L523:
 	adrp	x19, .LANCHOR21
 	mov	w0, 0
 	bl	hynix_reconfig_rr_para
 	ldrb	w0, [x19, #:lo12:.LANCHOR21]
-	cbz	w0, .L530
+	cbz	w0, .L524
 	adrp	x0, .LANCHOR45
 	ldrb	w0, [x0, #:lo12:.LANCHOR45]
-	tbz	x0, 0, .L530
+	tbz	x0, 0, .L524
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
 	bl	nandc_set_if_mode
 	strb	wzr, [x19, #:lo12:.LANCHOR21]
-.L530:
+.L524:
 	adrp	x3, .LANCHOR48
 	ldrb	w0, [x3, #:lo12:.LANCHOR48]
-	cbz	w0, .L531
+	cbz	w0, .L525
 	mov	w0, 0
 	strb	wzr, [x3, #:lo12:.LANCHOR48]
 	bl	nandc_set_seed
 	mov	w0, 1
 	strb	w0, [x3, #:lo12:.LANCHOR48]
-.L531:
+.L525:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -3024,7 +3037,7 @@ buf_reinit:
 	adrp	x0, .LANCHOR52
 	add	x1, x0, :lo12:.LANCHOR52
 	mov	w2, 0
-.L551:
+.L545:
 	and	w3, w2, 255
 	strb	wzr, [x1, 2]
 	add	w4, w3, 1
@@ -3034,7 +3047,7 @@ buf_reinit:
 	str	xzr, [x1, 16]
 	cmp	w2, 32
 	add	x1, x1, 64
-	bne	.L551
+	bne	.L545
 	add	x0, x0, :lo12:.LANCHOR52
 	mov	w1, -1
 	strb	w1, [x0, 1984]
@@ -3059,49 +3072,49 @@ buf_add_tail:
 	mov	x20, x1
 	ldrb	w1, [x19]
 	cmp	w1, 255
-	bne	.L559
+	bne	.L553
 	ldrb	w0, [x20, 1]
 	cmp	w0, 255
-	bne	.L555
+	bne	.L549
 	adrp	x1, .LANCHOR55
 	adrp	x0, .LC0
 	mov	w2, 74
 	add	x1, x1, :lo12:.LANCHOR55
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L555:
+.L549:
 	ldrb	w0, [x20, 1]
 	strb	w0, [x19]
-.L553:
+.L547:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L559:
+.L553:
 	adrp	x0, .LANCHOR52
 	add	x2, x0, :lo12:.LANCHOR52
 	mov	x19, x0
-.L560:
+.L554:
 	sbfiz	x0, x1, 6, 32
 	mov	w21, w1
 	ldrb	w1, [x2, x0]
 	cmp	w1, 255
-	bne	.L560
+	bne	.L554
 	ldrb	w0, [x20, 1]
 	cmp	w0, 255
-	bne	.L557
+	bne	.L551
 	adrp	x1, .LANCHOR55
 	adrp	x0, .LC0
 	mov	w2, 81
 	add	x1, x1, :lo12:.LANCHOR55
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L557:
+.L551:
 	add	x0, x19, :lo12:.LANCHOR52
 	sbfiz	x21, x21, 6, 32
 	ldrb	w1, [x20, 1]
 	strb	w1, [x0, x21]
-	b	.L553
+	b	.L547
 	.size	buf_add_tail, .-buf_add_tail
 	.section	.text.queue_read_cmd,"ax",@progbits
 	.align	2
@@ -3135,10 +3148,10 @@ zbuf_free:
 	adrp	x2, .LANCHOR53
 	and	w1, w1, 8
 	strb	w1, [x0, 2]
-	cbz	w1, .L565
+	cbz	w1, .L559
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L565
+	beq	.L559
 	stp	x29, x30, [sp, -16]!
 	mov	x1, x0
 	add	x0, x2, :lo12:.LANCHOR53
@@ -3150,7 +3163,7 @@ zbuf_free:
 	add	w0, w0, 1
 	strb	w0, [x1, #:lo12:.LANCHOR54]
 	ret
-.L565:
+.L559:
 	ldrb	w1, [x2, #:lo12:.LANCHOR53]
 	strb	w1, [x0]
 	adrp	x1, .LANCHOR54
@@ -3172,8 +3185,8 @@ buf_alloc:
 	adrp	x19, .LANCHOR54
 	and	w20, w0, 255
 	ldrb	w0, [x19, #:lo12:.LANCHOR54]
-	cbz	w0, .L578
-.L581:
+	cbz	w0, .L572
+.L575:
 	adrp	x2, .LANCHOR53
 	adrp	x1, .LANCHOR52
 	add	x0, x1, :lo12:.LANCHOR52
@@ -3181,8 +3194,8 @@ buf_alloc:
 	ubfiz	x4, x3, 6, 8
 	add	x0, x0, x4
 	mov	x4, x2
-	cbz	w20, .L579
-.L580:
+	cbz	w20, .L573
+.L574:
 	add	x1, x1, :lo12:.LANCHOR52
 	sbfiz	x3, x3, 6, 32
 	add	x2, x1, x3
@@ -3201,8 +3214,8 @@ buf_alloc:
 	mov	w1, -1
 	str	xzr, [x2, 16]
 	str	w1, [x2, 36]
-	b	.L577
-.L578:
+	b	.L571
+.L572:
 	mov	w2, 121
 	adrp	x1, .LANCHOR57
 	adrp	x0, .LC0
@@ -3210,18 +3223,18 @@ buf_alloc:
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	ldrb	w0, [x19, #:lo12:.LANCHOR54]
-	cbnz	w0, .L581
-.L583:
-	mov	x0, 0
+	cbnz	w0, .L575
 .L577:
+	mov	x0, 0
+.L571:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L579:
+.L573:
 	ldrb	w2, [x19, #:lo12:.LANCHOR54]
 	cmp	w2, 1
-	bne	.L580
-	b	.L583
+	bne	.L574
+	b	.L577
 	.size	buf_alloc, .-buf_alloc
 	.section	.text.buf_remove_buf,"ax",@progbits
 	.align	2
@@ -3231,30 +3244,30 @@ buf_remove_buf:
 	ldrb	w4, [x1, 1]
 	ldrb	w2, [x0]
 	cmp	w4, w2
-	bne	.L591
+	bne	.L585
 	ldrb	w1, [x1]
 	strb	w1, [x0]
-.L595:
+.L589:
 	mov	w0, 1
 	ret
-.L592:
+.L586:
 	mov	w3, w2
 	sbfiz	x2, x2, 6, 32
 	ldrb	w2, [x0, x2]
 	cmp	w4, w2
-	bne	.L593
+	bne	.L587
 	sbfiz	x3, x3, 6, 32
 	ldrb	w2, [x1]
 	strb	w2, [x0, x3]
 	mov	w0, -1
 	strb	w0, [x1]
-	b	.L595
-.L591:
+	b	.L589
+.L585:
 	adrp	x0, .LANCHOR52
 	add	x0, x0, :lo12:.LANCHOR52
-.L593:
+.L587:
 	cmp	w2, 255
-	bne	.L592
+	bne	.L586
 	mov	w0, 0
 	ret
 	.size	buf_remove_buf, .-buf_remove_buf
@@ -3269,29 +3282,29 @@ buf_remove_free:
 	adrp	x19, .LANCHOR54
 	mov	x20, x0
 	ldrb	w0, [x19, #:lo12:.LANCHOR54]
-	cbnz	w0, .L597
+	cbnz	w0, .L591
 	adrp	x1, .LANCHOR58
 	adrp	x0, .LC0
 	mov	w2, 172
 	add	x1, x1, :lo12:.LANCHOR58
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L597:
+.L591:
 	ldrb	w0, [x19, #:lo12:.LANCHOR54]
-	cbz	w0, .L596
+	cbz	w0, .L590
 	mov	x1, x20
 	adrp	x0, .LANCHOR53
 	add	x0, x0, :lo12:.LANCHOR53
 	bl	buf_remove_buf
 	cmp	w0, 1
-	bne	.L596
+	bne	.L590
 	ldrb	w0, [x19, #:lo12:.LANCHOR54]
 	sub	w0, w0, #1
 	strb	w0, [x19, #:lo12:.LANCHOR54]
 	ldrb	w0, [x20, 2]
 	orr	w0, w0, 1
 	strb	w0, [x20, 2]
-.L596:
+.L590:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -3339,8 +3352,8 @@ flash_mask_bad_block:
 	mov	w20, w1
 	ldrh	w19, [x0, 14]
 	ldrb	w1, [x0, 13]
-	adrp	x0, .LC42
-	add	x0, x0, :lo12:.LC42
+	adrp	x0, .LC41
+	add	x0, x0, :lo12:.LC41
 	mul	w19, w19, w1
 	mov	w1, w21
 	bl	printf
@@ -3399,11 +3412,11 @@ zftl_cache_flush:
 	.global	zftl_get_density
 	.type	zftl_get_density, %function
 zftl_get_density:
-	cbnz	w0, .L609
+	cbnz	w0, .L603
 	adrp	x0, .LANCHOR61
 	ldr	w0, [x0, #:lo12:.LANCHOR61]
 	ret
-.L609:
+.L603:
 	cmp	w0, 4
 	cset	w0, cc
 	lsl	w0, w0, 13
@@ -3423,6 +3436,13 @@ gc_hook:
 vpn_check:
 	ret
 	.size	vpn_check, .-vpn_check
+	.section	.text.ftl_scan_all_data,"ax",@progbits
+	.align	2
+	.global	ftl_scan_all_data
+	.type	ftl_scan_all_data, %function
+ftl_scan_all_data:
+	ret
+	.size	ftl_scan_all_data, .-ftl_scan_all_data
 	.section	.text.FtlGetCurEraseBlock,"ax",@progbits
 	.align	2
 	.global	FtlGetCurEraseBlock
@@ -3464,7 +3484,7 @@ gc_add_sblk:
 	and	w22, w1, 65535
 	stp	x23, x24, [sp, 48]
 	and	w23, w2, 65535
-	tbz	x0, 8, .L618
+	tbz	x0, 8, .L613
 	adrp	x1, .LANCHOR9
 	uxtw	x0, w19
 	mov	w3, w23
@@ -3474,8 +3494,8 @@ gc_add_sblk:
 	ldrh	w5, [x2, x0, lsl 1]
 	mov	w2, w22
 	add	x1, x1, x0, lsl 2
-	adrp	x0, .LC43
-	add	x0, x0, :lo12:.LC43
+	adrp	x0, .LC42
+	add	x0, x0, :lo12:.LC42
 	ldrb	w4, [x1, 2]
 	adrp	x1, .LANCHOR63
 	ldrh	w7, [x1, #:lo12:.LANCHOR63]
@@ -3484,34 +3504,34 @@ gc_add_sblk:
 	ldrh	w6, [x1, #:lo12:.LANCHOR64+56]
 	mov	w1, w19
 	bl	printf
-.L618:
+.L613:
 	adrp	x0, .LANCHOR6
 	mov	x20, x0
 	ldrh	w1, [x0, #:lo12:.LANCHOR6]
 	cmp	w1, w19
-	bhi	.L619
+	bhi	.L614
 	adrp	x1, .LANCHOR65
 	adrp	x0, .LC0
 	mov	w2, 454
 	add	x1, x1, :lo12:.LANCHOR65
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L619:
+.L614:
 	ldrh	w0, [x20, #:lo12:.LANCHOR6]
 	cmp	w0, w19
-	bhi	.L620
+	bhi	.L615
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L642
-	adrp	x0, .LC44
+	tbz	x0, 10, .L637
+	adrp	x0, .LC43
 	mov	w3, w23
 	mov	w2, w22
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC44
+	add	x0, x0, :lo12:.LC43
 	bl	printf
-.L642:
+.L637:
 	mov	w0, 0
-	b	.L617
-.L620:
+	b	.L612
+.L615:
 	adrp	x1, .LANCHOR9
 	uxtw	x0, w19
 	ldr	x1, [x1, #:lo12:.LANCHOR9]
@@ -3521,122 +3541,122 @@ gc_add_sblk:
 	add	x0, x1, x0, lsl 2
 	ldrb	w2, [x0, 2]
 	tst	w2, 224
-	bne	.L622
-	cbz	w3, .L642
+	bne	.L617
+	cbz	w3, .L637
 	mov	w2, 461
 	adrp	x1, .LANCHOR65
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR65
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L642
-.L622:
+	b	.L637
+.L617:
 	adrp	x0, .LANCHOR64
 	add	x1, x0, :lo12:.LANCHOR64
 	ldrh	w0, [x0, #:lo12:.LANCHOR64]
 	cmp	w0, w19
-	beq	.L642
+	beq	.L637
 	adrp	x24, .LANCHOR10
 	ldr	x0, [x24, #:lo12:.LANCHOR10]
 	ldrh	w4, [x0, 48]
 	cmp	w4, w19
-	beq	.L642
+	beq	.L637
 	ldrh	w4, [x0, 16]
 	cmp	w4, w19
-	beq	.L642
+	beq	.L637
 	ldrh	w4, [x0, 80]
 	cmp	w4, w19
-	beq	.L642
+	beq	.L637
 	ldrh	w5, [x1, 56]
 	add	x1, x1, 58
 	mov	w4, 0
-.L623:
+.L618:
 	cmp	w4, w5
-	bcc	.L624
-	cbnz	w22, .L628
+	bcc	.L619
+	cbnz	w22, .L623
 	adrp	x1, .LANCHOR66
 	ldrh	w6, [x1, #:lo12:.LANCHOR66]
 	cmp	w19, w6
-	beq	.L642
+	beq	.L637
 	adrp	x4, .LANCHOR67
 	add	x4, x4, :lo12:.LANCHOR67
 	mov	x1, 0
-.L627:
+.L622:
 	ldrh	w7, [x1, x4]
 	cmp	w19, w7
-	bne	.L626
+	bne	.L621
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L642
+	tbz	x0, 8, .L637
 	mov	w5, w6
 	mov	w4, w19
 	ubfx	x2, x2, 5, 3
 	mov	w1, w19
-	adrp	x0, .LC45
-	add	x0, x0, :lo12:.LC45
+	adrp	x0, .LC44
+	add	x0, x0, :lo12:.LC44
 	bl	printf
-	b	.L642
-.L624:
+	b	.L637
+.L619:
 	ldrh	w6, [x1], 2
 	cmp	w6, w19
-	beq	.L642
+	beq	.L637
 	add	w4, w4, 1
-	b	.L623
-.L626:
+	b	.L618
+.L621:
 	add	x1, x1, 2
 	cmp	x1, 16
-	bne	.L627
+	bne	.L622
 	ubfiz	x20, x23, 7, 16
 	add	x20, x20, 136
 	add	x20, x0, x20
-.L629:
+.L624:
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L630
+	tbz	x0, 8, .L625
 	adrp	x0, .LANCHOR63
 	mov	w4, w3
 	mov	w1, w19
 	ubfx	x3, x2, 5, 3
 	ldrh	w6, [x0, #:lo12:.LANCHOR63]
 	mov	w2, w22
-	adrp	x0, .LC46
-	add	x0, x0, :lo12:.LC46
+	adrp	x0, .LC45
+	add	x0, x0, :lo12:.LC45
 	bl	printf
-.L630:
+.L625:
 	mov	x0, x20
 	add	x1, x20, 128
 	mov	w2, 65535
-.L633:
+.L628:
 	ldrh	w3, [x0]
 	cmp	w3, w2
-	bne	.L631
+	bne	.L626
 	strh	w19, [x0]
-	cbz	w22, .L632
+	cbz	w22, .L627
 	ldr	x1, [x24, #:lo12:.LANCHOR10]
 	ldrh	w0, [x1, 124]
 	add	w0, w0, 1
 	strh	w0, [x1, 124]
-.L652:
+.L647:
 	mov	w0, 1
-.L617:
+.L612:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L628:
+.L623:
 	add	x20, x0, 392
-	b	.L629
-.L632:
+	b	.L624
+.L627:
 	ldr	x0, [x24, #:lo12:.LANCHOR10]
 	add	x23, x0, x23, uxth 1
 	ldrh	w0, [x23, 120]
 	add	w0, w0, 1
 	strh	w0, [x23, 120]
-	b	.L652
-.L631:
+	b	.L647
+.L626:
 	add	x0, x0, 2
 	cmp	x1, x0
-	bne	.L633
-	b	.L652
+	bne	.L628
+	b	.L647
 	.size	gc_add_sblk, .-gc_add_sblk
 	.section	.text.gc_mark_bad_ppa,"ax",@progbits
 	.align	2
@@ -3666,11 +3686,11 @@ gc_mark_bad_ppa:
 	add	x21, x20, :lo12:.LANCHOR64
 	mov	w3, w0
 	and	w22, w2, 65535
-	adrp	x0, .LC47
+	adrp	x0, .LC46
 	udiv	w19, w19, w1
 	mov	w2, w22
 	ldr	w1, [x21, 584]
-	add	x0, x0, :lo12:.LC47
+	add	x0, x0, :lo12:.LC46
 	and	w19, w19, 65535
 	bl	printf
 	mov	w1, w23
@@ -3679,31 +3699,31 @@ gc_mark_bad_ppa:
 	bl	gc_add_sblk
 	ldr	w0, [x21, 584]
 	mov	w1, 0
-.L654:
+.L649:
 	cmp	w1, w0
-	bcc	.L656
+	bcc	.L651
 	cmp	w0, 5
-	bhi	.L655
+	bhi	.L650
 	add	x20, x20, :lo12:.LANCHOR64
 	add	w1, w0, 1
 	str	w1, [x20, 584]
 	add	x20, x20, x0, uxtw 1
 	strh	w22, [x20, 588]
-.L655:
+.L650:
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L656:
+.L651:
 	add	x2, x21, x1, sxtw 1
 	ldrh	w2, [x2, 588]
 	cmp	w2, w22
-	beq	.L655
+	beq	.L650
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L654
+	b	.L649
 	.size	gc_mark_bad_ppa, .-gc_mark_bad_ppa
 	.section	.text.gc_get_src_ppa_from_index,"ax",@progbits
 	.align	2
@@ -3732,10 +3752,10 @@ gc_write_completed:
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-.L660:
+.L655:
 	ldrb	w20, [x23]
 	cmp	w20, 255
-	bne	.L673
+	bne	.L668
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -3743,7 +3763,7 @@ gc_write_completed:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L673:
+.L668:
 	lsl	x1, x20, 6
 	add	x0, x24, :lo12:.LANCHOR52
 	add	x2, x0, x1
@@ -3751,118 +3771,118 @@ gc_write_completed:
 	ldr	w1, [x2, 52]
 	strb	w0, [x23]
 	ldrh	w25, [x2, 48]
-	cbz	w1, .L661
+	cbz	w1, .L656
 	ldr	w2, [x2, 40]
 	adrp	x0, .LANCHOR64
 	add	x0, x0, :lo12:.LANCHOR64
 	mov	w3, 1
 	str	w2, [x0, 580]
 	strh	w3, [x0, 576]
-	adrp	x0, .LC48
-	add	x0, x0, :lo12:.LC48
+	adrp	x0, .LC47
+	add	x0, x0, :lo12:.LC47
 	bl	printf
 	adrp	x1, .LANCHOR72
 	adrp	x0, .LC0
-	mov	w2, 804
+	mov	w2, 809
 	add	x1, x1, :lo12:.LANCHOR72
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L661:
+.L656:
 	adrp	x27, .LANCHOR73
 	ldrb	w0, [x27, #:lo12:.LANCHOR73]
 	cmp	w0, 3
-	bne	.L662
+	bne	.L657
 	adrp	x0, .LANCHOR35
 	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbnz	w0, .L662
+	cbnz	w0, .L657
 	adrp	x0, .LANCHOR10
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldrb	w19, [x0, 89]
 	add	w19, w19, w19, lsl 1
 	and	w19, w19, 1023
-.L663:
+.L658:
 	adrp	x0, .LANCHOR14
 	adrp	x28, .LANCHOR76
 	and	x21, x25, 65535
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L664
+	tbz	x0, 8, .L659
 	ldr	x1, [x28, #:lo12:.LANCHOR76]
 	add	x0, x22, x20, lsl 6
 	ldrh	w3, [x0, 48]
 	ldrb	w4, [x1, x21]
 	mov	w1, w25
 	ldrb	w2, [x0, 1]
-	adrp	x0, .LC49
-	add	x0, x0, :lo12:.LC49
+	adrp	x0, .LC48
+	add	x0, x0, :lo12:.LC48
 	bl	printf
-.L664:
+.L659:
 	ldr	x1, [x28, #:lo12:.LANCHOR76]
 	add	x0, x22, x20, lsl 6
 	mov	x26, x21
 	ldrb	w0, [x0, 1]
 	ldrb	w1, [x1, x21]
 	cmp	w1, w0
-	beq	.L665
+	beq	.L660
 	adrp	x1, .LANCHOR72
 	adrp	x0, .LC0
-	mov	w2, 813
+	mov	w2, 818
 	add	x1, x1, :lo12:.LANCHOR72
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L665:
+.L660:
 	add	x20, x22, x20, lsl 6
 	ldrb	w0, [x20, 61]
 	cmp	w0, 3
-	beq	.L666
+	beq	.L661
 	ldrb	w0, [x27, #:lo12:.LANCHOR73]
 	cmp	w0, 3
-	bne	.L666
+	bne	.L661
 	adrp	x0, .LANCHOR77
 	ldrb	w0, [x0, #:lo12:.LANCHOR77]
-	cbnz	w0, .L666
+	cbnz	w0, .L661
 	adrp	x0, .LANCHOR35
 	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbnz	w0, .L666
+	cbnz	w0, .L661
 	adrp	x0, .LANCHOR74
 	ldrb	w0, [x0, #:lo12:.LANCHOR74]
-	cbz	w0, .L667
+	cbz	w0, .L662
 	adrp	x0, .LANCHOR75
 	ldrb	w0, [x0, #:lo12:.LANCHOR75]
-	cbnz	w0, .L666
-.L667:
+	cbnz	w0, .L661
+.L662:
 	ldr	x1, [x28, #:lo12:.LANCHOR76]
 	mov	x0, 0
 	add	x21, x1, x21
-.L668:
+.L663:
 	cmp	w19, w0, uxth
-	bls	.L660
+	bls	.L655
 	ldrb	w1, [x21, x0]
 	add	x0, x0, 1
 	add	x1, x22, x1, lsl 6
 	strb	wzr, [x1, 61]
-	b	.L668
-.L662:
+	b	.L663
+.L657:
 	adrp	x0, .LANCHOR74
 	ldrb	w0, [x0, #:lo12:.LANCHOR74]
-	cbz	w0, .L674
+	cbz	w0, .L669
 	adrp	x0, .LANCHOR75
 	ldrb	w0, [x0, #:lo12:.LANCHOR75]
 	cmp	w0, 0
 	cset	w19, ne
 	add	w19, w19, 1
-	b	.L663
-.L674:
+	b	.L658
+.L669:
 	mov	w19, 1
-	b	.L663
-.L666:
+	b	.L658
+.L661:
 	adrp	x20, .LANCHOR64
 	add	x20, x20, :lo12:.LANCHOR64
 	add	x19, x21, x19, uxth
 	mov	w21, -1
 	strh	w25, [x20, 572]
-.L669:
+.L664:
 	cmp	x19, x26
-	beq	.L660
+	beq	.L655
 	ldr	x1, [x28, #:lo12:.LANCHOR76]
 	ldrb	w0, [x1, x26]
 	strb	w21, [x1, x26]
@@ -3876,7 +3896,7 @@ gc_write_completed:
 	ldrb	w0, [x20, 7]
 	sub	w0, w0, #1
 	strb	w0, [x20, 7]
-	b	.L669
+	b	.L664
 	.size	gc_write_completed, .-gc_write_completed
 	.section	.text.gc_get_src_blk,"ax",@progbits
 	.align	2
@@ -3888,44 +3908,44 @@ gc_get_src_blk:
 	adrp	x0, .LANCHOR78
 	ldrb	w3, [x0, #:lo12:.LANCHOR78]
 	ldrh	w0, [x2, 124]
-	cbz	w0, .L690
+	cbz	w0, .L685
 	add	x1, x2, 392
 	mov	w4, 1
-.L691:
+.L686:
 	add	x5, x1, 128
 	mov	w6, 65535
-.L695:
+.L690:
 	ldrh	w0, [x1]
 	cmp	w0, w6
-	beq	.L693
+	beq	.L688
 	mov	w5, -1
 	strh	w5, [x1]
-	cbz	w4, .L694
+	cbz	w4, .L689
 	ldrh	w1, [x2, 124]
 	sub	w1, w1, #1
 	strh	w1, [x2, 124]
 	ret
-.L690:
+.L685:
 	add	x0, x2, x3, sxtw 1
 	ldrh	w0, [x0, 120]
-	cbz	w0, .L696
+	cbz	w0, .L691
 	ubfiz	x1, x3, 7, 8
 	mov	w4, 0
 	add	x1, x1, 136
 	add	x1, x2, x1
-	b	.L691
-.L694:
+	b	.L686
+.L689:
 	add	x2, x2, x3, uxtb 1
 	ldrh	w1, [x2, 120]
 	sub	w1, w1, #1
 	strh	w1, [x2, 120]
 	ret
-.L693:
+.L688:
 	add	x1, x1, 2
 	cmp	x1, x5
-	bne	.L695
+	bne	.L690
 	ret
-.L696:
+.L691:
 	mov	w0, 65535
 	ret
 	.size	gc_get_src_blk, .-gc_get_src_blk
@@ -3941,11 +3961,11 @@ gc_free_temp_buf:
 	add	x0, x20, :lo12:.LANCHOR64
 	stp	x21, x22, [sp, 32]
 	ldrb	w1, [x0, 7]
-	cbz	w1, .L705
+	cbz	w1, .L700
 	adrp	x1, .LANCHOR54
 	ldrb	w1, [x1, #:lo12:.LANCHOR54]
 	cmp	w1, 1
-	bhi	.L705
+	bhi	.L700
 	ldrh	w19, [x0, 572]
 	adrp	x2, .LANCHOR80
 	adrp	x0, .LANCHOR79
@@ -3959,34 +3979,34 @@ gc_free_temp_buf:
 	csel	w1, w0, w1, ls
 	adrp	x0, .LANCHOR52
 	add	x0, x0, :lo12:.LANCHOR52
-.L700:
+.L695:
 	cmp	w19, w1
-	bcc	.L703
-.L705:
+	bcc	.L698
+.L700:
 	mov	w0, 0
-	b	.L698
-.L703:
+	b	.L693
+.L698:
 	uxtw	x22, w19
 	ldrb	w2, [x4, x22]
 	cmp	w2, 255
-	beq	.L701
+	beq	.L696
 	sbfiz	x3, x2, 6, 32
 	add	x3, x0, x3
 	ldrb	w3, [x3, 61]
-	cbnz	w3, .L701
+	cbnz	w3, .L696
 	ubfiz	x2, x2, 6, 8
 	add	x0, x0, x2
 	bl	zbuf_free
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L702
+	tbz	x0, 8, .L697
 	ldr	x0, [x21, #:lo12:.LANCHOR76]
 	mov	w1, w19
 	ldrb	w2, [x0, x22]
-	adrp	x0, .LC50
-	add	x0, x0, :lo12:.LC50
+	adrp	x0, .LC49
+	add	x0, x0, :lo12:.LC49
 	bl	printf
-.L702:
+.L697:
 	ldr	x0, [x21, #:lo12:.LANCHOR76]
 	add	x20, x20, :lo12:.LANCHOR64
 	mov	w1, -1
@@ -3995,14 +4015,14 @@ gc_free_temp_buf:
 	sub	w0, w0, #1
 	strb	w0, [x20, 7]
 	mov	w0, 1
-.L698:
+.L693:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L701:
+.L696:
 	add	w19, w19, 1
-	b	.L700
+	b	.L695
 	.size	gc_free_temp_buf, .-gc_free_temp_buf
 	.section	.text.print_gc_debug_info,"ax",@progbits
 	.align	2
@@ -4019,8 +4039,8 @@ print_gc_debug_info:
 	ldrb	w4, [x2, #:lo12:.LANCHOR54]
 	ldrh	w3, [x0, 570]
 	ldrh	w2, [x0, 2]
-	adrp	x0, .LC51
-	add	x0, x0, :lo12:.LC51
+	adrp	x0, .LC50
+	add	x0, x0, :lo12:.LC50
 	b	printf
 	.size	print_gc_debug_info, .-print_gc_debug_info
 	.section	.text.zftl_get_gc_node,"ax",@progbits
@@ -4031,21 +4051,21 @@ zftl_get_gc_node:
 	and	w1, w1, 65535
 	and	w0, w0, 65535
 	cmp	w1, 5
-	bne	.L715
+	bne	.L710
 	mov	w1, w0
 	adrp	x0, .LANCHOR82
 	ldr	x0, [x0, #:lo12:.LANCHOR82]
-.L717:
+.L712:
 	b	_list_get_gc_head_node.isra.2
-.L715:
+.L710:
 	cmp	w1, 2
-	bne	.L716
+	bne	.L711
 	b	zftl_get_gc_node.part.9
-.L716:
+.L711:
 	mov	w1, w0
 	adrp	x0, .LANCHOR83
 	ldr	x0, [x0, #:lo12:.LANCHOR83]
-	b	.L717
+	b	.L712
 	.size	zftl_get_gc_node, .-zftl_get_gc_node
 	.section	.text.gc_search_src_blk,"ax",@progbits
 	.align	2
@@ -4066,9 +4086,9 @@ gc_search_src_blk:
 	stp	x27, x28, [sp, 80]
 	add	x0, x0, x21, sxtw 1
 	ldrh	w19, [x0, 120]
-	cbz	w19, .L719
+	cbz	w19, .L714
 	mov	w0, w19
-.L718:
+.L713:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -4076,21 +4096,21 @@ gc_search_src_blk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L719:
+.L714:
 	and	w20, w2, 255
-	cbnz	w21, .L721
+	cbnz	w21, .L716
 	adrp	x24, .LANCHOR84
 	adrp	x26, .LANCHOR14
-	adrp	x27, .LC52
+	adrp	x27, .LC51
 	and	w22, w20, 65535
 	add	x26, x26, :lo12:.LANCHOR14
-	add	x27, x27, :lo12:.LC52
+	add	x27, x27, :lo12:.LC51
 	strh	wzr, [x24, #:lo12:.LANCHOR84]
 	mov	w23, 0
 	mov	w25, 0
-.L722:
+.L717:
 	cmp	w25, w22
-	bcs	.L727
+	bcs	.L722
 	ldrh	w6, [x24, #:lo12:.LANCHOR84]
 	add	x7, x24, :lo12:.LANCHOR84
 	mov	w1, 3
@@ -4103,45 +4123,45 @@ gc_search_src_blk:
 	mov	w0, 65535
 	mov	w28, w1
 	cmp	w1, w0
-	beq	.L723
+	beq	.L718
 	ldr	w0, [x26]
 	adrp	x6, .LANCHOR9
 	uxtw	x4, w1
-	tbz	x0, 8, .L724
+	tbz	x0, 8, .L719
 	ldr	x0, [x6, #:lo12:.LANCHOR9]
 	stp	x6, x4, [x29, 96]
 	ldrh	w3, [x0, x4, lsl 1]
 	mov	x0, x27
 	bl	printf
 	ldp	x6, x4, [x29, 96]
-.L724:
+.L719:
 	ldr	x0, [x6, #:lo12:.LANCHOR9]
 	ldrh	w1, [x0, x4, lsl 1]
 	adrp	x0, .LANCHOR63
 	ldrh	w0, [x0, #:lo12:.LANCHOR63]
 	cmp	w1, w0
-	bcs	.L725
+	bcs	.L720
 	mov	w2, 0
 	mov	w1, 0
 	mov	w0, w28
 	bl	gc_add_sblk
-	cbz	w0, .L726
+	cbz	w0, .L721
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w22, w23
-	bcs	.L726
-.L727:
+	bcs	.L721
+.L722:
 	ldr	x0, [x29, 112]
-	tbz	x0, 1, .L729
+	tbz	x0, 1, .L724
 	adrp	x25, .LANCHOR86
 	adrp	x24, .LANCHOR85
 	add	x27, x25, :lo12:.LANCHOR86
 	add	x24, x24, :lo12:.LANCHOR85
 	mov	w28, 0
 	mov	w26, 65535
-.L730:
+.L725:
 	cmp	w28, w22
-	beq	.L734
+	beq	.L729
 	ldrh	w6, [x24]
 	mov	w1, 5
 	mov	w0, w6
@@ -4150,26 +4170,26 @@ gc_search_src_blk:
 	strh	w6, [x24]
 	and	w1, w0, 65535
 	cmp	w1, w26
-	beq	.L731
+	beq	.L726
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x1]
 	ldrh	w1, [x27]
 	cmp	w2, w1
-	bcs	.L731
+	bcs	.L726
 	mov	w2, 0
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L733
+	cbz	w0, .L728
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w22, w23
-	bcs	.L733
-.L734:
+	bcs	.L728
+.L729:
 	cmp	w23, w22
 	adrp	x0, .LANCHOR87
-	bcs	.L736
+	bcs	.L731
 	ldrh	w1, [x0, #:lo12:.LANCHOR87]
 	adrp	x3, .LANCHOR80
 	adrp	x0, .LANCHOR79
@@ -4179,102 +4199,102 @@ gc_search_src_blk:
 	mul	w0, w0, w3
 	sub	w0, w0, w1, lsr 2
 	cmp	w2, w0
-	bge	.L729
+	bge	.L724
 	add	w1, w2, w1, lsr 3
 	strh	w1, [x25, #:lo12:.LANCHOR86]
-.L729:
+.L724:
 	ldr	x0, [x29, 112]
-	tbz	x0, 0, .L737
+	tbz	x0, 0, .L732
 	cmp	w23, w22
-	bcs	.L737
+	bcs	.L732
 	adrp	x24, .LANCHOR88
 	add	x24, x24, :lo12:.LANCHOR88
 	mov	w25, 65535
-.L742:
+.L737:
 	ldrh	w6, [x24]
 	mov	w0, w6
 	bl	zftl_get_gc_node.part.9
 	add	w6, w6, 1
 	strh	w6, [x24]
 	cmp	w25, w0, uxth
-	beq	.L738
+	beq	.L733
 	mov	w2, 0
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L739
+	cbz	w0, .L734
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w22, w23
-	bhi	.L739
-.L740:
+	bhi	.L734
+.L735:
 	adrp	x0, .LANCHOR87
 	adrp	x1, .LANCHOR63
 	ldrh	w0, [x0, #:lo12:.LANCHOR87]
 	ldrh	w2, [x1, #:lo12:.LANCHOR63]
 	cmp	w2, w0, lsr 1
-	bls	.L737
+	bls	.L732
 	sub	w0, w2, w0, lsr 3
-	b	.L817
-.L725:
+	b	.L812
+.L720:
 	strh	wzr, [x24, #:lo12:.LANCHOR84]
-	b	.L727
-.L723:
+	b	.L722
+.L718:
 	strh	wzr, [x7]
-	b	.L727
-.L726:
+	b	.L722
+.L721:
 	add	w25, w25, 1
 	and	w25, w25, 65535
-	b	.L722
-.L731:
+	b	.L717
+.L726:
 	strh	wzr, [x24]
-	b	.L734
-.L733:
+	b	.L729
+.L728:
 	add	w28, w28, 1
 	and	w28, w28, 65535
-	b	.L730
-.L736:
+	b	.L725
+.L731:
 	ldrh	w1, [x25, #:lo12:.LANCHOR86]
 	ldrh	w0, [x0, #:lo12:.LANCHOR87]
 	cmp	w1, w0
-	bls	.L729
+	bls	.L724
 	sub	w0, w1, w0, lsr 3
 	strh	w0, [x25, #:lo12:.LANCHOR86]
-	b	.L729
-.L738:
+	b	.L724
+.L733:
 	strh	wzr, [x24]
-.L741:
+.L736:
 	cmp	w23, w22
-	bcs	.L740
+	bcs	.L735
 	adrp	x1, .LANCHOR63
 	adrp	x0, .LANCHOR87
 	ldrh	w2, [x1, #:lo12:.LANCHOR63]
 	ldrh	w0, [x0, #:lo12:.LANCHOR87]
 	cmp	w2, w0
-	bcs	.L737
+	bcs	.L732
 	add	w0, w2, w0, lsr 3
-.L817:
+.L812:
 	strh	w0, [x1, #:lo12:.LANCHOR63]
-.L737:
+.L732:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L764
+	tbz	x0, 8, .L759
 	ldr	w2, [x29, 112]
-	adrp	x0, .LC53
+	adrp	x0, .LC52
 	mov	w4, w20
 	mov	w3, w23
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC53
+	add	x0, x0, :lo12:.LC52
 	bl	printf
-.L764:
+.L759:
 	mov	w0, w23
-	b	.L718
-.L739:
+	b	.L713
+.L734:
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	cmp	w22, w19
-	bne	.L742
-	b	.L741
-.L721:
+	bne	.L737
+	b	.L736
+.L716:
 	adrp	x0, .LANCHOR64+574
 	strh	wzr, [x0, #:lo12:.LANCHOR64+574]
 	adrp	x0, .LANCHOR89
@@ -4283,7 +4303,7 @@ gc_search_src_blk:
 	and	w0, w0, 1
 	str	w0, [x29, 104]
 	ldr	x0, [x29, 112]
-	tbz	x0, 0, .L767
+	tbz	x0, 0, .L762
 	adrp	x1, .LANCHOR91
 	adrp	x25, .LANCHOR90
 	str	x1, [x29, 96]
@@ -4291,11 +4311,11 @@ gc_search_src_blk:
 	ldrh	w0, [x25, #:lo12:.LANCHOR90]
 	ldrh	w2, [x1, #:lo12:.LANCHOR91]
 	cmp	w0, w2, lsr 2
-	bcc	.L744
+	bcc	.L739
 	ldrh	w1, [x26, #:lo12:.LANCHOR92]
 	cmp	w1, w0
-	bls	.L768
-.L744:
+	bls	.L763
+.L739:
 	ldrh	w0, [x26, #:lo12:.LANCHOR92]
 	adrp	x22, .LANCHOR88
 	lsr	w0, w0, 2
@@ -4305,7 +4325,7 @@ gc_search_src_blk:
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L770
+	beq	.L765
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x3, [x2, #:lo12:.LANCHOR9]
@@ -4313,56 +4333,56 @@ gc_search_src_blk:
 	ldrh	w2, [x2, #:lo12:.LANCHOR87]
 	ldrh	w1, [x3, x1]
 	cmp	w1, w2, lsr 2
-	bcs	.L770
+	bcs	.L765
 	strh	wzr, [x22, #:lo12:.LANCHOR88]
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
 	cmp	w0, 0
 	cset	w23, ne
-.L746:
+.L741:
 	add	x22, x22, :lo12:.LANCHOR88
 	and	w28, w20, 65535
 	mov	w24, 64
 	mov	w27, 65535
-.L748:
+.L743:
 	ldrh	w6, [x22]
 	mov	w0, w6
 	bl	zftl_get_gc_node.part.9
 	add	w6, w6, 1
 	strh	w6, [x22]
 	cmp	w27, w0, uxth
-	beq	.L745
+	beq	.L740
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L747
+	cbz	w0, .L742
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w23, w28
-	bcs	.L745
-.L747:
+	bcs	.L740
+.L742:
 	sub	w24, w24, #1
 	ands	w24, w24, 65535
-	bne	.L748
-.L745:
+	bne	.L743
+.L740:
 	ldr	x0, [x29, 96]
 	ldrh	w1, [x25, #:lo12:.LANCHOR90]
 	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	cmp	w1, w0, lsr 3
-	bhi	.L765
+	bhi	.L760
 	ldrh	w0, [x26, #:lo12:.LANCHOR92]
 	add	w0, w0, 8
 	cmp	w1, w0
-	ble	.L743
-.L765:
+	ble	.L738
+.L760:
 	adrp	x24, .LANCHOR84
 	and	w26, w20, 65535
 	mov	w22, 64
 	mov	w25, 65535
 	strh	wzr, [x24, #:lo12:.LANCHOR84]
 	add	x24, x24, :lo12:.LANCHOR84
-.L750:
+.L745:
 	ldrh	w6, [x24]
 	mov	w1, 3
 	mov	w0, w6
@@ -4370,22 +4390,22 @@ gc_search_src_blk:
 	add	w6, w6, 1
 	strh	w6, [x24]
 	cmp	w25, w0, uxth
-	beq	.L743
+	beq	.L738
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L749
+	cbz	w0, .L744
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w23, w26
-	bcs	.L743
-.L749:
+	bcs	.L738
+.L744:
 	sub	w22, w22, #1
 	ands	w22, w22, 65535
-	bne	.L750
-.L743:
+	bne	.L745
+.L738:
 	ldr	x0, [x29, 112]
-	tbz	x0, 1, .L751
+	tbz	x0, 1, .L746
 	adrp	x24, .LANCHOR85
 	adrp	x28, .LANCHOR93
 	adrp	x25, .LANCHOR80
@@ -4394,7 +4414,7 @@ gc_search_src_blk:
 	add	x25, x25, :lo12:.LANCHOR80
 	strh	wzr, [x24, #:lo12:.LANCHOR85]
 	mov	w22, 64
-.L756:
+.L751:
 	ldrh	w6, [x26]
 	mov	w1, 5
 	mov	w0, w6
@@ -4404,9 +4424,9 @@ gc_search_src_blk:
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L752
+	beq	.L747
 	cmp	w20, 1
-	bne	.L753
+	bne	.L748
 	adrp	x3, .LANCHOR79
 	ldrb	w2, [x25]
 	ldrh	w3, [x3, #:lo12:.LANCHOR79]
@@ -4415,37 +4435,37 @@ gc_search_src_blk:
 	ldrh	w2, [x2, #:lo12:.LANCHOR87]
 	sub	w2, w3, w2, lsr 3
 	strh	w2, [x27]
-.L753:
+.L748:
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x1]
 	ldrh	w1, [x27]
 	cmp	w2, w1
-	bcs	.L754
+	bcs	.L749
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L755
+	cbz	w0, .L750
 	add	w5, w23, 1
 	add	w19, w19, 1
 	and	w23, w5, 65535
 	and	w19, w19, 65535
 	cmp	w23, w20
-	bcc	.L755
-.L752:
+	bcc	.L750
+.L747:
 	cmp	w23, w20
 	adrp	x0, .LANCHOR87
 	adrp	x3, .LANCHOR80
-	bcc	.L757
-	cbnz	w19, .L758
+	bcc	.L752
+	cbnz	w19, .L753
 	adrp	x1, .LANCHOR94
 	ldrh	w2, [x1, #:lo12:.LANCHOR94]
 	adrp	x1, .LANCHOR95
 	ldrh	w1, [x1, #:lo12:.LANCHOR95]
 	cmp	w2, w1
-	bls	.L758
-.L757:
+	bls	.L753
+.L752:
 	ldrh	w2, [x0, #:lo12:.LANCHOR87]
 	adrp	x0, .LANCHOR79
 	ldrb	w3, [x3, #:lo12:.LANCHOR80]
@@ -4455,12 +4475,12 @@ gc_search_src_blk:
 	mul	w0, w0, w3
 	sub	w0, w0, w2
 	cmp	w1, w0
-	bge	.L751
+	bge	.L746
 	add	w1, w1, w2
 	strh	w1, [x28, #:lo12:.LANCHOR93]
-.L751:
+.L746:
 	ldr	w0, [x29, 104]
-	cbz	w0, .L737
+	cbz	w0, .L732
 	adrp	x25, .LANCHOR84
 	adrp	x22, .LANCHOR96
 	adrp	x26, .LANCHOR91
@@ -4470,7 +4490,7 @@ gc_search_src_blk:
 	add	x27, x27, :lo12:.LANCHOR90
 	strh	wzr, [x25, #:lo12:.LANCHOR84]
 	mov	w24, 64
-.L762:
+.L757:
 	ldrh	w6, [x25, #:lo12:.LANCHOR84]
 	mov	w1, 3
 	mov	w0, w6
@@ -4480,69 +4500,69 @@ gc_search_src_blk:
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L759
+	beq	.L754
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w1, [x2, x1]
 	ldrh	w2, [x28]
 	cmp	w2, w1
-	bls	.L760
+	bls	.L755
 	cmp	w1, 2
-	bls	.L760
+	bls	.L755
 	ldrh	w2, [x26]
 	ldrh	w1, [x27]
 	cmp	w1, w2, lsr 1
-	bls	.L759
-.L760:
+	bls	.L754
+.L755:
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L761
+	cbz	w0, .L756
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w23, w20
-	bcs	.L759
-.L761:
+	bcs	.L754
+.L756:
 	sub	w24, w24, #1
 	ands	w24, w24, 65535
-	bne	.L762
-.L759:
+	bne	.L757
+.L754:
 	cmp	w23, w20
 	adrp	x0, .LANCHOR87
-	bcs	.L763
+	bcs	.L758
 	ldrh	w0, [x0, #:lo12:.LANCHOR87]
 	ldrh	w1, [x22, #:lo12:.LANCHOR96]
 	cmp	w1, w0, lsr 1
-	bls	.L737
+	bls	.L732
 	sub	w0, w1, w0, lsr 3
 	strh	w0, [x22, #:lo12:.LANCHOR96]
-	b	.L737
-.L770:
+	b	.L732
+.L765:
 	mov	w23, 0
-	b	.L746
-.L767:
+	b	.L741
+.L762:
 	mov	w23, 0
-	b	.L743
-.L754:
+	b	.L738
+.L749:
 	strh	wzr, [x24, #:lo12:.LANCHOR85]
-	b	.L752
-.L755:
+	b	.L747
+.L750:
 	sub	w22, w22, #1
 	ands	w22, w22, 65535
-	bne	.L756
-	b	.L752
-.L758:
+	bne	.L751
+	b	.L747
+.L753:
 	ldrh	w0, [x0, #:lo12:.LANCHOR87]
 	ldrb	w1, [x3, #:lo12:.LANCHOR80]
 	ldrh	w2, [x28, #:lo12:.LANCHOR93]
 	mul	w1, w1, w0
 	cmp	w2, w1
-	ble	.L751
+	ble	.L746
 	sub	w0, w2, w0, lsr 3
 	strh	w0, [x28, #:lo12:.LANCHOR93]
-	b	.L751
-.L763:
+	b	.L746
+.L758:
 	ldrh	w1, [x0, #:lo12:.LANCHOR87]
 	adrp	x0, .LANCHOR80
 	ldrh	w2, [x22, #:lo12:.LANCHOR96]
@@ -4550,13 +4570,13 @@ gc_search_src_blk:
 	mul	w0, w0, w1
 	sub	w0, w0, #32
 	cmp	w2, w0
-	bge	.L737
+	bge	.L732
 	add	w1, w2, w1, lsr 3
 	strh	w1, [x22, #:lo12:.LANCHOR96]
-	b	.L737
-.L768:
+	b	.L732
+.L763:
 	mov	w23, 0
-	b	.L745
+	b	.L740
 	.size	gc_search_src_blk, .-gc_search_src_blk
 	.section	.text.zftl_insert_free_list,"ax",@progbits
 	.align	2
@@ -4569,27 +4589,27 @@ zftl_insert_free_list:
 	add	x0, x0, x1, uxth 2
 	ldrb	w0, [x0, 2]
 	ands	w0, w0, 24
-	bne	.L819
+	bne	.L814
 	adrp	x2, .LANCHOR97
 	adrp	x0, .LANCHOR98
 	add	x2, x2, :lo12:.LANCHOR97
 	add	x0, x0, :lo12:.LANCHOR98
-.L821:
+.L816:
 	b	_insert_free_list
-.L819:
+.L814:
 	cmp	w0, 16
-	bne	.L820
+	bne	.L815
 	adrp	x2, .LANCHOR99
 	adrp	x0, .LANCHOR100
 	add	x2, x2, :lo12:.LANCHOR99
 	add	x0, x0, :lo12:.LANCHOR100
-	b	.L821
-.L820:
+	b	.L816
+.L815:
 	adrp	x2, .LANCHOR101
 	adrp	x0, .LANCHOR102
 	add	x2, x2, :lo12:.LANCHOR101
 	add	x0, x0, :lo12:.LANCHOR102
-	b	.L821
+	b	.L816
 	.size	zftl_insert_free_list, .-zftl_insert_free_list
 	.section	.text.zftl_insert_data_list,"ax",@progbits
 	.align	2
@@ -4603,30 +4623,30 @@ zftl_insert_data_list:
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L823
+	bne	.L818
 	adrp	x2, .LANCHOR92
 	adrp	x0, .LANCHOR12
 	add	x2, x2, :lo12:.LANCHOR92
 	add	x0, x0, :lo12:.LANCHOR12
-.L826:
+.L821:
 	b	_insert_data_list
-.L823:
+.L818:
 	cmp	w2, 96
-	bne	.L824
+	bne	.L819
 	adrp	x2, .LANCHOR90
 	adrp	x0, .LANCHOR83
 	add	x2, x2, :lo12:.LANCHOR90
 	add	x0, x0, :lo12:.LANCHOR83
-	b	.L826
-.L824:
+	b	.L821
+.L819:
 	cmp	w2, 160
-	bne	.L822
+	bne	.L817
 	adrp	x2, .LANCHOR94
 	adrp	x0, .LANCHOR82
 	add	x2, x2, :lo12:.LANCHOR94
 	add	x0, x0, :lo12:.LANCHOR82
-	b	.L826
-.L822:
+	b	.L821
+.L817:
 	ret
 	.size	zftl_insert_data_list, .-zftl_insert_data_list
 	.section	.text.zftl_gc_get_free_sblk,"ax",@progbits
@@ -4645,40 +4665,40 @@ zftl_gc_get_free_sblk:
 	ldrh	w19, [x0, 588]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L828
-	cbnz	w21, .L828
+	beq	.L823
+	cbnz	w21, .L823
 	mov	w1, w19
-	adrp	x0, .LC54
-	add	x0, x0, :lo12:.LC54
+	adrp	x0, .LC53
+	add	x0, x0, :lo12:.LC53
 	bl	printf
 	ldr	x0, [x20, #:lo12:.LANCHOR10]
 	mov	w1, -1
 	strh	w1, [x0, 588]
-.L829:
+.L824:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L828:
+.L823:
 	adrp	x2, .LANCHOR99
 	adrp	x20, .LANCHOR101
 	ldrh	w0, [x2, #:lo12:.LANCHOR99]
 	ldrh	w1, [x20, #:lo12:.LANCHOR101]
 	cmp	w0, w1
-	bls	.L830
+	bls	.L825
 	lsr	w1, w0, 3
 	cmp	w21, 0
 	adrp	x0, .LANCHOR100
 	csel	w1, w1, wzr, ne
 	add	x2, x2, :lo12:.LANCHOR99
 	add	x0, x0, :lo12:.LANCHOR100
-.L844:
+.L839:
 	bl	_list_pop_index_node
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	bne	.L835
+	bne	.L830
 	adrp	x0, .LANCHOR97
 	ldrh	w5, [x20, #:lo12:.LANCHOR101]
 	mov	w2, w22
@@ -4686,14 +4706,14 @@ zftl_gc_get_free_sblk:
 	ldrh	w4, [x0, #:lo12:.LANCHOR97]
 	adrp	x0, .LANCHOR98
 	ldr	x3, [x0, #:lo12:.LANCHOR98]
-	adrp	x0, .LC55
-	add	x0, x0, :lo12:.LC55
+	adrp	x0, .LC54
+	add	x0, x0, :lo12:.LC54
 	bl	printf
-.L835:
-	cbz	w21, .L829
+.L830:
+	cbz	w21, .L824
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L829
+	tbz	x0, 8, .L824
 	adrp	x4, .LANCHOR9
 	adrp	x1, .LANCHOR7
 	uxtw	x3, w19
@@ -4707,26 +4727,26 @@ zftl_gc_get_free_sblk:
 	ldrh	w5, [x1, x0]
 	ubfx	x4, x4, 11, 8
 	mov	w1, w19
-	adrp	x0, .LC56
+	adrp	x0, .LC55
 	ubfx	x3, x2, 3, 2
 	and	w5, w5, 2047
 	ubfx	x2, x2, 5, 3
-	add	x0, x0, :lo12:.LC56
+	add	x0, x0, :lo12:.LC55
 	bl	printf
-	b	.L829
-.L830:
-	cbnz	w21, .L833
+	b	.L824
+.L825:
+	cbnz	w21, .L828
 	lsr	w1, w1, 2
-.L834:
+.L829:
 	adrp	x0, .LANCHOR102
 	add	x2, x20, :lo12:.LANCHOR101
 	add	x0, x0, :lo12:.LANCHOR102
-	b	.L844
-.L833:
+	b	.L839
+.L828:
 	mov	w1, 7
 	mul	w1, w0, w1
 	lsr	w1, w1, 3
-	b	.L834
+	b	.L829
 	.size	zftl_gc_get_free_sblk, .-zftl_gc_get_free_sblk
 	.section	.text.zftl_get_free_sblk,"ax",@progbits
 	.align	2
@@ -4739,36 +4759,36 @@ zftl_get_free_sblk:
 	and	w20, w1, 65535
 	str	x21, [sp, 32]
 	cmp	w20, 5
-	bne	.L846
+	bne	.L841
 	adrp	x2, .LANCHOR99
 	adrp	x0, .LANCHOR101
 	ldrh	w3, [x2, #:lo12:.LANCHOR99]
 	ldrh	w1, [x0, #:lo12:.LANCHOR101]
 	cmp	w3, w1
-	bcc	.L847
+	bcc	.L842
 	adrp	x4, .LANCHOR97
 	ldrh	w4, [x4, #:lo12:.LANCHOR97]
 	cmp	w4, w3
-	bls	.L848
-	cbz	w1, .L848
-.L847:
+	bls	.L843
+	cbz	w1, .L843
+.L842:
 	add	x2, x0, :lo12:.LANCHOR101
 	lsr	w1, w1, 1
-.L867:
+.L862:
 	adrp	x0, .LANCHOR102
 	add	x0, x0, :lo12:.LANCHOR102
-	b	.L866
-.L848:
+	b	.L861
+.L843:
 	adrp	x0, .LANCHOR100
 	add	x2, x2, :lo12:.LANCHOR99
 	add	x0, x0, :lo12:.LANCHOR100
 	mov	w1, 0
-.L866:
+.L861:
 	bl	_list_pop_index_node
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	bne	.L851
+	bne	.L846
 	adrp	x0, .LANCHOR101
 	mov	w2, w20
 	mov	w1, w19
@@ -4777,53 +4797,53 @@ zftl_get_free_sblk:
 	ldrh	w4, [x0, #:lo12:.LANCHOR97]
 	adrp	x0, .LANCHOR98
 	ldr	x3, [x0, #:lo12:.LANCHOR98]
-	adrp	x0, .LC55
-	add	x0, x0, :lo12:.LC55
+	adrp	x0, .LC54
+	add	x0, x0, :lo12:.LC54
 	bl	printf
-	b	.L851
-.L846:
+	b	.L846
+.L841:
 	adrp	x21, .LANCHOR10
 	and	w0, w0, 65535
 	ldr	x1, [x21, #:lo12:.LANCHOR10]
 	ldrh	w19, [x1, 590]
 	mov	w1, 65535
 	cmp	w19, w1
-	beq	.L850
+	beq	.L845
 	cmp	w20, 1
-	beq	.L850
+	beq	.L845
 	mov	w1, w19
-	adrp	x0, .LC57
-	add	x0, x0, :lo12:.LC57
+	adrp	x0, .LC56
+	add	x0, x0, :lo12:.LC56
 	bl	printf
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	mov	w1, -1
 	strh	w1, [x0, 590]
-.L851:
+.L846:
 	mov	w0, w19
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L850:
+.L845:
 	adrp	x2, .LANCHOR97
 	adrp	x4, .LANCHOR101
 	ldrh	w1, [x2, #:lo12:.LANCHOR97]
 	ldrh	w3, [x4, #:lo12:.LANCHOR101]
 	cmp	w1, w3
-	bcc	.L852
+	bcc	.L847
 	adrp	x5, .LANCHOR99
 	ldrh	w5, [x5, #:lo12:.LANCHOR99]
 	cmp	w5, w1
-	bls	.L853
-	cbz	w3, .L853
-.L852:
+	bls	.L848
+	cbz	w3, .L848
+.L847:
 	cmp	w20, 1
 	lsr	w3, w3, 1
 	csel	w0, w3, w0, eq
 	add	x2, x4, :lo12:.LANCHOR101
 	mov	w1, w0
-	b	.L867
-.L853:
+	b	.L862
+.L848:
 	lsr	w1, w1, 1
 	cmp	w20, 1
 	csel	w0, w1, w0, eq
@@ -4831,7 +4851,7 @@ zftl_get_free_sblk:
 	mov	w1, w0
 	adrp	x0, .LANCHOR98
 	add	x0, x0, :lo12:.LANCHOR98
-	b	.L866
+	b	.L861
 	.size	zftl_get_free_sblk, .-zftl_get_free_sblk
 	.section	.text.zftl_remove_data_node,"ax",@progbits
 	.align	2
@@ -4845,30 +4865,30 @@ zftl_remove_data_node:
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L869
+	bne	.L864
 	adrp	x2, .LANCHOR92
 	adrp	x0, .LANCHOR12
 	add	x2, x2, :lo12:.LANCHOR92
 	add	x0, x0, :lo12:.LANCHOR12
-.L872:
+.L867:
 	b	_list_remove_node
-.L869:
+.L864:
 	cmp	w2, 96
-	bne	.L870
+	bne	.L865
 	adrp	x2, .LANCHOR90
 	adrp	x0, .LANCHOR83
 	add	x2, x2, :lo12:.LANCHOR90
 	add	x0, x0, :lo12:.LANCHOR83
-	b	.L872
-.L870:
+	b	.L867
+.L865:
 	cmp	w2, 160
-	bne	.L868
+	bne	.L863
 	adrp	x2, .LANCHOR94
 	adrp	x0, .LANCHOR82
 	add	x2, x2, :lo12:.LANCHOR94
 	add	x0, x0, :lo12:.LANCHOR82
-	b	.L872
-.L868:
+	b	.L867
+.L863:
 	ret
 	.size	zftl_remove_data_node, .-zftl_remove_data_node
 	.section	.text.zftl_remove_free_node,"ax",@progbits
@@ -4882,27 +4902,27 @@ zftl_remove_free_node:
 	add	x0, x0, x1, uxth 2
 	ldrb	w0, [x0, 2]
 	ands	w0, w0, 24
-	bne	.L874
+	bne	.L869
 	adrp	x2, .LANCHOR97
 	adrp	x0, .LANCHOR98
 	add	x2, x2, :lo12:.LANCHOR97
 	add	x0, x0, :lo12:.LANCHOR98
-.L876:
+.L871:
 	b	_list_remove_node
-.L874:
+.L869:
 	cmp	w0, 16
-	bne	.L875
+	bne	.L870
 	adrp	x2, .LANCHOR99
 	adrp	x0, .LANCHOR100
 	add	x2, x2, :lo12:.LANCHOR99
 	add	x0, x0, :lo12:.LANCHOR100
-	b	.L876
-.L875:
+	b	.L871
+.L870:
 	adrp	x2, .LANCHOR101
 	adrp	x0, .LANCHOR102
 	add	x2, x2, :lo12:.LANCHOR101
 	add	x0, x0, :lo12:.LANCHOR102
-	b	.L876
+	b	.L871
 	.size	zftl_remove_free_node, .-zftl_remove_free_node
 	.section	.text.zftl_list_update_data_list,"ax",@progbits
 	.align	2
@@ -4916,30 +4936,30 @@ zftl_list_update_data_list:
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L878
+	bne	.L873
 	adrp	x2, .LANCHOR92
 	adrp	x0, .LANCHOR12
 	add	x2, x2, :lo12:.LANCHOR92
 	add	x0, x0, :lo12:.LANCHOR12
-.L881:
+.L876:
 	b	_list_update_data_list
-.L878:
+.L873:
 	cmp	w2, 96
-	bne	.L879
+	bne	.L874
 	adrp	x2, .LANCHOR90
 	adrp	x0, .LANCHOR83
 	add	x2, x2, :lo12:.LANCHOR90
 	add	x0, x0, :lo12:.LANCHOR83
-	b	.L881
-.L879:
+	b	.L876
+.L874:
 	cmp	w2, 160
-	bne	.L877
+	bne	.L872
 	adrp	x2, .LANCHOR94
 	adrp	x0, .LANCHOR82
 	add	x2, x2, :lo12:.LANCHOR94
 	add	x0, x0, :lo12:.LANCHOR82
-	b	.L881
-.L877:
+	b	.L876
+.L872:
 	ret
 	.size	zftl_list_update_data_list, .-zftl_list_update_data_list
 	.section	.text.print_list_info,"ax",@progbits
@@ -4955,21 +4975,21 @@ print_list_info:
 	stp	x19, x20, [sp, 48]
 	mov	x19, x0
 	stp	x21, x22, [sp, 64]
-	adrp	x0, .LC58
+	adrp	x0, .LC57
 	stp	x23, x24, [sp, 80]
-	add	x0, x0, :lo12:.LC58
+	add	x0, x0, :lo12:.LC57
 	bl	printf
 	ldr	x19, [x19]
-	cbz	x19, .L882
+	cbz	x19, .L877
 	mov	x24, -6148914691236517206
-	adrp	x22, .LC59
+	adrp	x22, .LC58
 	adrp	x21, .LANCHOR103
-	add	x22, x22, :lo12:.LC59
+	add	x22, x22, :lo12:.LC58
 	add	x21, x21, :lo12:.LANCHOR103
 	mov	w20, 0
 	adrp	x23, .LANCHOR4
 	movk	x24, 0xaaab, lsl 0
-.L886:
+.L881:
 	ldr	x2, [x23, #:lo12:.LANCHOR4]
 	adrp	x1, .LANCHOR7
 	adrp	x8, .LANCHOR9
@@ -5002,7 +5022,7 @@ print_list_info:
 	ldrh	w19, [x19]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L882
+	beq	.L877
 	ldr	x0, [x23, #:lo12:.LANCHOR4]
 	mov	w1, 6
 	add	w20, w20, 1
@@ -5010,8 +5030,8 @@ print_list_info:
 	umaddl	x19, w19, w1, x0
 	ldrh	w0, [x21]
 	cmp	w0, w20
-	bcs	.L886
-.L882:
+	bcs	.L881
+.L877:
 	ldp	x19, x20, [sp, 48]
 	ldp	x21, x22, [sp, 64]
 	ldp	x23, x24, [sp, 80]
@@ -5067,36 +5087,36 @@ ftl_tmp_into_update:
 	ldr	x0, [x0, #:lo12:.LANCHOR104]
 	ldr	w1, [x0, 16]
 	cmp	w1, 2048
-	bls	.L891
+	bls	.L886
 	ldr	w2, [x0, 20]
 	add	w2, w2, w1, lsr 11
 	and	w1, w1, 2047
 	stp	w1, w2, [x0, 16]
-.L891:
+.L886:
 	ldr	w1, [x0, 24]
 	cmp	w1, 2048
-	bls	.L892
+	bls	.L887
 	ldr	w2, [x0, 28]
 	add	w2, w2, w1, lsr 11
 	and	w1, w1, 2047
 	stp	w1, w2, [x0, 24]
-.L892:
+.L887:
 	ldr	w1, [x0, 32]
 	cmp	w1, 1024
-	bls	.L893
+	bls	.L888
 	ldr	w2, [x0, 36]
 	add	w2, w2, w1, lsr 10
 	and	w1, w1, 1023
 	stp	w1, w2, [x0, 32]
-.L893:
+.L888:
 	ldr	w1, [x0, 40]
 	cmp	w1, 1024
-	bls	.L890
+	bls	.L885
 	ldr	w2, [x0, 44]
 	add	w2, w2, w1, lsr 10
 	and	w1, w1, 1023
 	stp	w1, w2, [x0, 40]
-.L890:
+.L885:
 	ret
 	.size	ftl_tmp_into_update, .-ftl_tmp_into_update
 	.section	.text.ftl_get_blk_list_in_sblk,"ax",@progbits
@@ -5126,18 +5146,18 @@ ftl_get_blk_list_in_sblk:
 	sxth	w5, w2
 	and	w4, w0, 65535
 	mov	w0, 0
-.L896:
+.L891:
 	cmp	w3, w11
-	blt	.L900
+	blt	.L895
 	sxtw	x2, w0
 	mov	w3, -1
-.L901:
+.L896:
 	cmp	w11, w2
-	bgt	.L902
+	bgt	.L897
 	ret
-.L900:
+.L895:
 	asr	w2, w13, w3
-	tbnz	x2, 0, .L897
+	tbnz	x2, 0, .L892
 	sdiv	w2, w3, w6
 	ldrh	w10, [x8]
 	sbfiz	x12, x0, 1, 32
@@ -5146,21 +5166,21 @@ ftl_get_blk_list_in_sblk:
 	lsl	w2, w2, w10
 	add	w2, w4, w2
 	and	w2, w2, 65535
-	bhi	.L898
-.L903:
+	bhi	.L893
+.L898:
 	add	w0, w0, 1
 	strh	w2, [x1, x12]
-.L897:
+.L892:
 	add	w3, w3, 1
-	b	.L896
-.L898:
+	b	.L891
+.L893:
 	and	w10, w5, w3
 	add	w2, w2, w10
-	b	.L903
-.L902:
+	b	.L898
+.L897:
 	strh	w3, [x1, x2, lsl 1]
 	add	x2, x2, 1
-	b	.L901
+	b	.L896
 	.size	ftl_get_blk_list_in_sblk, .-ftl_get_blk_list_in_sblk
 	.section	.text.ftl_erase_phy_blk,"ax",@progbits
 	.align	2
@@ -5189,17 +5209,17 @@ ftl_erase_phy_blk:
 	adrp	x0, .LANCHOR74
 	sxth	w19, w19
 	ldrb	w0, [x0, #:lo12:.LANCHOR74]
-	cbz	w0, .L905
+	cbz	w0, .L900
 	adrp	x0, .LANCHOR75
 	ldrb	w0, [x0, #:lo12:.LANCHOR75]
-	cbnz	w0, .L905
+	cbnz	w0, .L900
 	ldrh	w2, [x22, #:lo12:.LANCHOR105]
 	cmp	w21, 0
 	cset	w1, eq
 	mov	w0, w20
 	mul	w2, w2, w19
 	bl	flash_erase_block_en
-.L905:
+.L900:
 	ldrh	w2, [x22, #:lo12:.LANCHOR105]
 	mov	w1, w21
 	mov	w0, w20
@@ -5234,10 +5254,10 @@ ftl_erase_sblk:
 	add	x24, x24, :lo12:.LANCHOR69
 	add	x27, x29, 112
 	mov	w19, 0
-.L911:
+.L906:
 	ldrb	w0, [x25]
 	cmp	w19, w0
-	bge	.L922
+	bge	.L917
 	ldrb	w1, [x24]
 	adrp	x0, .LANCHOR105
 	mov	w21, 0
@@ -5246,31 +5266,31 @@ ftl_erase_sblk:
 	mov	w0, 0
 	mul	w6, w19, w1
 	mul	w5, w26, w1
-	b	.L923
-.L913:
+	b	.L918
+.L908:
 	add	w2, w0, w6
 	asr	w2, w28, w2
-	tbnz	x2, 0, .L912
+	tbnz	x2, 0, .L907
 	and	w2, w0, w4
 	add	w2, w2, w5
 	mul	w2, w2, w3
 	str	w2, [x27, w21, sxtw 2]
 	add	w21, w21, 1
-.L912:
+.L907:
 	add	w0, w0, 1
-.L923:
+.L918:
 	cmp	w0, w1
-	blt	.L913
+	blt	.L908
 	cmp	w1, 4
-	bne	.L914
+	bne	.L909
 	mov	x3, 0
-.L915:
+.L910:
 	cmp	w21, w3
-	bgt	.L916
-.L917:
+	bgt	.L911
+.L912:
 	add	w19, w19, 1
-	b	.L911
-.L916:
+	b	.L906
+.L911:
 	ldr	w2, [x27, x3, lsl 2]
 	mov	w1, w20
 	str	x3, [x29, 104]
@@ -5278,51 +5298,51 @@ ftl_erase_sblk:
 	bl	flash_erase_block_en
 	ldr	x3, [x29, 104]
 	add	x3, x3, 1
-	b	.L915
-.L914:
+	b	.L910
+.L909:
 	cmp	w21, 2
-	bne	.L918
+	bne	.L913
 	adrp	x0, .LANCHOR74
 	ldrb	w0, [x0, #:lo12:.LANCHOR74]
-	cbz	w0, .L919
+	cbz	w0, .L914
 	adrp	x0, .LANCHOR75
 	ldrb	w0, [x0, #:lo12:.LANCHOR75]
-	cbnz	w0, .L919
+	cbnz	w0, .L914
 	ldp	w2, w3, [x29, 112]
 	cmp	w20, 0
 	cset	w1, eq
 	mov	w0, w19
 	bl	flash_erase_duplane_block
-.L919:
+.L914:
 	ldp	w2, w3, [x29, 112]
 	mov	w1, w20
 	mov	w0, w19
 	bl	flash_erase_duplane_block
-	b	.L917
-.L918:
+	b	.L912
+.L913:
 	cmp	w21, 1
-	bne	.L917
+	bne	.L912
 	adrp	x0, .LANCHOR74
 	ldrb	w0, [x0, #:lo12:.LANCHOR74]
-	cbz	w0, .L921
+	cbz	w0, .L916
 	adrp	x0, .LANCHOR75
 	ldrb	w0, [x0, #:lo12:.LANCHOR75]
-	cbnz	w0, .L921
+	cbnz	w0, .L916
 	ldr	w2, [x29, 112]
 	cmp	w20, 0
 	cset	w1, eq
 	mov	w0, w19
 	bl	flash_erase_block_en
-.L921:
+.L916:
 	ldr	w2, [x29, 112]
 	mov	w1, w20
 	mov	w0, w19
 	bl	flash_erase_block_en
-	b	.L917
-.L922:
+	b	.L912
+.L917:
 	adrp	x2, .LANCHOR104
 	ldr	x3, [x23, #:lo12:.LANCHOR7]
-	cbnz	w20, .L924
+	cbnz	w20, .L919
 	ldrh	w1, [x3, x22]
 	add	w0, w1, 1
 	and	w0, w0, 2047
@@ -5334,9 +5354,9 @@ ftl_erase_sblk:
 	str	w2, [x1, 84]
 	ldrh	w2, [x1, 96]
 	cmp	w2, w0
-	bge	.L926
+	bge	.L921
 	strh	w0, [x1, 96]
-.L926:
+.L921:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -5345,7 +5365,7 @@ ftl_erase_sblk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L924:
+.L919:
 	ldr	w1, [x3, x22]
 	ubfx	x0, x1, 11, 8
 	add	w0, w0, 1
@@ -5359,9 +5379,9 @@ ftl_erase_sblk:
 	str	w2, [x1, 80]
 	ldrh	w2, [x1, 98]
 	cmp	w2, w0
-	bcs	.L926
+	bcs	.L921
 	strh	w0, [x1, 98]
-	b	.L926
+	b	.L921
 	.size	ftl_erase_sblk, .-ftl_erase_sblk
 	.section	.text.ftl_alloc_sys_blk,"ax",@progbits
 	.align	2
@@ -5376,37 +5396,37 @@ ftl_alloc_sys_blk:
 	str	x19, [sp, 16]
 	mov	x19, x0
 	cmp	w2, 63
-	bls	.L936
+	bls	.L931
 	strh	wzr, [x1, 136]
-.L936:
+.L931:
 	ldrh	w0, [x1, 112]
-	cbnz	w0, .L937
+	cbnz	w0, .L932
 	adrp	x1, .LANCHOR107
 	adrp	x0, .LC0
-	mov	w2, 1140
+	mov	w2, 1150
 	add	x1, x1, :lo12:.LANCHOR107
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L937:
+.L932:
 	ldr	x1, [x19, #:lo12:.LANCHOR104]
 	mov	w5, 65535
-.L940:
+.L935:
 	ldrh	w2, [x1, 136]
-.L938:
+.L933:
 	mov	w3, w2
 	cmp	w2, 63
-	ble	.L939
+	ble	.L934
 	strh	wzr, [x1, 136]
-	b	.L940
-.L939:
+	b	.L935
+.L934:
 	add	x4, x2, 1
 	add	x0, x1, x4, lsl 1
 	ldrh	w0, [x0, 158]
 	cmp	w0, w5
-	bne	.L943
+	bne	.L938
 	mov	x2, x4
-	b	.L938
-.L943:
+	b	.L933
+.L938:
 	add	x3, x1, x3, sxtw 1
 	mov	w4, -1
 	ldr	x19, [sp, 16]
@@ -5432,35 +5452,35 @@ ftl_free_sys_blk:
 	ldr	x1, [x0, #:lo12:.LANCHOR104]
 	ldrh	w2, [x1, 138]
 	cmp	w2, 63
-	bls	.L946
+	bls	.L941
 	strh	wzr, [x1, 138]
-.L946:
+.L941:
 	ldrh	w0, [x1, 112]
 	cmp	w0, 63
-	bls	.L947
+	bls	.L942
 	adrp	x1, .LANCHOR108
 	adrp	x0, .LC0
-	mov	w2, 1164
+	mov	w2, 1174
 	add	x1, x1, :lo12:.LANCHOR108
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L947:
+.L942:
 	ldr	x0, [x19, #:lo12:.LANCHOR104]
 	mov	w4, 65535
-.L950:
+.L945:
 	ldrh	w1, [x0, 138]
-.L948:
+.L943:
 	mov	w2, w1
 	cmp	w1, 63
-	ble	.L949
+	ble	.L944
 	strh	wzr, [x0, 138]
-	b	.L950
-.L949:
+	b	.L945
+.L944:
 	add	x3, x1, 1
 	add	x5, x0, x3, lsl 1
 	ldrh	w5, [x5, 158]
 	cmp	w5, w4
-	bne	.L951
+	bne	.L946
 	add	x2, x0, x2, sxtw 1
 	strh	w20, [x2, 160]
 	strh	w1, [x0, 138]
@@ -5470,9 +5490,9 @@ ftl_free_sys_blk:
 	strh	w1, [x0, 112]
 	ldp	x29, x30, [sp], 32
 	ret
-.L951:
+.L946:
 	mov	x1, x3
-	b	.L948
+	b	.L943
 	.size	ftl_free_sys_blk, .-ftl_free_sys_blk
 	.section	.text.ftl_info_data_recovery,"ax",@progbits
 	.align	2
@@ -5482,7 +5502,7 @@ ftl_info_data_recovery:
 	ldrh	w2, [x0]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L964
+	beq	.L959
 	stp	x29, x30, [sp, -48]!
 	adrp	x1, .LANCHOR7
 	add	x29, sp, 0
@@ -5493,7 +5513,7 @@ ftl_info_data_recovery:
 	add	x21, x20, x19
 	ldrb	w1, [x21, 2]
 	tst	w1, 224
-	bne	.L954
+	bne	.L949
 	ldrb	w0, [x0, 4]
 	bfi	w1, w0, 5, 3
 	strb	w1, [x21, 2]
@@ -5502,14 +5522,14 @@ ftl_info_data_recovery:
 	ldrb	w0, [x21, 2]
 	adrp	x1, .LANCHOR104
 	ldr	x3, [x1, #:lo12:.LANCHOR104]
-	tbz	x0, 3, .L958
+	tbz	x0, 3, .L953
 	ldrh	w2, [x3, 116]
 	sub	w2, w2, #1
 	strh	w2, [x3, 116]
-.L959:
+.L954:
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L961
+	bne	.L956
 	ldr	w0, [x20, x19]
 	ldr	x1, [x1, #:lo12:.LANCHOR104]
 	ubfx	x2, x0, 11, 8
@@ -5519,44 +5539,44 @@ ftl_info_data_recovery:
 	ldrh	w0, [x1, 120]
 	sub	w0, w0, #1
 	strh	w0, [x1, 120]
-.L954:
+.L949:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L958:
+.L953:
 	tst	w0, 24
-	bne	.L960
+	bne	.L955
 	ldrh	w2, [x3, 114]
 	sub	w2, w2, #1
 	strh	w2, [x3, 114]
-	b	.L959
-.L960:
+	b	.L954
+.L955:
 	ldrh	w2, [x3, 118]
 	sub	w2, w2, #1
 	strh	w2, [x3, 118]
-	b	.L959
-.L961:
+	b	.L954
+.L956:
 	ldrh	w2, [x20, x19]
 	cmp	w0, 64
 	add	w3, w2, 1
 	bfi	w2, w3, 0, 11
 	strh	w2, [x20, x19]
-	bne	.L962
+	bne	.L957
 	ldr	x1, [x1, #:lo12:.LANCHOR104]
 	ldrh	w0, [x1, 122]
 	sub	w0, w0, #1
 	strh	w0, [x1, 122]
-	b	.L954
-.L962:
+	b	.L949
+.L957:
 	cmp	w0, 96
-	bne	.L954
+	bne	.L949
 	ldr	x1, [x1, #:lo12:.LANCHOR104]
 	ldrh	w0, [x1, 124]
 	sub	w0, w0, #1
 	strh	w0, [x1, 124]
-	b	.L954
-.L964:
+	b	.L949
+.L959:
 	ret
 	.size	ftl_info_data_recovery, .-ftl_info_data_recovery
 	.section	.text.ftl_get_ppa_from_index,"ax",@progbits
@@ -5576,9 +5596,9 @@ ftl_get_ppa_from_index:
 	stp	x19, x20, [sp, 16]
 	mul	w1, w1, w3
 	cmp	w0, w1
-	bge	.L968
+	bge	.L963
 	add	x2, x2, 16
-.L969:
+.L964:
 	ldrb	w1, [x2, 9]
 	sdiv	w19, w0, w1
 	msub	w0, w19, w1, w0
@@ -5586,25 +5606,25 @@ ftl_get_ppa_from_index:
 	ldrh	w20, [x0, 16]
 	mov	w0, 65535
 	cmp	w20, w0
-	bne	.L970
+	bne	.L965
 	adrp	x1, .LANCHOR109
 	adrp	x0, .LC0
-	mov	w2, 1686
+	mov	w2, 1696
 	add	x1, x1, :lo12:.LANCHOR109
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L970:
+.L965:
 	adrp	x0, .LANCHOR105
 	ldrh	w0, [x0, #:lo12:.LANCHOR105]
 	madd	w0, w0, w20, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L968:
+.L963:
 	sub	w0, w0, w1
 	add	x2, x2, 48
 	and	w0, w0, 65535
-	b	.L969
+	b	.L964
 	.size	ftl_get_ppa_from_index, .-ftl_get_ppa_from_index
 	.section	.text.lpa_hash_get_ppa,"ax",@progbits
 	.align	2
@@ -5620,21 +5640,21 @@ lpa_hash_get_ppa:
 	ldr	x4, [x2, #:lo12:.LANCHOR111]
 	adrp	x2, .LANCHOR112
 	ldr	x5, [x2, #:lo12:.LANCHOR112]
-.L973:
+.L968:
 	cmp	w1, w3
-	bne	.L975
+	bne	.L970
 	mov	w0, -1
 	ret
-.L975:
+.L970:
 	uxtw	x2, w1
 	ldr	w6, [x4, x2, lsl 2]
 	cmp	w0, w6
-	bne	.L974
+	bne	.L969
 	mov	w0, w1
 	b	ftl_get_ppa_from_index
-.L974:
+.L969:
 	ldrh	w1, [x5, x2, lsl 1]
-	b	.L973
+	b	.L968
 	.size	lpa_hash_get_ppa, .-lpa_hash_get_ppa
 	.section	.text.ftl_get_new_free_page,"ax",@progbits
 	.align	2
@@ -5648,45 +5668,45 @@ ftl_get_new_free_page:
 	mov	x19, x0
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L977
+	bne	.L972
 	adrp	x1, .LANCHOR113
 	adrp	x0, .LC0
-	mov	w2, 1809
+	mov	w2, 1819
 	add	x1, x1, :lo12:.LANCHOR113
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L977:
+.L972:
 	adrp	x0, .LANCHOR87
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x0, #:lo12:.LANCHOR87]
 	cmp	w1, w0
-	bne	.L978
+	bne	.L973
 	adrp	x1, .LANCHOR113
 	adrp	x0, .LC0
-	mov	w2, 1810
+	mov	w2, 1820
 	add	x1, x1, :lo12:.LANCHOR113
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L978:
+.L973:
 	ldrh	w0, [x19, 6]
-	cbnz	w0, .L979
+	cbnz	w0, .L974
 	adrp	x1, .LANCHOR113
 	adrp	x0, .LC0
-	mov	w2, 1811
+	mov	w2, 1821
 	add	x1, x1, :lo12:.LANCHOR113
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L979:
+.L974:
 	ldrb	w0, [x19, 5]
 	mov	w2, 65535
 	add	x0, x0, 8
 	ldrh	w3, [x19, x0, lsl 1]
 	adrp	x0, .LANCHOR80
 	ldrb	w4, [x0, #:lo12:.LANCHOR80]
-.L980:
+.L975:
 	cmp	w3, w2
 	ldrb	w1, [x19, 5]
-	beq	.L982
+	beq	.L977
 	adrp	x0, .LANCHOR105
 	add	w1, w1, 1
 	and	w1, w1, 255
@@ -5702,29 +5722,29 @@ ftl_get_new_free_page:
 	orr	w0, w0, w2
 	add	w3, w3, 1
 	strh	w3, [x19, 10]
-	bne	.L976
+	bne	.L971
 	add	w2, w2, 1
 	strb	wzr, [x19, 5]
 	strh	w2, [x19, 2]
-.L976:
+.L971:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L982:
+.L977:
 	add	w1, w1, 1
 	and	w1, w1, 255
 	strb	w1, [x19, 5]
 	cmp	w1, w4
-	bne	.L981
+	bne	.L976
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 5]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L981:
+.L976:
 	ldrb	w0, [x19, 5]
 	add	x0, x0, 8
 	ldrh	w3, [x19, x0, lsl 1]
-	b	.L980
+	b	.L975
 	.size	ftl_get_new_free_page, .-ftl_get_new_free_page
 	.section	.text.ftl_ext_alloc_new_blk,"ax",@progbits
 	.align	2
@@ -5740,14 +5760,14 @@ ftl_ext_alloc_new_blk:
 	mov	w19, w0
 	sub	w0, w0, #1
 	cmp	w1, w0, uxth
-	bcs	.L986
+	bcs	.L981
 	adrp	x1, .LANCHOR114
 	adrp	x0, .LC0
-	mov	w2, 1842
+	mov	w2, 1852
 	add	x1, x1, :lo12:.LANCHOR114
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L986:
+.L981:
 	adrp	x20, .LANCHOR104
 	mov	w1, 0
 	mov	w0, w19
@@ -5772,12 +5792,12 @@ ftl_total_vpn_update:
 	mov	x3, x2
 	ldrh	w1, [x2, #:lo12:.LANCHOR115]
 	cmp	w1, 4
-	bhi	.L989
-	cbnz	w0, .L989
+	bhi	.L984
+	cbnz	w0, .L984
 	add	w1, w1, 1
 	strh	w1, [x2, #:lo12:.LANCHOR115]
 	ret
-.L989:
+.L984:
 	adrp	x0, .LANCHOR6
 	strh	wzr, [x3, #:lo12:.LANCHOR115]
 	mov	x1, 0
@@ -5789,9 +5809,9 @@ ftl_total_vpn_update:
 	adrp	x0, .LANCHOR7
 	ldr	x7, [x0, #:lo12:.LANCHOR7]
 	mov	w0, 0
-.L991:
+.L986:
 	cmp	w5, w1, uxth
-	bhi	.L994
+	bhi	.L989
 	adrp	x1, .LANCHOR10
 	ldr	x1, [x1, #:lo12:.LANCHOR10]
 	str	w2, [x1, 524]
@@ -5799,27 +5819,27 @@ ftl_total_vpn_update:
 	str	w0, [x1, 528]
 	ldr	x2, [x2, #:lo12:.LANCHOR104]
 	ldrh	w2, [x2, 120]
-	cbz	w2, .L988
+	cbz	w2, .L983
 	udiv	w0, w0, w2
 	str	w0, [x1, 532]
-.L988:
+.L983:
 	ret
-.L994:
+.L989:
 	ldrh	w3, [x6, x1, lsl 1]
 	cmp	w3, w8
-	beq	.L992
+	beq	.L987
 	add	x4, x7, x1, lsl 2
 	ldrb	w4, [x4, 2]
 	and	w4, w4, 224
 	cmp	w4, 160
-	bne	.L993
+	bne	.L988
 	add	w0, w0, w3
-.L992:
+.L987:
 	add	x1, x1, 1
-	b	.L991
-.L993:
+	b	.L986
+.L988:
 	add	w2, w2, w3
-	b	.L992
+	b	.L987
 	.size	ftl_total_vpn_update, .-ftl_total_vpn_update
 	.section	.text.ftl_debug_info_fill,"ax",@progbits
 	.align	2
@@ -5844,17 +5864,17 @@ ftl_vpn_update:
 	ubfiz	x19, x19, 1, 16
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, x19]
-	cbnz	w0, .L1002
+	cbnz	w0, .L997
 	adrp	x1, .LANCHOR116
 	mov	w0, 1
 	str	w0, [x1, #:lo12:.LANCHOR116]
-.L1000:
+.L995:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1002:
+.L997:
 	mov	w0, 0
-	b	.L1000
+	b	.L995
 	.size	ftl_vpn_update, .-ftl_vpn_update
 	.section	.text.ftl_vpn_decrement,"ax",@progbits
 	.align	2
@@ -5867,40 +5887,40 @@ ftl_vpn_decrement:
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1005
+	beq	.L1000
 	adrp	x0, .LANCHOR9
 	uxtw	x1, w19
 	lsl	x2, x1, 1
 	ldr	x3, [x0, #:lo12:.LANCHOR9]
 	ldrh	w0, [x3, x2]
-	cbnz	w0, .L1006
+	cbnz	w0, .L1001
 	adrp	x0, .LANCHOR7
 	mov	w2, 0
 	ldr	x0, [x0, #:lo12:.LANCHOR7]
 	add	x1, x0, x1, lsl 2
-	adrp	x0, .LC60
-	add	x0, x0, :lo12:.LC60
+	adrp	x0, .LC59
+	add	x0, x0, :lo12:.LC59
 	ldrb	w3, [x1, 2]
 	mov	w1, w19
 	ubfx	x3, x3, 5, 3
 	bl	printf
-.L1011:
-	mov	w0, 0
-	b	.L1004
 .L1006:
+	mov	w0, 0
+	b	.L999
+.L1001:
 	sub	w0, w0, #1
 	strh	w0, [x3, x2]
-.L1005:
+.L1000:
 	adrp	x20, .LANCHOR66
 	ldrh	w0, [x20, #:lo12:.LANCHOR66]
 	cmp	w19, w0
-	beq	.L1011
+	beq	.L1006
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L1008
+	bne	.L1003
 	strh	w19, [x20, #:lo12:.LANCHOR66]
-	b	.L1011
-.L1008:
+	b	.L1006
+.L1003:
 	bl	ftl_vpn_update
 	cmp	w0, 0
 	adrp	x1, .LANCHOR117
@@ -5917,7 +5937,7 @@ ftl_vpn_decrement:
 	adrp	x1, .LANCHOR67
 	add	x1, x1, :lo12:.LANCHOR67
 	strh	w3, [x1, x2, lsl 1]
-.L1004:
+.L999:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -5938,27 +5958,27 @@ lpa_hash_update_ppa:
 	ldr	x8, [x4, #:lo12:.LANCHOR111]
 	adrp	x4, .LANCHOR112
 	ldr	x4, [x4, #:lo12:.LANCHOR112]
-.L1014:
+.L1009:
 	cmp	w6, w12
-	beq	.L1018
+	beq	.L1013
 	uxtw	x11, w6
 	lsl	x10, x11, 2
 	add	x13, x8, x10
 	ldr	w10, [x8, x10]
 	cmp	w0, w10
 	lsl	x10, x11, 1
-	bne	.L1015
+	bne	.L1010
 	mov	w6, -1
 	str	w6, [x13]
 	cmp	w7, w12
-	bne	.L1016
+	bne	.L1011
 	add	x6, x3, :lo12:.LANCHOR110
 	ldrh	w7, [x4, x10]
 	strh	w7, [x6, x5, lsl 1]
-.L1017:
+.L1012:
 	mov	w6, -1
 	strh	w6, [x4, x11, lsl 1]
-.L1018:
+.L1013:
 	uxtw	x6, w2
 	add	x3, x3, :lo12:.LANCHOR110
 	cmn	w1, #1
@@ -5966,7 +5986,7 @@ lpa_hash_update_ppa:
 	ldrh	w0, [x3, x5, lsl 1]
 	strh	w2, [x3, x5, lsl 1]
 	strh	w0, [x4, x6, lsl 1]
-	beq	.L1025
+	beq	.L1020
 	stp	x29, x30, [sp, -16]!
 	adrp	x0, .LANCHOR68
 	add	x29, sp, 0
@@ -5988,15 +6008,15 @@ lpa_hash_update_ppa:
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
-.L1016:
+.L1011:
 	ldrh	w6, [x4, x10]
 	strh	w6, [x4, w7, uxtw 1]
-	b	.L1017
-.L1015:
+	b	.L1012
+.L1010:
 	mov	w7, w6
 	ldrh	w6, [x4, x10]
-	b	.L1014
-.L1025:
+	b	.L1009
+.L1020:
 	mov	w0, -1
 	ret
 	.size	lpa_hash_update_ppa, .-lpa_hash_update_ppa
@@ -6033,25 +6053,25 @@ ftl_mask_bad_block:
 	and	w4, w3, 65535
 	udiv	w3, w3, w5
 	and	w20, w3, 65535
-	bls	.L1029
+	bls	.L1024
 	sub	w2, w5, #1
 	and	w2, w2, w4
 	add	w2, w19, w2
 	and	w19, w2, 255
-.L1029:
+.L1024:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 14, .L1030
-	adrp	x0, .LC61
+	tbz	x0, 14, .L1025
+	adrp	x0, .LC60
 	and	w3, w3, 65535
 	mov	w2, w19
-	add	x0, x0, :lo12:.LC61
+	add	x0, x0, :lo12:.LC60
 	bl	printf
-.L1030:
+.L1025:
 	adrp	x0, .LANCHOR6
 	ldrh	w0, [x0, #:lo12:.LANCHOR6]
 	cmp	w0, w20
-	bls	.L1028
+	bls	.L1023
 	adrp	x0, .LANCHOR7
 	mov	w2, 1
 	lsl	w2, w2, w19
@@ -6060,7 +6080,7 @@ ftl_mask_bad_block:
 	ldrb	w19, [x20, 3]
 	orr	w2, w2, w19
 	strb	w2, [x20, 3]
-.L1028:
+.L1023:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -6073,95 +6093,108 @@ gc_free_bad_sblk:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR64
-	stp	x27, x28, [sp, 80]
-	and	w27, w0, 65535
-	add	x0, x24, :lo12:.LANCHOR64
+	and	w23, w0, 65535
+	str	x27, [sp, 80]
+	adrp	x27, .LANCHOR64
+	add	x0, x27, :lo12:.LANCHOR64
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	ldr	w0, [x0, 584]
-	cbz	w0, .L1047
-	adrp	x25, .LANCHOR80
-	adrp	x26, .LANCHOR68
-	add	x25, x25, :lo12:.LANCHOR80
-	add	x22, x26, :lo12:.LANCHOR68
-	mov	w23, 0
-.L1038:
-	ldrb	w0, [x25]
-	cmp	w0, w23
-	bhi	.L1045
-.L1047:
+	cbz	w0, .L1045
+	adrp	x22, .LC61
+	mov	w24, 20041
+	add	x22, x22, :lo12:.LC61
+	mov	w26, 0
+	movk	w24, 0x444b, lsl 16
+.L1033:
+	adrp	x0, .LANCHOR80
+	ldrb	w0, [x0, #:lo12:.LANCHOR80]
+	cmp	w0, w26
+	bhi	.L1042
+.L1045:
 	mov	w0, 0
+	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1045:
+.L1042:
 	adrp	x0, .LANCHOR69
 	adrp	x1, .LANCHOR31
+	adrp	x21, .LANCHOR68
 	ldrb	w2, [x0, #:lo12:.LANCHOR69]
 	ldrb	w3, [x1, #:lo12:.LANCHOR31]
 	mov	w1, 24
 	and	w0, w2, 65535
 	cmp	w2, 1
 	sub	w1, w1, w3
-	ldrh	w3, [x26, #:lo12:.LANCHOR68]
-	sdiv	w19, w23, w2
+	ldrh	w3, [x21, #:lo12:.LANCHOR68]
+	sdiv	w19, w26, w2
 	sub	w1, w1, w3
 	lsl	w19, w19, w1
-	madd	w19, w27, w0, w19
+	madd	w19, w23, w0, w19
 	and	w19, w19, 65535
-	bls	.L1039
+	bls	.L1034
 	sub	w0, w0, #1
-	and	w0, w0, w23
+	and	w0, w0, w26
 	add	w19, w19, w0
 	and	w19, w19, 65535
-.L1039:
-	adrp	x28, .LC62
-	add	x21, x24, :lo12:.LANCHOR64
-	add	x28, x28, :lo12:.LC62
+.L1034:
+	adrp	x25, .LANCHOR118
+	add	x25, x25, :lo12:.LANCHOR118
 	mov	w20, 0
-.L1040:
-	ldr	w0, [x21, 584]
-	cmp	w20, w0
-	bcc	.L1044
-	add	w23, w23, 1
-	and	w23, w23, 65535
-	b	.L1038
-.L1044:
-	add	x0, x21, x20, sxtw 1
+.L1035:
+	add	x0, x27, :lo12:.LANCHOR64
+	ldr	w1, [x0, 584]
+	cmp	w20, w1
+	bcc	.L1041
+	add	w26, w26, 1
+	and	w26, w26, 65535
+	b	.L1033
+.L1041:
+	add	x0, x0, x20, sxtw 1
 	ldrh	w0, [x0, 588]
 	cmp	w0, w19
-	bne	.L1041
+	bne	.L1036
 	mov	w1, w19
-	mov	x0, x28
+	mov	x0, x22
 	bl	printf
-	ldrh	w0, [x22]
+	ldrb	w0, [x25]
+	cbz	w0, .L1037
+	adrp	x0, .LANCHOR104
+	ldr	x0, [x0, #:lo12:.LANCHOR104]
+	ldr	w0, [x0, 156]
+	cmp	w0, w24
+	beq	.L1038
+.L1037:
+	ldrh	w0, [x21, #:lo12:.LANCHOR68]
 	lsl	w0, w19, w0
 	bl	ftl_mask_bad_block
-	ldr	w1, [x21, 584]
+.L1038:
+	add	x1, x27, :lo12:.LANCHOR64
 	mov	w0, w20
-.L1042:
-	cmp	w0, w1
-	bcc	.L1043
-	sub	w1, w1, #1
-	str	w1, [x21, 584]
-.L1041:
+	ldr	w2, [x1, 584]
+.L1039:
+	cmp	w0, w2
+	bcc	.L1040
+	add	x0, x27, :lo12:.LANCHOR64
+	sub	w2, w2, #1
+	str	w2, [x0, 584]
+.L1036:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L1040
-.L1043:
-	add	w2, w0, 1
-	add	x0, x21, x0, sxtw 1
-	add	x3, x21, x2, sxtw 1
-	ldrh	w3, [x3, 588]
-	strh	w3, [x0, 588]
-	and	w0, w2, 65535
-	b	.L1042
+	b	.L1035
+.L1040:
+	add	w3, w0, 1
+	add	x0, x1, x0, sxtw 1
+	add	x4, x1, x3, sxtw 1
+	ldrh	w4, [x4, 588]
+	strh	w4, [x0, 588]
+	and	w0, w3, 65535
+	b	.L1039
 	.size	gc_free_bad_sblk, .-gc_free_bad_sblk
 	.section	.text.ftl_free_sblk,"ax",@progbits
 	.align	2
@@ -6184,11 +6217,11 @@ ftl_free_sblk:
 	tbz	x0, 3, .L1053
 	adrp	x1, .LANCHOR104
 	ldrh	w2, [x4, x19]
-	adrp	x8, .LANCHOR118
+	adrp	x8, .LANCHOR119
 	ldr	x7, [x1, #:lo12:.LANCHOR104]
 	and	w5, w2, 2047
 	ldr	w2, [x4, x19]
-	ldrh	w8, [x8, #:lo12:.LANCHOR118]
+	ldrh	w8, [x8, #:lo12:.LANCHOR119]
 	ldrh	w3, [x7, 74]
 	ubfx	x1, x2, 11, 8
 	adrp	x2, .LANCHOR8
@@ -6217,9 +6250,9 @@ ftl_free_sblk:
 	bfi	w0, w3, 3, 2
 	b	.L1069
 .L1055:
-	adrp	x3, .LANCHOR119
+	adrp	x3, .LANCHOR120
 	adrp	x7, .LANCHOR97
-	ldrh	w6, [x3, #:lo12:.LANCHOR119]
+	ldrh	w6, [x3, #:lo12:.LANCHOR120]
 	adrp	x3, .LANCHOR92
 	ldrh	w7, [x7, #:lo12:.LANCHOR97]
 	ldrh	w3, [x3, #:lo12:.LANCHOR92]
@@ -6282,21 +6315,21 @@ ftl_free_sblk:
 	strh	w21, [x0, 590]
 	mov	w1, w21
 	ldp	x19, x20, [sp, 16]
-	adrp	x0, .LC63
+	adrp	x0, .LC62
 	ldp	x21, x22, [sp, 32]
-	add	x0, x0, :lo12:.LC63
+	add	x0, x0, :lo12:.LC62
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	b	printf
 .L1054:
 	madd	w3, w2, w3, w6
-	adrp	x6, .LANCHOR120
-	ldrh	w6, [x6, #:lo12:.LANCHOR120]
+	adrp	x6, .LANCHOR121
+	ldrh	w6, [x6, #:lo12:.LANCHOR121]
 	cmp	w3, w6
 	ble	.L1056
-	adrp	x3, .LANCHOR119
+	adrp	x3, .LANCHOR120
 	adrp	x7, .LANCHOR97
-	ldrh	w6, [x3, #:lo12:.LANCHOR119]
+	ldrh	w6, [x3, #:lo12:.LANCHOR120]
 	adrp	x3, .LANCHOR92
 	ldrh	w7, [x7, #:lo12:.LANCHOR97]
 	ldrh	w3, [x3, #:lo12:.LANCHOR92]
@@ -6352,11 +6385,11 @@ gc_free_src_blk:
 	stp	x21, x22, [sp, 32]
 	adrp	x21, .LANCHOR64
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LC64
+	adrp	x22, .LC63
 	adrp	x23, .LANCHOR9
 	add	x21, x21, :lo12:.LANCHOR64
 	mov	x24, x23
-	add	x22, x22, :lo12:.LC64
+	add	x22, x22, :lo12:.LC63
 	stp	x19, x20, [sp, 16]
 	mov	w20, 0
 	stp	x25, x26, [sp, 64]
@@ -6392,9 +6425,9 @@ gc_free_src_blk:
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	tbz	x0, 8, .L1074
 	ldrb	w2, [x25, 2]
-	adrp	x0, .LC65
+	adrp	x0, .LC64
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC65
+	add	x0, x0, :lo12:.LC64
 	ubfx	x2, x2, 5, 3
 	bl	printf
 .L1074:
@@ -6405,10 +6438,10 @@ gc_free_src_blk:
 	tst	w0, 192
 	bne	.L1076
 .L1075:
-	adrp	x1, .LANCHOR121
+	adrp	x1, .LANCHOR122
 	adrp	x0, .LC0
-	mov	w2, 1114
-	add	x1, x1, :lo12:.LANCHOR121
+	mov	w2, 1119
+	add	x1, x1, :lo12:.LANCHOR122
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 .L1076:
@@ -6487,7 +6520,7 @@ gc_free_src_blk:
 print_ftl_debug_info:
 	sub	sp, sp, #64
 	adrp	x2, .LANCHOR90
-	adrp	x8, .LANCHOR122
+	adrp	x8, .LANCHOR123
 	stp	x29, x30, [sp, 32]
 	add	x29, sp, 32
 	ldrh	w7, [x2, #:lo12:.LANCHOR90]
@@ -6503,7 +6536,7 @@ print_ftl_debug_info:
 	ldr	x0, [x20, #:lo12:.LANCHOR10]
 	ldrh	w4, [x2, #:lo12:.LANCHOR99]
 	adrp	x2, .LANCHOR97
-	ldr	w8, [x8, #:lo12:.LANCHOR122]
+	ldr	w8, [x8, #:lo12:.LANCHOR123]
 	ldrh	w3, [x2, #:lo12:.LANCHOR97]
 	ldrh	w2, [x1, 146]
 	ldrh	w1, [x1, 148]
@@ -6515,25 +6548,25 @@ print_ftl_debug_info:
 	adrp	x0, .LANCHOR94
 	ldrh	w0, [x0, #:lo12:.LANCHOR94]
 	str	w0, [sp]
-	adrp	x0, .LC66
-	add	x0, x0, :lo12:.LC66
+	adrp	x0, .LC65
+	add	x0, x0, :lo12:.LC65
 	bl	printf
 	ldr	x0, [x19, #:lo12:.LANCHOR104]
-	adrp	x1, .LANCHOR123
-	ldrb	w3, [x1, #:lo12:.LANCHOR123]
+	adrp	x1, .LANCHOR124
+	ldrb	w3, [x1, #:lo12:.LANCHOR124]
 	ldr	w4, [x0, 8]
 	ldr	w5, [x0, 64]
 	ldr	w1, [x0, 20]
 	ldr	w2, [x0, 28]
-	adrp	x0, .LC67
-	add	x0, x0, :lo12:.LC67
+	adrp	x0, .LC66
+	add	x0, x0, :lo12:.LC66
 	bl	printf
 	ldr	x0, [x19, #:lo12:.LANCHOR104]
 	ldr	w1, [x0, 52]
 	ldr	w2, [x0, 60]
 	ldr	w3, [x0, 16]
-	adrp	x0, .LC68
-	add	x0, x0, :lo12:.LC68
+	adrp	x0, .LC67
+	add	x0, x0, :lo12:.LC67
 	lsr	w3, w3, 11
 	bl	printf
 	ldr	x0, [x19, #:lo12:.LANCHOR104]
@@ -6549,8 +6582,8 @@ print_ftl_debug_info:
 	ldrh	w2, [x0, 90]
 	str	w2, [sp]
 	ldp	w7, w2, [x0, 80]
-	adrp	x0, .LC69
-	add	x0, x0, :lo12:.LC69
+	adrp	x0, .LC68
+	add	x0, x0, :lo12:.LC68
 	bl	printf
 	adrp	x0, .LANCHOR81
 	ldrh	w5, [x0, #:lo12:.LANCHOR81]
@@ -6562,8 +6595,8 @@ print_ftl_debug_info:
 	ldrh	w2, [x0, #:lo12:.LANCHOR96]
 	adrp	x0, .LANCHOR93
 	ldrh	w1, [x0, #:lo12:.LANCHOR93]
-	adrp	x0, .LC70
-	add	x0, x0, :lo12:.LC70
+	adrp	x0, .LC69
+	add	x0, x0, :lo12:.LC69
 	bl	printf
 	ldr	x0, [x20, #:lo12:.LANCHOR10]
 	ldr	x1, [x19, #:lo12:.LANCHOR104]
@@ -6576,8 +6609,8 @@ print_ftl_debug_info:
 	add	sp, sp, 64
 	ldr	w5, [x1, 156]
 	ldrh	w1, [x0, 584]
-	adrp	x0, .LC71
-	add	x0, x0, :lo12:.LC71
+	adrp	x0, .LC70
+	add	x0, x0, :lo12:.LC70
 	b	printf
 	.size	print_ftl_debug_info, .-print_ftl_debug_info
 	.section	.text.ftl_write_buf,"ax",@progbits
@@ -6590,8 +6623,8 @@ ftl_write_buf:
 	stp	x19, x20, [sp, 16]
 	str	x21, [sp, 32]
 	cbnz	x0, .L1112
-	adrp	x1, .LANCHOR124
-	add	x1, x1, :lo12:.LANCHOR124
+	adrp	x1, .LANCHOR125
+	add	x1, x1, :lo12:.LANCHOR125
 	mov	w2, 676
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
@@ -6624,23 +6657,23 @@ ftl_write_buf:
 	b	.L1111
 .L1112:
 	mov	x19, x0
-	adrp	x0, .LANCHOR125
+	adrp	x0, .LANCHOR126
 	mov	x20, x0
-	ldrb	w1, [x0, #:lo12:.LANCHOR125]
+	ldrb	w1, [x0, #:lo12:.LANCHOR126]
 	ldrb	w2, [x19, 56]
 	cmp	w2, w1
 	bls	.L1117
-	adrp	x1, .LANCHOR124
+	adrp	x1, .LANCHOR125
 	adrp	x0, .LC0
 	mov	w2, 681
-	add	x1, x1, :lo12:.LANCHOR124
+	add	x1, x1, :lo12:.LANCHOR125
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 .L1117:
 	ldrb	w0, [x19, 56]
 	adrp	x21, .LANCHOR60
 	cbz	w0, .L1114
-	ldrb	w1, [x20, #:lo12:.LANCHOR125]
+	ldrb	w1, [x20, #:lo12:.LANCHOR126]
 	cmp	w1, w0
 	bcs	.L1115
 .L1114:
@@ -6654,40 +6687,54 @@ ftl_write_buf:
 	.global	ftl_write_completed
 	.type	ftl_write_completed, %function
 ftl_write_completed:
-	stp	x29, x30, [sp, -64]!
+	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR52
-	add	x19, x19, :lo12:.LANCHOR52
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR126
-	mov	x22, x19
-	add	x21, x21, :lo12:.LANCHOR126
+	adrp	x21, .LANCHOR52
+	stp	x19, x20, [sp, 16]
+	add	x22, x21, :lo12:.LANCHOR52
 	stp	x23, x24, [sp, 48]
-	mov	w24, 0
+	adrp	x20, .LANCHOR127
+	mov	w23, 20041
+	add	x20, x20, :lo12:.LANCHOR127
+	str	x25, [sp, 64]
+	movk	w23, 0x444b, lsl 16
+	mov	w25, 0
 .L1123:
-	ldrb	w0, [x21]
+	ldrb	w0, [x20]
 	cmp	w0, 255
-	bne	.L1131
+	bne	.L1133
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 64
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 80
 	ret
-.L1131:
-	lsl	x1, x0, 6
-	ubfiz	x20, x0, 6, 8
-	add	x23, x19, x1
-	add	x20, x19, x20
-	ldrb	w1, [x19, x1]
-	strb	w1, [x21]
-	ldr	w1, [x23, 52]
+.L1133:
+	add	x1, x21, :lo12:.LANCHOR52
+	lsl	x2, x0, 6
+	add	x24, x1, x2
+	ubfiz	x19, x0, 6, 8
+	add	x19, x1, x19
+	ldrb	w1, [x1, x2]
+	strb	w1, [x20]
+	ldr	w1, [x24, 52]
 	cmn	w1, #1
 	bne	.L1124
-	adrp	x1, .LANCHOR68
+	adrp	x1, .LANCHOR118
+	ldrb	w1, [x1, #:lo12:.LANCHOR118]
+	cbz	w1, .L1125
+	adrp	x1, .LANCHOR104
+	ldr	x1, [x1, #:lo12:.LANCHOR104]
+	ldr	w1, [x1, 156]
+	cmp	w1, w23
+	beq	.L1126
+.L1125:
+	add	x1, x22, x0, lsl 6
 	mov	w2, 24
-	ldr	w3, [x23, 40]
 	mov	w5, 65535
+	ldr	w3, [x1, 40]
+	adrp	x1, .LANCHOR68
 	ldrh	w4, [x1, #:lo12:.LANCHOR68]
 	adrp	x1, .LANCHOR31
 	ldrb	w1, [x1, #:lo12:.LANCHOR31]
@@ -6702,61 +6749,61 @@ ftl_write_completed:
 	and	w1, w1, w4
 	udiv	w1, w1, w2
 	adrp	x2, .LANCHOR10
-	mov	x23, x2
+	mov	x24, x2
 	ldr	x4, [x2, #:lo12:.LANCHOR10]
-	and	w24, w1, 65535
+	and	w25, w1, 65535
 	and	w1, w1, w5
 	ldr	w6, [x4, 560]
 	cmp	w6, w5
-	bne	.L1125
+	bne	.L1127
 	str	w1, [x4, 560]
 	str	w3, [x4, 564]
-.L1125:
+.L1127:
 	add	x0, x22, x0, lsl 6
 	ldr	w2, [x0, 36]
-	adrp	x0, .LC72
-	add	x0, x0, :lo12:.LC72
+	adrp	x0, .LC71
+	add	x0, x0, :lo12:.LC71
 	bl	printf
-	ldr	x0, [x23, #:lo12:.LANCHOR10]
+	ldr	x0, [x24, #:lo12:.LANCHOR10]
 	ldr	w1, [x0, 556]
 	add	w1, w1, 1
 	str	w1, [x0, 556]
 	ldrh	w1, [x0, 16]
-	cmp	w1, w24
-	bne	.L1126
+	cmp	w1, w25
+	bne	.L1128
 	strh	wzr, [x0, 22]
-.L1127:
-	mov	x0, x20
-	mov	w24, 1
+.L1126:
+	mov	x0, x19
+	mov	w25, 1
 	bl	ftl_write_buf
 	b	.L1123
-.L1126:
+.L1128:
 	ldrh	w1, [x0, 48]
-	cmp	w1, w24
-	bne	.L1127
+	cmp	w1, w25
+	bne	.L1126
 	strh	wzr, [x0, 54]
-	b	.L1127
+	b	.L1126
 .L1124:
-	cbz	w24, .L1129
-	ldp	w1, w2, [x23, 36]
-	adrp	x0, .LC73
-	add	x0, x0, :lo12:.LC73
+	cbz	w25, .L1131
+	ldp	w1, w2, [x24, 36]
+	adrp	x0, .LC72
+	add	x0, x0, :lo12:.LC72
 	bl	printf
-	mov	x0, x20
+	mov	x0, x19
 	bl	ftl_write_buf
 	b	.L1123
-.L1129:
-	ldrh	w2, [x23, 48]
-	ldr	w0, [x23, 36]
-	ldr	w1, [x23, 44]
+.L1131:
+	ldrh	w2, [x24, 48]
+	ldr	w0, [x24, 36]
+	ldr	w1, [x24, 44]
 	bl	lpa_hash_update_ppa
-	ldrb	w0, [x23, 2]
-	tbz	x0, 2, .L1130
+	ldrb	w0, [x24, 2]
+	tbz	x0, 2, .L1132
 	and	w0, w0, -3
-	strb	w0, [x23, 2]
+	strb	w0, [x24, 2]
 	b	.L1123
-.L1130:
-	mov	x0, x20
+.L1132:
+	mov	x0, x19
 	bl	zbuf_free
 	b	.L1123
 	.size	ftl_write_completed, .-ftl_write_completed
@@ -6768,40 +6815,40 @@ zftl_add_read_buf:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	str	x19, [sp, 16]
-	cbnz	x0, .L1134
-	mov	w2, 972
-	adrp	x1, .LANCHOR127
+	cbnz	x0, .L1139
+	mov	w2, 974
+	adrp	x1, .LANCHOR128
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR127
+	add	x1, x1, :lo12:.LANCHOR128
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	print_ftl_debug_info
-.L1134:
+.L1139:
 	ldrb	w1, [x0, 56]
 	mov	x19, x0
-	adrp	x0, .LANCHOR125
-	ldrb	w0, [x0, #:lo12:.LANCHOR125]
+	adrp	x0, .LANCHOR126
+	ldrb	w0, [x0, #:lo12:.LANCHOR126]
 	cmp	w1, w0
-	bls	.L1136
-	adrp	x1, .LANCHOR127
+	bls	.L1141
+	adrp	x1, .LANCHOR128
 	adrp	x0, .LC0
-	mov	w2, 977
-	add	x1, x1, :lo12:.LANCHOR127
+	mov	w2, 979
+	add	x1, x1, :lo12:.LANCHOR128
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1136:
+.L1141:
 	mov	x1, x19
-	adrp	x0, .LANCHOR128
-	add	x0, x0, :lo12:.LANCHOR128
+	adrp	x0, .LANCHOR129
+	add	x0, x0, :lo12:.LANCHOR129
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR129
+	adrp	x1, .LANCHOR130
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	ldrb	w0, [x1, #:lo12:.LANCHOR129]
+	ldrb	w0, [x1, #:lo12:.LANCHOR130]
 	add	w0, w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR129]
+	strb	w0, [x1, #:lo12:.LANCHOR130]
 	ret
 	.size	zftl_add_read_buf, .-zftl_add_read_buf
 	.section	.text.ftl_alloc_sblk,"ax",@progbits
@@ -6824,39 +6871,39 @@ ftl_alloc_sblk:
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1141
+	beq	.L1146
 	adrp	x0, .LANCHOR7
 	lsl	w22, w22, 1
 	ldr	x21, [x0, #:lo12:.LANCHOR7]
 	add	x21, x21, x19, uxth 2
 	ldrb	w0, [x21, 2]
 	tst	w0, 224
-	beq	.L1142
-	adrp	x1, .LANCHOR130
+	beq	.L1147
+	adrp	x1, .LANCHOR131
 	adrp	x0, .LC0
-	mov	w2, 836
-	add	x1, x1, :lo12:.LANCHOR130
+	mov	w2, 846
+	add	x1, x1, :lo12:.LANCHOR131
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1142:
+.L1147:
 	ldrb	w0, [x21, 2]
 	bfi	w0, w20, 5, 3
 	ubfx	x1, x0, 3, 2
 	orr	w22, w22, w1
 	bfi	w0, w22, 3, 2
 	strb	w0, [x21, 2]
-.L1143:
+.L1148:
 	mov	w0, w19
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1141:
+.L1146:
 	bl	print_ftl_debug_info
-	adrp	x21, .LC74
+	adrp	x21, .LC73
 	mov	w2, w20
-	add	x21, x21, :lo12:.LC74
+	add	x21, x21, :lo12:.LC73
 	mov	w1, w19
 	mov	x0, x21
 	bl	printf
@@ -6869,13 +6916,13 @@ ftl_alloc_sblk:
 	mov	x0, x21
 	bl	printf
 	bl	dump_all_list_info
-	mov	w2, 846
-	adrp	x1, .LANCHOR130
+	mov	w2, 856
+	adrp	x1, .LANCHOR131
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR130
+	add	x1, x1, :lo12:.LANCHOR131
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L1143
+	b	.L1148
 	.size	ftl_alloc_sblk, .-ftl_alloc_sblk
 	.section	.text.sblk_init,"ax",@progbits
 	.align	2
@@ -6885,10 +6932,10 @@ sblk_init:
 	adrp	x1, .LANCHOR56
 	mov	w0, -1
 	strb	w0, [x1, #:lo12:.LANCHOR56]
-	adrp	x1, .LANCHOR126
-	strb	w0, [x1, #:lo12:.LANCHOR126]
-	adrp	x1, .LANCHOR131
-	strb	w0, [x1, #:lo12:.LANCHOR131]
+	adrp	x1, .LANCHOR127
+	strb	w0, [x1, #:lo12:.LANCHOR127]
+	adrp	x1, .LANCHOR132
+	strb	w0, [x1, #:lo12:.LANCHOR132]
 	adrp	x1, .LANCHOR71
 	strb	w0, [x1, #:lo12:.LANCHOR71]
 	mov	w0, 0
@@ -6900,8 +6947,8 @@ sblk_init:
 	.type	dump_sblk_queue, %function
 dump_sblk_queue:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LC75
-	add	x0, x0, :lo12:.LC75
+	adrp	x0, .LC74
+	add	x0, x0, :lo12:.LC74
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR56
@@ -6910,15 +6957,15 @@ dump_sblk_queue:
 	bl	printf
 	ldrb	w19, [x19, #:lo12:.LANCHOR56]
 	cmp	w19, 255
-	beq	.L1150
+	beq	.L1155
 	adrp	x1, .LANCHOR52
 	ubfiz	x19, x19, 6, 8
 	add	x1, x1, :lo12:.LANCHOR52
-	adrp	x21, .LC76
+	adrp	x21, .LC75
 	add	x19, x1, x19
-	add	x21, x21, :lo12:.LC76
+	add	x21, x21, :lo12:.LC75
 	mov	x20, x1
-.L1152:
+.L1157:
 	ldrb	w2, [x19, 58]
 	mov	x0, x21
 	ldrb	w1, [x19, 1]
@@ -6926,11 +6973,11 @@ dump_sblk_queue:
 	bl	printf
 	ldrb	w19, [x19]
 	cmp	w19, 255
-	beq	.L1150
+	beq	.L1155
 	ubfiz	x19, x19, 6, 8
 	add	x19, x20, x19
-	b	.L1152
-.L1150:
+	b	.L1157
+.L1155:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -6944,17 +6991,17 @@ queue_lun_state:
 	adrp	x2, .LANCHOR56
 	ldrb	w2, [x2, #:lo12:.LANCHOR56]
 	cmp	w2, 255
-	beq	.L1168
+	beq	.L1173
 	adrp	x3, .LANCHOR31
 	mov	w8, 24
 	adrp	x10, .LANCHOR52
 	add	x10, x10, :lo12:.LANCHOR52
 	ldrb	w4, [x3, #:lo12:.LANCHOR31]
 	mov	w3, 1
-	adrp	x13, .L1164
+	adrp	x13, .L1169
 	mov	x15, x10
 	sub	w8, w8, w4
-	add	x13, x13, :lo12:.L1164
+	add	x13, x13, :lo12:.L1169
 	lsl	w4, w3, w4
 	sub	w4, w4, #1
 	and	w6, w4, 65535
@@ -6973,58 +7020,58 @@ queue_lun_state:
 	and	w5, w5, 65535
 	and	w3, w3, w5
 	and	w3, w3, w7
-.L1167:
+.L1172:
 	add	x14, x10, x2, lsl 6
 	ldr	w4, [x14, 40]
 	lsr	w0, w4, w8
 	and	w0, w6, w0
 	cmp	w11, w0
-	bne	.L1162
+	bne	.L1167
 	lsr	w4, w4, w12
 	and	w4, w5, w4
 	and	w4, w7, w4
 	ldrb	w0, [x14, 58]
 	cmp	w3, w4
-	bne	.L1163
+	bne	.L1168
 	cmp	w1, 1
-	bne	.L1160
+	bne	.L1165
 	cmp	w0, 7
 	ccmp	w0, 9, 4, ne
-	beq	.L1162
+	beq	.L1167
 	ret
-.L1163:
+.L1168:
 	cmp	w1, 3
-	bhi	.L1162
+	bhi	.L1167
 	ldrb	w4, [x13,w1,uxtw]
-	adr	x14, .Lrtx1164
+	adr	x14, .Lrtx1169
 	add	x4, x14, w4, sxtb #2
 	br	x4
-.Lrtx1164:
+.Lrtx1169:
 	.section	.rodata.queue_lun_state,"a",@progbits
 	.align	0
 	.align	2
-.L1164:
-	.byte	(.L1160 - .Lrtx1164) / 4
-	.byte	(.L1165 - .Lrtx1164) / 4
-	.byte	(.L1166 - .Lrtx1164) / 4
-	.byte	(.L1160 - .Lrtx1164) / 4
+.L1169:
+	.byte	(.L1165 - .Lrtx1169) / 4
+	.byte	(.L1170 - .Lrtx1169) / 4
+	.byte	(.L1171 - .Lrtx1169) / 4
+	.byte	(.L1165 - .Lrtx1169) / 4
 	.section	.text.queue_lun_state
-.L1165:
+.L1170:
 	cmp	w0, 7
 	ccmp	w0, 9, 4, ne
-	beq	.L1162
+	beq	.L1167
 	ret
-.L1166:
+.L1171:
 	cmp	w0, 11
-	bne	.L1160
-.L1162:
+	bne	.L1165
+.L1167:
 	lsl	x2, x2, 6
 	ldrb	w2, [x15, x2]
 	cmp	w2, 255
-	bne	.L1167
-.L1168:
+	bne	.L1172
+.L1173:
 	mov	w0, 0
-.L1160:
+.L1165:
 	ret
 	.size	queue_lun_state, .-queue_lun_state
 	.section	.text.queue_remove_completed_req,"ax",@progbits
@@ -7032,25 +7079,25 @@ queue_lun_state:
 	.global	queue_remove_completed_req
 	.type	queue_remove_completed_req, %function
 queue_remove_completed_req:
-	adrp	x4, .LANCHOR126
+	adrp	x4, .LANCHOR127
 	adrp	x8, .LANCHOR71
 	adrp	x1, .LANCHOR56
-	adrp	x7, .LANCHOR131
+	adrp	x7, .LANCHOR132
 	adrp	x3, .LANCHOR52
-	ldrb	w14, [x4, #:lo12:.LANCHOR126]
+	ldrb	w14, [x4, #:lo12:.LANCHOR127]
 	add	x5, x3, :lo12:.LANCHOR52
 	ldrb	w2, [x1, #:lo12:.LANCHOR56]
 	ldrb	w12, [x8, #:lo12:.LANCHOR71]
 	mov	x11, x5
-	ldrb	w13, [x7, #:lo12:.LANCHOR131]
+	ldrb	w13, [x7, #:lo12:.LANCHOR132]
 	add	x16, x8, :lo12:.LANCHOR71
-	add	x7, x7, :lo12:.LANCHOR131
-	add	x10, x4, :lo12:.LANCHOR126
+	add	x7, x7, :lo12:.LANCHOR132
+	add	x10, x4, :lo12:.LANCHOR127
 	mov	w6, 0
 	mov	w15, -1
-.L1171:
+.L1176:
 	cmp	w2, 255
-	beq	.L1172
+	beq	.L1177
 	sbfiz	x8, x2, 6, 32
 	sxtw	x0, w2
 	add	x4, x5, x8
@@ -7058,61 +7105,61 @@ queue_remove_completed_req:
 	sub	w4, w4, #12
 	and	w4, w4, 255
 	cmp	w4, 1
-	bls	.L1173
-	cbz	w6, .L1170
+	bls	.L1178
+	cbz	w6, .L1175
 	strb	w2, [x1, #:lo12:.LANCHOR56]
 	ret
-.L1173:
+.L1178:
 	lsl	x6, x0, 6
 	ldrb	w2, [x5, x8]
 	add	x4, x5, x6
 	strb	w15, [x5, x6]
 	ldrb	w6, [x4, 59]
 	cmp	w6, 1
-	bne	.L1176
+	bne	.L1181
 	ldrh	w4, [x4, 50]
-	cbnz	w4, .L1184
+	cbnz	w4, .L1189
 	mov	w4, w14
 	mov	x6, x10
-.L1177:
+.L1182:
 	cmp	w4, 255
-	bne	.L1182
+	bne	.L1187
 	add	x3, x3, :lo12:.LANCHOR52
 	strb	w2, [x1, #:lo12:.LANCHOR56]
 	add	x0, x3, x0, lsl 6
 	ldrb	w0, [x0, 1]
 	strb	w0, [x6]
 	ret
-.L1176:
-	cbnz	w6, .L1178
+.L1181:
+	cbnz	w6, .L1183
 	ldr	w4, [x4, 36]
 	cmn	w4, #1
-	beq	.L1178
+	beq	.L1183
 	mov	w4, w13
 	mov	x6, x7
-	b	.L1177
-.L1184:
+	b	.L1182
+.L1189:
 	mov	w4, w12
 	mov	x6, x16
-	b	.L1177
-.L1182:
+	b	.L1182
+.L1187:
 	mov	w6, w4
 	sbfiz	x4, x4, 6, 32
 	ldrb	w4, [x11, x4]
 	cmp	w4, 255
-	bne	.L1182
+	bne	.L1187
 	add	x0, x11, x0, lsl 6
 	sbfiz	x6, x6, 6, 32
 	ldrb	w0, [x0, 1]
 	strb	w0, [x11, x6]
-.L1178:
+.L1183:
 	mov	w6, 1
-	b	.L1171
-.L1172:
-	cbz	w6, .L1170
+	b	.L1176
+.L1177:
+	cbz	w6, .L1175
 	mov	w0, -1
 	strb	w0, [x1, #:lo12:.LANCHOR56]
-.L1170:
+.L1175:
 	ret
 	.size	queue_remove_completed_req, .-queue_remove_completed_req
 	.section	.text.pm_alloc_new_blk,"ax",@progbits
@@ -7134,17 +7181,17 @@ pm_alloc_new_blk:
 	and	w0, w0, 65535
 	strh	w0, [x1, 690]
 	cmp	w2, w0
-	bls	.L1195
+	bls	.L1200
 	add	x0, x1, x0, sxtw 1
 	ldrh	w1, [x0, 672]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1196
-.L1195:
-	adrp	x19, .LC77
-	add	x19, x19, :lo12:.LC77
+	bne	.L1201
+.L1200:
+	adrp	x19, .LC76
+	add	x19, x19, :lo12:.LC76
 	adrp	x23, .LANCHOR7
-.L1208:
+.L1213:
 	mov	w0, 1
 	bl	ftl_alloc_sblk
 	mov	w1, 0
@@ -7156,7 +7203,7 @@ pm_alloc_new_blk:
 	add	x1, x1, 672
 	bl	ftl_get_blk_list_in_sblk
 	tst	w0, 65535
-	bne	.L1197
+	bne	.L1202
 	mov	w1, w21
 	mov	x0, x19
 	bl	printf
@@ -7165,39 +7212,39 @@ pm_alloc_new_blk:
 	ldrb	w0, [x1, 2]
 	orr	w0, w0, -32
 	strb	w0, [x1, 2]
-	b	.L1208
-.L1197:
+	b	.L1213
+.L1202:
 	ldr	x0, [x14]
-	adrp	x1, .LANCHOR132
+	adrp	x1, .LANCHOR133
 	mov	w2, 1
 	mov	w19, 0
 	add	x0, x0, 416
-	str	w2, [x1, #:lo12:.LANCHOR132]
+	str	w2, [x1, #:lo12:.LANCHOR133]
 	mov	w1, 65535
 	strh	wzr, [x0, 274]
-.L1199:
+.L1204:
 	ldrh	w2, [x0]
 	cmp	w2, w1
-	beq	.L1198
+	beq	.L1203
 	add	w19, w19, 1
 	add	x0, x0, 2
 	and	w19, w19, 65535
 	cmp	w19, 128
-	bne	.L1199
-	adrp	x1, .LANCHOR133
+	bne	.L1204
+	adrp	x1, .LANCHOR134
 	adrp	x0, .LC0
-	mov	w2, 227
-	add	x1, x1, :lo12:.LANCHOR133
+	mov	w2, 231
+	add	x1, x1, :lo12:.LANCHOR134
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1198:
+.L1203:
 	ldr	x0, [x20, #:lo12:.LANCHOR104]
 	add	x19, x0, x19, sxtw 1
 	ldrh	w1, [x0, 688]
 	strh	w21, [x19, 416]
 	add	w1, w1, 1
 	strh	w1, [x0, 688]
-.L1196:
+.L1201:
 	ldr	x1, [x20, #:lo12:.LANCHOR104]
 	ldrh	w0, [x1, 690]
 	add	x0, x0, 336
@@ -7205,14 +7252,14 @@ pm_alloc_new_blk:
 	mov	w0, 65533
 	sub	w1, w19, #1
 	cmp	w0, w1, uxth
-	bcs	.L1201
-	adrp	x1, .LANCHOR133
+	bcs	.L1206
+	adrp	x1, .LANCHOR134
 	adrp	x0, .LC0
-	mov	w2, 232
-	add	x1, x1, :lo12:.LANCHOR133
+	mov	w2, 236
+	add	x1, x1, :lo12:.LANCHOR134
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1201:
+.L1206:
 	adrp	x1, .LANCHOR31
 	mov	w2, 24
 	ldr	x0, [x20, #:lo12:.LANCHOR104]
@@ -7227,17 +7274,17 @@ pm_alloc_new_blk:
 	strh	w4, [x0, 694]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1204
+	tbz	x0, 12, .L1209
 	mov	w0, 1
 	and	w4, w4, 65535
 	lsl	w2, w0, w2
 	mov	w3, w19
-	adrp	x0, .LC78
+	adrp	x0, .LC77
 	sub	w2, w2, #1
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC78
+	add	x0, x0, :lo12:.LC77
 	bl	printf
-.L1204:
+.L1209:
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -7251,68 +7298,68 @@ pm_alloc_new_blk:
 	.type	pm_select_ram_region, %function
 pm_select_ram_region:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR134
-	add	x0, x0, :lo12:.LANCHOR134
+	adrp	x0, .LANCHOR135
+	add	x0, x0, :lo12:.LANCHOR135
 	mov	x1, 0
 	add	x29, sp, 0
 	mov	w2, 65535
 	str	x19, [sp, 16]
-.L1213:
+.L1218:
 	lsl	x3, x1, 4
 	and	w19, w1, 65535
 	ldrh	w3, [x3, x0]
 	cmp	w3, w2
-	beq	.L1212
+	beq	.L1217
 	add	x1, x1, 1
 	cmp	x1, 32
-	bne	.L1213
+	bne	.L1218
 	add	x0, x0, 2
 	mov	w19, w1
 	mov	x2, x0
 	mov	w4, 32768
 	mov	w1, 0
-.L1215:
+.L1220:
 	ldrh	w3, [x2]
-	tbnz	x3, 15, .L1214
+	tbnz	x3, 15, .L1219
 	cmp	w3, w4
-	bcs	.L1214
+	bcs	.L1219
 	mov	w4, w3
 	mov	w19, w1
-.L1214:
+.L1219:
 	add	w1, w1, 1
 	add	x2, x2, 16
 	and	w1, w1, 65535
 	cmp	w1, 32
-	bne	.L1215
+	bne	.L1220
 	cmp	w19, 32
-	bne	.L1212
-	adrp	x1, .LANCHOR135
+	bne	.L1217
+	adrp	x1, .LANCHOR136
 	mov	w2, -1
-	ldrb	w3, [x1, #:lo12:.LANCHOR135]
+	ldrb	w3, [x1, #:lo12:.LANCHOR136]
 	mov	w1, 0
-.L1217:
+.L1222:
 	ldrh	w5, [x0]
 	cmp	w5, w2
-	bcs	.L1216
+	bcs	.L1221
 	ldrh	w4, [x0, -2]
 	cmp	w4, w3
 	csel	w2, w2, w5, eq
 	csel	w19, w19, w1, eq
-.L1216:
+.L1221:
 	add	w1, w1, 1
 	add	x0, x0, 16
 	and	w1, w1, 65535
 	cmp	w1, 32
-	bne	.L1217
+	bne	.L1222
 	cmp	w19, 32
-	bne	.L1212
-	adrp	x1, .LANCHOR136
+	bne	.L1217
+	adrp	x1, .LANCHOR137
 	adrp	x0, .LC0
-	mov	w2, 331
-	add	x1, x1, :lo12:.LANCHOR136
+	mov	w2, 335
+	add	x1, x1, :lo12:.LANCHOR137
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1212:
+.L1217:
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -7323,12 +7370,14 @@ pm_select_ram_region:
 	.global	idb_init
 	.type	idb_init, %function
 idb_init:
-	adrp	x0, .LANCHOR137
-	str	xzr, [x0, #:lo12:.LANCHOR137]
 	adrp	x0, .LANCHOR138
-	str	wzr, [x0, #:lo12:.LANCHOR138]
+	str	xzr, [x0, #:lo12:.LANCHOR138]
 	adrp	x0, .LANCHOR139
-	str	xzr, [x0, #:lo12:.LANCHOR139]
+	str	wzr, [x0, #:lo12:.LANCHOR139]
+	adrp	x0, .LANCHOR140
+	strb	wzr, [x0, #:lo12:.LANCHOR140]
+	adrp	x0, .LANCHOR141
+	str	xzr, [x0, #:lo12:.LANCHOR141]
 	mov	w0, 0
 	ret
 	.size	idb_init, .-idb_init
@@ -7349,59 +7398,59 @@ flash_lsb_page_tbl_build:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR3
-	cbnz	w0, .L1225
+	cbnz	w0, .L1230
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1226:
+.L1231:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 256
-	bne	.L1226
-.L1232:
-	adrp	x20, .LANCHOR140
-	add	x20, x20, :lo12:.LANCHOR140
+	bne	.L1231
+.L1237:
+	adrp	x20, .LANCHOR142
+	add	x20, x20, :lo12:.LANCHOR142
 	mov	w2, 1024
 	mov	w1, 255
 	mov	x0, x20
 	add	x19, x19, :lo12:.LANCHOR3
 	bl	ftl_memset
 	mov	x0, 0
-.L1227:
+.L1232:
 	ldrh	w1, [x0, x19]
 	add	x0, x0, 2
 	cmp	x0, 512
 	strh	w1, [x20, w1, sxtw 1]
-	bne	.L1227
+	bne	.L1232
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1225:
+.L1230:
 	cmp	w0, 1
-	bne	.L1228
+	bne	.L1233
 	add	x3, x19, :lo12:.LANCHOR3
 	mov	x1, 0
-.L1231:
+.L1236:
 	and	w0, w1, 65535
 	cmp	x1, 3
-	bls	.L1229
+	bls	.L1234
 	ubfiz	w2, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 2
 	sub	w0, w2, w0
 	and	w0, w0, 65535
-.L1229:
+.L1234:
 	strh	w0, [x3, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L1231
-	b	.L1232
-.L1228:
+	bne	.L1236
+	b	.L1237
+.L1233:
 	cmp	w0, 2
-	bne	.L1233
+	bne	.L1238
 	add	x3, x19, :lo12:.LANCHOR3
 	mov	w1, 65535
 	mov	x0, 0
-.L1235:
+.L1240:
 	cmp	x0, 2
 	and	w2, w0, 65535
 	csel	w2, w2, w1, cc
@@ -7410,31 +7459,31 @@ flash_lsb_page_tbl_build:
 	add	x0, x0, 1
 	and	w1, w1, 65535
 	cmp	x0, 256
-	bne	.L1235
-	b	.L1232
-.L1233:
+	bne	.L1240
+	b	.L1237
+.L1238:
 	cmp	w0, 3
-	bne	.L1236
+	bne	.L1241
 	add	x3, x19, :lo12:.LANCHOR3
 	mov	x1, 0
-.L1239:
+.L1244:
 	and	w0, w1, 65535
 	cmp	x1, 5
-	bls	.L1237
+	bls	.L1242
 	ubfiz	w2, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 4
 	sub	w0, w2, w0
 	and	w0, w0, 65535
-.L1237:
+.L1242:
 	strh	w0, [x3, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L1239
-	b	.L1232
-.L1236:
+	bne	.L1244
+	b	.L1237
+.L1241:
 	cmp	w0, 4
-	bne	.L1240
+	bne	.L1245
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	w2, 1
 	add	x1, x1, 16
@@ -7452,7 +7501,7 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1, -10]
 	strh	w0, [x1, -2]
 	mov	w0, 8
-.L1242:
+.L1247:
 	and	w3, w0, 1
 	ubfiz	w2, w0, 1, 15
 	add	w3, w3, 6
@@ -7461,40 +7510,40 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1], 2
 	and	w0, w0, 65535
 	cmp	w0, 256
-	bne	.L1242
-	b	.L1232
-.L1240:
+	bne	.L1247
+	b	.L1237
+.L1245:
 	cmp	w0, 5
-	bne	.L1243
+	bne	.L1248
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1244:
+.L1249:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 16
-	bne	.L1244
+	bne	.L1249
 	add	x1, x1, 32
-.L1245:
+.L1250:
 	strh	w0, [x1], 2
 	add	w0, w0, 2
 	and	w0, w0, 65535
 	cmp	w0, 496
-	bne	.L1245
-	b	.L1232
-.L1243:
+	bne	.L1250
+	b	.L1237
+.L1248:
 	cmp	w0, 8
-	bne	.L1246
+	bne	.L1251
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1247:
+.L1252:
 	strh	w0, [x0, x1]
 	add	x0, x0, 2
 	cmp	x0, 512
-	bne	.L1247
-	b	.L1232
-.L1246:
+	bne	.L1252
+	b	.L1237
+.L1251:
 	cmp	w0, 9
-	bne	.L1232
+	bne	.L1253
 	add	x0, x19, :lo12:.LANCHOR3
 	mov	w1, 1
 	add	x0, x0, 6
@@ -7503,13 +7552,31 @@ flash_lsb_page_tbl_build:
 	mov	w1, 2
 	strh	w1, [x0, -2]
 	mov	w1, 3
-.L1248:
+.L1254:
 	strh	w1, [x0], 2
 	add	w1, w1, 2
 	and	w1, w1, 65535
 	cmp	w1, 509
-	bne	.L1248
-	b	.L1232
+	bne	.L1254
+	b	.L1237
+.L1253:
+	cmp	w0, 10
+	bne	.L1237
+	add	x1, x19, :lo12:.LANCHOR3
+	mov	x0, 0
+.L1255:
+	strh	w0, [x1, x0, lsl 1]
+	add	x0, x0, 1
+	cmp	x0, 63
+	bne	.L1255
+	add	x1, x1, 126
+.L1256:
+	strh	w0, [x1], 2
+	add	w0, w0, 2
+	and	w0, w0, 65535
+	cmp	w0, 449
+	bne	.L1256
+	b	.L1237
 	.size	flash_lsb_page_tbl_build, .-flash_lsb_page_tbl_build
 	.section	.text.flash_die_info_init,"ax",@progbits
 	.align	2
@@ -7523,13 +7590,13 @@ flash_die_info_init:
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	tbz	x0, 12, .L1265
-	adrp	x1, .LANCHOR141
+	tbz	x0, 12, .L1275
+	adrp	x1, .LANCHOR143
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR141
+	add	x1, x1, :lo12:.LANCHOR143
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1265:
+.L1275:
 	adrp	x22, .LANCHOR32
 	add	x19, x22, :lo12:.LANCHOR32
 	adrp	x23, .LANCHOR2
@@ -7537,78 +7604,78 @@ flash_die_info_init:
 	adrp	x21, .LANCHOR30
 	mov	w2, 8
 	ldrh	w0, [x19, 26]
-	adrp	x20, .LANCHOR143
+	adrp	x20, .LANCHOR145
 	ldrb	w1, [x19, 12]
 	strh	w0, [x23, #:lo12:.LANCHOR2]
 	ldrh	w0, [x19, 10]
 	strb	wzr, [x24, #:lo12:.LANCHOR18]
 	sdiv	w0, w0, w1
-	adrp	x1, .LANCHOR142
-	strh	w0, [x1, #:lo12:.LANCHOR142]
+	adrp	x1, .LANCHOR144
+	strh	w0, [x1, #:lo12:.LANCHOR144]
 	mov	w1, 0
 	add	x0, x21, :lo12:.LANCHOR30
 	bl	ftl_memset
-	add	x0, x20, :lo12:.LANCHOR143
+	add	x0, x20, :lo12:.LANCHOR145
 	mov	w2, 32
 	mov	w1, 0
 	bl	ftl_memset
+	mov	x8, x22
 	mov	x15, x21
 	mov	x11, x20
-	adrp	x12, .LANCHOR33
 	adrp	x14, .LANCHOR44
-	mov	x7, x22
-	add	x12, x12, :lo12:.LANCHOR33
-	add	x20, x14, :lo12:.LANCHOR44
-	add	x21, x19, 1
-	mov	x10, 0
-.L1267:
+	adrp	x20, .LANCHOR33
+	add	x21, x14, :lo12:.LANCHOR44
+	add	x20, x20, :lo12:.LANCHOR33
+	add	x22, x19, 1
+	mov	x12, 0
+.L1277:
 	ldrb	w2, [x19]
 	mov	w0, 2
-	strb	w0, [x10, x12]
-	add	x1, x20, x10, lsl 3
-	mov	x0, x21
+	strb	w0, [x12, x20]
+	add	x1, x21, x12, lsl 3
+	mov	x0, x22
 	bl	flash_mem_cmp8
-	cbnz	w0, .L1266
+	cbnz	w0, .L1276
 	ldrb	w2, [x24, #:lo12:.LANCHOR18]
-	add	x1, x11, :lo12:.LANCHOR143
+	add	x1, x11, :lo12:.LANCHOR145
 	add	w0, w2, 1
 	strb	w0, [x24, #:lo12:.LANCHOR18]
-	and	w0, w10, 255
+	and	w0, w12, 255
 	str	wzr, [x1, x2, lsl 2]
 	add	x1, x15, :lo12:.LANCHOR30
 	strb	w0, [x1, x2]
 	bl	zftl_flash_enter_slc_mode
-.L1266:
-	add	x10, x10, 1
-	cmp	x10, 4
-	bne	.L1267
-	add	x0, x7, :lo12:.LANCHOR32
+.L1276:
+	add	x12, x12, 1
+	cmp	x12, 4
+	bne	.L1277
+	add	x0, x8, :lo12:.LANCHOR32
 	ldrb	w1, [x0, 8]
 	cmp	w1, 2
-	beq	.L1268
-.L1272:
-	add	x7, x7, :lo12:.LANCHOR32
+	beq	.L1278
+.L1282:
+	add	x8, x8, :lo12:.LANCHOR32
 	ldrb	w0, [x24, #:lo12:.LANCHOR18]
 	ldp	x19, x20, [sp, 16]
-	ldrb	w1, [x7, 13]
+	ldrb	w1, [x8, 13]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	mul	w0, w0, w1
-	ldrh	w1, [x7, 14]
+	ldrh	w1, [x8, 14]
 	ldp	x29, x30, [sp], 64
 	mul	w0, w0, w1
-	adrp	x1, .LANCHOR144
-	strh	w0, [x1, #:lo12:.LANCHOR144]
+	adrp	x1, .LANCHOR146
+	strh	w0, [x1, #:lo12:.LANCHOR146]
 	ret
-.L1268:
+.L1278:
 	ldrh	w1, [x23, #:lo12:.LANCHOR2]
 	add	x14, x14, :lo12:.LANCHOR44
 	ldrb	w12, [x0, 13]
-	add	x10, x0, 1
-	ldrb	w20, [x7, #:lo12:.LANCHOR32]
+	add	x7, x0, 1
+	ldrb	w20, [x8, #:lo12:.LANCHOR32]
 	add	x19, x24, :lo12:.LANCHOR18
 	ldrb	w21, [x0, 23]
-	add	x11, x11, :lo12:.LANCHOR143
+	add	x11, x11, :lo12:.LANCHOR145
 	add	x15, x15, :lo12:.LANCHOR30
 	mov	x13, 0
 	mul	w12, w12, w1
@@ -7616,12 +7683,12 @@ flash_die_info_init:
 	and	w1, w1, 65280
 	mul	w12, w12, w1
 	lsl	w22, w12, 1
-.L1271:
+.L1281:
 	mov	w2, w20
 	add	x1, x14, x13, lsl 3
-	mov	x0, x10
+	mov	x0, x7
 	bl	flash_mem_cmp8
-	cbnz	w0, .L1269
+	cbnz	w0, .L1279
 	ldrb	w1, [x19]
 	cmp	w21, 0
 	csel	w2, w12, w22, eq
@@ -7629,11 +7696,11 @@ flash_die_info_init:
 	strb	w0, [x19]
 	str	w2, [x11, x1, lsl 2]
 	strb	w13, [x15, x1]
-.L1269:
+.L1279:
 	add	x13, x13, 1
 	cmp	x13, 4
-	bne	.L1271
-	b	.L1272
+	bne	.L1281
+	b	.L1282
 	.size	flash_die_info_init, .-flash_die_info_init
 	.section	.text.lpa_hash_init,"ax",@progbits
 	.align	2
@@ -7670,15 +7737,15 @@ lpa_rebuild_hash:
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	tbz	x0, 12, .L1285
-	adrp	x1, .LANCHOR145
-	adrp	x0, .LC79
+	tbz	x0, 12, .L1295
+	adrp	x1, .LANCHOR147
+	adrp	x0, .LC78
 	mov	w3, 0
 	mov	w2, 225
-	add	x1, x1, :lo12:.LANCHOR145
-	add	x0, x0, :lo12:.LC79
+	add	x1, x1, :lo12:.LANCHOR147
+	add	x0, x0, :lo12:.LC78
 	bl	printf
-.L1285:
+.L1295:
 	adrp	x20, .LANCHOR87
 	adrp	x22, .LANCHOR80
 	adrp	x19, .LANCHOR110
@@ -7701,28 +7768,28 @@ lpa_rebuild_hash:
 	ldr	x5, [x21, #:lo12:.LANCHOR112]
 	mov	w1, 0
 	ldr	x4, [x0, #:lo12:.LANCHOR111]
-.L1286:
+.L1296:
 	ldrh	w0, [x20]
 	mul	w0, w0, w3
 	cmp	w1, w0, lsl 1
-	blt	.L1288
+	blt	.L1298
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1288:
+.L1298:
 	uxtw	x2, w1
 	ldr	w0, [x4, x2, lsl 2]
 	cmn	w0, #1
-	beq	.L1287
+	beq	.L1297
 	and	x0, x0, 255
 	ldrh	w6, [x19, x0, lsl 1]
 	strh	w1, [x19, x0, lsl 1]
 	strh	w6, [x5, x2, lsl 1]
-.L1287:
+.L1297:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L1286
+	b	.L1296
 	.size	lpa_rebuild_hash, .-lpa_rebuild_hash
 	.section	.text.zftl_read_flash_info,"ax",@progbits
 	.align	2
@@ -7770,20 +7837,20 @@ zftl_read_flash_info:
 	strb	w0, [x19, 9]
 	adrp	x0, .LANCHOR18
 	ldrb	w3, [x0, #:lo12:.LANCHOR18]
-.L1297:
+.L1307:
 	cmp	w3, w1, uxtb
-	bhi	.L1298
+	bhi	.L1308
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1298:
+.L1308:
 	ldrb	w0, [x1, x2]
 	add	x1, x1, 1
 	ldrb	w5, [x19, 10]
 	lsl	w0, w4, w0
 	orr	w0, w0, w5
 	strb	w0, [x19, 10]
-	b	.L1297
+	b	.L1307
 	.size	zftl_read_flash_info, .-zftl_read_flash_info
 	.section	.text.gc_static_wearleveling,"ax",@progbits
 	.align	2
@@ -7802,9 +7869,9 @@ gc_static_wearleveling:
 	ldr	w1, [x0, 32]
 	mov	w0, 10240
 	cmp	w1, w0
-	bls	.L1301
+	bls	.L1311
 	bl	ftl_tmp_into_update
-.L1301:
+.L1311:
 	adrp	x19, .LANCHOR10
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldr	w1, [x0, 568]
@@ -7812,14 +7879,14 @@ gc_static_wearleveling:
 	add	w1, w1, 860160
 	add	w1, w1, 3840
 	cmp	w2, w1
-	bhi	.L1302
+	bhi	.L1312
 	ldr	x3, [x23, #:lo12:.LANCHOR104]
 	ldr	w1, [x0, 572]
 	add	w1, w1, 32
 	ldr	w3, [x3, 36]
 	cmp	w3, w1
-	bls	.L1352
-.L1302:
+	bls	.L1362
+.L1312:
 	ldr	x1, [x23, #:lo12:.LANCHOR104]
 	mov	w20, 65535
 	adrp	x8, .LANCHOR14
@@ -7839,10 +7906,10 @@ gc_static_wearleveling:
 	str	wzr, [x29, 136]
 	stp	wzr, wzr, [x29, 148]
 	str	wzr, [x29, 156]
-.L1304:
+.L1314:
 	ldrh	w0, [x10]
 	cmp	w0, w25
-	bhi	.L1313
+	bhi	.L1323
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w2, 128
 	mov	w1, 255
@@ -7857,14 +7924,14 @@ gc_static_wearleveling:
 	mov	x1, x5
 	lsl	x0, x5, 2
 	add	x26, x2, x0
-	tbz	x3, 10, .L1314
+	tbz	x3, 10, .L1324
 	adrp	x3, .LANCHOR9
 	ldrb	w4, [x26, 2]
 	ldr	x6, [x3, #:lo12:.LANCHOR9]
 	ldr	w3, [x2, x0]
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC81
-	add	x0, x0, :lo12:.LC81
+	adrp	x0, .LC80
+	add	x0, x0, :lo12:.LC80
 	ldrh	w7, [x6, x5, lsl 1]
 	ubfx	x3, x3, 11, 8
 	ldrb	w6, [x26, 3]
@@ -7872,24 +7939,24 @@ gc_static_wearleveling:
 	and	w2, w2, 2047
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1314:
+.L1324:
 	ldrb	w0, [x26, 2]
 	and	w1, w0, 224
 	cmp	w1, 32
-	bne	.L1315
+	bne	.L1325
 	ldr	x2, [x23, #:lo12:.LANCHOR104]
 	ldrh	w2, [x2, 688]
 	cmp	w2, 2
-	bls	.L1315
-	adrp	x2, .LANCHOR146
+	bls	.L1325
+	adrp	x2, .LANCHOR148
 	mov	w3, 1
-	str	w3, [x2, #:lo12:.LANCHOR146]
-.L1315:
+	str	w3, [x2, #:lo12:.LANCHOR148]
+.L1325:
 	ldrb	w2, [x26, 2]
-	tbz	x2, 3, .L1316
+	tbz	x2, 3, .L1326
 	and	w0, w0, 192
 	cmp	w0, 64
-	bne	.L1317
+	bne	.L1327
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w1, 0
 	mov	w2, 1
@@ -7898,7 +7965,7 @@ gc_static_wearleveling:
 	adrp	x0, .LANCHOR64+574
 	mov	w1, 1
 	strh	w1, [x0, #:lo12:.LANCHOR64+574]
-.L1316:
+.L1326:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldr	w3, [x25, #:lo12:.LANCHOR14]
 	ldr	x2, [x24, #:lo12:.LANCHOR7]
@@ -7906,14 +7973,14 @@ gc_static_wearleveling:
 	mov	x1, x5
 	lsl	x0, x5, 2
 	add	x26, x2, x0
-	tbz	x3, 10, .L1318
+	tbz	x3, 10, .L1328
 	adrp	x3, .LANCHOR9
 	ldrb	w4, [x26, 2]
 	ldr	x6, [x3, #:lo12:.LANCHOR9]
 	ldr	w3, [x2, x0]
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC82
-	add	x0, x0, :lo12:.LC82
+	adrp	x0, .LC81
+	add	x0, x0, :lo12:.LC81
 	ldrh	w7, [x6, x5, lsl 1]
 	ubfx	x3, x3, 11, 8
 	ldrb	w6, [x26, 3]
@@ -7921,13 +7988,13 @@ gc_static_wearleveling:
 	and	w2, w2, 2047
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1318:
+.L1328:
 	ldrb	w0, [x26, 2]
-	tbz	x0, 3, .L1319
+	tbz	x0, 3, .L1329
 	ldrb	w0, [x26, 2]
 	and	w1, w0, 192
 	cmp	w1, 64
-	bne	.L1320
+	bne	.L1330
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w1, 0
 	mov	w2, 1
@@ -7936,9 +8003,9 @@ gc_static_wearleveling:
 	adrp	x0, .LANCHOR64+574
 	mov	w1, 1
 	strh	w1, [x0, #:lo12:.LANCHOR64+574]
-.L1319:
+.L1329:
 	ldr	w0, [x25, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1321
+	tbz	x0, 10, .L1331
 	ldr	w6, [x29, 128]
 	adrp	x2, .LANCHOR9
 	ldr	x1, [x24, #:lo12:.LANCHOR7]
@@ -7947,9 +8014,9 @@ gc_static_wearleveling:
 	add	x5, x1, x0
 	ldr	w3, [x1, x0]
 	ldrh	w2, [x1, x0]
-	adrp	x0, .LC83
+	adrp	x0, .LC82
 	ldrh	w7, [x7, x6, lsl 1]
-	add	x0, x0, :lo12:.LC83
+	add	x0, x0, :lo12:.LC82
 	ldrb	w6, [x5, 3]
 	ubfx	x3, x3, 11, 8
 	ldr	w1, [x29, 128]
@@ -7958,9 +8025,9 @@ gc_static_wearleveling:
 	ubfx	x5, x4, 5, 3
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1321:
+.L1331:
 	ldr	w0, [x25, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1322
+	tbz	x0, 10, .L1332
 	ldr	w6, [x29, 136]
 	adrp	x2, .LANCHOR9
 	ldr	x1, [x24, #:lo12:.LANCHOR7]
@@ -7969,9 +8036,9 @@ gc_static_wearleveling:
 	add	x5, x1, x0
 	ldr	w3, [x1, x0]
 	ldrh	w2, [x1, x0]
-	adrp	x0, .LC84
+	adrp	x0, .LC83
 	ldrh	w7, [x7, x6, lsl 1]
-	add	x0, x0, :lo12:.LC84
+	add	x0, x0, :lo12:.LC83
 	ldrb	w6, [x5, 3]
 	ubfx	x3, x3, 11, 8
 	ldr	w1, [x29, 136]
@@ -7980,7 +8047,7 @@ gc_static_wearleveling:
 	ubfx	x5, x4, 5, 3
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1322:
+.L1332:
 	ldr	x0, [x23, #:lo12:.LANCHOR104]
 	ldrh	w1, [x29, 156]
 	strh	w1, [x0, 96]
@@ -7994,43 +8061,43 @@ gc_static_wearleveling:
 	strh	w3, [x0, 88]
 	strh	w4, [x0, 90]
 	ldr	w0, [x25, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1323
-	adrp	x0, .LC85
+	tbz	x0, 10, .L1333
+	adrp	x0, .LC84
 	and	w4, w4, 65535
 	and	w3, w3, 65535
 	mov	w2, w28
 	mov	w1, w27
-	add	x0, x0, :lo12:.LC85
+	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L1323:
+.L1333:
 	ldr	w0, [x25, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1324
-	adrp	x0, .LANCHOR147
+	tbz	x0, 10, .L1334
+	adrp	x0, .LANCHOR149
 	ldr	w3, [x29, 156]
 	mov	w4, w22
 	mov	w2, w21
-	ldrh	w6, [x0, #:lo12:.LANCHOR147]
-	adrp	x0, .LANCHOR148
+	ldrh	w6, [x0, #:lo12:.LANCHOR149]
+	adrp	x0, .LANCHOR150
 	mov	w1, w20
-	ldrh	w5, [x0, #:lo12:.LANCHOR148]
-	adrp	x0, .LC86
-	add	x0, x0, :lo12:.LC86
+	ldrh	w5, [x0, #:lo12:.LANCHOR150]
+	adrp	x0, .LC85
+	add	x0, x0, :lo12:.LC85
 	bl	printf
-.L1324:
+.L1334:
 	sub	w0, w22, w21
 	str	w0, [x29, 148]
-	adrp	x0, .LANCHOR147
+	adrp	x0, .LANCHOR149
 	ldr	w1, [x29, 148]
-	ldrh	w0, [x0, #:lo12:.LANCHOR147]
+	ldrh	w0, [x0, #:lo12:.LANCHOR149]
 	cmp	w1, w0
-	bgt	.L1325
-	adrp	x1, .LANCHOR148
+	bgt	.L1335
+	adrp	x1, .LANCHOR150
 	ldr	w0, [x29, 156]
-	ldrh	w1, [x1, #:lo12:.LANCHOR148]
+	ldrh	w1, [x1, #:lo12:.LANCHOR150]
 	sub	w0, w0, w20
 	cmp	w0, w1
-	ble	.L1353
-.L1325:
+	ble	.L1363
+.L1335:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	adrp	x28, .LANCHOR64
 	add	x28, x28, :lo12:.LANCHOR64
@@ -8043,64 +8110,64 @@ gc_static_wearleveling:
 	adrp	x0, .LANCHOR6
 	add	x0, x0, :lo12:.LANCHOR6
 	str	x0, [x29, 136]
-	adrp	x0, .LANCHOR148
-	add	x0, x0, :lo12:.LANCHOR148
+	adrp	x0, .LANCHOR150
+	add	x0, x0, :lo12:.LANCHOR150
 	str	x0, [x29, 128]
-.L1327:
+.L1337:
 	ldr	x0, [x29, 136]
 	ldr	w1, [x29, 152]
 	ldrh	w0, [x0]
 	cmp	w1, w0
-	bcc	.L1337
-.L1336:
+	bcc	.L1347
+.L1346:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	str	w26, [x0, 580]
-.L1326:
-	cbz	w21, .L1339
+.L1336:
+	cbz	w21, .L1349
 	ldr	x2, [x23, #:lo12:.LANCHOR104]
 	adrp	x0, .LANCHOR6
 	ldrh	w5, [x0, #:lo12:.LANCHOR6]
 	ldr	x0, [x24, #:lo12:.LANCHOR7]
 	ldrh	w1, [x2, 134]
 	add	x0, x0, x1, uxth 2
-.L1340:
+.L1350:
 	cmp	w1, w5
-	bcc	.L1342
+	bcc	.L1352
 	ldrh	w0, [x2, 72]
 	add	w0, w21, w0
 	strh	w0, [x2, 72]
 	ldrh	w0, [x2, 98]
 	cmp	w21, w0
-	bcs	.L1339
+	bcs	.L1349
 	sub	w21, w0, w21
 	strh	w21, [x2, 98]
-.L1339:
-	cbz	w20, .L1345
+.L1349:
+	cbz	w20, .L1355
 	ldr	x2, [x23, #:lo12:.LANCHOR104]
 	adrp	x0, .LANCHOR6
 	ldrh	w6, [x0, #:lo12:.LANCHOR6]
 	ldr	x0, [x24, #:lo12:.LANCHOR7]
 	ldrh	w1, [x2, 134]
 	add	x0, x0, x1, uxth 2
-.L1346:
+.L1356:
 	cmp	w1, w6
-	bcc	.L1348
+	bcc	.L1358
 	ldrh	w0, [x2, 74]
 	add	w0, w20, w0
 	strh	w0, [x2, 74]
 	ldrh	w0, [x2, 96]
 	cmp	w20, w0
-	bcs	.L1345
+	bcs	.L1355
 	sub	w20, w0, w20
 	strh	w20, [x2, 96]
-.L1345:
+.L1355:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L1303
+	beq	.L1313
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
@@ -8108,12 +8175,12 @@ gc_static_wearleveling:
 	adrp	x1, .LANCHOR87
 	ldrh	w1, [x1, #:lo12:.LANCHOR87]
 	cmp	w2, w1
-	bhi	.L1303
+	bhi	.L1313
 	add	w22, w22, 1
 	mov	w2, 1
 	mov	w1, 0
 	bl	gc_add_sblk
-.L1303:
+.L1313:
 	add	w0, w22, w27
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -8122,7 +8189,7 @@ gc_static_wearleveling:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L1313:
+.L1323:
 	uxtw	x7, w25
 	ldr	x6, [x24, #:lo12:.LANCHOR7]
 	lsl	x2, x7, 2
@@ -8130,40 +8197,40 @@ gc_static_wearleveling:
 	ldrb	w0, [x11, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L1305
+	beq	.L1315
 	ubfx	x4, x0, 3, 2
-	tbz	x4, 0, .L1306
+	tbz	x4, 0, .L1316
 	ldr	w0, [x6, x2]
 	ldrh	w1, [x6, x2]
 	ubfx	x0, x0, 11, 8
 	and	w1, w1, 2047
-.L1307:
+.L1317:
 	ldr	w3, [x29, 148]
 	add	w27, w27, 1
 	and	w27, w27, 65535
 	cmp	w20, w1
 	add	w3, w3, w1
 	str	w3, [x29, 148]
-	bls	.L1351
+	bls	.L1361
 	ldr	x3, [x19, #:lo12:.LANCHOR10]
 	mov	w20, w1
 	strh	w25, [x3, 586]
-.L1351:
+.L1361:
 	ldr	w3, [x29, 156]
 	cmp	w3, w1
-	bcs	.L1310
+	bcs	.L1320
 	str	w25, [x29, 128]
 	str	w1, [x29, 156]
-.L1310:
+.L1320:
 	mov	w3, 65535
 	cmp	w0, w3
-	bne	.L1309
-.L1311:
+	bne	.L1319
+.L1321:
 	cmp	w0, 9
 	ccmp	w1, 9, 0, hi
-	bhi	.L1305
+	bhi	.L1315
 	ldr	w0, [x8]
-	tbz	x0, 8, .L1305
+	tbz	x0, 8, .L1315
 	adrp	x0, .LANCHOR9
 	ldr	w3, [x6, x2]
 	ldrh	w2, [x6, x2]
@@ -8175,82 +8242,82 @@ gc_static_wearleveling:
 	and	w2, w2, 2047
 	stp	x8, x10, [x29, 112]
 	ldrh	w7, [x0, x7, lsl 1]
-	adrp	x0, .LC80
+	adrp	x0, .LC79
 	ubfx	x5, x5, 5, 3
-	add	x0, x0, :lo12:.LC80
+	add	x0, x0, :lo12:.LC79
 	bl	printf
 	ldp	x8, x10, [x29, 112]
-.L1305:
+.L1315:
 	add	w25, w25, 1
 	and	w25, w25, 65535
-	b	.L1304
-.L1306:
+	b	.L1314
+.L1316:
 	tst	w0, 24
-	bne	.L1308
+	bne	.L1318
 	ldrh	w1, [x6, x2]
 	mov	w0, 65535
 	and	w1, w1, 2047
-	b	.L1307
-.L1308:
+	b	.L1317
+.L1318:
 	ldr	w0, [x6, x2]
 	mov	w1, 65535
 	ubfx	x0, x0, 11, 8
-.L1309:
+.L1319:
 	ldr	w3, [x29, 152]
 	add	w28, w28, 1
 	and	w28, w28, 65535
 	cmp	w21, w0
 	add	w3, w3, w0
 	str	w3, [x29, 152]
-	bls	.L1312
+	bls	.L1322
 	ldr	x3, [x19, #:lo12:.LANCHOR10]
 	mov	w21, w0
 	strh	w25, [x3, 584]
-.L1312:
+.L1322:
 	cmp	w22, w0
-	bcs	.L1311
+	bcs	.L1321
 	mov	w22, w0
 	str	w25, [x29, 136]
-	b	.L1311
-.L1317:
-	cbnz	w1, .L1316
+	b	.L1321
+.L1327:
+	cbnz	w1, .L1326
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
 	mov	w0, 65535
 	ldrh	w2, [x1, 590]
 	cmp	w2, w0
-	bne	.L1316
+	bne	.L1326
 	ldrh	w0, [x1, 586]
 	ldrh	w1, [x1, 588]
 	cmp	w1, w0
-	beq	.L1316
+	beq	.L1326
 	bl	zftl_remove_free_node
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldrh	w1, [x0, 586]
 	strh	w1, [x0, 590]
 	mov	w1, -1
 	strh	w1, [x0, 586]
-	b	.L1316
-.L1320:
+	b	.L1326
+.L1330:
 	and	w0, w0, 248
 	cmp	w0, 16
-	bne	.L1319
+	bne	.L1329
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
 	mov	w0, 65535
 	ldrh	w2, [x1, 588]
 	cmp	w2, w0
-	bne	.L1319
+	bne	.L1329
 	ldrh	w0, [x1, 584]
 	ldrh	w1, [x1, 590]
 	cmp	w1, w0
-	beq	.L1319
+	beq	.L1329
 	bl	zftl_remove_free_node
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldrh	w1, [x0, 584]
 	strh	w1, [x0, 588]
 	mov	w1, -1
 	strh	w1, [x0, 584]
-	b	.L1319
-.L1337:
+	b	.L1329
+.L1347:
 	add	w7, w26, 1
 	ldr	x4, [x24, #:lo12:.LANCHOR7]
 	and	w26, w7, 65535
@@ -8261,31 +8328,31 @@ gc_static_wearleveling:
 	add	x0, x4, x3
 	ldrb	w0, [x0, 2]
 	tst	w0, 192
-	beq	.L1329
+	beq	.L1339
 	and	w2, w0, 224
 	cmp	w2, 224
-	beq	.L1329
+	beq	.L1339
 	ubfx	x0, x0, 3, 2
 	and	w1, w0, 1
-	tbz	x0, 0, .L1330
+	tbz	x0, 0, .L1340
 	cmp	w2, 160
-.L1417:
-	bne	.L1332
-	adrp	x0, .LANCHOR147
+.L1427:
+	bne	.L1342
+	adrp	x0, .LANCHOR149
 	ldr	w2, [x29, 148]
-	ldrh	w0, [x0, #:lo12:.LANCHOR147]
+	ldrh	w0, [x0, #:lo12:.LANCHOR149]
 	cmp	w2, w0
-	ble	.L1333
+	ble	.L1343
 	ldr	w0, [x4, x3]
 	ubfx	x0, x0, 11, 8
 	cmp	w0, w21
-	bls	.L1334
-	cbz	w1, .L1333
+	bls	.L1344
+	cbz	w1, .L1343
 	ldrh	w0, [x4, x3]
 	and	w0, w0, 2047
 	cmp	w0, w20
-	bgt	.L1333
-.L1334:
+	bgt	.L1343
+.L1344:
 	stp	x4, x8, [x29, 104]
 	mov	w2, 1
 	str	x3, [x29, 120]
@@ -8298,7 +8365,7 @@ gc_static_wearleveling:
 	add	w22, w22, 1
 	ldp	x4, x8, [x29, 104]
 	ldr	x3, [x29, 120]
-	tbz	x0, 10, .L1333
+	tbz	x0, 10, .L1343
 	adrp	x0, .LANCHOR9
 	ldr	w6, [x4, x3]
 	ldrh	w5, [x4, x3]
@@ -8308,46 +8375,46 @@ gc_static_wearleveling:
 	ldrh	w4, [x28, 56]
 	and	w5, w5, 2047
 	add	x3, x0, x3
-	adrp	x0, .LC87
-	add	x0, x0, :lo12:.LC87
+	adrp	x0, .LC86
+	add	x0, x0, :lo12:.LC86
 	ldrb	w2, [x3, 2]
 	ldrh	w3, [x1, x8, lsl 1]
 	mov	w1, w26
 	ubfx	x2, x2, 5, 3
-.L1418:
+.L1428:
 	bl	printf
-.L1333:
+.L1343:
 	cmp	w22, 4
 	ccmp	w27, 4, 2, ls
-	bhi	.L1336
-.L1329:
+	bhi	.L1346
+.L1339:
 	ldr	w0, [x29, 152]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	str	w0, [x29, 152]
-	b	.L1327
-.L1330:
+	b	.L1337
+.L1340:
 	cmp	w0, 2
-	b	.L1417
-.L1332:
+	b	.L1427
+.L1342:
 	ldr	x2, [x29, 128]
 	ldr	w0, [x29, 156]
 	sub	w0, w0, w20
 	ldrh	w2, [x2]
 	cmp	w0, w2
-	ble	.L1333
+	ble	.L1343
 	ldrh	w0, [x4, x3]
 	add	w2, w20, 8
 	and	w0, w0, 2047
 	cmp	w0, w2
-	ble	.L1335
-	cbz	w1, .L1333
+	ble	.L1345
+	cbz	w1, .L1343
 	ldr	w0, [x4, x3]
 	add	w1, w21, 4
 	ubfx	x0, x0, 11, 8
 	cmp	w0, w1
-	bgt	.L1333
-.L1335:
+	bgt	.L1343
+.L1345:
 	stp	x4, x8, [x29, 104]
 	mov	w2, 1
 	str	x3, [x29, 120]
@@ -8360,7 +8427,7 @@ gc_static_wearleveling:
 	add	w27, w27, 1
 	ldp	x4, x8, [x29, 104]
 	ldr	x3, [x29, 120]
-	tbz	x0, 10, .L1333
+	tbz	x0, 10, .L1343
 	adrp	x0, .LANCHOR9
 	ldr	w6, [x4, x3]
 	ldrh	w5, [x4, x3]
@@ -8370,54 +8437,54 @@ gc_static_wearleveling:
 	and	w5, w5, 2047
 	ldrh	w4, [x28, 56]
 	add	x3, x0, x3
-	adrp	x0, .LC88
-	add	x0, x0, :lo12:.LC88
+	adrp	x0, .LC87
+	add	x0, x0, :lo12:.LC87
 	ldrb	w2, [x3, 2]
 	ldrh	w3, [x1, x8, lsl 1]
 	mov	w1, w26
 	ubfx	x2, x2, 5, 3
-	b	.L1418
-.L1353:
+	b	.L1428
+.L1363:
 	mov	w27, 0
 	mov	w22, 0
-	b	.L1326
-.L1342:
+	b	.L1336
+.L1352:
 	ldr	w3, [x0]
 	ubfx	x4, x3, 11, 8
 	cmp	w21, w4
-	bhi	.L1341
+	bhi	.L1351
 	ldrb	w6, [x0, 2]
 	tst	w6, 24
-	beq	.L1341
+	beq	.L1351
 	sub	w4, w4, w21
 	bfi	w3, w4, 11, 8
 	str	w3, [x0]
-.L1341:
+.L1351:
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 65535
-	b	.L1340
-.L1348:
+	b	.L1350
+.L1358:
 	ldrh	w3, [x0]
 	and	w4, w3, 2047
 	cmp	w4, w20
-	blt	.L1347
+	blt	.L1357
 	ldrb	w5, [x0, 2]
 	and	w5, w5, 24
 	cmp	w5, 16
-	beq	.L1347
+	beq	.L1357
 	sub	w4, w4, w20
 	bfi	w3, w4, 0, 11
 	strh	w3, [x0]
-.L1347:
+.L1357:
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 65535
-	b	.L1346
-.L1352:
+	b	.L1356
+.L1362:
 	mov	w27, 0
 	mov	w22, 0
-	b	.L1303
+	b	.L1313
 	.size	gc_static_wearleveling, .-gc_static_wearleveling
 	.section	.text.zftl_sblk_list_init,"ax",@progbits
 	.align	2
@@ -8482,18 +8549,18 @@ zftl_sblk_list_init:
 	strh	wzr, [x0, 146]
 	ldrsh	w26, [x0, 134]
 	add	x0, x27, :lo12:.LANCHOR6
-	adrp	x27, .LC89
-	add	x27, x27, :lo12:.LC89
+	adrp	x27, .LC88
+	add	x27, x27, :lo12:.LC88
 	stp	x3, x2, [x29, 104]
 	stp	x4, x5, [x29, 120]
 	stp	x6, x7, [x29, 136]
 	stp	x8, x10, [x29, 152]
 	str	x0, [x29, 176]
-.L1420:
+.L1430:
 	ldr	x0, [x29, 176]
 	ldrh	w0, [x0]
 	cmp	w26, w0
-	blt	.L1436
+	blt	.L1446
 	ldr	x0, [x25, #:lo12:.LANCHOR104]
 	ldrh	w1, [x24, #:lo12:.LANCHOR97]
 	ldp	x25, x26, [sp, 64]
@@ -8514,12 +8581,12 @@ zftl_sblk_list_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L1436:
+.L1446:
 	ldr	x4, [x28, #:lo12:.LANCHOR7]
 	sxtw	x2, w26
 	add	x4, x4, x2, lsl 2
 	ldrb	w6, [x4, 3]
-	cbz	w6, .L1437
+	cbz	w6, .L1447
 	ldr	x0, [x29, 112]
 	mov	w1, 0
 	ldr	x7, [x25, #:lo12:.LANCHOR104]
@@ -8527,15 +8594,15 @@ zftl_sblk_list_init:
 	ldr	x0, [x29, 104]
 	ldrh	w10, [x0, #:lo12:.LANCHOR79]
 	mov	w0, 0
-.L1422:
+.L1432:
 	cmp	w1, w8
-	blt	.L1425
-	cbz	w0, .L1426
+	blt	.L1435
+	cbz	w0, .L1436
 	mov	w1, 32768
 	sdiv	w0, w1, w0
 	add	w0, w0, 1
 	sxth	w0, w0
-.L1421:
+.L1431:
 	ldr	x3, [x29, 168]
 	mov	w1, 6
 	smull	x1, w26, w1
@@ -8550,44 +8617,44 @@ zftl_sblk_list_init:
 	and	w0, w1, 224
 	cmp	w0, 32
 	ccmp	w0, w5, 4, ne
-	beq	.L1427
+	beq	.L1437
 	adrp	x5, .LANCHOR10
 	ldr	x5, [x5, #:lo12:.LANCHOR10]
 	ldrh	w6, [x5, 16]
 	cmp	w26, w6
-	beq	.L1427
+	beq	.L1437
 	ldrh	w6, [x5, 48]
 	cmp	w26, w6
-	beq	.L1427
+	beq	.L1437
 	ldrh	w5, [x5, 80]
 	cmp	w26, w5
-	beq	.L1427
+	beq	.L1437
 	cmp	w0, 64
-	bne	.L1428
+	bne	.L1438
 	ldr	x0, [x29, 128]
 	add	x2, x21, :lo12:.LANCHOR92
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR12
-.L1440:
+.L1450:
 	bl	_insert_data_list
-.L1427:
+.L1437:
 	add	w3, w26, 1
 	sxth	w26, w3
-	b	.L1420
-.L1425:
+	b	.L1430
+.L1435:
 	asr	w5, w6, w1
-	tbnz	x5, 0, .L1423
+	tbnz	x5, 0, .L1433
 	add	w0, w10, w0
 	sxth	w0, w0
-.L1424:
+.L1434:
 	add	w1, w1, 1
-	b	.L1422
-.L1423:
+	b	.L1432
+.L1433:
 	ldrh	w5, [x7, 146]
 	add	w5, w5, 1
 	strh	w5, [x7, 146]
-	b	.L1424
-.L1426:
+	b	.L1434
+.L1436:
 	ldrb	w1, [x4, 2]
 	mov	w5, -1
 	orr	w1, w1, -32
@@ -8595,126 +8662,207 @@ zftl_sblk_list_init:
 	adrp	x1, .LANCHOR9
 	ldr	x1, [x1, #:lo12:.LANCHOR9]
 	strh	w5, [x1, x2, lsl 1]
-	b	.L1421
-.L1437:
+	b	.L1431
+.L1447:
 	ldr	w0, [x29, 188]
-	b	.L1421
-.L1428:
+	b	.L1431
+.L1438:
 	cmp	w0, 96
-	bne	.L1429
+	bne	.L1439
 	ldr	x0, [x29, 136]
 	add	x2, x19, :lo12:.LANCHOR90
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR83
-	b	.L1440
-.L1429:
+	b	.L1450
+.L1439:
 	cmp	w0, 160
-	bne	.L1430
+	bne	.L1440
 	ldr	x0, [x29, 120]
 	add	x2, x20, :lo12:.LANCHOR94
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR82
-	b	.L1440
-.L1430:
-	cbnz	w0, .L1427
+	b	.L1450
+.L1440:
+	cbnz	w0, .L1437
 	adrp	x0, .LANCHOR9
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w2, [x0, x2, lsl 1]
-	cbz	w2, .L1431
+	cbz	w2, .L1441
 	str	x4, [x29, 96]
 	mov	w1, w26
 	mov	x0, x27
 	bl	printf
 	ldr	x4, [x29, 96]
 	ldrb	w0, [x4, 2]
-	tbz	x0, 4, .L1432
+	tbz	x0, 4, .L1442
 	mov	w1, 5
-.L1439:
+.L1449:
 	bfi	w0, w1, 5, 3
 	strb	w0, [x4, 2]
 	mov	w2, 0
 	mov	w1, 1
 	mov	w0, w26
 	bl	gc_add_sblk
-	b	.L1427
-.L1432:
+	b	.L1437
+.L1442:
 	mov	w1, 2
-	b	.L1439
-.L1431:
+	b	.L1449
+.L1441:
 	ands	w1, w1, 24
-	bne	.L1434
+	bne	.L1444
 	ldr	x0, [x29, 160]
 	add	x2, x24, :lo12:.LANCHOR97
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR98
-.L1441:
+.L1451:
 	bl	_insert_free_list
-	b	.L1427
-.L1434:
+	b	.L1437
+.L1444:
 	cmp	w1, 16
-	bne	.L1435
+	bne	.L1445
 	ldr	x0, [x29, 152]
 	add	x2, x23, :lo12:.LANCHOR99
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR100
-	b	.L1441
-.L1435:
+	b	.L1451
+.L1445:
 	ldr	x0, [x29, 144]
 	add	x2, x22, :lo12:.LANCHOR101
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR102
-	b	.L1441
+	b	.L1451
 	.size	zftl_sblk_list_init, .-zftl_sblk_list_init
+	.section	.text.ftl_open_sblk_init,"ax",@progbits
+	.align	2
+	.global	ftl_open_sblk_init
+	.type	ftl_open_sblk_init, %function
+ftl_open_sblk_init:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR80
+	stp	x21, x22, [sp, 32]
+	mov	x19, x0
+	stp	x23, x24, [sp, 48]
+	adrp	x21, .LC76
+	adrp	x23, .LANCHOR87
+	mov	w22, w1
+	add	x23, x23, :lo12:.LANCHOR87
+	add	x20, x20, :lo12:.LANCHOR80
+	add	x21, x21, :lo12:.LC76
+	stp	x25, x26, [sp, 64]
+.L1453:
+.L1456:
+	mov	w0, w22
+	bl	ftl_alloc_sblk
+	mov	w1, 0
+	and	w24, w0, 65535
+	bl	ftl_erase_sblk
+	add	x1, x19, 16
+	mov	w0, w24
+	bl	ftl_get_blk_list_in_sblk
+	and	w0, w0, 255
+	ldrh	w1, [x23]
+	cmp	w22, 2
+	strb	w0, [x19, 9]
+	strh	w24, [x19]
+	strh	wzr, [x19, 2]
+	mul	w0, w1, w0
+	strb	wzr, [x19, 5]
+	strh	w0, [x19, 6]
+	strh	wzr, [x19, 10]
+	strb	w22, [x19, 4]
+	beq	.L1457
+	ldrb	w0, [x20]
+	mul	w0, w1, w0
+	and	w0, w0, 65535
+.L1454:
+	ldrb	w2, [x20]
+	adrp	x26, .LANCHOR9
+	strh	w0, [x19, 12]
+	ubfiz	x25, x24, 1, 16
+	mul	w2, w2, w1
+	adrp	x1, .LANCHOR111
+	ldr	x3, [x1, #:lo12:.LANCHOR111]
+	mov	w1, 255
+	lsl	w2, w2, 2
+	add	x0, x3, x0, uxth 2
+	bl	ftl_memset
+	ldr	x0, [x26, #:lo12:.LANCHOR9]
+	ldrh	w1, [x19, 6]
+	strh	w1, [x0, x25]
+	ldrb	w0, [x19, 9]
+	cbnz	w0, .L1452
+	mov	w1, w24
+	mov	x0, x21
+	bl	printf
+	ldr	x0, [x26, #:lo12:.LANCHOR9]
+	mov	w1, -1
+	strh	w1, [x0, x25]
+	mov	w0, 7
+	strb	w0, [x19, 4]
+	b	.L1456
+.L1457:
+	mov	w0, 0
+	b	.L1454
+.L1452:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+	.size	ftl_open_sblk_init, .-ftl_open_sblk_init
 	.section	.text.pm_free_sblk,"ax",@progbits
 	.align	2
 	.global	pm_free_sblk
 	.type	pm_free_sblk, %function
 pm_free_sblk:
 	stp	x29, x30, [sp, -384]!
-	adrp	x0, .LANCHOR149
+	adrp	x0, .LANCHOR151
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	ldrh	w1, [x0, #:lo12:.LANCHOR149]
+	ldrh	w1, [x0, #:lo12:.LANCHOR151]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	cmp	w1, 128
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	bls	.L1443
-	adrp	x1, .LANCHOR150
+	bls	.L1460
+	adrp	x1, .LANCHOR152
 	adrp	x0, .LC0
-	mov	w2, 84
-	add	x1, x1, :lo12:.LANCHOR150
+	mov	w2, 88
+	add	x1, x1, :lo12:.LANCHOR152
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1443:
+.L1460:
 	adrp	x5, .LANCHOR104
 	mov	x26, x5
-	ldrh	w3, [x19, #:lo12:.LANCHOR149]
+	ldrh	w3, [x19, #:lo12:.LANCHOR151]
 	mov	w1, 0
 	ldr	x0, [x5, #:lo12:.LANCHOR104]
 	mov	w19, 0
 	mov	w4, 65535
 	add	x0, x0, 416
 	ldrh	w2, [x0, 272]
-.L1446:
+.L1463:
 	ldrh	w6, [x0]
 	cmp	w6, w4
-	beq	.L1444
+	beq	.L1461
 	add	w1, w1, 1
 	and	w1, w1, 65535
-.L1444:
+.L1461:
 	cmp	w1, w2
-	bcs	.L1445
+	bcs	.L1462
 	cmp	w1, w3
-	bcs	.L1445
+	bcs	.L1462
 	add	w19, w19, 1
 	add	x0, x0, 2
 	and	w19, w19, 65535
 	cmp	w19, 128
-	bne	.L1446
-.L1445:
+	bne	.L1463
+.L1462:
 	add	w19, w19, 1
 	mov	w0, 128
 	and	w19, w19, 65535
@@ -8742,24 +8890,24 @@ pm_free_sblk:
 	add	x1, x6, x1, lsl 2
 	lsl	w2, w2, w0
 	sub	w2, w2, #1
-.L1448:
+.L1465:
 	cmp	x1, x4
-	bne	.L1451
+	bne	.L1468
 	adrp	x24, .LANCHOR80
 	adrp	x25, .LANCHOR87
-	adrp	x27, .LC90
+	adrp	x27, .LC89
 	adrp	x28, .LANCHOR14
 	ldrb	w21, [x24, #:lo12:.LANCHOR80]
 	add	x23, x23, :lo12:.LANCHOR69
 	ldrh	w0, [x25, #:lo12:.LANCHOR87]
-	add	x27, x27, :lo12:.LC90
+	add	x27, x27, :lo12:.LC89
 	add	x28, x28, :lo12:.LANCHOR14
 	mov	x20, 0
 	mov	w7, 65535
 	str	wzr, [x29, 124]
 	mul	w21, w21, w0
 	and	w21, w21, 65535
-.L1457:
+.L1474:
 	ldr	x0, [x26, #:lo12:.LANCHOR104]
 	and	w6, w20, 65535
 	ldrb	w2, [x23]
@@ -8769,27 +8917,27 @@ pm_free_sblk:
 	ldrh	w1, [x0, 692]
 	sdiv	w1, w1, w2
 	cmp	w1, w3
-	bne	.L1452
+	bne	.L1469
 	ldrb	w1, [x24, #:lo12:.LANCHOR80]
 	ldrh	w2, [x25, #:lo12:.LANCHOR87]
 	mul	w1, w1, w2
 	strh	w1, [x22, x20, lsl 1]
-.L1452:
+.L1469:
 	ldrh	w2, [x22, x20, lsl 1]
 	cmp	w2, w21
-	bcs	.L1453
+	bcs	.L1470
 	cmp	w2, 0
 	ldr	w1, [x29, 124]
 	csel	w21, w21, w2, eq
 	csel	w1, w1, w6, eq
 	str	w1, [x29, 124]
-.L1453:
+.L1470:
 	ldrh	w1, [x0, 74]
 	cmp	w1, 2
-	bls	.L1454
+	bls	.L1471
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L1454
+	beq	.L1471
 	adrp	x4, .LANCHOR7
 	ubfiz	x1, x3, 2, 16
 	ldrh	w0, [x0, 92]
@@ -8798,7 +8946,7 @@ pm_free_sblk:
 	ldrh	w4, [x4, x1]
 	and	w4, w4, 2047
 	cmp	w4, w0
-	bgt	.L1454
+	bgt	.L1471
 	mov	w1, w8
 	str	w6, [x29, 104]
 	str	w8, [x29, 112]
@@ -8807,29 +8955,29 @@ pm_free_sblk:
 	ldr	w6, [x29, 104]
 	ldr	w8, [x29, 112]
 	mov	w7, w6
-.L1454:
+.L1471:
 	ldrh	w0, [x22, x20, lsl 1]
-	cbnz	w0, .L1455
+	cbnz	w0, .L1472
 	ldr	x0, [x26, #:lo12:.LANCHOR104]
 	sxtw	x6, w8
 	add	x1, x6, 208
 	ldrh	w3, [x0, x1, lsl 1]
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L1455
+	beq	.L1472
 	ldr	w1, [x28]
-	tbz	x1, 12, .L1456
+	tbz	x1, 12, .L1473
 	ldrh	w4, [x0, 688]
 	mov	w2, 0
 	str	x6, [x29, 104]
 	mov	w1, w8
 	str	w7, [x29, 112]
-	adrp	x0, .LC91
-	add	x0, x0, :lo12:.LC91
+	adrp	x0, .LC90
+	add	x0, x0, :lo12:.LC90
 	bl	printf
 	ldr	w7, [x29, 112]
 	ldr	x6, [x29, 104]
-.L1456:
+.L1473:
 	ldr	x0, [x26, #:lo12:.LANCHOR104]
 	add	x6, x6, 208
 	str	w7, [x29, 104]
@@ -8844,10 +8992,10 @@ pm_free_sblk:
 	ldrh	w1, [x0, 688]
 	sub	w1, w1, #1
 	strh	w1, [x0, 688]
-.L1455:
+.L1472:
 	add	x20, x20, 1
 	cmp	w19, w20, uxth
-	bhi	.L1457
+	bhi	.L1474
 	mov	w0, 65535
 	cmp	w7, w0
 	ldr	w0, [x29, 124]
@@ -8859,7 +9007,7 @@ pm_free_sblk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 384
 	ret
-.L1451:
+.L1468:
 	ldr	w0, [x4]
 	add	x7, x6, 416
 	mov	x3, 0
@@ -8867,20 +9015,20 @@ pm_free_sblk:
 	and	w0, w0, w2
 	udiv	w0, w0, w11
 	and	w0, w0, 65535
-.L1450:
+.L1467:
 	ldrh	w8, [x7]
 	cmp	w8, w0
-	bne	.L1449
+	bne	.L1466
 	ldrh	w8, [x22, x3, lsl 1]
 	add	w8, w8, 1
 	strh	w8, [x22, x3, lsl 1]
-.L1449:
+.L1466:
 	add	x3, x3, 1
 	add	x7, x7, 2
 	cmp	w19, w3, uxth
-	bhi	.L1450
+	bhi	.L1467
 	add	x4, x4, 4
-	b	.L1448
+	b	.L1465
 	.size	pm_free_sblk, .-pm_free_sblk
 	.section	.text.ftl_memcpy,"ax",@progbits
 	.align	2
@@ -8900,14 +9048,14 @@ flash_info_data_init:
 	add	x29, sp, 0
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	str	x19, [sp, 16]
-	tbz	x0, 12, .L1470
-	adrp	x2, .LANCHOR151
-	adrp	x0, .LC92
-	add	x2, x2, :lo12:.LANCHOR151
+	tbz	x0, 12, .L1487
+	adrp	x2, .LANCHOR153
+	adrp	x0, .LC91
+	add	x2, x2, :lo12:.LANCHOR153
 	mov	w1, 105
-	add	x0, x0, :lo12:.LC92
+	add	x0, x0, :lo12:.LC91
 	bl	printf
-.L1470:
+.L1487:
 	adrp	x19, .LANCHOR27
 	mov	w2, 2048
 	mov	w1, 0
@@ -8941,15 +9089,15 @@ flash_info_data_init:
 	.type	ftl_memcpy32, %function
 ftl_memcpy32:
 	mov	x3, 0
-.L1476:
+.L1493:
 	cmp	w2, w3
-	bhi	.L1477
+	bhi	.L1494
 	ret
-.L1477:
+.L1494:
 	ldr	w4, [x1, x3, lsl 2]
 	str	w4, [x0, x3, lsl 2]
 	add	x3, x3, 1
-	b	.L1476
+	b	.L1493
 	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.ftl_memcmp,"ax",@progbits
 	.align	2
@@ -8990,14 +9138,14 @@ nandc_init:
 	mov	x19, x0
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
 	str	wzr, [x29, 56]
-	tbz	x0, 12, .L1482
-	adrp	x1, .LANCHOR152
-	adrp	x0, .LC93
+	tbz	x0, 12, .L1499
+	adrp	x1, .LANCHOR154
+	adrp	x0, .LC92
 	mov	x2, x19
-	add	x1, x1, :lo12:.LANCHOR152
-	add	x0, x0, :lo12:.LC93
+	add	x1, x1, :lo12:.LANCHOR154
+	add	x0, x0, :lo12:.LC92
 	bl	printf
-.L1482:
+.L1499:
 	adrp	x20, .LANCHOR28
 	mov	w0, 6
 	ldr	w2, [x19, 352]
@@ -9008,22 +9156,22 @@ nandc_init:
 	mov	x22, x0
 	str	x19, [x0, #:lo12:.LANCHOR13]
 	cmp	w2, w1
-	bne	.L1483
+	bne	.L1500
 	mov	w0, 8
 	strb	w0, [x20, #:lo12:.LANCHOR28]
-.L1483:
+.L1500:
 	ldr	w1, [x19, 128]
 	mov	w0, 12336
 	movk	w0, 0x5639, lsl 16
 	cmp	w1, w0
-	bne	.L1484
+	bne	.L1501
 	mov	w0, 9
 	strb	w0, [x20, #:lo12:.LANCHOR28]
-.L1484:
+.L1501:
 	ldrb	w0, [x20, #:lo12:.LANCHOR28]
 	cmp	w0, 9
 	adrp	x0, .LANCHOR47
-	bne	.L1485
+	bne	.L1502
 	mov	w1, 1
 	strb	w1, [x0, #:lo12:.LANCHOR47]
 	ldr	w0, [x29, 56]
@@ -9048,17 +9196,17 @@ nandc_init:
 	mov	w0, 39
 	str	w0, [x19, 84]
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1487
+	tbz	x0, 12, .L1504
 	ldr	w1, [x19]
 	ldr	w2, [x19, 8]
 	ldr	w3, [x19, 80]
 	ldr	w4, [x19, 84]
 	ldr	w5, [x19, 88]
-.L1500:
-	adrp	x0, .LC94
-	add	x0, x0, :lo12:.LC94
+.L1517:
+	adrp	x0, .LC93
+	add	x0, x0, :lo12:.LC93
 	bl	printf
-.L1487:
+.L1504:
 	adrp	x0, .LANCHOR48
 	mov	w1, 1
 	strb	w1, [x0, #:lo12:.LANCHOR48]
@@ -9067,17 +9215,17 @@ nandc_init:
 	adrp	x0, .LANCHOR46
 	strb	wzr, [x0, #:lo12:.LANCHOR46]
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1481
+	tbz	x0, 12, .L1498
 	ldrb	w1, [x20, #:lo12:.LANCHOR28]
-	adrp	x0, .LC95
-	add	x0, x0, :lo12:.LC95
+	adrp	x0, .LC94
+	add	x0, x0, :lo12:.LC94
 	bl	printf
-.L1481:
+.L1498:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1485:
+.L1502:
 	strb	wzr, [x0, #:lo12:.LANCHOR47]
 	mov	w1, 1
 	ldr	w0, [x29, 56]
@@ -9105,14 +9253,14 @@ nandc_init:
 	adrp	x1, .LANCHOR49
 	str	x0, [x1, #:lo12:.LANCHOR49]
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1487
+	tbz	x0, 12, .L1504
 	ldr	x0, [x22, #:lo12:.LANCHOR13]
 	ldr	w1, [x0]
 	ldr	w2, [x0, 344]
 	ldr	w3, [x0, 304]
 	ldr	w4, [x0, 308]
 	ldr	w5, [x0, 312]
-	b	.L1500
+	b	.L1517
 	.size	nandc_init, .-nandc_init
 	.section	.text.zbuf_init,"ax",@progbits
 	.align	2
@@ -9126,10 +9274,10 @@ zbuf_init:
 	add	x19, x0, :lo12:.LANCHOR52
 	stp	x21, x22, [sp, 32]
 	mov	x20, x0
-	adrp	x22, .LANCHOR125
-	add	x22, x22, :lo12:.LANCHOR125
+	adrp	x22, .LANCHOR126
+	add	x22, x22, :lo12:.LANCHOR126
 	mov	w21, 0
-.L1502:
+.L1519:
 	and	w0, w21, 255
 	strb	w0, [x19, 1]
 	add	w1, w0, 1
@@ -9146,7 +9294,7 @@ zbuf_init:
 	bl	ftl_malloc
 	str	x0, [x19, -40]
 	cmp	w21, 32
-	bne	.L1502
+	bne	.L1519
 	add	x0, x20, :lo12:.LANCHOR52
 	mov	w1, -1
 	strb	w1, [x0, 1984]
@@ -9170,13 +9318,13 @@ gc_init:
 	mov	w1, 0
 	add	x29, sp, 0
 	strb	wzr, [x0, #:lo12:.LANCHOR78]
-	adrp	x0, .LANCHOR153
+	adrp	x0, .LANCHOR155
 	stp	x19, x20, [sp, 16]
 	adrp	x20, .LANCHOR64
-	strb	wzr, [x0, #:lo12:.LANCHOR153]
-	adrp	x0, .LANCHOR154
+	strb	wzr, [x0, #:lo12:.LANCHOR155]
+	adrp	x0, .LANCHOR156
 	add	x19, x20, :lo12:.LANCHOR64
-	str	wzr, [x0, #:lo12:.LANCHOR154]
+	str	wzr, [x0, #:lo12:.LANCHOR156]
 	adrp	x0, .LANCHOR89
 	strh	wzr, [x0, #:lo12:.LANCHOR89]
 	mov	x0, x19
@@ -9214,15 +9362,15 @@ gc_init:
 	mul	w0, w0, w3
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR155
-	str	x0, [x1, #:lo12:.LANCHOR155]
+	adrp	x1, .LANCHOR157
+	str	x0, [x1, #:lo12:.LANCHOR157]
 	ldrb	w1, [x19, #:lo12:.LANCHOR80]
 	ldrh	w0, [x20, #:lo12:.LANCHOR79]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR156
-	str	x0, [x1, #:lo12:.LANCHOR156]
+	adrp	x1, .LANCHOR158
+	str	x0, [x1, #:lo12:.LANCHOR158]
 	ldrh	w1, [x20, #:lo12:.LANCHOR79]
 	ldrb	w0, [x19, #:lo12:.LANCHOR80]
 	mul	w0, w1, w0
@@ -9241,9 +9389,9 @@ gc_init:
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR157
+	adrp	x1, .LANCHOR159
 	ldp	x19, x20, [sp, 16]
-	str	x0, [x1, #:lo12:.LANCHOR157]
+	str	x0, [x1, #:lo12:.LANCHOR159]
 	adrp	x0, .LANCHOR91
 	adrp	x1, .LANCHOR81
 	ldp	x29, x30, [sp], 32
@@ -9268,18 +9416,18 @@ js_hash:
 	mov	w0, 42982
 	mov	x3, 0
 	movk	w0, 0x47c6, lsl 16
-.L1509:
+.L1526:
 	cmp	w1, w3
-	bhi	.L1510
+	bhi	.L1527
 	ret
-.L1510:
+.L1527:
 	lsr	w2, w0, 2
 	ldrb	w5, [x4, x3]
 	add	w2, w2, w0, lsl 5
 	add	x3, x3, 1
 	add	w2, w2, w5
 	eor	w0, w0, w2
-	b	.L1509
+	b	.L1526
 	.size	js_hash, .-js_hash
 	.section	.text.timer_get_time,"ax",@progbits
 	.align	2
@@ -9328,67 +9476,67 @@ rknand_print_hex:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LC97
+	adrp	x21, .LC96
 	stp	x23, x24, [sp, 48]
 	mov	x22, x1
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LC96
+	adrp	x23, .LC95
 	mov	x26, x0
 	mov	w24, w2
 	uxtw	x25, w3
-	add	x23, x23, :lo12:.LC96
-	add	x21, x21, :lo12:.LC97
+	add	x23, x23, :lo12:.LC95
+	add	x21, x21, :lo12:.LC96
 	stp	x19, x20, [sp, 16]
 	str	x27, [sp, 80]
 	mov	x19, 0
 	mov	w20, 0
-	adrp	x27, .LC98
-.L1517:
+	adrp	x27, .LC97
+.L1534:
 	cmp	x25, x19
-	bne	.L1523
+	bne	.L1540
 	ldp	x19, x20, [sp, 16]
-	adrp	x1, .LC98
+	adrp	x1, .LC97
 	ldp	x21, x22, [sp, 32]
-	add	x1, x1, :lo12:.LC98
+	add	x1, x1, :lo12:.LC97
 	ldp	x23, x24, [sp, 48]
-	adrp	x0, .LC99
+	adrp	x0, .LC98
 	ldp	x25, x26, [sp, 64]
-	add	x0, x0, :lo12:.LC99
+	add	x0, x0, :lo12:.LC98
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	printf
-.L1523:
-	cbnz	w20, .L1518
+.L1540:
+	cbnz	w20, .L1535
 	mov	w2, w19
 	mov	x1, x26
 	mov	x0, x23
 	bl	printf
-.L1518:
+.L1535:
 	cmp	w24, 4
-	bne	.L1519
+	bne	.L1536
 	ldr	w1, [x22, x19, lsl 2]
-.L1525:
+.L1542:
 	mov	x0, x21
 	add	w20, w20, 1
 	bl	printf
 	cmp	w20, 15
-	bls	.L1522
+	bls	.L1539
 	mov	w20, 0
-	add	x1, x27, :lo12:.LC98
-	adrp	x0, .LC99
-	add	x0, x0, :lo12:.LC99
+	add	x1, x27, :lo12:.LC97
+	adrp	x0, .LC98
+	add	x0, x0, :lo12:.LC98
 	bl	printf
-.L1522:
+.L1539:
 	add	x19, x19, 1
-	b	.L1517
-.L1519:
+	b	.L1534
+.L1536:
 	cmp	w24, 2
-	bne	.L1521
+	bne	.L1538
 	ldrsh	w1, [x22, x19, lsl 1]
-	b	.L1525
-.L1521:
+	b	.L1542
+.L1538:
 	ldrb	w1, [x22, x19]
-	b	.L1525
+	b	.L1542
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.hynix_get_read_retry_default,"ax",@progbits
 	.align	2
@@ -9396,64 +9544,64 @@ rknand_print_hex:
 	.type	hynix_get_read_retry_default, %function
 hynix_get_read_retry_default:
 	stp	x29, x30, [sp, -96]!
-	mov	w8, w0
+	mov	w10, w0
 	adrp	x0, .LANCHOR27
 	mov	w2, -83
 	add	x29, sp, 0
-	ldr	x7, [x0, #:lo12:.LANCHOR27]
+	ldr	x8, [x0, #:lo12:.LANCHOR27]
 	mov	w0, -84
 	stp	x19, x20, [sp, 16]
 	mov	w1, -82
 	stp	x21, x22, [sp, 32]
-	add	x6, x7, 128
+	add	x6, x8, 128
 	stp	x23, x24, [sp, 48]
-	add	x12, x7, 112
+	add	x13, x8, 112
 	stp	x25, x26, [sp, 64]
-	cmp	w8, 2
+	cmp	w10, 2
 	str	x27, [sp, 80]
-	strb	w0, [x7, 128]
+	strb	w0, [x8, 128]
 	mov	w0, -81
-	strb	w8, [x7, 112]
-	strb	w2, [x7, 129]
-	strb	w1, [x7, 130]
-	strb	w0, [x7, 131]
-	bne	.L1527
+	strb	w10, [x8, 112]
+	strb	w2, [x8, 129]
+	strb	w1, [x8, 130]
+	strb	w0, [x8, 131]
+	bne	.L1544
 	mov	w0, -89
-	strb	w0, [x12, 16]
-	adrp	x0, .LANCHOR158+17
+	strb	w0, [x13, 16]
+	adrp	x0, .LANCHOR160+17
 	mov	w1, -9
-	strb	w1, [x0, #:lo12:.LANCHOR158+17]
-.L1591:
-	mov	w23, 7
-	b	.L1634
-.L1527:
-	cmp	w8, 3
-	bne	.L1529
-	mov	x10, 0
-.L1530:
-	sub	w0, w10, #80
-	strb	w0, [x6, x10]
-	add	x10, x10, 1
-	cmp	x10, 8
-	bne	.L1530
-	mov	w23, w10
-.L1528:
-	sub	w0, w8, #1
+	strb	w1, [x0, #:lo12:.LANCHOR160+17]
+.L1608:
+	mov	w24, 7
+	b	.L1651
+.L1544:
+	cmp	w10, 3
+	bne	.L1546
+	mov	x11, 0
+.L1547:
+	sub	w0, w11, #80
+	strb	w0, [x6, x11]
+	add	x11, x11, 1
+	cmp	x11, 8
+	bne	.L1547
+	mov	w24, w11
+.L1545:
+	sub	w0, w10, #1
 	cmp	w0, 1
-	bhi	.L1536
+	bhi	.L1553
 	adrp	x7, .LANCHOR18
 	adrp	x8, .LANCHOR30
 	add	x7, x7, :lo12:.LANCHOR18
 	add	x8, x8, :lo12:.LANCHOR30
 	mov	w5, 0
-	mov	w11, 55
-.L1537:
+	mov	w10, 55
+.L1554:
 	ldrb	w0, [x7]
 	cmp	w0, w5
-	bhi	.L1543
-.L1544:
-	strb	w10, [x12, 1]
-	strb	w23, [x12, 2]
+	bhi	.L1560
+.L1561:
+	strb	w11, [x13, 1]
+	strb	w24, [x13, 2]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9461,86 +9609,86 @@ hynix_get_read_retry_default:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1529:
-	cmp	w8, 4
-	bne	.L1531
+.L1546:
+	cmp	w10, 4
+	bne	.L1548
 	mov	w3, -52
-	strb	w3, [x7, 128]
+	strb	w3, [x8, 128]
 	mov	w3, -65
-	strb	w3, [x7, 129]
+	strb	w3, [x8, 129]
 	mov	w3, -86
-	strb	w3, [x7, 130]
+	strb	w3, [x8, 130]
 	mov	w3, -85
-	mov	w23, 8
-	strb	w3, [x7, 131]
-	mov	w10, w23
+	mov	w24, 8
+	strb	w3, [x8, 131]
+	mov	w11, w24
 	mov	w3, -51
-	strb	w2, [x7, 133]
-	strb	w3, [x7, 132]
-	strb	w1, [x7, 134]
-	strb	w0, [x7, 135]
-	b	.L1528
-.L1531:
-	cmp	w8, 5
-	bne	.L1532
+	strb	w2, [x8, 133]
+	strb	w3, [x8, 132]
+	strb	w1, [x8, 134]
+	strb	w0, [x8, 135]
+	b	.L1545
+.L1548:
+	cmp	w10, 5
+	bne	.L1549
 	mov	w0, 56
-	strb	w0, [x7, 128]
+	strb	w0, [x8, 128]
 	mov	w0, 57
-	strb	w0, [x7, 129]
+	strb	w0, [x8, 129]
 	mov	w0, 58
-	mov	w23, 8
-	strb	w0, [x7, 130]
+	mov	w24, 8
+	strb	w0, [x8, 130]
 	mov	w0, 59
-	strb	w0, [x7, 131]
-.L1634:
-	mov	w10, 4
-	b	.L1528
-.L1532:
-	cmp	w8, 6
-	bne	.L1533
+	strb	w0, [x8, 131]
+.L1651:
+	mov	w11, 4
+	b	.L1545
+.L1549:
+	cmp	w10, 6
+	bne	.L1550
 	mov	w0, 14
-	strb	w0, [x7, 128]
+	strb	w0, [x8, 128]
 	mov	w0, 15
-	strb	w0, [x7, 129]
+	strb	w0, [x8, 129]
 	mov	w0, 16
-	mov	w23, 12
-	strb	w0, [x7, 130]
+	mov	w24, 12
+	strb	w0, [x8, 130]
 	mov	w0, 17
-	strb	w0, [x7, 131]
-	b	.L1634
-.L1533:
-	cmp	w8, 7
-	bne	.L1534
+	strb	w0, [x8, 131]
+	b	.L1651
+.L1550:
+	cmp	w10, 7
+	bne	.L1551
 	mov	x0, 0
-.L1535:
+.L1552:
 	sub	w1, w0, #80
 	strb	w1, [x6, x0]
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L1535
+	bne	.L1552
 	mov	w0, -44
-	mov	w23, 12
-	strb	w0, [x7, 136]
-	mov	w10, 10
+	mov	w24, 12
+	strb	w0, [x8, 136]
+	mov	w11, 10
 	mov	w0, -43
-	strb	w0, [x7, 137]
-	b	.L1528
-.L1534:
-	cmp	w8, 8
-	bne	.L1591
+	strb	w0, [x8, 137]
+	b	.L1545
+.L1551:
+	cmp	w10, 8
+	bne	.L1608
 	mov	w0, 6
-	strb	w0, [x7, 128]
+	strb	w0, [x8, 128]
 	mov	w0, 7
-	strb	w0, [x7, 129]
+	strb	w0, [x8, 129]
 	mov	w0, 9
-	strb	w8, [x7, 130]
-	strb	w0, [x7, 131]
-	mov	w23, 50
+	strb	w10, [x8, 130]
+	strb	w0, [x8, 131]
+	mov	w24, 50
 	mov	w0, 10
-	mov	w10, 5
-	strb	w0, [x7, 132]
-	b	.L1528
-.L1543:
+	mov	w11, 5
+	strb	w0, [x8, 132]
+	b	.L1545
+.L1560:
 	ldrb	w0, [x8, w5, sxtw]
 	mov	x1, 32
 	mov	w2, 160
@@ -9549,10 +9697,10 @@ hynix_get_read_retry_default:
 	adrp	x1, .LANCHOR13
 	ubfiz	x0, x0, 8, 8
 	ldr	x4, [x1, #:lo12:.LANCHOR13]
-	add	x2, x12, x2
+	add	x2, x13, x2
 	add	x4, x4, x0
-.L1538:
-	str	w11, [x4, 2056]
+.L1555:
+	str	w10, [x4, 2056]
 	ldrb	w0, [x6, x3]
 	str	w0, [x4, 2052]
 	mov	w0, 80
@@ -9560,28 +9708,28 @@ hynix_get_read_retry_default:
 	ldr	w0, [x4, 2048]
 	strb	w0, [x2, x3]
 	add	x3, x3, 1
-	cmp	w10, w3, uxtb
-	bhi	.L1538
-	adrp	x3, .LANCHOR158
-	add	x3, x3, :lo12:.LANCHOR158
+	cmp	w11, w3, uxtb
+	bhi	.L1555
+	adrp	x3, .LANCHOR160
+	add	x3, x3, :lo12:.LANCHOR160
 	mov	x0, 0
-.L1541:
+.L1558:
 	add	x14, x2, x0
-	add	x13, x3, x0
+	add	x12, x3, x0
 	mov	x1, 1
-.L1540:
+.L1557:
 	lsl	x4, x1, 2
 	lsl	x15, x1, 3
 	ldrb	w16, [x2, x0]
 	add	x1, x1, 1
 	cmp	x1, 7
-	ldrb	w4, [x13, x4]
+	ldrb	w4, [x12, x4]
 	add	w4, w4, w16
 	strb	w4, [x14, x15]
-	bne	.L1540
+	bne	.L1557
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L1541
+	bne	.L1558
 	add	w5, w5, 1
 	strb	wzr, [x2, 16]
 	strb	wzr, [x2, 24]
@@ -9591,31 +9739,31 @@ hynix_get_read_retry_default:
 	strb	wzr, [x2, 48]
 	strb	wzr, [x2, 41]
 	strb	wzr, [x2, 49]
-	b	.L1537
-.L1536:
-	sub	w0, w8, #3
+	b	.L1554
+.L1553:
+	sub	w0, w10, #3
 	cmp	w0, 5
-	bhi	.L1544
-	mul	w15, w23, w10
-	sub	w13, w10, #1
-	and	x13, x13, 255
-	adrp	x19, .LANCHOR18
-	sub	w20, w8, #5
-	add	x19, x19, :lo12:.LANCHOR18
-	asr	w14, w15, 1
-	add	x13, x13, 1
-	lsl	w15, w15, 4
-	lsl	w22, w14, 1
-	sbfiz	x21, x14, 1, 32
-	mov	w11, 0
-.L1545:
-	ldrb	w0, [x19]
-	cmp	w0, w11
-	bls	.L1544
+	bhi	.L1561
+	mul	w19, w24, w11
+	sub	w14, w11, #1
+	and	x14, x14, 255
+	adrp	x20, .LANCHOR18
+	sub	w21, w10, #5
+	add	x20, x20, :lo12:.LANCHOR18
+	asr	w15, w19, 1
+	add	x14, x14, 1
+	lsl	w19, w19, 4
+	lsl	w23, w15, 1
+	sbfiz	x22, x15, 1, 32
+	mov	w12, 0
+.L1562:
+	ldrb	w0, [x20]
+	cmp	w0, w12
+	bls	.L1561
 	adrp	x0, .LANCHOR30
 	add	x0, x0, :lo12:.LANCHOR30
-	ldrb	w24, [x0, w11, sxtw]
-	mov	w0, w24
+	ldrb	w25, [x0, w12, sxtw]
+	mov	w0, w25
 	bl	zftl_flash_exit_slc_mode
 	adrp	x0, .LANCHOR13
 	mov	x5, 32
@@ -9623,14 +9771,14 @@ hynix_get_read_retry_default:
 	mov	w6, 255
 	ldr	x4, [x0, #:lo12:.LANCHOR13]
 	nop // between mem op and mult-accumulate
-	umaddl	x1, w1, w24, x5
-	ubfiz	x24, x24, 8, 8
-	add	x4, x4, x24
-	add	x5, x12, x1
+	umaddl	x1, w1, w25, x5
+	ubfiz	x25, x25, 8, 8
+	add	x4, x4, x25
+	add	x5, x13, x1
 	str	w6, [x4, 2056]
 	bl	nandc_wait_flash_ready
-	cmp	w8, 8
-	bne	.L1546
+	cmp	w10, 8
+	bne	.L1563
 	mov	w0, 120
 	str	w0, [x4, 2056]
 	str	wzr, [x4, 2052]
@@ -9638,7 +9786,7 @@ hynix_get_read_retry_default:
 	str	wzr, [x4, 2052]
 	mov	w1, 25
 	str	wzr, [x4, 2052]
-	add	x5, x7, 144
+	add	x5, x8, 144
 	str	w0, [x4, 2056]
 	mov	w0, 4
 	str	w0, [x4, 2056]
@@ -9650,73 +9798,73 @@ hynix_get_read_retry_default:
 	str	wzr, [x4, 2052]
 	str	wzr, [x4, 2052]
 	str	w1, [x4, 2052]
-.L1637:
+.L1654:
 	str	w0, [x4, 2052]
 	mov	w0, 48
 	str	wzr, [x4, 2052]
 	str	w0, [x4, 2056]
 	bl	nandc_wait_flash_ready
-	cmp	w20, 1
-	ccmp	w8, 8, 4, hi
-	beq	.L1592
-	cmp	w8, 7
+	cmp	w21, 1
+	ccmp	w10, 8, 4, hi
+	beq	.L1609
+	cmp	w10, 7
 	mov	w0, 32
 	mov	w1, 2
 	csel	w1, w1, w0, ne
-.L1553:
-	adrp	x6, .LANCHOR159
+.L1570:
+	adrp	x6, .LANCHOR161
 	mov	x2, 0
-	ldr	x0, [x6, #:lo12:.LANCHOR159]
-.L1554:
+	ldr	x0, [x6, #:lo12:.LANCHOR161]
+.L1571:
 	ldr	w3, [x4, 2048]
 	strb	w3, [x0, x2]
 	add	x2, x2, 1
 	cmp	w1, w2, uxtb
-	bhi	.L1554
-	cmp	w8, 8
-	bne	.L1555
+	bhi	.L1571
+	cmp	w10, 8
+	bne	.L1572
 	mov	w1, 0
-.L1557:
+.L1574:
 	ldrb	w2, [x0]
 	cmp	w2, 50
-	beq	.L1556
+	beq	.L1573
 	ldrb	w2, [x0, 1]
 	cmp	w2, 5
-	beq	.L1556
+	beq	.L1573
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 255
 	cmp	w1, 8
-	bne	.L1557
-.L1558:
-	adrp	x0, .LC100
+	bne	.L1574
+.L1575:
+	adrp	x0, .LC99
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC100
+	add	x0, x0, :lo12:.LC99
 	bl	printf
-.L1560:
-	b	.L1560
-.L1546:
+.L1577:
+	b	.L1577
+.L1563:
 	mov	w0, 54
 	str	w0, [x4, 2056]
-	cmp	w8, 4
-	bne	.L1548
+	cmp	w10, 4
+	bne	.L1565
 	mov	w0, 64
 	str	w6, [x4, 2052]
 	str	w0, [x4, 2048]
 	mov	w0, 204
-.L1635:
+.L1652:
 	str	w0, [x4, 2052]
 	mov	w0, 77
-	b	.L1636
-.L1548:
-	cmp	w20, 1
-	bhi	.L1550
-	ldrb	w0, [x7, 128]
+	b	.L1653
+.L1565:
+	cmp	w21, 1
+	bhi	.L1567
+	ldrb	w0, [x8, 128]
 	str	w0, [x4, 2052]
 	mov	w0, 82
-.L1636:
+.L1653:
 	str	w0, [x4, 2048]
-.L1549:
+.L1566:
 	mov	w0, 22
 	str	w0, [x4, 2056]
 	mov	w0, 23
@@ -9726,191 +9874,191 @@ hynix_get_read_retry_default:
 	mov	w0, 25
 	str	w0, [x4, 2056]
 	str	wzr, [x4, 2056]
-	cmp	w8, 6
+	cmp	w10, 6
 	str	wzr, [x4, 2052]
 	str	wzr, [x4, 2052]
-	bne	.L1551
+	bne	.L1568
 	mov	w0, 31
 	str	w0, [x4, 2052]
-.L1552:
+.L1569:
 	mov	w0, 2
-	b	.L1637
-.L1550:
-	cmp	w8, 7
-	bne	.L1549
+	b	.L1654
+.L1567:
+	cmp	w10, 7
+	bne	.L1566
 	mov	w0, 174
 	str	w0, [x4, 2052]
 	str	wzr, [x4, 2048]
 	mov	w0, 176
-	b	.L1635
-.L1551:
+	b	.L1652
+.L1568:
 	str	wzr, [x4, 2052]
-	b	.L1552
-.L1592:
+	b	.L1569
+.L1609:
 	mov	w1, 16
-	b	.L1553
-.L1556:
+	b	.L1570
+.L1573:
 	cmp	w1, 6
-	bhi	.L1558
-.L1559:
-	ldr	x3, [x6, #:lo12:.LANCHOR159]
+	bhi	.L1575
+.L1576:
+	ldr	x3, [x6, #:lo12:.LANCHOR161]
 	mov	x0, 0
-.L1569:
-	cmp	w15, w0
-	bgt	.L1570
-	ldr	x1, [x6, #:lo12:.LANCHOR159]
+.L1586:
+	cmp	w19, w0
+	bgt	.L1587
+	ldr	x1, [x6, #:lo12:.LANCHOR161]
 	mov	w6, 8
-	add	x2, x1, x21
-.L1572:
+	add	x2, x1, x22
+.L1589:
 	mov	x0, 0
-.L1571:
-	ldrh	w16, [x2, x0, lsl 1]
-	mvn	w16, w16
-	strh	w16, [x2, x0, lsl 1]
+.L1588:
+	ldrh	w7, [x2, x0, lsl 1]
+	mvn	w7, w7
+	strh	w7, [x2, x0, lsl 1]
 	add	x0, x0, 1
-	cmp	w14, w0
-	bgt	.L1571
-	add	x2, x2, x22, uxtw 1
+	cmp	w15, w0
+	bgt	.L1588
+	add	x2, x2, x23, uxtw 1
 	subs	w6, w6, #1
-	bne	.L1572
+	bne	.L1589
 	mov	x6, x1
-	mov	w16, 0
+	mov	w7, 0
 	mov	w26, 1
-.L1573:
+.L1590:
 	mov	w0, 0
 	mov	w2, 0
-.L1577:
-	mov	x30, x6
-	lsl	w25, w26, w2
-	mov	w24, 16
-	mov	w17, 0
-.L1575:
-	ldrh	w27, [x30]
-	add	x30, x30, x21
-	bics	wzr, w25, w27
-	cinc	w17, w17, eq
-	subs	w24, w24, #1
-	bne	.L1575
-	cmp	w17, 8
-	bls	.L1576
-	orr	w0, w0, w25
+.L1594:
+	mov	x25, x6
+	lsl	w30, w26, w2
+	mov	w17, 16
+	mov	w16, 0
+.L1592:
+	ldrh	w27, [x25]
+	add	x25, x25, x22
+	bics	wzr, w30, w27
+	cinc	w16, w16, eq
+	subs	w17, w17, #1
+	bne	.L1592
+	cmp	w16, 8
+	bls	.L1593
+	orr	w0, w0, w30
 	and	w0, w0, 65535
-.L1576:
+.L1593:
 	add	w2, w2, 1
 	cmp	w2, 16
-	bne	.L1577
+	bne	.L1594
 	strh	w0, [x6], 2
-	add	w16, w16, 1
-	cmp	w14, w16
-	bgt	.L1573
+	add	w7, w7, 1
+	cmp	w15, w7
+	bgt	.L1590
 	mov	x0, 0
 	mov	w2, 0
-.L1580:
+.L1597:
 	ldr	w6, [x1, x0]
 	add	x0, x0, 4
 	cmp	w6, 0
 	cinc	w2, w2, eq
 	cmp	x0, 32
-	bne	.L1580
+	bne	.L1597
 	cmp	w2, 7
-	ble	.L1581
+	ble	.L1598
 	mov	w3, 1024
 	mov	w2, 1
-	adrp	x0, .LC101
-	add	x0, x0, :lo12:.LC101
-	bl	rknand_print_hex
 	adrp	x0, .LC100
-	mov	w1, 0
 	add	x0, x0, :lo12:.LC100
+	bl	rknand_print_hex
+	adrp	x0, .LC99
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC99
 	bl	printf
-.L1582:
-	b	.L1582
-.L1555:
-	cmp	w8, 7
-	bne	.L1561
+.L1599:
+	b	.L1599
+.L1572:
+	cmp	w10, 7
+	bne	.L1578
 	mov	w1, 0
-.L1563:
+.L1580:
 	ldrb	w2, [x0]
 	cmp	w2, 12
-	beq	.L1562
+	beq	.L1579
 	ldrb	w2, [x0, 1]
 	cmp	w2, 10
-	beq	.L1562
+	beq	.L1579
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 255
 	cmp	w1, 8
-	bne	.L1563
-.L1564:
-	adrp	x0, .LC100
+	bne	.L1580
+.L1581:
+	adrp	x0, .LC99
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC100
+	add	x0, x0, :lo12:.LC99
 	bl	printf
-.L1565:
-	b	.L1565
-.L1562:
+.L1582:
+	b	.L1582
+.L1579:
 	cmp	w1, 6
-	bls	.L1559
-	b	.L1564
-.L1561:
-	cmp	w8, 6
-	bne	.L1559
+	bls	.L1576
+	b	.L1581
+.L1578:
+	cmp	w10, 6
+	bne	.L1576
 	mov	x1, 0
-.L1566:
+.L1583:
 	ldrb	w2, [x0, x1]
 	cmp	w2, 12
-	beq	.L1559
+	beq	.L1576
 	add	x2, x0, x1
 	ldrb	w2, [x2, 8]
 	cmp	w2, 4
-	beq	.L1559
+	beq	.L1576
 	add	x1, x1, 1
 	cmp	x1, 8
-	bne	.L1566
-	adrp	x0, .LC100
+	bne	.L1583
+	adrp	x0, .LC99
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC100
+	add	x0, x0, :lo12:.LC99
 	bl	printf
-.L1568:
-	b	.L1568
-.L1570:
+.L1585:
+	b	.L1585
+.L1587:
 	ldr	w1, [x4, 2048]
 	strb	w1, [x3, x0]
 	add	x0, x0, 1
-	b	.L1569
-.L1581:
-	cmp	w8, 6
-	beq	.L1594
-	cmp	w8, 7
-	beq	.L1595
-	cmp	w8, 8
+	b	.L1586
+.L1598:
+	cmp	w10, 6
+	beq	.L1611
+	cmp	w10, 7
+	beq	.L1612
+	cmp	w10, 8
 	mov	x1, 5
 	mov	x0, 8
 	csel	x0, x0, x1, ne
-.L1583:
+.L1600:
 	mov	x1, x5
 	mov	w5, 0
-.L1584:
+.L1601:
 	mov	x2, 0
-.L1585:
+.L1602:
 	ldrb	w6, [x3, x2]
 	strb	w6, [x1, x2]
 	add	x2, x2, 1
-	cmp	w10, w2, uxtb
-	bhi	.L1585
+	cmp	w11, w2, uxtb
+	bhi	.L1602
 	add	w5, w5, 1
-	add	x3, x3, x13
+	add	x3, x3, x14
 	add	x1, x1, x0
-	cmp	w23, w5
-	bgt	.L1584
+	cmp	w24, w5
+	bgt	.L1601
 	mov	w5, 255
 	str	w5, [x4, 2056]
 	bl	nandc_wait_flash_ready
-	cmp	w20, 1
-	bhi	.L1587
+	cmp	w21, 1
+	bhi	.L1604
 	mov	w0, 54
 	str	w0, [x4, 2056]
-	ldrb	w0, [x7, 128]
+	ldrb	w0, [x8, 128]
 	str	w0, [x4, 2052]
 	str	wzr, [x4, 2048]
 	mov	w0, 22
@@ -9922,26 +10070,26 @@ hynix_get_read_retry_default:
 	str	w5, [x4, 2052]
 	str	w5, [x4, 2052]
 	str	w5, [x4, 2052]
-.L1638:
+.L1655:
 	str	w0, [x4, 2056]
 	bl	nandc_wait_flash_ready
-	add	w11, w11, 1
-	and	w11, w11, 255
-	b	.L1545
-.L1594:
+	add	w12, w12, 1
+	and	w12, w12, 255
+	b	.L1562
+.L1611:
 	mov	x0, 4
-	b	.L1583
-.L1595:
+	b	.L1600
+.L1612:
 	mov	x0, 10
-	b	.L1583
-.L1587:
-	cmp	w8, 8
-	bne	.L1589
+	b	.L1600
+.L1604:
+	cmp	w10, 8
+	bne	.L1606
 	mov	w0, 190
-	b	.L1638
-.L1589:
+	b	.L1655
+.L1606:
 	mov	w0, 56
-	b	.L1638
+	b	.L1655
 	.size	hynix_get_read_retry_default, .-hynix_get_read_retry_default
 	.section	.text.flash_get_read_retry_tbl,"ax",@progbits
 	.align	2
@@ -9953,9 +10101,9 @@ flash_get_read_retry_tbl:
 	sub	w1, w0, #1
 	and	w1, w1, 255
 	cmp	w1, 7
-	bhi	.L1639
+	bhi	.L1656
 	b	hynix_get_read_retry_default
-.L1639:
+.L1656:
 	ret
 	.size	flash_get_read_retry_tbl, .-flash_get_read_retry_tbl
 	.section	.text.nandc_xfer_done,"ax",@progbits
@@ -9964,37 +10112,37 @@ flash_get_read_retry_tbl:
 	.type	nandc_xfer_done, %function
 nandc_xfer_done:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR160
+	adrp	x0, .LANCHOR162
 	adrp	x1, .LANCHOR28
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR13
 	ldrb	w1, [x1, #:lo12:.LANCHOR28]
 	stp	x21, x22, [sp, 32]
-	stp	x23, x24, [sp, 48]
+	strb	wzr, [x0, #:lo12:.LANCHOR162]
 	cmp	w1, 9
-	strb	wzr, [x0, #:lo12:.LANCHOR160]
-	bne	.L1642
+	str	x23, [sp, 48]
+	bne	.L1659
 	ldr	x20, [x19, #:lo12:.LANCHOR13]
-	mov	x24, x0
-	mov	w21, 0
+	mov	x21, x0
 	ldr	w0, [x20, 16]
 	str	w0, [x29, 64]
 	ldr	w0, [x20, 48]
-	tbnz	x0, 1, .L1643
-	adrp	x22, .LC105
-	adrp	x23, .LC104
-	add	x22, x22, :lo12:.LC105
-	add	x23, x23, :lo12:.LC104
-.L1644:
+	tbnz	x0, 1, .L1660
+	adrp	x22, .LC104
+	adrp	x23, .LC103
+	add	x22, x22, :lo12:.LC104
+	add	x23, x23, :lo12:.LC103
+	mov	w21, 0
+.L1661:
 	ldr	w0, [x29, 64]
-	tbnz	x0, 20, .L1647
+	tbnz	x0, 20, .L1663
 	ldr	x0, [x19, #:lo12:.LANCHOR13]
 	add	w21, w21, 1
 	tst	x21, 16777215
 	ldr	w0, [x0, 16]
 	str	w0, [x29, 64]
-	bne	.L1644
+	bne	.L1661
 	ldr	w2, [x29, 64]
 	mov	w1, w21
 	ldr	w3, [x20, 64]
@@ -10006,83 +10154,79 @@ nandc_xfer_done:
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1644
-.L1643:
-	adrp	x22, .LC103
-	adrp	x23, .LC104
-	add	x22, x22, :lo12:.LC103
-	add	x23, x23, :lo12:.LC104
-.L1645:
-	ldr	w1, [x20, 64]
-	ldr	w0, [x29, 64]
-	ubfx	x1, x1, 16, 6
-	ubfx	x0, x0, 22, 6
-	cmp	w1, w0
-	bge	.L1647
-	ldr	x0, [x19, #:lo12:.LANCHOR13]
-	ldr	w0, [x0]
-	str	w0, [x29, 72]
-	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1646
-	ldr	w0, [x29, 72]
-	tbz	x0, 17, .L1646
-	ldr	w1, [x29, 72]
-	adrp	x0, .LC102
-	add	x0, x0, :lo12:.LC102
-	ubfx	x1, x1, 17, 1
-.L1679:
-	bl	printf
-	b	.L1647
-.L1646:
+	b	.L1661
+.L1662:
 	ldr	w0, [x29, 64]
-	add	w21, w21, 1
+	add	w1, w1, 1
 	ubfx	x0, x0, 22, 6
-	cmp	w21, w0, lsl 12
-	bne	.L1645
+	cmp	w1, w0, lsl 12
+	bne	.L1664
 	ldr	w2, [x20, 64]
-	mov	w1, w21
+	adrp	x0, .LC102
 	ldr	w3, [x29, 64]
-	mov	x0, x22
+	add	x0, x0, :lo12:.LC102
 	ubfx	x2, x2, 16, 5
 	ubfx	x3, x3, 22, 6
 	bl	printf
 	ldr	x1, [x19, #:lo12:.LANCHOR13]
-	mov	x0, x23
 	mov	w3, 64
 	mov	w2, 4
+	adrp	x0, .LC103
+	add	x0, x0, :lo12:.LC103
 	bl	rknand_print_hex
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1645
 	mov	w0, 1
-	strb	w0, [x24, #:lo12:.LANCHOR160]
-.L1647:
+	strb	w0, [x21, #:lo12:.LANCHOR162]
+.L1663:
 	adrp	x0, .LANCHOR49+32
+	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	str	wzr, [x0, #:lo12:.LANCHOR49+32]
 	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1642:
-	ldr	x20, [x19, #:lo12:.LANCHOR13]
-	mov	w21, 0
+.L1660:
+	mov	w1, 0
+.L1664:
+	ldr	w2, [x20, 64]
+	ldr	w0, [x29, 64]
+	ubfx	x2, x2, 16, 6
+	ubfx	x0, x0, 22, 6
+	cmp	w2, w0
+	bge	.L1663
+	ldr	w0, [x20]
+	str	w0, [x29, 72]
+	ldr	w0, [x29, 72]
+	tbz	x0, 13, .L1662
+	ldr	w0, [x29, 72]
+	tbz	x0, 17, .L1662
+	ldr	w1, [x29, 72]
+	adrp	x0, .LC101
+	add	x0, x0, :lo12:.LC101
+	ubfx	x1, x1, 17, 1
+.L1693:
+	bl	printf
+	b	.L1663
+.L1659:
+	ldr	x20, [x19, #:lo12:.LANCHOR13]
+	mov	w21, 0
 	ldr	w0, [x20, 8]
 	str	w0, [x29, 64]
 	ldr	w0, [x20, 16]
-	tbnz	x0, 1, .L1653
-	adrp	x22, .LC105
-	adrp	x23, .LC104
-	add	x22, x22, :lo12:.LC105
-	add	x23, x23, :lo12:.LC104
-.L1654:
+	tbnz	x0, 1, .L1669
+	adrp	x22, .LC104
+	adrp	x23, .LC103
+	add	x22, x22, :lo12:.LC104
+	add	x23, x23, :lo12:.LC103
+.L1670:
 	ldr	w0, [x29, 64]
-	tbnz	x0, 20, .L1647
+	tbnz	x0, 20, .L1663
 	ldr	x0, [x19, #:lo12:.LANCHOR13]
 	add	w21, w21, 1
 	tst	x21, 16777215
 	ldr	w0, [x0, 8]
 	str	w0, [x29, 64]
-	bne	.L1654
+	bne	.L1670
 	ldr	w2, [x29, 64]
 	mov	w1, w21
 	ldr	w3, [x20, 28]
@@ -10094,34 +10238,34 @@ nandc_xfer_done:
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1654
-.L1653:
-	adrp	x22, .LC103
-	adrp	x23, .LC104
-	add	x22, x22, :lo12:.LC103
-	add	x23, x23, :lo12:.LC104
-.L1655:
+	b	.L1670
+.L1669:
+	adrp	x22, .LC102
+	adrp	x23, .LC103
+	add	x22, x22, :lo12:.LC102
+	add	x23, x23, :lo12:.LC103
+.L1671:
 	ldr	w1, [x20, 28]
 	ldr	w0, [x29, 64]
 	ubfx	x1, x1, 16, 5
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0
-	bge	.L1647
+	bge	.L1663
 	ldr	x0, [x19, #:lo12:.LANCHOR13]
 	ldr	w0, [x0]
 	str	w0, [x29, 72]
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1656
+	tbz	x0, 13, .L1672
 	ldr	w0, [x29, 72]
-	tbz	x0, 17, .L1656
-	adrp	x0, .LC106
+	tbz	x0, 17, .L1672
+	adrp	x0, .LC105
 	ldr	w1, [x29, 72]
-	add	x0, x0, :lo12:.LC106
-	b	.L1679
-.L1656:
+	add	x0, x0, :lo12:.LC105
+	b	.L1693
+.L1672:
 	add	w21, w21, 1
 	tst	x21, 16777215
-	bne	.L1655
+	bne	.L1671
 	ldr	w2, [x20, 28]
 	mov	w1, w21
 	ldr	w3, [x29, 64]
@@ -10134,7 +10278,7 @@ nandc_xfer_done:
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1655
+	b	.L1671
 	.size	nandc_xfer_done, .-nandc_xfer_done
 	.section	.text.nandc_xfer,"ax",@progbits
 	.align	2
@@ -10145,30 +10289,31 @@ nandc_xfer:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w19, w2, 255
-	stp	x21, x22, [sp, 32]
 	mov	x20, x3
-	and	w22, w1, 255
+	stp	x21, x22, [sp, 32]
 	mov	x3, x4
+	and	w22, w1, 255
 	mov	x2, x20
 	mov	w1, w19
 	mov	w0, w22
 	mov	x21, x4
 	bl	nandc_xfer_start
+	mov	w0, w22
 	bl	nandc_xfer_done
-	cbnz	w22, .L1699
+	cbnz	w22, .L1713
 	adrp	x0, .LANCHOR28
 	ldrb	w0, [x0, #:lo12:.LANCHOR28]
 	cmp	w0, 9
-	bne	.L1682
+	bne	.L1696
 	adrp	x22, .LANCHOR13
 	lsr	w19, w19, 2
 	mov	w3, 1
 	mov	w2, 0
 	ldr	x5, [x22, #:lo12:.LANCHOR13]
 	mov	w0, 0
-.L1683:
+.L1697:
 	cmp	w2, w19
-	bcc	.L1687
+	bcc	.L1701
 	ldr	w19, [x5]
 	cmp	w3, 0
 	mov	w1, 512
@@ -10177,35 +10322,35 @@ nandc_xfer:
 	movk	w1, 0x2, lsl 16
 	and	w1, w19, w1
 	cmp	w1, 139264
-	bne	.L1689
+	bne	.L1703
 	mov	w1, w19
-	adrp	x0, .LC107
-	add	x0, x0, :lo12:.LC107
+	adrp	x0, .LC106
+	add	x0, x0, :lo12:.LC106
 	bl	printf
 	ldr	x0, [x22, #:lo12:.LANCHOR13]
 	orr	w19, w19, 131072
 	str	w19, [x0]
 	mov	w0, -1
-.L1689:
-	tbz	x19, 13, .L1690
-	adrp	x1, .LANCHOR160
-	ldrb	w1, [x1, #:lo12:.LANCHOR160]
-	cbz	w1, .L1690
+.L1703:
+	tbz	x19, 13, .L1704
+	adrp	x1, .LANCHOR162
+	ldrb	w1, [x1, #:lo12:.LANCHOR162]
+	cbz	w1, .L1704
 	mov	w1, w19
-	adrp	x0, .LC108
-	add	x0, x0, :lo12:.LC108
+	adrp	x0, .LC107
+	add	x0, x0, :lo12:.LC107
 	bl	printf
 	ldr	x0, [x22, #:lo12:.LANCHOR13]
 	mov	w1, 1
 	str	w1, [x0, 16]
-.L1718:
+.L1732:
 	mov	w0, -1
-.L1681:
+.L1695:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1687:
+.L1701:
 	uxtw	x1, w2
 	add	x1, x1, 84
 	ldr	w1, [x5, x1, lsl 2]
@@ -10216,30 +10361,30 @@ nandc_xfer:
 	and	w1, w4, w1, lsr 10
 	and	w3, w3, w1
 	ldr	w1, [x29, 56]
-	tbnz	x1, 2, .L1701
+	tbnz	x1, 2, .L1715
 	ldr	w1, [x29, 56]
-	tbnz	x1, 18, .L1701
+	tbnz	x1, 18, .L1715
 	ldr	w4, [x29, 56]
 	ldr	w1, [x29, 56]
 	ubfx	x4, x4, 3, 7
 	ubfx	x1, x1, 19, 7
 	cmp	w4, w1
 	ldr	w1, [x29, 56]
-	ble	.L1685
+	ble	.L1699
 	ubfx	x1, x1, 3, 7
-.L1686:
+.L1700:
 	cmp	w0, w1
 	csel	w0, w0, w1, cs
-.L1684:
+.L1698:
 	add	w2, w2, 1
-	b	.L1683
-.L1685:
+	b	.L1697
+.L1699:
 	ubfx	x1, x1, 19, 7
-	b	.L1686
-.L1701:
+	b	.L1700
+.L1715:
 	mov	w0, -1
-	b	.L1684
-.L1682:
+	b	.L1698
+.L1696:
 	adrp	x0, .LANCHOR46
 	lsr	w4, w19, 1
 	mov	w3, 64
@@ -10251,34 +10396,34 @@ nandc_xfer:
 	mov	w0, 128
 	csel	w3, w3, w0, cc
 	mov	w0, 0
-.L1692:
+.L1706:
 	add	w5, w3, w0
 	cmp	w2, w4
-	bcc	.L1693
+	bcc	.L1707
 	adrp	x22, .LANCHOR13
 	lsr	w19, w19, 2
 	mov	w3, 0
 	mov	w0, 0
 	ldr	x4, [x22, #:lo12:.LANCHOR13]
-.L1694:
+.L1708:
 	cmp	w3, w19
-	bcc	.L1698
+	bcc	.L1712
 	str	wzr, [x4, 16]
 	mov	w1, 8192
 	movk	w1, 0x2, lsl 16
 	ldr	w19, [x4]
 	and	w1, w19, w1
 	cmp	w1, 139264
-	bne	.L1690
+	bne	.L1704
 	mov	w1, w19
-	adrp	x0, .LC109
-	add	x0, x0, :lo12:.LC109
+	adrp	x0, .LC108
+	add	x0, x0, :lo12:.LC108
 	bl	printf
 	ldr	x0, [x22, #:lo12:.LANCHOR13]
 	orr	w19, w19, 131072
 	str	w19, [x0]
-	b	.L1718
-.L1693:
+	b	.L1732
+.L1707:
 	ldr	x7, [x6, #:lo12:.LANCHOR49]
 	and	x0, x0, 4294967292
 	ldr	w0, [x7, x0]
@@ -10295,16 +10440,16 @@ nandc_xfer:
 	add	w1, w1, 4
 	strb	w0, [x21, x7]
 	mov	w0, w5
-	b	.L1692
-.L1698:
+	b	.L1706
+.L1712:
 	uxtw	x1, w3
 	add	x1, x1, 8
 	ldr	w1, [x4, x1, lsl 2]
 	str	w1, [x29, 56]
 	ldr	w1, [x29, 56]
-	tbnz	x1, 2, .L1704
+	tbnz	x1, 2, .L1718
 	ldr	w1, [x29, 56]
-	tbnz	x1, 15, .L1704
+	tbnz	x1, 15, .L1718
 	ldr	w2, [x29, 56]
 	ubfx	x6, x2, 3, 5
 	ldr	w2, [x29, 56]
@@ -10317,42 +10462,42 @@ nandc_xfer:
 	orr	w1, w5, w1, lsl 5
 	cmp	w2, w1
 	ldr	w1, [x29, 56]
-	bls	.L1696
+	bls	.L1710
 	ubfx	x2, x1, 3, 5
 	ldr	w1, [x29, 56]
 	ubfx	x1, x1, 27, 1
-.L1717:
+.L1731:
 	orr	w1, w2, w1, lsl 5
 	cmp	w0, w1
 	csel	w0, w0, w1, cs
-.L1695:
+.L1709:
 	add	w3, w3, 1
-	b	.L1694
-.L1696:
+	b	.L1708
+.L1710:
 	ubfx	x2, x1, 16, 5
 	ldr	w1, [x29, 56]
 	ubfx	x1, x1, 29, 1
-	b	.L1717
-.L1704:
+	b	.L1731
+.L1718:
 	mov	w0, -1
-	b	.L1695
-.L1690:
+	b	.L1709
+.L1704:
 	cmn	w0, #1
-	beq	.L1681
+	beq	.L1695
 	ldr	w1, [x21]
 	cmn	w1, #1
-	bne	.L1681
+	bne	.L1695
 	ldr	w1, [x21, 4]
 	cmn	w1, #1
-	bne	.L1681
+	bne	.L1695
 	ldr	w1, [x20]
 	cmn	w1, #1
 	mov	w1, 512
 	csel	w0, w0, w1, ne
-	b	.L1681
-.L1699:
+	b	.L1695
+.L1713:
 	mov	w0, 0
-	b	.L1681
+	b	.L1695
 	.size	nandc_xfer, .-nandc_xfer
 	.section	.text.flash_read_page,"ax",@progbits
 	.align	2
@@ -10382,22 +10527,22 @@ flash_read_page:
 	sub	w19, w19, #1
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	and	w19, w19, w1
-	tbz	x0, 4, .L1720
+	tbz	x0, 4, .L1734
 	mov	w3, w1
-	adrp	x0, .LC110
+	adrp	x0, .LC109
 	mov	w2, w22
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC110
+	add	x0, x0, :lo12:.LC109
 	bl	printf
-.L1720:
+.L1734:
 	bl	nandc_wait_flash_ready
 	mov	w0, w21
 	bl	nandc_cs
-	adrp	x7, .LANCHOR16
-	cbnz	w22, .L1721
+	adrp	x8, .LANCHOR16
+	cbnz	w22, .L1735
 	mov	w0, w21
 	bl	zftl_flash_enter_slc_mode
-.L1722:
+.L1736:
 	ubfiz	x4, x21, 8, 8
 	and	w0, w19, 255
 	add	x4, x20, x4
@@ -10411,18 +10556,18 @@ flash_read_page:
 	str	w0, [x4, 2052]
 	mov	w0, 48
 	str	w0, [x4, 2056]
-	ldr	x0, [x7, #:lo12:.LANCHOR16]
+	ldr	x0, [x8, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1724
-	cbz	w22, .L1724
+	bne	.L1738
+	cbz	w22, .L1738
 	adrp	x0, .LANCHOR35
 	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbnz	w0, .L1724
+	cbnz	w0, .L1738
 	add	w19, w19, w19, lsl 1
 	sub	w0, w19, #1
 	add	w0, w0, w22
-.L1733:
+.L1747:
 	bl	nandc_set_seed
 	bl	nandc_wait_flash_ready
 	mov	w0, 5
@@ -10438,7 +10583,7 @@ flash_read_page:
 	mov	w0, w21
 	bl	nandc_xfer
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.30
+	bl	nandc_de_cs.constprop.31
 	ldr	x25, [sp, 64]
 	mov	w0, w2
 	ldp	x19, x20, [sp, 16]
@@ -10446,26 +10591,26 @@ flash_read_page:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1721:
-	ldr	x0, [x7, #:lo12:.LANCHOR16]
+.L1735:
+	ldr	x0, [x8, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1723
+	bne	.L1737
 	adrp	x0, .LANCHOR35
 	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbnz	w0, .L1723
+	cbnz	w0, .L1737
 	sxtw	x0, w21
 	add	x0, x0, 8
 	add	x0, x20, x0, lsl 8
 	str	w22, [x0, 8]
-	b	.L1722
-.L1723:
+	b	.L1736
+.L1737:
 	mov	w0, w21
 	bl	zftl_flash_exit_slc_mode
-	b	.L1722
-.L1724:
+	b	.L1736
+.L1738:
 	mov	w0, w19
-	b	.L1733
+	b	.L1747
 	.size	flash_read_page, .-flash_read_page
 	.section	.text.micron_read_retrial,"ax",@progbits
 	.align	2
@@ -10492,22 +10637,22 @@ micron_read_retrial:
 	add	w19, w19, w19, lsl 1
 	asr	w19, w19, 2
 	ldr	x6, [x0, #:lo12:.LANCHOR13]
-	adrp	x0, .LANCHOR162
-	add	x0, x0, :lo12:.LANCHOR162
+	adrp	x0, .LANCHOR164
+	add	x0, x0, :lo12:.LANCHOR164
 	str	x0, [x29, 104]
 	ubfiz	x0, x20, 8, 8
 	add	x25, x6, x0
-.L1735:
+.L1749:
 	adrp	x24, .LANCHOR14
 	add	x24, x24, :lo12:.LANCHOR14
 	mov	w21, 0
 	mov	w28, -1
-.L1736:
+.L1750:
 	ldr	x0, [x29, 104]
 	ldrb	w0, [x0]
 	cmp	w21, w0
-	bcc	.L1741
-.L1740:
+	bcc	.L1755
+.L1754:
 	mov	w0, 239
 	str	w0, [x25, 2056]
 	mov	w0, 137
@@ -10519,33 +10664,33 @@ micron_read_retrial:
 	cmp	w28, w19
 	str	wzr, [x25, 2048]
 	str	wzr, [x25, 2048]
-	bcc	.L1742
+	bcc	.L1756
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L1742:
+.L1756:
 	cmn	w28, #1
 	cset	w24, eq
 	cmp	w28, 256
 	cset	w0, eq
 	orr	w0, w24, w0
-	cbz	w0, .L1743
+	cbz	w0, .L1757
 	mov	w4, w28
 	mov	w3, w21
 	mov	w2, w23
 	mov	w1, w21
-	adrp	x0, .LC112
-	add	x0, x0, :lo12:.LC112
+	adrp	x0, .LC111
+	add	x0, x0, :lo12:.LC111
 	bl	printf
 	eor	w0, w22, 1
 	tst	w24, w0
-	beq	.L1744
+	beq	.L1758
 	mov	w1, 3
 	mov	w0, w20
 	mov	w22, 1
 	bl	mt_auto_read_calibration_config
-	b	.L1735
-.L1741:
+	b	.L1749
+.L1755:
 	mov	w0, 239
 	str	w0, [x25, 2056]
 	mov	w0, 137
@@ -10565,43 +10710,43 @@ micron_read_retrial:
 	bl	flash_read_page
 	mov	w7, w0
 	ldr	w0, [x24]
-	tbz	x0, 12, .L1737
+	tbz	x0, 12, .L1751
 	mov	w4, w7
 	str	w7, [x29, 112]
 	mov	w3, w28
 	mov	w2, w23
 	mov	w1, w21
-	adrp	x0, .LC111
-	add	x0, x0, :lo12:.LC111
+	adrp	x0, .LC110
+	add	x0, x0, :lo12:.LC110
 	bl	printf
 	ldr	w7, [x29, 112]
-.L1737:
+.L1751:
 	cmn	w7, #1
-	beq	.L1738
-	adrp	x0, .LANCHOR159
+	beq	.L1752
+	adrp	x0, .LANCHOR161
 	cmn	w28, #1
 	csel	w28, w28, w7, ne
 	cmp	w7, w19
-	ldr	x0, [x0, #:lo12:.LANCHOR159]
+	ldr	x0, [x0, #:lo12:.LANCHOR161]
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR161
-	ldr	x26, [x0, #:lo12:.LANCHOR161]
-	bcc	.L1747
-.L1738:
+	adrp	x0, .LANCHOR163
+	ldr	x26, [x0, #:lo12:.LANCHOR163]
+	bcc	.L1761
+.L1752:
 	mov	w21, w27
-	b	.L1736
-.L1747:
+	b	.L1750
+.L1761:
 	mov	w28, w7
-	b	.L1740
-.L1744:
-	cbz	w22, .L1745
+	b	.L1754
+.L1758:
+	cbz	w22, .L1759
 	mov	w0, w20
 	mov	w1, 0
 	bl	mt_auto_read_calibration_config
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L1745:
+.L1759:
 	bl	nandc_wait_flash_ready
 	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
@@ -10611,13 +10756,13 @@ micron_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1743:
-	cbz	w22, .L1745
+.L1757:
+	cbz	w22, .L1759
 	mov	w1, 0
 	mov	w0, w20
 	mov	w28, 256
 	bl	mt_auto_read_calibration_config
-	b	.L1745
+	b	.L1759
 	.size	micron_read_retrial, .-micron_read_retrial
 	.section	.text.toshiba_3d_read_retrial,"ax",@progbits
 	.align	2
@@ -10658,17 +10803,17 @@ toshiba_3d_read_retrial:
 	csel	w0, w1, w0, ne
 	str	w0, [x29, 136]
 	add	x0, x22, :lo12:.LANCHOR24
-	cbnz	w4, .L1765
+	cbnz	w4, .L1779
 	str	x0, [x29, 120]
 	sxtw	x0, w24
 	add	x0, x0, 8
 	add	x0, x25, x0, lsl 8
 	str	x0, [x29, 112]
-.L1772:
+.L1786:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, 36
-	bne	.L1766
+	bne	.L1780
 	mov	w1, w20
 	mov	x0, x21
 	mov	w2, 0
@@ -10676,7 +10821,7 @@ toshiba_3d_read_retrial:
 	ldr	x1, [x29, 112]
 	mov	w0, 93
 	str	w0, [x1, 8]
-.L1767:
+.L1781:
 	mov	w4, w28
 	mov	x3, x27
 	mov	x2, x26
@@ -10686,60 +10831,60 @@ toshiba_3d_read_retrial:
 	mov	w4, w0
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 4, .L1768
+	tbz	x0, 4, .L1782
 	mov	w3, w4
 	str	w4, [x29, 108]
 	mov	w2, w23
 	mov	w1, w20
-	adrp	x0, .LC113
-	add	x0, x0, :lo12:.LC113
+	adrp	x0, .LC112
+	add	x0, x0, :lo12:.LC112
 	bl	printf
 	ldr	w4, [x29, 108]
-.L1768:
+.L1782:
 	cmn	w4, #1
-	beq	.L1769
-	adrp	x0, .LANCHOR159
+	beq	.L1783
+	adrp	x0, .LANCHOR161
 	cmn	w19, #1
 	csel	w19, w19, w4, ne
-	ldr	x26, [x0, #:lo12:.LANCHOR159]
-	adrp	x0, .LANCHOR161
-	ldr	x27, [x0, #:lo12:.LANCHOR161]
+	ldr	x26, [x0, #:lo12:.LANCHOR161]
+	adrp	x0, .LANCHOR163
+	ldr	x27, [x0, #:lo12:.LANCHOR163]
 	adrp	x0, .LANCHOR46
 	ldrb	w0, [x0, #:lo12:.LANCHOR46]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1787
-.L1769:
+	bcc	.L1801
+.L1783:
 	ldr	w0, [x29, 136]
 	add	w20, w20, 1
 	cmp	w0, w20
-	bne	.L1772
-.L1771:
+	bne	.L1786
+.L1785:
 	ldrb	w0, [x22, #:lo12:.LANCHOR24]
 	cmp	w0, 36
-	bne	.L1773
+	bne	.L1787
 	mov	w2, 0
-.L1810:
+.L1824:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_tlc_set_rr_para
-	b	.L1774
-.L1766:
+	b	.L1788
+.L1780:
 	mov	w1, w20
 	mov	x0, x21
 	bl	toshiba_3d_set_slc_rr_para
-	b	.L1767
-.L1787:
+	b	.L1781
+.L1801:
 	mov	w19, w4
-	b	.L1771
-.L1773:
+	b	.L1785
+.L1787:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_3d_set_slc_rr_para
-.L1774:
+.L1788:
 	ldrb	w0, [x22, #:lo12:.LANCHOR24]
 	cmp	w0, 36
-	bne	.L1783
+	bne	.L1797
 	ldr	x0, [x29, 128]
 	add	x25, x25, x0, lsl 8
 	mov	w0, 85
@@ -10748,27 +10893,27 @@ toshiba_3d_read_retrial:
 	str	wzr, [x25, 2052]
 	str	wzr, [x25, 2048]
 	str	w0, [x25, 2056]
-.L1783:
+.L1797:
 	adrp	x0, .LANCHOR46
 	ldrb	w0, [x0, #:lo12:.LANCHOR46]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L1784
+	bcc	.L1798
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L1784:
+.L1798:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L1785
-	adrp	x0, .LC115
+	bne	.L1799
+	adrp	x0, .LC114
 	mov	w4, w19
 	mov	w3, w20
 	mov	w2, w23
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC115
+	add	x0, x0, :lo12:.LC114
 	bl	printf
-.L1785:
+.L1799:
 	bl	nandc_wait_flash_ready
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
@@ -10778,23 +10923,23 @@ toshiba_3d_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1765:
+.L1779:
 	str	x0, [x29, 112]
 	sxtw	x0, w24
 	add	x0, x0, 8
 	add	x0, x25, x0, lsl 8
 	str	x0, [x29, 136]
-.L1781:
+.L1795:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
 	cmp	w0, 36
-	bne	.L1775
+	bne	.L1789
 	mov	x0, x21
 	mov	w2, 1
 	mov	w1, w20
 	bl	toshiba_tlc_set_rr_para
 	mov	w0, 93
-.L1809:
+.L1823:
 	ldr	x1, [x29, 136]
 	mov	w4, w28
 	mov	x3, x27
@@ -10806,54 +10951,54 @@ toshiba_3d_read_retrial:
 	mov	w4, w0
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 4, .L1777
+	tbz	x0, 4, .L1791
 	mov	w3, w4
 	str	w4, [x29, 108]
 	mov	w2, w23
 	mov	w1, w20
-	adrp	x0, .LC114
-	add	x0, x0, :lo12:.LC114
+	adrp	x0, .LC113
+	add	x0, x0, :lo12:.LC113
 	bl	printf
 	ldr	w4, [x29, 108]
-.L1777:
+.L1791:
 	cmn	w4, #1
-	beq	.L1778
-	adrp	x0, .LANCHOR159
+	beq	.L1792
+	adrp	x0, .LANCHOR161
 	cmn	w19, #1
 	csel	w19, w19, w4, ne
-	ldr	x26, [x0, #:lo12:.LANCHOR159]
-	adrp	x0, .LANCHOR161
-	ldr	x27, [x0, #:lo12:.LANCHOR161]
+	ldr	x26, [x0, #:lo12:.LANCHOR161]
+	adrp	x0, .LANCHOR163
+	ldr	x27, [x0, #:lo12:.LANCHOR163]
 	adrp	x0, .LANCHOR46
 	ldrb	w0, [x0, #:lo12:.LANCHOR46]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1788
-.L1778:
+	bcc	.L1802
+.L1792:
 	ldr	w0, [x29, 120]
 	add	w20, w20, 1
 	cmp	w0, w20
-	bne	.L1781
-.L1780:
+	bne	.L1795
+.L1794:
 	ldrb	w0, [x22, #:lo12:.LANCHOR24]
 	cmp	w0, 36
-	bne	.L1782
+	bne	.L1796
 	mov	w2, 1
-	b	.L1810
-.L1775:
+	b	.L1824
+.L1789:
 	mov	x0, x21
 	mov	w1, w20
 	bl	toshiba_3d_set_tlc_rr_para
 	mov	w0, 38
-	b	.L1809
-.L1788:
+	b	.L1823
+.L1802:
 	mov	w19, w4
-	b	.L1780
-.L1782:
+	b	.L1794
+.L1796:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_3d_set_tlc_rr_para
-	b	.L1774
+	b	.L1788
 	.size	toshiba_3d_read_retrial, .-toshiba_3d_read_retrial
 	.section	.text.toshiba_read_retrial,"ax",@progbits
 	.align	2
@@ -10885,35 +11030,35 @@ toshiba_read_retrial:
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
-	bls	.L1829
+	bls	.L1843
 	adrp	x0, .LANCHOR21
 	ldrb	w0, [x0, #:lo12:.LANCHOR21]
-	cbz	w0, .L1830
+	cbz	w0, .L1844
 	mov	w23, 1
 	mov	w0, 1
 	bl	nandc_set_if_mode
-.L1813:
+.L1827:
 	and	x0, x19, 255
 	mov	w1, 92
 	add	x0, x22, x0, lsl 8
 	str	w1, [x0, 2056]
 	mov	w1, 197
 	str	w1, [x0, 2056]
-.L1812:
+.L1826:
 	sxtw	x0, w19
 	mov	w20, 1
 	add	x0, x0, 8
 	mov	w24, -1
 	add	x0, x22, x0, lsl 8
 	str	x0, [x29, 96]
-.L1814:
-	adrp	x0, .LANCHOR162
-	ldrb	w0, [x0, #:lo12:.LANCHOR162]
+.L1828:
+	adrp	x0, .LANCHOR164
+	ldrb	w0, [x0, #:lo12:.LANCHOR164]
 	add	w0, w0, 1
 	cmp	w20, w0
-	bcc	.L1823
+	bcc	.L1837
 	mov	w28, w24
-.L1822:
+.L1836:
 	ldr	x0, [x29, 120]
 	mov	w1, 0
 	ldrb	w0, [x0, #:lo12:.LANCHOR24]
@@ -10921,9 +11066,9 @@ toshiba_read_retrial:
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x21
-	bhi	.L1824
+	bhi	.L1838
 	bl	sandisk_set_rr_para
-.L1825:
+.L1839:
 	sxtw	x19, w19
 	mov	w0, 255
 	add	x19, x19, 8
@@ -10933,27 +11078,27 @@ toshiba_read_retrial:
 	ldrb	w0, [x0, #:lo12:.LANCHOR46]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L1826
+	bcc	.L1840
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L1826:
+.L1840:
 	cmp	w28, 256
 	ccmn	w28, #1, 4, ne
-	bne	.L1827
-	adrp	x0, .LC115
+	bne	.L1841
+	adrp	x0, .LC114
 	mov	w4, w28
 	mov	w3, w20
 	mov	w2, w25
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC115
+	add	x0, x0, :lo12:.LC114
 	bl	printf
-.L1827:
+.L1841:
 	bl	nandc_wait_flash_ready
-	cbz	w23, .L1811
+	cbz	w23, .L1825
 	mov	w0, 4
 	bl	nandc_set_if_mode
-.L1811:
+.L1825:
 	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10962,13 +11107,13 @@ toshiba_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1830:
+.L1844:
 	mov	w23, 0
-	b	.L1813
-.L1829:
+	b	.L1827
+.L1843:
 	mov	w23, 0
-	b	.L1812
-.L1823:
+	b	.L1826
+.L1837:
 	ldr	x0, [x29, 120]
 	mov	w1, w20
 	ldrb	w0, [x0, #:lo12:.LANCHOR24]
@@ -10976,22 +11121,22 @@ toshiba_read_retrial:
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x21
-	bhi	.L1815
+	bhi	.L1829
 	bl	sandisk_set_rr_para
-.L1816:
+.L1830:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0, #:lo12:.LANCHOR24]
 	cmp	w0, 34
-	bne	.L1817
-	adrp	x0, .LANCHOR162
-	ldrb	w0, [x0, #:lo12:.LANCHOR162]
+	bne	.L1831
+	adrp	x0, .LANCHOR164
+	ldrb	w0, [x0, #:lo12:.LANCHOR164]
 	sub	w0, w0, #3
 	cmp	w20, w0
-	bne	.L1817
+	bne	.L1831
 	ldr	x1, [x29, 96]
 	mov	w0, 179
 	str	w0, [x1, 8]
-.L1817:
+.L1831:
 	ldr	x0, [x29, 104]
 	mov	w1, 38
 	ldr	w4, [x29, 116]
@@ -11006,27 +11151,27 @@ toshiba_read_retrial:
 	bl	flash_read_page
 	mov	w28, w0
 	cmn	w0, #1
-	beq	.L1820
+	beq	.L1834
 	cmn	w24, #1
 	csel	w24, w24, w0, ne
-	adrp	x0, .LANCHOR159
-	ldr	x26, [x0, #:lo12:.LANCHOR159]
 	adrp	x0, .LANCHOR161
-	ldr	x27, [x0, #:lo12:.LANCHOR161]
+	ldr	x26, [x0, #:lo12:.LANCHOR161]
+	adrp	x0, .LANCHOR163
+	ldr	x27, [x0, #:lo12:.LANCHOR163]
 	adrp	x0, .LANCHOR46
 	ldrb	w0, [x0, #:lo12:.LANCHOR46]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L1822
-.L1820:
+	bcc	.L1836
+.L1834:
 	add	w20, w20, 1
-	b	.L1814
-.L1815:
+	b	.L1828
+.L1829:
 	bl	toshiba_set_rr_para
-	b	.L1816
-.L1824:
+	b	.L1830
+.L1838:
 	bl	toshiba_set_rr_para
-	b	.L1825
+	b	.L1839
 	.size	toshiba_read_retrial, .-toshiba_read_retrial
 	.section	.text.hynix_read_retrial,"ax",@progbits
 	.align	2
@@ -11057,34 +11202,34 @@ hynix_read_retrial:
 	adrp	x6, .LANCHOR46
 	add	x6, x6, :lo12:.LANCHOR46
 	mov	w5, 0
-	adrp	x7, .LANCHOR159
-	adrp	x8, .LANCHOR161
-.L1844:
+	adrp	x7, .LANCHOR161
+	adrp	x8, .LANCHOR163
+.L1858:
 	cmp	w5, w24
-	bcc	.L1849
-.L1848:
+	bcc	.L1863
+.L1862:
 	adrp	x0, .LANCHOR46
 	add	x23, x28, x23
 	ldrb	w0, [x0, #:lo12:.LANCHOR46]
 	strb	w20, [x23, 8]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L1850
+	bcc	.L1864
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L1850:
+.L1864:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L1851
-	adrp	x0, .LC116
+	bne	.L1865
+	adrp	x0, .LC115
 	mov	w4, w19
 	mov	w3, w5
 	mov	w2, w22
 	mov	w1, w5
-	add	x0, x0, :lo12:.LC116
+	add	x0, x0, :lo12:.LC115
 	bl	printf
-.L1851:
+.L1865:
 	bl	nandc_wait_flash_ready
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
@@ -11094,7 +11239,7 @@ hynix_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1849:
+.L1863:
 	add	w20, w20, 1
 	stp	x6, x8, [x29, 96]
 	and	w20, w20, 255
@@ -11115,21 +11260,21 @@ hynix_read_retrial:
 	cmn	w0, #1
 	ldp	x6, x8, [x29, 96]
 	ldr	x7, [x29, 112]
-	beq	.L1846
+	beq	.L1860
 	ldrb	w1, [x6]
 	cmn	w19, #1
 	csel	w19, w19, w0, ne
-	ldr	x25, [x7, #:lo12:.LANCHOR159]
-	ldr	x26, [x8, #:lo12:.LANCHOR161]
+	ldr	x25, [x7, #:lo12:.LANCHOR161]
+	ldr	x26, [x8, #:lo12:.LANCHOR163]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L1852
-.L1846:
+	bcc	.L1866
+.L1860:
 	add	w5, w5, 1
-	b	.L1844
-.L1852:
+	b	.L1858
+.L1866:
 	mov	w19, w0
-	b	.L1848
+	b	.L1862
 	.size	hynix_read_retrial, .-hynix_read_retrial
 	.section	.text.flash_ddr_tuning_read,"ax",@progbits
 	.align	2
@@ -11157,15 +11302,15 @@ flash_ddr_tuning_read:
 	mov	w28, 0
 	str	x0, [x29, 120]
 	mov	w26, 0
-	adrp	x0, .LC117
+	adrp	x0, .LC116
 	mov	w27, 0
-	add	x0, x0, :lo12:.LC117
+	add	x0, x0, :lo12:.LC116
 	mov	w19, 1024
 	mov	w21, -1
 	mov	w7, 6
 	str	wzr, [x29, 140]
 	str	x0, [x29, 112]
-.L1868:
+.L1882:
 	mov	w0, w7
 	str	w7, [x29, 128]
 	bl	nandc_set_ddr_para
@@ -11179,7 +11324,7 @@ flash_ddr_tuning_read:
 	ldr	x0, [x29, 120]
 	ldr	w7, [x29, 128]
 	ldr	w0, [x0]
-	tbz	x0, 4, .L1863
+	tbz	x0, 4, .L1877
 	ldr	x0, [x29, 112]
 	mov	w3, w4
 	mov	w1, w7
@@ -11189,47 +11334,47 @@ flash_ddr_tuning_read:
 	bl	printf
 	ldr	w4, [x29, 108]
 	ldr	w7, [x29, 128]
-.L1863:
+.L1877:
 	add	w0, w19, 1
 	cmp	w4, w0
-	bhi	.L1864
-	adrp	x0, .LANCHOR159
-	ldr	x23, [x0, #:lo12:.LANCHOR159]
+	bhi	.L1878
 	adrp	x0, .LANCHOR161
-	ldr	x24, [x0, #:lo12:.LANCHOR161]
+	ldr	x23, [x0, #:lo12:.LANCHOR161]
+	adrp	x0, .LANCHOR163
+	ldr	x24, [x0, #:lo12:.LANCHOR163]
 	ldrb	w0, [x25]
 	cmp	w4, w0, lsr 2
-	bcs	.L1874
+	bcs	.L1888
 	add	w27, w27, 1
 	cmp	w27, 7
-	bls	.L1874
+	bls	.L1888
 	sub	w28, w7, w27
 	mov	w19, w4
 	mov	w21, 0
-.L1866:
+.L1880:
 	ldr	w0, [x29, 140]
 	cmp	w27, w26
 	csel	w28, w28, w0, cs
-.L1867:
-	cbz	w28, .L1869
+.L1881:
+	cbz	w28, .L1883
 	adrp	x0, .LANCHOR46
 	mov	w1, 3
 	ldrb	w0, [x0, #:lo12:.LANCHOR46]
 	udiv	w0, w0, w1
 	cmp	w0, w19
-	bls	.L1869
+	bls	.L1883
 	mov	w1, w28
-	adrp	x0, .LC118
-	add	x0, x0, :lo12:.LC118
+	adrp	x0, .LC117
+	add	x0, x0, :lo12:.LC117
 	bl	printf
 	mov	w0, w28
-.L1885:
+.L1899:
 	bl	nandc_set_ddr_para
-	cbz	w21, .L1862
+	cbz	w21, .L1876
 	mov	w2, w22
 	mov	w1, w20
-	adrp	x0, .LC119
-	add	x0, x0, :lo12:.LC119
+	adrp	x0, .LC118
+	add	x0, x0, :lo12:.LC118
 	bl	printf
 	mov	w0, w20
 	bl	flash_reset
@@ -11253,22 +11398,22 @@ flash_ddr_tuning_read:
 	mov	w3, w0
 	mov	w2, w22
 	mov	w1, w20
-	adrp	x0, .LC120
-	add	x0, x0, :lo12:.LC120
+	adrp	x0, .LC119
+	add	x0, x0, :lo12:.LC119
 	bl	printf
 	adrp	x0, .LANCHOR46
 	ldrb	w0, [x0, #:lo12:.LANCHOR46]
 	cmp	w19, w0
-	bhi	.L1876
-	adrp	x1, .LANCHOR163
-	ldr	w0, [x1, #:lo12:.LANCHOR163]
+	bhi	.L1890
+	adrp	x1, .LANCHOR165
+	ldr	w0, [x1, #:lo12:.LANCHOR165]
 	add	w0, w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR163]
+	str	w0, [x1, #:lo12:.LANCHOR165]
 	cmp	w0, 100
-	bls	.L1872
+	bls	.L1886
 	adrp	x0, .LANCHOR21
 	strb	wzr, [x0, #:lo12:.LANCHOR21]
-.L1862:
+.L1876:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11277,38 +11422,38 @@ flash_ddr_tuning_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1864:
+.L1878:
 	cmp	w27, w26
-	bls	.L1875
+	bls	.L1889
 	sub	w0, w28, w27
 	str	w0, [x29, 140]
 	cmp	w27, 7
-	bhi	.L1867
+	bhi	.L1881
 	mov	w26, w27
-.L1875:
+.L1889:
 	mov	w27, 0
-	b	.L1865
-.L1874:
+	b	.L1879
+.L1888:
 	mov	w28, w7
 	mov	w19, w4
 	mov	w21, 0
-.L1865:
+.L1879:
 	add	w7, w7, 2
 	cmp	w7, 50
-	bne	.L1868
-	b	.L1866
-.L1869:
+	bne	.L1882
+	b	.L1880
+.L1883:
 	ldrb	w0, [x29, 132]
-	b	.L1885
-.L1876:
+	b	.L1899
+.L1890:
 	mov	w19, w21
-.L1872:
+.L1886:
 	adrp	x20, .LANCHOR45
 	ldrb	w0, [x20, #:lo12:.LANCHOR45]
 	bl	flash_set_interface_mode
 	ldrb	w0, [x20, #:lo12:.LANCHOR45]
 	bl	nandc_set_if_mode
-	b	.L1862
+	b	.L1876
 	.size	flash_ddr_tuning_read, .-flash_ddr_tuning_read
 	.section	.text.flash_read_page_en,"ax",@progbits
 	.align	2
@@ -11330,59 +11475,59 @@ flash_read_page_en:
 	mov	w24, w4
 	mov	x25, x0
 	cmp	w1, w20
-	bhi	.L1887
-	adrp	x1, .LANCHOR164
+	bhi	.L1901
+	adrp	x1, .LANCHOR166
 	adrp	x0, .LC0
-	mov	w2, 404
-	add	x1, x1, :lo12:.LANCHOR164
+	mov	w2, 409
+	add	x1, x1, :lo12:.LANCHOR166
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1887:
+.L1901:
 	adrp	x0, .LANCHOR30
 	add	x0, x0, :lo12:.LANCHOR30
+	ldrb	w4, [x25, #:lo12:.LANCHOR18]
 	ldrb	w21, [x0, w20, sxtw]
-	ldrb	w0, [x25, #:lo12:.LANCHOR18]
-	cmp	w0, w20
-	bcs	.L1888
+	cmp	w20, w4
+	bcc	.L1902
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbnz	x0, 6, .L1889
-.L1913:
+	tbnz	x0, 6, .L1903
+.L1927:
 	mov	w0, -1
-.L1886:
+.L1900:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1889:
+.L1903:
 	mov	w3, w19
 	mov	w2, w20
 	mov	w1, w21
-	adrp	x0, .LC121
-	add	x0, x0, :lo12:.LC121
+	adrp	x0, .LC120
+	add	x0, x0, :lo12:.LC120
 	bl	printf
-	b	.L1913
-.L1888:
+	b	.L1927
+.L1902:
 	tst	x19, 50331648
-	bne	.L1891
+	bne	.L1905
 	adrp	x0, .LANCHOR0
 	adrp	x1, .LANCHOR1
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L1892
+	cbz	w0, .L1906
 	ldrb	w0, [x1, #:lo12:.LANCHOR1]
-	cbz	w0, .L1891
-.L1892:
+	cbz	w0, .L1905
+.L1906:
 	adrp	x0, .LANCHOR2
 	ldrb	w1, [x1, #:lo12:.LANCHOR1]
 	ldrh	w2, [x0, #:lo12:.LANCHOR2]
 	udiv	w0, w19, w2
 	mul	w0, w0, w2
 	sub	w19, w19, w0
-	cbz	w1, .L1893
+	cbz	w1, .L1907
 	add	w19, w0, w19, lsl 1
-.L1891:
+.L1905:
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -11390,25 +11535,25 @@ flash_read_page_en:
 	mov	w0, w21
 	bl	flash_read_page
 	cmn	w0, #1
-	bne	.L1886
+	bne	.L1900
 	adrp	x20, .LANCHOR48
 	ldrb	w25, [x20, #:lo12:.LANCHOR48]
-	cbnz	w25, .L1894
-.L1897:
-	adrp	x0, .LANCHOR165
-	ldr	x5, [x0, #:lo12:.LANCHOR165]
-	cbnz	x5, .L1895
-.L1896:
+	cbnz	w25, .L1908
+.L1911:
+	adrp	x0, .LANCHOR167
+	ldr	x5, [x0, #:lo12:.LANCHOR167]
+	cbnz	x5, .L1909
+.L1910:
 	ldrb	w4, [x20, #:lo12:.LANCHOR48]
 	mov	w3, -1
 	mov	w2, w19
 	mov	w1, 0
-	adrp	x0, .LC122
-	add	x0, x0, :lo12:.LC122
+	adrp	x0, .LC121
+	add	x0, x0, :lo12:.LC121
 	bl	printf
 	adrp	x0, .LANCHOR21
 	ldrb	w0, [x0, #:lo12:.LANCHOR21]
-	cbz	w0, .L1913
+	cbz	w0, .L1927
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -11420,13 +11565,13 @@ flash_read_page_en:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	b	flash_ddr_tuning_read
-.L1893:
+.L1907:
 	adrp	x1, .LANCHOR3
 	add	x1, x1, :lo12:.LANCHOR3
 	ldrh	w19, [x1, w19, uxtw 1]
 	add	w19, w19, w0
-	b	.L1891
-.L1894:
+	b	.L1905
+.L1908:
 	strb	wzr, [x20, #:lo12:.LANCHOR48]
 	mov	w4, w24
 	mov	x3, x23
@@ -11436,9 +11581,9 @@ flash_read_page_en:
 	bl	flash_read_page
 	strb	w25, [x20, #:lo12:.LANCHOR48]
 	cmn	w0, #1
-	beq	.L1897
-	b	.L1886
-.L1895:
+	beq	.L1911
+	b	.L1900
+.L1909:
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -11446,8 +11591,8 @@ flash_read_page_en:
 	mov	w0, w21
 	blr	x5
 	cmn	w0, #1
-	beq	.L1896
-	b	.L1886
+	beq	.L1910
+	b	.L1900
 	.size	flash_read_page_en, .-flash_read_page_en
 	.section	.text.flash_get_last_written_page,"ax",@progbits
 	.align	2
@@ -11458,11 +11603,11 @@ flash_get_last_written_page:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	w23, w0, 255
-	adrp	x0, .LANCHOR142
+	adrp	x0, .LANCHOR144
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
 	mov	x24, x2
-	ldrh	w19, [x0, #:lo12:.LANCHOR142]
+	ldrh	w19, [x0, #:lo12:.LANCHOR144]
 	adrp	x0, .LANCHOR32+26
 	stp	x21, x22, [sp, 32]
 	and	w21, w1, 65535
@@ -11477,23 +11622,23 @@ flash_get_last_written_page:
 	add	w1, w19, w26
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L1915
+	bne	.L1929
 	mov	w27, 0
 	mov	w28, 2
-.L1916:
+.L1930:
 	cmp	w27, w19
-	ble	.L1919
-.L1915:
+	ble	.L1933
+.L1929:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1920
+	tbz	x0, 12, .L1934
 	ldr	w3, [x22]
-	adrp	x0, .LC123
+	adrp	x0, .LC122
 	mov	w2, w19
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC123
+	add	x0, x0, :lo12:.LC122
 	bl	printf
-.L1920:
+.L1934:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11502,7 +11647,7 @@ flash_get_last_written_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1919:
+.L1933:
 	add	w20, w27, w19
 	mov	w4, w25
 	mov	x3, x22
@@ -11512,14 +11657,14 @@ flash_get_last_written_page:
 	add	w1, w26, w20, sxth
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L1917
+	bne	.L1931
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L1916
-.L1917:
+	b	.L1930
+.L1931:
 	add	w20, w20, 1
 	sxth	w27, w20
-	b	.L1916
+	b	.L1930
 	.size	flash_get_last_written_page, .-flash_get_last_written_page
 	.section	.text.flash_get_last_written_page_ext,"ax",@progbits
 	.align	2
@@ -11562,34 +11707,34 @@ flash_ddr_para_scan:
 	mov	w23, w1
 	str	x25, [sp, 64]
 	strb	w21, [x19, #:lo12:.LANCHOR21]
-	adrp	x24, .LANCHOR167
+	adrp	x24, .LANCHOR169
 	bl	flash_set_interface_mode
-	adrp	x25, .LANCHOR166
+	adrp	x25, .LANCHOR168
 	ldrb	w0, [x20, #:lo12:.LANCHOR45]
 	bl	nandc_set_if_mode
-	ldr	x3, [x25, #:lo12:.LANCHOR166]
+	ldr	x3, [x25, #:lo12:.LANCHOR168]
 	mov	w4, 4
-	ldr	x2, [x24, #:lo12:.LANCHOR167]
+	ldr	x2, [x24, #:lo12:.LANCHOR169]
 	mov	w1, w23
 	mov	w0, w22
 	bl	flash_ddr_tuning_read
-	ldr	x3, [x25, #:lo12:.LANCHOR166]
+	ldr	x3, [x25, #:lo12:.LANCHOR168]
 	mov	w4, 4
-	ldr	x2, [x24, #:lo12:.LANCHOR167]
+	ldr	x2, [x24, #:lo12:.LANCHOR169]
 	mov	w1, w23
 	mov	w0, w22
 	bl	flash_read_page
 	cmn	w0, #1
 	mov	x0, x19
-	bne	.L1927
+	bne	.L1941
 	ldrb	w1, [x20, #:lo12:.LANCHOR45]
-	tbz	x1, 0, .L1927
+	tbz	x1, 0, .L1941
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, w21
 	bl	nandc_set_if_mode
 	strb	wzr, [x19, #:lo12:.LANCHOR21]
-.L1928:
+.L1942:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -11597,1351 +11742,1336 @@ flash_ddr_para_scan:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1927:
+.L1941:
 	mov	w1, 1
 	strb	w1, [x0, #:lo12:.LANCHOR21]
-	b	.L1928
+	b	.L1942
 	.size	flash_ddr_para_scan, .-flash_ddr_para_scan
-	.section	.text.flash_complete_plane_page_read,"ax",@progbits
+	.section	.text.flash_prog_page,"ax",@progbits
 	.align	2
-	.global	flash_complete_plane_page_read
-	.type	flash_complete_plane_page_read, %function
-flash_complete_plane_page_read:
-	stp	x29, x30, [sp, -64]!
-	mov	w4, 24
+	.global	flash_prog_page
+	.type	flash_prog_page, %function
+flash_prog_page:
+	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	mov	w24, w0
-	adrp	x0, .LANCHOR31
 	stp	x21, x22, [sp, 32]
+	and	w21, w0, 255
+	adrp	x0, .LANCHOR13
+	stp	x25, x26, [sp, 64]
 	stp	x19, x20, [sp, 16]
-	mov	w19, 1
+	mov	w20, 24
+	ldr	x26, [x0, #:lo12:.LANCHOR13]
+	adrp	x0, .LANCHOR31
+	stp	x23, x24, [sp, 48]
+	mov	w22, w1
 	ldrb	w0, [x0, #:lo12:.LANCHOR31]
-	mov	x20, x1
-	mov	x21, x2
-	sub	w22, w4, w0
-	lsl	w19, w19, w0
-	sub	w19, w19, #1
-	lsr	w0, w24, w22
-	and	w19, w19, w0
-	adrp	x0, .LANCHOR18
-	and	w19, w19, 255
-	mov	x23, x0
-	ldrb	w1, [x0, #:lo12:.LANCHOR18]
-	cmp	w1, w19
-	bhi	.L1934
-	adrp	x1, .LANCHOR168
-	adrp	x0, .LC0
-	mov	w2, 909
-	add	x1, x1, :lo12:.LANCHOR168
-	add	x0, x0, :lo12:.LC0
+	and	x19, x21, 255
+	str	x27, [sp, 80]
+	add	x23, x19, 8
+	sub	w0, w20, w0
+	mov	w20, 1
+	mov	x24, x2
+	mov	x25, x3
+	lsl	w20, w20, w0
+	adrp	x0, .LANCHOR14
+	sub	w20, w20, #1
+	add	x23, x26, x23, lsl 8
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	and	w20, w20, w1
+	ubfx	x27, x22, 24, 2
+	tbz	x0, 4, .L1948
+	adrp	x0, .LC123
+	mov	w3, w4
+	mov	w2, w27
+	add	x0, x0, :lo12:.LC123
 	bl	printf
-.L1934:
-	ldrb	w0, [x23, #:lo12:.LANCHOR18]
-	cmp	w0, w19
-	bls	.L1942
-	adrp	x2, .LANCHOR30
-	add	x2, x2, :lo12:.LANCHOR30
-	adrp	x0, .LANCHOR13
-	mov	w4, 1
-	lsl	w4, w4, w22
-	sub	w4, w4, #1
-	ldrb	w7, [x2, w19, sxtw]
-	and	w4, w4, w24
-	ldr	x6, [x0, #:lo12:.LANCHOR13]
-	ubfx	x24, x24, 24, 2
-	mov	w0, w7
-	bl	nandc_cs
-	cbnz	w24, .L1936
-	mov	w0, w4
-	bl	slc_phy_page_address_calc
-	mov	w4, w0
-.L1936:
-	adrp	x0, .LANCHOR20+16
-	and	x1, x7, 255
-	and	w5, w4, 255
-	lsr	w3, w4, 8
-	ldrb	w0, [x0, #:lo12:.LANCHOR20+16]
-	lsr	w2, w4, 16
-	cmp	w0, 1
-	adrp	x0, .LANCHOR16
-	bne	.L1937
-	add	x1, x6, x1, lsl 8
-	mov	w6, 6
-.L1949:
-	str	w6, [x1, 2056]
-	str	wzr, [x1, 2052]
-	str	wzr, [x1, 2052]
-	str	w5, [x1, 2052]
-	str	w3, [x1, 2052]
-	str	w2, [x1, 2052]
-.L1947:
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
-	mov	w2, 224
-	str	w2, [x1, 2056]
-	ldrb	w0, [x0, 12]
-	cmp	w0, 3
-	bne	.L1940
-	cbz	w24, .L1940
-	adrp	x0, .LANCHOR35
-	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbnz	w0, .L1940
-	add	w4, w4, w4, lsl 1
-	sub	w0, w24, #1
-	add	w0, w4, w0
 .L1948:
+	bl	nandc_wait_flash_ready
+	mov	w0, w21
+	bl	hynix_reconfig_rr_para
+	mov	w0, w21
+	bl	nandc_cs
+	mov	w0, w21
+	cbnz	w27, .L1949
+	bl	zftl_flash_enter_slc_mode
+.L1950:
+	add	x19, x26, x19, lsl 8
+	mov	w0, 128
+	str	w0, [x19, 2056]
+	and	w0, w20, 255
+	str	wzr, [x19, 2052]
+	str	wzr, [x19, 2052]
+	str	w0, [x19, 2052]
+	lsr	w0, w20, 8
+	str	w0, [x19, 2052]
+	lsr	w0, w20, 16
+	str	w0, [x19, 2052]
+	mov	w0, w20
 	bl	nandc_set_seed
 	adrp	x0, .LANCHOR32+9
-	mov	x4, x21
-	mov	x3, x20
-	mov	w1, 0
+	mov	x4, x25
+	mov	x3, x24
+	mov	w1, 1
 	ldrb	w2, [x0, #:lo12:.LANCHOR32+9]
-	mov	w0, w7
+	mov	w0, w21
 	bl	nandc_xfer
-	mov	w2, w0
-	bl	nandc_de_cs.constprop.30
+	mov	w0, 16
+	str	w0, [x19, 2056]
+	bl	nandc_wait_flash_ready
+	mov	x0, x23
+	bl	flash_read_status
+	mov	w3, w0
+	bl	nandc_de_cs.constprop.31
+	and	w2, w3, 4
+	tbz	x3, 2, .L1947
+	mov	w1, w22
+	adrp	x0, .LC124
+	add	x0, x0, :lo12:.LC124
+	bl	printf
+	mov	w2, -1
+.L1947:
 	mov	w0, w2
-.L1933:
+	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 64
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
 	ret
-.L1937:
-	ldr	x8, [x0, #:lo12:.LANCHOR16]
-	add	x1, x6, x1, lsl 8
-	ldrb	w8, [x8, 12]
-	cmp	w8, 3
-	bne	.L1939
-	mov	w6, 5
-	b	.L1949
-.L1939:
-	str	wzr, [x1, 2056]
-	str	wzr, [x1, 2052]
-	str	wzr, [x1, 2052]
-	str	w5, [x1, 2052]
-	str	w3, [x1, 2052]
-	str	w2, [x1, 2052]
-	mov	w2, 5
-	str	w2, [x1, 2056]
-	str	wzr, [x1, 2052]
-	str	wzr, [x1, 2052]
-	b	.L1947
-.L1940:
-	mov	w0, w4
-	b	.L1948
-.L1942:
-	mov	w0, -1
-	b	.L1933
-	.size	flash_complete_plane_page_read, .-flash_complete_plane_page_read
-	.section	.text.flash_complete_page_read,"ax",@progbits
+.L1949:
+	bl	zftl_flash_exit_slc_mode
+	b	.L1950
+	.size	flash_prog_page, .-flash_prog_page
+	.section	.text.flash_test_blk,"ax",@progbits
 	.align	2
-	.global	flash_complete_page_read
-	.type	flash_complete_page_read, %function
-flash_complete_page_read:
-	stp	x29, x30, [sp, -96]!
+	.global	flash_test_blk
+	.type	flash_test_blk, %function
+flash_test_blk:
+	stp	x29, x30, [sp, -64]!
+	mov	w2, 32
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	mov	w21, w0
-	adrp	x0, .LANCHOR31
+	adrp	x22, .LANCHOR161
 	stp	x19, x20, [sp, 16]
-	mov	x22, x1
-	mov	w1, 24
-	ldrb	w20, [x0, #:lo12:.LANCHOR31]
-	mov	w0, 1
-	stp	x23, x24, [sp, 48]
-	mov	x23, x2
-	sub	w1, w1, w20
-	stp	x25, x26, [sp, 64]
-	lsl	w20, w0, w20
-	sub	w20, w20, #1
-	lsl	w19, w0, w1
-	adrp	x0, .LANCHOR18
-	lsr	w1, w21, w1
-	stp	x27, x28, [sp, 80]
-	and	w20, w20, w1
-	ldrb	w0, [x0, #:lo12:.LANCHOR18]
-	sub	w19, w19, #1
-	and	w20, w20, 255
-	and	w19, w19, w21
-	ubfx	x24, x21, 24, 2
-	cmp	w0, w20
-	bhi	.L1951
-	adrp	x1, .LANCHOR169
-	adrp	x0, .LC0
-	mov	w2, 1033
-	add	x1, x1, :lo12:.LANCHOR169
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1951:
-	adrp	x0, .LANCHOR30
-	add	x0, x0, :lo12:.LANCHOR30
-	ldrb	w25, [x0, w20, sxtw]
-	adrp	x0, .LANCHOR13
-	ldr	x4, [x0, #:lo12:.LANCHOR13]
-	mov	w0, w25
-	bl	nandc_cs
-	cbnz	w24, .L1952
-	mov	w0, w19
-	bl	slc_phy_page_address_calc
-	mov	w19, w0
-.L1952:
-	ubfiz	x0, x25, 8, 8
-	mov	w1, 5
-	add	x0, x4, x0
-	str	w1, [x0, 2056]
-	and	w1, w19, 255
-	str	wzr, [x0, 2052]
-	str	wzr, [x0, 2052]
-	str	w1, [x0, 2052]
-	lsr	w1, w19, 8
-	str	w1, [x0, 2052]
-	lsr	w1, w19, 16
-	str	w1, [x0, 2052]
-	mov	w1, 224
-	str	w1, [x0, 2056]
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
-	ldrb	w0, [x0, 12]
-	cmp	w0, 3
-	bne	.L1953
-	cbz	w24, .L1953
-	adrp	x0, .LANCHOR35
-	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbnz	w0, .L1953
-	sub	w0, w24, #1
-	add	w1, w19, w19, lsl 1
-	add	w0, w0, w1
-.L1980:
-	adrp	x20, .LANCHOR32
-	add	x28, x20, :lo12:.LANCHOR32
-	bl	nandc_set_seed
-	mov	x4, x23
-	mov	x3, x22
-	ldrb	w2, [x28, 9]
-	mov	w1, 0
-	mov	w0, w25
-	bl	nandc_xfer
+	and	w20, w0, 255
+	ldr	x0, [x22, #:lo12:.LANCHOR161]
+	adrp	x21, .LANCHOR163
+	and	w19, w1, 65535
+	str	x23, [sp, 48]
+	mov	w1, 165
+	bl	ftl_memset
+	ldr	x0, [x21, #:lo12:.LANCHOR163]
+	mov	w2, 8
+	mov	w1, 90
+	bl	ftl_memset
+	adrp	x0, .LANCHOR2
+	ldrh	w0, [x0, #:lo12:.LANCHOR2]
+	mul	w19, w0, w19
+	mov	w0, w20
+	mov	w1, w19
+	bl	flash_erase_block
 	cmn	w0, #1
-	bne	.L1955
-	adrp	x26, .LANCHOR48
-	ldrb	w27, [x26, #:lo12:.LANCHOR48]
-	cbz	w27, .L1956
-	ldrb	w4, [x28, 9]
-	mov	x3, x23
-	strb	wzr, [x26, #:lo12:.LANCHOR48]
-	mov	x2, x22
-	orr	w1, w19, w24, lsl 24
-	mov	w0, w25
-	bl	flash_read_page
-	strb	w27, [x26, #:lo12:.LANCHOR48]
-	cbnz	w24, .L1957
+	bne	.L1960
 .L1962:
-	adrp	x1, .LANCHOR0
-	ldrb	w1, [x1, #:lo12:.LANCHOR0]
-	cbz	w1, .L1957
-	adrp	x1, .LANCHOR46
-	ldrb	w1, [x1, #:lo12:.LANCHOR46]
-	add	w1, w1, w1, lsl 1
-	cmp	w0, w1, lsr 2
-	blt	.L1957
-	add	x20, x20, :lo12:.LANCHOR32
-	ldrb	w1, [x20, 19]
-	sub	w1, w1, #4
-	and	w1, w1, 255
-	cmp	w1, 4
-	mov	w1, 256
-	csel	w0, w0, w1, hi
-.L1950:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 96
+	mov	w21, -1
+.L1961:
+	mov	w1, w19
+	mov	w0, w20
+	bl	flash_erase_block
+	ldr	x23, [sp, 48]
+	mov	w0, w21
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
 	ret
-.L1953:
-	mov	w0, w19
-	b	.L1980
-.L1957:
+.L1960:
+	adrp	x23, .LANCHOR32
+	add	x23, x23, :lo12:.LANCHOR32
+	ldr	x3, [x21, #:lo12:.LANCHOR163]
+	mov	w1, w19
+	ldr	x2, [x22, #:lo12:.LANCHOR161]
+	mov	w0, w20
+	ldrb	w4, [x23, 9]
+	bl	flash_prog_page
 	cmn	w0, #1
-	bne	.L1950
-.L1963:
-	adrp	x0, .LANCHOR165
-	ldr	x5, [x0, #:lo12:.LANCHOR165]
-	cbnz	x5, .L1959
-.L1961:
-	adrp	x0, .LANCHOR48
-	mov	w3, -1
-	mov	w2, w21
-	mov	w1, 0
-	ldrb	w4, [x0, #:lo12:.LANCHOR48]
-	adrp	x0, .LC124
-	add	x0, x0, :lo12:.LC124
-	bl	printf
-	adrp	x0, .LANCHOR21
-	ldrb	w0, [x0, #:lo12:.LANCHOR21]
-	cbnz	w0, .L1960
-	mov	w0, -1
-	b	.L1950
-.L1959:
-	add	x0, x20, :lo12:.LANCHOR32
-	mov	x3, x23
-	mov	x2, x22
-	orr	w1, w19, w24, lsl 24
-	ldrb	w4, [x0, 9]
-	mov	w0, w25
-	blr	x5
+	beq	.L1962
+	ldrb	w4, [x23, 9]
+	mov	w1, w19
+	ldr	x3, [x21, #:lo12:.LANCHOR163]
+	mov	w0, w20
+	ldr	x2, [x22, #:lo12:.LANCHOR161]
+	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L1961
-	b	.L1950
-.L1960:
+	beq	.L1962
+	ldr	x0, [x22, #:lo12:.LANCHOR161]
+	ldr	w1, [x0]
+	mov	w0, 42405
+	movk	w0, 0xa5a5, lsl 16
+	cmp	w1, w0
+	bne	.L1962
+	ldr	x0, [x21, #:lo12:.LANCHOR163]
+	ldr	w1, [x0]
+	mov	w0, 23130
+	movk	w0, 0x5a5a, lsl 16
+	cmp	w1, w0
+	csetm	w21, ne
+	b	.L1961
+	.size	flash_test_blk, .-flash_test_blk
+	.section	.text.id_block_prog_msb_ff_data,"ax",@progbits
+	.align	2
+	.global	id_block_prog_msb_ff_data
+	.type	id_block_prog_msb_ff_data, %function
+id_block_prog_msb_ff_data:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	and	w22, w0, 255
+	adrp	x0, .LANCHOR19
+	stp	x19, x20, [sp, 16]
+	stp	x23, x24, [sp, 48]
+	ldrb	w0, [x0, #:lo12:.LANCHOR19]
+	str	x25, [sp, 64]
+	cbnz	w0, .L1970
+	adrp	x20, .LANCHOR32
 	add	x20, x20, :lo12:.LANCHOR32
-	orr	w1, w19, w24, lsl 24
-	mov	x3, x23
-	mov	x2, x22
-	mov	w0, w25
-	ldrb	w4, [x20, 9]
-	ldp	x21, x22, [sp, 32]
+	ldrb	w0, [x20, 19]
+	sub	w0, w0, #5
+	and	w3, w0, 255
+	cmp	w3, 63
+	bhi	.L1970
+	and	w19, w2, 65535
+	mov	x2, 16391
+	movk	x2, 0x4000, lsl 16
+	movk	x2, 0x8000, lsl 48
+	lsr	x0, x2, x3
+	tbz	x0, 0, .L1970
+	adrp	x21, .LANCHOR142
+	mov	w23, w1
+	add	x21, x21, :lo12:.LANCHOR142
+	mov	w25, 65535
+	adrp	x24, .LANCHOR161
+.L1972:
+	ldrh	w0, [x20, 10]
+	cmp	w0, w19
+	bhi	.L1973
+.L1970:
 	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 96
-	b	flash_ddr_tuning_read
-.L1955:
-	cbz	w24, .L1962
-	b	.L1950
-.L1956:
-	cbnz	w24, .L1963
-	b	.L1962
-	.size	flash_complete_page_read, .-flash_complete_page_read
-	.section	.text.queue_wait_first_req_completed,"ax",@progbits
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L1973:
+	ldrh	w0, [x21, w19, sxtw 1]
+	cmp	w0, w25
+	bne	.L1970
+	ldr	x0, [x24, #:lo12:.LANCHOR161]
+	mov	w2, 16384
+	mov	w1, 255
+	bl	ftl_memset
+	ldr	x3, [x24, #:lo12:.LANCHOR161]
+	add	w1, w19, w23
+	ldrb	w4, [x20, 9]
+	add	w19, w19, 1
+	mov	x2, x3
+	mov	w0, w22
+	and	w19, w19, 65535
+	bl	flash_prog_page
+	b	.L1972
+	.size	id_block_prog_msb_ff_data, .-id_block_prog_msb_ff_data
+	.section	.text.flash_dual_page_prog,"ax",@progbits
 	.align	2
-	.type	queue_wait_first_req_completed, %function
-queue_wait_first_req_completed:
-	stp	x29, x30, [sp, -96]!
-	adrp	x0, .LANCHOR56
+	.global	flash_dual_page_prog
+	.type	flash_dual_page_prog, %function
+flash_dual_page_prog:
+	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	ldrb	w0, [x0, #:lo12:.LANCHOR56]
 	stp	x21, x22, [sp, 32]
+	and	w21, w0, 255
+	adrp	x0, .LANCHOR13
+	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
-	cmp	w0, 255
+	and	x23, x21, 255
+	ldr	x19, [x0, #:lo12:.LANCHOR13]
+	add	x0, x23, 8
+	mov	w20, 24
+	stp	x27, x28, [sp, 80]
+	mov	x27, x2
 	stp	x25, x26, [sp, 64]
-	str	x27, [sp, 80]
-	bne	.L1982
-.L2015:
-	mov	w21, 0
-	b	.L1981
-.L1982:
-	adrp	x19, .LANCHOR52
-	sxtw	x20, w0
-	add	x1, x19, :lo12:.LANCHOR52
-	add	x1, x1, x20, lsl 6
-	ldrb	w2, [x1, 58]
-	ldr	w21, [x1, 40]
-	sub	w3, w2, #1
-	cmp	w3, 10
-	bhi	.L2015
-	adrp	x1, .L1985
-	add	x1, x1, :lo12:.L1985
-	ldrh	w1, [x1,w3,uxtw #1]
-	adr	x3, .Lrtx1985
-	add	x1, x3, w1, sxth #2
-	br	x1
-.Lrtx1985:
-	.section	.rodata.queue_wait_first_req_completed,"a",@progbits
-	.align	0
-	.align	2
-.L1985:
-	.2byte	(.L1984 - .Lrtx1985) / 4
-	.2byte	(.L1986 - .Lrtx1985) / 4
-	.2byte	(.L1987 - .Lrtx1985) / 4
-	.2byte	(.L1987 - .Lrtx1985) / 4
-	.2byte	(.L1987 - .Lrtx1985) / 4
-	.2byte	(.L1987 - .Lrtx1985) / 4
-	.2byte	(.L1988 - .Lrtx1985) / 4
-	.2byte	(.L1989 - .Lrtx1985) / 4
-	.2byte	(.L1990 - .Lrtx1985) / 4
-	.2byte	(.L1987 - .Lrtx1985) / 4
-	.2byte	(.L1990 - .Lrtx1985) / 4
-	.section	.text.queue_wait_first_req_completed
-.L1984:
-	mov	w1, 64
+	add	x0, x19, x0, lsl 8
+	str	x0, [x29, 120]
+	adrp	x0, .LANCHOR31
+	mov	w22, w1
+	mov	x28, x3
+	mov	x25, x4
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	mov	x26, x5
+	ubfx	x24, x22, 24, 2
+	sub	w0, w20, w0
+	mov	w20, 1
+	lsl	w20, w20, w0
+	adrp	x0, .LANCHOR14
+	str	x0, [x29, 112]
+	sub	w20, w20, #1
+	ldr	w2, [x0, #:lo12:.LANCHOR14]
+	and	w20, w20, w1
+	tbz	x2, 4, .L1976
+	adrp	x0, .LC123
+	mov	w3, w6
+	mov	w2, w24
+	add	x0, x0, :lo12:.LC123
+	bl	printf
+.L1976:
+	bl	nandc_wait_flash_ready
 	mov	w0, w21
-	bl	flash_wait_device_ready
-	tbz	x0, 6, .L2015
-	add	x0, x19, :lo12:.LANCHOR52
-	add	x0, x0, x20, lsl 6
-	ldp	x1, x2, [x0, 8]
-	cbz	x2, .L1992
-	ldrb	w3, [x0, 56]
-	adrp	x0, .LANCHOR125
-	ldrb	w0, [x0, #:lo12:.LANCHOR125]
-	cmp	w3, w0
-	csel	x1, x1, x2, ne
-.L1992:
-	add	x19, x19, :lo12:.LANCHOR52
+	bl	nandc_cs
 	mov	w0, w21
-	add	x20, x19, x20, lsl 6
-	ldr	x2, [x20, 24]
-	bl	flash_complete_page_read
-	str	w0, [x20, 52]
-	mov	w0, 13
-	strb	w0, [x20, 58]
-	ldrb	w0, [x20, 2]
-	orr	w0, w0, 8
-	strb	w0, [x20, 2]
-	b	.L2015
-.L1986:
-	mov	w1, 64
+	cbnz	w24, .L1977
+	bl	zftl_flash_enter_slc_mode
+.L1978:
+	add	x19, x19, x23, lsl 8
+	mov	w5, 128
+	and	w0, w20, 255
+	adrp	x23, .LANCHOR32
+	add	x23, x23, :lo12:.LANCHOR32
+	str	w5, [x29, 108]
+	str	w5, [x19, 2056]
+	mov	w24, 16
+	str	wzr, [x19, 2052]
+	str	wzr, [x19, 2052]
+	str	w0, [x19, 2052]
+	lsr	w0, w20, 8
+	str	w0, [x19, 2052]
+	lsr	w0, w20, 16
+	str	w0, [x19, 2052]
+	mov	w0, w20
+	bl	nandc_set_seed
+	ldrb	w2, [x23, 9]
+	mov	x4, x28
+	mov	x3, x27
+	mov	w1, 1
 	mov	w0, w21
-	bl	flash_wait_device_ready
-	tbz	x0, 6, .L2015
-	add	x0, x19, :lo12:.LANCHOR52
-	lsl	x2, x20, 6
-	add	x1, x0, x2
-	ldrb	w21, [x0, x2]
-	add	x0, x0, x21, lsl 6
-	ldr	x24, [x0, 8]
-	ldp	x26, x0, [x1, 8]
-	cbz	x0, .L1993
-	ldrb	w2, [x1, 56]
-	adrp	x1, .LANCHOR125
-	ldrb	w1, [x1, #:lo12:.LANCHOR125]
-	cmp	w2, w1
-	csel	x26, x26, x0, ne
-.L1993:
-	add	x0, x19, :lo12:.LANCHOR52
-	add	x0, x0, x21, lsl 6
-	ldr	x1, [x0, 16]
-	cbz	x1, .L1994
-	ldrb	w2, [x0, 56]
-	adrp	x0, .LANCHOR125
-	ldrb	w0, [x0, #:lo12:.LANCHOR125]
-	cmp	w2, w0
-	csel	x24, x24, x1, ne
-.L1994:
-	add	x22, x19, :lo12:.LANCHOR52
-	mov	x1, x26
-	add	x27, x22, x20, lsl 6
-	add	x22, x22, x21, lsl 6
-	ldr	x2, [x27, 24]
-	ldr	w0, [x27, 40]
-	bl	flash_complete_plane_page_read
-	mov	w23, w0
-	ldr	x2, [x22, 24]
-	mov	x1, x24
-	ldr	w0, [x22, 40]
-	bl	flash_complete_plane_page_read
-	mov	w25, w0
-	cmn	w23, #1
-	beq	.L1995
-	ldr	w0, [x27, 36]
-	cmn	w0, #1
-	beq	.L1996
-	ldr	x1, [x27, 24]
-	ldr	w1, [x1, 4]
-	cmp	w0, w1
-	beq	.L1996
-.L1995:
-	adrp	x0, .LANCHOR31
-	add	x22, x19, :lo12:.LANCHOR52
-	add	x22, x22, x20, lsl 6
-	mov	w5, 1
-	ldrb	w2, [x0, #:lo12:.LANCHOR31]
-	mov	w0, 24
-	sub	w0, w0, w2
-	ldr	x3, [x22, 24]
-	lsl	w5, w5, w2
-	adrp	x2, .LANCHOR125
-	sub	w5, w5, #1
-	ldr	w1, [x22, 40]
-	ldrb	w4, [x2, #:lo12:.LANCHOR125]
-	mov	x2, x26
-	lsl	w6, w5, w0
-	lsr	w0, w1, w0
-	bic	w1, w1, w6
-	and	w0, w0, w5
-	bl	flash_read_page_en
-	mov	w23, w0
-	ldr	w2, [x22, 36]
-	cmn	w2, #1
-	beq	.L1997
-	ldr	x0, [x22, 24]
-	ldr	w4, [x0, 4]
-	cmp	w2, w4
-	beq	.L1997
-	adrp	x1, .LANCHOR14
-	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 6, .L1997
-	ldr	w3, [x0]
-	adrp	x0, .LC125
-	ldr	w1, [x22, 40]
-	add	x0, x0, :lo12:.LC125
-	bl	printf
-.L1997:
-	add	x0, x19, :lo12:.LANCHOR52
-	add	x0, x0, x20, lsl 6
-	ldr	w1, [x0, 36]
-	cmn	w1, #1
-	beq	.L1996
-	ldr	x0, [x0, 24]
-	ldr	w0, [x0, 4]
-	cmp	w1, w0
-	beq	.L1996
-	adrp	x1, .LANCHOR170
-	adrp	x0, .LC0
-	mov	w2, 360
-	add	x1, x1, :lo12:.LANCHOR170
-	add	x0, x0, :lo12:.LC0
+	bl	nandc_xfer
+	str	w24, [x19, 2056]
+	bl	nandc_wait_flash_ready
+	ldr	w5, [x29, 108]
+	add	w0, w20, 1
+	str	w5, [x19, 2056]
+	and	w1, w0, 255
+	str	wzr, [x19, 2052]
+	str	wzr, [x19, 2052]
+	str	w1, [x19, 2052]
+	lsr	w1, w0, 8
+	str	w1, [x19, 2052]
+	lsr	w1, w0, 16
+	str	w1, [x19, 2052]
+	bl	nandc_set_seed
+	ldrb	w2, [x23, 9]
+	mov	x4, x26
+	mov	x3, x25
+	mov	w1, 1
+	mov	w0, w21
+	bl	nandc_xfer
+	str	w24, [x19, 2056]
+	bl	nandc_wait_flash_ready
+	ldr	x0, [x29, 120]
+	bl	flash_read_status
+	mov	w3, w0
+	bl	nandc_de_cs.constprop.31
+	and	w2, w3, 4
+	tbz	x3, 2, .L1975
+	ldr	x0, [x29, 112]
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L1980
+	adrp	x0, .LC124
+	mov	w1, w22
+	add	x0, x0, :lo12:.LC124
 	bl	printf
-.L1996:
-	add	x0, x19, :lo12:.LANCHOR52
-	mov	w1, 13
-	add	x20, x0, x20, lsl 6
-	cmn	w25, #1
-	strb	w1, [x20, 58]
-	ldrb	w1, [x20, 2]
-	str	w23, [x20, 52]
-	orr	w1, w1, 8
-	strb	w1, [x20, 2]
-	beq	.L1998
-	add	x0, x0, x21, lsl 6
-	ldr	w1, [x0, 36]
-	cmn	w1, #1
-	beq	.L2000
-	ldr	x0, [x0, 24]
-	ldr	w0, [x0, 4]
+.L1980:
+	mov	w2, -1
+.L1975:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, w2
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+.L1977:
+	bl	zftl_flash_exit_slc_mode
+	b	.L1978
+	.size	flash_dual_page_prog, .-flash_dual_page_prog
+	.section	.text.fw_flash_page_prog.constprop.28,"ax",@progbits
+	.align	2
+	.type	fw_flash_page_prog.constprop.28, %function
+fw_flash_page_prog.constprop.28:
+	stp	x29, x30, [sp, -64]!
+	adrp	x4, .LANCHOR32
+	add	x4, x4, :lo12:.LANCHOR32
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x20, x1
+	stp	x21, x22, [sp, 32]
+	mov	x21, x2
+	str	x23, [sp, 48]
+	ldrb	w19, [x4, 9]
+	udiv	w19, w0, w19
+	adrp	x0, .LANCHOR46
+	ldrb	w23, [x0, #:lo12:.LANCHOR46]
+	adrp	x0, .LANCHOR17
+	ldrb	w0, [x0, #:lo12:.LANCHOR17]
+	bl	nandc_bch_sel
+	ldrb	w0, [x4, 7]
+	cmp	w0, 9
+	bne	.L1989
+	adrp	x22, .LANCHOR161
+	mov	w2, 16384
+	mov	w1, 255
+	ldr	x0, [x22, #:lo12:.LANCHOR161]
+	bl	ftl_memset
+	ldr	x5, [x22, #:lo12:.LANCHOR161]
+	mov	w6, 4
+	mov	x3, x21
+	mov	x2, x20
+	mov	x4, x5
+	mov	w1, w19
+	mov	w0, 0
+	bl	flash_dual_page_prog
+.L1992:
+	mov	w4, w0
+	mov	w0, w23
+	bl	nandc_bch_sel
+	ldr	x23, [sp, 48]
+	mov	w0, w4
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+.L1989:
+	mov	w4, 4
+	mov	x3, x21
+	mov	x2, x20
+	mov	w1, w19
+	mov	w0, 0
+	bl	flash_prog_page
+	b	.L1992
+	.size	fw_flash_page_prog.constprop.28, .-fw_flash_page_prog.constprop.28
+	.section	.text.idb_write_data,"ax",@progbits
+	.align	2
+	.global	idb_write_data
+	.type	idb_write_data, %function
+idb_write_data:
+	stp	x29, x30, [sp, -272]!
+	cmp	w1, 64
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w19, w1
+	stp	x21, x22, [sp, 32]
+	mov	w20, w3
+	stp	x23, x24, [sp, 48]
+	adrp	x22, .LANCHOR140
+	stp	x25, x26, [sp, 64]
+	mov	x24, x2
+	stp	x27, x28, [sp, 80]
+	bne	.L1994
+	ldr	w1, [x2]
+	mov	w0, 35899
+	movk	w0, 0xfcdc, lsl 16
 	cmp	w1, w0
-	beq	.L2000
+	bne	.L1994
+	adrp	x21, .LANCHOR138
+	mov	w1, 1
+	strb	w1, [x22, #:lo12:.LANCHOR140]
+	ldr	x0, [x21, #:lo12:.LANCHOR138]
+	cbnz	x0, .L1995
+	mov	w0, 262144
+	bl	ftl_malloc
+	str	x0, [x21, #:lo12:.LANCHOR138]
+.L1995:
+	adrp	x0, .LANCHOR170
+	mov	w1, 64
+	str	w1, [x0, #:lo12:.LANCHOR170]
+.L1994:
+	ldrb	w0, [x22, #:lo12:.LANCHOR140]
+	cbz	w0, .L2061
+	adrp	x0, .LANCHOR138
+	mov	x23, x0
+	ldr	x21, [x0, #:lo12:.LANCHOR138]
+	cbz	x21, .L2061
+	add	w0, w19, w20
+	str	w0, [x29, 144]
+	cmp	w0, 63
+	bls	.L1997
+	cmp	w19, 575
+	bhi	.L1998
+	adrp	x21, .LANCHOR141
+	ldr	x0, [x21, #:lo12:.LANCHOR141]
+	cbz	x0, .L1999
+.L2002:
+	adrp	x1, .LANCHOR139
+	mov	w2, 1
+	ldr	x0, [x23, #:lo12:.LANCHOR138]
+	cmp	w19, 64
+	str	w2, [x1, #:lo12:.LANCHOR139]
+	bhi	.L2111
+	mov	w4, 64
+	sub	w4, w4, w19
+	sub	w2, w20, w4
+	ubfiz	x4, x4, 9, 25
+	lsl	w2, w2, 9
+	add	x1, x24, x4
+.L2117:
+	bl	ftl_memcpy
+.L2003:
+	adrp	x0, .LANCHOR170
+	ldr	w0, [x0, #:lo12:.LANCHOR170]
+	cmp	w19, w0
+	beq	.L2057
+	strb	wzr, [x22, #:lo12:.LANCHOR140]
+	b	.L2057
+.L1999:
+	mov	w0, 262144
+	bl	ftl_malloc
+	str	x0, [x21, #:lo12:.LANCHOR141]
+	cbnz	x0, .L2002
+	mov	w0, -1
+	b	.L1993
+.L2111:
+	mov	w2, 576
+	sub	w2, w2, w19
+	cmp	w20, w2
+	sub	w3, w19, #64
+	csel	w2, w20, w2, ls
+	ubfiz	x3, x3, 9, 25
+	lsl	w2, w2, 9
+	mov	x1, x24
+	add	x0, x0, x3
+	b	.L2117
+.L1997:
+	cmp	w19, 575
+	bls	.L2003
 .L1998:
-	adrp	x0, .LANCHOR31
-	add	x20, x19, :lo12:.LANCHOR52
-	add	x20, x20, x21, lsl 6
-	mov	w5, 1
-	ldrb	w2, [x0, #:lo12:.LANCHOR31]
-	mov	w0, 24
-	sub	w0, w0, w2
-	ldr	x3, [x20, 24]
-	lsl	w5, w5, w2
-	adrp	x2, .LANCHOR125
-	sub	w5, w5, #1
-	ldr	w1, [x20, 40]
-	ldrb	w4, [x2, #:lo12:.LANCHOR125]
-	mov	x2, x24
-	lsl	w6, w5, w0
-	lsr	w0, w1, w0
-	bic	w1, w1, w6
-	and	w0, w0, w5
-	bl	flash_read_page_en
-	ldr	w2, [x20, 36]
-	cmn	w2, #1
-	beq	.L2002
-	ldr	x0, [x20, 24]
-	ldr	w4, [x0, 4]
-	cmp	w2, w4
-	beq	.L2002
-	adrp	x1, .LANCHOR14
-	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 6, .L2002
-	ldr	w3, [x0]
+	adrp	x0, .LANCHOR139
+	ldr	w0, [x0, #:lo12:.LANCHOR139]
+	cbz	w0, .L2003
+	ldr	w1, [x21]
+	mov	w0, 35899
+	movk	w0, 0xfcdc, lsl 16
+	cmp	w1, w0
+	bne	.L2005
+	adrp	x0, .LANCHOR0
+	mov	x10, x0
+	ldrb	w1, [x0, #:lo12:.LANCHOR0]
+	str	w1, [x29, 176]
+	adrp	x1, .LANCHOR19
+	mov	x11, x1
+	ldr	w0, [x29, 176]
+	ldrb	w2, [x1, #:lo12:.LANCHOR19]
+	str	w2, [x29, 204]
+	cbz	w0, .L2006
+	ldrh	w0, [x29, 176]
+	str	w0, [x29, 172]
+	uxtw	x0, w2
+	cmp	w0, 0
+	cset	w0, eq
+.L2114:
+	adrp	x12, .LANCHOR32
+	add	x8, x12, :lo12:.LANCHOR32
+	str	w0, [x29, 200]
+	mov	w0, 0
+	ldrb	w22, [x8, 9]
+	ldrh	w19, [x8, 26]
+	bl	zftl_flash_exit_slc_mode
+	ldrh	w20, [x8, 10]
+	add	x1, x21, 258048
+	ldrb	w0, [x11, #:lo12:.LANCHOR19]
+	mov	w4, 16981
+	strb	w0, [x10, #:lo12:.LANCHOR0]
+	add	x1, x1, 2044
+	ldrb	w0, [x8, 12]
+	lsl	w20, w20, 2
+	mov	w2, 65023
+	movk	w4, 0x4f4f, lsl 16
+	mov	w3, 4098
+	str	x12, [x29, 120]
+	sdiv	w20, w20, w0
+	mov	w0, 512
+	cmp	w20, 512
+	csel	w20, w20, w0, lt
+	mov	w0, 0
+.L2013:
+	ldr	w5, [x1]
+	cbnz	w5, .L2009
+	cbnz	w0, .L2010
+	str	w4, [x1, 2048]
+.L2011:
+	add	w0, w0, 1
+	sub	w2, w2, #1
+	cmp	w0, w3
+	sub	x1, x1, #4
+	csel	w0, w0, wzr, ls
+	cmp	w2, 4096
+	bne	.L2013
+.L2009:
+	ldr	w1, [x21, w2, uxtw 2]
+	mul	w19, w19, w22
+	mov	w3, w20
 	adrp	x0, .LC125
-	ldr	w1, [x20, 40]
 	add	x0, x0, :lo12:.LC125
 	bl	printf
-.L2002:
-	add	x0, x19, :lo12:.LANCHOR52
-	add	x0, x0, x21, lsl 6
-	ldr	w1, [x0, 36]
-	cmn	w1, #1
-	beq	.L2000
-	ldr	x0, [x0, 24]
-	ldr	w0, [x0, 4]
-	cmp	w1, w0
-	beq	.L2000
-	adrp	x1, .LANCHOR170
-	adrp	x0, .LC0
-	mov	w2, 375
-	add	x1, x1, :lo12:.LANCHOR170
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2000:
-	add	x19, x19, :lo12:.LANCHOR52
-	mov	w0, 13
-	add	x21, x19, x21, lsl 6
-	strb	w0, [x21, 58]
-	ldrb	w0, [x21, 2]
-	str	w23, [x21, 52]
-	orr	w0, w0, 8
-	strb	w0, [x21, 2]
-	b	.L2015
-.L1987:
-	mov	w0, w21
-	mov	w1, 64
-	bl	flash_wait_device_ready
-	mov	w21, w0
-	tbz	x21, 6, .L2015
-	mov	w0, 5
-	tst	w21, w0
-	beq	.L2003
-	add	x19, x19, :lo12:.LANCHOR52
+	str	wzr, [x29, 180]
+	and	w0, w19, 65535
+	str	wzr, [x29, 192]
+	str	w0, [x29, 140]
+	adrp	x0, .LANCHOR48
+	add	x0, x0, :lo12:.LANCHOR48
+	str	x0, [x29, 184]
+.L2052:
+	adrp	x23, .LANCHOR141
+	mov	w1, 0
+	mov	w2, 512
+	ldr	x0, [x23, #:lo12:.LANCHOR141]
+	bl	ftl_memset
+	str	x23, [x29, 160]
+	adrp	x0, .LANCHOR27
+	ldr	w1, [x29, 192]
+	ldr	x0, [x0, #:lo12:.LANCHOR27]
+	add	x0, x0, x1, uxtw
+	ldrb	w19, [x0, 32]
+	cmp	w19, 255
+	beq	.L2014
+	ldr	w0, [x29, 140]
+	mul	w19, w19, w0
+	ldr	w0, [x29, 200]
+	cbz	w0, .L2015
+	and	w0, w1, -3
+	adrp	x10, .LANCHOR0
+	cmp	w0, 1
+	adrp	x8, .LANCHOR19
+	beq	.L2016
+	ldr	w0, [x29, 200]
+	cmp	w0, 3
+	bne	.L2017
+.L2016:
+	ldrb	w0, [x29, 172]
+	strb	w0, [x10, #:lo12:.LANCHOR0]
+	strb	w0, [x8, #:lo12:.LANCHOR19]
+.L2015:
+	ldr	x0, [x29, 120]
+	add	x27, x0, :lo12:.LANCHOR32
+	ldr	x0, [x29, 184]
+	ldrb	w24, [x27, 9]
+	ldrh	w25, [x27, 26]
+	ldrb	w0, [x0]
+	str	w0, [x29, 136]
+	udiv	w1, w19, w24
+	ldr	x0, [x29, 184]
+	mul	w25, w24, w25
+	and	w22, w25, 65535
+	strb	wzr, [x0]
+	mov	w0, 0
+	bl	flash_erase_block
+	udiv	w25, w19, w22
+	ldrb	w1, [x27, 12]
+	msub	w0, w25, w22, w19
+	str	w0, [x29, 168]
+	sub	w26, w19, w0
+	ldrh	w0, [x27, 10]
+	cmp	w19, w26
+	lsl	w0, w0, 2
+	sdiv	w0, w0, w1
+	str	w0, [x29, 156]
+	bne	.L2067
+	adrp	x0, .LANCHOR28
+	ldrb	w0, [x0, #:lo12:.LANCHOR28]
+	cmp	w0, 9
+	bne	.L2067
+	ldr	x0, [x29, 160]
+	mov	w2, 1024
+	mov	w1, 0
+	ldr	x25, [x0, #:lo12:.LANCHOR141]
+	mov	x0, x25
+	bl	ftl_memset
+	mov	w0, 18766
+	movk	w0, 0x464e, lsl 16
+	str	w0, [x25]
 	mov	w0, 12
-	add	x20, x19, x20, lsl 6
-	mov	w4, 12
-	mov	w2, w21
-	ldrb	w1, [x20, 1]
-	ldr	w3, [x20, 40]
-	strb	w0, [x20, 58]
-	adrp	x0, .LC126
-	add	x0, x0, :lo12:.LC126
-	bl	printf
-.L2079:
-	mov	w0, -1
-	str	w0, [x20, 52]
-	b	.L1981
-.L2003:
-	add	x21, x19, :lo12:.LANCHOR52
-	mov	w0, 13
-	add	x21, x21, x20, lsl 6
-	strb	w0, [x21, 58]
-	adrp	x0, .LANCHOR104
-	ldr	x0, [x0, #:lo12:.LANCHOR104]
-	ldr	w1, [x0, 156]
-	mov	w0, 20041
-	str	wzr, [x21, 52]
-	movk	w0, 0x444b, lsl 16
-	cmp	w1, w0
-	bne	.L2015
-	ldrh	w0, [x21, 50]
-	cbnz	w0, .L2015
-	adrp	x0, .LANCHOR31
-	mov	w5, 1
-	adrp	x22, .LANCHOR166
-	ldr	w1, [x21, 40]
-	ldrb	w2, [x0, #:lo12:.LANCHOR31]
-	mov	w0, 24
-	ldr	x3, [x22, #:lo12:.LANCHOR166]
-	sub	w0, w0, w2
-	lsl	w5, w5, w2
-	adrp	x2, .LANCHOR125
-	sub	w5, w5, #1
-	ldrb	w4, [x2, #:lo12:.LANCHOR125]
-	adrp	x2, .LANCHOR167
-	lsl	w6, w5, w0
-	ldr	x2, [x2, #:lo12:.LANCHOR167]
-	lsr	w0, w1, w0
-	bic	w1, w1, w6
-	and	w0, w0, w5
-	bl	flash_read_page_en
-	cmn	w0, #1
-	beq	.L2004
-	ldr	x1, [x22, #:lo12:.LANCHOR166]
-	ldr	x2, [x21, 24]
-	ldr	w1, [x1]
-	ldr	w2, [x2]
-	cmp	w2, w1
-	beq	.L2015
-.L2004:
-	add	x19, x19, :lo12:.LANCHOR52
+	str	w0, [x25, 4]
+	adrp	x0, .LANCHOR19
+	strb	wzr, [x25, 16]
+	str	wzr, [x25, 12]
+	ldrb	w0, [x0, #:lo12:.LANCHOR19]
+	cbz	w0, .L2019
+	ldrb	w0, [x27, 29]
+	strb	w0, [x25, 16]
+.L2019:
+	mov	w0, 4
+	strb	w0, [x25, 17]
+	adrp	x0, .LANCHOR32
+	add	x1, x0, :lo12:.LANCHOR32
+	cmp	w24, 8
+	strb	wzr, [x25, 20]
+	strh	wzr, [x25, 22]
+	ldrh	w0, [x1, 10]
+	ldrb	w1, [x1, 12]
+	sdiv	w0, w0, w1
+	mov	w1, 16
+	strh	w0, [x25, 18]
+	mov	w0, 70
+	csel	w0, w0, w1, hi
+	strb	w0, [x25, 21]
+	mov	w1, 12
+	add	x0, x25, 12
+	bl	js_hash
+	str	w0, [x25, 8]
+	sub	w0, w20, #4
+	str	w0, [x29, 196]
+.L2018:
+	adrp	x27, .LANCHOR3
+	adrp	x28, .LANCHOR19
+	mov	x23, x21
+	add	x27, x27, :lo12:.LANCHOR3
+	add	x28, x28, :lo12:.LANCHOR19
+	mov	w22, 0
+.L2021:
+	ldr	w0, [x29, 156]
+	cmp	w0, w22
+	bhi	.L2032
+	ldr	x0, [x29, 160]
+	mov	w24, 4
+	mov	w25, 0
+	mov	w28, 0
+	ldr	x23, [x0, #:lo12:.LANCHOR141]
+	adrp	x0, .LANCHOR32
+	add	x22, x0, :lo12:.LANCHOR32
+	ldrb	w0, [x22, 9]
+	str	w0, [x29, 152]
+	ldrh	w0, [x22, 26]
+	ldr	w1, [x29, 152]
+	mul	w0, w1, w0
 	adrp	x1, .LANCHOR48
-	add	x20, x19, x20, lsl 6
-	mov	w3, w0
-	ldrb	w4, [x1, #:lo12:.LANCHOR48]
-	adrp	x0, .LC127
-	add	x0, x0, :lo12:.LC127
-	ldrb	w1, [x20, 1]
-	ldr	w2, [x20, 40]
-	bl	printf
-	mov	w0, -1
-	str	w0, [x20, 52]
-	b	.L2015
-.L1990:
-	cmp	w2, 11
-	mov	w1, 3
-	mov	w5, 10
-	csel	w5, w5, w1, eq
-	adrp	x1, .LANCHOR31
-	mov	w4, 24
-	mov	w2, 1
-	add	x22, x19, :lo12:.LANCHOR52
-	ldrb	w3, [x1, #:lo12:.LANCHOR31]
-	ubfiz	x0, x0, 6, 8
-	add	x0, x22, x0
-	mov	x24, x1
-	sub	w4, w4, w3
-	lsl	w2, w2, w3
-	sub	w2, w2, #1
-	lsr	w3, w21, w4
-	and	w3, w3, w2
-	and	w3, w3, 65535
+	and	w0, w0, 65535
+	strb	wzr, [x1, #:lo12:.LANCHOR48]
+	udiv	w1, w19, w0
+	msub	w0, w1, w0, w19
+	str	w0, [x29, 168]
+	sub	w0, w19, w0
+	str	w0, [x29, 148]
+	ldr	w0, [x29, 168]
+	and	w0, w0, 3
+	str	w0, [x29, 160]
+	ldr	w0, [x29, 196]
+	str	w0, [x29, 156]
+	adrp	x0, .LANCHOR3
+	add	x0, x0, :lo12:.LANCHOR3
+	str	x0, [x29, 104]
+.L2033:
+	ldr	w0, [x29, 156]
+	cmp	w25, w0
+	bcc	.L2047
+	ldr	x0, [x29, 184]
+	ldrb	w1, [x29, 136]
+	strb	w1, [x0]
+	ldr	w0, [x29, 200]
+	cbz	w0, .L2048
+	mov	w0, 0
+	bl	zftl_flash_exit_slc_mode
+	adrp	x0, .LANCHOR0
+	strb	wzr, [x0, #:lo12:.LANCHOR0]
+	adrp	x0, .LANCHOR19
+	strb	wzr, [x0, #:lo12:.LANCHOR19]
+.L2048:
+	ldr	w0, [x29, 196]
+	mov	x2, 0
+	lsl	w1, w0, 7
+	adrp	x0, .LANCHOR141
+	ldr	x0, [x0, #:lo12:.LANCHOR141]
+.L2049:
+	mov	w22, w2
+	cmp	w2, w1
+	bcc	.L2050
+	ldr	w0, [x29, 180]
+	add	w0, w0, 1
+	str	w0, [x29, 180]
+	cmp	w0, 5
+	bls	.L2014
+	b	.L2059
 .L2006:
-	ldrb	w1, [x0]
-	cmp	w1, 255
-	bne	.L2013
-	mov	w21, -1
-	b	.L1981
-.L2013:
-	sxtw	x23, w1
-	ubfiz	x0, x1, 6, 8
-	add	x1, x22, x23, lsl 6
-	add	x0, x22, x0
-	ldrb	w6, [x1, 58]
-	cmp	w6, w5
-	bne	.L2006
-	ldr	w1, [x1, 40]
-	lsr	w1, w1, w4
-	and	w1, w1, w2
-	cmp	w3, w1
-	bne	.L2006
-	mov	w0, w21
-	mov	w1, 64
-	bl	flash_wait_device_ready
-	mov	w21, w0
-	tbnz	x21, 6, .L2008
-.L2078:
-	mov	w21, 0
-	b	.L2009
-.L2008:
-	tst	x21, 15
-	beq	.L2010
-	add	x22, x22, x20, lsl 6
-	mov	w2, w0
-	mov	w4, 12
-	adrp	x0, .LC128
-	add	x0, x0, :lo12:.LC128
-	ldrb	w1, [x22, 1]
-	ldr	w3, [x22, 40]
-	bl	printf
-	mov	w0, 12
-	strb	w0, [x22, 58]
-	mov	w0, -1
-	str	w0, [x22, 52]
-.L2009:
-	add	x1, x19, :lo12:.LANCHOR52
-	add	x20, x1, x20, lsl 6
-	add	x1, x1, x23, lsl 6
-	ldrb	w0, [x20, 58]
-	strb	w0, [x1, 58]
-	ldr	w0, [x20, 52]
-	str	w0, [x1, 52]
-.L1981:
-	mov	w0, w21
-	ldr	x27, [sp, 80]
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 96
-	ret
-.L2010:
-	add	x21, x22, x20, lsl 6
-	mov	w0, 13
-	strb	w0, [x21, 58]
-	adrp	x0, .LANCHOR104
-	ldr	x0, [x0, #:lo12:.LANCHOR104]
-	ldr	w1, [x0, 156]
-	mov	w0, 20041
-	str	wzr, [x21, 52]
-	movk	w0, 0x444b, lsl 16
-	cmp	w1, w0
-	bne	.L2078
-	ldrh	w0, [x21, 50]
-	cbnz	w0, .L2078
-	ldrb	w2, [x24, #:lo12:.LANCHOR31]
-	mov	w5, 1
-	mov	w0, 24
-	adrp	x22, .LANCHOR166
-	sub	w0, w0, w2
-	ldr	w1, [x21, 40]
-	lsl	w5, w5, w2
-	adrp	x2, .LANCHOR125
-	sub	w5, w5, #1
-	ldr	x3, [x22, #:lo12:.LANCHOR166]
-	ldrb	w4, [x2, #:lo12:.LANCHOR125]
-	adrp	x2, .LANCHOR167
-	lsl	w6, w5, w0
-	ldr	x2, [x2, #:lo12:.LANCHOR167]
-	lsr	w0, w1, w0
-	bic	w1, w1, w6
-	and	w0, w0, w5
-	bl	flash_read_page_en
-	cmn	w0, #1
-	beq	.L2012
-	ldr	x1, [x22, #:lo12:.LANCHOR166]
-	ldr	x2, [x21, 24]
-	ldr	w1, [x1]
-	ldr	w2, [x2]
-	cmp	w2, w1
-	beq	.L2078
-.L2012:
-	add	x21, x19, :lo12:.LANCHOR52
-	adrp	x1, .LANCHOR48
-	add	x21, x21, x20, lsl 6
-	mov	w3, w0
-	ldrb	w4, [x1, #:lo12:.LANCHOR48]
-	adrp	x0, .LC129
-	add	x0, x0, :lo12:.LC129
-	ldrb	w1, [x21, 1]
-	ldr	w2, [x21, 40]
-	bl	printf
-	mov	w0, -1
-	str	w0, [x21, 52]
-	b	.L2078
-.L1988:
-	mov	w0, w21
-	mov	w1, 32
-	bl	flash_wait_device_ready
-	mov	w21, w0
-	tbz	x21, 5, .L2015
-	add	x19, x19, :lo12:.LANCHOR52
-	tst	x21, 15
-	add	x20, x19, x20, lsl 6
-	beq	.L2014
-	mov	w0, 12
-	strb	w0, [x20, 58]
-	b	.L2079
-.L2014:
-	mov	w0, 13
-	str	wzr, [x20, 52]
-	strb	w0, [x20, 58]
-	b	.L2015
-.L1989:
-	mov	w1, 64
-	mov	w0, w21
-	bl	flash_wait_device_ready
-	tbz	x0, 6, .L2015
-	add	x19, x19, :lo12:.LANCHOR52
-	add	x19, x19, x20, lsl 6
-	str	w0, [x19, 52]
-	mov	w0, 7
-	strb	w0, [x19, 58]
-	b	.L2015
-	.size	queue_wait_first_req_completed, .-queue_wait_first_req_completed
-	.section	.text.sblk_wait_write_queue_completed,"ax",@progbits
-	.align	2
-	.global	sblk_wait_write_queue_completed
-	.type	sblk_wait_write_queue_completed, %function
-sblk_wait_write_queue_completed:
-	stp	x29, x30, [sp, -32]!
-	add	x29, sp, 0
-	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR56
-	add	x19, x19, :lo12:.LANCHOR56
-.L2081:
-	ldrb	w0, [x19]
-	cmp	w0, 255
-	bne	.L2082
-	ldr	x19, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	ret
-.L2082:
-	bl	queue_wait_first_req_completed
-	bl	queue_remove_completed_req
-	b	.L2081
-	.size	sblk_wait_write_queue_completed, .-sblk_wait_write_queue_completed
-	.section	.text.ftl_read_page,"ax",@progbits
-	.align	2
-	.global	ftl_read_page
-	.type	ftl_read_page, %function
-ftl_read_page:
-	stp	x29, x30, [sp, -64]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	and	w19, w0, 255
-	stp	x21, x22, [sp, 32]
-	mov	w20, w1
-	mov	x21, x2
-	mov	x22, x3
-	str	x23, [sp, 48]
-	mov	w23, w4
-	bl	sblk_wait_write_queue_completed
-	mov	w4, w23
-	mov	x3, x22
-	mov	x2, x21
-	mov	w1, w20
-	mov	w0, w19
-	ldr	x23, [sp, 48]
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 64
-	b	flash_read_page_en
-	.size	ftl_read_page, .-ftl_read_page
-	.section	.text.ftl_read_ppa_page,"ax",@progbits
-	.align	2
-	.global	ftl_read_ppa_page
-	.type	ftl_read_ppa_page, %function
-ftl_read_ppa_page:
-	stp	x29, x30, [sp, -64]!
-	mov	w5, 1
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	w20, w0
-	adrp	x0, .LANCHOR31
-	mov	w19, 24
-	stp	x21, x22, [sp, 32]
-	mov	x21, x1
-	ldrb	w0, [x0, #:lo12:.LANCHOR31]
-	mov	x22, x2
-	str	x23, [sp, 48]
-	mov	w23, w3
-	sub	w19, w19, w0
-	lsl	w5, w5, w0
-	sub	w5, w5, #1
-	lsr	w19, w20, w19
-	and	w19, w19, w5
-	and	w19, w19, 255
-	bl	sblk_wait_write_queue_completed
-	mov	w4, w23
-	mov	x3, x22
-	mov	x2, x21
-	mov	w1, w20
-	mov	w0, w19
-	ldr	x23, [sp, 48]
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 64
-	b	flash_read_page_en
-	.size	ftl_read_ppa_page, .-ftl_read_ppa_page
-	.section	.text.sblk_read_page,"ax",@progbits
-	.align	2
-	.global	sblk_read_page
-	.type	sblk_read_page, %function
-sblk_read_page:
-	stp	x29, x30, [sp, -128]!
-	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	and	w22, w1, 255
-	stp	x27, x28, [sp, 80]
-	mov	w21, w22
-	stp	x19, x20, [sp, 16]
-	adrp	x27, .LANCHOR31
-	stp	x23, x24, [sp, 48]
-	mov	x19, x0
-	stp	x25, x26, [sp, 64]
-	mov	x23, x0
-	adrp	x25, .LANCHOR171
-	add	x28, x27, :lo12:.LANCHOR31
-	add	x25, x25, :lo12:.LANCHOR171
-.L2089:
-	cbnz	w21, .L2099
-.L2112:
-	adrp	x19, .LANCHOR52
-	add	x19, x19, :lo12:.LANCHOR52
-.L2100:
-	cbnz	w22, .L2102
-	ldp	x19, x20, [sp, 16]
-	mov	w0, 0
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 128
-	ret
-.L2099:
-	ldrb	w24, [x19]
-	ldr	w26, [x19, 40]
-.L2090:
-	mov	w1, 0
-	mov	w0, w26
-	bl	queue_lun_state
-	cbnz	w0, .L2091
-	cmp	w21, 1
-	beq	.L2096
-	ldrb	w0, [x25]
-	cbnz	w0, .L2093
-.L2096:
-	mov	x0, x19
-	bl	queue_read_cmd
-	b	.L2094
-.L2091:
-	bl	queue_wait_first_req_completed
-	bl	queue_remove_completed_req
-	b	.L2090
-.L2093:
-	ldrb	w1, [x27, #:lo12:.LANCHOR31]
-	mov	w20, 24
-	mov	w0, 1
-	sub	w20, w20, w1
-	lsl	w0, w0, w1
-	sub	w0, w0, #1
-	lsr	w20, w26, w20
-	and	w20, w20, w0
-	ldrb	w0, [x19]
-	and	w20, w20, 65535
-	cmp	w0, 255
-	bne	.L2095
-	adrp	x1, .LANCHOR172
-	adrp	x0, .LC0
-	mov	w2, 661
-	add	x1, x1, :lo12:.LANCHOR172
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2095:
-	ldrb	w4, [x19]
-	adrp	x2, .LANCHOR52
-	add	x2, x2, :lo12:.LANCHOR52
-	ldrb	w7, [x28]
-	mov	w0, 24
-	mov	w3, 1
-	sbfiz	x5, x4, 6, 32
-	sub	w0, w0, w7
-	add	x6, x2, x5
-	lsl	w3, w3, w7
-	sub	w3, w3, #1
-	ldr	w1, [x6, 40]
-	lsr	w0, w1, w0
-	and	w0, w0, w3
-	cmp	w20, w0, uxth
-	bne	.L2096
-	adrp	x0, .LANCHOR105
-	ldrh	w0, [x0, #:lo12:.LANCHOR105]
-	add	w26, w0, w26
-	cmp	w1, w26
-	bne	.L2096
-	ldr	w0, [x19, 40]
-	mov	w26, -1
-	ldrb	w24, [x2, x5]
-	adrp	x20, .LANCHOR56
-	stp	x6, x5, [x29, 96]
-	add	x20, x20, :lo12:.LANCHOR56
-	str	x2, [x29, 112]
-	sub	w21, w21, #1
-	str	w4, [x29, 120]
-	bl	flash_start_plane_read
-	mov	w3, 2
-	strb	wzr, [x19, 59]
-	strb	w3, [x19, 58]
-	mov	x1, x19
-	strb	w26, [x19]
-	mov	x0, x20
-	str	w3, [x29, 124]
-	bl	buf_add_tail
-	ldp	x6, x5, [x29, 96]
-	strb	wzr, [x6, 59]
-	ldr	x2, [x29, 112]
-	mov	x0, x20
-	ldp	w4, w3, [x29, 120]
-	strb	w3, [x6, 58]
-	strb	w26, [x2, x5]
-	ubfiz	x1, x4, 6, 8
-	add	x1, x2, x1
-	bl	buf_add_tail
-.L2094:
-	subs	w21, w21, #1
-	beq	.L2112
-	ubfiz	x24, x24, 6, 8
-	adrp	x19, .LANCHOR52
-	add	x19, x19, :lo12:.LANCHOR52
-	add	x19, x19, x24
-	b	.L2089
-.L2102:
-	ldrb	w0, [x23, 58]
-	cmp	w0, 13
-	bne	.L2101
-	ldrb	w0, [x23]
-	sub	w22, w22, #1
-	cmp	w0, 255
-	beq	.L2101
-	ubfiz	x23, x0, 6, 8
-	add	x23, x19, x23
-.L2101:
-	bl	queue_wait_first_req_completed
-	bl	queue_remove_completed_req
-	b	.L2100
-	.size	sblk_read_page, .-sblk_read_page
-	.section	.text.flash_prog_page,"ax",@progbits
-	.align	2
-	.global	flash_prog_page
-	.type	flash_prog_page, %function
-flash_prog_page:
-	stp	x29, x30, [sp, -96]!
-	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	and	w21, w0, 255
-	adrp	x0, .LANCHOR13
-	stp	x25, x26, [sp, 64]
-	stp	x19, x20, [sp, 16]
-	mov	w20, 24
-	ldr	x26, [x0, #:lo12:.LANCHOR13]
-	adrp	x0, .LANCHOR31
-	stp	x23, x24, [sp, 48]
-	mov	w22, w1
-	ldrb	w0, [x0, #:lo12:.LANCHOR31]
-	and	x19, x21, 255
-	str	x27, [sp, 80]
-	add	x23, x19, 8
-	sub	w0, w20, w0
-	mov	w20, 1
-	mov	x24, x2
-	mov	x25, x3
-	lsl	w20, w20, w0
-	adrp	x0, .LANCHOR14
-	sub	w20, w20, #1
-	add	x23, x26, x23, lsl 8
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	and	w20, w20, w1
-	ubfx	x27, x22, 24, 2
-	tbz	x0, 4, .L2115
-	adrp	x0, .LC130
-	mov	w3, w4
-	mov	w2, w27
-	add	x0, x0, :lo12:.LC130
-	bl	printf
-.L2115:
-	bl	nandc_wait_flash_ready
-	mov	w0, w21
-	bl	hynix_reconfig_rr_para
-	mov	w0, w21
-	bl	nandc_cs
-	mov	w0, w21
-	cbnz	w27, .L2116
-	bl	zftl_flash_enter_slc_mode
-.L2117:
-	add	x19, x26, x19, lsl 8
-	mov	w0, 128
-	str	w0, [x19, 2056]
-	and	w0, w20, 255
-	str	wzr, [x19, 2052]
-	str	wzr, [x19, 2052]
-	str	w0, [x19, 2052]
-	lsr	w0, w20, 8
-	str	w0, [x19, 2052]
-	lsr	w0, w20, 16
-	str	w0, [x19, 2052]
-	mov	w0, w20
-	bl	nandc_set_seed
+	ldr	w0, [x29, 204]
+	cmp	w0, 3
+	beq	.L2063
+	cmp	w0, 2
+	mov	w0, 2
+	csel	w0, wzr, w0, ne
+	str	w0, [x29, 172]
+	ldr	w0, [x29, 204]
+	cmp	w0, 2
+	mov	w0, 3
+	csel	w0, wzr, w0, ne
+	b	.L2114
+.L2063:
+	ldr	w0, [x29, 204]
+	str	w0, [x29, 172]
+	mov	w0, 2
+	b	.L2114
+.L2010:
+	ldr	w5, [x21, w0, uxtw 2]
+	str	w5, [x1, 2048]
+	b	.L2011
+.L2017:
+	mov	w0, 0
+	bl	zftl_flash_exit_slc_mode
+	strb	wzr, [x10, #:lo12:.LANCHOR0]
+	strb	wzr, [x8, #:lo12:.LANCHOR19]
+	b	.L2015
+.L2067:
+	mov	x25, 0
+	str	w20, [x29, 196]
+	b	.L2018
+.L2032:
+	ldr	w0, [x29, 168]
+	ldrb	w2, [x28]
+	add	w4, w0, w22
+	lsr	w4, w4, 2
+	add	w1, w4, 1
+	ldrh	w0, [x27, w1, sxtw 1]
+	cbz	w2, .L2023
+	adrp	x0, .LANCHOR1
+	ldrb	w7, [x0, #:lo12:.LANCHOR1]
+	lsl	w0, w1, 1
+	cmp	w7, 0
+	csel	w0, w0, w1, ne
+.L2023:
+	adrp	x1, .LANCHOR28
+	ldrb	w1, [x1, #:lo12:.LANCHOR28]
+	cmp	w1, 9
+	bne	.L2025
+.L2115:
+	str	w0, [x29, 208]
+	mov	w0, 61424
+	str	w0, [x29, 212]
+	ldrh	w0, [x27, w4, sxtw 1]
+	cbnz	w2, .L2027
+	mov	w4, w0
+.L2028:
+	mul	w0, w24, w4
+	cbnz	x25, .L2029
+	str	w4, [x29, 152]
+	add	x2, x29, 208
+	mov	x1, x23
+	add	w0, w0, w26
+	bl	fw_flash_page_prog.constprop.28
+	ldrb	w0, [x28]
+	ldr	w4, [x29, 152]
+	cbnz	w0, .L2030
+	udiv	w1, w26, w24
+	add	w2, w4, 1
+	bl	id_block_prog_msb_ff_data
+.L2030:
+	ldr	w0, [x29, 196]
+	add	x23, x23, 2048
+	add	w0, w0, 16
+	cmp	w22, w0
+	bcc	.L2031
+	ldr	w0, [x29, 196]
+	add	w1, w0, 20
+	add	x0, x21, 2048
+	cmp	w22, w1
+	csel	x23, x0, x23, cc
+.L2031:
+	add	w5, w22, 4
+	mov	x25, 0
+	and	w22, w5, 65535
+	b	.L2021
+.L2025:
+	sub	w0, w0, #1
+	lsl	w0, w0, 2
+	b	.L2115
+.L2027:
+	adrp	x0, .LANCHOR1
+	ldrb	w1, [x0, #:lo12:.LANCHOR1]
+	lsl	w0, w4, 1
+	cmp	w1, 0
+	csel	w4, w0, w4, ne
+	b	.L2028
+.L2029:
+	add	x2, x29, 208
+	mov	x1, x25
+	add	w0, w0, w26
+	bl	fw_flash_page_prog.constprop.28
+	b	.L2031
+.L2047:
+	ldr	w0, [x29, 160]
+	adrp	x1, .LANCHOR19
+	sub	w27, w24, w0
+	ldr	w0, [x29, 168]
+	ldrb	w1, [x1, #:lo12:.LANCHOR19]
+	and	w27, w27, 65535
+	add	w22, w0, w25
+	ldr	x0, [x29, 104]
+	udiv	w22, w22, w24
+	and	w22, w22, 65535
+	ldrh	w0, [x0, w22, sxtw 1]
+	cbnz	w1, .L2034
+	mov	w22, w0
+.L2035:
+	adrp	x0, .LANCHOR17
+	ldr	w1, [x29, 148]
+	ldrb	w26, [x0, #:lo12:.LANCHOR17]
+	ldr	w0, [x29, 160]
+	add	w0, w0, w1
+	ldr	w1, [x29, 152]
+	madd	w22, w1, w22, w0
 	adrp	x0, .LANCHOR32+9
-	mov	x3, x25
-	mov	x2, x24
-	ldrb	w1, [x0, #:lo12:.LANCHOR32+9]
-	mov	w0, 1
-	bl	nandc_xfer_start
-	bl	nandc_xfer_done
-	mov	x0, 200
-	bl	udelay
-	mov	w0, 16
-	str	w0, [x19, 2056]
-	bl	nandc_wait_flash_ready
-	mov	x0, x23
-	bl	flash_read_status
-	mov	w2, w0
-	bl	nandc_de_cs.constprop.30
-	and	w19, w2, 4
-	tbz	x2, 2, .L2114
-	adrp	x0, .LC131
-	mov	w2, w19
+	ldrb	w0, [x0, #:lo12:.LANCHOR32+9]
+	udiv	w22, w22, w0
+	adrp	x0, .LANCHOR46
+	ldrb	w0, [x0, #:lo12:.LANCHOR46]
+	str	w0, [x29, 132]
+	mov	w0, w26
+	bl	nandc_bch_sel
+	adrp	x0, .LANCHOR21
+	add	x0, x0, :lo12:.LANCHOR21
+	str	x0, [x29, 112]
+.L2036:
+	mov	w4, w24
+	add	x3, x29, 208
+	mov	x2, x23
 	mov	w1, w22
-	add	x0, x0, :lo12:.LC131
-	bl	printf
-.L2114:
-	mov	w0, w19
-	ldr	x27, [sp, 80]
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 96
-	ret
+	mov	w0, 0
+	bl	flash_read_page
+	mov	w5, w0
+	cmn	w0, #1
+	bne	.L2037
+	ldr	x0, [x29, 184]
+	ldrb	w6, [x0]
+	cbnz	w6, .L2038
+.L2041:
+	adrp	x0, .LANCHOR167
+	ldr	x6, [x0, #:lo12:.LANCHOR167]
+	cbnz	x6, .L2039
+.L2040:
+	ldr	x0, [x29, 112]
+	ldrb	w0, [x0]
+	cbz	w0, .L2037
+	mov	w4, w24
+	add	x3, x29, 208
+	mov	x2, x23
+	mov	w1, w22
+	mov	w0, 0
+	bl	flash_ddr_tuning_read
+	b	.L2116
+.L2034:
+	adrp	x0, .LANCHOR1
+	ldrb	w1, [x0, #:lo12:.LANCHOR1]
+	lsl	w0, w22, 1
+	cmp	w1, 0
+	csel	w22, w0, w22, ne
+	b	.L2035
+.L2038:
+	ldr	x0, [x29, 184]
+	mov	w1, w22
+	str	w6, [x29, 100]
+	mov	w4, w24
+	str	w5, [x29, 128]
+	add	x3, x29, 208
+	mov	x2, x23
+	strb	wzr, [x0]
+	mov	w0, 0
+	bl	flash_read_page
+	cmn	w0, #1
+	ldr	x1, [x29, 184]
+	ldr	w6, [x29, 100]
+	ldr	w5, [x29, 128]
+	strb	w6, [x1]
+	beq	.L2041
 .L2116:
-	bl	zftl_flash_exit_slc_mode
-	b	.L2117
-	.size	flash_prog_page, .-flash_prog_page
-	.section	.text.flash_test_blk,"ax",@progbits
-	.align	2
-	.global	flash_test_blk
-	.type	flash_test_blk, %function
-flash_test_blk:
-	stp	x29, x30, [sp, -64]!
-	mov	w2, 32
-	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR159
-	stp	x19, x20, [sp, 16]
-	and	w20, w0, 255
-	ldr	x0, [x22, #:lo12:.LANCHOR159]
-	adrp	x21, .LANCHOR161
-	and	w19, w1, 65535
-	str	x23, [sp, 48]
-	mov	w1, 165
-	bl	ftl_memset
-	ldr	x0, [x21, #:lo12:.LANCHOR161]
-	mov	w2, 8
-	mov	w1, 90
-	bl	ftl_memset
-	adrp	x0, .LANCHOR2
-	ldrh	w0, [x0, #:lo12:.LANCHOR2]
-	mul	w19, w0, w19
-	mov	w0, w20
-	mov	w1, w19
-	bl	flash_erase_block
+	mov	w5, w0
+.L2037:
+	cmn	w5, #1
+	cset	w4, eq
+	cmp	w26, 16
+	cset	w0, ne
+	tst	w4, w0
+	beq	.L2043
+	mov	w0, 16
+	mov	w26, 16
+	bl	nandc_bch_sel
+	b	.L2036
+.L2039:
+	str	w5, [x29, 128]
+	mov	w4, w24
+	add	x3, x29, 208
+	mov	x2, x23
+	mov	w1, w22
+	mov	w0, 0
+	blr	x6
 	cmn	w0, #1
-	bne	.L2127
-.L2129:
-	mov	w21, -1
-.L2128:
+	ldr	w5, [x29, 128]
+	beq	.L2040
+	b	.L2116
+.L2043:
+	ldr	w0, [x29, 132]
+	bl	nandc_bch_sel
+	cmp	w4, 0
+	ldr	w0, [x29, 148]
+	csinv	w28, w28, wzr, eq
+	cmp	w25, 0
+	ccmp	w19, w0, 0, eq
+	bne	.L2045
+	cbnz	w28, .L2045
+	ldr	w1, [x23]
+	mov	w0, 18766
+	movk	w0, 0x464e, lsl 16
+	cmp	w1, w0
+	bne	.L2045
+	ldr	w0, [x29, 156]
+	ldrb	w24, [x23, 17]
+	add	w0, w0, w27
+	str	w0, [x29, 156]
+.L2046:
+	add	w25, w27, w25
+	and	w25, w25, 65535
+	b	.L2033
+.L2045:
+	ubfiz	x0, x27, 9, 16
+	str	wzr, [x29, 160]
+	add	x23, x23, x0
+	b	.L2046
+.L2050:
+	ldr	w4, [x0, x2, lsl 2]
+	add	x2, x2, 1
+	add	x3, x21, x2, lsl 2
+	ldr	w3, [x3, -4]
+	cmp	w4, w3
+	beq	.L2049
+	mov	w2, 512
+	mov	w1, 0
+	bl	ftl_memset
+	mov	w1, w22
+	adrp	x0, .LC126
+	add	x0, x0, :lo12:.LC126
+	bl	printf
 	mov	w1, w19
-	mov	w0, w20
+	mov	w0, 0
 	bl	flash_erase_block
-	ldr	x23, [sp, 48]
-	mov	w0, w21
+.L2014:
+	ldr	w0, [x29, 192]
+	add	w0, w0, 1
+	str	w0, [x29, 192]
+	cmp	w0, 4
+	bne	.L2052
+.L2059:
+	mov	w0, 0
+	bl	zftl_flash_exit_slc_mode
+	adrp	x0, .LANCHOR0
+	ldrb	w1, [x29, 176]
+	strb	w1, [x0, #:lo12:.LANCHOR0]
+	ldr	w0, [x29, 200]
+	cbz	w0, .L2053
+	adrp	x0, .LANCHOR19
+	ldrb	w1, [x29, 204]
+	strb	w1, [x0, #:lo12:.LANCHOR19]
+.L2053:
+	mov	w1, 2
+	adrp	x0, .LANCHOR33
+	strb	w1, [x0, #:lo12:.LANCHOR33]
+	mov	w0, 0
+	bl	zftl_flash_enter_slc_mode
+	ldr	w0, [x29, 180]
+	cbnz	w0, .L2005
+	adrp	x0, .LC127
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC127
+	bl	printf
+.L2005:
+	adrp	x0, .LANCHOR139
+	adrp	x19, .LANCHOR138
+	str	wzr, [x0, #:lo12:.LANCHOR139]
+	adrp	x0, .LANCHOR140
+	strb	wzr, [x0, #:lo12:.LANCHOR140]
+	ldr	x0, [x19, #:lo12:.LANCHOR138]
+	cbz	x0, .L2055
+	bl	free
+	str	xzr, [x19, #:lo12:.LANCHOR138]
+.L2055:
+	adrp	x19, .LANCHOR141
+	ldr	x0, [x19, #:lo12:.LANCHOR141]
+	cbz	x0, .L2057
+	bl	free
+	str	xzr, [x19, #:lo12:.LANCHOR141]
+.L2057:
+	adrp	x0, .LANCHOR170
+	ldr	w1, [x29, 144]
+	str	w1, [x0, #:lo12:.LANCHOR170]
+.L2061:
+	mov	w0, 0
+.L1993:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 64
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 272
 	ret
-.L2127:
-	adrp	x23, .LANCHOR32
-	add	x23, x23, :lo12:.LANCHOR32
-	ldr	x3, [x21, #:lo12:.LANCHOR161]
-	mov	w1, w19
-	ldr	x2, [x22, #:lo12:.LANCHOR159]
-	mov	w0, w20
-	ldrb	w4, [x23, 9]
-	bl	flash_prog_page
-	cmn	w0, #1
-	beq	.L2129
-	ldrb	w4, [x23, 9]
-	mov	w1, w19
-	ldr	x3, [x21, #:lo12:.LANCHOR161]
-	mov	w0, w20
-	ldr	x2, [x22, #:lo12:.LANCHOR159]
-	bl	flash_read_page
-	cmn	w0, #1
-	beq	.L2129
-	ldr	x0, [x22, #:lo12:.LANCHOR159]
-	ldr	w1, [x0]
-	mov	w0, 42405
-	movk	w0, 0xa5a5, lsl 16
-	cmp	w1, w0
-	bne	.L2129
-	ldr	x0, [x21, #:lo12:.LANCHOR161]
-	ldr	w1, [x0]
-	mov	w0, 23130
-	movk	w0, 0x5a5a, lsl 16
-	cmp	w1, w0
-	csetm	w21, ne
-	b	.L2128
-	.size	flash_test_blk, .-flash_test_blk
-	.section	.text.id_block_prog_msb_ff_data,"ax",@progbits
+	.size	idb_write_data, .-idb_write_data
+	.section	.text.flash_start_tlc_page_prog,"ax",@progbits
 	.align	2
-	.global	id_block_prog_msb_ff_data
-	.type	id_block_prog_msb_ff_data, %function
-id_block_prog_msb_ff_data:
+	.global	flash_start_tlc_page_prog
+	.type	flash_start_tlc_page_prog, %function
+flash_start_tlc_page_prog:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	and	w22, w0, 255
-	adrp	x0, .LANCHOR19
+	stp	x25, x26, [sp, 64]
+	and	w25, w0, 255
+	adrp	x0, .LANCHOR18
 	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	and	w21, w1, 255
 	stp	x23, x24, [sp, 48]
-	ldrb	w0, [x0, #:lo12:.LANCHOR19]
-	str	x25, [sp, 64]
-	cbnz	w0, .L2137
-	adrp	x20, .LANCHOR32
-	add	x20, x20, :lo12:.LANCHOR32
-	ldrb	w0, [x20, 19]
-	sub	w0, w0, #5
-	and	w3, w0, 255
-	cmp	w3, 63
-	bhi	.L2137
-	and	w19, w2, 65535
-	mov	x2, 16391
-	movk	x2, 0x4000, lsl 16
-	movk	x2, 0x8000, lsl 48
-	lsr	x0, x2, x3
-	tbz	x0, 0, .L2137
-	adrp	x21, .LANCHOR140
-	mov	w23, w1
-	add	x21, x21, :lo12:.LANCHOR140
-	mov	w25, 65535
-	adrp	x24, .LANCHOR159
-.L2139:
-	ldrh	w0, [x20, 10]
-	cmp	w0, w19
-	bhi	.L2140
-.L2137:
+	and	w26, w3, 255
+	ldrb	w1, [x0, #:lo12:.LANCHOR18]
+	and	w22, w2, 255
+	mov	w20, w4
+	mov	x23, x5
+	mov	x24, x6
+	cmp	w1, w26
+	mov	x19, x0
+	bhi	.L2119
+	adrp	x1, .LANCHOR171
+	adrp	x0, .LC0
+	mov	w2, 753
+	add	x1, x1, :lo12:.LANCHOR171
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2119:
+	ldrb	w0, [x19, #:lo12:.LANCHOR18]
+	cmp	w0, w26
+	bls	.L2118
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
+	ldrb	w5, [x0, w26, sxtw]
+	adrp	x0, .LANCHOR13
+	ldr	x19, [x0, #:lo12:.LANCHOR13]
+	mov	w0, w5
+	bl	nandc_cs
+	cbz	w25, .L2121
+	sxtw	x0, w5
+	add	x0, x0, 8
+	add	x0, x19, x0, lsl 8
+	str	w25, [x0, 8]
+.L2121:
+	ubfiz	x0, x5, 8, 8
+	add	x19, x19, x0
+	mov	w0, 128
+	str	w21, [x19, 2056]
+	str	w0, [x19, 2056]
+	and	w0, w20, 255
+	str	wzr, [x19, 2052]
+	str	wzr, [x19, 2052]
+	str	w0, [x19, 2052]
+	lsr	w0, w20, 8
+	str	w0, [x19, 2052]
+	lsr	w0, w20, 16
+	add	w20, w20, w20, lsl 1
+	str	w0, [x19, 2052]
+	sub	w0, w20, #1
+	add	w0, w0, w21
+	bl	nandc_set_seed
+	adrp	x0, .LANCHOR32+9
+	mov	x4, x24
+	mov	x3, x23
+	mov	w1, 1
+	ldrb	w2, [x0, #:lo12:.LANCHOR32+9]
+	mov	w0, w5
+	bl	nandc_xfer
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	str	w22, [x19, 2056]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 80
+	b	nandc_de_cs.constprop.31
+.L2118:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldr	x25, [sp, 64]
+	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2140:
-	ldrh	w0, [x21, w19, sxtw 1]
-	cmp	w0, w25
-	bne	.L2137
-	ldr	x0, [x24, #:lo12:.LANCHOR159]
-	mov	w2, 16384
-	mov	w1, 255
-	bl	ftl_memset
-	ldr	x3, [x24, #:lo12:.LANCHOR159]
-	add	w1, w19, w23
-	ldrb	w4, [x20, 9]
-	add	w19, w19, 1
-	mov	x2, x3
-	mov	w0, w22
-	and	w19, w19, 65535
-	bl	flash_prog_page
-	b	.L2139
-	.size	id_block_prog_msb_ff_data, .-id_block_prog_msb_ff_data
-	.section	.text.flash_dual_page_prog,"ax",@progbits
+	.size	flash_start_tlc_page_prog, .-flash_start_tlc_page_prog
+	.section	.text.queue_tlc_prog_cmd,"ax",@progbits
 	.align	2
-	.global	flash_dual_page_prog
-	.type	flash_dual_page_prog, %function
-flash_dual_page_prog:
-	stp	x29, x30, [sp, -112]!
+	.type	queue_tlc_prog_cmd, %function
+queue_tlc_prog_cmd:
+	stp	x29, x30, [sp, -48]!
+	mov	w2, 24
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	and	w21, w0, 255
-	adrp	x0, .LANCHOR13
-	stp	x23, x24, [sp, 48]
-	stp	x19, x20, [sp, 16]
-	and	x19, x21, 255
-	ldr	x23, [x0, #:lo12:.LANCHOR13]
-	add	x0, x19, 8
-	mov	w20, 24
-	stp	x27, x28, [sp, 80]
-	mov	x27, x2
-	stp	x25, x26, [sp, 64]
-	add	x0, x23, x0, lsl 8
-	str	x0, [x29, 104]
+	mov	x21, x0
 	adrp	x0, .LANCHOR31
-	mov	w22, w1
-	mov	x28, x3
-	mov	x25, x4
+	mov	w22, 1
+	stp	x19, x20, [sp, 16]
+	ldr	x7, [x21]
 	ldrb	w0, [x0, #:lo12:.LANCHOR31]
-	mov	x26, x5
-	ubfx	x24, x22, 24, 2
-	sub	w0, w20, w0
-	mov	w20, 1
-	lsl	w20, w20, w0
-	adrp	x0, .LANCHOR14
-	str	x0, [x29, 96]
+	sub	w2, w2, w0
+	ldr	w1, [x7, 40]
+	lsl	w19, w22, w0
+	lsl	w20, w22, w2
+	sub	w19, w19, #1
 	sub	w20, w20, #1
-	ldr	w2, [x0, #:lo12:.LANCHOR14]
+	ldr	x5, [x7, 8]
 	and	w20, w20, w1
-	tbz	x2, 4, .L2143
-	adrp	x0, .LC130
-	mov	w3, w6
-	mov	w2, w24
-	add	x0, x0, :lo12:.LC130
+	lsr	w1, w1, w2
+	and	w19, w19, w1
+	ldr	x6, [x7, 24]
+	and	w19, w19, 255
+	ldrb	w0, [x7, 60]
+	mov	w4, w20
+	mov	w3, w19
+	mov	w1, w22
+	mov	w2, 26
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldp	x7, x0, [x21]
+	mov	w4, w20
+	mov	w3, w19
+	mov	w2, 26
+	mov	w1, 2
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x0, [x21, 16]
+	mov	w4, w20
+	ldr	x7, [x21]
+	mov	w3, w19
+	mov	w2, 16
+	mov	w1, 3
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
+	ldr	x1, [x21]
+	mov	w0, 4
+	strb	w22, [x1, 59]
+	strb	w0, [x1, 58]
+	mov	w0, -1
+	strb	w0, [x1]
+	adrp	x0, .LANCHOR56
+	add	x0, x0, :lo12:.LANCHOR56
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	b	buf_add_tail
+	.size	queue_tlc_prog_cmd, .-queue_tlc_prog_cmd
+	.section	.text.sblk_3d_tlc_dump_prog,"ax",@progbits
+	.align	2
+	.global	sblk_3d_tlc_dump_prog
+	.type	sblk_3d_tlc_dump_prog, %function
+sblk_3d_tlc_dump_prog:
+	stp	x29, x30, [sp, -48]!
+	mov	w1, 24
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x20, x0
+	adrp	x0, .LANCHOR31
+	stp	x21, x22, [sp, 32]
+	mov	w22, 1
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	ldr	w3, [x20, 40]
+	sub	w1, w1, w0
+	lsl	w19, w22, w0
+	sub	w19, w19, #1
+	lsl	w21, w22, w1
+	sub	w21, w21, #1
+	and	w21, w21, w3
+	lsr	w1, w3, w1
+	mov	w2, w3
+	and	w19, w19, w1
+	adrp	x0, .LC128
+	mov	w1, w21
+	add	x0, x0, :lo12:.LC128
+	bl	printf
+	and	w19, w19, 255
+	ldr	x5, [x20, 8]
+	ldr	x6, [x20, 24]
+	mov	w4, w21
+	mov	w3, w19
+	mov	w1, w22
+	mov	w2, 26
+	mov	w0, 0
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x5, [x20, 8]
+	mov	w4, w21
+	ldr	x6, [x20, 24]
+	mov	w3, w19
+	mov	w2, 26
+	mov	w1, 2
+	mov	w0, 0
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x5, [x20, 8]
+	mov	w4, w21
+	ldr	x6, [x20, 24]
+	mov	w3, w19
+	mov	w2, 16
+	mov	w1, 3
+	mov	w0, 0
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	w0, [x20, 40]
+	mov	w1, 64
+	ldp	x21, x22, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	b	flash_wait_device_ready
+	.size	sblk_3d_tlc_dump_prog, .-sblk_3d_tlc_dump_prog
+	.section	.text.flash_start_3d_mlc_page_prog,"ax",@progbits
+	.align	2
+	.global	flash_start_3d_mlc_page_prog
+	.type	flash_start_3d_mlc_page_prog, %function
+flash_start_3d_mlc_page_prog:
+	stp	x29, x30, [sp, -64]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	and	w21, w0, 255
+	adrp	x0, .LANCHOR18
+	stp	x19, x20, [sp, 16]
+	stp	x23, x24, [sp, 48]
+	and	w24, w1, 255
+	ldrb	w1, [x0, #:lo12:.LANCHOR18]
+	mov	w20, w2
+	mov	x22, x3
+	mov	x23, x4
+	cmp	w1, w24
+	mov	x19, x0
+	bhi	.L2131
+	adrp	x1, .LANCHOR172
+	adrp	x0, .LC0
+	mov	w2, 785
+	add	x1, x1, :lo12:.LANCHOR172
+	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2143:
-	bl	nandc_wait_flash_ready
-	mov	w0, w21
+.L2131:
+	ldrb	w0, [x19, #:lo12:.LANCHOR18]
+	cmp	w0, w24
+	bls	.L2130
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
+	ldrb	w5, [x0, w24, sxtw]
+	adrp	x0, .LANCHOR13
+	ldr	x19, [x0, #:lo12:.LANCHOR13]
+	mov	w0, w5
 	bl	nandc_cs
-	mov	w0, w21
-	cbnz	w24, .L2144
-	bl	zftl_flash_enter_slc_mode
-.L2145:
-	add	x19, x23, x19, lsl 8
-	mov	w24, 128
+	ubfiz	x0, x5, 8, 8
+	add	x19, x19, x0
+	mov	w0, 128
+	str	w0, [x19, 2056]
 	and	w0, w20, 255
-	adrp	x21, .LANCHOR32
-	add	x21, x21, :lo12:.LANCHOR32
-	mov	w23, 16
-	str	w24, [x19, 2056]
 	str	wzr, [x19, 2052]
 	str	wzr, [x19, 2052]
 	str	w0, [x19, 2052]
@@ -12951,1671 +13081,1726 @@ flash_dual_page_prog:
 	str	w0, [x19, 2052]
 	mov	w0, w20
 	bl	nandc_set_seed
-	ldrb	w1, [x21, 9]
-	mov	x3, x28
-	mov	x2, x27
-	mov	w0, 1
-	bl	nandc_xfer_start
-	bl	nandc_xfer_done
-	str	w23, [x19, 2056]
-	bl	nandc_wait_flash_ready
-	str	w24, [x19, 2056]
-	str	wzr, [x19, 2052]
-	add	w0, w20, 1
-	str	wzr, [x19, 2052]
-	and	w1, w0, 255
-	str	w1, [x19, 2052]
-	lsr	w1, w0, 8
-	str	w1, [x19, 2052]
-	lsr	w1, w0, 16
-	str	w1, [x19, 2052]
-	bl	nandc_set_seed
-	ldrb	w1, [x21, 9]
-	mov	x3, x26
-	mov	x2, x25
-	mov	w0, 1
-	bl	nandc_xfer_start
-	bl	nandc_xfer_done
-	str	w23, [x19, 2056]
-	bl	nandc_wait_flash_ready
-	ldr	x0, [x29, 104]
-	bl	flash_read_status
-	mov	w2, w0
-	bl	nandc_de_cs.constprop.30
-	and	w19, w2, 4
-	tbz	x2, 2, .L2142
-	ldr	x0, [x29, 96]
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2142
-	adrp	x0, .LC131
-	mov	w2, w19
-	mov	w1, w22
-	add	x0, x0, :lo12:.LC131
-	bl	printf
-.L2142:
-	mov	w0, w19
+	adrp	x0, .LANCHOR32+9
+	mov	x4, x23
+	mov	x3, x22
+	mov	w1, 1
+	ldrb	w2, [x0, #:lo12:.LANCHOR32+9]
+	mov	w0, w5
+	bl	nandc_xfer
+	str	w21, [x19, 2056]
+.L2130:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 112
+	ldp	x29, x30, [sp], 64
 	ret
-.L2144:
-	bl	zftl_flash_exit_slc_mode
-	b	.L2145
-	.size	flash_dual_page_prog, .-flash_dual_page_prog
-	.section	.text.fw_flash_page_prog.constprop.27,"ax",@progbits
+	.size	flash_start_3d_mlc_page_prog, .-flash_start_3d_mlc_page_prog
+	.section	.text.sblk_mlc_dump_prog,"ax",@progbits
 	.align	2
-	.type	fw_flash_page_prog.constprop.27, %function
-fw_flash_page_prog.constprop.27:
-	stp	x29, x30, [sp, -64]!
-	adrp	x4, .LANCHOR32
-	add	x4, x4, :lo12:.LANCHOR32
+	.global	sblk_mlc_dump_prog
+	.type	sblk_mlc_dump_prog, %function
+sblk_mlc_dump_prog:
+	stp	x29, x30, [sp, -48]!
+	mov	w2, 24
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	mov	x20, x1
-	stp	x21, x22, [sp, 32]
-	mov	x21, x2
-	str	x23, [sp, 48]
-	ldrb	w19, [x4, 9]
-	udiv	w19, w0, w19
-	adrp	x0, .LANCHOR46
-	ldrb	w23, [x0, #:lo12:.LANCHOR46]
-	adrp	x0, .LANCHOR17
-	ldrb	w0, [x0, #:lo12:.LANCHOR17]
-	bl	nandc_bch_sel
-	ldrb	w0, [x4, 7]
-	cmp	w0, 9
-	bne	.L2158
-	adrp	x22, .LANCHOR159
-	mov	w2, 16384
-	mov	w1, 255
-	ldr	x0, [x22, #:lo12:.LANCHOR159]
-	bl	ftl_memset
-	ldr	x5, [x22, #:lo12:.LANCHOR159]
-	mov	w6, 4
-	mov	x3, x21
-	mov	x2, x20
-	mov	x4, x5
+	mov	x20, x0
+	adrp	x0, .LANCHOR31
+	ldrb	w19, [x0, #:lo12:.LANCHOR31]
+	mov	w0, 1
+	ldr	w1, [x20, 40]
+	sub	w2, w2, w19
+	str	x21, [sp, 32]
+	lsl	w19, w0, w19
+	sub	w19, w19, #1
+	lsl	w21, w0, w2
+	sub	w21, w21, #1
+	and	w21, w21, w1
+	lsr	w1, w1, w2
+	and	w19, w19, w1
+	and	w19, w19, 255
+	mov	w0, w19
+	bl	zftl_flash_exit_slc_mode
+	ldr	w2, [x20, 40]
+	mov	w1, w21
+	adrp	x0, .LC129
+	add	x0, x0, :lo12:.LC129
+	add	w3, w2, 1
+	bl	printf
+	ldr	x3, [x20, 8]
+	mov	w2, w21
+	ldr	x4, [x20, 24]
 	mov	w1, w19
-	mov	w0, 0
-	bl	flash_dual_page_prog
-.L2161:
-	mov	w4, w0
-	mov	w0, w23
-	bl	nandc_bch_sel
-	ldr	x23, [sp, 48]
-	mov	w0, w4
+	mov	w0, 16
+	bl	flash_start_3d_mlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x3, [x20, 8]
+	add	w2, w21, 1
+	ldr	x4, [x20, 24]
+	mov	w1, w19
+	mov	w0, 16
+	bl	flash_start_3d_mlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	w0, [x20, 40]
+	mov	w1, 64
+	bl	flash_wait_device_ready
+	mov	w2, w0
+	bl	nandc_de_cs.constprop.31
+	ldr	x21, [sp, 32]
+	mov	w0, w2
 	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 64
+	ldp	x29, x30, [sp], 48
 	ret
-.L2158:
-	mov	w4, 4
-	mov	x3, x21
-	mov	x2, x20
-	mov	w1, w19
-	mov	w0, 0
-	bl	flash_prog_page
-	b	.L2161
-	.size	fw_flash_page_prog.constprop.27, .-fw_flash_page_prog.constprop.27
-	.section	.text.idb_write_data,"ax",@progbits
+	.size	sblk_mlc_dump_prog, .-sblk_mlc_dump_prog
+	.section	.text.flash_start_page_prog,"ax",@progbits
 	.align	2
-	.global	idb_write_data
-	.type	idb_write_data, %function
-idb_write_data:
-	stp	x29, x30, [sp, -272]!
-	add	w0, w1, w3
-	cmp	w0, 63
+	.global	flash_start_page_prog
+	.type	flash_start_page_prog, %function
+flash_start_page_prog:
+	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	w19, w1
 	stp	x21, x22, [sp, 32]
-	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR137
+	and	w21, w0, 255
+	adrp	x0, .LANCHOR31
+	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
-	stp	x27, x28, [sp, 80]
-	ldr	x21, [x23, #:lo12:.LANCHOR137]
-	bls	.L2163
-	cmp	w1, 575
-	bhi	.L2164
+	mov	w19, 24
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	mov	w20, 1
+	str	x27, [sp, 80]
+	adrp	x27, .LANCHOR18
+	sub	w25, w19, w0
+	stp	x23, x24, [sp, 48]
+	lsl	w20, w20, w0
+	sub	w20, w20, #1
+	lsr	w0, w1, w25
+	and	w20, w20, w0
+	ldrb	w0, [x27, #:lo12:.LANCHOR18]
+	and	w20, w20, 255
+	mov	w24, w1
 	mov	x22, x2
-	mov	w20, w3
-	cbnz	x21, .L2165
-	mov	w0, 262144
-	bl	ftl_malloc
-	str	x0, [x23, #:lo12:.LANCHOR137]
-	cbnz	x0, .L2166
-.L2171:
-	mov	w0, -1
-.L2162:
+	mov	x23, x3
+	cmp	w0, w20
+	bhi	.L2137
+	adrp	x1, .LANCHOR173
+	adrp	x0, .LC0
+	mov	w2, 836
+	add	x1, x1, :lo12:.LANCHOR173
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2137:
+	ldrb	w0, [x27, #:lo12:.LANCHOR18]
+	cmp	w0, w20
+	bls	.L2136
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
+	mov	w19, 1
+	lsl	w19, w19, w25
+	sub	w19, w19, #1
+	ldrb	w26, [x0, w20, sxtw]
+	adrp	x0, .LANCHOR13
+	and	w19, w19, w24
+	ldr	x25, [x0, #:lo12:.LANCHOR13]
+	bl	nandc_rdy_status
+	cbnz	w0, .L2139
+	ldrb	w0, [x27, #:lo12:.LANCHOR18]
+	cmp	w0, 1
+	bne	.L2140
+	bl	nandc_wait_flash_ready
+.L2139:
+	mov	w0, w26
+	bl	hynix_reconfig_rr_para
+	mov	w0, w26
+	bl	nandc_cs
+	tst	x24, 50331648
+	bne	.L2141
+	mov	w0, w19
+	bl	slc_phy_page_address_calc
+	mov	w19, w0
+	adrp	x0, .LANCHOR0
+	ldrb	w0, [x0, #:lo12:.LANCHOR0]
+	cbz	w0, .L2142
+	mov	w0, w26
+	bl	zftl_flash_enter_slc_mode
+.L2142:
+	ubfiz	x20, x26, 8, 8
+	mov	w0, 128
+	add	x20, x25, x20
+	str	w0, [x20, 2056]
+	and	w0, w19, 255
+	str	wzr, [x20, 2052]
+	str	wzr, [x20, 2052]
+	str	w0, [x20, 2052]
+	lsr	w0, w19, 8
+	str	w0, [x20, 2052]
+	lsr	w0, w19, 16
+	str	w0, [x20, 2052]
+	mov	w0, w19
+	bl	nandc_set_seed
+	adrp	x0, .LANCHOR32+9
+	mov	x4, x23
+	mov	x3, x22
+	mov	w1, 1
+	ldrb	w2, [x0, #:lo12:.LANCHOR32+9]
+	mov	w0, w26
+	bl	nandc_xfer
+	ldr	x27, [sp, 80]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	str	w21, [x20, 2056]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 96
+	b	nandc_de_cs.constprop.31
+.L2140:
+	mov	w2, 64
+	mov	w1, w19
+	mov	w0, w20
+	bl	flash_wait_device_ready_raw
+	b	.L2139
+.L2141:
+	mov	w0, w26
+	bl	zftl_flash_exit_slc_mode
+	b	.L2142
+.L2136:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 272
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 96
 	ret
-.L2166:
-	mov	w2, 262144
-	mov	w1, 0
-	bl	ftl_memset
-.L2165:
-	adrp	x21, .LANCHOR139
-	ldr	x0, [x21, #:lo12:.LANCHOR139]
-	cbz	x0, .L2168
-.L2172:
-	adrp	x1, .LANCHOR138
+	.size	flash_start_page_prog, .-flash_start_page_prog
+	.section	.text.queue_prog_cmd,"ax",@progbits
+	.align	2
+	.type	queue_prog_cmd, %function
+queue_prog_cmd:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	ldr	w1, [x0, 40]
+	ldr	x3, [x0, 24]
+	ldr	x2, [x0, 8]
+	str	x19, [sp, 16]
+	mov	x19, x0
+	mov	w0, 16
+	bl	flash_start_page_prog
+	adrp	x0, .LANCHOR56
+	ldr	w3, [x19, 40]
+	ldrb	w1, [x0, #:lo12:.LANCHOR56]
+	cmp	w1, 255
+	beq	.L2148
+	adrp	x2, .LANCHOR31
+	mov	w5, 24
+	adrp	x6, .LANCHOR52
+	add	x6, x6, :lo12:.LANCHOR52
+	ldrb	w4, [x2, #:lo12:.LANCHOR31]
 	mov	w2, 1
-	ldr	x0, [x23, #:lo12:.LANCHOR137]
-	cmp	w19, 64
-	str	w2, [x1, #:lo12:.LANCHOR138]
-	bhi	.L2274
-	mov	w1, 64
-	sub	w19, w1, w19
-	sub	w2, w20, w19
-	ubfiz	x19, x19, 9, 25
-	lsl	w2, w2, 9
-	add	x1, x22, x19
-.L2281:
-	bl	ftl_memcpy
-.L2280:
-	mov	w0, 0
-	b	.L2162
-.L2168:
-	mov	w0, 262144
-	bl	ftl_malloc
-	str	x0, [x21, #:lo12:.LANCHOR139]
-	cbnz	x0, .L2172
-	b	.L2171
-.L2274:
-	mov	w2, 576
-	sub	w2, w2, w19
-	cmp	w20, w2
-	sub	w19, w19, #64
-	csel	w2, w20, w2, ls
-	ubfiz	x19, x19, 9, 25
-	lsl	w2, w2, 9
-	mov	x1, x22
-	add	x0, x0, x19
-	b	.L2281
-.L2163:
-	cmp	w1, 575
-	bls	.L2280
-.L2164:
-	adrp	x0, .LANCHOR138
-	ldr	w0, [x0, #:lo12:.LANCHOR138]
-	cbz	w0, .L2280
-	adrp	x2, .LANCHOR32
-	add	x0, x2, :lo12:.LANCHOR32
-	str	x2, [x29, 144]
-	ldrb	w22, [x0, 9]
-	ldrh	w19, [x0, 26]
-	adrp	x0, .LANCHOR0
-	mov	x7, x0
-	ldrb	w1, [x0, #:lo12:.LANCHOR0]
-	str	w1, [x29, 180]
-	adrp	x1, .LANCHOR19
-	mov	x8, x1
-	ldr	w0, [x29, 180]
-	ldrb	w3, [x1, #:lo12:.LANCHOR19]
-	str	w3, [x29, 192]
-	cbz	w0, .L2174
-	ldrh	w0, [x29, 180]
-	str	w0, [x29, 168]
-	uxtw	x0, w3
-	cmp	w0, 0
-	cset	w0, eq
-.L2277:
-	str	w0, [x29, 188]
-	mov	w0, 0
-	bl	zftl_flash_exit_slc_mode
-	ldrb	w0, [x8, #:lo12:.LANCHOR19]
-	strb	w0, [x7, #:lo12:.LANCHOR0]
-	mov	w0, 35899
-	ldr	w1, [x21]
-	movk	w0, 0xfcdc, lsl 16
-	cmp	w1, w0
-	bne	.L2177
-	ldr	x0, [x29, 144]
-	add	x1, x21, 258048
-	add	x1, x1, 2044
-	mov	w2, 65023
-	add	x0, x0, :lo12:.LANCHOR32
-	mov	w3, 4097
-	ldrh	w20, [x0, 10]
-	ldrb	w0, [x0, 12]
-	lsl	w20, w20, 2
-	sdiv	w20, w20, w0
-	mov	w0, 512
-	cmp	w20, 512
-	csel	w20, w20, w0, lt
-	mov	w0, 0
-.L2181:
-	ldr	w4, [x1]
-	cbnz	w4, .L2179
-	ldr	w4, [x21, w0, uxtw 2]
-	add	w0, w0, 1
-	str	w4, [x1, 2048]
-	cmp	w0, w3
+	mov	x8, x6
+	sub	w5, w5, w4
+	lsl	w2, w2, w4
 	sub	w2, w2, #1
-	csel	w0, w0, wzr, cc
-	sub	x1, x1, #4
-	cmp	w2, 4096
-	bne	.L2181
-.L2179:
-	ldr	w1, [x21, w2, uxtw 2]
-	mul	w19, w19, w22
-	mov	w3, w20
-	adrp	x0, .LC132
-	add	x0, x0, :lo12:.LC132
+	and	w2, w2, 65535
+	asr	w3, w3, w5
+	and	w3, w3, w2
+.L2150:
+	add	x7, x6, x1, lsl 6
+	ldr	w4, [x7, 40]
+	lsr	w4, w4, w5
+	and	w4, w2, w4
+	cmp	w3, w4
+	bne	.L2149
+	ldrb	w4, [x7, 58]
+	cmp	w4, 7
+	bne	.L2149
+	mov	w1, 3
+	strb	w1, [x7, 58]
+.L2148:
+	mov	w1, 3
+	strb	w1, [x19, 58]
+	mov	w1, 1
+	strb	w1, [x19, 59]
+	mov	w1, -1
+	strb	w1, [x19]
+	mov	x1, x19
+	add	x0, x0, :lo12:.LANCHOR56
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	b	buf_add_tail
+.L2149:
+	lsl	x1, x1, 6
+	ldrb	w1, [x8, x1]
+	cmp	w1, 255
+	bne	.L2150
+	b	.L2148
+	.size	queue_prog_cmd, .-queue_prog_cmd
+	.section	.text.flash_complete_plane_page_read,"ax",@progbits
+	.align	2
+	.global	flash_complete_plane_page_read
+	.type	flash_complete_plane_page_read, %function
+flash_complete_plane_page_read:
+	stp	x29, x30, [sp, -64]!
+	mov	w4, 24
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	mov	w24, w0
+	adrp	x0, .LANCHOR31
+	stp	x21, x22, [sp, 32]
+	stp	x19, x20, [sp, 16]
+	mov	w19, 1
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	mov	x20, x1
+	mov	x21, x2
+	sub	w22, w4, w0
+	lsl	w19, w19, w0
+	sub	w19, w19, #1
+	lsr	w0, w24, w22
+	and	w19, w19, w0
+	adrp	x0, .LANCHOR18
+	and	w19, w19, 255
+	mov	x23, x0
+	ldrb	w1, [x0, #:lo12:.LANCHOR18]
+	cmp	w1, w19
+	bhi	.L2157
+	adrp	x1, .LANCHOR174
+	adrp	x0, .LC0
+	mov	w2, 925
+	add	x1, x1, :lo12:.LANCHOR174
+	add	x0, x0, :lo12:.LC0
 	bl	printf
-	str	wzr, [x29, 184]
-	and	w0, w19, 65535
-	str	wzr, [x29, 196]
-	str	w0, [x29, 132]
-	adrp	x0, .LANCHOR48
-	add	x0, x0, :lo12:.LANCHOR48
-	str	x0, [x29, 200]
-.L2219:
-	adrp	x23, .LANCHOR139
-	mov	w1, 0
-	mov	w2, 512
-	ldr	x0, [x23, #:lo12:.LANCHOR139]
-	bl	ftl_memset
-	adrp	x0, .LANCHOR27
-	ldr	w1, [x29, 196]
-	ldr	x0, [x0, #:lo12:.LANCHOR27]
-	add	x0, x0, x1, uxtw
-	ldrb	w19, [x0, 32]
-	cmp	w19, 255
-	beq	.L2182
-	ldr	w0, [x29, 132]
-	mul	w19, w19, w0
-	ldr	w0, [x29, 188]
-	cbz	w0, .L2183
-	and	w0, w1, -3
-	adrp	x8, .LANCHOR0
+.L2157:
+	ldrb	w0, [x23, #:lo12:.LANCHOR18]
+	cmp	w0, w19
+	bls	.L2165
+	adrp	x2, .LANCHOR30
+	add	x2, x2, :lo12:.LANCHOR30
+	adrp	x0, .LANCHOR13
+	mov	w4, 1
+	lsl	w4, w4, w22
+	sub	w4, w4, #1
+	ldrb	w7, [x2, w19, sxtw]
+	and	w4, w4, w24
+	ldr	x6, [x0, #:lo12:.LANCHOR13]
+	ubfx	x24, x24, 24, 2
+	mov	w0, w7
+	bl	nandc_cs
+	cbnz	w24, .L2159
+	mov	w0, w4
+	bl	slc_phy_page_address_calc
+	mov	w4, w0
+.L2159:
+	adrp	x0, .LANCHOR20+16
+	and	x1, x7, 255
+	and	w5, w4, 255
+	lsr	w3, w4, 8
+	ldrb	w0, [x0, #:lo12:.LANCHOR20+16]
+	lsr	w2, w4, 16
 	cmp	w0, 1
-	adrp	x7, .LANCHOR19
-	bne	.L2184
-	ldrb	w0, [x29, 168]
-	strb	w0, [x8, #:lo12:.LANCHOR0]
-	strb	w0, [x7, #:lo12:.LANCHOR19]
-.L2183:
-	ldr	x0, [x29, 144]
-	add	x27, x0, :lo12:.LANCHOR32
-	ldr	x0, [x29, 200]
-	ldrb	w24, [x27, 9]
-	ldrh	w25, [x27, 26]
-	ldrb	w0, [x0]
-	str	w0, [x29, 128]
-	udiv	w1, w19, w24
-	ldr	x0, [x29, 200]
-	mul	w25, w24, w25
-	and	w22, w25, 65535
-	strb	wzr, [x0]
-	mov	w0, 0
-	bl	flash_erase_block
-	udiv	w25, w19, w22
-	ldrb	w1, [x27, 12]
-	msub	w0, w25, w22, w19
-	str	w0, [x29, 176]
-	sub	w26, w19, w0
-	ldrh	w0, [x27, 10]
-	cmp	w19, w26
-	lsl	w0, w0, 2
-	sdiv	w0, w0, w1
-	str	w0, [x29, 172]
-	bne	.L2227
-	adrp	x0, .LANCHOR28
-	ldrb	w0, [x0, #:lo12:.LANCHOR28]
-	cmp	w0, 9
-	bne	.L2227
-	ldr	x28, [x23, #:lo12:.LANCHOR139]
-	mov	w2, 1024
-	mov	w1, 0
-	mov	x0, x28
-	bl	ftl_memset
-	mov	w0, 18766
-	movk	w0, 0x464e, lsl 16
-	str	w0, [x28]
-	mov	w0, 12
-	str	w0, [x28, 4]
-	adrp	x0, .LANCHOR19
-	strb	wzr, [x28, 16]
-	str	wzr, [x28, 12]
-	ldrb	w0, [x0, #:lo12:.LANCHOR19]
-	cbz	w0, .L2186
-	ldrb	w0, [x27, 29]
-	strb	w0, [x28, 16]
-.L2186:
-	mov	w0, 4
-	strb	w0, [x28, 17]
-	adrp	x0, .LANCHOR32
-	add	x0, x0, :lo12:.LANCHOR32
-	cmp	w24, 8
-	strb	wzr, [x28, 20]
-	strh	wzr, [x28, 22]
-	sub	w22, w20, #4
-	ldrh	w1, [x0, 10]
+	adrp	x0, .LANCHOR16
+	bne	.L2160
+	add	x1, x6, x1, lsl 8
+	mov	w6, 6
+.L2172:
+	str	w6, [x1, 2056]
+	str	wzr, [x1, 2052]
+	str	wzr, [x1, 2052]
+	str	w5, [x1, 2052]
+	str	w3, [x1, 2052]
+	str	w2, [x1, 2052]
+.L2170:
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
+	mov	w2, 224
+	str	w2, [x1, 2056]
 	ldrb	w0, [x0, 12]
-	sdiv	w0, w1, w0
-	mov	w1, 16
-	strh	w0, [x28, 18]
-	mov	w0, 70
-	csel	w0, w0, w1, hi
-	strb	w0, [x28, 21]
-	mov	w1, 12
-	add	x0, x28, 12
-	bl	js_hash
-	str	w0, [x28, 8]
-.L2185:
-	adrp	x0, .LANCHOR19
-	mov	x25, x21
-	add	x0, x0, :lo12:.LANCHOR19
-	mov	w27, 0
-	str	x0, [x29, 160]
-	adrp	x0, .LANCHOR3
-	add	x0, x0, :lo12:.LANCHOR3
-	str	x0, [x29, 152]
-.L2188:
-	ldr	w0, [x29, 172]
-	cmp	w0, w27
-	bhi	.L2199
-	ldr	x0, [x29, 144]
-	mov	w25, 4
-	ldr	x24, [x23, #:lo12:.LANCHOR139]
-	mov	w26, 0
-	add	x0, x0, :lo12:.LANCHOR32
-	str	w22, [x29, 152]
-	str	wzr, [x29, 160]
-	ldrb	w1, [x0, 9]
-	ldrh	w0, [x0, 26]
-	str	w1, [x29, 140]
-	mul	w0, w1, w0
-	adrp	x1, .LANCHOR48
-	and	w0, w0, 65535
-	strb	wzr, [x1, #:lo12:.LANCHOR48]
-	udiv	w1, w19, w0
-	msub	w0, w1, w0, w19
-	str	w0, [x29, 176]
-	sub	w0, w19, w0
-	str	w0, [x29, 136]
-	ldr	w0, [x29, 176]
-	and	w0, w0, 3
-	str	w0, [x29, 172]
-	adrp	x0, .LANCHOR3
-	add	x0, x0, :lo12:.LANCHOR3
-	str	x0, [x29, 104]
-.L2200:
-	ldr	w0, [x29, 152]
-	cmp	w26, w0
-	bcc	.L2214
-	ldr	x0, [x29, 200]
-	ldrb	w1, [x29, 128]
-	strb	w1, [x0]
-	ldr	w0, [x29, 188]
-	cbz	w0, .L2215
-	mov	w0, 0
-	bl	zftl_flash_exit_slc_mode
-	adrp	x0, .LANCHOR0
-	strb	wzr, [x0, #:lo12:.LANCHOR0]
-	adrp	x0, .LANCHOR19
-	strb	wzr, [x0, #:lo12:.LANCHOR19]
-.L2215:
-	adrp	x0, .LANCHOR139
-	lsl	w22, w22, 7
-	mov	x1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR139]
-.L2216:
-	mov	w23, w1
-	cmp	w1, w22
-	bcc	.L2217
-	ldr	w0, [x29, 184]
-	add	w0, w0, 1
-	str	w0, [x29, 184]
-	cmp	w0, 5
-	bls	.L2182
-	b	.L2223
-.L2174:
-	ldr	w0, [x29, 192]
 	cmp	w0, 3
-	mov	w0, 3
-	csel	w0, wzr, w0, ne
-	str	w0, [x29, 168]
-	ldr	w0, [x29, 192]
+	bne	.L2163
+	cbz	w24, .L2163
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbnz	w0, .L2163
+	add	w4, w4, w4, lsl 1
+	sub	w0, w24, #1
+	add	w0, w4, w0
+.L2171:
+	bl	nandc_set_seed
+	adrp	x0, .LANCHOR32+9
+	mov	x4, x21
+	mov	x3, x20
+	mov	w1, 0
+	ldrb	w2, [x0, #:lo12:.LANCHOR32+9]
+	mov	w0, w7
+	bl	nandc_xfer
+	mov	w2, w0
+	bl	nandc_de_cs.constprop.31
+	mov	w0, w2
+.L2156:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	ret
+.L2160:
+	ldr	x8, [x0, #:lo12:.LANCHOR16]
+	add	x1, x6, x1, lsl 8
+	ldrb	w8, [x8, 12]
+	cmp	w8, 3
+	bne	.L2162
+	mov	w6, 5
+	b	.L2172
+.L2162:
+	str	wzr, [x1, 2056]
+	str	wzr, [x1, 2052]
+	str	wzr, [x1, 2052]
+	str	w5, [x1, 2052]
+	str	w3, [x1, 2052]
+	str	w2, [x1, 2052]
+	mov	w2, 5
+	str	w2, [x1, 2056]
+	str	wzr, [x1, 2052]
+	str	wzr, [x1, 2052]
+	b	.L2170
+.L2163:
+	mov	w0, w4
+	b	.L2171
+.L2165:
+	mov	w0, -1
+	b	.L2156
+	.size	flash_complete_plane_page_read, .-flash_complete_plane_page_read
+	.section	.text.flash_complete_page_read,"ax",@progbits
+	.align	2
+	.global	flash_complete_page_read
+	.type	flash_complete_page_read, %function
+flash_complete_page_read:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	mov	w21, w0
+	adrp	x0, .LANCHOR31
+	stp	x19, x20, [sp, 16]
+	mov	x22, x1
+	mov	w1, 24
+	ldrb	w20, [x0, #:lo12:.LANCHOR31]
+	mov	w0, 1
+	stp	x23, x24, [sp, 48]
+	mov	x23, x2
+	sub	w1, w1, w20
+	stp	x25, x26, [sp, 64]
+	lsl	w20, w0, w20
+	sub	w20, w20, #1
+	lsl	w19, w0, w1
+	adrp	x0, .LANCHOR18
+	lsr	w1, w21, w1
+	stp	x27, x28, [sp, 80]
+	and	w20, w20, w1
+	ldrb	w0, [x0, #:lo12:.LANCHOR18]
+	sub	w19, w19, #1
+	and	w20, w20, 255
+	and	w19, w19, w21
+	ubfx	x24, x21, 24, 2
+	cmp	w0, w20
+	bhi	.L2174
+	adrp	x1, .LANCHOR175
+	adrp	x0, .LC0
+	mov	w2, 1049
+	add	x1, x1, :lo12:.LANCHOR175
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2174:
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
+	ldrb	w25, [x0, w20, sxtw]
+	adrp	x0, .LANCHOR13
+	ldr	x4, [x0, #:lo12:.LANCHOR13]
+	mov	w0, w25
+	bl	nandc_cs
+	cbnz	w24, .L2175
+	mov	w0, w19
+	bl	slc_phy_page_address_calc
+	mov	w19, w0
+.L2175:
+	ubfiz	x0, x25, 8, 8
+	mov	w1, 5
+	add	x0, x4, x0
+	str	w1, [x0, 2056]
+	and	w1, w19, 255
+	str	wzr, [x0, 2052]
+	str	wzr, [x0, 2052]
+	str	w1, [x0, 2052]
+	lsr	w1, w19, 8
+	str	w1, [x0, 2052]
+	lsr	w1, w19, 16
+	str	w1, [x0, 2052]
+	mov	w1, 224
+	str	w1, [x0, 2056]
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
+	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	mov	w0, 2
-	csel	w0, wzr, w0, ne
-	b	.L2277
-.L2184:
-	mov	w0, 0
-	bl	zftl_flash_exit_slc_mode
-	strb	wzr, [x8, #:lo12:.LANCHOR0]
-	strb	wzr, [x7, #:lo12:.LANCHOR19]
-	b	.L2183
-.L2227:
-	mov	w22, w20
-	mov	x28, 0
-	b	.L2185
-.L2199:
-	ldr	x2, [x29, 160]
-	ldr	w0, [x29, 176]
-	add	w4, w0, w27
-	adrp	x0, .LANCHOR3
-	lsr	w4, w4, 2
-	ldrb	w2, [x2]
-	add	w1, w4, 1
-	add	x0, x0, :lo12:.LANCHOR3
-	ldrh	w0, [x0, w1, sxtw 1]
-	cbz	w2, .L2190
-	adrp	x0, .LANCHOR1
-	ldrb	w7, [x0, #:lo12:.LANCHOR1]
-	lsl	w0, w1, 1
-	cmp	w7, 0
-	csel	w0, w0, w1, ne
-.L2190:
-	adrp	x1, .LANCHOR28
-	ldrb	w1, [x1, #:lo12:.LANCHOR28]
-	cmp	w1, 9
-	bne	.L2192
-.L2278:
-	str	w0, [x29, 208]
-	mov	w0, 61424
-	str	w0, [x29, 212]
-	ldr	x0, [x29, 152]
-	ldrh	w0, [x0, w4, sxtw 1]
-	cbnz	w2, .L2194
-	mov	w4, w0
-.L2195:
-	mul	w0, w24, w4
-	cbnz	x28, .L2196
-	str	w4, [x29, 140]
-	add	x2, x29, 208
-	mov	x1, x25
-	add	w0, w0, w26
-	bl	fw_flash_page_prog.constprop.27
-	adrp	x0, .LANCHOR19
-	ldr	w4, [x29, 140]
-	ldrb	w0, [x0, #:lo12:.LANCHOR19]
-	cbnz	w0, .L2197
-	udiv	w1, w26, w24
-	add	w2, w4, 1
-	bl	id_block_prog_msb_ff_data
-.L2197:
-	add	w0, w22, 16
-	add	x25, x25, 2048
-	cmp	w27, w0
-	bcc	.L2198
-	add	w1, w22, 20
-	add	x0, x21, 2048
-	cmp	w27, w1
-	csel	x25, x0, x25, cc
-.L2198:
-	add	w5, w27, 4
-	mov	x28, 0
-	and	w27, w5, 65535
-	b	.L2188
-.L2192:
-	sub	w0, w0, #1
-	lsl	w0, w0, 2
-	b	.L2278
-.L2194:
-	adrp	x0, .LANCHOR1
-	ldrb	w1, [x0, #:lo12:.LANCHOR1]
-	lsl	w0, w4, 1
-	cmp	w1, 0
-	csel	w4, w0, w4, ne
-	b	.L2195
-.L2196:
-	add	x2, x29, 208
-	mov	x1, x28
-	add	w0, w0, w26
-	bl	fw_flash_page_prog.constprop.27
-	b	.L2198
-.L2214:
-	ldr	w0, [x29, 172]
-	adrp	x1, .LANCHOR19
-	sub	w28, w25, w0
-	ldr	w0, [x29, 176]
-	ldrb	w1, [x1, #:lo12:.LANCHOR19]
-	and	w28, w28, 65535
-	add	w23, w0, w26
-	ldr	x0, [x29, 104]
-	udiv	w23, w23, w25
-	and	w23, w23, 65535
-	ldrh	w0, [x0, w23, sxtw 1]
-	cbnz	w1, .L2201
-	mov	w23, w0
-.L2202:
-	adrp	x0, .LANCHOR17
-	ldr	w1, [x29, 136]
-	ldrb	w27, [x0, #:lo12:.LANCHOR17]
-	ldr	w0, [x29, 172]
+	bne	.L2176
+	cbz	w24, .L2176
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbnz	w0, .L2176
+	sub	w0, w24, #1
+	add	w1, w19, w19, lsl 1
 	add	w0, w0, w1
-	ldr	w1, [x29, 140]
-	madd	w23, w1, w23, w0
-	adrp	x0, .LANCHOR32+9
-	ldrb	w0, [x0, #:lo12:.LANCHOR32+9]
-	udiv	w23, w23, w0
-	adrp	x0, .LANCHOR46
-	ldrb	w0, [x0, #:lo12:.LANCHOR46]
-	str	w0, [x29, 124]
-	mov	w0, w27
-	bl	nandc_bch_sel
-	adrp	x0, .LANCHOR21
-	add	x0, x0, :lo12:.LANCHOR21
-	str	x0, [x29, 112]
-.L2203:
-	mov	w4, w25
-	add	x3, x29, 208
-	mov	x2, x24
-	mov	w1, w23
-	mov	w0, 0
+.L2203:
+	adrp	x20, .LANCHOR32
+	add	x28, x20, :lo12:.LANCHOR32
+	bl	nandc_set_seed
+	mov	x4, x23
+	mov	x3, x22
+	ldrb	w2, [x28, 9]
+	mov	w1, 0
+	mov	w0, w25
+	bl	nandc_xfer
+	cmn	w0, #1
+	bne	.L2178
+	adrp	x26, .LANCHOR48
+	ldrb	w27, [x26, #:lo12:.LANCHOR48]
+	cbz	w27, .L2179
+	ldrb	w4, [x28, 9]
+	mov	x3, x23
+	strb	wzr, [x26, #:lo12:.LANCHOR48]
+	mov	x2, x22
+	orr	w1, w19, w24, lsl 24
+	mov	w0, w25
 	bl	flash_read_page
-	mov	w5, w0
+	strb	w27, [x26, #:lo12:.LANCHOR48]
+	cbnz	w24, .L2180
+.L2185:
+	adrp	x1, .LANCHOR0
+	ldrb	w1, [x1, #:lo12:.LANCHOR0]
+	cbz	w1, .L2180
+	adrp	x1, .LANCHOR46
+	ldrb	w1, [x1, #:lo12:.LANCHOR46]
+	add	w1, w1, w1, lsl 1
+	cmp	w0, w1, lsr 2
+	blt	.L2180
+	add	x20, x20, :lo12:.LANCHOR32
+	ldrb	w1, [x20, 19]
+	sub	w1, w1, #4
+	and	w1, w1, 255
+	cmp	w1, 4
+	mov	w1, 256
+	csel	w0, w0, w1, hi
+.L2173:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	ret
+.L2176:
+	mov	w0, w19
+	b	.L2203
+.L2180:
 	cmn	w0, #1
-	bne	.L2204
-	ldr	x0, [x29, 200]
-	ldrb	w6, [x0]
-	cbnz	w6, .L2205
+	bne	.L2173
+.L2186:
+	adrp	x0, .LANCHOR167
+	ldr	x5, [x0, #:lo12:.LANCHOR167]
+	cbnz	x5, .L2182
+.L2184:
+	adrp	x0, .LANCHOR48
+	mov	w3, -1
+	mov	w2, w21
+	mov	w1, 0
+	ldrb	w4, [x0, #:lo12:.LANCHOR48]
+	adrp	x0, .LC130
+	add	x0, x0, :lo12:.LC130
+	bl	printf
+	adrp	x0, .LANCHOR21
+	ldrb	w0, [x0, #:lo12:.LANCHOR21]
+	cbnz	w0, .L2183
+	mov	w0, -1
+	b	.L2173
+.L2182:
+	add	x0, x20, :lo12:.LANCHOR32
+	mov	x3, x23
+	mov	x2, x22
+	orr	w1, w19, w24, lsl 24
+	ldrb	w4, [x0, 9]
+	mov	w0, w25
+	blr	x5
+	cmn	w0, #1
+	beq	.L2184
+	b	.L2173
+.L2183:
+	add	x20, x20, :lo12:.LANCHOR32
+	orr	w1, w19, w24, lsl 24
+	mov	x3, x23
+	mov	x2, x22
+	mov	w0, w25
+	ldrb	w4, [x20, 9]
+	ldp	x21, x22, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	b	flash_ddr_tuning_read
+.L2178:
+	cbz	w24, .L2185
+	b	.L2173
+.L2179:
+	cbnz	w24, .L2186
+	b	.L2185
+	.size	flash_complete_page_read, .-flash_complete_page_read
+	.section	.text.queue_wait_first_req_completed,"ax",@progbits
+	.align	2
+	.type	queue_wait_first_req_completed, %function
+queue_wait_first_req_completed:
+	stp	x29, x30, [sp, -96]!
+	adrp	x0, .LANCHOR56
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	ldrb	w0, [x0, #:lo12:.LANCHOR56]
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	cmp	w0, 255
+	stp	x25, x26, [sp, 64]
+	str	x27, [sp, 80]
+	bne	.L2205
+.L2238:
+	mov	w21, 0
+	b	.L2204
+.L2205:
+	adrp	x19, .LANCHOR52
+	sxtw	x20, w0
+	add	x1, x19, :lo12:.LANCHOR52
+	add	x1, x1, x20, lsl 6
+	ldrb	w2, [x1, 58]
+	ldr	w21, [x1, 40]
+	sub	w3, w2, #1
+	cmp	w3, 10
+	bhi	.L2238
+	adrp	x1, .L2208
+	add	x1, x1, :lo12:.L2208
+	ldrh	w1, [x1,w3,uxtw #1]
+	adr	x3, .Lrtx2208
+	add	x1, x3, w1, sxth #2
+	br	x1
+.Lrtx2208:
+	.section	.rodata.queue_wait_first_req_completed,"a",@progbits
+	.align	0
+	.align	2
 .L2208:
-	adrp	x0, .LANCHOR165
-	ldr	x6, [x0, #:lo12:.LANCHOR165]
-	cbnz	x6, .L2206
+	.2byte	(.L2207 - .Lrtx2208) / 4
+	.2byte	(.L2209 - .Lrtx2208) / 4
+	.2byte	(.L2210 - .Lrtx2208) / 4
+	.2byte	(.L2210 - .Lrtx2208) / 4
+	.2byte	(.L2210 - .Lrtx2208) / 4
+	.2byte	(.L2210 - .Lrtx2208) / 4
+	.2byte	(.L2211 - .Lrtx2208) / 4
+	.2byte	(.L2212 - .Lrtx2208) / 4
+	.2byte	(.L2213 - .Lrtx2208) / 4
+	.2byte	(.L2210 - .Lrtx2208) / 4
+	.2byte	(.L2213 - .Lrtx2208) / 4
+	.section	.text.queue_wait_first_req_completed
 .L2207:
-	ldr	x0, [x29, 112]
-	ldrb	w0, [x0]
-	cbz	w0, .L2204
-	mov	w4, w25
-	add	x3, x29, 208
-	mov	x2, x24
-	mov	w1, w23
-	mov	w0, 0
-	bl	flash_ddr_tuning_read
-	b	.L2279
-.L2201:
-	adrp	x0, .LANCHOR1
-	ldrb	w1, [x0, #:lo12:.LANCHOR1]
-	lsl	w0, w23, 1
-	cmp	w1, 0
-	csel	w23, w0, w23, ne
-	b	.L2202
-.L2205:
-	ldr	x0, [x29, 200]
-	mov	w1, w23
-	str	w6, [x29, 100]
-	mov	w4, w25
-	str	w5, [x29, 120]
-	add	x3, x29, 208
-	mov	x2, x24
-	strb	wzr, [x0]
-	mov	w0, 0
-	bl	flash_read_page
+	mov	w1, 64
+	mov	w0, w21
+	bl	flash_wait_device_ready
+	tbz	x0, 6, .L2238
+	add	x0, x19, :lo12:.LANCHOR52
+	add	x0, x0, x20, lsl 6
+	ldp	x1, x2, [x0, 8]
+	cbz	x2, .L2215
+	ldrb	w3, [x0, 56]
+	adrp	x0, .LANCHOR126
+	ldrb	w0, [x0, #:lo12:.LANCHOR126]
+	cmp	w3, w0
+	csel	x1, x1, x2, ne
+.L2215:
+	add	x19, x19, :lo12:.LANCHOR52
+	mov	w0, w21
+	add	x20, x19, x20, lsl 6
+	ldr	x2, [x20, 24]
+	bl	flash_complete_page_read
+	str	w0, [x20, 52]
+	mov	w0, 13
+	strb	w0, [x20, 58]
+	ldrb	w0, [x20, 2]
+	orr	w0, w0, 8
+	strb	w0, [x20, 2]
+	b	.L2238
+.L2209:
+	mov	w1, 64
+	mov	w0, w21
+	bl	flash_wait_device_ready
+	tbz	x0, 6, .L2238
+	add	x0, x19, :lo12:.LANCHOR52
+	lsl	x2, x20, 6
+	add	x1, x0, x2
+	ldrb	w21, [x0, x2]
+	add	x0, x0, x21, lsl 6
+	ldr	x24, [x0, 8]
+	ldp	x26, x0, [x1, 8]
+	cbz	x0, .L2216
+	ldrb	w2, [x1, 56]
+	adrp	x1, .LANCHOR126
+	ldrb	w1, [x1, #:lo12:.LANCHOR126]
+	cmp	w2, w1
+	csel	x26, x26, x0, ne
+.L2216:
+	add	x0, x19, :lo12:.LANCHOR52
+	add	x0, x0, x21, lsl 6
+	ldr	x1, [x0, 16]
+	cbz	x1, .L2217
+	ldrb	w2, [x0, 56]
+	adrp	x0, .LANCHOR126
+	ldrb	w0, [x0, #:lo12:.LANCHOR126]
+	cmp	w2, w0
+	csel	x24, x24, x1, ne
+.L2217:
+	add	x22, x19, :lo12:.LANCHOR52
+	mov	x1, x26
+	add	x27, x22, x20, lsl 6
+	add	x22, x22, x21, lsl 6
+	ldr	x2, [x27, 24]
+	ldr	w0, [x27, 40]
+	bl	flash_complete_plane_page_read
+	mov	w23, w0
+	ldr	x2, [x22, 24]
+	mov	x1, x24
+	ldr	w0, [x22, 40]
+	bl	flash_complete_plane_page_read
+	mov	w25, w0
+	cmn	w23, #1
+	beq	.L2218
+	ldr	w0, [x27, 36]
 	cmn	w0, #1
-	ldr	x1, [x29, 200]
-	ldr	w6, [x29, 100]
-	ldr	w5, [x29, 120]
-	strb	w6, [x1]
-	beq	.L2208
-.L2279:
-	mov	w5, w0
-.L2204:
-	cmn	w5, #1
-	cset	w4, eq
-	cmp	w27, 16
-	cset	w0, ne
-	tst	w4, w0
-	beq	.L2210
-	mov	w0, 16
-	mov	w27, 16
-	bl	nandc_bch_sel
-	b	.L2203
-.L2206:
-	str	w5, [x29, 120]
-	mov	w4, w25
-	add	x3, x29, 208
+	beq	.L2219
+	ldr	x1, [x27, 24]
+	ldr	w1, [x1, 4]
+	cmp	w0, w1
+	beq	.L2219
+.L2218:
+	adrp	x0, .LANCHOR31
+	add	x22, x19, :lo12:.LANCHOR52
+	add	x22, x22, x20, lsl 6
+	mov	w5, 1
+	ldrb	w2, [x0, #:lo12:.LANCHOR31]
+	mov	w0, 24
+	sub	w0, w0, w2
+	ldr	x3, [x22, 24]
+	lsl	w5, w5, w2
+	adrp	x2, .LANCHOR126
+	sub	w5, w5, #1
+	ldr	w1, [x22, 40]
+	ldrb	w4, [x2, #:lo12:.LANCHOR126]
+	mov	x2, x26
+	lsl	w6, w5, w0
+	lsr	w0, w1, w0
+	bic	w1, w1, w6
+	and	w0, w0, w5
+	bl	flash_read_page_en
+	mov	w23, w0
+	ldr	w2, [x22, 36]
+	cmn	w2, #1
+	beq	.L2220
+	ldr	x0, [x22, 24]
+	ldr	w4, [x0, 4]
+	cmp	w2, w4
+	beq	.L2220
+	adrp	x1, .LANCHOR14
+	ldr	w1, [x1, #:lo12:.LANCHOR14]
+	tbz	x1, 6, .L2220
+	ldr	w3, [x0]
+	adrp	x0, .LC131
+	ldr	w1, [x22, 40]
+	add	x0, x0, :lo12:.LC131
+	bl	printf
+.L2220:
+	add	x0, x19, :lo12:.LANCHOR52
+	add	x0, x0, x20, lsl 6
+	ldr	w1, [x0, 36]
+	cmn	w1, #1
+	beq	.L2219
+	ldr	x0, [x0, 24]
+	ldr	w0, [x0, 4]
+	cmp	w1, w0
+	beq	.L2219
+	adrp	x1, .LANCHOR176
+	adrp	x0, .LC0
+	mov	w2, 360
+	add	x1, x1, :lo12:.LANCHOR176
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2219:
+	add	x0, x19, :lo12:.LANCHOR52
+	mov	w1, 13
+	add	x20, x0, x20, lsl 6
+	cmn	w25, #1
+	strb	w1, [x20, 58]
+	ldrb	w1, [x20, 2]
+	str	w23, [x20, 52]
+	orr	w1, w1, 8
+	strb	w1, [x20, 2]
+	beq	.L2221
+	add	x0, x0, x21, lsl 6
+	ldr	w1, [x0, 36]
+	cmn	w1, #1
+	beq	.L2223
+	ldr	x0, [x0, 24]
+	ldr	w0, [x0, 4]
+	cmp	w1, w0
+	beq	.L2223
+.L2221:
+	adrp	x0, .LANCHOR31
+	add	x20, x19, :lo12:.LANCHOR52
+	add	x20, x20, x21, lsl 6
+	mov	w5, 1
+	ldrb	w2, [x0, #:lo12:.LANCHOR31]
+	mov	w0, 24
+	sub	w0, w0, w2
+	ldr	x3, [x20, 24]
+	lsl	w5, w5, w2
+	adrp	x2, .LANCHOR126
+	sub	w5, w5, #1
+	ldr	w1, [x20, 40]
+	ldrb	w4, [x2, #:lo12:.LANCHOR126]
 	mov	x2, x24
-	mov	w1, w23
-	mov	w0, 0
-	blr	x6
-	cmn	w0, #1
-	ldr	w5, [x29, 120]
-	beq	.L2207
-	b	.L2279
+	lsl	w6, w5, w0
+	lsr	w0, w1, w0
+	bic	w1, w1, w6
+	and	w0, w0, w5
+	bl	flash_read_page_en
+	ldr	w2, [x20, 36]
+	cmn	w2, #1
+	beq	.L2225
+	ldr	x0, [x20, 24]
+	ldr	w4, [x0, 4]
+	cmp	w2, w4
+	beq	.L2225
+	adrp	x1, .LANCHOR14
+	ldr	w1, [x1, #:lo12:.LANCHOR14]
+	tbz	x1, 6, .L2225
+	ldr	w3, [x0]
+	adrp	x0, .LC131
+	ldr	w1, [x20, 40]
+	add	x0, x0, :lo12:.LC131
+	bl	printf
+.L2225:
+	add	x0, x19, :lo12:.LANCHOR52
+	add	x0, x0, x21, lsl 6
+	ldr	w1, [x0, 36]
+	cmn	w1, #1
+	beq	.L2223
+	ldr	x0, [x0, 24]
+	ldr	w0, [x0, 4]
+	cmp	w1, w0
+	beq	.L2223
+	adrp	x1, .LANCHOR176
+	adrp	x0, .LC0
+	mov	w2, 375
+	add	x1, x1, :lo12:.LANCHOR176
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2223:
+	add	x19, x19, :lo12:.LANCHOR52
+	mov	w0, 13
+	add	x21, x19, x21, lsl 6
+	strb	w0, [x21, 58]
+	ldrb	w0, [x21, 2]
+	str	w23, [x21, 52]
+	orr	w0, w0, 8
+	strb	w0, [x21, 2]
+	b	.L2238
 .L2210:
-	ldr	w0, [x29, 124]
-	bl	nandc_bch_sel
-	cmp	w4, 0
-	ldr	w0, [x29, 160]
-	csinv	w0, w0, wzr, eq
-	str	w0, [x29, 160]
-	ldr	w0, [x29, 136]
-	cmp	w26, 0
-	ccmp	w19, w0, 0, eq
-	bne	.L2212
-	ldr	w0, [x29, 160]
-	cbnz	w0, .L2212
-	ldr	w1, [x24]
-	mov	w0, 18766
-	movk	w0, 0x464e, lsl 16
+	mov	w0, w21
+	mov	w1, 64
+	bl	flash_wait_device_ready
+	mov	w21, w0
+	tbz	x21, 6, .L2238
+	mov	w0, 5
+	tst	w21, w0
+	beq	.L2226
+	add	x19, x19, :lo12:.LANCHOR52
+	mov	w0, 12
+	add	x20, x19, x20, lsl 6
+	mov	w4, 12
+	mov	w2, w21
+	ldrb	w1, [x20, 1]
+	ldr	w3, [x20, 40]
+	strb	w0, [x20, 58]
+	adrp	x0, .LC132
+	add	x0, x0, :lo12:.LC132
+	bl	printf
+.L2302:
+	mov	w0, -1
+	str	w0, [x20, 52]
+	b	.L2204
+.L2226:
+	add	x21, x19, :lo12:.LANCHOR52
+	mov	w0, 13
+	add	x21, x21, x20, lsl 6
+	strb	w0, [x21, 58]
+	adrp	x0, .LANCHOR104
+	ldr	x0, [x0, #:lo12:.LANCHOR104]
+	ldr	w1, [x0, 156]
+	mov	w0, 20041
+	str	wzr, [x21, 52]
+	movk	w0, 0x444b, lsl 16
 	cmp	w1, w0
-	bne	.L2212
-	ldr	w0, [x29, 152]
-	ldrb	w25, [x24, 17]
-	add	w0, w0, w28
-	str	w0, [x29, 152]
-.L2213:
-	add	w26, w28, w26
-	and	w26, w26, 65535
-	b	.L2200
-.L2212:
-	ubfiz	x0, x28, 9, 16
-	str	wzr, [x29, 172]
-	add	x24, x24, x0
-	b	.L2213
-.L2217:
-	ldr	w3, [x0, x1, lsl 2]
-	add	x1, x1, 1
-	add	x2, x21, x1, lsl 2
-	ldr	w2, [x2, -4]
-	cmp	w3, w2
-	beq	.L2216
-	mov	w2, 512
-	mov	w1, 0
-	bl	ftl_memset
-	mov	w1, w23
+	bne	.L2238
+	ldrh	w0, [x21, 50]
+	cbnz	w0, .L2238
+	adrp	x0, .LANCHOR31
+	mov	w5, 1
+	adrp	x22, .LANCHOR168
+	ldr	w1, [x21, 40]
+	ldrb	w2, [x0, #:lo12:.LANCHOR31]
+	mov	w0, 24
+	ldr	x3, [x22, #:lo12:.LANCHOR168]
+	sub	w0, w0, w2
+	lsl	w5, w5, w2
+	adrp	x2, .LANCHOR126
+	sub	w5, w5, #1
+	ldrb	w4, [x2, #:lo12:.LANCHOR126]
+	adrp	x2, .LANCHOR169
+	lsl	w6, w5, w0
+	ldr	x2, [x2, #:lo12:.LANCHOR169]
+	lsr	w0, w1, w0
+	bic	w1, w1, w6
+	and	w0, w0, w5
+	bl	flash_read_page_en
+	cmn	w0, #1
+	beq	.L2227
+	ldr	x1, [x22, #:lo12:.LANCHOR168]
+	ldr	x2, [x21, 24]
+	ldr	w1, [x1]
+	ldr	w2, [x2]
+	cmp	w2, w1
+	beq	.L2238
+.L2227:
+	add	x19, x19, :lo12:.LANCHOR52
+	adrp	x1, .LANCHOR48
+	add	x20, x19, x20, lsl 6
+	mov	w3, w0
+	ldrb	w4, [x1, #:lo12:.LANCHOR48]
 	adrp	x0, .LC133
 	add	x0, x0, :lo12:.LC133
+	ldrb	w1, [x20, 1]
+	ldr	w2, [x20, 40]
 	bl	printf
-	mov	w1, w19
-	mov	w0, 0
-	bl	flash_erase_block
-.L2182:
-	ldr	w0, [x29, 196]
-	add	w0, w0, 1
-	str	w0, [x29, 196]
-	cmp	w0, 4
-	bne	.L2219
-.L2223:
-	mov	w0, 0
-	bl	zftl_flash_exit_slc_mode
-	adrp	x0, .LANCHOR0
-	ldrb	w1, [x29, 180]
-	strb	w1, [x0, #:lo12:.LANCHOR0]
-	ldr	w0, [x29, 188]
-	cbz	w0, .L2220
-	adrp	x0, .LANCHOR19
-	ldrb	w1, [x29, 192]
-	strb	w1, [x0, #:lo12:.LANCHOR19]
-.L2220:
-	mov	w1, 2
-	adrp	x0, .LANCHOR33
-	strb	w1, [x0, #:lo12:.LANCHOR33]
-	mov	w0, 0
-	bl	zftl_flash_enter_slc_mode
-	ldr	w0, [x29, 184]
-	cbnz	w0, .L2177
+	mov	w0, -1
+	str	w0, [x20, 52]
+	b	.L2238
+.L2213:
+	cmp	w2, 11
+	mov	w1, 3
+	mov	w5, 10
+	csel	w5, w5, w1, eq
+	adrp	x1, .LANCHOR31
+	mov	w4, 24
+	mov	w2, 1
+	add	x22, x19, :lo12:.LANCHOR52
+	ldrb	w3, [x1, #:lo12:.LANCHOR31]
+	ubfiz	x0, x0, 6, 8
+	add	x0, x22, x0
+	mov	x24, x1
+	sub	w4, w4, w3
+	lsl	w2, w2, w3
+	sub	w2, w2, #1
+	lsr	w3, w21, w4
+	and	w3, w3, w2
+	and	w3, w3, 65535
+.L2229:
+	ldrb	w1, [x0]
+	cmp	w1, 255
+	bne	.L2236
+	mov	w21, -1
+	b	.L2204
+.L2236:
+	sxtw	x23, w1
+	ubfiz	x0, x1, 6, 8
+	add	x1, x22, x23, lsl 6
+	add	x0, x22, x0
+	ldrb	w6, [x1, 58]
+	cmp	w6, w5
+	bne	.L2229
+	ldr	w1, [x1, 40]
+	lsr	w1, w1, w4
+	and	w1, w1, w2
+	cmp	w3, w1
+	bne	.L2229
+	mov	w0, w21
+	mov	w1, 64
+	bl	flash_wait_device_ready
+	mov	w21, w0
+	tbnz	x21, 6, .L2231
+.L2301:
+	mov	w21, 0
+	b	.L2232
+.L2231:
+	tst	x21, 15
+	beq	.L2233
+	add	x22, x22, x20, lsl 6
+	mov	w2, w0
+	mov	w4, 12
 	adrp	x0, .LC134
-	mov	w1, 0
 	add	x0, x0, :lo12:.LC134
+	ldrb	w1, [x22, 1]
+	ldr	w3, [x22, 40]
+	bl	printf
+	mov	w0, 12
+	strb	w0, [x22, 58]
+	mov	w0, -1
+	str	w0, [x22, 52]
+.L2232:
+	add	x1, x19, :lo12:.LANCHOR52
+	add	x20, x1, x20, lsl 6
+	add	x1, x1, x23, lsl 6
+	ldrb	w0, [x20, 58]
+	strb	w0, [x1, 58]
+	ldr	w0, [x20, 52]
+	str	w0, [x1, 52]
+.L2204:
+	mov	w0, w21
+	ldr	x27, [sp, 80]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	ret
+.L2233:
+	add	x21, x22, x20, lsl 6
+	mov	w0, 13
+	strb	w0, [x21, 58]
+	adrp	x0, .LANCHOR104
+	ldr	x0, [x0, #:lo12:.LANCHOR104]
+	ldr	w1, [x0, 156]
+	mov	w0, 20041
+	str	wzr, [x21, 52]
+	movk	w0, 0x444b, lsl 16
+	cmp	w1, w0
+	bne	.L2301
+	ldrh	w0, [x21, 50]
+	cbnz	w0, .L2301
+	ldrb	w2, [x24, #:lo12:.LANCHOR31]
+	mov	w5, 1
+	mov	w0, 24
+	adrp	x22, .LANCHOR168
+	sub	w0, w0, w2
+	ldr	w1, [x21, 40]
+	lsl	w5, w5, w2
+	adrp	x2, .LANCHOR126
+	sub	w5, w5, #1
+	ldr	x3, [x22, #:lo12:.LANCHOR168]
+	ldrb	w4, [x2, #:lo12:.LANCHOR126]
+	adrp	x2, .LANCHOR169
+	lsl	w6, w5, w0
+	ldr	x2, [x2, #:lo12:.LANCHOR169]
+	lsr	w0, w1, w0
+	bic	w1, w1, w6
+	and	w0, w0, w5
+	bl	flash_read_page_en
+	cmn	w0, #1
+	beq	.L2235
+	ldr	x1, [x22, #:lo12:.LANCHOR168]
+	ldr	x2, [x21, 24]
+	ldr	w1, [x1]
+	ldr	w2, [x2]
+	cmp	w2, w1
+	beq	.L2301
+.L2235:
+	add	x21, x19, :lo12:.LANCHOR52
+	adrp	x1, .LANCHOR48
+	add	x21, x21, x20, lsl 6
+	mov	w3, w0
+	ldrb	w4, [x1, #:lo12:.LANCHOR48]
+	adrp	x0, .LC135
+	add	x0, x0, :lo12:.LC135
+	ldrb	w1, [x21, 1]
+	ldr	w2, [x21, 40]
 	bl	printf
-.L2177:
-	adrp	x0, .LANCHOR138
-	adrp	x19, .LANCHOR137
-	str	wzr, [x0, #:lo12:.LANCHOR138]
-	ldr	x0, [x19, #:lo12:.LANCHOR137]
-	cbz	x0, .L2222
-	bl	free
-	str	xzr, [x19, #:lo12:.LANCHOR137]
-.L2222:
-	adrp	x19, .LANCHOR139
-	ldr	x0, [x19, #:lo12:.LANCHOR139]
-	cbz	x0, .L2280
-	bl	free
-	str	xzr, [x19, #:lo12:.LANCHOR139]
-	b	.L2280
-	.size	idb_write_data, .-idb_write_data
-	.section	.text.flash_start_tlc_page_prog,"ax",@progbits
+	mov	w0, -1
+	str	w0, [x21, 52]
+	b	.L2301
+.L2211:
+	mov	w0, w21
+	mov	w1, 32
+	bl	flash_wait_device_ready
+	mov	w21, w0
+	tbz	x21, 5, .L2238
+	add	x19, x19, :lo12:.LANCHOR52
+	tst	x21, 15
+	add	x20, x19, x20, lsl 6
+	beq	.L2237
+	mov	w0, 12
+	strb	w0, [x20, 58]
+	b	.L2302
+.L2237:
+	mov	w0, 13
+	str	wzr, [x20, 52]
+	strb	w0, [x20, 58]
+	b	.L2238
+.L2212:
+	mov	w1, 64
+	mov	w0, w21
+	bl	flash_wait_device_ready
+	tbz	x0, 6, .L2238
+	add	x19, x19, :lo12:.LANCHOR52
+	add	x19, x19, x20, lsl 6
+	str	w0, [x19, 52]
+	mov	w0, 7
+	strb	w0, [x19, 58]
+	b	.L2238
+	.size	queue_wait_first_req_completed, .-queue_wait_first_req_completed
+	.section	.text.sblk_prog_page,"ax",@progbits
 	.align	2
-	.global	flash_start_tlc_page_prog
-	.type	flash_start_tlc_page_prog, %function
-flash_start_tlc_page_prog:
-	stp	x29, x30, [sp, -80]!
+	.global	sblk_prog_page
+	.type	sblk_prog_page, %function
+sblk_prog_page:
+	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
-	stp	x25, x26, [sp, 64]
-	and	w25, w0, 255
-	adrp	x0, .LANCHOR18
 	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	ldrh	w0, [x0, 50]
+	and	w20, w1, 255
 	stp	x21, x22, [sp, 32]
-	and	w21, w1, 255
 	stp	x23, x24, [sp, 48]
-	and	w26, w3, 255
-	ldrb	w1, [x0, #:lo12:.LANCHOR18]
-	and	w22, w2, 255
-	mov	w20, w4
-	mov	x23, x5
-	mov	x24, x6
-	cmp	w1, w26
-	mov	x19, x0
-	bhi	.L2283
-	adrp	x1, .LANCHOR173
-	adrp	x0, .LC0
-	mov	w2, 740
-	add	x1, x1, :lo12:.LANCHOR173
-	add	x0, x0, :lo12:.LC0
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	cbz	w0, .L2304
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L2304
+	ldr	w1, [x19, 40]
+	adrp	x0, .LC136
+	mov	w2, w20
+	add	x0, x0, :lo12:.LC136
 	bl	printf
-.L2283:
-	ldrb	w0, [x19, #:lo12:.LANCHOR18]
-	cmp	w0, w26
-	bls	.L2282
-	adrp	x0, .LANCHOR30
-	add	x0, x0, :lo12:.LANCHOR30
-	ldrb	w4, [x0, w26, sxtw]
-	adrp	x0, .LANCHOR13
-	ldr	x19, [x0, #:lo12:.LANCHOR13]
-	mov	w0, w4
-	bl	nandc_cs
-	cbz	w25, .L2285
-	sxtw	x0, w4
-	add	x0, x0, 8
-	add	x0, x19, x0, lsl 8
-	str	w25, [x0, 8]
-.L2285:
-	ubfiz	x4, x4, 8, 8
-	mov	w0, 128
-	add	x19, x19, x4
-	str	w21, [x19, 2056]
-	str	w0, [x19, 2056]
-	and	w0, w20, 255
-	str	wzr, [x19, 2052]
-	str	wzr, [x19, 2052]
-	str	w0, [x19, 2052]
-	lsr	w0, w20, 8
-	str	w0, [x19, 2052]
-	lsr	w0, w20, 16
-	add	w20, w20, w20, lsl 1
-	str	w0, [x19, 2052]
-	sub	w0, w20, #1
-	add	w0, w0, w21
-	bl	nandc_set_seed
-	adrp	x0, .LANCHOR32+9
-	mov	x3, x24
-	mov	x2, x23
-	ldrb	w1, [x0, #:lo12:.LANCHOR32+9]
-	mov	w0, 1
-	bl	nandc_xfer_start
-	bl	nandc_xfer_done
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	str	w22, [x19, 2056]
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 80
-	b	nandc_de_cs.constprop.30
-.L2282:
+.L2304:
+	adrp	x23, .LANCHOR41
+	adrp	x25, .LANCHOR31
+	add	x23, x23, :lo12:.LANCHOR41
+	add	x26, x25, :lo12:.LANCHOR31
+	mov	w21, 0
+.L2305:
+	cbnz	w20, .L2316
+.L2329:
+	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
 	ret
-	.size	flash_start_tlc_page_prog, .-flash_start_tlc_page_prog
-	.section	.text.queue_tlc_prog_cmd,"ax",@progbits
-	.align	2
-	.type	queue_tlc_prog_cmd, %function
-queue_tlc_prog_cmd:
-	stp	x29, x30, [sp, -48]!
-	mov	w2, 24
-	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	mov	x21, x0
-	adrp	x0, .LANCHOR31
-	mov	w22, 1
-	stp	x19, x20, [sp, 16]
-	ldr	x7, [x21]
-	ldrb	w0, [x0, #:lo12:.LANCHOR31]
-	sub	w2, w2, w0
-	ldr	w1, [x7, 40]
-	lsl	w19, w22, w0
-	lsl	w20, w22, w2
-	sub	w19, w19, #1
-	sub	w20, w20, #1
-	ldr	x5, [x7, 8]
-	and	w20, w20, w1
-	lsr	w1, w1, w2
-	and	w19, w19, w1
-	ldr	x6, [x7, 24]
-	and	w19, w19, 255
-	ldrb	w0, [x7, 60]
-	mov	w4, w20
-	mov	w3, w19
-	mov	w1, w22
-	mov	w2, 26
-	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldp	x7, x0, [x21]
-	mov	w4, w20
-	mov	w3, w19
-	mov	w2, 26
-	mov	w1, 2
-	ldr	x5, [x0, 8]
-	ldr	x6, [x0, 24]
-	ldrb	w0, [x7, 60]
-	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldr	x0, [x21, 16]
-	mov	w4, w20
-	ldr	x7, [x21]
-	mov	w3, w19
-	mov	w2, 16
-	mov	w1, 3
-	ldr	x5, [x0, 8]
-	ldr	x6, [x0, 24]
-	ldrb	w0, [x7, 60]
-	bl	flash_start_tlc_page_prog
-	ldr	x1, [x21]
-	mov	w0, 4
-	strb	w22, [x1, 59]
-	strb	w0, [x1, 58]
+.L2316:
+	ldrb	w24, [x19]
+	ldr	w22, [x19, 40]
+.L2306:
+	mov	w1, 1
+	mov	w0, w22
+	bl	queue_lun_state
+	cbnz	w0, .L2307
+	cmp	w20, 1
+	beq	.L2308
+	ldrb	w0, [x23]
+	cbnz	w0, .L2309
+.L2308:
+	mov	x0, x19
+	bl	queue_prog_cmd
+.L2310:
+	subs	w20, w20, #1
+	beq	.L2329
+	ubfiz	x24, x24, 6, 8
+	adrp	x19, .LANCHOR52
+	add	x19, x19, :lo12:.LANCHOR52
+	add	x19, x19, x24
+	b	.L2305
+.L2307:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L2306
+.L2309:
+	ldrb	w1, [x25, #:lo12:.LANCHOR31]
+	mov	w27, 24
+	mov	w0, 1
+	sub	w27, w27, w1
+	lsl	w0, w0, w1
+	sub	w0, w0, #1
+	lsr	w27, w22, w27
+	and	w27, w27, w0
+	ldrb	w0, [x19]
+	and	w27, w27, 65535
+	cmp	w0, 255
+	bne	.L2311
+	adrp	x1, .LANCHOR177
+	adrp	x0, .LC0
+	mov	w2, 582
+	add	x1, x1, :lo12:.LANCHOR177
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2311:
+	ldrb	w0, [x19]
+	adrp	x1, .LANCHOR52
+	add	x1, x1, :lo12:.LANCHOR52
+	mov	w3, 24
+	mov	w28, 1
+	add	x0, x1, x0, lsl 6
+	ldr	w4, [x0, 40]
+	ldrb	w0, [x26]
+	sub	w3, w3, w0
+	lsl	w0, w28, w0
+	sub	w0, w0, #1
+	lsr	w1, w4, w3
+	and	w0, w0, w1
+	cmp	w27, w0, uxth
+	bne	.L2312
+	adrp	x0, .LANCHOR68
+	ldrh	w2, [x0, #:lo12:.LANCHOR68]
+	adrp	x0, .LANCHOR69
+	ldrb	w1, [x0, #:lo12:.LANCHOR69]
+	sub	w0, w3, w2
+	lsr	w5, w22, w2
+	sub	w3, w1, #1
+	lsl	w0, w28, w0
+	sub	w0, w0, #1
+	lsl	w1, w28, w2
+	and	w0, w0, w3
+	sub	w1, w1, #1
+	and	w0, w0, 65535
+	and	w1, w1, 65535
+	and	w5, w0, w5
+	lsr	w2, w4, w2
+	and	w0, w0, w2
+	and	w22, w1, w22
+	cmp	w5, w0
+	and	w1, w1, w4
+	ccmp	w22, w1, 0, ne
+	bne	.L2312
+	cmp	w21, w3
+	beq	.L2312
+	ldr	w1, [x19, 40]
+	mov	w0, 17
+	ldr	x2, [x19, 8]
+	add	w21, w21, w28
+	ldr	x3, [x19, 24]
+	bl	flash_start_page_prog
+	strb	w28, [x19, 59]
+	mov	w0, 9
+	strb	w0, [x19, 58]
 	mov	w0, -1
-	strb	w0, [x1]
+	strb	w0, [x19]
+	mov	x1, x19
 	adrp	x0, .LANCHOR56
 	add	x0, x0, :lo12:.LANCHOR56
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 48
-	b	buf_add_tail
-	.size	queue_tlc_prog_cmd, .-queue_tlc_prog_cmd
-	.section	.text.sblk_tlc_prog_one_page,"ax",@progbits
+	bl	buf_add_tail
+	b	.L2310
+.L2312:
+	mov	x0, x19
+	mov	w21, 0
+	bl	queue_prog_cmd
+	b	.L2310
+	.size	sblk_prog_page, .-sblk_prog_page
+	.section	.text.sblk_wait_write_queue_completed,"ax",@progbits
 	.align	2
-	.global	sblk_tlc_prog_one_page
-	.type	sblk_tlc_prog_one_page, %function
-sblk_tlc_prog_one_page:
+	.global	sblk_wait_write_queue_completed
+	.type	sblk_wait_write_queue_completed, %function
+sblk_wait_write_queue_completed:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	x19, x0
-	ldr	x0, [x0]
-	ldr	w20, [x0, 40]
-.L2293:
-	mov	w1, 1
-	mov	w0, w20
-	bl	queue_lun_state
-	cbnz	w0, .L2294
-	mov	x0, x19
-	bl	queue_tlc_prog_cmd
-	mov	w0, 0
-	ldp	x19, x20, [sp, 16]
+	str	x19, [sp, 16]
+	adrp	x19, .LANCHOR56
+	add	x19, x19, :lo12:.LANCHOR56
+.L2332:
+	ldrb	w0, [x19]
+	cmp	w0, 255
+	bne	.L2333
+	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2294:
+.L2333:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2293
-	.size	sblk_tlc_prog_one_page, .-sblk_tlc_prog_one_page
-	.section	.text.sblk_xlc_prog_pages,"ax",@progbits
+	b	.L2332
+	.size	sblk_wait_write_queue_completed, .-sblk_wait_write_queue_completed
+	.section	.text.ftl_flush,"ax",@progbits
 	.align	2
-	.global	sblk_xlc_prog_pages
-	.type	sblk_xlc_prog_pages, %function
-sblk_xlc_prog_pages:
-	stp	x29, x30, [sp, -80]!
+	.global	ftl_flush
+	.type	ftl_flush, %function
+ftl_flush:
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR124
 	add	x29, sp, 0
+	ldrb	w1, [x0, #:lo12:.LANCHOR124]
 	stp	x19, x20, [sp, 16]
-	mov	x20, x0
-	ldr	x0, [x0]
-	stp	x23, x24, [sp, 48]
-	mov	x23, x1
-	mov	w24, w2
-	stp	x21, x22, [sp, 32]
-	ldr	w19, [x0, 40]
-	str	x25, [sp, 64]
-.L2297:
-	mov	w1, 1
-	mov	w0, w19
-	bl	queue_lun_state
-	cbnz	w0, .L2298
-	cmp	w24, 2
-	bne	.L2299
-	ldr	x7, [x20]
-	adrp	x0, .LANCHOR31
-	ldr	x3, [x23]
-	mov	w2, 24
-	ldrb	w0, [x0, #:lo12:.LANCHOR31]
-	mov	w22, 1
-	ldr	w1, [x7, 40]
-	sub	w2, w2, w0
-	lsl	w19, w22, w0
-	sub	w19, w19, #1
-	lsl	w21, w22, w2
-	sub	w21, w21, #1
-	and	w25, w1, w21
-	ldr	w3, [x3, 40]
-	lsr	w1, w1, w2
-	and	w19, w19, w1
-	and	w19, w19, 255
-	ldr	x5, [x7, 8]
-	ldr	x6, [x7, 24]
-	and	w21, w21, w3
-	ldrb	w0, [x7, 60]
-	mov	w4, w25
-	mov	w1, w22
-	mov	w3, w19
-	mov	w2, 17
-	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldr	x7, [x20]
-	mov	w4, w21
-	ldr	x0, [x23]
-	mov	w3, w19
-	mov	w1, w22
-	mov	w2, 26
-	ldr	x5, [x0, 8]
-	ldr	x6, [x0, 24]
-	ldrb	w0, [x7, 60]
-	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldp	x7, x0, [x20]
-	mov	w4, w25
-	mov	w3, w19
-	mov	w1, w24
-	mov	w2, 17
-	ldr	x5, [x0, 8]
-	ldr	x6, [x0, 24]
-	ldrb	w0, [x7, 60]
-	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldr	x7, [x20]
-	mov	w4, w21
-	ldr	x0, [x23, 8]
-	mov	w3, w19
-	mov	w1, w24
-	mov	w2, 26
-	ldr	x5, [x0, 8]
-	ldr	x6, [x0, 24]
-	ldrb	w0, [x7, 60]
-	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldr	x7, [x20]
-	mov	w4, w25
-	ldr	x0, [x20, 16]
-	mov	w3, w19
-	mov	w2, 17
-	mov	w1, 3
-	ldr	x5, [x0, 8]
-	ldr	x6, [x0, 24]
-	ldrb	w0, [x7, 60]
-	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldr	x0, [x23, 16]
-	mov	w1, 3
-	ldr	x7, [x20]
-	mov	w4, w21
-	mov	w3, w19
-	mov	w2, 16
-	ldr	x5, [x0, 8]
-	ldr	x6, [x0, 24]
-	ldrb	w0, [x7, 60]
-	bl	flash_start_tlc_page_prog
-	ldr	x1, [x20]
-	mov	w0, 5
-	strb	w22, [x1, 59]
-	strb	w0, [x1, 58]
+	mov	x19, x0
+	adrp	x20, .LANCHOR178
+	cbz	w1, .L2336
+	ldrb	w2, [x20, #:lo12:.LANCHOR178]
+	adrp	x0, .LANCHOR52
+	add	x0, x0, :lo12:.LANCHOR52
+	add	x0, x0, x2, lsl 6
+	bl	sblk_prog_page
+.L2336:
 	mov	w0, -1
-	strb	w0, [x1]
-	adrp	x0, .LANCHOR56
-	add	x0, x0, :lo12:.LANCHOR56
-	bl	buf_add_tail
-.L2300:
-	mov	w0, 0
-	ldr	x25, [sp, 64]
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 80
-	ret
-.L2298:
-	bl	queue_wait_first_req_completed
-	bl	queue_remove_completed_req
-	b	.L2297
-.L2299:
-	mov	x0, x20
-	bl	queue_tlc_prog_cmd
-	b	.L2300
-	.size	sblk_xlc_prog_pages, .-sblk_xlc_prog_pages
-	.section	.text.sblk_3d_tlc_dump_prog,"ax",@progbits
-	.align	2
-	.global	sblk_3d_tlc_dump_prog
-	.type	sblk_3d_tlc_dump_prog, %function
-sblk_3d_tlc_dump_prog:
-	stp	x29, x30, [sp, -48]!
-	mov	w1, 24
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	x20, x0
-	adrp	x0, .LANCHOR31
-	stp	x21, x22, [sp, 32]
-	mov	w22, 1
-	ldrb	w0, [x0, #:lo12:.LANCHOR31]
-	ldr	w3, [x20, 40]
-	sub	w1, w1, w0
-	lsl	w19, w22, w0
-	sub	w19, w19, #1
-	lsl	w21, w22, w1
-	sub	w21, w21, #1
-	and	w21, w21, w3
-	lsr	w1, w3, w1
-	mov	w2, w3
-	and	w19, w19, w1
-	adrp	x0, .LC135
-	mov	w1, w21
-	add	x0, x0, :lo12:.LC135
-	bl	printf
-	and	w19, w19, 255
-	ldr	x5, [x20, 8]
-	ldr	x6, [x20, 24]
-	mov	w4, w21
-	mov	w3, w19
-	mov	w1, w22
-	mov	w2, 26
-	mov	w0, 0
-	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldr	x5, [x20, 8]
-	mov	w4, w21
-	ldr	x6, [x20, 24]
-	mov	w3, w19
-	mov	w2, 26
-	mov	w1, 2
-	mov	w0, 0
-	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldr	x5, [x20, 8]
-	mov	w4, w21
-	ldr	x6, [x20, 24]
-	mov	w3, w19
-	mov	w2, 16
-	mov	w1, 3
-	mov	w0, 0
-	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldr	w0, [x20, 40]
-	mov	w1, 64
-	ldp	x21, x22, [sp, 32]
+	strb	wzr, [x19, #:lo12:.LANCHOR124]
+	strb	w0, [x20, #:lo12:.LANCHOR178]
+	bl	sblk_wait_write_queue_completed
+	bl	ftl_write_completed
 	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
-	b	flash_wait_device_ready
-	.size	sblk_3d_tlc_dump_prog, .-sblk_3d_tlc_dump_prog
-	.section	.text.flash_start_3d_mlc_page_prog,"ax",@progbits
+	mov	w0, -1
+	ldp	x29, x30, [sp], 32
+	b	ftl_vpn_decrement
+	.size	ftl_flush, .-ftl_flush
+	.section	.text.ftl_read_page,"ax",@progbits
 	.align	2
-	.global	flash_start_3d_mlc_page_prog
-	.type	flash_start_3d_mlc_page_prog, %function
-flash_start_3d_mlc_page_prog:
+	.global	ftl_read_page
+	.type	ftl_read_page, %function
+ftl_read_page:
 	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	and	w21, w0, 255
-	adrp	x0, .LANCHOR18
 	stp	x19, x20, [sp, 16]
-	stp	x23, x24, [sp, 48]
-	and	w24, w1, 255
-	ldrb	w1, [x0, #:lo12:.LANCHOR18]
-	mov	w20, w2
+	and	w19, w0, 255
+	stp	x21, x22, [sp, 32]
+	mov	w20, w1
+	mov	x21, x2
 	mov	x22, x3
-	mov	x23, x4
-	cmp	w1, w24
-	mov	x19, x0
-	bhi	.L2305
-	adrp	x1, .LANCHOR174
-	adrp	x0, .LC0
-	mov	w2, 772
-	add	x1, x1, :lo12:.LANCHOR174
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2305:
-	ldrb	w0, [x19, #:lo12:.LANCHOR18]
-	cmp	w0, w24
-	bls	.L2304
-	adrp	x0, .LANCHOR30
-	add	x0, x0, :lo12:.LANCHOR30
-	ldrb	w4, [x0, w24, sxtw]
-	adrp	x0, .LANCHOR13
-	ldr	x19, [x0, #:lo12:.LANCHOR13]
-	mov	w0, w4
-	bl	nandc_cs
-	ubfiz	x4, x4, 8, 8
-	add	x19, x19, x4
-	mov	w0, 128
-	str	w0, [x19, 2056]
-	and	w0, w20, 255
-	str	wzr, [x19, 2052]
-	str	wzr, [x19, 2052]
-	str	w0, [x19, 2052]
-	lsr	w0, w20, 8
-	str	w0, [x19, 2052]
-	lsr	w0, w20, 16
-	str	w0, [x19, 2052]
-	mov	w0, w20
-	bl	nandc_set_seed
-	adrp	x0, .LANCHOR32+9
-	mov	x3, x23
-	mov	x2, x22
-	ldrb	w1, [x0, #:lo12:.LANCHOR32+9]
-	mov	w0, 1
-	bl	nandc_xfer_start
-	bl	nandc_xfer_done
-	str	w21, [x19, 2056]
-.L2304:
+	str	x23, [sp, 48]
+	mov	w23, w4
+	bl	sblk_wait_write_queue_completed
+	mov	w4, w23
+	mov	x3, x22
+	mov	x2, x21
+	mov	w1, w20
+	mov	w0, w19
+	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
-	ret
-	.size	flash_start_3d_mlc_page_prog, .-flash_start_3d_mlc_page_prog
-	.section	.text.sblk_3d_mlc_prog_pages,"ax",@progbits
+	b	flash_read_page_en
+	.size	ftl_read_page, .-ftl_read_page
+	.section	.text.ftl_read_ppa_page,"ax",@progbits
 	.align	2
-	.global	sblk_3d_mlc_prog_pages
-	.type	sblk_3d_mlc_prog_pages, %function
-sblk_3d_mlc_prog_pages:
-	stp	x29, x30, [sp, -80]!
-	ubfiz	x1, x1, 4, 32
-	add	x1, x1, 8
+	.global	ftl_read_ppa_page
+	.type	ftl_read_ppa_page, %function
+ftl_read_ppa_page:
+	stp	x29, x30, [sp, -64]!
+	mov	w5, 1
 	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w20, w0
+	adrp	x0, .LANCHOR31
+	mov	w19, 24
 	stp	x21, x22, [sp, 32]
-	add	x21, x0, x1
-	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR31
-	adrp	x24, .LANCHOR56
-	str	x25, [sp, 64]
-	add	x23, x23, :lo12:.LANCHOR31
-	add	x24, x24, :lo12:.LANCHOR56
-	add	x25, x0, 8
+	mov	x21, x1
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	mov	x22, x2
+	str	x23, [sp, 48]
+	mov	w23, w3
+	sub	w19, w19, w0
+	lsl	w5, w5, w0
+	sub	w5, w5, #1
+	lsr	w19, w20, w19
+	and	w19, w19, w5
+	and	w19, w19, 255
+	bl	sblk_wait_write_queue_completed
+	mov	w4, w23
+	mov	x3, x22
+	mov	x2, x21
+	mov	w1, w20
+	mov	w0, w19
+	ldr	x23, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	b	flash_read_page_en
+	.size	ftl_read_ppa_page, .-ftl_read_ppa_page
+	.section	.text.sblk_read_page,"ax",@progbits
+	.align	2
+	.global	sblk_read_page
+	.type	sblk_read_page, %function
+sblk_read_page:
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	and	w22, w1, 255
+	stp	x27, x28, [sp, 80]
+	mov	w21, w22
 	stp	x19, x20, [sp, 16]
-	mov	w22, 1
-.L2309:
-	cmp	x21, x25
-	bne	.L2312
-	mov	w0, 0
-	ldr	x25, [sp, 64]
+	adrp	x27, .LANCHOR31
+	stp	x23, x24, [sp, 48]
+	mov	x19, x0
+	stp	x25, x26, [sp, 64]
+	mov	x23, x0
+	adrp	x25, .LANCHOR179
+	add	x28, x27, :lo12:.LANCHOR31
+	add	x25, x25, :lo12:.LANCHOR179
+.L2346:
+	cbnz	w21, .L2356
+.L2369:
+	adrp	x19, .LANCHOR52
+	add	x19, x19, :lo12:.LANCHOR52
+.L2357:
+	cbnz	w22, .L2359
 	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 80
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
 	ret
-.L2312:
-	ldr	x0, [x25, -8]
-	ldr	w19, [x0, 40]
-.L2310:
-	mov	w1, 1
-	mov	w0, w19
+.L2356:
+	ldrb	w24, [x19]
+	ldr	w26, [x19, 40]
+.L2347:
+	mov	w1, 0
+	mov	w0, w26
 	bl	queue_lun_state
-	cbnz	w0, .L2311
-	ldr	x0, [x25, -8]
-	mov	w2, 24
-	ldrb	w1, [x23]
-	add	x25, x25, 16
-	sub	w2, w2, w1
-	ldr	w0, [x0, 40]
-	lsl	w19, w22, w1
-	lsl	w20, w22, w2
-	sub	w19, w19, #1
-	sub	w20, w20, #1
+	cbnz	w0, .L2348
+	cmp	w21, 1
+	beq	.L2353
+	ldrb	w0, [x25]
+	cbnz	w0, .L2350
+.L2353:
+	mov	x0, x19
+	bl	queue_read_cmd
+	b	.L2351
+.L2348:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L2347
+.L2350:
+	ldrb	w1, [x27, #:lo12:.LANCHOR31]
+	mov	w20, 24
+	mov	w0, 1
+	sub	w20, w20, w1
+	lsl	w0, w0, w1
+	sub	w0, w0, #1
+	lsr	w20, w26, w20
 	and	w20, w20, w0
-	lsr	w0, w0, w2
-	and	w19, w19, w0
-	and	w19, w19, 255
-	mov	w0, w19
-	bl	zftl_flash_exit_slc_mode
-	ldr	x0, [x25, -24]
-	mov	w2, w20
-	mov	w1, w19
-	ldr	x3, [x0, 8]
-	ldr	x4, [x0, 24]
-	mov	w0, 16
-	bl	flash_start_3d_mlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldr	x0, [x25, -16]
-	add	w2, w20, 1
-	mov	w1, w19
-	ldr	x3, [x0, 8]
-	ldr	x4, [x0, 24]
-	mov	w0, 16
-	bl	flash_start_3d_mlc_page_prog
-	bl	nandc_de_cs.constprop.30
-	ldr	x1, [x25, -24]
-	mov	w0, 4
-	strb	w22, [x1, 59]
-	strb	w0, [x1, 58]
-	mov	w0, -1
-	strb	w0, [x1]
-	mov	x0, x24
+	ldrb	w0, [x19]
+	and	w20, w20, 65535
+	cmp	w0, 255
+	bne	.L2352
+	adrp	x1, .LANCHOR180
+	adrp	x0, .LC0
+	mov	w2, 660
+	add	x1, x1, :lo12:.LANCHOR180
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2352:
+	ldrb	w4, [x19]
+	adrp	x2, .LANCHOR52
+	add	x2, x2, :lo12:.LANCHOR52
+	ldrb	w7, [x28]
+	mov	w0, 24
+	mov	w3, 1
+	sbfiz	x5, x4, 6, 32
+	sub	w0, w0, w7
+	add	x6, x2, x5
+	lsl	w3, w3, w7
+	sub	w3, w3, #1
+	ldr	w1, [x6, 40]
+	lsr	w0, w1, w0
+	and	w0, w0, w3
+	cmp	w20, w0, uxth
+	bne	.L2353
+	adrp	x0, .LANCHOR105
+	ldrh	w0, [x0, #:lo12:.LANCHOR105]
+	add	w26, w0, w26
+	cmp	w1, w26
+	bne	.L2353
+	ldr	w0, [x19, 40]
+	mov	w26, -1
+	ldrb	w24, [x2, x5]
+	adrp	x20, .LANCHOR56
+	stp	x6, x5, [x29, 96]
+	add	x20, x20, :lo12:.LANCHOR56
+	str	x2, [x29, 112]
+	sub	w21, w21, #1
+	str	w4, [x29, 120]
+	bl	flash_start_plane_read
+	mov	w3, 2
+	strb	wzr, [x19, 59]
+	strb	w3, [x19, 58]
+	mov	x1, x19
+	strb	w26, [x19]
+	mov	x0, x20
+	str	w3, [x29, 124]
+	bl	buf_add_tail
+	ldp	x6, x5, [x29, 96]
+	strb	wzr, [x6, 59]
+	ldr	x2, [x29, 112]
+	mov	x0, x20
+	ldp	w4, w3, [x29, 120]
+	strb	w3, [x6, 58]
+	strb	w26, [x2, x5]
+	ubfiz	x1, x4, 6, 8
+	add	x1, x2, x1
 	bl	buf_add_tail
-	b	.L2309
-.L2311:
+.L2351:
+	subs	w21, w21, #1
+	beq	.L2369
+	ubfiz	x24, x24, 6, 8
+	adrp	x19, .LANCHOR52
+	add	x19, x19, :lo12:.LANCHOR52
+	add	x19, x19, x24
+	b	.L2346
+.L2359:
+	ldrb	w0, [x23, 58]
+	cmp	w0, 13
+	bne	.L2358
+	ldrb	w0, [x23]
+	sub	w22, w22, #1
+	cmp	w0, 255
+	beq	.L2358
+	ubfiz	x23, x0, 6, 8
+	add	x23, x19, x23
+.L2358:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2310
-	.size	sblk_3d_mlc_prog_pages, .-sblk_3d_mlc_prog_pages
-	.section	.text.sblk_mlc_dump_prog,"ax",@progbits
+	b	.L2357
+	.size	sblk_read_page, .-sblk_read_page
+	.section	.text.sblk_tlc_prog_one_page,"ax",@progbits
 	.align	2
-	.global	sblk_mlc_dump_prog
-	.type	sblk_mlc_dump_prog, %function
-sblk_mlc_dump_prog:
-	stp	x29, x30, [sp, -48]!
-	mov	w2, 24
+	.global	sblk_tlc_prog_one_page
+	.type	sblk_tlc_prog_one_page, %function
+sblk_tlc_prog_one_page:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	ldr	x0, [x0]
+	ldr	w20, [x0, 40]
+.L2372:
+	mov	w1, 1
+	mov	w0, w20
+	bl	queue_lun_state
+	cbnz	w0, .L2373
+	mov	x0, x19
+	bl	queue_tlc_prog_cmd
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L2373:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L2372
+	.size	sblk_tlc_prog_one_page, .-sblk_tlc_prog_one_page
+	.section	.text.sblk_xlc_prog_pages,"ax",@progbits
+	.align	2
+	.global	sblk_xlc_prog_pages
+	.type	sblk_xlc_prog_pages, %function
+sblk_xlc_prog_pages:
+	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x20, x0
+	ldr	x0, [x0]
+	stp	x23, x24, [sp, 48]
+	mov	x23, x1
+	mov	w24, w2
+	stp	x21, x22, [sp, 32]
+	ldr	w19, [x0, 40]
+	str	x25, [sp, 64]
+.L2376:
+	mov	w1, 1
+	mov	w0, w19
+	bl	queue_lun_state
+	cbnz	w0, .L2377
+	cmp	w24, 2
+	bne	.L2378
+	ldr	x7, [x20]
 	adrp	x0, .LANCHOR31
-	ldrb	w19, [x0, #:lo12:.LANCHOR31]
-	mov	w0, 1
-	ldr	w1, [x20, 40]
-	sub	w2, w2, w19
-	str	x21, [sp, 32]
-	lsl	w19, w0, w19
+	ldr	x3, [x23]
+	mov	w2, 24
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	mov	w22, 1
+	ldr	w1, [x7, 40]
+	sub	w2, w2, w0
+	lsl	w19, w22, w0
 	sub	w19, w19, #1
-	lsl	w21, w0, w2
+	lsl	w21, w22, w2
 	sub	w21, w21, #1
-	and	w21, w21, w1
+	and	w25, w1, w21
+	ldr	w3, [x3, 40]
 	lsr	w1, w1, w2
 	and	w19, w19, w1
 	and	w19, w19, 255
-	mov	w0, w19
-	bl	zftl_flash_exit_slc_mode
-	ldr	w2, [x20, 40]
-	mov	w1, w21
-	adrp	x0, .LC136
-	add	x0, x0, :lo12:.LC136
-	add	w3, w2, 1
-	bl	printf
-	ldr	x3, [x20, 8]
-	mov	w2, w21
-	ldr	x4, [x20, 24]
-	mov	w1, w19
-	mov	w0, 16
-	bl	flash_start_3d_mlc_page_prog
+	ldr	x5, [x7, 8]
+	ldr	x6, [x7, 24]
+	and	w21, w21, w3
+	ldrb	w0, [x7, 60]
+	mov	w4, w25
+	mov	w1, w22
+	mov	w3, w19
+	mov	w2, 17
+	bl	flash_start_tlc_page_prog
 	bl	nandc_wait_flash_ready
-	ldr	x3, [x20, 8]
-	add	w2, w21, 1
-	ldr	x4, [x20, 24]
-	mov	w1, w19
-	mov	w0, 16
-	bl	flash_start_3d_mlc_page_prog
+	ldr	x7, [x20]
+	mov	w4, w21
+	ldr	x0, [x23]
+	mov	w3, w19
+	mov	w1, w22
+	mov	w2, 26
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
 	bl	nandc_wait_flash_ready
-	ldr	w0, [x20, 40]
-	mov	w1, 64
-	bl	flash_wait_device_ready
-	mov	w2, w0
-	bl	nandc_de_cs.constprop.30
-	ldr	x21, [sp, 32]
-	mov	w0, w2
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
-	ret
-	.size	sblk_mlc_dump_prog, .-sblk_mlc_dump_prog
-	.section	.text.flash_start_page_prog,"ax",@progbits
-	.align	2
-	.global	flash_start_page_prog
-	.type	flash_start_page_prog, %function
-flash_start_page_prog:
-	stp	x29, x30, [sp, -96]!
-	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	and	w21, w0, 255
-	adrp	x0, .LANCHOR31
-	stp	x19, x20, [sp, 16]
-	stp	x25, x26, [sp, 64]
-	mov	w19, 24
-	ldrb	w0, [x0, #:lo12:.LANCHOR31]
-	mov	w20, 1
-	str	x27, [sp, 80]
-	adrp	x27, .LANCHOR18
-	sub	w25, w19, w0
-	stp	x23, x24, [sp, 48]
-	lsl	w20, w20, w0
-	sub	w20, w20, #1
-	lsr	w0, w1, w25
-	and	w20, w20, w0
-	ldrb	w0, [x27, #:lo12:.LANCHOR18]
-	and	w20, w20, 255
-	mov	w24, w1
-	mov	x22, x2
-	mov	x23, x3
-	cmp	w0, w20
-	bhi	.L2317
-	adrp	x1, .LANCHOR175
-	adrp	x0, .LC0
-	mov	w2, 821
-	add	x1, x1, :lo12:.LANCHOR175
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2317:
-	ldrb	w0, [x27, #:lo12:.LANCHOR18]
-	cmp	w0, w20
-	bls	.L2316
-	adrp	x0, .LANCHOR30
-	add	x0, x0, :lo12:.LANCHOR30
-	mov	w19, 1
-	lsl	w19, w19, w25
-	sub	w19, w19, #1
-	ldrb	w26, [x0, w20, sxtw]
-	adrp	x0, .LANCHOR13
-	and	w19, w19, w24
-	ldr	x25, [x0, #:lo12:.LANCHOR13]
-	bl	nandc_rdy_status
-	cbnz	w0, .L2319
-	ldrb	w0, [x27, #:lo12:.LANCHOR18]
-	cmp	w0, 1
-	bne	.L2320
+	ldp	x7, x0, [x20]
+	mov	w4, w25
+	mov	w3, w19
+	mov	w1, w24
+	mov	w2, 17
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
 	bl	nandc_wait_flash_ready
-.L2319:
-	mov	w0, w26
-	bl	hynix_reconfig_rr_para
-	mov	w0, w26
-	bl	nandc_cs
-	tst	x24, 50331648
-	bne	.L2321
-	mov	w0, w19
-	bl	slc_phy_page_address_calc
-	mov	w19, w0
-	adrp	x0, .LANCHOR0
-	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L2322
-	mov	w0, w26
-	bl	zftl_flash_enter_slc_mode
-.L2322:
-	ubfiz	x20, x26, 8, 8
-	mov	w0, 128
-	add	x20, x25, x20
-	str	w0, [x20, 2056]
-	and	w0, w19, 255
-	str	wzr, [x20, 2052]
-	str	wzr, [x20, 2052]
-	str	w0, [x20, 2052]
-	lsr	w0, w19, 8
-	str	w0, [x20, 2052]
-	lsr	w0, w19, 16
-	str	w0, [x20, 2052]
-	mov	w0, w19
-	bl	nandc_set_seed
-	adrp	x0, .LANCHOR32+9
-	mov	x3, x23
-	mov	x2, x22
-	ldrb	w1, [x0, #:lo12:.LANCHOR32+9]
-	mov	w0, 1
-	bl	nandc_xfer_start
-	bl	nandc_xfer_done
-	mov	x0, 200
-	bl	udelay
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldr	x27, [sp, 80]
-	str	w21, [x20, 2056]
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 96
-	b	nandc_de_cs.constprop.30
-.L2320:
-	mov	w2, 64
-	mov	w1, w19
-	mov	w0, w20
-	bl	flash_wait_device_ready_raw
-	b	.L2319
-.L2321:
-	mov	w0, w26
-	bl	zftl_flash_exit_slc_mode
-	b	.L2322
-.L2316:
+	ldr	x7, [x20]
+	mov	w4, w21
+	ldr	x0, [x23, 8]
+	mov	w3, w19
+	mov	w1, w24
+	mov	w2, 26
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x7, [x20]
+	mov	w4, w25
+	ldr	x0, [x20, 16]
+	mov	w3, w19
+	mov	w2, 17
+	mov	w1, 3
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x0, [x23, 16]
+	mov	w1, 3
+	ldr	x7, [x20]
+	mov	w4, w21
+	mov	w3, w19
+	mov	w2, 16
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
+	ldr	x1, [x20]
+	mov	w0, 5
+	strb	w22, [x1, 59]
+	strb	w0, [x1, 58]
+	mov	w0, -1
+	strb	w0, [x1]
+	adrp	x0, .LANCHOR56
+	add	x0, x0, :lo12:.LANCHOR56
+	bl	buf_add_tail
+.L2379:
+	mov	w0, 0
+	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldr	x27, [sp, 80]
-	ldp	x29, x30, [sp], 96
+	ldp	x29, x30, [sp], 80
 	ret
-	.size	flash_start_page_prog, .-flash_start_page_prog
-	.section	.text.queue_prog_cmd,"ax",@progbits
-	.align	2
-	.type	queue_prog_cmd, %function
-queue_prog_cmd:
-	stp	x29, x30, [sp, -32]!
-	add	x29, sp, 0
-	ldr	w1, [x0, 40]
-	ldr	x3, [x0, 24]
-	ldr	x2, [x0, 8]
-	str	x19, [sp, 16]
-	mov	x19, x0
-	mov	w0, 16
-	bl	flash_start_page_prog
-	adrp	x0, .LANCHOR56
-	ldr	w3, [x19, 40]
-	ldrb	w1, [x0, #:lo12:.LANCHOR56]
-	cmp	w1, 255
-	beq	.L2328
-	adrp	x2, .LANCHOR31
-	mov	w5, 24
-	adrp	x6, .LANCHOR52
-	add	x6, x6, :lo12:.LANCHOR52
-	ldrb	w4, [x2, #:lo12:.LANCHOR31]
-	mov	w2, 1
-	mov	x8, x6
-	sub	w5, w5, w4
-	lsl	w2, w2, w4
-	sub	w2, w2, #1
-	and	w2, w2, 65535
-	asr	w3, w3, w5
-	and	w3, w3, w2
-.L2330:
-	add	x7, x6, x1, lsl 6
-	ldr	w4, [x7, 40]
-	lsr	w4, w4, w5
-	and	w4, w2, w4
-	cmp	w3, w4
-	bne	.L2329
-	ldrb	w4, [x7, 58]
-	cmp	w4, 7
-	bne	.L2329
-	mov	w1, 3
-	strb	w1, [x7, 58]
-.L2328:
-	mov	w1, 3
-	strb	w1, [x19, 58]
-	mov	w1, 1
-	strb	w1, [x19, 59]
-	mov	w1, -1
-	strb	w1, [x19]
-	mov	x1, x19
-	add	x0, x0, :lo12:.LANCHOR56
-	ldr	x19, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	b	buf_add_tail
-.L2329:
-	lsl	x1, x1, 6
-	ldrb	w1, [x8, x1]
-	cmp	w1, 255
-	bne	.L2330
-	b	.L2328
-	.size	queue_prog_cmd, .-queue_prog_cmd
-	.section	.text.sblk_prog_page,"ax",@progbits
+.L2377:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L2376
+.L2378:
+	mov	x0, x20
+	bl	queue_tlc_prog_cmd
+	b	.L2379
+	.size	sblk_xlc_prog_pages, .-sblk_xlc_prog_pages
+	.section	.text.sblk_3d_mlc_prog_pages,"ax",@progbits
 	.align	2
-	.global	sblk_prog_page
-	.type	sblk_prog_page, %function
-sblk_prog_page:
-	stp	x29, x30, [sp, -96]!
+	.global	sblk_3d_mlc_prog_pages
+	.type	sblk_3d_mlc_prog_pages, %function
+sblk_3d_mlc_prog_pages:
+	stp	x29, x30, [sp, -80]!
+	ubfiz	x1, x1, 4, 32
+	add	x1, x1, 8
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	x19, x0
-	ldrh	w0, [x0, 50]
-	and	w20, w1, 255
 	stp	x21, x22, [sp, 32]
+	add	x21, x0, x1
 	stp	x23, x24, [sp, 48]
-	stp	x25, x26, [sp, 64]
-	stp	x27, x28, [sp, 80]
-	cbz	w0, .L2337
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2337
-	ldr	w1, [x19, 40]
-	adrp	x0, .LC137
-	mov	w2, w20
-	add	x0, x0, :lo12:.LC137
-	bl	printf
-.L2337:
-	adrp	x23, .LANCHOR41
-	adrp	x25, .LANCHOR31
-	add	x23, x23, :lo12:.LANCHOR41
-	add	x26, x25, :lo12:.LANCHOR31
-	mov	w21, 0
-.L2338:
-	cbnz	w20, .L2349
-.L2362:
+	adrp	x23, .LANCHOR31
+	adrp	x24, .LANCHOR56
+	str	x25, [sp, 64]
+	add	x23, x23, :lo12:.LANCHOR31
+	add	x24, x24, :lo12:.LANCHOR56
+	add	x25, x0, 8
+	stp	x19, x20, [sp, 16]
+	mov	w22, 1
+.L2382:
+	cmp	x21, x25
+	bne	.L2385
 	mov	w0, 0
+	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 96
+	ldp	x29, x30, [sp], 80
 	ret
-.L2349:
-	ldrb	w24, [x19]
-	ldr	w22, [x19, 40]
-.L2339:
+.L2385:
+	ldr	x0, [x25, -8]
+	ldr	w19, [x0, 40]
+.L2383:
 	mov	w1, 1
-	mov	w0, w22
+	mov	w0, w19
 	bl	queue_lun_state
-	cbnz	w0, .L2340
-	cmp	w20, 1
-	beq	.L2341
-	ldrb	w0, [x23]
-	cbnz	w0, .L2342
-.L2341:
-	mov	x0, x19
-	bl	queue_prog_cmd
-.L2343:
-	subs	w20, w20, #1
-	beq	.L2362
-	ubfiz	x24, x24, 6, 8
-	adrp	x19, .LANCHOR52
-	add	x19, x19, :lo12:.LANCHOR52
-	add	x19, x19, x24
-	b	.L2338
-.L2340:
-	bl	queue_wait_first_req_completed
-	bl	queue_remove_completed_req
-	b	.L2339
-.L2342:
-	ldrb	w1, [x25, #:lo12:.LANCHOR31]
-	mov	w27, 24
-	mov	w0, 1
-	sub	w27, w27, w1
-	lsl	w0, w0, w1
-	sub	w0, w0, #1
-	lsr	w27, w22, w27
-	and	w27, w27, w0
-	ldrb	w0, [x19]
-	and	w27, w27, 65535
-	cmp	w0, 255
-	bne	.L2344
-	adrp	x1, .LANCHOR176
-	adrp	x0, .LC0
-	mov	w2, 583
-	add	x1, x1, :lo12:.LANCHOR176
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2344:
-	ldrb	w0, [x19]
-	adrp	x1, .LANCHOR52
-	add	x1, x1, :lo12:.LANCHOR52
-	mov	w3, 24
-	mov	w28, 1
-	add	x0, x1, x0, lsl 6
-	ldr	w4, [x0, 40]
-	ldrb	w0, [x26]
-	sub	w3, w3, w0
-	lsl	w0, w28, w0
-	sub	w0, w0, #1
-	lsr	w1, w4, w3
-	and	w0, w0, w1
-	cmp	w27, w0, uxth
-	bne	.L2345
-	adrp	x0, .LANCHOR68
-	ldrh	w2, [x0, #:lo12:.LANCHOR68]
-	adrp	x0, .LANCHOR69
-	ldrb	w1, [x0, #:lo12:.LANCHOR69]
-	sub	w0, w3, w2
-	lsr	w5, w22, w2
-	sub	w3, w1, #1
-	lsl	w0, w28, w0
-	sub	w0, w0, #1
-	lsl	w1, w28, w2
-	and	w0, w0, w3
-	sub	w1, w1, #1
-	and	w0, w0, 65535
-	and	w1, w1, 65535
-	and	w5, w0, w5
-	lsr	w2, w4, w2
-	and	w0, w0, w2
-	and	w22, w1, w22
-	cmp	w5, w0
-	and	w1, w1, w4
-	ccmp	w22, w1, 0, ne
-	bne	.L2345
-	cmp	w21, w3
-	beq	.L2345
-	ldr	w1, [x19, 40]
-	mov	w0, 17
-	ldr	x2, [x19, 8]
-	add	w21, w21, w28
-	ldr	x3, [x19, 24]
-	bl	flash_start_page_prog
-	strb	w28, [x19, 59]
-	mov	w0, 9
-	strb	w0, [x19, 58]
+	cbnz	w0, .L2384
+	ldr	x0, [x25, -8]
+	mov	w2, 24
+	ldrb	w1, [x23]
+	add	x25, x25, 16
+	sub	w2, w2, w1
+	ldr	w0, [x0, 40]
+	lsl	w19, w22, w1
+	lsl	w20, w22, w2
+	sub	w19, w19, #1
+	sub	w20, w20, #1
+	and	w20, w20, w0
+	lsr	w0, w0, w2
+	and	w19, w19, w0
+	and	w19, w19, 255
+	mov	w0, w19
+	bl	zftl_flash_exit_slc_mode
+	ldr	x0, [x25, -24]
+	mov	w2, w20
+	mov	w1, w19
+	ldr	x3, [x0, 8]
+	ldr	x4, [x0, 24]
+	mov	w0, 16
+	bl	flash_start_3d_mlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x0, [x25, -16]
+	add	w2, w20, 1
+	mov	w1, w19
+	ldr	x3, [x0, 8]
+	ldr	x4, [x0, 24]
+	mov	w0, 16
+	bl	flash_start_3d_mlc_page_prog
+	bl	nandc_de_cs.constprop.31
+	ldr	x1, [x25, -24]
+	mov	w0, 4
+	strb	w22, [x1, 59]
+	strb	w0, [x1, 58]
 	mov	w0, -1
-	strb	w0, [x19]
-	mov	x1, x19
-	adrp	x0, .LANCHOR56
-	add	x0, x0, :lo12:.LANCHOR56
+	strb	w0, [x1]
+	mov	x0, x24
 	bl	buf_add_tail
-	b	.L2343
-.L2345:
-	mov	x0, x19
-	mov	w21, 0
-	bl	queue_prog_cmd
-	b	.L2343
-	.size	sblk_prog_page, .-sblk_prog_page
-	.section	.text.ftl_flush,"ax",@progbits
-	.align	2
-	.global	ftl_flush
-	.type	ftl_flush, %function
-ftl_flush:
-	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR123
-	add	x29, sp, 0
-	ldrb	w1, [x0, #:lo12:.LANCHOR123]
-	stp	x19, x20, [sp, 16]
-	mov	x19, x0
-	adrp	x20, .LANCHOR177
-	cbz	w1, .L2365
-	ldrb	w2, [x20, #:lo12:.LANCHOR177]
-	adrp	x0, .LANCHOR52
-	add	x0, x0, :lo12:.LANCHOR52
-	add	x0, x0, x2, lsl 6
-	bl	sblk_prog_page
-.L2365:
-	mov	w0, -1
-	strb	wzr, [x19, #:lo12:.LANCHOR123]
-	strb	w0, [x20, #:lo12:.LANCHOR177]
-	bl	sblk_wait_write_queue_completed
-	bl	ftl_write_completed
-	ldp	x19, x20, [sp, 16]
-	mov	w0, -1
-	ldp	x29, x30, [sp], 32
-	b	ftl_vpn_decrement
-	.size	ftl_flush, .-ftl_flush
+	b	.L2382
+.L2384:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L2383
+	.size	sblk_3d_mlc_prog_pages, .-sblk_3d_mlc_prog_pages
 	.section	.text.flash_prog_page_en,"ax",@progbits
 	.align	2
 	.global	flash_prog_page_en
@@ -14640,51 +14825,51 @@ flash_prog_page_en:
 	ubfx	x24, x20, 24, 2
 	cmp	w1, w21
 	mov	x19, x0
-	bhi	.L2371
-	adrp	x1, .LANCHOR178
+	bhi	.L2388
+	adrp	x1, .LANCHOR181
 	adrp	x0, .LC0
-	mov	w2, 554
-	add	x1, x1, :lo12:.LANCHOR178
+	mov	w2, 564
+	add	x1, x1, :lo12:.LANCHOR181
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2371:
+.L2388:
 	ldrb	w0, [x19, #:lo12:.LANCHOR18]
 	cmp	w0, w21
-	bls	.L2382
+	bls	.L2399
 	adrp	x0, .LANCHOR30
 	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w27, [x0, w21, sxtw]
-	cbnz	w24, .L2384
+	cbnz	w24, .L2401
 	adrp	x0, .LANCHOR0
 	ldrb	w1, [x0, #:lo12:.LANCHOR0]
 	adrp	x0, .LANCHOR1
-	cbz	w1, .L2374
+	cbz	w1, .L2391
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
-	cbz	w1, .L2384
-.L2374:
+	cbz	w1, .L2401
+.L2391:
 	adrp	x1, .LANCHOR2
 	ldrb	w0, [x0, #:lo12:.LANCHOR1]
 	ldrh	w1, [x1, #:lo12:.LANCHOR2]
 	udiv	w19, w20, w1
 	mul	w19, w19, w1
 	sub	w1, w20, w19
-	cbz	w0, .L2375
+	cbz	w0, .L2392
 	add	w19, w19, w1, lsl 1
-.L2373:
+.L2390:
 	adrp	x24, .LANCHOR14
-	adrp	x25, .LC138
+	adrp	x25, .LC137
 	add	x24, x24, :lo12:.LANCHOR14
-	add	x25, x25, :lo12:.LC138
-	adrp	x26, .LANCHOR166
-.L2379:
+	add	x25, x25, :lo12:.LC137
+	adrp	x26, .LANCHOR168
+.L2396:
 	ldr	w0, [x24]
-	tbz	x0, 4, .L2376
+	tbz	x0, 4, .L2393
 	mov	w3, w19
 	mov	w2, w20
 	mov	w1, w27
 	mov	x0, x25
 	bl	printf
-.L2376:
+.L2393:
 	mov	w4, w28
 	mov	x3, x22
 	mov	x2, x23
@@ -14693,12 +14878,12 @@ flash_prog_page_en:
 	bl	flash_prog_page
 	mov	w5, w0
 	ldr	w0, [x29, 124]
-	cbz	w0, .L2377
-	adrp	x6, .LANCHOR167
-	ldr	x3, [x26, #:lo12:.LANCHOR166]
+	cbz	w0, .L2394
+	adrp	x6, .LANCHOR169
+	ldr	x3, [x26, #:lo12:.LANCHOR168]
 	mov	w4, w28
 	str	x6, [x29, 112]
-	ldr	x2, [x6, #:lo12:.LANCHOR167]
+	ldr	x2, [x6, #:lo12:.LANCHOR169]
 	mov	w1, w20
 	mov	w0, w21
 	str	w5, [x29, 104]
@@ -14708,78 +14893,78 @@ flash_prog_page_en:
 	mov	w4, w0
 	ccmn	w0, #1, 4, ne
 	mov	x7, x6
-	beq	.L2378
-	ldr	x0, [x6, #:lo12:.LANCHOR167]
+	beq	.L2395
+	ldr	x0, [x6, #:lo12:.LANCHOR169]
 	ldr	w1, [x23]
 	ldr	w5, [x29, 104]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	bne	.L2378
-	ldr	x0, [x26, #:lo12:.LANCHOR166]
+	bne	.L2395
+	ldr	x0, [x26, #:lo12:.LANCHOR168]
 	ldr	w1, [x22]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	beq	.L2377
-.L2378:
+	beq	.L2394
+.L2395:
 	str	w4, [x29, 112]
 	mov	w3, 4
 	str	x7, [x29, 104]
 	mov	w2, w3
 	mov	x1, x23
-	adrp	x0, .LC139
-	add	x0, x0, :lo12:.LC139
+	adrp	x0, .LC138
+	add	x0, x0, :lo12:.LC138
 	bl	rknand_print_hex
 	mov	w3, 4
 	mov	x1, x22
 	mov	w2, w3
-	adrp	x0, .LC140
-	add	x0, x0, :lo12:.LC140
+	adrp	x0, .LC139
+	add	x0, x0, :lo12:.LC139
 	bl	rknand_print_hex
-	adrp	x0, .LANCHOR166
+	adrp	x0, .LANCHOR168
 	mov	w3, 4
 	mov	w2, w3
-	ldr	x1, [x0, #:lo12:.LANCHOR166]
-	adrp	x0, .LC141
-	add	x0, x0, :lo12:.LC141
+	ldr	x1, [x0, #:lo12:.LANCHOR168]
+	adrp	x0, .LC140
+	add	x0, x0, :lo12:.LC140
 	bl	rknand_print_hex
 	ldr	x7, [x29, 104]
 	mov	w3, 4
-	adrp	x0, .LC142
+	adrp	x0, .LC141
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC142
-	ldr	x1, [x7, #:lo12:.LANCHOR167]
+	add	x0, x0, :lo12:.LC141
+	ldr	x1, [x7, #:lo12:.LANCHOR169]
 	bl	rknand_print_hex
 	ldr	w4, [x29, 112]
 	cmp	w4, 512
-	beq	.L2379
-.L2381:
+	beq	.L2396
+.L2398:
 	mov	w1, w20
-	adrp	x0, .LC143
-	add	x0, x0, :lo12:.LC143
+	adrp	x0, .LC142
+	add	x0, x0, :lo12:.LC142
 	bl	printf
-	adrp	x1, .LANCHOR178
+	adrp	x1, .LANCHOR181
 	adrp	x0, .LC0
-	mov	w2, 587
-	add	x1, x1, :lo12:.LANCHOR178
+	mov	w2, 597
+	add	x1, x1, :lo12:.LANCHOR181
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2382:
+.L2399:
 	mov	w0, -1
-	b	.L2370
-.L2375:
+	b	.L2387
+.L2392:
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
 	ldrh	w0, [x0, w1, uxtw 1]
 	add	w19, w0, w19
-	b	.L2373
-.L2384:
+	b	.L2390
+.L2401:
 	mov	w19, w20
-	b	.L2373
-.L2377:
+	b	.L2390
+.L2394:
 	mov	w0, w5
 	cmn	w5, #1
-	beq	.L2381
-.L2370:
+	beq	.L2398
+.L2387:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -14798,7 +14983,7 @@ ftl_test_block:
 	stp	x23, x24, [sp, 48]
 	adrp	x24, ftl_tmp_buffer
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR179
+	adrp	x25, .LANCHOR182
 	stp	x21, x22, [sp, 32]
 	adrp	x26, .LANCHOR106
 	and	w21, w0, 65535
@@ -14811,45 +14996,45 @@ ftl_test_block:
 	str	x0, [x29, 112]
 	str	wzr, [x24, #:lo12:ftl_tmp_buffer]
 	add	x0, x27, :lo12:.LANCHOR69
-	str	wzr, [x25, #:lo12:.LANCHOR179]
+	str	wzr, [x25, #:lo12:.LANCHOR182]
 	str	x0, [x29, 96]
-.L2401:
+.L2418:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
 	cmp	w0, w20
-	bls	.L2411
+	bls	.L2428
 	add	x0, x27, :lo12:.LANCHOR69
 	mov	w22, 0
 	str	x0, [x29, 120]
 	adrp	x0, .LANCHOR14
 	add	x0, x0, :lo12:.LANCHOR14
 	str	x0, [x29, 104]
-	b	.L2412
-.L2410:
+	b	.L2429
+.L2427:
 	ldr	x0, [x29, 104]
 	ldr	w0, [x0]
-	tbz	x0, 12, .L2402
-	adrp	x0, .LC144
+	tbz	x0, 12, .L2419
+	adrp	x0, .LC143
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC144
+	add	x0, x0, :lo12:.LC143
 	bl	printf
-.L2402:
+.L2419:
 	ldr	x0, [x29, 96]
 	ldrb	w19, [x0]
 	madd	w19, w21, w19, w22
 	and	w19, w19, 65535
-	cbnz	w20, .L2403
+	cbnz	w20, .L2420
 	adrp	x0, .LANCHOR27
 	ldr	x0, [x0, #:lo12:.LANCHOR27]
 	ldrb	w0, [x0, 47]
 	cmp	w0, w19
-	bcs	.L2404
-.L2403:
+	bcs	.L2421
+.L2420:
 	and	w28, w20, 255
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_check_bad_block
-	cbnz	w0, .L2404
+	cbnz	w0, .L2421
 	adrp	x0, .LANCHOR105
 	mov	w1, w23
 	ldrh	w7, [x0, #:lo12:.LANCHOR105]
@@ -14857,54 +15042,54 @@ ftl_test_block:
 	mul	w26, w7, w19
 	mov	w2, w26
 	bl	flash_erase_block_en
-	cbz	w0, .L2405
+	cbz	w0, .L2422
 	adrp	x0, .LANCHOR73
 	ldrb	w0, [x0, #:lo12:.LANCHOR73]
 	cmp	w0, 2
-	bne	.L2427
+	bne	.L2444
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L2427
+	cbz	w0, .L2444
 	mov	w2, w26
 	mov	w1, 1
 	mov	w0, w28
 	bl	flash_erase_block_en
-	cbnz	w0, .L2427
-.L2409:
+	cbnz	w0, .L2444
+.L2426:
 	adrp	x0, .LANCHOR73
 	mov	w23, 1
 	ldrb	w0, [x0, #:lo12:.LANCHOR73]
 	add	w26, w26, w0, lsl 24
-.L2408:
-	adrp	x0, .LANCHOR125
+.L2425:
+	adrp	x0, .LANCHOR126
 	mov	w5, 1
-	add	x3, x25, :lo12:.LANCHOR179
+	add	x3, x25, :lo12:.LANCHOR182
 	add	x2, x24, :lo12:ftl_tmp_buffer
-	ldrb	w4, [x0, #:lo12:.LANCHOR125]
+	ldrb	w4, [x0, #:lo12:.LANCHOR126]
 	mov	w1, w26
 	mov	w0, w28
 	bl	flash_prog_page_en
-	cbz	w0, .L2404
-.L2427:
+	cbz	w0, .L2421
+.L2444:
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_mask_bad_block
-.L2404:
+.L2421:
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L2412:
+.L2429:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, w22
-	bhi	.L2410
+	bhi	.L2427
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2401
-.L2405:
-	cbz	w23, .L2408
-	b	.L2409
-.L2411:
-	cbz	w23, .L2413
+	b	.L2418
+.L2422:
+	cbz	w23, .L2425
+	b	.L2426
+.L2428:
+	cbz	w23, .L2430
 	adrp	x0, .LANCHOR7
 	mov	w1, 2
 	ldr	x0, [x0, #:lo12:.LANCHOR7]
@@ -14912,7 +15097,7 @@ ftl_test_block:
 	ldrb	w0, [x21, 2]
 	bfi	w0, w1, 3, 2
 	strb	w0, [x21, 2]
-.L2413:
+.L2430:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -14947,18 +15132,18 @@ ftl_prog_page:
 	bl	flash_prog_page_en
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L2428
-	mov	w2, 2324
-	adrp	x1, .LANCHOR180
+	bne	.L2445
+	mov	w2, 2350
+	adrp	x1, .LANCHOR183
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR180
+	add	x1, x1, :lo12:.LANCHOR183
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	adrp	x0, .LC143
+	adrp	x0, .LC142
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC143
+	add	x0, x0, :lo12:.LC142
 	bl	printf
-.L2428:
+.L2445:
 	mov	w0, w19
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -14974,163 +15159,174 @@ ftl_info_flush:
 	stp	x29, x30, [sp, -128]!
 	mov	w1, 0
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR125
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR104
-	ldrb	w2, [x20, #:lo12:.LANCHOR125]
-	adrp	x19, .LANCHOR181
-	stp	x27, x28, [sp, 80]
-	mov	w27, w0
-	stp	x23, x24, [sp, 48]
-	add	x0, x19, :lo12:.LANCHOR181
+	adrp	x21, .LANCHOR126
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR184
+	ldrb	w2, [x21, #:lo12:.LANCHOR126]
 	stp	x25, x26, [sp, 64]
+	adrp	x25, .LANCHOR104
+	str	w0, [x29, 116]
+	add	x0, x20, :lo12:.LANCHOR184
+	stp	x23, x24, [sp, 48]
 	lsl	w2, w2, 1
+	stp	x27, x28, [sp, 80]
 	bl	ftl_memset
-	ldr	x0, [x22, #:lo12:.LANCHOR104]
+	adrp	x0, .LANCHOR74
+	ldrb	w0, [x0, #:lo12:.LANCHOR74]
+	cbz	w0, .L2449
+	ldr	x0, [x25, #:lo12:.LANCHOR104]
+	strh	wzr, [x0, 150]
+	str	wzr, [x0, 156]
+.L2449:
+	ldr	x0, [x25, #:lo12:.LANCHOR104]
 	ldrh	w1, [x0, 74]
-	cbz	w1, .L2432
+	cbz	w1, .L2450
 	strh	wzr, [x0, 150]
-.L2432:
-	adrp	x21, .LANCHOR182
-	adrp	x23, .LANCHOR105
-	add	x25, x21, :lo12:.LANCHOR182
-	add	x28, x23, :lo12:.LANCHOR105
-	mov	w24, 0
-.L2445:
-	add	x0, x21, :lo12:.LANCHOR182
-	ldrb	w7, [x21, #:lo12:.LANCHOR182]
-	ldrh	w5, [x23, #:lo12:.LANCHOR105]
-	ldrh	w4, [x0, 2]
-	ldr	x0, [x22, #:lo12:.LANCHOR104]
-	ldr	w3, [x0, 4]
-	add	w3, w3, 1
-	str	w3, [x0, 4]
-	add	x0, x19, :lo12:.LANCHOR181
-	str	w27, [x19, #:lo12:.LANCHOR181]
-	str	w3, [x0, 4]
+.L2450:
+	adrp	x23, .LANCHOR185
+	add	x19, x23, :lo12:.LANCHOR185
+	adrp	x24, .LANCHOR105
+	mov	w26, 0
+	add	x0, x24, :lo12:.LANCHOR105
+	str	x0, [x29, 104]
+.L2463:
+	add	x0, x23, :lo12:.LANCHOR185
+	ldrh	w1, [x24, #:lo12:.LANCHOR105]
+	add	x7, x20, :lo12:.LANCHOR184
+	str	w1, [x29, 120]
+	ldrb	w1, [x21, #:lo12:.LANCHOR126]
+	adrp	x22, ftl_info_data_buffer
+	ldrh	w27, [x0, 2]
+	ldr	x0, [x25, #:lo12:.LANCHOR104]
+	lsl	w1, w1, 9
+	ldrb	w28, [x23, #:lo12:.LANCHOR185]
+	ldr	w6, [x0, 4]
+	add	w6, w6, 1
+	str	w6, [x0, 4]
+	ldr	w0, [x29, 116]
+	str	w0, [x20, #:lo12:.LANCHOR184]
+	add	x0, x22, :lo12:ftl_info_data_buffer
+	str	w6, [x7, 4]
+	bl	js_hash
+	str	w0, [x7, 8]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2433
-	mov	w2, w4
-	mov	w1, w7
-	stp	w5, w4, [x29, 108]
-	adrp	x0, .LC145
-	str	w7, [x29, 120]
-	add	x0, x0, :lo12:.LC145
+	tbz	x0, 12, .L2451
+	adrp	x0, .LC144
+	mov	w3, w6
+	mov	w2, w27
+	mov	w1, w28
+	add	x0, x0, :lo12:.LC144
 	bl	printf
-	ldp	w5, w4, [x29, 108]
-	ldr	w7, [x29, 120]
-.L2433:
+.L2451:
 	adrp	x1, .LANCHOR87
-	ldrh	w0, [x25, 2]
+	ldrh	w0, [x19, 2]
 	ldrh	w1, [x1, #:lo12:.LANCHOR87]
 	cmp	w1, w0
-	bhi	.L2434
-	adrp	x3, .LANCHOR183
-	adrp	x4, .LC0
-	add	x3, x3, :lo12:.LANCHOR183
-	add	x4, x4, :lo12:.LC0
-.L2441:
-	ldrb	w0, [x25, 1]
-	adrp	x26, .LANCHOR27
+	bhi	.L2452
+	adrp	x27, .LANCHOR186
+	adrp	x3, .LC0
+	add	x27, x27, :lo12:.LANCHOR186
+	add	x3, x3, :lo12:.LC0
+.L2459:
+	ldrb	w0, [x19, 1]
+	adrp	x28, .LANCHOR27
 	add	w0, w0, 1
 	and	w0, w0, 255
-	strb	w0, [x25, 1]
+	strb	w0, [x19, 1]
 	cmp	w0, 7
-	bls	.L2435
+	bls	.L2453
 	mov	x0, 0
-.L2440:
-	ldr	x2, [x26, #:lo12:.LANCHOR27]
+.L2458:
+	ldr	x2, [x28, #:lo12:.LANCHOR27]
 	add	w1, w0, 8
-	and	w24, w0, 65535
+	and	w26, w0, 65535
 	add	x1, x2, x1, sxtw
 	ldrb	w2, [x1, 32]
 	add	w1, w2, 127
 	and	w1, w1, 255
 	cmp	w1, 125
-	bhi	.L2436
-	mov	x1, x3
-	mov	x0, x4
-	stp	x3, x4, [x29, 112]
-	mov	w2, 751
+	bhi	.L2454
+	mov	x0, x3
+	str	x3, [x29, 120]
+	mov	w2, 761
+	mov	x1, x27
 	bl	printf
-	ldp	x3, x4, [x29, 112]
-.L2439:
-	strb	w24, [x25, 1]
-	mov	w24, 1
-.L2435:
-	ldr	x0, [x26, #:lo12:.LANCHOR27]
-	ldrb	w1, [x25, 1]
+	ldr	x3, [x29, 120]
+.L2457:
+	strb	w26, [x19, 1]
+	mov	w26, 1
+.L2453:
+	ldr	x0, [x28, #:lo12:.LANCHOR27]
+	ldrb	w1, [x19, 1]
 	add	x0, x0, x1
-	ldrb	w0, [x0, 40]
-	strb	w0, [x25]
-	cmp	w0, 255
-	beq	.L2441
-	ldrh	w5, [x28]
-	mul	w26, w5, w0
+	ldrb	w28, [x0, 40]
+	strb	w28, [x19]
+	cmp	w28, 255
+	beq	.L2459
+	ldr	x0, [x29, 104]
+	ldrh	w27, [x0]
 	mov	w0, 0
-	mov	w1, w26
+	mul	w27, w27, w28
+	mov	w1, w27
 	bl	flash_erase_block
-	ldrb	w4, [x20, #:lo12:.LANCHOR125]
-	add	x3, x19, :lo12:.LANCHOR181
-	adrp	x2, ftl_info_data_buffer
-	mov	w1, w26
-	add	x2, x2, :lo12:ftl_info_data_buffer
+	ldrb	w4, [x21, #:lo12:.LANCHOR126]
+	mov	w1, w27
+	add	x3, x20, :lo12:.LANCHOR184
+	add	x2, x22, :lo12:ftl_info_data_buffer
 	mov	w0, 0
+	add	w27, w27, 1
 	bl	ftl_prog_page
-	add	w5, w26, 1
 	mov	w0, 1
-	strh	w0, [x25, 2]
-.L2442:
-	ldrb	w4, [x20, #:lo12:.LANCHOR125]
-	mov	w1, w5
-	add	x3, x19, :lo12:.LANCHOR181
-	adrp	x2, ftl_info_data_buffer
+	strh	w0, [x19, 2]
+.L2460:
+	ldrb	w4, [x21, #:lo12:.LANCHOR126]
+	mov	w1, w27
+	add	x3, x20, :lo12:.LANCHOR184
+	add	x2, x22, :lo12:ftl_info_data_buffer
 	mov	w0, 0
-	add	x2, x2, :lo12:ftl_info_data_buffer
 	bl	ftl_prog_page
 	cmn	w0, #1
-	ldrh	w1, [x25, 2]
-	adrp	x0, .LANCHOR184
+	ldrh	w1, [x19, 2]
+	adrp	x0, .LANCHOR187
 	add	w1, w1, 1
-	strh	w1, [x25, 2]
-	beq	.L2443
-	ldrb	w1, [x0, #:lo12:.LANCHOR184]
-	cbz	w1, .L2444
-.L2443:
-	strb	wzr, [x0, #:lo12:.LANCHOR184]
-	b	.L2445
-.L2436:
+	strh	w1, [x19, 2]
+	beq	.L2461
+	ldrb	w1, [x0, #:lo12:.LANCHOR187]
+	cbz	w1, .L2462
+.L2461:
+	strb	wzr, [x0, #:lo12:.LANCHOR187]
+	b	.L2463
+.L2454:
 	cmp	w2, 255
-	bne	.L2439
+	bne	.L2457
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L2440
-	mov	w24, w0
-	b	.L2439
-.L2434:
-	madd	w5, w5, w7, w4
-	cbnz	w0, .L2442
-	mov	w1, w5
-	str	w5, [x29, 120]
+	bne	.L2458
+	mov	w26, w0
+	b	.L2457
+.L2452:
+	ldr	w1, [x29, 120]
+	madd	w27, w1, w28, w27
+	cbnz	w0, .L2460
+	mov	w1, w27
 	bl	flash_erase_block
-	ldr	w5, [x29, 120]
-	b	.L2442
-.L2444:
-	cbnz	w24, .L2446
-.L2454:
-	adrp	x0, .LANCHOR182
-	ldrb	w0, [x0, #:lo12:.LANCHOR182]
+	b	.L2460
+.L2462:
+	cbnz	w26, .L2464
+.L2472:
+	adrp	x0, .LANCHOR185
+	ldrb	w0, [x0, #:lo12:.LANCHOR185]
 	cmp	w0, 255
-	bne	.L2448
-	adrp	x1, .LANCHOR183
+	bne	.L2466
+	adrp	x1, .LANCHOR186
 	adrp	x0, .LC0
-	mov	w2, 787
-	add	x1, x1, :lo12:.LANCHOR183
+	mov	w2, 797
+	add	x1, x1, :lo12:.LANCHOR186
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2448:
+.L2466:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -15139,17 +15335,17 @@ ftl_info_flush:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2446:
-	ldrb	w19, [x25, 1]
-	adrp	x20, .LANCHOR183
+.L2464:
+	ldrb	w19, [x19, 1]
+	adrp	x20, .LANCHOR186
 	adrp	x21, .LC0
-	add	x20, x20, :lo12:.LANCHOR183
+	add	x20, x20, :lo12:.LANCHOR186
 	add	w19, w19, 1
 	add	x21, x21, :lo12:.LC0
 	adrp	x22, .LANCHOR27
-.L2449:
+.L2467:
 	cmp	w19, 7
-	bhi	.L2454
+	bhi	.L2472
 	ldr	x1, [x22, #:lo12:.LANCHOR27]
 	add	w0, w19, 8
 	add	x0, x1, x0, sxtw
@@ -15157,25 +15353,25 @@ ftl_info_flush:
 	add	w0, w23, 127
 	and	w0, w0, 255
 	cmp	w0, 125
-	bhi	.L2450
-	mov	w2, 780
+	bhi	.L2468
+	mov	w2, 790
 	mov	x1, x20
 	mov	x0, x21
 	bl	printf
-.L2451:
+.L2469:
 	adrp	x0, .LANCHOR105
 	ldrh	w1, [x0, #:lo12:.LANCHOR105]
 	mov	w0, 0
 	mul	w1, w1, w23
 	bl	flash_erase_block
-	b	.L2452
-.L2450:
+	b	.L2470
+.L2468:
 	cmp	w23, 255
-	bne	.L2451
-.L2452:
+	bne	.L2469
+.L2470:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L2449
+	b	.L2467
 	.size	ftl_info_flush, .-ftl_info_flush
 	.section	.text.ftl_info_blk_init,"ax",@progbits
 	.align	2
@@ -15183,32 +15379,32 @@ ftl_info_flush:
 	.type	ftl_info_blk_init, %function
 ftl_info_blk_init:
 	stp	x29, x30, [sp, -128]!
-	adrp	x0, .LANCHOR185
-	adrp	x1, .LANCHOR184
+	adrp	x0, .LANCHOR188
+	adrp	x1, .LANCHOR187
 	mov	w2, 16384
 	add	x29, sp, 0
-	strb	wzr, [x0, #:lo12:.LANCHOR185]
+	strb	wzr, [x0, #:lo12:.LANCHOR188]
 	mov	w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR184]
-	adrp	x1, .LANCHOR186
-	stp	x19, x20, [sp, 16]
-	adrp	x20, ftl_info_data_buffer
-	strb	w0, [x1, #:lo12:.LANCHOR186]
-	adrp	x1, .LANCHOR7
-	add	x0, x20, :lo12:ftl_info_data_buffer
+	strb	w0, [x1, #:lo12:.LANCHOR187]
+	adrp	x1, .LANCHOR189
 	stp	x21, x22, [sp, 32]
+	adrp	x21, ftl_info_data_buffer
+	strb	w0, [x1, #:lo12:.LANCHOR189]
+	adrp	x1, .LANCHOR7
+	add	x0, x21, :lo12:ftl_info_data_buffer
+	stp	x19, x20, [sp, 16]
 	str	x0, [x1, #:lo12:.LANCHOR7]
 	adrp	x1, .LANCHOR6
-	adrp	x21, .LANCHOR104
+	adrp	x19, .LANCHOR104
 	stp	x23, x24, [sp, 48]
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
-	adrp	x24, .LANCHOR27
+	adrp	x23, .LANCHOR27
 	stp	x25, x26, [sp, 64]
-	adrp	x22, .LANCHOR182
+	adrp	x20, .LANCHOR185
 	stp	x27, x28, [sp, 80]
 	adrp	x26, .LANCHOR105
 	add	x1, x0, x1, lsl 2
-	str	x1, [x21, #:lo12:.LANCHOR104]
+	str	x1, [x19, #:lo12:.LANCHOR104]
 	mov	w1, 0
 	bl	ftl_memset
 	mov	w1, 0
@@ -15216,59 +15412,59 @@ ftl_info_blk_init:
 	adrp	x0, ftl_ext_info_data_buffer
 	add	x0, x0, :lo12:ftl_ext_info_data_buffer
 	bl	ftl_memset
-	adrp	x23, .LANCHOR125
-	ldr	x1, [x24, #:lo12:.LANCHOR27]
-	add	x0, x22, :lo12:.LANCHOR182
+	adrp	x24, .LANCHOR126
+	ldr	x1, [x23, #:lo12:.LANCHOR27]
+	add	x0, x20, :lo12:.LANCHOR185
 	mov	w27, 21574
 	add	x26, x26, :lo12:.LANCHOR105
-	add	x23, x23, :lo12:.LANCHOR125
-	mov	x19, 7
+	add	x24, x24, :lo12:.LANCHOR126
+	mov	x22, 7
 	strb	wzr, [x0, 1]
 	movk	w27, 0x494c, lsl 16
 	ldrb	w1, [x1, 40]
-	strb	w1, [x22, #:lo12:.LANCHOR182]
+	strb	w1, [x20, #:lo12:.LANCHOR185]
 	strh	wzr, [x0, 2]
-.L2473:
-	ldr	x1, [x24, #:lo12:.LANCHOR27]
-	add	w0, w19, 8
-	sxth	w25, w19
-	mov	w28, w19
+.L2494:
+	ldr	x1, [x23, #:lo12:.LANCHOR27]
+	add	w0, w22, 8
+	sxth	w25, w22
+	mov	w28, w22
 	add	x0, x1, x0, sxtw
 	ldrb	w0, [x0, 32]
 	cmp	w0, 255
-	bne	.L2472
-.L2477:
-	sub	x19, x19, #1
-	cmn	x19, #1
-	bne	.L2473
+	bne	.L2493
+.L2498:
+	sub	x22, x22, #1
+	cmn	x22, #1
+	bne	.L2494
 	mov	w25, 0
-.L2474:
-	adrp	x23, .LANCHOR14
-	ldr	w0, [x23, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2478
-	ldr	x0, [x21, #:lo12:.LANCHOR104]
+.L2495:
+	adrp	x24, .LANCHOR14
+	ldr	w0, [x24, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2499
+	ldr	x0, [x19, #:lo12:.LANCHOR104]
 	mov	w2, 4800
-	mov	w1, w19
+	mov	w1, w22
 	ldr	w3, [x0]
-	adrp	x0, .LC147
-	add	x0, x0, :lo12:.LC147
+	adrp	x0, .LC146
+	add	x0, x0, :lo12:.LC146
 	bl	printf
-.L2478:
-	cmn	w19, #1
-	bne	.L2479
+.L2499:
+	cmn	w22, #1
+	bne	.L2500
 	mov	w1, 0
 	mov	w2, 16384
-	add	x0, x20, :lo12:ftl_info_data_buffer
+	add	x0, x21, :lo12:ftl_info_data_buffer
 	bl	ftl_memset
-	ldr	x0, [x21, #:lo12:.LANCHOR104]
+	ldr	x0, [x19, #:lo12:.LANCHOR104]
 	mov	w1, 21574
 	movk	w1, 0x494c, lsl 16
 	str	w1, [x0]
-	mov	w1, 24
+	mov	w1, 34
 	movk	w1, 0x6, lsl 16
 	str	w1, [x0, 12]
-	mov	w0, w19
-.L2471:
+	mov	w0, w22
+.L2492:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -15276,12 +15472,12 @@ ftl_info_blk_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2472:
+.L2493:
 	ldrh	w6, [x26]
-	add	x8, x20, :lo12:ftl_info_data_buffer
-	ldrb	w4, [x23]
-	adrp	x7, .LANCHOR181
-	add	x7, x7, :lo12:.LANCHOR181
+	add	x8, x21, :lo12:ftl_info_data_buffer
+	ldrb	w4, [x24]
+	adrp	x7, .LANCHOR184
+	add	x7, x7, :lo12:.LANCHOR184
 	mov	x2, x8
 	mov	x3, x7
 	stp	x7, x8, [x29, 104]
@@ -15294,83 +15490,91 @@ ftl_info_blk_init:
 	cmn	w0, #1
 	ldr	w6, [x29, 124]
 	ldp	x7, x8, [x29, 104]
-	bne	.L2475
-	ldrb	w4, [x23]
+	bne	.L2496
+	ldrb	w4, [x24]
 	mov	x3, x7
 	mov	x2, x8
 	add	w1, w6, 1
 	mov	w0, 0
 	bl	ftl_read_page
 	mov	w5, w0
-.L2475:
+.L2496:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2476
-	ldr	x0, [x21, #:lo12:.LANCHOR104]
+	tbz	x0, 12, .L2497
+	ldr	x0, [x19, #:lo12:.LANCHOR104]
 	mov	w2, w5
 	str	w5, [x29, 124]
 	mov	w3, 672
 	mov	w1, w28
 	ldr	w4, [x0]
-	adrp	x0, .LC146
-	add	x0, x0, :lo12:.LC146
+	adrp	x0, .LC145
+	add	x0, x0, :lo12:.LC145
 	bl	printf
 	ldr	w5, [x29, 124]
-.L2476:
+.L2497:
 	cmn	w5, #1
-	beq	.L2477
-	ldr	x0, [x21, #:lo12:.LANCHOR104]
+	beq	.L2498
+	ldr	x0, [x19, #:lo12:.LANCHOR104]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L2477
-	mov	w19, w25
-	b	.L2474
-.L2479:
-	ldr	x1, [x24, #:lo12:.LANCHOR27]
+	bne	.L2498
+	mov	w22, w25
+	b	.L2495
+.L2500:
+	ldr	x1, [x23, #:lo12:.LANCHOR27]
 	add	w0, w25, 8
-	add	x20, x20, :lo12:ftl_info_data_buffer
 	mov	w4, 4
-	mov	x2, x20
-	adrp	x27, .LANCHOR125
-	add	x0, x1, x0, sxtw
+	add	x2, x21, :lo12:ftl_info_data_buffer
+	adrp	x26, .LANCHOR126
 	mov	w28, 21574
-	add	x27, x27, :lo12:.LANCHOR125
+	add	x0, x1, x0, sxtw
+	adrp	x27, .LC147
+	add	x26, x26, :lo12:.LANCHOR126
+	add	x27, x27, :lo12:.LC147
 	movk	w28, 0x494c, lsl 16
 	ldrb	w1, [x0, 32]
-	add	x0, x22, :lo12:.LANCHOR182
-	strb	w1, [x22, #:lo12:.LANCHOR182]
+	add	x0, x20, :lo12:.LANCHOR185
+	strb	w1, [x20, #:lo12:.LANCHOR185]
 	strb	w25, [x0, 1]
-	adrp	x25, .LANCHOR181
-	add	x25, x25, :lo12:.LANCHOR181
+	adrp	x25, .LANCHOR184
 	mov	w0, 0
-	mov	x3, x25
+	add	x3, x25, :lo12:.LANCHOR184
 	bl	flash_get_last_written_page
-	sxth	w24, w0
+	sxth	w22, w0
 	add	w0, w0, 1
-	and	w19, w0, 65535
+	ldrb	w23, [x20, #:lo12:.LANCHOR185]
+	and	w0, w0, 65535
+	str	w0, [x29, 124]
 	adrp	x0, .LANCHOR105
-	ldrb	w26, [x22, #:lo12:.LANCHOR182]
 	ldrh	w0, [x0, #:lo12:.LANCHOR105]
-	madd	w26, w26, w0, w24
-.L2481:
-	tbnz	w24, #31, .L2485
-	ldrb	w4, [x27]
-	mov	x3, x25
-	mov	x2, x20
-	mov	w1, w26
+	madd	w23, w23, w0, w22
+.L2502:
+	tbnz	w22, #31, .L2506
+	ldrb	w4, [x26]
+	add	x6, x25, :lo12:.LANCHOR184
+	add	x5, x21, :lo12:ftl_info_data_buffer
+	mov	x3, x6
+	mov	x2, x5
+	mov	w1, w23
 	mov	w0, 0
+	stp	x6, x5, [x29, 104]
 	bl	ftl_read_page
 	cmn	w0, #1
-	beq	.L2482
-	ldr	x0, [x21, #:lo12:.LANCHOR104]
+	beq	.L2503
+	ldr	x0, [x19, #:lo12:.LANCHOR104]
+	ldp	x6, x5, [x29, 104]
 	ldr	w0, [x0]
 	cmp	w0, w28
-	bne	.L2482
-.L2485:
-	add	x22, x22, :lo12:.LANCHOR182
-	strh	w19, [x22, 2]
+	bne	.L2503
+	ldr	w6, [x6, 8]
+	cbnz	w6, .L2504
+.L2506:
+	ldrh	w0, [x29, 124]
+	add	x20, x20, :lo12:.LANCHOR185
+	strh	w0, [x20, 2]
 	bl	ftl_tmp_into_update
-	ldr	x1, [x21, #:lo12:.LANCHOR104]
+	ldr	x1, [x19, #:lo12:.LANCHOR104]
 	ldr	w0, [x1, 64]
 	add	w0, w0, 1
 	str	w0, [x1, 64]
@@ -15378,23 +15582,33 @@ ftl_info_blk_init:
 	bl	ftl_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-	ldr	w0, [x23, #:lo12:.LANCHOR14]
-	tbnz	x0, 14, .L2483
-.L2500:
+	ldr	w0, [x24, #:lo12:.LANCHOR14]
+	tbnz	x0, 14, .L2505
+.L2522:
 	mov	w0, 0
-	b	.L2471
-.L2482:
-	sub	w24, w24, #1
-	sub	w26, w26, #1
-	sxth	w24, w24
-	b	.L2481
-.L2483:
-	ldr	x0, [x21, #:lo12:.LANCHOR104]
+	b	.L2492
+.L2504:
+	ldrb	w1, [x26]
+	mov	x0, x5
+	lsl	w1, w1, 9
+	bl	js_hash
+	cmp	w6, w0
+	beq	.L2506
+	mov	w1, w6
+	mov	x0, x27
+	bl	printf
+.L2503:
+	sub	w22, w22, #1
+	sub	w23, w23, #1
+	sxth	w22, w22
+	b	.L2502
+.L2505:
+	ldr	x0, [x19, #:lo12:.LANCHOR104]
 	ldr	w1, [x0, 156]
 	adrp	x0, .LC148
 	add	x0, x0, :lo12:.LC148
 	bl	printf
-	b	.L2500
+	b	.L2522
 	.size	ftl_info_blk_init, .-ftl_info_blk_init
 	.section	.text.ftl_ext_info_flush,"ax",@progbits
 	.align	2
@@ -15411,21 +15625,21 @@ ftl_ext_info_flush:
 	ldr	w1, [x0, 520]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbz	w1, .L2502
+	cbz	w1, .L2524
 	str	wzr, [x0, 520]
-.L2502:
+.L2524:
 	adrp	x20, .LANCHOR87
-	adrp	x22, .LANCHOR187
+	adrp	x22, .LANCHOR190
 	adrp	x21, .LANCHOR31
 	add	x20, x20, :lo12:.LANCHOR87
-	add	x22, x22, :lo12:.LANCHOR187
+	add	x22, x22, :lo12:.LANCHOR190
 	add	x21, x21, :lo12:.LANCHOR31
 	mov	w0, 0
 	bl	ftl_total_vpn_update
-.L2503:
+.L2525:
 	adrp	x23, .LANCHOR104
 	mov	x24, x23
-.L2506:
+.L2528:
 	ldr	x0, [x23, #:lo12:.LANCHOR104]
 	ldr	w1, [x0, 56]
 	add	w1, w1, 1
@@ -15433,28 +15647,28 @@ ftl_ext_info_flush:
 	ldrh	w1, [x0, 140]
 	ldrh	w0, [x20]
 	cmp	w1, w0
-	bcc	.L2504
+	bcc	.L2526
 	bl	ftl_ext_alloc_new_blk
-.L2504:
+.L2526:
 	ldr	x0, [x24, #:lo12:.LANCHOR104]
 	ldrh	w1, [x0, 130]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2505
+	bne	.L2527
 	adrp	x0, .LC0
-	mov	w2, 1912
+	mov	w2, 1926
 	mov	x1, x22
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2505:
+.L2527:
 	ldrb	w19, [x21]
 	mov	w0, 24
 	ldr	x1, [x24, #:lo12:.LANCHOR104]
-	adrp	x26, .LANCHOR125
+	adrp	x26, .LANCHOR126
 	sub	w19, w0, w19
 	adrp	x0, .LANCHOR68
-	adrp	x27, .LANCHOR181
-	add	x25, x27, :lo12:.LANCHOR181
+	adrp	x27, .LANCHOR184
+	add	x25, x27, :lo12:.LANCHOR184
 	ldrh	w0, [x0, #:lo12:.LANCHOR68]
 	ldrh	w2, [x1, 130]
 	sub	w0, w19, w0
@@ -15469,19 +15683,25 @@ ftl_ext_info_flush:
 	sxth	w19, w19
 	mov	w1, 0
 	madd	w19, w19, w2, w0
-	ldrb	w2, [x26, #:lo12:.LANCHOR125]
+	ldrb	w2, [x26, #:lo12:.LANCHOR126]
 	mov	x0, x25
 	lsl	w2, w2, 1
 	bl	ftl_memset
 	ldr	x0, [x24, #:lo12:.LANCHOR104]
-	mov	w1, w19
-	ldrb	w4, [x26, #:lo12:.LANCHOR125]
-	mov	x3, x25
-	str	wzr, [x27, #:lo12:.LANCHOR181]
-	adrp	x2, ftl_ext_info_data_buffer
-	add	x2, x2, :lo12:ftl_ext_info_data_buffer
+	adrp	x6, ftl_ext_info_data_buffer
+	ldrb	w7, [x26, #:lo12:.LANCHOR126]
+	add	x6, x6, :lo12:ftl_ext_info_data_buffer
+	str	wzr, [x27, #:lo12:.LANCHOR184]
 	ldr	w0, [x0, 56]
+	lsl	w1, w7, 9
 	str	w0, [x25, 4]
+	mov	x0, x6
+	bl	js_hash
+	mov	x2, x6
+	mov	w1, w19
+	str	w0, [x25, 8]
+	mov	w4, w7
+	mov	x3, x25
 	mov	w0, w28
 	bl	ftl_prog_page
 	ldr	x2, [x24, #:lo12:.LANCHOR104]
@@ -15490,16 +15710,16 @@ ftl_ext_info_flush:
 	and	w1, w1, 65535
 	strh	w1, [x2, 140]
 	cmp	w1, 1
-	beq	.L2506
+	beq	.L2528
 	cmn	w0, #1
-	adrp	x0, .LANCHOR186
-	beq	.L2507
-	ldrb	w1, [x0, #:lo12:.LANCHOR186]
-	cbz	w1, .L2508
-.L2507:
-	strb	wzr, [x0, #:lo12:.LANCHOR186]
-	b	.L2503
-.L2508:
+	adrp	x0, .LANCHOR189
+	beq	.L2529
+	ldrb	w1, [x0, #:lo12:.LANCHOR189]
+	cbz	w1, .L2530
+.L2529:
+	strb	wzr, [x0, #:lo12:.LANCHOR189]
+	b	.L2525
+.L2530:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -15514,7 +15734,7 @@ ftl_ext_info_flush:
 	.global	ftl_ext_info_init
 	.type	ftl_ext_info_init, %function
 ftl_ext_info_init:
-	stp	x29, x30, [sp, -112]!
+	stp	x29, x30, [sp, -128]!
 	adrp	x0, .LANCHOR115
 	adrp	x2, .LANCHOR68
 	mov	w4, 4
@@ -15524,85 +15744,89 @@ ftl_ext_info_init:
 	strh	wzr, [x0, #:lo12:.LANCHOR115]
 	ldr	x0, [x20, #:lo12:.LANCHOR104]
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR14
 	stp	x27, x28, [sp, 80]
-	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR181
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR184
 	ldrh	w1, [x0, 130]
 	adrp	x0, .LANCHOR31
-	stp	x23, x24, [sp, 48]
-	adrp	x26, ftl_ext_info_data_buffer
+	stp	x25, x26, [sp, 64]
+	adrp	x24, ftl_ext_info_data_buffer
 	ldrb	w19, [x0, #:lo12:.LANCHOR31]
 	mov	w0, 24
-	add	x3, x25, :lo12:.LANCHOR181
+	add	x3, x23, :lo12:.LANCHOR184
 	sub	w0, w0, w19
 	ldrh	w19, [x2, #:lo12:.LANCHOR68]
-	add	x2, x26, :lo12:ftl_ext_info_data_buffer
+	add	x2, x24, :lo12:ftl_ext_info_data_buffer
 	sub	w0, w0, w19
 	mov	w19, 1
 	lsl	w19, w19, w0
 	sub	w19, w19, #1
-	asr	w22, w1, w0
+	asr	w21, w1, w0
 	and	w19, w19, w1
-	and	w28, w22, 255
+	and	w27, w21, 255
 	mov	w1, w19
-	mov	w0, w28
+	mov	w0, w27
 	bl	flash_get_last_written_page
-	sxth	w23, w0
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2519
+	sxth	w22, w0
+	adrp	x0, .LANCHOR14
+	stp	x0, x23, [x29, 112]
+	ldr	w1, [x0, #:lo12:.LANCHOR14]
+	tbz	x1, 12, .L2541
 	ldr	x0, [x20, #:lo12:.LANCHOR104]
-	adrp	x1, .LANCHOR188
-	and	w4, w22, 65535
-	mov	w3, w23
-	mov	w2, 1956
-	add	x1, x1, :lo12:.LANCHOR188
+	adrp	x1, .LANCHOR191
+	and	w4, w21, 65535
+	mov	w3, w22
+	mov	w2, 1971
+	add	x1, x1, :lo12:.LANCHOR191
 	ldrh	w5, [x0, 130]
 	adrp	x0, .LC149
 	add	x0, x0, :lo12:.LC149
 	bl	printf
-.L2519:
-	adrp	x27, .LANCHOR125
-	adrp	x5, .LANCHOR105
-	mov	w6, 20038
-	add	x27, x27, :lo12:.LANCHOR125
-	add	x5, x5, :lo12:.LANCHOR105
-	mov	w24, 0
-	movk	w6, 0x4549, lsl 16
-.L2520:
-	and	w22, w23, 65535
-	sub	w0, w22, w24
-	tbnz	x0, 15, .L2525
-	ldrh	w0, [x5]
-	sub	w1, w23, w24
-	ldrb	w4, [x27]
-	add	x3, x25, :lo12:.LANCHOR181
-	str	w6, [x29, 100]
-	add	x2, x26, :lo12:ftl_ext_info_data_buffer
-	str	x5, [x29, 104]
+.L2541:
+	adrp	x25, .LANCHOR126
+	adrp	x26, .LANCHOR105
+	mov	w28, 20038
+	add	x25, x25, :lo12:.LANCHOR126
+	add	x26, x26, :lo12:.LANCHOR105
+	mov	w23, 0
+	movk	w28, 0x4549, lsl 16
+.L2542:
+	and	w21, w22, 65535
+	sub	w0, w21, w23
+	tbnz	x0, 15, .L2547
+	ldr	x0, [x29, 120]
+	sub	w1, w22, w23
+	ldrb	w4, [x25]
+	add	x5, x24, :lo12:ftl_ext_info_data_buffer
+	add	x6, x0, :lo12:.LANCHOR184
+	ldrh	w0, [x26]
+	mov	x2, x5
+	mov	x3, x6
+	stp	x6, x5, [x29, 96]
 	madd	w1, w0, w19, w1
-	mov	w0, w28
+	mov	w0, w27
 	bl	flash_read_page_en
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	ldr	w6, [x29, 100]
-	ldr	x5, [x29, 104]
-	beq	.L2521
+	beq	.L2543
 	adrp	x0, .LANCHOR10
+	ldp	x6, x5, [x29, 96]
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x0]
-	cmp	w0, w6
-	bne	.L2521
-.L2525:
+	cmp	w0, w28
+	bne	.L2543
+	ldr	w6, [x6, 8]
+	cbnz	w6, .L2544
+.L2547:
 	bl	zftl_sblk_list_init
 	ldr	x0, [x20, #:lo12:.LANCHOR104]
 	ldrh	w1, [x0, 140]
-	cmp	w1, w23
-	bgt	.L2523
-	add	w22, w22, 1
-	strh	w22, [x0, 140]
+	cmp	w1, w22
+	bgt	.L2546
+	add	w21, w21, 1
+	strh	w21, [x0, 140]
 	bl	ftl_ext_info_flush
-.L2523:
+.L2546:
 	adrp	x0, .LANCHOR10
 	mov	w1, -1
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
@@ -15614,20 +15838,21 @@ ftl_ext_info_init:
 	str	w1, [x0, 560]
 	mov	w1, -1
 	str	w1, [x0, 564]
-	ldr	w1, [x21, #:lo12:.LANCHOR14]
+	ldr	x1, [x29, 112]
 	str	wzr, [x0, 520]
 	str	wzr, [x0, 604]
 	str	wzr, [x0, 608]
-	tbz	x1, 12, .L2526
+	ldr	w1, [x1, #:lo12:.LANCHOR14]
+	tbz	x1, 12, .L2549
 	ldr	w3, [x0, 12]
-	adrp	x1, .LANCHOR188
-	adrp	x0, .LC150
+	adrp	x1, .LANCHOR191
+	adrp	x0, .LC151
 	mov	w4, 0
 	mov	w2, 0
-	add	x1, x1, :lo12:.LANCHOR188
-	add	x0, x0, :lo12:.LC150
+	add	x1, x1, :lo12:.LANCHOR191
+	add	x0, x0, :lo12:.LC151
 	bl	printf
-.L2526:
+.L2549:
 	adrp	x0, .LANCHOR66
 	mov	w1, -1
 	ldp	x19, x20, [sp, 16]
@@ -15637,1808 +15862,1553 @@ ftl_ext_info_init:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 112
+	ldp	x29, x30, [sp], 128
 	ret
-.L2521:
-	add	w24, w24, 1
-	b	.L2520
+.L2544:
+	ldrb	w1, [x25]
+	mov	x0, x5
+	lsl	w1, w1, 9
+	bl	js_hash
+	cmp	w6, w0
+	beq	.L2547
+	adrp	x0, .LC150
+	mov	w1, w6
+	add	x0, x0, :lo12:.LC150
+	bl	printf
+.L2543:
+	add	w23, w23, 1
+	b	.L2542
 	.size	ftl_ext_info_init, .-ftl_ext_info_init
-	.section	.text.ftl_prog_ppa_page,"ax",@progbits
-	.align	2
-	.global	ftl_prog_ppa_page
-	.type	ftl_prog_ppa_page, %function
-ftl_prog_ppa_page:
-	adrp	x4, .LANCHOR31
-	mov	w5, 1
-	ldrb	w6, [x4, #:lo12:.LANCHOR31]
-	mov	w4, 24
-	sub	w4, w4, w6
-	lsl	w7, w5, w4
-	sub	w7, w7, #1
-	lsl	w5, w5, w6
-	sub	w6, w5, #1
-	lsr	w5, w0, w4
-	mov	w4, w3
-	mov	x3, x2
-	mov	x2, x1
-	and	w1, w7, w0
-	and	w0, w6, w5
-	b	ftl_prog_page
-	.size	ftl_prog_ppa_page, .-ftl_prog_ppa_page
-	.section	.text.ftl_write_last_log_page,"ax",@progbits
+	.section	.text.ftl_low_format_data_init,"ax",@progbits
 	.align	2
-	.global	ftl_write_last_log_page
-	.type	ftl_write_last_log_page, %function
-ftl_write_last_log_page:
-	ldrh	w1, [x0, 6]
-	cmp	w1, 1
-	bne	.L2540
+	.global	ftl_low_format_data_init
+	.type	ftl_low_format_data_init, %function
+ftl_low_format_data_init:
 	stp	x29, x30, [sp, -48]!
-	adrp	x1, .LANCHOR111
+	mov	w2, 16384
+	mov	w1, 0
+	adrp	x0, ftl_ext_info_data_buffer
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	mov	x19, x0
-	stp	x21, x22, [sp, 32]
-	ldr	x20, [x1, #:lo12:.LANCHOR111]
-	ldrh	w22, [x0, 12]
-	bl	ftl_get_new_free_page
+	add	x0, x0, :lo12:ftl_ext_info_data_buffer
+	str	x21, [sp, 32]
+	bl	ftl_memset
+	bl	zftl_sblk_list_init
+	adrp	x19, .LANCHOR104
+	mov	w0, 1
+	bl	ftl_alloc_sblk
+	mov	w1, 0
 	mov	w21, w0
-	cmn	w0, #1
-	beq	.L2541
-	ldrh	w0, [x19]
-	add	x20, x20, x22, uxth 2
-	bl	ftl_vpn_decrement
-	adrp	x0, .LANCHOR179
-	mov	w1, 15555
-	add	x6, x0, :lo12:.LANCHOR179
-	movk	w1, 0xf55f, lsl 16
-	str	w1, [x0, #:lo12:.LANCHOR179]
-	adrp	x0, .LANCHOR87
-	ldrh	w1, [x0, #:lo12:.LANCHOR87]
-	adrp	x0, .LANCHOR80
-	ldrb	w0, [x0, #:lo12:.LANCHOR80]
-	mul	w1, w1, w0
-	mov	x0, x20
-	lsl	w1, w1, 2
-	bl	js_hash
-	stp	w0, wzr, [x6, 4]
-	adrp	x0, .LANCHOR125
-	mov	x2, x6
-	mov	x1, x20
-	ldrb	w3, [x0, #:lo12:.LANCHOR125]
+	bl	ftl_erase_sblk
+	ldr	x1, [x19, #:lo12:.LANCHOR104]
 	mov	w0, w21
-	str	wzr, [x6, 12]
-	bl	ftl_prog_ppa_page
-.L2541:
-	mov	w0, 0
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 48
-	ret
-.L2540:
-	mov	w0, -1
-	ret
-	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
-	.section	.text.ftl_open_sblk_recovery,"ax",@progbits
-	.align	2
-	.global	ftl_open_sblk_recovery
-	.type	ftl_open_sblk_recovery, %function
-ftl_open_sblk_recovery:
-	stp	x29, x30, [sp, -368]!
-	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR14
-	stp	x19, x20, [sp, 16]
-	mov	x19, x0
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	stp	x23, x24, [sp, 48]
-	stp	x25, x26, [sp, 64]
-	stp	x27, x28, [sp, 80]
-	str	x1, [x29, 144]
-	tbz	x0, 12, .L2547
-	ldrh	w1, [x19, 2]
-	adrp	x0, .LC151
-	add	x0, x0, :lo12:.LC151
-	bl	printf
-.L2547:
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2548
-	ldrb	w1, [x19, 5]
-	adrp	x0, .LC152
-	add	x0, x0, :lo12:.LC152
-	bl	printf
-.L2548:
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2549
-	ldrh	w1, [x19]
-	adrp	x0, .LC153
-	add	x0, x0, :lo12:.LC153
-	bl	printf
-.L2549:
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2550
-	ldrh	w2, [x19, 18]
-	adrp	x0, .LC154
-	ldrh	w1, [x19, 16]
-	add	x0, x0, :lo12:.LC154
-	bl	printf
-.L2550:
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2551
-	ldrb	w1, [x19, 9]
-	adrp	x0, .LC155
-	add	x0, x0, :lo12:.LC155
+	add	x1, x1, 672
+	bl	ftl_get_blk_list_in_sblk
+	ldr	x0, [x19, #:lo12:.LANCHOR104]
+	ldrh	w20, [x0, 672]
+	strh	wzr, [x0, 690]
+	mov	w0, 65533
+	sub	w1, w20, #1
+	cmp	w0, w1, uxth
+	bcs	.L2561
+	adrp	x1, .LANCHOR192
+	adrp	x0, .LC0
+	mov	w2, 2172
+	add	x1, x1, :lo12:.LANCHOR192
+	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2551:
-	ldrh	w0, [x19, 10]
-	strh	w0, [x19, 14]
-	adrp	x0, .LANCHOR6
-	ldrh	w1, [x19]
-	ldrh	w0, [x0, #:lo12:.LANCHOR6]
-	cmp	w1, w0
-	bcs	.L2546
-	mov	w0, 1
-	add	x23, x29, 176
-	bl	buf_alloc
-	add	x26, x29, 240
-	mov	w2, 64
+.L2561:
+	ldr	x0, [x19, #:lo12:.LANCHOR104]
+	mov	w2, 256
 	mov	w1, 255
-	mov	x20, x0
-	mov	x0, x23
+	add	x0, x0, 416
+	strh	wzr, [x0, 280]
 	bl	ftl_memset
-	add	x27, x29, 304
-	mov	w2, 64
+	ldr	x0, [x19, #:lo12:.LANCHOR104]
+	mov	w2, 4096
+	mov	w1, 0
+	add	x0, x0, 704
+	bl	ftl_memset
+	adrp	x0, .LANCHOR31
+	ldr	x1, [x19, #:lo12:.LANCHOR104]
+	ldrb	w2, [x0, #:lo12:.LANCHOR31]
+	mov	w0, 24
+	sub	w0, w0, w2
+	adrp	x2, .LANCHOR68
+	strh	w21, [x1, 416]
+	adrp	x21, .LANCHOR10
+	ldrh	w2, [x2, #:lo12:.LANCHOR68]
+	strh	w20, [x1, 692]
+	sub	w0, w0, w2
+	asr	w0, w20, w0
+	strh	w0, [x1, 694]
+	mov	w0, 1
+	strh	w0, [x1, 688]
+	adrp	x0, .LANCHOR193
+	ldrh	w0, [x0, #:lo12:.LANCHOR193]
+	strh	w0, [x1, 698]
+	mov	w1, 20038
+	ldr	x0, [x21, #:lo12:.LANCHOR10]
+	movk	w1, 0x4549, lsl 16
+	str	w1, [x0]
+	bl	ftl_alloc_sys_blk
+	mov	w20, w0
+	mov	w1, 0
+	bl	ftl_erase_phy_blk
+	ldr	x0, [x19, #:lo12:.LANCHOR104]
+	mov	w1, 2
+	strh	w20, [x0, 130]
+	mov	w20, -1
+	strh	wzr, [x0, 140]
+	ldr	x0, [x21, #:lo12:.LANCHOR10]
+	add	x0, x0, 16
+	strh	w20, [x0, 568]
+	strh	w20, [x0, 570]
+	strh	w20, [x0, 572]
+	strh	w20, [x0, 574]
+	bl	ftl_open_sblk_init
+	ldr	x0, [x21, #:lo12:.LANCHOR10]
+	mov	w1, 3
+	add	x0, x0, 48
+	bl	ftl_open_sblk_init
+	ldr	x1, [x19, #:lo12:.LANCHOR104]
+	ldr	x0, [x21, #:lo12:.LANCHOR10]
+	add	x0, x0, 136
+	ldrh	w2, [x1, 134]
+	strh	w2, [x0, -10]
+	strh	w20, [x0, -56]
+	mov	w2, -1
+	strh	w20, [x0, -6]
+	str	w2, [x0, 408]
+	strh	wzr, [x0, -12]
+	strh	wzr, [x0, -16]
+	strh	wzr, [x0, -14]
+	strh	w2, [x1, 126]
+	mov	w2, 256
+	str	wzr, [x0, 384]
 	mov	w1, 255
-	mov	x0, x26
+	str	wzr, [x0, 388]
+	str	wzr, [x0, 392]
 	bl	ftl_memset
-	mov	w2, 64
+	mov	w2, 128
 	mov	w1, 255
-	mov	x0, x27
+	ldr	x0, [x21, #:lo12:.LANCHOR10]
+	add	x0, x0, 392
 	bl	ftl_memset
-	ldrb	w22, [x19, 5]
-	mov	w0, 2
-	ldrh	w24, [x19, 2]
-	adrp	x25, .LANCHOR87
-	str	w0, [x29, 168]
-	adrp	x0, .LANCHOR125
-	str	wzr, [x29, 160]
-	add	x0, x0, :lo12:.LANCHOR125
-	str	x0, [x29, 128]
-.L2553:
-	ldrh	w0, [x25, #:lo12:.LANCHOR87]
-	cmp	w0, w24
-	bhi	.L2566
-.L2556:
-	ldrh	w0, [x19, 10]
-	ldrh	w1, [x19, 6]
-	ldrh	w2, [x25, #:lo12:.LANCHOR87]
-	add	w1, w1, w0
-	ldrb	w0, [x19, 9]
-	strh	w24, [x19, 2]
-	strb	w22, [x19, 5]
-	mul	w0, w0, w2
-	cmp	w1, w0
-	beq	.L2567
-	adrp	x1, .LANCHOR189
-	adrp	x0, .LC0
-	mov	w2, 1569
-	add	x1, x1, :lo12:.LANCHOR189
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2567:
-	adrp	x2, .LANCHOR111
-	ldrh	w3, [x19, 10]
+	bl	ftl_ext_info_flush
+	mov	w0, 0
+	bl	ftl_info_flush
+	bl	ftl_info_blk_init
+	ldr	x21, [sp, 32]
 	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+	.size	ftl_low_format_data_init, .-ftl_low_format_data_init
+	.section	.text.ftl_low_format,"ax",@progbits
+	.align	2
+	.global	ftl_low_format
+	.type	ftl_low_format, %function
+ftl_low_format:
+	stp	x29, x30, [sp, -80]!
 	mov	w1, 0
-	ldr	x4, [x2, #:lo12:.LANCHOR111]
-	str	x2, [x29, 136]
-.L2568:
-	cmp	w1, w3
-	bcc	.L2570
-	ldrb	w22, [x19, 9]
-	adrp	x24, .LANCHOR9
-	ldrh	w1, [x25, #:lo12:.LANCHOR87]
-	madd	w22, w22, w1, w0
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	sub	w22, w22, w3
-	and	w22, w22, 65535
-	tbz	x0, 12, .L2571
-	ldrh	w1, [x19]
-	ldr	x2, [x24, #:lo12:.LANCHOR9]
-	ubfiz	x0, x1, 1, 16
-	ldrh	w3, [x2, x0]
-	adrp	x0, .LC156
-	mov	w2, w22
-	add	x0, x0, :lo12:.LC156
+	adrp	x0, .LC152
+	add	x0, x0, :lo12:.LC152
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR194
+	stp	x21, x22, [sp, 32]
+	add	x20, x20, :lo12:.LANCHOR194
+	stp	x25, x26, [sp, 64]
+	adrp	x22, .LANCHOR27
+	mov	x25, x22
+	stp	x23, x24, [sp, 48]
+	mov	w19, 8
+	adrp	x23, .LC0
 	bl	printf
-.L2571:
-	ldr	x0, [x24, #:lo12:.LANCHOR9]
-	ldrh	w1, [x19]
-	strh	w22, [x0, x1, lsl 1]
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 14, .L2572
-	ldp	w1, w2, [x29, 176]
-	adrp	x0, .LC157
-	ldp	w3, w4, [x29, 184]
-	add	x0, x0, :lo12:.LC157
+.L2566:
+	ldr	x0, [x22, #:lo12:.LANCHOR27]
+	add	x0, x0, x19, sxtw
+	ldrb	w21, [x0, 32]
+	add	w0, w21, 127
+	and	w0, w0, 255
+	cmp	w0, 125
+	bhi	.L2564
+	mov	w2, 2226
+	mov	x1, x20
+	add	x0, x23, :lo12:.LC0
 	bl	printf
-.L2572:
-	adrp	x24, .LANCHOR125
-	ldr	x0, [x20, 8]
+.L2564:
+	cmp	w21, 255
+	beq	.L2565
+	adrp	x0, .LANCHOR105
+	ldrh	w1, [x0, #:lo12:.LANCHOR105]
+	mov	w0, 0
+	mul	w1, w1, w21
+	bl	flash_erase_block
+.L2565:
+	add	w19, w19, 1
+	cmp	w19, 16
+	bne	.L2566
+	bl	sblk_init
+	adrp	x22, .LANCHOR7
+	bl	ftl_info_blk_init
+	adrp	x19, .LANCHOR6
+	mov	w2, 16384
 	mov	w1, 0
-	mov	x28, 0
-	ldrb	w2, [x24, #:lo12:.LANCHOR125]
-	lsl	w2, w2, 9
+	adrp	x0, ftl_info_data_buffer
+	add	x0, x0, :lo12:ftl_info_data_buffer
 	bl	ftl_memset
-	adrp	x0, .LC159
-	add	x0, x0, :lo12:.LC159
-	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR80
-	add	x0, x0, :lo12:.LANCHOR80
-	str	x0, [x29, 112]
-.L2573:
-	adrp	x0, .LANCHOR80
-	ldr	w2, [x29, 168]
-	add	x1, x0, :lo12:.LANCHOR80
-	str	w28, [x29, 152]
-	ldrb	w0, [x0, #:lo12:.LANCHOR80]
-	mul	w0, w0, w2
-	cmp	w28, w0
-	bcc	.L2585
-	adrp	x0, .LC160
-	add	x0, x0, :lo12:.LC160
-	stp	x0, x1, [x29, 152]
-	adrp	x0, .LC159
-	add	x28, x0, :lo12:.LC159
-	mov	x22, 0
-.L2586:
-	ldr	x0, [x29, 160]
-	ldr	w1, [x29, 168]
-	ldrb	w0, [x0]
-	mul	w0, w0, w1
-	cmp	w0, w22
-	bhi	.L2592
-	mov	x0, x20
-	bl	zbuf_free
-	ldrh	w1, [x19, 12]
-	ldrh	w0, [x25, #:lo12:.LANCHOR87]
-	ldrb	w2, [x19, 9]
-	madd	w0, w0, w2, w1
-	mov	x1, -4
-	add	x0, x1, x0, sxtw 2
-	ldr	x1, [x29, 136]
-	ldr	x1, [x1, #:lo12:.LANCHOR111]
-	ldr	w0, [x1, x0]
-	cmn	w0, #1
-	beq	.L2593
-	adrp	x1, .LANCHOR189
-	adrp	x0, .LC0
-	mov	w2, 1660
-	add	x1, x1, :lo12:.LANCHOR189
-	add	x0, x0, :lo12:.LC0
+	ldr	x0, [x22, #:lo12:.LANCHOR7]
+	mov	w3, 1
+	ldrh	w2, [x19, #:lo12:.LANCHOR6]
+	add	x2, x0, x2, lsl 2
+.L2567:
+	cmp	x0, x2
+	bne	.L2568
+	adrp	x21, .LANCHOR104
+	mov	w1, 21574
+	adrp	x24, .LANCHOR62
+	add	x24, x24, :lo12:.LANCHOR62
+	ldr	x0, [x21, #:lo12:.LANCHOR104]
+	movk	w1, 0x494c, lsl 16
+	mov	w20, 0
+	mov	w26, 1
+	strh	wzr, [x0, 148]
+	str	w1, [x0]
+.L2569:
+	ldrh	w0, [x19, #:lo12:.LANCHOR6]
+	adrp	x23, .LANCHOR69
+	cmp	w0, w20
+	bhi	.L2578
+	ldr	x0, [x25, #:lo12:.LANCHOR27]
+	mov	w4, 3
+	ldrb	w2, [x23, #:lo12:.LANCHOR69]
+	mov	w10, 15
+	ldr	x6, [x21, #:lo12:.LANCHOR104]
+	cmp	w2, 1
+	ldr	x1, [x22, #:lo12:.LANCHOR7]
+	ldrb	w0, [x0, 47]
+	csinc	w4, w4, wzr, ne
+	and	w4, w4, 255
+	and	w8, w2, 65535
+	ldrh	w3, [x6, 148]
+	udiv	w0, w0, w2
+	and	w5, w0, 65535
+	ubfiz	x0, x0, 2, 8
+	add	x0, x0, 4
+	add	w20, w5, 1
+	add	x0, x1, x0
+.L2581:
+	cmp	w2, 4
+	add	x1, x1, 4
+	csel	w7, w10, w4, eq
+	strb	w7, [x1, -1]
+	ldrb	w7, [x1, -2]
+	orr	w7, w7, -32
+	strb	w7, [x1, -2]
+	cmp	x1, x0
+	bne	.L2581
+	mul	w5, w5, w8
+	mov	w4, 16
+	add	w0, w8, w3
+	sdiv	w4, w4, w2
+	add	w0, w5, w0, uxth
+	strh	w0, [x6, 148]
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	add	w4, w20, w4
+	and	w4, w4, 65535
+	strh	w4, [x6, 134]
+	tbz	x0, 12, .L2582
+	adrp	x0, .LC153
+	mov	w3, w20
+	mov	w2, 128
+	mov	w1, 2273
+	add	x0, x0, :lo12:.LC153
 	bl	printf
-.L2593:
-	ldrh	w0, [x19, 6]
-	cmp	w0, 1
-	bne	.L2546
-	mov	x0, x19
-	bl	ftl_write_last_log_page
-.L2546:
+.L2582:
+	ldr	x0, [x21, #:lo12:.LANCHOR104]
+	mov	w2, 128
+	mov	w1, 255
+	add	x0, x0, 160
+	bl	ftl_memset
+	adrp	x0, .LANCHOR106
+	ldrb	w10, [x23, #:lo12:.LANCHOR69]
+	adrp	x3, .LANCHOR68
+	ldr	x2, [x21, #:lo12:.LANCHOR104]
+	ldrb	w16, [x0, #:lo12:.LANCHOR106]
+	adrp	x0, .LANCHOR31
+	and	w11, w10, 65535
+	ldr	x15, [x22, #:lo12:.LANCHOR7]
+	ldrb	w4, [x0, #:lo12:.LANCHOR31]
+	mov	w0, 24
+	ldrh	w8, [x2, 134]
+	sub	w0, w0, w4
+	ldrh	w4, [x3, #:lo12:.LANCHOR68]
+	mul	w1, w20, w11
+	mov	w3, 0
+	sub	w0, w0, w4
+	mov	w4, 1
+	and	w1, w1, 65535
+	lsl	w4, w4, w0
+	and	w4, w4, 65535
+.L2583:
+	cmp	w20, w8
+	bcc	.L2589
+	ldrh	w0, [x19, #:lo12:.LANCHOR6]
+	strh	w3, [x2, 112]
+	sub	w0, w0, w8
+	strh	wzr, [x2, 114]
+	strh	w0, [x2, 116]
+	strh	wzr, [x2, 118]
+	strh	w8, [x2, 132]
+	bl	ftl_low_format_data_init
+	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 368
+	ldp	x29, x30, [sp], 80
 	ret
-.L2566:
-	ldrb	w22, [x19, 5]
-	adrp	x0, .LANCHOR105
-	add	x0, x0, :lo12:.LANCHOR105
-	str	x0, [x29, 136]
-.L2554:
-	ldrb	w0, [x19, 9]
-	cmp	w0, w22
-	bhi	.L2565
-	add	w24, w24, 1
-	strb	wzr, [x19, 5]
-	and	w24, w24, 65535
-	b	.L2553
-.L2565:
-	add	x0, x19, x22, sxtw 1
-	mov	w1, 65535
-	ldrh	w0, [x0, 16]
-	cmp	w0, w1
-	beq	.L2555
-	ldr	x1, [x29, 136]
-	ldr	x2, [x20, 24]
-	ldrh	w1, [x1]
-	madd	w0, w1, w0, w24
-	ldr	x1, [x20, 8]
-	str	w0, [x29, 152]
-	adrp	x0, .LANCHOR125
-	ldrb	w3, [x0, #:lo12:.LANCHOR125]
-	ldr	w0, [x29, 152]
-	bl	ftl_read_ppa_page
-	mov	w28, w0
-	cmp	w0, 512
-	beq	.L2556
-	cmn	w0, #1
-	beq	.L2557
-	ldr	x0, [x20, 24]
-	ldr	w1, [x0]
-	cmn	w1, #1
-	bne	.L2557
-	ldr	w0, [x0, 4]
-	cmn	w0, #1
-	bne	.L2557
-	ldr	x0, [x20, 8]
-	ldr	w0, [x0]
-	cmn	w0, #1
-	beq	.L2556
-.L2557:
-	adrp	x0, .LANCHOR185
-	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR185]
-	ldrb	w0, [x19, 9]
-	ldrh	w1, [x19, 10]
-	madd	w0, w0, w24, w22
-	cmp	w1, w0
-	beq	.L2558
-	adrp	x1, .LANCHOR189
-	adrp	x0, .LC0
-	mov	w2, 1488
-	add	x1, x1, :lo12:.LANCHOR189
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2558:
-	ldrh	w0, [x19, 10]
-	ldrh	w1, [x19, 6]
-	ldrb	w2, [x19, 9]
-	add	w1, w1, w0
-	ldrh	w0, [x25, #:lo12:.LANCHOR87]
-	mul	w0, w0, w2
-	cmp	w1, w0
-	beq	.L2559
-	adrp	x1, .LANCHOR189
-	adrp	x0, .LC0
-	mov	w2, 1489
-	add	x1, x1, :lo12:.LANCHOR189
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2559:
-	cmn	w28, #1
-	beq	.L2561
-	ldr	x0, [x20, 24]
-	ldr	w0, [x0, 4]
-	cmn	w0, #1
-	beq	.L2561
-	bl	lpa_hash_get_ppa
-	ldr	x1, [x29, 144]
-	cbz	x1, .L2563
-	ldr	x3, [x20, 24]
-	ldr	w1, [x3, 8]
-	cmp	w0, w1
-	beq	.L2563
-	cmn	w0, #1
-	beq	.L2563
-	adrp	x5, .LANCHOR31
-	adrp	x6, .LANCHOR68
-	mov	w4, 24
-	mov	w28, 1
-	ldrb	w1, [x5, #:lo12:.LANCHOR31]
-	ldrh	w7, [x6, #:lo12:.LANCHOR68]
-	sub	w1, w4, w1
-	sub	w1, w1, w7
-	lsr	w2, w0, w7
-	adrp	x7, .LANCHOR69
-	lsl	w1, w28, w1
-	sub	w1, w1, #1
-	and	w1, w1, w2
-	ldrb	w2, [x7, #:lo12:.LANCHOR69]
-	udiv	w1, w1, w2
-	ldr	x2, [x29, 144]
-	ldrh	w2, [x2]
-	cmp	w2, w1, uxth
-	bne	.L2563
-	ldr	x1, [x29, 128]
-	adrp	x8, .LANCHOR181
-	ldr	w10, [x3]
-	add	x2, x8, :lo12:.LANCHOR181
-	str	w10, [x29, 160]
-	str	x8, [x29, 168]
-	ldrb	w3, [x1]
-	ldr	x1, [x20, 8]
-	str	x7, [x29, 96]
-	str	w4, [x29, 108]
-	stp	x5, x6, [x29, 112]
-	bl	ftl_read_ppa_page
-	ldr	x8, [x29, 168]
-	ldr	w10, [x29, 160]
-	ldr	w0, [x8, #:lo12:.LANCHOR181]
-	cmp	w10, w0
-	bhi	.L2563
-	ldr	x0, [x20, 24]
-	ldr	w3, [x0, 8]
-	cmn	w3, #1
-	beq	.L2561
-	ldp	x5, x6, [x29, 112]
-	ldr	w4, [x29, 108]
-	ldr	x7, [x29, 96]
-	ldrb	w2, [x5, #:lo12:.LANCHOR31]
-	ldrh	w1, [x6, #:lo12:.LANCHOR68]
-	sub	w4, w4, w2
-	sub	w4, w4, w1
-	lsr	w0, w3, w1
-	lsl	w28, w28, w4
-	sub	w28, w28, #1
-	and	w28, w28, w0
-	ldrb	w0, [x7, #:lo12:.LANCHOR69]
-	udiv	w0, w28, w0
-	bl	ftl_vpn_decrement
-.L2561:
-	ldrh	w0, [x19, 6]
-	sub	w0, w0, #1
-	strh	w0, [x19, 6]
-	ldrh	w0, [x19, 10]
-	add	w0, w0, 1
-	strh	w0, [x19, 10]
-	mov	w0, 4
-	str	w0, [x29, 168]
-	mov	w0, 1
-	str	w0, [x29, 160]
-.L2555:
-	add	w22, w22, 1
-	and	w22, w22, 65535
-	b	.L2554
-.L2570:
-	ldrh	w2, [x19, 12]
-	add	w2, w2, w1
-	ldr	w2, [x4, x2, lsl 2]
-	cmn	w2, #1
-	beq	.L2569
-	add	w22, w0, 1
-	and	w0, w22, 65535
-.L2569:
-	add	w1, w1, 1
-	b	.L2568
-.L2585:
-	ldr	w0, [x23, x28, lsl 2]
-	cmn	w0, #1
-	bne	.L2574
+.L2568:
+	ldrb	w1, [x0, 2]
+	add	x0, x0, 4
+	and	w1, w1, 31
+	bfi	w1, w3, 3, 2
+	strb	w1, [x0, -2]
+	b	.L2567
 .L2578:
-	adrp	x1, .LANCHOR104
-	ldr	x0, [x20, 24]
-	mov	w22, -1
-	ldr	x1, [x1, #:lo12:.LANCHOR104]
-	ldr	w1, [x1, 8]
-	stp	w1, w22, [x0]
-	stp	w22, wzr, [x0, 8]
-	ldr	x0, [x20, 8]
-	str	wzr, [x0]
-.L2575:
-	ldr	w0, [x29, 160]
-	cbz	w0, .L2580
-	ldrh	w0, [x19, 6]
-	cmp	w0, 1
-	bls	.L2580
-	add	x0, x21, :lo12:.LANCHOR14
-	str	x0, [x29, 144]
-	add	x0, x24, :lo12:.LANCHOR125
-	str	x0, [x29, 128]
-.L2641:
-	mov	x0, x19
-	bl	ftl_get_new_free_page
-	mov	w5, w0
-	ldr	x0, [x29, 144]
-	ldr	w0, [x0]
-	tbz	x0, 14, .L2582
-	ldrh	w0, [x19, 12]
-	mov	w1, w5
-	ldrh	w3, [x19, 10]
-	str	w5, [x29, 108]
-	add	w3, w3, w0
-	ldr	x0, [x20, 24]
-	sub	w3, w3, #1
-	ldr	w2, [x0, 4]
-	ldr	x0, [x29, 120]
-	bl	printf
-	ldr	w5, [x29, 108]
-.L2582:
-	ldr	x0, [x29, 112]
-	ldr	w2, [x29, 168]
-	ldrh	w1, [x19, 6]
-	ldrb	w0, [x0]
-	mul	w0, w0, w2
-	ldr	w2, [x29, 152]
-	add	w0, w0, 1
-	sub	w0, w0, w2
-	cmp	w1, w0
-	bls	.L2580
-	ldr	x0, [x29, 128]
-	ldr	x1, [x20, 8]
-	ldr	x2, [x20, 24]
-	str	w5, [x29, 96]
-	ldrb	w3, [x0]
-	mov	w0, w5
-	bl	ftl_prog_ppa_page
-	mov	w1, w0
-	ldrh	w0, [x19]
-	str	w1, [x29, 108]
-	bl	ftl_vpn_decrement
-	ldr	w1, [x29, 108]
-	cmn	w22, #1
-	ldr	w5, [x29, 96]
-	ccmn	w1, #1, 4, ne
-	beq	.L2583
-	ldrh	w0, [x19, 10]
-	ldrh	w1, [x19, 12]
-	str	w5, [x26, x28, lsl 2]
-	add	w0, w0, w1
-	sub	w0, w0, #1
-	str	w0, [x27, x28, lsl 2]
-.L2580:
-	add	x28, x28, 1
-	b	.L2573
-.L2574:
-	ldrb	w3, [x24, #:lo12:.LANCHOR125]
-	ldr	x1, [x20, 8]
-	ldr	x2, [x20, 24]
-	bl	ftl_read_ppa_page
-	mov	w22, w0
-	ldr	x0, [x20, 24]
-	ldr	w0, [x0, 4]
-	bl	lpa_hash_get_ppa
-	mov	w5, w0
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 14, .L2576
-	ldr	x0, [x20, 24]
-	mov	w1, w5
-	ldr	w2, [x23, x28, lsl 2]
-	str	w5, [x29, 144]
-	ldr	w3, [x0, 4]
-	adrp	x0, .LC158
-	add	x0, x0, :lo12:.LC158
-	bl	printf
-	ldr	w5, [x29, 144]
+	adrp	x0, .LANCHOR75
+	strh	w20, [x24]
+	ldrb	w0, [x0, #:lo12:.LANCHOR75]
+	cbnz	w0, .L2570
+	mov	w0, w20
+	bl	ftl_test_block
+.L2570:
+	ldrb	w11, [x23, #:lo12:.LANCHOR69]
+	adrp	x0, .LANCHOR106
+	ldr	x6, [x22, #:lo12:.LANCHOR7]
+	mov	w7, 0
+	ldrb	w14, [x0, #:lo12:.LANCHOR106]
+	mov	w10, 0
+	ldr	x13, [x21, #:lo12:.LANCHOR104]
+	mov	w8, 0
+	mul	w12, w20, w11
+	add	x6, x6, x20, uxth 2
+.L2571:
+	cmp	w8, w14
+	bcs	.L2575
+	add	w15, w11, w7
+	b	.L2576
+.L2574:
+	add	w1, w7, w12
+	mov	w0, w8
+	bl	flash_check_bad_block
+	cbz	w0, .L2572
+	ldrb	w1, [x6, 3]
+	lsl	w0, w26, w7
+	orr	w0, w0, w1
+	strb	w0, [x6, 3]
+	ldrh	w0, [x13, 148]
+	add	w0, w0, 1
+	strh	w0, [x13, 148]
+.L2573:
+	add	w7, w7, 1
 .L2576:
-	ldr	w0, [x23, x28, lsl 2]
-	mov	w1, 1
-	cmp	w5, w0
-	ldr	x0, [x20, 24]
-	csinv	w22, w22, wzr, eq
-	cmn	w22, #1
-	stp	w5, w1, [x0, 8]
-	bne	.L2575
-	b	.L2578
-.L2583:
-	ldrh	w0, [x19, 6]
-	cmp	w0, 1
-	bls	.L2580
-	cmn	w22, #1
-	bne	.L2641
-	b	.L2580
-.L2592:
-	ldr	w0, [x26, x22, lsl 2]
-	cmn	w0, #1
-	beq	.L2588
-	ldrb	w3, [x24, #:lo12:.LANCHOR125]
-	ldr	w0, [x23, x22, lsl 2]
-	ldr	x1, [x20, 8]
-	ldr	x2, [x20, 24]
-	bl	ftl_read_ppa_page
-	cmp	w0, 256
-	ccmn	w0, #1, 4, ne
-	bne	.L2588
-	ldrb	w3, [x24, #:lo12:.LANCHOR125]
-	ldr	w0, [x26, x22, lsl 2]
-	ldr	x1, [x20, 8]
-	ldr	x2, [x20, 24]
-	bl	ftl_read_ppa_page
-	mov	w5, w0
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 14, .L2590
-	ldr	x0, [x20, 24]
-	mov	w1, w5
-	ldr	w3, [x23, x22, lsl 2]
-	str	w5, [x29, 144]
-	ldr	w2, [x0, 8]
-	mov	x0, x28
-	bl	printf
-	ldr	w5, [x29, 144]
-.L2590:
-	cmn	w5, #1
-	beq	.L2588
-	ldr	x0, [x20, 24]
-	ldr	w2, [x23, x22, lsl 2]
-	ldr	w1, [x0, 8]
-	cmp	w2, w1
-	bne	.L2588
-	ldr	w1, [x21, #:lo12:.LANCHOR14]
-	tbz	x1, 14, .L2591
-	ldr	w1, [x0, 4]
-	ldr	w3, [x27, x22, lsl 2]
-	ldr	x0, [x29, 152]
-	bl	printf
-.L2591:
-	ldr	x0, [x20, 24]
-	lsl	x1, x22, 2
-	ldrh	w2, [x27, x1]
-	ldr	w1, [x0, 8]
-	ldr	w0, [x0, 4]
-	bl	lpa_hash_update_ppa
+	cmp	w7, w15
+	bne	.L2574
+	add	w8, w8, 1
+	sub	w12, w12, w11
+	and	w8, w8, 65535
+	b	.L2571
+.L2572:
+	add	w10, w10, 1
+	and	w10, w10, 65535
+	b	.L2573
+.L2575:
+	cbnz	w10, .L2577
+	ldrb	w0, [x6, 2]
+	orr	w0, w0, -32
+	strb	w0, [x6, 2]
+.L2577:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L2569
+.L2589:
+	add	x13, x15, x20, uxth 2
+	mov	w6, 0
+	mov	w12, 0
+	mov	w5, 0
+	ldrb	w0, [x13, 2]
+	orr	w0, w0, -32
+	strb	w0, [x13, 2]
+.L2584:
+	cmp	w5, w16
+	bcc	.L2591
+	add	w20, w20, 1
+	add	w1, w1, w11
+	and	w20, w20, 65535
+	and	w1, w1, 65535
+	b	.L2583
+.L2587:
+	ldrb	w14, [x13, 3]
+	add	w17, w12, w7
+	asr	w14, w14, w17
+	tbnz	x14, 0, .L2585
+	cmp	w10, 1
+	bls	.L2590
+	and	w0, w0, 1
+	add	w0, w1, w0
+	and	w0, w0, 65535
+.L2586:
+	add	x14, x2, x3, sxtw 1
+	add	w3, w3, 1
+	and	w3, w3, 65535
+	add	w0, w0, w6
+	strh	w0, [x14, 160]
+.L2585:
+	add	x7, x7, 1
 .L2588:
-	add	x22, x22, 1
+	and	w0, w7, 65535
+	cmp	w0, w11
+	bcc	.L2587
+	add	w5, w5, 1
+	add	w6, w4, w6
+	and	w5, w5, 65535
+	add	w12, w12, w10
+	and	w6, w6, 65535
+	b	.L2584
+.L2590:
+	mov	w0, w1
 	b	.L2586
-.L2563:
-	ldr	x3, [x20, 24]
-	adrp	x0, .LANCHOR122
-	ldr	w0, [x0, #:lo12:.LANCHOR122]
-	ldr	w1, [x3, 4]
-	cmp	w1, w0
-	bcs	.L2561
-	ldrb	w0, [x19, 9]
-	ldrh	w1, [x25, #:lo12:.LANCHOR87]
-	ldrh	w2, [x19, 10]
-	mul	w0, w0, w1
-	sub	w0, w0, #1
-	cmp	w2, w0
-	bge	.L2561
-	adrp	x0, .LANCHOR104
-	ldr	w1, [x3]
-	ldr	x0, [x0, #:lo12:.LANCHOR104]
-	ldr	w4, [x0, 8]
-	cmp	w1, w4
-	bls	.L2564
-	str	w1, [x0, 8]
-.L2564:
-	ldrh	w0, [x19, 12]
-	add	w2, w2, w0
-	ldp	w0, w1, [x3, 4]
-	bl	lpa_hash_update_ppa
-	ldr	w0, [x29, 180]
-	str	w0, [x29, 176]
-	ldr	w0, [x29, 184]
-	str	w0, [x29, 180]
-	ldr	w0, [x29, 188]
-	str	w0, [x29, 184]
-	ldr	w0, [x29, 152]
-	str	w0, [x29, 188]
-	b	.L2561
-	.size	ftl_open_sblk_recovery, .-ftl_open_sblk_recovery
-	.section	.text.pm_write_page,"ax",@progbits
+.L2591:
+	mov	x7, 0
+	b	.L2588
+	.size	ftl_low_format, .-ftl_low_format
+	.section	.text.ftl_re_low_format,"ax",@progbits
 	.align	2
-	.global	pm_write_page
-	.type	pm_write_page, %function
-pm_write_page:
-	stp	x29, x30, [sp, -96]!
+	.global	ftl_re_low_format
+	.type	ftl_re_low_format, %function
+ftl_re_low_format:
+	stp	x29, x30, [sp, -16]!
+	mov	w1, 1
+	adrp	x0, .LC154
+	add	x0, x0, :lo12:.LC154
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	w19, w0
-	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR87
-	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR105
-	stp	x25, x26, [sp, 64]
-	adrp	x23, .LANCHOR104
-	mov	x25, x1
-	add	x21, x21, :lo12:.LANCHOR87
-	mov	x20, x23
-	add	x22, x22, :lo12:.LANCHOR105
-	mov	w24, 65535
-	str	x27, [sp, 80]
-.L2668:
-	ldr	x0, [x23, #:lo12:.LANCHOR104]
-	ldr	w1, [x0, 48]
-	ldrh	w2, [x0, 696]
-	add	w1, w1, 1
-	str	w1, [x0, 48]
-	ldrh	w1, [x21]
-	cmp	w2, w1
-	bcs	.L2669
-	ldrh	w0, [x0, 692]
-	cmp	w0, w24
-	bne	.L2670
-.L2669:
-	bl	pm_alloc_new_blk
-	mov	w0, 0
-	bl	ftl_info_flush
-.L2670:
-	ldr	x0, [x20, #:lo12:.LANCHOR104]
-	ldrh	w0, [x0, 692]
-	cmp	w0, w24
-	bne	.L2671
-	adrp	x1, .LANCHOR190
-	adrp	x0, .LC0
-	mov	w2, 263
-	add	x1, x1, :lo12:.LANCHOR190
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2671:
-	ldr	x0, [x20, #:lo12:.LANCHOR104]
-	adrp	x27, .LANCHOR191
-	ldrh	w1, [x22]
-	mov	w2, 64
-	ldrh	w26, [x0, 692]
-	ldrh	w0, [x0, 696]
-	madd	w26, w26, w1, w0
-	ldr	x0, [x27, #:lo12:.LANCHOR191]
-	mov	w1, 0
-	bl	ftl_memset
-	ldr	x3, [x27, #:lo12:.LANCHOR191]
-	mov	x2, x25
-	ldr	x0, [x20, #:lo12:.LANCHOR104]
-	str	w19, [x3]
-	ldr	w1, [x0, 48]
-	ldrb	w0, [x0, 694]
-	str	w1, [x3, 4]
-	adrp	x1, .LANCHOR125
-	ldrb	w4, [x1, #:lo12:.LANCHOR125]
-	mov	w1, w26
-	bl	ftl_prog_page
-	ldr	x2, [x20, #:lo12:.LANCHOR104]
-	ldrh	w1, [x2, 696]
-	add	w1, w1, 1
-	and	w1, w1, 65535
-	strh	w1, [x2, 696]
-	cmp	w1, 1
-	adrp	x1, .LANCHOR192
-	beq	.L2672
-	ldrb	w3, [x1, #:lo12:.LANCHOR192]
-	cbz	w3, .L2673
-.L2672:
-	strb	wzr, [x1, #:lo12:.LANCHOR192]
-	b	.L2668
-.L2673:
-	cmn	w0, #1
-	bne	.L2675
-	mov	w1, w26
-	adrp	x0, .LC161
-	add	x0, x0, :lo12:.LC161
 	bl	printf
-	b	.L2668
-.L2675:
-	ldrh	w0, [x2, 698]
-	cmp	w19, w0
-	bcs	.L2676
-	add	x19, x2, x19, uxtw 2
-	str	w26, [x19, 704]
-.L2676:
+	bl	sblk_init
+	bl	ftl_info_blk_init
+	bl	ftl_ext_info_init
+	adrp	x0, .LANCHOR104
+	adrp	x2, .LANCHOR6
+	mov	w3, 0
+	mov	w4, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR104]
+	mov	w5, 0
+	ldrh	w7, [x2, #:lo12:.LANCHOR6]
+	adrp	x2, .LANCHOR7
+	ldr	x2, [x2, #:lo12:.LANCHOR7]
+	ldrh	w1, [x0, 134]
+	add	x2, x2, x1, uxth 2
+.L2602:
+	cmp	w1, w7
+	bcc	.L2606
+	strh	w5, [x0, 114]
+	strh	w4, [x0, 118]
+	strh	w3, [x0, 116]
+	strh	wzr, [x0, 122]
+	strh	wzr, [x0, 120]
+	strh	wzr, [x0, 124]
+	bl	ftl_low_format_data_init
 	mov	w0, 0
-	ldr	x27, [sp, 80]
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 96
+	ldp	x29, x30, [sp], 16
 	ret
-	.size	pm_write_page, .-pm_write_page
-	.section	.text.ftl_dump_write_open_sblk,"ax",@progbits
+.L2606:
+	ldrb	w6, [x2, 2]
+	and	w8, w6, 31
+	strb	w8, [x2, 2]
+	ands	w6, w6, 24
+	bne	.L2603
+	add	w5, w5, 1
+	and	w5, w5, 65535
+.L2604:
+	add	w1, w1, 1
+	add	x2, x2, 4
+	and	w1, w1, 65535
+	b	.L2602
+.L2603:
+	cmp	w6, 16
+	bne	.L2605
+	add	w4, w4, 1
+	and	w4, w4, 65535
+	b	.L2604
+.L2605:
+	add	w3, w3, 1
+	and	w3, w3, 65535
+	b	.L2604
+	.size	ftl_re_low_format, .-ftl_re_low_format
+	.section	.text.ftl_prog_ppa_page,"ax",@progbits
 	.align	2
-	.global	ftl_dump_write_open_sblk
-	.type	ftl_dump_write_open_sblk, %function
-ftl_dump_write_open_sblk:
-	sub	sp, sp, #224
-	stp	x29, x30, [sp, 48]
-	add	x29, sp, 48
-	stp	x19, x20, [sp, 64]
-	and	w20, w0, 65535
-	adrp	x0, .LANCHOR6
-	stp	x21, x22, [sp, 80]
-	stp	x23, x24, [sp, 96]
-	ldrh	w0, [x0, #:lo12:.LANCHOR6]
-	stp	x25, x26, [sp, 112]
-	stp	x27, x28, [sp, 128]
-	cmp	w0, w20
-	bls	.L2681
-	adrp	x25, .LANCHOR77
-	str	x25, [x29, 136]
-	ldrb	w0, [x25, #:lo12:.LANCHOR77]
-	cbnz	w0, .L2683
-	adrp	x0, .LANCHOR74
-	ldrb	w0, [x0, #:lo12:.LANCHOR74]
-	cbz	w0, .L2681
-.L2683:
-	adrp	x0, .LANCHOR7
-	ubfiz	x14, x20, 2, 16
-	mov	x15, x0
-	ldr	x1, [x0, #:lo12:.LANCHOR7]
-	add	x1, x1, x14
-	ldrb	w1, [x1, 2]
-	and	w1, w1, 224
-	cmp	w1, 160
-	bne	.L2703
-	adrp	x0, .LANCHOR73
-	ldrb	w10, [x0, #:lo12:.LANCHOR73]
-.L2684:
-	add	x22, x29, 176
-	adrp	x23, .LANCHOR87
-	str	w10, [x29, 128]
-	mov	w0, w20
-	mov	w24, 0
-	mov	w25, 0
-	strh	w20, [x22, -32]!
-	mov	w27, 0
-	add	x1, x22, 16
-	bl	ftl_get_blk_list_in_sblk
-	ldrh	w1, [x23, #:lo12:.LANCHOR87]
-	and	w0, w0, 255
-	strb	w0, [x29, 153]
-	strb	wzr, [x29, 149]
-	strh	wzr, [x29, 146]
-	mul	w0, w0, w1
-	strh	wzr, [x29, 154]
-	strh	w0, [x29, 150]
-	ldr	x0, [x15, #:lo12:.LANCHOR7]
-	add	x1, x0, x14
-	ldr	w5, [x0, x14]
-	ldrb	w2, [x1, 2]
-	mov	w1, w20
-	ldrh	w4, [x0, x14]
-	adrp	x0, .LC162
-	ubfx	x5, x5, 11, 8
-	add	x0, x0, :lo12:.LC162
-	ubfx	x3, x2, 3, 2
-	and	w4, w4, 2047
-	ubfx	x2, x2, 5, 3
-	bl	printf
-	mov	w0, 1
-	bl	buf_alloc
+	.global	ftl_prog_ppa_page
+	.type	ftl_prog_ppa_page, %function
+ftl_prog_ppa_page:
+	adrp	x4, .LANCHOR31
+	mov	w5, 1
+	ldrb	w6, [x4, #:lo12:.LANCHOR31]
+	mov	w4, 24
+	sub	w4, w4, w6
+	lsl	w7, w5, w4
+	sub	w7, w7, #1
+	lsl	w5, w5, w6
+	sub	w6, w5, #1
+	lsr	w5, w0, w4
+	mov	w4, w3
+	mov	x3, x2
+	mov	x2, x1
+	and	w1, w7, w0
+	and	w0, w6, w5
+	b	ftl_prog_page
+	.size	ftl_prog_ppa_page, .-ftl_prog_ppa_page
+	.section	.text.ftl_write_last_log_page,"ax",@progbits
+	.align	2
+	.global	ftl_write_last_log_page
+	.type	ftl_write_last_log_page, %function
+ftl_write_last_log_page:
+	ldrh	w1, [x0, 6]
+	cmp	w1, 1
+	bne	.L2611
+	stp	x29, x30, [sp, -48]!
+	adrp	x1, .LANCHOR111
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	ldr	w10, [x29, 128]
-	adrp	x12, .LANCHOR105
-	add	x14, x23, :lo12:.LANCHOR87
-	add	x12, x12, :lo12:.LANCHOR105
-.L2685:
-	ldrh	w0, [x14]
-	cmp	w0, w25
-	bls	.L2691
-	lsl	w11, w25, 1
-	adrp	x26, .LC163
-	sub	w11, w11, #1
-	mov	w27, 0
-	add	x26, x26, :lo12:.LC163
-	b	.L2695
-.L2703:
-	mov	w10, 1
-	b	.L2684
-.L2693:
-	ldrh	w13, [x22, x28]
-	mov	w0, 65535
-	cmp	w13, w0
-	bne	.L2686
-.L2692:
-	add	w24, w24, 1
-	and	w24, w24, 65535
-.L2687:
-	cmp	w10, w24
-	bcs	.L2693
-	add	w27, w27, 1
-	and	w27, w27, 65535
-.L2695:
-	ldrb	w0, [x29, 153]
-	cmp	w0, w27
-	bls	.L2694
-	sxtw	x28, w27
-	mov	w24, 1
-	add	x28, x28, 8
-	lsl	x28, x28, 1
-	b	.L2687
-.L2686:
-	ldrh	w21, [x12]
-	cmp	w10, 3
-	mul	w21, w21, w13
-	bne	.L2688
-	add	w21, w25, w21
-	orr	w21, w21, w24, lsl 24
-.L2689:
-	str	w21, [x19, 40]
-	mov	w1, 1
-	stp	x12, x14, [x29, 96]
-	mov	x0, x19
-	stp	w11, w10, [x29, 116]
-	str	w13, [x29, 124]
-	bl	sblk_read_page
-	ldr	x1, [x19, 24]
-	mov	w3, w21
-	ldr	x0, [x19, 8]
-	ldr	w15, [x19, 52]
-	ldr	w13, [x29, 124]
-	ldr	w2, [x1, 12]
-	mov	w4, w15
-	str	w2, [sp, 32]
-	str	w15, [x29, 128]
-	ldr	w2, [x1, 8]
-	str	w2, [sp, 24]
-	ldr	w2, [x1, 4]
-	str	w2, [sp, 16]
-	mov	w2, w25
-	ldr	w1, [x1]
-	str	w1, [sp, 8]
-	ldr	w1, [x0, 12]
-	str	w1, [sp]
-	mov	w1, w13
-	ldp	w5, w6, [x0]
-	ldr	w7, [x0, 8]
-	mov	x0, x26
-	bl	printf
-	ldr	w15, [x29, 128]
-	ldp	w11, w10, [x29, 116]
-	cmp	w15, 512
-	ldp	x12, x14, [x29, 96]
-	bne	.L2692
-.L2691:
-	mov	w4, w24
-	mov	w3, w27
-	mov	w2, w25
-	mov	w1, w20
-	adrp	x24, .LANCHOR125
-	adrp	x0, .LC164
-	add	x0, x0, :lo12:.LC164
-	bl	printf
-	ldr	x0, [x19, 8]
-	mov	w1, 0
-	ldrb	w2, [x24, #:lo12:.LANCHOR125]
-	adrp	x26, .LC165
-	adrp	x27, .LANCHOR73
-	add	x26, x26, :lo12:.LC165
-	add	x27, x27, :lo12:.LANCHOR73
-	lsl	w2, w2, 9
-	bl	ftl_memset
-	ldr	x0, [x19, 24]
-	mov	w1, 0
-	ldrb	w2, [x24, #:lo12:.LANCHOR125]
-	lsl	w2, w2, 1
-	bl	ftl_memset
-.L2696:
-	ldrh	w0, [x23, #:lo12:.LANCHOR87]
-	cmp	w0, w25
-	bls	.L2701
-	ldr	x0, [x29, 136]
-	lsl	w28, w25, 1
-	mov	w21, 0
-	add	x0, x0, :lo12:.LANCHOR77
-	str	x0, [x29, 128]
-	b	.L2702
-.L2688:
-	cmp	w10, 2
-	bne	.L2690
-	adrp	x0, .LANCHOR73
-	add	w21, w21, w11
-	add	w21, w21, w24
-	ldrb	w3, [x0, #:lo12:.LANCHOR73]
-	orr	w21, w21, w3, lsl 24
-	b	.L2689
-.L2690:
-	add	w21, w25, w21
-	b	.L2689
-.L2694:
-	add	w8, w25, 1
-	and	w25, w8, 65535
-	b	.L2685
-.L2700:
-	mov	w2, w21
-	mov	w1, w25
-	mov	x0, x26
-	bl	printf
-	ldr	x0, [x29, 128]
-	adrp	x2, .LANCHOR105
-	ldrb	w1, [x0]
-	sxtw	x0, w21
-	cbz	w1, .L2697
-	add	x0, x0, 8
-	ldrh	w1, [x2, #:lo12:.LANCHOR105]
-	ldrh	w0, [x22, x0, lsl 1]
-	mul	w0, w0, w1
-	orr	w0, w0, w25
-	str	w0, [x19, 40]
-	mov	x0, x19
-	bl	sblk_3d_tlc_dump_prog
-.L2698:
-	add	w21, w21, 1
-	and	w21, w21, 65535
-.L2702:
-	ldrb	w0, [x29, 153]
-	cmp	w0, w21
-	bhi	.L2700
-	add	w8, w25, 1
-	and	w25, w8, 65535
-	b	.L2696
-.L2697:
-	ldrb	w1, [x27]
-	add	x0, x0, 8
-	cmp	w1, 2
-	bne	.L2699
-	ldrh	w0, [x22, x0, lsl 1]
-	ldrh	w1, [x2, #:lo12:.LANCHOR105]
-	mul	w0, w0, w1
-	orr	w0, w0, w28
-	orr	w0, w0, 33554432
-	str	w0, [x19, 40]
-	mov	x0, x19
-	bl	sblk_mlc_dump_prog
-	b	.L2698
-.L2699:
-	ldrh	w1, [x22, x0, lsl 1]
-	mov	w6, 1
-	ldrh	w0, [x2, #:lo12:.LANCHOR105]
-	mov	w5, 0
-	ldrb	w4, [x24, #:lo12:.LANCHOR125]
-	ldr	x3, [x19, 24]
+	stp	x21, x22, [sp, 32]
+	ldr	x20, [x1, #:lo12:.LANCHOR111]
+	ldrh	w22, [x0, 12]
+	bl	ftl_get_new_free_page
+	mov	w21, w0
+	cmn	w0, #1
+	beq	.L2612
+	ldrh	w0, [x19]
+	add	x20, x20, x22, uxth 2
+	bl	ftl_vpn_decrement
+	adrp	x0, .LANCHOR182
+	mov	w1, 15555
+	add	x6, x0, :lo12:.LANCHOR182
+	movk	w1, 0xf55f, lsl 16
+	str	w1, [x0, #:lo12:.LANCHOR182]
+	adrp	x0, .LANCHOR87
+	ldrh	w1, [x0, #:lo12:.LANCHOR87]
+	adrp	x0, .LANCHOR80
+	ldrb	w0, [x0, #:lo12:.LANCHOR80]
 	mul	w1, w1, w0
-	adrp	x0, .LANCHOR31
-	ldrb	w2, [x0, #:lo12:.LANCHOR31]
-	mov	w0, 24
-	orr	w1, w1, w25
-	str	w1, [x19, 40]
-	sub	w0, w0, w2
-	lsl	w6, w6, w2
-	ldr	x2, [x19, 8]
-	sub	w6, w6, #1
-	lsl	w7, w6, w0
-	lsr	w0, w1, w0
-	bic	w1, w1, w7
-	and	w0, w0, w6
-	bl	flash_prog_page_en
-	b	.L2698
-.L2701:
-	mov	x0, x19
-	bl	zbuf_free
-	adrp	x0, .LC166
-	mov	w1, w20
-	add	x0, x0, :lo12:.LC166
-	bl	printf
-.L2681:
-	ldp	x19, x20, [sp, 64]
-	ldp	x21, x22, [sp, 80]
-	ldp	x23, x24, [sp, 96]
-	ldp	x25, x26, [sp, 112]
-	ldp	x27, x28, [sp, 128]
-	ldp	x29, x30, [sp, 48]
-	add	sp, sp, 224
+	mov	x0, x20
+	lsl	w1, w1, 2
+	bl	js_hash
+	stp	w0, wzr, [x6, 4]
+	adrp	x0, .LANCHOR126
+	mov	x2, x6
+	mov	x1, x20
+	ldrb	w3, [x0, #:lo12:.LANCHOR126]
+	mov	w0, w21
+	str	wzr, [x6, 12]
+	bl	ftl_prog_ppa_page
+.L2612:
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 48
 	ret
-	.size	ftl_dump_write_open_sblk, .-ftl_dump_write_open_sblk
-	.section	.text.ftl_ink_check_sblk,"ax",@progbits
+.L2611:
+	mov	w0, -1
+	ret
+	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
+	.section	.text.ftl_open_sblk_recovery,"ax",@progbits
 	.align	2
-	.global	ftl_ink_check_sblk
-	.type	ftl_ink_check_sblk, %function
-ftl_ink_check_sblk:
-	stp	x29, x30, [sp, -144]!
+	.global	ftl_open_sblk_recovery
+	.type	ftl_open_sblk_recovery, %function
+ftl_open_sblk_recovery:
+	stp	x29, x30, [sp, -368]!
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR7
-	stp	x19, x20, [sp, 16]
-	and	w19, w0, 65535
-	ldr	x0, [x24, #:lo12:.LANCHOR7]
-	ubfiz	x23, x19, 2, 16
 	stp	x21, x22, [sp, 32]
-	mov	w1, w19
+	adrp	x21, .LANCHOR14
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	ldr	w3, [x0, x23]
-	ldrh	w2, [x0, x23]
-	adrp	x0, .LC167
-	add	x0, x0, :lo12:.LC167
-	ubfx	x3, x3, 11, 8
-	and	w2, w2, 2047
+	str	x1, [x29, 144]
+	tbz	x0, 12, .L2618
+	ldrh	w1, [x19, 2]
+	adrp	x0, .LC155
+	add	x0, x0, :lo12:.LC155
 	bl	printf
-	mov	w0, 65535
-	cmp	w19, w0
-	beq	.L2711
+.L2618:
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2619
+	ldrb	w1, [x19, 5]
+	adrp	x0, .LC156
+	add	x0, x0, :lo12:.LC156
+	bl	printf
+.L2619:
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2620
+	ldrh	w1, [x19]
+	adrp	x0, .LC157
+	add	x0, x0, :lo12:.LC157
+	bl	printf
+.L2620:
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2621
+	ldrh	w2, [x19, 18]
+	adrp	x0, .LC158
+	ldrh	w1, [x19, 16]
+	add	x0, x0, :lo12:.LC158
+	bl	printf
+.L2621:
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2622
+	ldrb	w1, [x19, 9]
+	adrp	x0, .LC159
+	add	x0, x0, :lo12:.LC159
+	bl	printf
+.L2622:
+	ldrh	w0, [x19, 10]
+	strh	w0, [x19, 14]
 	adrp	x0, .LANCHOR6
+	ldrh	w1, [x19]
 	ldrh	w0, [x0, #:lo12:.LANCHOR6]
-	cmp	w0, w19
-	bls	.L2711
-	add	x21, x29, 144
-	mov	w1, 0
-	mov	w0, w19
-	bl	ftl_erase_sblk
-	mov	w0, w19
-	adrp	x27, .LANCHOR125
-	strh	w19, [x21, -32]!
-	add	x1, x21, 16
-	bl	ftl_get_blk_list_in_sblk
-	strb	w0, [x29, 121]
+	cmp	w1, w0
+	bcs	.L2617
 	mov	w0, 1
+	add	x23, x29, 176
 	bl	buf_alloc
+	add	x26, x29, 240
+	mov	w2, 64
+	mov	w1, 255
 	mov	x20, x0
-	ldr	x0, [x24, #:lo12:.LANCHOR7]
-	ldrb	w2, [x27, #:lo12:.LANCHOR125]
-	ldrh	w0, [x0, x23]
-	lsl	w2, w2, 9
-	and	w0, w0, 2047
-	cmp	w0, 1
-	bgt	.L2713
-	mov	w1, 85
-.L2729:
-	ldr	x0, [x20, 8]
-	adrp	x28, .LANCHOR105
-	add	x28, x28, :lo12:.LANCHOR105
-	mov	w26, 0
+	mov	x0, x23
 	bl	ftl_memset
-	bl	sblk_wait_write_queue_completed
-	mov	w7, 65280
-	movk	w7, 0x55aa, lsl 16
-.L2715:
+	add	x27, x29, 304
+	mov	w2, 64
+	mov	w1, 255
+	mov	x0, x26
+	bl	ftl_memset
+	mov	w2, 64
+	mov	w1, 255
+	mov	x0, x27
+	bl	ftl_memset
+	ldrb	w22, [x19, 5]
+	mov	w0, 2
+	ldrh	w24, [x19, 2]
 	adrp	x25, .LANCHOR87
+	str	w0, [x29, 168]
+	adrp	x0, .LANCHOR126
+	str	wzr, [x29, 160]
+	add	x0, x0, :lo12:.LANCHOR126
+	str	x0, [x29, 128]
+.L2624:
 	ldrh	w0, [x25, #:lo12:.LANCHOR87]
-	cmp	w0, w26
-	bls	.L2718
-	adrp	x25, .LANCHOR31
-	mov	w22, 0
-	add	x25, x25, :lo12:.LANCHOR31
-	b	.L2719
-.L2713:
-	mov	w1, 170
-	b	.L2729
-.L2717:
-	add	x0, x21, x22, sxtw 1
+	cmp	w0, w24
+	bhi	.L2637
+.L2627:
+	ldrh	w0, [x19, 10]
+	ldrh	w1, [x19, 6]
+	ldrh	w2, [x25, #:lo12:.LANCHOR87]
+	add	w1, w1, w0
+	ldrb	w0, [x19, 9]
+	strh	w24, [x19, 2]
+	strb	w22, [x19, 5]
+	mul	w0, w0, w2
+	cmp	w1, w0
+	beq	.L2638
+	adrp	x1, .LANCHOR195
+	adrp	x0, .LC0
+	mov	w2, 1579
+	add	x1, x1, :lo12:.LANCHOR195
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2638:
+	adrp	x2, .LANCHOR111
+	ldrh	w3, [x19, 10]
+	mov	w0, 0
+	mov	w1, 0
+	ldr	x4, [x2, #:lo12:.LANCHOR111]
+	str	x2, [x29, 136]
+.L2639:
+	cmp	w1, w3
+	bcc	.L2641
+	ldrb	w22, [x19, 9]
+	adrp	x24, .LANCHOR9
+	ldrh	w1, [x25, #:lo12:.LANCHOR87]
+	madd	w22, w22, w1, w0
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	sub	w22, w22, w3
+	and	w22, w22, 65535
+	tbz	x0, 12, .L2642
+	ldrh	w1, [x19]
+	ldr	x2, [x24, #:lo12:.LANCHOR9]
+	ubfiz	x0, x1, 1, 16
+	ldrh	w3, [x2, x0]
+	adrp	x0, .LC160
+	mov	w2, w22
+	add	x0, x0, :lo12:.LC160
+	bl	printf
+.L2642:
+	ldr	x0, [x24, #:lo12:.LANCHOR9]
+	ldrh	w1, [x19]
+	strh	w22, [x0, x1, lsl 1]
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 14, .L2643
+	ldp	w1, w2, [x29, 176]
+	adrp	x0, .LC161
+	ldp	w3, w4, [x29, 184]
+	add	x0, x0, :lo12:.LC161
+	bl	printf
+.L2643:
+	adrp	x24, .LANCHOR126
+	ldr	x0, [x20, 8]
+	mov	w1, 0
+	mov	x28, 0
+	ldrb	w2, [x24, #:lo12:.LANCHOR126]
+	lsl	w2, w2, 9
+	bl	ftl_memset
+	adrp	x0, .LC163
+	add	x0, x0, :lo12:.LC163
+	str	x0, [x29, 120]
+	adrp	x0, .LANCHOR80
+	add	x0, x0, :lo12:.LANCHOR80
+	str	x0, [x29, 112]
+.L2644:
+	adrp	x0, .LANCHOR80
+	ldr	w2, [x29, 168]
+	add	x1, x0, :lo12:.LANCHOR80
+	str	w28, [x29, 152]
+	ldrb	w0, [x0, #:lo12:.LANCHOR80]
+	mul	w0, w0, w2
+	cmp	w28, w0
+	bcc	.L2656
+	adrp	x0, .LC164
+	add	x0, x0, :lo12:.LC164
+	stp	x0, x1, [x29, 152]
+	adrp	x0, .LC163
+	add	x28, x0, :lo12:.LC163
+	mov	x22, 0
+.L2657:
+	ldr	x0, [x29, 160]
+	ldr	w1, [x29, 168]
+	ldrb	w0, [x0]
+	mul	w0, w0, w1
+	cmp	w0, w22
+	bhi	.L2663
+	mov	x0, x20
+	bl	zbuf_free
+	ldrh	w1, [x19, 12]
+	ldrh	w0, [x25, #:lo12:.LANCHOR87]
+	ldrb	w2, [x19, 9]
+	madd	w0, w0, w2, w1
+	mov	x1, -4
+	add	x0, x1, x0, sxtw 2
+	ldr	x1, [x29, 136]
+	ldr	x1, [x1, #:lo12:.LANCHOR111]
+	ldr	w0, [x1, x0]
+	cmn	w0, #1
+	beq	.L2664
+	adrp	x1, .LANCHOR195
+	adrp	x0, .LC0
+	mov	w2, 1670
+	add	x1, x1, :lo12:.LANCHOR195
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2664:
+	ldrh	w0, [x19, 6]
+	cmp	w0, 1
+	bne	.L2617
+	mov	x0, x19
+	bl	ftl_write_last_log_page
+.L2617:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 368
+	ret
+.L2637:
+	ldrb	w22, [x19, 5]
+	adrp	x0, .LANCHOR105
+	add	x0, x0, :lo12:.LANCHOR105
+	str	x0, [x29, 136]
+.L2625:
+	ldrb	w0, [x19, 9]
+	cmp	w0, w22
+	bhi	.L2636
+	add	w24, w24, 1
+	strb	wzr, [x19, 5]
+	and	w24, w24, 65535
+	b	.L2624
+.L2636:
+	add	x0, x19, x22, sxtw 1
 	mov	w1, 65535
 	ldrh	w0, [x0, 16]
 	cmp	w0, w1
-	beq	.L2716
-	ldrh	w1, [x28]
-	mov	w6, 1
-	ldr	x2, [x20, 8]
-	mov	w5, 0
-	ldr	x3, [x20, 24]
-	str	w7, [x29, 108]
-	madd	w1, w1, w0, w26
-	mov	w0, 24
-	stp	w1, w7, [x2]
-	str	wzr, [x3]
-	ldrb	w4, [x25]
-	sub	w0, w0, w4
-	lsl	w6, w6, w4
-	ldrb	w4, [x27, #:lo12:.LANCHOR125]
-	sub	w6, w6, #1
-	lsl	w8, w6, w0
-	lsr	w0, w1, w0
-	bic	w1, w1, w8
-	and	w0, w0, w6
-	bl	flash_prog_page_en
-	ldr	w7, [x29, 108]
-.L2716:
-	add	w22, w22, 1
-	and	w22, w22, 65535
-.L2719:
-	ldrb	w0, [x29, 121]
-	cmp	w0, w22
-	bhi	.L2717
-	add	w26, w26, 1
-	and	w26, w26, 65535
-	b	.L2715
-.L2718:
-	adrp	x26, .LANCHOR105
-	add	x26, x26, :lo12:.LANCHOR105
-	mov	w28, 0
-.L2720:
+	beq	.L2626
+	ldr	x1, [x29, 136]
+	ldr	x2, [x20, 24]
+	ldrh	w1, [x1]
+	madd	w0, w1, w0, w24
+	ldr	x1, [x20, 8]
+	str	w0, [x29, 152]
+	adrp	x0, .LANCHOR126
+	ldrb	w3, [x0, #:lo12:.LANCHOR126]
+	ldr	w0, [x29, 152]
+	bl	ftl_read_ppa_page
+	mov	w28, w0
+	cmp	w0, 512
+	beq	.L2627
+	cmn	w0, #1
+	beq	.L2628
+	ldr	x0, [x20, 24]
+	ldr	w1, [x0]
+	cmn	w1, #1
+	bne	.L2628
+	ldr	w0, [x0, 4]
+	cmn	w0, #1
+	bne	.L2628
+	ldr	x0, [x20, 8]
+	ldr	w0, [x0]
+	cmn	w0, #1
+	beq	.L2627
+.L2628:
+	adrp	x0, .LANCHOR188
+	mov	w1, 1
+	strb	w1, [x0, #:lo12:.LANCHOR188]
+	ldrb	w0, [x19, 9]
+	ldrh	w1, [x19, 10]
+	madd	w0, w0, w24, w22
+	cmp	w1, w0
+	beq	.L2629
+	adrp	x1, .LANCHOR195
+	adrp	x0, .LC0
+	mov	w2, 1498
+	add	x1, x1, :lo12:.LANCHOR195
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2629:
+	ldrh	w0, [x19, 10]
+	ldrh	w1, [x19, 6]
+	ldrb	w2, [x19, 9]
+	add	w1, w1, w0
 	ldrh	w0, [x25, #:lo12:.LANCHOR87]
-	cmp	w0, w28
-	bls	.L2725
-	mov	w27, 0
-	b	.L2726
-.L2724:
-	sxtw	x22, w27
-	mov	w1, 65535
-	add	x22, x22, 8
-	lsl	x22, x22, 1
-	ldrh	w0, [x21, x22]
+	mul	w0, w0, w2
+	cmp	w1, w0
+	beq	.L2630
+	adrp	x1, .LANCHOR195
+	adrp	x0, .LC0
+	mov	w2, 1499
+	add	x1, x1, :lo12:.LANCHOR195
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2630:
+	cmn	w28, #1
+	beq	.L2632
+	ldr	x0, [x20, 24]
+	ldr	w0, [x0, 4]
+	cmn	w0, #1
+	beq	.L2632
+	bl	lpa_hash_get_ppa
+	ldr	x1, [x29, 144]
+	cbz	x1, .L2634
+	ldr	x3, [x20, 24]
+	ldr	w1, [x3, 8]
 	cmp	w0, w1
-	beq	.L2722
-	ldrh	w4, [x26]
-	mov	w1, 1
-	madd	w4, w4, w0, w28
-	mov	x0, x20
-	str	w4, [x20, 40]
+	beq	.L2634
+	cmn	w0, #1
+	beq	.L2634
+	adrp	x5, .LANCHOR31
+	adrp	x6, .LANCHOR68
+	mov	w4, 24
+	mov	w28, 1
+	ldrb	w1, [x5, #:lo12:.LANCHOR31]
+	ldrh	w7, [x6, #:lo12:.LANCHOR68]
+	sub	w1, w4, w1
+	sub	w1, w1, w7
+	lsr	w2, w0, w7
+	adrp	x7, .LANCHOR69
+	lsl	w1, w28, w1
+	sub	w1, w1, #1
+	and	w1, w1, w2
+	ldrb	w2, [x7, #:lo12:.LANCHOR69]
+	udiv	w1, w1, w2
+	ldr	x2, [x29, 144]
+	ldrh	w2, [x2]
+	cmp	w2, w1, uxth
+	bne	.L2634
+	ldr	x1, [x29, 128]
+	adrp	x8, .LANCHOR184
+	ldr	w10, [x3]
+	add	x2, x8, :lo12:.LANCHOR184
+	str	w10, [x29, 160]
+	str	x8, [x29, 168]
+	ldrb	w3, [x1]
+	ldr	x1, [x20, 8]
+	str	x7, [x29, 96]
 	str	w4, [x29, 108]
-	bl	sblk_read_page
-	ldr	x0, [x20, 8]
+	stp	x5, x6, [x29, 112]
+	bl	ftl_read_ppa_page
+	ldr	x8, [x29, 168]
+	ldr	w10, [x29, 160]
+	ldr	w0, [x8, #:lo12:.LANCHOR184]
+	cmp	w10, w0
+	bhi	.L2634
+	ldr	x0, [x20, 24]
+	ldr	w3, [x0, 8]
+	cmn	w3, #1
+	beq	.L2632
+	ldp	x5, x6, [x29, 112]
 	ldr	w4, [x29, 108]
+	ldr	x7, [x29, 96]
+	ldrb	w2, [x5, #:lo12:.LANCHOR31]
+	ldrh	w1, [x6, #:lo12:.LANCHOR68]
+	sub	w4, w4, w2
+	sub	w4, w4, w1
+	lsr	w0, w3, w1
+	lsl	w28, w28, w4
+	sub	w28, w28, #1
+	and	w28, w28, w0
+	ldrb	w0, [x7, #:lo12:.LANCHOR69]
+	udiv	w0, w28, w0
+	bl	ftl_vpn_decrement
+.L2632:
+	ldrh	w0, [x19, 6]
+	sub	w0, w0, #1
+	strh	w0, [x19, 6]
+	ldrh	w0, [x19, 10]
+	add	w0, w0, 1
+	strh	w0, [x19, 10]
+	mov	w0, 4
+	str	w0, [x29, 168]
+	mov	w0, 1
+	str	w0, [x29, 160]
+.L2626:
+	add	w22, w22, 1
+	and	w22, w22, 65535
+	b	.L2625
+.L2641:
+	ldrh	w2, [x19, 12]
+	add	w2, w2, w1
+	ldr	w2, [x4, x2, lsl 2]
+	cmn	w2, #1
+	beq	.L2640
+	add	w22, w0, 1
+	and	w0, w22, 65535
+.L2640:
+	add	w1, w1, 1
+	b	.L2639
+.L2656:
+	ldr	w0, [x23, x28, lsl 2]
+	cmn	w0, #1
+	bne	.L2645
+.L2649:
+	adrp	x1, .LANCHOR104
+	ldr	x0, [x20, 24]
+	mov	w22, -1
+	ldr	x1, [x1, #:lo12:.LANCHOR104]
+	ldr	w1, [x1, 8]
+	stp	w1, w22, [x0]
+	stp	w22, wzr, [x0, 8]
+	ldr	x0, [x20, 8]
+	str	wzr, [x0]
+.L2646:
+	ldr	w0, [x29, 160]
+	cbz	w0, .L2651
+	ldrh	w0, [x19, 6]
+	cmp	w0, 1
+	bls	.L2651
+	add	x0, x21, :lo12:.LANCHOR14
+	str	x0, [x29, 144]
+	add	x0, x24, :lo12:.LANCHOR126
+	str	x0, [x29, 128]
+.L2712:
+	mov	x0, x19
+	bl	ftl_get_new_free_page
+	mov	w5, w0
+	ldr	x0, [x29, 144]
 	ldr	w0, [x0]
-	cmp	w4, w0
-	beq	.L2722
-	mov	w0, w4
-	bl	ftl_mask_bad_block
-	mov	w0, -1
-	strh	w0, [x21, x22]
-.L2722:
-	add	w2, w27, 1
-	and	w27, w2, 65535
-.L2726:
-	ldrb	w0, [x29, 121]
-	cmp	w0, w27
-	bhi	.L2724
-	add	w3, w28, 1
-	and	w28, w3, 65535
-	b	.L2720
-.L2725:
-	mov	x0, x20
-	bl	zbuf_free
-	ldr	x0, [x24, #:lo12:.LANCHOR7]
-	mov	w1, w19
-	ldr	w3, [x0, x23]
-	ldrh	w2, [x0, x23]
-	adrp	x0, .LC168
-	add	x0, x0, :lo12:.LC168
-	ubfx	x3, x3, 11, 8
-	and	w2, w2, 2047
+	tbz	x0, 14, .L2653
+	ldrh	w0, [x19, 12]
+	mov	w1, w5
+	ldrh	w3, [x19, 10]
+	str	w5, [x29, 108]
+	add	w3, w3, w0
+	ldr	x0, [x20, 24]
+	sub	w3, w3, #1
+	ldr	w2, [x0, 4]
+	ldr	x0, [x29, 120]
+	bl	printf
+	ldr	w5, [x29, 108]
+.L2653:
+	ldr	x0, [x29, 112]
+	ldr	w2, [x29, 168]
+	ldrh	w1, [x19, 6]
+	ldrb	w0, [x0]
+	mul	w0, w0, w2
+	ldr	w2, [x29, 152]
+	add	w0, w0, 1
+	sub	w0, w0, w2
+	cmp	w1, w0
+	bls	.L2651
+	ldr	x0, [x29, 128]
+	ldr	x1, [x20, 8]
+	ldr	x2, [x20, 24]
+	str	w5, [x29, 96]
+	ldrb	w3, [x0]
+	mov	w0, w5
+	bl	ftl_prog_ppa_page
+	mov	w1, w0
+	ldrh	w0, [x19]
+	str	w1, [x29, 108]
+	bl	ftl_vpn_decrement
+	ldr	w1, [x29, 108]
+	cmn	w22, #1
+	ldr	w5, [x29, 96]
+	ccmn	w1, #1, 4, ne
+	beq	.L2654
+	ldrh	w0, [x19, 10]
+	ldrh	w1, [x19, 12]
+	str	w5, [x26, x28, lsl 2]
+	add	w0, w0, w1
+	sub	w0, w0, #1
+	str	w0, [x27, x28, lsl 2]
+.L2651:
+	add	x28, x28, 1
+	b	.L2644
+.L2645:
+	ldrb	w3, [x24, #:lo12:.LANCHOR126]
+	ldr	x1, [x20, 8]
+	ldr	x2, [x20, 24]
+	bl	ftl_read_ppa_page
+	mov	w22, w0
+	ldr	x0, [x20, 24]
+	ldr	w0, [x0, 4]
+	bl	lpa_hash_get_ppa
+	mov	w5, w0
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 14, .L2647
+	ldr	x0, [x20, 24]
+	mov	w1, w5
+	ldr	w2, [x23, x28, lsl 2]
+	str	w5, [x29, 144]
+	ldr	w3, [x0, 4]
+	adrp	x0, .LC162
+	add	x0, x0, :lo12:.LC162
+	bl	printf
+	ldr	w5, [x29, 144]
+.L2647:
+	ldr	w0, [x23, x28, lsl 2]
+	mov	w1, 1
+	cmp	w5, w0
+	ldr	x0, [x20, 24]
+	csinv	w22, w22, wzr, eq
+	cmn	w22, #1
+	stp	w5, w1, [x0, 8]
+	bne	.L2646
+	b	.L2649
+.L2654:
+	ldrh	w0, [x19, 6]
+	cmp	w0, 1
+	bls	.L2651
+	cmn	w22, #1
+	bne	.L2712
+	b	.L2651
+.L2663:
+	ldr	w0, [x26, x22, lsl 2]
+	cmn	w0, #1
+	beq	.L2659
+	ldrb	w3, [x24, #:lo12:.LANCHOR126]
+	ldr	w0, [x23, x22, lsl 2]
+	ldr	x1, [x20, 8]
+	ldr	x2, [x20, 24]
+	bl	ftl_read_ppa_page
+	cmp	w0, 256
+	ccmn	w0, #1, 4, ne
+	bne	.L2659
+	ldrb	w3, [x24, #:lo12:.LANCHOR126]
+	ldr	w0, [x26, x22, lsl 2]
+	ldr	x1, [x20, 8]
+	ldr	x2, [x20, 24]
+	bl	ftl_read_ppa_page
+	mov	w5, w0
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 14, .L2661
+	ldr	x0, [x20, 24]
+	mov	w1, w5
+	ldr	w3, [x23, x22, lsl 2]
+	str	w5, [x29, 144]
+	ldr	w2, [x0, 8]
+	mov	x0, x28
 	bl	printf
-.L2711:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 144
-	ret
-	.size	ftl_ink_check_sblk, .-ftl_ink_check_sblk
-	.section	.text.ftl_open_sblk_init,"ax",@progbits
+	ldr	w5, [x29, 144]
+.L2661:
+	cmn	w5, #1
+	beq	.L2659
+	ldr	x0, [x20, 24]
+	ldr	w2, [x23, x22, lsl 2]
+	ldr	w1, [x0, 8]
+	cmp	w2, w1
+	bne	.L2659
+	ldr	w1, [x21, #:lo12:.LANCHOR14]
+	tbz	x1, 14, .L2662
+	ldr	w1, [x0, 4]
+	ldr	w3, [x27, x22, lsl 2]
+	ldr	x0, [x29, 152]
+	bl	printf
+.L2662:
+	ldr	x0, [x20, 24]
+	lsl	x1, x22, 2
+	ldrh	w2, [x27, x1]
+	ldr	w1, [x0, 8]
+	ldr	w0, [x0, 4]
+	bl	lpa_hash_update_ppa
+.L2659:
+	add	x22, x22, 1
+	b	.L2657
+.L2634:
+	ldr	x3, [x20, 24]
+	adrp	x0, .LANCHOR123
+	ldr	w0, [x0, #:lo12:.LANCHOR123]
+	ldr	w1, [x3, 4]
+	cmp	w1, w0
+	bcs	.L2632
+	ldrb	w0, [x19, 9]
+	ldrh	w1, [x25, #:lo12:.LANCHOR87]
+	ldrh	w2, [x19, 10]
+	mul	w0, w0, w1
+	sub	w0, w0, #1
+	cmp	w2, w0
+	bge	.L2632
+	adrp	x0, .LANCHOR104
+	ldr	w1, [x3]
+	ldr	x0, [x0, #:lo12:.LANCHOR104]
+	ldr	w4, [x0, 8]
+	cmp	w1, w4
+	bls	.L2635
+	str	w1, [x0, 8]
+.L2635:
+	ldrh	w0, [x19, 12]
+	add	w2, w2, w0
+	ldp	w0, w1, [x3, 4]
+	bl	lpa_hash_update_ppa
+	ldr	w0, [x29, 180]
+	str	w0, [x29, 176]
+	ldr	w0, [x29, 184]
+	str	w0, [x29, 180]
+	ldr	w0, [x29, 188]
+	str	w0, [x29, 184]
+	ldr	w0, [x29, 152]
+	str	w0, [x29, 188]
+	b	.L2632
+	.size	ftl_open_sblk_recovery, .-ftl_open_sblk_recovery
+	.section	.text.pm_write_page,"ax",@progbits
 	.align	2
-	.global	ftl_open_sblk_init
-	.type	ftl_open_sblk_init, %function
-ftl_open_sblk_init:
-	stp	x29, x30, [sp, -80]!
+	.global	pm_write_page
+	.type	pm_write_page, %function
+pm_write_page:
+	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w19, w0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR80
+	adrp	x21, .LANCHOR87
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LC77
-	stp	x19, x20, [sp, 16]
-	adrp	x24, .LANCHOR87
-	mov	x19, x0
-	mov	w23, w1
-	add	x24, x24, :lo12:.LANCHOR87
-	add	x21, x21, :lo12:.LANCHOR80
-	add	x22, x22, :lo12:.LC77
+	adrp	x22, .LANCHOR105
+	adrp	x24, .LANCHOR104
+	mov	x23, x1
+	add	x21, x21, :lo12:.LANCHOR87
+	mov	x20, x24
+	add	x22, x22, :lo12:.LANCHOR105
 	stp	x25, x26, [sp, 64]
-.L2731:
-.L2735:
-	mov	w0, w23
-	bl	ftl_alloc_sblk
-	adrp	x1, .LANCHOR104
-	and	w25, w0, 65535
-	mov	w26, w25
-	uxtw	x20, w25
-	ldr	x1, [x1, #:lo12:.LANCHOR104]
-	ldrh	w1, [x1, 150]
-	cbz	w1, .L2732
-	adrp	x2, .LANCHOR7
-	lsl	x1, x20, 2
-	ldr	x2, [x2, #:lo12:.LANCHOR7]
-	ldrh	w1, [x2, x1]
-	and	w1, w1, 2047
-	cmp	w1, 2
-	bgt	.L2732
-	bl	ftl_ink_check_sblk
-.L2732:
-	mov	w1, 0
-	mov	w0, w26
-	bl	ftl_erase_sblk
-	add	x1, x19, 16
-	mov	w0, w26
-	bl	ftl_get_blk_list_in_sblk
-	and	w0, w0, 255
-	ldrh	w1, [x24]
-	cmp	w23, 2
-	strb	w0, [x19, 9]
-	strh	w26, [x19]
-	strh	wzr, [x19, 2]
-	mul	w0, w1, w0
-	strb	wzr, [x19, 5]
-	strh	w0, [x19, 6]
-	strh	wzr, [x19, 10]
-	strb	w23, [x19, 4]
-	beq	.L2736
-	ldrb	w0, [x21]
-	mul	w0, w1, w0
-	and	w0, w0, 65535
-.L2733:
-	ldrb	w2, [x21]
-	adrp	x26, .LANCHOR9
-	strh	w0, [x19, 12]
-	lsl	x20, x20, 1
-	mul	w2, w2, w1
-	adrp	x1, .LANCHOR111
-	ldr	x3, [x1, #:lo12:.LANCHOR111]
-	mov	w1, 255
-	lsl	w2, w2, 2
-	add	x0, x3, x0, uxth 2
-	bl	ftl_memset
-	ldr	x0, [x26, #:lo12:.LANCHOR9]
-	ldrh	w1, [x19, 6]
-	strh	w1, [x0, x20]
-	ldrb	w0, [x19, 9]
-	cbnz	w0, .L2730
-	mov	w1, w25
-	mov	x0, x22
-	bl	printf
-	ldr	x0, [x26, #:lo12:.LANCHOR9]
-	mov	w1, -1
-	strh	w1, [x0, x20]
-	mov	w0, 7
-	strb	w0, [x19, 4]
-	b	.L2735
-.L2736:
+	str	x27, [sp, 80]
+	mov	w25, 65535
+.L2739:
+	ldr	x0, [x24, #:lo12:.LANCHOR104]
+	ldr	w1, [x0, 48]
+	ldrh	w2, [x0, 696]
+	add	w1, w1, 1
+	str	w1, [x0, 48]
+	ldrh	w1, [x21]
+	cmp	w2, w1
+	bcs	.L2740
+	ldrh	w0, [x0, 692]
+	cmp	w0, w25
+	bne	.L2741
+.L2740:
+	bl	pm_alloc_new_blk
 	mov	w0, 0
-	b	.L2733
-.L2730:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
-	ret
-	.size	ftl_open_sblk_init, .-ftl_open_sblk_init
-	.section	.text.ftl_low_format_data_init,"ax",@progbits
-	.align	2
-	.global	ftl_low_format_data_init
-	.type	ftl_low_format_data_init, %function
-ftl_low_format_data_init:
-	stp	x29, x30, [sp, -48]!
-	mov	w2, 16384
-	mov	w1, 0
-	adrp	x0, ftl_ext_info_data_buffer
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	add	x0, x0, :lo12:ftl_ext_info_data_buffer
-	str	x21, [sp, 32]
-	bl	ftl_memset
-	bl	zftl_sblk_list_init
-	adrp	x19, .LANCHOR104
-	mov	w0, 1
-	bl	ftl_alloc_sblk
-	mov	w1, 0
-	mov	w21, w0
-	bl	ftl_erase_sblk
-	ldr	x1, [x19, #:lo12:.LANCHOR104]
-	mov	w0, w21
-	add	x1, x1, 672
-	bl	ftl_get_blk_list_in_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR104]
-	ldrh	w20, [x0, 672]
-	strh	wzr, [x0, 690]
-	mov	w0, 65533
-	sub	w1, w20, #1
-	cmp	w0, w1, uxth
-	bcs	.L2742
-	adrp	x1, .LANCHOR193
+	bl	ftl_info_flush
+.L2741:
+	ldr	x0, [x20, #:lo12:.LANCHOR104]
+	ldrh	w0, [x0, 692]
+	cmp	w0, w25
+	bne	.L2742
+	adrp	x1, .LANCHOR196
 	adrp	x0, .LC0
-	mov	w2, 2146
-	add	x1, x1, :lo12:.LANCHOR193
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2742:
-	ldr	x0, [x19, #:lo12:.LANCHOR104]
-	mov	w2, 256
-	mov	w1, 255
-	add	x0, x0, 416
-	strh	wzr, [x0, 280]
-	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR104]
-	mov	w2, 4096
-	mov	w1, 0
-	add	x0, x0, 704
-	bl	ftl_memset
-	adrp	x0, .LANCHOR31
-	ldr	x1, [x19, #:lo12:.LANCHOR104]
-	ldrb	w2, [x0, #:lo12:.LANCHOR31]
-	mov	w0, 24
-	sub	w0, w0, w2
-	adrp	x2, .LANCHOR68
-	strh	w21, [x1, 416]
-	adrp	x21, .LANCHOR10
-	ldrh	w2, [x2, #:lo12:.LANCHOR68]
-	strh	w20, [x1, 692]
-	sub	w0, w0, w2
-	asr	w0, w20, w0
-	strh	w0, [x1, 694]
-	mov	w0, 1
-	strh	w0, [x1, 688]
-	adrp	x0, .LANCHOR194
-	ldrh	w0, [x0, #:lo12:.LANCHOR194]
-	strh	w0, [x1, 698]
-	mov	w1, 20038
-	ldr	x0, [x21, #:lo12:.LANCHOR10]
-	movk	w1, 0x4549, lsl 16
-	str	w1, [x0]
-	bl	ftl_alloc_sys_blk
-	mov	w20, w0
-	mov	w1, 0
-	bl	ftl_erase_phy_blk
-	ldr	x0, [x19, #:lo12:.LANCHOR104]
-	mov	w1, 2
-	strh	w20, [x0, 130]
-	mov	w20, -1
-	strh	wzr, [x0, 140]
-	ldr	x0, [x21, #:lo12:.LANCHOR10]
-	add	x0, x0, 16
-	strh	w20, [x0, 568]
-	strh	w20, [x0, 570]
-	strh	w20, [x0, 572]
-	strh	w20, [x0, 574]
-	bl	ftl_open_sblk_init
-	ldr	x0, [x21, #:lo12:.LANCHOR10]
-	mov	w1, 3
-	add	x0, x0, 48
-	bl	ftl_open_sblk_init
-	ldr	x1, [x19, #:lo12:.LANCHOR104]
-	ldr	x0, [x21, #:lo12:.LANCHOR10]
-	add	x0, x0, 136
-	ldrh	w2, [x1, 134]
-	strh	w2, [x0, -10]
-	strh	w20, [x0, -56]
-	mov	w2, -1
-	strh	w20, [x0, -6]
-	str	w2, [x0, 408]
-	strh	wzr, [x0, -12]
-	strh	wzr, [x0, -16]
-	strh	wzr, [x0, -14]
-	strh	w2, [x1, 126]
-	mov	w2, 256
-	str	wzr, [x0, 384]
-	mov	w1, 255
-	str	wzr, [x0, 388]
-	str	wzr, [x0, 392]
-	bl	ftl_memset
-	mov	w2, 128
-	mov	w1, 255
-	ldr	x0, [x21, #:lo12:.LANCHOR10]
-	add	x0, x0, 392
+	mov	w2, 267
+	add	x1, x1, :lo12:.LANCHOR196
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2742:
+	ldr	x0, [x20, #:lo12:.LANCHOR104]
+	adrp	x27, .LANCHOR197
+	ldrh	w1, [x22]
+	mov	w2, 64
+	ldrh	w26, [x0, 692]
+	ldrh	w0, [x0, 696]
+	madd	w26, w26, w1, w0
+	ldr	x0, [x27, #:lo12:.LANCHOR197]
+	mov	w1, 0
 	bl	ftl_memset
-	bl	ftl_ext_info_flush
-	mov	w0, 0
-	bl	ftl_info_flush
-	bl	ftl_info_blk_init
-	ldr	x21, [sp, 32]
+	ldr	x6, [x27, #:lo12:.LANCHOR197]
+	ldr	x7, [x20, #:lo12:.LANCHOR104]
+	str	w19, [x6]
+	ldr	w0, [x7, 48]
+	str	w0, [x6, 4]
+	adrp	x0, .LANCHOR126
+	ldrb	w8, [x0, #:lo12:.LANCHOR126]
+	mov	x0, x23
+	lsl	w1, w8, 9
+	bl	js_hash
+	str	w0, [x6, 8]
+	ldrb	w0, [x7, 694]
+	mov	x2, x23
+	mov	w1, w26
+	mov	w4, w8
+	mov	x3, x6
+	bl	ftl_prog_page
+	ldr	x2, [x20, #:lo12:.LANCHOR104]
+	ldrh	w1, [x2, 696]
+	add	w1, w1, 1
+	and	w1, w1, 65535
+	strh	w1, [x2, 696]
+	cmp	w1, 1
+	adrp	x1, .LANCHOR198
+	beq	.L2743
+	ldrb	w3, [x1, #:lo12:.LANCHOR198]
+	cbz	w3, .L2744
+.L2743:
+	strb	wzr, [x1, #:lo12:.LANCHOR198]
+	b	.L2739
+.L2744:
+	cmn	w0, #1
+	bne	.L2746
+	mov	w1, w26
+	adrp	x0, .LC165
+	add	x0, x0, :lo12:.LC165
+	bl	printf
+	b	.L2739
+.L2746:
+	ldrh	w0, [x2, 698]
+	cmp	w19, w0
+	bcs	.L2747
+	add	x19, x2, x19, uxtw 2
+	str	w26, [x19, 704]
+.L2747:
 	mov	w0, 0
+	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
 	ret
-	.size	ftl_low_format_data_init, .-ftl_low_format_data_init
-	.section	.text.ftl_low_format,"ax",@progbits
+	.size	pm_write_page, .-pm_write_page
+	.section	.text.ftl_dump_write_open_sblk,"ax",@progbits
 	.align	2
-	.global	ftl_low_format
-	.type	ftl_low_format, %function
-ftl_low_format:
-	stp	x29, x30, [sp, -80]!
-	mov	w1, 0
-	adrp	x0, .LC169
-	add	x0, x0, :lo12:.LC169
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR195
-	stp	x21, x22, [sp, 32]
-	add	x20, x20, :lo12:.LANCHOR195
-	stp	x25, x26, [sp, 64]
-	adrp	x22, .LANCHOR27
-	mov	x25, x22
-	stp	x23, x24, [sp, 48]
-	mov	w19, 8
-	adrp	x23, .LC0
-	bl	printf
-.L2747:
-	ldr	x0, [x22, #:lo12:.LANCHOR27]
-	add	x0, x0, x19, sxtw
-	ldrb	w21, [x0, 32]
-	add	w0, w21, 127
+	.global	ftl_dump_write_open_sblk
+	.type	ftl_dump_write_open_sblk, %function
+ftl_dump_write_open_sblk:
+	sub	sp, sp, #224
+	stp	x29, x30, [sp, 48]
+	add	x29, sp, 48
+	stp	x19, x20, [sp, 64]
+	and	w20, w0, 65535
+	adrp	x0, .LANCHOR6
+	stp	x21, x22, [sp, 80]
+	stp	x23, x24, [sp, 96]
+	ldrh	w0, [x0, #:lo12:.LANCHOR6]
+	stp	x25, x26, [sp, 112]
+	stp	x27, x28, [sp, 128]
+	cmp	w0, w20
+	bls	.L2752
+	adrp	x25, .LANCHOR77
+	str	x25, [x29, 136]
+	ldrb	w0, [x25, #:lo12:.LANCHOR77]
+	cbnz	w0, .L2754
+	adrp	x0, .LANCHOR74
+	ldrb	w0, [x0, #:lo12:.LANCHOR74]
+	cbz	w0, .L2752
+.L2754:
+	adrp	x0, .LANCHOR7
+	ubfiz	x14, x20, 2, 16
+	mov	x15, x0
+	ldr	x1, [x0, #:lo12:.LANCHOR7]
+	add	x1, x1, x14
+	ldrb	w1, [x1, 2]
+	and	w1, w1, 224
+	cmp	w1, 160
+	bne	.L2774
+	adrp	x0, .LANCHOR73
+	ldrb	w10, [x0, #:lo12:.LANCHOR73]
+.L2755:
+	add	x22, x29, 176
+	adrp	x23, .LANCHOR87
+	str	w10, [x29, 128]
+	mov	w0, w20
+	mov	w24, 0
+	mov	w25, 0
+	strh	w20, [x22, -32]!
+	mov	w27, 0
+	add	x1, x22, 16
+	bl	ftl_get_blk_list_in_sblk
+	ldrh	w1, [x23, #:lo12:.LANCHOR87]
 	and	w0, w0, 255
-	cmp	w0, 125
-	bhi	.L2745
-	mov	w2, 2200
-	mov	x1, x20
-	add	x0, x23, :lo12:.LC0
+	strb	w0, [x29, 153]
+	strb	wzr, [x29, 149]
+	strh	wzr, [x29, 146]
+	mul	w0, w0, w1
+	strh	wzr, [x29, 154]
+	strh	w0, [x29, 150]
+	ldr	x0, [x15, #:lo12:.LANCHOR7]
+	add	x1, x0, x14
+	ldr	w5, [x0, x14]
+	ldrb	w2, [x1, 2]
+	mov	w1, w20
+	ldrh	w4, [x0, x14]
+	adrp	x0, .LC166
+	ubfx	x5, x5, 11, 8
+	add	x0, x0, :lo12:.LC166
+	ubfx	x3, x2, 3, 2
+	and	w4, w4, 2047
+	ubfx	x2, x2, 5, 3
 	bl	printf
-.L2745:
-	cmp	w21, 255
-	beq	.L2746
-	adrp	x0, .LANCHOR105
-	ldrh	w1, [x0, #:lo12:.LANCHOR105]
-	mov	w0, 0
-	mul	w1, w1, w21
-	bl	flash_erase_block
-.L2746:
-	add	w19, w19, 1
-	cmp	w19, 16
-	bne	.L2747
-	bl	sblk_init
-	adrp	x22, .LANCHOR7
-	bl	ftl_info_blk_init
-	adrp	x19, .LANCHOR6
-	mov	w2, 16384
-	mov	w1, 0
-	adrp	x0, ftl_info_data_buffer
-	add	x0, x0, :lo12:ftl_info_data_buffer
-	bl	ftl_memset
-	ldr	x0, [x22, #:lo12:.LANCHOR7]
-	mov	w3, 1
-	ldrh	w2, [x19, #:lo12:.LANCHOR6]
-	add	x2, x0, x2, lsl 2
-.L2748:
-	cmp	x0, x2
-	bne	.L2749
-	adrp	x21, .LANCHOR104
-	mov	w1, 21574
-	adrp	x24, .LANCHOR62
-	add	x24, x24, :lo12:.LANCHOR62
-	ldr	x0, [x21, #:lo12:.LANCHOR104]
-	movk	w1, 0x494c, lsl 16
-	mov	w20, 0
-	mov	w26, 1
-	strh	wzr, [x0, 148]
-	str	w1, [x0]
-.L2750:
-	ldrh	w0, [x19, #:lo12:.LANCHOR6]
-	adrp	x23, .LANCHOR69
-	cmp	w0, w20
-	bhi	.L2759
-	ldr	x0, [x25, #:lo12:.LANCHOR27]
-	mov	w4, 3
-	ldrb	w2, [x23, #:lo12:.LANCHOR69]
-	mov	w10, 15
-	ldr	x6, [x21, #:lo12:.LANCHOR104]
-	cmp	w2, 1
-	ldr	x1, [x22, #:lo12:.LANCHOR7]
-	ldrb	w0, [x0, 47]
-	csinc	w4, w4, wzr, ne
-	and	w4, w4, 255
-	and	w8, w2, 65535
-	ldrh	w3, [x6, 148]
-	udiv	w0, w0, w2
-	and	w5, w0, 65535
-	ubfiz	x0, x0, 2, 8
-	add	x0, x0, 4
-	add	w20, w5, 1
-	add	x0, x1, x0
+	mov	w0, 1
+	bl	buf_alloc
+	mov	x19, x0
+	ldr	w10, [x29, 128]
+	adrp	x12, .LANCHOR105
+	add	x14, x23, :lo12:.LANCHOR87
+	add	x12, x12, :lo12:.LANCHOR105
+.L2756:
+	ldrh	w0, [x14]
+	cmp	w0, w25
+	bls	.L2762
+	lsl	w11, w25, 1
+	adrp	x26, .LC167
+	sub	w11, w11, #1
+	mov	w27, 0
+	add	x26, x26, :lo12:.LC167
+	b	.L2766
+.L2774:
+	mov	w10, 1
+	b	.L2755
+.L2764:
+	ldrh	w13, [x22, x28]
+	mov	w0, 65535
+	cmp	w13, w0
+	bne	.L2757
+.L2763:
+	add	w24, w24, 1
+	and	w24, w24, 65535
+.L2758:
+	cmp	w10, w24
+	bcs	.L2764
+	add	w27, w27, 1
+	and	w27, w27, 65535
+.L2766:
+	ldrb	w0, [x29, 153]
+	cmp	w0, w27
+	bls	.L2765
+	sxtw	x28, w27
+	mov	w24, 1
+	add	x28, x28, 8
+	lsl	x28, x28, 1
+	b	.L2758
+.L2757:
+	ldrh	w21, [x12]
+	cmp	w10, 3
+	mul	w21, w21, w13
+	bne	.L2759
+	add	w21, w25, w21
+	orr	w21, w21, w24, lsl 24
+.L2760:
+	str	w21, [x19, 40]
+	mov	w1, 1
+	stp	x12, x14, [x29, 96]
+	mov	x0, x19
+	stp	w11, w10, [x29, 116]
+	str	w13, [x29, 124]
+	bl	sblk_read_page
+	ldr	x1, [x19, 24]
+	mov	w3, w21
+	ldr	x0, [x19, 8]
+	ldr	w15, [x19, 52]
+	ldr	w13, [x29, 124]
+	ldr	w2, [x1, 12]
+	mov	w4, w15
+	str	w2, [sp, 32]
+	str	w15, [x29, 128]
+	ldr	w2, [x1, 8]
+	str	w2, [sp, 24]
+	ldr	w2, [x1, 4]
+	str	w2, [sp, 16]
+	mov	w2, w25
+	ldr	w1, [x1]
+	str	w1, [sp, 8]
+	ldr	w1, [x0, 12]
+	str	w1, [sp]
+	mov	w1, w13
+	ldp	w5, w6, [x0]
+	ldr	w7, [x0, 8]
+	mov	x0, x26
+	bl	printf
+	ldr	w15, [x29, 128]
+	ldp	w11, w10, [x29, 116]
+	cmp	w15, 512
+	ldp	x12, x14, [x29, 96]
+	bne	.L2763
 .L2762:
-	cmp	w2, 4
-	add	x1, x1, 4
-	csel	w7, w10, w4, eq
-	strb	w7, [x1, -1]
-	ldrb	w7, [x1, -2]
-	orr	w7, w7, -32
-	strb	w7, [x1, -2]
-	cmp	x1, x0
-	bne	.L2762
-	mul	w5, w5, w8
-	mov	w4, 16
-	add	w0, w8, w3
-	sdiv	w4, w4, w2
-	add	w0, w5, w0, uxth
-	strh	w0, [x6, 148]
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	add	w4, w20, w4
-	and	w4, w4, 65535
-	strh	w4, [x6, 134]
-	tbz	x0, 12, .L2763
-	adrp	x0, .LC170
-	mov	w3, w20
-	mov	w2, 128
-	mov	w1, 2247
-	add	x0, x0, :lo12:.LC170
+	mov	w4, w24
+	mov	w3, w27
+	mov	w2, w25
+	mov	w1, w20
+	adrp	x24, .LANCHOR126
+	adrp	x0, .LC168
+	add	x0, x0, :lo12:.LC168
 	bl	printf
-.L2763:
-	ldr	x0, [x21, #:lo12:.LANCHOR104]
-	mov	w2, 128
-	mov	w1, 255
-	add	x0, x0, 160
+	ldr	x0, [x19, 8]
+	mov	w1, 0
+	ldrb	w2, [x24, #:lo12:.LANCHOR126]
+	adrp	x26, .LC169
+	adrp	x27, .LANCHOR73
+	add	x26, x26, :lo12:.LC169
+	add	x27, x27, :lo12:.LANCHOR73
+	lsl	w2, w2, 9
 	bl	ftl_memset
-	adrp	x0, .LANCHOR106
-	ldrb	w10, [x23, #:lo12:.LANCHOR69]
-	adrp	x3, .LANCHOR68
-	ldr	x2, [x21, #:lo12:.LANCHOR104]
-	ldrb	w16, [x0, #:lo12:.LANCHOR106]
-	adrp	x0, .LANCHOR31
-	and	w11, w10, 65535
-	ldr	x15, [x22, #:lo12:.LANCHOR7]
-	ldrb	w4, [x0, #:lo12:.LANCHOR31]
-	mov	w0, 24
-	ldrh	w8, [x2, 134]
-	sub	w0, w0, w4
-	ldrh	w4, [x3, #:lo12:.LANCHOR68]
-	mul	w1, w20, w11
-	mov	w3, 0
-	sub	w0, w0, w4
-	mov	w4, 1
-	and	w1, w1, 65535
-	lsl	w4, w4, w0
-	and	w4, w4, 65535
-.L2764:
-	cmp	w20, w8
-	bcc	.L2770
-	ldrh	w0, [x19, #:lo12:.LANCHOR6]
-	strh	w3, [x2, 112]
-	sub	w0, w0, w8
-	strh	wzr, [x2, 114]
-	strh	w0, [x2, 116]
-	strh	wzr, [x2, 118]
-	strh	w8, [x2, 132]
-	bl	ftl_low_format_data_init
-	mov	w0, 0
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
-	ret
-.L2749:
-	ldrb	w1, [x0, 2]
-	add	x0, x0, 4
-	and	w1, w1, 31
-	bfi	w1, w3, 3, 2
-	strb	w1, [x0, -2]
-	b	.L2748
+	ldr	x0, [x19, 24]
+	mov	w1, 0
+	ldrb	w2, [x24, #:lo12:.LANCHOR126]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+.L2767:
+	ldrh	w0, [x23, #:lo12:.LANCHOR87]
+	cmp	w0, w25
+	bls	.L2772
+	ldr	x0, [x29, 136]
+	lsl	w28, w25, 1
+	mov	w21, 0
+	add	x0, x0, :lo12:.LANCHOR77
+	str	x0, [x29, 128]
+	b	.L2773
 .L2759:
-	adrp	x0, .LANCHOR75
-	strh	w20, [x24]
-	ldrb	w0, [x0, #:lo12:.LANCHOR75]
-	cbnz	w0, .L2751
-	mov	w0, w20
-	bl	ftl_test_block
-.L2751:
-	ldrb	w11, [x23, #:lo12:.LANCHOR69]
-	adrp	x0, .LANCHOR106
-	ldr	x6, [x22, #:lo12:.LANCHOR7]
-	mov	w7, 0
-	ldrb	w14, [x0, #:lo12:.LANCHOR106]
-	mov	w10, 0
-	ldr	x13, [x21, #:lo12:.LANCHOR104]
-	mov	w8, 0
-	mul	w12, w20, w11
-	add	x6, x6, x20, uxth 2
-.L2752:
-	cmp	w8, w14
-	bcs	.L2756
-	add	w15, w11, w7
-	b	.L2757
-.L2755:
-	add	w1, w7, w12
-	mov	w0, w8
-	bl	flash_check_bad_block
-	cbz	w0, .L2753
-	ldrb	w1, [x6, 3]
-	lsl	w0, w26, w7
-	orr	w0, w0, w1
-	strb	w0, [x6, 3]
-	ldrh	w0, [x13, 148]
-	add	w0, w0, 1
-	strh	w0, [x13, 148]
-.L2754:
-	add	w7, w7, 1
-.L2757:
-	cmp	w7, w15
-	bne	.L2755
-	add	w8, w8, 1
-	sub	w12, w12, w11
-	and	w8, w8, 65535
-	b	.L2752
-.L2753:
-	add	w10, w10, 1
-	and	w10, w10, 65535
-	b	.L2754
-.L2756:
-	cbnz	w10, .L2758
-	ldrb	w0, [x6, 2]
-	orr	w0, w0, -32
-	strb	w0, [x6, 2]
-.L2758:
-	add	w20, w20, 1
-	and	w20, w20, 65535
-	b	.L2750
-.L2770:
-	add	x13, x15, x20, uxth 2
-	mov	w6, 0
-	mov	w12, 0
-	mov	w5, 0
-	ldrb	w0, [x13, 2]
-	orr	w0, w0, -32
-	strb	w0, [x13, 2]
+	cmp	w10, 2
+	bne	.L2761
+	adrp	x0, .LANCHOR73
+	add	w21, w21, w11
+	add	w21, w21, w24
+	ldrb	w3, [x0, #:lo12:.LANCHOR73]
+	orr	w21, w21, w3, lsl 24
+	b	.L2760
+.L2761:
+	add	w21, w25, w21
+	b	.L2760
 .L2765:
-	cmp	w5, w16
-	bcc	.L2772
-	add	w20, w20, 1
-	add	w1, w1, w11
-	and	w20, w20, 65535
-	and	w1, w1, 65535
-	b	.L2764
-.L2768:
-	ldrb	w14, [x13, 3]
-	add	w17, w12, w7
-	asr	w14, w14, w17
-	tbnz	x14, 0, .L2766
-	cmp	w10, 1
-	bls	.L2771
-	and	w0, w0, 1
-	add	w0, w1, w0
-	and	w0, w0, 65535
-.L2767:
-	add	x14, x2, x3, sxtw 1
-	add	w3, w3, 1
-	and	w3, w3, 65535
-	add	w0, w0, w6
-	strh	w0, [x14, 160]
-.L2766:
-	add	x7, x7, 1
-.L2769:
-	and	w0, w7, 65535
-	cmp	w0, w11
-	bcc	.L2768
-	add	w5, w5, 1
-	add	w6, w4, w6
-	and	w5, w5, 65535
-	add	w12, w12, w10
-	and	w6, w6, 65535
-	b	.L2765
+	add	w8, w25, 1
+	and	w25, w8, 65535
+	b	.L2756
 .L2771:
-	mov	w0, w1
+	mov	w2, w21
+	mov	w1, w25
+	mov	x0, x26
+	bl	printf
+	ldr	x0, [x29, 128]
+	adrp	x2, .LANCHOR105
+	ldrb	w1, [x0]
+	sxtw	x0, w21
+	cbz	w1, .L2768
+	add	x0, x0, 8
+	ldrh	w1, [x2, #:lo12:.LANCHOR105]
+	ldrh	w0, [x22, x0, lsl 1]
+	mul	w0, w0, w1
+	orr	w0, w0, w25
+	str	w0, [x19, 40]
+	mov	x0, x19
+	bl	sblk_3d_tlc_dump_prog
+.L2769:
+	add	w21, w21, 1
+	and	w21, w21, 65535
+.L2773:
+	ldrb	w0, [x29, 153]
+	cmp	w0, w21
+	bhi	.L2771
+	add	w8, w25, 1
+	and	w25, w8, 65535
 	b	.L2767
-.L2772:
-	mov	x7, 0
+.L2768:
+	ldrb	w1, [x27]
+	add	x0, x0, 8
+	cmp	w1, 2
+	bne	.L2770
+	ldrh	w0, [x22, x0, lsl 1]
+	ldrh	w1, [x2, #:lo12:.LANCHOR105]
+	mul	w0, w0, w1
+	orr	w0, w0, w28
+	orr	w0, w0, 33554432
+	str	w0, [x19, 40]
+	mov	x0, x19
+	bl	sblk_mlc_dump_prog
 	b	.L2769
-	.size	ftl_low_format, .-ftl_low_format
-	.section	.text.ftl_re_low_format,"ax",@progbits
-	.align	2
-	.global	ftl_re_low_format
-	.type	ftl_re_low_format, %function
-ftl_re_low_format:
-	stp	x29, x30, [sp, -16]!
-	mov	w1, 1
-	adrp	x0, .LC171
-	add	x0, x0, :lo12:.LC171
-	add	x29, sp, 0
+.L2770:
+	ldrh	w1, [x22, x0, lsl 1]
+	mov	w6, 1
+	ldrh	w0, [x2, #:lo12:.LANCHOR105]
+	mov	w5, 0
+	ldrb	w4, [x24, #:lo12:.LANCHOR126]
+	ldr	x3, [x19, 24]
+	mul	w1, w1, w0
+	adrp	x0, .LANCHOR31
+	ldrb	w2, [x0, #:lo12:.LANCHOR31]
+	mov	w0, 24
+	orr	w1, w1, w25
+	str	w1, [x19, 40]
+	sub	w0, w0, w2
+	lsl	w6, w6, w2
+	ldr	x2, [x19, 8]
+	sub	w6, w6, #1
+	lsl	w7, w6, w0
+	lsr	w0, w1, w0
+	bic	w1, w1, w7
+	and	w0, w0, w6
+	bl	flash_prog_page_en
+	b	.L2769
+.L2772:
+	mov	x0, x19
+	bl	zbuf_free
+	adrp	x0, .LC170
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC170
 	bl	printf
-	bl	sblk_init
-	bl	ftl_info_blk_init
-	bl	ftl_ext_info_init
-	adrp	x0, .LANCHOR104
-	adrp	x2, .LANCHOR6
-	mov	w3, 0
-	mov	w4, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR104]
-	mov	w5, 0
-	ldrh	w7, [x2, #:lo12:.LANCHOR6]
-	adrp	x2, .LANCHOR7
-	ldr	x2, [x2, #:lo12:.LANCHOR7]
-	ldrh	w1, [x0, 134]
-	add	x2, x2, x1, uxth 2
-.L2783:
-	cmp	w1, w7
-	bcc	.L2787
-	strh	w5, [x0, 114]
-	strh	w4, [x0, 118]
-	strh	w3, [x0, 116]
-	strh	wzr, [x0, 122]
-	strh	wzr, [x0, 120]
-	strh	wzr, [x0, 124]
-	bl	ftl_low_format_data_init
-	mov	w0, 0
-	ldp	x29, x30, [sp], 16
+.L2752:
+	ldp	x19, x20, [sp, 64]
+	ldp	x21, x22, [sp, 80]
+	ldp	x23, x24, [sp, 96]
+	ldp	x25, x26, [sp, 112]
+	ldp	x27, x28, [sp, 128]
+	ldp	x29, x30, [sp, 48]
+	add	sp, sp, 224
 	ret
-.L2787:
-	ldrb	w6, [x2, 2]
-	and	w8, w6, 31
-	strb	w8, [x2, 2]
-	ands	w6, w6, 24
-	bne	.L2784
-	add	w5, w5, 1
-	and	w5, w5, 65535
-.L2785:
-	add	w1, w1, 1
-	add	x2, x2, 4
-	and	w1, w1, 65535
-	b	.L2783
-.L2784:
-	cmp	w6, 16
-	bne	.L2786
-	add	w4, w4, 1
-	and	w4, w4, 65535
-	b	.L2785
-.L2786:
-	add	w3, w3, 1
-	and	w3, w3, 65535
-	b	.L2785
-	.size	ftl_re_low_format, .-ftl_re_low_format
+	.size	ftl_dump_write_open_sblk, .-ftl_dump_write_open_sblk
 	.section	.text.flash_info_flush,"ax",@progbits
 	.align	2
 	.global	flash_info_flush
@@ -17453,33 +17423,33 @@ flash_info_flush:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2790
-	adrp	x2, .LANCHOR196
-	adrp	x0, .LC92
-	add	x2, x2, :lo12:.LANCHOR196
-	mov	w1, 324
-	add	x0, x0, :lo12:.LC92
+	tbz	x0, 12, .L2783
+	adrp	x2, .LANCHOR199
+	adrp	x0, .LC91
+	add	x2, x2, :lo12:.LANCHOR199
+	mov	w1, 325
+	add	x0, x0, :lo12:.LC91
 	bl	printf
-.L2790:
-	adrp	x23, .LANCHOR197
+.L2783:
+	adrp	x23, .LANCHOR200
 	adrp	x20, .LANCHOR27
 	mov	w2, 64
 	mov	w1, 0
-	ldr	x0, [x23, #:lo12:.LANCHOR197]
-	adrp	x21, .LANCHOR198
+	ldr	x0, [x23, #:lo12:.LANCHOR200]
+	adrp	x21, .LANCHOR201
 	adrp	x22, .LANCHOR2
-	adrp	x24, .LC173
-	adrp	x25, .LANCHOR142
+	adrp	x24, .LC172
+	adrp	x25, .LANCHOR144
 	add	x22, x22, :lo12:.LANCHOR2
-	add	x24, x24, :lo12:.LC173
-	add	x25, x25, :lo12:.LANCHOR142
+	add	x24, x24, :lo12:.LC172
+	add	x25, x25, :lo12:.LANCHOR144
 	bl	ftl_memset
-	add	x27, x21, :lo12:.LANCHOR198
+	add	x27, x21, :lo12:.LANCHOR201
 	ldr	x1, [x20, #:lo12:.LANCHOR27]
 	mov	w3, 16
 	mov	w2, 4
-	adrp	x0, .LC172
-	add	x0, x0, :lo12:.LC172
+	adrp	x0, .LC171
+	add	x0, x0, :lo12:.LC171
 	mov	w26, 0
 	bl	rknand_print_hex
 	ldr	x6, [x20, #:lo12:.LANCHOR27]
@@ -17487,9 +17457,9 @@ flash_info_flush:
 	ldr	w1, [x6, 8]
 	bl	js_hash
 	str	w0, [x6, 12]
-.L2791:
-	add	x28, x21, :lo12:.LANCHOR198
-	ldrb	w4, [x21, #:lo12:.LANCHOR198]
+.L2784:
+	add	x28, x21, :lo12:.LANCHOR201
+	ldrb	w4, [x21, #:lo12:.LANCHOR201]
 	ldrh	w19, [x22]
 	mov	x0, x24
 	mov	w1, w4
@@ -17502,7 +17472,7 @@ flash_info_flush:
 	sub	w0, w0, #1
 	cmp	w1, w0
 	ldp	w3, w4, [x29, 104]
-	blt	.L2792
+	blt	.L2785
 	ldr	x6, [x20, #:lo12:.LANCHOR27]
 	ldrb	w7, [x28, 1]
 	strh	wzr, [x28, 2]
@@ -17510,32 +17480,32 @@ flash_info_flush:
 	ldrh	w1, [x6, 16]
 	add	w0, w0, 1
 	str	w0, [x6, 4]
-	ldrb	w0, [x21, #:lo12:.LANCHOR198]
+	ldrb	w0, [x21, #:lo12:.LANCHOR201]
 	add	w1, w1, 1
 	strb	w0, [x28, 1]
 	mov	x0, x6
-	strb	w7, [x21, #:lo12:.LANCHOR198]
+	strb	w7, [x21, #:lo12:.LANCHOR201]
 	strh	w1, [x0, 16]!
 	ldr	w1, [x6, 8]
 	bl	js_hash
 	ldrh	w19, [x22]
 	str	w0, [x6, 12]
 	mul	w19, w19, w7
-.L2801:
+.L2794:
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_erase_block
-	b	.L2793
-.L2796:
+	b	.L2786
+.L2789:
 	mov	w26, 1
-	b	.L2791
-.L2792:
+	b	.L2784
+.L2785:
 	madd	w19, w19, w4, w3
-	cbz	w1, .L2801
-.L2793:
+	cbz	w1, .L2794
+.L2786:
 	ldr	x2, [x20, #:lo12:.LANCHOR27]
 	mov	w1, w19
-	ldr	x3, [x23, #:lo12:.LANCHOR197]
+	ldr	x3, [x23, #:lo12:.LANCHOR200]
 	mov	w5, 1
 	mov	w4, 4
 	ldr	w0, [x2, 4]
@@ -17549,14 +17519,14 @@ flash_info_flush:
 	ldrh	w1, [x27, 2]
 	add	w1, w1, 1
 	strh	w1, [x27, 2]
-	bne	.L2794
+	bne	.L2787
 	mov	w1, w19
-	adrp	x0, .LC174
-	add	x0, x0, :lo12:.LC174
+	adrp	x0, .LC173
+	add	x0, x0, :lo12:.LC173
 	bl	printf
-	b	.L2791
-.L2794:
-	cbz	w26, .L2796
+	b	.L2784
+.L2787:
+	cbz	w26, .L2789
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -17581,46 +17551,46 @@ flash_info_blk_init:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	tbz	x0, 12, .L2803
+	tbz	x0, 12, .L2796
 	ldr	x4, [x20, #:lo12:.LANCHOR27]
-	adrp	x2, .LANCHOR199
-	adrp	x0, .LC175
+	adrp	x2, .LANCHOR202
+	adrp	x0, .LC174
 	mov	w3, 2048
-	add	x2, x2, :lo12:.LANCHOR199
+	add	x2, x2, :lo12:.LANCHOR202
 	mov	w1, 50
-	add	x0, x0, :lo12:.LC175
+	add	x0, x0, :lo12:.LC174
 	bl	printf
-.L2803:
-	adrp	x21, .LANCHOR197
+.L2796:
+	adrp	x21, .LANCHOR200
 	adrp	x24, .LANCHOR2
 	mov	w22, 21321
 	add	x26, x24, :lo12:.LANCHOR2
 	mov	x23, x21
 	mov	w19, 4
 	movk	w22, 0x5359, lsl 16
-.L2806:
+.L2799:
 	ldrh	w1, [x26]
 	mov	w4, 4
-	ldr	x3, [x21, #:lo12:.LANCHOR197]
+	ldr	x3, [x21, #:lo12:.LANCHOR200]
 	mov	w0, 0
 	ldr	x2, [x20, #:lo12:.LANCHOR27]
-	add	x27, x21, :lo12:.LANCHOR197
+	add	x27, x21, :lo12:.LANCHOR200
 	add	x25, x20, :lo12:.LANCHOR27
 	mul	w1, w1, w19
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L2804
+	beq	.L2797
 	ldr	x2, [x20, #:lo12:.LANCHOR27]
 	ldr	w0, [x2]
 	cmp	w0, w22
-	beq	.L2805
-.L2804:
+	beq	.L2798
+.L2797:
 	add	w19, w19, 1
 	cmp	w19, 16
-	bne	.L2806
-.L2831:
+	bne	.L2799
+.L2824:
 	mov	w0, -1
-.L2802:
+.L2795:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -17628,16 +17598,16 @@ flash_info_blk_init:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2814:
+.L2807:
 	ldr	x0, [x25]
 	ldr	w1, [x0]
 	cmp	w1, w22
-	bne	.L2815
+	bne	.L2808
 	ldr	w21, [x0, 4]
-.L2808:
-	add	x22, x19, :lo12:.LANCHOR198
+.L2801:
+	add	x22, x19, :lo12:.LANCHOR201
 	ldrh	w0, [x24, #:lo12:.LANCHOR2]
-	ldr	x3, [x23, #:lo12:.LANCHOR197]
+	ldr	x3, [x23, #:lo12:.LANCHOR200]
 	mov	w4, 4
 	ldr	x2, [x20, #:lo12:.LANCHOR27]
 	ldrb	w1, [x22, 1]
@@ -17645,31 +17615,31 @@ flash_info_blk_init:
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L2809
+	beq	.L2802
 	ldr	x0, [x20, #:lo12:.LANCHOR27]
 	mov	w1, 21321
 	movk	w1, 0x5359, lsl 16
 	ldr	w2, [x0]
 	cmp	w2, w1
-	bne	.L2809
+	bne	.L2802
 	ldr	w1, [x0, 4]
 	cmp	w21, w1
-	bcs	.L2809
+	bcs	.L2802
 	ldrb	w1, [x0, 37]
 	ldrb	w0, [x0, 36]
-	strb	w1, [x19, #:lo12:.LANCHOR198]
+	strb	w1, [x19, #:lo12:.LANCHOR201]
 	strb	w0, [x22, 1]
-.L2809:
-	ldrb	w1, [x19, #:lo12:.LANCHOR198]
-	add	x21, x19, :lo12:.LANCHOR198
-	ldr	x3, [x23, #:lo12:.LANCHOR197]
+.L2802:
+	ldrb	w1, [x19, #:lo12:.LANCHOR201]
+	add	x21, x19, :lo12:.LANCHOR201
+	ldr	x3, [x23, #:lo12:.LANCHOR200]
 	mov	w4, 4
 	ldr	x2, [x20, #:lo12:.LANCHOR27]
 	mov	w0, 0
 	bl	flash_get_last_written_page
 	and	w25, w0, 65535
 	add	w1, w25, 1
-	ldrb	w22, [x19, #:lo12:.LANCHOR198]
+	ldrb	w22, [x19, #:lo12:.LANCHOR201]
 	strh	w1, [x21, 2]
 	mov	w21, 0
 	ldrh	w1, [x24, #:lo12:.LANCHOR2]
@@ -17677,59 +17647,59 @@ flash_info_blk_init:
 	movk	w24, 0x5359, lsl 16
 	mul	w22, w22, w1
 	add	w22, w22, w0, sxth
-.L2810:
+.L2803:
 	sub	w0, w25, w21
 	sxth	w19, w0
-	tbz	w19, #31, .L2813
+	tbz	w19, #31, .L2806
 	cmn	w19, #1
-	bne	.L2812
+	bne	.L2805
 	ldr	x0, [x20, #:lo12:.LANCHOR27]
 	ldr	w1, [x0]
-	adrp	x0, .LC176
-	add	x0, x0, :lo12:.LC176
+	adrp	x0, .LC175
+	add	x0, x0, :lo12:.LC175
 	bl	printf
-	b	.L2831
-.L2813:
-	ldr	x3, [x23, #:lo12:.LANCHOR197]
+	b	.L2824
+.L2806:
+	ldr	x3, [x23, #:lo12:.LANCHOR200]
 	mov	w4, 4
 	ldr	x2, [x20, #:lo12:.LANCHOR27]
 	sub	w1, w22, w21
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L2811
+	beq	.L2804
 	ldr	x0, [x20, #:lo12:.LANCHOR27]
 	ldr	w0, [x0]
 	cmp	w0, w24
-	beq	.L2812
-.L2811:
+	beq	.L2805
+.L2804:
 	add	w21, w21, 1
-	b	.L2810
-.L2812:
+	b	.L2803
+.L2805:
 	cmp	w21, 1
-	bls	.L2816
+	bls	.L2809
 	bl	flash_info_flush
-.L2816:
+.L2809:
 	mov	w0, 0
-	b	.L2802
-.L2805:
-	adrp	x19, .LANCHOR198
-	add	x1, x19, :lo12:.LANCHOR198
+	b	.L2795
+.L2798:
+	adrp	x19, .LANCHOR201
+	add	x1, x19, :lo12:.LANCHOR201
 	ldrb	w3, [x2, 37]
 	mov	w4, 4
 	ldrb	w0, [x2, 36]
 	strb	w3, [x1, 1]
 	ldrh	w1, [x26]
 	ldr	x3, [x27]
-	strb	w0, [x19, #:lo12:.LANCHOR198]
+	strb	w0, [x19, #:lo12:.LANCHOR201]
 	mul	w1, w1, w0
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	bne	.L2814
-.L2815:
+	bne	.L2807
+.L2808:
 	mov	w21, 0
-	b	.L2808
+	b	.L2801
 	.size	flash_info_blk_init, .-flash_info_blk_init
 	.section	.text.nand_flash_init,"ax",@progbits
 	.align	2
@@ -17746,26 +17716,26 @@ nand_flash_init:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	tbz	x0, 12, .L2833
-	adrp	x2, .LANCHOR200
-	adrp	x0, .LC92
-	add	x2, x2, :lo12:.LANCHOR200
-	mov	w1, 2578
-	add	x0, x0, :lo12:.LC92
+	tbz	x0, 12, .L2826
+	adrp	x2, .LANCHOR203
+	adrp	x0, .LC91
+	add	x2, x2, :lo12:.LANCHOR203
+	mov	w1, 2765
+	add	x0, x0, :lo12:.LC91
 	bl	printf
-.L2833:
-	adrp	x0, .LANCHOR163
-	adrp	x23, .LANCHOR16
+.L2826:
+	adrp	x0, .LANCHOR165
+	adrp	x24, .LANCHOR16
 	adrp	x22, .LANCHOR44
 	add	x25, x22, :lo12:.LANCHOR44
-	str	wzr, [x0, #:lo12:.LANCHOR163]
+	str	wzr, [x0, #:lo12:.LANCHOR165]
 	mov	x0, x19
 	bl	nandc_init
 	adrp	x19, .LANCHOR32
 	add	x0, x19, :lo12:.LANCHOR32
-	str	x0, [x23, #:lo12:.LANCHOR16]
+	str	x0, [x24, #:lo12:.LANCHOR16]
 	adrp	x0, .LANCHOR18
-	adrp	x24, .LANCHOR31
+	adrp	x23, .LANCHOR31
 	mov	x26, x25
 	mov	w1, 1
 	mov	w21, 0
@@ -17773,29 +17743,29 @@ nand_flash_init:
 	mov	w27, 44
 	mov	w0, 3
 	mov	w2, 8
-	strb	w0, [x24, #:lo12:.LANCHOR31]
+	strb	w0, [x23, #:lo12:.LANCHOR31]
 	mov	w1, 0
 	adrp	x0, .LANCHOR30
 	add	x0, x0, :lo12:.LANCHOR30
 	bl	ftl_memset
 	mov	w2, 32
 	mov	w1, 0
-	adrp	x0, .LANCHOR143
-	add	x0, x0, :lo12:.LANCHOR143
+	adrp	x0, .LANCHOR145
+	add	x0, x0, :lo12:.LANCHOR145
 	bl	ftl_memset
-.L2839:
+.L2832:
 	mov	x1, x25
 	mov	w0, w21
 	bl	flash_read_id
-	cbnz	w21, .L2834
+	cbnz	w21, .L2827
 	ldrb	w0, [x26]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bls	.L2835
-.L2837:
+	bls	.L2828
+.L2830:
 	mov	w19, -2
-.L2832:
+.L2825:
 	mov	w0, w19
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -17804,56 +17774,56 @@ nand_flash_init:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2835:
+.L2828:
 	ldrb	w0, [x26, 1]
 	cmp	w0, 255
-	beq	.L2837
-.L2834:
+	beq	.L2830
+.L2827:
 	ldrb	w0, [x25]
 	cmp	w0, 181
-	bne	.L2838
+	bne	.L2831
 	strb	w27, [x25]
-.L2838:
+.L2831:
 	add	w21, w21, 1
 	add	x25, x25, 8
 	and	w21, w21, 255
 	cmp	w21, 4
-	bne	.L2839
-	adrp	x0, .LANCHOR201
-	add	x8, x0, :lo12:.LANCHOR201
+	bne	.L2832
+	adrp	x0, .LANCHOR204
+	add	x8, x0, :lo12:.LANCHOR204
 	add	x8, x8, 1
 	mov	x7, x0
 	add	x12, x22, :lo12:.LANCHOR44
 	mov	x10, 0
-.L2842:
+.L2835:
 	ldrb	w2, [x8, -1]
 	mov	w11, w10
 	lsl	x25, x10, 5
 	mov	x1, x12
 	mov	x0, x8
 	bl	flash_mem_cmp8
-	cbnz	w0, .L2840
-	add	x0, x7, :lo12:.LANCHOR201
+	cbnz	w0, .L2833
+	add	x0, x7, :lo12:.LANCHOR204
 	ubfiz	x11, x11, 5, 32
 	add	x25, x0, x25
 	add	x0, x0, x11
-	adrp	x1, .LANCHOR202
-	add	x4, x1, :lo12:.LANCHOR202
+	adrp	x1, .LANCHOR205
+	add	x4, x1, :lo12:.LANCHOR205
 	ldrb	w3, [x0, 22]
 	mov	x0, 0
-.L2841:
+.L2834:
 	lsl	x5, x0, 5
 	mov	w2, w0
 	ldrb	w5, [x5, x4]
 	cmp	w5, w3
-	beq	.L2843
+	beq	.L2836
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L2841
+	bne	.L2834
 	mov	w2, w0
-.L2843:
+.L2836:
 	ubfiz	x0, x2, 5, 32
-	add	x1, x1, :lo12:.LANCHOR202
+	add	x1, x1, :lo12:.LANCHOR205
 	add	x1, x1, x0
 	mov	w2, 32
 	adrp	x0, .LANCHOR20
@@ -17867,71 +17837,71 @@ nand_flash_init:
 	bl	ftl_memcpy
 	ldrb	w0, [x25, #:lo12:.LANCHOR28]
 	cmp	w0, 8
-	bhi	.L2844
+	bhi	.L2837
 	ldrb	w0, [x21, 20]
 	cmp	w0, 60
-	bls	.L2844
+	bls	.L2837
 	mov	w0, 60
 	strb	w0, [x21, 20]
-.L2844:
+.L2837:
 	ldr	w0, [x20, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2871
-	adrp	x2, .LANCHOR200
-	adrp	x0, .LC92
-	add	x2, x2, :lo12:.LANCHOR200
-	mov	w1, 2600
-	add	x0, x0, :lo12:.LC92
+	tbz	x0, 12, .L2865
+	adrp	x2, .LANCHOR203
+	adrp	x0, .LC91
+	add	x2, x2, :lo12:.LANCHOR203
+	mov	w1, 2787
+	add	x0, x0, :lo12:.LC91
 	bl	printf
-.L2871:
-	ldr	x0, [x23, #:lo12:.LANCHOR16]
+.L2865:
+	ldr	x0, [x24, #:lo12:.LANCHOR16]
 	ldrh	w0, [x0, 10]
-	cmp	w0, 2304
-	bne	.L2845
+	cmp	w0, 1023
+	bls	.L2838
 	mov	w0, 2
-	strb	w0, [x24, #:lo12:.LANCHOR31]
-.L2845:
+	strb	w0, [x23, #:lo12:.LANCHOR31]
+.L2838:
 	mov	w0, 16384
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR167
-	adrp	x26, .LANCHOR27
+	adrp	x1, .LANCHOR169
+	adrp	x23, .LANCHOR27
 	add	x21, x19, :lo12:.LANCHOR32
-	adrp	x24, .LANCHOR45
-	str	x0, [x1, #:lo12:.LANCHOR167]
+	str	x0, [x1, #:lo12:.LANCHOR169]
 	mov	w0, 16384
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR159
-	str	x0, [x1, #:lo12:.LANCHOR159]
+	adrp	x1, .LANCHOR161
+	str	x0, [x1, #:lo12:.LANCHOR161]
 	mov	w0, 2048
 	bl	ftl_malloc
-	str	x0, [x26, #:lo12:.LANCHOR27]
+	str	x0, [x23, #:lo12:.LANCHOR27]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR166
-	str	x0, [x1, #:lo12:.LANCHOR166]
+	adrp	x1, .LANCHOR168
+	str	x0, [x1, #:lo12:.LANCHOR168]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR161
-	str	x0, [x1, #:lo12:.LANCHOR161]
+	adrp	x1, .LANCHOR163
+	str	x0, [x1, #:lo12:.LANCHOR163]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR197
-	str	x0, [x1, #:lo12:.LANCHOR197]
-	adrp	x0, .LANCHOR203
-	strb	wzr, [x0, #:lo12:.LANCHOR203]
+	adrp	x1, .LANCHOR200
+	str	x0, [x1, #:lo12:.LANCHOR200]
+	adrp	x0, .LANCHOR206
+	strb	wzr, [x0, #:lo12:.LANCHOR206]
 	bl	flash_die_info_init
 	ldrb	w0, [x21, 18]
 	bl	flash_lsb_page_tbl_build
 	ldrb	w0, [x21, 20]
-	adrp	x21, .LANCHOR165
+	adrp	x21, .LANCHOR167
 	bl	nandc_bch_sel
-	str	xzr, [x21, #:lo12:.LANCHOR165]
-	ldr	x2, [x23, #:lo12:.LANCHOR16]
+	str	xzr, [x21, #:lo12:.LANCHOR167]
+	ldr	x2, [x24, #:lo12:.LANCHOR16]
+	adrp	x24, .LANCHOR45
 	ldrh	w0, [x2, 16]
 	ubfx	x1, x0, 8, 3
 	strb	w1, [x24, #:lo12:.LANCHOR45]
-	adrp	x1, .LANCHOR171
+	adrp	x1, .LANCHOR179
 	ubfx	x3, x0, 3, 1
-	strb	w3, [x1, #:lo12:.LANCHOR171]
+	strb	w3, [x1, #:lo12:.LANCHOR179]
 	adrp	x1, .LANCHOR41
 	ubfx	x3, x0, 4, 1
 	strb	w3, [x1, #:lo12:.LANCHOR41]
@@ -17944,14 +17914,14 @@ nand_flash_init:
 	adrp	x1, .LANCHOR35
 	ubfx	x3, x0, 11, 1
 	strb	w3, [x1, #:lo12:.LANCHOR35]
-	adrp	x3, .LANCHOR204
+	adrp	x3, .LANCHOR118
 	ldrb	w1, [x2, 31]
 	ldrb	w2, [x2, 28]
 	ubfx	x4, x1, 1, 1
-	strb	w4, [x3, #:lo12:.LANCHOR204]
-	adrp	x3, .LANCHOR205
+	strb	w4, [x3, #:lo12:.LANCHOR118]
+	adrp	x3, .LANCHOR207
 	ubfx	x1, x1, 2, 1
-	strb	w1, [x3, #:lo12:.LANCHOR205]
+	strb	w1, [x3, #:lo12:.LANCHOR207]
 	adrp	x1, .LANCHOR1
 	ubfx	x3, x0, 14, 1
 	lsr	w0, w0, 15
@@ -17965,208 +17935,214 @@ nand_flash_init:
 	strb	w1, [x0, #:lo12:.LANCHOR17]
 	ldrb	w1, [x25, #:lo12:.LANCHOR28]
 	cmp	w1, 9
-	bne	.L2846
+	bne	.L2839
 	mov	w3, 70
 	strb	w3, [x0, #:lo12:.LANCHOR17]
-.L2846:
+.L2839:
 	adrp	x0, .LANCHOR19
 	strb	w2, [x0, #:lo12:.LANCHOR19]
 	add	x2, x19, :lo12:.LANCHOR32
 	ldrb	w2, [x2, 7]
 	cmp	w2, 9
-	bne	.L2847
+	bne	.L2840
 	strb	wzr, [x0, #:lo12:.LANCHOR19]
-.L2847:
+.L2840:
 	add	x2, x19, :lo12:.LANCHOR32
-	ldrb	w2, [x2, 31]
-	tbz	x2, 0, .L2848
-	mov	w2, 3
+	ldrb	w3, [x2, 31]
+	tbz	x3, 0, .L2841
+	ldrb	w2, [x2, 29]
+	cbz	w2, .L2842
+	mov	w2, 2
+.L2894:
 	strb	w2, [x0, #:lo12:.LANCHOR19]
-.L2848:
+.L2841:
 	cmp	w1, 8
-	bne	.L2849
+	bne	.L2843
 	ldrb	w1, [x22, #:lo12:.LANCHOR44]
 	mov	w2, 137
 	cmp	w1, 44
 	ccmp	w1, w2, 4, ne
-	bne	.L2849
+	bne	.L2843
 	add	x1, x19, :lo12:.LANCHOR32
 	ldrb	w1, [x1, 28]
 	cmp	w1, 3
-	bne	.L2849
+	bne	.L2843
 	strb	wzr, [x0, #:lo12:.LANCHOR19]
-.L2849:
+.L2843:
 	add	x19, x19, :lo12:.LANCHOR32
 	adrp	x25, .LANCHOR24
 	ldrh	w1, [x19, 16]
 	ldrb	w0, [x19, 19]
 	strb	w0, [x25, #:lo12:.LANCHOR24]
-	tbz	x1, 6, .L2851
+	tbz	x1, 6, .L2845
 	sub	w1, w0, #17
 	and	w1, w1, 255
 	cmp	w1, 2
 	ccmp	w0, 21, 4, hi
-	bne	.L2852
+	bne	.L2846
 	adrp	x1, micron_read_retrial
 	add	x1, x1, :lo12:micron_read_retrial
-	str	x1, [x21, #:lo12:.LANCHOR165]
+	str	x1, [x21, #:lo12:.LANCHOR167]
 	cmp	w0, 21
-	adrp	x0, .LANCHOR162
-	beq	.L2853
+	adrp	x0, .LANCHOR164
+	beq	.L2847
 	mov	w1, 15
-.L2901:
-	strb	w1, [x0, #:lo12:.LANCHOR162]
-	b	.L2851
-.L2840:
+.L2896:
+	strb	w1, [x0, #:lo12:.LANCHOR164]
+	b	.L2845
+.L2833:
 	add	x10, x10, 1
 	add	x8, x8, 32
-	cmp	x10, 44
-	bne	.L2842
-	b	.L2837
-.L2853:
+	cmp	x10, 46
+	bne	.L2835
+	b	.L2830
+.L2842:
+	mov	w2, 3
+	b	.L2894
+.L2847:
 	mov	w1, 4
-	b	.L2901
-.L2852:
+	b	.L2896
+.L2846:
 	sub	w1, w0, #65
 	cmp	w0, 33
 	and	w1, w1, 255
 	ccmp	w1, 1, 0, ne
-	bhi	.L2855
+	bhi	.L2849
 	adrp	x0, toshiba_read_retrial
 	add	x0, x0, :lo12:toshiba_read_retrial
-	str	x0, [x21, #:lo12:.LANCHOR165]
+	str	x0, [x21, #:lo12:.LANCHOR167]
 	adrp	x0, .LANCHOR26
 	mov	w1, 4
 	strb	w1, [x0, #:lo12:.LANCHOR26]
-.L2903:
+.L2898:
 	mov	w1, 7
-	adrp	x0, .LANCHOR162
-	b	.L2901
-.L2855:
+	adrp	x0, .LANCHOR164
+	b	.L2896
+.L2849:
 	sub	w2, w0, #34
 	sub	w1, w0, #67
 	and	w2, w2, 255
 	and	w1, w1, 255
 	cmp	w2, 1
 	ccmp	w1, 1, 0, hi
-	bhi	.L2856
+	bhi	.L2850
 	adrp	x2, toshiba_read_retrial
 	add	x2, x2, :lo12:toshiba_read_retrial
-	str	x2, [x21, #:lo12:.LANCHOR165]
+	str	x2, [x21, #:lo12:.LANCHOR167]
 	cmp	w0, 35
 	mov	w2, 68
 	ccmp	w0, w2, 4, ne
-	adrp	x0, .LANCHOR162
-	beq	.L2857
+	adrp	x0, .LANCHOR164
+	beq	.L2851
 	mov	w2, 7
-.L2900:
-	strb	w2, [x0, #:lo12:.LANCHOR162]
+.L2895:
+	strb	w2, [x0, #:lo12:.LANCHOR164]
 	cmp	w1, 1
 	adrp	x0, .LANCHOR26
-	bhi	.L2859
+	bhi	.L2853
 	mov	w1, 4
-.L2902:
+.L2897:
 	strb	w1, [x0, #:lo12:.LANCHOR26]
-.L2851:
+.L2845:
 	ldr	w0, [x20, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2860
-	adrp	x2, .LANCHOR200
-	adrp	x0, .LC92
-	add	x2, x2, :lo12:.LANCHOR200
-	mov	w1, 2671
-	add	x0, x0, :lo12:.LC92
+	tbz	x0, 12, .L2854
+	adrp	x2, .LANCHOR203
+	adrp	x0, .LC91
+	add	x2, x2, :lo12:.LANCHOR203
+	mov	w1, 2863
+	add	x0, x0, :lo12:.LC91
 	bl	printf
-.L2860:
+.L2854:
 	adrp	x22, .LANCHOR21
 	ldrb	w0, [x24, #:lo12:.LANCHOR45]
 	strb	wzr, [x22, #:lo12:.LANCHOR21]
-	tbz	x0, 0, .L2861
+	tbz	x0, 0, .L2855
 	mov	w0, 4
 	bl	nandc_set_if_mode
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
-.L2904:
+.L2899:
 	bl	nandc_set_if_mode
 	bl	flash_info_blk_init
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L2863
+	bne	.L2857
 	ldr	w0, [x20, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2864
-	adrp	x2, .LANCHOR200
-	adrp	x0, .LC92
-	add	x2, x2, :lo12:.LANCHOR200
-	mov	w1, 2688
-	add	x0, x0, :lo12:.LC92
+	tbz	x0, 12, .L2858
+	adrp	x2, .LANCHOR203
+	adrp	x0, .LC91
+	add	x2, x2, :lo12:.LANCHOR203
+	mov	w1, 2881
+	add	x0, x0, :lo12:.LC91
 	bl	printf
-.L2864:
-	ldr	x0, [x26, #:lo12:.LANCHOR27]
+.L2858:
+	ldr	x0, [x23, #:lo12:.LANCHOR27]
 	mov	w1, 17
 	strb	w1, [x0, 32]
 	adrp	x0, .LANCHOR33
 	strb	wzr, [x0, #:lo12:.LANCHOR33]
 	mov	w0, 0
 	bl	zftl_flash_exit_slc_mode
-	b	.L2832
-.L2857:
+	b	.L2825
+.L2851:
 	mov	w2, 17
-	b	.L2900
-.L2859:
+	b	.L2895
+.L2853:
 	mov	w1, 5
-	b	.L2902
-.L2856:
+	b	.L2897
+.L2850:
 	sub	w0, w0, #36
 	and	w0, w0, 255
 	cmp	w0, 1
-	bhi	.L2851
+	bhi	.L2845
 	adrp	x0, toshiba_3d_read_retrial
 	add	x0, x0, :lo12:toshiba_3d_read_retrial
-	str	x0, [x21, #:lo12:.LANCHOR165]
-	b	.L2903
-.L2861:
+	str	x0, [x21, #:lo12:.LANCHOR167]
+	b	.L2898
+.L2855:
 	mov	w0, 4
-	b	.L2904
-.L2863:
+	b	.L2899
+.L2857:
 	ldrb	w0, [x25, #:lo12:.LANCHOR24]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 7
-	bhi	.L2865
+	bhi	.L2859
 	adrp	x0, hynix_read_retrial
 	add	x0, x0, :lo12:hynix_read_retrial
-	str	x0, [x21, #:lo12:.LANCHOR165]
-.L2865:
+	str	x0, [x21, #:lo12:.LANCHOR167]
+.L2859:
 	ldrb	w0, [x24, #:lo12:.LANCHOR45]
-	tbz	x0, 2, .L2867
-	ldr	x0, [x26, #:lo12:.LANCHOR27]
+	tbz	x0, 2, .L2861
+	ldr	x0, [x23, #:lo12:.LANCHOR27]
 	ldrb	w0, [x0, 19]
-	cbz	w0, .L2867
-	adrp	x0, .LANCHOR198
-	ldrb	w1, [x0, #:lo12:.LANCHOR198]
+	cbz	w0, .L2861
+	adrp	x0, .LANCHOR201
+	ldrb	w1, [x0, #:lo12:.LANCHOR201]
 	adrp	x0, .LANCHOR2
 	ldrh	w0, [x0, #:lo12:.LANCHOR2]
 	mul	w1, w1, w0
 	mov	w0, 0
 	bl	flash_ddr_para_scan
 	ldrb	w0, [x22, #:lo12:.LANCHOR21]
-	cbnz	w0, .L2867
-	ldr	x0, [x26, #:lo12:.LANCHOR27]
+	cbnz	w0, .L2861
+	ldr	x0, [x23, #:lo12:.LANCHOR27]
 	strb	wzr, [x0, 19]
 	bl	flash_info_flush
-.L2867:
+.L2861:
 	ldr	w0, [x20, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2869
-	adrp	x2, .LANCHOR200
-	adrp	x0, .LC92
-	add	x2, x2, :lo12:.LANCHOR200
-	mov	w1, 2740
-	add	x0, x0, :lo12:.LC92
+	tbz	x0, 12, .L2863
+	adrp	x2, .LANCHOR203
+	adrp	x0, .LC91
+	add	x2, x2, :lo12:.LANCHOR203
+	mov	w1, 2935
+	add	x0, x0, :lo12:.LC91
 	bl	printf
-.L2869:
+.L2863:
 	bl	nand_flash_print_info
 	mov	w19, 0
-	b	.L2832
+	b	.L2825
 	.size	nand_flash_init, .-nand_flash_init
 	.section	.text.ftl_sysblk_dump,"ax",@progbits
 	.align	2
@@ -18188,32 +18164,32 @@ ftl_sysblk_dump:
 	bl	buf_alloc
 	ldr	x28, [x0, 8]
 	adrp	x26, .LANCHOR105
-	adrp	x27, .LANCHOR125
+	adrp	x27, .LANCHOR126
 	mov	x24, x0
 	add	x25, x25, :lo12:.LANCHOR87
 	add	x26, x26, :lo12:.LANCHOR105
-	add	x27, x27, :lo12:.LANCHOR125
+	add	x27, x27, :lo12:.LANCHOR126
 	mov	w19, 0
-.L2906:
+.L2901:
 	ldrh	w0, [x25]
 	cmp	w0, w19
-	bhi	.L2908
+	bhi	.L2903
 	add	x1, x28, 704
 	mov	w3, 32
 	mov	w2, 4
-	adrp	x0, .LC177
-	add	x0, x0, :lo12:.LC177
+	adrp	x0, .LC176
+	add	x0, x0, :lo12:.LC176
 	bl	rknand_print_hex
 	mov	x0, x24
 	bl	zbuf_free
-	cbz	w20, .L2909
-	adrp	x1, .LANCHOR206
+	cbz	w20, .L2904
+	adrp	x1, .LANCHOR208
 	adrp	x0, .LC0
-	mov	w2, 1422
-	add	x1, x1, :lo12:.LANCHOR206
+	mov	w2, 1432
+	add	x1, x1, :lo12:.LANCHOR208
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2909:
+.L2904:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
@@ -18223,7 +18199,7 @@ ftl_sysblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 144
 	ret
-.L2908:
+.L2903:
 	ldrh	w21, [x26]
 	ldrb	w3, [x27]
 	ldr	x1, [x24, 8]
@@ -18252,13 +18228,13 @@ ftl_sysblk_dump:
 	mov	w1, w23
 	ldp	w5, w6, [x0]
 	ldr	w7, [x0, 8]
-	adrp	x0, .LC163
-	add	x0, x0, :lo12:.LC163
+	adrp	x0, .LC167
+	add	x0, x0, :lo12:.LC167
 	bl	printf
 	cmp	w22, 512
 	ccmn	w22, #1, 4, ne
 	csinc	w20, w20, wzr, ne
-	b	.L2906
+	b	.L2901
 	.size	ftl_sysblk_dump, .-ftl_sysblk_dump
 	.section	.text.dump_ftl_info,"ax",@progbits
 	.align	2
@@ -18269,32 +18245,32 @@ dump_ftl_info:
 	adrp	x0, .LANCHOR54
 	add	x29, sp, 0
 	ldrb	w1, [x0, #:lo12:.LANCHOR54]
-	adrp	x0, .LC178
+	adrp	x0, .LC177
 	stp	x19, x20, [sp, 16]
-	add	x0, x0, :lo12:.LC178
+	add	x0, x0, :lo12:.LC177
 	stp	x21, x22, [sp, 32]
 	adrp	x22, .LANCHOR104
 	adrp	x19, .LANCHOR10
 	adrp	x20, .LANCHOR87
 	bl	printf
 	adrp	x21, .LANCHOR6
-	adrp	x0, .LANCHOR182
-	add	x1, x0, :lo12:.LANCHOR182
+	adrp	x0, .LANCHOR185
+	add	x1, x0, :lo12:.LANCHOR185
 	ldrh	w3, [x1, 2]
 	ldrb	w2, [x1, 1]
-	ldrb	w1, [x0, #:lo12:.LANCHOR182]
-	adrp	x0, .LC179
-	add	x0, x0, :lo12:.LC179
+	ldrb	w1, [x0, #:lo12:.LANCHOR185]
+	adrp	x0, .LC178
+	add	x0, x0, :lo12:.LC178
 	bl	printf
 	ldr	x0, [x22, #:lo12:.LANCHOR104]
 	ldrh	w2, [x0, 140]
 	ldrh	w1, [x0, 130]
-	adrp	x0, .LC180
-	add	x0, x0, :lo12:.LC180
+	adrp	x0, .LC179
+	add	x0, x0, :lo12:.LC179
 	bl	printf
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
-	adrp	x0, .LC181
-	add	x0, x0, :lo12:.LC181
+	adrp	x0, .LC180
+	add	x0, x0, :lo12:.LC180
 	ldrh	w5, [x1, 26]
 	ldrh	w4, [x1, 22]
 	ldrb	w3, [x1, 21]
@@ -18302,8 +18278,8 @@ dump_ftl_info:
 	ldrh	w1, [x1, 16]
 	bl	printf
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
-	adrp	x0, .LC182
-	add	x0, x0, :lo12:.LC182
+	adrp	x0, .LC181
+	add	x0, x0, :lo12:.LC181
 	ldrh	w5, [x1, 58]
 	ldrh	w4, [x1, 54]
 	ldrb	w3, [x1, 53]
@@ -18312,8 +18288,8 @@ dump_ftl_info:
 	bl	printf
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
 	adrp	x19, .LANCHOR80
-	adrp	x0, .LC183
-	add	x0, x0, :lo12:.LC183
+	adrp	x0, .LC182
+	add	x0, x0, :lo12:.LC182
 	ldrh	w5, [x1, 90]
 	ldrh	w4, [x1, 86]
 	ldrb	w3, [x1, 85]
@@ -18326,21 +18302,21 @@ dump_ftl_info:
 	mul	w3, w3, w0
 	adrp	x0, .LANCHOR111
 	ldr	x1, [x0, #:lo12:.LANCHOR111]
-	adrp	x0, .LC184
+	adrp	x0, .LC183
 	lsl	w3, w3, 1
-	add	x0, x0, :lo12:.LC184
+	add	x0, x0, :lo12:.LC183
 	bl	rknand_print_hex
 	adrp	x0, .LANCHOR9
 	ldrh	w3, [x21, #:lo12:.LANCHOR6]
 	mov	w2, 2
 	ldr	x1, [x0, #:lo12:.LANCHOR9]
-	adrp	x0, .LC185
-	add	x0, x0, :lo12:.LC185
+	adrp	x0, .LC184
+	add	x0, x0, :lo12:.LC184
 	bl	rknand_print_hex
 	ldr	x1, [x22, #:lo12:.LANCHOR104]
 	mov	w2, 4
-	adrp	x0, .LC177
-	add	x0, x0, :lo12:.LC177
+	adrp	x0, .LC176
+	add	x0, x0, :lo12:.LC176
 	add	x1, x1, 704
 	ldrh	w3, [x1, -6]
 	bl	rknand_print_hex
@@ -18348,15 +18324,15 @@ dump_ftl_info:
 	ldrh	w3, [x21, #:lo12:.LANCHOR6]
 	mov	w2, 4
 	ldr	x1, [x0, #:lo12:.LANCHOR7]
-	adrp	x0, .LC186
-	add	x0, x0, :lo12:.LC186
+	adrp	x0, .LC185
+	add	x0, x0, :lo12:.LC185
 	bl	rknand_print_hex
 	mov	w3, 256
 	mov	w2, 2
 	adrp	x1, .LANCHOR110
-	adrp	x0, .LC187
+	adrp	x0, .LC186
 	add	x1, x1, :lo12:.LANCHOR110
-	add	x0, x0, :lo12:.LC187
+	add	x0, x0, :lo12:.LC186
 	bl	rknand_print_hex
 	ldrb	w0, [x19, #:lo12:.LANCHOR80]
 	mov	w2, 2
@@ -18368,8 +18344,8 @@ dump_ftl_info:
 	ldp	x29, x30, [sp], 48
 	lsl	w3, w3, 1
 	ldr	x1, [x0, #:lo12:.LANCHOR112]
-	adrp	x0, .LC188
-	add	x0, x0, :lo12:.LC188
+	adrp	x0, .LC187
+	add	x0, x0, :lo12:.LC187
 	b	rknand_print_hex
 	.size	dump_ftl_info, .-dump_ftl_info
 	.section	.text.pm_ppa_update_check,"ax",@progbits
@@ -18399,20 +18375,20 @@ pm_ppa_update_check:
 	ubfx	x3, x3, 5, 3
 	cmp	w3, 1
 	ccmp	w3, 7, 4, ne
-	bne	.L2920
+	bne	.L2915
 	mov	w3, w2
 	mov	w2, w1
 	mov	x1, x0
 	stp	x29, x30, [sp, -16]!
-	adrp	x0, .LC189
-	add	x0, x0, :lo12:.LC189
+	adrp	x0, .LC188
+	add	x0, x0, :lo12:.LC188
 	add	x29, sp, 0
 	bl	printf
 	bl	dump_ftl_info
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
-.L2920:
+.L2915:
 	mov	w0, 0
 	ret
 	.size	pm_ppa_update_check, .-pm_ppa_update_check
@@ -18429,139 +18405,146 @@ load_l2p_region:
 	stp	x23, x24, [sp, 48]
 	cmp	w21, 31
 	stp	x25, x26, [sp, 64]
-	bls	.L2926
-	adrp	x1, .LANCHOR207
+	bls	.L2921
+	adrp	x1, .LANCHOR209
 	adrp	x0, .LC0
 	mov	w2, 32
-	add	x1, x1, :lo12:.LANCHOR207
+	add	x1, x1, :lo12:.LANCHOR209
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2926:
+.L2921:
 	adrp	x20, .LANCHOR104
 	mov	x25, x20
 	ldr	x0, [x20, #:lo12:.LANCHOR104]
 	ldrh	w2, [x0, 698]
 	cmp	w2, w19
-	bcs	.L2927
+	bcs	.L2922
 	mov	w1, w19
-	adrp	x0, .LC190
-	add	x0, x0, :lo12:.LC190
+	adrp	x0, .LC189
+	add	x0, x0, :lo12:.LC189
 	bl	printf
-	adrp	x0, .LANCHOR208
+	adrp	x0, .LANCHOR210
 	mov	w1, 255
-	ldrh	w2, [x0, #:lo12:.LANCHOR208]
+	ldrh	w2, [x0, #:lo12:.LANCHOR210]
 	mov	x0, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
 	ldr	x0, [x20, #:lo12:.LANCHOR104]
 	ldrh	w0, [x0, 698]
 	cmp	w0, w19
-	bcc	.L2928
-.L2938:
+	bcc	.L2923
+.L2933:
 	mov	w0, 0
-.L2925:
+.L2920:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2928:
+.L2923:
 	mov	w2, 36
-.L2939:
-	adrp	x1, .LANCHOR207
+.L2934:
+	adrp	x1, .LANCHOR209
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR207
+	add	x1, x1, :lo12:.LANCHOR209
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L2938
-.L2927:
+	b	.L2933
+.L2922:
 	add	x0, x0, x19, sxtw 2
-	adrp	x22, .LANCHOR134
-	add	x1, x22, :lo12:.LANCHOR134
+	adrp	x22, .LANCHOR135
+	add	x1, x22, :lo12:.LANCHOR135
 	ldr	w23, [x0, 704]
 	lsl	x0, x21, 4
 	add	x26, x1, x0
 	strh	w19, [x1, x0]
 	strh	wzr, [x26, 2]
-	cbnz	w23, .L2930
+	cbnz	w23, .L2925
 	mov	w1, w19
 	mov	w2, 0
-	adrp	x0, .LC191
-	add	x0, x0, :lo12:.LC191
+	adrp	x0, .LC190
+	add	x0, x0, :lo12:.LC190
 	bl	printf
-	adrp	x0, .LANCHOR208
+	adrp	x0, .LANCHOR210
 	mov	w1, 255
-	ldrh	w2, [x0, #:lo12:.LANCHOR208]
+	ldrh	w2, [x0, #:lo12:.LANCHOR210]
 	ldr	x0, [x26, 8]
 	bl	ftl_memset
-	b	.L2938
-.L2930:
-	adrp	x20, .LANCHOR191
-	adrp	x24, .LANCHOR125
+	b	.L2933
+.L2925:
+	adrp	x20, .LANCHOR197
+	adrp	x24, .LANCHOR126
 	ldr	x1, [x26, 8]
 	mov	w0, w23
-	ldr	x2, [x20, #:lo12:.LANCHOR191]
-	ldrb	w3, [x24, #:lo12:.LANCHOR125]
+	ldr	x2, [x20, #:lo12:.LANCHOR197]
+	ldrb	w3, [x24, #:lo12:.LANCHOR126]
 	bl	ftl_read_ppa_page
-	ldr	x1, [x20, #:lo12:.LANCHOR191]
+	ldr	x1, [x20, #:lo12:.LANCHOR197]
 	ldr	w2, [x1]
 	cmp	w2, w19
-	bne	.L2931
+	bne	.L2926
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2931
-.L2934:
-	ldr	x0, [x20, #:lo12:.LANCHOR191]
+	beq	.L2926
+.L2930:
+	ldr	x0, [x20, #:lo12:.LANCHOR197]
 	ldr	w0, [x0]
 	cmp	w19, w0
-	beq	.L2938
-	mov	w2, 63
-	b	.L2939
-.L2931:
+	beq	.L2933
+	mov	w2, 67
+	b	.L2934
+.L2926:
 	mov	w4, w23
 	mov	w3, w0
 	mov	w1, w19
-	adrp	x0, .LC192
-	add	x0, x0, :lo12:.LC192
+	adrp	x0, .LC191
+	add	x0, x0, :lo12:.LC191
 	bl	printf
 	ldr	x1, [x25, #:lo12:.LANCHOR104]
-	add	x22, x22, :lo12:.LANCHOR134
+	add	x22, x22, :lo12:.LANCHOR135
 	add	x21, x22, x21, lsl 4
 	mov	w2, 4
 	add	x1, x1, 704
-	adrp	x0, .LC193
-	add	x0, x0, :lo12:.LC193
+	adrp	x0, .LC192
+	add	x0, x0, :lo12:.LC192
 	ldrh	w3, [x1, -6]
 	bl	rknand_print_hex
 	ldr	x1, [x21, 8]
 	mov	w2, 4
-	ldrb	w3, [x24, #:lo12:.LANCHOR125]
-	adrp	x0, .LC194
-	add	x0, x0, :lo12:.LC194
+	ldrb	w3, [x24, #:lo12:.LANCHOR126]
+	adrp	x0, .LC193
+	add	x0, x0, :lo12:.LC193
 	lsl	w3, w3, 7
 	bl	rknand_print_hex
-	ldr	x1, [x20, #:lo12:.LANCHOR191]
+	ldr	x1, [x20, #:lo12:.LANCHOR197]
 	mov	w3, 16
 	mov	w2, 4
-	adrp	x0, .LC195
-	add	x0, x0, :lo12:.LC195
+	adrp	x0, .LC194
+	add	x0, x0, :lo12:.LC194
 	bl	rknand_print_hex
-	ldr	x1, [x21, 8]
+	ldrb	w3, [x24, #:lo12:.LANCHOR126]
 	mov	w0, w23
-	ldrb	w3, [x24, #:lo12:.LANCHOR125]
-	ldr	x2, [x20, #:lo12:.LANCHOR191]
+	ldr	x2, [x20, #:lo12:.LANCHOR197]
+	ldr	x1, [x21, 8]
 	bl	ftl_read_ppa_page
-	ldr	x1, [x20, #:lo12:.LANCHOR191]
-	ldr	w1, [x1]
-	cmp	w19, w1
-	bne	.L2936
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L2934
-.L2936:
+	bne	.L2929
+	adrp	x0, .LANCHOR210
+	mov	w1, 255
+	ldrh	w2, [x0, #:lo12:.LANCHOR210]
+	ldr	x0, [x21, 8]
+	bl	ftl_memset
+.L2931:
 	mov	w0, -1
-	b	.L2925
+	b	.L2920
+.L2929:
+	ldr	x0, [x20, #:lo12:.LANCHOR197]
+	ldr	w0, [x0]
+	cmp	w19, w0
+	beq	.L2930
+	b	.L2931
 	.size	load_l2p_region, .-load_l2p_region
 	.section	.text.pm_gc,"ax",@progbits
 	.align	2
@@ -18573,40 +18556,40 @@ pm_gc:
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR104
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR146
+	adrp	x21, .LANCHOR148
 	ldr	x0, [x19, #:lo12:.LANCHOR104]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	ldrh	w2, [x0, 688]
-	adrp	x0, .LANCHOR149
+	adrp	x0, .LANCHOR151
 	str	x27, [sp, 80]
 	mov	x20, x0
-	ldrh	w1, [x0, #:lo12:.LANCHOR149]
+	ldrh	w1, [x0, #:lo12:.LANCHOR151]
 	sub	w1, w1, #1
 	cmp	w2, w1
-	bge	.L2941
-	ldr	w0, [x21, #:lo12:.LANCHOR146]
-	cbz	w0, .L2942
-.L2941:
+	bge	.L2936
+	ldr	w0, [x21, #:lo12:.LANCHOR148]
+	cbz	w0, .L2937
+.L2936:
 	bl	pm_free_sblk
 	ldr	x2, [x19, #:lo12:.LANCHOR104]
-	ldrh	w1, [x20, #:lo12:.LANCHOR149]
+	ldrh	w1, [x20, #:lo12:.LANCHOR151]
 	sub	w1, w1, #1
 	ldrh	w3, [x2, 688]
 	cmp	w3, w1
-	bge	.L2943
-	ldr	w1, [x21, #:lo12:.LANCHOR146]
-	cbz	w1, .L2942
-.L2943:
+	bge	.L2938
+	ldr	w1, [x21, #:lo12:.LANCHOR148]
+	cbz	w1, .L2937
+.L2938:
 	add	x0, x2, x0, uxth 1
-	str	wzr, [x21, #:lo12:.LANCHOR146]
+	str	wzr, [x21, #:lo12:.LANCHOR148]
 	mov	w20, 65535
 	ldrh	w21, [x0, 416]
 	cmp	w21, w20
-	bne	.L2945
-	adrp	x1, .LANCHOR209
-	add	x1, x1, :lo12:.LANCHOR209
-	mov	w2, 162
+	bne	.L2940
+	adrp	x1, .LANCHOR211
+	add	x1, x1, :lo12:.LANCHOR211
+	mov	w2, 166
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -18615,41 +18598,41 @@ pm_gc:
 	add	x0, x1, x0, uxth 1
 	ldrh	w21, [x0, 416]
 	cmp	w21, w20
-	beq	.L2942
-.L2945:
+	beq	.L2937
+.L2940:
 	bl	pm_select_ram_region
 	and	x22, x0, 65535
 	lsl	x0, x22, 4
-	adrp	x20, .LANCHOR134
-	add	x1, x20, :lo12:.LANCHOR134
+	adrp	x20, .LANCHOR135
+	add	x1, x20, :lo12:.LANCHOR135
 	mov	x25, x22
 	add	x23, x1, x0
 	ldrh	w0, [x1, x0]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L2946
+	beq	.L2941
 	ldr	x1, [x23, 8]
-	cbz	x1, .L2946
+	cbz	x1, .L2941
 	ldrsh	w2, [x23, 2]
-	tbz	w2, #31, .L2946
+	tbz	w2, #31, .L2941
 	bl	pm_write_page
 	ldrh	w0, [x23, 2]
 	and	w0, w0, 32767
 	strh	w0, [x23, 2]
-.L2946:
+.L2941:
 	adrp	x23, .LANCHOR68
 	adrp	x24, .LANCHOR31
 	add	x23, x23, :lo12:.LANCHOR68
 	add	x24, x24, :lo12:.LANCHOR31
 	mov	w27, 0
 	mov	w26, 24
-.L2947:
+.L2942:
 	ldr	x2, [x19, #:lo12:.LANCHOR104]
 	ldrh	w0, [x2, 698]
 	cmp	w0, w27
-	bhi	.L2950
+	bhi	.L2945
 	bl	pm_free_sblk
-.L2942:
+.L2937:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -18658,7 +18641,7 @@ pm_gc:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2950:
+.L2945:
 	ldrb	w0, [x24]
 	add	x2, x2, x27, sxtw 2
 	ldrh	w3, [x23]
@@ -18674,25 +18657,25 @@ pm_gc:
 	ldrb	w1, [x1, #:lo12:.LANCHOR69]
 	udiv	w0, w0, w1
 	cmp	w21, w0, uxth
-	bne	.L2948
+	bne	.L2943
 	mov	w1, w25
 	mov	w0, w27
 	bl	load_l2p_region
-	cbnz	w0, .L2949
-	add	x0, x20, :lo12:.LANCHOR134
+	cbnz	w0, .L2944
+	add	x0, x20, :lo12:.LANCHOR135
 	add	x0, x0, x22, lsl 4
 	ldr	x1, [x0, 8]
 	mov	w0, w27
 	bl	pm_write_page
-.L2949:
-	add	x1, x20, :lo12:.LANCHOR134
+.L2944:
+	add	x1, x20, :lo12:.LANCHOR135
 	lsl	x0, x22, 4
 	mov	w2, -1
 	strh	w2, [x1, x0]
-.L2948:
+.L2943:
 	add	w27, w27, 1
 	and	w27, w27, 65535
-	b	.L2947
+	b	.L2942
 	.size	pm_gc, .-pm_gc
 	.section	.text.pm_flush_id,"ax",@progbits
 	.align	2
@@ -18701,8 +18684,8 @@ pm_gc:
 pm_flush_id:
 	stp	x29, x30, [sp, -32]!
 	ubfiz	x0, x0, 4, 16
-	adrp	x2, .LANCHOR134
-	add	x2, x2, :lo12:.LANCHOR134
+	adrp	x2, .LANCHOR135
+	add	x2, x2, :lo12:.LANCHOR135
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	add	x19, x2, x0
@@ -18712,12 +18695,12 @@ pm_flush_id:
 	ldrh	w0, [x19, 2]
 	and	w0, w0, 32767
 	strh	w0, [x19, 2]
-	adrp	x19, .LANCHOR132
-	ldr	w0, [x19, #:lo12:.LANCHOR132]
-	cbz	w0, .L2959
+	adrp	x19, .LANCHOR133
+	ldr	w0, [x19, #:lo12:.LANCHOR133]
+	cbz	w0, .L2954
 	bl	pm_gc
-	str	wzr, [x19, #:lo12:.LANCHOR132]
-.L2959:
+	str	wzr, [x19, #:lo12:.LANCHOR133]
+.L2954:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -18731,21 +18714,21 @@ pm_flush:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR134
-	add	x19, x19, :lo12:.LANCHOR134
+	adrp	x19, .LANCHOR135
+	add	x19, x19, :lo12:.LANCHOR135
 	mov	w20, 0
 	add	x19, x19, 2
-.L2966:
+.L2961:
 	ldrsh	w0, [x19]
-	tbz	w0, #31, .L2965
+	tbz	w0, #31, .L2960
 	mov	w0, w20
 	bl	pm_flush_id
-.L2965:
+.L2960:
 	add	w20, w20, 1
 	add	x19, x19, 16
 	and	w20, w20, 65535
 	cmp	w20, 32
-	bne	.L2966
+	bne	.L2961
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -18794,101 +18777,102 @@ pm_init:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	mov	w24, w0
-	adrp	x0, .LANCHOR146
+	adrp	x0, .LANCHOR148
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	adrp	x19, .LANCHOR134
-	str	wzr, [x0, #:lo12:.LANCHOR146]
-	adrp	x0, .LANCHOR132
+	adrp	x19, .LANCHOR135
+	str	wzr, [x0, #:lo12:.LANCHOR148]
+	adrp	x0, .LANCHOR133
 	stp	x25, x26, [sp, 64]
-	add	x21, x19, :lo12:.LANCHOR134
-	str	wzr, [x0, #:lo12:.LANCHOR132]
-	adrp	x0, .LANCHOR192
+	add	x20, x19, :lo12:.LANCHOR135
+	str	wzr, [x0, #:lo12:.LANCHOR133]
+	adrp	x0, .LANCHOR198
 	stp	x27, x28, [sp, 80]
-	mov	x20, x19
-	strb	w1, [x0, #:lo12:.LANCHOR192]
+	adrp	x22, .LANCHOR126
+	strb	w1, [x0, #:lo12:.LANCHOR198]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x19, .LANCHOR125
-	adrp	x1, .LANCHOR191
-	add	x23, x21, 512
-	mov	x22, x1
-	add	x19, x19, :lo12:.LANCHOR125
-	str	x0, [x1, #:lo12:.LANCHOR191]
+	add	x23, x20, 512
+	adrp	x1, .LANCHOR197
+	add	x22, x22, :lo12:.LANCHOR126
+	mov	x21, x1
 	mov	w25, -1
-.L2976:
-	strh	w25, [x21]
-	strh	wzr, [x21, 2]
-	cbz	w24, .L2975
-	ldrb	w0, [x19]
+	str	x0, [x1, #:lo12:.LANCHOR197]
+.L2971:
+	strh	w25, [x20]
+	strh	wzr, [x20, 2]
+	cbz	w24, .L2970
+	ldrb	w0, [x22]
 	lsl	w0, w0, 9
 	bl	ftl_malloc
-	str	x0, [x21, 8]
-.L2975:
-	add	x21, x21, 16
-	cmp	x21, x23
-	bne	.L2976
-	add	x0, x20, :lo12:.LANCHOR134
-	adrp	x19, .LANCHOR104
-	ldr	x24, [x22, #:lo12:.LANCHOR191]
+	str	x0, [x20, 8]
+.L2970:
+	add	x20, x20, 16
+	cmp	x20, x23
+	bne	.L2971
+	add	x0, x19, :lo12:.LANCHOR135
+	adrp	x20, .LANCHOR104
+	ldr	x22, [x21, #:lo12:.LANCHOR197]
 	mov	w4, 4
-	ldr	x25, [x0, 8]
-	mov	x3, x24
-	ldr	x0, [x19, #:lo12:.LANCHOR104]
-	mov	x2, x25
+	ldr	x27, [x0, 8]
+	mov	x3, x22
+	ldr	x0, [x20, #:lo12:.LANCHOR104]
+	mov	x2, x27
 	ldrh	w1, [x0, 692]
 	ldrb	w0, [x0, 694]
 	bl	flash_get_last_written_page
 	sxth	w26, w0
-	ldr	x0, [x19, #:lo12:.LANCHOR104]
-	mov	w23, w26
+	ldr	x0, [x20, #:lo12:.LANCHOR104]
+	mov	w24, w26
 	ldrh	w2, [x0, 696]
 	cmp	w2, w26
-	bgt	.L2977
+	bgt	.L2972
 	ldrh	w1, [x0, 692]
 	mov	w3, w26
-	adrp	x0, .LC196
-	add	x0, x0, :lo12:.LC196
-	adrp	x27, .LANCHOR105
-	adrp	x28, .LANCHOR125
-	add	x27, x27, :lo12:.LANCHOR105
-	add	x28, x28, :lo12:.LANCHOR125
+	adrp	x0, .LC195
+	add	x0, x0, :lo12:.LC195
+	adrp	x25, .LANCHOR126
+	add	x25, x25, :lo12:.LANCHOR126
+	adrp	x28, .LC196
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR104]
+	ldr	x0, [x20, #:lo12:.LANCHOR104]
 	ldrsh	w21, [x0, 696]
-.L2978:
+	adrp	x0, .LANCHOR105
+	add	x0, x0, :lo12:.LANCHOR105
+	str	x0, [x29, 104]
+.L2973:
 	cmp	w21, w26
-	ble	.L2980
-	adrp	x0, .LANCHOR185
+	ble	.L2976
+	adrp	x0, .LANCHOR188
 	mov	w1, 1
-	add	w23, w23, 1
-	strb	w1, [x0, #:lo12:.LANCHOR185]
-	ldr	x0, [x19, #:lo12:.LANCHOR104]
-	strh	w23, [x0, 696]
+	add	w24, w24, 1
+	strb	w1, [x0, #:lo12:.LANCHOR188]
+	ldr	x0, [x20, #:lo12:.LANCHOR104]
+	strh	w24, [x0, 696]
 	bl	pm_free_sblk
-.L2977:
-	add	x20, x20, :lo12:.LANCHOR134
-	adrp	x0, .LANCHOR208
+.L2972:
+	add	x19, x19, :lo12:.LANCHOR135
+	adrp	x0, .LANCHOR210
 	mov	w1, 255
-	ldrh	w2, [x0, #:lo12:.LANCHOR208]
-	ldr	x0, [x20, 8]
+	ldrh	w2, [x0, #:lo12:.LANCHOR210]
+	ldr	x0, [x19, 8]
 	bl	ftl_memset
-	ldr	x1, [x20, 8]
+	ldr	x1, [x19, 8]
 	mov	w0, -1
 	bl	pm_write_page
-	adrp	x0, .LANCHOR185
-	ldrb	w0, [x0, #:lo12:.LANCHOR185]
-	cbz	w0, .L2981
-	ldr	x1, [x20, 8]
+	adrp	x0, .LANCHOR188
+	ldrb	w0, [x0, #:lo12:.LANCHOR188]
+	cbz	w0, .L2977
+	ldr	x1, [x19, 8]
 	mov	w0, -1
 	bl	pm_write_page
-	ldr	x1, [x20, 8]
+	ldr	x1, [x19, 8]
 	mov	w0, -1
 	bl	pm_write_page
-	ldr	x1, [x20, 8]
+	ldr	x1, [x19, 8]
 	mov	w0, -1
 	bl	pm_write_page
-.L2981:
+.L2977:
 	bl	pm_free_sblk
 	bl	pm_gc
 	mov	w0, 0
@@ -18899,44 +18883,58 @@ pm_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2980:
-	ldr	x0, [x19, #:lo12:.LANCHOR104]
-	mov	x3, x24
-	ldrh	w1, [x27]
-	mov	x2, x25
-	ldrb	w4, [x28]
-	ldrh	w22, [x0, 692]
+.L2976:
+	ldr	x0, [x20, #:lo12:.LANCHOR104]
+	mov	x3, x22
+	ldr	x1, [x29, 104]
+	mov	x2, x27
+	ldrb	w4, [x25]
+	ldrh	w23, [x0, 692]
+	ldrh	w1, [x1]
 	ldrb	w0, [x0, 694]
-	madd	w22, w22, w1, w21
-	mov	w1, w22
+	madd	w23, w23, w1, w21
+	mov	w1, w23
 	bl	flash_read_page_en
 	mov	w4, w0
-	ldr	x0, [x19, #:lo12:.LANCHOR104]
-	str	w4, [x29, 108]
-	mov	w2, w22
+	ldr	x0, [x20, #:lo12:.LANCHOR104]
+	str	w4, [x29, 100]
+	mov	w2, w23
 	ldr	w1, [x0, 48]
 	ldrh	w3, [x0, 694]
 	add	w1, w1, 1
 	str	w1, [x0, 48]
-	adrp	x0, .LC197
-	add	x0, x0, :lo12:.LC197
-	ldr	w1, [x24]
+	add	x0, x28, :lo12:.LC196
+	ldr	w1, [x22]
 	bl	printf
-	ldr	w4, [x29, 108]
+	ldr	w4, [x29, 100]
 	cmp	w4, 512
 	ccmn	w4, #1, 4, ne
-	beq	.L2979
-	ldr	x1, [x19, #:lo12:.LANCHOR104]
-	ldr	w0, [x24]
-	ldrh	w2, [x1, 698]
-	cmp	w0, w2
-	bcs	.L2979
-	add	x0, x1, x0, uxtw 2
-	str	w22, [x0, 704]
-.L2979:
+	beq	.L2974
+	ldr	x8, [x20, #:lo12:.LANCHOR104]
+	ldr	w6, [x22]
+	ldrh	w0, [x8, 698]
+	cmp	w6, w0
+	bcs	.L2974
+	ldr	w7, [x22, 8]
+	cbz	w7, .L2975
+	ldrb	w1, [x25]
+	mov	x0, x27
+	lsl	w1, w1, 9
+	bl	js_hash
+	cmp	w7, w0
+	beq	.L2975
+	adrp	x0, .LC197
+	mov	w1, w7
+	add	x0, x0, :lo12:.LC197
+	bl	printf
+.L2974:
 	add	w21, w21, 1
 	sxth	w21, w21
-	b	.L2978
+	b	.L2973
+.L2975:
+	add	x6, x8, x6, uxtw 2
+	str	w23, [x6, 704]
+	b	.L2974
 	.size	pm_init, .-pm_init
 	.section	.text.pm_log2phys,"ax",@progbits
 	.align	2
@@ -18947,24 +18945,24 @@ pm_log2phys:
 	add	x29, sp, 0
 	stp	x25, x26, [sp, 64]
 	mov	w25, w0
-	adrp	x0, .LANCHOR122
+	adrp	x0, .LANCHOR123
 	stp	x23, x24, [sp, 48]
 	stp	x19, x20, [sp, 16]
 	mov	w24, w2
 	stp	x21, x22, [sp, 32]
 	mov	x23, x1
-	ldr	w2, [x0, #:lo12:.LANCHOR122]
+	ldr	w2, [x0, #:lo12:.LANCHOR123]
 	str	x27, [sp, 80]
 	cmp	w25, w2
-	bcc	.L2994
+	bcc	.L2993
 	mov	w1, w25
 	adrp	x0, .LC198
 	add	x0, x0, :lo12:.LC198
 	bl	printf
 	mov	w0, -1
-	cbnz	w24, .L2993
+	cbnz	w24, .L2992
 	str	w0, [x23]
-.L2993:
+.L2992:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -18972,28 +18970,28 @@ pm_log2phys:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2994:
-	adrp	x0, .LANCHOR125
-	adrp	x21, .LANCHOR134
+.L2993:
+	adrp	x0, .LANCHOR126
+	adrp	x21, .LANCHOR135
 	mov	x19, 0
-	ldrb	w20, [x0, #:lo12:.LANCHOR125]
-	add	x0, x21, :lo12:.LANCHOR134
+	ldrb	w20, [x0, #:lo12:.LANCHOR126]
+	add	x0, x21, :lo12:.LANCHOR135
 	add	x0, x0, 8
 	lsl	w22, w20, 7
 	udiv	w22, w25, w22
 	and	w26, w22, 65535
-.L3000:
+.L2999:
 	ldr	x1, [x0]
-	cbz	x1, .L2996
+	cbz	x1, .L2995
 	ldrh	w1, [x0, -8]
 	cmp	w1, w26
-	bne	.L2996
-.L2997:
+	bne	.L2995
+.L2996:
 	ubfiz	w20, w20, 7, 9
 	msub	w25, w26, w20, w25
 	and	x25, x25, 65535
-	cbnz	w24, .L2998
-	add	x0, x21, :lo12:.LANCHOR134
+	cbnz	w24, .L2997
+	add	x0, x21, :lo12:.LANCHOR135
 	adrp	x1, .LANCHOR31
 	add	x0, x0, x19, lsl 4
 	mov	w2, 24
@@ -19010,23 +19008,23 @@ pm_log2phys:
 	adrp	x1, .LANCHOR106
 	ldrb	w1, [x1, #:lo12:.LANCHOR106]
 	cmp	w0, w1
-	bcc	.L2999
+	bcc	.L2998
 	mov	w0, -1
 	str	w0, [x23]
-.L2999:
-	add	x21, x21, :lo12:.LANCHOR134
+.L2998:
+	add	x21, x21, :lo12:.LANCHOR135
 	add	x19, x21, x19, lsl 4
 	ldrh	w0, [x19, 2]
 	mvn	x1, x0
 	tst	x1, 32767
-	beq	.L3003
+	beq	.L3002
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L3003:
+.L3002:
 	mov	w0, 0
-	b	.L2993
-.L2998:
-	add	x0, x21, :lo12:.LANCHOR134
+	b	.L2992
+.L2997:
+	add	x0, x21, :lo12:.LANCHOR135
 	ldr	w2, [x23]
 	add	x0, x0, x19, lsl 4
 	ldr	x1, [x0, 8]
@@ -19034,35 +19032,35 @@ pm_log2phys:
 	ldrh	w1, [x0, 2]
 	orr	w1, w1, -32768
 	strh	w1, [x0, 2]
-	adrp	x0, .LANCHOR135
-	strb	w22, [x0, #:lo12:.LANCHOR135]
-	b	.L2999
-.L2996:
+	adrp	x0, .LANCHOR136
+	strb	w22, [x0, #:lo12:.LANCHOR136]
+	b	.L2998
+.L2995:
 	add	w19, w19, 1
 	add	x0, x0, 16
 	and	x19, x19, 65535
 	cmp	w19, 32
-	bne	.L3000
+	bne	.L2999
 	bl	pm_select_ram_region
 	and	x19, x0, 65535
 	sbfiz	x1, x19, 4, 32
-	add	x2, x21, :lo12:.LANCHOR134
+	add	x2, x21, :lo12:.LANCHOR135
 	add	x3, x2, x1
 	mov	w27, w0
 	ldrh	w2, [x2, x1]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L3001
+	beq	.L3000
 	ldrsh	w1, [x3, 2]
-	tbz	w1, #31, .L3001
+	tbz	w1, #31, .L3000
 	bl	pm_flush_id
-.L3001:
-	adrp	x0, .LANCHOR210
+.L3000:
+	adrp	x0, .LANCHOR212
 	mov	w1, w27
-	strb	w19, [x0, #:lo12:.LANCHOR210]
+	strb	w19, [x0, #:lo12:.LANCHOR212]
 	mov	w0, w26
 	bl	load_l2p_region
-	b	.L2997
+	b	.L2996
 	.size	pm_log2phys, .-pm_log2phys
 	.section	.text.gc_recovery,"ax",@progbits
 	.align	2
@@ -19078,10 +19076,10 @@ gc_recovery:
 	stp	x19, x20, [sp, 48]
 	ldr	x20, [x0, #:lo12:.LANCHOR10]
 	strb	wzr, [x1, #:lo12:.LANCHOR78]
-	adrp	x1, .LANCHOR153
+	adrp	x1, .LANCHOR155
 	stp	x27, x28, [sp, 112]
 	mov	x27, x0
-	strb	wzr, [x1, #:lo12:.LANCHOR153]
+	strb	wzr, [x1, #:lo12:.LANCHOR155]
 	add	x1, x20, 80
 	stp	x21, x22, [sp, 64]
 	str	x1, [x29, 168]
@@ -19089,7 +19087,7 @@ gc_recovery:
 	ldrh	w1, [x20, 80]
 	stp	x25, x26, [sp, 96]
 	cmp	w1, w2
-	beq	.L3010
+	beq	.L3009
 	mov	w0, -1
 	strh	w0, [x20, 130]
 	mov	w0, 1
@@ -19109,32 +19107,32 @@ gc_recovery:
 	ldrb	w2, [x0, #:lo12:.LANCHOR73]
 	str	x0, [x29, 160]
 	cmp	w2, 2
-	beq	.L3011
+	beq	.L3010
 	adrp	x0, .LANCHOR35
 	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbz	w0, .L3012
-.L3011:
+	cbz	w0, .L3011
+.L3010:
 	adrp	x0, .LANCHOR79
 	ldrh	w0, [x0, #:lo12:.LANCHOR79]
 	sub	w0, w0, #1
 	add	w0, w0, w1
 	orr	w2, w0, w2, lsl 24
 	str	w2, [x28, 40]
-.L3013:
+.L3012:
 	mov	w1, 1
 	mov	x0, x28
 	bl	sblk_read_page
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L3014
+	beq	.L3013
 	ldr	x0, [x28, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L3015
-.L3014:
+	beq	.L3014
+.L3013:
 	mov	x0, x28
 	bl	zbuf_free
 	ldr	x1, [x28, 24]
@@ -19161,15 +19159,15 @@ gc_recovery:
 	ldr	x0, [x27, #:lo12:.LANCHOR10]
 	ldrh	w1, [x20, 80]
 	strh	w1, [x0, 130]
-.L3016:
+.L3015:
 	ldrh	w0, [x20, 80]
 	adrp	x2, .LANCHOR9
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L3051
+	cbnz	w1, .L3050
 	bl	ftl_dump_write_open_sblk
-.L3051:
+.L3050:
 	ldrh	w1, [x20, 80]
 	mov	w2, w26
 	adrp	x0, .LC201
@@ -19183,9 +19181,9 @@ gc_recovery:
 	mov	w1, 65535
 	ldrh	w0, [x0, 130]
 	cmp	w0, w1
-	beq	.L3052
+	beq	.L3051
 	bl	ftl_free_sblk
-.L3052:
+.L3051:
 	adrp	x0, .LANCHOR104
 	ldr	x1, [x0, #:lo12:.LANCHOR104]
 	mov	w0, -1
@@ -19194,7 +19192,7 @@ gc_recovery:
 	strh	w0, [x1, 130]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L3009:
+.L3008:
 	ldp	x19, x20, [sp, 48]
 	ldp	x21, x22, [sp, 64]
 	ldp	x23, x24, [sp, 80]
@@ -19203,42 +19201,42 @@ gc_recovery:
 	ldp	x29, x30, [sp, 32]
 	add	sp, sp, 240
 	ret
-.L3012:
+.L3011:
 	cmp	w2, 3
-	bne	.L3013
+	bne	.L3012
 	adrp	x0, .LANCHOR87
 	ldrh	w0, [x0, #:lo12:.LANCHOR87]
 	sub	w0, w0, #1
 	add	w0, w0, w1
 	orr	w0, w0, 50331648
 	str	w0, [x28, 40]
-	b	.L3013
-.L3015:
+	b	.L3012
+.L3014:
 	adrp	x22, .LANCHOR79
 	adrp	x19, .LANCHOR80
-	adrp	x23, .LANCHOR155
+	adrp	x23, .LANCHOR157
 	ldr	x1, [x28, 8]
 	ldrb	w0, [x19, #:lo12:.LANCHOR80]
-	adrp	x25, .LANCHOR156
+	adrp	x25, .LANCHOR158
 	ldrh	w2, [x22, #:lo12:.LANCHOR79]
 	mul	w2, w2, w0
-	ldr	x0, [x23, #:lo12:.LANCHOR155]
+	ldr	x0, [x23, #:lo12:.LANCHOR157]
 	lsl	w2, w2, 2
 	bl	ftl_memcpy
 	str	x22, [x29, 152]
 	ldrb	w1, [x19, #:lo12:.LANCHOR80]
 	ldrh	w0, [x22, #:lo12:.LANCHOR79]
 	mul	w0, w0, w1
-	adrp	x1, .LANCHOR125
-	ldrb	w1, [x1, #:lo12:.LANCHOR125]
+	adrp	x1, .LANCHOR126
+	ldrb	w1, [x1, #:lo12:.LANCHOR126]
 	lsl	w2, w0, 2
 	cmp	w1, w0, lsr 6
-	bge	.L3017
+	bge	.L3016
 	lsl	w1, w1, 7
 	sub	w0, w1, w0
 	mov	w1, 0
 	lsl	w26, w0, 2
-	ldr	x0, [x25, #:lo12:.LANCHOR156]
+	ldr	x0, [x25, #:lo12:.LANCHOR158]
 	bl	ftl_memset
 	ldr	x0, [x29, 152]
 	mov	w2, w26
@@ -19247,11 +19245,11 @@ gc_recovery:
 	mul	w0, w0, w1
 	ldr	x1, [x28, 8]
 	add	x1, x1, x0, sxtw 2
-	ldr	x0, [x25, #:lo12:.LANCHOR156]
+	ldr	x0, [x25, #:lo12:.LANCHOR158]
 	bl	ftl_memcpy
 	mov	w0, 1
 	str	w0, [x29, 180]
-.L3018:
+.L3017:
 	adrp	x0, .LANCHOR87
 	ldrh	w0, [x0, #:lo12:.LANCHOR87]
 	str	w0, [x29, 184]
@@ -19259,46 +19257,46 @@ gc_recovery:
 	ldrb	w0, [x0, #:lo12:.LANCHOR73]
 	str	w0, [x29, 188]
 	cmp	w0, 2
-	bne	.L3019
+	bne	.L3018
 	adrp	x0, .LANCHOR74
 	ldrb	w0, [x0, #:lo12:.LANCHOR74]
-	cbz	w0, .L3020
-.L3019:
+	cbz	w0, .L3019
+.L3018:
 	adrp	x0, .LANCHOR35
 	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbz	w0, .L3021
-.L3020:
+	cbz	w0, .L3020
+.L3019:
 	ldp	w0, w1, [x29, 184]
 	mul	w0, w0, w1
 	str	w0, [x29, 184]
 	mov	w0, 1
 	str	w0, [x29, 188]
-.L3021:
+.L3020:
 	adrp	x24, .LC200
 	mov	w22, 0
 	add	x0, x24, :lo12:.LC200
 	mov	w19, 0
 	str	x0, [x29, 104]
-.L3022:
+.L3021:
 	sub	w0, w22, #1
 	str	w0, [x29, 136]
 	ldr	w0, [x29, 184]
 	cmp	w0, w22
-	bls	.L3034
+	bls	.L3033
 	adrp	x0, .LANCHOR35
 	mov	x21, 0
 	add	x0, x0, :lo12:.LANCHOR35
 	str	x0, [x29, 112]
-	b	.L3035
-.L3017:
+	b	.L3034
+.L3016:
 	ldr	x1, [x28, 8]
 	mov	w26, 0
 	add	x1, x1, x0, sxtw 2
-	ldr	x0, [x25, #:lo12:.LANCHOR156]
+	ldr	x0, [x25, #:lo12:.LANCHOR158]
 	bl	ftl_memcpy
 	str	wzr, [x29, 180]
-	b	.L3018
-.L3030:
+	b	.L3017
+.L3029:
 	ldp	x1, x0, [x29, 120]
 	ldrh	w0, [x0, 96]
 	ldrh	w1, [x1]
@@ -19307,16 +19305,16 @@ gc_recovery:
 	str	w0, [x29, 200]
 	ldrb	w1, [x1, #:lo12:.LANCHOR73]
 	cmp	w1, 2
-	beq	.L3023
+	beq	.L3022
 	ldr	x2, [x29, 112]
 	ldrb	w2, [x2]
-	cbz	w2, .L3024
-.L3023:
+	cbz	w2, .L3023
+.L3022:
 	ldr	w2, [x29, 136]
 	add	w0, w2, w0
 	add	w0, w0, w24
 	orr	w0, w0, w1, lsl 24
-.L3026:
+.L3025:
 	str	w0, [x28, 40]
 	mov	w1, 1
 	str	x8, [x29, 96]
@@ -19325,25 +19323,25 @@ gc_recovery:
 	ldr	w1, [x29, 180]
 	ldr	x0, [x28, 24]
 	ldr	x8, [x29, 96]
-	cbz	w1, .L3027
-	ldr	x1, [x25, #:lo12:.LANCHOR156]
+	cbz	w1, .L3026
+	ldr	x1, [x25, #:lo12:.LANCHOR158]
 	ldr	w2, [x1, x8]
-	cbnz	w2, .L3027
+	cbnz	w2, .L3026
 	ldr	w2, [x0, 8]
 	str	w2, [x1, x8]
-.L3027:
-	ldr	x1, [x23, #:lo12:.LANCHOR155]
+.L3026:
+	ldr	x1, [x23, #:lo12:.LANCHOR157]
 	ldr	w6, [x0, 4]
 	ldr	w3, [x1, x8]
 	cmp	w3, w6
-	bne	.L3028
-	ldr	x1, [x25, #:lo12:.LANCHOR156]
+	bne	.L3027
+	ldr	x1, [x25, #:lo12:.LANCHOR158]
 	ldr	w2, [x1, x8]
 	ldr	w1, [x0, 8]
 	cmp	w2, w1
-	beq	.L3029
-.L3028:
-	ldr	x1, [x25, #:lo12:.LANCHOR156]
+	beq	.L3028
+.L3027:
+	ldr	x1, [x25, #:lo12:.LANCHOR158]
 	ldr	w2, [x0, 12]
 	str	w2, [sp]
 	str	x8, [x29, 96]
@@ -19354,11 +19352,11 @@ gc_recovery:
 	ldr	w2, [x28, 52]
 	ldr	x0, [x29, 104]
 	bl	printf
-	ldr	x0, [x23, #:lo12:.LANCHOR155]
+	ldr	x0, [x23, #:lo12:.LANCHOR157]
 	ldr	x8, [x29, 96]
 	ldr	w0, [x0, x8]
 	cmn	w0, #1
-	beq	.L3029
+	beq	.L3028
 	mov	x0, x28
 	bl	zbuf_free
 	adrp	x0, .LANCHOR9
@@ -19368,27 +19366,27 @@ gc_recovery:
 	ldr	x0, [x27, #:lo12:.LANCHOR10]
 	ldrh	w1, [x20, 80]
 	strh	w1, [x0, 130]
-	b	.L3016
-.L3024:
+	b	.L3015
+.L3023:
 	cmp	w1, 3
 	add	w0, w22, w0
-	bne	.L3026
+	bne	.L3025
 	orr	w0, w0, w24, lsl 24
-	b	.L3026
-.L3029:
+	b	.L3025
+.L3028:
 	add	w19, w19, 1
 	add	w24, w24, 1
 	add	x8, x8, 4
-.L3032:
+.L3031:
 	ldr	w0, [x29, 188]
 	cmp	w0, w24
-	bcs	.L3030
+	bcs	.L3029
 	add	x21, x21, 1
-.L3035:
+.L3034:
 	ldr	x0, [x29, 168]
 	ldrb	w0, [x0, 9]
 	cmp	w0, w21
-	ble	.L3031
+	ble	.L3030
 	add	x0, x20, x21, lsl 1
 	str	x0, [x29, 128]
 	ldr	x0, [x29, 144]
@@ -19396,15 +19394,15 @@ gc_recovery:
 	mov	w24, 1
 	add	x0, x0, :lo12:.LANCHOR105
 	str	x0, [x29, 120]
-	b	.L3032
-.L3031:
+	b	.L3031
+.L3030:
 	adrp	x0, .LANCHOR74
 	ldrb	w0, [x0, #:lo12:.LANCHOR74]
 	cmp	w0, 0
 	cinc	w22, w22, ne
 	add	w22, w22, 1
-	b	.L3022
-.L3034:
+	b	.L3021
+.L3033:
 	mov	x0, x28
 	bl	zbuf_free
 	ldr	x3, [x29, 152]
@@ -19423,34 +19421,34 @@ gc_recovery:
 	strh	w0, [x1, x2, lsl 1]
 	add	x0, x24, :lo12:.LANCHOR68
 	str	x0, [x29, 104]
-.L3036:
+.L3035:
 	sub	w0, w28, #1
 	str	w0, [x29, 128]
 	ldr	w0, [x29, 184]
 	cmp	w0, w28
-	bls	.L3049
+	bls	.L3048
 	mov	x22, 0
-	b	.L3050
-.L3045:
+	b	.L3049
+.L3044:
 	ldr	w0, [x29, 180]
-	ldr	x1, [x23, #:lo12:.LANCHOR155]
+	ldr	x1, [x23, #:lo12:.LANCHOR157]
 	sbfiz	x0, x0, 2, 32
 	ldr	w21, [x1, x0]
 	cmn	w21, #1
-	beq	.L3037
-	ldr	x1, [x25, #:lo12:.LANCHOR156]
+	beq	.L3036
+	ldr	x1, [x25, #:lo12:.LANCHOR158]
 	ldr	w0, [x1, x0]
 	str	w0, [x29, 152]
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 204]
 	cmn	w0, #1
-	bne	.L3038
+	bne	.L3037
 	mov	w2, 0
 	add	x1, x29, 204
 	mov	w0, w21
 	bl	pm_log2phys
-.L3038:
+.L3037:
 	ldr	x0, [x29, 120]
 	ldr	x1, [x29, 144]
 	ldrh	w0, [x0, 96]
@@ -19459,16 +19457,16 @@ gc_recovery:
 	ldr	x1, [x29, 160]
 	ldrb	w1, [x1, #:lo12:.LANCHOR73]
 	cmp	w1, 2
-	beq	.L3039
+	beq	.L3038
 	adrp	x2, .LANCHOR35
 	ldrb	w2, [x2, #:lo12:.LANCHOR35]
-	cbz	w2, .L3040
-.L3039:
+	cbz	w2, .L3039
+.L3038:
 	ldr	w2, [x29, 128]
 	add	w0, w0, w2
 	add	w0, w0, w24
 	orr	w0, w0, w1, lsl 24
-.L3042:
+.L3041:
 	ldr	x1, [x29, 112]
 	mov	w19, 24
 	str	w0, [x29, 200]
@@ -19489,14 +19487,14 @@ gc_recovery:
 	ldr	w0, [x29, 204]
 	cmp	w1, w0
 	and	x19, x19, 65535
-	bne	.L3043
+	bne	.L3042
 	add	x1, x29, 200
 	mov	w0, w21
 	bl	pm_log2phys
 	add	w26, w26, 1
 	mov	w0, w19
 	bl	ftl_vpn_decrement
-.L3044:
+.L3043:
 	ldr	w0, [x29, 180]
 	add	w0, w0, 1
 	str	w0, [x29, 180]
@@ -19505,67 +19503,67 @@ gc_recovery:
 	add	x0, x0, x19, lsl 2
 	ldrb	w0, [x0, 2]
 	tst	w0, 224
-	bne	.L3037
+	bne	.L3036
 	ldr	x0, [x29, 136]
 	lsl	x19, x19, 1
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x0, x19]
-	cbz	w1, .L3037
+	cbz	w1, .L3036
 	strh	wzr, [x0, x19]
-.L3037:
+.L3036:
 	add	w24, w24, 1
-.L3047:
+.L3046:
 	ldr	w0, [x29, 188]
 	cmp	w0, w24
-	bcs	.L3045
+	bcs	.L3044
 	add	x22, x22, 1
-.L3050:
+.L3049:
 	ldr	x0, [x29, 168]
 	ldrb	w0, [x0, 9]
 	cmp	w0, w22
-	ble	.L3046
+	ble	.L3045
 	add	x0, x20, x22, lsl 1
 	mov	w24, 1
 	str	x0, [x29, 120]
 	adrp	x0, .LANCHOR31
 	add	x0, x0, :lo12:.LANCHOR31
 	str	x0, [x29, 112]
-	b	.L3047
-.L3040:
+	b	.L3046
+.L3039:
 	cmp	w1, 3
 	add	w0, w28, w0
-	bne	.L3042
+	bne	.L3041
 	orr	w0, w0, w24, lsl 24
-	b	.L3042
-.L3043:
+	b	.L3041
+.L3042:
 	ldr	w1, [x29, 200]
 	cmp	w0, w1
 	cinc	w26, w26, eq
-	b	.L3044
-.L3046:
+	b	.L3043
+.L3045:
 	adrp	x0, .LANCHOR74
 	ldrb	w0, [x0, #:lo12:.LANCHOR74]
 	cmp	w0, 0
 	cinc	w28, w28, ne
 	add	w28, w28, 1
-	b	.L3036
-.L3049:
+	b	.L3035
+.L3048:
 	ldr	x0, [x29, 136]
 	ldrh	w1, [x20, 80]
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	strh	w26, [x0, x1, lsl 1]
 	ldrh	w0, [x20, 80]
 	bl	zftl_insert_data_list
-	b	.L3016
-.L3010:
+	b	.L3015
+.L3009:
 	ldrh	w0, [x20, 130]
 	cmp	w0, w1
-	beq	.L3009
+	beq	.L3008
 	adrp	x19, .LANCHOR104
 	ldr	x1, [x19, #:lo12:.LANCHOR104]
 	ldrh	w1, [x1, 126]
 	cmp	w1, w0
-	bne	.L3054
+	bne	.L3053
 	bl	pm_flush
 	ldr	x0, [x27, #:lo12:.LANCHOR10]
 	ldrh	w0, [x0, 130]
@@ -19575,11 +19573,11 @@ gc_recovery:
 	strh	w1, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L3054:
+.L3053:
 	ldr	x0, [x27, #:lo12:.LANCHOR10]
 	mov	w1, -1
 	strh	w1, [x0, 130]
-	b	.L3009
+	b	.L3008
 	.size	gc_recovery, .-gc_recovery
 	.section	.text.zftl_init,"ax",@progbits
 	.align	2
@@ -19595,39 +19593,39 @@ zftl_init:
 	stp	x21, x22, [sp, 32]
 	adrp	x22, .LANCHOR87
 	strb	wzr, [x1, #:lo12:.LANCHOR60]
-	adrp	x1, .LANCHOR128
+	adrp	x1, .LANCHOR129
 	stp	x19, x20, [sp, 16]
 	adrp	x21, .LANCHOR80
-	strb	w0, [x1, #:lo12:.LANCHOR128]
-	adrp	x1, .LANCHOR129
+	strb	w0, [x1, #:lo12:.LANCHOR129]
+	adrp	x1, .LANCHOR130
 	stp	x23, x24, [sp, 48]
-	adrp	x20, .LANCHOR208
-	strb	wzr, [x1, #:lo12:.LANCHOR129]
-	adrp	x1, .LANCHOR177
+	adrp	x20, .LANCHOR210
+	strb	wzr, [x1, #:lo12:.LANCHOR130]
+	adrp	x1, .LANCHOR178
 	stp	x25, x26, [sp, 64]
 	adrp	x23, .LANCHOR6
-	strb	w0, [x1, #:lo12:.LANCHOR177]
-	adrp	x0, .LANCHOR123
+	strb	w0, [x1, #:lo12:.LANCHOR178]
+	adrp	x0, .LANCHOR124
 	mov	w1, -1
 	stp	x27, x28, [sp, 80]
-	strb	wzr, [x0, #:lo12:.LANCHOR123]
-	adrp	x0, .LANCHOR211
-	str	w1, [x0, #:lo12:.LANCHOR211]
+	strb	wzr, [x0, #:lo12:.LANCHOR124]
+	adrp	x0, .LANCHOR213
+	str	w1, [x0, #:lo12:.LANCHOR213]
 	adrp	x1, .LC202
-	adrp	x0, .LC99
+	adrp	x0, .LC98
 	add	x1, x1, :lo12:.LC202
-	add	x0, x0, :lo12:.LC99
+	add	x0, x0, :lo12:.LC98
 	bl	printf
 	adrp	x1, .LANCHOR32
 	add	x1, x1, :lo12:.LANCHOR32
 	adrp	x0, .LANCHOR73
-	adrp	x2, .LANCHOR125
+	adrp	x2, .LANCHOR126
 	adrp	x3, .LANCHOR79
 	adrp	x4, .LANCHOR69
 	ldrb	w5, [x1, 12]
 	strb	w5, [x0, #:lo12:.LANCHOR73]
 	ldrb	w0, [x1, 9]
-	strb	w0, [x2, #:lo12:.LANCHOR125]
+	strb	w0, [x2, #:lo12:.LANCHOR126]
 	ldrh	w2, [x1, 10]
 	strh	w2, [x3, #:lo12:.LANCHOR79]
 	adrp	x3, .LANCHOR18
@@ -19646,14 +19644,14 @@ zftl_init:
 	strh	w8, [x22, #:lo12:.LANCHOR87]
 	mul	w6, w6, w3
 	strh	w4, [x1, #:lo12:.LANCHOR105]
-	strh	w10, [x20, #:lo12:.LANCHOR208]
+	strh	w10, [x20, #:lo12:.LANCHOR210]
 	mov	w3, 1
 	and	w6, w6, 255
 	mov	w1, 0
 	strb	w6, [x21, #:lo12:.LANCHOR80]
-.L3088:
+.L3087:
 	cmp	w4, w3
-	bcs	.L3089
+	bcs	.L3088
 	mul	w2, w0, w2
 	adrp	x3, .LANCHOR68
 	sub	w1, w1, #1
@@ -19662,66 +19660,66 @@ zftl_init:
 	mov	w1, 1
 	mul	w3, w2, w7
 	lsr	w11, w3, 21
-.L3090:
+.L3089:
 	cmp	w11, w1
-	bcs	.L3091
+	bcs	.L3090
 	mov	w1, 57344
 	sub	w4, w4, #1
 	movk	w1, 0x1c, lsl 16
 	mul	w3, w3, w6
-	adrp	x28, .LANCHOR122
+	adrp	x28, .LANCHOR123
 	sub	w11, w10, #1
 	mul	w1, w6, w1
-	adrp	x24, .LANCHOR194
+	adrp	x24, .LANCHOR193
 	mul	w8, w8, w6
-	adrp	x27, .LANCHOR213
+	adrp	x27, .LANCHOR215
 	mul	w2, w2, w6
-	adrp	x26, .LANCHOR149
+	adrp	x26, .LANCHOR151
 	lsl	w1, w1, w4
 	adrp	x4, .LANCHOR61
 	sub	w2, w2, #1
 	adrp	x25, .LANCHOR91
 	str	w1, [x4, #:lo12:.LANCHOR61]
-	adrp	x4, .LANCHOR212
-	str	w3, [x4, #:lo12:.LANCHOR212]
+	adrp	x4, .LANCHOR214
+	str	w3, [x4, #:lo12:.LANCHOR214]
 	add	w3, w1, 24576
-	str	w3, [x27, #:lo12:.LANCHOR213]
+	str	w3, [x27, #:lo12:.LANCHOR215]
 	udiv	w0, w3, w0
 	udiv	w3, w3, w2
-	adrp	x2, .LANCHOR119
-	str	w0, [x28, #:lo12:.LANCHOR122]
+	adrp	x2, .LANCHOR120
+	str	w0, [x28, #:lo12:.LANCHOR123]
 	add	w0, w11, w0, lsl 2
 	add	w3, w3, 8
 	udiv	w0, w0, w10
-	strh	w0, [x24, #:lo12:.LANCHOR194]
+	strh	w0, [x24, #:lo12:.LANCHOR193]
 	ubfiz	w0, w0, 4, 16
 	sdiv	w0, w0, w8
 	adrp	x8, .LANCHOR95
 	str	x8, [x29, 104]
 	strh	w3, [x8, #:lo12:.LANCHOR95]
-	strh	w0, [x26, #:lo12:.LANCHOR149]
+	strh	w0, [x26, #:lo12:.LANCHOR151]
 	add	w0, w7, w7, lsl 1
 	asr	w0, w0, 2
-	strh	w0, [x2, #:lo12:.LANCHOR119]
+	strh	w0, [x2, #:lo12:.LANCHOR120]
 	lsr	w0, w7, 4
 	strh	w0, [x25, #:lo12:.LANCHOR91]
 	cmp	w0, 79
-	bhi	.L3092
+	bhi	.L3091
 	mov	w0, 80
 	strh	w0, [x25, #:lo12:.LANCHOR91]
-.L3092:
-	adrp	x7, .LANCHOR120
+.L3091:
+	adrp	x7, .LANCHOR121
 	mov	w0, 2000
-	adrp	x6, .LANCHOR118
-	adrp	x8, .LANCHOR148
-	strh	w0, [x7, #:lo12:.LANCHOR120]
+	adrp	x6, .LANCHOR119
+	adrp	x8, .LANCHOR150
+	strh	w0, [x7, #:lo12:.LANCHOR121]
 	mov	w0, 50
-	adrp	x2, .LANCHOR147
-	strh	w0, [x6, #:lo12:.LANCHOR118]
+	adrp	x2, .LANCHOR149
+	strh	w0, [x6, #:lo12:.LANCHOR119]
 	mov	w0, 256
-	strh	w0, [x8, #:lo12:.LANCHOR148]
+	strh	w0, [x8, #:lo12:.LANCHOR150]
 	mov	w0, 48
-	strh	w0, [x2, #:lo12:.LANCHOR147]
+	strh	w0, [x2, #:lo12:.LANCHOR149]
 	adrp	x0, .LANCHOR8
 	mov	w3, 32
 	cmp	w5, 2
@@ -19729,93 +19727,93 @@ zftl_init:
 	strh	w3, [x0, #:lo12:.LANCHOR8]
 	mov	x5, x7
 	mov	x10, x2
-	beq	.L3093
+	beq	.L3092
 	adrp	x12, .LANCHOR77
 	ldrb	w12, [x12, #:lo12:.LANCHOR77]
-	cbz	w12, .L3094
-.L3093:
+	cbz	w12, .L3093
+.L3092:
 	mov	w2, 150
-	strh	w2, [x11, #:lo12:.LANCHOR118]
+	strh	w2, [x11, #:lo12:.LANCHOR119]
 	mov	w2, 64
-	strh	w2, [x10, #:lo12:.LANCHOR147]
+	strh	w2, [x10, #:lo12:.LANCHOR149]
 	mov	w2, 12
 	strh	w2, [x0, #:lo12:.LANCHOR8]
 	adrp	x2, .LANCHOR0
 	ldrb	w2, [x2, #:lo12:.LANCHOR0]
-	cbnz	w2, .L3096
+	cbnz	w2, .L3095
 	mov	w2, 4
 	strh	w2, [x0, #:lo12:.LANCHOR8]
 	mov	w0, 600
-	strh	w0, [x5, #:lo12:.LANCHOR120]
+	strh	w0, [x5, #:lo12:.LANCHOR121]
 	mov	w0, 128
-	strh	w0, [x8, #:lo12:.LANCHOR148]
-.L3096:
+	strh	w0, [x8, #:lo12:.LANCHOR150]
+.L3095:
 	adrp	x19, .LANCHOR14
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3098
+	tbz	x0, 12, .L3097
 	str	x4, [x29, 96]
 	adrp	x0, .LC203
 	add	x0, x0, :lo12:.LC203
 	bl	printf
 	ldr	x4, [x29, 96]
-.L3098:
+.L3097:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3099
-	ldr	w1, [x4, #:lo12:.LANCHOR212]
+	tbz	x0, 12, .L3098
+	ldr	w1, [x4, #:lo12:.LANCHOR214]
 	adrp	x0, .LC204
 	add	x0, x0, :lo12:.LC204
 	bl	printf
-.L3099:
+.L3098:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3100
-	ldr	w1, [x28, #:lo12:.LANCHOR122]
+	tbz	x0, 12, .L3099
+	ldr	w1, [x28, #:lo12:.LANCHOR123]
 	adrp	x0, .LC205
 	add	x0, x0, :lo12:.LC205
 	bl	printf
-.L3100:
+.L3099:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3101
-	ldr	w1, [x27, #:lo12:.LANCHOR213]
+	tbz	x0, 12, .L3100
+	ldr	w1, [x27, #:lo12:.LANCHOR215]
 	adrp	x0, .LC206
 	add	x0, x0, :lo12:.LC206
 	bl	printf
-.L3101:
+.L3100:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3102
-	ldrh	w1, [x24, #:lo12:.LANCHOR194]
+	tbz	x0, 12, .L3101
+	ldrh	w1, [x24, #:lo12:.LANCHOR193]
 	adrp	x0, .LC207
 	add	x0, x0, :lo12:.LC207
 	bl	printf
-.L3102:
+.L3101:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3103
-	ldrh	w1, [x20, #:lo12:.LANCHOR208]
+	tbz	x0, 12, .L3102
+	ldrh	w1, [x20, #:lo12:.LANCHOR210]
 	adrp	x0, .LC208
 	add	x0, x0, :lo12:.LC208
 	bl	printf
-.L3103:
+.L3102:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3104
-	ldrh	w1, [x26, #:lo12:.LANCHOR149]
+	tbz	x0, 12, .L3103
+	ldrh	w1, [x26, #:lo12:.LANCHOR151]
 	adrp	x0, .LC209
 	add	x0, x0, :lo12:.LC209
 	bl	printf
-.L3104:
+.L3103:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3105
+	tbz	x0, 12, .L3104
 	ldrh	w1, [x25, #:lo12:.LANCHOR91]
 	adrp	x0, .LC210
 	add	x0, x0, :lo12:.LC210
 	bl	printf
-.L3105:
+.L3104:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3106
+	tbz	x0, 12, .L3105
 	ldr	x0, [x29, 104]
 	ldrh	w1, [x0, #:lo12:.LANCHOR95]
 	adrp	x0, .LC211
 	add	x0, x0, :lo12:.LC211
 	bl	printf
-.L3106:
+.L3105:
 	bl	zbuf_init
 	adrp	x25, .LANCHOR10
 	ldrh	w1, [x23, #:lo12:.LANCHOR6]
@@ -19847,15 +19845,15 @@ zftl_init:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	add	x1, x2, x1, sxtw 2
 	str	x1, [x25, #:lo12:.LANCHOR10]
-	tbz	x0, 12, .L3107
+	tbz	x0, 12, .L3106
 	adrp	x0, .LC212
 	add	x0, x0, :lo12:.LC212
 	bl	printf
-.L3107:
+.L3106:
 	ldrh	w0, [x22, #:lo12:.LANCHOR87]
 	ldrb	w21, [x21, #:lo12:.LANCHOR80]
 	ldrh	w1, [x23, #:lo12:.LANCHOR6]
-	ldrh	w22, [x24, #:lo12:.LANCHOR194]
+	ldrh	w22, [x24, #:lo12:.LANCHOR193]
 	mul	w21, w0, w21
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	add	w21, w1, w21, lsl 2
@@ -19864,46 +19862,46 @@ zftl_init:
 	add	w22, w1, w22, lsl 2
 	add	w21, w21, 632
 	add	w22, w22, 704
-	tbz	x0, 12, .L3108
-	ldrh	w3, [x20, #:lo12:.LANCHOR208]
+	tbz	x0, 12, .L3107
+	ldrh	w3, [x20, #:lo12:.LANCHOR210]
 	adrp	x0, .LC213
 	mov	w2, w22
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC213
 	bl	printf
-.L3108:
-	ldrh	w0, [x20, #:lo12:.LANCHOR208]
+.L3107:
+	ldrh	w0, [x20, #:lo12:.LANCHOR210]
 	cmp	w21, w0
-	bhi	.L3109
+	bhi	.L3108
 	cmp	w22, w0
-	bls	.L3110
-.L3109:
-.L3156:
-	b	.L3156
-.L3089:
+	bls	.L3109
+.L3108:
+.L3155:
+	b	.L3155
+.L3088:
 	add	w1, w1, 1
 	lsl	w3, w3, 1
 	and	w1, w1, 65535
-	b	.L3088
-.L3091:
+	b	.L3087
+.L3090:
 	add	w4, w4, 1
 	lsl	w1, w1, 1
 	and	w4, w4, 65535
-	b	.L3090
-.L3094:
+	b	.L3089
+.L3093:
 	adrp	x0, .LANCHOR35
 	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbz	w0, .L3096
+	cbz	w0, .L3095
 	mov	w0, 1200
-	strh	w3, [x6, #:lo12:.LANCHOR118]
-	strh	w0, [x7, #:lo12:.LANCHOR120]
-	strh	w3, [x2, #:lo12:.LANCHOR147]
-	b	.L3096
-.L3110:
+	strh	w3, [x6, #:lo12:.LANCHOR119]
+	strh	w0, [x7, #:lo12:.LANCHOR121]
+	strh	w3, [x2, #:lo12:.LANCHOR149]
+	b	.L3095
+.L3109:
 	bl	sblk_init
 	bl	ftl_info_blk_init
 	cmn	w0, #1
-	beq	.L3087
+	beq	.L3086
 	bl	ftl_ext_info_init
 	adrp	x19, .LANCHOR104
 	bl	gc_init
@@ -19935,20 +19933,20 @@ zftl_init:
 	bl	pm_flush
 	mov	w0, 1
 	bl	ftl_total_vpn_update
-	adrp	x0, .LANCHOR185
-	ldrb	w0, [x0, #:lo12:.LANCHOR185]
-	cbz	w0, .L3112
+	adrp	x0, .LANCHOR188
+	ldrb	w0, [x0, #:lo12:.LANCHOR188]
+	cbz	w0, .L3111
 	ldr	x1, [x19, #:lo12:.LANCHOR104]
 	ldr	w0, [x1, 68]
 	add	w0, w0, 1
 	str	w0, [x1, 68]
-.L3112:
+.L3111:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
 	bl	print_ftl_debug_info
 	mov	w0, 0
-.L3087:
+.L3086:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -19966,9 +19964,9 @@ rk_ftl_init:
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	bl	nand_flash_init
-	cbnz	w0, .L3160
+	cbnz	w0, .L3159
 	bl	zftl_init
-.L3160:
+.L3159:
 	mov	w19, w0
 	bl	idb_init
 	mov	w1, w19
@@ -20002,12 +20000,12 @@ gc_update_l2p_map_new:
 	ldrb	w1, [x1, 9]
 	mul	w26, w26, w1
 	ldr	w1, [x24, #:lo12:.LANCHOR14]
-	tbz	x1, 8, .L3163
+	tbz	x1, 8, .L3162
 	ldrh	w1, [x21, 80]
 	adrp	x0, .LC215
 	add	x0, x0, :lo12:.LC215
 	bl	printf
-.L3163:
+.L3162:
 	adrp	x23, .LANCHOR9
 	ldrh	w1, [x21, 80]
 	sub	w2, w26, #1
@@ -20015,15 +20013,15 @@ gc_update_l2p_map_new:
 	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	mov	w25, 0
 	strh	w2, [x0, x1, lsl 1]
-	adrp	x0, .LANCHOR125
-	add	x0, x0, :lo12:.LANCHOR125
+	adrp	x0, .LANCHOR126
+	add	x0, x0, :lo12:.LANCHOR126
 	str	x0, [x29, 104]
-.L3164:
+.L3163:
 	mov	w28, w22
 	cmp	w26, w22
-	bhi	.L3174
+	bhi	.L3173
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3175
+	tbz	x0, 8, .L3174
 	ldr	x0, [x29, 128]
 	mov	w3, w25
 	ldr	x1, [x23, #:lo12:.LANCHOR9]
@@ -20034,19 +20032,19 @@ gc_update_l2p_map_new:
 	adrp	x0, .LC218
 	add	x0, x0, :lo12:.LC218
 	bl	printf
-.L3175:
+.L3174:
 	ldrh	w1, [x21, 80]
 	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, x1, lsl 1]
 	cmp	w25, w0
-	beq	.L3176
-	adrp	x1, .LANCHOR214
+	beq	.L3175
+	adrp	x1, .LANCHOR216
 	adrp	x0, .LC0
-	mov	w2, 748
-	add	x1, x1, :lo12:.LANCHOR214
+	mov	w2, 753
+	add	x1, x1, :lo12:.LANCHOR216
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3176:
+.L3175:
 	ldrh	w1, [x21, 80]
 	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	strh	w25, [x0, x1, lsl 1]
@@ -20059,27 +20057,27 @@ gc_update_l2p_map_new:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L3174:
-	adrp	x27, .LANCHOR155
+.L3173:
+	adrp	x27, .LANCHOR157
 	lsl	x19, x22, 2
-	ldr	x0, [x27, #:lo12:.LANCHOR155]
+	ldr	x0, [x27, #:lo12:.LANCHOR157]
 	ldr	w2, [x0, x19]
 	cmn	w2, #1
-	beq	.L3165
-	adrp	x0, .LANCHOR125
-	ldrb	w20, [x0, #:lo12:.LANCHOR125]
+	beq	.L3164
+	adrp	x0, .LANCHOR126
+	ldrb	w20, [x0, #:lo12:.LANCHOR126]
 	lsl	w20, w20, 7
 	udiv	w20, w2, w20
 	and	w0, w20, 65535
 	str	w0, [x29, 156]
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3166
+	tbz	x0, 8, .L3165
 	ldr	w1, [x29, 156]
 	adrp	x0, .LC216
 	mov	w3, w22
 	add	x0, x0, :lo12:.LC216
 	bl	printf
-.L3166:
+.L3165:
 	sub	w28, w26, w28
 	add	x28, x28, x22
 	lsl	x0, x28, 2
@@ -20090,46 +20088,46 @@ gc_update_l2p_map_new:
 	adrp	x0, .LANCHOR68
 	add	x0, x0, :lo12:.LANCHOR68
 	str	x0, [x29, 112]
-.L3167:
+.L3166:
 	ldr	x0, [x29, 144]
 	cmp	x0, x19
-	bne	.L3173
-.L3165:
+	bne	.L3172
+.L3164:
 	add	x22, x22, 1
-	b	.L3164
-.L3173:
-	ldr	x0, [x27, #:lo12:.LANCHOR155]
+	b	.L3163
+.L3172:
+	ldr	x0, [x27, #:lo12:.LANCHOR157]
 	ldr	w20, [x0, x19]
 	cmn	w20, #1
-	beq	.L3168
+	beq	.L3167
 	ldr	x0, [x29, 104]
 	ldr	w1, [x29, 156]
 	ldrb	w0, [x0]
 	lsl	w0, w0, 7
 	udiv	w0, w20, w0
 	cmp	w1, w0, uxth
-	bne	.L3168
-	adrp	x0, .LANCHOR156
-	ldr	x0, [x0, #:lo12:.LANCHOR156]
+	bne	.L3167
+	adrp	x0, .LANCHOR158
+	ldr	x0, [x0, #:lo12:.LANCHOR158]
 	ldr	w28, [x0, x19]
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 172]
 	cmn	w0, #1
-	bne	.L3169
+	bne	.L3168
 	mov	w2, 0
 	add	x1, x29, 172
 	mov	w0, w20
 	bl	pm_log2phys
-.L3169:
+.L3168:
 	ldr	w3, [x29, 172]
 	cmp	w28, w3
-	bne	.L3170
-	adrp	x0, .LANCHOR157
+	bne	.L3169
+	adrp	x0, .LANCHOR159
 	mov	w2, 1
 	add	x1, x29, 168
 	add	w25, w25, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR157]
+	ldr	x0, [x0, #:lo12:.LANCHOR159]
 	ldr	w0, [x0, x19]
 	str	w0, [x29, 168]
 	mov	w0, w20
@@ -20149,25 +20147,25 @@ gc_update_l2p_map_new:
 	adrp	x0, .LANCHOR69
 	ldrb	w0, [x0, #:lo12:.LANCHOR69]
 	udiv	w0, w28, w0
-.L3196:
+.L3195:
 	bl	ftl_vpn_decrement
-	ldr	x0, [x27, #:lo12:.LANCHOR155]
+	ldr	x0, [x27, #:lo12:.LANCHOR157]
 	mov	w1, -1
 	str	w1, [x0, x19]
-.L3168:
+.L3167:
 	add	x19, x19, 4
-	b	.L3167
-.L3170:
+	b	.L3166
+.L3169:
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3172
+	tbz	x0, 8, .L3171
 	ldr	x0, [x29, 120]
 	mov	w2, w28
 	mov	w1, w20
 	bl	printf
-.L3172:
+.L3171:
 	ldr	x0, [x29, 136]
 	ldrh	w0, [x0]
-	b	.L3196
+	b	.L3195
 	.size	gc_update_l2p_map_new, .-gc_update_l2p_map_new
 	.section	.text.gc_scan_src_blk_one_page,"ax",@progbits
 	.align	2
@@ -20191,17 +20189,17 @@ gc_scan_src_blk_one_page:
 	add	x2, x1, x0, sxtw 1
 	ldrh	w23, [x2, 40]
 	ldrh	w2, [x1, 2]
-.L3198:
+.L3197:
 	cmp	w23, w5
-	beq	.L3200
-	cbz	w4, .L3201
+	beq	.L3199
+	cbz	w4, .L3200
 	add	x1, x19, :lo12:.LANCHOR64
 	strh	w2, [x1, 2]
-.L3201:
-	cbz	w3, .L3202
+.L3200:
+	cbz	w3, .L3201
 	add	x1, x19, :lo12:.LANCHOR64
 	strb	w0, [x1, 4]
-.L3202:
+.L3201:
 	mov	w0, 1
 	adrp	x24, .LANCHOR105
 	bl	buf_alloc
@@ -20210,11 +20208,11 @@ gc_scan_src_blk_one_page:
 	add	x24, x24, :lo12:.LANCHOR105
 	add	x25, x25, :lo12:.LANCHOR73
 	mov	w26, 1
-.L3203:
+.L3202:
 	add	x20, x19, :lo12:.LANCHOR64
 	ldrb	w1, [x20, 6]
 	cmp	w26, w1
-	ble	.L3212
+	ble	.L3211
 	mov	x0, x21
 	bl	zbuf_free
 	ldrb	w0, [x20, 4]
@@ -20223,43 +20221,43 @@ gc_scan_src_blk_one_page:
 	and	w0, w0, 255
 	strb	w0, [x20, 4]
 	cmp	w1, w0
-	bne	.L3197
+	bne	.L3196
 	ldrh	w0, [x20, 2]
 	strb	wzr, [x20, 4]
 	add	w0, w0, 1
 	strh	w0, [x20, 2]
-.L3197:
+.L3196:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L3200:
+.L3199:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	cmp	w0, w6
-	bne	.L3199
+	bne	.L3198
 	add	w2, w2, 1
 	mov	w0, 0
 	and	w2, w2, 65535
 	mov	w4, 1
-.L3199:
+.L3198:
 	add	x3, x1, x0, sxtw 1
 	ldrh	w23, [x3, 40]
 	mov	w3, 1
-	b	.L3198
-.L3212:
+	b	.L3197
+.L3211:
 	ldrh	w0, [x24]
 	cmp	w1, 2
 	mul	w0, w0, w23
-	beq	.L3204
+	beq	.L3203
 	cmp	w1, 3
-	bne	.L3205
+	bne	.L3204
 	adrp	x1, .LANCHOR35
 	ldrb	w1, [x1, #:lo12:.LANCHOR35]
-	cbz	w1, .L3206
-.L3204:
+	cbz	w1, .L3205
+.L3203:
 	add	x1, x19, :lo12:.LANCHOR64
 	add	w0, w26, w0
 	ldrh	w1, [x1, 2]
@@ -20268,7 +20266,7 @@ gc_scan_src_blk_one_page:
 	add	w0, w1, w0
 	ldrb	w1, [x25]
 	orr	w0, w0, w1, lsl 24
-.L3224:
+.L3223:
 	str	w0, [x21, 40]
 	mov	w1, 1
 	mov	x0, x21
@@ -20276,27 +20274,27 @@ gc_scan_src_blk_one_page:
 	ldr	w0, [x21, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L3209
+	beq	.L3208
 	ldr	x0, [x21, 24]
 	ldr	w20, [x0, 4]
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 92]
 	cmn	w0, #1
-	bne	.L3210
-	adrp	x0, .LANCHOR122
-	ldr	w0, [x0, #:lo12:.LANCHOR122]
+	bne	.L3209
+	adrp	x0, .LANCHOR123
+	ldr	w0, [x0, #:lo12:.LANCHOR123]
 	cmp	w20, w0
-	bcs	.L3210
+	bcs	.L3209
 	mov	w2, 0
 	add	x1, x29, 92
 	mov	w0, w20
 	bl	pm_log2phys
-.L3210:
+.L3209:
 	ldr	w2, [x21, 40]
 	ldr	w0, [x29, 92]
 	cmp	w2, w0
-	bne	.L3209
+	bne	.L3208
 	add	x1, x19, :lo12:.LANCHOR64
 	adrp	x4, .LANCHOR70
 	ldr	x4, [x4, #:lo12:.LANCHOR70]
@@ -20305,22 +20303,22 @@ gc_scan_src_blk_one_page:
 	add	w0, w0, 1
 	str	w2, [x4, x3]
 	strh	w0, [x1, 24]
-.L3209:
+.L3208:
 	add	x1, x19, :lo12:.LANCHOR64
 	add	w26, w26, 1
 	ldrh	w0, [x1, 26]
 	add	w0, w0, 1
 	strh	w0, [x1, 26]
-	b	.L3203
-.L3206:
+	b	.L3202
+.L3205:
 	ldrh	w1, [x20, 2]
 	add	w0, w1, w0
 	orr	w0, w0, w26, lsl 24
-	b	.L3224
-.L3205:
+	b	.L3223
+.L3204:
 	ldrh	w1, [x20, 2]
 	add	w0, w1, w0
-	b	.L3224
+	b	.L3223
 	.size	gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page
 	.section	.text.gc_scan_src_blk,"ax",@progbits
 	.align	2
@@ -20337,21 +20335,21 @@ gc_scan_src_blk:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w1, w0
-	bne	.L3226
-	adrp	x1, .LANCHOR215
+	bne	.L3225
+	adrp	x1, .LANCHOR217
 	adrp	x0, .LC0
-	mov	w2, 1235
-	add	x1, x1, :lo12:.LANCHOR215
+	mov	w2, 1240
+	add	x1, x1, :lo12:.LANCHOR217
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3226:
+.L3225:
 	ldrh	w1, [x19, #:lo12:.LANCHOR64]
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L3246
+	beq	.L3245
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3228
+	tbz	x0, 8, .L3227
 	adrp	x2, .LANCHOR9
 	ubfiz	x0, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
@@ -20359,20 +20357,20 @@ gc_scan_src_blk:
 	adrp	x0, .LC219
 	add	x0, x0, :lo12:.LC219
 	bl	printf
-.L3228:
+.L3227:
 	ldrh	w0, [x19, #:lo12:.LANCHOR64]
 	add	x14, x19, :lo12:.LANCHOR64
 	add	x1, x14, 40
 	bl	ftl_get_blk_list_in_sblk
 	and	w1, w0, 255
 	strb	w1, [x14, 5]
-	cbnz	w1, .L3229
+	cbnz	w1, .L3228
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR64]
-.L3246:
+.L3245:
 	mov	w0, 0
-	b	.L3225
-.L3229:
+	b	.L3224
+.L3228:
 	adrp	x4, .LANCHOR7
 	ldrh	w3, [x19, #:lo12:.LANCHOR64]
 	mov	x22, x4
@@ -20382,59 +20380,59 @@ gc_scan_src_blk:
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 32
-	beq	.L3230
+	beq	.L3229
 	cmp	w1, 224
-	beq	.L3230
-	cbz	w1, .L3231
+	beq	.L3229
+	cbz	w1, .L3230
 	adrp	x1, .LANCHOR10
 	ldr	x1, [x1, #:lo12:.LANCHOR10]
 	ldrh	w3, [x1, 16]
 	cmp	w3, w2
-	beq	.L3230
+	beq	.L3229
 	ldrh	w3, [x1, 48]
 	cmp	w3, w2
-	beq	.L3230
+	beq	.L3229
 	ldrh	w1, [x1, 80]
 	cmp	w1, w2
-	bne	.L3263
-.L3230:
+	bne	.L3262
+.L3229:
 	add	x0, x19, :lo12:.LANCHOR64
 	mov	w1, -1
 	strh	w1, [x19, #:lo12:.LANCHOR64]
 	strh	wzr, [x0, 24]
-	b	.L3246
-.L3231:
+	b	.L3245
+.L3230:
 	adrp	x0, .LANCHOR9
 	mov	x20, x0
 	ldr	x1, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x1, x3, lsl 1]
-	cbz	w1, .L3233
-	adrp	x1, .LANCHOR215
+	cbz	w1, .L3232
+	adrp	x1, .LANCHOR217
 	adrp	x0, .LC0
-	mov	w2, 1255
-	add	x1, x1, :lo12:.LANCHOR215
+	mov	w2, 1260
+	add	x1, x1, :lo12:.LANCHOR217
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3233:
+.L3232:
 	ldrh	w1, [x19, #:lo12:.LANCHOR64]
 	ldr	x0, [x20, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x1, lsl 1]
-	b	.L3230
-.L3263:
+	b	.L3229
+.L3262:
 	and	w0, w0, 255
 	sub	w0, w0, #1
 	add	x0, x14, x0, sxtw 1
 	ldrh	w21, [x0, 40]
 	mov	w0, 65535
 	cmp	w21, w0
-	bne	.L3234
-	adrp	x1, .LANCHOR215
+	bne	.L3233
+	adrp	x1, .LANCHOR217
 	adrp	x0, .LC0
-	mov	w2, 1263
-	add	x1, x1, :lo12:.LANCHOR215
+	mov	w2, 1268
+	add	x1, x1, :lo12:.LANCHOR217
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3234:
+.L3233:
 	adrp	x1, .LANCHOR105
 	ldr	x3, [x22, #:lo12:.LANCHOR7]
 	adrp	x2, .LANCHOR87
@@ -20450,24 +20448,24 @@ gc_scan_src_blk:
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 160
-	bne	.L3247
+	bne	.L3246
 	adrp	x1, .LANCHOR73
 	ldrb	w1, [x1, #:lo12:.LANCHOR73]
 	and	w23, w1, 65535
 	cmp	w1, 2
 	orr	w20, w20, w1, lsl 24
-	bne	.L3236
+	bne	.L3235
 	ldrh	w0, [x21, #:lo12:.LANCHOR79]
 	sub	w0, w0, #1
 	and	w0, w0, 65535
-.L3236:
+.L3235:
 	adrp	x1, .LANCHOR35
 	ldrb	w1, [x1, #:lo12:.LANCHOR35]
-	cbz	w1, .L3235
+	cbz	w1, .L3234
 	ldrh	w0, [x21, #:lo12:.LANCHOR79]
 	sub	w0, w0, #1
 	and	w0, w0, 65535
-.L3235:
+.L3234:
 	add	x22, x19, :lo12:.LANCHOR64
 	orr	w20, w0, w20
 	mov	w0, 1
@@ -20494,36 +20492,36 @@ gc_scan_src_blk:
 	ldr	w0, [x25, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3237
-.L3265:
+	bne	.L3236
+.L3264:
 	mov	x0, x25
 	bl	zbuf_free
 	mov	w0, -1
-.L3225:
+.L3224:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L3247:
+.L3246:
 	mov	w23, 1
-	b	.L3235
-.L3237:
+	b	.L3234
+.L3236:
 	ldr	x0, [x25, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L3238
-	mov	w2, 1298
-	adrp	x1, .LANCHOR215
+	beq	.L3237
+	mov	w2, 1303
+	adrp	x1, .LANCHOR217
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR215
+	add	x1, x1, :lo12:.LANCHOR217
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3265
-.L3238:
+	b	.L3264
+.L3237:
 	ldrh	w0, [x24, #:lo12:.LANCHOR87]
 	adrp	x22, .LANCHOR68
 	ldrb	w20, [x20, #:lo12:.LANCHOR80]
@@ -20535,9 +20533,9 @@ gc_scan_src_blk:
 	adrp	x23, .LANCHOR31
 	add	x23, x23, :lo12:.LANCHOR31
 	and	w20, w20, 65535
-.L3239:
+.L3238:
 	cmp	w20, w26
-	bgt	.L3244
+	bgt	.L3243
 	mov	x0, x25
 	bl	zbuf_free
 	adrp	x0, .LANCHOR9
@@ -20549,11 +20547,11 @@ gc_scan_src_blk:
 	ldrh	w3, [x3, 24]
 	ldrh	w2, [x4, x2]
 	cmp	w2, w3
-	beq	.L3245
+	beq	.L3244
 	adrp	x0, .LC220
 	add	x0, x0, :lo12:.LC220
 	bl	printf
-.L3245:
+.L3244:
 	add	x0, x19, :lo12:.LANCHOR64
 	ldrh	w2, [x19, #:lo12:.LANCHOR64]
 	ldr	x1, [x20, #:lo12:.LANCHOR9]
@@ -20561,20 +20559,20 @@ gc_scan_src_blk:
 	strh	w3, [x1, x2, lsl 1]
 	strh	wzr, [x0, 28]
 	ldrh	w0, [x0, 24]
-	b	.L3225
-.L3244:
+	b	.L3224
+.L3243:
 	ldr	w0, [x24, x26, lsl 2]
 	cmn	w0, #1
-	beq	.L3241
+	beq	.L3240
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 92]
 	cmn	w0, #1
-	bne	.L3242
+	bne	.L3241
 	ldr	w0, [x24, x26, lsl 2]
 	mov	w2, 0
 	add	x1, x29, 92
 	bl	pm_log2phys
-.L3242:
+.L3241:
 	ldrb	w0, [x23]
 	mov	w1, 24
 	ldrh	w2, [x22]
@@ -20592,16 +20590,16 @@ gc_scan_src_blk:
 	udiv	w0, w0, w1
 	add	x1, x19, :lo12:.LANCHOR64
 	cmp	w0, w2
-	bne	.L3241
+	bne	.L3240
 	ldrh	w0, [x1, 24]
 	ldr	x4, [x21, #:lo12:.LANCHOR70]
 	ubfiz	x2, x0, 2, 16
 	add	w0, w0, 1
 	str	w3, [x4, x2]
 	strh	w0, [x1, 24]
-.L3241:
+.L3240:
 	add	x26, x26, 1
-	b	.L3239
+	b	.L3238
 	.size	gc_scan_src_blk, .-gc_scan_src_blk
 	.section	.text.gc_scan_static_data,"ax",@progbits
 	.align	2
@@ -20617,13 +20615,13 @@ gc_scan_static_data:
 	ldr	w1, [x0, 544]
 	str	x23, [sp, 48]
 	cmn	w1, #1
-	beq	.L3267
-	adrp	x21, .LANCHOR216
+	beq	.L3266
+	adrp	x21, .LANCHOR218
 	adrp	x22, .LC0
-	add	x21, x21, :lo12:.LANCHOR216
+	add	x21, x21, :lo12:.LANCHOR218
 	add	x22, x22, :lo12:.LC0
 	mov	w20, 11
-.L3275:
+.L3274:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w2, 0
 	add	x1, x29, 76
@@ -20631,7 +20629,7 @@ gc_scan_static_data:
 	bl	pm_log2phys
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L3268
+	beq	.L3267
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 76]
@@ -20641,7 +20639,7 @@ gc_scan_static_data:
 	bl	sblk_read_page
 	ldr	w0, [x23, 52]
 	cmp	w0, 256
-	bne	.L3269
+	bne	.L3268
 	adrp	x0, .LANCHOR68
 	ldr	w2, [x29, 76]
 	ldrh	w3, [x0, #:lo12:.LANCHOR68]
@@ -20660,29 +20658,29 @@ gc_scan_static_data:
 	mov	w2, 0
 	udiv	w0, w0, w3
 	bl	gc_add_sblk
-.L3269:
+.L3268:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldr	x1, [x23, 24]
 	ldr	w0, [x0, 544]
 	ldr	w1, [x1, 4]
 	cmp	w1, w0
-	beq	.L3270
-	mov	w2, 1737
+	beq	.L3269
+	mov	w2, 1742
 	mov	x1, x21
 	mov	x0, x22
 	bl	printf
-.L3270:
+.L3269:
 	mov	x0, x23
 	bl	zbuf_free
-.L3268:
+.L3267:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
-	adrp	x2, .LANCHOR122
-	ldr	w2, [x2, #:lo12:.LANCHOR122]
+	adrp	x2, .LANCHOR123
+	ldr	w2, [x2, #:lo12:.LANCHOR123]
 	ldr	w1, [x0, 544]
 	add	w1, w1, 1
 	str	w1, [x0, 544]
 	cmp	w1, w2
-	bcc	.L3271
+	bcc	.L3270
 	mov	w1, -1
 	str	w1, [x0, 544]
 	ldr	w1, [x0, 548]
@@ -20693,42 +20691,42 @@ gc_scan_static_data:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-.L3266:
+.L3265:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L3271:
+.L3270:
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	bne	.L3266
+	bne	.L3265
 	sub	w20, w20, #1
 	ands	w20, w20, 65535
-	bne	.L3275
-	b	.L3266
-.L3267:
+	bne	.L3274
+	b	.L3265
+.L3266:
 	ldr	w1, [x0, 536]
 	adrp	x3, .LANCHOR104
 	ldr	w2, [x0, 12]
 	add	w1, w1, 12959744
 	add	w1, w1, 256
 	cmp	w2, w1
-	bhi	.L3277
+	bhi	.L3276
 	ldr	x4, [x3, #:lo12:.LANCHOR104]
 	mov	w5, 5000
 	ldr	w1, [x0, 540]
 	add	w1, w1, w5
 	ldr	w4, [x4, 44]
 	cmp	w4, w1
-	bls	.L3266
-.L3277:
+	bls	.L3265
+.L3276:
 	ldr	x1, [x3, #:lo12:.LANCHOR104]
 	ldr	w1, [x1, 44]
 	str	w1, [x0, 540]
 	str	w2, [x0, 536]
 	str	wzr, [x0, 544]
-	b	.L3266
+	b	.L3265
 	.size	gc_scan_static_data, .-gc_scan_static_data
 	.section	.text.ftl_sblk_dump,"ax",@progbits
 	.align	2
@@ -20764,20 +20762,20 @@ ftl_sblk_dump:
 	bl	printf
 	mov	w0, 65535
 	cmp	w20, w0
-	beq	.L3305
+	beq	.L3304
 	adrp	x0, .LANCHOR6
 	ldrh	w0, [x0, #:lo12:.LANCHOR6]
 	cmp	w0, w20
-	bls	.L3305
+	bls	.L3304
 	ldr	x0, [x24, #:lo12:.LANCHOR7]
 	add	x0, x0, x23
 	ldrb	w0, [x0, 2]
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L3306
+	bne	.L3305
 	adrp	x0, .LANCHOR73
 	ldrb	w25, [x0, #:lo12:.LANCHOR73]
-.L3285:
+.L3284:
 	add	x28, x29, 240
 	adrp	x21, .LANCHOR87
 	mov	w0, w20
@@ -20812,50 +20810,50 @@ ftl_sblk_dump:
 	str	wzr, [x29, 176]
 	add	x0, x0, :lo12:.LANCHOR105
 	str	x0, [x29, 112]
-.L3286:
+.L3285:
 	ldr	x0, [x29, 136]
 	ldrh	w0, [x0, #:lo12:.LANCHOR87]
 	cmp	w0, w19
-	bls	.L3302
+	bls	.L3301
 	lsl	w0, w19, 1
 	mov	w22, 0
 	sub	w1, w0, #1
 	add	w0, w0, w19
 	sub	w0, w0, #1
 	stp	w0, w1, [x29, 152]
-	adrp	x0, .LC163
-	add	x0, x0, :lo12:.LC163
+	adrp	x0, .LC167
+	add	x0, x0, :lo12:.LC167
 	str	x0, [x29, 120]
-	b	.L3303
-.L3306:
+	b	.L3302
+.L3305:
 	mov	w25, 1
-	b	.L3285
-.L3299:
+	b	.L3284
+.L3298:
 	ldr	x0, [x29, 128]
 	ldrh	w11, [x28, x0]
 	mov	w0, 65535
 	cmp	w11, w0
-	beq	.L3287
+	beq	.L3286
 	ldr	x0, [x29, 112]
 	cmp	w25, 3
 	ldrh	w8, [x0]
 	mul	w8, w8, w11
 	add	w0, w21, w8
-	bne	.L3288
+	bne	.L3287
 	adrp	x1, .LANCHOR35
 	ldrb	w1, [x1, #:lo12:.LANCHOR35]
-	cbz	w1, .L3289
+	cbz	w1, .L3288
 	adrp	x1, .LANCHOR73
 	ldrb	w8, [x1, #:lo12:.LANCHOR73]
 	ldr	w1, [x29, 152]
-.L3315:
+.L3314:
 	add	w0, w0, w1
 	orr	w27, w0, w8, lsl 24
-	b	.L3290
-.L3289:
+	b	.L3289
+.L3288:
 	add	w8, w19, w8
 	orr	w27, w8, w21, lsl 24
-.L3290:
+.L3289:
 	str	w27, [x26, 40]
 	mov	w1, 1
 	str	w11, [x29, 100]
@@ -20897,22 +20895,22 @@ ftl_sblk_dump:
 	and	w0, w0, 224
 	cmp	w0, 224
 	ccmp	w0, w1, 4, ne
-	beq	.L3287
+	beq	.L3286
 	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 204]
 	cmn	w0, #1
-	bne	.L3293
+	bne	.L3292
 	ldr	x0, [x26, 24]
 	mov	w2, 0
 	add	x1, x29, 204
 	ldr	w0, [x0, 4]
 	bl	pm_log2phys
-.L3293:
+.L3292:
 	ldr	w0, [x29, 204]
 	cmp	w27, w0
-	bne	.L3294
+	bne	.L3293
 	ldr	w0, [x29, 172]
 	mov	w1, w27
 	add	w0, w0, 1
@@ -20923,9 +20921,9 @@ ftl_sblk_dump:
 	adrp	x0, .LC223
 	add	x0, x0, :lo12:.LC223
 	bl	printf
-.L3294:
+.L3293:
 	ldr	x0, [x29, 160]
-	cbz	x0, .L3296
+	cbz	x0, .L3295
 	ldr	x0, [x29, 176]
 	ubfiz	x3, x0, 2, 32
 	ldr	x0, [x29, 160]
@@ -20933,68 +20931,68 @@ ftl_sblk_dump:
 	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	cmp	w0, w2
-	beq	.L3297
+	beq	.L3296
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3297
+	tbz	x0, 12, .L3296
 	ldr	w1, [x29, 176]
 	adrp	x0, .LC224
 	str	x3, [x29, 104]
 	add	x0, x0, :lo12:.LC224
 	bl	printf
 	ldr	x3, [x29, 104]
-.L3297:
+.L3296:
 	ldr	x1, [x26, 24]
 	ldr	x0, [x29, 160]
 	ldr	w1, [x1, 4]
 	ldr	w0, [x0, x3]
 	cmp	w1, w0
-	beq	.L3296
+	beq	.L3295
 	cmn	w0, #1
-	beq	.L3296
-	adrp	x1, .LANCHOR217
+	beq	.L3295
+	adrp	x1, .LANCHOR219
 	adrp	x0, .LC0
-	mov	w2, 1383
-	add	x1, x1, :lo12:.LANCHOR217
+	mov	w2, 1393
+	add	x1, x1, :lo12:.LANCHOR219
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3296:
+.L3295:
 	ldr	w0, [x29, 176]
 	add	w0, w0, 1
 	str	w0, [x29, 176]
-.L3287:
+.L3286:
 	add	w21, w21, 1
 	and	w21, w21, 65535
-.L3301:
+.L3300:
 	cmp	w25, w21
-	bcs	.L3299
+	bcs	.L3298
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L3303:
+.L3302:
 	ldrb	w0, [x29, 217]
 	cmp	w0, w22
-	bls	.L3300
+	bls	.L3299
 	sxtw	x0, w22
 	mov	w21, 1
 	add	x0, x0, 8
 	lsl	x0, x0, 1
 	str	x0, [x29, 128]
-	b	.L3301
-.L3288:
+	b	.L3300
+.L3287:
 	cmp	w25, 2
-	bne	.L3291
+	bne	.L3290
 	adrp	x1, .LANCHOR73
 	ldrb	w8, [x1, #:lo12:.LANCHOR73]
 	ldr	w1, [x29, 156]
-	b	.L3315
-.L3291:
+	b	.L3314
+.L3290:
 	add	w27, w19, w8
-	b	.L3290
-.L3300:
+	b	.L3289
+.L3299:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L3286
-.L3302:
+	b	.L3285
+.L3301:
 	mov	x0, x26
 	bl	zbuf_free
 	adrp	x0, .LANCHOR9
@@ -21007,7 +21005,7 @@ ftl_sblk_dump:
 	add	x0, x0, :lo12:.LC225
 	bl	printf
 	ldr	w0, [x29, 168]
-.L3283:
+.L3282:
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
 	ldp	x23, x24, [sp, 96]
@@ -21016,9 +21014,9 @@ ftl_sblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 288
 	ret
-.L3305:
+.L3304:
 	mov	w0, 0
-	b	.L3283
+	b	.L3282
 	.size	ftl_sblk_dump, .-ftl_sblk_dump
 	.section	.text.zftl_read,"ax",@progbits
 	.align	2
@@ -21032,54 +21030,57 @@ zftl_read:
 	mov	w19, w0
 	adrp	x0, .LANCHOR14
 	stp	x21, x22, [sp, 48]
-	stp	x25, x26, [sp, 80]
+	stp	x23, x24, [sp, 64]
 	mov	w20, w1
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	mov	w25, w2
-	stp	x23, x24, [sp, 64]
+	mov	w23, w2
+	stp	x25, x26, [sp, 80]
 	mov	x22, x3
 	stp	x27, x28, [sp, 96]
-	tbz	x0, 12, .L3317
+	tbz	x0, 12, .L3316
 	mov	w3, w2
 	adrp	x0, .LC226
 	mov	w2, w1
 	add	x0, x0, :lo12:.LC226
 	mov	w1, w19
 	bl	printf
-.L3317:
-	cbnz	w19, .L3318
+.L3316:
+	cbnz	w19, .L3317
 	adrp	x0, .LANCHOR61
 	mov	w19, 24576
 	ldr	w0, [x0, #:lo12:.LANCHOR61]
-.L3319:
-	add	w1, w20, w25
+.L3318:
+	cmp	w0, w20
+	ccmp	w0, w23, 0, hi
+	bcc	.L3348
+	add	w1, w20, w23
 	cmp	w0, w1
 	bcc	.L3348
 	adrp	x1, .LANCHOR104
-	adrp	x26, .LANCHOR125
+	adrp	x26, .LANCHOR126
 	add	w19, w19, w20
 	str	x1, [x29, 120]
 	ldr	x2, [x1, #:lo12:.LANCHOR104]
 	str	x26, [x29, 168]
 	ldr	w0, [x2, 24]
-	add	w0, w0, w25
+	add	w0, w0, w23
 	str	w0, [x2, 24]
-	ldrb	w0, [x26, #:lo12:.LANCHOR125]
-	add	w2, w25, w19
+	ldrb	w0, [x26, #:lo12:.LANCHOR126]
+	add	w2, w23, w19
 	stp	w2, wzr, [x29, 160]
 	sub	w2, w2, #1
 	udiv	w27, w19, w0
 	udiv	w0, w2, w0
 	mov	w20, w27
-	sub	w24, w0, w27
+	sub	w25, w0, w27
 	str	w0, [x29, 156]
-	add	w24, w24, 1
-	adrp	x0, .LANCHOR129
-	add	x28, x0, :lo12:.LANCHOR129
-.L3321:
-	cbnz	w24, .L3346
+	add	w25, w25, 1
+	adrp	x0, .LANCHOR130
+	add	x28, x0, :lo12:.LANCHOR130
+.L3320:
+	cbnz	w25, .L3345
 	ldr	w0, [x29, 164]
-.L3316:
+.L3315:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -21088,157 +21089,157 @@ zftl_read:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 208
 	ret
-.L3318:
+.L3317:
 	cmp	w19, 3
 	bhi	.L3348
 	lsl	w19, w19, 13
 	mov	w0, 8192
-	b	.L3319
-.L3346:
+	b	.L3318
+.L3345:
 	ldr	x0, [x29, 168]
 	cmp	w20, w27
-	ldrb	w1, [x0, #:lo12:.LANCHOR125]
+	ldrb	w1, [x0, #:lo12:.LANCHOR126]
 	ldr	w0, [x29, 156]
-	and	w23, w1, 65535
+	and	w24, w1, 65535
 	ccmp	w20, w0, 4, ne
 	bne	.L3349
 	cmp	w20, w27
-	bne	.L3323
+	bne	.L3322
 	udiv	w3, w19, w1
-	and	w0, w25, 65535
+	and	w0, w23, 65535
 	msub	w1, w3, w1, w19
 	and	w26, w1, 65535
-	sub	w23, w23, w26
-	and	w23, w23, 65535
-	cmp	w25, w23
-	csel	w23, w0, w23, cc
-.L3322:
+	sub	w24, w24, w26
+	and	w24, w24, 65535
+	cmp	w23, w24
+	csel	w24, w0, w24, cc
+.L3321:
 	adrp	x21, .LANCHOR52
 	add	x1, x21, :lo12:.LANCHOR52
 	add	x1, x1, 2
 	mov	w0, 0
-.L3326:
+.L3325:
 	ldr	w2, [x1, 34]
 	cmp	w20, w2
-	bne	.L3324
+	bne	.L3323
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L3324
+	tbz	x2, 3, .L3323
 	add	x1, x21, :lo12:.LANCHOR52
 	ubfiz	x0, x0, 6, 32
 	add	x0, x1, x0
-	lsl	w2, w23, 9
-	ubfiz	x23, x23, 9, 16
+	lsl	w2, w24, 9
+	ubfiz	x24, x24, 9, 16
 	ubfiz	x26, x26, 9, 16
 	ldr	x1, [x0, 8]
 	mov	x0, x22
-	add	x22, x22, x23
+	add	x22, x22, x24
 	add	x1, x1, x26
 	bl	ftl_memcpy
-.L3325:
+.L3324:
 	add	w20, w20, 1
-	sub	w24, w24, #1
-.L3332:
+	sub	w25, w25, #1
+.L3331:
 	adrp	x0, .LANCHOR54
 	ldrb	w0, [x0, #:lo12:.LANCHOR54]
 	cmp	w0, 2
-	bls	.L3333
-	cbnz	w24, .L3321
-.L3333:
-	adrp	x0, .LANCHOR129
-	ldrb	w1, [x0, #:lo12:.LANCHOR129]
-	cbz	w1, .L3321
-	adrp	x23, .LANCHOR128
+	bls	.L3332
+	cbnz	w25, .L3320
+.L3332:
+	adrp	x0, .LANCHOR130
+	ldrb	w1, [x0, #:lo12:.LANCHOR130]
+	cbz	w1, .L3320
+	adrp	x24, .LANCHOR129
 	add	x0, x21, :lo12:.LANCHOR52
-	ldrb	w2, [x23, #:lo12:.LANCHOR128]
+	ldrb	w2, [x24, #:lo12:.LANCHOR129]
 	add	x0, x0, x2, lsl 6
 	bl	sblk_read_page
-	adrp	x0, .LANCHOR218
-	add	x0, x0, :lo12:.LANCHOR218
+	adrp	x0, .LANCHOR220
+	add	x0, x0, :lo12:.LANCHOR220
 	str	x0, [x29, 136]
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	str	x0, [x29, 128]
-.L3335:
+.L3334:
 	ldrb	w0, [x28]
-	cbnz	w0, .L3345
+	cbnz	w0, .L3344
 	mov	w0, -1
 	strb	wzr, [x28]
-	strb	w0, [x23, #:lo12:.LANCHOR128]
-	b	.L3321
-.L3323:
+	strb	w0, [x24, #:lo12:.LANCHOR129]
+	b	.L3320
+.L3322:
 	ldr	w0, [x29, 160]
-	msub	w23, w1, w20, w0
-	and	w23, w23, 255
+	msub	w24, w1, w20, w0
+	and	w24, w24, 255
 .L3349:
 	mov	w26, 0
-	b	.L3322
-.L3324:
+	b	.L3321
+.L3323:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 32
-	bne	.L3326
+	bne	.L3325
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L3327
+	bne	.L3326
 	mov	w2, 0
 	add	x1, x29, 188
 	mov	w0, w20
 	bl	pm_log2phys
-.L3327:
+.L3326:
 	ldr	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L3328
+	bne	.L3327
 	ldr	x0, [x29, 168]
-	mov	w23, 0
-	add	x26, x0, :lo12:.LANCHOR125
-.L3329:
+	mov	w24, 0
+	add	x26, x0, :lo12:.LANCHOR126
+.L3328:
 	ldrb	w0, [x26]
-	cmp	w23, w0
-	bcs	.L3325
-	madd	w0, w20, w0, w23
+	cmp	w24, w0
+	bcs	.L3324
+	madd	w0, w20, w0, w24
 	cmp	w19, w0
-	bhi	.L3330
+	bhi	.L3329
 	ldr	w1, [x29, 160]
 	cmp	w1, w0
-	bls	.L3330
+	bls	.L3329
 	mov	x0, x22
 	add	x22, x22, 512
 	mov	w2, 512
 	mov	w1, 0
 	bl	ftl_memset
-.L3330:
-	add	w23, w23, 1
-	b	.L3329
-.L3328:
+.L3329:
+	add	w24, w24, 1
+	b	.L3328
+.L3327:
 	mov	w0, 0
 	bl	buf_alloc
-	cbz	x0, .L3332
+	cbz	x0, .L3331
 	ldr	x2, [x29, 120]
 	ldr	x4, [x2, #:lo12:.LANCHOR104]
 	ldr	w2, [x4, 40]
 	add	w2, w2, 1
 	str	w2, [x4, 40]
 	ldr	w2, [x29, 188]
-	strb	w23, [x0, 56]
-	ubfiz	x23, x23, 9, 16
+	strb	w24, [x0, 56]
+	ubfiz	x24, x24, 9, 16
 	str	x22, [x0, 16]
-	add	x22, x22, x23
+	add	x22, x22, x24
 	strb	w26, [x0, 57]
 	stp	w20, w2, [x0, 36]
 	str	w2, [x0, 44]
 	bl	zftl_add_read_buf
-	b	.L3325
-.L3345:
-	ldrb	w0, [x23, #:lo12:.LANCHOR128]
+	b	.L3324
+.L3344:
+	ldrb	w0, [x24, #:lo12:.LANCHOR129]
 	cmp	w0, 255
-	bne	.L3336
+	bne	.L3335
 	ldp	x0, x1, [x29, 128]
-	mov	w2, 1088
+	mov	w2, 1090
 	bl	printf
-.L3336:
-	ldrb	w26, [x23, #:lo12:.LANCHOR128]
+.L3335:
+	ldrb	w26, [x24, #:lo12:.LANCHOR129]
 	add	x0, x21, :lo12:.LANCHOR52
 	ubfiz	x1, x26, 6, 8
 	lsl	x2, x26, 6
@@ -21246,27 +21247,27 @@ zftl_read:
 	str	x1, [x29, 144]
 	add	x1, x0, x2
 	ldrb	w0, [x0, x2]
-	strb	w0, [x23, #:lo12:.LANCHOR128]
+	strb	w0, [x24, #:lo12:.LANCHOR129]
 	ldr	w10, [x1, 52]
 	cmn	w10, #1
-	bne	.L3337
+	bne	.L3336
 	adrp	x0, .LANCHOR10
 	str	w10, [x29, 164]
 	ldr	x1, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x1, 552]
 	add	w0, w0, 1
 	str	w0, [x1, 552]
-.L3338:
+.L3337:
 	add	x1, x21, :lo12:.LANCHOR52
 	add	x1, x1, x26, lsl 6
 	ldr	x0, [x1, 24]
 	ldr	w3, [x1, 36]
 	ldr	w1, [x0, 4]
 	cmp	w1, w3
-	bne	.L3339
+	bne	.L3338
 	cmn	w10, #1
-	bne	.L3340
-.L3339:
+	bne	.L3339
+.L3338:
 	adrp	x1, .LANCHOR10
 	add	x11, x21, :lo12:.LANCHOR52
 	add	x11, x11, x26, lsl 6
@@ -21306,28 +21307,28 @@ zftl_read:
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
 	ldr	w10, [x29, 152]
-.L3340:
+.L3339:
 	add	x0, x21, :lo12:.LANCHOR52
 	add	x0, x0, x26, lsl 6
 	ldr	x1, [x0, 24]
 	ldr	w0, [x0, 36]
 	ldr	w1, [x1, 4]
 	cmp	w1, w0
-	bne	.L3341
+	bne	.L3340
 	cmn	w10, #1
-	bne	.L3342
-.L3341:
+	bne	.L3341
+.L3340:
 	ldp	x0, x1, [x29, 128]
-	mov	w2, 1109
+	mov	w2, 1111
 	bl	printf
-.L3342:
+.L3341:
 	add	x0, x21, :lo12:.LANCHOR52
 	add	x8, x0, x26, lsl 6
 	ldr	x0, [x29, 168]
 	ldrb	w2, [x8, 56]
-	ldrb	w0, [x0, #:lo12:.LANCHOR125]
+	ldrb	w0, [x0, #:lo12:.LANCHOR126]
 	cmp	w0, w2
-	bls	.L3343
+	bls	.L3342
 	ldrb	w0, [x8, 57]
 	lsl	w2, w2, 9
 	ldr	x1, [x8, 8]
@@ -21335,20 +21336,20 @@ zftl_read:
 	add	x1, x1, x0
 	ldr	x0, [x8, 16]
 	bl	ftl_memcpy
-.L3344:
+.L3343:
 	ldr	x1, [x29, 144]
-	adrp	x0, .LANCHOR131
-	add	x0, x0, :lo12:.LANCHOR131
+	adrp	x0, .LANCHOR132
+	add	x0, x0, :lo12:.LANCHOR132
 	bl	buf_remove_buf
 	ldr	x0, [x29, 144]
 	bl	zbuf_free
 	ldrb	w0, [x28]
 	sub	w0, w0, #1
 	strb	w0, [x28]
-	b	.L3335
-.L3337:
+	b	.L3334
+.L3336:
 	cmp	w10, 256
-	bne	.L3338
+	bne	.L3337
 	adrp	x2, .LANCHOR31
 	adrp	x0, .LANCHOR68
 	mov	w4, 24
@@ -21378,15 +21379,15 @@ zftl_read:
 	mov	w0, w4
 	bl	gc_add_sblk
 	ldr	w10, [x29, 108]
-	b	.L3338
-.L3343:
+	b	.L3337
+.L3342:
 	ldrb	w0, [x8, 2]
 	and	w0, w0, -9
 	strb	w0, [x8, 2]
-	b	.L3344
+	b	.L3343
 .L3348:
 	mov	w0, -1
-	b	.L3316
+	b	.L3315
 	.size	zftl_read, .-zftl_read
 	.section	.text.ftl_vendor_read,"ax",@progbits
 	.align	2
@@ -21460,48 +21461,48 @@ gc_check_data_one_wl:
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x19, x20, [sp, 32]
-	adrp	x20, .LANCHOR64
-	add	x19, x20, :lo12:.LANCHOR64
+	adrp	x19, .LANCHOR64
+	add	x20, x19, :lo12:.LANCHOR64
 	stp	x21, x22, [sp, 48]
 	stp	x23, x24, [sp, 64]
 	adrp	x22, .LANCHOR10
 	stp	x25, x26, [sp, 80]
-	ldr	x0, [x19, 8]
+	ldr	x0, [x20, 8]
 	stp	x27, x28, [sp, 96]
 	ldr	x23, [x22, #:lo12:.LANCHOR10]
 	cbnz	x0, .L3371
 	mov	w0, 1
 	bl	buf_alloc
-	str	x0, [x19, 8]
+	str	x0, [x20, 8]
 .L3371:
-	add	x0, x20, :lo12:.LANCHOR64
-	ldr	x19, [x0, 8]
-	cbnz	x19, .L3372
-	adrp	x1, .LANCHOR219
+	add	x0, x19, :lo12:.LANCHOR64
+	ldr	x20, [x0, 8]
+	cbnz	x20, .L3372
+	adrp	x1, .LANCHOR221
 	adrp	x0, .LC0
-	mov	w2, 612
-	add	x1, x1, :lo12:.LANCHOR219
+	mov	w2, 614
+	add	x1, x1, :lo12:.LANCHOR221
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 .L3372:
 	adrp	x4, .LANCHOR105
 	add	x28, x23, 96
-	add	x27, x23, 80
+	add	x24, x23, 80
 	add	x4, x4, :lo12:.LANCHOR105
-	mov	w26, 0
+	mov	w27, 0
 .L3373:
-	ldrb	w0, [x27, 9]
-	cmp	w26, w0
-	bge	.L3383
-	adrp	x25, .LANCHOR73
-	mov	w24, 1
-	add	x21, x20, :lo12:.LANCHOR64
-	add	x25, x25, :lo12:.LANCHOR73
-	b	.L3384
-.L3382:
+	ldrb	w0, [x24, 9]
+	cmp	w27, w0
+	bge	.L3384
+	adrp	x26, .LANCHOR73
+	mov	w25, 1
+	add	x21, x19, :lo12:.LANCHOR64
+	add	x26, x26, :lo12:.LANCHOR73
+	b	.L3385
+.L3383:
 	ldrh	w0, [x28]
 	ldrh	w1, [x4]
-	ldrb	w2, [x25]
+	ldrb	w2, [x26]
 	cmp	w2, 2
 	mul	w1, w0, w1
 	beq	.L3374
@@ -21511,84 +21512,86 @@ gc_check_data_one_wl:
 .L3374:
 	ldrh	w0, [x21, 16]
 	sub	w3, w0, #1
-	add	w0, w24, w1
+	add	w0, w25, w1
 	add	w0, w3, w0
 	orr	w2, w0, w2, lsl 24
-	str	w2, [x19, 40]
+	str	w2, [x20, 40]
 .L3376:
-	mov	w1, 1
 	str	x4, [x29, 104]
-	mov	x0, x19
+	mov	w1, 1
+	mov	x0, x20
 	bl	sblk_read_page
-	ldr	w0, [x19, 52]
-	adrp	x1, .LANCHOR155
+	ldr	w2, [x20, 52]
+	adrp	x8, .LANCHOR157
 	ldr	x4, [x29, 104]
-	cmn	w0, #1
+	cmn	w2, #1
 	beq	.L3378
 	ldrh	w0, [x21, 22]
-	ldr	x3, [x1, #:lo12:.LANCHOR155]
-	ldr	x2, [x19, 24]
+	ldr	x3, [x8, #:lo12:.LANCHOR157]
+	ldr	x1, [x20, 24]
 	lsl	x0, x0, 2
 	ldr	w5, [x3, x0]
-	ldr	w3, [x2, 4]
+	ldr	w3, [x1, 4]
 	cmp	w5, w3
 	bne	.L3378
-	adrp	x3, .LANCHOR156
-	ldr	x3, [x3, #:lo12:.LANCHOR156]
+	adrp	x3, .LANCHOR158
+	ldr	x3, [x3, #:lo12:.LANCHOR158]
 	ldr	w3, [x3, x0]
-	ldr	w0, [x2, 8]
+	ldr	w0, [x1, 8]
 	cmp	w3, w0
 	beq	.L3379
 .L3378:
-	add	x5, x1, :lo12:.LANCHOR155
 	ldrh	w0, [x21, 22]
-	ldr	x1, [x1, #:lo12:.LANCHOR155]
-	ldr	w0, [x1, x0, lsl 2]
-	cmn	w0, #1
+	ldr	x1, [x8, #:lo12:.LANCHOR157]
+	lsl	x0, x0, 2
+	ldr	w3, [x1, x0]
+	cmn	w3, #1
 	beq	.L3379
-	adrp	x20, .LANCHOR79
-	ldrb	w3, [x27, 9]
-	str	x5, [x29, 104]
-	mov	w2, 4
-	ldrh	w0, [x20, #:lo12:.LANCHOR79]
-	mul	w3, w3, w0
+	adrp	x1, .LANCHOR14
+	ldr	w1, [x1, #:lo12:.LANCHOR14]
+	tbz	x1, 10, .L3380
+	ldr	x1, [x20, 24]
+	adrp	x4, .LANCHOR158
+	str	x8, [x29, 104]
+	ldr	x4, [x4, #:lo12:.LANCHOR158]
+	ldr	w5, [x1, 12]
+	str	w5, [sp]
+	ldr	w4, [x4, x0]
 	adrp	x0, .LC229
+	ldp	w5, w6, [x1]
 	add	x0, x0, :lo12:.LC229
-	bl	rknand_print_hex
-	ldrh	w0, [x20, #:lo12:.LANCHOR79]
-	adrp	x20, .LANCHOR156
-	ldrb	w3, [x27, 9]
+	ldr	w7, [x1, 8]
+	ldr	w1, [x20, 40]
+	bl	printf
+	ldr	x8, [x29, 104]
+.L3380:
+	adrp	x0, .LANCHOR118
+	mov	x21, x0
+	ldrb	w1, [x0, #:lo12:.LANCHOR118]
+	cbnz	w1, .L3381
+	adrp	x19, .LANCHOR79
+	ldrb	w3, [x24, 9]
+	ldr	x1, [x8, #:lo12:.LANCHOR157]
 	mov	w2, 4
-	ldr	x1, [x20, #:lo12:.LANCHOR156]
+	ldrh	w0, [x19, #:lo12:.LANCHOR79]
 	mul	w3, w3, w0
 	adrp	x0, .LC230
 	add	x0, x0, :lo12:.LC230
 	bl	rknand_print_hex
-	adrp	x0, .LANCHOR14
-	ldr	x5, [x29, 104]
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L3380
-	ldr	x1, [x19, 24]
-	ldrh	w0, [x21, 22]
-	ldr	x2, [x5]
-	ldr	x3, [x20, #:lo12:.LANCHOR156]
-	lsl	x0, x0, 2
-	ldr	w4, [x1, 12]
-	str	w4, [sp]
-	ldr	w4, [x3, x0]
-	ldp	w5, w6, [x1]
-	ldr	w3, [x2, x0]
+	ldrh	w0, [x19, #:lo12:.LANCHOR79]
+	mov	w2, 4
+	ldrb	w3, [x24, 9]
+	mul	w3, w3, w0
+	adrp	x0, .LANCHOR158
+	ldr	x1, [x0, #:lo12:.LANCHOR158]
 	adrp	x0, .LC231
-	ldr	w7, [x1, 8]
 	add	x0, x0, :lo12:.LC231
-	ldr	w1, [x19, 40]
-	ldr	w2, [x19, 52]
-	bl	printf
-.L3380:
+	bl	rknand_print_hex
 	ldr	x0, [x22, #:lo12:.LANCHOR10]
 	mov	x1, 0
 	ldrh	w0, [x0, 80]
 	bl	ftl_sblk_dump
+.L3381:
 	adrp	x0, .LANCHOR9
 	ldrh	w1, [x23, 80]
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
@@ -21603,10 +21606,12 @@ gc_check_data_one_wl:
 	mov	w0, 20041
 	movk	w0, 0x444b, lsl 16
 	cmp	w1, w0
-	bne	.L3385
-	ldr	w0, [x19, 40]
+	bne	.L3387
+	ldrb	w0, [x21, #:lo12:.LANCHOR118]
+	cbnz	w0, .L3387
+	ldr	w0, [x20, 40]
 	bl	ftl_mask_bad_block
-.L3385:
+.L3387:
 	mov	w0, -1
 .L3370:
 	ldp	x19, x20, [sp, 32]
@@ -21622,34 +21627,34 @@ gc_check_data_one_wl:
 	cmp	w2, 3
 	add	w0, w0, w1
 	bne	.L3377
-	orr	w0, w0, w24, lsl 24
+	orr	w0, w0, w25, lsl 24
 .L3377:
-	str	w0, [x19, 40]
+	str	w0, [x20, 40]
 	b	.L3376
 .L3379:
 	ldrh	w0, [x21, 22]
-	add	w24, w24, 1
+	add	w25, w25, 1
 	add	w0, w0, 1
 	strh	w0, [x21, 22]
-.L3384:
+.L3385:
 	ldrh	w0, [x21, 20]
-	cmp	w24, w0
-	ble	.L3382
-	add	w26, w26, 1
+	cmp	w25, w0
+	ble	.L3383
+	add	w27, w27, 1
 	add	x28, x28, 2
 	b	.L3373
-.L3383:
-	add	x20, x20, :lo12:.LANCHOR64
-	ldrh	w0, [x20, 16]
+.L3384:
+	add	x19, x19, :lo12:.LANCHOR64
+	ldrh	w0, [x19, 16]
 	add	w1, w0, 1
-	strh	w1, [x20, 16]
+	strh	w1, [x19, 16]
 	adrp	x1, .LANCHOR74
 	ldrb	w1, [x1, #:lo12:.LANCHOR74]
-	cbz	w1, .L3386
+	cbz	w1, .L3388
 	add	w0, w0, 2
-	strh	w0, [x20, 16]
-.L3386:
-.L3381:
+	strh	w0, [x19, 16]
+.L3388:
+.L3382:
 	mov	w0, 0
 	b	.L3370
 	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
@@ -21678,26 +21683,26 @@ ftl_update_l2p_map:
 	add	x1, x19, x23, sxtw 2
 	ldr	w1, [x1, -4]
 	cmn	w1, #1
-	beq	.L3401
-	adrp	x1, .LANCHOR220
+	beq	.L3403
+	adrp	x1, .LANCHOR222
 	adrp	x0, .LC0
-	mov	w2, 1733
-	add	x1, x1, :lo12:.LANCHOR220
+	mov	w2, 1743
+	add	x1, x1, :lo12:.LANCHOR222
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3401:
-	adrp	x27, .LANCHOR125
+.L3403:
+	adrp	x27, .LANCHOR126
 	mov	x24, 0
-	add	x0, x27, :lo12:.LANCHOR125
+	add	x0, x27, :lo12:.LANCHOR126
 	mov	w21, 0
 	str	x0, [x29, 96]
-.L3402:
+.L3404:
 	cmp	w24, w23
-	blt	.L3408
+	blt	.L3410
 	adrp	x0, .LANCHOR14
 	adrp	x19, .LANCHOR9
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3409
+	tbz	x0, 12, .L3411
 	ldrh	w1, [x22]
 	ldr	x2, [x19, #:lo12:.LANCHOR9]
 	ubfiz	x0, x1, 1, 16
@@ -21706,7 +21711,7 @@ ftl_update_l2p_map:
 	mov	w2, w21
 	add	x0, x0, :lo12:.LC235
 	bl	printf
-.L3409:
+.L3411:
 	ldrh	w1, [x22]
 	ldr	x0, [x19, #:lo12:.LANCHOR9]
 	ldp	x23, x24, [sp, 48]
@@ -21717,38 +21722,38 @@ ftl_update_l2p_map:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L3408:
+.L3410:
 	ldr	w2, [x19, x24, lsl 2]
 	cmn	w2, #1
-	beq	.L3403
-	ldrb	w20, [x27, #:lo12:.LANCHOR125]
+	beq	.L3405
+	ldrb	w20, [x27, #:lo12:.LANCHOR126]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	lsl	w20, w20, 7
 	udiv	w20, w2, w20
 	and	w20, w20, 65535
-	tbz	x0, 12, .L3404
+	tbz	x0, 12, .L3406
 	adrp	x0, .LC232
 	mov	w3, w24
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC232
 	bl	printf
-.L3404:
+.L3406:
 	adrp	x25, .LANCHOR105
 	adrp	x26, .LC233
 	mov	x28, x24
 	add	x25, x25, :lo12:.LANCHOR105
 	add	x26, x26, :lo12:.LC233
-.L3407:
+.L3409:
 	ldr	w1, [x19, x28, lsl 2]
 	cmn	w1, #1
-	beq	.L3405
+	beq	.L3407
 	ldr	x0, [x29, 96]
 	ldrb	w2, [x0]
 	lsl	w2, w2, 7
 	udiv	w1, w1, w2
 	cmp	w20, w1, uxth
-	bne	.L3405
+	bne	.L3407
 	ldrb	w0, [x22, 9]
 	sdiv	w1, w28, w0
 	msub	w0, w1, w0, w28
@@ -21760,7 +21765,7 @@ ftl_update_l2p_map:
 	str	w2, [x29, 124]
 	ldr	w1, [x19, x28, lsl 2]
 	bl	pm_ppa_update_check
-	cbz	w0, .L3406
+	cbz	w0, .L3408
 	ldr	x0, [x29, 104]
 	mov	w3, w23
 	mov	w2, 4
@@ -21768,7 +21773,7 @@ ftl_update_l2p_map:
 	adrp	x0, .LC234
 	add	x0, x0, :lo12:.LC234
 	bl	rknand_print_hex
-.L3406:
+.L3408:
 	ldr	w0, [x19, x28, lsl 2]
 	add	w21, w21, 1
 	mov	w2, 1
@@ -21777,13 +21782,13 @@ ftl_update_l2p_map:
 	bl	pm_log2phys
 	mov	w0, -1
 	str	w0, [x19, x28, lsl 2]
-.L3405:
+.L3407:
 	add	x28, x28, 1
 	cmp	w23, w28
-	bgt	.L3407
-.L3403:
+	bgt	.L3409
+.L3405:
 	add	x24, x24, 1
-	b	.L3402
+	b	.L3404
 	.size	ftl_update_l2p_map, .-ftl_update_l2p_map
 	.section	.text.ftl_alloc_new_data_sblk,"ax",@progbits
 	.align	2
@@ -21801,9 +21806,9 @@ ftl_alloc_new_data_sblk:
 	ldrh	w0, [x20]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3431
+	beq	.L3433
 	bl	zftl_insert_data_list
-.L3431:
+.L3433:
 	adrp	x19, .LANCHOR10
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	add	x0, x0, 16
@@ -21815,10 +21820,10 @@ ftl_alloc_new_data_sblk:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldr	w0, [x0, 560]
 	cmp	w0, w21
-	bne	.L3433
+	bne	.L3435
 	mov	w20, 65535
 	cmp	w21, w20
-	beq	.L3433
+	beq	.L3435
 	mov	w1, w21
 	adrp	x0, .LC236
 	add	x0, x0, :lo12:.LC236
@@ -21830,7 +21835,7 @@ ftl_alloc_new_data_sblk:
 	mov	w1, -1
 	str	w20, [x0, 560]
 	str	w1, [x0, 564]
-.L3433:
+.L3435:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
@@ -21855,10 +21860,10 @@ ftl_write_commit:
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-.L3437:
+.L3439:
 	adrp	x2, .LANCHOR60
 	ldrb	w1, [x2, #:lo12:.LANCHOR60]
-	cbz	w1, .L3439
+	cbz	w1, .L3441
 	adrp	x3, .LANCHOR59
 	adrp	x0, .LANCHOR52
 	add	x0, x0, :lo12:.LANCHOR52
@@ -21872,29 +21877,29 @@ ftl_write_commit:
 	add	x5, x0, x4
 	ldrb	w0, [x0, x4]
 	strb	w0, [x3, #:lo12:.LANCHOR59]
-	adrp	x0, .LANCHOR122
+	adrp	x0, .LANCHOR123
 	ldr	w2, [x5, 36]
 	mov	x19, x0
-	ldr	w1, [x0, #:lo12:.LANCHOR122]
+	ldr	w1, [x0, #:lo12:.LANCHOR123]
 	cmp	w2, w1
-	bcc	.L3441
-	adrp	x1, .LANCHOR221
+	bcc	.L3443
+	adrp	x1, .LANCHOR223
 	adrp	x0, .LC0
 	mov	w2, 510
-	add	x1, x1, :lo12:.LANCHOR221
+	add	x1, x1, :lo12:.LANCHOR223
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3441:
+.L3443:
 	ldr	x0, [x29, 112]
-	ldr	w1, [x19, #:lo12:.LANCHOR122]
+	ldr	w1, [x19, #:lo12:.LANCHOR123]
 	add	x0, x23, x0, lsl 6
 	ldr	w22, [x0, 36]
 	cmp	w22, w1
-	bcc	.L3442
+	bcc	.L3444
 	ldr	x0, [x29, 120]
 	bl	zbuf_free
 	mov	w0, -1
-.L3436:
+.L3438:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -21902,25 +21907,25 @@ ftl_write_commit:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L3442:
+.L3444:
 	ldrb	w21, [x0, 57]
 	ldrb	w20, [x0, 56]
 	ldr	x26, [x0, 8]
 	ldr	x28, [x0, 24]
-	adrp	x0, .LANCHOR123
+	adrp	x0, .LANCHOR124
 	str	x0, [x29, 104]
-	ldrb	w1, [x0, #:lo12:.LANCHOR123]
-	cbz	w1, .L3444
-	adrp	x0, .LANCHOR177
-	ldrb	w1, [x0, #:lo12:.LANCHOR177]
+	ldrb	w1, [x0, #:lo12:.LANCHOR124]
+	cbz	w1, .L3446
+	adrp	x0, .LANCHOR178
+	ldrb	w1, [x0, #:lo12:.LANCHOR178]
 	add	x1, x23, x1, lsl 6
-.L3445:
+.L3447:
 	ldrb	w0, [x1]
 	cmp	w0, 255
-	bne	.L3446
+	bne	.L3448
 	ldr	w0, [x1, 36]
 	cmp	w22, w0
-	bne	.L3444
+	bne	.L3446
 	ldr	x0, [x1, 8]
 	ubfiz	x21, x21, 9, 8
 	lsl	w2, w20, 9
@@ -21929,33 +21934,33 @@ ftl_write_commit:
 	bl	ftl_memcpy
 	ldr	x0, [x29, 120]
 	bl	zbuf_free
-	b	.L3437
-.L3446:
+	b	.L3439
+.L3448:
 	ubfiz	x1, x0, 6, 8
 	add	x1, x23, x1
-	b	.L3445
-.L3444:
+	b	.L3447
+.L3446:
 	mov	w0, w22
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 140]
 	cmn	w0, #1
-	bne	.L3448
+	bne	.L3450
 	mov	w2, 0
 	add	x1, x29, 140
 	mov	w0, w22
 	bl	pm_log2phys
-.L3448:
+.L3450:
 	adrp	x25, .LANCHOR10
 	add	x1, x23, 2
 	mov	w0, 0
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 16
-.L3451:
+.L3453:
 	ldr	w2, [x1, 34]
 	cmp	w22, w2
-	bne	.L3449
+	bne	.L3451
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L3449
+	tbz	x2, 3, .L3451
 	ubfiz	x0, x0, 6, 32
 	and	w2, w2, -9
 	add	x0, x23, x0
@@ -21963,50 +21968,50 @@ ftl_write_commit:
 	ldr	x24, [x0, 8]
 	ldr	w0, [x0, 40]
 	str	w0, [x29, 140]
-.L3450:
-	adrp	x0, .LANCHOR125
+.L3452:
+	adrp	x0, .LANCHOR126
 	str	x0, [x29, 96]
-	ldrb	w1, [x0, #:lo12:.LANCHOR125]
+	ldrb	w1, [x0, #:lo12:.LANCHOR126]
 	cmp	w20, w1
-	bcs	.L3475
+	bcs	.L3477
 	add	w20, w21, w20
-	cbz	x24, .L3453
-	cbz	w21, .L3454
+	cbz	x24, .L3455
+	cbz	w21, .L3456
 	lsl	w2, w21, 9
 	mov	x1, x24
 	mov	x0, x26
 	bl	ftl_memcpy
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 48
-.L3454:
+.L3456:
 	ldr	x0, [x29, 96]
-	ldrb	w2, [x0, #:lo12:.LANCHOR125]
+	ldrb	w2, [x0, #:lo12:.LANCHOR126]
 	cmp	w20, w2
-	bcc	.L3455
+	bcc	.L3457
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 16
-.L3475:
+.L3477:
 	mov	w24, 0
-	b	.L3452
-.L3449:
+	b	.L3454
+.L3451:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 32
-	bne	.L3451
+	bne	.L3453
 	mov	x24, 0
-	b	.L3450
-.L3455:
+	b	.L3452
+.L3457:
 	ubfiz	x0, x20, 9, 9
 	sub	w2, w2, w20
 	add	x1, x24, x0
 	lsl	w2, w2, 9
 	add	x0, x26, x0
 	bl	ftl_memcpy
-	b	.L3475
-.L3453:
+	b	.L3477
+.L3455:
 	ldr	w0, [x29, 140]
 	cmn	w0, #1
-	beq	.L3456
+	beq	.L3458
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 140]
@@ -22019,11 +22024,11 @@ ftl_write_commit:
 	ldr	w0, [x0, 4]
 	add	w24, w24, 1
 	cmp	w22, w0
-	bne	.L3457
+	bne	.L3459
 	ldr	w0, [x27, 52]
 	cmn	w0, #1
-	bne	.L3458
-.L3457:
+	bne	.L3460
+.L3459:
 	ldr	x1, [x25, #:lo12:.LANCHOR10]
 	mov	w3, w22
 	ldr	w4, [x27, 52]
@@ -22037,67 +22042,67 @@ ftl_write_commit:
 	bl	printf
 	ldr	x1, [x27, 24]
 	mov	w3, 4
-	adrp	x0, .LC195
+	adrp	x0, .LC194
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC195
+	add	x0, x0, :lo12:.LC194
 	bl	rknand_print_hex
-.L3458:
+.L3460:
 	ldr	x0, [x27, 24]
 	ldr	w0, [x0, 4]
 	cmp	w22, w0
-	bne	.L3459
+	bne	.L3461
 	ldr	w0, [x27, 52]
 	cmn	w0, #1
-	bne	.L3460
-.L3459:
-	adrp	x1, .LANCHOR221
+	bne	.L3462
+.L3461:
+	adrp	x1, .LANCHOR223
 	adrp	x0, .LC0
 	mov	w2, 581
-	add	x1, x1, :lo12:.LANCHOR221
+	add	x1, x1, :lo12:.LANCHOR223
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3460:
-	cbz	w21, .L3461
+.L3462:
+	cbz	w21, .L3463
 	ldr	w0, [x29, 140]
 	lsl	w2, w21, 9
 	cmn	w0, #1
-	beq	.L3462
+	beq	.L3464
 	ldr	x1, [x27, 8]
 	mov	x0, x26
 	bl	ftl_memcpy
-.L3463:
+.L3465:
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 48
-.L3461:
+.L3463:
 	ldr	x0, [x29, 96]
-	ldrb	w2, [x0, #:lo12:.LANCHOR125]
+	ldrb	w2, [x0, #:lo12:.LANCHOR126]
 	cmp	w20, w2
-	bcc	.L3464
-	bls	.L3465
+	bcc	.L3466
+	bls	.L3467
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 16
-.L3465:
-	cbz	x27, .L3452
+.L3467:
+	cbz	x27, .L3454
 	ldrb	w0, [x27, 2]
 	mov	x1, x27
 	and	w0, w0, -9
 	strb	w0, [x27, 2]
-	adrp	x0, .LANCHOR131
-	add	x0, x0, :lo12:.LANCHOR131
+	adrp	x0, .LANCHOR132
+	add	x0, x0, :lo12:.LANCHOR132
 	bl	buf_remove_buf
 	mov	x0, x27
 	bl	zbuf_free
-.L3452:
+.L3454:
 	ldrh	w0, [x19, 6]
-	cbnz	w0, .L3467
+	cbnz	w0, .L3469
 	bl	ftl_flush
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L3467:
+.L3469:
 	mov	x0, x19
 	bl	ftl_get_new_free_page
 	ldr	x1, [x29, 112]
-	adrp	x20, .LANCHOR177
+	adrp	x20, .LANCHOR178
 	lsl	x2, x1, 6
 	add	x1, x23, x2
 	ldr	w3, [x1, 32]
@@ -22118,114 +22123,114 @@ ftl_write_commit:
 	sub	w0, w0, #1
 	strh	w0, [x1, 48]
 	ldr	x1, [x29, 120]
-	add	x0, x20, :lo12:.LANCHOR177
+	add	x0, x20, :lo12:.LANCHOR178
 	bl	buf_add_tail
 	ldr	x0, [x29, 104]
-	ldrb	w2, [x0, #:lo12:.LANCHOR123]
+	ldrb	w2, [x0, #:lo12:.LANCHOR124]
 	add	w2, w2, 1
 	and	w2, w2, 255
-	strb	w2, [x0, #:lo12:.LANCHOR123]
-	adrp	x0, .LANCHOR222
+	strb	w2, [x0, #:lo12:.LANCHOR124]
+	adrp	x0, .LANCHOR224
 	cmp	w2, 2
-	str	wzr, [x0, #:lo12:.LANCHOR222]
+	str	wzr, [x0, #:lo12:.LANCHOR224]
 	ldrh	w0, [x19, 6]
-	bhi	.L3468
+	bhi	.L3470
 	cmp	w0, 1
-	bne	.L3440
-.L3468:
+	bne	.L3442
+.L3470:
 	ldrb	w1, [x19, 5]
 	cmp	w1, 0
 	mov	w1, 0
 	cset	w4, ne
 	cmp	w0, 1
-	ldrb	w0, [x20, #:lo12:.LANCHOR177]
+	ldrb	w0, [x20, #:lo12:.LANCHOR178]
 	csinc	w4, w2, w4, eq
 	mov	w3, w0
-.L3472:
+.L3474:
 	cmp	w1, w4
-	bne	.L3473
-	strb	w3, [x20, #:lo12:.LANCHOR177]
+	bne	.L3475
+	strb	w3, [x20, #:lo12:.LANCHOR178]
 	and	w1, w1, 255
 	ldr	x3, [x29, 104]
 	sub	w2, w2, w1
 	ubfiz	x0, x0, 6, 8
 	add	x0, x23, x0
-	strb	w2, [x3, #:lo12:.LANCHOR123]
+	strb	w2, [x3, #:lo12:.LANCHOR124]
 	bl	sblk_prog_page
 	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bne	.L3440
+	bne	.L3442
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	mov	x0, x19
 	bl	ftl_write_last_log_page
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L3440:
+.L3442:
 	adrp	x0, .LANCHOR60
 	ldrb	w0, [x0, #:lo12:.LANCHOR60]
-	cbnz	w0, .L3437
-.L3439:
+	cbnz	w0, .L3439
+.L3441:
 	bl	ftl_write_completed
 	mov	w0, 0
-	b	.L3436
-.L3464:
+	b	.L3438
+.L3466:
 	ldr	w0, [x29, 140]
 	sub	w2, w2, w20
 	lsl	w2, w2, 9
 	cmn	w0, #1
 	ubfiz	x0, x20, 7, 9
-	beq	.L3466
+	beq	.L3468
 	ldr	x1, [x27, 8]
 	lsl	x0, x0, 2
 	add	x1, x1, x0
 	add	x0, x26, x0
 	bl	ftl_memcpy
-	b	.L3465
-.L3466:
+	b	.L3467
+.L3468:
 	mov	w1, 0
 	add	x0, x26, x0, lsl 2
 	bl	ftl_memset
-	b	.L3465
-.L3473:
+	b	.L3467
+.L3475:
 	ubfiz	x3, x3, 6, 8
 	add	w1, w1, 1
 	ldrb	w3, [x23, x3]
-	b	.L3472
-.L3474:
+	b	.L3474
+.L3476:
 	lsl	w2, w21, 9
 	mov	x27, 0
 	mov	w24, 0
-.L3462:
+.L3464:
 	mov	w1, 0
 	mov	x0, x26
 	bl	ftl_memset
-	b	.L3463
-.L3456:
-	cbnz	w21, .L3474
+	b	.L3465
+.L3458:
+	cbnz	w21, .L3476
 	mov	w24, 0
 	mov	x27, 0
-	b	.L3461
+	b	.L3463
 	.size	ftl_write_commit, .-ftl_write_commit
 	.section	.text.gc_do_copy_back,"ax",@progbits
 	.align	2
 	.global	gc_do_copy_back
 	.type	gc_do_copy_back, %function
 gc_do_copy_back:
-	sub	sp, sp, #240
+	sub	sp, sp, #208
 	adrp	x0, .LANCHOR78
-	stp	x29, x30, [sp, 32]
-	add	x29, sp, 32
+	stp	x29, x30, [sp, 16]
+	add	x29, sp, 16
 	ldrb	w0, [x0, #:lo12:.LANCHOR78]
-	stp	x19, x20, [sp, 48]
-	stp	x21, x22, [sp, 64]
-	stp	x23, x24, [sp, 80]
-	stp	x25, x26, [sp, 96]
-	stp	x27, x28, [sp, 112]
-	cbnz	w0, .L3498
+	stp	x19, x20, [sp, 32]
+	stp	x21, x22, [sp, 48]
+	stp	x23, x24, [sp, 64]
+	stp	x25, x26, [sp, 80]
+	stp	x27, x28, [sp, 96]
+	cbnz	w0, .L3500
 	bl	buf_alloc
 	mov	x19, x0
-	cbz	x0, .L3497
+	cbz	x0, .L3499
 	adrp	x21, .LANCHOR64
 	add	x3, x21, :lo12:.LANCHOR64
 	ldrh	w2, [x3, 26]
@@ -22241,44 +22246,44 @@ gc_do_copy_back:
 	ldr	w0, [x19, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3500
-	adrp	x1, .LANCHOR223
+	bne	.L3502
+	adrp	x1, .LANCHOR225
 	adrp	x0, .LC0
-	mov	w2, 863
-	add	x1, x1, :lo12:.LANCHOR223
+	mov	w2, 868
+	add	x1, x1, :lo12:.LANCHOR225
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3500:
+.L3502:
 	ldr	x0, [x19, 24]
 	ldr	w20, [x0, 4]
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
-	str	w0, [x29, 160]
+	str	w0, [x29, 144]
 	cmn	w0, #1
-	bne	.L3501
+	bne	.L3503
 	mov	w2, 0
-	add	x1, x29, 160
+	add	x1, x29, 144
 	mov	w0, w20
 	bl	pm_log2phys
-.L3501:
-	ldr	w23, [x29, 160]
+.L3503:
+	ldr	w23, [x29, 144]
 	cmp	w22, w23
-	bne	.L3502
+	bne	.L3504
 	adrp	x0, .LANCHOR52
 	add	x0, x0, :lo12:.LANCHOR52
 	add	x1, x0, 2
 	add	x0, x0, 2050
-.L3505:
+.L3507:
 	ldr	w2, [x1, 34]
 	cmp	w20, w2
-	bne	.L3503
+	bne	.L3505
 	ldrb	w2, [x1]
-	tbz	x2, 1, .L3503
+	tbz	x2, 1, .L3505
 	mov	x0, x19
 	bl	zbuf_free
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3497
+	tbz	x0, 8, .L3499
 	add	x21, x21, :lo12:.LANCHOR64
 	adrp	x0, .LC238
 	mov	w2, w22
@@ -22286,23 +22291,23 @@ gc_do_copy_back:
 	add	x0, x0, :lo12:.LC238
 	ldrh	w3, [x21, 26]
 	bl	printf
-.L3497:
-	ldp	x19, x20, [sp, 48]
-	ldp	x21, x22, [sp, 64]
-	ldp	x23, x24, [sp, 80]
-	ldp	x25, x26, [sp, 96]
-	ldp	x27, x28, [sp, 112]
-	ldp	x29, x30, [sp, 32]
-	add	sp, sp, 240
+.L3499:
+	ldp	x19, x20, [sp, 32]
+	ldp	x21, x22, [sp, 48]
+	ldp	x23, x24, [sp, 64]
+	ldp	x25, x26, [sp, 80]
+	ldp	x27, x28, [sp, 96]
+	ldp	x29, x30, [sp, 16]
+	add	sp, sp, 208
 	ret
-.L3503:
+.L3505:
 	add	x1, x1, 64
 	cmp	x1, x0
-	bne	.L3505
-	adrp	x0, .LANCHOR125
+	bne	.L3507
+	adrp	x0, .LANCHOR126
 	mov	w1, 10
 	strb	wzr, [x19, 57]
-	ldrb	w0, [x0, #:lo12:.LANCHOR125]
+	ldrb	w0, [x0, #:lo12:.LANCHOR126]
 	strb	w0, [x19, 56]
 	ldrb	w0, [x19, 2]
 	str	w20, [x19, 36]
@@ -22313,7 +22318,7 @@ gc_do_copy_back:
 	str	w0, [x19, 32]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3506
+	tbz	x0, 8, .L3508
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	add	x1, x21, :lo12:.LANCHOR64
@@ -22325,7 +22330,7 @@ gc_do_copy_back:
 	ldrh	w5, [x1, 26]
 	mov	w1, w20
 	bl	printf
-.L3506:
+.L3508:
 	mov	x0, x19
 	bl	ftl_gc_write_buf
 	bl	ftl_write_commit
@@ -22338,11 +22343,11 @@ gc_do_copy_back:
 	ldrh	w0, [x21, 28]
 	add	w0, w0, 1
 	strh	w0, [x21, 28]
-	b	.L3497
-.L3502:
+	b	.L3499
+.L3504:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3507
+	tbz	x0, 8, .L3509
 	add	x21, x21, :lo12:.LANCHOR64
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
@@ -22354,408 +22359,406 @@ gc_do_copy_back:
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC239
 	bl	printf
-.L3507:
+.L3509:
 	mov	x0, x19
 	bl	zbuf_free
-	b	.L3497
-.L3498:
+	b	.L3499
+.L3500:
 	adrp	x1, .LANCHOR10
 	adrp	x0, .LANCHOR73
-	stp	x0, x1, [x29, 128]
-	adrp	x24, .LANCHOR64
-	ldr	x22, [x1, #:lo12:.LANCHOR10]
+	stp	x0, x1, [x29, 112]
+	adrp	x23, .LANCHOR64
+	ldr	x21, [x1, #:lo12:.LANCHOR10]
 	ldrb	w19, [x0, #:lo12:.LANCHOR73]
-	add	x22, x22, 80
+	add	x21, x21, 80
 	cmp	w19, 3
-	bne	.L3508
+	bne	.L3510
 	adrp	x0, .LANCHOR35
 	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbz	w0, .L3509
-	add	x0, x24, :lo12:.LANCHOR64
-	ldrb	w20, [x22, 9]
-	ldrh	w21, [x0, 570]
-	adrp	x0, .LANCHOR204
-	ldrb	w0, [x0, #:lo12:.LANCHOR204]
-	sdiv	w1, w21, w20
+	cbz	w0, .L3511
+	add	x0, x23, :lo12:.LANCHOR64
+	ldrb	w20, [x21, 9]
+	ldrh	w28, [x0, 570]
+	adrp	x0, .LANCHOR118
+	ldrb	w0, [x0, #:lo12:.LANCHOR118]
+	sdiv	w1, w28, w20
 	and	w27, w1, 65535
-	cbz	w0, .L3510
-	adrp	x0, .LANCHOR224
-	add	x0, x0, :lo12:.LANCHOR224
+	cbz	w0, .L3512
+	adrp	x0, .LANCHOR226
+	add	x0, x0, :lo12:.LANCHOR226
 	ldrh	w0, [x0, w1, sxtw 1]
 	cmp	w0, 0
 	cset	w19, ne
-.L3633:
+.L3631:
 	add	w19, w19, 1
-.L3511:
-	msub	w20, w27, w20, w21
-.L3634:
+.L3513:
+	msub	w20, w27, w20, w28
+.L3632:
 	and	w20, w20, 65535
-.L3512:
-	adrp	x0, .LANCHOR79
-	ldrb	w1, [x22, 9]
-	add	x6, x24, :lo12:.LANCHOR64
-	adrp	x11, .LANCHOR224
-	ldrh	w0, [x0, #:lo12:.LANCHOR79]
-	add	x11, x11, :lo12:.LANCHOR224
+.L3514:
+	adrp	x1, .LANCHOR79
+	ldrb	w0, [x21, 9]
+	add	x5, x23, :lo12:.LANCHOR64
+	adrp	x11, .LANCHOR226
+	ldrh	w4, [x1, #:lo12:.LANCHOR79]
+	add	x11, x11, :lo12:.LANCHOR226
 	sxtw	x14, w27
-	mov	w3, 0
-	mul	w13, w19, w1
-	ldrh	w15, [x6, 24]
-	mul	w0, w0, w1
-	sub	w5, w0, #1
-	adrp	x0, .LANCHOR204
-	ldrb	w12, [x0, #:lo12:.LANCHOR204]
-	adrp	x0, .LANCHOR156
-	ldr	x7, [x0, #:lo12:.LANCHOR156]
-.L3516:
-	cmp	w3, w13
-	blt	.L3520
-.L3566:
-	mov	w23, 1
-	b	.L3514
-.L3510:
-	adrp	x0, .LANCHOR205
-	ldrb	w0, [x0, #:lo12:.LANCHOR205]
-	cbz	w0, .L3560
+	mov	w2, 0
+	mul	w13, w19, w0
+	ldrh	w15, [x5, 24]
+	mul	w4, w4, w0
+	adrp	x0, .LANCHOR118
+	ldrb	w12, [x0, #:lo12:.LANCHOR118]
+	adrp	x0, .LANCHOR158
+	sub	w4, w4, #1
+	ldr	x7, [x0, #:lo12:.LANCHOR158]
+.L3518:
+	cmp	w2, w13
+	blt	.L3522
+.L3567:
+	mov	w22, 1
+	b	.L3516
+.L3512:
+	adrp	x0, .LANCHOR207
+	ldrb	w0, [x0, #:lo12:.LANCHOR207]
+	cbz	w0, .L3561
 	sub	w0, w27, #62
 	and	w0, w0, 65535
 	cmp	w0, 2159
-	bhi	.L3561
+	bhi	.L3562
 	udiv	w19, w27, w19
 	add	w19, w19, w19, lsl 1
 	sub	w19, w27, w19
 	and	w19, w19, 65535
 	cmp	w19, 0
 	cset	w19, eq
-	b	.L3633
-.L3560:
-	mov	w19, 1
-	b	.L3511
+	b	.L3631
 .L3561:
+	mov	w19, 1
+	b	.L3513
+.L3562:
 	mov	w19, 2
-	b	.L3511
-.L3509:
+	b	.L3513
+.L3511:
 	adrp	x0, .LANCHOR77
 	ldrb	w0, [x0, #:lo12:.LANCHOR77]
-	cbz	w0, .L3513
-	add	x0, x24, :lo12:.LANCHOR64
-	ldrb	w20, [x22, 9]
-	ldrh	w21, [x0, 570]
+	cbz	w0, .L3515
+	add	x0, x23, :lo12:.LANCHOR64
+	ldrb	w20, [x21, 9]
+	ldrh	w28, [x0, 570]
 	add	w8, w20, w20, lsl 1
 	sub	w20, w20, w20, lsl 2
-	sdiv	w27, w21, w8
-	madd	w20, w27, w20, w21
-	b	.L3634
-.L3513:
-	add	x0, x24, :lo12:.LANCHOR64
-	ldrb	w21, [x22, 9]
+	sdiv	w27, w28, w8
+	madd	w20, w27, w20, w28
+	b	.L3632
+.L3515:
+	add	x0, x23, :lo12:.LANCHOR64
+	ldrb	w10, [x21, 9]
 	ldrh	w1, [x0, 570]
-	adrp	x0, .LANCHOR225
-	add	x0, x0, :lo12:.LANCHOR225
-	sdiv	w20, w1, w21
-	ldrh	w23, [x0, w20, sxtw 1]
-	msub	w20, w20, w21, w1
+	adrp	x0, .LANCHOR227
+	add	x0, x0, :lo12:.LANCHOR227
+	sdiv	w20, w1, w10
+	ldrh	w22, [x0, w20, sxtw 1]
+	msub	w20, w20, w10, w1
 	and	w20, w20, 65535
-	lsr	w27, w23, 3
-	and	w23, w23, 7
-	cmp	w23, 1
-	madd	w21, w27, w21, w20
-	add	w21, w21, w21, lsl 1
-	and	w21, w21, 65535
-	beq	.L3512
-.L3514:
+	lsr	w27, w22, 3
+	and	w22, w22, 7
+	cmp	w22, 1
+	madd	w10, w27, w10, w20
+	add	w10, w10, w10, lsl 1
+	and	w28, w10, 65535
+	beq	.L3514
+.L3516:
 	adrp	x0, .LANCHOR14
-	str	x0, [x29, 112]
-	ldr	w1, [x0, #:lo12:.LANCHOR14]
-	tbz	x1, 8, .L3521
-	adrp	x0, .LANCHOR156
-	ubfiz	x1, x21, 2, 16
-	mov	w7, w21
-	ldr	x2, [x0, #:lo12:.LANCHOR156]
-	add	x0, x24, :lo12:.LANCHOR64
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L3523
+	adrp	x0, .LANCHOR158
+	ubfiz	x1, x28, 2, 16
+	mov	w7, w28
+	ldr	x2, [x0, #:lo12:.LANCHOR158]
+	add	x0, x23, :lo12:.LANCHOR64
 	add	x3, x2, x1
 	ldrh	w4, [x0, 570]
-	adrp	x0, .LANCHOR224
-	add	x0, x0, :lo12:.LANCHOR224
+	adrp	x0, .LANCHOR226
+	add	x0, x0, :lo12:.LANCHOR226
 	ldrh	w0, [x0, w27, sxtw 1]
 	str	w0, [sp]
 	adrp	x0, .LC240
 	add	x0, x0, :lo12:.LC240
 	ldr	w5, [x2, x1]
-	mov	w2, w23
+	mov	w2, w22
 	ldr	w6, [x3, 4]
 	mov	w1, w27
 	mov	w3, w20
 	bl	printf
-.L3521:
+.L3523:
 	adrp	x0, .LANCHOR79
-	str	wzr, [x29, 152]
+	str	wzr, [x29, 136]
 	add	x0, x0, :lo12:.LANCHOR79
-	str	x0, [x29, 120]
-.L3522:
-	ldrb	w2, [x22, 9]
-	ldr	w0, [x29, 152]
-	ldrh	w25, [x29, 152]
+	str	x0, [x29, 104]
+.L3524:
+	ldrb	w2, [x21, 9]
+	ldr	w0, [x29, 136]
+	ldrh	w24, [x29, 136]
 	and	w0, w0, 65535
-	str	w0, [x29, 156]
+	str	w0, [x29, 140]
 	mul	w1, w19, w2
 	cmp	w0, w1
-	blt	.L3540
-	ldr	x0, [x29, 128]
+	blt	.L3541
+	ldr	x0, [x29, 112]
 	ldrb	w0, [x0, #:lo12:.LANCHOR73]
 	cmp	w0, 3
-	add	x0, x29, 160
-	bne	.L3541
+	add	x0, x29, 144
+	bne	.L3542
 	adrp	x3, .LANCHOR35
 	ldrb	w3, [x3, #:lo12:.LANCHOR35]
-	cbz	w3, .L3542
+	cbz	w3, .L3543
 	sub	w3, w1, #1
 	mov	w2, 0
-.L3543:
+.L3544:
 	cmp	w2, w3
-	blt	.L3544
-.L3639:
+	blt	.L3545
+.L3636:
 	ldr	x0, [x0, w3, sxtw 3]
 	mov	w2, -1
 	strb	w2, [x0]
-	ldr	x0, [x29, 160]
+	ldr	x0, [x29, 144]
 	bl	sblk_prog_page
-	b	.L3545
-.L3508:
+	b	.L3546
+.L3510:
 	adrp	x0, .LANCHOR74
 	ldrb	w0, [x0, #:lo12:.LANCHOR74]
-	cbnz	w0, .L3515
-	add	x0, x24, :lo12:.LANCHOR64
-	ldrb	w20, [x22, 9]
+	cbnz	w0, .L3517
+	add	x0, x23, :lo12:.LANCHOR64
+	ldrb	w20, [x21, 9]
 	mov	w19, 1
-	ldrh	w21, [x0, 570]
-	sdiv	w27, w21, w20
-	msub	w20, w27, w20, w21
+	ldrh	w28, [x0, 570]
+	sdiv	w27, w28, w20
+	msub	w20, w27, w20, w28
 	and	w20, w20, 65535
-	b	.L3512
-.L3515:
-	add	x0, x24, :lo12:.LANCHOR64
-	ldrb	w20, [x22, 9]
+	b	.L3514
+.L3517:
+	add	x0, x23, :lo12:.LANCHOR64
+	ldrb	w20, [x21, 9]
 	mov	w19, 2
-	ldrh	w21, [x0, 570]
-	sdiv	w27, w21, w20
-	msub	w20, w27, w20, w21
+	ldrh	w28, [x0, 570]
+	sdiv	w27, w28, w20
+	msub	w20, w27, w20, w28
 	and	w20, w20, 65535
-	b	.L3512
-.L3520:
-	add	w2, w21, w3
-	cmp	w2, w5
-	bne	.L3517
-	cbz	w12, .L3566
+	b	.L3514
+.L3522:
+	add	w3, w28, w2
+	cmp	w3, w4
+	bne	.L3519
+	cbz	w12, .L3567
 	ldrh	w0, [x11, x14, lsl 1]
 	cmp	w0, w27
-	bcs	.L3566
-	tbz	x3, 0, .L3566
-.L3517:
-	sbfiz	x2, x2, 2, 32
-	ldr	w0, [x7, x2]
+	bcs	.L3567
+	tbz	x2, 0, .L3567
+.L3519:
+	sbfiz	x3, x3, 2, 32
+	ldr	w0, [x7, x3]
 	cmn	w0, #1
-	bne	.L3518
-	ldrh	w4, [x6, 26]
-	cmp	w4, w15
-	bcs	.L3497
-	cbz	w12, .L3519
+	bne	.L3520
+	ldrh	w6, [x5, 26]
+	cmp	w6, w15
+	bcs	.L3499
+	cbz	w12, .L3521
 	ldrh	w0, [x11, x14, lsl 1]
 	cmp	w0, w27
-	bcs	.L3519
-	tbz	x3, 0, .L3519
+	bcs	.L3521
+	tbz	x2, 0, .L3521
 	ubfiz	x0, x0, 2, 16
 	ldr	w0, [x7, x0]
-.L3635:
-	str	w0, [x7, x2]
-.L3518:
-	add	w3, w3, 1
-	and	w3, w3, 65535
-	b	.L3516
-.L3519:
-	mov	w0, w4
+.L3633:
+	str	w0, [x7, x3]
+.L3520:
+	add	w2, w2, 1
+	and	w2, w2, 65535
+	b	.L3518
+.L3521:
+	mov	w0, w6
 	bl	gc_get_src_ppa_from_index
-	add	w4, w4, 1
-	strh	w4, [x6, 26]
-	b	.L3635
-.L3540:
-	ldr	w0, [x29, 156]
-	add	w28, w21, w0
-	sxtw	x0, w28
-	str	x0, [x29, 144]
+	add	w6, w6, 1
+	strh	w6, [x5, 26]
+	b	.L3633
+.L3541:
+	ldr	w0, [x29, 140]
+	add	w0, w28, w0
+	str	w0, [x29, 128]
+	sxtw	x26, w0
 	adrp	x0, .LANCHOR76
-	sxtw	x1, w28
 	ldr	x0, [x0, #:lo12:.LANCHOR76]
-	ldrb	w0, [x0, x1]
+	ldrb	w0, [x0, x26]
 	cmp	w0, 255
-	bne	.L3523
+	bne	.L3525
 	mov	w0, 0
 	bl	buf_alloc
-	mov	x26, x0
-	cbnz	x0, .L3524
+	mov	x25, x0
+	cbnz	x0, .L3526
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	bl	gc_write_completed
 	bl	gc_free_temp_buf
 	mov	w0, 0
 	bl	buf_alloc
-	mov	x26, x0
-	cbz	x0, .L3497
-.L3524:
+	mov	x25, x0
+	cbz	x0, .L3499
+.L3526:
 	adrp	x0, .LANCHOR76
-	sxtw	x2, w28
-	ldrb	w1, [x26, 1]
-	adrp	x3, .LANCHOR156
+	ldrb	w1, [x25, 1]
+	adrp	x5, .LANCHOR158
 	ldr	x0, [x0, #:lo12:.LANCHOR76]
-	strb	w1, [x0, x2]
-	add	x1, x24, :lo12:.LANCHOR64
-	strb	w23, [x26, 61]
+	strb	w1, [x0, x26]
+	add	x1, x23, :lo12:.LANCHOR64
+	strb	w22, [x25, 61]
 	ldrb	w0, [x1, 7]
 	add	w0, w0, 1
 	strb	w0, [x1, 7]
-	add	w0, w25, w21
-	strh	w0, [x26, 48]
+	add	w0, w24, w28
+	strh	w0, [x25, 48]
 	adrp	x0, .LANCHOR79
-	ldrh	w4, [x0, #:lo12:.LANCHOR79]
-	ldrb	w0, [x22, 9]
-	mul	w0, w0, w4
+	ldr	w1, [x29, 128]
+	ldrh	w6, [x0, #:lo12:.LANCHOR79]
+	ldrb	w0, [x21, 9]
+	mul	w0, w0, w6
 	sub	w0, w0, #1
-	cmp	w28, w0
-	bne	.L3525
-	adrp	x0, .LANCHOR204
-	ldrb	w0, [x0, #:lo12:.LANCHOR204]
-	cbz	w0, .L3526
-	adrp	x0, .LANCHOR224
-	add	x0, x0, :lo12:.LANCHOR224
+	cmp	w1, w0
+	bne	.L3527
+	adrp	x0, .LANCHOR118
+	ldrb	w0, [x0, #:lo12:.LANCHOR118]
+	cbz	w0, .L3528
+	adrp	x0, .LANCHOR226
+	add	x0, x0, :lo12:.LANCHOR226
 	ldrh	w0, [x0, w27, sxtw 1]
 	cmp	w0, w27
-	bcs	.L3526
-	tbnz	x25, 0, .L3525
-.L3526:
-	adrp	x0, .LANCHOR155
-	ldr	x2, [x29, 144]
-	adrp	x5, .LANCHOR80
-	stp	x3, x5, [x29, 96]
-	ldr	x1, [x0, #:lo12:.LANCHOR155]
+	bcs	.L3528
+	tbnz	x24, 0, .L3527
+.L3528:
+	adrp	x0, .LANCHOR157
+	adrp	x4, .LANCHOR80
+	str	x5, [x29, 96]
+	ldr	x1, [x0, #:lo12:.LANCHOR157]
 	mov	w0, -1
-	adrp	x28, .LANCHOR125
-	str	w0, [x1, x2, lsl 2]
-	ldr	x0, [x26, 8]
-	ldrb	w2, [x5, #:lo12:.LANCHOR80]
-	mul	w2, w2, w4
+	str	x4, [x29, 128]
+	str	w0, [x1, x26, lsl 2]
+	ldr	x0, [x25, 8]
+	ldrb	w2, [x4, #:lo12:.LANCHOR80]
+	mul	w2, w2, w6
 	lsl	w2, w2, 2
 	bl	ftl_memcpy
-	ldp	x3, x5, [x29, 96]
-	ldr	x0, [x29, 120]
-	ldrb	w1, [x5, #:lo12:.LANCHOR80]
+	ldp	x5, x0, [x29, 96]
+	adrp	x6, .LANCHOR126
+	ldr	x4, [x29, 128]
 	ldrh	w0, [x0]
+	ldrb	w1, [x4, #:lo12:.LANCHOR80]
 	mul	w0, w0, w1
-	adrp	x1, .LANCHOR205
-	ldrb	w1, [x1, #:lo12:.LANCHOR205]
+	adrp	x1, .LANCHOR207
+	ldrb	w1, [x1, #:lo12:.LANCHOR207]
 	lsl	w2, w0, 2
-	cbz	w1, .L3527
-	ldrb	w1, [x28, #:lo12:.LANCHOR125]
+	cbz	w1, .L3529
+	ldrb	w1, [x6, #:lo12:.LANCHOR126]
 	lsl	w1, w1, 9
 	sub	w2, w1, w2
-.L3527:
-	ldr	x1, [x3, #:lo12:.LANCHOR156]
-	ldr	x4, [x26, 8]
-	str	x5, [x29, 104]
-	add	x0, x4, x0, sxtw 2
+.L3529:
+	ldr	x1, [x5, #:lo12:.LANCHOR158]
+	ldr	x7, [x25, 8]
+	str	x4, [x29, 96]
+	str	x6, [x29, 128]
+	add	x0, x7, x0, sxtw 2
 	bl	ftl_memcpy
-	ldr	x0, [x26, 24]
+	ldr	x6, [x29, 128]
 	mov	w1, 0
-	ldrb	w2, [x28, #:lo12:.LANCHOR125]
+	ldr	x0, [x25, 24]
+	ldrb	w2, [x6, #:lo12:.LANCHOR126]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	ldr	x6, [x26, 24]
+	ldr	x6, [x25, 24]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
-	ldr	x5, [x29, 104]
+	ldr	x4, [x29, 96]
 	str	w0, [x6]
-	ldr	x0, [x29, 120]
+	ldr	x0, [x29, 104]
 	ldrh	w1, [x0]
-	ldrb	w0, [x5, #:lo12:.LANCHOR80]
+	ldrb	w0, [x4, #:lo12:.LANCHOR80]
 	mul	w1, w1, w0
-	ldr	x0, [x26, 8]
+	ldr	x0, [x25, 8]
 	lsl	w1, w1, 2
 	bl	js_hash
 	str	w0, [x6, 4]
-	ldr	x0, [x29, 136]
+	ldr	x0, [x29, 120]
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x0, 132]
 	str	w0, [x6, 8]
-.L3523:
+.L3525:
 	adrp	x0, .LANCHOR76
-	ldr	w2, [x29, 156]
-	add	x28, x29, 160
-	adrp	x1, .LANCHOR52
+	adrp	x11, .LANCHOR52
+	add	x7, x11, :lo12:.LANCHOR52
+	ldrsw	x2, [x29, 140]
 	ldr	x3, [x0, #:lo12:.LANCHOR76]
-	add	x5, x1, :lo12:.LANCHOR52
-	ldr	x0, [x29, 144]
-	ldrb	w0, [x3, x0]
-	ubfiz	x4, x0, 6, 8
-	add	x4, x5, x4
-	str	x4, [x28, w2, sxtw 3]
-	sxtw	x2, w0
 	mov	w0, 2
-	add	x5, x5, x2, lsl 6
-	strh	w0, [x5, 50]
-	ldr	x0, [x29, 128]
-	strb	w23, [x5, 61]
+	add	x1, x29, 144
+	adrp	x6, .LANCHOR159
+	ldrb	w5, [x3, x26]
+	ubfiz	x4, x5, 6, 8
+	add	x4, x7, x4
+	add	x7, x7, x5, lsl 6
+	str	x4, [x1, x2, lsl 3]
+	adrp	x4, .LANCHOR118
+	strh	w0, [x7, 50]
+	ldr	x0, [x29, 112]
+	strb	w22, [x7, 61]
 	ldrb	w0, [x0, #:lo12:.LANCHOR73]
 	cmp	w0, 3
-	bne	.L3531
-	adrp	x4, .LANCHOR35
-	ldrb	w4, [x4, #:lo12:.LANCHOR35]
-	cbz	w4, .L3532
-	adrp	x0, .LANCHOR204
-	and	w5, w25, 1
-	add	w6, w5, w27
-	ldrb	w0, [x0, #:lo12:.LANCHOR204]
-	cbz	w0, .L3533
-	adrp	x4, .LANCHOR224
-	add	x4, x4, :lo12:.LANCHOR224
-	ldrh	w4, [x4, w27, sxtw 1]
-	cmp	w4, w27
-	bcs	.L3533
-	cmp	w5, 0
-	csel	w6, w6, w4, eq
-.L3533:
-	udiv	w4, w25, w19
-	add	x5, x1, :lo12:.LANCHOR52
-	add	x5, x5, x2, lsl 6
-	add	w4, w4, w20
-	add	x4, x22, x4, sxtw 1
-	ldrh	w0, [x4, 16]
-	adrp	x4, .LANCHOR105
-	ldrh	w4, [x4, #:lo12:.LANCHOR105]
-	madd	w0, w0, w4, w6
-	orr	w0, w0, 50331648
-.L3636:
-	str	w0, [x5, 40]
-.L3537:
-	add	x0, x1, :lo12:.LANCHOR52
-	add	x0, x0, x2, lsl 6
-	ldrh	w4, [x0, 48]
-	ldr	w5, [x0, 40]
-	adrp	x0, .LANCHOR157
-	ldr	x0, [x0, #:lo12:.LANCHOR157]
-	str	w5, [x0, x4, lsl 2]
-	b	.L3535
-.L3525:
-	ldr	x0, [x29, 144]
+	bne	.L3533
+	adrp	x12, .LANCHOR35
+	ldrb	w13, [x12, #:lo12:.LANCHOR35]
+	adrp	x12, .LANCHOR105
+	cbz	w13, .L3534
+	ldrb	w0, [x4, #:lo12:.LANCHOR118]
+	and	w14, w24, 1
+	add	w13, w14, w27
+	cbz	w0, .L3535
+	adrp	x7, .LANCHOR226
+	add	x7, x7, :lo12:.LANCHOR226
+	ldrh	w0, [x7, w27, sxtw 1]
+	cmp	w0, w27
+	bcs	.L3535
+	cmp	w14, 0
+	csel	w13, w13, w0, eq
+.L3535:
+	udiv	w7, w24, w19
+	add	x14, x11, :lo12:.LANCHOR52
+	add	x14, x14, x5, lsl 6
+	add	w7, w7, w20
+	add	x7, x21, x7, sxtw 1
+	ldrh	w0, [x7, 16]
+	ldrh	w7, [x12, #:lo12:.LANCHOR105]
+	madd	w0, w0, w7, w13
+	orr	w0, w0, 50331648
+	str	w0, [x14, 40]
+.L3539:
+	add	x0, x11, :lo12:.LANCHOR52
+	add	x0, x0, x5, lsl 6
+	ldrh	w5, [x0, 48]
+	ldr	w7, [x0, 40]
+	ldr	x0, [x6, #:lo12:.LANCHOR159]
+	str	w7, [x0, x5, lsl 2]
+	b	.L3537
+.L3527:
+	lsl	x0, x26, 2
+	str	x0, [x29, 128]
+	ldr	x0, [x5, #:lo12:.LANCHOR158]
+	lsl	x1, x26, 2
+	ldr	w0, [x0, x1]
 	mov	w1, 1
-	lsl	x28, x0, 2
-	ldr	x0, [x3, #:lo12:.LANCHOR156]
-	ldr	w0, [x0, x28]
-	str	w0, [x26, 40]
-	mov	x0, x26
+	str	w0, [x25, 40]
+	mov	x0, x25
 	bl	sblk_read_page
-	ldr	w0, [x26, 52]
+	ldr	w0, [x25, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3529
+	bne	.L3531
 	adrp	x0, .LANCHOR68
 	ldrh	w2, [x0, #:lo12:.LANCHOR68]
 	adrp	x0, .LANCHOR31
@@ -22765,7 +22768,7 @@ gc_do_copy_back:
 	sub	w1, w0, w2
 	mov	w0, 1
 	lsl	w0, w0, w1
-	ldr	w1, [x26, 40]
+	ldr	w1, [x25, 40]
 	sub	w0, w0, #1
 	lsr	w1, w1, w2
 	and	w0, w0, w1
@@ -22774,258 +22777,224 @@ gc_do_copy_back:
 	mov	x1, 0
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
-	ldr	w0, [x26, 52]
+	ldr	w0, [x25, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3529
-	ldr	x0, [x26, 24]
+	bne	.L3531
+	ldr	x0, [x25, 24]
 	mov	w1, -1
 	str	w1, [x0, 4]
-	ldr	w0, [x26, 52]
+	ldr	w0, [x25, 52]
 	cmp	w0, 512
 	ccmp	w0, w1, 4, ne
-	bne	.L3529
-	adrp	x1, .LANCHOR223
+	bne	.L3531
+	adrp	x1, .LANCHOR225
 	adrp	x0, .LC0
-	mov	w2, 1002
-	add	x1, x1, :lo12:.LANCHOR223
+	mov	w2, 1007
+	add	x1, x1, :lo12:.LANCHOR225
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3529:
-	ldr	x0, [x26, 24]
-	adrp	x1, .LANCHOR122
-	ldr	w1, [x1, #:lo12:.LANCHOR122]
+.L3531:
+	ldr	x0, [x25, 24]
+	adrp	x1, .LANCHOR123
+	ldr	w1, [x1, #:lo12:.LANCHOR123]
 	ldr	w2, [x0, 4]
 	cmp	w2, w1
-	bcc	.L3530
+	bcc	.L3532
 	mov	w1, -1
 	str	w1, [x0, 4]
-.L3530:
-	adrp	x1, .LANCHOR155
+.L3532:
+	adrp	x1, .LANCHOR157
+	lsl	x3, x26, 2
 	ldr	w2, [x0, 4]
-	ldr	x1, [x1, #:lo12:.LANCHOR155]
-	str	w2, [x1, x28]
-	ldr	w1, [x26, 40]
+	ldr	x1, [x1, #:lo12:.LANCHOR157]
+	str	w2, [x1, x3]
+	ldr	w1, [x25, 40]
 	str	w1, [x0, 8]
-	b	.L3523
-.L3532:
-	udiv	w0, w25, w0
-	adrp	x6, .LANCHOR105
-	ldrh	w6, [x6, #:lo12:.LANCHOR105]
-	add	w4, w0, w20
+	b	.L3525
+.L3534:
+	udiv	w0, w24, w0
+	ldrh	w11, [x12, #:lo12:.LANCHOR105]
+	ldr	x6, [x6, #:lo12:.LANCHOR159]
+	add	w5, w0, w20
 	add	w0, w0, w0, lsl 1
-	add	x4, x22, x4, sxtw 1
-	sub	w0, w25, w0
+	add	x5, x21, x5, sxtw 1
+	sub	w0, w24, w0
 	and	w0, w0, 65535
 	add	w0, w0, 1
-	ldrh	w4, [x4, 16]
-	mul	w4, w4, w6
-	ldrh	w6, [x5, 48]
-	orr	w4, w4, w27
-	str	w4, [x5, 40]
-	adrp	x5, .LANCHOR157
-	orr	w0, w4, w0, lsl 24
-	ldr	x5, [x5, #:lo12:.LANCHOR157]
-	str	w0, [x5, x6, lsl 2]
-.L3535:
-	ldr	x0, [x29, 112]
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3538
-	add	x0, x1, :lo12:.LANCHOR52
-	ldr	x1, [x29, 144]
-	add	x0, x0, x2, lsl 6
-	mov	w2, w23
-	ldrb	w4, [x3, x1]
-	add	x1, x24, :lo12:.LANCHOR64
-	ldrb	w7, [x0, 1]
-	ldrh	w6, [x0, 48]
-	ldrb	w3, [x1, 6]
-	ldr	x1, [x26, 24]
-	ldr	w1, [x1]
-	str	w1, [sp, 16]
-	ldr	x1, [x0, 24]
-	ldr	w1, [x1, 4]
-	str	w1, [sp, 8]
-	mov	w1, 3
-	udiv	w1, w25, w1
-	add	w1, w1, w20
-	str	w1, [sp]
-	ldr	w1, [x29, 156]
-	ldr	w5, [x0, 40]
-	adrp	x0, .LC241
-	add	x0, x0, :lo12:.LC241
-	bl	printf
-.L3538:
-	adrp	x0, .LANCHOR204
-	ldrb	w0, [x0, #:lo12:.LANCHOR204]
-	cbz	w0, .L3539
-	adrp	x0, .LANCHOR224
-	add	x0, x0, :lo12:.LANCHOR224
+	ldrh	w5, [x5, 16]
+	mul	w5, w5, w11
+	orr	w5, w5, w27
+	str	w5, [x7, 40]
+	ldrh	w7, [x7, 48]
+	orr	w0, w5, w0, lsl 24
+	str	w0, [x6, x7, lsl 2]
+.L3537:
+	ldrb	w0, [x4, #:lo12:.LANCHOR118]
+	cbz	w0, .L3540
+	adrp	x0, .LANCHOR226
+	add	x0, x0, :lo12:.LANCHOR226
 	ldrh	w0, [x0, w27, sxtw 1]
 	cmp	w0, w27
-	bcs	.L3539
-	tbz	x25, 0, .L3539
-	adrp	x0, .LANCHOR76
-	ldr	x2, [x29, 144]
-	mov	w1, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR76]
-	strb	w1, [x0, x2]
-	ldr	w0, [x29, 156]
-	ldr	x1, [x28, w0, sxtw 3]
-	ldrb	w0, [x22, 9]
+	bcs	.L3540
+	tbz	x24, 0, .L3540
+	mov	w0, -1
+	strb	w0, [x3, x26]
+	ldrb	w0, [x21, 9]
+	ldr	x1, [x1, x2, lsl 3]
 	ubfiz	w0, w0, 1, 15
 	ldrb	w2, [x1, 1]
-	msub	w0, w19, w0, w21
+	msub	w0, w19, w0, w28
 	and	w0, w0, 65535
 	strh	w0, [x1, 48]
 	adrp	x1, .LANCHOR76
 	and	x0, x0, 65535
 	ldr	x1, [x1, #:lo12:.LANCHOR76]
 	strb	w2, [x1, x0]
-	adrp	x0, .LANCHOR156
-	ldr	x2, [x29, 144]
+	adrp	x0, .LANCHOR158
 	mov	w1, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR156]
-	str	w1, [x0, x2, lsl 2]
-.L3539:
-	ldr	w0, [x29, 152]
+	ldr	x0, [x0, #:lo12:.LANCHOR158]
+	str	w1, [x0, x26, lsl 2]
+.L3540:
+	ldr	w0, [x29, 136]
 	add	w0, w0, 1
-	str	w0, [x29, 152]
-	b	.L3522
-.L3531:
+	str	w0, [x29, 136]
+	b	.L3524
+.L3533:
 	cmp	w0, 2
-	bne	.L3537
+	bne	.L3539
 	adrp	x0, .LANCHOR74
-	adrp	x4, .LANCHOR105
+	adrp	x12, .LANCHOR105
 	ldrb	w0, [x0, #:lo12:.LANCHOR74]
-	cbnz	w0, .L3536
-	ldr	w0, [x29, 156]
-	ldrh	w4, [x4, #:lo12:.LANCHOR105]
-	add	w0, w20, w0
-	add	x0, x22, x0, sxtw 1
-	ldrh	w0, [x0, 16]
-	madd	w0, w0, w4, w27
-.L3637:
+	cbnz	w0, .L3538
+	ldr	w0, [x29, 140]
+	ldrh	w12, [x12, #:lo12:.LANCHOR105]
+	add	w25, w20, w0
+	add	x25, x21, x25, sxtw 1
+	ldrh	w0, [x25, 16]
+	madd	w0, w0, w12, w27
+.L3634:
 	orr	w0, w0, 33554432
-	b	.L3636
-.L3536:
-	add	w0, w20, w25, lsr 1
-	ldrh	w4, [x4, #:lo12:.LANCHOR105]
-	add	x0, x22, x0, sxtw 1
+	str	w0, [x7, 40]
+	b	.L3539
+.L3538:
+	add	w0, w20, w24, lsr 1
+	ldrh	w12, [x12, #:lo12:.LANCHOR105]
+	add	x0, x21, x0, sxtw 1
 	ldrh	w0, [x0, 16]
-	madd	w0, w0, w4, w27
-	and	w4, w25, 1
-	add	w0, w0, w4
-	b	.L3637
-.L3544:
+	madd	w0, w0, w12, w27
+	and	w12, w24, 1
+	add	w0, w0, w12
+	b	.L3634
+.L3545:
 	ldr	x4, [x0, w2, sxtw 3]
 	add	w2, w2, 1
 	ldr	x5, [x0, w2, sxtw 3]
 	and	w2, w2, 65535
 	ldrb	w5, [x5, 1]
 	strb	w5, [x4]
-	b	.L3543
-.L3542:
+	b	.L3544
+.L3543:
 	adrp	x1, .LANCHOR77
 	ldrb	w3, [x1, #:lo12:.LANCHOR77]
-	ldr	x1, [x29, 160]
-	cbz	w3, .L3546
-.L3549:
+	ldr	x1, [x29, 144]
+	cbz	w3, .L3547
+.L3550:
 	strb	wzr, [x1, 60]
-	b	.L3548
-.L3546:
-	cmp	w23, 1
-	bne	.L3547
+	b	.L3549
+.L3547:
+	cmp	w22, 1
+	bne	.L3548
 	mov	w3, 9
-.L3638:
+.L3635:
 	strb	w3, [x1, 60]
-.L3548:
+.L3549:
 	add	x1, x0, 24
 	bl	sblk_xlc_prog_pages
-.L3545:
+.L3546:
 	adrp	x0, .LANCHOR77
 	ldrb	w0, [x0, #:lo12:.LANCHOR77]
-	cbz	w0, .L3554
-	ldrb	w19, [x22, 9]
+	cbz	w0, .L3555
+	ldrb	w19, [x21, 9]
 	add	w19, w19, w19, lsl 1
 	and	w19, w19, 1023
-.L3555:
+.L3556:
 	adrp	x0, .LANCHOR104
-	add	x24, x24, :lo12:.LANCHOR64
+	add	x23, x23, :lo12:.LANCHOR64
 	ldr	x1, [x0, #:lo12:.LANCHOR104]
 	ldr	w0, [x1, 52]
 	add	w0, w0, w19
 	str	w0, [x1, 52]
-	ldrh	w0, [x24, 570]
+	ldrh	w0, [x23, 570]
 	add	w19, w19, w0
 	adrp	x0, .LANCHOR79
 	and	w19, w19, 65535
-	strh	w19, [x24, 570]
+	strh	w19, [x23, 570]
 	ldrh	w0, [x0, #:lo12:.LANCHOR79]
-	ldrb	w1, [x22, 9]
+	ldrb	w1, [x21, 9]
 	mul	w0, w0, w1
 	cmp	w19, w0
-	blt	.L3558
-	ldr	x0, [x29, 136]
+	blt	.L3559
+	ldr	x0, [x29, 120]
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	strh	wzr, [x0, 86]
-.L3558:
+.L3559:
 	bl	gc_write_completed
-	b	.L3497
-.L3547:
-	cmp	w23, 2
-	bne	.L3549
+	b	.L3499
+.L3548:
+	cmp	w22, 2
+	bne	.L3550
 	mov	w3, 13
-	b	.L3638
-.L3541:
+	b	.L3635
+.L3542:
 	adrp	x3, .LANCHOR74
 	ldrb	w3, [x3, #:lo12:.LANCHOR74]
-	cbz	w3, .L3567
+	cbz	w3, .L3568
 	adrp	x3, .LANCHOR75
 	ldrb	w3, [x3, #:lo12:.LANCHOR75]
-	cbnz	w3, .L3551
-.L3567:
+	cbnz	w3, .L3552
+.L3568:
 	sub	w3, w1, #1
 	mov	w2, 0
-.L3552:
+.L3553:
 	cmp	w2, w3
-	bge	.L3639
+	bge	.L3636
 	ldr	x4, [x0, w2, sxtw 3]
 	add	w2, w2, 1
 	ldr	x5, [x0, w2, sxtw 3]
 	and	w2, w2, 65535
 	ldrb	w5, [x5, 1]
 	strb	w5, [x4]
-	b	.L3552
-.L3551:
+	b	.L3553
+.L3552:
 	mov	w1, w2
 	bl	sblk_3d_mlc_prog_pages
-	b	.L3545
-.L3554:
+	b	.L3546
+.L3555:
 	adrp	x0, .LANCHOR74
 	ldrb	w0, [x0, #:lo12:.LANCHOR74]
-	cbz	w0, .L3556
-	ldrb	w19, [x22, 9]
+	cbz	w0, .L3557
+	ldrb	w19, [x21, 9]
 	ubfiz	w19, w19, 1, 8
-	b	.L3555
-.L3556:
+	b	.L3556
+.L3557:
 	adrp	x0, .LANCHOR35
 	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbz	w0, .L3557
-	adrp	x0, .LANCHOR204
-	ldrb	w1, [x22, 9]
-	ldrb	w0, [x0, #:lo12:.LANCHOR204]
+	cbz	w0, .L3558
+	adrp	x0, .LANCHOR118
+	ldrb	w1, [x21, 9]
+	ldrb	w0, [x0, #:lo12:.LANCHOR118]
 	mul	w19, w1, w19
-	cbz	w0, .L3555
-	adrp	x0, .LANCHOR224
-	add	x0, x0, :lo12:.LANCHOR224
+	cbz	w0, .L3556
+	adrp	x0, .LANCHOR226
+	add	x0, x0, :lo12:.LANCHOR226
 	ldrh	w0, [x0, w27, sxtw 1]
 	cmp	w0, w27
 	csel	w19, w19, w1, cs
-	b	.L3555
-.L3557:
-	ldrb	w19, [x22, 9]
-	b	.L3555
+	b	.L3556
+.L3558:
+	ldrb	w19, [x21, 9]
+	b	.L3556
 	.size	gc_do_copy_back, .-gc_do_copy_back
 	.section	.text.zftl_do_gc,"ax",@progbits
 	.align	2
@@ -23037,7 +23006,7 @@ zftl_do_gc:
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x19, x20, [sp, 32]
-	adrp	x19, .LANCHOR153
+	adrp	x19, .LANCHOR155
 	stp	x21, x22, [sp, 48]
 	ldrh	w22, [x1, #:lo12:.LANCHOR101]
 	adrp	x1, .LANCHOR97
@@ -23045,40 +23014,40 @@ zftl_do_gc:
 	adrp	x23, .LANCHOR10
 	ldrh	w21, [x1, #:lo12:.LANCHOR97]
 	stp	x25, x26, [sp, 80]
-	ldrb	w1, [x19, #:lo12:.LANCHOR153]
+	ldrb	w1, [x19, #:lo12:.LANCHOR155]
 	add	w21, w22, w21
 	stp	x27, x28, [sp, 96]
 	ldr	x20, [x23, #:lo12:.LANCHOR10]
 	cmp	w1, 6
-	bhi	.L3750
+	bhi	.L3747
 	mov	w25, w0
 	and	w21, w21, 65535
-	adrp	x0, .L3643
-	add	x0, x0, :lo12:.L3643
+	adrp	x0, .L3640
+	add	x0, x0, :lo12:.L3640
 	ldrh	w0, [x0,w1,uxtw #1]
-	adr	x1, .Lrtx3643
+	adr	x1, .Lrtx3640
 	add	x0, x1, w0, sxth #2
 	br	x0
-.Lrtx3643:
+.Lrtx3640:
 	.section	.rodata.zftl_do_gc,"a",@progbits
 	.align	0
 	.align	2
-.L3643:
-	.2byte	(.L3642 - .Lrtx3643) / 4
-	.2byte	(.L3644 - .Lrtx3643) / 4
-	.2byte	(.L3645 - .Lrtx3643) / 4
-	.2byte	(.L3646 - .Lrtx3643) / 4
-	.2byte	(.L3647 - .Lrtx3643) / 4
-	.2byte	(.L3648 - .Lrtx3643) / 4
-	.2byte	(.L3649 - .Lrtx3643) / 4
+.L3640:
+	.2byte	(.L3639 - .Lrtx3640) / 4
+	.2byte	(.L3641 - .Lrtx3640) / 4
+	.2byte	(.L3642 - .Lrtx3640) / 4
+	.2byte	(.L3643 - .Lrtx3640) / 4
+	.2byte	(.L3644 - .Lrtx3640) / 4
+	.2byte	(.L3645 - .Lrtx3640) / 4
+	.2byte	(.L3646 - .Lrtx3640) / 4
 	.section	.text.zftl_do_gc
-.L3648:
+.L3645:
 	adrp	x20, .LANCHOR64
 	add	x24, x20, :lo12:.LANCHOR64
 	mov	w22, 0
-.L3650:
+.L3647:
 	bl	gc_check_data_one_wl
-	cbz	w0, .L3746
+	cbz	w0, .L3743
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	add	x20, x20, :lo12:.LANCHOR64
 	strh	wzr, [x20, 56]
@@ -23093,10 +23062,10 @@ zftl_do_gc:
 	strh	w0, [x1, 130]
 	ldr	x0, [x20, 8]
 	bl	zbuf_free
-	strb	wzr, [x19, #:lo12:.LANCHOR153]
+	strb	wzr, [x19, #:lo12:.LANCHOR155]
 	str	xzr, [x20, 8]
-	b	.L3820
-.L3642:
+	b	.L3817
+.L3639:
 	adrp	x0, .LANCHOR99
 	adrp	x27, .LANCHOR92
 	ldrh	w2, [x20, 80]
@@ -23111,16 +23080,16 @@ zftl_do_gc:
 	mov	w1, 65535
 	and	w24, w24, 65535
 	cmp	w2, w1
-	beq	.L3651
-	cbnz	w25, .L3652
+	beq	.L3648
+	cbnz	w25, .L3649
 	adrp	x0, .LANCHOR81
 	ldrh	w0, [x0, #:lo12:.LANCHOR81]
 	cmp	w21, w0, lsl 1
-	blt	.L3652
-.L3750:
+	blt	.L3649
+.L3747:
 	mov	w20, 16
-	b	.L3640
-.L3652:
+	b	.L3637
+.L3649:
 	adrp	x5, .LANCHOR89
 	mov	w1, 5
 	adrp	x25, .LANCHOR78
@@ -23132,95 +23101,95 @@ zftl_do_gc:
 	and	w3, w0, 65535
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L3653
+	beq	.L3650
 	adrp	x4, .LANCHOR9
 	ubfiz	x3, x3, 1, 16
-	adrp	x1, .LANCHOR154
+	adrp	x1, .LANCHOR156
 	mov	x26, x1
 	ldr	x4, [x4, #:lo12:.LANCHOR9]
-	ldr	w2, [x1, #:lo12:.LANCHOR154]
+	ldr	w2, [x1, #:lo12:.LANCHOR156]
 	add	w2, w2, 1
-	str	w2, [x1, #:lo12:.LANCHOR154]
+	str	w2, [x1, #:lo12:.LANCHOR156]
 	ldrh	w3, [x4, x3]
 	adrp	x4, .LANCHOR87
 	ldrh	w4, [x4, #:lo12:.LANCHOR87]
 	cmp	w4, w3
-	bcs	.L3654
+	bcs	.L3651
 	adrp	x1, .LANCHOR6
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	cmp	w2, w1, lsr 4
-	bls	.L3653
+	bls	.L3650
 	adrp	x1, .LANCHOR93
 	ldrh	w1, [x1, #:lo12:.LANCHOR93]
 	cmp	w1, w3
-	bls	.L3653
-.L3654:
+	bls	.L3650
+.L3651:
 	ldrb	w2, [x25, #:lo12:.LANCHOR78]
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L3655
+	cbz	w0, .L3652
 	mov	w0, 1
-	str	wzr, [x26, #:lo12:.LANCHOR154]
-	strb	w0, [x19, #:lo12:.LANCHOR153]
-	b	.L3750
-.L3653:
+	str	wzr, [x26, #:lo12:.LANCHOR156]
+	strb	w0, [x19, #:lo12:.LANCHOR155]
+	b	.L3747
+.L3650:
 	strh	wzr, [x5, #:lo12:.LANCHOR89]
-.L3655:
+.L3652:
 	cmp	w22, 15
-	bls	.L3752
+	bls	.L3749
 	adrp	x0, .LANCHOR94
 	ldrh	w1, [x0, #:lo12:.LANCHOR94]
 	adrp	x0, .LANCHOR95
 	ldrh	w0, [x0, #:lo12:.LANCHOR95]
 	cmp	w1, w0
-	bhi	.L3752
+	bhi	.L3749
 	cmp	w24, 0
 	cset	w24, eq
 	add	w24, w24, 1
-.L3656:
+.L3653:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3657
+	tbz	x0, 8, .L3654
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	mov	w4, w22
 	ldrb	w2, [x25, #:lo12:.LANCHOR78]
 	mov	w3, w21
-	mov	w1, 2170
+	mov	w1, 2175
 	ldrh	w7, [x0, 122]
 	ldrh	w6, [x0, 120]
 	ldrh	w5, [x0, 124]
 	ldrh	w0, [x20, 80]
 	str	w0, [sp]
-	adrp	x0, .LC242
-	add	x0, x0, :lo12:.LC242
+	adrp	x0, .LC241
+	add	x0, x0, :lo12:.LC241
 	bl	printf
-.L3657:
+.L3654:
 	ldrb	w0, [x25, #:lo12:.LANCHOR78]
 	mov	w2, 1
 	mov	w1, w24
 	bl	gc_search_src_blk
 	cmp	w0, 0
-	ble	.L3658
-.L3659:
+	ble	.L3655
+.L3656:
 	mov	w0, 1
-.L3822:
-	strb	w0, [x19, #:lo12:.LANCHOR153]
-	b	.L3750
-.L3752:
+.L3819:
+	strb	w0, [x19, #:lo12:.LANCHOR155]
+	b	.L3747
+.L3749:
 	mov	w24, 2
-	b	.L3656
-.L3658:
+	b	.L3653
+.L3655:
 	ldrb	w0, [x25, #:lo12:.LANCHOR78]
 	mov	w2, 1
 	mov	w1, 3
 	bl	gc_search_src_blk
 	cmp	w0, 0
-	bgt	.L3659
-	b	.L3750
-.L3651:
+	bgt	.L3656
+	b	.L3747
+.L3648:
 	adrp	x28, .LANCHOR14
 	ldr	w0, [x28, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3661
+	tbz	x0, 8, .L3658
 	adrp	x0, .LANCHOR78
 	ldrh	w7, [x20, 122]
 	ldrh	w6, [x20, 120]
@@ -23228,52 +23197,52 @@ zftl_do_gc:
 	ldrh	w5, [x20, 124]
 	mov	w3, w21
 	ldrb	w2, [x0, #:lo12:.LANCHOR78]
-	mov	w1, 2182
+	mov	w1, 2187
 	str	w25, [sp]
-	adrp	x0, .LC242
-	add	x0, x0, :lo12:.LC242
+	adrp	x0, .LC241
+	add	x0, x0, :lo12:.LC241
 	bl	printf
-.L3661:
+.L3658:
 	cmp	w25, 1
-	bne	.L3662
+	bne	.L3659
 	bl	gc_scan_static_data
 	adrp	x26, .LANCHOR78
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	ldrh	w0, [x0, 122]
-	cbz	w0, .L3663
-.L3664:
+	cbz	w0, .L3660
+.L3661:
 	mov	w0, 1
 	strb	w0, [x26, #:lo12:.LANCHOR78]
-	b	.L3822
-.L3663:
+	b	.L3819
+.L3660:
 	bl	gc_static_wearleveling
 	mov	w20, w0
-	cbnz	w0, .L3664
-	cbnz	w22, .L3665
-.L3669:
-	mov	w20, 16
+	cbnz	w0, .L3661
+	cbnz	w22, .L3662
 .L3666:
+	mov	w20, 16
+.L3663:
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	adrp	x3, .LANCHOR78
 	mov	w1, 1
 	mov	x23, x3
 	strb	w1, [x3, #:lo12:.LANCHOR78]
 	ldrh	w5, [x0, 124]
-	cbz	w5, .L3674
-	strb	w1, [x19, #:lo12:.LANCHOR153]
+	cbz	w5, .L3671
+	strb	w1, [x19, #:lo12:.LANCHOR155]
 	ldr	w1, [x28, #:lo12:.LANCHOR14]
 	strb	wzr, [x3, #:lo12:.LANCHOR78]
-	tbz	x1, 8, .L3640
+	tbz	x1, 8, .L3637
 	ldrh	w7, [x0, 122]
 	mov	w4, w22
 	ldrh	w6, [x0, 120]
 	mov	w3, w21
-	adrp	x0, .LC243
+	adrp	x0, .LC242
 	mov	w2, 0
-	mov	w1, 2272
-	add	x0, x0, :lo12:.LC243
+	mov	w1, 2277
+	add	x0, x0, :lo12:.LC242
 	bl	printf
-.L3640:
+.L3637:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
@@ -23283,45 +23252,45 @@ zftl_do_gc:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 128
 	ret
-.L3665:
+.L3662:
 	cmp	w21, w24
 	adrp	x1, .LANCHOR94
 	adrp	x2, .LANCHOR91
-	bcs	.L3667
+	bcs	.L3664
 	ldrh	w0, [x2, #:lo12:.LANCHOR91]
 	cmp	w0, w21
-	bhi	.L3668
-.L3667:
+	bhi	.L3665
+.L3664:
 	ldrh	w2, [x2, #:lo12:.LANCHOR91]
 	add	w0, w21, w24
 	cmp	w0, w2
-	blt	.L3668
+	blt	.L3665
 	adrp	x0, .LANCHOR95
 	ldrh	w2, [x1, #:lo12:.LANCHOR94]
 	ldrh	w0, [x0, #:lo12:.LANCHOR95]
 	cmp	w2, w0
-	bcc	.L3669
-.L3668:
-	adrp	x5, .LANCHOR154
+	bcc	.L3666
+.L3665:
+	adrp	x5, .LANCHOR156
 	adrp	x2, .LANCHOR6
 	mov	w6, 1
 	strb	w6, [x26, #:lo12:.LANCHOR78]
-	ldr	w0, [x5, #:lo12:.LANCHOR154]
+	ldr	w0, [x5, #:lo12:.LANCHOR156]
 	ldrh	w2, [x2, #:lo12:.LANCHOR6]
 	add	w0, w0, 1
-	str	w0, [x5, #:lo12:.LANCHOR154]
+	str	w0, [x5, #:lo12:.LANCHOR156]
 	cmp	w0, w2, lsr 5
-	bls	.L3670
+	bls	.L3667
 	ldrh	w0, [x1, #:lo12:.LANCHOR94]
 	cmp	w0, w22
-	bls	.L3670
+	bls	.L3667
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3669
+	beq	.L3666
 	adrp	x1, .LANCHOR9
 	ubfiz	x0, x0, 1, 16
 	adrp	x2, .LANCHOR80
@@ -23332,172 +23301,172 @@ zftl_do_gc:
 	ldrh	w0, [x0, #:lo12:.LANCHOR87]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	bgt	.L3669
+	bgt	.L3666
 	mov	w0, w6
-	str	wzr, [x5, #:lo12:.LANCHOR154]
+	str	wzr, [x5, #:lo12:.LANCHOR156]
 	mov	w2, 4
 	mov	w1, 2
-.L3810:
+.L3807:
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-	cbz	w0, .L3669
-	b	.L3659
-.L3670:
+	cbz	w0, .L3666
+	b	.L3656
+.L3667:
 	adrp	x0, .LANCHOR95
 	ldrh	w1, [x1, #:lo12:.LANCHOR94]
 	ldrh	w0, [x0, #:lo12:.LANCHOR95]
 	cmp	w1, w0
-	bcc	.L3672
+	bcc	.L3669
 	mov	w2, 1
 	mov	w1, 2
 	mov	w0, w2
-	b	.L3810
-.L3672:
+	b	.L3807
+.L3669:
 	ldrh	w0, [x27, #:lo12:.LANCHOR92]
-	cbnz	w0, .L3673
+	cbnz	w0, .L3670
 	ldr	x0, [x29, 104]
 	ldrh	w0, [x0, #:lo12:.LANCHOR90]
 	cmp	w0, 8
-	bls	.L3666
-.L3673:
+	bls	.L3663
+.L3670:
 	mov	w1, 1
 	mov	w2, 4
 	mov	w0, w1
-	b	.L3810
-.L3662:
+	b	.L3807
+.L3659:
 	adrp	x0, .LANCHOR81
 	ldrh	w0, [x0, #:lo12:.LANCHOR81]
 	cmp	w0, w21
-	bcc	.L3750
-	b	.L3669
-.L3674:
+	bcc	.L3747
+	b	.L3666
+.L3671:
 	adrp	x2, .LANCHOR81
 	mov	x26, x2
 	ldrh	w4, [x2, #:lo12:.LANCHOR81]
 	cmp	w21, w4
-	bcs	.L3675
-	cbz	w22, .L3676
+	bcs	.L3672
+	cbz	w22, .L3673
 	cmp	w22, 16
-	bls	.L3677
+	bls	.L3674
 	adrp	x0, .LANCHOR94
 	ldrh	w2, [x0, #:lo12:.LANCHOR94]
 	adrp	x0, .LANCHOR95
 	ldrh	w0, [x0, #:lo12:.LANCHOR95]
 	cmp	w2, w0
-	bhi	.L3677
+	bhi	.L3674
 	str	x3, [x29, 104]
 	mov	w2, 4
 	mov	w0, w1
 	bl	gc_search_src_blk
 	ldr	x3, [x29, 104]
 	tst	w0, 65535
-	bne	.L3678
+	bne	.L3675
 	ldrb	w0, [x3, #:lo12:.LANCHOR78]
 	mov	w2, 4
 	mov	w1, 3
-.L3812:
+.L3809:
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-.L3679:
-	cbnz	w0, .L3681
-	b	.L3640
-.L3678:
+.L3676:
+	cbnz	w0, .L3678
+	b	.L3637
+.L3675:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	and	w3, w0, 65535
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L3681
+	beq	.L3678
 	adrp	x4, .LANCHOR9
 	ubfiz	x3, x3, 1, 16
-	adrp	x1, .LANCHOR154
+	adrp	x1, .LANCHOR156
 	mov	x21, x1
 	ldr	x4, [x4, #:lo12:.LANCHOR9]
-	ldr	w2, [x1, #:lo12:.LANCHOR154]
+	ldr	w2, [x1, #:lo12:.LANCHOR156]
 	add	w2, w2, 1
-	str	w2, [x1, #:lo12:.LANCHOR154]
+	str	w2, [x1, #:lo12:.LANCHOR156]
 	ldrh	w3, [x4, x3]
 	adrp	x4, .LANCHOR87
 	ldrh	w4, [x4, #:lo12:.LANCHOR87]
 	cmp	w4, w3
-	bcs	.L3682
+	bcs	.L3679
 	adrp	x1, .LANCHOR6
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	cmp	w2, w1, lsr 4
-	bls	.L3681
+	bls	.L3678
 	adrp	x1, .LANCHOR93
 	ldrh	w1, [x1, #:lo12:.LANCHOR93]
 	cmp	w1, w3
-	bls	.L3681
-.L3682:
+	bls	.L3678
+.L3679:
 	ldrb	w2, [x23, #:lo12:.LANCHOR78]
 	mov	w1, 0
 	bl	gc_add_sblk
-	str	wzr, [x21, #:lo12:.LANCHOR154]
+	str	wzr, [x21, #:lo12:.LANCHOR156]
 	adrp	x0, .LANCHOR116
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR116]
-.L3681:
+.L3678:
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR153]
-	b	.L3640
-.L3677:
+	strb	w0, [x19, #:lo12:.LANCHOR155]
+	b	.L3637
+.L3674:
 	mov	w2, 1
 	mov	w0, w2
 	mov	w1, 2
-.L3819:
+.L3816:
 	bl	gc_search_src_blk
 	tst	w0, 65535
-	bne	.L3681
+	bne	.L3678
 	mov	w2, 2
-.L3815:
+.L3812:
 	mov	w1, 3
 	ldrb	w0, [x23, #:lo12:.LANCHOR78]
-	b	.L3812
-.L3676:
+	b	.L3809
+.L3673:
 	ldr	w1, [x28, #:lo12:.LANCHOR14]
 	strb	wzr, [x3, #:lo12:.LANCHOR78]
-	tbz	x1, 8, .L3684
+	tbz	x1, 8, .L3681
 	ldrh	w7, [x0, 122]
 	mov	w5, 0
 	ldrh	w6, [x0, 120]
 	mov	w4, 0
-	adrp	x0, .LC243
+	adrp	x0, .LC242
 	mov	w3, w21
 	mov	w2, 0
-	mov	w1, 2302
-	add	x0, x0, :lo12:.LC243
+	mov	w1, 2307
+	add	x0, x0, :lo12:.LC242
 	bl	printf
-.L3684:
+.L3681:
 	cmp	w21, 16
-	bls	.L3685
+	bls	.L3682
 	mov	w2, 4
-	b	.L3815
-.L3685:
+	b	.L3812
+.L3682:
 	mov	w2, 1
 	ldrb	w0, [x23, #:lo12:.LANCHOR78]
 	mov	w1, w2
-	b	.L3819
-.L3675:
+	b	.L3816
+.L3672:
 	cmp	w25, 1
-	bne	.L3640
+	bne	.L3637
 	cmp	w21, w4, lsl 1
-	bge	.L3686
+	bge	.L3683
 	cmp	w24, w22, lsr 1
-	bcs	.L3687
+	bcs	.L3684
 	adrp	x0, .LANCHOR94
 	ldrh	w1, [x0, #:lo12:.LANCHOR94]
 	adrp	x0, .LANCHOR95
 	ldrh	w0, [x0, #:lo12:.LANCHOR95]
 	cmp	w1, w0
-	bcs	.L3687
+	bcs	.L3684
 	adrp	x0, .LANCHOR91
 	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	lsr	w0, w0, 2
 	strh	w0, [x2, #:lo12:.LANCHOR81]
-	b	.L3640
-.L3687:
+	b	.L3637
+.L3684:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
@@ -23505,21 +23474,21 @@ zftl_do_gc:
 	mov	w1, 65535
 	mov	w28, w25
 	cmp	w25, w1
-	bne	.L3688
-.L3693:
-	cmp	w22, 1
-	bhi	.L3689
+	bne	.L3685
 .L3690:
+	cmp	w22, 1
+	bhi	.L3686
+.L3687:
 	cmp	w21, w24
 	adrp	x21, .LANCHOR91
-	bcs	.L3697
+	bcs	.L3694
 	strb	wzr, [x23, #:lo12:.LANCHOR78]
 	mov	w0, 4
 	bl	zftl_get_gc_node.part.9
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3697
+	beq	.L3694
 	adrp	x1, .LANCHOR9
 	ubfiz	x0, x0, 1, 16
 	adrp	x2, .LANCHOR80
@@ -23530,49 +23499,49 @@ zftl_do_gc:
 	ldrh	w0, [x0, #:lo12:.LANCHOR87]
 	mul	w0, w0, w2
 	cmp	w1, w0, lsr 1
-	ble	.L3699
-.L3697:
+	ble	.L3696
+.L3694:
 	ldrh	w0, [x21, #:lo12:.LANCHOR91]
 	lsr	w0, w0, 2
 	strh	w0, [x26, #:lo12:.LANCHOR81]
-	b	.L3640
-.L3688:
-	adrp	x2, .LANCHOR154
+	b	.L3637
+.L3685:
+	adrp	x2, .LANCHOR156
 	adrp	x3, .LANCHOR6
 	uxtw	x25, w25
-	ldr	w1, [x2, #:lo12:.LANCHOR154]
+	ldr	w1, [x2, #:lo12:.LANCHOR156]
 	ldrh	w3, [x3, #:lo12:.LANCHOR6]
 	add	w1, w1, 1
-	str	w1, [x2, #:lo12:.LANCHOR154]
+	str	w1, [x2, #:lo12:.LANCHOR156]
 	cmp	w1, w3, lsr 4
 	adrp	x3, .LANCHOR9
-	bls	.L3691
+	bls	.L3688
 	ldr	x1, [x3, #:lo12:.LANCHOR9]
-	str	wzr, [x2, #:lo12:.LANCHOR154]
+	str	wzr, [x2, #:lo12:.LANCHOR156]
 	ldrh	w2, [x1, x25, lsl 1]
 	adrp	x1, .LANCHOR93
 	ldrh	w1, [x1, #:lo12:.LANCHOR93]
 	cmp	w2, w1
-	bcs	.L3691
+	bcs	.L3688
 	str	x3, [x29, 96]
 	mov	w2, 1
 	mov	w1, 0
 	bl	gc_add_sblk
 	ldr	x3, [x29, 96]
-	cbnz	w0, .L3681
-.L3691:
+	cbnz	w0, .L3678
+.L3688:
 	ldr	x0, [x3, #:lo12:.LANCHOR9]
 	ldrh	w1, [x0, x25, lsl 1]
 	adrp	x0, .LANCHOR87
 	ldrh	w0, [x0, #:lo12:.LANCHOR87]
 	cmp	w1, w0, lsr 1
-	bhi	.L3692
+	bhi	.L3689
 	mov	w2, 0
 	mov	w1, 1
 	mov	w0, w28
 	bl	gc_add_sblk
-	b	.L3681
-.L3692:
+	b	.L3678
+.L3689:
 	ldr	x2, [x29, 104]
 	ldrh	w0, [x27, #:lo12:.LANCHOR92]
 	ldrh	w2, [x2, #:lo12:.LANCHOR90]
@@ -23580,173 +23549,173 @@ zftl_do_gc:
 	adrp	x2, .LANCHOR91
 	ldrh	w2, [x2, #:lo12:.LANCHOR91]
 	cmp	w0, w2, lsl 1
-	ble	.L3693
+	ble	.L3690
 	adrp	x0, .LANCHOR93
 	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w0, w1
-	bcc	.L3690
-	b	.L3693
-.L3689:
+	bcc	.L3687
+	b	.L3690
+.L3686:
 	mov	w1, 1
 	strb	w1, [x23, #:lo12:.LANCHOR78]
 	cmp	w22, 16
-	bls	.L3694
+	bls	.L3691
 	adrp	x0, .LANCHOR94
 	ldrh	w2, [x0, #:lo12:.LANCHOR94]
 	adrp	x0, .LANCHOR95
 	ldrh	w0, [x0, #:lo12:.LANCHOR95]
 	cmp	w2, w0
-	bhi	.L3694
+	bhi	.L3691
 	mov	w2, 4
 	mov	w0, w1
 	bl	gc_search_src_blk
 	ands	w0, w0, 65535
-	bne	.L3695
+	bne	.L3692
 	mov	w2, 4
-.L3811:
+.L3808:
 	ldrb	w0, [x23, #:lo12:.LANCHOR78]
 	mov	w1, 3
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-.L3695:
+.L3692:
 	adrp	x1, .LANCHOR91
 	cmp	w21, w24, lsr 1
 	ldrh	w1, [x1, #:lo12:.LANCHOR91]
-	bls	.L3813
+	bls	.L3810
 	lsr	w1, w1, 2
-.L3814:
+.L3811:
 	strh	w1, [x26, #:lo12:.LANCHOR81]
-	b	.L3679
-.L3694:
+	b	.L3676
+.L3691:
 	mov	w2, 1
 	mov	w1, 2
 	mov	w0, w2
 	bl	gc_search_src_blk
 	ands	w0, w0, 65535
-	bne	.L3695
+	bne	.L3692
 	mov	w2, 2
-	b	.L3811
-.L3699:
+	b	.L3808
+.L3696:
 	mov	w1, 3
 	mov	w2, 4
 	mov	w0, 0
 	bl	gc_search_src_blk
 	ldrh	w1, [x21, #:lo12:.LANCHOR91]
 	and	w0, w0, 65535
-.L3813:
+.L3810:
 	lsr	w1, w1, 1
-	b	.L3814
-.L3686:
+	b	.L3811
+.L3683:
 	adrp	x0, .LANCHOR91
 	mov	w20, 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	lsr	w0, w0, 2
 	strh	w0, [x2, #:lo12:.LANCHOR81]
-	b	.L3640
-.L3644:
+	b	.L3637
+.L3641:
 	adrp	x7, .LANCHOR64
 	mov	w0, 65535
 	ldrh	w1, [x7, #:lo12:.LANCHOR64]
 	cmp	w1, w0
-	bne	.L3700
+	bne	.L3697
 	bl	gc_get_src_blk
 	strh	w0, [x7, #:lo12:.LANCHOR64]
-.L3700:
+.L3697:
 	ldrh	w0, [x7, #:lo12:.LANCHOR64]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3701
+	beq	.L3698
 	adrp	x1, .LANCHOR6
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	cmp	w1, w0
-	bhi	.L3701
+	bhi	.L3698
 	mov	w0, -1
 	strh	w0, [x7, #:lo12:.LANCHOR64]
-.L3701:
+.L3698:
 	ldrh	w3, [x7, #:lo12:.LANCHOR64]
 	mov	w0, 65535
 	add	x1, x7, :lo12:.LANCHOR64
 	cmp	w3, w0
-	beq	.L3821
+	beq	.L3818
 	adrp	x0, .LANCHOR7
 	ldrh	w5, [x1, 56]
 	uxtw	x4, w3
 	ldr	x2, [x0, #:lo12:.LANCHOR7]
 	add	x2, x2, x4, lsl 2
-	cbz	w5, .L3703
+	cbz	w5, .L3700
 	add	x1, x1, 58
 	mov	w0, 0
-.L3705:
+.L3702:
 	ldrh	w6, [x1], 2
 	cmp	w6, w3
-	bne	.L3704
-.L3709:
+	bne	.L3701
+.L3706:
 	adrp	x0, .LANCHOR64
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR64]
-	b	.L3750
-.L3704:
+	b	.L3747
+.L3701:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w5, w0
-	bne	.L3705
-.L3703:
+	bne	.L3702
+.L3700:
 	ldrb	w0, [x2, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L3706
+	beq	.L3703
 	tst	w0, 192
-	bne	.L3707
-.L3706:
+	bne	.L3704
+.L3703:
 	adrp	x0, .LANCHOR9
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, x4, lsl 1]
-	cbz	w0, .L3709
-	mov	w2, 2537
-	adrp	x1, .LANCHOR226
+	cbz	w0, .L3706
+	mov	w2, 2542
+	adrp	x1, .LANCHOR228
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR226
+	add	x1, x1, :lo12:.LANCHOR228
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3709
-.L3707:
+	b	.L3706
+.L3704:
 	mov	w0, 2
-	b	.L3822
-.L3645:
+	b	.L3819
+.L3642:
 	bl	gc_scan_src_blk
 	cmn	w0, #1
-	bne	.L3710
+	bne	.L3707
 	mov	w0, 3
-	b	.L3822
-.L3710:
+	b	.L3819
+.L3707:
 	adrp	x20, .LANCHOR64
 	mov	w2, 65535
 	add	x0, x20, :lo12:.LANCHOR64
 	ldrh	w1, [x20, #:lo12:.LANCHOR64]
 	cmp	w1, w2
-	beq	.L3659
+	beq	.L3656
 	ldrh	w2, [x0, 24]
-	cbz	w2, .L3711
+	cbz	w2, .L3708
 	mov	w1, 4
 	strh	wzr, [x0, 26]
-	strb	w1, [x19, #:lo12:.LANCHOR153]
-	b	.L3750
-.L3711:
+	strb	w1, [x19, #:lo12:.LANCHOR155]
+	b	.L3747
+.L3708:
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR153]
+	strb	w0, [x19, #:lo12:.LANCHOR155]
 	adrp	x0, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	mov	x19, x0
 	ldr	x2, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L3712
-	adrp	x1, .LANCHOR226
+	cbz	w1, .L3709
+	adrp	x1, .LANCHOR228
 	adrp	x0, .LC0
-	mov	w2, 2565
-	add	x1, x1, :lo12:.LANCHOR226
+	mov	w2, 2570
+	add	x1, x1, :lo12:.LANCHOR228
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3712:
+.L3709:
 	ldrh	w0, [x20, #:lo12:.LANCHOR64]
 	add	x21, x20, :lo12:.LANCHOR64
 	bl	ftl_free_sblk
@@ -23757,98 +23726,98 @@ zftl_do_gc:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w0, 8
-	bhi	.L3713
+	bhi	.L3710
 	strh	w0, [x21, 30]
-	b	.L3709
-.L3713:
+	b	.L3706
+.L3710:
 	strh	wzr, [x21, 30]
 	bl	ftl_flush
 	bl	pm_flush
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L3709
-.L3646:
+	b	.L3706
+.L3643:
 	adrp	x20, .LANCHOR64
 	adrp	x23, .LANCHOR87
 	add	x22, x20, :lo12:.LANCHOR64
 	add	x23, x23, :lo12:.LANCHOR87
-.L3789:
+.L3786:
 	bl	gc_scan_src_blk_one_page
 	ldrh	w1, [x22, 2]
 	ldrh	w0, [x23]
 	cmp	w1, w0
-	bcs	.L3715
+	bcs	.L3712
 	cmp	w21, 7
-	bls	.L3789
-	b	.L3750
-.L3715:
+	bls	.L3786
+	b	.L3747
+.L3712:
 	ldrh	w3, [x22, 24]
 	adrp	x0, .LANCHOR14
-	cbz	w3, .L3716
+	cbz	w3, .L3713
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	mov	w1, 4
 	strh	wzr, [x22, 26]
-	strb	w1, [x19, #:lo12:.LANCHOR153]
+	strb	w1, [x19, #:lo12:.LANCHOR155]
 	adrp	x19, .LANCHOR9
-	tbz	x0, 8, .L3717
+	tbz	x0, 8, .L3714
 	ldrh	w1, [x22]
 	ldr	x2, [x19, #:lo12:.LANCHOR9]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC244
-	add	x0, x0, :lo12:.LC244
+	adrp	x0, .LC243
+	add	x0, x0, :lo12:.LC243
 	bl	printf
-.L3717:
+.L3714:
 	ldrh	w2, [x20, #:lo12:.LANCHOR64]
 	add	x0, x20, :lo12:.LANCHOR64
 	ldr	x1, [x19, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, 24]
 	ldrh	w1, [x1, x2, lsl 1]
 	cmp	w1, w0
-	beq	.L3718
-	adrp	x1, .LANCHOR226
+	beq	.L3715
+	adrp	x1, .LANCHOR228
 	adrp	x0, .LC0
-	mov	w2, 2599
-	add	x1, x1, :lo12:.LANCHOR226
+	mov	w2, 2604
+	add	x1, x1, :lo12:.LANCHOR228
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3718:
+.L3715:
 	add	x0, x20, :lo12:.LANCHOR64
 	ldrh	w1, [x20, #:lo12:.LANCHOR64]
 	ldrh	w2, [x0, 24]
 	ldr	x0, [x19, #:lo12:.LANCHOR9]
 	strh	w2, [x0, x1, lsl 1]
-	b	.L3750
-.L3716:
+	b	.L3747
+.L3713:
 	adrp	x2, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	ldrh	w1, [x22]
 	ldr	x21, [x2, #:lo12:.LANCHOR7]
 	mov	w2, 1
-	strb	w2, [x19, #:lo12:.LANCHOR153]
+	strb	w2, [x19, #:lo12:.LANCHOR155]
 	add	x21, x21, x1, uxth 2
-	tbz	x0, 8, .L3719
+	tbz	x0, 8, .L3716
 	ldrb	w2, [x21, 2]
-	adrp	x0, .LC245
-	add	x0, x0, :lo12:.LC245
+	adrp	x0, .LC244
+	add	x0, x0, :lo12:.LC244
 	ubfx	x2, x2, 5, 3
 	bl	printf
-.L3719:
+.L3716:
 	ldrb	w0, [x21, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L3720
+	beq	.L3717
 	tst	w0, 192
-	bne	.L3721
-.L3720:
-	adrp	x1, .LANCHOR226
+	bne	.L3718
+.L3717:
+	adrp	x1, .LANCHOR228
 	adrp	x0, .LC0
-	mov	w2, 2609
-	add	x1, x1, :lo12:.LANCHOR226
+	mov	w2, 2614
+	add	x1, x1, :lo12:.LANCHOR228
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3721:
+.L3718:
 	ldrh	w0, [x20, #:lo12:.LANCHOR64]
 	add	x19, x20, :lo12:.LANCHOR64
 	bl	ftl_free_sblk
@@ -23858,56 +23827,56 @@ zftl_do_gc:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w0, 8
-	bhi	.L3722
+	bhi	.L3719
 	strh	w0, [x19, 30]
-	b	.L3750
-.L3722:
+	b	.L3747
+.L3719:
 	strh	wzr, [x19, 30]
-.L3820:
+.L3817:
 	bl	flt_sys_flush
-	b	.L3750
-.L3647:
+	b	.L3747
+.L3644:
 	ldrh	w1, [x20, 80]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L3723
+	bne	.L3720
 	adrp	x0, .LANCHOR78
 	ldrb	w22, [x0, #:lo12:.LANCHOR78]
 	cmp	w22, 1
-	bne	.L3723
+	bne	.L3720
 	bl	ftl_flush
 	adrp	x0, .LANCHOR64
 	add	x1, x0, :lo12:.LANCHOR64
 	mov	x21, x0
 	ldrh	w1, [x1, 574]
-	cbz	w1, .L3724
+	cbz	w1, .L3721
 	mov	w0, w22
 	mov	w1, 5
-.L3817:
+.L3814:
 	bl	zftl_gc_get_free_sblk
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L3726
+	beq	.L3723
 	adrp	x0, .LANCHOR7
 	ldr	x22, [x0, #:lo12:.LANCHOR7]
 	add	x22, x22, x19, uxth 2
 	ldrb	w0, [x22, 2]
 	tst	w0, 224
-	beq	.L3727
-	adrp	x1, .LANCHOR226
+	beq	.L3724
+	adrp	x1, .LANCHOR228
 	adrp	x0, .LC0
-	mov	w2, 2638
-	add	x1, x1, :lo12:.LANCHOR226
+	mov	w2, 2643
+	add	x1, x1, :lo12:.LANCHOR228
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3727:
+.L3724:
 	ldrb	w0, [x22, 2]
 	mov	w1, 5
 	bfi	w0, w1, 5, 3
 	orr	w0, w0, 16
 	strb	w0, [x22, 2]
-.L3749:
+.L3746:
 	mov	w1, 1
 	mov	w0, w19
 	bl	ftl_erase_sblk
@@ -23932,16 +23901,16 @@ zftl_do_gc:
 	mov	w1, 255
 	ldrb	w0, [x20, #:lo12:.LANCHOR80]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR155
-	ldr	x0, [x0, #:lo12:.LANCHOR155]
+	adrp	x0, .LANCHOR157
+	ldr	x0, [x0, #:lo12:.LANCHOR157]
 	lsl	w2, w2, 2
 	bl	ftl_memset
 	ldrb	w0, [x20, #:lo12:.LANCHOR80]
 	mov	w1, 255
 	ldrh	w2, [x22, #:lo12:.LANCHOR79]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR156
-	ldr	x0, [x0, #:lo12:.LANCHOR156]
+	adrp	x0, .LANCHOR158
+	ldr	x0, [x0, #:lo12:.LANCHOR158]
 	lsl	w2, w2, 2
 	bl	ftl_memset
 	ldrb	w0, [x20, #:lo12:.LANCHOR80]
@@ -23970,12 +23939,12 @@ zftl_do_gc:
 	strh	wzr, [x0, 576]
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L3750
-.L3724:
+	b	.L3747
+.L3721:
 	mov	w1, 5
 	mov	w0, 0
-	b	.L3817
-.L3723:
+	b	.L3814
+.L3720:
 	cmp	w25, 1
 	mov	w22, 4
 	csinc	w22, w22, wzr, eq
@@ -23988,26 +23957,26 @@ zftl_do_gc:
 	add	x25, x25, :lo12:.LANCHOR78
 	add	x21, x24, :lo12:.LANCHOR64
 	add	x26, x20, 80
-.L3730:
+.L3727:
 	sub	w22, w22, #1
 	and	w22, w22, 255
 	cmp	w22, 255
-	beq	.L3750
+	beq	.L3747
 	bl	gc_do_copy_back
 	ldrb	w0, [x25]
-	cbnz	w0, .L3731
+	cbnz	w0, .L3728
 	adrp	x0, .LANCHOR54
 	ldrb	w0, [x0, #:lo12:.LANCHOR54]
 	cmp	w0, 3
-	bhi	.L3732
+	bhi	.L3729
 	bl	ftl_write_commit
-.L3732:
+.L3729:
 	ldrh	w1, [x21, 26]
 	ldrh	w0, [x21, 24]
 	cmp	w1, w0
-	bcc	.L3730
+	bcc	.L3727
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR153]
+	strb	w0, [x19, #:lo12:.LANCHOR155]
 	bl	ftl_write_commit
 	bl	ftl_flush
 	adrp	x0, .LANCHOR9
@@ -24015,37 +23984,37 @@ zftl_do_gc:
 	mov	x19, x0
 	ldr	x1, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x1, x2, lsl 1]
-	cbz	w1, .L3734
-	adrp	x1, .LANCHOR226
+	cbz	w1, .L3731
+	adrp	x1, .LANCHOR228
 	adrp	x0, .LC0
-	mov	w2, 2713
-	add	x1, x1, :lo12:.LANCHOR226
+	mov	w2, 2718
+	add	x1, x1, :lo12:.LANCHOR228
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3734:
+.L3731:
 	ldrh	w0, [x24, #:lo12:.LANCHOR64]
 	ldr	x2, [x19, #:lo12:.LANCHOR9]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L3735
+	cbnz	w1, .L3732
 	bl	ftl_free_sblk
-	b	.L3709
-.L3735:
+	b	.L3706
+.L3732:
 	mov	w2, 1
 	mov	w1, 0
 	bl	gc_add_sblk
-	b	.L3709
-.L3731:
+	b	.L3706
+.L3728:
 	ldrh	w0, [x21, 576]
-	cbz	w0, .L3736
+	cbz	w0, .L3733
 	strh	wzr, [x21, 576]
 	bl	sblk_wait_write_queue_completed
 	bl	gc_write_completed
 	ldr	w0, [x21, 580]
 	cmn	w0, #1
-	beq	.L3737
+	beq	.L3734
 	bl	ftl_mask_bad_block
-.L3737:
+.L3734:
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	add	x20, x24, :lo12:.LANCHOR64
 	strh	wzr, [x20, 56]
@@ -24060,30 +24029,30 @@ zftl_do_gc:
 	strh	w0, [x2, 126]
 	strh	w0, [x1, 130]
 	ldr	x0, [x20, 8]
-	cbz	x0, .L3738
+	cbz	x0, .L3735
 	bl	zbuf_free
-.L3738:
+.L3735:
 	add	x24, x24, :lo12:.LANCHOR64
 	str	xzr, [x24, 8]
 	bl	flt_sys_flush
-	mov	w2, 2751
-	strb	wzr, [x19, #:lo12:.LANCHOR153]
-	adrp	x1, .LANCHOR226
+	mov	w2, 2756
+	strb	wzr, [x19, #:lo12:.LANCHOR155]
+	adrp	x1, .LANCHOR228
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR226
+	add	x1, x1, :lo12:.LANCHOR228
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3750
-.L3736:
+	b	.L3747
+.L3733:
 	ldrh	w0, [x26, 6]
 	ldrh	w1, [x21, 26]
 	cmp	w0, 1
 	ldrh	w0, [x21, 24]
-	bls	.L3739
+	bls	.L3736
 	cmp	w1, w0
-	bcc	.L3730
+	bcc	.L3727
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR153]
+	strb	w0, [x19, #:lo12:.LANCHOR155]
 	ldrh	w0, [x21, 56]
 	add	w1, w0, 1
 	strh	w1, [x21, 56]
@@ -24092,12 +24061,12 @@ zftl_do_gc:
 	strh	w1, [x0, 58]
 	mov	w0, -1
 	strh	w0, [x21]
-	b	.L3750
-.L3739:
+	b	.L3747
+.L3736:
 	mov	w2, 5
-	strb	w2, [x19, #:lo12:.LANCHOR153]
+	strb	w2, [x19, #:lo12:.LANCHOR155]
 	cmp	w1, w0
-	bcc	.L3740
+	bcc	.L3737
 	ldrh	w0, [x21, 56]
 	add	w1, w0, 1
 	strh	w1, [x21, 56]
@@ -24106,7 +24075,7 @@ zftl_do_gc:
 	strh	w1, [x0, 58]
 	mov	w0, -1
 	strh	w0, [x21]
-.L3740:
+.L3737:
 	bl	ftl_flush
 	bl	sblk_wait_write_queue_completed
 	bl	gc_write_completed
@@ -24125,50 +24094,50 @@ zftl_do_gc:
 	strh	wzr, [x0, 16]
 	ldrb	w1, [x1, #:lo12:.LANCHOR73]
 	strh	w1, [x0, 20]
-	cbz	w2, .L3741
+	cbz	w2, .L3738
 	adrp	x2, .LANCHOR79
 	ldrh	w2, [x2, #:lo12:.LANCHOR79]
 	strh	w2, [x0, 18]
 	mov	w2, 1
 	strh	w2, [x0, 20]
-.L3741:
+.L3738:
 	cmp	w1, 2
-	bne	.L3743
+	bne	.L3740
 	add	x0, x24, :lo12:.LANCHOR64
 	ldrh	w1, [x0, 18]
 	ubfiz	w1, w1, 1, 15
 	strh	w1, [x0, 18]
 	adrp	x1, .LANCHOR74
 	ldrb	w1, [x1, #:lo12:.LANCHOR74]
-	cbnz	w1, .L3743
+	cbnz	w1, .L3740
 	mov	w1, 1
 	strh	w1, [x0, 20]
-.L3743:
+.L3740:
 	add	x24, x24, :lo12:.LANCHOR64
 	strh	wzr, [x24, 22]
-	b	.L3750
-.L3746:
+	b	.L3747
+.L3743:
 	ldrh	w1, [x24, 16]
 	ldrh	w0, [x24, 18]
 	cmp	w1, w0
-	bcc	.L3747
+	bcc	.L3744
 	mov	w0, 6
-	strb	w0, [x19, #:lo12:.LANCHOR153]
+	strb	w0, [x19, #:lo12:.LANCHOR155]
 	ldr	x0, [x24, 8]
 	bl	zbuf_free
 	str	xzr, [x24, 8]
-	b	.L3750
-.L3747:
+	b	.L3747
+.L3744:
 	cmp	w21, 15
-	bls	.L3650
+	bls	.L3647
 	cmp	w25, 1
-	bne	.L3750
+	bne	.L3747
 	add	w22, w22, 1
 	and	w22, w22, 255
 	cmp	w22, 4
-	bls	.L3650
-	b	.L3750
-.L3649:
+	bls	.L3647
+	b	.L3747
+.L3646:
 	bl	gc_update_l2p_map_new
 	mov	w21, -1
 	bl	gc_free_src_blk
@@ -24181,17 +24150,17 @@ zftl_do_gc:
 	strh	w21, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L3821:
-	strb	wzr, [x19, #:lo12:.LANCHOR153]
-	b	.L3750
-.L3726:
-	mov	w2, 2644
-	adrp	x1, .LANCHOR226
+.L3818:
+	strb	wzr, [x19, #:lo12:.LANCHOR155]
+	b	.L3747
+.L3723:
+	mov	w2, 2649
+	adrp	x1, .LANCHOR228
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR226
+	add	x1, x1, :lo12:.LANCHOR228
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3749
+	b	.L3746
 	.size	zftl_do_gc, .-zftl_do_gc
 	.section	.text.zftl_write,"ax",@progbits
 	.align	2
@@ -24200,50 +24169,53 @@ zftl_do_gc:
 zftl_write:
 	stp	x29, x30, [sp, -112]!
 	add	x29, sp, 0
-	stp	x27, x28, [sp, 80]
-	mov	w27, w0
+	stp	x25, x26, [sp, 64]
+	mov	w26, w0
 	adrp	x0, .LANCHOR14
 	stp	x19, x20, [sp, 16]
-	stp	x23, x24, [sp, 48]
+	stp	x21, x22, [sp, 32]
 	mov	w19, w1
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	mov	w20, w2
-	stp	x21, x22, [sp, 32]
-	mov	x23, x3
-	stp	x25, x26, [sp, 64]
-	tbz	x0, 12, .L3824
-	ldr	w4, [x23]
+	mov	w25, w2
+	stp	x23, x24, [sp, 48]
+	mov	x22, x3
+	stp	x27, x28, [sp, 80]
+	tbz	x0, 12, .L3821
+	ldr	w4, [x22]
 	mov	w3, w2
-	adrp	x0, .LC246
+	adrp	x0, .LC245
 	mov	w2, w1
-	add	x0, x0, :lo12:.LC246
-	mov	w1, w27
+	add	x0, x0, :lo12:.LC245
+	mov	w1, w26
 	bl	printf
-.L3824:
-	cbnz	w27, .L3825
+.L3821:
+	cbnz	w26, .L3822
 	adrp	x0, .LANCHOR61
-	mov	w27, 24576
+	mov	w26, 24576
 	ldr	w0, [x0, #:lo12:.LANCHOR61]
-.L3826:
-	add	w1, w19, w20
+.L3823:
+	cmp	w0, w19
+	ccmp	w0, w25, 0, hi
+	bcc	.L3838
+	add	w1, w19, w25
 	cmp	w0, w1
-	bcc	.L3840
-	adrp	x24, .LANCHOR125
-	add	w27, w27, w19
-	sub	w19, w20, #1
-	adrp	x25, .LANCHOR104
-	ldrb	w0, [x24, #:lo12:.LANCHOR125]
-	add	w19, w19, w27
-	add	x24, x24, :lo12:.LANCHOR125
-	udiv	w22, w27, w0
+	bcc	.L3838
+	adrp	x23, .LANCHOR126
+	add	w26, w26, w19
+	sub	w19, w25, #1
+	adrp	x24, .LANCHOR104
+	ldrb	w0, [x23, #:lo12:.LANCHOR126]
+	add	w19, w19, w26
+	add	x23, x23, :lo12:.LANCHOR126
+	udiv	w21, w26, w0
 	udiv	w19, w19, w0
-	add	w0, w27, w20
+	add	w0, w26, w25
 	str	w0, [x29, 108]
-	mov	w26, w22
-	sub	w21, w19, w22
-	add	w21, w21, 1
-.L3828:
-	cbnz	w21, .L3836
+	mov	w28, w21
+	sub	w20, w19, w21
+	add	w20, w20, 1
+.L3825:
+	cbnz	w20, .L3833
 	adrp	x20, .LANCHOR97
 	adrp	x19, .LANCHOR101
 	add	x20, x20, :lo12:.LANCHOR97
@@ -24253,14 +24225,14 @@ zftl_write:
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
-.L3837:
+.L3834:
 	ldrh	w0, [x20]
 	ldrh	w1, [x19]
 	add	w0, w0, w1
 	cmp	w0, 7
-	ble	.L3838
+	ble	.L3835
 	mov	w0, 0
-.L3823:
+.L3820:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -24268,73 +24240,73 @@ zftl_write:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L3825:
-	cmp	w27, 3
-	bhi	.L3840
-	lsl	w27, w27, 13
+.L3822:
+	cmp	w26, 3
+	bhi	.L3838
+	lsl	w26, w26, 13
 	mov	w0, 8192
-	b	.L3826
-.L3836:
+	b	.L3823
+.L3833:
 	mov	w0, 0
 	bl	buf_alloc
-	mov	x28, x0
-	cbnz	x0, .L3829
+	mov	x27, x0
+	cbnz	x0, .L3826
 	bl	ftl_write_commit
-	b	.L3828
-.L3829:
-	ldrb	w3, [x24]
-	cmp	w26, w22
+	b	.L3825
+.L3826:
+	ldrb	w3, [x23]
+	cmp	w28, w21
 	strb	wzr, [x0, 57]
-	ccmp	w26, w19, 4, ne
+	ccmp	w28, w19, 4, ne
 	strb	w3, [x0, 56]
-	bne	.L3832
-	cmp	w26, w22
-	bne	.L3833
-	udiv	w0, w27, w3
-	msub	w0, w0, w3, w27
+	bne	.L3829
+	cmp	w28, w21
+	bne	.L3830
+	udiv	w0, w26, w3
+	msub	w0, w0, w3, w26
 	and	w0, w0, 255
-	strb	w0, [x28, 57]
+	strb	w0, [x27, 57]
 	sub	w3, w3, w0
 	and	w3, w3, 255
-	cmp	w20, w3
-	csel	w3, w20, w3, cc
-.L3845:
-	strb	w3, [x28, 56]
-.L3832:
-	ldr	x3, [x28, 8]
-	mov	x1, x23
-	ldrb	w0, [x28, 57]
-	sub	w21, w21, #1
-	ldrb	w2, [x28, 56]
+	cmp	w25, w3
+	csel	w3, w25, w3, cc
+.L3843:
+	strb	w3, [x27, 56]
+.L3829:
+	ldr	x3, [x27, 8]
+	mov	x1, x22
+	ldrb	w0, [x27, 57]
+	sub	w20, w20, #1
+	ldrb	w2, [x27, 56]
 	ubfiz	x0, x0, 9, 8
 	lsl	w2, w2, 9
 	add	x0, x3, x0
 	bl	ftl_memcpy
-	ldr	x1, [x25, #:lo12:.LANCHOR104]
+	ldr	x1, [x24, #:lo12:.LANCHOR104]
 	ldr	w0, [x1, 8]
-	str	w26, [x28, 36]
-	add	w26, w26, 1
+	str	w28, [x27, 36]
+	add	w28, w28, 1
 	add	w2, w0, 1
 	str	w2, [x1, 8]
-	str	w0, [x28, 32]
-	mov	x0, x28
+	str	w0, [x27, 32]
+	mov	x0, x27
 	bl	ftl_write_buf
-	ldrb	w0, [x28, 56]
+	ldrb	w0, [x27, 56]
 	ubfiz	x0, x0, 9, 8
-	add	x23, x23, x0
-	b	.L3828
-.L3833:
+	add	x22, x22, x0
+	b	.L3825
+.L3830:
 	ldr	w0, [x29, 108]
-	msub	w3, w3, w26, w0
-	b	.L3845
-.L3838:
+	msub	w3, w3, w28, w0
+	b	.L3843
+.L3835:
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
-	b	.L3837
-.L3840:
+	b	.L3834
+.L3838:
 	mov	w0, -1
-	b	.L3823
+	b	.L3820
 	.size	zftl_write, .-zftl_write
 	.section	.text.ftl_vendor_write,"ax",@progbits
 	.align	2
@@ -24393,12 +24365,12 @@ ftl_write:
 	mov	x20, x3
 	mov	w22, w1
 	ands	w21, w0, 255
-	bne	.L3851
+	bne	.L3849
 	mov	w3, w2
 	mov	w0, 0
 	mov	x2, x20
 	bl	idb_write_data
-.L3851:
+.L3849:
 	mov	x3, x20
 	mov	w2, w19
 	mov	w1, w22
@@ -24414,46 +24386,49 @@ ftl_write:
 	.type	zftl_discard, %function
 zftl_discard:
 	stp	x29, x30, [sp, -128]!
-	adrp	x2, .LANCHOR61
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w19, w1
-	ldr	w2, [x2, #:lo12:.LANCHOR61]
-	add	w1, w0, w1
+	adrp	x1, .LANCHOR61
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	cmp	w2, w1
+	ldr	w1, [x1, #:lo12:.LANCHOR61]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	bcc	.L3874
-	adrp	x24, .LANCHOR227
+	cmp	w0, w1
+	ccmp	w19, w1, 2, cc
+	bhi	.L3873
+	add	w2, w0, w19
+	cmp	w1, w2
+	bcc	.L3873
+	adrp	x24, .LANCHOR229
 	add	w22, w0, 24576
 	adrp	x0, .LANCHOR14
 	str	x0, [x29, 104]
-	ldr	w1, [x24, #:lo12:.LANCHOR227]
+	ldr	w1, [x24, #:lo12:.LANCHOR229]
 	ldr	w2, [x0, #:lo12:.LANCHOR14]
 	add	w1, w19, w1
-	str	w1, [x24, #:lo12:.LANCHOR227]
-	tbz	x2, 12, .L3855
-	adrp	x0, .LC247
+	str	w1, [x24, #:lo12:.LANCHOR229]
+	tbz	x2, 12, .L3853
+	adrp	x0, .LC246
 	mov	w4, 0
 	mov	w3, w19
 	mov	w2, w22
-	add	x0, x0, :lo12:.LC247
+	add	x0, x0, :lo12:.LC246
 	bl	printf
-.L3855:
+.L3853:
 	adrp	x23, .LANCHOR104
-	adrp	x26, .LANCHOR125
+	adrp	x26, .LANCHOR126
 	ldr	x0, [x23, #:lo12:.LANCHOR104]
 	ldr	w27, [x0, 8]
 	add	w1, w27, 1
 	str	w1, [x0, 8]
 	bl	ftl_write_commit
 	bl	ftl_flush
-	ldrb	w21, [x26, #:lo12:.LANCHOR125]
+	ldrb	w21, [x26, #:lo12:.LANCHOR126]
 	udiv	w20, w22, w21
 	msub	w25, w20, w21, w22
-	cbz	w25, .L3856
+	cbz	w25, .L3854
 	sub	w21, w21, w25
 	mov	w0, w20
 	cmp	w21, w19
@@ -24461,20 +24436,20 @@ zftl_discard:
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	bne	.L3857
+	bne	.L3855
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
-.L3857:
+.L3855:
 	ldr	w0, [x29, 120]
 	and	w28, w21, 65535
 	cmn	w0, #1
-	beq	.L3859
+	beq	.L3857
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x3, x0
-	cbz	x0, .L3859
+	cbz	x0, .L3857
 	strb	w25, [x0, 57]
 	ubfiz	x25, x25, 9, 25
 	strb	w21, [x0, 56]
@@ -24493,53 +24468,53 @@ zftl_discard:
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3859:
+.L3857:
 	add	w20, w20, 1
 	sub	w19, w19, w28
-.L3856:
-	cbz	w19, .L3861
+.L3854:
+	cbz	w19, .L3859
 	bl	ftl_flush
-.L3861:
+.L3859:
 	adrp	x25, .LANCHOR68
-	add	x21, x26, :lo12:.LANCHOR125
+	add	x21, x26, :lo12:.LANCHOR126
 	add	x25, x25, :lo12:.LANCHOR68
 	mov	w0, -1
 	str	w0, [x29, 124]
-.L3862:
+.L3860:
 	ldrb	w0, [x21]
 	cmp	w19, w0
-	bcs	.L3867
-	cbz	w19, .L3869
+	bcs	.L3865
+	cbz	w19, .L3867
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	bne	.L3870
+	bne	.L3868
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
-.L3870:
+.L3868:
 	ldr	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3869
+	beq	.L3867
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x21, x0
-	cbz	x0, .L3869
+	cbz	x0, .L3867
 	strb	wzr, [x0, 57]
 	strb	w19, [x0, 56]
 	stp	w27, w20, [x21, 32]
-	ldrb	w0, [x26, #:lo12:.LANCHOR125]
+	ldrb	w0, [x26, #:lo12:.LANCHOR126]
 	cmp	w19, w0
-	bcc	.L3872
-	adrp	x1, .LANCHOR228
+	bcc	.L3870
+	adrp	x1, .LANCHOR230
 	adrp	x0, .LC0
-	mov	w2, 1259
-	add	x1, x1, :lo12:.LANCHOR228
+	mov	w2, 1261
+	add	x1, x1, :lo12:.LANCHOR230
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3872:
+.L3870:
 	ldr	x0, [x21, 8]
 	lsl	w2, w19, 9
 	mov	w1, 0
@@ -24551,38 +24526,38 @@ zftl_discard:
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3869:
-	ldr	w1, [x24, #:lo12:.LANCHOR227]
+.L3867:
+	ldr	w1, [x24, #:lo12:.LANCHOR229]
 	cmp	w1, 8192
-	bls	.L3875
+	bls	.L3874
 	ldr	x0, [x29, 104]
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3873
-	adrp	x0, .LC247
+	tbz	x0, 12, .L3871
+	adrp	x0, .LC246
 	mov	w4, 0
 	mov	w3, w19
 	mov	w2, w22
-	add	x0, x0, :lo12:.LC247
+	add	x0, x0, :lo12:.LC246
 	bl	printf
-.L3873:
-	str	wzr, [x24, #:lo12:.LANCHOR227]
+.L3871:
+	str	wzr, [x24, #:lo12:.LANCHOR229]
 	bl	flt_sys_flush
 	adrp	x0, .LANCHOR116
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR116]
-.L3875:
+.L3874:
 	mov	w0, 0
-	b	.L3853
-.L3867:
+	b	.L3851
+.L3865:
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3863
+	beq	.L3861
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbz	x0, .L3865
+	cbz	x0, .L3863
 	ldrb	w2, [x21]
 	mov	w1, 0
 	strb	w2, [x0, 56]
@@ -24594,24 +24569,24 @@ zftl_discard:
 	mov	x0, x28
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-.L3901:
+.L3900:
 	ldr	x1, [x23, #:lo12:.LANCHOR104]
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3865:
+.L3863:
 	ldrb	w0, [x21]
 	add	w20, w20, 1
 	sub	w19, w19, w0
-	b	.L3862
-.L3863:
+	b	.L3860
+.L3861:
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
 	ldr	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3865
+	beq	.L3863
 	add	x1, x29, 124
 	mov	w2, 1
 	mov	w0, w20
@@ -24632,10 +24607,10 @@ zftl_discard:
 	ldrb	w1, [x1, #:lo12:.LANCHOR69]
 	udiv	w0, w0, w1
 	bl	ftl_vpn_decrement
-	b	.L3901
-.L3874:
+	b	.L3900
+.L3873:
 	mov	w0, -1
-.L3853:
+.L3851:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -24660,47 +24635,47 @@ ftl_discard:
 dump_pm_blk:
 	stp	x29, x30, [sp, -48]!
 	mov	w2, 4
-	adrp	x0, .LC248
-	add	x0, x0, :lo12:.LC248
+	adrp	x0, .LC247
+	add	x0, x0, :lo12:.LC247
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x20, .LANCHOR104
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR149
+	adrp	x21, .LANCHOR151
 	ldr	x1, [x20, #:lo12:.LANCHOR104]
 	mov	w19, 0
 	mov	w22, 65535
 	add	x1, x1, 704
 	ldrh	w3, [x1, -6]
 	bl	rknand_print_hex
-	ldrh	w3, [x21, #:lo12:.LANCHOR149]
-	add	x21, x21, :lo12:.LANCHOR149
+	ldrh	w3, [x21, #:lo12:.LANCHOR151]
+	add	x21, x21, :lo12:.LANCHOR151
 	ldr	x1, [x20, #:lo12:.LANCHOR104]
 	mov	w2, 2
-	adrp	x0, .LC249
-	add	x0, x0, :lo12:.LC249
+	adrp	x0, .LC248
+	add	x0, x0, :lo12:.LC248
 	add	x1, x1, 416
 	bl	rknand_print_hex
-.L3904:
+.L3903:
 	ldrh	w0, [x21]
 	cmp	w0, w19
-	bhi	.L3906
+	bhi	.L3905
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L3906:
+.L3905:
 	ldr	x0, [x20, #:lo12:.LANCHOR104]
 	add	x0, x0, x19, sxtw 1
 	ldrh	w0, [x0, 416]
 	cmp	w0, w22
-	beq	.L3905
+	beq	.L3904
 	mov	x1, 0
 	bl	ftl_sblk_dump
-.L3905:
+.L3904:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L3904
+	b	.L3903
 	.size	dump_pm_blk, .-dump_pm_blk
 	.global	g_pm_spare
 	.global	pm_first_write
@@ -24893,7 +24868,7 @@ _c_ftl_block_align_addr:
 	.zero	2
 	.section	.bss._c_ftl_byte_pre_page,"aw",@nobits
 	.align	1
-	.set	.LANCHOR208,. + 0
+	.set	.LANCHOR210,. + 0
 	.type	_c_ftl_byte_pre_page, %object
 	.size	_c_ftl_byte_pre_page, 2
 _c_ftl_byte_pre_page:
@@ -24950,34 +24925,34 @@ _c_ftl_planes_per_die:
 	.zero	1
 	.section	.bss._c_ftl_pm_page_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR194,. + 0
+	.set	.LANCHOR193,. + 0
 	.type	_c_ftl_pm_page_num, %object
 	.size	_c_ftl_pm_page_num, 2
 _c_ftl_pm_page_num:
 	.zero	2
 	.section	.bss._c_ftl_sec_per_page,"aw",@nobits
-	.set	.LANCHOR125,. + 0
+	.set	.LANCHOR126,. + 0
 	.type	_c_ftl_sec_per_page, %object
 	.size	_c_ftl_sec_per_page, 1
 _c_ftl_sec_per_page:
 	.zero	1
 	.section	.bss._c_max_pm_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR149,. + 0
+	.set	.LANCHOR151,. + 0
 	.type	_c_max_pm_sblk, %object
 	.size	_c_max_pm_sblk, 2
 _c_max_pm_sblk:
 	.zero	2
 	.section	.bss._c_mix_max_slc_ec_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR120,. + 0
+	.set	.LANCHOR121,. + 0
 	.type	_c_mix_max_slc_ec_count, %object
 	.size	_c_mix_max_slc_ec_count, 2
 _c_mix_max_slc_ec_count:
 	.zero	2
 	.section	.bss._c_mix_max_xlc_ec_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR118,. + 0
+	.set	.LANCHOR119,. + 0
 	.type	_c_mix_max_xlc_ec_count, %object
 	.size	_c_mix_max_xlc_ec_count, 2
 _c_mix_max_xlc_ec_count:
@@ -24991,35 +24966,35 @@ _c_slc_to_xlc_ec_ratio:
 	.zero	2
 	.section	.bss._c_swl_slc_gc_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR148,. + 0
+	.set	.LANCHOR150,. + 0
 	.type	_c_swl_slc_gc_th, %object
 	.size	_c_swl_slc_gc_th, 2
 _c_swl_slc_gc_th:
 	.zero	2
 	.section	.bss._c_swl_xlc_gc_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR147,. + 0
+	.set	.LANCHOR149,. + 0
 	.type	_c_swl_xlc_gc_th, %object
 	.size	_c_swl_xlc_gc_th, 2
 _c_swl_xlc_gc_th:
 	.zero	2
 	.section	.bss._c_totle_data_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR213,. + 0
+	.set	.LANCHOR215,. + 0
 	.type	_c_totle_data_density, %object
 	.size	_c_totle_data_density, 4
 _c_totle_data_density:
 	.zero	4
 	.section	.bss._c_totle_log_page,"aw",@nobits
 	.align	2
-	.set	.LANCHOR122,. + 0
+	.set	.LANCHOR123,. + 0
 	.type	_c_totle_log_page, %object
 	.size	_c_totle_log_page, 4
 _c_totle_log_page:
 	.zero	4
 	.section	.bss._c_totle_phy_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR212,. + 0
+	.set	.LANCHOR214,. + 0
 	.type	_c_totle_phy_density, %object
 	.size	_c_totle_phy_density, 4
 _c_totle_phy_density:
@@ -25052,7 +25027,7 @@ _last_write_time:
 	.zero	4
 	.section	.bss._max_slc_super_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR119,. + 0
+	.set	.LANCHOR120,. + 0
 	.type	_max_slc_super_block, %object
 	.size	_max_slc_super_block, 2
 _max_slc_super_block:
@@ -25073,7 +25048,7 @@ _min_slc_super_block:
 	.zero	2
 	.section	.bss.discard_sector_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR227,. + 0
+	.set	.LANCHOR229,. + 0
 	.type	discard_sector_count, %object
 	.size	discard_sector_count, 4
 discard_sector_count:
@@ -25087,14 +25062,14 @@ fill_spare_size:
 	.zero	2
 	.section	.bss.flash_ddr_tuning_sdr_read_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR163,. + 0
+	.set	.LANCHOR165,. + 0
 	.type	flash_ddr_tuning_sdr_read_count, %object
 	.size	flash_ddr_tuning_sdr_read_count, 4
 flash_ddr_tuning_sdr_read_count:
 	.zero	4
 	.section	.bss.flash_read_retry,"aw",@nobits
 	.align	3
-	.set	.LANCHOR165,. + 0
+	.set	.LANCHOR167,. + 0
 	.type	flash_read_retry, %object
 	.size	flash_read_retry, 8
 flash_read_retry:
@@ -25133,14 +25108,14 @@ free_xlc_sblk:
 ftl_ext_info_data_buffer:
 	.zero	16384
 	.section	.bss.ftl_ext_info_first_write,"aw",@nobits
-	.set	.LANCHOR186,. + 0
+	.set	.LANCHOR189,. + 0
 	.type	ftl_ext_info_first_write, %object
 	.size	ftl_ext_info_first_write, 1
 ftl_ext_info_first_write:
 	.zero	1
 	.section	.bss.ftl_flush_jiffies,"aw",@nobits
 	.align	2
-	.set	.LANCHOR222,. + 0
+	.set	.LANCHOR224,. + 0
 	.type	ftl_flush_jiffies, %object
 	.size	ftl_flush_jiffies, 4
 ftl_flush_jiffies:
@@ -25153,7 +25128,7 @@ ftl_info_data_buffer:
 	.zero	16384
 	.section	.bss.ftl_info_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR181,. + 0
+	.set	.LANCHOR184,. + 0
 	.type	ftl_info_spare, %object
 	.size	ftl_info_spare, 256
 ftl_info_spare:
@@ -25166,7 +25141,7 @@ ftl_info_spare:
 ftl_low_format_cur_blk:
 	.zero	2
 	.section	.bss.ftl_power_lost_flag,"aw",@nobits
-	.set	.LANCHOR185,. + 0
+	.set	.LANCHOR188,. + 0
 	.type	ftl_power_lost_flag, %object
 	.size	ftl_power_lost_flag, 1
 ftl_power_lost_flag:
@@ -25207,7 +25182,7 @@ ftl_sblk_vpn:
 ftl_sblk_vpn_update_id:
 	.zero	2
 	.section	.bss.ftl_sys_info_first_write,"aw",@nobits
-	.set	.LANCHOR184,. + 0
+	.set	.LANCHOR187,. + 0
 	.type	ftl_sys_info_first_write, %object
 	.size	ftl_sys_info_first_write, 1
 ftl_sys_info_first_write:
@@ -25220,7 +25195,7 @@ ftl_tmp_buffer:
 	.zero	16384
 	.section	.bss.ftl_tmp_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR179,. + 0
+	.set	.LANCHOR182,. + 0
 	.type	ftl_tmp_spare, %object
 	.size	ftl_tmp_spare, 256
 ftl_tmp_spare:
@@ -25248,7 +25223,7 @@ g_buf:
 	.zero	2048
 	.section	.bss.g_die_addr,"aw",@nobits
 	.align	2
-	.set	.LANCHOR143,. + 0
+	.set	.LANCHOR145,. + 0
 	.type	g_die_addr, %object
 	.size	g_die_addr, 32
 g_die_addr:
@@ -25274,7 +25249,7 @@ g_flash_3d_tlc_flag:
 	.zero	1
 	.section	.bss.g_flash_blk_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR198,. + 0
+	.set	.LANCHOR201,. + 0
 	.type	g_flash_blk_info, %object
 	.size	g_flash_blk_info, 4
 g_flash_blk_info:
@@ -25293,13 +25268,13 @@ g_flash_cur_mode:
 g_flash_interface_mode:
 	.zero	1
 	.section	.bss.g_flash_micron_3d_tlc_b05a,"aw",@nobits
-	.set	.LANCHOR204,. + 0
+	.set	.LANCHOR118,. + 0
 	.type	g_flash_micron_3d_tlc_b05a, %object
 	.size	g_flash_micron_3d_tlc_b05a, 1
 g_flash_micron_3d_tlc_b05a:
 	.zero	1
 	.section	.bss.g_flash_micron_3d_tlc_b16a,"aw",@nobits
-	.set	.LANCHOR205,. + 0
+	.set	.LANCHOR207,. + 0
 	.type	g_flash_micron_3d_tlc_b16a, %object
 	.size	g_flash_micron_3d_tlc_b16a, 1
 g_flash_micron_3d_tlc_b16a:
@@ -25317,20 +25292,20 @@ g_flash_micron_3d_tlc_flag:
 g_flash_multi_page_prog_en:
 	.zero	1
 	.section	.bss.g_flash_multi_page_read_en,"aw",@nobits
-	.set	.LANCHOR171,. + 0
+	.set	.LANCHOR179,. + 0
 	.type	g_flash_multi_page_read_en, %object
 	.size	g_flash_multi_page_read_en, 1
 g_flash_multi_page_read_en:
 	.zero	1
 	.section	.bss.g_flash_page_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR167,. + 0
+	.set	.LANCHOR169,. + 0
 	.type	g_flash_page_buffer, %object
 	.size	g_flash_page_buffer, 8
 g_flash_page_buffer:
 	.zero	8
 	.section	.bss.g_flash_reversd_blks,"aw",@nobits
-	.set	.LANCHOR203,. + 0
+	.set	.LANCHOR206,. + 0
 	.type	g_flash_reversd_blks, %object
 	.size	g_flash_reversd_blks, 1
 g_flash_reversd_blks:
@@ -25343,28 +25318,28 @@ g_flash_slc_mode:
 	.zero	1
 	.section	.bss.g_flash_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR166,. + 0
+	.set	.LANCHOR168,. + 0
 	.type	g_flash_spare_buffer, %object
 	.size	g_flash_spare_buffer, 8
 g_flash_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_sys_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR197,. + 0
+	.set	.LANCHOR200,. + 0
 	.type	g_flash_sys_spare_buffer, %object
 	.size	g_flash_sys_spare_buffer, 8
 g_flash_sys_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_tmp_page_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR159,. + 0
+	.set	.LANCHOR161,. + 0
 	.type	g_flash_tmp_page_buffer, %object
 	.size	g_flash_tmp_page_buffer, 8
 g_flash_tmp_page_buffer:
 	.zero	8
 	.section	.bss.g_flash_tmp_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR161,. + 0
+	.set	.LANCHOR163,. + 0
 	.type	g_flash_tmp_spare_buffer, %object
 	.size	g_flash_tmp_spare_buffer, 8
 g_flash_tmp_spare_buffer:
@@ -25377,7 +25352,7 @@ g_flash_toggle_mode_en:
 	.zero	1
 	.section	.bss.g_ftl_info_blk,"aw",@nobits
 	.align	6
-	.set	.LANCHOR182,. + 0
+	.set	.LANCHOR185,. + 0
 	.type	g_ftl_info_blk, %object
 	.size	g_ftl_info_blk, 4
 g_ftl_info_blk:
@@ -25415,14 +25390,14 @@ g_lsb_page_tbl:
 g_maxRegNum:
 	.zero	1
 	.section	.bss.g_maxRetryCount,"aw",@nobits
-	.set	.LANCHOR162,. + 0
+	.set	.LANCHOR164,. + 0
 	.type	g_maxRetryCount, %object
 	.size	g_maxRetryCount, 1
 g_maxRetryCount:
 	.zero	1
 	.section	.bss.g_msb_page_tbl,"aw",@nobits
 	.align	2
-	.set	.LANCHOR140,. + 0
+	.set	.LANCHOR142,. + 0
 	.type	g_msb_page_tbl, %object
 	.size	g_msb_page_tbl, 1024
 g_msb_page_tbl:
@@ -25447,7 +25422,7 @@ g_nand_opt_para:
 g_nandc_ecc_bits:
 	.zero	1
 	.section	.bss.g_nandc_tran_timeout,"aw",@nobits
-	.set	.LANCHOR160,. + 0
+	.set	.LANCHOR162,. + 0
 	.type	g_nandc_tran_timeout, %object
 	.size	g_nandc_tran_timeout, 1
 g_nandc_tran_timeout:
@@ -25473,7 +25448,7 @@ g_one_pass_program:
 	.zero	1
 	.section	.bss.g_pm_spare,"aw",@nobits
 	.align	3
-	.set	.LANCHOR191,. + 0
+	.set	.LANCHOR197,. + 0
 	.type	g_pm_spare, %object
 	.size	g_pm_spare, 8
 g_pm_spare:
@@ -25497,21 +25472,21 @@ g_slc_mode_enable:
 	.zero	1
 	.section	.bss.g_slc_page_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR142,. + 0
+	.set	.LANCHOR144,. + 0
 	.type	g_slc_page_num, %object
 	.size	g_slc_page_num, 2
 g_slc_page_num:
 	.zero	2
 	.section	.bss.g_totle_phy_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR144,. + 0
+	.set	.LANCHOR146,. + 0
 	.type	g_totle_phy_block, %object
 	.size	g_totle_phy_block, 2
 g_totle_phy_block:
 	.zero	2
 	.section	.bss.gc_des_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR157,. + 0
+	.set	.LANCHOR159,. + 0
 	.type	gc_des_ppa_tbl, %object
 	.size	gc_des_ppa_tbl, 8
 gc_des_ppa_tbl:
@@ -25525,7 +25500,7 @@ gc_free_slc_sblk_th:
 	.zero	2
 	.section	.bss.gc_lpa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR155,. + 0
+	.set	.LANCHOR157,. + 0
 	.type	gc_lpa_tbl, %object
 	.size	gc_lpa_tbl, 8
 gc_lpa_tbl:
@@ -25545,14 +25520,14 @@ gc_page_buf_id:
 	.zero	8
 	.section	.bss.gc_pre_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR156,. + 0
+	.set	.LANCHOR158,. + 0
 	.type	gc_pre_ppa_tbl, %object
 	.size	gc_pre_ppa_tbl, 8
 gc_pre_ppa_tbl:
 	.zero	8
 	.section	.bss.gc_search_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR154,. + 0
+	.set	.LANCHOR156,. + 0
 	.type	gc_search_count, %object
 	.size	gc_search_count, 4
 gc_search_count:
@@ -25586,7 +25561,7 @@ gc_slc_mode_tlc_vpn_th:
 gc_slc_mode_vpn_th:
 	.zero	2
 	.section	.bss.gc_state,"aw",@nobits
-	.set	.LANCHOR153,. + 0
+	.set	.LANCHOR155,. + 0
 	.type	gc_state, %object
 	.size	gc_state, 1
 gc_state:
@@ -25656,7 +25631,7 @@ gp_data_xlc_data_head:
 	.zero	8
 	.section	.bss.gp_flash_check_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR139,. + 0
+	.set	.LANCHOR141,. + 0
 	.type	gp_flash_check_buf, %object
 	.size	gp_flash_check_buf, 8
 gp_flash_check_buf:
@@ -25726,18 +25701,31 @@ gp_sblk_list_tbl:
 	.zero	8
 	.section	.bss.idb_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR137,. + 0
+	.set	.LANCHOR138,. + 0
 	.type	idb_buf, %object
 	.size	idb_buf, 8
 idb_buf:
 	.zero	8
+	.section	.bss.idb_last_lba,"aw",@nobits
+	.align	2
+	.set	.LANCHOR170,. + 0
+	.type	idb_last_lba, %object
+	.size	idb_last_lba, 4
+idb_last_lba:
+	.zero	4
 	.section	.bss.idb_need_write_back,"aw",@nobits
 	.align	2
-	.set	.LANCHOR138,. + 0
+	.set	.LANCHOR139,. + 0
 	.type	idb_need_write_back, %object
 	.size	idb_need_write_back, 4
 idb_need_write_back:
 	.zero	4
+	.section	.bss.idb_write_enable,"aw",@nobits
+	.set	.LANCHOR140,. + 0
+	.type	idb_write_enable, %object
+	.size	idb_write_enable, 1
+idb_write_enable:
+	.zero	1
 	.section	.bss.lpa_hash,"aw",@nobits
 	.align	3
 	.set	.LANCHOR110,. + 0
@@ -25783,59 +25771,59 @@ p_free_buf_head:
 p_read_ahead_ext_buf:
 	.zero	8
 	.section	.bss.pm_first_write,"aw",@nobits
-	.set	.LANCHOR192,. + 0
+	.set	.LANCHOR198,. + 0
 	.type	pm_first_write, %object
 	.size	pm_first_write, 1
 pm_first_write:
 	.zero	1
 	.section	.bss.pm_force_gc,"aw",@nobits
 	.align	2
-	.set	.LANCHOR146,. + 0
+	.set	.LANCHOR148,. + 0
 	.type	pm_force_gc, %object
 	.size	pm_force_gc, 4
 pm_force_gc:
 	.zero	4
 	.section	.bss.pm_gc_enable,"aw",@nobits
 	.align	2
-	.set	.LANCHOR132,. + 0
+	.set	.LANCHOR133,. + 0
 	.type	pm_gc_enable, %object
 	.size	pm_gc_enable, 4
 pm_gc_enable:
 	.zero	4
 	.section	.bss.pm_last_load_ram_id,"aw",@nobits
-	.set	.LANCHOR210,. + 0
+	.set	.LANCHOR212,. + 0
 	.type	pm_last_load_ram_id, %object
 	.size	pm_last_load_ram_id, 1
 pm_last_load_ram_id:
 	.zero	1
 	.section	.bss.pm_last_update_ram_id,"aw",@nobits
-	.set	.LANCHOR135,. + 0
+	.set	.LANCHOR136,. + 0
 	.type	pm_last_update_ram_id, %object
 	.size	pm_last_update_ram_id, 1
 pm_last_update_ram_id:
 	.zero	1
 	.section	.bss.pm_ram_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR134,. + 0
+	.set	.LANCHOR135,. + 0
 	.type	pm_ram_info, %object
 	.size	pm_ram_info, 512
 pm_ram_info:
 	.zero	512
 	.section	.bss.read_ahead_lpa,"aw",@nobits
 	.align	2
-	.set	.LANCHOR211,. + 0
+	.set	.LANCHOR213,. + 0
 	.type	read_ahead_lpa, %object
 	.size	read_ahead_lpa, 4
 read_ahead_lpa:
 	.zero	4
 	.section	.bss.read_buf_count,"aw",@nobits
-	.set	.LANCHOR129,. + 0
+	.set	.LANCHOR130,. + 0
 	.type	read_buf_count, %object
 	.size	read_buf_count, 1
 read_buf_count:
 	.zero	1
 	.section	.bss.read_buf_head,"aw",@nobits
-	.set	.LANCHOR128,. + 0
+	.set	.LANCHOR129,. + 0
 	.type	read_buf_head, %object
 	.size	read_buf_head, 1
 read_buf_head:
@@ -25853,13 +25841,13 @@ sblk_gc_write_completed_queue_head:
 sblk_queue_head:
 	.zero	1
 	.section	.bss.sblk_read_completed_queue_head,"aw",@nobits
-	.set	.LANCHOR131,. + 0
+	.set	.LANCHOR132,. + 0
 	.type	sblk_read_completed_queue_head, %object
 	.size	sblk_read_completed_queue_head, 1
 sblk_read_completed_queue_head:
 	.zero	1
 	.section	.bss.sblk_write_completed_queue_head,"aw",@nobits
-	.set	.LANCHOR126,. + 0
+	.set	.LANCHOR127,. + 0
 	.type	sblk_write_completed_queue_head, %object
 	.size	sblk_write_completed_queue_head, 1
 sblk_write_completed_queue_head:
@@ -25891,13 +25879,13 @@ write_buf_count:
 write_buf_head:
 	.zero	1
 	.section	.bss.write_commit_count,"aw",@nobits
-	.set	.LANCHOR123,. + 0
+	.set	.LANCHOR124,. + 0
 	.type	write_commit_count, %object
 	.size	write_commit_count, 1
 write_commit_count:
 	.zero	1
 	.section	.bss.write_commit_head,"aw",@nobits
-	.set	.LANCHOR177,. + 0
+	.set	.LANCHOR178,. + 0
 	.type	write_commit_head, %object
 	.size	write_commit_head, 1
 write_commit_head:
@@ -25952,7 +25940,7 @@ g_nand_para_info:
 	.byte	0
 	.section	.data.hy_f26_ref_value,"aw",@progbits
 	.align	3
-	.set	.LANCHOR158,. + 0
+	.set	.LANCHOR160,. + 0
 	.type	hy_f26_ref_value, %object
 	.size	hy_f26_ref_value, 28
 hy_f26_ref_value:
@@ -25986,7 +25974,7 @@ hy_f26_ref_value:
 	.byte	-37
 	.section	.data.nand_opt_para,"aw",@progbits
 	.align	3
-	.set	.LANCHOR202,. + 0
+	.set	.LANCHOR205,. + 0
 	.type	nand_opt_para, %object
 	.size	nand_opt_para, 128
 nand_opt_para:
@@ -26434,7 +26422,7 @@ sd15_tlc_rr:
 	.byte	0
 	.section	.data.tlc_b05a_prog_tbl,"aw",@progbits
 	.align	3
-	.set	.LANCHOR224,. + 0
+	.set	.LANCHOR226,. + 0
 	.type	tlc_b05a_prog_tbl, %object
 	.size	tlc_b05a_prog_tbl, 1536
 tlc_b05a_prog_tbl:
@@ -27208,7 +27196,7 @@ tlc_b05a_prog_tbl:
 	.hword	0
 	.section	.data.tlc_prog_order,"aw",@progbits
 	.align	3
-	.set	.LANCHOR225,. + 0
+	.set	.LANCHOR227,. + 0
 	.type	tlc_prog_order, %object
 	.size	tlc_prog_order, 768
 tlc_prog_order:
@@ -27605,9 +27593,9 @@ zftl_debug:
 	.word	17476
 	.section	.data.zftl_nand_flash_para_tbl,"aw",@progbits
 	.align	3
-	.set	.LANCHOR201,. + 0
+	.set	.LANCHOR204,. + 0
 	.type	zftl_nand_flash_para_tbl, %object
-	.size	zftl_nand_flash_para_tbl, 1408
+	.size	zftl_nand_flash_para_tbl, 1472
 zftl_nand_flash_para_tbl:
 	.byte	6
 	.byte	-104
@@ -28506,6 +28494,34 @@ zftl_nand_flash_para_tbl:
 	.byte	0
 	.byte	4
 	.byte	6
+	.byte	44
+	.byte	-92
+	.byte	100
+	.byte	50
+	.byte	-86
+	.byte	4
+	.byte	4
+	.byte	1
+	.byte	32
+	.hword	1024
+	.byte	2
+	.byte	1
+	.hword	2192
+	.hword	9671
+	.byte	10
+	.byte	19
+	.byte	70
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.hword	1024
+	.byte	2
+	.byte	-38
+	.byte	-33
+	.byte	0
+	.byte	6
 	.byte	-83
 	.byte	-34
 	.byte	20
@@ -28526,7 +28542,7 @@ zftl_nand_flash_para_tbl:
 	.byte	32
 	.byte	3
 	.byte	1
-	.byte	4
+	.byte	3
 	.byte	0
 	.hword	256
 	.byte	2
@@ -28694,13 +28710,13 @@ zftl_nand_flash_para_tbl:
 	.byte	32
 	.byte	3
 	.byte	1
-	.byte	4
+	.byte	3
 	.byte	0
 	.hword	512
-	.byte	2
+	.byte	0
 	.byte	-65
 	.byte	-66
-	.byte	0
+	.byte	1
 	.byte	5
 	.byte	-119
 	.byte	100
@@ -28815,6 +28831,34 @@ zftl_nand_flash_para_tbl:
 	.byte	0
 	.byte	6
 	.byte	-119
+	.byte	-120
+	.byte	4
+	.byte	75
+	.byte	-87
+	.byte	0
+	.byte	7
+	.byte	1
+	.byte	16
+	.hword	256
+	.byte	2
+	.byte	4
+	.hword	1024
+	.hword	449
+	.byte	1
+	.byte	0
+	.byte	24
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.hword	256
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	6
+	.byte	-119
 	.byte	-92
 	.byte	8
 	.byte	50
@@ -28841,644 +28885,643 @@ zftl_nand_flash_para_tbl:
 	.byte	0
 	.byte	0
 	.byte	4
-	.section	.rodata.__func__.10032,"a",@progbits
-	.align	3
-	.set	.LANCHOR216,. + 0
-	.type	__func__.10032, %object
-	.size	__func__.10032, 20
-__func__.10032:
-	.string	"gc_scan_static_data"
-	.section	.rodata.__func__.10099,"a",@progbits
-	.align	3
-	.set	.LANCHOR226,. + 0
-	.type	__func__.10099, %object
-	.size	__func__.10099, 11
-__func__.10099:
-	.string	"zftl_do_gc"
-	.section	.rodata.__func__.10192,"a",@progbits
-	.align	3
-	.set	.LANCHOR5,. + 0
-	.type	__func__.10192, %object
-	.size	__func__.10192, 18
-__func__.10192:
-	.string	"_list_remove_node"
-	.section	.rodata.__func__.10217,"a",@progbits
-	.align	3
-	.set	.LANCHOR11,. + 0
-	.type	__func__.10217, %object
-	.size	__func__.10217, 23
-__func__.10217:
-	.string	"_list_update_data_list"
-	.section	.rodata.__func__.10325,"a",@progbits
-	.align	3
-	.set	.LANCHOR183,. + 0
-	.type	__func__.10325, %object
-	.size	__func__.10325, 15
-__func__.10325:
-	.string	"ftl_info_flush"
-	.section	.rodata.__func__.10357,"a",@progbits
-	.align	3
-	.set	.LANCHOR130,. + 0
-	.type	__func__.10357, %object
-	.size	__func__.10357, 15
-__func__.10357:
-	.string	"ftl_alloc_sblk"
-	.section	.rodata.__func__.10399,"a",@progbits
-	.align	3
-	.set	.LANCHOR107,. + 0
-	.type	__func__.10399, %object
-	.size	__func__.10399, 18
-__func__.10399:
-	.string	"ftl_alloc_sys_blk"
-	.section	.rodata.__func__.10409,"a",@progbits
-	.align	3
-	.set	.LANCHOR108,. + 0
-	.type	__func__.10409, %object
-	.size	__func__.10409, 17
-__func__.10409:
-	.string	"ftl_free_sys_blk"
-	.section	.rodata.__func__.10467,"a",@progbits
-	.align	3
-	.set	.LANCHOR217,. + 0
-	.type	__func__.10467, %object
-	.size	__func__.10467, 14
-__func__.10467:
-	.string	"ftl_sblk_dump"
-	.section	.rodata.__func__.10491,"a",@progbits
-	.align	3
-	.set	.LANCHOR206,. + 0
-	.type	__func__.10491, %object
-	.size	__func__.10491, 16
-__func__.10491:
-	.string	"ftl_sysblk_dump"
-	.section	.rodata.__func__.10515,"a",@progbits
-	.align	3
-	.set	.LANCHOR189,. + 0
-	.type	__func__.10515, %object
-	.size	__func__.10515, 23
-__func__.10515:
-	.string	"ftl_open_sblk_recovery"
-	.section	.rodata.__func__.10548,"a",@progbits
-	.align	3
-	.set	.LANCHOR109,. + 0
-	.type	__func__.10548, %object
-	.size	__func__.10548, 23
-__func__.10548:
-	.string	"ftl_get_ppa_from_index"
-	.section	.rodata.__func__.10569,"a",@progbits
-	.align	3
-	.set	.LANCHOR220,. + 0
-	.type	__func__.10569, %object
-	.size	__func__.10569, 19
-__func__.10569:
-	.string	"ftl_update_l2p_map"
-	.section	.rodata.__func__.10588,"a",@progbits
-	.align	3
-	.set	.LANCHOR113,. + 0
-	.type	__func__.10588, %object
-	.size	__func__.10588, 22
-__func__.10588:
-	.string	"ftl_get_new_free_page"
-	.section	.rodata.__func__.10599,"a",@progbits
-	.align	3
-	.set	.LANCHOR114,. + 0
-	.type	__func__.10599, %object
-	.size	__func__.10599, 22
-__func__.10599:
-	.string	"ftl_ext_alloc_new_blk"
-	.section	.rodata.__func__.10624,"a",@progbits
+	.section	.rodata.__func__.10018,"a",@progbits
 	.align	3
-	.set	.LANCHOR187,. + 0
-	.type	__func__.10624, %object
-	.size	__func__.10624, 19
-__func__.10624:
-	.string	"ftl_ext_info_flush"
-	.section	.rodata.__func__.10636,"a",@progbits
-	.align	3
-	.set	.LANCHOR188,. + 0
-	.type	__func__.10636, %object
-	.size	__func__.10636, 18
-__func__.10636:
-	.string	"ftl_ext_info_init"
-	.section	.rodata.__func__.10675,"a",@progbits
-	.align	3
-	.set	.LANCHOR193,. + 0
-	.type	__func__.10675, %object
-	.size	__func__.10675, 25
-__func__.10675:
-	.string	"ftl_low_format_data_init"
-	.section	.rodata.__func__.10690,"a",@progbits
-	.align	3
-	.set	.LANCHOR195,. + 0
-	.type	__func__.10690, %object
-	.size	__func__.10690, 15
-__func__.10690:
-	.string	"ftl_low_format"
-	.section	.rodata.__func__.10738,"a",@progbits
-	.align	3
-	.set	.LANCHOR180,. + 0
-	.type	__func__.10738, %object
-	.size	__func__.10738, 14
-__func__.10738:
-	.string	"ftl_prog_page"
-	.section	.rodata.__func__.10860,"a",@progbits
-	.align	3
-	.set	.LANCHOR170,. + 0
-	.type	__func__.10860, %object
-	.size	__func__.10860, 31
-__func__.10860:
-	.string	"queue_wait_first_req_completed"
-	.section	.rodata.__func__.10914,"a",@progbits
-	.align	3
-	.set	.LANCHOR176,. + 0
-	.type	__func__.10914, %object
-	.size	__func__.10914, 15
-__func__.10914:
-	.string	"sblk_prog_page"
-	.section	.rodata.__func__.10941,"a",@progbits
-	.align	3
-	.set	.LANCHOR172,. + 0
-	.type	__func__.10941, %object
-	.size	__func__.10941, 15
-__func__.10941:
-	.string	"sblk_read_page"
-	.section	.rodata.__func__.11005,"a",@progbits
-	.align	3
-	.set	.LANCHOR207,. + 0
-	.type	__func__.11005, %object
-	.size	__func__.11005, 16
-__func__.11005:
+	.set	.LANCHOR209,. + 0
+	.type	__func__.10018, %object
+	.size	__func__.10018, 16
+__func__.10018:
 	.string	"load_l2p_region"
-	.section	.rodata.__func__.11021,"a",@progbits
+	.section	.rodata.__func__.10034,"a",@progbits
 	.align	3
-	.set	.LANCHOR150,. + 0
-	.type	__func__.11021, %object
-	.size	__func__.11021, 13
-__func__.11021:
+	.set	.LANCHOR152,. + 0
+	.type	__func__.10034, %object
+	.size	__func__.10034, 13
+__func__.10034:
 	.string	"pm_free_sblk"
-	.section	.rodata.__func__.11045,"a",@progbits
+	.section	.rodata.__func__.10058,"a",@progbits
 	.align	3
-	.set	.LANCHOR209,. + 0
-	.type	__func__.11045, %object
-	.size	__func__.11045, 6
-__func__.11045:
+	.set	.LANCHOR211,. + 0
+	.type	__func__.10058, %object
+	.size	__func__.10058, 6
+__func__.10058:
 	.string	"pm_gc"
-	.section	.rodata.__func__.11061,"a",@progbits
+	.section	.rodata.__func__.10074,"a",@progbits
 	.align	3
-	.set	.LANCHOR133,. + 0
-	.type	__func__.11061, %object
-	.size	__func__.11061, 17
-__func__.11061:
+	.set	.LANCHOR134,. + 0
+	.type	__func__.10074, %object
+	.size	__func__.10074, 17
+__func__.10074:
 	.string	"pm_alloc_new_blk"
-	.section	.rodata.__func__.11071,"a",@progbits
+	.section	.rodata.__func__.10084,"a",@progbits
 	.align	3
-	.set	.LANCHOR190,. + 0
-	.type	__func__.11071, %object
-	.size	__func__.11071, 14
-__func__.11071:
+	.set	.LANCHOR196,. + 0
+	.type	__func__.10084, %object
+	.size	__func__.10084, 14
+__func__.10084:
 	.string	"pm_write_page"
-	.section	.rodata.__func__.11089,"a",@progbits
+	.section	.rodata.__func__.10102,"a",@progbits
 	.align	3
-	.set	.LANCHOR136,. + 0
-	.type	__func__.11089, %object
-	.size	__func__.11089, 21
-__func__.11089:
+	.set	.LANCHOR137,. + 0
+	.type	__func__.10102, %object
+	.size	__func__.10102, 21
+__func__.10102:
 	.string	"pm_select_ram_region"
-	.section	.rodata.__func__.8537,"a",@progbits
+	.section	.rodata.__func__.7564,"a",@progbits
 	.align	3
-	.set	.LANCHOR164,. + 0
-	.type	__func__.8537, %object
-	.size	__func__.8537, 19
-__func__.8537:
+	.set	.LANCHOR166,. + 0
+	.type	__func__.7564, %object
+	.size	__func__.7564, 19
+__func__.7564:
 	.string	"flash_read_page_en"
-	.section	.rodata.__func__.8579,"a",@progbits
+	.section	.rodata.__func__.7606,"a",@progbits
 	.align	3
-	.set	.LANCHOR178,. + 0
-	.type	__func__.8579, %object
-	.size	__func__.8579, 19
-__func__.8579:
+	.set	.LANCHOR181,. + 0
+	.type	__func__.7606, %object
+	.size	__func__.7606, 19
+__func__.7606:
 	.string	"flash_prog_page_en"
-	.section	.rodata.__func__.8595,"a",@progbits
+	.section	.rodata.__func__.7622,"a",@progbits
 	.align	3
 	.set	.LANCHOR40,. + 0
-	.type	__func__.8595, %object
-	.size	__func__.8595, 26
-__func__.8595:
+	.type	__func__.7622, %object
+	.size	__func__.7622, 26
+__func__.7622:
 	.string	"flash_erase_duplane_block"
-	.section	.rodata.__func__.8606,"a",@progbits
+	.section	.rodata.__func__.7633,"a",@progbits
 	.align	3
 	.set	.LANCHOR42,. + 0
-	.type	__func__.8606, %object
-	.size	__func__.8606, 21
-__func__.8606:
+	.type	__func__.7633, %object
+	.size	__func__.7633, 21
+__func__.7633:
 	.string	"flash_erase_block_en"
-	.section	.rodata.__func__.8620,"a",@progbits
+	.section	.rodata.__func__.7647,"a",@progbits
 	.align	3
 	.set	.LANCHOR29,. + 0
-	.type	__func__.8620, %object
-	.size	__func__.8620, 28
-__func__.8620:
+	.type	__func__.7647, %object
+	.size	__func__.7647, 28
+__func__.7647:
 	.string	"flash_wait_device_ready_raw"
-	.section	.rodata.__func__.8644,"a",@progbits
+	.section	.rodata.__func__.7671,"a",@progbits
 	.align	3
-	.set	.LANCHOR173,. + 0
-	.type	__func__.8644, %object
-	.size	__func__.8644, 26
-__func__.8644:
+	.set	.LANCHOR171,. + 0
+	.type	__func__.7671, %object
+	.size	__func__.7671, 26
+__func__.7671:
 	.string	"flash_start_tlc_page_prog"
-	.section	.rodata.__func__.8655,"a",@progbits
+	.section	.rodata.__func__.7682,"a",@progbits
 	.align	3
-	.set	.LANCHOR174,. + 0
-	.type	__func__.8655, %object
-	.size	__func__.8655, 29
-__func__.8655:
+	.set	.LANCHOR172,. + 0
+	.type	__func__.7682, %object
+	.size	__func__.7682, 29
+__func__.7682:
 	.string	"flash_start_3d_mlc_page_prog"
-	.section	.rodata.__func__.8673,"a",@progbits
+	.section	.rodata.__func__.7700,"a",@progbits
 	.align	3
-	.set	.LANCHOR175,. + 0
-	.type	__func__.8673, %object
-	.size	__func__.8673, 22
-__func__.8673:
+	.set	.LANCHOR173,. + 0
+	.type	__func__.7700, %object
+	.size	__func__.7700, 22
+__func__.7700:
 	.string	"flash_start_page_prog"
-	.section	.rodata.__func__.8684,"a",@progbits
+	.section	.rodata.__func__.7711,"a",@progbits
 	.align	3
 	.set	.LANCHOR34,. + 0
-	.type	__func__.8684, %object
-	.size	__func__.8684, 22
-__func__.8684:
+	.type	__func__.7711, %object
+	.size	__func__.7711, 22
+__func__.7711:
 	.string	"flash_start_page_read"
-	.section	.rodata.__func__.8697,"a",@progbits
+	.section	.rodata.__func__.7724,"a",@progbits
 	.align	3
-	.set	.LANCHOR168,. + 0
-	.type	__func__.8697, %object
-	.size	__func__.8697, 31
-__func__.8697:
+	.set	.LANCHOR174,. + 0
+	.type	__func__.7724, %object
+	.size	__func__.7724, 31
+__func__.7724:
 	.string	"flash_complete_plane_page_read"
-	.section	.rodata.__func__.8709,"a",@progbits
+	.section	.rodata.__func__.7736,"a",@progbits
 	.align	3
 	.set	.LANCHOR43,. + 0
-	.type	__func__.8709, %object
-	.size	__func__.8709, 23
-__func__.8709:
+	.type	__func__.7736, %object
+	.size	__func__.7736, 23
+__func__.7736:
 	.string	"flash_start_plane_read"
-	.section	.rodata.__func__.8722,"a",@progbits
+	.section	.rodata.__func__.7749,"a",@progbits
 	.align	3
-	.set	.LANCHOR169,. + 0
-	.type	__func__.8722, %object
-	.size	__func__.8722, 25
-__func__.8722:
+	.set	.LANCHOR175,. + 0
+	.type	__func__.7749, %object
+	.size	__func__.7749, 25
+__func__.7749:
 	.string	"flash_complete_page_read"
-	.section	.rodata.__func__.9061,"a",@progbits
+	.section	.rodata.__func__.8094,"a",@progbits
 	.align	3
-	.set	.LANCHOR141,. + 0
-	.type	__func__.9061, %object
-	.size	__func__.9061, 20
-__func__.9061:
+	.set	.LANCHOR143,. + 0
+	.type	__func__.8094, %object
+	.size	__func__.8094, 20
+__func__.8094:
 	.string	"flash_die_info_init"
-	.section	.rodata.__func__.9071,"a",@progbits
+	.section	.rodata.__func__.8104,"a",@progbits
 	.align	3
 	.set	.LANCHOR15,. + 0
-	.type	__func__.9071, %object
-	.size	__func__.9071, 22
-__func__.9071:
+	.type	__func__.8104, %object
+	.size	__func__.8104, 22
+__func__.8104:
 	.string	"nand_flash_print_info"
-	.section	.rodata.__func__.9116,"a",@progbits
+	.section	.rodata.__func__.8149,"a",@progbits
 	.align	3
-	.set	.LANCHOR200,. + 0
-	.type	__func__.9116, %object
-	.size	__func__.9116, 16
-__func__.9116:
+	.set	.LANCHOR203,. + 0
+	.type	__func__.8149, %object
+	.size	__func__.8149, 16
+__func__.8149:
 	.string	"nand_flash_init"
-	.section	.rodata.__func__.9139,"a",@progbits
+	.section	.rodata.__func__.8172,"a",@progbits
 	.align	3
-	.set	.LANCHOR152,. + 0
-	.type	__func__.9139, %object
-	.size	__func__.9139, 11
-__func__.9139:
+	.set	.LANCHOR154,. + 0
+	.type	__func__.8172, %object
+	.size	__func__.8172, 11
+__func__.8172:
 	.string	"nandc_init"
-	.section	.rodata.__func__.9308,"a",@progbits
+	.section	.rodata.__func__.8341,"a",@progbits
 	.align	3
 	.set	.LANCHOR55,. + 0
-	.type	__func__.9308, %object
-	.size	__func__.9308, 13
-__func__.9308:
+	.type	__func__.8341, %object
+	.size	__func__.8341, 13
+__func__.8341:
 	.string	"buf_add_tail"
-	.section	.rodata.__func__.9321,"a",@progbits
+	.section	.rodata.__func__.8354,"a",@progbits
 	.align	3
 	.set	.LANCHOR57,. + 0
-	.type	__func__.9321, %object
-	.size	__func__.9321, 10
-__func__.9321:
+	.type	__func__.8354, %object
+	.size	__func__.8354, 10
+__func__.8354:
 	.string	"buf_alloc"
-	.section	.rodata.__func__.9335,"a",@progbits
+	.section	.rodata.__func__.8368,"a",@progbits
 	.align	3
 	.set	.LANCHOR58,. + 0
-	.type	__func__.9335, %object
-	.size	__func__.9335, 16
-__func__.9335:
+	.type	__func__.8368, %object
+	.size	__func__.8368, 16
+__func__.8368:
 	.string	"buf_remove_free"
-	.section	.rodata.__func__.9348,"a",@progbits
+	.section	.rodata.__func__.8381,"a",@progbits
 	.align	3
-	.set	.LANCHOR199,. + 0
-	.type	__func__.9348, %object
-	.size	__func__.9348, 20
-__func__.9348:
+	.set	.LANCHOR202,. + 0
+	.type	__func__.8381, %object
+	.size	__func__.8381, 20
+__func__.8381:
 	.string	"flash_info_blk_init"
-	.section	.rodata.__func__.9359,"a",@progbits
+	.section	.rodata.__func__.8392,"a",@progbits
 	.align	3
-	.set	.LANCHOR151,. + 0
-	.type	__func__.9359, %object
-	.size	__func__.9359, 21
-__func__.9359:
+	.set	.LANCHOR153,. + 0
+	.type	__func__.8392, %object
+	.size	__func__.8392, 21
+__func__.8392:
 	.string	"flash_info_data_init"
-	.section	.rodata.__func__.9381,"a",@progbits
+	.section	.rodata.__func__.8414,"a",@progbits
 	.align	3
-	.set	.LANCHOR196,. + 0
-	.type	__func__.9381, %object
-	.size	__func__.9381, 17
-__func__.9381:
+	.set	.LANCHOR199,. + 0
+	.type	__func__.8414, %object
+	.size	__func__.8414, 17
+__func__.8414:
 	.string	"flash_info_flush"
-	.section	.rodata.__func__.9457,"a",@progbits
+	.section	.rodata.__func__.8490,"a",@progbits
 	.align	3
-	.set	.LANCHOR145,. + 0
-	.type	__func__.9457, %object
-	.size	__func__.9457, 17
-__func__.9457:
+	.set	.LANCHOR147,. + 0
+	.type	__func__.8490, %object
+	.size	__func__.8490, 17
+__func__.8490:
 	.string	"lpa_rebuild_hash"
-	.section	.rodata.__func__.9504,"a",@progbits
+	.section	.rodata.__func__.8537,"a",@progbits
 	.align	3
-	.set	.LANCHOR221,. + 0
-	.type	__func__.9504, %object
-	.size	__func__.9504, 17
-__func__.9504:
+	.set	.LANCHOR223,. + 0
+	.type	__func__.8537, %object
+	.size	__func__.8537, 17
+__func__.8537:
 	.string	"ftl_write_commit"
-	.section	.rodata.__func__.9522,"a",@progbits
+	.section	.rodata.__func__.8555,"a",@progbits
 	.align	3
-	.set	.LANCHOR124,. + 0
-	.type	__func__.9522, %object
-	.size	__func__.9522, 14
-__func__.9522:
+	.set	.LANCHOR125,. + 0
+	.type	__func__.8555, %object
+	.size	__func__.8555, 14
+__func__.8555:
 	.string	"ftl_write_buf"
-	.section	.rodata.__func__.9567,"a",@progbits
+	.section	.rodata.__func__.8600,"a",@progbits
 	.align	3
-	.set	.LANCHOR127,. + 0
-	.type	__func__.9567, %object
-	.size	__func__.9567, 18
-__func__.9567:
+	.set	.LANCHOR128,. + 0
+	.type	__func__.8600, %object
+	.size	__func__.8600, 18
+__func__.8600:
 	.string	"zftl_add_read_buf"
-	.section	.rodata.__func__.9600,"a",@progbits
+	.section	.rodata.__func__.8633,"a",@progbits
 	.align	3
-	.set	.LANCHOR218,. + 0
-	.type	__func__.9600, %object
-	.size	__func__.9600, 10
-__func__.9600:
+	.set	.LANCHOR220,. + 0
+	.type	__func__.8633, %object
+	.size	__func__.8633, 10
+__func__.8633:
 	.string	"zftl_read"
-	.section	.rodata.__func__.9631,"a",@progbits
+	.section	.rodata.__func__.8664,"a",@progbits
 	.align	3
-	.set	.LANCHOR228,. + 0
-	.type	__func__.9631, %object
-	.size	__func__.9631, 13
-__func__.9631:
+	.set	.LANCHOR230,. + 0
+	.type	__func__.8664, %object
+	.size	__func__.8664, 13
+__func__.8664:
 	.string	"_ftl_discard"
-	.section	.rodata.__func__.9780,"a",@progbits
+	.section	.rodata.__func__.8816,"a",@progbits
 	.align	3
 	.set	.LANCHOR65,. + 0
-	.type	__func__.9780, %object
-	.size	__func__.9780, 12
-__func__.9780:
+	.type	__func__.8816, %object
+	.size	__func__.8816, 12
+__func__.8816:
 	.string	"gc_add_sblk"
-	.section	.rodata.__func__.9827,"a",@progbits
+	.section	.rodata.__func__.8863,"a",@progbits
 	.align	3
-	.set	.LANCHOR219,. + 0
-	.type	__func__.9827, %object
-	.size	__func__.9827, 21
-__func__.9827:
+	.set	.LANCHOR221,. + 0
+	.type	__func__.8863, %object
+	.size	__func__.8863, 21
+__func__.8863:
 	.string	"gc_check_data_one_wl"
-	.section	.rodata.__func__.9861,"a",@progbits
+	.section	.rodata.__func__.8897,"a",@progbits
 	.align	3
-	.set	.LANCHOR214,. + 0
-	.type	__func__.9861, %object
-	.size	__func__.9861, 22
-__func__.9861:
+	.set	.LANCHOR216,. + 0
+	.type	__func__.8897, %object
+	.size	__func__.8897, 22
+__func__.8897:
 	.string	"gc_update_l2p_map_new"
-	.section	.rodata.__func__.9874,"a",@progbits
+	.section	.rodata.__func__.8910,"a",@progbits
 	.align	3
 	.set	.LANCHOR72,. + 0
-	.type	__func__.9874, %object
-	.size	__func__.9874, 19
-__func__.9874:
+	.type	__func__.8910, %object
+	.size	__func__.8910, 19
+__func__.8910:
 	.string	"gc_write_completed"
-	.section	.rodata.__func__.9903,"a",@progbits
+	.section	.rodata.__func__.8939,"a",@progbits
 	.align	3
-	.set	.LANCHOR223,. + 0
-	.type	__func__.9903, %object
-	.size	__func__.9903, 16
-__func__.9903:
+	.set	.LANCHOR225,. + 0
+	.type	__func__.8939, %object
+	.size	__func__.8939, 16
+__func__.8939:
 	.string	"gc_do_copy_back"
-	.section	.rodata.__func__.9930,"a",@progbits
+	.section	.rodata.__func__.8966,"a",@progbits
 	.align	3
-	.set	.LANCHOR121,. + 0
-	.type	__func__.9930, %object
-	.size	__func__.9930, 16
-__func__.9930:
+	.set	.LANCHOR122,. + 0
+	.type	__func__.8966, %object
+	.size	__func__.8966, 16
+__func__.8966:
 	.string	"gc_free_src_blk"
-	.section	.rodata.__func__.9974,"a",@progbits
+	.section	.rodata.__func__.9010,"a",@progbits
 	.align	3
-	.set	.LANCHOR215,. + 0
-	.type	__func__.9974, %object
-	.size	__func__.9974, 16
-__func__.9974:
+	.set	.LANCHOR217,. + 0
+	.type	__func__.9010, %object
+	.size	__func__.9010, 16
+__func__.9010:
 	.string	"gc_scan_src_blk"
+	.section	.rodata.__func__.9068,"a",@progbits
+	.align	3
+	.set	.LANCHOR218,. + 0
+	.type	__func__.9068, %object
+	.size	__func__.9068, 20
+__func__.9068:
+	.string	"gc_scan_static_data"
+	.section	.rodata.__func__.9135,"a",@progbits
+	.align	3
+	.set	.LANCHOR228,. + 0
+	.type	__func__.9135, %object
+	.size	__func__.9135, 11
+__func__.9135:
+	.string	"zftl_do_gc"
+	.section	.rodata.__func__.9228,"a",@progbits
+	.align	3
+	.set	.LANCHOR5,. + 0
+	.type	__func__.9228, %object
+	.size	__func__.9228, 18
+__func__.9228:
+	.string	"_list_remove_node"
+	.section	.rodata.__func__.9253,"a",@progbits
+	.align	3
+	.set	.LANCHOR11,. + 0
+	.type	__func__.9253, %object
+	.size	__func__.9253, 23
+__func__.9253:
+	.string	"_list_update_data_list"
+	.section	.rodata.__func__.9361,"a",@progbits
+	.align	3
+	.set	.LANCHOR186,. + 0
+	.type	__func__.9361, %object
+	.size	__func__.9361, 15
+__func__.9361:
+	.string	"ftl_info_flush"
+	.section	.rodata.__func__.9393,"a",@progbits
+	.align	3
+	.set	.LANCHOR131,. + 0
+	.type	__func__.9393, %object
+	.size	__func__.9393, 15
+__func__.9393:
+	.string	"ftl_alloc_sblk"
+	.section	.rodata.__func__.9435,"a",@progbits
+	.align	3
+	.set	.LANCHOR107,. + 0
+	.type	__func__.9435, %object
+	.size	__func__.9435, 18
+__func__.9435:
+	.string	"ftl_alloc_sys_blk"
+	.section	.rodata.__func__.9445,"a",@progbits
+	.align	3
+	.set	.LANCHOR108,. + 0
+	.type	__func__.9445, %object
+	.size	__func__.9445, 17
+__func__.9445:
+	.string	"ftl_free_sys_blk"
+	.section	.rodata.__func__.9480,"a",@progbits
+	.align	3
+	.set	.LANCHOR219,. + 0
+	.type	__func__.9480, %object
+	.size	__func__.9480, 14
+__func__.9480:
+	.string	"ftl_sblk_dump"
+	.section	.rodata.__func__.9504,"a",@progbits
+	.align	3
+	.set	.LANCHOR208,. + 0
+	.type	__func__.9504, %object
+	.size	__func__.9504, 16
+__func__.9504:
+	.string	"ftl_sysblk_dump"
+	.section	.rodata.__func__.9528,"a",@progbits
+	.align	3
+	.set	.LANCHOR195,. + 0
+	.type	__func__.9528, %object
+	.size	__func__.9528, 23
+__func__.9528:
+	.string	"ftl_open_sblk_recovery"
+	.section	.rodata.__func__.9561,"a",@progbits
+	.align	3
+	.set	.LANCHOR109,. + 0
+	.type	__func__.9561, %object
+	.size	__func__.9561, 23
+__func__.9561:
+	.string	"ftl_get_ppa_from_index"
+	.section	.rodata.__func__.9582,"a",@progbits
+	.align	3
+	.set	.LANCHOR222,. + 0
+	.type	__func__.9582, %object
+	.size	__func__.9582, 19
+__func__.9582:
+	.string	"ftl_update_l2p_map"
+	.section	.rodata.__func__.9601,"a",@progbits
+	.align	3
+	.set	.LANCHOR113,. + 0
+	.type	__func__.9601, %object
+	.size	__func__.9601, 22
+__func__.9601:
+	.string	"ftl_get_new_free_page"
+	.section	.rodata.__func__.9612,"a",@progbits
+	.align	3
+	.set	.LANCHOR114,. + 0
+	.type	__func__.9612, %object
+	.size	__func__.9612, 22
+__func__.9612:
+	.string	"ftl_ext_alloc_new_blk"
+	.section	.rodata.__func__.9637,"a",@progbits
+	.align	3
+	.set	.LANCHOR190,. + 0
+	.type	__func__.9637, %object
+	.size	__func__.9637, 19
+__func__.9637:
+	.string	"ftl_ext_info_flush"
+	.section	.rodata.__func__.9649,"a",@progbits
+	.align	3
+	.set	.LANCHOR191,. + 0
+	.type	__func__.9649, %object
+	.size	__func__.9649, 18
+__func__.9649:
+	.string	"ftl_ext_info_init"
+	.section	.rodata.__func__.9688,"a",@progbits
+	.align	3
+	.set	.LANCHOR192,. + 0
+	.type	__func__.9688, %object
+	.size	__func__.9688, 25
+__func__.9688:
+	.string	"ftl_low_format_data_init"
+	.section	.rodata.__func__.9703,"a",@progbits
+	.align	3
+	.set	.LANCHOR194,. + 0
+	.type	__func__.9703, %object
+	.size	__func__.9703, 15
+__func__.9703:
+	.string	"ftl_low_format"
+	.section	.rodata.__func__.9751,"a",@progbits
+	.align	3
+	.set	.LANCHOR183,. + 0
+	.type	__func__.9751, %object
+	.size	__func__.9751, 14
+__func__.9751:
+	.string	"ftl_prog_page"
+	.section	.rodata.__func__.9873,"a",@progbits
+	.align	3
+	.set	.LANCHOR176,. + 0
+	.type	__func__.9873, %object
+	.size	__func__.9873, 31
+__func__.9873:
+	.string	"queue_wait_first_req_completed"
+	.section	.rodata.__func__.9927,"a",@progbits
+	.align	3
+	.set	.LANCHOR177,. + 0
+	.type	__func__.9927, %object
+	.size	__func__.9927, 15
+__func__.9927:
+	.string	"sblk_prog_page"
+	.section	.rodata.__func__.9954,"a",@progbits
+	.align	3
+	.set	.LANCHOR180,. + 0
+	.type	__func__.9954, %object
+	.size	__func__.9954, 15
+__func__.9954:
+	.string	"sblk_read_page"
 	.section	.rodata._list_remove_node.str1.1,"aMS",@progbits,1
 .LC0:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
 	.section	.rodata.dump_ftl_info.str1.1,"aMS",@progbits,1
-.LC178:
+.LC177:
 	.string	"free_buf_count: %d\n"
-.LC179:
+.LC178:
 	.string	"g_ftl_info_blk blk:0x%x, index:0x%x, page:0x%x\n"
-.LC180:
+.LC179:
 	.string	"ftl_ext_info_blk blk:0x%x, page:0x%x\n"
-.LC181:
+.LC180:
 	.string	"ac_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC182:
+.LC181:
 	.string	"tmp_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC183:
+.LC182:
 	.string	"gc_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC184:
+.LC183:
 	.string	"lpa:"
-.LC185:
+.LC184:
 	.string	"vpn:"
-.LC186:
+.LC185:
 	.string	"sblk:"
-.LC187:
+.LC186:
 	.string	"lpa_hash:"
-.LC188:
+.LC187:
 	.string	"lpa_hash_index:"
 	.section	.rodata.dump_pm_blk.str1.1,"aMS",@progbits,1
-.LC248:
+.LC247:
 	.string	"pm l2p:"
-.LC249:
+.LC248:
 	.string	"pm blk:"
 	.section	.rodata.dump_sblk_queue.str1.1,"aMS",@progbits,1
-.LC75:
+.LC74:
 	.string	"dump_sblk_queue: %d\n"
-.LC76:
+.LC75:
 	.string	"buf id= %d state = %d ppa = %x\n"
 	.section	.rodata.flash_complete_page_read.str1.1,"aMS",@progbits,1
-.LC124:
+.LC130:
 	.string	"flash_complete_page_read %x %x error_ecc %d %d\n"
 	.section	.rodata.flash_ddr_tuning_read.str1.1,"aMS",@progbits,1
-.LC117:
+.LC116:
 	.string	"%d flash_ddr_tuning_read %x ecc=%d\n"
-.LC118:
+.LC117:
 	.string	"sync para %d\n"
-.LC119:
+.LC118:
 	.string	"DDR mode Read error %x %x\n"
-.LC120:
+.LC119:
 	.string	"SDR mode Read %x %x ecc:%x\n"
 	.section	.rodata.flash_erase_all.str1.1,"aMS",@progbits,1
-.LC36:
+.LC35:
 	.string	"erase done: %x\n"
 	.section	.rodata.flash_erase_block_en.str1.1,"aMS",@progbits,1
-.LC34:
+.LC33:
 	.string	"flash_erase_block %x %x %x\n"
-.LC35:
+.LC34:
 	.string	"flash_erase_block %d block = %x status = %x\n"
 	.section	.rodata.flash_erase_duplane_block.str1.1,"aMS",@progbits,1
-.LC32:
+.LC31:
 	.string	"flash_erase_duplane_block %x %x %x\n"
-.LC33:
+.LC32:
 	.string	"flash_erase_duplane_block pageadd = %x status = %x\n"
 	.section	.rodata.flash_get_last_written_page.str1.1,"aMS",@progbits,1
-.LC123:
+.LC122:
 	.string	"flash_get_last_written_page: %x %x %x\n"
 	.section	.rodata.flash_info_blk_init.str1.1,"aMS",@progbits,1
-.LC175:
+.LC174:
 	.string	"...%d @ %s %d %p\n"
-.LC176:
+.LC175:
 	.string	"no sys info %x\n"
 	.section	.rodata.flash_info_data_init.str1.1,"aMS",@progbits,1
-.LC92:
+.LC91:
 	.string	"...%d @ %s\n"
 	.section	.rodata.flash_info_flush.str1.1,"aMS",@progbits,1
-.LC172:
+.LC171:
 	.string	"finfo:"
-.LC173:
+.LC172:
 	.string	"flash_info_flush id = %x, page = %x\n"
-.LC174:
+.LC173:
 	.string	"sys_info_flush error:%x\n"
 	.section	.rodata.flash_mask_bad_block.str1.1,"aMS",@progbits,1
-.LC42:
+.LC41:
 	.string	"flash_mask_bad_block %d %d\n"
 	.section	.rodata.flash_prog_page.str1.1,"aMS",@progbits,1
-.LC130:
+.LC123:
 	.string	"flash_prog_page %x %x %x\n"
-.LC131:
+.LC124:
 	.string	"flash_prog_page page_addr = %x status = %x\n"
 	.section	.rodata.flash_prog_page_en.str1.1,"aMS",@progbits,1
-.LC138:
+.LC137:
 	.string	"flash_prog_page_en:%x %x %x\n"
-.LC139:
+.LC138:
 	.string	"w d:"
-.LC140:
+.LC139:
 	.string	"w s:"
-.LC141:
+.LC140:
 	.string	"spare"
-.LC142:
+.LC141:
 	.string	"data"
-.LC143:
+.LC142:
 	.string	"write error: %x\n"
 	.section	.rodata.flash_read_id.str1.1,"aMS",@progbits,1
-.LC39:
+.LC38:
 	.string	"No.%d FLASH ID:%x %x %x %x %x %x\n"
 	.section	.rodata.flash_read_otp_data.str1.1,"aMS",@progbits,1
-.LC40:
+.LC39:
 	.string	"otp:%x %x %x %x\n"
 	.section	.rodata.flash_read_page.str1.1,"aMS",@progbits,1
-.LC110:
+.LC109:
 	.string	"flash_read_page %x %x %x\n"
 	.section	.rodata.flash_read_page_en.str1.1,"aMS",@progbits,1
+.LC120:
+	.string	"flash_read_page_en %x %x %x %x\n"
 .LC121:
-	.string	"flash_read_page_en %x %x %x\n"
-.LC122:
 	.string	"flash_read_page_en %x %x error_ecc %d %d\n"
 	.section	.rodata.flash_set_interface_mode.str1.1,"aMS",@progbits,1
-.LC37:
+.LC36:
 	.string	"nand sdr mode %x\n"
-.LC38:
+.LC37:
 	.string	"nand ddr mode %x\n"
 	.section	.rodata.ftl_alloc_new_data_sblk.str1.1,"aMS",@progbits,1
 .LC236:
 	.string	"error gc_add_sblk: %x\n"
 	.section	.rodata.ftl_alloc_sblk.str1.1,"aMS",@progbits,1
-.LC74:
+.LC73:
 	.string	"alloc sblk %x %d\n"
 	.section	.rodata.ftl_dump_write_open_sblk.str1.1,"aMS",@progbits,1
-.LC162:
+.LC166:
 	.string	"ftl_sblk_dump_write = %x %d %d %d %d\n"
-.LC163:
+.LC167:
 	.string	"blk= %x, page=%x, ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
-.LC164:
+.LC168:
 	.string	"ftl_sblk_dump_write2 = %x %d %d %d\n"
-.LC165:
+.LC169:
 	.string	"ftl_sblk_dump_write = %x %x\n"
-.LC166:
+.LC170:
 	.string	"ftl_sblk_dump_write done = %x\n"
 	.section	.rodata.ftl_ext_info_init.str1.1,"aMS",@progbits,1
 .LC149:
 	.string	"%s %d %d %x %x\n"
 .LC150:
+	.string	"ext info hash %x error\n"
+.LC151:
 	.string	"%s %x %x %x\n"
 	.section	.rodata.ftl_free_sblk.str1.1,"aMS",@progbits,1
-.LC63:
+.LC62:
 	.string	"swl_slc_free_mini_ec_blk sblk %x\n"
 	.section	.rodata.ftl_info_blk_init.str1.1,"aMS",@progbits,1
-.LC146:
+.LC145:
 	.string	"%d %x @%d %x\n"
-.LC147:
+.LC146:
 	.string	"ftl_info_blk_init %d %d %x\n"
+.LC147:
+	.string	"ftl info hash %x error\n"
 .LC148:
 	.string	"ink flag: %x\n"
 	.section	.rodata.ftl_info_flush.str1.1,"aMS",@progbits,1
-.LC145:
+.LC144:
 	.string	"g_ftl_info_blk blk = %x, page = %x version = %d\n"
-	.section	.rodata.ftl_ink_check_sblk.str1.1,"aMS",@progbits,1
-.LC167:
-	.string	"ftl_ink_check_sblk = %x %d %d\n"
-.LC168:
-	.string	"ftl_ink_check_sblk = %x %d %d end\n"
 	.section	.rodata.ftl_low_format.str1.1,"aMS",@progbits,1
-.LC169:
+.LC152:
 	.string	"ftl_low_format %d\n"
-.LC170:
+.LC153:
 	.string	"low format %d %d %d %d\n"
 	.section	.rodata.ftl_mask_bad_block.str1.1,"aMS",@progbits,1
-.LC61:
+.LC60:
 	.string	"mask bad block:cs %x %x block: %x %x\n"
 	.section	.rodata.ftl_open_sblk_recovery.str1.1,"aMS",@progbits,1
-.LC151:
+.LC155:
 	.string	"saved_active_page  = %x\n"
-.LC152:
+.LC156:
 	.string	"saved_active_plane = %x\n"
-.LC153:
+.LC157:
 	.string	"sblk = %x\n"
-.LC154:
+.LC158:
 	.string	"phy_blk = %x %x\n"
-.LC155:
+.LC159:
 	.string	"num_planes = %x\n"
-.LC156:
+.LC160:
 	.string	"sblk = %x, vpn0 = %d, vpn1 = %d\n"
-.LC157:
+.LC161:
 	.string	"dump_write_lpa = %x %x %x %x\n"
-.LC158:
+.LC162:
 	.string	"dump write new ppa = %x, last ppa = %x lpa = %x\n"
-.LC159:
+.LC163:
 	.string	"dump write = %x %x %x\n"
-.LC160:
+.LC164:
 	.string	"dump write hash update = %x %x %x\n"
 	.section	.rodata.ftl_re_low_format.str1.1,"aMS",@progbits,1
-.LC171:
+.LC154:
 	.string	"re low format %d\n"
 	.section	.rodata.ftl_sblk_dump.str1.1,"aMS",@progbits,1
 .LC221:
@@ -29492,10 +29535,10 @@ __func__.9974:
 .LC225:
 	.string	"block = %x, vpn=%x check vpn = %d\n"
 	.section	.rodata.ftl_sysblk_dump.str1.1,"aMS",@progbits,1
-.LC177:
+.LC176:
 	.string	"l2p:"
 	.section	.rodata.ftl_test_block.str1.1,"aMS",@progbits,1
-.LC144:
+.LC143:
 	.string	"low format %d\n"
 	.section	.rodata.ftl_update_l2p_map.str1.1,"aMS",@progbits,1
 .LC232:
@@ -29507,32 +29550,32 @@ __func__.9974:
 .LC235:
 	.string	"sblk %x vpn: %d %d\n"
 	.section	.rodata.ftl_vpn_decrement.str1.1,"aMS",@progbits,1
-.LC60:
+.LC59:
 	.string	"ftl_vpn_decrement %x = %d, %d\n"
 	.section	.rodata.ftl_write_commit.str1.1,"aMS",@progbits,1
 .LC237:
 	.string	"%d read error: ppa:%x, lpa:%x, status:%x\n"
 	.section	.rodata.ftl_write_completed.str1.1,"aMS",@progbits,1
-.LC72:
+.LC71:
 	.string	"ftl prog error =%x, lpa = %x, ppa= %x\n"
-.LC73:
+.LC72:
 	.string	"ftl re prog: lpa = %x, ppa= %x\n"
 	.section	.rodata.gc_add_sblk.str1.1,"aMS",@progbits,1
-.LC43:
+.LC42:
 	.string	"gc_add_sblk = %d, %d, %d, %d, %d, %d, %d\n"
-.LC44:
+.LC43:
 	.string	"gc_add_sblk = %d, %d, %d\n"
-.LC45:
+.LC44:
 	.string	"gc_add_sblk = %d, %d, %d,last update:%d, %d\n"
-.LC46:
+.LC45:
 	.string	"gc_add_sblk = %d, %d, %d, %d, %d, %d\n"
 	.section	.rodata.gc_check_data_one_wl.str1.1,"aMS",@progbits,1
 .LC229:
-	.string	"gc_lpa:"
+	.string	"err: ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
 .LC230:
-	.string	"gc_ppa:"
+	.string	"gc_lpa:"
 .LC231:
-	.string	"err: ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
+	.string	"gc_ppa:"
 	.section	.rodata.gc_do_copy_back.str1.1,"aMS",@progbits,1
 .LC238:
 	.string	"gc page in buf: lpa %x ppa = %x pageindex= %x\n"
@@ -29540,21 +29583,19 @@ __func__.9974:
 	.string	"gc_do_copy_back: lpa %x des_ppa = %x %x gc_ppa= %x page_index= %d\n"
 .LC240:
 	.string	"gc_do_copy_back: %x %x %x %x gc_ppa:%x %x %x %d\n"
-.LC241:
-	.string	"%d prog_step: %x %x buf id= %x ppa = %x hash=%d id = %x plane = %x lpa=%x %x\n"
 	.section	.rodata.gc_free_bad_sblk.str1.1,"aMS",@progbits,1
-.LC62:
+.LC61:
 	.string	"gc_free_bad_sblk 0x%x\n"
 	.section	.rodata.gc_free_src_blk.str1.1,"aMS",@progbits,1
-.LC64:
+.LC63:
 	.string	"gc_free_src_blk = %x, vpn = %d\n"
-.LC65:
+.LC64:
 	.string	"gc_free_src_blk %x, %d\n"
 	.section	.rodata.gc_free_temp_buf.str1.1,"aMS",@progbits,1
-.LC50:
+.LC49:
 	.string	"%d gc_free_temp_buf buf id= %x\n"
 	.section	.rodata.gc_mark_bad_ppa.str1.1,"aMS",@progbits,1
-.LC47:
+.LC46:
 	.string	"gc_mark_bad_ppa %d %x %x\n"
 	.section	.rodata.gc_recovery.str1.1,"aMS",@progbits,1
 .LC199:
@@ -29569,28 +29610,28 @@ __func__.9974:
 .LC220:
 	.string	"gc_scan_src_blk = %x, s vpn0 = %d, c vpn1 = %d\n"
 	.section	.rodata.gc_search_src_blk.str1.1,"aMS",@progbits,1
-.LC52:
+.LC51:
 	.string	"zftl_get_gc_node cache = %x index = %d vpn = %x\n"
-.LC53:
+.LC52:
 	.string	"gc_search_src_blk mode = %x, src mode = %x, count= %d %d\n"
 	.section	.rodata.gc_static_wearleveling.str1.1,"aMS",@progbits,1
-.LC80:
+.LC79:
 	.string	"gc_static_wearleveling: min blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
-.LC81:
+.LC80:
 	.string	"gc_static_wearleveling: min slc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
-.LC82:
+.LC81:
 	.string	"gc_static_wearleveling: min tlc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
-.LC83:
+.LC82:
 	.string	"gc_static_wearleveling: max slc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
-.LC84:
+.LC83:
 	.string	"gc_static_wearleveling: max xlc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
-.LC85:
+.LC84:
 	.string	"gc_static_wearleveling: slc blk: %x, tlc blk: %d avg slc ec: %d, avg tlc ec: %d \n"
-.LC86:
+.LC85:
 	.string	"gc_static_wearleveling: min slc ec: %x, min tlc ec: %d max slc ec: %d, max tlc ec: %d; %d %d\n"
-.LC87:
+.LC86:
 	.string	"swl add tlc gc = %x, %d, %d, %d, %d, %d\n"
-.LC88:
+.LC87:
 	.string	"swl add slc gc  = %x, %d, %d, %d, %d, %d\n"
 	.section	.rodata.gc_update_l2p_map_new.str1.1,"aMS",@progbits,1
 .LC215:
@@ -29602,45 +29643,45 @@ __func__.9974:
 .LC218:
 	.string	"gc_update_l2p_map_new: %x vpn = %x vpn1 = %x done\n"
 	.section	.rodata.gc_write_completed.str1.1,"aMS",@progbits,1
-.LC48:
+.LC47:
 	.string	"status: %x, ppa: %x\n"
-.LC49:
+.LC48:
 	.string	"gc_write_completed: %x  %x  %d %x\n"
 	.section	.rodata.hynix_get_read_retry_default.str1.1,"aMS",@progbits,1
-.LC100:
+.LC99:
 	.string	"otp error! %d"
-.LC101:
+.LC100:
 	.string	"rr"
 	.section	.rodata.hynix_read_retrial.str1.1,"aMS",@progbits,1
-.LC116:
+.LC115:
 	.string	"hynix RR %d row=%x, count %d, status=%d\n"
 	.section	.rodata.idb_write_data.str1.1,"aMS",@progbits,1
-.LC132:
+.LC125:
 	.string	"1 write_idblock fix data %x %x %x\n"
-.LC133:
+.LC126:
 	.string	"write_idblock check fail! %x\n"
-.LC134:
+.LC127:
 	.string	"write_idblock fail! %x\n"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",@progbits,1
-.LC190:
+.LC189:
 	.string	"region_id = %d, pm_max_region = %d\n"
-.LC191:
+.LC190:
 	.string	"load_l2p_region no ppa = %x , %x, all setting 0xff....\n"
-.LC192:
+.LC191:
 	.string	"load_l2p_region = %x,%x,%x, %x\n"
-.LC193:
+.LC192:
 	.string	"pm_ppa:"
-.LC194:
+.LC193:
 	.string	"data:"
-.LC195:
+.LC194:
 	.string	"spare:"
 	.section	.rodata.lpa_rebuild_hash.str1.1,"aMS",@progbits,1
-.LC79:
+.LC78:
 	.string	"%s %d %d\n"
 	.section	.rodata.micron_read_retrial.str1.1,"aMS",@progbits,1
-.LC111:
+.LC110:
 	.string	"MT %d row=%x,last status %d,status = %d\n"
-.LC112:
+.LC111:
 	.string	"MT RR %d row=%x,count %d,status=%d\n"
 	.section	.rodata.nand_flash_print_info.str1.1,"aMS",@progbits,1
 .LC1:
@@ -29670,121 +29711,121 @@ __func__.9974:
 .LC13:
 	.string	"idb ecc: %x\n"
 .LC14:
-	.string	"g_flash_slc_mode: %x\n"
-.LC15:
 	.string	"OptMode: %x\n"
-.LC16:
+.LC15:
 	.string	"g_nand_max_die: %x\n"
-.LC17:
+.LC16:
 	.string	"Cache read enable: %x\n"
-.LC18:
+.LC17:
 	.string	"Cache random read enable: %x\n"
-.LC19:
+.LC18:
 	.string	"Cache prog enable: %x\n"
-.LC20:
+.LC19:
 	.string	"multi read enable: %x\n"
-.LC21:
+.LC20:
 	.string	"multi prog enable: %x\n"
-.LC22:
+.LC21:
 	.string	"interleave enable: %x\n"
-.LC23:
+.LC22:
 	.string	"read retry enable: %x\n"
-.LC24:
+.LC23:
 	.string	"randomizer enable: %x\n"
-.LC25:
+.LC24:
 	.string	"SDR enable: %x\n"
-.LC26:
+.LC25:
 	.string	"ONFI enable: %x\n"
-.LC27:
+.LC26:
 	.string	"TOGGLE enable: %x\n"
-.LC28:
+.LC27:
 	.string	"g_flash_slc_mode: %x %x\n"
-.LC29:
+.LC28:
 	.string	"MultiPlaneProgCmd: %x %x\n"
-.LC30:
+.LC29:
 	.string	"MultiPlaneReadCmd: %x %x\n"
-.LC31:
+.LC30:
 	.string	"g_flash_toggle_mode_en: %x\n"
 	.section	.rodata.nandc_init.str1.1,"aMS",@progbits,1
-.LC93:
+.LC92:
 	.string	"...%s enter... %p\n"
-.LC94:
+.LC93:
 	.string	"0:%x %x %x %x %x\n"
-.LC95:
+.LC94:
 	.string	"g_nandc_ver...%d\n"
 	.section	.rodata.nandc_xfer.str1.1,"aMS",@progbits,1
-.LC107:
+.LC106:
 	.string	"dqs data abort %x\n"
-.LC108:
+.LC107:
 	.string	"dqs data timeout %x\n"
-.LC109:
+.LC108:
 	.string	"xfer error %x\n"
 	.section	.rodata.nandc_xfer_done.str1.1,"aMS",@progbits,1
-.LC102:
+.LC101:
 	.string	"flash_abort_clear = %d\n"
-.LC103:
+.LC102:
 	.string	"%d mtrans_cnt = %d page_num = %d\n"
-.LC104:
+.LC103:
 	.string	"nandc:"
-.LC105:
+.LC104:
 	.string	"%d flReg.d32=%x %x\n"
-.LC106:
+.LC105:
 	.string	"nandc_xfer_done read error %x\n"
 	.section	.rodata.pm_alloc_new_blk.str1.1,"aMS",@progbits,1
-.LC77:
+.LC76:
 	.string	"blk %x is bad block\n"
-.LC78:
+.LC77:
 	.string	"pm_alloc_new_blk: %x %x %x %x\n"
 	.section	.rodata.pm_free_sblk.str1.1,"aMS",@progbits,1
-.LC90:
+.LC89:
 	.string	"GC PM block %x %x %x %d\n"
-.LC91:
+.LC90:
 	.string	"ftl_free_no_use_map_blk %x %x %x %d\n"
 	.section	.rodata.pm_init.str1.1,"aMS",@progbits,1
-.LC196:
+.LC195:
 	.string	"pm_init posr %x %x %x\n"
-.LC197:
+.LC196:
 	.string	"pm_init recovery %x %x %x\n"
+.LC197:
+	.string	"pm_init hash %x error\n"
 	.section	.rodata.pm_log2phys.str1.1,"aMS",@progbits,1
 .LC198:
 	.string	"pm_log2phys  lpn = %d, max lpn = %d\n"
 	.section	.rodata.pm_ppa_update_check.str1.1,"aMS",@progbits,1
-.LC189:
+.LC188:
 	.string	"%s w error lpn = %x, max ppa = %d\n"
 	.section	.rodata.pm_write_page.str1.1,"aMS",@progbits,1
-.LC161:
+.LC165:
 	.string	"pm_write_page write error: %x\n"
 	.section	.rodata.print_ftl_debug_info.str1.1,"aMS",@progbits,1
-.LC66:
+.LC65:
 	.string	"bad blk = %x, %x free blk: s:%x,t:%x,m:%x, data blk:s:%x,%x,t%x vpn: s:%x t:%x, max_vpn: %x\n"
-.LC67:
+.LC66:
 	.string	"totle w: %d MB,r: %d MB %d dv:0x%X,poc:%d\n"
-.LC68:
+.LC67:
 	.string	"gc xlc page: %d,gc slc page: %d, tmp w: %d MB\n"
-.LC69:
+.LC68:
 	.string	"slc ec: %d,%d,%d,%d,%d,tlc ec: %d,%d,%d,%d,%d\n"
-.LC70:
+.LC69:
 	.string	"gc th: tlc_tlc: %d tlc_slc: %d slc_slc: %d slc_tlc:%d free_th: %d\n"
-.LC71:
+.LC70:
 	.string	"swl : %x %x %x %x %x %x\n"
 	.section	.rodata.print_gc_debug_info.str1.1,"aMS",@progbits,1
-.LC51:
+.LC50:
 	.string	"gc: b:%x,p:%x,i:%x; free buf=%d %d free slc th: %d\n"
 	.section	.rodata.print_list_info.str1.1,"aMS",@progbits,1
-.LC58:
+.LC57:
 	.string	"list count:%p %d\n"
-.LC59:
+.LC58:
 	.string	"%d: node:%x %x %x %x, %d %d %d %d %d\n"
 	.section	.rodata.queue_wait_first_req_completed.str1.1,"aMS",@progbits,1
-.LC125:
+.LC131:
 	.string	"read: %x %x %x %x\n"
-.LC126:
+.LC132:
 	.string	"0set buf %d,status = %x, ppa = %x lun state = %d\n"
-.LC127:
+.LC133:
 	.string	"prog end %x %x error_ecc %d %d\n"
-.LC128:
+.LC134:
 	.string	"1set buf %d,status = %x, ppa = %x lun state = %d\n"
-.LC129:
+.LC135:
 	.string	"dp prog end %x %x error_ecc %d %d\n"
 	.section	.rodata.random_seed,"a",@progbits
 	.align	3
@@ -29924,25 +29965,25 @@ random_seed:
 .LC214:
 	.string	"zftl_init %x\n"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
-.LC96:
+.LC95:
 	.string	"%s 0x%x:"
-.LC97:
+.LC96:
 	.string	"%x "
-.LC98:
+.LC97:
 	.string	""
-.LC99:
+.LC98:
 	.string	"%s\n"
 	.section	.rodata.sandisk_prog_test_bad_block.str1.1,"aMS",@progbits,1
-.LC41:
+.LC40:
 	.string	"bad block test:%x %x\n"
 	.section	.rodata.sblk_3d_tlc_dump_prog.str1.1,"aMS",@progbits,1
-.LC135:
+.LC128:
 	.string	"sblk_3d_tlc_dump_prog wl_addr= %x ppa = %x ppa = %x\n"
 	.section	.rodata.sblk_mlc_dump_prog.str1.1,"aMS",@progbits,1
-.LC136:
+.LC129:
 	.string	"sblk_mlc_dump_prog wl_addr= %x ppa = %x ppa = %x\n"
 	.section	.rodata.sblk_prog_page.str1.1,"aMS",@progbits,1
-.LC137:
+.LC136:
 	.string	"sblk_prog_page ppa = %x, count = %d\n"
 	.section	.rodata.toshiba_15ref_value,"a",@progbits
 	.align	3
@@ -30468,11 +30509,11 @@ toshiba_3D_tlc_value:
 	.byte	12
 	.byte	14
 	.section	.rodata.toshiba_3d_read_retrial.str1.1,"aMS",@progbits,1
-.LC113:
+.LC112:
 	.string	"toshiba SRR %d row=%x, status=%d\n"
-.LC114:
+.LC113:
 	.string	"toshiba TRR %d row=%x, status=%d\n"
-.LC115:
+.LC114:
 	.string	"toshiba RR %d row=%x,count %d,status=%d\n"
 	.section	.rodata.toshiba_A19ref_value,"a",@progbits
 	.align	3
@@ -30540,30 +30581,30 @@ toshiba_ref_value:
 	.byte	12
 	.byte	112
 	.section	.rodata.zftl_discard.str1.1,"aMS",@progbits,1
-.LC247:
+.LC246:
 	.string	"ftl_discard:(%x, %x, %x, %x)\n"
 	.section	.rodata.zftl_do_gc.str1.1,"aMS",@progbits,1
-.LC242:
+.LC241:
 	.string	"gc %d: %d %d %d %d %d %d %d\n"
-.LC243:
+.LC242:
 	.string	"gc %d: %d %d %d %d %d %d\n"
-.LC244:
+.LC243:
 	.string	"GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\n"
-.LC245:
+.LC244:
 	.string	"gc free %x, %d\n"
 	.section	.rodata.zftl_gc_get_free_sblk.str1.1,"aMS",@progbits,1
-.LC54:
+.LC53:
 	.string	"swl_tlc_free_mini_ec_blk alloc sblk %x\n"
-.LC55:
+.LC54:
 	.string	"zftl_get_free_sblk %x %d, %p %d %d\n"
-.LC56:
+.LC55:
 	.string	"zftl_gc_get_free_sblk %x %x %x, %d %d %d\n"
 	.section	.rodata.zftl_get_free_sblk.str1.1,"aMS",@progbits,1
-.LC57:
+.LC56:
 	.string	"swl_slc_free_mini_ec_blk alloc sblk %x\n"
 	.section	.rodata.zftl_init.str1.1,"aMS",@progbits,1
 .LC202:
-	.string	"FTL version: 6.0.18 20190918"
+	.string	"FTL version: 6.0.22 20200417"
 .LC203:
 	.string	"_c_user_data_density := %d\n"
 .LC204:
@@ -30594,9 +30635,9 @@ toshiba_ref_value:
 .LC228:
 	.string	"id=%d, status = %x, lpa = %x, ppa = %x spare = %x %x %x %x\n"
 	.section	.rodata.zftl_sblk_list_init.str1.1,"aMS",@progbits,1
-.LC89:
+.LC88:
 	.string	"free blk vpn error: %x %x\n"
 	.section	.rodata.zftl_write.str1.1,"aMS",@progbits,1
-.LC246:
+.LC245:
 	.string	"ftlwrite %x %x %x %x\n"
 	.hidden	free

commit b0a6db3b4afba3db3b129d1dc16ea940629d92d7
Merge: b71e4ab2f3 30ef03eb67
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 20 19:55:03 2020 +0800

    Merge branch 'next-dev' into thunder-boot

commit 30ef03eb67c8a30fa6d65b024ae23544befad072
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 20 19:19:54 2020 +0800

    spl: print entry point for U-Boot and OP-TEE
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ifeb52986851b93cb634f177e3834cbf681f3dfb0

diff --git a/common/spl/spl.c b/common/spl/spl.c
index dc146f5bf5..7835b1871d 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -566,7 +566,9 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 #endif
 #if CONFIG_IS_ENABLED(OPTEE)
 	case IH_OS_OP_TEE:
-		printf("Jumping to U-Boot via OP-TEE\n");
+		printf("Jumping to U-Boot(0x%08lx) via OP-TEE(0x%08lx)\n\n",
+		       (ulong)spl_image.entry_point_os,
+		       (ulong)spl_image.entry_point);
 		spl_cleanup_before_jump(&spl_image);
 		spl_optee_entry(NULL, (void *)spl_image.entry_point_os,
 				(void *)spl_image.fdt_addr,

commit a11e2c82253aabe4495a335a7d52afb18bd55e74
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 20 19:37:19 2020 +0800

    make.sh: simplify remove file
    
    rm -rf can always return 0.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I1f7e14ec860bb0da7b72132a8945a959b20cd440

diff --git a/make.sh b/make.sh
index f0e937e711..012792526f 100755
--- a/make.sh
+++ b/make.sh
@@ -496,7 +496,7 @@ function pack_uboot_image()
 		exit 1
 	fi
 	${RKTOOLS}/loaderimage --pack --uboot u-boot.bin uboot.img ${uboot_load_addr} ${PLATFORM_UBOOT_IMG_SIZE}
-	ls u-boot.img u-boot-dtb.img >/dev/null 2>&1 && rm u-boot.img u-boot-dtb.img -rf
+	rm u-boot.img u-boot-dtb.img -rf
 	echo "pack uboot okay! Input: u-boot.bin"
 }
 
@@ -569,7 +569,7 @@ function pack_spl_loader_image()
 		return
 	fi
 
-	ls ${tmp_dir} >/dev/null 2>&1 && rm ${tmp_dir} -rf
+	rm ${tmp_dir} -rf
 	mkdir ${tmp_dir} -p
 	cp spl/u-boot-spl.bin ${tmp_dir}/
 	cp $ini $tmp_ini
@@ -589,7 +589,7 @@ function pack_spl_loader_image()
 	${RKTOOLS}/boot_merger $tmp_ini
 	rm ${tmp_dir} -rf
 	cd -
-	ls *_loader_*.bin >/dev/null 2>&1 && rm *_loader_*.bin
+	rm *_loader_*.bin -rf
 	mv ${RKBIN}/*_loader_*.bin ./
 
 	filename=`basename *_loader_*.bin`
@@ -616,8 +616,7 @@ function pack_loader_image()
 		return
 	fi
 
-	ls *_loader_*.bin >/dev/null 2>&1 && rm *_loader_*.bin
-
+	rm *_loader_*.bin -rf
 	numline=`cat $ini | wc -l`
 	if [ $numline -eq 1 ]; then
 		image=`sed -n "/PATH=/p" $ini | tr -d '\r' | cut -d '=' -f 2`
@@ -677,7 +676,7 @@ function pack_trust_image()
 		return
 	fi
 
-	ls trust*.img >/dev/null 2>&1 && rm trust*.img
+	rm trust*.img -rf
 	if [ "$FILE" != "" ]; then
 		ini=$FILE;
 	else
@@ -713,7 +712,7 @@ function pack_fit_image()
 		./scripts/fit-vboot.sh $*
 	else
 		./scripts/fit-vboot-uboot.sh --no-vboot --no-rebuild
-		ls uboot.img trust*.img >/dev/null 2>&1 && rm uboot.img trust*.img -rf
+		rm uboot.img trust*.img -rf
 		echo "pack uboot.img (with uboot trust) okay! Input: $ini"
 	fi
 }
@@ -734,13 +733,13 @@ function pack_images()
 function clean_files()
 {
 	if [ -f spl/u-boot-spl.dtb ]; then
-		rm spl/u-boot-spl.dtb
+		rm spl/u-boot-spl.dtb -rf
 	fi
 	if [ -f tpl/u-boot-tpl.dtb ]; then
-		rm tpl/u-boot-tpl.dtb
+		rm tpl/u-boot-tpl.dtb -rf
 	fi
 	if [ -f u-boot.dtb ]; then
-		rm u-boot.dtb
+		rm u-boot.dtb -rf
 	fi
 }
 

commit f9afd3dc76238f7a63c1321709f95652abcf83d1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 20 17:48:57 2020 +0800

    make.sh: support fit secure image build with args
    
    Such as:
        ./make.sh rk3399 --rollback-index-uboot 12 --rollback-index-boot 22
        ./make.sh --rollback-index-uboot 12 --rollback-index-boot 22
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ifd3d564bc860af215860471a327f752305501123

diff --git a/make.sh b/make.sh
index 5a61b03dba..f0e937e711 100755
--- a/make.sh
+++ b/make.sh
@@ -10,6 +10,7 @@ BOARD=$1
 SUBCMD=$1
 FUNCADDR=$1
 FILE=$2
+ARGS=$*
 JOB=`sed -n "N;/processor/p" /proc/cpuinfo|wc -l`
 SUPPORT_LIST=`ls configs/*[r,p][x,v,k][0-9][0-9]*_defconfig`
 
@@ -147,7 +148,7 @@ function prepare()
 {
 	case $BOARD in
 		# Parse from exit .config
-		''|elf*|loader*|spl*|itb|debug*|trust|uboot|map|sym|env|EXT_DTB=*|fit*|nopack)
+		''|elf*|loader*|spl*|itb|debug*|trust|uboot|map|sym|env|EXT_DTB=*|fit*|nopack|--rollback-index*)
 		if [ ! -f .config ]; then
 			echo
 			echo "ERROR: No .config"
@@ -166,7 +167,7 @@ function prepare()
 		;;
 
 		#Subcmd
-		''|elf*|loader*|spl*|itb|debug*|trust*|uboot|map|sym|env|EXT_DTB=*|fit*|nopack)
+		''|elf*|loader*|spl*|itb|debug*|trust*|uboot|map|sym|env|EXT_DTB=*|fit*|nopack|--rollback-index*)
 		;;
 
 		*)
@@ -180,6 +181,8 @@ function prepare()
 		else
 			echo "make for ${BOARD}_defconfig by -j${JOB}"
 			make ${BOARD}_defconfig ${OPTION}
+			# Skip 1st args
+			ARGS=`echo $ARGS | awk '{ $1=""; print $0 }'`
 		fi
 		;;
 	esac
@@ -234,8 +237,14 @@ function select_toolchain()
 
 function sub_commands()
 {
-	cmd=${SUBCMD%-*}
-	opt=${SUBCMD#*-}
+	# skip "--" parameter, such as "--rollback-index-..."
+	if [[ "$SUBCMD" != "--*" ]]; then
+		cmd=${SUBCMD%-*}
+		opt=${SUBCMD#*-}
+	else
+		cmd=$SUBCMD
+	fi
+
 	elf=u-boot
 	map=u-boot.map
 	sym=u-boot.sym
@@ -313,6 +322,11 @@ function sub_commands()
 		exit 0
 		;;
 
+		--rollback-index*)
+		pack_fit_image $ARGS
+		exit 0
+		;;
+
 		EXT_DTB=*)
 		OPTION=${SUBCMD}
 		;;
@@ -696,7 +710,7 @@ function pack_trust_image()
 function pack_fit_image()
 {
 	if grep -q '^CONFIG_FIT_SIGNATURE=y' .config ; then
-		./scripts/fit-vboot.sh
+		./scripts/fit-vboot.sh $*
 	else
 		./scripts/fit-vboot-uboot.sh --no-vboot --no-rebuild
 		ls uboot.img trust*.img >/dev/null 2>&1 && rm uboot.img trust*.img -rf
@@ -712,7 +726,7 @@ function pack_images()
 			pack_trust_image
 			pack_loader_image
 		elif [ "$PACK_FORMAT" = "fit" ]; then
-			pack_fit_image
+			pack_fit_image $ARGS
 		fi
 	fi
 }

commit 4b4c68413a09fdfae878ccd6e3a8fc6a0a635e0a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 20 16:13:32 2020 +0800

    make.sh: build secure or non-secure image auto by CONFIG_FIT_SIGNATURE
    
    Providing sub command "fit-ns" to force building a non-secure image,
    mainly for debugging.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I0212dcb1c8387b16a4b0589d74cbc2ddeb282b3d

diff --git a/make.sh b/make.sh
index 34ff2025c7..5a61b03dba 100755
--- a/make.sh
+++ b/make.sh
@@ -267,9 +267,7 @@ function sub_commands()
 		;;
 
 		fit)
-		if [ "$opt" = "s" ]; then
-			./scripts/fit-vboot.sh
-		else
+		if [ "$opt" = "ns" ]; then
 			./scripts/fit-vboot.sh --no-vboot
 		fi
 		exit 0
@@ -697,9 +695,13 @@ function pack_trust_image()
 
 function pack_fit_image()
 {
-	./scripts/fit-vboot-uboot.sh --no-vboot --no-rebuild
-	ls uboot.img trust*.img >/dev/null 2>&1 && rm uboot.img trust*.img -rf
-	echo "pack uboot.img (with uboot trust) okay! Input: $ini"
+	if grep -q '^CONFIG_FIT_SIGNATURE=y' .config ; then
+		./scripts/fit-vboot.sh
+	else
+		./scripts/fit-vboot-uboot.sh --no-vboot --no-rebuild
+		ls uboot.img trust*.img >/dev/null 2>&1 && rm uboot.img trust*.img -rf
+		echo "pack uboot.img (with uboot trust) okay! Input: $ini"
+	fi
 }
 
 function pack_images()

commit 6084ba494f144eefe75bb9a5852399afadbfef3b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 20 16:06:06 2020 +0800

    make.sh: fix finish message "make nopack_defconfig"
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I387c6337d8d5ea8a2e68a289aff695f38ebfcd47

diff --git a/make.sh b/make.sh
index 2ad0995304..34ff2025c7 100755
--- a/make.sh
+++ b/make.sh
@@ -733,7 +733,7 @@ function finish()
 	echo
 	if [ ! -z "$OPTION" ]; then
 		echo "Platform ${RKCHIP_LABEL} is build OK, with exist .config ($OPTION)"
-	elif [ "$BOARD" = '' ]; then
+	elif [ "$BOARD" = '' -o "$BOARD" = 'nopack' ]; then
 		echo "Platform ${RKCHIP_LABEL} is build OK, with exist .config"
 	else
 		echo "Platform ${RKCHIP_LABEL} is build OK, with new .config(make ${BOARD}_defconfig)"

commit ec4fe4622639635416de62977fbac0508478a65a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 20 15:27:06 2020 +0800

    fit: add comment for success return
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I58f1c1a159af2da675bd47b632022c2a0cdb9d40

diff --git a/common/image-fit.c b/common/image-fit.c
index f52eec0cc2..d0403e5e47 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -1326,7 +1326,7 @@ int fit_image_verify_with_data(const void *fit, int image_noffset,
 		goto error;
 	}
 
-	return 1;
+	return 1; /* success */
 
 error:
 	printf(" error!\n%s for '%s' hash node in '%s' image node\n",

commit 5de879f9d8719f327f244c7b96c6e33885714104
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Apr 19 11:49:58 2020 +0800

    common: board_f: reserve noncache memory region
    
    board_r.c supports noncache memory region right below malloc
    area, but board_f.c seems does not reserve it.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I7da218b6d994227a04a91cea02b64b6c91a0cc54

diff --git a/common/board_f.c b/common/board_f.c
index 0c63474fe8..489a7d111e 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -436,6 +436,23 @@ static int reserve_malloc(void)
 	return 0;
 }
 
+#ifdef CONFIG_SYS_NONCACHED_MEMORY
+static int reserve_noncached(void)
+{
+	phys_addr_t start, end;
+	size_t size;
+
+	end = ALIGN(gd->start_addr_sp, MMU_SECTION_SIZE) - MMU_SECTION_SIZE;
+	size = ALIGN(CONFIG_SYS_NONCACHED_MEMORY, MMU_SECTION_SIZE);
+	start = end - size;
+	gd->start_addr_sp = start;
+	debug("Reserving %zu for noncached_alloc() at: %08lx\n",
+	      size, gd->start_addr_sp);
+
+	return 0;
+}
+#endif
+
 /* (permanently) allocate a Board Info struct */
 static int reserve_board(void)
 {
@@ -874,6 +891,9 @@ static const init_fnc_t init_sequence_f[] = {
 	reserve_trace,
 	reserve_uboot,
 	reserve_malloc,
+#ifdef CONFIG_SYS_NONCACHED_MEMORY
+	reserve_noncached,
+#endif
 	reserve_board,
 	setup_machine,
 	reserve_global_data,

commit 77deab993aeb7a00c406d85ea203fa04d264cb15
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 20 14:49:36 2020 +0800

    rockchip: fit: make some error messge quiet
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I4de9914c349093a54e35080ca9d84c0ee95d9893

diff --git a/arch/arm/mach-rockchip/fit.c b/arch/arm/mach-rockchip/fit.c
index 051e2a2610..dda3d3f060 100644
--- a/arch/arm/mach-rockchip/fit.c
+++ b/arch/arm/mach-rockchip/fit.c
@@ -295,30 +295,30 @@ static void *fit_get_blob(struct blk_desc *dev_desc, disk_partition_t *part)
 		return NULL;
 
 	if (blk_dread(dev_desc, part->start, blknum, fdt) != blknum) {
-		FIT_I("Failed to read fdt header\n");
+		debug("Failed to read fdt header\n");
 		goto fail;
 	}
 
 	if (fdt_check_header(fdt)) {
-		FIT_I("Invalid fdt header\n");
+		debug("Invalid fdt header\n");
 		goto fail;
 	}
 
 	if (!fit_is_ext_type(fdt)) {
-		FIT_I("Not external type\n");
+		debug("Not external type\n");
 		goto fail;
 	}
 
 	blknum = DIV_ROUND_UP(fdt_totalsize(fdt), dev_desc->blksz);
 	fit = memalign(ARCH_DMA_MINALIGN, blknum * dev_desc->blksz);
 	if (!fit) {
-		FIT_I("No memory\n");
+		debug("No memory\n");
 		goto fail;
 	}
 
 	if (blk_dread(dev_desc, part->start, blknum, fit) != blknum) {
 		free(fit);
-		FIT_I("Failed to read fit\n");
+		debug("Failed to read fit\n");
 		goto fail;
 	}
 
@@ -504,7 +504,7 @@ int rockchip_read_fit_dtb(void *fdt_addr, char **hash, int *hash_size)
 
 	fit = fit_get_blob(dev_desc, &part);
 	if (!fit) {
-		FIT_I("No fdt description\n");
+		FIT_I("No fdt blob\n");
 		return -EINVAL;
 	}
 

commit b71e4ab2f3a3dad2d2f54b1b29a1804a45b92de8
Author: Simon Xue <xxm@rock-chips.com>
Date:   Tue Apr 7 10:29:01 2020 +0800

    rockchip: dts: rv1126: Add hardware decompress
    
    Change-Id: I6bab05820f4916686a004803db10aad969d54469
    Signed-off-by: Simon Xue <xxm@rock-chips.com>

diff --git a/arch/arm/dts/rv1126-u-boot.dtsi b/arch/arm/dts/rv1126-u-boot.dtsi
index 0878a766b2..45b702d58c 100644
--- a/arch/arm/dts/rv1126-u-boot.dtsi
+++ b/arch/arm/dts/rv1126-u-boot.dtsi
@@ -99,6 +99,11 @@
 	};
 };
 
+&hw_decompress {
+	u-boot,dm-spl;
+	status = "okay";
+};
+
 &u2phy0 {
 	u-boot,dm-pre-reloc;
 	status = "okay";
diff --git a/arch/arm/dts/rv1126.dtsi b/arch/arm/dts/rv1126.dtsi
index 3e3f7ca8c8..c998765f1a 100644
--- a/arch/arm/dts/rv1126.dtsi
+++ b/arch/arm/dts/rv1126.dtsi
@@ -1036,6 +1036,16 @@
 		status = "disabled";
 	};
 
+	hw_decompress: decompress@ff6c0000 {
+		compatible = "rockchip,hw-decompress";
+		reg = <0xff6c0000 0x10000>;
+		interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_DECOM>, <&cru DCLK_DECOM>, <&cru PCLK_DECOM>;
+		clock-names = "aclk", "dclk", "pclk";
+		soft-reset-addr = <0xff490314>;
+		status = "disabled";
+	};
+
 	i2s0_8ch: i2s@ff800000 {
 		compatible = "rockchip,rv1126-i2s-tdm";
 		reg = <0xff800000 0x1000>;

commit 767409c5a6773d8eda90df0819bcc8cad3778eaa
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Apr 8 09:15:31 2020 +0800

    misc: Kconfig: change the SPL_ROCKCHIP_HW_DECOMPRESS dependent's attribute
    
    Change "depends on MISC" to "depends on SPL_MISC".
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I1b6c2296d5e88e4e2c0cbafb9bb31790d6f25e66

diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index ff20cab2b1..e1cd1f0a11 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -75,7 +75,7 @@ config ROCKCHIP_HW_DECOMPRESS
 
 config SPL_ROCKCHIP_HW_DECOMPRESS
 	bool "Rockchip HardWare Decompress Support"
-	depends on MISC
+	depends on SPL_MISC
 	help
 	  This driver support Decompress IP built-in Rockchip SoC, support
 	  LZ4, GZIP, PNG, ZLIB.

commit 2fc776b68fa40b1d6588cd29980ae09244b53c00
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 20 10:52:44 2020 +0800

    Kconfig: default 2 copies of u-boot.itb for uboot.img
    
    Backup is required for OTA, we proivde at least 2 copies.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I31303dbeac5fb458f343976290296396c24f988f

diff --git a/Kconfig b/Kconfig
index ad0bd71a62..ceb90a8ab9 100644
--- a/Kconfig
+++ b/Kconfig
@@ -339,12 +339,12 @@ config SPL_FIT_IMAGE_KB
 	depends on SPL_FIT
 	default 2048
 	help
-	  SPL FIT image size in KiB.
+	  SPL FIT image size in KiB, default 2048KB = 1024KB(u-boot) + 1024KB(tee/atf + others).
 
 config SPL_FIT_IMAGE_MULTIPLE
 	int "SPL FIT image multiple number"
 	depends on SPL_FIT
-	default 1
+	default 2
 	help
 	  SPL FIT image multiple number.
 

commit 987a49158faa641635b6643b66d312ee648098cb
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Thu Apr 16 21:20:48 2020 +0800

    clk: rockchip: rv1126: Fix CLK_SCR1_CORE return error
    
    Change-Id: I4938dd5519dde3a5357b5daf398d5915976ce74e
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rv1126.c b/drivers/clk/rockchip/clk_rv1126.c
index 291c345f26..0d587bf812 100644
--- a/drivers/clk/rockchip/clk_rv1126.c
+++ b/drivers/clk/rockchip/clk_rv1126.c
@@ -1371,6 +1371,7 @@ static ulong rv1126_clk_get_rate(struct clk *clk)
 		break;
 	case CLK_SCR1_CORE:
 		rate = rv1126_scr1_get_clk(priv);
+		break;
 	default:
 		return -ENOENT;
 	}
@@ -1461,6 +1462,7 @@ static ulong rv1126_clk_set_rate(struct clk *clk, ulong rate)
 		break;
 	case CLK_SCR1_CORE:
 		ret = rv1126_scr1_set_clk(priv, rate);
+		break;
 	default:
 		return -ENOENT;
 	}

commit 2830381ba67c3291a49c06e66f51670ff1aa7523
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Thu Apr 16 11:39:08 2020 +0800

    dt-bindings: clock: rv1126-cru: Delete PCLK_CAPTURE_PWM2
    
    Change-Id: I33a4c2cc12d275fbc50bfb652bedb9fe83ad266d
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/include/dt-bindings/clock/rv1126-cru.h b/include/dt-bindings/clock/rv1126-cru.h
index 57901ba13a..cfba8226de 100644
--- a/include/dt-bindings/clock/rv1126-cru.h
+++ b/include/dt-bindings/clock/rv1126-cru.h
@@ -319,7 +319,6 @@
 #define PCLK_I2C4		257
 #define PCLK_I2C5		258
 #define PCLK_SPI1		259
-#define PCLK_CAPTURE_PWM2	260
 #define PCLK_PWM2		261
 #define PCLK_GPIO1		262
 #define PCLK_GPIO2		263

commit 85967b2028b2a4d2c07a9629b26cdea40b22a509
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Fri Apr 17 14:51:55 2020 +0800

    clk: rockchip: rv1126: Add PLL configuration for 1400MHz
    
    The rate of HPLL is 1400MHz.
    
    Change-Id: I225017f7fb461124c74939828aee4a2a40222097
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rv1126.c b/drivers/clk/rockchip/clk_rv1126.c
index ae81dd85e2..291c345f26 100644
--- a/drivers/clk/rockchip/clk_rv1126.c
+++ b/drivers/clk/rockchip/clk_rv1126.c
@@ -40,6 +40,7 @@ static struct rockchip_cpu_rate_table rv1126_cpu_rates[] = {
 static struct rockchip_pll_rate_table rv1126_pll_rates[] = {
 	/* _mhz, _refdiv, _fbdiv, _postdiv1, _postdiv2, _dsmpd, _frac */
 	RK3036_PLL_RATE(1600000000, 3, 200, 1, 1, 1, 0),
+	RK3036_PLL_RATE(1400000000, 3, 350, 2, 1, 1, 0),
 	RK3036_PLL_RATE(1200000000, 1, 100, 2, 1, 1, 0),
 	RK3036_PLL_RATE(1188000000, 1, 99, 2, 1, 1, 0),
 	RK3036_PLL_RATE(1100000000, 3, 275, 2, 1, 1, 0),

commit 894a9e55a6e66934b9c420d116ade2ad3b060d06
Merge: 3af1a58d4f 413b349a06
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Apr 17 14:44:05 2020 +0800

    Merge branch 'next-dev' into thunder-boot

commit 413b349a06fb9b5606f0ecbe2a2fbb1bfbd9ff48
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Apr 8 20:49:39 2020 +0800

    drivers: Makefile: build block drivers if enable CONFIG_SPL_MTD_SUPPORT
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ida49ab768f6fd5e94736b850d06f6af04267c384

diff --git a/drivers/Makefile b/drivers/Makefile
index 1c976f2e2c..84e8bc5c05 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -57,6 +57,7 @@ obj-$(CONFIG_OMAP_USB_PHY) += usb/phy/
 obj-$(CONFIG_SPL_SATA_SUPPORT) += ata/ scsi/
 obj-$(CONFIG_SPL_USB_HOST_SUPPORT) += block/
 obj-$(CONFIG_SPL_MMC_SUPPORT) += block/
+obj-$(CONFIG_SPL_MTD_SUPPORT) += block/
 obj-$(CONFIG_SPL_FPGA_SUPPORT) += fpga/
 
 endif

commit 3af1a58d4f540074785ec989d8cd4f466c343b4f
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Tue Apr 14 10:57:44 2020 +0800

    rockchip: rv1126: adjust qos priority of ISP ISPP
    
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
    Change-Id: I32e9e738e18639ff7813e3278ac718753b130d60

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126.c b/arch/arm/mach-rockchip/rv1126/rv1126.c
index 0cc4e05f99..fe098b8e97 100644
--- a/arch/arm/mach-rockchip/rv1126/rv1126.c
+++ b/arch/arm/mach-rockchip/rv1126/rv1126.c
@@ -121,9 +121,9 @@ int arch_cpu_init(void)
 	writel(0x101, VEPU_RD0_PRIORITY_REG);
 	writel(0x101, VEPU_RD1_PRIORITY_REG);
 	writel(0x101, VEPU_WR_PRIORITY_REG);
-	writel(0x101, ISPP_M0_PRIORITY_REG);
-	writel(0x101, ISPP_M1_PRIORITY_REG);
-	writel(0x202, ISP_PRIORITY_REG);
+	writel(0x202, ISPP_M0_PRIORITY_REG);
+	writel(0x202, ISPP_M1_PRIORITY_REG);
+	writel(0x303, ISP_PRIORITY_REG);
 	writel(0x202, CIF_LIFE_PRIORITY_REG);
 	writel(0x202, CIF_PRIORITY_REG);
 	writel(0x101, IEP_PRIORITY_REG);

commit 5c6a522a4df46a8da22143eee277a85f6dbc4313
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Thu Apr 16 11:08:09 2020 +0800

    configs: rk3328/rk3399: enable usb3.0 host support
    
    Update RK3328 and RK3399 default config to support USB3.0 host.
    
    Change-Id: I2a208478de9711138a85f2cc5fe3bbe69551883b
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index 104e149321..2e7096b0d1 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -51,6 +51,7 @@ CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_MISC is not set
@@ -86,6 +87,7 @@ CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_INNO_USB3=y
 CONFIG_PINCTRL=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
@@ -113,6 +115,7 @@ CONFIG_USB_EHCI_GENERIC=y
 CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_OHCI_GENERIC=y
 CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
index 0ae14bc746..b5dc948bc8 100755
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -46,6 +46,7 @@ CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_MISC is not set
@@ -82,6 +83,7 @@ CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_TYPEC=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
@@ -112,6 +114,7 @@ CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_OHCI_GENERIC=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_DWC3_GENERIC=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_MANUFACTURER="Rockchip"

commit 9ef7cef826c4640cf95de22500456cc0e34d2905
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Sun Apr 12 16:30:38 2020 +0800

    rockchip: rv1126: support spl_fit_standalone_release
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I278e76505afa262becaac440ec9a78de8ceebfe7

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126.c b/arch/arm/mach-rockchip/rv1126/rv1126.c
index 581b15553f..0cc4e05f99 100644
--- a/arch/arm/mach-rockchip/rv1126/rv1126.c
+++ b/arch/arm/mach-rockchip/rv1126/rv1126.c
@@ -50,6 +50,13 @@ DECLARE_GLOBAL_DATA_PTR;
 #define PMU_PWR_DWN_ST		(0x108)
 #define PMU_PWR_GATE_SFTCON	(0x110)
 
+#define CRU_BASE		0xFF490000
+#define CRU_SOFTRST_CON02	0x308
+#define SGRF_BASE		0xFE0A0000
+#define SGRF_CON_SCR1_BOOT_ADDR	0x0b0
+#define SGRF_SOC_CON3		0x00c
+#define SCR1_START_ADDR		0x208000
+
 void board_debug_uart_init(void)
 {
 
@@ -130,3 +137,19 @@ int arch_cpu_init(void)
 
 	return 0;
 }
+
+#ifdef CONFIG_SPL_BUILD
+int spl_fit_standalone_release(void)
+{
+	/* Reset the scr1 */
+	writel(0x04000400, CRU_BASE + CRU_SOFTRST_CON02);
+	udelay(100);
+	/* set the scr1 addr */
+	writel(SCR1_START_ADDR, SGRF_BASE + SGRF_CON_SCR1_BOOT_ADDR);
+	writel(0x00ff00bf, SGRF_BASE + SGRF_SOC_CON3);
+	/* release the scr1 */
+	writel(0x04000000, CRU_BASE + CRU_SOFTRST_CON02);
+
+	return 0;
+}
+#endif

commit 6fc40cbbfdc3283bc07aec44ea50f30975ee6902
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Apr 15 14:49:35 2020 +0800

    rockchip: rv1126: support add mcu@1 node dynamically
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ic7afb5e167eabbb757bb31554cc563cd7c3510ef

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh b/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh
index e4f5eee2b2..aeb047987f 100755
--- a/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh
+++ b/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh
@@ -67,6 +67,31 @@ cat << EOF
 				algo = "sha256";
 			};
 		};
+EOF
+
+MCU_OFFSET=$2
+if [ "$MCU_OFFSET" != "" ]; then
+MCU_LOAD_ADDR=$((DARM_BASE+$MCU_OFFSET))
+MCU_LOAD_ADDR=$(echo "obase=16;${MCU_LOAD_ADDR}"|bc)
+cat  << EOF
+		mcu@1 {
+			description = "mcu";
+			image="mcu.bin";
+			data = /incbin/("./mcu.bin");
+			type = "standalone";
+			compression = "none";
+EOF
+echo "			load = <0x"$MCU_LOAD_ADDR">;"
+cat  << EOF
+			arch = "riscv";
+			hash@1 {
+				algo = "sha256";
+			};
+		};
+EOF
+fi
+
+cat  << EOF
 	};
 
 	configurations {
@@ -77,10 +102,25 @@ cat << EOF
 			firmware = "optee@1";
 			loadables = "uboot@1";
 			fdt = "fdt@1";
+EOF
+
+if [ "$MCU_OFFSET" != "" ]; then
+echo "			standalone = \"mcu@1\";"
+fi
+
+cat  << EOF
 			signature@1 {
 				algo = "sha256,rsa2048";
 				key-name-hint = "dev";
-				sign-images = "fdt", "firmware", "loadables";
+EOF
+
+if [ "$MCU_OFFSET" != "" ]; then
+echo "			        sign-images = \"fdt\", \"firmware\", \"loadables\", \"standalone\";"
+else
+echo "			        sign-images = \"fdt\", \"firmware\", \"loadables\";"
+fi
+
+cat  << EOF
 			};
 		};
 	};

commit c637f2321bc4ce8e021571daba5bf82a677b865f
Merge: c1bad47f31 851015326d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 16 15:48:00 2020 +0800

    Merge branch 'next-dev' into thunder-boot
    
    Change-Id: I22ac688008080eac49169d752a94b66668f890fc
    
    Conflicts:
            drivers/phy/Kconfig
            drivers/phy/Makefile

commit 851015326d0c4cdffc84d318f5f8e7bbdf40d437
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Apr 15 14:48:48 2020 +0800

    make.sh: support pack mcu by parameters
    
    Parameters: mcu address offset and enable status.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Id388bf0d94182a55781248a51d26de32ee03e7be

diff --git a/make.sh b/make.sh
index 68370a8239..2ad0995304 100755
--- a/make.sh
+++ b/make.sh
@@ -509,7 +509,6 @@ function pack_uboot_itb_image()
 	else
 		tos_image=`sed -n "/TOS=/s/TOS=//p" $ini |tr -d '\r'`
 		tosta_image=`sed -n "/TOSTA=/s/TOSTA=//p" $ini |tr -d '\r'`
-		mcu_image=`sed -n "/MCU=/s/MCU=//p" $ini |tr -d '\r'`
 		if [ $tosta_image ]; then
 			cp ${RKBIN}/${tosta_image} tee.bin
 		elif [ $tos_image ]; then
@@ -519,21 +518,24 @@ function pack_uboot_itb_image()
 			exit 1
 		fi
 
-		if [ $mcu_image ]; then
-			cp ${RKBIN}/${mcu_image} mcu.bin
-		fi
-
 		tee_offset=`sed -n "/ADDR=/s/ADDR=//p" $ini |tr -d '\r'`
 		if [ "$tee_offset" = "" ]; then
 			tee_offset=0x8400000
 		fi
 
+		mcu_enabled=`awk -F"," '/MCU=/ { printf $3 }' $ini | tr -d ' '`
+		if [ "$mcu_enabled" = "enabled" ]; then
+			mcu_image=`awk -F"," '/MCU=/ { printf $1 }' $ini | tr -d ' ' | cut -c 5-`
+			mcu_offset=`awk -F"," '/MCU=/ { printf $2 }' $ini | tr -d ' '`
+			cp ${RKBIN}/${mcu_image} mcu.bin
+		fi
+
 		SPL_FIT_SOURCE=`sed -n "/CONFIG_SPL_FIT_SOURCE=/s/CONFIG_SPL_FIT_SOURCE=//p" .config | tr -d '""'`
 		if [ ! -z $SPL_FIT_SOURCE ]; then
 			cp $SPL_FIT_SOURCE u-boot.its
 		else
 			SPL_FIT_GENERATOR=`sed -n "/CONFIG_SPL_FIT_GENERATOR=/s/CONFIG_SPL_FIT_GENERATOR=//p" .config | tr -d '""'`
-			$SPL_FIT_GENERATOR $tee_offset > u-boot.its
+			$SPL_FIT_GENERATOR $tee_offset $mcu_offset > u-boot.its
 		fi
 		./tools/mkimage -f u-boot.its -E u-boot.itb
 		echo "pack u-boot.itb okay! Input: $ini"

commit a515b6d27ec29d0f9bf4e8ab4a2ca2171ead8d8a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 16 14:16:52 2020 +0800

    fit: spl: verify hashes of images by default
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Iea4eabcd87ea612eeeb7cb5e34ce26adee053557

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 6f6a75ada9..d36b1565d3 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -234,8 +234,8 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 		src = (void *)data;
 	}
 
-#ifdef CONFIG_SPL_FIT_SIGNATURE
-	printf("## Checking hash(es) for Image %s ... ",
+	/* Check hashes and signature */
+	printf("## Checking %s ... ",
 	       fit_get_name(fit, node, NULL));
 #ifdef CONFIG_FIT_SPL_PRINT
 	printf("\n");
@@ -245,7 +245,6 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 					 src, length))
 		return -EPERM;
 	puts("OK\n");
-#endif
 
 #ifdef CONFIG_SPL_FIT_IMAGE_POST_PROCESS
 	board_fit_image_post_process(&src, &length);

commit 3029e24f609b5dfff37d436f1b96ca44fd0432d3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 16 11:06:08 2020 +0800

    rockchip: fit: update image sig required message
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Id0e5d360c2b2f1d73cefabec3ba6f2e7adddd0fc

diff --git a/arch/arm/mach-rockchip/fit.c b/arch/arm/mach-rockchip/fit.c
index 752b2a7217..051e2a2610 100644
--- a/arch/arm/mach-rockchip/fit.c
+++ b/arch/arm/mach-rockchip/fit.c
@@ -466,7 +466,7 @@ void *fit_image_load_bootables(ulong *size)
 
 static void verbose_msg(void *fit, int defconf)
 {
-	FIT_I("%ssigned, %sverified-boot\n",
+	FIT_I("%ssigned, %sconf-required\n",
 	      fit_is_signed(fit, gd_fdt_blob()) ? "" : "no ",
 	      fit_is_required(fit, gd_fdt_blob()) ? "" : "no ");
 

commit da2f97ecea846827a70ce59add60b93a991e9464
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 16 10:45:20 2020 +0800

    common: sig: require /signature node for images verify
    
    Not allow fail if FIT_SIGANATURE is enabled.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Icad787e4b25587121ede1b308c62e1a39e5899f1

diff --git a/common/image-sig.c b/common/image-sig.c
index ea241f1f03..0efc6756e7 100644
--- a/common/image-sig.c
+++ b/common/image-sig.c
@@ -243,7 +243,8 @@ static int fit_image_verify_sig(const void *fit, int image_noffset,
 		goto error;
 	}
 
-	return verified ? 0 : -EPERM;
+	if (verified)
+		return 0;
 
 error:
 	printf(" error!\n%s for '%s' hash node in '%s' image node\n",
@@ -264,9 +265,8 @@ int fit_image_verify_required_sigs(const void *fit, int image_noffset,
 	*no_sigsp = 1;
 	sig_node = fdt_subnode_offset(sig_blob, 0, FIT_SIG_NODENAME);
 	if (sig_node < 0) {
-		debug("%s: No signature node found: %s\n", __func__,
-		      fdt_strerror(sig_node));
-		return 0;
+		printf("No RSA key found\n");
+		return -EINVAL;
 	}
 
 	fdt_for_each_subnode(noffset, sig_blob, sig_node) {
@@ -443,7 +443,7 @@ int fit_config_verify_required_sigs(const void *fit, int conf_noffset,
 	/* Work out what we need to verify */
 	sig_node = fdt_subnode_offset(sig_blob, 0, FIT_SIG_NODENAME);
 	if (sig_node < 0) {
-		printf("No signature node found: %s\n", fdt_strerror(sig_node));
+		printf("No RSA key found\n");
 		return -EINVAL;
 	}
 

commit 2996edba7494cf5f3caed87133de395d241f26ba
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Apr 15 09:12:34 2020 +0800

    common: spl: mmc: clean up the useless log
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ibf588d918ce6471aeb540321118e51877ce6fea0

diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c
index d929f3ab9f..6be61dd8d3 100644
--- a/common/spl/spl_mmc.c
+++ b/common/spl/spl_mmc.c
@@ -127,7 +127,7 @@ int mmc_load_image_raw_sector(struct spl_image_info *spl_image,
 end:
 	if (ret) {
 #ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
-		puts("mmc_load_image_raw_sector: mmc block read error\n");
+		debug("mmc_load_image_raw_sector error: ret is %d\n", ret);
 #endif
 		return -1;
 	}

commit 6caebf11e0748599066fa0fd23b7a1feae5d2c28
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Mon Mar 9 11:24:42 2020 +0800

    driver: usb: drop legacy rockchip xhci driver
    
    We have changed to use dwc3 generic driver for usb3.0 host, so the
    legacy Rockchip's xHCI driver is not needed, and drop it.
    
    Change-Id: I2f6f4d3598aaec1ed30ec3c3f8f594a675520203
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 67f9ea2ddd..ec633f8398 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -46,15 +46,6 @@ config USB_XHCI_PCI
 	help
 	  Enables support for the PCI-based xHCI controller.
 
-config USB_XHCI_ROCKCHIP
-	bool "Support for Rockchip on-chip xHCI USB controller"
-	depends on ARCH_ROCKCHIP
-	depends on DM_REGULATOR
-	depends on DM_USB
-	default y
-	help
-	  Enables support for the on-chip xHCI controller on Rockchip SoCs.
-
 config USB_XHCI_RCAR
 	bool "Renesas RCar USB 3.0 support"
 	default y
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index c71ef0d409..a9e03333d0 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -49,7 +49,6 @@ obj-$(CONFIG_USB_EHCI_ZYNQ) += ehci-zynq.o
 obj-$(CONFIG_USB_XHCI_HCD) += xhci.o xhci-mem.o xhci-ring.o
 obj-$(CONFIG_USB_XHCI_DWC3) += xhci-dwc3.o
 obj-$(CONFIG_USB_XHCI_DWC3_OF_SIMPLE) += dwc3-of-simple.o
-obj-$(CONFIG_USB_XHCI_ROCKCHIP) += xhci-rockchip.o
 obj-$(CONFIG_USB_XHCI_EXYNOS) += xhci-exynos5.o
 obj-$(CONFIG_USB_XHCI_FSL) += xhci-fsl.o
 obj-$(CONFIG_USB_XHCI_MVEBU) += xhci-mvebu.o
diff --git a/drivers/usb/host/xhci-rockchip.c b/drivers/usb/host/xhci-rockchip.c
deleted file mode 100644
index 75d3f4b5f4..0000000000
--- a/drivers/usb/host/xhci-rockchip.c
+++ /dev/null
@@ -1,201 +0,0 @@
-/*
- * Copyright (c) 2016 Rockchip, Inc.
- * Authors: Daniel Meng <daniel.meng@rock-chips.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-#include <common.h>
-#include <dm.h>
-#include <malloc.h>
-#include <usb.h>
-#include <watchdog.h>
-#include <linux/errno.h>
-#include <linux/compat.h>
-#include <linux/usb/dwc3.h>
-#include <power/regulator.h>
-
-#include <usb/xhci.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-struct rockchip_xhci_platdata {
-	fdt_addr_t hcd_base;
-	struct udevice *vbus_supply;
-};
-
-/*
- * Contains pointers to register base addresses
- * for the usb controller.
- */
-struct rockchip_xhci {
-	struct usb_platdata usb_plat;
-	struct xhci_ctrl ctrl;
-	struct xhci_hccr *hcd;
-	struct dwc3 *dwc3_reg;
-};
-
-static int xhci_usb_ofdata_to_platdata(struct udevice *dev)
-{
-	struct rockchip_xhci_platdata *plat = dev_get_platdata(dev);
-	int ret = 0;
-
-	/*
-	 * Get the base address for XHCI controller from the device node
-	 */
-	plat->hcd_base = dev_read_addr(dev);
-	if (plat->hcd_base == FDT_ADDR_T_NONE) {
-		pr_err("Can't get the XHCI register base address\n");
-		return -ENXIO;
-	}
-
-	/* Vbus regulator */
-	ret = device_get_supply_regulator(dev, "vbus-supply",
-					  &plat->vbus_supply);
-	if (ret)
-		debug("Can't get VBus regulator!\n");
-
-	return 0;
-}
-
-/*
- * rockchip_dwc3_phy_setup() - Configure USB PHY Interface of DWC3 Core
- * @dwc: Pointer to our controller context structure
- * @dev: Pointer to ulcass device
- */
-static void rockchip_dwc3_phy_setup(struct dwc3 *dwc3_reg,
-				    struct udevice *dev)
-{
-	u32 reg;
-	u32 utmi_bits;
-
-	/* Set dwc3 usb2 phy config */
-	reg = readl(&dwc3_reg->g_usb2phycfg[0]);
-
-	if (dev_read_bool(dev, "snps,dis-enblslpm-quirk"))
-		reg &= ~DWC3_GUSB2PHYCFG_ENBLSLPM;
-
-	utmi_bits = dev_read_u32_default(dev, "snps,phyif-utmi-bits", -1);
-	if (utmi_bits == 16) {
-		reg |= DWC3_GUSB2PHYCFG_PHYIF;
-		reg &= ~DWC3_GUSB2PHYCFG_USBTRDTIM_MASK;
-		reg |= DWC3_GUSB2PHYCFG_USBTRDTIM_16BIT;
-	} else if (utmi_bits == 8) {
-		reg &= ~DWC3_GUSB2PHYCFG_PHYIF;
-		reg &= ~DWC3_GUSB2PHYCFG_USBTRDTIM_MASK;
-		reg |= DWC3_GUSB2PHYCFG_USBTRDTIM_8BIT;
-	}
-
-	if (dev_read_bool(dev, "snps,dis-u2-freeclk-exists-quirk"))
-		reg &= ~DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS;
-
-	if (dev_read_bool(dev, "snps,dis-u2-susphy-quirk"))
-		reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
-
-	writel(reg, &dwc3_reg->g_usb2phycfg[0]);
-}
-
-static int rockchip_xhci_core_init(struct rockchip_xhci *rkxhci,
-				   struct udevice *dev)
-{
-	int ret;
-
-	ret = dwc3_core_init(rkxhci->dwc3_reg);
-	if (ret) {
-		pr_err("failed to initialize core\n");
-		return ret;
-	}
-
-	rockchip_dwc3_phy_setup(rkxhci->dwc3_reg, dev);
-
-	/* We are hard-coding DWC3 core to Host Mode */
-	dwc3_set_mode(rkxhci->dwc3_reg, DWC3_GCTL_PRTCAP_HOST);
-
-	return 0;
-}
-
-static int rockchip_xhci_core_exit(struct rockchip_xhci *rkxhci)
-{
-	return 0;
-}
-
-static int xhci_usb_probe(struct udevice *dev)
-{
-	struct rockchip_xhci_platdata *plat = dev_get_platdata(dev);
-	struct rockchip_xhci *ctx = dev_get_priv(dev);
-	struct xhci_hcor *hcor;
-	int ret;
-
-	ctx->hcd = (struct xhci_hccr *)plat->hcd_base;
-	ctx->dwc3_reg = (struct dwc3 *)((char *)(ctx->hcd) + DWC3_REG_OFFSET);
-	hcor = (struct xhci_hcor *)((uint64_t)ctx->hcd +
-			HC_LENGTH(xhci_readl(&ctx->hcd->cr_capbase)));
-
-	if (plat->vbus_supply) {
-		ret = regulator_set_enable(plat->vbus_supply, true);
-		if (ret) {
-			pr_err("XHCI: failed to set VBus supply\n");
-			return ret;
-		}
-	}
-
-	ret = rockchip_xhci_core_init(ctx, dev);
-	if (ret) {
-		pr_err("XHCI: failed to initialize controller\n");
-		return ret;
-	}
-
-	return xhci_register(dev, ctx->hcd, hcor);
-}
-
-static int xhci_usb_remove(struct udevice *dev)
-{
-	struct rockchip_xhci_platdata *plat = dev_get_platdata(dev);
-	struct rockchip_xhci *ctx = dev_get_priv(dev);
-	int ret;
-
-	ret = xhci_deregister(dev);
-	if (ret)
-		return ret;
-	ret = rockchip_xhci_core_exit(ctx);
-	if (ret)
-		return ret;
-
-	if (plat->vbus_supply) {
-		ret = regulator_set_enable(plat->vbus_supply, false);
-		if (ret)
-			pr_err("XHCI: failed to set VBus supply\n");
-	}
-
-	return ret;
-}
-
-static const struct udevice_id xhci_usb_ids[] = {
-	{ .compatible = "rockchip,rk3399-xhci" },
-	{ .compatible = "rockchip,rk3328-xhci" },
-	{ }
-};
-
-U_BOOT_DRIVER(usb_xhci) = {
-	.name	= "xhci_rockchip",
-	.id	= UCLASS_USB,
-	.of_match = xhci_usb_ids,
-	.ofdata_to_platdata = xhci_usb_ofdata_to_platdata,
-	.probe = xhci_usb_probe,
-	.remove = xhci_usb_remove,
-	.ops	= &xhci_usb_ops,
-	.bind	= dm_scan_fdt_dev,
-	.platdata_auto_alloc_size = sizeof(struct rockchip_xhci_platdata),
-	.priv_auto_alloc_size = sizeof(struct rockchip_xhci),
-	.flags	= DM_FLAG_ALLOC_PRIV_DMA,
-};
-
-static const struct udevice_id usb_phy_ids[] = {
-	{ .compatible = "rockchip,rk3399-usb3-phy" },
-	{ .compatible = "rockchip,rk3328-usb3-phy" },
-	{ }
-};
-
-U_BOOT_DRIVER(usb_phy) = {
-	.name = "usb_phy_rockchip",
-	.of_match = usb_phy_ids,
-};

commit 0162d8c3e4cc59eb3ea5cebf9158e5f9c0acf127
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Mon Mar 9 10:36:54 2020 +0800

    ARM: dts: rockchip: amend dwc3 nodes to keep in line with kernel
    
    We have changed to use dwc3 generic driver for Rockchip SoCs,
    so let amend dts to fix it and keep in line with Linux Kernel.
    
    Change-Id: Iddf114d6a36f9651fd9b222b25ac7c9040629e22
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/arch/arm/dts/rk3328-evb-u-boot.dtsi b/arch/arm/dts/rk3328-evb-u-boot.dtsi
index 663ee78f7a..d8d450cc01 100644
--- a/arch/arm/dts/rk3328-evb-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-evb-u-boot.dtsi
@@ -13,7 +13,3 @@
 &vcc5v0_otg {
 	u-boot,dm-spl;
 };
-
-&vcc5v0_host_xhci {
-	u-boot,dm-spl;
-};
diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts
index 06d90e2318..3025bff09f 100644
--- a/arch/arm/dts/rk3328-evb.dts
+++ b/arch/arm/dts/rk3328-evb.dts
@@ -54,10 +54,10 @@
 		regulator-max-microvolt = <5000000>;
 	};
 
-	vcc5v0_host_xhci: vcc5v0-host-xhci-drv {
+	vcc_host_vbus: host-vbus-regulator {
 		compatible = "regulator-fixed";
 		enable-active-high;
-		regulator-name = "vcc5v0_host_xhci";
+		regulator-name = "vcc_host_vbus";
 		gpio = <&gpio0 0 GPIO_ACTIVE_HIGH>;
 		regulator-min-microvolt = <5000000>;
 		regulator-max-microvolt = <5000000>;
@@ -132,6 +132,19 @@
 	status = "okay";
 };
 
+&u3phy {
+	vbus-supply = <&vcc_host_vbus>;
+	status = "okay";
+};
+
+&u3phy_utmi {
+	status = "okay";
+};
+
+&u3phy_pipe {
+	status = "okay";
+};
+
 &usb_host0_ehci {
 	vbus-supply = <&vcc5v0_otg>;
 	status = "okay";
@@ -146,8 +159,11 @@
 	status = "okay";
 };
 
-&usb_host0_xhci {
-	vbus-supply = <&vcc5v0_host_xhci>;
+&usbdrd3 {
+	status = "okay";
+};
+
+&usbdrd_dwc3 {
 	status = "okay";
 };
 
diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi
index ee0dd9460d..3a182c4001 100644
--- a/arch/arm/dts/rk3328-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-u-boot.dtsi
@@ -74,10 +74,6 @@
 	u-boot,dm-spl;
 };
 
-&usb_host0_xhci {
-	u-boot,dm-spl;
-};
-
 &pinctrl {
 	u-boot,dm-spl;
 };
diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi
index 73356ea27d..d9c0c80a08 100644
--- a/arch/arm/dts/rk3328.dtsi
+++ b/arch/arm/dts/rk3328.dtsi
@@ -433,7 +433,7 @@
 			<32768>, <32768>;
 	};
 
-	usb2phy_grf: syscon-usb@ff450000 {
+	usb2phy_grf: syscon@ff450000 {
 		compatible = "rockchip,rk3328-usb2phy-grf",
 			     "simple-mfd", "syscon";
 		reg = <0x0 0xff450000 0x0 0x10000>;
@@ -446,6 +446,13 @@
 			#phy-cells = <1>;
 			status = "disabled";
 
+			u2phy_host: host-port {
+				#phy-cells = <0>;
+				interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+				interrupt-names = "linestate";
+				status = "disabled";
+			};
+
 			u2phy_otg: otg-port {
 				#phy-cells = <0>;
 				interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
@@ -455,13 +462,47 @@
 						  "linestate";
 				status = "disabled";
 			};
+		};
+	};
 
-			u2phy_host: host-port {
-				#phy-cells = <0>;
-				interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
-				interrupt-names = "linestate";
-				status = "disabled";
-			};
+	usb3phy_grf: syscon@ff460000 {
+		compatible = "rockchip,usb3phy-grf", "syscon";
+		reg = <0x0 0xff460000 0x0 0x1000>;
+	};
+
+	u3phy: usb3-phy@ff470000 {
+		compatible = "rockchip,rk3328-u3phy";
+		reg = <0x0 0xff470000 0x0 0x0>;
+		rockchip,u3phygrf = <&usb3phy_grf>;
+		rockchip,grf = <&grf>;
+		interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "linestate";
+		clocks = <&cru PCLK_USB3PHY_OTG>, <&cru PCLK_USB3PHY_PIPE>;
+		clock-names = "u3phy-otg", "u3phy-pipe";
+		resets = <&cru SRST_USB3PHY_U2>,
+			 <&cru SRST_USB3PHY_U3>,
+			 <&cru SRST_USB3PHY_PIPE>,
+			 <&cru SRST_USB3OTG_UTMI>,
+			 <&cru SRST_USB3PHY_OTG_P>,
+			 <&cru SRST_USB3PHY_PIPE_P>;
+		reset-names = "u3phy-u2-por", "u3phy-u3-por",
+			      "u3phy-pipe-mac", "u3phy-utmi-mac",
+			      "u3phy-utmi-apb", "u3phy-pipe-apb";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+		status = "disabled";
+
+		u3phy_utmi: utmi@ff470000 {
+			reg = <0x0 0xff470000 0x0 0x8000>;
+			#phy-cells = <0>;
+			status = "disabled";
+		};
+
+		u3phy_pipe: pipe@ff478000 {
+			reg = <0x0 0xff478000 0x0 0x8000>;
+			#phy-cells = <0>;
+			status = "disabled";
 		};
 	};
 
@@ -561,15 +602,35 @@
 		status = "disabled";
 	};
 
-	usb_host0_xhci: usb@ff600000 {
-		compatible = "rockchip,rk3328-xhci";
-		reg = <0x0 0xff600000 0x0 0x100000>;
-		interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
-		snps,dis-enblslpm-quirk;
-		snps,phyif-utmi-bits = <16>;
-		snps,dis-u2-freeclk-exists-quirk;
-		snps,dis-u2-susphy-quirk;
+	usbdrd3: usb@ff600000 {
+		compatible = "rockchip,rk3328-dwc3";
+		clocks = <&cru SCLK_USB3OTG_REF>, <&cru SCLK_USB3OTG_SUSPEND>,
+			 <&cru ACLK_USB3OTG>;
+		clock-names = "ref_clk", "suspend_clk",
+			      "bus_clk";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
 		status = "disabled";
+
+		usbdrd_dwc3: dwc3@ff600000 {
+			compatible = "snps,dwc3";
+			reg = <0x0 0xff600000 0x0 0x100000>;
+			interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
+			dr_mode = "host";
+			phys = <&u3phy_utmi>, <&u3phy_pipe>;
+			phy-names = "usb2-phy", "usb3-phy";
+			phy_type = "utmi_wide";
+			snps,dis_enblslpm_quirk;
+			snps,dis-u2-freeclk-exists-quirk;
+			snps,dis_u2_susphy_quirk;
+			snps,dis-u3-autosuspend-quirk;
+			snps,dis_u3_susphy_quirk;
+			snps,dis-del-phy-power-chg-quirk;
+			snps,tx-ipgap-linecheck-dis-quirk;
+			snps,xhci-trb-ent-quirk;
+			status = "disabled";
+		};
 	};
 
 	gic: interrupt-controller@ffb70000 {
diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts
index 5605eaa0d0..7bb06881e9 100644
--- a/arch/arm/dts/rk3399-evb.dts
+++ b/arch/arm/dts/rk3399-evb.dts
@@ -256,6 +256,14 @@
 	status = "okay";
 };
 
+&tcphy0 {
+	status = "okay";
+};
+
+&tcphy1 {
+	status = "okay";
+};
+
 &usb_host0_ehci {
 	status = "okay";
 };
@@ -264,21 +272,27 @@
 	status = "okay";
 };
 
-&dwc3_typec0 {
-	vbus-supply = <&vcc5v0_typec0>;
+&usbdrd3_0 {
 	status = "okay";
 };
 
-&usb_host1_ehci {
+&usbdrd3_1 {
 	status = "okay";
 };
 
-&usb_host1_ohci {
+&usbdrd_dwc3_0 {
 	status = "okay";
 };
 
-&dwc3_typec1 {
-	vbus-supply = <&vcc5v0_typec1>;
+&usbdrd_dwc3_1 {
+	status = "okay";
+};
+
+&usb_host1_ehci {
+	status = "okay";
+};
+
+&usb_host1_ohci {
 	status = "okay";
 };
 
diff --git a/arch/arm/dts/rk3399-puma.dtsi b/arch/arm/dts/rk3399-puma.dtsi
index d2c961e317..fac4f6adbd 100644
--- a/arch/arm/dts/rk3399-puma.dtsi
+++ b/arch/arm/dts/rk3399-puma.dtsi
@@ -519,6 +519,14 @@
 	status = "okay";
 };
 
+&tcphy0 {
+	status = "okay";
+};
+
+&tcphy1 {
+	status = "okay";
+};
+
 &uart2 {
 	status = "okay";
 };
@@ -531,7 +539,19 @@
 	status = "disabled";
 };
 
-&dwc3_typec0 {
+&usbdrd3_0 {
+	status = "okay";
+};
+
+&usbdrd3_1 {
+	status = "okay";
+};
+
+&usbdrd_dwc3_0 {
+	status = "okay";
+};
+
+&usbdrd_dwc3_1 {
 	status = "okay";
 };
 
@@ -543,11 +563,6 @@
 	status = "disabled";
 };
 
-&dwc3_typec1 {
-	status = "okay";
-	tsd,usb-port-power = "usbhub_enable";
-};
-
 &vopb {
 	status = "okay";
 };
diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi
index ded8e93b43..a5bac20c2d 100644
--- a/arch/arm/dts/rk3399-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-u-boot.dtsi
@@ -69,14 +69,6 @@
 	u-boot,dm-pre-reloc;
 };
 
-&dwc3_typec0 {
-	u-boot,dm-pre-reloc;
-};
-
-&dwc3_typec1 {
-	u-boot,dm-pre-reloc;
-};
-
 &emmc_phy {
 	u-boot,dm-pre-reloc;
 };
diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
index 50c78ec0ef..14183bbe14 100644
--- a/arch/arm/dts/rk3399.dtsi
+++ b/arch/arm/dts/rk3399.dtsi
@@ -381,45 +381,71 @@
 		status = "disabled";
 	};
 
-	dwc3_typec0: usb@fe800000 {
-		compatible = "rockchip,rk3399-xhci";
-		reg = <0x0 0xfe800000 0x0 0x100000>;
-		status = "disabled";
-		snps,dis-enblslpm-quirk;
-		snps,phyif-utmi-bits = <16>;
-		snps,dis-u2-freeclk-exists-quirk;
-		snps,dis-u2-susphy-quirk;
-
+	usbdrd3_0: usb0 {
+		compatible = "rockchip,rk3399-dwc3";
+		clocks = <&cru SCLK_USB3OTG0_REF>, <&cru SCLK_USB3OTG0_SUSPEND>,
+			 <&cru ACLK_USB3OTG0>, <&cru ACLK_USB3_GRF>;
+		clock-names = "ref_clk", "suspend_clk",
+			      "bus_clk", "grf_clk";
+		power-domains = <&power RK3399_PD_USB3>;
+		resets = <&cru SRST_A_USB3_OTG0>;
+		reset-names = "usb3-otg";
 		#address-cells = <2>;
 		#size-cells = <2>;
-		hub {
-			compatible = "usb-hub";
-			usb,device-class = <USB_CLASS_HUB>;
-		};
-		typec_phy0 {
-			compatible = "rockchip,rk3399-usb3-phy";
-			reg = <0x0 0xff7c0000 0x0 0x40000>;
+		ranges;
+		status = "disabled";
+
+		usbdrd_dwc3_0: dwc3@fe800000 {
+			compatible = "snps,dwc3";
+			reg = <0x0 0xfe800000 0x0 0x100000>;
+			interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH 0>;
+			dr_mode = "otg";
+			phys = <&u2phy0_otg>, <&tcphy0_usb3>;
+			phy-names = "usb2-phy", "usb3-phy";
+			phy_type = "utmi_wide";
+			snps,dis_enblslpm_quirk;
+			snps,dis-u2-freeclk-exists-quirk;
+			snps,dis_u2_susphy_quirk;
+			snps,dis-del-phy-power-chg-quirk;
+			snps,tx-ipgap-linecheck-dis-quirk;
+			snps,xhci-slow-suspend-quirk;
+			snps,xhci-trb-ent-quirk;
+			snps,usb3-warm-reset-on-resume-quirk;
+			status = "disabled";
 		};
 	};
 
-	dwc3_typec1: usb@fe900000 {
-		compatible = "rockchip,rk3399-xhci";
-		reg = <0x0 0xfe900000 0x0 0x100000>;
-		status = "disabled";
-		snps,dis-enblslpm-quirk;
-		snps,phyif-utmi-bits = <16>;
-		snps,dis-u2-freeclk-exists-quirk;
-		snps,dis-u2-susphy-quirk;
-
+	usbdrd3_1: usb1 {
+		compatible = "rockchip,rk3399-dwc3";
+		clocks = <&cru SCLK_USB3OTG1_REF>, <&cru SCLK_USB3OTG1_SUSPEND>,
+			 <&cru ACLK_USB3OTG1>, <&cru ACLK_USB3_GRF>;
+		clock-names = "ref_clk", "suspend_clk",
+			      "bus_clk", "grf_clk";
+		power-domains = <&power RK3399_PD_USB3>;
+		resets = <&cru SRST_A_USB3_OTG1>;
+		reset-names = "usb3-otg";
 		#address-cells = <2>;
 		#size-cells = <2>;
-		hub {
-			compatible = "usb-hub";
-			usb,device-class = <USB_CLASS_HUB>;
-		};
-		typec_phy1 {
-			compatible = "rockchip,rk3399-usb3-phy";
-			reg = <0x0 0xff800000 0x0 0x40000>;
+		ranges;
+		status = "disabled";
+
+		usbdrd_dwc3_1: dwc3@fe900000 {
+			compatible = "snps,dwc3";
+			reg = <0x0 0xfe900000 0x0 0x100000>;
+			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0>;
+			dr_mode = "host";
+			phys = <&u2phy1_otg>, <&tcphy1_usb3>;
+			phy-names = "usb2-phy", "usb3-phy";
+			phy_type = "utmi_wide";
+			snps,dis_enblslpm_quirk;
+			snps,dis-u2-freeclk-exists-quirk;
+			snps,dis_u2_susphy_quirk;
+			snps,dis-del-phy-power-chg-quirk;
+			snps,tx-ipgap-linecheck-dis-quirk;
+			snps,xhci-slow-suspend-quirk;
+			snps,xhci-trb-ent-quirk;
+			snps,usb3-warm-reset-on-resume-quirk;
+			status = "disabled";
 		};
 	};
 
@@ -1341,6 +1367,72 @@
 		};
 	};
 
+	tcphy0: phy@ff7c0000 {
+		compatible = "rockchip,rk3399-typec-phy";
+		reg = <0x0 0xff7c0000 0x0 0x40000>;
+		#phy-cells = <1>;
+		clocks = <&cru SCLK_UPHY0_TCPDCORE>,
+			 <&cru SCLK_UPHY0_TCPDPHY_REF>;
+		clock-names = "tcpdcore", "tcpdphy-ref";
+		assigned-clocks = <&cru SCLK_UPHY0_TCPDCORE>;
+		assigned-clock-rates = <50000000>;
+		power-domains = <&power RK3399_PD_TCPD0>;
+		resets = <&cru SRST_UPHY0>,
+			 <&cru SRST_UPHY0_PIPE_L00>,
+			 <&cru SRST_P_UPHY0_TCPHY>;
+		reset-names = "uphy", "uphy-pipe", "uphy-tcphy";
+		rockchip,grf = <&grf>;
+		rockchip,typec-conn-dir = <0xe580 0 16>;
+		rockchip,usb3tousb2-en = <0xe580 3 19>;
+		rockchip,usb3-host-disable = <0x2434 0 16>;
+		rockchip,usb3-host-port = <0x2434 12 28>;
+		rockchip,external-psm = <0xe588 14 30>;
+		rockchip,pipe-status = <0xe5c0 0 0>;
+		rockchip,uphy-dp-sel = <0x6268 19 19>;
+		status = "disabled";
+
+		tcphy0_dp: dp-port {
+			#phy-cells = <0>;
+		};
+
+		tcphy0_usb3: usb3-port {
+			#phy-cells = <0>;
+		};
+	};
+
+	tcphy1: phy@ff800000 {
+		compatible = "rockchip,rk3399-typec-phy";
+		reg = <0x0 0xff800000 0x0 0x40000>;
+		#phy-cells = <1>;
+		clocks = <&cru SCLK_UPHY1_TCPDCORE>,
+			 <&cru SCLK_UPHY1_TCPDPHY_REF>;
+		clock-names = "tcpdcore", "tcpdphy-ref";
+		assigned-clocks = <&cru SCLK_UPHY1_TCPDCORE>;
+		assigned-clock-rates = <50000000>;
+		power-domains = <&power RK3399_PD_TCPD1>;
+		resets = <&cru SRST_UPHY1>,
+			 <&cru SRST_UPHY1_PIPE_L00>,
+			 <&cru SRST_P_UPHY1_TCPHY>;
+		reset-names = "uphy", "uphy-pipe", "uphy-tcphy";
+		rockchip,grf = <&grf>;
+		rockchip,typec-conn-dir = <0xe58c 0 16>;
+		rockchip,usb3tousb2-en = <0xe58c 3 19>;
+		rockchip,usb3-host-disable = <0x2444 0 16>;
+		rockchip,usb3-host-port = <0x2444 12 28>;
+		rockchip,external-psm = <0xe594 14 30>;
+		rockchip,pipe-status = <0xe5c0 16 16>;
+		rockchip,uphy-dp-sel = <0x6268 3 19>;
+		status = "disabled";
+
+		tcphy1_dp: dp-port {
+			#phy-cells = <0>;
+		};
+
+		tcphy1_usb3: usb3-port {
+			#phy-cells = <0>;
+		};
+	};
+
 	watchdog@ff848000 {
 		compatible = "snps,dw-wdt";
 		reg = <0x0 0xff848000 0x0 0x100>;

commit 3e6777664f1694345d03d222bcfb590aadc38981
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Tue Mar 3 17:58:49 2020 +0800

    usb: gadget: vary ep max packet by usb speed
    
    The EP Maxpacket should be varied due the USB speed may be changed
    at enumeration time.
    
    Change-Id: I6cf8e1e8b6e3c24d14f7b24638aff88f8dd066e0
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/gadget/storage_common.c b/drivers/usb/gadget/storage_common.c
index 2d9851a22a..c85a86cd2d 100644
--- a/drivers/usb/gadget/storage_common.c
+++ b/drivers/usb/gadget/storage_common.c
@@ -593,6 +593,12 @@ fsg_ep_desc(struct usb_gadget *g, struct usb_endpoint_descriptor *fs,
 		speed_desc = fs;
 	}
 
+	/*
+	 * Config the ep maxpacket according to the right descriptors
+	 * for a given endpoint.
+	 */
+	ep->maxpacket = usb_endpoint_maxp(speed_desc) & USB_ENDPOINT_MAXP_MASK;
+
 	return speed_desc;
 }
 

commit ea6d52da215d3d0bfa3eaa0abd54c93748b72ccf
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Tue Feb 18 18:08:42 2020 +0800

    usb: dwc3: add make compatible for rockchip platform
    
    RK3399 Type-C PHY is required that must hold whole USB3.0 OTG controller
    in resetting to hold pipe power state in P2 before initializing the PHY.
    This commit fixed it and added device compatible for rockchip platform.
    
    Change-Id: I2a546ac91632ea29d9ea88e94bfde948c387b834
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c
index e300cc0496..c5106d98fc 100644
--- a/drivers/usb/dwc3/dwc3-generic.c
+++ b/drivers/usb/dwc3/dwc3-generic.c
@@ -23,6 +23,12 @@
 #include <clk.h>
 #include <usb/xhci.h>
 
+struct dwc3_glue_data {
+	struct clk_bulk		clks;
+	struct reset_ctl_bulk	resets;
+	fdt_addr_t regs;
+};
+
 struct dwc3_generic_plat {
 	fdt_addr_t base;
 	u32 maximum_speed;
@@ -47,6 +53,7 @@ static int dwc3_generic_probe(struct udevice *dev,
 	int rc;
 	struct dwc3_generic_plat *plat = dev_get_platdata(dev);
 	struct dwc3 *dwc3 = &priv->dwc3;
+	struct dwc3_glue_data *glue = dev_get_platdata(dev->parent);
 
 	dwc3->dev = dev;
 	dwc3->maximum_speed = plat->maximum_speed;
@@ -55,10 +62,22 @@ static int dwc3_generic_probe(struct udevice *dev,
 	dwc3_of_parse(dwc3);
 #endif
 
+	/*
+	 * It must hold whole USB3.0 OTG controller in resetting to hold pipe
+	 * power state in P2 before initializing TypeC PHY on RK3399 platform.
+	 */
+	if (device_is_compatible(dev->parent, "rockchip,rk3399-dwc3")) {
+		reset_assert_bulk(&glue->resets);
+		udelay(1);
+	}
+
 	rc = dwc3_setup_phy(dev, &priv->phys, &priv->num_phys);
 	if (rc)
 		return rc;
 
+	if (device_is_compatible(dev->parent, "rockchip,rk3399-dwc3"))
+		reset_deassert_bulk(&glue->resets);
+
 	priv->base = map_physmem(plat->base, DWC3_OTG_REGS_END, MAP_NOCACHE);
 	dwc3->regs = priv->base + DWC3_GLOBALS_REGS_START;
 
@@ -186,12 +205,6 @@ U_BOOT_DRIVER(dwc3_generic_host) = {
 };
 #endif
 
-struct dwc3_glue_data {
-	struct clk_bulk		clks;
-	struct reset_ctl_bulk	resets;
-	fdt_addr_t regs;
-};
-
 struct dwc3_glue_ops {
 	void (*select_dr_mode)(struct udevice *dev, int index,
 			       enum usb_dr_mode mode);
@@ -394,6 +407,12 @@ static int dwc3_glue_probe(struct udevice *dev)
 	if (ret)
 		return ret;
 
+	if (glue->resets.count < 1) {
+		ret = dwc3_glue_reset_init(child, glue);
+		if (ret)
+			return ret;
+	}
+
 	while (child) {
 		enum usb_dr_mode dr_mode;
 
@@ -423,6 +442,8 @@ static const struct udevice_id dwc3_glue_ids[] = {
 	{ .compatible = "ti,keystone-dwc3"},
 	{ .compatible = "ti,dwc3", .data = (ulong)&ti_ops },
 	{ .compatible = "ti,am437x-dwc3", .data = (ulong)&ti_ops },
+	{ .compatible = "rockchip,rk3328-dwc3" },
+	{ .compatible = "rockchip,rk3399-dwc3" },
 	{ }
 };
 

commit 4f6604d7ffb7165aa03fc0880c636eab4a224095
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Mon Feb 24 15:18:57 2020 +0800

    phy: rockchip: add a new driver for type-c phy
    
    This implements the Type-C PHY driver for Rockchip platform
    with Cadence IP block.
    
    Change-Id: I4d74aadbae10f743c9daec8f97aadb8458e740fc
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 6c92507add..2615b650b3 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -71,6 +71,12 @@ config PHY_ROCKCHIP_INNO_USB3
 	help
 	  Support for Rockchip USB 3.0 PHY with Innosilicon IP block.
 
+config PHY_ROCKCHIP_TYPEC
+	bool "Support Rockchip TYPEC PHY Driver"
+	depends on PHY && ARCH_ROCKCHIP
+	help
+	  Enable this to support the Rockchip USB Type-C PHY.
+
 config PIPE3_PHY
 	bool "Support omap's PIPE3 PHY"
 	depends on PHY && ARCH_OMAP2PLUS
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index 1f33777ec4..2079355451 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -9,5 +9,6 @@ obj-$(CONFIG_$(SPL_)PHY) += phy-uclass.o
 obj-$(CONFIG_$(SPL_)NOP_PHY) += nop-phy.o
 obj-$(CONFIG_PHY_ROCKCHIP_INNO_USB2) += phy-rockchip-inno-usb2.o
 obj-$(CONFIG_PHY_ROCKCHIP_INNO_USB3) += phy-rockchip-inno-usb3.o
+obj-$(CONFIG_PHY_ROCKCHIP_TYPEC) += phy-rockchip-typec.o
 obj-$(CONFIG_PHY_SANDBOX) += sandbox-phy.o
 obj-$(CONFIG_$(SPL_)PIPE3_PHY) += ti-pipe3-phy.o
diff --git a/drivers/phy/phy-rockchip-typec.c b/drivers/phy/phy-rockchip-typec.c
new file mode 100644
index 0000000000..cd0f055bd4
--- /dev/null
+++ b/drivers/phy/phy-rockchip-typec.c
@@ -0,0 +1,534 @@
+// SPDX-License-Identifier:     GPL-2.0
+/*
+ * Copyright (C) 2020 Rockchip Electronics Co., Ltd
+ *
+ * Based on drivers/phy/rockchip/phy-rockchip-typec.c in Linux Kernel.
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/lists.h>
+#include <dm/of_access.h>
+#include <generic-phy.h>
+#include <power/regulator.h>
+#include <regmap.h>
+#include <reset.h>
+#include <syscon.h>
+#include <asm-generic/io.h>
+#include <asm/arch/clock.h>
+#include <linux/iopoll.h>
+#include <linux/usb/rockchip_phy_typec.h>
+
+#define CMN_PLL0_VCOCAL_OVRD		(0x83 << 2)
+#define CMN_PLL0_VCOCAL_INIT		(0x84 << 2)
+#define CMN_PLL0_VCOCAL_ITER		(0x85 << 2)
+#define CMN_PLL0_LOCK_REFCNT_START	(0x90 << 2)
+#define CMN_PLL0_LOCK_PLLCNT_START	(0x92 << 2)
+#define CMN_PLL0_LOCK_PLLCNT_THR	(0x93 << 2)
+#define CMN_PLL0_INTDIV			(0x94 << 2)
+#define CMN_PLL0_FRACDIV		(0x95 << 2)
+#define CMN_PLL0_HIGH_THR		(0x96 << 2)
+#define CMN_PLL0_DSM_DIAG		(0x97 << 2)
+#define CMN_PLL0_SS_CTRL1		(0x98 << 2)
+#define CMN_PLL0_SS_CTRL2		(0x99 << 2)
+#define CMN_DIAG_PLL0_FBH_OVRD		(0x1c0 << 2)
+#define CMN_DIAG_PLL0_FBL_OVRD		(0x1c1 << 2)
+#define CMN_DIAG_PLL0_OVRD		(0x1c2 << 2)
+#define CMN_DIAG_PLL0_V2I_TUNE		(0x1c5 << 2)
+#define CMN_DIAG_PLL0_CP_TUNE		(0x1c6 << 2)
+#define CMN_DIAG_PLL0_LF_PROG		(0x1c7 << 2)
+#define CMN_DIAG_HSCLK_SEL		(0x1e0 << 2)
+
+#define TX_TXCC_MGNFS_MULT_000(n)	((0x4050 | ((n) << 9)) << 2)
+#define XCVR_DIAG_PLLDRC_CTRL(n)	((0x40e0 | ((n) << 9)) << 2)
+#define XCVR_DIAG_BIDI_CTRL(n)		((0x40e8 | ((n) << 9)) << 2)
+#define XCVR_DIAG_LANE_FCM_EN_MGN(n)	((0x40f2 | ((n) << 9)) << 2)
+#define TX_PSC_A0(n)			((0x4100 | ((n) << 9)) << 2)
+#define TX_PSC_A1(n)			((0x4101 | ((n) << 9)) << 2)
+#define TX_PSC_A2(n)			((0x4102 | ((n) << 9)) << 2)
+#define TX_PSC_A3(n)			((0x4103 | ((n) << 9)) << 2)
+#define TX_RCVDET_CTRL(n)		((0x4120 | ((n) << 9)) << 2)
+#define TX_RCVDET_EN_TMR(n)		((0x4122 | ((n) << 9)) << 2)
+#define TX_RCVDET_ST_TMR(n)		((0x4123 | ((n) << 9)) << 2)
+#define TX_DIAG_TX_DRV(n)		((0x41e1 | ((n) << 9)) << 2)
+#define TX_DIAG_BGREF_PREDRV_DELAY	(0x41e7 << 2)
+
+#define RX_PSC_A0(n)			((0x8000 | ((n) << 9)) << 2)
+#define RX_PSC_A1(n)			((0x8001 | ((n) << 9)) << 2)
+#define RX_PSC_A2(n)			((0x8002 | ((n) << 9)) << 2)
+#define RX_PSC_A3(n)			((0x8003 | ((n) << 9)) << 2)
+#define RX_PSC_CAL(n)			((0x8006 | ((n) << 9)) << 2)
+#define RX_PSC_RDY(n)			((0x8007 | ((n) << 9)) << 2)
+#define RX_SIGDET_HL_FILT_TMR(n)	((0x8090 | ((n) << 9)) << 2)
+#define RX_REE_CTRL_DATA_MASK(n)	((0x81bb | ((n) << 9)) << 2)
+#define RX_DIAG_SIGDET_TUNE(n)		((0x81dc | ((n) << 9)) << 2)
+#define RX_DIAG_SC2C_DELAY		(0x81e1 << 2)
+
+#define PHY_ISO_CMN_CTRL		(0xc010 << 2)
+#define PMA_CMN_CTRL1			(0xc800 << 2)
+#define PHY_PMA_ISO_CMN_CTRL		(0xc810 << 2)
+#define PHY_ISOLATION_CTRL		(0xc81f << 2)
+#define PHY_PMA_ISO_XCVR_CTRL(n)	((0xcc11 | ((n) << 6)) << 2)
+#define PHY_PMA_ISO_LINK_MODE(n)	((0xcc12 | ((n) << 6)) << 2)
+#define PHY_PMA_ISO_PWRST_CTRL(n)	((0xcc13 | ((n) << 6)) << 2)
+#define PHY_PMA_ISO_TX_DATA_LO(n)	((0xcc14 | ((n) << 6)) << 2)
+#define PHY_PMA_ISO_TX_DATA_HI(n)	((0xcc15 | ((n) << 6)) << 2)
+#define PHY_PMA_ISO_RX_DATA_LO(n)	((0xcc16 | ((n) << 6)) << 2)
+#define PHY_PMA_ISO_RX_DATA_HI(n)	((0xcc17 | ((n) << 6)) << 2)
+
+/*
+ * Selects which PLL clock will be driven on the analog high speed
+ * clock 0: PLL 0 div 1
+ * clock 1: PLL 1 div 2
+ */
+#define CLK_PLL1_DIV1			0x20
+#define CLK_PLL1_DIV2			0x30
+#define CLK_PLL_MASK			0x33
+
+#define CMN_READY			BIT(0)
+#define PHY_MODE_SET_TIMEOUT		100000
+#define MODE_DISCONNECT			0
+#define MODE_UFP_USB			BIT(0)
+#define MODE_DFP_USB			BIT(1)
+#define POWER_ON_TRIES			5
+
+struct phy_reg {
+	u16 value;
+	u32 addr;
+};
+
+static const struct phy_reg usb3_pll_cfg[] = {
+	{ 0xf0,		CMN_PLL0_VCOCAL_INIT },
+	{ 0x18,		CMN_PLL0_VCOCAL_ITER },
+	{ 0xd0,		CMN_PLL0_INTDIV },
+	{ 0x4a4a,	CMN_PLL0_FRACDIV },
+	{ 0x34,		CMN_PLL0_HIGH_THR },
+	{ 0x1ee,	CMN_PLL0_SS_CTRL1 },
+	{ 0x7f03,	CMN_PLL0_SS_CTRL2 },
+	{ 0x20,		CMN_PLL0_DSM_DIAG },
+	{ 0,		CMN_DIAG_PLL0_OVRD },
+	{ 0,		CMN_DIAG_PLL0_FBH_OVRD },
+	{ 0,		CMN_DIAG_PLL0_FBL_OVRD },
+	{ 0x7,		CMN_DIAG_PLL0_V2I_TUNE },
+	{ 0x45,		CMN_DIAG_PLL0_CP_TUNE },
+	{ 0x8,		CMN_DIAG_PLL0_LF_PROG },
+};
+
+static void tcphy_cfg_24m(struct rockchip_typec_phy *tcphy)
+{
+	u32 i, rdata;
+
+	/*
+	 * cmn_ref_clk_sel = 3, select the 24Mhz for clk parent
+	 * cmn_psm_clk_dig_div = 2, set the clk division to 2
+	 */
+	writel(0x830, tcphy->base + PMA_CMN_CTRL1);
+	for (i = 0; i < 4; i++) {
+		/*
+		 * The following PHY configuration assumes a 24 MHz reference
+		 * clock.
+		 */
+		writel(0x90, tcphy->base + XCVR_DIAG_LANE_FCM_EN_MGN(i));
+		writel(0x960, tcphy->base + TX_RCVDET_EN_TMR(i));
+		writel(0x30, tcphy->base + TX_RCVDET_ST_TMR(i));
+	}
+
+	rdata = readl(tcphy->base + CMN_DIAG_HSCLK_SEL);
+	rdata &= ~CLK_PLL_MASK;
+	rdata |= CLK_PLL1_DIV2;
+	writel(rdata, tcphy->base + CMN_DIAG_HSCLK_SEL);
+}
+
+static void tcphy_cfg_usb3_pll(struct rockchip_typec_phy *tcphy)
+{
+	u32 i;
+
+	/* load the configuration of PLL0 */
+	for (i = 0; i < ARRAY_SIZE(usb3_pll_cfg); i++)
+		writel(usb3_pll_cfg[i].value,
+		       tcphy->base + usb3_pll_cfg[i].addr);
+}
+
+static void tcphy_tx_usb3_cfg_lane(struct rockchip_typec_phy *tcphy, u32 lane)
+{
+	writel(0x7799, tcphy->base + TX_PSC_A0(lane));
+	writel(0x7798, tcphy->base + TX_PSC_A1(lane));
+	writel(0x5098, tcphy->base + TX_PSC_A2(lane));
+	writel(0x5098, tcphy->base + TX_PSC_A3(lane));
+	writel(0, tcphy->base + TX_TXCC_MGNFS_MULT_000(lane));
+	writel(0xbf, tcphy->base + XCVR_DIAG_BIDI_CTRL(lane));
+}
+
+static void tcphy_rx_usb3_cfg_lane(struct rockchip_typec_phy *tcphy, u32 lane)
+{
+	writel(0xa6fd, tcphy->base + RX_PSC_A0(lane));
+	writel(0xa6fd, tcphy->base + RX_PSC_A1(lane));
+	writel(0xa410, tcphy->base + RX_PSC_A2(lane));
+	writel(0x2410, tcphy->base + RX_PSC_A3(lane));
+	writel(0x23ff, tcphy->base + RX_PSC_CAL(lane));
+	writel(0x13, tcphy->base + RX_SIGDET_HL_FILT_TMR(lane));
+	writel(0x03e7, tcphy->base + RX_REE_CTRL_DATA_MASK(lane));
+	writel(0x1004, tcphy->base + RX_DIAG_SIGDET_TUNE(lane));
+	writel(0x2010, tcphy->base + RX_PSC_RDY(lane));
+	writel(0xfb, tcphy->base + XCVR_DIAG_BIDI_CTRL(lane));
+}
+
+static inline int property_enable(struct rockchip_typec_phy *tcphy,
+				  const struct usb3phy_reg *reg, bool en)
+{
+	u32 mask = 1 << reg->write_enable;
+	u32 val = en << reg->enable_bit;
+
+	return writel((val | mask), (tcphy->grf_regs + reg->offset));
+}
+
+static int tcphy_cfg_usb3_to_usb2_only(struct rockchip_typec_phy *tcphy,
+				       bool value)
+{
+	struct rockchip_usb3phy_port_cfg *cfg = &tcphy->port_cfgs;
+
+	property_enable(tcphy, &cfg->usb3tousb2_en, value);
+	property_enable(tcphy, &cfg->usb3host_disable, value);
+	property_enable(tcphy, &cfg->usb3host_port, !value);
+
+	return 0;
+}
+
+static int tcphy_phy_init(struct rockchip_typec_phy *tcphy)
+{
+	struct rockchip_usb3phy_port_cfg *cfg = &tcphy->port_cfgs;
+	int ret;
+	u32 val;
+
+	reset_deassert(&tcphy->tcphy_rst);
+
+	property_enable(tcphy, &cfg->typec_conn_dir, tcphy->flip);
+
+	tcphy_cfg_24m(tcphy);
+
+	tcphy_cfg_usb3_pll(tcphy);
+	if (tcphy->flip) {
+		tcphy_tx_usb3_cfg_lane(tcphy, 3);
+		tcphy_rx_usb3_cfg_lane(tcphy, 2);
+	} else {
+		tcphy_tx_usb3_cfg_lane(tcphy, 0);
+		tcphy_rx_usb3_cfg_lane(tcphy, 1);
+	}
+
+	reset_deassert(&tcphy->uphy_rst);
+
+	ret = readx_poll_timeout(readl, tcphy->base + PMA_CMN_CTRL1,
+				 val, val & CMN_READY, PHY_MODE_SET_TIMEOUT);
+	if (ret < 0) {
+		dev_err(tcphy->dev, "wait pma ready timeout\n");
+		ret = -ETIMEDOUT;
+		goto err_wait_pma;
+	}
+
+	reset_deassert(&tcphy->pipe_rst);
+
+	return 0;
+
+err_wait_pma:
+	reset_assert(&tcphy->uphy_rst);
+	reset_assert(&tcphy->tcphy_rst);
+	return ret;
+}
+
+static void tcphy_phy_deinit(struct rockchip_typec_phy *tcphy)
+{
+	reset_assert(&tcphy->tcphy_rst);
+	reset_assert(&tcphy->uphy_rst);
+	reset_assert(&tcphy->pipe_rst);
+}
+
+static int tcphy_get_mode(struct rockchip_typec_phy *tcphy)
+{
+	u8 mode = MODE_DFP_USB | MODE_UFP_USB;
+
+	tcphy->flip = 0;
+
+	return mode;
+}
+
+static int _rockchip_usb3_phy_power_on(struct rockchip_typec_phy *tcphy)
+{
+	struct rockchip_usb3phy_port_cfg *cfg = &tcphy->port_cfgs;
+	const struct usb3phy_reg *reg = &cfg->pipe_status;
+	int timeout, new_mode, ret = 0;
+	u32 val;
+
+	mutex_lock(&tcphy->lock);
+
+	new_mode = tcphy_get_mode(tcphy);
+
+	if (tcphy->mode == new_mode)
+		goto unlock_ret;
+
+	if (tcphy->mode == MODE_DISCONNECT) {
+		ret = tcphy_phy_init(tcphy);
+		if (ret)
+			goto unlock_ret;
+	}
+
+	/* wait TCPHY for pipe ready */
+	for (timeout = 0; timeout < 100; timeout++) {
+		val = readl(tcphy->grf_regs + reg->offset);
+		if (!(val & BIT(reg->enable_bit))) {
+			tcphy->mode |= new_mode & (MODE_DFP_USB | MODE_UFP_USB);
+
+			/* enable usb3 host */
+			tcphy_cfg_usb3_to_usb2_only(tcphy, false);
+			goto unlock_ret;
+		}
+		udelay(20);
+	}
+
+	if (tcphy->mode == MODE_DISCONNECT)
+		tcphy_phy_deinit(tcphy);
+
+	ret = -ETIMEDOUT;
+
+unlock_ret:
+	mutex_unlock(&tcphy->lock);
+	return ret;
+}
+
+static int rockchip_usb3_phy_power_on(struct phy *phy)
+{
+	struct udevice *parent = dev_get_parent(phy->dev);
+	struct rockchip_typec_phy *tcphy = dev_get_priv(parent);
+	int ret;
+	int tries;
+
+	for (tries = 0; tries < POWER_ON_TRIES; tries++) {
+		ret = _rockchip_usb3_phy_power_on(tcphy);
+		if (!ret)
+			break;
+	}
+
+	if (tries && !ret)
+		dev_err(tcphy->dev, "Needed %d loops to turn on\n", tries);
+
+	return ret;
+}
+
+static int rockchip_usb3_phy_power_off(struct phy *phy)
+{
+	struct udevice *parent = dev_get_parent(phy->dev);
+	struct rockchip_typec_phy *tcphy = dev_get_priv(parent);
+
+	mutex_lock(&tcphy->lock);
+
+	if (tcphy->mode == MODE_DISCONNECT)
+		goto unlock;
+
+	tcphy->mode = MODE_DISCONNECT;
+	tcphy_phy_deinit(tcphy);
+
+unlock:
+	mutex_unlock(&tcphy->lock);
+	return 0;
+}
+
+static const struct phy_ops rockchip_usb3_phy_ops = {
+	.power_on	= rockchip_usb3_phy_power_on,
+	.power_off	= rockchip_usb3_phy_power_off,
+};
+
+int rockchip_u3phy_uboot_init(const char *name)
+{
+	struct udevice *udev;
+	struct rockchip_typec_phy *tcphy;
+	int tries;
+	int ret;
+
+	ret = uclass_get_device_by_name(UCLASS_PHY, name, &udev);
+	if (ret) {
+		pr_err("%s: get usb3-phy failed: %d\n", __func__, ret);
+		return ret;
+	}
+
+	/* Initialize OTG PHY */
+	tcphy = dev_get_priv(udev);
+	for (tries = 0; tries < POWER_ON_TRIES; tries++) {
+		ret = _rockchip_usb3_phy_power_on(tcphy);
+		if (!ret)
+			break;
+	}
+
+	if (tries && !ret)
+		pr_err("%s: needed %d loops to turn on\n", __func__, tries);
+
+	return ret;
+}
+
+static int tcphy_get_param(struct udevice *dev,
+			   struct usb3phy_reg *reg,
+			   const char *name)
+{
+	u32 buffer[3];
+	int ret;
+
+	ret = dev_read_u32_array(dev, name, buffer, 3);
+	if (ret) {
+		pr_err("%s: Can not parse %s\n", __func__, name);
+		return ret;
+	}
+
+	reg->offset = buffer[0];
+	reg->enable_bit = buffer[1];
+	reg->write_enable = buffer[2];
+
+	return 0;
+}
+
+static int tcphy_parse_dt(struct rockchip_typec_phy *tcphy,
+			  struct udevice *dev)
+{
+	struct rockchip_usb3phy_port_cfg *cfg = &tcphy->port_cfgs;
+	int ret;
+
+	ret = tcphy_get_param(dev, &cfg->typec_conn_dir,
+			      "rockchip,typec-conn-dir");
+	if (ret)
+		return ret;
+
+	ret = tcphy_get_param(dev, &cfg->usb3tousb2_en,
+			      "rockchip,usb3tousb2-en");
+	if (ret)
+		return ret;
+
+	ret = tcphy_get_param(dev, &cfg->usb3host_disable,
+			      "rockchip,usb3-host-disable");
+	if (ret)
+		return ret;
+
+	ret = tcphy_get_param(dev, &cfg->usb3host_port,
+			      "rockchip,usb3-host-port");
+	if (ret)
+		return ret;
+
+	ret = tcphy_get_param(dev, &cfg->external_psm,
+			      "rockchip,external-psm");
+	if (ret)
+		return ret;
+
+	ret = tcphy_get_param(dev, &cfg->pipe_status,
+			      "rockchip,pipe-status");
+	if (ret)
+		return ret;
+
+	tcphy->grf_regs = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	if (IS_ERR(tcphy->grf_regs)) {
+		dev_err(dev, "could not find grf dt node\n");
+		return PTR_ERR(tcphy->grf_regs);
+	}
+
+	ret = reset_get_by_name(dev, "uphy", &tcphy->uphy_rst);
+	if (ret) {
+		dev_err(dev, "no uphy_rst reset control found\n");
+		return ret;
+	}
+
+	ret = reset_get_by_name(dev, "uphy-pipe", &tcphy->pipe_rst);
+	if (ret) {
+		dev_err(dev, "no pipe_rst reset control found\n");
+		return ret;
+	}
+
+	ret = reset_get_by_name(dev, "uphy-pipe", &tcphy->tcphy_rst);
+	if (ret) {
+		dev_err(dev, "no tcphy_rst reset control found\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+static void typec_phy_pre_init(struct rockchip_typec_phy *tcphy)
+{
+	struct rockchip_usb3phy_port_cfg *cfg = &tcphy->port_cfgs;
+
+	reset_assert(&tcphy->tcphy_rst);
+	reset_assert(&tcphy->uphy_rst);
+	reset_assert(&tcphy->pipe_rst);
+
+	/* select external psm clock */
+	property_enable(tcphy, &cfg->external_psm, 1);
+	property_enable(tcphy, &cfg->usb3tousb2_en, 0);
+
+	tcphy->mode = MODE_DISCONNECT;
+}
+
+static int rockchip_typec_phy_bind(struct udevice *parent)
+{
+	struct udevice *dev;
+	ofnode node;
+	const char *name;
+	int ret;
+
+	dev_for_each_subnode(node, parent) {
+		if (!ofnode_valid(node)) {
+			debug("%s: %s subnode not found", __func__, parent->name);
+			return -ENXIO;
+		}
+
+		name = ofnode_get_name(node);
+		debug("%s: subnode %s\n", __func__, name);
+
+		if (!strcasecmp(name, "usb3-port")) {
+			ret = device_bind_driver_to_node(parent, "rockchip_typec_phy_port",
+							 name, node, &dev);
+			if (ret) {
+				pr_err("%s: '%s' cannot bind 'rockchip_typec_phy_port'\n",
+				       __func__, name);
+				return ret;
+			}
+		}
+	}
+
+	return 0;
+}
+
+static int rockchip_typec_phy_probe(struct udevice *udev)
+{
+	struct rockchip_typec_phy *tcphy = dev_get_priv(udev);
+	int ret;
+
+	tcphy->base = (void __iomem *)dev_read_addr(udev);
+	if (IS_ERR(tcphy->base))
+		return PTR_ERR(tcphy->base);
+
+	ret = tcphy_parse_dt(tcphy, udev);
+	if (ret)
+		return ret;
+
+	tcphy->dev = udev;
+	mutex_init(&tcphy->lock);
+
+	typec_phy_pre_init(tcphy);
+
+	printf("Rockchip Type-C PHY is initialized\n");
+	return 0;
+}
+
+static const struct udevice_id rockchip_typec_phy_dt_ids[] = {
+	{ .compatible = "rockchip,rk3399-typec-phy" },
+	{}
+};
+
+U_BOOT_DRIVER(rockchip_typec_phy_port) = {
+	.name		= "rockchip_typec_phy_port",
+	.id		= UCLASS_PHY,
+	.ops		= &rockchip_usb3_phy_ops,
+};
+
+U_BOOT_DRIVER(rockchip_typec_phy) = {
+	.name		= "rockchip_typec_phy",
+	.id		= UCLASS_PHY,
+	.of_match	= rockchip_typec_phy_dt_ids,
+	.probe		= rockchip_typec_phy_probe,
+	.bind		= rockchip_typec_phy_bind,
+	.priv_auto_alloc_size = sizeof(struct rockchip_typec_phy),
+};
diff --git a/include/linux/usb/rockchip_phy_typec.h b/include/linux/usb/rockchip_phy_typec.h
new file mode 100644
index 0000000000..9551f2be1e
--- /dev/null
+++ b/include/linux/usb/rockchip_phy_typec.h
@@ -0,0 +1,52 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2020 Rockchip Electronics Co., Ltd
+ *
+ * Based on include/soc/rockchip/rockchip_phy_typec.h in Linux Kernel.
+ */
+
+#ifndef __LINUX_ROCKCHIP_PHY_TYPEC_H
+#define __LINUX_ROCKCHIP_PHY_TYPEC_H
+
+#include <reset.h>
+
+struct usb3phy_reg {
+	u32 offset;
+	u32 enable_bit;
+	u32 write_enable;
+};
+
+struct rockchip_usb3phy_port_cfg {
+	struct usb3phy_reg typec_conn_dir;
+	struct usb3phy_reg usb3tousb2_en;
+	struct usb3phy_reg usb3host_disable;
+	struct usb3phy_reg usb3host_port;
+	struct usb3phy_reg external_psm;
+	struct usb3phy_reg pipe_status;
+};
+
+struct rockchip_typec_phy {
+	struct udevice *dev;
+	void __iomem *base;
+	void __iomem *grf_regs;
+	struct reset_ctl uphy_rst;
+	struct reset_ctl pipe_rst;
+	struct reset_ctl tcphy_rst;
+	struct rockchip_usb3phy_port_cfg port_cfgs;
+	/* mutex to protect access to individual PHYs */
+	struct mutex lock;
+
+	bool flip;
+	u8 mode;
+};
+
+#if CONFIG_IS_ENABLED(PHY_ROCKCHIP_TYPEC)
+int rockchip_u3phy_uboot_init(const char *name);
+#else
+static inline int rockchip_u3phy_uboot_init(const char *name)
+{
+	return -ENOTSUPP;
+}
+#endif
+
+#endif /* __LINUX_ROCKCHIP_PHY_TYPEC_H */

commit 86df9e881e428fe3217c620f3f627950cb4c4344
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Thu Feb 27 17:34:14 2020 +0800

    phy: rockchip-inno-usb2: add vbus regulator support
    
    Get vbus regulator from DT and manage it when phy power on/off.
    
    Change-Id: Iad6742eb47906b0d13ea1e697a5540e69adb2bd1
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index 841b7385b6..f067192b49 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -9,6 +9,7 @@
 #include <dm/lists.h>
 #include <generic-phy.h>
 #include <syscon.h>
+#include <power/regulator.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 
@@ -151,6 +152,7 @@ struct rockchip_usb2phy {
 	u8		primary_retries;
 	void __iomem	*grf_base;
 	void __iomem	*usbgrf_base;
+	struct udevice	*vbus_supply[USB2PHY_NUM_PORTS];
 	const struct rockchip_usb2phy_cfg	*phy_cfg;
 };
 
@@ -386,6 +388,29 @@ void otg_phy_init(struct dwc2_udc *dev)
 	mdelay(2);
 }
 
+static struct udevice *rockchip_usb2phy_check_vbus(struct phy *phy)
+{
+	struct udevice *parent = phy->dev->parent;
+	struct rockchip_usb2phy *rphy = dev_get_priv(parent);
+	const struct rockchip_usb2phy_port_cfg *port_cfg;
+	void __iomem *base = get_reg_base(rphy);
+	struct udevice *vbus = NULL;
+	bool iddig = true;
+
+	if (phy->id == USB2PHY_PORT_HOST) {
+		vbus = rphy->vbus_supply[USB2PHY_PORT_HOST];
+	} else if (phy->id == USB2PHY_PORT_OTG) {
+		port_cfg = &rphy->phy_cfg->port_cfgs[USB2PHY_PORT_OTG];
+		if (port_cfg->utmi_iddig.offset) {
+			iddig = property_enabled(base, &port_cfg->utmi_iddig);
+			if (!iddig)
+				vbus = rphy->vbus_supply[USB2PHY_PORT_OTG];
+		}
+	}
+
+	return vbus;
+}
+
 static int rockchip_usb2phy_init(struct phy *phy)
 {
 	struct udevice *parent = phy->dev->parent;
@@ -431,15 +456,55 @@ static int rockchip_usb2phy_exit(struct phy *phy)
 	return 0;
 }
 
+static int rockchip_usb2phy_power_on(struct phy *phy)
+{
+	struct udevice *vbus = NULL;
+	int ret;
+
+	vbus = rockchip_usb2phy_check_vbus(phy);
+	if (vbus) {
+		ret = regulator_set_enable(vbus, true);
+		if (ret) {
+			pr_err("%s: Failed to set VBus supply\n", __func__);
+			return ret;
+		}
+	}
+
+	return 0;
+}
+
+static int rockchip_usb2phy_power_off(struct phy *phy)
+{
+	struct udevice *vbus = NULL;
+	int ret;
+
+	vbus = rockchip_usb2phy_check_vbus(phy);
+	if (vbus) {
+		ret = regulator_set_enable(vbus, false);
+		if (ret) {
+			pr_err("%s: Failed to set VBus supply\n", __func__);
+			return ret;
+		}
+	}
+
+	return 0;
+}
+
 static int rockchip_usb2phy_of_xlate(struct phy *phy,
 				     struct ofnode_phandle_args *args)
 {
 	const char *dev_name = phy->dev->name;
+	struct udevice *parent = phy->dev->parent;
+	struct rockchip_usb2phy *rphy = dev_get_priv(parent);
 
 	if (!strcasecmp(dev_name, "host-port")) {
 		phy->id = USB2PHY_PORT_HOST;
+		device_get_supply_regulator(phy->dev, "phy-supply",
+					    &rphy->vbus_supply[USB2PHY_PORT_HOST]);
 	} else if (!strcasecmp(dev_name, "otg-port")) {
 		phy->id = USB2PHY_PORT_OTG;
+		device_get_supply_regulator(phy->dev, "phy-supply",
+					    &rphy->vbus_supply[USB2PHY_PORT_OTG]);
 	} else {
 		pr_err("%s: invalid dev name\n", __func__);
 		return -EINVAL;
@@ -553,6 +618,8 @@ static int rk322x_usb2phy_tuning(struct rockchip_usb2phy *rphy)
 static struct phy_ops rockchip_usb2phy_ops = {
 	.init = rockchip_usb2phy_init,
 	.exit = rockchip_usb2phy_exit,
+	.power_on = rockchip_usb2phy_power_on,
+	.power_off = rockchip_usb2phy_power_off,
 	.of_xlate = rockchip_usb2phy_of_xlate,
 };
 

commit 45d1e0c8a3d82106f3c719aeef855dced2706afc
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Thu Feb 27 15:04:53 2020 +0800

    clk: rockchip: rk3399: add usb3.0 host clocks mandatory
    
    This adds clocks mandatory for the DWC3 controllers of RK3399,
    as these are enabled by default we just simply return success.
    
    Change-Id: I81006d710cb6b4608c8dfa61a4eef661415bad29
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index fa24c19c10..cc805f202d 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -1373,6 +1373,10 @@ static int rk3399_clk_enable(struct clk *clk)
 	case HCLK_HOST1:
 	case HCLK_HOST1_ARB:
 	case SCLK_USBPHY1_480M_SRC:
+	case ACLK_USB3OTG1:
+	case ACLK_USB3_GRF:
+	case SCLK_USB3OTG1_REF:
+	case SCLK_USB3OTG1_SUSPEND:
 		return 0;
 	}
 

commit 1b23c040f7cf7257da11f227fe8713d8dd30e813
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Fri Jan 17 11:34:12 2020 +0800

    board: rockchip: add dwc3 gadget support for rk3328
    
    Add DWC3 device data and gadget download support for RK3328 SoCs.
    
    Change-Id: I034e9838f0f44f24ebb9b9e372039a19e089f3be
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/board/rockchip/evb_rk3328/evb-rk3328.c b/board/rockchip/evb_rk3328/evb-rk3328.c
index c8e7a3ad64..613f73f6ad 100644
--- a/board/rockchip/evb_rk3328/evb-rk3328.c
+++ b/board/rockchip/evb_rk3328/evb-rk3328.c
@@ -1,5 +1,33 @@
+// SPDX-License-Identifier:     GPL-2.0
 /*
- * (C) Copyright 2016 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
+ * Copyright (C) 2020 Rockchip Electronics Co., Ltd
  */
+
+#include <asm/io.h>
+#include <usb.h>
+#include <dwc3-uboot.h>
+#include <linux/usb/phy-rockchip-inno-usb3.h>
+
+#if CONFIG_IS_ENABLED(USB_DWC3_GADGET)
+static struct dwc3_device dwc3_device_data = {
+	.maximum_speed = USB_SPEED_SUPER,
+	.base = 0xff600000,
+	.dr_mode = USB_DR_MODE_PERIPHERAL,
+	.index = 0,
+	.dis_u2_susphy_quirk = 1,
+	.dis_u1u2_quirk = 1,
+	.usb2_phyif_utmi_width = 16,
+};
+
+int usb_gadget_handle_interrupts(void)
+{
+	dwc3_uboot_handle_interrupt(0);
+	return 0;
+}
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+	rockchip_u3phy_uboot_init();
+	return dwc3_uboot_init(&dwc3_device_data);
+}
+#endif

commit affb42ab85d494403dd8782e78643fa4f3b83e4b
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Fri Jan 17 09:24:21 2020 +0800

    phy: rockchip: add a new driver for Rockchip USB3 PHY
    
    This implements the USB3.0 PHY driver for Rockchip platform
    with Inno IP block.
    
    Change-Id: I161915cf36fec441822f5f151f017ba8a7ecff9f
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index a5717a1e2a..6c92507add 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -65,6 +65,12 @@ config PHY_ROCKCHIP_INNO_USB2
 	help
 	  Support for Rockchip USB 2.0 PHY with Innosilicon IP block.
 
+config PHY_ROCKCHIP_INNO_USB3
+	bool "Support Rockchip INNO USB3PHY"
+	depends on PHY && ARCH_ROCKCHIP
+	help
+	  Support for Rockchip USB 3.0 PHY with Innosilicon IP block.
+
 config PIPE3_PHY
 	bool "Support omap's PIPE3 PHY"
 	depends on PHY && ARCH_OMAP2PLUS
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index 2b8f47eee4..1f33777ec4 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -8,5 +8,6 @@
 obj-$(CONFIG_$(SPL_)PHY) += phy-uclass.o
 obj-$(CONFIG_$(SPL_)NOP_PHY) += nop-phy.o
 obj-$(CONFIG_PHY_ROCKCHIP_INNO_USB2) += phy-rockchip-inno-usb2.o
+obj-$(CONFIG_PHY_ROCKCHIP_INNO_USB3) += phy-rockchip-inno-usb3.o
 obj-$(CONFIG_PHY_SANDBOX) += sandbox-phy.o
 obj-$(CONFIG_$(SPL_)PIPE3_PHY) += ti-pipe3-phy.o
diff --git a/drivers/phy/phy-rockchip-inno-usb3.c b/drivers/phy/phy-rockchip-inno-usb3.c
new file mode 100644
index 0000000000..235fbacd5d
--- /dev/null
+++ b/drivers/phy/phy-rockchip-inno-usb3.c
@@ -0,0 +1,574 @@
+// SPDX-License-Identifier:     GPL-2.0
+/*
+ * Copyright (C) 2020 Rockchip Electronics Co., Ltd
+ *
+ * Based on phy-rockchip-inno-usb3.c in Linux Kernel.
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/lists.h>
+#include <dm/of_access.h>
+#include <generic-phy.h>
+#include <power/regulator.h>
+#include <regmap.h>
+#include <reset.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+
+#define usleep_range(a, b) udelay((b))
+
+#define U3PHY_PORT_NUM	2
+#define U3PHY_MAX_CLKS	4
+#define BIT_WRITEABLE_SHIFT	16
+#define SCHEDULE_DELAY	(60 * HZ)
+
+#define U3PHY_APB_RST	BIT(0)
+#define U3PHY_POR_RST	BIT(1)
+#define U3PHY_MAC_RST	BIT(2)
+
+struct rockchip_u3phy;
+struct rockchip_u3phy_port;
+
+enum rockchip_u3phy_type {
+	U3PHY_TYPE_PIPE,
+	U3PHY_TYPE_UTMI,
+};
+
+enum rockchip_u3phy_pipe_pwr {
+	PIPE_PWR_P0	= 0,
+	PIPE_PWR_P1	= 1,
+	PIPE_PWR_P2	= 2,
+	PIPE_PWR_P3	= 3,
+	PIPE_PWR_MAX	= 4,
+};
+
+enum rockchip_u3phy_rest_req {
+	U3_POR_RSTN	= 0,
+	U2_POR_RSTN	= 1,
+	PIPE_MAC_RSTN	= 2,
+	UTMI_MAC_RSTN	= 3,
+	PIPE_APB_RSTN	= 4,
+	UTMI_APB_RSTN	= 5,
+	U3PHY_RESET_MAX	= 6,
+};
+
+enum rockchip_u3phy_utmi_state {
+	PHY_UTMI_HS_ONLINE	= 0,
+	PHY_UTMI_DISCONNECT	= 1,
+	PHY_UTMI_CONNECT	= 2,
+	PHY_UTMI_FS_LS_ONLINE	= 4,
+};
+
+/*
+ * @rvalue: reset value
+ * @dvalue: desired value
+ */
+struct u3phy_reg {
+	unsigned int	offset;
+	unsigned int	bitend;
+	unsigned int	bitstart;
+	unsigned int	rvalue;
+	unsigned int	dvalue;
+};
+
+struct rockchip_u3phy_grfcfg {
+	struct u3phy_reg	um_suspend;
+	struct u3phy_reg	ls_det_en;
+	struct u3phy_reg	ls_det_st;
+	struct u3phy_reg	um_ls;
+	struct u3phy_reg	um_hstdct;
+	struct u3phy_reg	u2_only_ctrl;
+	struct u3phy_reg	u3_disable;
+	struct u3phy_reg	pp_pwr_st;
+	struct u3phy_reg	pp_pwr_en[PIPE_PWR_MAX];
+};
+
+/**
+ * struct rockchip_u3phy_apbcfg: usb3-phy apb configuration.
+ * @u2_pre_emp: usb2-phy pre-emphasis tuning.
+ * @u2_pre_emp_sth: usb2-phy pre-emphasis strength tuning.
+ * @u2_odt_tuning: usb2-phy odt 45ohm tuning.
+ */
+struct rockchip_u3phy_apbcfg {
+	unsigned int	u2_pre_emp;
+	unsigned int	u2_pre_emp_sth;
+	unsigned int	u2_odt_tuning;
+};
+
+struct rockchip_u3phy_cfg {
+	unsigned int reg;
+	const struct rockchip_u3phy_grfcfg grfcfg;
+
+	int (*phy_tuning)(struct rockchip_u3phy *u3phy,
+			  struct rockchip_u3phy_port *u3phy_port,
+			  const struct device_node *child_np);
+};
+
+struct rockchip_u3phy_port {
+	void __iomem	*base;
+	unsigned int	index;
+	unsigned char	type;
+	bool		refclk_25m_quirk;
+	struct mutex	mutex; /* mutex for updating register */
+};
+
+struct rockchip_u3phy {
+	struct udevice *dev;
+	struct regmap *u3phy_grf;
+	struct regmap *grf;
+	struct udevice *vbus_supply;
+	struct reset_ctl rsts[U3PHY_RESET_MAX];
+	struct rockchip_u3phy_apbcfg apbcfg;
+	const struct rockchip_u3phy_cfg *cfgs;
+	struct rockchip_u3phy_port ports[U3PHY_PORT_NUM];
+};
+
+static inline int param_write(void __iomem *base,
+			      const struct u3phy_reg *reg, bool desired)
+{
+	unsigned int val, mask;
+	unsigned int tmp = desired ? reg->dvalue : reg->rvalue;
+	int ret = 0;
+
+	mask = GENMASK(reg->bitend, reg->bitstart);
+	val = (tmp << reg->bitstart) | (mask << BIT_WRITEABLE_SHIFT);
+	ret = regmap_write(base, reg->offset, val);
+
+	return ret;
+}
+
+static inline bool param_exped(void __iomem *base,
+			       const struct u3phy_reg *reg,
+			       unsigned int value)
+{
+	int ret;
+	unsigned int tmp, orig;
+	unsigned int mask = GENMASK(reg->bitend, reg->bitstart);
+
+	ret = regmap_read(base, reg->offset, &orig);
+	if (ret)
+		return false;
+
+	tmp = (orig & mask) >> reg->bitstart;
+	return tmp == value;
+}
+
+int rockchip_u3phy_uboot_init(void)
+{
+	struct udevice *udev;
+	int ret;
+
+	ret = uclass_get_device_by_name(UCLASS_PHY, "usb3-phy", &udev);
+	if (ret)
+		pr_err("%s: get usb3-phy node failed: %d\n", __func__, ret);
+
+	(void)udev;
+
+	return ret;
+}
+
+static int rockchip_u3phy_init(struct phy *phy)
+{
+	return 0;
+}
+
+static int rockchip_u3phy_exit(struct phy *phy)
+{
+	return 0;
+}
+
+static int rockchip_u3phy_power_on(struct phy *phy)
+{
+	struct udevice *parent = dev_get_parent(phy->dev);
+	struct rockchip_u3phy *u3phy = dev_get_priv(parent);
+	int ret = 0;
+
+	/* Vbus regulator */
+	if (!u3phy->vbus_supply) {
+		ret = device_get_supply_regulator(parent, "vbus-supply",
+						  &u3phy->vbus_supply);
+		if (ret == -ENOENT) {
+			pr_info("%s: Can't get VBus regulator!\n", __func__);
+			return 0;
+		}
+
+		ret = regulator_set_enable(u3phy->vbus_supply, true);
+		if (ret) {
+			pr_err("%s: Failed to set VBus supply\n", __func__);
+			return ret;
+		}
+	}
+
+	return 0;
+}
+
+static int rockchip_u3phy_power_off(struct phy *phy)
+{
+	struct udevice *parent = dev_get_parent(phy->dev);
+	struct rockchip_u3phy *u3phy = dev_get_priv(parent);
+	int ret = 0;
+
+	/* Turn off vbus regulator */
+	if (u3phy->vbus_supply) {
+		ret = regulator_set_enable(u3phy->vbus_supply, false);
+		if (ret) {
+			pr_err("%s: Failed to set VBus supply\n", __func__);
+			return ret;
+		}
+
+		u3phy->vbus_supply = NULL;
+	}
+
+	return 0;
+}
+
+static int rockchip_u3phy_bind(struct udevice *parent)
+{
+	struct udevice *dev;
+	ofnode node;
+	const char *name;
+	int ret;
+
+	dev_for_each_subnode(node, parent) {
+		if (!ofnode_valid(node)) {
+			debug("%s: %s subnode not found", __func__, parent->name);
+			return -ENXIO;
+		}
+
+		name = ofnode_get_name(node);
+		debug("%s: subnode %s\n", __func__, name);
+
+		ret = device_bind_driver_to_node(parent, "rockchip_u3phy_port",
+						 name, node, &dev);
+		if (ret) {
+			pr_err("%s: '%s' cannot bind 'rockchip_u3phy_port'\n",
+			       __func__, name);
+			return ret;
+		}
+	}
+
+	return 0;
+}
+
+static const char *get_rest_name(enum rockchip_u3phy_rest_req rst)
+{
+	switch (rst) {
+	case U2_POR_RSTN:
+		return "u3phy-u2-por";
+	case U3_POR_RSTN:
+		return "u3phy-u3-por";
+	case PIPE_MAC_RSTN:
+		return "u3phy-pipe-mac";
+	case UTMI_MAC_RSTN:
+		return "u3phy-utmi-mac";
+	case UTMI_APB_RSTN:
+		return "u3phy-utmi-apb";
+	case PIPE_APB_RSTN:
+		return "u3phy-pipe-apb";
+	default:
+		return "invalid";
+	}
+}
+
+static void rockchip_u3phy_rest_deassert(struct rockchip_u3phy *u3phy,
+					 unsigned int flag)
+{
+	int rst;
+
+	if (flag & U3PHY_APB_RST) {
+		dev_dbg(u3phy->dev, "deassert APB bus interface reset\n");
+		for (rst = PIPE_APB_RSTN; rst <= UTMI_APB_RSTN; rst++) {
+			if (u3phy->rsts[rst].dev)
+				reset_deassert(&u3phy->rsts[rst]);
+		}
+	}
+
+	if (flag & U3PHY_POR_RST) {
+		usleep_range(12, 15);
+		dev_dbg(u3phy->dev, "deassert u2 and u3 phy power on reset\n");
+		for (rst = U3_POR_RSTN; rst <= U2_POR_RSTN; rst++) {
+			if (u3phy->rsts[rst].dev)
+				reset_deassert(&u3phy->rsts[rst]);
+		}
+	}
+
+	if (flag & U3PHY_MAC_RST) {
+		usleep_range(1200, 1500);
+		dev_dbg(u3phy->dev, "deassert pipe and utmi MAC reset\n");
+		for (rst = PIPE_MAC_RSTN; rst <= UTMI_MAC_RSTN; rst++)
+			if (u3phy->rsts[rst].dev)
+				reset_deassert(&u3phy->rsts[rst]);
+	}
+}
+
+static void rockchip_u3phy_rest_assert(struct rockchip_u3phy *u3phy)
+{
+	int rst;
+
+	dev_dbg(u3phy->dev, "assert u3phy reset\n");
+	for (rst = 0; rst < U3PHY_RESET_MAX; rst++)
+		if (u3phy->rsts[rst].dev)
+			reset_assert(&u3phy->rsts[rst]);
+}
+
+static int rockchip_u3phy_parse_dt(struct rockchip_u3phy *u3phy,
+				   struct udevice *udev)
+
+{
+	int i, ret = 0;
+
+	for (i = 0; i < U3PHY_RESET_MAX; i++) {
+		ret = reset_get_by_name(udev, get_rest_name(i),
+					&u3phy->rsts[i]);
+		if (ret) {
+			dev_info(udev, "no %s reset control specified\n",
+				 get_rest_name(i));
+		}
+	}
+
+	return ret;
+}
+
+static int rockchip_u3phy_port_init(struct rockchip_u3phy *u3phy,
+				    struct rockchip_u3phy_port *u3phy_port,
+				    const struct device_node *child_np)
+{
+	int ret;
+
+	dev_dbg(u3phy->dev, "u3phy port initialize\n");
+
+	mutex_init(&u3phy_port->mutex);
+
+	u3phy_port->base = (void __iomem *)ofnode_get_addr(np_to_ofnode(child_np));
+	if (IS_ERR(u3phy_port->base)) {
+		dev_err(u3phy->dev, "failed to remap phy regs\n");
+		return PTR_ERR(u3phy_port->base);
+	}
+
+	if (!of_node_cmp(child_np->name, "pipe")) {
+		u3phy_port->type = U3PHY_TYPE_PIPE;
+		u3phy_port->refclk_25m_quirk =
+			ofnode_read_bool(np_to_ofnode(child_np),
+					 "rockchip,refclk-25m-quirk");
+	} else {
+		u3phy_port->type = U3PHY_TYPE_UTMI;
+	}
+
+	if (u3phy->cfgs->phy_tuning) {
+		dev_dbg(u3phy->dev, "do u3phy tuning\n");
+		ret = u3phy->cfgs->phy_tuning(u3phy, u3phy_port, child_np);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+static int rockchip_u3phy_probe(struct udevice *udev)
+{
+	const struct udevice_id *of_match = udev->driver->of_match;
+	struct rockchip_u3phy *u3phy = dev_get_priv(udev);
+	const struct rockchip_u3phy_cfg *phy_cfgs;
+	ofnode child_np;
+	u32 reg[2], index;
+	int ret = 0;
+
+	while (of_match->compatible) {
+		if (device_is_compatible(udev, of_match->compatible))
+			break;
+		of_match++;
+	}
+
+	if (!of_match || !of_match->data) {
+		dev_err(udev, "phy-cfgs are not assigned!\n");
+		return -EINVAL;
+	}
+
+	if (ofnode_read_u32_array(dev_ofnode(udev), "reg", reg, 2)) {
+		dev_err(udev, "could not read reg\n");
+		return -EINVAL;
+	}
+
+	u3phy->dev = udev;
+	phy_cfgs = (const struct rockchip_u3phy_cfg *)of_match->data;
+
+	/* find out a proper config which can be matched with dt. */
+	index = 0;
+	while (phy_cfgs[index].reg) {
+		if (phy_cfgs[index].reg == reg[1]) {
+			u3phy->cfgs = &phy_cfgs[index];
+			break;
+		}
+		++index;
+	}
+
+	if (!u3phy->cfgs) {
+		dev_err(udev, "no phy-cfgs can be matched\n");
+		return -EINVAL;
+	}
+
+	ret = rockchip_u3phy_parse_dt(u3phy, udev);
+	if (ret) {
+		dev_err(udev, "parse dt failed, ret(%d)\n", ret);
+		return ret;
+	}
+
+	rockchip_u3phy_rest_assert(u3phy);
+	rockchip_u3phy_rest_deassert(u3phy, U3PHY_APB_RST | U3PHY_POR_RST);
+
+	index = 0;
+	ofnode_for_each_subnode(child_np, udev->node) {
+		struct rockchip_u3phy_port *u3phy_port = &u3phy->ports[index];
+
+		u3phy_port->index = index;
+		ret = rockchip_u3phy_port_init(u3phy, u3phy_port,
+					       ofnode_to_np(child_np));
+		if (ret) {
+			dev_err(udev, "u3phy port init failed,ret(%d)\n", ret);
+			goto put_child;
+		}
+
+		/* to prevent out of boundary */
+		if (++index >= U3PHY_PORT_NUM)
+			break;
+	}
+
+	rockchip_u3phy_rest_deassert(u3phy, U3PHY_MAC_RST);
+
+	dev_info(udev, "Rockchip u3phy initialized successfully\n");
+	return 0;
+
+put_child:
+	of_node_put(ofnode_to_np(child_np));
+	return ret;
+}
+
+static int rk3328_u3phy_tuning(struct rockchip_u3phy *u3phy,
+			       struct rockchip_u3phy_port *u3phy_port,
+			       const struct device_node *child_np)
+{
+	if (u3phy_port->type == U3PHY_TYPE_UTMI) {
+		/*
+		 * For rk3328 SoC, pre-emphasis and pre-emphasis strength must
+		 * be written as one fixed value as below.
+		 *
+		 * Dissimilarly, the odt 45ohm value should be flexibly tuninged
+		 * for the different boards to adjust HS eye height, so its
+		 * value can be assigned in DT in code design.
+		 */
+
+		/* {bits[2:0]=111}: always enable pre-emphasis */
+		u3phy->apbcfg.u2_pre_emp = 0x0f;
+
+		/* {bits[5:3]=000}: pre-emphasis strength as the weakest */
+		u3phy->apbcfg.u2_pre_emp_sth = 0x41;
+
+		/* {bits[4:0]=10101}: odt 45ohm tuning */
+		u3phy->apbcfg.u2_odt_tuning = 0xb5;
+
+		/* optional override of the odt 45ohm tuning */
+		ofnode_read_u32(np_to_ofnode(child_np),
+				"rockchip,odt-val-tuning",
+				&u3phy->apbcfg.u2_odt_tuning);
+
+		writel(u3phy->apbcfg.u2_pre_emp, u3phy_port->base + 0x030);
+		writel(u3phy->apbcfg.u2_pre_emp_sth, u3phy_port->base + 0x040);
+		writel(u3phy->apbcfg.u2_odt_tuning, u3phy_port->base + 0x11c);
+	} else if (u3phy_port->type == U3PHY_TYPE_PIPE) {
+		if (u3phy_port->refclk_25m_quirk) {
+			dev_dbg(u3phy->dev, "switch to 25m refclk\n");
+			/* ref clk switch to 25M */
+			writel(0x64, u3phy_port->base + 0x11c);
+			writel(0x64, u3phy_port->base + 0x028);
+			writel(0x01, u3phy_port->base + 0x020);
+			writel(0x21, u3phy_port->base + 0x030);
+			writel(0x06, u3phy_port->base + 0x108);
+			writel(0x00, u3phy_port->base + 0x118);
+		} else {
+			/* configure for 24M ref clk */
+			writel(0x80, u3phy_port->base + 0x10c);
+			writel(0x01, u3phy_port->base + 0x118);
+			writel(0x38, u3phy_port->base + 0x11c);
+			writel(0x83, u3phy_port->base + 0x020);
+			writel(0x02, u3phy_port->base + 0x108);
+		}
+
+		/* Enable SSC */
+		udelay(3);
+		writel(0x08, u3phy_port->base + 0x000);
+		writel(0x0c, u3phy_port->base + 0x120);
+
+		/* Tuning Rx for compliance RJTL test */
+		writel(0x70, u3phy_port->base + 0x150);
+		writel(0x12, u3phy_port->base + 0x0c8);
+		writel(0x05, u3phy_port->base + 0x148);
+		writel(0x08, u3phy_port->base + 0x068);
+		writel(0xf0, u3phy_port->base + 0x1c4);
+		writel(0xff, u3phy_port->base + 0x070);
+		writel(0x0f, u3phy_port->base + 0x06c);
+		writel(0xe0, u3phy_port->base + 0x060);
+
+		/*
+		 * Tuning Tx to increase the bias current
+		 * used in TX driver and RX EQ, it can
+		 * also increase the voltage of LFPS.
+		 */
+		writel(0x08, u3phy_port->base + 0x180);
+	} else {
+		dev_err(u3phy->dev, "invalid u3phy port type\n");
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static struct phy_ops rockchip_u3phy_ops = {
+	.init = rockchip_u3phy_init,
+	.exit = rockchip_u3phy_exit,
+	.power_on= rockchip_u3phy_power_on,
+	.power_off= rockchip_u3phy_power_off,
+};
+
+static const struct rockchip_u3phy_cfg rk3328_u3phy_cfgs[] = {
+	{
+		.reg		= 0xff470000,
+		.grfcfg		= {
+			.um_suspend	= { 0x0004, 15, 0, 0x1452, 0x15d1 },
+			.u2_only_ctrl	= { 0x0020, 15, 15, 0, 1 },
+			.um_ls		= { 0x0030, 5, 4, 0, 1 },
+			.um_hstdct	= { 0x0030, 7, 7, 0, 1 },
+			.ls_det_en	= { 0x0040, 0, 0, 0, 1 },
+			.ls_det_st	= { 0x0044, 0, 0, 0, 1 },
+			.pp_pwr_st	= { 0x0034, 14, 13, 0, 0},
+			.pp_pwr_en	= { {0x0020, 14, 0, 0x0014, 0x0005},
+					    {0x0020, 14, 0, 0x0014, 0x000d},
+					    {0x0020, 14, 0, 0x0014, 0x0015},
+					    {0x0020, 14, 0, 0x0014, 0x001d} },
+			.u3_disable	= { 0x04c4, 15, 0, 0x1100, 0x101},
+		},
+		.phy_tuning	= rk3328_u3phy_tuning,
+	},
+	{ /* sentinel */ }
+};
+
+static const struct udevice_id rockchip_u3phy_dt_match[] = {
+	{ .compatible = "rockchip,rk3328-u3phy", .data = (ulong)&rk3328_u3phy_cfgs },
+	{}
+};
+
+U_BOOT_DRIVER(rockchip_u3phy_port) = {
+	.name		= "rockchip_u3phy_port",
+	.id		= UCLASS_PHY,
+	.ops		= &rockchip_u3phy_ops,
+};
+
+U_BOOT_DRIVER(rockchip_u3phy) = {
+	.name		= "rockchip_u3phy",
+	.id		= UCLASS_PHY,
+	.of_match	= rockchip_u3phy_dt_match,
+	.probe		= rockchip_u3phy_probe,
+	.bind		= rockchip_u3phy_bind,
+	.priv_auto_alloc_size = sizeof(struct rockchip_u3phy),
+};
diff --git a/include/linux/usb/phy-rockchip-inno-usb3.h b/include/linux/usb/phy-rockchip-inno-usb3.h
new file mode 100644
index 0000000000..7925857ccc
--- /dev/null
+++ b/include/linux/usb/phy-rockchip-inno-usb3.h
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier:     GPL-2.0 */
+/*
+ * Copyright (C) 2020 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _PHY_ROCKCHIP_INNO_USB3_H
+#define _PHY_ROCKCHIP_INNO_USB3_H
+
+#if CONFIG_IS_ENABLED(PHY_ROCKCHIP_INNO_USB3)
+int rockchip_u3phy_uboot_init(void);
+#else
+static inline int rockchip_u3phy_uboot_init(void)
+{
+	return -ENOTSUPP;
+}
+#endif
+
+#endif /* _PHY_ROCKCHIP_INNO_USB3_H */

commit ef78966da57499059fc56eed5755291ec38c2a87
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Mar 4 08:59:50 2020 +0800

    FROMLIST: usb: Migrate to support live DT for some driver
    
    Use ofnode_ instead of fdt_ APIs so that the drivers can support live DT.
    This patch updates usb_get_dr_mode() and usb_get_maximum_speed() to use
    ofnode as parameter instead of fdt offset. And all the drivers who use
    these APIs update to use live dt APIs at the same time.
    
    Change-Id: I41a3fa52e8fdb99f7fc36b1bc0eb21ae82f90e63
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (am from http://patchwork.ozlabs.org/patch/1248682/)

diff --git a/drivers/usb/cdns3/core.c b/drivers/usb/cdns3/core.c
index 8c8e02169e..136b276feb 100644
--- a/drivers/usb/cdns3/core.c
+++ b/drivers/usb/cdns3/core.c
@@ -106,7 +106,7 @@ static int cdns3_core_init_role(struct cdns3 *cdns)
 	enum usb_dr_mode dr_mode;
 	int ret = 0;
 
-	dr_mode = usb_get_dr_mode(dev_of_offset(dev));
+	dr_mode = usb_get_dr_mode(dev->node);
 	cdns->role = USB_ROLE_NONE;
 
 	/*
@@ -382,22 +382,20 @@ static const struct udevice_id cdns3_ids[] = {
 
 int cdns3_bind(struct udevice *parent)
 {
-	int from = dev_of_offset(parent);
-	const void *fdt = gd->fdt_blob;
 	enum usb_dr_mode dr_mode;
 	struct udevice *dev;
 	const char *driver;
 	const char *name;
-	int node;
+	ofnode node;
 	int ret;
 
-	node = fdt_node_offset_by_compatible(fdt, from, "cdns,usb3");
-	if (node < 0) {
+	node = ofnode_by_compatible(parent->node, "cdns,usb3");
+	if (!ofnode_valid(node)) {
 		ret = -ENODEV;
 		goto fail;
 	}
 
-	name = fdt_get_name(fdt, node, NULL);
+	name = ofnode_get_name(node);
 	dr_mode = usb_get_dr_mode(node);
 
 	switch (dr_mode) {
@@ -420,8 +418,7 @@ int cdns3_bind(struct udevice *parent)
 		goto fail;
 	};
 
-	ret = device_bind_driver_to_node(parent, driver, name,
-					 offset_to_ofnode(node), &dev);
+	ret = device_bind_driver_to_node(parent, driver, name, node, &dev);
 	if (ret) {
 		printf("%s: not able to bind usb device mode\n",
 		       __func__);
diff --git a/drivers/usb/cdns3/gadget.c b/drivers/usb/cdns3/gadget.c
index 0e02b77965..2a8838c4cb 100644
--- a/drivers/usb/cdns3/gadget.c
+++ b/drivers/usb/cdns3/gadget.c
@@ -2576,7 +2576,7 @@ static int cdns3_gadget_start(struct cdns3 *cdns)
 	if (!priv_dev->onchip_buffers)
 		priv_dev->onchip_buffers = 256;
 
-	max_speed = usb_get_maximum_speed(dev_of_offset(cdns->dev));
+	max_speed = usb_get_maximum_speed(dev_ofnode(cdns->dev));
 
 	/* Check the maximum_speed parameter */
 	switch (max_speed) {
diff --git a/drivers/usb/common/common.c b/drivers/usb/common/common.c
index 802e4b95de..467cc01f6f 100644
--- a/drivers/usb/common/common.c
+++ b/drivers/usb/common/common.c
@@ -8,7 +8,7 @@
  */
 
 #include <common.h>
-#include <linux/libfdt.h>
+#include <dm.h>
 #include <linux/usb/otg.h>
 #include <linux/usb/ch9.h>
 #include <linux/usb/phy.h>
@@ -22,13 +22,12 @@ static const char *const usb_dr_modes[] = {
 	[USB_DR_MODE_OTG]		= "otg",
 };
 
-enum usb_dr_mode usb_get_dr_mode(int node)
+enum usb_dr_mode usb_get_dr_mode(ofnode node)
 {
-	const void *fdt = gd->fdt_blob;
 	const char *dr_mode;
 	int i;
 
-	dr_mode = fdt_getprop(fdt, node, "dr_mode", NULL);
+	dr_mode = ofnode_read_string(node, "dr_mode");
 	if (!dr_mode) {
 		pr_err("usb dr_mode not found\n");
 		return USB_DR_MODE_UNKNOWN;
@@ -50,13 +49,12 @@ static const char *const speed_names[] = {
 	[USB_SPEED_SUPER] = "super-speed",
 };
 
-enum usb_device_speed usb_get_maximum_speed(int node)
+enum usb_device_speed usb_get_maximum_speed(ofnode node)
 {
-	const void *fdt = gd->fdt_blob;
 	const char *max_speed;
 	int i;
 
-	max_speed = fdt_getprop(fdt, node, "maximum-speed", NULL);
+	max_speed = ofnode_read_string(node, "maximum-speed");
 	if (!max_speed) {
 		pr_err("usb maximum-speed not found\n");
 		return USB_SPEED_UNKNOWN;
diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c
index 12dbcfde29..e300cc0496 100644
--- a/drivers/usb/dwc3/dwc3-generic.c
+++ b/drivers/usb/dwc3/dwc3-generic.c
@@ -87,9 +87,9 @@ static int dwc3_generic_remove(struct udevice *dev,
 static int dwc3_generic_ofdata_to_platdata(struct udevice *dev)
 {
 	struct dwc3_generic_plat *plat = dev_get_platdata(dev);
-	int node = dev_of_offset(dev);
+	ofnode node = dev->node;
 
-	plat->base = devfdt_get_addr(dev);
+	plat->base = dev_read_addr(dev);
 
 	plat->maximum_speed = usb_get_maximum_speed(node);
 	if (plat->maximum_speed == USB_SPEED_UNKNOWN) {
@@ -283,13 +283,11 @@ struct dwc3_glue_ops ti_ops = {
 
 static int dwc3_glue_bind(struct udevice *parent)
 {
-	const void *fdt = gd->fdt_blob;
-	int node;
+	ofnode node;
 	int ret;
 
-	for (node = fdt_first_subnode(fdt, dev_of_offset(parent)); node > 0;
-	     node = fdt_next_subnode(fdt, node)) {
-		const char *name = fdt_get_name(fdt, node, NULL);
+	ofnode_for_each_subnode(node, parent->node) {
+		const char *name = ofnode_get_name(node);
 		enum usb_dr_mode dr_mode;
 		struct udevice *dev;
 		const char *driver = NULL;
@@ -321,7 +319,7 @@ static int dwc3_glue_bind(struct udevice *parent)
 			continue;
 
 		ret = device_bind_driver_to_node(parent, driver, name,
-						 offset_to_ofnode(node), &dev);
+						 node, &dev);
 		if (ret) {
 			debug("%s: not able to bind usb device mode\n",
 			      __func__);
@@ -399,7 +397,7 @@ static int dwc3_glue_probe(struct udevice *dev)
 	while (child) {
 		enum usb_dr_mode dr_mode;
 
-		dr_mode = usb_get_dr_mode(dev_of_offset(child));
+		dr_mode = usb_get_dr_mode(child->node);
 		device_find_next_child(&child);
 		if (ops && ops->select_dr_mode)
 			ops->select_dr_mode(dev, index, dr_mode);
diff --git a/drivers/usb/dwc3/dwc3-meson-g12a.c b/drivers/usb/dwc3/dwc3-meson-g12a.c
index 832bcd70ff..d4453f8784 100644
--- a/drivers/usb/dwc3/dwc3-meson-g12a.c
+++ b/drivers/usb/dwc3/dwc3-meson-g12a.c
@@ -393,7 +393,7 @@ static int dwc3_meson_g12a_probe(struct udevice *dev)
 	}
 #endif
 
-	priv->otg_mode = usb_get_dr_mode(dev_of_offset(dev));
+	priv->otg_mode = usb_get_dr_mode(dev->node);
 
 	ret = dwc3_meson_g12a_usb_init(priv);
 	if (ret)
diff --git a/drivers/usb/gadget/dwc2_udc_otg.c b/drivers/usb/gadget/dwc2_udc_otg.c
index 363e0bc65b..076bd2c08e 100644
--- a/drivers/usb/gadget/dwc2_udc_otg.c
+++ b/drivers/usb/gadget/dwc2_udc_otg.c
@@ -1038,13 +1038,12 @@ void dwc2_phy_shutdown(struct udevice *dev, struct phy *usb_phys, int num_phys)
 static int dwc2_udc_otg_ofdata_to_platdata(struct udevice *dev)
 {
 	struct dwc2_plat_otg_data *platdata = dev_get_platdata(dev);
-	int node = dev_of_offset(dev);
 	ulong drvdata;
 	void (*set_params)(struct dwc2_plat_otg_data *data);
 	int ret;
 
-	if (usb_get_dr_mode(node) != USB_DR_MODE_PERIPHERAL &&
-	    usb_get_dr_mode(node) != USB_DR_MODE_OTG) {
+	if (usb_get_dr_mode(dev->node) != USB_DR_MODE_PERIPHERAL &&
+	    usb_get_dr_mode(dev->node) != USB_DR_MODE_OTG) {
 		dev_dbg(dev, "Invalid mode\n");
 		return -ENODEV;
 	}
diff --git a/drivers/usb/host/dwc3-sti-glue.c b/drivers/usb/host/dwc3-sti-glue.c
index ce9335e476..66e543d57c 100644
--- a/drivers/usb/host/dwc3-sti-glue.c
+++ b/drivers/usb/host/dwc3-sti-glue.c
@@ -11,8 +11,6 @@
 #include <asm/io.h>
 #include <dm.h>
 #include <errno.h>
-#include <fdtdec.h>
-#include <linux/libfdt.h>
 #include <dm/lists.h>
 #include <regmap.h>
 #include <reset-uclass.h>
@@ -110,8 +108,7 @@ static int sti_dwc3_glue_ofdata_to_platdata(struct udevice *dev)
 	int ret;
 	u32 reg[4];
 
-	ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(dev),
-				   "reg", reg, ARRAY_SIZE(reg));
+	ret = ofnode_read_u32_array(dev->node, "reg", reg, ARRAY_SIZE(reg));
 	if (ret) {
 		pr_err("unable to find st,stih407-dwc3 reg property(%d)\n", ret);
 		return ret;
@@ -154,18 +151,15 @@ static int sti_dwc3_glue_ofdata_to_platdata(struct udevice *dev)
 static int sti_dwc3_glue_bind(struct udevice *dev)
 {
 	struct sti_dwc3_glue_platdata *plat = dev_get_platdata(dev);
-	int dwc3_node;
+	ofnode node, dwc3_node;
 
-	/* check if one subnode is present */
-	dwc3_node = fdt_first_subnode(gd->fdt_blob, dev_of_offset(dev));
-	if (dwc3_node <= 0) {
-		pr_err("Can't find subnode for %s\n", dev->name);
-		return -ENODEV;
+	/* Find snps,dwc3 node from subnode */
+	ofnode_for_each_subnode(node, dev->node) {
+		if (ofnode_device_is_compatible(node, "snps,dwc3"))
+			dwc3_node = node;
 	}
 
-	/* check if the subnode compatible string is the dwc3 one*/
-	if (fdt_node_check_compatible(gd->fdt_blob, dwc3_node,
-				      "snps,dwc3") != 0) {
+	if (!ofnode_valid(node)) {
 		pr_err("Can't find dwc3 subnode for %s\n", dev->name);
 		return -ENODEV;
 	}
diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c
index 5dde795a20..81197f8b18 100644
--- a/drivers/usb/host/ehci-mx6.c
+++ b/drivers/usb/host/ehci-mx6.c
@@ -514,7 +514,7 @@ static int ehci_usb_ofdata_to_platdata(struct udevice *dev)
 	struct usb_platdata *plat = dev_get_platdata(dev);
 	enum usb_dr_mode dr_mode;
 
-	dr_mode = usb_get_dr_mode(dev_of_offset(dev));
+	dr_mode = usb_get_dr_mode(dev->node);
 
 	switch (dr_mode) {
 	case USB_DR_MODE_HOST:
diff --git a/drivers/usb/host/xhci-dwc3.c b/drivers/usb/host/xhci-dwc3.c
index 3085f99ebc..91eaa687e1 100644
--- a/drivers/usb/host/xhci-dwc3.c
+++ b/drivers/usb/host/xhci-dwc3.c
@@ -10,7 +10,6 @@
 
 #include <common.h>
 #include <dm.h>
-#include <fdtdec.h>
 #include <generic-phy.h>
 #include <usb.h>
 #include <dwc3-uboot.h>
@@ -158,7 +157,7 @@ static int xhci_dwc3_probe(struct udevice *dev)
 
 	writel(reg, &dwc3_reg->g_usb2phycfg[0]);
 
-	dr_mode = usb_get_dr_mode(dev_of_offset(dev));
+	dr_mode = usb_get_dr_mode(dev->node);
 	if (dr_mode == USB_DR_MODE_UNKNOWN)
 		/* by default set dual role mode to HOST */
 		dr_mode = USB_DR_MODE_HOST;
diff --git a/drivers/usb/musb-new/ti-musb.c b/drivers/usb/musb-new/ti-musb.c
index b332fac887..e0077ea523 100644
--- a/drivers/usb/musb-new/ti-musb.c
+++ b/drivers/usb/musb-new/ti-musb.c
@@ -205,14 +205,12 @@ U_BOOT_DRIVER(ti_musb_host) = {
 
 static int ti_musb_wrapper_bind(struct udevice *parent)
 {
-	const void *fdt = gd->fdt_blob;
-	int node;
+	ofnode node;
 	int ret;
 
-	for (node = fdt_first_subnode(fdt, dev_of_offset(parent)); node > 0;
-	     node = fdt_next_subnode(fdt, node)) {
+	ofnode_for_each_subnode(node, parent->node) {
 		struct udevice *dev;
-		const char *name = fdt_get_name(fdt, node, NULL);
+		const char *name = ofnode_get_name(node);
 		enum usb_dr_mode dr_mode;
 		struct driver *drv;
 
@@ -226,8 +224,11 @@ static int ti_musb_wrapper_bind(struct udevice *parent)
 			break;
 		case USB_DR_MODE_HOST:
 			/* Bind MUSB host */
-			ret = device_bind_driver_to_node(parent, "ti-musb-host",
-					name, offset_to_ofnode(node), &dev);
+			ret = device_bind_driver_to_node(parent,
+							 "ti-musb-host",
+							 name,
+							 node,
+							 &dev);
 			if (ret) {
 				pr_err("musb - not able to bind usb host node\n");
 				return ret;
diff --git a/include/linux/usb/otg.h b/include/linux/usb/otg.h
index b61ef19b22..333900b804 100644
--- a/include/linux/usb/otg.h
+++ b/include/linux/usb/otg.h
@@ -10,6 +10,8 @@
 #ifndef __LINUX_USB_OTG_H
 #define __LINUX_USB_OTG_H
 
+#include <dm/ofnode.h>
+
 enum usb_dr_mode {
 	USB_DR_MODE_UNKNOWN,
 	USB_DR_MODE_HOST,
@@ -19,20 +21,20 @@ enum usb_dr_mode {
 
 /**
  * usb_get_dr_mode() - Get dual role mode for given device
- * @node: Node offset to the given device
+ * @node: ofnode of the given device
  *
  * The function gets phy interface string from property 'dr_mode',
  * and returns the correspondig enum usb_dr_mode
  */
-enum usb_dr_mode usb_get_dr_mode(int node);
+enum usb_dr_mode usb_get_dr_mode(ofnode node);
 
 /**
  * usb_get_maximum_speed() - Get maximum speed for given device
- * @node: Node offset to the given device
+ * @node: ofnode of the given device
  *
  * The function gets phy interface string from property 'maximum-speed',
  * and returns the correspondig enum usb_device_speed
  */
-enum usb_device_speed usb_get_maximum_speed(int node);
+enum usb_device_speed usb_get_maximum_speed(ofnode node);
 
 #endif /* __LINUX_USB_OTG_H */

commit d4f9534982bf56b35a3bb389d8d11866c31ef420
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Mar 4 08:59:49 2020 +0800

    FROMLIST: usb: ehci-msm: Use dev interface to get device address
    
    Use dev_read_addr_ptr() instead of devfdt_get_addr() so that we can support
    live DT.
    
    Change-Id: I373931c2bfbe4ad4422ee974560e690c775d670d
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (am from http://patchwork.ozlabs.org/patch/1248684/)

diff --git a/drivers/usb/host/ehci-msm.c b/drivers/usb/host/ehci-msm.c
index 957096a192..44cd11cc81 100644
--- a/drivers/usb/host/ehci-msm.c
+++ b/drivers/usb/host/ehci-msm.c
@@ -11,8 +11,6 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
-#include <fdtdec.h>
-#include <linux/libfdt.h>
 #include <usb.h>
 #include <usb/ehci-ci.h>
 #include <usb/ulpi.h>
@@ -146,7 +144,7 @@ static int ehci_usb_ofdata_to_platdata(struct udevice *dev)
 	struct msm_ehci_priv *priv = dev_get_priv(dev);
 
 	priv->ulpi_vp.port_num = 0;
-	priv->ehci = (void *)devfdt_get_addr(dev);
+	priv->ehci = dev_read_addr_ptr(dev);
 
 	if (priv->ehci == (void *)FDT_ADDR_T_NONE)
 		return -EINVAL;

commit b5f6b28fa3454b1189d8fefe01a26dd09f2e3f1e
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Mar 4 08:59:48 2020 +0800

    FROMLIST: usb: dwc3-of-simple: Drop redundant inclding header file
    
    The fdtdec.h is no use in this file, remove the include code.
    
    Change-Id: I6e4e9dddae68ba4466eba7a22e8362840f048910
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (am from http://patchwork.ozlabs.org/patch/1248681/)

diff --git a/drivers/usb/host/dwc3-of-simple.c b/drivers/usb/host/dwc3-of-simple.c
index 440dd1027d..c7c043b077 100644
--- a/drivers/usb/host/dwc3-of-simple.c
+++ b/drivers/usb/host/dwc3-of-simple.c
@@ -13,7 +13,6 @@
 
 #include <common.h>
 #include <dm.h>
-#include <fdtdec.h>
 #include <reset.h>
 #include <clk.h>
 

commit 6177e32d3d4c09f1cd997a8cf6edf0acbb090765
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Apr 8 11:42:21 2020 +0800

    spl: rkfw: support decompress kernel and ramdisk
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I172b75ed0587726f5d465dcbb20bf9aa7e65e1e4

diff --git a/common/spl/spl_rkfw.c b/common/spl/spl_rkfw.c
index f6a81d6aaf..e7fbe662ef 100644
--- a/common/spl/spl_rkfw.c
+++ b/common/spl/spl_rkfw.c
@@ -7,6 +7,7 @@
 #include <android_image.h>
 #include <errno.h>
 #include <malloc.h>
+#include <misc_decompress.h>
 #include <spl.h>
 #include <spl_rkfw.h>
 #include <linux/kernel.h>
@@ -330,21 +331,67 @@ static int rkfw_load_kernel(struct spl_load_info *info, u32 image_sector,
 	cnt = ALIGN(hdr->kernel_size, hdr->page_size) >> 9;
 
 	/* Load kernel image */
+#ifdef CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS
+	ret = info->read(info, image_sector, cnt,
+			 (void *)CONFIG_SPL_KERNEL_COMPRESS_ADDR);
+#else
 	ret = info->read(info, image_sector, cnt, (void *)CONFIG_SPL_KERNEL_ADDR);
+#endif
 	if (ret != cnt) {
 		ret = -EIO;
 		goto out;
 	}
+#ifdef CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS
+	struct udevice *dev;
+	u32 cap = GZIP_MOD;
+
+	dev = misc_decompress_get_device(cap);
+
+	if (!dev)
+		goto out;
+
+	ret = misc_decompress_start(dev, CONFIG_SPL_KERNEL_COMPRESS_ADDR,
+				    CONFIG_SPL_KERNEL_ADDR, hdr->kernel_size);
+	if (ret)
+		goto out;
+
+#endif
 
 	/* Load ramdisk image */
 	if (hdr->ramdisk_size) {
+#ifdef CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS
+		ret = info->read(info, (ramdisk_sector >> 9) + image_sector,
+				 ALIGN(hdr->ramdisk_size, hdr->page_size) >> 9,
+				 (void *)CONFIG_SPL_RAMDISK_COMPRESS_ADDR);
+#else
 		ret = info->read(info, (ramdisk_sector >> 9) + image_sector,
 				 ALIGN(hdr->ramdisk_size, hdr->page_size) >> 9,
 				 (void *)CONFIG_SPL_RAMDISK_ADDR);
+#endif
 		if (ret != (ALIGN(hdr->ramdisk_size, hdr->page_size) >> 9)) {
 			ret = -EIO;
 			goto out;
 		}
+#ifdef CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS
+		int timeout = 10000;
+
+		while (misc_decompress_is_complete(dev)) {
+			if (timeout < 0) {
+				ret = -EIO;
+				goto out;
+			}
+
+			timeout--;
+			udelay(10);
+		}
+
+		ret = misc_decompress_start(dev,
+					    CONFIG_SPL_RAMDISK_COMPRESS_ADDR,
+					    CONFIG_SPL_RAMDISK_ADDR,
+					    hdr->kernel_size);
+		if (ret)
+			goto out;
+#endif
 	}
 
 	/* Load resource, and checkout the dtb */

commit fcf012f8b35b79004be5b4a94c3dfcffa754049a
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Apr 8 11:21:55 2020 +0800

    spl: Kconfig: add config SPL_KERNEL_COMPRESS_ADDR & SPL_RAMDISK_COMPRESS_ADDR
    
    Load compressed kernel and ramdisk firmwares in these addresses.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Icca49069fcaa08c19f5ef574d9ec4f803dbba6d1

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index f34ee7d190..317d81d33a 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -835,6 +835,13 @@ config SPL_KERNEL_ADDR
 	  Define the kernel address where load kernel image to.
 	  This is used to boot kernel in spl.
 
+config SPL_KERNEL_COMPRESS_ADDR
+	hex "The compressed kernel in spl"
+	depends on SPL && SPL_ROCKCHIP_HW_DECOMPRESS
+	help
+	  Load compressed kernel in this address, then call the
+	  decompress process to decompress the firmware.
+
 config SPL_FDT_ADDR
 	hex "Device tree blob load address in spl"
 	depends on SPL
@@ -851,6 +858,13 @@ config SPL_RAMDISK_ADDR
 	  Define the ramdisk address where load ramdisk image to.
 	  This is used to boot kernel in spl.
 
+config SPL_RAMDISK_COMPRESS_ADDR
+	hex "The compressed ramdisk in spl"
+	depends on SPL && SPL_ROCKCHIP_HW_DECOMPRESS
+	help
+	  Load compressed ramdisk in this address, then call the
+	  decompress process to decompress the firmware.
+
 config SPL_KERNEL_BOOT
 	bool "Enable boot kernel in SPL"
 	depends on SPL

commit cc05bcfa9647acc2c5814e03eb72c8c2cc98d462
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Apr 10 17:24:46 2020 +0800

    misc: decompress: realize decompress interface layer function
    
    Realize decompress start & stop & is_complete functions for application layer
    calling.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I996861e51706a9ecf97e3db53cf5fce097d9b547

diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 67fd9a9541..be4088867e 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -55,3 +55,4 @@ obj-$(CONFIG_ROCKCHIP_EFUSE) += rockchip-efuse.o
 obj-$(CONFIG_ROCKCHIP_OTP) += rockchip-otp.o
 obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_SECURE_OTP) += rockchip-secure-otp.o
 obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_HW_DECOMPRESS) += rockchip_decompress.o
+obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_HW_DECOMPRESS) += misc_decompress.o
diff --git a/drivers/misc/misc_decompress.c b/drivers/misc/misc_decompress.c
new file mode 100644
index 0000000000..1cfcf248e0
--- /dev/null
+++ b/drivers/misc/misc_decompress.c
@@ -0,0 +1,99 @@
+// SPDX-License-Identifier:     GPL-2.0+
+/*
+ * Copyright (C) 2020 Rockchip Electronics Co., Ltd
+ */
+#include <common.h>
+#include <dm.h>
+#include <dm/uclass.h>
+#include <misc.h>
+#include <misc_decompress.h>
+
+#define HEAD_CRC		2
+#define EXTRA_FIELD		4
+#define ORIG_NAME		8
+#define COMMENT			0x10
+#define RESERVED		0xe0
+#define DEFLATED		8
+
+static int misc_gzip_parse_header(const unsigned char *src, unsigned long len)
+{
+	int i, flags;
+
+	/* skip header */
+	i = 10;
+	flags = src[3];
+	if (src[2] != DEFLATED || (flags & RESERVED) != 0) {
+		debug("Error: Bad gzipped data\n");
+		return (-1);
+	}
+	if ((flags & EXTRA_FIELD) != 0)
+		i = 12 + src[10] + (src[11] << 8);
+	if ((flags & ORIG_NAME) != 0)
+		while (src[i++] != 0)
+			;
+	if ((flags & COMMENT) != 0)
+		while (src[i++] != 0)
+			;
+	if ((flags & HEAD_CRC) != 0)
+		i += 2;
+	if (i >= len) {
+		puts("Error: gunzip out of data in header\n");
+		return (-1);
+	}
+	return i;
+}
+
+struct udevice *misc_decompress_get_device(u32 capability)
+{
+	const struct misc_ops *ops;
+	struct udevice *dev;
+	struct uclass *uc;
+	int ret;
+	u32 cap;
+
+	ret = uclass_get(UCLASS_MISC, &uc);
+	if (ret)
+		return NULL;
+
+	for (uclass_first_device(UCLASS_MISC, &dev);
+	     dev;
+	     uclass_next_device(&dev)) {
+		ops = device_get_ops(dev);
+		if (!ops || !ops->ioctl)
+			continue;
+
+		cap = ops->ioctl(dev, IOCTL_REQ_CAPABILITY, NULL);
+		if ((cap & capability) == capability)
+			return dev;
+	}
+
+	return NULL;
+}
+
+int misc_decompress_start(struct udevice *dev, unsigned long src,
+			  unsigned long dst, unsigned long size)
+{
+	struct decom_param param;
+
+	param.addr_dst = dst;
+	param.addr_src = src;
+	param.size = size;
+	if (misc_gzip_parse_header((unsigned char *)src, 0xffff) > 0) {
+		param.mode = GZIP_MOD;
+	} else {
+		printf("Unsupported decompression format.\n");
+		return -EPERM;
+	}
+
+	return misc_ioctl(dev, IOCTL_REQ_START, &param);
+}
+
+int misc_decompress_stop(struct udevice *dev)
+{
+	return misc_ioctl(dev, IOCTL_REQ_STOP, NULL);
+}
+
+int misc_decompress_is_complete(struct udevice *dev)
+{
+	return misc_ioctl(dev, IOCTL_REQ_POLL, NULL);
+}
diff --git a/drivers/misc/rockchip_decompress.c b/drivers/misc/rockchip_decompress.c
index 109012abc5..bf01cd733c 100644
--- a/drivers/misc/rockchip_decompress.c
+++ b/drivers/misc/rockchip_decompress.c
@@ -7,6 +7,7 @@
 #include <dm.h>
 #include <linux/bitops.h>
 #include <misc.h>
+#include <misc_decompress.h>
 #include <irq-generic.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -75,19 +76,6 @@ DECLARE_GLOBAL_DATA_PTR;
 	DISEIEN | LENEIEN | LITEIEN | SQMEIEN | SLCIEN | \
 	HDEIEN | DSIEN)
 
-enum decom_mod {
-	LZ4_MOD,
-	GZIP_MOD,
-	ZLIB_MOD,
-};
-
-struct rockchip_decom_param {
-	unsigned long addr_src;
-	unsigned long addr_dst;
-	unsigned long size;
-	enum decom_mod mode;
-};
-
 struct rockchip_decom_priv {
 	void __iomem *base;
 	bool done;
@@ -96,7 +84,7 @@ struct rockchip_decom_priv {
 static int rockchip_decom_start(struct udevice *dev, void *buf)
 {
 	struct rockchip_decom_priv *priv = dev_get_priv(dev);
-	struct rockchip_decom_param *param = (struct rockchip_decom_param *)buf;
+	struct decom_param *param = (struct decom_param *)buf;
 
 	priv->done = false;
 
@@ -151,7 +139,12 @@ static int rockchip_decom_done_poll(struct udevice *dev)
 	return -EINVAL;
 }
 
-/* Caller must fill in param @buf which represent struct rockchip_decom_param */
+static int rockchip_decom_ability(void)
+{
+	return GZIP_MOD;
+}
+
+/* Caller must fill in param @buf which represent struct decom_param */
 static int rockchip_decom_ioctl(struct udevice *dev, unsigned long request,
 				void *buf)
 {
@@ -167,6 +160,8 @@ static int rockchip_decom_ioctl(struct udevice *dev, unsigned long request,
 	case IOCTL_REQ_STOP:
 		ret = rockchip_decom_stop(dev);
 		break;
+	case IOCTL_REQ_CAPABILITY:
+		ret = rockchip_decom_ability();
 	}
 
 	return ret;
diff --git a/include/misc_decompress.h b/include/misc_decompress.h
new file mode 100644
index 0000000000..dd89da1744
--- /dev/null
+++ b/include/misc_decompress.h
@@ -0,0 +1,28 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2020 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _MISC_DECOMPRESS_H_
+#define _MISC_DECOMPRESS_H_
+
+enum decom_mod {
+	LZ4_MOD,
+	GZIP_MOD,
+	ZLIB_MOD,
+};
+
+struct decom_param {
+	unsigned long addr_src;
+	unsigned long addr_dst;
+	unsigned long size;
+	enum decom_mod mode;
+};
+
+struct udevice *misc_decompress_get_device(u32 capability);
+int misc_decompress_start(struct udevice *dev, unsigned long src,
+			  unsigned long dst, unsigned long size);
+int misc_decompress_stop(struct udevice *dev);
+int misc_decompress_is_complete(struct udevice *dev);
+
+#endif

commit 74dce6fe8242dd765bea17099135c978a40ec5a2
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Apr 10 17:22:15 2020 +0800

    misc: add IOCTL_REQ_CAPABILITY
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I1d1c6a93fd686d1a13450316b1edc09ce19b6dcf

diff --git a/include/misc.h b/include/misc.h
index 3b25b95378..64468bf356 100644
--- a/include/misc.h
+++ b/include/misc.h
@@ -15,6 +15,7 @@
 #define IOCTL_REQ_START		_IO('m', 0x01)
 #define IOCTL_REQ_STOP		_IO('m', 0x02)
 #define IOCTL_REQ_POLL		_IO('m', 0x03)
+#define IOCTL_REQ_CAPABILITY	_IO('m', 0x04)
 
 /*
  * Read the device to buffer, optional.

commit c1bad47f310e8958131c2a3a73471a4496692526
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Tue Apr 14 20:11:49 2020 +0800

    clk: rockchip: rv1126: Change APLL rate to 1008MHz
    
    APLL from 600MHz to 1008MHz, increase cpu frequency.
    
    Change-Id: If24475ff07f99c639a208cbfa23395544da4b6e8
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rv1126.h b/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
index a5f8440234..ee8ccaeefe 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
@@ -13,7 +13,7 @@
 #define KHz		1000
 #define OSC_HZ		(24 * MHz)
 
-#define APLL_HZ		(600 * MHz)
+#define APLL_HZ		(1008 * MHz)
 #define GPLL_HZ		(1188 * MHz)
 #define CPLL_HZ		(500 * MHz)
 #define HPLL_HZ		(1400 * MHz)

commit 61481586b427bb06c2a3475c007b801b264d95d4
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Apr 14 21:05:43 2020 +0800

    make.sh: support pack mcu.bin
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I0f7967e9bc969d9fe2452f070a8b597f40697b9f

diff --git a/make.sh b/make.sh
index d2f18a122c..68370a8239 100755
--- a/make.sh
+++ b/make.sh
@@ -509,6 +509,7 @@ function pack_uboot_itb_image()
 	else
 		tos_image=`sed -n "/TOS=/s/TOS=//p" $ini |tr -d '\r'`
 		tosta_image=`sed -n "/TOSTA=/s/TOSTA=//p" $ini |tr -d '\r'`
+		mcu_image=`sed -n "/MCU=/s/MCU=//p" $ini |tr -d '\r'`
 		if [ $tosta_image ]; then
 			cp ${RKBIN}/${tosta_image} tee.bin
 		elif [ $tos_image ]; then
@@ -518,6 +519,10 @@ function pack_uboot_itb_image()
 			exit 1
 		fi
 
+		if [ $mcu_image ]; then
+			cp ${RKBIN}/${mcu_image} mcu.bin
+		fi
+
 		tee_offset=`sed -n "/ADDR=/s/ADDR=//p" $ini |tr -d '\r'`
 		if [ "$tee_offset" = "" ]; then
 			tee_offset=0x8400000

commit 322971a69a3d4c151d942367119ff284bbcbd6ee
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Tue Apr 14 16:29:53 2020 +0800

    clk: rockchip: rv1126: Change cpll and hpll rate
    
    CPLL from 1000MHz to 500MHz, make clk_gmac_ethernet_out2io 25MHz comes
    from CPLL.
    HPLL form 1600MHz to 1400MHz, make npu 700MHz comes from HPLL.
    
    Change-Id: I6633a83536054402ea8a9dc38abb33fe33503595
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rv1126.h b/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
index 57509bb28b..a5f8440234 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
@@ -15,8 +15,8 @@
 
 #define APLL_HZ		(600 * MHz)
 #define GPLL_HZ		(1188 * MHz)
-#define CPLL_HZ		(1000 * MHz)
-#define HPLL_HZ		(1600 * MHz)
+#define CPLL_HZ		(500 * MHz)
+#define HPLL_HZ		(1400 * MHz)
 #define PCLK_PDPMU_HZ	(100 * MHz)
 #define ACLK_PDBUS_HZ	(500 * MHz)
 #define HCLK_PDBUS_HZ	(200 * MHz)

commit 56a06ac82e6dd2f12c19e10a7301f7e2dce98284
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Tue Apr 14 16:28:43 2020 +0800

    clk: rockchip: rv1126: Add support to init hpll and 32k
    
    Change-Id: If41a708d925c978e8db1e21b23c16d9a9a2e29d8
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rv1126.h b/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
index 9357a470e3..57509bb28b 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
@@ -25,6 +25,7 @@
 #define HCLK_PDPHP_HZ	(200 * MHz)
 #define HCLK_PDCORE_HZ	(200 * MHz)
 #define HCLK_PDAUDIO_HZ	(150 * MHz)
+#define CLK_OSC0_DIV_HZ	(32768)
 
 /* RV1126 pll id */
 enum rv1126_pll_id {
@@ -53,6 +54,7 @@ struct rv1126_clk_priv {
 	struct rv1126_grf *grf;
 	ulong gpll_hz;
 	ulong cpll_hz;
+	ulong hpll_hz;
 	ulong armclk_hz;
 	ulong armclk_enter_hz;
 	ulong armclk_init_hz;
diff --git a/drivers/clk/rockchip/clk_rv1126.c b/drivers/clk/rockchip/clk_rv1126.c
index be43670abc..ae81dd85e2 100644
--- a/drivers/clk/rockchip/clk_rv1126.c
+++ b/drivers/clk/rockchip/clk_rv1126.c
@@ -196,6 +196,9 @@ static ulong rv1126_rtc32k_set_pmuclk(struct rv1126_pmuclk_priv *priv,
 	struct rv1126_pmucru *pmucru = priv->pmucru;
 	unsigned long m, n, val;
 
+	rk_clrsetreg(&pmucru->pmu_clksel_con[0], RTC32K_SEL_MASK,
+		     RTC32K_SEL_OSC0_DIV32K << RTC32K_SEL_SHIFT);
+
 	rational_best_approximation(rate, OSC_HZ,
 				    GENMASK(16 - 1, 0),
 				    GENMASK(16 - 1, 0),
@@ -1304,6 +1307,10 @@ static ulong rv1126_clk_get_rate(struct clk *clk)
 		rate = rockchip_pll_get_rate(&rv1126_pll_clks[CPLL], priv->cru,
 					     CPLL);
 		break;
+	case PLL_HPLL:
+		rate = rockchip_pll_get_rate(&rv1126_pll_clks[HPLL], priv->cru,
+					     HPLL);
+		break;
 	case HCLK_PDCORE_NIU:
 		rate = rv1126_pdcore_get_clk(priv);
 		break;
@@ -1391,6 +1398,10 @@ static ulong rv1126_clk_set_rate(struct clk *clk, ulong rate)
 		ret = rockchip_pll_set_rate(&rv1126_pll_clks[CPLL], priv->cru,
 					    CPLL, rate);
 		break;
+	case PLL_HPLL:
+		ret = rockchip_pll_set_rate(&rv1126_pll_clks[HPLL], priv->cru,
+					    HPLL, rate);
+		break;
 	case ACLK_PDBUS:
 	case HCLK_PDBUS:
 	case PCLK_PDBUS:
@@ -1713,6 +1724,7 @@ static int rv1126_gpll_set_clk(struct rv1126_clk_priv *priv, ulong rate)
 	}
 
 	rv1126_pdpmu_set_pmuclk(pmu_priv, PCLK_PDPMU_HZ);
+	rv1126_rtc32k_set_pmuclk(pmu_priv, CLK_OSC0_DIV_HZ);
 
 	return 0;
 }
@@ -1740,6 +1752,12 @@ static void rv1126_clk_init(struct rv1126_clk_priv *priv)
 		if (!ret)
 			priv->cpll_hz = CPLL_HZ;
 	}
+	if (priv->hpll_hz != HPLL_HZ) {
+		ret = rockchip_pll_set_rate(&rv1126_pll_clks[HPLL], priv->cru,
+					    HPLL, HPLL_HZ);
+		if (!ret)
+			priv->hpll_hz = HPLL_HZ;
+	}
 	if (priv->gpll_hz != GPLL_HZ)
 		rv1126_gpll_set_clk(priv, GPLL_HZ);
 

commit b77d2f1647d56ca893dc1ba99e16593fad76392d
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Tue Apr 14 10:57:35 2020 +0800

    dt-bindings: clock: rv1126-cru: Rename some srst according to TRM V1.0
    
    Change-Id: I329952664ef731bec67a57fa8c4c43dd65a38235
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/include/dt-bindings/clock/rv1126-cru.h b/include/dt-bindings/clock/rv1126-cru.h
index 280df25f14..57901ba13a 100644
--- a/include/dt-bindings/clock/rv1126-cru.h
+++ b/include/dt-bindings/clock/rv1126-cru.h
@@ -416,10 +416,10 @@
 #define SRST_PDBUS_HOLD_NIU1_A	23
 #define SRST_DBG_NIU_P		24
 #define SRST_PDCORE_NIIU_H	25
-#define SRST_SCR1_NIU		26
+#define SRST_MUC_NIU		26
 #define SRST_DCF_A		29
 #define SRST_DCF_P		30
-#define SRST_BUSMEM_A		31
+#define SRST_SYSTEM_SRAM_A	31
 
 /* cru_softrst_con2 */
 #define SRST_I2C1_P		32
@@ -432,7 +432,7 @@
 #define SRST_I2C5		39
 #define SRST_SPI1_P		40
 #define SRST_SPI1		41
-#define SRST_SCR1_CORE		42
+#define SRST_MCU_CORE		42
 #define SRST_PWM2_P		44
 #define SRST_PWM2		45
 #define SRST_SPINLOCK_A		46
@@ -595,8 +595,7 @@
 #define SRST_DDR_MSCH		199
 #define SRST_DDR_DFICTL		202
 #define SRST_DDR_STANDBY	203
-#define SRST_NPUSCR1_CORE	204
-#define SRST_NPUSCR1_NIU	205
+#define SRST_NPUMCU_NIU		205
 #define SRST_DDRPHY_P		206
 #define SRST_DDRPHY		207
 
@@ -612,7 +611,6 @@
 #define SRST_NPU_TSADC_P	216
 #define SRST_NPU_TSADC		217
 #define SRST_NPU_TSADCPHY	218
-#define SRST_NPU_MAILBOX_P	219
 #define SRST_CIFLITE_A		220
 #define SRST_CIFLITE_H		221
 #define SRST_CIFLITE_D		222

commit eee9fb0aeab16f96c0166a06ad283e337359c269
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 14 15:27:10 2020 +0800

    make.sh: fix typo
    
    Fix trust.img pack failed issue.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Icbaaba493228f620849851c46bb503dfe7ae6a13

diff --git a/make.sh b/make.sh
index 59030f92e8..d2f18a122c 100755
--- a/make.sh
+++ b/make.sh
@@ -628,7 +628,7 @@ function pack_arm32_trust_image()
 	fi
 
 	# OP-TEE is 132M(0x8400000) offset from DRAM base.
-	dram_base=`sed -n "/CONFIG_SYS_SDRAM_BASE=/s/CONFIG_SYS_Sdram_base=//p" include/autoconf.mk|tr -d '\r'`
+	dram_base=`sed -n "/CONFIG_SYS_SDRAM_BASE=/s/CONFIG_SYS_SDRAM_BASE=//p" include/autoconf.mk|tr -d '\r'`
 	tee_load_addr=$((dram_base+tee_offset))
 	tee_load_addr=$(echo "obase=16;${tee_load_addr}"|bc) # Convert Dec to Hex
 

commit df197bd25a60f266490d3e0caebd90bcc1fdb6d7
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Apr 14 09:47:01 2020 +0800

    rockchip: board: truncature the illegal character in the end of sn
    
    The usb will not work well when connects to pc with illegal sn.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Idf17bc1cc6533428606e703d7284053c2b0cc02a

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 7ebff6d948..2cc102dfe5 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -110,6 +110,15 @@ static int rockchip_set_serialno(void)
 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
 	ret = vendor_storage_read(VENDOR_SN_ID, serialno_str, (VENDOR_SN_MAX-1));
 	if (ret > 0) {
+		i = strlen(serialno_str);
+		for (; i > 0; i--) {
+			if ((serialno_str[i] >= 'a' && serialno_str[i] <= 'z') ||
+			    (serialno_str[i] >= 'A' && serialno_str[i] <= 'Z') ||
+			    (serialno_str[i] >= '0' && serialno_str[i] <= '9'))
+				break;
+		}
+
+		serialno_str[i + 1] = 0x0;
 		env_set("serial#", serialno_str);
 	} else {
 #endif

commit 02be2c71ef34c956c13678c06c34c17a86596b13
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 14 17:13:24 2020 +0800

    configs: rv1126: disable spl fit signature
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ic2ad78ed6b2a0e93cf4942b03b47791f535f462c

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index f4d7539570..8efba88145 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -20,7 +20,6 @@ CONFIG_DEFAULT_DEVICE_TREE="rv1126-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_FIT_HW_CRYPTO=y
-CONFIG_SPL_FIT_SIGNATURE=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_FIT_HW_CRYPTO=y
 CONFIG_BOOTDELAY=0
@@ -130,6 +129,7 @@ CONFIG_IRQ2GPIO_V2=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_RSA=y
+CONFIG_SPL_RSA=y
 CONFIG_SHA512=y
 CONFIG_ERRNO_STR=y
 # CONFIG_EFI_LOADER is not set

commit a873a53297f660701fb762fbb2bff8bea76b3dd6
Merge: 82c18007fb 8f53a15c01
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 14 14:16:56 2020 +0800

    Merge branch 'next-dev' into thunder-boot

commit 8f53a15c01aa966890a0e9c71e69f71be9f7df4c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 13 20:45:19 2020 +0800

    make/fit: optimise for fit
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I59067a208f3599f13acf995172ec720c1f141d18

diff --git a/make.sh b/make.sh
index 3f23121470..59030f92e8 100755
--- a/make.sh
+++ b/make.sh
@@ -97,6 +97,7 @@ PLATFORM_SHA=
 PLATFORM_UBOOT_IMG_SIZE=
 PLATFORM_TRUST_IMG_SIZE=
 PACK_FORMAT="rk"
+NOPACK="n"
 
 #########################################################################################################
 function help()
@@ -146,7 +147,7 @@ function prepare()
 {
 	case $BOARD in
 		# Parse from exit .config
-		''|elf*|loader*|spl*|itb|debug*|trust|uboot|map|sym|env|EXT_DTB=*|fit*)
+		''|elf*|loader*|spl*|itb|debug*|trust|uboot|map|sym|env|EXT_DTB=*|fit*|nopack)
 		if [ ! -f .config ]; then
 			echo
 			echo "ERROR: No .config"
@@ -165,7 +166,7 @@ function prepare()
 		;;
 
 		#Subcmd
-		''|elf*|loader*|spl*|itb|debug*|trust*|uboot|map|sym|env|EXT_DTB=*|fit*)
+		''|elf*|loader*|spl*|itb|debug*|trust*|uboot|map|sym|env|EXT_DTB=*|fit*|nopack)
 		;;
 
 		*)
@@ -318,6 +319,10 @@ function sub_commands()
 		OPTION=${SUBCMD}
 		;;
 
+		nopack)
+		NOPACK="y"
+		;;
+
 		*)
 		# Search function and code position of address
 		RELOC_OFF=${FUNCADDR#*-}
@@ -452,6 +457,10 @@ function fixup_platform_configure()
 
 function pack_uboot_image()
 {
+	if [ "$PACK_FORMAT" != "rk" ]; then
+		return
+	fi
+
 	# Check file size
 	head_kb=2
 	uboot_kb=`ls -l u-boot.bin | awk '{print $5}'`
@@ -469,15 +478,12 @@ function pack_uboot_image()
 	fi
 
 	# Pack
-	if [ "$PACK_FORMAT" = "rk" ]; then
-		uboot_load_addr=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" include/autoconf.mk|tr -d '\r'`
-		if [ -z $uboot_load_addr ]; then
-			echo "ERROR: No CONFIG_SYS_TEXT_BASE for u-boot";
-			exit 1
-		fi
-		${RKTOOLS}/loaderimage --pack --uboot u-boot.bin uboot.img ${uboot_load_addr} ${PLATFORM_UBOOT_IMG_SIZE}
+	uboot_load_addr=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" include/autoconf.mk|tr -d '\r'`
+	if [ -z $uboot_load_addr ]; then
+		echo "ERROR: No CONFIG_SYS_TEXT_BASE for u-boot";
+		exit 1
 	fi
-
+	${RKTOOLS}/loaderimage --pack --uboot u-boot.bin uboot.img ${uboot_load_addr} ${PLATFORM_UBOOT_IMG_SIZE}
 	ls u-boot.img u-boot-dtb.img >/dev/null 2>&1 && rm u-boot.img u-boot-dtb.img -rf
 	echo "pack uboot okay! Input: u-boot.bin"
 }
@@ -576,6 +582,10 @@ function pack_spl_loader_image()
 
 function pack_loader_image()
 {
+	if [ "$PACK_FORMAT" != "rk" ]; then
+		return
+	fi
+
 	if [ "$FILE" != "" ]; then
 		ini=$FILE;
 	else
@@ -594,13 +604,9 @@ function pack_loader_image()
 		image=`sed -n "/PATH=/p" $ini | tr -d '\r' | cut -d '=' -f 2`
 		cp ${RKBIN}/${image} ./
 	else
-		if [ "$PACK_FORMAT" = "rk" ]; then
-			cd ${RKBIN}
-			${RKTOOLS}/boot_merger $ini
-			cd - && mv ${RKBIN}/*_loader_*.bin ./
-		else
-			./make.sh spl-s
-		fi
+		cd ${RKBIN}
+		${RKTOOLS}/boot_merger $ini
+		cd - && mv ${RKBIN}/*_loader_*.bin ./
 	fi
 
 	file=`ls *loader*.bin`
@@ -626,21 +632,15 @@ function pack_arm32_trust_image()
 	tee_load_addr=$((dram_base+tee_offset))
 	tee_load_addr=$(echo "obase=16;${tee_load_addr}"|bc) # Convert Dec to Hex
 
-	if [ "$PACK_FORMAT" = "rk" ]; then
-		if [ $tosta_image ]; then
-			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${tosta_image} ${tee_output} ${tee_load_addr} ${PLATFORM_TRUST_IMG_SIZE}
-		elif [ $tos_image ]; then
-			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${tos_image}   ${tee_output} ${tee_load_addr} ${PLATFORM_TRUST_IMG_SIZE}
-		else
-			echo "ERROR: No any tee bin"
-			exit 1
-		fi
-		echo "pack trust okay! Input: $ini"
+	if [ $tosta_image ]; then
+		${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${tosta_image} ${tee_output} ${tee_load_addr} ${PLATFORM_TRUST_IMG_SIZE}
+	elif [ $tos_image ]; then
+		${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${tos_image}   ${tee_output} ${tee_load_addr} ${PLATFORM_TRUST_IMG_SIZE}
 	else
-		./scripts/fit-vboot-uboot.sh --no-vboot --no-rebuild
-		ls uboot.img trust*.img >/dev/null 2>&1 && rm uboot.img trust*.img -rf
-		echo "pack uboot.img (with uboot trust) okay! Input: $ini"
+		echo "ERROR: No any tee bin"
+		exit 1
 	fi
+	echo "pack trust okay! Input: $ini"
 }
 
 function pack_arm64_trust_image()
@@ -654,6 +654,10 @@ function pack_arm64_trust_image()
 
 function pack_trust_image()
 {
+	if [ "$PACK_FORMAT" != "rk" ]; then
+		return
+	fi
+
 	ls trust*.img >/dev/null 2>&1 && rm trust*.img
 	if [ "$FILE" != "" ]; then
 		ini=$FILE;
@@ -684,6 +688,39 @@ function pack_trust_image()
 	fi
 }
 
+function pack_fit_image()
+{
+	./scripts/fit-vboot-uboot.sh --no-vboot --no-rebuild
+	ls uboot.img trust*.img >/dev/null 2>&1 && rm uboot.img trust*.img -rf
+	echo "pack uboot.img (with uboot trust) okay! Input: $ini"
+}
+
+function pack_images()
+{
+	if [ "$NOPACK" != "y" ]; then
+		if [ "$PACK_FORMAT" = "rk" ]; then
+			pack_uboot_image
+			pack_trust_image
+			pack_loader_image
+		elif [ "$PACK_FORMAT" = "fit" ]; then
+			pack_fit_image
+		fi
+	fi
+}
+
+function clean_files()
+{
+	if [ -f spl/u-boot-spl.dtb ]; then
+		rm spl/u-boot-spl.dtb
+	fi
+	if [ -f tpl/u-boot-tpl.dtb ]; then
+		rm tpl/u-boot-tpl.dtb
+	fi
+	if [ -f u-boot.dtb ]; then
+		rm u-boot.dtb
+	fi
+}
+
 function finish()
 {
 	echo
@@ -701,8 +738,7 @@ select_toolchain
 select_chip_info
 fixup_platform_configure
 sub_commands
+clean_files
 make CROSS_COMPILE=${TOOLCHAIN_GCC} ${OPTION} all --jobs=${JOB}
-pack_uboot_image
-pack_trust_image
-pack_loader_image
+pack_images
 finish
diff --git a/scripts/fit-base.sh b/scripts/fit-base.sh
index 44657216d7..b5c18dbabb 100755
--- a/scripts/fit-base.sh
+++ b/scripts/fit-base.sh
@@ -46,17 +46,16 @@ function usage_pack()
 	echo "    $0 [args]"
 	echo
 	echo "args:"
-	echo "    --rollback-index  <decimal integer>"
+	if [[ "$0" = *fit-vboot-boot.sh ]]; then
+		echo "    --rollback-index-boot   <decimal integer>"
+	elif [[ "$0" = *fit-vboot-uboot.sh ]]; then
+		echo "    --rollback-index-uboot  <decimal integer>"
+	else
+		echo "    --rollback-index-boot   <decimal integer>"
+		echo "    --rollback-index-uboot  <decimal integer>"
+	fi
 	echo "    --no-vboot"
-	echo
-}
-
-function usage_resign()
-{
-	echo
-	echo "usage:"
-	echo "    $0 -i [itb_image] -s [sig] -u       // resign uboot"
-	echo "    $0 -i [itb_image] -s [sig] -b       // resign boot"
+	echo "    --no-check"
 	echo
 }
 
@@ -88,15 +87,17 @@ function fit_process_args()
 				ARG_NO_REBUILD="y"
 				shift 1
 				;;
-			--rollback-index)
-				if [[ "$0" = *fit-vboot-uboot.sh ]]; then
-					ARG_ROLLBACK_IDX_UBOOT=$2
-				elif [[ "$0" = *fit-vboot-boot.sh ]]; then
-					ARG_ROLLBACK_IDX_BOOT=$2
-				else
-					usage_pack
-					exit 1
-				fi
+			--no-check)
+				ARG_NO_CHECK="y"
+				shift 1
+				;;
+			--rollback-index-boot)
+				ARG_ROLLBACK_IDX_BOOT=$2
+				arg_check_decimal $2
+				shift 2
+				;;
+			--rollback-index-uboot)
+				ARG_ROLLBACK_IDX_UBOOT=$2
 				arg_check_decimal $2
 				shift 2
 				;;
@@ -123,7 +124,7 @@ function its_file_existence_check()
 function fit_rebuild()
 {
 	if [ "$ARG_NO_REBUILD" != "y" ]; then
-		./make.sh
+		./make.sh nopack
 	fi
 
 	if [ -d $FIT_DIR ]; then
@@ -142,6 +143,7 @@ function fit_uboot_make_itb()
 	if [ "$ARG_NO_VBOOT" = "y" ]; then
 		SIGN_MSG="no-signed"
 		./tools/mkimage -f u-boot.its -E -p $FIT_NS_OFFS_UBOOT $FIT_ITB_UBOOT
+		./make.sh spl-s
 	else
 		SIGN_MSG="signed"
 
@@ -158,10 +160,10 @@ function fit_uboot_make_itb()
 			exit 1
 		fi
 
-		if grep  -q '^CONFIG_SPL_FIT_ROLLBACK_PROTECT=y' .config ; then
+		if grep -q '^CONFIG_SPL_FIT_ROLLBACK_PROTECT=y' .config ; then
 			SPL_ROLLBACK_PROTECT="y"
 			if [ -z $ARG_ROLLBACK_IDX_UBOOT ]; then
-				echo "ERROR: No args \"--rollback-index <n>\""
+				echo "ERROR: No args \"--rollback-index-uboot <n>\""
 				exit 1
 			fi
 		fi
@@ -170,6 +172,13 @@ function fit_uboot_make_itb()
 			sed -i "s/rollback-index = <0x0>/rollback-index = <$ARG_ROLLBACK_IDX_UBOOT>/g" u-boot.its
 		fi
 
+		# We need a u-boot.dtb with RSA pub-key insert
+		if ! fdtget -l u-boot.dtb /signature >/dev/null 2>&1 ; then
+			./tools/mkimage -f u-boot.its -k $KEY_DIR/ -K u-boot.dtb -E -p $FIT_S_OFFS_UBOOT -r $FIT_ITB_UBOOT
+			echo "Insert RSA pub into u-boot.dtb"
+		fi
+
+		# Pack
 		./tools/mkimage -f u-boot.its -k $KEY_DIR/ -K spl/u-boot-spl.dtb -E -p $FIT_S_OFFS_UBOOT -r $FIT_ITB_UBOOT
 		mv data2sign.bin $FIT_DATA2SIG_UBOOT
 
@@ -182,8 +191,9 @@ function fit_uboot_make_itb()
 			fi
 		fi
 
-		# host check sign
-		./tools/fit_check_sign -f $FIT_ITB_UBOOT -k spl/u-boot-spl.dtb -s
+		if [ "$ARG_NO_CHECK" != "y" ]; then
+			./tools/fit_check_sign -f $FIT_ITB_UBOOT -k spl/u-boot-spl.dtb -s
+		fi
 
 		# minimize spl dtb
 		if grep  -q '^CONFIG_SPL_FIT_HW_CRYPTO=y' .config ; then
@@ -199,7 +209,7 @@ function fit_uboot_make_itb()
 			fdtput -tx spl/u-boot-spl.dtb /signature/key-dev rsa,exponent-BN 0x0
 		fi
 
-		# repack spl
+		# repack spl which has rsa pub-key insert
 		ls *_loader_*.bin >/dev/null 2>&1 && rm *_loader_*.bin
 		cat spl/u-boot-spl-nodtb.bin > spl/u-boot-spl.bin
 		if ! grep  -q '^CONFIG_SPL_SEPARATE_BSS=y' .config ; then
@@ -210,20 +220,19 @@ function fit_uboot_make_itb()
 	fi
 
 	# clean
-	ls u-boot.itb >/dev/null 2>&1 && rm u-boot.itb
 	mv u-boot.its $FIT_DIR
 	cp tee.bin $FIT_DIR
 	cp u-boot-nodtb.bin $FIT_DIR
 	cp u-boot.dtb $FIT_DIR
 	cp spl/u-boot-spl.bin $FIT_DIR
 	cp spl/u-boot-spl.dtb $FIT_DIR
+	ls u-boot.itb u-boot.img u-boot-dtb.img >/dev/null 2>&1 && rm u-boot.itb u-boot.img u-boot-dtb.img -rf
 	./scripts/dtc/dtc -I dtb -O dts $FIT_ITB_UBOOT -o $FIT_UNMAP_ITB_UBOOT >/dev/null 2>&1
 	./scripts/dtc/dtc -I dtb -O dts spl/u-boot-spl.dtb -o $FIT_UNMAP_KEY_UBOOT >/dev/null 2>&1
 }
 
 function fit_boot_make_itb()
 {
-
 	if grep -q '^CONFIG_ARM64=y' .config ; then
 		FIT_ITS_BOOT="kernel_arm64.its"
 	else
@@ -239,7 +248,7 @@ function fit_boot_make_itb()
 		./tools/mkimage -f $FIT_ITS_BOOT -E -p $FIT_NS_OFFS_BOOT $FIT_ITB_BOOT
 	else
 		SIGN_MSG="signed"
-		# sanity
+
 		if [ ! -f $KEY_DIR/dev.key ]; then
 			echo "ERROR: No $KEY_DIR/dev.key"
 			exit 1
@@ -256,7 +265,7 @@ function fit_boot_make_itb()
 		if grep -q '^CONFIG_FIT_ROLLBACK_PROTECT=y' .config ; then
 			ROLLBACK_PROTECT="y"
 			if [ -z $ARG_ROLLBACK_IDX_BOOT ]; then
-				echo "ERROR: No args \"--rollback-index <n>\""
+				echo "ERROR: No args \"--rollback-index-boot <n>\""
 				exit 1
 			fi
 		fi
@@ -285,8 +294,9 @@ function fit_boot_make_itb()
 			fi
 		fi
 
-		# host check sign
-		./tools/fit_check_sign -f $FIT_ITB_BOOT -k u-boot.dtb
+		if [ "$ARG_NO_CHECK" != "y" ]; then
+			./tools/fit_check_sign -f $FIT_ITB_BOOT -k u-boot.dtb
+		fi
 
 		# minimize u-boot dtb
 		if grep  -q '^CONFIG_FIT_HW_CRYPTO=y' .config ; then
@@ -355,20 +365,24 @@ function fit_boot_make_img()
 	fi
 }
 
+function usage_resign()
+{
+	echo
+	echo "usage:"
+	echo "    $0 -f [itb_image] -s [sig]"
+	echo
+}
+
 function fit_resign()
 {
-	if [ $# -ne 5 ]; then
+	if [ $# -ne 4 ]; then
 		usage_resign
 		exit 1
 	fi
 
 	while [ $# -gt 0 ]; do
 		case $1 in
-			-b|-u)
-				FIT_UK=$1
-				shift 1
-				;;
-			-i)
+			-f)
 				FIT_ITB=$2
 				shift 2
 				;;
@@ -390,9 +404,6 @@ function fit_resign()
 	elif [ ! -f $FIT_SIG ]; then
 		echo "ERROR: No $FIT_SIG"
 		exit 1
-	elif [ -z $FIT_UK ]; then
-		echo "ERROR: No args -u or -b"
-		exit 1
 	fi
 
 	# confirm location
@@ -422,7 +433,7 @@ function fit_resign()
 
 	# generate
 	echo
-	if [ "$FIT_UK" = "-u" ]; then
+	if fdtget -l $FIT_ITB /images/uboot@1 >/dev/null 2>&1 ; then
 		fit_uboot_make_img  $FIT_ITB
 		echo "Image(re-signed):  $FIT_IMG_UBOOT is ready"
 	else

commit b074ddcefe89ddab3d001e4f413ed50e71ca135b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 14 10:45:56 2020 +0800

    common: sig: require /signature node if FIT_SIGANATURE is enabled
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I415d198f4d97f6430f7a0bfd478e3bdfb2c6b5aa

diff --git a/common/image-sig.c b/common/image-sig.c
index a106a2804d..ea241f1f03 100644
--- a/common/image-sig.c
+++ b/common/image-sig.c
@@ -424,7 +424,8 @@ static int fit_config_verify_sig(const void *fit, int conf_noffset,
 		goto error;
 	}
 
-	return verified ? 0 : -EPERM;
+	if (verified)
+		return 0;
 
 error:
 	printf(" error!\n%s for '%s' hash node in '%s' config node\n",
@@ -442,9 +443,8 @@ int fit_config_verify_required_sigs(const void *fit, int conf_noffset,
 	/* Work out what we need to verify */
 	sig_node = fdt_subnode_offset(sig_blob, 0, FIT_SIG_NODENAME);
 	if (sig_node < 0) {
-		debug("%s: No signature node found: %s\n", __func__,
-		      fdt_strerror(sig_node));
-		return 0;
+		printf("No signature node found: %s\n", fdt_strerror(sig_node));
+		return -EINVAL;
 	}
 
 	fdt_for_each_subnode(noffset, sig_blob, sig_node) {

commit ab760d282ce10d83951be1a1fe4edfad8ccd0840
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 14 13:06:58 2020 +0800

    configs: rk3399: disable fit signature
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If63065b7143949bb1d2ce12a0f8bb69b8db1c451

diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
index ec752fd342..0ae14bc746 100755
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -9,8 +9,6 @@ CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
-CONFIG_FIT_SIGNATURE=y
-CONFIG_SPL_FIT_SIGNATURE=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_BOOTDELAY=0
 CONFIG_SYS_CONSOLE_INFO_QUIET=y

commit f8ddf2aa61d0015b4008c58ddfadd1fb82b86304
Author: Rick Chen <rick@andestech.com>
Date:   Tue Mar 13 13:37:29 2018 +0800

    UPSTREAM: tools: mkimage: Support RISC-V arch
    
    Add riscv uimage arch to support riscv-linux booting.
    It can Convert riscv-linux to image which can be
    booted by bootm command.
    
    Signed-off-by: Rick Chen <rick@andestech.com>
    Signed-off-by: Rick Chen <rickchen36@gmail.com>
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I38119fadebb4fa9f1db12897d6561f97fbf03f02
    (cherry picked from commit: 86aa65a0cd2)

diff --git a/common/image.c b/common/image.c
index 4134ac80d7..4518a8f960 100644
--- a/common/image.c
+++ b/common/image.c
@@ -86,6 +86,7 @@ static const table_entry_t uimage_arch[] = {
 	{	IH_ARCH_ARC,		"arc",		"ARC",		},
 	{	IH_ARCH_X86_64,		"x86_64",	"AMD x86_64",	},
 	{	IH_ARCH_XTENSA,		"xtensa",	"Xtensa",	},
+	{	IH_ARCH_RISCV,		"riscv",	"RISC-V",	},
 	{	-1,			"",		"",		},
 };
 

commit ade0ea07bd968d20037ec232777c339e22d69ee5
Author: Rick Chen <rick@andestech.com>
Date:   Tue Dec 26 13:55:58 2017 +0800

    UPSTREAM: riscv: Modify generic codes to support RISC-V
    
    Support common commands bdinfo and image format,
    also modify common generic flow for RISC-V.
    
    Signed-off-by: Rick Chen <rick@andestech.com>
    Signed-off-by: Rick Chen <rickchen36@gmail.com>
    Signed-off-by: Greentime Hu <green.hu@gmail.com>
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Reviewed-by: Tom Rini <trini@konsulko.com>
    Change-Id: Id58d17cd58433fdadc8ce7ee78d72035f84adb53
    (cherry picked from commit 068feb9b86d991283c43b56e36094f4e6f484d04)

diff --git a/arch/Kconfig b/arch/Kconfig
index 9542bab784..69026304b3 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -54,6 +54,10 @@ config PPC
 	select HAVE_PRIVATE_LIBGCC
 	select SUPPORT_OF_CONTROL
 
+config RISCV
+	bool "riscv architecture"
+	select SUPPORT_OF_CONTROL
+
 config SANDBOX
 	bool "Sandbox"
 	select BOARD_LATE_INIT
diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c
index f5585f5bfb..1dc0051778 100644
--- a/cmd/bdinfo.c
+++ b/cmd/bdinfo.c
@@ -417,6 +417,21 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return 0;
 }
 
+#elif defined(CONFIG_RISCV)
+
+int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+	bd_t *bd = gd->bd;
+
+	print_num("arch_number", bd->bi_arch_number);
+	print_bi_boot_params(bd);
+	print_bi_dram(bd);
+	print_eth_ip_addr();
+	print_baudrate();
+
+	return 0;
+}
+
 #elif defined(CONFIG_ARC)
 
 int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
diff --git a/common/board_f.c b/common/board_f.c
index fd873449dc..0c63474fe8 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -237,7 +237,7 @@ static int setup_mon_len(void)
 	gd->mon_len = (ulong)&_end - (ulong)_init;
 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
 	gd->mon_len = CONFIG_SYS_MONITOR_LEN;
-#elif defined(CONFIG_NDS32) || defined(CONFIG_SH)
+#elif defined(CONFIG_NDS32) || defined(CONFIG_SH) || defined(CONFIG_RISCV)
 	gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
 #elif defined(CONFIG_SYS_MONITOR_BASE)
 	/* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
diff --git a/common/board_r.c b/common/board_r.c
index 878b0fe1c6..f1b1b83c1d 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -129,7 +129,7 @@ static int initr_reloc_global_data(void)
 {
 #ifdef __ARM__
 	monitor_flash_len = _end - __image_copy_start;
-#elif defined(CONFIG_NDS32)
+#elif defined(CONFIG_NDS32) || defined(CONFIG_RISCV)
 	monitor_flash_len = (ulong)&_end - (ulong)&_start;
 #elif !defined(CONFIG_SANDBOX) && !defined(CONFIG_NIOS2)
 	monitor_flash_len = (ulong)&__init_end - gd->relocaddr;
@@ -849,7 +849,7 @@ static init_fnc_t init_sequence_r[] = {
 	board_early_init_r,
 #endif
 
-#if defined(CONFIG_ARM) || defined(CONFIG_NDS32)
+#if defined(CONFIG_ARM) || defined(CONFIG_NDS32) || defined(CONFIG_RISCV)
 	board_init,	/* Setup chipselects */
 #endif
 
diff --git a/include/elf.h b/include/elf.h
index aaecac799e..fe2128f378 100644
--- a/include/elf.h
+++ b/include/elf.h
@@ -613,6 +613,11 @@ unsigned long elf_hash(const unsigned char *name);
 #define R_AARCH64_NONE		0	/* No relocation.  */
 #define R_AARCH64_RELATIVE	1027	/* Adjust by program base.  */
 
+/* RISC-V relocations */
+#define R_RISCV_32		1
+#define R_RISCV_64		2
+#define R_RISCV_RELATIVE	3
+
 #ifndef __ASSEMBLER__
 int valid_elf_image(unsigned long addr);
 #endif
diff --git a/include/image.h b/include/image.h
index 57d55e7a9a..afe2d06744 100644
--- a/include/image.h
+++ b/include/image.h
@@ -191,6 +191,7 @@ enum {
 	IH_ARCH_ARC,			/* Synopsys DesignWare ARC */
 	IH_ARCH_X86_64,			/* AMD x86_64, Intel and Via */
 	IH_ARCH_XTENSA,			/* Xtensa	*/
+	IH_ARCH_RISCV,			/* RISC-V */
 
 	IH_ARCH_COUNT,
 };

commit 342d050ebb0f7496cf11b76cc9cc27aaf69a1554
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Sun Apr 12 16:30:00 2020 +0800

    spl: fit: support boot standalone firmware
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ib3e35cfba0bb52141c8948de994f5e6c9661887f

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index b45a8988d6..6f6a75ada9 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -342,6 +342,11 @@ static int spl_fit_image_get_os(const void *fit, int noffset, uint8_t *os)
 #endif
 }
 
+__weak int spl_fit_standalone_release(void)
+{
+	return 0;
+}
+
 static int spl_internal_load_simple_fit(struct spl_image_info *spl_image,
 					struct spl_load_info *info,
 					ulong sector, void *fit)
@@ -429,6 +434,31 @@ static int spl_internal_load_simple_fit(struct spl_image_info *spl_image,
 	printf("rollback index: %d >= %d, OK\n", this_index, min_index);
 #endif
 #endif
+
+	/*
+	 * If required to start the other core before load "loadables"
+	 * firmwares, use the config "standalone" to load the other core's
+	 * firmware, then start it.
+	 * Normally, different cores' firmware is attach to the config
+	 * "loadables" and load them together.
+	 */
+	if (node < 0)
+		node = spl_fit_get_image_node(fit, images, FIT_STANDALONE_PROP,
+					      0);
+	if (node > 0) {
+		/* Load the image and set up the spl_image structure */
+		ret = spl_load_fit_image(info, sector, fit, base_offset, node,
+					 spl_image);
+		if (!ret) {
+			ret = spl_fit_standalone_release();
+			if (ret)
+				printf("Start standalone fail, ret = %d\n",
+				       ret);
+		}
+
+		node = -1;
+	}
+
 	/*
 	 * Find the U-Boot image using the following search order:
 	 *   - start at 'firmware' (e.g. an ARM Trusted Firmware)

commit f2413b2f2f5a571b162d8d7c0c67fb2b3c99a0e4
Author: Marek Vasut <marex@denx.de>
Date:   Sun May 13 00:22:54 2018 +0200

    UPSTREAM: fit: Add standalone image type handling
    
    Just add IH_TYPE_STANDALONE to fit_get_image_type_property().
    
    Signed-off-by: Marek Vasut <marex@denx.de>
    Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
    Cc: Simon Glass <sjg@chromium.org>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I0e3dbfad3e15decb81665fabb8d25e1b71f4c7b7
    (cherry picked from commit 0298d203754)

diff --git a/common/image-fit.c b/common/image-fit.c
index 37fa0c8ab9..f52eec0cc2 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -1918,6 +1918,8 @@ static const char *fit_get_image_type_property(int type)
 		return FIT_LOADABLE_PROP;
 	case IH_TYPE_FPGA:
 		return FIT_FPGA_PROP;
+	case IH_TYPE_STANDALONE:
+		return FIT_STANDALONE_PROP;
 	}
 
 	return "unknown";
diff --git a/include/image.h b/include/image.h
index 38a4410ccc..57d55e7a9a 100644
--- a/include/image.h
+++ b/include/image.h
@@ -937,6 +937,7 @@ int bootz_setup(ulong image, ulong *start, ulong *end);
 #define FIT_SETUP_PROP		"setup"
 #define FIT_FPGA_PROP		"fpga"
 #define FIT_FIRMWARE_PROP	"firmware"
+#define FIT_STANDALONE_PROP	"standalone"
 
 #define FIT_MAX_HASH_LEN	HASH_MAX_DIGEST_SIZE
 

commit 82c18007fbc0e1d1afb3bfdcdc597dba58c6476b
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Mon Apr 13 21:03:52 2020 +0800

    clk: rockchip: rv1126: Modify divs for pll
    
    There are some constraints for pll.
    Input frequency range(Int): 5MHz to 1200MHz.
    Input frequency range(Frac): 10MHz to 1200MHz.
    Output frequency range: 16MHz to 6400MHz.
    VCO frequency range: 1600MHz to 6400MHz.
    Feedback divide(Int): 16 t0 640.
    Feedback divide(Frac): 20 to 320.
    Postdiv1 >= Postdiv2.
    
    Change-Id: Ic8b8da6097f476597733984145056b6cc6cc453e
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rv1126.c b/drivers/clk/rockchip/clk_rv1126.c
index 47e0698392..be43670abc 100644
--- a/drivers/clk/rockchip/clk_rv1126.c
+++ b/drivers/clk/rockchip/clk_rv1126.c
@@ -40,18 +40,18 @@ static struct rockchip_cpu_rate_table rv1126_cpu_rates[] = {
 static struct rockchip_pll_rate_table rv1126_pll_rates[] = {
 	/* _mhz, _refdiv, _fbdiv, _postdiv1, _postdiv2, _dsmpd, _frac */
 	RK3036_PLL_RATE(1600000000, 3, 200, 1, 1, 1, 0),
-	RK3036_PLL_RATE(1200000000, 1, 50, 1, 1, 1, 0),
-	RK3036_PLL_RATE(1188000000, 2, 99, 1, 1, 1, 0),
-	RK3036_PLL_RATE(1100000000, 12, 550, 1, 1, 1, 0),
+	RK3036_PLL_RATE(1200000000, 1, 100, 2, 1, 1, 0),
+	RK3036_PLL_RATE(1188000000, 1, 99, 2, 1, 1, 0),
+	RK3036_PLL_RATE(1100000000, 3, 275, 2, 1, 1, 0),
 	RK3036_PLL_RATE(1008000000, 1, 84, 2, 1, 1, 0),
-	RK3036_PLL_RATE(1000000000, 6, 500, 2, 1, 1, 0),
+	RK3036_PLL_RATE(1000000000, 3, 250, 2, 1, 1, 0),
 	RK3036_PLL_RATE(816000000, 1, 68, 2, 1, 1, 0),
-	RK3036_PLL_RATE(800000000, 6, 400, 2, 1, 1, 0),
-	RK3036_PLL_RATE(600000000, 1, 75, 3, 1, 1, 0),
-	RK3036_PLL_RATE(594000000, 2, 99, 2, 1, 1, 0),
-	RK3036_PLL_RATE(500000000, 6, 250, 2, 1, 1, 0),
-	RK3036_PLL_RATE(200000000, 1, 200, 6, 4, 1, 0),
-	RK3036_PLL_RATE(100000000, 1, 150, 6, 6, 1, 0),
+	RK3036_PLL_RATE(800000000, 3, 200, 2, 1, 1, 0),
+	RK3036_PLL_RATE(600000000, 1, 100, 4, 1, 1, 0),
+	RK3036_PLL_RATE(594000000, 1, 99, 4, 1, 1, 0),
+	RK3036_PLL_RATE(500000000, 1, 125, 6, 1, 1, 0),
+	RK3036_PLL_RATE(200000000, 1, 100, 6, 2, 1, 0),
+	RK3036_PLL_RATE(100000000, 1, 100, 6, 4, 1, 0),
 	{ /* sentinel */ },
 };
 

commit 49e04eddc0f0d28b14e33b3ce125b18d71d007bc
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Wed Apr 1 16:13:59 2020 +0800

    pinctrl: rockchip: rv1126 add mux_route_type flag
    
    Change-Id: I04b8f60cac96d9a2c0bcea7b055d5324f60033d5
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 66309eea06..de5652319c 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -86,6 +86,21 @@ enum rockchip_pin_pull_type {
 	PULL_TYPE_MAX
 };
 
+/**
+ * enum mux route register type, should be invalid/default/topgrf/pmugrf.
+ * INVALID: means do not need to set mux route
+ * DEFAULT: means same regmap as pin iomux
+ * TOPGRF: means mux route setting in topgrf
+ * PMUGRF: means mux route setting in pmugrf
+ */
+enum rockchip_pin_route_type {
+	ROUTE_TYPE_DEFAULT = 0,
+	ROUTE_TYPE_TOPGRF = 1,
+	ROUTE_TYPE_PMUGRF = 2,
+
+	ROUTE_TYPE_INVALID = -1,
+};
+
 /**
  * @drv_type: drive strength variant using rockchip_perpin_drv_type
  * @offset: if initialized to -1 it will be autocalculated, by specifying
@@ -285,15 +300,25 @@ struct rockchip_pin_bank {
 		.pull_type[3] = pull3,					\
 	}
 
-#define PIN_BANK_MUX_ROUTE_FLAGS(ID, PIN, FUNC, REG, VAL)	\
+#define PIN_BANK_MUX_ROUTE_FLAGS(ID, PIN, FUNC, REG, VAL, FLAG)		\
 	{								\
 		.bank_num	= ID,					\
 		.pin		= PIN,					\
-		.func		= FUNC,				\
-		.route_offset	= REG,				\
-		.route_val	= VAL,				\
+		.func		= FUNC,					\
+		.route_offset	= REG,					\
+		.route_val	= VAL,					\
+		.route_type	= FLAG,					\
 	}
 
+#define MR_DEFAULT(ID, PIN, FUNC, REG, VAL)	\
+	PIN_BANK_MUX_ROUTE_FLAGS(ID, PIN, FUNC, REG, VAL, ROUTE_TYPE_DEFAULT)
+
+#define MR_TOPGRF(ID, PIN, FUNC, REG, VAL)	\
+	PIN_BANK_MUX_ROUTE_FLAGS(ID, PIN, FUNC, REG, VAL, ROUTE_TYPE_TOPGRF)
+
+#define MR_PMUGRF(ID, PIN, FUNC, REG, VAL)	\
+	PIN_BANK_MUX_ROUTE_FLAGS(ID, PIN, FUNC, REG, VAL, ROUTE_TYPE_PMUGRF)
+
 /**
  * struct rockchip_mux_recalced_data: represent a pin iomux data.
  * @num: bank number.
@@ -315,6 +340,7 @@ struct rockchip_mux_recalced_data {
  * @bank_num: bank number.
  * @pin: index at register or used to calc index.
  * @func: the min pin.
+ * @route_type: the register type.
  * @route_offset: the max pin.
  * @route_val: the register offset.
  */
@@ -322,6 +348,7 @@ struct rockchip_mux_route_data {
 	u8 bank_num;
 	u8 pin;
 	u8 func;
+	enum rockchip_pin_route_type route_type : 8;
 	u32 route_offset;
 	u32 route_val;
 };
@@ -699,69 +726,100 @@ static struct rockchip_mux_recalced_data rk3328_mux_recalced_data[] = {
 };
 
 static struct rockchip_mux_route_data rv1126_mux_route_data[] = {
-	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x10260, RK_GENMASK_VAL(0, 0, 0)), /* I2S0_MCLK_M0 */
-	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO3, RK_PB0, RK_FUNC_3, 0x10260, RK_GENMASK_VAL(0, 0, 1)), /* I2S0_MCLK_M1 */
+	MR_TOPGRF(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x10260, RK_GENMASK_VAL(0, 0, 0)), /* I2S0_MCLK_M0 */
+	MR_TOPGRF(RK_GPIO3, RK_PB0, RK_FUNC_3, 0x10260, RK_GENMASK_VAL(0, 0, 1)), /* I2S0_MCLK_M1 */
+
+	MR_TOPGRF(RK_GPIO0, RK_PD4, RK_FUNC_4, 0x10260, RK_GENMASK_VAL(2, 3, 0)), /* I2S1_MCLK_M0 */
+	MR_TOPGRF(RK_GPIO1, RK_PD5, RK_FUNC_2, 0x10260, RK_GENMASK_VAL(2, 3, 1)), /* I2S1_MCLK_M1 */
+	MR_TOPGRF(RK_GPIO2, RK_PC7, RK_FUNC_6, 0x10260, RK_GENMASK_VAL(2, 3, 2)), /* I2S1_MCLK_M2 */
+
+	MR_TOPGRF(RK_GPIO1, RK_PD0, RK_FUNC_1, 0x10260, RK_GENMASK_VAL(4, 4, 0)), /* I2S2_MCLK_M0 */
+	MR_TOPGRF(RK_GPIO2, RK_PB3, RK_FUNC_2, 0x10260, RK_GENMASK_VAL(4, 4, 1)), /* I2S2_MCLK_M1 */
+
+	MR_TOPGRF(RK_GPIO3, RK_PD4, RK_FUNC_2, 0x10260, RK_GENMASK_VAL(12, 12, 0)), /* PDM_CLK0_M0 */
+	MR_TOPGRF(RK_GPIO3, RK_PC0, RK_FUNC_3, 0x10260, RK_GENMASK_VAL(12, 12, 1)), /* PDM_CLK0_M1 */
+
+	MR_TOPGRF(RK_GPIO3, RK_PC6, RK_FUNC_1, 0x10264, RK_GENMASK_VAL(0, 0, 0)), /* CIF_CLKOUT_M0 */
+	MR_TOPGRF(RK_GPIO2, RK_PD1, RK_FUNC_3, 0x10264, RK_GENMASK_VAL(0, 0, 1)), /* CIF_CLKOUT_M1 */
+
+	MR_TOPGRF(RK_GPIO3, RK_PA4, RK_FUNC_5, 0x10264, RK_GENMASK_VAL(4, 5, 0)), /* I2C3_SCL_M0 */
+	MR_TOPGRF(RK_GPIO2, RK_PD4, RK_FUNC_7, 0x10264, RK_GENMASK_VAL(4, 5, 1)), /* I2C3_SCL_M1 */
+	MR_TOPGRF(RK_GPIO1, RK_PD6, RK_FUNC_3, 0x10264, RK_GENMASK_VAL(4, 5, 2)), /* I2C3_SCL_M2 */
+
+	MR_TOPGRF(RK_GPIO3, RK_PA0, RK_FUNC_7, 0x10264, RK_GENMASK_VAL(6, 6, 0)), /* I2C4_SCL_M0 */
+	MR_TOPGRF(RK_GPIO4, RK_PA0, RK_FUNC_4, 0x10264, RK_GENMASK_VAL(6, 6, 1)), /* I2C4_SCL_M1 */
 
-	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO0, RK_PD4, RK_FUNC_4, 0x10260, RK_GENMASK_VAL(2, 3, 0)), /* I2S1_MCLK_M0 */
-	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO1, RK_PD5, RK_FUNC_2, 0x10260, RK_GENMASK_VAL(2, 3, 1)), /* I2S1_MCLK_M1 */
-	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO2, RK_PC7, RK_FUNC_6, 0x10260, RK_GENMASK_VAL(2, 3, 2)), /* I2S1_MCLK_M2 */
+	MR_TOPGRF(RK_GPIO2, RK_PA5, RK_FUNC_7, 0x10264, RK_GENMASK_VAL(8, 9, 0)), /* I2C5_SCL_M0 */
+	MR_TOPGRF(RK_GPIO3, RK_PB0, RK_FUNC_5, 0x10264, RK_GENMASK_VAL(8, 9, 1)), /* I2C5_SCL_M1 */
+	MR_TOPGRF(RK_GPIO1, RK_PD0, RK_FUNC_4, 0x10264, RK_GENMASK_VAL(8, 9, 2)), /* I2C5_SCL_M2 */
 
-	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO1, RK_PD0, RK_FUNC_1, 0x10260, RK_GENMASK_VAL(4, 4, 0)), /* I2S2_MCLK_M0 */
-	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO2, RK_PB3, RK_FUNC_2, 0x10260, RK_GENMASK_VAL(4, 4, 1)), /* I2S2_MCLK_M1 */
+	MR_TOPGRF(RK_GPIO3, RK_PC0, RK_FUNC_5, 0x10264, RK_GENMASK_VAL(10, 11, 0)), /* SPI1_CLK_M0 */
+	MR_TOPGRF(RK_GPIO1, RK_PC6, RK_FUNC_3, 0x10264, RK_GENMASK_VAL(10, 11, 1)), /* SPI1_CLK_M1 */
+	MR_TOPGRF(RK_GPIO2, RK_PD5, RK_FUNC_6, 0x10264, RK_GENMASK_VAL(10, 11, 2)), /* SPI1_CLK_M2 */
 
-	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO3, RK_PD4, RK_FUNC_2, 0x10260, RK_GENMASK_VAL(12, 12, 0)), /* PDM_CLK0_M0 */
-	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO3, RK_PC0, RK_FUNC_3, 0x10260, RK_GENMASK_VAL(12, 12, 1)), /* PDM_CLK0_M1 */
+	MR_TOPGRF(RK_GPIO3, RK_PC0, RK_FUNC_2, 0x10264, RK_GENMASK_VAL(12, 12, 0)), /* RGMII_CLK_M0 */
+	MR_TOPGRF(RK_GPIO2, RK_PB7, RK_FUNC_2, 0x10264, RK_GENMASK_VAL(12, 12, 1)), /* RGMII_CLK_M1 */
 
-	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO3, RK_PC6, RK_FUNC_1, 0x10264, RK_GENMASK_VAL(0, 0, 0)), /* CIF_CLKOUT_M0 */
-	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO2, RK_PD1, RK_FUNC_3, 0x10264, RK_GENMASK_VAL(0, 0, 1)), /* CIF_CLKOUT_M1 */
+	MR_TOPGRF(RK_GPIO3, RK_PA1, RK_FUNC_3, 0x10264, RK_GENMASK_VAL(13, 13, 0)), /* CAN_TXD_M0 */
+	MR_TOPGRF(RK_GPIO3, RK_PA7, RK_FUNC_5, 0x10264, RK_GENMASK_VAL(13, 13, 1)), /* CAN_TXD_M1 */
 
-	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO3, RK_PA4, RK_FUNC_5, 0x10264, RK_GENMASK_VAL(4, 5, 0)), /* I2C3_SCL_M0 */
-	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO2, RK_PD4, RK_FUNC_7, 0x10264, RK_GENMASK_VAL(4, 5, 1)), /* I2C3_SCL_M1 */
-	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO1, RK_PD6, RK_FUNC_3, 0x10264, RK_GENMASK_VAL(4, 5, 2)), /* I2C3_SCL_M2 */
+	MR_TOPGRF(RK_GPIO3, RK_PA4, RK_FUNC_6, 0x10268, RK_GENMASK_VAL(0, 0, 0)), /* PWM8_M0 */
+	MR_TOPGRF(RK_GPIO2, RK_PD7, RK_FUNC_5, 0x10268, RK_GENMASK_VAL(0, 0, 1)), /* PWM8_M1 */
 
-	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO3, RK_PA0, RK_FUNC_7, 0x10264, RK_GENMASK_VAL(6, 6, 0)), /* I2C4_SCL_M0 */
-	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO4, RK_PA0, RK_FUNC_4, 0x10264, RK_GENMASK_VAL(6, 6, 1)), /* I2C4_SCL_M1 */
+	MR_TOPGRF(RK_GPIO3, RK_PA5, RK_FUNC_6, 0x10268, RK_GENMASK_VAL(2, 2, 0)), /* PWM9_M0 */
+	MR_TOPGRF(RK_GPIO2, RK_PD6, RK_FUNC_5, 0x10268, RK_GENMASK_VAL(2, 2, 1)), /* PWM9_M1 */
 
-	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO2, RK_PA5, RK_FUNC_7, 0x10264, RK_GENMASK_VAL(8, 9, 0)), /* I2C5_SCL_M0 */
-	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO3, RK_PB0, RK_FUNC_5, 0x10264, RK_GENMASK_VAL(8, 9, 1)), /* I2C5_SCL_M1 */
-	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO1, RK_PD0, RK_FUNC_4, 0x10264, RK_GENMASK_VAL(8, 9, 2)), /* I2C5_SCL_M2 */
+	MR_TOPGRF(RK_GPIO3, RK_PA6, RK_FUNC_6, 0x10268, RK_GENMASK_VAL(4, 4, 0)), /* PWM10_M0 */
+	MR_TOPGRF(RK_GPIO2, RK_PD5, RK_FUNC_5, 0x10268, RK_GENMASK_VAL(4, 4, 1)), /* PWM10_M1 */
 
-	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO3, RK_PC0, RK_FUNC_5, 0x10264, RK_GENMASK_VAL(10, 11, 0)), /* SPI1_CLK_M0 */
-	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO1, RK_PC6, RK_FUNC_3, 0x10264, RK_GENMASK_VAL(10, 11, 1)), /* SPI1_CLK_M1 */
-	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO2, RK_PD5, RK_FUNC_6, 0x10264, RK_GENMASK_VAL(10, 11, 2)), /* SPI1_CLK_M2 */
+	MR_TOPGRF(RK_GPIO3, RK_PA7, RK_FUNC_6, 0x10268, RK_GENMASK_VAL(6, 6, 0)), /* PWM11_IR_M0 */
+	MR_TOPGRF(RK_GPIO3, RK_PA1, RK_FUNC_5, 0x10268, RK_GENMASK_VAL(6, 6, 1)), /* PWM11_IR_M1 */
 
-	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO3, RK_PC0, RK_FUNC_2, 0x10264, RK_GENMASK_VAL(12, 12, 0)), /* RGMII_CLK_M0 */
-	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO2, RK_PB7, RK_FUNC_2, 0x10264, RK_GENMASK_VAL(12, 12, 1)), /* RGMII_CLK_M1 */
+	MR_TOPGRF(RK_GPIO1, RK_PA5, RK_FUNC_3, 0x10268, RK_GENMASK_VAL(8, 8, 0)), /* UART2_TX_M0 */
+	MR_TOPGRF(RK_GPIO3, RK_PA2, RK_FUNC_1, 0x10268, RK_GENMASK_VAL(8, 8, 1)), /* UART2_TX_M1 */
 
-	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO3, RK_PA1, RK_FUNC_3, 0x10264, RK_GENMASK_VAL(13, 13, 0)), /* CAN_TXD_M0 */
-	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO3, RK_PA7, RK_FUNC_5, 0x10264, RK_GENMASK_VAL(13, 13, 1)), /* CAN_TXD_M1 */
+	MR_TOPGRF(RK_GPIO3, RK_PC6, RK_FUNC_3, 0x10268, RK_GENMASK_VAL(10, 11, 0)), /* UART3_TX_M0 */
+	MR_TOPGRF(RK_GPIO1, RK_PA7, RK_FUNC_2, 0x10268, RK_GENMASK_VAL(10, 11, 1)), /* UART3_TX_M1 */
+	MR_TOPGRF(RK_GPIO3, RK_PA0, RK_FUNC_4, 0x10268, RK_GENMASK_VAL(10, 11, 2)), /* UART3_TX_M2 */
 
-	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO3, RK_PA4, RK_FUNC_6, 0x10268, RK_GENMASK_VAL(0, 0, 0)), /* PWM8_M0 */
-	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO2, RK_PD7, RK_FUNC_5, 0x10268, RK_GENMASK_VAL(0, 0, 1)), /* PWM8_M1 */
+	MR_TOPGRF(RK_GPIO3, RK_PA4, RK_FUNC_4, 0x10268, RK_GENMASK_VAL(12, 13, 0)), /* UART4_TX_M0 */
+	MR_TOPGRF(RK_GPIO2, RK_PA6, RK_FUNC_4, 0x10268, RK_GENMASK_VAL(12, 13, 1)), /* UART4_TX_M1 */
+	MR_TOPGRF(RK_GPIO1, RK_PD5, RK_FUNC_3, 0x10268, RK_GENMASK_VAL(12, 13, 2)), /* UART4_TX_M2 */
 
-	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO3, RK_PA5, RK_FUNC_6, 0x10268, RK_GENMASK_VAL(2, 2, 0)), /* PWM9_M0 */
-	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO2, RK_PD6, RK_FUNC_5, 0x10268, RK_GENMASK_VAL(2, 2, 1)), /* PWM9_M1 */
+	MR_TOPGRF(RK_GPIO3, RK_PA6, RK_FUNC_4, 0x10268, RK_GENMASK_VAL(14, 15, 0)), /* UART5_TX_M0 */
+	MR_TOPGRF(RK_GPIO2, RK_PB0, RK_FUNC_4, 0x10268, RK_GENMASK_VAL(14, 15, 1)), /* UART5_TX_M1 */
+	MR_TOPGRF(RK_GPIO2, RK_PA0, RK_FUNC_3, 0x10268, RK_GENMASK_VAL(14, 15, 2)), /* UART5_TX_M2 */
 
-	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO3, RK_PA6, RK_FUNC_6, 0x10268, RK_GENMASK_VAL(4, 4, 0)), /* PWM10_M0 */
-	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO2, RK_PD5, RK_FUNC_5, 0x10268, RK_GENMASK_VAL(4, 4, 1)), /* PWM10_M1 */
+	MR_PMUGRF(RK_GPIO0, RK_PB6, RK_FUNC_3, 0x0114, RK_GENMASK_VAL(0, 0, 0)), /* PWM0_M0 */
+	MR_PMUGRF(RK_GPIO2, RK_PB3, RK_FUNC_5, 0x0114, RK_GENMASK_VAL(0, 0, 1)), /* PWM0_M1 */
 
-	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO3, RK_PA7, RK_FUNC_6, 0x10268, RK_GENMASK_VAL(6, 6, 0)), /* PWM11_IR_M0 */
-	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO3, RK_PA1, RK_FUNC_5, 0x10268, RK_GENMASK_VAL(6, 6, 1)), /* PWM11_IR_M1 */
+	MR_PMUGRF(RK_GPIO0, RK_PB7, RK_FUNC_3, 0x0114, RK_GENMASK_VAL(2, 2, 0)), /* PWM1_M0 */
+	MR_PMUGRF(RK_GPIO2, RK_PB2, RK_FUNC_5, 0x0114, RK_GENMASK_VAL(2, 2, 1)), /* PWM1_M1 */
 
-	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO1, RK_PA5, RK_FUNC_3, 0x10268, RK_GENMASK_VAL(8, 8, 0)), /* UART2_TX_M0 */
-	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO3, RK_PA2, RK_FUNC_1, 0x10268, RK_GENMASK_VAL(8, 8, 1)), /* UART2_TX_M1 */
+	MR_PMUGRF(RK_GPIO0, RK_PC0, RK_FUNC_3, 0x0114, RK_GENMASK_VAL(4, 4, 0)), /* PWM2_M0 */
+	MR_PMUGRF(RK_GPIO2, RK_PB1, RK_FUNC_5, 0x0114, RK_GENMASK_VAL(4, 4, 1)), /* PWM2_M1 */
 
-	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO3, RK_PC6, RK_FUNC_3, 0x10268, RK_GENMASK_VAL(10, 11, 0)), /* UART3_TX_M0 */
-	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO1, RK_PA7, RK_FUNC_2, 0x10268, RK_GENMASK_VAL(10, 11, 1)), /* UART3_TX_M1 */
-	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO3, RK_PA0, RK_FUNC_4, 0x10268, RK_GENMASK_VAL(10, 11, 2)), /* UART3_TX_M2 */
+	MR_PMUGRF(RK_GPIO0, RK_PC1, RK_FUNC_3, 0x0114, RK_GENMASK_VAL(6, 6, 0)), /* PWM3_IR_M0 */
+	MR_PMUGRF(RK_GPIO2, RK_PB0, RK_FUNC_5, 0x0114, RK_GENMASK_VAL(6, 6, 1)), /* PWM3_IR_M1 */
 
-	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO3, RK_PA4, RK_FUNC_4, 0x10268, RK_GENMASK_VAL(12, 13, 0)), /* UART4_TX_M0 */
-	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO2, RK_PA6, RK_FUNC_4, 0x10268, RK_GENMASK_VAL(12, 13, 1)), /* UART4_TX_M1 */
-	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO1, RK_PD5, RK_FUNC_3, 0x10268, RK_GENMASK_VAL(12, 13, 2)), /* UART4_TX_M2 */
+	MR_PMUGRF(RK_GPIO0, RK_PC2, RK_FUNC_3, 0x0114, RK_GENMASK_VAL(8, 8, 0)), /* PWM4_M0 */
+	MR_PMUGRF(RK_GPIO2, RK_PA7, RK_FUNC_5, 0x0114, RK_GENMASK_VAL(8, 8, 1)), /* PWM4_M1 */
 
-	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO3, RK_PA6, RK_FUNC_4, 0x10268, RK_GENMASK_VAL(14, 15, 0)), /* UART5_TX_M0 */
-	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO2, RK_PB0, RK_FUNC_4, 0x10268, RK_GENMASK_VAL(14, 15, 1)), /* UART5_TX_M1 */
-	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO2, RK_PA0, RK_FUNC_3, 0x10268, RK_GENMASK_VAL(14, 15, 2)), /* UART5_TX_M2 */
+	MR_PMUGRF(RK_GPIO0, RK_PC3, RK_FUNC_3, 0x0114, RK_GENMASK_VAL(10, 10, 0)), /* PWM5_M0 */
+	MR_PMUGRF(RK_GPIO2, RK_PA6, RK_FUNC_5, 0x0114, RK_GENMASK_VAL(10, 10, 1)), /* PWM5_M1 */
+
+	MR_PMUGRF(RK_GPIO0, RK_PB2, RK_FUNC_3, 0x0114, RK_GENMASK_VAL(12, 12, 0)), /* PWM6_M0 */
+	MR_PMUGRF(RK_GPIO2, RK_PD4, RK_FUNC_5, 0x0114, RK_GENMASK_VAL(12, 12, 1)), /* PWM6_M1 */
+
+	MR_PMUGRF(RK_GPIO0, RK_PB1, RK_FUNC_3, 0x0114, RK_GENMASK_VAL(14, 14, 0)), /* PWM7_IR_M0 */
+	MR_PMUGRF(RK_GPIO3, RK_PA0, RK_FUNC_5, 0x0114, RK_GENMASK_VAL(14, 14, 1)), /* PWM7_IR_M1 */
+
+	MR_PMUGRF(RK_GPIO0, RK_PB0, RK_FUNC_1, 0x0118, RK_GENMASK_VAL(0, 1, 0)), /* SPI0_CLK_M0 */
+	MR_PMUGRF(RK_GPIO2, RK_PA1, RK_FUNC_1, 0x0118, RK_GENMASK_VAL(0, 1, 1)), /* SPI0_CLK_M1 */
+	MR_PMUGRF(RK_GPIO2, RK_PB2, RK_FUNC_6, 0x0118, RK_GENMASK_VAL(0, 1, 2)), /* SPI0_CLK_M2 */
+
+	MR_PMUGRF(RK_GPIO0, RK_PB6, RK_FUNC_2, 0x0118, RK_GENMASK_VAL(2, 2, 0)), /* UART1_TX_M0 */
+	MR_PMUGRF(RK_GPIO1, RK_PD0, RK_FUNC_5, 0x0118, RK_GENMASK_VAL(2, 2, 1)), /* UART1_TX_M1 */
 };
 
 static void rockchip_get_recalced_mux(struct rockchip_pin_bank *bank, int pin,
@@ -1495,8 +1553,9 @@ static struct rockchip_mux_route_data rk3399_mux_route_data[] = {
 	},
 };
 
-static bool rockchip_get_mux_route(struct rockchip_pin_bank *bank, int pin,
-				   int mux, u32 *reg, u32 *value)
+static enum rockchip_pin_route_type
+rockchip_get_mux_route(struct rockchip_pin_bank *bank, int pin,
+		       int mux, u32 *reg, u32 *value)
 {
 	struct rockchip_pinctrl_priv *priv = bank->priv;
 	struct rockchip_pin_ctrl *ctrl = priv->ctrl;
@@ -1511,12 +1570,12 @@ static bool rockchip_get_mux_route(struct rockchip_pin_bank *bank, int pin,
 	}
 
 	if (i >= ctrl->niomux_routes)
-		return false;
+		return ROUTE_TYPE_INVALID;
 
 	*reg = data->route_offset;
 	*value = data->route_val;
 
-	return true;
+	return data->route_type;
 }
 
 static int rockchip_get_mux(struct rockchip_pin_bank *bank, int pin)
@@ -1625,7 +1684,7 @@ static int rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
 	struct regmap *regmap;
 	int reg, ret, mask, mux_type;
 	u8 bit;
-	u32 data, route_reg, route_val;
+	u32 data;
 
 	ret = rockchip_verify_mux(bank, pin, mux);
 	if (ret < 0)
@@ -1665,11 +1724,23 @@ static int rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
 		rockchip_get_recalced_mux(bank, pin, &reg, &bit, &mask);
 
 	if (bank->route_mask & BIT(pin)) {
-		if (rockchip_get_mux_route(bank, pin, mux, &route_reg,
-					   &route_val)) {
-			ret = regmap_write(regmap, route_reg, route_val);
-			if (ret)
-				return ret;
+		u32 route_reg = 0, route_val = 0;
+
+		ret = rockchip_get_mux_route(bank, pin, mux,
+					     &route_reg, &route_val);
+		switch (ret) {
+		case ROUTE_TYPE_DEFAULT:
+			regmap_write(regmap, route_reg, route_val);
+			break;
+		case ROUTE_TYPE_TOPGRF:
+			regmap_write(priv->regmap_base, route_reg, route_val);
+			break;
+		case ROUTE_TYPE_PMUGRF:
+			regmap_write(priv->regmap_pmu, route_reg, route_val);
+			break;
+		case ROUTE_TYPE_INVALID: /* Fall through */
+		default:
+			break;
 		}
 	}
 

commit cef897f0d41f4e6896ca7ca17195afec38923ac0
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Tue Apr 14 08:30:40 2020 +0800

    pinctrl: rockchip: fix RK_GENMASK_VAL error
    
    Change-Id: I48daafd57c96dcd2a0a8560d649daa7cb08dd4e7
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index debd3e7562..66309eea06 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -33,8 +33,8 @@ enum rockchip_pinctrl_type {
 	RK3399,
 };
 
-#define RK_GENMASK_VAL(l, h, v) \
-	(GENMASK((h) + 16, (l) + 16) | (((v) << (l) & GENMASK(h, l))))
+#define RK_GENMASK_VAL(h, l, v) \
+	(GENMASK(((h) + 16), ((l) + 16)) | (((v) << (l)) & GENMASK((h), (l))))
 
 /**
  * Encode variants of iomux registers into a type variable

commit fa9880d0ecf71c3a3b0d5f315daa76f26b0b3a2e
Merge: a9017bd54b 30374393f3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 13 20:35:56 2020 +0800

    Merge branch 'next-dev' into thunder-boot

commit 30374393f3cc5ab7238c8c1da20eea16ccbdde2e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 13 19:48:07 2020 +0800

    scripts: fit: update rollback-index error msg
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I721c9c262fa8683d75f7d2413b6fecfcdf0cb28c

diff --git a/scripts/fit-base.sh b/scripts/fit-base.sh
index d524198a9c..44657216d7 100755
--- a/scripts/fit-base.sh
+++ b/scripts/fit-base.sh
@@ -161,7 +161,7 @@ function fit_uboot_make_itb()
 		if grep  -q '^CONFIG_SPL_FIT_ROLLBACK_PROTECT=y' .config ; then
 			SPL_ROLLBACK_PROTECT="y"
 			if [ -z $ARG_ROLLBACK_IDX_UBOOT ]; then
-				echo "ERROR: No args \"--rollback-index-uboot <n>\""
+				echo "ERROR: No args \"--rollback-index <n>\""
 				exit 1
 			fi
 		fi
@@ -256,7 +256,7 @@ function fit_boot_make_itb()
 		if grep -q '^CONFIG_FIT_ROLLBACK_PROTECT=y' .config ; then
 			ROLLBACK_PROTECT="y"
 			if [ -z $ARG_ROLLBACK_IDX_BOOT ]; then
-				echo "ERROR: No args \"--rollback-index-boot <n>\""
+				echo "ERROR: No args \"--rollback-index <n>\""
 				exit 1
 			fi
 		fi

commit a9017bd54bce8e513a43bc3de81fc150a67dc4fd
Merge: 8bb63dbcf4 0a7542b5fd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 13 19:38:06 2020 +0800

    Merge branch 'next-dev' into thunder-boot

commit 0a7542b5fdace353065978a137a284a6bec5da3d
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Apr 10 21:22:04 2020 +0800

    rkflash: support 25Q256JWEQ
    
    Change-Id: I0c5feb11a3adbcbd5b82ae5adc8b322b48435847
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/sfc_nor.c b/drivers/rkflash/sfc_nor.c
index 299436cc72..d55d891212 100644
--- a/drivers/rkflash/sfc_nor.c
+++ b/drivers/rkflash/sfc_nor.c
@@ -28,6 +28,8 @@ static struct flash_info spi_flash_tbl[] = {
 	{ 0xef4018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 9, 0 },
 	/* 25Q256F/J */
 	{ 0xef4019, 128, 8, 0x13, 0x02, 0x6C, 0x32, 0x20, 0xD8, 0x3C, 16, 9, 0 },
+	/* 25Q256JWEQ*/
+	{ 0xef6019, 128, 8, 0x13, 0x02, 0x6C, 0x32, 0x20, 0xD8, 0x3C, 16, 9, 0 },
 	/* 25Q64FWSSIG */
 	{ 0xef6017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0 },
 	/* MX25L6433F */

commit 534d4d2fe4a5e261fa0525a60d163d753d1a4013
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Apr 10 21:21:09 2020 +0800

    rkflash: support transfer large size data
    
    Change-Id: I36c5daabb952215bbc4d2cb2cffb82df3fa7085a
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/sfc.c b/drivers/rkflash/sfc.c
index c0421e2bc1..e0d61446a1 100644
--- a/drivers/rkflash/sfc.c
+++ b/drivers/rkflash/sfc.c
@@ -11,6 +11,9 @@
 
 #include "sfc.h"
 
+#define SFC_MAX_IOSIZE_VER3		(1024 * 8)
+#define SFC_MAX_IOSIZE_VER4		(0xFFFFFFFF)
+
 static void __iomem *g_sfc_reg;
 
 static void sfc_reset(void)
@@ -30,11 +33,21 @@ u16 sfc_get_version(void)
 	return  (u32)(readl(g_sfc_reg + SFC_VER) & 0xffff);
 }
 
+u32 sfc_get_max_iosize(void)
+{
+	if (sfc_get_version() >= SFC_VER_4)
+		return SFC_MAX_IOSIZE_VER4;
+	else
+		return SFC_MAX_IOSIZE_VER3;
+}
+
 int sfc_init(void __iomem *reg_addr)
 {
 	g_sfc_reg = reg_addr;
 	sfc_reset();
 	writel(0, g_sfc_reg + SFC_CTRL);
+	if (sfc_get_version() >= SFC_VER_4)
+		writel(1, g_sfc_reg + SFC_LEN_CTRL);
 
 	return SFC_OK;
 }
@@ -70,6 +83,10 @@ int sfc_request(struct rk_sfc_op *op, u32 addr, void *data, u32 size)
 	/* shift in the data at negedge sclk_out */
 	op->sfctrl.d32 |= 0x2;
 	cmd.b.datasize = size;
+	if (sfc_get_version() >= SFC_VER_4)
+		writel(size, g_sfc_reg + SFC_LEN_EXT);
+	else
+		cmd.b.datasize = size;
 
 	writel(op->sfctrl.d32, g_sfc_reg + SFC_CTRL);
 	writel(cmd.d32, g_sfc_reg + SFC_CMD);
@@ -96,7 +113,7 @@ int sfc_request(struct rk_sfc_op *op, u32 addr, void *data, u32 size)
 		writel(SFC_DMA_START, g_sfc_reg + SFC_DMA_TRIGGER);
 
 		timeout = size * 10;
-		while (!((readl(g_sfc_reg + SFC_RAWISR) & DMA_INT)) &&
+		while ((readl(g_sfc_reg + SFC_SR) & SFC_BUSY) &&
 		       (timeout-- > 0))
 			sfc_delay(1);
 		writel(0xFFFFFFFF, g_sfc_reg + SFC_ICLR);
diff --git a/drivers/rkflash/sfc.h b/drivers/rkflash/sfc.h
index 0a460eb715..bcbbcc3a9f 100644
--- a/drivers/rkflash/sfc.h
+++ b/drivers/rkflash/sfc.h
@@ -7,9 +7,9 @@
 #ifndef _SFC_H
 #define _SFC_H
 
-#define SFC_VER_3		0x3 /* ver 3, else ver 1 */
+#define SFC_VER_3		0x3
+#define SFC_VER_4		0x4
 
-#define SFC_MAX_IOSIZE		(1024 * 8)    /* 8K byte */
 #define SFC_EN_INT		(0)         /* enable interrupt */
 #define SFC_EN_DMA		(1)         /* enable dma */
 #define SFC_FIFO_DEPTH		(0x10)      /* 16 words */
@@ -193,6 +193,7 @@ int sfc_init(void __iomem *reg_addr);
 int sfc_request(struct rk_sfc_op *op, u32 addr, void *data, u32 size);
 u16 sfc_get_version(void);
 void sfc_clean_irq(void);
+u32 sfc_get_max_iosize(void);
 int rksfc_get_reg_addr(unsigned long *p_sfc_addr);
 
 #endif
diff --git a/drivers/rkflash/sfc_nor.c b/drivers/rkflash/sfc_nor.c
index bbec5abdfa..299436cc72 100644
--- a/drivers/rkflash/sfc_nor.c
+++ b/drivers/rkflash/sfc_nor.c
@@ -312,7 +312,7 @@ int snor_prog_page(struct SFNOR_DEV *p_dev,
 
 	op.sfctrl.d32 = 0;
 	op.sfctrl.b.datalines = p_dev->prog_lines;
-	op.sfctrl.b.enbledma = 0;
+	op.sfctrl.b.enbledma = 1;
 	if (p_dev->prog_cmd == CMD_PAGE_PROG_A4)
 		op.sfctrl.b.addrlines = SFC_4BITS_LINE;
 
@@ -408,7 +408,7 @@ int snor_read_data(struct SFNOR_DEV *p_dev,
 	op.sfctrl.d32 = 0;
 	op.sfctrl.b.datalines = p_dev->read_lines;
 	if (!(size & 0x3) && size >= 4)
-		op.sfctrl.b.enbledma = 0;
+		op.sfctrl.b.enbledma = 1;
 
 	if (p_dev->read_cmd == CMD_FAST_READ_X1 ||
 	    p_dev->read_cmd == CMD_FAST_READ_X4 ||
@@ -445,7 +445,7 @@ int snor_read(struct SFNOR_DEV *p_dev, u32 sec, u32 n_sec, void *p_data)
 	addr = sec << 9;
 	size = n_sec << 9;
 	while (size) {
-		len = size < SFC_MAX_IOSIZE ? size : SFC_MAX_IOSIZE;
+		len = size < p_dev->max_iosize ? size : p_dev->max_iosize;
 		ret = snor_read_data(p_dev, addr, p_buf, len);
 		if (ret != SFC_OK) {
 			rkflash_print_error("snor_read_data %x ret= %x\n",
@@ -586,6 +586,7 @@ int snor_init(struct SFNOR_DEV *p_dev)
 		return SFC_PARAM_ERR;
 
 	memset((void *)p_dev, 0, sizeof(struct SFNOR_DEV));
+	p_dev->max_iosize = sfc_get_max_iosize();
 	snor_read_id(id_byte);
 	rkflash_print_error("sfc nor id: %x %x %x\n",
 			    id_byte[0], id_byte[1], id_byte[2]);
diff --git a/drivers/rkflash/sfc_nor.h b/drivers/rkflash/sfc_nor.h
index 0b4e369826..6c91bb2eaf 100644
--- a/drivers/rkflash/sfc_nor.h
+++ b/drivers/rkflash/sfc_nor.h
@@ -112,6 +112,7 @@ struct SFNOR_DEV {
 	enum SFC_DATA_LINES prog_lines;
 
 	SNOR_WRITE_STATUS write_status;
+	u32 max_iosize;
 };
 
 struct flash_info {

commit 58463f4dec02d3dcdfaa8c647010490edd3b4092
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Apr 10 21:18:18 2020 +0800

    rkflash: change to use rk_sfc_op for request
    
    Change-Id: I20cc6b3cf4b49a9ca96af5170af8b7b554071a6f
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/sfc.c b/drivers/rkflash/sfc.c
index f913112e96..c0421e2bc1 100644
--- a/drivers/rkflash/sfc.c
+++ b/drivers/rkflash/sfc.c
@@ -45,7 +45,7 @@ void sfc_clean_irq(void)
 	writel(0xFFFFFFFF, g_sfc_reg + SFC_IMR);
 }
 
-int sfc_request(u32 sfcmd, u32 sfctrl, u32 addr, void *data)
+int sfc_request(struct rk_sfc_op *op, u32 addr, void *data, u32 size)
 {
 	int ret = SFC_OK;
 	union SFCCMD_DATA cmd;
@@ -57,26 +57,27 @@ int sfc_request(u32 sfcmd, u32 sfctrl, u32 addr, void *data)
 	    (readl(g_sfc_reg + SFC_SR) & SFC_BUSY))
 		sfc_reset();
 
-	cmd.d32 = sfcmd;
+	cmd.d32 = op->sfcmd.d32;
 	if (cmd.b.addrbits == SFC_ADDR_XBITS) {
 		union SFCCTRL_DATA ctrl;
 
-		ctrl.d32 = sfctrl;
+		ctrl.d32 = op->sfctrl.d32;
 		if (!ctrl.b.addrbits)
 			return SFC_PARAM_ERR;
 		/* Controller plus 1 automatically */
 		writel(ctrl.b.addrbits - 1, g_sfc_reg + SFC_ABIT);
 	}
 	/* shift in the data at negedge sclk_out */
-	sfctrl |= 0x2;
+	op->sfctrl.d32 |= 0x2;
+	cmd.b.datasize = size;
 
-	writel(sfctrl, g_sfc_reg + SFC_CTRL);
-	writel(sfcmd, g_sfc_reg + SFC_CMD);
+	writel(op->sfctrl.d32, g_sfc_reg + SFC_CTRL);
+	writel(cmd.d32, g_sfc_reg + SFC_CMD);
 	if (cmd.b.addrbits)
 		writel(addr, g_sfc_reg + SFC_ADDR);
-	if (!cmd.b.datasize)
+	if (!size)
 		goto exit_wait;
-	if (SFC_ENABLE_DMA & sfctrl) {
+	if (op->sfctrl.b.enbledma) {
 		struct bounce_buffer bb;
 		unsigned int bb_flags;
 
@@ -85,17 +86,17 @@ int sfc_request(u32 sfcmd, u32 sfctrl, u32 addr, void *data)
 		else
 			bb_flags = GEN_BB_WRITE;
 
-		ret = bounce_buffer_start(&bb, data, cmd.b.datasize, bb_flags);
+		ret = bounce_buffer_start(&bb, data, size, bb_flags);
 		if (ret)
 			return ret;
 
 		writel(0xFFFFFFFF, g_sfc_reg + SFC_ICLR);
-		writel(~((u32)FINISH_INT), g_sfc_reg + SFC_IMR);
+		writel(~((u32)DMA_INT), g_sfc_reg + SFC_IMR);
 		writel((unsigned long)bb.bounce_buffer, g_sfc_reg + SFC_DMA_ADDR);
 		writel(SFC_DMA_START, g_sfc_reg + SFC_DMA_TRIGGER);
 
-		timeout = cmd.b.datasize * 10;
-		while ((readl(g_sfc_reg + SFC_SR) & SFC_BUSY) &&
+		timeout = size * 10;
+		while (!((readl(g_sfc_reg + SFC_RAWISR) & DMA_INT)) &&
 		       (timeout-- > 0))
 			sfc_delay(1);
 		writel(0xFFFFFFFF, g_sfc_reg + SFC_ICLR);
@@ -108,7 +109,7 @@ int sfc_request(u32 sfcmd, u32 sfctrl, u32 addr, void *data)
 		u32 *p_data = (u32 *)data;
 
 		if (cmd.b.rw == SFC_WRITE) {
-			words  = (cmd.b.datasize + 3) >> 2;
+			words  = (size + 3) >> 2;
 			while (words) {
 				fifostat.d32 = readl(g_sfc_reg + SFC_FSR);
 				if (fifostat.b.txlevel > 0) {
@@ -132,8 +133,8 @@ int sfc_request(u32 sfcmd, u32 sfctrl, u32 addr, void *data)
 			}
 		} else {
 			/* SFC_READ == cmd.b.rw */
-			bytes = cmd.b.datasize & 0x3;
-			words = cmd.b.datasize >> 2;
+			bytes = size & 0x3;
+			words = size >> 2;
 			while (words) {
 				fifostat.d32 = readl(g_sfc_reg + SFC_FSR);
 				if (fifostat.b.rxlevel > 0) {
@@ -183,7 +184,7 @@ int sfc_request(u32 sfcmd, u32 sfctrl, u32 addr, void *data)
 
 exit_wait:
 	timeout = 0;    /* wait cmd or data send complete */
-	while (!(readl(g_sfc_reg + SFC_FSR) & SFC_TXEMPTY)) {
+	while (readl(g_sfc_reg + SFC_SR) & SFC_BUSY) {
 		sfc_delay(1);
 		if (timeout++ > 100000) {         /* wait 100ms */
 			ret = SFC_TX_TIMEOUT;
diff --git a/drivers/rkflash/sfc.h b/drivers/rkflash/sfc.h
index 4ad808f856..0a460eb715 100644
--- a/drivers/rkflash/sfc.h
+++ b/drivers/rkflash/sfc.h
@@ -90,6 +90,8 @@
 #define SFC_QOP		0x30
 #define SFC_DMA_TRIGGER	0x80
 #define SFC_DMA_ADDR	0x84
+#define SFC_LEN_CTRL	0x88
+#define SFC_LEN_EXT	0x8C
 #define SFC_CMD		0x100
 #define SFC_ADDR	0x104
 #define SFC_DATA	0x108
@@ -182,8 +184,13 @@ union SFCCMD_DATA {
 	} b;
 };
 
+struct rk_sfc_op {
+	union SFCCMD_DATA sfcmd;
+	union SFCCTRL_DATA sfctrl;
+};
+
 int sfc_init(void __iomem *reg_addr);
-int sfc_request(u32 sfcmd, u32 sfctrl, u32 addr, void *data);
+int sfc_request(struct rk_sfc_op *op, u32 addr, void *data, u32 size);
 u16 sfc_get_version(void);
 void sfc_clean_irq(void);
 int rksfc_get_reg_addr(unsigned long *p_sfc_addr);
diff --git a/drivers/rkflash/sfc_nand.c b/drivers/rkflash/sfc_nand.c
index 3aedeedee4..01f9e8b142 100644
--- a/drivers/rkflash/sfc_nand.c
+++ b/drivers/rkflash/sfc_nand.c
@@ -34,7 +34,7 @@ static struct nand_info spi_nand_tbl[] = {
 	/* IS37SML01G1 */
 	{0xC821, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x00, 18, 1, 0xFF, 0xFF, {8, 12, 0xff, 0xff}, &sfc_nand_ecc_status_sp1},
 	/* W25N01GV */
-	{0xEFAA, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xFF, 0xFF, {4, 20, 0xff, 0xff}, &sfc_nand_ecc_status_sp1},
+	{0xEFAA, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xFF, 0xFF, {4, 20, 36, 0xff}, &sfc_nand_ecc_status_sp1},
 	/* HYF2GQ4UAACAE */
 	{0xC952, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 14, 0xB0, 0, {4, 36, 0xff, 0xff}, NULL},
 	/* HYF2GQ4UDACAE */
@@ -87,6 +87,8 @@ static struct nand_info spi_nand_tbl[] = {
 	{0x98E2, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 8, 0xFF, 0xFF, {4, 8, 0xff, 0xff}, NULL},
 	/* XT26G04A */
 	{0x0BE3, 4, 128, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 20, 1, 0xB0, 0x0, {8, 12, 0xff, 0xff}, &sfc_nand_ecc_status_sp4},
+	/* FS35ND01G-S1Y2 */
+	{0xCDEA, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 4, 0xFF, 0xFF, {4, 8, 12, 16}, &sfc_nand_ecc_status_sp1},
 };
 
 static struct nand_info *p_nand_info;
@@ -108,43 +110,49 @@ static struct nand_info *sfc_nand_get_info(u8 *nand_id)
 static int sfc_nand_write_en(void)
 {
 	int ret;
-	union SFCCMD_DATA sfcmd;
+	struct rk_sfc_op op;
 
-	sfcmd.d32 = 0;
-	sfcmd.b.cmd = CMD_WRITE_EN;
-	ret = sfc_request(sfcmd.d32, 0, 0, NULL);
+	op.sfcmd.d32 = 0;
+	op.sfcmd.b.cmd = CMD_WRITE_EN;
+
+	op.sfctrl.d32 = 0;
+
+	ret = sfc_request(&op, 0, NULL, 0);
 	return ret;
 }
 
 static int sfc_nand_rw_preset(void)
 {
 	int ret;
-	union SFCCTRL_DATA sfctrl;
-	union SFCCMD_DATA sfcmd;
+	struct rk_sfc_op op;
 	u8 status = 0xFF;
 
-	sfcmd.d32 = 0;
-	sfcmd.b.cmd = 0;
-	sfcmd.b.datasize = 1;
-	sfcmd.b.rw = SFC_WRITE;
+	op.sfcmd.d32 = 0;
+	op.sfcmd.b.cmd = 0;
+	op.sfcmd.b.rw = SFC_WRITE;
 
-	sfctrl.b.datalines = 2;
-	ret = sfc_request(sfcmd.d32, sfctrl.d32, 0, &status);
+	op.sfctrl.d32 = 0;
+	op.sfctrl.b.datalines = 2;
+
+	ret = sfc_request(&op, 0, &status, 1);
 	return ret;
 }
 
 static int sfc_nand_read_feature(u8 addr, u8 *data)
 {
 	int ret;
-	union SFCCMD_DATA sfcmd;
+	struct rk_sfc_op op;
+
+	op.sfcmd.d32 = 0;
+	op.sfcmd.b.cmd = 0x0F;
+	op.sfcmd.b.addrbits = SFC_ADDR_XBITS;
+
+	op.sfctrl.d32 = 0;
+	op.sfctrl.b.addrbits = 8;
 
-	sfcmd.d32 = 0;
-	sfcmd.b.cmd = 0x0F;
-	sfcmd.b.datasize = 1;
-	sfcmd.b.addrbits = SFC_ADDR_XBITS;
 	*data = 0;
 
-	ret = sfc_request(sfcmd.d32, 0x8 << 16, addr, data);
+	ret = sfc_request(&op, addr, data, 1);
 	if (ret != SFC_OK)
 		return ret;
 	return SFC_OK;
@@ -153,17 +161,19 @@ static int sfc_nand_read_feature(u8 addr, u8 *data)
 static int sfc_nand_write_feature(u32 addr, u8 status)
 {
 	int ret;
-	union SFCCMD_DATA sfcmd;
+	struct rk_sfc_op op;
 
 	sfc_nand_write_en();
 
-	sfcmd.d32 = 0;
-	sfcmd.b.cmd = 0x1F;
-	sfcmd.b.datasize = 1;
-	sfcmd.b.addrbits = SFC_ADDR_XBITS;
-	sfcmd.b.rw = SFC_WRITE;
+	op.sfcmd.d32 = 0;
+	op.sfcmd.b.cmd = 0x1F;
+	op.sfcmd.b.addrbits = SFC_ADDR_XBITS;
+	op.sfcmd.b.rw = SFC_WRITE;
+
+	op.sfctrl.d32 = 0;
+	op.sfctrl.b.addrbits = 8;
 
-	ret = sfc_request(sfcmd.d32, 0x8 << 16, addr, &status);
+	ret = sfc_request(&op, addr, &status, 1);
 	if (ret != SFC_OK)
 		return ret;
 	return ret;
@@ -199,7 +209,7 @@ static int sfc_nand_wait_busy(u8 *data, int timeout)
  */
 static u32 sfc_nand_ecc_status(void)
 {
-	int ret;
+	u32 ret;
 	u32 i;
 	u8 ecc;
 	u8 status;
@@ -219,7 +229,7 @@ static u32 sfc_nand_ecc_status(void)
 	if (ecc <= 1)
 		ret = SFC_NAND_ECC_OK;
 	else if (ecc == 2)
-		ret = SFC_NAND_ECC_ERROR;
+		ret = (u32)SFC_NAND_ECC_ERROR;
 	else
 		ret = SFC_NAND_ECC_REFRESH;
 
@@ -237,7 +247,7 @@ static u32 sfc_nand_ecc_status(void)
  */
 u32 sfc_nand_ecc_status_sp1(void)
 {
-	int ret;
+	u32 ret;
 	u32 i;
 	u8 ecc;
 	u8 status;
@@ -259,7 +269,7 @@ u32 sfc_nand_ecc_status_sp1(void)
 	else if (ecc == 1)
 		ret = SFC_NAND_ECC_REFRESH;
 	else
-		ret = SFC_NAND_ECC_ERROR;
+		ret = (u32)SFC_NAND_ECC_ERROR;
 
 	return ret;
 }
@@ -276,7 +286,7 @@ u32 sfc_nand_ecc_status_sp1(void)
  */
 u32 sfc_nand_ecc_status_sp2(void)
 {
-	int ret;
+	u32 ret;
 	u32 i;
 	u8 ecc;
 	u8 status, status1;
@@ -301,7 +311,7 @@ u32 sfc_nand_ecc_status_sp2(void)
 	else if (ecc == 7)
 		ret = SFC_NAND_ECC_REFRESH;
 	else
-		ret = SFC_NAND_ECC_ERROR;
+		ret = (u32)SFC_NAND_ECC_ERROR;
 
 	return ret;
 }
@@ -319,7 +329,7 @@ u32 sfc_nand_ecc_status_sp2(void)
  */
 u32 sfc_nand_ecc_status_sp3(void)
 {
-	int ret;
+	u32 ret;
 	u32 i;
 	u8 ecc;
 	u8 status, status1;
@@ -344,7 +354,7 @@ u32 sfc_nand_ecc_status_sp3(void)
 	else if (ecc == 7 || ecc >= 12)
 		ret = SFC_NAND_ECC_REFRESH;
 	else
-		ret = SFC_NAND_ECC_ERROR;
+		ret = (u32)SFC_NAND_ECC_ERROR;
 
 	return ret;
 }
@@ -363,7 +373,7 @@ u32 sfc_nand_ecc_status_sp3(void)
  */
 u32 sfc_nand_ecc_status_sp4(void)
 {
-	int ret;
+	u32 ret;
 	u32 i;
 	u8 ecc;
 	u8 status;
@@ -384,7 +394,7 @@ u32 sfc_nand_ecc_status_sp4(void)
 	else if (ecc == 7 || ecc == 12)
 		ret = SFC_NAND_ECC_REFRESH;
 	else
-		ret = SFC_NAND_ECC_ERROR;
+		ret = (u32)SFC_NAND_ECC_ERROR;
 
 	return ret;
 }
@@ -403,7 +413,7 @@ u32 sfc_nand_ecc_status_sp4(void)
  */
 u32 sfc_nand_ecc_status_sp5(void)
 {
-	int ret;
+	u32 ret;
 	u32 i;
 	u8 ecc;
 	u8 status;
@@ -424,7 +434,7 @@ u32 sfc_nand_ecc_status_sp5(void)
 	else if (ecc == 4)
 		ret = SFC_NAND_ECC_REFRESH;
 	else
-		ret = SFC_NAND_ECC_ERROR;
+		ret = (u32)SFC_NAND_ECC_ERROR;
 
 	return ret;
 }
@@ -432,16 +442,19 @@ u32 sfc_nand_ecc_status_sp5(void)
 u32 sfc_nand_erase_block(u8 cs, u32 addr)
 {
 	int ret;
-	union SFCCMD_DATA sfcmd;
+	struct rk_sfc_op op;
 	u8 status;
 
 	rkflash_print_dio("%s %x\n", __func__, addr);
-	sfcmd.d32 = 0;
-	sfcmd.b.cmd = p_nand_info->block_erase_cmd;
-	sfcmd.b.addrbits = SFC_ADDR_24BITS;
-	sfcmd.b.rw = SFC_WRITE;
+	op.sfcmd.d32 = 0;
+	op.sfcmd.b.cmd = p_nand_info->block_erase_cmd;
+	op.sfcmd.b.addrbits = SFC_ADDR_24BITS;
+	op.sfcmd.b.rw = SFC_WRITE;
+
+	op.sfctrl.d32 = 0;
+
 	sfc_nand_write_en();
-	ret = sfc_request(sfcmd.d32, 0, addr, NULL);
+	ret = sfc_request(&op, addr, NULL, 0);
 	if (ret != SFC_OK)
 		return ret;
 	ret = sfc_nand_wait_busy(&status, 1000 * 1000);
@@ -455,10 +468,9 @@ static u32 sfc_nand_prog_page_raw(u8 cs, u32 addr, u32 *p_page_buf)
 {
 	int ret;
 	u32 plane;
-	union SFCCMD_DATA sfcmd;
-	union SFCCTRL_DATA sfctrl;
+	struct rk_sfc_op op;
 	u8 status;
-	u32 sec_per_page = p_nand_info->sec_per_page;
+	u32 page_size = SFC_NAND_SECTOR_FULL_SIZE * p_nand_info->sec_per_page;
 
 	rkflash_print_dio("%s %x %x\n", __func__, addr, p_page_buf[0]);
 	sfc_nand_write_en();
@@ -467,24 +479,24 @@ static u32 sfc_nand_prog_page_raw(u8 cs, u32 addr, u32 *p_page_buf)
 	    sfc_get_version() < SFC_VER_3)
 		sfc_nand_rw_preset();
 
-	sfcmd.d32 = 0;
-	sfcmd.b.cmd = sfc_nand_dev.page_prog_cmd;
-	sfcmd.b.addrbits = SFC_ADDR_XBITS;
-	sfcmd.b.datasize = SFC_NAND_SECTOR_FULL_SIZE * sec_per_page;
-	sfcmd.b.rw = SFC_WRITE;
+	op.sfcmd.d32 = 0;
+	op.sfcmd.b.cmd = sfc_nand_dev.page_prog_cmd;
+	op.sfcmd.b.addrbits = SFC_ADDR_XBITS;
+	op.sfcmd.b.rw = SFC_WRITE;
 
-	sfctrl.d32 = 0;
-	sfctrl.b.datalines = sfc_nand_dev.prog_lines;
-	sfctrl.b.addrbits = 16;
+	op.sfctrl.d32 = 0;
+	op.sfctrl.b.datalines = sfc_nand_dev.prog_lines;
+	op.sfctrl.b.addrbits = 16;
 	plane = p_nand_info->plane_per_die == 2 ? ((addr >> 6) & 0x1) << 12 : 0;
-	sfc_request(sfcmd.d32, sfctrl.d32, plane, p_page_buf);
-
-	sfcmd.d32 = 0;
-	sfcmd.b.cmd = p_nand_info->page_prog_cmd;
-	sfcmd.b.addrbits = SFC_ADDR_24BITS;
-	sfcmd.b.datasize = 0;
-	sfcmd.b.rw = SFC_WRITE;
-	ret = sfc_request(sfcmd.d32, 0, addr, p_page_buf);
+	sfc_request(&op, plane, p_page_buf, page_size);
+
+	op.sfcmd.d32 = 0;
+	op.sfcmd.b.cmd = p_nand_info->page_prog_cmd;
+	op.sfcmd.b.addrbits = SFC_ADDR_24BITS;
+	op.sfcmd.b.rw = SFC_WRITE;
+
+	op.sfctrl.d32 = 0;
+	ret = sfc_request(&op, addr, p_page_buf, 0);
 	if (ret != SFC_OK)
 		return ret;
 	ret = sfc_nand_wait_busy(&status, 1000 * 1000);
@@ -518,18 +530,19 @@ static u32 sfc_nand_read_page_raw(u8 cs, u32 addr, u32 *p_page_buf)
 {
 	int ret;
 	u32 plane;
-	union SFCCMD_DATA sfcmd;
-	union SFCCTRL_DATA sfctrl;
+	struct rk_sfc_op op;
 	u32 ecc_result;
-	u32 sec_per_page = p_nand_info->sec_per_page;
+	u32 page_size = SFC_NAND_SECTOR_FULL_SIZE * p_nand_info->sec_per_page;
 	u8 status;
 
-	sfcmd.d32 = 0;
-	sfcmd.b.cmd = p_nand_info->page_read_cmd;
-	sfcmd.b.datasize = 0;
-	sfcmd.b.rw = SFC_WRITE;
-	sfcmd.b.addrbits = SFC_ADDR_24BITS;
-	sfc_request(sfcmd.d32, 0, addr, p_page_buf);
+	op.sfcmd.d32 = 0;
+	op.sfcmd.b.cmd = p_nand_info->page_read_cmd;
+	op.sfcmd.b.rw = SFC_WRITE;
+	op.sfcmd.b.addrbits = SFC_ADDR_24BITS;
+
+	op.sfctrl.d32 = 0;
+
+	sfc_request(&op, addr, p_page_buf, 0);
 	if (sfc_nand_dev.read_lines == DATA_LINES_X4 &&
 	    p_nand_info->feature & FEA_SOFT_QOP_BIT &&
 	    sfc_get_version() < SFC_VER_3)
@@ -541,15 +554,15 @@ static u32 sfc_nand_read_page_raw(u8 cs, u32 addr, u32 *p_page_buf)
 	else
 		ecc_result = sfc_nand_ecc_status();
 
-	sfcmd.d32 = 0;
-	sfcmd.b.cmd = sfc_nand_dev.page_read_cmd;
-	sfcmd.b.datasize = SFC_NAND_SECTOR_FULL_SIZE * sec_per_page;
-	sfcmd.b.addrbits = SFC_ADDR_24BITS;
-	sfctrl.d32 = 0;
-	sfctrl.b.datalines = sfc_nand_dev.read_lines;
+	op.sfcmd.d32 = 0;
+	op.sfcmd.b.cmd = sfc_nand_dev.page_read_cmd;
+	op.sfcmd.b.addrbits = SFC_ADDR_24BITS;
+
+	op.sfctrl.d32 = 0;
+	op.sfctrl.b.datalines = sfc_nand_dev.read_lines;
 
 	plane = p_nand_info->plane_per_die == 2 ? ((addr >> 6) & 0x1) << 12 : 0;
-	ret = sfc_request(sfcmd.d32, sfctrl.d32, plane << 8, p_page_buf);
+	ret = sfc_request(&op, plane << 8, p_page_buf, page_size);
 	rkflash_print_dio("%s %x %x\n", __func__, addr, p_page_buf[0]);
 
 	if (ret != SFC_OK)
@@ -560,7 +573,7 @@ static u32 sfc_nand_read_page_raw(u8 cs, u32 addr, u32 *p_page_buf)
 
 u32 sfc_nand_read_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
 {
-	int ret;
+	u32 ret;
 	u32 sec_per_page = p_nand_info->sec_per_page;
 	u32 data_size = sec_per_page * SFC_NAND_SECTOR_SIZE;
 	struct nand_mega_area *meta = &p_nand_info->meta;
@@ -619,14 +632,16 @@ u32 sfc_nand_mark_bad_block(u8 cs, u32 addr)
 int sfc_nand_read_id(u8 *data)
 {
 	int ret;
-	union SFCCMD_DATA sfcmd;
+	struct rk_sfc_op op;
+
+	op.sfcmd.d32 = 0;
+	op.sfcmd.b.cmd = CMD_READ_JEDECID;
+	op.sfcmd.b.addrbits = SFC_ADDR_XBITS;
 
-	sfcmd.d32 = 0;
-	sfcmd.b.cmd = CMD_READ_JEDECID;
-	sfcmd.b.datasize = 3;
-	sfcmd.b.addrbits = SFC_ADDR_XBITS;
+	op.sfctrl.d32 = 0;
+	op.sfctrl.b.addrbits = 8;
 
-	ret = sfc_request(sfcmd.d32, 0x8 << 16, 0, data);
+	ret = sfc_request(&op, 0, data, 3);
 
 	return ret;
 }
@@ -728,11 +743,11 @@ u32 sfc_nand_init(void)
 	rkflash_print_error("sfc_nand id: %x %x %x\n",
 			    id_byte[0], id_byte[1], id_byte[2]);
 	if (id_byte[0] == 0xFF || id_byte[0] == 0x00)
-		return FTL_NO_FLASH;
+		return (u32)FTL_NO_FLASH;
 
 	p_nand_info = sfc_nand_get_info(id_byte);
 	if (!p_nand_info)
-		return FTL_UNSUPPORTED_FLASH;
+		return (u32)FTL_UNSUPPORTED_FLASH;
 
 	sfc_nand_dev.manufacturer = id_byte[0];
 	sfc_nand_dev.mem_type = id_byte[1];
diff --git a/drivers/rkflash/sfc_nor.c b/drivers/rkflash/sfc_nor.c
index 8da0acee86..bbec5abdfa 100644
--- a/drivers/rkflash/sfc_nor.c
+++ b/drivers/rkflash/sfc_nor.c
@@ -85,56 +85,64 @@ static struct flash_info spi_flash_tbl[] = {
 static int snor_write_en(void)
 {
 	int ret;
-	union SFCCMD_DATA     sfcmd;
+	struct rk_sfc_op op;
 
-	sfcmd.d32 = 0;
-	sfcmd.b.cmd = CMD_WRITE_EN;
+	op.sfcmd.d32 = 0;
+	op.sfcmd.b.cmd = CMD_WRITE_EN;
 
-	ret = sfc_request(sfcmd.d32, 0, 0, NULL);
+	op.sfctrl.d32 = 0;
+
+	ret = sfc_request(&op, 0, NULL, 0);
 
 	return ret;
 }
 
 int snor_reset_device(void)
 {
-	int ret;
-	union SFCCMD_DATA sfcmd;
+	struct rk_sfc_op op;
+
+	op.sfcmd.d32 = 0;
+	op.sfcmd.b.cmd = CMD_ENABLE_RESER;
 
-	sfcmd.d32 = 0;
-	sfcmd.b.cmd = CMD_ENABLE_RESER;
-	sfc_request(sfcmd.d32, 0, 0, NULL);
+	op.sfctrl.d32 = 0;
+	sfc_request(&op, 0, NULL, 0);
 
-	sfcmd.d32 = 0;
-	sfcmd.b.cmd = CMD_RESET_DEVICE;
-	ret = sfc_request(sfcmd.d32, 0, 0, NULL);
+	op.sfcmd.d32 = 0;
+	op.sfcmd.b.cmd = CMD_RESET_DEVICE;
+
+	op.sfctrl.d32 = 0;
+	sfc_request(&op, 0, NULL, 0);
 	/* tRST=30us , delay 1ms here */
-	mdelay(1);
-	return ret;
+	sfc_delay(1000);
+
+	return SFC_OK;
 }
 
 static int snor_enter_4byte_mode(void)
 {
 	int ret;
-	union SFCCMD_DATA sfcmd;
+	struct rk_sfc_op op;
 
-	sfcmd.d32 = 0;
-	sfcmd.b.cmd = CMD_ENTER_4BYTE_MODE;
+	op.sfcmd.d32 = 0;
+	op.sfcmd.b.cmd = CMD_ENTER_4BYTE_MODE;
 
-	ret = sfc_request(sfcmd.d32, 0, 0, NULL);
+	op.sfctrl.d32 = 0;
+
+	ret = sfc_request(&op, 0, NULL, 0);
 	return ret;
 }
 
 static int snor_read_status(u32 reg_index, u8 *status)
 {
 	int ret;
-	union SFCCMD_DATA sfcmd;
+	struct rk_sfc_op op;
 	u8 read_stat_cmd[] = {CMD_READ_STATUS,
 				CMD_READ_STATUS2, CMD_READ_STATUS3};
-	sfcmd.d32 = 0;
-	sfcmd.b.cmd = read_stat_cmd[reg_index];
-	sfcmd.b.datasize = 1;
+	op.sfcmd.d32 = 0;
+	op.sfcmd.b.cmd = read_stat_cmd[reg_index];
 
-	ret = sfc_request(sfcmd.d32, 0, 0, status);
+	op.sfctrl.d32 = 0;
+	ret = sfc_request(&op, 0, status, 1);
 
 	return ret;
 }
@@ -142,16 +150,17 @@ static int snor_read_status(u32 reg_index, u8 *status)
 static int snor_wait_busy(int timeout)
 {
 	int ret;
-	union SFCCMD_DATA sfcmd;
+	struct rk_sfc_op op;
 	int i;
 	u32 status;
 
-	sfcmd.d32 = 0;
-	sfcmd.b.cmd = CMD_READ_STATUS;
-	sfcmd.b.datasize = 1;
+	op.sfcmd.d32 = 0;
+	op.sfcmd.b.cmd = CMD_READ_STATUS;
+
+	op.sfctrl.d32 = 0;
 
 	for (i = 0; i < timeout; i++) {
-		ret = sfc_request(sfcmd.d32, 0, 0, &status);
+		ret = sfc_request(&op, 0, &status, 1);
 		if (ret != SFC_OK)
 			return ret;
 
@@ -168,24 +177,26 @@ static int snor_wait_busy(int timeout)
 static int snor_write_status2(u32 reg_index, u8 status)
 {
 	int ret;
-	union SFCCMD_DATA sfcmd;
+	struct rk_sfc_op op;
 	u8 status2[2];
-	u8 read_index;
 
 	status2[reg_index] = status;
-	read_index = (reg_index == 0) ? 2 : 0;
-	ret = snor_read_status(read_index, &status2[read_index]);
+	if (reg_index == 0)
+		ret = snor_read_status(2, &status2[1]);
+	else
+		ret = snor_read_status(0, &status2[0]);
 	if (ret != SFC_OK)
 		return ret;
 
 	snor_write_en();
 
-	sfcmd.d32 = 0;
-	sfcmd.b.cmd = CMD_WRITE_STATUS;
-	sfcmd.b.datasize = 2;
-	sfcmd.b.rw = SFC_WRITE;
+	op.sfcmd.d32 = 0;
+	op.sfcmd.b.cmd = CMD_WRITE_STATUS;
+	op.sfcmd.b.rw = SFC_WRITE;
 
-	ret = sfc_request(sfcmd.d32, 0, 0, &status2[0]);
+	op.sfctrl.d32 = 0;
+
+	ret = sfc_request(&op, 0, &status2[0], 2);
 	if (ret != SFC_OK)
 		return ret;
 
@@ -197,7 +208,7 @@ static int snor_write_status2(u32 reg_index, u8 status)
 static int snor_write_status1(u32 reg_index, u8 status)
 {
 	int ret;
-	union SFCCMD_DATA sfcmd;
+	struct rk_sfc_op op;
 	u8 status2[2];
 	u8 read_index;
 
@@ -209,12 +220,13 @@ static int snor_write_status1(u32 reg_index, u8 status)
 
 	snor_write_en();
 
-	sfcmd.d32 = 0;
-	sfcmd.b.cmd = CMD_WRITE_STATUS;
-	sfcmd.b.datasize = 2;
-	sfcmd.b.rw = SFC_WRITE;
+	op.sfcmd.d32 = 0;
+	op.sfcmd.b.cmd = CMD_WRITE_STATUS;
+	op.sfcmd.b.rw = SFC_WRITE;
+
+	op.sfctrl.d32 = 0;
 
-	ret = sfc_request(sfcmd.d32, 0, 0, &status2[0]);
+	ret = sfc_request(&op, 0, &status2[0], 2);
 	if (ret != SFC_OK)
 		return ret;
 
@@ -226,16 +238,17 @@ static int snor_write_status1(u32 reg_index, u8 status)
 static int snor_write_status(u32 reg_index, u8 status)
 {
 	int ret;
-	union SFCCMD_DATA sfcmd;
+	struct rk_sfc_op op;
 	u8 write_stat_cmd[] = {CMD_WRITE_STATUS,
 			       CMD_WRITE_STATUS2, CMD_WRITE_STATUS3};
 	snor_write_en();
-	sfcmd.d32 = 0;
-	sfcmd.b.cmd = write_stat_cmd[reg_index];
-	sfcmd.b.datasize = 1;
-	sfcmd.b.rw = SFC_WRITE;
+	op.sfcmd.d32 = 0;
+	op.sfcmd.b.cmd = write_stat_cmd[reg_index];
+	op.sfcmd.b.rw = SFC_WRITE;
 
-	ret = sfc_request(sfcmd.d32, 0, 0, &status);
+	op.sfctrl.d32 = 0;
+
+	ret = sfc_request(&op, 0, &status, 1);
 	if (ret != SFC_OK)
 		return ret;
 
@@ -249,30 +262,32 @@ int snor_erase(struct SFNOR_DEV *p_dev,
 	       enum NOR_ERASE_TYPE erase_type)
 {
 	int ret;
-	union SFCCMD_DATA sfcmd;
+	struct rk_sfc_op op;
 	int timeout[] = {400, 2000, 40000};   /* ms */
 
-	rkflash_print_dio("%s %x\n", __func__, addr);
+	rkflash_print_dio("%s %x %x\n", __func__, addr, erase_type);
 
 	if (erase_type > ERASE_CHIP)
 		return SFC_PARAM_ERR;
 
-	sfcmd.d32 = 0;
+	op.sfcmd.d32 = 0;
 	if (erase_type == ERASE_BLOCK64K)
-		sfcmd.b.cmd = p_dev->blk_erase_cmd;
+		op.sfcmd.b.cmd = p_dev->blk_erase_cmd;
 	else if (erase_type == ERASE_SECTOR)
-		sfcmd.b.cmd = p_dev->sec_erase_cmd;
+		op.sfcmd.b.cmd = p_dev->sec_erase_cmd;
 	else
-		sfcmd.b.cmd = CMD_CHIP_ERASE;
+		op.sfcmd.b.cmd = CMD_CHIP_ERASE;
 
-	sfcmd.b.addrbits = (erase_type != ERASE_CHIP) ?
+	op.sfcmd.b.addrbits = (erase_type != ERASE_CHIP) ?
 				SFC_ADDR_24BITS : SFC_ADDR_0BITS;
 	if (p_dev->addr_mode == ADDR_MODE_4BYTE && erase_type != ERASE_CHIP)
-		sfcmd.b.addrbits = SFC_ADDR_32BITS;
+		op.sfcmd.b.addrbits = SFC_ADDR_32BITS;
+
+	op.sfctrl.d32 = 0;
 
 	snor_write_en();
 
-	ret = sfc_request(sfcmd.d32, 0, addr, NULL);
+	ret = sfc_request(&op, addr, NULL, 0);
 	if (ret != SFC_OK)
 		return ret;
 
@@ -286,29 +301,27 @@ int snor_prog_page(struct SFNOR_DEV *p_dev,
 		   u32 size)
 {
 	int ret;
-	union SFCCMD_DATA sfcmd;
-	union SFCCTRL_DATA sfctrl;
+	struct rk_sfc_op op;
 
 	rkflash_print_dio("%s %x %x\n", __func__, addr, *(u32 *)(p_data));
 
-	sfcmd.d32 = 0;
-	sfcmd.b.cmd = p_dev->prog_cmd;
-	sfcmd.b.addrbits = SFC_ADDR_24BITS;
-	sfcmd.b.datasize = size;
-	sfcmd.b.rw = SFC_WRITE;
+	op.sfcmd.d32 = 0;
+	op.sfcmd.b.cmd = p_dev->prog_cmd;
+	op.sfcmd.b.addrbits = SFC_ADDR_24BITS;
+	op.sfcmd.b.rw = SFC_WRITE;
 
-	sfctrl.d32 = 0;
-	sfctrl.b.datalines = p_dev->prog_lines;
-	sfctrl.b.enbledma = 0;
+	op.sfctrl.d32 = 0;
+	op.sfctrl.b.datalines = p_dev->prog_lines;
+	op.sfctrl.b.enbledma = 0;
 	if (p_dev->prog_cmd == CMD_PAGE_PROG_A4)
-		sfctrl.b.addrlines = SFC_4BITS_LINE;
+		op.sfctrl.b.addrlines = SFC_4BITS_LINE;
 
 	if (p_dev->addr_mode == ADDR_MODE_4BYTE)
-		sfcmd.b.addrbits = SFC_ADDR_32BITS;
+		op.sfcmd.b.addrbits = SFC_ADDR_32BITS;
 
 	snor_write_en();
 
-	ret = sfc_request(sfcmd.d32, sfctrl.d32, addr, p_data);
+	ret = sfc_request(&op, addr, p_data, size);
 	if (ret != SFC_OK)
 		return ret;
 
@@ -386,35 +399,33 @@ int snor_read_data(struct SFNOR_DEV *p_dev,
 		   u32 size)
 {
 	int ret;
-	union SFCCMD_DATA sfcmd;
-	union SFCCTRL_DATA sfctrl;
+	struct rk_sfc_op op;
 
-	sfcmd.d32 = 0;
-	sfcmd.b.cmd = p_dev->read_cmd;
-	sfcmd.b.datasize = size;
-	sfcmd.b.addrbits = SFC_ADDR_24BITS;
+	op.sfcmd.d32 = 0;
+	op.sfcmd.b.cmd = p_dev->read_cmd;
+	op.sfcmd.b.addrbits = SFC_ADDR_24BITS;
 
-	sfctrl.d32 = 0;
-	sfctrl.b.datalines = p_dev->read_lines;
+	op.sfctrl.d32 = 0;
+	op.sfctrl.b.datalines = p_dev->read_lines;
 	if (!(size & 0x3) && size >= 4)
-		sfctrl.b.enbledma = 0;
+		op.sfctrl.b.enbledma = 0;
 
 	if (p_dev->read_cmd == CMD_FAST_READ_X1 ||
 	    p_dev->read_cmd == CMD_FAST_READ_X4 ||
 	    p_dev->read_cmd == CMD_FAST_READ_X2 ||
 	    p_dev->read_cmd == CMD_FAST_4READ_X4) {
-		sfcmd.b.dummybits = 8;
+		op.sfcmd.b.dummybits = 8;
 	} else if (p_dev->read_cmd == CMD_FAST_READ_A4) {
-		sfcmd.b.addrbits = SFC_ADDR_32BITS;
+		op.sfcmd.b.addrbits = SFC_ADDR_32BITS;
 		addr = (addr << 8) | 0xFF;	/* Set M[7:0] = 0xFF */
-		sfcmd.b.dummybits = 4;
-		sfctrl.b.addrlines = SFC_4BITS_LINE;
+		op.sfcmd.b.dummybits = 4;
+		op.sfctrl.b.addrlines = SFC_4BITS_LINE;
 	}
 
 	if (p_dev->addr_mode == ADDR_MODE_4BYTE)
-		sfcmd.b.addrbits = SFC_ADDR_32BITS;
+		op.sfcmd.b.addrbits = SFC_ADDR_32BITS;
 
-	ret = sfc_request(sfcmd.d32, sfctrl.d32, addr, p_data);
+	ret = sfc_request(&op, addr, p_data, size);
 	rkflash_print_dio("%s %x %x\n", __func__, addr, *(u32 *)(p_data));
 
 	return ret;
@@ -502,13 +513,14 @@ out:
 int snor_read_id(u8 *data)
 {
 	int ret;
-	union SFCCMD_DATA     sfcmd;
+	struct rk_sfc_op op;
 
-	sfcmd.d32 = 0;
-	sfcmd.b.cmd = CMD_READ_JEDECID;
-	sfcmd.b.datasize = 3;
+	op.sfcmd.d32 = 0;
+	op.sfcmd.b.cmd = CMD_READ_JEDECID;
 
-	ret = sfc_request(sfcmd.d32, 0, 0, data);
+	op.sfctrl.d32 = 0;
+
+	ret = sfc_request(&op, 0, data, 3);
 
 	return ret;
 }
@@ -516,15 +528,16 @@ int snor_read_id(u8 *data)
 static int snor_read_parameter(u32 addr, u8 *data)
 {
 	int ret;
-	union SFCCMD_DATA     sfcmd;
+	struct rk_sfc_op op;
+
+	op.sfcmd.d32 = 0;
+	op.sfcmd.b.cmd = CMD_READ_PARAMETER;
+	op.sfcmd.b.addrbits = SFC_ADDR_24BITS;
+	op.sfcmd.b.dummybits = 8;
 
-	sfcmd.d32 = 0;
-	sfcmd.b.cmd = CMD_READ_PARAMETER;
-	sfcmd.b.datasize = 1;
-	sfcmd.b.addrbits = SFC_ADDR_24BITS;
-	sfcmd.b.dummybits = 8;
+	op.sfctrl.d32 = 0;
 
-	ret = sfc_request(sfcmd.d32, 0, addr, data);
+	ret = sfc_request(&op, addr, data, 1);
 
 	return ret;
 }
@@ -572,7 +585,7 @@ int snor_init(struct SFNOR_DEV *p_dev)
 	if (!p_dev)
 		return SFC_PARAM_ERR;
 
-	memset(p_dev, 0, sizeof(struct SFNOR_DEV));
+	memset((void *)p_dev, 0, sizeof(struct SFNOR_DEV));
 	snor_read_id(id_byte);
 	rkflash_print_error("sfc nor id: %x %x %x\n",
 			    id_byte[0], id_byte[1], id_byte[2]);
@@ -625,7 +638,7 @@ int snor_init(struct SFNOR_DEV *p_dev)
 		if ((g_spi_flash_info->feature & FEA_4BYTE_ADDR_MODE))
 			snor_enter_4byte_mode();
 	} else {
-		p_dev->capacity = 1 << id_byte[2] >> 3;
+		p_dev->capacity = 1 << (id_byte[2] - 9);
 		p_dev->QE_bits = 0;
 		p_dev->blk_size = NOR_SECS_BLK;
 		p_dev->page_size = NOR_SECS_PAGE;

commit a6fcac41dcbdc77a6ec6d15768472f0f658372eb
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Apr 10 21:04:12 2020 +0800

    rkflash: add nand_mega_area description
    
    Change-Id: Ibf4ab2b6d7d4d0e58f859ee47ec52c3cced79238
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/sfc_nand.c b/drivers/rkflash/sfc_nand.c
index d8b8ff9b42..3aedeedee4 100644
--- a/drivers/rkflash/sfc_nand.c
+++ b/drivers/rkflash/sfc_nand.c
@@ -16,76 +16,84 @@
 
 static struct nand_info spi_nand_tbl[] = {
 	/* TC58CVG0S0HxAIx */
-	{0x98C2, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x02, 0xD8, 0x00, 18, 8, 0xFF, 0xFF, 4, 8, NULL},
+	{0x98C2, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x02, 0xD8, 0x00, 18, 8, 0xFF, 0xFF, {4, 8, 0xff, 0xff}, NULL},
 	/* TC58CVG1S0HxAIx */
-	{0x98CB, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x02, 0xD8, 0x00, 19, 8, 0xFF, 0xFF, 4, 8, NULL},
+	{0x98CB, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x02, 0xD8, 0x00, 19, 8, 0xFF, 0xFF, {4, 8, 0xff, 0xff}, NULL},
 	/* MX35LF1GE4AB */
-	{0xC212, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 4, 0xB0, 0, 4, 8, &sfc_nand_ecc_status_sp1},
+	{0xC212, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 4, 0xB0, 0, {4, 8, 0xff, 0xff}, &sfc_nand_ecc_status_sp1},
 	/* MX35LF2GE4AB */
-	{0xC222, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 4, 0xB0, 0, 4, 8, &sfc_nand_ecc_status_sp1},
+	{0xC222, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 4, 0xB0, 0, {4, 8, 0xff, 0xff}, &sfc_nand_ecc_status_sp1},
 	/* GD5F1GQ4UAYIG */
-	{0xC8F1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 8, 0xB0, 0, 4, 8, NULL},
+	{0xC8F1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 8, 0xB0, 0, {4, 8, 0xff, 0xff}, NULL},
 	/* MT29F1G01ZAC */
-	{0x2C12, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x00, 18, 1, 0xB0, 0, 4, 8, &sfc_nand_ecc_status_sp1},
+	{0x2C12, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x00, 18, 1, 0xB0, 0, {4, 8, 0xff, 0xff}, &sfc_nand_ecc_status_sp1},
 	/* GD5F2GQ40BY2GR */
-	{0xC8D2, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 8, 0xB0, 0, 4, 8, &sfc_nand_ecc_status_sp3},
-	/* GD5F1GQ4U */
-	{0xC8D1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 8, 0xB0, 0, 4, 8, &sfc_nand_ecc_status_sp3},
+	{0xC8D2, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 8, 0xB0, 0, {4, 8, 0xff, 0xff}, &sfc_nand_ecc_status_sp3},
+	/* GD5F1GQ4RB9IGR */
+	{0xC8D1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 8, 0xB0, 0, {4, 8, 0xff, 0xff}, &sfc_nand_ecc_status_sp3},
 	/* IS37SML01G1 */
-	{0xC821, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x00, 18, 1, 0xFF, 0xFF, 8, 12, &sfc_nand_ecc_status_sp1},
+	{0xC821, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x00, 18, 1, 0xFF, 0xFF, {8, 12, 0xff, 0xff}, &sfc_nand_ecc_status_sp1},
 	/* W25N01GV */
-	{0xEFAA, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xFF, 0xFF, 4, 20, &sfc_nand_ecc_status_sp1},
+	{0xEFAA, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xFF, 0xFF, {4, 20, 0xff, 0xff}, &sfc_nand_ecc_status_sp1},
 	/* HYF2GQ4UAACAE */
-	{0xC952, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 14, 0xB0, 0, 4, 36, NULL},
+	{0xC952, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 14, 0xB0, 0, {4, 36, 0xff, 0xff}, NULL},
 	/* HYF2GQ4UDACAE */
-	{0xC922, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 4, 0xB0, 0, 4, 20, NULL},
+	{0xC922, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 4, 0xB0, 0, {4, 20, 0xff, 0xff}, NULL},
 	/* HYF2GQ4UHCCAE */
-	{0xC95A, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 14, 0xB0, 0, 4, 36, NULL},
+	{0xC95A, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 14, 0xB0, 0, {4, 36, 0xff, 0xff}, NULL},
 	/* HYF1GQ4UDACAE */
-	{0xC921, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 4, 0xB0, 0, 4, 20, NULL},
+	{0xC921, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 4, 0xB0, 0, {4, 20, 0xff, 0xff}, NULL},
 	/* F50L1G41LB */
-	{0xC801, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xFF, 0xFF, 20, 36, &sfc_nand_ecc_status_sp1},
+	{0xC801, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xFF, 0xFF, {20, 36, 0xff, 0xff}, &sfc_nand_ecc_status_sp1},
 	/* XT26G02A */
-	{0x0BE2, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 1, 0xB0, 0x0, 8, 12, &sfc_nand_ecc_status_sp4},
+	{0x0BE2, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 1, 0xB0, 0x0, {8, 12, 0xff, 0xff}, &sfc_nand_ecc_status_sp4},
 	/* XT26G01A */
-	{0x0BE1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xB0, 0x0, 8, 12, &sfc_nand_ecc_status_sp4},
+	{0x0BE1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xB0, 0x0, {8, 12, 0xff, 0xff}, &sfc_nand_ecc_status_sp4},
 	/* FS35ND01G-S1 */
-	{0xCDB1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 4, 0xB0, 0x0, 16, 20, &sfc_nand_ecc_status_sp5},
+	{0xCDB1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 4, 0xB0, 0x0, {16, 20, 0xff, 0xff}, &sfc_nand_ecc_status_sp5},
 	/* FS35ND02G-S2 */
-	{0xCDA2, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x03, 0x02, 0xD8, 0x00, 19, 4, 0xFF, 0xFF, 16, 20, &sfc_nand_ecc_status_sp5},
+	{0xCDA2, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x03, 0x02, 0xD8, 0x00, 19, 4, 0xFF, 0xFF, {16, 20, 0xff, 0xff}, &sfc_nand_ecc_status_sp5},
 	/* DS35Q1GA-1B */
-	{0xE571, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 4, 0xB0, 0x0, 4, 20, &sfc_nand_ecc_status_sp1},
+	{0xE571, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 4, 0xB0, 0x0, {4, 20, 0xff, 0xff}, &sfc_nand_ecc_status_sp1},
 	/* DS35Q2GA-1B */
-	{0xE572, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 4, 0xB0, 0x0, 4, 20, &sfc_nand_ecc_status_sp1},
+	{0xE572, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 4, 0xB0, 0x0, {4, 20, 0xff, 0xff}, &sfc_nand_ecc_status_sp1},
 	/* EM73C044SNC-G */
-	{0xD522, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 8, 0xB0, 0x0, 4, 20, NULL},
+	{0xD522, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 8, 0xB0, 0x0, {4, 20, 0xff, 0xff}, NULL},
 	/* EM73D044SNB-G */
-	{0xD520, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 8, 0xB0, 0x0, 4, 20, NULL},
+	{0xD520, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 8, 0xB0, 0x0, {4, 20, 0xff, 0xff}, NULL},
 	/* ATO25D1GA */
-	{0x9B12, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x40, 18, 1, 0xB0, 0x0, 20, 36, &sfc_nand_ecc_status_sp1},
+	{0x9B12, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x40, 18, 1, 0xB0, 0x0, {20, 36, 0xff, 0xff}, &sfc_nand_ecc_status_sp1},
 	/* XT26G02B */
-	{0x0BF2, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 1, 0xB0, 0x0, 8, 12, &sfc_nand_ecc_status_sp4},
+	{0x0BF2, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 1, 0xB0, 0x0, {8, 12, 0xff, 0xff}, &sfc_nand_ecc_status_sp5},
 	/* XT26G01B */
-	{0x0BF1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xB0, 0x0, 8, 12, &sfc_nand_ecc_status_sp4},
+	{0x0BF1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xB0, 0x0, {8, 12, 0xff, 0xff}, &sfc_nand_ecc_status_sp4},
 	/* HYF4GQ4UAACBE */
-	{0xC9D4, 8, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 20, 4, 0xB0, 0, 32, 64, NULL},
+	{0xC9D4, 8, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 20, 4, 0xB0, 0, {32, 64, 36, 68}, NULL},
 	/* FM25S01 */
-	{0xA1A1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xB0, 0, 0, 4, &sfc_nand_ecc_status_sp1},
+	{0xA1A1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xB0, 0, {0, 4, 0xff, 0xff}, &sfc_nand_ecc_status_sp1},
 	/* HYF1GQ4UPACAE */
-	{0xC9A1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 4, 0xB0, 0, 4, 20, &sfc_nand_ecc_status_sp1},
+	{0xC9A1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 4, 0xB0, 0, {4, 20, 0xff, 0xff}, &sfc_nand_ecc_status_sp1},
 	/* EM73E044SNA-G */
-	{0xD503, 8, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 20, 8, 0xB0, 0, 4, 40, NULL},
+	{0xD503, 8, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 20, 8, 0xB0, 0, {4, 40, 8, 44}, NULL},
 	/* GD5F2GQ5UEYIG */
-	{0xC852, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 4, 0xB0, 0, 4, 20, &sfc_nand_ecc_status_sp2},
+	{0xC852, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 4, 0xB0, 0, {4, 20, 0xff, 0xff}, &sfc_nand_ecc_status_sp2},
 	/* GD5F1GQ4R */
-	{0xC8C1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 8, 0xB0, 0, 4, 8, &sfc_nand_ecc_status_sp3},
+	{0xC8C1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 8, 0xB0, 0,  {4, 8, 0xff, 0xff}, &sfc_nand_ecc_status_sp3},
+	/* TC58CVG2S0HRAIJ */
+	{0x98ED, 8, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 20, 8, 0xFF, 0xFF, {4, 12, 8, 16}, NULL},
+	/* TC58CVG1S3HRAIJ */
+	{0x98EB, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 8, 0xFF, 0xFF, {4, 8, 0xff, 0xff}, NULL},
+	/* TC58CVG0S3HRAIJ */
+	{0x98E2, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 8, 0xFF, 0xFF, {4, 8, 0xff, 0xff}, NULL},
+	/* XT26G04A */
+	{0x0BE3, 4, 128, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 20, 1, 0xB0, 0x0, {8, 12, 0xff, 0xff}, &sfc_nand_ecc_status_sp4},
 };
 
 static struct nand_info *p_nand_info;
 static u32 gp_page_buf[SFC_NAND_PAGE_MAX_SIZE / 4];
 static struct SFNAND_DEV sfc_nand_dev;
 
-static struct nand_info *spi_nand_get_info(u8 *nand_id)
+static struct nand_info *sfc_nand_get_info(u8 *nand_id)
 {
 	u32 i;
 	u32 id = (nand_id[0] << 8) | (nand_id[1] << 0);
@@ -182,6 +190,7 @@ static int sfc_nand_wait_busy(u8 *data, int timeout)
 
 /*
  * ecc default:
+ * ecc bits: 0xC0[4,5]
  * 0x00, No bit errors were detected
  * 0x01, Bit errors were detected and corrected.
  * 0x10, Multiple bit errors were detected and not corrected.
@@ -219,6 +228,7 @@ static u32 sfc_nand_ecc_status(void)
 
 /*
  * ecc spectial type1:
+ * ecc bits: 0xC0[4,5]
  * 0x00, No bit errors were detected;
  * 0x01, Bits errors were detected and corrected, bit error count
  *	may reach the bit flip detection threshold;
@@ -256,6 +266,7 @@ u32 sfc_nand_ecc_status_sp1(void)
 
 /*
  * ecc spectial type2:
+ * ecc bits: 0xC0[4,5] 0xF0[4,5]
  * [0x0000, 0x0011], No bit errors were detected;
  * [0x0100, 0x0111], Bit errors were detected and corrected. Not
  *	reach Flipping Bits;
@@ -297,13 +308,14 @@ u32 sfc_nand_ecc_status_sp2(void)
 
 /*
  * ecc spectial type3:
+ * ecc bits: 0xC0[4,5] 0xF0[4,5]
  * [0x0000, 0x0011], No bit errors were detected;
  * [0x0100, 0x0111], Bit errors were detected and corrected. Not
  *	reach Flipping Bits;
  * [0x1000, 0x1011], Multiple bit errors were detected and
  *	not corrected.
  * [0x1100, 0x1111], Bit error count equals the bit flip
- *	detectionthreshold
+ *	detectio nthreshold
  */
 u32 sfc_nand_ecc_status_sp3(void)
 {
@@ -339,6 +351,7 @@ u32 sfc_nand_ecc_status_sp3(void)
 
 /*
  * ecc spectial type4:
+ * ecc bits: 0xC0[2,5]
  * [0x0000], No bit errors were detected;
  * [0x0001, 0x0111], Bit errors were detected and corrected. Not
  *	reach Flipping Bits;
@@ -378,6 +391,7 @@ u32 sfc_nand_ecc_status_sp4(void)
 
 /*
  * ecc spectial type5:
+ * ecc bits: 0xC0[4,6]
  * [0x0], No bit errors were detected;
  * [0x001, 0x011], Bit errors were detected and corrected. Not
  *	reach Flipping Bits;
@@ -425,6 +439,7 @@ u32 sfc_nand_erase_block(u8 cs, u32 addr)
 	sfcmd.d32 = 0;
 	sfcmd.b.cmd = p_nand_info->block_erase_cmd;
 	sfcmd.b.addrbits = SFC_ADDR_24BITS;
+	sfcmd.b.rw = SFC_WRITE;
 	sfc_nand_write_en();
 	ret = sfc_request(sfcmd.d32, 0, addr, NULL);
 	if (ret != SFC_OK)
@@ -484,16 +499,15 @@ u32 sfc_nand_prog_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
 	int ret;
 	u32 sec_per_page = p_nand_info->sec_per_page;
 	u32 data_size = sec_per_page * SFC_NAND_SECTOR_SIZE;
-	u32 spare_offs_1 = p_nand_info->spare_offs_1;
-	u32 spare_offs_2 = p_nand_info->spare_offs_2;
+	struct nand_mega_area *meta = &p_nand_info->meta;
 
 	memcpy(gp_page_buf, p_data, data_size);
 	memset(&gp_page_buf[data_size / 4], 0xff, sec_per_page * 16);
-	gp_page_buf[(data_size + spare_offs_1) / 4] = p_spare[0];
-	gp_page_buf[(data_size + spare_offs_2) / 4] = p_spare[1];
+	gp_page_buf[(data_size + meta->off0) / 4] = p_spare[0];
+	gp_page_buf[(data_size + meta->off1) / 4] = p_spare[1];
 	if (sec_per_page == 8) {
-		gp_page_buf[(data_size + spare_offs_1) / 4 + 1] = p_spare[2];
-		gp_page_buf[(data_size + spare_offs_2) / 4 + 1] = p_spare[3];
+		gp_page_buf[(data_size + meta->off2) / 4] = p_spare[2];
+		gp_page_buf[(data_size + meta->off3) / 4] = p_spare[3];
 	}
 	ret = sfc_nand_prog_page_raw(cs, addr, gp_page_buf);
 
@@ -508,23 +522,25 @@ static u32 sfc_nand_read_page_raw(u8 cs, u32 addr, u32 *p_page_buf)
 	union SFCCTRL_DATA sfctrl;
 	u32 ecc_result;
 	u32 sec_per_page = p_nand_info->sec_per_page;
+	u8 status;
 
 	sfcmd.d32 = 0;
 	sfcmd.b.cmd = p_nand_info->page_read_cmd;
 	sfcmd.b.datasize = 0;
+	sfcmd.b.rw = SFC_WRITE;
 	sfcmd.b.addrbits = SFC_ADDR_24BITS;
 	sfc_request(sfcmd.d32, 0, addr, p_page_buf);
+	if (sfc_nand_dev.read_lines == DATA_LINES_X4 &&
+	    p_nand_info->feature & FEA_SOFT_QOP_BIT &&
+	    sfc_get_version() < SFC_VER_3)
+		sfc_nand_rw_preset();
 
+	sfc_nand_wait_busy(&status, 1000 * 1000);
 	if (p_nand_info->ecc_status)
 		ecc_result = p_nand_info->ecc_status();
 	else
 		ecc_result = sfc_nand_ecc_status();
 
-	if (sfc_nand_dev.read_lines == DATA_LINES_X4 &&
-	    p_nand_info->feature & FEA_SOFT_QOP_BIT &&
-	    sfc_get_version() < SFC_VER_3)
-		sfc_nand_rw_preset();
-
 	sfcmd.d32 = 0;
 	sfcmd.b.cmd = sfc_nand_dev.page_read_cmd;
 	sfcmd.b.datasize = SFC_NAND_SECTOR_FULL_SIZE * sec_per_page;
@@ -537,7 +553,7 @@ static u32 sfc_nand_read_page_raw(u8 cs, u32 addr, u32 *p_page_buf)
 	rkflash_print_dio("%s %x %x\n", __func__, addr, p_page_buf[0]);
 
 	if (ret != SFC_OK)
-		return SFC_NAND_HW_ERROR;
+		return SFC_NAND_ECC_ERROR;
 
 	return ecc_result;
 }
@@ -547,16 +563,15 @@ u32 sfc_nand_read_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
 	int ret;
 	u32 sec_per_page = p_nand_info->sec_per_page;
 	u32 data_size = sec_per_page * SFC_NAND_SECTOR_SIZE;
-	u32 spare_offs_1 = p_nand_info->spare_offs_1;
-	u32 spare_offs_2 = p_nand_info->spare_offs_2;
+	struct nand_mega_area *meta = &p_nand_info->meta;
 
 	ret = sfc_nand_read_page_raw(cs, addr, gp_page_buf);
 	memcpy(p_data, gp_page_buf, data_size);
-	p_spare[0] = gp_page_buf[(data_size + spare_offs_1) / 4];
-	p_spare[1] = gp_page_buf[(data_size + spare_offs_2) / 4];
+	p_spare[0] = gp_page_buf[(data_size + meta->off0) / 4];
+	p_spare[1] = gp_page_buf[(data_size + meta->off1) / 4];
 	if (p_nand_info->sec_per_page == 8) {
-		p_spare[2] = gp_page_buf[(data_size + spare_offs_1) / 4 + 1];
-		p_spare[3] = gp_page_buf[(data_size + spare_offs_2) / 4 + 1];
+		p_spare[2] = gp_page_buf[(data_size + meta->off2) / 4];
+		p_spare[3] = gp_page_buf[(data_size + meta->off3) / 4];
 	}
 
 	if (ret != SFC_NAND_ECC_OK) {
@@ -576,7 +591,7 @@ u32 sfc_nand_check_bad_block(u8 cs, u32 addr)
 	u32 data_size = p_nand_info->sec_per_page * SFC_NAND_SECTOR_SIZE;
 
 	ret = sfc_nand_read_page_raw(cs, addr, gp_page_buf);
-	if (ret)
+	if (ret == SFC_NAND_ECC_ERROR)
 		return true;
 	/* Original bad block */
 	if ((gp_page_buf[data_size / 4] & 0xFF) != 0xFF)
@@ -683,7 +698,7 @@ void sfc_nand_ftl_ops_init(void)
 	g_nand_ops.bch_sel		= NULL;
 }
 
-static int spi_nand_enable_QE(void)
+static int sfc_nand_enable_QE(void)
 {
 	int ret = SFC_OK;
 	u8 status;
@@ -715,7 +730,7 @@ u32 sfc_nand_init(void)
 	if (id_byte[0] == 0xFF || id_byte[0] == 0x00)
 		return FTL_NO_FLASH;
 
-	p_nand_info = spi_nand_get_info(id_byte);
+	p_nand_info = sfc_nand_get_info(id_byte);
 	if (!p_nand_info)
 		return FTL_UNSUPPORTED_FLASH;
 
@@ -732,7 +747,7 @@ u32 sfc_nand_init(void)
 	sfc_nand_dev.page_read_cmd = p_nand_info->read_cache_cmd_1;
 	sfc_nand_dev.page_prog_cmd = p_nand_info->prog_cache_cmd_1;
 	if (p_nand_info->feature & FEA_4BIT_READ) {
-		if (spi_nand_enable_QE() == SFC_OK) {
+		if (sfc_nand_enable_QE() == SFC_OK) {
 			sfc_nand_dev.read_lines = DATA_LINES_X4;
 			sfc_nand_dev.page_read_cmd =
 				p_nand_info->read_cache_cmd_4;
diff --git a/drivers/rkflash/sfc_nand.h b/drivers/rkflash/sfc_nand.h
index 289834f777..1cb537ed52 100644
--- a/drivers/rkflash/sfc_nand.h
+++ b/drivers/rkflash/sfc_nand.h
@@ -84,6 +84,13 @@ struct SFNAND_DEV {
 	u8 page_prog_cmd;
 };
 
+struct nand_mega_area {
+	u8 off0;
+	u8 off1;
+	u8 off2;
+	u8 off3;
+};
+
 struct nand_info {
 	u32 id;
 
@@ -107,8 +114,7 @@ struct nand_info {
 	u8 QE_address;
 	u8 QE_bits;
 
-	u8 spare_offs_1;
-	u8 spare_offs_2;
+	struct nand_mega_area meta;
 	u32 (*ecc_status)(void);
 };
 

commit c3a9bbca4bb8973e56b2167f44d99f8b631c8929
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 13 18:22:47 2020 +0800

    scrptis: fit: fix cp same file
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I4356da41e54211e6e9a2ae85603c2d26214ffe9e

diff --git a/scripts/fit-base.sh b/scripts/fit-base.sh
index d5b5e7c97a..d524198a9c 100755
--- a/scripts/fit-base.sh
+++ b/scripts/fit-base.sh
@@ -350,7 +350,9 @@ function fit_boot_make_img()
 		ITB_FILE=$FIT_ITB_BOOT
 	fi
 
-	cp $ITB_FILE $FIT_IMG_BOOT
+	if [ "$ITB_FILE" != "$FIT_IMG_BOOT" ]; then
+		cp $ITB_FILE $FIT_IMG_BOOT -f
+	fi
 }
 
 function fit_resign()

commit 0dcd90fbf27b7ccb8125e99a39946d96dabc503f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 13 17:45:44 2020 +0800

    scripts: fit: update rollback index assignment
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I95b66f244647b2b4b244bec9956e308ed93de0e5

diff --git a/scripts/fit-base.sh b/scripts/fit-base.sh
index e0f95e94b7..d5b5e7c97a 100755
--- a/scripts/fit-base.sh
+++ b/scripts/fit-base.sh
@@ -46,14 +46,7 @@ function usage_pack()
 	echo "    $0 [args]"
 	echo
 	echo "args:"
-	if [[ "$0" = *boot.sh ]]; then
-		echo "    --rollback-index-boot <decimal integer>"
-	elif [[ "$0" = *uboot.sh ]]; then
-		echo "    --rollback-index-uboot  <decimal integer>"
-	else
-		echo "    --rollback-index-boot <decimal integer>"
-		echo "    --rollback-index-uboot  <decimal integer>"
-	fi
+	echo "    --rollback-index  <decimal integer>"
 	echo "    --no-vboot"
 	echo
 }
@@ -95,13 +88,15 @@ function fit_process_args()
 				ARG_NO_REBUILD="y"
 				shift 1
 				;;
-			--rollback-index-boot)
-				ARG_ROLLBACK_IDX_BOOT=$2
-				arg_check_decimal $2
-				shift 2
-				;;
-			--rollback-index-uboot)
-				ARG_ROLLBACK_IDX_UBOOT=$2
+			--rollback-index)
+				if [[ "$0" = *fit-vboot-uboot.sh ]]; then
+					ARG_ROLLBACK_IDX_UBOOT=$2
+				elif [[ "$0" = *fit-vboot-boot.sh ]]; then
+					ARG_ROLLBACK_IDX_BOOT=$2
+				else
+					usage_pack
+					exit 1
+				fi
 				arg_check_decimal $2
 				shift 2
 				;;

commit 9ea9857a3ac06842a43c3d6dbb67d17229e29ec7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 13 18:10:09 2020 +0800

    make.sh: fix typo
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I71be6a3cd62839b42a23352c52cf9a78783df9eb

diff --git a/make.sh b/make.sh
index 8907fdb5ff..3f23121470 100755
--- a/make.sh
+++ b/make.sh
@@ -639,7 +639,7 @@ function pack_arm32_trust_image()
 	else
 		./scripts/fit-vboot-uboot.sh --no-vboot --no-rebuild
 		ls uboot.img trust*.img >/dev/null 2>&1 && rm uboot.img trust*.img -rf
-		echo "pack uboot.fit (with uboot trust) okay! Input: $ini"
+		echo "pack uboot.img (with uboot trust) okay! Input: $ini"
 	fi
 }
 

commit 8bb63dbcf41d19b9b68432038b52323b29d2ea47
Merge: 906c745485 8032928d6f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 13 11:55:01 2020 +0800

    Merge branch 'next-dev' into thunder-boot

commit 8032928d6fd82245540379622f70a91d22baea58
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 13 11:49:25 2020 +0800

    make.sh: remove unused files
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I7be96a805c265b0790f2959e4de3c7313837eed6

diff --git a/make.sh b/make.sh
index 035c8dafa4..8907fdb5ff 100755
--- a/make.sh
+++ b/make.sh
@@ -476,9 +476,10 @@ function pack_uboot_image()
 			exit 1
 		fi
 		${RKTOOLS}/loaderimage --pack --uboot u-boot.bin uboot.img ${uboot_load_addr} ${PLATFORM_UBOOT_IMG_SIZE}
-		ls u-boot.img u-boot-dtb.img >/dev/null 2>&1 && rm u-boot.img u-boot-dtb.img -rf
-		echo "pack uboot okay! Input: u-boot.bin"
 	fi
+
+	ls u-boot.img u-boot-dtb.img >/dev/null 2>&1 && rm u-boot.img u-boot-dtb.img -rf
+	echo "pack uboot okay! Input: u-boot.bin"
 }
 
 function pack_uboot_itb_image()

commit 906c745485d5dafb466736fd406dbab96426f480
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 13 11:27:26 2020 +0800

    rockchip: rv1126: fit: add image property
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If985d7c8e1e76f7fe44ab79d3628df827c1fb63b

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh b/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh
index 85b1b4f316..e4f5eee2b2 100755
--- a/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh
+++ b/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh
@@ -16,6 +16,7 @@ cat << EOF
 	images {
 		uboot@1 {
 			description = "U-Boot";
+			image = "u-boot-nodtb.bin";
 			data = /incbin/("./u-boot-nodtb.bin");
 			type = "standalone";
 			os = "U-Boot";
@@ -34,6 +35,7 @@ cat << EOF
 		};
 		optee@1 {
 			description = "OP-TEE";
+			image = "tee.bin";
 			data = /incbin/("./tee.bin");
 			type = "firmware";
 			arch = "arm";
@@ -57,6 +59,7 @@ cat << EOF
 		};
 		fdt@1 {
 			description = "U-Boot dtb";
+			image = "u-boot.dtb";
 			data = /incbin/("./u-boot.dtb");
 			type = "flat_dt";
 			compression = "none";

commit 4dbccc141ee052a2a1c71353169145e2bb53b57d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 13 10:18:10 2020 +0800

    rockchip: its: add image name property
    
    Used by scripts/fit-unpack.sh
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Idbe18ce7737d6df8d145393cd081adb2642106fb

diff --git a/arch/arm/mach-rockchip/kernel_arm.its b/arch/arm/mach-rockchip/kernel_arm.its
index fb5f1ebb25..871f90d42b 100644
--- a/arch/arm/mach-rockchip/kernel_arm.its
+++ b/arch/arm/mach-rockchip/kernel_arm.its
@@ -14,6 +14,7 @@
 	images {
 		fdt@1 {
 			description = "Device tree blob for arm";
+			image = "rk-kernel.dtb";
 			data = /incbin/("images/rk-kernel.dtb");
 			type = "flat_dt";
 			arch = "arm";
@@ -26,6 +27,7 @@
 
 		kernel@1 {
 			description = "Kernel for arm";
+			image = "kernel.img";
 			data = /incbin/("images/kernel.img");
 			type = "kernel";
 			arch = "arm";
@@ -40,6 +42,7 @@
 
 		ramdisk@1 {
 			description = "Ramdisk for arm";
+			image = "ramdisk.img";
 			data = /incbin/("images/ramdisk.img");
 			type = "ramdisk";
 			arch = "arm";
@@ -53,6 +56,7 @@
 
 		resource@1 {
 			description = "Resource for arm";
+			image = "resource.img";
 			data = /incbin/("images/resource.img");
 			type = "multi";
 			arch = "arm";
diff --git a/arch/arm/mach-rockchip/kernel_arm64.its b/arch/arm/mach-rockchip/kernel_arm64.its
index 61ff1e5481..226e35b567 100644
--- a/arch/arm/mach-rockchip/kernel_arm64.its
+++ b/arch/arm/mach-rockchip/kernel_arm64.its
@@ -14,6 +14,7 @@
 	images {
 		fdt@1 {
 			description = "Device tree blob for arm64";
+			image = "rk-kernel.dtb";
 			data = /incbin/("images/rk-kernel.dtb");
 			type = "flat_dt";
 			arch = "arm64";
@@ -26,7 +27,7 @@
 
 		kernel@1 {
 			description = "Kernel for arm64";
-			kernel-version = <1>;
+			image = "kernel.img";
 			data = /incbin/("images/kernel.img");
 			type = "kernel";
 			arch = "arm64";
@@ -41,6 +42,7 @@
 
 		ramdisk@1 {
 			description = "Ramdisk for arm64";
+			image = "ramdisk.img";
 			data = /incbin/("images/ramdisk.img");
 			type = "ramdisk";
 			arch = "arm64";
@@ -54,6 +56,7 @@
 
 		resource@1 {
 			description = "Resource for arm64";
+			image = "resource.img";
 			data = /incbin/("images/resource.img");
 			type = "multi";
 			arch = "arm64";
diff --git a/arch/arm/mach-rockchip/make_fit_optee.sh b/arch/arm/mach-rockchip/make_fit_optee.sh
index 85b1b4f316..e4f5eee2b2 100755
--- a/arch/arm/mach-rockchip/make_fit_optee.sh
+++ b/arch/arm/mach-rockchip/make_fit_optee.sh
@@ -16,6 +16,7 @@ cat << EOF
 	images {
 		uboot@1 {
 			description = "U-Boot";
+			image = "u-boot-nodtb.bin";
 			data = /incbin/("./u-boot-nodtb.bin");
 			type = "standalone";
 			os = "U-Boot";
@@ -34,6 +35,7 @@ cat << EOF
 		};
 		optee@1 {
 			description = "OP-TEE";
+			image = "tee.bin";
 			data = /incbin/("./tee.bin");
 			type = "firmware";
 			arch = "arm";
@@ -57,6 +59,7 @@ cat << EOF
 		};
 		fdt@1 {
 			description = "U-Boot dtb";
+			image = "u-boot.dtb";
 			data = /incbin/("./u-boot.dtb");
 			type = "flat_dt";
 			compression = "none";

commit 61fbe583d5ef19be1f6f55bc2b6b2b31cf4938b1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 13 10:10:01 2020 +0800

    scripts: fit: rename output image .fit to .img
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Id23b91c9ea04a91c8872bdb1cc02e307ff73b4f0

diff --git a/scripts/fit-base.sh b/scripts/fit-base.sh
index b0c784dcd0..e0f95e94b7 100755
--- a/scripts/fit-base.sh
+++ b/scripts/fit-base.sh
@@ -36,8 +36,8 @@ FIT_FDT_ADDR_PLACEHOLDER="0xffffff00"
 FIT_KERNEL_ADDR_PLACEHOLDER="0xffffff01"
 FIT_RAMDISK_ADDR_PLACEHOLDER="0xffffff02"
 # output
-FIT_IMG_UBOOT="uboot.fit"
-FIT_IMG_BOOT="boot.fit"
+FIT_IMG_UBOOT="uboot.img"
+FIT_IMG_BOOT="boot.img"
 
 function usage_pack()
 {
@@ -330,7 +330,7 @@ function fit_uboot_make_img()
 
 	if [ $THIS_BS -eq $FIT_MAX_BS ]; then
 		echo
-		echo "ERROR: $ITB_FILE is too big, maybe it's a .fit but not .itb ?"
+		echo "ERROR: $ITB_FILE is too big, maybe it's not a .itb ?"
 		exit 1
 	elif [ $THIS_BS -gt $ITB_MAX_BS ]; then
 		echo
@@ -423,7 +423,7 @@ function fit_resign()
 	cat $FIT_SIG     >> $FIT_ITB
 	cat $FIT_SIG_P3  >> $FIT_ITB
 
-	# generate .fit
+	# generate
 	echo
 	if [ "$FIT_UK" = "-u" ]; then
 		fit_uboot_make_img  $FIT_ITB

commit 1ae3dd15e96bd5c9f5a14e424eea08f1b5ebc5f9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Apr 12 20:05:24 2020 +0800

    scripts: fit: support unpack any fit/itb file
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I14ac1594570cd9c7c8676b685bb605998b7263e8

diff --git a/scripts/fit-unpack.sh b/scripts/fit-unpack.sh
index 36173134cc..cfef5a98ad 100755
--- a/scripts/fit-unpack.sh
+++ b/scripts/fit-unpack.sh
@@ -4,48 +4,31 @@
 #
 # SPDX-License-Identifier: GPL-2.0
 #
-
-FIT_UBOOT_IMAGES=(
-	"/images/uboot@1      u-boot-nodtb.bin"
-	"/images/optee@1      tee.bin"
-	"/images/fdt@1        u-boot.dtb"
-)
-
-FIT_BOOT_IMAGES=(
-	"/images/kernel@1     kernel.img"
-	"/images/ramdisk@1    ramdisk.img"
-	"/images/resource@1   resource.img"
-	"/images/fdt@1        rk-kernel.dtb"
-)
+set -e
 
 function usage()
 {
 	echo
 	echo "usage:"
-	echo "    $0 -f [fit/itb image] -o [output] -u    // unpack uboot.fit/itb"
-	echo "    $0 -f [fit/itb image] -o [output] -b    // unpack boot.fit/itb"
+	echo "    $0 -f [fit/itb] -o [output]"
 	echo
 }
 
 function args_process()
 {
-	if [ $# -ne 5 ]; then
+	if [ $# -ne 4 -a $# -ne 2 ]; then
 		usage
 		exit 1
 	fi
 
 	while [ $# -gt 0 ]; do
 		case $1 in
-			-b|-u)
-				TYPE=$1
-				shift 1
-				;;
 			-f)
-				IMAGE=$2
+				file=$2
 				shift 2
 				;;
 			-o)
-				OUTPUT=$2
+				output=$2
 				shift 2
 				;;
 			*)
@@ -55,57 +38,43 @@ function args_process()
 		esac
 	done
 
-	if [ ! -f $IMAGE ]; then
-		echo "ERROR: No $IMAGE"
-		exit 1
-	elif [ -z $OUTPUT ]; then
-		echo "ERROR: No output"
-		exit 1
-	elif [ -z $TYPE ]; then
-		echo "ERROR: No args -u or -b"
+	if [ ! -f $file ]; then
+		echo "ERROR: No $file"
 		exit 1
 	fi
 
-	mkdir -p $OUTPUT
-}
-
-function copy_image()
-{
-	LIST=$1
-
-	NODE=`echo $LIST | awk '{ print $1 }'`
-	NAME=`echo $LIST | awk '{ print $2 }'`
-	OFFS=`fdtget -ti $IMAGE $NODE data-position`
-	SIZE=`fdtget -ti $IMAGE $NODE data-size`
-	if [ -z $OFFS ]; then
-		echo "ERROR: No find $NODE"
-		exit 1
+	if [ -z $output ]; then
+		output="out"
 	fi
 
-	printf "    %-15s: %d bytes\n" $OUTPUT$NAME $SIZE
-	if [ $SIZE -ne 0 ]; then
-		dd if=$IMAGE         of=$OUTPUT/dd.tmp  bs=$OFFS skip=1  >/dev/null 2>&1
-		dd if=$OUTPUT/dd.tmp of=$OUTPUT/$NAME   bs=$SIZE count=1 >/dev/null 2>&1
-		rm $OUTPUT/dd.tmp
-	else
-		touch $OUTPUT/$NAME
-	fi
+	mkdir -p $output
 }
 
 function gen_images()
 {
-	echo "Image:"
-	if [ $TYPE = "-u" ]; then
-		for LIST in "${FIT_UBOOT_IMAGES[@]}"
-		do
-			copy_image "$LIST"
-		done
-	elif [ $TYPE = "-k" ]; then
-		for LIST in "${FIT_BOOT_IMAGES[@]}"
-		do
-			copy_image "$LIST"
-		done
-	fi
+	printf "\n## Unpack $file to directory $output/\n"
+	fdtget -l $file /images > $output/unpack.txt
+	cat $output/unpack.txt | while read line
+	do
+		node="/images/${line}"
+		name=`fdtget -ts $file $node image`
+		offs=`fdtget -ti $file $node data-position`
+		size=`fdtget -ti $file $node data-size`
+		if [ -z $offs ]; then
+			continue;
+		fi
+
+		printf "    %-15s: %d bytes\n" ${name} $size
+		if [ $size -ne 0 ]; then
+			dd if=$file of=$output/dd.tmp  bs=$offs skip=1  >/dev/null 2>&1
+			dd if=$output/dd.tmp of=$output/$name bs=$size count=1 >/dev/null 2>&1
+			rm $output/dd.tmp
+		else
+			touch $output/$name
+		fi
+	done
+
+	rm $output/unpack.txt
 	echo
 }
 

commit f995e0641edf9658430bb7de9154f77810318875
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 13 09:32:04 2020 +0800

    configs: rv1126: use DTC from U-Boot project
    
    It seems low version DTC even not support "-Wno-unit_address_vs_reg"
    input which causes a DTC compile fail, so let's use DTC from U-Boot
    project.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I4a54ab209b1c270eaaded6b98f569b959bacc5c6

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index 2c285425bc..f4d7539570 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -68,6 +68,7 @@ CONFIG_SPL_OF_CONTROL=y
 CONFIG_SPL_DTB_MINIMUM=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_MKIMAGE_DTC_PATH="scripts/dtc/dtc"
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y

commit 7c3ca5002ed627169b1d8a7499b0c2f76d20042d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Apr 12 12:30:06 2020 +0800

    make.sh: clean up
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I55ddc25e8ccbb7bd9661f2652ff114df8d32454f

diff --git a/make.sh b/make.sh
index 80a3d7d846..035c8dafa4 100755
--- a/make.sh
+++ b/make.sh
@@ -72,7 +72,6 @@ TOOLCHAIN_ARM32=../prebuilts/gcc/linux-x86/arm/gcc-linaro-6.3.1-2017.05-x86_64_a
 TOOLCHAIN_ARM64=../prebuilts/gcc/linux-x86/aarch64/gcc-linaro-6.3.1-2017.05-x86_64_aarch64-linux-gnu/bin
 
 ########################################### User not touch #############################################
-BIN_PATH_FIXUP="--replace tools/rk_tools/ ./"
 RKTOOLS=./tools
 
 # Declare global INI file searching index name for every chip, update in select_chip_info()
@@ -97,13 +96,10 @@ PLATFORM_RSA=
 PLATFORM_SHA=
 PLATFORM_UBOOT_IMG_SIZE=
 PLATFORM_TRUST_IMG_SIZE=
-
 PACK_FORMAT="rk"
 
-# Out env param
-PACK_IGNORE_BL32=$TRUST_PACK_IGNORE_BL32	# Value only: "--ignore-bl32"
 #########################################################################################################
-help()
+function help()
 {
 	echo
 	echo "Usage:"
@@ -146,16 +142,14 @@ help()
 	echo "	./make.sh sym                      --- cat u-boot.sym"
 }
 
-prepare()
+function prepare()
 {
-	local absolute_path cmd dir count
-
 	case $BOARD in
 		# Parse from exit .config
 		''|elf*|loader*|spl*|itb|debug*|trust|uboot|map|sym|env|EXT_DTB=*|fit*)
 		if [ ! -f .config ]; then
 			echo
-			echo "Build failed, Can't find .config"
+			echo "ERROR: No .config"
 			help
 			exit 1
 		fi
@@ -179,13 +173,8 @@ prepare()
 		if [ -z $(echo ${FUNCADDR} | sed 's/[0-9,a-f,A-F,x,X,-]//g') ]; then
 			return
 		elif [ ! -f configs/${BOARD}_defconfig ]; then
-			echo
-			echo "Can't find: configs/${BOARD}_defconfig"
-			echo
-			echo "******** Rockchip Support List *************"
-			echo "${SUPPORT_LIST}"
-			echo "********************************************"
-			echo
+			echo -e "\n${SUPPORT_LIST}\n"
+			echo "ERROR: No configs/${BOARD}_defconfig"
 			exit 1
 		else
 			echo "make for ${BOARD}_defconfig by -j${JOB}"
@@ -200,7 +189,7 @@ prepare()
 		RKBIN=${absolute_path}
 	else
 		echo
-		echo "Can't find '../rkbin/' repository, please download it before pack image!"
+		echo "No '../rkbin/' repository, please download it before pack image!"
 		echo "How to obtain? 3 ways:"
 		echo "	1. Login your Rockchip gerrit account: \"Projects\" -> \"List\" -> search \"rk/rkbin\" repository"
 		echo "	2. Github repository: https://github.com/rockchip-linux/rkbin"
@@ -208,23 +197,25 @@ prepare()
 		exit 1
 	fi
 
+	if grep -Eq ''^CONFIG_ARM64=y'|'^CONFIG_ARM64_BOOT_AARCH32=y'' .config ; then
+		ARM64_TRUSTZONE="y"
+	fi
+
 	if grep  -q '^CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y' .config ; then
 		PACK_FORMAT="fit"
 	fi
 }
 
-select_toolchain()
+function select_toolchain()
 {
-	local absolute_path
-
-	if grep  -q '^CONFIG_ARM64=y' .config ; then
+	if grep -q '^CONFIG_ARM64=y' .config ; then
 		if [ -d ${TOOLCHAIN_ARM64} ]; then
 			absolute_path=$(cd `dirname ${TOOLCHAIN_ARM64}`; pwd)
 			TOOLCHAIN_GCC=${absolute_path}/bin/${GCC_ARM64}
 			TOOLCHAIN_OBJDUMP=${absolute_path}/bin/${OBJ_ARM64}
 			TOOLCHAIN_ADDR2LINE=${absolute_path}/bin/${ADDR2LINE_ARM64}
 		else
-			echo "Can't find toolchain: ${TOOLCHAIN_ARM64}"
+			echo "ERROR: No toolchain: ${TOOLCHAIN_ARM64}"
 			exit 1
 		fi
 	else
@@ -234,18 +225,19 @@ select_toolchain()
 			TOOLCHAIN_OBJDUMP=${absolute_path}/bin/${OBJ_ARM32}
 			TOOLCHAIN_ADDR2LINE=${absolute_path}/bin/${ADDR2LINE_ARM32}
 		else
-			echo "Can't find toolchain: ${TOOLCHAIN_ARM32}"
+			echo "ERROR: No toolchain: ${TOOLCHAIN_ARM32}"
 			exit 1
 		fi
 	fi
-
-	# echo "toolchain: ${TOOLCHAIN_GCC}"
 }
 
-sub_commands()
+function sub_commands()
 {
-	local cmd=${SUBCMD%-*} opt=${SUBCMD#*-}
-	local elf=u-boot map=u-boot.map sym=u-boot.sym
+	cmd=${SUBCMD%-*}
+	opt=${SUBCMD#*-}
+	elf=u-boot
+	map=u-boot.map
+	sym=u-boot.sym
 
 	if [ "$FILE" == "tpl" -o "$FILE" == "spl" ]; then
 		elf=`find -name u-boot-${FILE}`
@@ -255,8 +247,8 @@ sub_commands()
 
 	case $cmd in
 		elf)
-		if [ -o ! -f ${elf} ]; then
-			echo "Can't find elf file: ${elf}"
+		if [ ! -f ${elf} ]; then
+			echo "ERROR: No elf: ${elf}"
 			exit 1
 		else
 			# default 'cmd' without option, use '-D'
@@ -366,28 +358,28 @@ sub_commands()
 #	4. RKCHIP_LABEL: show build message
 #
 # We read chip info from .config and 'RKCHIP_INI_DESC'
-select_chip_info()
+function select_chip_info()
 {
 	# Read RKCHIP firstly from .config
 	# The regular expression that matching:
 	#  - PX30, PX3SE
 	#  - RK????, RK????X
 	#  - RV????
-	CHIP_PATTERN='^CONFIG_ROCKCHIP_[R,P][X,V,K][0-9ESX]{1,5}'
-	RKCHIP=`egrep -o ${CHIP_PATTERN} .config`
+	chip_pattern='^CONFIG_ROCKCHIP_[R,P][X,V,K][0-9ESX]{1,5}'
+	RKCHIP=`egrep -o ${chip_pattern} .config`
 
 	# default
 	RKCHIP=${RKCHIP##*_}
 
 	# need fixup ?
-	for ITEM in "${CHIP_TYPE_FIXUP_TABLE[@]}"
+	for item in "${CHIP_TYPE_FIXUP_TABLE[@]}"
 	do
-		CONFIG_XXX=`echo $ITEM | awk '{ print $1 }'`
-		if grep  -q "^${CONFIG_XXX}=y" .config ; then
-			RKCHIP=`echo $ITEM | awk '{ print $2 }'`
-			RKCHIP_LOADER=`echo $ITEM | awk '{ print $3 }'`
-			RKCHIP_TRUST=`echo  $ITEM | awk '{ print $4 }'`
-			RKCHIP_LABEL=`echo  $ITEM | awk '{ print $5 }'`
+		config_xxx=`echo $item | awk '{ print $1 }'`
+		if grep  -q "^${config_xxx}=y" .config ; then
+			RKCHIP=`echo $item | awk '{ print $2 }'`
+			RKCHIP_LOADER=`echo $item | awk '{ print $3 }'`
+			RKCHIP_TRUST=`echo  $item | awk '{ print $4 }'`
+			RKCHIP_LABEL=`echo  $item | awk '{ print $5 }'`
 		fi
 	done
 
@@ -406,25 +398,25 @@ select_chip_info()
 
 function fixup_platform_configure()
 {
-	CFG_U_KB="-" CFG_U_NUM="-" CFG_T_KB="-" CFG_T_NUM="-"  CFG_SHA="-" CFG_RSA="-"
+	cfg_u_kb="-" cfg_u_num="-" cfg_t_kb="-" cfg_t_num="-"  cfg_sha="-" cfg_rsa="-"
 
-	for ITEM in "${CHIP_CFG_FIXUP_TABLE[@]}"
+	for item in "${CHIP_CFG_FIXUP_TABLE[@]}"
 	do
-		CONFIG_XXX=`echo $ITEM | awk '{ print $1 }'`
-		if grep  -q "^${CONFIG_XXX}=y" .config ; then
+		config_xxx=`echo $item | awk '{ print $1 }'`
+		if grep  -q "^${config_xxx}=y" .config ; then
 			# <*> Fixup rsa/sha pack mode for platforms
-			CFG_RSA=`echo $ITEM | awk '{ print $2 }'`
-			CFG_SHA=`echo $ITEM | awk '{ print $3 }'`
+			cfg_rsa=`echo $item | awk '{ print $2 }'`
+			cfg_sha=`echo $item | awk '{ print $3 }'`
 
 			# <*> Fixup images size pack for platforms, and ini file
 			if grep -q '^CONFIG_ARM64_BOOT_AARCH32=y' .config ; then
-				CFG_U_KB=`echo  $ITEM | awk '{ print $6 }' | awk -F "," '{ print $1 }'`
-				CFG_U_NUM=`echo $ITEM | awk '{ print $7 }' | awk -F "," '{ print $1 }'`
-				CFG_T_KB=`echo  $ITEM | awk '{ print $6 }' | awk -F "," '{ print $2 }'`
-				CFG_T_NUM=`echo $ITEM | awk '{ print $7 }' | awk -F "," '{ print $2 }'`
+				cfg_u_kb=`echo  $item | awk '{ print $6 }' | awk -F "," '{ print $1 }'`
+				cfg_u_num=`echo $item | awk '{ print $7 }' | awk -F "," '{ print $1 }'`
+				cfg_t_kb=`echo  $item | awk '{ print $6 }' | awk -F "," '{ print $2 }'`
+				cfg_t_num=`echo $item | awk '{ print $7 }' | awk -F "," '{ print $2 }'`
 
-				PAD_LOADER=`echo $ITEM | awk '{ print $8 }'`
-				PAD_TRUST=`echo  $ITEM | awk '{ print $9 }'`
+				PAD_LOADER=`echo $item | awk '{ print $8 }'`
+				PAD_TRUST=`echo  $item | awk '{ print $9 }'`
 				if [ "$PAD_LOADER" != "-" ]; then
 					RKCHIP_LOADER=${RKCHIP_LOADER}${PAD_LOADER}
 				fi
@@ -433,104 +425,95 @@ function fixup_platform_configure()
 				fi
 				RKCHIP_LABEL=${RKCHIP_LABEL}"AARCH32"
 			else
-				CFG_U_KB=`echo  $ITEM | awk '{ print $4 }' | awk -F "," '{ print $1 }'`
-				CFG_U_NUM=`echo $ITEM | awk '{ print $5 }' | awk -F "," '{ print $1 }'`
-				CFG_T_KB=`echo  $ITEM | awk '{ print $4 }' | awk -F "," '{ print $2 }'`
-				CFG_T_NUM=`echo $ITEM | awk '{ print $5 }' | awk -F "," '{ print $2 }'`
+				cfg_u_kb=`echo  $item | awk '{ print $4 }' | awk -F "," '{ print $1 }'`
+				cfg_u_num=`echo $item | awk '{ print $5 }' | awk -F "," '{ print $1 }'`
+				cfg_t_kb=`echo  $item | awk '{ print $4 }' | awk -F "," '{ print $2 }'`
+				cfg_t_num=`echo $item | awk '{ print $5 }' | awk -F "," '{ print $2 }'`
 			fi
 		fi
 	done
 
-	if [ "$CFG_SHA" != "-" ]; then
-		PLATFORM_SHA="--sha $CFG_SHA"
+	if [ "$cfg_sha" != "-" ]; then
+		PLATFORM_SHA="--sha $cfg_sha"
 	fi
-	if [ "$CFG_RSA" != "-" ]; then
-		PLATFORM_RSA="--rsa $CFG_RSA"
+	if [ "$cfg_rsa" != "-" ]; then
+		PLATFORM_RSA="--rsa $cfg_rsa"
 	fi
-	if [ "$CFG_U_KB" != "-" ]; then
-		PLATFORM_UBOOT_IMG_SIZE="--size $CFG_U_KB $CFG_U_NUM"
+	if [ "$cfg_u_kb" != "-" ]; then
+		PLATFORM_UBOOT_IMG_SIZE="--size $cfg_u_kb $cfg_u_num"
 	fi
-	if [ "$CFG_T_KB" != "-" ]; then
-		PLATFORM_TRUST_IMG_SIZE="--size $CFG_T_KB $CFG_T_NUM"
+	if [ "$cfg_t_kb" != "-" ]; then
+		PLATFORM_TRUST_IMG_SIZE="--size $cfg_t_kb $cfg_t_num"
 	fi
 
 	# echo "## $FUNCNAME: $PLATFORM_RSA, $PLATFORM_SHA, $PLATFORM_TRUST_IMG_SIZE, $PLATFORM_UBOOT_IMG_SIZE"
 	# echo "## $FUNCNAME: $RKCHIP_LOADER, $RKCHIP_TRUST, $RKCHIP_LABEL"
 }
 
-pack_uboot_image()
+function pack_uboot_image()
 {
-	local UBOOT_LOAD_ADDR UBOOT_MAX_KB UBOOT_KB HEAD_KB=2
-
 	# Check file size
-	UBOOT_KB=`ls -l u-boot.bin | awk '{print $5}'`
+	head_kb=2
+	uboot_kb=`ls -l u-boot.bin | awk '{print $5}'`
 	if [ "$PLATFORM_UBOOT_IMG_SIZE" = "" ]; then
-		UBOOT_MAX_KB=1046528
+		uboot_max_kb=1046528
 	else
-		UBOOT_MAX_KB=`echo $PLATFORM_UBOOT_IMG_SIZE | awk '{print strtonum($2)}'`
-		UBOOT_MAX_KB=$(((UBOOT_MAX_KB-HEAD_KB)*1024))
+		uboot_max_kb=`echo $PLATFORM_UBOOT_IMG_SIZE | awk '{print strtonum($2)}'`
+		uboot_max_kb=$(((uboot_max_kb-head_kb)*1024))
 	fi
 
-	if [ $UBOOT_KB -gt $UBOOT_MAX_KB ]; then
+	if [ $uboot_kb -gt $uboot_max_kb ]; then
 		echo
-		echo "ERROR: pack uboot failed! u-boot.bin actual: $UBOOT_KB bytes, max limit: $UBOOT_MAX_KB bytes"
+		echo "ERROR: pack uboot failed! u-boot.bin actual: $uboot_kb bytes, max limit: $uboot_max_kb bytes"
 		exit 1
 	fi
 
+	# Pack
 	if [ "$PACK_FORMAT" = "rk" ]; then
-		# Pack image
-		UBOOT_LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" include/autoconf.mk|tr -d '\r'`
-		if [ ! $UBOOT_LOAD_ADDR ]; then
-			UBOOT_LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" .config|tr -d '\r'`
+		uboot_load_addr=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" include/autoconf.mk|tr -d '\r'`
+		if [ -z $uboot_load_addr ]; then
+			echo "ERROR: No CONFIG_SYS_TEXT_BASE for u-boot";
+			exit 1
 		fi
-
-		${RKTOOLS}/loaderimage --pack --uboot u-boot.bin uboot.img ${UBOOT_LOAD_ADDR} ${PLATFORM_UBOOT_IMG_SIZE}
-		# Delete u-boot.img and u-boot-dtb.img, which makes users not be confused with final uboot.img
-		ls u-boot.img >/dev/null 2>&1 && rm u-boot.img -rf
-		ls u-boot-dtb.img >/dev/null 2>&1 && rm u-boot-dtb.img -rf
+		${RKTOOLS}/loaderimage --pack --uboot u-boot.bin uboot.img ${uboot_load_addr} ${PLATFORM_UBOOT_IMG_SIZE}
+		ls u-boot.img u-boot-dtb.img >/dev/null 2>&1 && rm u-boot.img u-boot-dtb.img -rf
 		echo "pack uboot okay! Input: u-boot.bin"
 	fi
 }
 
-pack_uboot_itb_image()
+function pack_uboot_itb_image()
 {
-	local ini TEE_OFFSET
-
-	# ARM64
-	if grep -Eq ''^CONFIG_ARM64=y'|'^CONFIG_ARM64_BOOT_AARCH32=y'' .config ; then
+	if [ "$ARM64_TRUSTZONE" = "y" ]; then
 		ini=${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST.ini
-		if [ ! -f ${ini} ]; then
-			echo "pack trust failed! Can't find: ${ini}"
-			return
-		fi
+	else
+		ini=${RKBIN}/RKTRUST/${RKCHIP_TRUST}TOS.ini
+	fi
 
-		bl31=`sed -n '/_bl31_/s/PATH=//p' ${ini} |tr -d '\r'`
+	if [ ! -f $ini ]; then
+		echo "pack trust failed! Can't find: $ini"
+		return
+	fi
 
+	if [ "$ARM64_TRUSTZONE" = "y" ]; then
+		bl31=`sed -n '/_bl31_/s/PATH=//p' $ini |tr -d '\r'`
 		cp ${RKBIN}/${bl31} bl31.elf
 		make CROSS_COMPILE=${TOOLCHAIN_GCC} u-boot.itb
-		echo "pack u-boot.itb okay! Input: ${ini}"
+		echo "pack u-boot.itb okay! Input: $ini"
 	else
-		ini=${RKBIN}/RKTRUST/${RKCHIP_TRUST}TOS.ini
-		if [ ! -f ${ini} ]; then
-			echo "pack trust failed! Can't find: ${ini}"
-			return
-		fi
-
-		TOS=`sed -n "/TOS=/s/TOS=//p" ${ini} |tr -d '\r'`
-		TOS_TA=`sed -n "/TOSTA=/s/TOSTA=//p" ${ini} |tr -d '\r'`
-
-		if [ $TOS_TA ]; then
-			cp ${RKBIN}/${TOS_TA} tee.bin
-		elif [ $TOS ]; then
-			cp ${RKBIN}/${TOS} tee.bin
+		tos_image=`sed -n "/TOS=/s/TOS=//p" $ini |tr -d '\r'`
+		tosta_image=`sed -n "/TOSTA=/s/TOSTA=//p" $ini |tr -d '\r'`
+		if [ $tosta_image ]; then
+			cp ${RKBIN}/${tosta_image} tee.bin
+		elif [ $tos_image ]; then
+			cp ${RKBIN}/${tos_image}   tee.bin
 		else
-			echo "Can't find any tee bin"
+			echo "ERROR: No any tee bin"
 			exit 1
 		fi
 
-		TEE_OFFSET=`sed -n "/ADDR=/s/ADDR=//p" ${ini} |tr -d '\r'`
-		if [ "$TEE_OFFSET" = "" ]; then
-			TEE_OFFSET=0x8400000
+		tee_offset=`sed -n "/ADDR=/s/ADDR=//p" $ini |tr -d '\r'`
+		if [ "$tee_offset" = "" ]; then
+			tee_offset=0x8400000
 		fi
 
 		SPL_FIT_SOURCE=`sed -n "/CONFIG_SPL_FIT_SOURCE=/s/CONFIG_SPL_FIT_SOURCE=//p" .config | tr -d '""'`
@@ -538,68 +521,64 @@ pack_uboot_itb_image()
 			cp $SPL_FIT_SOURCE u-boot.its
 		else
 			SPL_FIT_GENERATOR=`sed -n "/CONFIG_SPL_FIT_GENERATOR=/s/CONFIG_SPL_FIT_GENERATOR=//p" .config | tr -d '""'`
-			$SPL_FIT_GENERATOR $TEE_OFFSET > u-boot.its
+			$SPL_FIT_GENERATOR $tee_offset > u-boot.its
 		fi
-
 		./tools/mkimage -f u-boot.its -E u-boot.itb
-		echo "pack u-boot.itb okay! Input: ${ini}"
+		echo "pack u-boot.itb okay! Input: $ini"
 	fi
 }
 
-pack_spl_loader_image()
+function pack_spl_loader_image()
 {
-	local header label="SPL" mode=$1
-	local ini=${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL.ini
-	local temp_ini=${RKBIN}/.temp/${RKCHIP_LOADER}MINIALL.ini
-
+	mode=$1
+	tmp_dir=${RKBIN}/tmp
+	tmp_ini=${tmp_dir}/${RKCHIP_LOADER}MINIALL.ini
 	if [ "$FILE" != "" ]; then
 		ini=$FILE;
+	else
+		ini=${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL.ini
 	fi
-
-	if [ ! -f ${ini} ]; then
-		echo "pack TPL+SPL loader failed! Can't find: ${ini}"
+	if [ ! -f $ini ]; then
+		echo "pack TPL+SPL loader failed! Can't find: $ini"
 		return
 	fi
 
-	ls ${RKBIN}/.temp >/dev/null 2>&1 && rm ${RKBIN}/.temp -rf
-	mkdir ${RKBIN}/.temp
-
-	# Copy to .temp folder
-	cp spl/u-boot-spl.bin ${RKBIN}/.temp/
-	cp ${ini} ${RKBIN}/.temp/${RKCHIP_LOADER}MINIALL.ini -f
-
-	cd ${RKBIN}
+	ls ${tmp_dir} >/dev/null 2>&1 && rm ${tmp_dir} -rf
+	mkdir ${tmp_dir} -p
+	cp spl/u-boot-spl.bin ${tmp_dir}/
+	cp $ini $tmp_ini
 	if [ "$mode" = 'spl' ]; then	# pack tpl+spl
-		cp tpl/u-boot-tpl.bin ${RKBIN}/.temp/
-		# Update ini
 		label="TPL+SPL"
-		header=`sed -n '/NAME=/s/NAME=//p' ${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL.ini`
-		dd if=${RKBIN}/.temp/u-boot-tpl.bin of=${RKBIN}/.temp/tpl.bin bs=1 skip=4
-		sed -i "1s/^/${header:0:4}/" ${RKBIN}/.temp/tpl.bin
-		sed -i "s/FlashData=.*$/FlashData=.\/.temp\/tpl.bin/"     ${temp_ini}
+		cp tpl/u-boot-tpl.bin ${tmp_dir}/
+		header=`sed -n '/NAME=/s/NAME=//p' ${ini}`
+		dd if=${tmp_dir}/u-boot-tpl.bin of=${tmp_dir}/tpl.bin bs=1 skip=4
+		sed -i "1s/^/${header:0:4}/" ${tmp_dir}/tpl.bin
+		sed -i "s/FlashData=.*$/FlashData=.\/tmp\/tpl.bin/" $tmp_ini
+	else
+		label="SPL"
 	fi
 
-	sed -i "s/FlashBoot=.*$/FlashBoot=.\/.temp\/u-boot-spl.bin/"  ${temp_ini}
-
-	${RKTOOLS}/boot_merger ${BIN_PATH_FIXUP} ${temp_ini}
-	rm ${RKBIN}/.temp -rf
+	sed -i "s/FlashBoot=.*$/FlashBoot=.\/tmp\/u-boot-spl.bin/" $tmp_ini
+	cd ${RKBIN}
+	${RKTOOLS}/boot_merger $tmp_ini
+	rm ${tmp_dir} -rf
 	cd -
 	ls *_loader_*.bin >/dev/null 2>&1 && rm *_loader_*.bin
 	mv ${RKBIN}/*_loader_*.bin ./
+
 	filename=`basename *_loader_*.bin`
 	if [[ $filename != *spl* ]]; then
 		rename 's/loader_/spl_loader_/' *_loader_*.bin
 	fi
-	echo "pack loader(${label}) okay! Input: ${ini}"
-	ls ./*_loader_*.bin
+	echo "pack loader(${label}) okay! Input: $ini"
 }
 
-pack_loader_image()
+function pack_loader_image()
 {
-	local ini=${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL.ini
-
 	if [ "$FILE" != "" ]; then
 		ini=$FILE;
+	else
+		ini=${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL.ini
 	fi
 
 	if [ ! -f $ini ]; then
@@ -613,127 +592,98 @@ pack_loader_image()
 	if [ $numline -eq 1 ]; then
 		image=`sed -n "/PATH=/p" $ini | tr -d '\r' | cut -d '=' -f 2`
 		cp ${RKBIN}/${image} ./
-		echo "pack loader okay! Input: ${ini}"
-		return;
-	fi
-
-	if [ "$PACK_FORMAT" = "rk" ]; then
-		cd ${RKBIN}
-		${RKTOOLS}/boot_merger ${BIN_PATH_FIXUP} $ini
-		cd - && mv ${RKBIN}/*_loader_*.bin ./
-		echo "pack loader okay! Input: $ini"
 	else
-		./scripts/fit-vboot-uboot.sh --no-vboot --no-rebuild >/dev/null
-		file=`ls *loader*.bin`
-		echo "pack $file okay! Input: $ini"
+		if [ "$PACK_FORMAT" = "rk" ]; then
+			cd ${RKBIN}
+			${RKTOOLS}/boot_merger $ini
+			cd - && mv ${RKBIN}/*_loader_*.bin ./
+		else
+			./make.sh spl-s
+		fi
 	fi
+
+	file=`ls *loader*.bin`
+	echo "pack $file okay! Input: $ini"
 }
 
-pack_32bit_trust_image()
+function pack_arm32_trust_image()
 {
-	local ini=$1 TOS TOS_TA DARM_BASE TEE_LOAD_ADDR TEE_OUTPUT TEE_OFFSET FORMAT
-
-	if [ ! -f ${ini} ]; then
-		echo "pack trust failed! Can't find: ${ini}"
-		return
-	fi
-
-	# Parse orignal path
-	TOS=`sed -n "/TOS=/s/TOS=//p" ${ini} |tr -d '\r'`
-	TOS_TA=`sed -n "/TOSTA=/s/TOSTA=//p" ${ini} |tr -d '\r'`
-
-	# Parse address and output name
-	TEE_OUTPUT=`sed -n "/OUTPUT=/s/OUTPUT=//p" ${ini} |tr -d '\r'`
-	if [ "$TEE_OUTPUT" = "" ]; then
-		TEE_OUTPUT="./trust.img"
+	ini=$1
+	tos_image=`sed -n "/TOS=/s/TOS=//p" $ini |tr -d '\r'`
+	tosta_image=`sed -n "/TOSTA=/s/TOSTA=//p" $ini |tr -d '\r'`
+	tee_output=`sed -n "/OUTPUT=/s/OUTPUT=//p" $ini |tr -d '\r'`
+	if [ "$tee_output" = "" ]; then
+		tee_output="./trust.img"
 	fi
-	TEE_OFFSET=`sed -n "/ADDR=/s/ADDR=//p" ${ini} |tr -d '\r'`
-	if [ "$TEE_OFFSET" = "" ]; then
-		TEE_OFFSET=0x8400000
+	tee_offset=`sed -n "/ADDR=/s/ADDR=//p" $ini |tr -d '\r'`
+	if [ "$tee_offset" = "" ]; then
+		tee_offset=0x8400000
 	fi
 
 	# OP-TEE is 132M(0x8400000) offset from DRAM base.
-	DARM_BASE=`sed -n "/CONFIG_SYS_SDRAM_BASE=/s/CONFIG_SYS_SDRAM_BASE=//p" include/autoconf.mk|tr -d '\r'`
-	TEE_LOAD_ADDR=$((DARM_BASE+TEE_OFFSET))
-
-	# Convert Dec to Hex
-	TEE_LOAD_ADDR=$(echo "obase=16;${TEE_LOAD_ADDR}"|bc)
-
-	# Replace "./tools/rk_tools/" with "./" to compatible legacy ini content of rkdevelop branch
-	TOS=$(echo ${TOS} | sed "s/tools\/rk_tools\//\.\//g")
-	TOS_TA=$(echo ${TOS_TA} | sed "s/tools\/rk_tools\//\.\//g")
+	dram_base=`sed -n "/CONFIG_SYS_SDRAM_BASE=/s/CONFIG_SYS_Sdram_base=//p" include/autoconf.mk|tr -d '\r'`
+	tee_load_addr=$((dram_base+tee_offset))
+	tee_load_addr=$(echo "obase=16;${tee_load_addr}"|bc) # Convert Dec to Hex
 
 	if [ "$PACK_FORMAT" = "rk" ]; then
-		if [ $TOS_TA ]; then
-			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ${TEE_OUTPUT} ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
-		elif [ $TOS ]; then
-			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS}    ${TEE_OUTPUT} ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
+		if [ $tosta_image ]; then
+			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${tosta_image} ${tee_output} ${tee_load_addr} ${PLATFORM_TRUST_IMG_SIZE}
+		elif [ $tos_image ]; then
+			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${tos_image}   ${tee_output} ${tee_load_addr} ${PLATFORM_TRUST_IMG_SIZE}
 		else
-			echo "Can't find any tee bin"
+			echo "ERROR: No any tee bin"
 			exit 1
 		fi
-
-		echo "pack trust okay! Input: ${ini}"
+		echo "pack trust okay! Input: $ini"
 	else
-		./scripts/fit-vboot-uboot.sh --no-vboot --no-rebuild >/dev/null
-		ls uboot.img >/dev/null 2>&1 && rm uboot.img -rf
-		ls trust.img >/dev/null 2>&1 && rm trust.img -rf
-		echo "pack uboot.fit (with uboot trust) okay! Input: ${ini}"
+		./scripts/fit-vboot-uboot.sh --no-vboot --no-rebuild
+		ls uboot.img trust*.img >/dev/null 2>&1 && rm uboot.img trust*.img -rf
+		echo "pack uboot.fit (with uboot trust) okay! Input: $ini"
 	fi
-
-	echo
 }
 
-pack_64bit_trust_image()
+function pack_arm64_trust_image()
 {
-	local ini=$1
-
-	if [ ! -f ${ini} ]; then
-		echo "pack trust failed! Can't find: ${ini}"
-		return
-	fi
-
+	ini=$1
 	cd ${RKBIN}
-	${RKTOOLS}/trust_merger ${PLATFORM_SHA} ${PLATFORM_RSA} ${PLATFORM_TRUST_IMG_SIZE} ${BIN_PATH_FIXUP} \
-				${PACK_IGNORE_BL32} ${ini}
-
+	${RKTOOLS}/trust_merger ${PLATFORM_SHA} ${PLATFORM_RSA} ${PLATFORM_TRUST_IMG_SIZE} $ini
 	cd - && mv ${RKBIN}/trust*.img ./
-	echo "pack trust okay! Input: ${ini}"
-	echo
+	echo "pack trust okay! Input: $ini"
 }
 
-pack_trust_image()
+function pack_trust_image()
 {
-	local ini
-
 	ls trust*.img >/dev/null 2>&1 && rm trust*.img
-
-	# ARM64 uses trust_merger
-	if grep -Eq ''^CONFIG_ARM64=y'|'^CONFIG_ARM64_BOOT_AARCH32=y'' .config ; then
-		ini=${RKBIN}/RKTRUST/${RKCHIP_TRUST}TRUST.ini
-		if [ "$FILE" != "" ]; then
-			ini=$FILE;
+	if [ "$FILE" != "" ]; then
+		ini=$FILE;
+	else
+		if [ "$ARM64_TRUSTZONE" = "y" ]; then
+			ini=${RKBIN}/RKTRUST/${RKCHIP_TRUST}TRUST.ini
+		else
+			ini=${RKBIN}/RKTRUST/${RKCHIP_TRUST}TOS.ini
 		fi
+	fi
+	if [ ! -f $ini ]; then
+		echo "pack trust failed! Can't find: $ini"
+		return
+	fi
 
-		numline=`cat $ini | wc -l`
-		if [ $numline -eq 1 ]; then
-			image=`sed -n "/PATH=/p" $ini | tr -d '\r' | cut -d '=' -f 2`
-			cp ${RKBIN}/${image} ./trust.img
-			echo "pack trust okay! Input: ${ini}"
-			return;
-		fi
-		pack_64bit_trust_image ${ini}
-	# ARM uses loaderimage
+	numline=`cat $ini | wc -l`
+	if [ $numline -eq 1 ]; then
+		image=`sed -n "/PATH=/p" $ini | tr -d '\r' | cut -d '=' -f 2`
+		cp ${RKBIN}/${image} ./trust.img
+		echo "pack trust okay! Input: $ini"
+		return;
 	else
-		ini=${RKBIN}/RKTRUST/${RKCHIP_TRUST}TOS.ini
-		if [ "$FILE" != "" ]; then
-			ini=$FILE;
+		if [ "$ARM64_TRUSTZONE" = "y" ]; then
+			pack_arm64_trust_image $ini
+		else
+			pack_arm32_trust_image $ini
 		fi
-		pack_32bit_trust_image ${ini}
 	fi
 }
 
-finish()
+function finish()
 {
 	echo
 	if [ ! -z "$OPTION" ]; then
@@ -752,6 +702,6 @@ fixup_platform_configure
 sub_commands
 make CROSS_COMPILE=${TOOLCHAIN_GCC} ${OPTION} all --jobs=${JOB}
 pack_uboot_image
-pack_loader_image
 pack_trust_image
+pack_loader_image
 finish

commit 37f507ff86ab23f03a5391f3b3b8462cf71cc072
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Apr 12 10:42:28 2020 +0800

    scritps: fit-base: add file existence check for its
    
    remove loader pack from uboot itb build process.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I857d3560f49e4bbfcedf262ee195fbc4f9065d21

diff --git a/scripts/fit-base.sh b/scripts/fit-base.sh
index 724ef902cc..b0c784dcd0 100755
--- a/scripts/fit-base.sh
+++ b/scripts/fit-base.sh
@@ -113,6 +113,18 @@ function fit_process_args()
 	done
 }
 
+function its_file_existence_check()
+{
+	cat $1 | while read line
+	do
+		image=`echo $line | sed -n "/incbin/p" | awk -F '"' '{ printf $2 }' | tr -d ' '`
+		if [ ! -f $image ]; then
+			echo "ERROR: No $image"
+			exit 1
+		fi
+	done
+}
+
 function fit_rebuild()
 {
 	if [ "$ARG_NO_REBUILD" != "y" ]; then
@@ -129,12 +141,12 @@ function fit_rebuild()
 function fit_uboot_make_itb()
 {
 	./make.sh itb
+	its_file_existence_check u-boot.its
 
 	# output uboot.itb
 	if [ "$ARG_NO_VBOOT" = "y" ]; then
 		SIGN_MSG="no-signed"
 		./tools/mkimage -f u-boot.its -E -p $FIT_NS_OFFS_UBOOT $FIT_ITB_UBOOT
-		./make.sh spl-s
 	else
 		SIGN_MSG="signed"
 
@@ -216,15 +228,19 @@ function fit_uboot_make_itb()
 
 function fit_boot_make_itb()
 {
+
+	if grep -q '^CONFIG_ARM64=y' .config ; then
+		FIT_ITS_BOOT="kernel_arm64.its"
+	else
+		FIT_ITS_BOOT="kernel_arm.its"
+	fi
+
+	cp arch/arm/mach-rockchip/$FIT_ITS_BOOT ./
+	its_file_existence_check $FIT_ITS_BOOT
+
 	# output boot.itb
 	if [ "$ARG_NO_VBOOT" = "y" ]; then
 		SIGN_MSG="no-signed"
-		if grep -q '^CONFIG_ARM64=y' .config ; then
-			FIT_ITS_BOOT="kernel_arm64.its"
-		else
-			FIT_ITS_BOOT="kernel_arm.its"
-		fi
-		cp arch/arm/mach-rockchip/$FIT_ITS_BOOT ./
 		./tools/mkimage -f $FIT_ITS_BOOT -E -p $FIT_NS_OFFS_BOOT $FIT_ITB_BOOT
 	else
 		SIGN_MSG="signed"
@@ -250,14 +266,7 @@ function fit_boot_make_itb()
 			fi
 		fi
 
-		if grep -q '^CONFIG_ARM64=y' .config ; then
-			FIT_ITS_BOOT="kernel_arm64.its"
-		else
-			FIT_ITS_BOOT="kernel_arm.its"
-		fi
-
 		# fixup entry and load address
-		cp arch/arm/mach-rockchip/$FIT_ITS_BOOT ./
 		COMM_FILE=`sed -n "/_common.h/p" $CHIP_FILE | awk '{ print $1 }'`
 		FDT_ADDR_R=`awk /fdt_addr_r/            $COMM_FILE | awk -F '=' '{ print $2 }' | awk -F '\\' '{ print $1 }'`
 		KERNEL_ADDR_R=`awk /kernel_addr_r/      $COMM_FILE | awk -F '=' '{ print $2 }' | awk -F '\\' '{ print $1 }'`
@@ -302,7 +311,7 @@ function fit_boot_make_itb()
 	# clean
 	mv $FIT_ITS_BOOT $FIT_DIR
 	./scripts/dtc/dtc -I dtb -O dts $FIT_ITB_BOOT -o $FIT_UNMAP_ITB_BOOT >/dev/null 2>&1
-	./scripts/dtc/dtc -I dtb -O dts u-boot.dtb      -o $FIT_UNMAP_KEY_BOOT >/dev/null 2>&1
+	./scripts/dtc/dtc -I dtb -O dts u-boot.dtb    -o $FIT_UNMAP_KEY_BOOT >/dev/null 2>&1
 }
 
 function fit_uboot_make_img()

commit 75e20461a617f95477ad86dfeb7b361f0533b884
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Apr 12 10:59:24 2020 +0800

    tools: fit_image: add -Wno-unit_address_vs_reg
    
    It seems this check is default enabled in high version DTC,
    so let's force disable this noisy check since we don't care
    about "reg" property for fit image.
    
    <stdout>: Warning (unit_address_vs_reg): Node /images/uboot@1 has a unit name, but no reg property
    <stdout>: Warning (unit_address_vs_reg): Node /images/uboot@1/hash@1 has a unit name, but no reg property
    <stdout>: Warning (unit_address_vs_reg): Node /images/optee@1 has a unit name, but no reg property
    <stdout>: Warning (unit_address_vs_reg): Node /images/optee@1/hash@1 has a unit name, but no reg property
    <stdout>: Warning (unit_address_vs_reg): Node /images/fdt@1 has a unit name, but no reg property
    <stdout>: Warning (unit_address_vs_reg): Node /images/fdt@1/hash@1 has a unit name, but no reg property
    <stdout>: Warning (unit_address_vs_reg): Node /configurations/conf@1 has a unit name, but no reg property
    ......
    
    Change-Id: I7d934bce66742c76397c004def1919bf4c6e7672
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/tools/fit_image.c b/tools/fit_image.c
index 12cb757bcf..68caa4349e 100644
--- a/tools/fit_image.c
+++ b/tools/fit_image.c
@@ -707,7 +707,7 @@ static int fit_handle_file(struct image_tool_params *params)
 		*cmd = '\0';
 	} else if (params->datafile) {
 		/* dtc -I dts -O dtb -p 500 datafile > tmpfile */
-		snprintf(cmd, sizeof(cmd), "%s %s \"%s\" > \"%s\"",
+		snprintf(cmd, sizeof(cmd), "%s -Wno-unit_address_vs_reg %s \"%s\" > \"%s\"",
 			 MKIMAGE_DTC, params->dtc, params->datafile, tmpfile);
 		debug("Trying to execute \"%s\"\n", cmd);
 	} else {

commit 030b8870e271cf78ff123ec36cad285ce9113b05
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Apr 10 10:19:37 2020 +0800

    configs: rv1126: update configure to support fit and uimage
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I99a876341b12279838914d085dcc916b29ffe300

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index 3b3aba8e17..2c285425bc 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -3,9 +3,13 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0xc000
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh"
 CONFIG_ROCKCHIP_RV1126=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_ROCKCHIP_FIT_IMAGE=y
+CONFIG_ROCKCHIP_UIMAGE=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL_STACK_R_ADDR=0x3fe0000
@@ -14,6 +18,11 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
 CONFIG_DEFAULT_DEVICE_TREE="rv1126-evb"
 CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_FIT_HW_CRYPTO=y
+CONFIG_SPL_FIT_SIGNATURE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_HW_CRYPTO=y
 CONFIG_BOOTDELAY=0
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
@@ -22,9 +31,11 @@ CONFIG_SPL_BOARD_INIT=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
 CONFIG_SPL_STACK_R=y
+CONFIG_SPL_SHA256_SUPPORT=y
+CONFIG_SPL_CRYPTO_SUPPORT=y
+CONFIG_SPL_HASH_SUPPORT=y
 CONFIG_SPL_MTD_SUPPORT=y
 CONFIG_SPL_OPTEE=y
-CONFIG_SPL_LOAD_RKFW=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
@@ -64,7 +75,9 @@ CONFIG_SPL_SYSCON=y
 CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_DM_CRYPTO=y
+CONFIG_SPL_DM_CRYPTO=y
 CONFIG_ROCKCHIP_CRYPTO_V2=y
+CONFIG_SPL_ROCKCHIP_CRYPTO_V2=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y
@@ -72,8 +85,6 @@ CONFIG_RK8XX_PWRKEY=y
 CONFIG_ADC_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_PHY=y
-CONFIG_PHY_ROCKCHIP_NANENG_USB2=y
 CONFIG_MTD=y
 CONFIG_MTD_BLK=y
 CONFIG_MTD_DEVICE=y
@@ -84,6 +95,8 @@ CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SPI_FLASH_MTD=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_NANENG_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_PMIC=y
 # CONFIG_SPL_PMIC_CHILDREN is not set
@@ -115,6 +128,7 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_IRQ2GPIO_V2=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
+CONFIG_RSA=y
+CONFIG_SHA512=y
 CONFIG_ERRNO_STR=y
 # CONFIG_EFI_LOADER is not set
-CONFIG_TEST_ROCKCHIP=y

commit 9d4243d397862dd16c4441c779d9ebc45db2cf1b
Merge: f8f8bbc62f e7be2a072c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Apr 10 16:38:43 2020 +0800

    Merge branch 'next-dev' into thunder-boot

commit e7be2a072c90534bf37baa2663813e79cb323586
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Apr 10 13:00:31 2020 +0800

    Kconfig: disable CLI for verified-boot
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I09acae3dda1a886629d0f9901b4c95059cdd8b42

diff --git a/Kconfig b/Kconfig
index 34d11d2cf5..ad0bd71a62 100644
--- a/Kconfig
+++ b/Kconfig
@@ -209,6 +209,7 @@ config FIT_SIGNATURE
 	bool "Enable signature verification of FIT uImages"
 	depends on DM
 	select RSA
+	select CONSOLE_DISABLE_CLI
 	help
 	  This option enables signature verification of FIT uImages,
 	  using a hash signed and verified using RSA. If
diff --git a/common/Kconfig b/common/Kconfig
index 4a76d02ad5..59ad5fd411 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -252,8 +252,7 @@ config CONSOLE_RECORD_IN_SIZE
 
 config CONSOLE_DISABLE_CLI
 	bool "disable ctrlc"
-	depends on BOOTDELAY = 0
-	default y if AVB_VBMETA_PUBLIC_KEY_VALIDATE || FIT_SIGNATURE
+	default n
 	help
 	  This disable CLI interactive in verified-boot.
 
diff --git a/lib/avb/libavb_user/Kconfig b/lib/avb/libavb_user/Kconfig
index 33dff1bc79..38920941c8 100755
--- a/lib/avb/libavb_user/Kconfig
+++ b/lib/avb/libavb_user/Kconfig
@@ -9,6 +9,7 @@ config AVB_LIBAVB_USER
 config AVB_VBMETA_PUBLIC_KEY_VALIDATE
 	bool "Support vbmeta public key validate"
 	depends on AVB_LIBAVB_USER
+	select CONSOLE_DISABLE_CLI
 	help
 	  support vbmeta public key validate, system bootflow would be
 	  uninterruptale when it is enabled:

commit 6cf81e2732591420adf8f9bc905a2103e7b8a603
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Apr 10 14:15:24 2020 +0800

    make.sh: add sub command "./make.sh fit-s"
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I3768fd73e6e60f0df1d10999ac65af774ca51771

diff --git a/make.sh b/make.sh
index 5ca14a7884..80a3d7d846 100755
--- a/make.sh
+++ b/make.sh
@@ -274,7 +274,11 @@ sub_commands()
 		;;
 
 		fit)
-		./scripts/fit-vboot.sh $*
+		if [ "$opt" = "s" ]; then
+			./scripts/fit-vboot.sh
+		else
+			./scripts/fit-vboot.sh --no-vboot
+		fi
 		exit 0
 		;;
 

commit f8f8bbc62fc911ca724dd0a6184be5982d300b0e
Merge: d8d6a3122d 69b6e59094
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Apr 10 12:05:09 2020 +0800

    Merge branch 'next-dev' into thunder-boot

commit 69b6e59094804837e7b9aeddd37415350cf34096
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Apr 8 19:30:43 2020 +0800

    make.sh: optimise fit
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I527656dbcd550c5520edb8e5a677854d9623cf55

diff --git a/make.sh b/make.sh
index e4fea170af..5ca14a7884 100755
--- a/make.sh
+++ b/make.sh
@@ -152,7 +152,7 @@ prepare()
 
 	case $BOARD in
 		# Parse from exit .config
-		''|elf*|loader*|spl*|itb|debug*|trust|uboot|map|sym|env|EXT_DTB=*)
+		''|elf*|loader*|spl*|itb|debug*|trust|uboot|map|sym|env|EXT_DTB=*|fit*)
 		if [ ! -f .config ]; then
 			echo
 			echo "Build failed, Can't find .config"
@@ -171,7 +171,7 @@ prepare()
 		;;
 
 		#Subcmd
-		''|elf*|loader*|spl*|itb|debug*|trust*|uboot|map|sym|env|EXT_DTB=*)
+		''|elf*|loader*|spl*|itb|debug*|trust*|uboot|map|sym|env|EXT_DTB=*|fit*)
 		;;
 
 		*)
@@ -207,6 +207,10 @@ prepare()
 		echo "	3. Download full release SDK repository"
 		exit 1
 	fi
+
+	if grep  -q '^CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y' .config ; then
+		PACK_FORMAT="fit"
+	fi
 }
 
 select_toolchain()
@@ -269,6 +273,11 @@ sub_commands()
 		exit 0
 		;;
 
+		fit)
+		./scripts/fit-vboot.sh $*
+		exit 0
+		;;
+
 		map)
 		cat ${map} | less
 		exit 0
@@ -604,12 +613,16 @@ pack_loader_image()
 		return;
 	fi
 
-	cd ${RKBIN}
-
-	${RKTOOLS}/boot_merger ${BIN_PATH_FIXUP} $ini
-	echo "pack loader okay! Input: $ini"
-
-	cd - && mv ${RKBIN}/*_loader_*.bin ./
+	if [ "$PACK_FORMAT" = "rk" ]; then
+		cd ${RKBIN}
+		${RKTOOLS}/boot_merger ${BIN_PATH_FIXUP} $ini
+		cd - && mv ${RKBIN}/*_loader_*.bin ./
+		echo "pack loader okay! Input: $ini"
+	else
+		./scripts/fit-vboot-uboot.sh --no-vboot --no-rebuild >/dev/null
+		file=`ls *loader*.bin`
+		echo "pack $file okay! Input: $ini"
+	fi
 }
 
 pack_32bit_trust_image()
@@ -646,14 +659,7 @@ pack_32bit_trust_image()
 	TOS=$(echo ${TOS} | sed "s/tools\/rk_tools\//\.\//g")
 	TOS_TA=$(echo ${TOS_TA} | sed "s/tools\/rk_tools\//\.\//g")
 
-	FORMAT=`sed -n "/FIT=/s/FIT=//p" ${ini} |tr -d '\r'`
-	if [ "$FORMAT" = "1" ]; then
-		PACK_FORMAT="fit"
-		./scripts/fit-vboot-uboot.sh --no-vboot --no-rebuild >/dev/null
-		ls uboot.img >/dev/null 2>&1 && rm uboot.img -rf
-		ls trust.img >/dev/null 2>&1 && rm trust.img -rf
-		echo "pack uboot.fit (with uboot trust) okay! Input: ${ini}"
-	else
+	if [ "$PACK_FORMAT" = "rk" ]; then
 		if [ $TOS_TA ]; then
 			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ${TEE_OUTPUT} ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
 		elif [ $TOS ]; then
@@ -664,6 +670,11 @@ pack_32bit_trust_image()
 		fi
 
 		echo "pack trust okay! Input: ${ini}"
+	else
+		./scripts/fit-vboot-uboot.sh --no-vboot --no-rebuild >/dev/null
+		ls uboot.img >/dev/null 2>&1 && rm uboot.img -rf
+		ls trust.img >/dev/null 2>&1 && rm trust.img -rf
+		echo "pack uboot.fit (with uboot trust) okay! Input: ${ini}"
 	fi
 
 	echo

commit 75323eb82786f655df63962ea6eb5b1b45970ae5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 2 14:50:40 2020 +0800

    scripts: add a set of fit scripts for vboot
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ie408ef9ff94e880f96e2201f706ee5d0ac44d54c

diff --git a/scripts/fit-base.sh b/scripts/fit-base.sh
new file mode 100755
index 0000000000..724ef902cc
--- /dev/null
+++ b/scripts/fit-base.sh
@@ -0,0 +1,450 @@
+#!/bin/bash
+#
+# Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier: GPL-2.0
+#
+set -e
+
+FIT_DIR="fit"
+KEY_DIR="keys"
+FIT_NS_OFFS_UBOOT="0xa00"
+FIT_NS_OFFS_BOOT="0x800"
+FIT_S_OFFS_UBOOT="0xc00"
+FIT_S_OFFS_BOOT="0xc00"
+# itb
+FIT_ITB_UBOOT="fit/uboot.itb"
+FIT_ITB_BOOT="fit/boot.itb"
+# resign
+FIT_ITB_RESIG="fit/sig-new.itb"
+FIT_ITB_RESIG_BACKUP="fit/sig-backup.itb"
+FIT_SIG_P1="fit/sig.p1"
+FIT_SIG_P2="fit/sig.p2.sig"
+FIT_SIG_P3="fit/sig.p3"
+# data to be signed
+FIT_DATA2SIG_UBOOT="fit/uboot.data2sign"
+FIT_DATA2SIG_BOOT="fit/boot.data2sign"
+# unmap
+FIT_UNMAP_ITB_UBOOT="fit/uboot_unmap_itb.dts"
+FIT_UNMAP_ITB_BOOT="fit/boot_unmap_itb.dts"
+FIT_UNMAP_KEY_UBOOT="fit/uboot_unmap_key.dts"
+FIT_UNMAP_KEY_BOOT="fit/boot_unmap_key.dts"
+# file
+CHIP_FILE="arch/arm/lib/.asm-offsets.s.cmd"
+# placeholder address
+FIT_FDT_ADDR_PLACEHOLDER="0xffffff00"
+FIT_KERNEL_ADDR_PLACEHOLDER="0xffffff01"
+FIT_RAMDISK_ADDR_PLACEHOLDER="0xffffff02"
+# output
+FIT_IMG_UBOOT="uboot.fit"
+FIT_IMG_BOOT="boot.fit"
+
+function usage_pack()
+{
+	echo
+	echo "usage:"
+	echo "    $0 [args]"
+	echo
+	echo "args:"
+	if [[ "$0" = *boot.sh ]]; then
+		echo "    --rollback-index-boot <decimal integer>"
+	elif [[ "$0" = *uboot.sh ]]; then
+		echo "    --rollback-index-uboot  <decimal integer>"
+	else
+		echo "    --rollback-index-boot <decimal integer>"
+		echo "    --rollback-index-uboot  <decimal integer>"
+	fi
+	echo "    --no-vboot"
+	echo
+}
+
+function usage_resign()
+{
+	echo
+	echo "usage:"
+	echo "    $0 -i [itb_image] -s [sig] -u       // resign uboot"
+	echo "    $0 -i [itb_image] -s [sig] -b       // resign boot"
+	echo
+}
+
+function arg_check_decimal()
+{
+	if [ -z $1 ]; then
+		echo "ERROR: $1 is not a decimal integer"
+		usage_pack
+		exit 1
+	fi
+
+	decimal=`echo $1 |sed 's/[0-9]//g'`
+	if [ ! -z $decimal ]; then
+		echo "ERROR: $1 is not a decimal integer"
+		usage_pack
+		exit 1
+	fi
+}
+
+function fit_process_args()
+{
+	while [ $# -gt 0 ]; do
+		case $1 in
+			--no-vboot)
+				ARG_NO_VBOOT="y"
+				shift 1
+				;;
+			--no-rebuild)
+				ARG_NO_REBUILD="y"
+				shift 1
+				;;
+			--rollback-index-boot)
+				ARG_ROLLBACK_IDX_BOOT=$2
+				arg_check_decimal $2
+				shift 2
+				;;
+			--rollback-index-uboot)
+				ARG_ROLLBACK_IDX_UBOOT=$2
+				arg_check_decimal $2
+				shift 2
+				;;
+			*)
+				usage_pack
+				exit 1
+				;;
+		esac
+	done
+}
+
+function fit_rebuild()
+{
+	if [ "$ARG_NO_REBUILD" != "y" ]; then
+		./make.sh
+	fi
+
+	if [ -d $FIT_DIR ]; then
+		rm $FIT_DIR -rf
+	fi
+
+	mkdir -p $FIT_DIR
+}
+
+function fit_uboot_make_itb()
+{
+	./make.sh itb
+
+	# output uboot.itb
+	if [ "$ARG_NO_VBOOT" = "y" ]; then
+		SIGN_MSG="no-signed"
+		./tools/mkimage -f u-boot.its -E -p $FIT_NS_OFFS_UBOOT $FIT_ITB_UBOOT
+		./make.sh spl-s
+	else
+		SIGN_MSG="signed"
+
+		if [ ! -f $KEY_DIR/dev.key ]; then
+			echo "ERROR: No $KEY_DIR/dev.key"
+			exit 1
+		elif [ ! -f $KEY_DIR/dev.crt ]; then
+			echo "ERROR: No $KEY_DIR/dev.crt"
+			exit 1
+		fi
+
+		if ! grep  -q '^CONFIG_SPL_FIT_SIGNATURE=y' .config ; then
+			echo "ERROR: CONFIG_SPL_FIT_SIGNATURE is disabled"
+			exit 1
+		fi
+
+		if grep  -q '^CONFIG_SPL_FIT_ROLLBACK_PROTECT=y' .config ; then
+			SPL_ROLLBACK_PROTECT="y"
+			if [ -z $ARG_ROLLBACK_IDX_UBOOT ]; then
+				echo "ERROR: No args \"--rollback-index-uboot <n>\""
+				exit 1
+			fi
+		fi
+
+		if [ "$SPL_ROLLBACK_PROTECT" = "y" ]; then
+			sed -i "s/rollback-index = <0x0>/rollback-index = <$ARG_ROLLBACK_IDX_UBOOT>/g" u-boot.its
+		fi
+
+		./tools/mkimage -f u-boot.its -k $KEY_DIR/ -K spl/u-boot-spl.dtb -E -p $FIT_S_OFFS_UBOOT -r $FIT_ITB_UBOOT
+		mv data2sign.bin $FIT_DATA2SIG_UBOOT
+
+		# rollback-index read back check
+		if [ "$SPL_ROLLBACK_PROTECT" = "y" ]; then
+			ROLLBACK_IDX_UBOOT=`fdtget -ti $FIT_ITB_UBOOT /configurations/conf@1 rollback-index`
+			if [ "$ROLLBACK_IDX_UBOOT" != "$ARG_ROLLBACK_IDX_UBOOT" ]; then
+				echo "ERROR: Failed to set rollback-index for $FIT_ITB_UBOOT";
+				exit 1
+			fi
+		fi
+
+		# host check sign
+		./tools/fit_check_sign -f $FIT_ITB_UBOOT -k spl/u-boot-spl.dtb -s
+
+		# minimize spl dtb
+		if grep  -q '^CONFIG_SPL_FIT_HW_CRYPTO=y' .config ; then
+			fdtput -tx spl/u-boot-spl.dtb /signature/key-dev rsa,r-squared 0x0
+			if grep  -q '^CONFIG_SPL_ROCKCHIP_CRYPTO_V1=y' .config ; then
+				fdtput -tx spl/u-boot-spl.dtb /signature/key-dev rsa,np 0x0
+			else
+				fdtput -tx spl/u-boot-spl.dtb /signature/key-dev rsa,c 0x0
+			fi
+		else
+			fdtput -tx spl/u-boot-spl.dtb /signature/key-dev rsa,c 0x0
+			fdtput -tx spl/u-boot-spl.dtb /signature/key-dev rsa,np 0x0
+			fdtput -tx spl/u-boot-spl.dtb /signature/key-dev rsa,exponent-BN 0x0
+		fi
+
+		# repack spl
+		ls *_loader_*.bin >/dev/null 2>&1 && rm *_loader_*.bin
+		cat spl/u-boot-spl-nodtb.bin > spl/u-boot-spl.bin
+		if ! grep  -q '^CONFIG_SPL_SEPARATE_BSS=y' .config ; then
+			cat spl/u-boot-spl-pad.bin >> spl/u-boot-spl.bin
+		fi
+		cat spl/u-boot-spl.dtb >> spl/u-boot-spl.bin
+		./make.sh spl-s
+	fi
+
+	# clean
+	ls u-boot.itb >/dev/null 2>&1 && rm u-boot.itb
+	mv u-boot.its $FIT_DIR
+	cp tee.bin $FIT_DIR
+	cp u-boot-nodtb.bin $FIT_DIR
+	cp u-boot.dtb $FIT_DIR
+	cp spl/u-boot-spl.bin $FIT_DIR
+	cp spl/u-boot-spl.dtb $FIT_DIR
+	./scripts/dtc/dtc -I dtb -O dts $FIT_ITB_UBOOT -o $FIT_UNMAP_ITB_UBOOT >/dev/null 2>&1
+	./scripts/dtc/dtc -I dtb -O dts spl/u-boot-spl.dtb -o $FIT_UNMAP_KEY_UBOOT >/dev/null 2>&1
+}
+
+function fit_boot_make_itb()
+{
+	# output boot.itb
+	if [ "$ARG_NO_VBOOT" = "y" ]; then
+		SIGN_MSG="no-signed"
+		if grep -q '^CONFIG_ARM64=y' .config ; then
+			FIT_ITS_BOOT="kernel_arm64.its"
+		else
+			FIT_ITS_BOOT="kernel_arm.its"
+		fi
+		cp arch/arm/mach-rockchip/$FIT_ITS_BOOT ./
+		./tools/mkimage -f $FIT_ITS_BOOT -E -p $FIT_NS_OFFS_BOOT $FIT_ITB_BOOT
+	else
+		SIGN_MSG="signed"
+		# sanity
+		if [ ! -f $KEY_DIR/dev.key ]; then
+			echo "ERROR: No $KEY_DIR/dev.key"
+			exit 1
+		elif [ ! -f $KEY_DIR/dev.crt ]; then
+			echo "ERROR: No $KEY_DIR/dev.crt"
+			exit 1
+		fi
+
+		if ! grep -q '^CONFIG_FIT_SIGNATURE=y' .config ; then
+			echo "ERROR: CONFIG_FIT_SIGNATURE is disabled"
+			exit 1
+		fi
+
+		if grep -q '^CONFIG_FIT_ROLLBACK_PROTECT=y' .config ; then
+			ROLLBACK_PROTECT="y"
+			if [ -z $ARG_ROLLBACK_IDX_BOOT ]; then
+				echo "ERROR: No args \"--rollback-index-boot <n>\""
+				exit 1
+			fi
+		fi
+
+		if grep -q '^CONFIG_ARM64=y' .config ; then
+			FIT_ITS_BOOT="kernel_arm64.its"
+		else
+			FIT_ITS_BOOT="kernel_arm.its"
+		fi
+
+		# fixup entry and load address
+		cp arch/arm/mach-rockchip/$FIT_ITS_BOOT ./
+		COMM_FILE=`sed -n "/_common.h/p" $CHIP_FILE | awk '{ print $1 }'`
+		FDT_ADDR_R=`awk /fdt_addr_r/            $COMM_FILE | awk -F '=' '{ print $2 }' | awk -F '\\' '{ print $1 }'`
+		KERNEL_ADDR_R=`awk /kernel_addr_r/      $COMM_FILE | awk -F '=' '{ print $2 }' | awk -F '\\' '{ print $1 }'`
+		RMADISK_ADDR_R=`awk /ramdisk_addr_r/    $COMM_FILE | awk -F '=' '{ print $2 }' | awk -F '\\' '{ print $1 }'`
+		sed -i "s/$FIT_FDT_ADDR_PLACEHOLDER/$FDT_ADDR_R/g"         $FIT_ITS_BOOT
+		sed -i "s/$FIT_KERNEL_ADDR_PLACEHOLDER/$KERNEL_ADDR_R/g"   $FIT_ITS_BOOT
+		sed -i "s/$FIT_RAMDISK_ADDR_PLACEHOLDER/$RMADISK_ADDR_R/g" $FIT_ITS_BOOT
+		if [ "$ROLLBACK_PROTECT" = "y" ]; then
+			sed -i "s/rollback-index = <0x0>/rollback-index = <$ARG_ROLLBACK_IDX_BOOT>/g" $FIT_ITS_BOOT
+		fi
+
+		./tools/mkimage -f $FIT_ITS_BOOT -k $KEY_DIR/ -K u-boot.dtb -E -p $FIT_S_OFFS_BOOT -r $FIT_ITB_BOOT
+		mv data2sign.bin $FIT_DATA2SIG_BOOT
+
+		# rollback-index read back check
+		if [ "$ROLLBACK_PROTECT" = "y" ]; then
+			ROLLBACK_IDX_BOOT=`fdtget -ti $FIT_ITB_BOOT /configurations/conf@1 rollback-index`
+			if [ "$ROLLBACK_IDX_BOOT" != "$ARG_ROLLBACK_IDX_BOOT" ]; then
+				echo "ERROR: Failed to set rollback-index for $FIT_ITB_BOOT";
+				exit 1
+			fi
+		fi
+
+		# host check sign
+		./tools/fit_check_sign -f $FIT_ITB_BOOT -k u-boot.dtb
+
+		# minimize u-boot dtb
+		if grep  -q '^CONFIG_FIT_HW_CRYPTO=y' .config ; then
+			fdtput -tx u-boot.dtb /signature/key-dev rsa,r-squared 0x0
+			if grep  -q '^CONFIG_ROCKCHIP_CRYPTO_V1=y' .config ; then
+				fdtput -tx u-boot.dtb /signature/key-dev rsa,np 0x0
+			else
+				fdtput -tx u-boot.dtb /signature/key-dev rsa,c 0x0
+			fi
+		else
+			fdtput -tx u-boot.dtb /signature/key-dev rsa,c 0x0
+			fdtput -tx u-boot.dtb /signature/key-dev rsa,np 0x0
+			fdtput -tx u-boot.dtb /signature/key-dev rsa,exponent-BN 0x0
+		fi
+	fi
+
+	# clean
+	mv $FIT_ITS_BOOT $FIT_DIR
+	./scripts/dtc/dtc -I dtb -O dts $FIT_ITB_BOOT -o $FIT_UNMAP_ITB_BOOT >/dev/null 2>&1
+	./scripts/dtc/dtc -I dtb -O dts u-boot.dtb      -o $FIT_UNMAP_KEY_BOOT >/dev/null 2>&1
+}
+
+function fit_uboot_make_img()
+{
+	ITB_FILE=$1
+
+	if [ -z $ITB_FILE ]; then
+		ITB_FILE=$FIT_ITB_UBOOT
+	fi
+
+	ITB_MAX_NUM=`sed -n "/SPL_FIT_IMAGE_MULTIPLE/p" .config | awk -F "=" '{ print $2 }'`
+	ITB_MAX_KB=`sed  -n "/SPL_FIT_IMAGE_KB/p" .config | awk -F "=" '{ print $2 }'`
+	ITB_MAX_BS=$((ITB_MAX_KB*1024))
+	FIT_MAX_BS=$((ITB_MAX_BS*ITB_MAX_NUM))
+	THIS_BS=`ls -l $ITB_FILE | awk '{print $5}'`
+
+	if [ $THIS_BS -eq $FIT_MAX_BS ]; then
+		echo
+		echo "ERROR: $ITB_FILE is too big, maybe it's a .fit but not .itb ?"
+		exit 1
+	elif [ $THIS_BS -gt $ITB_MAX_BS ]; then
+		echo
+		echo "ERROR: pack $FIT_IMG_UBOOT failed! $ITB_FILE actual: $THIS_BS bytes, max limit: $ITB_MAX_BS bytes"
+		exit 1
+	fi
+
+	# multiple backup
+	ls $FIT_IMG_UBOOT >/dev/null 2>&1 && rm $FIT_IMG_UBOOT
+	for ((i = 0; i < $ITB_MAX_NUM; i++));
+	do
+		cat $ITB_FILE >> $FIT_IMG_UBOOT
+		truncate -s %${ITB_MAX_KB}K $FIT_IMG_UBOOT
+	done
+}
+
+function fit_boot_make_img()
+{
+	ITB_FILE=$1
+
+	if [ -z $ITB_FILE ]; then
+		ITB_FILE=$FIT_ITB_BOOT
+	fi
+
+	cp $ITB_FILE $FIT_IMG_BOOT
+}
+
+function fit_resign()
+{
+	if [ $# -ne 5 ]; then
+		usage_resign
+		exit 1
+	fi
+
+	while [ $# -gt 0 ]; do
+		case $1 in
+			-b|-u)
+				FIT_UK=$1
+				shift 1
+				;;
+			-i)
+				FIT_ITB=$2
+				shift 2
+				;;
+			-s)
+				FIT_SIG=$2
+				shift 2
+				;;
+			*)
+				usage_resign
+				exit 1
+				;;
+		esac
+	done
+
+	# check
+	if [ ! -f $FIT_ITB ]; then
+		echo "ERROR: No $FIT_ITB"
+		exit 1
+	elif [ ! -f $FIT_SIG ]; then
+		echo "ERROR: No $FIT_SIG"
+		exit 1
+	elif [ -z $FIT_UK ]; then
+		echo "ERROR: No args -u or -b"
+		exit 1
+	fi
+
+	# confirm location
+	SIG_SZ=`ls -l ${FIT_SIG} | awk '{ print $5 }'`
+	LEN=`./tools/fit_info -f $FIT_ITB -n /configurations/conf@1/signature@1 -p value | sed -n "/LEN:/p" | awk '{ print $2 }'`
+	OFF=`./tools/fit_info -f $FIT_ITB -n /configurations/conf@1/signature@1 -p value | sed -n "/OFF:/p" | awk '{ print $2 }'`
+	END=`./tools/fit_info -f $FIT_ITB -n /configurations/conf@1/signature@1 -p value | sed -n "/END:/p" | awk '{ print $2 }'`
+
+	if [ -z $LEN ]; then
+		echo "ERROR: No valid signature in $FIT_ITB"
+		exit 1
+	elif [ "$SIG_SZ" -ne "$LEN" ]; then
+		echo "ERROR: $FIT_SIG size $SIG_SZ != $FIT_ITB Signature size $LEN"
+		exit 1
+	fi
+
+	# backup
+	cp $FIT_ITB  $FIT_ITB_RESIG_BACKUP
+	cp $FIT_SIG  $FIT_SIG_P2
+
+	# generate .itb
+	dd if=$FIT_ITB of=$FIT_SIG_P1 count=1 bs=$OFF
+	dd if=$FIT_ITB of=$FIT_SIG_P3 skip=1 ibs=$END
+	cat $FIT_SIG_P1  >  $FIT_ITB
+	cat $FIT_SIG     >> $FIT_ITB
+	cat $FIT_SIG_P3  >> $FIT_ITB
+
+	# generate .fit
+	echo
+	if [ "$FIT_UK" = "-u" ]; then
+		fit_uboot_make_img  $FIT_ITB
+		echo "Image(re-signed):  $FIT_IMG_UBOOT is ready"
+	else
+		fit_boot_make_img $FIT_ITB
+		echo "Image(re-signed):  $FIT_IMG_BOOT is ready"
+	fi
+}
+
+function fit_verbose_uboot()
+{
+	if [ "$SPL_ROLLBACK_PROTECT" = "y" ]; then
+		echo "Image($SIGN_MSG, rollback-index=$ROLLBACK_IDX_UBOOT):  $FIT_IMG_UBOOT (with uboot trust) is ready"
+	else
+		echo "Image($SIGN_MSG):  $FIT_IMG_UBOOT (with uboot trust) is ready"
+	fi
+}
+
+function fit_verbose_boot()
+{
+	if [ "$ROLLBACK_PROTECT" = "y" ]; then
+		echo "Image($SIGN_MSG, rollback-index=$ROLLBACK_IDX_BOOT):  $FIT_IMG_BOOT (with kernel dtb ramdisk resource) is ready"
+	else
+		echo "Image($SIGN_MSG):  $FIT_IMG_BOOT (with kernel dtb ramdisk resource) is ready"
+	fi
+}
+
+function fit_verbose_loader()
+{
+	LOADER=`ls *loader*.bin`
+	echo "Image(no-signed):  $LOADER (with spl, ddr, usbplug) is ready"
+}
diff --git a/scripts/fit-resign.sh b/scripts/fit-resign.sh
index d4b6693297..b09805cb83 100755
--- a/scripts/fit-resign.sh
+++ b/scripts/fit-resign.sh
@@ -1,47 +1,12 @@
 #!/bin/bash
 #
 # Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd
+#
 # SPDX-License-Identifier: GPL-2.0
 #
 set -e
 
-FIT_IMG=$1
-FIT_SIG=$2
-
-if [ $# -ne 2 ]; then
-	echo "Usage: $0 [signed fit image] [new signature]"
-	exit
-elif [ ! -f $FIT_IMG ]; then
-	echo "ERROR: No $FIT_IMG"
-	exit
-elif [ ! -f $FIT_SIG ]; then
-	echo "ERROR: No $FIT_SIG"
-	exit
-fi
-
-SIG_SZ=`ls -l ${FIT_SIG} | awk '{ print $5 }'`
-LEN=`./tools/fit_info -f $FIT_IMG -n /configurations/conf@1/signature@1 -p value | sed -n "/LEN:/p" | awk '{ print $2 }'`
-OFF=`./tools/fit_info -f $FIT_IMG -n /configurations/conf@1/signature@1 -p value | sed -n "/OFF:/p" | awk '{ print $2 }'`
-END=`./tools/fit_info -f $FIT_IMG -n /configurations/conf@1/signature@1 -p value | sed -n "/END:/p" | awk '{ print $2 }'`
-
-if [ -z $LEN ]; then
-	echo "ERROR: No valid signature in $FIT_IMG"
-	exit
-elif [ "$SIG_SZ" -ne "$LEN" ]; then
-	echo "ERROR: $FIT_SIG size $SIG_SZ != $FIT_IMG Signature size $LEN"
-	exit
-fi
-
-dd if=$FIT_IMG of=$FIT_IMG.part1 count=1 bs=$OFF
-dd if=$FIT_IMG of=$FIT_IMG.part2 skip=1 ibs=$END
-
-cat $FIT_IMG.part1  >  $FIT_IMG.resig
-cat $FIT_SIG        >> $FIT_IMG.resig
-cat $FIT_IMG.part2  >> $FIT_IMG.resig
-
-rm $FIT_IMG.part1 && $FIT_IMG.part2
-
-echo
-echo "Re-signed fit image is OK: $FIT_IMG.resig"
-echo
+# openssl dgst -sha256 -sign keys/dev.key -out sha256-rsa2048.sign fit/boot.data2sign
 
+source scripts/fit-base.sh
+fit_resign $*
diff --git a/scripts/fit-unpack.sh b/scripts/fit-unpack.sh
new file mode 100755
index 0000000000..36173134cc
--- /dev/null
+++ b/scripts/fit-unpack.sh
@@ -0,0 +1,113 @@
+#!/bin/bash
+#
+# Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier: GPL-2.0
+#
+
+FIT_UBOOT_IMAGES=(
+	"/images/uboot@1      u-boot-nodtb.bin"
+	"/images/optee@1      tee.bin"
+	"/images/fdt@1        u-boot.dtb"
+)
+
+FIT_BOOT_IMAGES=(
+	"/images/kernel@1     kernel.img"
+	"/images/ramdisk@1    ramdisk.img"
+	"/images/resource@1   resource.img"
+	"/images/fdt@1        rk-kernel.dtb"
+)
+
+function usage()
+{
+	echo
+	echo "usage:"
+	echo "    $0 -f [fit/itb image] -o [output] -u    // unpack uboot.fit/itb"
+	echo "    $0 -f [fit/itb image] -o [output] -b    // unpack boot.fit/itb"
+	echo
+}
+
+function args_process()
+{
+	if [ $# -ne 5 ]; then
+		usage
+		exit 1
+	fi
+
+	while [ $# -gt 0 ]; do
+		case $1 in
+			-b|-u)
+				TYPE=$1
+				shift 1
+				;;
+			-f)
+				IMAGE=$2
+				shift 2
+				;;
+			-o)
+				OUTPUT=$2
+				shift 2
+				;;
+			*)
+				usage
+				exit 1
+				;;
+		esac
+	done
+
+	if [ ! -f $IMAGE ]; then
+		echo "ERROR: No $IMAGE"
+		exit 1
+	elif [ -z $OUTPUT ]; then
+		echo "ERROR: No output"
+		exit 1
+	elif [ -z $TYPE ]; then
+		echo "ERROR: No args -u or -b"
+		exit 1
+	fi
+
+	mkdir -p $OUTPUT
+}
+
+function copy_image()
+{
+	LIST=$1
+
+	NODE=`echo $LIST | awk '{ print $1 }'`
+	NAME=`echo $LIST | awk '{ print $2 }'`
+	OFFS=`fdtget -ti $IMAGE $NODE data-position`
+	SIZE=`fdtget -ti $IMAGE $NODE data-size`
+	if [ -z $OFFS ]; then
+		echo "ERROR: No find $NODE"
+		exit 1
+	fi
+
+	printf "    %-15s: %d bytes\n" $OUTPUT$NAME $SIZE
+	if [ $SIZE -ne 0 ]; then
+		dd if=$IMAGE         of=$OUTPUT/dd.tmp  bs=$OFFS skip=1  >/dev/null 2>&1
+		dd if=$OUTPUT/dd.tmp of=$OUTPUT/$NAME   bs=$SIZE count=1 >/dev/null 2>&1
+		rm $OUTPUT/dd.tmp
+	else
+		touch $OUTPUT/$NAME
+	fi
+}
+
+function gen_images()
+{
+	echo "Image:"
+	if [ $TYPE = "-u" ]; then
+		for LIST in "${FIT_UBOOT_IMAGES[@]}"
+		do
+			copy_image "$LIST"
+		done
+	elif [ $TYPE = "-k" ]; then
+		for LIST in "${FIT_BOOT_IMAGES[@]}"
+		do
+			copy_image "$LIST"
+		done
+	fi
+	echo
+}
+
+args_process $*
+gen_images
\ No newline at end of file
diff --git a/scripts/fit-vboot-boot.sh b/scripts/fit-vboot-boot.sh
new file mode 100755
index 0000000000..e9fa2d0324
--- /dev/null
+++ b/scripts/fit-vboot-boot.sh
@@ -0,0 +1,15 @@
+#!/bin/bash
+#
+# Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier: GPL-2.0
+#
+
+source scripts/fit-base.sh
+
+fit_process_args $*
+fit_rebuild
+fit_boot_make_itb
+fit_boot_make_img
+echo
+fit_verbose_boot
diff --git a/scripts/fit-vboot-kernel.sh b/scripts/fit-vboot-kernel.sh
new file mode 100755
index 0000000000..20e1e2f745
--- /dev/null
+++ b/scripts/fit-vboot-kernel.sh
@@ -0,0 +1,15 @@
+#!/bin/bash
+#
+# Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier: GPL-2.0
+#
+
+source scripts/fit-base.sh
+
+fit_process_args $*
+fit_rebuild
+fit_kernel_make_itb
+fit_kernel_make_img
+echo
+fit_verbose_kernel
diff --git a/scripts/fit-vboot-uboot.sh b/scripts/fit-vboot-uboot.sh
new file mode 100755
index 0000000000..cb80e658ef
--- /dev/null
+++ b/scripts/fit-vboot-uboot.sh
@@ -0,0 +1,15 @@
+#!/bin/bash
+#
+# Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier: GPL-2.0
+#
+
+source scripts/fit-base.sh
+
+fit_process_args $*
+fit_rebuild
+fit_uboot_make_itb
+fit_uboot_make_img
+echo
+fit_verbose_uboot
diff --git a/scripts/fit-vboot.sh b/scripts/fit-vboot.sh
new file mode 100755
index 0000000000..36958112c1
--- /dev/null
+++ b/scripts/fit-vboot.sh
@@ -0,0 +1,20 @@
+#!/bin/bash
+#
+# Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier: GPL-2.0
+#
+
+source scripts/fit-base.sh
+fit_process_args $*
+fit_rebuild
+fit_boot_make_itb
+fit_boot_make_img
+fit_uboot_make_itb
+fit_uboot_make_img
+
+echo
+fit_verbose_uboot
+fit_verbose_boot
+fit_verbose_loader
+echo

commit 22c7c1a827f19dba5fd65622b599e10d5319e3e9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Apr 4 11:20:31 2020 +0800

    spl: fit: support load multiple backup of images
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I29bce60f1b958baedbd2b45e86a611b89547c0d8

diff --git a/Kconfig b/Kconfig
index d8d75067ab..34d11d2cf5 100644
--- a/Kconfig
+++ b/Kconfig
@@ -333,6 +333,20 @@ config SPL_FIT_HW_CRYPTO
 	help
 	  Enable SPL hardware crypto for FIT image checksum and rsa verify.
 
+config SPL_FIT_IMAGE_KB
+	int "SPL FIT image size in KiB"
+	depends on SPL_FIT
+	default 2048
+	help
+	  SPL FIT image size in KiB.
+
+config SPL_FIT_IMAGE_MULTIPLE
+	int "SPL FIT image multiple number"
+	depends on SPL_FIT
+	default 1
+	help
+	  SPL FIT image multiple number.
+
 config SPL_SYS_DCACHE_OFF
 	bool "Disable SPL dcache"
 	default y
diff --git a/common/spl/spl_fat.c b/common/spl/spl_fat.c
index 59a85a986a..10cbdba468 100644
--- a/common/spl/spl_fat.c
+++ b/common/spl/spl_fat.c
@@ -71,8 +71,14 @@ int spl_load_image_fat(struct spl_image_info *spl_image,
 	if (err <= 0)
 		goto end;
 
+#ifdef CONFIG_SPL_FIT_IMAGE_MULTIPLE
+	if ((IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
+	     image_get_magic(header) == FDT_MAGIC) ||
+	     CONFIG_SPL_FIT_IMAGE_MULTIPLE > 1) {
+#else
 	if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
 	    image_get_magic(header) == FDT_MAGIC) {
+#endif
 		struct spl_load_info load;
 
 		debug("Found FIT\n");
diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 1e95b14445..b45a8988d6 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -342,8 +342,9 @@ static int spl_fit_image_get_os(const void *fit, int noffset, uint8_t *os)
 #endif
 }
 
-int spl_load_simple_fit(struct spl_image_info *spl_image,
-			struct spl_load_info *info, ulong sector, void *fit)
+static int spl_internal_load_simple_fit(struct spl_image_info *spl_image,
+					struct spl_load_info *info,
+					ulong sector, void *fit)
 {
 	int sectors;
 	ulong size;
@@ -528,3 +529,34 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 
 	return 0;
 }
+
+int spl_load_simple_fit(struct spl_image_info *spl_image,
+			struct spl_load_info *info, ulong sector, void *fit)
+{
+	ulong sector_offs = sector;
+	int i;
+
+	for (i = 0; i < CONFIG_SPL_FIT_IMAGE_MULTIPLE; i++) {
+		if (i > 0) {
+			sector_offs +=
+			   i * ((CONFIG_SPL_FIT_IMAGE_KB << 10) / info->bl_len);
+			printf("Trying fit image at 0x%lx sector\n", sector_offs);
+			if (info->read(info, sector_offs, 1, fit) != 1) {
+				printf("IO error\n");
+				continue;
+			}
+		}
+
+		if (image_get_magic(fit) != FDT_MAGIC) {
+			printf("Bad fit magic\n");
+			continue;
+		}
+
+		if (!spl_internal_load_simple_fit(spl_image, info,
+						  sector_offs, fit))
+			return 0;
+	}
+
+	return -EINVAL;
+}
+
diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c
index b31cb9c71a..d929f3ab9f 100644
--- a/common/spl/spl_mmc.c
+++ b/common/spl/spl_mmc.c
@@ -103,8 +103,14 @@ int mmc_load_image_raw_sector(struct spl_image_info *spl_image,
 		goto end;
 	}
 
+#ifdef CONFIG_SPL_FIT_IMAGE_MULTIPLE
+	if ((IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
+	     image_get_magic(header) == FDT_MAGIC) ||
+	     CONFIG_SPL_FIT_IMAGE_MULTIPLE > 1) {
+#else
 	if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
 	    image_get_magic(header) == FDT_MAGIC) {
+#endif
 		struct spl_load_info load;
 
 		debug("Found FIT\n");
diff --git a/common/spl/spl_nand.c b/common/spl/spl_nand.c
index 61aedf9f79..4d7238d795 100644
--- a/common/spl/spl_nand.c
+++ b/common/spl/spl_nand.c
@@ -85,8 +85,14 @@ static int spl_nand_load_element(struct spl_image_info *spl_image,
 	if (err)
 		return err;
 
+#ifdef CONFIG_SPL_FIT_IMAGE_MULTIPLE
+	if ((IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
+	     image_get_magic(header) == FDT_MAGIC) ||
+	     CONFIG_SPL_FIT_IMAGE_MULTIPLE > 1) {
+#else
 	if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
 	    image_get_magic(header) == FDT_MAGIC) {
+#endif
 		struct spl_load_info load;
 
 		debug("Found FIT\n");
diff --git a/common/spl/spl_net.c b/common/spl/spl_net.c
index 79c9b3584b..f2d27434b4 100644
--- a/common/spl/spl_net.c
+++ b/common/spl/spl_net.c
@@ -47,8 +47,14 @@ static int spl_net_load_image(struct spl_image_info *spl_image,
 		return rv;
 	}
 
+#ifdef CONFIG_SPL_FIT_IMAGE_MULTIPLE
+	if ((IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
+	     image_get_magic(header) == FDT_MAGIC) ||
+	     CONFIG_SPL_FIT_IMAGE_MULTIPLE > 1) {
+#else
 	if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
 	    image_get_magic(header) == FDT_MAGIC) {
+#endif
 		struct spl_load_info load;
 
 		debug("Found FIT\n");
diff --git a/common/spl/spl_ram.c b/common/spl/spl_ram.c
index 28663d8915..86136fce47 100644
--- a/common/spl/spl_ram.c
+++ b/common/spl/spl_ram.c
@@ -39,8 +39,14 @@ static int spl_ram_load_image(struct spl_image_info *spl_image,
 		spl_dfu_cmd(0, "dfu_alt_info_ram", "ram", "0");
 #endif
 
+#ifdef CONFIG_SPL_FIT_IMAGE_MULTIPLE
+	if ((IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
+	     image_get_magic(header) == FDT_MAGIC) ||
+	     CONFIG_SPL_FIT_IMAGE_MULTIPLE > 1) {
+#else
 	if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
 	    image_get_magic(header) == FDT_MAGIC) {
+#endif
 		struct spl_load_info load;
 
 		debug("Found FIT\n");
diff --git a/common/spl/spl_spi.c b/common/spl/spl_spi.c
index b3507eaf4b..bda318cc49 100644
--- a/common/spl/spl_spi.c
+++ b/common/spl/spl_spi.c
@@ -113,8 +113,14 @@ static int spl_spi_load_image(struct spl_image_info *spl_image,
 			return err;
 		}
 
+#ifdef CONFIG_SPL_FIT_IMAGE_MULTIPLE
+		if ((IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
+		     image_get_magic(header) == FDT_MAGIC) ||
+		     CONFIG_SPL_FIT_IMAGE_MULTIPLE > 1) {
+#else
 		if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
-			image_get_magic(header) == FDT_MAGIC) {
+		    image_get_magic(header) == FDT_MAGIC) {
+#endif
 			struct spl_load_info load;
 
 			debug("Found FIT\n");

commit 36c668870ede3d7b6f1c1be4ec19683fcf08f33c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Apr 10 10:19:17 2020 +0800

    cmd: bootuimage: update return code
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I9bd10b448b409fe9e74c7b4c56f5ec7ec3cd4a85

diff --git a/cmd/bootuimage.c b/cmd/bootuimage.c
index 1b4122c02d..5118b59199 100644
--- a/cmd/bootuimage.c
+++ b/cmd/bootuimage.c
@@ -93,12 +93,12 @@ static int do_boot_uimage(cmd_tbl_t *cmdtp, int flag,
 
 	if (ret && argc != 1) {
 		uimage_sysmem_free_each(img, ramdisk_sz);
-		ret = -1;
+		goto out;
 	}
 
-	return ret;
+	return CMD_RET_SUCCESS;
 out:
-	return -1;
+	return CMD_RET_FAILURE;
 }
 
 U_BOOT_CMD(

commit b72261dd0f1acec2156a7686979a5e2b4c6d8a13
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Apr 10 10:18:58 2020 +0800

    cmd: bootfit: update return code
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Icaa55c9a7be873d413e91d742bbedecb707447a1

diff --git a/cmd/bootfit.c b/cmd/bootfit.c
index c3250a8392..e5c869fb41 100644
--- a/cmd/bootfit.c
+++ b/cmd/bootfit.c
@@ -105,12 +105,12 @@ static int do_boot_fit(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 
 	if (ret && argc != 1) {
 		fit_sysmem_free_each(fit);
-		ret = -1;
+		goto out;
 	}
 
-	return ret;
+	return CMD_RET_SUCCESS;
 out:
-	return -1;
+	return CMD_RET_FAILURE;
 }
 
 U_BOOT_CMD(

commit b9e68cc3b89e78d384c1c687df23ce397c17e645
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Apr 8 19:41:35 2020 +0800

    rockchip: Kconfig: add option to choose fit image pack
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I6551be3357ef55d789a4cf90d02d2224041b893d

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index f78d27c3a9..81dabc083c 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -681,6 +681,12 @@ config ROCKCHIP_PRELOADER_SERIAL
 	  This enable U-Boot using pre-loader atags serial configure to initialize console.
 	  It denpends on serial aliases to find pre-loader serial number.
 
+config ROCKCHIP_FIT_IMAGE_PACK
+	bool "Rockchip fit image pack of U-Boot and TEE"
+	default n
+	help
+	  This enable fit image pack of U-Boot and TEE, it's used for make.sh script.
+
 config GICV2
 	bool "ARM GICv2"
 

commit 03fd0d5bb15cbb3f6f532d2b8776e911e0b87c5f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 2 20:20:43 2020 +0800

    rockchip: board: implement write rollback index
    
    Exactly before jumping to linux.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ieb133c0ea6b9a3b4f1337348efa8865c60dc8586

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index f008072716..7ebff6d948 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -17,6 +17,7 @@
 #include <dm.h>
 #include <dvfs.h>
 #include <io-domain.h>
+#include <image.h>
 #include <key.h>
 #include <memblk.h>
 #include <misc.h>
@@ -32,6 +33,7 @@
 #include <dm/root.h>
 #include <power/charge_display.h>
 #include <power/regulator.h>
+#include <optee_include/OpteeClientInterface.h>
 #include <asm/arch/boot_mode.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/cpu.h>
@@ -416,7 +418,7 @@ void arch_preboot_os(uint32_t bootm_state)
 		hotkey_run(HK_CLI_OS_PRE);
 }
 
-void board_quiesce_devices(void)
+void board_quiesce_devices(void *images)
 {
 	hotkey_run(HK_CMDLINE);
 	hotkey_run(HK_CLI_OS_GO);
@@ -425,6 +427,11 @@ void board_quiesce_devices(void)
 	/* Destroy atags makes next warm boot safer */
 	atags_destroy();
 #endif
+
+#ifdef CONFIG_FIT_ROLLBACK_PROTECT
+	/* TODO */
+	printf("fit: rollback protect not implement\n");
+#endif
 }
 
 void enable_caches(void)

commit 4181c9fa95c5040a5eaf763916b089cd3280addb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 2 20:20:27 2020 +0800

    include: image: add rollback_index
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I2f7f222e7453fb16598e3fabb861962c0600709f

diff --git a/include/image.h b/include/image.h
index 2f897eca2a..38a4410ccc 100644
--- a/include/image.h
+++ b/include/image.h
@@ -396,6 +396,10 @@ typedef struct bootm_headers {
 #ifdef CONFIG_LMB
 	struct lmb	lmb;		/* for memory mgmt */
 #endif
+
+#ifdef CONFIG_FIT_ROLLBACK_PROTECT
+	u32 rollback_index;
+#endif
 } bootm_headers_t;
 
 extern bootm_headers_t images;

commit e1aab64013804e120d3fc5d6940ed7245d8f9c2a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 2 20:34:43 2020 +0800

    lib: efi: fix compile error
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I2a1ee3b81eb20038f6723a205a871d43d8cb71a2

diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c
index cf69c06721..cdee10956e 100644
--- a/lib/efi_loader/efi_boottime.c
+++ b/lib/efi_loader/efi_boottime.c
@@ -887,7 +887,7 @@ static efi_status_t EFIAPI efi_exit_boot_services(void *image_handle,
 {
 	EFI_ENTRY("%p, %ld", image_handle, map_key);
 
-	board_quiesce_devices();
+	board_quiesce_devices(NULL);
 
 	/* Fix up caches for EFI payloads if necessary */
 	efi_exit_caches();

commit a6b5d4953bc5fee1b245fc00c2388e5d6a43e018
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 2 20:19:50 2020 +0800

    arm: add bootm_headers_t args for announce_and_cleanup()
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I8b709ffa378d2a802e9e9daf192c662af5588161

diff --git a/arch/arm/include/asm/u-boot-arm.h b/arch/arm/include/asm/u-boot-arm.h
index ef4fca68ee..724b55025d 100644
--- a/arch/arm/include/asm/u-boot-arm.h
+++ b/arch/arm/include/asm/u-boot-arm.h
@@ -38,7 +38,7 @@ int	arch_early_init_r(void);
 
 /* board/.../... */
 int	board_init(void);
-void	board_quiesce_devices(void);
+void	board_quiesce_devices(void *images);
 
 /* cpu/.../interrupt.c */
 int	arch_interrupt_init	(void);
diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index c160c829ba..bcf22a2ab1 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -67,7 +67,7 @@ void arch_lmb_reserve(struct lmb *lmb)
 		    gd->ram_top - sp);
 }
 
-__weak void board_quiesce_devices(void)
+__weak void board_quiesce_devices(void *images)
 {
 }
 
@@ -76,7 +76,7 @@ __weak void board_quiesce_devices(void)
  *
  * @fake: non-zero to do everything except actually boot
  */
-static void announce_and_cleanup(int fake)
+static void announce_and_cleanup(bootm_headers_t *images, int fake)
 {
 	ulong us;
 
@@ -97,7 +97,7 @@ static void announce_and_cleanup(int fake)
 	udc_disconnect();
 #endif
 
-	board_quiesce_devices();
+	board_quiesce_devices(images);
 
 	/* Flush all console data */
 	flushc();
@@ -331,7 +331,7 @@ static void boot_jump_linux(bootm_headers_t *images, int flag)
 		(ulong) kernel_entry);
 	bootstage_mark(BOOTSTAGE_ID_RUN_OS);
 
-	announce_and_cleanup(fake);
+	announce_and_cleanup(images, fake);
 
 	if (!fake) {
 #ifdef CONFIG_ARMV8_PSCI
@@ -381,7 +381,7 @@ static void boot_jump_linux(bootm_headers_t *images, int flag)
 	debug("## Transferring control to Linux (at address %08lx)" \
 		"...\n", (ulong) kernel_entry);
 	bootstage_mark(BOOTSTAGE_ID_RUN_OS);
-	announce_and_cleanup(fake);
+	announce_and_cleanup(images, fake);
 
 	if (IMAGE_ENABLE_OF_LIBFDT && images->ft_len)
 		r2 = (unsigned long)images->ft_addr;

commit 6afcbf88073f5a6ff8a6cdeb46ace2cc8b410414
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 2 19:59:12 2020 +0800

    rockchip: spl: implment write rollback-index
    
    Exactly before jumping the next stage.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ib81891ddad474911c0334bb9a370acdcd91603f8

diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index be2654a435..cb370c0625 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -10,6 +10,7 @@
 #include <key.h>
 #include <ram.h>
 #include <spl.h>
+#include <optee_include/OpteeClientInterface.h>
 #include <asm/arch/bootrom.h>
 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
 #include <asm/arch/rk_atags.h>
@@ -295,3 +296,12 @@ void spl_next_stage(struct spl_image_info *spl)
 	}
 }
 #endif
+
+int spl_board_prepare_for_jump(struct spl_image_info *spl_image)
+{
+#if CONFIG_SPL_FIT_ROLLBACK_PROTECT
+	/* TODO */
+	printf("spl fit: rollback protect not implement\n");
+#endif
+	return 0;
+}

commit 7a1370759d2b4d9a17360d5cc25ccc890e0a8b3f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 2 17:44:19 2020 +0800

    fit: add rollback index protect support
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I3af0049532d7b34adadbbb1faf6c54aad6232f93

diff --git a/common/image-fit.c b/common/image-fit.c
index 1b0d567495..37fa0c8ab9 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -1995,6 +1995,24 @@ int fit_image_load_index(bootm_headers_t *images, ulong addr,
 					return -EACCES;
 				}
 				puts("OK\n");
+
+#ifdef CONFIG_FIT_ROLLBACK_PROTECT
+				uint32_t this_index, min_index;
+
+				puts("   Verifying Rollback-index ... ");
+				if (fit_rollback_index_verify(fit,
+						FIT_ROLLBACK_INDEX,
+						&this_index, &min_index)) {
+					puts("Failed to get index\n");
+					return ret;
+				} else if (this_index < min_index) {
+					printf("Reject index %d < %d(min)\n",
+					       this_index, min_index);
+					return -EINVAL;
+				}
+
+				printf("%d >= %d, OK\n", this_index, min_index);
+#endif
 			}
 			bootstage_mark(BOOTSTAGE_ID_FIT_CONFIG);
 		}
diff --git a/common/image-sig.c b/common/image-sig.c
index bf824fef3c..a106a2804d 100644
--- a/common/image-sig.c
+++ b/common/image-sig.c
@@ -10,6 +10,7 @@
 #else
 #include <common.h>
 #include <malloc.h>
+#include <optee_include/OpteeClientInterface.h>
 DECLARE_GLOBAL_DATA_PTR;
 #endif /* !USE_HOSTCC*/
 #include <image.h>
@@ -470,3 +471,30 @@ int fit_config_verify(const void *fit, int conf_noffset)
 	return fit_config_verify_required_sigs(fit, conf_noffset,
 					       gd_fdt_blob());
 }
+
+#ifndef USE_HOSTCC
+#if CONFIG_IS_ENABLED(FIT_ROLLBACK_PROTECT)
+int fit_rollback_index_verify(const void *fit, uint32_t rollback_fd,
+			      uint32_t *this_index, uint32_t *min_index)
+{
+	uint32_t tmp_this;
+	uint64_t tmp_min;
+	int images_noffset;
+	int def_noffset;
+
+	if (fit_get_image_defconf_node(fit, &images_noffset, &def_noffset))
+		return -ENOENT;
+
+	if (fit_image_get_rollback_index(fit, def_noffset, &tmp_this))
+		return -ENODEV;
+
+	/* TODO */
+	tmp_min = tmp_this;
+
+	*this_index = tmp_this;
+	*min_index = tmp_min;
+
+	return 0;
+}
+#endif
+#endif
diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index a0394a9f52..1e95b14445 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -11,6 +11,7 @@
 #include <linux/libfdt.h>
 #include <spl.h>
 #include <malloc.h>
+#include <optee_include/OpteeClientInterface.h>
 
 #ifndef CONFIG_SYS_BOOTM_LEN
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)
@@ -408,8 +409,25 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 		}
 		printf("\n");
 	}
-#endif
 
+#ifdef CONFIG_SPL_FIT_ROLLBACK_PROTECT
+	uint32_t this_index, min_index;
+
+	ret = fit_rollback_index_verify(fit, FIT_ROLLBACK_INDEX_SPL,
+					&this_index, &min_index);
+	if (ret) {
+		printf("fit failed to get rollback index, ret=%d\n", ret);
+		return ret;
+	} else if (this_index < min_index) {
+		printf("fit reject rollback: %d < %d(min)\n",
+		       this_index, min_index);
+		return -EINVAL;
+	}
+
+	spl_image->rollback_index = this_index;
+	printf("rollback index: %d >= %d, OK\n", this_index, min_index);
+#endif
+#endif
 	/*
 	 * Find the U-Boot image using the following search order:
 	 *   - start at 'firmware' (e.g. an ARM Trusted Firmware)
diff --git a/include/image.h b/include/image.h
index c74b57c56a..2f897eca2a 100644
--- a/include/image.h
+++ b/include/image.h
@@ -943,6 +943,10 @@ int bootz_setup(ulong image, ulong *start, ulong *end);
 #endif
 #define FIT_ALIGN(x)		(((x)+IMAGE_ALIGN_SIZE-1)&~(IMAGE_ALIGN_SIZE-1))
 
+/* fit rollback index file description magic */
+#define FIT_ROLLBACK_INDEX	0xf1de0001
+#define FIT_ROLLBACK_INDEX_SPL	0xf1de8002
+
 /* cmdline argument format parsing */
 int fit_parse_conf(const char *spec, ulong addr_curr,
 		ulong *addr, const char **conf_name);
@@ -1054,6 +1058,8 @@ int fit_check_format(const void *fit);
 
 int fit_conf_find_compat(const void *fit, const void *fdt);
 int fit_conf_get_node(const void *fit, const char *conf_uname);
+int fit_rollback_index_verify(const void *fit, uint32_t rollback_fd,
+			      uint32_t *this_index, uint32_t *min_index);
 
 /**
  * fit_conf_get_prop_node() - Get node refered to by a configuration
diff --git a/include/spl.h b/include/spl.h
index a453afb53b..c858676a63 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -37,6 +37,9 @@ struct spl_image_info {
 	uintptr_t entry_point_os;	/* point to uboot or kernel */
 #endif
 	void *fdt_addr;
+#if CONFIG_IS_ENABLED(FIT_ROLLBACK_PROTECT)
+	u32 rollback_index;
+#endif
 	u32 boot_device;
 	u32 next_stage;
 	u32 size;

commit 83c56efb3c652b94edaa1a30ad35df8ce0abad8e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 2 16:34:24 2020 +0800

    Kconfig: fit: add configure for rollback-index protection
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I15caa12aa15b48e805f8aa42411bd258a3a66f7f

diff --git a/Kconfig b/Kconfig
index c5dd4ea113..d8d75067ab 100644
--- a/Kconfig
+++ b/Kconfig
@@ -222,6 +222,12 @@ config FIT_SIGNATURE
 	  format support in this case, enable it using
 	  CONFIG_IMAGE_FORMAT_LEGACY.
 
+config FIT_ROLLBACK_PROTECT
+	bool "Enable rollback-index protection for FIT image"
+	depends on FIT_SIGNATURE
+	help
+	  Enable rollback-index protection for FIT image
+
 config FIT_VERBOSE
 	bool "Show verbose messages when FIT images fail"
 	help
@@ -272,6 +278,12 @@ config SPL_FIT_SIGNATURE
 	select SPL_FIT
 	select SPL_RSA
 
+config SPL_FIT_ROLLBACK_PROTECT
+	bool "Enable SPL rollback-index protection for FIT image"
+	depends on SPL_FIT_SIGNATURE
+	help
+	  Enable SPL rollback-index protection for FIT image
+
 config SPL_LOAD_FIT
 	bool "Enable SPL loading U-Boot as a FIT"
 	select SPL_FIT

commit f8ca9d164ad98a2224b3b852a844f5c9d2693b37
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 2 19:54:04 2020 +0800

    spl: do cleanup before jumping to next stage
    
    Cache/mmu/interrupt cleanup is recommand before jumping to
    next stage to avoid some uncertain things.
    
    Provide a arch/board-specific callback to do cleanup things.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ic5e4e378ec9080e7af283741370bcd9c2dc897dc

diff --git a/common/spl/spl.c b/common/spl/spl.c
index b3873def79..dc146f5bf5 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -85,6 +85,12 @@ void __weak spl_perform_fixups(struct spl_image_info *spl_image)
 /* Get the next stage process */
 __weak void spl_next_stage(struct spl_image_info *spl) {}
 
+/* Weak default function for arch/board-specific preppare before jumping */
+int __weak spl_board_prepare_for_jump(struct spl_image_info *spl_image)
+{
+	return 0;
+}
+
 void spl_fixup_fdt(void)
 {
 #if defined(CONFIG_SPL_OF_LIBFDT) && defined(CONFIG_SYS_SPL_ARGS_ADDR)
@@ -560,7 +566,8 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 #endif
 #if CONFIG_IS_ENABLED(OPTEE)
 	case IH_OS_OP_TEE:
-		debug("Jumping to U-Boot via OP-TEE\n");
+		printf("Jumping to U-Boot via OP-TEE\n");
+		spl_cleanup_before_jump(&spl_image);
 		spl_optee_entry(NULL, (void *)spl_image.entry_point_os,
 				(void *)spl_image.fdt_addr,
 				(void *)spl_image.entry_point);
@@ -663,3 +670,27 @@ ulong spl_relocate_stack_gd(void)
 	return 0;
 #endif
 }
+
+/* cleanup before jump to next stage */
+void spl_cleanup_before_jump(struct spl_image_info *spl_image)
+{
+	spl_board_prepare_for_jump(spl_image);
+
+	disable_interrupts();
+
+	/*
+	 * Turn off I-cache and invalidate it
+	 */
+	icache_disable();
+	invalidate_icache_all();
+
+	/*
+	 * Turn off D-cache
+	 * dcache_disable() in turn flushes the d-cache and disables MMU
+	 */
+	dcache_disable();
+	invalidate_dcache_all();
+
+	dsb();
+	isb();
+}
diff --git a/common/spl/spl_atf.c b/common/spl/spl_atf.c
index a6ea1a2968..0a26e3cc01 100644
--- a/common/spl/spl_atf.c
+++ b/common/spl/spl_atf.c
@@ -114,21 +114,6 @@ void bl31_entry(uintptr_t bl31_entry, uintptr_t bl32_entry,
 
 	bl31_params = bl2_plat_get_bl31_params(bl32_entry, bl33_entry);
 
-	raw_write_daif(SPSR_EXCEPTION_MASK);
-
-	/*
-	 * Turn off I-cache and invalidate it
-	 */
-	icache_disable();
-	invalidate_icache_all();
-
-	/*
-	 * turn off D-cache
-	 * dcache_disable() in turn flushes the d-cache and disables MMU
-	 */
-	dcache_disable();
-	invalidate_dcache_all();
-
 	atf_entry((void *)bl31_params, (void *)fdt_addr);
 }
 
@@ -213,6 +198,9 @@ void spl_invoke_atf(struct spl_image_info *spl_image)
 	if (CONFIG_IS_ENABLED(ATF_NO_PLATFORM_PARAM))
 		platform_param = 0;
 
+	/* do cleanup */
+	spl_cleanup_before_jump(spl_image);
+
 	/*
 	 * We don't provide a BL3-2 entry yet, but this will be possible
 	 * using similar logic.
diff --git a/include/spl.h b/include/spl.h
index 07363477cd..a453afb53b 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -317,10 +317,22 @@ void spl_optee_entry(void *arg0, void *arg1, void *arg2, void *arg3);
  */
 void board_return_to_bootrom(void);
 
+/**
+ * spl_cleanup_before_jump() - cleanup cache/mmu/interrupt, etc before jump
+ *			       to next stage.
+ */
+void spl_cleanup_before_jump(struct spl_image_info *spl_image);
+
 /**
  * spl_perform_fixups() - arch/board-specific callback before processing
  *                        the boot-payload
  */
 void spl_perform_fixups(struct spl_image_info *spl_image);
 
+/**
+ * spl_board_prepare_for_jump() - arch/board-specific callback exactly before
+ *				  jumping to next stage
+ */
+int spl_board_prepare_for_jump(struct spl_image_info *spl_image);
+
 #endif

commit 91205f1d2f5ffaf1bb92dd2cd95d71ce8eb4c500
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 9 11:58:44 2020 +0800

    make.sh: fix return result code is not 0 when build success
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I27065f6902ab522eba9444ed7771871878787d31

diff --git a/make.sh b/make.sh
index 677caea154..e4fea170af 100755
--- a/make.sh
+++ b/make.sh
@@ -472,12 +472,11 @@ pack_uboot_image()
 		fi
 
 		${RKTOOLS}/loaderimage --pack --uboot u-boot.bin uboot.img ${UBOOT_LOAD_ADDR} ${PLATFORM_UBOOT_IMG_SIZE}
+		# Delete u-boot.img and u-boot-dtb.img, which makes users not be confused with final uboot.img
+		ls u-boot.img >/dev/null 2>&1 && rm u-boot.img -rf
+		ls u-boot-dtb.img >/dev/null 2>&1 && rm u-boot-dtb.img -rf
 		echo "pack uboot okay! Input: u-boot.bin"
 	fi
-
-	# Delete u-boot.img and u-boot-dtb.img, which makes users not be confused with final uboot.img
-	ls u-boot.img >/dev/null 2>&1 && rm u-boot.img -rf
-	ls u-boot-dtb.img >/dev/null 2>&1 && rm u-boot-dtb.img -rf
 }
 
 pack_uboot_itb_image()
@@ -737,7 +736,7 @@ select_chip_info
 fixup_platform_configure
 sub_commands
 make CROSS_COMPILE=${TOOLCHAIN_GCC} ${OPTION} all --jobs=${JOB}
+pack_uboot_image
 pack_loader_image
 pack_trust_image
-pack_uboot_image
 finish

commit d8d6a3122d76e4c422b46a5d69453dee673e005e
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Apr 8 20:35:35 2020 +0800

    configs: add rv1126_spi_nor_defconfig
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ic4694e1946757463054a974f72425334732275a0

diff --git a/configs/rv1126_spi_nor_defconfig b/configs/rv1126_spi_nor_defconfig
new file mode 100644
index 0000000000..c83dd206ec
--- /dev/null
+++ b/configs/rv1126_spi_nor_defconfig
@@ -0,0 +1,118 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0xc000
+CONFIG_ROCKCHIP_RV1126=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+# CONFIG_SPL_MMC_SUPPORT is not set
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_STACK_R_ADDR=0x3fe0000
+CONFIG_TARGET_EVB_RV1126=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_DEFAULT_DEVICE_TREE="rv1126-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_SPL_BOARD_INIT=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_OPTEE=y
+CONFIG_SPL_LOAD_RKFW=y
+CONFIG_FASTBOOT_BUF_ADDR=0x800800
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPT=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_ITEST is not set
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_NET is not set
+# CONFIG_CMD_NFS is not set
+# CONFIG_CMD_MISC is not set
+CONFIG_CMD_MTD_BLK=y
+# CONFIG_ISO_PARTITION is not set
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_SPL_DTB_MINIMUM=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_DM_CRYPTO=y
+CONFIG_ROCKCHIP_CRYPTO_V2=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_RK8XX_PWRKEY=y
+CONFIG_ADC_KEY=y
+CONFIG_MTD=y
+CONFIG_MTD_BLK=y
+CONFIG_MTD_DEVICE=y
+CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0x1
+CONFIG_SF_DEFAULT_SPEED=50000000
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPI_FLASH_MTD=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_NANENG_USB2=y
+CONFIG_PINCTRL=y
+CONFIG_DM_PMIC=y
+# CONFIG_SPL_PMIC_CHILDREN is not set
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0xff570000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_ROCKCHIP_SFC=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x110b
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_IRQ2GPIO_V2=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
+# CONFIG_EFI_LOADER is not set
+CONFIG_TEST_ROCKCHIP=y

commit 4ef4c8bf6eb03826b18d34d5567f6d3cba8aed94
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Apr 8 16:47:43 2020 +0800

    spl: rkfw: goto boot next stage directly if find used uboot
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ia32663b91e1360bc491f1db364900eb5b27892f9

diff --git a/common/spl/spl_rkfw.c b/common/spl/spl_rkfw.c
index e960037af3..f6a81d6aaf 100644
--- a/common/spl/spl_rkfw.c
+++ b/common/spl/spl_rkfw.c
@@ -422,6 +422,8 @@ int spl_load_rkfw_image(struct spl_image_info *spl_image,
 		ret = rkfw_load_uboot(info, uboot_sector, spl_image, try_count);
 		if (ret)
 			printf("Load uboot image failed! ret=%d\n", ret);
+		else
+			goto boot;
 #ifdef CONFIG_SPL_KERNEL_BOOT
 	} else if (spl_image->next_stage == SPL_NEXT_STAGE_KERNEL) {
 #endif
@@ -434,6 +436,7 @@ int spl_load_rkfw_image(struct spl_image_info *spl_image,
 	}
 #endif
 
+boot:
 #if CONFIG_IS_ENABLED(LOAD_FIT)
 	spl_image->fdt_addr = 0;
 #endif

commit a001312388093614d3216d1065b4e8fc7d6245ac
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Apr 8 17:06:05 2020 +0800

    rockchip: rv1126: change the rockusb PID
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I73a2876d860abafeb4440c3a675a191238ab795d

diff --git a/include/configs/rv1126_common.h b/include/configs/rv1126_common.h
index 6b7470834f..86fb9e661c 100644
--- a/include/configs/rv1126_common.h
+++ b/include/configs/rv1126_common.h
@@ -41,7 +41,7 @@
 
 /* usb mass storage */
 #define CONFIG_USB_FUNCTION_MASS_STORAGE
-#define CONFIG_ROCKUSB_G_DNL_PID        0x330d
+#define CONFIG_ROCKUSB_G_DNL_PID	0x110b
 
 #define ENV_MEM_LAYOUT_SETTINGS		\
 	"scriptaddr=0x00000000\0"	\

commit 958c61be271ee0fbb358b74424b47306c61986d1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Apr 8 15:23:44 2020 +0800

    rockchip: rv1126: add make fit script
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I502661c810a98bc7abd3d504fe8a9847ad1a9616

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh b/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh
new file mode 100755
index 0000000000..85b1b4f316
--- /dev/null
+++ b/arch/arm/mach-rockchip/rv1126/rv1126_make_fit.sh
@@ -0,0 +1,85 @@
+#!/bin/bash
+
+cat << EOF
+/*
+ * Copyright (C) 2017 Rockchip Electronic Co.,Ltd
+ *
+ * Simple U-boot fit source file containing U-Boot, dtb and optee
+ */
+
+/dts-v1/;
+
+/ {
+	description = "Simple image with OP-TEE support";
+	#address-cells = <1>;
+
+	images {
+		uboot@1 {
+			description = "U-Boot";
+			data = /incbin/("./u-boot-nodtb.bin");
+			type = "standalone";
+			os = "U-Boot";
+			arch = "arm";
+			compression = "none";
+EOF
+
+OUTDIR=$PWD
+DARM_BASE=`sed -n "/CONFIG_SYS_SDRAM_BASE=/s/CONFIG_SYS_SDRAM_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
+UBOOT_BASE=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
+echo "			load = <"$UBOOT_BASE">;"
+cat << EOF
+			hash@1 {
+				algo = "sha256";
+			};
+		};
+		optee@1 {
+			description = "OP-TEE";
+			data = /incbin/("./tee.bin");
+			type = "firmware";
+			arch = "arm";
+			os = "op-tee";
+			compression = "none";
+EOF
+
+if [ -z "$1" -o ! -z "$(echo $1 | sed 's/[x, X, 0-9, a-f, A-F]//g')" ]; then
+	TEE_OFFSET=0x8400000
+else
+	TEE_OFFSET=$1
+fi
+TEE_LOAD_ADDR=$((DARM_BASE+TEE_OFFSET))
+TEE_LOAD_ADDR=$(echo "obase=16;${TEE_LOAD_ADDR}"|bc)
+echo "			load = <0x"$TEE_LOAD_ADDR">;"
+echo "			entry = <0x"$TEE_LOAD_ADDR">;"
+cat << EOF
+			hash@1 {
+				algo = "sha256";
+			};
+		};
+		fdt@1 {
+			description = "U-Boot dtb";
+			data = /incbin/("./u-boot.dtb");
+			type = "flat_dt";
+			compression = "none";
+			hash@1 {
+				algo = "sha256";
+			};
+		};
+	};
+
+	configurations {
+		default = "conf@1";
+		conf@1 {
+			description = "Rockchip armv7 with OP-TEE";
+			rollback-index = <0x0>;
+			firmware = "optee@1";
+			loadables = "uboot@1";
+			fdt = "fdt@1";
+			signature@1 {
+				algo = "sha256,rsa2048";
+				key-name-hint = "dev";
+				sign-images = "fdt", "firmware", "loadables";
+			};
+		};
+	};
+};
+EOF

commit aa8ddc585dcf3fd8796bf05b6a25630c72dc7ef6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Apr 8 14:18:04 2020 +0800

    make.sh: support/fix fit image pack
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Iee11cbb3c77aff339bb99e4f20f80d31adc08174

diff --git a/make.sh b/make.sh
index abea4b552b..677caea154 100755
--- a/make.sh
+++ b/make.sh
@@ -98,6 +98,8 @@ PLATFORM_SHA=
 PLATFORM_UBOOT_IMG_SIZE=
 PLATFORM_TRUST_IMG_SIZE=
 
+PACK_FORMAT="rk"
+
 # Out env param
 PACK_IGNORE_BL32=$TRUST_PACK_IGNORE_BL32	# Value only: "--ignore-bl32"
 #########################################################################################################
@@ -462,18 +464,20 @@ pack_uboot_image()
 		exit 1
 	fi
 
-	# Pack image
-	UBOOT_LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" include/autoconf.mk|tr -d '\r'`
-	if [ ! $UBOOT_LOAD_ADDR ]; then
-		UBOOT_LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" .config|tr -d '\r'`
-	fi
+	if [ "$PACK_FORMAT" = "rk" ]; then
+		# Pack image
+		UBOOT_LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" include/autoconf.mk|tr -d '\r'`
+		if [ ! $UBOOT_LOAD_ADDR ]; then
+			UBOOT_LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" .config|tr -d '\r'`
+		fi
 
-	${RKTOOLS}/loaderimage --pack --uboot u-boot.bin uboot.img ${UBOOT_LOAD_ADDR} ${PLATFORM_UBOOT_IMG_SIZE}
+		${RKTOOLS}/loaderimage --pack --uboot u-boot.bin uboot.img ${UBOOT_LOAD_ADDR} ${PLATFORM_UBOOT_IMG_SIZE}
+		echo "pack uboot okay! Input: u-boot.bin"
+	fi
 
 	# Delete u-boot.img and u-boot-dtb.img, which makes users not be confused with final uboot.img
 	ls u-boot.img >/dev/null 2>&1 && rm u-boot.img -rf
 	ls u-boot-dtb.img >/dev/null 2>&1 && rm u-boot-dtb.img -rf
-	echo "pack uboot okay! Input: u-boot.bin"
 }
 
 pack_uboot_itb_image()
@@ -570,7 +574,10 @@ pack_spl_loader_image()
 	cd -
 	ls *_loader_*.bin >/dev/null 2>&1 && rm *_loader_*.bin
 	mv ${RKBIN}/*_loader_*.bin ./
-	rename 's/loader_/spl_loader_/' *_loader_*.bin
+	filename=`basename *_loader_*.bin`
+	if [[ $filename != *spl* ]]; then
+		rename 's/loader_/spl_loader_/' *_loader_*.bin
+	fi
 	echo "pack loader(${label}) okay! Input: ${ini}"
 	ls ./*_loader_*.bin
 }
@@ -640,13 +647,13 @@ pack_32bit_trust_image()
 	TOS=$(echo ${TOS} | sed "s/tools\/rk_tools\//\.\//g")
 	TOS_TA=$(echo ${TOS_TA} | sed "s/tools\/rk_tools\//\.\//g")
 
-	FORMAT=`sed -n "/FORMAT=/s/FORMAT=//p" ${ini} |tr -d '\r'`
-	if [ $FORMAT = "FIT" ]; then
-		./scripts/fit-vboot-uboot.sh --no-vboot --no-rebuild
+	FORMAT=`sed -n "/FIT=/s/FIT=//p" ${ini} |tr -d '\r'`
+	if [ "$FORMAT" = "1" ]; then
+		PACK_FORMAT="fit"
+		./scripts/fit-vboot-uboot.sh --no-vboot --no-rebuild >/dev/null
 		ls uboot.img >/dev/null 2>&1 && rm uboot.img -rf
 		ls trust.img >/dev/null 2>&1 && rm trust.img -rf
-
-		echo "pack uboot.fit okay! Input: ${ini}"
+		echo "pack uboot.fit (with uboot trust) okay! Input: ${ini}"
 	else
 		if [ $TOS_TA ]; then
 			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ${TEE_OUTPUT} ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
@@ -730,7 +737,7 @@ select_chip_info
 fixup_platform_configure
 sub_commands
 make CROSS_COMPILE=${TOOLCHAIN_GCC} ${OPTION} all --jobs=${JOB}
-pack_uboot_image
 pack_loader_image
 pack_trust_image
+pack_uboot_image
 finish

commit 3422369e619ffcb51509e417eb66946854fc7824
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Apr 8 09:15:31 2020 +0800

    misc: Kconfig: change the SPL_ROCKCHIP_HW_DECOMPRESS dependent's attribute
    
    Change "depends on MISC" to "depends on SPL_MISC".
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I1b6c2296d5e88e4e2c0cbafb9bb31790d6f25e66

diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index ff20cab2b1..e1cd1f0a11 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -75,7 +75,7 @@ config ROCKCHIP_HW_DECOMPRESS
 
 config SPL_ROCKCHIP_HW_DECOMPRESS
 	bool "Rockchip HardWare Decompress Support"
-	depends on MISC
+	depends on SPL_MISC
 	help
 	  This driver support Decompress IP built-in Rockchip SoC, support
 	  LZ4, GZIP, PNG, ZLIB.

commit db3b6a92748d953ff0e25f20e5d67d72942e4ffc
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Apr 8 14:18:04 2020 +0800

    make.sh: itb: support spl fit source/generator
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I322343bf65f8536a8a022516c2b53978859ffcc1

diff --git a/make.sh b/make.sh
index 8e858f05f7..abea4b552b 100755
--- a/make.sh
+++ b/make.sh
@@ -517,7 +517,14 @@ pack_uboot_itb_image()
 			TEE_OFFSET=0x8400000
 		fi
 
-		./arch/arm/mach-rockchip/make_fit_optee.sh $TEE_OFFSET > u-boot.its
+		SPL_FIT_SOURCE=`sed -n "/CONFIG_SPL_FIT_SOURCE=/s/CONFIG_SPL_FIT_SOURCE=//p" .config | tr -d '""'`
+		if [ ! -z $SPL_FIT_SOURCE ]; then
+			cp $SPL_FIT_SOURCE u-boot.its
+		else
+			SPL_FIT_GENERATOR=`sed -n "/CONFIG_SPL_FIT_GENERATOR=/s/CONFIG_SPL_FIT_GENERATOR=//p" .config | tr -d '""'`
+			$SPL_FIT_GENERATOR $TEE_OFFSET > u-boot.its
+		fi
+
 		./tools/mkimage -f u-boot.its -E u-boot.itb
 		echo "pack u-boot.itb okay! Input: ${ini}"
 	fi

commit dd99ea93f4f22e46b62b26425f2366b51a8ded54
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Apr 3 15:56:06 2020 +0800

    configs: rv1126: use the rv1126_emmc_defconfig to generate smaller firmware
    
    This defconfig just support emmc storage, and generate smaller firmware
    than rv1126_defconfig.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I694261161839518224550e4e58c2f3ffb358d11b

diff --git a/configs/rv1126_emmc_defconfig b/configs/rv1126_emmc_defconfig
new file mode 100644
index 0000000000..f70a23f34e
--- /dev/null
+++ b/configs/rv1126_emmc_defconfig
@@ -0,0 +1,103 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0xc000
+CONFIG_ROCKCHIP_RV1126=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_STACK_R_ADDR=0x3fe0000
+CONFIG_TARGET_EVB_RV1126=y
+CONFIG_DEFAULT_DEVICE_TREE="rv1126-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+# CONFIG_SKIP_RELOCATE_UBOOT is not set
+CONFIG_SPL_BOARD_INIT=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_OPTEE=y
+CONFIG_SPL_LOAD_RKFW=y
+CONFIG_FASTBOOT_BUF_ADDR=0x800800
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPT=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_ITEST is not set
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_NET is not set
+# CONFIG_CMD_NFS is not set
+# CONFIG_CMD_MISC is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_SPL_DTB_MINIMUM=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_DM_CRYPTO=y
+CONFIG_ROCKCHIP_CRYPTO_V2=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_RK8XX_PWRKEY=y
+CONFIG_ADC_KEY=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_USE_PRE_CONFIG=y
+CONFIG_PINCTRL=y
+CONFIG_DM_PMIC=y
+# CONFIG_SPL_PMIC_CHILDREN is not set
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0xff570000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x110b
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_IRQ2GPIO_V2=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
+# CONFIG_EFI_LOADER is not set
+CONFIG_TEST_ROCKCHIP=y

commit 2e566761125293f07ee45f801aa43e63000bc3a3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 7 21:23:39 2020 +0800

    make.sh: add rv1126 configure
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I9dbd8284c68370901a4c61a0a8a6b6ae519db186

diff --git a/make.sh b/make.sh
index 8e858f05f7..45d71653d2 100755
--- a/make.sh
+++ b/make.sh
@@ -55,6 +55,7 @@ CHIP_CFG_FIXUP_TABLE=(
 	"CONFIG_ROCKCHIP_RK3326    3       -       -,-          -,-        -,-          -,-           AARCH32     -"
 	"CONFIG_ROCKCHIP_RK3308    3       -       1024,1024    2,2        512,512      2,2           -           AARCH32"
 	"CONFIG_ROCKCHIP_RK1808    3       -       1024,1024    2,2        -,-          -,-           -           -"
+	"CONFIG_ROCKCHIP_RV1126    3       -       -,-          -,-        -,-          -,-           -           -"
 )
 
 ########################################### User can modify #############################################

commit 41bb8b737ca44deae0c0cd3a81d67972ec27dc36
Merge: cbfcd6136d aa415ed977
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 7 21:17:40 2020 +0800

    Merge branch 'next-dev' into thunder-boot
    
    Conflicts:
            common/spl/spl_rkfw.c
            drivers/pinctrl/pinctrl-rockchip.c
            make.sh
    
    Change-Id: I93f4dbe1e067c3b938bf64c4964bd5e7023b1daf
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

commit aa415ed977dfe09ebefc58d99f5e73521a5d3f07
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 7 21:00:04 2020 +0800

    common: spl: fix cherry-pick sync conflict
    
    fixes: (1cb393f common: spl: rkfw: support bing-up arm32 firmware)
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I1b7f1a6269794ea9a4a508933381bbb8e3e7133b

diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c
index 8933f8ee48..b31cb9c71a 100644
--- a/common/spl/spl_mmc.c
+++ b/common/spl/spl_mmc.c
@@ -65,6 +65,7 @@ int mmc_load_image_raw_sector(struct spl_image_info *spl_image,
 #ifdef CONFIG_SPL_LOAD_RKFW
 	u32 trust_sectors = CONFIG_RKFW_TRUST_SECTOR;
 	u32 uboot_sectors = CONFIG_RKFW_U_BOOT_SECTOR;
+	u32 boot_sectors = CONFIG_RKFW_BOOT_SECTOR;
 	struct spl_load_info load;
 
 	load.dev = mmc;
@@ -84,7 +85,8 @@ int mmc_load_image_raw_sector(struct spl_image_info *spl_image,
 #endif
 	ret = spl_load_rkfw_image(spl_image, &load,
 				  trust_sectors,
-				  uboot_sectors);
+				  uboot_sectors,
+				  boot_sectors);
 	/* If boot successfully or can't try others, just go end */
 	if (!ret || ret != -EAGAIN)
 		goto end;
diff --git a/common/spl/spl_rkfw.c b/common/spl/spl_rkfw.c
index f59d6b1c4c..e960037af3 100644
--- a/common/spl/spl_rkfw.c
+++ b/common/spl/spl_rkfw.c
@@ -7,6 +7,7 @@
 #include <android_image.h>
 #include <errno.h>
 #include <malloc.h>
+#include <spl.h>
 #include <spl_rkfw.h>
 #include <linux/kernel.h>
 #include <asm/arch/spl_resource_img.h>
@@ -403,7 +404,8 @@ out:
 
 int spl_load_rkfw_image(struct spl_image_info *spl_image,
 			struct spl_load_info *info,
-			u32 trust_sector, u32 uboot_sector)
+			u32 trust_sector, u32 uboot_sector,
+			u32 boot_sector)
 {
 	int ret, try_count = RKFW_RETRY_SECTOR_TIMES;
 	int found_rkfw = 0;
@@ -414,22 +416,24 @@ int spl_load_rkfw_image(struct spl_image_info *spl_image,
 		printf("Load trust image failed! ret=%d\n", ret);
 		goto out;
 	}
-
-	ret = rkfw_load_uboot(info, uboot_sector,
-			      spl_image, try_count);
-	if (ret)
-		printf("Load uboot image failed! ret=%d\n", ret);
-	else
-		goto boot;
-
-	ret = rkfw_load_kernel(info, uboot_sector,
-			       spl_image, try_count);
-	if (ret) {
-		printf("Load kernel image failed! ret=%d\n", ret);
-		goto out;
+#ifdef CONFIG_SPL_KERNEL_BOOT
+	if (spl_image->next_stage == SPL_NEXT_STAGE_UBOOT) {
+#endif
+		ret = rkfw_load_uboot(info, uboot_sector, spl_image, try_count);
+		if (ret)
+			printf("Load uboot image failed! ret=%d\n", ret);
+#ifdef CONFIG_SPL_KERNEL_BOOT
+	} else if (spl_image->next_stage == SPL_NEXT_STAGE_KERNEL) {
+#endif
+		ret = rkfw_load_kernel(info, boot_sector, spl_image, try_count);
+		if (ret) {
+			printf("Load kernel image failed! ret=%d\n", ret);
+			goto out;
+		}
+#ifdef CONFIG_SPL_KERNEL_BOOT
 	}
+#endif
 
-boot:
 #if CONFIG_IS_ENABLED(LOAD_FIT)
 	spl_image->fdt_addr = 0;
 #endif
diff --git a/include/spl_rkfw.h b/include/spl_rkfw.h
index 305608279d..3dfc71d544 100644
--- a/include/spl_rkfw.h
+++ b/include/spl_rkfw.h
@@ -103,5 +103,6 @@ typedef struct tag_second_loader_hdr {
  */
 int spl_load_rkfw_image(struct spl_image_info *spl_image,
 			struct spl_load_info *info,
-			u32 trust_sector, u32 uboot_sector);
+			u32 trust_sector, u32 uboot_sector,
+			u32 boot_sector);
 #endif

commit 6ba9d88bbb2c69dcfe0c87c593a15b277735c2a9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 7 11:45:38 2020 +0800

    fit: drop images->verify condition from verify process
    
    fit verify process should not depend on this condition, because
    it's set by env variable "verify" which maybe can be updated by
    fw_setenv tool in userspace.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ibcce0d388de64f3809e5e302d1c5cffc01e6c290

diff --git a/common/image-fit.c b/common/image-fit.c
index 29c38aa356..1b0d567495 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -1986,7 +1986,7 @@ int fit_image_load_index(bootm_headers_t *images, ulong addr,
 		if (image_type == IH_TYPE_KERNEL) {
 			/* Remember (and possibly verify) this config */
 			images->fit_uname_cfg = fit_base_uname_config;
-			if (IMAGE_ENABLE_VERIFY && images->verify) {
+			if (IMAGE_ENABLE_VERIFY) {
 				puts("   Verifying Hash Integrity ... ");
 				if (fit_config_verify(fit, cfg_noffset)) {
 					puts("Bad Data Hash\n");

commit 0583701d19e1672b57146a686089d7ad4ded1aad
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Apr 3 16:53:37 2020 +0800

    make.sh: refactor select_chip_info() and fixup_platform_configure()
    
    Make the code generic and providing tables to fill what we want.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I03f3d68fbe1d0d69ea0f82897bfbbf176ee9cd04

diff --git a/make.sh b/make.sh
index 31ab076a9c..8e858f05f7 100755
--- a/make.sh
+++ b/make.sh
@@ -13,18 +13,49 @@ FILE=$2
 JOB=`sed -n "N;/processor/p" /proc/cpuinfo|wc -l`
 SUPPORT_LIST=`ls configs/*[r,p][x,v,k][0-9][0-9]*_defconfig`
 
-# @target board: defined in arch/arm/mach-rockchip/<soc>/Kconfig
-# @label: show build message
-# @loader: search for ini file to pack loader
-# @trust: search for ini file to pack trust
-#
-# "NA" means use default name reading from .config
+# @LOADER: map to $RKCHIP_LOADER for loader ini
+# @TRUST:  map to $RKCHIP_TRUST for trust ini
+# @LABEL:  map to $RKCHIP_LEBEL for verbose message
+# @-:      default state/value
+CHIP_TYPE_FIXUP_TABLE=(
+	# CONFIG_XXX                         RKCHIP         LOADER       TRUST         LABEL
+	"CONFIG_ROCKCHIP_RK3368              RK3368H         -            -             -"
+	"CONFIG_ROCKCHIP_RV1108              RV110X          -            -             -"
+	"CONFIG_ROCKCHIP_PX3SE               PX3SE           -            -             -"
+	"CONFIG_ROCKCHIP_RK3126              RK3126          -            -             -"
+	"CONFIG_ROCKCHIP_RK3326              RK3326          -            -             -"
+	"CONFIG_ROCKCHIP_RK3128X             RK3128X         -            -             -"
+	"CONFIG_ROCKCHIP_PX5                 PX5             -            -             -"
+	"CONFIG_ROCKCHIP_RK3399PRO           RK3399PRO       -            -             -"
+	"CONFIG_ROCKCHIP_RK1806              RK1806          -            -             -"
+	"CONFIG_TARGET_GVA_RK3229            RK322X          RK322XAT     -             -"
+	"CONFIG_COPROCESSOR_RK1808           RKNPU-LION      RKNPULION    RKNPULION     -"
+)
+
+# <*> Fixup rsa/sha pack mode for platforms
+#     RSA: RK3308/PX30/RK3326/RK1808 use RSA-PKCS1 V2.1, it's pack magic is "3", and others use default configure.
+#     SHA: RK3368 use rk big endian SHA256, it's pack magic is "2", and others use default configure.
+# <*> Fixup images size pack for platforms
+# <*> Fixup verbose message about AARCH32
 #
-# Format:           target board               label         loader      trust
-RKCHIP_INI_DESC=("CONFIG_TARGET_GVA_RK3229       NA          RK322XAT     NA"
-                 "CONFIG_COPROCESSOR_RK1808  RKNPU-LION      RKNPULION    RKNPULION"
-# to be add...
-                )
+# @RSA:     rsa mode
+# @SHA:     sha mode
+# @A64-KB:  arm64 platform image size: [uboot,trust]
+# @A64-NUM: arm64 platform image number of total: [uboot,trust]
+# @A32-KB:  arm32 platform image size: [uboot,trust]
+# @A32-NUM: arm32 platform image number of total: [uboot,trust]
+# @LOADER:  map to $RKCHIP_LOADER for loader ini
+# @TRUST:   map to $RKCHIP_TRUST for trust ini
+# @-:       default state/value
+CHIP_CFG_FIXUP_TABLE=(
+	# CONFIG_XXX              RSA     SHA     A64-KB      A64-NUM     A32-KB       A32-NUM      LOAER        TRUST
+	"CONFIG_ROCKCHIP_RK3368    -       2       -,-          -,-        -,-          -,-           -           -"
+	"CONFIG_ROCKCHIP_RK3036    -       -       512,512      1,1        -,-          -,-           -           -"
+	"CONFIG_ROCKCHIP_PX30      3       -       -,-          -,-        -,-          -,-           -           -"
+	"CONFIG_ROCKCHIP_RK3326    3       -       -,-          -,-        -,-          -,-           AARCH32     -"
+	"CONFIG_ROCKCHIP_RK3308    3       -       1024,1024    2,2        512,512      2,2           -           AARCH32"
+	"CONFIG_ROCKCHIP_RK1808    3       -       1024,1024    2,2        -,-          -,-           -           -"
+)
 
 ########################################### User can modify #############################################
 # User's rkbin tool relative path
@@ -45,10 +76,10 @@ BIN_PATH_FIXUP="--replace tools/rk_tools/ ./"
 RKTOOLS=./tools
 
 # Declare global INI file searching index name for every chip, update in select_chip_info()
-RKCHIP=
-RKCHIP_LABEL=
-RKCHIP_LOADER=
-RKCHIP_TRUST=
+RKCHIP="-"
+RKCHIP_LABEL="-"
+RKCHIP_LOADER="-"
+RKCHIP_TRUST="-"
 
 # Declare rkbin repository path, updated in prepare()
 RKBIN=
@@ -322,116 +353,94 @@ sub_commands()
 # We read chip info from .config and 'RKCHIP_INI_DESC'
 select_chip_info()
 {
-	local target_board item value
-
 	# Read RKCHIP firstly from .config
 	# The regular expression that matching:
 	#  - PX30, PX3SE
 	#  - RK????, RK????X
 	#  - RV????
-	local chip_reg='^CONFIG_ROCKCHIP_[R,P][X,V,K][0-9ESX]{1,5}'
-	count=`egrep -c ${chip_reg} .config`
-	# Obtain the matching only
-	RKCHIP=`egrep -o ${chip_reg} .config`
-
-	if [ $count -eq 1 ]; then
-		RKCHIP=${RKCHIP##*_}
-		grep '^CONFIG_ROCKCHIP_RK3368=y' .config >/dev/null \
-			&& RKCHIP=RK3368H
-		grep '^CONFIG_ROCKCHIP_RV1108=y' .config >/dev/null \
-			&& RKCHIP=RV110X
-	elif [ $count -gt 1 ]; then
-		# Grep the RK CHIP variant
-		grep '^CONFIG_ROCKCHIP_PX3SE=y' .config > /dev/null \
-			&& RKCHIP=PX3SE
-		grep '^CONFIG_ROCKCHIP_RK3126=y' .config >/dev/null \
-			&& RKCHIP=RK3126
-		grep '^CONFIG_ROCKCHIP_RK3326=y' .config >/dev/null \
-			&& RKCHIP=RK3326
-		grep '^CONFIG_ROCKCHIP_RK3128X=y' .config >/dev/null \
-			&& RKCHIP=RK3128X
-		grep '^CONFIG_ROCKCHIP_PX5=y' .config >/dev/null \
-			&& RKCHIP=PX5
-		grep '^CONFIG_ROCKCHIP_RK3399PRO=y' .config >/dev/null \
-			&& RKCHIP=RK3399PRO
-		grep '^CONFIG_ROCKCHIP_RK1806=y' .config >/dev/null \
-			&& RKCHIP=RK1806
-	else
-		echo "Can't get Rockchip SoC definition in .config"
-		exit 1
-	fi
+	CHIP_PATTERN='^CONFIG_ROCKCHIP_[R,P][X,V,K][0-9ESX]{1,5}'
+	RKCHIP=`egrep -o ${CHIP_PATTERN} .config`
 
-	# Default use RKCHIP
-	RKCHIP_LABEL=${RKCHIP}
-	RKCHIP_LOADER=${RKCHIP}
-	RKCHIP_TRUST=${RKCHIP}
+	# default
+	RKCHIP=${RKCHIP##*_}
 
-	# Read from RKCHIP_INI_DESC
-	for item in "${RKCHIP_INI_DESC[@]}"
+	# need fixup ?
+	for ITEM in "${CHIP_TYPE_FIXUP_TABLE[@]}"
 	do
-		target_board=`echo $item | awk '{ print $1 }'`
-		if grep  -q "^${target_board}=y" .config ; then
-			value=`echo $item | awk '{ print $2 }'`
-			if [ "$value" != "NA" ]; then
-				RKCHIP_LABEL=${value};
-			fi
-			value=`echo $item | awk '{ print $3 }'`
-			if [ "$value" != "NA" ]; then
-				RKCHIP_LOADER=${value};
-			fi
-			value=`echo $item | awk '{ print $4 }'`
-			if [ "$value" != "NA" ]; then
-				RKCHIP_TRUST=${value};
-			fi
+		CONFIG_XXX=`echo $ITEM | awk '{ print $1 }'`
+		if grep  -q "^${CONFIG_XXX}=y" .config ; then
+			RKCHIP=`echo $ITEM | awk '{ print $2 }'`
+			RKCHIP_LOADER=`echo $ITEM | awk '{ print $3 }'`
+			RKCHIP_TRUST=`echo  $ITEM | awk '{ print $4 }'`
+			RKCHIP_LABEL=`echo  $ITEM | awk '{ print $5 }'`
 		fi
 	done
+
+	if [ "$RKCHIP_LOADER" = "-" ]; then
+		RKCHIP_LOADER=${RKCHIP}
+	fi
+	if [ "$RKCHIP_TRUST" = "-" ]; then
+		RKCHIP_TRUST=${RKCHIP}
+	fi
+	if [ "$RKCHIP_LABEL" = "-" ]; then
+		RKCHIP_LABEL=${RKCHIP}
+	fi
+
+	# echo "## $FUNCNAME: $RKCHIP, $RKCHIP_LOADER, $RKCHIP_TRUST, $RKCHIP_LABEL,"
 }
 
-# Fixup platform special configure
-#	1. fixup pack mode;
-#	2. fixup image size
-#	3. fixup ARM64 cpu boot with AArch32
-fixup_platform_configure()
+function fixup_platform_configure()
 {
-	local count plat
-
-# <*> Fixup rsa/sha pack mode for platforms
-	# RK3308/PX30/RK3326/RK1808 use RSA-PKCS1 V2.1, it's pack magic is "3"
-	if [ $RKCHIP = "PX30" -o $RKCHIP = "RK3326" -o $RKCHIP = "RK3308" -o $RKCHIP = "RK1808" ]; then
-		PLATFORM_RSA="--rsa 3"
-	# RK3368 use rk big endian SHA256, it's pack magic is "2"
-	elif [ $RKCHIP = "RK3368" -o $RKCHIP = "RK3368H" ]; then
-		PLATFORM_SHA="--sha 2"
-	# other platforms use default configure
-	fi
+	CFG_U_KB="-" CFG_U_NUM="-" CFG_T_KB="-" CFG_T_NUM="-"  CFG_SHA="-" CFG_RSA="-"
 
-# <*> Fixup images size pack for platforms
-	if [ $RKCHIP = "RK3308" ]; then
-		if grep -q '^CONFIG_ARM64_BOOT_AARCH32=y' .config ; then
-			PLATFORM_UBOOT_IMG_SIZE="--size 512 2"
-			PLATFORM_TRUST_IMG_SIZE="--size 512 2"
-		else
-			PLATFORM_UBOOT_IMG_SIZE="--size 1024 2"
-			PLATFORM_TRUST_IMG_SIZE="--size 1024 2"
+	for ITEM in "${CHIP_CFG_FIXUP_TABLE[@]}"
+	do
+		CONFIG_XXX=`echo $ITEM | awk '{ print $1 }'`
+		if grep  -q "^${CONFIG_XXX}=y" .config ; then
+			# <*> Fixup rsa/sha pack mode for platforms
+			CFG_RSA=`echo $ITEM | awk '{ print $2 }'`
+			CFG_SHA=`echo $ITEM | awk '{ print $3 }'`
+
+			# <*> Fixup images size pack for platforms, and ini file
+			if grep -q '^CONFIG_ARM64_BOOT_AARCH32=y' .config ; then
+				CFG_U_KB=`echo  $ITEM | awk '{ print $6 }' | awk -F "," '{ print $1 }'`
+				CFG_U_NUM=`echo $ITEM | awk '{ print $7 }' | awk -F "," '{ print $1 }'`
+				CFG_T_KB=`echo  $ITEM | awk '{ print $6 }' | awk -F "," '{ print $2 }'`
+				CFG_T_NUM=`echo $ITEM | awk '{ print $7 }' | awk -F "," '{ print $2 }'`
+
+				PAD_LOADER=`echo $ITEM | awk '{ print $8 }'`
+				PAD_TRUST=`echo  $ITEM | awk '{ print $9 }'`
+				if [ "$PAD_LOADER" != "-" ]; then
+					RKCHIP_LOADER=${RKCHIP_LOADER}${PAD_LOADER}
+				fi
+				if [ "$PAD_TRUST" != "-" ]; then
+					RKCHIP_TRUST=${RKCHIP_TRUST}${PAD_TRUST}
+				fi
+				RKCHIP_LABEL=${RKCHIP_LABEL}"AARCH32"
+			else
+				CFG_U_KB=`echo  $ITEM | awk '{ print $4 }' | awk -F "," '{ print $1 }'`
+				CFG_U_NUM=`echo $ITEM | awk '{ print $5 }' | awk -F "," '{ print $1 }'`
+				CFG_T_KB=`echo  $ITEM | awk '{ print $4 }' | awk -F "," '{ print $2 }'`
+				CFG_T_NUM=`echo $ITEM | awk '{ print $5 }' | awk -F "," '{ print $2 }'`
+			fi
 		fi
-	elif [ $RKCHIP = "RK1808" ]; then
-		PLATFORM_UBOOT_IMG_SIZE="--size 1024 2"
-		PLATFORM_TRUST_IMG_SIZE="--size 1024 2"
-	elif [ $RKCHIP = "RK3036" ]; then
-		PLATFORM_UBOOT_IMG_SIZE="--size 512 1"
-		PLATFORM_TRUST_IMG_SIZE="--size 512 1"
-	fi
+	done
 
-# <*> Fixup AARCH32 for ARM64 cpu platforms
-	if grep -q '^CONFIG_ARM64_BOOT_AARCH32=y' .config ; then
-		if [ $RKCHIP = "RK3308" ]; then
-			RKCHIP_LABEL=${RKCHIP_LABEL}"AARCH32"
-			RKCHIP_TRUST=${RKCHIP_TRUST}"AARCH32"
-		elif [ $RKCHIP = "RK3326" ]; then
-			RKCHIP_LABEL=${RKCHIP_LABEL}"AARCH32"
-			RKCHIP_LOADER=${RKCHIP_LOADER}"AARCH32"
-		fi
+	if [ "$CFG_SHA" != "-" ]; then
+		PLATFORM_SHA="--sha $CFG_SHA"
+	fi
+	if [ "$CFG_RSA" != "-" ]; then
+		PLATFORM_RSA="--rsa $CFG_RSA"
 	fi
+	if [ "$CFG_U_KB" != "-" ]; then
+		PLATFORM_UBOOT_IMG_SIZE="--size $CFG_U_KB $CFG_U_NUM"
+	fi
+	if [ "$CFG_T_KB" != "-" ]; then
+		PLATFORM_TRUST_IMG_SIZE="--size $CFG_T_KB $CFG_T_NUM"
+	fi
+
+	# echo "## $FUNCNAME: $PLATFORM_RSA, $PLATFORM_SHA, $PLATFORM_TRUST_IMG_SIZE, $PLATFORM_UBOOT_IMG_SIZE"
+	# echo "## $FUNCNAME: $RKCHIP_LOADER, $RKCHIP_TRUST, $RKCHIP_LABEL"
 }
 
 pack_uboot_image()

commit 02a05e9b64c44cc22fbfaef19ff889090ba0bec1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 7 10:59:40 2020 +0800

    rockchip: make_fit_optee.sh: support TEE_OFFSET arg from outside
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Id25bbf2031ec0a2ee5c8692ad15359ef39131baf

diff --git a/arch/arm/mach-rockchip/make_fit_optee.sh b/arch/arm/mach-rockchip/make_fit_optee.sh
index 9eb45e7e44..85b1b4f316 100755
--- a/arch/arm/mach-rockchip/make_fit_optee.sh
+++ b/arch/arm/mach-rockchip/make_fit_optee.sh
@@ -41,7 +41,11 @@ cat << EOF
 			compression = "none";
 EOF
 
-TEE_OFFSET=0x8400000
+if [ -z "$1" -o ! -z "$(echo $1 | sed 's/[x, X, 0-9, a-f, A-F]//g')" ]; then
+	TEE_OFFSET=0x8400000
+else
+	TEE_OFFSET=$1
+fi
 TEE_LOAD_ADDR=$((DARM_BASE+TEE_OFFSET))
 TEE_LOAD_ADDR=$(echo "obase=16;${TEE_LOAD_ADDR}"|bc)
 echo "			load = <0x"$TEE_LOAD_ADDR">;"

commit cbfcd6136d3a5d111a5f6351890e459c9729cd3f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Apr 4 20:14:04 2020 +0800

    Revert "configs: rv1126: support bring up uncompressed kernel"
    
    This reverts commit f0e72638461ff139e795228388be6b07ed3dae89.
    
    It's waste a lot of boot time.
    
    Change-Id: Ib4fa67d5792de7e64d3830b928f956a82f13379a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index ee853bd3d8..3b3aba8e17 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -18,7 +18,6 @@ CONFIG_BOOTDELAY=0
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
-# CONFIG_SKIP_RELOCATE_UBOOT is not set
 CONFIG_SPL_BOARD_INIT=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set

commit 80a43a36b06cf0fc494061b4146b5f4408c639c0
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 7 18:17:02 2020 +0800

    rockchip: rv1126: select SUPPORT_TPL
    
    Workaround: skip ram initial in arch/arm/mach-rockchip/spl.c
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I567f52bd0ddbfdd9d79278a39fc2076be57b3d66

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 9f82628c21..d8356abe16 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -427,6 +427,7 @@ config ROCKCHIP_RV1126
 	select ARM_SMCCC
 	select BOARD_LATE_INIT
 	select SUPPORT_SPL
+	select SUPPORT_TPL
 	select SPL
 	help
 	  The Rockchip RV1126 is a ARM-based SoC with a quad-core Cortex-A7

commit 5b7cca2ee02aebe1a1339c5ceda9771c2811e960
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 7 17:48:09 2020 +0800

    make.sh: fix typo
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I812c619874daac186704f8f77d8b113ab272339e

diff --git a/make.sh b/make.sh
index 60f8d8c979..31ab076a9c 100755
--- a/make.sh
+++ b/make.sh
@@ -578,7 +578,7 @@ pack_loader_image()
 	if [ $numline -eq 1 ]; then
 		image=`sed -n "/PATH=/p" $ini | tr -d '\r' | cut -d '=' -f 2`
 		cp ${RKBIN}/${image} ./
-		echo "pack trust okay! Input: ${ini}"
+		echo "pack loader okay! Input: ${ini}"
 		return;
 	fi
 

commit 568848617e55ed51909a15ddf301d81f93241a3a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Mar 13 09:32:01 2020 +0800

    common: spl: set default address for entry_point_os
    
    Could be override in boot_from_devices().
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ifbfac5903ec61e65739732949f9e6b8a2704155d
    (cherry picked from commit f8ca32e1ca9a3df6a1e6fb6997721307c33f354e)

diff --git a/common/spl/spl.c b/common/spl/spl.c
index 5816b46984..b3873def79 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -526,6 +526,11 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 	spl_image.entry_point_bl33 = CONFIG_SYS_TEXT_BASE;
 #endif
 
+#if CONFIG_IS_ENABLED(OPTEE)
+	/* default address */
+	spl_image.entry_point_os = CONFIG_SYS_TEXT_BASE;
+#endif
+
 #ifdef CONFIG_SYS_SPL_ARGS_ADDR
 	spl_image.arg = (void *)CONFIG_SYS_SPL_ARGS_ADDR;
 #endif

commit 605bf846bd1ad5b4656f5c21f8bdd5473dd9d181
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Mar 11 19:24:34 2020 +0800

    common: spl: jump next process depend on entry_point_os
    
    The spl can bring up uboot & kernel, and their entry points are diffirent,
    so pass their entry points by entry_point_os.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I625d135d219cfbfb620ff1e3d0de5278143f4079
    (cherry picked from commit 78628ac9a95ec2bb6bffa049323beb6af3eb3f37)

diff --git a/common/spl/spl.c b/common/spl/spl.c
index 0601dffb72..5816b46984 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -556,7 +556,8 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 #if CONFIG_IS_ENABLED(OPTEE)
 	case IH_OS_OP_TEE:
 		debug("Jumping to U-Boot via OP-TEE\n");
-		spl_optee_entry(NULL, NULL, (void *)spl_image.fdt_addr,
+		spl_optee_entry(NULL, (void *)spl_image.entry_point_os,
+				(void *)spl_image.fdt_addr,
 				(void *)spl_image.entry_point);
 		break;
 #endif
diff --git a/common/spl/spl_optee.S b/common/spl/spl_optee.S
index 64b24956ee..ddeb2ca892 100644
--- a/common/spl/spl_optee.S
+++ b/common/spl/spl_optee.S
@@ -8,7 +8,6 @@
 #include <asm/assembler.h>
 
 ENTRY(spl_optee_entry)
-	ldr lr, =CONFIG_SYS_TEXT_BASE
-	ldr r1, =CONFIG_SYS_TEXT_BASE
+	mov lr, r1
 	mov pc, r3
 ENDPROC(spl_optee_entry)

commit 1cb393f1c829a024c9d1b1e528e5f31c21ae1604
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Mar 9 10:58:41 2020 +0800

    common: spl: rkfw: support bing-up arm32 firmware
    
    1. the arm32 trust firmware is diffirent with arm64, support it.
    2. add entry_point_os to indicate the uboot or kernel entry point.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I24d1601323e99f40e81d18f1937f762b2ecc137f
    (cherry picked from commit a64fd729d49f96f99e0291b10a16307d306ebb09)
    
    Change-Id: I3b1420989d158c52259365d90011524b047b5750

diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c
index b31cb9c71a..8933f8ee48 100644
--- a/common/spl/spl_mmc.c
+++ b/common/spl/spl_mmc.c
@@ -65,7 +65,6 @@ int mmc_load_image_raw_sector(struct spl_image_info *spl_image,
 #ifdef CONFIG_SPL_LOAD_RKFW
 	u32 trust_sectors = CONFIG_RKFW_TRUST_SECTOR;
 	u32 uboot_sectors = CONFIG_RKFW_U_BOOT_SECTOR;
-	u32 boot_sectors = CONFIG_RKFW_BOOT_SECTOR;
 	struct spl_load_info load;
 
 	load.dev = mmc;
@@ -85,8 +84,7 @@ int mmc_load_image_raw_sector(struct spl_image_info *spl_image,
 #endif
 	ret = spl_load_rkfw_image(spl_image, &load,
 				  trust_sectors,
-				  uboot_sectors,
-				  boot_sectors);
+				  uboot_sectors);
 	/* If boot successfully or can't try others, just go end */
 	if (!ret || ret != -EAGAIN)
 		goto end;
diff --git a/common/spl/spl_rkfw.c b/common/spl/spl_rkfw.c
index 102e5a1b56..f59d6b1c4c 100644
--- a/common/spl/spl_rkfw.c
+++ b/common/spl/spl_rkfw.c
@@ -7,11 +7,11 @@
 #include <android_image.h>
 #include <errno.h>
 #include <malloc.h>
-#include <spl.h>
 #include <spl_rkfw.h>
 #include <linux/kernel.h>
 #include <asm/arch/spl_resource_img.h>
 
+#ifdef CONFIG_SPL_ATF
 static const __aligned(16) struct s_fip_name_id fip_name_id[] = {
 	{ BL30_IMAGE_NAME, UUID_SCP_FIRMWARE_BL30 },		/* optional */
 	{ BL31_IMAGE_NAME, UUID_EL3_RUNTIME_FIRMWARE_BL31 },	/* mandatory */
@@ -164,7 +164,7 @@ static int load_image(struct spl_load_info *info,
 }
 
 static int rkfw_load_trust(struct spl_load_info *info, u32 image_sector,
-			   uintptr_t *bl31_entry, uintptr_t *bl32_entry,
+			   struct spl_image_info *spl_image,
 			   int *found_rkfw, u32 try_count)
 {
 	struct tag_tboot_header_2k hdr;
@@ -184,16 +184,16 @@ static int rkfw_load_trust(struct spl_load_info *info, u32 image_sector,
 
 			/* bl31 is mandatory */
 			ret = load_image(info, &hdr, sect_addr,
-					 BL31_IMAGE_NAME, bl31_entry);
+					 BL31_IMAGE_NAME, &spl_image->entry_point);
 			if (ret)
 				continue;
 
 			/* bl32 is optional */
 			ret = load_image(info, &hdr, sect_addr,
-					 BL32_IMAGE_NAME, bl32_entry);
+					 BL32_IMAGE_NAME, &spl_image->entry_point_bl32);
 			if (ret) {
 				if (ret == -ENONET) {
-					*bl32_entry = -1;	/* Not exist */
+					spl_image->entry_point_bl32 = -1;	/* Not exist */
 					ret = 0;
 				} else {
 					continue;
@@ -205,9 +205,52 @@ static int rkfw_load_trust(struct spl_load_info *info, u32 image_sector,
 
 	return ret;
 }
+#else
+static int rkfw_load_trust(struct spl_load_info *info, u32 image_sector,
+			   struct spl_image_info *spl_image,
+			   int *found_rkfw, u32 try_count)
+{
+	struct tag_second_loader_hdr hdr;
+	int i, ret, blkcnt = 4;	/* header sectors, 2KB */
+	char *load_addr;
+	u32 sect_addr;
+
+	/* Detect valid image header */
+	for (i = 0; i < try_count; i++) {
+		sect_addr = image_sector + (i * RKFW_RETRY_SECTOR_SIZE);
+		ret = info->read(info, sect_addr, blkcnt, &hdr);
+		if (ret != blkcnt)
+			continue;
+
+		if (!memcmp(hdr.magic, TBOOT_HEAD_TAG, 6)) {
+			*found_rkfw = 1;
+			spl_image->entry_point = (uintptr_t)hdr.loader_load_addr;
+			/* Load full binary image(right behind header) */
+			sect_addr += blkcnt;
+			load_addr = (char *)((size_t)hdr.loader_load_addr);
+			blkcnt = DIV_ROUND_UP(hdr.loader_load_size, 512);
+
+			printf("tee.bin: addr=0x%lx, size=0x%lx\n",
+			       (ulong)load_addr, (ulong)blkcnt * 512);
+			ret = info->read(info, sect_addr, blkcnt, load_addr);
+			if (ret != blkcnt)
+				continue;
+
+			break;
+		}
+	}
+
+	if (i == try_count) {
+		printf("Can not find usable uboot\n");
+		return -ENONET;
+	}
+
+	return 0;
+}
+#endif
 
 static int rkfw_load_uboot(struct spl_load_info *info, u32 image_sector,
-			   uintptr_t *bl33_entry, u32 try_count)
+			   struct spl_image_info *spl_image, u32 try_count)
 {
 	struct tag_second_loader_hdr hdr;
 	int i, ret, blkcnt = 4;	/* header sectors, 2KB */
@@ -243,13 +286,17 @@ static int rkfw_load_uboot(struct spl_load_info *info, u32 image_sector,
 	}
 
 	/* Fill entry point */
-	*bl33_entry = (uintptr_t)hdr.loader_load_addr;
-
+#ifdef CONFIG_SPL_ATF
+	spl_image->entry_point_bl33 = (uintptr_t)hdr.loader_load_addr;
+#endif
+#ifdef CONFIG_SPL_OPTEE
+	spl_image->entry_point_os = (uintptr_t)hdr.loader_load_addr;
+#endif
 	return 0;
 }
 
 static int rkfw_load_kernel(struct spl_load_info *info, u32 image_sector,
-			    uintptr_t *bl33_entry, u32 try_count)
+			    struct spl_image_info *spl_image, u32 try_count)
 {
 	struct andr_img_hdr *hdr;
 	int ret, cnt;
@@ -311,7 +358,7 @@ static int rkfw_load_kernel(struct spl_load_info *info, u32 image_sector,
 			ret = -EIO;
 			goto out;
 		}
-
+#ifdef CONFIG_SPL_KERNEL_BOOT
 		if (spl_resource_image_check_header(head)) {
 			printf("Can't find kernel dtb in spl.");
 		} else {
@@ -328,6 +375,7 @@ static int rkfw_load_kernel(struct spl_load_info *info, u32 image_sector,
 			memcpy((char *)CONFIG_SPL_FDT_ADDR, dtb_temp,
 			       entry->f_size);
 		}
+#endif
 	} else {
 		/* Load dtb image */
 		ret = info->read(info, (dtb_sector >> 9) + image_sector,
@@ -339,7 +387,13 @@ static int rkfw_load_kernel(struct spl_load_info *info, u32 image_sector,
 		}
 	}
 
-	*bl33_entry = CONFIG_SPL_KERNEL_ADDR;
+	spl_image->fdt_addr = (void *)CONFIG_SPL_FDT_ADDR;
+#ifdef CONFIG_SPL_OPTEE
+	spl_image->entry_point_os = (uintptr_t)CONFIG_SPL_KERNEL_ADDR;
+#endif
+#ifdef CONFIG_SPL_ATF
+	spl_image->entry_point_bl33 = CONFIG_SPL_KERNEL_ADDR;
+#endif
 	ret = 0;
 out:
 	free(hdr);
@@ -349,47 +403,41 @@ out:
 
 int spl_load_rkfw_image(struct spl_image_info *spl_image,
 			struct spl_load_info *info,
-			u32 trust_sector, u32 uboot_sector,
-			u32 boot_sector)
+			u32 trust_sector, u32 uboot_sector)
 {
 	int ret, try_count = RKFW_RETRY_SECTOR_TIMES;
 	int found_rkfw = 0;
 
-	ret = rkfw_load_trust(info, trust_sector,
-			      &spl_image->entry_point,
-			      &spl_image->entry_point_bl32,
+	ret = rkfw_load_trust(info, trust_sector, spl_image,
 			      &found_rkfw, try_count);
 	if (ret) {
 		printf("Load trust image failed! ret=%d\n", ret);
 		goto out;
 	}
-#ifdef CONFIG_SPL_KERNEL_BOOT
-	if (spl_image->next_stage == SPL_NEXT_STAGE_UBOOT) {
-#endif
-		ret = rkfw_load_uboot(info, uboot_sector,
-				      &spl_image->entry_point_bl33, try_count);
-		if (ret)
-			printf("Load uboot image failed! ret=%d\n", ret);
-		else
-			goto boot;
-#ifdef CONFIG_SPL_KERNEL_BOOT
-	} else if (spl_image->next_stage == SPL_NEXT_STAGE_KERNEL) {
-#endif
-		ret = rkfw_load_kernel(info, boot_sector,
-				       &spl_image->entry_point_bl33, try_count);
-		if (ret) {
-			printf("Load kernel image failed! ret=%d\n", ret);
-			goto out;
-		}
-#ifdef CONFIG_SPL_KERNEL_BOOT
+
+	ret = rkfw_load_uboot(info, uboot_sector,
+			      spl_image, try_count);
+	if (ret)
+		printf("Load uboot image failed! ret=%d\n", ret);
+	else
+		goto boot;
+
+	ret = rkfw_load_kernel(info, uboot_sector,
+			       spl_image, try_count);
+	if (ret) {
+		printf("Load kernel image failed! ret=%d\n", ret);
+		goto out;
 	}
-#endif
 
 boot:
 #if CONFIG_IS_ENABLED(LOAD_FIT)
 	spl_image->fdt_addr = 0;
 #endif
+#ifdef CONFIG_SPL_ATF
 	spl_image->os = IH_OS_ARM_TRUSTED_FIRMWARE;
+#else
+	spl_image->os = IH_OS_OP_TEE;
+#endif
 
 out:
 	/* If not found rockchip firmware, try others outside */
diff --git a/include/spl.h b/include/spl.h
index 3b1ca0cf28..07363477cd 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -33,9 +33,10 @@ struct spl_image_info {
 	uintptr_t entry_point_bl32;
 	uintptr_t entry_point_bl33;
 #endif
-#if CONFIG_IS_ENABLED(LOAD_FIT)
-	void *fdt_addr;
+#if CONFIG_IS_ENABLED(OPTEE)
+	uintptr_t entry_point_os;	/* point to uboot or kernel */
 #endif
+	void *fdt_addr;
 	u32 boot_device;
 	u32 next_stage;
 	u32 size;
diff --git a/include/spl_rkfw.h b/include/spl_rkfw.h
index c44b153e81..305608279d 100644
--- a/include/spl_rkfw.h
+++ b/include/spl_rkfw.h
@@ -9,7 +9,11 @@
 #include <spl.h>
 
 #define LOADER_HARD_STR			"LOADER"
+#ifdef CONFIG_SPL_ATF
 #define TBOOT_HEAD_TAG			0x58334c42 /* 'B', 'L', '3', 'X' */
+#else
+#define TBOOT_HEAD_TAG			"TOS   "
+#endif
 
 #define BL30_IMAGE_NAME			"bl30.bin" /* SCP Firmware BL3-0 */
 #define BL31_IMAGE_NAME			"bl31.bin" /* EL3 Runtime Firmware BL31 */
@@ -99,6 +103,5 @@ typedef struct tag_second_loader_hdr {
  */
 int spl_load_rkfw_image(struct spl_image_info *spl_image,
 			struct spl_load_info *info,
-			u32 trust_sector, u32 uboot_sector,
-			u32 boot_sector);
+			u32 trust_sector, u32 uboot_sector);
 #endif

commit 42375b1080950287f9d3833d47997de2b4b0bb5b
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Tue Apr 7 16:01:01 2020 +0800

    pinctrl: rockchip: fix RK_GENMASK_VAL error
    
    Change-Id: I5c6cb3ace53a86e9d8bfed0966950af3a47cd732
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 95443460fe..debd3e7562 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -33,8 +33,8 @@ enum rockchip_pinctrl_type {
 	RK3399,
 };
 
-#define RK_GENMASK_VAL(h, l, v) \
-	(GENMASK((h) + 16, (l) + 16) | ((v) & GENMASK(h, l)) << (h))
+#define RK_GENMASK_VAL(l, h, v) \
+	(GENMASK((h) + 16, (l) + 16) | (((v) << (l) & GENMASK(h, l))))
 
 /**
  * Encode variants of iomux registers into a type variable

commit 5d2498f1da671c9a7eeb962c299f32379d255439
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Wed Apr 1 16:10:42 2020 +0800

    pinctrl: rockchip: support mux route flags
    
    Create a new flag to indicate mux route is from topgrf or pmugrf.
     * INVALID: means do not need to set mux route
     * DEFAULT: means same regmap as pin iomux
     * TOPGRF: means mux route setting in topgrf
     * PMUGRF: means mux route setting in pmugrf
    
    Change-Id: I1620054f1af915b9495e16b2d10a3f9cf9fd5980
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 5f17159808..89c8483473 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -79,6 +79,20 @@ enum rockchip_pin_pull_type {
 	PULL_TYPE_MAX
 };
 
+/**
+ * enum mux route register type, should be invalid/default/topgrf/pmugrf.
+ * INVALID: means do not need to set mux route
+ * DEFAULT: means same regmap as pin iomux
+ * TOPGRF: means mux route setting in topgrf
+ * PMUGRF: means mux route setting in pmugrf
+ */
+enum rockchip_pin_route_type {
+	ROUTE_TYPE_DEFAULT = 0,
+	ROUTE_TYPE_TOPGRF = 1,
+	ROUTE_TYPE_PMUGRF = 2,
+
+	ROUTE_TYPE_INVALID = -1,
+};
 /**
  * @drv_type: drive strength variant using rockchip_perpin_drv_type
  * @offset: if initialized to -1 it will be autocalculated, by specifying
@@ -263,6 +277,25 @@ struct rockchip_pin_bank {
 		.pull_type[3] = pull3,					\
 	}
 
+#define PIN_BANK_MUX_ROUTE_FLAGS(ID, PIN, FUNC, REG, VAL, FLAG)		\
+	{								\
+		.bank_num	= ID,					\
+		.pin		= PIN,					\
+		.func		= FUNC,					\
+		.route_offset	= REG,					\
+		.route_val	= VAL,					\
+		.route_type	= FLAG,					\
+	}
+
+#define MR_DEFAULT(ID, PIN, FUNC, REG, VAL)	\
+	PIN_BANK_MUX_ROUTE_FLAGS(ID, PIN, FUNC, REG, VAL, ROUTE_TYPE_DEFAULT)
+
+#define MR_TOPGRF(ID, PIN, FUNC, REG, VAL)	\
+	PIN_BANK_MUX_ROUTE_FLAGS(ID, PIN, FUNC, REG, VAL, ROUTE_TYPE_TOPGRF)
+
+#define MR_PMUGRF(ID, PIN, FUNC, REG, VAL)	\
+	PIN_BANK_MUX_ROUTE_FLAGS(ID, PIN, FUNC, REG, VAL, ROUTE_TYPE_PMUGRF)
+
 /**
  * struct rockchip_mux_recalced_data: represent a pin iomux data.
  * @num: bank number.
@@ -284,6 +317,7 @@ struct rockchip_mux_recalced_data {
  * @bank_num: bank number.
  * @pin: index at register or used to calc index.
  * @func: the min pin.
+ * @route_type: mux route setting in grf or pmugrf.
  * @route_offset: the max pin.
  * @route_val: the register offset.
  */
@@ -291,6 +325,7 @@ struct rockchip_mux_route_data {
 	u8 bank_num;
 	u8 pin;
 	u8 func;
+	enum rockchip_pin_route_type route_type : 8;
 	u32 route_offset;
 	u32 route_val;
 };
@@ -1367,8 +1402,9 @@ static struct rockchip_mux_route_data rk3399_mux_route_data[] = {
 	},
 };
 
-static bool rockchip_get_mux_route(struct rockchip_pin_bank *bank, int pin,
-				   int mux, u32 *reg, u32 *value)
+static enum rockchip_pin_route_type
+rockchip_get_mux_route(struct rockchip_pin_bank *bank, int pin,
+		       int mux, u32 *reg, u32 *value)
 {
 	struct rockchip_pinctrl_priv *priv = bank->priv;
 	struct rockchip_pin_ctrl *ctrl = priv->ctrl;
@@ -1383,12 +1419,12 @@ static bool rockchip_get_mux_route(struct rockchip_pin_bank *bank, int pin,
 	}
 
 	if (i >= ctrl->niomux_routes)
-		return false;
+		return ROUTE_TYPE_INVALID;
 
 	*reg = data->route_offset;
 	*value = data->route_val;
 
-	return true;
+	return data->route_type;
 }
 
 static int rockchip_get_mux(struct rockchip_pin_bank *bank, int pin)
@@ -1493,7 +1529,7 @@ static int rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
 	struct regmap *regmap;
 	int reg, ret, mask, mux_type;
 	u8 bit;
-	u32 data, route_reg, route_val;
+	u32 data;
 
 	ret = rockchip_verify_mux(bank, pin, mux);
 	if (ret < 0)
@@ -1529,11 +1565,23 @@ static int rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
 		rockchip_get_recalced_mux(bank, pin, &reg, &bit, &mask);
 
 	if (bank->route_mask & BIT(pin)) {
-		if (rockchip_get_mux_route(bank, pin, mux, &route_reg,
-					   &route_val)) {
-			ret = regmap_write(regmap, route_reg, route_val);
-			if (ret)
-				return ret;
+		u32 route_reg = 0, route_val = 0;
+
+		ret = rockchip_get_mux_route(bank, pin, mux,
+					     &route_reg, &route_val);
+		switch (ret) {
+		case ROUTE_TYPE_DEFAULT:
+			regmap_write(regmap, route_reg, route_val);
+			break;
+		case ROUTE_TYPE_TOPGRF:
+			regmap_write(priv->regmap_base, route_reg, route_val);
+			break;
+		case ROUTE_TYPE_PMUGRF:
+			regmap_write(priv->regmap_pmu, route_reg, route_val);
+			break;
+		case ROUTE_TYPE_INVALID: /* Fall through */
+		default:
+			break;
 		}
 	}
 

commit 162cc77ecd29719696f87869241051c324cfbf3e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 7 11:03:29 2020 +0800

    make.sh: support pack uboot.fit
    
    uboot.fit = u-boot-nodtb.bin + u-boot.dtb + tee.bin
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I70ed43fa2ff37d3f9ac0dfef1321a9397901c73f

diff --git a/make.sh b/make.sh
index af87e80520..60f8d8c979 100755
--- a/make.sh
+++ b/make.sh
@@ -592,7 +592,7 @@ pack_loader_image()
 
 pack_32bit_trust_image()
 {
-	local ini=$1 TOS TOS_TA DARM_BASE TEE_LOAD_ADDR TEE_OUTPUT TEE_OFFSET
+	local ini=$1 TOS TOS_TA DARM_BASE TEE_LOAD_ADDR TEE_OUTPUT TEE_OFFSET FORMAT
 
 	if [ ! -f ${ini} ]; then
 		echo "pack trust failed! Can't find: ${ini}"
@@ -624,16 +624,26 @@ pack_32bit_trust_image()
 	TOS=$(echo ${TOS} | sed "s/tools\/rk_tools\//\.\//g")
 	TOS_TA=$(echo ${TOS_TA} | sed "s/tools\/rk_tools\//\.\//g")
 
-	if [ $TOS_TA ]; then
-		${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ${TEE_OUTPUT} ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
-	elif [ $TOS ]; then
-		${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS}    ${TEE_OUTPUT} ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
+	FORMAT=`sed -n "/FORMAT=/s/FORMAT=//p" ${ini} |tr -d '\r'`
+	if [ $FORMAT = "FIT" ]; then
+		./scripts/fit-vboot-uboot.sh --no-vboot --no-rebuild
+		ls uboot.img >/dev/null 2>&1 && rm uboot.img -rf
+		ls trust.img >/dev/null 2>&1 && rm trust.img -rf
+
+		echo "pack uboot.fit okay! Input: ${ini}"
 	else
-		echo "Can't find any tee bin"
-		exit 1
+		if [ $TOS_TA ]; then
+			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ${TEE_OUTPUT} ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
+		elif [ $TOS ]; then
+			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS}    ${TEE_OUTPUT} ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
+		else
+			echo "Can't find any tee bin"
+			exit 1
+		fi
+
+		echo "pack trust okay! Input: ${ini}"
 	fi
 
-	echo "pack trust okay! Input: ${ini}"
 	echo
 }
 

commit d13b75e130c303a0815b50d74fb859ac3972c520
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 7 11:02:22 2020 +0800

    make.sh: itb: call raw command to build 32-bit platform itb file
    
    We need pass TEE_OFFSET to its file.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I8e59ad98c6b54535686a158a6c31e408fc59e7b0

diff --git a/make.sh b/make.sh
index 586a7bc041..af87e80520 100755
--- a/make.sh
+++ b/make.sh
@@ -469,7 +469,7 @@ pack_uboot_image()
 
 pack_uboot_itb_image()
 {
-	local ini
+	local ini TEE_OFFSET
 
 	# ARM64
 	if grep -Eq ''^CONFIG_ARM64=y'|'^CONFIG_ARM64_BOOT_AARCH32=y'' .config ; then
@@ -503,7 +503,13 @@ pack_uboot_itb_image()
 			exit 1
 		fi
 
-		make CROSS_COMPILE=${TOOLCHAIN_GCC} u-boot.itb
+		TEE_OFFSET=`sed -n "/ADDR=/s/ADDR=//p" ${ini} |tr -d '\r'`
+		if [ "$TEE_OFFSET" = "" ]; then
+			TEE_OFFSET=0x8400000
+		fi
+
+		./arch/arm/mach-rockchip/make_fit_optee.sh $TEE_OFFSET > u-boot.its
+		./tools/mkimage -f u-boot.its -E u-boot.itb
 		echo "pack u-boot.itb okay! Input: ${ini}"
 	fi
 }

commit 78e35b2b4fe6c40974d07a4b22934e653fe0761d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Mar 28 18:15:56 2020 +0800

    rockchip: rv1126: update bootcmd according to fit signature
    
    only allow fit image if CONFIG_FIT_SIGNATURE is enabled.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I96b713a2a3eb0b148bda4215a99288b379d66efe

diff --git a/include/configs/rv1126_common.h b/include/configs/rv1126_common.h
index 45afbc7b4e..6b7470834f 100644
--- a/include/configs/rv1126_common.h
+++ b/include/configs/rv1126_common.h
@@ -58,6 +58,17 @@
 	RKIMG_DET_BOOTDEV		\
 	BOOTENV_SHARED_RKNAND		\
 	BOOTENV
+
+#undef RKIMG_BOOTCOMMAND
+#ifdef CONFIG_FIT_SIGNATURE
+#define RKIMG_BOOTCOMMAND		\
+	"boot_fit;"
+#else
+#define RKIMG_BOOTCOMMAND		\
+	"boot_uimage;"			\
+	"boot_fit;"			\
+	"boot_android ${devtype} ${devnum};"
+#endif
 #endif
 
 #define CONFIG_PREBOOT

commit 100444810cafd6601c8e233b8642428de58181c3
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Mar 17 17:59:13 2020 +0800

    configs: rk1808: delete CONFIG_RKFW_U_BOOT_SECTOR
    
    Use the default address in the Kconfig.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ic1579b8bf64ffc2bf94be5bb7e7041a1b36c6e89

diff --git a/configs/rk1808_defconfig b/configs/rk1808_defconfig
index fd55883bd7..cf84bdadf0 100644
--- a/configs/rk1808_defconfig
+++ b/configs/rk1808_defconfig
@@ -33,7 +33,6 @@ CONFIG_SPL_RELOC_TEXT_BASE=0x3001000
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_SPL_LOAD_RKFW=y
-CONFIG_RKFW_U_BOOT_SECTOR=0xa000
 CONFIG_SPL_KERNEL_BOOT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x00800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000

commit f37fcb5201a69ca4c37cd9b39a728d88e47957a7
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Mar 17 17:56:17 2020 +0800

    rockchip: dts: rk1808: add node to spl
    
    Add adc-keys & vcc_phy.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I868eafb889850edaa88e4423620c02167c1b9030

diff --git a/arch/arm/dts/rk1808-evb.dts b/arch/arm/dts/rk1808-evb.dts
index 933c678ff1..adeb5bc21a 100644
--- a/arch/arm/dts/rk1808-evb.dts
+++ b/arch/arm/dts/rk1808-evb.dts
@@ -18,14 +18,14 @@
 	adc-keys {
 		status = "okay";
 
-		u-boot,dm-pre-reloc;
+		u-boot,dm-spl;
 		compatible = "adc-keys";
 		io-channels = <&saradc 2>;
 		io-channel-names = "buttons";
 		keyup-threshold-microvolt = <1800000>;
 
 		vol-up-key {
-			u-boot,dm-pre-reloc;
+			u-boot,dm-spl;
 			linux,code = <KEY_VOLUMEUP>;
 			label = "volume up";
 			press-threshold-microvolt = <10000>;
@@ -33,6 +33,7 @@
 	};
 
 	vcc_phy: vcc-phy-regulator {
+		u-boot,dm-spl;
 		compatible = "regulator-fixed";
 		regulator-name = "vcc_phy";
 		regulator-always-on;

commit 3732e2b8b1b4e5b52d661e978586720652d34e84
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Mar 17 17:53:07 2020 +0800

    clk: rockchip: rk1808: enable saradc in spl
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Iaf91ec37624b3cd2dd7328ae8eb082236a40f83e

diff --git a/drivers/clk/rockchip/clk_rk1808.c b/drivers/clk/rockchip/clk_rk1808.c
index a0f2d95fc2..2e078985c5 100644
--- a/drivers/clk/rockchip/clk_rk1808.c
+++ b/drivers/clk/rockchip/clk_rk1808.c
@@ -291,6 +291,32 @@ static ulong rk1808_sfc_set_clk(struct rk1808_clk_priv *priv,
 	return rk1808_sfc_get_clk(priv, clk_id);
 }
 
+static ulong rk1808_saradc_get_clk(struct rk1808_clk_priv *priv)
+{
+	struct rk1808_cru *cru = priv->cru;
+	u32 div, con;
+
+	con = readl(&cru->clksel_con[63]);
+	div = con & CLK_SARADC_DIV_CON_MASK;
+
+	return DIV_TO_RATE(OSC_HZ, div);
+}
+
+static ulong rk1808_saradc_set_clk(struct rk1808_clk_priv *priv, uint hz)
+{
+	struct rk1808_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz);
+	assert(src_clk_div - 1 < 2047);
+
+	rk_clrsetreg(&cru->clksel_con[63],
+		     CLK_SARADC_DIV_CON_MASK,
+		     (src_clk_div - 1) << CLK_SARADC_DIV_CON_SHIFT);
+
+	return rk1808_saradc_get_clk(priv);
+}
+
 #ifndef CONFIG_SPL_BUILD
 static ulong rk1808_pwm_get_clk(struct rk1808_clk_priv *priv, ulong clk_id)
 {
@@ -354,32 +380,6 @@ static ulong rk1808_pwm_set_clk(struct rk1808_clk_priv *priv,
 	return rk1808_pwm_get_clk(priv, clk_id);
 }
 
-static ulong rk1808_saradc_get_clk(struct rk1808_clk_priv *priv)
-{
-	struct rk1808_cru *cru = priv->cru;
-	u32 div, con;
-
-	con = readl(&cru->clksel_con[63]);
-	div = con & CLK_SARADC_DIV_CON_MASK;
-
-	return DIV_TO_RATE(OSC_HZ, div);
-}
-
-static ulong rk1808_saradc_set_clk(struct rk1808_clk_priv *priv, uint hz)
-{
-	struct rk1808_cru *cru = priv->cru;
-	int src_clk_div;
-
-	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz);
-	assert(src_clk_div - 1 < 2047);
-
-	rk_clrsetreg(&cru->clksel_con[63],
-		     CLK_SARADC_DIV_CON_MASK,
-		     (src_clk_div - 1) << CLK_SARADC_DIV_CON_SHIFT);
-
-	return rk1808_saradc_get_clk(priv);
-}
-
 static ulong rk1808_tsadc_get_clk(struct rk1808_clk_priv *priv)
 {
 	struct rk1808_cru *cru = priv->cru;
@@ -935,6 +935,9 @@ static ulong rk1808_clk_get_rate(struct clk *clk)
 	case SCLK_SFC:
 		rate = rk1808_sfc_get_clk(priv, clk->id);
 		break;
+	case SCLK_SARADC:
+		rate = rk1808_saradc_get_clk(priv);
+		break;
 #ifndef CONFIG_SPL_BUILD
 	case SCLK_PMU_I2C0:
 	case SCLK_I2C1:
@@ -949,9 +952,6 @@ static ulong rk1808_clk_get_rate(struct clk *clk)
 	case SCLK_PWM2:
 		rate = rk1808_pwm_get_clk(priv, clk->id);
 		break;
-	case SCLK_SARADC:
-		rate = rk1808_saradc_get_clk(priv);
-		break;
 	case SCLK_TSADC:
 		rate = rk1808_tsadc_get_clk(priv);
 		break;
@@ -1039,6 +1039,9 @@ static ulong rk1808_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_SFC:
 		ret = rk1808_sfc_set_clk(priv, clk->id, rate);
 		break;
+	case SCLK_SARADC:
+		ret = rk1808_saradc_set_clk(priv, rate);
+		break;
 #ifndef CONFIG_SPL_BUILD
 	case SCLK_PMU_I2C0:
 	case SCLK_I2C1:
@@ -1053,9 +1056,6 @@ static ulong rk1808_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_PWM2:
 		ret = rk1808_pwm_set_clk(priv, clk->id, rate);
 		break;
-	case SCLK_SARADC:
-		ret = rk1808_saradc_set_clk(priv, rate);
-		break;
 	case SCLK_TSADC:
 		ret = rk1808_tsadc_set_clk(priv, rate);
 		break;

commit fcb65c6194c56a2556c4c1be0bb5b593b57492ac
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Mar 12 19:14:07 2020 +0800

    spl: rkfw: support bring up different next stage
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Idfca034d4d3eb5a4f757678e62efd7765bf89840

diff --git a/common/spl/spl_rkfw.c b/common/spl/spl_rkfw.c
index 2cdcf7794f..102e5a1b56 100644
--- a/common/spl/spl_rkfw.c
+++ b/common/spl/spl_rkfw.c
@@ -7,6 +7,7 @@
 #include <android_image.h>
 #include <errno.h>
 #include <malloc.h>
+#include <spl.h>
 #include <spl_rkfw.h>
 #include <linux/kernel.h>
 #include <asm/arch/spl_resource_img.h>
@@ -362,20 +363,27 @@ int spl_load_rkfw_image(struct spl_image_info *spl_image,
 		printf("Load trust image failed! ret=%d\n", ret);
 		goto out;
 	}
-
-	ret = rkfw_load_uboot(info, uboot_sector,
-			      &spl_image->entry_point_bl33, try_count);
-	if (ret)
-		printf("Load uboot image failed! ret=%d\n", ret);
-	else
-		goto boot;
-
-	ret = rkfw_load_kernel(info, boot_sector,
-			     &spl_image->entry_point_bl33, try_count);
-	if (ret) {
-		printf("Load kernel image failed! ret=%d\n", ret);
-		goto out;
+#ifdef CONFIG_SPL_KERNEL_BOOT
+	if (spl_image->next_stage == SPL_NEXT_STAGE_UBOOT) {
+#endif
+		ret = rkfw_load_uboot(info, uboot_sector,
+				      &spl_image->entry_point_bl33, try_count);
+		if (ret)
+			printf("Load uboot image failed! ret=%d\n", ret);
+		else
+			goto boot;
+#ifdef CONFIG_SPL_KERNEL_BOOT
+	} else if (spl_image->next_stage == SPL_NEXT_STAGE_KERNEL) {
+#endif
+		ret = rkfw_load_kernel(info, boot_sector,
+				       &spl_image->entry_point_bl33, try_count);
+		if (ret) {
+			printf("Load kernel image failed! ret=%d\n", ret);
+			goto out;
+		}
+#ifdef CONFIG_SPL_KERNEL_BOOT
 	}
+#endif
 
 boot:
 #if CONFIG_IS_ENABLED(LOAD_FIT)

commit 6f35c03e4a1ac18d94373aef01eeb0d086863b50
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Mar 12 18:05:16 2020 +0800

    driver: Makefile: support input in spl
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I492f19f6049d009b8f3671dbfbe79d2ee8cf984e

diff --git a/drivers/Makefile b/drivers/Makefile
index ca2ed476bb..1c976f2e2c 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -8,6 +8,7 @@ obj-$(CONFIG_$(SPL_TPL_)DM_CRYPTO) += crypto/
 obj-$(CONFIG_$(SPL_TPL_)DRIVERS_MISC_SUPPORT) += misc/ sysreset/ firmware/
 obj-$(CONFIG_$(SPL_TPL_)I2C_SUPPORT) += i2c/
 obj-$(CONFIG_$(SPL_TPL_)LED) += led/
+obj-$(CONFIG_$(SPL_TPL_)INPUT) += input/
 obj-$(CONFIG_$(SPL_TPL_)MMC_SUPPORT) += mmc/
 obj-$(CONFIG_$(SPL_TPL_)NAND_SUPPORT) += mtd/nand/raw/
 obj-$(CONFIG_$(SPL_TPL_)PHY) += phy/

commit 440eb126faa85bc1d786470f4500972f764d482e
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Mar 12 18:03:30 2020 +0800

    spl: rkfw: add boot_sector to seperate uboot and boot load-address
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I04e2b00a8615fee24ee7722ab7bb9ad4931f4332

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index ff7c9ae97f..f34ee7d190 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -822,6 +822,11 @@ config RKFW_U_BOOT_SECTOR
 	depends on SPL_LOAD_RKFW
 	default 0x4000
 
+config RKFW_BOOT_SECTOR
+        hex "rockchip boot image load sector"
+        depends on SPL_LOAD_RKFW
+        default 0xa000
+
 config SPL_KERNEL_ADDR
 	hex "Kernel load address in spl"
 	depends on SPL
diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c
index 8933f8ee48..b31cb9c71a 100644
--- a/common/spl/spl_mmc.c
+++ b/common/spl/spl_mmc.c
@@ -65,6 +65,7 @@ int mmc_load_image_raw_sector(struct spl_image_info *spl_image,
 #ifdef CONFIG_SPL_LOAD_RKFW
 	u32 trust_sectors = CONFIG_RKFW_TRUST_SECTOR;
 	u32 uboot_sectors = CONFIG_RKFW_U_BOOT_SECTOR;
+	u32 boot_sectors = CONFIG_RKFW_BOOT_SECTOR;
 	struct spl_load_info load;
 
 	load.dev = mmc;
@@ -84,7 +85,8 @@ int mmc_load_image_raw_sector(struct spl_image_info *spl_image,
 #endif
 	ret = spl_load_rkfw_image(spl_image, &load,
 				  trust_sectors,
-				  uboot_sectors);
+				  uboot_sectors,
+				  boot_sectors);
 	/* If boot successfully or can't try others, just go end */
 	if (!ret || ret != -EAGAIN)
 		goto end;
diff --git a/common/spl/spl_mtd_blk.c b/common/spl/spl_mtd_blk.c
index c14516ae02..d933af3b74 100644
--- a/common/spl/spl_mtd_blk.c
+++ b/common/spl/spl_mtd_blk.c
@@ -81,6 +81,7 @@ int spl_mtd_load_rkfw(struct spl_image_info *spl_image, struct blk_desc *desc)
 
 	u32 trust_sectors = CONFIG_RKFW_TRUST_SECTOR;
 	u32 uboot_sectors = CONFIG_RKFW_U_BOOT_SECTOR;
+	u32 boot_sectors = CONFIG_RKFW_BOOT_SECTOR;
 	struct spl_load_info load;
 
 	load.dev = desc;
@@ -101,7 +102,8 @@ int spl_mtd_load_rkfw(struct spl_image_info *spl_image, struct blk_desc *desc)
 
 	ret = spl_load_rkfw_image(spl_image, &load,
 				  trust_sectors,
-				  uboot_sectors);
+				  uboot_sectors,
+				  boot_sectors);
 	if (ret) {
 #ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
 		puts("spl_mtd_load_rkfw: mtd block read error\n");
diff --git a/common/spl/spl_nand.c b/common/spl/spl_nand.c
index 4ca363a822..61aedf9f79 100644
--- a/common/spl/spl_nand.c
+++ b/common/spl/spl_nand.c
@@ -61,6 +61,9 @@ static int spl_nand_load_element(struct spl_image_info *spl_image,
 	int err;
 
 #ifdef CONFIG_SPL_LOAD_RKFW
+	u32 trust_sectors = CONFIG_RKFW_TRUST_SECTOR;
+	u32 uboot_sectors = CONFIG_RKFW_U_BOOT_SECTOR;
+	u32 boot_sectors = CONFIG_RKFW_BOOT_SECTOR;
 	struct spl_load_info load;
 	int ret;
 
@@ -71,8 +74,9 @@ static int spl_nand_load_element(struct spl_image_info *spl_image,
 	load.read = spl_nand_rkfw_read;
 
 	ret = spl_load_rkfw_image(spl_image, &load,
-				  CONFIG_RKFW_TRUST_SECTOR,
-				  CONFIG_RKFW_U_BOOT_SECTOR);
+				  trust_sectors,
+				  uboot_sectors,
+				  boot_sectors);
 	if (!ret || ret != -EAGAIN)
 		return ret;
 #endif
diff --git a/common/spl/spl_rkfw.c b/common/spl/spl_rkfw.c
index 55c3529ea1..2cdcf7794f 100644
--- a/common/spl/spl_rkfw.c
+++ b/common/spl/spl_rkfw.c
@@ -348,7 +348,8 @@ out:
 
 int spl_load_rkfw_image(struct spl_image_info *spl_image,
 			struct spl_load_info *info,
-			u32 trust_sector, u32 uboot_sector)
+			u32 trust_sector, u32 uboot_sector,
+			u32 boot_sector)
 {
 	int ret, try_count = RKFW_RETRY_SECTOR_TIMES;
 	int found_rkfw = 0;
@@ -369,7 +370,7 @@ int spl_load_rkfw_image(struct spl_image_info *spl_image,
 	else
 		goto boot;
 
-	ret = rkfw_load_kernel(info, uboot_sector,
+	ret = rkfw_load_kernel(info, boot_sector,
 			     &spl_image->entry_point_bl33, try_count);
 	if (ret) {
 		printf("Load kernel image failed! ret=%d\n", ret);
diff --git a/include/spl_rkfw.h b/include/spl_rkfw.h
index c4c8e34205..c44b153e81 100644
--- a/include/spl_rkfw.h
+++ b/include/spl_rkfw.h
@@ -99,5 +99,6 @@ typedef struct tag_second_loader_hdr {
  */
 int spl_load_rkfw_image(struct spl_image_info *spl_image,
 			struct spl_load_info *info,
-			u32 trust_sector, u32 uboot_sector);
+			u32 trust_sector, u32 uboot_sector,
+			u32 boot_sector);
 #endif

commit e8b9592f0ef4d5be88398215c160c8a600493280
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Apr 3 16:33:59 2020 +0800

    common: spl: call the spl_next_stage() to get next stage process
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ibfe81766fcbfe002978b7d225a5602a8eeb89c12

diff --git a/common/spl/spl.c b/common/spl/spl.c
index 6bc0f4b7a9..0601dffb72 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -82,6 +82,9 @@ void __weak spl_perform_fixups(struct spl_image_info *spl_image)
 {
 }
 
+/* Get the next stage process */
+__weak void spl_next_stage(struct spl_image_info *spl) {}
+
 void spl_fixup_fdt(void)
 {
 #if defined(CONFIG_SPL_OF_LIBFDT) && defined(CONFIG_SYS_SPL_ARGS_ADDR)
@@ -528,7 +531,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 #endif
 	spl_image.boot_device = BOOT_DEVICE_NONE;
 	board_boot_order(spl_boot_list);
-
+	spl_next_stage(&spl_image);
 	if (boot_from_devices(&spl_image, spl_boot_list,
 			      ARRAY_SIZE(spl_boot_list))) {
 		puts("SPL: failed to boot from all boot devices\n");

commit 2323b257d77cdfc96fa6f5d6c468e6ec3f5e2372
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Sat Mar 21 17:11:18 2020 +0800

    rockchip: spl: add get spl next stage driver
    
    Use it to make sure which firmware can be bring up.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ib2cec8bf7c78fa436efade0518b07c3193170c7b

diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index 53fe711cb2..be2654a435 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <debug_uart.h>
 #include <dm.h>
+#include <key.h>
 #include <ram.h>
 #include <spl.h>
 #include <asm/arch/bootrom.h>
@@ -14,6 +15,7 @@
 #include <asm/arch/rk_atags.h>
 #endif
 #include <asm/arch/sdram.h>
+#include <asm/arch/boot_mode.h>
 #include <asm/arch-rockchip/sys_proto.h>
 #include <asm/io.h>
 
@@ -259,3 +261,37 @@ void spl_perform_fixups(struct spl_image_info *spl_image)
 	return;
 }
 
+#ifdef CONFIG_SPL_KERNEL_BOOT
+static int spl_rockchip_dnl_key_pressed(void)
+{
+	int key = false;
+#if defined(CONFIG_DM_KEY) && defined(CONFIG_SPL_INPUT)
+	key = key_read(KEY_VOLUMEUP);
+
+	return key_is_pressed(key);
+#else
+	return key;
+#endif
+}
+
+void spl_next_stage(struct spl_image_info *spl)
+{
+	uint32_t reg_boot_mode;
+
+	if (spl_rockchip_dnl_key_pressed()) {
+		spl->next_stage = SPL_NEXT_STAGE_UBOOT;
+		return;
+	}
+
+	reg_boot_mode = readl((void *)CONFIG_ROCKCHIP_BOOT_MODE_REG);
+	switch (reg_boot_mode) {
+	case BOOT_PANIC:
+	case BOOT_WATCHDOG:
+	case BOOT_NORMAL:
+		spl->next_stage = SPL_NEXT_STAGE_KERNEL;
+		break;
+	default:
+		spl->next_stage = SPL_NEXT_STAGE_UBOOT;
+	}
+}
+#endif
diff --git a/include/spl.h b/include/spl.h
index fe624bad58..3b1ca0cf28 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -81,6 +81,7 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 void preloader_console_init(void);
 u32 spl_boot_device(void);
 u32 spl_boot_mode(const u32 boot_device);
+void spl_next_stage(struct spl_image_info *spl);
 void spl_set_bd(void);
 
 /**

commit 69e1ad7bcf0749185113f9a1521437bc9fa2d5db
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Mar 12 15:44:59 2020 +0800

    spl: add spl next stage definition
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I822f0e92b158a673ce0d2e2265a5237f5870a58f

diff --git a/include/spl.h b/include/spl.h
index c3b31c6e69..fe624bad58 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -20,6 +20,10 @@
 #define MMCSD_MODE_FS		2
 #define MMCSD_MODE_EMMCBOOT	3
 
+#define SPL_NEXT_STAGE_UNDEFINED	0
+#define SPL_NEXT_STAGE_UBOOT		1
+#define SPL_NEXT_STAGE_KERNEL		2
+
 struct spl_image_info {
 	const char *name;
 	u8 os;

commit c88ba1c4c34dbe6bacb15d43ef55cf3f76948f44
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Mar 12 15:35:13 2020 +0800

    spl: add next_stage to struct spl_image_info
    
    Add next_stage to indicate the next boot stage is uboot or kernel.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I9104ede143c5a9c7f0bff6869e67d5e605e596ca

diff --git a/include/spl.h b/include/spl.h
index 4033b12c08..c3b31c6e69 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -33,6 +33,7 @@ struct spl_image_info {
 	void *fdt_addr;
 #endif
 	u32 boot_device;
+	u32 next_stage;
 	u32 size;
 	u32 flags;
 	void *arg;

commit ae80c85fe8fdc7846d444c15ac72ab9779bf7c0a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Apr 3 17:48:27 2020 +0800

    power: io-domain: add initial message
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I4b6a508371dba74a3c992786a6cdb4d5b4d6eb80

diff --git a/drivers/power/io-domain/io-domain-uclass.c b/drivers/power/io-domain/io-domain-uclass.c
index c3d35b2c71..4f4b45eb49 100644
--- a/drivers/power/io-domain/io-domain-uclass.c
+++ b/drivers/power/io-domain/io-domain-uclass.c
@@ -22,6 +22,8 @@ int io_domain_init(void)
 	     uclass_next_device(&dev))
 		;
 
+	printf("io-domain: OK\n");
+
 	return 0;
 }
 

commit a4d1e7eec003b64fb6dffab3cba3f114ef87b607
Merge: 042310d674 b4e157ffa2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Apr 3 18:12:46 2020 +0800

    Merge branch 'next-dev' into thunder-boot

commit b4e157ffa2b4dbaaac0181bea4c99b11563295d3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Apr 3 12:05:36 2020 +0800

    make.sh: add version for spl loader
    
    before:
      rk3399_loader_v1.24.124.bin => rk3399_loader_spl.bin
    
    after:
      rk3399_loader_v1.24.124.bin => rk3399_spl_loader_v1.24.124.bin
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If5bcc02504760d178557d8db78889074fcad0427

diff --git a/make.sh b/make.sh
index 7e9232597e..586a7bc041 100755
--- a/make.sh
+++ b/make.sh
@@ -547,11 +547,10 @@ pack_spl_loader_image()
 	rm ${RKBIN}/.temp -rf
 	cd -
 	ls *_loader_*.bin >/dev/null 2>&1 && rm *_loader_*.bin
-
-	RKCHIP_LOWCASE=`echo ${RKCHIP} |tr '[A-Z]' '[a-z]'`
-	mv ${RKBIN}/*_loader_*.bin ./${RKCHIP_LOWCASE}_loader_spl.bin
+	mv ${RKBIN}/*_loader_*.bin ./
+	rename 's/loader_/spl_loader_/' *_loader_*.bin
 	echo "pack loader(${label}) okay! Input: ${ini}"
-	ls ./${RKCHIP_LOWCASE}_loader_spl.bin
+	ls ./*_loader_*.bin
 }
 
 pack_loader_image()

commit 6f3e9d5cd7d8874db71edae35869b9e8822a2327
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 2 15:08:03 2020 +0800

    rockchip: fit: rename "required" to "verified-boot"
    
    "verified-boot" is more clearly for developers.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ib8a87af18480f2d5e765b9007eb5f8473ee424fb

diff --git a/arch/arm/mach-rockchip/fit.c b/arch/arm/mach-rockchip/fit.c
index d11f94135d..752b2a7217 100644
--- a/arch/arm/mach-rockchip/fit.c
+++ b/arch/arm/mach-rockchip/fit.c
@@ -466,7 +466,7 @@ void *fit_image_load_bootables(ulong *size)
 
 static void verbose_msg(void *fit, int defconf)
 {
-	FIT_I("%ssigned, %srequired\n",
+	FIT_I("%ssigned, %sverified-boot\n",
 	      fit_is_signed(fit, gd_fdt_blob()) ? "" : "no ",
 	      fit_is_required(fit, gd_fdt_blob()) ? "" : "no ");
 

commit 767fd95d066e21d7025a6994a8408177528569a8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 2 17:06:18 2020 +0800

    rockchip: fit: remove fit_get_image_defconf_node()
    
    It is added in image-fit.c as a common function.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I105e0a7cacde226da1bb787ba1f4f320d6daa55d

diff --git a/arch/arm/mach-rockchip/fit.c b/arch/arm/mach-rockchip/fit.c
index 1e442df05c..d11f94135d 100644
--- a/arch/arm/mach-rockchip/fit.c
+++ b/arch/arm/mach-rockchip/fit.c
@@ -55,33 +55,6 @@ static int fit_is_required(void *fit, const void *sig_blob)
 	return 0;
 }
 
-static int fit_get_image_defconf_node(void *fit, int *images, int *defconf)
-{
-	int images_node, confs_node, defconf_node;
-	const char *def_name;
-
-	images_node = fdt_path_offset(fit, FIT_IMAGES_PATH);
-	if (images_node < 0)
-		return images_node;
-
-	confs_node = fdt_path_offset(fit, FIT_CONFS_PATH);
-	if (confs_node < 0)
-		return confs_node;
-
-	def_name = fdt_getprop(fit, confs_node, FIT_DEFAULT_PROP, NULL);
-	if (!def_name)
-		return -ENOENT;
-
-	defconf_node = fdt_subnode_offset(fit, confs_node, def_name);
-	if (defconf_node < 0)
-		return defconf_node;
-
-	*images = images_node;
-	*defconf = defconf_node;
-
-	return 0;
-}
-
 int fit_fixup_load_entry(void *fit, int images, int defconf,
 			 char *name, ulong *load, ulong new_addr)
 {

commit d871c07160f200e0401b6494b594c7af06b34379
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 2 17:05:28 2020 +0800

    common: image-fit: add some common APIs
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I3df010d3b6a07efc7287779fe4a0a60ce9f1d2dc

diff --git a/common/image-fit.c b/common/image-fit.c
index 101b3f02df..29c38aa356 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -949,6 +949,30 @@ int fit_image_get_data_size(const void *fit, int noffset, int *data_size)
 	return 0;
 }
 
+/**
+ * Get 'rollback-index' property from a given image node.
+ *
+ * @fit: pointer to the FIT image header
+ * @noffset: component image node offset
+ * @index: holds the rollback-index property
+ *
+ * returns:
+ *     0, on success
+ *     -ENOENT if the property could not be found
+ */
+int fit_image_get_rollback_index(const void *fit, int noffset, uint32_t *index)
+{
+	const fdt32_t *val;
+
+	val = fdt_getprop(fit, noffset, FIT_ROLLBACK_PROP, NULL);
+	if (!val)
+		return -ENOENT;
+
+	*index = fdt32_to_cpu(*val);
+
+	return 0;
+}
+
 /**
  * fit_image_hash_get_algo - get hash algorithm name
  * @fit: pointer to the FIT format image header
@@ -1070,6 +1094,33 @@ int fit_set_timestamp(void *fit, int noffset, time_t timestamp)
 	return 0;
 }
 
+int fit_get_image_defconf_node(const void *fit, int *images_noffset, int *def_noffset)
+{
+	int images_node, confs_node, defconf_node;
+	const char *def_name;
+
+	images_node = fdt_path_offset(fit, FIT_IMAGES_PATH);
+	if (images_node < 0)
+		return images_node;
+
+	confs_node = fdt_path_offset(fit, FIT_CONFS_PATH);
+	if (confs_node < 0)
+		return confs_node;
+
+	def_name = fdt_getprop(fit, confs_node, FIT_DEFAULT_PROP, NULL);
+	if (!def_name)
+		return -ENOENT;
+
+	defconf_node = fdt_subnode_offset(fit, confs_node, def_name);
+	if (defconf_node < 0)
+		return defconf_node;
+
+	*images_noffset = images_node;
+	*def_noffset = defconf_node;
+
+	return 0;
+}
+
 /**
  * calculate_hash - calculate and return hash for provided input data
  * @data: pointer to the input data
diff --git a/include/image.h b/include/image.h
index 4d877b84d1..c74b57c56a 100644
--- a/include/image.h
+++ b/include/image.h
@@ -921,6 +921,7 @@ int bootz_setup(ulong image, ulong *start, ulong *end);
 #define FIT_COMP_PROP		"compression"
 #define FIT_ENTRY_PROP		"entry"
 #define FIT_LOAD_PROP		"load"
+#define FIT_ROLLBACK_PROP	"rollback-index"
 
 /* configuration node */
 #define FIT_KERNEL_PROP		"kernel"
@@ -1005,6 +1006,7 @@ int fit_image_get_data_offset(const void *fit, int noffset, int *data_offset);
 int fit_image_get_data_position(const void *fit, int noffset,
 				int *data_position);
 int fit_image_get_data_size(const void *fit, int noffset, int *data_size);
+int fit_image_get_rollback_index(const void *fit, int noffset, uint32_t *index);
 
 int fit_image_hash_get_algo(const void *fit, int noffset, char **algo);
 int fit_image_hash_get_value(const void *fit, int noffset, uint8_t **value,
@@ -1012,6 +1014,9 @@ int fit_image_hash_get_value(const void *fit, int noffset, uint8_t **value,
 
 int fit_set_timestamp(void *fit, int noffset, time_t timestamp);
 
+int fit_get_image_defconf_node(const void *fit,
+			       int *images_noffset, int *def_noffset);
+
 /**
  * fit_add_verification_data() - add verification data to FIT image nodes
  *

commit 2dc02ea3807580f3ca6c3069f0c554f74e6247fd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 2 14:51:26 2020 +0800

    common: bootm: support host sign check for armv7 fit image
    
    including: fdt, u-boot, op-tee.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ieb3dc15383f47626ef125b5d64e96b90a0a67cc6

diff --git a/common/bootm.c b/common/bootm.c
index afb01b9238..92f0b9f2f8 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -1033,6 +1033,7 @@ int bootm_host_load_images(const void *fit, int cfg_noffset, int is_spl)
 		IH_TYPE_FLATDT,
 		IH_TYPE_RAMDISK,
 	};
+#ifdef CONFIG_SPL_ATF
 	static uint8_t image_types_spl[] = {
 		IH_TYPE_FLATDT,
 		IH_TYPE_FIRMWARE,
@@ -1040,6 +1041,13 @@ int bootm_host_load_images(const void *fit, int cfg_noffset, int is_spl)
 		IH_TYPE_LOADABLE,
 		IH_TYPE_LOADABLE,
 	};
+#else
+	static uint8_t image_types_spl[] = {
+		IH_TYPE_FLATDT,
+		IH_TYPE_FIRMWARE,
+		IH_TYPE_LOADABLE,
+	};
+#endif
 	int loadable_index = 0;
 	int err = 0;
 	int index;

commit 10530d82c2787a966b8c35a171bca4ba921bd61b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 2 10:50:59 2020 +0800

    rockchip: its: add "rollback-index" property
    
    This property is verified to support rollback index protect
    for verified-boot.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I54c5baaa275189ca96f18be66753b1292a395df6

diff --git a/arch/arm/mach-rockchip/kernel_arm.its b/arch/arm/mach-rockchip/kernel_arm.its
index e717ccea08..fb5f1ebb25 100644
--- a/arch/arm/mach-rockchip/kernel_arm.its
+++ b/arch/arm/mach-rockchip/kernel_arm.its
@@ -67,7 +67,7 @@
 		default = "conf@1";
 		conf@1 {
 			description = "Boot Linux kernel with FDT blob";
-			conf-version = <1>;
+			rollback-index = <0x0>;
 			fdt = "fdt@1";
 			kernel = "kernel@1";
 			ramdisk = "ramdisk@1";
diff --git a/arch/arm/mach-rockchip/kernel_arm64.its b/arch/arm/mach-rockchip/kernel_arm64.its
index 06ee7997d4..61ff1e5481 100644
--- a/arch/arm/mach-rockchip/kernel_arm64.its
+++ b/arch/arm/mach-rockchip/kernel_arm64.its
@@ -68,7 +68,7 @@
 		default = "conf@1";
 		conf@1 {
 			description = "Boot Linux kernel with FDT blob";
-			conf-version = <1>;
+			rollback-index = <0x0>;
 			fdt = "fdt@1";
 			kernel = "kernel@1";
 			ramdisk = "ramdisk@1";
diff --git a/arch/arm/mach-rockchip/make_fit_atf.py b/arch/arm/mach-rockchip/make_fit_atf.py
index 9f54fcbb82..609c706909 100755
--- a/arch/arm/mach-rockchip/make_fit_atf.py
+++ b/arch/arm/mach-rockchip/make_fit_atf.py
@@ -103,6 +103,7 @@ def append_fdt_node(file, dtbs):
 def append_conf_section(file, cnt, dtname, atf_cnt):
     print >> file, '\t\tconfig@%d {' % cnt
     print >> file, '\t\t\tdescription = "Rockchip armv8 with ATF";'
+    print >> file, '\t\t\trollback-index = <0x0>;'
     print >> file, '\t\t\tfirmware = "atf@1";'
     print >> file, '\t\t\tloadables = "uboot@1",',
     for i in range(1, atf_cnt):
diff --git a/arch/arm/mach-rockchip/make_fit_optee.sh b/arch/arm/mach-rockchip/make_fit_optee.sh
index a0aa9251f9..9eb45e7e44 100755
--- a/arch/arm/mach-rockchip/make_fit_optee.sh
+++ b/arch/arm/mach-rockchip/make_fit_optee.sh
@@ -66,6 +66,7 @@ cat << EOF
 		default = "conf@1";
 		conf@1 {
 			description = "Rockchip armv7 with OP-TEE";
+			rollback-index = <0x0>;
 			firmware = "optee@1";
 			loadables = "uboot@1";
 			fdt = "fdt@1";

commit 042310d67415957b8fcf98f71c578e6257cf5410
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Tue Mar 24 16:39:28 2020 +0800

    power: io-domain: add rv1126 support
    
    Change-Id: I2198e21920576ab02ce7d1964d6b014e9de88c81
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/drivers/power/io-domain/rockchip-io-domain.c b/drivers/power/io-domain/rockchip-io-domain.c
index 4c2d63055e..fa6a8deb08 100644
--- a/drivers/power/io-domain/rockchip-io-domain.c
+++ b/drivers/power/io-domain/rockchip-io-domain.c
@@ -470,6 +470,22 @@ static const struct rockchip_iodomain_soc_data soc_data_rv1108_pmu = {
 	},
 };
 
+static const struct rockchip_iodomain_soc_data soc_data_rv1126_pmu = {
+	.grf_offset = 0x140,
+	.supply_names = {
+		NULL,
+		"vccio1",
+		"vccio2",
+		"vccio3",
+		"vccio4",
+		"vccio5",
+		"vccio6",
+		"vccio7",
+		"pmuio0",
+		"pmuio1",
+	},
+};
+
 static struct udevice *of_get_regulator(ofnode node, const char *supply)
 {
 	char sname[32]; /* 32 is max size of property name */
@@ -605,6 +621,10 @@ static const struct udevice_id rockchip_iodomain_match[] = {
 		.compatible = "rockchip,rv1108-pmu-io-voltage-domain",
 		.data = (ulong)&soc_data_rv1108_pmu
 	},
+	{
+		.compatible = "rockchip,rv1126-pmu-io-voltage-domain",
+		.data = (ulong)&soc_data_rv1126_pmu
+	},
 	{ /* sentinel */ },
 };
 

commit 2189ef33e9ebd88568db3c8d33809c596eba725d
Author: Jianing Ren <jianing.ren@rock-chips.com>
Date:   Thu Apr 2 21:05:03 2020 +0800

    rockchip: dts: rv1126: add and enable usb otg-phy node
    
    Change-Id: I94af0cf32862b97132ab04ab0c669bc81185d169
    Signed-off-by: Jianing Ren <jianing.ren@rock-chips.com>

diff --git a/arch/arm/dts/rv1126-u-boot.dtsi b/arch/arm/dts/rv1126-u-boot.dtsi
index 6d9708e51f..0878a766b2 100644
--- a/arch/arm/dts/rv1126-u-boot.dtsi
+++ b/arch/arm/dts/rv1126-u-boot.dtsi
@@ -99,6 +99,16 @@
 	};
 };
 
+&u2phy0 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&u2phy_otg {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 &usbdrd {
 	u-boot,dm-pre-reloc;
 	status = "okay";
@@ -106,6 +116,5 @@
 
 &usbdrd_dwc3 {
 	u-boot,dm-pre-reloc;
-	/delete-property/ phys;
 	status = "okay";
 };

commit 73a9beaad83de1ebc682c8f2cc76461638806eb9
Author: Jianing Ren <jianing.ren@rock-chips.com>
Date:   Fri Apr 3 14:43:35 2020 +0800

    rockchip: rename the include file phy-rockchip-usb2.h
    
    Change-Id: I694d352b2bda7b67f721bbc69860f93bc55a70ef
    Signed-off-by: Jianing Ren <jianing.ren@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_rkimg.c b/arch/arm/mach-rockchip/boot_rkimg.c
index a2fec12269..99fdfcffa7 100644
--- a/arch/arm/mach-rockchip/boot_rkimg.c
+++ b/arch/arm/mach-rockchip/boot_rkimg.c
@@ -32,7 +32,7 @@
 #include <linux/list.h>
 #include <u-boot/sha1.h>
 #include <u-boot/sha256.h>
-#include <linux/usb/phy-rockchip-inno-usb2.h>
+#include <linux/usb/phy-rockchip-usb2.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 

commit 86623982683b403ae83d5b116fc48dd824758269
Author: Jianing Ren <jianing.ren@rock-chips.com>
Date:   Fri Apr 3 14:46:48 2020 +0800

    power: rename the include file phy-rockchip-usb2.h
    
    Change-Id: I3725130115907555aad9ad4e669601b5059c8066
    Signed-off-by: Jianing Ren <jianing.ren@rock-chips.com>

diff --git a/drivers/power/charge/bq25700_charger.c b/drivers/power/charge/bq25700_charger.c
index 5b6ab4a7c2..bd921371ed 100644
--- a/drivers/power/charge/bq25700_charger.c
+++ b/drivers/power/charge/bq25700_charger.c
@@ -9,7 +9,7 @@
 #include <dm/device.h>
 #include <power/fuel_gauge.h>
 #include <power/pmic.h>
-#include <linux/usb/phy-rockchip-inno-usb2.h>
+#include <linux/usb/phy-rockchip-usb2.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/power/fuel_gauge/fg_cw201x.c b/drivers/power/fuel_gauge/fg_cw201x.c
index 7a0e6fd142..3af66d4888 100755
--- a/drivers/power/fuel_gauge/fg_cw201x.c
+++ b/drivers/power/fuel_gauge/fg_cw201x.c
@@ -10,7 +10,7 @@
 #include <errno.h>
 #include <fdtdec.h>
 #include <i2c.h>
-#include <linux/usb/phy-rockchip-inno-usb2.h>
+#include <linux/usb/phy-rockchip-usb2.h>
 #include <malloc.h>
 #include <power/battery.h>
 #include <power/fuel_gauge.h>
diff --git a/drivers/power/fuel_gauge/fg_rk816.c b/drivers/power/fuel_gauge/fg_rk816.c
index 76ae3b030a..769721d0db 100644
--- a/drivers/power/fuel_gauge/fg_rk816.c
+++ b/drivers/power/fuel_gauge/fg_rk816.c
@@ -18,7 +18,7 @@
 #include <power/charge_animation.h>
 #include <power/fuel_gauge.h>
 #include <power/rk8xx_pmic.h>
-#include <linux/usb/phy-rockchip-inno-usb2.h>
+#include <linux/usb/phy-rockchip-usb2.h>
 #include "fg_regs.h"
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/drivers/power/fuel_gauge/fg_rk817.c b/drivers/power/fuel_gauge/fg_rk817.c
index 24af7747e2..9f6a7c9e02 100644
--- a/drivers/power/fuel_gauge/fg_rk817.c
+++ b/drivers/power/fuel_gauge/fg_rk817.c
@@ -16,7 +16,7 @@
 #include <power/charge_animation.h>
 #include <power/fuel_gauge.h>
 #include <power/rk8xx_pmic.h>
-#include <linux/usb/phy-rockchip-inno-usb2.h>
+#include <linux/usb/phy-rockchip-usb2.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/power/fuel_gauge/fg_rk818.c b/drivers/power/fuel_gauge/fg_rk818.c
index 918fc804bd..8258f57bd9 100644
--- a/drivers/power/fuel_gauge/fg_rk818.c
+++ b/drivers/power/fuel_gauge/fg_rk818.c
@@ -17,7 +17,7 @@
 #include <power/charge_animation.h>
 #include <power/fuel_gauge.h>
 #include <power/rk8xx_pmic.h>
-#include <linux/usb/phy-rockchip-inno-usb2.h>
+#include <linux/usb/phy-rockchip-usb2.h>
 #include "fg_regs.h"
 
 DECLARE_GLOBAL_DATA_PTR;

commit 6037440f1237dd5604f31ae36a5eb2f742c31021
Author: Jianing Ren <jianing.ren@rock-chips.com>
Date:   Thu Apr 2 17:30:57 2020 +0800

    include: usb: add naneng usb2.0 phy support
    
    There are there rockchip USB2.0 PHYs can support USB BC1.2,
    respectively Synopsys USB2.0 PHY, Innosilicon USB2.0 PHY and
    Naneng USB2.0 PHY. So we rename the file to phy-rockchip-usb2.h.
    
    Change-Id: I561efc178b5168965c41098dd5b749f3d5083851
    Signed-off-by: Jianing Ren <jianing.ren@rock-chips.com>

diff --git a/include/linux/usb/phy-rockchip-inno-usb2.h b/include/linux/usb/phy-rockchip-usb2.h
similarity index 53%
rename from include/linux/usb/phy-rockchip-inno-usb2.h
rename to include/linux/usb/phy-rockchip-usb2.h
index c646ea30c9..01eeb17f73 100644
--- a/include/linux/usb/phy-rockchip-inno-usb2.h
+++ b/include/linux/usb/phy-rockchip-usb2.h
@@ -4,12 +4,15 @@
  * SPDX-License-Identifier:    GPL-2.0+
  */
 
-#ifndef _PHY_ROCKCHIP_INNO_USB2_H
-#define _PHY_ROCKCHIP_INNO_USB2_H
+#ifndef _PHY_ROCKCHIP_USB2_H
+#define _PHY_ROCKCHIP_USB2_H
 
 extern int rockchip_chg_get_type(void);
 
-#if defined(CONFIG_PHY_ROCKCHIP_INNO_USB2) || defined(CONFIG_ROCKCHIP_USB2_PHY)
+#if defined(CONFIG_PHY_ROCKCHIP_INNO_USB2) ||\
+    defined(CONFIG_ROCKCHIP_USB2_PHY) ||\
+    defined(CONFIG_PHY_ROCKCHIP_NANENG_USB2)
+
 int rockchip_u2phy_vbus_detect(void);
 #else
 static inline int rockchip_u2phy_vbus_detect(void)
@@ -18,4 +21,4 @@ static inline int rockchip_u2phy_vbus_detect(void)
 }
 #endif
 
-#endif /* _PHY_ROCKCHIP_INNO_USB2_H */
+#endif /* _PHY_ROCKCHIP_USB2_H */

commit 570fc3c4f9c92c140fa53f1f5d358c8537bdf3e6
Author: Jianing Ren <jianing.ren@rock-chips.com>
Date:   Thu Apr 2 17:15:06 2020 +0800

    configs: rv1126: support usb phy driver build
    
    Change-Id: I26d1b24554d79af0d60c31ec35618cdd695a39f1
    Signed-off-by: Jianing Ren <jianing.ren@rock-chips.com>

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index 35a2cb76de..ee853bd3d8 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -73,6 +73,8 @@ CONFIG_RK8XX_PWRKEY=y
 CONFIG_ADC_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_NANENG_USB2=y
 CONFIG_MTD=y
 CONFIG_MTD_BLK=y
 CONFIG_MTD_DEVICE=y

commit cdaaec08cb970b0814da12247e2870f3c5140981
Author: Ren Jianing <jianing.ren@rock-chips.com>
Date:   Mon Mar 30 16:32:40 2020 +0800

    phy: add a new driver for rockchip usb2 phy
    
    This phy driver supports for rockchip SoCs with USB 2.0
    PHY consist of Naneng PHY. It can be used for the otg phy
    and host phy, typically, otg phy is used for DWC3, and the
    host phy is shared between the EHCI and OHCI controllers.
    
    Signed-off-by: Ren Jianing <jianing.ren@rock-chips.com>
    Change-Id: I76a8470dbc5ec789e60cee4ec8ad9a56e73c9841

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index a5717a1e2a..07bd2700af 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -65,6 +65,12 @@ config PHY_ROCKCHIP_INNO_USB2
 	help
 	  Support for Rockchip USB 2.0 PHY with Innosilicon IP block.
 
+config PHY_ROCKCHIP_NANENG_USB2
+	bool "Support Rockchip Naneng USB2PHY"
+	depends on PHY && ARCH_ROCKCHIP
+	help
+	  Support for Rockchip USB 2.0 PHY with Naneng IP block.
+
 config PIPE3_PHY
 	bool "Support omap's PIPE3 PHY"
 	depends on PHY && ARCH_OMAP2PLUS
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index 2b8f47eee4..30aba0e1f9 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -8,5 +8,6 @@
 obj-$(CONFIG_$(SPL_)PHY) += phy-uclass.o
 obj-$(CONFIG_$(SPL_)NOP_PHY) += nop-phy.o
 obj-$(CONFIG_PHY_ROCKCHIP_INNO_USB2) += phy-rockchip-inno-usb2.o
+obj-$(CONFIG_PHY_ROCKCHIP_NANENG_USB2) += phy-rockchip-naneng-usb2.o
 obj-$(CONFIG_PHY_SANDBOX) += sandbox-phy.o
 obj-$(CONFIG_$(SPL_)PIPE3_PHY) += ti-pipe3-phy.o
diff --git a/drivers/phy/phy-rockchip-naneng-usb2.c b/drivers/phy/phy-rockchip-naneng-usb2.c
new file mode 100644
index 0000000000..1176eaae00
--- /dev/null
+++ b/drivers/phy/phy-rockchip-naneng-usb2.c
@@ -0,0 +1,500 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Rockchip USB2.0 PHY with Naneng IP block driver
+ *
+ * Copyright (C) 2020 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/lists.h>
+#include <generic-phy.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <reset-uclass.h>
+
+#define U2PHY_BIT_WRITEABLE_SHIFT	16
+
+struct rockchip_usb2phy;
+
+enum power_supply_type {
+	POWER_SUPPLY_TYPE_UNKNOWN = 0,
+	POWER_SUPPLY_TYPE_USB,		/* Standard Downstream Port */
+	POWER_SUPPLY_TYPE_USB_DCP,	/* Dedicated Charging Port */
+	POWER_SUPPLY_TYPE_USB_CDP,	/* Charging Downstream Port */
+	POWER_SUPPLY_TYPE_USB_FLOATING,	/* DCP without shorting D+/D- */
+};
+
+enum rockchip_usb2phy_port_id {
+	USB2PHY_PORT_OTG,
+	USB2PHY_PORT_HOST,
+	USB2PHY_NUM_PORTS,
+};
+
+struct usb2phy_reg {
+	u32	offset;
+	u32	bitend;
+	u32	bitstart;
+	u32	disable;
+	u32	enable;
+};
+
+/**
+ * struct rockchip_chg_det_reg: usb charger detect registers
+ * @chg_valid: charge valid signal.
+ * @phy_connect: PHY start handshake signal.
+ * @chg_en: charge detector enable signal.
+ * @chg_rst: charge detector reset signal, active high.
+ */
+struct rockchip_chg_det_reg {
+	struct usb2phy_reg	chg_valid;
+	struct usb2phy_reg	phy_connect;
+	struct usb2phy_reg	chg_en;
+	struct usb2phy_reg	chg_rst;
+};
+
+/**
+ * struct rockchip_usb2phy_port_cfg: usb phy port configuration.
+ * @bypass_otgsuspendm: otg-suspendm bypass control register.
+ *			 0: iddig; 1: grf.
+ * @bvalidfall_det_en: vbus valid fall detection enable register.
+ * @bvalidfall_det_st: vbus valid fall detection status register.
+ * @bvalidfall_det_clr: vbus valid fall detection clear register.
+ * @bvalidrise_det_en: vbus valid rise detection enable register.
+ * @bvalidrise_det_st: vbus valid rise detection status register.
+ * @bvalidrise_det_clr: vbus valid rise detection clear register.
+ * @disconfall_det_en: host connect detection enable register.
+ * @disconfall_det_st: host connect detection status register.
+ * @disconfall_det_clr: host connect detection clear register.
+ * @disconrise_det_en: host disconnect detection enable register.
+ * @disconrise_det_st: host disconnect detection status register.
+ * @disconrise_det_clr: host disconnect detection clear register.
+ * @idfall_det_en: id fall detection enable register.
+ * @idfall_det_st: id fall detection state register.
+ * @idfall_det_clr: id fall detection clear register.
+ * @idpullup: id pin pullup or pulldown control register.
+ * @idrise_det_en: id rise detection enable register.
+ * @idrise_det_st: id rise detection state register.
+ * @idrise_det_clr: id rise detection clear register.
+ * @ls_det_en: linestate detection enable register.
+ * @ls_det_st: linestate detection state register.
+ * @ls_det_clr: linestate detection clear register.
+ * @phy_sus: phy suspend register.
+ * @utmi_bvalid: utmi vbus bvalid status register.
+ * @utmi_iddig: otg port id pin status register.
+ * @utmi_hostdet: utmi host disconnect status register.
+ */
+struct rockchip_usb2phy_port_cfg {
+	struct usb2phy_reg	bypass_otgsuspendm;
+	struct usb2phy_reg	bvalidfall_det_en;
+	struct usb2phy_reg	bvalidfall_det_st;
+	struct usb2phy_reg	bvalidfall_det_clr;
+	struct usb2phy_reg	bvalidrise_det_en;
+	struct usb2phy_reg	bvalidrise_det_st;
+	struct usb2phy_reg	bvalidrise_det_clr;
+	struct usb2phy_reg	disconfall_det_en;
+	struct usb2phy_reg	disconfall_det_st;
+	struct usb2phy_reg	disconfall_det_clr;
+	struct usb2phy_reg	disconrise_det_en;
+	struct usb2phy_reg	disconrise_det_st;
+	struct usb2phy_reg	disconrise_det_clr;
+	struct usb2phy_reg	idfall_det_en;
+	struct usb2phy_reg	idfall_det_st;
+	struct usb2phy_reg	idfall_det_clr;
+	struct usb2phy_reg	idpullup;
+	struct usb2phy_reg	idrise_det_en;
+	struct usb2phy_reg	idrise_det_st;
+	struct usb2phy_reg	idrise_det_clr;
+	struct usb2phy_reg	ls_det_en;
+	struct usb2phy_reg	ls_det_st;
+	struct usb2phy_reg	ls_det_clr;
+	struct usb2phy_reg	phy_sus;
+	struct usb2phy_reg	utmi_bvalid;
+	struct usb2phy_reg	utmi_iddig;
+	struct usb2phy_reg	utmi_hostdet;
+};
+
+/**
+ * struct rockchip_usb2phy_cfg: usb phy configuration.
+ * @reg: the address offset of grf for usb-phy config.
+ * @num_ports: specify how many ports that the phy has.
+ * @phy_tuning: phy default parameters tuning.
+ * @clkout_ctl: keep on/turn off output clk of phy.
+ * @port_cfgs: ports register configuration, assigned by driver data.
+ * @chg_det: charger detection registers.
+ * @last: indicate the last one.
+ */
+struct rockchip_usb2phy_cfg {
+	unsigned int	reg;
+	unsigned int	num_ports;
+	int		(*phy_tuning)(struct rockchip_usb2phy *rphy);
+	struct		usb2phy_reg clkout_ctl;
+	const struct	rockchip_usb2phy_port_cfg port_cfgs[USB2PHY_NUM_PORTS];
+	const struct	rockchip_chg_det_reg chg_det;
+	bool		last;
+};
+
+/**
+ * struct rockchip_usb2phy: usb2.0 phy driver data.
+ * @grf: General Register Files register base.
+ * @reset: power reset signal for phy.
+ * @phy_cfg: phy register configuration, assigned by driver data.
+ */
+struct rockchip_usb2phy {
+	void __iomem		*grf;
+	struct reset_ctl	*reset;
+	const struct rockchip_usb2phy_cfg	*phy_cfg;
+};
+
+static inline int property_enable(void __iomem *base,
+				  const struct usb2phy_reg *reg, bool en)
+{
+	u32 val, mask, tmp;
+
+	tmp = en ? reg->enable : reg->disable;
+	mask = GENMASK(reg->bitend, reg->bitstart);
+	val = (tmp << reg->bitstart) | (mask << U2PHY_BIT_WRITEABLE_SHIFT);
+
+	return writel(val, base + reg->offset);
+}
+
+static inline bool property_enabled(void __iomem *base,
+				    const struct usb2phy_reg *reg)
+{
+	u32 tmp, orig;
+	u32 mask = GENMASK(reg->bitend, reg->bitstart);
+
+	orig = readl(base + reg->offset);
+
+	tmp = (orig & mask) >> reg->bitstart;
+
+	return tmp == reg->enable;
+}
+
+static const char *chg_to_string(enum power_supply_type chg_type)
+{
+	switch (chg_type) {
+	case POWER_SUPPLY_TYPE_USB:
+		return "USB_SDP_CHARGER";
+	case POWER_SUPPLY_TYPE_USB_DCP:
+		return "USB_DCP_CHARGER";
+	case POWER_SUPPLY_TYPE_USB_CDP:
+		return "USB_CDP_CHARGER";
+	case POWER_SUPPLY_TYPE_USB_FLOATING:
+		return "USB_FLOATING_CHARGER";
+	default:
+		return "INVALID_CHARGER";
+	}
+}
+
+int rockchip_chg_get_type(void)
+{
+	const struct rockchip_usb2phy_port_cfg *port_cfg;
+	enum power_supply_type chg_type;
+	struct rockchip_usb2phy *rphy;
+	struct udevice *udev;
+	bool chg_valid, phy_connect;
+	int cnt;
+	int ret;
+
+	ret = uclass_get_device_by_name(UCLASS_PHY, "usb2-phy", &udev);
+	if (ret == -ENODEV) {
+		pr_err("%s: get u2phy node failed: %d\n", __func__, ret);
+		return ret;
+	}
+
+	rphy = dev_get_priv(udev);
+	port_cfg = &rphy->phy_cfg->port_cfgs[USB2PHY_PORT_OTG];
+
+	/* Check USB-Vbus status first */
+	if (!property_enabled(rphy->grf, &port_cfg->utmi_bvalid)) {
+		pr_info("%s: no charger found\n", __func__);
+		return POWER_SUPPLY_TYPE_UNKNOWN;
+	}
+
+	reset_assert(rphy->reset);
+
+	/* CHG_RST is set to 1'b0 to start charge detection */
+	property_enable(rphy->grf, &rphy->phy_cfg->chg_det.chg_en, true);
+	property_enable(rphy->grf, &rphy->phy_cfg->chg_det.chg_rst, false);
+
+	for (cnt = 0; cnt < 12; cnt++) {
+		mdelay(100);
+
+		chg_valid = property_enabled(rphy->grf,
+					     &rphy->phy_cfg->chg_det.chg_valid);
+		phy_connect =
+			property_enabled(rphy->grf,
+					 &rphy->phy_cfg->chg_det.phy_connect);
+		chg_type = (chg_valid << 1) | phy_connect;
+
+		if (chg_type)
+			goto compeleted;
+	}
+
+compeleted:
+	debug("charger = %s\n", chg_to_string(chg_type));
+
+	mdelay(1);
+	reset_deassert(rphy->reset);
+	/* disable the chg detection module */
+	property_enable(rphy->grf, &rphy->phy_cfg->chg_det.chg_rst, true);
+	property_enable(rphy->grf, &rphy->phy_cfg->chg_det.chg_en, false);
+
+	return chg_type;
+}
+
+int rockchip_u2phy_vbus_detect(void)
+{
+	int chg_type;
+
+	chg_type = rockchip_chg_get_type();
+
+	return (chg_type == POWER_SUPPLY_TYPE_USB ||
+		chg_type == POWER_SUPPLY_TYPE_USB_CDP) ? 1 : 0;
+}
+
+static int rockchip_usb2phy_init(struct phy *phy)
+{
+	struct udevice *parent = phy->dev->parent;
+	struct rockchip_usb2phy *rphy = dev_get_priv(parent);
+	const struct rockchip_usb2phy_port_cfg *port_cfg;
+
+	if (phy->id == USB2PHY_PORT_OTG) {
+		port_cfg = &rphy->phy_cfg->port_cfgs[USB2PHY_PORT_OTG];
+	} else if (phy->id == USB2PHY_PORT_HOST) {
+		port_cfg = &rphy->phy_cfg->port_cfgs[USB2PHY_PORT_HOST];
+	} else {
+		dev_err(phy->dev, "phy id %lu not support", phy->id);
+		return -EINVAL;
+	}
+
+	property_enable(rphy->grf, &port_cfg->phy_sus, false);
+
+	/* waiting for the utmi_clk to become stable */
+	udelay(2000);
+
+	return 0;
+}
+
+static int rockchip_usb2phy_exit(struct phy *phy)
+{
+	struct udevice *parent = phy->dev->parent;
+	struct rockchip_usb2phy *rphy = dev_get_priv(parent);
+	const struct rockchip_usb2phy_port_cfg *port_cfg;
+
+	if (phy->id == USB2PHY_PORT_OTG) {
+		port_cfg = &rphy->phy_cfg->port_cfgs[USB2PHY_PORT_OTG];
+	} else if (phy->id == USB2PHY_PORT_HOST) {
+		port_cfg = &rphy->phy_cfg->port_cfgs[USB2PHY_PORT_HOST];
+	} else {
+		dev_err(phy->dev, "phy id %lu not support", phy->id);
+		return -EINVAL;
+	}
+
+	property_enable(rphy->grf, &port_cfg->phy_sus, true);
+
+	return 0;
+}
+
+static int rockchip_usb2phy_of_xlate(struct phy *phy,
+				     struct ofnode_phandle_args *args)
+{
+	const char *dev_name = phy->dev->name;
+
+	if (!strcasecmp(dev_name, "host-port")) {
+		phy->id = USB2PHY_PORT_HOST;
+	} else if (!strcasecmp(dev_name, "otg-port")) {
+		phy->id = USB2PHY_PORT_OTG;
+	} else {
+		pr_err("%s: invalid dev name\n", __func__);
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int rockchip_usb2phy_bind(struct udevice *dev)
+{
+	struct udevice *child;
+	ofnode subnode;
+	const char *node_name;
+	int ret;
+
+	dev_for_each_subnode(subnode, dev) {
+		if (!ofnode_valid(subnode)) {
+			debug("%s: %s subnode not found", __func__, dev->name);
+			return -ENXIO;
+		}
+
+		node_name = ofnode_get_name(subnode);
+		debug("%s: subnode %s\n", __func__, node_name);
+
+		ret = device_bind_driver_to_node(dev, "rockchip_usb2phy_port",
+						 node_name, subnode, &child);
+		if (ret) {
+			pr_err("%s: '%s' cannot bind 'rockchip_usb2phy_port'\n",
+			       __func__, node_name);
+			return ret;
+		}
+	}
+
+	return 0;
+}
+
+static int rockchip_usb2phy_probe(struct udevice *dev)
+{
+	const struct rockchip_usb2phy_cfg *phy_cfgs;
+	struct rockchip_usb2phy *rphy = dev_get_priv(dev);
+	u32 reg, index;
+
+	rphy->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
+	/* get phy power reset control */
+	if (reset_get_by_name(dev, "u2phy", rphy->reset)) {
+		pr_err("can't get phy power reset for %s", dev->name);
+		return -EINVAL;
+	}
+
+	if (rphy->grf <= 0) {
+		dev_err(dev, "get syscon grf failed\n");
+		return -EINVAL;
+	}
+
+	if (ofnode_read_u32(dev_ofnode(dev), "reg", &reg)) {
+		dev_err(dev, "could not read reg\n");
+		return -EINVAL;
+	}
+
+	phy_cfgs =
+		(const struct rockchip_usb2phy_cfg *)dev_get_driver_data(dev);
+	if (!phy_cfgs) {
+		dev_err(dev, "unable to get phy_cfgs\n");
+		return -EINVAL;
+	}
+
+	/* find out a proper config which can be matched with dt. */
+	index = 0;
+	do {
+		if (phy_cfgs[index].reg == reg) {
+			rphy->phy_cfg = &phy_cfgs[index];
+			break;
+		}
+	} while (!phy_cfgs[index++].last);
+
+	if (!rphy->phy_cfg) {
+		dev_err(dev, "no phy-config can be matched\n");
+		return -EINVAL;
+	}
+
+	if (rphy->phy_cfg->phy_tuning)
+		rphy->phy_cfg->phy_tuning(rphy);
+
+	return 0;
+}
+
+static int rv1126_usb2phy_tuning(struct rockchip_usb2phy *rphy)
+{
+	return 0;
+}
+
+static struct phy_ops rockchip_usb2phy_ops = {
+	.init = rockchip_usb2phy_init,
+	.exit = rockchip_usb2phy_exit,
+	.of_xlate = rockchip_usb2phy_of_xlate,
+};
+
+static const struct rockchip_usb2phy_cfg rv1126_phy_cfgs[] = {
+	{
+		.reg		= 0xff4c0000,
+		.num_ports	= 1,
+		.phy_tuning	= rv1126_usb2phy_tuning,
+		.clkout_ctl	= { 0x10230, 14, 14, 0, 1 },
+		.port_cfgs	= {
+			[USB2PHY_PORT_OTG] = {
+				.bypass_otgsuspendm = { 0x10234, 12, 12, 0, 1 },
+				.bvalidfall_det_en = { 0x10300, 3, 3, 0, 1 },
+				.bvalidfall_det_st = { 0x10304, 3, 3, 0, 1 },
+				.bvalidfall_det_clr = { 0x10308, 3, 3, 0, 1 },
+				.bvalidrise_det_en = { 0x10300, 2, 2, 0, 1 },
+				.bvalidrise_det_st = { 0x10304, 2, 2, 0, 1 },
+				.bvalidrise_det_clr = { 0x10308, 2, 2, 0, 1 },
+				.disconfall_det_en = { 0x10300, 7, 7, 0, 1 },
+				.disconfall_det_st = { 0x10304, 7, 7, 0, 1 },
+				.disconfall_det_clr = { 0x10308, 7, 7, 0, 1 },
+				.disconrise_det_en = { 0x10300, 6, 6, 0, 1 },
+				.disconrise_det_st = { 0x10304, 6, 6, 0, 1 },
+				.disconrise_det_clr = { 0x10308, 6, 6, 0, 1 },
+				.idfall_det_en = { 0x10300, 5, 5, 0, 1 },
+				.idfall_det_st = { 0x10304, 5, 5, 0, 1 },
+				.idfall_det_clr = { 0x10308, 5, 5, 0, 1 },
+				.idpullup = { 0x10230, 11, 11, 0, 1 },
+				.idrise_det_en = { 0x10300, 4, 4, 0, 1 },
+				.idrise_det_st = { 0x10304, 4, 4, 0, 1 },
+				.idrise_det_clr = { 0x10308, 4, 4, 0, 1 },
+				.ls_det_en = { 0x10300, 0, 0, 0, 1 },
+				.ls_det_st = { 0x10304, 0, 0, 0, 1 },
+				.ls_det_clr = { 0x10308, 0, 0, 0, 1 },
+				.phy_sus = { 0x10230, 8, 0, 0x052, 0x1d9 },
+				.utmi_bvalid = { 0x10248, 9, 9, 0, 1 },
+				.utmi_iddig = { 0x10248, 6, 6, 0, 1 },
+				.utmi_hostdet = { 0x10248, 7, 7, 0, 1 },
+			}
+		},
+		.chg_det = {
+			.chg_en		= { 0x10234, 14, 14, 0, 1 },
+			.chg_rst	= { 0x10234, 15, 15, 0, 1 },
+			.chg_valid	= { 0x10248, 12, 12, 0, 1 },
+			.phy_connect	= { 0x10248, 13, 13, 0, 1 },
+		},
+	},
+	{
+		.reg		= 0xff4c8000,
+		.num_ports	= 1,
+		.phy_tuning	= rv1126_usb2phy_tuning,
+		.clkout_ctl	= { 0x10238, 9, 9, 0, 1 },
+		.port_cfgs	= {
+			[USB2PHY_PORT_HOST] = {
+				.disconfall_det_en = { 0x10300, 9, 9, 0, 1 },
+				.disconfall_det_st = { 0x10304, 9, 9, 0, 1 },
+				.disconfall_det_clr = { 0x10308, 9, 9, 0, 1 },
+				.disconrise_det_en = { 0x10300, 8, 8, 0, 1 },
+				.disconrise_det_st = { 0x10304, 8, 8, 0, 1 },
+				.disconrise_det_clr = { 0x10308, 8, 8, 0, 1 },
+				.ls_det_en = { 0x10300, 1, 1, 0, 1 },
+				.ls_det_st = { 0x10304, 1, 1, 0, 1 },
+				.ls_det_clr = { 0x10308, 1, 1, 0, 1 },
+				.phy_sus = { 0x10238, 3, 0, 0x2, 0x9 },
+				.utmi_hostdet = { 0x10248, 23, 23, 0, 1 },
+			}
+		},
+		.chg_det = {
+			.chg_en		= { 0x10238, 7, 7, 0, 1 },
+			.chg_rst	= { 0x10238, 8, 8, 0, 1 },
+			.chg_valid	= { 0x10248, 28, 28, 0, 1 },
+			.phy_connect	= { 0x10248, 29, 29, 0, 1 },
+		},
+		.last	= true,
+	},
+};
+
+static const struct udevice_id rockchip_usb2phy_ids[] = {
+	{ .compatible = "rockchip,rv1126-usb2phy", .data = (ulong)&rv1126_phy_cfgs },
+	{ }
+};
+
+U_BOOT_DRIVER(rockchip_usb2phy_port) = {
+	.name		= "rockchip_usb2phy_port",
+	.id		= UCLASS_PHY,
+	.ops		= &rockchip_usb2phy_ops,
+};
+
+U_BOOT_DRIVER(rockchip_usb2phy) = {
+	.name		= "rockchip_usb2phy",
+	.id		= UCLASS_PHY,
+	.of_match	= rockchip_usb2phy_ids,
+	.probe		= rockchip_usb2phy_probe,
+	.bind		= rockchip_usb2phy_bind,
+	.priv_auto_alloc_size = sizeof(struct rockchip_usb2phy),
+};

commit 479fbf72ee0660f74652da35a9f837b0e0ee06e8
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Apr 2 21:45:55 2020 +0800

    drivers: mmc: use pre-configure set by pre-loader or bootrom
    
    The MMC is initialized by pre-loader or bootrom, so it is no need to
    initialize it again. Open this config to skip some unused initialized
    process.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: If00fc3ce7df4d15e71ecfd8f8717a59640c3b7a9

diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 689c184256..0b3c45af56 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -386,6 +386,13 @@ config GENERIC_ATMEL_MCI
 	  the SD Memory Card Specification V2.0, the SDIO V2.0 specification
 	  and CE-ATA V1.1.
 
+config MMC_USE_PRE_CONFIG
+	bool "Enable to use pre-configure set by pre-loader or bootrom"
+	help
+	  The MMC is initialized by pre-loader or bootrom, so it is no need to
+	  initialize it again. Open this config to skip some unused initialized
+	  process.
+
 endif
 
 config TEGRA124_MMC_DISABLE_EXT_LOOPBACK
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 7bbce128e5..fdaf5a0ba3 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -386,6 +386,7 @@ static int mmc_go_idle(struct mmc *mmc)
 	return 0;
 }
 
+#ifndef CONFIG_MMC_USE_PRE_CONFIG
 static int sd_send_op_cond(struct mmc *mmc)
 {
 	int timeout = 1000;
@@ -453,6 +454,7 @@ static int sd_send_op_cond(struct mmc *mmc)
 
 	return 0;
 }
+#endif
 
 static int mmc_send_op_cond_iter(struct mmc *mmc, int use_arg)
 {
@@ -475,6 +477,7 @@ static int mmc_send_op_cond_iter(struct mmc *mmc, int use_arg)
 	return 0;
 }
 
+#ifndef CONFIG_MMC_USE_PRE_CONFIG
 static int mmc_send_op_cond(struct mmc *mmc)
 {
 	int err, i;
@@ -495,7 +498,7 @@ static int mmc_send_op_cond(struct mmc *mmc)
 	mmc->op_cond_pending = 1;
 	return 0;
 }
-
+#endif
 static int mmc_complete_op_cond(struct mmc *mmc)
 {
 	struct mmc_cmd cmd;
@@ -1553,7 +1556,7 @@ static int mmc_startup(struct mmc *mmc)
 			return err;
 	}
 #endif
-
+#ifndef CONFIG_MMC_USE_PRE_CONFIG
 	/* Put the Card in Identify Mode */
 	cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
 		MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
@@ -1585,7 +1588,7 @@ static int mmc_startup(struct mmc *mmc)
 		if (IS_SD(mmc))
 			mmc->rca = (cmd.response[0] >> 16) & 0xffff;
 	}
-
+#endif
 	/* Get the Card-Specific Data */
 	cmd.cmdidx = MMC_CMD_SEND_CSD;
 	cmd.resp_type = MMC_RSP_R2;
@@ -1924,6 +1927,7 @@ static int mmc_startup(struct mmc *mmc)
 	return 0;
 }
 
+#ifndef CONFIG_MMC_USE_PRE_CONFIG
 static int mmc_send_if_cond(struct mmc *mmc)
 {
 	struct mmc_cmd cmd;
@@ -1946,6 +1950,7 @@ static int mmc_send_if_cond(struct mmc *mmc)
 
 	return 0;
 }
+#endif
 
 #if !CONFIG_IS_ENABLED(DM_MMC)
 /* board-specific MMC power initializations. */
@@ -1954,6 +1959,7 @@ __weak void board_mmc_power_init(void)
 }
 #endif
 
+#ifndef CONFIG_MMC_USE_PRE_CONFIG
 static int mmc_power_init(struct mmc *mmc)
 {
 #if CONFIG_IS_ENABLED(DM_MMC)
@@ -1983,7 +1989,50 @@ static int mmc_power_init(struct mmc *mmc)
 #endif
 	return 0;
 }
+#endif
+#ifdef CONFIG_MMC_USE_PRE_CONFIG
+static int mmc_select_card(struct mmc *mmc, int n)
+{
+	struct mmc_cmd cmd;
+	int err = 0;
 
+	memset(&cmd, 0, sizeof(struct mmc_cmd));
+	if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
+		mmc->rca = n;
+		cmd.cmdidx = MMC_CMD_SELECT_CARD;
+		cmd.resp_type = MMC_RSP_R1;
+		cmd.cmdarg = mmc->rca << 16;
+		err = mmc_send_cmd(mmc, &cmd, NULL);
+	}
+
+	return err;
+}
+
+int mmc_start_init(struct mmc *mmc)
+{
+	/*
+	 * We use the MMC config set by the bootrom.
+	 * So it is no need to reset the eMMC device.
+	 */
+	mmc_set_bus_width(mmc, 8);
+	mmc_set_clock(mmc, 1);
+	mmc_set_timing(mmc, MMC_TIMING_LEGACY);
+	/* Send cmd7 to return stand-by state*/
+	mmc_select_card(mmc, 0);
+	mmc->version = MMC_VERSION_UNKNOWN;
+	mmc->high_capacity = 1;
+	/*
+	 * The RCA is set to 2 by rockchip bootrom, use the default
+	 * value here.
+	 */
+#ifdef CONFIG_ARCH_ROCKCHIP
+	mmc->rca = 2;
+#else
+	mmc->rca = 1;
+#endif
+	return 0;
+}
+#else
 int mmc_start_init(struct mmc *mmc)
 {
 	bool no_card;
@@ -2056,6 +2105,7 @@ int mmc_start_init(struct mmc *mmc)
 
 	return err;
 }
+#endif
 
 static int mmc_complete_init(struct mmc *mmc)
 {

commit 8794aa59681b26fac0b9ca861595f46b517b4193
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Apr 2 15:27:20 2020 +0800

    config: rv1126: add CONFIG_SPL_DTB_MINIMUM
    
    Reduce spl's dtb size.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I73def1b0e17b3b180738438b6aa1a9f1f6819f03

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index 9ca4f8e176..35a2cb76de 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -55,6 +55,7 @@ CONFIG_CMD_MTD_BLK=y
 # CONFIG_ISO_PARTITION is not set
 CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_SPL_OF_CONTROL=y
+CONFIG_SPL_DTB_MINIMUM=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_REGMAP=y

commit 4d22530ea4d0d19e9ab37d60172aadfbe9917422
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Wed Apr 1 20:07:44 2020 +0800

    clk: rockchip: rv1126: Change CPLL to 500MHz
    
    Make clk_gmac_ethernet_out2io 25MHz comes from CPLL.
    
    Change-Id: Ie7f3bf457db8f92a5d75a0e5a78e5e61ffc7b0ac
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rv1126.c b/drivers/clk/rockchip/clk_rv1126.c
index a8dfdb29b6..47e0698392 100644
--- a/drivers/clk/rockchip/clk_rv1126.c
+++ b/drivers/clk/rockchip/clk_rv1126.c
@@ -675,11 +675,11 @@ static ulong rv1126_pdbus_set_clk(struct rv1126_clk_priv *priv, ulong clk_id,
 			     (src_clk_div - 1) << ACLK_PDBUS_DIV_SHIFT);
 		break;
 	case HCLK_PDBUS:
-		src_clk_div = DIV_ROUND_UP(priv->cpll_hz, rate);
+		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);
 		assert(src_clk_div - 1 <= 31);
 		rk_clrsetreg(&cru->clksel_con[2],
 			     HCLK_PDBUS_SEL_MASK | HCLK_PDBUS_DIV_MASK,
-			     HCLK_PDBUS_SEL_CPLL << HCLK_PDBUS_SEL_SHIFT |
+			     HCLK_PDBUS_SEL_GPLL << HCLK_PDBUS_SEL_SHIFT |
 			     (src_clk_div - 1) << HCLK_PDBUS_DIV_SHIFT);
 		break;
 	case PCLK_PDBUS:

commit 68a90c3146e9ad8b113606fb76ada5f00784927e
Author: shengfei Xu <xsf@rock-chips.com>
Date:   Tue Mar 31 17:20:57 2020 +0800

    regulator: rk809/817: implement get the switch voltage
    
    If the switch is enabled, it's voltage is same as parent supply.
    
    Signed-off-by: shengfei Xu <xsf@rock-chips.com>
    Change-Id: I8fb60bd5aa3bb0a47cac84982113663e2bf5941e

diff --git a/drivers/power/regulator/rk8xx.c b/drivers/power/regulator/rk8xx.c
index 744b99ca30..73d5c09ba2 100644
--- a/drivers/power/regulator/rk8xx.c
+++ b/drivers/power/regulator/rk8xx.c
@@ -1135,6 +1135,23 @@ static int switch_get_suspend_enable(struct udevice *dev)
  */
 static int switch_get_value(struct udevice *dev)
 {
+	const char *supply_name[] = { "vcc9-supply", "vcc8-supply", };
+	struct rk8xx_priv *priv = dev_get_priv(dev->parent);
+	struct udevice *supply;
+	int id = dev->driver_data - 1;
+
+	if (!switch_get_enable(dev))
+		return 0;
+
+	/* note: rk817 only contains switch0 */
+	if ((priv->variant == RK809_ID) || (priv->variant == RK817_ID)) {
+		if (!uclass_get_device_by_phandle(UCLASS_REGULATOR,
+						  dev_get_parent(dev),
+						  supply_name[id],
+						  &supply))
+			return regulator_get_value(supply);
+	}
+
 	return 0;
 }
 

commit 5e3c2bba2c1d86bef913d431cf86317a7a47c174
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Apr 2 10:54:41 2020 +0800

    rockchip: dts: rv1126: update emmc node attributes
    
    1.support 8-bus width mode
    2.support hs200
    3.support 200MHz clock frequency
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ib51f564b0849f13e1708d5d95a48a404b9a2444c

diff --git a/arch/arm/dts/rv1126-evb.dts b/arch/arm/dts/rv1126-evb.dts
index e6ff754d1c..e64ef2de2a 100644
--- a/arch/arm/dts/rv1126-evb.dts
+++ b/arch/arm/dts/rv1126-evb.dts
@@ -34,5 +34,7 @@
 };
 
 &emmc {
+	bus-width = <8>;
+	mmc-hs200-1_8v;
 	status = "okay";
 };
diff --git a/arch/arm/dts/rv1126.dtsi b/arch/arm/dts/rv1126.dtsi
index 67e0cf1c36..3e3f7ca8c8 100644
--- a/arch/arm/dts/rv1126.dtsi
+++ b/arch/arm/dts/rv1126.dtsi
@@ -1401,7 +1401,7 @@
 			 <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
 		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
 		fifo-depth = <0x100>;
-		max-frequency = <50000000>;
+		max-frequency = <200000000>;
 		status = "disabled";
 	};
 

commit 42c5849b56ff4e3d8fac4db6e408377c1de18e4f
Merge: ac52777a44 341631cbfb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 2 09:02:11 2020 +0800

    Merge branch 'next-dev' into thunder-boot
    
    Change-Id: I83b054613effee1a89bdcbffbc68ebf37abe7a2b

commit ac52777a445b47d67d04337525f2732950de674e
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Tue Mar 31 16:09:36 2020 +0800

    rockchip: rv1126: setting noc priority
    
    1.enable all power domain.
    2.priority set to default value.
    
    Change-Id: I3ef238a7469bd8e93e643cf82daec4eaff198a73
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126.c b/arch/arm/mach-rockchip/rv1126/rv1126.c
index dce85993c1..581b15553f 100644
--- a/arch/arm/mach-rockchip/rv1126/rv1126.c
+++ b/arch/arm/mach-rockchip/rv1126/rv1126.c
@@ -12,17 +12,121 @@ DECLARE_GLOBAL_DATA_PTR;
 #define FIREWALL_APB_BASE	0xffa60000
 #define FW_DDR_CON_REG		0x80
 
+#define USB_HOST_PRIORITY_REG	0xfe810008
+#define USB_OTG_PRIORITY_REG	0xfe810088
+#define DECOM_PRIORITY_REG	0xfe820088
+#define DMA_PRIORITY_REG	0xfe820108
+#define MCU_DM_PRIORITY_REG	0xfe820188
+#define MCU_IM_PRIORITY_REG	0xfe820208
+#define A7_PRIORITY_REG		0xfe830008
+#define GMAC_PRIORITY_REG	0xfe840008
+#define NPU_PRIORITY_REG	0xfe850008
+#define EMMC_PRIORITY_REG	0xfe860008
+#define NANDC_PRIORITY_REG	0xfe860088
+#define SFC_PRIORITY_REG	0xfe860208
+#define SDMMC_PRIORITY_REG	0xfe868008
+#define SDIO_PRIORITY_REG	0xfe86c008
+#define VEPU_RD0_PRIORITY_REG	0xfe870008
+#define VEPU_RD1_PRIORITY_REG	0xfe870088
+#define VEPU_WR_PRIORITY_REG	0xfe870108
+#define ISPP_M0_PRIORITY_REG	0xfe880008
+#define ISPP_M1_PRIORITY_REG	0xfe880088
+#define ISP_PRIORITY_REG	0xfe890008
+#define CIF_LIFE_PRIORITY_REG	0xfe890088
+#define CIF_PRIORITY_REG	0xfe890108
+#define IEP_PRIORITY_REG	0xfe8a0008
+#define RGA_RD_PRIORITY_REG	0xfe8a0088
+#define RGA_WR_PRIORITY_REG	0xfe8a0108
+#define VOP_PRIORITY_REG	0xfe8a0188
+#define VDPU_PRIORITY_REG	0xfe8b0008
+#define JPEG_PRIORITY_REG	0xfe8c0008
+#define CRYPTO_PRIORITY_REG	0xfe8d0008
+
+#define PMU_BASE_ADDR		0xff3e0000
+
+#define PMU_BUS_IDLE_SFTCON(n)	(0xc0 + (n) * 4)
+#define PMU_BUS_IDLE_ACK	(0xd0)
+#define PMU_BUS_IDLE_ST		(0xd8)
+#define PMU_PWR_DWN_ST		(0x108)
+#define PMU_PWR_GATE_SFTCON	(0x110)
+
 void board_debug_uart_init(void)
 {
 
 }
 
-#if defined(CONFIG_SPL_BUILD)
 int arch_cpu_init(void)
 {
+#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
 	/* Just set region 0 to unsecure */
 	writel(0, FIREWALL_APB_BASE + FW_DDR_CON_REG);
+#endif
+
+#if !defined(CONFIG_TPL_BUILD)
+	int delay;
+
+	/* enable all pd */
+	writel(0xffff0000, PMU_BASE_ADDR + PMU_PWR_GATE_SFTCON);
+	delay = 1000;
+	do {
+		udelay(1);
+		delay--;
+		if (delay == 0)
+			break;
+	} while (readl(PMU_BASE_ADDR + PMU_PWR_DWN_ST));
+
+	/* release all idle request */
+	writel(0xffff0000, PMU_BASE_ADDR + PMU_BUS_IDLE_SFTCON(0));
+	writel(0xffff0000, PMU_BASE_ADDR + PMU_BUS_IDLE_SFTCON(1));
+
+	delay = 1000;
+	/* wait ack status */
+	do {
+		udelay(1);
+		delay--;
+		if (delay == 0)
+			break;
+	} while (readl(PMU_BASE_ADDR + PMU_BUS_IDLE_ACK));
+
+	delay = 1000;
+	/* wait idle status */
+	do {
+		udelay(1);
+		delay--;
+		if (delay == 0)
+			break;
+	} while (readl(PMU_BASE_ADDR + PMU_BUS_IDLE_ST));
+
+	writel(0x303, USB_HOST_PRIORITY_REG);
+	writel(0x303, USB_OTG_PRIORITY_REG);
+	writel(0x101, DECOM_PRIORITY_REG);
+	writel(0x303, DMA_PRIORITY_REG);
+	writel(0x101, MCU_DM_PRIORITY_REG);
+	writel(0x101, MCU_IM_PRIORITY_REG);
+	writel(0x101, A7_PRIORITY_REG);
+	writel(0x303, GMAC_PRIORITY_REG);
+	writel(0x101, NPU_PRIORITY_REG);
+	writel(0x303, EMMC_PRIORITY_REG);
+	writel(0x303, NANDC_PRIORITY_REG);
+	writel(0x303, SFC_PRIORITY_REG);
+	writel(0x303, SDMMC_PRIORITY_REG);
+	writel(0x303, SDIO_PRIORITY_REG);
+	writel(0x101, VEPU_RD0_PRIORITY_REG);
+	writel(0x101, VEPU_RD1_PRIORITY_REG);
+	writel(0x101, VEPU_WR_PRIORITY_REG);
+	writel(0x101, ISPP_M0_PRIORITY_REG);
+	writel(0x101, ISPP_M1_PRIORITY_REG);
+	writel(0x202, ISP_PRIORITY_REG);
+	writel(0x202, CIF_LIFE_PRIORITY_REG);
+	writel(0x202, CIF_PRIORITY_REG);
+	writel(0x101, IEP_PRIORITY_REG);
+	writel(0x101, RGA_RD_PRIORITY_REG);
+	writel(0x101, RGA_WR_PRIORITY_REG);
+	writel(0x202, VOP_PRIORITY_REG);
+	writel(0x101, VDPU_PRIORITY_REG);
+	writel(0x101, JPEG_PRIORITY_REG);
+	writel(0x101, CRYPTO_PRIORITY_REG);
+#endif
 
 	return 0;
 }
-#endif

commit 341631cbfb0b044f6d9e045544ef7c3125a05e0e
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Wed Apr 1 16:38:02 2020 +0800

    crypto: rockchip: v2: pka: fix bug on set np
    
    Change-Id: I2b3207dcb3ce138a8677796ae628d1f270fab621
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/drivers/crypto/rockchip/crypto_v2_pka.c b/drivers/crypto/rockchip/crypto_v2_pka.c
index 8b7535e17f..fdaf2e29aa 100644
--- a/drivers/crypto/rockchip/crypto_v2_pka.c
+++ b/drivers/crypto/rockchip/crypto_v2_pka.c
@@ -1052,7 +1052,7 @@ int rk_exptmod_np(void *m, void *e, void *n, void *np, void *d)
 	if (m_np->d)
 		error = rk_calcNp_and_initmodop((m_n)->d, /*in N*/
 						exact_size,	/*in N size*/
-						np,	/*out NP*/
+						m_np->d,	/*out NP*/
 						RK_PKA_SET_NP, /*in set NP*/
 						2,	/*in *r_t0*/
 						3,	/*in r_t1*/

commit 6b5b88bc0322ae61aa6ab38a32bc8edadca8e9a0
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Wed Apr 1 11:27:57 2020 +0800

    dm: crypto: add zero hash support
    
    Change-Id: Ib0f74e9636a214918511715cdd4ef32ebe65463a
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/drivers/crypto/crypto-uclass.c b/drivers/crypto/crypto-uclass.c
index 75b8a4c2db..c6e4c2dbdc 100644
--- a/drivers/crypto/crypto-uclass.c
+++ b/drivers/crypto/crypto-uclass.c
@@ -5,6 +5,35 @@
 
 #include <crypto.h>
 
+static const u8 null_hash_sha1_value[] = {
+	0xda, 0x39, 0xa3, 0xee, 0x5e, 0x6b, 0x4b, 0x0d,
+	0x32, 0x55, 0xbf, 0xef, 0x95, 0x60, 0x18, 0x90,
+	0xaf, 0xd8, 0x07, 0x09
+};
+
+static const u8 null_hash_md5_value[] = {
+	0xd4, 0x1d, 0x8c, 0xd9, 0x8f, 0x00, 0xb2, 0x04,
+	0xe9, 0x80, 0x09, 0x98, 0xec, 0xf8, 0x42, 0x7e
+};
+
+static const u8 null_hash_sha256_value[] = {
+	0xe3, 0xb0, 0xc4, 0x42, 0x98, 0xfc, 0x1c, 0x14,
+	0x9a, 0xfb, 0xf4, 0xc8, 0x99, 0x6f, 0xb9, 0x24,
+	0x27, 0xae, 0x41, 0xe4, 0x64, 0x9b, 0x93, 0x4c,
+	0xa4, 0x95, 0x99, 0x1b, 0x78, 0x52, 0xb8, 0x55
+};
+
+static const u8 null_hash_sha512_value[] = {
+	0xcf, 0x83, 0xe1, 0x35, 0x7e, 0xef, 0xb8, 0xbd,
+	0xf1, 0x54, 0x28, 0x50, 0xd6, 0x6d, 0x80, 0x07,
+	0xd6, 0x20, 0xe4, 0x05, 0x0b, 0x57, 0x15, 0xdc,
+	0x83, 0xf4, 0xa9, 0x21, 0xd3, 0x6c, 0xe9, 0xce,
+	0x47, 0xd0, 0xd1, 0x3c, 0x5d, 0x85, 0xf2, 0xb0,
+	0xff, 0x83, 0x18, 0xd2, 0x87, 0x7e, 0xec, 0x2f,
+	0x63, 0xb9, 0x31, 0xbd, 0x47, 0x41, 0x7a, 0x81,
+	0xa5, 0x38, 0x32, 0x7a, 0xf9, 0x27, 0xda, 0x3e
+};
+
 u32 crypto_algo_nbits(u32 algo)
 {
 	switch (algo) {
@@ -64,6 +93,9 @@ int crypto_sha_init(struct udevice *dev, sha_context *ctx)
 {
 	const struct dm_crypto_ops *ops = device_get_ops(dev);
 
+	if (ctx && !ctx->length)
+		return 0;
+
 	if (!ops || !ops->sha_init)
 		return -ENOSYS;
 
@@ -74,6 +106,9 @@ int crypto_sha_update(struct udevice *dev, u32 *input, u32 len)
 {
 	const struct dm_crypto_ops *ops = device_get_ops(dev);
 
+	if (!len)
+		return 0;
+
 	if (!ops || !ops->sha_update)
 		return -ENOSYS;
 
@@ -83,6 +118,35 @@ int crypto_sha_update(struct udevice *dev, u32 *input, u32 len)
 int crypto_sha_final(struct udevice *dev, sha_context *ctx, u8 *output)
 {
 	const struct dm_crypto_ops *ops = device_get_ops(dev);
+	const u8 *null_hash = NULL;
+	u32 hash_size = 0;
+
+	if (ctx && !ctx->length && output) {
+		switch (ctx->algo) {
+		case CRYPTO_MD5:
+			null_hash = null_hash_md5_value;
+			hash_size = sizeof(null_hash_md5_value);
+			break;
+		case CRYPTO_SHA1:
+			null_hash = null_hash_sha1_value;
+			hash_size = sizeof(null_hash_sha1_value);
+			break;
+		case CRYPTO_SHA256:
+			null_hash = null_hash_sha256_value;
+			hash_size = sizeof(null_hash_sha256_value);
+			break;
+		case CRYPTO_SHA512:
+			null_hash = null_hash_sha512_value;
+			hash_size = sizeof(null_hash_sha512_value);
+			break;
+		default:
+			return -EINVAL;
+		}
+
+		memcpy(output, null_hash, hash_size);
+
+		return 0;
+	}
 
 	if (!ops || !ops->sha_final)
 		return -ENOSYS;
diff --git a/drivers/crypto/rockchip/crypto_v2.c b/drivers/crypto/rockchip/crypto_v2.c
index 1e4af55bb7..7836bfe9cb 100644
--- a/drivers/crypto/rockchip/crypto_v2.c
+++ b/drivers/crypto/rockchip/crypto_v2.c
@@ -48,35 +48,6 @@ typedef u32 paddr_t;
 #define virt_to_phys(addr)		(((unsigned long)addr) & 0xffffffff)
 #define phys_to_virt(addr, area)	((unsigned long)addr)
 
-static const u8 null_hash_sha1_value[] = {
-	0xda, 0x39, 0xa3, 0xee, 0x5e, 0x6b, 0x4b, 0x0d,
-	0x32, 0x55, 0xbf, 0xef, 0x95, 0x60, 0x18, 0x90,
-	0xaf, 0xd8, 0x07, 0x09
-};
-
-static const u8 null_hash_md5_value[] = {
-	0xd4, 0x1d, 0x8c, 0xd9, 0x8f, 0x00, 0xb2, 0x04,
-	0xe9, 0x80, 0x09, 0x98, 0xec, 0xf8, 0x42, 0x7e
-};
-
-static const u8 null_hash_sha256_value[] = {
-	0xe3, 0xb0, 0xc4, 0x42, 0x98, 0xfc, 0x1c, 0x14,
-	0x9a, 0xfb, 0xf4, 0xc8, 0x99, 0x6f, 0xb9, 0x24,
-	0x27, 0xae, 0x41, 0xe4, 0x64, 0x9b, 0x93, 0x4c,
-	0xa4, 0x95, 0x99, 0x1b, 0x78, 0x52, 0xb8, 0x55
-};
-
-static const u8 null_hash_sha512_value[] = {
-	0xcf, 0x83, 0xe1, 0x35, 0x7e, 0xef, 0xb8, 0xbd,
-	0xf1, 0x54, 0x28, 0x50, 0xd6, 0x6d, 0x80, 0x07,
-	0xd6, 0x20, 0xe4, 0x05, 0x0b, 0x57, 0x15, 0xdc,
-	0x83, 0xf4, 0xa9, 0x21, 0xd3, 0x6c, 0xe9, 0xce,
-	0x47, 0xd0, 0xd1, 0x3c, 0x5d, 0x85, 0xf2, 0xb0,
-	0xff, 0x83, 0x18, 0xd2, 0x87, 0x7e, 0xec, 0x2f,
-	0x63, 0xb9, 0x31, 0xbd, 0x47, 0x41, 0x7a, 0x81,
-	0xa5, 0x38, 0x32, 0x7a, 0xf9, 0x27, 0xda, 0x3e
-};
-
 fdt_addr_t crypto_base;
 
 static void word2byte(u32 word, u8 *ch, u32 endian)
@@ -175,22 +146,18 @@ int rk_hash_init(void *hw_ctx, u32 algo, u32 length)
 	case CRYPTO_MD5:
 		reg_ctrl |= CRYPTO_MODE_MD5;
 		tmp_ctx->digest_size = 16;
-		tmp_ctx->null_hash = null_hash_md5_value;
 		break;
 	case CRYPTO_SHA1:
 		reg_ctrl |= CRYPTO_MODE_SHA1;
 		tmp_ctx->digest_size = 20;
-		tmp_ctx->null_hash = null_hash_sha1_value;
 		break;
 	case CRYPTO_SHA256:
 		reg_ctrl |= CRYPTO_MODE_SHA256;
 		tmp_ctx->digest_size = 32;
-		tmp_ctx->null_hash = null_hash_sha256_value;
 		break;
 	case CRYPTO_SHA512:
 		reg_ctrl |= CRYPTO_MODE_SHA512;
 		tmp_ctx->digest_size = 64;
-		tmp_ctx->null_hash = null_hash_sha512_value;
 		break;
 
 	default:
diff --git a/include/rockchip/crypto_v2.h b/include/rockchip/crypto_v2.h
index 41d9720040..db37b4c748 100644
--- a/include/rockchip/crypto_v2.h
+++ b/include/rockchip/crypto_v2.h
@@ -581,7 +581,6 @@ struct crypto_lli_desc {
 
 struct rk_hash_ctx {
 	struct crypto_lli_desc data_lli;/* lli desc */
-	const	u8 *null_hash;		/* when length is zero */
 	void	*cache;			/* virt addr for hash src data*/
 	u32	cache_size;		/* data in cached size */
 	u32	left_len;		/* left data to calc */

commit 92a42bc5fecfd4f2d8fba481875cd648d7428ec6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Apr 1 10:29:02 2020 +0800

    common: image-fit: support hardware crypto hash
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I2117282d9bece0fbf61802b36771fc0d1b909058

diff --git a/common/image-fit.c b/common/image-fit.c
index 1834950505..101b3f02df 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -20,6 +20,8 @@
 #include <mapmem.h>
 #include <asm/io.h>
 #include <malloc.h>
+#include <crypto.h>
+
 DECLARE_GLOBAL_DATA_PTR;
 #endif /* !USE_HOSTCC*/
 
@@ -1086,8 +1088,9 @@ int fit_set_timestamp(void *fit, int noffset, time_t timestamp)
  *     0, on success
  *    -1, when algo is unsupported
  */
-int calculate_hash(const void *data, int data_len, const char *algo,
-			uint8_t *value, int *value_len)
+int calculate_hash_software(const void *data, int data_len,
+			    const char *algo, uint8_t *value,
+			    int *value_len)
 {
 	if (IMAGE_ENABLE_CRC32 && strcmp(algo, "crc32") == 0) {
 		*((uint32_t *)value) = crc32_wd(0, data, data_len,
@@ -1112,6 +1115,63 @@ int calculate_hash(const void *data, int data_len, const char *algo,
 	return 0;
 }
 
+#ifdef USE_HOSTCC
+int calculate_hash(const void *data, int data_len, const char *algo,
+		   uint8_t *value, int *value_len)
+{
+	return calculate_hash_software(data, data_len, algo, value, value_len);
+}
+#else
+#if CONFIG_IS_ENABLED(FIT_HW_CRYPTO)
+static int crypto_csum(u32 cap, const char *data, int len, u8 *output)
+{
+	struct udevice *dev;
+	sha_context csha_ctx;
+
+	dev = crypto_get_device(cap);
+	if (!dev) {
+		printf("Can't find expected crypto device\n");
+		return -ENODEV;
+	}
+
+	csha_ctx.algo = cap;
+	csha_ctx.length = len;
+
+	return crypto_sha_csum(dev, &csha_ctx, (char *)data, len, output);
+}
+
+int calculate_hash(const void *data, int data_len, const char *algo,
+		   uint8_t *value, int *value_len)
+{
+	if (IMAGE_ENABLE_CRC32 && strcmp(algo, "crc32") == 0) {
+		*((uint32_t *)value) = crc32_wd(0, data, data_len,
+							CHUNKSZ_CRC32);
+		*((uint32_t *)value) = cpu_to_uimage(*((uint32_t *)value));
+		*value_len = 4;
+	} else if (IMAGE_ENABLE_SHA1 && strcmp(algo, "sha1") == 0) {
+		crypto_csum(CRYPTO_SHA1, data, data_len, value);
+		*value_len = 20;
+	} else if (IMAGE_ENABLE_SHA256 && strcmp(algo, "sha256") == 0) {
+		crypto_csum(CRYPTO_SHA256, data, data_len, value);
+		*value_len = SHA256_SUM_LEN;
+	} else if (IMAGE_ENABLE_MD5 && strcmp(algo, "md5") == 0) {
+		crypto_csum(CRYPTO_MD5, data, data_len, value);
+		*value_len = 16;
+	} else {
+		debug("Unsupported hash alogrithm\n");
+		return -1;
+	}
+	return 0;
+}
+#else
+int calculate_hash(const void *data, int data_len, const char *algo,
+		   uint8_t *value, int *value_len)
+{
+	return calculate_hash_software(data, data_len, algo, value, value_len);
+}
+#endif
+#endif
+
 static int fit_image_check_hash(const void *fit, int noffset, const void *data,
 				size_t size, char **err_msgp)
 {

commit d07cb2b8b1a3e78e998073e7d90e03a231185b50
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Apr 1 09:36:56 2020 +0800

    common: board_r: add ENV_MEM_LAYOUT_SETTINGS1 into mininum env
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I865256861668c424806a83d9327b662e480ad737

diff --git a/common/board_r.c b/common/board_r.c
index e9d65fb3e3..878b0fe1c6 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -512,6 +512,9 @@ static int initr_env_nowhere(void)
 #else
 	const char env_minimum[] = {
 		ENV_MEM_LAYOUT_SETTINGS
+#ifdef ENV_MEM_LAYOUT_SETTINGS1
+		ENV_MEM_LAYOUT_SETTINGS1
+#endif
 #ifdef RKIMG_DET_BOOTDEV
 		RKIMG_DET_BOOTDEV
 #endif

commit 242e56fad28ae590134c1640ec8de483a9f176a0
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 31 18:31:22 2020 +0800

    lib: rsa: fix compile warning
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I75acadbb4fe6873c7306bd953234c1fb4ef5b0d9

diff --git a/lib/rsa/rsa-sign.c b/lib/rsa/rsa-sign.c
index bdfc2f1521..2ad207b713 100644
--- a/lib/rsa/rsa-sign.c
+++ b/lib/rsa/rsa-sign.c
@@ -388,7 +388,7 @@ static void rsa_engine_remove(ENGINE *e)
  * key to sign current fit image. Then we replace the signature in fit image
  * with a valid one.
  */
-static void gen_data2sign(const struct image_region region[], int region_count)
+static int gen_data2sign(const struct image_region region[], int region_count)
 {
 	char *file = "data2sign.bin";
 	FILE *fd;
@@ -405,6 +405,8 @@ static void gen_data2sign(const struct image_region region[], int region_count)
 		fwrite(region[i].data, region[i].size, 1, fd);
 
 	fclose(fd);
+
+	return 0;
 }
 
 static int rsa_sign_with_key(RSA *rsa, struct checksum_algo *checksum_algo,

commit 51cb481c1caaaf807c866f6cf6b785c07b8e36aa
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Apr 1 17:23:46 2020 +0800

    rockchip: make_fit_optee: correct UBOOT_BASE address set
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I0172633f48f50e07799155a1a8fa353755917de6

diff --git a/arch/arm/mach-rockchip/make_fit_optee.sh b/arch/arm/mach-rockchip/make_fit_optee.sh
index 94dd87f54f..a0aa9251f9 100755
--- a/arch/arm/mach-rockchip/make_fit_optee.sh
+++ b/arch/arm/mach-rockchip/make_fit_optee.sh
@@ -25,10 +25,8 @@ EOF
 
 OUTDIR=$PWD
 DARM_BASE=`sed -n "/CONFIG_SYS_SDRAM_BASE=/s/CONFIG_SYS_SDRAM_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
-UBOOT_OFFSET=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
-UBOOT_BASE=$((DARM_BASE+UBOOT_OFFSET))
-UBOOT_BASE=$(echo "obase=16;${UBOOT_BASE}"|bc)
-echo "			load = <0x"$UBOOT_BASE">;"
+UBOOT_BASE=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
+echo "			load = <"$UBOOT_BASE">;"
 cat << EOF
 			hash@1 {
 				algo = "sha256";

commit d4c8c99603529123906c38130cdff23e37312da6
Merge: f0e7263846 3301aa1a14
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 31 18:25:21 2020 +0800

    Merge branch 'next-dev' into thunder-boot

commit 3301aa1a14d90d7ce0b25aeac8abc03fb0311a1d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 31 16:06:03 2020 +0800

    scripts: add a script to resign the image
    
    Usage:
            scripts/fit-resign.sh [signed fit image] [new signature]
    
    It replaces the /configurations/conf@1/signature@1/value.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I73ff5ec9a625a87ef91f29773ad241f833ef1758

diff --git a/scripts/fit-resign.sh b/scripts/fit-resign.sh
new file mode 100755
index 0000000000..d4b6693297
--- /dev/null
+++ b/scripts/fit-resign.sh
@@ -0,0 +1,47 @@
+#!/bin/bash
+#
+# Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd
+# SPDX-License-Identifier: GPL-2.0
+#
+set -e
+
+FIT_IMG=$1
+FIT_SIG=$2
+
+if [ $# -ne 2 ]; then
+	echo "Usage: $0 [signed fit image] [new signature]"
+	exit
+elif [ ! -f $FIT_IMG ]; then
+	echo "ERROR: No $FIT_IMG"
+	exit
+elif [ ! -f $FIT_SIG ]; then
+	echo "ERROR: No $FIT_SIG"
+	exit
+fi
+
+SIG_SZ=`ls -l ${FIT_SIG} | awk '{ print $5 }'`
+LEN=`./tools/fit_info -f $FIT_IMG -n /configurations/conf@1/signature@1 -p value | sed -n "/LEN:/p" | awk '{ print $2 }'`
+OFF=`./tools/fit_info -f $FIT_IMG -n /configurations/conf@1/signature@1 -p value | sed -n "/OFF:/p" | awk '{ print $2 }'`
+END=`./tools/fit_info -f $FIT_IMG -n /configurations/conf@1/signature@1 -p value | sed -n "/END:/p" | awk '{ print $2 }'`
+
+if [ -z $LEN ]; then
+	echo "ERROR: No valid signature in $FIT_IMG"
+	exit
+elif [ "$SIG_SZ" -ne "$LEN" ]; then
+	echo "ERROR: $FIT_SIG size $SIG_SZ != $FIT_IMG Signature size $LEN"
+	exit
+fi
+
+dd if=$FIT_IMG of=$FIT_IMG.part1 count=1 bs=$OFF
+dd if=$FIT_IMG of=$FIT_IMG.part2 skip=1 ibs=$END
+
+cat $FIT_IMG.part1  >  $FIT_IMG.resig
+cat $FIT_SIG        >> $FIT_IMG.resig
+cat $FIT_IMG.part2  >> $FIT_IMG.resig
+
+rm $FIT_IMG.part1 && $FIT_IMG.part2
+
+echo
+echo "Re-signed fit image is OK: $FIT_IMG.resig"
+echo
+

commit d46373c14f91f281057ab95cc38fd374f4acc780
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 31 15:41:59 2020 +0800

    lib: rsa: generate data to be signed
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I125f61051c9c9604903603ef06cd7f368b48f3d8

diff --git a/lib/rsa/rsa-sign.c b/lib/rsa/rsa-sign.c
index c9b240e16c..bdfc2f1521 100644
--- a/lib/rsa/rsa-sign.c
+++ b/lib/rsa/rsa-sign.c
@@ -383,6 +383,30 @@ static void rsa_engine_remove(ENGINE *e)
 	}
 }
 
+/*
+ * With this data2sign.bin, we can provide it to who real holds the RAS-private
+ * key to sign current fit image. Then we replace the signature in fit image
+ * with a valid one.
+ */
+static void gen_data2sign(const struct image_region region[], int region_count)
+{
+	char *file = "data2sign.bin";
+	FILE *fd;
+	int i;
+
+	fd = fopen(file, "wb");
+	if (!fd) {
+		fprintf(stderr, "Failed to create %s: %s\n",
+			file, strerror(errno));
+		return -ENOENT;
+	}
+
+	for (i = 0; i < region_count; i++)
+		fwrite(region[i].data, region[i].size, 1, fd);
+
+	fclose(fd);
+}
+
 static int rsa_sign_with_key(RSA *rsa, struct checksum_algo *checksum_algo,
 		const struct image_region region[], int region_count,
 		uint8_t **sigp, uint *sig_size)
@@ -445,6 +469,8 @@ static int rsa_sign_with_key(RSA *rsa, struct checksum_algo *checksum_algo,
 	*sigp = sig;
 	*sig_size = size;
 
+	gen_data2sign(region, region_count);
+
 	return 0;
 
 err_sign:

commit cdd8fbe39efdfb18aa05f2f53d0e8888055a8956
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 31 15:35:53 2020 +0800

    tools: fit_info: add END address of property
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Icf988f3620d261f7742ee3db4e427e1783211f13

diff --git a/tools/fit_info.c b/tools/fit_info.c
index 652abcd2bd..82a1a9f4c4 100644
--- a/tools/fit_info.c
+++ b/tools/fit_info.c
@@ -102,6 +102,7 @@ int main(int argc, char **argv)
 	printf("NAME: %s\n", fit_get_name(fit_blob, nodeoffset, NULL));
 	printf("LEN: %d\n", len);
 	printf("OFF: %d\n", (int)(nodep - fit_blob));
+	printf("END: %d\n", (int)(nodep + len - fit_blob));
 	(void) munmap((void *)fit_blob, fsbuf.st_size);
 
 	close(ffd);

commit f0e72638461ff139e795228388be6b07ed3dae89
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 31 17:47:07 2020 +0800

    configs: rv1126: support bring up uncompressed kernel
    
    Image file is: boot.img.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I2d3548e8cd3c98487094a23e454b8c773fa23cc2

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index f4ea6967c5..9ca4f8e176 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -18,6 +18,7 @@ CONFIG_BOOTDELAY=0
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
+# CONFIG_SKIP_RELOCATE_UBOOT is not set
 CONFIG_SPL_BOARD_INIT=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set

commit d499d466a1c3534d42153f5d57f5b9ffe7466587
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Mon Mar 30 14:33:41 2020 +0800

    pinctrl: rockchip: fix rv1126 iomux
    
    Change-Id: I2b6f129adadc26e9ccb53eb23edd816b599ef3ab
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 1c6798a078..95443460fe 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -8,9 +8,11 @@
 #include <dm.h>
 #include <dm/pinctrl.h>
 #include <dm/ofnode.h>
+#include <linux/bitops.h>
 #include <regmap.h>
 #include <syscon.h>
 #include <asm/arch/cpu.h>
+#include <dt-bindings/pinctrl/rockchip.h>
 
 #define MAX_ROCKCHIP_GPIO_PER_BANK	32
 #define RK_FUNC_GPIO			0
@@ -31,6 +33,9 @@ enum rockchip_pinctrl_type {
 	RK3399,
 };
 
+#define RK_GENMASK_VAL(h, l, v) \
+	(GENMASK((h) + 16, (l) + 16) | ((v) & GENMASK(h, l)) << (h))
+
 /**
  * Encode variants of iomux registers into a type variable
  */
@@ -145,6 +150,21 @@ struct rockchip_pin_bank {
 		},							\
 	}
 
+#define PIN_BANK_IOMUX_FLAGS_OFFSET(id, pins, label, iom0, iom1, iom2,	\
+				    iom3, offset0, offset1, offset2,	\
+				    offset3)				\
+	{								\
+		.bank_num	= id,					\
+		.nr_pins	= pins,					\
+		.name		= label,				\
+		.iomux		= {					\
+			{ .type = iom0, .offset = offset0 },		\
+			{ .type = iom1, .offset = offset1 },		\
+			{ .type = iom2, .offset = offset2 },		\
+			{ .type = iom3, .offset = offset3 },		\
+		},							\
+	}
+
 #define PIN_BANK_DRV_FLAGS(id, pins, label, type0, type1, type2, type3) \
 	{								\
 		.bank_num	= id,					\
@@ -265,6 +285,15 @@ struct rockchip_pin_bank {
 		.pull_type[3] = pull3,					\
 	}
 
+#define PIN_BANK_MUX_ROUTE_FLAGS(ID, PIN, FUNC, REG, VAL)	\
+	{								\
+		.bank_num	= ID,					\
+		.pin		= PIN,					\
+		.func		= FUNC,				\
+		.route_offset	= REG,				\
+		.route_val	= VAL,				\
+	}
+
 /**
  * struct rockchip_mux_recalced_data: represent a pin iomux data.
  * @num: bank number.
@@ -669,6 +698,72 @@ static struct rockchip_mux_recalced_data rk3328_mux_recalced_data[] = {
 	},
 };
 
+static struct rockchip_mux_route_data rv1126_mux_route_data[] = {
+	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO3, RK_PD2, RK_FUNC_1, 0x10260, RK_GENMASK_VAL(0, 0, 0)), /* I2S0_MCLK_M0 */
+	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO3, RK_PB0, RK_FUNC_3, 0x10260, RK_GENMASK_VAL(0, 0, 1)), /* I2S0_MCLK_M1 */
+
+	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO0, RK_PD4, RK_FUNC_4, 0x10260, RK_GENMASK_VAL(2, 3, 0)), /* I2S1_MCLK_M0 */
+	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO1, RK_PD5, RK_FUNC_2, 0x10260, RK_GENMASK_VAL(2, 3, 1)), /* I2S1_MCLK_M1 */
+	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO2, RK_PC7, RK_FUNC_6, 0x10260, RK_GENMASK_VAL(2, 3, 2)), /* I2S1_MCLK_M2 */
+
+	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO1, RK_PD0, RK_FUNC_1, 0x10260, RK_GENMASK_VAL(4, 4, 0)), /* I2S2_MCLK_M0 */
+	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO2, RK_PB3, RK_FUNC_2, 0x10260, RK_GENMASK_VAL(4, 4, 1)), /* I2S2_MCLK_M1 */
+
+	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO3, RK_PD4, RK_FUNC_2, 0x10260, RK_GENMASK_VAL(12, 12, 0)), /* PDM_CLK0_M0 */
+	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO3, RK_PC0, RK_FUNC_3, 0x10260, RK_GENMASK_VAL(12, 12, 1)), /* PDM_CLK0_M1 */
+
+	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO3, RK_PC6, RK_FUNC_1, 0x10264, RK_GENMASK_VAL(0, 0, 0)), /* CIF_CLKOUT_M0 */
+	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO2, RK_PD1, RK_FUNC_3, 0x10264, RK_GENMASK_VAL(0, 0, 1)), /* CIF_CLKOUT_M1 */
+
+	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO3, RK_PA4, RK_FUNC_5, 0x10264, RK_GENMASK_VAL(4, 5, 0)), /* I2C3_SCL_M0 */
+	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO2, RK_PD4, RK_FUNC_7, 0x10264, RK_GENMASK_VAL(4, 5, 1)), /* I2C3_SCL_M1 */
+	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO1, RK_PD6, RK_FUNC_3, 0x10264, RK_GENMASK_VAL(4, 5, 2)), /* I2C3_SCL_M2 */
+
+	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO3, RK_PA0, RK_FUNC_7, 0x10264, RK_GENMASK_VAL(6, 6, 0)), /* I2C4_SCL_M0 */
+	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO4, RK_PA0, RK_FUNC_4, 0x10264, RK_GENMASK_VAL(6, 6, 1)), /* I2C4_SCL_M1 */
+
+	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO2, RK_PA5, RK_FUNC_7, 0x10264, RK_GENMASK_VAL(8, 9, 0)), /* I2C5_SCL_M0 */
+	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO3, RK_PB0, RK_FUNC_5, 0x10264, RK_GENMASK_VAL(8, 9, 1)), /* I2C5_SCL_M1 */
+	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO1, RK_PD0, RK_FUNC_4, 0x10264, RK_GENMASK_VAL(8, 9, 2)), /* I2C5_SCL_M2 */
+
+	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO3, RK_PC0, RK_FUNC_5, 0x10264, RK_GENMASK_VAL(10, 11, 0)), /* SPI1_CLK_M0 */
+	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO1, RK_PC6, RK_FUNC_3, 0x10264, RK_GENMASK_VAL(10, 11, 1)), /* SPI1_CLK_M1 */
+	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO2, RK_PD5, RK_FUNC_6, 0x10264, RK_GENMASK_VAL(10, 11, 2)), /* SPI1_CLK_M2 */
+
+	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO3, RK_PC0, RK_FUNC_2, 0x10264, RK_GENMASK_VAL(12, 12, 0)), /* RGMII_CLK_M0 */
+	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO2, RK_PB7, RK_FUNC_2, 0x10264, RK_GENMASK_VAL(12, 12, 1)), /* RGMII_CLK_M1 */
+
+	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO3, RK_PA1, RK_FUNC_3, 0x10264, RK_GENMASK_VAL(13, 13, 0)), /* CAN_TXD_M0 */
+	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO3, RK_PA7, RK_FUNC_5, 0x10264, RK_GENMASK_VAL(13, 13, 1)), /* CAN_TXD_M1 */
+
+	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO3, RK_PA4, RK_FUNC_6, 0x10268, RK_GENMASK_VAL(0, 0, 0)), /* PWM8_M0 */
+	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO2, RK_PD7, RK_FUNC_5, 0x10268, RK_GENMASK_VAL(0, 0, 1)), /* PWM8_M1 */
+
+	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO3, RK_PA5, RK_FUNC_6, 0x10268, RK_GENMASK_VAL(2, 2, 0)), /* PWM9_M0 */
+	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO2, RK_PD6, RK_FUNC_5, 0x10268, RK_GENMASK_VAL(2, 2, 1)), /* PWM9_M1 */
+
+	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO3, RK_PA6, RK_FUNC_6, 0x10268, RK_GENMASK_VAL(4, 4, 0)), /* PWM10_M0 */
+	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO2, RK_PD5, RK_FUNC_5, 0x10268, RK_GENMASK_VAL(4, 4, 1)), /* PWM10_M1 */
+
+	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO3, RK_PA7, RK_FUNC_6, 0x10268, RK_GENMASK_VAL(6, 6, 0)), /* PWM11_IR_M0 */
+	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO3, RK_PA1, RK_FUNC_5, 0x10268, RK_GENMASK_VAL(6, 6, 1)), /* PWM11_IR_M1 */
+
+	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO1, RK_PA5, RK_FUNC_3, 0x10268, RK_GENMASK_VAL(8, 8, 0)), /* UART2_TX_M0 */
+	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO3, RK_PA2, RK_FUNC_1, 0x10268, RK_GENMASK_VAL(8, 8, 1)), /* UART2_TX_M1 */
+
+	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO3, RK_PC6, RK_FUNC_3, 0x10268, RK_GENMASK_VAL(10, 11, 0)), /* UART3_TX_M0 */
+	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO1, RK_PA7, RK_FUNC_2, 0x10268, RK_GENMASK_VAL(10, 11, 1)), /* UART3_TX_M1 */
+	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO3, RK_PA0, RK_FUNC_4, 0x10268, RK_GENMASK_VAL(10, 11, 2)), /* UART3_TX_M2 */
+
+	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO3, RK_PA4, RK_FUNC_4, 0x10268, RK_GENMASK_VAL(12, 13, 0)), /* UART4_TX_M0 */
+	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO2, RK_PA6, RK_FUNC_4, 0x10268, RK_GENMASK_VAL(12, 13, 1)), /* UART4_TX_M1 */
+	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO1, RK_PD5, RK_FUNC_3, 0x10268, RK_GENMASK_VAL(12, 13, 2)), /* UART4_TX_M2 */
+
+	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO3, RK_PA6, RK_FUNC_4, 0x10268, RK_GENMASK_VAL(14, 15, 0)), /* UART5_TX_M0 */
+	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO2, RK_PB0, RK_FUNC_4, 0x10268, RK_GENMASK_VAL(14, 15, 1)), /* UART5_TX_M1 */
+	PIN_BANK_MUX_ROUTE_FLAGS(RK_GPIO2, RK_PA0, RK_FUNC_3, 0x10268, RK_GENMASK_VAL(14, 15, 2)), /* UART5_TX_M2 */
+};
+
 static void rockchip_get_recalced_mux(struct rockchip_pin_bank *bank, int pin,
 				      int *reg, u8 *bit, int *mask)
 {
@@ -1798,7 +1893,7 @@ static void rv1126_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
 	} else {
 		*reg = RV1126_PULL_GRF_GPIO1A0_OFFSET;
 		*regmap = priv->regmap_base;
-		*reg += bank->bank_num * RV1126_PULL_BANK_STRIDE;
+		*reg += (bank->bank_num - 1) * RV1126_PULL_BANK_STRIDE;
 	}
 
 	*reg += ((pin_num / RV1126_PULL_PINS_PER_REG) * 4);
@@ -1824,6 +1919,7 @@ static void rv1126_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
 			*regmap = priv->regmap_base;
 			*reg = RV1126_DRV_GRF_GPIO1A0_OFFSET;
 			*reg -= (((31 - pin_num) / RV1126_DRV_PINS_PER_REG + 1) * 4);
+			*reg -= 0x4;
 			*bit = pin_num % RV1126_DRV_PINS_PER_REG;
 			*bit *= RV1126_DRV_BITS_PER_PIN;
 			return;
@@ -1833,7 +1929,7 @@ static void rv1126_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
 	} else {
 		*regmap = priv->regmap_base;
 		*reg = RV1126_DRV_GRF_GPIO1A0_OFFSET;
-		*reg += bank->bank_num * RV1126_DRV_BANK_STRIDE;
+		*reg += (bank->bank_num - 1) * RV1126_DRV_BANK_STRIDE;
 	}
 
 	*reg += ((pin_num / RV1126_DRV_PINS_PER_REG) * 4);
@@ -1870,7 +1966,7 @@ static int rv1126_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank,
 		*regmap = priv->regmap_base;
 		*reg = RV1126_SCHMITT_GRF_GPIO1A0_OFFSET;
 		pins_per_reg = RV1126_SCHMITT_PINS_PER_GRF_REG;
-		*reg += bank->bank_num * RV1126_SCHMITT_BANK_STRIDE;
+		*reg += (bank->bank_num - 1) * RV1126_SCHMITT_BANK_STRIDE;
 	}
 	*reg += ((pin_num / pins_per_reg) * 4);
 	*bit = pin_num % pins_per_reg;
@@ -2322,6 +2418,11 @@ static int rockchip_set_drive_perpin(struct rockchip_pin_bank *bank,
 	      pin_num, strength);
 
 	ctrl->drv_calc_reg(bank, pin_num, &regmap, &reg, &bit);
+	if (ctrl->type == RV1126) {
+		rmask_bits = RV1126_DRV_BITS_PER_PIN;
+		ret = strength;
+		goto config;
+	}
 
 	ret = -EINVAL;
 	for (i = 0; i < ARRAY_SIZE(rockchip_perpin_drv_list[drv_type]); i++) {
@@ -2388,6 +2489,7 @@ static int rockchip_set_drive_perpin(struct rockchip_pin_bank *bank,
 		return -EINVAL;
 	}
 
+config:
 	if (bank->drv[pin_num / 8].drv_type & DRV_TYPE_WRITABLE_32BIT) {
 		regmap_read(regmap, reg, &data);
 		data &= ~(((1 << rmask_bits) - 1) << bit);
@@ -2865,12 +2967,13 @@ static struct rockchip_pin_ctrl *rockchip_pinctrl_get_soc_data(struct udevice *d
 
 			/* preset iomux offset value, set new start value */
 			if (iom->offset >= 0) {
-				if (iom->type & IOMUX_SOURCE_PMU)
+				if ((iom->type & IOMUX_SOURCE_PMU) || (iom->type & IOMUX_L_SOURCE_PMU))
 					pmu_offs = iom->offset;
 				else
 					grf_offs = iom->offset;
 			} else { /* set current iomux offset */
-				iom->offset = (iom->type & IOMUX_SOURCE_PMU) ?
+				iom->offset = ((iom->type & IOMUX_SOURCE_PMU) ||
+					       (iom->type & IOMUX_L_SOURCE_PMU)) ?
 							pmu_offs : grf_offs;
 			}
 
@@ -2895,7 +2998,7 @@ static struct rockchip_pin_ctrl *rockchip_pinctrl_get_soc_data(struct udevice *d
 			inc = (iom->type & (IOMUX_WIDTH_4BIT |
 					    IOMUX_WIDTH_3BIT |
 					    IOMUX_8WIDTH_2BIT)) ? 8 : 4;
-			if (iom->type & IOMUX_SOURCE_PMU)
+			if ((iom->type & IOMUX_SOURCE_PMU) || (iom->type & IOMUX_L_SOURCE_PMU))
 				pmu_offs += inc;
 			else
 				grf_offs += inc;
@@ -3106,11 +3209,12 @@ static struct rockchip_pin_bank rv1126_pin_banks[] = {
 			     IOMUX_WIDTH_4BIT | IOMUX_SOURCE_PMU,
 			     IOMUX_WIDTH_4BIT | IOMUX_L_SOURCE_PMU,
 			     IOMUX_WIDTH_4BIT),
-	PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1",
+	PIN_BANK_IOMUX_FLAGS_OFFSET(1, 32, "gpio1",
 			     IOMUX_WIDTH_4BIT,
 			     IOMUX_WIDTH_4BIT,
 			     IOMUX_WIDTH_4BIT,
-			     IOMUX_WIDTH_4BIT),
+			     IOMUX_WIDTH_4BIT,
+			     0x10010, 0x10018, 0x10020, 0x10028),
 	PIN_BANK_IOMUX_FLAGS(2, 32, "gpio2",
 			     IOMUX_WIDTH_4BIT,
 			     IOMUX_WIDTH_4BIT,
@@ -3132,6 +3236,8 @@ static struct rockchip_pin_ctrl rv1126_pin_ctrl = {
 	.type			= RV1126,
 	.grf_mux_offset		= 0x10004, /* mux offset from GPIO0_D0 */
 	.pmu_mux_offset		= 0x0,
+	.iomux_routes		= rv1126_mux_route_data,
+	.niomux_routes		= ARRAY_SIZE(rv1126_mux_route_data),
 	.iomux_recalced		= rv1126_mux_recalced_data,
 	.niomux_recalced	= ARRAY_SIZE(rv1126_mux_recalced_data),
 	.pull_calc_reg		= rv1126_calc_pull_reg_and_bit,

commit 7c6bc8e3ac1ccd0cd1f265beb8a05553e39f2c89
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Tue Mar 31 09:51:49 2020 +0800

    crypto: rockchip: v2: add rv1126 support
    
    Change-Id: Ic7eab78341dd10bddd95489832ac967c1e473bcd
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/drivers/crypto/rockchip/crypto_v2.c b/drivers/crypto/rockchip/crypto_v2.c
index 1e4af55bb7..5040ed0a43 100644
--- a/drivers/crypto/rockchip/crypto_v2.c
+++ b/drivers/crypto/rockchip/crypto_v2.c
@@ -756,6 +756,7 @@ static const struct udevice_id rockchip_crypto_ids[] = {
 	{ .compatible = "rockchip,px30-crypto" },
 	{ .compatible = "rockchip,rk1808-crypto" },
 	{ .compatible = "rockchip,rk3308-crypto" },
+	{ .compatible = "rockchip,rv1126-crypto" },
 	{ }
 };
 

commit e51daf5c71f407be74ee69a35b3fd126a8c03837
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Tue Mar 31 09:09:01 2020 +0800

    configs: rv1126: enable crypto v2
    
    Change-Id: I17c148e0d74e8e8fbc519ce97aa3a632b835e67a
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index 19fbb1b289..f4ea6967c5 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -62,6 +62,8 @@ CONFIG_SYSCON=y
 CONFIG_SPL_SYSCON=y
 CONFIG_CLK=y
 CONFIG_SPL_CLK=y
+CONFIG_DM_CRYPTO=y
+CONFIG_ROCKCHIP_CRYPTO_V2=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y

commit 49c0da79ed8df71f5574567454ad1d813d8c88d2
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Tue Mar 31 09:06:11 2020 +0800

    rockchip: dts: rv1126: add and enable crypto node
    
    Change-Id: I4419ad1d1b3671381e5aa2fa5c53e5a14b622049
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/arch/arm/dts/rv1126-u-boot.dtsi b/arch/arm/dts/rv1126-u-boot.dtsi
index e3300fce52..6d9708e51f 100644
--- a/arch/arm/dts/rv1126-u-boot.dtsi
+++ b/arch/arm/dts/rv1126-u-boot.dtsi
@@ -45,6 +45,11 @@
 	u-boot,dm-spl;
 };
 
+&crypto {
+	u-boot,dm-spl;
+	status = "okay";
+};
+
 &grf {
 	u-boot,dm-spl;
 };
diff --git a/arch/arm/dts/rv1126.dtsi b/arch/arm/dts/rv1126.dtsi
index 1adbb55289..67e0cf1c36 100644
--- a/arch/arm/dts/rv1126.dtsi
+++ b/arch/arm/dts/rv1126.dtsi
@@ -739,6 +739,15 @@
 		status = "disabled";
 	};
 
+	crypto: crypto@ff500000 {
+		compatible = "rockchip,rv1126-crypto";
+		reg = <0xff500000 0x10000>;
+		clock-names = "sclk_crypto", "sclk_crypto_apk";
+		clocks = <&cru CLK_CRYPTO_CORE>, <&cru CLK_CRYPTO_PKA>;
+		clock-frequency = <200000000>, <300000000>;
+		status = "disabled";
+	};
+
 	i2c1: i2c@ff510000 {
 		compatible = "rockchip,rv1126-i2c", "rockchip,rk3399-i2c";
 		reg = <0xff510000 0x1000>;

commit ca31fc841ef5c921d175d9c70e54f23fd4183db5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 31 09:45:02 2020 +0800

    rockchip: rv1126: add clk_rv1126.c into compile
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Icbe84654205d7d0fd68cc9c4e7f25dfaa3516127

diff --git a/arch/arm/mach-rockchip/rv1126/Makefile b/arch/arm/mach-rockchip/rv1126/Makefile
index 41cacf1c24..9a6e80b295 100644
--- a/arch/arm/mach-rockchip/rv1126/Makefile
+++ b/arch/arm/mach-rockchip/rv1126/Makefile
@@ -5,4 +5,5 @@
 #
 
 obj-y += syscon_rv1126.o
+obj-y += clk_rv1126.o
 obj-y += rv1126.o

commit 3a6927377899763dae7974adf00831271468e4dc
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Sat Mar 28 15:51:09 2020 +0800

    mtd: nand: rockchip: fix compile error
    
    error: implicit declaration of function ‘fdt_get_base_address’
    [-Werror=implicit-function-declaration]
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ic950b9382bd200d854028773b7a4c63b4bed5c16

diff --git a/drivers/mtd/nand/raw/rockchip_nand_spl.c b/drivers/mtd/nand/raw/rockchip_nand_spl.c
index 98dfe27a81..7cf318141d 100644
--- a/drivers/mtd/nand/raw/rockchip_nand_spl.c
+++ b/drivers/mtd/nand/raw/rockchip_nand_spl.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <fdtdec.h>
+#include <fdt_support.h>
 #include <inttypes.h>
 #include <nand.h>
 #include <linux/kernel.h>

commit 3fe21f028ad3dce6109954fa282a82fb9292cd67
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Mar 30 11:58:37 2020 +0800

    regulator: rk8xx: fix buck get wrong value
    
    Before this, we always get the 1st of BUCK range group which
    brings the problems we face now.
    
    Let's traverse all the possible BUCK ranges to fix this issue.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I61a341fcbd190bcc0baff8267a94063c15abcc30

diff --git a/drivers/power/regulator/rk8xx.c b/drivers/power/regulator/rk8xx.c
index ad1dc8b1b0..744b99ca30 100644
--- a/drivers/power/regulator/rk8xx.c
+++ b/drivers/power/regulator/rk8xx.c
@@ -87,62 +87,65 @@ struct rk8xx_reg_info {
 	u8 config_reg;
 	u8 vsel_mask;
 	u8 min_sel;
+	/* only for buck now */
+	u8 max_sel;
+	u8 range_num;
 };
 
 static const struct rk8xx_reg_info rk808_buck[] = {
-	{ 712500,   12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK808_BUCK_VSEL_MASK, },
-	{ 712500,   12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK808_BUCK_VSEL_MASK, },
-	{ 712500,   12500, NA,		      NA,		  REG_BUCK3_CONFIG, RK808_BUCK_VSEL_MASK, },
-	{ 1800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, REG_BUCK4_CONFIG, RK808_BUCK4_VSEL_MASK, },
+	{ 712500,   12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK808_BUCK_VSEL_MASK, 0x00, 0x3f, 1},
+	{ 712500,   12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK808_BUCK_VSEL_MASK, 0x00, 0x3f, 1},
+	{ NA,       NA,    NA,		      NA,		  REG_BUCK3_CONFIG, NA,                   NA,   NA,   1},
+	{ 1800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, REG_BUCK4_CONFIG, RK808_BUCK4_VSEL_MASK,0x00, 0x0f, 1},
 };
 
 static const struct rk8xx_reg_info rk816_buck[] = {
 	/* buck 1 */
-	{  712500,  12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, 0x00, },
-	{ 1800000, 200000, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, 0x3c, },
-	{ 2300000,      0, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, 0x3f, },
+	{  712500,  12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, 0x00, 0x3b, 3},
+	{ 1800000, 200000, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, 0x3c, 0x3e, 3},
+	{ 2300000,      0, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, 0x3f, 0x3f, 3},
 	/* buck 2 */
-	{  712500,  12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x00, },
-	{ 1800000, 200000, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x3c, },
-	{ 2300000,      0, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x3f, },
+	{  712500,  12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x00, 0x3b, 3},
+	{ 1800000, 200000, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x3c, 0x3e, 3},
+	{ 2300000,      0, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x3f, 0x3f, 3},
 	/* buck 3 */
-	{ 712500,   12500, NA,		      NA,		  REG_BUCK3_CONFIG, RK818_BUCK_VSEL_MASK, },
+	{  NA,     NA,     NA,		      NA,		  REG_BUCK3_CONFIG, NA,                   NA,   NA,   1},
 	/* buck 4 */
-	{  800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, REG_BUCK4_CONFIG, RK818_BUCK4_VSEL_MASK, },
+	{  800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, REG_BUCK4_CONFIG, RK818_BUCK4_VSEL_MASK,0x00, 0x1b, 1},
 };
 
 static const struct rk8xx_reg_info rk809_buck5[] = {
 	/* buck 5 */
-	{ 1500000,	0, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), NA, RK809_BUCK5_VSEL_MASK, 0x00, },
-	{ 1800000, 200000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), NA, RK809_BUCK5_VSEL_MASK, 0x01, },
-	{ 2800000, 200000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), NA, RK809_BUCK5_VSEL_MASK, 0x04, },
-	{ 3300000, 300000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), NA, RK809_BUCK5_VSEL_MASK, 0x06, },
+	{ 1500000,	0, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), NA, RK809_BUCK5_VSEL_MASK, 0x00, 0x00, 4},
+	{ 1800000, 200000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), NA, RK809_BUCK5_VSEL_MASK, 0x01, 0x03, 4},
+	{ 2800000, 200000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), NA, RK809_BUCK5_VSEL_MASK, 0x04, 0x05, 4},
+	{ 3300000, 300000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), NA, RK809_BUCK5_VSEL_MASK, 0x06, 0x07, 4},
 };
 
 static const struct rk8xx_reg_info rk817_buck[] = {
 	/* buck 1 */
-	{  500000,  12500, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_CONFIG(1), RK817_BUCK_VSEL_MASK, 0x00, },
-	{ 1500000, 100000, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_CONFIG(1), RK817_BUCK_VSEL_MASK, 0x50, },
-	{ 2400000,	0, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_CONFIG(1), RK817_BUCK_VSEL_MASK, 0x59, },
+	{  500000,  12500, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_CONFIG(1), RK817_BUCK_VSEL_MASK, 0x00, 0x4f, 3},
+	{ 1500000, 100000, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_CONFIG(1), RK817_BUCK_VSEL_MASK, 0x50, 0x58, 3},
+	{ 2400000,	0, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_CONFIG(1), RK817_BUCK_VSEL_MASK, 0x59, 0x59, 3},
 	/* buck 2 */
-	{  500000,  12500, RK817_BUCK_ON_VSEL(2), RK817_BUCK_SLP_VSEL(2), RK817_BUCK_CONFIG(2), RK817_BUCK_VSEL_MASK, 0x00, },
-	{ 1500000, 100000, RK817_BUCK_ON_VSEL(2), RK817_BUCK_SLP_VSEL(2), RK817_BUCK_CONFIG(2), RK817_BUCK_VSEL_MASK, 0x50, },
-	{ 2400000,	0, RK817_BUCK_ON_VSEL(2), RK817_BUCK_SLP_VSEL(2), RK817_BUCK_CONFIG(2), RK817_BUCK_VSEL_MASK, 0x59, },
+	{  500000,  12500, RK817_BUCK_ON_VSEL(2), RK817_BUCK_SLP_VSEL(2), RK817_BUCK_CONFIG(2), RK817_BUCK_VSEL_MASK, 0x00, 0x4f, 3},
+	{ 1500000, 100000, RK817_BUCK_ON_VSEL(2), RK817_BUCK_SLP_VSEL(2), RK817_BUCK_CONFIG(2), RK817_BUCK_VSEL_MASK, 0x50, 0x58, 3},
+	{ 2400000,	0, RK817_BUCK_ON_VSEL(2), RK817_BUCK_SLP_VSEL(2), RK817_BUCK_CONFIG(2), RK817_BUCK_VSEL_MASK, 0x59, 0x59, 3},
 	/* buck 3 */
-	{  500000,  12500, RK817_BUCK_ON_VSEL(3), RK817_BUCK_SLP_VSEL(3), RK817_BUCK_CONFIG(3), RK817_BUCK_VSEL_MASK, 0x00, },
-	{ 1500000, 100000, RK817_BUCK_ON_VSEL(3), RK817_BUCK_SLP_VSEL(3), RK817_BUCK_CONFIG(3), RK817_BUCK_VSEL_MASK, 0x50, },
-	{ 2400000,	0, RK817_BUCK_ON_VSEL(3), RK817_BUCK_SLP_VSEL(3), RK817_BUCK_CONFIG(3), RK817_BUCK_VSEL_MASK, 0x59, },
+	{  500000,  12500, RK817_BUCK_ON_VSEL(3), RK817_BUCK_SLP_VSEL(3), RK817_BUCK_CONFIG(3), RK817_BUCK_VSEL_MASK, 0x00, 0x4f, 3},
+	{ 1500000, 100000, RK817_BUCK_ON_VSEL(3), RK817_BUCK_SLP_VSEL(3), RK817_BUCK_CONFIG(3), RK817_BUCK_VSEL_MASK, 0x50, 0x58, 3},
+	{ 2400000,	0, RK817_BUCK_ON_VSEL(3), RK817_BUCK_SLP_VSEL(3), RK817_BUCK_CONFIG(3), RK817_BUCK_VSEL_MASK, 0x59, 0x59, 3},
 	/* buck 4 */
-	{  500000,  12500, RK817_BUCK_ON_VSEL(4), RK817_BUCK_SLP_VSEL(4), RK817_BUCK_CONFIG(4), RK817_BUCK_VSEL_MASK, 0x00, },
-	{ 1500000, 100000, RK817_BUCK_ON_VSEL(4), RK817_BUCK_SLP_VSEL(4), RK817_BUCK_CONFIG(4), RK817_BUCK_VSEL_MASK, 0x50, },
-	{ 3400000,	0, RK817_BUCK_ON_VSEL(4), RK817_BUCK_SLP_VSEL(4), RK817_BUCK_CONFIG(4), RK817_BUCK_VSEL_MASK, 0x63, },
+	{  500000,  12500, RK817_BUCK_ON_VSEL(4), RK817_BUCK_SLP_VSEL(4), RK817_BUCK_CONFIG(4), RK817_BUCK_VSEL_MASK, 0x00, 0x4f, 3},
+	{ 1500000, 100000, RK817_BUCK_ON_VSEL(4), RK817_BUCK_SLP_VSEL(4), RK817_BUCK_CONFIG(4), RK817_BUCK_VSEL_MASK, 0x50, 0x62, 3},
+	{ 3400000,	0, RK817_BUCK_ON_VSEL(4), RK817_BUCK_SLP_VSEL(4), RK817_BUCK_CONFIG(4), RK817_BUCK_VSEL_MASK, 0x63, 0x63, 3},
 };
 
 static const struct rk8xx_reg_info rk818_buck[] = {
-	{ 712500,   12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, },
-	{ 712500,   12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, },
-	{ 712500,   12500, NA,		      NA,		  REG_BUCK3_CONFIG, RK818_BUCK_VSEL_MASK, },
-	{ 1800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, REG_BUCK4_CONFIG, RK818_BUCK4_VSEL_MASK, },
+	{ 712500,   12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, 0x00, 0x3f, 1},
+	{ 712500,   12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x00, 0x3f, 1},
+	{ NA,       NA,    NA,		      NA,		  REG_BUCK3_CONFIG, NA,                   NA,   NA,   1},
+	{ 1800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, REG_BUCK4_CONFIG, RK818_BUCK4_VSEL_MASK,0x00, 0x10, 1},
 };
 
 #ifdef ENABLE_DRIVER
@@ -784,10 +787,9 @@ static int _ldo_get_suspend_enable(struct udevice *pmic, int ldo)
 static int buck_get_value(struct udevice *dev)
 {
 	int buck = dev->driver_data - 1;
-	/* We assume level-1 voltage is enough for usage in U-Boot */
 	const struct rk8xx_reg_info *info = get_buck_reg(dev->parent, buck, 0);
 	int mask = info->vsel_mask;
-	int ret, val;
+	int i, ret, val;
 
 	if (info->vsel_reg == NA)
 		return -ENOSYS;
@@ -795,9 +797,20 @@ static int buck_get_value(struct udevice *dev)
 	ret = pmic_reg_read(dev->parent, info->vsel_reg);
 	if (ret < 0)
 		return ret;
+
 	val = ret & mask;
+	if (val >= info->min_sel && val <= info->max_sel)
+		goto finish;
 
-	return info->min_uv + val * info->step_uv;
+	/* unlucky to try */
+	for (i = 1; i < info->range_num; i++) {
+		info++;
+		if (val <= info->max_sel && val >= info->min_sel)
+			break;
+	}
+
+finish:
+	return info->min_uv + (val - info->min_sel) * info->step_uv;
 }
 
 static int buck_set_value(struct udevice *dev, int uvolt)
@@ -810,10 +823,9 @@ static int buck_set_value(struct udevice *dev, int uvolt)
 static int buck_get_suspend_value(struct udevice *dev)
 {
 	int buck = dev->driver_data - 1;
-	/* We assume level-1 voltage is enough for usage in U-Boot */
 	const struct rk8xx_reg_info *info = get_buck_reg(dev->parent, buck, 0);
 	int mask = info->vsel_mask;
-	int ret, val;
+	int i, ret, val;
 
 	if (info->vsel_sleep_reg == NA)
 		return -ENOSYS;
@@ -823,8 +835,18 @@ static int buck_get_suspend_value(struct udevice *dev)
 		return ret;
 
 	val = ret & mask;
+	if (val <= info->max_sel && val >= info->min_sel)
+		goto finish;
 
-	return info->min_uv + val * info->step_uv;
+	/* unlucky to try */
+	for (i = 1; i < info->range_num; i++) {
+		info++;
+		if (val <= info->max_sel && val >= info->min_sel)
+			break;
+	}
+
+finish:
+	return info->min_uv + (val - info->min_sel) * info->step_uv;
 }
 
 static int buck_set_suspend_value(struct udevice *dev, int uvolt)

commit ec9d7884940979dafe7de725a8a901838f7f33ee
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Mar 30 22:24:49 2020 +0800

    rockchip: dts: rv1126: change spl boot order node sfc to its child node
    
    The sfc device find sfc's child node to attach to its driver.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I6972edb23bcb762dd9c4fb5ab330ebbebe841c6b

diff --git a/arch/arm/dts/rv1126-u-boot.dtsi b/arch/arm/dts/rv1126-u-boot.dtsi
index 48cdf1e3f6..e3300fce52 100644
--- a/arch/arm/dts/rv1126-u-boot.dtsi
+++ b/arch/arm/dts/rv1126-u-boot.dtsi
@@ -12,7 +12,7 @@
 
 	chosen {
 		stdout-path = &uart2;
-		u-boot,spl-boot-order = &sfc, &nandc, &emmc;
+		u-boot,spl-boot-order = &spi_nand, &spi_nor, &nandc, &emmc;
 	};
 };
 

commit c8fa018b04311bbf944c3c90a7b7d15ca065a459
Merge: 4103a11cae 80ca1a53eb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Mar 30 19:32:22 2020 +0800

    Merge branch 'next-dev' into thunder-boot

commit 80ca1a53ebaa3f19a076ff07766297083ba826c7
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Mon Jan 20 15:33:09 2020 +0800

    cmd: crypto: add hash performance evaluate
    
    Change-Id: I493ff0bf3a08e24f427b89d21ea7e6e8731f2e9f
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/cmd/crypto.c b/cmd/crypto.c
index f2e1aaba57..674e6e5943 100644
--- a/cmd/crypto.c
+++ b/cmd/crypto.c
@@ -12,6 +12,8 @@
 #include <u-boot/sha256.h>
 #include <u-boot/sha512.h>
 
+#define HASH_PERF_EVAL(dev, algo)	hash_perf_eval(dev, algo, #algo)
+
 __cacheline_aligned static u8 foo_data[] = {
 	0x52, 0x53, 0x41, 0x4b, 0x00, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x00,
 	0xda, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@@ -225,6 +227,50 @@ static void dump_hex(const char *name, const u8 *array, u32 len)
 	printf("\n");
 }
 
+static int hash_perf_eval(struct udevice *dev, u32 algo, char *algo_name)
+{
+	sha_context ctx;
+	u32 data_size = 8 * 1024;
+	u8 *data = NULL;
+	u8 hash_out[64];
+	int ret;
+
+	ctx.algo = algo;
+	ctx.length = 100 * 1024 * 1024;
+
+	data = (u8 *)memalign(CONFIG_SYS_CACHELINE_SIZE, data_size);
+	if (!data) {
+		printf("%s, %d: memalign %u error!\n",
+		       __func__, __LINE__, data_size);
+		return -EINVAL;
+	}
+
+	memset(data, 0xab, data_size);
+
+	ulong start = get_timer(0);
+
+	ret = crypto_sha_init(dev, &ctx);
+	if (ret)
+		goto exit;
+
+	for (u32 i = 0; i < ctx.length / data_size; i++) {
+		ret = crypto_sha_update(dev, (u32 *)data, data_size);
+		if (ret)
+			goto exit;
+	}
+
+	ret = crypto_sha_final(dev, &ctx, hash_out);
+
+	ulong time_cost = get_timer(start);
+
+	printf("%s, hash performance = %luMBps\n",
+	       algo_name, (100 * 1000) / time_cost);
+exit:
+	free(data);
+
+	return ret;
+}
+
 static int do_crypto(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
 	struct udevice *dev;
@@ -256,6 +302,7 @@ static int do_crypto(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 
 	/* MD5 */
 	if (cap & CRYPTO_MD5) {
+		HASH_PERF_EVAL(dev, CRYPTO_MD5);
 		csha_ctx.algo = CRYPTO_MD5;
 		csha_ctx.length = sizeof(foo_data);
 		memset(hard_out, 0x00, sizeof(hard_out));
@@ -268,6 +315,7 @@ static int do_crypto(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 
 	/* SHA1 */
 	if (cap & CRYPTO_SHA1) {
+		HASH_PERF_EVAL(dev, CRYPTO_SHA1);
 		csha_ctx.algo = CRYPTO_SHA1;
 		csha_ctx.length = sizeof(foo_data);
 		memset(hard_out, 0x00, sizeof(hard_out));
@@ -282,6 +330,7 @@ static int do_crypto(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 
 	/* SHA512 */
 	if (cap & CRYPTO_SHA512) {
+		HASH_PERF_EVAL(dev, CRYPTO_SHA512);
 		csha_ctx.algo = CRYPTO_SHA512;
 		csha_ctx.length = sizeof(foo_data);
 		memset(hard_out, 0x00, sizeof(hard_out));
@@ -297,6 +346,7 @@ static int do_crypto(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 
 	/* SHA256 */
 	if (cap & CRYPTO_SHA256) {
+		HASH_PERF_EVAL(dev, CRYPTO_SHA256);
 		csha_ctx.algo = CRYPTO_SHA256;
 		csha_ctx.length = sizeof(foo_data);
 		memset(hard_out, 0x00, sizeof(hard_out));
@@ -311,7 +361,7 @@ static int do_crypto(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	}
 
 	/* RSA2048-SHA256 */
-	if ((cap & CRYPTO_RSA2048) && (cap & CRYPTO_SHA256)) {
+	if (cap & CRYPTO_RSA2048) {
 		memset(&rsa_key, 0x00, sizeof(rsa_key));
 		rsa_key.algo = CRYPTO_RSA2048;
 		rsa_key.n = (u32 *)&rsa2048_n;

commit 1606a214eadd3b30a22f9c89bf9a737a3e5456b3
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Mon Jan 20 15:31:00 2020 +0800

    crypto: rockchip: v2: optimize rk_hash_update
    
    if data address and data len is meet crypto v2
    hardware requirements, data will be calculated
    without cache.
    
    Change-Id: Ifc5acc5b449c581dbf3ac5f20ad6b8d932954aa7
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/drivers/crypto/rockchip/crypto_v2.c b/drivers/crypto/rockchip/crypto_v2.c
index a09d4ecaa5..1e4af55bb7 100644
--- a/drivers/crypto/rockchip/crypto_v2.c
+++ b/drivers/crypto/rockchip/crypto_v2.c
@@ -21,25 +21,27 @@ struct rockchip_crypto_priv {
 	u32 *frequencies;
 	u32 nclocks;
 	u32 length;
-	void *hw_ctx;
+	struct rk_hash_ctx *hw_ctx;
 };
 
 #define LLI_ADDR_ALIGIN_SIZE	8
 #define DATA_ADDR_ALIGIN_SIZE	8
+#define DATA_LEN_ALIGIN_SIZE	64
+
 #define RK_CRYPTO_TIME_OUT	50000  /* max 50ms */
 
 #define RK_WHILE_TIME_OUT(condition, timeout, ret) { \
 			u32 time_out = timeout; \
+			ret = 0; \
 			while (condition) { \
 				if (time_out-- == 0) { \
-					printf("[%s] %d: time out!", __func__, \
+					debug("[%s] %d: time out!\n", __func__,\
 						__LINE__); \
 					ret = -ETIME; \
 					break; \
 				} \
 				udelay(1); \
 			} \
-			ret = 0; \
 		} while (0)
 
 typedef u32 paddr_t;
@@ -98,6 +100,16 @@ static void word2byte(u32 word, u8 *ch, u32 endian)
 	}
 }
 
+static void rk_flush_cache_align(ulong addr, ulong size, ulong alignment)
+{
+	ulong aligned_input, aligned_len;
+
+	/* Must flush dcache before crypto DMA fetch data region */
+	aligned_input = round_down(addr, alignment);
+	aligned_len = round_up(size + (addr - aligned_input), alignment);
+	flush_cache(aligned_input, aligned_len);
+}
+
 static inline void clear_hash_out_reg(void)
 {
 	int i;
@@ -124,32 +136,21 @@ static int hw_crypto_reset(void)
 	return ret;
 }
 
-static void hw_hash_common_clean_ctx(struct rk_hash_ctx *ctx)
+static void hw_hash_clean_ctx(struct rk_hash_ctx *ctx)
 {
+	/* clear hash status */
 	crypto_write(CRYPTO_WRITE_MASK_ALL | 0, CRYPTO_HASH_CTL);
 
-	if (ctx->free_data_lli)
-		free(ctx->free_data_lli);
+	assert(ctx);
+	assert(ctx->magic == RK_HASH_CTX_MAGIC);
 
-	if (ctx->cur_data_lli)
-		free(ctx->cur_data_lli);
+	if (ctx->cache)
+		free(ctx->cache);
 
-	if (ctx->vir_src_addr)
-		free(ctx->vir_src_addr);
 	memset(ctx, 0x00, sizeof(*ctx));
 }
 
-static void hw_hash_clean_ctx(struct rk_hash_ctx *ctx)
-{
-	/* clear hash status */
-	crypto_write(CRYPTO_WRITE_MASK_ALL | 0, CRYPTO_HASH_CTL);
-
-	/* free tmp buff */
-	if (ctx && ctx->magic == RK_HASH_CTX_MAGIC)
-		hw_hash_common_clean_ctx(ctx);
-}
-
-int rk_hash_init(void *hw_ctx, u32 algo)
+int rk_hash_init(void *hw_ctx, u32 algo, u32 length)
 {
 	struct rk_hash_ctx *tmp_ctx = (struct rk_hash_ctx *)hw_ctx;
 	u32 reg_ctrl = 0;
@@ -160,6 +161,15 @@ int rk_hash_init(void *hw_ctx, u32 algo)
 
 	memset(tmp_ctx, 0x00, sizeof(*tmp_ctx));
 
+	reg_ctrl = CRYPTO_SW_CC_RESET;
+	crypto_write(reg_ctrl | (reg_ctrl << CRYPTO_WRITE_MASK_SHIFT),
+		     CRYPTO_RST_CTL);
+
+	/* wait reset compelete */
+	RK_WHILE_TIME_OUT(crypto_read(CRYPTO_RST_CTL),
+			  RK_CRYPTO_TIME_OUT, ret);
+
+	reg_ctrl = 0;
 	tmp_ctx->algo = algo;
 	switch (algo) {
 	case CRYPTO_MD5:
@@ -199,10 +209,11 @@ int rk_hash_init(void *hw_ctx, u32 algo)
 	reg_ctrl = CRYPTO_DOUT_BYTESWAP | CRYPTO_DOIN_BYTESWAP;
 	crypto_write(reg_ctrl | CRYPTO_WRITE_MASK_ALL, CRYPTO_FIFO_CTL);
 
-	/* disable all interrupt */
-	crypto_write(0x0, CRYPTO_DMA_INT_EN);
+	/* enable src_item_done interrupt */
+	crypto_write(CRYPTO_SRC_ITEM_INT_EN, CRYPTO_DMA_INT_EN);
 
 	tmp_ctx->magic = RK_HASH_CTX_MAGIC;
+	tmp_ctx->left_len = length;
 
 	return 0;
 exit:
@@ -212,205 +223,232 @@ exit:
 	return ret;
 }
 
-int rk_hash_update(void *ctx, const u8 *data, u32 data_len)
+static int rk_hash_direct_calc(struct crypto_lli_desc *lli, const u8 *data,
+			       u32 data_len, u8 *started_flag, u8 is_last)
 {
-	struct rk_hash_ctx *tmp_ctx = (struct rk_hash_ctx *)ctx;
-	struct crypto_lli_desc *free_lli_desp = NULL;
-	struct crypto_lli_desc *lli_desp = NULL;
-	u32 tmp, temp_data_len = 0;
-	u8 *vir_src_addr = NULL;
 	int ret = -EINVAL;
+	u32 tmp = 0;
 
-	if (!tmp_ctx || !data)
-		goto error;
+	assert(IS_ALIGNED((ulong)data, DATA_ADDR_ALIGIN_SIZE));
+	assert(is_last || IS_ALIGNED(data_len, DATA_LEN_ALIGIN_SIZE));
 
-	if (tmp_ctx->digest_size == 0 || tmp_ctx->magic != RK_HASH_CTX_MAGIC)
-		goto error;
+	debug("%s: data = %p, len = %u, s = %x, l = %x\n",
+	      __func__, data, data_len, *started_flag, is_last);
 
-	/* update will keep cache one calculate request in memmory */
-	/* because last calculate request should calculate in final */
-	if (!tmp_ctx->cur_data_lli) {
-		lli_desp = (struct crypto_lli_desc *)
-				memalign(DATA_ADDR_ALIGIN_SIZE,
-					 sizeof(struct crypto_lli_desc));
-		if (!lli_desp)
-			goto error;
+	memset(lli, 0x00, sizeof(*lli));
+	lli->src_addr = (u32)virt_to_phys(data);
+	lli->src_len = data_len;
+	lli->dma_ctrl = LLI_DMA_CTRL_SRC_DONE;
 
-		free_lli_desp = (struct crypto_lli_desc *)
-				memalign(DATA_ADDR_ALIGIN_SIZE,
-					 sizeof(struct crypto_lli_desc));
-		if (!free_lli_desp) {
-			free(lli_desp);
-			goto error;
-		}
+	if (is_last) {
+		lli->user_define |= LLI_USER_STRING_LAST;
+		lli->dma_ctrl |= LLI_DMA_CTRL_LAST;
+	} else {
+		lli->next_addr = (u32)virt_to_phys(lli);
+		lli->dma_ctrl |= LLI_DMA_CTRL_PAUSE;
+	}
+
+	if (!(*started_flag)) {
+		lli->user_define |=
+			(LLI_USER_STRING_START | LLI_USER_CPIHER_START);
+		crypto_write((u32)virt_to_phys(lli), CRYPTO_DMA_LLI_ADDR);
+		crypto_write((CRYPTO_HASH_ENABLE << CRYPTO_WRITE_MASK_SHIFT) |
+			     CRYPTO_HASH_ENABLE, CRYPTO_HASH_CTL);
+		tmp = CRYPTO_DMA_START;
+		*started_flag = 1;
+	} else {
+		tmp = CRYPTO_DMA_RESTART;
+	}
+
+	/* flush cache */
+	rk_flush_cache_align((ulong)lli, sizeof(*lli),
+			     CONFIG_SYS_CACHELINE_SIZE);
+	rk_flush_cache_align((ulong)data, data_len, CONFIG_SYS_CACHELINE_SIZE);
+
+	/* start calculate */
+	crypto_write(tmp << CRYPTO_WRITE_MASK_SHIFT | tmp,
+		     CRYPTO_DMA_CTL);
+
+	/* wait calc ok */
+	RK_WHILE_TIME_OUT(!crypto_read(CRYPTO_DMA_INT_ST),
+			  RK_CRYPTO_TIME_OUT, ret);
+
+	/* clear interrupt status */
+	tmp = crypto_read(CRYPTO_DMA_INT_ST);
+	crypto_write(tmp, CRYPTO_DMA_INT_ST);
 
-		memset(lli_desp, 0x00, sizeof(*lli_desp));
-		vir_src_addr = (u8 *)memalign(DATA_ADDR_ALIGIN_SIZE,
-						HASH_MAX_SIZE);
-		if (!vir_src_addr) {
-			free(lli_desp);
-			free(free_lli_desp);
-			printf("[%s] %d: memalign fail!", __func__, __LINE__);
+	if (tmp != CRYPTO_SRC_ITEM_DONE_INT_ST &&
+	    tmp != CRYPTO_ZERO_LEN_INT_ST) {
+		debug("[%s] %d: CRYPTO_DMA_INT_ST = 0x%x\n",
+		      __func__, __LINE__, tmp);
+		goto exit;
+	}
+
+exit:
+	return ret;
+}
+
+static int rk_hash_cache_calc(struct rk_hash_ctx *tmp_ctx, const u8 *data,
+			      u32 data_len, u8 is_last)
+{
+	u32 left_len;
+	int ret = 0;
+
+	if (!tmp_ctx->cache) {
+		tmp_ctx->cache = (u8 *)memalign(DATA_ADDR_ALIGIN_SIZE,
+						HASH_CACHE_SIZE);
+		if (!tmp_ctx->cache)
 			goto error;
+
+		tmp_ctx->cache_size = 0;
+	}
+
+	left_len = tmp_ctx->left_len;
+
+	while (1) {
+		u32 tmp_len = 0;
+
+		if (tmp_ctx->cache_size + data_len <= HASH_CACHE_SIZE) {
+			/* copy to cache */
+			debug("%s, %d: copy to cache %u\n",
+			      __func__, __LINE__, data_len);
+			memcpy(tmp_ctx->cache + tmp_ctx->cache_size, data,
+			       data_len);
+			tmp_ctx->cache_size += data_len;
+
+			/* if last one calc cache immediately */
+			if (is_last) {
+				debug("%s, %d: last one calc cache %u\n",
+				      __func__, __LINE__, tmp_ctx->cache_size);
+				ret = rk_hash_direct_calc(&tmp_ctx->data_lli,
+							  tmp_ctx->cache,
+							  tmp_ctx->cache_size,
+							  &tmp_ctx->is_started,
+							  is_last);
+				if (ret)
+					goto error;
+			}
+			left_len -= data_len;
+			break;
 		}
 
-		lli_desp->src_addr = (u32)virt_to_phys(vir_src_addr);
-		lli_desp->user_define = LLI_USER_CPIHER_START |
-					LLI_USER_STRING_START;
-		tmp_ctx->cur_data_lli = lli_desp;
-		tmp_ctx->free_data_lli = free_lli_desp;
-		tmp_ctx->vir_src_addr = vir_src_addr;
+		/* 1. make cache be full */
+		/* 2. calc cache */
+		tmp_len = HASH_CACHE_SIZE - tmp_ctx->cache_size;
+		debug("%s, %d: make cache be full %u\n",
+		      __func__, __LINE__, tmp_len);
+		memcpy(tmp_ctx->cache + tmp_ctx->cache_size, data, tmp_len);
+
+		ret = rk_hash_direct_calc(&tmp_ctx->data_lli,
+					  tmp_ctx->cache,
+					  HASH_CACHE_SIZE,
+					  &tmp_ctx->is_started,
+					  0);
+		if (ret)
+			goto error;
 
-		/* write first lli dma address to reg */
-		crypto_write((u32)virt_to_phys(tmp_ctx->cur_data_lli),
-			     CRYPTO_DMA_LLI_ADDR);
+		data += tmp_len;
+		data_len -= tmp_len;
+		left_len -= tmp_len;
+		tmp_ctx->cache_size = 0;
 	}
 
-	ret = 0;
-	while (data_len) {
-		lli_desp = (struct crypto_lli_desc *)tmp_ctx->cur_data_lli;
-		vir_src_addr = (u8 *)phys_to_virt((paddr_t)lli_desp->src_addr,
-						MEM_AREA_TEE_RAM);
-		if (data_len + lli_desp->src_len > HASH_MAX_SIZE) {
-			temp_data_len = HASH_MAX_SIZE - lli_desp->src_len;
-			memcpy(vir_src_addr + lli_desp->src_len, data,
-			       temp_data_len);
-			data_len -= temp_data_len;
-			data += temp_data_len;
-
-			free_lli_desp = tmp_ctx->free_data_lli;
-
-			memset(free_lli_desp, 0x00, sizeof(*free_lli_desp));
-			lli_desp->src_len = HASH_MAX_SIZE;
-			lli_desp->next_addr = (u32)virt_to_phys(free_lli_desp);
-			/* item done and  pause */
-			lli_desp->dma_ctrl = LLI_DMA_CTRL_PAUSE |
-					     LLI_DMA_CTRL_SRC_DONE;
-
-			if (tmp_ctx->dma_started == 0) {
-				/* start calculate */
-				crypto_write((CRYPTO_HASH_ENABLE <<
-						CRYPTO_WRITE_MASK_SHIFT) |
-						CRYPTO_HASH_ENABLE,
-						CRYPTO_HASH_CTL);
-				tmp = CRYPTO_DMA_START;
-				tmp_ctx->dma_started = 1;
-			} else {
-				/* restart calculate */
-				tmp = CRYPTO_DMA_RESTART;
-			}
+	return ret;
+error:
+	return -EINVAL;
+}
 
-			/* flush cache */
-			cache_op_inner(DCACHE_AREA_CLEAN, lli_desp,
-				       sizeof(*lli_desp));
-			cache_op_inner(DCACHE_AREA_CLEAN, vir_src_addr,
-				       lli_desp->src_len);
-
-			/* start calculate */
-			crypto_write(tmp << CRYPTO_WRITE_MASK_SHIFT | tmp,
-				     CRYPTO_DMA_CTL);
-
-			/* wait calc ok */
-			RK_WHILE_TIME_OUT(!crypto_read(CRYPTO_DMA_INT_ST),
-					  RK_CRYPTO_TIME_OUT, ret);
-
-			/* clear interrupt status */
-			tmp = crypto_read(CRYPTO_DMA_INT_ST);
-			crypto_write(tmp, CRYPTO_DMA_INT_ST);
-
-			if (tmp != CRYPTO_SRC_ITEM_DONE_INT_ST &&
-			    tmp != CRYPTO_ZERO_LEN_INT_ST) {
-				printf("[%s] %d: CRYPTO_DMA_INT_ST = 0x%x",
-				       __func__, __LINE__, tmp);
-				goto error;
-			}
+int rk_hash_update(void *ctx, const u8 *data, u32 data_len)
+{
+	struct rk_hash_ctx *tmp_ctx = (struct rk_hash_ctx *)ctx;
+	const u8 *direct_data = NULL, *cache_data = NULL;
+	u32 direct_data_len = 0, cache_data_len = 0;
+	int ret = 0;
+	u8 is_last = 0;
+
+	debug("\n");
+	if (!tmp_ctx || !data)
+		goto error;
+
+	if (tmp_ctx->digest_size == 0 || tmp_ctx->magic != RK_HASH_CTX_MAGIC)
+		goto error;
+
+	if (tmp_ctx->left_len < data_len)
+		goto error;
+
+	is_last = tmp_ctx->left_len == data_len ? 1 : 0;
 
-			/* after calc one block, swap free lli and cur lli */
-			free_lli_desp->src_addr = lli_desp->src_addr;
-			tmp_ctx->free_data_lli = tmp_ctx->cur_data_lli;
-			tmp_ctx->cur_data_lli = free_lli_desp;
-			free_lli_desp = NULL;
+	if (!tmp_ctx->use_cache &&
+	    IS_ALIGNED((ulong)data, DATA_ADDR_ALIGIN_SIZE)) {
+		direct_data = data;
+		if (IS_ALIGNED(data_len, DATA_LEN_ALIGIN_SIZE) || is_last) {
+			/* calc all directly */
+			debug("%s, %d: calc all directly\n",
+			      __func__, __LINE__);
+			direct_data_len = data_len;
 		} else {
-			/* cache first calculate request to buff */
-			memcpy(vir_src_addr + lli_desp->src_len,
-			       data, data_len);
-			lli_desp->src_len += data_len;
-			data_len = 0;
+			/* calc some directly calc some in cache */
+			debug("%s, %d: calc some directly calc some in cache\n",
+			      __func__, __LINE__);
+			direct_data_len = round_down((ulong)data_len,
+						     DATA_LEN_ALIGIN_SIZE);
+			cache_data = direct_data + direct_data_len;
+			cache_data_len = data_len % DATA_LEN_ALIGIN_SIZE;
+			tmp_ctx->use_cache = 1;
 		}
+	} else {
+		/* calc all in cache */
+		debug("%s, %d: calc all in cache\n", __func__, __LINE__);
+		cache_data = data;
+		cache_data_len = data_len;
+		tmp_ctx->use_cache = 1;
 	}
 
-	return ret;
+	if (direct_data_len) {
+		debug("%s, %d: calc direct data %u\n",
+		      __func__, __LINE__, direct_data_len);
+		ret = rk_hash_direct_calc(&tmp_ctx->data_lli, direct_data,
+					  direct_data_len,
+					  &tmp_ctx->is_started, is_last);
+		if (ret)
+			goto error;
+		tmp_ctx->left_len -= direct_data_len;
+	}
 
+	if (cache_data_len) {
+		debug("%s, %d: calc cache data %u\n",
+		      __func__, __LINE__, cache_data_len);
+		ret = rk_hash_cache_calc(tmp_ctx, cache_data,
+					 cache_data_len, is_last);
+		if (ret)
+			goto error;
+		tmp_ctx->left_len -= cache_data_len;
+	}
+
+	return ret;
 error:
 	/* free lli list */
 	hw_hash_clean_ctx(tmp_ctx);
 
-	return ret;
+	return -EINVAL;
 }
 
 int rk_hash_final(void *ctx, u8 *digest, size_t len)
 {
 	struct rk_hash_ctx *tmp_ctx = (struct rk_hash_ctx *)ctx;
-	struct crypto_lli_desc *lli_desp = NULL;
 	int ret = -EINVAL;
-	u32 i, tmp;
+	u32 i;
 
 	if (!digest)
 		goto exit;
 
 	if (!tmp_ctx ||
-	    !tmp_ctx->cur_data_lli ||
 	    tmp_ctx->digest_size == 0 ||
 	    len > tmp_ctx->digest_size ||
 	    tmp_ctx->magic != RK_HASH_CTX_MAGIC) {
 		goto exit;
 	}
 
-	/* to find the last block */
-	lli_desp = (struct crypto_lli_desc *)tmp_ctx->cur_data_lli;
-	if (lli_desp->next_addr != 0)
-		goto exit;
-
-	/* if data len is zero, return null hash value immediately*/
-	if (tmp_ctx->dma_started == 0 &&
-	    lli_desp->src_len == 0 &&
-	    !tmp_ctx->null_hash) {
-		memcpy(digest, tmp_ctx->null_hash, len);
-		ret = 0;
-		goto exit;
-	}
-
-	/* set LLI_USER_STRING_LAST to tell crypto this block is last one */
-	lli_desp->user_define |= LLI_USER_STRING_LAST;
-	lli_desp->dma_ctrl = LLI_DMA_CTRL_LIST_DONE | LLI_DMA_CTRL_LAST;
-	cache_op_inner(DCACHE_AREA_CLEAN, lli_desp, sizeof(*lli_desp));
-	cache_op_inner(DCACHE_AREA_CLEAN, tmp_ctx->vir_src_addr,
-		       lli_desp->src_len);
-
-	if (tmp_ctx->dma_started == 0) {
-		crypto_write((CRYPTO_HASH_ENABLE << CRYPTO_WRITE_MASK_SHIFT) |
-				CRYPTO_HASH_ENABLE, CRYPTO_HASH_CTL);
-		crypto_write((CRYPTO_DMA_START << CRYPTO_WRITE_MASK_SHIFT) |
-				CRYPTO_DMA_START, CRYPTO_DMA_CTL);
-	} else {
-		crypto_write((CRYPTO_DMA_RESTART << CRYPTO_WRITE_MASK_SHIFT) |
-				CRYPTO_DMA_RESTART, CRYPTO_DMA_CTL);
-		tmp_ctx->dma_started = 1;
-	}
-
-	/* wait dma trans ok */
-	RK_WHILE_TIME_OUT(!crypto_read(CRYPTO_DMA_INT_ST),
-			  RK_CRYPTO_TIME_OUT, ret);
-
-	/* clear interrupt status */
-	tmp = crypto_read(CRYPTO_DMA_INT_ST);
-	crypto_write(tmp, CRYPTO_DMA_INT_ST);
-
-	if (tmp != CRYPTO_LIST_DONE_INT_ST) {
-		ret = -EIO;
-		goto exit;
-	}
-
 	/* wait hash value ok */
 	RK_WHILE_TIME_OUT(!crypto_read(CRYPTO_HASH_VALID),
 			  RK_CRYPTO_TIME_OUT, ret);
@@ -497,13 +535,9 @@ static int rockchip_crypto_sha_init(struct udevice *dev, sha_context *ctx)
 	if (!ctx)
 		return -EINVAL;
 
-	priv->hw_ctx = malloc(sizeof(struct rk_hash_ctx));
-	if (!priv->hw_ctx)
-		return -ENOMEM;
-
 	memset(priv->hw_ctx, 0x00, sizeof(struct rk_hash_ctx));
 
-	return rk_hash_init(priv->hw_ctx, ctx->algo);
+	return rk_hash_init(priv->hw_ctx, ctx->algo, ctx->length);
 }
 
 static int rockchip_crypto_sha_update(struct udevice *dev,
@@ -522,17 +556,10 @@ static int rockchip_crypto_sha_final(struct udevice *dev,
 {
 	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
 	u32 nbits;
-	int ret;
 
 	nbits = crypto_algo_nbits(ctx->algo);
 
-	ret = rk_hash_final(priv->hw_ctx, (u8 *)output, BITS2BYTE(nbits));
-	if (priv->hw_ctx) {
-		free(priv->hw_ctx);
-		priv->hw_ctx = 0;
-	}
-
-	return ret;
+	return rk_hash_final(priv->hw_ctx, (u8 *)output, BITS2BYTE(nbits));
 }
 
 static int rockchip_crypto_rsa_verify(struct udevice *dev, rsa_key *ctx,
@@ -698,6 +725,11 @@ static int rockchip_crypto_probe(struct udevice *dev)
 	int i, ret = 0;
 	u32* clocks;
 
+	priv->hw_ctx = memalign(LLI_ADDR_ALIGIN_SIZE,
+				sizeof(struct rk_hash_ctx));
+	if (!priv->hw_ctx)
+		return -ENOMEM;
+
 	ret = rockchip_get_clk(&priv->clk.dev);
 	if (ret) {
 		printf("Failed to get clk device, ret=%d\n", ret);
diff --git a/include/rockchip/crypto_v2.h b/include/rockchip/crypto_v2.h
index 3dc6382ca5..41d9720040 100644
--- a/include/rockchip/crypto_v2.h
+++ b/include/rockchip/crypto_v2.h
@@ -8,9 +8,6 @@
 
 #include <asm/io.h>
 
-#define	cache_op_inner(area, addr, size) \
-		flush_cache((unsigned long)addr, (unsigned long)size)
-
 #define	RK_CRYPTO_KEY_ROOT		   0x00010000
 #define	RK_CRYPTO_KEY_PRIVATE		   0x00020000
 #define	RK_CRYPTO_MODE_MASK		   0x0000ffff
@@ -47,8 +44,8 @@ enum rk_hash_algo {
 #define	RK_MODE_ENCRYPT			0
 #define	RK_MODE_DECRYPT			1
 
-#define	HASH_MAX_SIZE			8192
-#define	CIPHER_MAX_SIZE			8192
+#define	HASH_CACHE_SIZE			8192
+#define	CIPHER_CACHE_SIZE		8192
 
 #define	_SBF(s,	v)			((v) <<	(s))
 #define	_BIT(b)				_SBF(b,	1)
@@ -583,14 +580,17 @@ struct crypto_lli_desc {
 };
 
 struct rk_hash_ctx {
-	const	u8 *null_hash;	/* when hash is null or length is zero */
-	void	*cur_data_lli;	/* to recored the lli that not computed	*/
-	void	*free_data_lli;	/* free lli that can use for next lli */
-	void	*vir_src_addr;	/* virt addr for hash src data*/
-	u32	magic;		/* to check whether the ctx is correct */
-	u32	algo;		/* hash algo */
-	u32	digest_size;	/* hash out length according to hash algo*/
-	u32	dma_started;	/* choose use start or restart */
+	struct crypto_lli_desc data_lli;/* lli desc */
+	const	u8 *null_hash;		/* when length is zero */
+	void	*cache;			/* virt addr for hash src data*/
+	u32	cache_size;		/* data in cached size */
+	u32	left_len;		/* left data to calc */
+	u32	magic;			/* to check ctx */
+	u32	algo;			/* hash algo */
+	u8	digest_size;		/* hash out length */
+	u8	is_started;		/* choose use start or restart */
+	u8	use_cache;		/* is use cache or not*/
+	u8	reserved;
 };
 
 #define	RK_HASH_CTX_MAGIC		0x1A1A1A1A

commit d23b7df1854115af2b9126188f2ca6f8e6d0d996
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Mon Mar 30 17:43:11 2020 +0800

    dt-bindings: pinctrl: rockchip support RK_FUNC_{5,15}
    
    Change-Id: I3fc8f58e033520f5211814bec84bd3142fd41760
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/include/dt-bindings/pinctrl/rockchip.h b/include/dt-bindings/pinctrl/rockchip.h
index 0798287e6f..0d19b78c8b 100644
--- a/include/dt-bindings/pinctrl/rockchip.h
+++ b/include/dt-bindings/pinctrl/rockchip.h
@@ -51,11 +51,21 @@
 #define RK_PD7		31
 
 #define RK_FUNC_GPIO	0
+#define RK_FUNC_0	0
 #define RK_FUNC_1	1
 #define RK_FUNC_2	2
 #define RK_FUNC_3	3
 #define RK_FUNC_4	4
 #define RK_FUNC_5	5
 #define RK_FUNC_6	6
+#define RK_FUNC_7	7
+#define RK_FUNC_8	8
+#define RK_FUNC_9	9
+#define RK_FUNC_10	10
+#define RK_FUNC_11	11
+#define RK_FUNC_12	12
+#define RK_FUNC_13	13
+#define RK_FUNC_14	14
+#define RK_FUNC_15	15
 
 #endif

commit 4103a11caebf51b22f77659adb398e32163b8e9c
Merge: 3edf1a0ecf 505eebf24e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Mar 30 18:02:29 2020 +0800

    Merge branch 'next-dev' into thunder-boot

commit 505eebf24e153630f5a3e0ec232ffda67bf48e9e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Mar 26 21:07:56 2020 +0800

    rockchip: make_fit_optee.sh: update UBOOT_OFFSET from configure file
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I6d793f186ae8bfd01c50fbc2c4f44c32bb54ddc0

diff --git a/arch/arm/mach-rockchip/make_fit_optee.sh b/arch/arm/mach-rockchip/make_fit_optee.sh
index 053b1b5d14..94dd87f54f 100755
--- a/arch/arm/mach-rockchip/make_fit_optee.sh
+++ b/arch/arm/mach-rockchip/make_fit_optee.sh
@@ -25,7 +25,7 @@ EOF
 
 OUTDIR=$PWD
 DARM_BASE=`sed -n "/CONFIG_SYS_SDRAM_BASE=/s/CONFIG_SYS_SDRAM_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
-UBOOT_OFFSET=0x00200000
+UBOOT_OFFSET=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
 UBOOT_BASE=$((DARM_BASE+UBOOT_OFFSET))
 UBOOT_BASE=$(echo "obase=16;${UBOOT_BASE}"|bc)
 echo "			load = <0x"$UBOOT_BASE">;"

commit 56ed6b5161581bd0ae6e7ad0d87038c9059ab6ad
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Mar 30 10:31:42 2020 +0800

    scripts: setlocalversion: add more information
    
    - add build username;
    - add latest commit creation time.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If038927af085bd02707c0baa23e8ae321d3cae37

diff --git a/scripts/setlocalversion b/scripts/setlocalversion
index 8564bedd1a..a3014ca5b6 100755
--- a/scripts/setlocalversion
+++ b/scripts/setlocalversion
@@ -59,7 +59,9 @@ scm_version()
 			# If we are past a tagged commit (like
 			# "v2.6.30-rc5-302-g72357d5"), we pretty print it.
 			if atag="`git describe 2>/dev/null`"; then
-				echo "$atag" | awk -F- '{printf("-%05d-%s", $(NF-1),$(NF))}'
+				echo "$atag" | awk -F- '{printf("-%s", $(NF))}'
+				date=`git log -1 --author='@rock-chips' --date=format:%y%m%d | sed -n '/Date:/p' | awk '{ print "-"$2 }'`
+				printf '%s' $date
 
 			# If we don't have a tag at all we print -g{commitish}.
 			else
@@ -77,6 +79,8 @@ scm_version()
 			printf '%s' -dirty
 		fi
 
+		printf ' \#%s' $USER
+
 		# All done with git
 		return
 	fi

commit 68c4faa3f8204593f60dadfb560abe58b1899556
Author: Jeffy Chen <jeffy.chen@rock-chips.com>
Date:   Wed Dec 4 14:50:35 2019 +0800

    rockchip: mkimage: support packing optional second level boot-loader
    
    Support packing optional second level boot-loader:
    
    $ ./tools/mkimage -n rk3399 -T rksd -d \
      rk3399_ddr_800MHz_v1.24.bin:rk3399_miniloader_v1.19.bin out -v
    Adding Image rk3399_ddr_800MHz_v1.24.bin
    Size 116492(pad to 116736)
    Adding Image rk3399_miniloader_v1.19.bin
    Size 88060(pad to 88064)
    Image Type:   Rockchip RK33 (SD/MMC) boot image
    Init Data Size: 116736 bytes
    Boot Data Size: 88064 bytes
    
    Mainly parse init file and boot file from datafile option, copy them to
    the image, and padding each one to 2KB boundary.
    
    NOTE:
    I don't know much about rknand.c, and there's no way to verify it now.
    The output image is unchanged though (with a few extra padding).
    
    Haven't got any feedback from upstream yet...But whatever, let's do this!
    
    Change-Id: I0ce98a44634cfcd8acfe9a3e2cfbe3ee0107fba4
    Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>

diff --git a/tools/imagetool.h b/tools/imagetool.h
index ac8f7d71ec..e4765af490 100644
--- a/tools/imagetool.h
+++ b/tools/imagetool.h
@@ -233,6 +233,7 @@ time_t imagetool_get_source_date(
 
 
 void pbl_load_uboot(int fd, struct image_tool_params *mparams);
+int rockchip_copy_image(int fd, struct image_tool_params *mparams);
 
 #define ___cat(a, b) a ## b
 #define __cat(a, b) ___cat(a, b)
diff --git a/tools/mkimage.c b/tools/mkimage.c
index a13d86f0aa..fce304f400 100644
--- a/tools/mkimage.c
+++ b/tools/mkimage.c
@@ -518,6 +518,15 @@ int main(int argc, char **argv)
 		} else if (params.type == IH_TYPE_PBLIMAGE) {
 			/* PBL has special Image format, implements its' own */
 			pbl_load_uboot(ifd, &params);
+		} else if ((params.type == IH_TYPE_RKSD) ||
+				(params.type == IH_TYPE_RKSPI) ||
+				(params.type == IH_TYPE_RKNAND)) {
+			/* Rockchip has special Image format */
+			int ret;
+
+			ret = rockchip_copy_image(ifd, &params);
+			if (ret)
+				return ret;
 		} else {
 			copy_file(ifd, params.datafile, pad_len);
 		}
diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index d502607202..b4b0021146 100644
--- a/tools/rkcommon.c
+++ b/tools/rkcommon.c
@@ -15,8 +15,6 @@
 #include "mkimage.h"
 #include "rkcommon.h"
 
-#define DIV_ROUND_UP(n, d)	(((n) + (d) - 1) / (d))
-
 enum {
 	RK_SIGNATURE		= 0x0ff0aa55,
 };
@@ -83,6 +81,24 @@ static struct spl_info spl_infos[] = {
 	{ "rk1808", "RK18", 0x200000 - 0x2000, false},
 };
 
+/**
+ * struct spl_params - spl params parsed in check_params()
+ *
+ * @init_file:		Init data file path
+ * @init_size:		Aligned size of init data in bytes
+ * @boot_file:		Boot data file path
+ * @boot_size:		Aligned size of boot data in bytes
+ */
+
+struct spl_params {
+	char *init_file;
+	uint32_t init_size;
+	char *boot_file;
+	uint32_t boot_size;
+};
+
+static struct spl_params spl_params = { 0 };
+
 static unsigned char rc4_key[16] = {
 	124, 78, 3, 4, 85, 5, 9, 7,
 	45, 44, 123, 56, 23, 13, 23, 17
@@ -102,13 +118,26 @@ static struct spl_info *rkcommon_get_spl_info(char *imagename)
 	return NULL;
 }
 
+static int rkcommon_get_aligned_size(struct image_tool_params *params,
+				     const char *fname)
+{
+	int size;
+
+	size = imagetool_get_filesize(params, fname);
+	if (size < 0)
+		return -1;
+
+	/*
+	 * Pad to a 2KB alignment, as required for init/boot size by the ROM
+	 * (see https://lists.denx.de/pipermail/u-boot/2017-May/293268.html)
+	 */
+	return ROUND(size, RK_SIZE_ALIGN);
+}
+
 int rkcommon_check_params(struct image_tool_params *params)
 {
 	int i;
 
-	if (rkcommon_get_spl_info(params->imagename) != NULL)
-		return EXIT_SUCCESS;
-
 	/*
 	 * If this is a operation (list or extract), the don't require
 	 * imagename to be set.
@@ -116,6 +145,40 @@ int rkcommon_check_params(struct image_tool_params *params)
 	if (params->lflag || params->iflag)
 		return EXIT_SUCCESS;
 
+	if (!rkcommon_get_spl_info(params->imagename))
+		goto err_spl_info;
+
+	spl_params.init_file = params->datafile;
+
+	spl_params.boot_file = strchr(spl_params.init_file, ':');
+	if (spl_params.boot_file) {
+		*spl_params.boot_file = '\0';
+		spl_params.boot_file += 1;
+	}
+
+	spl_params.init_size =
+		rkcommon_get_aligned_size(params, spl_params.init_file);
+	if (spl_params.init_size < 0)
+		return EXIT_FAILURE;
+
+	/* Boot file is optional, and only for back-to-bootrom functionality. */
+	if (spl_params.boot_file) {
+		spl_params.boot_size =
+			rkcommon_get_aligned_size(params, spl_params.boot_file);
+		if (spl_params.boot_size < 0)
+			return EXIT_FAILURE;
+	}
+
+	if (spl_params.init_size > rkcommon_get_spl_size(params)) {
+		fprintf(stderr,
+			"Error: SPL image is too large (size %#x than %#x)\n",
+			spl_params.init_size, rkcommon_get_spl_size(params));
+		return EXIT_FAILURE;
+	}
+
+	return EXIT_SUCCESS;
+
+err_spl_info:
 	fprintf(stderr, "ERROR: imagename (%s) is not supported!\n",
 		params->imagename ? params->imagename : "NULL");
 
@@ -158,8 +221,7 @@ bool rkcommon_need_rc4_spl(struct image_tool_params *params)
 	return info->spl_rc4;
 }
 
-static void rkcommon_set_header0(void *buf, uint file_size, uint max_size,
-				 struct image_tool_params *params)
+static void rkcommon_set_header0(void *buf, struct image_tool_params *params)
 {
 	struct header0_info *hdr = buf;
 
@@ -167,16 +229,8 @@ static void rkcommon_set_header0(void *buf, uint file_size, uint max_size,
 	hdr->signature = RK_SIGNATURE;
 	hdr->disable_rc4 = !rkcommon_need_rc4_spl(params);
 	hdr->init_offset = RK_INIT_OFFSET;
+	hdr->init_size = spl_params.init_size / RK_BLK_SIZE;
 
-	hdr->init_size = DIV_ROUND_UP(file_size, RK_BLK_SIZE);
-	/*
-	 * The init_size has to be a multiple of 4 blocks (i.e. of 2K)
-	 * or the BootROM will not boot the image.
-	 *
-	 * Note: To verify that this is not a legacy constraint, we
-	 *       rechecked this against the RK3399 BootROM.
-	 */
-	hdr->init_size = ROUND(hdr->init_size, 4);
 	/*
 	 * init_boot_size needs to be set, as it is read by the BootROM
 	 * to determine the size of the next-stage bootloader (e.g. U-Boot
@@ -185,21 +239,22 @@ static void rkcommon_set_header0(void *buf, uint file_size, uint max_size,
 	 * see https://lists.denx.de/pipermail/u-boot/2017-May/293267.html
 	 * for a more detailed explanation by Andy Yan
 	 */
-	hdr->init_boot_size = hdr->init_size + DIV_ROUND_UP(max_size, RK_BLK_SIZE);
-	hdr->init_boot_size = ROUND(hdr->init_boot_size, 4);
+	if (spl_params.boot_file)
+		hdr->init_boot_size =
+			hdr->init_size + spl_params.boot_size / RK_BLK_SIZE;
+	else
+		hdr->init_boot_size =
+			hdr->init_size + RK_MAX_BOOT_SIZE / RK_BLK_SIZE;
 
 	rc4_encode(buf, RK_BLK_SIZE, rc4_key);
 }
 
-int rkcommon_set_header(void *buf, uint file_size, uint max_size,
-			struct image_tool_params *params)
+void rkcommon_set_header(void *buf,  struct stat *sbuf,  int ifd,
+			 struct image_tool_params *params)
 {
 	struct header1_info *hdr = buf + RK_SPL_HDR_START;
 
-	if (file_size > rkcommon_get_spl_size(params))
-		return -ENOSPC;
-
-	rkcommon_set_header0(buf, file_size, max_size, params);
+	rkcommon_set_header0(buf, params);
 
 	/* Set up the SPL name (i.e. copy spl_hdr over) */
 	if (memcmp(&hdr->magic, "RSAK", 4))
@@ -207,9 +262,14 @@ int rkcommon_set_header(void *buf, uint file_size, uint max_size,
 
 	if (rkcommon_need_rc4_spl(params))
 		rkcommon_rc4_encode_spl(buf, RK_SPL_HDR_START,
-					params->file_size - RK_SPL_HDR_START);
+					spl_params.init_size);
 
-	return 0;
+	if (spl_params.boot_file) {
+		if (rkcommon_need_rc4_spl(params))
+			rkcommon_rc4_encode_spl(buf + RK_SPL_HDR_START,
+						spl_params.init_size,
+						spl_params.boot_size);
+	}
 }
 
 static inline unsigned rkcommon_offset_to_spi(unsigned offset)
@@ -301,7 +361,7 @@ void rkcommon_print_header(const void *buf)
 	struct header0_info header0;
 	struct spl_info *spl_info;
 	uint8_t image_type;
-	int ret;
+	int ret, boot_size;
 
 	ret = rkcommon_parse_header(buf, &header0, &spl_info);
 
@@ -319,7 +379,11 @@ void rkcommon_print_header(const void *buf)
 	printf("Image Type:   Rockchip %s (%s) boot image\n",
 	       spl_info->spl_hdr,
 	       (image_type == IH_TYPE_RKSD) ? "SD/MMC" : "SPI");
-	printf("Data Size:    %d bytes\n", header0.init_size * RK_BLK_SIZE);
+	printf("Init Data Size: %d bytes\n", header0.init_size * RK_BLK_SIZE);
+
+	boot_size = (header0.init_boot_size - header0.init_size) * RK_BLK_SIZE;
+	if (boot_size != RK_MAX_BOOT_SIZE)
+		printf("Boot Data Size: %d bytes\n", boot_size);
 }
 
 void rkcommon_rc4_encode_spl(void *buf, unsigned int offset, unsigned int size)
@@ -336,12 +400,8 @@ void rkcommon_rc4_encode_spl(void *buf, unsigned int offset, unsigned int size)
 }
 
 int rkcommon_vrec_header(struct image_tool_params *params,
-			 struct image_type_params *tparams,
-			 unsigned int alignment)
+			 struct image_type_params *tparams)
 {
-	unsigned int  unpadded_size;
-	unsigned int  padded_size;
-
 	/*
 	 * The SPL image looks as follows:
 	 *
@@ -367,19 +427,118 @@ int rkcommon_vrec_header(struct image_tool_params *params,
 
 	/* Allocate, clear and install the header */
 	tparams->hdr = malloc(tparams->header_size);
-	if (!tparams->hdr)
-		return -ENOMEM;
+	if (!tparams->hdr) {
+		fprintf(stderr, "%s: Can't alloc header: %s\n",
+			params->cmdname, strerror(errno));
+		exit(EXIT_FAILURE);
+	}
 	memset(tparams->hdr, 0, tparams->header_size);
 
 	/*
-	 * If someone passed in 0 for the alignment, we'd better handle
-	 * it correctly...
+	 * We need to store the original file-size (i.e. before padding), as
+	 * imagetool does not set this during its adjustment of file_size.
 	 */
-	if (!alignment)
-		alignment = 1;
+	params->orig_file_size = tparams->header_size +
+		spl_params.init_size + spl_params.boot_size;
+
+	params->file_size = ROUND(params->orig_file_size, RK_SIZE_ALIGN);
+
+	/* Ignoring pad len, since we are using our own copy_image() */
+	return 0;
+}
+
+static int pad_file(struct image_tool_params *params, int ifd, int pad)
+{
+	uint8_t zeros[4096];
+
+	memset(zeros, 0, sizeof(zeros));
+
+	while (pad > 0) {
+		int todo = sizeof(zeros);
+
+		if (todo > pad)
+			todo = pad;
+		if (write(ifd, (char *)&zeros, todo) != todo) {
+			fprintf(stderr, "%s: Write error on %s: %s\n",
+				params->cmdname, params->imagefile,
+				strerror(errno));
+			return -1;
+		}
+		pad -= todo;
+	}
+
+	return 0;
+}
+
+static int copy_file(struct image_tool_params *params, int ifd,
+		     const char *file, int padded_size)
+{
+	int dfd;
+	struct stat sbuf;
+	unsigned char *ptr;
+	int size;
+
+	if (params->vflag)
+		fprintf(stderr, "Adding Image %s\n", file);
+
+	dfd = open(file, O_RDONLY | O_BINARY);
+	if (dfd < 0) {
+		fprintf(stderr, "%s: Can't open %s: %s\n",
+			params->cmdname, file, strerror(errno));
+		return -1;
+	}
 
-	unpadded_size = tparams->header_size + params->file_size;
-	padded_size = ROUND(unpadded_size, alignment);
+	if (fstat(dfd, &sbuf) < 0) {
+		fprintf(stderr, "%s: Can't stat %s: %s\n",
+			params->cmdname, file, strerror(errno));
+		goto err_close;
+	}
+
+	if (params->vflag)
+		fprintf(stderr, "Size %u(pad to %u)\n",
+			(int)sbuf.st_size, padded_size);
+
+	ptr = mmap(0, sbuf.st_size, PROT_READ, MAP_SHARED, dfd, 0);
+	if (ptr == MAP_FAILED) {
+		fprintf(stderr, "%s: Can't read %s: %s\n",
+			params->cmdname, file, strerror(errno));
+		goto err_munmap;
+	}
+
+	size = sbuf.st_size;
+	if (write(ifd, ptr, size) != size) {
+		fprintf(stderr, "%s: Write error on %s: %s\n",
+			params->cmdname, params->imagefile, strerror(errno));
+		goto err_munmap;
+	}
+
+	munmap((void *)ptr, sbuf.st_size);
+	close(dfd);
+	return pad_file(params, ifd, padded_size - size);
+
+err_munmap:
+	munmap((void *)ptr, sbuf.st_size);
+err_close:
+	close(dfd);
+	return -1;
+}
+
+int rockchip_copy_image(int ifd, struct image_tool_params *params)
+{
+	int ret;
+
+	ret = copy_file(params, ifd, spl_params.init_file,
+			spl_params.init_size);
+	if (ret)
+		return ret;
+
+	if (spl_params.boot_file) {
+		ret = copy_file(params, ifd, spl_params.boot_file,
+				spl_params.boot_size);
+		if (ret)
+			return ret;
+	}
 
-	return padded_size - unpadded_size;
+	return pad_file(params, ifd,
+			params->file_size - params->orig_file_size);
 }
diff --git a/tools/rkcommon.h b/tools/rkcommon.h
index 8fd147a4e0..97019c01b2 100644
--- a/tools/rkcommon.h
+++ b/tools/rkcommon.h
@@ -10,13 +10,11 @@
 
 enum {
 	RK_BLK_SIZE		= 512,
-	RK_INIT_SIZE_ALIGN      = 2048,
+	RK_SIZE_ALIGN		= 2048,
 	RK_INIT_OFFSET		= 4,
 	RK_MAX_BOOT_SIZE	= 512 << 10,
 	RK_SPL_HDR_START	= RK_INIT_OFFSET * RK_BLK_SIZE,
 	RK_SPL_HDR_SIZE		= 4,
-	RK_SPL_START		= RK_SPL_HDR_START + RK_SPL_HDR_SIZE,
-	RK_IMAGE_HEADER_LEN	= RK_SPL_START,
 };
 
 /**
@@ -50,11 +48,9 @@ int rkcommon_get_spl_size(struct image_tool_params *params);
  * This sets up a 2KB header which can be interpreted by the Rockchip boot ROM.
  *
  * @buf:	Pointer to header place (must be at least 2KB in size)
- * @file_size:	Size of the file we want the boot ROM to load, in bytes
- * @return 0 if OK, -ENOSPC if too large
  */
-int rkcommon_set_header(void *buf, uint file_size, uint max_size,
-			struct image_tool_params *params);
+void rkcommon_set_header(void *buf,  struct stat *sbuf,  int ifd,
+			 struct image_tool_params *params);
 
 /**
  * rkcommon_verify_header() - verify the header for a Rockchip boot image
@@ -103,14 +99,10 @@ void rkcommon_rc4_encode_spl(void *buf, unsigned int offset, unsigned int size);
  * @params:     Pointer to the tool params structure
  * @tparams:    Pointer tot the image type structure (for setting
  *              the header and header_size)
- * @alignment:  Alignment (a power of two) that the image should be
- *              padded to (e.g. 512 if we want to align with SD/MMC
- *              blocksizes or 2048 for the SPI format)
  *
- * @return bytes of padding required/added (does not include the header_size)
+ * @return 0 (always)
  */
 int rkcommon_vrec_header(struct image_tool_params *params,
-			 struct image_type_params *tparams,
-			 unsigned int alignment);
+			 struct image_type_params *tparams);
 
 #endif
diff --git a/tools/rknand.c b/tools/rknand.c
index c93f053203..99fcf6f268 100644
--- a/tools/rknand.c
+++ b/tools/rknand.c
@@ -10,113 +10,52 @@
 #include "mkimage.h"
 #include "rkcommon.h"
 
+#define DIV_ROUND_UP(n, d)	(((n) + (d) - 1) / (d))
+
 enum {
 	RKNAND_SECT_LEN = RK_BLK_SIZE * 4,
 };
 
 struct rknand_info {
 	uint32_t pagesize;
-	uint32_t skippages;
-	uint32_t tplsize;
-	uint32_t splsize;
-	uint32_t tplpaddedsize;
-	uint32_t splpaddedsize;
 	uint32_t itersize;
 	uint32_t tplsplsize;
-	char *tplfile;
-	char *splfile;
 };
 
 struct rknand_info ninfo;
 
-static uint32_t rknand_get_file_size(char *filename)
-{
-	int dfd;
-	struct stat sbuf;
-
-	dfd = open(filename, O_RDONLY | O_BINARY);
-	if (dfd < 0) {
-		fprintf(stderr, "Can't open %s: %s\n", filename, strerror(errno));
-		exit(EXIT_FAILURE);
-	}
-
-	if (fstat(dfd, &sbuf) < 0) {
-		fprintf(stderr, "Can't stat %s: %s\n", filename, strerror(errno));
-		exit(EXIT_FAILURE);
-	}
-
-	close(dfd);
-
-	return sbuf.st_size;
-}
-
-static void rknand_fill_ninfo(struct image_tool_params *params)
-{
-	sscanf(params->extraparams, "%u,%u", &ninfo.pagesize, &ninfo.skippages);
-
-	ninfo.tplfile = params->datafile;
-	if ((ninfo.splfile = strchr(params->datafile, ':')) != NULL) {
-		*ninfo.splfile = '\0';
-		ninfo.splfile += 1;
-	}
-
-	ninfo.tplsize = rknand_get_file_size(ninfo.tplfile);
-	ninfo.splsize = rknand_get_file_size(ninfo.splfile);
-
-	ninfo.tplpaddedsize = ROUND(ninfo.tplsize, RKNAND_SECT_LEN);
-
-	ninfo.splpaddedsize = ROUND(ninfo.splsize, RKNAND_SECT_LEN);
-
-	ninfo.itersize = ninfo.pagesize * (ninfo.skippages + 1);
-	ninfo.tplsplsize = ((ninfo.tplpaddedsize + ninfo.splpaddedsize) /
-		     RKNAND_SECT_LEN) * ninfo.itersize;
-}
-
 static void rknand_set_header(void *buf, struct stat *sbuf, int ifd,
 			     struct image_tool_params *params)
 {
-	int sector, sploffset, splfd, ret;
+	int sector;
+	unsigned int size;
 
-	ret = rkcommon_set_header(buf, ninfo.tplsize, ninfo.splsize, params);
-	if (ret) {
-		printf("Warning: TPL image is too large (size %#x) and will "
-		       "not boot\n", ninfo.tplsize);
-	}
-
-	if ((splfd = open(ninfo.splfile, O_RDONLY | O_BINARY)) < 0) {
-		fprintf (stderr, "%s: Can't open %s: %s\n",
-			params->cmdname, ninfo.splfile, strerror(errno));
-		exit (EXIT_FAILURE);
-	}
-
-	sploffset = RKNAND_SECT_LEN + ninfo.tplpaddedsize;
-	if (read(splfd, buf + sploffset, ninfo.splsize) != ninfo.splsize) {
-		fprintf (stderr, "%s: Read error on %s: %s\n",
-			params->cmdname, ninfo.splfile, strerror(errno));
-		exit (EXIT_FAILURE);
-	}
-	close(splfd);
+	size = params->orig_file_size;
 
-	if (rkcommon_need_rc4_spl(params))
-		rkcommon_rc4_encode_spl(buf, sploffset, ninfo.splpaddedsize);
+	rkcommon_set_header(buf, sbuf, ifd, params);
 
 	/*
 	 * Spread the image out so we only use the first 2KB of each pagesize
 	 * region. This is a feature of the NAND format required by the Rockchip
 	 * boot ROM.
 	 */
-	for (sector = ninfo.tplsplsize / ninfo.itersize - 1; sector >= 0; sector--) {
-		memmove(buf + sector * ninfo.itersize + ninfo.pagesize,
-			buf + (sector + 1) * RKNAND_SECT_LEN, RKNAND_SECT_LEN);
-
-		if (sector < (ninfo.tplsplsize / ninfo.itersize - 1))
-			memset(buf + sector * ninfo.itersize  + ninfo.pagesize +
-			       RKNAND_SECT_LEN, 0xFF, ninfo.itersize -
-			       RKNAND_SECT_LEN);
+	if (params->vflag)
+		fprintf(stderr, "Spreading nand image from %u to %u\n",
+			size, params->file_size);
+
+	for (sector = ninfo.tplsplsize / ninfo.itersize - 1; sector >= 0;
+	     sector--) {
+		memmove(buf + ninfo.pagesize + sector * ninfo.itersize,
+			buf + RK_SPL_HDR_START + sector * RKNAND_SECT_LEN,
+			RKNAND_SECT_LEN);
+
+		memset(buf + ninfo.pagesize + sector * ninfo.itersize +
+		       RKNAND_SECT_LEN, 0xFF,
+		       ninfo.itersize - RKNAND_SECT_LEN);
 	}
-	memset(buf + RKNAND_SECT_LEN, 0xFF, ninfo.pagesize - RKNAND_SECT_LEN);
-	memset(buf + ninfo.tplsplsize - ninfo.pagesize + RKNAND_SECT_LEN, 0xFF,
-	       ninfo.pagesize - RKNAND_SECT_LEN);
+
+	/* Fill up padded area of the header. */
+	memset(buf + RK_SPL_HDR_START, 0xFF, ninfo.pagesize - RK_SPL_HDR_START);
 }
 
 static int rknand_check_image_type(uint8_t type)
@@ -130,10 +69,28 @@ static int rknand_check_image_type(uint8_t type)
 static int rknand_vrec_header(struct image_tool_params *params,
 			     struct image_type_params *tparams)
 {
-	rknand_fill_ninfo(params);
-	rkcommon_vrec_header(params, tparams, RKNAND_SECT_LEN);
+	int tplsplsize;
+	uint32_t skippages;
+	int ret;
+
+	rkcommon_vrec_header(params, tparams);
+
+	ret = sscanf(params->extraparams, "%u,%u", &ninfo.pagesize, &skippages);
+	if (ret != 2 || (ninfo.pagesize % RKNAND_SECT_LEN)) {
+		fprintf(stderr, "%s: Wrong nand params\n", params->cmdname);
+		exit(EXIT_FAILURE);
+	}
+
+	ninfo.itersize = ninfo.pagesize * (skippages + 1);
+
+	tplsplsize = params->file_size - RK_SPL_HDR_START;
+	ninfo.tplsplsize =
+		DIV_ROUND_UP(tplsplsize, RKNAND_SECT_LEN) * ninfo.itersize;
+
+	/* Padded file size = padded header + padded tpl & spl. */
+	params->file_size = ninfo.pagesize + ninfo.tplsplsize;
 
-	return ninfo.tplsplsize - tparams->header_size - ninfo.tplsize;
+	return 0;
 }
 
 /*
@@ -145,8 +102,9 @@ U_BOOT_IMAGE_TYPE(
 	0,
 	NULL,
 	rkcommon_check_params,
-	rkcommon_verify_header,
-	rkcommon_print_header,
+	/* TODO: Support rknand in there helpers */
+	NULL, //rkcommon_verify_header,
+	NULL, //rkcommon_print_header,
 	rknand_set_header,
 	NULL,
 	rknand_check_image_type,
diff --git a/tools/rksd.c b/tools/rksd.c
index 164c1fbcb7..25119b22c6 100644
--- a/tools/rksd.c
+++ b/tools/rksd.c
@@ -13,27 +13,6 @@
 #include "mkimage.h"
 #include "rkcommon.h"
 
-static void rksd_set_header(void *buf,  struct stat *sbuf,  int ifd,
-			    struct image_tool_params *params)
-{
-	unsigned int size;
-	int ret;
-
-	/*
-	 * We need to calculate this using 'RK_SPL_HDR_START' and not using
-	 * 'tparams->header_size', as the additional byte inserted when
-	 * 'is_boot0' is true counts towards the payload (and not towards the
-	 * header).
-	 */
-	size = params->file_size - RK_SPL_HDR_START;
-	ret = rkcommon_set_header(buf, size, RK_MAX_BOOT_SIZE, params);
-	if (ret) {
-		/* TODO(sjg@chromium.org): This method should return an error */
-		printf("Warning: SPL image is too large (size %#x) and will "
-		       "not boot\n", size);
-	}
-}
-
 static int rksd_check_image_type(uint8_t type)
 {
 	if (type == IH_TYPE_RKSD)
@@ -42,16 +21,6 @@ static int rksd_check_image_type(uint8_t type)
 		return EXIT_FAILURE;
 }
 
-static int rksd_vrec_header(struct image_tool_params *params,
-			    struct image_type_params *tparams)
-{
-	/*
-	 * Pad to a 2KB alignment, as required for init_size by the ROM
-	 * (see https://lists.denx.de/pipermail/u-boot/2017-May/293268.html)
-	 */
-	return rkcommon_vrec_header(params, tparams, RK_INIT_SIZE_ALIGN);
-}
-
 /*
  * rk_sd parameters
  */
@@ -63,9 +32,9 @@ U_BOOT_IMAGE_TYPE(
 	rkcommon_check_params,
 	rkcommon_verify_header,
 	rkcommon_print_header,
-	rksd_set_header,
+	rkcommon_set_header,
 	NULL,
 	rksd_check_image_type,
 	NULL,
-	rksd_vrec_header
+	rkcommon_vrec_header
 );
diff --git a/tools/rkspi.c b/tools/rkspi.c
index 5005051d39..15e283851e 100644
--- a/tools/rkspi.c
+++ b/tools/rkspi.c
@@ -22,22 +22,20 @@ static void rkspi_set_header(void *buf, struct stat *sbuf, int ifd,
 {
 	int sector;
 	unsigned int size;
-	int ret;
 
 	size = params->orig_file_size;
-	ret = rkcommon_set_header(buf, size, RK_MAX_BOOT_SIZE, params);
-	debug("size %x\n", size);
-	if (ret) {
-		/* TODO(sjg@chromium.org): This method should return an error */
-		printf("Warning: SPL image is too large (size %#x) and will "
-		       "not boot\n", size);
-	}
+
+	rkcommon_set_header(buf, sbuf, ifd, params);
 
 	/*
 	 * Spread the image out so we only use the first 2KB of each 4KB
 	 * region. This is a feature of the SPI format required by the Rockchip
 	 * boot ROM. Its rationale is unknown.
 	 */
+	if (params->vflag)
+		fprintf(stderr, "Spreading spi image from %u to %u\n",
+			size, params->file_size);
+
 	for (sector = size / RKSPI_SECT_LEN - 1; sector >= 0; sector--) {
 		debug("sector %u\n", sector);
 		memmove(buf + sector * RKSPI_SECT_LEN * 2,
@@ -57,35 +55,23 @@ static int rkspi_check_image_type(uint8_t type)
 }
 
 /*
- * The SPI payload needs to be padded out to make space for odd half-sector
- * layout used in flash (i.e. only the first 2K of each 4K sector is used).
+ * The SPI payload needs to make space for odd half-sector layout used in flash
+ * (i.e. only the first 2K of each 4K sector is used).
  */
 static int rkspi_vrec_header(struct image_tool_params *params,
 			     struct image_type_params *tparams)
 {
-	int padding = rkcommon_vrec_header(params, tparams, RK_INIT_SIZE_ALIGN);
-	/*
-	 * The file size has not been adjusted at this point (our caller will
-	 * eventually add the header/padding to the file_size), so we need to
-	 * add up the header_size, file_size and padding ourselves.
-	 */
-	int padded_size = tparams->header_size + params->file_size + padding;
-
-	/*
-	 * We need to store the original file-size (i.e. before padding), as
-	 * imagetool does not set this during its adjustment of file_size.
-	 */
-	params->orig_file_size = padded_size;
+	rkcommon_vrec_header(params, tparams);
 
 	/*
 	 * Converting to the SPI format (i.e. splitting each 4K page into two
 	 * 2K subpages and then padding these 2K pages up to take a complete
-	 * 4K sector again) will will double the image size.
-	 *
-	 * Thus we return the padded_size as an additional padding requirement
-	 * (be sure to add this to the padding returned from the common code).
+	 * 4K sector again) which will double the image size.
 	 */
-	return padded_size + padding;
+	params->file_size = ROUND(params->file_size, RKSPI_SECT_LEN) << 1;
+
+	/* Ignoring pad len, since we are using our own copy_image() */
+	return 0;
 }
 
 /*

commit 3edf1a0ecf69499b00440292ac95dc8192d36828
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Sat Mar 28 17:21:32 2020 +0800

    rockchip: rv1126: set the region 0 unsecure
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I9fd0a35571b339cf1f171b9a188a36f9309fdb0e

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126.c b/arch/arm/mach-rockchip/rv1126/rv1126.c
index 71dc62281e..dce85993c1 100644
--- a/arch/arm/mach-rockchip/rv1126/rv1126.c
+++ b/arch/arm/mach-rockchip/rv1126/rv1126.c
@@ -10,9 +10,7 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 #define FIREWALL_APB_BASE	0xffa60000
-#define FW_DDR_BASE		FIREWALL_APB_BASE
 #define FW_DDR_CON_REG		0x80
-#define DDR_RGN(x)		(0x20 + (x) * 4)
 
 void board_debug_uart_init(void)
 {
@@ -22,13 +20,8 @@ void board_debug_uart_init(void)
 #if defined(CONFIG_SPL_BUILD)
 int arch_cpu_init(void)
 {
-	int i;
-
-	/* Close the firewall, so that some devices can access to DDR */
+	/* Just set region 0 to unsecure */
 	writel(0, FIREWALL_APB_BASE + FW_DDR_CON_REG);
-	for (i = 0; i < 9; i++) {
-		writel(0, FW_DDR_BASE + DDR_RGN(i));
-	}
 
 	return 0;
 }

commit 7ddd80d345b76e60732ba7801a8b6edd3615c50a
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Sat Mar 28 16:48:17 2020 +0800

    configs: rv1126: support spi nor and mtd block driver build
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Iacdde98f650fa7c047d0612b07e47fa2b7f82ba8

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index f73368965e..19fbb1b289 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -10,6 +10,8 @@ CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL_STACK_R_ADDR=0x3fe0000
 CONFIG_TARGET_EVB_RV1126=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
 CONFIG_DEFAULT_DEVICE_TREE="rv1126-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_BOOTDELAY=0
@@ -20,6 +22,7 @@ CONFIG_SPL_BOARD_INIT=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
 CONFIG_SPL_STACK_R=y
+CONFIG_SPL_MTD_SUPPORT=y
 CONFIG_SPL_OPTEE=y
 CONFIG_SPL_LOAD_RKFW=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
@@ -38,6 +41,8 @@ CONFIG_CMD_GPT=y
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_ITEST is not set
@@ -45,6 +50,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_NET is not set
 # CONFIG_CMD_NFS is not set
 # CONFIG_CMD_MISC is not set
+CONFIG_CMD_MTD_BLK=y
 # CONFIG_ISO_PARTITION is not set
 CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_SPL_OF_CONTROL=y
@@ -63,6 +69,16 @@ CONFIG_RK8XX_PWRKEY=y
 CONFIG_ADC_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MTD=y
+CONFIG_MTD_BLK=y
+CONFIG_MTD_DEVICE=y
+CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0x1
+CONFIG_SF_DEFAULT_SPEED=50000000
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPI_FLASH_MTD=y
 CONFIG_PINCTRL=y
 CONFIG_DM_PMIC=y
 # CONFIG_SPL_PMIC_CHILDREN is not set
@@ -78,6 +94,7 @@ CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xff570000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_ROCKCHIP_SFC=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
@@ -86,10 +103,10 @@ CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
 CONFIG_USB_GADGET_VENDOR_NUM=0x2207
 CONFIG_USB_GADGET_PRODUCT_NUM=0x110b
+CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_IRQ2GPIO_V2=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y

commit f7a0a6a39ad7ec2721be3b67331e9524e37efad3
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Sat Mar 28 15:38:02 2020 +0800

    rockchip: dts: rv1126: add nandc node
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I175c63952dc0baa2d26aadfc17f56eb0a1323440

diff --git a/arch/arm/dts/rv1126-u-boot.dtsi b/arch/arm/dts/rv1126-u-boot.dtsi
index f647575a9a..48cdf1e3f6 100644
--- a/arch/arm/dts/rv1126-u-boot.dtsi
+++ b/arch/arm/dts/rv1126-u-boot.dtsi
@@ -12,7 +12,7 @@
 
 	chosen {
 		stdout-path = &uart2;
-		u-boot,spl-boot-order = &sfc, &emmc;
+		u-boot,spl-boot-order = &sfc, &nandc, &emmc;
 	};
 };
 
@@ -79,6 +79,21 @@
 	};
 };
 
+&nandc {
+	u-boot,dm-spl;
+	status = "okay";
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	nand@0 {
+		u-boot,dm-spl;
+		reg = <0>;
+		nand-ecc-mode = "hw_syndrome";
+		nand-ecc-strength = <16>;
+		nand-ecc-step-size = <1024>;
+	};
+};
+
 &usbdrd {
 	u-boot,dm-pre-reloc;
 	status = "okay";

commit 10b211a2ec4e7d4bad4578f4217f22aed28e2c4d
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Sat Mar 28 15:33:40 2020 +0800

    rockchip: dts: rv1126: add sfc node
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I1d09fadcb9df446326a7ba00903cf2856eff76fb

diff --git a/arch/arm/dts/rv1126-u-boot.dtsi b/arch/arm/dts/rv1126-u-boot.dtsi
index 135cdf208e..f647575a9a 100644
--- a/arch/arm/dts/rv1126-u-boot.dtsi
+++ b/arch/arm/dts/rv1126-u-boot.dtsi
@@ -54,6 +54,31 @@
 	status = "okay";
 };
 
+&sfc {
+	u-boot,dm-spl;
+	status = "okay";
+
+	#address-cells = <1>;
+	#size-cells = <0>;
+	spi_nand: flash@0 {
+		u-boot,dm-spl;
+		compatible = "spi-nand";
+		reg = <0>;
+		spi-tx-bus-width = <1>;
+		spi-rx-bus-width = <4>;
+		spi-max-frequency = <96000000>;
+	};
+
+	spi_nor: flash@1 {
+		u-boot,dm-spl;
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-tx-bus-width = <1>;
+		spi-rx-bus-width = <4>;
+		spi-max-frequency = <96000000>;
+	};
+};
+
 &usbdrd {
 	u-boot,dm-pre-reloc;
 	status = "okay";

commit 84c6e8b75543c6d1f6688420fe8ab45cbbc1783a
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Sat Mar 28 15:23:43 2020 +0800

    configs: rv1126: enlarge CONFIG_SYS_MALLOC_F_LEN
    
    Enlarge heap to storge MMU page table when enable dcache.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I4604794b1ff2cf6d7075b690eedea24677a53a3e

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index 2481cf485f..f73368965e 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -2,7 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SYS_MALLOC_F_LEN=0x8000
+CONFIG_SYS_MALLOC_F_LEN=0xc000
 CONFIG_ROCKCHIP_RV1126=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y

commit 1c8a43845bff01dcca8d1321d3b58cafc25fd326
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Sat Mar 28 15:17:46 2020 +0800

    configs: rv1126: support load rkfw in spl
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ia22170cbdbd28980a6d14b46cc8da50fe2ee0ce8

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index 7df6cbee8e..2481cf485f 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -20,6 +20,8 @@ CONFIG_SPL_BOARD_INIT=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
 CONFIG_SPL_STACK_R=y
+CONFIG_SPL_OPTEE=y
+CONFIG_SPL_LOAD_RKFW=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y

commit f8cddc3e74d9a6f23f660e15af423afb5725d857
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Fri Mar 27 17:29:29 2020 +0800

    clk: rockchip: rv1126: Add support for SCR1
    
    Change-Id: I22f0cea9ab0612250ab41526684dc3d786555a37
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rv1126.h b/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
index 30284c10d3..9357a470e3 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
@@ -213,6 +213,12 @@ enum {
 	ACLK_PDBUS_DIV_MASK	= 0x1f,
 
 	/* CRU_CLK_SEL3_CON */
+	CLK_SCR1_SEL_SHIFT	= 15,
+	CLK_SCR1_SEL_MASK	= 1 << CLK_SCR1_SEL_SHIFT,
+	CLK_SCR1_SEL_GPLL	= 0,
+	CLK_SCR1_SEL_CPLL,
+	CLK_SCR1_DIV_SHIFT	= 8,
+	CLK_SCR1_DIV_MASK	= 0x1f << CLK_SCR1_DIV_SHIFT,
 	PCLK_PDBUS_SEL_SHIFT	= 7,
 	PCLK_PDBUS_SEL_MASK	= 1 << PCLK_PDBUS_SEL_SHIFT,
 	PCLK_PDBUS_SEL_GPLL	= 0,
diff --git a/drivers/clk/rockchip/clk_rv1126.c b/drivers/clk/rockchip/clk_rv1126.c
index 0ff7ed9c8c..a8dfdb29b6 100644
--- a/drivers/clk/rockchip/clk_rv1126.c
+++ b/drivers/clk/rockchip/clk_rv1126.c
@@ -1251,6 +1251,39 @@ static ulong rv1126_dclk_vop_set_clk(struct rv1126_clk_priv *priv, ulong rate)
 	return rv1126_dclk_vop_get_clk(priv);
 }
 
+static ulong rv1126_scr1_get_clk(struct rv1126_clk_priv *priv)
+{
+	struct rv1126_cru *cru = priv->cru;
+	u32 div, sel, con, parent;
+
+	con = readl(&cru->clksel_con[3]);
+	div = (con & CLK_SCR1_DIV_MASK) >> CLK_SCR1_DIV_SHIFT;
+	sel = (con & CLK_SCR1_SEL_MASK) >> CLK_SCR1_SEL_SHIFT;
+	if (sel == CLK_SCR1_SEL_GPLL)
+		parent = priv->gpll_hz;
+	else if (sel == CLK_SCR1_SEL_CPLL)
+		parent = priv->cpll_hz;
+	else
+		return -ENOENT;
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rv1126_scr1_set_clk(struct rv1126_clk_priv *priv, ulong rate)
+{
+	struct rv1126_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);
+	assert(src_clk_div - 1 <= 31);
+	rk_clrsetreg(&cru->clksel_con[3],
+		     CLK_SCR1_SEL_MASK | CLK_SCR1_DIV_MASK,
+		     CLK_SCR1_SEL_GPLL << CLK_SCR1_SEL_SHIFT |
+		     (src_clk_div - 1) << CLK_SCR1_DIV_SHIFT);
+
+	return rv1126_scr1_get_clk(priv);
+}
+
 static ulong rv1126_clk_get_rate(struct clk *clk)
 {
 	struct rv1126_clk_priv *priv = dev_get_priv(clk->dev);
@@ -1328,6 +1361,8 @@ static ulong rv1126_clk_get_rate(struct clk *clk)
 	case DCLK_VOP:
 		rate = rv1126_dclk_vop_get_clk(priv);
 		break;
+	case CLK_SCR1_CORE:
+		rate = rv1126_scr1_get_clk(priv);
 	default:
 		return -ENOENT;
 	}
@@ -1412,6 +1447,8 @@ static ulong rv1126_clk_set_rate(struct clk *clk, ulong rate)
 	case DCLK_VOP:
 		ret = rv1126_dclk_vop_set_clk(priv, rate);
 		break;
+	case CLK_SCR1_CORE:
+		ret = rv1126_scr1_set_clk(priv, rate);
 	default:
 		return -ENOENT;
 	}

commit 96f5441ec85563b5b89fed043ccfbeee9f5ef748
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 25 10:07:50 2020 +0800

    common: fit: support spl fit image check by tools/fit_check_sign
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I0e03a90d50290e18c6fb2cd44516c352f3695290

diff --git a/common/bootm.c b/common/bootm.c
index 79ea87bb94..afb01b9238 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -30,6 +30,10 @@
 #include <bootm.h>
 #include <image.h>
 
+#ifdef USE_HOSTCC
+#define CONFIG_SYS_BOOTM_LEN	0x4000000
+#endif
+
 #ifndef CONFIG_SYS_BOOTM_LEN
 /* use 8MByte as default max gunzip size */
 #define CONFIG_SYS_BOOTM_LEN	0x800000
@@ -350,7 +354,8 @@ static int handle_decomp_error(int comp_type, size_t uncomp_size,
 	const char *name = genimg_get_comp_name(comp_type);
 
 	if (uncomp_size >= unc_len)
-		printf("Image too large: increase CONFIG_SYS_BOOTM_LEN\n");
+		printf("Image too large(0x%lx >= 0x%lx): increase CONFIG_SYS_BOOTM_LEN\n",
+		       (ulong)uncomp_size, (ulong)unc_len);
 	else
 		printf("%s: uncompress error %d\n", name, ret);
 
@@ -978,7 +983,7 @@ void memmove_wd(void *to, void *from, size_t len, ulong chunksz)
 	memmove(to, from, len);
 }
 
-static int bootm_host_load_image(const void *fit, int req_image_type)
+static int bootm_host_load_image(const void *fit, int req_image_type, int index)
 {
 	const char *fit_uname_config = NULL;
 	ulong data, len;
@@ -992,9 +997,9 @@ static int bootm_host_load_image(const void *fit, int req_image_type)
 
 	memset(&images, '\0', sizeof(images));
 	images.verify = 1;
-	noffset = fit_image_load(&images, (ulong)fit,
+	noffset = fit_image_load_index(&images, (ulong)fit,
 		NULL, &fit_uname_config,
-		IH_ARCH_DEFAULT, req_image_type, -1,
+		IH_ARCH_DEFAULT, req_image_type, index, -1,
 		FIT_LOAD_IGNORED, &data, &len);
 	if (noffset < 0)
 		return noffset;
@@ -1021,20 +1026,42 @@ static int bootm_host_load_image(const void *fit, int req_image_type)
 	return 0;
 }
 
-int bootm_host_load_images(const void *fit, int cfg_noffset)
+int bootm_host_load_images(const void *fit, int cfg_noffset, int is_spl)
 {
 	static uint8_t image_types[] = {
 		IH_TYPE_KERNEL,
 		IH_TYPE_FLATDT,
 		IH_TYPE_RAMDISK,
 	};
+	static uint8_t image_types_spl[] = {
+		IH_TYPE_FLATDT,
+		IH_TYPE_FIRMWARE,
+		IH_TYPE_LOADABLE,
+		IH_TYPE_LOADABLE,
+		IH_TYPE_LOADABLE,
+	};
+	int loadable_index = 0;
 	int err = 0;
+	int index;
 	int i;
 
-	for (i = 0; i < ARRAY_SIZE(image_types); i++) {
+	for (i = 0; !is_spl && i < ARRAY_SIZE(image_types); i++) {
+		int ret;
+
+		ret = bootm_host_load_image(fit, image_types[i], 0);
+		if (!err && ret && ret != -ENOENT)
+			err = ret;
+	}
+
+	for (i = 0; is_spl && i < ARRAY_SIZE(image_types_spl); i++) {
 		int ret;
 
-		ret = bootm_host_load_image(fit, image_types[i]);
+		if (image_types_spl[i] == IH_TYPE_LOADABLE)
+			index = loadable_index++;
+		else
+			index = 0;
+
+		ret = bootm_host_load_image(fit, image_types_spl[i], index);
 		if (!err && ret && ret != -ENOENT)
 			err = ret;
 	}
diff --git a/common/image-fit.c b/common/image-fit.c
index 40035c765b..1834950505 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -1799,6 +1799,8 @@ static const char *fit_get_image_type_property(int type)
 		return FIT_KERNEL_PROP;
 	case IH_TYPE_RAMDISK:
 		return FIT_RAMDISK_PROP;
+	case IH_TYPE_FIRMWARE:
+		return FIT_FIRMWARE_PROP;
 	case IH_TYPE_X86_SETUP:
 		return FIT_SETUP_PROP;
 	case IH_TYPE_LOADABLE:
@@ -1810,10 +1812,10 @@ static const char *fit_get_image_type_property(int type)
 	return "unknown";
 }
 
-int fit_image_load(bootm_headers_t *images, ulong addr,
-		   const char **fit_unamep, const char **fit_uname_configp,
-		   int arch, int image_type, int bootstage_id,
-		   enum fit_load_op load_op, ulong *datap, ulong *lenp)
+int fit_image_load_index(bootm_headers_t *images, ulong addr,
+			 const char **fit_unamep, const char **fit_uname_configp,
+			 int arch, int image_type, int image_index, int bootstage_id,
+			 enum fit_load_op load_op, ulong *datap, ulong *lenp)
 {
 	int cfg_noffset, noffset;
 	const char *fit_uname;
@@ -1886,8 +1888,8 @@ int fit_image_load(bootm_headers_t *images, ulong addr,
 			bootstage_mark(BOOTSTAGE_ID_FIT_CONFIG);
 		}
 
-		noffset = fit_conf_get_prop_node(fit, cfg_noffset,
-						 prop_name);
+		noffset = fit_conf_get_prop_node_index(fit, cfg_noffset,
+						       prop_name, image_index);
 		fit_uname = fit_get_name(fit, noffset, NULL);
 	}
 	if (noffset < 0) {
@@ -1933,6 +1935,8 @@ int fit_image_load(bootm_headers_t *images, ulong addr,
 	os_ok = image_type == IH_TYPE_FLATDT ||
 		image_type == IH_TYPE_FPGA ||
 		fit_image_check_os(fit, noffset, IH_OS_LINUX) ||
+		fit_image_check_os(fit, noffset, IH_OS_ARM_TRUSTED_FIRMWARE) ||
+		fit_image_check_os(fit, noffset, IH_OS_OP_TEE) ||
 		fit_image_check_os(fit, noffset, IH_OS_U_BOOT) ||
 		fit_image_check_os(fit, noffset, IH_OS_OPENRTOS);
 
@@ -2034,6 +2038,16 @@ int fit_image_load(bootm_headers_t *images, ulong addr,
 	return noffset;
 }
 
+int fit_image_load(bootm_headers_t *images, ulong addr,
+		   const char **fit_unamep, const char **fit_uname_configp,
+		   int arch, int image_type, int bootstage_id,
+		   enum fit_load_op load_op, ulong *datap, ulong *lenp)
+{
+	return fit_image_load_index(images, addr,fit_unamep, fit_uname_configp,
+				    arch, image_type, 0, bootstage_id,
+				    load_op, datap, lenp);
+}
+
 int boot_get_setup_fit(bootm_headers_t *images, uint8_t arch,
 			ulong *setup_start, ulong *setup_len)
 {
diff --git a/include/bootm.h b/include/bootm.h
index 19c3ad9d8a..2274ab5350 100644
--- a/include/bootm.h
+++ b/include/bootm.h
@@ -41,7 +41,7 @@ void lynxkdi_boot(image_header_t *hdr);
 
 boot_os_fn *bootm_os_get_boot_func(int os);
 
-int bootm_host_load_images(const void *fit, int cfg_noffset);
+int bootm_host_load_images(const void *fit, int cfg_noffset, int is_spl);
 
 int boot_selected_os(int argc, char * const argv[], int state,
 		     bootm_headers_t *images, boot_os_fn *boot_fn);
diff --git a/include/image.h b/include/image.h
index a2d008f35b..4d877b84d1 100644
--- a/include/image.h
+++ b/include/image.h
@@ -656,6 +656,11 @@ int fit_image_load(bootm_headers_t *images, ulong addr,
 		   int arch, int image_type, int bootstage_id,
 		   enum fit_load_op load_op, ulong *datap, ulong *lenp);
 
+int fit_image_load_index(bootm_headers_t *images, ulong addr,
+		   const char **fit_unamep, const char **fit_uname_configp,
+		   int arch, int image_type, int image_index, int bootstage_id,
+		   enum fit_load_op load_op, ulong *datap, ulong *lenp);
+
 #ifndef USE_HOSTCC
 /**
  * fit_get_node_from_config() - Look up an image a FIT by type
diff --git a/tools/fdt_host.h b/tools/fdt_host.h
index 98acf278a3..d962368c12 100644
--- a/tools/fdt_host.h
+++ b/tools/fdt_host.h
@@ -28,6 +28,6 @@
  */
 int fdt_remove_unused_strings(const void *old, void *new);
 
-int fit_check_sign(const void *working_fdt, const void *key);
+int fit_check_sign(const void *working_fdt, const void *key, int is_spl);
 
 #endif /* __FDT_HOST_H__ */
diff --git a/tools/fit_check_sign.c b/tools/fit_check_sign.c
index d9361b0095..06d3f08b3e 100644
--- a/tools/fit_check_sign.c
+++ b/tools/fit_check_sign.c
@@ -46,10 +46,11 @@ int main(int argc, char **argv)
 	int ret;
 	void *key_blob;
 	int c;
+	int is_spl = 0;
 
 	strncpy(cmdname, *argv, sizeof(cmdname) - 1);
 	cmdname[sizeof(cmdname) - 1] = '\0';
-	while ((c = getopt(argc, argv, "f:k:")) != -1)
+	while ((c = getopt(argc, argv, "f:k:s")) != -1)
 		switch (c) {
 		case 'f':
 			fdtfile = optarg;
@@ -57,6 +58,9 @@ int main(int argc, char **argv)
 		case 'k':
 			keyfile = optarg;
 			break;
+		case 's':
+			is_spl = 1;
+			break;
 		default:
 			usage(cmdname);
 			break;
@@ -79,7 +83,7 @@ int main(int argc, char **argv)
 		return EXIT_FAILURE;
 
 	image_set_host_blob(key_blob);
-	ret = fit_check_sign(fit_blob, key_blob);
+	ret = fit_check_sign(fit_blob, key_blob, is_spl);
 	if (!ret) {
 		ret = EXIT_SUCCESS;
 		fprintf(stderr, "Signature check OK\n");
diff --git a/tools/image-host.c b/tools/image-host.c
index 5d31044558..7208df5c16 100644
--- a/tools/image-host.c
+++ b/tools/image-host.c
@@ -728,7 +728,7 @@ int fit_add_verification_data(const char *keydir, void *keydest, void *fit,
 }
 
 #ifdef CONFIG_FIT_SIGNATURE
-int fit_check_sign(const void *fit, const void *key)
+int fit_check_sign(const void *fit, const void *key, int is_spl)
 {
 	int cfg_noffset;
 	int ret;
@@ -741,7 +741,7 @@ int fit_check_sign(const void *fit, const void *key)
 	ret = fit_config_verify(fit, cfg_noffset);
 	if (ret)
 		return ret;
-	ret = bootm_host_load_images(fit, cfg_noffset);
+	ret = bootm_host_load_images(fit, cfg_noffset, is_spl);
 
 	return ret;
 }

commit 8e3eb57c1c298c841bd3948769bd99372f6f415a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Mar 19 14:23:11 2020 +0800

    rockchip: add arm 32/64 its file for verified-boot image
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If4d76b8736510ca6455a4b448e9d2ed1be5721fe

diff --git a/arch/arm/mach-rockchip/kernel_arm.its b/arch/arm/mach-rockchip/kernel_arm.its
new file mode 100644
index 0000000000..e717ccea08
--- /dev/null
+++ b/arch/arm/mach-rockchip/kernel_arm.its
@@ -0,0 +1,82 @@
+/*
+ * Copyright (C) 2020 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * Minimal dts for a FIT image.
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+/dts-v1/;
+/ {
+	description = "U-Boot FIT source file for arm";
+	#address-cells = <1>;
+
+	images {
+		fdt@1 {
+			description = "Device tree blob for arm";
+			data = /incbin/("images/rk-kernel.dtb");
+			type = "flat_dt";
+			arch = "arm";
+			compression = "none";
+			load  = <0xffffff00>;
+			hash@1 {
+				algo = "sha256";
+			};
+		};
+
+		kernel@1 {
+			description = "Kernel for arm";
+			data = /incbin/("images/kernel.img");
+			type = "kernel";
+			arch = "arm";
+			os = "linux";
+			compression = "none";
+			entry = <0xffffff01>;
+			load  = <0xffffff01>;
+			hash@1 {
+				algo = "sha256";
+			};
+		};
+
+		ramdisk@1 {
+			description = "Ramdisk for arm";
+			data = /incbin/("images/ramdisk.img");
+			type = "ramdisk";
+			arch = "arm";
+			os = "linux";
+			compression = "none";
+			load  = <0xffffff02>;
+			hash@1 {
+				algo = "sha256";
+			};
+		};
+
+		resource@1 {
+			description = "Resource for arm";
+			data = /incbin/("images/resource.img");
+			type = "multi";
+			arch = "arm";
+			compression = "none";
+			hash@1 {
+				algo = "sha256";
+			};
+		};
+	};
+
+	configurations {
+		default = "conf@1";
+		conf@1 {
+			description = "Boot Linux kernel with FDT blob";
+			conf-version = <1>;
+			fdt = "fdt@1";
+			kernel = "kernel@1";
+			ramdisk = "ramdisk@1";
+			multi = "resource@1";
+			signature@1 {
+				algo = "sha256,rsa2048";
+				key-name-hint = "dev";
+				sign-images = "fdt", "kernel", "ramdisk", "multi";
+			};
+		};
+	};
+};
diff --git a/arch/arm/mach-rockchip/kernel_arm64.its b/arch/arm/mach-rockchip/kernel_arm64.its
new file mode 100644
index 0000000000..06ee7997d4
--- /dev/null
+++ b/arch/arm/mach-rockchip/kernel_arm64.its
@@ -0,0 +1,83 @@
+/*
+ * Copyright (C) 2020 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * Minimal dts for a FIT image.
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+/dts-v1/;
+/ {
+	description = "U-Boot FIT source file for arm64";
+	#address-cells = <1>;
+
+	images {
+		fdt@1 {
+			description = "Device tree blob for arm64";
+			data = /incbin/("images/rk-kernel.dtb");
+			type = "flat_dt";
+			arch = "arm64";
+			compression = "none";
+			load  = <0xffffff00>;
+			hash@1 {
+				algo = "sha256";
+			};
+		};
+
+		kernel@1 {
+			description = "Kernel for arm64";
+			kernel-version = <1>;
+			data = /incbin/("images/kernel.img");
+			type = "kernel";
+			arch = "arm64";
+			os = "linux";
+			compression = "none";
+			entry = <0xffffff01>;
+			load  = <0xffffff01>;
+			hash@1 {
+				algo = "sha256";
+			};
+		};
+
+		ramdisk@1 {
+			description = "Ramdisk for arm64";
+			data = /incbin/("images/ramdisk.img");
+			type = "ramdisk";
+			arch = "arm64";
+			os = "linux";
+			compression = "none";
+			load  = <0xffffff02>;
+			hash@1 {
+				algo = "sha256";
+			};
+		};
+
+		resource@1 {
+			description = "Resource for arm64";
+			data = /incbin/("images/resource.img");
+			type = "multi";
+			arch = "arm64";
+			compression = "none";
+			hash@1 {
+				algo = "sha256";
+			};
+		};
+	};
+
+	configurations {
+		default = "conf@1";
+		conf@1 {
+			description = "Boot Linux kernel with FDT blob";
+			conf-version = <1>;
+			fdt = "fdt@1";
+			kernel = "kernel@1";
+			ramdisk = "ramdisk@1";
+			multi = "resource@1";
+			signature@1 {
+				algo = "sha256,rsa2048";
+				key-name-hint = "dev";
+				sign-images = "fdt", "kernel", "ramdisk", "multi";
+			};
+		};
+	};
+};

commit bfbe87590f32d5c22e4aad4e6ca91be8b55fe722
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Mar 28 18:15:15 2020 +0800

    cmd: bootuimage: return -1 as error code
    
    support autoboot to traverse all bootcmd list.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I03f10a5982c4a9bb0eee429f756dd19c027c3371

diff --git a/cmd/bootuimage.c b/cmd/bootuimage.c
index 4be0cf1c68..1b4122c02d 100644
--- a/cmd/bootuimage.c
+++ b/cmd/bootuimage.c
@@ -70,11 +70,11 @@ static int do_boot_uimage(cmd_tbl_t *cmdtp, int flag,
 
 	if (!img) {
 		UIMG_I("Failed to load multi images\n");
-		return -EINVAL;
+		goto out;
 	}
 
 	if (uimage_sysmem_reserve_each(img, &ramdisk_sz))
-		return -ENOMEM;
+		goto out;
 
 	snprintf(uimg_addr, sizeof(uimg_addr), "0x%lx", (ulong)img);
 	bootm_args[0] = uimg_addr;
@@ -91,10 +91,14 @@ static int do_boot_uimage(cmd_tbl_t *cmdtp, int flag,
 		BOOTM_STATE_OS_PREP | BOOTM_STATE_OS_FAKE_GO |
 		BOOTM_STATE_OS_GO, &images, 1);
 
-	if (ret && argc != 1)
+	if (ret && argc != 1) {
 		uimage_sysmem_free_each(img, ramdisk_sz);
+		ret = -1;
+	}
 
 	return ret;
+out:
+	return -1;
 }
 
 U_BOOT_CMD(

commit e2c45c31e9964e2e49873f89f045cc43eb7080c4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Mar 28 18:13:34 2020 +0800

    cmd: bootfit: return -1 as error code
    
    support autoboot to traverse all bootcmd list.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ibb35c20fb9ffcf58130aaeaea072c2dd6bc46256

diff --git a/cmd/bootfit.c b/cmd/bootfit.c
index 8bbf8b114a..c3250a8392 100644
--- a/cmd/bootfit.c
+++ b/cmd/bootfit.c
@@ -75,17 +75,17 @@ static int do_boot_fit(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 
 	if (!fit) {
 		FIT_I("No FIT image\n");
-		return -EBADF;
+		goto out;
 	}
 
 	if (fdt_check_header(fit)) {
 		FIT_I("Invalid FIT format\n");
-		return -EBADF;
+		goto out;
 	}
 
 	/* reserve memory to avoid memory overlap and fixup entry & load !! */
 	if (fit_image_fixup_and_sysmem_rsv(fit))
-		return -ENOMEM;
+		goto out;
 
 	env_set("bootm-no-reloc", "y");
 	snprintf(fit_addr, sizeof(fit_addr), "0x%lx", (ulong)fit);
@@ -103,10 +103,14 @@ static int do_boot_fit(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 		BOOTM_STATE_OS_PREP | BOOTM_STATE_OS_FAKE_GO |
 		BOOTM_STATE_OS_GO, &images, 1);
 
-	if (ret && argc != 1)
+	if (ret && argc != 1) {
 		fit_sysmem_free_each(fit);
+		ret = -1;
+	}
 
 	return ret;
+out:
+	return -1;
 }
 
 U_BOOT_CMD(

commit 9889a0e0a73be5df6df02fb404524ad90a62c33e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Mar 28 14:54:08 2020 +0800

    rockchip: hotkey: update configure name
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ie04b4aa61900f11937f93b6a363ad827a8b7dd86

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 720842d079..f008072716 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -311,6 +311,9 @@ static void board_debug_init(void)
 		if (gd->console_evt <= 0x1a) /* 'z' */
 			printf("Hotkey: ctrl+%c\n", gd->console_evt + 'a' - 1);
 	}
+
+	if (IS_ENABLED(CONFIG_CONSOLE_DISABLE_CLI))
+		printf("CLI: off\n");
 }
 
 int board_init(void)
diff --git a/arch/arm/mach-rockchip/hotkey.c b/arch/arm/mach-rockchip/hotkey.c
index 2bed1cc188..37a03df862 100644
--- a/arch/arm/mach-rockchip/hotkey.c
+++ b/arch/arm/mach-rockchip/hotkey.c
@@ -34,10 +34,9 @@ bool is_hotkey(enum hotkey_t id)
 		return gd->console_evt == CTRL_R;
 	case HK_SYSMEM:
 		return gd->console_evt == CTRL_M;
-#if defined(CONFIG_CONSOLE_DISABLE_CTRLC) && \
-    defined(CONFIG_BOOTDELAY) && (CONFIG_BOOTDELAY <= 0)
 	case HK_BROM_DNL:
 		return gd->console_evt == CTRL_B;
+#ifndef CONFIG_CONSOLE_DISABLE_CLI
 	case HK_ROCKUSB_DNL:
 		return gd->console_evt == CTRL_D;
 	case HK_FASTBOOT:
@@ -71,8 +70,6 @@ void hotkey_run(enum hotkey_t id)
 		if (gd->console_evt == CTRL_T)
 			run_command("fdt print", 0);
 		break;
-#if defined(CONFIG_CONSOLE_DISABLE_CTRLC) && \
-    defined(CONFIG_BOOTDELAY) && (CONFIG_BOOTDELAY <= 0)
 	case HK_CLI_OS_PRE:
 		if (gd->console_evt == CTRL_A)
 			cli_loop();
@@ -81,7 +78,6 @@ void hotkey_run(enum hotkey_t id)
 		if (gd->console_evt == CTRL_S)
 			cli_loop();
 		break;
-#endif
 	default:
 		break;
 	}

commit 37526a5172ae03b202a6370d2d2db0dce335b5a9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Mar 28 15:27:34 2020 +0800

    common: support disable CLI for verified-boot
    
    Not allow any interactive from CLI.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I207da3f2c54df1a81100c404f045023ac763da73

diff --git a/common/Kconfig b/common/Kconfig
index 1a005b1722..4a76d02ad5 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -250,10 +250,12 @@ config CONSOLE_RECORD_IN_SIZE
 	  The buffer is allocated immediately after the malloc() region is
 	  ready.
 
-config CONSOLE_DISABLE_CTRLC
+config CONSOLE_DISABLE_CLI
 	bool "disable ctrlc"
+	depends on BOOTDELAY = 0
+	default y if AVB_VBMETA_PUBLIC_KEY_VALIDATE || FIT_SIGNATURE
 	help
-	  This disable ctrl+c when CONFIG_BOOTDELAY is 0.
+	  This disable CLI interactive in verified-boot.
 
 config DISABLE_CONSOLE
 	bool "disable console in & out"
diff --git a/common/autoboot.c b/common/autoboot.c
index d30d4e6701..760f44cf34 100644
--- a/common/autoboot.c
+++ b/common/autoboot.c
@@ -220,7 +220,7 @@ static int __abortboot(int bootdelay)
 #endif
 
 #ifdef CONFIG_ARCH_ROCKCHIP
-	if (ctrlc()) {	/* we press ctrl+c ? */
+	if (!IS_ENABLED(CONFIG_CONSOLE_DISABLE_CLI) && ctrlc()) {	/* we press ctrl+c ? */
 #else
 	/*
 	 * Check if key already pressed
diff --git a/common/cli.c b/common/cli.c
index 57874d8797..a96db7e3e1 100644
--- a/common/cli.c
+++ b/common/cli.c
@@ -212,6 +212,7 @@ err:
 }
 #endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
 
+#ifndef CONFIG_CONSOLE_DISABLE_CLI
 void cli_loop(void)
 {
 #ifdef CONFIG_HUSH_PARSER
@@ -224,6 +225,9 @@ void cli_loop(void)
 	printf("## U-Boot command line is disabled. Please enable CONFIG_CMDLINE\n");
 #endif /*CONFIG_HUSH_PARSER*/
 }
+#else
+void cli_loop(void) { }
+#endif
 
 void cli_init(void)
 {
diff --git a/common/console.c b/common/console.c
index 3e96261ad7..f399024397 100644
--- a/common/console.c
+++ b/common/console.c
@@ -655,11 +655,6 @@ static int ctrlc_disabled = 0;	/* see disable_ctrl() */
 static int ctrlc_was_pressed = 0;
 int ctrlc(void)
 {
-#if defined(CONFIG_CONSOLE_DISABLE_CTRLC) && \
-    defined(CONFIG_BOOTDELAY) && (CONFIG_BOOTDELAY <= 0)
-	return 0;
-#endif
-
 #ifndef CONFIG_SANDBOX
 	if (!ctrlc_disabled && gd->have_console) {
 		if (tstc()) {
diff --git a/lib/avb/libavb_user/Kconfig b/lib/avb/libavb_user/Kconfig
index 6a5a307d4a..33dff1bc79 100755
--- a/lib/avb/libavb_user/Kconfig
+++ b/lib/avb/libavb_user/Kconfig
@@ -9,7 +9,6 @@ config AVB_LIBAVB_USER
 config AVB_VBMETA_PUBLIC_KEY_VALIDATE
 	bool "Support vbmeta public key validate"
 	depends on AVB_LIBAVB_USER
-	select CONSOLE_DISABLE_CTRLC
 	help
 	  support vbmeta public key validate, system bootflow would be
 	  uninterruptale when it is enabled:

commit 4ab50248f6621ff730a3e1983cce090ca6d15dfc
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Mar 28 14:56:11 2020 +0800

    rockchip: implement autoboot_command_fail_handle()
    
    It's not friendly to handle the fail event in a bootcmd list,
    let's handle this in C function.
    
    Entering rockusb/fastboot mode after verified-boot failed.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ib617582e1cc386f5c30abe1a8bbd2b5f353c0e49

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index c8ffb9681a..720842d079 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -754,3 +754,15 @@ int board_do_bootm(int argc, char * const argv[])
 	return 0;
 }
 #endif
+
+void autoboot_command_fail_handle(void)
+{
+#ifdef CONFIG_AVB_VBMETA_PUBLIC_KEY_VALIDATE
+#ifdef CONFIG_ANDROID_AB
+	run_command("fastboot usb 0;", 0);  /* use fastboot to ative slot */
+#else
+	run_command("rockusb 0 ${devtype} ${devnum}", 0);
+	run_command("fastboot usb 0;", 0);
+#endif
+#endif
+}
diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index 16b63a2266..591bcb46d3 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -133,33 +133,17 @@
 		"setenv devtype spinor; setenv devnum 1;" \
 	"fi; \0"
 
-#ifdef CONFIG_AVB_VBMETA_PUBLIC_KEY_VALIDATE
-#ifndef CONFIG_ANDROID_AB
-#define RKIMG_BOOTCOMMAND \
-	"boot_android ${devtype} ${devnum};" \
-	"echo AVB boot failed and enter rockusb or fastboot!;" \
-	"rockusb 0 ${devtype} ${devnum};" \
-	"fastboot usb 0;"
+#if defined(CONFIG_AVB_VBMETA_PUBLIC_KEY_VALIDATE)
+#define RKIMG_BOOTCOMMAND			\
+	"boot_android ${devtype} ${devnum};"
 #else
-/*
- * Update images a/b and active slot with fastboot
- * when avb+ab system boot failed.
- * Remove rockusb since it unable to active slot.
- */
-#define RKIMG_BOOTCOMMAND \
-	"boot_android ${devtype} ${devnum};" \
-	"echo AVB boot failed and enter fastboot!;" \
-	"fastboot usb 0;"
-#endif /* CONFIG_ANDROID_AB */
-#else /* CONFIG_AVB_VBMETA_PUBLIC_KEY_VALIDATE */
-#define RKIMG_BOOTCOMMAND \
-	"boot_android ${devtype} ${devnum};" \
-	"bootrkp;" \
-	"boot_fit;" \
-	"boot_uimage;" \
+#define RKIMG_BOOTCOMMAND			\
+	"boot_android ${devtype} ${devnum};"	\
+	"bootrkp;"				\
 	"run distro_bootcmd;"
 #endif
-#endif
+
+#endif /* CONFIG_SPL_BUILD */
 
 #define CONFIG_DISPLAY_BOARDINFO_LATE
 

commit 7fc773a76d5b2798e17f90796169d494a757d127
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Mar 28 14:55:01 2020 +0800

    common: add autoboot_command_fail_handle() callback
    
    Maybe user need to do some job when bootcmd failed, they
    could override it.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I1c32c1ad37700e66d45fe033fbfa46d3f350205d

diff --git a/common/main.c b/common/main.c
index 6a1159879e..225d06967b 100644
--- a/common/main.c
+++ b/common/main.c
@@ -20,6 +20,12 @@ DECLARE_GLOBAL_DATA_PTR;
  */
 __weak void show_boot_progress(int val) {}
 
+/*
+ * Board-specific Platform code can reimplement autoboot_command_fail_handle ()
+ * if needed
+ */
+__weak void autoboot_command_fail_handle(void) {}
+
 static void run_preboot_environment_command(void)
 {
 #ifdef CONFIG_PREBOOT
@@ -64,6 +70,7 @@ void main_loop(void)
 		cli_secure_boot_cmd(s);
 
 	autoboot_command(s);
+	autoboot_command_fail_handle();
 
 	cli_loop();
 	panic("No CLI available");
diff --git a/include/common.h b/include/common.h
index 9a2e2c8b4b..b6b8c374fe 100644
--- a/include/common.h
+++ b/include/common.h
@@ -103,6 +103,7 @@ int	cpu_init(void);
 
 /* common/main.c */
 void	main_loop	(void);
+void autoboot_command_fail_handle(void);
 int run_command(const char *cmd, int flag);
 int run_command_repeatable(const char *cmd, int flag);
 

commit 96158db731b61d86bf4beb50b01e1be9d60c3650
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Mar 28 15:17:53 2020 +0800

    arm: rockchip: select CONFIG_PANIC_HANG
    
    Not reset system.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I03b02fa0aada05dcea34a3e4609c68cc1b9cb029

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index a091bd7a57..c55dc521d2 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1146,6 +1146,7 @@ config ARCH_ROCKCHIP
 	select SYS_NS16550
 	select SPI
 	select DEBUG_UART_BOARD_INIT
+	select PANIC_HANG
 	imply CMD_FASTBOOT
 	imply FASTBOOT
 	imply FAT_WRITE

commit 5f14e3de5613a9f6375e688404b22bad1d6703a4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Mar 28 16:08:12 2020 +0800

    include: rsa: fix compile error
    
    Fix for: CONFIG_SPL_FIT_SIGNATURE && !CONFIG_FIT_SIGNATURE
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I8242d208db14aa9066bb8c6d430686f909258844

diff --git a/include/u-boot/rsa.h b/include/u-boot/rsa.h
index 0e96c38711..a7d361ef83 100644
--- a/include/u-boot/rsa.h
+++ b/include/u-boot/rsa.h
@@ -82,7 +82,7 @@ static inline int rsa_add_verify_data(struct image_sign_info *info,
 }
 #endif
 
-#if IMAGE_ENABLE_VERIFY
+#if IMAGE_ENABLE_VERIFY || defined(CONFIG_SPL_FIT_SIGNATURE)
 /**
  * rsa_verify() - Verify a signature against some data
  *

commit 6ea30212cc857c8d9385a0bd94b3eab284789e07
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Fri Mar 27 16:39:42 2020 +0800

    clk: rockchip: rv1126: Rename I2S clocks
    
    Change-Id: Idc6659013dde74f09e86a7120fc42348b87d63f8
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/dts/rv1126.dtsi b/arch/arm/dts/rv1126.dtsi
index aaec6fa93a..1adbb55289 100644
--- a/arch/arm/dts/rv1126.dtsi
+++ b/arch/arm/dts/rv1126.dtsi
@@ -1031,11 +1031,11 @@
 		compatible = "rockchip,rv1126-i2s-tdm";
 		reg = <0xff800000 0x1000>;
 		interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru MCLK_I2S8CH_TX>, <&cru MCLK_I2S8CH_RX>, <&cru HCLK_I2S8CH>;
+		clocks = <&cru MCLK_I2S0_TX>, <&cru MCLK_I2S0_RX>, <&cru HCLK_I2S0>;
 		clock-names = "mclk_tx", "mclk_rx", "hclk";
 		dmas = <&dmac 20>, <&dmac 19>;
 		dma-names = "tx", "rx";
-		resets = <&cru SRST_I2S8CH_TX_M>, <&cru SRST_I2S8CH_RX_M>;
+		resets = <&cru SRST_I2S0_TX_M>, <&cru SRST_I2S0_RX_M>;
 		reset-names = "tx-m", "rx-m";
 		rockchip,cru = <&cru>;
 		rockchip,grf = <&grf>;
@@ -1056,7 +1056,7 @@
 		compatible = "rockchip,rv1126-i2s", "rockchip,rk3066-i2s";
 		reg = <0xff810000 0x1000>;
 		interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru MCLK_I2S2CH0>, <&cru HCLK_I2S2CH0>;
+		clocks = <&cru MCLK_I2S1>, <&cru HCLK_I2S1>;
 		clock-names = "i2s_clk", "i2s_hclk";
 		dmas = <&dmac 22>, <&dmac 21>;
 		dma-names = "tx", "rx";
@@ -1072,7 +1072,7 @@
 		compatible = "rockchip,rv1126-i2s", "rockchip,rk3066-i2s";
 		reg = <0xff820000 0x1000>;
 		interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru MCLK_I2S2CH1>, <&cru HCLK_I2S2CH1>;
+		clocks = <&cru MCLK_I2S2>, <&cru HCLK_I2S2>;
 		clock-names = "i2s_clk", "i2s_hclk";
 		dmas = <&dmac 24>, <&dmac 23>;
 		dma-names = "tx", "rx";
diff --git a/include/dt-bindings/clock/rv1126-cru.h b/include/dt-bindings/clock/rv1126-cru.h
index 17ffe93ce1..280df25f14 100644
--- a/include/dt-bindings/clock/rv1126-cru.h
+++ b/include/dt-bindings/clock/rv1126-cru.h
@@ -121,26 +121,26 @@
 #define CLK_CPU_TSADCPHY	55
 #define CLK_CRYPTO_CORE		56
 #define CLK_CRYPTO_PKA		57
-#define MCLK_I2S8CH_TX_DIV	58
-#define MCLK_I2S8CH_TX_FRACDIV	59
-#define MCLK_I2S8CH_TX_MUX	60
-#define MCLK_I2S8CH_TX		61
-#define MCLK_I2S8CH_RX_DIV	62
-#define MCLK_I2S8CH_RX_FRACDIV	63
-#define MCLK_I2S8CH_RX_MUX	64
-#define MCLK_I2S8CH_RX		65
-#define MCLK_I2S8CH_TX_OUT2IO	66
-#define MCLK_I2S8CH_RX_OUT2IO	67
-#define MCLK_I2S2CH0_DIV	68
-#define MCLK_I2S2CH0_FRACDIV	69
-#define MCLK_I2S2CH0_MUX	70
-#define MCLK_I2S2CH0		71
-#define MCLK_I2S2CH0_OUT2IO	72
-#define MCLK_I2S2CH1_DIV	73
-#define MCLK_I2S2CH1_FRACDIV	74
-#define MCLK_I2S2CH1_MUX	75
-#define MCLK_I2S2CH1		76
-#define MCLK_I2S2CH1_OUT2IO	77
+#define MCLK_I2S0_TX_DIV	58
+#define MCLK_I2S0_TX_FRACDIV	59
+#define MCLK_I2S0_TX_MUX	60
+#define MCLK_I2S0_TX		61
+#define MCLK_I2S0_RX_DIV	62
+#define MCLK_I2S0_RX_FRACDIV	63
+#define MCLK_I2S0_RX_MUX	64
+#define MCLK_I2S0_RX		65
+#define MCLK_I2S0_TX_OUT2IO	66
+#define MCLK_I2S0_RX_OUT2IO	67
+#define MCLK_I2S1_DIV		68
+#define MCLK_I2S1_FRACDIV	69
+#define MCLK_I2S1_MUX		70
+#define MCLK_I2S1		71
+#define MCLK_I2S1_OUT2IO	72
+#define MCLK_I2S2_DIV		73
+#define MCLK_I2S2_FRACDIV	74
+#define MCLK_I2S2_MUX		75
+#define MCLK_I2S2		76
+#define MCLK_I2S2_OUT2IO	77
 #define MCLK_PDM		78
 #define SCLK_ADUPWM_DIV		79
 #define SCLK_AUDPWM_FRACDIV	80
@@ -266,9 +266,9 @@
 #define HCLK_PDCRYPTO		202
 #define HCLK_CRYPTO		203
 #define HCLK_PDAUDIO		204
-#define HCLK_I2S8CH		205
-#define HCLK_I2S2CH0		206
-#define HCLK_I2S2CH1		207
+#define HCLK_I2S0		205
+#define HCLK_I2S1		206
+#define HCLK_I2S2		207
 #define HCLK_PDM		208
 #define HCLK_AUDPWM		209
 #define HCLK_PDVEPU		210
@@ -488,13 +488,13 @@
 /* cru_softrst_con6 */
 #define SRST_PDAUDIO_NIU_H	96
 #define SRST_PDAUDIO_NIU_P	97
-#define SRST_I2S8CH_H		98
-#define SRST_I2S8CH_TX_M	99
-#define SRST_I2S8CH_RX_M	100
-#define SRST_I2S2CH0_H		101
-#define SRST_I2S2CH0_M		102
-#define SRST_I2S2CH1_H		103
-#define SRST_I2S2CH1_M		104
+#define SRST_I2S0_H		98
+#define SRST_I2S0_TX_M		99
+#define SRST_I2S0_RX_M		100
+#define SRST_I2S1_H		101
+#define SRST_I2S1_M		102
+#define SRST_I2S2_H		103
+#define SRST_I2S2_M		104
 #define SRST_PDM_H		105
 #define SRST_PDM_M		106
 #define SRST_AUDPWM_H		107

commit 032bdc838e93ff3db57135ccac9876321db5b2ef
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Thu Mar 26 10:07:05 2020 +0800

    rockchip: rv1126: add rockchip_get_clk/cru interface
    
    Change-Id: I88684c98a9126c750e6966f1fccab13f736cf957
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rv1126/clk_rv1126.c b/arch/arm/mach-rockchip/rv1126/clk_rv1126.c
new file mode 100644
index 0000000000..63b32322d4
--- /dev/null
+++ b/arch/arm/mach-rockchip/rv1126/clk_rv1126.c
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rv1126.h>
+
+int rockchip_get_clk(struct udevice **devp)
+{
+	return uclass_get_device_by_driver(UCLASS_CLK,
+			DM_GET_DRIVER(rockchip_rv1126_cru), devp);
+}
+
+void *rockchip_get_cru(void)
+{
+	struct rv1126_clk_priv *priv;
+	struct udevice *dev;
+	int ret;
+
+	ret = rockchip_get_clk(&dev);
+	if (ret)
+		return ERR_PTR(ret);
+
+	priv = dev_get_priv(dev);
+
+	return priv->cru;
+}

commit e1e9b173e4ed1e3868a50c2e5953271db3e2b725
Merge: 1e25cba32a a86a723e2e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Mar 28 15:01:31 2020 +0800

    Merge branch 'next-dev' into thunder-boot

commit 4e07096a0b3235203e83a02655b2a4750a183354
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Mar 19 14:21:48 2020 +0800

    rockchip: fit: reserve LSB as an image identity number
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I917e89793aebc6a411ad7e4678b00e7f7b770e73

diff --git a/arch/arm/mach-rockchip/fit.c b/arch/arm/mach-rockchip/fit.c
index fbfda43d1a..1e442df05c 100644
--- a/arch/arm/mach-rockchip/fit.c
+++ b/arch/arm/mach-rockchip/fit.c
@@ -13,7 +13,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define FIT_PLACEHOLDER_ADDR		0xffffffff
+#define FIT_PLACEHOLDER_ADDR		0xffffff00
 
 /*
  * Must use args '-E -p' for mkimage to generate FIT image, 4K as max assumption.
@@ -30,6 +30,11 @@ static int fit_is_signed(void *fit, const void *sig_blob)
 	return fdt_subnode_offset(sig_blob, 0, FIT_SIG_NODENAME) < 0 ? 0 : 1;
 }
 
+static inline int fit_is_placeholder_addr(ulong addr)
+{
+	return (addr & 0xffffff00) == FIT_PLACEHOLDER_ADDR;
+}
+
 static int fit_is_required(void *fit, const void *sig_blob)
 {
 	int sig_node;
@@ -84,7 +89,7 @@ int fit_fixup_load_entry(void *fit, int images, int defconf,
 	int uname_cfg;
 	int err;
 
-	if ((*load != FIT_PLACEHOLDER_ADDR) ||
+	if (!fit_is_placeholder_addr(*load) ||
 		fit_is_required(fit, gd_fdt_blob()))
 		return 0;
 

commit ba2acfb819a3ddf176971c4a0c46094f8b52309d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 25 10:13:37 2020 +0800

    rockchip: make_fit_atf.py: update conf@1 descrption and arch
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I5eeb1b897508db1073b2ec63b9e28a895c1f417b

diff --git a/arch/arm/mach-rockchip/make_fit_atf.py b/arch/arm/mach-rockchip/make_fit_atf.py
index 5f832e7538..9f54fcbb82 100755
--- a/arch/arm/mach-rockchip/make_fit_atf.py
+++ b/arch/arm/mach-rockchip/make_fit_atf.py
@@ -91,6 +91,7 @@ def append_fdt_node(file, dtbs):
         print >> file, '\t\t\tdescription = "U-Boot device tree blob";'
         print >> file, '\t\t\tdata = /incbin/("u-boot.dtb");'
         print >> file, '\t\t\ttype = "flat_dt";'
+        print >> file, '\t\t\tarch = "arm64";'
         print >> file, '\t\t\tcompression = "none";'
         print >> file, '\t\t\thash@1 {'
         print >> file, '\t\t\t\talgo = "sha256";'
@@ -101,7 +102,7 @@ def append_fdt_node(file, dtbs):
 
 def append_conf_section(file, cnt, dtname, atf_cnt):
     print >> file, '\t\tconfig@%d {' % cnt
-    print >> file, '\t\t\tdescription = "%s";' % dtname
+    print >> file, '\t\t\tdescription = "Rockchip armv8 with ATF";'
     print >> file, '\t\t\tfirmware = "atf@1";'
     print >> file, '\t\t\tloadables = "uboot@1",',
     for i in range(1, atf_cnt):

commit 311b4dd6293a9f372900f1cd99ab764bf5f3d708
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 24 20:42:40 2020 +0800

    rockchip: make_fit_optee.sh: add components for verified boot
    
    Require sha256 and rsa2048 for all images to be signed.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I5c74f811fe5c49a2552a5a059c200a0d35f210cb

diff --git a/arch/arm/mach-rockchip/make_fit_optee.sh b/arch/arm/mach-rockchip/make_fit_optee.sh
index f91c31e544..053b1b5d14 100755
--- a/arch/arm/mach-rockchip/make_fit_optee.sh
+++ b/arch/arm/mach-rockchip/make_fit_optee.sh
@@ -29,8 +29,10 @@ UBOOT_OFFSET=0x00200000
 UBOOT_BASE=$((DARM_BASE+UBOOT_OFFSET))
 UBOOT_BASE=$(echo "obase=16;${UBOOT_BASE}"|bc)
 echo "			load = <0x"$UBOOT_BASE">;"
-
 cat << EOF
+			hash@1 {
+				algo = "sha256";
+			};
 		};
 		optee@1 {
 			description = "OP-TEE";
@@ -46,14 +48,19 @@ TEE_LOAD_ADDR=$((DARM_BASE+TEE_OFFSET))
 TEE_LOAD_ADDR=$(echo "obase=16;${TEE_LOAD_ADDR}"|bc)
 echo "			load = <0x"$TEE_LOAD_ADDR">;"
 echo "			entry = <0x"$TEE_LOAD_ADDR">;"
-
 cat << EOF
+			hash@1 {
+				algo = "sha256";
+			};
 		};
 		fdt@1 {
-			description = "dtb";
+			description = "U-Boot dtb";
 			data = /incbin/("./u-boot.dtb");
 			type = "flat_dt";
 			compression = "none";
+			hash@1 {
+				algo = "sha256";
+			};
 		};
 	};
 
@@ -64,6 +71,11 @@ cat << EOF
 			firmware = "optee@1";
 			loadables = "uboot@1";
 			fdt = "fdt@1";
+			signature@1 {
+				algo = "sha256,rsa2048";
+				key-name-hint = "dev";
+				sign-images = "fdt", "firmware", "loadables";
+			};
 		};
 	};
 };

commit 957222d7c6d442056246b2c55b5b32e110e22fa5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Mar 27 18:03:48 2020 +0800

    common: image: support IMAGE_PARAM_INVAL as placeholder address flag
    
    User maybe not want to set a fixed address, leave it to U-Boot.
    This is a compatible method for different board and platforms.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I01accbc0f116856276610bfaea8de2f7e1275bb0

diff --git a/common/image.c b/common/image.c
index 3d159945d3..4134ac80d7 100644
--- a/common/image.c
+++ b/common/image.c
@@ -192,6 +192,26 @@ static const struct table_info table_info[IH_COUNT] = {
 /*****************************************************************************/
 /* Legacy format routines */
 /*****************************************************************************/
+#ifndef USE_HOSTCC
+#ifndef CONFIG_SPL_BUILD
+uint32_t image_get_load(const image_header_t *hdr)
+{
+	uint32_t load = uimage_to_cpu(hdr->ih_load);
+
+	return (load == IMAGE_PARAM_INVAL) ?
+		env_get_ulong("kernel_addr_r", 16, 0) : load;
+}
+
+uint32_t image_get_ep(const image_header_t *hdr)
+{
+	uint32_t ep = uimage_to_cpu(hdr->ih_ep);
+
+	return (ep == IMAGE_PARAM_INVAL) ?
+		env_get_ulong("kernel_addr_r", 16, 0) : ep;
+}
+#endif
+#endif
+
 int image_check_hcrc(const image_header_t *hdr)
 {
 	ulong hcrc;
diff --git a/include/image.h b/include/image.h
index 56bd0dade0..a2d008f35b 100644
--- a/include/image.h
+++ b/include/image.h
@@ -725,9 +725,17 @@ image_get_hdr_l(magic)		/* image_get_magic */
 image_get_hdr_l(hcrc)		/* image_get_hcrc */
 image_get_hdr_l(time)		/* image_get_time */
 image_get_hdr_l(size)		/* image_get_size */
+image_get_hdr_l(dcrc)		/* image_get_dcrc */
+#ifdef USE_HOSTCC
 image_get_hdr_l(load)		/* image_get_load */
 image_get_hdr_l(ep)		/* image_get_ep */
-image_get_hdr_l(dcrc)		/* image_get_dcrc */
+#elif defined(CONFIG_SPL_BUILD)
+image_get_hdr_l(load)		/* image_get_load */
+image_get_hdr_l(ep)		/* image_get_ep */
+#else
+uint32_t image_get_load(const image_header_t *hdr);
+uint32_t image_get_ep(const image_header_t *hdr);
+#endif
 
 #define image_get_hdr_b(f) \
 	static inline uint8_t image_get_##f(const image_header_t *hdr) \

commit 40d08d0f10c628337658fbc2ad220132cda676bb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Mar 27 18:02:55 2020 +0800

    tools: mkimage: support pack empty file for multi image
    
    Muilt image bootflow requires ramdisk as a mandory component,
    so that we have to pack a empty ramdisk into multi image at
    some time.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I551ae832fbc68514ead0a3337148593e3113394f

diff --git a/common/image.c b/common/image.c
index 985127f8ea..3d159945d3 100644
--- a/common/image.c
+++ b/common/image.c
@@ -239,7 +239,7 @@ ulong image_multi_count(const image_header_t *hdr)
 	size = (uint32_t *)image_get_data(hdr);
 
 	/* count non empty slots */
-	for (i = 0; size[i]; ++i)
+	for (i = 0; size[i] != IMAGE_PARAM_INVAL; ++i)
 		count++;
 
 	return count;
diff --git a/include/image.h b/include/image.h
index c0e6b1a727..56bd0dade0 100644
--- a/include/image.h
+++ b/include/image.h
@@ -709,6 +709,8 @@ int boot_get_kbd(struct lmb *lmb, bd_t **kbd);
 /*******************************************************************/
 /* Legacy format specific code (prefixed with image_) */
 /*******************************************************************/
+#define IMAGE_PARAM_INVAL	0xffffffff
+
 static inline uint32_t image_get_header_size(void)
 {
 	return (sizeof(image_header_t));
diff --git a/tools/mkimage.c b/tools/mkimage.c
index ffc91d2319..a13d86f0aa 100644
--- a/tools/mkimage.c
+++ b/tools/mkimage.c
@@ -479,7 +479,7 @@ int main(int argc, char **argv)
 					}
 					size = cpu_to_uimage (sbuf.st_size);
 				} else {
-					size = 0;
+					size = IMAGE_PARAM_INVAL;
 				}
 
 				if (write(ifd, (char *)&size, sizeof(size)) != sizeof(size)) {
@@ -650,6 +650,11 @@ copy_file (int ifd, const char *datafile, int pad)
 		exit (EXIT_FAILURE);
 	}
 
+	if (sbuf.st_size == 0) {
+		(void) close (dfd);
+		return;
+	}
+
 	ptr = mmap(0, sbuf.st_size, PROT_READ, MAP_SHARED, dfd, 0);
 	if (ptr == MAP_FAILED) {
 		fprintf (stderr, "%s: Can't read %s: %s\n",

commit a86a723e2ead923847c394c39837ec260c834bd6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Mar 26 20:57:19 2020 +0800

    rockchip: uimage: fix alloc and free ramdisk sysmem
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I84d965caff7c0d733792bcf2387d751808991c0d

diff --git a/arch/arm/include/asm/arch-rockchip/uimage.h b/arch/arm/include/asm/arch-rockchip/uimage.h
index a95090bffc..9d84f90efa 100644
--- a/arch/arm/include/asm/arch-rockchip/uimage.h
+++ b/arch/arm/include/asm/arch-rockchip/uimage.h
@@ -10,8 +10,8 @@
 #define UIMG_I(fmt, args...)	printf("uImage: "fmt, ##args)
 
 void *uimage_load_bootables(void);
-int uimage_sysmem_free_each(image_header_t *img);
-int uimage_sysmem_reserve_each(image_header_t *hdr);
+int uimage_sysmem_free_each(image_header_t *img, u32 ramdisk_sz);
+int uimage_sysmem_reserve_each(image_header_t *hdr, u32 *ramdisk_sz);
 int rockchip_read_uimage_dtb(void *fdt_addr, char **hash, int *hash_size);
 
 #endif
diff --git a/arch/arm/mach-rockchip/uimage.c b/arch/arm/mach-rockchip/uimage.c
index dced46f20e..db89266577 100644
--- a/arch/arm/mach-rockchip/uimage.c
+++ b/arch/arm/mach-rockchip/uimage.c
@@ -123,7 +123,7 @@ void *uimage_load_bootables(void)
 	return hdr;
 }
 
-int uimage_sysmem_reserve_each(image_header_t *hdr)
+int uimage_sysmem_reserve_each(image_header_t *hdr, u32 *ramdisk_sz)
 {
 	ulong raddr, kaddr, faddr;
 	ulong data, size;
@@ -146,8 +146,9 @@ int uimage_sysmem_reserve_each(image_header_t *hdr)
 
 	/* ramdisk */
 	image_multi_getimg(hdr, 1, &data, &size);
+	*ramdisk_sz = size;
 	blknum = DIV_ROUND_UP(size, blksz);
-	if (!sysmem_alloc_base(MEM_RAMDISK, (phys_addr_t)raddr,
+	if (size && !sysmem_alloc_base(MEM_RAMDISK, (phys_addr_t)raddr,
 			       blknum * blksz))
 		return -ENOMEM;
 
@@ -165,7 +166,7 @@ int uimage_sysmem_reserve_each(image_header_t *hdr)
 	return 0;
 }
 
-int uimage_sysmem_free_each(image_header_t *img)
+int uimage_sysmem_free_each(image_header_t *img, u32 ramdisk_sz)
 {
 	ulong raddr, kaddr, faddr;
 
@@ -174,9 +175,10 @@ int uimage_sysmem_free_each(image_header_t *img)
 	faddr = env_get_ulong("fdt_addr_r", 16, 0);
 
 	sysmem_free((phys_addr_t)img);
-	sysmem_free((phys_addr_t)raddr);
 	sysmem_free((phys_addr_t)kaddr);
 	sysmem_free((phys_addr_t)faddr);
+	if (ramdisk_sz)
+		sysmem_free((phys_addr_t)raddr);
 
 	return 0;
 }
diff --git a/cmd/bootuimage.c b/cmd/bootuimage.c
index fad9a1bee7..4be0cf1c68 100644
--- a/cmd/bootuimage.c
+++ b/cmd/bootuimage.c
@@ -55,6 +55,7 @@ static int do_boot_uimage(cmd_tbl_t *cmdtp, int flag,
 	char *bootm_args[1];
 	image_header_t *img;
 	char uimg_addr[12];
+	u32 ramdisk_sz = 0;
 	int ret;
 
 	if (argc > 2)
@@ -72,7 +73,7 @@ static int do_boot_uimage(cmd_tbl_t *cmdtp, int flag,
 		return -EINVAL;
 	}
 
-	if (uimage_sysmem_reserve_each(img))
+	if (uimage_sysmem_reserve_each(img, &ramdisk_sz))
 		return -ENOMEM;
 
 	snprintf(uimg_addr, sizeof(uimg_addr), "0x%lx", (ulong)img);
@@ -91,7 +92,7 @@ static int do_boot_uimage(cmd_tbl_t *cmdtp, int flag,
 		BOOTM_STATE_OS_GO, &images, 1);
 
 	if (ret && argc != 1)
-		uimage_sysmem_free_each(img);
+		uimage_sysmem_free_each(img, ramdisk_sz);
 
 	return ret;
 }

commit 96a4cf48b5789204d57e728b42e19bf62157cb65
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Fri Mar 27 15:17:53 2020 +0800

    power: io-domain: fix err handle for regulator get
    
    Change-Id: I7c8d760676c15776df35708bf4d35552da0cf96b
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/drivers/power/io-domain/rockchip-io-domain.c b/drivers/power/io-domain/rockchip-io-domain.c
index 6f680dbdc0..4c2d63055e 100644
--- a/drivers/power/io-domain/rockchip-io-domain.c
+++ b/drivers/power/io-domain/rockchip-io-domain.c
@@ -518,20 +518,18 @@ static int rockchip_iodomain_probe(struct udevice *dev)
 			continue;
 
 		reg = of_get_regulator(dev_ofnode(dev), supply_name);
-		if (!reg) {
-			printf("could not find regulator %s\n", supply_name);
-			return -1;
-		}
+		if (!reg)
+			continue;
 
 		uV = regulator_get_value(reg);
-		if (uV < 0) {
-			printf("could not get voltage from %s\n", reg->name);
-			return -1;
+		if (uV <= 0) {
+			printf("voltage(%d uV) is invalid from %s\n", uV, reg->name);
+			continue;
 		}
 
 		if (uV > MAX_VOLTAGE_3_3) {
 			printf("%d uV is too high from %s\n", uV, reg->name);
-			return -1;
+			continue;
 		}
 
 		/* setup our supply */

commit 1e25cba32a2d3a6da4b32f221e9a7ae645667966
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Mar 27 14:41:36 2020 +0800

    rockchip: rv1126: add chip info
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I907dd5c6fb72851ecebe4c6dc43ad01c5ecff66e

diff --git a/arch/arm/include/asm/arch-rockchip/chip_info.h b/arch/arm/include/asm/arch-rockchip/chip_info.h
index b3e5a8918a..582691d0ce 100644
--- a/arch/arm/include/asm/arch-rockchip/chip_info.h
+++ b/arch/arm/include/asm/arch-rockchip/chip_info.h
@@ -1,6 +1,5 @@
 #ifndef _ROCKCHIP_CHIP_INFO_H_
 #define _ROCKCHIP_CHIP_INFO_H_
 
-int rockchip_get_chip_info(unsigned int chip_info[]);
 int rockchip_rockusb_get_chip_info(unsigned int chip_info[]);
 #endif
diff --git a/arch/arm/mach-rockchip/chip_info.c b/arch/arm/mach-rockchip/chip_info.c
index ad9c49c711..aaddd0de94 100644
--- a/arch/arm/mach-rockchip/chip_info.c
+++ b/arch/arm/mach-rockchip/chip_info.c
@@ -24,8 +24,10 @@
  * rk322xh chip info:	{0x33323043, 0x32303136, 0x31313031, 0x56313030} - 320C20161101V100
  * rk3326 chip info:	{0x33333044, 0x32303137, 0x31323134, 0x56313030} - 330D20171214V100
  * rk3308 chip info:	{0x33333045, 0x32303138, 0x30323033, 0x56313030} - 330E20180203V100
+ * rv1126 chip info:	{0x42303131, 0x39313032, 0x37303131, 0x30303156}
  */
-int rockchip_get_chip_info(unsigned int chip_info[])
+
+static int rockchip_get_chip_info(unsigned int chip_info[])
 {
 	if (chip_info == NULL)
 		return -EINVAL;
@@ -66,7 +68,6 @@ int rockchip_get_chip_info(unsigned int chip_info[])
 	return 0;
 }
 
-
 int rockchip_rockusb_get_chip_info(unsigned int chip_info[])
 {
 	int err;
@@ -90,6 +91,8 @@ int rockchip_rockusb_get_chip_info(unsigned int chip_info[])
 		chip_info[0] = 0x33333043;
 #elif defined(CONFIG_ROCKCHIP_RK1808)
 		chip_info[0] = 0x31383041;
+#elif defined(CONFIG_ROCKCHIP_RV1126)
+		chip_info[0] = 0x31313236;
 #endif
 	}
 

commit 7422c3721177cb5424a735e7d918f2947c51101c
Author: Ren Jianing <jianing.ren@rock-chips.com>
Date:   Fri Mar 27 11:07:59 2020 +0800

    rockchip: rv1126: add dwc3 board init
    
    Signed-off-by: Ren Jianing <jianing.ren@rock-chips.com>
    Change-Id: I4c5eeeedc240197ec0fda2b236890b53b916dfb6

diff --git a/board/rockchip/evb_rv1126/evb_rv1126.c b/board/rockchip/evb_rv1126/evb_rv1126.c
index 7cd98fc9b8..9f6683f20f 100644
--- a/board/rockchip/evb_rv1126/evb_rv1126.c
+++ b/board/rockchip/evb_rv1126/evb_rv1126.c
@@ -5,6 +5,29 @@
  */
 
 #include <common.h>
+#include <dwc3-uboot.h>
+#include <usb.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#ifdef CONFIG_USB_DWC3
+static struct dwc3_device dwc3_device_data = {
+	.maximum_speed = USB_SPEED_HIGH,
+	.base = 0xffd00000,
+	.dr_mode = USB_DR_MODE_PERIPHERAL,
+	.index = 0,
+	.dis_u2_susphy_quirk = 1,
+	.usb2_phyif_utmi_width = 16,
+};
+
+int usb_gadget_handle_interrupts(void)
+{
+	dwc3_uboot_handle_interrupt(0);
+	return 0;
+}
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+	return dwc3_uboot_init(&dwc3_device_data);
+}
+#endif

commit 239902f59e415ff6fb6ba40c37bf4e7eec8ae4f4
Author: Ren Jianing <jianing.ren@rock-chips.com>
Date:   Fri Mar 27 11:06:20 2020 +0800

    rockchip: rv1126: add rv1126 usb building support
    
    Signed-off-by: Ren Jianing <jianing.ren@rock-chips.com>
    Change-Id: I787d256cdcc387b7c95aaadacc97ad5f2cd4ef33

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index efb16280e8..7df6cbee8e 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -78,10 +78,16 @@ CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYSRESET=y
 CONFIG_USB=y
-CONFIG_USB_DWC2=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x110b
 CONFIG_IRQ2GPIO_V2=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y

commit 3062ae7eca40fde609e7c7044cb7704186d1ac48
Author: Ren Jianing <jianing.ren@rock-chips.com>
Date:   Fri Mar 27 11:00:25 2020 +0800

    rockchip: dts: rv1126: add usb gadget for U-Boot
    
    This patch delete the phys property because the driver of usb2phy
    is not complete.
    
    Signed-off-by: Ren Jianing <jianing.ren@rock-chips.com>
    Change-Id: Idc75693679e672e1c8ede2f3775d7fd58e9704d9

diff --git a/arch/arm/dts/rv1126-u-boot.dtsi b/arch/arm/dts/rv1126-u-boot.dtsi
index d74f85243b..135cdf208e 100644
--- a/arch/arm/dts/rv1126-u-boot.dtsi
+++ b/arch/arm/dts/rv1126-u-boot.dtsi
@@ -52,4 +52,15 @@
 &saradc {
 	u-boot,dm-spl;
 	status = "okay";
-};
\ No newline at end of file
+};
+
+&usbdrd {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&usbdrd_dwc3 {
+	u-boot,dm-pre-reloc;
+	/delete-property/ phys;
+	status = "okay";
+};

commit d532d22e94356cf8634baa67ccdbf90660cb54e7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Mar 26 14:52:38 2020 +0800

    input: rk8xx: enable interrupt only in suspend
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I4d5a2e38b8a73d11aa86cd9a0f18ca32b218d892

diff --git a/drivers/input/rk8xx_pwrkey.c b/drivers/input/rk8xx_pwrkey.c
index 1a91d71576..c53277d708 100644
--- a/drivers/input/rk8xx_pwrkey.c
+++ b/drivers/input/rk8xx_pwrkey.c
@@ -63,8 +63,8 @@ static int rk8xx_pwrkey_probe(struct udevice *dev)
 
 	irq_install_handler(fall_irq, rk8xx_pwron_fall_handler, dev);
 	irq_install_handler(rise_irq, rk8xx_pwron_rise_handler, dev);
-	irq_handler_enable(fall_irq);
-	irq_handler_enable(rise_irq);
+	irq_handler_enable_suspend_only(fall_irq);
+	irq_handler_enable_suspend_only(rise_irq);
 
 	return 0;
 }

commit 85fbd17d0d8c6545924ce7e6b5995a7da5ed7ad1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 25 15:44:41 2020 +0800

    configs: rv1126: update configure
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I48c0bc4b90d6927ef5da1db48b300e7d82c3bc83

diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index e111858cfb..efb16280e8 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -40,13 +40,14 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_NET is not set
+# CONFIG_CMD_NFS is not set
 # CONFIG_CMD_MISC is not set
 # CONFIG_ISO_PARTITION is not set
 CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
-CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y
@@ -56,12 +57,17 @@ CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y
+CONFIG_RK8XX_PWRKEY=y
 CONFIG_ADC_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
+CONFIG_DM_PMIC=y
+# CONFIG_SPL_PMIC_CHILDREN is not set
+CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
@@ -76,10 +82,9 @@ CONFIG_USB_DWC2=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x18d1
-CONFIG_G_DNL_PRODUCT_NUM=0xd00d
+CONFIG_IRQ2GPIO_V2=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
 # CONFIG_EFI_LOADER is not set
+CONFIG_TEST_ROCKCHIP=y

commit f8ca32e1ca9a3df6a1e6fb6997721307c33f354e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Mar 13 09:32:01 2020 +0800

    common: spl: set default address for entry_point_os
    
    Could be override in boot_from_devices().
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ifbfac5903ec61e65739732949f9e6b8a2704155d

diff --git a/common/spl/spl.c b/common/spl/spl.c
index 2dd8608533..675ba6129f 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -487,6 +487,11 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 	spl_image.entry_point_bl33 = CONFIG_SYS_TEXT_BASE;
 #endif
 
+#if CONFIG_IS_ENABLED(OPTEE)
+	/* default address */
+	spl_image.entry_point_os = CONFIG_SYS_TEXT_BASE;
+#endif
+
 #ifdef CONFIG_SYS_SPL_ARGS_ADDR
 	spl_image.arg = (void *)CONFIG_SYS_SPL_ARGS_ADDR;
 #endif

commit 594e14a437b5e3ed000199dc5fe7a5cfd969a5b2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 18 18:31:46 2020 +0800

    common: spl: support enable D-cache for 32-bit platform
    
    - Initial gd->bd->bi_dram[] for arm32.
    - Add a configure to enable/disable SPL D-cache.
    - Please make sure CONFIG_SPL_SYS_MALLOC_F_LEN is large
      enough for TLB and bd_t buffer while enabling dcache
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I85f2169fe44b44e16edb15a9538df516037e9823

diff --git a/Kconfig b/Kconfig
index 54fa69c134..c5dd4ea113 100644
--- a/Kconfig
+++ b/Kconfig
@@ -321,6 +321,13 @@ config SPL_FIT_HW_CRYPTO
 	help
 	  Enable SPL hardware crypto for FIT image checksum and rsa verify.
 
+config SPL_SYS_DCACHE_OFF
+	bool "Disable SPL dcache"
+	default y
+	help
+	  Disable SPL dcache. Please make sure CONFIG_SPL_SYS_MALLOC_F_LEN
+	  is large enough to malloc TLB and bd_t buffer while enabling dcache.
+
 endif # SPL
 
 endif # FIT
diff --git a/common/spl/spl.c b/common/spl/spl.c
index a8c75888fa..6bc0f4b7a9 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -221,6 +221,45 @@ __weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
 	image_entry();
 }
 
+/*
+ * 64-bit: No special operation.
+ *
+ * 32-bit: Initial gd->bd->bi_dram[] to active dcache attr of memory.
+ *	   Assuming 256MB is enough for SPL(MMU still maps 4GB size).
+ */
+#ifndef CONFIG_SPL_SYS_DCACHE_OFF
+static int spl_dcache_enable(void)
+{
+	bool free_bd = false;
+
+#ifndef CONFIG_ARM64
+	if (!gd->bd) {
+		gd->bd = calloc(1, sizeof(bd_t));
+		if (!gd->bd) {
+			debug("spl: no bd_t memory\n");
+			return -ENOMEM;
+		}
+		gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+		gd->bd->bi_dram[0].size  = SZ_256M;
+		free_bd = true;
+	}
+#endif
+	/* TLB memory should be 64KB base align and 4KB end align */
+	gd->arch.tlb_size = PGTABLE_SIZE;
+	gd->arch.tlb_addr = (ulong)memalign(SZ_64K, ALIGN(PGTABLE_SIZE, SZ_4K));
+	if (!gd->arch.tlb_addr) {
+		debug("spl: no TLB memory\n");
+		return -ENOMEM;
+	}
+
+	dcache_enable();
+	if (free_bd)
+		free(gd->bd);
+
+	return 0;
+}
+#endif
+
 static int spl_common_init(bool setup_malloc)
 {
 	int ret;
@@ -241,16 +280,13 @@ static int spl_common_init(bool setup_malloc)
 	 * setup D-cache as early as possible after malloc setup
 	 * I-cache has been setup at early assembly code by default.
 	 */
-#if !defined(CONFIG_TPL_BUILD)
-	/* tlb memory should be 64KB align for base and 4KB align for end */
-	gd->arch.tlb_size = PGTABLE_SIZE;
-	gd->arch.tlb_addr = (ulong)memalign(SZ_64K, ALIGN(PGTABLE_SIZE, SZ_4K));
-	if (gd->arch.tlb_addr)
-		dcache_enable();
-	else
-		debug("spl: no tlb memory\n");
+#ifndef CONFIG_SPL_SYS_DCACHE_OFF
+	ret = spl_dcache_enable();
+	if (ret) {
+		debug("spl_dcache_enable() return error %d\n", ret);
+		return ret;
+	}
 #endif
-
 	ret = bootstage_init(true);
 	if (ret) {
 		debug("%s: Failed to set up bootstage: ret=%d\n", __func__,

commit c1554462812d78c09b5b142c0dee51b5cc07ec23
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Mar 19 09:30:32 2020 +0800

    rockchip: common: set CONFIG_NR_DRAM_BANKS for SPL
    
    SPL don't need so many dram banks.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ie4a48361bb4911466e58ba859ffb51dcb616fbbb

diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index b404014d3a..16b63a2266 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -20,7 +20,11 @@
 
 #define CONFIG_SYS_NS16550_MEM32
 
+#ifdef CONFIG_SPL_BUILD
+#define CONFIG_NR_DRAM_BANKS		2
+#else
 #define CONFIG_NR_DRAM_BANKS		12
+#endif
 
 #ifndef CONFIG_SPL_BUILD
 #include <config_distro_defaults.h>

commit 95bd63d1b18b0a14abb8eac480d1f197437bc22e
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Wed Mar 25 22:00:32 2020 +0800

    clk: rockchip: rv1126: Change HCLK_PDCORE_HZ to 200MHz
    
    Change-Id: Ic5631f6ef4b7308b879b5701ba142c3e853b0672
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rv1126.h b/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
index f5661ccd89..30284c10d3 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
@@ -23,7 +23,7 @@
 #define PCLK_PDBUS_HZ	(100 * MHz)
 #define ACLK_PDPHP_HZ	(300 * MHz)
 #define HCLK_PDPHP_HZ	(200 * MHz)
-#define HCLK_PDCORE_HZ	(100 * MHz)
+#define HCLK_PDCORE_HZ	(200 * MHz)
 #define HCLK_PDAUDIO_HZ	(150 * MHz)
 
 /* RV1126 pll id */

commit b865093666ebfc5de673c6de6c2b6b42b63b51bd
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Wed Mar 25 21:57:51 2020 +0800

    clk: rockchip: rv1126: Change some clocks' parent to GPLL
    
    Change-Id: Ibba02fee3df6c98308d5fd657a30af3eba7321d5
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rv1126.c b/drivers/clk/rockchip/clk_rv1126.c
index a624c3cee3..0ff7ed9c8c 100644
--- a/drivers/clk/rockchip/clk_rv1126.c
+++ b/drivers/clk/rockchip/clk_rv1126.c
@@ -604,8 +604,7 @@ static ulong rv1126_pdcore_set_clk(struct rv1126_clk_priv *priv, ulong rate)
 {
 	struct rv1126_cru *cru = priv->cru;
 	int src_clk_div;
-
-	src_clk_div = DIV_ROUND_UP(priv->cpll_hz, rate);
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);
 	assert(src_clk_div - 1 <= 31);
 
 	rk_clrsetreg(&cru->clksel_con[0], CORE_HCLK_DIV_MASK,
@@ -634,12 +633,24 @@ static ulong rv1126_pdbus_get_clk(struct rv1126_clk_priv *priv, ulong clk_id)
 	case HCLK_PDBUS:
 		con = readl(&cru->clksel_con[2]);
 		div = (con & HCLK_PDBUS_DIV_MASK) >> HCLK_PDBUS_DIV_SHIFT;
-		parent = priv->gpll_hz;
+		sel = (con & HCLK_PDBUS_SEL_MASK) >> HCLK_PDBUS_SEL_SHIFT;
+		if (sel == HCLK_PDBUS_SEL_GPLL)
+			parent = priv->gpll_hz;
+		else if (sel == HCLK_PDBUS_SEL_CPLL)
+			parent = priv->cpll_hz;
+		else
+			return -ENOENT;
 		break;
 	case PCLK_PDBUS:
 		con = readl(&cru->clksel_con[3]);
 		div = (con & PCLK_PDBUS_DIV_MASK) >> PCLK_PDBUS_DIV_SHIFT;
-		parent = priv->gpll_hz;
+		sel = (con & PCLK_PDBUS_SEL_MASK) >> PCLK_PDBUS_SEL_SHIFT;
+		if (sel == PCLK_PDBUS_SEL_GPLL)
+			parent = priv->gpll_hz;
+		else if (sel == PCLK_PDBUS_SEL_CPLL)
+			parent = priv->cpll_hz;
+		else
+			return -ENOENT;
 		break;
 	default:
 		return -ENOENT;
@@ -664,19 +675,19 @@ static ulong rv1126_pdbus_set_clk(struct rv1126_clk_priv *priv, ulong clk_id,
 			     (src_clk_div - 1) << ACLK_PDBUS_DIV_SHIFT);
 		break;
 	case HCLK_PDBUS:
-		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);
+		src_clk_div = DIV_ROUND_UP(priv->cpll_hz, rate);
 		assert(src_clk_div - 1 <= 31);
 		rk_clrsetreg(&cru->clksel_con[2],
 			     HCLK_PDBUS_SEL_MASK | HCLK_PDBUS_DIV_MASK,
-			     HCLK_PDBUS_SEL_GPLL << HCLK_PDBUS_SEL_SHIFT |
+			     HCLK_PDBUS_SEL_CPLL << HCLK_PDBUS_SEL_SHIFT |
 			     (src_clk_div - 1) << HCLK_PDBUS_DIV_SHIFT);
 		break;
 	case PCLK_PDBUS:
-		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);
+		src_clk_div = DIV_ROUND_UP(priv->cpll_hz, rate);
 		assert(src_clk_div - 1 <= 31);
 		rk_clrsetreg(&cru->clksel_con[3],
 			     PCLK_PDBUS_SEL_MASK | PCLK_PDBUS_DIV_MASK,
-			     PCLK_PDBUS_SEL_GPLL << PCLK_PDBUS_SEL_SHIFT |
+			     PCLK_PDBUS_SEL_CPLL << PCLK_PDBUS_SEL_SHIFT |
 			     (src_clk_div - 1) << PCLK_PDBUS_DIV_SHIFT);
 		break;
 
@@ -717,7 +728,7 @@ static ulong rv1126_pdphp_set_clk(struct rv1126_clk_priv *priv, ulong clk_id,
 	struct rv1126_cru *cru = priv->cru;
 	int src_clk_div;
 
-	src_clk_div = DIV_ROUND_UP(priv->cpll_hz, rate);
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);
 	assert(src_clk_div - 1 <= 31);
 
 	switch (clk_id) {
@@ -756,7 +767,7 @@ static ulong rv1126_pdaudio_set_clk(struct rv1126_clk_priv *priv, ulong rate)
 	struct rv1126_cru *cru = priv->cru;
 	int src_clk_div;
 
-	src_clk_div = DIV_ROUND_UP(priv->cpll_hz, rate);
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);
 	assert(src_clk_div - 1 <= 31);
 
 	rk_clrsetreg(&cru->clksel_con[26], HCLK_PDAUDIO_DIV_MASK,

commit 6224aca82830ff747386b0338c52a1062b178a21
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Wed Mar 25 21:20:48 2020 +0800

    clk: rockchip: rv1126: Fix HCLK_PDPHP_DIV_SHIFT
    
    Change-Id: Ia30bcf94de7ee3e40359fdd47d4e8c6600f4559d
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rv1126.c b/drivers/clk/rockchip/clk_rv1126.c
index 38431dd72b..a624c3cee3 100644
--- a/drivers/clk/rockchip/clk_rv1126.c
+++ b/drivers/clk/rockchip/clk_rv1126.c
@@ -730,7 +730,7 @@ static ulong rv1126_pdphp_set_clk(struct rv1126_clk_priv *priv, ulong clk_id,
 	case HCLK_PDPHP:
 		rk_clrsetreg(&cru->clksel_con[53],
 			     HCLK_PDPHP_DIV_MASK,
-			     (src_clk_div - 1) << HCLK_PDBUS_DIV_SHIFT);
+			     (src_clk_div - 1) << HCLK_PDPHP_DIV_SHIFT);
 		break;
 	default:
 		printf("do not support this pdphp freq\n");

commit 0fdee37b0a1bc43510f82d0deb22d27904619ddb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 25 21:11:29 2020 +0800

    drivers: irq: add irq to gpio v2 transfer support
    
    Some platform with new GPIO IP implements the low/high
    registers with write mask. This configure handles it.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I855357d29e7fba072b867c06a31a049462ebf6ff

diff --git a/drivers/irq/Kconfig b/drivers/irq/Kconfig
index 090b4e1ceb..96b90be9f5 100644
--- a/drivers/irq/Kconfig
+++ b/drivers/irq/Kconfig
@@ -4,3 +4,10 @@ config IRQ
 	default y
 	help
 	  Provide IRQ support for platforms
+
+config IRQ2GPIO_V2
+	bool "Enable irq to gpio v2 transfer"
+	depends on IRQ
+	help
+	  Some platform with new GPIO IP implements the low/high
+	  registers with write mask. This configure handles it.
diff --git a/drivers/irq/Makefile b/drivers/irq/Makefile
index 77ee56bd5f..745bdea23c 100644
--- a/drivers/irq/Makefile
+++ b/drivers/irq/Makefile
@@ -5,7 +5,12 @@
 #
 
 obj-y += irq-gic.o
+
+ifdef CONFIG_IRQ2GPIO_V2
+obj-y += irq-gpio-v2.o
+else
 obj-y += irq-gpio.o
+endif
 obj-y += irq-generic.o
 obj-y += irq-gpio-switch.o
 obj-y += virq.o
diff --git a/drivers/irq/irq-gpio-v2.c b/drivers/irq/irq-gpio-v2.c
new file mode 100644
index 0000000000..0d1b9c4f33
--- /dev/null
+++ b/drivers/irq/irq-gpio-v2.c
@@ -0,0 +1,367 @@
+/*
+ * (C) Copyright 2020 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <dm.h>
+#include <malloc.h>
+#include "irq-internal.h"
+
+typedef enum GPIOIntType {
+	GPIOLevelLow = 0,
+	GPIOLevelHigh,
+	GPIOEdgelFalling,
+	GPIOEdgelRising
+} eGPIOIntType_t;
+
+typedef enum eGPIOPinLevel {
+	GPIO_LOW = 0,
+	GPIO_HIGH
+} eGPIOPinLevel_t;
+
+typedef enum eGPIOPinDirection {
+	GPIO_IN = 0,
+	GPIO_OUT
+} eGPIOPinDirection_t;
+
+#define GPIO_SWPORT_DR		0x00
+#define GPIO_SWPORT_DDR		0x08
+#define GPIO_INTEN		0x10
+#define GPIO_INTEN_L		0x10
+#define GPIO_INTEN_H		0x14
+#define GPIO_INTMASK		0x18
+#define GPIO_INTTYPE_LEVEL	0x20
+#define GPIO_INTTYPE_LEVEL_L	0x20
+#define GPIO_INTTYPE_LEVEL_H	0x24
+#define GPIO_INT_POLARITY	0x28
+#define GPIO_DEBOUNCE		0x38
+#define GPIO_INT_STATUS		0x50
+#define GPIO_INT_RAWSTATUS	0x58
+#define GPIO_PORTS_EOI		0x60
+#define GPIO_EXT_PORT		0x70
+
+#define WMSK_SETBIT(n)		(n << 16 | n)
+#define WMSK_CLRBIT(n)		(n << 16)
+#define REG_PLUS4(off, n)	(off + (n >= BIT(16) ? 4 : 0))
+#define BIT_SUB16(n)		(n >= BIT(16) ? (n >> 16) : n)
+
+static inline unsigned offset_to_bit(unsigned offset)
+{
+	return (1 << offset);
+}
+
+static void gpio_bit_op(void __iomem *regbase, unsigned int offset,
+			u32 bit, unsigned char flag)
+{
+	u32 val;
+
+	offset = REG_PLUS4(offset, bit);
+	bit = BIT_SUB16(bit);
+
+	val = flag ? WMSK_SETBIT(bit) : WMSK_CLRBIT(bit);
+	writel(val, regbase + offset);
+}
+
+static int gpio_bit_rd(void __iomem *regbase, unsigned int offset, u32 bit)
+{
+	offset = REG_PLUS4(offset, bit);
+	bit = BIT_SUB16(bit);
+
+	return readl(regbase + offset) & bit ? 1 : 0;
+}
+
+static void gpio_irq_unmask(void __iomem *regbase, unsigned int bit)
+{
+	gpio_bit_op(regbase, GPIO_INTEN, bit, 1);
+}
+
+static void gpio_irq_mask(void __iomem *regbase, unsigned int bit)
+{
+	gpio_bit_op(regbase, GPIO_INTEN, bit, 0);
+}
+
+static void gpio_irq_ack(void __iomem *regbase, unsigned int bit)
+{
+	gpio_bit_op(regbase, GPIO_PORTS_EOI, bit, 1);
+}
+
+static void generic_gpio_handle_irq(int irq, void *data __always_unused)
+{
+	struct gpio_bank *bank = gpio_id_to_bank(irq - IRQ_GPIO0);
+	unsigned gpio_irq, pin, h_pin, unmasked = 0;
+	u32 isr, ilr_l, ilr_h;
+
+	isr = readl(bank->regbase + GPIO_INT_STATUS);
+	ilr_l = readl(bank->regbase + GPIO_INTTYPE_LEVEL_L);
+	ilr_h = readl(bank->regbase + GPIO_INTTYPE_LEVEL_H);
+	gpio_irq = bank->irq_base;
+
+	while (isr) {
+		pin = fls(isr) - 1;
+
+		/* first mask and ack irq */
+		gpio_irq_mask(bank->regbase, offset_to_bit(pin));
+		gpio_irq_ack(bank->regbase, offset_to_bit(pin));
+
+		/*
+		 * If gpio is edge triggered, clear condition before executing
+		 * the handler, so that we don't miss next edges trigger.
+		 */
+		if (pin < 16) {
+			if (ilr_l & (1 << pin)) {
+				unmasked = 1;
+				gpio_irq_unmask(bank->regbase, offset_to_bit(pin));
+			}
+		} else {
+			h_pin = pin - 16;
+			if (ilr_h & (1 << h_pin)) {
+				unmasked = 1;
+				gpio_irq_unmask(bank->regbase, offset_to_bit(h_pin));
+			}
+		}
+		__generic_gpio_handle_irq(gpio_irq + pin);
+
+		isr &= ~(1 << pin);
+
+		if (!unmasked)
+			gpio_irq_unmask(bank->regbase, offset_to_bit(pin));
+	}
+}
+
+static void gpio_set_intr_type(void __iomem *regbase,
+			       unsigned int bit,
+			       eGPIOIntType_t type)
+{
+	switch (type) {
+	case GPIOLevelLow:
+		gpio_bit_op(regbase, GPIO_INT_POLARITY, bit, 0);
+		gpio_bit_op(regbase, GPIO_INTTYPE_LEVEL, bit, 0);
+		break;
+	case GPIOLevelHigh:
+		gpio_bit_op(regbase, GPIO_INTTYPE_LEVEL, bit, 0);
+		gpio_bit_op(regbase, GPIO_INT_POLARITY, bit, 1);
+		break;
+	case GPIOEdgelFalling:
+		gpio_bit_op(regbase, GPIO_INTTYPE_LEVEL, bit, 1);
+		gpio_bit_op(regbase, GPIO_INT_POLARITY, bit, 0);
+		break;
+	case GPIOEdgelRising:
+		gpio_bit_op(regbase, GPIO_INTTYPE_LEVEL, bit, 1);
+		gpio_bit_op(regbase, GPIO_INT_POLARITY, bit, 1);
+		break;
+	}
+}
+
+static int gpio_get_intr_type(void __iomem *regbase,
+			      unsigned int bit)
+{
+	u32 polarity, level, magic = 0;
+	int type;
+
+	polarity = gpio_bit_rd(regbase, GPIO_INT_POLARITY, bit);
+	level = gpio_bit_rd(regbase, GPIO_INTTYPE_LEVEL, bit);
+	magic = (polarity << 1) | (level << 0);
+
+	switch (magic) {
+	case 0x00:
+		type = GPIOLevelLow;
+		break;
+	case 0x02:
+		type = GPIOLevelHigh;
+		break;
+	case 0x01:
+		type = GPIOEdgelFalling;
+		break;
+	case 0x03:
+		type = GPIOEdgelRising;
+		break;
+	default:
+		type = -EINVAL;
+	}
+
+	return type;
+}
+
+static int gpio_irq_set_type(int gpio_irq, unsigned int type)
+{
+	int gpio = irq_to_gpio(gpio_irq);
+	struct gpio_bank *bank = gpio_to_bank(gpio);
+	eGPIOIntType_t int_type = 0;
+
+	if (!bank)
+		return -EINVAL;
+
+	gpio &= GPIO_PIN_MASK;
+	if (gpio >= bank->ngpio)
+		return -EINVAL;
+
+	switch (type) {
+	case IRQ_TYPE_EDGE_RISING:
+		int_type = GPIOEdgelRising;
+		break;
+	case IRQ_TYPE_EDGE_FALLING:
+		int_type = GPIOEdgelFalling;
+		break;
+	case IRQ_TYPE_LEVEL_HIGH:
+		int_type = GPIOLevelHigh;
+		break;
+	case IRQ_TYPE_LEVEL_LOW:
+		int_type = GPIOLevelLow;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	/* Before set interrupt type, gpio must set input */
+	gpio_bit_op(bank->regbase, GPIO_SWPORT_DDR,
+		    offset_to_bit(gpio), GPIO_IN);
+	gpio_set_intr_type(bank->regbase, offset_to_bit(gpio), int_type);
+
+	return 0;
+}
+
+static int gpio_irq_revert_type(int gpio_irq)
+{
+	int gpio = irq_to_gpio(gpio_irq);
+	struct gpio_bank *bank = gpio_to_bank(gpio);
+	eGPIOIntType_t int_type = 0;
+	int type;
+
+	if (!bank)
+		return -EINVAL;
+
+	gpio &= GPIO_PIN_MASK;
+	if (gpio >= bank->ngpio)
+		return -EINVAL;
+
+	type = gpio_get_intr_type(bank->regbase, offset_to_bit(gpio));
+	switch (type) {
+	case GPIOEdgelFalling:
+		int_type = GPIOEdgelRising;
+		break;
+	case GPIOEdgelRising:
+		int_type = GPIOEdgelFalling;
+		break;
+	case GPIOLevelHigh:
+		int_type = GPIOLevelLow;
+		break;
+	case GPIOLevelLow:
+		int_type = GPIOLevelHigh;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	gpio_set_intr_type(bank->regbase, offset_to_bit(gpio), int_type);
+
+	return 0;
+}
+
+static int gpio_irq_get_gpio_level(int gpio_irq)
+{
+	int gpio = irq_to_gpio(gpio_irq);
+	struct gpio_bank *bank = gpio_to_bank(gpio);
+
+	if (!bank)
+		return -EINVAL;
+
+	gpio &= GPIO_PIN_MASK;
+	if (gpio >= bank->ngpio)
+		return -EINVAL;
+
+	return gpio_bit_rd(bank->regbase, GPIO_EXT_PORT, offset_to_bit(gpio));
+}
+
+static int gpio_irq_enable(int gpio_irq)
+{
+	int gpio = irq_to_gpio(gpio_irq);
+	struct gpio_bank *bank = gpio_to_bank(gpio);
+
+	if (!bank)
+		return -EINVAL;
+
+	gpio &= GPIO_PIN_MASK;
+	if (gpio >= bank->ngpio)
+		return -EINVAL;
+
+	gpio_irq_unmask(bank->regbase, offset_to_bit(gpio));
+
+	if (bank->use_count == 0)
+		irq_handler_enable(IRQ_GPIO0 + bank->id);
+	bank->use_count++;
+
+	return 0;
+}
+
+static int gpio_irq_disable(int irq)
+{
+	int gpio = irq_to_gpio(irq);
+	struct gpio_bank *bank = gpio_to_bank(gpio);
+
+	if (!bank)
+		return -EINVAL;
+
+	if (bank->use_count <= 0)
+		return 0;
+
+	gpio &= GPIO_PIN_MASK;
+	if (gpio >= bank->ngpio)
+		return -EINVAL;
+
+	gpio_irq_mask(bank->regbase, offset_to_bit(gpio));
+
+	if (bank->use_count == 1)
+		irq_handler_disable(IRQ_GPIO0 + bank->id);
+	bank->use_count--;
+
+	return 0;
+}
+
+static int gpio_irq_init(void)
+{
+	struct gpio_bank *bank = NULL;
+	int i = 0;
+
+	for (i = 0; i < GPIO_BANK_NUM; i++) {
+		struct udevice *dev;
+
+		dev = malloc(sizeof(*dev));
+		if (!dev)
+			return -ENOMEM;
+
+		bank = gpio_id_to_bank(i);
+		if (bank) {
+			dev->name = bank->name;
+
+			/* disable gpio pin interrupt */
+			writel(0xffff0000, bank->regbase + GPIO_INTEN_L);
+			writel(0xffff0000, bank->regbase + GPIO_INTEN_H);
+
+			/* register gpio group irq handler */
+			irq_install_handler(IRQ_GPIO0 + bank->id,
+			(interrupt_handler_t *)generic_gpio_handle_irq, dev);
+
+			/* default disable all gpio group interrupt */
+			irq_handler_disable(IRQ_GPIO0 + bank->id);
+		}
+	}
+
+	return 0;
+}
+
+static struct irq_chip gpio_irq_chip = {
+	.name		= "gpio-irq-chip",
+	.irq_init	= gpio_irq_init,
+	.irq_enable	= gpio_irq_enable,
+	.irq_disable	= gpio_irq_disable,
+	.irq_set_type	= gpio_irq_set_type,
+	.irq_revert_type = gpio_irq_revert_type,
+	.irq_get_gpio_level = gpio_irq_get_gpio_level,
+};
+
+struct irq_chip *arch_gpio_get_irqchip(void)
+{
+	return &gpio_irq_chip;
+}
+

commit 3ec172ba599e162b9f57b465bde9408843561677
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 25 20:25:22 2020 +0800

    pmic: rk8xx: update reg count for RK817/809
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I55e25a3f6ce46c6bfbdd440910824e527fdc4c58

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index 8ff023a9a9..8d9c787862 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -195,7 +195,15 @@ static const struct pmic_child_info rk817_codec_info[] = {
 
 static int rk8xx_reg_count(struct udevice *dev)
 {
-	return RK808_NUM_OF_REGS;
+	struct rk8xx_priv *priv = dev_get_priv(dev);
+
+	switch (priv->variant) {
+	case RK809_ID:
+	case RK817_ID:
+		return RK817_NUM_OF_REGS;
+	default:
+		return RK808_NUM_OF_REGS;
+	}
 }
 
 static int rk8xx_write(struct udevice *dev, uint reg, const uint8_t *buff,
diff --git a/include/power/rk8xx_pmic.h b/include/power/rk8xx_pmic.h
index 0a15bd431e..4031456553 100644
--- a/include/power/rk8xx_pmic.h
+++ b/include/power/rk8xx_pmic.h
@@ -214,6 +214,7 @@ enum {
 #define RK817_BUCK4_CMIN	0xc6
 #define RK817_ON_SOURCE		0xf5
 #define RK817_OFF_SOURCE	0xf6
+#define RK817_NUM_OF_REGS	0xff
 
 /* IRQ definitions */
 #define RK8XX_IRQ_PWRON_FALL		0

commit c1221a7da49d8fce685b422085eed633b09296c9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 25 17:36:49 2020 +0800

    rockchip: dts: rv1126: add recovery key for U-Boot
    
    Remove unused ramdisk-ro node.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ibc61aacc9ce98d243b7044cdcfddf103bb0c7b82

diff --git a/arch/arm/dts/rv1126-evb.dts b/arch/arm/dts/rv1126-evb.dts
index 1ebfd2de3d..e6ff754d1c 100644
--- a/arch/arm/dts/rv1126-evb.dts
+++ b/arch/arm/dts/rv1126-evb.dts
@@ -6,15 +6,26 @@
 /dts-v1/;
 #include "rv1126.dtsi"
 #include "rv1126-u-boot.dtsi"
+#include <dt-bindings/input/input.h>
 
 / {
 	model = "Rockchip RV1126 Evaluation Board";
 	compatible = "rockchip,rv1126-evb", "rockchip,rv1126";
 
-	ramdisk-ro {
-		u-boot,dm-pre-reloc;
-		compatible = "ramdisk-ro";
+	adc-keys {
+		compatible = "adc-keys";
+		io-channels = <&saradc 0>;
+		io-channel-names = "buttons";
+		keyup-threshold-microvolt = <1800000>;
+		u-boot,dm-spl;
 		status = "okay";
+
+		vol-up-key {
+			u-boot,dm-spl;
+			linux,code = <KEY_VOLUMEUP>;
+			label = "volume up";
+			press-threshold-microvolt = <0>;
+		};
 	};
 };
 
diff --git a/arch/arm/dts/rv1126-u-boot.dtsi b/arch/arm/dts/rv1126-u-boot.dtsi
index 1e4fca19f2..d74f85243b 100644
--- a/arch/arm/dts/rv1126-u-boot.dtsi
+++ b/arch/arm/dts/rv1126-u-boot.dtsi
@@ -48,3 +48,8 @@
 &grf {
 	u-boot,dm-spl;
 };
+
+&saradc {
+	u-boot,dm-spl;
+	status = "okay";
+};
\ No newline at end of file

commit b60ec54ef291e3d7ce49b139eaa98279e64ec909
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 25 17:17:01 2020 +0800

    rockchip: rv1126: enable GICv2 and ARM SMCCC
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I07c7c1db952a3865a17052d0f10cb84733214737

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index ef871510cb..0666ca39bf 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -423,6 +423,8 @@ endif
 config ROCKCHIP_RV1126
 	bool "Support Rockchip RV1126"
 	select CPU_V7
+	select GICV2
+	select ARM_SMCCC
 	select BOARD_LATE_INIT
 	select SUPPORT_SPL
 	select SPL

commit 51626bc227dc46ed6b2eeea00339b6ed66f564c3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 25 17:15:15 2020 +0800

    rockchip: dts: rv1126: sync from kernel
    
    sync from:
    (73d195a ARM: configs: rv1109_defconfig: enable CONFIG_DEVTMPFS_MOUNT)
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I5fa9043871865a5d7f457d20718c4b7e8a7ebf51

diff --git a/arch/arm/dts/rv1126.dtsi b/arch/arm/dts/rv1126.dtsi
index d16ce7912e..aaec6fa93a 100644
--- a/arch/arm/dts/rv1126.dtsi
+++ b/arch/arm/dts/rv1126.dtsi
@@ -210,6 +210,10 @@
 	pmugrf: syscon@fe020000 {
 		compatible = "rockchip,rv1126-pmugrf", "syscon";
 		reg = <0xfe020000 0x1000>;
+
+		pmu_io_domains: io-domains {
+			compatible = "rockchip,rv1126-pmu-io-voltage-domain";
+		};
 	};
 
 	qos_usb_host: qos@fe810008 {
@@ -1304,6 +1308,7 @@
 		rockchip,srv = <&mpp_srv>;
 		rockchip,taskqueue-node = <2>;
 		rockchip,resetgroup-node = <2>;
+		power-domains = <&power RV1126_PD_VEPU>;
 		status = "disabled";
 	};
 
@@ -1317,6 +1322,7 @@
 		clock-names = "aclk", "iface";
 		rockchip,disable-mmu-reset;
 		#iommu-cells = <0>;
+		power-domains = <&power RV1126_PD_VEPU>;
 		status = "disabled";
 	};
 
@@ -1386,7 +1392,7 @@
 			 <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
 		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
 		fifo-depth = <0x100>;
-		max-frequency = <150000000>;
+		max-frequency = <50000000>;
 		status = "disabled";
 	};
 
@@ -1504,11 +1510,11 @@
 		#size-cells = <1>;
 		ranges;
 
-		gpio0: gpio@ff460000 {
+		gpio0: gpio0@ff460000 {
 			compatible = "rockchip,gpio-bank";
 			reg = <0xff460000 0x100>;
 			interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&cru PCLK_GPIO0>;
+			clocks = <&pmucru PCLK_GPIO0>;
 
 			gpio-controller;
 			#gpio-cells = <2>;
@@ -1517,7 +1523,7 @@
 			#interrupt-cells = <2>;
 		};
 
-		gpio1: gpio@ff620000 {
+		gpio1: gpio1@ff620000 {
 			compatible = "rockchip,gpio-bank";
 			reg = <0xff620000 0x100>;
 			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
@@ -1530,7 +1536,7 @@
 			#interrupt-cells = <2>;
 		};
 
-		gpio2: gpio@ff630000 {
+		gpio2: gpio2@ff630000 {
 			compatible = "rockchip,gpio-bank";
 			reg = <0xff630000 0x100>;
 			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
@@ -1543,7 +1549,7 @@
 			#interrupt-cells = <2>;
 		};
 
-		gpio3: gpio@ff640000 {
+		gpio3: gpio3@ff640000 {
 			compatible = "rockchip,gpio-bank";
 			reg = <0xff640000 0x100>;
 			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
@@ -1556,7 +1562,7 @@
 			#interrupt-cells = <2>;
 		};
 
-		gpio4: gpio@ff650000 {
+		gpio4: gpio4@ff650000 {
 			compatible = "rockchip,gpio-bank";
 			reg = <0xff650000 0x100>;
 			interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;

commit 7b515e87eeabc88ee46d29f61ead8ef74e0837df
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 25 16:44:53 2020 +0800

    rockchip: rv1126: syscon add pmugrf and scan fdt
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I288566a68876c02aae8470a0b9aca2974ef16fe6

diff --git a/arch/arm/mach-rockchip/rv1126/syscon_rv1126.c b/arch/arm/mach-rockchip/rv1126/syscon_rv1126.c
index 964d6d43c4..d3cd6f1a49 100644
--- a/arch/arm/mach-rockchip/rv1126/syscon_rv1126.c
+++ b/arch/arm/mach-rockchip/rv1126/syscon_rv1126.c
@@ -11,6 +11,7 @@
 
 static const struct udevice_id rv1126_syscon_ids[] = {
 	{ .compatible = "rockchip,rv1126-grf", .data = ROCKCHIP_SYSCON_GRF },
+	{ .compatible = "rockchip,rv1126-pmugrf", .data = ROCKCHIP_SYSCON_PMUGRF },
 	{ }
 };
 
@@ -18,5 +19,7 @@ U_BOOT_DRIVER(syscon_rv1126) = {
 	.name = "rv1126_syscon",
 	.id = UCLASS_SYSCON,
 	.of_match = rv1126_syscon_ids,
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	.bind = dm_scan_fdt_dev,
+#endif
 };
-

commit 5b204fcb90b5811ebfcb207b9277a3fa1ffcf37a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Mar 23 15:55:50 2020 +0800

    rockchip: dts: rv1126: delete /omit-if-no-ref/
    
    DTC from U-Boot don't support this property.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If2bf503615b7b28390d414b89cfb83938b33a4a6

diff --git a/arch/arm/dts/rv1126-pinctrl.dtsi b/arch/arm/dts/rv1126-pinctrl.dtsi
index 9ad207d8a8..4ddc77809a 100644
--- a/arch/arm/dts/rv1126-pinctrl.dtsi
+++ b/arch/arm/dts/rv1126-pinctrl.dtsi
@@ -8,7 +8,6 @@
 
 &pinctrl {
 	a7 {
-		/omit-if-no-ref/
 		a7m0_pins: a7m0-pins {
 			rockchip,pins =
 				/* a7_jtag_tck_m0 */
@@ -16,7 +15,6 @@
 				/* a7_jtag_tms_m0 */
 				<1 RK_PA7 3 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		a7m1_pins: a7m1-pins {
 			rockchip,pins =
 				/* a7_jtag_tck_m1 */
@@ -26,7 +24,6 @@
 		};
 	};
 	acodec {
-		/omit-if-no-ref/
 		acodec_pins: acodec-pins {
 			rockchip,pins =
 				/* acodec_adc_clk */
@@ -46,7 +43,6 @@
 		};
 	};
 	auddsm {
-		/omit-if-no-ref/
 		auddsm_pins: auddsm-pins {
 			rockchip,pins =
 				/* auddsm_ln */
@@ -60,7 +56,6 @@
 		};
 	};
 	audpwm {
-		/omit-if-no-ref/
 		audpwmm0_pins: audpwmm0-pins {
 			rockchip,pins =
 				/* audpwm_l_m0 */
@@ -68,7 +63,6 @@
 				/* audpwm_r_m0 */
 				<4 RK_PA1 3 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		audpwmm1_pins: audpwmm1-pins {
 			rockchip,pins =
 				/* audpwm_l_m1 */
@@ -78,7 +72,6 @@
 		};
 	};
 	can {
-		/omit-if-no-ref/
 		canm0_pins: canm0-pins {
 			rockchip,pins =
 				/* can_rxd_m0 */
@@ -86,7 +79,6 @@
 				/* can_txd_m0 */
 				<3 RK_PA1 3 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		canm1_pins: canm1-pins {
 			rockchip,pins =
 				/* can_rxd_m1 */
@@ -96,7 +88,6 @@
 		};
 	};
 	cif {
-		/omit-if-no-ref/
 		cifm0_dvp_ctl: cifm0-dvp_ctl {
 			rockchip,pins =
 				/* cif_clkin_m0 */
@@ -140,7 +131,6 @@
 				/* cif_vsync_m0 */
 				<3 RK_PC4 1 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		cifm1_dvp_ctl: cifm1-dvp_ctl {
 			rockchip,pins =
 				/* cif_clkin_m1 */
@@ -186,37 +176,31 @@
 		};
 	};
 	clk {
-		/omit-if-no-ref/
 		clkm0_pins: clkm0-pins {
 			rockchip,pins =
 				/* clk_out_ethernet_m0 */
 				<3 RK_PC5 2 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		clkm1_pins: clkm1-pins {
 			rockchip,pins =
 				/* clk_out_ethernet_m1 */
 				<2 RK_PC5 2 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		clk_32k: clk-32k {
 			rockchip,pins =
 				<0 RK_PA2 1 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		clk_ref: clk-ref {
 			rockchip,pins =
 				<0 RK_PA0 1 &pcfg_pull_none>;
 		};
 	};
 	emmc {
-		/omit-if-no-ref/
 		emmc_rstnout: emmc-rstnout {
 			rockchip,pins =
 				/* emmc_rstn */
 				<1 RK_PA3 2 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		emmc_bus8: emmc-bus8 {
 			rockchip,pins =
 				/* emmc_d0 */
@@ -236,13 +220,11 @@
 				/* emmc_d7 */
 				<0 RK_PD3 2 &pcfg_pull_up_drv_level_2>;
 		};
-		/omit-if-no-ref/
 		emmc_clk: emmc-clk {
 			rockchip,pins =
 				/* emmc_clk */
 				<0 RK_PD7 2 &pcfg_pull_up_drv_level_2>;
 		};
-		/omit-if-no-ref/
 		emmc_cmd: emmc-cmd {
 			rockchip,pins =
 				/* emmc_cmd */
@@ -250,7 +232,6 @@
 		};
 	};
 	flash {
-		/omit-if-no-ref/
 		flash_pins: flash-pins {
 			rockchip,pins =
 				/* flash_ale */
@@ -292,7 +273,6 @@
 		};
 	};
 	fspi {
-		/omit-if-no-ref/
 		fspi_pins: fspi-pins {
 			rockchip,pins =
 				/* fspi_clk */
@@ -312,7 +292,6 @@
 		};
 	};
 	i2c0 {
-		/omit-if-no-ref/
 		i2c0_xfer: i2c0-xfer {
 			rockchip,pins =
 				/* i2c0_scl */
@@ -322,7 +301,6 @@
 		};
 	};
 	i2c1 {
-		/omit-if-no-ref/
 		i2c1_xfer: i2c1-xfer {
 			rockchip,pins =
 				/* i2c1_scl */
@@ -332,7 +310,6 @@
 		};
 	};
 	i2c2 {
-		/omit-if-no-ref/
 		i2c2_xfer: i2c2-xfer {
 			rockchip,pins =
 				/* i2c2_scl */
@@ -342,7 +319,6 @@
 		};
 	};
 	i2c3 {
-		/omit-if-no-ref/
 		i2c3m0_xfer: i2c3m0-xfer {
 			rockchip,pins =
 				/* i2c3_scl_m0 */
@@ -350,7 +326,6 @@
 				/* i2c3_sda_m0 */
 				<3 RK_PA5 5 &pcfg_pull_none_smt>;
 		};
-		/omit-if-no-ref/
 		i2c3m1_xfer: i2c3m1-xfer {
 			rockchip,pins =
 				/* i2c3_scl_m1 */
@@ -358,7 +333,6 @@
 				/* i2c3_sda_m1 */
 				<2 RK_PD5 7 &pcfg_pull_none_smt>;
 		};
-		/omit-if-no-ref/
 		i2c3m2_xfer: i2c3m2-xfer {
 			rockchip,pins =
 				/* i2c3_scl_m2 */
@@ -368,7 +342,6 @@
 		};
 	};
 	i2c4 {
-		/omit-if-no-ref/
 		i2c4m0_xfer: i2c4m0-xfer {
 			rockchip,pins =
 				/* i2c4_scl_m0 */
@@ -376,7 +349,6 @@
 				/* i2c4_sda_m0 */
 				<3 RK_PA1 7 &pcfg_pull_none_smt>;
 		};
-		/omit-if-no-ref/
 		i2c4m1_xfer: i2c4m1-xfer {
 			rockchip,pins =
 				/* i2c4_scl_m1 */
@@ -386,7 +358,6 @@
 		};
 	};
 	i2c5 {
-		/omit-if-no-ref/
 		i2c5m0_xfer: i2c5m0-xfer {
 			rockchip,pins =
 				/* i2c5_scl_m0 */
@@ -394,7 +365,6 @@
 				/* i2c5_sda_m0 */
 				<2 RK_PB3 7 &pcfg_pull_none_smt>;
 		};
-		/omit-if-no-ref/
 		i2c5m1_xfer: i2c5m1-xfer {
 			rockchip,pins =
 				/* i2c5_scl_m1 */
@@ -402,7 +372,6 @@
 				/* i2c5_sda_m1 */
 				<3 RK_PB1 5 &pcfg_pull_none_smt>;
 		};
-		/omit-if-no-ref/
 		i2c5m2_xfer: i2c5m2-xfer {
 			rockchip,pins =
 				/* i2c5_scl_m2 */
@@ -412,238 +381,192 @@
 		};
 	};
 	i2s0 {
-		/omit-if-no-ref/
 		i2s0m0_lrck_rx: i2s0m0-lrck-rx {
 			rockchip,pins =
 				<3 RK_PD4 1 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		i2s0m0_lrck_tx: i2s0m0-lrck-tx {
 			rockchip,pins =
 				<3 RK_PD3 1 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		i2s0m0_mclk: i2s0m0-mclk {
 			rockchip,pins =
 				<3 RK_PD2 1 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		i2s0m0_sclk_rx: i2s0m0-sclk-rx {
 			rockchip,pins =
 				<3 RK_PD1 1 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		i2s0m0_sclk_tx: i2s0m0-sclk-tx {
 			rockchip,pins =
 				<3 RK_PD0 1 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		i2s0m0_sdi0: i2s0m0-sdi0 {
 			rockchip,pins =
 				<3 RK_PD6 1 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		i2s0m0_sdo0: i2s0m0-sdo0 {
 			rockchip,pins =
 				<3 RK_PD5 1 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		i2s0m0_sdo1_sdi3: i2s0m0-sdo1-sdi3 {
 			rockchip,pins =
 				<3 RK_PD7 1 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		i2s0m0_sdo2_sdi2: i2s0m0-sdo2-sdi2 {
 			rockchip,pins =
 				<4 RK_PA0 1 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		i2s0m0_sdo3_sdi1: i2s0m0-sdo3-sdi1 {
 			rockchip,pins =
 				<4 RK_PA1 1 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		i2s0m1_lrck_rx: i2s0m1-lrck-rx {
 			rockchip,pins =
 				<3 RK_PB2 3 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		i2s0m1_lrck_tx: i2s0m1-lrck-tx {
 			rockchip,pins =
 				<3 RK_PA5 3 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		i2s0m1_mclk: i2s0m1-mclk {
 			rockchip,pins =
 				<3 RK_PB0 3 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		i2s0m1_sclk_rx: i2s0m1-sclk-rx {
 			rockchip,pins =
 				<3 RK_PB1 3 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		i2s0m1_sclk_tx: i2s0m1-sclk-tx {
 			rockchip,pins =
 				<3 RK_PA4 3 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		i2s0m1_sdi0: i2s0m1-sdi0 {
 			rockchip,pins =
 				<3 RK_PA7 3 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		i2s0m1_sdo0: i2s0m1-sdo0 {
 			rockchip,pins =
 				<3 RK_PA6 3 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		i2s0m1_sdo1_sdi3: i2s0m1-sdo1-sdi3 {
 			rockchip,pins =
 				<3 RK_PB3 3 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		i2s0m1_sdo2_sdi2: i2s0m1-sdo2-sdi2 {
 			rockchip,pins =
 				<3 RK_PB4 3 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		i2s0m1_sdo3_sdi1: i2s0m1-sdo3-sdi1 {
 			rockchip,pins =
 				<3 RK_PB5 3 &pcfg_pull_none>;
 		};
 	};
 	i2s1 {
-		/omit-if-no-ref/
 		i2s1m0_lrck: i2s1m0-lrck {
 			rockchip,pins =
 				<1 RK_PA0 4 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		i2s1m0_mclk: i2s1m0-mclk {
 			rockchip,pins =
 				<0 RK_PD4 4 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		i2s1m0_sclk: i2s1m0-sclk {
 			rockchip,pins =
 				<1 RK_PA1 4 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		i2s1m0_sdi: i2s1m0-sdi {
 			rockchip,pins =
 				<1 RK_PA2 4 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		i2s1m0_sdo: i2s1m0-sdo {
 			rockchip,pins =
 				<0 RK_PD6 4 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		i2s1m1_lrck: i2s1m1-lrck {
 			rockchip,pins =
 				<1 RK_PD7 2 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		i2s1m1_mclk: i2s1m1-mclk {
 			rockchip,pins =
 				<1 RK_PD5 2 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		i2s1m1_sclk: i2s1m1-sclk {
 			rockchip,pins =
 				<1 RK_PD6 2 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		i2s1m1_sdi: i2s1m1-sdi {
 			rockchip,pins =
 				<2 RK_PA0 2 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		i2s1m1_sdo: i2s1m1-sdo {
 			rockchip,pins =
 				<2 RK_PA1 2 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		i2s1m2_lrck: i2s1m2-lrck {
 			rockchip,pins =
 				<2 RK_PD2 6 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		i2s1m2_mclk: i2s1m2-mclk {
 			rockchip,pins =
 				<2 RK_PC7 6 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		i2s1m2_sclk: i2s1m2-sclk {
 			rockchip,pins =
 				<2 RK_PD1 6 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		i2s1m2_sdi: i2s1m2-sdi {
 			rockchip,pins =
 				<2 RK_PD3 6 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		i2s1m2_sdo: i2s1m2-sdo {
 			rockchip,pins =
 				<2 RK_PD0 6 &pcfg_pull_none>;
 		};
 	};
 	i2s2 {
-		/omit-if-no-ref/
 		i2s2m0_lrck: i2s2m0-lrck {
 			rockchip,pins =
 				<1 RK_PC7 1 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		i2s2m0_mclk: i2s2m0-mclk {
 			rockchip,pins =
 				<1 RK_PD0 1 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		i2s2m0_sclk: i2s2m0-sclk {
 			rockchip,pins =
 				<1 RK_PC6 1 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		i2s2m0_sdi: i2s2m0-sdi {
 			rockchip,pins =
 				<1 RK_PC5 1 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		i2s2m0_sdo: i2s2m0-sdo {
 			rockchip,pins =
 				<1 RK_PC4 1 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		i2s2m1_lrck: i2s2m1-lrck {
 			rockchip,pins =
 				<2 RK_PB2 2 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		i2s2m1_mclk: i2s2m1-mclk {
 			rockchip,pins =
 				<2 RK_PB3 2 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		i2s2m1_sclk: i2s2m1-sclk {
 			rockchip,pins =
 				<2 RK_PB1 2 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		i2s2m1_sdi: i2s2m1-sdi {
 			rockchip,pins =
 				<2 RK_PB0 2 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		i2s2m1_sdo: i2s2m1-sdo {
 			rockchip,pins =
 				<2 RK_PA7 2 &pcfg_pull_none>;
 		};
 	};
 	lcdc {
-		/omit-if-no-ref/
 		lcdc_ctl: lcdc-ctl {
 			rockchip,pins =
 				/* lcdc_clk */
@@ -705,7 +628,6 @@
 		};
 	};
 	mcu {
-		/omit-if-no-ref/
 		mcu_pins: mcu-pins {
 			rockchip,pins =
 				/* mcu_jtag_tck */
@@ -721,84 +643,69 @@
 		};
 	};
 	mipi {
-		/omit-if-no-ref/
 		mipim1_pins: mipim1-pins {
 			rockchip,pins =
 				/* mipi_csi_clk1_m1 */
 				<2 RK_PA2 1 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		mipi_csi_clk0: mipi-csi-clk0 {
 			rockchip,pins =
 				<2 RK_PA3 1 &pcfg_pull_none>;
 		};
 	};
 	pdm {
-		/omit-if-no-ref/
 		pdmm0_clk: pdmm0-clk {
 			rockchip,pins =
 				/* pdm_clk0_m0 */
 				<3 RK_PD4 2 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		pdmm0_clk1: pdmm0-clk1 {
 			rockchip,pins =
 				<3 RK_PD1 2 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		pdmm0_sdi0: pdmm0-sdi0 {
 			rockchip,pins =
 				<3 RK_PD6 2 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		pdmm0_sdi1: pdmm0-sdi1 {
 			rockchip,pins =
 				<4 RK_PA1 2 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		pdmm0_sdi2: pdmm0-sdi2 {
 			rockchip,pins =
 				<4 RK_PA0 2 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		pdmm0_sdi3: pdmm0-sdi3 {
 			rockchip,pins =
 				<3 RK_PD7 2 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		pdmm1_clk: pdmm1-clk {
 			rockchip,pins =
 				/* pdm_clk0_m1 */
 				<3 RK_PC0 3 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		pdmm1_clk1: pdmm1-clk1 {
 			rockchip,pins =
 				<3 RK_PC3 3 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		pdmm1_sdi0: pdmm1-sdi0 {
 			rockchip,pins =
 				<3 RK_PC1 3 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		pdmm1_sdi1: pdmm1-sdi1 {
 			rockchip,pins =
 				<3 RK_PC2 3 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		pdmm1_sdi2: pdmm1-sdi2 {
 			rockchip,pins =
 				<3 RK_PB6 3 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		pdmm1_sdi3: pdmm1-sdi3 {
 			rockchip,pins =
 				<3 RK_PB7 3 &pcfg_pull_none>;
 		};
 	};
 	pmic {
-		/omit-if-no-ref/
 		pmic_pins: pmic-pins {
 			rockchip,pins =
 				/* pmic_int */
@@ -808,7 +715,6 @@
 		};
 	};
 	pmu {
-		/omit-if-no-ref/
 		pmu_pins: pmu-pins {
 			rockchip,pins =
 				/* pmu_debug */
@@ -816,7 +722,6 @@
 		};
 	};
 	prelight {
-		/omit-if-no-ref/
 		prelight_pins: prelight-pins {
 			rockchip,pins =
 				/* prelight_trig_out */
@@ -824,25 +729,21 @@
 		};
 	};
 	pwm0 {
-		/omit-if-no-ref/
 		pwm0m0_pins: pwm0m0-pins {
 			rockchip,pins =
 				/* pwm0_m0 */
 				<0 RK_PB6 3 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		pwm0m0_pins_pull_down: pwm0m0-pins-pull-down {
 			rockchip,pins =
 				/* pwm0_m0 */
 				<0 RK_PB6 3 &pcfg_pull_down>;
 		};
-		/omit-if-no-ref/
 		pwm0m1_pins: pwm0m1-pins {
 			rockchip,pins =
 				/* pwm0_m1 */
 				<2 RK_PB3 5 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		pwm0m1_pins_pull_down: pwm0m1-pins-pull-down {
 			rockchip,pins =
 				/* pwm0_m1 */
@@ -850,25 +751,21 @@
 		};
 	};
 	pwm1 {
-		/omit-if-no-ref/
 		pwm1m0_pins: pwm1m0-pins {
 			rockchip,pins =
 				/* pwm1_m0 */
 				<0 RK_PB7 3 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		pwm1m0_pins_pull_down: pwm1m0-pins-pull-down {
 			rockchip,pins =
 				/* pwm1_m0 */
 				<0 RK_PB7 3 &pcfg_pull_down>;
 		};
-		/omit-if-no-ref/
 		pwm1m1_pins: pwm1m1-pins {
 			rockchip,pins =
 				/* pwm1_m1 */
 				<2 RK_PB2 5 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		pwm1m1_pins_pull_down: pwm1m1-pins-pull-down {
 			rockchip,pins =
 				/* pwm1_m1 */
@@ -876,25 +773,21 @@
 		};
 	};
 	pwm10 {
-		/omit-if-no-ref/
 		pwm10m0_pins: pwm10m0-pins {
 			rockchip,pins =
 				/* pwm10_m0 */
 				<3 RK_PA6 6 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		pwm10m0_pins_pull_down: pwm10m0-pins-pull-down {
 			rockchip,pins =
 				/* pwm10_m0 */
 				<3 RK_PA6 6 &pcfg_pull_down>;
 		};
-		/omit-if-no-ref/
 		pwm10m1_pins: pwm10m1-pins {
 			rockchip,pins =
 				/* pwm10_m1 */
 				<2 RK_PD5 5 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		pwm10m1_pins_pull_down: pwm10m1-pins-pull-down {
 			rockchip,pins =
 				/* pwm10_m1 */
@@ -902,25 +795,21 @@
 		};
 	};
 	pwm11 {
-		/omit-if-no-ref/
 		pwm11m0_pins: pwm11m0-pins {
 			rockchip,pins =
 				/* pwm11_ir_m0 */
 				<3 RK_PA7 6 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		pwm11m0_pins_pull_down: pwm11m0-pins-pull-down {
 			rockchip,pins =
 				/* pwm11_ir_m0 */
 				<3 RK_PA7 6 &pcfg_pull_down>;
 		};
-		/omit-if-no-ref/
 		pwm11m1_pins: pwm11m1-pins {
 			rockchip,pins =
 				/* pwm11_ir_m1 */
 				<2 RK_PD4 5 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		pwm11m1_pins_pull_down: pwm11m1-pins-pull-down {
 			rockchip,pins =
 				/* pwm11_ir_m1 */
@@ -928,25 +817,21 @@
 		};
 	};
 	pwm2 {
-		/omit-if-no-ref/
 		pwm2m0_pins: pwm2m0-pins {
 			rockchip,pins =
 				/* pwm2_m0 */
 				<0 RK_PC0 3 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		pwm2m0_pins_pull_down: pwm2m0-pins-pull-down {
 			rockchip,pins =
 				/* pwm2_m0 */
 				<0 RK_PC0 3 &pcfg_pull_down>;
 		};
-		/omit-if-no-ref/
 		pwm2m1_pins: pwm2m1-pins {
 			rockchip,pins =
 				/* pwm2_m1 */
 				<2 RK_PB1 5 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		pwm2m1_pins_pull_down: pwm2m1-pins-pull-down {
 			rockchip,pins =
 				/* pwm2_m1 */
@@ -954,25 +839,21 @@
 		};
 	};
 	pwm3 {
-		/omit-if-no-ref/
 		pwm3m0_pins: pwm3m0-pins {
 			rockchip,pins =
 				/* pwm3_ir_m0 */
 				<0 RK_PC1 3 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		pwm3m0_pins_pull_down: pwm3m0-pins-pull-down {
 			rockchip,pins =
 				/* pwm3_ir_m0 */
 				<0 RK_PC1 3 &pcfg_pull_down>;
 		};
-		/omit-if-no-ref/
 		pwm3m1_pins: pwm3m1-pins {
 			rockchip,pins =
 				/* pwm3_ir_m1 */
 				<2 RK_PB0 5 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		pwm3m1_pins_pull_down: pwm3m1-pins-pull-down {
 			rockchip,pins =
 				/* pwm3_ir_m1 */
@@ -980,25 +861,21 @@
 		};
 	};
 	pwm4 {
-		/omit-if-no-ref/
 		pwm4m0_pins: pwm4m0-pins {
 			rockchip,pins =
 				/* pwm4_m0 */
 				<0 RK_PC2 3 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		pwm4m0_pins_pull_down: pwm4m0-pins-pull-down {
 			rockchip,pins =
 				/* pwm4_m0 */
 				<0 RK_PC2 3 &pcfg_pull_down>;
 		};
-		/omit-if-no-ref/
 		pwm4m1_pins: pwm4m1-pins {
 			rockchip,pins =
 				/* pwm4_m1 */
 				<2 RK_PA7 5 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		pwm4m1_pins_pull_down: pwm4m1-pins-pull-down {
 			rockchip,pins =
 				/* pwm4_m1 */
@@ -1006,25 +883,21 @@
 		};
 	};
 	pwm5 {
-		/omit-if-no-ref/
 		pwm5m0_pins: pwm5m0-pins {
 			rockchip,pins =
 				/* pwm5_m0 */
 				<0 RK_PC3 3 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		pwm5m0_pins_pull_down: pwm5m0-pins-pull-down {
 			rockchip,pins =
 				/* pwm5_m0 */
 				<0 RK_PC3 3 &pcfg_pull_down>;
 		};
-		/omit-if-no-ref/
 		pwm5m1_pins: pwm5m1-pins {
 			rockchip,pins =
 				/* pwm5_m1 */
 				<2 RK_PA6 5 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		pwm5m1_pins_pull_down: pwm5m1-pins-pull-down {
 			rockchip,pins =
 				/* pwm5_m1 */
@@ -1032,25 +905,21 @@
 		};
 	};
 	pwm6 {
-		/omit-if-no-ref/
 		pwm6m0_pins: pwm6m0-pins {
 			rockchip,pins =
 				/* pwm6_m0 */
 				<0 RK_PB2 3 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		pwm6m0_pins_pull_down: pwm6m0-pins-pull-down {
 			rockchip,pins =
 				/* pwm6_m0 */
 				<0 RK_PB2 3 &pcfg_pull_down>;
 		};
-		/omit-if-no-ref/
 		pwm6m1_pins: pwm6m1-pins {
 			rockchip,pins =
 				/* pwm6_m1 */
 				<3 RK_PA1 5 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		pwm6m1_pins_pull_up: pwm6m1-pins-pull-up {
 			rockchip,pins =
 				/* pwm6_m1 */
@@ -1058,25 +927,21 @@
 		};
 	};
 	pwm7 {
-		/omit-if-no-ref/
 		pwm7m0_pins: pwm7m0-pins {
 			rockchip,pins =
 				/* pwm7_ir_m0 */
 				<0 RK_PB1 3 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		pwm7m0_pins_pull_down: pwm7m0-pins-pull-down {
 			rockchip,pins =
 				/* pwm7_ir_m0 */
 				<0 RK_PB1 3 &pcfg_pull_down>;
 		};
-		/omit-if-no-ref/
 		pwm7m1_pins: pwm7m1-pins {
 			rockchip,pins =
 				/* pwm7_ir_m1 */
 				<3 RK_PA0 5 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		pwm7m1_pins_pull_up: pwm7m1-pins-pull-up {
 			rockchip,pins =
 				/* pwm7_ir_m1 */
@@ -1084,25 +949,21 @@
 		};
 	};
 	pwm8 {
-		/omit-if-no-ref/
 		pwm8m0_pins: pwm8m0-pins {
 			rockchip,pins =
 				/* pwm8_m0 */
 				<3 RK_PA4 6 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		pwm8m0_pins_pull_down: pwm8m0-pins-pull-down {
 			rockchip,pins =
 				/* pwm8_m0 */
 				<3 RK_PA4 6 &pcfg_pull_down>;
 		};
-		/omit-if-no-ref/
 		pwm8m1_pins: pwm8m1-pins {
 			rockchip,pins =
 				/* pwm8_m1 */
 				<2 RK_PD7 5 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		pwm8m1_pins_pull_down: pwm8m1-pins-pull-down {
 			rockchip,pins =
 				/* pwm8_m1 */
@@ -1110,25 +971,21 @@
 		};
 	};
 	pwm9 {
-		/omit-if-no-ref/
 		pwm9m0_pins: pwm9m0-pins {
 			rockchip,pins =
 				/* pwm9_m0 */
 				<3 RK_PA5 6 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		pwm9m0_pins_pull_down: pwm9m0-pins-pull-down {
 			rockchip,pins =
 				/* pwm9_m0 */
 				<3 RK_PA5 6 &pcfg_pull_down>;
 		};
-		/omit-if-no-ref/
 		pwm9m1_pins: pwm9m1-pins {
 			rockchip,pins =
 				/* pwm9_m1 */
 				<2 RK_PD6 5 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		pwm9m1_pins_pull_down: pwm9m1-pins-pull-down {
 			rockchip,pins =
 				/* pwm9_m1 */
@@ -1136,7 +993,6 @@
 		};
 	};
 	rgmii {
-		/omit-if-no-ref/
 		rgmiim0_pins: rgmiim0-pins {
 			rockchip,pins =
 				/* rgmii_clk_m0 */
@@ -1170,7 +1026,6 @@
 				/* rgmii_txen_m0 */
 				<3 RK_PB5 2 &pcfg_pull_none_drv_level_12>;
 		};
-		/omit-if-no-ref/
 		rgmiim1_pins: rgmiim1-pins {
 			rockchip,pins =
 				/* rgmii_clk_m1 */
@@ -1206,7 +1061,6 @@
 		};
 	};
 	rmii {
-		/omit-if-no-ref/
 		rmiim0_pins: rmiim0-pins {
 			rockchip,pins =
 				/* rmii_clk_m0 */
@@ -1230,7 +1084,6 @@
 				/* rmii_txen_m0 */
 				<3 RK_PB5 2 &pcfg_pull_none_drv_level_12>;
 		};
-		/omit-if-no-ref/
 		rmiim1_pins: rmiim1-pins {
 			rockchip,pins =
 				/* rmii_clk_m1 */
@@ -1256,13 +1109,11 @@
 		};
 	};
 	clk_out_ethernet {
-		/omit-if-no-ref/
 		clk_out_ethernetm0_pins: clk-out-ethernetm0-pins {
 			rockchip,pins =
 				/* clk_out_ethernet_m0 */
 				<3 RK_PC5 2 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		clk_out_ethernetm1_pins: clk-out-ethernetm1-pins {
 			rockchip,pins =
 				/* clk_out_ethernet_m1 */
@@ -1270,7 +1121,6 @@
 		};
 	};
 	sdmmc0 {
-		/omit-if-no-ref/
 		sdmmc0_bus4: sdmmc0-bus4 {
 			rockchip,pins =
 				/* sdmmc0_d0 */
@@ -1282,31 +1132,26 @@
 				/* sdmmc0_d3 */
 				<1 RK_PA7 1 &pcfg_pull_up_drv_level_2>;
 		};
-		/omit-if-no-ref/
 		sdmmc0_clk: sdmmc0-clk {
 			rockchip,pins =
 				/* sdmmc0_clk */
 				<1 RK_PB0 1 &pcfg_pull_up_drv_level_2>;
 		};
-		/omit-if-no-ref/
 		sdmmc0_cmd: sdmmc0-cmd {
 			rockchip,pins =
 				/* sdmmc0_cmd */
 				<1 RK_PB1 1 &pcfg_pull_up_drv_level_2>;
 		};
-		/omit-if-no-ref/
 		sdmmc0_det: sdmmc0-det {
 			rockchip,pins =
 				<0 RK_PA3 1 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		sdmmc0_pwr: sdmmc0-pwr {
 			rockchip,pins =
 				<0 RK_PC0 1 &pcfg_pull_none>;
 		};
 	};
 	sdmmc1 {
-		/omit-if-no-ref/
 		sdmmc1_bus4: sdmmc1-bus4 {
 			rockchip,pins =
 				/* sdmmc1_d0 */
@@ -1318,234 +1163,190 @@
 				/* sdmmc1_d3 */
 				<1 RK_PB7 1 &pcfg_pull_up_drv_level_2>;
 		};
-		/omit-if-no-ref/
 		sdmmc1_clk: sdmmc1-clk {
 			rockchip,pins =
 				/* sdmmc1_clk */
 				<1 RK_PB2 1 &pcfg_pull_up_drv_level_2>;
 		};
-		/omit-if-no-ref/
 		sdmmc1_cmd: sdmmc1-cmd {
 			rockchip,pins =
 				/* sdmmc1_cmd */
 				<1 RK_PB3 1 &pcfg_pull_up_drv_level_2>;
 		};
-		/omit-if-no-ref/
 		sdmmc1_det: sdmmc1-det {
 			rockchip,pins =
 				<1 RK_PD0 2 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		sdmmc1_pwr: sdmmc1-pwr {
 			rockchip,pins =
 				<1 RK_PD1 2 &pcfg_pull_none>;
 		};
 	};
 	spi0 {
-		/omit-if-no-ref/
 		spi0m0_clk: spi0m0-clk {
 			rockchip,pins =
 				<0 RK_PB0 1 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		spi0m0_cs0n: spi0m0-cs0n {
 			rockchip,pins =
 				<0 RK_PA5 1 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		spi0m0_cs1n: spi0m0-cs1n {
 			rockchip,pins =
 				<0 RK_PA4 1 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		spi0m0_miso: spi0m0-miso {
 			rockchip,pins =
 				<0 RK_PA7 1 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		spi0m0_mosi: spi0m0-mosi {
 			rockchip,pins =
 				<0 RK_PA6 1 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		spi0m0_clk_hs: spi0m0-clk_hs {
 			rockchip,pins =
 				<0 RK_PB0 1 &pcfg_pull_up_drv_level_2>;
 		};
-		/omit-if-no-ref/
 		spi0m0_miso_hs: spi0m0-miso_hs {
 			rockchip,pins =
 				<0 RK_PA7 1 &pcfg_pull_up_drv_level_2>;
 		};
-		/omit-if-no-ref/
 		spi0m0_mosi_hs: spi0m0-mosi_hs {
 			rockchip,pins =
 				<0 RK_PA6 1 &pcfg_pull_up_drv_level_2>;
 		};
-		/omit-if-no-ref/
 		spi0m1_clk: spi0m1-clk {
 			rockchip,pins =
 				<2 RK_PA1 1 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		spi0m1_cs0n: spi0m1-cs0n {
 			rockchip,pins =
 				<2 RK_PA0 1 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		spi0m1_cs1n: spi0m1-cs1n {
 			rockchip,pins =
 				<1 RK_PD5 1 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		spi0m1_miso: spi0m1-miso {
 			rockchip,pins =
 				<1 RK_PD7 1 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		spi0m1_mosi: spi0m1-mosi {
 			rockchip,pins =
 				<1 RK_PD6 1 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		spi0m2_clk: spi0m2-clk {
 			rockchip,pins =
 				<2 RK_PB2 6 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		spi0m2_cs0n: spi0m2-cs0n {
 			rockchip,pins =
 				<2 RK_PA7 6 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		spi0m2_cs1n: spi0m2-cs1n {
 			rockchip,pins =
 				<2 RK_PB3 6 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		spi0m2_miso: spi0m2-miso {
 			rockchip,pins =
 				<2 RK_PB1 6 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		spi0m2_mosi: spi0m2-mosi {
 			rockchip,pins =
 				<2 RK_PB0 6 &pcfg_pull_none>;
 		};
 	};
 	spi1 {
-		/omit-if-no-ref/
 		spi1m0_clk: spi1m0-clk {
 			rockchip,pins =
 				<3 RK_PC0 5 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		spi1m0_cs0n: spi1m0-cs0n {
 			rockchip,pins =
 				<3 RK_PB5 5 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		spi1m0_cs1n: spi1m0-cs1n {
 			rockchip,pins =
 				<3 RK_PB4 5 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		spi1m0_miso: spi1m0-miso {
 			rockchip,pins =
 				<3 RK_PB7 5 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		spi1m0_mosi: spi1m0-mosi {
 			rockchip,pins =
 				<3 RK_PB6 5 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		spi1m0_clk_hs: spi1m0-clk_hs {
 			rockchip,pins =
 				<3 RK_PC0 5 &pcfg_pull_up_drv_level_2>;
 		};
-		/omit-if-no-ref/
 		spi1m0_miso_hs: spi1m0-miso_hs {
 			rockchip,pins =
 				<3 RK_PB7 5 &pcfg_pull_up_drv_level_2>;
 		};
-		/omit-if-no-ref/
 		spi1m0_mosi_hs: spi1m0-mosi_hs {
 			rockchip,pins =
 				<3 RK_PB6 5 &pcfg_pull_up_drv_level_2>;
 		};
-		/omit-if-no-ref/
 		spi1m1_clk: spi1m1-clk {
 			rockchip,pins =
 				<1 RK_PC6 3 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		spi1m1_cs0n: spi1m1-cs0n {
 			rockchip,pins =
 				<1 RK_PC7 3 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		spi1m1_cs1n: spi1m1-cs1n {
 			rockchip,pins =
 				<1 RK_PD0 3 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		spi1m1_miso: spi1m1-miso {
 			rockchip,pins =
 				<1 RK_PC5 3 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		spi1m1_mosi: spi1m1-mosi {
 			rockchip,pins =
 				<1 RK_PC4 3 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		spi1m2_clk: spi1m2-clk {
 			rockchip,pins =
 				<2 RK_PD5 6 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		spi1m2_cs0n: spi1m2-cs0n {
 			rockchip,pins =
 				<2 RK_PD4 6 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		spi1m2_cs1n: spi1m2-cs1n {
 			rockchip,pins =
 				<3 RK_PA0 6 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		spi1m2_miso: spi1m2-miso {
 			rockchip,pins =
 				<2 RK_PD7 6 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		spi1m2_mosi: spi1m2-mosi {
 			rockchip,pins =
 				<2 RK_PD6 6 &pcfg_pull_none>;
 		};
 	};
 	tsadc {
-		/omit-if-no-ref/
 		tsadcm0_pins: tsadcm0-pins {
 			rockchip,pins =
 				/* tsadc_shut_m0 */
 				<0 RK_PA1 1 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		tsadcm1_pins: tsadcm1-pins {
 			rockchip,pins =
 				/* tsadc_shut_m1 */
 				<0 RK_PB2 2 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		tsadc_shutorg: tsadc-shutorg {
 			rockchip,pins =
 				<0 RK_PA1 2 &pcfg_pull_none>;
 		};
 	};
 	uart0 {
-		/omit-if-no-ref/
 		uart0_xfer: uart0-xfer {
 			rockchip,pins =
 				/* uart0_rx */
@@ -1553,19 +1354,16 @@
 				/* uart0_tx */
 				<1 RK_PC3 1 &pcfg_pull_up>;
 		};
-		/omit-if-no-ref/
 		uart0_ctsn: uart0-ctsn {
 			rockchip,pins =
 				<1 RK_PC1 1 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		uart0_rtsn: uart0-rtsn {
 			rockchip,pins =
 				<1 RK_PC0 1 &pcfg_pull_none>;
 		};
 	};
 	uart1 {
-		/omit-if-no-ref/
 		uart1m0_xfer: uart1m0-xfer {
 			rockchip,pins =
 				/* uart1_rx_m0 */
@@ -1573,17 +1371,14 @@
 				/* uart1_tx_m0 */
 				<0 RK_PB6 2 &pcfg_pull_up>;
 		};
-		/omit-if-no-ref/
 		uart1m0_ctsn: uart1m0-ctsn {
 			rockchip,pins =
 				<0 RK_PC1 2 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		uart1m0_rtsn: uart1m0-rtsn {
 			rockchip,pins =
 				<0 RK_PC0 2 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		uart1m1_xfer: uart1m1-xfer {
 			rockchip,pins =
 				/* uart1_rx_m1 */
@@ -1591,19 +1386,16 @@
 				/* uart1_tx_m1 */
 				<1 RK_PD0 5 &pcfg_pull_up>;
 		};
-		/omit-if-no-ref/
 		uart1m1_ctsn: uart1m1-ctsn {
 			rockchip,pins =
 				<1 RK_PC7 5 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		uart1m1_rtsn: uart1m1-rtsn {
 			rockchip,pins =
 				<1 RK_PC6 5 &pcfg_pull_none>;
 		};
 	};
 	uart2 {
-		/omit-if-no-ref/
 		uart2m0_xfer: uart2m0-xfer {
 			rockchip,pins =
 				/* uart2_rx_m0 */
@@ -1611,7 +1403,6 @@
 				/* uart2_tx_m0 */
 				<1 RK_PA5 3 &pcfg_pull_up>;
 		};
-		/omit-if-no-ref/
 		uart2m1_xfer: uart2m1-xfer {
 			rockchip,pins =
 				/* uart2_rx_m1 */
@@ -1621,7 +1412,6 @@
 		};
 	};
 	uart3 {
-		/omit-if-no-ref/
 		uart3m0_xfer: uart3m0-xfer {
 			rockchip,pins =
 				/* uart3_rx_m0 */
@@ -1629,17 +1419,14 @@
 				/* uart3_tx_m0 */
 				<3 RK_PC6 4 &pcfg_pull_up>;
 		};
-		/omit-if-no-ref/
 		uart3m0_ctsn: uart3m0-ctsn {
 			rockchip,pins =
 				<3 RK_PC5 4 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		uart3m0_rtsn: uart3m0-rtsn {
 			rockchip,pins =
 				<3 RK_PC4 4 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		uart3m1_xfer: uart3m1-xfer {
 			rockchip,pins =
 				/* uart3_rx_m1 */
@@ -1647,7 +1434,6 @@
 				/* uart3_tx_m1 */
 				<1 RK_PA7 2 &pcfg_pull_up>;
 		};
-		/omit-if-no-ref/
 		uart3m2_xfer: uart3m2-xfer {
 			rockchip,pins =
 				/* uart3_rx_m2 */
@@ -1655,29 +1441,24 @@
 				/* uart3_tx_m2 */
 				<3 RK_PA0 4 &pcfg_pull_up>;
 		};
-		/omit-if-no-ref/
 		uart3m2_ctsn: uart3m2-ctsn {
 			rockchip,pins =
 				<2 RK_PD7 4 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		uart3m2_rtsn: uart3m2-rtsn {
 			rockchip,pins =
 				<2 RK_PD6 4 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		uart3_ctsn: uart3-ctsn {
 			rockchip,pins =
 				<1 RK_PB1 2 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		uart3_rtsn: uart3-rtsn {
 			rockchip,pins =
 				<1 RK_PB0 2 &pcfg_pull_none>;
 		};
 	};
 	uart4 {
-		/omit-if-no-ref/
 		uart4m0_xfer: uart4m0-xfer {
 			rockchip,pins =
 				/* uart4_rx_m0 */
@@ -1685,17 +1466,14 @@
 				/* uart4_tx_m0 */
 				<3 RK_PA4 4 &pcfg_pull_up>;
 		};
-		/omit-if-no-ref/
 		uart4m0_ctsn: uart4m0-ctsn {
 			rockchip,pins =
 				<3 RK_PB3 4 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		uart4m0_rtsn: uart4m0-rtsn {
 			rockchip,pins =
 				<3 RK_PB2 4 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		uart4m1_xfer: uart4m1-xfer {
 			rockchip,pins =
 				/* uart4_rx_m1 */
@@ -1703,17 +1481,14 @@
 				/* uart4_tx_m1 */
 				<2 RK_PA6 4 &pcfg_pull_up>;
 		};
-		/omit-if-no-ref/
 		uart4m1_ctsn: uart4m1-ctsn {
 			rockchip,pins =
 				<2 RK_PA5 4 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		uart4m1_rtsn: uart4m1-rtsn {
 			rockchip,pins =
 				<2 RK_PA4 4 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		uart4m2_xfer: uart4m2-xfer {
 			rockchip,pins =
 				/* uart4_rx_m2 */
@@ -1721,19 +1496,16 @@
 				/* uart4_tx_m2 */
 				<1 RK_PD5 3 &pcfg_pull_up>;
 		};
-		/omit-if-no-ref/
 		uart4m2_ctsn: uart4m2-ctsn {
 			rockchip,pins =
 				<1 RK_PD3 3 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		uart4m2_rtsn: uart4m2-rtsn {
 			rockchip,pins =
 				<1 RK_PD2 3 &pcfg_pull_none>;
 		};
 	};
 	uart5 {
-		/omit-if-no-ref/
 		uart5m0_xfer: uart5m0-xfer {
 			rockchip,pins =
 				/* uart5_rx_m0 */
@@ -1741,17 +1513,14 @@
 				/* uart5_tx_m0 */
 				<3 RK_PA6 4 &pcfg_pull_up>;
 		};
-		/omit-if-no-ref/
 		uart5m0_ctsn: uart5m0-ctsn {
 			rockchip,pins =
 				<3 RK_PB1 4 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		uart5m0_rtsn: uart5m0-rtsn {
 			rockchip,pins =
 				<3 RK_PB0 4 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		uart5m1_xfer: uart5m1-xfer {
 			rockchip,pins =
 				/* uart5_rx_m1 */
@@ -1759,17 +1528,14 @@
 				/* uart5_tx_m1 */
 				<2 RK_PB0 4 &pcfg_pull_up>;
 		};
-		/omit-if-no-ref/
 		uart5m1_ctsn: uart5m1-ctsn {
 			rockchip,pins =
 				<2 RK_PB3 4 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		uart5m1_rtsn: uart5m1-rtsn {
 			rockchip,pins =
 				<2 RK_PB2 4 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		uart5m2_xfer: uart5m2-xfer {
 			rockchip,pins =
 				/* uart5_rx_m2 */
@@ -1777,12 +1543,10 @@
 				/* uart5_tx_m2 */
 				<2 RK_PA0 3 &pcfg_pull_up>;
 		};
-		/omit-if-no-ref/
 		uart5m2_ctsn: uart5m2-ctsn {
 			rockchip,pins =
 				<2 RK_PA3 3 &pcfg_pull_none>;
 		};
-		/omit-if-no-ref/
 		uart5m2_rtsn: uart5m2-rtsn {
 			rockchip,pins =
 				<2 RK_PA2 3 &pcfg_pull_none>;

commit b497c4c1d263cf096dc4bfd3a9b819f31ed59e21
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Mar 23 15:55:06 2020 +0800

    rockchip: dts: rv1126: sync dts from kernel
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I0c71daffb1982a1d667d9f6bbb99896d94b8ce80

diff --git a/arch/arm/dts/rv1126-pinctrl.dtsi b/arch/arm/dts/rv1126-pinctrl.dtsi
index 358a33e85d..9ad207d8a8 100644
--- a/arch/arm/dts/rv1126-pinctrl.dtsi
+++ b/arch/arm/dts/rv1126-pinctrl.dtsi
@@ -8,6 +8,7 @@
 
 &pinctrl {
 	a7 {
+		/omit-if-no-ref/
 		a7m0_pins: a7m0-pins {
 			rockchip,pins =
 				/* a7_jtag_tck_m0 */
@@ -15,6 +16,7 @@
 				/* a7_jtag_tms_m0 */
 				<1 RK_PA7 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		a7m1_pins: a7m1-pins {
 			rockchip,pins =
 				/* a7_jtag_tck_m1 */
@@ -24,6 +26,7 @@
 		};
 	};
 	acodec {
+		/omit-if-no-ref/
 		acodec_pins: acodec-pins {
 			rockchip,pins =
 				/* acodec_adc_clk */
@@ -43,6 +46,7 @@
 		};
 	};
 	auddsm {
+		/omit-if-no-ref/
 		auddsm_pins: auddsm-pins {
 			rockchip,pins =
 				/* auddsm_ln */
@@ -56,6 +60,7 @@
 		};
 	};
 	audpwm {
+		/omit-if-no-ref/
 		audpwmm0_pins: audpwmm0-pins {
 			rockchip,pins =
 				/* audpwm_l_m0 */
@@ -63,6 +68,7 @@
 				/* audpwm_r_m0 */
 				<4 RK_PA1 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		audpwmm1_pins: audpwmm1-pins {
 			rockchip,pins =
 				/* audpwm_l_m1 */
@@ -72,6 +78,7 @@
 		};
 	};
 	can {
+		/omit-if-no-ref/
 		canm0_pins: canm0-pins {
 			rockchip,pins =
 				/* can_rxd_m0 */
@@ -79,6 +86,7 @@
 				/* can_txd_m0 */
 				<3 RK_PA1 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		canm1_pins: canm1-pins {
 			rockchip,pins =
 				/* can_rxd_m1 */
@@ -88,6 +96,7 @@
 		};
 	};
 	cif {
+		/omit-if-no-ref/
 		cifm0_dvp_ctl: cifm0-dvp_ctl {
 			rockchip,pins =
 				/* cif_clkin_m0 */
@@ -131,6 +140,7 @@
 				/* cif_vsync_m0 */
 				<3 RK_PC4 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		cifm1_dvp_ctl: cifm1-dvp_ctl {
 			rockchip,pins =
 				/* cif_clkin_m1 */
@@ -176,31 +186,37 @@
 		};
 	};
 	clk {
+		/omit-if-no-ref/
 		clkm0_pins: clkm0-pins {
 			rockchip,pins =
 				/* clk_out_ethernet_m0 */
 				<3 RK_PC5 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		clkm1_pins: clkm1-pins {
 			rockchip,pins =
 				/* clk_out_ethernet_m1 */
 				<2 RK_PC5 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		clk_32k: clk-32k {
 			rockchip,pins =
 				<0 RK_PA2 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		clk_ref: clk-ref {
 			rockchip,pins =
 				<0 RK_PA0 1 &pcfg_pull_none>;
 		};
 	};
 	emmc {
+		/omit-if-no-ref/
 		emmc_rstnout: emmc-rstnout {
 			rockchip,pins =
 				/* emmc_rstn */
 				<1 RK_PA3 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		emmc_bus8: emmc-bus8 {
 			rockchip,pins =
 				/* emmc_d0 */
@@ -220,11 +236,13 @@
 				/* emmc_d7 */
 				<0 RK_PD3 2 &pcfg_pull_up_drv_level_2>;
 		};
+		/omit-if-no-ref/
 		emmc_clk: emmc-clk {
 			rockchip,pins =
 				/* emmc_clk */
 				<0 RK_PD7 2 &pcfg_pull_up_drv_level_2>;
 		};
+		/omit-if-no-ref/
 		emmc_cmd: emmc-cmd {
 			rockchip,pins =
 				/* emmc_cmd */
@@ -232,6 +250,7 @@
 		};
 	};
 	flash {
+		/omit-if-no-ref/
 		flash_pins: flash-pins {
 			rockchip,pins =
 				/* flash_ale */
@@ -273,6 +292,7 @@
 		};
 	};
 	fspi {
+		/omit-if-no-ref/
 		fspi_pins: fspi-pins {
 			rockchip,pins =
 				/* fspi_clk */
@@ -292,6 +312,7 @@
 		};
 	};
 	i2c0 {
+		/omit-if-no-ref/
 		i2c0_xfer: i2c0-xfer {
 			rockchip,pins =
 				/* i2c0_scl */
@@ -301,6 +322,7 @@
 		};
 	};
 	i2c1 {
+		/omit-if-no-ref/
 		i2c1_xfer: i2c1-xfer {
 			rockchip,pins =
 				/* i2c1_scl */
@@ -310,6 +332,7 @@
 		};
 	};
 	i2c2 {
+		/omit-if-no-ref/
 		i2c2_xfer: i2c2-xfer {
 			rockchip,pins =
 				/* i2c2_scl */
@@ -319,6 +342,7 @@
 		};
 	};
 	i2c3 {
+		/omit-if-no-ref/
 		i2c3m0_xfer: i2c3m0-xfer {
 			rockchip,pins =
 				/* i2c3_scl_m0 */
@@ -326,6 +350,7 @@
 				/* i2c3_sda_m0 */
 				<3 RK_PA5 5 &pcfg_pull_none_smt>;
 		};
+		/omit-if-no-ref/
 		i2c3m1_xfer: i2c3m1-xfer {
 			rockchip,pins =
 				/* i2c3_scl_m1 */
@@ -333,6 +358,7 @@
 				/* i2c3_sda_m1 */
 				<2 RK_PD5 7 &pcfg_pull_none_smt>;
 		};
+		/omit-if-no-ref/
 		i2c3m2_xfer: i2c3m2-xfer {
 			rockchip,pins =
 				/* i2c3_scl_m2 */
@@ -342,6 +368,7 @@
 		};
 	};
 	i2c4 {
+		/omit-if-no-ref/
 		i2c4m0_xfer: i2c4m0-xfer {
 			rockchip,pins =
 				/* i2c4_scl_m0 */
@@ -349,6 +376,7 @@
 				/* i2c4_sda_m0 */
 				<3 RK_PA1 7 &pcfg_pull_none_smt>;
 		};
+		/omit-if-no-ref/
 		i2c4m1_xfer: i2c4m1-xfer {
 			rockchip,pins =
 				/* i2c4_scl_m1 */
@@ -358,6 +386,7 @@
 		};
 	};
 	i2c5 {
+		/omit-if-no-ref/
 		i2c5m0_xfer: i2c5m0-xfer {
 			rockchip,pins =
 				/* i2c5_scl_m0 */
@@ -365,6 +394,7 @@
 				/* i2c5_sda_m0 */
 				<2 RK_PB3 7 &pcfg_pull_none_smt>;
 		};
+		/omit-if-no-ref/
 		i2c5m1_xfer: i2c5m1-xfer {
 			rockchip,pins =
 				/* i2c5_scl_m1 */
@@ -372,6 +402,7 @@
 				/* i2c5_sda_m1 */
 				<3 RK_PB1 5 &pcfg_pull_none_smt>;
 		};
+		/omit-if-no-ref/
 		i2c5m2_xfer: i2c5m2-xfer {
 			rockchip,pins =
 				/* i2c5_scl_m2 */
@@ -381,192 +412,238 @@
 		};
 	};
 	i2s0 {
+		/omit-if-no-ref/
 		i2s0m0_lrck_rx: i2s0m0-lrck-rx {
 			rockchip,pins =
 				<3 RK_PD4 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s0m0_lrck_tx: i2s0m0-lrck-tx {
 			rockchip,pins =
 				<3 RK_PD3 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s0m0_mclk: i2s0m0-mclk {
 			rockchip,pins =
 				<3 RK_PD2 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s0m0_sclk_rx: i2s0m0-sclk-rx {
 			rockchip,pins =
 				<3 RK_PD1 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s0m0_sclk_tx: i2s0m0-sclk-tx {
 			rockchip,pins =
 				<3 RK_PD0 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s0m0_sdi0: i2s0m0-sdi0 {
 			rockchip,pins =
 				<3 RK_PD6 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s0m0_sdo0: i2s0m0-sdo0 {
 			rockchip,pins =
 				<3 RK_PD5 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s0m0_sdo1_sdi3: i2s0m0-sdo1-sdi3 {
 			rockchip,pins =
 				<3 RK_PD7 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s0m0_sdo2_sdi2: i2s0m0-sdo2-sdi2 {
 			rockchip,pins =
 				<4 RK_PA0 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s0m0_sdo3_sdi1: i2s0m0-sdo3-sdi1 {
 			rockchip,pins =
 				<4 RK_PA1 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s0m1_lrck_rx: i2s0m1-lrck-rx {
 			rockchip,pins =
 				<3 RK_PB2 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s0m1_lrck_tx: i2s0m1-lrck-tx {
 			rockchip,pins =
 				<3 RK_PA5 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s0m1_mclk: i2s0m1-mclk {
 			rockchip,pins =
 				<3 RK_PB0 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s0m1_sclk_rx: i2s0m1-sclk-rx {
 			rockchip,pins =
 				<3 RK_PB1 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s0m1_sclk_tx: i2s0m1-sclk-tx {
 			rockchip,pins =
 				<3 RK_PA4 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s0m1_sdi0: i2s0m1-sdi0 {
 			rockchip,pins =
 				<3 RK_PA7 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s0m1_sdo0: i2s0m1-sdo0 {
 			rockchip,pins =
 				<3 RK_PA6 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s0m1_sdo1_sdi3: i2s0m1-sdo1-sdi3 {
 			rockchip,pins =
 				<3 RK_PB3 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s0m1_sdo2_sdi2: i2s0m1-sdo2-sdi2 {
 			rockchip,pins =
 				<3 RK_PB4 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s0m1_sdo3_sdi1: i2s0m1-sdo3-sdi1 {
 			rockchip,pins =
 				<3 RK_PB5 3 &pcfg_pull_none>;
 		};
 	};
 	i2s1 {
+		/omit-if-no-ref/
 		i2s1m0_lrck: i2s1m0-lrck {
 			rockchip,pins =
 				<1 RK_PA0 4 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s1m0_mclk: i2s1m0-mclk {
 			rockchip,pins =
 				<0 RK_PD4 4 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s1m0_sclk: i2s1m0-sclk {
 			rockchip,pins =
 				<1 RK_PA1 4 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s1m0_sdi: i2s1m0-sdi {
 			rockchip,pins =
 				<1 RK_PA2 4 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s1m0_sdo: i2s1m0-sdo {
 			rockchip,pins =
 				<0 RK_PD6 4 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s1m1_lrck: i2s1m1-lrck {
 			rockchip,pins =
 				<1 RK_PD7 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s1m1_mclk: i2s1m1-mclk {
 			rockchip,pins =
 				<1 RK_PD5 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s1m1_sclk: i2s1m1-sclk {
 			rockchip,pins =
 				<1 RK_PD6 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s1m1_sdi: i2s1m1-sdi {
 			rockchip,pins =
 				<2 RK_PA0 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s1m1_sdo: i2s1m1-sdo {
 			rockchip,pins =
 				<2 RK_PA1 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s1m2_lrck: i2s1m2-lrck {
 			rockchip,pins =
 				<2 RK_PD2 6 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s1m2_mclk: i2s1m2-mclk {
 			rockchip,pins =
 				<2 RK_PC7 6 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s1m2_sclk: i2s1m2-sclk {
 			rockchip,pins =
 				<2 RK_PD1 6 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s1m2_sdi: i2s1m2-sdi {
 			rockchip,pins =
 				<2 RK_PD3 6 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s1m2_sdo: i2s1m2-sdo {
 			rockchip,pins =
 				<2 RK_PD0 6 &pcfg_pull_none>;
 		};
 	};
 	i2s2 {
+		/omit-if-no-ref/
 		i2s2m0_lrck: i2s2m0-lrck {
 			rockchip,pins =
 				<1 RK_PC7 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s2m0_mclk: i2s2m0-mclk {
 			rockchip,pins =
 				<1 RK_PD0 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s2m0_sclk: i2s2m0-sclk {
 			rockchip,pins =
 				<1 RK_PC6 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s2m0_sdi: i2s2m0-sdi {
 			rockchip,pins =
 				<1 RK_PC5 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s2m0_sdo: i2s2m0-sdo {
 			rockchip,pins =
 				<1 RK_PC4 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s2m1_lrck: i2s2m1-lrck {
 			rockchip,pins =
 				<2 RK_PB2 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s2m1_mclk: i2s2m1-mclk {
 			rockchip,pins =
 				<2 RK_PB3 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s2m1_sclk: i2s2m1-sclk {
 			rockchip,pins =
 				<2 RK_PB1 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s2m1_sdi: i2s2m1-sdi {
 			rockchip,pins =
 				<2 RK_PB0 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s2m1_sdo: i2s2m1-sdo {
 			rockchip,pins =
 				<2 RK_PA7 2 &pcfg_pull_none>;
 		};
 	};
 	lcdc {
+		/omit-if-no-ref/
 		lcdc_ctl: lcdc-ctl {
 			rockchip,pins =
 				/* lcdc_clk */
@@ -628,6 +705,7 @@
 		};
 	};
 	mcu {
+		/omit-if-no-ref/
 		mcu_pins: mcu-pins {
 			rockchip,pins =
 				/* mcu_jtag_tck */
@@ -643,69 +721,84 @@
 		};
 	};
 	mipi {
+		/omit-if-no-ref/
 		mipim1_pins: mipim1-pins {
 			rockchip,pins =
 				/* mipi_csi_clk1_m1 */
 				<2 RK_PA2 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		mipi_csi_clk0: mipi-csi-clk0 {
 			rockchip,pins =
 				<2 RK_PA3 1 &pcfg_pull_none>;
 		};
 	};
 	pdm {
+		/omit-if-no-ref/
 		pdmm0_clk: pdmm0-clk {
 			rockchip,pins =
 				/* pdm_clk0_m0 */
 				<3 RK_PD4 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		pdmm0_clk1: pdmm0-clk1 {
 			rockchip,pins =
 				<3 RK_PD1 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		pdmm0_sdi0: pdmm0-sdi0 {
 			rockchip,pins =
 				<3 RK_PD6 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		pdmm0_sdi1: pdmm0-sdi1 {
 			rockchip,pins =
 				<4 RK_PA1 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		pdmm0_sdi2: pdmm0-sdi2 {
 			rockchip,pins =
 				<4 RK_PA0 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		pdmm0_sdi3: pdmm0-sdi3 {
 			rockchip,pins =
 				<3 RK_PD7 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		pdmm1_clk: pdmm1-clk {
 			rockchip,pins =
 				/* pdm_clk0_m1 */
 				<3 RK_PC0 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		pdmm1_clk1: pdmm1-clk1 {
 			rockchip,pins =
 				<3 RK_PC3 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		pdmm1_sdi0: pdmm1-sdi0 {
 			rockchip,pins =
 				<3 RK_PC1 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		pdmm1_sdi1: pdmm1-sdi1 {
 			rockchip,pins =
 				<3 RK_PC2 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		pdmm1_sdi2: pdmm1-sdi2 {
 			rockchip,pins =
 				<3 RK_PB6 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		pdmm1_sdi3: pdmm1-sdi3 {
 			rockchip,pins =
 				<3 RK_PB7 3 &pcfg_pull_none>;
 		};
 	};
 	pmic {
+		/omit-if-no-ref/
 		pmic_pins: pmic-pins {
 			rockchip,pins =
 				/* pmic_int */
@@ -715,6 +808,7 @@
 		};
 	};
 	pmu {
+		/omit-if-no-ref/
 		pmu_pins: pmu-pins {
 			rockchip,pins =
 				/* pmu_debug */
@@ -722,6 +816,7 @@
 		};
 	};
 	prelight {
+		/omit-if-no-ref/
 		prelight_pins: prelight-pins {
 			rockchip,pins =
 				/* prelight_trig_out */
@@ -729,158 +824,323 @@
 		};
 	};
 	pwm0 {
+		/omit-if-no-ref/
 		pwm0m0_pins: pwm0m0-pins {
 			rockchip,pins =
 				/* pwm0_m0 */
 				<0 RK_PB6 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
+		pwm0m0_pins_pull_down: pwm0m0-pins-pull-down {
+			rockchip,pins =
+				/* pwm0_m0 */
+				<0 RK_PB6 3 &pcfg_pull_down>;
+		};
+		/omit-if-no-ref/
 		pwm0m1_pins: pwm0m1-pins {
 			rockchip,pins =
 				/* pwm0_m1 */
 				<2 RK_PB3 5 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
+		pwm0m1_pins_pull_down: pwm0m1-pins-pull-down {
+			rockchip,pins =
+				/* pwm0_m1 */
+				<2 RK_PB3 5 &pcfg_pull_down>;
+		};
 	};
 	pwm1 {
+		/omit-if-no-ref/
 		pwm1m0_pins: pwm1m0-pins {
 			rockchip,pins =
 				/* pwm1_m0 */
 				<0 RK_PB7 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
+		pwm1m0_pins_pull_down: pwm1m0-pins-pull-down {
+			rockchip,pins =
+				/* pwm1_m0 */
+				<0 RK_PB7 3 &pcfg_pull_down>;
+		};
+		/omit-if-no-ref/
 		pwm1m1_pins: pwm1m1-pins {
 			rockchip,pins =
 				/* pwm1_m1 */
 				<2 RK_PB2 5 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
+		pwm1m1_pins_pull_down: pwm1m1-pins-pull-down {
+			rockchip,pins =
+				/* pwm1_m1 */
+				<2 RK_PB2 5 &pcfg_pull_down>;
+		};
 	};
 	pwm10 {
+		/omit-if-no-ref/
 		pwm10m0_pins: pwm10m0-pins {
 			rockchip,pins =
 				/* pwm10_m0 */
 				<3 RK_PA6 6 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
+		pwm10m0_pins_pull_down: pwm10m0-pins-pull-down {
+			rockchip,pins =
+				/* pwm10_m0 */
+				<3 RK_PA6 6 &pcfg_pull_down>;
+		};
+		/omit-if-no-ref/
 		pwm10m1_pins: pwm10m1-pins {
 			rockchip,pins =
 				/* pwm10_m1 */
 				<2 RK_PD5 5 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
+		pwm10m1_pins_pull_down: pwm10m1-pins-pull-down {
+			rockchip,pins =
+				/* pwm10_m1 */
+				<2 RK_PD5 5 &pcfg_pull_down>;
+		};
 	};
 	pwm11 {
+		/omit-if-no-ref/
 		pwm11m0_pins: pwm11m0-pins {
 			rockchip,pins =
 				/* pwm11_ir_m0 */
 				<3 RK_PA7 6 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
+		pwm11m0_pins_pull_down: pwm11m0-pins-pull-down {
+			rockchip,pins =
+				/* pwm11_ir_m0 */
+				<3 RK_PA7 6 &pcfg_pull_down>;
+		};
+		/omit-if-no-ref/
 		pwm11m1_pins: pwm11m1-pins {
 			rockchip,pins =
 				/* pwm11_ir_m1 */
 				<2 RK_PD4 5 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
+		pwm11m1_pins_pull_down: pwm11m1-pins-pull-down {
+			rockchip,pins =
+				/* pwm11_ir_m1 */
+				<2 RK_PD4 5 &pcfg_pull_down>;
+		};
 	};
 	pwm2 {
+		/omit-if-no-ref/
 		pwm2m0_pins: pwm2m0-pins {
 			rockchip,pins =
 				/* pwm2_m0 */
 				<0 RK_PC0 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
+		pwm2m0_pins_pull_down: pwm2m0-pins-pull-down {
+			rockchip,pins =
+				/* pwm2_m0 */
+				<0 RK_PC0 3 &pcfg_pull_down>;
+		};
+		/omit-if-no-ref/
 		pwm2m1_pins: pwm2m1-pins {
 			rockchip,pins =
 				/* pwm2_m1 */
 				<2 RK_PB1 5 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
+		pwm2m1_pins_pull_down: pwm2m1-pins-pull-down {
+			rockchip,pins =
+				/* pwm2_m1 */
+				<2 RK_PB1 5 &pcfg_pull_down>;
+		};
 	};
 	pwm3 {
+		/omit-if-no-ref/
 		pwm3m0_pins: pwm3m0-pins {
 			rockchip,pins =
 				/* pwm3_ir_m0 */
 				<0 RK_PC1 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
+		pwm3m0_pins_pull_down: pwm3m0-pins-pull-down {
+			rockchip,pins =
+				/* pwm3_ir_m0 */
+				<0 RK_PC1 3 &pcfg_pull_down>;
+		};
+		/omit-if-no-ref/
 		pwm3m1_pins: pwm3m1-pins {
 			rockchip,pins =
 				/* pwm3_ir_m1 */
 				<2 RK_PB0 5 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
+		pwm3m1_pins_pull_down: pwm3m1-pins-pull-down {
+			rockchip,pins =
+				/* pwm3_ir_m1 */
+				<2 RK_PB0 5 &pcfg_pull_down>;
+		};
 	};
 	pwm4 {
+		/omit-if-no-ref/
 		pwm4m0_pins: pwm4m0-pins {
 			rockchip,pins =
 				/* pwm4_m0 */
 				<0 RK_PC2 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
+		pwm4m0_pins_pull_down: pwm4m0-pins-pull-down {
+			rockchip,pins =
+				/* pwm4_m0 */
+				<0 RK_PC2 3 &pcfg_pull_down>;
+		};
+		/omit-if-no-ref/
 		pwm4m1_pins: pwm4m1-pins {
 			rockchip,pins =
 				/* pwm4_m1 */
 				<2 RK_PA7 5 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
+		pwm4m1_pins_pull_down: pwm4m1-pins-pull-down {
+			rockchip,pins =
+				/* pwm4_m1 */
+				<2 RK_PA7 5 &pcfg_pull_down>;
+		};
 	};
 	pwm5 {
+		/omit-if-no-ref/
 		pwm5m0_pins: pwm5m0-pins {
 			rockchip,pins =
 				/* pwm5_m0 */
 				<0 RK_PC3 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
+		pwm5m0_pins_pull_down: pwm5m0-pins-pull-down {
+			rockchip,pins =
+				/* pwm5_m0 */
+				<0 RK_PC3 3 &pcfg_pull_down>;
+		};
+		/omit-if-no-ref/
 		pwm5m1_pins: pwm5m1-pins {
 			rockchip,pins =
 				/* pwm5_m1 */
 				<2 RK_PA6 5 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
+		pwm5m1_pins_pull_down: pwm5m1-pins-pull-down {
+			rockchip,pins =
+				/* pwm5_m1 */
+				<2 RK_PA6 5 &pcfg_pull_down>;
+		};
 	};
 	pwm6 {
+		/omit-if-no-ref/
 		pwm6m0_pins: pwm6m0-pins {
 			rockchip,pins =
 				/* pwm6_m0 */
 				<0 RK_PB2 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
+		pwm6m0_pins_pull_down: pwm6m0-pins-pull-down {
+			rockchip,pins =
+				/* pwm6_m0 */
+				<0 RK_PB2 3 &pcfg_pull_down>;
+		};
+		/omit-if-no-ref/
 		pwm6m1_pins: pwm6m1-pins {
 			rockchip,pins =
 				/* pwm6_m1 */
 				<3 RK_PA1 5 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
+		pwm6m1_pins_pull_up: pwm6m1-pins-pull-up {
+			rockchip,pins =
+				/* pwm6_m1 */
+				<3 RK_PA1 5 &pcfg_pull_up>;
+		};
 	};
 	pwm7 {
+		/omit-if-no-ref/
 		pwm7m0_pins: pwm7m0-pins {
 			rockchip,pins =
 				/* pwm7_ir_m0 */
 				<0 RK_PB1 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
+		pwm7m0_pins_pull_down: pwm7m0-pins-pull-down {
+			rockchip,pins =
+				/* pwm7_ir_m0 */
+				<0 RK_PB1 3 &pcfg_pull_down>;
+		};
+		/omit-if-no-ref/
 		pwm7m1_pins: pwm7m1-pins {
 			rockchip,pins =
 				/* pwm7_ir_m1 */
 				<3 RK_PA0 5 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
+		pwm7m1_pins_pull_up: pwm7m1-pins-pull-up {
+			rockchip,pins =
+				/* pwm7_ir_m1 */
+				<3 RK_PA0 5 &pcfg_pull_up>;
+		};
 	};
 	pwm8 {
+		/omit-if-no-ref/
 		pwm8m0_pins: pwm8m0-pins {
 			rockchip,pins =
 				/* pwm8_m0 */
 				<3 RK_PA4 6 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
+		pwm8m0_pins_pull_down: pwm8m0-pins-pull-down {
+			rockchip,pins =
+				/* pwm8_m0 */
+				<3 RK_PA4 6 &pcfg_pull_down>;
+		};
+		/omit-if-no-ref/
 		pwm8m1_pins: pwm8m1-pins {
 			rockchip,pins =
 				/* pwm8_m1 */
 				<2 RK_PD7 5 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
+		pwm8m1_pins_pull_down: pwm8m1-pins-pull-down {
+			rockchip,pins =
+				/* pwm8_m1 */
+				<2 RK_PD7 5 &pcfg_pull_down>;
+		};
 	};
 	pwm9 {
+		/omit-if-no-ref/
 		pwm9m0_pins: pwm9m0-pins {
 			rockchip,pins =
 				/* pwm9_m0 */
 				<3 RK_PA5 6 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
+		pwm9m0_pins_pull_down: pwm9m0-pins-pull-down {
+			rockchip,pins =
+				/* pwm9_m0 */
+				<3 RK_PA5 6 &pcfg_pull_down>;
+		};
+		/omit-if-no-ref/
 		pwm9m1_pins: pwm9m1-pins {
 			rockchip,pins =
 				/* pwm9_m1 */
 				<2 RK_PD6 5 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
+		pwm9m1_pins_pull_down: pwm9m1-pins-pull-down {
+			rockchip,pins =
+				/* pwm9_m1 */
+				<2 RK_PD6 5 &pcfg_pull_down>;
+		};
 	};
 	rgmii {
+		/omit-if-no-ref/
 		rgmiim0_pins: rgmiim0-pins {
 			rockchip,pins =
 				/* rgmii_clk_m0 */
 				<3 RK_PC0 2 &pcfg_pull_none>,
-				/* rgmii_col_m0 */
-				<3 RK_PA6 2 &pcfg_pull_none>,
-				/* rgmii_crs_m0 */
-				<3 RK_PA5 2 &pcfg_pull_none>,
 				/* rgmii_mdc_m0 */
 				<3 RK_PC4 2 &pcfg_pull_none>,
 				/* rgmii_mdio_m0 */
@@ -897,29 +1157,24 @@
 				<3 RK_PB0 2 &pcfg_pull_none>,
 				/* rgmii_rxdv_m0 */
 				<3 RK_PC1 2 &pcfg_pull_none>,
-				/* rgmii_rxer_m0 */
-				<3 RK_PC2 2 &pcfg_pull_none>,
 				/* rgmii_txclk_m0 */
-				<3 RK_PC6 2 &pcfg_pull_none>,
+				<3 RK_PC6 2 &pcfg_pull_none_drv_level_12>,
 				/* rgmii_txd0_m0 */
-				<3 RK_PB3 2 &pcfg_pull_none>,
+				<3 RK_PB3 2 &pcfg_pull_none_drv_level_12>,
 				/* rgmii_txd1_m0 */
-				<3 RK_PB4 2 &pcfg_pull_none>,
+				<3 RK_PB4 2 &pcfg_pull_none_drv_level_12>,
 				/* rgmii_txd2_m0 */
-				<3 RK_PB1 2 &pcfg_pull_none>,
+				<3 RK_PB1 2 &pcfg_pull_none_drv_level_12>,
 				/* rgmii_txd3_m0 */
-				<3 RK_PB2 2 &pcfg_pull_none>,
+				<3 RK_PB2 2 &pcfg_pull_none_drv_level_12>,
 				/* rgmii_txen_m0 */
-				<3 RK_PB5 2 &pcfg_pull_none>;
+				<3 RK_PB5 2 &pcfg_pull_none_drv_level_12>;
 		};
+		/omit-if-no-ref/
 		rgmiim1_pins: rgmiim1-pins {
 			rockchip,pins =
 				/* rgmii_clk_m1 */
 				<2 RK_PB7 2 &pcfg_pull_none>,
-				/* rgmii_col_m1 */
-				<2 RK_PA6 2 &pcfg_pull_none>,
-				/* rgmii_crs_m1 */
-				<2 RK_PA5 2 &pcfg_pull_none>,
 				/* rgmii_mdc_m1 */
 				<2 RK_PC2 2 &pcfg_pull_none>,
 				/* rgmii_mdio_m1 */
@@ -936,23 +1191,86 @@
 				<2 RK_PD0 2 &pcfg_pull_none>,
 				/* rgmii_rxdv_m1 */
 				<2 RK_PB4 2 &pcfg_pull_none>,
-				/* rgmii_rxer_m1 */
-				<2 RK_PC0 2 &pcfg_pull_none>,
 				/* rgmii_txclk_m1 */
-				<2 RK_PD2 2 &pcfg_pull_none>,
+				<2 RK_PD2 2 &pcfg_pull_none_drv_level_12>,
 				/* rgmii_txd0_m1 */
-				<2 RK_PC3 2 &pcfg_pull_none>,
+				<2 RK_PC3 2 &pcfg_pull_none_drv_level_12>,
 				/* rgmii_txd1_m1 */
-				<2 RK_PC4 2 &pcfg_pull_none>,
+				<2 RK_PC4 2 &pcfg_pull_none_drv_level_12>,
 				/* rgmii_txd2_m1 */
-				<2 RK_PD1 2 &pcfg_pull_none>,
+				<2 RK_PD1 2 &pcfg_pull_none_drv_level_12>,
 				/* rgmii_txd3_m1 */
-				<2 RK_PA4 2 &pcfg_pull_none>,
+				<2 RK_PA4 2 &pcfg_pull_none_drv_level_12>,
 				/* rgmii_txen_m1 */
-				<2 RK_PC6 2 &pcfg_pull_none>;
+				<2 RK_PC6 2 &pcfg_pull_none_drv_level_12>;
+		};
+	};
+	rmii {
+		/omit-if-no-ref/
+		rmiim0_pins: rmiim0-pins {
+			rockchip,pins =
+				/* rmii_clk_m0 */
+				<3 RK_PC0 2 &pcfg_pull_none>,
+				/* rmii_mdc_m0 */
+				<3 RK_PC4 2 &pcfg_pull_none>,
+				/* rmii_mdio_m0 */
+				<3 RK_PC3 2 &pcfg_pull_none>,
+				/* rmii_rxd0_m0 */
+				<3 RK_PB6 2 &pcfg_pull_none>,
+				/* rmii_rxd1_m0 */
+				<3 RK_PB7 2 &pcfg_pull_none>,
+				/* rmii_rxdv_m0 */
+				<3 RK_PC1 2 &pcfg_pull_none>,
+				/* rmii_rxer_m0 */
+				<3 RK_PC2 2 &pcfg_pull_none>,
+				/* rmii_txd0_m0 */
+				<3 RK_PB3 2 &pcfg_pull_none_drv_level_12>,
+				/* rmii_txd1_m0 */
+				<3 RK_PB4 2 &pcfg_pull_none_drv_level_12>,
+				/* rmii_txen_m0 */
+				<3 RK_PB5 2 &pcfg_pull_none_drv_level_12>;
+		};
+		/omit-if-no-ref/
+		rmiim1_pins: rmiim1-pins {
+			rockchip,pins =
+				/* rmii_clk_m1 */
+				<2 RK_PB7 2 &pcfg_pull_none>,
+				/* rmii_mdc_m1 */
+				<2 RK_PC2 2 &pcfg_pull_none>,
+				/* rmii_mdio_m1 */
+				<2 RK_PC1 2 &pcfg_pull_none>,
+				/* rmii_rxd0_m1 */
+				<2 RK_PB5 2 &pcfg_pull_none>,
+				/* rmii_rxd1_m1 */
+				<2 RK_PB6 2 &pcfg_pull_none>,
+				/* rmii_rxdv_m1 */
+				<2 RK_PB4 2 &pcfg_pull_none>,
+				/* rmii_rxer_m1 */
+				<2 RK_PC0 2 &pcfg_pull_none>,
+				/* rmii_txd0_m1 */
+				<2 RK_PC3 2 &pcfg_pull_none_drv_level_12>,
+				/* rmii_txd1_m1 */
+				<2 RK_PC4 2 &pcfg_pull_none_drv_level_12>,
+				/* rmii_txen_m1 */
+				<2 RK_PC6 2 &pcfg_pull_none_drv_level_12>;
+		};
+	};
+	clk_out_ethernet {
+		/omit-if-no-ref/
+		clk_out_ethernetm0_pins: clk-out-ethernetm0-pins {
+			rockchip,pins =
+				/* clk_out_ethernet_m0 */
+				<3 RK_PC5 2 &pcfg_pull_none>;
+		};
+		/omit-if-no-ref/
+		clk_out_ethernetm1_pins: clk-out-ethernetm1-pins {
+			rockchip,pins =
+				/* clk_out_ethernet_m1 */
+				<2 RK_PC5 2 &pcfg_pull_none>;
 		};
 	};
 	sdmmc0 {
+		/omit-if-no-ref/
 		sdmmc0_bus4: sdmmc0-bus4 {
 			rockchip,pins =
 				/* sdmmc0_d0 */
@@ -964,26 +1282,31 @@
 				/* sdmmc0_d3 */
 				<1 RK_PA7 1 &pcfg_pull_up_drv_level_2>;
 		};
+		/omit-if-no-ref/
 		sdmmc0_clk: sdmmc0-clk {
 			rockchip,pins =
 				/* sdmmc0_clk */
 				<1 RK_PB0 1 &pcfg_pull_up_drv_level_2>;
 		};
+		/omit-if-no-ref/
 		sdmmc0_cmd: sdmmc0-cmd {
 			rockchip,pins =
 				/* sdmmc0_cmd */
 				<1 RK_PB1 1 &pcfg_pull_up_drv_level_2>;
 		};
+		/omit-if-no-ref/
 		sdmmc0_det: sdmmc0-det {
 			rockchip,pins =
 				<0 RK_PA3 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		sdmmc0_pwr: sdmmc0-pwr {
 			rockchip,pins =
 				<0 RK_PC0 1 &pcfg_pull_none>;
 		};
 	};
 	sdmmc1 {
+		/omit-if-no-ref/
 		sdmmc1_bus4: sdmmc1-bus4 {
 			rockchip,pins =
 				/* sdmmc1_d0 */
@@ -995,166 +1318,234 @@
 				/* sdmmc1_d3 */
 				<1 RK_PB7 1 &pcfg_pull_up_drv_level_2>;
 		};
+		/omit-if-no-ref/
 		sdmmc1_clk: sdmmc1-clk {
 			rockchip,pins =
 				/* sdmmc1_clk */
 				<1 RK_PB2 1 &pcfg_pull_up_drv_level_2>;
 		};
+		/omit-if-no-ref/
 		sdmmc1_cmd: sdmmc1-cmd {
 			rockchip,pins =
 				/* sdmmc1_cmd */
 				<1 RK_PB3 1 &pcfg_pull_up_drv_level_2>;
 		};
+		/omit-if-no-ref/
 		sdmmc1_det: sdmmc1-det {
 			rockchip,pins =
 				<1 RK_PD0 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		sdmmc1_pwr: sdmmc1-pwr {
 			rockchip,pins =
 				<1 RK_PD1 2 &pcfg_pull_none>;
 		};
 	};
 	spi0 {
+		/omit-if-no-ref/
 		spi0m0_clk: spi0m0-clk {
 			rockchip,pins =
 				<0 RK_PB0 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi0m0_cs0n: spi0m0-cs0n {
 			rockchip,pins =
 				<0 RK_PA5 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi0m0_cs1n: spi0m0-cs1n {
 			rockchip,pins =
 				<0 RK_PA4 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi0m0_miso: spi0m0-miso {
 			rockchip,pins =
 				<0 RK_PA7 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi0m0_mosi: spi0m0-mosi {
 			rockchip,pins =
 				<0 RK_PA6 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
+		spi0m0_clk_hs: spi0m0-clk_hs {
+			rockchip,pins =
+				<0 RK_PB0 1 &pcfg_pull_up_drv_level_2>;
+		};
+		/omit-if-no-ref/
+		spi0m0_miso_hs: spi0m0-miso_hs {
+			rockchip,pins =
+				<0 RK_PA7 1 &pcfg_pull_up_drv_level_2>;
+		};
+		/omit-if-no-ref/
+		spi0m0_mosi_hs: spi0m0-mosi_hs {
+			rockchip,pins =
+				<0 RK_PA6 1 &pcfg_pull_up_drv_level_2>;
+		};
+		/omit-if-no-ref/
 		spi0m1_clk: spi0m1-clk {
 			rockchip,pins =
 				<2 RK_PA1 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi0m1_cs0n: spi0m1-cs0n {
 			rockchip,pins =
 				<2 RK_PA0 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi0m1_cs1n: spi0m1-cs1n {
 			rockchip,pins =
 				<1 RK_PD5 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi0m1_miso: spi0m1-miso {
 			rockchip,pins =
 				<1 RK_PD7 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi0m1_mosi: spi0m1-mosi {
 			rockchip,pins =
 				<1 RK_PD6 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi0m2_clk: spi0m2-clk {
 			rockchip,pins =
 				<2 RK_PB2 6 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi0m2_cs0n: spi0m2-cs0n {
 			rockchip,pins =
 				<2 RK_PA7 6 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi0m2_cs1n: spi0m2-cs1n {
 			rockchip,pins =
 				<2 RK_PB3 6 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi0m2_miso: spi0m2-miso {
 			rockchip,pins =
 				<2 RK_PB1 6 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi0m2_mosi: spi0m2-mosi {
 			rockchip,pins =
 				<2 RK_PB0 6 &pcfg_pull_none>;
 		};
 	};
 	spi1 {
+		/omit-if-no-ref/
 		spi1m0_clk: spi1m0-clk {
 			rockchip,pins =
 				<3 RK_PC0 5 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi1m0_cs0n: spi1m0-cs0n {
 			rockchip,pins =
 				<3 RK_PB5 5 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi1m0_cs1n: spi1m0-cs1n {
 			rockchip,pins =
 				<3 RK_PB4 5 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi1m0_miso: spi1m0-miso {
 			rockchip,pins =
 				<3 RK_PB7 5 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi1m0_mosi: spi1m0-mosi {
 			rockchip,pins =
 				<3 RK_PB6 5 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
+		spi1m0_clk_hs: spi1m0-clk_hs {
+			rockchip,pins =
+				<3 RK_PC0 5 &pcfg_pull_up_drv_level_2>;
+		};
+		/omit-if-no-ref/
+		spi1m0_miso_hs: spi1m0-miso_hs {
+			rockchip,pins =
+				<3 RK_PB7 5 &pcfg_pull_up_drv_level_2>;
+		};
+		/omit-if-no-ref/
+		spi1m0_mosi_hs: spi1m0-mosi_hs {
+			rockchip,pins =
+				<3 RK_PB6 5 &pcfg_pull_up_drv_level_2>;
+		};
+		/omit-if-no-ref/
 		spi1m1_clk: spi1m1-clk {
 			rockchip,pins =
 				<1 RK_PC6 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi1m1_cs0n: spi1m1-cs0n {
 			rockchip,pins =
 				<1 RK_PC7 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi1m1_cs1n: spi1m1-cs1n {
 			rockchip,pins =
 				<1 RK_PD0 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi1m1_miso: spi1m1-miso {
 			rockchip,pins =
 				<1 RK_PC5 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi1m1_mosi: spi1m1-mosi {
 			rockchip,pins =
 				<1 RK_PC4 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi1m2_clk: spi1m2-clk {
 			rockchip,pins =
 				<2 RK_PD5 6 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi1m2_cs0n: spi1m2-cs0n {
 			rockchip,pins =
 				<2 RK_PD4 6 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi1m2_cs1n: spi1m2-cs1n {
 			rockchip,pins =
 				<3 RK_PA0 6 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi1m2_miso: spi1m2-miso {
 			rockchip,pins =
 				<2 RK_PD7 6 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi1m2_mosi: spi1m2-mosi {
 			rockchip,pins =
 				<2 RK_PD6 6 &pcfg_pull_none>;
 		};
 	};
 	tsadc {
+		/omit-if-no-ref/
 		tsadcm0_pins: tsadcm0-pins {
 			rockchip,pins =
 				/* tsadc_shut_m0 */
 				<0 RK_PA1 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		tsadcm1_pins: tsadcm1-pins {
 			rockchip,pins =
 				/* tsadc_shut_m1 */
 				<0 RK_PB2 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		tsadc_shutorg: tsadc-shutorg {
 			rockchip,pins =
 				<0 RK_PA1 2 &pcfg_pull_none>;
 		};
 	};
 	uart0 {
+		/omit-if-no-ref/
 		uart0_xfer: uart0-xfer {
 			rockchip,pins =
 				/* uart0_rx */
@@ -1162,16 +1553,19 @@
 				/* uart0_tx */
 				<1 RK_PC3 1 &pcfg_pull_up>;
 		};
+		/omit-if-no-ref/
 		uart0_ctsn: uart0-ctsn {
 			rockchip,pins =
 				<1 RK_PC1 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		uart0_rtsn: uart0-rtsn {
 			rockchip,pins =
 				<1 RK_PC0 1 &pcfg_pull_none>;
 		};
 	};
 	uart1 {
+		/omit-if-no-ref/
 		uart1m0_xfer: uart1m0-xfer {
 			rockchip,pins =
 				/* uart1_rx_m0 */
@@ -1179,14 +1573,17 @@
 				/* uart1_tx_m0 */
 				<0 RK_PB6 2 &pcfg_pull_up>;
 		};
+		/omit-if-no-ref/
 		uart1m0_ctsn: uart1m0-ctsn {
 			rockchip,pins =
 				<0 RK_PC1 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		uart1m0_rtsn: uart1m0-rtsn {
 			rockchip,pins =
 				<0 RK_PC0 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		uart1m1_xfer: uart1m1-xfer {
 			rockchip,pins =
 				/* uart1_rx_m1 */
@@ -1194,16 +1591,19 @@
 				/* uart1_tx_m1 */
 				<1 RK_PD0 5 &pcfg_pull_up>;
 		};
+		/omit-if-no-ref/
 		uart1m1_ctsn: uart1m1-ctsn {
 			rockchip,pins =
 				<1 RK_PC7 5 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		uart1m1_rtsn: uart1m1-rtsn {
 			rockchip,pins =
 				<1 RK_PC6 5 &pcfg_pull_none>;
 		};
 	};
 	uart2 {
+		/omit-if-no-ref/
 		uart2m0_xfer: uart2m0-xfer {
 			rockchip,pins =
 				/* uart2_rx_m0 */
@@ -1211,6 +1611,7 @@
 				/* uart2_tx_m0 */
 				<1 RK_PA5 3 &pcfg_pull_up>;
 		};
+		/omit-if-no-ref/
 		uart2m1_xfer: uart2m1-xfer {
 			rockchip,pins =
 				/* uart2_rx_m1 */
@@ -1220,6 +1621,7 @@
 		};
 	};
 	uart3 {
+		/omit-if-no-ref/
 		uart3m0_xfer: uart3m0-xfer {
 			rockchip,pins =
 				/* uart3_rx_m0 */
@@ -1227,14 +1629,17 @@
 				/* uart3_tx_m0 */
 				<3 RK_PC6 4 &pcfg_pull_up>;
 		};
+		/omit-if-no-ref/
 		uart3m0_ctsn: uart3m0-ctsn {
 			rockchip,pins =
 				<3 RK_PC5 4 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		uart3m0_rtsn: uart3m0-rtsn {
 			rockchip,pins =
 				<3 RK_PC4 4 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		uart3m1_xfer: uart3m1-xfer {
 			rockchip,pins =
 				/* uart3_rx_m1 */
@@ -1242,6 +1647,7 @@
 				/* uart3_tx_m1 */
 				<1 RK_PA7 2 &pcfg_pull_up>;
 		};
+		/omit-if-no-ref/
 		uart3m2_xfer: uart3m2-xfer {
 			rockchip,pins =
 				/* uart3_rx_m2 */
@@ -1249,24 +1655,29 @@
 				/* uart3_tx_m2 */
 				<3 RK_PA0 4 &pcfg_pull_up>;
 		};
+		/omit-if-no-ref/
 		uart3m2_ctsn: uart3m2-ctsn {
 			rockchip,pins =
 				<2 RK_PD7 4 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		uart3m2_rtsn: uart3m2-rtsn {
 			rockchip,pins =
 				<2 RK_PD6 4 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		uart3_ctsn: uart3-ctsn {
 			rockchip,pins =
 				<1 RK_PB1 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		uart3_rtsn: uart3-rtsn {
 			rockchip,pins =
 				<1 RK_PB0 2 &pcfg_pull_none>;
 		};
 	};
 	uart4 {
+		/omit-if-no-ref/
 		uart4m0_xfer: uart4m0-xfer {
 			rockchip,pins =
 				/* uart4_rx_m0 */
@@ -1274,14 +1685,17 @@
 				/* uart4_tx_m0 */
 				<3 RK_PA4 4 &pcfg_pull_up>;
 		};
+		/omit-if-no-ref/
 		uart4m0_ctsn: uart4m0-ctsn {
 			rockchip,pins =
 				<3 RK_PB3 4 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		uart4m0_rtsn: uart4m0-rtsn {
 			rockchip,pins =
 				<3 RK_PB2 4 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		uart4m1_xfer: uart4m1-xfer {
 			rockchip,pins =
 				/* uart4_rx_m1 */
@@ -1289,14 +1703,17 @@
 				/* uart4_tx_m1 */
 				<2 RK_PA6 4 &pcfg_pull_up>;
 		};
+		/omit-if-no-ref/
 		uart4m1_ctsn: uart4m1-ctsn {
 			rockchip,pins =
 				<2 RK_PA5 4 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		uart4m1_rtsn: uart4m1-rtsn {
 			rockchip,pins =
 				<2 RK_PA4 4 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		uart4m2_xfer: uart4m2-xfer {
 			rockchip,pins =
 				/* uart4_rx_m2 */
@@ -1304,16 +1721,19 @@
 				/* uart4_tx_m2 */
 				<1 RK_PD5 3 &pcfg_pull_up>;
 		};
+		/omit-if-no-ref/
 		uart4m2_ctsn: uart4m2-ctsn {
 			rockchip,pins =
 				<1 RK_PD3 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		uart4m2_rtsn: uart4m2-rtsn {
 			rockchip,pins =
 				<1 RK_PD2 3 &pcfg_pull_none>;
 		};
 	};
 	uart5 {
+		/omit-if-no-ref/
 		uart5m0_xfer: uart5m0-xfer {
 			rockchip,pins =
 				/* uart5_rx_m0 */
@@ -1321,14 +1741,17 @@
 				/* uart5_tx_m0 */
 				<3 RK_PA6 4 &pcfg_pull_up>;
 		};
+		/omit-if-no-ref/
 		uart5m0_ctsn: uart5m0-ctsn {
 			rockchip,pins =
 				<3 RK_PB1 4 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		uart5m0_rtsn: uart5m0-rtsn {
 			rockchip,pins =
 				<3 RK_PB0 4 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		uart5m1_xfer: uart5m1-xfer {
 			rockchip,pins =
 				/* uart5_rx_m1 */
@@ -1336,14 +1759,17 @@
 				/* uart5_tx_m1 */
 				<2 RK_PB0 4 &pcfg_pull_up>;
 		};
+		/omit-if-no-ref/
 		uart5m1_ctsn: uart5m1-ctsn {
 			rockchip,pins =
 				<2 RK_PB3 4 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		uart5m1_rtsn: uart5m1-rtsn {
 			rockchip,pins =
 				<2 RK_PB2 4 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		uart5m2_xfer: uart5m2-xfer {
 			rockchip,pins =
 				/* uart5_rx_m2 */
@@ -1351,10 +1777,12 @@
 				/* uart5_tx_m2 */
 				<2 RK_PA0 3 &pcfg_pull_up>;
 		};
+		/omit-if-no-ref/
 		uart5m2_ctsn: uart5m2-ctsn {
 			rockchip,pins =
 				<2 RK_PA3 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		uart5m2_rtsn: uart5m2-rtsn {
 			rockchip,pins =
 				<2 RK_PA2 3 &pcfg_pull_none>;
diff --git a/arch/arm/dts/rv1126.dtsi b/arch/arm/dts/rv1126.dtsi
index c420dfe88a..d16ce7912e 100644
--- a/arch/arm/dts/rv1126.dtsi
+++ b/arch/arm/dts/rv1126.dtsi
@@ -33,6 +33,10 @@
 		serial3 = &uart3;
 		serial4 = &uart4;
 		serial5 = &uart5;
+		spi0 = &spi0;
+		spi1 = &spi1;
+		dphy0 = &csi_dphy0;
+		dphy1 = &csi_dphy1;
 	};
 
 	cpus {
@@ -43,6 +47,7 @@
 			device_type = "cpu";
 			compatible = "arm,cortex-a7";
 			reg = <0xf00>;
+			enable-method = "psci";
 			clocks = <&cru ARMCLK>;
 			operating-points-v2 = <&cpu0_opp_table>;
 		};
@@ -51,6 +56,7 @@
 			device_type = "cpu";
 			compatible = "arm,cortex-a7";
 			reg = <0xf01>;
+			enable-method = "psci";
 			clocks = <&cru ARMCLK>;
 			operating-points-v2 = <&cpu0_opp_table>;
 		};
@@ -59,6 +65,7 @@
 			device_type = "cpu";
 			compatible = "arm,cortex-a7";
 			reg = <0xf02>;
+			enable-method = "psci";
 			clocks = <&cru ARMCLK>;
 			operating-points-v2 = <&cpu0_opp_table>;
 		};
@@ -67,6 +74,7 @@
 			device_type = "cpu";
 			compatible = "arm,cortex-a7";
 			reg = <0xf03>;
+			enable-method = "psci";
 			clocks = <&cru ARMCLK>;
 			operating-points-v2 = <&cpu0_opp_table>;
 		};
@@ -112,6 +120,26 @@
 		compatible = "rockchip,display-subsystem";
 		ports = <&vop_out>;
 		status = "disabled";
+
+		route {
+			route_dsi: route-dsi {
+				status = "disabled";
+				logo,uboot = "logo.bmp";
+				logo,kernel = "logo_kernel.bmp";
+				logo,mode = "center";
+				charge_logo,mode = "center";
+				connect = <&vop_out_dsi>;
+			};
+
+			route_rgb: route-rgb {
+				status = "disabled";
+				logo,uboot = "logo.bmp";
+				logo,kernel = "logo_kernel.bmp";
+				logo,mode = "center";
+				charge_logo,mode = "center";
+				connect = <&vop_out_rgb>;
+			};
+		};
 	};
 
 	fiq_debugger: fiq-debugger {
@@ -119,11 +147,23 @@
 		rockchip,serial-id = <2>;
 		rockchip,wake-irq = <0>;
 		rockchip,irq-mode-enable = <0>;
-		rockchip,baudrate = <115200>;  /* Only 115200 and 1500000 */
+		rockchip,baudrate = <1500000>;  /* Only 115200 and 1500000 */
 		interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
 		status = "disabled";
 	};
 
+	mpp_srv: mpp-srv {
+		compatible = "rockchip,mpp-service";
+		rockchip,taskqueue-count = <3>;
+		rockchip,resetgroup-count = <3>;
+		status = "disabled";
+	};
+
+	psci {
+		compatible = "arm,psci-1.0";
+		method = "smc";
+	};
+
 	rgb: rgb {
 		compatible = "rockchip,rv1126-rgb";
 		status = "disabled";
@@ -164,7 +204,7 @@
 
 	grf: syscon@fe000000 {
 		compatible = "rockchip,rv1126-grf", "syscon";
-		reg = <0xfe000000 0x1000>;
+		reg = <0xfe000000 0x20000>;
 	};
 
 	pmugrf: syscon@fe020000 {
@@ -561,6 +601,21 @@
 		status = "disabled";
 	};
 
+	spi0: spi@ff450000 {
+		compatible = "rockchip,rv1126-spi", "rockchip,rk3066-spi";
+		reg = <0xff450000 0x1000>;
+		interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		clocks = <&cru CLK_SPI0>, <&cru PCLK_SPI0>;
+		clock-names = "spiclk", "apb_pclk";
+		dmas = <&dmac 1>, <&dmac 0>;
+		dma-names = "tx", "rx";
+		pinctrl-names = "default", "high_speed";
+		pinctrl-0 = <&spi0m0_clk &spi0m0_cs0n &spi0m0_cs1n &spi0m0_miso &spi0m0_mosi>;
+		pinctrl-1 = <&spi0m0_clk_hs &spi0m0_cs0n &spi0m0_cs1n &spi0m0_miso_hs &spi0m0_mosi_hs>;
+		status = "disabled";
+	};
+
 	pvtm@ff470000 {
 		compatible = "rockchip,rv1126-pmu-pvtm";
 		reg = <0xff470000 0x100>;
@@ -605,6 +660,81 @@
 			<&pmucru CLK_OSC0_DIV32K>;
 	};
 
+	csi_dphy0: csi-dphy@ff4b0000 {
+		compatible = "rockchip,rv1126-csi-dphy";
+		reg = <0xff4b0000 0x8000>;
+		clocks = <&cru PCLK_CSIPHY0>;
+		clock-names = "pclk";
+		rockchip,grf = <&grf>;
+		status = "disabled";
+	};
+
+	csi_dphy1: csi-dphy@ff4b8000 {
+		compatible = "rockchip,rv1126-csi-dphy";
+		reg = <0xff4b8000 0x8000>;
+		clocks = <&cru PCLK_CSIPHY1>;
+		clock-names = "pclk";
+		rockchip,grf = <&grf>;
+		status = "disabled";
+	};
+
+	u2phy0: usb2-phy@ff4c0000 {
+		compatible = "rockchip,rv1126-usb2phy";
+		reg = <0xff4c0000 0x8000>;
+		clocks = <&cru CLK_USBPHY_OTG_REF>, <&cru PCLK_USBPHY_OTG>;
+		clock-names = "phyclk", "pclk";
+		resets = <&cru SRST_USBPHYPOR_OTG>, <&cru SRST_USBPHY_OTG_P>;
+		reset-names = "u2phy", "u2phy-apb";
+		#clock-cells = <0>;
+		clock-output-names = "usb480m_phy0";
+		status = "disabled";
+
+		u2phy_otg: otg-port {
+			#phy-cells = <0>;
+			interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "otg-bvalid", "otg-id",
+					  "linestate", "disconnect";
+			status = "disabled";
+		};
+	};
+
+	u2phy1: usb2-phy@ff4c8000 {
+		compatible = "rockchip,rv1126-usb2phy";
+		reg = <0xff4c8000 0x8000>;
+		clocks = <&cru CLK_USBPHY_HOST_REF>, <&cru PCLK_USBPHY_HOST>;
+		clock-names = "phyclk", "pclk";
+		resets = <&cru SRST_USBPHYPOR_HOST>, <&cru SRST_USBPHY_HOST_P>;
+		reset-names = "u2phy", "u2phy-apb";
+		#clock-cells = <0>;
+		clock-output-names = "usb480m_phy1";
+		status = "disabled";
+
+		u2phy_host: host-port {
+			#phy-cells = <0>;
+			interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "linestate", "disconnect";
+			status = "disabled";
+		};
+	};
+
+	mipi_dphy: mipi-dphy@ff4d0000 {
+		compatible = "rockchip,rv1126-mipi-dphy", "rockchip,rk1808-mipi-dphy";
+		reg = <0xff4d0000 0x500>;
+		clocks = <&cru CLK_MIPIDSIPHY_REF>, <&cru PCLK_DSIPHY>;
+		clock-names = "ref", "pclk";
+		clock-output-names = "mipi_dphy_pll";
+		#clock-cells = <0>;
+		resets = <&cru SRST_DSIPHY_P>;
+		reset-names = "apb";
+		#phy-cells = <0>;
+		rockchip,grf = <&grf>;
+		status = "disabled";
+	};
+
 	i2c1: i2c@ff510000 {
 		compatible = "rockchip,rv1126-i2c", "rockchip,rk3399-i2c";
 		reg = <0xff510000 0x1000>;
@@ -776,6 +906,57 @@
 		status = "disabled";
 	};
 
+	spi1: spi@ff5b0000 {
+		compatible = "rockchip,rv1126-spi", "rockchip,rk3066-spi";
+		reg = <0xff5b0000 0x1000>;
+		interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		clocks = <&cru CLK_SPI1>, <&cru PCLK_SPI1>;
+		clock-names = "spiclk", "apb_pclk";
+		dmas = <&dmac 3>, <&dmac 2>;
+		dma-names = "tx", "rx";
+		pinctrl-names = "default", "high_speed";
+		pinctrl-0 = <&spi1m0_clk &spi1m0_cs0n &spi1m0_cs1n &spi1m0_miso &spi1m0_mosi>;
+		pinctrl-1 = <&spi1m0_clk_hs &spi1m0_cs0n &spi1m0_cs1n &spi1m0_miso_hs &spi1m0_mosi_hs>;
+		status = "disabled";
+	};
+
+	otp: otp@ff5c0000 {
+		compatible = "rockchip,rv1126-otp";
+		reg = <0xff5c0000 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		clocks = <&cru CLK_OTP>, <&cru PCLK_OTP>;
+		clock-names = "otp", "apb_pclk";
+		status = "disabled";
+
+		/* Data cells */
+		otp_id: id@7 {
+			reg = <0x07 0x10>;
+		};
+		cpu_leakage: cpu-leakage@17 {
+			reg = <0x17 0x1>;
+		};
+		logic_leakage: logic-leakage@18 {
+			reg = <0x18 0x1>;
+		};
+		npu_leakage: npu-leakage@19 {
+			reg = <0x19 0x1>;
+		};
+	};
+
+	saradc: saradc@ff5e0000 {
+		compatible = "rockchip,saradc";
+		reg = <0xff5e0000 0x100>;
+		interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
+		#io-channel-cells = <1>;
+		clocks = <&cru CLK_SARADC>, <&cru PCLK_SARADC>;
+		clock-names = "saradc", "apb_pclk";
+		resets = <&cru SRST_SARADC_P>;
+		reset-names = "saradc-apb";
+		status = "disabled";
+	};
+
 	cpu_tsadc: tsadc@ff5f0000 {
 		compatible = "rockchip,rv1126-tsadc";
 		reg = <0xff5f0000 0x100>;
@@ -823,6 +1004,14 @@
 		status = "disabled";
 	};
 
+	wdt: watchdog@ff680000 {
+		compatible = "rockchip,rv1126-wdt", "snps,dw-wdt";
+		reg = <0xff680000 0x100>;
+		clocks = <&cru PCLK_WDT>;
+		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+		status = "disabled";
+	};
+
 	mailbox: mailbox@ff6a0000 {
 		compatible = "rockchip,rv1126-mailbox",
 			     "rockchip,rk3368-mailbox";
@@ -834,6 +1023,94 @@
 		status = "disabled";
 	};
 
+	i2s0_8ch: i2s@ff800000 {
+		compatible = "rockchip,rv1126-i2s-tdm";
+		reg = <0xff800000 0x1000>;
+		interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru MCLK_I2S8CH_TX>, <&cru MCLK_I2S8CH_RX>, <&cru HCLK_I2S8CH>;
+		clock-names = "mclk_tx", "mclk_rx", "hclk";
+		dmas = <&dmac 20>, <&dmac 19>;
+		dma-names = "tx", "rx";
+		resets = <&cru SRST_I2S8CH_TX_M>, <&cru SRST_I2S8CH_RX_M>;
+		reset-names = "tx-m", "rx-m";
+		rockchip,cru = <&cru>;
+		rockchip,grf = <&grf>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2s0m0_sclk_tx
+			     &i2s0m0_sclk_rx
+			     &i2s0m0_lrck_tx
+			     &i2s0m0_lrck_rx
+			     &i2s0m0_sdi0
+			     &i2s0m0_sdo0
+			     &i2s0m0_sdo1_sdi3
+			     &i2s0m0_sdo2_sdi2
+			     &i2s0m0_sdo3_sdi1>;
+		status = "disabled";
+	};
+
+	i2s1_2ch: i2s@ff810000 {
+		compatible = "rockchip,rv1126-i2s", "rockchip,rk3066-i2s";
+		reg = <0xff810000 0x1000>;
+		interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru MCLK_I2S2CH0>, <&cru HCLK_I2S2CH0>;
+		clock-names = "i2s_clk", "i2s_hclk";
+		dmas = <&dmac 22>, <&dmac 21>;
+		dma-names = "tx", "rx";
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2s1m0_sclk
+			     &i2s1m0_lrck
+			     &i2s1m0_sdi
+			     &i2s1m0_sdo>;
+		status = "disabled";
+	};
+
+	i2s2_2ch: i2s@ff820000 {
+		compatible = "rockchip,rv1126-i2s", "rockchip,rk3066-i2s";
+		reg = <0xff820000 0x1000>;
+		interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru MCLK_I2S2CH1>, <&cru HCLK_I2S2CH1>;
+		clock-names = "i2s_clk", "i2s_hclk";
+		dmas = <&dmac 24>, <&dmac 23>;
+		dma-names = "tx", "rx";
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2s2m0_sclk
+			     &i2s2m0_lrck
+			     &i2s2m0_sdi
+			     &i2s2m0_sdo>;
+		status = "disabled";
+	};
+
+	pdm: pdm@ff830000 {
+		compatible = "rockchip,rv1126-pdm", "rockchip,pdm";
+		reg = <0xff830000 0x1000>;
+		clocks = <&cru MCLK_PDM>, <&cru HCLK_PDM>;
+		clock-names = "pdm_clk", "pdm_hclk";
+		dmas = <&dmac 25>;
+		dma-names = "rx";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pdmm0_clk
+			     &pdmm0_clk1
+			     &pdmm0_sdi0
+			     &pdmm0_sdi1
+			     &pdmm0_sdi2
+			     &pdmm0_sdi3>;
+		status = "disabled";
+	};
+
+	audpwm: audpwm@ff840000 {
+		compatible = "rockchip,rv1126-audio-pwm", "rockchip,audio-pwm-v1";
+		reg = <0xff840000 0x1000>;
+		clocks = <&cru SCLK_AUDPWM>, <&cru HCLK_AUDPWM>;
+		clock-names = "clk", "hclk";
+		dmas = <&dmac 26>;
+		dma-names = "tx";
+		pinctrl-names = "default";
+		pinctrl-0 = <&audpwmm0_pins>;
+		rockchip,sample-width-bits = <11>;
+		rockchip,interpolat-points = <1>;
+		status = "disabled";
+	};
+
 	dfi: dfi@ff9c0000 {
 		reg = <0xff9c0000 0x400>;
 		compatible = "rockchip,rv1126-dfi";
@@ -910,6 +1187,11 @@
 				reg = <0>;
 				remote-endpoint = <&rgb_in_vop>;
 			};
+
+			vop_out_dsi: endpoint@1 {
+				reg = <1>;
+				remote-endpoint = <&dsi_in_vop>;
+			};
 		};
 	};
 
@@ -925,6 +1207,30 @@
 		status = "disabled";
 	};
 
+	dsi: dsi@ffb30000 {
+		compatible = "rockchip,rv1126-mipi-dsi";
+		reg = <0xffb30000 0x500>;
+		interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru PCLK_DSIHOST>, <&mipi_dphy>;
+		clock-names = "pclk", "hs_clk";
+		resets = <&cru SRST_DSIHOST_P>;
+		reset-names = "apb";
+		phys = <&mipi_dphy>;
+		phy-names = "mipi_dphy";
+		rockchip,grf = <&grf>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+
+		ports {
+			port {
+				dsi_in_vop: endpoint {
+					remote-endpoint = <&vop_out_dsi>;
+				};
+			};
+		};
+	};
+
 	rkisp: rkisp@ffb50000 {
 		compatible = "rockchip,rv1126-rkisp";
 		reg = <0xffb50000 0x10000>;
@@ -935,6 +1241,21 @@
 		clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>,
 			 <&cru CLK_ISP>;
 		clock-names = "aclk_isp", "hclk_isp", "clk_isp";
+		power-domains = <&power RV1126_PD_VI>;
+		iommus = <&rkisp_mmu>;
+		status = "disabled";
+	};
+
+	rkisp_mmu: iommu@ffb51a00 {
+		compatible = "rockchip,iommu";
+		reg = <0xffb51a00 0x100>;
+		interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "isp_mmu";
+		clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>;
+		clock-names = "aclk", "iface";
+		power-domains = <&power RV1126_PD_VI>;
+		#iommu-cells = <0>;
+		rockchip,disable-mmu-reset;
 		status = "disabled";
 	};
 
@@ -947,6 +1268,55 @@
 		clocks = <&cru ACLK_ISPP>, <&cru HCLK_ISPP>,
 			 <&cru CLK_ISPP>;
 		clock-names = "aclk_ispp", "hclk_ispp", "clk_ispp";
+		power-domains = <&power RV1126_PD_ISPP>;
+		iommus = <&rkispp_mmu>;
+		status = "disabled";
+	};
+
+	rkispp_mmu: iommu@ffb60e00 {
+		compatible = "rockchip,iommu";
+		reg = <0xffb60e00 0x40>, <0xffb60e40 0x40>, <0xffb60f00 0x40>;
+		interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "ispp_mmu0_r", "ispp_mmu0_w", "ispp_mmu1";
+		clocks = <&cru ACLK_ISPP>, <&cru HCLK_ISPP>;
+		clock-names = "aclk", "iface";
+		power-domains = <&power RV1126_PD_ISPP>;
+		#iommu-cells = <0>;
+		rockchip,disable-mmu-reset;
+		status = "disabled";
+	};
+
+	rkvenc: rkvenc@ffbb0000 {
+		compatible = "rockchip,rkv-encoder-v1";
+		reg = <0xffbb0000 0x400>;
+		interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "irq_enc";
+		clocks = <&cru ACLK_VENC>, <&cru HCLK_VENC>,
+			<&cru CLK_VENC_CORE>;
+		clock-names = "aclk_vcodec", "hclk_vcodec", "clk_core";
+		resets = <&cru SRST_VENC_A>, <&cru SRST_VENC_H>,
+			<&cru SRST_VENC_CORE>;
+		reset-names = "video_a", "video_h", "video_core";
+		iommus = <&rkvenc_mmu>;
+		node-name = "rkvenc";
+		rockchip,srv = <&mpp_srv>;
+		rockchip,taskqueue-node = <2>;
+		rockchip,resetgroup-node = <2>;
+		status = "disabled";
+	};
+
+	rkvenc_mmu: iommu@ffbb0f00 {
+		compatible = "rockchip,iommu";
+		reg = <0xffbb0f00 0x40>, <0xffbb0f40 0x40>;
+		interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
+			<GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "rkvenc_mmu0", "rkvenc_mmu1";
+		clocks = <&cru ACLK_VENC>, <&cru HCLK_VENC>;
+		clock-names = "aclk", "iface";
+		rockchip,disable-mmu-reset;
+		#iommu-cells = <0>;
 		status = "disabled";
 	};
 
@@ -974,7 +1344,7 @@
 			      "mac_clk_tx", "clk_mac_refout",
 			      "aclk_mac", "pclk_mac",
 			      "clk_mac_speed", "ptp_ref";
-		resets = <&cru SRST_PDGMAC_NIU_A>;
+		resets = <&cru SRST_GMAC_A>;
 		reset-names = "stmmaceth";
 
 		snps,mixed-burst;
@@ -983,18 +1353,12 @@
 		snps,axi-config = <&stmmac_axi_setup>;
 		snps,mtl-rx-config = <&mtl_rx_setup>;
 		snps,mtl-tx-config = <&mtl_tx_setup>;
-		phy-handle = <&phy>;
 		status = "disabled";
 
-		mdio {
+		mdio: mdio {
+			compatible = "snps,dwmac-mdio";
 			#address-cells = <0x1>;
 			#size-cells = <0x0>;
-			compatible = "snps,dwmac-mdio";
-			phy: phy@0 {
-				compatible = "ethernet-phy-ieee802.3-c22";
-				device_type = "ethernet-phy";
-				reg = <0x0>;
-			};
 		};
 
 		stmmac_axi_setup: stmmac-axi-config {
@@ -1075,6 +1439,63 @@
 		status = "disabled";
 	};
 
+	usbdrd: usb0 {
+		compatible = "rockchip,rv1126-dwc3", "rockchip,rk3399-dwc3";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		clocks = <&cru CLK_USBOTG_REF>, <&cru ACLK_USBOTG>;
+		clock-names = "ref_clk", "bus_clk";
+		status = "disabled";
+
+		usbdrd_dwc3: dwc3@ffd00000 {
+			compatible = "snps,dwc3";
+			reg = <0xffd00000 0x100000>;
+			interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
+			dr_mode = "otg";
+			maximum-speed = "high-speed";
+			phys = <&u2phy_otg>;
+			phy-names = "usb2-phy";
+			phy_type = "utmi_wide";
+			power-domains = <&power RV1126_PD_USB>;
+			resets = <&cru SRST_USBOTG_A>;
+			reset-names = "usb3-otg";
+			snps,dis_enblslpm_quirk;
+			snps,dis-u2-freeclk-exists-quirk;
+			snps,dis_u2_susphy_quirk;
+			snps,dis-del-phy-power-chg-quirk;
+			snps,tx-ipgap-linecheck-dis-quirk;
+			snps,xhci-trb-ent-quirk;
+			status = "disabled";
+		};
+	};
+
+	usb_host0_ehci: usb@ffe00000 {
+		compatible = "generic-ehci";
+		reg = <0xffe00000 0x20000>;
+		interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_USBHOST>, <&cru HCLK_USBHOST_ARB>,
+			 <&u2phy1>;
+		clock-names = "usbhost", "arbiter", "utmi";
+		phys = <&u2phy_host>;
+		phy-names = "usb";
+		power-domains = <&power RV1126_PD_USB>;
+		status = "disabled";
+	};
+
+	usb_host0_ohci: usb@ffe10000 {
+		compatible = "generic-ohci";
+		reg = <0xffe20000 0x20000>;
+		interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_USBHOST>, <&cru HCLK_USBHOST_ARB>,
+			 <&u2phy1>;
+		clock-names = "usbhost", "arbiter", "utmi";
+		phys = <&u2phy_host>;
+		phy-names = "usb";
+		power-domains = <&power RV1126_PD_USB>;
+		status = "disabled";
+	};
+
 	pinctrl: pinctrl {
 		compatible = "rockchip,rv1126-pinctrl";
 		rockchip,grf = <&grf>;

commit ed5d3403b443d3ad1ac46c41f8696df92d343249
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 17 10:54:16 2020 +0800

    common: android: clean 32-bit compress load address
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I5ef930062cea5de354c9e5d9c4edbfe4875d04d4

diff --git a/common/image-android.c b/common/image-android.c
index 753687e87b..ccd13b48ab 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -558,24 +558,31 @@ int android_image_parse_comp(struct andr_img_hdr *hdr, ulong *load_addr)
 	}
 #else
 	/*
-	 * On 32-bit kernel, assuming use zImage by default.
+	 * On 32-bit kernel:
 	 *
-	 * kernel_addr_c is for LZ4/zImage but maybe not defined.
-	 * kernel_addr_r is for zImage when kernel_addr_c is not defined.
-	 * kernel_addr_r is for IMAGE when kernel_addr_c is defined.
+	 * The input load_addr is from env value: "kernel_addr_r", it has
+	 * different role depends on whether kernel_addr_c is defined:
+	 *
+	 * - kernel_addr_r is for lz4/zImage if kernel_addr_c if [not] defined.
+	 * - kernel_addr_r is for IMAGE if kernel_addr_c is defined.
 	 */
 	if (comp == IH_COMP_NONE) {
 		if (kernel_addr_c) {
-			*load_addr = env_get_ulong("kernel_addr_r", 16, 0);
+			/* input load_addr is for Image, nothing to do */
 		} else {
+			/* input load_addr is for lz4/zImage, set default addr for Image */
 			*load_addr = CONFIG_SYS_SDRAM_BASE + 0x8000;
 			env_set_hex("kernel_addr_r", *load_addr);
+
+			*load_addr -= hdr->page_size;
 		}
-		
-		*load_addr -= hdr->page_size;
 	} else {
-		if (kernel_addr_c)
+		if (kernel_addr_c) {
+			/* input load_addr is for Image, so use another for lz4/zImage */
 			*load_addr = kernel_addr_c - hdr->page_size;
+		} else {
+			/* input load_addr is for lz4/zImage, nothing to do */
+		}
 	}
 #endif
 

commit d45e0962c89eba14a8bb90b463fbb92fd65b9455
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 17 10:53:03 2020 +0800

    rockchip: rv1126: update address definition
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If3d04b4c6cb69adcb9e193fdbda6f4e8e94e2353

diff --git a/include/configs/rv1126_common.h b/include/configs/rv1126_common.h
index bd49d50fa3..45afbc7b4e 100644
--- a/include/configs/rv1126_common.h
+++ b/include/configs/rv1126_common.h
@@ -15,8 +15,8 @@
 #define CONFIG_SKIP_LOWLEVEL_INIT
 #define CONFIG_SYS_NS16550_MEM32
 
-#define CONFIG_SYS_TEXT_BASE		0x00600000
-#define CONFIG_SYS_INIT_SP_ADDR		0x00800000
+#define CONFIG_SYS_TEXT_BASE		0x00400000
+#define CONFIG_SYS_INIT_SP_ADDR		0x00580000
 #define CONFIG_SYS_LOAD_ADDR		0x00C00800
 #define CONFIG_SYS_BOOTM_LEN		(64 << 20)
 

commit 008ec9b4bc06f98dd7efdc7d2f44eb066be036e6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Mar 16 15:11:48 2020 +0800

    lib: rsa: add hardware crypto for FIT image checksum and rsa
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I526dd1b9a2a7e0050786f6006fd166f3dfb3a5c4

diff --git a/Kconfig b/Kconfig
index 082dab44ea..54fa69c134 100644
--- a/Kconfig
+++ b/Kconfig
@@ -253,6 +253,12 @@ config FIT_IMAGE_POST_PROCESS
 	  injected into the FIT creation (i.e. the blobs would have been pre-
 	  processed before being added to the FIT image).
 
+config FIT_HW_CRYPTO
+	bool "Enable hardware crypto for FIT image checksum and rsa verify"
+	depends on DM_CRYPTO
+	help
+	  Enable hardware crypto for FIT image checksum and rsa verify.
+
 if SPL
 
 config SPL_FIT
@@ -309,6 +315,12 @@ config SPL_FIT_GENERATOR
 	  passed a list of supported device tree file stub names to
 	  include in the generated image.
 
+config SPL_FIT_HW_CRYPTO
+	bool "Enable SPL hardware crypto for FIT image checksum and rsa verify"
+	depends on SPL_DM_CRYPTO
+	help
+	  Enable SPL hardware crypto for FIT image checksum and rsa verify.
+
 endif # SPL
 
 endif # FIT
diff --git a/include/u-boot/rsa-mod-exp.h b/include/u-boot/rsa-mod-exp.h
index 45a031b4b6..ae78773bb8 100644
--- a/include/u-boot/rsa-mod-exp.h
+++ b/include/u-boot/rsa-mod-exp.h
@@ -22,6 +22,12 @@ struct key_prop {
 	const void *rr;		/* R^2 can be treated as byte array */
 	const void *modulus;	/* modulus as byte array */
 	const void *public_exponent; /* public exponent as byte array */
+	const void *public_exponent_BN; /* public exponent as byte array */
+#ifdef CONFIG_ROCKCHIP_CRYPTO_V1
+	const void *factor_c;	/* rockchip crypto v1 accelerate factor */
+#else
+	const void *factor_np;	/* rockchip crypto v2 accelerate factor */
+#endif
 	uint32_t n0inv;		/* -1 / modulus[0] mod 2^32 */
 	int num_bits;		/* Key length in bits */
 	uint32_t exp_len;	/* Exponent length in number of uint8_t */
diff --git a/lib/rsa/rsa-checksum.c b/lib/rsa/rsa-checksum.c
index 2bf28e2daf..7b68236ca5 100644
--- a/lib/rsa/rsa-checksum.c
+++ b/lib/rsa/rsa-checksum.c
@@ -6,6 +6,7 @@
 
 #ifndef USE_HOSTCC
 #include <common.h>
+#include <crypto.h>
 #include <fdtdec.h>
 #include <asm/byteorder.h>
 #include <linux/errno.h>
@@ -16,9 +17,9 @@
 #endif
 #include <u-boot/rsa.h>
 
-int hash_calculate(const char *name,
-		    const struct image_region region[],
-		    int region_count, uint8_t *checksum)
+int hash_calculate_sw(const char *name,
+		      const struct image_region region[],
+		      int region_count, uint8_t *checksum)
 {
 	struct hash_algo *algo;
 	int ret = 0;
@@ -50,3 +51,49 @@ int hash_calculate(const char *name,
 
 	return 0;
 }
+
+#if defined(USE_HOSTCC)
+int hash_calculate(const char *name,
+		   const struct image_region region[],
+		   int region_count, uint8_t *checksum)
+{
+	return hash_calculate_sw(name, region, region_count, checksum);
+}
+#else
+#if CONFIG_IS_ENABLED(FIT_HW_CRYPTO)
+int hash_calculate(const char *name,
+		   const struct image_region region[],
+		   int region_count, uint8_t *checksum)
+
+{
+	struct udevice *dev;
+	sha_context ctx;
+
+	if (!name)
+		return -EINVAL;
+
+	if (!strcmp(name, "sha1"))
+		ctx.algo = CRYPTO_SHA1;
+	else if (!strcmp(name, "sha256"))
+		ctx.algo = CRYPTO_SHA256;
+	else
+		return -EPERM;
+
+	dev = crypto_get_device(ctx.algo);
+	if (!dev) {
+		printf("No crypto device for expected capability\n");
+		return -ENODEV;
+	}
+
+	return crypto_sha_regions_csum(dev, &ctx, region,
+				       region_count, checksum);
+}
+#else
+int hash_calculate(const char *name,
+		   const struct image_region region[],
+		   int region_count, uint8_t *checksum)
+{
+	return hash_calculate_sw(name, region, region_count, checksum);
+}
+#endif
+#endif
diff --git a/lib/rsa/rsa-sign.c b/lib/rsa/rsa-sign.c
index 1da4ef7fff..c9b240e16c 100644
--- a/lib/rsa/rsa-sign.c
+++ b/lib/rsa/rsa-sign.c
@@ -553,11 +553,12 @@ cleanup:
  * rsa_get_params(): - Get the important parameters of an RSA public key
  */
 int rsa_get_params(RSA *key, uint64_t *exponent, uint32_t *n0_invp,
-		   BIGNUM **modulusp, BIGNUM **r_squaredp)
+		   BIGNUM **modulusp, BIGNUM **exponent_BN, BIGNUM **r_squaredp,
+		   BIGNUM **c_factorp, BIGNUM **np_factorp)
 {
-	BIGNUM *big1, *big2, *big32, *big2_32;
-	BIGNUM *n, *r, *r_squared, *tmp;
-	const BIGNUM *key_n;
+	BIGNUM *big1, *big2, *big32, *big2_32, *big4100, *big2180;
+	BIGNUM *n, *e, *r, *r_squared, *tmp, *c_factor, *np_factor;
+	const BIGNUM *key_n, *key_e;
 	BN_CTX *bn_ctx = BN_CTX_new();
 	int ret = 0;
 
@@ -565,13 +566,20 @@ int rsa_get_params(RSA *key, uint64_t *exponent, uint32_t *n0_invp,
 	big1 = BN_new();
 	big2 = BN_new();
 	big32 = BN_new();
+	big4100 = BN_new();
+	big2180 = BN_new();
+
 	r = BN_new();
 	r_squared = BN_new();
+	c_factor = BN_new();
+	np_factor = BN_new();
 	tmp = BN_new();
 	big2_32 = BN_new();
 	n = BN_new();
-	if (!big1 || !big2 || !big32 || !r || !r_squared || !tmp || !big2_32 ||
-	    !n) {
+	e = BN_new();
+	if (!big1 || !big2 || !big32 || !big4100 || !big2180 || !r ||
+	    !r_squared || !tmp || !big2_32 || !n || !e ||
+	    !c_factor || !np_factor) {
 		fprintf(stderr, "Out of memory (bignum)\n");
 		return -ENOMEM;
 	}
@@ -579,9 +587,11 @@ int rsa_get_params(RSA *key, uint64_t *exponent, uint32_t *n0_invp,
 	if (0 != rsa_get_exponent(key, exponent))
 		ret = -1;
 
-	RSA_get0_key(key, &key_n, NULL, NULL);
-	if (!BN_copy(n, key_n) || !BN_set_word(big1, 1L) ||
-	    !BN_set_word(big2, 2L) || !BN_set_word(big32, 32L))
+	RSA_get0_key(key, &key_n, &key_e, NULL);
+	if (!BN_copy(n, key_n) || !BN_copy(e, key_e) ||
+	    !BN_set_word(big1, 1L) ||
+	    !BN_set_word(big2, 2L) || !BN_set_word(big32, 32L) ||
+	    !BN_set_word(big4100, 4100L) || !BN_set_word(big2180, 2180L))
 		ret = -1;
 
 	/* big2_32 = 2^32 */
@@ -605,12 +615,27 @@ int rsa_get_params(RSA *key, uint64_t *exponent, uint32_t *n0_invp,
 	    !BN_mod(r_squared, tmp, n, bn_ctx))
 		ret = -1;
 
+	/* Calculate c_factor = 2^4100 mod n */
+	if (!BN_exp(tmp, big2, big4100, bn_ctx) ||
+	    !BN_mod(c_factor, tmp, n, bn_ctx))
+		ret = -1;
+
+	/* Calculate np_factor = 2^2180 div n */
+	if (!BN_exp(tmp, big2, big2180, bn_ctx) ||
+	    !BN_div(np_factor, NULL, tmp, n, bn_ctx))
+		ret = -1;
+
 	*modulusp = n;
+	*exponent_BN = e;
 	*r_squaredp = r_squared;
+	*c_factorp = c_factor;
+	*np_factorp = np_factor;
 
 	BN_free(big1);
 	BN_free(big2);
 	BN_free(big32);
+	BN_free(big4100);
+	BN_free(big2180);
 	BN_free(r);
 	BN_free(tmp);
 	BN_free(big2_32);
@@ -681,7 +706,7 @@ static int fdt_add_bignum(void *blob, int noffset, const char *prop_name,
 
 int rsa_add_verify_data(struct image_sign_info *info, void *keydest)
 {
-	BIGNUM *modulus, *r_squared;
+	BIGNUM *modulus, *exponent_BN, *r_squared, *c_factor, *np_factor;
 	uint64_t exponent;
 	uint32_t n0_inv;
 	int parent, node;
@@ -700,7 +725,8 @@ int rsa_add_verify_data(struct image_sign_info *info, void *keydest)
 	ret = rsa_get_pub_key(info->keydir, info->keyname, e, &rsa);
 	if (ret)
 		goto err_get_pub_key;
-	ret = rsa_get_params(rsa, &exponent, &n0_inv, &modulus, &r_squared);
+	ret = rsa_get_params(rsa, &exponent, &n0_inv, &modulus,
+			     &exponent_BN, &r_squared, &c_factor, &np_factor);
 	if (ret)
 		goto err_get_params;
 	bits = BN_num_bits(modulus);
@@ -747,6 +773,10 @@ int rsa_add_verify_data(struct image_sign_info *info, void *keydest)
 	if (!ret) {
 		ret = fdt_setprop_u64(keydest, node, "rsa,exponent", exponent);
 	}
+	if (!ret) {
+		ret = fdt_add_bignum(keydest, node, "rsa,exponent-BN",
+				     exponent_BN, bits);
+	}
 	if (!ret) {
 		ret = fdt_add_bignum(keydest, node, "rsa,modulus", modulus,
 				     bits);
@@ -755,6 +785,14 @@ int rsa_add_verify_data(struct image_sign_info *info, void *keydest)
 		ret = fdt_add_bignum(keydest, node, "rsa,r-squared", r_squared,
 				     bits);
 	}
+	if (!ret) {
+		ret = fdt_add_bignum(keydest, node, "rsa,c", c_factor,
+				     bits);
+	}
+	if (!ret) {
+		ret = fdt_add_bignum(keydest, node, "rsa,np", np_factor,
+				     bits);
+	}
 	if (!ret) {
 		ret = fdt_setprop_string(keydest, node, FIT_ALGO_PROP,
 					 info->name);
diff --git a/lib/rsa/rsa-verify.c b/lib/rsa/rsa-verify.c
index 0d548f8b8f..d5aae625af 100644
--- a/lib/rsa/rsa-verify.c
+++ b/lib/rsa/rsa-verify.c
@@ -6,6 +6,7 @@
 
 #ifndef USE_HOSTCC
 #include <common.h>
+#include <crypto.h>
 #include <fdtdec.h>
 #include <asm/types.h>
 #include <asm/byteorder.h>
@@ -58,6 +59,74 @@ static int rsa_verify_padding(const uint8_t *msg, const int pad_len,
 	return ret;
 }
 
+#if !defined(USE_HOSTCC)
+#if CONFIG_IS_ENABLED(FIT_HW_CRYPTO)
+static void rsa_convert_big_endian(uint32_t *dst, const uint32_t *src, int len)
+{
+	int i;
+
+	for (i = 0; i < len; i++)
+		dst[i] = fdt32_to_cpu(src[len - 1 - i]);
+}
+
+static int hw_crypto_rsa(struct key_prop *prop, const uint8_t *sig,
+			 const uint32_t sig_len, const uint32_t key_len,
+			 uint8_t *output)
+{
+	struct udevice *dev;
+	uint8_t sig_reverse[sig_len];
+	uint8_t buf[sig_len];
+	rsa_key rsa_key;
+	int i, ret;
+
+	if (key_len != RSA2048_BYTES)
+		return -EINVAL;
+
+	rsa_key.algo = CRYPTO_RSA2048;
+	rsa_key.n = malloc(key_len);
+	rsa_key.e = malloc(key_len);
+	rsa_key.c = malloc(key_len);
+	if (!rsa_key.n || !rsa_key.e || !rsa_key.c)
+		return -ENOMEM;
+
+	rsa_convert_big_endian(rsa_key.n, (uint32_t *)prop->modulus,
+			       key_len / sizeof(uint32_t));
+	rsa_convert_big_endian(rsa_key.e, (uint32_t *)prop->public_exponent_BN,
+			       key_len / sizeof(uint32_t));
+#ifdef CONFIG_ROCKCHIP_CRYPTO_V1
+	rsa_convert_big_endian(rsa_key.c, (uint32_t *)prop->factor_c,
+			       key_len / sizeof(uint32_t));
+#else
+	rsa_convert_big_endian(rsa_key.c, (uint32_t *)prop->factor_np,
+			       key_len / sizeof(uint32_t));
+#endif
+	for (i = 0; i < sig_len; i++)
+		sig_reverse[sig_len-1-i] = sig[i];
+
+	dev = crypto_get_device(rsa_key.algo);
+	if (!dev) {
+		printf("No crypto device for expected RSA\n");
+		return -ENODEV;
+	}
+
+	ret = crypto_rsa_verify(dev, &rsa_key, (u8 *)sig_reverse, buf);
+	if (ret)
+		goto out;
+
+	for (i = 0; i < sig_len; i++)
+		sig_reverse[sig_len-1-i] = buf[i];
+
+	memcpy(output, sig_reverse, sig_len);
+out:
+	free(rsa_key.n);
+	free(rsa_key.e);
+	free(rsa_key.c);
+
+	return ret;
+}
+#endif
+#endif
+
 /**
  * rsa_verify_key() - Verify a signature against some data using RSA Key
  *
@@ -78,9 +147,6 @@ static int rsa_verify_key(struct key_prop *prop, const uint8_t *sig,
 {
 	int pad_len;
 	int ret;
-#if !defined(USE_HOSTCC)
-	struct udevice *mod_exp_dev;
-#endif
 
 	if (!prop || !sig || !hash || !algo)
 		return -EIO;
@@ -102,6 +168,11 @@ static int rsa_verify_key(struct key_prop *prop, const uint8_t *sig,
 	uint8_t buf[sig_len];
 
 #if !defined(USE_HOSTCC)
+#if CONFIG_IS_ENABLED(FIT_HW_CRYPTO)
+	ret = hw_crypto_rsa(prop, sig, sig_len, key_len, buf);
+#else
+	struct udevice *mod_exp_dev;
+
 	ret = uclass_get_device(UCLASS_MOD_EXP, 0, &mod_exp_dev);
 	if (ret) {
 		printf("RSA: Can't find Modular Exp implementation\n");
@@ -109,6 +180,7 @@ static int rsa_verify_key(struct key_prop *prop, const uint8_t *sig,
 	}
 
 	ret = rsa_mod_exp(mod_exp_dev, sig, sig_len, prop, buf);
+#endif
 #else
 	ret = rsa_mod_exp_sw(sig, sig_len, prop, buf);
 #endif
@@ -175,6 +247,7 @@ static int rsa_verify_with_keynode(struct image_sign_info *info,
 	prop.exp_len = sizeof(uint64_t);
 
 	prop.modulus = fdt_getprop(blob, node, "rsa,modulus", NULL);
+	prop.public_exponent_BN = fdt_getprop(blob, node, "rsa,exponent-BN", NULL);
 
 	prop.rr = fdt_getprop(blob, node, "rsa,r-squared", NULL);
 
@@ -183,6 +256,15 @@ static int rsa_verify_with_keynode(struct image_sign_info *info,
 		return -EFAULT;
 	}
 
+#ifdef CONFIG_ROCKCHIP_CRYPTO_V1
+	prop.factor_c = fdt_getprop(blob, node, "rsa,c", NULL);
+	if (!prop.factor_c)
+		return -EFAULT;
+#else
+	prop.factor_np = fdt_getprop(blob, node, "rsa,np", NULL);
+	if (!prop.factor_np)
+		return -EFAULT;
+#endif
 	ret = rsa_verify_key(&prop, sig, sig_len, hash,
 			     info->crypto->key_len, info->checksum);
 

commit c14e46abc4fe0414cea6b176d8cf7282ea8e179a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Mar 16 15:07:59 2020 +0800

    dm: crypto: add API for multi regions checksum
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Id364b123a189987458b72adca28f4f4e75e90291

diff --git a/drivers/crypto/crypto-uclass.c b/drivers/crypto/crypto-uclass.c
index 5c59d0c516..75b8a4c2db 100644
--- a/drivers/crypto/crypto-uclass.c
+++ b/drivers/crypto/crypto-uclass.c
@@ -108,6 +108,30 @@ int crypto_sha_csum(struct udevice *dev, sha_context *ctx,
 	return ret;
 }
 
+int crypto_sha_regions_csum(struct udevice *dev, sha_context *ctx,
+			    const struct image_region region[],
+			    int region_count, u8 *output)
+{
+	int i, ret;
+
+	ctx->length = 0;
+	for (i = 0; i < region_count; i++)
+		ctx->length += region[i].size;
+
+	ret = crypto_sha_init(dev, ctx);
+	if (ret)
+		return ret;
+
+	for (i = 0; i < region_count; i++) {
+		ret = crypto_sha_update(dev, (void *)region[i].data,
+					region[i].size);
+		if (ret)
+			return ret;
+	}
+
+	return crypto_sha_final(dev, ctx, output);
+}
+
 int crypto_rsa_verify(struct udevice *dev, rsa_key *ctx, u8 *sign, u8 *output)
 {
 	const struct dm_crypto_ops *ops = device_get_ops(dev);
diff --git a/include/crypto.h b/include/crypto.h
index 4faa732f31..396c455bae 100644
--- a/include/crypto.h
+++ b/include/crypto.h
@@ -8,6 +8,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <image.h>
 #include <u-boot/sha1.h>
 
 /* Algorithms/capability of crypto, works together with crypto_algo_nbits() */
@@ -120,6 +121,21 @@ int crypto_sha_final(struct udevice *dev, sha_context *ctx, u8 *output);
 int crypto_sha_csum(struct udevice *dev, sha_context *ctx,
 		    char *input, u32 input_len, u8 *output);
 
+/**
+ * crypto_sha_regions_csum() - Crypto sha hash for multi data blocks
+ *
+ * @dev: crypto device
+ * @ctx: sha context
+ * @region: regions buffer
+ * @region_count: regions count
+ * @output: output hash data
+ *
+ * @return 0 on success, otherwise failed
+ */
+int crypto_sha_regions_csum(struct udevice *dev, sha_context *ctx,
+			    const struct image_region region[],
+			    int region_count, u8 *output);
+
 /**
  * crypto_rsa_verify() - Crypto rsa verify
  *

commit cc668fbca46ec4fb6fea094df1431d5c262b3f34
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Mar 12 15:14:43 2020 +0800

    driver: Makefile: support PWM in spl
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I3ca97f634acae8c2d9de0b5e003776bccb14cd1b

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 38513cae7f..ff7c9ae97f 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -575,6 +575,13 @@ config SPL_POWER_SUPPORT
 	  in drivers/power, drivers/power/pmic and drivers/power/regulator
 	  as part of an SPL build.
 
+config SPL_PWM_SUPPORT
+	bool "Support PWM driver"
+	depends on SPL
+	help
+	  Enable support for pwm in SPL. This allows use pwm to control
+	  somethings, for example control voltage.
+
 config SPL_RAM_SUPPORT
 	bool "Support booting from RAM"
 	default y if MICROBLAZE || ARCH_SOCFPGA || TEGRA || ARCH_ZYNQ
diff --git a/drivers/Makefile b/drivers/Makefile
index d7d128872a..ca2ed476bb 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -32,6 +32,7 @@ obj-$(CONFIG_ALTERA_SDRAM) += ddr/altera/
 obj-$(CONFIG_SPL_POWER_SUPPORT) += power/ power/pmic/
 obj-$(CONFIG_SPL_POWER_SUPPORT) += power/regulator/
 obj-$(CONFIG_SPL_POWER_SUPPORT) += power/fuel_gauge/
+obj-$(CONFIG_SPL_PWM_SUPPORT) += pwm/
 obj-$(CONFIG_SPL_MTD_SUPPORT) += mtd/
 obj-$(CONFIG_SPL_ONENAND_SUPPORT) += mtd/onenand/
 obj-$(CONFIG_SPL_UBI) += mtd/ubispl/

commit 2d7c904f271ffd19086cafe7cd6548ec5b1a5a83
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Mar 12 15:04:51 2020 +0800

    driver: Makefile: support adc in SPL
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I915becbf9597aa070001d3368d8daf9079565fc9

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index e0a2f00fa2..38513cae7f 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -18,6 +18,12 @@ config SPL
 
 if SPL
 
+config SPL_ADC_SUPPORT
+	bool "Support ADC driver in SPL"
+	depends on SPL
+	help
+	  The adc drive can be used to measure voltage in spl if need.
+
 config SPL_LDSCRIPT
 	string "Linker script for the SPL stage"
 	default "arch/$(ARCH)/cpu/u-boot-spl.lds"
diff --git a/drivers/Makefile b/drivers/Makefile
index db1306d3c0..d7d128872a 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -21,7 +21,7 @@ obj-$(CONFIG_$(SPL_TPL_)IRQ) += irq/
 
 ifndef CONFIG_TPL_BUILD
 ifdef CONFIG_SPL_BUILD
-
+obj-$(CONFIG_SPL_ADC_SUPPORT) += adc/
 obj-$(CONFIG_SPL_CPU_SUPPORT) += cpu/
 obj-$(CONFIG_SPL_CRYPTO_SUPPORT) += crypto/
 obj-$(CONFIG_SPL_GPIO_SUPPORT) += gpio/

commit cd4d895a733271ae61e9f70662ddbcfc0890543e
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Mar 12 14:23:31 2020 +0800

    dm: key: isolate the unused irq code in spl
    
    Since the irq is not planned to use in spl.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ia6433f3d9c3b2cc9862ddff781b6fe71b3bec0f0

diff --git a/drivers/input/key-uclass.c b/drivers/input/key-uclass.c
index 7a06559ab4..0de98f53b2 100644
--- a/drivers/input/key-uclass.c
+++ b/drivers/input/key-uclass.c
@@ -162,7 +162,7 @@ try_again:
 	return event;
 }
 
-#ifdef CONFIG_IRQ
+#if defined(CONFIG_IRQ) && !defined(CONFIG_SPL_BUILD)
 #if defined(CONFIG_PWRKEY_DNL_TRIGGER_NUM) && \
 		(CONFIG_PWRKEY_DNL_TRIGGER_NUM > 0)
 static void power_key_download(struct dm_key_uclass_platdata *uc_key)
@@ -272,7 +272,7 @@ static int key_post_probe(struct udevice *dev)
 					uc_key->adcval - margin : 0;
 	} else {
 		if (uc_key->code == KEY_POWER) {
-#ifdef CONFIG_IRQ
+#if defined(CONFIG_IRQ) && !defined(CONFIG_SPL_BUILD)
 			int irq;
 
 			if (uc_key->skip_irq_init)

commit 6c64f7feced589498935d46e22647d794dd2d2f4
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Mar 12 14:12:54 2020 +0800

    power: fuel gauge: allow fuel gauge in SPL
    
    Sometimes we need low power test in spl. Update the config
    to allow this.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I0c7d035cb55e06980d1c2fd28ceef5adee4d7197

diff --git a/drivers/Makefile b/drivers/Makefile
index c93dd90820..db1306d3c0 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -31,6 +31,7 @@ obj-$(CONFIG_ARMADA_XP) += ddr/marvell/axp/
 obj-$(CONFIG_ALTERA_SDRAM) += ddr/altera/
 obj-$(CONFIG_SPL_POWER_SUPPORT) += power/ power/pmic/
 obj-$(CONFIG_SPL_POWER_SUPPORT) += power/regulator/
+obj-$(CONFIG_SPL_POWER_SUPPORT) += power/fuel_gauge/
 obj-$(CONFIG_SPL_MTD_SUPPORT) += mtd/
 obj-$(CONFIG_SPL_ONENAND_SUPPORT) += mtd/onenand/
 obj-$(CONFIG_SPL_UBI) += mtd/ubispl/
diff --git a/drivers/power/fuel_gauge/Kconfig b/drivers/power/fuel_gauge/Kconfig
index e55dbc4690..2ff2448082 100644
--- a/drivers/power/fuel_gauge/Kconfig
+++ b/drivers/power/fuel_gauge/Kconfig
@@ -4,26 +4,56 @@ config DM_FUEL_GAUGE
 	help
 	  This adds a simple uclass for fuel gauge.
 
+config SPL_DM_FUEL_GAUGE
+	bool "Enable driver model fuel gauge support"
+	depends on SPL_DM
+	help
+	  This adds a simple uclass for fuel gauge.
+
 config POWER_FG_CW201X
 	bool "CW201X Fuel gauge support"
 	depends on DM_FUEL_GAUGE
 	help
 	  This adds support for CW201X fuel gauge support.
 
+config SPL_POWER_FG_CW201X
+	bool "CW201X Fuel gauge support"
+	depends on SPL_DM_FUEL_GAUGE
+	help
+	  This adds support for CW201X fuel gauge support.
+
 config POWER_FG_RK818
 	bool "RK818 Fuel gauge support"
 	depends on DM_FUEL_GAUGE && PMIC_RK8XX
 	help
 	  This adds support for RK818 fuel gauge support.
 
+config SPL_POWER_FG_RK818
+	bool "RK818 Fuel gauge support"
+	depends on SPL_DM_FUEL_GAUGE && PMIC_RK8XX
+	help
+	  This adds support for RK818 fuel gauge support.
+
 config POWER_FG_RK817
 	bool "RK817 Fuel gauge support"
 	depends on DM_FUEL_GAUGE && PMIC_RK8XX
 	help
 	  This adds support for RK817 fuel gauge support.
 
+config SPL_POWER_FG_RK817
+	bool "RK817 Fuel gauge support"
+	depends on SPL_DM_FUEL_GAUGE && PMIC_RK8XX
+	help
+	  This adds support for RK817 fuel gauge support.
+
 config POWER_FG_RK816
 	bool "RK816 Fuel gauge support"
 	depends on DM_FUEL_GAUGE && PMIC_RK8XX
 	help
 	  This adds support for RK816 fuel gauge support.
+
+config SPL_POWER_FG_RK816
+	bool "RK816 Fuel gauge support"
+	depends on DM_FUEL_GAUGE && PMIC_RK8XX
+	help
+	  This adds support for RK816 fuel gauge support.
diff --git a/drivers/power/fuel_gauge/fg_cw201x.c b/drivers/power/fuel_gauge/fg_cw201x.c
index 83bf41c6e5..7a0e6fd142 100755
--- a/drivers/power/fuel_gauge/fg_cw201x.c
+++ b/drivers/power/fuel_gauge/fg_cw201x.c
@@ -219,7 +219,7 @@ static int cw201x_get_vol(struct cw201x_info *cw201x)
 
 static int cw201x_dwc_otg_check_dpdm(void)
 {
-#ifdef CONFIG_PHY_ROCKCHIP_INNO_USB2
+#if defined(CONFIG_PHY_ROCKCHIP_INNO_USB2) && !defined(CONFIG_SPL_BUILD)
 	return rockchip_chg_get_type();
 #else
 	debug("rockchip_chg_get_type() is not implement\n");
diff --git a/drivers/power/fuel_gauge/fg_rk816.c b/drivers/power/fuel_gauge/fg_rk816.c
index 0f0798ca92..76ae3b030a 100644
--- a/drivers/power/fuel_gauge/fg_rk816.c
+++ b/drivers/power/fuel_gauge/fg_rk816.c
@@ -218,7 +218,7 @@ static void rk816_bat_write(struct battery_priv *di, u8 reg, u8 buf)
 
 static int rk816_bat_dwc_otg_check_dpdm(void)
 {
-#ifdef CONFIG_PHY_ROCKCHIP_INNO_USB2
+#if defined(CONFIG_PHY_ROCKCHIP_INNO_USB2) && !defined(CONFIG_SPL_BUILD)
 	return rockchip_chg_get_type();
 #else
 	BAT_INFO("rockchip_chg_get_type() is not implement\n");
diff --git a/drivers/power/fuel_gauge/fg_rk818.c b/drivers/power/fuel_gauge/fg_rk818.c
index d77a5341fb..918fc804bd 100644
--- a/drivers/power/fuel_gauge/fg_rk818.c
+++ b/drivers/power/fuel_gauge/fg_rk818.c
@@ -255,7 +255,7 @@ static void rk818_bat_write(struct battery_priv *di, u8 reg, u8 buf)
 
 static int rk818_bat_dwc_otg_check_dpdm(void)
 {
-#ifdef CONFIG_PHY_ROCKCHIP_INNO_USB2
+#if defined(CONFIG_PHY_ROCKCHIP_INNO_USB2) && !defined(CONFIG_SPL_BUILD)
 	return rockchip_chg_get_type();
 #else
 	debug("rockchip_chg_get_type() is not implement\n");

commit f4462f85e6188ad308df431d7c20b675be712caf
Author: Simon Glass <sjg@chromium.org>
Date:   Mon Oct 1 12:22:10 2018 -0600

    UPSTREAM: spl: input: Allow input in SPL and TPL
    
    In some cases it is necessary to read the keyboard in early phases of
    U-Boot. Update the config to allow this.
    
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I0f166e55c84c9f10ced9e4580e6b7c7a6f980a79

diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig
index 8a70723626..2c6a1e24dc 100644
--- a/drivers/input/Kconfig
+++ b/drivers/input/Kconfig
@@ -1,3 +1,16 @@
+config INPUT
+	bool "Enable input subsystem"
+	depends on DM
+	default y
+
+config SPL_INPUT
+	bool "Enable input subsystem for SPL"
+	depends on SPL_DM
+
+config TPL_INPUT
+	bool "Enable input subsystem for TPL"
+	depends on TPL_DM
+
 config DM_KEYBOARD
 	bool "Enable driver model keyboard support"
 	depends on DM
@@ -27,8 +40,43 @@ config RK_IR
 	help
 	  This adds a driver for the rockchip IR controller.
 
+config SPL_DM_KEYBOARD
+	bool "Enable driver model keyboard support"
+	depends on SPL_DM
+	help
+	  This adds a uclass for keyboards and implements keyboard support
+	  using driver model. The API is implemented by keyboard.h and
+	  includes methods to start/stop the device, check for available
+	  input and update LEDs if the keyboard has them.
+
+config TPL_DM_KEYBOARD
+	bool "Enable driver model keyboard support"
+	depends on TPL_DM
+	help
+	  This adds a uclass for keyboards and implements keyboard support
+	  using driver model. The API is implemented by keyboard.h and
+	  includes methods to start/stop the device, check for available
+	  input and update LEDs if the keyboard has them.
+
 config CROS_EC_KEYB
 	bool "Enable Chrome OS EC keyboard support"
+	depends on INPUT
+	help
+	  Most ARM Chromebooks use an EC to provide access to the keyboard.
+	  Messages are used to request key scans from the EC and these are
+	  then decoded into keys by this driver.
+
+config SPL_CROS_EC_KEYB
+	bool "Enable Chrome OS EC keyboard support in SPL"
+	depends on SPL_INPUT
+	help
+	  Most ARM Chromebooks use an EC to provide access to the keyboard.
+	  Messages are used to request key scans from the EC and these are
+	  then decoded into keys by this driver.
+
+config TPL_CROS_EC_KEYB
+	bool "Enable Chrome OS EC keyboard support in TPL"
+	depends on TPL_INPUT
 	help
 	  Most ARM Chromebooks use an EC to provide access to the keyboard.
 	  Messages are used to request key scans from the EC and these are
diff --git a/drivers/input/Makefile b/drivers/input/Makefile
index 73235e1d88..3d6469cd70 100644
--- a/drivers/input/Makefile
+++ b/drivers/input/Makefile
@@ -5,23 +5,28 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
 
-obj-$(CONFIG_DM_KEYBOARD) += keyboard-uclass.o
 obj-$(CONFIG_DM_KEY) += key-uclass.o
 obj-$(CONFIG_DM_RC) += rc-uclass.o
 obj-$(CONFIG_RK_IR) += rockchip_ir.o
 
+obj-y += input.o
+obj-$(CONFIG_$(SPL_TPL_)CROS_EC_KEYB) += cros_ec_keyb.o
+obj-$(CONFIG_$(SPL_TPL_)OF_CONTROL) += key_matrix.o
+obj-$(CONFIG_$(SPL_TPL_)DM_KEYBOARD) += keyboard-uclass.o
+obj-$(CONFIG_RK8XX_PWRKEY) += rk8xx_pwrkey.o
+
+ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_I8042_KEYB) += i8042.o
 obj-$(CONFIG_TEGRA_KEYBOARD) += tegra-kbc.o
 obj-$(CONFIG_TWL4030_INPUT) += twl4030.o
 obj-$(CONFIG_TWL6030_INPUT) += twl6030.o
-obj-$(CONFIG_CROS_EC_KEYB) += cros_ec_keyb.o
 obj-$(CONFIG_RK8XX_PWRKEY) += rk8xx_pwrkey.o
 ifdef CONFIG_PS2KBD
 obj-y += keyboard.o pc_keyb.o
 obj-$(CONFIG_PS2MULT) += ps2mult.o ps2ser.o
 endif
-obj-y += input.o
-obj-$(CONFIG_$(SPL_)OF_CONTROL) += key_matrix.o
+endif
+
 obj-$(CONFIG_ADC_KEY) += adc_key.o
 obj-$(CONFIG_GPIO_KEY) += gpio_key.o
 obj-$(CONFIG_RK_KEY) += rk_key.o
diff --git a/drivers/input/input.c b/drivers/input/input.c
index 26da3a95ff..4c84dd40ae 100644
--- a/drivers/input/input.c
+++ b/drivers/input/input.c
@@ -650,7 +650,7 @@ int input_stdio_register(struct stdio_dev *dev)
 	int error;
 
 	error = stdio_register(dev);
-
+#if !defined(CONFIG_SPL_BUILD) || CONFIG_IS_ENABLED(ENV_SUPPORT)
 	/* check if this is the standard input device */
 	if (!error && strcmp(env_get("stdin"), dev->name) == 0) {
 		/* reassign the console */
@@ -658,6 +658,9 @@ int input_stdio_register(struct stdio_dev *dev)
 				console_assign(stdin, dev->name))
 			return -1;
 	}
+#else
+	error = error;
+#endif
 
 	return 0;
 }

commit 909b97280011ddb537aab987a6b65d83dd6e42fc
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 14 11:57:58 2020 +0800

    cmd: net: support tftp/tftpbootm/tftpflash commands
    
    - tftp: download image.
    - tftpbootm: download and bootm the aosp/uImage/FIT Image.
    - tftpflash: download and flash the Image to partition.
    
    rename "tftpboot" to "tftp" since there are so many tftpxxx commands,
    the "tftp" cmd can't be recoganize as "tftpboot" by CLI shell.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I0128cd41a8fc9105016ae0417241348eb4a6f637

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 82d10f8595..4e32dc6323 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1079,6 +1079,16 @@ config CMD_TFTPPUT
 	help
 	  TFTP put command, for uploading files to a server
 
+config CMD_TFTP_BOOTM
+	bool "tftp download and bootm"
+	help
+	  TFTP bootm command, download and bootm the aosp/uImage/FIT Image.
+
+config CMD_TFTP_FLASH
+	bool "tftp download and flash"
+	help
+	  TFTP flash command, download and flash the Image to partition.
+
 config CMD_TFTPSRV
 	bool "tftpsrv"
 	help
diff --git a/cmd/net.c b/cmd/net.c
index 1727198c86..8413dc0fb0 100644
--- a/cmd/net.c
+++ b/cmd/net.c
@@ -11,6 +11,7 @@
 #include <common.h>
 #include <command.h>
 #include <net.h>
+#include <boot_rkimg.h>
 
 static int netboot_common(enum proto_t, cmd_tbl_t *, int, char * const []);
 
@@ -36,11 +37,113 @@ int do_tftpb(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 }
 
 U_BOOT_CMD(
-	tftpboot,	3,	1,	do_tftpb,
-	"boot image via network using TFTP protocol",
+	tftp,		3,	1,	do_tftpb,
+	"download image via network using TFTP protocol",
 	"[loadAddress] [[hostIPaddr:]bootfilename]"
 );
 
+#ifdef CONFIG_CMD_TFTP_BOOTM
+int do_tftpbootm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+	char *tftp_argv[] = { "tftp", NULL, NULL };
+	char *bootm_argv[] = { "bootm", NULL };
+	char *fileaddr;
+	ulong filesize;
+
+	if (argc != 3)
+		return CMD_RET_USAGE;
+
+	/* tftp download */
+	tftp_argv[1] = argv[1];
+	tftp_argv[2] = argv[2];
+	if (do_tftpb(cmdtp, 0, 3, tftp_argv))
+		return -ENOENT;
+
+	fileaddr = env_get("fileaddr");
+	filesize = env_get_ulong("filesize", 16, 0);
+	if (!fileaddr || !filesize)
+		return -ENOENT;
+
+	/* bootm */
+	bootm_argv[1] = fileaddr;
+	printf("## TFTP bootm %s at %s size 0x%lx\n",
+	       argv[2], fileaddr, filesize);
+
+	return do_bootm(NULL, 0, ARRAY_SIZE(bootm_argv), bootm_argv);
+}
+
+U_BOOT_CMD(
+	tftpbootm,	3,	1,	do_tftpbootm,
+	"tftpbootm aosp/uImage/FIT image via network using TFTP protocol",
+	"[loadAddress] [[hostIPaddr:]bootfilename]"
+);
+#endif
+
+#ifdef CONFIG_CMD_TFTP_FLASH
+int do_tftpflash(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+	char *tftp_argv[] = { "tftp", NULL, NULL };
+	struct blk_desc *dev_desc;
+	disk_partition_t part;
+	ulong fileaddr;
+	ulong filesize;
+	char *part_name;
+	int ret, blknum;
+
+	if (argc != 4)
+		return CMD_RET_USAGE;
+
+	/* search partition */
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("No boot device\n");
+		return -ENODEV;
+	}
+
+	part_name = argv[3];
+	ret = part_get_info_by_name(dev_desc, part_name, &part);
+	if (ret < 0) {
+		printf("No partition '%s'\n", part_name);
+		return -EINVAL;
+	}
+
+	/* tftp download */
+	tftp_argv[1] = argv[1];
+	tftp_argv[2] = argv[2];
+	if (do_tftpb(cmdtp, 0, ARRAY_SIZE(tftp_argv), tftp_argv))
+		return -ENOENT;
+
+	fileaddr = env_get_ulong("fileaddr", 16, 0);
+	filesize = env_get_ulong("filesize", 16, 0);
+	if (!fileaddr || !filesize)
+		return -ENOENT;
+
+	/* flash */
+	blknum = DIV_ROUND_UP(filesize, dev_desc->blksz);
+	if (blknum > part.size) {
+		printf("File size 0x%lx is too large to flash\n", filesize);
+		return -EINVAL;
+	}
+
+	printf("## TFTP flash %s to partititon '%s' size 0x%lx ... ",
+	       argv[2], part_name, filesize);
+
+	ret = blk_dwrite(dev_desc, part.start, blknum, (void *)fileaddr);
+	if (ret != blknum)
+		printf("Failed(%d)\n", ret);
+	else
+		printf("OK\n");
+
+	return 0;
+}
+
+U_BOOT_CMD(
+	tftpflash,	4,	0,	do_tftpflash,
+	"flash image via network using TFTP protocol",
+	"[loadAddress] [[hostIPaddr:]bootfilename] [partition]"
+);
+#endif
+
 #ifdef CONFIG_CMD_TFTPPUT
 static int do_tftpput(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {

commit a1b6bf655e272d98052326237188818e63256964
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 16 11:08:43 2020 +0800

    rockchip: common: add "boot_fit" and "boot_uimage" to bootcmd
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I98845b9e57be4183e079e18c20f9f2e0a27ffac3

diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index f9cb2b3c19..b404014d3a 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -151,6 +151,8 @@
 #define RKIMG_BOOTCOMMAND \
 	"boot_android ${devtype} ${devnum};" \
 	"bootrkp;" \
+	"boot_fit;" \
+	"boot_uimage;" \
 	"run distro_bootcmd;"
 #endif
 #endif

commit ac5d8aa9aab3d2158c72a63b321b50644e029d0b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Jan 11 14:14:00 2020 +0800

    rockchip: board: implement board_do_bootm()
    
    Implement it to support CLI command:
      - Android: bootm [aosp addr]
      - FIT:     bootm [fit addr]
      - uImage:  bootm [uimage addr]
    
    Purpose:
      - The original bootm command args require fdt addr on AOSP,
        which is not flexible on rockchip boot/recovery.img.
      - Take Android/FIT/uImage image into sysmem management to avoid image
        memory overlap.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I4ef3f1b0307f2e061105ee29307051202445c9e9

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 04f23d23bf..c8ffb9681a 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -6,6 +6,8 @@
 
 #include <common.h>
 #include <amp.h>
+#include <android_bootloader.h>
+#include <android_image.h>
 #include <bidram.h>
 #include <boot_rkimg.h>
 #include <cli.h>
@@ -665,3 +667,90 @@ int bootm_board_start(void)
 
 	return 0;
 }
+
+/*
+ * Implement it to support CLI command:
+ *   - Android: bootm [aosp addr]
+ *   - FIT:     bootm [fit addr]
+ *   - uImage:  bootm [uimage addr]
+ *
+ * Purpose:
+ *   - The original bootm command args require fdt addr on AOSP,
+ *     which is not flexible on rockchip boot/recovery.img.
+ *   - Take Android/FIT/uImage image into sysmem management to avoid image
+ *     memory overlap.
+ */
+#if defined(CONFIG_ANDROID_BOOTLOADER) ||	\
+	defined(CONFIG_ROCKCHIP_FIT_IMAGE) ||	\
+	defined(CONFIG_ROCKCHIP_UIMAGE)
+int board_do_bootm(int argc, char * const argv[])
+{
+	int format;
+	void *img;
+
+	if (argc != 2)
+		return 0;
+
+	img = (void *)simple_strtoul(argv[1], NULL, 16);
+	format = (genimg_get_format(img));
+
+	/* Android */
+#ifdef CONFIG_ANDROID_BOOT_IMAGE
+	if (format == IMAGE_FORMAT_ANDROID) {
+		struct andr_img_hdr *hdr;
+		ulong load_addr;
+		ulong size;
+		int ret;
+
+		hdr = (struct andr_img_hdr *)img;
+		printf("BOOTM: transferring to board Android\n");
+
+#ifdef CONFIG_USING_KERNEL_DTB
+		sysmem_free((phys_addr_t)gd->fdt_blob);
+		/* erase magic */
+		fdt_set_magic((void *)gd->fdt_blob, ~0);
+		gd->fdt_blob = NULL;
+#endif
+		load_addr = env_get_ulong("kernel_addr_r", 16, 0);
+		load_addr -= hdr->page_size;
+		size = android_image_get_end(hdr) - (ulong)hdr;
+
+		if (!sysmem_alloc_base(MEM_ANDROID, (ulong)hdr, size))
+			return -ENOMEM;
+
+		ret = android_image_memcpy_separate(hdr, &load_addr);
+		if (ret) {
+			printf("board do bootm failed, ret=%d\n", ret);
+			return ret;
+		}
+
+		return android_bootloader_boot_kernel(load_addr);
+	}
+#endif
+
+	/* FIT */
+#if IMAGE_ENABLE_FIT
+	if (format == IMAGE_FORMAT_FIT) {
+		char boot_cmd[64];
+
+		printf("BOOTM: transferring to board FIT\n");
+		snprintf(boot_cmd, sizeof(boot_cmd), "boot_fit %s", argv[1]);
+		return run_command(boot_cmd, 0);
+	}
+#endif
+
+	/* uImage */
+#if defined(CONFIG_IMAGE_FORMAT_LEGACY)
+	if (format == IMAGE_FORMAT_LEGACY &&
+	    image_get_type(img) == IH_TYPE_MULTI) {
+		char boot_cmd[64];
+
+		printf("BOOTM: transferring to board uImage\n");
+		snprintf(boot_cmd, sizeof(boot_cmd), "boot_uimage %s", argv[1]);
+		return run_command(boot_cmd, 0);
+	}
+#endif
+
+	return 0;
+}
+#endif

commit 7460c07a1d21833dbce1d15da9521dcc4c92b3f6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Feb 7 12:39:49 2020 +0800

    common: android: simplify fdt/ramdisk skip reloc
    
    bootm_board_start() takes over it.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I8a9e3287ad5ca5964809f689bd204cbc2e37468f

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 2bfa543bf3..f0999b5c0d 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -484,8 +484,6 @@ static int sysmem_alloc_uncomp_kernel(ulong andr_hdr,
 		if (!sysmem_alloc_base(MEM_UNCOMP_KERNEL,
 				       (phys_addr_t)kaddr, ksize))
 			return -ENOMEM;
-
-		hotkey_run(HK_SYSMEM);
 	}
 
 	return 0;
@@ -541,9 +539,6 @@ int android_bootloader_boot_kernel(unsigned long kernel_address)
 				       comp_type))
 		return -1;
 
-	/* Check sysmem overflow */
-	sysmem_overflow_check();
-
 	return do_bootm_states(NULL, 0, ARRAY_SIZE(bootm_args), bootm_args,
 		BOOTM_STATE_START |
 		BOOTM_STATE_FINDOS | BOOTM_STATE_FINDOTHER |
diff --git a/common/image-android.c b/common/image-android.c
index 753687e87b..30c785985f 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -415,8 +415,6 @@ static int android_image_separate(struct andr_img_hdr *hdr,
 				  void *load_address,
 				  void *ram_base)
 {
-	char *initrd_high;
-	char *fdt_high;
 	ulong bstart;
 
 	if (android_image_check_header(hdr)) {
@@ -504,22 +502,8 @@ static int android_image_separate(struct andr_img_hdr *hdr,
 	}
 #endif
 
-	/*
-	 * 2. Disable fdt/ramdisk relocation, it saves boot time.
-	 */
-	initrd_high = env_get("initrd_high");
-	fdt_high = env_get("fdt_high");
-
-	if (!fdt_high) {
-		env_set_hex("fdt_high", -1UL);
-		printf("Fdt ");
-	}
-	if (!initrd_high) {
-		env_set_hex("initrd_high", -1UL);
-		printf("Ramdisk ");
-	}
-	if (!fdt_high || !initrd_high)
-		printf("skip relocation\n");
+	/* 2. Disable fdt/ramdisk relocation, it saves boot time */
+	env_set("bootm-no-reloc", "y");
 
 	return 0;
 }

commit 5cadaea8d7451c15e7ab9067067d7b187c373c4e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Jan 11 14:12:29 2020 +0800

    common: android: replace do_bootm() with do_bootm_states()
    
    Avoid dead nested when android_bootloader_boot_kernel() is called
    in board_do_bootm(), this bootflow maybe:
    
    CLI command "bootm" => do_bootm() => board_do_bootm() =>
    android_bootloader_boot_kernel() => do_bootm().
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I441d91c986921008752d403a72b7bfa57140d7c8

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index efea3bd53f..2bfa543bf3 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -10,6 +10,7 @@
 #include <android_avb/avb_ops_user.h>
 #include <android_avb/rk_avb_ops_user.h>
 #include <android_image.h>
+#include <bootm.h>
 #include <asm/arch/hotkey.h>
 #include <cli.h>
 #include <common.h>
@@ -494,7 +495,7 @@ int android_bootloader_boot_kernel(unsigned long kernel_address)
 {
 	char *kernel_addr_r = env_get("kernel_addr_r");
 	char *kernel_addr_c = env_get("kernel_addr_c");
-	char *fdt_addr = env_get("fdt_addr");
+	char *fdt_addr = env_get("fdt_addr_r");
 	char kernel_addr_str[12];
 	char comp_str[32] = {0};
 	ulong comp_type;
@@ -508,7 +509,7 @@ int android_bootloader_boot_kernel(unsigned long kernel_address)
 		[IH_COMP_ZIMAGE]= "ZIMAGE",
 	};
 	char *bootm_args[] = {
-		"bootm", kernel_addr_str, kernel_addr_str, fdt_addr, NULL };
+		kernel_addr_str, kernel_addr_str, fdt_addr, NULL };
 
 	comp_type = env_get_ulong("os_comp", 10, 0);
 	sprintf(kernel_addr_str, "0x%08lx", kernel_address);
@@ -543,9 +544,15 @@ int android_bootloader_boot_kernel(unsigned long kernel_address)
 	/* Check sysmem overflow */
 	sysmem_overflow_check();
 
-	do_bootm(NULL, 0, 4, bootm_args);
-
-	return -1;
+	return do_bootm_states(NULL, 0, ARRAY_SIZE(bootm_args), bootm_args,
+		BOOTM_STATE_START |
+		BOOTM_STATE_FINDOS | BOOTM_STATE_FINDOTHER |
+		BOOTM_STATE_LOADOS |
+#ifdef CONFIG_SYS_BOOT_RAMDISK_HIGH
+		BOOTM_STATE_RAMDISK |
+#endif
+		BOOTM_STATE_OS_PREP | BOOTM_STATE_OS_FAKE_GO |
+		BOOTM_STATE_OS_GO, &images, 1);
 }
 
 static char *strjoin(const char **chunks, char separator)
@@ -1083,12 +1090,10 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	enum android_boot_mode mode = ANDROID_BOOT_MODE_NORMAL;
 	disk_partition_t misc_part_info;
 	int part_num;
-	int ret;
 	char *command_line;
 	char slot_suffix[3] = {0};
 	const char *mode_cmdline = NULL;
 	char *boot_partname = ANDROID_PARTITION_BOOT;
-	ulong fdt_addr;
 
 	/*
 	 * 1. Load MISC partition and determine the boot mode
@@ -1245,10 +1250,6 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 				       ANDROID_ARG_FDT_FILENAME)) {
 		printf("Can not get the fdt data from oem!\n");
 	}
-#else
-	ret = android_image_get_fdt((void *)load_address, &fdt_addr);
-	if (!ret)
-		env_set_hex("fdt_addr", fdt_addr);
 #endif
 #ifdef CONFIG_OPTEE_CLIENT
 	if (trusty_notify_optee_uboot_end())

commit a4696473d25a1b0ba4375306252d873b6c2785be
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Feb 7 12:37:14 2020 +0800

    cmd: bootrkp: simplify fdt/ramdisk skip reloc
    
    bootm_board_start() takes over it.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ie1df21ee3ff929a5fa7163216d90315277f6cfd5

diff --git a/cmd/bootrkp.c b/cmd/bootrkp.c
index b79d0471d6..1f23f9f2da 100644
--- a/cmd/bootrkp.c
+++ b/cmd/bootrkp.c
@@ -161,25 +161,6 @@ static void boot_lmb_init(bootm_headers_t *images)
 }
 #endif
 
-static void fdt_ramdisk_skip_relocation(void)
-{
-	char *ramdisk_high = env_get("initrd_high");
-	char *fdt_high = env_get("fdt_high");
-
-	if (!fdt_high) {
-		env_set_hex("fdt_high", -1UL);
-		printf("Fdt ");
-	}
-
-	if (!ramdisk_high) {
-		env_set_hex("initrd_high", -1UL);
-		printf("Ramdisk ");
-	}
-
-	if (!fdt_high || !ramdisk_high)
-		printf("skip relocation\n");
-}
-
 /*
  * non-OTA packaged kernel.img & boot.img return the image size on success,
  * and a negative value on error.
@@ -293,14 +274,12 @@ static int boot_rockchip_image(struct blk_desc *dev_desc,
 		}
 	}
 
+	env_set("bootm-no-reloc", "y");
+
 	printf("fdt	 @ 0x%08lx (0x%08x)\n", fdt_addr_r, fdt_totalsize(fdt_addr_r));
 	printf("kernel   @ 0x%08lx (0x%08x)\n", kernel_addr_r, kernel_size);
 	printf("ramdisk  @ 0x%08lx (0x%08x)\n", ramdisk_addr_r, ramdisk_size);
 
-	fdt_ramdisk_skip_relocation();
-	hotkey_run(HK_SYSMEM);
-	sysmem_overflow_check();
-
 #if defined(CONFIG_ARM64)
 	char cmdbuf[64];
 
@@ -326,9 +305,6 @@ static int boot_rockchip_image(struct blk_desc *dev_desc,
 			return -ENOMEM;
 	}
 
-	hotkey_run(HK_SYSMEM);
-	sysmem_overflow_check();
-
 	boot_lmb_init(&images);
 	images.ep = kernel_addr_r;
 	images.initrd_start = ramdisk_addr_r;

commit 85cad72d55b4629747dd6a57ee2f79ea5939c4f2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Feb 7 12:35:29 2020 +0800

    rockchip: board: implement bootm_board_start()
    
    - print console record data;
    - disable fdt/ramdisk relocation;
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If8c2008e04c57e0309dbb5d679a21cb7d435d4ff

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index a7bc733a1e..04f23d23bf 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -420,11 +420,6 @@ void board_quiesce_devices(void)
 	/* Destroy atags makes next warm boot safer */
 	atags_destroy();
 #endif
-
-#if defined(CONFIG_CONSOLE_RECORD)
-	/* Print record console data */
-	console_record_print_purge();
-#endif
 }
 
 void enable_caches(void)
@@ -617,3 +612,56 @@ int board_usb_cleanup(int index, enum usb_init_type init)
 	return 0;
 }
 #endif
+
+static void bootm_no_reloc(void)
+{
+	char *ramdisk_high;
+	char *fdt_high;
+
+	if (!env_get_yesno("bootm-no-reloc"))
+		return;
+
+	ramdisk_high = env_get("initrd_high");
+	fdt_high = env_get("fdt_high");
+
+	if (!fdt_high) {
+		env_set_hex("fdt_high", -1UL);
+		printf("Fdt ");
+	}
+
+	if (!ramdisk_high) {
+		env_set_hex("initrd_high", -1UL);
+		printf("Ramdisk ");
+	}
+
+	if (!fdt_high || !ramdisk_high)
+		printf("skip relocation\n");
+}
+
+int bootm_board_start(void)
+{
+	/*
+	 * print console record data
+	 *
+	 * On some rockchip platforms, uart debug and sdmmc pin are multiplex.
+	 * If boot from sdmmc mode, the console data would be record in buffer,
+	 * we switch to uart debug function in order to print it after loading
+	 * images.
+	 */
+#if defined(CONFIG_CONSOLE_RECORD)
+	if (!strcmp("mmc", env_get("devtype")) &&
+	    !strcmp("1", env_get("devnum"))) {
+		printf("IOMUX: sdmmc => uart debug");
+		pinctrl_select_state(gd->cur_serial_dev, "default");
+		console_record_print_purge();
+	}
+#endif
+	/* disable bootm relcation to save boot time */
+	bootm_no_reloc();
+
+	/* sysmem */
+	hotkey_run(HK_SYSMEM);
+	sysmem_overflow_check();
+
+	return 0;
+}

commit e39c2b5d453540cfd6be600b611d67811920d465
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Feb 7 11:54:29 2020 +0800

    cmd: add "boot_uimage" command for legacy uImage
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ie7b55ff4f63957312895c0f57fd405d3389f2ad7

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 8f2c07f755..82d10f8595 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -813,6 +813,15 @@ config CMD_BOOT_FIT
 	  boot/recovery partition containing kernel/fdt/ramdisk images.
 	  Additional that, the IH_TYPE_MULTI can be used for resource file.
 
+config CMD_BOOT_UIMAGE
+	bool "boot_uimage"
+	default n
+	depends on ROCKCHIP_UIMAGE
+	help
+	  Performs the Legacy uImage boot flow, loading the appropriate uImage
+	  file from resource/kernel/boot(recovery) partitions. Additional that,
+	  the resource partition can be fdt or resource(recommand) uImage file.
+
 config CMD_BOOT_ROCKCHIP
 	bool "boot_rockchip"
 	default n
diff --git a/cmd/Makefile b/cmd/Makefile
index aeb681982e..4744a1490e 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -30,6 +30,7 @@ obj-$(CONFIG_CMD_BOOT_ROCKCHIP) += bootrkp.o
 obj-$(CONFIG_CMD_BOOTEFI) += bootefi.o
 obj-$(CONFIG_CMD_BOOTMENU) += bootmenu.o
 obj-$(CONFIG_CMD_BOOTSTAGE) += bootstage.o
+obj-$(CONFIG_CMD_BOOT_UIMAGE) += bootuimage.o
 obj-$(CONFIG_CMD_BOOTZ) += bootz.o
 obj-$(CONFIG_CMD_BOOTI) += booti.o
 obj-$(CONFIG_CMD_CACHE) += cache.o
diff --git a/cmd/bootuimage.c b/cmd/bootuimage.c
new file mode 100644
index 0000000000..fad9a1bee7
--- /dev/null
+++ b/cmd/bootuimage.c
@@ -0,0 +1,103 @@
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <bootm.h>
+#include <boot_rkimg.h>
+#include <console.h>
+#include <image.h>
+#include <malloc.h>
+#include <sysmem.h>
+#include <linux/libfdt.h>
+#include <asm/arch/hotkey.h>
+#include <asm/arch/resource_img.h>
+#include <asm/arch/boot_mode.h>
+#include <asm/arch/uimage.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static void *do_boot_uimage_storage(void)
+{
+	return uimage_load_bootables();
+}
+
+static void *do_boot_uimage_ram(char *const argv[])
+{
+	image_header_t *hdr;
+	int blknum;
+	
+	hdr = (void *)simple_strtoul(argv[1], NULL, 16);
+	if (!hdr || !image_check_magic(hdr)) {
+		UIMG_I("Invalid header");
+		return NULL;
+	}
+
+	if (image_get_type(hdr) != IH_TYPE_MULTI) {
+		UIMG_I("Invalid multi images\n");
+		return NULL;
+	}
+
+	/* reserve this full uImage */
+	blknum = DIV_ROUND_UP(image_get_image_size(hdr), RK_BLK_SIZE);
+	if (!sysmem_alloc_base(MEM_UIMAGE_USER, (phys_addr_t)hdr,
+			       blknum * RK_BLK_SIZE))
+		return NULL;
+
+	return hdr;
+}
+
+static int do_boot_uimage(cmd_tbl_t *cmdtp, int flag,
+			  int argc, char *const argv[])
+{
+	char *bootm_args[1];
+	image_header_t *img;
+	char uimg_addr[12];
+	int ret;
+
+	if (argc > 2)
+		return CMD_RET_USAGE;
+
+	printf("\n## Booting Multi uImage ");
+
+	if (argc == 1)
+		img = do_boot_uimage_storage();
+	else
+		img = do_boot_uimage_ram(argv);
+
+	if (!img) {
+		UIMG_I("Failed to load multi images\n");
+		return -EINVAL;
+	}
+
+	if (uimage_sysmem_reserve_each(img))
+		return -ENOMEM;
+
+	snprintf(uimg_addr, sizeof(uimg_addr), "0x%lx", (ulong)img);
+	bootm_args[0] = uimg_addr;
+
+	printf("at %s\n", uimg_addr);
+
+	ret = do_bootm_states(NULL, 0, ARRAY_SIZE(bootm_args), bootm_args,
+		BOOTM_STATE_START |
+		BOOTM_STATE_FINDOS | BOOTM_STATE_FINDOTHER |
+		BOOTM_STATE_LOADOS |
+#ifdef CONFIG_SYS_BOOT_RAMDISK_HIGH
+		BOOTM_STATE_RAMDISK |
+#endif
+		BOOTM_STATE_OS_PREP | BOOTM_STATE_OS_FAKE_GO |
+		BOOTM_STATE_OS_GO, &images, 1);
+
+	if (ret && argc != 1)
+		uimage_sysmem_free_each(img);
+
+	return ret;
+}
+
+U_BOOT_CMD(
+	boot_uimage,  2,     1,      do_boot_uimage,
+	"Boot Legacy uImage from memory or boot(recovery) partitions",
+	"boot_uimage [addr]"
+);

commit 72c88b4aeab783608403392ce2bacfc08574bb48
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 15 18:35:37 2020 +0800

    cmd: add "boot_fit" command for FIT image
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I09f936cf5cefb0b9f2334a6590b5dfb4d85151a3

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 39c1df16c6..8f2c07f755 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -804,6 +804,15 @@ config CMD_ANDROID_AB_SELECT
 	  is used by the new A/B update model where one slot is updated in the
 	  background while running from the other slot.
 
+config CMD_BOOT_FIT
+	bool "boot_fit"
+	default n
+	depends on ROCKCHIP_FIT_IMAGE
+	help
+	  Performs the FIT boot flow, loading the appropriate FIT image from
+	  boot/recovery partition containing kernel/fdt/ramdisk images.
+	  Additional that, the IH_TYPE_MULTI can be used for resource file.
+
 config CMD_BOOT_ROCKCHIP
 	bool "boot_rockchip"
 	default n
diff --git a/cmd/Makefile b/cmd/Makefile
index 26b9aeddfc..aeb681982e 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -25,6 +25,7 @@ obj-$(CONFIG_CMD_BEDBUG) += bedbug.o
 obj-$(CONFIG_CMD_BLOCK_CACHE) += blkcache.o
 obj-$(CONFIG_CMD_BMP) += bmp.o
 obj-$(CONFIG_CMD_BOOT_ANDROID) += boot_android.o android.o
+obj-$(CONFIG_CMD_BOOT_FIT) += bootfit.o
 obj-$(CONFIG_CMD_BOOT_ROCKCHIP) += bootrkp.o
 obj-$(CONFIG_CMD_BOOTEFI) += bootefi.o
 obj-$(CONFIG_CMD_BOOTMENU) += bootmenu.o
@@ -170,6 +171,7 @@ obj-$(CONFIG_CMD_DVFS) += dvfs.o
 obj-$(CONFIG_CMD_BLOB) += blob.o
 
 obj-$(CONFIG_ARCH_ROCKCHIP) += rkimgtest.o
+
 endif # !CONFIG_SPL_BUILD
 
 # core command
diff --git a/cmd/bootfit.c b/cmd/bootfit.c
new file mode 100644
index 0000000000..8bbf8b114a
--- /dev/null
+++ b/cmd/bootfit.c
@@ -0,0 +1,116 @@
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <bootm.h>
+#include <boot_rkimg.h>
+#include <image.h>
+#include <malloc.h>
+#include <sysmem.h>
+#include <asm/arch/fit.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static void *do_boot_fit_storage(ulong *size)
+{
+	return fit_image_load_bootables(size);
+}
+
+static void *do_boot_fit_ram(char *const argv[], ulong *data_size)
+{
+	void *fit;
+	int size;
+
+	fit = (void *)simple_strtoul(argv[1], NULL, 16);
+	if (!fit || fdt_check_header(fit)) {
+		FIT_I("Invalid header\n");
+		return NULL;
+	}
+
+	size = fit_image_get_bootable_size(fit);
+	if (!size) {
+		FIT_I("Failed to get bootable image size\n");
+		return NULL;
+	}
+
+	/* reserve this full FIT image */
+	if (!sysmem_alloc_base(MEM_FIT_USER,
+			       (phys_addr_t)fit, ALIGN(size, 512)))
+		return NULL;
+
+	*data_size = size;
+
+	return fit;
+}
+
+/*
+ * argc == 1:
+ *	FIT image is loaded from storage(eg. CONFIG_BOOTCOMMAND).
+ *
+ * argc == 2:
+ *	FIT image is already in ram, the booflow is:
+ *		CLI cmd "bootm <fit_addr>" => do_bootm() =>
+ *		board_do_bootm() => boot_fit <fit_addr>
+ */
+static int do_boot_fit(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+{
+	char *bootm_args[1];
+	char fit_addr[12];
+	ulong size;
+	void *fit;
+	int ret;
+
+	if (argc > 2)
+		return CMD_RET_USAGE;
+
+	printf("## Booting FIT Image ");
+
+	if (argc == 1)
+		fit = do_boot_fit_storage(&size);
+	else
+		fit = do_boot_fit_ram(argv, &size);
+
+	if (!fit) {
+		FIT_I("No FIT image\n");
+		return -EBADF;
+	}
+
+	if (fdt_check_header(fit)) {
+		FIT_I("Invalid FIT format\n");
+		return -EBADF;
+	}
+
+	/* reserve memory to avoid memory overlap and fixup entry & load !! */
+	if (fit_image_fixup_and_sysmem_rsv(fit))
+		return -ENOMEM;
+
+	env_set("bootm-no-reloc", "y");
+	snprintf(fit_addr, sizeof(fit_addr), "0x%lx", (ulong)fit);
+	bootm_args[0] = fit_addr;
+
+	printf("at %s with size 0x%08lx\n", fit_addr, size);
+
+	ret = do_bootm_states(NULL, 0, ARRAY_SIZE(bootm_args), bootm_args,
+		BOOTM_STATE_START |
+		BOOTM_STATE_FINDOS | BOOTM_STATE_FINDOTHER |
+		BOOTM_STATE_LOADOS |
+#ifdef CONFIG_SYS_BOOT_RAMDISK_HIGH
+		BOOTM_STATE_RAMDISK |
+#endif
+		BOOTM_STATE_OS_PREP | BOOTM_STATE_OS_FAKE_GO |
+		BOOTM_STATE_OS_GO, &images, 1);
+
+	if (ret && argc != 1)
+		fit_sysmem_free_each(fit);
+
+	return ret;
+}
+
+U_BOOT_CMD(
+	boot_fit,  2,     1,      do_boot_fit,
+	"Boot FIT Image from memory or boot/recovery partition",
+	"boot_fit [addr]"
+);

commit c5b239549220da9e68b83cccb97a31cb6b23448e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Feb 23 17:29:20 2020 +0800

    rockchip: support read kernel from fit and uimage
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If77ffadc81bb3a53789d74f3185aa6f1650ee0e7

diff --git a/arch/arm/mach-rockchip/boot_rkimg.c b/arch/arm/mach-rockchip/boot_rkimg.c
index 60f104f0cf..a2fec12269 100644
--- a/arch/arm/mach-rockchip/boot_rkimg.c
+++ b/arch/arm/mach-rockchip/boot_rkimg.c
@@ -23,9 +23,11 @@
 #include <sysmem.h>
 #include <asm/io.h>
 #include <asm/arch/boot_mode.h>
+#include <asm/arch/fit.h>
 #include <asm/arch/hotkey.h>
 #include <asm/arch/param.h>
 #include <asm/arch/resource_img.h>
+#include <asm/arch/uimage.h>
 #include <dm/ofnode.h>
 #include <linux/list.h>
 #include <u-boot/sha1.h>
@@ -457,6 +459,18 @@ int rockchip_read_dtb_file(void *fdt_addr)
 	u32 size;
 	int ret = -1;
 
+#ifdef CONFIG_ROCKCHIP_FIT_IMAGE
+	if (ret) {
+		hash_size = 0;
+		ret = rockchip_read_fit_dtb(fdt_addr, &hash, &hash_size);
+	}
+#endif
+#ifdef CONFIG_ROCKCHIP_UIMAGE
+	if (ret) {
+		hash_size = 0;
+		ret = rockchip_read_uimage_dtb(fdt_addr, &hash, &hash_size);
+	}
+#endif
 #ifdef CONFIG_ROCKCHIP_EARLY_DISTRO_DTB
 	if (ret) {
 		hash_size = 0;
@@ -469,7 +483,6 @@ int rockchip_read_dtb_file(void *fdt_addr)
 		ret = rockchip_read_resource_dtb(fdt_addr, &hash, &hash_size);
 	}
 #endif
-
 	if (ret) {
 		printf("Failed to load DTB\n");
 		return ret;

commit 191c6877bc2c34943c87c38b49db535799301613
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Feb 7 12:03:32 2020 +0800

    rockchip: add basic uimage code
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Idaf6d9e1888fde4e750435a0484636945442cbe2

diff --git a/arch/arm/include/asm/arch-rockchip/uimage.h b/arch/arm/include/asm/arch-rockchip/uimage.h
new file mode 100644
index 0000000000..a95090bffc
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/uimage.h
@@ -0,0 +1,18 @@
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __ROCKCHIP_UIMAGE_H_
+#define __ROCKCHIP_UIMAGE_H_
+
+#define UIMG_I(fmt, args...)	printf("uImage: "fmt, ##args)
+
+void *uimage_load_bootables(void);
+int uimage_sysmem_free_each(image_header_t *img);
+int uimage_sysmem_reserve_each(image_header_t *hdr);
+int rockchip_read_uimage_dtb(void *fdt_addr, char **hash, int *hash_size);
+
+#endif
+
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 18b2d05cd8..f78d27c3a9 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -592,6 +592,14 @@ config ROCKCHIP_FIT_IMAGE
 	help
 	  This enables loading dtb from fit image.
 
+config ROCKCHIP_UIMAGE
+	bool "Enable support for legacy uImage"
+	depends on !FIT_SIGNATURE && USING_KERNEL_DTB
+	select CMD_BOOT_UIMAGE
+	default n
+	help
+	  This enables loading dtb from uImage image.
+
 config ROCKCHIP_EARLY_DISTRO_DTB
 	bool "Enable support for distro dtb early"
 	depends on DISTRO_DEFAULTS && USING_KERNEL_DTB && CMD_FS_GENERIC
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index a7a200c4dd..32c50e65d9 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -30,6 +30,7 @@ obj-y += hotkey.o
 
 obj-$(CONFIG_USING_KERNEL_DTB) += kernel_dtb.o
 obj-$(CONFIG_ROCKCHIP_FIT_IMAGE) += fit.o
+obj-$(CONFIG_ROCKCHIP_UIMAGE) += uimage.o
 obj-$(CONFIG_ROCKCHIP_SMCCC) += rockchip_smccc.o
 obj-$(CONFIG_ROCKCHIP_VENDOR_PARTITION) += vendor.o
 obj-$(CONFIG_ROCKCHIP_RESOURCE_IMAGE) += resource_img.o
diff --git a/arch/arm/mach-rockchip/uimage.c b/arch/arm/mach-rockchip/uimage.c
new file mode 100644
index 0000000000..dced46f20e
--- /dev/null
+++ b/arch/arm/mach-rockchip/uimage.c
@@ -0,0 +1,257 @@
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <boot_rkimg.h>
+#include <image.h>
+#include <malloc.h>
+#include <sysmem.h>
+#include <asm/arch/resource_img.h>
+#include <asm/arch/uimage.h>
+
+static int uimage_load_one(struct blk_desc *dev_desc, disk_partition_t *part,
+			   int pos_off, int size, void *dst)
+{
+	u32 blknum, blkoff;
+	u32 unused;
+	ulong blksz;
+	void *buf;
+
+	blksz  = dev_desc->blksz;
+	blkoff = pos_off / blksz;
+	unused = pos_off - blkoff * blksz;
+	blknum = DIV_ROUND_UP(size, blksz) + !!unused;
+
+	if (!size)
+		return -EINVAL;
+
+	if (!IS_ALIGNED(unused, ARCH_DMA_MINALIGN)) {
+		buf = memalign(ARCH_DMA_MINALIGN, blknum * blksz);
+		if (!buf)
+			return -ENOMEM;
+
+		if (blk_dread(dev_desc, part->start + blkoff,
+			      blknum, buf) != blknum) {
+			free(buf);
+			return -EIO;
+		}
+
+		memcpy(dst, buf + unused, size);
+		free(buf);
+	} else {
+		if (blk_dread(dev_desc, part->start + blkoff,
+		      blknum, (void *)((ulong)dst - unused)) != blknum)
+			return -EIO;
+	}
+
+	return 0;
+}
+
+static image_header_t *uimage_get_hdr(struct blk_desc *dev_desc,
+				      disk_partition_t *part)
+{
+	image_header_t *hdr;
+
+	hdr = memalign(ARCH_DMA_MINALIGN, RK_BLK_SIZE);
+	if (!hdr)
+		return NULL;
+
+	if (blk_dread(dev_desc, part->start, 1, hdr) != 1)
+		goto err;
+
+	if (!image_check_magic(hdr) || (image_get_type(hdr) != IH_TYPE_MULTI))
+		goto err;
+
+	return hdr;
+err:
+	free(hdr);
+	return NULL;
+}
+
+void *uimage_load_bootables(void)
+{
+	struct blk_desc *dev_desc;
+	disk_partition_t part;
+	image_header_t *hdr;
+	char *part_name;
+	ulong raddr;
+	ulong kaddr;
+	ulong faddr;
+	int blknum;
+
+	raddr = env_get_ulong("ramdisk_addr_r", 16, 0);
+	kaddr = env_get_ulong("kernel_addr_r", 16, 0);
+	faddr = env_get_ulong("fdt_addr_r", 16, 0);
+
+	if (!faddr || !kaddr || !raddr)
+		return NULL;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		UIMG_I("No dev_desc\n");
+		return NULL;
+	}
+
+	if (rockchip_get_boot_mode() == BOOT_MODE_RECOVERY)
+		part_name = PART_RECOVERY;
+	else
+		part_name = PART_BOOT;
+
+	if (part_get_info_by_name(dev_desc, part_name, &part) < 0) {
+		UIMG_I("No %s partition\n", part_name);
+		return NULL;
+	}
+
+	hdr = uimage_get_hdr(dev_desc, &part);
+	if (!hdr)
+		return NULL;
+
+	/* load */
+	blknum = DIV_ROUND_UP(image_get_image_size(hdr), dev_desc->blksz);
+	hdr = sysmem_alloc(MEM_UIMAGE, blknum * dev_desc->blksz);
+	if (!hdr)
+		return NULL;
+
+	if (blk_dread(dev_desc, part.start, blknum, (void *)hdr) != blknum) {
+		UIMG_I("Failed to read %s data\n", part.name);
+		return NULL;
+	}
+
+	return hdr;
+}
+
+int uimage_sysmem_reserve_each(image_header_t *hdr)
+{
+	ulong raddr, kaddr, faddr;
+	ulong data, size;
+	int blknum;
+	int blksz = RK_BLK_SIZE;
+
+	raddr = env_get_ulong("ramdisk_addr_r", 16, 0);
+	kaddr = env_get_ulong("kernel_addr_r", 16, 0);
+	faddr = env_get_ulong("fdt_addr_r", 16, 0);
+
+	if (!faddr || !kaddr || !raddr)
+		return -EINVAL;
+
+	/* kernel */
+	image_multi_getimg(hdr, 0, &data, &size);
+	blknum = DIV_ROUND_UP(size, blksz);
+	if (!sysmem_alloc_base(MEM_KERNEL, (phys_addr_t)kaddr,
+			       blknum * blksz))
+		return -ENOMEM;
+
+	/* ramdisk */
+	image_multi_getimg(hdr, 1, &data, &size);
+	blknum = DIV_ROUND_UP(size, blksz);
+	if (!sysmem_alloc_base(MEM_RAMDISK, (phys_addr_t)raddr,
+			       blknum * blksz))
+		return -ENOMEM;
+
+	/* fdt */
+	image_multi_getimg(hdr, 2, &data, &size);
+	blknum = DIV_ROUND_UP(size, blksz);
+	if (!sysmem_alloc_base(MEM_FDT, (phys_addr_t)faddr,
+			       blknum * blksz))
+		return -ENOMEM;
+
+	env_set_hex("fdt_high", faddr);
+	env_set_hex("initrd_high", raddr);
+	env_set("bootm-reloc-at", "y");
+
+	return 0;
+}
+
+int uimage_sysmem_free_each(image_header_t *img)
+{
+	ulong raddr, kaddr, faddr;
+
+	raddr = env_get_ulong("ramdisk_addr_r", 16, 0);
+	kaddr = env_get_ulong("kernel_addr_r", 16, 0);
+	faddr = env_get_ulong("fdt_addr_r", 16, 0);
+
+	sysmem_free((phys_addr_t)img);
+	sysmem_free((phys_addr_t)raddr);
+	sysmem_free((phys_addr_t)kaddr);
+	sysmem_free((phys_addr_t)faddr);
+
+	return 0;
+}
+
+int rockchip_read_uimage_dtb(void *fdt_addr, char **hash, int *hash_size)
+{
+	struct blk_desc *dev_desc;
+	disk_partition_t part;
+	image_header_t *hdr;
+	char *part_name;
+	ulong data, offset;
+	ulong size;
+#ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
+	ulong dst;
+	int idx = 3;
+#else
+	int idx = 2;
+#endif
+	int ret;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("No dev_desc!\n");
+		return ENODEV;
+	}
+
+	if (rockchip_get_boot_mode() == BOOT_MODE_RECOVERY)
+		part_name = PART_RECOVERY;
+	else
+		part_name = PART_BOOT;
+
+	if (part_get_info_by_name(dev_desc, part_name, &part) < 0) {
+		UIMG_I("No %s partition\n", part_name);
+		return -ENODEV;
+	}
+
+	hdr = uimage_get_hdr(dev_desc, &part);
+	if (!hdr)
+		return -ENODEV;
+
+	image_multi_getimg(hdr, idx, &data, &size);
+	offset = data - (ulong)hdr;
+	free(hdr);
+
+#ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
+	/* reserve enough space before fdt */
+	dst = (ulong)fdt_addr -
+		   ALIGN(size, dev_desc->blksz) - CONFIG_SYS_FDT_PAD;
+
+	ret = uimage_load_one(dev_desc, &part, offset, size, (void *)dst);
+	if (ret) {
+		UIMG_I("Failed to load resource file, ret=%d\n", ret);
+		return ret;
+	}
+
+	if (!sysmem_alloc_base(MEM_RESOURCE, (phys_addr_t)dst,
+			       ALIGN(size, RK_BLK_SIZE)))
+		return -ENOMEM;
+
+	ret = resource_create_ram_list(dev_desc, (void *)dst);
+	if (ret) {
+		UIMG_I("Failed to create resource list, ret=%d\n", ret);
+		return ret;
+	}
+
+	printf("Found DTB in uImage.%d\n", idx);
+	ret = rockchip_read_resource_dtb(fdt_addr, hash, hash_size);
+#else
+	printf("DTB(uimage.%d): rk-kernel.dtb\n", idx);
+	ret = uimage_load_one(dev_desc, &part, offset, size, fdt_addr);
+#endif
+	if (ret) {
+		UIMG_I("Failed to load fdt, ret=%d\n", ret);
+		return ret;
+	}
+
+	return 0;
+}

commit 059c50ac0b101888333ffa23872141b8a0fb4da0
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 15 15:41:56 2020 +0800

    rockchip: add basic fit image code
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ic0eaba1b625eba710fd6b30fee4e3545af59cb30

diff --git a/arch/arm/include/asm/arch-rockchip/fit.h b/arch/arm/include/asm/arch-rockchip/fit.h
new file mode 100644
index 0000000000..21bb36fd4b
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/fit.h
@@ -0,0 +1,18 @@
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __ROCKCHIP_FIT_H_
+#define __ROCKCHIP_FIT_H_
+
+#define FIT_I(fmt, args...)	printf("FIT: "fmt, ##args)
+
+void *fit_image_load_bootables(ulong *size);
+ulong fit_image_get_bootable_size(void *fit);
+int fit_sysmem_free_each(void *fit);
+int fit_image_fixup_and_sysmem_rsv(void *fit);
+int rockchip_read_fit_dtb(void *fdt_addr, char **hash, int *hash_size);
+
+#endif
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 2bbe7db58a..18b2d05cd8 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -584,6 +584,14 @@ config ROCKCHIP_USB_BOOT
 	help
 	  This enables support for rockchip U-disk boot.
 
+config ROCKCHIP_FIT_IMAGE
+	bool "Enable support for FIT image"
+	depends on FIT && USING_KERNEL_DTB
+	select CMD_BOOT_FIT
+	default n
+	help
+	  This enables loading dtb from fit image.
+
 config ROCKCHIP_EARLY_DISTRO_DTB
 	bool "Enable support for distro dtb early"
 	depends on DISTRO_DEFAULTS && USING_KERNEL_DTB && CMD_FS_GENERIC
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 15f314add0..a7a200c4dd 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -29,6 +29,7 @@ obj-y += memblk.o
 obj-y += hotkey.o
 
 obj-$(CONFIG_USING_KERNEL_DTB) += kernel_dtb.o
+obj-$(CONFIG_ROCKCHIP_FIT_IMAGE) += fit.o
 obj-$(CONFIG_ROCKCHIP_SMCCC) += rockchip_smccc.o
 obj-$(CONFIG_ROCKCHIP_VENDOR_PARTITION) += vendor.o
 obj-$(CONFIG_ROCKCHIP_RESOURCE_IMAGE) += resource_img.o
diff --git a/arch/arm/mach-rockchip/fit.c b/arch/arm/mach-rockchip/fit.c
new file mode 100644
index 0000000000..fbfda43d1a
--- /dev/null
+++ b/arch/arm/mach-rockchip/fit.c
@@ -0,0 +1,572 @@
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#include <common.h>
+#include <boot_rkimg.h>
+#include <image.h>
+#include <malloc.h>
+#include <sysmem.h>
+#include <asm/arch/fit.h>
+#include <asm/arch/resource_img.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define FIT_PLACEHOLDER_ADDR		0xffffffff
+
+/*
+ * Must use args '-E -p' for mkimage to generate FIT image, 4K as max assumption.
+ */
+#define FIT_FDT_MAX_SIZE		SZ_4K
+
+static int fit_is_ext_type(void *fit)
+{
+	return fdt_totalsize(fit) < FIT_FDT_MAX_SIZE;
+}
+
+static int fit_is_signed(void *fit, const void *sig_blob)
+{
+	return fdt_subnode_offset(sig_blob, 0, FIT_SIG_NODENAME) < 0 ? 0 : 1;
+}
+
+static int fit_is_required(void *fit, const void *sig_blob)
+{
+	int sig_node;
+	int noffset;
+
+	sig_node = fdt_subnode_offset(sig_blob, 0, FIT_SIG_NODENAME);
+	if (sig_node < 0)
+		return 0;
+
+	fdt_for_each_subnode(noffset, sig_blob, sig_node) {
+		const char *required;
+
+		required = fdt_getprop(sig_blob, noffset, "required", NULL);
+		if (required && !strcmp(required, "conf"))
+			return 1;
+	}
+
+	return 0;
+}
+
+static int fit_get_image_defconf_node(void *fit, int *images, int *defconf)
+{
+	int images_node, confs_node, defconf_node;
+	const char *def_name;
+
+	images_node = fdt_path_offset(fit, FIT_IMAGES_PATH);
+	if (images_node < 0)
+		return images_node;
+
+	confs_node = fdt_path_offset(fit, FIT_CONFS_PATH);
+	if (confs_node < 0)
+		return confs_node;
+
+	def_name = fdt_getprop(fit, confs_node, FIT_DEFAULT_PROP, NULL);
+	if (!def_name)
+		return -ENOENT;
+
+	defconf_node = fdt_subnode_offset(fit, confs_node, def_name);
+	if (defconf_node < 0)
+		return defconf_node;
+
+	*images = images_node;
+	*defconf = defconf_node;
+
+	return 0;
+}
+
+int fit_fixup_load_entry(void *fit, int images, int defconf,
+			 char *name, ulong *load, ulong new_addr)
+{
+	const char *uname;
+	int uname_cfg;
+	int err;
+
+	if ((*load != FIT_PLACEHOLDER_ADDR) ||
+		fit_is_required(fit, gd_fdt_blob()))
+		return 0;
+
+	*load = new_addr;
+
+	uname = fdt_getprop(fit, defconf, name, NULL);
+	if (!uname)
+		return -ENODEV;
+
+	uname_cfg = fdt_subnode_offset(fit, images, uname);
+	if (uname_cfg < 0)
+		return -ENODEV;
+
+	err = fit_image_set_load(fit, uname_cfg, new_addr);
+	if (err)
+		return err;
+
+	fit_image_set_entry(fit, uname_cfg, new_addr);
+
+	return 0;
+}
+
+static int fit_get_load_and_data(void *fit, int images, int defconf,
+				 const char *name, ulong *load,
+				 int *offset, int *size)
+{
+	const char *uname;
+	int uname_cfg;
+	int off, sz;
+	int err;
+
+	uname = fdt_getprop(fit, defconf, name, NULL);
+	if (!uname)
+		return -ENODEV;
+
+	uname_cfg = fdt_subnode_offset(fit, images, uname);
+	if (uname_cfg < 0)
+		return -ENODEV;
+
+	err = fit_image_get_data_size(fit, uname_cfg, &sz);
+	if (err)
+		return err;
+
+	err = fit_image_get_data_position(fit, uname_cfg, &off);
+	if (!err) {
+		off -= fdt_totalsize(fit);
+	} else {
+		err = fit_image_get_data_offset(fit, uname_cfg, &off);
+		if (err)
+			return err;
+	}
+
+	/* optional */
+	if (load) {
+		err = fit_image_get_load(fit, uname_cfg, load);
+		if (err)
+			return err;
+	}
+
+	*offset = off;
+	*size = sz;
+
+	return 0;
+}
+
+int fit_image_fixup_and_sysmem_rsv(void *fit)
+{
+	ulong load, kaddr, faddr, raddr;
+	int images, defconf;
+	int offset, size;
+	int err;
+
+	faddr = env_get_ulong("fdt_addr_r", 16, 0);
+	kaddr = env_get_ulong("kernel_addr_r", 16, 0);
+	raddr = env_get_ulong("ramdisk_addr_r", 16, 0);
+
+	if (!faddr || !kaddr || !raddr)
+		return -EINVAL;
+
+	if (fit_get_image_defconf_node(fit, &images, &defconf)) {
+		FIT_I("Failed to get default config\n");
+		return -ENODEV;
+	}
+
+	/* fdt */
+	if (fit_get_load_and_data(fit, images, defconf, FIT_FDT_PROP,
+				  &load, &offset, &size)) {
+		FIT_I("Invalid fdt node\n");
+		return -ENOENT;
+	}
+
+#ifdef CONFIG_USING_KERNEL_DTB
+	sysmem_free((phys_addr_t)gd->fdt_blob);
+#endif
+	if (fit_fixup_load_entry(fit, images, defconf,
+				 FIT_FDT_PROP, &load, faddr)) {
+		FIT_I("Failed to fixup fdt load addr\n");
+		return -EINVAL;
+	}
+
+	if (!sysmem_alloc_base(MEM_FDT, (phys_addr_t)load,
+			       ALIGN(size, RK_BLK_SIZE)))
+		return -ENOMEM;
+
+	/* kernel */
+	if (fit_get_load_and_data(fit, images, defconf, FIT_KERNEL_PROP,
+				  &load, &offset, &size)) {
+		FIT_I("Invalid kernel node\n");
+		return -EINVAL;
+	}
+
+	if (fit_fixup_load_entry(fit, images, defconf,
+				 FIT_KERNEL_PROP, &load, kaddr)) {
+		FIT_I("Failed to fixup kernel load addr\n");
+		return -EINVAL;
+	}
+
+	if (!sysmem_alloc_base(MEM_KERNEL, (phys_addr_t)load,
+			       ALIGN(size, RK_BLK_SIZE)))
+		return -ENOMEM;
+
+	/* ramdisk(optional) */
+	err = fit_get_load_and_data(fit, images, defconf, FIT_RAMDISK_PROP,
+				    &load, &offset, &size);
+	if (err && err != -ENODEV) {
+		FIT_I("Invalid ramdisk node\n");
+		return err;
+	}
+
+	if (size) {
+		if (fit_fixup_load_entry(fit, images, defconf,
+					 FIT_RAMDISK_PROP, &load, raddr)) {
+			FIT_I("Failed to fixup ramdisk load addr\n");
+			return -EINVAL;
+		}
+
+		if (!sysmem_alloc_base(MEM_RAMDISK, (phys_addr_t)load,
+				       ALIGN(size, RK_BLK_SIZE)))
+			return -ENOMEM;
+	}
+
+	return 0;
+}
+
+int fit_sysmem_free_each(void *fit)
+{
+	ulong raddr, kaddr, faddr;
+
+	raddr = env_get_ulong("ramdisk_addr_r", 16, 0);
+	kaddr = env_get_ulong("kernel_addr_r", 16, 0);
+	faddr = env_get_ulong("fdt_addr_r", 16, 0);
+
+	sysmem_free((phys_addr_t)fit);
+	sysmem_free((phys_addr_t)raddr);
+	sysmem_free((phys_addr_t)kaddr);
+	sysmem_free((phys_addr_t)faddr);
+
+	return 0;
+}
+
+static int fit_image_load_one(void *fit, struct blk_desc *dev_desc,
+			      disk_partition_t *part, int images,
+			      int defconf, char *name, void *dst)
+{
+	u32 blknum, blkoff;
+	int offset, size;
+
+	if (fit_get_load_and_data(fit, images, defconf, name,
+				  NULL, &offset, &size))
+		return -EINVAL;
+
+	blkoff = (FIT_ALIGN(fdt_totalsize(fit)) + offset) / dev_desc->blksz;
+	blknum = DIV_ROUND_UP(size, dev_desc->blksz);
+
+	if (blk_dread(dev_desc, part->start + blkoff, blknum, dst) != blknum)
+		return -EIO;
+
+	return 0;
+}
+
+static int fit_image_load_fdt(void *fit, struct blk_desc *dev_desc,
+			      disk_partition_t *part, int images,
+			      int defconf, void *dst)
+{
+	return fit_image_load_one(fit, dev_desc, part, images,
+				  defconf, FIT_FDT_PROP, dst);
+}
+
+#ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
+static int fit_image_load_resource(void *fit, struct blk_desc *dev_desc,
+				   disk_partition_t *part, int images,
+				   int defconf, ulong *addr)
+{
+	ulong fdt_addr_r, dst;
+	int offset, size;
+	int err;
+
+	err = fit_get_load_and_data(fit, images, defconf, FIT_MULTI_PROP,
+				    NULL, &offset, &size);
+	if (err)
+		return err;
+
+	fdt_addr_r = env_get_ulong("fdt_addr_r", 16, 0);
+	if (!fdt_addr_r)
+		return -EINVAL;
+
+	/* reserve enough space before fdt */
+	dst = fdt_addr_r -
+		ALIGN(size, dev_desc->blksz) - CONFIG_SYS_FDT_PAD;
+
+	if (!sysmem_alloc_base(MEM_RESOURCE, (phys_addr_t)dst,
+			       ALIGN(size, dev_desc->blksz)))
+		return -ENOMEM;
+
+	*addr = dst;
+
+	return fit_image_load_one(fit, dev_desc, part, images, defconf,
+				  FIT_MULTI_PROP, (void *)dst);
+}
+#endif
+
+static void *fit_get_blob(struct blk_desc *dev_desc, disk_partition_t *part)
+{
+	void *fit, *fdt;
+	int blknum;
+
+	blknum = DIV_ROUND_UP(sizeof(struct fdt_header), dev_desc->blksz);
+	fdt = memalign(ARCH_DMA_MINALIGN, blknum * dev_desc->blksz);
+	if (!fdt)
+		return NULL;
+
+	if (blk_dread(dev_desc, part->start, blknum, fdt) != blknum) {
+		FIT_I("Failed to read fdt header\n");
+		goto fail;
+	}
+
+	if (fdt_check_header(fdt)) {
+		FIT_I("Invalid fdt header\n");
+		goto fail;
+	}
+
+	if (!fit_is_ext_type(fdt)) {
+		FIT_I("Not external type\n");
+		goto fail;
+	}
+
+	blknum = DIV_ROUND_UP(fdt_totalsize(fdt), dev_desc->blksz);
+	fit = memalign(ARCH_DMA_MINALIGN, blknum * dev_desc->blksz);
+	if (!fit) {
+		FIT_I("No memory\n");
+		goto fail;
+	}
+
+	if (blk_dread(dev_desc, part->start, blknum, fit) != blknum) {
+		free(fit);
+		FIT_I("Failed to read fit\n");
+		goto fail;
+	}
+
+	return fit;
+
+fail:
+	free(fdt);
+	return NULL;
+}
+
+static int fit_image_get_fdt_hash(void *fit, int images, int defconf,
+				  char **hash, int *hash_size)
+{
+	const char *fdt_name;
+	const char *name;
+	uint8_t *fit_value2;
+	uint8_t *fit_value;
+	int fit_value_len;
+	int hash_off;
+	int fdt_off;
+	int found = 0;
+	char *algo;
+
+	fdt_name = fdt_getprop(fit, defconf, FIT_FDT_PROP, NULL);
+	if (!fdt_name)
+		return -EBADF;
+
+	fdt_off = fdt_subnode_offset(fit, images, fdt_name);
+	if (fdt_off < 0)
+		return -EBADF;
+
+	fdt_for_each_subnode(hash_off, fit, fdt_off) {
+		name = fit_get_name(fit, hash_off, NULL);
+		if (!strncmp(name, FIT_HASH_NODENAME,
+			     strlen(FIT_HASH_NODENAME))) {
+			found = 1;
+			break;
+		}
+	}
+
+	if (!found)
+		return -ENODEV;
+
+	if (fit_image_hash_get_algo(fit, hash_off, &algo))
+		return -EINVAL;
+
+	if (fit_image_hash_get_value(fit, hash_off, &fit_value,
+				     &fit_value_len))
+		return -EINVAL;
+
+	if (!strcmp(algo, "sha1"))
+		*hash_size = 20;
+	else if (!strcmp(algo, "sha256"))
+		*hash_size = 32;
+	else
+		return -EINVAL;
+
+	/* avoid freed */
+	fit_value2 = malloc(fit_value_len);
+	if (!fit_value2)
+		return -ENOMEM;
+
+	memcpy(fit_value2, fit_value, fit_value_len);
+	*hash = (char *)fit_value2;
+
+	return 0;
+}
+
+ulong fit_image_get_bootable_size(void *fit)
+{
+	ulong off[3] = { 0, 0, 0 };
+	ulong max_off, load;
+	int images, defconf;
+	int offset, size;
+
+	if (fit_get_image_defconf_node(fit, &images, &defconf))
+		return -ENODEV;
+
+	if (!fit_get_load_and_data(fit, images, defconf, FIT_FDT_PROP,
+				   &load, &offset, &size))
+		off[0] = offset + FIT_ALIGN(size);
+
+	if (!fit_get_load_and_data(fit, images, defconf, FIT_KERNEL_PROP,
+				   &load, &offset, &size))
+		off[1] = offset + FIT_ALIGN(size);
+
+	if (!fit_get_load_and_data(fit, images, defconf, FIT_RAMDISK_PROP,
+				   &load, &offset, &size))
+		off[2] = offset + FIT_ALIGN(size);
+
+	max_off = max(off[0],  off[1]);
+	max_off = max(max_off, off[2]);
+
+	return FIT_ALIGN(fdt_totalsize(fit)) + max_off;
+}
+
+void *fit_image_load_bootables(ulong *size)
+{
+	struct blk_desc *dev_desc;
+	disk_partition_t part;
+	char *part_name;
+	int blknum;
+	void *fit;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		FIT_I("No dev_desc\n");
+		return NULL;
+	}
+
+	if (rockchip_get_boot_mode() == BOOT_MODE_RECOVERY)
+		part_name = PART_RECOVERY;
+	else
+		part_name = PART_BOOT;
+
+	if (part_get_info_by_name(dev_desc, part_name, &part) < 0) {
+		FIT_I("No %s partition\n", part_name);
+		return NULL;
+	}
+
+	fit = fit_get_blob(dev_desc, &part);
+	if (!fit) {
+		FIT_I("No fit blob\n");
+		return NULL;
+	}
+
+	*size = fit_image_get_bootable_size(fit);
+	if (*size == 0) {
+		FIT_I("No bootable image size\n");
+		return NULL;
+	}
+
+	blknum = DIV_ROUND_UP(*size, dev_desc->blksz);
+	fit = sysmem_alloc(MEM_FIT, blknum * dev_desc->blksz);
+	if (!fit)
+		return NULL;
+
+	if (blk_dread(dev_desc, part.start, blknum, fit) != blknum) {
+		FIT_I("Failed to load bootable images\n");
+		return NULL;
+	}
+
+	return fit;
+}
+
+static void verbose_msg(void *fit, int defconf)
+{
+	FIT_I("%ssigned, %srequired\n",
+	      fit_is_signed(fit, gd_fdt_blob()) ? "" : "no ",
+	      fit_is_required(fit, gd_fdt_blob()) ? "" : "no ");
+
+	printf("DTB: %s\n",
+	       (char *)fdt_getprop(fit, defconf, FIT_FDT_PROP, NULL));
+}
+
+int rockchip_read_fit_dtb(void *fdt_addr, char **hash, int *hash_size)
+{
+	struct blk_desc *dev_desc;
+	disk_partition_t part;
+	char *part_name;
+	void *fit;
+	ulong rsce;
+	int images;
+	int defconf;
+	int err;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		FIT_I("No dev_desc!\n");
+		return -ENODEV;
+	}
+
+	if (rockchip_get_boot_mode() == BOOT_MODE_RECOVERY)
+		part_name = PART_RECOVERY;
+	else
+		part_name = PART_BOOT;
+
+	err = part_get_info_by_name(dev_desc, part_name, &part);
+	if (err < 0) {
+		FIT_I("No %s partition\n", part_name);
+		return err;
+	}
+
+	fit = fit_get_blob(dev_desc, &part);
+	if (!fit) {
+		FIT_I("No fdt description\n");
+		return -EINVAL;
+	}
+
+	if (fit_get_image_defconf_node(fit, &images, &defconf)) {
+		FIT_I("Failed to get /images and /configures default\n");
+		err = -ENODEV;
+		goto out;
+	}
+
+	if (fit_image_load_fdt(fit, dev_desc, &part,
+			       images, defconf, fdt_addr)) {
+		FIT_I("Failed to load fdt\n");
+		err = -EINVAL;
+		goto out;
+	}
+
+	err = fit_image_get_fdt_hash(fit, images, defconf, hash, hash_size);
+	if (err && err != -ENODEV) {
+		FIT_I("Failed to get fdt hash\n");
+		err = -EINVAL;
+		goto out;
+	}
+
+	verbose_msg(fit, defconf);
+
+	/* load resource file */
+#ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
+	err = fit_image_load_resource(fit, dev_desc, &part,
+				      images, defconf, &rsce);
+	if (!err) {
+		if (resource_create_ram_list(dev_desc, (void *)rsce))
+			FIT_I("Failed to create resource list\n");
+	} else if (err == -ENODEV) {
+		FIT_I("No resource file\n");
+	} else {
+		FIT_I("Failed to load resource file\n");
+	}
+#endif
+out:
+	free(fit);
+
+	return err;
+}

commit 2d7c136f035ceee54a93456fd382e64fca0edf49
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Fri Mar 13 11:43:30 2020 +0800

    drm/rockchip: add support one crtc multi connector pattern
    
    some rockchip Soc platform just like rk3368, only have one crtc and
    multi connector, we must consider the following pattern:
    1. only connect lcd panel
      -> show logo at lcd panel
    2. connect lcd panel and hdmi, and the resolution is different
      -> show uboot logo at mipi panel
         -> show kernel logo at mipi panel
           -> show android logo at hdmi panel
    3. connect lcd panel and hdmi, and the solution is same.
      -> show logo at lcd panel and hdmi panel at the same time,the path is:
         crtc -> hdmi->hdmi panel
             |-> mipi/edp/... -> lcd panel
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: I7fb8452ddd128ba70ba18f288500e71c1f03ca8b

diff --git a/drivers/video/drm/rockchip_crtc.h b/drivers/video/drm/rockchip_crtc.h
index 75edb4c16f..4727d58740 100644
--- a/drivers/video/drm/rockchip_crtc.h
+++ b/drivers/video/drm/rockchip_crtc.h
@@ -10,7 +10,9 @@
 struct rockchip_crtc {
 	const struct rockchip_crtc_funcs *funcs;
 	const void *data;
-	bool hdmi_hpd;
+	struct drm_display_mode active_mode;
+	bool hdmi_hpd : 1;
+	bool active : 1;
 };
 
 struct rockchip_crtc_funcs {
diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index c553f59fc9..6280554567 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -540,6 +540,18 @@ static int display_init(struct display_state *state)
 		return -ENXIO;
 	}
 
+	if (crtc_state->crtc->active &&
+	    memcmp(&crtc_state->crtc->active_mode, &conn_state->mode,
+		   sizeof(struct drm_display_mode))) {
+		printf("%s has been used for output type: %d, mode: %dx%dp%d\n",
+			crtc_state->dev->name,
+			crtc_state->crtc->active_mode.type,
+			crtc_state->crtc->active_mode.hdisplay,
+			crtc_state->crtc->active_mode.vdisplay,
+			crtc_state->crtc->active_mode.vrefresh);
+		return -ENODEV;
+	}
+
 	if (panel_state->panel)
 		rockchip_panel_init(panel_state->panel);
 
@@ -614,6 +626,10 @@ static int display_init(struct display_state *state)
 	}
 	state->is_init = 1;
 
+	crtc_state->crtc->active = true;
+	memcpy(&crtc_state->crtc->active_mode,
+	       &conn_state->mode, sizeof(struct drm_display_mode));
+
 	return 0;
 
 deinit:
@@ -753,10 +769,10 @@ static int display_logo(struct display_state *state)
 	struct crtc_state *crtc_state = &state->crtc_state;
 	struct connector_state *conn_state = &state->conn_state;
 	struct logo_info *logo = &state->logo;
-	int hdisplay, vdisplay;
+	int hdisplay, vdisplay, ret;
 
-	display_init(state);
-	if (!state->is_init)
+	ret = display_init(state);
+	if (!state->is_init || ret)
 		return -ENODEV;
 
 	switch (logo->bpp) {

commit 4927c43eb771dcc2e3f407c57cf099a804b519fe
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Fri Mar 13 11:12:10 2020 +0800

    drm/rockchip: delete unused and repeated call
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: I281e4fe6834273a10b7c289128173aff32ec4125

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 8b6ebad552..c553f59fc9 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -670,8 +670,6 @@ static int display_enable(struct display_state *state)
 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
 	struct panel_state *panel_state = &state->panel_state;
 
-	display_init(state);
-
 	if (!state->is_init)
 		return -EINVAL;
 

commit ebe917bdf995a485b6e61132eb2a1e137ee2c769
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 7 14:50:17 2020 +0800

    dm: serial: hide and present pinctrl prop in live device tree
    
    1. We bind all serial nodes including UART debug node from kernel dtb.
    2. On some rockchip platforms, UART debug and SDMMC pin are multiplex.
       Without this, iomux is switched from SDMMC => UART debug at this time.
    3. We may switch to UART debug iomux after SDMMC boot failed to print log.
    
    fixes: (503458d core: device: allow serial node bind from kernel dtb)
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I286ad49f6c5a7e083d205560a4a16e16ded6b83f

diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c
index ec90dbcde1..c397356125 100644
--- a/drivers/serial/serial-uclass.c
+++ b/drivers/serial/serial-uclass.c
@@ -15,6 +15,7 @@
 #include <dm/lists.h>
 #include <dm/device-internal.h>
 #include <dm/of_access.h>
+#include <dm/uclass-internal.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -87,10 +88,69 @@ static int serial_check_stdout(const void *blob, struct udevice **devp)
 	return -ENODEV;
 }
 
+#ifdef CONFIG_OF_LIVE
+/*
+ * Hide and present pinctrl prop int live device tree
+ *
+ * 1. We bind all serial nodes including UART debug node from kernel dtb.
+ *
+ * 2. On some rockchip platforms, UART debug and SDMMC pin are multiplex.
+ *    Without this, iomux is switched from SDMMC => UART debug at this time.
+ *
+ * 3. We may switch to UART debug iomux after SDMMC boot failed to print log
+ *    by console record mechanism.
+ */
+static void serial_console_hide_prop(char **p1, char **p2)
+{
+	struct udevice *dev;
+
+	if (!of_live_active())
+		return;
+
+	for (uclass_find_first_device(UCLASS_SERIAL, &dev);
+	     dev;
+	     uclass_find_next_device(&dev)) {
+		if (dev_read_bool(dev, "u-boot,dm-pre-reloc") ||
+		    dev_read_bool(dev, "u-boot,dm-spl"))
+			continue;
+
+		if (gd->cur_serial_dev->req_seq == dev->req_seq) {
+			*p1 = (char *)dev_hide_prop(dev, "pinctrl-names");
+			*p2 = (char *)dev_hide_prop(dev, "pinctrl-0");
+		}
+	}
+}
+
+static void serial_console_present_prop(char *p1, char *p2)
+{
+	struct udevice *dev;
+
+	if (!of_live_active() || !p1 || !p2)
+		return;
+
+	for (uclass_find_first_device(UCLASS_SERIAL, &dev);
+	     dev;
+	     uclass_find_next_device(&dev)) {
+		if (dev_read_bool(dev, "u-boot,dm-pre-reloc") ||
+		    dev_read_bool(dev, "u-boot,dm-spl"))
+			continue;
+
+		if (gd->cur_serial_dev->req_seq == dev->req_seq) {
+			dev_present_prop(dev, p1);
+			dev_present_prop(dev, p2);
+		}
+	}
+}
+#else
+static inline void serial_console_hide_prop(char **p1, char **p2) {}
+static inline void serial_console_present_prop(char *p1, char *p2) {}
+#endif
+
 static void serial_find_console_or_panic(void)
 {
 	const void *blob = gd->fdt_blob;
 	struct udevice *dev;
+	char *p1 = NULL, *p2 = NULL;
 
 	if (CONFIG_IS_ENABLED(OF_PLATDATA)) {
 		uclass_first_device(UCLASS_SERIAL, &dev);
@@ -103,8 +163,10 @@ static void serial_find_console_or_panic(void)
 		if (of_live_active()) {
 			struct device_node *np = of_get_stdout();
 
+			serial_console_hide_prop(&p1, &p2);
 			if (np && !uclass_get_device_by_ofnode(UCLASS_SERIAL,
 					np_to_ofnode(np), &dev)) {
+				serial_console_present_prop(p1, p2);
 				gd->cur_serial_dev = dev;
 				return;
 			}
@@ -115,7 +177,9 @@ static void serial_find_console_or_panic(void)
 			 */
 			if (!lists_bind_fdt(gd->dm_root, np_to_ofnode(np),
 					    &dev)) {
+				serial_console_hide_prop(&p1, &p2);
 				if (!device_probe(dev)) {
+					serial_console_present_prop(p1, p2);
 					gd->cur_serial_dev = dev;
 					return;
 				}

commit 05e0f98eb3a819f013aaa5ba6d5b1c75fa8f329f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 7 14:48:28 2020 +0800

    driver: core: add dev_del_prop() api
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Id016f2f3e2d4d80a7dbd72d02a038c07b3a0de26

diff --git a/drivers/core/of_access.c b/drivers/core/of_access.c
index eee3c36e96..c8c3ab8297 100644
--- a/drivers/core/of_access.c
+++ b/drivers/core/of_access.c
@@ -29,6 +29,8 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#define PROP_HIDE_MAGIC		1
+
 /* list of struct alias_prop aliases */
 LIST_HEAD(aliases_lookup);
 
@@ -171,6 +173,40 @@ const void *of_get_property(const struct device_node *np, const char *name,
 	return pp ? pp->value : NULL;
 }
 
+const char *of_hide_property(struct device_node *np, const char *name)
+{
+	struct property *pp;
+
+	if (!np)
+		return NULL;
+
+	for (pp = np->properties; pp; pp = pp->next) {
+		if (strcmp(pp->name, name) == 0) {
+			pp->name[0] += PROP_HIDE_MAGIC;
+			return (const char *)pp->name;
+		}
+	}
+
+	return NULL;
+}
+
+int of_present_property(struct device_node *np, const char *name)
+{
+	struct property *pp;
+
+	if (!np)
+		return -FDT_ERR_NOTFOUND;
+
+	for (pp = np->properties; pp; pp = pp->next) {
+		if (strcmp(pp->name, name) == 0) {
+			pp->name[0] -= PROP_HIDE_MAGIC;
+			break;
+		}
+	}
+
+	return 0;
+}
+
 static const char *of_prop_next_string(struct property *prop, const char *cur)
 {
 	const void *curv = cur;
diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index 992dd573a2..8d10e7a97f 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -512,6 +512,24 @@ const void *ofnode_get_property(ofnode node, const char *propname, int *lenp)
 				   propname, lenp);
 }
 
+const char *ofnode_hide_property(ofnode node, const char *propname)
+{
+	if (ofnode_is_np(node))
+		return of_hide_property((struct device_node *)ofnode_to_np(node),
+					propname);
+	else
+		return NULL;
+}
+
+int ofnode_present_property(ofnode node, const char *propname)
+{
+	if (ofnode_is_np(node))
+		return of_present_property((struct device_node *)ofnode_to_np(node),
+					   propname);
+	else
+		return -ENOSYS;
+}
+
 bool ofnode_is_available(ofnode node)
 {
 	if (ofnode_is_np(node))
diff --git a/drivers/core/read.c b/drivers/core/read.c
index 2692113853..83da74c422 100644
--- a/drivers/core/read.c
+++ b/drivers/core/read.c
@@ -154,6 +154,16 @@ const void *dev_read_prop(struct udevice *dev, const char *propname, int *lenp)
 	return ofnode_get_property(dev_ofnode(dev), propname, lenp);
 }
 
+const char *dev_hide_prop(struct udevice *dev, const char *propname)
+{
+	return ofnode_hide_property(dev_ofnode(dev), propname);
+}
+
+int dev_present_prop(struct udevice *dev, const char *propname)
+{
+	return ofnode_present_property(dev_ofnode(dev), propname);
+}
+
 int dev_read_alias_seq(struct udevice *dev, int *devnump)
 {
 	ofnode node = dev_ofnode(dev);
diff --git a/include/dm/of_access.h b/include/dm/of_access.h
index 48baad5ef9..fd72340fd0 100644
--- a/include/dm/of_access.h
+++ b/include/dm/of_access.h
@@ -104,6 +104,24 @@ struct property *of_find_property(const struct device_node *np,
 const void *of_get_property(const struct device_node *np, const char *name,
 			    int *lenp);
 
+/**
+ * of_hide_property() - hide a property
+ *
+ * @np: Pointer to device node holding property
+ * @name: Name of property to hide
+ * @return hidden name if ok, otherwise NULL
+ */
+const char *of_hide_property(struct device_node *np, const char *name);
+
+/**
+ * of_present_property() - present a property hidden before
+ *
+ * @np: Pointer to device node holding property
+ * @name: Hidden name of property
+ * @return 0 if ok, otherwise failed
+ */
+int of_present_property(struct device_node *np, const char *name);
+
 /**
  * of_device_is_compatible() - Check if the node matches given constraints
  * @device: pointer to node
diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index 8a4291a6ad..27d177786b 100644
--- a/include/dm/ofnode.h
+++ b/include/dm/ofnode.h
@@ -540,6 +540,24 @@ int ofnode_decode_display_timing(ofnode node, int index,
  */
 const void *ofnode_get_property(ofnode node, const char *propname, int *lenp);
 
+/**
+ * ofnode_hide_property() - hide a property
+ *
+ * @np: Pointer to device node holding property
+ * @name: Name of property to hide
+ * @return hidden name if ok, otherwise NULL
+ */
+const char *ofnode_hide_property(ofnode node, const char *propname);
+
+/**
+ * ofnode_present_property() - present a property hidden before
+ *
+ * @np: Pointer to device node holding property
+ * @name: Hidden name of property
+ * @return 0 if ok, otherwise failed
+ */
+int ofnode_present_property(ofnode node, const char *propname);
+
 /**
  * ofnode_is_available() - check if a node is marked available
  *
diff --git a/include/dm/read.h b/include/dm/read.h
index 0a78d04815..9a5820c9de 100644
--- a/include/dm/read.h
+++ b/include/dm/read.h
@@ -319,6 +319,24 @@ int dev_read_phandle(struct udevice *dev);
  */
 const void *dev_read_prop(struct udevice *dev, const char *propname, int *lenp);
 
+/**
+ * dev_hide_prop() - hide a property
+ *
+ * @np: Pointer to device node holding property
+ * @name: Name of property to hide
+ * @return hidden name if ok, otherwise NULL
+ */
+const char *dev_hide_prop(struct udevice *dev, const char *propname);
+
+/**
+ * dev_present_prop() - present a property hidden before
+ *
+ * @np: Pointer to device node holding property
+ * @name: Hidden name of property
+ * @return 0 if ok, otherwise failed
+ */
+int dev_present_prop(struct udevice *dev, const char *propname);
+
 /**
  * dev_read_alias_seq() - Get the alias sequence number of a node
  *

commit 45390edfba72a37acf54017d3be4758e6c40f680
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Feb 7 11:59:09 2020 +0800

    rockchip: resource: optimise code
    
    - clean init_resource_list();
    - support create resource list and read file from memory
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If308c1dc6f43d0250d81cfa6fb0898d59efe8975

diff --git a/arch/arm/include/asm/arch-rockchip/resource_img.h b/arch/arm/include/asm/arch-rockchip/resource_img.h
index 5b89d323e0..4ec4ad1996 100644
--- a/arch/arm/include/asm/arch-rockchip/resource_img.h
+++ b/arch/arm/include/asm/arch-rockchip/resource_img.h
@@ -7,6 +7,25 @@
 #ifndef __RESC_IMG_H_
 #define __RESC_IMG_H_
 
+/*
+ * resource_image_check_header - check resource image header
+ *
+ * @rsce_hdr: resource file hdr
+ *
+ * return 0 on header okay, otherwise failed
+ */
+int resource_image_check_header(void *rsce_hdr);
+
+/*
+ * resource_create_ram_list - create resource file list by data from memory
+ *
+ * @dev_desc: blk dev descritpion
+ * @rsce_hdr: resource file hdr
+ *
+ * return 0 on header okay, otherwise failed
+ */
+int resource_create_ram_list(struct blk_desc *dev_desc, void *rsce_hdr);
+
 /*
  * rockchip_read_resource_file - read file from resource partition
  *
diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 889bd05a63..1b432f75a4 100644
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -9,16 +9,11 @@
 #include <android_image.h>
 #include <boot_rkimg.h>
 #include <bmp_layout.h>
-#include <crypto.h>
-#include <fs.h>
 #include <malloc.h>
-#include <sysmem.h>
 #include <asm/io.h>
 #include <asm/unaligned.h>
 #include <dm/ofnode.h>
 #include <linux/list.h>
-#include <u-boot/sha1.h>
-#include <u-boot/sha256.h>
 #include <asm/arch/resource_img.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -32,7 +27,6 @@ DECLARE_GLOBAL_DATA_PTR;
 #define ENTRY_TAG_SIZE			4
 #define MAX_FILE_NAME_LEN		220
 #define MAX_HASH_LEN			32
-
 #define DTB_FILE			"rk-kernel.dtb"
 
 /*
@@ -107,16 +101,19 @@ struct resource_file {
 	char		name[MAX_FILE_NAME_LEN];
 	char		hash[MAX_HASH_LEN];
 	uint32_t	hash_size;
-	uint32_t	f_offset;	/* Sector addr */
+	uint32_t	f_offset;	/* Sector offset */
 	uint32_t	f_size;		/* Bytes */
 	struct list_head link;
-	uint32_t	rsce_base;	/* Base addr of resource */
+	/* Sector base of resource when ram=false, byte base when ram=true */
+	uint32_t	rsce_base;
+	bool		ram;
 };
 
 static LIST_HEAD(entrys_head);
 
-static int resource_image_check_header(const struct resource_img_hdr *hdr)
+int resource_image_check_header(void *rsce_hdr)
 {
+	struct resource_img_hdr *hdr = rsce_hdr;
 	int ret;
 
 	ret = memcmp(RESOURCE_MAGIC, hdr->magic, RESOURCE_MAGIC_SIZE);
@@ -138,7 +135,8 @@ static int resource_image_check_header(const struct resource_img_hdr *hdr)
 	return ret;
 }
 
-static int add_file_to_list(struct resource_entry *entry, int rsce_base)
+static int add_file_to_list(struct resource_entry *entry,
+			    int rsce_base, bool ram)
 {
 	struct resource_file *file;
 
@@ -158,11 +156,12 @@ static int add_file_to_list(struct resource_entry *entry, int rsce_base)
 	file->f_offset = entry->f_offset;
 	file->f_size = entry->f_size;
 	file->hash_size = entry->hash_size;
+	file->ram = ram;
 	memcpy(file->hash, entry->hash, entry->hash_size);
 	list_add_tail(&file->link, &entrys_head);
 
-	debug("entry:%p  %s offset:%d size:%d\n",
-	      entry, file->name, file->f_offset, file->f_size);
+	debug("entry: %p, %18s, base: 0x%08x, offset: 0x%08x, size: 0x%08x\n",
+	      entry, file->name, file->rsce_base, file->f_offset, file->f_size);
 
 	return 0;
 }
@@ -177,7 +176,7 @@ static int replace_resource_entry(const char *f_name, uint32_t base,
 	if (!f_name || !f_size)
 		return -EINVAL;
 
-	entry = malloc(sizeof(*entry));
+	entry = calloc(1, sizeof(*entry));
 	if (!entry)
 		return -ENOMEM;
 
@@ -196,41 +195,37 @@ static int replace_resource_entry(const char *f_name, uint32_t base,
 		}
 	}
 
-	add_file_to_list(entry, base);
+	add_file_to_list(entry, base, false);
 	free(entry);
 
 	return 0;
 }
 
-static int read_logo_bmp(const char *name, disk_partition_t *part,
-			 uint32_t offset, uint32_t *size)
+static int read_bmp(struct blk_desc *dev_desc, const char *name,
+		    disk_partition_t *part, uint32_t offset,
+		    uint32_t *size)
 {
-	struct blk_desc *dev_desc;
 	struct bmp_header *header;
-	u32 blk_start, blk_offset, filesz;
+	u32 blk_start, blk_offset;
+	u32 filesz;
 	int ret;
 
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc)
-		return -ENODEV;
-
 	blk_offset = DIV_ROUND_UP(offset, dev_desc->blksz);
 	blk_start = part->start + blk_offset;
 	header = memalign(ARCH_DMA_MINALIGN, dev_desc->blksz);
 	if (!header) {
 		ret = -ENOMEM;
-		goto err;
+		goto out;
 	}
-	ret = blk_dread(dev_desc, blk_start, 1, header);
-	if (ret != 1) {
+
+	if (blk_dread(dev_desc, blk_start, 1, header) != 1) {
 		ret = -EIO;
-		goto err;
+		goto out;
 	}
 
-	if (header->signature[0] != 'B' ||
-	    header->signature[1] != 'M') {
+	if (header->signature[0] != 'B' || header->signature[1] != 'M') {
 		ret = -EINVAL;
-		goto err;
+		goto out;
 	}
 
 	filesz = get_unaligned_le32(&header->file_size);
@@ -240,190 +235,130 @@ static int read_logo_bmp(const char *name, disk_partition_t *part,
 		if (size)
 			*size = filesz;
 	}
-err:
+out:
 	free(header);
 
 	return ret;
 }
+
 /*
- * There are: logo/battery pictures and dtb file in the resource image by default.
+ * Add logo.bmp and logo_kernel.bmp from "logo" parititon
  *
- * This function does:
+ * Provide a "logo" partition for user to store logo.bmp and
+ * logo_kernel.bmp, so that the user can update them from
+ * kernel or user-space dynamically.
  *
- * 1. Get resource image from part: boot/recovery(AOSP) > resource(RK);
- * 2. Add all file into resource list(We load them from storage when we need);
- * 3. Add logo picture from logo partition into resource list(replace the
- *    old one in resource file);
- * 4. Add dtb file from dtb position into resource list if boot_img_hdr_v2
- *    (replace the old one in resource file);
+ * "logo" partition layout, do not change order:
+ *
+ *   |----------------------| 0x00
+ *   | raw logo.bmp	    |
+ *   |----------------------| N*512-byte aligned
+ *   | raw logo_kernel.bmp  |
+ *   |----------------------|
+ *
+ * N: the sector count of logo.bmp
  */
-static int init_resource_list(struct resource_img_hdr *hdr)
+static int read_logo_bmps(struct blk_desc *dev_desc)
 {
-	struct resource_entry *entry;
-	struct blk_desc *dev_desc;
-	char *boot_partname = PART_BOOT;
-	disk_partition_t part_info;
-	int resource_found = 0;
-	void *content = NULL;
-	int rsce_base = 0;
-	__maybe_unused int dtb_offset = 0;
-	int dtb_size = 0;
-	int e_num, cnt;
-	int size;
-	int ret;
+	disk_partition_t part;
+	u32 filesz;
 
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: dev_desc is NULL!\n", __func__);
+	if (part_get_info_by_name(dev_desc, PART_LOGO, &part) < 0)
 		return -ENODEV;
-	}
 
-	/* If hdr is valid from outside, use it */
-	if (hdr) {
-		if (resource_image_check_header(hdr))
-			return -EEXIST;
+	if (!read_bmp(dev_desc, "logo.bmp", &part, 0, &filesz))
+		read_bmp(dev_desc, "logo_kernel.bmp", &part, filesz, NULL);
 
-		content = (void *)((char *)hdr +
-				(hdr->c_offset) * dev_desc->blksz);
-		for (e_num = 0; e_num < hdr->e_nums; e_num++) {
-			size = e_num * hdr->e_blks * dev_desc->blksz;
-			entry = (struct resource_entry *)(content + size);
-			add_file_to_list(entry, rsce_base);
-		}
-		return 0;
-	}
+	return 0;
+}
 
-	cnt = DIV_ROUND_UP(sizeof(struct andr_img_hdr), dev_desc->blksz);
-	hdr = memalign(ARCH_DMA_MINALIGN, dev_desc->blksz * cnt);
-	if (!hdr)
-		return -ENOMEM;
+static int read_dtb_from_android_v2(int rsce_base, int dtb_offset, int dtb_size)
+{
+	if (!dtb_size)
+		return 0;
 
 	/*
-	 * Anyway, we must read android hdr firstly from boot partition to get
-	 * the 'os_version' for android_bcb_msg_sector_offset() to confirm BCB
-	 * message offset of misc partition.
+	 * boot_img_hdr_v2 feature.
+	 *
+	 * If dtb position is present, replace the old with new one if
+	 * we don't need to verify DTB hash from resource.img file entry.
 	 */
-#ifdef CONFIG_ANDROID_BOOT_IMAGE
-	struct andr_img_hdr *andr_hdr;
+#ifndef CONFIG_ROCKCHIP_DTB_VERIFY
+	if (replace_resource_entry(DTB_FILE, rsce_base, dtb_offset, dtb_size))
+		printf("Failed to load dtb from v2 dtb position\n");
+	else
+#endif
+		env_update("bootargs", "androidboot.dtb_idx=0");
 
-	ret = part_get_info_by_name(dev_desc, boot_partname, &part_info);
-	if (ret < 0) {
-		printf("%s: failed to get %s part, ret=%d\n",
-		       __func__, boot_partname, ret);
-		goto parse_resource_part;
-	}
+	return 0;
+}
 
-	andr_hdr = (void *)hdr;
-	ret = blk_dread(dev_desc, part_info.start, cnt, andr_hdr);
-	if (ret != cnt) {
-		printf("%s: failed to read %s hdr, ret=%d\n",
-		       __func__, part_info.name, ret);
-		ret = -EIO;
+int resource_create_ram_list(struct blk_desc *dev_desc, void *rsce_hdr)
+{
+	struct resource_img_hdr *hdr = rsce_hdr;
+	struct resource_entry *entry;
+	int e_num, size;
+	void *data;
+	int ret = 0;
+
+	if (resource_image_check_header(hdr)) {
+		ret = -EINVAL;
 		goto out;
 	}
 
-	ret = android_image_check_header(andr_hdr);
-	if (!ret) {
-		u32 os_ver = andr_hdr->os_version >> 11;
-		u32 os_lvl = andr_hdr->os_version & ((1U << 11) - 1);
-
-		if (os_ver) {
-			gd->bd->bi_andr_version = andr_hdr->os_version;
-			printf("Android %u.%u, Build %u.%u\n",
-			       (os_ver >> 14) & 0x7F, (os_ver >> 7) & 0x7F,
-			       (os_lvl >> 4) + 2000, os_lvl & 0x0F);
-		}
+	data = (void *)((ulong)hdr + hdr->c_offset * dev_desc->blksz);
+	for (e_num = 0; e_num < hdr->e_nums; e_num++) {
+		size = e_num * hdr->e_blks * dev_desc->blksz;
+		entry = (struct resource_entry *)(data + size);
+		add_file_to_list(entry, (ulong)hdr, true);
 	}
+out:
+	read_logo_bmps(dev_desc);
 
-	/* Get boot mode from misc and read if recovery mode */
-#ifndef CONFIG_ANDROID_AB
-	if (rockchip_get_boot_mode() == BOOT_MODE_RECOVERY) {
-		boot_partname = PART_RECOVERY;
-
-		ret = part_get_info_by_name(dev_desc, boot_partname, &part_info);
-		if (ret < 0) {
-			printf("%s: failed to get %s part, ret=%d\n",
-			       __func__, boot_partname, ret);
-			goto parse_resource_part;
-		}
-
-		/* Try to find resource from android second position */
-		andr_hdr = (void *)hdr;
-		ret = blk_dread(dev_desc, part_info.start, cnt, andr_hdr);
-		if (ret != cnt) {
-			printf("%s: failed to read %s hdr, ret=%d\n",
-			       __func__, part_info.name, ret);
-			ret = -EIO;
-			goto out;
-		}
-	}
-#endif
+	return ret;
+}
 
-	ret = android_image_check_header(andr_hdr);
-	if (!ret) {
-		rsce_base = part_info.start * dev_desc->blksz;
-		rsce_base += andr_hdr->page_size;
-		rsce_base += ALIGN(andr_hdr->kernel_size, andr_hdr->page_size);
-		rsce_base += ALIGN(andr_hdr->ramdisk_size, andr_hdr->page_size);
-
-		if (andr_hdr->header_version >= 2) {
-			dtb_offset = rsce_base +
-			     ALIGN(andr_hdr->recovery_dtbo_size,
-				   andr_hdr->page_size) +
-			     ALIGN(andr_hdr->second_size, andr_hdr->page_size);
-			dtb_size = andr_hdr->dtb_size;
-		}
+static int resource_create_list(struct blk_desc *dev_desc, int rsce_base)
+{
+	struct resource_img_hdr *hdr;
+	struct resource_entry *entry;
+	int blknum, e_num;
+	void *data = NULL;
+	int ret = 0;
+	int size;
 
-		rsce_base = DIV_ROUND_UP(rsce_base, dev_desc->blksz);
-		dtb_offset =
-			DIV_ROUND_UP(dtb_offset, dev_desc->blksz) - rsce_base;
-		resource_found = 1;
-	}
-parse_resource_part:
-#endif  /* CONFIG_ANDROID_BOOT_IMAGE*/
-
-	/* If not find android image, get resource file from resource part */
-	if (!resource_found) {
-		boot_partname = PART_RESOURCE;
-		ret = part_get_info_by_name(dev_desc, boot_partname, &part_info);
-		if (ret < 0) {
-			printf("%s: failed to get resource part, ret=%d\n",
-			       __func__, ret);
-			goto out;
-		}
-		rsce_base = part_info.start;
-	}
+	hdr = memalign(ARCH_DMA_MINALIGN, dev_desc->blksz);
+	if (!hdr)
+		return -ENOMEM;
 
-	/*
-	 * Now, the "rsce_base" points to the resource file sector.
-	 */
-	ret = blk_dread(dev_desc, rsce_base, 1, hdr);
-	if (ret != 1) {
-		printf("%s: failed to read resource hdr, ret=%d\n",
-		       __func__, ret);
+	if (blk_dread(dev_desc, rsce_base, 1, hdr) != 1) {
+		printf("Failed to read resource hdr\n");
 		ret = -EIO;
-		goto out;
+		goto err;
 	}
 
-	ret = resource_image_check_header(hdr);
-	if (ret < 0) {
-		ret = -EINVAL;
-		goto parse_second_pos_dtb;
+	if (resource_image_check_header(hdr)) {
+		if (fdt_check_header(hdr)) {
+			printf("No valid resource or dtb file\n");
+			ret = -EINVAL;
+			goto err;
+		} else {
+			free(hdr);
+			return replace_resource_entry(DTB_FILE, rsce_base,
+						      0, fdt_totalsize(hdr));
+		}
 	}
 
-	content = memalign(ARCH_DMA_MINALIGN,
-			   hdr->e_blks * hdr->e_nums * dev_desc->blksz);
-	if (!content) {
-		printf("%s: failed to alloc memory for content\n", __func__);
+	blknum = hdr->e_blks * hdr->e_nums;
+	data = memalign(ARCH_DMA_MINALIGN, blknum * dev_desc->blksz);
+	if (!data) {
 		ret = -ENOMEM;
-		goto out;
+		goto err;
 	}
 
-	ret = blk_dread(dev_desc, rsce_base + hdr->c_offset,
-			hdr->e_blks * hdr->e_nums, content);
-	if (ret != (hdr->e_blks * hdr->e_nums)) {
-		printf("%s: failed to read resource entries, ret=%d\n",
-		       __func__, ret);
+	if (blk_dread(dev_desc, rsce_base + hdr->c_offset,
+		      blknum, data) != blknum) {
+		printf("Failed to read resource entries\n");
 		ret = -EIO;
 		goto err;
 	}
@@ -434,97 +369,158 @@ parse_resource_part:
 	 */
 	for (e_num = 0; e_num < hdr->e_nums; e_num++) {
 		size = e_num * hdr->e_blks * dev_desc->blksz;
-		entry = (struct resource_entry *)(content + size);
-		add_file_to_list(entry, rsce_base);
+		entry = (struct resource_entry *)(data + size);
+		add_file_to_list(entry, rsce_base, false);
 	}
 
-	ret = 0;
-	printf("Found DTB in %s part\n", boot_partname);
+err:
+	if (data)
+		free(data);
+	if (hdr)
+		free(hdr);
+
+	read_logo_bmps(dev_desc);
+
+	return ret;
+}
 
-parse_second_pos_dtb:
+static int get_resource_base_sector(struct blk_desc *dev_desc,
+				    disk_partition_t *from_part,
+				    int *dtb_off, int *dtb_size)
+{
+	disk_partition_t part;
+	int rsce_base;
 #ifdef CONFIG_ANDROID_BOOT_IMAGE
+	struct andr_img_hdr *hdr;
+	int blknum;
+
 	/*
-	 * If not find resource file on above, we try to get dtb file from
-	 * android second position.
+	 * Anyway, we must read android hdr firstly from boot partition to get
+	 * the 'os_version' for android_bcb_msg_sector_offset(), in order to
+	 * confirm BCB message offset of misc partition.
 	 */
-	if (!content && !fdt_check_header((void *)hdr)) {
-		entry = malloc(sizeof(*entry));
-		if (!entry) {
-			ret = -ENOMEM;
-			goto parse_logo;
-		}
+	if (part_get_info_by_name(dev_desc, PART_BOOT, &part) < 0)
+		goto resource_part;
 
-		memcpy(entry->tag, ENTRY_TAG, sizeof(ENTRY_TAG));
-		memcpy(entry->name, DTB_FILE, sizeof(DTB_FILE));
-		entry->f_size = fdt_totalsize((void *)hdr);
-		entry->f_offset = 0;
+	blknum = DIV_ROUND_UP(sizeof(*hdr), dev_desc->blksz);
+	hdr = memalign(ARCH_DMA_MINALIGN, dev_desc->blksz * blknum);
+	if (!hdr)
+		return -ENOMEM;
 
-		add_file_to_list(entry, part_info.start);
-		free(entry);
-		ret = 0;
-		printf("Found DTB in %s part(second pos)\n", boot_partname);
+	if (blk_dread(dev_desc, part.start, blknum, hdr) != blknum) {
+		printf("Failed to read %s hdr\n", part.name);
+		free(hdr);
+		return -EIO;
 	}
 
-parse_logo:
+	if (!android_image_check_header(hdr)) {
+		u32 os_ver, os_lvl;
+
+		os_ver = hdr->os_version >> 11;
+		os_lvl = hdr->os_version & ((1U << 11) - 1);
+		if (os_ver) {
+			gd->bd->bi_andr_version = hdr->os_version;
+			printf("Android %u.%u, Build %u.%u\n",
+			       (os_ver >> 14) & 0x7F, (os_ver >> 7) & 0x7F,
+			       (os_lvl >> 4) + 2000, os_lvl & 0x0F);
+		}
+	}
+
+#ifndef CONFIG_ANDROID_AB
+	/* Get boot mode from misc and read if recovery mode */
+	if (rockchip_get_boot_mode() == BOOT_MODE_RECOVERY) {
+		if (part_get_info_by_name(dev_desc, PART_RECOVERY, &part) < 0)
+			goto resource_part;
+
+		if (blk_dread(dev_desc, part.start, blknum, hdr) != blknum) {
+			printf("Failed to read %s hdr\n", part.name);
+			free(hdr);
+			return -EIO;
+		}
+	}
 #endif
-	/*
-	 * Add logo.bmp and logo_kernel.bmp from "logo" parititon
-	 *
-	 * Provide a "logo" partition for user to store logo.bmp and
-	 * logo_kernel.bmp, so that the users can update them from
-	 * kernel or user-space dynamically.
-	 *
-	 * "logo" partition layout, not change order:
-	 *
-	 *   |----------------------| 0x00
-	 *   | raw logo.bmp         |
-	 *   |----------------------| N*512-byte aligned
-	 *   | raw logo_kernel.bmp  |
-	 *   |----------------------|
-	 *
-	 * N: the sector count of logo.bmp
-	 */
-	if (part_get_info_by_name(dev_desc, PART_LOGO, &part_info) >= 0) {
-		u32 filesz;
+	/* get ! */
+	if (!android_image_check_header(hdr)) {
+		rsce_base = part.start * dev_desc->blksz;
+		rsce_base += hdr->page_size;
+		rsce_base += ALIGN(hdr->kernel_size, hdr->page_size);
+		rsce_base += ALIGN(hdr->ramdisk_size, hdr->page_size);
+
+		if (hdr->header_version >= 2) {
+			*dtb_size = hdr->dtb_size;
+			*dtb_off =
+				rsce_base +
+				ALIGN(hdr->recovery_dtbo_size, hdr->page_size) +
+				ALIGN(hdr->second_size, hdr->page_size);
+		}
 
-		if (!read_logo_bmp("logo.bmp", &part_info, 0, &filesz))
-			read_logo_bmp("logo_kernel.bmp", &part_info,
-				      filesz, NULL);
+		rsce_base = DIV_ROUND_UP(rsce_base, dev_desc->blksz);
+		*dtb_off = DIV_ROUND_UP(*dtb_off, dev_desc->blksz) - rsce_base;
+		*from_part = part;
+		free(hdr);
+		goto finish;
+	}
+resource_part:
+#endif
+	/* resource partition */
+	if (part_get_info_by_name(dev_desc, PART_RESOURCE, &part) < 0) {
+		printf("No resource partition\n");
+		return -ENODEV;
 	}
 
-	/*
-	 * boot_img_hdr_v2 feature.
-	 *
-	 * If dtb position is present, replace the old with new one if
-	 * we don't need to verify DTB hash from resource.img file entry.
-	 */
-	if (dtb_size) {
-#ifndef CONFIG_ROCKCHIP_DTB_VERIFY
-		ret = replace_resource_entry(DTB_FILE, rsce_base,
-					     dtb_offset, dtb_size);
-		if (ret)
-			printf("Failed to load dtb from dtb position\n");
-		else
+	*from_part = part;
+	rsce_base = part.start;
+#ifdef CONFIG_ANDROID_BOOT_IMAGE
+finish:
 #endif
-			env_update("bootargs", "androidboot.dtb_idx=0");
+	printf("Found DTB in %s part\n", part.name);
+
+	return rsce_base;
+}
+
+/*
+ * There are: logo/battery pictures and dtb file in the resource image by default.
+ *
+ * This function does:
+ *
+ * 1. Get resource image base sector from: boot/recovery(AOSP) > resource(RK)
+ * 2. Create resource files list(addition: add logo bmps)
+ * 3. Add dtb from android v2 dtb pos, override the old one from resource file
+ */
+static int init_resource_list(void)
+{
+	struct blk_desc *dev_desc;
+	disk_partition_t part;
+	int rsce_base;
+	int dtb_offset;
+	int dtb_size = 0;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("No dev_desc!\n");
+		return -ENODEV;
 	}
-err:
-	if (content)
-		free(content);
-out:
-	free(hdr);
 
-	return ret;
+	rsce_base = get_resource_base_sector(dev_desc, &part,
+					     &dtb_offset, &dtb_size);
+	if (rsce_base > 0) {
+		if (resource_create_list(dev_desc, rsce_base))
+			printf("Failed to create resource list\n");
+	}
+
+	/* override the old one if dtb_size != 0 */
+	read_dtb_from_android_v2(rsce_base, dtb_offset, dtb_size);
+
+	return 0;
 }
 
-static struct resource_file *get_file_info(struct resource_img_hdr *hdr,
-					   const char *name)
+static struct resource_file *get_file_info(const char *name)
 {
 	struct resource_file *file;
 	struct list_head *node;
 
 	if (list_empty(&entrys_head)) {
-		if (init_resource_list(hdr))
+		if (init_resource_list())
 			return NULL;
 	}
 
@@ -551,29 +547,35 @@ int rockchip_read_resource_file(void *buf, const char *name,
 	struct blk_desc *dev_desc;
 	int ret = 0;
 	int blks;
+	ulong src;
+
+	file = get_file_info(name);
+	if (!file) {
+		printf("No file: %s\n", name);
+		return -ENOENT;
+	}
 
 	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {
-		printf("%s: dev_desc is NULL!\n", __func__);
+		printf("No dev_desc!\n");
 		return -ENODEV;
 	}
 
-	file = get_file_info(NULL, name);
-	if (!file) {
-		printf("Can't find file:%s\n", name);
-		return -ENOENT;
-	}
-
 	if (len <= 0 || len > file->f_size)
 		len = file->f_size;
 
-	blks = DIV_ROUND_UP(len, dev_desc->blksz);
-	ret = blk_dread(dev_desc, file->rsce_base + file->f_offset + offset,
-			blks, buf);
-	if (ret != blks)
-		ret = -EIO;
-	else
+	if (file->ram) {
+		src = file->rsce_base +
+			(file->f_offset + offset) * dev_desc->blksz;
+		memcpy(buf, (char *)src, len);
 		ret = len;
+	} else {
+		blks = DIV_ROUND_UP(len, dev_desc->blksz);
+		ret = blk_dread(dev_desc,
+				file->rsce_base + file->f_offset + offset,
+				blks, buf);
+		ret = (ret != blks) ? -EIO : len;
+	}
 
 	return ret;
 }
@@ -847,7 +849,7 @@ int rockchip_read_resource_dtb(void *fdt_addr, char **hash, int *hash_size)
 	struct resource_file *file;
 	int ret;
 
-	file = get_file_info(NULL, DTB_FILE);
+	file = get_file_info(DTB_FILE);
 #ifdef CONFIG_ROCKCHIP_HWID_DTB
 	if (!file)
 		file = rockchip_read_hwid_dtb();

commit 3fe16d468ff866959e9e57e2ca1a19469e305e12
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Mar 9 14:10:58 2020 +0800

    arm64: interrupts: show ESR register for SPL
    
    It contains the exception reason.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ibcd381979dccb0dd17b5b8899053cb0c5cd22a96

diff --git a/arch/arm/lib/interrupts_64.c b/arch/arm/lib/interrupts_64.c
index 36d442048c..cd3e29c4a5 100644
--- a/arch/arm/lib/interrupts_64.c
+++ b/arch/arm/lib/interrupts_64.c
@@ -12,6 +12,7 @@
 #include <stacktrace.h>
 
 DECLARE_GLOBAL_DATA_PTR;
+
 #if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_IRQ)
 
 int interrupt_init(void)
@@ -30,9 +31,9 @@ int disable_interrupts(void)
 }
 #endif
 
-#if (!defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD))
 #define REG_BITS(val, shift, mask)	(((val) >> (shift)) & (mask))
 
+#if (!defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD))
 void show_regs(struct pt_regs *regs)
 {
 	int el = current_el();
@@ -119,6 +120,9 @@ void show_regs(struct pt_regs *regs)
 		printf("ELR:     %lx\n", regs->elr);
 		printf("LR:      %lx\n", regs->regs[30]);
 	}
+
+	printf("ESR:     %lx (ec=%ld)\n", regs->esr, REG_BITS(regs->esr, 26, 0x3f));
+
 	for (i = 0; i < 29; i += 2)
 		printf("x%-2d: %016lx x%-2d: %016lx\n",
 		       i, regs->regs[i], i+1, regs->regs[i+1]);

commit 1d0e326571d7cbea57b452b1dbe4e87ed2d289d9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Mar 6 18:24:53 2020 +0800

    configs: rk3399: enable spl fit signature
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I94f4f331df8d672207a4afcecc4af59277aa50bf

diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
index bc61a9d4d9..ec752fd342 100755
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -9,6 +9,8 @@ CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
+CONFIG_FIT_SIGNATURE=y
+CONFIG_SPL_FIT_SIGNATURE=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_BOOTDELAY=0
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
@@ -19,6 +21,9 @@ CONFIG_ANDROID_AVB=y
 # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
+CONFIG_SPL_SHA256_SUPPORT=y
+CONFIG_SPL_CRYPTO_SUPPORT=y
+CONFIG_SPL_HASH_SUPPORT=y
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_FASTBOOT_BUF_ADDR=0x00800800

commit 75efda762292b4b6a7c4c029a37ae1a1746f3e18
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Mar 6 18:23:58 2020 +0800

    configs: rk3399: update with make savedefconfig
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If5da2f21b5d492f5aa94f5458aea3cf660093a10

diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
index 52a7cb4d5c..bc61a9d4d9 100755
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -5,7 +5,6 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_RK3399=y
-CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb"
 CONFIG_DEBUG_UART=y
@@ -112,10 +111,10 @@ CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
 CONFIG_USB_GADGET_VENDOR_NUM=0x2207
 CONFIG_USB_GADGET_PRODUCT_NUM=0x330a
+CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
@@ -127,7 +126,6 @@ CONFIG_USE_TINY_PRINTF=y
 CONFIG_LIB_RAND=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
-CONFIG_OF_LIBFDT_OVERLAY=y
 CONFIG_AVB_LIBAVB=y
 CONFIG_AVB_LIBAVB_AB=y
 CONFIG_AVB_LIBAVB_ATX=y

commit 53f956c2188a8d47adf4fdcb35a4fe90025b69f6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Mar 9 17:15:24 2020 +0800

    rockchip: make_fit_atf.py: add components for verified boot
    
    Require sha256 and rsa2048 for all images to be signed.
    
    Use u-boot.dtb to be included as fdt component since the
    u-boot.dtb contains the "/signature" information of U-Boot
    proper.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I1a3ac5f323730b7ef52afd883110d41179740f4f

diff --git a/arch/arm/mach-rockchip/make_fit_atf.py b/arch/arm/mach-rockchip/make_fit_atf.py
index 7c6dd57678..5f832e7538 100755
--- a/arch/arm/mach-rockchip/make_fit_atf.py
+++ b/arch/arm/mach-rockchip/make_fit_atf.py
@@ -45,6 +45,9 @@ DT_HEADER="""/*
 			arch = "arm64";
 			compression = "none";
 			load = <0x%08x>;
+			hash@1 {
+				algo = "sha256";
+			};
 		};
 """
 
@@ -71,6 +74,9 @@ def append_atf_node(file, atf_index, phy_addr):
     print >> file, '\t\t\tload = <0x%08x>;' % phy_addr
     if atf_index == 1:
         print >> file, '\t\t\tentry = <0x%08x>;' % phy_addr
+    print >> file, '\t\t\thash@1 {'
+    print >> file, '\t\t\t\talgo = "sha256";'
+    print >> file, '\t\t\t};'
     print >> file, '\t\t};'
     print >> file, ''
 
@@ -82,10 +88,13 @@ def append_fdt_node(file, dtbs):
     for dtb in dtbs:
         dtname = os.path.basename(dtb)
         print >> file, '\t\tfdt@%d {' % cnt
-        print >> file, '\t\t\tdescription = "%s";' % dtname
-        print >> file, '\t\t\tdata = /incbin/("%s");' % dtb
+        print >> file, '\t\t\tdescription = "U-Boot device tree blob";'
+        print >> file, '\t\t\tdata = /incbin/("u-boot.dtb");'
         print >> file, '\t\t\ttype = "flat_dt";'
         print >> file, '\t\t\tcompression = "none";'
+        print >> file, '\t\t\thash@1 {'
+        print >> file, '\t\t\t\talgo = "sha256";'
+        print >> file, '\t\t\t};'
         print >> file, '\t\t};'
         print >> file, ''
         cnt = cnt + 1
@@ -102,6 +111,11 @@ def append_conf_section(file, cnt, dtname, atf_cnt):
         else:
             print >> file, ';'
     print >> file, '\t\t\tfdt = "fdt@1";'
+    print >> file, '\t\t\tsignature@1 {'
+    print >> file, '\t\t\t\talgo = "sha256,rsa2048";'
+    print >> file, '\t\t\t\tkey-name-hint = "dev";'
+    print >> file, '\t\t\t\tsign-images = "fdt", "firmware", "loadables";'
+    print >> file, '\t\t\t};'
     print >> file, '\t\t};'
     print >> file, ''
 

commit 583377c459bfbd8eb43fd4bc66fdcf9b5fc82663
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Mar 8 15:09:20 2020 +0800

    spl: fit: add fit config verify support
    
    Do fit config verify if required.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I211f43c07d636ea8cff42cf9133bcab0aa86f8c6

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 160dd6f70b..a0394a9f52 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -395,6 +395,21 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 		return -1;
 	}
 
+	/* verify the configure node by keys, if required */
+#ifdef CONFIG_SPL_FIT_SIGNATURE
+	int conf_noffset;
+
+	conf_noffset = fit_conf_get_node(fit, NULL);
+	if (conf_noffset > 0) {
+		ret = fit_config_verify(fit, conf_noffset);
+		if (ret) {
+			printf("fit verify configure failed, ret=%d\n", ret);
+			return ret;
+		}
+		printf("\n");
+	}
+#endif
+
 	/*
 	 * Find the U-Boot image using the following search order:
 	 *   - start at 'firmware' (e.g. an ARM Trusted Firmware)
diff --git a/include/image.h b/include/image.h
index fd310f8901..c0e6b1a727 100644
--- a/include/image.h
+++ b/include/image.h
@@ -1049,6 +1049,9 @@ int fit_conf_get_node(const void *fit, const char *conf_uname);
 int fit_conf_get_prop_node(const void *fit, int noffset,
 		const char *prop_name);
 
+int fit_conf_get_prop_node_index(const void *fit, int noffset,
+		const char *prop_name, int index);
+
 void fit_conf_print(const void *fit, int noffset, const char *p);
 
 int fit_check_ramdisk(const void *fit, int os_noffset,

commit 3a183b396d8a1b48b0800ea315d45453bd7223a8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Mar 8 14:33:03 2020 +0800

    tools: image-host: support add all images of sub list into hash list
    
    Like the image list assigned by "loadables" = ...
    
    configurations {
            default = "config@1";
            config@1 {
                    ...
                    loadables = "uboot@1", "atf@2", "atf@3";
                    signature@1 {
                            algo = "sha1,rsa2048";
                            key-name-hint = "dev";
                            sign-images = "fdt", "firmware", "loadables";
                    };
            };
    };
    
    Assuming the maximum sub image count is 5.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I0454f6ad108342b5d85e831f7920baac642fb01a

diff --git a/tools/image-host.c b/tools/image-host.c
index 63995b60d4..5d31044558 100644
--- a/tools/image-host.c
+++ b/tools/image-host.c
@@ -431,52 +431,59 @@ static int fit_config_get_hash_list(void *fit, int conf_noffset,
 		int noffset;
 		int image_noffset;
 		int hash_count;
+		int i;
 
-		image_noffset = fit_conf_get_prop_node(fit, conf_noffset,
-						       iname);
-		if (image_noffset < 0) {
-			printf("Failed to find image '%s' in  configuration '%s/%s'\n",
-			       iname, conf_name, sig_name);
-			if (allow_missing)
-				continue;
+		for (i = 0; i < 5; i++) {
+			image_noffset =
+				fit_conf_get_prop_node_index(fit, conf_noffset,
+							     iname, i);
+			if (image_noffset < 0) {
+				if (i > 0)
+					break;
 
-			return -ENOENT;
-		}
+				printf("Failed to find image '%s' in  configuration '%s/%s'\n",
+				       iname, conf_name, sig_name);
+				if (allow_missing)
+					continue;
+
+				return -ENOENT;
+			}
 
-		ret = fdt_get_path(fit, image_noffset, path, sizeof(path));
-		if (ret < 0)
-			goto err_path;
-		if (strlist_add(node_inc, path))
-			goto err_mem;
-
-		snprintf(name, sizeof(name), "%s/%s", FIT_CONFS_PATH,
-			 conf_name);
-
-		/* Add all this image's hashes */
-		hash_count = 0;
-		for (noffset = fdt_first_subnode(fit, image_noffset);
-		     noffset >= 0;
-		     noffset = fdt_next_subnode(fit, noffset)) {
-			const char *name = fit_get_name(fit, noffset, NULL);
-
-			if (strncmp(name, FIT_HASH_NODENAME,
-				    strlen(FIT_HASH_NODENAME)))
-				continue;
-			ret = fdt_get_path(fit, noffset, path, sizeof(path));
+			ret = fdt_get_path(fit, image_noffset, path, sizeof(path));
 			if (ret < 0)
 				goto err_path;
 			if (strlist_add(node_inc, path))
 				goto err_mem;
-			hash_count++;
-		}
 
-		if (!hash_count) {
-			printf("Failed to find any hash nodes in configuration '%s/%s' image '%s' - without these it is not possible to verify this image\n",
-			       conf_name, sig_name, iname);
-			return -ENOMSG;
+			snprintf(name, sizeof(name), "%s/%s", FIT_CONFS_PATH,
+				 conf_name);
+
+			/* Add all this image's hashes */
+			hash_count = 0;
+			for (noffset = fdt_first_subnode(fit, image_noffset);
+			     noffset >= 0;
+			     noffset = fdt_next_subnode(fit, noffset)) {
+				const char *name = fit_get_name(fit, noffset, NULL);
+
+				if (strncmp(name, FIT_HASH_NODENAME,
+					    strlen(FIT_HASH_NODENAME)))
+					continue;
+				ret = fdt_get_path(fit, noffset, path, sizeof(path));
+				if (ret < 0)
+					goto err_path;
+				if (strlist_add(node_inc, path))
+					goto err_mem;
+				hash_count++;
+			}
+
+			if (!hash_count) {
+				printf("Failed to find any hash nodes in configuration '%s/%s' image '%s' - without these it is not possible to verify this image\n",
+				       conf_name, sig_name, iname);
+				return -ENOMSG;
+			}
+
+			image_count++;
 		}
-
-		image_count++;
 	}
 
 	if (!image_count) {

commit f63c73dbcf887c95e2a22822f6c18321edd83fb9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Mar 8 14:15:47 2020 +0800

    tools: image-host: not allow keys to be missing
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ibae5d152244721926189fa3873d113bde212b4fb

diff --git a/tools/image-host.c b/tools/image-host.c
index c60d4adb3d..63995b60d4 100644
--- a/tools/image-host.c
+++ b/tools/image-host.c
@@ -600,10 +600,6 @@ static int fit_config_process_sig(const char *keydir, void *keydest,
 	if (ret) {
 		printf("Failed to sign '%s' signature node in '%s' conf node\n",
 		       node_name, conf_name);
-
-		/* We allow keys to be missing */
-		if (ret == -ENOENT)
-			return 0;
 		return -1;
 	}
 

commit f965884c36ddb7fcbdcaac85c3edfc866be20d8e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Feb 29 10:53:19 2020 +0800

    tools: fit image: fix external image sign fail issue
    
    Extract external data before adding verification data (must)
    with '-p' args, and shrink fdt blob to minimum size excluding
    the external data size.
    
    Add more space for device tree to avoid failed when insert new
    contents.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I202cba2b25306eb1023861bf8660d7ce6a1e4a34

diff --git a/tools/fit_image.c b/tools/fit_image.c
index 21afed6ee0..12cb757bcf 100644
--- a/tools/fit_image.c
+++ b/tools/fit_image.c
@@ -24,6 +24,52 @@
 
 static image_header_t header;
 
+#define ALIGN(x, a)	(((x) + (a) - 1) & ~((a) - 1))
+
+/* Resize the fdt to its actual size + a bit of padding */
+static int fdt_shrink_to_minimum(void *blob, uint extrasize)
+{
+	uint64_t addr, size;
+	uint actualsize;
+	int total, ret;
+	int i;
+
+	if (!blob)
+		return 0;
+
+	total = fdt_num_mem_rsv(blob);
+	for (i = 0; i < total; i++) {
+		fdt_get_mem_rsv(blob, i, &addr, &size);
+		if (addr == (uintptr_t)blob) {
+			fdt_del_mem_rsv(blob, i);
+			break;
+		}
+	}
+
+	/*
+	 * Calculate the actual size of the fdt
+	 * plus the size needed for 5 fdt_add_mem_rsv, one
+	 * for the fdt itself and 4 for a possible initrd
+	 * ((initrd-start + initrd-end) * 2 (name & value))
+	 */
+	actualsize = fdt_off_dt_strings(blob) +
+		fdt_size_dt_strings(blob) + 5 * sizeof(struct fdt_reserve_entry);
+
+	actualsize += extrasize;
+	actualsize = ALIGN(actualsize + ((uintptr_t)blob & 0xfff), 0x200);
+	actualsize = actualsize - ((uintptr_t)blob & 0xfff);
+
+	/* Change the fdt header to reflect the correct size */
+	fdt_set_totalsize(blob, actualsize);
+
+	/* Add the new reservation */
+	ret = fdt_add_mem_rsv(blob, (uintptr_t)blob, actualsize);
+	if (ret < 0)
+		return ret;
+
+	return actualsize;
+}
+
 static int fit_add_file_data(struct image_tool_params *params, size_t size_inc,
 			     const char *tmpfile)
 {
@@ -63,6 +109,16 @@ static int fit_add_file_data(struct image_tool_params *params, size_t size_inc,
 						params->engine_id);
 	}
 
+	/* Remove external data size from fdt totalsize */
+	if (params->external_offset) {
+		fdt_shrink_to_minimum(ptr, 0);
+		if (params->external_offset < fdt_totalsize(ptr)) {
+			ret = -EINVAL;
+			printf("Failed: external offset 0x%x overlaps FIT length 0x%x\n",
+			       params->external_offset, fdt_totalsize(ptr));
+		}
+	}
+
 	if (dest_blob) {
 		munmap(dest_blob, destfd_size);
 		close(destfd);
@@ -414,7 +470,7 @@ static int fit_extract_data(struct image_tool_params *params, const char *fname)
 	int images;
 	int node;
 
-	fd = mmap_fdt(params->cmdname, fname, 0, &fdt, &sbuf, false);
+	fd = mmap_fdt(params->cmdname, fname, 0x400, &fdt, &sbuf, false);
 	if (fd < 0)
 		return -EIO;
 	fit_size = fdt_totalsize(fdt);
@@ -482,8 +538,8 @@ static int fit_extract_data(struct image_tool_params *params, const char *fname)
 	/* Check if an offset for the external data was set. */
 	if (params->external_offset > 0) {
 		if (params->external_offset < new_size) {
-			debug("External offset %x overlaps FIT length %x",
-			      params->external_offset, new_size);
+			printf("Failed: external offset 0x%x overlaps FIT length 0x%x\n",
+			       params->external_offset, new_size);
 			ret = -EINVAL;
 			goto err;
 		}
@@ -669,6 +725,13 @@ static int fit_handle_file(struct image_tool_params *params)
 	if (ret)
 		goto err_system;
 
+	/* Args "-E -p": move the data so it is external to the FIT, if requested */
+	if (params->external_data && params->external_offset) {
+		ret = fit_extract_data(params, tmpfile);
+		if (ret)
+			goto err_system;
+	}
+
 	/*
 	 * Set hashes for images in the blob. Unfortunately we may need more
 	 * space in either FDT, so keep trying until we succeed.
@@ -691,8 +754,8 @@ static int fit_handle_file(struct image_tool_params *params)
 		goto err_system;
 	}
 
-	/* Move the data so it is external to the FIT, if requested */
-	if (params->external_data) {
+	/* Args "-E": move the data so it is external to the FIT, if requested */
+	if (params->external_data && !params->external_offset) {
 		ret = fit_extract_data(params, tmpfile);
 		if (ret)
 			goto err_system;

commit e750e261e73208cca54e6a41ad0e590fc1a4d428
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Feb 15 17:44:41 2020 +0800

    image: chose fdt blob according to kernel dtb feature
    
    gd_fdt_blob() is used in FIT verified boot to get the
    "/signature" node added in U-Boot fdt blob.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I828dbff45a1f9b450fb6059e620eba13df3bf318

diff --git a/include/image.h b/include/image.h
index fdbd80dd39..fd310f8901 100644
--- a/include/image.h
+++ b/include/image.h
@@ -1080,8 +1080,12 @@ void *image_get_host_blob(void);
 void image_set_host_blob(void *host_blob);
 # define gd_fdt_blob()		image_get_host_blob()
 #else
+#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USING_KERNEL_DTB)
+# define gd_fdt_blob()		(gd->ufdt_blob)
+#else
 # define gd_fdt_blob()		(gd->fdt_blob)
 #endif
+#endif
 
 #ifdef CONFIG_FIT_BEST_MATCH
 #define IMAGE_ENABLE_BEST_MATCH	1

commit ce72132898d5fe3b9dc2de73f96c1494835ba15c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Feb 29 14:57:41 2020 +0800

    common: fit: add "data-position" support for data get
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I19dadae361c336ac691ed7eef6d78cee5ec645e0

diff --git a/common/image-fit.c b/common/image-fit.c
index 2b09756a15..40035c765b 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -841,28 +841,37 @@ int fit_image_get_data(const void *fit, int noffset,
 		const void **data, size_t *size)
 {
 	ulong data_off = 0;
-	int data_sz = 0;
+	ulong data_pos = 0;
 	int len;
 
+	/* data */
 	*data = fdt_getprop(fit, noffset, FIT_DATA_PROP, &len);
-	if (*data == NULL) {
-		fit_image_get_data_offset(fit, noffset, (int *)&data_off);
-		fit_image_get_data_size(fit, noffset, &data_sz);
-		if (data_sz) {
-			data_off += (ulong)fit;
-			data_off += FIT_ALIGN(fdt_totalsize(fit));
-			*data = (void *)data_off;
-			*size = data_sz;
-			return 0;
-		} else {
-			fit_get_debug(fit, noffset, FIT_DATA_PROP, len);
-			*size = 0;
-			return -1;
-		}
+	if (*data) {
+		*size = len;
+		return 0;
 	}
 
-	*size = len;
-	return 0;
+	/* data-size */
+	if (fit_image_get_data_size(fit, noffset, &len))
+		return -ENOENT;
+
+	/* data-offset */
+	if (!fit_image_get_data_offset(fit, noffset, (int *)&data_off)) {
+		data_off += (ulong)fit + FIT_ALIGN(fdt_totalsize(fit));
+		*data = (void *)data_off;
+		*size = len;
+		return 0;
+	}
+
+	/* data-position */
+	if (!fit_image_get_data_position(fit, noffset, (int *)&data_pos)) {
+		*data = (void *)(data_pos + (ulong)fit);
+		*size = len;
+		return 0;
+	}
+
+	*size = 0;
+	return -1;
 }
 
 /**

commit acd432902756f5df7e173f5a9ff6bc486a04ac14
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Feb 29 20:19:17 2020 +0800

    common: fit: unify fit image align size
    
    Set 512 as default align size in order to access any image
    by block unit.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I372ca7ff567816cb8369aff9d1fbe9865fa6d933

diff --git a/common/boot_fit.c b/common/boot_fit.c
index 4b5cec58d0..4dedd08a8e 100644
--- a/common/boot_fit.c
+++ b/common/boot_fit.c
@@ -62,7 +62,7 @@ void *locate_dtb_in_fit(const void *fit)
 	int ret;
 
 	size = fdt_totalsize(fit);
-	size = (size + 3) & ~3;
+	size = FIT_ALIGN(size);
 
 	header = (struct image_header *)fit;
 
diff --git a/common/image-fit.c b/common/image-fit.c
index a60f234206..2b09756a15 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -850,7 +850,7 @@ int fit_image_get_data(const void *fit, int noffset,
 		fit_image_get_data_size(fit, noffset, &data_sz);
 		if (data_sz) {
 			data_off += (ulong)fit;
-			data_off += round_up(fdt_totalsize(fit), 4);
+			data_off += FIT_ALIGN(fdt_totalsize(fit));
 			*data = (void *)data_off;
 			*size = data_sz;
 			return 0;
diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 063d2b1a75..160dd6f70b 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -359,8 +359,8 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 	 * image.
 	 */
 	size = fdt_totalsize(fit);
-	size = (size + 3) & ~3;
-	base_offset = (size + 3) & ~3;
+	size = FIT_ALIGN(size);
+	base_offset = FIT_ALIGN(size);
 
 	/*
 	 * So far we only have one block of data from the FIT. Read the entire
diff --git a/common/splash_source.c b/common/splash_source.c
index e0defdebd6..6a987eaa83 100644
--- a/common/splash_source.c
+++ b/common/splash_source.c
@@ -358,7 +358,7 @@ static int splash_load_fit(struct splash_location *location, u32 bmp_load_addr)
 
 	/* Align data offset to 4-byte boundrary */
 	fit_size = fdt_totalsize(fit_header);
-	fit_size = (fit_size + 3) & ~3;
+	fit_size = FIT_ALIGN(fit_size);
 
 	/* Read in the splash data */
 	location->offset = (location->offset + fit_size + splash_offset);
diff --git a/include/image.h b/include/image.h
index e3bee8774f..fdbd80dd39 100644
--- a/include/image.h
+++ b/include/image.h
@@ -921,6 +921,12 @@ int bootz_setup(ulong image, ulong *start, ulong *end);
 #define FIT_MAX_HASH_LEN	HASH_MAX_DIGEST_SIZE
 
 #if IMAGE_ENABLE_FIT
+
+#ifndef IMAGE_ALIGN_SIZE
+#define IMAGE_ALIGN_SIZE	512
+#endif
+#define FIT_ALIGN(x)		(((x)+IMAGE_ALIGN_SIZE-1)&~(IMAGE_ALIGN_SIZE-1))
+
 /* cmdline argument format parsing */
 int fit_parse_conf(const char *spec, ulong addr_curr,
 		ulong *addr, const char **conf_name);
diff --git a/tools/fit_image.c b/tools/fit_image.c
index 6dcc88bae0..21afed6ee0 100644
--- a/tools/fit_image.c
+++ b/tools/fit_image.c
@@ -460,7 +460,7 @@ static int fit_extract_data(struct image_tool_params *params, const char *fname)
 		}
 		fdt_setprop_u32(fdt, node, "data-size", len);
 
-		buf_ptr += (len + 3) & ~3;
+		buf_ptr += FIT_ALIGN(len);
 	}
 
 	/* Pack the FDT and place the data after it */
@@ -469,7 +469,7 @@ static int fit_extract_data(struct image_tool_params *params, const char *fname)
 	debug("Size reduced from %x to %x\n", fit_size, fdt_totalsize(fdt));
 	debug("External data size %x\n", buf_ptr);
 	new_size = fdt_totalsize(fdt);
-	new_size = (new_size + 3) & ~3;
+	new_size = FIT_ALIGN(new_size);
 	munmap(fdt, sbuf.st_size);
 
 	if (ftruncate(fd, new_size)) {
@@ -528,7 +528,7 @@ static int fit_import_data(struct image_tool_params *params, const char *fname)
 	if (fd < 0)
 		return -EIO;
 	fit_size = fdt_totalsize(old_fdt);
-	data_base = (fit_size + 3) & ~3;
+	data_base = FIT_ALIGN(fit_size);
 
 	/* Allocate space to hold the new FIT */
 	size = sbuf.st_size + 16384;

commit 7497bc3daedf41ef8f2b1d53121d70c50bbb59e0
Merge: 78628ac9a9 c15f307504
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Mar 13 17:39:43 2020 +0800

    Merge branch 'next-dev' into thunder-boot
    
    Change-Id: I35db1f0aa79575e972942b5c366f380fc8106343

commit c15f307504448022c76b0f48a428fca1d1e6663d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 4 17:40:22 2020 +0800

    arm: Kconfig: default select SKIP_RELOCATE_UBOOT if !ARM64
    
    Remove select from rockchip Kconfig.
    
    Some 32-bit platforms needs relocation to support non-compressed
    kernel image.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I0b60b79d7c67c5bd8439bd55bb277522c74a8bdd

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 0ef6ad4710..a091bd7a57 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1144,7 +1144,6 @@ config ARCH_ROCKCHIP
 	select CMD_ROCKUSB if USB_GADGET_DOWNLOAD
 	select ENABLE_ARM_SOC_BOOT0_HOOK
 	select SYS_NS16550
-	select SKIP_RELOCATE_UBOOT if !ARM64
 	select SPI
 	select DEBUG_UART_BOARD_INIT
 	imply CMD_FASTBOOT
diff --git a/common/Kconfig b/common/Kconfig
index d5c1a88d7c..1a005b1722 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -651,6 +651,7 @@ config ANDROID_BOOT_IMAGE_HASH
 
 config SKIP_RELOCATE_UBOOT
 	bool "Skip U-Boot relocation"
+	default y if !ARM64
 	help
 	  This enable support for skipping U-Boot relocation.
 

commit 15f6b6d065a8ca58d62316f4a1eb5a7677987dff
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 4 18:26:24 2020 +0800

    common: android: correct 32-bit non-compressed kernel address
    
    The page size should be reserved before kernel load address.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Iaa13fbc9a7a2872c5fb32a388ce96dd94654fc3d

diff --git a/common/image-android.c b/common/image-android.c
index 8438379f06..753687e87b 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -565,10 +565,14 @@ int android_image_parse_comp(struct andr_img_hdr *hdr, ulong *load_addr)
 	 * kernel_addr_r is for IMAGE when kernel_addr_c is defined.
 	 */
 	if (comp == IH_COMP_NONE) {
-		if (kernel_addr_c)
+		if (kernel_addr_c) {
 			*load_addr = env_get_ulong("kernel_addr_r", 16, 0);
-		else
+		} else {
 			*load_addr = CONFIG_SYS_SDRAM_BASE + 0x8000;
+			env_set_hex("kernel_addr_r", *load_addr);
+		}
+		
+		*load_addr -= hdr->page_size;
 	} else {
 		if (kernel_addr_c)
 			*load_addr = kernel_addr_c - hdr->page_size;

commit 591f14a84b694ed60c935f6bc9c7ec4162f77569
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 4 18:25:48 2020 +0800

    common: android: correct address setting api
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ic9026d00abc0855aae18cc1a8018ed3549a9482b

diff --git a/common/image-android.c b/common/image-android.c
index 4f906698a1..8438379f06 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -551,7 +551,7 @@ int android_image_parse_comp(struct andr_img_hdr *hdr, ulong *load_addr)
 		} else {
 			printf("Warn: No \"kernel_addr_c\"\n");
 			comp_addr = CONFIG_SYS_SDRAM_BASE + 0x2000000;/* 32M */
-			env_set_ulong("kernel_addr_c", comp_addr);
+			env_set_hex("kernel_addr_c", comp_addr);
 		}
 
 		*load_addr = comp_addr - hdr->page_size;

commit a8f564c37189d08fd0c68e378cf1d9ba81dad65b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Mar 9 11:59:26 2020 +0800

    lib: rsa: workaround fdt64_to_cpu() align issue
    
    It seems fdt64_to_cpu() input param address must be 8-bytes
    align, otherwise it brings a data-abort.
    
    No root cause was found, let's workaround it.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ic9f47d657b89b458bbd9ee52f0f931a689aec321

diff --git a/lib/rsa/rsa-mod-exp.c b/lib/rsa/rsa-mod-exp.c
index 9d78aa1ead..14b6a399ac 100644
--- a/lib/rsa/rsa-mod-exp.c
+++ b/lib/rsa/rsa-mod-exp.c
@@ -250,6 +250,11 @@ static void rsa_convert_big_endian(uint32_t *dst, const uint32_t *src, int len)
 int rsa_mod_exp_sw(const uint8_t *sig, uint32_t sig_len,
 		struct key_prop *prop, uint8_t *out)
 {
+#ifndef USE_HOSTCC
+	__cacheline_aligned uint64_t tmp;
+#else
+	uint64_t tmp;
+#endif
 	struct rsa_public_key key;
 	int ret;
 
@@ -260,11 +265,19 @@ int rsa_mod_exp_sw(const uint8_t *sig, uint32_t sig_len,
 	key.n0inv = prop->n0inv;
 	key.len = prop->num_bits;
 
-	if (!prop->public_exponent)
+	if (!prop->public_exponent) {
 		key.exponent = RSA_DEFAULT_PUBEXP;
-	else
-		key.exponent =
-			fdt64_to_cpu(*((uint64_t *)(prop->public_exponent)));
+	} else {
+		/*
+		 * it seems fdt64_to_cpu() input param address must be 8-bytes
+		 * align, otherwise it brings a data-abort. No root cause was
+		 * found.
+		 *
+		 * workaround it this a tmp value.
+		 */
+		memcpy((void *)&tmp, prop->public_exponent, sizeof(uint64_t));
+		key.exponent = fdt64_to_cpu(tmp);
+	}
 
 	if (!key.len || !prop->modulus || !prop->rr) {
 		debug("%s: Missing RSA key info", __func__);

commit 3fbeaf462ea510ac3c02e47d4220af684d4b6c9b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Mar 6 18:33:45 2020 +0800

    lib: Makefile: compile rsa/ depends on $(SPL_TPL_)
    
    Fix compile error.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ib6a159cd4fe5fe8387c9abb8369326a4411245b2

diff --git a/lib/Makefile b/lib/Makefile
index 9a4bfddae5..da4091438b 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -54,7 +54,7 @@ obj-$(CONFIG_$(SPL_TPL_)AVB_LIBAVB_ATX) += avb/libavb_atx/
 obj-$(CONFIG_$(SPL_TPL_)AVB_LIBAVB_USER) += avb/libavb_user/
 obj-$(CONFIG_$(SPL_TPL_)RK_AVB_LIBAVB_USER) += avb/rk_avb_user/
 
-obj-$(CONFIG_RSA) += rsa/
+obj-$(CONFIG_$(SPL_TPL_)RSA) += rsa/
 obj-$(CONFIG_SHA1) += sha1.o
 obj-$(CONFIG_SHA256) += sha256.o
 obj-$(CONFIG_SHA512) += sha512.o

commit 78628ac9a95ec2bb6bffa049323beb6af3eb3f37
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Mar 11 19:24:34 2020 +0800

    common: spl: jump next process depend on entry_point_os
    
    The spl can bring up uboot & kernel, and their entry points are diffirent,
    so pass their entry points by entry_point_os.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I625d135d219cfbfb620ff1e3d0de5278143f4079

diff --git a/common/spl/spl.c b/common/spl/spl.c
index a8c75888fa..2dd8608533 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -517,7 +517,8 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 #if CONFIG_IS_ENABLED(OPTEE)
 	case IH_OS_OP_TEE:
 		debug("Jumping to U-Boot via OP-TEE\n");
-		spl_optee_entry(NULL, NULL, (void *)spl_image.fdt_addr,
+		spl_optee_entry(NULL, (void *)spl_image.entry_point_os,
+				(void *)spl_image.fdt_addr,
 				(void *)spl_image.entry_point);
 		break;
 #endif
diff --git a/common/spl/spl_optee.S b/common/spl/spl_optee.S
index 64b24956ee..ddeb2ca892 100644
--- a/common/spl/spl_optee.S
+++ b/common/spl/spl_optee.S
@@ -8,7 +8,6 @@
 #include <asm/assembler.h>
 
 ENTRY(spl_optee_entry)
-	ldr lr, =CONFIG_SYS_TEXT_BASE
-	ldr r1, =CONFIG_SYS_TEXT_BASE
+	mov lr, r1
 	mov pc, r3
 ENDPROC(spl_optee_entry)

commit a64fd729d49f96f99e0291b10a16307d306ebb09
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Mar 9 10:58:41 2020 +0800

    common: spl: rkfw: support bing-up arm32 firmware
    
    1. the arm32 trust firmware is diffirent with arm64, support it.
    2. add entry_point_os to indicate the uboot or kernel entry point.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I24d1601323e99f40e81d18f1937f762b2ecc137f

diff --git a/common/spl/spl_rkfw.c b/common/spl/spl_rkfw.c
index 55c3529ea1..f59d6b1c4c 100644
--- a/common/spl/spl_rkfw.c
+++ b/common/spl/spl_rkfw.c
@@ -11,6 +11,7 @@
 #include <linux/kernel.h>
 #include <asm/arch/spl_resource_img.h>
 
+#ifdef CONFIG_SPL_ATF
 static const __aligned(16) struct s_fip_name_id fip_name_id[] = {
 	{ BL30_IMAGE_NAME, UUID_SCP_FIRMWARE_BL30 },		/* optional */
 	{ BL31_IMAGE_NAME, UUID_EL3_RUNTIME_FIRMWARE_BL31 },	/* mandatory */
@@ -163,7 +164,7 @@ static int load_image(struct spl_load_info *info,
 }
 
 static int rkfw_load_trust(struct spl_load_info *info, u32 image_sector,
-			   uintptr_t *bl31_entry, uintptr_t *bl32_entry,
+			   struct spl_image_info *spl_image,
 			   int *found_rkfw, u32 try_count)
 {
 	struct tag_tboot_header_2k hdr;
@@ -183,16 +184,16 @@ static int rkfw_load_trust(struct spl_load_info *info, u32 image_sector,
 
 			/* bl31 is mandatory */
 			ret = load_image(info, &hdr, sect_addr,
-					 BL31_IMAGE_NAME, bl31_entry);
+					 BL31_IMAGE_NAME, &spl_image->entry_point);
 			if (ret)
 				continue;
 
 			/* bl32 is optional */
 			ret = load_image(info, &hdr, sect_addr,
-					 BL32_IMAGE_NAME, bl32_entry);
+					 BL32_IMAGE_NAME, &spl_image->entry_point_bl32);
 			if (ret) {
 				if (ret == -ENONET) {
-					*bl32_entry = -1;	/* Not exist */
+					spl_image->entry_point_bl32 = -1;	/* Not exist */
 					ret = 0;
 				} else {
 					continue;
@@ -204,9 +205,52 @@ static int rkfw_load_trust(struct spl_load_info *info, u32 image_sector,
 
 	return ret;
 }
+#else
+static int rkfw_load_trust(struct spl_load_info *info, u32 image_sector,
+			   struct spl_image_info *spl_image,
+			   int *found_rkfw, u32 try_count)
+{
+	struct tag_second_loader_hdr hdr;
+	int i, ret, blkcnt = 4;	/* header sectors, 2KB */
+	char *load_addr;
+	u32 sect_addr;
+
+	/* Detect valid image header */
+	for (i = 0; i < try_count; i++) {
+		sect_addr = image_sector + (i * RKFW_RETRY_SECTOR_SIZE);
+		ret = info->read(info, sect_addr, blkcnt, &hdr);
+		if (ret != blkcnt)
+			continue;
+
+		if (!memcmp(hdr.magic, TBOOT_HEAD_TAG, 6)) {
+			*found_rkfw = 1;
+			spl_image->entry_point = (uintptr_t)hdr.loader_load_addr;
+			/* Load full binary image(right behind header) */
+			sect_addr += blkcnt;
+			load_addr = (char *)((size_t)hdr.loader_load_addr);
+			blkcnt = DIV_ROUND_UP(hdr.loader_load_size, 512);
+
+			printf("tee.bin: addr=0x%lx, size=0x%lx\n",
+			       (ulong)load_addr, (ulong)blkcnt * 512);
+			ret = info->read(info, sect_addr, blkcnt, load_addr);
+			if (ret != blkcnt)
+				continue;
+
+			break;
+		}
+	}
+
+	if (i == try_count) {
+		printf("Can not find usable uboot\n");
+		return -ENONET;
+	}
+
+	return 0;
+}
+#endif
 
 static int rkfw_load_uboot(struct spl_load_info *info, u32 image_sector,
-			   uintptr_t *bl33_entry, u32 try_count)
+			   struct spl_image_info *spl_image, u32 try_count)
 {
 	struct tag_second_loader_hdr hdr;
 	int i, ret, blkcnt = 4;	/* header sectors, 2KB */
@@ -242,13 +286,17 @@ static int rkfw_load_uboot(struct spl_load_info *info, u32 image_sector,
 	}
 
 	/* Fill entry point */
-	*bl33_entry = (uintptr_t)hdr.loader_load_addr;
-
+#ifdef CONFIG_SPL_ATF
+	spl_image->entry_point_bl33 = (uintptr_t)hdr.loader_load_addr;
+#endif
+#ifdef CONFIG_SPL_OPTEE
+	spl_image->entry_point_os = (uintptr_t)hdr.loader_load_addr;
+#endif
 	return 0;
 }
 
 static int rkfw_load_kernel(struct spl_load_info *info, u32 image_sector,
-			    uintptr_t *bl33_entry, u32 try_count)
+			    struct spl_image_info *spl_image, u32 try_count)
 {
 	struct andr_img_hdr *hdr;
 	int ret, cnt;
@@ -310,7 +358,7 @@ static int rkfw_load_kernel(struct spl_load_info *info, u32 image_sector,
 			ret = -EIO;
 			goto out;
 		}
-
+#ifdef CONFIG_SPL_KERNEL_BOOT
 		if (spl_resource_image_check_header(head)) {
 			printf("Can't find kernel dtb in spl.");
 		} else {
@@ -327,6 +375,7 @@ static int rkfw_load_kernel(struct spl_load_info *info, u32 image_sector,
 			memcpy((char *)CONFIG_SPL_FDT_ADDR, dtb_temp,
 			       entry->f_size);
 		}
+#endif
 	} else {
 		/* Load dtb image */
 		ret = info->read(info, (dtb_sector >> 9) + image_sector,
@@ -338,7 +387,13 @@ static int rkfw_load_kernel(struct spl_load_info *info, u32 image_sector,
 		}
 	}
 
-	*bl33_entry = CONFIG_SPL_KERNEL_ADDR;
+	spl_image->fdt_addr = (void *)CONFIG_SPL_FDT_ADDR;
+#ifdef CONFIG_SPL_OPTEE
+	spl_image->entry_point_os = (uintptr_t)CONFIG_SPL_KERNEL_ADDR;
+#endif
+#ifdef CONFIG_SPL_ATF
+	spl_image->entry_point_bl33 = CONFIG_SPL_KERNEL_ADDR;
+#endif
 	ret = 0;
 out:
 	free(hdr);
@@ -353,9 +408,7 @@ int spl_load_rkfw_image(struct spl_image_info *spl_image,
 	int ret, try_count = RKFW_RETRY_SECTOR_TIMES;
 	int found_rkfw = 0;
 
-	ret = rkfw_load_trust(info, trust_sector,
-			      &spl_image->entry_point,
-			      &spl_image->entry_point_bl32,
+	ret = rkfw_load_trust(info, trust_sector, spl_image,
 			      &found_rkfw, try_count);
 	if (ret) {
 		printf("Load trust image failed! ret=%d\n", ret);
@@ -363,14 +416,14 @@ int spl_load_rkfw_image(struct spl_image_info *spl_image,
 	}
 
 	ret = rkfw_load_uboot(info, uboot_sector,
-			      &spl_image->entry_point_bl33, try_count);
+			      spl_image, try_count);
 	if (ret)
 		printf("Load uboot image failed! ret=%d\n", ret);
 	else
 		goto boot;
 
 	ret = rkfw_load_kernel(info, uboot_sector,
-			     &spl_image->entry_point_bl33, try_count);
+			       spl_image, try_count);
 	if (ret) {
 		printf("Load kernel image failed! ret=%d\n", ret);
 		goto out;
@@ -380,7 +433,11 @@ boot:
 #if CONFIG_IS_ENABLED(LOAD_FIT)
 	spl_image->fdt_addr = 0;
 #endif
+#ifdef CONFIG_SPL_ATF
 	spl_image->os = IH_OS_ARM_TRUSTED_FIRMWARE;
+#else
+	spl_image->os = IH_OS_OP_TEE;
+#endif
 
 out:
 	/* If not found rockchip firmware, try others outside */
diff --git a/include/spl.h b/include/spl.h
index 4033b12c08..57753cf2c9 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -29,9 +29,10 @@ struct spl_image_info {
 	uintptr_t entry_point_bl32;
 	uintptr_t entry_point_bl33;
 #endif
-#if CONFIG_IS_ENABLED(LOAD_FIT)
-	void *fdt_addr;
+#if CONFIG_IS_ENABLED(OPTEE)
+	uintptr_t entry_point_os;	/* point to uboot or kernel */
 #endif
+	void *fdt_addr;
 	u32 boot_device;
 	u32 size;
 	u32 flags;
diff --git a/include/spl_rkfw.h b/include/spl_rkfw.h
index c4c8e34205..305608279d 100644
--- a/include/spl_rkfw.h
+++ b/include/spl_rkfw.h
@@ -9,7 +9,11 @@
 #include <spl.h>
 
 #define LOADER_HARD_STR			"LOADER"
+#ifdef CONFIG_SPL_ATF
 #define TBOOT_HEAD_TAG			0x58334c42 /* 'B', 'L', '3', 'X' */
+#else
+#define TBOOT_HEAD_TAG			"TOS   "
+#endif
 
 #define BL30_IMAGE_NAME			"bl30.bin" /* SCP Firmware BL3-0 */
 #define BL31_IMAGE_NAME			"bl31.bin" /* EL3 Runtime Firmware BL31 */

commit fa32ca699b6c4b2055b1100f783dc14c62a0cc6b
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Mar 9 09:19:39 2020 +0800

    rockchip: dts: rv1126/1109: add "u-boot,spl-boot-order" support
    
    Add emmc & sfc node.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ib5abcddf208fd20d47015ba1d127e44b1fa34007

diff --git a/arch/arm/dts/rv1126-u-boot.dtsi b/arch/arm/dts/rv1126-u-boot.dtsi
index 49a564d41e..1e4fca19f2 100644
--- a/arch/arm/dts/rv1126-u-boot.dtsi
+++ b/arch/arm/dts/rv1126-u-boot.dtsi
@@ -12,6 +12,7 @@
 
 	chosen {
 		stdout-path = &uart2;
+		u-boot,spl-boot-order = &sfc, &emmc;
 	};
 };
 

commit 3f7db063eded5343f5ece02914a61c86ee5d380e
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Mar 9 09:02:54 2020 +0800

    rockchip: rv1126: add rv1126 spl building support
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I8dfdcdff0e40db41bba99d4224bb66331de14471

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index c8ba562eb9..ef871510cb 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -424,6 +424,8 @@ config ROCKCHIP_RV1126
 	bool "Support Rockchip RV1126"
 	select CPU_V7
 	select BOARD_LATE_INIT
+	select SUPPORT_SPL
+	select SPL
 	help
 	  The Rockchip RV1126 is a ARM-based SoC with a quad-core Cortex-A7
 	  and a risc-v core.
diff --git a/configs/rv1126_defconfig b/configs/rv1126_defconfig
index a1572f8fda..e111858cfb 100644
--- a/configs/rv1126_defconfig
+++ b/configs/rv1126_defconfig
@@ -1,9 +1,14 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_MALLOC_F_LEN=0x1000
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x8000
 CONFIG_ROCKCHIP_RV1126=y
-CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_STACK_R_ADDR=0x3fe0000
 CONFIG_TARGET_EVB_RV1126=y
 CONFIG_DEFAULT_DEVICE_TREE="rv1126-evb"
 CONFIG_DEBUG_UART=y
@@ -11,6 +16,10 @@ CONFIG_BOOTDELAY=0
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_SPL_BOARD_INIT=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_SPL_STACK_R=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
@@ -34,12 +43,16 @@ CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_MISC is not set
 # CONFIG_ISO_PARTITION is not set
 CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
+CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
 CONFIG_CLK=y
+CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y
@@ -51,9 +64,10 @@ CONFIG_REGULATOR_PWM=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
+CONFIG_SPL_RAM=y
 CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
-CONFIG_DEBUG_UART_BASE=0x11030000
+CONFIG_DEBUG_UART_BASE=0xff570000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYSRESET=y
@@ -66,5 +80,6 @@ CONFIG_G_DNL_MANUFACTURER="Rockchip"
 CONFIG_G_DNL_VENDOR_NUM=0x18d1
 CONFIG_G_DNL_PRODUCT_NUM=0xd00d
 CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
 # CONFIG_EFI_LOADER is not set
diff --git a/include/configs/rv1126_common.h b/include/configs/rv1126_common.h
index 3c2d9b4c5d..bd49d50fa3 100644
--- a/include/configs/rv1126_common.h
+++ b/include/configs/rv1126_common.h
@@ -20,6 +20,14 @@
 #define CONFIG_SYS_LOAD_ADDR		0x00C00800
 #define CONFIG_SYS_BOOTM_LEN		(64 << 20)
 
+/* SPL */
+#define CONFIG_SPL_FRAMEWORK
+#define CONFIG_SPL_TEXT_BASE		0x00000000
+#define CONFIG_SPL_MAX_SIZE		0x20000
+#define CONFIG_SPL_BSS_START_ADDR	0x00608000
+#define CONFIG_SPL_BSS_MAX_SIZE		0x20000
+#define CONFIG_SPL_STACK		0x00608000
+
 #define GICD_BASE			0xfeff1000
 #define GICC_BASE			0xfeff2000
 

commit 4ec7b4d48d3f8d4c0a80a8a52471737e9a015056
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Thu Mar 12 10:12:15 2020 +0800

    video/drm: rgb: use prepare to instead enable
    
    the RGB output io state should set correctly before panel prepare,
    otherwise will lead to mcu init command send failed.
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: I92e94c97d72045113a06c78e5f88095aaaa4ec98

diff --git a/drivers/video/drm/rockchip_rgb.c b/drivers/video/drm/rockchip_rgb.c
index 6bfd445753..7c9f345d05 100644
--- a/drivers/video/drm/rockchip_rgb.c
+++ b/drivers/video/drm/rockchip_rgb.c
@@ -42,8 +42,8 @@
 struct rockchip_rgb;
 
 struct rockchip_rgb_funcs {
-	void (*enable)(struct rockchip_rgb *rgb, int pipe);
-	void (*disable)(struct rockchip_rgb *rgb);
+	void (*prepare)(struct rockchip_rgb *rgb, int pipe);
+	void (*unprepare)(struct rockchip_rgb *rgb);
 };
 
 struct rockchip_rgb {
@@ -61,7 +61,7 @@ static inline struct rockchip_rgb *state_to_rgb(struct display_state *state)
 	return dev_get_priv(conn_state->dev);
 }
 
-static int rockchip_rgb_connector_enable(struct display_state *state)
+static int rockchip_rgb_connector_prepare(struct display_state *state)
 {
 	struct rockchip_rgb *rgb = state_to_rgb(state);
 	struct crtc_state *crtc_state = &state->crtc_state;
@@ -70,8 +70,8 @@ static int rockchip_rgb_connector_enable(struct display_state *state)
 
 	pinctrl_select_state(rgb->dev, "default");
 
-	if (rgb->funcs && rgb->funcs->enable)
-		rgb->funcs->enable(rgb, pipe);
+	if (rgb->funcs && rgb->funcs->prepare)
+		rgb->funcs->prepare(rgb, pipe);
 
 	if (rgb->phy) {
 		ret = rockchip_phy_set_mode(rgb->phy, PHY_MODE_VIDEO_TTL);
@@ -86,19 +86,17 @@ static int rockchip_rgb_connector_enable(struct display_state *state)
 	return 0;
 }
 
-static int rockchip_rgb_connector_disable(struct display_state *state)
+static void rockchip_rgb_connector_unprepare(struct display_state *state)
 {
 	struct rockchip_rgb *rgb = state_to_rgb(state);
 
 	if (rgb->phy)
 		rockchip_phy_power_off(rgb->phy);
 
-	if (rgb->funcs && rgb->funcs->disable)
-		rgb->funcs->disable(rgb);
+	if (rgb->funcs && rgb->funcs->unprepare)
+		rgb->funcs->unprepare(rgb);
 
 	pinctrl_select_state(rgb->dev, "sleep");
-
-	return 0;
 }
 
 static int rockchip_rgb_connector_init(struct display_state *state)
@@ -123,6 +121,11 @@ static int rockchip_rgb_connector_init(struct display_state *state)
 	case MEDIA_BUS_FMT_SRBG888_3X8:
 		conn_state->output_mode = ROCKCHIP_OUT_MODE_S888;
 		break;
+	case MEDIA_BUS_FMT_SRGB888_DUMMY_4X8:
+	case MEDIA_BUS_FMT_SBGR888_DUMMY_4X8:
+	case MEDIA_BUS_FMT_SRBG888_DUMMY_4X8:
+		conn_state->output_mode = ROCKCHIP_OUT_MODE_S888_DUMMY;
+		break;
 	case MEDIA_BUS_FMT_RGB888_1X24:
 	case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
 	default:
@@ -135,8 +138,8 @@ static int rockchip_rgb_connector_init(struct display_state *state)
 
 static const struct rockchip_connector_funcs rockchip_rgb_connector_funcs = {
 	.init = rockchip_rgb_connector_init,
-	.enable = rockchip_rgb_connector_enable,
-	.disable = rockchip_rgb_connector_disable,
+	.prepare = rockchip_rgb_connector_prepare,
+	.unprepare = rockchip_rgb_connector_unprepare,
 };
 
 static int rockchip_rgb_probe(struct udevice *dev)
@@ -153,14 +156,14 @@ static int rockchip_rgb_probe(struct udevice *dev)
 	return 0;
 }
 
-static void px30_rgb_enable(struct rockchip_rgb *rgb, int pipe)
+static void px30_rgb_prepare(struct rockchip_rgb *rgb, int pipe)
 {
 	regmap_write(rgb->grf, PX30_GRF_PD_VO_CON1, PX30_RGB_VOP_SEL(pipe) |
 		     PX30_RGB_DATA_SYNC_BYPASS(!rgb->data_sync));
 }
 
 static const struct rockchip_rgb_funcs px30_rgb_funcs = {
-	.enable = px30_rgb_enable,
+	.prepare = px30_rgb_prepare,
 };
 
 static const struct rockchip_connector px30_rgb_driver_data = {
@@ -168,14 +171,14 @@ static const struct rockchip_connector px30_rgb_driver_data = {
 	 .data = &px30_rgb_funcs,
 };
 
-static void rk1808_rgb_enable(struct rockchip_rgb *rgb, int pipe)
+static void rk1808_rgb_prepare(struct rockchip_rgb *rgb, int pipe)
 {
 	regmap_write(rgb->grf, RK1808_GRF_PD_VO_CON1,
 		     RK1808_RGB_DATA_SYNC_BYPASS(!rgb->data_sync));
 }
 
 static const struct rockchip_rgb_funcs rk1808_rgb_funcs = {
-	.enable = rk1808_rgb_enable,
+	.prepare = rk1808_rgb_prepare,
 };
 
 static const struct rockchip_connector rk1808_rgb_driver_data = {
@@ -183,7 +186,7 @@ static const struct rockchip_connector rk1808_rgb_driver_data = {
 	.data = &rk1808_rgb_funcs,
 };
 
-static void rk3288_rgb_enable(struct rockchip_rgb *rgb, int pipe)
+static void rk3288_rgb_prepare(struct rockchip_rgb *rgb, int pipe)
 {
 	regmap_write(rgb->grf, RK3288_GRF_SOC_CON6, RK3288_LVDS_LCDC_SEL(pipe));
 	regmap_write(rgb->grf, RK3288_GRF_SOC_CON7,
@@ -192,7 +195,7 @@ static void rk3288_rgb_enable(struct rockchip_rgb *rgb, int pipe)
 		     RK3288_LVDS_CON_TTL_EN(1));
 }
 
-static void rk3288_rgb_disable(struct rockchip_rgb *rgb)
+static void rk3288_rgb_unprepare(struct rockchip_rgb *rgb)
 {
 	regmap_write(rgb->grf, RK3288_GRF_SOC_CON7,
 		     RK3288_LVDS_PWRDWN(1) | RK3288_LVDS_CON_ENABLE_2(0) |
@@ -200,8 +203,8 @@ static void rk3288_rgb_disable(struct rockchip_rgb *rgb)
 }
 
 static const struct rockchip_rgb_funcs rk3288_rgb_funcs = {
-	.enable = rk3288_rgb_enable,
-	.disable = rk3288_rgb_disable,
+	.prepare = rk3288_rgb_prepare,
+	.unprepare = rk3288_rgb_unprepare,
 };
 
 static const struct rockchip_connector rk3288_rgb_driver_data = {
@@ -209,13 +212,13 @@ static const struct rockchip_connector rk3288_rgb_driver_data = {
 	.data = &rk3288_rgb_funcs,
 };
 
-static void rk3368_rgb_enable(struct rockchip_rgb *rgb, int pipe)
+static void rk3368_rgb_prepare(struct rockchip_rgb *rgb, int pipe)
 {
 	regmap_write(rgb->grf, RK3368_GRF_SOC_CON15, RK3368_FORCE_JETAG(0));
 }
 
 static const struct rockchip_rgb_funcs rk3368_rgb_funcs = {
-	.enable = rk3368_rgb_enable,
+	.prepare = rk3368_rgb_prepare,
 };
 
 static const struct rockchip_connector rk3368_rgb_driver_data = {

commit 904b267d4b16a15b56f70c21183abf79b01ceea2
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Wed Mar 11 16:21:08 2020 +0800

    clk: rockchip: rk3036: add nandc clk init
    
    Change-Id: I8aefe310a366e346310135f684f3b5db43b0b734
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3036.h b/arch/arm/include/asm/arch-rockchip/cru_rk3036.h
index d908d9460f..572138171e 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3036.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3036.h
@@ -178,6 +178,15 @@ enum {
 	EMMC_DIV_SHIFT		= 0,
 	EMMC_DIV_MASK		= 0x7f << EMMC_DIV_SHIFT,
 
+	/* CRU_CLKSEL16_CON */
+	NANDC_DIV_SHIFT		= 10,
+	NANDC_DIV_MASK		= 0x1f << NANDC_DIV_SHIFT,
+	NANDC_PLL_SHIFT		= 8,
+	NANDC_PLL_MASK		= 3 << NANDC_PLL_SHIFT,
+	NANDC_SEL_APLL		= 0,
+	NANDC_SEL_DPLL,
+	NANDC_SEL_GPLL,
+
 	/* CRU_SOFTRST5_CON */
 	DDRCTRL_PSRST_SHIFT	= 11,
 	DDRCTRL_SRST_SHIFT	= 10,
diff --git a/drivers/clk/rockchip/clk_rk3036.c b/drivers/clk/rockchip/clk_rk3036.c
index 4b242b4b7b..b7c93584ec 100644
--- a/drivers/clk/rockchip/clk_rk3036.c
+++ b/drivers/clk/rockchip/clk_rk3036.c
@@ -104,6 +104,7 @@ static void rkclk_init(struct rk3036_cru *cru)
 	u32 aclk_div;
 	u32 hclk_div;
 	u32 pclk_div;
+	u32 nandc_div;
 
 	/* pll enter slow-mode */
 	rk_clrsetreg(&cru->cru_mode_con,
@@ -182,6 +183,13 @@ static void rkclk_init(struct rk3036_cru *cru)
 		     hclk_div << PERI_HCLK_DIV_SHIFT |
 		     aclk_div << PERI_ACLK_DIV_SHIFT);
 
+	nandc_div = DIV_ROUND_UP(GPLL_HZ, 150 * 1000000);
+
+	rk_clrsetreg(&cru->cru_clksel_con[16],
+		     NANDC_PLL_MASK | NANDC_DIV_MASK,
+		     NANDC_SEL_GPLL << NANDC_PLL_SHIFT |
+		     nandc_div << NANDC_DIV_SHIFT);
+
 	/* PLL enter normal-mode */
 	rk_clrsetreg(&cru->cru_mode_con,
 		     GPLL_MODE_MASK | APLL_MODE_MASK,

commit ddf875ab3d15e11934b40b9375b5c58904391514
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Wed Mar 11 11:38:19 2020 +0800

    clk: rockchip: rk3288: Reduce the hevc clock init frequency
    
    Solve the video clock high frequency reset problem.
    
    Change-Id: I2db4021d8c20d572bda045256360f4e9bed9f85c
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index ab346ef539..c4a57bbc67 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -152,6 +152,28 @@ enum {
 	PCLK_ALIVE_DIV_CON_SHIFT	= 8,
 	PCLK_ALIVE_DIV_CON_MASK		= 0x1f << PCLK_ALIVE_DIV_CON_SHIFT,
 
+	/* CLKSEL39 */
+	ACLK_HEVC_SEL_PLL_SHIFT		= 14,
+	ACLK_HEVC_SEL_PLL_MASK		= 0x3 << ACLK_HEVC_SEL_PLL_SHIFT,
+	ACLK_HEVC_SEL_CPLL		= 0,
+	ACLK_HEVC_SEL_GPLL,
+	ACLK_HEVC_DIV_CON_SHIFT		= 8,
+	ACLK_HEVC_DIV_CON_MASK		= 0x1f << ACLK_HEVC_DIV_CON_SHIFT,
+
+	/* CLKSEL42 */
+	CLK_HEVC_CORE_SEL_PLL_SHIFT	= 14,
+	CLK_HEVC_CORE_SEL_PLL_MASK	= 0x3 << CLK_HEVC_CORE_SEL_PLL_SHIFT,
+	CLK_HEVC_CORE_SEL_CPLL		= 0,
+	CLK_HEVC_CORE_SEL_GPLL,
+	CLK_HEVC_CORE_DIV_CON_SHIFT	= 8,
+	CLK_HEVC_CORE_DIV_CON_MASK	= 0x1f << CLK_HEVC_CORE_DIV_CON_SHIFT,
+	CLK_HEVC_CABAC_SEL_PLL_SHIFT	= 6,
+	CLK_HEVC_CABAC_SEL_PLL_MASK	= 0x3 << CLK_HEVC_CABAC_SEL_PLL_SHIFT,
+	CLK_HEVC_CABAC_SEL_CPLL		= 0,
+	CLK_HEVC_CABAC_SEL_GPLL,
+	CLK_HEVC_CABAC_DIV_CON_SHIFT	= 0,
+	CLK_HEVC_CABAC_DIV_CON_MASK	= 0x1f << CLK_HEVC_CABAC_DIV_CON_SHIFT,
+
 	SOCSTS_DPLL_LOCK	= 1 << 5,
 	SOCSTS_APLL_LOCK	= 1 << 6,
 	SOCSTS_CPLL_LOCK	= 1 << 7,
@@ -581,6 +603,18 @@ static void rkclk_init(struct rk3288_cru *cru, struct rk3288_grf *grf)
 		     hclk_div << PERI_HCLK_DIV_SHIFT |
 		     aclk_div << PERI_ACLK_DIV_SHIFT);
 
+	rk_clrsetreg(&cru->cru_clksel_con[39],
+		     ACLK_HEVC_SEL_PLL_MASK | ACLK_HEVC_DIV_CON_MASK,
+		     ACLK_HEVC_SEL_CPLL << ACLK_HEVC_SEL_PLL_SHIFT |
+		     4 << ACLK_HEVC_DIV_CON_SHIFT);
+	rk_clrsetreg(&cru->cru_clksel_con[42],
+		     CLK_HEVC_CORE_SEL_PLL_MASK | CLK_HEVC_CORE_DIV_CON_MASK |
+		     CLK_HEVC_CORE_SEL_PLL_MASK | CLK_HEVC_CORE_DIV_CON_MASK,
+		     CLK_HEVC_CORE_SEL_CPLL << CLK_HEVC_CORE_SEL_PLL_SHIFT |
+		     CLK_HEVC_CABAC_SEL_CPLL << CLK_HEVC_CABAC_DIV_CON_SHIFT |
+		     4 << CLK_HEVC_CORE_DIV_CON_SHIFT |
+		     4 << CLK_HEVC_CABAC_DIV_CON_SHIFT);
+
 	/* PLL enter normal-mode */
 	rk_clrsetreg(&cru->cru_mode_con,
 		     GPLL_MODE_MASK | CPLL_MODE_MASK,

commit cf04a17b62095fa2561abef40e8dc9e80f48518d
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Tue Mar 10 16:14:40 2020 +0800

    pinctrl/rockchip: add support for rv1126
    
    Change-Id: I177bbdf40d3becf848c054721f0986d7d3c6b1cd
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 5f17159808..1c6798a078 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -19,6 +19,7 @@
 enum rockchip_pinctrl_type {
 	PX30,
 	RV1108,
+	RV1126,
 	RK1808,
 	RK2928,
 	RK3066B,
@@ -40,6 +41,7 @@ enum rockchip_pinctrl_type {
 #define IOMUX_WIDTH_3BIT	BIT(4)
 #define IOMUX_8WIDTH_2BIT	BIT(5)
 #define IOMUX_WRITABLE_32BIT	BIT(6)
+#define IOMUX_L_SOURCE_PMU	BIT(7)
 
 /**
  * @type: iomux variant using IOMUX_* constants
@@ -422,6 +424,37 @@ static struct rockchip_mux_recalced_data rv1108_mux_recalced_data[] = {
 	},
 };
 
+static struct rockchip_mux_recalced_data rv1126_mux_recalced_data[] = {
+	{
+		.num = 0,
+		.pin = 20,
+		.reg = 0x10000,
+		.bit = 0,
+		.mask = 0xf
+	},
+	{
+		.num = 0,
+		.pin = 21,
+		.reg = 0x10000,
+		.bit = 4,
+		.mask = 0xf
+	},
+	{
+		.num = 0,
+		.pin = 22,
+		.reg = 0x10000,
+		.bit = 8,
+		.mask = 0xf
+	},
+	{
+		.num = 0,
+		.pin = 23,
+		.reg = 0x10000,
+		.bit = 12,
+		.mask = 0xf
+	},
+};
+
 static  struct rockchip_mux_recalced_data rk3128_mux_recalced_data[] = {
 	{
 		.num = 2,
@@ -1411,8 +1444,12 @@ static int rockchip_get_mux(struct rockchip_pin_bank *bank, int pin)
 	if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY)
 		return RK_FUNC_GPIO;
 
-	regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
-				? priv->regmap_pmu : priv->regmap_base;
+	if (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
+		regmap = priv->regmap_pmu;
+	else if (bank->iomux[iomux_num].type & IOMUX_L_SOURCE_PMU)
+		regmap = (pin % 8 < 4) ? priv->regmap_pmu : priv->regmap_base;
+	else
+		regmap = priv->regmap_base;
 
 	/* get basic quadrupel of mux registers and the correct reg inside */
 	mux_type = bank->iomux[iomux_num].type;
@@ -1504,8 +1541,12 @@ static int rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
 
 	debug("setting mux of GPIO%d-%d to %d\n", bank->bank_num, pin, mux);
 
-	regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
-				? priv->regmap_pmu : priv->regmap_base;
+	if (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
+		regmap = priv->regmap_pmu;
+	else if (bank->iomux[iomux_num].type & IOMUX_L_SOURCE_PMU)
+		regmap = (pin % 8 < 4) ? priv->regmap_pmu : priv->regmap_base;
+	else
+		regmap = priv->regmap_base;
 
 	/* get basic quadrupel of mux registers and the correct reg inside */
 	mux_type = bank->iomux[iomux_num].type;
@@ -1729,6 +1770,114 @@ static int rv1108_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank,
 	return 0;
 }
 
+#define RV1126_PULL_PMU_OFFSET		0x40
+#define RV1126_PULL_GRF_GPIO1A0_OFFSET		0x10108
+#define RV1126_PULL_PINS_PER_REG	8
+#define RV1126_PULL_BITS_PER_PIN	2
+#define RV1126_PULL_BANK_STRIDE		16
+#define RV1126_GPIO_C4_D7(p)	(p >= 20 && p <= 31) /* GPIO0_C4 ~ GPIO0_D7 */
+
+static void rv1126_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
+					 int pin_num, struct regmap **regmap,
+					 int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	/* The first 24 pins of the first bank are located in PMU */
+	if (bank->bank_num == 0) {
+		if (RV1126_GPIO_C4_D7(pin_num)) {
+			*regmap = priv->regmap_base;
+			*reg = RV1126_PULL_GRF_GPIO1A0_OFFSET;
+			*reg -= (((31 - pin_num) / RV1126_PULL_PINS_PER_REG + 1) * 4);
+			*bit = pin_num % RV1126_PULL_PINS_PER_REG;
+			*bit *= RV1126_PULL_BITS_PER_PIN;
+			return;
+		}
+		*regmap = priv->regmap_pmu;
+		*reg = RV1126_PULL_PMU_OFFSET;
+	} else {
+		*reg = RV1126_PULL_GRF_GPIO1A0_OFFSET;
+		*regmap = priv->regmap_base;
+		*reg += bank->bank_num * RV1126_PULL_BANK_STRIDE;
+	}
+
+	*reg += ((pin_num / RV1126_PULL_PINS_PER_REG) * 4);
+	*bit = (pin_num % RV1126_PULL_PINS_PER_REG);
+	*bit *= RV1126_PULL_BITS_PER_PIN;
+}
+
+#define RV1126_DRV_PMU_OFFSET		0x20
+#define RV1126_DRV_GRF_GPIO1A0_OFFSET		0x10090
+#define RV1126_DRV_BITS_PER_PIN		4
+#define RV1126_DRV_PINS_PER_REG		4
+#define RV1126_DRV_BANK_STRIDE		32
+
+static void rv1126_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
+					int pin_num, struct regmap **regmap,
+					int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	/* The first 24 pins of the first bank are located in PMU */
+	if (bank->bank_num == 0) {
+		if (RV1126_GPIO_C4_D7(pin_num)) {
+			*regmap = priv->regmap_base;
+			*reg = RV1126_DRV_GRF_GPIO1A0_OFFSET;
+			*reg -= (((31 - pin_num) / RV1126_DRV_PINS_PER_REG + 1) * 4);
+			*bit = pin_num % RV1126_DRV_PINS_PER_REG;
+			*bit *= RV1126_DRV_BITS_PER_PIN;
+			return;
+		}
+		*regmap = priv->regmap_pmu;
+		*reg = RV1126_DRV_PMU_OFFSET;
+	} else {
+		*regmap = priv->regmap_base;
+		*reg = RV1126_DRV_GRF_GPIO1A0_OFFSET;
+		*reg += bank->bank_num * RV1126_DRV_BANK_STRIDE;
+	}
+
+	*reg += ((pin_num / RV1126_DRV_PINS_PER_REG) * 4);
+	*bit = pin_num % RV1126_DRV_PINS_PER_REG;
+	*bit *= RV1126_DRV_BITS_PER_PIN;
+}
+
+#define RV1126_SCHMITT_PMU_OFFSET		0x60
+#define RV1126_SCHMITT_GRF_GPIO1A0_OFFSET		0x10188
+#define RV1126_SCHMITT_BANK_STRIDE		16
+#define RV1126_SCHMITT_PINS_PER_GRF_REG		8
+#define RV1126_SCHMITT_PINS_PER_PMU_REG		8
+
+static int rv1126_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank,
+					   int pin_num,
+					   struct regmap **regmap,
+					   int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	int pins_per_reg;
+
+	if (bank->bank_num == 0) {
+		if (RV1126_GPIO_C4_D7(pin_num)) {
+			*regmap = priv->regmap_base;
+			*reg = RV1126_SCHMITT_GRF_GPIO1A0_OFFSET;
+			*reg -= (((31 - pin_num) / RV1126_SCHMITT_PINS_PER_GRF_REG + 1) * 4);
+			*bit = pin_num % RV1126_SCHMITT_PINS_PER_GRF_REG;
+			return 0;
+		}
+		*regmap = priv->regmap_pmu;
+		*reg = RV1126_SCHMITT_PMU_OFFSET;
+		pins_per_reg = RV1126_SCHMITT_PINS_PER_PMU_REG;
+	} else {
+		*regmap = priv->regmap_base;
+		*reg = RV1126_SCHMITT_GRF_GPIO1A0_OFFSET;
+		pins_per_reg = RV1126_SCHMITT_PINS_PER_GRF_REG;
+		*reg += bank->bank_num * RV1126_SCHMITT_BANK_STRIDE;
+	}
+	*reg += ((pin_num / pins_per_reg) * 4);
+	*bit = pin_num % pins_per_reg;
+
+	return 0;
+}
+
 #define RK1808_PULL_PMU_OFFSET		0x10
 #define RK1808_PULL_GRF_OFFSET		0x80
 #define RK1808_PULL_PINS_PER_REG	8
@@ -2296,6 +2445,7 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank,
 		break;
 	case PX30:
 	case RV1108:
+	case RV1126:
 	case RK1808:
 	case RK3188:
 	case RK3288:
@@ -2453,6 +2603,7 @@ static bool rockchip_pinconf_pull_valid(struct rockchip_pin_ctrl *ctrl,
 		return pull ? false : true;
 	case PX30:
 	case RV1108:
+	case RV1126:
 	case RK1808:
 	case RK3188:
 	case RK3288:
@@ -2949,6 +3100,45 @@ static struct rockchip_pin_ctrl rv1108_pin_ctrl = {
 	.schmitt_calc_reg	= rv1108_calc_schmitt_reg_and_bit,
 };
 
+static struct rockchip_pin_bank rv1126_pin_banks[] = {
+	PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0",
+			     IOMUX_WIDTH_4BIT | IOMUX_SOURCE_PMU,
+			     IOMUX_WIDTH_4BIT | IOMUX_SOURCE_PMU,
+			     IOMUX_WIDTH_4BIT | IOMUX_L_SOURCE_PMU,
+			     IOMUX_WIDTH_4BIT),
+	PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1",
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT),
+	PIN_BANK_IOMUX_FLAGS(2, 32, "gpio2",
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT),
+	PIN_BANK_IOMUX_FLAGS(3, 32, "gpio3",
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT),
+	PIN_BANK_IOMUX_FLAGS(4, 2, "gpio4",
+			     IOMUX_WIDTH_4BIT, 0, 0, 0),
+};
+
+static struct rockchip_pin_ctrl rv1126_pin_ctrl = {
+	.pin_banks		= rv1126_pin_banks,
+	.nr_banks		= ARRAY_SIZE(rv1126_pin_banks),
+	.label			= "RV1126-GPIO",
+	.type			= RV1126,
+	.grf_mux_offset		= 0x10004, /* mux offset from GPIO0_D0 */
+	.pmu_mux_offset		= 0x0,
+	.iomux_recalced		= rv1126_mux_recalced_data,
+	.niomux_recalced	= ARRAY_SIZE(rv1126_mux_recalced_data),
+	.pull_calc_reg		= rv1126_calc_pull_reg_and_bit,
+	.drv_calc_reg		= rv1126_calc_drv_reg_and_bit,
+	.schmitt_calc_reg	= rv1126_calc_schmitt_reg_and_bit,
+};
+
 static struct rockchip_pin_bank rk1808_pin_banks[] = {
 	PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0",
 			     IOMUX_SOURCE_PMU,
@@ -3328,6 +3518,8 @@ static const struct udevice_id rockchip_pinctrl_dt_match[] = {
 		.data = (ulong)&px30_pin_ctrl },
 	{ .compatible = "rockchip,rv1108-pinctrl",
 		.data = (ulong)&rv1108_pin_ctrl },
+	{ .compatible = "rockchip,rv1126-pinctrl",
+		.data = (ulong)&rv1126_pin_ctrl },
 	{ .compatible = "rockchip,rk1808-pinctrl",
 		.data = (ulong)&rk1808_pin_ctrl },
 	{ .compatible = "rockchip,rk2928-pinctrl",

commit 979aa338cbf0c1b69ae48b3cd2ffd1b105d3733f
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Fri Mar 6 18:34:46 2020 +0800

    clk: rockchip: rv1126: Change SRST_MAC_PTPREF to SRST_GMAC_A
    
    Change-Id: Ic19b2f7602be02b11f3631ee29baf0fa8cbca074
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/include/dt-bindings/clock/rv1126-cru.h b/include/dt-bindings/clock/rv1126-cru.h
index 291155a9a8..17ffe93ce1 100644
--- a/include/dt-bindings/clock/rv1126-cru.h
+++ b/include/dt-bindings/clock/rv1126-cru.h
@@ -583,7 +583,7 @@
 #define SRST_USBPHYPOR_HOST	185
 #define SRST_PDGMAC_NIU_A	188
 #define SRST_PDGMAC_NIU_P	189
-#define SRST_MAC_PTPREF		190
+#define SRST_GMAC_A		190
 
 /* cru_softrst_con12 */
 #define SRST_DDR_DFICTL_P	193

commit c71b5c88cdea2928c7a1107d5e36f455c65d0067
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Fri Mar 6 17:04:15 2020 +0800

    clk: rockchip: rv1126: Fix aclk core mask and shift
    
    Change-Id: I75de46000b3fd289cbe527850cf2dd50048e3b62
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rv1126.h b/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
index 7f434eb053..f5661ccd89 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
@@ -192,10 +192,10 @@ enum {
 	CORE_HCLK_DIV_MASK	= 0x1f << CORE_HCLK_DIV_SHIFT,
 
 	/* CRU_CLK_SEL1_CON */
-	CORE_DBG_DIV_SHIFT	= 4,
-	CORE_DBG_DIV_MASK	= 0xf << CORE_DBG_DIV_SHIFT,
-	CORE_ACLK_DIV_SHIFT	= 0,
-	CORE_ACLK_DIV_MASK	= 0x07,
+	CORE_ACLK_DIV_SHIFT	= 4,
+	CORE_ACLK_DIV_MASK	= 0xf << CORE_ACLK_DIV_SHIFT,
+	CORE_DBG_DIV_SHIFT	= 0,
+	CORE_DBG_DIV_MASK	= 0x7,
 
 	/* CRU_CLK_SEL2_CON */
 	HCLK_PDBUS_SEL_SHIFT	= 15,

commit b92c7cf400d424dda241510805ee923429ef9afa
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Mar 6 18:17:51 2020 +0800

    spl: fit: add images information print
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I25e0b72b7f71158a2dbbc7c13e76a5d321e88acf

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 3be316f8ad..063d2b1a75 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -236,6 +236,10 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 #ifdef CONFIG_SPL_FIT_SIGNATURE
 	printf("## Checking hash(es) for Image %s ... ",
 	       fit_get_name(fit, node, NULL));
+#ifdef CONFIG_FIT_SPL_PRINT
+	printf("\n");
+	fit_image_print(fit, node, "");
+#endif
 	if (!fit_image_verify_with_data(fit, node,
 					 src, length))
 		return -EPERM;

commit f3219d9510da02d162cdc756dc96a38d7f6f105e
Author: Ben Whitten <ben.whitten@gmail.com>
Date:   Thu Jun 7 11:37:27 2018 +0100

    UPSTREAM: spl: fit: verify images prior to post processing
    
    Verification of hashes needs to take place before any image post
    processing, thus matching full FIT image processing.
    This allows mechanisms such as encryption be applied to images
    prior to fit generation at the spl level.
    
    Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
    (cherry picked from commit d154ca60036f060375ff3d80b2f1fbd2cd7de115)
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I1b923bbd8caaf411c502e7c9a1da0ed27bd50057
    
    Change-Id: I93e96c8d5585fa30b841805e8f470669fa3c03e5

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 9856ad5383..3be316f8ad 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -175,9 +175,6 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 	uint8_t image_comp = -1, type = -1;
 	const void *data;
 	bool external_data = false;
-#ifdef CONFIG_SPL_FIT_SIGNATURE
-	int ret;
-#endif
 
 	if (IS_ENABLED(CONFIG_SPL_OS_BOOT) && IS_ENABLED(CONFIG_SPL_GZIP)) {
 		if (fit_image_get_comp(fit, node, &image_comp))
@@ -236,6 +233,15 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 		src = (void *)data;
 	}
 
+#ifdef CONFIG_SPL_FIT_SIGNATURE
+	printf("## Checking hash(es) for Image %s ... ",
+	       fit_get_name(fit, node, NULL));
+	if (!fit_image_verify_with_data(fit, node,
+					 src, length))
+		return -EPERM;
+	puts("OK\n");
+#endif
+
 #ifdef CONFIG_SPL_FIT_IMAGE_POST_PROCESS
 	board_fit_image_post_process(&src, &length);
 #endif
@@ -261,16 +267,7 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 		image_info->entry_point = fdt_getprop_u32(fit, node, "entry");
 	}
 
-#ifdef CONFIG_SPL_FIT_SIGNATURE
-	printf("## Checking hash(es) for Image %s ...\n",
-	       fit_get_name(fit, node, NULL));
-	ret = fit_image_verify_with_data(fit, node,
-					 (const void *)load_addr, length);
-	printf("\n");
-	return !ret;
-#else
 	return 0;
-#endif
 }
 
 static int spl_fit_append_fdt(struct spl_image_info *spl_image,

commit c04fe8bf81b03bc0527300f894a067913440c2a3
Author: Michal Simek <michal.simek@xilinx.com>
Date:   Mon Mar 26 16:31:26 2018 +0200

    UPSTREAM: image: fit: Show firmware configuration property if present
    
    SPL ATF support requires to have firmware property which should be also
    listed by mkimage -l when images is created.
    
    The patch is also using this macro in spl_fit to match keyword.
    
    When image is created:
     Default Configuration: 'config'
     Configuration 0 (config)
      Description:  ATF with full u-boot
      Kernel:       unavailable
      Firmware:     atf
      FDT:          dtb
    
    Signed-off-by: Michal Simek <michal.simek@xilinx.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Jun Nie <jun.nie@linaro.org>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    (cherry picked from commit 1f8e4bf55eb58bda715c1f8c8777081580f3246b)
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I6ddc0d39005e4d30fd03ff7d45d57b152377f2ba
    
    Change-Id: I9ea4500329fc1f835860f204472ab8fb76f3e1bb

diff --git a/common/image-fit.c b/common/image-fit.c
index d1d4229f66..a60f234206 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -1693,6 +1693,10 @@ void fit_conf_print(const void *fit, int noffset, const char *p)
 	if (uname)
 		printf("%s  Init Ramdisk: %s\n", p, uname);
 
+	uname = fdt_getprop(fit, noffset, FIT_FIRMWARE_PROP, NULL);
+	if (uname)
+		printf("%s  Firmware:     %s\n", p, uname);
+
 	for (fdt_index = 0;
 	     uname = fdt_stringlist_get(fit, noffset, FIT_FDT_PROP,
 					fdt_index, NULL), uname;
diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 17e1f0bb52..9856ad5383 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -401,7 +401,8 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 	 *   - fall back to using the first 'loadables' entry
 	 */
 	if (node < 0)
-		node = spl_fit_get_image_node(fit, images, "firmware", 0);
+		node = spl_fit_get_image_node(fit, images, FIT_FIRMWARE_PROP,
+					      0);
 #ifdef CONFIG_SPL_OS_BOOT
 	if (node < 0)
 		node = spl_fit_get_image_node(fit, images, FIT_KERNEL_PROP, 0);
diff --git a/include/image.h b/include/image.h
index cc287e1fab..e3bee8774f 100644
--- a/include/image.h
+++ b/include/image.h
@@ -916,6 +916,7 @@ int bootz_setup(ulong image, ulong *start, ulong *end);
 #define FIT_DEFAULT_PROP	"default"
 #define FIT_SETUP_PROP		"setup"
 #define FIT_FPGA_PROP		"fpga"
+#define FIT_FIRMWARE_PROP	"firmware"
 
 #define FIT_MAX_HASH_LEN	HASH_MAX_DIGEST_SIZE
 

commit 0833bf5e4ebc978944965ccd325c2ad0ccef45c6
Author: Jun Nie <jun.nie@linaro.org>
Date:   Tue Feb 27 16:55:58 2018 +0800

    UPSTREAM: SPL: Add signature verification when loading image
    
    U-boot proper signature is not verified by SPL on most platforms
    even config SPL_FIT_SIGNATURE is enabled. Only fsl-layerscape
    platform support secure boot in platform specific code. So
    verified boot cannot be achieved if u-boot proper is loaded by
    SPL.
    
    This patch add signature verification to u-boot proper images
    when loading FIT image in SPL. It is tested on Allwinner bananapi
    zero board with H2+ SoC.
    
    Signed-off-by: Jun Nie <jun.nie@linaro.org>
    (cherry picked from commit 5c643db4cc95c6ac6457731cb5bb75d6896e415b)
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I8de83a4fd31ccdb2429e1eadec31b60642687149
    
    Change-Id: Ie1933cbbea0f5f9a68512ad3d43244e55a387d55

diff --git a/common/image-fit.c b/common/image-fit.c
index e8f42aac6a..d1d4229f66 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -1151,34 +1151,14 @@ static int fit_image_check_hash(const void *fit, int noffset, const void *data,
 	return 0;
 }
 
-/**
- * fit_image_verify - verify data integrity
- * @fit: pointer to the FIT format image header
- * @image_noffset: component image node offset
- *
- * fit_image_verify() goes over component image hash nodes,
- * re-calculates each data hash and compares with the value stored in hash
- * node.
- *
- * returns:
- *     1, if all hashes are valid
- *     0, otherwise (or on error)
- */
-int fit_image_verify(const void *fit, int image_noffset)
+int fit_image_verify_with_data(const void *fit, int image_noffset,
+			       const void *data, size_t size)
 {
-	const void	*data;
-	size_t		size;
 	int		noffset = 0;
 	char		*err_msg = "";
 	int verify_all = 1;
 	int ret;
 
-	/* Get image data and data length */
-	if (fit_image_get_data(fit, image_noffset, &data, &size)) {
-		err_msg = "Can't get image data/size";
-		goto error;
-	}
-
 	/* Verify all required signatures */
 	if (IMAGE_ENABLE_VERIFY &&
 	    fit_image_verify_required_sigs(fit, image_noffset, data, size,
@@ -1235,6 +1215,38 @@ error:
 	return 0;
 }
 
+/**
+ * fit_image_verify - verify data integrity
+ * @fit: pointer to the FIT format image header
+ * @image_noffset: component image node offset
+ *
+ * fit_image_verify() goes over component image hash nodes,
+ * re-calculates each data hash and compares with the value stored in hash
+ * node.
+ *
+ * returns:
+ *     1, if all hashes are valid
+ *     0, otherwise (or on error)
+ */
+int fit_image_verify(const void *fit, int image_noffset)
+{
+	const void	*data;
+	size_t		size;
+	int		noffset = 0;
+	char		*err_msg = "";
+
+	/* Get image data and data length */
+	if (fit_image_get_data(fit, image_noffset, &data, &size)) {
+		err_msg = "Can't get image data/size";
+		printf("error!\n%s for '%s' hash node in '%s' image node\n",
+		       err_msg, fit_get_name(fit, noffset, NULL),
+		       fit_get_name(fit, image_noffset, NULL));
+		return 0;
+	}
+
+	return fit_image_verify_with_data(fit, image_noffset, data, size);
+}
+
 /**
  * fit_all_image_verify - verify data integrity for all images
  * @fit: pointer to the FIT format image header
diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index a0419a1704..17e1f0bb52 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -175,6 +175,9 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 	uint8_t image_comp = -1, type = -1;
 	const void *data;
 	bool external_data = false;
+#ifdef CONFIG_SPL_FIT_SIGNATURE
+	int ret;
+#endif
 
 	if (IS_ENABLED(CONFIG_SPL_OS_BOOT) && IS_ENABLED(CONFIG_SPL_GZIP)) {
 		if (fit_image_get_comp(fit, node, &image_comp))
@@ -258,7 +261,16 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 		image_info->entry_point = fdt_getprop_u32(fit, node, "entry");
 	}
 
+#ifdef CONFIG_SPL_FIT_SIGNATURE
+	printf("## Checking hash(es) for Image %s ...\n",
+	       fit_get_name(fit, node, NULL));
+	ret = fit_image_verify_with_data(fit, node,
+					 (const void *)load_addr, length);
+	printf("\n");
+	return !ret;
+#else
 	return 0;
+#endif
 }
 
 static int spl_fit_append_fdt(struct spl_image_info *spl_image,
diff --git a/include/image.h b/include/image.h
index dab1afb02f..cc287e1fab 100644
--- a/include/image.h
+++ b/include/image.h
@@ -1014,6 +1014,8 @@ int fit_add_verification_data(const char *keydir, void *keydest, void *fit,
 			      const char *comment, int require_keys,
 			      const char *engine_id);
 
+int fit_image_verify_with_data(const void *fit, int image_noffset,
+			       const void *data, size_t size);
 int fit_image_verify(const void *fit, int noffset);
 int fit_config_verify(const void *fit, int conf_noffset);
 int fit_all_image_verify(const void *fit);

commit b86dc4195f38b5485788014794f2befd1fc2cc74
Author: Peng Fan <peng.fan@nxp.com>
Date:   Tue Dec 5 13:20:59 2017 +0800

    UPSTREAM: SPL: Add FIT data-position property support
    
    For external data, FIT has a optional property "data-position" which
    can set the external data to a fixed offset to FIT beginning.
    Add the support for this property in SPL FIT.
    
    Signed-off-by: Ye Li <ye.li@nxp.com>
    Signed-off-by: Peng Fan <peng.fan@nxp.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Tomas Melin <tomas.melin@vaisala.com>
    Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
    Cc: "Andrew F. Davis" <afd@ti.com>
    Cc: Igor Grinberg <grinberg@compulab.co.il>
    Cc: "tomas.melin@vaisala.com" <tomas.melin@vaisala.com>
    Cc: Kever Yang <kever.yang@rock-chips.com>
    Cc: Andre Przywara <andre.przywara@arm.com>
    Cc: York Sun <york.sun@nxp.com>
    Cc: Lokesh Vutla <lokeshvutla@ti.com>
    Cc: "Cooper Jr., Franklin" <fcooper@ti.com>
    Cc: George McCollister <george.mccollister@gmail.com>
    Cc: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
    Cc: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Cc: Rick Altherr <raltherr@google.com>
    Cc: Tom Rini <trini@konsulko.com>
    Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
    Reviewed-by: York Sun <york.sun@nxp.com>
    (cherry picked from commit a1be94b65410c7ebba5e7695478b6623579b410c)
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I1cdcfe0358e5a39fed3dfcf0554a7ba0e16729b8
    
    Change-Id: I44c3454addd85d70e6fba8e26b66a0278c5c1081

diff --git a/common/image-fit.c b/common/image-fit.c
index 0f7c779da5..e8f42aac6a 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -889,6 +889,31 @@ int fit_image_get_data_offset(const void *fit, int noffset, int *data_offset)
 	return 0;
 }
 
+/**
+ * Get 'data-position' property from a given image node.
+ *
+ * @fit: pointer to the FIT image header
+ * @noffset: component image node offset
+ * @data_position: holds the data-position property
+ *
+ * returns:
+ *     0, on success
+ *     -ENOENT if the property could not be found
+ */
+int fit_image_get_data_position(const void *fit, int noffset,
+				int *data_position)
+{
+	const fdt32_t *val;
+
+	val = fdt_getprop(fit, noffset, FIT_DATA_POSITION_PROP, NULL);
+	if (!val)
+		return -ENOENT;
+
+	*data_position = fdt32_to_cpu(*val);
+
+	return 0;
+}
+
 /**
  * Get 'data-size' property from a given image node.
  *
diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index d22f75af9a..a0419a1704 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -174,6 +174,7 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 	int align_len = ARCH_DMA_MINALIGN - 1;
 	uint8_t image_comp = -1, type = -1;
 	const void *data;
+	bool external_data = false;
 
 	if (IS_ENABLED(CONFIG_SPL_OS_BOOT) && IS_ENABLED(CONFIG_SPL_GZIP)) {
 		if (fit_image_get_comp(fit, node, &image_comp))
@@ -190,9 +191,15 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 	if (fit_image_get_load(fit, node, &load_addr))
 		load_addr = image_info->load_addr;
 
-	if (!fit_image_get_data_offset(fit, node, &offset)) {
-		/* External data */
+	if (!fit_image_get_data_position(fit, node, &offset)) {
+		external_data = true;
+	} else if (!fit_image_get_data_offset(fit, node, &offset)) {
 		offset += base_offset;
+		external_data = true;
+	}
+
+	if (external_data) {
+		/* External data */
 		if (fit_image_get_data_size(fit, node, &len))
 			return -ENOENT;
 
diff --git a/doc/uImage.FIT/source_file_format.txt b/doc/uImage.FIT/source_file_format.txt
index 6f727a1e8a..88663a161d 100644
--- a/doc/uImage.FIT/source_file_format.txt
+++ b/doc/uImage.FIT/source_file_format.txt
@@ -288,7 +288,8 @@ In this case the 'data' property is omitted. Instead you can use:
 
 The 'data-offset' property can be substituted with 'data-position', which
 defines an absolute position or address as the offset. This is helpful when
-booting U-Boot proper before performing relocation.
+booting U-Boot proper before performing relocation. Pass '-p [offset]' to
+mkimage to enable 'data-position'.
 
 Normal kernel FIT image has data embedded within FIT structure. U-Boot image
 for SPL boot has external data. Existence of 'data-offset' can be used to
diff --git a/include/image.h b/include/image.h
index 0f98102fef..dab1afb02f 100644
--- a/include/image.h
+++ b/include/image.h
@@ -895,6 +895,7 @@ int bootz_setup(ulong image, ulong *start, ulong *end);
 
 /* image node */
 #define FIT_DATA_PROP		"data"
+#define FIT_DATA_POSITION_PROP	"data-position"
 #define FIT_DATA_OFFSET_PROP	"data-offset"
 #define FIT_DATA_SIZE_PROP	"data-size"
 #define FIT_TIMESTAMP_PROP	"timestamp"
@@ -979,6 +980,8 @@ int fit_image_set_entry(const void *fit, int noffset, ulong entry);
 int fit_image_get_data(const void *fit, int noffset,
 				const void **data, size_t *size);
 int fit_image_get_data_offset(const void *fit, int noffset, int *data_offset);
+int fit_image_get_data_position(const void *fit, int noffset,
+				int *data_position);
 int fit_image_get_data_size(const void *fit, int noffset, int *data_size);
 
 int fit_image_hash_get_algo(const void *fit, int noffset, char **algo);

commit f3b140b1d35f09a572d0eb3db09e62453f9930ed
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Mar 6 15:22:53 2020 +0800

    rockchip: dts: rv1126/1109: change "u-boot,dm-pre-reloc" to "u-boot,dm-spl"
    
    Since we can just generate dtb with nodes which include "u-boot,dm-spl"
    in spl.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Iac2dc08af114d7f864e57298d7a01e7d72f98811

diff --git a/arch/arm/dts/rv1126-u-boot.dtsi b/arch/arm/dts/rv1126-u-boot.dtsi
index 7c84239601..49a564d41e 100644
--- a/arch/arm/dts/rv1126-u-boot.dtsi
+++ b/arch/arm/dts/rv1126-u-boot.dtsi
@@ -17,33 +17,33 @@
 
 &uart2 {
 	clock-frequency = <24000000>;
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 };
 
 &sdmmc {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 };
 
 &emmc {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 };
 
 &pmu {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 };
 
 &pmugrf {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 };
 
 &pmucru {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 };
 
 &cru {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 };
 
 &grf {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 };

commit c9dbd22f6d1b13b34e8c7bb3ad9684ec18d5639e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Mar 5 14:59:54 2020 +0800

    rockchip: dts: rv1126-evb: enable emmc node
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I239ee28a1ec357346c9aa6d1719a2e3075b90947

diff --git a/arch/arm/dts/rv1126-evb.dts b/arch/arm/dts/rv1126-evb.dts
index 70a72e5200..1ebfd2de3d 100644
--- a/arch/arm/dts/rv1126-evb.dts
+++ b/arch/arm/dts/rv1126-evb.dts
@@ -21,3 +21,7 @@
 &uart2 {
 	status = "okay";
 };
+
+&emmc {
+	status = "okay";
+};

commit 066e9bcbb9f7221a93007af165d72e21a1fcadbf
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 4 18:26:50 2020 +0800

    include: add rv1126 IRQ definitions
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I1c3c44befe9b667efd1012c20c7ba9b82c922ba7

diff --git a/include/irq-platform.h b/include/irq-platform.h
index c274270526..288a964e01 100644
--- a/include/irq-platform.h
+++ b/include/irq-platform.h
@@ -199,6 +199,27 @@
 #define GPIO_BANK_NUM			5
 #define GPIO_BANK_PINS			32
 
+#elif defined(CONFIG_ROCKCHIP_RV1126)
+#define GPIO0_PHYS			0xff460000
+#define GPIO1_PHYS			0xff620000
+#define GPIO2_PHYS			0xff630000
+#define GPIO3_PHYS			0xff640000
+#define GPIO4_PHYS			0xff650000
+
+#define GIC_IRQS_NR			(5 * 32)
+#define GPIO_IRQS_NR			(5 * 32)
+
+#define GPIO_BANK_NUM			5
+#define GPIO_BANK_PINS			32
+
+#define IRQ_USB_OTG			117
+#define IRQ_TIMER1			57
+#define IRQ_GPIO0			66
+#define IRQ_GPIO1			67
+#define IRQ_GPIO2			68
+#define IRQ_GPIO3			69
+#define IRQ_GPIO4			70
+
 #else
 "Missing define RIQ relative things"
 #endif
diff --git a/include/rk_timer_irq.h b/include/rk_timer_irq.h
index 6de549e281..93d7450f6f 100644
--- a/include/rk_timer_irq.h
+++ b/include/rk_timer_irq.h
@@ -60,6 +60,9 @@
 #elif defined(CONFIG_ROCKCHIP_RK1808)
 #define TIMER_BASE		(0xFF700000 + 0x20)	/* TIMER 1 */
 #define TIMER_IRQ		IRQ_TIMER1
+#elif defined(CONFIG_ROCKCHIP_RV1126)
+#define TIMER_BASE		(0xFF660000 + 0x20)	/* TIMER 1 */
+#define TIMER_IRQ		IRQ_TIMER1
 #else
 "Missing definitions of timer module test"
 #endif

commit 593e1e6d64717cf20867c0808b4a218887a85483
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 4 14:19:43 2020 +0800

    rockchip: dts: rv1126/1109: sync from kernel
    
    sync from: a96b35a clk: rockchip: rv1126: Add support for otp
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I12db524cf784479de567515f47da99df611a48ad

diff --git a/arch/arm/dts/rockchip-pinconf.dtsi b/arch/arm/dts/rockchip-pinconf.dtsi
new file mode 100644
index 0000000000..c13d024019
--- /dev/null
+++ b/arch/arm/dts/rockchip-pinconf.dtsi
@@ -0,0 +1,266 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd
+ */
+&pinctrl {
+
+	pcfg_pull_up: pcfg-pull-up {
+		bias-pull-up;
+	};
+
+	pcfg_pull_down: pcfg-pull-down {
+		bias-pull-down;
+	};
+
+	pcfg_pull_none: pcfg-pull-none {
+		bias-disable;
+	};
+
+	pcfg_pull_none_drv_level_0: pcfg-pull-none-drv-level-0 {
+		drive-strength = <0>;
+	};
+
+	pcfg_pull_none_drv_level_1: pcfg-pull-none-drv-level-1 {
+		drive-strength = <1>;
+	};
+
+	pcfg_pull_none_drv_level_2: pcfg-pull-none-drv-level-2 {
+		drive-strength = <2>;
+	};
+
+	pcfg_pull_none_drv_level_3: pcfg-pull-none-drv-level-3 {
+		drive-strength = <3>;
+	};
+
+	pcfg_pull_none_drv_level_4: pcfg-pull-none-drv-level-4 {
+		drive-strength = <4>;
+	};
+
+	pcfg_pull_none_drv_level_5: pcfg-pull-none-drv-level-5 {
+		drive-strength = <5>;
+	};
+
+	pcfg_pull_none_drv_level_6: pcfg-pull-none-drv-level-6 {
+		drive-strength = <6>;
+	};
+
+	pcfg_pull_none_drv_level_7: pcfg-pull-none-drv-level-7 {
+		drive-strength = <7>;
+	};
+
+	pcfg_pull_none_drv_level_8: pcfg-pull-none-drv-level-8 {
+		drive-strength = <8>;
+	};
+
+	pcfg_pull_none_drv_level_9: pcfg-pull-none-drv-level-9 {
+		drive-strength = <9>;
+	};
+
+	pcfg_pull_none_drv_level_10: pcfg-pull-none-drv-level-10 {
+		drive-strength = <10>;
+	};
+
+	pcfg_pull_none_drv_level_11: pcfg-pull-none-drv-level-11 {
+		drive-strength = <11>;
+	};
+
+	pcfg_pull_none_drv_level_12: pcfg-pull-none-drv-level-12 {
+		drive-strength = <12>;
+	};
+
+	pcfg_pull_none_drv_level_13: pcfg-pull-none-drv-level-13 {
+		drive-strength = <13>;
+	};
+
+	pcfg_pull_none_drv_level_14: pcfg-pull-none-drv-level-14 {
+		drive-strength = <14>;
+	};
+
+	pcfg_pull_none_drv_level_15: pcfg-pull-none-drv-level-15 {
+		drive-strength = <15>;
+	};
+
+	pcfg_pull_up_drv_level_0: pcfg-pull-up-drv-level-0 {
+		bias-pull-up;
+		drive-strength = <0>;
+	};
+
+	pcfg_pull_up_drv_level_1: pcfg-pull-up-drv-level-1 {
+		bias-pull-up;
+		drive-strength = <1>;
+	};
+
+	pcfg_pull_up_drv_level_2: pcfg-pull-up-drv-level-2 {
+		bias-pull-up;
+		drive-strength = <2>;
+	};
+
+	pcfg_pull_up_drv_level_3: pcfg-pull-up-drv-level-3 {
+		bias-pull-up;
+		drive-strength = <3>;
+	};
+
+	pcfg_pull_up_drv_level_4: pcfg-pull-up-drv-level-4 {
+		bias-pull-up;
+		drive-strength = <4>;
+	};
+
+	pcfg_pull_up_drv_level_5: pcfg-pull-up-drv-level-5 {
+		bias-pull-up;
+		drive-strength = <5>;
+	};
+
+	pcfg_pull_up_drv_level_6: pcfg-pull-up-drv-level-6 {
+		bias-pull-up;
+		drive-strength = <6>;
+	};
+
+	pcfg_pull_up_drv_level_7: pcfg-pull-up-drv-level-7 {
+		bias-pull-up;
+		drive-strength = <7>;
+	};
+
+	pcfg_pull_up_drv_level_8: pcfg-pull-up-drv-level-8 {
+		bias-pull-up;
+		drive-strength = <8>;
+	};
+
+	pcfg_pull_up_drv_level_9: pcfg-pull-up-drv-level-9 {
+		bias-pull-up;
+		drive-strength = <9>;
+	};
+
+	pcfg_pull_up_drv_level_10: pcfg-pull-up-drv-level-10 {
+		bias-pull-up;
+		drive-strength = <10>;
+	};
+
+	pcfg_pull_up_drv_level_11: pcfg-pull-up-drv-level-11 {
+		bias-pull-up;
+		drive-strength = <11>;
+	};
+
+	pcfg_pull_up_drv_level_12: pcfg-pull-up-drv-level-12 {
+		bias-pull-up;
+		drive-strength = <12>;
+	};
+
+	pcfg_pull_up_drv_level_13: pcfg-pull-up-drv-level-13 {
+		bias-pull-up;
+		drive-strength = <13>;
+	};
+
+	pcfg_pull_up_drv_level_14: pcfg-pull-up-drv-level-14 {
+		bias-pull-up;
+		drive-strength = <14>;
+	};
+
+	pcfg_pull_up_drv_level_15: pcfg-pull-up-drv-level-15 {
+		bias-pull-up;
+		drive-strength = <15>;
+	};
+
+	pcfg_pull_down_drv_level_0: pcfg-pull-down-drv-level-0 {
+		bias-pull-down;
+		drive-strength = <0>;
+	};
+
+	pcfg_pull_down_drv_level_1: pcfg-pull-up-drv-level-1 {
+		bias-pull-up;
+		drive-strength = <1>;
+	};
+
+	pcfg_pull_down_drv_level_2: pcfg-pull-up-drv-level-2 {
+		bias-pull-up;
+		drive-strength = <2>;
+	};
+
+	pcfg_pull_down_drv_level_3: pcfg-pull-up-drv-level-3 {
+		bias-pull-up;
+		drive-strength = <3>;
+	};
+
+	pcfg_pull_down_drv_level_4: pcfg-pull-up-drv-level-4 {
+		bias-pull-up;
+		drive-strength = <4>;
+	};
+
+	pcfg_pull_down_drv_level_5: pcfg-pull-up-drv-level-5 {
+		bias-pull-up;
+		drive-strength = <5>;
+	};
+
+	pcfg_pull_down_drv_level_6: pcfg-pull-up-drv-level-6 {
+		bias-pull-up;
+		drive-strength = <6>;
+	};
+
+	pcfg_pull_down_drv_level_7: pcfg-pull-up-drv-level-7 {
+		bias-pull-up;
+		drive-strength = <7>;
+	};
+
+	pcfg_pull_down_drv_level_8: pcfg-pull-up-drv-level-8 {
+		bias-pull-up;
+		drive-strength = <8>;
+	};
+
+	pcfg_pull_down_drv_level_9: pcfg-pull-up-drv-level-9 {
+		bias-pull-up;
+		drive-strength = <9>;
+	};
+
+	pcfg_pull_down_drv_level_10: pcfg-pull-up-drv-level-10 {
+		bias-pull-up;
+		drive-strength = <10>;
+	};
+
+	pcfg_pull_down_drv_level_11: pcfg-pull-up-drv-level-11 {
+		bias-pull-up;
+		drive-strength = <11>;
+	};
+
+	pcfg_pull_down_drv_level_12: pcfg-pull-up-drv-level-12 {
+		bias-pull-up;
+		drive-strength = <12>;
+	};
+
+	pcfg_pull_down_drv_level_13: pcfg-pull-up-drv-level-13 {
+		bias-pull-up;
+		drive-strength = <13>;
+	};
+
+	pcfg_pull_down_drv_level_14: pcfg-pull-up-drv-level-14 {
+		bias-pull-up;
+		drive-strength = <14>;
+	};
+
+	pcfg_pull_down_drv_level_15: pcfg-pull-up-drv-level-15 {
+		bias-pull-up;
+		drive-strength = <15>;
+	};
+
+	pcfg_pull_up_smt: pcfg-pull-up-smt {
+		bias-pull-up;
+		input-schmitt-enable;
+	};
+
+	pcfg_pull_down_smt: pcfg-pull-down-smt {
+		bias-pull-down;
+		input-schmitt-enable;
+	};
+
+	pcfg_pull_none_smt: pcfg-pull-none-smt {
+		bias-disable;
+		input-schmitt-enable;
+	};
+
+	pcfg_output_high: pcfg-output-high {
+		output-high;
+	};
+
+	pcfg_output_low: pcfg-output-low {
+		output-low;
+	};
+};
+
diff --git a/arch/arm/dts/rv1109-evb-ddr3-v10.dts b/arch/arm/dts/rv1109-evb-ddr3-v10.dts
new file mode 100644
index 0000000000..cc71c36556
--- /dev/null
+++ b/arch/arm/dts/rv1109-evb-ddr3-v10.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd.
+ */
+
+/dts-v1/;
+
+#include "rv1109-evb-v10.dtsi"
+
+/ {
+	model = "Rockchip RV1109 EVB DDR3 Board";
+	compatible = "rockchip,rv1109-evb-ddr3-v10", "rockchip,rv1109";
+
+	chosen {
+		bootargs = "clk_ignore_unused earlycon=uart8250,mmio32,0xff570000 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rootfstype=ext4 rootwait";
+	};
+};
diff --git a/arch/arm/dts/rv1109-evb-v10.dtsi b/arch/arm/dts/rv1109-evb-v10.dtsi
new file mode 100644
index 0000000000..6ffb60883f
--- /dev/null
+++ b/arch/arm/dts/rv1109-evb-v10.dtsi
@@ -0,0 +1,68 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd.
+ */
+
+/dts-v1/;
+
+#include "rv1109.dtsi"
+
+/ {
+	model = "Rockchip RV1109 EVB Board";
+	compatible = "rockchip,rv1109-evb-v10", "rockchip,rv1109";
+};
+
+&emmc {
+	bus-width = <8>;
+	cap-mmc-highspeed;
+	non-removable;
+	mmc-hs200-1_8v;
+	rockchip,default-sample-phase = <90>;
+	supports-emmc;
+	status = "okay";
+};
+
+&fiq_debugger {
+	status = "okay";
+};
+
+&gmac {
+	phy-mode = "rgmii";
+	clock_in_out = "input";
+	snps,reset-gpio = <&gpio2 RK_PC0 GPIO_ACTIVE_LOW>;
+	snps,reset-active-low;
+	/* Reset time is 20ms, 100ms for rtl8211f */
+	snps,reset-delays-us = <0 20000 100000>;
+	assigned-clocks = <&cru CLK_GMAC_SRC>;
+	assigned-clock-parents = <&cru CLK_GMAC_RGMII_M1>;
+	assigned-clocks = <&cru CLK_GMAC_ETHERNET_OUT>;
+	assigned-clock-rates = <25000000>;
+	tx_delay = <0x40>;
+	rx_delay = <0x3a>;
+	status = "okay";
+};
+
+&sdmmc {
+	bus-width = <4>;
+	cap-mmc-highspeed;
+	cap-sd-highspeed;
+	card-detect-delay = <200>;
+	rockchip,default-sample-phase = <90>;
+	supports-sd;
+	sd-uhs-sdr12;
+	sd-uhs-sdr25;
+	sd-uhs-sdr104;
+	status = "okay";
+};
+
+&sdio {
+	bus-width = <4>;
+	cap-sd-highspeed;
+	cap-sdio-irq;
+	keep-power-in-suspend;
+	non-removable;
+	rockchip,default-sample-phase = <90>;
+	sd-uhs-sdr104;
+	supports-sdio;
+	status = "okay";
+};
diff --git a/arch/arm/dts/rv1109.dtsi b/arch/arm/dts/rv1109.dtsi
new file mode 100644
index 0000000000..98da788a03
--- /dev/null
+++ b/arch/arm/dts/rv1109.dtsi
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd.
+ */
+
+/dts-v1/;
+
+#include "rv1126.dtsi"
+
+/ {
+	compatible = "rockchip,rv1109";
+
+	cpus {
+		/delete-node/ cpu@f02;
+		/delete-node/ cpu@f03;
+	};
+
+	arm-pmu {
+		interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-affinity = <&cpu0>, <&cpu1>;
+	};
+};
+
diff --git a/arch/arm/dts/rv1126-dram-default-timing.dtsi b/arch/arm/dts/rv1126-dram-default-timing.dtsi
new file mode 100644
index 0000000000..019e7f4387
--- /dev/null
+++ b/arch/arm/dts/rv1126-dram-default-timing.dtsi
@@ -0,0 +1,303 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <dt-bindings/clock/rockchip-ddr.h>
+#include <dt-bindings/memory/rv1126-dram.h>
+
+/ {
+	ddr_timing: ddr_timing {
+		compatible = "rockchip,ddr-timing";
+		ddr2_speed_bin = <DDR2_DEFAULT>;
+		ddr3_speed_bin = <DDR3_DEFAULT>;
+		ddr4_speed_bin = <DDR4_DEFAULT>;
+		pd_idle = <0>;
+		sr_idle = <0>;
+		sr_mc_gate_idle = <0>;
+		srpd_lite_idle = <0>;
+		standby_idle = <0>;
+
+		auto_pd_dis_freq = <1066>;
+		auto_sr_dis_freq = <800>;
+		ddr2_dll_dis_freq = <300>;
+		ddr3_dll_dis_freq = <300>;
+		ddr4_dll_dis_freq = <625>;
+		phy_dll_dis_freq = <400>;
+
+		ddr2_odt_dis_freq = <100>;
+		phy_ddr2_odt_dis_freq = <100>;
+		ddr2_drv = <DDR2_DS_REDUCE>;
+		ddr2_odt = <DDR2_ODT_150ohm>;
+		phy_ddr2_ca_drv = <PHY_DDR3_RON_34ohm>;
+		phy_ddr2_ck_drv = <PHY_DDR3_RON_42ohm>;
+		phy_ddr2_dq_drv = <PHY_DDR3_RON_34ohm>;
+		phy_ddr2_odt = <PHY_DDR3_RTT_241ohm>;
+
+		ddr3_odt_dis_freq = <400>;
+		phy_ddr3_odt_dis_freq = <400>;
+		ddr3_drv = <DDR3_DS_40ohm>;
+		ddr3_odt = <DDR3_ODT_120ohm>;
+		phy_ddr3_ca_drv = <PHY_DDR3_RON_34ohm>;
+		phy_ddr3_ck_drv = <PHY_DDR3_RON_42ohm>;
+		phy_ddr3_dq_drv = <PHY_DDR3_RON_34ohm>;
+		phy_ddr3_odt = <PHY_DDR3_RTT_241ohm>;
+
+		phy_lpddr2_odt_dis_freq = <666>;
+		lpddr2_drv = <LP2_DS_40ohm>;
+		phy_lpddr2_ca_drv = <PHY_DDR4_LPDDR3_RON_34ohm>;
+		phy_lpddr2_ck_drv = <PHY_DDR4_LPDDR3_RON_41ohm>;
+		phy_lpddr2_dq_drv = <PHY_DDR4_LPDDR3_RON_34ohm>;
+		phy_lpddr2_odt = <PHY_DDR4_LPDDR3_RTT_DISABLE>;
+
+		lpddr3_odt_dis_freq = <400>;
+		phy_lpddr3_odt_dis_freq = <400>;
+		lpddr3_drv = <LP3_DS_40ohm>;
+		lpddr3_odt = <LP3_ODT_240ohm>;
+		phy_lpddr3_ca_drv = <PHY_DDR4_LPDDR3_RON_34ohm>;
+		phy_lpddr3_ck_drv = <PHY_DDR4_LPDDR3_RON_41ohm>;
+		phy_lpddr3_dq_drv = <PHY_DDR4_LPDDR3_RON_34ohm>;
+		phy_lpddr3_odt = <PHY_DDR4_LPDDR3_RTT_247ohm>;
+
+		lpddr4_odt_dis_freq = <800>;
+		phy_lpddr4_odt_dis_freq = <800>;
+		lpddr4_drv = <LP4_PDDS_60ohm>;
+		lpddr4_dq_odt = <LP4_DQ_ODT_40ohm>;
+		lpddr4_ca_odt = <LP4_CA_ODT_40ohm>;
+		phy_lpddr4_ca_drv = <PHY_LPDDR4_RON_34ohm>;
+		phy_lpddr4_ck_cs_drv = <PHY_LPDDR4_RON_43ohm>;
+		phy_lpddr4_dq_drv = <PHY_LPDDR4_RON_34ohm>;
+		phy_lpddr4_odt = <PHY_LPDDR4_RTT_253ohm>;
+
+		ddr4_odt_dis_freq = <666>;
+		phy_ddr4_odt_dis_freq = <666>;
+		ddr4_drv = <DDR4_DS_34ohm>;
+		ddr4_odt = <DDR4_RTT_NOM_240ohm>;
+		phy_ddr4_ca_drv = <PHY_DDR4_LPDDR3_RON_34ohm>;
+		phy_ddr4_ck_drv = <PHY_DDR4_LPDDR3_RON_41ohm>;
+		phy_ddr4_dq_drv = <PHY_DDR4_LPDDR3_RON_34ohm>;
+		phy_ddr4_odt = <PHY_DDR4_LPDDR3_RTT_247ohm>;
+
+		/*
+		 * CA de-skew, one step is 20ps, range 0-63
+		 * name rule: ddr4(pad_name)_ddr3_lpddr3_lpddr4_de-skew
+		 */
+		a0_a3_a3_cke1-a_de-skew = <7>;
+		a1_ba1_null_cke0-b_de-skew = <7>;
+		a2_a9_a9_a4-a_de-skew = <7>;
+		a3_a15_null_a5-b_de-skew = <7>;
+		a4_a6_a6_ck-a_de-skew = <7>;
+		a5_a12_null_odt0-b_de-skew = <7>;
+		a6_ba2_null_a0-a_de-skew = <7>;
+		a7_a4_a4_odt0-a_de-skew = <7>;
+		a8_a1_a1_cke0-a_de-skew = <7>;
+		a9_a5_a5_a5-a_de-skew = <7>;
+		a10_a8_a8_clkb-a_de-skew = <7>;
+		a11_a7_a7_ca2-a_de-skew = <7>;
+		a12_rasn_null_ca1-a_de-skew = <7>;
+		a13_a13_null_ca3-a_de-skew = <7>;
+		a14_a14_null_csb1-b_de-skew = <7>;
+		a15_a10_null_ca0-b_de-skew = <7>;
+		a16_a11_null_csb0-b_de-skew = <7>;
+		a17_null_null_null_de-skew = <7>;
+		ba0_csb1_csb1_csb0-a_de-skew = <7>;
+		ba1_wen_null_cke1-b_de-skew = <7>;
+		bg0_odt1_odt1_csb1-a_de-skew = <7>;
+		bg1_a2_a2_odt1-a_de-skew = <7>;
+		cke0_casb_null_ca1-b_de-skew = <7>;
+		ck_ck_ck_ck-b_de-skew = <7>;
+		ckb_ckb_ckb_ckb-b_de-skew = <7>;
+		csb0_odt0_odt0_ca2-b_de-skew = <7>;
+		odt0_csb0_csb0_ca4-b_de-skew = <7>;
+		resetn_resetn_null-resetn_de-skew = <7>;
+		actn_cke_cke_ca3-b_de-skew = <7>;
+		cke1_null_null_null_de-skew = <7>;
+		csb1_ba0_null_null_de-skew = <7>;
+		odt1_a0_a0_odt1-b_de-skew = <7>;
+
+		/* DATA de-skew, one step is 20ps, range 0-63 */
+		/* cs0_skew_a */
+		cs0_dm0_rx_de-skew = <7>;
+		cs0_dq0_rx_de-skew = <7>;
+		cs0_dq1_rx_de-skew = <7>;
+		cs0_dq2_rx_de-skew = <7>;
+		cs0_dq3_rx_de-skew = <7>;
+		cs0_dq4_rx_de-skew = <7>;
+		cs0_dq5_rx_de-skew = <7>;
+		cs0_dq6_rx_de-skew = <7>;
+		cs0_dq7_rx_de-skew = <7>;
+		cs0_dqs0p_rx_de-skew = <14>;
+		cs0_dqs0n_rx_de-skew = <14>;
+		cs0_dm1_rx_de-skew = <7>;
+		cs0_dq8_rx_de-skew = <7>;
+		cs0_dq9_rx_de-skew = <7>;
+		cs0_dq10_rx_de-skew = <7>;
+		cs0_dq11_rx_de-skew = <7>;
+		cs0_dq12_rx_de-skew = <7>;
+		cs0_dq13_rx_de-skew = <7>;
+		cs0_dq14_rx_de-skew = <7>;
+		cs0_dq15_rx_de-skew = <7>;
+		cs0_dqs1p_rx_de-skew = <14>;
+		cs0_dqs1n_rx_de-skew = <14>;
+		cs0_dm0_tx_de-skew = <7>;
+		cs0_dq0_tx_de-skew = <7>;
+		cs0_dq1_tx_de-skew = <7>;
+		cs0_dq2_tx_de-skew = <7>;
+		cs0_dq3_tx_de-skew = <7>;
+		cs0_dq4_tx_de-skew = <7>;
+		cs0_dq5_tx_de-skew = <7>;
+		cs0_dq6_tx_de-skew = <7>;
+		cs0_dq7_tx_de-skew = <7>;
+		cs0_dqs0p_tx_de-skew = <7>;
+		cs0_dqs0n_tx_de-skew = <7>;
+		cs0_dm1_tx_de-skew = <7>;
+		cs0_dq8_tx_de-skew = <7>;
+		cs0_dq9_tx_de-skew = <7>;
+		cs0_dq10_tx_de-skew = <7>;
+		cs0_dq11_tx_de-skew = <7>;
+		cs0_dq12_tx_de-skew = <7>;
+		cs0_dq13_tx_de-skew = <7>;
+		cs0_dq14_tx_de-skew = <7>;
+		cs0_dq15_tx_de-skew = <7>;
+		cs0_dqs1p_tx_de-skew = <7>;
+		cs0_dqs1n_tx_de-skew = <7>;
+
+		/* cs0_skew_b */
+		cs0_dm2_rx_de-skew = <7>;
+		cs0_dq16_rx_de-skew = <7>;
+		cs0_dq17_rx_de-skew = <7>;
+		cs0_dq18_rx_de-skew = <7>;
+		cs0_dq19_rx_de-skew = <7>;
+		cs0_dq20_rx_de-skew = <7>;
+		cs0_dq21_rx_de-skew = <7>;
+		cs0_dq22_rx_de-skew = <7>;
+		cs0_dq23_rx_de-skew = <7>;
+		cs0_dqs2p_rx_de-skew = <14>;
+		cs0_dqs2n_rx_de-skew = <14>;
+		cs0_dm3_rx_de-skew = <7>;
+		cs0_dq24_rx_de-skew = <7>;
+		cs0_dq25_rx_de-skew = <7>;
+		cs0_dq26_rx_de-skew = <7>;
+		cs0_dq27_rx_de-skew = <7>;
+		cs0_dq28_rx_de-skew = <7>;
+		cs0_dq29_rx_de-skew = <7>;
+		cs0_dq30_rx_de-skew = <7>;
+		cs0_dq31_rx_de-skew = <7>;
+		cs0_dqs3p_rx_de-skew = <14>;
+		cs0_dqs3n_rx_de-skew = <14>;
+		cs0_dm2_tx_de-skew = <7>;
+		cs0_dq16_tx_de-skew = <7>;
+		cs0_dq17_tx_de-skew = <7>;
+		cs0_dq18_tx_de-skew = <7>;
+		cs0_dq19_tx_de-skew = <7>;
+		cs0_dq20_tx_de-skew = <7>;
+		cs0_dq21_tx_de-skew = <7>;
+		cs0_dq22_tx_de-skew = <7>;
+		cs0_dq23_tx_de-skew = <7>;
+		cs0_dqs2p_tx_de-skew = <7>;
+		cs0_dqs2n_tx_de-skew = <7>;
+		cs0_dm3_tx_de-skew = <7>;
+		cs0_dq24_tx_de-skew = <7>;
+		cs0_dq25_tx_de-skew = <7>;
+		cs0_dq26_tx_de-skew = <7>;
+		cs0_dq27_tx_de-skew = <7>;
+		cs0_dq28_tx_de-skew = <7>;
+		cs0_dq29_tx_de-skew = <7>;
+		cs0_dq30_tx_de-skew = <7>;
+		cs0_dq31_tx_de-skew = <7>;
+		cs0_dqs3p_tx_de-skew = <7>;
+		cs0_dqs3n_tx_de-skew = <7>;
+
+		/* cs1_skew_a */
+		cs1_dm0_rx_de-skew = <7>;
+		cs1_dq0_rx_de-skew = <7>;
+		cs1_dq1_rx_de-skew = <7>;
+		cs1_dq2_rx_de-skew = <7>;
+		cs1_dq3_rx_de-skew = <7>;
+		cs1_dq4_rx_de-skew = <7>;
+		cs1_dq5_rx_de-skew = <7>;
+		cs1_dq6_rx_de-skew = <7>;
+		cs1_dq7_rx_de-skew = <7>;
+		cs1_dqs0p_rx_de-skew = <14>;
+		cs1_dqs0n_rx_de-skew = <14>;
+		cs1_dm1_rx_de-skew = <7>;
+		cs1_dq8_rx_de-skew = <7>;
+		cs1_dq9_rx_de-skew = <7>;
+		cs1_dq10_rx_de-skew = <7>;
+		cs1_dq11_rx_de-skew = <7>;
+		cs1_dq12_rx_de-skew = <7>;
+		cs1_dq13_rx_de-skew = <7>;
+		cs1_dq14_rx_de-skew = <7>;
+		cs1_dq15_rx_de-skew = <7>;
+		cs1_dqs1p_rx_de-skew = <14>;
+		cs1_dqs1n_rx_de-skew = <14>;
+		cs1_dm0_tx_de-skew = <7>;
+		cs1_dq0_tx_de-skew = <7>;
+		cs1_dq1_tx_de-skew = <7>;
+		cs1_dq2_tx_de-skew = <7>;
+		cs1_dq3_tx_de-skew = <7>;
+		cs1_dq4_tx_de-skew = <7>;
+		cs1_dq5_tx_de-skew = <7>;
+		cs1_dq6_tx_de-skew = <7>;
+		cs1_dq7_tx_de-skew = <7>;
+		cs1_dqs0p_tx_de-skew = <7>;
+		cs1_dqs0n_tx_de-skew = <7>;
+		cs1_dm1_tx_de-skew = <7>;
+		cs1_dq8_tx_de-skew = <7>;
+		cs1_dq9_tx_de-skew = <7>;
+		cs1_dq10_tx_de-skew = <7>;
+		cs1_dq11_tx_de-skew = <7>;
+		cs1_dq12_tx_de-skew = <7>;
+		cs1_dq13_tx_de-skew = <7>;
+		cs1_dq14_tx_de-skew = <7>;
+		cs1_dq15_tx_de-skew = <7>;
+		cs1_dqs1p_tx_de-skew = <7>;
+		cs1_dqs1n_tx_de-skew = <7>;
+
+		/* cs1_skew_b */
+		cs1_dm2_rx_de-skew = <7>;
+		cs1_dq16_rx_de-skew = <7>;
+		cs1_dq17_rx_de-skew = <7>;
+		cs1_dq18_rx_de-skew = <7>;
+		cs1_dq19_rx_de-skew = <7>;
+		cs1_dq20_rx_de-skew = <7>;
+		cs1_dq21_rx_de-skew = <7>;
+		cs1_dq22_rx_de-skew = <7>;
+		cs1_dq23_rx_de-skew = <7>;
+		cs1_dqs2p_rx_de-skew = <14>;
+		cs1_dqs2n_rx_de-skew = <14>;
+		cs1_dm3_rx_de-skew = <7>;
+		cs1_dq24_rx_de-skew = <7>;
+		cs1_dq25_rx_de-skew = <7>;
+		cs1_dq26_rx_de-skew = <7>;
+		cs1_dq27_rx_de-skew = <7>;
+		cs1_dq28_rx_de-skew = <7>;
+		cs1_dq29_rx_de-skew = <7>;
+		cs1_dq30_rx_de-skew = <7>;
+		cs1_dq31_rx_de-skew = <7>;
+		cs1_dqs3p_rx_de-skew = <14>;
+		cs1_dqs3n_rx_de-skew = <14>;
+		cs1_dm2_tx_de-skew = <7>;
+		cs1_dq16_tx_de-skew = <7>;
+		cs1_dq17_tx_de-skew = <7>;
+		cs1_dq18_tx_de-skew = <7>;
+		cs1_dq19_tx_de-skew = <7>;
+		cs1_dq20_tx_de-skew = <7>;
+		cs1_dq21_tx_de-skew = <7>;
+		cs1_dq22_tx_de-skew = <7>;
+		cs1_dq23_tx_de-skew = <7>;
+		cs1_dqs2p_tx_de-skew = <7>;
+		cs1_dqs2n_tx_de-skew = <7>;
+		cs1_dm3_tx_de-skew = <7>;
+		cs1_dq24_tx_de-skew = <7>;
+		cs1_dq25_tx_de-skew = <7>;
+		cs1_dq26_tx_de-skew = <7>;
+		cs1_dq27_tx_de-skew = <7>;
+		cs1_dq28_tx_de-skew = <7>;
+		cs1_dq29_tx_de-skew = <7>;
+		cs1_dq30_tx_de-skew = <7>;
+		cs1_dq31_tx_de-skew = <7>;
+		cs1_dqs3p_tx_de-skew = <7>;
+		cs1_dqs3n_tx_de-skew = <7>;
+	};
+};
diff --git a/arch/arm/dts/rv1126-evb.dts b/arch/arm/dts/rv1126-evb.dts
index 7e17cbb986..70a72e5200 100644
--- a/arch/arm/dts/rv1126-evb.dts
+++ b/arch/arm/dts/rv1126-evb.dts
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 /*
- * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd.
+ * Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd.
  */
 
 /dts-v1/;
@@ -10,6 +10,12 @@
 / {
 	model = "Rockchip RV1126 Evaluation Board";
 	compatible = "rockchip,rv1126-evb", "rockchip,rv1126";
+
+	ramdisk-ro {
+		u-boot,dm-pre-reloc;
+		compatible = "ramdisk-ro";
+		status = "okay";
+	};
 };
 
 &uart2 {
diff --git a/arch/arm/dts/rv1126-pinctrl.dtsi b/arch/arm/dts/rv1126-pinctrl.dtsi
new file mode 100644
index 0000000000..358a33e85d
--- /dev/null
+++ b/arch/arm/dts/rv1126-pinctrl.dtsi
@@ -0,0 +1,1363 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <dt-bindings/pinctrl/rockchip.h>
+#include "rockchip-pinconf.dtsi"
+
+&pinctrl {
+	a7 {
+		a7m0_pins: a7m0-pins {
+			rockchip,pins =
+				/* a7_jtag_tck_m0 */
+				<1 RK_PA6 3 &pcfg_pull_none>,
+				/* a7_jtag_tms_m0 */
+				<1 RK_PA7 3 &pcfg_pull_none>;
+		};
+		a7m1_pins: a7m1-pins {
+			rockchip,pins =
+				/* a7_jtag_tck_m1 */
+				<3 RK_PA2 2 &pcfg_pull_none>,
+				/* a7_jtag_tms_m1 */
+				<3 RK_PA3 2 &pcfg_pull_none>;
+		};
+	};
+	acodec {
+		acodec_pins: acodec-pins {
+			rockchip,pins =
+				/* acodec_adc_clk */
+				<3 RK_PD1 4 &pcfg_pull_none>,
+				/* acodec_adc_data */
+				<3 RK_PD7 3 &pcfg_pull_none>,
+				/* acodec_adc_sync */
+				<3 RK_PD4 3 &pcfg_pull_none>,
+				/* acodec_dac_clk */
+				<3 RK_PD0 3 &pcfg_pull_none>,
+				/* acodec_dac_datal */
+				<3 RK_PD6 3 &pcfg_pull_none>,
+				/* acodec_dac_datar */
+				<3 RK_PD5 3 &pcfg_pull_none>,
+				/* acodec_dac_sync */
+				<3 RK_PD3 3 &pcfg_pull_none>;
+		};
+	};
+	auddsm {
+		auddsm_pins: auddsm-pins {
+			rockchip,pins =
+				/* auddsm_ln */
+				<3 RK_PD3 5 &pcfg_pull_none>,
+				/* auddsm_lp */
+				<3 RK_PD5 5 &pcfg_pull_none>,
+				/* auddsm_rn */
+				<4 RK_PA0 5 &pcfg_pull_none>,
+				/* auddsm_rp */
+				<4 RK_PA1 5 &pcfg_pull_none>;
+		};
+	};
+	audpwm {
+		audpwmm0_pins: audpwmm0-pins {
+			rockchip,pins =
+				/* audpwm_l_m0 */
+				<4 RK_PA0 3 &pcfg_pull_none>,
+				/* audpwm_r_m0 */
+				<4 RK_PA1 3 &pcfg_pull_none>;
+		};
+		audpwmm1_pins: audpwmm1-pins {
+			rockchip,pins =
+				/* audpwm_l_m1 */
+				<3 RK_PD3 4 &pcfg_pull_none>,
+				/* audpwm_r_m1 */
+				<3 RK_PD5 4 &pcfg_pull_none>;
+		};
+	};
+	can {
+		canm0_pins: canm0-pins {
+			rockchip,pins =
+				/* can_rxd_m0 */
+				<3 RK_PA0 3 &pcfg_pull_none>,
+				/* can_txd_m0 */
+				<3 RK_PA1 3 &pcfg_pull_none>;
+		};
+		canm1_pins: canm1-pins {
+			rockchip,pins =
+				/* can_rxd_m1 */
+				<3 RK_PA6 5 &pcfg_pull_none>,
+				/* can_txd_m1 */
+				<3 RK_PA7 5 &pcfg_pull_none>;
+		};
+	};
+	cif {
+		cifm0_dvp_ctl: cifm0-dvp_ctl {
+			rockchip,pins =
+				/* cif_clkin_m0 */
+				<3 RK_PC5 1 &pcfg_pull_none>,
+				/* cif_clkout_m0 */
+				<3 RK_PC6 1 &pcfg_pull_none>,
+				/* cif_d0_m0 */
+				<3 RK_PA4 1 &pcfg_pull_none>,
+				/* cif_d10_m0 */
+				<3 RK_PB6 1 &pcfg_pull_none>,
+				/* cif_d11_m0 */
+				<3 RK_PB7 1 &pcfg_pull_none>,
+				/* cif_d12_m0 */
+				<3 RK_PC0 1 &pcfg_pull_none>,
+				/* cif_d13_m0 */
+				<3 RK_PC1 1 &pcfg_pull_none>,
+				/* cif_d14_m0 */
+				<3 RK_PC2 1 &pcfg_pull_none>,
+				/* cif_d15_m0 */
+				<3 RK_PC3 1 &pcfg_pull_none>,
+				/* cif_d1_m0 */
+				<3 RK_PA5 1 &pcfg_pull_none>,
+				/* cif_d2_m0 */
+				<3 RK_PA6 1 &pcfg_pull_none>,
+				/* cif_d3_m0 */
+				<3 RK_PA7 1 &pcfg_pull_none>,
+				/* cif_d4_m0 */
+				<3 RK_PB0 1 &pcfg_pull_none>,
+				/* cif_d5_m0 */
+				<3 RK_PB1 1 &pcfg_pull_none>,
+				/* cif_d6_m0 */
+				<3 RK_PB2 1 &pcfg_pull_none>,
+				/* cif_d7_m0 */
+				<3 RK_PB3 1 &pcfg_pull_none>,
+				/* cif_d8_m0 */
+				<3 RK_PB4 1 &pcfg_pull_none>,
+				/* cif_d9_m0 */
+				<3 RK_PB5 1 &pcfg_pull_none>,
+				/* cif_hsync_m0 */
+				<3 RK_PC7 1 &pcfg_pull_none>,
+				/* cif_vsync_m0 */
+				<3 RK_PC4 1 &pcfg_pull_none>;
+		};
+		cifm1_dvp_ctl: cifm1-dvp_ctl {
+			rockchip,pins =
+				/* cif_clkin_m1 */
+				<2 RK_PD2 3 &pcfg_pull_none>,
+				/* cif_clkout_m1 */
+				<2 RK_PD1 3 &pcfg_pull_none>,
+				/* cif_d0_m1 */
+				<2 RK_PA4 3 &pcfg_pull_none>,
+				/* cif_d10_m1 */
+				<2 RK_PC2 3 &pcfg_pull_none>,
+				/* cif_d11_m1 */
+				<2 RK_PC3 3 &pcfg_pull_none>,
+				/* cif_d12_m1 */
+				<2 RK_PC4 3 &pcfg_pull_none>,
+				/* cif_d13_m1 */
+				<2 RK_PC5 3 &pcfg_pull_none>,
+				/* cif_d14_m1 */
+				<2 RK_PC6 3 &pcfg_pull_none>,
+				/* cif_d15_m1 */
+				<2 RK_PC7 3 &pcfg_pull_none>,
+				/* cif_d1_m1 */
+				<2 RK_PA5 3 &pcfg_pull_none>,
+				/* cif_d2_m1 */
+				<2 RK_PA6 3 &pcfg_pull_none>,
+				/* cif_d3_m1 */
+				<2 RK_PB3 3 &pcfg_pull_none>,
+				/* cif_d4_m1 */
+				<2 RK_PB4 3 &pcfg_pull_none>,
+				/* cif_d5_m1 */
+				<2 RK_PB5 3 &pcfg_pull_none>,
+				/* cif_d6_m1 */
+				<2 RK_PB6 3 &pcfg_pull_none>,
+				/* cif_d7_m1 */
+				<2 RK_PB7 3 &pcfg_pull_none>,
+				/* cif_d8_m1 */
+				<2 RK_PC0 3 &pcfg_pull_none>,
+				/* cif_d9_m1 */
+				<2 RK_PC1 3 &pcfg_pull_none>,
+				/* cif_hsync_m1 */
+				<2 RK_PD3 3 &pcfg_pull_none>,
+				/* cif_vsync_m1 */
+				<2 RK_PD0 3 &pcfg_pull_none>;
+		};
+	};
+	clk {
+		clkm0_pins: clkm0-pins {
+			rockchip,pins =
+				/* clk_out_ethernet_m0 */
+				<3 RK_PC5 2 &pcfg_pull_none>;
+		};
+		clkm1_pins: clkm1-pins {
+			rockchip,pins =
+				/* clk_out_ethernet_m1 */
+				<2 RK_PC5 2 &pcfg_pull_none>;
+		};
+		clk_32k: clk-32k {
+			rockchip,pins =
+				<0 RK_PA2 1 &pcfg_pull_none>;
+		};
+		clk_ref: clk-ref {
+			rockchip,pins =
+				<0 RK_PA0 1 &pcfg_pull_none>;
+		};
+	};
+	emmc {
+		emmc_rstnout: emmc-rstnout {
+			rockchip,pins =
+				/* emmc_rstn */
+				<1 RK_PA3 2 &pcfg_pull_none>;
+		};
+		emmc_bus8: emmc-bus8 {
+			rockchip,pins =
+				/* emmc_d0 */
+				<0 RK_PC4 2 &pcfg_pull_up_drv_level_2>,
+				/* emmc_d1 */
+				<0 RK_PC5 2 &pcfg_pull_up_drv_level_2>,
+				/* emmc_d2 */
+				<0 RK_PC6 2 &pcfg_pull_up_drv_level_2>,
+				/* emmc_d3 */
+				<0 RK_PC7 2 &pcfg_pull_up_drv_level_2>,
+				/* emmc_d4 */
+				<0 RK_PD0 2 &pcfg_pull_up_drv_level_2>,
+				/* emmc_d5 */
+				<0 RK_PD1 2 &pcfg_pull_up_drv_level_2>,
+				/* emmc_d6 */
+				<0 RK_PD2 2 &pcfg_pull_up_drv_level_2>,
+				/* emmc_d7 */
+				<0 RK_PD3 2 &pcfg_pull_up_drv_level_2>;
+		};
+		emmc_clk: emmc-clk {
+			rockchip,pins =
+				/* emmc_clk */
+				<0 RK_PD7 2 &pcfg_pull_up_drv_level_2>;
+		};
+		emmc_cmd: emmc-cmd {
+			rockchip,pins =
+				/* emmc_cmd */
+				<0 RK_PD5 2 &pcfg_pull_up_drv_level_2>;
+		};
+	};
+	flash {
+		flash_pins: flash-pins {
+			rockchip,pins =
+				/* flash_ale */
+				<1 RK_PA0 1 &pcfg_pull_none>,
+				/* flash_cle */
+				<0 RK_PD7 1 &pcfg_pull_none>,
+				/* flash_cs0n */
+				<0 RK_PD4 1 &pcfg_pull_none>,
+				/* flash_d0 */
+				<0 RK_PC4 1 &pcfg_pull_none>,
+				/* flash_d1 */
+				<0 RK_PC5 1 &pcfg_pull_none>,
+				/* flash_d2 */
+				<0 RK_PC6 1 &pcfg_pull_none>,
+				/* flash_d3 */
+				<0 RK_PC7 1 &pcfg_pull_none>,
+				/* flash_d4 */
+				<0 RK_PD0 1 &pcfg_pull_none>,
+				/* flash_d5 */
+				<0 RK_PD1 1 &pcfg_pull_none>,
+				/* flash_d6 */
+				<0 RK_PD2 1 &pcfg_pull_none>,
+				/* flash_d7 */
+				<0 RK_PD3 1 &pcfg_pull_none>,
+				/* flash_rdn */
+				<1 RK_PA2 1 &pcfg_pull_none>,
+				/* flash_rdyn */
+				<1 RK_PA1 1 &pcfg_pull_none>,
+				/* flash_trig_in */
+				<1 RK_PC5 4 &pcfg_pull_none>,
+				/* flash_trig_out */
+				<1 RK_PC4 4 &pcfg_pull_none>,
+				/* flash_vol_sel */
+				<0 RK_PB3 1 &pcfg_pull_none>,
+				/* flash_wpn */
+				<1 RK_PA3 1 &pcfg_pull_none>,
+				/* flash_wrn */
+				<0 RK_PD5 1 &pcfg_pull_none>;
+		};
+	};
+	fspi {
+		fspi_pins: fspi-pins {
+			rockchip,pins =
+				/* fspi_clk */
+				<1 RK_PA3 3 &pcfg_pull_none>,
+				/* fspi_cs0n */
+				<0 RK_PD4 3 &pcfg_pull_none>,
+				/* fspi_cs1n */
+				<0 RK_PD1 3 &pcfg_pull_none>,
+				/* fspi_d0 */
+				<1 RK_PA0 3 &pcfg_pull_none>,
+				/* fspi_d1 */
+				<1 RK_PA1 3 &pcfg_pull_none>,
+				/* fspi_d2 */
+				<0 RK_PD6 3 &pcfg_pull_none>,
+				/* fspi_d3 */
+				<1 RK_PA2 3 &pcfg_pull_none>;
+		};
+	};
+	i2c0 {
+		i2c0_xfer: i2c0-xfer {
+			rockchip,pins =
+				/* i2c0_scl */
+				<0 RK_PB4 1 &pcfg_pull_none_smt>,
+				/* i2c0_sda */
+				<0 RK_PB5 1 &pcfg_pull_none_smt>;
+		};
+	};
+	i2c1 {
+		i2c1_xfer: i2c1-xfer {
+			rockchip,pins =
+				/* i2c1_scl */
+				<1 RK_PD3 1 &pcfg_pull_none_smt>,
+				/* i2c1_sda */
+				<1 RK_PD2 1 &pcfg_pull_none_smt>;
+		};
+	};
+	i2c2 {
+		i2c2_xfer: i2c2-xfer {
+			rockchip,pins =
+				/* i2c2_scl */
+				<0 RK_PC2 1 &pcfg_pull_none_smt>,
+				/* i2c2_sda */
+				<0 RK_PC3 1 &pcfg_pull_none_smt>;
+		};
+	};
+	i2c3 {
+		i2c3m0_xfer: i2c3m0-xfer {
+			rockchip,pins =
+				/* i2c3_scl_m0 */
+				<3 RK_PA4 5 &pcfg_pull_none_smt>,
+				/* i2c3_sda_m0 */
+				<3 RK_PA5 5 &pcfg_pull_none_smt>;
+		};
+		i2c3m1_xfer: i2c3m1-xfer {
+			rockchip,pins =
+				/* i2c3_scl_m1 */
+				<2 RK_PD4 7 &pcfg_pull_none_smt>,
+				/* i2c3_sda_m1 */
+				<2 RK_PD5 7 &pcfg_pull_none_smt>;
+		};
+		i2c3m2_xfer: i2c3m2-xfer {
+			rockchip,pins =
+				/* i2c3_scl_m2 */
+				<1 RK_PD6 3 &pcfg_pull_none_smt>,
+				/* i2c3_sda_m2 */
+				<1 RK_PD7 3 &pcfg_pull_none_smt>;
+		};
+	};
+	i2c4 {
+		i2c4m0_xfer: i2c4m0-xfer {
+			rockchip,pins =
+				/* i2c4_scl_m0 */
+				<3 RK_PA0 7 &pcfg_pull_none_smt>,
+				/* i2c4_sda_m0 */
+				<3 RK_PA1 7 &pcfg_pull_none_smt>;
+		};
+		i2c4m1_xfer: i2c4m1-xfer {
+			rockchip,pins =
+				/* i2c4_scl_m1 */
+				<4 RK_PA0 4 &pcfg_pull_none_smt>,
+				/* i2c4_sda_m1 */
+				<4 RK_PA1 4 &pcfg_pull_none_smt>;
+		};
+	};
+	i2c5 {
+		i2c5m0_xfer: i2c5m0-xfer {
+			rockchip,pins =
+				/* i2c5_scl_m0 */
+				<2 RK_PA5 7 &pcfg_pull_none_smt>,
+				/* i2c5_sda_m0 */
+				<2 RK_PB3 7 &pcfg_pull_none_smt>;
+		};
+		i2c5m1_xfer: i2c5m1-xfer {
+			rockchip,pins =
+				/* i2c5_scl_m1 */
+				<3 RK_PB0 5 &pcfg_pull_none_smt>,
+				/* i2c5_sda_m1 */
+				<3 RK_PB1 5 &pcfg_pull_none_smt>;
+		};
+		i2c5m2_xfer: i2c5m2-xfer {
+			rockchip,pins =
+				/* i2c5_scl_m2 */
+				<1 RK_PD0 4 &pcfg_pull_none_smt>,
+				/* i2c5_sda_m2 */
+				<1 RK_PD1 4 &pcfg_pull_none_smt>;
+		};
+	};
+	i2s0 {
+		i2s0m0_lrck_rx: i2s0m0-lrck-rx {
+			rockchip,pins =
+				<3 RK_PD4 1 &pcfg_pull_none>;
+		};
+		i2s0m0_lrck_tx: i2s0m0-lrck-tx {
+			rockchip,pins =
+				<3 RK_PD3 1 &pcfg_pull_none>;
+		};
+		i2s0m0_mclk: i2s0m0-mclk {
+			rockchip,pins =
+				<3 RK_PD2 1 &pcfg_pull_none>;
+		};
+		i2s0m0_sclk_rx: i2s0m0-sclk-rx {
+			rockchip,pins =
+				<3 RK_PD1 1 &pcfg_pull_none>;
+		};
+		i2s0m0_sclk_tx: i2s0m0-sclk-tx {
+			rockchip,pins =
+				<3 RK_PD0 1 &pcfg_pull_none>;
+		};
+		i2s0m0_sdi0: i2s0m0-sdi0 {
+			rockchip,pins =
+				<3 RK_PD6 1 &pcfg_pull_none>;
+		};
+		i2s0m0_sdo0: i2s0m0-sdo0 {
+			rockchip,pins =
+				<3 RK_PD5 1 &pcfg_pull_none>;
+		};
+		i2s0m0_sdo1_sdi3: i2s0m0-sdo1-sdi3 {
+			rockchip,pins =
+				<3 RK_PD7 1 &pcfg_pull_none>;
+		};
+		i2s0m0_sdo2_sdi2: i2s0m0-sdo2-sdi2 {
+			rockchip,pins =
+				<4 RK_PA0 1 &pcfg_pull_none>;
+		};
+		i2s0m0_sdo3_sdi1: i2s0m0-sdo3-sdi1 {
+			rockchip,pins =
+				<4 RK_PA1 1 &pcfg_pull_none>;
+		};
+		i2s0m1_lrck_rx: i2s0m1-lrck-rx {
+			rockchip,pins =
+				<3 RK_PB2 3 &pcfg_pull_none>;
+		};
+		i2s0m1_lrck_tx: i2s0m1-lrck-tx {
+			rockchip,pins =
+				<3 RK_PA5 3 &pcfg_pull_none>;
+		};
+		i2s0m1_mclk: i2s0m1-mclk {
+			rockchip,pins =
+				<3 RK_PB0 3 &pcfg_pull_none>;
+		};
+		i2s0m1_sclk_rx: i2s0m1-sclk-rx {
+			rockchip,pins =
+				<3 RK_PB1 3 &pcfg_pull_none>;
+		};
+		i2s0m1_sclk_tx: i2s0m1-sclk-tx {
+			rockchip,pins =
+				<3 RK_PA4 3 &pcfg_pull_none>;
+		};
+		i2s0m1_sdi0: i2s0m1-sdi0 {
+			rockchip,pins =
+				<3 RK_PA7 3 &pcfg_pull_none>;
+		};
+		i2s0m1_sdo0: i2s0m1-sdo0 {
+			rockchip,pins =
+				<3 RK_PA6 3 &pcfg_pull_none>;
+		};
+		i2s0m1_sdo1_sdi3: i2s0m1-sdo1-sdi3 {
+			rockchip,pins =
+				<3 RK_PB3 3 &pcfg_pull_none>;
+		};
+		i2s0m1_sdo2_sdi2: i2s0m1-sdo2-sdi2 {
+			rockchip,pins =
+				<3 RK_PB4 3 &pcfg_pull_none>;
+		};
+		i2s0m1_sdo3_sdi1: i2s0m1-sdo3-sdi1 {
+			rockchip,pins =
+				<3 RK_PB5 3 &pcfg_pull_none>;
+		};
+	};
+	i2s1 {
+		i2s1m0_lrck: i2s1m0-lrck {
+			rockchip,pins =
+				<1 RK_PA0 4 &pcfg_pull_none>;
+		};
+		i2s1m0_mclk: i2s1m0-mclk {
+			rockchip,pins =
+				<0 RK_PD4 4 &pcfg_pull_none>;
+		};
+		i2s1m0_sclk: i2s1m0-sclk {
+			rockchip,pins =
+				<1 RK_PA1 4 &pcfg_pull_none>;
+		};
+		i2s1m0_sdi: i2s1m0-sdi {
+			rockchip,pins =
+				<1 RK_PA2 4 &pcfg_pull_none>;
+		};
+		i2s1m0_sdo: i2s1m0-sdo {
+			rockchip,pins =
+				<0 RK_PD6 4 &pcfg_pull_none>;
+		};
+		i2s1m1_lrck: i2s1m1-lrck {
+			rockchip,pins =
+				<1 RK_PD7 2 &pcfg_pull_none>;
+		};
+		i2s1m1_mclk: i2s1m1-mclk {
+			rockchip,pins =
+				<1 RK_PD5 2 &pcfg_pull_none>;
+		};
+		i2s1m1_sclk: i2s1m1-sclk {
+			rockchip,pins =
+				<1 RK_PD6 2 &pcfg_pull_none>;
+		};
+		i2s1m1_sdi: i2s1m1-sdi {
+			rockchip,pins =
+				<2 RK_PA0 2 &pcfg_pull_none>;
+		};
+		i2s1m1_sdo: i2s1m1-sdo {
+			rockchip,pins =
+				<2 RK_PA1 2 &pcfg_pull_none>;
+		};
+		i2s1m2_lrck: i2s1m2-lrck {
+			rockchip,pins =
+				<2 RK_PD2 6 &pcfg_pull_none>;
+		};
+		i2s1m2_mclk: i2s1m2-mclk {
+			rockchip,pins =
+				<2 RK_PC7 6 &pcfg_pull_none>;
+		};
+		i2s1m2_sclk: i2s1m2-sclk {
+			rockchip,pins =
+				<2 RK_PD1 6 &pcfg_pull_none>;
+		};
+		i2s1m2_sdi: i2s1m2-sdi {
+			rockchip,pins =
+				<2 RK_PD3 6 &pcfg_pull_none>;
+		};
+		i2s1m2_sdo: i2s1m2-sdo {
+			rockchip,pins =
+				<2 RK_PD0 6 &pcfg_pull_none>;
+		};
+	};
+	i2s2 {
+		i2s2m0_lrck: i2s2m0-lrck {
+			rockchip,pins =
+				<1 RK_PC7 1 &pcfg_pull_none>;
+		};
+		i2s2m0_mclk: i2s2m0-mclk {
+			rockchip,pins =
+				<1 RK_PD0 1 &pcfg_pull_none>;
+		};
+		i2s2m0_sclk: i2s2m0-sclk {
+			rockchip,pins =
+				<1 RK_PC6 1 &pcfg_pull_none>;
+		};
+		i2s2m0_sdi: i2s2m0-sdi {
+			rockchip,pins =
+				<1 RK_PC5 1 &pcfg_pull_none>;
+		};
+		i2s2m0_sdo: i2s2m0-sdo {
+			rockchip,pins =
+				<1 RK_PC4 1 &pcfg_pull_none>;
+		};
+		i2s2m1_lrck: i2s2m1-lrck {
+			rockchip,pins =
+				<2 RK_PB2 2 &pcfg_pull_none>;
+		};
+		i2s2m1_mclk: i2s2m1-mclk {
+			rockchip,pins =
+				<2 RK_PB3 2 &pcfg_pull_none>;
+		};
+		i2s2m1_sclk: i2s2m1-sclk {
+			rockchip,pins =
+				<2 RK_PB1 2 &pcfg_pull_none>;
+		};
+		i2s2m1_sdi: i2s2m1-sdi {
+			rockchip,pins =
+				<2 RK_PB0 2 &pcfg_pull_none>;
+		};
+		i2s2m1_sdo: i2s2m1-sdo {
+			rockchip,pins =
+				<2 RK_PA7 2 &pcfg_pull_none>;
+		};
+	};
+	lcdc {
+		lcdc_ctl: lcdc-ctl {
+			rockchip,pins =
+				/* lcdc_clk */
+				<2 RK_PD7 1 &pcfg_pull_none>,
+				/* lcdc_d0 */
+				<2 RK_PA4 1 &pcfg_pull_none>,
+				/* lcdc_d1 */
+				<2 RK_PA5 1 &pcfg_pull_none>,
+				/* lcdc_d10 */
+				<2 RK_PB6 1 &pcfg_pull_none>,
+				/* lcdc_d11 */
+				<2 RK_PB7 1 &pcfg_pull_none>,
+				/* lcdc_d12 */
+				<2 RK_PC0 1 &pcfg_pull_none>,
+				/* lcdc_d13 */
+				<2 RK_PC1 1 &pcfg_pull_none>,
+				/* lcdc_d14 */
+				<2 RK_PC2 1 &pcfg_pull_none>,
+				/* lcdc_d15 */
+				<2 RK_PC3 1 &pcfg_pull_none>,
+				/* lcdc_d16 */
+				<2 RK_PC4 1 &pcfg_pull_none>,
+				/* lcdc_d17 */
+				<2 RK_PC5 1 &pcfg_pull_none>,
+				/* lcdc_d18 */
+				<2 RK_PC6 1 &pcfg_pull_none>,
+				/* lcdc_d19 */
+				<2 RK_PC7 1 &pcfg_pull_none>,
+				/* lcdc_d2 */
+				<2 RK_PA6 1 &pcfg_pull_none>,
+				/* lcdc_d20 */
+				<2 RK_PD0 1 &pcfg_pull_none>,
+				/* lcdc_d21 */
+				<2 RK_PD1 1 &pcfg_pull_none>,
+				/* lcdc_d22 */
+				<2 RK_PD2 1 &pcfg_pull_none>,
+				/* lcdc_d23 */
+				<2 RK_PD3 1 &pcfg_pull_none>,
+				/* lcdc_d3 */
+				<2 RK_PA7 1 &pcfg_pull_none>,
+				/* lcdc_d4 */
+				<2 RK_PB0 1 &pcfg_pull_none>,
+				/* lcdc_d5 */
+				<2 RK_PB1 1 &pcfg_pull_none>,
+				/* lcdc_d6 */
+				<2 RK_PB2 1 &pcfg_pull_none>,
+				/* lcdc_d7 */
+				<2 RK_PB3 1 &pcfg_pull_none>,
+				/* lcdc_d8 */
+				<2 RK_PB4 1 &pcfg_pull_none>,
+				/* lcdc_d9 */
+				<2 RK_PB5 1 &pcfg_pull_none>,
+				/* lcdc_den */
+				<2 RK_PD4 1 &pcfg_pull_none>,
+				/* lcdc_hsync */
+				<2 RK_PD5 1 &pcfg_pull_none>,
+				/* lcdc_vsync */
+				<2 RK_PD6 1 &pcfg_pull_none>;
+		};
+	};
+	mcu {
+		mcu_pins: mcu-pins {
+			rockchip,pins =
+				/* mcu_jtag_tck */
+				<1 RK_PA6 4 &pcfg_pull_none>,
+				/* mcu_jtag_tdi */
+				<1 RK_PB1 4 &pcfg_pull_none>,
+				/* mcu_jtag_tdo */
+				<1 RK_PB0 4 &pcfg_pull_none>,
+				/* mcu_jtag_tms */
+				<1 RK_PA7 4 &pcfg_pull_none>,
+				/* mcu_jtag_trstn */
+				<1 RK_PA5 4 &pcfg_pull_none>;
+		};
+	};
+	mipi {
+		mipim1_pins: mipim1-pins {
+			rockchip,pins =
+				/* mipi_csi_clk1_m1 */
+				<2 RK_PA2 1 &pcfg_pull_none>;
+		};
+		mipi_csi_clk0: mipi-csi-clk0 {
+			rockchip,pins =
+				<2 RK_PA3 1 &pcfg_pull_none>;
+		};
+	};
+	pdm {
+		pdmm0_clk: pdmm0-clk {
+			rockchip,pins =
+				/* pdm_clk0_m0 */
+				<3 RK_PD4 2 &pcfg_pull_none>;
+		};
+		pdmm0_clk1: pdmm0-clk1 {
+			rockchip,pins =
+				<3 RK_PD1 2 &pcfg_pull_none>;
+		};
+		pdmm0_sdi0: pdmm0-sdi0 {
+			rockchip,pins =
+				<3 RK_PD6 2 &pcfg_pull_none>;
+		};
+		pdmm0_sdi1: pdmm0-sdi1 {
+			rockchip,pins =
+				<4 RK_PA1 2 &pcfg_pull_none>;
+		};
+		pdmm0_sdi2: pdmm0-sdi2 {
+			rockchip,pins =
+				<4 RK_PA0 2 &pcfg_pull_none>;
+		};
+		pdmm0_sdi3: pdmm0-sdi3 {
+			rockchip,pins =
+				<3 RK_PD7 2 &pcfg_pull_none>;
+		};
+		pdmm1_clk: pdmm1-clk {
+			rockchip,pins =
+				/* pdm_clk0_m1 */
+				<3 RK_PC0 3 &pcfg_pull_none>;
+		};
+		pdmm1_clk1: pdmm1-clk1 {
+			rockchip,pins =
+				<3 RK_PC3 3 &pcfg_pull_none>;
+		};
+		pdmm1_sdi0: pdmm1-sdi0 {
+			rockchip,pins =
+				<3 RK_PC1 3 &pcfg_pull_none>;
+		};
+		pdmm1_sdi1: pdmm1-sdi1 {
+			rockchip,pins =
+				<3 RK_PC2 3 &pcfg_pull_none>;
+		};
+		pdmm1_sdi2: pdmm1-sdi2 {
+			rockchip,pins =
+				<3 RK_PB6 3 &pcfg_pull_none>;
+		};
+		pdmm1_sdi3: pdmm1-sdi3 {
+			rockchip,pins =
+				<3 RK_PB7 3 &pcfg_pull_none>;
+		};
+	};
+	pmic {
+		pmic_pins: pmic-pins {
+			rockchip,pins =
+				/* pmic_int */
+				<0 RK_PB1 1 &pcfg_pull_none>,
+				/* pmic_sleep */
+				<0 RK_PB2 1 &pcfg_pull_none>;
+		};
+	};
+	pmu {
+		pmu_pins: pmu-pins {
+			rockchip,pins =
+				/* pmu_debug */
+				<0 RK_PC1 1 &pcfg_pull_none>;
+		};
+	};
+	prelight {
+		prelight_pins: prelight-pins {
+			rockchip,pins =
+				/* prelight_trig_out */
+				<1 RK_PC6 4 &pcfg_pull_none>;
+		};
+	};
+	pwm0 {
+		pwm0m0_pins: pwm0m0-pins {
+			rockchip,pins =
+				/* pwm0_m0 */
+				<0 RK_PB6 3 &pcfg_pull_none>;
+		};
+		pwm0m1_pins: pwm0m1-pins {
+			rockchip,pins =
+				/* pwm0_m1 */
+				<2 RK_PB3 5 &pcfg_pull_none>;
+		};
+	};
+	pwm1 {
+		pwm1m0_pins: pwm1m0-pins {
+			rockchip,pins =
+				/* pwm1_m0 */
+				<0 RK_PB7 3 &pcfg_pull_none>;
+		};
+		pwm1m1_pins: pwm1m1-pins {
+			rockchip,pins =
+				/* pwm1_m1 */
+				<2 RK_PB2 5 &pcfg_pull_none>;
+		};
+	};
+	pwm10 {
+		pwm10m0_pins: pwm10m0-pins {
+			rockchip,pins =
+				/* pwm10_m0 */
+				<3 RK_PA6 6 &pcfg_pull_none>;
+		};
+		pwm10m1_pins: pwm10m1-pins {
+			rockchip,pins =
+				/* pwm10_m1 */
+				<2 RK_PD5 5 &pcfg_pull_none>;
+		};
+	};
+	pwm11 {
+		pwm11m0_pins: pwm11m0-pins {
+			rockchip,pins =
+				/* pwm11_ir_m0 */
+				<3 RK_PA7 6 &pcfg_pull_none>;
+		};
+		pwm11m1_pins: pwm11m1-pins {
+			rockchip,pins =
+				/* pwm11_ir_m1 */
+				<2 RK_PD4 5 &pcfg_pull_none>;
+		};
+	};
+	pwm2 {
+		pwm2m0_pins: pwm2m0-pins {
+			rockchip,pins =
+				/* pwm2_m0 */
+				<0 RK_PC0 3 &pcfg_pull_none>;
+		};
+		pwm2m1_pins: pwm2m1-pins {
+			rockchip,pins =
+				/* pwm2_m1 */
+				<2 RK_PB1 5 &pcfg_pull_none>;
+		};
+	};
+	pwm3 {
+		pwm3m0_pins: pwm3m0-pins {
+			rockchip,pins =
+				/* pwm3_ir_m0 */
+				<0 RK_PC1 3 &pcfg_pull_none>;
+		};
+		pwm3m1_pins: pwm3m1-pins {
+			rockchip,pins =
+				/* pwm3_ir_m1 */
+				<2 RK_PB0 5 &pcfg_pull_none>;
+		};
+	};
+	pwm4 {
+		pwm4m0_pins: pwm4m0-pins {
+			rockchip,pins =
+				/* pwm4_m0 */
+				<0 RK_PC2 3 &pcfg_pull_none>;
+		};
+		pwm4m1_pins: pwm4m1-pins {
+			rockchip,pins =
+				/* pwm4_m1 */
+				<2 RK_PA7 5 &pcfg_pull_none>;
+		};
+	};
+	pwm5 {
+		pwm5m0_pins: pwm5m0-pins {
+			rockchip,pins =
+				/* pwm5_m0 */
+				<0 RK_PC3 3 &pcfg_pull_none>;
+		};
+		pwm5m1_pins: pwm5m1-pins {
+			rockchip,pins =
+				/* pwm5_m1 */
+				<2 RK_PA6 5 &pcfg_pull_none>;
+		};
+	};
+	pwm6 {
+		pwm6m0_pins: pwm6m0-pins {
+			rockchip,pins =
+				/* pwm6_m0 */
+				<0 RK_PB2 3 &pcfg_pull_none>;
+		};
+		pwm6m1_pins: pwm6m1-pins {
+			rockchip,pins =
+				/* pwm6_m1 */
+				<3 RK_PA1 5 &pcfg_pull_none>;
+		};
+	};
+	pwm7 {
+		pwm7m0_pins: pwm7m0-pins {
+			rockchip,pins =
+				/* pwm7_ir_m0 */
+				<0 RK_PB1 3 &pcfg_pull_none>;
+		};
+		pwm7m1_pins: pwm7m1-pins {
+			rockchip,pins =
+				/* pwm7_ir_m1 */
+				<3 RK_PA0 5 &pcfg_pull_none>;
+		};
+	};
+	pwm8 {
+		pwm8m0_pins: pwm8m0-pins {
+			rockchip,pins =
+				/* pwm8_m0 */
+				<3 RK_PA4 6 &pcfg_pull_none>;
+		};
+		pwm8m1_pins: pwm8m1-pins {
+			rockchip,pins =
+				/* pwm8_m1 */
+				<2 RK_PD7 5 &pcfg_pull_none>;
+		};
+	};
+	pwm9 {
+		pwm9m0_pins: pwm9m0-pins {
+			rockchip,pins =
+				/* pwm9_m0 */
+				<3 RK_PA5 6 &pcfg_pull_none>;
+		};
+		pwm9m1_pins: pwm9m1-pins {
+			rockchip,pins =
+				/* pwm9_m1 */
+				<2 RK_PD6 5 &pcfg_pull_none>;
+		};
+	};
+	rgmii {
+		rgmiim0_pins: rgmiim0-pins {
+			rockchip,pins =
+				/* rgmii_clk_m0 */
+				<3 RK_PC0 2 &pcfg_pull_none>,
+				/* rgmii_col_m0 */
+				<3 RK_PA6 2 &pcfg_pull_none>,
+				/* rgmii_crs_m0 */
+				<3 RK_PA5 2 &pcfg_pull_none>,
+				/* rgmii_mdc_m0 */
+				<3 RK_PC4 2 &pcfg_pull_none>,
+				/* rgmii_mdio_m0 */
+				<3 RK_PC3 2 &pcfg_pull_none>,
+				/* rgmii_rxclk_m0 */
+				<3 RK_PC7 2 &pcfg_pull_none>,
+				/* rgmii_rxd0_m0 */
+				<3 RK_PB6 2 &pcfg_pull_none>,
+				/* rgmii_rxd1_m0 */
+				<3 RK_PB7 2 &pcfg_pull_none>,
+				/* rgmii_rxd2_m0 */
+				<3 RK_PA7 2 &pcfg_pull_none>,
+				/* rgmii_rxd3_m0 */
+				<3 RK_PB0 2 &pcfg_pull_none>,
+				/* rgmii_rxdv_m0 */
+				<3 RK_PC1 2 &pcfg_pull_none>,
+				/* rgmii_rxer_m0 */
+				<3 RK_PC2 2 &pcfg_pull_none>,
+				/* rgmii_txclk_m0 */
+				<3 RK_PC6 2 &pcfg_pull_none>,
+				/* rgmii_txd0_m0 */
+				<3 RK_PB3 2 &pcfg_pull_none>,
+				/* rgmii_txd1_m0 */
+				<3 RK_PB4 2 &pcfg_pull_none>,
+				/* rgmii_txd2_m0 */
+				<3 RK_PB1 2 &pcfg_pull_none>,
+				/* rgmii_txd3_m0 */
+				<3 RK_PB2 2 &pcfg_pull_none>,
+				/* rgmii_txen_m0 */
+				<3 RK_PB5 2 &pcfg_pull_none>;
+		};
+		rgmiim1_pins: rgmiim1-pins {
+			rockchip,pins =
+				/* rgmii_clk_m1 */
+				<2 RK_PB7 2 &pcfg_pull_none>,
+				/* rgmii_col_m1 */
+				<2 RK_PA6 2 &pcfg_pull_none>,
+				/* rgmii_crs_m1 */
+				<2 RK_PA5 2 &pcfg_pull_none>,
+				/* rgmii_mdc_m1 */
+				<2 RK_PC2 2 &pcfg_pull_none>,
+				/* rgmii_mdio_m1 */
+				<2 RK_PC1 2 &pcfg_pull_none>,
+				/* rgmii_rxclk_m1 */
+				<2 RK_PD3 2 &pcfg_pull_none>,
+				/* rgmii_rxd0_m1 */
+				<2 RK_PB5 2 &pcfg_pull_none>,
+				/* rgmii_rxd1_m1 */
+				<2 RK_PB6 2 &pcfg_pull_none>,
+				/* rgmii_rxd2_m1 */
+				<2 RK_PC7 2 &pcfg_pull_none>,
+				/* rgmii_rxd3_m1 */
+				<2 RK_PD0 2 &pcfg_pull_none>,
+				/* rgmii_rxdv_m1 */
+				<2 RK_PB4 2 &pcfg_pull_none>,
+				/* rgmii_rxer_m1 */
+				<2 RK_PC0 2 &pcfg_pull_none>,
+				/* rgmii_txclk_m1 */
+				<2 RK_PD2 2 &pcfg_pull_none>,
+				/* rgmii_txd0_m1 */
+				<2 RK_PC3 2 &pcfg_pull_none>,
+				/* rgmii_txd1_m1 */
+				<2 RK_PC4 2 &pcfg_pull_none>,
+				/* rgmii_txd2_m1 */
+				<2 RK_PD1 2 &pcfg_pull_none>,
+				/* rgmii_txd3_m1 */
+				<2 RK_PA4 2 &pcfg_pull_none>,
+				/* rgmii_txen_m1 */
+				<2 RK_PC6 2 &pcfg_pull_none>;
+		};
+	};
+	sdmmc0 {
+		sdmmc0_bus4: sdmmc0-bus4 {
+			rockchip,pins =
+				/* sdmmc0_d0 */
+				<1 RK_PA4 1 &pcfg_pull_up_drv_level_2>,
+				/* sdmmc0_d1 */
+				<1 RK_PA5 1 &pcfg_pull_up_drv_level_2>,
+				/* sdmmc0_d2 */
+				<1 RK_PA6 1 &pcfg_pull_up_drv_level_2>,
+				/* sdmmc0_d3 */
+				<1 RK_PA7 1 &pcfg_pull_up_drv_level_2>;
+		};
+		sdmmc0_clk: sdmmc0-clk {
+			rockchip,pins =
+				/* sdmmc0_clk */
+				<1 RK_PB0 1 &pcfg_pull_up_drv_level_2>;
+		};
+		sdmmc0_cmd: sdmmc0-cmd {
+			rockchip,pins =
+				/* sdmmc0_cmd */
+				<1 RK_PB1 1 &pcfg_pull_up_drv_level_2>;
+		};
+		sdmmc0_det: sdmmc0-det {
+			rockchip,pins =
+				<0 RK_PA3 1 &pcfg_pull_none>;
+		};
+		sdmmc0_pwr: sdmmc0-pwr {
+			rockchip,pins =
+				<0 RK_PC0 1 &pcfg_pull_none>;
+		};
+	};
+	sdmmc1 {
+		sdmmc1_bus4: sdmmc1-bus4 {
+			rockchip,pins =
+				/* sdmmc1_d0 */
+				<1 RK_PB4 1 &pcfg_pull_up_drv_level_2>,
+				/* sdmmc1_d1 */
+				<1 RK_PB5 1 &pcfg_pull_up_drv_level_2>,
+				/* sdmmc1_d2 */
+				<1 RK_PB6 1 &pcfg_pull_up_drv_level_2>,
+				/* sdmmc1_d3 */
+				<1 RK_PB7 1 &pcfg_pull_up_drv_level_2>;
+		};
+		sdmmc1_clk: sdmmc1-clk {
+			rockchip,pins =
+				/* sdmmc1_clk */
+				<1 RK_PB2 1 &pcfg_pull_up_drv_level_2>;
+		};
+		sdmmc1_cmd: sdmmc1-cmd {
+			rockchip,pins =
+				/* sdmmc1_cmd */
+				<1 RK_PB3 1 &pcfg_pull_up_drv_level_2>;
+		};
+		sdmmc1_det: sdmmc1-det {
+			rockchip,pins =
+				<1 RK_PD0 2 &pcfg_pull_none>;
+		};
+		sdmmc1_pwr: sdmmc1-pwr {
+			rockchip,pins =
+				<1 RK_PD1 2 &pcfg_pull_none>;
+		};
+	};
+	spi0 {
+		spi0m0_clk: spi0m0-clk {
+			rockchip,pins =
+				<0 RK_PB0 1 &pcfg_pull_none>;
+		};
+		spi0m0_cs0n: spi0m0-cs0n {
+			rockchip,pins =
+				<0 RK_PA5 1 &pcfg_pull_none>;
+		};
+		spi0m0_cs1n: spi0m0-cs1n {
+			rockchip,pins =
+				<0 RK_PA4 1 &pcfg_pull_none>;
+		};
+		spi0m0_miso: spi0m0-miso {
+			rockchip,pins =
+				<0 RK_PA7 1 &pcfg_pull_none>;
+		};
+		spi0m0_mosi: spi0m0-mosi {
+			rockchip,pins =
+				<0 RK_PA6 1 &pcfg_pull_none>;
+		};
+		spi0m1_clk: spi0m1-clk {
+			rockchip,pins =
+				<2 RK_PA1 1 &pcfg_pull_none>;
+		};
+		spi0m1_cs0n: spi0m1-cs0n {
+			rockchip,pins =
+				<2 RK_PA0 1 &pcfg_pull_none>;
+		};
+		spi0m1_cs1n: spi0m1-cs1n {
+			rockchip,pins =
+				<1 RK_PD5 1 &pcfg_pull_none>;
+		};
+		spi0m1_miso: spi0m1-miso {
+			rockchip,pins =
+				<1 RK_PD7 1 &pcfg_pull_none>;
+		};
+		spi0m1_mosi: spi0m1-mosi {
+			rockchip,pins =
+				<1 RK_PD6 1 &pcfg_pull_none>;
+		};
+		spi0m2_clk: spi0m2-clk {
+			rockchip,pins =
+				<2 RK_PB2 6 &pcfg_pull_none>;
+		};
+		spi0m2_cs0n: spi0m2-cs0n {
+			rockchip,pins =
+				<2 RK_PA7 6 &pcfg_pull_none>;
+		};
+		spi0m2_cs1n: spi0m2-cs1n {
+			rockchip,pins =
+				<2 RK_PB3 6 &pcfg_pull_none>;
+		};
+		spi0m2_miso: spi0m2-miso {
+			rockchip,pins =
+				<2 RK_PB1 6 &pcfg_pull_none>;
+		};
+		spi0m2_mosi: spi0m2-mosi {
+			rockchip,pins =
+				<2 RK_PB0 6 &pcfg_pull_none>;
+		};
+	};
+	spi1 {
+		spi1m0_clk: spi1m0-clk {
+			rockchip,pins =
+				<3 RK_PC0 5 &pcfg_pull_none>;
+		};
+		spi1m0_cs0n: spi1m0-cs0n {
+			rockchip,pins =
+				<3 RK_PB5 5 &pcfg_pull_none>;
+		};
+		spi1m0_cs1n: spi1m0-cs1n {
+			rockchip,pins =
+				<3 RK_PB4 5 &pcfg_pull_none>;
+		};
+		spi1m0_miso: spi1m0-miso {
+			rockchip,pins =
+				<3 RK_PB7 5 &pcfg_pull_none>;
+		};
+		spi1m0_mosi: spi1m0-mosi {
+			rockchip,pins =
+				<3 RK_PB6 5 &pcfg_pull_none>;
+		};
+		spi1m1_clk: spi1m1-clk {
+			rockchip,pins =
+				<1 RK_PC6 3 &pcfg_pull_none>;
+		};
+		spi1m1_cs0n: spi1m1-cs0n {
+			rockchip,pins =
+				<1 RK_PC7 3 &pcfg_pull_none>;
+		};
+		spi1m1_cs1n: spi1m1-cs1n {
+			rockchip,pins =
+				<1 RK_PD0 3 &pcfg_pull_none>;
+		};
+		spi1m1_miso: spi1m1-miso {
+			rockchip,pins =
+				<1 RK_PC5 3 &pcfg_pull_none>;
+		};
+		spi1m1_mosi: spi1m1-mosi {
+			rockchip,pins =
+				<1 RK_PC4 3 &pcfg_pull_none>;
+		};
+		spi1m2_clk: spi1m2-clk {
+			rockchip,pins =
+				<2 RK_PD5 6 &pcfg_pull_none>;
+		};
+		spi1m2_cs0n: spi1m2-cs0n {
+			rockchip,pins =
+				<2 RK_PD4 6 &pcfg_pull_none>;
+		};
+		spi1m2_cs1n: spi1m2-cs1n {
+			rockchip,pins =
+				<3 RK_PA0 6 &pcfg_pull_none>;
+		};
+		spi1m2_miso: spi1m2-miso {
+			rockchip,pins =
+				<2 RK_PD7 6 &pcfg_pull_none>;
+		};
+		spi1m2_mosi: spi1m2-mosi {
+			rockchip,pins =
+				<2 RK_PD6 6 &pcfg_pull_none>;
+		};
+	};
+	tsadc {
+		tsadcm0_pins: tsadcm0-pins {
+			rockchip,pins =
+				/* tsadc_shut_m0 */
+				<0 RK_PA1 1 &pcfg_pull_none>;
+		};
+		tsadcm1_pins: tsadcm1-pins {
+			rockchip,pins =
+				/* tsadc_shut_m1 */
+				<0 RK_PB2 2 &pcfg_pull_none>;
+		};
+		tsadc_shutorg: tsadc-shutorg {
+			rockchip,pins =
+				<0 RK_PA1 2 &pcfg_pull_none>;
+		};
+	};
+	uart0 {
+		uart0_xfer: uart0-xfer {
+			rockchip,pins =
+				/* uart0_rx */
+				<1 RK_PC2 1 &pcfg_pull_up>,
+				/* uart0_tx */
+				<1 RK_PC3 1 &pcfg_pull_up>;
+		};
+		uart0_ctsn: uart0-ctsn {
+			rockchip,pins =
+				<1 RK_PC1 1 &pcfg_pull_none>;
+		};
+		uart0_rtsn: uart0-rtsn {
+			rockchip,pins =
+				<1 RK_PC0 1 &pcfg_pull_none>;
+		};
+	};
+	uart1 {
+		uart1m0_xfer: uart1m0-xfer {
+			rockchip,pins =
+				/* uart1_rx_m0 */
+				<0 RK_PB7 2 &pcfg_pull_up>,
+				/* uart1_tx_m0 */
+				<0 RK_PB6 2 &pcfg_pull_up>;
+		};
+		uart1m0_ctsn: uart1m0-ctsn {
+			rockchip,pins =
+				<0 RK_PC1 2 &pcfg_pull_none>;
+		};
+		uart1m0_rtsn: uart1m0-rtsn {
+			rockchip,pins =
+				<0 RK_PC0 2 &pcfg_pull_none>;
+		};
+		uart1m1_xfer: uart1m1-xfer {
+			rockchip,pins =
+				/* uart1_rx_m1 */
+				<1 RK_PD1 5 &pcfg_pull_up>,
+				/* uart1_tx_m1 */
+				<1 RK_PD0 5 &pcfg_pull_up>;
+		};
+		uart1m1_ctsn: uart1m1-ctsn {
+			rockchip,pins =
+				<1 RK_PC7 5 &pcfg_pull_none>;
+		};
+		uart1m1_rtsn: uart1m1-rtsn {
+			rockchip,pins =
+				<1 RK_PC6 5 &pcfg_pull_none>;
+		};
+	};
+	uart2 {
+		uart2m0_xfer: uart2m0-xfer {
+			rockchip,pins =
+				/* uart2_rx_m0 */
+				<1 RK_PA4 3 &pcfg_pull_up>,
+				/* uart2_tx_m0 */
+				<1 RK_PA5 3 &pcfg_pull_up>;
+		};
+		uart2m1_xfer: uart2m1-xfer {
+			rockchip,pins =
+				/* uart2_rx_m1 */
+				<3 RK_PA3 1 &pcfg_pull_up>,
+				/* uart2_tx_m1 */
+				<3 RK_PA2 1 &pcfg_pull_up>;
+		};
+	};
+	uart3 {
+		uart3m0_xfer: uart3m0-xfer {
+			rockchip,pins =
+				/* uart3_rx_m0 */
+				<3 RK_PC7 4 &pcfg_pull_up>,
+				/* uart3_tx_m0 */
+				<3 RK_PC6 4 &pcfg_pull_up>;
+		};
+		uart3m0_ctsn: uart3m0-ctsn {
+			rockchip,pins =
+				<3 RK_PC5 4 &pcfg_pull_none>;
+		};
+		uart3m0_rtsn: uart3m0-rtsn {
+			rockchip,pins =
+				<3 RK_PC4 4 &pcfg_pull_none>;
+		};
+		uart3m1_xfer: uart3m1-xfer {
+			rockchip,pins =
+				/* uart3_rx_m1 */
+				<1 RK_PA6 2 &pcfg_pull_up>,
+				/* uart3_tx_m1 */
+				<1 RK_PA7 2 &pcfg_pull_up>;
+		};
+		uart3m2_xfer: uart3m2-xfer {
+			rockchip,pins =
+				/* uart3_rx_m2 */
+				<3 RK_PA1 4 &pcfg_pull_up>,
+				/* uart3_tx_m2 */
+				<3 RK_PA0 4 &pcfg_pull_up>;
+		};
+		uart3m2_ctsn: uart3m2-ctsn {
+			rockchip,pins =
+				<2 RK_PD7 4 &pcfg_pull_none>;
+		};
+		uart3m2_rtsn: uart3m2-rtsn {
+			rockchip,pins =
+				<2 RK_PD6 4 &pcfg_pull_none>;
+		};
+		uart3_ctsn: uart3-ctsn {
+			rockchip,pins =
+				<1 RK_PB1 2 &pcfg_pull_none>;
+		};
+		uart3_rtsn: uart3-rtsn {
+			rockchip,pins =
+				<1 RK_PB0 2 &pcfg_pull_none>;
+		};
+	};
+	uart4 {
+		uart4m0_xfer: uart4m0-xfer {
+			rockchip,pins =
+				/* uart4_rx_m0 */
+				<3 RK_PA5 4 &pcfg_pull_up>,
+				/* uart4_tx_m0 */
+				<3 RK_PA4 4 &pcfg_pull_up>;
+		};
+		uart4m0_ctsn: uart4m0-ctsn {
+			rockchip,pins =
+				<3 RK_PB3 4 &pcfg_pull_none>;
+		};
+		uart4m0_rtsn: uart4m0-rtsn {
+			rockchip,pins =
+				<3 RK_PB2 4 &pcfg_pull_none>;
+		};
+		uart4m1_xfer: uart4m1-xfer {
+			rockchip,pins =
+				/* uart4_rx_m1 */
+				<2 RK_PA7 4 &pcfg_pull_up>,
+				/* uart4_tx_m1 */
+				<2 RK_PA6 4 &pcfg_pull_up>;
+		};
+		uart4m1_ctsn: uart4m1-ctsn {
+			rockchip,pins =
+				<2 RK_PA5 4 &pcfg_pull_none>;
+		};
+		uart4m1_rtsn: uart4m1-rtsn {
+			rockchip,pins =
+				<2 RK_PA4 4 &pcfg_pull_none>;
+		};
+		uart4m2_xfer: uart4m2-xfer {
+			rockchip,pins =
+				/* uart4_rx_m2 */
+				<1 RK_PD4 3 &pcfg_pull_up>,
+				/* uart4_tx_m2 */
+				<1 RK_PD5 3 &pcfg_pull_up>;
+		};
+		uart4m2_ctsn: uart4m2-ctsn {
+			rockchip,pins =
+				<1 RK_PD3 3 &pcfg_pull_none>;
+		};
+		uart4m2_rtsn: uart4m2-rtsn {
+			rockchip,pins =
+				<1 RK_PD2 3 &pcfg_pull_none>;
+		};
+	};
+	uart5 {
+		uart5m0_xfer: uart5m0-xfer {
+			rockchip,pins =
+				/* uart5_rx_m0 */
+				<3 RK_PA7 4 &pcfg_pull_up>,
+				/* uart5_tx_m0 */
+				<3 RK_PA6 4 &pcfg_pull_up>;
+		};
+		uart5m0_ctsn: uart5m0-ctsn {
+			rockchip,pins =
+				<3 RK_PB1 4 &pcfg_pull_none>;
+		};
+		uart5m0_rtsn: uart5m0-rtsn {
+			rockchip,pins =
+				<3 RK_PB0 4 &pcfg_pull_none>;
+		};
+		uart5m1_xfer: uart5m1-xfer {
+			rockchip,pins =
+				/* uart5_rx_m1 */
+				<2 RK_PB1 4 &pcfg_pull_up>,
+				/* uart5_tx_m1 */
+				<2 RK_PB0 4 &pcfg_pull_up>;
+		};
+		uart5m1_ctsn: uart5m1-ctsn {
+			rockchip,pins =
+				<2 RK_PB3 4 &pcfg_pull_none>;
+		};
+		uart5m1_rtsn: uart5m1-rtsn {
+			rockchip,pins =
+				<2 RK_PB2 4 &pcfg_pull_none>;
+		};
+		uart5m2_xfer: uart5m2-xfer {
+			rockchip,pins =
+				/* uart5_rx_m2 */
+				<2 RK_PA1 3 &pcfg_pull_up>,
+				/* uart5_tx_m2 */
+				<2 RK_PA0 3 &pcfg_pull_up>;
+		};
+		uart5m2_ctsn: uart5m2-ctsn {
+			rockchip,pins =
+				<2 RK_PA3 3 &pcfg_pull_none>;
+		};
+		uart5m2_rtsn: uart5m2-rtsn {
+			rockchip,pins =
+				<2 RK_PA2 3 &pcfg_pull_none>;
+		};
+	};
+};
diff --git a/arch/arm/dts/rv1126-u-boot.dtsi b/arch/arm/dts/rv1126-u-boot.dtsi
index 744a860286..7c84239601 100644
--- a/arch/arm/dts/rv1126-u-boot.dtsi
+++ b/arch/arm/dts/rv1126-u-boot.dtsi
@@ -1,24 +1,49 @@
 /*
- * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ * (C) Copyright 2020 Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:     GPL-2.0+
  */
 
 / {
+	aliases {
+		mmc0 = &emmc;
+		mmc1 = &sdmmc;
+	};
+
 	chosen {
 		stdout-path = &uart2;
 	};
 };
 
-&cru {
+&uart2 {
+	clock-frequency = <24000000>;
 	u-boot,dm-pre-reloc;
 };
 
-&grf {
+&sdmmc {
 	u-boot,dm-pre-reloc;
 };
 
-&uart2 {
+&emmc {
+	u-boot,dm-pre-reloc;
+};
+
+&pmu {
+	u-boot,dm-pre-reloc;
+};
+
+&pmugrf {
+	u-boot,dm-pre-reloc;
+};
+
+&pmucru {
+	u-boot,dm-pre-reloc;
+};
+
+&cru {
+	u-boot,dm-pre-reloc;
+};
+
+&grf {
 	u-boot,dm-pre-reloc;
-	clock-frequency = <24000000>;
 };
diff --git a/arch/arm/dts/rv1126.dtsi b/arch/arm/dts/rv1126.dtsi
index 05ea31c5fd..c420dfe88a 100644
--- a/arch/arm/dts/rv1126.dtsi
+++ b/arch/arm/dts/rv1126.dtsi
@@ -4,9 +4,13 @@
  */
 
 #include <dt-bindings/clock/rv1126-cru.h>
+#include <dt-bindings/power/rv1126-power.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/soc/rockchip-system-status.h>
+#include "rv1126-dram-default-timing.dtsi"
 
 / {
 	#address-cells = <1>;
@@ -17,6 +21,12 @@
 	interrupt-parent = <&gic>;
 
 	aliases {
+		i2c0 = &i2c0;
+		i2c1 = &i2c1;
+		i2c2 = &i2c2;
+		i2c3 = &i2c3;
+		i2c4 = &i2c4;
+		i2c5 = &i2c5;
 		serial0 = &uart0;
 		serial1 = &uart1;
 		serial2 = &uart2;
@@ -34,24 +44,58 @@
 			compatible = "arm,cortex-a7";
 			reg = <0xf00>;
 			clocks = <&cru ARMCLK>;
+			operating-points-v2 = <&cpu0_opp_table>;
 		};
 
 		cpu1: cpu@f01 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a7";
 			reg = <0xf01>;
+			clocks = <&cru ARMCLK>;
+			operating-points-v2 = <&cpu0_opp_table>;
 		};
 
 		cpu2: cpu@f02 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a7";
 			reg = <0xf02>;
+			clocks = <&cru ARMCLK>;
+			operating-points-v2 = <&cpu0_opp_table>;
 		};
 
 		cpu3: cpu@f03 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a7";
 			reg = <0xf03>;
+			clocks = <&cru ARMCLK>;
+			operating-points-v2 = <&cpu0_opp_table>;
+		};
+	};
+
+	cpu0_opp_table: cpu0-opp-table {
+		compatible = "operating-points-v2";
+		opp-shared;
+
+		opp-408000000 {
+			opp-hz = /bits/ 64 <408000000>;
+			opp-microvolt = <800000 800000 945000>;
+			clock-latency-ns = <40000>;
+			opp-suspend;
+		};
+		opp-600000000 {
+			opp-hz = /bits/ 64 <600000000>;
+			opp-microvolt = <800000 800000 945000>;
+			clock-latency-ns = <40000>;
+		};
+		opp-816000000 {
+			opp-hz = /bits/ 64 <816000000>;
+			opp-microvolt = <800000 800000 945000>;
+			clock-latency-ns = <40000>;
+		};
+		opp-1008000000 {
+			opp-hz = /bits/ 64 <1008000000>;
+			opp-microvolt = <800000 800000 945000>;
+			clock-latency-ns = <40000>;
 		};
 	};
 
@@ -64,6 +108,44 @@
 		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
 	};
 
+	display_subsystem: display-subsystem {
+		compatible = "rockchip,display-subsystem";
+		ports = <&vop_out>;
+		status = "disabled";
+	};
+
+	fiq_debugger: fiq-debugger {
+		compatible = "rockchip,fiq-debugger";
+		rockchip,serial-id = <2>;
+		rockchip,wake-irq = <0>;
+		rockchip,irq-mode-enable = <0>;
+		rockchip,baudrate = <115200>;  /* Only 115200 and 1500000 */
+		interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
+		status = "disabled";
+	};
+
+	rgb: rgb {
+		compatible = "rockchip,rv1126-rgb";
+		status = "disabled";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				rgb_in_vop: endpoint@0 {
+					reg = <0>;
+					remote-endpoint = <&vop_out_rgb>;
+				};
+			};
+
+		};
+	};
+
 	timer {
 		compatible = "arm,armv7-timer";
 		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
@@ -85,6 +167,116 @@
 		reg = <0xfe000000 0x1000>;
 	};
 
+	pmugrf: syscon@fe020000 {
+		compatible = "rockchip,rv1126-pmugrf", "syscon";
+		reg = <0xfe020000 0x1000>;
+	};
+
+	qos_usb_host: qos@fe810008 {
+		compatible = "syscon";
+		reg = <0xfe810008 0x20>;
+	};
+
+	qos_usb_otg: qos@fe810088 {
+		compatible = "syscon";
+		reg = <0xfe810088 0x20>;
+	};
+
+	qos_npu: qos@fe850008 {
+		compatible = "syscon";
+		reg = <0xfe850008 0x20>;
+	};
+
+	qos_emmc: qos@fe860008 {
+		compatible = "syscon";
+		reg = <0xfe860008 0x20>;
+	};
+
+	qos_nandc: qos@fe860088 {
+		compatible = "syscon";
+		reg = <0xe860088 0x20>;
+	};
+
+	qos_sfc: qos@fe860208 {
+		compatible = "syscon";
+		reg = <0xfe860208 0x20>;
+	};
+
+	qos_sdmmc: qos@fe868008 {
+		compatible = "syscon";
+		reg = <0xfe868008  0x20>;
+	};
+
+	qos_sdio: qos@fe86c008 {
+		compatible = "syscon";
+		reg = <0xfe86c008 0x20>;
+	};
+
+	qos_vepu_rd0: qos@fe870008 {
+		compatible = "syscon";
+		reg = <0xfe870008 0x20>;
+	};
+
+	qos_vepu_rd1: qos@fe870088 {
+		compatible = "syscon";
+		reg = <0xfe870088 0x20>;
+	};
+
+	qos_vepu_wr: qos@fe870108 {
+		compatible = "syscon";
+		reg = <0xfe870108 0x20>;
+	};
+
+	qos_ispp_m0: qos@fe880018 {
+		compatible = "syscon";
+		reg = <0xfe880018 0x20>;
+	};
+
+	qos_ispp_m1: qos@fe880098 {
+		compatible = "syscon";
+		reg = <0xfe880098 0x20>;
+	};
+
+	qos_isp: qos@fe890008 {
+		compatible = "syscon";
+		reg = <0xfe890008 0x20>;
+	};
+
+	qos_cif_lite: qos@fe890088 {
+		compatible = "syscon";
+		reg = <0xfe890088 0x20>;
+	};
+
+	qos_cif: qos@fe890108 {
+		compatible = "syscon";
+		reg = <0xfe890108 0x20>;
+	};
+
+	qos_iep: qos@fe8a0008 {
+		compatible = "syscon";
+		reg = <0xfe8a0008 0x20>;
+	};
+
+	qos_rga_rd: qos@fe8a0088 {
+		compatible = "syscon";
+		reg = <0xfe8a0088 0x20>;
+	};
+
+	qos_rga_wr: qos@fe8a0108 {
+		compatible = "syscon";
+		reg = <0xfe8a0108 0x20>;
+	};
+
+	qos_vop: qos@fe8a0188 {
+		compatible = "syscon";
+		reg = <0xfe8a0188 0x20>;
+	};
+
+	qos_vdpu: qos@fe8b0008 {
+		compatible = "syscon";
+		reg = <0xfe8b0008 0x20>;
+	};
+
 	gic: interrupt-controller@feff0000 {
 		compatible = "arm,gic-400";
 		interrupt-controller;
@@ -98,6 +290,157 @@
 		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
 	};
 
+	pvtm@ff040000 {
+		compatible = "rockchip,rv1126-cpu-pvtm";
+		reg = <0xff040000 0x100>;
+		clocks = <&cru CLK_CPUPVTM>, <&cru PCLK_CPUPVTM>;
+		clock-names = "clk", "pclk";
+		resets = <&cru SRST_CPUPVTM>, <&cru SRST_CPUPVTM_P>;
+		reset-names = "clk", "pclk";
+	};
+
+	pmu: power-management@ff3e0000 {
+		compatible = "rockchip,rv1126-pmu", "syscon";
+		reg = <0xff3e0000 0x1000>;
+
+		power: power-controller {
+			compatible = "rockchip,rv1126-power-controller";
+			#power-domain-cells = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+
+			/* These power domains are grouped by VD_NPU */
+			pd_npu@RV1126_PD_NPU {
+				reg = <RV1126_PD_NPU>;
+				clocks = <&cru ACLK_NPU>,
+					 <&cru HCLK_NPU>,
+					 <&cru PCLK_PDNPU>,
+					 <&cru CLK_CORE_NPU>;
+				pm_qos = <&qos_npu>;
+			};
+			/* These power domains are grouped by VD_VEPU */
+			pd_vepu@RV1126_PD_VEPU {
+				reg = <RV1126_PD_VEPU>;
+				clocks = <&cru ACLK_VENC>,
+					 <&cru HCLK_VENC>,
+					 <&cru CLK_VENC_CORE>;
+				pm_qos = <&qos_vepu_rd0>,
+					 <&qos_vepu_rd1>,
+					 <&qos_vepu_wr>;
+			};
+			/* These power domains are grouped by VD_LOGIC */
+			pd_vi@RV1126_PD_VI {
+				reg = <RV1126_PD_VI>;
+				clocks = <&cru ACLK_ISP>,
+					 <&cru HCLK_ISP>,
+					 <&cru CLK_ISP>,
+					 <&cru ACLK_CIF>,
+					 <&cru HCLK_CIF>,
+					 <&cru DCLK_CIF>,
+					 <&cru CLK_CIF_OUT>,
+					 <&cru CLK_MIPICSI_OUT>,
+					 <&cru PCLK_CSIHOST>,
+					 <&cru ACLK_CIFLITE>,
+					 <&cru HCLK_CIFLITE>,
+					 <&cru DCLK_CIFLITE>;
+				pm_qos = <&qos_isp>,
+					 <&qos_cif_lite>,
+					 <&qos_cif>;
+			};
+			pd_vo@RV1126_PD_VO {
+				reg = <RV1126_PD_VO>;
+				clocks = <&cru ACLK_RGA>,
+					 <&cru HCLK_RGA>,
+					 <&cru CLK_RGA_CORE>,
+					 <&cru ACLK_VOP>,
+					 <&cru HCLK_VOP>,
+					 <&cru DCLK_VOP>,
+					 <&cru PCLK_DSIHOST>,
+					 <&cru ACLK_IEP>,
+					 <&cru HCLK_IEP>,
+					 <&cru CLK_IEP_CORE>;
+				pm_qos = <&qos_rga_rd>, <&qos_rga_wr>,
+					 <&qos_vop>, <&qos_iep>;
+			};
+			pd_ispp@RV1126_PD_ISPP {
+				reg = <RV1126_PD_ISPP>;
+				clocks = <&cru ACLK_ISPP>,
+					 <&cru HCLK_ISPP>,
+					 <&cru CLK_ISPP>;
+				pm_qos = <&qos_ispp_m0>,
+					 <&qos_ispp_m1>;
+			};
+			pd_vdpu@RV1126_PD_VDPU {
+				reg = <RV1126_PD_VDPU>;
+				clocks = <&cru ACLK_VDEC>,
+					 <&cru HCLK_VDEC>,
+					 <&cru CLK_VDEC_CORE>,
+					 <&cru CLK_VDEC_CA>,
+					 <&cru CLK_VDEC_HEVC_CA>,
+					 <&cru ACLK_JPEG>,
+					 <&cru HCLK_JPEG>;
+				pm_qos = <&qos_vdpu>;
+			};
+			pd_nvm@RV1126_PD_NVM {
+				reg = <RV1126_PD_NVM>;
+				clocks = <&cru HCLK_EMMC>,
+					 <&cru CLK_EMMC>,
+					 <&cru HCLK_NANDC>,
+					 <&cru CLK_NANDC>,
+					 <&cru HCLK_SFC>,
+					 <&cru HCLK_SFCXIP>,
+					 <&cru SCLK_SFC>;
+				pm_qos = <&qos_emmc>,
+					 <&qos_nandc>,
+					 <&qos_sfc>,
+					 <&qos_sdmmc>;
+			};
+			pd_sdio@RV1126_PD_SDIO {
+				reg = <RV1126_PD_SDIO>;
+				clocks = <&cru HCLK_SDIO>,
+					 <&cru CLK_SDIO>;
+				pm_qos = <&qos_sdio>;
+			};
+			pd_usb@RV1126_PD_USB {
+				reg = <RV1126_PD_USB>;
+				clocks = <&cru HCLK_USBHOST>,
+					 <&cru HCLK_USBHOST_ARB>,
+					 <&cru CLK_USBHOST_UTMI_OHCI>,
+					 <&cru ACLK_USBOTG>,
+					 <&cru CLK_USBOTG_REF>;
+				pm_qos = <&qos_usb_host>,
+					 <&qos_usb_otg>;
+			};
+		};
+	};
+
+	i2c0: i2c@ff3f0000 {
+		compatible = "rockchip,rv1126-i2c", "rockchip,rk3399-i2c";
+		reg = <0xff3f0000 0x1000>;
+		interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&cru CLK_I2C0>, <&cru PCLK_I2C0>;
+		clock-names = "i2c", "pclk";
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c0_xfer>;
+		status = "disabled";
+	};
+
+	i2c2: i2c@ff400000 {
+		compatible = "rockchip,rv1126-i2c", "rockchip,rk3399-i2c";
+		reg = <0xff400000 0x1000>;
+		interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&cru CLK_I2C2>, <&cru PCLK_I2C2>;
+		clock-names = "i2c", "pclk";
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c2_xfer>;
+		status = "disabled";
+	};
+
 	amba {
 		compatible = "simple-bus";
 		#address-cells = <1>;
@@ -121,12 +464,112 @@
 		interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
 		reg-shift = <2>;
 		reg-io-width = <4>;
+		dmas = <&dmac 7>, <&dmac 6>;
 		clock-frequency = <24000000>;
 		clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
 		clock-names = "baudclk", "apb_pclk";
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>;
+		status = "disabled";
+	};
+
+	pwm0: pwm@ff430000 {
+		compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
+		reg = <0xff430000 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm0m0_pins>;
+		clocks = <&cru CLK_PWM0>, <&cru PCLK_PWM0>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm1: pwm@ff430010 {
+		compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
+		reg = <0xff430010 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm1m0_pins>;
+		clocks = <&cru CLK_PWM0>, <&cru PCLK_PWM0>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm2: pwm@ff430020 {
+		compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
+		reg = <0xff430020 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm2m0_pins>;
+		clocks = <&cru CLK_PWM0>, <&cru PCLK_PWM0>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm3: pwm@ff430030 {
+		compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
+		reg = <0xff430030 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm3m0_pins>;
+		clocks = <&cru CLK_PWM0>, <&cru PCLK_PWM0>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm4: pwm@ff440000 {
+		compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
+		reg = <0xff440000 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm4m0_pins>;
+		clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm5: pwm@ff440010 {
+		compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
+		reg = <0xff440010 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm5m0_pins>;
+		clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm6: pwm@ff440020 {
+		compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
+		reg = <0xff440020 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm6m0_pins>;
+		clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm7: pwm@ff440030 {
+		compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
+		reg = <0xff440030 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm7m0_pins>;
+		clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
+		clock-names = "pwm", "pclk";
 		status = "disabled";
 	};
 
+	pvtm@ff470000 {
+		compatible = "rockchip,rv1126-pmu-pvtm";
+		reg = <0xff470000 0x100>;
+		clocks = <&pmucru CLK_PMUPVTM>, <&pmucru PCLK_PMUPVTM>;
+		clock-names = "clk", "pclk";
+		resets = <&cru SRST_PMUPVTM>, <&cru SRST_PMUPVTM_P>;
+		reset-names = "clk", "pclk";
+	};
+
 	pmucru: clock-controller@ff480000 {
 		compatible = "rockchip,rv1126-pmucru";
 		reg = <0xff480000 0x1000>;
@@ -141,15 +584,120 @@
 		rockchip,grf = <&grf>;
 		#clock-cells = <1>;
 		#reset-cells = <1>;
+
+		assigned-clocks =
+			<&pmucru CLK_RTC32K>, <&pmucru PLL_GPLL>,
+			<&pmucru PCLK_PDPMU>, <&cru PLL_CPLL>,
+			<&cru PLL_HPLL>, <&cru ARMCLK>,
+			<&cru ACLK_PDBUS>, <&cru HCLK_PDBUS>,
+			<&cru PCLK_PDBUS>, <&cru ACLK_PDPHP>,
+			<&cru HCLK_PDPHP>, <&cru HCLK_PDAUDIO>,
+			<&cru HCLK_PDCORE_NIU>;
+		assigned-clock-rates =
+			<32768>, <1188000000>,
+			<100000000>, <1000000000>,
+			<1600000000>, <600000000>,
+			<500000000>, <200000000>,
+			<100000000>, <300000000>,
+			<200000000>, <150000000>,
+			<200000000>;
+		assigned-clock-parents =
+			<&pmucru CLK_OSC0_DIV32K>;
 	};
 
-	fiq_debugger: fiq-debugger {
-		compatible = "rockchip,fiq-debugger";
-		rockchip,serial-id = <2>;
-		rockchip,wake-irq = <0>;
-		rockchip,irq-mode-enable = <0>;
-		rockchip,baudrate = <115200>;  /* Only 115200 and 1500000 */
-		interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
+	i2c1: i2c@ff510000 {
+		compatible = "rockchip,rv1126-i2c", "rockchip,rk3399-i2c";
+		reg = <0xff510000 0x1000>;
+		interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&cru CLK_I2C1>, <&cru PCLK_I2C1>;
+		clock-names = "i2c", "pclk";
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c1_xfer>;
+		status = "disabled";
+	};
+
+	i2c3: i2c@ff520000 {
+		compatible = "rockchip,rv1126-i2c", "rockchip,rk3399-i2c";
+		reg = <0xff520000 0x1000>;
+		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&cru CLK_I2C3>, <&cru PCLK_I2C3>;
+		clock-names = "i2c", "pclk";
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c3m0_xfer>;
+		status = "disabled";
+	};
+
+	i2c4: i2c@ff530000 {
+		compatible = "rockchip,rv1126-i2c", "rockchip,rk3399-i2c";
+		reg = <0xff530000 0x1000>;
+		interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&cru CLK_I2C4>, <&cru PCLK_I2C4>;
+		clock-names = "i2c", "pclk";
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c4m0_xfer>;
+		status = "disabled";
+	};
+
+	i2c5: i2c@ff540000 {
+		compatible = "rockchip,rv1126-i2c", "rockchip,rk3399-i2c";
+		reg = <0xff540000 0x1000>;
+		interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&cru CLK_I2C5>, <&cru PCLK_I2C5>;
+		clock-names = "i2c", "pclk";
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c5m0_xfer>;
+		status = "disabled";
+	};
+
+	pwm8: pwm@ff550000 {
+		compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
+		reg = <0xff550000 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm8m0_pins>;
+		clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm9: pwm@ff550010 {
+		compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
+		reg = <0xff550010 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm9m0_pins>;
+		clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm10: pwm@ff550020 {
+		compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
+		reg = <0xff550020 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm10m0_pins>;
+		clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm11: pwm@ff550030 {
+		compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
+		reg = <0xff550030 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm11m0_pins>;
+		clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>;
+		clock-names = "pwm", "pclk";
 		status = "disabled";
 	};
 
@@ -159,9 +707,12 @@
 		interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
 		reg-shift = <2>;
 		reg-io-width = <4>;
+		dmas = <&dmac 5>, <&dmac 4>;
 		clock-frequency = <24000000>;
 		clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
 		clock-names = "baudclk", "apb_pclk";
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart0_xfer &uart0_ctsn &uart0_rtsn>;
 		status = "disabled";
 	};
 
@@ -171,9 +722,12 @@
 		interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
 		reg-shift = <2>;
 		reg-io-width = <4>;
+		dmas = <&dmac 9>, <&dmac 8>;
 		clock-frequency = <24000000>;
 		clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
 		clock-names = "baudclk", "apb_pclk";
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart2m1_xfer>;
 		status = "disabled";
 	};
 
@@ -183,9 +737,12 @@
 		interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
 		reg-shift = <2>;
 		reg-io-width = <4>;
+		dmas = <&dmac 11>, <&dmac 10>;
 		clock-frequency = <24000000>;
 		clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>;
 		clock-names = "baudclk", "apb_pclk";
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart3m0_xfer &uart3m0_ctsn &uart3m0_rtsn>;
 		status = "disabled";
 	};
 
@@ -195,9 +752,12 @@
 		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 		reg-shift = <2>;
 		reg-io-width = <4>;
+		dmas = <&dmac 13>, <&dmac 12>;
 		clock-frequency = <24000000>;
 		clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
 		clock-names = "baudclk", "apb_pclk";
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart4m0_xfer &uart4m0_ctsn &uart4m0_rtsn>;
 		status = "disabled";
 	};
 
@@ -207,9 +767,388 @@
 		interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 		reg-shift = <2>;
 		reg-io-width = <4>;
+		dmas = <&dmac 15>, <&dmac 14>;
 		clock-frequency = <24000000>;
 		clocks = <&cru SCLK_UART5>, <&cru PCLK_UART5>;
 		clock-names = "baudclk", "apb_pclk";
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart5m0_xfer &uart5m0_ctsn &uart5m0_rtsn>;
+		status = "disabled";
+	};
+
+	cpu_tsadc: tsadc@ff5f0000 {
+		compatible = "rockchip,rv1126-tsadc";
+		reg = <0xff5f0000 0x100>;
+		interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+		assigned-clocks = <&cru CLK_CPU_TSADC>;
+		assigned-clock-rates = <600000>;
+		clocks = <&cru CLK_CPU_TSADC>, <&cru PCLK_CPU_TSADC>,
+			 <&cru CLK_CPU_TSADCPHY>;
+		clock-names = "tsadc", "apb_pclk", "phy_clk";
+		resets = <&cru SRST_CPU_TSADC_P>, <&cru SRST_CPU_TSADC>,
+			 <&cru SRST_CPU_TSADCPHY>;
+		reset-names = "tsadc-apb", "tsadc", "tsadc-phy";
+		rockchip,hw-tshut-temp = <120000>;
+		#thermal-sensor-cells = <1>;
+		status = "disabled";
+	};
+
+	npu_tsadc: tsadc@ff5f8000 {
+		compatible = "rockchip,rv1126-tsadc";
+		reg = <0xff5f8000 0x100>;
+		interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+		assigned-clocks = <&cru CLK_NPU_TSADC>;
+		assigned-clock-rates = <600000>;
+		clocks = <&cru CLK_NPU_TSADC>, <&cru PCLK_NPU_TSADC>,
+			 <&cru CLK_NPU_TSADCPHY>;
+		clock-names = "tsadc", "apb_pclk", "phy_clk";
+		resets = <&cru SRST_NPU_TSADC_P>, <&cru SRST_NPU_TSADC>,
+			 <&cru SRST_NPU_TSADCPHY>;
+		reset-names = "tsadc-apb", "tsadc", "tsadc-phy";
+		rockchip,hw-tshut-temp = <120000>;
+		#thermal-sensor-cells = <1>;
+		status = "disabled";
+	};
+
+	can: can@ff610000 {
+		compatible = "rockchip,can-1.0";
+		reg = <0xff610000 0x100>;
+		interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
+		assigned-clocks = <&cru CLK_CAN>;
+		assigned-clock-rates = <100000000>;
+		clocks = <&cru CLK_CAN>, <&cru PCLK_CAN>;
+		clock-names = "baudclk", "apb_pclk";
+		resets = <&cru SRST_CAN>, <&cru SRST_CAN_P>;
+		reset-names = "can", "can-apb";
+		status = "disabled";
+	};
+
+	mailbox: mailbox@ff6a0000 {
+		compatible = "rockchip,rv1126-mailbox",
+			     "rockchip,rk3368-mailbox";
+		reg = <0xff6a0000 0x1000>;
+		interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru PCLK_MAILBOX>;
+		clock-names = "pclk_mailbox";
+		#mbox-cells = <1>;
+		status = "disabled";
+	};
+
+	dfi: dfi@ff9c0000 {
+		reg = <0xff9c0000 0x400>;
+		compatible = "rockchip,rv1126-dfi";
+		rockchip,pmugrf = <&pmugrf>;
+		status = "disabled";
+	};
+
+	dmc: dmc {
+		compatible = "rockchip,rv1126-dmc";
+		devfreq-events = <&dfi>;
+		clocks = <&cru SCLK_DDRCLK>;
+		clock-names = "dmc_clk";
+		operating-points-v2 = <&dmc_opp_table>;
+		ddr_timing = <&ddr_timing>;
+		upthreshold = <40>;
+		downdifferential = <20>;
+		system-status-freq = <
+			/*system status         freq(KHz)*/
+			SYS_STATUS_NORMAL       924000
+			SYS_STATUS_REBOOT       450000
+			SYS_STATUS_SUSPEND      328000
+			SYS_STATUS_VIDEO_1080P  924000
+			SYS_STATUS_BOOST        924000
+			SYS_STATUS_ISP          924000
+			SYS_STATUS_PERFORMANCE  924000
+		>;
+		auto-min-freq = <328000>;
+		auto-freq-en = <0>;
+		#cooling-cells = <2>;
+		status = "disabled";
+	};
+
+	dmc_opp_table: dmc-opp-table {
+		compatible = "operating-points-v2";
+
+		opp-328000000 {
+			opp-hz = /bits/ 64 <328000000>;
+			opp-microvolt = <800000>;
+		};
+		opp-450000000 {
+			opp-hz = /bits/ 64 <450000000>;
+			opp-microvolt = <800000>;
+		};
+		opp-664000000 {
+			opp-hz = /bits/ 64 <664000000>;
+			opp-microvolt = <800000>;
+		};
+		opp-924000000 {
+			opp-hz = /bits/ 64 <924000000>;
+			opp-microvolt = <800000>;
+		};
+		opp-1056000000 {
+			opp-hz = /bits/ 64 <1056000000>;
+			opp-microvolt = <800000>;
+			status = "disabled";
+		};
+	};
+
+	vop: vop@ffb00000 {
+		compatible = "rockchip,rv1126-vop";
+		reg = <0xffb00000 0x200>, <0xffb00a00 0x400>;
+		reg-names = "regs", "gamma_lut";
+		interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_VOP>, <&cru DCLK_VOP>, <&cru HCLK_VOP>;
+		clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
+		iommus = <&vop_mmu>;
+		status = "disabled";
+
+		vop_out: port {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			vop_out_rgb: endpoint@0 {
+				reg = <0>;
+				remote-endpoint = <&rgb_in_vop>;
+			};
+		};
+	};
+
+	vop_mmu: iommu@ffb00f00 {
+		compatible = "rockchip,iommu";
+		reg = <0xffb00f00 0x100>;
+		interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "vop_mmu";
+		clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>;
+		clock-names = "aclk", "iface";
+		#iommu-cells = <0>;
+		rockchip,disable-device-link-resume;
+		status = "disabled";
+	};
+
+	rkisp: rkisp@ffb50000 {
+		compatible = "rockchip,rv1126-rkisp";
+		reg = <0xffb50000 0x10000>;
+		interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "isp_irq", "mi_irq", "mipi_irq";
+		clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>,
+			 <&cru CLK_ISP>;
+		clock-names = "aclk_isp", "hclk_isp", "clk_isp";
+		status = "disabled";
+	};
+
+	rkispp: rkispp@ffb60000 {
+		compatible = "rockchip,rv1126-rkispp";
+		reg = <0xffb60000 0x20000>;
+		interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "ispp_irq", "fec_irq";
+		clocks = <&cru ACLK_ISPP>, <&cru HCLK_ISPP>,
+			 <&cru CLK_ISPP>;
+		clock-names = "aclk_ispp", "hclk_ispp", "clk_ispp";
+		status = "disabled";
+	};
+
+	pvtm@ffc00000 {
+		compatible = "rockchip,rv1126-npu-pvtm";
+		reg = <0xffc00000 0x100>;
+		clocks = <&cru CLK_NPUPVTM>, <&cru PCLK_NPUPVTM>;
+		clock-names = "clk", "pclk";
+		resets = <&cru SRST_NPUPVTM>, <&cru SRST_NPUPVTM_P>;
+		reset-names = "clk", "pclk";
+	};
+
+	gmac: ethernet@ffc40000 {
+		compatible = "rockchip,rv1126-gmac", "snps,dwmac-4.20a";
+		reg = <0xffc40000 0x0ffff>;
+		interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "macirq", "eth_wake_irq";
+		rockchip,grf = <&grf>;
+		clocks = <&cru CLK_GMAC_SRC>, <&cru CLK_GMAC_TX_RX>,
+			 <&cru CLK_GMAC_TX_RX>, <&cru CLK_GMAC_REF>,
+			 <&cru ACLK_GMAC>, <&cru PCLK_GMAC>,
+			 <&cru RGMII_MODE_CLK>, <&cru CLK_GMAC_PTPREF>;
+		clock-names = "stmmaceth", "mac_clk_rx",
+			      "mac_clk_tx", "clk_mac_refout",
+			      "aclk_mac", "pclk_mac",
+			      "clk_mac_speed", "ptp_ref";
+		resets = <&cru SRST_PDGMAC_NIU_A>;
+		reset-names = "stmmaceth";
+
+		snps,mixed-burst;
+		snps,tso;
+
+		snps,axi-config = <&stmmac_axi_setup>;
+		snps,mtl-rx-config = <&mtl_rx_setup>;
+		snps,mtl-tx-config = <&mtl_tx_setup>;
+		phy-handle = <&phy>;
+		status = "disabled";
+
+		mdio {
+			#address-cells = <0x1>;
+			#size-cells = <0x0>;
+			compatible = "snps,dwmac-mdio";
+			phy: phy@0 {
+				compatible = "ethernet-phy-ieee802.3-c22";
+				device_type = "ethernet-phy";
+				reg = <0x0>;
+			};
+		};
+
+		stmmac_axi_setup: stmmac-axi-config {
+			snps,wr_osr_lmt = <4>;
+			snps,rd_osr_lmt = <8>;
+			snps,blen = <0 0 0 0 16 8 4>;
+		};
+
+		mtl_rx_setup: rx-queues-config {
+			snps,rx-queues-to-use = <1>;
+			queue0 {};
+		};
+
+		mtl_tx_setup: tx-queues-config {
+			snps,tx-queues-to-use = <1>;
+			queue0 {};
+		};
+	};
+
+	emmc: dwmmc@ffc50000 {
+		compatible = "rockchip,rv1126-dw-mshc", "rockchip,rk3288-dw-mshc";
+		reg = <0xffc50000 0x4000>;
+		interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_EMMC>, <&cru CLK_EMMC>,
+			 <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
+		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
+		fifo-depth = <0x100>;
+		max-frequency = <150000000>;
+		status = "disabled";
+	};
+
+	sdmmc: dwmmc@ffc60000 {
+		compatible = "rockchip,rv1126-dw-mshc", "rockchip,rk3288-dw-mshc";
+		reg = <0xffc60000 0x4000>;
+		interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_SDMMC>, <&cru CLK_SDMMC>,
+			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
+		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
+		fifo-depth = <0x100>;
+		max-frequency = <100000000>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&sdmmc1_clk &sdmmc1_cmd &sdmmc1_det &sdmmc1_bus4>;
+		status = "disabled";
+	};
+
+	sdio: dwmmc@ffc70000 {
+		compatible = "rockchip,rv1126-dw-mshc", "rockchip,rk3288-dw-mshc";
+		reg = <0xffc70000 0x4000>;
+		interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_SDIO>, <&cru CLK_SDIO>,
+			 <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
+		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
+		fifo-depth = <0x100>;
+		max-frequency = <150000000>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_bus4>;
+		status = "disabled";
+	};
+
+	nandc: nandc@ffc80000 {
+		compatible = "rockchip,rk-nandc";
+		reg = <0x0 0xffc80000 0x0 0x4000>;
+		interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+		nandc_id = <0>;
+		clocks = <&cru CLK_NANDC>, <&cru HCLK_NANDC>;
+		clock-names = "clk_nandc", "hclk_nandc";
+		status = "disabled";
+	};
+
+	sfc: sfc@ffc90000  {
+		compatible = "rockchip,sfc";
+		reg = <0xffc90000 0x4000>;
+		interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
+		clock-names = "clk_sfc", "hclk_sfc";
+		assigned-clocks = <&cru SCLK_SFC>;
+		assigned-clock-rates = <80000000>;
 		status = "disabled";
 	};
+
+	pinctrl: pinctrl {
+		compatible = "rockchip,rv1126-pinctrl";
+		rockchip,grf = <&grf>;
+		rockchip,pmu = <&pmugrf>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		gpio0: gpio@ff460000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0xff460000 0x100>;
+			interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru PCLK_GPIO0>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio1: gpio@ff620000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0xff620000 0x100>;
+			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru PCLK_GPIO1>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio2: gpio@ff630000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0xff630000 0x100>;
+			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru PCLK_GPIO2>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio3: gpio@ff640000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0xff640000 0x100>;
+			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru PCLK_GPIO3>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio4: gpio@ff650000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0xff650000 0x100>;
+			interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru PCLK_GPIO4>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+	};
 };
+
+#include "rv1126-pinctrl.dtsi"
+
diff --git a/include/dt-bindings/clock/rockchip-ddr.h b/include/dt-bindings/clock/rockchip-ddr.h
new file mode 100644
index 0000000000..b065432e77
--- /dev/null
+++ b/include/dt-bindings/clock/rockchip-ddr.h
@@ -0,0 +1,63 @@
+/*
+ *
+ * Copyright (C) 2017 ROCKCHIP, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef _DT_BINDINGS_CLOCK_ROCKCHIP_DDR_H
+#define _DT_BINDINGS_CLOCK_ROCKCHIP_DDR_H
+
+#define DDR2_DEFAULT	(0)
+
+#define DDR3_800D	(0)	/* 5-5-5 */
+#define DDR3_800E	(1)	/* 6-6-6 */
+#define DDR3_1066E	(2)	/* 6-6-6 */
+#define DDR3_1066F	(3)	/* 7-7-7 */
+#define DDR3_1066G	(4)	/* 8-8-8 */
+#define DDR3_1333F	(5)	/* 7-7-7 */
+#define DDR3_1333G	(6)	/* 8-8-8 */
+#define DDR3_1333H	(7)	/* 9-9-9 */
+#define DDR3_1333J	(8)	/* 10-10-10 */
+#define DDR3_1600G	(9)	/* 8-8-8 */
+#define DDR3_1600H	(10)	/* 9-9-9 */
+#define DDR3_1600J	(11)	/* 10-10-10 */
+#define DDR3_1600K	(12)	/* 11-11-11 */
+#define DDR3_1866J	(13)	/* 10-10-10 */
+#define DDR3_1866K	(14)	/* 11-11-11 */
+#define DDR3_1866L	(15)	/* 12-12-12 */
+#define DDR3_1866M	(16)	/* 13-13-13 */
+#define DDR3_2133K	(17)	/* 11-11-11 */
+#define DDR3_2133L	(18)	/* 12-12-12 */
+#define DDR3_2133M	(19)	/* 13-13-13 */
+#define DDR3_2133N	(20)	/* 14-14-14 */
+#define DDR3_DEFAULT	(21)
+#define DDR_DDR2	(22)
+#define DDR_LPDDR	(23)
+#define DDR_LPDDR2	(24)
+
+#define DDR4_1600J	(0)	/* 10-10-10 */
+#define DDR4_1600K	(1)	/* 11-11-11 */
+#define DDR4_1600L	(2)	/* 12-12-12 */
+#define DDR4_1866L	(3)	/* 12-12-12 */
+#define DDR4_1866M	(4)	/* 13-13-13 */
+#define DDR4_1866N	(5)	/* 14-14-14 */
+#define DDR4_2133N	(6)	/* 14-14-14 */
+#define DDR4_2133P	(7)	/* 15-15-15 */
+#define DDR4_2133R	(8)	/* 16-16-16 */
+#define DDR4_2400P	(9)	/* 15-15-15 */
+#define DDR4_2400R	(10)	/* 16-16-16 */
+#define DDR4_2400U	(11)	/* 18-18-18 */
+#define DDR4_DEFAULT	(12)
+
+#define PAUSE_CPU_STACK_SIZE	16
+
+#endif
diff --git a/include/dt-bindings/clock/rv1126-cru.h b/include/dt-bindings/clock/rv1126-cru.h
index b0fd0fb5c9..291155a9a8 100644
--- a/include/dt-bindings/clock/rv1126-cru.h
+++ b/include/dt-bindings/clock/rv1126-cru.h
@@ -210,6 +210,8 @@
 #define CLK_CORE_NPU		144
 #define CLK_CORE_NPUPVTM	145
 #define CLK_NPUPVTM		146
+#define SCLK_DDRCLK		147
+#define CLK_OTP			148
 
 /* dclk */
 #define DCLK_DECOM		150
@@ -350,8 +352,9 @@
 #define PCLK_CSIPHY1		291
 #define PCLK_USBPHY_HOST	292
 #define PCLK_USBPHY_OTG		293
+#define PCLK_OTP		294
 
-#define CLK_NR_CLKS		(PCLK_USBPHY_OTG + 1)
+#define CLK_NR_CLKS		(PCLK_OTP + 1)
 
 /* pmu soft-reset indices */
 
diff --git a/include/dt-bindings/memory/rv1126-dram.h b/include/dt-bindings/memory/rv1126-dram.h
new file mode 100644
index 0000000000..f33d873a5c
--- /dev/null
+++ b/include/dt-bindings/memory/rv1126-dram.h
@@ -0,0 +1,231 @@
+/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
+/*
+ * Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _DT_BINDINGS_DRAM_ROCKCHIP_RV1126_H
+#define _DT_BINDINGS_DRAM_ROCKCHIP_RV1126_H
+
+#define DDR2_DS_FULL			(0)
+#define DDR2_DS_REDUCE			(1)
+
+#define DDR2_ODT_DIS			(0)
+#define DDR2_ODT_50ohm			(50)	/* optional */
+#define DDR2_ODT_75ohm			(75)
+#define DDR2_ODT_150ohm			(150)
+
+#define DDR3_DS_34ohm			(34)
+#define DDR3_DS_40ohm			(40)
+
+#define DDR3_ODT_DIS			(0)
+#define DDR3_ODT_40ohm			(40)
+#define DDR3_ODT_60ohm			(60)
+#define DDR3_ODT_120ohm			(120)
+
+#define LP2_DS_34ohm			(34)
+#define LP2_DS_40ohm			(40)
+#define LP2_DS_48ohm			(48)
+#define LP2_DS_60ohm			(60)
+#define LP2_DS_68_6ohm			(68)	/* optional */
+#define LP2_DS_80ohm			(80)
+#define LP2_DS_120ohm			(120)	/* optional */
+
+#define LP3_DS_34ohm			(34)
+#define LP3_DS_40ohm			(40)
+#define LP3_DS_48ohm			(48)
+#define LP3_DS_60ohm			(60)
+#define LP3_DS_80ohm			(80)
+#define LP3_DS_34D_40U			(3440)
+#define LP3_DS_40D_48U			(4048)
+#define LP3_DS_34D_48U			(3448)
+
+#define LP3_ODT_DIS			(0)
+#define LP3_ODT_60ohm			(60)
+#define LP3_ODT_120ohm			(120)
+#define LP3_ODT_240ohm			(240)
+
+#define LP4_PDDS_40ohm			(40)
+#define LP4_PDDS_48ohm			(48)
+#define LP4_PDDS_60ohm			(60)
+#define LP4_PDDS_80ohm			(80)
+#define LP4_PDDS_120ohm			(120)
+#define LP4_PDDS_240ohm			(240)
+
+#define LP4_DQ_ODT_40ohm		(40)
+#define LP4_DQ_ODT_48ohm		(48)
+#define LP4_DQ_ODT_60ohm		(60)
+#define LP4_DQ_ODT_80ohm		(80)
+#define LP4_DQ_ODT_120ohm		(120)
+#define LP4_DQ_ODT_240ohm		(240)
+#define LP4_DQ_ODT_DIS			(0)
+
+#define LP4_CA_ODT_40ohm		(40)
+#define LP4_CA_ODT_48ohm		(48)
+#define LP4_CA_ODT_60ohm		(60)
+#define LP4_CA_ODT_80ohm		(80)
+#define LP4_CA_ODT_120ohm		(120)
+#define LP4_CA_ODT_240ohm		(240)
+#define LP4_CA_ODT_DIS			(0)
+
+#define DDR4_DS_34ohm			(34)
+#define DDR4_DS_48ohm			(48)
+#define DDR4_RTT_NOM_DIS		(0)
+#define DDR4_RTT_NOM_60ohm		(60)
+#define DDR4_RTT_NOM_120ohm		(120)
+#define DDR4_RTT_NOM_40ohm		(40)
+#define DDR4_RTT_NOM_240ohm		(240)
+#define DDR4_RTT_NOM_48ohm		(48)
+#define DDR4_RTT_NOM_80ohm		(80)
+#define DDR4_RTT_NOM_34ohm		(34)
+
+#define PHY_DDR3_RON_DISABLE		(0)
+#define PHY_DDR3_RON_506ohm		(1)
+#define PHY_DDR3_RON_253ohm		(2)
+#define PHY_DDR3_RON_169hm		(3)
+#define PHY_DDR3_RON_127ohm		(4)
+#define PHY_DDR3_RON_101ohm		(5)
+#define PHY_DDR3_RON_84ohm		(6)
+#define PHY_DDR3_RON_72ohm		(7)
+#define PHY_DDR3_RON_63ohm		(16)
+#define PHY_DDR3_RON_56ohm		(17)
+#define PHY_DDR3_RON_51ohm		(18)
+#define PHY_DDR3_RON_46ohm		(19)
+#define PHY_DDR3_RON_42ohm		(20)
+#define PHY_DDR3_RON_39ohm		(21)
+#define PHY_DDR3_RON_36ohm		(22)
+#define PHY_DDR3_RON_34ohm		(23)
+#define PHY_DDR3_RON_32ohm		(24)
+#define PHY_DDR3_RON_30ohm		(25)
+#define PHY_DDR3_RON_28ohm		(26)
+#define PHY_DDR3_RON_27ohm		(27)
+#define PHY_DDR3_RON_25ohm		(28)
+#define PHY_DDR3_RON_24ohm		(29)
+#define PHY_DDR3_RON_23ohm		(30)
+#define PHY_DDR3_RON_22ohm		(31)
+
+#define PHY_DDR3_RTT_DISABLE		(0)
+#define PHY_DDR3_RTT_953ohm		(1)
+#define PHY_DDR3_RTT_483ohm		(2)
+#define PHY_DDR3_RTT_320ohm		(3)
+#define PHY_DDR3_RTT_241ohm		(4)
+#define PHY_DDR3_RTT_193ohm		(5)
+#define PHY_DDR3_RTT_161ohm		(6)
+#define PHY_DDR3_RTT_138ohm		(7)
+#define PHY_DDR3_RTT_121ohm		(16)
+#define PHY_DDR3_RTT_107ohm		(17)
+#define PHY_DDR3_RTT_97ohm		(18)
+#define PHY_DDR3_RTT_88ohm		(19)
+#define PHY_DDR3_RTT_80ohm		(20)
+#define PHY_DDR3_RTT_74ohm		(21)
+#define PHY_DDR3_RTT_69ohm		(22)
+#define PHY_DDR3_RTT_64ohm		(23)
+#define PHY_DDR3_RTT_60ohm		(24)
+#define PHY_DDR3_RTT_57ohm		(25)
+#define PHY_DDR3_RTT_54ohm		(26)
+#define PHY_DDR3_RTT_51ohm		(27)
+#define PHY_DDR3_RTT_48ohm		(28)
+#define PHY_DDR3_RTT_46ohm		(29)
+#define PHY_DDR3_RTT_44ohm		(30)
+#define PHY_DDR3_RTT_42ohm		(31)
+
+#define PHY_DDR4_LPDDR3_RON_DISABLE	(0)
+#define PHY_DDR4_LPDDR3_RON_570ohm	(1)
+#define PHY_DDR4_LPDDR3_RON_285ohm	(2)
+#define PHY_DDR4_LPDDR3_RON_190ohm	(3)
+#define PHY_DDR4_LPDDR3_RON_142ohm	(4)
+#define PHY_DDR4_LPDDR3_RON_114ohm	(5)
+#define PHY_DDR4_LPDDR3_RON_95ohm	(6)
+#define PHY_DDR4_LPDDR3_RON_81ohm	(7)
+#define PHY_DDR4_LPDDR3_RON_71ohm	(16)
+#define PHY_DDR4_LPDDR3_RON_63ohm	(17)
+#define PHY_DDR4_LPDDR3_RON_57ohm	(18)
+#define PHY_DDR4_LPDDR3_RON_52ohm	(19)
+#define PHY_DDR4_LPDDR3_RON_47ohm	(20)
+#define PHY_DDR4_LPDDR3_RON_44ohm	(21)
+#define PHY_DDR4_LPDDR3_RON_41ohm	(22)
+#define PHY_DDR4_LPDDR3_RON_38ohm	(23)
+#define PHY_DDR4_LPDDR3_RON_36ohm	(24)
+#define PHY_DDR4_LPDDR3_RON_34ohm	(25)
+#define PHY_DDR4_LPDDR3_RON_32ohm	(26)
+#define PHY_DDR4_LPDDR3_RON_30ohm	(27)
+#define PHY_DDR4_LPDDR3_RON_28ohm	(28)
+#define PHY_DDR4_LPDDR3_RON_27ohm	(29)
+#define PHY_DDR4_LPDDR3_RON_26ohm	(30)
+#define PHY_DDR4_LPDDR3_RON_25ohm	(31)
+
+#define PHY_DDR4_LPDDR3_RTT_DISABLE	(0)
+#define PHY_DDR4_LPDDR3_RTT_973ohm	(1)
+#define PHY_DDR4_LPDDR3_RTT_493ohm	(2)
+#define PHY_DDR4_LPDDR3_RTT_327ohm	(3)
+#define PHY_DDR4_LPDDR3_RTT_247ohm	(4)
+#define PHY_DDR4_LPDDR3_RTT_197ohm	(5)
+#define PHY_DDR4_LPDDR3_RTT_164ohm	(6)
+#define PHY_DDR4_LPDDR3_RTT_141ohm	(7)
+#define PHY_DDR4_LPDDR3_RTT_123ohm	(16)
+#define PHY_DDR4_LPDDR3_RTT_109ohm	(17)
+#define PHY_DDR4_LPDDR3_RTT_99ohm	(18)
+#define PHY_DDR4_LPDDR3_RTT_90ohm	(19)
+#define PHY_DDR4_LPDDR3_RTT_82ohm	(20)
+#define PHY_DDR4_LPDDR3_RTT_76ohm	(21)
+#define PHY_DDR4_LPDDR3_RTT_70ohm	(22)
+#define PHY_DDR4_LPDDR3_RTT_66ohm	(23)
+#define PHY_DDR4_LPDDR3_RTT_62ohm	(24)
+#define PHY_DDR4_LPDDR3_RTT_58ohm	(25)
+#define PHY_DDR4_LPDDR3_RTT_55ohm	(26)
+#define PHY_DDR4_LPDDR3_RTT_52ohm	(27)
+#define PHY_DDR4_LPDDR3_RTT_49ohm	(28)
+#define PHY_DDR4_LPDDR3_RTT_47ohm	(29)
+#define PHY_DDR4_LPDDR3_RTT_45ohm	(30)
+#define PHY_DDR4_LPDDR3_RTT_43ohm	(31)
+
+#define PHY_LPDDR4_RON_DISABLE		(0)
+#define PHY_LPDDR4_RON_606ohm		(1)
+#define PHY_LPDDR4_RON_303ohm		(2)
+#define PHY_LPDDR4_RON_202ohm		(3)
+#define PHY_LPDDR4_RON_152ohm		(4)
+#define PHY_LPDDR4_RON_121ohm		(5)
+#define PHY_LPDDR4_RON_101ohm		(6)
+#define PHY_LPDDR4_RON_87ohm		(7)
+#define PHY_LPDDR4_RON_76ohm		(16)
+#define PHY_LPDDR4_RON_67ohm		(17)
+#define PHY_LPDDR4_RON_61ohm		(18)
+#define PHY_LPDDR4_RON_55ohm		(19)
+#define PHY_LPDDR4_RON_51ohm		(20)
+#define PHY_LPDDR4_RON_47ohm		(21)
+#define PHY_LPDDR4_RON_43ohm		(22)
+#define PHY_LPDDR4_RON_40ohm		(23)
+#define PHY_LPDDR4_RON_38ohm		(24)
+#define PHY_LPDDR4_RON_36ohm		(25)
+#define PHY_LPDDR4_RON_34ohm		(26)
+#define PHY_LPDDR4_RON_32ohm		(27)
+#define PHY_LPDDR4_RON_30ohm		(28)
+#define PHY_LPDDR4_RON_29ohm		(29)
+#define PHY_LPDDR4_RON_28ohm		(30)
+#define PHY_LPDDR4_RON_26ohm		(31)
+
+#define PHY_LPDDR4_RTT_DISABLE		(0)
+#define PHY_LPDDR4_RTT_998ohm		(1)
+#define PHY_LPDDR4_RTT_506ohm		(2)
+#define PHY_LPDDR4_RTT_336ohm		(3)
+#define PHY_LPDDR4_RTT_253ohm		(4)
+#define PHY_LPDDR4_RTT_202ohm		(5)
+#define PHY_LPDDR4_RTT_169ohm		(6)
+#define PHY_LPDDR4_RTT_144ohm		(7)
+#define PHY_LPDDR4_RTT_127ohm		(16)
+#define PHY_LPDDR4_RTT_112ohm		(17)
+#define PHY_LPDDR4_RTT_101ohm		(18)
+#define PHY_LPDDR4_RTT_92ohm		(19)
+#define PHY_LPDDR4_RTT_84ohm		(20)
+#define PHY_LPDDR4_RTT_78ohm		(21)
+#define PHY_LPDDR4_RTT_72ohm		(22)
+#define PHY_LPDDR4_RTT_67ohm		(23)
+#define PHY_LPDDR4_RTT_63ohm		(24)
+#define PHY_LPDDR4_RTT_60ohm		(25)
+#define PHY_LPDDR4_RTT_56ohm		(26)
+#define PHY_LPDDR4_RTT_53ohm		(27)
+#define PHY_LPDDR4_RTT_51ohm		(28)
+#define PHY_LPDDR4_RTT_48ohm		(29)
+#define PHY_LPDDR4_RTT_46ohm		(30)
+#define PHY_LPDDR4_RTT_44ohm		(31)
+
+#endif /*_DT_BINDINGS_DRAM_ROCKCHIP_RV1126_H*/
diff --git a/include/dt-bindings/power/rv1126-power.h b/include/dt-bindings/power/rv1126-power.h
new file mode 100644
index 0000000000..3e21010364
--- /dev/null
+++ b/include/dt-bindings/power/rv1126-power.h
@@ -0,0 +1,34 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __DT_BINDINGS_POWER_RV1126_POWER_H__
+#define __DT_BINDINGS_POWER_RV1126_POWER_H__
+
+/* VD_CORE */
+#define RV1126_PD_CPU_0		0
+#define RV1126_PD_CPU_1		1
+#define RV1126_PD_CPU_2		2
+#define RV1126_PD_CPU_3		3
+#define RV1126_PD_CORE_ALIVE	4
+
+/* VD_PMU */
+#define RV1126_PD_PMU           5
+#define RV1126_PD_PMU_ALIVE	6
+
+/* VD_NPU */
+#define RV1126_PD_NPU		7
+
+/* VD_VEPU */
+#define RV1126_PD_VEPU		8
+
+/* VD_LOGIC */
+#define RV1126_PD_VI		9
+#define RV1126_PD_VO		10
+#define RV1126_PD_ISPP		11
+#define RV1126_PD_VDPU		12
+#define RV1126_PD_CRYPTO	13
+#define RV1126_PD_DDR		14
+#define RV1126_PD_NVM		15
+#define RV1126_PD_SDIO		16
+#define RV1126_PD_USB		17
+#define RV1126_PD_LOGIC_ALIVE	18
+
+#endif
diff --git a/include/dt-bindings/soc/rockchip-system-status.h b/include/dt-bindings/soc/rockchip-system-status.h
new file mode 100644
index 0000000000..fe103a55f2
--- /dev/null
+++ b/include/dt-bindings/soc/rockchip-system-status.h
@@ -0,0 +1,43 @@
+/*
+ *
+ * Copyright (C) 2017 ROCKCHIP, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef _DT_BINDINGS_SOC_ROCKCHIP_SYSTEM_STATUS_H
+#define _DT_BINDINGS_SOC_ROCKCHIP_SYSTEM_STATUS_H
+
+#define SYS_STATUS_NORMAL	(1 << 0)
+#define SYS_STATUS_SUSPEND	(1 << 1)
+#define SYS_STATUS_IDLE		(1 << 2)
+#define SYS_STATUS_REBOOT	(1 << 3)
+#define SYS_STATUS_VIDEO_4K	(1 << 4)
+#define SYS_STATUS_VIDEO_1080P	(1 << 5)
+#define SYS_STATUS_GPU		(1 << 6)
+#define SYS_STATUS_RGA		(1 << 7)
+#define SYS_STATUS_CIF0		(1 << 8)
+#define SYS_STATUS_CIF1		(1 << 9)
+#define SYS_STATUS_LCDC0	(1 << 10)
+#define SYS_STATUS_LCDC1	(1 << 11)
+#define SYS_STATUS_BOOST	(1 << 12)
+#define SYS_STATUS_PERFORMANCE	(1 << 13)
+#define SYS_STATUS_ISP		(1 << 14)
+#define SYS_STATUS_HDMI		(1 << 15)
+#define SYS_STATUS_VIDEO_4K_10B	(1 << 16)
+#define SYS_STATUS_LOW_POWER	(1 << 17)
+
+#define SYS_STATUS_VIDEO	(SYS_STATUS_VIDEO_4K | \
+				 SYS_STATUS_VIDEO_1080P | \
+				 SYS_STATUS_VIDEO_4K_10B)
+#define SYS_STATUS_DUALVIEW	(SYS_STATUS_LCDC0 | SYS_STATUS_LCDC1)
+
+#endif

commit 7ebda5c0cb01795a7cbf4a62ee84b749512e237e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 4 14:17:40 2020 +0800

    make.sh: fix typo
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I9fbd41773992f8ace84b1657d4707e40a3c6cfce

diff --git a/make.sh b/make.sh
index f4e16cca54..14a5ea254e 100755
--- a/make.sh
+++ b/make.sh
@@ -340,7 +340,7 @@ select_chip_info()
 			&& RKCHIP=RK3368H
 		grep '^CONFIG_ROCKCHIP_RV1108=y' .config >/dev/null \
 			&& RKCHIP=RV110X
-		grep '^CONFIG_ROCKCHIP_RV1126=y' ${OUTDIR}/.config >/dev/null \
+		grep '^CONFIG_ROCKCHIP_RV1126=y' .config >/dev/null \
 			&& RKCHIP=RV1126
 	elif [ $count -gt 1 ]; then
 		# Grep the RK CHIP variant

commit 200899f92b547709bf07fe93c3ef22cccaa49125
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Tue Mar 3 15:52:51 2020 +0800

    clk: rockchip: rv1126: Don't restore clk when gpll is default 24MHz
    
    Change-Id: Ie7b2609078ae1b68fb8e081b4064381e3dbb36a8
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rv1126.c b/drivers/clk/rockchip/clk_rv1126.c
index f523ef531f..38431dd72b 100644
--- a/drivers/clk/rockchip/clk_rv1126.c
+++ b/drivers/clk/rockchip/clk_rv1126.c
@@ -1613,12 +1613,16 @@ static ulong rv1126_gpll_set_rate(struct rv1126_clk_priv *priv,
 				  ulong rate)
 {
 	ulong emmc_rate, sfc_rate, nandc_rate;
-
-	emmc_rate = rv1126_mmc_get_clk(priv, CLK_EMMC);
-	sfc_rate = rv1126_sfc_get_clk(priv);
-	nandc_rate = rv1126_nand_get_clk(priv);
-	debug("%s emmc=%lu, sdmmc=%lu, nandc=%lu\n", __func__,
-	      emmc_rate, sfc_rate, nandc_rate);
+	bool restore = false;
+
+	if (priv->gpll_hz != OSC_HZ) {
+		emmc_rate = rv1126_mmc_get_clk(priv, CLK_EMMC);
+		sfc_rate = rv1126_sfc_get_clk(priv);
+		nandc_rate = rv1126_nand_get_clk(priv);
+		debug("%s emmc=%lu, sfc=%lu, nandc=%lu\n", __func__,
+		      emmc_rate, sfc_rate, nandc_rate);
+		restore = true;
+	}
 
 	/*
 	 * the child div is big enough for gpll 1188MHz,
@@ -1630,9 +1634,11 @@ static ulong rv1126_gpll_set_rate(struct rv1126_clk_priv *priv,
 	pmu_priv->gpll_hz = rate;
 	priv->gpll_hz = rate;
 
-	rv1126_mmc_set_clk(priv, CLK_EMMC, emmc_rate);
-	rv1126_sfc_set_clk(priv,  sfc_rate);
-	rv1126_nand_set_clk(priv, nandc_rate);
+	if (restore) {
+		rv1126_mmc_set_clk(priv, CLK_EMMC, emmc_rate);
+		rv1126_sfc_set_clk(priv,  sfc_rate);
+		rv1126_nand_set_clk(priv, nandc_rate);
+	}
 
 	return 0;
 }
@@ -1680,15 +1686,15 @@ static void rv1126_clk_init(struct rv1126_clk_priv *priv)
 		if (!ret)
 			priv->armclk_init_hz = APLL_HZ;
 	}
-	if (priv->gpll_hz != GPLL_HZ)
-		rv1126_gpll_set_clk(priv, GPLL_HZ);
-
 	if (priv->cpll_hz != CPLL_HZ) {
 		ret = rockchip_pll_set_rate(&rv1126_pll_clks[CPLL], priv->cru,
 					    CPLL, CPLL_HZ);
 		if (!ret)
 			priv->cpll_hz = CPLL_HZ;
 	}
+	if (priv->gpll_hz != GPLL_HZ)
+		rv1126_gpll_set_clk(priv, GPLL_HZ);
+
 	rv1126_pdbus_set_clk(priv, ACLK_PDBUS, ACLK_PDBUS_HZ);
 	rv1126_pdbus_set_clk(priv, HCLK_PDBUS, HCLK_PDBUS_HZ);
 	rv1126_pdbus_set_clk(priv, PCLK_PDBUS, PCLK_PDBUS_HZ);

commit 0945879144ab9ee2faa95f16070bd123f26674dc
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Tue Mar 3 14:51:59 2020 +0800

    clk: rockchip: rv1126: Fix gpll_hz is zero when set gpll clk
    
    Change-Id: Iecd64e83d2a841b711c80528a245d2e9bda11265
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rv1126.c b/drivers/clk/rockchip/clk_rv1126.c
index e2bfcef5d3..f523ef531f 100644
--- a/drivers/clk/rockchip/clk_rv1126.c
+++ b/drivers/clk/rockchip/clk_rv1126.c
@@ -1651,6 +1651,7 @@ static int rv1126_gpll_set_clk(struct rv1126_clk_priv *priv, ulong rate)
 		return ret;
 	}
 	pmu_priv = dev_get_priv(pmucru_dev);
+	priv->gpll_hz = pmu_priv->gpll_hz;
 
 	if (rv1126_gpll_set_rate(priv, pmu_priv, rate)) {
 		printf("%s: failed to set gpll rate %lu\n", __func__, rate);

commit ffe82b3398a09630e083aec945c50721453554d5
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Tue Mar 3 14:30:21 2020 +0800

    clk: rockchip: rv1126: Remove unused local variable ret
    
    Change-Id: I2c4a056fd9fac2b50fd55a529133f7ea6f394437
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rv1126.c b/drivers/clk/rockchip/clk_rv1126.c
index 5a3bd08f6c..e2bfcef5d3 100644
--- a/drivers/clk/rockchip/clk_rv1126.c
+++ b/drivers/clk/rockchip/clk_rv1126.c
@@ -1613,7 +1613,6 @@ static ulong rv1126_gpll_set_rate(struct rv1126_clk_priv *priv,
 				  ulong rate)
 {
 	ulong emmc_rate, sfc_rate, nandc_rate;
-	int ret;
 
 	emmc_rate = rv1126_mmc_get_clk(priv, CLK_EMMC);
 	sfc_rate = rv1126_sfc_get_clk(priv);
@@ -1635,7 +1634,7 @@ static ulong rv1126_gpll_set_rate(struct rv1126_clk_priv *priv,
 	rv1126_sfc_set_clk(priv,  sfc_rate);
 	rv1126_nand_set_clk(priv, nandc_rate);
 
-	return ret;
+	return 0;
 }
 
 static int rv1126_gpll_set_clk(struct rv1126_clk_priv *priv, ulong rate)

commit 2428261f783694ae02432024058125b3faffc3f6
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Mar 2 17:23:01 2020 +0800

    rockchip: rv1126: set dram area unsecure in spl
    
    So that the usb & mmc & sfc controllers can read data to dram since
    they are unsecure.
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I1282d3b5ef22766880c28112bdc3b90feb43cd7c

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126.c b/arch/arm/mach-rockchip/rv1126/rv1126.c
index 8c5eea3ec9..71dc62281e 100644
--- a/arch/arm/mach-rockchip/rv1126/rv1126.c
+++ b/arch/arm/mach-rockchip/rv1126/rv1126.c
@@ -5,10 +5,31 @@
  */
 #include <common.h>
 #include <asm/io.h>
+#include <asm/arch/hardware.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#define FIREWALL_APB_BASE	0xffa60000
+#define FW_DDR_BASE		FIREWALL_APB_BASE
+#define FW_DDR_CON_REG		0x80
+#define DDR_RGN(x)		(0x20 + (x) * 4)
+
 void board_debug_uart_init(void)
 {
 
 }
+
+#if defined(CONFIG_SPL_BUILD)
+int arch_cpu_init(void)
+{
+	int i;
+
+	/* Close the firewall, so that some devices can access to DDR */
+	writel(0, FIREWALL_APB_BASE + FW_DDR_CON_REG);
+	for (i = 0; i < 9; i++) {
+		writel(0, FW_DDR_BASE + DDR_RGN(i));
+	}
+
+	return 0;
+}
+#endif

commit c5ef40e3706b5ca34e7f43dbebe697a4b4c866f1
Author: Hans Yang <yhx@rock-chips.com>
Date:   Mon Mar 2 17:28:29 2020 +0800

    configs: rk3036: enable CONFIG_RKNAND
    
    Signed-off-by: Hans Yang <yhx@rock-chips.com>
    Change-Id: Ic15e6113566ccf07ea9a0572f1c5326a2c784c84

diff --git a/configs/rk3036_defconfig b/configs/rk3036_defconfig
index b72797e310..28ea56a8c8 100644
--- a/configs/rk3036_defconfig
+++ b/configs/rk3036_defconfig
@@ -9,7 +9,6 @@ CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
 CONFIG_TPL_STACK=0x10081fff
 # CONFIG_SPL_ROCKCHIP_BACK_TO_BROM is not set
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
-CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_TARGET_EVB_RK3036=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
@@ -80,6 +79,7 @@ CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_DM_RESET=y
+CONFIG_RKNAND=y
 CONFIG_RKFLASH=y
 CONFIG_RKSFC_NOR=y
 # CONFIG_TPL_DM_SERIAL is not set
@@ -89,11 +89,11 @@ CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_DWC2_OTG=y
-CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
 CONFIG_USB_GADGET_VENDOR_NUM=0x2207
 CONFIG_USB_GADGET_PRODUCT_NUM=0x310a
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_CMD_DHRYSTONE=y
 CONFIG_ERRNO_STR=y

commit 09ad69fdebece85f7ee23bef9bb42f97b931546c
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Feb 28 17:59:35 2020 +0800

    rkflash: support new SPI Nor flash
    
    1.EN25QH64A, EN25QH32B, 25Q256JVEM, BH25Q128AS, BH25Q64BS
    
    Change-Id: I7154ab38ad03766f13621cefd899d842ce0835fc
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/sfc_nor.c b/drivers/rkflash/sfc_nor.c
index 2076471d15..8da0acee86 100644
--- a/drivers/rkflash/sfc_nor.c
+++ b/drivers/rkflash/sfc_nor.c
@@ -19,9 +19,9 @@ static struct flash_info spi_flash_tbl[] = {
 	/* GD25Q127C and GD25Q128C*/
 	{ 0xc84018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 9, 0 },
 	/* GD25Q256B/C/D */
-	{ 0xc84019, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x1C, 16, 6, 0 },
+	{ 0xc84019, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x3C, 16, 6, 0 },
 	/* GD25Q512MC */
-	{ 0xc84020, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x1C, 17, 6, 0 },
+	{ 0xc84020, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x3C, 17, 6, 0 },
 	/* 25Q64JVSSIQ */
 	{ 0xef4017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0 },
 	/* 25Q128FV and 25Q128JV*/
@@ -54,8 +54,12 @@ static struct flash_info spi_flash_tbl[] = {
 	{ 0x0b4017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 14, 9, 0 },
 	/* XT25F128BSSIGU */
 	{ 0x0b4018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 15, 9, 0 },
+	/* EN25QH64A */
+	{ 0x1c7017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 0, 0 },
 	/* EN25QH128A */
 	{ 0x1c7018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 0, 0 },
+	/* EN25QH32B */
+	{ 0x1c7016, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 13, 0, 0 },
 	/* EN25S32A */
 	{ 0x1c3816, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 13, 0, 0 },
 	/* EN25S64A */
@@ -70,6 +74,12 @@ static struct flash_info spi_flash_tbl[] = {
 	{ 0x5e4017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0 },
 	/* ZB25VQ128 */
 	{ 0x5e4018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 9, 0 },
+	/* 25Q256JVEM */
+	{ 0xef7019, 128, 8, 0x13, 0x12, 0x6C, 0x34, 0x21, 0xDC, 0x3C, 16, 9, 0 },
+	/* BH25Q128AS */
+	{ 0x684018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x04, 15, 9, 0 },
+	/* BH25Q64BS */
+	{ 0x684017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x04, 14, 9, 0 },
 };
 
 static int snor_write_en(void)
@@ -279,6 +289,8 @@ int snor_prog_page(struct SFNOR_DEV *p_dev,
 	union SFCCMD_DATA sfcmd;
 	union SFCCTRL_DATA sfctrl;
 
+	rkflash_print_dio("%s %x %x\n", __func__, addr, *(u32 *)(p_data));
+
 	sfcmd.d32 = 0;
 	sfcmd.b.cmd = p_dev->prog_cmd;
 	sfcmd.b.addrbits = SFC_ADDR_24BITS;
@@ -333,28 +345,18 @@ static int snor_enable_QE(struct SFNOR_DEV *p_dev)
 	int bit_offset;
 	u8 status;
 
-	if (p_dev->manufacturer == MID_GIGADEV ||
-	    p_dev->manufacturer == MID_WINBOND ||
-	    p_dev->manufacturer == MID_XTX ||
-	    p_dev->manufacturer == MID_MACRONIX ||
-	    p_dev->manufacturer == MID_PUYA ||
-	    p_dev->manufacturer == MID_XMC ||
-	    p_dev->manufacturer == MID_DOSILICON ||
-	    p_dev->manufacturer == MID_ZBIT) {
-		reg_index = p_dev->QE_bits >> 3;
-		bit_offset = p_dev->QE_bits & 0x7;
-		ret = snor_read_status(reg_index, &status);
-		if (ret != SFC_OK)
-			return ret;
+	reg_index = p_dev->QE_bits >> 3;
+	bit_offset = p_dev->QE_bits & 0x7;
+	ret = snor_read_status(reg_index, &status);
+	if (ret != SFC_OK)
+		return ret;
 
-		if (status & (1 << bit_offset))   /* is QE bit set */
-			return SFC_OK;
+	if (status & (1 << bit_offset))   /* is QE bit set */
+		return SFC_OK;
 
-		status |= (1 << bit_offset);
-		return p_dev->write_status(reg_index, status);
-	}
+	status |= (1 << bit_offset);
 
-	return ret;
+	return p_dev->write_status(reg_index, status);
 }
 
 int snor_disable_QE(struct SFNOR_DEV *p_dev)
@@ -364,28 +366,18 @@ int snor_disable_QE(struct SFNOR_DEV *p_dev)
 	int bit_offset;
 	u8 status;
 
-	if (p_dev->manufacturer == MID_GIGADEV ||
-	    p_dev->manufacturer == MID_WINBOND ||
-	    p_dev->manufacturer == MID_XTX ||
-	    p_dev->manufacturer == MID_MACRONIX ||
-	    p_dev->manufacturer == MID_PUYA ||
-	    p_dev->manufacturer == MID_XMC ||
-	    p_dev->manufacturer == MID_DOSILICON ||
-	    p_dev->manufacturer == MID_ZBIT) {
-		reg_index = p_dev->QE_bits >> 3;
-		bit_offset = p_dev->QE_bits & 0x7;
-		ret = snor_read_status(reg_index, &status);
-		if (ret != SFC_OK)
-			return ret;
+	reg_index = p_dev->QE_bits >> 3;
+	bit_offset = p_dev->QE_bits & 0x7;
+	ret = snor_read_status(reg_index, &status);
+	if (ret != SFC_OK)
+		return ret;
 
-		if (!(status & (1 << bit_offset)))
-			return SFC_OK;
+	if (!(status & (1 << bit_offset)))
+		return SFC_OK;
 
-		status &= ~(1 << bit_offset);
-		return p_dev->write_status(reg_index, status);
-	}
+	status &= ~(1 << bit_offset);
 
-	return ret;
+	return p_dev->write_status(reg_index, status);
 }
 
 int snor_read_data(struct SFNOR_DEV *p_dev,
@@ -423,6 +415,7 @@ int snor_read_data(struct SFNOR_DEV *p_dev,
 		sfcmd.b.addrbits = SFC_ADDR_32BITS;
 
 	ret = sfc_request(sfcmd.d32, sfctrl.d32, addr, p_data);
+	rkflash_print_dio("%s %x %x\n", __func__, addr, *(u32 *)(p_data));
 
 	return ret;
 }
@@ -467,7 +460,7 @@ int snor_write(struct SFNOR_DEV *p_dev, u32 sec, u32 n_sec, void *p_data)
 	u8 *p_buf =  (u8 *)p_data;
 	u32 total_sec = n_sec;
 
-	rkflash_print_dio("%s %x %x %x\n", __func__, sec, n_sec, ((u32 *)p_data)[0]);
+	rkflash_print_dio("%s %x %x\n", __func__, sec, n_sec);
 
 	if ((sec + n_sec) > p_dev->capacity)
 		return SFC_PARAM_ERR;
@@ -573,7 +566,7 @@ static void *snor_flash_info_adjust(struct flash_info *spi_flash_info)
 int snor_init(struct SFNOR_DEV *p_dev)
 {
 	struct flash_info *g_spi_flash_info;
-	u32 i;
+	u32 i, ret;
 	u8 id_byte[5];
 
 	if (!p_dev)
@@ -612,7 +605,10 @@ int snor_init(struct SFNOR_DEV *p_dev)
 		else if (i == 2)
 			p_dev->write_status = snor_write_status2;
 		if (g_spi_flash_info->feature & FEA_4BIT_READ) {
-			if (snor_enable_QE(p_dev) == SFC_OK) {
+			ret = SFC_OK;
+			if (g_spi_flash_info->QE_bits)
+				ret = snor_enable_QE(p_dev);
+			if (ret == SFC_OK) {
 				p_dev->read_lines = DATA_LINES_X4;
 				p_dev->read_cmd = g_spi_flash_info->read_cmd_4;
 			}

commit 7196e3306ae88ca5b155ecb36e408639d01fb003
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Mar 2 11:56:06 2020 +0800

    rockchip: rk3036: enable NANDC
    
    Change-Id: I9ad4dd1497656f41b42907892c17a2bd85eace0c
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/dts/rk3036-sdk-u-boot.dtsi b/arch/arm/dts/rk3036-sdk-u-boot.dtsi
index e666446f0e..d40a681020 100644
--- a/arch/arm/dts/rk3036-sdk-u-boot.dtsi
+++ b/arch/arm/dts/rk3036-sdk-u-boot.dtsi
@@ -10,6 +10,11 @@
 	u-boot,dm-pre-reloc;
 };
 
+&nandc {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 &sfc {
 	u-boot,dm-pre-reloc;
 	status = "okay";

commit eb45fc5ab70116287b2ceb57d8283ce3dd16d888
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Mar 2 11:55:36 2020 +0800

    rockchip: rk3036: add NANDC node
    
    Change-Id: I04c33d238fabeffcf470da71624009313050b904
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/dts/rk3036.dtsi b/arch/arm/dts/rk3036.dtsi
index c0f4b5de2c..e97ad32bbd 100644
--- a/arch/arm/dts/rk3036.dtsi
+++ b/arch/arm/dts/rk3036.dtsi
@@ -294,6 +294,16 @@
 		status = "disabled";
 	};
 
+	nandc: nandc@10500000 {
+		compatible = "rockchip,rk-nandc";
+		reg = <0x10500000 0x4000>;
+		interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
+		nandc_id = <0>;
+		clocks = <&cru SCLK_NANDC>, <&cru HCLK_NANDC>;
+		clock-names = "clk_nandc", "hclk_nandc";
+		status = "disabled";
+	};
+
 	pinctrl: pinctrl {
 		compatible = "rockchip,rk3036-pinctrl";
 		rockchip,grf = <&grf>;

commit 1a4f6af8bfd44c8ae6e87a81ff125eed47042cc5
Merge: 2da042fed2 2bb8d138c1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Mar 2 09:43:23 2020 +0800

    Merge branch 'next-dev' into thunder-boot

commit 2bb8d138c1bac0de340834b9b9f3c11d060d15e8
Author: Simon Xue <xxm@rock-chips.com>
Date:   Fri Dec 13 13:01:56 2019 +0800

    misc: decompress: add decompress driver
    
    Signed-off-by: Simon Xue <xxm@rock-chips.com>
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: I0bffe944c54a933fd8ea48d856e6ac5da06b3b16

diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index a3013e4ef1..ff20cab2b1 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -66,6 +66,20 @@ config ROCKCHIP_OTP
 	  This is a simple drive to dump specified values of Rockchip SoC
 	  from otp, such as cpu-leakage.
 
+config ROCKCHIP_HW_DECOMPRESS
+	bool "Rockchip HardWare Decompress Support"
+	depends on MISC && IRQ
+	help
+	  This driver support Decompress IP built-in Rockchip SoC, support
+	  LZ4, GZIP, PNG, ZLIB.
+
+config SPL_ROCKCHIP_HW_DECOMPRESS
+	bool "Rockchip HardWare Decompress Support"
+	depends on MISC
+	help
+	  This driver support Decompress IP built-in Rockchip SoC, support
+	  LZ4, GZIP, PNG, ZLIB.
+
 config SPL_ROCKCHIP_SECURE_OTP
 	bool "Rockchip Secure OTP Support in spl"
 	depends on SPL_MISC
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 0143dae2fc..67fd9a9541 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -54,3 +54,4 @@ obj-$(CONFIG_QFW) += qfw.o
 obj-$(CONFIG_ROCKCHIP_EFUSE) += rockchip-efuse.o
 obj-$(CONFIG_ROCKCHIP_OTP) += rockchip-otp.o
 obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_SECURE_OTP) += rockchip-secure-otp.o
+obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_HW_DECOMPRESS) += rockchip_decompress.o
diff --git a/drivers/misc/rockchip_decompress.c b/drivers/misc/rockchip_decompress.c
new file mode 100644
index 0000000000..109012abc5
--- /dev/null
+++ b/drivers/misc/rockchip_decompress.c
@@ -0,0 +1,240 @@
+// SPDX-License-Identifier:     GPL-2.0+
+/*
+ * Copyright (C) 2019 Rockchip Electronics Co., Ltd
+ */
+#include <common.h>
+#include <asm/io.h>
+#include <dm.h>
+#include <linux/bitops.h>
+#include <misc.h>
+#include <irq-generic.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define DECOM_CTRL		0x0
+#define DECOM_ENR		0x4
+#define DECOM_RADDR		0x8
+#define DECOM_WADDR		0xc
+#define DECOM_UDDSL		0x10
+#define DECOM_UDDSH		0x14
+#define DECOM_TXTHR		0x18
+#define DECOM_RXTHR		0x1c
+#define DECOM_SLEN		0x20
+#define DECOM_STAT		0x24
+#define DECOM_ISR		0x28
+#define DECOM_IEN		0x2c
+#define DECOM_AXI_STAT		0x30
+#define DECOM_TSIZEL		0x34
+#define DECOM_TSIZEH		0x38
+#define DECOM_MGNUM		0x3c
+#define DECOM_FRAME		0x40
+#define DECOM_DICTID		0x44
+#define DECOM_CSL		0x48
+#define DECOM_CSH		0x4c
+
+#define LZ4_HEAD_CSUM_CHECK_EN	BIT(1)
+#define LZ4_BLOCK_CSUM_CHECK_EN	BIT(2)
+#define LZ4_CONT_CSUM_CHECK_EN	BIT(3)
+
+#define DSOLIEN			BIT(19)
+#define ZDICTEIEN		BIT(18)
+#define GCMEIEN			BIT(17)
+#define GIDEIEN			BIT(16)
+#define CCCEIEN			BIT(15)
+#define BCCEIEN			BIT(14)
+#define HCCEIEN			BIT(13)
+#define CSEIEN			BIT(12)
+#define DICTEIEN		BIT(11)
+#define VNEIEN			BIT(10)
+#define WNEIEN			BIT(9)
+#define RDCEIEN			BIT(8)
+#define WRCEIEN			BIT(7)
+#define DISEIEN			BIT(6)
+#define LENEIEN			BIT(5)
+#define LITEIEN			BIT(4)
+#define SQMEIEN			BIT(3)
+#define SLCIEN			BIT(2)
+#define HDEIEN			BIT(1)
+#define DSIEN			BIT(0)
+
+#define DECOM_STOP		BIT(0)
+#define DECOM_COMPLETE		BIT(0)
+#define DECOM_GZIP_MODE		BIT(4)
+#define DECOM_ZLIB_MODE		BIT(5)
+#define DECOM_DEFLATE_MODE	BIT(0)
+
+#define DECOM_ENABLE		0x1
+#define DECOM_DISABLE		0x0
+
+#define DECOM_IRQ		0xffff /* fixme */
+
+#define DECOM_INT_MASK \
+	(DSOLIEN | ZDICTEIEN | GCMEIEN | GIDEIEN | \
+	CCCEIEN | BCCEIEN | HCCEIEN | CSEIEN | \
+	DICTEIEN | VNEIEN | WNEIEN | RDCEIEN | WRCEIEN | \
+	DISEIEN | LENEIEN | LITEIEN | SQMEIEN | SLCIEN | \
+	HDEIEN | DSIEN)
+
+enum decom_mod {
+	LZ4_MOD,
+	GZIP_MOD,
+	ZLIB_MOD,
+};
+
+struct rockchip_decom_param {
+	unsigned long addr_src;
+	unsigned long addr_dst;
+	unsigned long size;
+	enum decom_mod mode;
+};
+
+struct rockchip_decom_priv {
+	void __iomem *base;
+	bool done;
+};
+
+static int rockchip_decom_start(struct udevice *dev, void *buf)
+{
+	struct rockchip_decom_priv *priv = dev_get_priv(dev);
+	struct rockchip_decom_param *param = (struct rockchip_decom_param *)buf;
+
+	priv->done = false;
+
+	if (param->mode == LZ4_MOD)
+		writel(LZ4_CONT_CSUM_CHECK_EN |
+		       LZ4_HEAD_CSUM_CHECK_EN |
+		       LZ4_BLOCK_CSUM_CHECK_EN |
+		       LZ4_MOD, priv->base + DECOM_CTRL);
+
+	if (param->mode == GZIP_MOD)
+		writel(DECOM_DEFLATE_MODE | DECOM_GZIP_MODE,
+		       priv->base + DECOM_CTRL);
+
+	if (param->mode == ZLIB_MOD)
+		writel(DECOM_DEFLATE_MODE | DECOM_ZLIB_MODE,
+		       priv->base + DECOM_CTRL);
+
+	writel(param->addr_src, priv->base + DECOM_RADDR);
+	writel(param->addr_dst, priv->base + DECOM_WADDR);
+
+	writel(DECOM_INT_MASK, priv->base + DECOM_IEN);
+	writel(DECOM_ENABLE, priv->base + DECOM_ENR);
+
+	return 0;
+}
+
+static int rockchip_decom_stop(struct udevice *dev)
+{
+	struct rockchip_decom_priv *priv = dev_get_priv(dev);
+	int irq_status;
+
+	irq_status = readl(priv->base + DECOM_ISR);
+	/* clear interrupts */
+	if (irq_status)
+		writel(irq_status, priv->base + DECOM_ISR);
+
+	writel(DECOM_DISABLE, priv->base + DECOM_ENR);
+
+	return 0;
+}
+
+/* Caller must call this function to check if decompress done */
+static int rockchip_decom_done_poll(struct udevice *dev)
+{
+	struct rockchip_decom_priv *priv = dev_get_priv(dev);
+	int decom_status;
+
+	decom_status = readl(priv->base + DECOM_STAT);
+	if (decom_status & DECOM_COMPLETE)
+		return 0;
+
+	return -EINVAL;
+}
+
+/* Caller must fill in param @buf which represent struct rockchip_decom_param */
+static int rockchip_decom_ioctl(struct udevice *dev, unsigned long request,
+				void *buf)
+{
+	int ret = -EINVAL;
+
+	switch (request) {
+	case IOCTL_REQ_START:
+		ret = rockchip_decom_start(dev, buf);
+		break;
+	case IOCTL_REQ_POLL:
+		ret = rockchip_decom_done_poll(dev);
+		break;
+	case IOCTL_REQ_STOP:
+		ret = rockchip_decom_stop(dev);
+		break;
+	}
+
+	return ret;
+}
+
+static const struct misc_ops rockchip_decom_ops = {
+	.ioctl = rockchip_decom_ioctl,
+};
+
+static int rockchip_decom_ofdata_to_platdata(struct udevice *dev)
+{
+	struct rockchip_decom_priv *priv = dev_get_priv(dev);
+
+	priv->base = dev_read_addr_ptr(dev);
+	if (!priv->base)
+		return -ENOENT;
+
+	return 0;
+}
+
+#ifndef CONFIG_SPL_BUILD
+static void rockchip_decom_irqhandler(int irq, void *data)
+{
+	struct udevice *dev = data;
+	struct rockchip_decom_priv *priv = dev_get_priv(dev);
+	int irq_status;
+	int decom_status;
+
+	irq_status = readl(priv->base + DECOM_ISR);
+	/* clear interrupts */
+	writel(irq_status, priv->base + DECOM_ISR);
+	if (irq_status & DECOM_STOP) {
+		decom_status = readl(priv->base + DECOM_STAT);
+		if (decom_status & DECOM_COMPLETE) {
+			priv->done = true;
+			/*
+			 * TODO:
+			 * Inform someone that decompress completed
+			 */
+			printf("decom completed\n");
+		} else {
+			printf("decom failed, irq_status = 0x%x, decom_status = 0x%x\n",
+			       irq_status, decom_status);
+		}
+	}
+}
+#endif
+
+static int rockchip_decom_probe(struct udevice *dev)
+{
+#ifndef CONFIG_SPL_BUILD
+	irq_install_handler(DECOM_IRQ, rockchip_decom_irqhandler, dev);
+	irq_handler_enable(DECOM_IRQ);
+#endif
+	return 0;
+}
+
+static const struct udevice_id rockchip_decom_ids[] = {
+	{ .compatible = "rockchip,hw-decompress" },
+	{}
+};
+
+U_BOOT_DRIVER(rockchip_hw_decompress) = {
+	.name = "rockchip_hw_decompress",
+	.id = UCLASS_MISC,
+	.of_match = rockchip_decom_ids,
+	.probe = rockchip_decom_probe,
+	.ofdata_to_platdata = rockchip_decom_ofdata_to_platdata,
+	.priv_auto_alloc_size = sizeof(struct rockchip_decom_priv),
+	.ops = &rockchip_decom_ops,
+};

commit dbfe5ed512963ad172d4b79e7369f60f69877ff4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 25 10:51:18 2019 +0800

    dm: misc: add ioctl request command definition
    
    Available for caller to call misc_ioctl(...).
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Ibac22caf80968ecc7f952d04aa2a1a0f8ad3417a

diff --git a/include/misc.h b/include/misc.h
index 03ef55cdc8..3b25b95378 100644
--- a/include/misc.h
+++ b/include/misc.h
@@ -7,6 +7,15 @@
 #ifndef _MISC_H_
 #define _MISC_H_
 
+#include <asm-generic/ioctl.h>
+
+/*
+ * Request command to be sent for misc_ioctl().
+ */
+#define IOCTL_REQ_START		_IO('m', 0x01)
+#define IOCTL_REQ_STOP		_IO('m', 0x02)
+#define IOCTL_REQ_POLL		_IO('m', 0x03)
+
 /*
  * Read the device to buffer, optional.
  *

commit 2da042fed2edac584fda118729ec527ee54f3cc7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Mar 2 09:12:30 2020 +0800

    rockchip: rv1126: add board_debug_uart_init()
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I256cefd8588cc245bf3cd7d825de65344160b3c1

diff --git a/arch/arm/mach-rockchip/rv1126/rv1126.c b/arch/arm/mach-rockchip/rv1126/rv1126.c
index 0c2ace3595..8c5eea3ec9 100644
--- a/arch/arm/mach-rockchip/rv1126/rv1126.c
+++ b/arch/arm/mach-rockchip/rv1126/rv1126.c
@@ -8,3 +8,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+void board_debug_uart_init(void)
+{
+
+}

commit 7564b6b964db1231b3eec438c05d8c33c3ac5ea5
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Feb 24 15:05:03 2020 +0800

    mmc: dw_mmc: implement the function board_mmc_dm_reinit
    
    Change-Id: I18409bd6857d3bc8f4268a78593b23b3e19e744f
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index fdd49294e6..d2a4d2c741 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -37,6 +37,21 @@ struct rockchip_dwmmc_priv {
 	u32 minmax[2];
 };
 
+#ifdef CONFIG_USING_KERNEL_DTB
+int board_mmc_dm_reinit(struct udevice *dev)
+{
+	struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
+
+	if (!priv || !&priv->clk)
+		return 0;
+
+	if (!memcmp(dev->name, "dwmmc", strlen("dwmmc")))
+		return clk_get_by_index(dev, 0, &priv->clk);
+	else
+		return 0;
+}
+#endif
+
 #ifdef CONFIG_SPL_BUILD
 __weak void mmc_gpio_init_direct(void) {}
 #endif

commit e64dfb020f3c6c5832272563da6194c2e5614abf
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Feb 20 15:38:09 2020 +0800

    common: spl: rkfw: support resource file in spl
    
    Change-Id: I14d0afd6131cd523cd0218bb727b9a3b48397943
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/spl/spl_rkfw.c b/common/spl/spl_rkfw.c
index 833136440c..55c3529ea1 100644
--- a/common/spl/spl_rkfw.c
+++ b/common/spl/spl_rkfw.c
@@ -9,6 +9,7 @@
 #include <malloc.h>
 #include <spl_rkfw.h>
 #include <linux/kernel.h>
+#include <asm/arch/spl_resource_img.h>
 
 static const __aligned(16) struct s_fip_name_id fip_name_id[] = {
 	{ BL30_IMAGE_NAME, UUID_SCP_FIRMWARE_BL30 },		/* optional */
@@ -251,7 +252,7 @@ static int rkfw_load_kernel(struct spl_load_info *info, u32 image_sector,
 {
 	struct andr_img_hdr *hdr;
 	int ret, cnt;
-	int dtb_sector, ramdisk_sector;
+	int dtb_sector, ramdisk_sector, resource_sector;
 
 	cnt = ALIGN(sizeof(struct andr_img_hdr), 512) >> 9;
 	hdr = malloc(cnt * 512);
@@ -271,6 +272,8 @@ static int rkfw_load_kernel(struct spl_load_info *info, u32 image_sector,
 	}
 
 	ramdisk_sector = ALIGN(hdr->kernel_size, hdr->page_size);
+	resource_sector = ALIGN(hdr->kernel_size, hdr->page_size)
+			+ ALIGN(hdr->ramdisk_size, hdr->page_size);
 	dtb_sector = ALIGN(hdr->kernel_size, hdr->page_size)
 			+ ALIGN(hdr->ramdisk_size, hdr->page_size)
 			+ ALIGN(hdr->second_size, hdr->page_size);
@@ -295,14 +298,44 @@ static int rkfw_load_kernel(struct spl_load_info *info, u32 image_sector,
 		}
 	}
 
-	/* Load dtb image */
-	ret = info->read(info, (dtb_sector >> 9) + image_sector,
-			 ALIGN(hdr->dtb_size, hdr->page_size) >> 9,
-			 (void *)CONFIG_SPL_FDT_ADDR);
+	/* Load resource, and checkout the dtb */
+	if (hdr->second_size) {
+		struct resource_img_hdr *head =
+		   (struct resource_img_hdr *)(CONFIG_SPL_FDT_ADDR + 0x100000);
 
-	if (ret != (ALIGN(hdr->dtb_size, hdr->page_size) >> 9)) {
-		ret = -EIO;
-		goto out;
+		ret = info->read(info, (resource_sector >> 9) + image_sector,
+				 ALIGN(hdr->second_size, hdr->page_size) >> 9,
+				 (void *)head);
+		if (ret != (ALIGN(hdr->second_size, hdr->page_size) >> 9)) {
+			ret = -EIO;
+			goto out;
+		}
+
+		if (spl_resource_image_check_header(head)) {
+			printf("Can't find kernel dtb in spl.");
+		} else {
+			struct resource_entry *entry;
+			char *dtb_temp;
+
+			entry = spl_resource_image_get_dtb_entry(head);
+			if (!entry) {
+				ret = -EIO;
+				goto out;
+			}
+
+			dtb_temp = (char *)((char *)head + entry->f_offset * 512);
+			memcpy((char *)CONFIG_SPL_FDT_ADDR, dtb_temp,
+			       entry->f_size);
+		}
+	} else {
+		/* Load dtb image */
+		ret = info->read(info, (dtb_sector >> 9) + image_sector,
+				 ALIGN(hdr->dtb_size, hdr->page_size) >> 9,
+				 (void *)CONFIG_SPL_FDT_ADDR);
+		if (ret != (ALIGN(hdr->dtb_size, hdr->page_size) >> 9)) {
+			ret = -EIO;
+			goto out;
+		}
 	}
 
 	*bl33_entry = CONFIG_SPL_KERNEL_ADDR;

commit 57be1825cb6bf4b2652844a113333267f9d8a3da
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 15 14:39:53 2020 +0800

    rockchip: clean kernel dtb code to kernel_dtb.c
    
    Since there is a lot of code for kernel dtb feature, let's
    move them into a individual file to make board.c clean.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I4e01627c265807b1c0e26b432f0b4fc1db0d889e

diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 897818cf41..15f314add0 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -28,6 +28,7 @@ obj-y += iomem.o
 obj-y += memblk.o
 obj-y += hotkey.o
 
+obj-$(CONFIG_USING_KERNEL_DTB) += kernel_dtb.o
 obj-$(CONFIG_ROCKCHIP_SMCCC) += rockchip_smccc.o
 obj-$(CONFIG_ROCKCHIP_VENDOR_PARTITION) += vendor.o
 obj-$(CONFIG_ROCKCHIP_RESOURCE_IMAGE) += resource_img.o
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index aa33d4ffb4..a7bc733a1e 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -280,288 +280,6 @@ int board_late_init(void)
 	return rk_board_late_init();
 }
 
-#ifdef CONFIG_USING_KERNEL_DTB
-/* Here, only fixup cru phandle, pmucru is not included */
-static int phandles_fixup_cru(void *fdt)
-{
-	const char *props[] = { "clocks", "assigned-clocks" };
-	struct udevice *dev;
-	struct uclass *uc;
-	const char *comp;
-	u32 id, nclocks;
-	u32 *clocks;
-	int phandle, ncells;
-	int off, offset;
-	int ret, length;
-	int i, j;
-	int first_phandle = -1;
-
-	phandle = -ENODATA;
-	ncells = -ENODATA;
-
-	/* fdt points to kernel dtb, getting cru phandle and "#clock-cells" */
-	for (offset = fdt_next_node(fdt, 0, NULL);
-	     offset >= 0;
-	     offset = fdt_next_node(fdt, offset, NULL)) {
-		comp = fdt_getprop(fdt, offset, "compatible", NULL);
-		if (!comp)
-			continue;
-
-		/* Actually, this is not a good method to get cru node */
-		off = strlen(comp) - strlen("-cru");
-		if (off > 0 && !strncmp(comp + off, "-cru", 4)) {
-			phandle = fdt_get_phandle(fdt, offset);
-			ncells = fdtdec_get_int(fdt, offset,
-						"#clock-cells", -ENODATA);
-			break;
-		}
-	}
-
-	if (phandle == -ENODATA || ncells == -ENODATA)
-		return 0;
-
-	debug("%s: target cru: clock-cells:%d, phandle:0x%x\n",
-	      __func__, ncells, fdt32_to_cpu(phandle));
-
-	/* Try to fixup all cru phandle from U-Boot dtb nodes */
-	for (id = 0; id < UCLASS_COUNT; id++) {
-		ret = uclass_get(id, &uc);
-		if (ret)
-			continue;
-
-		if (list_empty(&uc->dev_head))
-			continue;
-
-		list_for_each_entry(dev, &uc->dev_head, uclass_node) {
-			/* Only U-Boot node go further */
-			if (!dev_read_bool(dev, "u-boot,dm-pre-reloc") &&
-			    !dev_read_bool(dev, "u-boot,dm-spl"))
-				continue;
-
-			for (i = 0; i < ARRAY_SIZE(props); i++) {
-				if (!dev_read_prop(dev, props[i], &length))
-					continue;
-
-				clocks = malloc(length);
-				if (!clocks)
-					return -ENOMEM;
-
-				/* Read "props[]" which contains cru phandle */
-				nclocks = length / sizeof(u32);
-				if (dev_read_u32_array(dev, props[i],
-						       clocks, nclocks)) {
-					free(clocks);
-					continue;
-				}
-
-				/* Fixup with kernel cru phandle */
-				for (j = 0; j < nclocks; j += (ncells + 1)) {
-					/*
-					 * Check: update pmucru phandle with cru
-					 * phandle by mistake.
-					 */
-					if (first_phandle == -1)
-						first_phandle = clocks[j];
-
-					if (clocks[j] != first_phandle) {
-						debug("WARN: %s: first cru phandle=%d, this=%d\n",
-						      dev_read_name(dev),
-						      first_phandle, clocks[j]);
-						continue;
-					}
-
-					clocks[j] = phandle;
-				}
-
-				/*
-				 * Override live dt nodes but not fdt nodes,
-				 * because all U-Boot nodes has been imported
-				 * to live dt nodes, should use "dev_xxx()".
-				 */
-				dev_write_u32_array(dev, props[i],
-						    clocks, nclocks);
-				free(clocks);
-			}
-		}
-	}
-
-	return 0;
-}
-
-static int phandles_fixup_gpio(void *fdt, void *ufdt)
-{
-	struct udevice *dev;
-	struct uclass *uc;
-	const char *prop = "gpios";
-	const char *comp;
-	char *gpio_name[10];
-	int gpio_off[10];
-	int pinctrl;
-	int offset;
-	int i = 0;
-	int n = 0;
-
-	pinctrl = fdt_path_offset(fdt, "/pinctrl");
-	if (pinctrl < 0)
-		return 0;
-
-	memset(gpio_name, 0, sizeof(gpio_name));
-	for (offset = fdt_first_subnode(fdt, pinctrl);
-	     offset >= 0;
-	     offset = fdt_next_subnode(fdt, offset)) {
-		/* assume the font nodes are gpio node */
-		if (++i >= ARRAY_SIZE(gpio_name))
-			break;
-
-		comp = fdt_getprop(fdt, offset, "compatible", NULL);
-		if (!comp)
-			continue;
-
-		if (!strcmp(comp, "rockchip,gpio-bank")) {
-			gpio_name[n] = (char *)fdt_get_name(fdt, offset, NULL);
-			gpio_off[n]  = offset;
-			n++;
-		}
-	}
-
-	if (!gpio_name[0])
-		return 0;
-
-	if (uclass_get(UCLASS_KEY, &uc) || list_empty(&uc->dev_head))
-		return 0;
-
-	list_for_each_entry(dev, &uc->dev_head, uclass_node) {
-		u32 new_phd, phd_old;
-		char *name;
-		ofnode ofn;
-
-		if (!dev_read_bool(dev, "u-boot,dm-pre-reloc") &&
-		    !dev_read_bool(dev, "u-boot,dm-spl"))
-			continue;
-
-		if (dev_read_u32_array(dev, prop, &phd_old, 1))
-			continue;
-
-		ofn = ofnode_get_by_phandle(phd_old);
-		if (!ofnode_valid(ofn))
-			continue;
-
-		name = (char *)ofnode_get_name(ofn);
-		if (!name)
-			continue;
-
-		for (i = 0; i < ARRAY_SIZE(gpio_name[i]); i++) {
-			if (gpio_name[i] && !strcmp(name, gpio_name[i])) {
-				new_phd = fdt_get_phandle(fdt, gpio_off[i]);
-				dev_write_u32_array(dev, prop, &new_phd, 1);
-				break;
-			}
-		}
-	}
-
-	return 0;
-}
-
-__weak int board_mmc_dm_reinit(struct udevice *dev)
-{
-	return 0;
-}
-
-static int mmc_dm_reinit(void)
-{
-	struct udevice *dev;
-	struct uclass *uc;
-	int ret;
-
-	if (uclass_get(UCLASS_MMC, &uc) || list_empty(&uc->dev_head))
-		return 0;
-
-	list_for_each_entry(dev, &uc->dev_head, uclass_node) {
-		ret = board_mmc_dm_reinit(dev);
-		if (ret)
-			return ret;
-	}
-
-	return 0;
-}
-
-static void env_fixup_fdt_addr(void)
-{
-#ifdef ENV_MEM_LAYOUT_SETTINGS1
-	char *addr_r;
-
-	if (gd->ram_size <= SZ_128M) {
-		addr_r = env_get("fdt_addr1_r");
-		if (addr_r)
-			env_set("fdt_addr_r", addr_r);
-	}
-#endif
-}
-
-int init_kernel_dtb(void)
-{
-	ulong fdt_addr;
-	void *ufdt_blob;
-	int ret;
-
-	env_fixup_fdt_addr();
-
-	fdt_addr = env_get_ulong("fdt_addr_r", 16, 0);
-	if (!fdt_addr) {
-		printf("No Found FDT Load Address.\n");
-		return -1;
-	}
-
-	ret = rockchip_read_dtb_file((void *)fdt_addr);
-	if (ret < 0) {
-		if (!fdt_check_header(gd->fdt_blob_kern)) {
-			fdt_addr = (ulong)memalign(ARCH_DMA_MINALIGN,
-					fdt_totalsize(gd->fdt_blob_kern));
-			if (!fdt_addr)
-				return -ENOMEM;
-
-			memcpy((void *)fdt_addr, gd->fdt_blob_kern,
-			       fdt_totalsize(gd->fdt_blob_kern));
-			printf("DTB: embedded kern.dtb\n");
-		} else {
-			printf("Failed to get kernel dtb, ret=%d\n", ret);
-			return ret;
-		}
-	}
-
-	ufdt_blob = (void *)gd->fdt_blob;
-	gd->fdt_blob = (void *)fdt_addr;
-
-	hotkey_run(HK_FDT);
-
-	/*
-	 * There is a phandle miss match between U-Boot and kernel dtb node,
-	 * we fixup it in U-Boot live dt nodes.
-	 *
-	 * CRU:	 all nodes.
-	 * GPIO: key nodes.
-	 */
-	phandles_fixup_cru((void *)gd->fdt_blob);
-	phandles_fixup_gpio((void *)gd->fdt_blob, (void *)ufdt_blob);
-
-	of_live_build((void *)gd->fdt_blob, (struct device_node **)&gd->of_root);
-	dm_scan_fdt((void *)gd->fdt_blob, false);
-
-	/*
-	 * There maybe something for the mmc devices to do after kernel dtb
-	 * dm setup, eg: regain the clock device binding from kernel dtb.
-	 */
-	mmc_dm_reinit();
-
-	/* Reserve 'reserved-memory' */
-	ret = boot_fdt_add_sysmem_rsv_regions((void *)gd->fdt_blob);
-	if (ret)
-		return ret;
-
-	return 0;
-}
-#endif
-
 static void early_download(void)
 {
 #if defined(CONFIG_PWRKEY_DNL_TRIGGER_NUM) && \
diff --git a/arch/arm/mach-rockchip/kernel_dtb.c b/arch/arm/mach-rockchip/kernel_dtb.c
new file mode 100644
index 0000000000..445b7ee43c
--- /dev/null
+++ b/arch/arm/mach-rockchip/kernel_dtb.c
@@ -0,0 +1,279 @@
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#include <common.h>
+#include <boot_rkimg.h>
+#include <dm.h>
+#include <malloc.h>
+#include <of_live.h>
+#include <dm/root.h>
+#include <asm/arch/hotkey.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* Here, only fixup cru phandle, pmucru is not included */
+static int phandles_fixup_cru(const void *fdt)
+{
+	const char *props[] = { "clocks", "assigned-clocks" };
+	struct udevice *dev;
+	struct uclass *uc;
+	const char *comp;
+	u32 id, nclocks;
+	u32 *clocks;
+	int phandle, ncells;
+	int off, offset;
+	int ret, length;
+	int i, j;
+	int first_phandle = -1;
+
+	phandle = -ENODATA;
+	ncells = -ENODATA;
+
+	/* fdt points to kernel dtb, getting cru phandle and "#clock-cells" */
+	for (offset = fdt_next_node(fdt, 0, NULL);
+	     offset >= 0;
+	     offset = fdt_next_node(fdt, offset, NULL)) {
+		comp = fdt_getprop(fdt, offset, "compatible", NULL);
+		if (!comp)
+			continue;
+
+		/* Actually, this is not a good method to get cru node */
+		off = strlen(comp) - strlen("-cru");
+		if (off > 0 && !strncmp(comp + off, "-cru", 4)) {
+			phandle = fdt_get_phandle(fdt, offset);
+			ncells = fdtdec_get_int(fdt, offset,
+						"#clock-cells", -ENODATA);
+			break;
+		}
+	}
+
+	if (phandle == -ENODATA || ncells == -ENODATA)
+		return 0;
+
+	debug("%s: target cru: clock-cells:%d, phandle:0x%x\n",
+	      __func__, ncells, fdt32_to_cpu(phandle));
+
+	/* Try to fixup all cru phandle from U-Boot dtb nodes */
+	for (id = 0; id < UCLASS_COUNT; id++) {
+		ret = uclass_get(id, &uc);
+		if (ret)
+			continue;
+
+		if (list_empty(&uc->dev_head))
+			continue;
+
+		list_for_each_entry(dev, &uc->dev_head, uclass_node) {
+			/* Only U-Boot node go further */
+			if (!dev_read_bool(dev, "u-boot,dm-pre-reloc") &&
+			    !dev_read_bool(dev, "u-boot,dm-spl"))
+				continue;
+
+			for (i = 0; i < ARRAY_SIZE(props); i++) {
+				if (!dev_read_prop(dev, props[i], &length))
+					continue;
+
+				clocks = malloc(length);
+				if (!clocks)
+					return -ENOMEM;
+
+				/* Read "props[]" which contains cru phandle */
+				nclocks = length / sizeof(u32);
+				if (dev_read_u32_array(dev, props[i],
+						       clocks, nclocks)) {
+					free(clocks);
+					continue;
+				}
+
+				/* Fixup with kernel cru phandle */
+				for (j = 0; j < nclocks; j += (ncells + 1)) {
+					/*
+					 * Check: update pmucru phandle with cru
+					 * phandle by mistake.
+					 */
+					if (first_phandle == -1)
+						first_phandle = clocks[j];
+
+					if (clocks[j] != first_phandle) {
+						debug("WARN: %s: first cru phandle=%d, this=%d\n",
+						      dev_read_name(dev),
+						      first_phandle, clocks[j]);
+						continue;
+					}
+
+					clocks[j] = phandle;
+				}
+
+				/*
+				 * Override live dt nodes but not fdt nodes,
+				 * because all U-Boot nodes has been imported
+				 * to live dt nodes, should use "dev_xxx()".
+				 */
+				dev_write_u32_array(dev, props[i],
+						    clocks, nclocks);
+				free(clocks);
+			}
+		}
+	}
+
+	return 0;
+}
+
+static int phandles_fixup_gpio(const void *fdt, void *ufdt)
+{
+	struct udevice *dev;
+	struct uclass *uc;
+	const char *prop = "gpios";
+	const char *comp;
+	char *gpio_name[10];
+	int gpio_off[10];
+	int pinctrl;
+	int offset;
+	int i = 0;
+	int n = 0;
+
+	pinctrl = fdt_path_offset(fdt, "/pinctrl");
+	if (pinctrl < 0)
+		return 0;
+
+	memset(gpio_name, 0, sizeof(gpio_name));
+	for (offset = fdt_first_subnode(fdt, pinctrl);
+	     offset >= 0;
+	     offset = fdt_next_subnode(fdt, offset)) {
+		/* assume the font nodes are gpio node */
+		if (++i >= ARRAY_SIZE(gpio_name))
+			break;
+
+		comp = fdt_getprop(fdt, offset, "compatible", NULL);
+		if (!comp)
+			continue;
+
+		if (!strcmp(comp, "rockchip,gpio-bank")) {
+			gpio_name[n] = (char *)fdt_get_name(fdt, offset, NULL);
+			gpio_off[n]  = offset;
+			n++;
+		}
+	}
+
+	if (!gpio_name[0])
+		return 0;
+
+	if (uclass_get(UCLASS_KEY, &uc) || list_empty(&uc->dev_head))
+		return 0;
+
+	list_for_each_entry(dev, &uc->dev_head, uclass_node) {
+		u32 new_phd, phd_old;
+		char *name;
+		ofnode ofn;
+
+		if (!dev_read_bool(dev, "u-boot,dm-pre-reloc") &&
+		    !dev_read_bool(dev, "u-boot,dm-spl"))
+			continue;
+
+		if (dev_read_u32_array(dev, prop, &phd_old, 1))
+			continue;
+
+		ofn = ofnode_get_by_phandle(phd_old);
+		if (!ofnode_valid(ofn))
+			continue;
+
+		name = (char *)ofnode_get_name(ofn);
+		if (!name)
+			continue;
+
+		for (i = 0; i < ARRAY_SIZE(gpio_name[i]); i++) {
+			if (gpio_name[i] && !strcmp(name, gpio_name[i])) {
+				new_phd = fdt_get_phandle(fdt, gpio_off[i]);
+				dev_write_u32_array(dev, prop, &new_phd, 1);
+				break;
+			}
+		}
+	}
+
+	return 0;
+}
+
+__weak int board_mmc_dm_reinit(struct udevice *dev)
+{
+	return 0;
+}
+
+static int mmc_dm_reinit(void)
+{
+	struct udevice *dev;
+	struct uclass *uc;
+	int ret;
+
+	if (uclass_get(UCLASS_MMC, &uc) || list_empty(&uc->dev_head))
+		return 0;
+
+	list_for_each_entry(dev, &uc->dev_head, uclass_node) {
+		ret = board_mmc_dm_reinit(dev);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+int init_kernel_dtb(void)
+{
+	ulong fdt_addr;
+	void *ufdt_blob;
+	int ret;
+
+	fdt_addr = env_get_ulong("fdt_addr_r", 16, 0);
+	if (!fdt_addr) {
+		printf("No Found FDT Load Address.\n");
+		return -1;
+	}
+
+	ret = rockchip_read_dtb_file((void *)fdt_addr);
+	if (ret < 0) {
+		if (!fdt_check_header(gd->fdt_blob_kern)) {
+			fdt_addr = (ulong)memalign(ARCH_DMA_MINALIGN,
+					fdt_totalsize(gd->fdt_blob_kern));
+			if (!fdt_addr)
+				return -ENOMEM;
+
+			memcpy((void *)fdt_addr, gd->fdt_blob_kern,
+			       fdt_totalsize(gd->fdt_blob_kern));
+			printf("DTB: embedded kern.dtb\n");
+		} else {
+			printf("Failed to get kernel dtb, ret=%d\n", ret);
+			return ret;
+		}
+	}
+
+	ufdt_blob = (void *)gd->fdt_blob;
+	gd->fdt_blob = (void *)fdt_addr;
+
+	hotkey_run(HK_FDT);
+
+	/*
+	 * There is a phandle miss match between U-Boot and kernel dtb node,
+	 * we fixup it in U-Boot live dt nodes.
+	 *
+	 * CRU:	 all nodes.
+	 * GPIO: key nodes.
+	 */
+	phandles_fixup_cru((void *)gd->fdt_blob);
+	phandles_fixup_gpio((void *)gd->fdt_blob, (void *)ufdt_blob);
+
+	of_live_build((void *)gd->fdt_blob, (struct device_node **)&gd->of_root);
+	dm_scan_fdt((void *)gd->fdt_blob, false);
+
+	/*
+	 * There maybe something for the mmc devices to do after kernel dtb
+	 * dm setup, eg: regain the clock device binding from kernel dtb.
+	 */
+	mmc_dm_reinit();
+
+	/* Reserve 'reserved-memory' */
+	ret = boot_fdt_add_sysmem_rsv_regions((void *)gd->fdt_blob);
+	if (ret)
+		return ret;
+
+	return 0;
+}
diff --git a/include/boot_rkimg.h b/include/boot_rkimg.h
index 62040e75a4..db826e7357 100644
--- a/include/boot_rkimg.h
+++ b/include/boot_rkimg.h
@@ -62,5 +62,6 @@ void board_run_recovery_wipe_data(void);
 void setup_download_mode(void);
 int rockchip_get_boot_mode(void);
 int rockchip_read_dtb_file(void *fdt_addr);
+int init_kernel_dtb(void);
 
 #endif

commit bc4ccd53961bed2da082b87773fb2a22f2552909
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 14 09:15:21 2020 +0800

    rockchip: clean rockchip_read_dtb_file() api to boot_rkimg.c
    
    rockchip_read_dtb_file() is top level api which reads dtb from
    resource/fit/uImage/distro image, etc.
    
    only leave code about resource image in resource_img.c.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I2157ffc204ebd564aa9171de2b8167fbd6c94bcf

diff --git a/arch/arm/include/asm/arch-rockchip/resource_img.h b/arch/arm/include/asm/arch-rockchip/resource_img.h
index 9b0aabc2f2..5b89d323e0 100644
--- a/arch/arm/include/asm/arch-rockchip/resource_img.h
+++ b/arch/arm/include/asm/arch-rockchip/resource_img.h
@@ -20,11 +20,11 @@
 int rockchip_read_resource_file(void *buf, const char *name, int offset, int len);
 
 /*
- * rockchip_get_resource_file_size() - read file size
+ * rockchip_read_resource_dtb() - read dtb file
  *
  * @fdt_addr: destination buf to store dtb file
- *
- * @return 0 on success, othwise on error
+ * @hash: hash value buffer
+ * @hash_size: hash value length
  */
-int rockchip_read_dtb_file(void *fdt_addr);
+int rockchip_read_resource_dtb(void *fdt_addr, char **hash, int *hash_size);
 #endif
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 870d48bb9b..2bbe7db58a 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -586,7 +586,7 @@ config ROCKCHIP_USB_BOOT
 
 config ROCKCHIP_EARLY_DISTRO_DTB
 	bool "Enable support for distro dtb early"
-	depends on DISTRO_DEFAULTS && USING_KERNEL_DTB
+	depends on DISTRO_DEFAULTS && USING_KERNEL_DTB && CMD_FS_GENERIC
 	default n
 	help
 	  This enables loading dtb from distro bootable partition when there
diff --git a/arch/arm/mach-rockchip/boot_rkimg.c b/arch/arm/mach-rockchip/boot_rkimg.c
index ff421db823..60f104f0cf 100644
--- a/arch/arm/mach-rockchip/boot_rkimg.c
+++ b/arch/arm/mach-rockchip/boot_rkimg.c
@@ -6,11 +6,15 @@
 
 #include <common.h>
 #include <adc.h>
+#include <android_bootloader.h>
+#include <android_image.h>
 #include <bidram.h>
 #include <bootm.h>
 #include <boot_rkimg.h>
 #include <cli.h>
+#include <crypto.h>
 #include <dm.h>
+#include <fs.h>
 #include <image.h>
 #include <key.h>
 #include <mmc.h>
@@ -22,6 +26,10 @@
 #include <asm/arch/hotkey.h>
 #include <asm/arch/param.h>
 #include <asm/arch/resource_img.h>
+#include <dm/ofnode.h>
+#include <linux/list.h>
+#include <u-boot/sha1.h>
+#include <u-boot/sha256.h>
 #include <linux/usb/phy-rockchip-inno-usb2.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -319,3 +327,175 @@ out:
 	env_set("reboot_mode", "recovery");
 	run_command("run bootcmd", 0);
 }
+
+#ifdef CONFIG_ROCKCHIP_DTB_VERIFY
+#ifdef CONFIG_DM_CRYPTO
+static int crypto_csum(u32 cap, char *input, u32 input_len, u8 *output)
+{
+	sha_context csha_ctx;
+	struct udevice *dev;
+
+	dev = crypto_get_device(cap);
+	if (!dev) {
+		printf("Can't find expected crypto device\n");
+		return -ENODEV;
+	}
+
+	csha_ctx.algo = cap;
+	csha_ctx.length = input_len;
+	crypto_sha_csum(dev, &csha_ctx, (char *)input,
+			input_len, output);
+
+	return 0;
+}
+
+static int fdt_check_hash(void *fdt_addr, u32 fdt_size,
+			  char *hash_cmp, u32 hash_size)
+{
+	uchar hash[32];
+
+	if (!hash_size)
+		return 0;
+
+	if (hash_size == 20)
+		crypto_csum(CRYPTO_SHA1, fdt_addr, fdt_size, hash);
+	else if (hash_size == 32)
+		crypto_csum(CRYPTO_SHA256, fdt_addr, fdt_size, hash);
+	else
+		return -EINVAL;
+
+	printf("HASH(c): ");
+	if (memcmp(hash, hash_cmp, hash_size)) {
+		printf("error\n");
+		return -EBADF;
+	}
+
+	printf("OK\n");
+
+	return 0;
+}
+
+#else
+static int fdt_check_hash(void *fdt_addr, u32 fdt_size,
+			  char *hash_cmp, u32 hash_size)
+{
+	uchar hash[32];
+
+	if (!hash_size)
+		return 0;
+
+	if (hash_size == 20)
+		sha1_csum((const uchar *)fdt_addr, fdt_size, hash);
+	else if (hash_size == 32)
+		sha256_csum((const uchar *)fdt_addr, fdt_size, hash);
+	else
+		return -EINVAL;
+
+	printf("HASH(s): ");
+	if (memcmp(hash, hash_cmp, hash_size)) {
+		printf("error\n");
+		return -EBADF;
+	}
+
+	printf("OK\n");
+
+	return 0;
+}
+#endif
+#endif	/* CONFIG_ROCKCHIP_DTB_VERIFY */
+
+#if defined(CONFIG_ROCKCHIP_EARLY_DISTRO_DTB)
+static int rockchip_read_distro_dtb(void *fdt_addr)
+{
+	const char *cmd = "part list ${devtype} ${devnum} -bootable devplist";
+	char *devnum, *devtype, *devplist;
+	char devnum_part[12];
+	char fdt_hex_str[19];
+	char *fs_argv[5];
+	int size;
+	int ret;
+
+	if (!rockchip_get_bootdev() || !fdt_addr)
+		return -ENODEV;
+
+	if (run_command_list(cmd, -1, 0)) {
+		printf("Failed to find -bootable\n");
+		return -EINVAL;
+	}
+
+	devplist = env_get("devplist");
+	if (!devplist)
+		return -ENODEV;
+
+	devtype = env_get("devtype");
+	devnum = env_get("devnum");
+	sprintf(devnum_part, "%s:%s", devnum, devplist);
+	sprintf(fdt_hex_str, "0x%lx", (ulong)fdt_addr);
+
+	fs_argv[0] = "load";
+	fs_argv[1] = devtype,
+	fs_argv[2] = devnum_part;
+	fs_argv[3] = fdt_hex_str;
+	fs_argv[4] = CONFIG_ROCKCHIP_EARLY_DISTRO_DTB_PATH;
+
+	if (do_load(NULL, 0, 5, fs_argv, FS_TYPE_ANY))
+		return -EIO;
+
+	if (fdt_check_header(fdt_addr))
+		return -EBADF;
+
+	printf("DTB(Distro): %s\n", CONFIG_ROCKCHIP_EARLY_DISTRO_DTB_PATH);
+
+	return 0;
+}
+#endif
+
+int rockchip_read_dtb_file(void *fdt_addr)
+{
+	int hash_size;
+	char *hash;
+	u32 size;
+	int ret = -1;
+
+#ifdef CONFIG_ROCKCHIP_EARLY_DISTRO_DTB
+	if (ret) {
+		hash_size = 0;
+		ret = rockchip_read_distro_dtb(fdt_addr);
+	}
+#endif
+#ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
+	if (ret) {
+		hash_size = 0;
+		ret = rockchip_read_resource_dtb(fdt_addr, &hash, &hash_size);
+	}
+#endif
+
+	if (ret) {
+		printf("Failed to load DTB\n");
+		return ret;
+	}
+
+	if (fdt_check_header(fdt_addr)) {
+		printf("Get a bad DTB file !\n");
+		return -EBADF;
+	}
+
+	size = fdt_totalsize(fdt_addr);
+
+#ifdef CONFIG_ROCKCHIP_DTB_VERIFY
+	if (hash_size && fdt_check_hash(fdt_addr, size, hash, hash_size)) {
+		printf("Get a bad hash of DTB !\n");
+		return -EBADF;
+	}
+#endif
+	if (!sysmem_alloc_base(MEM_FDT, (phys_addr_t)fdt_addr,
+			       ALIGN(size, RK_BLK_SIZE) +
+			       CONFIG_SYS_FDT_PAD))
+		return -ENOMEM;
+
+#if defined(CONFIG_ANDROID_BOOT_IMAGE) && defined(CONFIG_OF_LIBFDT_OVERLAY)
+	android_fdt_overlay_apply((void *)fdt_addr);
+#endif
+
+	return 0;
+}
diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index a5da7d9eaf..889bd05a63 100644
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -842,174 +842,29 @@ static struct resource_file *rockchip_read_hwid_dtb(void)
 }
 #endif
 
-#ifdef CONFIG_ROCKCHIP_EARLY_DISTRO_DTB
-static int rockchip_read_distro_dtb(void *fdt_addr)
-{
-	const char *cmd = "part list ${devtype} ${devnum} -bootable devplist";
-	char *devnum, *devtype, *devplist;
-	char devnum_part[12];
-	char fdt_hex_str[19];
-	char *fs_argv[5];
-	int size;
-	int ret;
-
-	if (!rockchip_get_bootdev() || !fdt_addr)
-		return -ENODEV;
-
-	ret = run_command_list(cmd, -1, 0);
-	if (ret)
-		return ret;
-
-	devplist = env_get("devplist");
-	if (!devplist)
-		return -ENODEV;
-
-	devtype = env_get("devtype");
-	devnum = env_get("devnum");
-	sprintf(devnum_part, "%s:%s", devnum, devplist);
-	sprintf(fdt_hex_str, "0x%lx", (ulong)fdt_addr);
-
-#ifdef CONFIG_CMD_FS_GENERIC
-	fs_argv[0] = "load";
-	fs_argv[1] = devtype,
-	fs_argv[2] = devnum_part;
-	fs_argv[3] = fdt_hex_str;
-	fs_argv[4] = CONFIG_ROCKCHIP_EARLY_DISTRO_DTB_PATH;
-
-	if (do_load(NULL, 0, 5, fs_argv, FS_TYPE_ANY))
-		return -EIO;
-#endif
-	if (fdt_check_header(fdt_addr))
-		return -EIO;
-
-	size = fdt_totalsize(fdt_addr);
-	if (!sysmem_alloc_base(MEM_FDT, (phys_addr_t)fdt_addr,
-			       ALIGN(size, RK_BLK_SIZE) + CONFIG_SYS_FDT_PAD))
-		return -ENOMEM;
-
-	printf("Distro DTB: %s\n", CONFIG_ROCKCHIP_EARLY_DISTRO_DTB_PATH);
-
-	return size;
-}
-#endif
-
-#ifdef CONFIG_ROCKCHIP_DTB_VERIFY
-#ifdef CONFIG_DM_CRYPTO
-static int crypto_csum(u32 cap, char *input, u32 input_len, u8 *output)
-{
-	sha_context csha_ctx;
-	struct udevice *dev;
-
-	dev = crypto_get_device(cap);
-	if (!dev) {
-		printf("Can't find expected crypto device\n");
-		return -ENODEV;
-	}
-
-	csha_ctx.algo = cap;
-	csha_ctx.length = input_len;
-	crypto_sha_csum(dev, &csha_ctx, (char *)input,
-			input_len, output);
-
-	return 0;
-}
-
-static int fdt_check_hash(void *fdt_addr, struct resource_file *file)
-{
-	uchar hash[32];
-
-	if (!file->hash_size)
-		return 0;
-
-	if (file->hash_size == 20)
-		crypto_csum(CRYPTO_SHA1, fdt_addr, file->f_size, hash);
-	else if (file->hash_size == 32)
-		crypto_csum(CRYPTO_SHA256, fdt_addr, file->f_size, hash);
-	else
-		return -EINVAL;
-
-	if (memcmp(hash, file->hash, file->hash_size))
-		return -EBADF;
-
-	printf("HASH: OK(c)\n");
-
-	return 0;
-}
-
-#else
-static int fdt_check_hash(void *fdt_addr, struct resource_file *file)
-{
-	uchar hash[32];
-
-	if (!file->hash_size)
-		return 0;
-
-	if (file->hash_size == 20)
-		sha1_csum((const uchar *)fdt_addr, file->f_size, hash);
-	else if (file->hash_size == 32)
-		sha256_csum((const uchar *)fdt_addr, file->f_size, hash);
-	else
-		return -EINVAL;
-
-	if (memcmp(hash, file->hash, file->hash_size))
-		return -EBADF;
-
-	printf("HASH: OK(s)\n");
-
-	return 0;
-}
-#endif
-#endif	/* CONFIG_ROCKCHIP_DTB_VERIFY */
-
-int rockchip_read_dtb_file(void *fdt_addr)
+int rockchip_read_resource_dtb(void *fdt_addr, char **hash, int *hash_size)
 {
 	struct resource_file *file;
-	char *def_dtb = DTB_FILE;
 	int ret;
 
-	/* search order: "rk-kernel.dtb" -> distro -> hwid */
-	file = get_file_info(NULL, def_dtb);
-	if (!file) {
-#ifdef CONFIG_ROCKCHIP_EARLY_DISTRO_DTB
-		ret = rockchip_read_distro_dtb(fdt_addr);
-		if (ret > 0)
-			return ret; /* found & load done */
-#endif
+	file = get_file_info(NULL, DTB_FILE);
 #ifdef CONFIG_ROCKCHIP_HWID_DTB
+	if (!file)
 		file = rockchip_read_hwid_dtb();
 #endif
-		if (!file)
-			return -ENODEV;
-	}
+	if (!file)
+		return -ENODEV;
 
-	/* found! */
-	printf("DTB: %s\n", file->name);
 	ret = rockchip_read_resource_file(fdt_addr, file->name, 0, 0);
 	if (ret < 0)
 		return ret;
 
-	if (fdt_check_header(fdt_addr)) {
-		printf("Get a bad DTB file !\n");
-		return -EBADF;
-	}
-
-	/* Note: We only load the DTB from resource.img to verify */
-#ifdef CONFIG_ROCKCHIP_DTB_VERIFY
-	if (fdt_check_hash(fdt_addr, file)) {
-		printf("Get a bad hash of DTB !\n");
+	if (fdt_check_header(fdt_addr))
 		return -EBADF;
-	}
-#endif
 
-	if (!sysmem_alloc_base(MEM_FDT, (phys_addr_t)fdt_addr,
-			       ALIGN(file->f_size, RK_BLK_SIZE) +
-			       CONFIG_SYS_FDT_PAD))
-		return -ENOMEM;
-
-	/* Apply DTBO */
-#if defined(CONFIG_CMD_DTIMG) && defined(CONFIG_OF_LIBFDT_OVERLAY)
-	android_fdt_overlay_apply((void *)fdt_addr);
-#endif
+	*hash = file->hash;
+	*hash_size = file->hash_size;
+	printf("DTB: %s\n", file->name);
 
-	return file->f_size;
+	return 0;
 }
diff --git a/include/boot_rkimg.h b/include/boot_rkimg.h
index 9082e55ff8..62040e75a4 100644
--- a/include/boot_rkimg.h
+++ b/include/boot_rkimg.h
@@ -61,5 +61,6 @@ void rockchip_set_bootdev(struct blk_desc *desc);
 void board_run_recovery_wipe_data(void);
 void setup_download_mode(void);
 int rockchip_get_boot_mode(void);
+int rockchip_read_dtb_file(void *fdt_addr);
 
 #endif

commit d3a605e34dd32839bc4331cac20988972c9115a4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Feb 14 11:01:58 2020 +0800

    common: image: support reloc image at the given address
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ia15f4dfa96602554f5c293dbf383f84a83a05950

diff --git a/common/image-fdt.c b/common/image-fdt.c
index 7f741af796..536715ccbd 100644
--- a/common/image-fdt.c
+++ b/common/image-fdt.c
@@ -246,6 +246,10 @@ int boot_relocate_fdt(struct lmb *lmb, char **of_flat_tree, ulong *of_size)
 			lmb_reserve(lmb, (ulong)of_start, of_len);
 			disable_relocation = 1;
 		} else if (desired_addr) {
+
+			if (desired_addr && env_get_yesno("bootm-reloc-at"))
+				desired_addr += of_len;
+
 			of_start =
 			    (void *)(ulong) lmb_alloc_base(lmb, of_len, 0x1000,
 							   (ulong)desired_addr);
diff --git a/common/image.c b/common/image.c
index f0a5c80b25..985127f8ea 100644
--- a/common/image.c
+++ b/common/image.c
@@ -1162,6 +1162,9 @@ int boot_ramdisk_high(struct lmb *lmb, ulong rd_data, ulong rd_len,
 			*initrd_end = rd_data + rd_len;
 			lmb_reserve(lmb, rd_data, rd_len);
 		} else {
+			if (initrd_high && env_get_yesno("bootm-reloc-at"))
+				initrd_high += rd_len;
+
 			if (initrd_high)
 				*initrd_start = (ulong)lmb_alloc_base(lmb,
 						rd_len, 0x1000, initrd_high);

commit 277a68daf93f7e8515e3e2be1fd12b3100b04c27
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Feb 7 12:32:43 2020 +0800

    common: bootm: add bootm_board_start()
    
    There maybe some board routine before bootm common
    flow. The board can override this __weak function.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I6660f4ef27f3889d2dbc29594ad164a12ec6c934

diff --git a/common/bootm.c b/common/bootm.c
index 22fa4c6bdb..79ea87bb94 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -48,6 +48,11 @@ __weak int board_do_bootm(int argc, char * const argv[])
 	return 0;
 }
 
+__weak int bootm_board_start(void)
+{
+	return 0;
+}
+
 static const void *boot_get_kernel(cmd_tbl_t *cmdtp, int flag, int argc,
 				   char * const argv[], bootm_headers_t *images,
 				   ulong *os_data, ulong *os_len);
@@ -91,7 +96,7 @@ static int bootm_start(cmd_tbl_t *cmdtp, int flag, int argc,
 	bootstage_mark_name(BOOTSTAGE_ID_BOOTM_START, "bootm_start");
 	images.state = BOOTM_STATE_START;
 
-	return 0;
+	return bootm_board_start();
 }
 
 static int bootm_find_os(cmd_tbl_t *cmdtp, int flag, int argc,

commit 998aeb5fa7dbd44c687a5511a53de3cd7d855aa8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Jan 11 14:09:14 2020 +0800

    common: bootm: add board_do_bootm()
    
    There maybe some board routine before do_bootm_states().
    The board can override this __weak function.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Iab6a6742a02dae681e4d3221dc7cfffd2c3df98c

diff --git a/cmd/bootm.c b/cmd/bootm.c
index df0bbe19ca..1eed38ff45 100644
--- a/cmd/bootm.c
+++ b/cmd/bootm.c
@@ -104,6 +104,9 @@ int do_bootm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 		relocated = 1;
 	}
 #endif
+	/* board routines */
+	if (board_do_bootm(argc, argv))
+		return -EPERM;
 
 	/* determine if we have a sub command */
 	argc--; argv++;
diff --git a/common/bootm.c b/common/bootm.c
index 8fac3f1854..22fa4c6bdb 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -43,6 +43,11 @@ DECLARE_GLOBAL_DATA_PTR;
 
 bootm_headers_t images;		/* pointers to os/initrd/fdt images */
 
+__weak int board_do_bootm(int argc, char * const argv[])
+{
+	return 0;
+}
+
 static const void *boot_get_kernel(cmd_tbl_t *cmdtp, int flag, int argc,
 				   char * const argv[], bootm_headers_t *images,
 				   ulong *os_data, ulong *os_len);
diff --git a/include/bootm.h b/include/bootm.h
index 72ed30da07..19c3ad9d8a 100644
--- a/include/bootm.h
+++ b/include/bootm.h
@@ -56,6 +56,8 @@ int do_bootm_states(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
 
 void arch_preboot_os(uint32_t bootm_state);
 
+int board_do_bootm(int argc, char * const argv[]);
+
 /**
  * bootm_decomp_image() - decompress the operating system
  *

commit ac459efd1037a8bc8f0c4e08c8cd8a7b19a6624e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Feb 7 11:51:04 2020 +0800

    common: fit: add entry and load address set api
    
    Add FIT_MULTI_PROP definition.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I5e98601799de88843f8110f118640339079905a5

diff --git a/common/image-fit.c b/common/image-fit.c
index a2e2355228..0f7c779da5 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -714,6 +714,34 @@ static int fit_image_get_address(const void *fit, int noffset, char *name,
 
 	return 0;
 }
+
+static int fit_image_set_address(const void *fit, int noffset, char *name,
+				 ulong addr)
+{
+	int len, cell_len;
+	const fdt32_t *cell;
+
+	cell = fdt_getprop(fit, noffset, name, &len);
+	if (cell == NULL) {
+		fit_get_debug(fit, noffset, name, len);
+		return -1;
+	}
+
+	if (len > sizeof(ulong)) {
+		printf("Unsupported %s address size\n", name);
+		return -1;
+	}
+
+	cell_len = len >> 2;
+	/* Use load64 to avoid compiling warning for 32-bit target */
+	while (cell_len--) {
+		*(fdt32_t *)cell = cpu_to_uimage(addr >> (32 * cell_len));
+		cell++;
+	}
+
+	return 0;
+}
+
 /**
  * fit_image_get_load() - get load addr property for given component image node
  * @fit: pointer to the FIT format image header
@@ -732,6 +760,24 @@ int fit_image_get_load(const void *fit, int noffset, ulong *load)
 	return fit_image_get_address(fit, noffset, FIT_LOAD_PROP, load);
 }
 
+/**
+ * fit_image_set_load() - set load addr property for given component image node
+ * @fit: pointer to the FIT format image header
+ * @noffset: component image node offset
+ * @load: uint32_t value, will hold load address
+ *
+ * fit_image_set_load() finds and set load address property in a given component
+ * image node. If the property is found, its value is returned to the caller.
+ *
+ * returns:
+ *     0, on success
+ *     -1, on failure
+ */
+int fit_image_set_load(const void *fit, int noffset, ulong load)
+{
+	return fit_image_set_address(fit, noffset, FIT_LOAD_PROP, load);
+}
+
 /**
  * fit_image_get_entry() - get entry point address property
  * @fit: pointer to the FIT format image header
@@ -754,6 +800,28 @@ int fit_image_get_entry(const void *fit, int noffset, ulong *entry)
 	return fit_image_get_address(fit, noffset, FIT_ENTRY_PROP, entry);
 }
 
+/**
+ * fit_image_set_entry() - set entry point address property
+ * @fit: pointer to the FIT format image header
+ * @noffset: component image node offset
+ * @entry: uint32_t value, will hold entry point address
+ *
+ * This sets the entry point address property for a given component image
+ * node.
+ *
+ * fit_image_set_entry() finds and set entry point address property in a given
+ * component image node.  If the property is found, its value is returned
+ * to the caller.
+ *
+ * returns:
+ *     0, on success
+ *     -1, on failure
+ */
+int fit_image_set_entry(const void *fit, int noffset, ulong entry)
+{
+	return fit_image_set_address(fit, noffset, FIT_ENTRY_PROP, entry);
+}
+
 /**
  * fit_image_get_data - get data property and its size for a given component image node
  * @fit: pointer to the FIT format image header
diff --git a/include/image.h b/include/image.h
index f681c7ef7e..0f98102fef 100644
--- a/include/image.h
+++ b/include/image.h
@@ -910,6 +910,7 @@ int bootz_setup(ulong image, ulong *start, ulong *end);
 #define FIT_KERNEL_PROP		"kernel"
 #define FIT_RAMDISK_PROP	"ramdisk"
 #define FIT_FDT_PROP		"fdt"
+#define FIT_MULTI_PROP		"multi"
 #define FIT_LOADABLE_PROP	"loadables"
 #define FIT_DEFAULT_PROP	"default"
 #define FIT_SETUP_PROP		"setup"
@@ -973,6 +974,8 @@ int fit_image_get_type(const void *fit, int noffset, uint8_t *type);
 int fit_image_get_comp(const void *fit, int noffset, uint8_t *comp);
 int fit_image_get_load(const void *fit, int noffset, ulong *load);
 int fit_image_get_entry(const void *fit, int noffset, ulong *entry);
+int fit_image_set_load(const void *fit, int noffset, ulong load);
+int fit_image_set_entry(const void *fit, int noffset, ulong entry);
 int fit_image_get_data(const void *fit, int noffset,
 				const void **data, size_t *size);
 int fit_image_get_data_offset(const void *fit, int noffset, int *data_offset);

commit 01918c3fa95731b5ecf8f8c647c895bfd7e579ba
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jan 17 09:20:37 2020 +0800

    common: android: update image end get for android v2
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I4b2cddec072657d69b294dbddf300cf4d0471695

diff --git a/common/image-android.c b/common/image-android.c
index 92b0611e6c..4f906698a1 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -198,8 +198,12 @@ ulong android_image_get_end(const struct andr_img_hdr *hdr)
 	end += ALIGN(hdr->ramdisk_size, hdr->page_size);
 	end += ALIGN(hdr->second_size, hdr->page_size);
 
-	if (hdr->header_version >= 1)
+	if (hdr->header_version >= 2) {
 		end += ALIGN(hdr->recovery_dtbo_size, hdr->page_size);
+		end += ALIGN(hdr->dtb_size, hdr->page_size);
+	} else if (hdr->header_version >= 1) {
+		end += ALIGN(hdr->recovery_dtbo_size, hdr->page_size);
+	}
 
 	return end;
 }

commit 2fe84ae1c561cb272f37d7422122e7a651b17390
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Feb 15 12:41:21 2020 +0800

    bidram: rename "dump_bidram" to "bidram_dump"
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I77601a95daec90b396620ee1f3a3a6e455dcc914

diff --git a/lib/bidram.c b/lib/bidram.c
index 8b6277cccb..e672da5763 100644
--- a/lib/bidram.c
+++ b/lib/bidram.c
@@ -492,7 +492,7 @@ __weak int board_bidram_reserve(struct bidram *bidram)
 	return 0;
 }
 
-static int do_dump_bidram(cmd_tbl_t *cmdtp, int flag,
+static int do_bidram_dump(cmd_tbl_t *cmdtp, int flag,
 			  int argc, char *const argv[])
 {
 	bidram_dump();
@@ -500,7 +500,7 @@ static int do_dump_bidram(cmd_tbl_t *cmdtp, int flag,
 }
 
 U_BOOT_CMD(
-	dump_bidram, 1, 1, do_dump_bidram,
+	bidram_dump, 1, 1, do_bidram_dump,
 	"Dump bidram layout",
 	""
 );

commit 68cca28cd2125ae2d72ff84f832cf241bc21fb56
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Feb 15 12:32:54 2020 +0800

    sysmem: add cmd "sysmem_search" to find available region
    
    If the user can't make sure where the region is available
    and safe for use, this command handles it.
    
    Rename commands with prefix: sysmem_xxx.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I37ea76bf33a3fcb8c16baeecae3980d746775ec7

diff --git a/lib/sysmem.c b/lib/sysmem.c
index a1cd75f1d9..fc46b8943f 100644
--- a/lib/sysmem.c
+++ b/lib/sysmem.c
@@ -548,7 +548,8 @@ out:
 	if (base == 0)
 		base = base + sizeof(ulong);
 
-	return (attr.flags & F_IGNORE_INVISIBLE) ? (void *)base : NULL;
+	return (attr.flags & (F_IGNORE_INVISIBLE | F_NO_FAIL_DUMP)) ?
+			(void *)base : NULL;
 }
 
 void *sysmem_alloc(enum memblk_id id, phys_size_t size)
@@ -793,15 +794,42 @@ __weak int board_sysmem_reserve(struct sysmem *sysmem)
 	return 0;
 }
 
-static int do_dump_sysmem(cmd_tbl_t *cmdtp, int flag,
+static int do_sysmem_dump(cmd_tbl_t *cmdtp, int flag,
 			  int argc, char *const argv[])
 {
 	sysmem_dump();
 	return 0;
 }
 
+static int do_sysmem_search(cmd_tbl_t *cmdtp, int flag,
+			    int argc, char *const argv[])
+{
+	ulong addr, size;
+
+	if (argc != 2)
+		return CMD_RET_USAGE;
+
+	size = simple_strtoul(argv[1], NULL, 16);
+	if (!size)
+		return CMD_RET_USAGE;
+
+	addr = (ulong)sysmem_alloc(MEM_SEARCH, size);
+	if (!addr || sysmem_free(addr))
+		SYSMEM_I("No available region with size 0x%08lx\n", size);
+	else
+		SYSMEM_I("Available region at address: 0x%08lx\n", (ulong)addr);
+
+	return 0;
+}
+
 U_BOOT_CMD(
-	dump_sysmem, 1, 1, do_dump_sysmem,
+	sysmem_dump, 1, 1, do_sysmem_dump,
 	"Dump sysmem layout",
 	""
 );
+
+U_BOOT_CMD(
+	sysmem_search, 2, 1, do_sysmem_search,
+	"Search a available sysmem region",
+	"search_sysmem <size>"
+);

commit 90fca8097f3d5b1134bab8f7809f4df5ff8a260a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jan 17 10:33:53 2020 +0800

    sysmem: fix invisiable region boundary
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I1677891796646cf3e1db3aef836921051386a0e0

diff --git a/lib/sysmem.c b/lib/sysmem.c
index 9395305068..a1cd75f1d9 100644
--- a/lib/sysmem.c
+++ b/lib/sysmem.c
@@ -392,7 +392,7 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 		 */
 		} else if (!base) {
 			base += ARCH_DMA_MINALIGN;
-		} else if (base <= gd->bd->bi_dram[0].start) {
+		} else if (base < gd->bd->bi_dram[0].start) {
 			/*
 			 * On Rockchip platform:
 			 *

commit c01d4489240b61c7bd45952c3d9c4e02b10bec0f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Feb 7 11:35:46 2020 +0800

    sysmem: simplify the memblk name
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Icfe908ade21d1d8f568db796298f67ba9f013da6

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 1d34fd2d6f..aa33d4ffb4 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -772,19 +772,19 @@ int board_bidram_reserve(struct bidram *bidram)
 
 	/* ATF */
 	mem = param_parse_atf_mem();
-	ret = bidram_reserve(MEMBLK_ID_ATF, mem.base, mem.size);
+	ret = bidram_reserve(MEM_ATF, mem.base, mem.size);
 	if (ret)
 		return ret;
 
 	/* PSTORE/ATAGS/SHM */
 	mem = param_parse_common_resv_mem();
-	ret = bidram_reserve(MEMBLK_ID_SHM, mem.base, mem.size);
+	ret = bidram_reserve(MEM_SHM, mem.base, mem.size);
 	if (ret)
 		return ret;
 
 	/* OP-TEE */
 	mem = param_parse_optee_mem();
-	ret = bidram_reserve(MEMBLK_ID_OPTEE, mem.base, mem.size);
+	ret = bidram_reserve(MEM_OPTEE, mem.base, mem.size);
 	if (ret)
 		return ret;
 
diff --git a/arch/arm/mach-rockchip/memblk.c b/arch/arm/mach-rockchip/memblk.c
index 5980f66636..efbde42625 100644
--- a/arch/arm/mach-rockchip/memblk.c
+++ b/arch/arm/mach-rockchip/memblk.c
@@ -6,84 +6,67 @@
 #include <common.h>
 #include <memblk.h>
 
-const static struct memblk_attr plat_mem_attr[MEMBLK_ID_MAX] = {
-	[MEMBLK_ID_ATF]      =	{
-		.name = "ATF",
-		.flags = M_ATTR_NONE,
-	},
-	[MEMBLK_ID_OPTEE]    =	{
-		.name = "OP-TEE",
-		.flags = M_ATTR_NONE,
-	},
-	[MEMBLK_ID_SHM]      =	{
-		.name = "SHM",
-		.flags = M_ATTR_NONE,
-		.alias[0] = "ramoops",
-	},
-	[MEMBLK_ID_UBOOT]    =	{
-		.name = "U-Boot",
-		.flags = M_ATTR_KMEM_CAN_OVERLAP,
-	},
-	[MEMBLK_ID_FASTBOOT] =	{
-		.name = "FASTBOOT",
-		.flags = M_ATTR_KMEM_CAN_OVERLAP,
-	},
-	[MEMBLK_ID_STACK]    =	{
-		.name = "STACK",
-		.flags = M_ATTR_HOFC | M_ATTR_KMEM_CAN_OVERLAP,
-	},
-	[MEMBLK_ID_FDT]      =	{
-		.name = "FDT",
-		.flags = M_ATTR_OFC,
-	},
-	[MEMBLK_ID_FDT_DTBO] =	{
-		.name = "FDT_DTBO",
-		.flags = M_ATTR_OFC,
-	},
-	[MEMBLK_ID_FDT_AOSP] =	{
-		.name = "FDT_AOSP",
-		.flags = M_ATTR_OFC,
-	},
-	[MEMBLK_ID_RAMDISK]  =	{
-		.name = "RAMDISK",
-		.alias[0] = "BOOT",
-		.alias[1] = "RECOVERY",
-		.flags = M_ATTR_OFC,
-	},
-	[MEMBLK_ID_KERNEL]   =	{
-		.name = "KERNEL",
-/*
- * Here is a workarund:
- *	ATF reserves 0~1MB when kernel is aarch32 mode(follow the ATF for
- *	aarch64 kernel, but it actually occupies 0~192KB, so we allow kernel
- *	to alloc the region within 0~1MB address.
- */
+#define MEM_DEFINE(id, attr) 				\
+	[MEM_##id] = {					\
+		.name  = #id,				\
+		.flags = attr,				\
+	}
+
+#define MEM_DEFINE_1(id, attr, alias0)			\
+	[MEM_##id] = {					\
+		.name     = #id,			\
+		.flags    = attr,			\
+		.alias[0] = alias0,			\
+	}
+
+#define MEM_DEFINE_2(id, attr, alias0, alias1)		\
+	[MEM_##id] = {					\
+		.name     = #id,			\
+		.flags    = attr,			\
+		.alias[0] = alias0, 			\
+		.alias[1] = alias1,			\
+	}
+
+const static struct memblk_attr plat_mem_attr[MEM_MAX] = {
+	/* Invisiable */
+	MEM_DEFINE(ATF,		F_NONE),
+	MEM_DEFINE(OPTEE,	F_NONE),
+
+	/* U-Boot */
+	MEM_DEFINE(UBOOT,	F_KMEM_CAN_OVERLAP),
+	MEM_DEFINE(FASTBOOT,	F_KMEM_CAN_OVERLAP),
+	MEM_DEFINE(STACK,	F_HOFC | F_KMEM_CAN_OVERLAP),
+
+	/* Images */
+	MEM_DEFINE(ANDROID,	F_HOFC | F_OFC | F_KMEM_CAN_OVERLAP),
+	MEM_DEFINE(FDT,		F_OFC),
+	MEM_DEFINE(FDT_DTBO,	F_OFC),
+	MEM_DEFINE_1(SHM,	F_NONE, "ramoops"),
+	MEM_DEFINE_2(RAMDISK,	F_OFC,  "boot", "recovery"),
+	MEM_DEFINE(UNCOMP_KERNEL,F_IGNORE_INVISIBLE),
+	MEM_DEFINE(FIT_USER,	F_OFC | F_KMEM_CAN_OVERLAP),
+	MEM_DEFINE(UIMAGE_USER,	F_OFC | F_KMEM_CAN_OVERLAP),
+	MEM_DEFINE(AVB_ANDROID, F_OFC | F_CACHELINE_ALIGN |
+				F_KMEM_CAN_OVERLAP | F_HIGHEST_MEM),
+	MEM_DEFINE(FIT,		F_OFC | F_CACHELINE_ALIGN |
+				F_KMEM_CAN_OVERLAP | F_HIGHEST_MEM),
+	MEM_DEFINE(UIMAGE,	F_OFC | F_CACHELINE_ALIGN |
+				F_KMEM_CAN_OVERLAP | F_HIGHEST_MEM),
+	MEM_DEFINE(RESOURCE, 	F_OFC),
+	MEM_DEFINE(SEARCH,	F_OFC | F_CACHELINE_ALIGN | F_NO_FAIL_DUMP |
+				F_KMEM_CAN_OVERLAP | F_HIGHEST_MEM),
+	/*
+	 * Workarund:
+	 *
+	 *  On aarch32 mode, ATF reserve 0~1MB memory that the same as aarch64
+	 *  mode, but aarch32 mode actually occupies 0~192KB.
+	 *  So that we allow kernel to alloc memory within 0~1MB.
+	 */
 #if defined(CONFIG_ROCKCHIP_RK3308) && defined(CONFIG_ARM64_BOOT_AARCH32)
-		.flags = M_ATTR_OFC | M_ATTR_IGNORE_INVISIBLE,
+	MEM_DEFINE(KERNEL, F_OFC | F_IGNORE_INVISIBLE),
 #else
-		.flags = M_ATTR_OFC,
+	MEM_DEFINE(KERNEL, F_OFC),
 #endif
-	},
-	[MEMBLK_ID_UNCOMP_KERNEL] = {
-		.name = "UNCOMPRESS-KERNEL",
-		.flags = M_ATTR_IGNORE_INVISIBLE,
-	},
-	[MEMBLK_ID_ANDROID]  =	{
-		.name = "ANDROID",
-		.flags = M_ATTR_OFC | M_ATTR_KMEM_CAN_OVERLAP,
-	},
-	[MEMBLK_ID_AVB_ANDROID]  =	{
-		.name = "AVB_ANDROID",
-		.flags = M_ATTR_OFC | M_ATTR_CACHELINE_ALIGN |
-			 M_ATTR_KMEM_CAN_OVERLAP |
-			 M_ATTR_HIGHEST_MEM,
-	},
-	[MEMBLK_ID_FIT] =	{
-		.name = "FIT",
-		.flags = M_ATTR_OFC | M_ATTR_CACHELINE_ALIGN |
-			 M_ATTR_KMEM_CAN_OVERLAP |
-			 M_ATTR_HIGHEST_MEM,
-	},
 };
 
 const struct memblk_attr *mem_attr = plat_mem_attr;
diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 611f767d1d..a5da7d9eaf 100644
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -883,7 +883,7 @@ static int rockchip_read_distro_dtb(void *fdt_addr)
 		return -EIO;
 
 	size = fdt_totalsize(fdt_addr);
-	if (!sysmem_alloc_base(MEMBLK_ID_FDT, (phys_addr_t)fdt_addr,
+	if (!sysmem_alloc_base(MEM_FDT, (phys_addr_t)fdt_addr,
 			       ALIGN(size, RK_BLK_SIZE) + CONFIG_SYS_FDT_PAD))
 		return -ENOMEM;
 
@@ -1001,7 +1001,7 @@ int rockchip_read_dtb_file(void *fdt_addr)
 	}
 #endif
 
-	if (!sysmem_alloc_base(MEMBLK_ID_FDT, (phys_addr_t)fdt_addr,
+	if (!sysmem_alloc_base(MEM_FDT, (phys_addr_t)fdt_addr,
 			       ALIGN(file->f_size, RK_BLK_SIZE) +
 			       CONFIG_SYS_FDT_PAD))
 		return -ENOMEM;
diff --git a/cmd/bootrkp.c b/cmd/bootrkp.c
index b76d5e58ad..b79d0471d6 100644
--- a/cmd/bootrkp.c
+++ b/cmd/bootrkp.c
@@ -321,7 +321,7 @@ static int boot_rockchip_image(struct blk_desc *dev_desc,
 		kaddr = kaddr_r;
 		ksize = kernel_size * 100 / 45 ; /* Ratio: 45% */
 		ksize = ALIGN(ksize, dev_desc->blksz);
-		if (!sysmem_alloc_base(MEMBLK_ID_UNCOMP_KERNEL,
+		if (!sysmem_alloc_base(MEM_UNCOMP_KERNEL,
 				       (phys_addr_t)kaddr, ksize))
 			return -ENOMEM;
 	}
diff --git a/cmd/fastboot.c b/cmd/fastboot.c
index 31d934447c..b84887dd61 100644
--- a/cmd/fastboot.c
+++ b/cmd/fastboot.c
@@ -65,7 +65,7 @@ static int do_fastboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 		goto exit;
 	}
 
-	if (!sysmem_alloc_base(MEMBLK_ID_FASTBOOT,
+	if (!sysmem_alloc_base(MEM_FASTBOOT,
 			       CONFIG_FASTBOOT_BUF_ADDR,
 			       CONFIG_FASTBOOT_BUF_SIZE)) {
 		printf("The fastboot memory space is unusable!\n");
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 74c60769ca..efea3bd53f 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -480,7 +480,7 @@ static int sysmem_alloc_uncomp_kernel(ulong andr_hdr,
 
 		kaddr = uncomp_kaddr;
 		ksize = ALIGN(ksize, 512);
-		if (!sysmem_alloc_base(MEMBLK_ID_UNCOMP_KERNEL,
+		if (!sysmem_alloc_base(MEM_UNCOMP_KERNEL,
 				       (phys_addr_t)kaddr, ksize))
 			return -ENOMEM;
 
@@ -1029,7 +1029,7 @@ int android_fdt_overlay_apply(void *fdt_addr)
 		if (sysmem_free((phys_addr_t)fdt_addr))
 			goto out;
 
-		if (!sysmem_alloc_base(MEMBLK_ID_FDT_DTBO,
+		if (!sysmem_alloc_base(MEM_FDT_DTBO,
 				       (phys_addr_t)fdt_addr,
 					fdt_size + CONFIG_SYS_FDT_PAD))
 			goto out;
diff --git a/common/image-android.c b/common/image-android.c
index 0aa79a7fb5..92b0611e6c 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -313,7 +313,7 @@ static int image_read(img_t img, struct andr_img_hdr *hdr,
 		ramdst = (void *)env_get_ulong("android_addr_r", 16, 0);
 		datasz = hdr->kernel_size + pgsz;
 		sizesz = sizeof(hdr->kernel_size);
-		if (!sysmem_alloc_base(MEMBLK_ID_KERNEL,
+		if (!sysmem_alloc_base(MEM_KERNEL,
 				(phys_addr_t)ramdst, blkcnt * blksz))
 			return -ENOMEM;
 		break;
@@ -323,7 +323,7 @@ static int image_read(img_t img, struct andr_img_hdr *hdr,
 		ramdst = (void *)env_get_ulong("ramdisk_addr_r", 16, 0);
 		datasz = hdr->ramdisk_size;
 		sizesz = sizeof(hdr->ramdisk_size);
-		if (datasz && !sysmem_alloc_base(MEMBLK_ID_RAMDISK,
+		if (datasz && !sysmem_alloc_base(MEM_RAMDISK,
 				(phys_addr_t)ramdst, blkcnt * blksz))
 			return -ENOMEM;
 		break;
diff --git a/include/memblk.h b/include/memblk.h
index 0dc53cc91c..50a12c15fd 100644
--- a/include/memblk.h
+++ b/include/memblk.h
@@ -10,34 +10,37 @@
 #define MEM_RESV_COUNT		3
 
 enum memblk_id {
-	MEMBLK_ID_UNK,
+	MEM_UNK,
 
 	/* Preloader */
-	MEMBLK_ID_ATF,
-	MEMBLK_ID_OPTEE,
-	MEMBLK_ID_SHM,
+	MEM_ATF,
+	MEM_OPTEE,
+	MEM_SHM,
 
 	/* U-Boot self */
-	MEMBLK_ID_UBOOT,
-	MEMBLK_ID_STACK,
-	MEMBLK_ID_FASTBOOT,
+	MEM_UBOOT,
+	MEM_STACK,
+	MEM_FASTBOOT,
 
 	/* Image */
-	MEMBLK_ID_RAMDISK,
-	MEMBLK_ID_FDT,
-	MEMBLK_ID_FDT_DTBO,
-	MEMBLK_ID_FDT_AOSP,
-	MEMBLK_ID_KERNEL,
-	MEMBLK_ID_UNCOMP_KERNEL,
-	MEMBLK_ID_ANDROID,
-	MEMBLK_ID_AVB_ANDROID,
-	MEMBLK_ID_FIT,
+	MEM_RESOURCE,
+	MEM_RAMDISK,
+	MEM_FDT,
+	MEM_FDT_DTBO,
+	MEM_KERNEL,
+	MEM_UNCOMP_KERNEL,
+	MEM_ANDROID,
+	MEM_AVB_ANDROID,
+	MEM_FIT_USER,
+	MEM_FIT,
+	MEM_UIMAGE_USER,
+	MEM_UIMAGE,
 
 	/* Other */
-	MEMBLK_ID_BY_NAME,
-	MEMBLK_ID_KMEM_RESERVED,
-	MEMBLK_ID_DEMO,
-	MEMBLK_ID_MAX,
+	MEM_SEARCH,
+	MEM_BY_NAME,
+	MEM_KMEM_RESERVED,
+	MEM_MAX,
 };
 
 struct memblk_attr {
@@ -61,25 +64,33 @@ extern const struct memblk_attr *mem_attr;
 #define SIZE_MB(len)		((len) >> 20)
 #define SIZE_KB(len)		(((len) % (1 << 20)) >> 10)
 
-#define M_ATTR_NONE		0
+#define F_NONE			0
+
 /* Over-Flow-Check for region tail */
-#define M_ATTR_OFC		(1 << 0)
+#define F_OFC			(1 << 0)
+
 /* Over-Flow-Check for region Head, only for U-Boot stack */
-#define M_ATTR_HOFC		(1 << 1)
+#define F_HOFC			(1 << 1)
+
 /* Memory can be overlap by fdt reserved memory, deprecated */
-#define M_ATTR_OVERLAP		(1 << 2)
-/* Just peek, always return success, deprecated */
-#define M_ATTR_PEEK		(1 << 3)
+#define F_OVERLAP		(1 << 2)
+
 /* The region start address should be aligned to cacheline size */
-#define M_ATTR_CACHELINE_ALIGN	(1 << 4)
+#define F_CACHELINE_ALIGN	(1 << 3)
+
 /* Kernel 'reserved-memory' */
-#define M_ATTR_KMEM_RESERVED	(1 << 5)
+#define F_KMEM_RESERVED		(1 << 4)
+
 /* The region can be overlap by kernel 'reserved-memory' */
-#define M_ATTR_KMEM_CAN_OVERLAP	(1 << 6)
-/* Ignore invisable region reserved by bidram */
-#define M_ATTR_IGNORE_INVISIBLE	(1 << 7)
+#define F_KMEM_CAN_OVERLAP	(1 << 5)
+
+/* Ignore invisible region reserved by bidram */
+#define F_IGNORE_INVISIBLE	(1 << 6)
+
 /* Highest memory right under the sp */
-#define M_ATTR_HIGHEST_MEM	(1 << 8)
+#define F_HIGHEST_MEM		(1 << 7)
 
+/* No sysmem layout dump if failed */
+#define F_NO_FAIL_DUMP		(1 << 8)
 
 #endif /* _MEMBLK_H */
diff --git a/lib/avb/libavb/avb_slot_verify.c b/lib/avb/libavb/avb_slot_verify.c
index a08a375bf3..384b10e54e 100644
--- a/lib/avb/libavb/avb_slot_verify.c
+++ b/lib/avb/libavb/avb_slot_verify.c
@@ -118,7 +118,7 @@ static AvbSlotVerifyResult load_full_partition(AvbOps* ops,
 
   /* Allocate and copy the partition. */
   if (!*out_image_preloaded) {
-    *out_image_buf = sysmem_alloc(MEMBLK_ID_AVB_ANDROID, image_size);
+    *out_image_buf = sysmem_alloc(MEM_AVB_ANDROID, image_size);
     if (*out_image_buf == NULL) {
       return AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
     }
diff --git a/lib/bidram.c b/lib/bidram.c
index ec563ee8b9..8b6277cccb 100644
--- a/lib/bidram.c
+++ b/lib/bidram.c
@@ -250,7 +250,7 @@ static int bidram_core_reserve(enum memblk_id id, const char *mem_name,
 	if (!bidram_has_init())
 		return -ENOSYS;
 
-	if (id == MEMBLK_ID_BY_NAME) {
+	if (id == MEM_BY_NAME) {
 		if (!mem_name) {
 			BIDRAM_E("NULL name for reserve bidram\n");
 			return -EINVAL;
@@ -258,7 +258,7 @@ static int bidram_core_reserve(enum memblk_id id, const char *mem_name,
 			name = mem_name;
 		}
 	} else {
-		if (id > MEMBLK_ID_UNK && id < MEMBLK_ID_MAX) {
+		if (id > MEM_UNK && id < MEM_MAX) {
 			attr = mem_attr[id];
 			name = attr.name;
 		} else {
@@ -309,7 +309,7 @@ static int bidram_core_reserve(enum memblk_id id, const char *mem_name,
 		if (sysmem_has_init()) {
 			void *paddr;
 
-			if (id == MEMBLK_ID_BY_NAME)
+			if (id == MEM_BY_NAME)
 				paddr = sysmem_alloc_base_by_name(name, base, size);
 			else
 				paddr = sysmem_alloc_base(id, base, size);
@@ -321,7 +321,7 @@ static int bidram_core_reserve(enum memblk_id id, const char *mem_name,
 #endif
 		mem->base = base;
 		mem->size = size;
-		if (id == MEMBLK_ID_BY_NAME) {
+		if (id == MEM_BY_NAME) {
 			mem->attr.name = name;
 			mem->attr.flags = 0;
 		} else {
@@ -355,7 +355,7 @@ int bidram_reserve_by_name(const char *name,
 {
 	int ret;
 
-	ret = bidram_core_reserve(MEMBLK_ID_BY_NAME, name, base, size);
+	ret = bidram_core_reserve(MEM_BY_NAME, name, base, size);
 	if (!ret)
 		bidram_gen_gd_bi_dram();
 	else
diff --git a/lib/sysmem.c b/lib/sysmem.c
index 3a2fe29bd2..9395305068 100644
--- a/lib/sysmem.c
+++ b/lib/sysmem.c
@@ -94,11 +94,11 @@ void sysmem_dump(void)
 	list_for_each(node, &sysmem->allocated_head) {
 		mem = list_entry(node, struct memblock, node);
 		allocated_size += mem->size;
-		if (mem->attr.flags & M_ATTR_OFC) {
+		if (mem->attr.flags & F_OFC) {
 			check = (struct memcheck *)
 				(mem->base + mem->size - sizeof(*check));
 			overflow = (check->magic != SYSMEM_MAGIC);
-		} else if (mem->attr.flags & M_ATTR_HOFC) {
+		} else if (mem->attr.flags & F_HOFC) {
 			check = (struct memcheck *)
 				(mem->base - sizeof(*check));
 			overflow = (check->magic != SYSMEM_MAGIC);
@@ -225,7 +225,7 @@ void sysmem_overflow_check(void)
 			kmem = list_entry(knode, struct memblock, node);
 			if (sysmem_is_overlap(smem->base, smem->size,
 					      kmem->base, kmem->size)) {
-				if (smem->attr.flags & M_ATTR_KMEM_CAN_OVERLAP)
+				if (smem->attr.flags & F_KMEM_CAN_OVERLAP)
 					continue;
 
 				overlap = 1;
@@ -241,11 +241,11 @@ void sysmem_overflow_check(void)
 		/*
 		 * Check sysmem allocated regions overflow.
 		 */
-		if (smem->attr.flags & M_ATTR_OFC) {
+		if (smem->attr.flags & F_OFC) {
 			check = (struct memcheck *)
 				(smem->base + smem->size - sizeof(*check));
 			overflow = (check->magic != SYSMEM_MAGIC);
-		} else if (smem->attr.flags & M_ATTR_HOFC) {
+		} else if (smem->attr.flags & F_HOFC) {
 			check = (struct memcheck *)
 				(smem->base - sizeof(*check));
 			overflow = (check->magic != SYSMEM_MAGIC);
@@ -285,7 +285,7 @@ static const char *sysmem_alias2name(const char *name, int *id)
 	int i, j;
 	int match = 0;
 
-	for (i = 0; i < MEMBLK_ID_MAX; i++) {
+	for (i = 0; i < MEM_MAX; i++) {
 		/* Pirmary name */
 		if (mem_attr[i].name && !strcasecmp(mem_attr[i].name, name)) {
 			match = 1;
@@ -335,7 +335,7 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 	if (!sysmem_has_init())
 		goto out;
 
-	if (id == MEMBLK_ID_BY_NAME || id == MEMBLK_ID_KMEM_RESERVED) {
+	if (id == MEM_BY_NAME || id == MEM_KMEM_RESERVED) {
 		if (!mem_name) {
 			SYSMEM_E("NULL name for alloc sysmem\n");
 			goto out;
@@ -348,7 +348,7 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 			attr.name = strdup(name);
 
 		/* Always make kernel 'reserved-memory' alloc successfully */
-		if (id == MEMBLK_ID_KMEM_RESERVED) {
+		if (id == MEM_KMEM_RESERVED) {
 			struct memblock *mem;
 
 			mem = malloc(sizeof(*mem));
@@ -357,7 +357,7 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 				return mem;
 			}
 
-			attr.flags |= M_ATTR_KMEM_RESERVED;
+			attr.flags |= F_KMEM_RESERVED;
 			mem->orig_base = orig_base;
 			mem->base = base;
 			mem->size = size;
@@ -367,7 +367,7 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 
 			return (void *)base;
 		}
-	} else if (id > MEMBLK_ID_UNK && id < MEMBLK_ID_MAX) {
+	} else if (id > MEM_UNK && id < MEM_MAX) {
 		attr = mem_attr[id];
 		name = attr.name;
 
@@ -377,7 +377,7 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 		 * Fixup base and place right after U-Boot stack, adding a lot
 		 * of space(4KB) maybe safer.
 		 */
-		if (attr.flags & M_ATTR_HIGHEST_MEM) {
+		if (attr.flags & F_HIGHEST_MEM) {
 			base = gd->start_addr_sp -
 					CONFIG_SYS_STACK_SIZE - size - 0x1000;
 
@@ -396,12 +396,12 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 			/*
 			 * On Rockchip platform:
 			 *
-			 * So far, we use M_ATTR_IGNORE_INVISIBLE for uncompress
+			 * So far, we use F_IGNORE_INVISIBLE for uncompress
 			 * kernel alloc, and for ARMv8 enabling AArch32 mode, the
 			 * ATF is still AArch64 and ocuppies 0~1MB and shmem 1~2M.
 			 * So let's ignore the region which overlap with them.
 			 */
-			if (attr.flags & M_ATTR_IGNORE_INVISIBLE) {
+			if (attr.flags & F_IGNORE_INVISIBLE) {
 				base = gd->bd->bi_dram[0].start;
 			} else {
 				SYSMEM_E("Failed to alloc invisible sub region 0x%08lx - 0x%08lx "
@@ -428,7 +428,7 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 	 * Aligned down to cacheline size if not aligned, otherwise the tail
 	 * of region maybe overflow.
 	 */
-	if (attr.flags & M_ATTR_CACHELINE_ALIGN &&
+	if (attr.flags & F_CACHELINE_ALIGN &&
 	    !IS_ALIGNED(base, ARCH_DMA_MINALIGN)) {
 		base = ALIGN(base, ARCH_DMA_MINALIGN);
 		base -= ARCH_DMA_MINALIGN;
@@ -471,7 +471,7 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 	}
 
 	/* Add overflow check magic ? */
-	if (attr.flags & M_ATTR_OFC)
+	if (attr.flags & F_OFC)
 		alloc_size = size + sizeof(*check);
 	else
 		alloc_size = size;
@@ -493,7 +493,7 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 				goto out;
 			}
 			/* Record original base for dump */
-			if (attr.flags & M_ATTR_HIGHEST_MEM)
+			if (attr.flags & F_HIGHEST_MEM)
 				mem->orig_base = base;
 			else
 				mem->orig_base = orig_base;
@@ -505,10 +505,10 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 			list_add_tail(&mem->node, &sysmem->allocated_head);
 
 			/* Add overflow check magic */
-			if (mem->attr.flags & M_ATTR_OFC) {
+			if (mem->attr.flags & F_OFC) {
 				check = (struct memcheck *)(paddr + size);
 				check->magic = SYSMEM_MAGIC;
-			} else if (mem->attr.flags & M_ATTR_HOFC) {
+			} else if (mem->attr.flags & F_HOFC) {
 				check = (struct memcheck *)(paddr - sizeof(*check));
 				check->magic = SYSMEM_MAGIC;
 			}
@@ -548,7 +548,7 @@ out:
 	if (base == 0)
 		base = base + sizeof(ulong);
 
-	return (attr.flags & M_ATTR_IGNORE_INVISIBLE) ? (void *)base : NULL;
+	return (attr.flags & F_IGNORE_INVISIBLE) ? (void *)base : NULL;
 }
 
 void *sysmem_alloc(enum memblk_id id, phys_size_t size)
@@ -570,7 +570,7 @@ void *sysmem_alloc_by_name(const char *name, phys_size_t size)
 {
 	void *paddr;
 
-	paddr = sysmem_alloc_align_base(MEMBLK_ID_BY_NAME,
+	paddr = sysmem_alloc_align_base(MEM_BY_NAME,
 					name,
 					SYSMEM_ALLOC_ANYWHERE,
 					size,
@@ -601,7 +601,7 @@ void *sysmem_alloc_base_by_name(const char *name,
 {
 	void *paddr;
 
-	paddr = sysmem_alloc_align_base(MEMBLK_ID_BY_NAME,
+	paddr = sysmem_alloc_align_base(MEM_BY_NAME,
 					name,
 					base,
 					size,
@@ -617,7 +617,7 @@ void *sysmem_fdt_reserve_alloc_base(const char *name,
 {
 	void *paddr;
 
-	paddr = sysmem_alloc_align_base(MEMBLK_ID_KMEM_RESERVED,
+	paddr = sysmem_alloc_align_base(MEM_KMEM_RESERVED,
 					name,
 					base,
 					size,
@@ -760,7 +760,7 @@ int sysmem_init(void)
 	/* Reserved for U-boot framework: 'reserve_xxx()' */
 	mem_start = gd->start_addr_sp;
 	mem_size = gd->ram_top - mem_start;
-	if (!sysmem_alloc_base(MEMBLK_ID_UBOOT, mem_start, mem_size)) {
+	if (!sysmem_alloc_base(MEM_UBOOT, mem_start, mem_size)) {
 		SYSMEM_E("Failed to reserve sysmem for U-Boot framework\n");
 		ret = -ENOMEM;
 		goto fail;
@@ -769,7 +769,7 @@ int sysmem_init(void)
 	/* Reserved for U-Boot stack */
 	mem_start = gd->start_addr_sp - CONFIG_SYS_STACK_SIZE;
 	mem_size = CONFIG_SYS_STACK_SIZE;
-	if (!sysmem_alloc_base(MEMBLK_ID_STACK, mem_start, mem_size)) {
+	if (!sysmem_alloc_base(MEM_STACK, mem_start, mem_size)) {
 		SYSMEM_E("Failed to reserve sysmem for stack\n");
 		ret = -ENOMEM;
 		goto fail;

commit 98de7945ac1b7817aa4d722d55e34b69b3a4d584
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Feb 15 11:35:15 2020 +0800

    common: bootm: improve decompess image message
    
    Make it more meaningful.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ie26745d6c007cc1bae91ebf2fad88feb1742e8bb

diff --git a/common/bootm.c b/common/bootm.c
index 160c9b34cf..8fac3f1854 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -299,14 +299,26 @@ static int bootm_find_other(cmd_tbl_t *cmdtp, int flag, int argc,
  * @comp_type:	Compression type being used (IH_COMP_...)
  * @is_xip:	true if the load address matches the image start
  */
-static void print_decomp_msg(int comp_type, int type, bool is_xip)
+static void print_decomp_msg(int comp_type, int type, bool is_xip,
+			     ulong src, ulong dst)
 {
 	const char *name = genimg_get_type_name(type);
+	const char *comp_name[] = {
+		[IH_COMP_NONE]  = "",
+		[IH_COMP_GZIP]  = "GZIP",
+		[IH_COMP_BZIP2] = "BZIP2",
+		[IH_COMP_LZMA]  = "LZMA",
+		[IH_COMP_LZO]   = "LZO",
+		[IH_COMP_LZ4]   = "LZ4",
+		[IH_COMP_ZIMAGE]= "ZIMAGE",
+	};
 
 	if (comp_type == IH_COMP_NONE)
-		printf("   %s %s ... ", is_xip ? "XIP" : "Loading", name);
+		printf("   %s %s from 0x%08lx to 0x%08lx ... ",
+		       is_xip ? "XIP" : "Loading", name, src, dst);
 	else
-		printf("   Uncompressing %s ... ", name);
+		printf("   Uncompressing %s %s from 0x%08lx to 0x%08lx ... ",
+		       comp_name[comp_type], name, src, dst);
 }
 
 /**
@@ -379,7 +391,8 @@ int bootm_decomp_image(int comp, ulong load, ulong image_start, int type,
 	int ret = 0;
 
 	*load_end = load;
-	print_decomp_msg(comp, type, load == image_start);
+	print_decomp_msg(comp, type, load == image_start,
+		(ulong)image_buf, (ulong)load_buf);
 
 	/*
 	 * Load the image to the right place, decompressing if needed. After
@@ -454,7 +467,10 @@ int bootm_decomp_image(int comp, ulong load, ulong image_start, int type,
 		return handle_decomp_error(comp, image_len, unc_len, ret);
 	*load_end = load + image_len;
 
-	puts("OK\n");
+	if (comp == IH_COMP_NONE || comp == IH_COMP_ZIMAGE)
+		puts("OK\n");
+	else
+		printf("with %08lx bytes OK\n", image_len);
 
 	return 0;
 }

commit 622ccf343f65294f14050f2cf40acc5bf93dc126
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Feb 16 14:33:53 2020 +0800

    make.sh: support assign U-Boot dtb with external one
    
    Usage: ./make.sh EXT_DTB=rk-kernel.dtb
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I83218f5bb2f8e05d895d57fd344f54a01b6ad789

diff --git a/make.sh b/make.sh
index dea58f4b9a..7e9232597e 100755
--- a/make.sh
+++ b/make.sh
@@ -59,8 +59,7 @@ TOOLCHAIN_OBJDUMP=
 TOOLCHAIN_ADDR2LINE=
 
 # Declare global default output dir and cmd, update in prepare()
-OUTDIR=$2
-OUTOPT=
+OPTION=
 
 # Declare global plaform configure, updated in fixup_platform_configure()
 PLATFORM_RSA=
@@ -75,10 +74,10 @@ help()
 {
 	echo
 	echo "Usage:"
-	echo "	./make.sh [board|subcmd] [O=<dir>|ini]"
+	echo "	./make.sh [board|subcmd|EXT_DTB=<file>]"
 	echo
 	echo "	 - board:   board name of defconfig"
-	echo "	 - subcmd:  |elf*|loader*|spl*|itb||trust*|uboot|map|sym|<addr>|"
+	echo "	 - subcmd:  |elf*|loader*|spl*|itb|trust*|uboot|map|sym|<addr>|EXT_DTB=*"
 	echo "	 - ini:     assigned ini file to pack trust/loader"
 	echo
 	echo "Output:"
@@ -89,6 +88,7 @@ help()
 	echo "1. Build:"
 	echo "	./make.sh evb-rk3399               --- build for evb-rk3399_defconfig"
 	echo "	./make.sh firefly-rk3288           --- build for firefly-rk3288_defconfig"
+	echo "	./make.sh EXT_DTB=rk-kernel.dtb    --- build with exist .config and external dtb"
 	echo "	./make.sh                          --- build with exist .config"
 	echo "	./make.sh env                      --- build envtools"
 	echo
@@ -119,7 +119,7 @@ prepare()
 
 	case $BOARD in
 		# Parse from exit .config
-		''|elf*|loader*|spl*|itb|debug*|trust|uboot|map|sym|env)
+		''|elf*|loader*|spl*|itb|debug*|trust|uboot|map|sym|env|EXT_DTB=*)
 		if [ ! -f .config ]; then
 			echo
 			echo "Build failed, Can't find .config"
@@ -138,7 +138,7 @@ prepare()
 		;;
 
 		#Subcmd
-		''|elf*|loader*|spl*|itb|debug*|trust*|uboot|map|sym|env)
+		''|elf*|loader*|spl*|itb|debug*|trust*|uboot|map|sym|env|EXT_DTB=*)
 		;;
 
 		*)
@@ -156,7 +156,7 @@ prepare()
 			exit 1
 		else
 			echo "make for ${BOARD}_defconfig by -j${JOB}"
-			make ${BOARD}_defconfig ${OUTOPT}
+			make ${BOARD}_defconfig ${OPTION}
 		fi
 		;;
 	esac
@@ -276,6 +276,10 @@ sub_commands()
 		exit 0
 		;;
 
+		EXT_DTB=*)
+		OPTION=${SUBCMD}
+		;;
+
 		*)
 		# Search function and code position of address
 		RELOC_OFF=${FUNCADDR#*-}
@@ -680,7 +684,9 @@ pack_trust_image()
 finish()
 {
 	echo
-	if [ "$BOARD" = '' ]; then
+	if [ ! -z "$OPTION" ]; then
+		echo "Platform ${RKCHIP_LABEL} is build OK, with exist .config ($OPTION)"
+	elif [ "$BOARD" = '' ]; then
 		echo "Platform ${RKCHIP_LABEL} is build OK, with exist .config"
 	else
 		echo "Platform ${RKCHIP_LABEL} is build OK, with new .config(make ${BOARD}_defconfig)"
@@ -692,7 +698,7 @@ select_toolchain
 select_chip_info
 fixup_platform_configure
 sub_commands
-make CROSS_COMPILE=${TOOLCHAIN_GCC}  all --jobs=${JOB} ${OUTOPT}
+make CROSS_COMPILE=${TOOLCHAIN_GCC} ${OPTION} all --jobs=${JOB}
 pack_uboot_image
 pack_loader_image
 pack_trust_image

commit ea8a3d10b6773cb4c5391e575d51c3ddc53b7522
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Feb 15 17:42:27 2020 +0800

    common: board_f: save U-Boot fdt blob
    
    Saving it for late use, eg: fit verified boot process.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I6643fb643f2fd88795d80fc5bd21025b62dc6943

diff --git a/common/board_f.c b/common/board_f.c
index ada279ed8b..fd873449dc 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -601,6 +601,9 @@ static int reloc_fdt(void)
 	if (gd->new_fdt) {
 		memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
 		gd->fdt_blob = gd->new_fdt;
+#ifdef CONFIG_USING_KERNEL_DTB
+		gd->ufdt_blob = gd->new_fdt;
+#endif
 	}
 #endif
 
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index 836985d143..7e13c3f37f 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -87,6 +87,10 @@ typedef struct global_data {
 	const void *fdt_blob_kern;	/* Kernel dtb at the tail of u-boot.bin */
 #endif
 	const void *fdt_blob;		/* Our device tree, NULL if none */
+
+#ifdef CONFIG_USING_KERNEL_DTB
+	const void *ufdt_blob;		/* Our U-Boot device tree, NULL if none */
+#endif
 	void *new_fdt;			/* Relocated FDT */
 	unsigned long fdt_size;		/* Space reserved for relocated FDT */
 #ifdef CONFIG_OF_LIVE

commit 23b55d3d0f0a541c102c29050a368ffe9b7c2ba7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Feb 7 19:08:54 2020 +0800

    drm/rockchip: fix compile error
    
    Error when CONFIG_ROCKCHIP_RESOURCE_IMAGE is disabled
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I3e6dd7c5528409c37ad8fbdcf1cc7f5178253bb2

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index e47437a423..8b6ebad552 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -142,7 +142,7 @@ static void init_display_buffer(ulong base)
 	memory_end = memory_start;
 }
 
-static void *get_display_buffer(int size)
+void *get_display_buffer(int size)
 {
 	unsigned long roundup_memory = roundup(memory_end, PAGE_SIZE);
 	void *buf;
@@ -163,7 +163,7 @@ static unsigned long get_display_size(void)
 	return memory_end - memory_start;
 }
 
-static bool can_direct_logo(int bpp)
+bool can_direct_logo(int bpp)
 {
 	return bpp == 24 || bpp == 32;
 }
@@ -925,9 +925,9 @@ static int load_kernel_bmp_logo(struct logo_info *logo, const char *bmp_name)
 	}
 
 	logo->mem = dst;
+#endif
 
 	return 0;
-#endif
 }
 
 static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)

commit 73d7b075b050082eac7e56d3973457b25a563938
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Tue Feb 18 14:59:27 2020 +0800

    usb: dwc3: amend UTMI/UTMIW phy interface setup
    
    Let move 8/16-bit UTMI+ interface initialization into DWC3 core init
    that is convenient for both DM_USB and u-boot traditional process.
    
    Change-Id: I7fe45af396098749b2acf4a885dff875dcbc6f63
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/common/common.c b/drivers/usb/common/common.c
index e8866ef43d..802e4b95de 100644
--- a/drivers/usb/common/common.c
+++ b/drivers/usb/common/common.c
@@ -11,6 +11,7 @@
 #include <linux/libfdt.h>
 #include <linux/usb/otg.h>
 #include <linux/usb/ch9.h>
+#include <linux/usb/phy.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -67,3 +68,27 @@ enum usb_device_speed usb_get_maximum_speed(int node)
 
 	return USB_SPEED_UNKNOWN;
 }
+
+#if CONFIG_IS_ENABLED(OF_LIVE) && CONFIG_IS_ENABLED(DM_USB)
+static const char *const usbphy_modes[] = {
+	[USBPHY_INTERFACE_MODE_UNKNOWN]	= "",
+	[USBPHY_INTERFACE_MODE_UTMI]	= "utmi",
+	[USBPHY_INTERFACE_MODE_UTMIW]	= "utmi_wide",
+};
+
+enum usb_phy_interface usb_get_phy_mode(ofnode node)
+{
+	const char *phy_type;
+	int i;
+
+	phy_type = ofnode_get_property(node, "phy_type", NULL);
+	if (!phy_type)
+		return USBPHY_INTERFACE_MODE_UNKNOWN;
+
+	for (i = 0; i < ARRAY_SIZE(usbphy_modes); i++)
+		if (!strcmp(phy_type, usbphy_modes[i]))
+			return i;
+
+	return USBPHY_INTERFACE_MODE_UNKNOWN;
+}
+#endif
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index cab88dbdaa..731971625d 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -334,6 +334,34 @@ static void dwc3_cache_hwparams(struct dwc3 *dwc)
 	parms->hwparams8 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS8);
 }
 
+static void dwc3_hsphy_mode_setup(struct dwc3 *dwc)
+{
+	enum usb_phy_interface hsphy_mode = dwc->hsphy_mode;
+	u32 reg;
+
+	/* Set dwc3 usb2 phy config */
+	reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
+
+	switch (hsphy_mode) {
+	case USBPHY_INTERFACE_MODE_UTMI:
+		reg &= ~(DWC3_GUSB2PHYCFG_PHYIF_MASK |
+			DWC3_GUSB2PHYCFG_USBTRDTIM_MASK);
+		reg |= DWC3_GUSB2PHYCFG_PHYIF(UTMI_PHYIF_8_BIT) |
+			DWC3_GUSB2PHYCFG_USBTRDTIM(USBTRDTIM_UTMI_8_BIT);
+		break;
+	case USBPHY_INTERFACE_MODE_UTMIW:
+		reg &= ~(DWC3_GUSB2PHYCFG_PHYIF_MASK |
+			DWC3_GUSB2PHYCFG_USBTRDTIM_MASK);
+		reg |= DWC3_GUSB2PHYCFG_PHYIF(UTMI_PHYIF_16_BIT) |
+			DWC3_GUSB2PHYCFG_USBTRDTIM(USBTRDTIM_UTMI_16_BIT);
+		break;
+	default:
+		break;
+	}
+
+	dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
+}
+
 /**
  * dwc3_phy_setup - Configure USB PHY Interface of DWC3 Core
  * @dwc: Pointer to our controller context structure
@@ -379,6 +407,8 @@ static void dwc3_phy_setup(struct dwc3 *dwc)
 
 	dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);
 
+	dwc3_hsphy_mode_setup(dwc);
+
 	mdelay(100);
 
 	reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
@@ -629,35 +659,6 @@ static void dwc3_core_exit_mode(struct dwc3 *dwc)
 	dwc3_gadget_run(dwc);
 }
 
-static void dwc3_uboot_hsphy_mode(struct dwc3_device *dwc3_dev,
-				  struct dwc3 *dwc)
-{
-	enum usb_phy_interface hsphy_mode = dwc3_dev->hsphy_mode;
-	u32 reg;
-
-	/* Set dwc3 usb2 phy config */
-	reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
-
-	switch (hsphy_mode) {
-	case USBPHY_INTERFACE_MODE_UTMI:
-		reg &= ~(DWC3_GUSB2PHYCFG_PHYIF_MASK |
-			DWC3_GUSB2PHYCFG_USBTRDTIM_MASK);
-		reg |= DWC3_GUSB2PHYCFG_PHYIF(UTMI_PHYIF_8_BIT) |
-			DWC3_GUSB2PHYCFG_USBTRDTIM(USBTRDTIM_UTMI_8_BIT);
-		break;
-	case USBPHY_INTERFACE_MODE_UTMIW:
-		reg &= ~(DWC3_GUSB2PHYCFG_PHYIF_MASK |
-			DWC3_GUSB2PHYCFG_USBTRDTIM_MASK);
-		reg |= DWC3_GUSB2PHYCFG_PHYIF(UTMI_PHYIF_16_BIT) |
-			DWC3_GUSB2PHYCFG_USBTRDTIM(USBTRDTIM_UTMI_16_BIT);
-		break;
-	default:
-		break;
-	}
-
-	dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
-}
-
 #define DWC3_ALIGN_MASK		(16 - 1)
 
 /**
@@ -745,6 +746,8 @@ int dwc3_uboot_init(struct dwc3_device *dwc3_dev)
 	dwc->hird_threshold = hird_threshold
 		| (dwc->is_utmi_l1_suspend << 4);
 
+	dwc->hsphy_mode = dwc3_dev->hsphy_mode;
+
 	dwc->index = dwc3_dev->index;
 
 	if (dwc3_dev->usb2_phyif_utmi_width)
@@ -780,8 +783,6 @@ int dwc3_uboot_init(struct dwc3_device *dwc3_dev)
 		goto err0;
 	}
 
-	dwc3_uboot_hsphy_mode(dwc3_dev, dwc);
-
 	ret = dwc3_event_buffers_setup(dwc);
 	if (ret) {
 		dev_err(dwc->dev, "failed to setup event buffers\n");
@@ -969,6 +970,8 @@ void dwc3_of_parse(struct dwc3 *dwc)
 	 */
 	hird_threshold = 12;
 
+	dwc->hsphy_mode = usb_get_phy_mode(dev->node);
+
 	dwc->has_lpm_erratum = dev_read_bool(dev,
 				"snps,has-lpm-erratum");
 	tmp = dev_read_u8_array_ptr(dev, "snps,lpm-nyet-threshold", 1);
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 74fd091497..b32bc010cd 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -22,6 +22,7 @@
 
 #include <linux/usb/ch9.h>
 #include <linux/usb/otg.h>
+#include <linux/usb/phy.h>
 
 #define DWC3_MSG_MAX	500
 
@@ -654,6 +655,9 @@ struct dwc3_scratchpad_array {
  * @maximum_speed: maximum speed requested (mainly for testing purposes)
  * @revision: revision register contents
  * @dr_mode: requested mode of operation
+ * @hsphy_mode: UTMI phy mode, one of following:
+ *		- USBPHY_INTERFACE_MODE_UTMI
+ *		- USBPHY_INTERFACE_MODE_UTMIW
  * @dcfg: saved contents of DCFG register
  * @gctl: saved contents of GCTL register
  * @isoch_delay: wValue from Set Isochronous Delay request;
@@ -746,6 +750,7 @@ struct dwc3 {
 	size_t			regs_size;
 
 	enum usb_dr_mode	dr_mode;
+	enum usb_phy_interface	hsphy_mode;
 
 	/* used for suspend/resume */
 	u32			dcfg;
diff --git a/include/linux/usb/phy.h b/include/linux/usb/phy.h
index 158ca9cd85..e4924ffe68 100644
--- a/include/linux/usb/phy.h
+++ b/include/linux/usb/phy.h
@@ -10,10 +10,28 @@
 #ifndef __LINUX_USB_PHY_H
 #define __LINUX_USB_PHY_H
 
+#include <dm/ofnode.h>
+
 enum usb_phy_interface {
 	USBPHY_INTERFACE_MODE_UNKNOWN,
 	USBPHY_INTERFACE_MODE_UTMI,
 	USBPHY_INTERFACE_MODE_UTMIW,
 };
 
+#if CONFIG_IS_ENABLED(OF_LIVE) && CONFIG_IS_ENABLED(DM_USB)
+/**
+ * usb_get_phy_mode - Get phy mode for given device_node
+ * @np:	Pointer to the given device_node
+ *
+ * The function gets phy interface string from property 'phy_type',
+ * and returns the corresponding enum usb_phy_interface
+ */
+enum usb_phy_interface usb_get_phy_mode(ofnode node);
+#else
+static inline enum usb_phy_interface usb_get_phy_mode(ofnode node)
+{
+	return USBPHY_INTERFACE_MODE_UNKNOWN;
+}
+#endif
+
 #endif /* __LINUX_USB_PHY_H */

commit efc9f5561836461202285082a46e0f42d2241ce3
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Wed Feb 19 17:24:02 2020 +0800

    usb: dwc3: add dis_u2_freeclk_exists_quirk
    
    Add a quirk to clear the GUSB2PHYCFG.U2_FREECLK_EXISTS bit,
    which specifies whether the USB2.0 PHY provides a free-running
    PHY clock, which is active when the clock control input is active.
    
    Refer to commit 27f83eeb6b42("usb: dwc3: add dis_u2_freeclk_exists_quirk")
    in Linux Rockchip Kernel.
    
    Change-Id: Id90ac25a7e82bbf7918cc9658797c23008871852
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 26fc01fab5..cab88dbdaa 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -398,6 +398,9 @@ static void dwc3_phy_setup(struct dwc3 *dwc)
 	if (dwc->dis_enblslpm_quirk)
 		reg &= ~DWC3_GUSB2PHYCFG_ENBLSLPM;
 
+	if (dwc->dis_u2_freeclk_exists_quirk)
+		reg &= ~DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS;
+
 	if (dwc->usb2_phyif_utmi_width == 16) {
 		reg &= ~(DWC3_GUSB2PHYCFG_PHYIF_MASK |
 			DWC3_GUSB2PHYCFG_USBTRDTIM_MASK);
@@ -1000,6 +1003,8 @@ void dwc3_of_parse(struct dwc3 *dwc)
 				"snps,dis_u2_susphy_quirk");
 	dwc->dis_enblslpm_quirk = dev_read_bool(dev,
 				"snps,dis_enblslpm_quirk");
+	dwc->dis_u2_freeclk_exists_quirk = dev_read_bool(dev,
+				"snps,dis-u2-freeclk-exists-quirk");
 	dwc->tx_de_emphasis_quirk = dev_read_bool(dev,
 				"snps,tx_de_emphasis_quirk");
 	tmp = dev_read_u8_array_ptr(dev, "snps,tx_de_emphasis", 1);
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 5acd3012bc..74fd091497 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -163,6 +163,7 @@
 
 /* Global USB2 PHY Configuration Register */
 #define DWC3_GUSB2PHYCFG_PHYSOFTRST	(1 << 31)
+#define DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS	(1 << 30)
 #define DWC3_GUSB2PHYCFG_ENBLSLPM   (1 << 8)
 #define DWC3_GUSB2PHYCFG_SUSPHY		(1 << 6)
 #define DWC3_GUSB2PHYCFG_PHYIF_8BIT	(0 << 3)
@@ -829,6 +830,7 @@ struct dwc3 {
 	unsigned		dis_u2_susphy_quirk:1;
 	unsigned		dis_u1u2_quirk:1;
 	unsigned		dis_enblslpm_quirk:1;
+	unsigned		dis_u2_freeclk_exists_quirk:1;
 
 	unsigned		tx_de_emphasis_quirk:1;
 	unsigned		tx_de_emphasis:2;

commit f4acaed3e7712a074f91f5e307fad4a167b6d4c7
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Wed Feb 19 17:19:07 2020 +0800

    usb: dwc3: add dis_enblslpm_quirk
    
    Add a quirk to clear the GUSB2PHYCFG.ENBLSLPM bit, which controls
    whether the PHY receives the suspend signal from the controller.
    
    Refer to commit ec791d149bca("usb: dwc3: Add dis_enblslpm_quirk")
    in Linux Kernel.
    
    Change-Id: If8bffb5a8dc1b02e4b3100dc722d14a3d9b74992
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 11192e66f9..26fc01fab5 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -395,6 +395,9 @@ static void dwc3_phy_setup(struct dwc3 *dwc)
 	if (dwc->dis_u2_susphy_quirk)
 		reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
 
+	if (dwc->dis_enblslpm_quirk)
+		reg &= ~DWC3_GUSB2PHYCFG_ENBLSLPM;
+
 	if (dwc->usb2_phyif_utmi_width == 16) {
 		reg &= ~(DWC3_GUSB2PHYCFG_PHYIF_MASK |
 			DWC3_GUSB2PHYCFG_USBTRDTIM_MASK);
@@ -995,6 +998,8 @@ void dwc3_of_parse(struct dwc3 *dwc)
 				"snps,dis_u3_susphy_quirk");
 	dwc->dis_u2_susphy_quirk = dev_read_bool(dev,
 				"snps,dis_u2_susphy_quirk");
+	dwc->dis_enblslpm_quirk = dev_read_bool(dev,
+				"snps,dis_enblslpm_quirk");
 	dwc->tx_de_emphasis_quirk = dev_read_bool(dev,
 				"snps,tx_de_emphasis_quirk");
 	tmp = dev_read_u8_array_ptr(dev, "snps,tx_de_emphasis", 1);
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index fc43f9682f..5acd3012bc 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -828,6 +828,7 @@ struct dwc3 {
 	unsigned		dis_u3_susphy_quirk:1;
 	unsigned		dis_u2_susphy_quirk:1;
 	unsigned		dis_u1u2_quirk:1;
+	unsigned		dis_enblslpm_quirk:1;
 
 	unsigned		tx_de_emphasis_quirk:1;
 	unsigned		tx_de_emphasis:2;

commit 989a41fcc400d10f41512010e99bcc3aced7d721
Author: Neil Armstrong <narmstrong@baylibre.com>
Date:   Tue Apr 17 11:30:22 2018 +0200

    UPSTREAM: reset: fix reset_get_bulk when phandle error
    
    This fixes the Coverity Defect CID 175348 when dev_count_phandle_with_args()
    returns a negative value.
    
    Change-Id: I3572567e0dce19548a970ecf4e446ff9b23b895f
    Fixes: 0c28233903b5 ("reset: Add get/assert/deassert/release for bulk of reset signals")
    Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 895a82ce90278130828b26c230da99331a33e729)

diff --git a/drivers/reset/reset-uclass.c b/drivers/reset/reset-uclass.c
index 9a5c9c91b9..fa4f6538ed 100644
--- a/drivers/reset/reset-uclass.c
+++ b/drivers/reset/reset-uclass.c
@@ -88,8 +88,8 @@ int reset_get_bulk(struct udevice *dev, struct reset_ctl_bulk *bulk)
 	bulk->count = 0;
 
 	count = dev_count_phandle_with_args(dev, "resets", "#reset-cells");
-	if (!count)
-		return 0;
+	if (count < 1)
+		return count;
 
 	bulk->resets = devm_kcalloc(dev, count, sizeof(struct reset_ctl),
 				    GFP_KERNEL);

commit 94fbbf0f6db608f9349f507ed0734ea9befc8ec3
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Fri Jul 5 09:33:57 2019 +0200

    UPSTREAM: dm: Add a No-op uclass
    
    This uclass is intended for devices that do not need any features from the
    uclass, including binding children.
    This will typically be used by devices that are used to bind child devices
    but do not use dm_scan_fdt_dev() to do it. That is for example the case of
    several USB wrappers that have 2 child devices (1 for device and 1 for
    host) but bind only one at a any given time.
    
    Change-Id: Iad9ba5f368bd2de9940cf069baf9bec9d668920c
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 07e33711fec4f1106f36805b5dc830da07c783c5)

diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index e67d428eb2..5e2f1bb95f 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -275,6 +275,18 @@
 		compatible = "sandbox,mmc";
 	};
 
+	nop-test_0 {
+		compatible = "sandbox,nop_sandbox1";
+		nop-test_1 {
+			compatible = "sandbox,nop_sandbox2";
+			bind = "True";
+		};
+		nop-test_2 {
+			compatible = "sandbox,nop_sandbox2";
+			bind = "False";
+		};
+	};
+
 	pci: pci-controller {
 		compatible = "sandbox,pci";
 		device_type = "pci";
diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c
index eaf1011ded..be7c8ddf1a 100644
--- a/drivers/core/uclass.c
+++ b/drivers/core/uclass.c
@@ -686,3 +686,8 @@ int uclass_pre_remove_device(struct udevice *dev)
 	return 0;
 }
 #endif
+
+UCLASS_DRIVER(nop) = {
+	.id		= UCLASS_NOP,
+	.name		= "nop",
+};
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 8b64046a07..aa016578f0 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -55,6 +55,7 @@ enum uclass_id {
 	UCLASS_MMC,		/* SD / MMC card or chip */
 	UCLASS_MOD_EXP,		/* RSA Mod Exp device */
 	UCLASS_MTD,		/* Memory Technology Device (MTD) device */
+	UCLASS_NOP,		/* No-op devices */
 	UCLASS_NORTHBRIDGE,	/* Intel Northbridge / SDRAM controller */
 	UCLASS_NVME,		/* NVM Express device */
 	UCLASS_PANEL,		/* Display panel, such as an LCD */
diff --git a/test/dm/Makefile b/test/dm/Makefile
index 513c4561ad..ef4f134444 100644
--- a/test/dm/Makefile
+++ b/test/dm/Makefile
@@ -6,6 +6,7 @@
 
 obj-$(CONFIG_CMD_DM) += cmd_dm.o
 obj-$(CONFIG_UT_DM) += bus.o
+obj-$(CONFIG_UT_DM) += nop.o
 obj-$(CONFIG_UT_DM) += test-driver.o
 obj-$(CONFIG_UT_DM) += test-fdt.o
 obj-$(CONFIG_UT_DM) += test-main.o
diff --git a/test/dm/nop.c b/test/dm/nop.c
new file mode 100644
index 0000000000..2df29f3d15
--- /dev/null
+++ b/test/dm/nop.c
@@ -0,0 +1,73 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Test for the NOP uclass
+ *
+ * (C) Copyright 2019 - Texas Instruments Incorporated - http://www.ti.com/
+ * Jean-Jacques Hiblot <jjhiblot@ti.com>
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/ofnode.h>
+#include <dm/lists.h>
+#include <dm/device.h>
+#include <dm/test.h>
+#include <misc.h>
+#include <test/ut.h>
+
+static int noptest_bind(struct udevice *parent)
+{
+	ofnode ofnode = dev_read_first_subnode(parent);
+
+	while (ofnode_valid(ofnode)) {
+		struct udevice *dev;
+		const char *bind_flag = ofnode_read_string(ofnode, "bind");
+
+		if (bind_flag && (strcmp(bind_flag, "True") == 0))
+			lists_bind_fdt(parent, ofnode, &dev, false);
+		ofnode = dev_read_next_subnode(ofnode);
+	}
+
+	return 0;
+}
+
+static const struct udevice_id noptest1_ids[] = {
+	{
+		.compatible = "sandbox,nop_sandbox1",
+	},
+	{ }
+};
+
+U_BOOT_DRIVER(noptest_drv1) = {
+	.name	= "noptest1_drv",
+	.of_match	= noptest1_ids,
+	.id	= UCLASS_NOP,
+	.bind = noptest_bind,
+};
+
+static const struct udevice_id noptest2_ids[] = {
+	{
+		.compatible = "sandbox,nop_sandbox2",
+	},
+	{ }
+};
+
+U_BOOT_DRIVER(noptest_drv2) = {
+	.name	= "noptest2_drv",
+	.of_match	= noptest2_ids,
+	.id	= UCLASS_NOP,
+};
+
+static int dm_test_nop(struct unit_test_state *uts)
+{
+	struct udevice *dev;
+
+	ut_assertok(uclass_get_device_by_name(UCLASS_NOP, "nop-test_0", &dev));
+	ut_assertok(uclass_get_device_by_name(UCLASS_NOP, "nop-test_1", &dev));
+	ut_asserteq(-ENODEV,
+		    uclass_get_device_by_name(UCLASS_NOP, "nop-test_2", &dev));
+
+	return 0;
+}
+
+DM_TEST(dm_test_nop, DM_TESTF_FLAT_TREE | DM_TESTF_SCAN_FDT);

commit f96f01225f85d02ef9a6b1d2d4f0d9a835acb3e3
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Thu Feb 27 11:16:28 2020 +0800

    clk: rockchip: rv1126: Add support restore emmc/sfc/nandc frequency
    
    Change-Id: Iaa62eead12156d284a6ee315dfbaf92e786a0920
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rv1126.c b/drivers/clk/rockchip/clk_rv1126.c
index 2fae944453..5a3bd08f6c 100644
--- a/drivers/clk/rockchip/clk_rv1126.c
+++ b/drivers/clk/rockchip/clk_rv1126.c
@@ -93,6 +93,9 @@ static const struct rv1126_clk_info clks_dump[] = {
 };
 #endif
 
+static ulong rv1126_gpll_set_rate(struct rv1126_clk_priv *priv,
+				  struct rv1126_pmuclk_priv *pmu_priv,
+				  ulong rate);
 /*
  *
  * rational_best_approximation(31415, 10000,
@@ -150,20 +153,26 @@ static ulong rv1126_gpll_get_pmuclk(struct rv1126_pmuclk_priv *priv)
 				     priv->pmucru, GPLL);
 }
 
-static ulong rv1126_gpll_set_pmuclk(struct rv1126_pmuclk_priv *priv, ulong rate)
+static ulong rv1126_gpll_set_pmuclk(struct rv1126_pmuclk_priv *pmu_priv, ulong rate)
 {
+	struct udevice *cru_dev;
+	struct rv1126_clk_priv *priv;
 	int ret;
 
-	/*
-	 * the child div is big enough for gpll 1188MHz,
-	 * even maskrom has change some clocks.
-	 */
-	ret = rockchip_pll_set_rate(&rv1126_pll_clks[GPLL],
-				    priv->pmucru, GPLL, rate);
-	if (!ret)
-		priv->gpll_hz = rate;
+	ret = uclass_get_device_by_driver(UCLASS_CLK,
+					  DM_GET_DRIVER(rockchip_rv1126_cru),
+					  &cru_dev);
+	if (ret) {
+		printf("%s: could not find cru device\n", __func__);
+		return ret;
+	}
+	priv = dev_get_priv(cru_dev);
 
-	return ret;
+	if (rv1126_gpll_set_rate(priv, pmu_priv, rate)) {
+		printf("%s: failed to set gpll rate %lu\n", __func__, rate);
+		return -EINVAL;
+	}
+	return 0;
 }
 
 static ulong rv1126_rtc32k_get_pmuclk(struct rv1126_pmuclk_priv *priv)
@@ -1025,7 +1034,7 @@ static ulong rv1126_mmc_get_clk(struct rv1126_clk_priv *priv, ulong clk_id)
 	return -ENOENT;
 }
 
-static ulong rv1126_emmc_set_clk(struct rv1126_clk_priv *priv, ulong clk_id,
+static ulong rv1126_mmc_set_clk(struct rv1126_clk_priv *priv, ulong clk_id,
 				 ulong rate)
 {
 	struct rv1126_cru *cru = priv->cru;
@@ -1377,7 +1386,7 @@ static ulong rv1126_clk_set_rate(struct clk *clk, ulong rate)
 	case HCLK_SDIO:
 	case CLK_EMMC:
 	case HCLK_EMMC:
-		ret = rv1126_emmc_set_clk(priv, clk->id, rate);
+		ret = rv1126_mmc_set_clk(priv, clk->id, rate);
 		break;
 	case SCLK_SFC:
 		ret = rv1126_sfc_set_clk(priv, rate);
@@ -1599,10 +1608,40 @@ static struct clk_ops rv1126_clk_ops = {
 #endif
 };
 
-static int rv1126_gpll_set_clk(ulong rate)
+static ulong rv1126_gpll_set_rate(struct rv1126_clk_priv *priv,
+				  struct rv1126_pmuclk_priv *pmu_priv,
+				  ulong rate)
+{
+	ulong emmc_rate, sfc_rate, nandc_rate;
+	int ret;
+
+	emmc_rate = rv1126_mmc_get_clk(priv, CLK_EMMC);
+	sfc_rate = rv1126_sfc_get_clk(priv);
+	nandc_rate = rv1126_nand_get_clk(priv);
+	debug("%s emmc=%lu, sdmmc=%lu, nandc=%lu\n", __func__,
+	      emmc_rate, sfc_rate, nandc_rate);
+
+	/*
+	 * the child div is big enough for gpll 1188MHz,
+	 * even maskrom has change some clocks.
+	 */
+	if (rockchip_pll_set_rate(&rv1126_pll_clks[GPLL],
+				  pmu_priv->pmucru, GPLL, rate))
+		return -EINVAL;
+	pmu_priv->gpll_hz = rate;
+	priv->gpll_hz = rate;
+
+	rv1126_mmc_set_clk(priv, CLK_EMMC, emmc_rate);
+	rv1126_sfc_set_clk(priv,  sfc_rate);
+	rv1126_nand_set_clk(priv, nandc_rate);
+
+	return ret;
+}
+
+static int rv1126_gpll_set_clk(struct rv1126_clk_priv *priv, ulong rate)
 {
 	struct udevice *pmucru_dev;
-	struct rv1126_pmuclk_priv *priv;
+	struct rv1126_pmuclk_priv *pmu_priv;
 	int ret;
 
 	ret = uclass_get_device_by_driver(UCLASS_CLK,
@@ -1612,16 +1651,16 @@ static int rv1126_gpll_set_clk(ulong rate)
 		printf("%s: could not find pmucru device\n", __func__);
 		return ret;
 	}
-	priv = dev_get_priv(pmucru_dev);
+	pmu_priv = dev_get_priv(pmucru_dev);
 
-	ret = rv1126_gpll_set_pmuclk(priv, rate);
-	if (ret) {
+	if (rv1126_gpll_set_rate(priv, pmu_priv, rate)) {
 		printf("%s: failed to set gpll rate %lu\n", __func__, rate);
-		return ret;
+		return -EINVAL;
 	}
-	rv1126_pdpmu_set_pmuclk(priv, PCLK_PDPMU_HZ);
 
-	return ret;
+	rv1126_pdpmu_set_pmuclk(pmu_priv, PCLK_PDPMU_HZ);
+
+	return 0;
 }
 
 static void rv1126_clk_init(struct rv1126_clk_priv *priv)
@@ -1641,11 +1680,9 @@ static void rv1126_clk_init(struct rv1126_clk_priv *priv)
 		if (!ret)
 			priv->armclk_init_hz = APLL_HZ;
 	}
-	if (priv->gpll_hz != GPLL_HZ) {
-		ret = rv1126_gpll_set_clk(GPLL_HZ);
-		if (!ret)
-			priv->gpll_hz = GPLL_HZ;
-	}
+	if (priv->gpll_hz != GPLL_HZ)
+		rv1126_gpll_set_clk(priv, GPLL_HZ);
+
 	if (priv->cpll_hz != CPLL_HZ) {
 		ret = rockchip_pll_set_rate(&rv1126_pll_clks[CPLL], priv->cru,
 					    CPLL, CPLL_HZ);

commit 57ae0852b10b188fe3abde04f2df195f9793e086
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Wed Feb 26 17:56:13 2020 +0800

    clk: rockchip: rv1126: Add support for sfc and nandc
    
    Change-Id: Ifb6873bf417adaaf95703064deeaed54b890b20b
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rv1126.h b/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
index 2984dfb28c..7f434eb053 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
@@ -313,6 +313,22 @@ enum {
 	EMMC_DIV_SHIFT	= 0,
 	EMMC_DIV_MASK	= 0xff,
 
+	/* CRU_CLK_SEL58_CON */
+	SCLK_SFC_SEL_SHIFT	= 15,
+	SCLK_SFC_SEL_MASK	= 0x1 << SCLK_SFC_SEL_SHIFT,
+	SCLK_SFC_SEL_CPLL	= 0,
+	SCLK_SFC_SEL_GPLL,
+	SCLK_SFC_DIV_SHIFT	= 0,
+	SCLK_SFC_DIV_MASK	= 0xff,
+
+	/* CRU_CLK_SEL59_CON */
+	CLK_NANDC_SEL_SHIFT	= 15,
+	CLK_NANDC_SEL_MASK	= 0x1 << CLK_NANDC_SEL_SHIFT,
+	CLK_NANDC_SEL_GPLL	= 0,
+	CLK_NANDC_SEL_CPLL,
+	CLK_NANDC_DIV_SHIFT	= 0,
+	CLK_NANDC_DIV_MASK	= 0xff,
+
 	/* CRU_GMAC_CON */
 	GMAC_SRC_M1_SEL_SHIFT	= 5,
 	GMAC_SRC_M1_SEL_MASK	= 0x1 << GMAC_SRC_M1_SEL_SHIFT,
diff --git a/drivers/clk/rockchip/clk_rv1126.c b/drivers/clk/rockchip/clk_rv1126.c
index 60c06168e5..2fae944453 100644
--- a/drivers/clk/rockchip/clk_rv1126.c
+++ b/drivers/clk/rockchip/clk_rv1126.c
@@ -1070,6 +1070,70 @@ static ulong rv1126_emmc_set_clk(struct rv1126_clk_priv *priv, ulong clk_id,
 	return rv1126_mmc_get_clk(priv, clk_id);
 }
 
+static ulong rv1126_sfc_get_clk(struct rv1126_clk_priv *priv)
+{
+	struct rv1126_cru *cru = priv->cru;
+	u32 div, sel, con, parent;
+
+	con = readl(&cru->clksel_con[58]);
+	div = (con & SCLK_SFC_DIV_MASK) >> SCLK_SFC_DIV_SHIFT;
+	sel = (con & SCLK_SFC_SEL_MASK) >> SCLK_SFC_SEL_SHIFT;
+	if (sel == SCLK_SFC_SEL_GPLL)
+		parent = priv->gpll_hz;
+	else if (sel == SCLK_SFC_SEL_CPLL)
+		parent = priv->cpll_hz;
+	else
+		return -ENOENT;
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rv1126_sfc_set_clk(struct rv1126_clk_priv *priv, ulong rate)
+{
+	struct rv1126_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);
+	rk_clrsetreg(&cru->clksel_con[58],
+		     SCLK_SFC_SEL_MASK | SCLK_SFC_DIV_MASK,
+		     SCLK_SFC_SEL_GPLL << SCLK_SFC_SEL_SHIFT |
+		     (src_clk_div - 1) << SCLK_SFC_DIV_SHIFT);
+
+	return rv1126_sfc_get_clk(priv);
+}
+
+static ulong rv1126_nand_get_clk(struct rv1126_clk_priv *priv)
+{
+	struct rv1126_cru *cru = priv->cru;
+	u32 div, sel, con, parent;
+
+	con = readl(&cru->clksel_con[59]);
+	div = (con & CLK_NANDC_DIV_MASK) >> CLK_NANDC_DIV_SHIFT;
+	sel = (con & CLK_NANDC_SEL_MASK) >> CLK_NANDC_SEL_SHIFT;
+	if (sel == CLK_NANDC_SEL_GPLL)
+		parent = priv->gpll_hz;
+	else if (sel == CLK_NANDC_SEL_CPLL)
+		parent = priv->cpll_hz;
+	else
+		return -ENOENT;
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rv1126_nand_set_clk(struct rv1126_clk_priv *priv, ulong rate)
+{
+	struct rv1126_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);
+	rk_clrsetreg(&cru->clksel_con[59],
+		     CLK_NANDC_SEL_MASK | CLK_NANDC_DIV_MASK,
+		     CLK_NANDC_SEL_GPLL << CLK_NANDC_SEL_SHIFT |
+		     (src_clk_div - 1) << CLK_NANDC_DIV_SHIFT);
+
+	return rv1126_nand_get_clk(priv);
+}
+
 static ulong rv1126_aclk_vop_get_clk(struct rv1126_clk_priv *priv)
 {
 	struct rv1126_cru *cru = priv->cru;
@@ -1231,6 +1295,12 @@ static ulong rv1126_clk_get_rate(struct clk *clk)
 	case SCLK_EMMC_SAMPLE:
 		rate = rv1126_mmc_get_clk(priv, clk->id);
 		break;
+	case SCLK_SFC:
+		rate = rv1126_sfc_get_clk(priv);
+		break;
+	case CLK_NANDC:
+		rate = rv1126_nand_get_clk(priv);
+		break;
 	case ACLK_PDVO:
 	case ACLK_VOP:
 		rate = rv1126_aclk_vop_get_clk(priv);
@@ -1309,6 +1379,12 @@ static ulong rv1126_clk_set_rate(struct clk *clk, ulong rate)
 	case HCLK_EMMC:
 		ret = rv1126_emmc_set_clk(priv, clk->id, rate);
 		break;
+	case SCLK_SFC:
+		ret = rv1126_sfc_set_clk(priv, rate);
+		break;
+	case CLK_NANDC:
+		ret = rv1126_nand_set_clk(priv, rate);
+		break;
 	case ACLK_PDVO:
 	case ACLK_VOP:
 		ret = rv1126_aclk_vop_set_clk(priv, rate);

commit ba2ff15a2ad5ad4fd461d2230fc736a338072dcb
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Wed Feb 26 17:02:53 2020 +0800

    clk: rockchip: rv1126: Fix usb clock name
    
    Change-Id: I1a26d7093a0c3dfb32c90d0dabfdce7d0ea77dc7
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/include/dt-bindings/clock/rv1126-cru.h b/include/dt-bindings/clock/rv1126-cru.h
index 3acf8068ed..b0fd0fb5c9 100644
--- a/include/dt-bindings/clock/rv1126-cru.h
+++ b/include/dt-bindings/clock/rv1126-cru.h
@@ -34,7 +34,7 @@
 #define CLK_PMUPVTM		20
 #define CLK_CORE_PMUPVTM	21
 #define CLK_REF12M		22
-#define CLK_USBPHY_OTP_REF	23
+#define CLK_USBPHY_OTG_REF	23
 #define CLK_USBPHY_HOST_REF	24
 #define CLK_REF24M		25
 #define CLK_MIPIDSIPHY_REF	26
@@ -576,8 +576,8 @@
 #define SRST_USBOTG_A		181
 #define SRST_USBPHY_OTG_P	182
 #define SRST_USBPHY_HOST_P	183
-#define SRST_USBPHYOR_OTG	184
-#define SRST_USBPHYOR_HOST	185
+#define SRST_USBPHYPOR_OTG	184
+#define SRST_USBPHYPOR_HOST	185
 #define SRST_PDGMAC_NIU_A	188
 #define SRST_PDGMAC_NIU_P	189
 #define SRST_MAC_PTPREF		190

commit 9bc02da530decca946233cc5f7dae5858469044c
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Mon Feb 24 10:02:02 2020 +0800

    clk: rockchip: px30: Restore sfc frequency after PLL frequency setting
    
    Change-Id: I261885b027c4c5ba6d94fb228fb04563cb4e0b0e
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index e3c73932f5..c215d35a26 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -587,6 +587,32 @@ static ulong px30_mmc_set_clk(struct px30_clk_priv *priv,
 	return px30_mmc_get_clk(priv, clk_id);
 }
 
+static ulong px30_sfc_get_clk(struct px30_clk_priv *priv, uint clk_id)
+{
+	struct px30_cru *cru = priv->cru;
+	u32 div, con;
+
+	con = readl(&cru->clksel_con[22]);
+	div = (con & SFC_DIV_CON_MASK) >> SFC_DIV_CON_SHIFT;
+
+	return DIV_TO_RATE(priv->gpll_hz, div);
+}
+
+static ulong px30_sfc_set_clk(struct px30_clk_priv *priv,
+			      ulong clk_id, ulong set_rate)
+{
+	struct px30_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, set_rate);
+	rk_clrsetreg(&cru->clksel_con[22],
+		     SFC_PLL_SEL_MASK | SFC_DIV_CON_MASK,
+		     0 << SFC_PLL_SEL_SHIFT |
+		     (src_clk_div - 1) << SFC_DIV_CON_SHIFT);
+
+	return px30_sfc_get_clk(priv, clk_id);
+}
+
 static ulong px30_pwm_get_clk(struct px30_clk_priv *priv, ulong clk_id)
 {
 	struct px30_cru *cru = priv->cru;
@@ -1215,6 +1241,9 @@ static ulong px30_clk_get_rate(struct clk *clk)
 	case SCLK_EMMC_SAMPLE:
 		rate = px30_mmc_get_clk(priv, clk->id);
 		break;
+	case SCLK_SFC:
+		rate = px30_sfc_get_clk(priv, clk->id);
+		break;
 	case SCLK_I2C0:
 	case SCLK_I2C1:
 	case SCLK_I2C2:
@@ -1293,6 +1322,9 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_EMMC:
 		ret = px30_mmc_set_clk(priv, clk->id, rate);
 		break;
+	case SCLK_SFC:
+		ret = px30_sfc_set_clk(priv, clk->id, rate);
+		break;
 	case SCLK_I2C0:
 	case SCLK_I2C1:
 	case SCLK_I2C2:
@@ -1651,7 +1683,7 @@ static ulong px30_gpll_set_pmuclk(struct px30_pmuclk_priv *priv, ulong hz)
 	struct px30_clk_priv *cru_priv;
 	struct px30_pmucru *pmucru = priv->pmucru;
 	u32 div;
-	ulong emmc_rate, sdmmc_rate, nandc_rate;
+	ulong emmc_rate, sdmmc_rate, nandc_rate, sfc_rate;
 	ulong aclk_bus_rate, hclk_bus_rate, pclk_bus_rate;
 	ulong aclk_peri_rate, hclk_peri_rate, pclk_pmu_rate;
 	int ret;
@@ -1685,8 +1717,9 @@ static ulong px30_gpll_set_pmuclk(struct px30_pmuclk_priv *priv, ulong hz)
 	emmc_rate = px30_mmc_get_clk(cru_priv, SCLK_EMMC);
 	sdmmc_rate = px30_mmc_get_clk(cru_priv, SCLK_SDMMC);
 	nandc_rate = px30_nandc_get_clk(cru_priv);
-	debug("%s emmc=%lu, sdmmc=%lu, nandc=%lu\n", __func__,
-	      emmc_rate, sdmmc_rate, nandc_rate);
+	sfc_rate = px30_sfc_get_clk(cru_priv, SCLK_SFC);
+	debug("%s emmc=%lu, sdmmc=%lu, nandc=%lu sfc=%lu\n", __func__,
+	      emmc_rate, sdmmc_rate, nandc_rate, sfc_rate);
 
 	/* avoid rate too large, reduce rate first */
 	px30_bus_set_clk(cru_priv, ACLK_BUS_PRE, aclk_bus_rate / div);
@@ -1699,6 +1732,7 @@ static ulong px30_gpll_set_pmuclk(struct px30_pmuclk_priv *priv, ulong hz)
 	px30_mmc_set_clk(cru_priv, SCLK_EMMC, emmc_rate / div);
 	px30_mmc_set_clk(cru_priv, SCLK_SDMMC, sdmmc_rate / div);
 	px30_nandc_set_clk(cru_priv, nandc_rate / div);
+	px30_sfc_set_clk(cru_priv, SCLK_SFC, sfc_rate / div);
 
 	/* change gpll rate */
 	rkclk_set_pll(&pmucru->pll, &pmucru->pmu_mode, GPLL, hz);
@@ -1716,6 +1750,7 @@ static ulong px30_gpll_set_pmuclk(struct px30_pmuclk_priv *priv, ulong hz)
 	px30_mmc_set_clk(cru_priv, SCLK_EMMC, emmc_rate);
 	px30_mmc_set_clk(cru_priv, SCLK_SDMMC, sdmmc_rate);
 	px30_nandc_set_clk(cru_priv, nandc_rate);
+	px30_sfc_set_clk(cru_priv, SCLK_SFC, sfc_rate);
 
 	return priv->gpll_hz;
 }

commit fc722856eb876f8f3ebc34d0205e99624b39d691
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Feb 23 12:05:32 2020 +0800

    common: board_r: add minimum nowhere env for board init.
    
    Storage env or kernel dtb load depends on bootdev, while bootdev
    depends on env varname: devtype, devnum and rkimg_bootdev, etc.
    So we have to use nowhere env firstly and cover the storage env
    after it is loaded.
    
    Providing a minimum and necessary nowhere env for board init to
    avoid covering the other varnames in storage env.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I8362c24376e7530f15335f26197a7cddbcae579c

diff --git a/common/board_r.c b/common/board_r.c
index 691b472946..e9d65fb3e3 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -493,23 +493,51 @@ static int initr_env(void)
 #endif
 
 #ifdef CONFIG_USING_KERNEL_DTB
+/*
+ * If !defined(CONFIG_ENV_IS_NOWHERE):
+ *
+ * Storage env or kernel dtb load depends on bootdev, while bootdev
+ * depends on env varname: devtype, devnum and rkimg_bootdev, etc.
+ * So we have to use nowhere env firstly and cover the storage env
+ * after it is loaded.
+ *
+ * Providing a minimum and necessary nowhere env for board init to
+ * avoid covering the other varnames in storage env.
+ */
 static int initr_env_nowhere(void)
 {
-#if defined(CONFIG_NEEDS_MANUAL_RELOC)
-	env_reloc();
-	env_htab.change_ok += gd->reloc_off;
-#endif
+#ifdef CONFIG_ENV_IS_NOWHERE
 	set_default_env(NULL);
-
 	return 0;
+#else
+	const char env_minimum[] = {
+		ENV_MEM_LAYOUT_SETTINGS
+#ifdef RKIMG_DET_BOOTDEV
+		RKIMG_DET_BOOTDEV
+#endif
+	};
+
+	return set_board_env((char *)env_minimum, ENV_SIZE, 0, true);
+#endif
 }
 
 #if !defined(CONFIG_ENV_IS_NOWHERE)
+/*
+ * storage has been initialized in board_init(), we could switch env
+ * from nowhere to storage, i.e. CONFIG_ENV_IS_IN_xxx=y.
+ */
 static int initr_env_switch(void)
 {
 	ALLOC_CACHE_ALIGN_BUFFER(env_t, env_nowhere, 1);
+	char *data;
 	int ret;
 
+	data = env_get("bootargs");
+	if (data) {
+		env_set("bootargs_tmp", data);
+		env_set("bootargs", NULL);
+	}
+
 	/* Export nowhere env for late use */
 	ret = env_export(env_nowhere);
 	if (ret) {
@@ -521,8 +549,19 @@ static int initr_env_switch(void)
 	initr_env();
 
 	/* Append/override nowhere env to storage env */
-	himport_r(&env_htab, (char *)env_nowhere->data, ENV_SIZE, '\0',
-		  H_NOCLEAR, 0, 0, NULL);
+	set_board_env((char *)env_nowhere->data, ENV_SIZE, H_NOCLEAR, false);
+
+	/*
+	 * Restore nowhere bootargs to append/override the one in env storage.
+	 *
+	 * Without this, the entire "bootargs" in storage env is replaces by
+	 * the one in env_nowhere->data.
+	 */
+	data = env_get("bootargs_tmp");
+	if (data) {
+		env_update("bootargs", data);
+		env_set("bootargs_tmp", NULL);
+	}
 
 	return 0;
 }
@@ -800,10 +839,6 @@ static init_fnc_t init_sequence_r[] = {
 	initr_dm,
 #endif
 
-/*
- * kernel dtb must depends on nowhere to detect boot storage media
- * and initialize it.
- */
 #ifdef CONFIG_USING_KERNEL_DTB
 	initr_env_nowhere,
 #endif
@@ -815,10 +850,6 @@ static init_fnc_t init_sequence_r[] = {
 	board_init,	/* Setup chipselects */
 #endif
 
-/*
- * Now that storage has been initialized in board_init(), we could switch env
- * from nowhere to storage, i.e. CONFIG_ENV_IS_IN_xxx=y.
- */
 #if defined(CONFIG_USING_KERNEL_DTB) && !defined(CONFIG_ENV_IS_NOWHERE)
 	initr_env_switch,
 #endif

commit 14569d26731af93622d8fcf87429b06ece85047b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Feb 23 12:05:18 2020 +0800

    env: add board env set api
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ib8f2b18349cf4f99b182dbdb409c6a2f7820a028

diff --git a/env/common.c b/env/common.c
index 1c75fd3133..d477e4e664 100644
--- a/env/common.c
+++ b/env/common.c
@@ -107,6 +107,22 @@ int set_default_vars(int nvars, char * const vars[])
 				H_NOCLEAR | H_INTERACTIVE, 0, nvars, vars);
 }
 
+int set_board_env(const char *vars, int size, int flags, bool ready)
+{
+	if (himport_r(&env_htab, (char *)vars, size, '\0',
+		      flags, 0, 0, NULL) == 0) {
+		pr_err("Environment import failed\n");
+		return -1;
+	}
+
+	if (ready) {
+		gd->flags |= GD_FLG_ENV_READY;
+		gd->flags |= GD_FLG_ENV_DEFAULT;
+	}
+
+	return 0;
+}
+
 #ifdef CONFIG_ENV_AES
 #include <uboot_aes.h>
 /**
diff --git a/include/environment.h b/include/environment.h
index e328ac22fb..c2aa553c71 100644
--- a/include/environment.h
+++ b/include/environment.h
@@ -289,6 +289,9 @@ char *env_get_default(const char *name);
 /* [re]set to the default environment */
 void set_default_env(const char *s);
 
+/* [re]set to the board environment */
+int set_board_env(const char *vars, int size, int flags, bool ready);
+
 /* [re]set individual variables to their value in the default environment */
 int set_default_vars(int nvars, char * const vars[]);
 

commit c6f0e819657b70067f480aff21aa7214b8711018
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Feb 23 12:03:06 2020 +0800

    rockchip: board: add env fixup
    
    It was called from set_env_default() which only handles
    nowhere env, let's move it to board late to handle all
    env types.
    
    Fix fdt address earlier before init kernel dtb.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I1e60355eef7897b7e92c7652c60a3c72350e46b0

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 2709d85b4c..1d34fd2d6f 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -197,6 +197,49 @@ static int boot_from_udisk(void)
 }
 #endif
 
+static void env_fixup(void)
+{
+	struct memblock mem;
+	ulong u_addr_r;
+	phys_size_t end;
+	char *addr_r;
+
+#ifdef ENV_MEM_LAYOUT_SETTINGS1
+	const char *env_addr0[] = {
+		"scriptaddr", "pxefile_addr_r",
+		"fdt_addr_r", "kernel_addr_r", "ramdisk_addr_r",
+	};
+	const char *env_addr1[] = {
+		"scriptaddr1", "pxefile_addr1_r",
+		"fdt_addr1_r", "kernel_addr1_r", "ramdisk_addr1_r",
+	};
+	int i;
+
+	/* 128M is a typical ram size for most platform, so as default here */
+	if (gd->ram_size <= SZ_128M) {
+		/* Replace orignal xxx_addr_r */
+		for (i = 0; i < ARRAY_SIZE(env_addr1); i++) {
+			addr_r = env_get(env_addr1[i]);
+			if (addr_r)
+				env_set(env_addr0[i], addr_r);
+		}
+	}
+#endif
+	/* If bl32 is disabled, maybe kernel can be load to lower address. */
+	if (!(gd->flags & GD_FLG_BL32_ENABLED)) {
+		addr_r = env_get("kernel_addr_no_bl32_r");
+		if (addr_r)
+			env_set("kernel_addr_r", addr_r);
+	/* If bl32 is enlarged, we move ramdisk addr right behind it */
+	} else {
+		mem = param_parse_optee_mem();
+		end = mem.base + mem.size;
+		u_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0);
+		if (u_addr_r >= mem.base && u_addr_r < end)
+			env_set_hex("ramdisk_addr_r", end);
+	}
+}
+
 static void cmdline_handle(void)
 {
 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
@@ -230,6 +273,7 @@ int board_late_init(void)
 #ifdef CONFIG_DRM_ROCKCHIP
 	rockchip_show_logo();
 #endif
+	env_fixup();
 	soc_clk_dump();
 	cmdline_handle();
 
@@ -441,12 +485,27 @@ static int mmc_dm_reinit(void)
 	return 0;
 }
 
+static void env_fixup_fdt_addr(void)
+{
+#ifdef ENV_MEM_LAYOUT_SETTINGS1
+	char *addr_r;
+
+	if (gd->ram_size <= SZ_128M) {
+		addr_r = env_get("fdt_addr1_r");
+		if (addr_r)
+			env_set("fdt_addr_r", addr_r);
+	}
+#endif
+}
+
 int init_kernel_dtb(void)
 {
 	ulong fdt_addr;
 	void *ufdt_blob;
 	int ret;
 
+	env_fixup_fdt_addr();
+
 	fdt_addr = env_get_ulong("fdt_addr_r", 16, 0);
 	if (!fdt_addr) {
 		printf("No Found FDT Load Address.\n");
@@ -503,49 +562,6 @@ int init_kernel_dtb(void)
 }
 #endif
 
-void board_env_fixup(void)
-{
-	struct memblock mem;
-	ulong u_addr_r;
-	phys_size_t end;
-	char *addr_r;
-
-#ifdef ENV_MEM_LAYOUT_SETTINGS1
-	const char *env_addr0[] = {
-		"scriptaddr", "pxefile_addr_r",
-		"fdt_addr_r", "kernel_addr_r", "ramdisk_addr_r",
-	};
-	const char *env_addr1[] = {
-		"scriptaddr1", "pxefile_addr1_r",
-		"fdt_addr1_r", "kernel_addr1_r", "ramdisk_addr1_r",
-	};
-	int i;
-
-	/* 128M is a typical ram size for most platform, so as default here */
-	if (gd->ram_size <= SZ_128M) {
-		/* Replace orignal xxx_addr_r */
-		for (i = 0; i < ARRAY_SIZE(env_addr1); i++) {
-			addr_r = env_get(env_addr1[i]);
-			if (addr_r)
-				env_set(env_addr0[i], addr_r);
-		}
-	}
-#endif
-	/* If bl32 is disabled, maybe kernel can be load to lower address. */
-	if (!(gd->flags & GD_FLG_BL32_ENABLED)) {
-		addr_r = env_get("kernel_addr_no_bl32_r");
-		if (addr_r)
-			env_set("kernel_addr_r", addr_r);
-	/* If bl32 is enlarged, we move ramdisk addr right behind it */
-	} else {
-		mem = param_parse_optee_mem();
-		end = mem.base + mem.size;
-		u_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0);
-		if (u_addr_r >= mem.base && u_addr_r < end)
-			env_set_hex("ramdisk_addr_r", end);
-	}
-}
-
 static void early_download(void)
 {
 #if defined(CONFIG_PWRKEY_DNL_TRIGGER_NUM) && \

commit f116e38908053e80551d5454b77c890469008adf
Author: Lin Huang <hl@rock-chips.com>
Date:   Mon Feb 24 18:16:11 2020 +0800

    configs: rk1808/rk1806: add SPL relate config
    
    with these config, rk1808/rk1806 support SPL boot kernel.
    
    Change-Id: I8efcb93d03d12adbefbe7b16dd1f25ee8d4fb0ee
    Signed-off-by: Lin Huang <hl@rock-chips.com>

diff --git a/configs/rk1806_defconfig b/configs/rk1806_defconfig
index 5bda9781f7..f5791e4a82 100644
--- a/configs/rk1806_defconfig
+++ b/configs/rk1806_defconfig
@@ -33,6 +33,9 @@ CONFIG_SPL_SEPARATE_BSS=y
 CONFIG_SPL_RELOC_TEXT_BASE=0x3001000
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_SPL_LOAD_RKFW=y
+CONFIG_RKFW_U_BOOT_SECTOR=0xa000
+CONFIG_SPL_KERNEL_BOOT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x00800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
@@ -60,6 +63,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_ISO_PARTITION is not set
 CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
+CONFIG_SPL_DTB_MINIMUM=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_REGMAP=y
diff --git a/configs/rk1808_defconfig b/configs/rk1808_defconfig
index 3b7b988b22..fd55883bd7 100644
--- a/configs/rk1808_defconfig
+++ b/configs/rk1808_defconfig
@@ -32,6 +32,9 @@ CONFIG_SPL_SEPARATE_BSS=y
 CONFIG_SPL_RELOC_TEXT_BASE=0x3001000
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_SPL_LOAD_RKFW=y
+CONFIG_RKFW_U_BOOT_SECTOR=0xa000
+CONFIG_SPL_KERNEL_BOOT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x00800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
@@ -59,6 +62,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_ISO_PARTITION is not set
 CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
+CONFIG_SPL_DTB_MINIMUM=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_REGMAP=y

commit 3a07c42d8391727285d166e4608f2e39a73824fd
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Dec 18 12:02:50 2019 +0800

    rockchip: dts: rk1808: support eMMC hs200
    
    Change-Id: I759d5c711887966e732216719c557da804105c15
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/dts/rk1808-evb.dts b/arch/arm/dts/rk1808-evb.dts
index 59d004b6d7..933c678ff1 100644
--- a/arch/arm/dts/rk1808-evb.dts
+++ b/arch/arm/dts/rk1808-evb.dts
@@ -48,6 +48,7 @@
 	fifo-mode;
 	bus-width = <8>;
 	cap-mmc-highspeed;
+	mmc-hs200-1_8v;
 	supports-emmc;
 	disable-wp;
 	non-removable;

commit 1a0c3c4ddd5c97ff2f7160660c9ef4d7cb7fbe92
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Feb 24 15:05:03 2020 +0800

    mmc: dw_mmc: implement the function board_mmc_dm_reinit
    
    Change-Id: I18409bd6857d3bc8f4268a78593b23b3e19e744f
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index fdd49294e6..d2a4d2c741 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -37,6 +37,21 @@ struct rockchip_dwmmc_priv {
 	u32 minmax[2];
 };
 
+#ifdef CONFIG_USING_KERNEL_DTB
+int board_mmc_dm_reinit(struct udevice *dev)
+{
+	struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
+
+	if (!priv || !&priv->clk)
+		return 0;
+
+	if (!memcmp(dev->name, "dwmmc", strlen("dwmmc")))
+		return clk_get_by_index(dev, 0, &priv->clk);
+	else
+		return 0;
+}
+#endif
+
 #ifdef CONFIG_SPL_BUILD
 __weak void mmc_gpio_init_direct(void) {}
 #endif

commit c2fb06de2957cfa5a9097d636f3d715a6a192533
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Fri Feb 21 16:13:24 2020 +0800

    clk: rockchip: rk1808: Restore mmc/sfc frequency after PLL frequency setting
    
    Change-Id: I14d0f9c41c45253de3a71b7c3d3fdae89ddf9952
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk1808.c b/drivers/clk/rockchip/clk_rk1808.c
index 2db2de51de..a0f2d95fc2 100644
--- a/drivers/clk/rockchip/clk_rk1808.c
+++ b/drivers/clk/rockchip/clk_rk1808.c
@@ -265,6 +265,32 @@ static ulong rk1808_mmc_set_clk(struct rk1808_clk_priv *priv,
 	return rk1808_mmc_get_clk(priv, clk_id);
 }
 
+static ulong rk1808_sfc_get_clk(struct rk1808_clk_priv *priv, uint clk_id)
+{
+	struct rk1808_cru *cru = priv->cru;
+	u32 div, con;
+
+	con = readl(&cru->clksel_con[26]);
+	div = (con & SFC_DIV_CON_MASK) >> SFC_DIV_CON_SHIFT;
+
+	return DIV_TO_RATE(priv->gpll_hz, div);
+}
+
+static ulong rk1808_sfc_set_clk(struct rk1808_clk_priv *priv,
+				ulong clk_id, ulong set_rate)
+{
+	struct rk1808_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, set_rate);
+	rk_clrsetreg(&cru->clksel_con[26],
+		     SFC_PLL_SEL_MASK | SFC_DIV_CON_MASK,
+		     0 << SFC_PLL_SEL_SHIFT |
+		     (src_clk_div - 1) << SFC_DIV_CON_SHIFT);
+
+	return rk1808_sfc_get_clk(priv, clk_id);
+}
+
 #ifndef CONFIG_SPL_BUILD
 static ulong rk1808_pwm_get_clk(struct rk1808_clk_priv *priv, ulong clk_id)
 {
@@ -906,6 +932,9 @@ static ulong rk1808_clk_get_rate(struct clk *clk)
 	case SCLK_SDIO:
 		rate = rk1808_mmc_get_clk(priv, clk->id);
 		break;
+	case SCLK_SFC:
+		rate = rk1808_sfc_get_clk(priv, clk->id);
+		break;
 #ifndef CONFIG_SPL_BUILD
 	case SCLK_PMU_I2C0:
 	case SCLK_I2C1:
@@ -1007,6 +1036,9 @@ static ulong rk1808_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_SDIO:
 		ret = rk1808_mmc_set_clk(priv, clk->id, rate);
 		break;
+	case SCLK_SFC:
+		ret = rk1808_sfc_set_clk(priv, clk->id, rate);
+		break;
 #ifndef CONFIG_SPL_BUILD
 	case SCLK_PMU_I2C0:
 	case SCLK_I2C1:
@@ -1245,6 +1277,7 @@ static int rk1808_clk_probe(struct udevice *dev)
 	int ret;
 #ifndef CONFIG_SPL_BUILD
 	ulong crypto_rate, crypto_apk_rate;
+	ulong emmc_rate, sdmmc_rate, sfc_rate;
 #endif
 
 	priv->sync_kernel = false;
@@ -1282,6 +1315,9 @@ static int rk1808_clk_probe(struct udevice *dev)
 #ifndef CONFIG_SPL_BUILD
 	crypto_rate = rk1808_crypto_get_clk(priv, SCLK_CRYPTO);
 	crypto_apk_rate = rk1808_crypto_get_clk(priv, SCLK_CRYPTO_APK);
+	emmc_rate = rk1808_mmc_get_clk(priv, SCLK_EMMC);
+	sdmmc_rate = rk1808_mmc_get_clk(priv, SCLK_SDMMC);
+	sfc_rate = rk1808_sfc_get_clk(priv, SCLK_SFC);
 #endif
 
 	/* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
@@ -1294,6 +1330,9 @@ static int rk1808_clk_probe(struct udevice *dev)
 #ifndef CONFIG_SPL_BUILD
 	rk1808_crypto_set_clk(priv, SCLK_CRYPTO, crypto_rate);
 	rk1808_crypto_set_clk(priv, SCLK_CRYPTO_APK, crypto_apk_rate);
+	rk1808_mmc_set_clk(priv, SCLK_EMMC, emmc_rate);
+	rk1808_mmc_set_clk(priv, SCLK_SDMMC, sdmmc_rate);
+	rk1808_sfc_set_clk(priv, SCLK_SFC, sfc_rate);
 #endif
 
 	return 0;

commit 36e8ecdb69490a852b05486cb482e197823a3736
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Feb 13 16:25:19 2020 +0800

    rockchip: rk1808: set dram area unsecure in spl
    
    So that the mmc controller can read data to dram since the mmc
    controller is unsecure.
    
    Change-Id: Iaf8f5cebeacbc034eb129c6b52a702abdbd7fed3
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk1808/rk1808.c b/arch/arm/mach-rockchip/rk1808/rk1808.c
index 2a74d396ff..2f314d1a61 100644
--- a/arch/arm/mach-rockchip/rk1808/rk1808.c
+++ b/arch/arm/mach-rockchip/rk1808/rk1808.c
@@ -65,12 +65,19 @@ enum {
 	UART2_IO_SEL_USB,
 };
 
+#define SECURE_FIRE_WALL 0xff590040
+
 int arch_cpu_init(void)
 {
 	/* Set cif qos priority */
 	writel(QOS_PRIORITY_LEVEL(2, 2), NIU_CIF_ADDR);
 	writel(QOS_PRIORITY_LEVEL(2, 2), NIU_ISP_ADDR);
 
+	/* Set dram to unsecure */
+#ifdef CONFIG_SPL_BUILD
+	writel(0, SECURE_FIRE_WALL);
+#endif
+
 	return 0;
 }
 

commit 2241fc0f8bcc202056be9c1556dad04d128094a4
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Feb 20 15:38:09 2020 +0800

    common: spl: rkfw: support resource file in spl
    
    Change-Id: I14d0afd6131cd523cd0218bb727b9a3b48397943
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/spl/spl_rkfw.c b/common/spl/spl_rkfw.c
index 833136440c..55c3529ea1 100644
--- a/common/spl/spl_rkfw.c
+++ b/common/spl/spl_rkfw.c
@@ -9,6 +9,7 @@
 #include <malloc.h>
 #include <spl_rkfw.h>
 #include <linux/kernel.h>
+#include <asm/arch/spl_resource_img.h>
 
 static const __aligned(16) struct s_fip_name_id fip_name_id[] = {
 	{ BL30_IMAGE_NAME, UUID_SCP_FIRMWARE_BL30 },		/* optional */
@@ -251,7 +252,7 @@ static int rkfw_load_kernel(struct spl_load_info *info, u32 image_sector,
 {
 	struct andr_img_hdr *hdr;
 	int ret, cnt;
-	int dtb_sector, ramdisk_sector;
+	int dtb_sector, ramdisk_sector, resource_sector;
 
 	cnt = ALIGN(sizeof(struct andr_img_hdr), 512) >> 9;
 	hdr = malloc(cnt * 512);
@@ -271,6 +272,8 @@ static int rkfw_load_kernel(struct spl_load_info *info, u32 image_sector,
 	}
 
 	ramdisk_sector = ALIGN(hdr->kernel_size, hdr->page_size);
+	resource_sector = ALIGN(hdr->kernel_size, hdr->page_size)
+			+ ALIGN(hdr->ramdisk_size, hdr->page_size);
 	dtb_sector = ALIGN(hdr->kernel_size, hdr->page_size)
 			+ ALIGN(hdr->ramdisk_size, hdr->page_size)
 			+ ALIGN(hdr->second_size, hdr->page_size);
@@ -295,14 +298,44 @@ static int rkfw_load_kernel(struct spl_load_info *info, u32 image_sector,
 		}
 	}
 
-	/* Load dtb image */
-	ret = info->read(info, (dtb_sector >> 9) + image_sector,
-			 ALIGN(hdr->dtb_size, hdr->page_size) >> 9,
-			 (void *)CONFIG_SPL_FDT_ADDR);
+	/* Load resource, and checkout the dtb */
+	if (hdr->second_size) {
+		struct resource_img_hdr *head =
+		   (struct resource_img_hdr *)(CONFIG_SPL_FDT_ADDR + 0x100000);
 
-	if (ret != (ALIGN(hdr->dtb_size, hdr->page_size) >> 9)) {
-		ret = -EIO;
-		goto out;
+		ret = info->read(info, (resource_sector >> 9) + image_sector,
+				 ALIGN(hdr->second_size, hdr->page_size) >> 9,
+				 (void *)head);
+		if (ret != (ALIGN(hdr->second_size, hdr->page_size) >> 9)) {
+			ret = -EIO;
+			goto out;
+		}
+
+		if (spl_resource_image_check_header(head)) {
+			printf("Can't find kernel dtb in spl.");
+		} else {
+			struct resource_entry *entry;
+			char *dtb_temp;
+
+			entry = spl_resource_image_get_dtb_entry(head);
+			if (!entry) {
+				ret = -EIO;
+				goto out;
+			}
+
+			dtb_temp = (char *)((char *)head + entry->f_offset * 512);
+			memcpy((char *)CONFIG_SPL_FDT_ADDR, dtb_temp,
+			       entry->f_size);
+		}
+	} else {
+		/* Load dtb image */
+		ret = info->read(info, (dtb_sector >> 9) + image_sector,
+				 ALIGN(hdr->dtb_size, hdr->page_size) >> 9,
+				 (void *)CONFIG_SPL_FDT_ADDR);
+		if (ret != (ALIGN(hdr->dtb_size, hdr->page_size) >> 9)) {
+			ret = -EIO;
+			goto out;
+		}
 	}
 
 	*bl33_entry = CONFIG_SPL_KERNEL_ADDR;

commit ddd4dd81416d0c4bc23a3db032bf2ada016ae8e1
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Feb 20 17:25:17 2020 +0800

    rockchip: dts: rk1808: change necessary nodes's u-boot attribute
    
    Change necessary nodes's "u-boot,dm-pre-reloc" to "u-boot,dm-spl",
    so that we generate dtb with the nodes which include "u-boot,dm-spl".
    
    The reducing dtb size fuction is supported by the commit:
    1. dts: Makefile: simplify the logic of kernel dtb feature
    2. dts: Makefile: support provide a minimum SPL DTB
    
    Change-Id: Ibe43a20b435315349bdc1c45a14cf91cd90ecd89
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/dts/rk1808-u-boot.dtsi b/arch/arm/dts/rk1808-u-boot.dtsi
index 005a5daeea..532c9a020e 100644
--- a/arch/arm/dts/rk1808-u-boot.dtsi
+++ b/arch/arm/dts/rk1808-u-boot.dtsi
@@ -27,42 +27,42 @@
 };
 
 &crypto {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 };
 
 &dmc {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 };
 
 &cru {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 };
 
 &grf {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 };
 
 &pmugrf {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 };
 
 &emmc {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 	status = "okay";
 };
 
 &sdmmc {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 	status = "okay";
 };
 
 &saradc {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 	status = "okay";
 };
 
 &sfc {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 	status = "okay";
 };
 
@@ -75,7 +75,7 @@
 };
 
 &uart2 {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 };
 
 &uart3 {

commit e531136ec771ffca6cddf537967c6fff9082d356
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Feb 17 11:30:11 2020 +0800

    mmc: avoid reading ext_csd several times
    
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Change-Id: Iaf952a4721ea74a1fa55da9f1a3eece5cdcd2c0c

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 7ef5170018..7bbce128e5 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -30,6 +30,8 @@ static const unsigned int sd_au_size[] = {
 	SZ_16M / 512,	(SZ_16M + SZ_8M) / 512,	SZ_32M / 512,	SZ_64M / 512,
 };
 
+static char mmc_ext_csd[512];
+
 #if CONFIG_IS_ENABLED(MMC_TINY)
 static struct mmc mmc_static;
 struct mmc *find_mmc_device(int dev_num)
@@ -543,10 +545,18 @@ static int mmc_complete_op_cond(struct mmc *mmc)
 
 static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
 {
+	static int initialized;
 	struct mmc_cmd cmd;
 	struct mmc_data data;
 	int err;
 
+	if (initialized) {
+		memcpy(ext_csd, mmc_ext_csd, 512);
+		return 0;
+	}
+
+	initialized = 1;
+
 	/* Get the Card Status Register */
 	cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
 	cmd.resp_type = MMC_RSP_R1;
@@ -558,6 +568,7 @@ static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
 	data.flags = MMC_DATA_READ;
 
 	err = mmc_send_cmd(mmc, &cmd, &data);
+	memcpy(mmc_ext_csd, ext_csd, 512);
 
 	return err;
 }

commit 1f250d0a05ad1f42e18fe409c339e4a98f28e73a
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Feb 17 11:28:33 2020 +0800

    mmc: support hs200 in spl
    
    Change-Id: I9c25265a2a1e2b10a4e6815c918b6bba750c5df8
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 54a316fab5..7ef5170018 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -840,7 +840,6 @@ static int mmc_select_hs_ddr(struct mmc *mmc)
 	return 0;
 }
 
-#ifndef CONFIG_SPL_BUILD
 static int mmc_select_hs200(struct mmc *mmc)
 {
 	int ret;
@@ -864,7 +863,6 @@ static int mmc_select_hs200(struct mmc *mmc)
 
 	return ret;
 }
-#endif
 
 static int mmc_select_hs400(struct mmc *mmc)
 {
@@ -995,12 +993,9 @@ static int mmc_change_freq(struct mmc *mmc)
 
 	avail_type = mmc_select_card_type(mmc, ext_csd);
 
-#ifndef CONFIG_SPL_BUILD
 	if (avail_type & EXT_CSD_CARD_TYPE_HS200)
 		err = mmc_select_hs200(mmc);
-	else
-#endif
-	if (avail_type & EXT_CSD_CARD_TYPE_HS)
+	else if (avail_type & EXT_CSD_CARD_TYPE_HS)
 		err = mmc_select_hs(mmc);
 	else
 		err = -EINVAL;

commit 189f3a8c31f44d1cfa98bbccddf34e6b9de15d23
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Feb 17 10:10:11 2020 +0800

    spl: atf: pass kernel parameters through bl33_ep_info->args
    
    Pass when enable CONFIG_SPL_KERNEL_BOOT.
    
    Change-Id: Iee442466df59eeaa0f477f264f523b026e516168
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/spl/spl_atf.c b/common/spl/spl_atf.c
index 1de602c5e1..a6ea1a2968 100644
--- a/common/spl/spl_atf.c
+++ b/common/spl/spl_atf.c
@@ -80,7 +80,18 @@ bl33_setup:
 	bl33_ep_info->pc = bl33_entry;
 	bl33_ep_info->spsr = SPSR_64(MODE_EL2, MODE_SP_ELX,
 				     DISABLE_ALL_EXECPTIONS);
-
+#if defined(CONFIG_SPL_KERNEL_BOOT) && defined(CONFIG_ARM64)
+	/*
+	 * Reference: arch/arm/lib/bootm.c
+	 * boot_jump_linux(bootm_headers_t *images, int flag)
+	 * {
+	 * 	......
+	 * 	armv8_switch_to_el2((u64)images->ft_addr, 0, 0, 0,
+	 * 			   images->ep, ES_TO_AARCH64);
+	 * }
+	 */
+	bl33_ep_info->args.arg0 = CONFIG_SPL_FDT_ADDR;
+#endif
 	bl2_to_bl31_params->bl33_image_info = &bl31_params_mem.bl33_image_info;
 	SET_PARAM_HEAD(bl2_to_bl31_params->bl33_image_info,
 		       ATF_PARAM_IMAGE_BINARY, ATF_VERSION_1, 0);

commit 67a616b84e5f560eb82e5296c02e797e74d842cb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Feb 24 14:54:05 2020 +0800

    make.sh: generate individual loader file for subcommand "spl-s"
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I2b2d58b1b753928113317b64fb34d65dec92fdaa

diff --git a/make.sh b/make.sh
index 191014ac57..dea58f4b9a 100755
--- a/make.sh
+++ b/make.sh
@@ -543,9 +543,11 @@ pack_spl_loader_image()
 	rm ${RKBIN}/.temp -rf
 	cd -
 	ls *_loader_*.bin >/dev/null 2>&1 && rm *_loader_*.bin
-	mv ${RKBIN}/*_loader_*.bin ./
+
+	RKCHIP_LOWCASE=`echo ${RKCHIP} |tr '[A-Z]' '[a-z]'`
+	mv ${RKBIN}/*_loader_*.bin ./${RKCHIP_LOWCASE}_loader_spl.bin
 	echo "pack loader(${label}) okay! Input: ${ini}"
-	ls ./*_loader_*.bin
+	ls ./${RKCHIP_LOWCASE}_loader_spl.bin
 }
 
 pack_loader_image()

commit 8956822660e559fc08de84ea708fa1c77dde071e
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Feb 20 15:34:28 2020 +0800

    arch: rockchip: support resource file in spl
    
    Change-Id: I00a1d9731554cf401b0a82e6d4f07440af1f554d
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/spl_resource_img.h b/arch/arm/include/asm/arch-rockchip/spl_resource_img.h
new file mode 100644
index 0000000000..f5a0acb00d
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/spl_resource_img.h
@@ -0,0 +1,93 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2020 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _SPL_RESOURCE_IMG_H_
+#define _SPL_RESOURCE_IMG_H_
+
+#define RESOURCE_MAGIC			"RSCE"
+#define RESOURCE_MAGIC_SIZE		4
+#define RESOURCE_VERSION		0
+#define CONTENT_VERSION			0
+#define ENTRY_TAG			"ENTR"
+#define ENTRY_TAG_SIZE			4
+#define MAX_FILE_NAME_LEN		220
+#define MAX_HASH_LEN			32
+
+#define DTB_FILE			"rk-kernel.dtb"
+
+/*
+ *         resource image structure
+ * ----------------------------------------------
+ * |                                            |
+ * |    header  (1 block)                       |
+ * |                                            |
+ * ---------------------------------------------|
+ * |                      |                     |
+ * |    entry0  (1 block) |                     |
+ * |                      |                     |
+ * ------------------------                     |
+ * |                      |                     |
+ * |    entry1  (1 block) | contents (n blocks) |
+ * |                      |                     |
+ * ------------------------                     |
+ * |    ......            |                     |
+ * ------------------------                     |
+ * |                      |                     |
+ * |    entryn  (1 block) |                     |
+ * |                      |                     |
+ * ----------------------------------------------
+ * |                                            |
+ * |    file0  (x blocks)                       |
+ * |                                            |
+ * ----------------------------------------------
+ * |                                            |
+ * |    file1  (y blocks)                       |
+ * |                                            |
+ * ----------------------------------------------
+ * |                   ......                   |
+ * |---------------------------------------------
+ * |                                            |
+ * |    filen  (z blocks)                       |
+ * |                                            |
+ * ----------------------------------------------
+ */
+
+/**
+ * struct resource_image_header
+ *
+ * @magic: should be "RSCE"
+ * @version: resource image version, current is 0
+ * @c_version: content version, current is 0
+ * @blks: the size of the header ( 1 block = 512 bytes)
+ * @c_offset: contents offset(by block) in the image
+ * @e_blks: the size(by block) of the entry in the contents
+ * @e_num: numbers of the entries.
+ */
+
+struct resource_img_hdr {
+	char		magic[4];
+	uint16_t	version;
+	uint16_t	c_version;
+	uint8_t		blks;
+	uint8_t		c_offset;
+	uint8_t		e_blks;
+	uint32_t	e_nums;
+};
+
+struct resource_entry {
+	char		tag[4];
+	char		name[MAX_FILE_NAME_LEN];
+	char		hash[MAX_HASH_LEN];
+	uint32_t	hash_size;
+	uint32_t	f_offset;
+	uint32_t	f_size;
+};
+
+int spl_resource_image_check_header(const struct resource_img_hdr *hdr);
+
+struct resource_entry *
+	spl_resource_image_get_dtb_entry(const struct resource_img_hdr *hdr);
+
+#endif
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 5fd5ee6c2a..897818cf41 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -36,6 +36,7 @@ endif
 
 obj-$(CONFIG_$(SPL_TPL_)RAM) += param.o
 obj-$(CONFIG_$(SPL_TPL_)RAM) += sdram.o
+obj-$(CONFIG_SPL_KERNEL_BOOT) += spl_resource_img.o
 
 obj-$(CONFIG_ROCKCHIP_PX30) += px30/
 obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036/
diff --git a/arch/arm/mach-rockchip/spl_resource_img.c b/arch/arm/mach-rockchip/spl_resource_img.c
new file mode 100644
index 0000000000..a4b2136125
--- /dev/null
+++ b/arch/arm/mach-rockchip/spl_resource_img.c
@@ -0,0 +1,50 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <linux/list.h>
+#include <asm/arch/spl_resource_img.h>
+
+int spl_resource_image_check_header(const struct resource_img_hdr *hdr)
+{
+	int ret;
+
+	ret = memcmp(RESOURCE_MAGIC, hdr->magic, RESOURCE_MAGIC_SIZE);
+	if (ret) {
+		debug("bad resource image magic: %s\n",
+		      hdr->magic ? hdr->magic : "none");
+		ret = -EINVAL;
+	}
+
+	debug("resource image header:\n");
+	debug("magic:%s\n", hdr->magic);
+	debug("version:%d\n", hdr->version);
+	debug("c_version:%d\n", hdr->c_version);
+	debug("blks:%d\n", hdr->blks);
+	debug("c_offset:%d\n", hdr->c_offset);
+	debug("e_blks:%d\n", hdr->e_blks);
+	debug("e_num:%d\n", hdr->e_nums);
+
+	return ret;
+}
+
+struct resource_entry *spl_resource_image_get_dtb_entry(const struct
+							resource_img_hdr *hdr)
+{
+	int i;
+	struct resource_entry *entry = NULL;
+
+	if (!hdr)
+		return NULL;
+
+	for (i = 0; i < hdr->e_nums; i++) {
+		entry = (struct resource_entry *)((char *)hdr
+				+ (hdr->blks + hdr->e_blks * i) * 512);
+		if (!memcmp(entry->name, DTB_FILE, strlen(DTB_FILE)))
+			break;
+	}
+
+	return entry;
+}

commit fec9980f93fa667caac9706bb08d2001a63ea3e1
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Feb 13 11:05:48 2020 +0800

    rockchip: dts: rk1808: add u-boot,spl-boot-order
    
    Change-Id: I783c14843d7aa28bb65100ca0a2903b40c88e9d0
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/dts/rk1808-u-boot.dtsi b/arch/arm/dts/rk1808-u-boot.dtsi
index c1c1bbbf43..005a5daeea 100644
--- a/arch/arm/dts/rk1808-u-boot.dtsi
+++ b/arch/arm/dts/rk1808-u-boot.dtsi
@@ -21,6 +21,7 @@
 
 	chosen {
 		stdout-path = &uart2;
+		u-boot,spl-boot-order = &emmc;
 	};
 
 };

commit 28e9e98a51d0997814792607120ff8361a1ad3d9
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Feb 17 09:56:56 2020 +0800

    clk: rockchip: rk1808: set gpll to 594000000
    
    The eMMC clk is depended on gpll, and the eMMC is needed to run 150MHz
    in HS200 mode. So set gpll to 594000000.
    
    Change-Id: Id356c87b1db158a0638e4560e886868f133dfaf9
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk1808.h b/arch/arm/include/asm/arch-rockchip/cru_rk1808.h
index 9e12f805e4..299fd3e560 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk1808.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk1808.h
@@ -13,6 +13,7 @@
 #define OSC_HZ		(24 * MHz)
 #define APLL_HZ		(1200 * MHz)
 #define PCLK_PMU_HZ	(100 * MHz)
+#define GPLL_HZ		(594 * MHz)
 
 /* PX30 pll id */
 enum rk1808_pll_id {
diff --git a/drivers/clk/rockchip/clk_rk1808.c b/drivers/clk/rockchip/clk_rk1808.c
index c12ea5b922..2db2de51de 100644
--- a/drivers/clk/rockchip/clk_rk1808.c
+++ b/drivers/clk/rockchip/clk_rk1808.c
@@ -1261,7 +1261,17 @@ static int rk1808_clk_probe(struct udevice *dev)
 			printf("%s failed to set armclk rate\n", __func__);
 		priv->armclk_init_hz = APLL_HZ;
 	}
-
+#ifdef CONFIG_SPL_BUILD
+	/*
+	 * The eMMC clk is depended on gpll, and the eMMC is needed to
+	 * run 150MHz in HS200 mode. So set gpll to GPLL_HZ(594000000)
+	 * which can be divided near to 150MHz.
+	 */
+	ret = rockchip_pll_set_rate(&rk1808_pll_clks[GPLL],
+				    priv->cru, GPLL, GPLL_HZ);
+	if (ret < 0)
+		printf("%s failed to set gpll rate\n", __func__);
+#endif
 	priv->cpll_hz = rockchip_pll_get_rate(&rk1808_pll_clks[CPLL],
 					      priv->cru, CPLL);
 	priv->gpll_hz = rockchip_pll_get_rate(&rk1808_pll_clks[GPLL],

commit a4933f72a5253a046dbe775dd49917ac4e5ca5f2
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Feb 17 09:55:20 2020 +0800

    rockchip: rk1808: support mmc_gpio_init_direct()
    
    Change-Id: Ib6f5818f3a38c88a38b9a4a9bba0aedd49f0247e
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk1808/rk1808.c b/arch/arm/mach-rockchip/rk1808/rk1808.c
index 26677b61bb..2a74d396ff 100644
--- a/arch/arm/mach-rockchip/rk1808/rk1808.c
+++ b/arch/arm/mach-rockchip/rk1808/rk1808.c
@@ -225,3 +225,14 @@ int rk_board_late_init(void)
 
 	return 0;
 }
+
+void mmc_gpio_init_direct(void)
+{
+	static struct rk1808_grf * const grf = (void *)GRF_BASE;
+
+	/*
+	 * The rk1808's pin drive strength control must set to 2ma.
+	 */
+	rk_clrsetreg(&grf->gpio1a_e, 0xffff, 0x5555);
+	rk_clrsetreg(&grf->gpio1b_e, 0xff, 0x00);
+}

commit ace0ade619a8f5462e08dfb8fb2463538ee2722a
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Feb 17 09:53:53 2020 +0800

    mmc: add func mmc_gpio_init_direct in spl
    
    Sometimes we need to reconfigure the eMMC gpio state in spl without
    pinctrl driver. So add func mmc_gpio_init_direct to initialize the
    eMMC gpio in different platform.
    
    Change-Id: I22500f8865a9e29e59be6ff224001bad899cec48
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index d159c6f64c..fdd49294e6 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -37,6 +37,10 @@ struct rockchip_dwmmc_priv {
 	u32 minmax[2];
 };
 
+#ifdef CONFIG_SPL_BUILD
+__weak void mmc_gpio_init_direct(void) {}
+#endif
+
 static uint rockchip_dwmmc_get_mmc_clk(struct dwmci_host *host, uint freq)
 {
 	struct udevice *dev = host->priv;
@@ -158,6 +162,9 @@ static int rockchip_dwmmc_probe(struct udevice *dev)
 	struct udevice *pwr_dev __maybe_unused;
 	int ret;
 
+#ifdef CONFIG_SPL_BUILD
+	mmc_gpio_init_direct();
+#endif
 #if CONFIG_IS_ENABLED(OF_PLATDATA)
 	struct dtd_rockchip_rk3288_dw_mshc *dtplat = &plat->dtplat;
 
diff --git a/include/mmc.h b/include/mmc.h
index e3e1bbaeaf..8bf4761457 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -766,5 +766,12 @@ int mmc_get_env_dev(void);
  */
 struct blk_desc *mmc_get_blk_desc(struct mmc *mmc);
 
+
+/**
+ * mmc_gpio_init_direct()
+ *
+ */
+void mmc_gpio_init_direct(void);
+
 #endif /* _MMC_H_ */
 

commit e3460df72db8b110b16d34c717229949a30838c5
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Feb 17 09:52:12 2020 +0800

    common: spl: rkfw: support boot kernel in spl
    
    Load kernel through android format, then jump to kernel through ATF.
    
    Change-Id: Idc77461bae0e4300c146c68f6a7e4e157c29db7f
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/spl/spl_rkfw.c b/common/spl/spl_rkfw.c
index 02fd32dc00..833136440c 100644
--- a/common/spl/spl_rkfw.c
+++ b/common/spl/spl_rkfw.c
@@ -4,8 +4,11 @@
  */
 
 #include <common.h>
+#include <android_image.h>
+#include <errno.h>
 #include <malloc.h>
 #include <spl_rkfw.h>
+#include <linux/kernel.h>
 
 static const __aligned(16) struct s_fip_name_id fip_name_id[] = {
 	{ BL30_IMAGE_NAME, UUID_SCP_FIRMWARE_BL30 },		/* optional */
@@ -243,6 +246,73 @@ static int rkfw_load_uboot(struct spl_load_info *info, u32 image_sector,
 	return 0;
 }
 
+static int rkfw_load_kernel(struct spl_load_info *info, u32 image_sector,
+			    uintptr_t *bl33_entry, u32 try_count)
+{
+	struct andr_img_hdr *hdr;
+	int ret, cnt;
+	int dtb_sector, ramdisk_sector;
+
+	cnt = ALIGN(sizeof(struct andr_img_hdr), 512) >> 9;
+	hdr = malloc(cnt * 512);
+	if (!hdr)
+		return -ENOMEM;
+
+	ret = info->read(info, image_sector, cnt, (void *)hdr);
+	if (ret != cnt) {
+		ret = -EIO;
+		goto out;
+	}
+
+	if (memcmp(hdr->magic, ANDR_BOOT_MAGIC, strlen(ANDR_BOOT_MAGIC)) != 0) {
+		printf("SPL: boot image head magic error\n");
+		ret = -EINVAL;
+		goto out;
+	}
+
+	ramdisk_sector = ALIGN(hdr->kernel_size, hdr->page_size);
+	dtb_sector = ALIGN(hdr->kernel_size, hdr->page_size)
+			+ ALIGN(hdr->ramdisk_size, hdr->page_size)
+			+ ALIGN(hdr->second_size, hdr->page_size);
+	image_sector = image_sector + cnt;
+	cnt = ALIGN(hdr->kernel_size, hdr->page_size) >> 9;
+
+	/* Load kernel image */
+	ret = info->read(info, image_sector, cnt, (void *)CONFIG_SPL_KERNEL_ADDR);
+	if (ret != cnt) {
+		ret = -EIO;
+		goto out;
+	}
+
+	/* Load ramdisk image */
+	if (hdr->ramdisk_size) {
+		ret = info->read(info, (ramdisk_sector >> 9) + image_sector,
+				 ALIGN(hdr->ramdisk_size, hdr->page_size) >> 9,
+				 (void *)CONFIG_SPL_RAMDISK_ADDR);
+		if (ret != (ALIGN(hdr->ramdisk_size, hdr->page_size) >> 9)) {
+			ret = -EIO;
+			goto out;
+		}
+	}
+
+	/* Load dtb image */
+	ret = info->read(info, (dtb_sector >> 9) + image_sector,
+			 ALIGN(hdr->dtb_size, hdr->page_size) >> 9,
+			 (void *)CONFIG_SPL_FDT_ADDR);
+
+	if (ret != (ALIGN(hdr->dtb_size, hdr->page_size) >> 9)) {
+		ret = -EIO;
+		goto out;
+	}
+
+	*bl33_entry = CONFIG_SPL_KERNEL_ADDR;
+	ret = 0;
+out:
+	free(hdr);
+
+	return ret;
+}
+
 int spl_load_rkfw_image(struct spl_image_info *spl_image,
 			struct spl_load_info *info,
 			u32 trust_sector, u32 uboot_sector)
@@ -261,11 +331,19 @@ int spl_load_rkfw_image(struct spl_image_info *spl_image,
 
 	ret = rkfw_load_uboot(info, uboot_sector,
 			      &spl_image->entry_point_bl33, try_count);
-	if (ret) {
+	if (ret)
 		printf("Load uboot image failed! ret=%d\n", ret);
+	else
+		goto boot;
+
+	ret = rkfw_load_kernel(info, uboot_sector,
+			     &spl_image->entry_point_bl33, try_count);
+	if (ret) {
+		printf("Load kernel image failed! ret=%d\n", ret);
 		goto out;
 	}
 
+boot:
 #if CONFIG_IS_ENABLED(LOAD_FIT)
 	spl_image->fdt_addr = 0;
 #endif

commit dd04b7cb10e080b4aeec437101ca87f901e1df7a
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Feb 17 09:51:02 2020 +0800

    spl: add SPL_KERNEL_BOOT
    
    Change-Id: I6460bf6fa4535c60d956bba6c3c2f00b6b61bf45
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 8d2b46383e..e0a2f00fa2 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -833,6 +833,12 @@ config SPL_RAMDISK_ADDR
 	  Define the ramdisk address where load ramdisk image to.
 	  This is used to boot kernel in spl.
 
+config SPL_KERNEL_BOOT
+	bool "Enable boot kernel in SPL"
+	depends on SPL
+	help
+	  Enable boot kernel in SPL.
+
 config TPL
 	bool
 	depends on SUPPORT_TPL

commit 49f617a949f5ef58a9bd8517e09c4e554d3bc299
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Feb 17 09:50:07 2020 +0800

    spl: support SPL_KERNEL_ADDR & SPL_FDT_ADDR & SPL_RAMDISK_ADDR
    
    Change-Id: I9c8d4ba9118c7c22504753a3c9de33706bea04fd
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 0920720ae0..8d2b46383e 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -809,6 +809,30 @@ config RKFW_U_BOOT_SECTOR
 	depends on SPL_LOAD_RKFW
 	default 0x4000
 
+config SPL_KERNEL_ADDR
+	hex "Kernel load address in spl"
+	depends on SPL
+	default 0x280000
+	help
+	  Define the kernel address where load kernel image to.
+	  This is used to boot kernel in spl.
+
+config SPL_FDT_ADDR
+	hex "Device tree blob load address in spl"
+	depends on SPL
+	default 0x01f00000
+	help
+	  Define the fdt address where load dtb image to.
+	  This is used to boot kernel in spl.
+
+config SPL_RAMDISK_ADDR
+	hex "Ramdisk load address in spl"
+	depends on SPL
+	default 0x0a200000
+	help
+	  Define the ramdisk address where load ramdisk image to.
+	  This is used to boot kernel in spl.
+
 config TPL
 	bool
 	depends on SUPPORT_TPL

commit 2aca71f9d930649d25dbefa8dc335e9241ce07aa
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Feb 21 17:36:05 2020 +0800

    rockchip: board: add mmc_dm_reinit() for mmc devices
    
    There maybe something for the mmc devices to do after kernel dtb
    dm setup, eg: regain the clock device binding from kernel dtb.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ie52edd6a0b4e7f7d54bf5b00d7e97de1f1346230

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 9f71d50482..2709d85b4c 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -418,6 +418,29 @@ static int phandles_fixup_gpio(void *fdt, void *ufdt)
 	return 0;
 }
 
+__weak int board_mmc_dm_reinit(struct udevice *dev)
+{
+	return 0;
+}
+
+static int mmc_dm_reinit(void)
+{
+	struct udevice *dev;
+	struct uclass *uc;
+	int ret;
+
+	if (uclass_get(UCLASS_MMC, &uc) || list_empty(&uc->dev_head))
+		return 0;
+
+	list_for_each_entry(dev, &uc->dev_head, uclass_node) {
+		ret = board_mmc_dm_reinit(dev);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
 int init_kernel_dtb(void)
 {
 	ulong fdt_addr;
@@ -465,6 +488,12 @@ int init_kernel_dtb(void)
 	of_live_build((void *)gd->fdt_blob, (struct device_node **)&gd->of_root);
 	dm_scan_fdt((void *)gd->fdt_blob, false);
 
+	/*
+	 * There maybe something for the mmc devices to do after kernel dtb
+	 * dm setup, eg: regain the clock device binding from kernel dtb.
+	 */
+	mmc_dm_reinit();
+
 	/* Reserve 'reserved-memory' */
 	ret = boot_fdt_add_sysmem_rsv_regions((void *)gd->fdt_blob);
 	if (ret)

commit a7940145523abcedcda67953e281df911c5072e3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Feb 21 16:52:10 2020 +0800

    rockchip: board: rename early_download_init to early_download
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ia20430765fe55309650237dc2085d59d9ec41411

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 36cd9a81ae..9f71d50482 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -517,7 +517,7 @@ void board_env_fixup(void)
 	}
 }
 
-static void early_download_init(void)
+static void early_download(void)
 {
 #if defined(CONFIG_PWRKEY_DNL_TRIGGER_NUM) && \
 		(CONFIG_PWRKEY_DNL_TRIGGER_NUM > 0)
@@ -559,7 +559,7 @@ int board_init(void)
 #ifdef CONFIG_USING_KERNEL_DTB
 	init_kernel_dtb();
 #endif
-	early_download_init();
+	early_download();
 
 	/*
 	 * pmucru isn't referenced on some platforms, so pmucru driver can't

commit 46f61401763d5115765e734eca33e4a5cfac129f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Feb 21 16:46:27 2020 +0800

    rockchip: board: move hotkey getc earlier
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I5bdf84563f2aae957c707cb12633c4840e58afc0

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 6cae92c94c..36cd9a81ae 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -525,13 +525,6 @@ static void early_download_init(void)
 		printf("Pwrkey download init failed\n");
 #endif
 
-	if (!tstc())
-		return;
-
-	gd->console_evt = getc();
-	if (gd->console_evt <= 0x1a) /* 'z' */
-		printf("Hotkey: ctrl+%c\n", (gd->console_evt + 'a' - 1));
-
 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0)
 	if (is_hotkey(HK_BROM_DNL)) {
 		printf("Enter bootrom download...");
@@ -547,6 +540,12 @@ static void board_debug_init(void)
 {
 	if (!gd->serial.using_pre_serial)
 		board_debug_uart_init();
+
+	if (tstc()) {
+		gd->console_evt = getc();
+		if (gd->console_evt <= 0x1a) /* 'z' */
+			printf("Hotkey: ctrl+%c\n", gd->console_evt + 'a' - 1);
+	}
 }
 
 int board_init(void)

commit b173f38e43d5dda64beffddb1cd0c1bc6c01a252
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Feb 21 16:32:26 2020 +0800

    rockchip: hotkey: add fdt dump
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I9bb158f13b723decae01069f4324289c599e0e5f

diff --git a/arch/arm/include/asm/arch-rockchip/hotkey.h b/arch/arm/include/asm/arch-rockchip/hotkey.h
index 04b405675f..743d093e04 100644
--- a/arch/arm/include/asm/arch-rockchip/hotkey.h
+++ b/arch/arm/include/asm/arch-rockchip/hotkey.h
@@ -13,6 +13,7 @@ enum hotkey_t {
 	HK_CLI_OS_GO,
 	HK_CMDLINE,
 	HK_FASTBOOT,
+	HK_FDT,
 	HK_INITCALL,
 	HK_REGULATOR,
 	HK_ROCKUSB_DNL,
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index af9f1ac1b6..6cae92c94c 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -450,6 +450,8 @@ int init_kernel_dtb(void)
 	ufdt_blob = (void *)gd->fdt_blob;
 	gd->fdt_blob = (void *)fdt_addr;
 
+	hotkey_run(HK_FDT);
+
 	/*
 	 * There is a phandle miss match between U-Boot and kernel dtb node,
 	 * we fixup it in U-Boot live dt nodes.
diff --git a/arch/arm/mach-rockchip/hotkey.c b/arch/arm/mach-rockchip/hotkey.c
index fda741e70a..2bed1cc188 100644
--- a/arch/arm/mach-rockchip/hotkey.c
+++ b/arch/arm/mach-rockchip/hotkey.c
@@ -21,6 +21,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define CTRL_P		0x10	/* parameter(cmdline) dump */
 #define CTRL_R		0x12	/* regulator initial state dump */
 #define CTRL_S		0x13	/* shell(cli) on BOOTM_STATE_OS_GO */
+#define CTRL_T		0x14	/* print fdt */
 
 bool is_hotkey(enum hotkey_t id)
 {
@@ -66,6 +67,10 @@ void hotkey_run(enum hotkey_t id)
 		if (gd->console_evt == CTRL_I)
 			env_update("bootargs", "initcall_debug debug");
 		break;
+	case HK_FDT:
+		if (gd->console_evt == CTRL_T)
+			run_command("fdt print", 0);
+		break;
 #if defined(CONFIG_CONSOLE_DISABLE_CTRLC) && \
     defined(CONFIG_BOOTDELAY) && (CONFIG_BOOTDELAY <= 0)
 	case HK_CLI_OS_PRE:

commit 9beff1069b2fe718955214aacbc950b090d1670e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Feb 21 16:28:57 2020 +0800

    rockchip: hotkey: disable interactive events
    
    Allow other debug message hotkey.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If5c82922e1ce66283a00f7e675451b6104a503bc

diff --git a/arch/arm/mach-rockchip/hotkey.c b/arch/arm/mach-rockchip/hotkey.c
index 835be86965..fda741e70a 100644
--- a/arch/arm/mach-rockchip/hotkey.c
+++ b/arch/arm/mach-rockchip/hotkey.c
@@ -22,28 +22,26 @@ DECLARE_GLOBAL_DATA_PTR;
 #define CTRL_R		0x12	/* regulator initial state dump */
 #define CTRL_S		0x13	/* shell(cli) on BOOTM_STATE_OS_GO */
 
-#if defined(CONFIG_CONSOLE_DISABLE_CTRLC) && \
-	defined(CONFIG_BOOTDELAY) && (CONFIG_BOOTDELAY <= 0)
-bool is_hotkey(enum hotkey_t id) { return false; }
-void hotkey_run(enum hotkey_t id) { }
-#else
 bool is_hotkey(enum hotkey_t id)
 {
 	switch (id) {
-	case HK_BROM_DNL:
-		return gd->console_evt == CTRL_B;
 	case HK_CMDLINE:
 		return gd->console_evt == CTRL_P;
-	case HK_FASTBOOT:
-		return gd->console_evt == CTRL_F;
 	case HK_INITCALL:
 		return gd->console_evt == CTRL_I;
 	case HK_REGULATOR:
 		return gd->console_evt == CTRL_R;
-	case HK_ROCKUSB_DNL:
-		return gd->console_evt == CTRL_D;
 	case HK_SYSMEM:
 		return gd->console_evt == CTRL_M;
+#if defined(CONFIG_CONSOLE_DISABLE_CTRLC) && \
+    defined(CONFIG_BOOTDELAY) && (CONFIG_BOOTDELAY <= 0)
+	case HK_BROM_DNL:
+		return gd->console_evt == CTRL_B;
+	case HK_ROCKUSB_DNL:
+		return gd->console_evt == CTRL_D;
+	case HK_FASTBOOT:
+		return gd->console_evt == CTRL_F;
+#endif
 	default:
 		break;
 	}
@@ -68,6 +66,8 @@ void hotkey_run(enum hotkey_t id)
 		if (gd->console_evt == CTRL_I)
 			env_update("bootargs", "initcall_debug debug");
 		break;
+#if defined(CONFIG_CONSOLE_DISABLE_CTRLC) && \
+    defined(CONFIG_BOOTDELAY) && (CONFIG_BOOTDELAY <= 0)
 	case HK_CLI_OS_PRE:
 		if (gd->console_evt == CTRL_A)
 			cli_loop();
@@ -76,8 +76,8 @@ void hotkey_run(enum hotkey_t id)
 		if (gd->console_evt == CTRL_S)
 			cli_loop();
 		break;
+#endif
 	default:
 		break;
 	}
 }
-#endif

commit 30a8590450e785da813189af0cfbaac19612a73b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Feb 21 16:09:35 2020 +0800

    core: device: add and update some comment
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I7e58aab5eeb77913c8438ed066a7a73c7d6f0bb6

diff --git a/drivers/core/device.c b/drivers/core/device.c
index 206b2fb05c..d44c4e0d13 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -59,6 +59,12 @@ static int device_bind_common(struct udevice *parent, const struct driver *drv,
 				if (!strcmp(name, dev->name)) {
 					debug("%s do not bind dev already in list %s\n",
 					      __func__, dev->name);
+					/*
+					 * There is no clearly reason for this
+					 * legacy code, but remain it here since
+					 * everything seems fine with or without
+					 * this. Maybe removed in the future.
+					 */
 					dev->node = node;
 					return 0;
 				}
@@ -72,8 +78,9 @@ static int device_bind_common(struct udevice *parent, const struct driver *drv,
 			if (!strcmp(name, dev->name) &&
 			    (dev_read_bool(dev, "u-boot,dm-pre-reloc") ||
 			     dev_read_bool(dev, "u-boot,dm-spl"))) {
+
+				/* Always use crypto node from U-Boot dtb */
 				if (drv->id == UCLASS_CRYPTO) {
-					/* Always use serial node from U-Boot dtb */
 					debug("%s do not delete uboot dev: %s\n",
 					      __func__, dev->name);
 					return 0;

commit c61a6715316f2e2f5e5a1f186b29f40430344147
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Feb 21 10:33:18 2020 +0800

    make.sh: rename rv1109 to rv1126
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I22687b0475f4fe8acf39c49276813104eb7e9627

diff --git a/make.sh b/make.sh
index 6efacaf4ef..d3ab27a19b 100755
--- a/make.sh
+++ b/make.sh
@@ -361,8 +361,8 @@ select_chip_info()
 			&& RKCHIP=RK3368H
 		grep '^CONFIG_ROCKCHIP_RV1108=y' ${OUTDIR}/.config >/dev/null \
 			&& RKCHIP=RV110X
-		grep '^CONFIG_ROCKCHIP_RV1109=y' ${OUTDIR}/.config >/dev/null \
-			&& RKCHIP=RV1109
+		grep '^CONFIG_ROCKCHIP_RV1126=y' ${OUTDIR}/.config >/dev/null \
+			&& RKCHIP=RV1126
 	elif [ $count -gt 1 ]; then
 		# Grep the RK CHIP variant
 		grep '^CONFIG_ROCKCHIP_PX3SE=y' ${OUTDIR}/.config > /dev/null \

commit f95775d6f3ec54c2241abfb9171298980565ff5e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Feb 21 10:32:59 2020 +0800

    clk: rockchip: rename rv1109 to rv1126
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If2c870831fd1e3332c09f00aaa9e91a1f1523279

diff --git a/drivers/clk/rockchip/Makefile b/drivers/clk/rockchip/Makefile
index 925c8a6211..220dc91a0d 100644
--- a/drivers/clk/rockchip/Makefile
+++ b/drivers/clk/rockchip/Makefile
@@ -18,4 +18,4 @@ obj-$(CONFIG_ROCKCHIP_RK3328) += clk_rk3328.o
 obj-$(CONFIG_ROCKCHIP_RK3368) += clk_rk3368.o
 obj-$(CONFIG_ROCKCHIP_RK3399) += clk_rk3399.o
 obj-$(CONFIG_ROCKCHIP_RV1108) += clk_rv1108.o
-obj-$(CONFIG_ROCKCHIP_RV1109) += clk_rv1109.o
+obj-$(CONFIG_ROCKCHIP_RV1126) += clk_rv1126.o
diff --git a/drivers/clk/rockchip/clk_rv1109.c b/drivers/clk/rockchip/clk_rv1126.c
similarity index 69%
rename from drivers/clk/rockchip/clk_rv1109.c
rename to drivers/clk/rockchip/clk_rv1126.c
index 6424b3db5b..60c06168e5 100644
--- a/drivers/clk/rockchip/clk_rv1109.c
+++ b/drivers/clk/rockchip/clk_rv1126.c
@@ -11,16 +11,16 @@
 #include <errno.h>
 #include <syscon.h>
 #include <asm/arch/clock.h>
-#include <asm/arch/cru_rv1109.h>
-#include <asm/arch/grf_rv1109.h>
+#include <asm/arch/cru_rv1126.h>
+#include <asm/arch/grf_rv1126.h>
 #include <asm/arch/hardware.h>
 #include <asm/io.h>
 #include <dm/lists.h>
-#include <dt-bindings/clock/rv1109-cru.h>
+#include <dt-bindings/clock/rv1126-cru.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define RV1109_CPUCLK_RATE(_rate, _aclk_div, _pclk_div)		\
+#define RV1126_CPUCLK_RATE(_rate, _aclk_div, _pclk_div)		\
 {								\
 	.rate	= _rate##U,					\
 	.aclk_div = _aclk_div,					\
@@ -29,15 +29,15 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #define DIV_TO_RATE(input_rate, div)    ((input_rate) / ((div) + 1))
 
-static struct rockchip_cpu_rate_table rv1109_cpu_rates[] = {
-	RV1109_CPUCLK_RATE(1200000000, 1, 5),
-	RV1109_CPUCLK_RATE(1008000000, 1, 5),
-	RV1109_CPUCLK_RATE(816000000, 1, 3),
-	RV1109_CPUCLK_RATE(600000000, 1, 3),
-	RV1109_CPUCLK_RATE(408000000, 1, 1),
+static struct rockchip_cpu_rate_table rv1126_cpu_rates[] = {
+	RV1126_CPUCLK_RATE(1200000000, 1, 5),
+	RV1126_CPUCLK_RATE(1008000000, 1, 5),
+	RV1126_CPUCLK_RATE(816000000, 1, 3),
+	RV1126_CPUCLK_RATE(600000000, 1, 3),
+	RV1126_CPUCLK_RATE(408000000, 1, 1),
 };
 
-static struct rockchip_pll_rate_table rv1109_pll_rates[] = {
+static struct rockchip_pll_rate_table rv1126_pll_rates[] = {
 	/* _mhz, _refdiv, _fbdiv, _postdiv1, _postdiv2, _dsmpd, _frac */
 	RK3036_PLL_RATE(1600000000, 3, 200, 1, 1, 1, 0),
 	RK3036_PLL_RATE(1200000000, 1, 50, 1, 1, 1, 0),
@@ -55,41 +55,41 @@ static struct rockchip_pll_rate_table rv1109_pll_rates[] = {
 	{ /* sentinel */ },
 };
 
-static struct rockchip_pll_clock rv1109_pll_clks[] = {
-	[APLL] = PLL(pll_rk3328, PLL_APLL, RV1109_PLL_CON(0),
-		     RV1109_MODE_CON, 0, 10, 0, rv1109_pll_rates),
-	[DPLL] = PLL(pll_rk3328, PLL_DPLL, RV1109_PLL_CON(8),
-		     RV1109_MODE_CON, 2, 10, 0, NULL),
-	[CPLL] = PLL(pll_rk3328, PLL_CPLL, RV1109_PLL_CON(16),
-		     RV1109_MODE_CON, 4, 10, 0, rv1109_pll_rates),
-	[HPLL] = PLL(pll_rk3328, PLL_HPLL, RV1109_PLL_CON(24),
-		     RV1109_MODE_CON, 6, 10, 0, rv1109_pll_rates),
-	[GPLL] = PLL(pll_rk3328, PLL_GPLL, RV1109_PMU_PLL_CON(0),
-		     RV1109_PMU_MODE, 0, 10, 0, rv1109_pll_rates),
+static struct rockchip_pll_clock rv1126_pll_clks[] = {
+	[APLL] = PLL(pll_rk3328, PLL_APLL, RV1126_PLL_CON(0),
+		     RV1126_MODE_CON, 0, 10, 0, rv1126_pll_rates),
+	[DPLL] = PLL(pll_rk3328, PLL_DPLL, RV1126_PLL_CON(8),
+		     RV1126_MODE_CON, 2, 10, 0, NULL),
+	[CPLL] = PLL(pll_rk3328, PLL_CPLL, RV1126_PLL_CON(16),
+		     RV1126_MODE_CON, 4, 10, 0, rv1126_pll_rates),
+	[HPLL] = PLL(pll_rk3328, PLL_HPLL, RV1126_PLL_CON(24),
+		     RV1126_MODE_CON, 6, 10, 0, rv1126_pll_rates),
+	[GPLL] = PLL(pll_rk3328, PLL_GPLL, RV1126_PMU_PLL_CON(0),
+		     RV1126_PMU_MODE, 0, 10, 0, rv1126_pll_rates),
 };
 
 #ifndef CONFIG_SPL_BUILD
-#define RV1109_CLK_DUMP(_id, _name, _iscru)	\
+#define RV1126_CLK_DUMP(_id, _name, _iscru)	\
 {						\
 	.id = _id,				\
 	.name = _name,				\
 	.is_cru = _iscru,			\
 }
 
-static const struct rv1109_clk_info clks_dump[] = {
-	RV1109_CLK_DUMP(PLL_APLL, "apll", true),
-	RV1109_CLK_DUMP(PLL_DPLL, "dpll", true),
-	RV1109_CLK_DUMP(PLL_GPLL, "gpll", false),
-	RV1109_CLK_DUMP(PLL_CPLL, "cpll", true),
-	RV1109_CLK_DUMP(PLL_HPLL, "hpll", true),
-	RV1109_CLK_DUMP(ACLK_PDBUS, "aclk_pdbus", true),
-	RV1109_CLK_DUMP(HCLK_PDBUS, "hclk_pdbus", true),
-	RV1109_CLK_DUMP(PCLK_PDBUS, "pclk_pdbus", true),
-	RV1109_CLK_DUMP(ACLK_PDPHP, "aclk_pdphp", true),
-	RV1109_CLK_DUMP(HCLK_PDPHP, "hclk_pdphp", true),
-	RV1109_CLK_DUMP(HCLK_PDAUDIO, "hclk_pdaudio", true),
-	RV1109_CLK_DUMP(HCLK_PDCORE_NIU, "hclk_pdcore", true),
-	RV1109_CLK_DUMP(PCLK_PDPMU, "pclk_pdpmu", false),
+static const struct rv1126_clk_info clks_dump[] = {
+	RV1126_CLK_DUMP(PLL_APLL, "apll", true),
+	RV1126_CLK_DUMP(PLL_DPLL, "dpll", true),
+	RV1126_CLK_DUMP(PLL_GPLL, "gpll", false),
+	RV1126_CLK_DUMP(PLL_CPLL, "cpll", true),
+	RV1126_CLK_DUMP(PLL_HPLL, "hpll", true),
+	RV1126_CLK_DUMP(ACLK_PDBUS, "aclk_pdbus", true),
+	RV1126_CLK_DUMP(HCLK_PDBUS, "hclk_pdbus", true),
+	RV1126_CLK_DUMP(PCLK_PDBUS, "pclk_pdbus", true),
+	RV1126_CLK_DUMP(ACLK_PDPHP, "aclk_pdphp", true),
+	RV1126_CLK_DUMP(HCLK_PDPHP, "hclk_pdphp", true),
+	RV1126_CLK_DUMP(HCLK_PDAUDIO, "hclk_pdaudio", true),
+	RV1126_CLK_DUMP(HCLK_PDCORE_NIU, "hclk_pdcore", true),
+	RV1126_CLK_DUMP(PCLK_PDPMU, "pclk_pdpmu", false),
 };
 #endif
 
@@ -144,13 +144,13 @@ static void rational_best_approximation(unsigned long given_numerator,
 	*best_denominator = d1;
 }
 
-static ulong rv1109_gpll_get_pmuclk(struct rv1109_pmuclk_priv *priv)
+static ulong rv1126_gpll_get_pmuclk(struct rv1126_pmuclk_priv *priv)
 {
-	return rockchip_pll_get_rate(&rv1109_pll_clks[GPLL],
+	return rockchip_pll_get_rate(&rv1126_pll_clks[GPLL],
 				     priv->pmucru, GPLL);
 }
 
-static ulong rv1109_gpll_set_pmuclk(struct rv1109_pmuclk_priv *priv, ulong rate)
+static ulong rv1126_gpll_set_pmuclk(struct rv1126_pmuclk_priv *priv, ulong rate)
 {
 	int ret;
 
@@ -158,7 +158,7 @@ static ulong rv1109_gpll_set_pmuclk(struct rv1109_pmuclk_priv *priv, ulong rate)
 	 * the child div is big enough for gpll 1188MHz,
 	 * even maskrom has change some clocks.
 	 */
-	ret = rockchip_pll_set_rate(&rv1109_pll_clks[GPLL],
+	ret = rockchip_pll_set_rate(&rv1126_pll_clks[GPLL],
 				    priv->pmucru, GPLL, rate);
 	if (!ret)
 		priv->gpll_hz = rate;
@@ -166,9 +166,9 @@ static ulong rv1109_gpll_set_pmuclk(struct rv1109_pmuclk_priv *priv, ulong rate)
 	return ret;
 }
 
-static ulong rv1109_rtc32k_get_pmuclk(struct rv1109_pmuclk_priv *priv)
+static ulong rv1126_rtc32k_get_pmuclk(struct rv1126_pmuclk_priv *priv)
 {
-	struct rv1109_pmucru *pmucru = priv->pmucru;
+	struct rv1126_pmucru *pmucru = priv->pmucru;
 	unsigned long m, n;
 	u32 fracdiv;
 
@@ -181,10 +181,10 @@ static ulong rv1109_rtc32k_get_pmuclk(struct rv1109_pmuclk_priv *priv)
 	return OSC_HZ * m / n;
 }
 
-static ulong rv1109_rtc32k_set_pmuclk(struct rv1109_pmuclk_priv *priv,
+static ulong rv1126_rtc32k_set_pmuclk(struct rv1126_pmuclk_priv *priv,
 				      ulong rate)
 {
-	struct rv1109_pmucru *pmucru = priv->pmucru;
+	struct rv1126_pmucru *pmucru = priv->pmucru;
 	unsigned long m, n, val;
 
 	rational_best_approximation(rate, OSC_HZ,
@@ -194,13 +194,13 @@ static ulong rv1109_rtc32k_set_pmuclk(struct rv1109_pmuclk_priv *priv,
 	val = m << CLK_RTC32K_FRAC_NUMERATOR_SHIFT | n;
 	writel(val, &pmucru->pmu_clksel_con[13]);
 
-	return rv1109_rtc32k_get_pmuclk(priv);
+	return rv1126_rtc32k_get_pmuclk(priv);
 }
 
-static ulong rv1109_i2c_get_pmuclk(struct rv1109_pmuclk_priv *priv,
+static ulong rv1126_i2c_get_pmuclk(struct rv1126_pmuclk_priv *priv,
 				   ulong clk_id)
 {
-	struct rv1109_pmucru *pmucru = priv->pmucru;
+	struct rv1126_pmucru *pmucru = priv->pmucru;
 	u32 div, con;
 
 	switch (clk_id) {
@@ -219,10 +219,10 @@ static ulong rv1109_i2c_get_pmuclk(struct rv1109_pmuclk_priv *priv,
 	return DIV_TO_RATE(priv->gpll_hz, div);
 }
 
-static ulong rv1109_i2c_set_pmuclk(struct rv1109_pmuclk_priv *priv,
+static ulong rv1126_i2c_set_pmuclk(struct rv1126_pmuclk_priv *priv,
 				   ulong clk_id, ulong rate)
 {
-	struct rv1109_pmucru *pmucru = priv->pmucru;
+	struct rv1126_pmucru *pmucru = priv->pmucru;
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);
@@ -241,13 +241,13 @@ static ulong rv1109_i2c_set_pmuclk(struct rv1109_pmuclk_priv *priv,
 		return -ENOENT;
 	}
 
-	return rv1109_i2c_get_pmuclk(priv, clk_id);
+	return rv1126_i2c_get_pmuclk(priv, clk_id);
 }
 
-static ulong rv1109_pwm_get_pmuclk(struct rv1109_pmuclk_priv *priv,
+static ulong rv1126_pwm_get_pmuclk(struct rv1126_pmuclk_priv *priv,
 				   ulong clk_id)
 {
-	struct rv1109_pmucru *pmucru = priv->pmucru;
+	struct rv1126_pmucru *pmucru = priv->pmucru;
 	u32 div, sel, con;
 
 	switch (clk_id) {
@@ -272,10 +272,10 @@ static ulong rv1109_pwm_get_pmuclk(struct rv1109_pmuclk_priv *priv,
 	return DIV_TO_RATE(priv->gpll_hz, div);
 }
 
-static ulong rv1109_pwm_set_pmuclk(struct rv1109_pmuclk_priv *priv,
+static ulong rv1126_pwm_set_pmuclk(struct rv1126_pmuclk_priv *priv,
 				   ulong clk_id, ulong rate)
 {
-	struct rv1109_pmucru *pmucru = priv->pmucru;
+	struct rv1126_pmucru *pmucru = priv->pmucru;
 	int src_clk_div;
 
 	switch (clk_id) {
@@ -319,12 +319,12 @@ static ulong rv1109_pwm_set_pmuclk(struct rv1109_pmuclk_priv *priv,
 		return -ENOENT;
 	}
 
-	return rv1109_pwm_get_pmuclk(priv, clk_id);
+	return rv1126_pwm_get_pmuclk(priv, clk_id);
 }
 
-static ulong rv1109_spi_get_pmuclk(struct rv1109_pmuclk_priv *priv)
+static ulong rv1126_spi_get_pmuclk(struct rv1126_pmuclk_priv *priv)
 {
-	struct rv1109_pmucru *pmucru = priv->pmucru;
+	struct rv1126_pmucru *pmucru = priv->pmucru;
 	u32 div, con;
 
 	con = readl(&pmucru->pmu_clksel_con[9]);
@@ -333,10 +333,10 @@ static ulong rv1109_spi_get_pmuclk(struct rv1109_pmuclk_priv *priv)
 	return DIV_TO_RATE(priv->gpll_hz, div);
 }
 
-static ulong rv1109_spi_set_pmuclk(struct rv1109_pmuclk_priv *priv,
+static ulong rv1126_spi_set_pmuclk(struct rv1126_pmuclk_priv *priv,
 				   ulong rate)
 {
-	struct rv1109_pmucru *pmucru = priv->pmucru;
+	struct rv1126_pmucru *pmucru = priv->pmucru;
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);
@@ -347,12 +347,12 @@ static ulong rv1109_spi_set_pmuclk(struct rv1109_pmuclk_priv *priv,
 		     CLK_SPI0_SEL_GPLL << CLK_SPI0_SEL_SHIFT |
 		     (src_clk_div - 1) << CLK_SPI0_DIV_SHIFT);
 
-	return rv1109_spi_get_pmuclk(priv);
+	return rv1126_spi_get_pmuclk(priv);
 }
 
-static ulong rv1109_pdpmu_get_pmuclk(struct rv1109_pmuclk_priv *priv)
+static ulong rv1126_pdpmu_get_pmuclk(struct rv1126_pmuclk_priv *priv)
 {
-	struct rv1109_pmucru *pmucru = priv->pmucru;
+	struct rv1126_pmucru *pmucru = priv->pmucru;
 	u32 div, con;
 
 	con = readl(&pmucru->pmu_clksel_con[1]);
@@ -361,10 +361,10 @@ static ulong rv1109_pdpmu_get_pmuclk(struct rv1109_pmuclk_priv *priv)
 	return DIV_TO_RATE(priv->gpll_hz, div);
 }
 
-static ulong rv1109_pdpmu_set_pmuclk(struct rv1109_pmuclk_priv *priv,
+static ulong rv1126_pdpmu_set_pmuclk(struct rv1126_pmuclk_priv *priv,
 				     ulong rate)
 {
-	struct rv1109_pmucru *pmucru = priv->pmucru;
+	struct rv1126_pmucru *pmucru = priv->pmucru;
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);
@@ -374,12 +374,12 @@ static ulong rv1109_pdpmu_set_pmuclk(struct rv1109_pmuclk_priv *priv,
 		     PCLK_PDPMU_DIV_MASK,
 		     (src_clk_div - 1) << PCLK_PDPMU_DIV_SHIFT);
 
-	return rv1109_pdpmu_get_pmuclk(priv);
+	return rv1126_pdpmu_get_pmuclk(priv);
 }
 
-static ulong rv1109_pmuclk_get_rate(struct clk *clk)
+static ulong rv1126_pmuclk_get_rate(struct clk *clk)
 {
-	struct rv1109_pmuclk_priv *priv = dev_get_priv(clk->dev);
+	struct rv1126_pmuclk_priv *priv = dev_get_priv(clk->dev);
 	ulong rate = 0;
 
 	if (!priv->gpll_hz) {
@@ -390,24 +390,24 @@ static ulong rv1109_pmuclk_get_rate(struct clk *clk)
 	debug("%s %ld\n", __func__, clk->id);
 	switch (clk->id) {
 	case PLL_GPLL:
-		rate = rv1109_gpll_get_pmuclk(priv);
+		rate = rv1126_gpll_get_pmuclk(priv);
 		break;
 	case CLK_RTC32K:
-		rate = rv1109_rtc32k_get_pmuclk(priv);
+		rate = rv1126_rtc32k_get_pmuclk(priv);
 		break;
 	case CLK_I2C0:
 	case CLK_I2C2:
-		rate = rv1109_i2c_get_pmuclk(priv, clk->id);
+		rate = rv1126_i2c_get_pmuclk(priv, clk->id);
 		break;
 	case CLK_PWM0:
 	case CLK_PWM1:
-		rate = rv1109_pwm_get_pmuclk(priv, clk->id);
+		rate = rv1126_pwm_get_pmuclk(priv, clk->id);
 		break;
 	case CLK_SPI0:
-		rate = rv1109_spi_get_pmuclk(priv);
+		rate = rv1126_spi_get_pmuclk(priv);
 		break;
 	case PCLK_PDPMU:
-		rate = rv1109_pdpmu_get_pmuclk(priv);
+		rate = rv1126_pdpmu_get_pmuclk(priv);
 		break;
 	default:
 		return -ENOENT;
@@ -416,9 +416,9 @@ static ulong rv1109_pmuclk_get_rate(struct clk *clk)
 	return rate;
 }
 
-static ulong rv1109_pmuclk_set_rate(struct clk *clk, ulong rate)
+static ulong rv1126_pmuclk_set_rate(struct clk *clk, ulong rate)
 {
-	struct rv1109_pmuclk_priv *priv = dev_get_priv(clk->dev);
+	struct rv1126_pmuclk_priv *priv = dev_get_priv(clk->dev);
 	ulong ret = 0;
 
 	if (!priv->gpll_hz) {
@@ -429,24 +429,24 @@ static ulong rv1109_pmuclk_set_rate(struct clk *clk, ulong rate)
 	debug("%s %ld %ld\n", __func__, clk->id, rate);
 	switch (clk->id) {
 	case PLL_GPLL:
-		ret = rv1109_gpll_set_pmuclk(priv, rate);
+		ret = rv1126_gpll_set_pmuclk(priv, rate);
 		break;
 	case CLK_RTC32K:
-		ret = rv1109_rtc32k_set_pmuclk(priv, rate);
+		ret = rv1126_rtc32k_set_pmuclk(priv, rate);
 		break;
 	case CLK_I2C0:
 	case CLK_I2C2:
-		ret = rv1109_i2c_set_pmuclk(priv, clk->id, rate);
+		ret = rv1126_i2c_set_pmuclk(priv, clk->id, rate);
 		break;
 	case CLK_PWM0:
 	case CLK_PWM1:
-		ret = rv1109_pwm_set_pmuclk(priv, clk->id, rate);
+		ret = rv1126_pwm_set_pmuclk(priv, clk->id, rate);
 		break;
 	case CLK_SPI0:
-		ret = rv1109_spi_set_pmuclk(priv, rate);
+		ret = rv1126_spi_set_pmuclk(priv, rate);
 		break;
 	case PCLK_PDPMU:
-		ret = rv1109_pdpmu_set_pmuclk(priv, rate);
+		ret = rv1126_pdpmu_set_pmuclk(priv, rate);
 		break;
 	default:
 		return -ENOENT;
@@ -455,10 +455,10 @@ static ulong rv1109_pmuclk_set_rate(struct clk *clk, ulong rate)
 	return ret;
 }
 
-static int rv1109_rtc32k_set_parent(struct clk *clk, struct clk *parent)
+static int rv1126_rtc32k_set_parent(struct clk *clk, struct clk *parent)
 {
-	struct rv1109_pmuclk_priv *priv = dev_get_priv(clk->dev);
-	struct rv1109_pmucru *pmucru = priv->pmucru;
+	struct rv1126_pmuclk_priv *priv = dev_get_priv(clk->dev);
+	struct rv1126_pmucru *pmucru = priv->pmucru;
 
 	if (parent->id == CLK_OSC0_DIV32K)
 		rk_clrsetreg(&pmucru->pmu_clksel_con[0], RTC32K_SEL_MASK,
@@ -470,40 +470,40 @@ static int rv1109_rtc32k_set_parent(struct clk *clk, struct clk *parent)
 	return 0;
 }
 
-static int rv1109_pmuclk_set_parent(struct clk *clk, struct clk *parent)
+static int rv1126_pmuclk_set_parent(struct clk *clk, struct clk *parent)
 {
 	switch (clk->id) {
 	case CLK_RTC32K:
-		return rv1109_rtc32k_set_parent(clk, parent);
+		return rv1126_rtc32k_set_parent(clk, parent);
 	default:
 		return -ENOENT;
 	}
 }
-static struct clk_ops rv1109_pmuclk_ops = {
-	.get_rate = rv1109_pmuclk_get_rate,
-	.set_rate = rv1109_pmuclk_set_rate,
-	.set_parent = rv1109_pmuclk_set_parent,
+static struct clk_ops rv1126_pmuclk_ops = {
+	.get_rate = rv1126_pmuclk_get_rate,
+	.set_rate = rv1126_pmuclk_set_rate,
+	.set_parent = rv1126_pmuclk_set_parent,
 };
 
-static int rv1109_pmuclk_probe(struct udevice *dev)
+static int rv1126_pmuclk_probe(struct udevice *dev)
 {
-	struct rv1109_pmuclk_priv *priv = dev_get_priv(dev);
+	struct rv1126_pmuclk_priv *priv = dev_get_priv(dev);
 
-	priv->gpll_hz =	rv1109_gpll_get_pmuclk(priv);
+	priv->gpll_hz =	rv1126_gpll_get_pmuclk(priv);
 
 	return 0;
 }
 
-static int rv1109_pmuclk_ofdata_to_platdata(struct udevice *dev)
+static int rv1126_pmuclk_ofdata_to_platdata(struct udevice *dev)
 {
-	struct rv1109_pmuclk_priv *priv = dev_get_priv(dev);
+	struct rv1126_pmuclk_priv *priv = dev_get_priv(dev);
 
 	priv->pmucru = dev_read_addr_ptr(dev);
 
 	return 0;
 }
 
-static int rv1109_pmuclk_bind(struct udevice *dev)
+static int rv1126_pmuclk_bind(struct udevice *dev)
 {
 	int ret = 0;
 	struct udevice *sf_child;
@@ -516,7 +516,7 @@ static int rv1109_pmuclk_bind(struct udevice *dev)
 		debug("Warning: No rockchip reset driver: ret=%d\n", ret);
 	} else {
 		sf_priv = malloc(sizeof(struct softreset_reg));
-		sf_priv->sf_reset_offset = offsetof(struct rv1109_pmucru,
+		sf_priv->sf_reset_offset = offsetof(struct rv1126_pmucru,
 						    pmu_softrst_con[0]);
 		sf_priv->sf_reset_num = 2;
 		sf_child->priv = sf_priv;
@@ -525,30 +525,30 @@ static int rv1109_pmuclk_bind(struct udevice *dev)
 	return 0;
 }
 
-static const struct udevice_id rv1109_pmuclk_ids[] = {
-	{ .compatible = "rockchip,rv1109-pmucru" },
+static const struct udevice_id rv1126_pmuclk_ids[] = {
+	{ .compatible = "rockchip,rv1126-pmucru" },
 	{ }
 };
 
-U_BOOT_DRIVER(rockchip_rv1109_pmucru) = {
-	.name		= "rockchip_rv1109_pmucru",
+U_BOOT_DRIVER(rockchip_rv1126_pmucru) = {
+	.name		= "rockchip_rv1126_pmucru",
 	.id		= UCLASS_CLK,
-	.of_match	= rv1109_pmuclk_ids,
-	.priv_auto_alloc_size = sizeof(struct rv1109_pmuclk_priv),
-	.ofdata_to_platdata = rv1109_pmuclk_ofdata_to_platdata,
-	.ops		= &rv1109_pmuclk_ops,
-	.bind		= rv1109_pmuclk_bind,
-	.probe		= rv1109_pmuclk_probe,
+	.of_match	= rv1126_pmuclk_ids,
+	.priv_auto_alloc_size = sizeof(struct rv1126_pmuclk_priv),
+	.ofdata_to_platdata = rv1126_pmuclk_ofdata_to_platdata,
+	.ops		= &rv1126_pmuclk_ops,
+	.bind		= rv1126_pmuclk_bind,
+	.probe		= rv1126_pmuclk_probe,
 };
 
 
-static int rv1109_armclk_set_clk(struct rv1109_clk_priv *priv, ulong hz)
+static int rv1126_armclk_set_clk(struct rv1126_clk_priv *priv, ulong hz)
 {
-	struct rv1109_cru *cru = priv->cru;
+	struct rv1126_cru *cru = priv->cru;
 	const struct rockchip_cpu_rate_table *rate;
 	ulong old_rate;
 
-	rate = rockchip_get_cpu_settings(rv1109_cpu_rates, hz);
+	rate = rockchip_get_cpu_settings(rv1126_cpu_rates, hz);
 	if (!rate) {
 		printf("%s unsupported rate\n", __func__);
 		return -EINVAL;
@@ -557,10 +557,10 @@ static int rv1109_armclk_set_clk(struct rv1109_clk_priv *priv, ulong hz)
 	/*
 	 * set up dependent divisors for DBG and ACLK clocks.
 	 */
-	old_rate = rockchip_pll_get_rate(&rv1109_pll_clks[APLL],
+	old_rate = rockchip_pll_get_rate(&rv1126_pll_clks[APLL],
 					 priv->cru, APLL);
 	if (old_rate > hz) {
-		if (rockchip_pll_set_rate(&rv1109_pll_clks[APLL],
+		if (rockchip_pll_set_rate(&rv1126_pll_clks[APLL],
 					  priv->cru, APLL, hz))
 			return -EINVAL;
 		rk_clrsetreg(&cru->clksel_con[1],
@@ -572,7 +572,7 @@ static int rv1109_armclk_set_clk(struct rv1109_clk_priv *priv, ulong hz)
 			     CORE_DBG_DIV_MASK | CORE_ACLK_DIV_MASK,
 			     rate->pclk_div << CORE_DBG_DIV_SHIFT |
 			     rate->aclk_div << CORE_ACLK_DIV_SHIFT);
-		if (rockchip_pll_set_rate(&rv1109_pll_clks[APLL],
+		if (rockchip_pll_set_rate(&rv1126_pll_clks[APLL],
 					  priv->cru, APLL, hz))
 			return -EINVAL;
 	}
@@ -580,9 +580,9 @@ static int rv1109_armclk_set_clk(struct rv1109_clk_priv *priv, ulong hz)
 	return 0;
 }
 
-static ulong rv1109_pdcore_get_clk(struct rv1109_clk_priv *priv)
+static ulong rv1126_pdcore_get_clk(struct rv1126_clk_priv *priv)
 {
-	struct rv1109_cru *cru = priv->cru;
+	struct rv1126_cru *cru = priv->cru;
 	u32 con, div;
 
 	con = readl(&cru->clksel_con[0]);
@@ -591,9 +591,9 @@ static ulong rv1109_pdcore_get_clk(struct rv1109_clk_priv *priv)
 	return DIV_TO_RATE(priv->gpll_hz, div);
 }
 
-static ulong rv1109_pdcore_set_clk(struct rv1109_clk_priv *priv, ulong rate)
+static ulong rv1126_pdcore_set_clk(struct rv1126_clk_priv *priv, ulong rate)
 {
-	struct rv1109_cru *cru = priv->cru;
+	struct rv1126_cru *cru = priv->cru;
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(priv->cpll_hz, rate);
@@ -602,12 +602,12 @@ static ulong rv1109_pdcore_set_clk(struct rv1109_clk_priv *priv, ulong rate)
 	rk_clrsetreg(&cru->clksel_con[0], CORE_HCLK_DIV_MASK,
 		     (src_clk_div - 1) << CORE_HCLK_DIV_SHIFT);
 
-	return rv1109_pdcore_get_clk(priv);
+	return rv1126_pdcore_get_clk(priv);
 }
 
-static ulong rv1109_pdbus_get_clk(struct rv1109_clk_priv *priv, ulong clk_id)
+static ulong rv1126_pdbus_get_clk(struct rv1126_clk_priv *priv, ulong clk_id)
 {
-	struct rv1109_cru *cru = priv->cru;
+	struct rv1126_cru *cru = priv->cru;
 	u32 con, div, sel, parent;
 
 	switch (clk_id) {
@@ -639,10 +639,10 @@ static ulong rv1109_pdbus_get_clk(struct rv1109_clk_priv *priv, ulong clk_id)
 	return DIV_TO_RATE(parent, div);
 }
 
-static ulong rv1109_pdbus_set_clk(struct rv1109_clk_priv *priv, ulong clk_id,
+static ulong rv1126_pdbus_set_clk(struct rv1126_clk_priv *priv, ulong clk_id,
 				  ulong rate)
 {
-	struct rv1109_cru *cru = priv->cru;
+	struct rv1126_cru *cru = priv->cru;
 	int src_clk_div;
 
 	switch (clk_id) {
@@ -676,12 +676,12 @@ static ulong rv1109_pdbus_set_clk(struct rv1109_clk_priv *priv, ulong clk_id,
 		return -EINVAL;
 	}
 
-	return rv1109_pdbus_get_clk(priv, clk_id);
+	return rv1126_pdbus_get_clk(priv, clk_id);
 }
 
-static ulong rv1109_pdphp_get_clk(struct rv1109_clk_priv *priv, ulong clk_id)
+static ulong rv1126_pdphp_get_clk(struct rv1126_clk_priv *priv, ulong clk_id)
 {
-	struct rv1109_cru *cru = priv->cru;
+	struct rv1126_cru *cru = priv->cru;
 	u32 con, div, parent;
 
 	switch (clk_id) {
@@ -702,10 +702,10 @@ static ulong rv1109_pdphp_get_clk(struct rv1109_clk_priv *priv, ulong clk_id)
 	return DIV_TO_RATE(parent, div);
 }
 
-static ulong rv1109_pdphp_set_clk(struct rv1109_clk_priv *priv, ulong clk_id,
+static ulong rv1126_pdphp_set_clk(struct rv1126_clk_priv *priv, ulong clk_id,
 				  ulong rate)
 {
-	struct rv1109_cru *cru = priv->cru;
+	struct rv1126_cru *cru = priv->cru;
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(priv->cpll_hz, rate);
@@ -728,12 +728,12 @@ static ulong rv1109_pdphp_set_clk(struct rv1109_clk_priv *priv, ulong clk_id,
 		return -EINVAL;
 	}
 
-	return rv1109_pdphp_get_clk(priv, clk_id);
+	return rv1126_pdphp_get_clk(priv, clk_id);
 }
 
-static ulong rv1109_pdaudio_get_clk(struct rv1109_clk_priv *priv)
+static ulong rv1126_pdaudio_get_clk(struct rv1126_clk_priv *priv)
 {
-	struct rv1109_cru *cru = priv->cru;
+	struct rv1126_cru *cru = priv->cru;
 	u32 con, div;
 
 	con = readl(&cru->clksel_con[26]);
@@ -742,9 +742,9 @@ static ulong rv1109_pdaudio_get_clk(struct rv1109_clk_priv *priv)
 	return DIV_TO_RATE(priv->gpll_hz, div);
 }
 
-static ulong rv1109_pdaudio_set_clk(struct rv1109_clk_priv *priv, ulong rate)
+static ulong rv1126_pdaudio_set_clk(struct rv1126_clk_priv *priv, ulong rate)
 {
-	struct rv1109_cru *cru = priv->cru;
+	struct rv1126_cru *cru = priv->cru;
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(priv->cpll_hz, rate);
@@ -753,12 +753,12 @@ static ulong rv1109_pdaudio_set_clk(struct rv1109_clk_priv *priv, ulong rate)
 	rk_clrsetreg(&cru->clksel_con[26], HCLK_PDAUDIO_DIV_MASK,
 		     (src_clk_div - 1) << HCLK_PDAUDIO_DIV_SHIFT);
 
-	return rv1109_pdaudio_get_clk(priv);
+	return rv1126_pdaudio_get_clk(priv);
 }
 
-static ulong rv1109_i2c_get_clk(struct rv1109_clk_priv *priv, ulong clk_id)
+static ulong rv1126_i2c_get_clk(struct rv1126_clk_priv *priv, ulong clk_id)
 {
-	struct rv1109_cru *cru = priv->cru;
+	struct rv1126_cru *cru = priv->cru;
 	u32 div, con;
 
 	switch (clk_id) {
@@ -785,10 +785,10 @@ static ulong rv1109_i2c_get_clk(struct rv1109_clk_priv *priv, ulong clk_id)
 	return DIV_TO_RATE(priv->gpll_hz, div);
 }
 
-static ulong rv1109_i2c_set_clk(struct rv1109_clk_priv *priv, ulong clk_id,
+static ulong rv1126_i2c_set_clk(struct rv1126_clk_priv *priv, ulong clk_id,
 				ulong rate)
 {
-	struct rv1109_cru *cru = priv->cru;
+	struct rv1126_cru *cru = priv->cru;
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);
@@ -815,12 +815,12 @@ static ulong rv1109_i2c_set_clk(struct rv1109_clk_priv *priv, ulong clk_id,
 		return -ENOENT;
 	}
 
-	return rv1109_i2c_get_clk(priv, clk_id);
+	return rv1126_i2c_get_clk(priv, clk_id);
 }
 
-static ulong rv1109_spi_get_clk(struct rv1109_clk_priv *priv)
+static ulong rv1126_spi_get_clk(struct rv1126_clk_priv *priv)
 {
-	struct rv1109_cru *cru = priv->cru;
+	struct rv1126_cru *cru = priv->cru;
 	u32 div, con;
 
 	con = readl(&cru->clksel_con[8]);
@@ -829,9 +829,9 @@ static ulong rv1109_spi_get_clk(struct rv1109_clk_priv *priv)
 	return DIV_TO_RATE(priv->gpll_hz, div);
 }
 
-static ulong rv1109_spi_set_clk(struct rv1109_clk_priv *priv, ulong rate)
+static ulong rv1126_spi_set_clk(struct rv1126_clk_priv *priv, ulong rate)
 {
-	struct rv1109_cru *cru = priv->cru;
+	struct rv1126_cru *cru = priv->cru;
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);
@@ -842,12 +842,12 @@ static ulong rv1109_spi_set_clk(struct rv1109_clk_priv *priv, ulong rate)
 		     CLK_SPI1_SEL_GPLL << CLK_SPI1_SEL_SHIFT |
 		     (src_clk_div - 1) << CLK_SPI1_DIV_SHIFT);
 
-	return rv1109_spi_get_clk(priv);
+	return rv1126_spi_get_clk(priv);
 }
 
-static ulong rv1109_pwm_get_clk(struct rv1109_clk_priv *priv)
+static ulong rv1126_pwm_get_clk(struct rv1126_clk_priv *priv)
 {
-	struct rv1109_cru *cru = priv->cru;
+	struct rv1126_cru *cru = priv->cru;
 	u32 div, sel, con;
 
 	con = readl(&cru->clksel_con[9]);
@@ -859,9 +859,9 @@ static ulong rv1109_pwm_get_clk(struct rv1109_clk_priv *priv)
 	return DIV_TO_RATE(priv->gpll_hz, div);
 }
 
-static ulong rv1109_pwm_set_clk(struct rv1109_clk_priv *priv, ulong rate)
+static ulong rv1126_pwm_set_clk(struct rv1126_clk_priv *priv, ulong rate)
 {
-	struct rv1109_cru *cru = priv->cru;
+	struct rv1126_cru *cru = priv->cru;
 	int src_clk_div;
 
 	if (rate == OSC_HZ) {
@@ -877,12 +877,12 @@ static ulong rv1109_pwm_set_clk(struct rv1109_clk_priv *priv, ulong rate)
 			     CLK_PWM2_SEL_GPLL << CLK_PWM2_SEL_SHIFT);
 	}
 
-	return rv1109_pwm_get_clk(priv);
+	return rv1126_pwm_get_clk(priv);
 }
 
-static ulong rv1109_saradc_get_clk(struct rv1109_clk_priv *priv)
+static ulong rv1126_saradc_get_clk(struct rv1126_clk_priv *priv)
 {
-	struct rv1109_cru *cru = priv->cru;
+	struct rv1126_cru *cru = priv->cru;
 	u32 div, con;
 
 	con = readl(&cru->clksel_con[20]);
@@ -891,9 +891,9 @@ static ulong rv1109_saradc_get_clk(struct rv1109_clk_priv *priv)
 	return DIV_TO_RATE(OSC_HZ, div);
 }
 
-static ulong rv1109_saradc_set_clk(struct rv1109_clk_priv *priv, ulong rate)
+static ulong rv1126_saradc_set_clk(struct rv1126_clk_priv *priv, ulong rate)
 {
-	struct rv1109_cru *cru = priv->cru;
+	struct rv1126_cru *cru = priv->cru;
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(OSC_HZ, rate);
@@ -901,12 +901,12 @@ static ulong rv1109_saradc_set_clk(struct rv1109_clk_priv *priv, ulong rate)
 	rk_clrsetreg(&cru->clksel_con[20], CLK_SARADC_DIV_MASK,
 		     (src_clk_div - 1) << CLK_SARADC_DIV_SHIFT);
 
-	return rv1109_saradc_get_clk(priv);
+	return rv1126_saradc_get_clk(priv);
 }
 
-static ulong rv1109_crypto_get_clk(struct rv1109_clk_priv *priv, ulong clk_id)
+static ulong rv1126_crypto_get_clk(struct rv1126_clk_priv *priv, ulong clk_id)
 {
-	struct rv1109_cru *cru = priv->cru;
+	struct rv1126_cru *cru = priv->cru;
 	u32 div, sel, con, parent;
 
 	switch (clk_id) {
@@ -950,10 +950,10 @@ static ulong rv1109_crypto_get_clk(struct rv1109_clk_priv *priv, ulong clk_id)
 	return DIV_TO_RATE(parent, div);
 }
 
-static ulong rv1109_crypto_set_clk(struct rv1109_clk_priv *priv, ulong clk_id,
+static ulong rv1126_crypto_set_clk(struct rv1126_clk_priv *priv, ulong clk_id,
 				   ulong rate)
 {
-	struct rv1109_cru *cru = priv->cru;
+	struct rv1126_cru *cru = priv->cru;
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);
@@ -986,12 +986,12 @@ static ulong rv1109_crypto_set_clk(struct rv1109_clk_priv *priv, ulong clk_id,
 		return -ENOENT;
 	}
 
-	return rv1109_crypto_get_clk(priv, clk_id);
+	return rv1126_crypto_get_clk(priv, clk_id);
 }
 
-static ulong rv1109_mmc_get_clk(struct rv1109_clk_priv *priv, ulong clk_id)
+static ulong rv1126_mmc_get_clk(struct rv1126_clk_priv *priv, ulong clk_id)
 {
-	struct rv1109_cru *cru = priv->cru;
+	struct rv1126_cru *cru = priv->cru;
 	u32 div, sel, con, con_id;
 
 	switch (clk_id) {
@@ -1025,10 +1025,10 @@ static ulong rv1109_mmc_get_clk(struct rv1109_clk_priv *priv, ulong clk_id)
 	return -ENOENT;
 }
 
-static ulong rv1109_emmc_set_clk(struct rv1109_clk_priv *priv, ulong clk_id,
+static ulong rv1126_emmc_set_clk(struct rv1126_clk_priv *priv, ulong clk_id,
 				 ulong rate)
 {
-	struct rv1109_cru *cru = priv->cru;
+	struct rv1126_cru *cru = priv->cru;
 	int src_clk_div;
 	u32 con_id;
 
@@ -1067,12 +1067,12 @@ static ulong rv1109_emmc_set_clk(struct rv1109_clk_priv *priv, ulong clk_id,
 			     (src_clk_div - 1) << EMMC_DIV_SHIFT);
 	}
 
-	return rv1109_mmc_get_clk(priv, clk_id);
+	return rv1126_mmc_get_clk(priv, clk_id);
 }
 
-static ulong rv1109_aclk_vop_get_clk(struct rv1109_clk_priv *priv)
+static ulong rv1126_aclk_vop_get_clk(struct rv1126_clk_priv *priv)
 {
-	struct rv1109_cru *cru = priv->cru;
+	struct rv1126_cru *cru = priv->cru;
 	u32 div, sel, con, parent;
 
 	con = readl(&cru->clksel_con[45]);
@@ -1088,9 +1088,9 @@ static ulong rv1109_aclk_vop_get_clk(struct rv1109_clk_priv *priv)
 	return DIV_TO_RATE(parent, div);
 }
 
-static ulong rv1109_aclk_vop_set_clk(struct rv1109_clk_priv *priv, ulong rate)
+static ulong rv1126_aclk_vop_set_clk(struct rv1126_clk_priv *priv, ulong rate)
 {
-	struct rv1109_cru *cru = priv->cru;
+	struct rv1126_cru *cru = priv->cru;
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);
@@ -1100,12 +1100,12 @@ static ulong rv1109_aclk_vop_set_clk(struct rv1109_clk_priv *priv, ulong rate)
 		     ACLK_PDVO_SEL_GPLL << ACLK_PDVO_SEL_SHIFT |
 		     (src_clk_div - 1) << ACLK_PDVO_DIV_SHIFT);
 
-	return rv1109_aclk_vop_get_clk(priv);
+	return rv1126_aclk_vop_get_clk(priv);
 }
 
-static ulong rv1109_dclk_vop_get_clk(struct rv1109_clk_priv *priv)
+static ulong rv1126_dclk_vop_get_clk(struct rv1126_clk_priv *priv)
 {
-	struct rv1109_cru *cru = priv->cru;
+	struct rv1126_cru *cru = priv->cru;
 	u32 div, sel, con, parent;
 
 	con = readl(&cru->clksel_con[47]);
@@ -1121,9 +1121,9 @@ static ulong rv1109_dclk_vop_get_clk(struct rv1109_clk_priv *priv)
 	return DIV_TO_RATE(parent, div);
 }
 
-static ulong rv1109_dclk_vop_set_clk(struct rv1109_clk_priv *priv, ulong rate)
+static ulong rv1126_dclk_vop_set_clk(struct rv1126_clk_priv *priv, ulong rate)
 {
-	struct rv1109_cru *cru = priv->cru;
+	struct rv1126_cru *cru = priv->cru;
 	ulong pll_rate, now, best_rate = 0;
 	u32 i, div, best_div = 0, best_sel = 0;
 
@@ -1164,12 +1164,12 @@ static ulong rv1109_dclk_vop_set_clk(struct rv1109_clk_priv *priv, ulong rate)
 	}
 
 
-	return rv1109_dclk_vop_get_clk(priv);
+	return rv1126_dclk_vop_get_clk(priv);
 }
 
-static ulong rv1109_clk_get_rate(struct clk *clk)
+static ulong rv1126_clk_get_rate(struct clk *clk)
 {
-	struct rv1109_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rv1126_clk_priv *priv = dev_get_priv(clk->dev);
 	ulong rate = 0;
 
 	if (!priv->gpll_hz) {
@@ -1180,47 +1180,47 @@ static ulong rv1109_clk_get_rate(struct clk *clk)
 	switch (clk->id) {
 	case PLL_APLL:
 	case ARMCLK:
-		rate = rockchip_pll_get_rate(&rv1109_pll_clks[APLL], priv->cru,
+		rate = rockchip_pll_get_rate(&rv1126_pll_clks[APLL], priv->cru,
 					     APLL);
 		break;
 	case PLL_CPLL:
-		rate = rockchip_pll_get_rate(&rv1109_pll_clks[CPLL], priv->cru,
+		rate = rockchip_pll_get_rate(&rv1126_pll_clks[CPLL], priv->cru,
 					     CPLL);
 		break;
 	case HCLK_PDCORE_NIU:
-		rate = rv1109_pdcore_get_clk(priv);
+		rate = rv1126_pdcore_get_clk(priv);
 		break;
 	case ACLK_PDBUS:
 	case HCLK_PDBUS:
 	case PCLK_PDBUS:
-		rate = rv1109_pdbus_get_clk(priv, clk->id);
+		rate = rv1126_pdbus_get_clk(priv, clk->id);
 		break;
 	case ACLK_PDPHP:
 	case HCLK_PDPHP:
-		rate = rv1109_pdphp_get_clk(priv, clk->id);
+		rate = rv1126_pdphp_get_clk(priv, clk->id);
 		break;
 	case HCLK_PDAUDIO:
-		rate = rv1109_pdaudio_get_clk(priv);
+		rate = rv1126_pdaudio_get_clk(priv);
 		break;
 	case CLK_I2C1:
 	case CLK_I2C3:
 	case CLK_I2C4:
 	case CLK_I2C5:
-		rate = rv1109_i2c_get_clk(priv, clk->id);
+		rate = rv1126_i2c_get_clk(priv, clk->id);
 		break;
 	case CLK_SPI1:
-		rate = rv1109_spi_get_clk(priv);
+		rate = rv1126_spi_get_clk(priv);
 		break;
 	case CLK_PWM2:
-		rate = rv1109_pwm_get_clk(priv);
+		rate = rv1126_pwm_get_clk(priv);
 		break;
 	case CLK_SARADC:
-		rate = rv1109_saradc_get_clk(priv);
+		rate = rv1126_saradc_get_clk(priv);
 		break;
 	case CLK_CRYPTO_CORE:
 	case CLK_CRYPTO_PKA:
 	case ACLK_CRYPTO:
-		rate = rv1109_crypto_get_clk(priv, clk->id);
+		rate = rv1126_crypto_get_clk(priv, clk->id);
 		break;
 	case CLK_SDMMC:
 	case HCLK_SDMMC:
@@ -1229,14 +1229,14 @@ static ulong rv1109_clk_get_rate(struct clk *clk)
 	case CLK_EMMC:
 	case HCLK_EMMC:
 	case SCLK_EMMC_SAMPLE:
-		rate = rv1109_mmc_get_clk(priv, clk->id);
+		rate = rv1126_mmc_get_clk(priv, clk->id);
 		break;
 	case ACLK_PDVO:
 	case ACLK_VOP:
-		rate = rv1109_aclk_vop_get_clk(priv);
+		rate = rv1126_aclk_vop_get_clk(priv);
 		break;
 	case DCLK_VOP:
-		rate = rv1109_dclk_vop_get_clk(priv);
+		rate = rv1126_dclk_vop_get_clk(priv);
 		break;
 	default:
 		return -ENOENT;
@@ -1245,9 +1245,9 @@ static ulong rv1109_clk_get_rate(struct clk *clk)
 	return rate;
 };
 
-static ulong rv1109_clk_set_rate(struct clk *clk, ulong rate)
+static ulong rv1126_clk_set_rate(struct clk *clk, ulong rate)
 {
-	struct rv1109_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rv1126_clk_priv *priv = dev_get_priv(clk->dev);
 	ulong ret = 0;
 
 	if (!priv->gpll_hz) {
@@ -1259,47 +1259,47 @@ static ulong rv1109_clk_set_rate(struct clk *clk, ulong rate)
 	case PLL_APLL:
 	case ARMCLK:
 		if (priv->armclk_hz)
-			rv1109_armclk_set_clk(priv, rate);
+			rv1126_armclk_set_clk(priv, rate);
 		priv->armclk_hz = rate;
 		break;
 	case PLL_CPLL:
-		ret = rockchip_pll_set_rate(&rv1109_pll_clks[CPLL], priv->cru,
+		ret = rockchip_pll_set_rate(&rv1126_pll_clks[CPLL], priv->cru,
 					    CPLL, rate);
 		break;
 	case ACLK_PDBUS:
 	case HCLK_PDBUS:
 	case PCLK_PDBUS:
-		ret = rv1109_pdbus_set_clk(priv, clk->id, rate);
+		ret = rv1126_pdbus_set_clk(priv, clk->id, rate);
 		break;
 	case ACLK_PDPHP:
 	case HCLK_PDPHP:
-		ret = rv1109_pdphp_set_clk(priv, clk->id, rate);
+		ret = rv1126_pdphp_set_clk(priv, clk->id, rate);
 		break;
 	case HCLK_PDCORE_NIU:
-		ret = rv1109_pdcore_set_clk(priv, rate);
+		ret = rv1126_pdcore_set_clk(priv, rate);
 		break;
 	case HCLK_PDAUDIO:
-		ret = rv1109_pdaudio_set_clk(priv, rate);
+		ret = rv1126_pdaudio_set_clk(priv, rate);
 		break;
 	case CLK_I2C1:
 	case CLK_I2C3:
 	case CLK_I2C4:
 	case CLK_I2C5:
-		ret = rv1109_i2c_set_clk(priv, clk->id, rate);
+		ret = rv1126_i2c_set_clk(priv, clk->id, rate);
 		break;
 	case CLK_SPI1:
-		ret = rv1109_spi_set_clk(priv, rate);
+		ret = rv1126_spi_set_clk(priv, rate);
 		break;
 	case CLK_PWM2:
-		ret = rv1109_pwm_set_clk(priv, rate);
+		ret = rv1126_pwm_set_clk(priv, rate);
 		break;
 	case CLK_SARADC:
-		ret = rv1109_saradc_set_clk(priv, rate);
+		ret = rv1126_saradc_set_clk(priv, rate);
 		break;
 	case CLK_CRYPTO_CORE:
 	case CLK_CRYPTO_PKA:
 	case ACLK_CRYPTO:
-		ret = rv1109_crypto_set_clk(priv, clk->id, rate);
+		ret = rv1126_crypto_set_clk(priv, clk->id, rate);
 		break;
 	case CLK_SDMMC:
 	case HCLK_SDMMC:
@@ -1307,14 +1307,14 @@ static ulong rv1109_clk_set_rate(struct clk *clk, ulong rate)
 	case HCLK_SDIO:
 	case CLK_EMMC:
 	case HCLK_EMMC:
-		ret = rv1109_emmc_set_clk(priv, clk->id, rate);
+		ret = rv1126_emmc_set_clk(priv, clk->id, rate);
 		break;
 	case ACLK_PDVO:
 	case ACLK_VOP:
-		ret = rv1109_aclk_vop_set_clk(priv, rate);
+		ret = rv1126_aclk_vop_set_clk(priv, rate);
 		break;
 	case DCLK_VOP:
-		ret = rv1109_dclk_vop_set_clk(priv, rate);
+		ret = rv1126_dclk_vop_set_clk(priv, rate);
 		break;
 	default:
 		return -ENOENT;
@@ -1335,15 +1335,15 @@ static ulong rv1109_clk_set_rate(struct clk *clk, ulong rate)
  */
 #define ROCKCHIP_MMC_DELAY_ELEMENT_PSEC 60
 
-int rv1109_mmc_get_phase(struct clk *clk)
+int rv1126_mmc_get_phase(struct clk *clk)
 {
-	struct rv1109_clk_priv *priv = dev_get_priv(clk->dev);
-	struct rv1109_cru *cru = priv->cru;
+	struct rv1126_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rv1126_cru *cru = priv->cru;
 	u32 raw_value, delay_num;
 	u16 degrees = 0;
 	ulong rate;
 
-	rate = rv1109_clk_get_rate(clk);
+	rate = rv1126_clk_get_rate(clk);
 	if (rate < 0)
 		return rate;
 
@@ -1370,15 +1370,15 @@ int rv1109_mmc_get_phase(struct clk *clk)
 	return degrees % 360;
 }
 
-int rv1109_mmc_set_phase(struct clk *clk, u32 degrees)
+int rv1126_mmc_set_phase(struct clk *clk, u32 degrees)
 {
-	struct rv1109_clk_priv *priv = dev_get_priv(clk->dev);
-	struct rv1109_cru *cru = priv->cru;
+	struct rv1126_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rv1126_cru *cru = priv->cru;
 	u8 nineties, remainder, delay_num;
 	u32 raw_value, delay;
 	ulong rate;
 
-	rate = rv1109_clk_get_rate(clk);
+	rate = rv1126_clk_get_rate(clk);
 	if (rate < 0)
 		return rate;
 
@@ -1409,12 +1409,12 @@ int rv1109_mmc_set_phase(struct clk *clk, u32 degrees)
 		writel(raw_value | 0xffff0000, &cru->sdio_con[1]);
 
 	debug("mmc set_phase(%d) delay_nums=%u reg=%#x actual_degrees=%d\n",
-	      degrees, delay_num, raw_value, rv1109_mmc_get_phase(clk));
+	      degrees, delay_num, raw_value, rv1126_mmc_get_phase(clk));
 
 	return 0;
 }
 
-static int rv1109_clk_get_phase(struct clk *clk)
+static int rv1126_clk_get_phase(struct clk *clk)
 {
 	int ret;
 
@@ -1423,7 +1423,7 @@ static int rv1109_clk_get_phase(struct clk *clk)
 	case SCLK_EMMC_SAMPLE:
 	case SCLK_SDMMC_SAMPLE:
 	case SCLK_SDIO_SAMPLE:
-		ret = rv1109_mmc_get_phase(clk);
+		ret = rv1126_mmc_get_phase(clk);
 		break;
 	default:
 		return -ENOENT;
@@ -1432,7 +1432,7 @@ static int rv1109_clk_get_phase(struct clk *clk)
 	return ret;
 }
 
-static int rv1109_clk_set_phase(struct clk *clk, int degrees)
+static int rv1126_clk_set_phase(struct clk *clk, int degrees)
 {
 	int ret;
 
@@ -1441,7 +1441,7 @@ static int rv1109_clk_set_phase(struct clk *clk, int degrees)
 	case SCLK_EMMC_SAMPLE:
 	case SCLK_SDMMC_SAMPLE:
 	case SCLK_SDIO_SAMPLE:
-		ret = rv1109_mmc_set_phase(clk, degrees);
+		ret = rv1126_mmc_set_phase(clk, degrees);
 		break;
 	default:
 		return -ENOENT;
@@ -1451,10 +1451,10 @@ static int rv1109_clk_set_phase(struct clk *clk, int degrees)
 }
 
 #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
-static int rv1109_gmac_src_set_parent(struct clk *clk, struct clk *parent)
+static int rv1126_gmac_src_set_parent(struct clk *clk, struct clk *parent)
 {
-	struct rv1109_clk_priv *priv = dev_get_priv(clk->dev);
-	struct rv1109_grf *grf = priv->grf;
+	struct rv1126_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rv1126_grf *grf = priv->grf;
 
 	if (parent->id == CLK_GMAC_SRC_M0)
 		rk_clrsetreg(&grf->iofunc_con1, GMAC_SRC_SEL_MASK,
@@ -1466,10 +1466,10 @@ static int rv1109_gmac_src_set_parent(struct clk *clk, struct clk *parent)
 	return 0;
 }
 
-static int rv1109_gmac_src_m0_set_parent(struct clk *clk, struct clk *parent)
+static int rv1126_gmac_src_m0_set_parent(struct clk *clk, struct clk *parent)
 {
-	struct rv1109_clk_priv *priv = dev_get_priv(clk->dev);
-	struct rv1109_cru *cru = priv->cru;
+	struct rv1126_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rv1126_cru *cru = priv->cru;
 
 	if (parent->id == CLK_GMAC_DIV)
 		rk_clrsetreg(&cru->gmac_con, GMAC_SRC_M0_SEL_MASK,
@@ -1481,10 +1481,10 @@ static int rv1109_gmac_src_m0_set_parent(struct clk *clk, struct clk *parent)
 	return 0;
 }
 
-static int rv1109_gmac_src_m1_set_parent(struct clk *clk, struct clk *parent)
+static int rv1126_gmac_src_m1_set_parent(struct clk *clk, struct clk *parent)
 {
-	struct rv1109_clk_priv *priv = dev_get_priv(clk->dev);
-	struct rv1109_cru *cru = priv->cru;
+	struct rv1126_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rv1126_cru *cru = priv->cru;
 
 	if (parent->id == CLK_GMAC_DIV)
 		rk_clrsetreg(&cru->gmac_con, GMAC_SRC_M0_SEL_MASK,
@@ -1496,15 +1496,15 @@ static int rv1109_gmac_src_m1_set_parent(struct clk *clk, struct clk *parent)
 	return 0;
 }
 
-static int rv1109_clk_set_parent(struct clk *clk, struct clk *parent)
+static int rv1126_clk_set_parent(struct clk *clk, struct clk *parent)
 {
 	switch (clk->id) {
 	case CLK_GMAC_SRC:
-		return rv1109_gmac_src_set_parent(clk, parent);
+		return rv1126_gmac_src_set_parent(clk, parent);
 	case CLK_GMAC_SRC_M0:
-		return rv1109_gmac_src_m0_set_parent(clk, parent);
+		return rv1126_gmac_src_m0_set_parent(clk, parent);
 	case CLK_GMAC_SRC_M1:
-		return rv1109_gmac_src_m1_set_parent(clk, parent);
+		return rv1126_gmac_src_m1_set_parent(clk, parent);
 	default:
 		return -ENOENT;
 	}
@@ -1513,24 +1513,24 @@ static int rv1109_clk_set_parent(struct clk *clk, struct clk *parent)
 }
 #endif
 
-static struct clk_ops rv1109_clk_ops = {
-	.get_rate = rv1109_clk_get_rate,
-	.set_rate = rv1109_clk_set_rate,
-	.get_phase = rv1109_clk_get_phase,
-	.set_phase = rv1109_clk_set_phase,
+static struct clk_ops rv1126_clk_ops = {
+	.get_rate = rv1126_clk_get_rate,
+	.set_rate = rv1126_clk_set_rate,
+	.get_phase = rv1126_clk_get_phase,
+	.set_phase = rv1126_clk_set_phase,
 #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
-	.set_parent = rv1109_clk_set_parent,
+	.set_parent = rv1126_clk_set_parent,
 #endif
 };
 
-static int rv1109_gpll_set_clk(ulong rate)
+static int rv1126_gpll_set_clk(ulong rate)
 {
 	struct udevice *pmucru_dev;
-	struct rv1109_pmuclk_priv *priv;
+	struct rv1126_pmuclk_priv *priv;
 	int ret;
 
 	ret = uclass_get_device_by_driver(UCLASS_CLK,
-					  DM_GET_DRIVER(rockchip_rv1109_pmucru),
+					  DM_GET_DRIVER(rockchip_rv1126_pmucru),
 					  &pmucru_dev);
 	if (ret) {
 		printf("%s: could not find pmucru device\n", __func__);
@@ -1538,63 +1538,63 @@ static int rv1109_gpll_set_clk(ulong rate)
 	}
 	priv = dev_get_priv(pmucru_dev);
 
-	ret = rv1109_gpll_set_pmuclk(priv, rate);
+	ret = rv1126_gpll_set_pmuclk(priv, rate);
 	if (ret) {
 		printf("%s: failed to set gpll rate %lu\n", __func__, rate);
 		return ret;
 	}
-	rv1109_pdpmu_set_pmuclk(priv, PCLK_PDPMU_HZ);
+	rv1126_pdpmu_set_pmuclk(priv, PCLK_PDPMU_HZ);
 
 	return ret;
 }
 
-static void rv1109_clk_init(struct rv1109_clk_priv *priv)
+static void rv1126_clk_init(struct rv1126_clk_priv *priv)
 {
 	int ret;
 
 	priv->sync_kernel = false;
 	if (!priv->armclk_enter_hz) {
 		priv->armclk_enter_hz =
-			rockchip_pll_get_rate(&rv1109_pll_clks[APLL],
+			rockchip_pll_get_rate(&rv1126_pll_clks[APLL],
 					      priv->cru, APLL);
 		priv->armclk_init_hz = priv->armclk_enter_hz ;
 	}
 
 	if (priv->armclk_init_hz != APLL_HZ) {
-		ret = rv1109_armclk_set_clk(priv, APLL_HZ);
+		ret = rv1126_armclk_set_clk(priv, APLL_HZ);
 		if (!ret)
 			priv->armclk_init_hz = APLL_HZ;
 	}
 	if (priv->gpll_hz != GPLL_HZ) {
-		ret = rv1109_gpll_set_clk(GPLL_HZ);
+		ret = rv1126_gpll_set_clk(GPLL_HZ);
 		if (!ret)
 			priv->gpll_hz = GPLL_HZ;
 	}
 	if (priv->cpll_hz != CPLL_HZ) {
-		ret = rockchip_pll_set_rate(&rv1109_pll_clks[CPLL], priv->cru,
+		ret = rockchip_pll_set_rate(&rv1126_pll_clks[CPLL], priv->cru,
 					    CPLL, CPLL_HZ);
 		if (!ret)
 			priv->cpll_hz = CPLL_HZ;
 	}
-	rv1109_pdbus_set_clk(priv, ACLK_PDBUS, ACLK_PDBUS_HZ);
-	rv1109_pdbus_set_clk(priv, HCLK_PDBUS, HCLK_PDBUS_HZ);
-	rv1109_pdbus_set_clk(priv, PCLK_PDBUS, PCLK_PDBUS_HZ);
-	rv1109_pdphp_set_clk(priv, ACLK_PDPHP, ACLK_PDPHP_HZ);
-	rv1109_pdphp_set_clk(priv, HCLK_PDPHP, HCLK_PDPHP_HZ);
-	rv1109_pdcore_set_clk(priv, HCLK_PDCORE_HZ);
-	rv1109_pdaudio_set_clk(priv, HCLK_PDAUDIO_HZ);
+	rv1126_pdbus_set_clk(priv, ACLK_PDBUS, ACLK_PDBUS_HZ);
+	rv1126_pdbus_set_clk(priv, HCLK_PDBUS, HCLK_PDBUS_HZ);
+	rv1126_pdbus_set_clk(priv, PCLK_PDBUS, PCLK_PDBUS_HZ);
+	rv1126_pdphp_set_clk(priv, ACLK_PDPHP, ACLK_PDPHP_HZ);
+	rv1126_pdphp_set_clk(priv, HCLK_PDPHP, HCLK_PDPHP_HZ);
+	rv1126_pdcore_set_clk(priv, HCLK_PDCORE_HZ);
+	rv1126_pdaudio_set_clk(priv, HCLK_PDAUDIO_HZ);
 }
 
-static int rv1109_clk_probe(struct udevice *dev)
+static int rv1126_clk_probe(struct udevice *dev)
 {
-	struct rv1109_clk_priv *priv = dev_get_priv(dev);
+	struct rv1126_clk_priv *priv = dev_get_priv(dev);
 	int ret;
 
 	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 	if (IS_ERR(priv->grf))
 		return PTR_ERR(priv->grf);
 
-	rv1109_clk_init(priv);
+	rv1126_clk_init(priv);
 
 	/* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
 	ret = clk_set_defaults(dev);
@@ -1606,16 +1606,16 @@ static int rv1109_clk_probe(struct udevice *dev)
 	return 0;
 }
 
-static int rv1109_clk_ofdata_to_platdata(struct udevice *dev)
+static int rv1126_clk_ofdata_to_platdata(struct udevice *dev)
 {
-	struct rv1109_clk_priv *priv = dev_get_priv(dev);
+	struct rv1126_clk_priv *priv = dev_get_priv(dev);
 
 	priv->cru = dev_read_addr_ptr(dev);
 
 	return 0;
 }
 
-static int rv1109_clk_bind(struct udevice *dev)
+static int rv1126_clk_bind(struct udevice *dev)
 {
 	int ret;
 	struct udevice *sys_child, *sf_child;
@@ -1629,9 +1629,9 @@ static int rv1109_clk_bind(struct udevice *dev)
 		debug("Warning: No sysreset driver: ret=%d\n", ret);
 	} else {
 		priv = malloc(sizeof(struct sysreset_reg));
-		priv->glb_srst_fst_value = offsetof(struct rv1109_cru,
+		priv->glb_srst_fst_value = offsetof(struct rv1126_cru,
 						    glb_srst_fst);
-		priv->glb_srst_snd_value = offsetof(struct rv1109_cru,
+		priv->glb_srst_snd_value = offsetof(struct rv1126_cru,
 						    glb_srst_snd);
 		sys_child->priv = priv;
 	}
@@ -1642,7 +1642,7 @@ static int rv1109_clk_bind(struct udevice *dev)
 		debug("Warning: No rockchip reset driver: ret=%d\n", ret);
 	} else {
 		sf_priv = malloc(sizeof(struct softreset_reg));
-		sf_priv->sf_reset_offset = offsetof(struct rv1109_cru,
+		sf_priv->sf_reset_offset = offsetof(struct rv1126_cru,
 						    softrst_con[0]);
 		sf_priv->sf_reset_num = 15;
 		sf_child->priv = sf_priv;
@@ -1651,20 +1651,20 @@ static int rv1109_clk_bind(struct udevice *dev)
 	return 0;
 }
 
-static const struct udevice_id rv1109_clk_ids[] = {
-	{ .compatible = "rockchip,rv1109-cru" },
+static const struct udevice_id rv1126_clk_ids[] = {
+	{ .compatible = "rockchip,rv1126-cru" },
 	{ }
 };
 
-U_BOOT_DRIVER(rockchip_rv1109_cru) = {
-	.name		= "rockchip_rv1109_cru",
+U_BOOT_DRIVER(rockchip_rv1126_cru) = {
+	.name		= "rockchip_rv1126_cru",
 	.id		= UCLASS_CLK,
-	.of_match	= rv1109_clk_ids,
-	.priv_auto_alloc_size = sizeof(struct rv1109_clk_priv),
-	.ofdata_to_platdata = rv1109_clk_ofdata_to_platdata,
-	.ops		= &rv1109_clk_ops,
-	.bind		= rv1109_clk_bind,
-	.probe		= rv1109_clk_probe,
+	.of_match	= rv1126_clk_ids,
+	.priv_auto_alloc_size = sizeof(struct rv1126_clk_priv),
+	.ofdata_to_platdata = rv1126_clk_ofdata_to_platdata,
+	.ops		= &rv1126_clk_ops,
+	.bind		= rv1126_clk_bind,
+	.probe		= rv1126_clk_probe,
 };
 
 #ifndef CONFIG_SPL_BUILD
@@ -1677,15 +1677,15 @@ U_BOOT_DRIVER(rockchip_rv1109_cru) = {
 int soc_clk_dump(void)
 {
 	struct udevice *cru_dev, *pmucru_dev;
-	struct rv1109_clk_priv *priv;
-	const struct rv1109_clk_info *clk_dump;
+	struct rv1126_clk_priv *priv;
+	const struct rv1126_clk_info *clk_dump;
 	struct clk clk;
 	unsigned long clk_count = ARRAY_SIZE(clks_dump);
 	unsigned long rate;
 	int i, ret;
 
 	ret = uclass_get_device_by_driver(UCLASS_CLK,
-					  DM_GET_DRIVER(rockchip_rv1109_cru),
+					  DM_GET_DRIVER(rockchip_rv1126_cru),
 					  &cru_dev);
 	if (ret) {
 		printf("%s failed to get cru device\n", __func__);
@@ -1693,7 +1693,7 @@ int soc_clk_dump(void)
 	}
 
 	ret = uclass_get_device_by_driver(UCLASS_CLK,
-					  DM_GET_DRIVER(rockchip_rv1109_pmucru),
+					  DM_GET_DRIVER(rockchip_rv1126_pmucru),
 					  &pmucru_dev);
 	if (ret) {
 		printf("%s failed to get pmucru device\n", __func__);
diff --git a/include/dt-bindings/clock/rv1109-cru.h b/include/dt-bindings/clock/rv1126-cru.h
similarity index 99%
rename from include/dt-bindings/clock/rv1109-cru.h
rename to include/dt-bindings/clock/rv1126-cru.h
index 3d97546780..3acf8068ed 100644
--- a/include/dt-bindings/clock/rv1109-cru.h
+++ b/include/dt-bindings/clock/rv1126-cru.h
@@ -4,8 +4,8 @@
  * Author: Finley Xiao <finley.xiao@rock-chips.com>
  */
 
-#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RV1109_H
-#define _DT_BINDINGS_CLK_ROCKCHIP_RV1109_H
+#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RV1126_H
+#define _DT_BINDINGS_CLK_ROCKCHIP_RV1126_H
 
 /* pmucru-clocks indices */
 

commit 1633e8d278acbacb4c1ecfc9907175a01ff2b261
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Feb 21 10:32:12 2020 +0800

    board: rockchip: rename rv1109 to rv1126
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ie5cec1508ec54e15b24909eafab275609de5adea

diff --git a/arch/arm/dts/rv1109-evb.dts b/arch/arm/dts/rv1126-evb.dts
similarity index 51%
rename from arch/arm/dts/rv1109-evb.dts
rename to arch/arm/dts/rv1126-evb.dts
index a15dc55165..7e17cbb986 100644
--- a/arch/arm/dts/rv1109-evb.dts
+++ b/arch/arm/dts/rv1126-evb.dts
@@ -4,12 +4,12 @@
  */
 
 /dts-v1/;
-#include "rv1109.dtsi"
-#include "rv1109-u-boot.dtsi"
+#include "rv1126.dtsi"
+#include "rv1126-u-boot.dtsi"
 
 / {
-	model = "Rockchip RV1109 Evaluation Board";
-	compatible = "rockchip,rv1109-evb", "rockchip,rv1109";
+	model = "Rockchip RV1126 Evaluation Board";
+	compatible = "rockchip,rv1126-evb", "rockchip,rv1126";
 };
 
 &uart2 {
diff --git a/arch/arm/dts/rv1109-u-boot.dtsi b/arch/arm/dts/rv1126-u-boot.dtsi
similarity index 100%
rename from arch/arm/dts/rv1109-u-boot.dtsi
rename to arch/arm/dts/rv1126-u-boot.dtsi
diff --git a/arch/arm/dts/rv1109.dtsi b/arch/arm/dts/rv1126.dtsi
similarity index 89%
rename from arch/arm/dts/rv1109.dtsi
rename to arch/arm/dts/rv1126.dtsi
index a4c6c29a62..05ea31c5fd 100644
--- a/arch/arm/dts/rv1109.dtsi
+++ b/arch/arm/dts/rv1126.dtsi
@@ -3,7 +3,7 @@
  * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd.
  */
 
-#include <dt-bindings/clock/rv1109-cru.h>
+#include <dt-bindings/clock/rv1126-cru.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -12,7 +12,7 @@
 	#address-cells = <1>;
 	#size-cells = <1>;
 
-	compatible = "rockchip,rv1109";
+	compatible = "rockchip,rv1126";
 
 	interrupt-parent = <&gic>;
 
@@ -81,7 +81,7 @@
 	};
 
 	grf: syscon@fe000000 {
-		compatible = "rockchip,rv1109-grf", "syscon";
+		compatible = "rockchip,rv1126-grf", "syscon";
 		reg = <0xfe000000 0x1000>;
 	};
 
@@ -116,7 +116,7 @@
 	};
 
 	uart1: serial@ff410000 {
-		compatible = "rockchip,rv1109-uart", "snps,dw-apb-uart";
+		compatible = "rockchip,rv1126-uart", "snps,dw-apb-uart";
 		reg = <0xff410000 0x100>;
 		interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
 		reg-shift = <2>;
@@ -128,7 +128,7 @@
 	};
 
 	pmucru: clock-controller@ff480000 {
-		compatible = "rockchip,rv1109-pmucru";
+		compatible = "rockchip,rv1126-pmucru";
 		reg = <0xff480000 0x1000>;
 		rockchip,grf = <&grf>;
 		#clock-cells = <1>;
@@ -136,7 +136,7 @@
 	};
 
 	cru: clock-controller@ff490000 {
-		compatible = "rockchip,rv1109-cru";
+		compatible = "rockchip,rv1126-cru";
 		reg = <0xff490000 0x1000>;
 		rockchip,grf = <&grf>;
 		#clock-cells = <1>;
@@ -154,7 +154,7 @@
 	};
 
 	uart0: serial@ff560000 {
-		compatible = "rockchip,rv1109-uart", "snps,dw-apb-uart";
+		compatible = "rockchip,rv1126-uart", "snps,dw-apb-uart";
 		reg = <0xff560000 0x100>;
 		interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
 		reg-shift = <2>;
@@ -166,7 +166,7 @@
 	};
 
 	uart2: serial@ff570000 {
-		compatible = "rockchip,rv1109-uart", "snps,dw-apb-uart";
+		compatible = "rockchip,rv1126-uart", "snps,dw-apb-uart";
 		reg = <0xff570000 0x100>;
 		interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
 		reg-shift = <2>;
@@ -178,7 +178,7 @@
 	};
 
 	uart3: serial@ff580000 {
-		compatible = "rockchip,rv1109-uart", "snps,dw-apb-uart";
+		compatible = "rockchip,rv1126-uart", "snps,dw-apb-uart";
 		reg = <0xff580000 0x100>;
 		interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
 		reg-shift = <2>;
@@ -190,7 +190,7 @@
 	};
 
 	uart4: serial@ff590000 {
-		compatible = "rockchip,rv1109-uart", "snps,dw-apb-uart";
+		compatible = "rockchip,rv1126-uart", "snps,dw-apb-uart";
 		reg = <0xff590000 0x100>;
 		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 		reg-shift = <2>;
@@ -202,7 +202,7 @@
 	};
 
 	uart5: serial@ff5a0000 {
-		compatible = "rockchip,rv1109-uart", "snps,dw-apb-uart";
+		compatible = "rockchip,rv1126-uart", "snps,dw-apb-uart";
 		reg = <0xff5a0000 0x100>;
 		interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 		reg-shift = <2>;
diff --git a/arch/arm/include/asm/arch-rockchip/cru_rv1109.h b/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
similarity index 92%
rename from arch/arm/include/asm/arch-rockchip/cru_rv1109.h
rename to arch/arm/include/asm/arch-rockchip/cru_rv1126.h
index bf9439feb3..2984dfb28c 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rv1109.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
@@ -4,8 +4,8 @@
  * Author: Finley Xiao <finley.xiao@rock-chips.com>
  */
 
-#ifndef _ASM_ARCH_CRU_RV1109_H
-#define _ASM_ARCH_CRU_RV1109_H
+#ifndef _ASM_ARCH_CRU_RV1126_H
+#define _ASM_ARCH_CRU_RV1126_H
 
 #include <common.h>
 
@@ -26,8 +26,8 @@
 #define HCLK_PDCORE_HZ	(100 * MHz)
 #define HCLK_PDAUDIO_HZ	(150 * MHz)
 
-/* RV1109 pll id */
-enum rv1109_pll_id {
+/* RV1126 pll id */
+enum rv1126_pll_id {
 	APLL,
 	DPLL,
 	CPLL,
@@ -36,21 +36,21 @@ enum rv1109_pll_id {
 	PLL_COUNT,
 };
 
-struct rv1109_clk_info {
+struct rv1126_clk_info {
 	unsigned long id;
 	char *name;
 	bool is_cru;
 };
 
 /* Private data for the clock driver - used by rockchip_get_cru() */
-struct rv1109_pmuclk_priv {
-	struct rv1109_pmucru *pmucru;
+struct rv1126_pmuclk_priv {
+	struct rv1126_pmucru *pmucru;
 	ulong gpll_hz;
 };
 
-struct rv1109_clk_priv {
-	struct rv1109_cru *cru;
-	struct rv1109_grf *grf;
+struct rv1126_clk_priv {
+	struct rv1126_cru *cru;
+	struct rv1126_grf *grf;
 	ulong gpll_hz;
 	ulong cpll_hz;
 	ulong armclk_hz;
@@ -60,7 +60,7 @@ struct rv1109_clk_priv {
 	bool set_armclk_rate;
 };
 
-struct rv1109_pll {
+struct rv1126_pll {
 	unsigned int con0;
 	unsigned int con1;
 	unsigned int con2;
@@ -71,10 +71,10 @@ struct rv1109_pll {
 	unsigned int reserved0[1];
 };
 
-struct rv1109_pmucru {
+struct rv1126_pmucru {
 	unsigned int pmu_mode;
 	unsigned int reserved1[3];
-	struct rv1109_pll pll;
+	struct rv1126_pll pll;
 	unsigned int offsetcal_status;
 	unsigned int reserved2[51];
 	unsigned int pmu_clksel_con[14];
@@ -86,10 +86,10 @@ struct rv1109_pmucru {
 	unsigned int pmu_autocs_con[2];
 };
 
-check_member(rv1109_pmucru, pmu_autocs_con[1], 0x244);
+check_member(rv1126_pmucru, pmu_autocs_con[1], 0x244);
 
-struct rv1109_cru {
-	struct rv1109_pll pll[4];
+struct rv1126_cru {
+	struct rv1126_pll pll[4];
 	unsigned int offsetcal_status[4];
 	unsigned int mode;
 	unsigned int reserved1[27];
@@ -116,7 +116,7 @@ struct rv1109_cru {
 	unsigned int autocs_con[26];
 };
 
-check_member(rv1109_cru, autocs_con[25], 0x584);
+check_member(rv1126_cru, autocs_con[25], 0x584);
 
 struct pll_rate_table {
 	unsigned long rate;
@@ -134,10 +134,10 @@ struct cpu_rate_table {
 	unsigned int pclk_div;
 };
 
-#define RV1109_PMU_MODE			0x0
-#define RV1109_PMU_PLL_CON(x)		((x) * 0x4 + 0x10)
-#define RV1109_PLL_CON(x)		((x) * 0x4)
-#define RV1109_MODE_CON			0x90
+#define RV1126_PMU_MODE			0x0
+#define RV1126_PMU_PLL_CON(x)		((x) * 0x4 + 0x10)
+#define RV1126_PLL_CON(x)		((x) * 0x4)
+#define RV1126_MODE_CON			0x90
 
 enum {
 	/* CRU_PMU_CLK_SEL0_CON */
diff --git a/arch/arm/include/asm/arch-rockchip/grf_rv1109.h b/arch/arm/include/asm/arch-rockchip/grf_rv1126.h
similarity index 97%
rename from arch/arm/include/asm/arch-rockchip/grf_rv1109.h
rename to arch/arm/include/asm/arch-rockchip/grf_rv1126.h
index 8ff3f94e48..ed7da89bdb 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rv1109.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rv1126.h
@@ -3,12 +3,12 @@
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
-#ifndef _ASM_ARCH_GRF_RV1109_H
-#define _ASM_ARCH_GRF_RV1109_H
+#ifndef _ASM_ARCH_GRF_RV1126_H
+#define _ASM_ARCH_GRF_RV1126_H
 
 #include <common.h>
 
-struct rv1109_grf {
+struct rv1126_grf {
 	unsigned int soc_con0;
 	unsigned int soc_con1;
 	unsigned int soc_con2;
@@ -200,6 +200,6 @@ struct rv1109_grf {
 	unsigned int usb_id_con;
 };
 
-check_member(rv1109_grf, usb_id_con, 0x1031c);
+check_member(rv1126_grf, usb_id_con, 0x1031c);
 
 #endif
diff --git a/board/rockchip/evb_rv1109/Kconfig b/board/rockchip/evb_rv1126/Kconfig
similarity index 68%
rename from board/rockchip/evb_rv1109/Kconfig
rename to board/rockchip/evb_rv1126/Kconfig
index 1266dda08c..698ff26dd6 100644
--- a/board/rockchip/evb_rv1109/Kconfig
+++ b/board/rockchip/evb_rv1126/Kconfig
@@ -1,13 +1,13 @@
-if TARGET_EVB_RV1109
+if TARGET_EVB_RV1126
 
 config SYS_BOARD
-	default "evb_rv1109"
+	default "evb_rv1126"
 
 config SYS_VENDOR
 	default "rockchip"
 
 config SYS_CONFIG_NAME
-	default "evb_rv1109"
+	default "evb_rv1126"
 
 config BOARD_SPECIFIC_OPTIONS # dummy
 	def_bool y
diff --git a/board/rockchip/evb_rv1109/Makefile b/board/rockchip/evb_rv1126/Makefile
similarity index 81%
rename from board/rockchip/evb_rv1109/Makefile
rename to board/rockchip/evb_rv1126/Makefile
index 6d2cb5b925..e63f65291b 100644
--- a/board/rockchip/evb_rv1109/Makefile
+++ b/board/rockchip/evb_rv1126/Makefile
@@ -4,4 +4,4 @@
 # Copyright (c) 2019 Rockchip Electronics Co., Ltd
 #
 
-obj-y	+= evb_rv1109.o
+obj-y	+= evb_rv1126.o
diff --git a/board/rockchip/evb_rv1109/evb_rv1109.c b/board/rockchip/evb_rv1126/evb_rv1126.c
similarity index 100%
rename from board/rockchip/evb_rv1109/evb_rv1109.c
rename to board/rockchip/evb_rv1126/evb_rv1126.c
diff --git a/configs/rv1109_defconfig b/configs/rv1126_defconfig
similarity index 95%
rename from configs/rv1109_defconfig
rename to configs/rv1126_defconfig
index d5cf744dac..a1572f8fda 100644
--- a/configs/rv1109_defconfig
+++ b/configs/rv1126_defconfig
@@ -1,11 +1,11 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x1000
-CONFIG_ROCKCHIP_RV1109=y
+CONFIG_ROCKCHIP_RV1126=y
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
-CONFIG_TARGET_EVB_RV1109=y
-CONFIG_DEFAULT_DEVICE_TREE="rv1109-evb"
+CONFIG_TARGET_EVB_RV1126=y
+CONFIG_DEFAULT_DEVICE_TREE="rv1126-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_BOOTDELAY=0
 CONFIG_SYS_CONSOLE_INFO_QUIET=y

commit e7c03ac680dfd4bffc3a550a8422210e1a9adfde
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Feb 21 10:30:24 2020 +0800

    rockchip: rename rv1109 to rv1126
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I37820775ebd7adeb2a29113c2c7d31cdf1186594

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 033b7a6935..60b29113fe 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -422,12 +422,12 @@ config TPL_STACK
 
 endif
 
-config ROCKCHIP_RV1109
-	bool "Support Rockchip RV1109"
+config ROCKCHIP_RV1126
+	bool "Support Rockchip RV1126"
 	select CPU_V7
 	select BOARD_LATE_INIT
 	help
-	  The Rockchip RV1109 is a ARM-based SoC with a dual-core Cortex-A7
+	  The Rockchip RV1126 is a ARM-based SoC with a quad-core Cortex-A7
 	  and a risc-v core.
 
 config SPL_ROCKCHIP_BACK_TO_BROM
@@ -471,7 +471,7 @@ config ROCKCHIP_BOOT_MODE_REG
 	default 0xff320300 if ROCKCHIP_RK3399
 	default 0xfe020200 if ROCKCHIP_RK1808
 	default 0x10300580 if ROCKCHIP_RV1108
-	default 0xfe020200 if ROCKCHIP_RV1109
+	default 0xfe020200 if ROCKCHIP_RV1126
 	default 0
 	help
 	  The Soc will enter to different boot mode(defined in asm/arch/boot_mode.h)
@@ -491,7 +491,7 @@ config ROCKCHIP_STIMER_BASE
 	default 0xff830020 if ROCKCHIP_RK3368
 	default 0xff8680a0 if ROCKCHIP_RK3399
 	default 0x10350020 if ROCKCHIP_RV1108
-	default 0xff670020 if ROCKCHIP_RV1109
+	default 0xff670020 if ROCKCHIP_RV1126
 	default 0
 	help
 	  The secure timer inited in SPL/TPL in secure word, ARM generic timer
@@ -510,7 +510,7 @@ config ROCKCHIP_IRAM_START_ADDR
 	default 0xff8c0000 if ROCKCHIP_RK3368
 	default 0xff8c0000 if ROCKCHIP_RK3399
 	default 0x10080000 if ROCKCHIP_RV1108
-	default 0xff700000 if ROCKCHIP_RV1109
+	default 0xff700000 if ROCKCHIP_RV1126
 	default 0
 	help
 	  The IRAM start addr is to locate variant of the boot device from
@@ -701,6 +701,6 @@ source "arch/arm/mach-rockchip/rk3368/Kconfig"
 source "arch/arm/mach-rockchip/rk3399/Kconfig"
 source "arch/arm/mach-rockchip/rk1808/Kconfig"
 source "arch/arm/mach-rockchip/rv1108/Kconfig"
-source "arch/arm/mach-rockchip/rv1109/Kconfig"
+source "arch/arm/mach-rockchip/rv1126/Kconfig"
 
 endif
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index ce493d6f06..a729e83d62 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -52,7 +52,7 @@ obj-$(CONFIG_ROCKCHIP_RK3368) += rk3368/
 obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399/
 obj-$(CONFIG_ROCKCHIP_RK1808) += rk1808/
 obj-$(CONFIG_ROCKCHIP_RV1108) += rv1108/
-obj-$(CONFIG_ROCKCHIP_RV1109) += rv1109/
+obj-$(CONFIG_ROCKCHIP_RV1126) += rv1126/
 
 # Clear out SPL objects, in case this is a TPL build
 obj-spl-$(CONFIG_TPL_BUILD) =
diff --git a/arch/arm/mach-rockchip/rv1109/Kconfig b/arch/arm/mach-rockchip/rv1109/Kconfig
deleted file mode 100644
index 71042c5c1e..0000000000
--- a/arch/arm/mach-rockchip/rv1109/Kconfig
+++ /dev/null
@@ -1,16 +0,0 @@
-if ROCKCHIP_RV1109
-
-config TARGET_EVB_RV1109
-	bool "EVB_RV1109"
-	help
-	  RV1109 EVB is a evaluation board for Rockchp RV1109.
-
-config SYS_SOC
-	default "rockchip"
-
-config SYS_MALLOC_F_LEN
-	default 0x400
-
-source board/rockchip/evb_rv1109/Kconfig
-
-endif
diff --git a/arch/arm/mach-rockchip/rv1126/Kconfig b/arch/arm/mach-rockchip/rv1126/Kconfig
new file mode 100644
index 0000000000..067e23ff12
--- /dev/null
+++ b/arch/arm/mach-rockchip/rv1126/Kconfig
@@ -0,0 +1,16 @@
+if ROCKCHIP_RV1126
+
+config TARGET_EVB_RV1126
+	bool "EVB_RV1126"
+	help
+	  RV1126 EVB is a evaluation board for Rockchp RV1126.
+
+config SYS_SOC
+	default "rockchip"
+
+config SYS_MALLOC_F_LEN
+	default 0x400
+
+source board/rockchip/evb_rv1126/Kconfig
+
+endif
diff --git a/arch/arm/mach-rockchip/rv1109/Makefile b/arch/arm/mach-rockchip/rv1126/Makefile
similarity index 69%
rename from arch/arm/mach-rockchip/rv1109/Makefile
rename to arch/arm/mach-rockchip/rv1126/Makefile
index 0189801109..41cacf1c24 100644
--- a/arch/arm/mach-rockchip/rv1109/Makefile
+++ b/arch/arm/mach-rockchip/rv1126/Makefile
@@ -4,5 +4,5 @@
 # SPDX-License-Identifier:     GPL-2.0+
 #
 
-obj-y += syscon_rv1109.o
-obj-y += rv1109.o
+obj-y += syscon_rv1126.o
+obj-y += rv1126.o
diff --git a/arch/arm/mach-rockchip/rv1109/rv1109.c b/arch/arm/mach-rockchip/rv1126/rv1126.c
similarity index 100%
rename from arch/arm/mach-rockchip/rv1109/rv1109.c
rename to arch/arm/mach-rockchip/rv1126/rv1126.c
diff --git a/arch/arm/mach-rockchip/rv1109/syscon_rv1109.c b/arch/arm/mach-rockchip/rv1126/syscon_rv1126.c
similarity index 52%
rename from arch/arm/mach-rockchip/rv1109/syscon_rv1109.c
rename to arch/arm/mach-rockchip/rv1126/syscon_rv1126.c
index 0b0e663565..964d6d43c4 100644
--- a/arch/arm/mach-rockchip/rv1109/syscon_rv1109.c
+++ b/arch/arm/mach-rockchip/rv1126/syscon_rv1126.c
@@ -9,14 +9,14 @@
 #include <syscon.h>
 #include <asm/arch/clock.h>
 
-static const struct udevice_id rv1109_syscon_ids[] = {
-	{ .compatible = "rockchip,rv1109-grf", .data = ROCKCHIP_SYSCON_GRF },
+static const struct udevice_id rv1126_syscon_ids[] = {
+	{ .compatible = "rockchip,rv1126-grf", .data = ROCKCHIP_SYSCON_GRF },
 	{ }
 };
 
-U_BOOT_DRIVER(syscon_rv1109) = {
-	.name = "rv1109_syscon",
+U_BOOT_DRIVER(syscon_rv1126) = {
+	.name = "rv1126_syscon",
 	.id = UCLASS_SYSCON,
-	.of_match = rv1109_syscon_ids,
+	.of_match = rv1126_syscon_ids,
 };
 
diff --git a/include/configs/evb_rv1109.h b/include/configs/evb_rv1126.h
similarity index 85%
rename from include/configs/evb_rv1109.h
rename to include/configs/evb_rv1126.h
index 43129fd170..b29d8dc8a6 100644
--- a/include/configs/evb_rv1109.h
+++ b/include/configs/evb_rv1126.h
@@ -4,10 +4,10 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 
-#ifndef __EVB_RV1109_H
-#define __EVB_RV1109_H
+#ifndef __EVB_RV1126_H
+#define __EVB_RV1126_H
 
-#include <configs/rv1109_common.h>
+#include <configs/rv1126_common.h>
 
 #define CONFIG_SUPPORT_EMMC_RPMB
 #define CONFIG_SYS_MMC_ENV_DEV 0
diff --git a/include/configs/rv1109_common.h b/include/configs/rv1126_common.h
similarity index 94%
rename from include/configs/rv1109_common.h
rename to include/configs/rv1126_common.h
index 31eb414445..3c2d9b4c5d 100644
--- a/include/configs/rv1109_common.h
+++ b/include/configs/rv1126_common.h
@@ -4,8 +4,8 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 
-#ifndef __CONFIG_RV1109_COMMON_H
-#define __CONFIG_RV1109_COMMON_H
+#ifndef __CONFIG_RV1126_COMMON_H
+#define __CONFIG_RV1126_COMMON_H
 
 #include "rockchip-common.h"
 

commit 1481bafe9d3d3264f9cbb3e026475e2efe9ecb32
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Feb 17 17:37:51 2020 +0800

    common: spl: enable D-cache by default to improve performance
    
    Set CONFIG_SPL_SYS_MALLOC_F_LEN enough to promise the tlb buffer
    can be malloc, actually this is a way to compatible all the current
    boards without adding a new configure option.
    
    I-cache has been setup at early assembly code by default.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I7e973299eddc358cd4c15846c5de154050bf9547

diff --git a/common/spl/spl.c b/common/spl/spl.c
index 3877d92715..a8c75888fa 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -236,6 +236,21 @@ static int spl_common_init(bool setup_malloc)
 		gd->malloc_ptr = 0;
 	}
 #endif
+
+	/*
+	 * setup D-cache as early as possible after malloc setup
+	 * I-cache has been setup at early assembly code by default.
+	 */
+#if !defined(CONFIG_TPL_BUILD)
+	/* tlb memory should be 64KB align for base and 4KB align for end */
+	gd->arch.tlb_size = PGTABLE_SIZE;
+	gd->arch.tlb_addr = (ulong)memalign(SZ_64K, ALIGN(PGTABLE_SIZE, SZ_4K));
+	if (gd->arch.tlb_addr)
+		dcache_enable();
+	else
+		debug("spl: no tlb memory\n");
+#endif
+
 	ret = bootstage_init(true);
 	if (ret) {
 		debug("%s: Failed to set up bootstage: ret=%d\n", __func__,

commit 4447bf162468719b3d65970af01719acd231888a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Feb 17 19:23:23 2020 +0800

    dts: Makefile: support provide a minimum SPL DTB
    
    Some boards need a SPL DTB as smaller as possible to save dm scan
    time and space. It provides a SPL DTB only include the node with
    property "u-boot,dm-spl". The property "u-boot,pre-reloc" doesn't
    work any more.
    
    This feature is disabled by default to compatible current boards,
    only the board really cares about boot time needs it.
    
    Fix "/chosen" is deleted for TPL DTB.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I743d7b734daff6e0508e01f534078663d809952f

diff --git a/dts/Kconfig b/dts/Kconfig
index edd5d7f830..7dfd5990d2 100644
--- a/dts/Kconfig
+++ b/dts/Kconfig
@@ -47,6 +47,16 @@ config SPL_OF_CONTROL
 	  which is not enough to support device tree. Enable this option to
 	  allow such boards to be supported by U-Boot SPL.
 
+config SPL_DTB_MINIMUM
+	bool "Provide a minimum SPL DTB "
+	depends on SPL_OF_CONTROL
+	default n
+	help
+	  Some boards need a SPL DTB as smaller as possible to save dm scan
+	  time and space. It provides a SPL DTB only include the node with
+	  property "u-boot,dm-spl". The property "u-boot,pre-reloc" doesn't
+	  work any more.
+
 config TPL_OF_CONTROL
 	bool "Enable run-time configuration via Device Tree in TPL"
 	depends on TPL && OF_CONTROL
diff --git a/dts/Makefile b/dts/Makefile
index 341e982157..170559d288 100644
--- a/dts/Makefile
+++ b/dts/Makefile
@@ -41,15 +41,27 @@ quiet_cmd_fdtgrep = FDTGREP $@
 fdtgrep_tpl_props := -b u-boot,dm-pre-reloc -b u-boot,dm-tpl
 quiet_cmd_fdtgrep_tpl = FDTGREP $@
       cmd_fdtgrep_tpl = $(objtree)/tools/fdtgrep $(fdtgrep_tpl_props) -RT $< \
-                -n /config -O dtb | \
+                -n /chosen -n config -O dtb | \
+        $(objtree)/tools/fdtgrep -r -O dtb - -o $@ \
+                $(addprefix -P ,$(subst $\",,$(CONFIG_OF_SPL_REMOVE_PROPS)))
+
+fdtgrep_spl_minimum_props := -b u-boot,dm-spl
+quiet_cmd_fdtgrep_spl_minimum = FDTGREP $@
+      cmd_fdtgrep_spl_minimum = $(objtree)/tools/fdtgrep $(fdtgrep_spl_minimum_props) -RT $< \
+                -n /chosen -n config -O dtb | \
         $(objtree)/tools/fdtgrep -r -O dtb - -o $@ \
                 $(addprefix -P ,$(subst $\",,$(CONFIG_OF_SPL_REMOVE_PROPS)))
 
 $(obj)/dt-tpl.dtb: $(DTB) $(objtree)/tools/fdtgrep FORCE
 	$(call if_changed,fdtgrep_tpl)
 
+ifeq ($(CONFIG_SPL_DTB_MINIMUM),y)
+$(obj)/dt-spl.dtb: $(DTB) $(objtree)/tools/fdtgrep FORCE
+	$(call if_changed,fdtgrep_spl_minimum)
+else
 $(obj)/dt-spl.dtb: $(DTB) $(objtree)/tools/fdtgrep FORCE
 	$(call if_changed,fdtgrep)
+endif
 
 ifeq ($(CONFIG_USING_KERNEL_DTB),y)
 $(obj)/dt.dtb: $(DTB) $(objtree)/tools/fdtgrep FORCE

commit fcdd83d4455871c49a93236c3f1cb964727f8c0c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Feb 17 18:13:28 2020 +0800

    dts: Makefile: simplify the logic of kernel dtb feature
    
    Our purpose is replacing the u-boot.dtb with u-boot-spl.dtb
    when kernel dtb feature is enabled. The current logic is too
    complicated and not easy to extend new features.
    
    The best way is to generate but not replace a u-boot.dtb the
    same as u-boot-spl.dtb during DTB compile process.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I678ec7c60c91ecc6f6f0a935e50a691c52c94162

diff --git a/Makefile b/Makefile
index 3a77384600..2f134ccbf3 100644
--- a/Makefile
+++ b/Makefile
@@ -875,16 +875,11 @@ endif
 	$(call cmd,cfgcheck,u-boot.cfg)
 
 PHONY += dtbs
-dtbs: dts/dt.dtb dts/dt-spl.dtb
+dtbs: dts/dt.dtb
 	@:
 dts/dt.dtb: u-boot
 	$(Q)$(MAKE) $(build)=dts dtbs
 
-ifeq ($(CONFIG_USING_KERNEL_DTB),y)
-dts/dt-spl.dtb: dts/dt.dtb
-	@:
-endif
-
 quiet_cmd_copy = COPY    $@
       cmd_copy = cp $< $@
 
@@ -906,8 +901,8 @@ u-boot-fit-dtb.bin: u-boot-nodtb.bin fit-dtb.blob
 u-boot.bin: u-boot-fit-dtb.bin FORCE
 	$(call if_changed,copy)
 else ifeq ($(CONFIG_OF_SEPARATE),y)
-ifeq ($(CONFIG_USING_KERNEL_DTB),y)
-u-boot-dtb.bin: u-boot-nodtb.bin dts/dt-spl.dtb FORCE
+
+u-boot-dtb.bin: u-boot-nodtb.bin dts/dt.dtb FORCE
 	$(call if_changed,cat)
 
 ifneq ($(wildcard dts/kern.dtb),)
@@ -921,13 +916,7 @@ u-boot.bin: u-boot-dtb.bin FORCE
 	$(call if_changed,copy)
 	$(call if_changed,truncate)
 endif
-else
 
-u-boot-dtb.bin: u-boot-nodtb.bin dts/dt.dtb FORCE
-	$(call if_changed,cat)
-u-boot.bin: u-boot-dtb.bin FORCE
-	$(call if_changed,copy)
-endif
 else
 u-boot.bin: u-boot-nodtb.bin FORCE
 	$(call if_changed,copy)
@@ -942,11 +931,7 @@ endif
 quiet_cmd_copy = COPY    $@
       cmd_copy = cp $< $@
 
-ifeq ($(CONFIG_USING_KERNEL_DTB),y)
-u-boot.dtb: dts/dt-spl.dtb FORCE
-else
 u-boot.dtb: dts/dt.dtb FORCE
-endif
 	$(call cmd,copy)
 
 OBJCOPYFLAGS_u-boot.hex := -O ihex
@@ -1054,11 +1039,7 @@ u-boot-dtb.img u-boot.img u-boot.kwb u-boot.pbl u-boot-ivt.img: \
 		$(if $(CONFIG_SPL_LOAD_FIT),u-boot-nodtb.bin dts/dt.dtb,u-boot.bin) FORCE
 	$(call if_changed,mkimage)
 
-ifeq ($(CONFIG_USING_KERNEL_DTB),y)
-u-boot.itb: u-boot-nodtb.bin dts/dt-spl.dtb $(U_BOOT_ITS) FORCE
-else
 u-boot.itb: u-boot-nodtb.bin dts/dt.dtb $(U_BOOT_ITS) FORCE
-endif
 	$(call if_changed,mkfitimage)
 
 u-boot-spl.kwb: u-boot.img spl/u-boot-spl.bin FORCE
diff --git a/dts/Makefile b/dts/Makefile
index 0e77a283ce..341e982157 100644
--- a/dts/Makefile
+++ b/dts/Makefile
@@ -51,8 +51,13 @@ $(obj)/dt-tpl.dtb: $(DTB) $(objtree)/tools/fdtgrep FORCE
 $(obj)/dt-spl.dtb: $(DTB) $(objtree)/tools/fdtgrep FORCE
 	$(call if_changed,fdtgrep)
 
+ifeq ($(CONFIG_USING_KERNEL_DTB),y)
+$(obj)/dt.dtb: $(DTB) $(objtree)/tools/fdtgrep FORCE
+	$(call if_changed,fdtgrep)
+else
 $(obj)/dt.dtb: $(DTB) FORCE
 	$(call if_changed,shipped)
+endif
 
 targets += dt.dtb dt-spl.dtb dt-tpl.dtb
 

commit da5d85a3ee3d769277fe7114cee1b285de56296e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Feb 14 14:32:35 2020 +0800

    configs: add rk3128_defconfig
    
    Enable kernel dtb feature.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I525ebc89dd6b72e06848e501e5a1db1cc13cdcbc

diff --git a/configs/rk3128_defconfig b/configs/rk3128_defconfig
new file mode 100644
index 0000000000..e24b27466a
--- /dev/null
+++ b/configs/rk3128_defconfig
@@ -0,0 +1,108 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0x38000
+CONFIG_ROCKCHIP_RK3128=y
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3126-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_NAND_BOOT=y
+CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_ANDROID_AVB=y
+CONFIG_FASTBOOT_BUF_ADDR=0x60800800
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_CMD_DTIMG=y
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPT=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_ITEST is not set
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_BMP=y
+# CONFIG_CMD_MISC is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
+CONFIG_RKPARM_PARTITION=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_RK8XX_PWRKEY=y
+CONFIG_ADC_KEY=y
+CONFIG_GPIO_KEY=y
+CONFIG_RK_KEY=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PINCTRL=y
+CONFIG_DM_FUEL_GAUGE=y
+CONFIG_POWER_FG_RK816=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_DM_CHARGE_DISPLAY=y
+CONFIG_CHARGE_ANIMATION=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_RKNAND=y
+CONFIG_DEBUG_UART_BASE=0x20068000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x310c
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_DISPLAY_ROCKCHIP_MIPI=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_DRM_ROCKCHIP_LVDS=y
+CONFIG_DRM_ROCKCHIP_RGB=y
+CONFIG_LCD=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_ERRNO_STR=y
+# CONFIG_EFI_LOADER is not set
+CONFIG_AVB_LIBAVB=y
+CONFIG_AVB_LIBAVB_AB=y
+CONFIG_AVB_LIBAVB_ATX=y
+CONFIG_AVB_LIBAVB_USER=y
+CONFIG_RK_AVB_LIBAVB_USER=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V1=y
+CONFIG_TEST_ROCKCHIP=y

commit 43e3c846b3f4bf340d4205954c3ad9ed72641f6b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Feb 19 16:50:49 2020 +0800

    pmic: rk8xx: set rk818 2000mA input current if no battery node
    
    Assume that no battery node means the board is always supplied with
    adapter, so set 2000mA input curren to make board have enough power.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I9d66c02682cc3ff66a2d8e365837fc66bf991933

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index 870309dff4..8ff023a9a9 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -160,6 +160,10 @@ static struct reg_data rk817_init_reg[] = {
 #endif
 };
 
+static struct reg_data rk818_init_current[] = {
+	{ REG_USB_CTRL, 0x07, 0x0f}, /* 2A */
+};
+
 static const struct pmic_child_info pmic_children_info[] = {
 	{ .prefix = "DCDC", .driver = "rk8xx_buck"},
 	{ .prefix = "LDO", .driver = "rk8xx_ldo"},
@@ -405,7 +409,9 @@ static inline int rk8xx_irq_chip_init(struct udevice *dev) { return 0; }
 static int rk8xx_probe(struct udevice *dev)
 {
 	struct rk8xx_priv *priv = dev_get_priv(dev);
+	struct reg_data *init_current = NULL;
 	struct reg_data *init_data = NULL;
+	int init_current_num = 0;
 	int init_data_num = 0;
 	int ret = 0, i, show_variant;
 	uint8_t msb, lsb, id_msb, id_lsb;
@@ -438,9 +444,17 @@ static int rk8xx_probe(struct udevice *dev)
 		break;
 	case RK805_ID:
 	case RK816_ID:
+		on_source = RK8XX_ON_SOURCE;
+		off_source = RK8XX_OFF_SOURCE;
+		break;
 	case RK818_ID:
 		on_source = RK8XX_ON_SOURCE;
 		off_source = RK8XX_OFF_SOURCE;
+		/* set current if no fuel gauge */
+		if (!ofnode_valid(dev_read_subnode(dev, "battery"))) {
+			init_current = rk818_init_current;
+			init_current_num = ARRAY_SIZE(rk818_init_current);
+		}
 		break;
 	case RK809_ID:
 	case RK817_ID:
@@ -463,6 +477,7 @@ static int rk8xx_probe(struct udevice *dev)
 		return -EINVAL;
 	}
 
+	/* common init */
 	for (i = 0; i < init_data_num; i++) {
 		ret = pmic_clrsetbits(dev,
 				      init_data[i].reg,
@@ -472,9 +487,18 @@ static int rk8xx_probe(struct udevice *dev)
 			printf("%s: i2c set reg 0x%x failed, ret=%d\n",
 			       __func__, init_data[i].reg, ret);
 		}
+	}
 
-		debug("%s: reg[0x%x] = 0x%x\n", __func__, init_data[i].reg,
-		      pmic_reg_read(dev, init_data[i].reg));
+	/* current init */
+	for (i = 0; i < init_current_num; i++) {
+		ret = pmic_clrsetbits(dev,
+				      init_current[i].reg,
+				      init_current[i].mask,
+				      init_current[i].val);
+		if (ret < 0) {
+			printf("%s: i2c set reg 0x%x failed, ret=%d\n",
+			       __func__, init_current[i].reg, ret);
+		}
 	}
 
 	printf("PMIC:  RK%x ", show_variant);

commit aa1eec08bb5f4722e0140349f257da0e35d5944f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Feb 19 11:30:25 2020 +0800

    rockchip: make boot_rkimg.c as basic mandory code
    
    boot_rkimg.c is the basic code for rockchip platforms, such as
    get boot devtype, setup download mode and get kernel dtb, etc.
    
    CONFIG_RKIMG_BOOTLOADER actually makes no sense for rockchip
    features any more, but we still leave it to compatile code
    compilation since there is a lot of code depends on it. but it
    maybe dropped in the future.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Iab922cbf3a70e7eb1444678d6e902b9d8e106dd1

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 8dfef036f4..870d48bb9b 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -546,14 +546,10 @@ config SPL_MMC_SUPPORT
 	default y if !SPL_ROCKCHIP_BACK_TO_BROM
 
 config RKIMG_BOOTLOADER
-	bool "Support for Rockchip Image Bootloader boot flow"
-	default n
+	bool "Support for Rockchip platform features"
+	default y
 	help
-	  Rockchip use this to boot Android during development cycle and for
-	  other OS, typical content kernel.img with zImage/Image, boot.img and
-	  recovery.img with Ramdisk, packed with 'KNRL' header; and resource.img
-	  with dtb and uboot/kernel logo bmp, vendor storage for custom info
-	  like SN and MAC address.
+	  Actually this is a compatible configure for code compilation.
 
 config RKIMG_ANDROID_BOOTMODE_LEGACY
 	bool "Support set androidboot.mode with legacy rule"
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 809b6c63f2..5fd5ee6c2a 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -21,6 +21,7 @@ ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
 # we can have the preprocessor correctly recognise both 0x0 and 0
 # meaning "turn it off".
 obj-y += boot_mode.o
+obj-y += boot_rkimg.o
 obj-y += board.o
 obj-y += chip_info.o
 obj-y += iomem.o
diff --git a/common/boot_rkimg.c b/arch/arm/mach-rockchip/boot_rkimg.c
similarity index 100%
rename from common/boot_rkimg.c
rename to arch/arm/mach-rockchip/boot_rkimg.c
diff --git a/common/Makefile b/common/Makefile
index 913dd5d16a..a2c78cc509 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -127,10 +127,6 @@ ifdef CONFIG_CMD_DTIMG
 obj-y += image-android-dt.o
 endif
 
-ifndef CONFIG_TPL_BUILD
-obj-$(CONFIG_RKIMG_BOOTLOADER) += boot_rkimg.o
-endif
-
 ifndef CONFIG_SPL_BUILD
 # This option is not just y/n - it can have a numeric value
 ifdef CONFIG_FASTBOOT_FLASH

commit 85f87933fde1da22e4075132bbeb6bdd3b862298
Author: Jeffy Chen <jeffy.chen@rock-chips.com>
Date:   Fri Jan 10 18:00:17 2020 +0800

    configs: rk3399: enable CONFIG_EFI_LOADER and CONFIG_BOOTEFI
    
    These configs are needed for EFI booting.
    
    Change-Id: I36d074525fdf3df5e068f5aecd35c1b43145ccd6
    Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>

diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
index 5eed0b6d06..52a7cb4d5c 100755
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -27,6 +27,7 @@ CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set
 CONFIG_CMD_DTIMG=y
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set
@@ -127,7 +128,6 @@ CONFIG_LIB_RAND=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
 CONFIG_OF_LIBFDT_OVERLAY=y
-# CONFIG_EFI_LOADER is not set
 CONFIG_AVB_LIBAVB=y
 CONFIG_AVB_LIBAVB_AB=y
 CONFIG_AVB_LIBAVB_ATX=y

commit 708c86adb9dce8383c0beee273a5f21ed4fc83b0
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Feb 14 11:39:56 2020 +0800

    make.sh: support make.sh spl-s
    
    make.sh spl-s : pack loader only replace miniloader with u-boot-spl.bin
    
    Change-Id: I68df1961051d1f970bcb460ea362df3c15f403ce
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/make.sh b/make.sh
index 480a7c02b8..191014ac57 100755
--- a/make.sh
+++ b/make.sh
@@ -524,11 +524,11 @@ pack_spl_loader_image()
 
 	# Copy to .temp folder
 	cp spl/u-boot-spl.bin ${RKBIN}/.temp/
-	cp tpl/u-boot-tpl.bin ${RKBIN}/.temp/
 	cp ${ini} ${RKBIN}/.temp/${RKCHIP_LOADER}MINIALL.ini -f
 
 	cd ${RKBIN}
 	if [ "$mode" = 'spl' ]; then	# pack tpl+spl
+		cp tpl/u-boot-tpl.bin ${RKBIN}/.temp/
 		# Update ini
 		label="TPL+SPL"
 		header=`sed -n '/NAME=/s/NAME=//p' ${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL.ini`

commit 0f0484481cafd2d8882568d5583a1abf63e5fe2f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 14 17:24:25 2020 +0800

    common: image-fdt: skip image_check_type() for fdt
    
    default image mkimage conflicts with fit mkimage on param: -T "flat_dt"
    and failed to build fdt uImage.
    
    error message:
    "./tools/mkimage: Can't set header for FIT Image support: Success"
    
    It's fine to drop that since the fdt_check_header() follows it.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I50554765bac7cc75df7ab5920e94cafe78d14bdc

diff --git a/common/image-fdt.c b/common/image-fdt.c
index 5d01a652a5..7f741af796 100644
--- a/common/image-fdt.c
+++ b/common/image-fdt.c
@@ -54,10 +54,18 @@ static const image_header_t *image_get_fdt(ulong fdt_addr)
 	}
 	puts("OK\n");
 
+	/*
+	 * default image mkimage conflicts with fit mkimage on param: -T "flat_dt".
+	 *
+	 * error message:
+	 * "./tools/mkimage: Can't set header for FIT Image support: Success"
+	 */
+#if 0
 	if (!image_check_type(fdt_hdr, IH_TYPE_FLATDT)) {
 		fdt_error("uImage is not a fdt");
 		return NULL;
 	}
+#endif
 	if (image_get_comp(fdt_hdr) != IH_COMP_NONE) {
 		fdt_error("uImage is compressed");
 		return NULL;

commit 5b8e7bf473338ad44bb56b2f2c652595c2233c64
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 14 15:53:31 2020 +0800

    common: image-fit: support "data-offset" and "data-size"
    
    It seems the U-Boot proper fit code misses this.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I1e5255e20f4f309c083e601e6c2d0e37869bac20

diff --git a/common/image-fit.c b/common/image-fit.c
index 7f17fd1410..a2e2355228 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -30,6 +30,9 @@ DECLARE_GLOBAL_DATA_PTR;
 #include <u-boot/sha1.h>
 #include <u-boot/sha256.h>
 
+#define __round_mask(x, y) ((__typeof__(x))((y)-1))
+#define round_up(x, y) ((((x)-1) | __round_mask(x, y))+1)
+
 /*****************************************************************************/
 /* New uImage format routines */
 /*****************************************************************************/
@@ -769,13 +772,25 @@ int fit_image_get_entry(const void *fit, int noffset, ulong *entry)
 int fit_image_get_data(const void *fit, int noffset,
 		const void **data, size_t *size)
 {
+	ulong data_off = 0;
+	int data_sz = 0;
 	int len;
 
 	*data = fdt_getprop(fit, noffset, FIT_DATA_PROP, &len);
 	if (*data == NULL) {
-		fit_get_debug(fit, noffset, FIT_DATA_PROP, len);
-		*size = 0;
-		return -1;
+		fit_image_get_data_offset(fit, noffset, (int *)&data_off);
+		fit_image_get_data_size(fit, noffset, &data_sz);
+		if (data_sz) {
+			data_off += (ulong)fit;
+			data_off += round_up(fdt_totalsize(fit), 4);
+			*data = (void *)data_off;
+			*size = data_sz;
+			return 0;
+		} else {
+			fit_get_debug(fit, noffset, FIT_DATA_PROP, len);
+			*size = 0;
+			return -1;
+		}
 	}
 
 	*size = len;

commit 5ae165da660bdf14defca85e5e8e82a95db070c6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 15 13:59:44 2020 +0800

    include: rkimg: add resource partition macro
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I9de7e165f61ad18591add0ffe4092e99845c2938

diff --git a/include/boot_rkimg.h b/include/boot_rkimg.h
index bf6db230c7..9082e55ff8 100644
--- a/include/boot_rkimg.h
+++ b/include/boot_rkimg.h
@@ -49,6 +49,7 @@ struct rockchip_image {
 #define BCB_MESSAGE_BLK_OFFSET		(16 * 1024 >> 9)
 
 #define PART_MISC			"misc"
+#define PART_RESOURCE			"resource"
 #define PART_KERNEL			"kernel"
 #define PART_BOOT			"boot"
 #define PART_RECOVERY			"recovery"

commit 64c9242ba76ea00e000c17ea301e3c5eaa309876
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 15 18:08:27 2020 +0800

    sysmem: add FIT image memory block
    
    The same feature with AVB memory block.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I1aff5ef703d16852b4bc0a0887b037476464034c

diff --git a/arch/arm/mach-rockchip/memblk.c b/arch/arm/mach-rockchip/memblk.c
index 73fd9bbb34..5980f66636 100644
--- a/arch/arm/mach-rockchip/memblk.c
+++ b/arch/arm/mach-rockchip/memblk.c
@@ -75,7 +75,14 @@ const static struct memblk_attr plat_mem_attr[MEMBLK_ID_MAX] = {
 	[MEMBLK_ID_AVB_ANDROID]  =	{
 		.name = "AVB_ANDROID",
 		.flags = M_ATTR_OFC | M_ATTR_CACHELINE_ALIGN |
-			 M_ATTR_KMEM_CAN_OVERLAP,
+			 M_ATTR_KMEM_CAN_OVERLAP |
+			 M_ATTR_HIGHEST_MEM,
+	},
+	[MEMBLK_ID_FIT] =	{
+		.name = "FIT",
+		.flags = M_ATTR_OFC | M_ATTR_CACHELINE_ALIGN |
+			 M_ATTR_KMEM_CAN_OVERLAP |
+			 M_ATTR_HIGHEST_MEM,
 	},
 };
 
diff --git a/include/memblk.h b/include/memblk.h
index 8254fb7a4b..0dc53cc91c 100644
--- a/include/memblk.h
+++ b/include/memblk.h
@@ -31,6 +31,7 @@ enum memblk_id {
 	MEMBLK_ID_UNCOMP_KERNEL,
 	MEMBLK_ID_ANDROID,
 	MEMBLK_ID_AVB_ANDROID,
+	MEMBLK_ID_FIT,
 
 	/* Other */
 	MEMBLK_ID_BY_NAME,
@@ -77,6 +78,8 @@ extern const struct memblk_attr *mem_attr;
 #define M_ATTR_KMEM_CAN_OVERLAP	(1 << 6)
 /* Ignore invisable region reserved by bidram */
 #define M_ATTR_IGNORE_INVISIBLE	(1 << 7)
+/* Highest memory right under the sp */
+#define M_ATTR_HIGHEST_MEM	(1 << 8)
 
 
 #endif /* _MEMBLK_H */
diff --git a/lib/sysmem.c b/lib/sysmem.c
index 5371f7bd0e..3a2fe29bd2 100644
--- a/lib/sysmem.c
+++ b/lib/sysmem.c
@@ -377,8 +377,7 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 		 * Fixup base and place right after U-Boot stack, adding a lot
 		 * of space(4KB) maybe safer.
 		 */
-		if ((id == MEMBLK_ID_AVB_ANDROID) &&
-		    (base == SYSMEM_ALLOC_ANYWHERE)) {
+		if (attr.flags & M_ATTR_HIGHEST_MEM) {
 			base = gd->start_addr_sp -
 					CONFIG_SYS_STACK_SIZE - size - 0x1000;
 
@@ -483,6 +482,8 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 	else
 		alloc_base = base + alloc_size;	/* LMB is align down alloc mechanism */
 
+	SYSMEM_D("DO alloc... base: 0x%08lx\n", (ulong)alloc_base);
+
 	paddr = lmb_alloc_base(&sysmem->lmb, alloc_size, align, alloc_base);
 	if (paddr) {
 		if ((paddr == base) || (base == SYSMEM_ALLOC_ANYWHERE)) {
@@ -491,9 +492,12 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 				SYSMEM_E("No memory for \"%s\" alloc sysmem\n", name);
 				goto out;
 			}
-
 			/* Record original base for dump */
-			mem->orig_base = orig_base;
+			if (attr.flags & M_ATTR_HIGHEST_MEM)
+				mem->orig_base = base;
+			else
+				mem->orig_base = orig_base;
+
 			mem->base = paddr;
 			mem->size = alloc_size;
 			mem->attr = attr;
@@ -555,7 +559,7 @@ void *sysmem_alloc(enum memblk_id id, phys_size_t size)
 					NULL,
 					SYSMEM_ALLOC_ANYWHERE,
 					size,
-					SYSMEM_ALLOC_NO_ALIGN);
+					ARCH_DMA_MINALIGN);
 	if (!paddr)
 		sysmem_dump();
 

commit 3a5e7a93e84cf9daaf64cdb8da670e94766e53f7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 15 14:02:37 2020 +0800

    test: rockchip: fix typo
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I5e22ffaa2fc1a07ca05a793f26e94dc06dad3fc4

diff --git a/test/rockchip/test-rockchip.c b/test/rockchip/test-rockchip.c
index 344bd57245..8442f35535 100644
--- a/test/rockchip/test-rockchip.c
+++ b/test/rockchip/test-rockchip.c
@@ -57,7 +57,7 @@ static int cmd_groups_help(void)
 
 	printf("* Test Case:\n");
 	printf("    -.: normal item\n");
-	printf("    -n: noturen item\n");
+	printf("    -n: noreturn item\n");
 	printf("    -i: interactive item\n\n");
 
 	printf("* ALL:\n");
diff --git a/test/rockchip/test-storage.c b/test/rockchip/test-storage.c
index 5003d117df..9eca38e73b 100644
--- a/test/rockchip/test-storage.c
+++ b/test/rockchip/test-storage.c
@@ -492,7 +492,7 @@ static char sub_cmd_help[] =
 "    [.] rktest part                        - test part list\n"
 #endif
 #ifdef CONFIG_USB_HOST
-"    [.] rktest usb                        - test usb disk\n"
+"    [.] rktest usb                         - test usb disk\n"
 #endif
 ;
 

commit 408bf4b932c3200e5cbc371fed69967d8110f57a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jan 13 13:08:32 2020 +0800

    cmd_source: fix compile error
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I4c532326f70bcda71543f6768d3ca136bb7c7d0b

diff --git a/cmd/source.c b/cmd/source.c
index a9831b6608..d724d63eb7 100644
--- a/cmd/source.c
+++ b/cmd/source.c
@@ -31,7 +31,7 @@ source (ulong addr, const char *fit_uname)
 	const image_header_t *hdr;
 #endif
 	u32		*data;
-	int		verify;
+
 	void *buf;
 #if defined(CONFIG_FIT)
 	const void*	fit_hdr;
@@ -39,8 +39,9 @@ source (ulong addr, const char *fit_uname)
 	const void	*fit_data;
 	size_t		fit_len;
 #endif
-
-	verify = env_get_yesno("verify");
+#if defined(CONFIG_IMAGE_FORMAT_LEGACY) || defined(CONFIG_FIT)
+	int		verify = env_get_yesno("verify");
+#endif
 
 	buf = map_sysmem(addr, 0);
 	switch (genimg_get_format(buf)) {

commit 8852fef858ca86270d1567cdb0f8b965e21abf94
Author: Simon Xue <xxm@rock-chips.com>
Date:   Fri Dec 13 13:01:56 2019 +0800

    misc: decompress: add decompress driver
    
    Change-Id: I6a86d91d6fcacce72aa24beb70d7dd0f19b2c81a
    Signed-off-by: Simon Xue <xxm@rock-chips.com>
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index a3013e4ef1..ff20cab2b1 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -66,6 +66,20 @@ config ROCKCHIP_OTP
 	  This is a simple drive to dump specified values of Rockchip SoC
 	  from otp, such as cpu-leakage.
 
+config ROCKCHIP_HW_DECOMPRESS
+	bool "Rockchip HardWare Decompress Support"
+	depends on MISC && IRQ
+	help
+	  This driver support Decompress IP built-in Rockchip SoC, support
+	  LZ4, GZIP, PNG, ZLIB.
+
+config SPL_ROCKCHIP_HW_DECOMPRESS
+	bool "Rockchip HardWare Decompress Support"
+	depends on MISC
+	help
+	  This driver support Decompress IP built-in Rockchip SoC, support
+	  LZ4, GZIP, PNG, ZLIB.
+
 config SPL_ROCKCHIP_SECURE_OTP
 	bool "Rockchip Secure OTP Support in spl"
 	depends on SPL_MISC
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 0143dae2fc..67fd9a9541 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -54,3 +54,4 @@ obj-$(CONFIG_QFW) += qfw.o
 obj-$(CONFIG_ROCKCHIP_EFUSE) += rockchip-efuse.o
 obj-$(CONFIG_ROCKCHIP_OTP) += rockchip-otp.o
 obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_SECURE_OTP) += rockchip-secure-otp.o
+obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_HW_DECOMPRESS) += rockchip_decompress.o
diff --git a/drivers/misc/rockchip_decompress.c b/drivers/misc/rockchip_decompress.c
new file mode 100644
index 0000000000..109012abc5
--- /dev/null
+++ b/drivers/misc/rockchip_decompress.c
@@ -0,0 +1,240 @@
+// SPDX-License-Identifier:     GPL-2.0+
+/*
+ * Copyright (C) 2019 Rockchip Electronics Co., Ltd
+ */
+#include <common.h>
+#include <asm/io.h>
+#include <dm.h>
+#include <linux/bitops.h>
+#include <misc.h>
+#include <irq-generic.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define DECOM_CTRL		0x0
+#define DECOM_ENR		0x4
+#define DECOM_RADDR		0x8
+#define DECOM_WADDR		0xc
+#define DECOM_UDDSL		0x10
+#define DECOM_UDDSH		0x14
+#define DECOM_TXTHR		0x18
+#define DECOM_RXTHR		0x1c
+#define DECOM_SLEN		0x20
+#define DECOM_STAT		0x24
+#define DECOM_ISR		0x28
+#define DECOM_IEN		0x2c
+#define DECOM_AXI_STAT		0x30
+#define DECOM_TSIZEL		0x34
+#define DECOM_TSIZEH		0x38
+#define DECOM_MGNUM		0x3c
+#define DECOM_FRAME		0x40
+#define DECOM_DICTID		0x44
+#define DECOM_CSL		0x48
+#define DECOM_CSH		0x4c
+
+#define LZ4_HEAD_CSUM_CHECK_EN	BIT(1)
+#define LZ4_BLOCK_CSUM_CHECK_EN	BIT(2)
+#define LZ4_CONT_CSUM_CHECK_EN	BIT(3)
+
+#define DSOLIEN			BIT(19)
+#define ZDICTEIEN		BIT(18)
+#define GCMEIEN			BIT(17)
+#define GIDEIEN			BIT(16)
+#define CCCEIEN			BIT(15)
+#define BCCEIEN			BIT(14)
+#define HCCEIEN			BIT(13)
+#define CSEIEN			BIT(12)
+#define DICTEIEN		BIT(11)
+#define VNEIEN			BIT(10)
+#define WNEIEN			BIT(9)
+#define RDCEIEN			BIT(8)
+#define WRCEIEN			BIT(7)
+#define DISEIEN			BIT(6)
+#define LENEIEN			BIT(5)
+#define LITEIEN			BIT(4)
+#define SQMEIEN			BIT(3)
+#define SLCIEN			BIT(2)
+#define HDEIEN			BIT(1)
+#define DSIEN			BIT(0)
+
+#define DECOM_STOP		BIT(0)
+#define DECOM_COMPLETE		BIT(0)
+#define DECOM_GZIP_MODE		BIT(4)
+#define DECOM_ZLIB_MODE		BIT(5)
+#define DECOM_DEFLATE_MODE	BIT(0)
+
+#define DECOM_ENABLE		0x1
+#define DECOM_DISABLE		0x0
+
+#define DECOM_IRQ		0xffff /* fixme */
+
+#define DECOM_INT_MASK \
+	(DSOLIEN | ZDICTEIEN | GCMEIEN | GIDEIEN | \
+	CCCEIEN | BCCEIEN | HCCEIEN | CSEIEN | \
+	DICTEIEN | VNEIEN | WNEIEN | RDCEIEN | WRCEIEN | \
+	DISEIEN | LENEIEN | LITEIEN | SQMEIEN | SLCIEN | \
+	HDEIEN | DSIEN)
+
+enum decom_mod {
+	LZ4_MOD,
+	GZIP_MOD,
+	ZLIB_MOD,
+};
+
+struct rockchip_decom_param {
+	unsigned long addr_src;
+	unsigned long addr_dst;
+	unsigned long size;
+	enum decom_mod mode;
+};
+
+struct rockchip_decom_priv {
+	void __iomem *base;
+	bool done;
+};
+
+static int rockchip_decom_start(struct udevice *dev, void *buf)
+{
+	struct rockchip_decom_priv *priv = dev_get_priv(dev);
+	struct rockchip_decom_param *param = (struct rockchip_decom_param *)buf;
+
+	priv->done = false;
+
+	if (param->mode == LZ4_MOD)
+		writel(LZ4_CONT_CSUM_CHECK_EN |
+		       LZ4_HEAD_CSUM_CHECK_EN |
+		       LZ4_BLOCK_CSUM_CHECK_EN |
+		       LZ4_MOD, priv->base + DECOM_CTRL);
+
+	if (param->mode == GZIP_MOD)
+		writel(DECOM_DEFLATE_MODE | DECOM_GZIP_MODE,
+		       priv->base + DECOM_CTRL);
+
+	if (param->mode == ZLIB_MOD)
+		writel(DECOM_DEFLATE_MODE | DECOM_ZLIB_MODE,
+		       priv->base + DECOM_CTRL);
+
+	writel(param->addr_src, priv->base + DECOM_RADDR);
+	writel(param->addr_dst, priv->base + DECOM_WADDR);
+
+	writel(DECOM_INT_MASK, priv->base + DECOM_IEN);
+	writel(DECOM_ENABLE, priv->base + DECOM_ENR);
+
+	return 0;
+}
+
+static int rockchip_decom_stop(struct udevice *dev)
+{
+	struct rockchip_decom_priv *priv = dev_get_priv(dev);
+	int irq_status;
+
+	irq_status = readl(priv->base + DECOM_ISR);
+	/* clear interrupts */
+	if (irq_status)
+		writel(irq_status, priv->base + DECOM_ISR);
+
+	writel(DECOM_DISABLE, priv->base + DECOM_ENR);
+
+	return 0;
+}
+
+/* Caller must call this function to check if decompress done */
+static int rockchip_decom_done_poll(struct udevice *dev)
+{
+	struct rockchip_decom_priv *priv = dev_get_priv(dev);
+	int decom_status;
+
+	decom_status = readl(priv->base + DECOM_STAT);
+	if (decom_status & DECOM_COMPLETE)
+		return 0;
+
+	return -EINVAL;
+}
+
+/* Caller must fill in param @buf which represent struct rockchip_decom_param */
+static int rockchip_decom_ioctl(struct udevice *dev, unsigned long request,
+				void *buf)
+{
+	int ret = -EINVAL;
+
+	switch (request) {
+	case IOCTL_REQ_START:
+		ret = rockchip_decom_start(dev, buf);
+		break;
+	case IOCTL_REQ_POLL:
+		ret = rockchip_decom_done_poll(dev);
+		break;
+	case IOCTL_REQ_STOP:
+		ret = rockchip_decom_stop(dev);
+		break;
+	}
+
+	return ret;
+}
+
+static const struct misc_ops rockchip_decom_ops = {
+	.ioctl = rockchip_decom_ioctl,
+};
+
+static int rockchip_decom_ofdata_to_platdata(struct udevice *dev)
+{
+	struct rockchip_decom_priv *priv = dev_get_priv(dev);
+
+	priv->base = dev_read_addr_ptr(dev);
+	if (!priv->base)
+		return -ENOENT;
+
+	return 0;
+}
+
+#ifndef CONFIG_SPL_BUILD
+static void rockchip_decom_irqhandler(int irq, void *data)
+{
+	struct udevice *dev = data;
+	struct rockchip_decom_priv *priv = dev_get_priv(dev);
+	int irq_status;
+	int decom_status;
+
+	irq_status = readl(priv->base + DECOM_ISR);
+	/* clear interrupts */
+	writel(irq_status, priv->base + DECOM_ISR);
+	if (irq_status & DECOM_STOP) {
+		decom_status = readl(priv->base + DECOM_STAT);
+		if (decom_status & DECOM_COMPLETE) {
+			priv->done = true;
+			/*
+			 * TODO:
+			 * Inform someone that decompress completed
+			 */
+			printf("decom completed\n");
+		} else {
+			printf("decom failed, irq_status = 0x%x, decom_status = 0x%x\n",
+			       irq_status, decom_status);
+		}
+	}
+}
+#endif
+
+static int rockchip_decom_probe(struct udevice *dev)
+{
+#ifndef CONFIG_SPL_BUILD
+	irq_install_handler(DECOM_IRQ, rockchip_decom_irqhandler, dev);
+	irq_handler_enable(DECOM_IRQ);
+#endif
+	return 0;
+}
+
+static const struct udevice_id rockchip_decom_ids[] = {
+	{ .compatible = "rockchip,hw-decompress" },
+	{}
+};
+
+U_BOOT_DRIVER(rockchip_hw_decompress) = {
+	.name = "rockchip_hw_decompress",
+	.id = UCLASS_MISC,
+	.of_match = rockchip_decom_ids,
+	.probe = rockchip_decom_probe,
+	.ofdata_to_platdata = rockchip_decom_ofdata_to_platdata,
+	.priv_auto_alloc_size = sizeof(struct rockchip_decom_priv),
+	.ops = &rockchip_decom_ops,
+};

commit 1b5fef7e38e182b76e344fe631750ea4dd7c7a89
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 25 10:51:18 2019 +0800

    dm: misc: add ioctl request command definition
    
    Available for caller to call misc_ioctl(...).
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I985a6b2095ad8380f2675331f3f840b36001f8f5
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/misc.h b/include/misc.h
index 03ef55cdc8..3b25b95378 100644
--- a/include/misc.h
+++ b/include/misc.h
@@ -7,6 +7,15 @@
 #ifndef _MISC_H_
 #define _MISC_H_
 
+#include <asm-generic/ioctl.h>
+
+/*
+ * Request command to be sent for misc_ioctl().
+ */
+#define IOCTL_REQ_START		_IO('m', 0x01)
+#define IOCTL_REQ_STOP		_IO('m', 0x02)
+#define IOCTL_REQ_POLL		_IO('m', 0x03)
+
 /*
  * Read the device to buffer, optional.
  *

commit a61b9434cd619f5be45e26309a17f369420dd070
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Mon Jan 13 15:29:02 2020 +0800

    usb: gadget: amend usb download req buffer to 256K
    
    Through contrast test, the use of 256K buffer can improve the
    download speed than 128K buffer about 14% for USB2 and 27% for USB3.
    
    The statistics on RK3328-EVB as below:
    
    Buffer  USB2.0    USB3.0
    128K    21MB/S    30MB/S
    256K    24MB/S    38MB/S
    
    Change-Id: I3b040ed225b212196fc5ca677a4fce240ad290f3
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/gadget/storage_common.c b/drivers/usb/gadget/storage_common.c
index 7b2c4ae748..2d9851a22a 100644
--- a/drivers/usb/gadget/storage_common.c
+++ b/drivers/usb/gadget/storage_common.c
@@ -309,7 +309,7 @@ static struct fsg_lun *fsg_lun_from_dev(struct device *dev)
 #define FSG_NUM_BUFFERS	2
 
 /* Default size of buffer length. */
-#define FSG_BUFLEN	((u32)131072)
+#define FSG_BUFLEN	((u32)262144)
 
 /* Maximal number of LUNs supported in mass storage function */
 #define FSG_MAX_LUNS	8

commit 5433dc646a26902b0666d13981711a5401963dba
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Tue Jan 14 15:23:55 2020 +0800

    usb: dwc3: gadget: fix TRB buffer to multiple of MaxPacketSize
    
    According to the chapter 8.2.3.3 of DWC3 Databook, the total size
    of a Buffer Descriptor must be a multiple of MaxPacketSize for OUT
    endpoints. This commit fixes it.
    
    Change-Id: I7a4ae8ee73561c06cb4927cb83b4ae18a3f46c43
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index 9cf205cf9a..cc27509e01 100644
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -725,6 +725,16 @@ static void dwc3_prepare_one_trb(struct dwc3_ep *dep,
 			usb_endpoint_xfer_isoc(dep->endpoint.desc))
 		dep->free_slot++;
 
+	/*
+	 * According to the chapter 8.2.3.3 of DWC3 Databook,
+	 * for OUT endpoints, the total size of a Buffer Descriptor must be a
+	 * multiple of MaxPacketSize. So amend the TRB size to apply this rule.
+	 */
+	if (usb_endpoint_dir_out(dep->endpoint.desc)) {
+		length = dep->endpoint.maxpacket *
+			((length - 1) / dep->endpoint.maxpacket + 1);
+	}
+
 	trb->size = DWC3_TRB_SIZE_LENGTH(length);
 	trb->bpl = lower_32_bits(dma);
 	trb->bph = upper_32_bits(dma);
@@ -1607,7 +1617,10 @@ static int dwc3_gadget_init_hw_endpoints(struct dwc3 *dwc,
 		} else {
 			int		ret;
 
-			usb_ep_set_maxpacket_limit(&dep->endpoint, 512);
+			if (dwc->maximum_speed < USB_SPEED_SUPER)
+				usb_ep_set_maxpacket_limit(&dep->endpoint, 512);
+			else
+				usb_ep_set_maxpacket_limit(&dep->endpoint, 1024);
 			dep->endpoint.max_streams = 15;
 			dep->endpoint.ops = &dwc3_gadget_ep_ops;
 			list_add_tail(&dep->endpoint.ep_list,

commit c936c8a6a979aca328ea7759eceae61391d63675
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Tue Jan 14 15:03:05 2020 +0800

    usb: dwc3: gadget: always enable CSP
    
    CSP bit of TRB Control is useful for protocols such CDC EEM/ECM/NCM
    where we're transferring in blocks of MTU-sized requests (usually MTU
    is 1500 bytes).
    
    We know we will always have a short packet after two (for HS)
    wMaxPacketSize packets and, usually, we will have a long(-ish) queue of
    requests (for our g_ether gadget, we have at least 10 requests).
    
    Instead of always stopping the queue processing to interrupt, giveback
    and restart, let's tell dwc3 to interrupt but continue processing
    following request if we have anything already pending in the queue.
    
    Refer to commit ca4d44ea2a91 ("usb: dwc3: gadget: always enable CSP")
    in Linux Kernel.
    
    Change-Id: Icce79fa174f6d7f040e1c332fe6792a1922c5a04
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index 99efd6799a..9cf205cf9a 100644
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -739,6 +739,9 @@ static void dwc3_prepare_one_trb(struct dwc3_ep *dep,
 			trb->ctrl = DWC3_TRBCTL_ISOCHRONOUS_FIRST;
 		else
 			trb->ctrl = DWC3_TRBCTL_ISOCHRONOUS;
+
+		/* always enable Interrupt on Missed ISOC */
+		trb->ctrl |= DWC3_TRB_CTRL_ISP_IMI;
 		break;
 
 	case USB_ENDPOINT_XFER_BULK:
@@ -753,15 +756,14 @@ static void dwc3_prepare_one_trb(struct dwc3_ep *dep,
 		BUG();
 	}
 
+	/* always enable Continue on Short Packet */
+	trb->ctrl |= DWC3_TRB_CTRL_CSP;
+
 	if (!req->request.no_interrupt && !chain)
-		trb->ctrl |= DWC3_TRB_CTRL_IOC;
+		trb->ctrl |= DWC3_TRB_CTRL_IOC | DWC3_TRB_CTRL_ISP_IMI;
 
-	if (usb_endpoint_xfer_isoc(dep->endpoint.desc)) {
-		trb->ctrl |= DWC3_TRB_CTRL_ISP_IMI;
-		trb->ctrl |= DWC3_TRB_CTRL_CSP;
-	} else if (last) {
+	if (last)
 		trb->ctrl |= DWC3_TRB_CTRL_LST;
-	}
 
 	if (chain)
 		trb->ctrl |= DWC3_TRB_CTRL_CHN;

commit 9c946fbb2485224893e13afaa36557df2f482720
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Thu Jan 9 10:22:34 2020 +0800

    usb: dwc3: add dis-u1u2-quirk to reject enter U1 and U2
    
    The DWC3 with Innosilicon USB 3.0 PHY on Rockchip platforms
    (e.g. rk3328, rk1808) has problem to exit to U0 state from
    U1 or U2 state when DWC3 work as peripheral mode. This patch
    adds a quirk to reject transition to U1 and U2 state to
    workaround this issue.
    
    Refer to commit aaa5c055cc06 ("usb: dwc3: add dis-u1u2-quirk to
    reject enter U1 and U2") in Rockchip Linux Kernel-4.4 .
    
    Change-Id: I1f4176caab3ccdc31ba7eb06684267833bf804db
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 2d6ef3b1b9..11192e66f9 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -723,6 +723,7 @@ int dwc3_uboot_init(struct dwc3_device *dwc3_dev)
 	dwc->rx_detect_poll_quirk = dwc3_dev->rx_detect_poll_quirk;
 	dwc->dis_u3_susphy_quirk = dwc3_dev->dis_u3_susphy_quirk;
 	dwc->dis_u2_susphy_quirk = dwc3_dev->dis_u2_susphy_quirk;
+	dwc->dis_u1u2_quirk = dwc3_dev->dis_u2_susphy_quirk;
 
 	dwc->tx_de_emphasis_quirk = dwc3_dev->tx_de_emphasis_quirk;
 	if (dwc3_dev->tx_de_emphasis)
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index c9e95f6605..fc43f9682f 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -701,6 +701,7 @@ struct dwc3_scratchpad_array {
  * @rx_detect_poll_quirk: set if we enable rx_detect to polling lfps quirk
  * @dis_u3_susphy_quirk: set if we disable usb3 suspend phy
  * @dis_u2_susphy_quirk: set if we disable usb2 suspend phy
+ * @dis_u1u2_quirk: set if we reject transition to U1 or U2 state
  * @tx_de_emphasis_quirk: set if we enable Tx de-emphasis quirk
  * @tx_de_emphasis: Tx de-emphasis value
  * 	0	- -6dB de-emphasis
@@ -826,6 +827,7 @@ struct dwc3 {
 	unsigned		rx_detect_poll_quirk:1;
 	unsigned		dis_u3_susphy_quirk:1;
 	unsigned		dis_u2_susphy_quirk:1;
+	unsigned		dis_u1u2_quirk:1;
 
 	unsigned		tx_de_emphasis_quirk:1;
 	unsigned		tx_de_emphasis:2;
diff --git a/drivers/usb/dwc3/ep0.c b/drivers/usb/dwc3/ep0.c
index aa5215ed95..8b98391ab9 100644
--- a/drivers/usb/dwc3/ep0.c
+++ b/drivers/usb/dwc3/ep0.c
@@ -417,7 +417,7 @@ static int dwc3_ep0_handle_feature(struct dwc3 *dwc,
 				return -EINVAL;
 
 			reg = dwc3_readl(dwc->regs, DWC3_DCTL);
-			if (set)
+			if (set && !dwc->dis_u1u2_quirk)
 				reg |= DWC3_DCTL_INITU1ENA;
 			else
 				reg &= ~DWC3_DCTL_INITU1ENA;
@@ -431,7 +431,7 @@ static int dwc3_ep0_handle_feature(struct dwc3 *dwc,
 				return -EINVAL;
 
 			reg = dwc3_readl(dwc->regs, DWC3_DCTL);
-			if (set)
+			if (set && !dwc->dis_u1u2_quirk)
 				reg |= DWC3_DCTL_INITU2ENA;
 			else
 				reg &= ~DWC3_DCTL_INITU2ENA;
@@ -568,7 +568,10 @@ static int dwc3_ep0_set_config(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)
 			 * nothing is pending from application.
 			 */
 			reg = dwc3_readl(dwc->regs, DWC3_DCTL);
-			reg |= (DWC3_DCTL_ACCEPTU1ENA | DWC3_DCTL_ACCEPTU2ENA);
+			if (dwc->dis_u1u2_quirk)
+				reg &= ~(DWC3_DCTL_ACCEPTU1ENA | DWC3_DCTL_ACCEPTU2ENA);
+			else
+				reg |= (DWC3_DCTL_ACCEPTU1ENA | DWC3_DCTL_ACCEPTU2ENA);
 			dwc3_writel(dwc->regs, DWC3_DCTL, reg);
 
 			dwc->resize_fifos = true;
diff --git a/include/dwc3-uboot.h b/include/dwc3-uboot.h
index 3227c601bb..14c9b5afdb 100644
--- a/include/dwc3-uboot.h
+++ b/include/dwc3-uboot.h
@@ -33,6 +33,7 @@ struct dwc3_device {
 	unsigned rx_detect_poll_quirk;
 	unsigned dis_u3_susphy_quirk;
 	unsigned dis_u2_susphy_quirk;
+	unsigned dis_u1u2_quirk;
 	unsigned tx_de_emphasis_quirk;
 	unsigned tx_de_emphasis;
 	unsigned usb2_phyif_utmi_width;

commit 7ce213e7814528566f7789b69ff917c6cc0ed3d9
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Mon Jan 13 15:24:54 2020 +0800

    Revert "UPSTREAM: drivers: usb: dwc3: setup phy before dwc3 core soft reset"
    
    This reverts commit 0dcb583e26b1f519ecb0d8bbd997a710593be7e7.
    
    Change-Id: If0f661a4e1b139c0d12b80e5fd98398bf0892373
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 4dc9324079..2d6ef3b1b9 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -450,8 +450,6 @@ static int dwc3_core_init(struct dwc3 *dwc)
 		goto err0;
 	}
 
-	dwc3_phy_setup(dwc);
-
 	ret = dwc3_core_soft_reset(dwc);
 	if (ret)
 		goto err0;
@@ -526,6 +524,8 @@ static int dwc3_core_init(struct dwc3 *dwc)
 
 	dwc3_writel(dwc->regs, DWC3_GCTL, reg);
 
+	dwc3_phy_setup(dwc);
+
 	ret = dwc3_alloc_scratch_buffers(dwc);
 	if (ret)
 		goto err0;

commit 0afd346fb3ba47f919c606473e6e9972304848c6
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed Jan 8 17:56:48 2020 +0800

    rockchip: spl-boot-order: compatible with BOOT_DEVICE_SPI case
    
    Change-Id: Ia3a5506665ea98aa900f253fb703d825c1cf4929
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/spl-boot-order.c b/arch/arm/mach-rockchip/spl-boot-order.c
index d45e47697a..81a03c580e 100644
--- a/arch/arm/mach-rockchip/spl-boot-order.c
+++ b/arch/arm/mach-rockchip/spl-boot-order.c
@@ -72,10 +72,13 @@ static int spl_node_to_boot_device(int node)
 	 * soon.
 	 */
 	if (!uclass_get_device_by_of_offset(UCLASS_SPI_FLASH, node, &parent))
+#ifndef CONFIG_SPL_MTD_SUPPORT
+		return BOOT_DEVICE_SPI;
+#else
 		return BOOT_DEVICE_MTD_BLK_SPI_NOR;
-
 	if (!uclass_get_device_by_of_offset(UCLASS_MTD, node, &parent))
 		return BOOT_DEVICE_MTD_BLK_SPI_NAND;
+#endif
 
 #ifdef CONFIG_SPL_NAND_SUPPORT
 	if (!rk_nand_init())

commit cc11e1d368e8474e92c0c1127c67c5cf4c284a39
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jan 10 11:38:14 2020 +0800

    rockchip: px30: set malloc length 32MB
    
    AVB bootflow allocs large memory from system now.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I2ed9c7e1d48d9ff3187f02eda03e7ad3089ed26e

diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index 7ef6237821..c0733bd0a1 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -9,7 +9,7 @@
 
 #include "rockchip-common.h"
 
-#define CONFIG_SYS_MALLOC_LEN		(192 << 20) /* 192M */
+#define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
 

commit 243edbf940eaf9c693a79b7cca02ebba36fd92eb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jan 10 10:28:33 2020 +0800

    clk: rockchip: rk3399: init 816 MHz for ARM big core
    
    We don't use clk_set_defaults() to initial it, because
    there are too many clocks to be set in "assigned-clock-rates"
    which wastes time.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I6de5e2174945fdbce06e044c390ae2860970b0c4

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index bfa2e87f8e..fa24c19c10 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -1396,6 +1396,7 @@ static void rkclk_init(struct rk3399_cru *cru)
 	u32 pclk_div;
 
 	rk3399_configure_cpu(cru, APLL_816_MHZ, CPU_CLUSTER_LITTLE);
+	rk3399_configure_cpu(cru, APLL_816_MHZ, CPU_CLUSTER_BIG);
 
 	/*
 	 * some cru registers changed by bootrom, we'd better reset them to

commit 0df2c3dfbcf2bfb55b1224e1bb37eb1665229343
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 7 10:32:40 2020 +0800

    cpu: rockchip amp: add read_rockchip_image()
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I1015178484053329c0e6d77169486b0305c4268e

diff --git a/drivers/cpu/rockchip_amp.c b/drivers/cpu/rockchip_amp.c
index 9408c8c1b6..6ca0850d35 100644
--- a/drivers/cpu/rockchip_amp.c
+++ b/drivers/cpu/rockchip_amp.c
@@ -13,6 +13,75 @@
 #define AMP_I(fmt, args...)	printf("AMP: "fmt, ##args)
 #define AMP_E(fmt, args...)	printf("AMP Error: "fmt, ##args)
 
+/*
+ * non-OTA packaged kernel.img & boot.img return the image size on success,
+ * and a negative value on error.
+ */
+static int read_rockchip_image(struct blk_desc *dev_desc,
+			       disk_partition_t *part, void *dst)
+{
+	struct rockchip_image *img;
+	int header_len = 8;
+	int cnt, ret;
+#ifdef CONFIG_ROCKCHIP_CRC
+	u32 crc32;
+#endif
+
+	img = memalign(ARCH_DMA_MINALIGN, RK_BLK_SIZE);
+	if (!img)
+		return -ENOMEM;
+
+	/* read first block with header imformation */
+	ret = blk_dread(dev_desc, part->start, 1, img);
+	if (ret != 1) {
+		ret = -EIO;
+		goto err;
+	}
+
+	if (img->tag != TAG_KERNEL) {
+		printf("Invalid %s image tag(0x%x)\n", part->name, img->tag);
+		ret = -EINVAL;
+		goto err;
+	}
+
+	/*
+	 * read the rest blks
+	 * total size = image size + 8 bytes header + 4 bytes crc32
+	 */
+	cnt = DIV_ROUND_UP(img->size + 8 + 4, RK_BLK_SIZE);
+	if (!sysmem_alloc_base_by_name((const char *)part->name,
+				       (phys_addr_t)dst,
+				       cnt * dev_desc->blksz)) {
+		ret = -ENXIO;
+		goto err;
+	}
+
+	memcpy(dst, img->image, RK_BLK_SIZE - header_len);
+	ret = blk_dread(dev_desc, part->start + 1, cnt - 1,
+			dst + RK_BLK_SIZE - header_len);
+	if (ret != (cnt - 1)) {
+		printf("Failed to read %s part, ret=%d\n", part->name, ret);
+		ret = -EIO;
+	} else {
+		ret = img->size;
+	}
+
+#ifdef CONFIG_ROCKCHIP_CRC
+	printf("%s image rk crc32 verify... ", part->name);
+	crc32 = crc32_verify((uchar *)(ulong)dst, img->size + 4);
+	if (!crc32) {
+		printf("fail!\n");
+		ret = -EINVAL;
+	} else {
+		printf("okay.\n");
+	}
+#endif
+
+err:
+	free(img);
+	return ret;
+}
+
 /*
  * An example for amps dts node configure:
  *

commit 6d8afb5495c258842cd12f8ac41322f3a0493b51
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 7 09:23:34 2020 +0800

    rockchip: remove rockchip crc file
    
    These code have been moved into bootrkp.c.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I12c87b9f7dd7e8ce0c866105e4f5cecd0e6bcf21

diff --git a/arch/arm/include/asm/arch-rockchip/rockchip_crc.h b/arch/arm/include/asm/arch-rockchip/rockchip_crc.h
deleted file mode 100644
index c017394d12..0000000000
--- a/arch/arm/include/asm/arch-rockchip/rockchip_crc.h
+++ /dev/null
@@ -1,12 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#ifndef __ROCKCHIP_CRC_H_
-#define __ROCKCHIP_CRC_H_
-
-u32 rockchip_crc_verify(unsigned char *data, u32 size);
-
-#endif
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index e09b1e8be4..809b6c63f2 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -27,7 +27,6 @@ obj-y += iomem.o
 obj-y += memblk.o
 obj-y += hotkey.o
 
-obj-$(CONFIG_ROCKCHIP_CRC) += rockchip_crc.o
 obj-$(CONFIG_ROCKCHIP_SMCCC) += rockchip_smccc.o
 obj-$(CONFIG_ROCKCHIP_VENDOR_PARTITION) += vendor.o
 obj-$(CONFIG_ROCKCHIP_RESOURCE_IMAGE) += resource_img.o
diff --git a/arch/arm/mach-rockchip/rockchip_crc.c b/arch/arm/mach-rockchip/rockchip_crc.c
deleted file mode 100644
index 61ddbfb8d2..0000000000
--- a/arch/arm/mach-rockchip/rockchip_crc.c
+++ /dev/null
@@ -1,119 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/arch/rockchip_crc.h>
-
-#define tole(x) cpu_to_le32(x)
-
-/* Table of CRC-32's of all single-byte values (made by make_crc_table) */
-static const uint32_t crc_table[256] = {
-	tole(0x00000000L), tole(0x04c10db7L), tole(0x09821b6eL), tole(0x0d4316d9L),
-	tole(0x130436dcL), tole(0x17c53b6bL), tole(0x1a862db2L), tole(0x1e472005L),
-	tole(0x26086db8L), tole(0x22c9600fL), tole(0x2f8a76d6L), tole(0x2b4b7b61L),
-	tole(0x350c5b64L), tole(0x31cd56d3L), tole(0x3c8e400aL), tole(0x384f4dbdL),
-	tole(0x4c10db70L), tole(0x48d1d6c7L), tole(0x4592c01eL), tole(0x4153cda9L),
-	tole(0x5f14edacL), tole(0x5bd5e01bL), tole(0x5696f6c2L), tole(0x5257fb75L),
-	tole(0x6a18b6c8L), tole(0x6ed9bb7fL), tole(0x639aada6L), tole(0x675ba011L),
-	tole(0x791c8014L), tole(0x7ddd8da3L), tole(0x709e9b7aL), tole(0x745f96cdL),
-	tole(0x9821b6e0L), tole(0x9ce0bb57L), tole(0x91a3ad8eL), tole(0x9562a039L),
-	tole(0x8b25803cL), tole(0x8fe48d8bL), tole(0x82a79b52L), tole(0x866696e5L),
-	tole(0xbe29db58L), tole(0xbae8d6efL), tole(0xb7abc036L), tole(0xb36acd81L),
-	tole(0xad2ded84L), tole(0xa9ece033L), tole(0xa4aff6eaL), tole(0xa06efb5dL),
-	tole(0xd4316d90L), tole(0xd0f06027L), tole(0xddb376feL), tole(0xd9727b49L),
-	tole(0xc7355b4cL), tole(0xc3f456fbL), tole(0xceb74022L), tole(0xca764d95L),
-	tole(0xf2390028L), tole(0xf6f80d9fL), tole(0xfbbb1b46L), tole(0xff7a16f1L),
-	tole(0xe13d36f4L), tole(0xe5fc3b43L), tole(0xe8bf2d9aL), tole(0xec7e202dL),
-	tole(0x34826077L), tole(0x30436dc0L), tole(0x3d007b19L), tole(0x39c176aeL),
-	tole(0x278656abL), tole(0x23475b1cL), tole(0x2e044dc5L), tole(0x2ac54072L),
-	tole(0x128a0dcfL), tole(0x164b0078L), tole(0x1b0816a1L), tole(0x1fc91b16L),
-	tole(0x018e3b13L), tole(0x054f36a4L), tole(0x080c207dL), tole(0x0ccd2dcaL),
-	tole(0x7892bb07L), tole(0x7c53b6b0L), tole(0x7110a069L), tole(0x75d1addeL),
-	tole(0x6b968ddbL), tole(0x6f57806cL), tole(0x621496b5L), tole(0x66d59b02L),
-	tole(0x5e9ad6bfL), tole(0x5a5bdb08L), tole(0x5718cdd1L), tole(0x53d9c066L),
-	tole(0x4d9ee063L), tole(0x495fedd4L), tole(0x441cfb0dL), tole(0x40ddf6baL),
-	tole(0xaca3d697L), tole(0xa862db20L), tole(0xa521cdf9L), tole(0xa1e0c04eL),
-	tole(0xbfa7e04bL), tole(0xbb66edfcL), tole(0xb625fb25L), tole(0xb2e4f692L),
-	tole(0x8aabbb2fL), tole(0x8e6ab698L), tole(0x8329a041L), tole(0x87e8adf6L),
-	tole(0x99af8df3L), tole(0x9d6e8044L), tole(0x902d969dL), tole(0x94ec9b2aL),
-	tole(0xe0b30de7L), tole(0xe4720050L), tole(0xe9311689L), tole(0xedf01b3eL),
-	tole(0xf3b73b3bL), tole(0xf776368cL), tole(0xfa352055L), tole(0xfef42de2L),
-	tole(0xc6bb605fL), tole(0xc27a6de8L), tole(0xcf397b31L), tole(0xcbf87686L),
-	tole(0xd5bf5683L), tole(0xd17e5b34L), tole(0xdc3d4dedL), tole(0xd8fc405aL),
-	tole(0x6904c0eeL), tole(0x6dc5cd59L), tole(0x6086db80L), tole(0x6447d637L),
-	tole(0x7a00f632L), tole(0x7ec1fb85L), tole(0x7382ed5cL), tole(0x7743e0ebL),
-	tole(0x4f0cad56L), tole(0x4bcda0e1L), tole(0x468eb638L), tole(0x424fbb8fL),
-	tole(0x5c089b8aL), tole(0x58c9963dL), tole(0x558a80e4L), tole(0x514b8d53L),
-	tole(0x25141b9eL), tole(0x21d51629L), tole(0x2c9600f0L), tole(0x28570d47L),
-	tole(0x36102d42L), tole(0x32d120f5L), tole(0x3f92362cL), tole(0x3b533b9bL),
-	tole(0x031c7626L), tole(0x07dd7b91L), tole(0x0a9e6d48L), tole(0x0e5f60ffL),
-	tole(0x101840faL), tole(0x14d94d4dL), tole(0x199a5b94L), tole(0x1d5b5623L),
-	tole(0xf125760eL), tole(0xf5e47bb9L), tole(0xf8a76d60L), tole(0xfc6660d7L),
-	tole(0xe22140d2L), tole(0xe6e04d65L), tole(0xeba35bbcL), tole(0xef62560bL),
-	tole(0xd72d1bb6L), tole(0xd3ec1601L), tole(0xdeaf00d8L), tole(0xda6e0d6fL),
-	tole(0xc4292d6aL), tole(0xc0e820ddL), tole(0xcdab3604L), tole(0xc96a3bb3L),
-	tole(0xbd35ad7eL), tole(0xb9f4a0c9L), tole(0xb4b7b610L), tole(0xb076bba7L),
-	tole(0xae319ba2L), tole(0xaaf09615L), tole(0xa7b380ccL), tole(0xa3728d7bL),
-	tole(0x9b3dc0c6L), tole(0x9ffccd71L), tole(0x92bfdba8L), tole(0x967ed61fL),
-	tole(0x8839f61aL), tole(0x8cf8fbadL), tole(0x81bbed74L), tole(0x857ae0c3L),
-	tole(0x5d86a099L), tole(0x5947ad2eL), tole(0x5404bbf7L), tole(0x50c5b640L),
-	tole(0x4e829645L), tole(0x4a439bf2L), tole(0x47008d2bL), tole(0x43c1809cL),
-	tole(0x7b8ecd21L), tole(0x7f4fc096L), tole(0x720cd64fL), tole(0x76cddbf8L),
-	tole(0x688afbfdL), tole(0x6c4bf64aL), tole(0x6108e093L), tole(0x65c9ed24L),
-	tole(0x11967be9L), tole(0x1557765eL), tole(0x18146087L), tole(0x1cd56d30L),
-	tole(0x02924d35L), tole(0x06534082L), tole(0x0b10565bL), tole(0x0fd15becL),
-	tole(0x379e1651L), tole(0x335f1be6L), tole(0x3e1c0d3fL), tole(0x3add0088L),
-	tole(0x249a208dL), tole(0x205b2d3aL), tole(0x2d183be3L), tole(0x29d93654L),
-	tole(0xc5a71679L), tole(0xc1661bceL), tole(0xcc250d17L), tole(0xc8e400a0L),
-	tole(0xd6a320a5L), tole(0xd2622d12L), tole(0xdf213bcbL), tole(0xdbe0367cL),
-	tole(0xe3af7bc1L), tole(0xe76e7676L), tole(0xea2d60afL), tole(0xeeec6d18L),
-	tole(0xf0ab4d1dL), tole(0xf46a40aaL), tole(0xf9295673L), tole(0xfde85bc4L),
-	tole(0x89b7cd09L), tole(0x8d76c0beL), tole(0x8035d667L), tole(0x84f4dbd0L),
-	tole(0x9ab3fbd5L), tole(0x9e72f662L), tole(0x9331e0bbL), tole(0x97f0ed0cL),
-	tole(0xafbfa0b1L), tole(0xab7ead06L), tole(0xa63dbbdfL), tole(0xa2fcb668L),
-	tole(0xbcbb966dL), tole(0xb87a9bdaL), tole(0xb5398d03L), tole(0xb1f880b4L)
-};
-
-#define DO_CRC(x) crc = tab[((crc >> 24) ^ (x)) & 255] ^ (crc << 8)
-
-static uint32_t crc32_rk(uint32_t crc, const unsigned char *s, uint32_t len)
-{
-	const uint32_t *tab;
-
-	tab = crc_table;
-	crc = cpu_to_le32(crc);
-
-	do {
-		DO_CRC(*s++);
-	} while (--len);
-
-	return le32_to_cpu(crc);
-}
-
-#undef DO_CRC
-
-u32 rockchip_crc_verify(unsigned char *data, u32 size)
-{
-	u32 crc_check = 0, crc_calc = 0;
-	int i = 0;
-
-	if (size <= 4)
-		return 0;
-
-	size -= 4;
-	for (i = 3; i >= 0; i--)
-		crc_check = (crc_check << 8) + (*(data + size + i));
-
-	crc_calc = crc32_rk(0, data, size);
-
-	debug("%s: crc_check=0x%x, crc_calc=0x%x\n",
-	      __func__, crc_check, crc_calc);
-
-	if (crc_calc == crc_check)
-		return crc_check;
-
-	return 0;
-}

commit d04ada6cfd031266a9ea51beb00583297aa3c29f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 7 10:33:33 2020 +0800

    rockchip: clean boot_mode.c and boot_rkimg.c
    
    Clean the code into where it belongs to.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ia034b8c3d8b264796db72c7bf44bab95811ecb77

diff --git a/arch/arm/include/asm/arch-rockchip/boot_mode.h b/arch/arm/include/asm/arch-rockchip/boot_mode.h
index 970a3249da..f6b5835bb0 100644
--- a/arch/arm/include/asm/arch-rockchip/boot_mode.h
+++ b/arch/arm/include/asm/arch-rockchip/boot_mode.h
@@ -24,7 +24,6 @@
 
 #ifndef __ASSEMBLY__
 int setup_boot_mode(void);
-void boot_devtype_init(void);
 #endif
 
 #endif
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 9f81d9a211..af9f1ac1b6 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -217,6 +217,7 @@ int board_late_init(void)
 {
 	rockchip_set_ethaddr();
 	rockchip_set_serialno();
+	setup_download_mode();
 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0)
 	setup_boot_mode();
 #endif
diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index 9227786ce0..c4d91fb9a0 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -5,176 +5,165 @@
  */
 
 #include <common.h>
-#include <adc.h>
+#include <boot_rkimg.h>
+#include <malloc.h>
 #include <asm/io.h>
 #include <asm/arch/boot_mode.h>
-#include <asm/arch/hotkey.h>
-#include <asm/arch/param.h>
-#include <cli.h>
-#include <dm.h>
-#include <fdtdec.h>
-#include <boot_rkimg.h>
-#include <stdlib.h>
-#include <linux/usb/phy-rockchip-inno-usb2.h>
-#include <key.h>
-#ifdef CONFIG_DM_RAMDISK
-#include <ramdisk.h>
-#endif
-#include <mmc.h>
-#include <console.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#if (CONFIG_ROCKCHIP_BOOT_MODE_REG == 0)
-
-int setup_boot_mode(void)
-{
-	return 0;
-}
-
-#else
-
-void set_back_to_bootrom_dnl_flag(void)
-{
-	writel(BOOT_BROM_DOWNLOAD, CONFIG_ROCKCHIP_BOOT_MODE_REG);
-}
-
 /*
- * detect download key status by adc, most rockchip
- * based boards use adc sample the download key status,
- * but there are also some use gpio. So it's better to
- * make this a weak function that can be override by
- * some special boards.
+ * Generally, we have 3 ways to get reboot mode:
+ *
+ * 1. from bootloader_message which is defined in MISC partition;
+ * 2. from CONFIG_ROCKCHIP_BOOT_MODE_REG which supports "reboot xxx" commands;
+ * 3. from env "reboot_mode" which is added by U-Boot code(currently only when
+ *    recovery key pressed);
+ *
+ * 1st and 2nd cases are static determined at system start and we check it once,
+ * while 3th case is dynamically added by U-Boot code, so we have to check it
+ * everytime.
+ *
+ * Recovery mode from:
+ *	- MISC partition;
+ *	- "reboot recovery" command;
+ *	- recovery key pressed without usb attach;
  */
-#define KEY_DOWN_MIN_VAL	0
-#define KEY_DOWN_MAX_VAL	30
-
-__weak int rockchip_dnl_key_pressed(void)
+int rockchip_get_boot_mode(void)
 {
-	int keyval = false;
-
-/*
- * This is a generic interface to read key
- */
-#if defined(CONFIG_DM_KEY)
-	keyval = key_read(KEY_VOLUMEUP);
+	struct bootloader_message *bmsg = NULL;
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+	uint32_t reg_boot_mode;
+	char *env_reboot_mode;
+	static int boot_mode = -1;	/* static */
+	int clear_boot_reg = 0;
+	int ret, cnt;
+#ifdef CONFIG_ANDROID_BOOT_IMAGE
+	u32 bcb_offset = android_bcb_msg_sector_offset();
+#else
+	u32 bcb_offset = BCB_MESSAGE_BLK_OFFSET;
+#endif
 
-	return key_is_pressed(keyval);
+	/*
+	 * Here, we mainly check for:
+	 * In rockusb_download(), that recovery key is pressed without
+	 * USB attach will do env_set("reboot_mode", "recovery");
+	 */
+	env_reboot_mode = env_get("reboot_mode");
+	if (env_reboot_mode) {
+		if (!strcmp(env_reboot_mode, "recovery-key")) {
+			boot_mode = BOOT_MODE_RECOVERY;
+			printf("boot mode: recovery (key)\n");
+		} else if (!strcmp(env_reboot_mode, "recovery-usb")) {
+			boot_mode = BOOT_MODE_RECOVERY;
+			printf("boot mode: recovery (usb)\n");
+		} else if (!strcmp(env_reboot_mode, "recovery")) {
+			boot_mode = BOOT_MODE_RECOVERY;
+			printf("boot mode: recovery(env)\n");
+		} else if (!strcmp(env_reboot_mode, "fastboot")) {
+			boot_mode = BOOT_MODE_BOOTLOADER;
+			printf("boot mode: fastboot\n");
+		}
+	}
 
-#elif defined(CONFIG_ADC)
-	const void *blob = gd->fdt_blob;
-	unsigned int val;
-	int channel = 1;
-	int node;
-	int ret;
-	u32 chns[2];
+	if (boot_mode != -1)
+		return boot_mode;
 
-	node = fdt_node_offset_by_compatible(blob, 0, "adc-keys");
-	if (node >= 0) {
-	       if (!fdtdec_get_int_array(blob, node, "io-channels", chns, 2))
-		       channel = chns[1];
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -ENODEV;
 	}
 
-	ret = adc_channel_single_shot("saradc", channel, &val);
-	if (ret) {
-		printf("%s adc_channel_single_shot fail! ret=%d\n", __func__, ret);
-		return false;
+	ret = part_get_info_by_name(dev_desc, PART_MISC, &part_info);
+	if (ret < 0) {
+		printf("%s: Could not found misc partition\n", __func__);
+		goto fallback;
 	}
 
-	if ((val >= KEY_DOWN_MIN_VAL) && (val <= KEY_DOWN_MAX_VAL))
-		return true;
-	else
-		return false;
-#endif
-
-	return keyval;
-}
-
-void boot_devtype_init(void)
-{
-	const char *devtype_num_set = "run rkimg_bootdev";
-	char *devtype = NULL, *devnum = NULL;
-	static int done = 0;
-	int atags_en = 0;
-	int ret;
-
-	if (done)
-		return;
-
-	ret = param_parse_bootdev(&devtype, &devnum);
-	if (!ret) {
-		atags_en = 1;
-		env_set("devtype", devtype);
-		env_set("devnum", devnum);
-
-#ifdef CONFIG_DM_MMC
-		if (!strcmp("mmc", devtype))
-			mmc_initialize(gd->bd);
-#endif
-		/*
-		 * For example, the pre-loader do not have mtd device,
-		 * and pass devtype is nand. Then U-Boot can not get
-		 * dev_desc when use mtd driver to read firmware. So
-		 * test the block dev is exist or not here.
-		 *
-		 * And the devtype & devnum maybe wrong sometimes, it
-		 * is better to test first.
-		 */
-		if (blk_get_devnum_by_typename(devtype, atoi(devnum)))
-			goto finish;
+	cnt = DIV_ROUND_UP(sizeof(struct bootloader_message), dev_desc->blksz);
+	bmsg = memalign(ARCH_DMA_MINALIGN, cnt * dev_desc->blksz);
+	ret = blk_dread(dev_desc,
+			part_info.start + bcb_offset,
+			cnt, bmsg);
+	if (ret != cnt) {
+		free(bmsg);
+		return -EIO;
 	}
 
-	/* If not find valid bootdev by atags, scan all possible */
-#ifdef CONFIG_DM_MMC
-	mmc_initialize(gd->bd);
-#endif
-	ret = run_command_list(devtype_num_set, -1, 0);
-	if (ret) {
-		/* Set default dev type/num if command not valid */
-		devtype = "mmc";
-		devnum = "0";
-		env_set("devtype", devtype);
-		env_set("devnum", devnum);
+fallback:
+	/*
+	 * Boot mode priority
+	 *
+	 * Anyway, we should set download boot mode as the highest priority, so:
+	 *
+	 * reboot loader/bootloader/fastboot > misc partition "recovery" > reboot xxx.
+	 */
+	reg_boot_mode = readl((void *)CONFIG_ROCKCHIP_BOOT_MODE_REG);
+	if (reg_boot_mode == BOOT_LOADER) {
+		printf("boot mode: loader\n");
+		boot_mode = BOOT_MODE_LOADER;
+		clear_boot_reg = 1;
+	} else if (reg_boot_mode == BOOT_FASTBOOT) {
+		printf("boot mode: bootloader\n");
+		boot_mode = BOOT_MODE_BOOTLOADER;
+		clear_boot_reg = 1;
+	} else if (bmsg && !strcmp(bmsg->command, "boot-recovery")) {
+		printf("boot mode: recovery (misc)\n");
+		boot_mode = BOOT_MODE_RECOVERY;
+		clear_boot_reg = 1;
+	} else {
+		switch (reg_boot_mode) {
+		case BOOT_NORMAL:
+			printf("boot mode: normal\n");
+			boot_mode = BOOT_MODE_NORMAL;
+			clear_boot_reg = 1;
+			break;
+		case BOOT_RECOVERY:
+			printf("boot mode: recovery (cmd)\n");
+			boot_mode = BOOT_MODE_RECOVERY;
+			clear_boot_reg = 1;
+			break;
+		case BOOT_UMS:
+			printf("boot mode: ums\n");
+			boot_mode = BOOT_MODE_UMS;
+			clear_boot_reg = 1;
+			break;
+		case BOOT_CHARGING:
+			printf("boot mode: charging\n");
+			boot_mode = BOOT_MODE_CHARGING;
+			clear_boot_reg = 1;
+			break;
+		case BOOT_PANIC:
+			printf("boot mode: panic\n");
+			boot_mode = BOOT_MODE_PANIC;
+			break;
+		case BOOT_WATCHDOG:
+			printf("boot mode: watchdog\n");
+			boot_mode = BOOT_MODE_WATCHDOG;
+			break;
+		default:
+			printf("boot mode: None\n");
+			boot_mode = BOOT_MODE_UNDEFINE;
+		}
 	}
 
-finish:
-	done = 1;
-	printf("Bootdev%s: %s %s\n", atags_en ? "(atags)" : "",
-	       env_get("devtype"), env_get("devnum"));
-}
+	/*
+	 * We don't clear boot mode reg when its value stands for the reboot
+	 * reason or others(in the future), the kernel will need and clear it.
+	 */
+	if (clear_boot_reg)
+		writel(BOOT_NORMAL, (void *)CONFIG_ROCKCHIP_BOOT_MODE_REG);
 
-void rockchip_dnl_mode_check(void)
-{
-	/* recovery key or "ctrl+d" */
-	if (rockchip_dnl_key_pressed() ||
-	    is_hotkey(HK_ROCKUSB_DNL)) {
-		printf("download key pressed... ");
-		if (rockchip_u2phy_vbus_detect() > 0) {
-			printf("entering download mode...\n");
-			/* If failed, we fall back to bootrom download mode */
-			run_command_list("rockusb 0 ${devtype} ${devnum}", -1, 0);
-			set_back_to_bootrom_dnl_flag();
-			do_reset(NULL, 0, 0, NULL);
-		} else {
-			printf("entering recovery mode!\n");
-			env_set("reboot_mode", "recovery-key");
-		}
-	} else if (is_hotkey(HK_FASTBOOT)) {
-		env_set("reboot_mode", "fastboot");
-	}
+	return boot_mode;
 }
 
 int setup_boot_mode(void)
 {
-	int boot_mode = BOOT_MODE_NORMAL;
 	char env_preboot[256] = {0};
 
-	boot_devtype_init();
-	rockchip_dnl_mode_check();
-#ifdef CONFIG_RKIMG_BOOTLOADER
-	boot_mode = rockchip_get_boot_mode();
-#endif
-	switch (boot_mode) {
+	switch (rockchip_get_boot_mode()) {
 	case BOOT_MODE_BOOTLOADER:
 		printf("enter fastboot!\n");
 #if defined(CONFIG_FASTBOOT_FLASH_MMC_DEV)
@@ -203,5 +192,3 @@ int setup_boot_mode(void)
 
 	return 0;
 }
-
-#endif
diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 4bce6cdbf8..ff421db823 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -5,32 +5,81 @@
  */
 
 #include <common.h>
+#include <adc.h>
 #include <bidram.h>
 #include <bootm.h>
 #include <boot_rkimg.h>
-#include <console.h>
-#ifdef CONFIG_ANDROID_BOOT_IMAGE
+#include <cli.h>
+#include <dm.h>
 #include <image.h>
-#endif
-#include <malloc.h>
+#include <key.h>
 #include <mmc.h>
-#include <part.h>
+#include <malloc.h>
+#include <stdlib.h>
 #include <sysmem.h>
 #include <asm/io.h>
-#include <linux/libfdt.h>
+#include <asm/arch/boot_mode.h>
 #include <asm/arch/hotkey.h>
+#include <asm/arch/param.h>
 #include <asm/arch/resource_img.h>
-#include <asm/arch/rockchip_crc.h>
-#include <asm/arch/boot_mode.h>
-
-#define DTB_FILE				"rk-kernel.dtb"
-#define BOOTLOADER_MESSAGE_OFFSET_IN_MISC	(16 * 1024)
-#define BOOTLOADER_MESSAGE_BLK_OFFSET		(BOOTLOADER_MESSAGE_OFFSET_IN_MISC >> 9)
+#include <linux/usb/phy-rockchip-inno-usb2.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
-/* Gets the storage type of the current device */
-int get_bootdev_type(void)
+static void boot_devtype_init(void)
+{
+	const char *devtype_num_set = "run rkimg_bootdev";
+	char *devtype = NULL, *devnum = NULL;
+	static int done;	/* static */
+	int atags_en = 0;
+	int ret;
+
+	if (done)
+		return;
+
+	ret = param_parse_bootdev(&devtype, &devnum);
+	if (!ret) {
+		atags_en = 1;
+		env_set("devtype", devtype);
+		env_set("devnum", devnum);
+
+#ifdef CONFIG_DM_MMC
+		if (!strcmp("mmc", devtype))
+			mmc_initialize(gd->bd);
+#endif
+		/*
+		 * For example, the pre-loader do not have mtd device,
+		 * and pass devtype is nand. Then U-Boot can not get
+		 * dev_desc when use mtd driver to read firmware. So
+		 * test the block dev is exist or not here.
+		 *
+		 * And the devtype & devnum maybe wrong sometimes, it
+		 * is better to test first.
+		 */
+		if (blk_get_devnum_by_typename(devtype, atoi(devnum)))
+			goto finish;
+	}
+
+	/* If not find valid bootdev by atags, scan all possible */
+#ifdef CONFIG_DM_MMC
+	mmc_initialize(gd->bd);
+#endif
+	ret = run_command_list(devtype_num_set, -1, 0);
+	if (ret) {
+		/* Set default dev type/num if command not valid */
+		devtype = "mmc";
+		devnum = "0";
+		env_set("devtype", devtype);
+		env_set("devnum", devnum);
+	}
+
+finish:
+	done = 1;
+	printf("Bootdev%s: %s %s\n", atags_en ? "(atags)" : "",
+	       env_get("devtype"), env_get("devnum"));
+}
+
+static int get_bootdev_type(void)
 {
 	char *boot_media = NULL, *devtype = NULL;
 	char boot_options[128] = {0};
@@ -131,11 +180,6 @@ int get_bootdev_type(void)
 
 static struct blk_desc *dev_desc;
 
-void rockchip_set_bootdev(struct blk_desc *desc)
-{
-	dev_desc = desc;
-}
-
 struct blk_desc *rockchip_get_bootdev(void)
 {
 	int dev_type;
@@ -173,42 +217,67 @@ struct blk_desc *rockchip_get_bootdev(void)
 	return dev_desc;
 }
 
-static int boot_mode = -1;
-
-static void rkloader_set_bootloader_msg(struct bootloader_message *bmsg)
+void rockchip_set_bootdev(struct blk_desc *desc)
 {
-	struct blk_desc *dev_desc;
-	disk_partition_t part_info;
-	int ret, cnt;
-#ifdef CONFIG_ANDROID_BOOT_IMAGE
-	u32 bcb_offset = android_bcb_msg_sector_offset();
-#else
-	u32 bcb_offset = BOOTLOADER_MESSAGE_BLK_OFFSET;
-#endif
+	dev_desc = desc;
+}
 
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: dev_desc is NULL!\n", __func__);
-		return;
+/*
+ * detect download key status by adc, most rockchip
+ * based boards use adc sample the download key status,
+ * but there are also some use gpio. So it's better to
+ * make this a weak function that can be override by
+ * some special boards.
+ */
+#define KEY_DOWN_MIN_VAL	0
+#define KEY_DOWN_MAX_VAL	30
+
+__weak int rockchip_dnl_key_pressed(void)
+{
+#if defined(CONFIG_DM_KEY)
+	return key_is_pressed(key_read(KEY_VOLUMEUP));
+
+#elif defined(CONFIG_ADC)
+	const void *blob = gd->fdt_blob;
+	int node, ret, channel = 1;
+	u32 val, chns[2];
+
+	node = fdt_node_offset_by_compatible(blob, 0, "adc-keys");
+	if (node >= 0) {
+		if (!fdtdec_get_int_array(blob, node, "io-channels", chns, 2))
+			channel = chns[1];
 	}
 
-	ret = part_get_info_by_name(dev_desc, PART_MISC, &part_info);
-	if (ret < 0) {
-		printf("%s: Could not found misc partition\n", __func__);
-		return;
+	ret = adc_channel_single_shot("saradc", channel, &val);
+	if (ret) {
+		printf("%s: Failed to read saradc, ret=%d\n", __func__, ret);
+		return 0;
 	}
 
-	cnt = DIV_ROUND_UP(sizeof(struct bootloader_message), dev_desc->blksz);
-	ret = blk_dwrite(dev_desc,
-			 part_info.start + bcb_offset,
-			 cnt, bmsg);
-	if (ret != cnt)
-		printf("%s: Wipe data failed\n", __func__);
+	return ((val >= KEY_DOWN_MIN_VAL) && (val <= KEY_DOWN_MAX_VAL));
+#endif
+
+	return 0;
 }
 
-void board_run_recovery(void)
+void setup_download_mode(void)
 {
-	run_command("bootrkp boot-recovery", 0);
+	boot_devtype_init();
+
+	/* recovery key or "ctrl+d" */
+	if (rockchip_dnl_key_pressed() || is_hotkey(HK_ROCKUSB_DNL)) {
+		printf("download key pressed... ");
+		if (rockchip_u2phy_vbus_detect() > 0) {
+			printf("entering download mode...\n");
+			/* try rockusb download and brom download */
+			run_command("download", 0);
+		} else {
+			printf("entering recovery mode!\n");
+			env_set("reboot_mode", "recovery-key");
+		}
+	} else if (is_hotkey(HK_FASTBOOT)) {
+		env_set("reboot_mode", "fastboot");
+	}
 }
 
 void board_run_recovery_wipe_data(void)
@@ -216,7 +285,12 @@ void board_run_recovery_wipe_data(void)
 	struct bootloader_message bmsg;
 	struct blk_desc *dev_desc;
 	disk_partition_t part_info;
-	int ret;
+#ifdef CONFIG_ANDROID_BOOT_IMAGE
+	u32 bcb_offset = android_bcb_msg_sector_offset();
+#else
+	u32 bcb_offset = BCB_MESSAGE_BLK_OFFSET;
+#endif
+	int cnt, ret;
 
 	printf("Rebooting into recovery to do wipe_data\n");
 	dev_desc = rockchip_get_bootdev();
@@ -229,159 +303,19 @@ void board_run_recovery_wipe_data(void)
 	if (ret < 0) {
 		printf("%s: Could not found misc partition, just run recovery\n",
 		       __func__);
-		board_run_recovery();
+		goto out;
 	}
 
 	memset((char *)&bmsg, 0, sizeof(struct bootloader_message));
 	strcpy(bmsg.command, "boot-recovery");
 	strcpy(bmsg.recovery, "recovery\n--wipe_data");
 	bmsg.status[0] = 0;
-
-	rkloader_set_bootloader_msg(&bmsg);
-
-	/* now reboot to recovery */
-	board_run_recovery();
-}
-
-/*
- * Generally, we have 3 ways to get reboot mode:
- *
- * 1. from bootloader_message which is defined in MISC partition;
- * 2. from CONFIG_ROCKCHIP_BOOT_MODE_REG which supports "reboot xxx" commands;
- * 3. from env "reboot_mode" which is added by U-Boot code(currently only when
- *    recovery key pressed);
- *
- * 1st and 2nd cases are static determined at system start and we check it once,
- * while 3th case is dynamically added by U-Boot code, so we have to check it
- * everytime.
- *
- * Recovery mode from:
- *	- MISC partition;
- *	- "reboot recovery" command;
- *	- recovery key pressed without usb attach;
- */
-int rockchip_get_boot_mode(void)
-{
-	struct bootloader_message *bmsg = NULL;
-	struct blk_desc *dev_desc;
-	disk_partition_t part_info;
-	uint32_t reg_boot_mode;
-	char *env_reboot_mode;
-	int clear_boot_reg = 0;
-	int ret, cnt;
-#ifdef CONFIG_ANDROID_BOOT_IMAGE
-	u32 bcb_offset = android_bcb_msg_sector_offset();
-#else
-	u32 bcb_offset = BOOTLOADER_MESSAGE_BLK_OFFSET;
-#endif
-
-	/*
-	 * Here, we mainly check for:
-	 * In rockchip_dnl_mode_check(), that recovery key is pressed without
-	 * USB attach will do env_set("reboot_mode", "recovery");
-	 */
-	env_reboot_mode = env_get("reboot_mode");
-	if (env_reboot_mode) {
-		if (!strcmp(env_reboot_mode, "recovery-key")) {
-			boot_mode = BOOT_MODE_RECOVERY;
-			printf("boot mode: recovery (key)\n");
-		} else if (!strcmp(env_reboot_mode, "recovery-usb")) {
-			boot_mode = BOOT_MODE_RECOVERY;
-			printf("boot mode: recovery (usb)\n");
-		} else if (!strcmp(env_reboot_mode, "fastboot")) {
-			boot_mode = BOOT_MODE_BOOTLOADER;
-			printf("boot mode: fastboot\n");
-		}
-	}
-
-	if (boot_mode != -1)
-		return boot_mode;
-
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: dev_desc is NULL!\n", __func__);
-		return -ENODEV;
-	}
-
-	ret = part_get_info_by_name(dev_desc, PART_MISC, &part_info);
-	if (ret < 0) {
-		printf("%s: Could not found misc partition\n", __func__);
-		goto fallback;
-	}
-
 	cnt = DIV_ROUND_UP(sizeof(struct bootloader_message), dev_desc->blksz);
-	bmsg = memalign(ARCH_DMA_MINALIGN, cnt * dev_desc->blksz);
-	ret = blk_dread(dev_desc,
-			part_info.start + bcb_offset,
-			cnt, bmsg);
-	if (ret != cnt) {
-		free(bmsg);
-		return -EIO;
-	}
-
-fallback:
-	/*
-	 * Boot mode priority
-	 *
-	 * Anyway, we should set download boot mode as the highest priority, so:
-	 *
-	 * reboot loader/bootloader/fastboot > misc partition "recovery" > reboot xxx.
-	 */
-	reg_boot_mode = readl((void *)CONFIG_ROCKCHIP_BOOT_MODE_REG);
-	if (reg_boot_mode == BOOT_LOADER) {
-		printf("boot mode: loader\n");
-		boot_mode = BOOT_MODE_LOADER;
-		clear_boot_reg = 1;
-	} else if (reg_boot_mode == BOOT_FASTBOOT) {
-		printf("boot mode: bootloader\n");
-		boot_mode = BOOT_MODE_BOOTLOADER;
-		clear_boot_reg = 1;
-	} else if (bmsg && !strcmp(bmsg->command, "boot-recovery")) {
-		printf("boot mode: recovery (misc)\n");
-		boot_mode = BOOT_MODE_RECOVERY;
-		clear_boot_reg = 1;
-	} else {
-		switch (reg_boot_mode) {
-		case BOOT_NORMAL:
-			printf("boot mode: normal\n");
-			boot_mode = BOOT_MODE_NORMAL;
-			clear_boot_reg = 1;
-			break;
-		case BOOT_RECOVERY:
-			printf("boot mode: recovery (cmd)\n");
-			boot_mode = BOOT_MODE_RECOVERY;
-			clear_boot_reg = 1;
-			break;
-		case BOOT_UMS:
-			printf("boot mode: ums\n");
-			boot_mode = BOOT_MODE_UMS;
-			clear_boot_reg = 1;
-			break;
-		case BOOT_CHARGING:
-			printf("boot mode: charging\n");
-			boot_mode = BOOT_MODE_CHARGING;
-			clear_boot_reg = 1;
-			break;
-		case BOOT_PANIC:
-			printf("boot mode: panic\n");
-			boot_mode = BOOT_MODE_PANIC;
-			break;
-		case BOOT_WATCHDOG:
-			printf("boot mode: watchdog\n");
-			boot_mode = BOOT_MODE_WATCHDOG;
-			break;
-		default:
-			printf("boot mode: None\n");
-			boot_mode = BOOT_MODE_UNDEFINE;
-		}
-	}
-
-	/*
-	 * We don't clear boot mode reg when its value stands for the reboot
-	 * reason or others(in the future), the kernel will need and clear it.
-	 */
-	if (clear_boot_reg)
-		writel(BOOT_NORMAL, (void *)CONFIG_ROCKCHIP_BOOT_MODE_REG);
-
-	return boot_mode;
+	ret = blk_dwrite(dev_desc, part_info.start + bcb_offset, cnt, &bmsg);
+	if (ret != cnt)
+		printf("Wipe data failed, ret=%d\n", ret);
+out:
+	/* now reboot to recovery */
+	env_set("reboot_mode", "recovery");
+	run_command("run bootcmd", 0);
 }
diff --git a/include/boot_rkimg.h b/include/boot_rkimg.h
index ced5e4afaf..bf6db230c7 100644
--- a/include/boot_rkimg.h
+++ b/include/boot_rkimg.h
@@ -55,19 +55,10 @@ struct rockchip_image {
 #define PART_DTBO			"dtbo"
 #define PART_LOGO			"logo"
 
-int rockchip_get_boot_mode(void);
-
 struct blk_desc *rockchip_get_bootdev(void);
 void rockchip_set_bootdev(struct blk_desc *desc);
-
-/*
- * reboot into recovery and wipe data
- */
 void board_run_recovery_wipe_data(void);
-
-/*
- * reboot into recovery
- */
-void board_run_recovery(void);
+void setup_download_mode(void);
+int rockchip_get_boot_mode(void);
 
 #endif

commit e72b912575f8808965903814ed22e640c4faef4e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jan 6 19:53:38 2020 +0800

    common: rkimg: move rkimg boot code into bootrkp.c
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I362e5ab0e1aee8b9126d51358ea1300d60d0a706

diff --git a/cmd/bootrkp.c b/cmd/bootrkp.c
index 0dc6a817b9..b76d5e58ad 100644
--- a/cmd/bootrkp.c
+++ b/cmd/bootrkp.c
@@ -5,34 +5,363 @@
  */
 
 #include <common.h>
+#include <attestation_key.h>
+#include <bootm.h>
 #include <boot_rkimg.h>
 #include <keymaster.h>
+#include <console.h>
+#include <image.h>
 #include <malloc.h>
-#include <android_bootloader.h>
-#include <attestation_key.h>
+#include <sysmem.h>
+#include <linux/libfdt.h>
+#include <asm/arch/hotkey.h>
+#include <asm/arch/resource_img.h>
+#include <asm/arch/boot_mode.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_ROCKCHIP_CRC
+#define tole(x) cpu_to_le32(x)
+
+/* Table of CRC-32's of all single-byte values (made by make_crc_table) */
+static const uint32_t crc_table[256] = {
+	tole(0x00000000L), tole(0x04c10db7L), tole(0x09821b6eL), tole(0x0d4316d9L),
+	tole(0x130436dcL), tole(0x17c53b6bL), tole(0x1a862db2L), tole(0x1e472005L),
+	tole(0x26086db8L), tole(0x22c9600fL), tole(0x2f8a76d6L), tole(0x2b4b7b61L),
+	tole(0x350c5b64L), tole(0x31cd56d3L), tole(0x3c8e400aL), tole(0x384f4dbdL),
+	tole(0x4c10db70L), tole(0x48d1d6c7L), tole(0x4592c01eL), tole(0x4153cda9L),
+	tole(0x5f14edacL), tole(0x5bd5e01bL), tole(0x5696f6c2L), tole(0x5257fb75L),
+	tole(0x6a18b6c8L), tole(0x6ed9bb7fL), tole(0x639aada6L), tole(0x675ba011L),
+	tole(0x791c8014L), tole(0x7ddd8da3L), tole(0x709e9b7aL), tole(0x745f96cdL),
+	tole(0x9821b6e0L), tole(0x9ce0bb57L), tole(0x91a3ad8eL), tole(0x9562a039L),
+	tole(0x8b25803cL), tole(0x8fe48d8bL), tole(0x82a79b52L), tole(0x866696e5L),
+	tole(0xbe29db58L), tole(0xbae8d6efL), tole(0xb7abc036L), tole(0xb36acd81L),
+	tole(0xad2ded84L), tole(0xa9ece033L), tole(0xa4aff6eaL), tole(0xa06efb5dL),
+	tole(0xd4316d90L), tole(0xd0f06027L), tole(0xddb376feL), tole(0xd9727b49L),
+	tole(0xc7355b4cL), tole(0xc3f456fbL), tole(0xceb74022L), tole(0xca764d95L),
+	tole(0xf2390028L), tole(0xf6f80d9fL), tole(0xfbbb1b46L), tole(0xff7a16f1L),
+	tole(0xe13d36f4L), tole(0xe5fc3b43L), tole(0xe8bf2d9aL), tole(0xec7e202dL),
+	tole(0x34826077L), tole(0x30436dc0L), tole(0x3d007b19L), tole(0x39c176aeL),
+	tole(0x278656abL), tole(0x23475b1cL), tole(0x2e044dc5L), tole(0x2ac54072L),
+	tole(0x128a0dcfL), tole(0x164b0078L), tole(0x1b0816a1L), tole(0x1fc91b16L),
+	tole(0x018e3b13L), tole(0x054f36a4L), tole(0x080c207dL), tole(0x0ccd2dcaL),
+	tole(0x7892bb07L), tole(0x7c53b6b0L), tole(0x7110a069L), tole(0x75d1addeL),
+	tole(0x6b968ddbL), tole(0x6f57806cL), tole(0x621496b5L), tole(0x66d59b02L),
+	tole(0x5e9ad6bfL), tole(0x5a5bdb08L), tole(0x5718cdd1L), tole(0x53d9c066L),
+	tole(0x4d9ee063L), tole(0x495fedd4L), tole(0x441cfb0dL), tole(0x40ddf6baL),
+	tole(0xaca3d697L), tole(0xa862db20L), tole(0xa521cdf9L), tole(0xa1e0c04eL),
+	tole(0xbfa7e04bL), tole(0xbb66edfcL), tole(0xb625fb25L), tole(0xb2e4f692L),
+	tole(0x8aabbb2fL), tole(0x8e6ab698L), tole(0x8329a041L), tole(0x87e8adf6L),
+	tole(0x99af8df3L), tole(0x9d6e8044L), tole(0x902d969dL), tole(0x94ec9b2aL),
+	tole(0xe0b30de7L), tole(0xe4720050L), tole(0xe9311689L), tole(0xedf01b3eL),
+	tole(0xf3b73b3bL), tole(0xf776368cL), tole(0xfa352055L), tole(0xfef42de2L),
+	tole(0xc6bb605fL), tole(0xc27a6de8L), tole(0xcf397b31L), tole(0xcbf87686L),
+	tole(0xd5bf5683L), tole(0xd17e5b34L), tole(0xdc3d4dedL), tole(0xd8fc405aL),
+	tole(0x6904c0eeL), tole(0x6dc5cd59L), tole(0x6086db80L), tole(0x6447d637L),
+	tole(0x7a00f632L), tole(0x7ec1fb85L), tole(0x7382ed5cL), tole(0x7743e0ebL),
+	tole(0x4f0cad56L), tole(0x4bcda0e1L), tole(0x468eb638L), tole(0x424fbb8fL),
+	tole(0x5c089b8aL), tole(0x58c9963dL), tole(0x558a80e4L), tole(0x514b8d53L),
+	tole(0x25141b9eL), tole(0x21d51629L), tole(0x2c9600f0L), tole(0x28570d47L),
+	tole(0x36102d42L), tole(0x32d120f5L), tole(0x3f92362cL), tole(0x3b533b9bL),
+	tole(0x031c7626L), tole(0x07dd7b91L), tole(0x0a9e6d48L), tole(0x0e5f60ffL),
+	tole(0x101840faL), tole(0x14d94d4dL), tole(0x199a5b94L), tole(0x1d5b5623L),
+	tole(0xf125760eL), tole(0xf5e47bb9L), tole(0xf8a76d60L), tole(0xfc6660d7L),
+	tole(0xe22140d2L), tole(0xe6e04d65L), tole(0xeba35bbcL), tole(0xef62560bL),
+	tole(0xd72d1bb6L), tole(0xd3ec1601L), tole(0xdeaf00d8L), tole(0xda6e0d6fL),
+	tole(0xc4292d6aL), tole(0xc0e820ddL), tole(0xcdab3604L), tole(0xc96a3bb3L),
+	tole(0xbd35ad7eL), tole(0xb9f4a0c9L), tole(0xb4b7b610L), tole(0xb076bba7L),
+	tole(0xae319ba2L), tole(0xaaf09615L), tole(0xa7b380ccL), tole(0xa3728d7bL),
+	tole(0x9b3dc0c6L), tole(0x9ffccd71L), tole(0x92bfdba8L), tole(0x967ed61fL),
+	tole(0x8839f61aL), tole(0x8cf8fbadL), tole(0x81bbed74L), tole(0x857ae0c3L),
+	tole(0x5d86a099L), tole(0x5947ad2eL), tole(0x5404bbf7L), tole(0x50c5b640L),
+	tole(0x4e829645L), tole(0x4a439bf2L), tole(0x47008d2bL), tole(0x43c1809cL),
+	tole(0x7b8ecd21L), tole(0x7f4fc096L), tole(0x720cd64fL), tole(0x76cddbf8L),
+	tole(0x688afbfdL), tole(0x6c4bf64aL), tole(0x6108e093L), tole(0x65c9ed24L),
+	tole(0x11967be9L), tole(0x1557765eL), tole(0x18146087L), tole(0x1cd56d30L),
+	tole(0x02924d35L), tole(0x06534082L), tole(0x0b10565bL), tole(0x0fd15becL),
+	tole(0x379e1651L), tole(0x335f1be6L), tole(0x3e1c0d3fL), tole(0x3add0088L),
+	tole(0x249a208dL), tole(0x205b2d3aL), tole(0x2d183be3L), tole(0x29d93654L),
+	tole(0xc5a71679L), tole(0xc1661bceL), tole(0xcc250d17L), tole(0xc8e400a0L),
+	tole(0xd6a320a5L), tole(0xd2622d12L), tole(0xdf213bcbL), tole(0xdbe0367cL),
+	tole(0xe3af7bc1L), tole(0xe76e7676L), tole(0xea2d60afL), tole(0xeeec6d18L),
+	tole(0xf0ab4d1dL), tole(0xf46a40aaL), tole(0xf9295673L), tole(0xfde85bc4L),
+	tole(0x89b7cd09L), tole(0x8d76c0beL), tole(0x8035d667L), tole(0x84f4dbd0L),
+	tole(0x9ab3fbd5L), tole(0x9e72f662L), tole(0x9331e0bbL), tole(0x97f0ed0cL),
+	tole(0xafbfa0b1L), tole(0xab7ead06L), tole(0xa63dbbdfL), tole(0xa2fcb668L),
+	tole(0xbcbb966dL), tole(0xb87a9bdaL), tole(0xb5398d03L), tole(0xb1f880b4L)
+};
+
+#define DO_CRC(x) crc = tab[((crc >> 24) ^ (x)) & 255] ^ (crc << 8)
+
+static uint32_t crc32_rk(uint32_t crc, const unsigned char *s, uint32_t len)
+{
+	const uint32_t *tab;
+
+	tab = crc_table;
+	crc = cpu_to_le32(crc);
+
+	do {
+		DO_CRC(*s++);
+	} while (--len);
+
+	return le32_to_cpu(crc);
+}
+
+#undef DO_CRC
+
+static u32 crc32_verify(unsigned char *data, u32 size)
+{
+	u32 crc_check = 0, crc_calc = 0;
+	int i = 0;
+
+	if (size <= 4)
+		return 0;
+
+	size -= 4;
+	for (i = 3; i >= 0; i--)
+		crc_check = (crc_check << 8) + (*(data + size + i));
+
+	crc_calc = crc32_rk(0, data, size);
+
+	return (crc_calc == crc_check) ? crc_check : 0;
+}
+#endif
+
+#if !defined(CONFIG_ARM64)
+#ifdef CONFIG_LMB
+static void boot_start_lmb(bootm_headers_t *images)
+{
+	lmb_init(&images->lmb);
+#ifdef CONFIG_NR_DRAM_BANKS
+	int i;
+
+	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+		lmb_add(&images->lmb, gd->bd->bi_dram[i].start,
+			gd->bd->bi_dram[i].size);
+	}
+#else
+	ulong		mem_start;
+	phys_size_t	mem_size;
+
+	mem_start = env_get_bootm_low();
+	mem_size = env_get_bootm_size();
+	lmb_add(&images->lmb, (phys_addr_t)mem_start, mem_size);
+#endif
+	arch_lmb_reserve(&images->lmb);
+	board_lmb_reserve(&images->lmb);
+}
+#else
+static inline void boot_start_lmb(bootm_headers_t *images) { }
+#endif
+
+static void boot_lmb_init(bootm_headers_t *images)
+{
+	boot_start_lmb(images);
+	images->state = BOOTM_STATE_OS_GO;
+}
+#endif
+
+static void fdt_ramdisk_skip_relocation(void)
+{
+	char *ramdisk_high = env_get("initrd_high");
+	char *fdt_high = env_get("fdt_high");
+
+	if (!fdt_high) {
+		env_set_hex("fdt_high", -1UL);
+		printf("Fdt ");
+	}
+
+	if (!ramdisk_high) {
+		env_set_hex("initrd_high", -1UL);
+		printf("Ramdisk ");
+	}
+
+	if (!fdt_high || !ramdisk_high)
+		printf("skip relocation\n");
+}
+
+/*
+ * non-OTA packaged kernel.img & boot.img return the image size on success,
+ * and a negative value on error.
+ */
+static int read_rockchip_image(struct blk_desc *dev_desc,
+			       disk_partition_t *part, void *dst)
+{
+	struct rockchip_image *img;
+	int header_len = 8;
+	int cnt, ret;
+#ifdef CONFIG_ROCKCHIP_CRC
+	u32 crc32;
+#endif
 
-static int do_boot_rockchip(cmd_tbl_t *cmdtp, int flag, int argc,
-			    char *const argv[])
+	img = memalign(ARCH_DMA_MINALIGN, RK_BLK_SIZE);
+	if (!img)
+		return -ENOMEM;
+
+	/* read first block with header imformation */
+	ret = blk_dread(dev_desc, part->start, 1, img);
+	if (ret != 1) {
+		ret = -EIO;
+		goto err;
+	}
+
+	if (img->tag != TAG_KERNEL) {
+		printf("Invalid %s image tag(0x%x)\n", part->name, img->tag);
+		ret = -EINVAL;
+		goto err;
+	}
+
+	/*
+	 * read the rest blks
+	 * total size = image size + 8 bytes header + 4 bytes crc32
+	 */
+	cnt = DIV_ROUND_UP(img->size + 8 + 4, RK_BLK_SIZE);
+	if (!sysmem_alloc_base_by_name((const char *)part->name,
+				       (phys_addr_t)dst,
+				       cnt * dev_desc->blksz)) {
+		ret = -ENXIO;
+		goto err;
+	}
+
+	memcpy(dst, img->image, RK_BLK_SIZE - header_len);
+	ret = blk_dread(dev_desc, part->start + 1, cnt - 1,
+			dst + RK_BLK_SIZE - header_len);
+	if (ret != (cnt - 1)) {
+		printf("Failed to read %s part, ret=%d\n", part->name, ret);
+		ret = -EIO;
+	} else {
+		ret = img->size;
+	}
+
+#ifdef CONFIG_ROCKCHIP_CRC
+	printf("%s image rk crc32 verify... ", part->name);
+	crc32 = crc32_verify((uchar *)(ulong)dst, img->size + 4);
+	if (!crc32) {
+		printf("fail!\n");
+		ret = -EINVAL;
+	} else {
+		printf("okay.\n");
+	}
+#endif
+
+err:
+	free(img);
+	return ret;
+}
+
+static int boot_rockchip_image(struct blk_desc *dev_desc,
+			       disk_partition_t *boot_part)
+{
+	disk_partition_t kernel_part;
+	ulong ramdisk_addr_r;
+	ulong kernel_addr_r;
+	ulong fdt_addr_r;
+	int ramdisk_size;
+	int kernel_size;
+	int fdt_size;
+	int ret;
+
+	printf("\n## Booting Rockchip Format Image\n");
+
+	ramdisk_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0);
+	kernel_addr_r = env_get_ulong("kernel_addr_r", 16, 0);
+	fdt_addr_r = env_get_ulong("fdt_addr_r", 16, 0);
+
+	ret = part_get_info_by_name(dev_desc, PART_KERNEL, &kernel_part);
+	if (ret < 0) {
+		printf("Could not find kernel partition, ret=%d\n", ret);
+		return -EINVAL;
+	}
+
+	kernel_size = read_rockchip_image(dev_desc, &kernel_part,
+					  (void *)kernel_addr_r);
+	if (kernel_size < 0) {
+		printf("Failed to read kernel image, ret=%d\n", ret);
+		return -EINVAL;
+	}
+
+	ramdisk_size = read_rockchip_image(dev_desc, boot_part,
+					   (void *)ramdisk_addr_r);
+	if (ramdisk_size < 0)
+		ramdisk_size = 0;
+
+	if (gd->fdt_blob != (void *)fdt_addr_r) {
+		fdt_size = rockchip_read_dtb_file((void *)fdt_addr_r);
+		if (fdt_size < 0) {
+			printf("Failed to read fdt, ret=%d\n", fdt_size);
+			return -EINVAL;
+		}
+	}
+
+	printf("fdt	 @ 0x%08lx (0x%08x)\n", fdt_addr_r, fdt_totalsize(fdt_addr_r));
+	printf("kernel   @ 0x%08lx (0x%08x)\n", kernel_addr_r, kernel_size);
+	printf("ramdisk  @ 0x%08lx (0x%08x)\n", ramdisk_addr_r, ramdisk_size);
+
+	fdt_ramdisk_skip_relocation();
+	hotkey_run(HK_SYSMEM);
+	sysmem_overflow_check();
+
+#if defined(CONFIG_ARM64)
+	char cmdbuf[64];
+
+	snprintf(cmdbuf, 64, "booti 0x%lx 0x%lx:0x%x 0x%lx",
+		 kernel_addr_r, ramdisk_addr_r, ramdisk_size, fdt_addr_r);
+	run_command(cmdbuf, 0);
+#else
+	/* We asume it's always zImage on 32-bit platform */
+	ulong kaddr_c = env_get_ulong("kernel_addr_c", 16, 0);
+	ulong kaddr_r, kaddr, ksize;
+
+	if (kernel_addr_r && !kaddr_c) {
+		kaddr_c = kernel_addr_r;
+		kaddr_r = CONFIG_SYS_SDRAM_BASE;
+	}
+
+	if (!sysmem_free((phys_addr_t)kaddr_c)) {
+		kaddr = kaddr_r;
+		ksize = kernel_size * 100 / 45 ; /* Ratio: 45% */
+		ksize = ALIGN(ksize, dev_desc->blksz);
+		if (!sysmem_alloc_base(MEMBLK_ID_UNCOMP_KERNEL,
+				       (phys_addr_t)kaddr, ksize))
+			return -ENOMEM;
+	}
+
+	hotkey_run(HK_SYSMEM);
+	sysmem_overflow_check();
+
+	boot_lmb_init(&images);
+	images.ep = kernel_addr_r;
+	images.initrd_start = ramdisk_addr_r;
+	images.initrd_end = ramdisk_addr_r + ramdisk_size;
+	images.ft_addr = (void *)fdt_addr_r;
+	images.ft_len = fdt_totalsize(fdt_addr_r);
+	do_bootm_linux(0, 0, NULL, &images);
+#endif
+
+	return 0;
+}
+
+static int do_boot_rockchip(cmd_tbl_t *cmdtp, int flag,
+			    int argc, char *const argv[])
 {
-	char *boot_partname = PART_BOOT;
-	disk_partition_t part_info;
+	char *part_name = PART_BOOT;
 	struct blk_desc *dev_desc;
-	int i, ret;
-	int mode;
+	disk_partition_t part;
+	int ret;
 
 	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {
-		printf("%s: dev_desc is NULL!\n", __func__);
+		printf("dev_desc is NULL!\n");
 		return CMD_RET_FAILURE;
 	}
 
 #ifdef CONFIG_ANDROID_KEYMASTER_CA
 	/* load attestation key from misc partition. */
-	ret = part_get_info_by_name(dev_desc, PART_MISC, &part_info);
+	ret = part_get_info_by_name(dev_desc, PART_MISC, &part);
 	if (ret < 0)
-		printf("%s: Could not find misc partition\n", __func__);
+		printf("Could not find misc partition\n");
 	else
-		load_attestation_key(dev_desc, &part_info);
+		load_attestation_key(dev_desc, &part);
 #endif
 
 #ifdef CONFIG_FASTBOOT_OEM_UNLOCK
@@ -43,37 +372,27 @@ static int do_boot_rockchip(cmd_tbl_t *cmdtp, int flag, int argc,
 
 	result = trusty_read_oem_unlock(&unlock);
 	if (result) {
-		printf("%s: Read oem unlock status failed: %d\n",
-		       __func__, result);
+		printf("Failed to read oem unlock status, ret=%d\n", result);
 	} else {
 		snprintf(oem_unlock, sizeof(oem_unlock),
 			 "androidboot.oem_unlocked=%d", unlock);
 		env_update("bootargs", oem_unlock);
 	}
 #endif
+	if (rockchip_get_boot_mode() == BOOT_MODE_RECOVERY)
+		part_name = PART_RECOVERY;
 
-	mode = rockchip_get_boot_mode();
-	if (mode == BOOT_MODE_RECOVERY)
-		boot_partname = PART_RECOVERY;
-
-	for (i = 0; i < argc; i++) {
-		if (!strcmp(argv[i], "boot-recovery")) {
-			boot_partname = PART_RECOVERY;
-			printf("Boot from Recovery partition\n");
-		}
-	}
-
-	ret = part_get_info_by_name(dev_desc, boot_partname, &part_info);
+	ret = part_get_info_by_name(dev_desc, part_name, &part);
 	if (ret < 0) {
-		printf("%s: Could not find %s part\n", __func__, part_info.name);
+		printf("Could not find %s part\n", part.name);
 		return CMD_RET_FAILURE;
 	}
 
-	return boot_rockchip_image(dev_desc, &part_info) ? CMD_RET_FAILURE : 0;
+	return boot_rockchip_image(dev_desc, &part) ? CMD_RET_FAILURE : 0;
 }
 
 U_BOOT_CMD(
-	bootrkp,  CONFIG_SYS_MAXARGS,     1,      do_boot_rockchip,
+	bootrkp,  1,     1,      do_boot_rockchip,
 	"Boot Linux Image from rockchip image type",
 	"kernel.img: zImage/Image\n"
 	"boot.img: ramdisk\n"
diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 4d5761aed0..4bce6cdbf8 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -23,141 +23,12 @@
 #include <asm/arch/rockchip_crc.h>
 #include <asm/arch/boot_mode.h>
 
-#define TAG_KERNEL				0x4C4E524B
 #define DTB_FILE				"rk-kernel.dtb"
 #define BOOTLOADER_MESSAGE_OFFSET_IN_MISC	(16 * 1024)
 #define BOOTLOADER_MESSAGE_BLK_OFFSET		(BOOTLOADER_MESSAGE_OFFSET_IN_MISC >> 9)
 
 DECLARE_GLOBAL_DATA_PTR;
 
-struct bootloader_message {
-	char command[32];
-	char status[32];
-	char recovery[768];
-
-	/*
-	 * The 'recovery' field used to be 1024 bytes.  It has only ever
-	 * been used to store the recovery command line, so 768 bytes
-	 * should be plenty.  We carve off the last 256 bytes to store the
-	 * stage string (for multistage packages) and possible future
-	 * expansion.
-	 */
-	char stage[32];
-	char slot_suffix[32];
-	char reserved[192];
-};
-
-struct rockchip_image {
-	uint32_t tag;
-	uint32_t size;
-	int8_t image[1];
-	uint32_t crc;
-};
-
-#if !defined(CONFIG_ARM64)
-#ifdef CONFIG_LMB
-static void boot_start_lmb(bootm_headers_t *images)
-{
-	lmb_init(&images->lmb);
-#ifdef CONFIG_NR_DRAM_BANKS
-	int i;
-
-	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
-		lmb_add(&images->lmb, gd->bd->bi_dram[i].start,
-			gd->bd->bi_dram[i].size);
-	}
-#else
-	ulong		mem_start;
-	phys_size_t	mem_size;
-
-	mem_start = env_get_bootm_low();
-	mem_size = env_get_bootm_size();
-	lmb_add(&images->lmb, (phys_addr_t)mem_start, mem_size);
-#endif
-	arch_lmb_reserve(&images->lmb);
-	board_lmb_reserve(&images->lmb);
-}
-#else
-static inline void boot_start_lmb(bootm_headers_t *images) { }
-#endif
-
-static void boot_lmb_init(bootm_headers_t *images)
-{
-	boot_start_lmb(images);
-	images->state = BOOTM_STATE_OS_GO;
-}
-#endif
-
-/*
- * non-OTA packaged kernel.img & boot.img return the image size on success,
- * and a negative value on error.
- */
-int read_rockchip_image(struct blk_desc *dev_desc,
-			disk_partition_t *part_info, void *dst)
-{
-	struct rockchip_image *img;
-	int header_len = 8;
-	int cnt, ret;
-#ifdef CONFIG_ROCKCHIP_CRC
-	u32 crc32;
-#endif
-
-	img = memalign(ARCH_DMA_MINALIGN, RK_BLK_SIZE);
-	if (!img)
-		return -ENOMEM;
-
-	/* read first block with header imformation */
-	ret = blk_dread(dev_desc, part_info->start, 1, img);
-	if (ret != 1) {
-		ret = -EIO;
-		goto err;
-	}
-
-	if (img->tag != TAG_KERNEL) {
-		printf("Invalid %s image tag(0x%x)\n",
-		       part_info->name, img->tag);
-		ret = -EINVAL;
-		goto err;
-	}
-
-	/*
-	 * read the rest blks
-	 * total size = image size + 8 bytes header + 4 bytes crc32
-	 */
-	cnt = DIV_ROUND_UP(img->size + 8 + 4, RK_BLK_SIZE);
-	if (!sysmem_alloc_base_by_name((const char *)part_info->name,
-				       (phys_addr_t)dst,
-				       cnt * dev_desc->blksz)) {
-		ret = -ENXIO;
-		goto err;
-	}
-
-	memcpy(dst, img->image, RK_BLK_SIZE - header_len);
-	ret = blk_dread(dev_desc, part_info->start + 1, cnt - 1,
-			dst + RK_BLK_SIZE - header_len);
-	if (ret != (cnt - 1)) {
-		printf("Read %s part failed, ret=%d\n", part_info->name, ret);
-		ret = -EIO;
-	} else {
-		ret = img->size;
-	}
-
-#ifdef CONFIG_ROCKCHIP_CRC
-	printf("%s image CRC32 verify... ", part_info->name);
-	crc32 = rockchip_crc_verify((uchar *)(unsigned long)dst, img->size + 4);
-	if (!crc32) {
-		printf("fail!\n");
-		ret = -EINVAL;
-	} else {
-		printf("okay.\n");
-	}
-#endif
-
-err:
-	free(img);
-	return ret;
-}
-
 /* Gets the storage type of the current device */
 int get_bootdev_type(void)
 {
@@ -514,126 +385,3 @@ fallback:
 
 	return boot_mode;
 }
-
-static void fdt_ramdisk_skip_relocation(void)
-{
-	char *ramdisk_high = env_get("initrd_high");
-	char *fdt_high = env_get("fdt_high");
-
-	if (!fdt_high) {
-		env_set_hex("fdt_high", -1UL);
-		printf("Fdt ");
-	}
-
-	if (!ramdisk_high) {
-		env_set_hex("initrd_high", -1UL);
-		printf("Ramdisk ");
-	}
-
-	if (!fdt_high || !ramdisk_high)
-		printf("skip relocation\n");
-}
-
-int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
-{
-	ulong ramdisk_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0);
-	ulong kernel_addr_r = env_get_ulong("kernel_addr_r", 16, 0);
-	ulong fdt_addr_r = env_get_ulong("fdt_addr_r", 16, 0);
-	disk_partition_t kernel_part;
-	int ramdisk_size;
-	int kernel_size;
-	int fdt_size;
-	int ret = 0;
-
-	printf("=Booting Rockchip format image=\n");
-	ret = part_get_info_by_name(dev_desc, PART_KERNEL, &kernel_part);
-	if (ret < 0 || !boot_part) {
-		printf("Could not found misc partition\n");
-		ret = -EINVAL;
-		goto out;
-	}
-
-	kernel_size = read_rockchip_image(dev_desc, &kernel_part,
-					  (void *)kernel_addr_r);
-	if (kernel_size < 0) {
-		printf("Read kernel image failed, ret=%d\n", ret);
-		ret = -EINVAL;
-		goto out;
-	}
-
-	ramdisk_size = read_rockchip_image(dev_desc, boot_part,
-					   (void *)ramdisk_addr_r);
-	if (ramdisk_size < 0) {
-		printf("Read ramdisk image failed, ret=%d\n", ret);
-		ramdisk_size = 0;
-	}
-
-	/*
-	 * When it happens ?
-	 *
-	 * 1. CONFIG_USING_KERNEL_DTB is disabled, so we should load kenrel dtb;
-	 *
-	 * 2. Even CONFIG_USING_KERNEL_DTB is enabled, if we load kernel dtb
-	 *    failed due to some reason before here, and then we fix it and run
-	 *    cmd "bootrkp" try to boot system again, we should reload fdt here.
-	 */
-	if (gd->fdt_blob != (void *)fdt_addr_r) {
-		fdt_size = rockchip_read_dtb_file((void *)fdt_addr_r);
-		if (fdt_size < 0) {
-			printf("Read fdt failed, ret=%d\n", fdt_size);
-			ret = -EINVAL;
-			goto out;
-		}
-	}
-
-	printf("fdt	 @ 0x%08lx (0x%08x)\n", fdt_addr_r, fdt_totalsize(fdt_addr_r));
-	printf("kernel   @ 0x%08lx (0x%08x)\n", kernel_addr_r, kernel_size);
-	printf("ramdisk  @ 0x%08lx (0x%08x)\n", ramdisk_addr_r, ramdisk_size);
-
-	fdt_ramdisk_skip_relocation();
-	hotkey_run(HK_SYSMEM);
-
-	/* Check sysmem overflow */
-	sysmem_overflow_check();
-
-#if defined(CONFIG_ARM64)
-	char cmdbuf[64];
-
-	snprintf(cmdbuf, 64, "booti 0x%lx 0x%lx:0x%x 0x%lx",
-		 kernel_addr_r, ramdisk_addr_r, ramdisk_size, fdt_addr_r);
-	run_command(cmdbuf, 0);
-#else
-	/* We asume it's always zImage on 32-bit platform */
-	ulong kaddr_c = env_get_ulong("kaddr_c", 16, 0);
-	ulong kaddr_r, kaddr, ksize;
-
-	if (kernel_addr_r && !kaddr_c) {
-		kaddr_c = kernel_addr_r;
-		kaddr_r = CONFIG_SYS_SDRAM_BASE;
-	}
-
-	if (!sysmem_free((phys_addr_t)kaddr_c)) {
-		kaddr = kaddr_r;
-		ksize = kernel_size * 100 / 45 ; /* Ratio: 45% */
-		ksize = ALIGN(ksize, dev_desc->blksz);
-		if (!sysmem_alloc_base(MEMBLK_ID_UNCOMP_KERNEL,
-				       (phys_addr_t)kaddr, ksize))
-			return -ENOMEM;
-	}
-
-	hotkey_run(HK_SYSMEM);
-
-	/* Check sysmem overflow */
-	sysmem_overflow_check();
-
-	boot_lmb_init(&images);
-	images.ep = kernel_addr_r;
-	images.initrd_start = ramdisk_addr_r;
-	images.initrd_end = ramdisk_addr_r + ramdisk_size;
-	images.ft_addr = (void *)fdt_addr_r;
-	images.ft_len = fdt_totalsize(fdt_addr_r);
-	do_bootm_linux(0, 0, NULL, &images);
-#endif
-out:
-	return ret;
-}
diff --git a/include/boot_rkimg.h b/include/boot_rkimg.h
index 3a14ab2ab4..ced5e4afaf 100644
--- a/include/boot_rkimg.h
+++ b/include/boot_rkimg.h
@@ -21,6 +21,33 @@ enum _boot_mode {
 	BOOT_MODE_UNDEFINE,
 };
 
+struct bootloader_message {
+	char command[32];
+	char status[32];
+	char recovery[768];
+	/*
+	 * The 'recovery' field used to be 1024 bytes.  It has only ever
+	 * been used to store the recovery command line, so 768 bytes
+	 * should be plenty.  We carve off the last 256 bytes to store the
+	 * stage string (for multistage packages) and possible future
+	 * expansion.
+	 */
+	char stage[32];
+	char slot_suffix[32];
+	char reserved[192];
+};
+
+struct rockchip_image {
+	uint32_t tag;
+	uint32_t size;
+	int8_t image[1];
+	uint32_t crc;
+};
+
+#define RK_BLK_SIZE			512
+#define TAG_KERNEL			0x4C4E524B
+#define BCB_MESSAGE_BLK_OFFSET		(16 * 1024 >> 9)
+
 #define PART_MISC			"misc"
 #define PART_KERNEL			"kernel"
 #define PART_BOOT			"boot"
@@ -28,12 +55,7 @@ enum _boot_mode {
 #define PART_DTBO			"dtbo"
 #define PART_LOGO			"logo"
 
-#define RK_BLK_SIZE 512
-
 int rockchip_get_boot_mode(void);
-int boot_rockchip_image(struct blk_desc *dev, disk_partition_t *boot_part);
-int read_rockchip_image(struct blk_desc *dev_desc,
-			disk_partition_t *part_info, void *dst);
 
 struct blk_desc *rockchip_get_bootdev(void);
 void rockchip_set_bootdev(struct blk_desc *desc);

commit 73ec4e0398125f41aa20c70f6316416e96a4e8d2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jan 6 19:28:36 2020 +0800

    cmd: move "rkimgtest" to individual file
    
    The command is used for all image type, it should not depend on bootrkp.c
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I8d27318485c7e7ffb8c4e06112396fa18e8b2dc0

diff --git a/cmd/Makefile b/cmd/Makefile
index b35c28c638..26b9aeddfc 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -168,6 +168,8 @@ obj-$(CONFIG_CMD_REGULATOR) += regulator.o
 obj-$(CONFIG_CMD_DVFS) += dvfs.o
 
 obj-$(CONFIG_CMD_BLOB) += blob.o
+
+obj-$(CONFIG_ARCH_ROCKCHIP) += rkimgtest.o
 endif # !CONFIG_SPL_BUILD
 
 # core command
diff --git a/cmd/bootrkp.c b/cmd/bootrkp.c
old mode 100755
new mode 100644
index 121bb80579..0dc6a817b9
--- a/cmd/bootrkp.c
+++ b/cmd/bootrkp.c
@@ -79,55 +79,3 @@ U_BOOT_CMD(
 	"boot.img: ramdisk\n"
 	"resource.img: dtb, u-boot logo, kernel logo"
 );
-
-static int do_rkimg_test(cmd_tbl_t *cmdtp, int flag, int argc,
-			 char *const argv[])
-{
-	struct blk_desc *dev_desc;
-	u32 *buffer;
-	int ret;
-
-	dev_desc = blk_get_dev(argv[1], simple_strtoul(argv[2], NULL, 16));
-	if (!dev_desc) {
-		printf("%s: dev_desc is NULL!\n", __func__);
-		return CMD_RET_FAILURE;
-	}
-
-	/* Read one block from beginning of IDB data */
-	buffer = memalign(ARCH_DMA_MINALIGN, 1024);
-	ret = blk_dread(dev_desc, 64, 2, buffer);
-	if (ret != 2) {
-		printf("%s: Fail to read data from IDB\n", __func__);
-		free(buffer);
-		return CMD_RET_FAILURE;
-	}
-
-	if (buffer[0] == 0xFCDC8C3B) {
-		ret = CMD_RET_SUCCESS;
-
-		if (!strcmp("mmc", argv[1]))
-			printf("Found IDB in SDcard\n");
-		else
-			printf("Found IDB in U-disk\n");
-
-		/* TAG in IDB */
-		if (0 == buffer[128 + 104 / 4]) {
-			if (!strcmp("mmc", argv[1]))
-				env_update("bootargs", "sdfwupdate");
-			else
-				env_update("bootargs", "usbfwupdate");
-		}
-	} else {
-		ret = CMD_RET_FAILURE;
-	}
-
-	free(buffer);
-
-	return ret;
-}
-
-U_BOOT_CMD(
-	rkimgtest, 3, 0,    do_rkimg_test,
-	"Test if storage media have rockchip image",
-	""
-);
diff --git a/cmd/rkimgtest.c b/cmd/rkimgtest.c
new file mode 100644
index 0000000000..0e6fe3d171
--- /dev/null
+++ b/cmd/rkimgtest.c
@@ -0,0 +1,63 @@
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <malloc.h>
+
+static int do_rkimg_test(cmd_tbl_t *cmdtp, int flag,
+			 int argc, char *const argv[])
+{
+	struct blk_desc *dev_desc;
+	u32 *buffer;
+	int ret;
+
+	if (argc != 3)
+		return CMD_RET_USAGE;
+
+	dev_desc = blk_get_dev(argv[1], simple_strtoul(argv[2], NULL, 16));
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return CMD_RET_FAILURE;
+	}
+
+	/* read one block from beginning of IDB data */
+	buffer = memalign(ARCH_DMA_MINALIGN, 1024);
+	ret = blk_dread(dev_desc, 64, 2, buffer);
+	if (ret != 2) {
+		printf("%s: Failed to read data from IDB\n", __func__);
+		free(buffer);
+		return CMD_RET_FAILURE;
+	}
+
+	if (buffer[0] == 0xFCDC8C3B) {
+		ret = CMD_RET_SUCCESS;
+
+		if (!strcmp("mmc", argv[1]))
+			printf("Found IDB in SDcard\n");
+		else
+			printf("Found IDB in U-disk\n");
+
+		/* TAG in IDB */
+		if (0 == buffer[128 + 104 / 4]) {
+			if (!strcmp("mmc", argv[1]))
+				env_update("bootargs", "sdfwupdate");
+			else
+				env_update("bootargs", "usbfwupdate");
+		}
+	} else {
+		ret = CMD_RET_FAILURE;
+	}
+
+	free(buffer);
+
+	return ret;
+}
+
+U_BOOT_CMD(
+	rkimgtest, 3, 0,    do_rkimg_test,
+	"Test if storage media have rockchip image",
+	"<devtype> <devnum>"
+);

commit 6f3562b04c90e304118ecc9c924ff85ce7b69dc2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jan 6 19:22:15 2020 +0800

    rockchip: resource: remove rockchip_get_resource_file_offset()
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I5c468d69640f223a78dcff1b11981a0d36f3ad8a

diff --git a/arch/arm/include/asm/arch-rockchip/resource_img.h b/arch/arm/include/asm/arch-rockchip/resource_img.h
index 492913bae2..9b0aabc2f2 100644
--- a/arch/arm/include/asm/arch-rockchip/resource_img.h
+++ b/arch/arm/include/asm/arch-rockchip/resource_img.h
@@ -19,16 +19,6 @@
  */
 int rockchip_read_resource_file(void *buf, const char *name, int offset, int len);
 
-/*
- * rockchip_get_resource_file_offset() - read file offset of partition
- *
- * @resc_img_hdr: resource file hdr
- * @name: file name
- *
- * @return negative on error, otherwise file offset
- */
-int rockchip_get_resource_file_offset(void *resc_hdr, const char *name);
-
 /*
  * rockchip_get_resource_file_size() - read file size
  *
diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
old mode 100755
new mode 100644
index 2617605282..611f767d1d
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -15,8 +15,6 @@
 #include <sysmem.h>
 #include <asm/io.h>
 #include <asm/unaligned.h>
-#include <android_avb/libavb_ab.h>
-#include <android_avb/rk_avb_ops_user.h>
 #include <dm/ofnode.h>
 #include <linux/list.h>
 #include <u-boot/sha1.h>
@@ -539,17 +537,6 @@ static struct resource_file *get_file_info(struct resource_img_hdr *hdr,
 	return NULL;
 }
 
-int rockchip_get_resource_file_offset(void *resc_hdr, const char *name)
-{
-	struct resource_file *file;
-
-	file = get_file_info(resc_hdr, name);
-	if (!file)
-		return -ENFILE;
-
-	return file->f_offset;
-}
-
 /*
  * read file from resource partition
  * @buf: destination buf to store file data;

commit cddfd2aeaee9440c042bfa60e7323761783b6521
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed Jan 8 17:01:47 2020 +0800

    dts: rk3308: change to add spi_flash to spl-boot-order list
    
    "spi_nand" should in front of "spi_nor"
    
    Change-Id: If57bee64de0cd44cefaa736325bb542ccb9ce83a
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-u-boot.dtsi b/arch/arm/dts/rk3308-u-boot.dtsi
index 374b89c859..e7c3a18cbd 100644
--- a/arch/arm/dts/rk3308-u-boot.dtsi
+++ b/arch/arm/dts/rk3308-u-boot.dtsi
@@ -12,7 +12,7 @@
 
 	chosen {
 		stdout-path = &uart2;
-		u-boot,spl-boot-order = &sdmmc, &sfc, &nandc, &emmc;
+		u-boot,spl-boot-order = &sdmmc, &spi_nand, &spi_nor, &nandc, &emmc;
 	};
 };
 
@@ -89,7 +89,7 @@
 
 	#address-cells = <1>;
 	#size-cells = <0>;
-	flash@0 {
+	spi_nand: flash@0 {
 		u-boot,dm-spl;
 		compatible = "spi-nand";
 		reg = <0>;
@@ -97,6 +97,14 @@
 		spi-rx-bus-width = <4>;
 		spi-max-frequency = <96000000>;
 	};
+	spi_nor: flash@1 {
+		u-boot,dm-spl;
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-tx-bus-width = <1>;
+		spi-rx-bus-width = <4>;
+		spi-max-frequency = <96000000>;
+	};
 };
 
 &crypto {

commit c9b995fdcce7a66006bd1f56f4167aefd801c49e
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed Jan 8 16:59:56 2020 +0800

    rockchip: spl-boot-order: adjust SPI flash dectecting strategy
    
    Directly detect spi_flash node
    
    Change-Id: Iafb691b28365b624cc2c4b15686cab3efc6da1d5
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/spl-boot-order.c b/arch/arm/mach-rockchip/spl-boot-order.c
index e3994b287a..d45e47697a 100644
--- a/arch/arm/mach-rockchip/spl-boot-order.c
+++ b/arch/arm/mach-rockchip/spl-boot-order.c
@@ -34,23 +34,6 @@ static int spl_node_to_boot_device(int node)
 {
 	struct udevice *parent;
 
-	if (!uclass_get_device_by_of_offset(UCLASS_SPI, node, &parent)) {
-		struct udevice *spi_dev;
-
-		for (device_find_first_child(parent, &spi_dev);
-		     spi_dev;
-		     device_find_next_child(&spi_dev)) {
-			if (device_get_uclass_id(spi_dev) == UCLASS_SPI_FLASH) {
-				return BOOT_DEVICE_MTD_BLK_SPI_NOR;
-			} else if (device_get_uclass_id(spi_dev) == UCLASS_MTD) {
-				return BOOT_DEVICE_MTD_BLK_SPI_NAND;
-			} else {
-				printf("Can not find spi flash device\n");
-				return -ENOSYS;
-			}
-		}
-	}
-
 	/*
 	 * This should eventually move into the SPL code, once SPL becomes
 	 * aware of the block-device layer.  Until then (and to avoid unneeded
@@ -89,7 +72,10 @@ static int spl_node_to_boot_device(int node)
 	 * soon.
 	 */
 	if (!uclass_get_device_by_of_offset(UCLASS_SPI_FLASH, node, &parent))
-		return BOOT_DEVICE_SPI;
+		return BOOT_DEVICE_MTD_BLK_SPI_NOR;
+
+	if (!uclass_get_device_by_of_offset(UCLASS_MTD, node, &parent))
+		return BOOT_DEVICE_MTD_BLK_SPI_NAND;
 
 #ifdef CONFIG_SPL_NAND_SUPPORT
 	if (!rk_nand_init())

commit fccb2c59ffd186b32b55b5dfc0ec8021c8f1864e
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Jan 8 17:39:37 2020 +0800

    rockchip: rk3308: add alias for emmc/sdmmc
    
    Add alias for mmc/sdmmc so that we can have a fix mmc number for emmc.
    
    Change-Id: Ic282942ac994dbe015ddd70e5e5b0e34a7b9bd24
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-u-boot.dtsi b/arch/arm/dts/rk3308-u-boot.dtsi
index e7095ea786..374b89c859 100644
--- a/arch/arm/dts/rk3308-u-boot.dtsi
+++ b/arch/arm/dts/rk3308-u-boot.dtsi
@@ -5,6 +5,10 @@
  */
 
 / {
+	aliases {
+		mmc0 = &emmc;
+		mmc1 = &sdmmc;
+	};
 
 	chosen {
 		stdout-path = &uart2;

commit 1bbed24709eb9b3d2cbd491f22cbb8f446ac0a32
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Mon Nov 4 20:38:48 2019 +0800

    clk: rockchip: rk3308: Add support to set and get clk_rtc32k clock
    
    Change-Id: Iea481af0c99a2b2ca9d6eff050e96e80845c8478
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
index 8ebd6e1903..6269146175 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
@@ -154,6 +154,20 @@ enum {
 	CORE_DIV_CON_SHIFT	= 0,
 	CORE_DIV_CON_MASK	= 0x0f << CORE_DIV_CON_SHIFT,
 
+	/* CRU_CLK_SEL2_CON */
+	CLK_RTC32K_SEL_SHIFT	= 8,
+	CLK_RTC32K_SEL_MASK	= 3 << CLK_RTC32K_SEL_SHIFT,
+	CLK_RTC32K_IO		= 0,
+	CLK_RTC32K_PVTM,
+	CLK_RTC32K_FRAC_DIV,
+	CLK_RTC32K_DIV,
+
+	/* CRU_CLK_SEL3_CON */
+	CLK_RTC32K_FRAC_NUMERATOR_SHIFT		= 16,
+	CLK_RTC32K_FRAC_NUMERATOR_MASK		= 0xffff << 16,
+	CLK_RTC32K_FRAC_DENOMINATOR_SHIFT	= 0,
+	CLK_RTC32K_FRAC_DENOMINATOR_MASK	= 0xffff,
+
 	/* CRU_CLK_SEL5_CON */
 	BUS_PLL_SEL_SHIFT	= 6,
 	BUS_PLL_SEL_MASK	= 0x3 << BUS_PLL_SEL_SHIFT,
diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index 49149fd615..7d9ecc9f70 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -83,6 +83,57 @@ static struct rockchip_pll_clock rk3308_pll_clks[] = {
 		      RK3308_MODE_CON, 6, 10, 0, NULL),
 };
 
+/*
+ *
+ * rational_best_approximation(31415, 10000,
+ *		(1 << 8) - 1, (1 << 5) - 1, &n, &d);
+ *
+ * you may look at given_numerator as a fixed point number,
+ * with the fractional part size described in given_denominator.
+ *
+ * for theoretical background, see:
+ * http://en.wikipedia.org/wiki/Continued_fraction
+ */
+static void rational_best_approximation(unsigned long given_numerator,
+					unsigned long given_denominator,
+					unsigned long max_numerator,
+					unsigned long max_denominator,
+					unsigned long *best_numerator,
+					unsigned long *best_denominator)
+{
+	unsigned long n, d, n0, d0, n1, d1;
+
+	n = given_numerator;
+	d = given_denominator;
+	n0 = 0;
+	d1 = 0;
+	n1 = 1;
+	d0 = 1;
+	for (;;) {
+		unsigned long t, a;
+
+		if (n1 > max_numerator || d1 > max_denominator) {
+			n1 = n0;
+			d1 = d0;
+			break;
+		}
+		if (d == 0)
+			break;
+		t = d;
+		a = n / d;
+		d = n % d;
+		n = t;
+		t = n0 + a * n1;
+		n0 = n1;
+		n1 = t;
+		t = d0 + a * d1;
+		d0 = d1;
+		d1 = t;
+	}
+	*best_numerator = n1;
+	*best_denominator = d1;
+}
+
 static ulong rk3308_armclk_set_clk(struct rk3308_clk_priv *priv, ulong hz)
 {
 	struct rk3308_cru *cru = priv->cru;
@@ -800,6 +851,44 @@ static ulong rk3308_crypto_set_clk(struct rk3308_clk_priv *priv, ulong clk_id,
 	return rk3308_crypto_get_clk(priv, clk_id);
 }
 
+static ulong rk3308_rtc32k_get_clk(struct rk3308_clk_priv *priv, ulong clk_id)
+{
+	struct rk3308_cru *cru = priv->cru;
+	unsigned long m, n;
+	u32 con, fracdiv;
+
+	con = readl(&cru->clksel_con[2]);
+	if ((con & CLK_RTC32K_SEL_MASK) >> CLK_RTC32K_SEL_SHIFT !=
+	    CLK_RTC32K_FRAC_DIV)
+		return -EINVAL;
+
+	fracdiv = readl(&cru->clksel_con[3]);
+	m = fracdiv & CLK_RTC32K_FRAC_NUMERATOR_MASK;
+	m >>= CLK_RTC32K_FRAC_NUMERATOR_SHIFT;
+	n = fracdiv & CLK_RTC32K_FRAC_DENOMINATOR_MASK;
+	n >>= CLK_RTC32K_FRAC_DENOMINATOR_SHIFT;
+
+	return OSC_HZ * m / n;
+}
+
+static ulong rk3308_rtc32k_set_clk(struct rk3308_clk_priv *priv, ulong clk_id,
+				   ulong hz)
+{
+	struct rk3308_cru *cru = priv->cru;
+	unsigned long m, n, val;
+
+	rational_best_approximation(hz, OSC_HZ,
+				    GENMASK(16 - 1, 0),
+				    GENMASK(16 - 1, 0),
+				    &m, &n);
+	val = m << CLK_RTC32K_FRAC_NUMERATOR_SHIFT | n;
+	writel(val, &cru->clksel_con[3]);
+	rk_clrsetreg(&cru->clkgate_con[2], CLK_RTC32K_SEL_MASK,
+		     CLK_RTC32K_FRAC_DIV << CLK_RTC32K_SEL_SHIFT);
+
+	return rk3308_rtc32k_get_clk(priv, clk_id);
+}
+
 static ulong rk3308_clk_get_rate(struct clk *clk)
 {
 	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
@@ -873,6 +962,9 @@ static ulong rk3308_clk_get_rate(struct clk *clk)
 	case SCLK_CRYPTO_APK:
 		rate = rk3308_crypto_get_clk(priv, clk->id);
 		break;
+	case SCLK_RTC32K:
+		rate = rk3308_rtc32k_get_clk(priv, clk->id);
+		break;
 	default:
 		return -ENOENT;
 	}
@@ -951,6 +1043,9 @@ static ulong rk3308_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_CRYPTO_APK:
 		ret = rk3308_crypto_set_clk(priv, clk->id, rate);
 		break;
+	case SCLK_RTC32K:
+		ret = rk3308_rtc32k_set_clk(priv, clk->id, rate);
+		break;
 	default:
 		return -ENOENT;
 	}

commit 492844a318dc286e332f639c4c7824811453725b
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Tue Nov 26 16:48:16 2019 +0800

    rockchip: efuse: Add rockchip_rk3288_efuse_secure_read() for rk3288
    
    The 256-bit and 1024-bit efuse are always secure.
    
    Change-Id: I763a745360952991e63785bcacf0b63e859e60f8
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c
index 643bfb6470..a6dff3d5fd 100644
--- a/drivers/misc/rockchip-efuse.c
+++ b/drivers/misc/rockchip-efuse.c
@@ -12,9 +12,11 @@
 #include <command.h>
 #include <display_options.h>
 #include <dm.h>
+#include <linux/arm-smccc.h>
 #include <linux/bitops.h>
 #include <linux/delay.h>
 #include <misc.h>
+#include <asm/arch/rockchip_smccc.h>
 
 #define T_CSB_P_S		0
 #define T_PGENB_P_S		0
@@ -262,6 +264,57 @@ static int rockchip_rk3288_efuse_read(struct udevice *dev, int offset,
 	return 0;
 }
 
+#ifndef CONFIG_SPL_BUILD
+static int rockchip_rk3288_efuse_secure_read(struct udevice *dev, int offset,
+					     void *buf, int size)
+{
+	struct rockchip_efuse_platdata *plat = dev_get_platdata(dev);
+	struct rockchip_efuse_regs *efuse =
+		(struct rockchip_efuse_regs *)plat->base;
+	u8 *buffer = buf;
+	int max_size = RK3288_NFUSES * RK3288_BYTES_PER_FUSE;
+	struct arm_smccc_res res;
+
+	if (size > (max_size - offset))
+		size = max_size - offset;
+
+	/* Switch to read mode */
+	sip_smc_secure_reg_write((ulong)&efuse->ctrl,
+				 RK3288_LOAD | RK3288_PGENB);
+	udelay(1);
+	while (size--) {
+		res = sip_smc_secure_reg_read((ulong)&efuse->ctrl);
+		sip_smc_secure_reg_write((ulong)&efuse->ctrl, res.a1 &
+					 (~(RK3288_A_MASK << RK3288_A_SHIFT)));
+		/* set addr */
+		res = sip_smc_secure_reg_read((ulong)&efuse->ctrl);
+		sip_smc_secure_reg_write((ulong)&efuse->ctrl, res.a1 |
+					 ((offset++ & RK3288_A_MASK) <<
+					  RK3288_A_SHIFT));
+		udelay(1);
+		/* strobe low to high */
+		res = sip_smc_secure_reg_read((ulong)&efuse->ctrl);
+		sip_smc_secure_reg_write((ulong)&efuse->ctrl,
+					 res.a1 | RK3288_STROBE);
+		ndelay(60);
+		/* read data */
+		res = sip_smc_secure_reg_read((ulong)&efuse->dout);
+		*buffer++ = res.a1;
+		/* reset strobe to low */
+		res = sip_smc_secure_reg_read((ulong)&efuse->ctrl);
+		sip_smc_secure_reg_write((ulong)&efuse->ctrl,
+					 res.a1 & (~RK3288_STROBE));
+		udelay(1);
+	}
+
+	/* Switch to standby mode */
+	sip_smc_secure_reg_write((ulong)&efuse->ctrl,
+				 RK3288_PGENB | RK3288_CSB);
+
+	return 0;
+}
+#endif
+
 static int rockchip_rk3328_efuse_read(struct udevice *dev, int offset,
 				      void *buf, int size)
 {
@@ -342,10 +395,12 @@ static const struct udevice_id rockchip_efuse_ids[] = {
 		.compatible = "rockchip,rk1808-efuse",
 		.data = (ulong)&rockchip_rk1808_efuse_read,
 	},
+#ifndef CONFIG_SPL_BUILD
 	{
-		.compatible = "rockchip,rockchip-efuse",
-		.data = (ulong)&rockchip_rk3288_efuse_read,
+		.compatible = "rockchip,rk3288-secure-efuse",
+		.data = (ulong)&rockchip_rk3288_efuse_secure_read,
 	},
+#endif
 	{
 		.compatible = "rockchip,rk3066a-efuse",
 		.data = (ulong)&rockchip_rk3288_efuse_read,

commit 2136741eb8eb0706f51af307b207ad8baf8f936a
Author: Jagan Teki <jagan@amarulasolutions.com>
Date:   Wed Dec 18 13:00:02 2019 +0530

    UPSTREAM: usb: dwc3: Fix UTMI/UTMIW phy interface initialization
    
    DWC3 support phy interfaces like 8/16-bit UTMI+. phy interface
    initialization code would handle them properly along with UNKNOWN
    type by default if none of the user/board doesn't need to use the
    phy interfaces at all.
    
    The current code is masking the 8/16-bit UTMI+ interface bits globally
    which indeed effect the UNKNOWN cases, therefore it effects the platforms
    which are not using phy interfaces at all.
    
    So, handle the phy masking bits accordingly on respective interface
    type cases.
    
    Conflicts:
            drivers/usb/dwc3/core.h
    
    Change-Id: I28ce66d68984e30fa308a0b5a52c321d7bd96eda
    Fixes: 6b7ebff00190 ("usb: dwc3: Add phy interface for dwc3_uboot")
    Reported-by: Andy Shevchenko <andy.shevchenko@gmail.com>
    Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 5c207282f53f86ecbf8c25cb691030d8c643ba1c)

diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 00c567115f..4dc9324079 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -396,9 +396,10 @@ static void dwc3_phy_setup(struct dwc3 *dwc)
 		reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
 
 	if (dwc->usb2_phyif_utmi_width == 16) {
-		reg &= ~DWC3_GUSB2PHYCFG_USBTRDTIM_MASK;
-		reg |= DWC3_GUSB2PHYCFG_USBTRDTIM_16BIT;
-		reg |= DWC3_GUSB2PHYCFG_PHYIF_16BIT;
+		reg &= ~(DWC3_GUSB2PHYCFG_PHYIF_MASK |
+			DWC3_GUSB2PHYCFG_USBTRDTIM_MASK);
+		reg |= DWC3_GUSB2PHYCFG_USBTRDTIM(USBTRDTIM_UTMI_16_BIT);
+		reg |= DWC3_GUSB2PHYCFG_PHYIF(UTMI_PHYIF_16_BIT);
 	}
 	dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
 
@@ -630,15 +631,19 @@ static void dwc3_uboot_hsphy_mode(struct dwc3_device *dwc3_dev,
 
 	/* Set dwc3 usb2 phy config */
 	reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
-	reg |= DWC3_GUSB2PHYCFG_PHYIF;
-	reg &= ~DWC3_GUSB2PHYCFG_USBTRDTIM_MASK;
 
 	switch (hsphy_mode) {
 	case USBPHY_INTERFACE_MODE_UTMI:
-		reg |= DWC3_GUSB2PHYCFG_USBTRDTIM_8BIT;
+		reg &= ~(DWC3_GUSB2PHYCFG_PHYIF_MASK |
+			DWC3_GUSB2PHYCFG_USBTRDTIM_MASK);
+		reg |= DWC3_GUSB2PHYCFG_PHYIF(UTMI_PHYIF_8_BIT) |
+			DWC3_GUSB2PHYCFG_USBTRDTIM(USBTRDTIM_UTMI_8_BIT);
 		break;
 	case USBPHY_INTERFACE_MODE_UTMIW:
-		reg |= DWC3_GUSB2PHYCFG_USBTRDTIM_16BIT;
+		reg &= ~(DWC3_GUSB2PHYCFG_PHYIF_MASK |
+			DWC3_GUSB2PHYCFG_USBTRDTIM_MASK);
+		reg |= DWC3_GUSB2PHYCFG_PHYIF(UTMI_PHYIF_16_BIT) |
+			DWC3_GUSB2PHYCFG_USBTRDTIM(USBTRDTIM_UTMI_16_BIT);
 		break;
 	default:
 		break;
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 48bf38a516..c9e95f6605 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -167,18 +167,14 @@
 #define DWC3_GUSB2PHYCFG_SUSPHY		(1 << 6)
 #define DWC3_GUSB2PHYCFG_PHYIF_8BIT	(0 << 3)
 #define DWC3_GUSB2PHYCFG_PHYIF_16BIT	(1 << 3)
-#define DWC3_GUSB2PHYCFG_PHYIF		BIT(3)
-
-/* Global USB2 PHY Configuration Mask */
-#define DWC3_GUSB2PHYCFG_USBTRDTIM_MASK		(0xf << 10)
-
-/* Global USB2 PHY Configuration Offset */
-#define DWC3_GUSB2PHYCFG_USBTRDTIM_OFFSET	10
-
-#define DWC3_GUSB2PHYCFG_USBTRDTIM_16BIT	(0x5 << \
-		DWC3_GUSB2PHYCFG_USBTRDTIM_OFFSET)
-#define DWC3_GUSB2PHYCFG_USBTRDTIM_8BIT		(0x9 << \
-		DWC3_GUSB2PHYCFG_USBTRDTIM_OFFSET)
+#define DWC3_GUSB2PHYCFG_PHYIF(n)	((n) << 3)
+#define DWC3_GUSB2PHYCFG_PHYIF_MASK	DWC3_GUSB2PHYCFG_PHYIF(1)
+#define DWC3_GUSB2PHYCFG_USBTRDTIM(n)	((n) << 10)
+#define DWC3_GUSB2PHYCFG_USBTRDTIM_MASK	DWC3_GUSB2PHYCFG_USBTRDTIM(0xf)
+#define USBTRDTIM_UTMI_8_BIT		9
+#define USBTRDTIM_UTMI_16_BIT		5
+#define UTMI_PHYIF_16_BIT		1
+#define UTMI_PHYIF_8_BIT		0
 
 /* Global USB3 PIPE Control Register */
 #define DWC3_GUSB3PIPECTL_PHYSOFTRST	(1 << 31)

commit 6a2b8f486134edd92d4357f14b876b2a716fd643
Author: Vignesh Raghavendra <vigneshr@ti.com>
Date:   Thu Dec 5 13:29:25 2019 +0530

    UPSTREAM: usb: cdns3: ep0: Fix build warnings related to cache ops
    
    Since, commit 62f9b6544728 ("common: Move older CPU functions to their own header")
    cache ops functions are declared in a separate header. Include the same
    to avoid build warnings.
    
    Change-Id: I76b3f46ce7e8988335380a22038fb12296ccfb75
    Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit bdf30e84909d8d99c2700a0fc6c3e799e3d8e2d4)

diff --git a/drivers/usb/cdns3/ep0.c b/drivers/usb/cdns3/ep0.c
index 1903f61103..0b6d9cf727 100644
--- a/drivers/usb/cdns3/ep0.c
+++ b/drivers/usb/cdns3/ep0.c
@@ -10,6 +10,7 @@
  *          Peter Chen <peter.chen@nxp.com>
  */
 
+#include <cpu_func.h>
 #include <linux/usb/composite.h>
 #include <linux/iopoll.h>
 

commit e0c79ab4064e781c687c9eab79d6b6cebde2ff83
Author: Jagan Teki <jagan@amarulasolutions.com>
Date:   Tue Nov 19 13:56:20 2019 +0530

    UPSTREAM: usb: dwc3: Add phy interface for dwc3_uboot
    
    U-Boot has two different variants of dwc3 initializations,
    - with dm variant gadget, so the respective dm driver would
      call the dwc3_init in core.
    - with non-dm variant gadget, so the usage board file would
      call dwc3_uboot_init in core.
    
    The driver probe would handle all respective gadget properties
    including phy interface via phy_type property and then trigger
    dwc3_init for dm-variant gadgets.
    
    So, to support the phy interface for non-dm variant gadgets,
    the better option is dwc3_uboot_init since there is no
    dedicated controller for non-dm variant gadgets.
    
    This patch support for adding phy interface like 8/16-bit UTMI+
    code for dwc3_uboot.
    
    This change used Linux phy.h enum list, to make proper code
    compatibility.
    
    Conflicts:
            drivers/usb/dwc3/core.h
    
    Change-Id: I626e2428b548a2624fead5418ecb8f7571c77e89
    Cc: Marek Vasut <marex@denx.de>
    Tested-by: Levin Du <djw@t-chip.com.cn>
    Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
    Reviewed-by: Marek Vasut <marex@denx.de>
    Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 6b7ebff00190649d2136b34f6feebc0dbe85bfdc)

diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index ad29046b06..00c567115f 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -622,6 +622,31 @@ static void dwc3_core_exit_mode(struct dwc3 *dwc)
 	dwc3_gadget_run(dwc);
 }
 
+static void dwc3_uboot_hsphy_mode(struct dwc3_device *dwc3_dev,
+				  struct dwc3 *dwc)
+{
+	enum usb_phy_interface hsphy_mode = dwc3_dev->hsphy_mode;
+	u32 reg;
+
+	/* Set dwc3 usb2 phy config */
+	reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
+	reg |= DWC3_GUSB2PHYCFG_PHYIF;
+	reg &= ~DWC3_GUSB2PHYCFG_USBTRDTIM_MASK;
+
+	switch (hsphy_mode) {
+	case USBPHY_INTERFACE_MODE_UTMI:
+		reg |= DWC3_GUSB2PHYCFG_USBTRDTIM_8BIT;
+		break;
+	case USBPHY_INTERFACE_MODE_UTMIW:
+		reg |= DWC3_GUSB2PHYCFG_USBTRDTIM_16BIT;
+		break;
+	default:
+		break;
+	}
+
+	dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
+}
+
 #define DWC3_ALIGN_MASK		(16 - 1)
 
 /**
@@ -743,6 +768,8 @@ int dwc3_uboot_init(struct dwc3_device *dwc3_dev)
 		goto err0;
 	}
 
+	dwc3_uboot_hsphy_mode(dwc3_dev, dwc);
+
 	ret = dwc3_event_buffers_setup(dwc);
 	if (ret) {
 		dev_err(dwc->dev, "failed to setup event buffers\n");
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 23655191ab..48bf38a516 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -167,13 +167,18 @@
 #define DWC3_GUSB2PHYCFG_SUSPHY		(1 << 6)
 #define DWC3_GUSB2PHYCFG_PHYIF_8BIT	(0 << 3)
 #define DWC3_GUSB2PHYCFG_PHYIF_16BIT	(1 << 3)
-#define DWC3_GUSB2PHYCFG_USBTRDTIM_SHIFT	(10)
-#define DWC3_GUSB2PHYCFG_USBTRDTIM_MASK	(0xf << \
-		DWC3_GUSB2PHYCFG_USBTRDTIM_SHIFT)
-#define DWC3_GUSB2PHYCFG_USBTRDTIM_16BIT (0x5 << \
-		DWC3_GUSB2PHYCFG_USBTRDTIM_SHIFT)
-#define DWC3_GUSB2PHYCFG_USBTRDTIM_8BIT (0x9 << \
-		DWC3_GUSB2PHYCFG_USBTRDTIM_SHIFT)
+#define DWC3_GUSB2PHYCFG_PHYIF		BIT(3)
+
+/* Global USB2 PHY Configuration Mask */
+#define DWC3_GUSB2PHYCFG_USBTRDTIM_MASK		(0xf << 10)
+
+/* Global USB2 PHY Configuration Offset */
+#define DWC3_GUSB2PHYCFG_USBTRDTIM_OFFSET	10
+
+#define DWC3_GUSB2PHYCFG_USBTRDTIM_16BIT	(0x5 << \
+		DWC3_GUSB2PHYCFG_USBTRDTIM_OFFSET)
+#define DWC3_GUSB2PHYCFG_USBTRDTIM_8BIT		(0x9 << \
+		DWC3_GUSB2PHYCFG_USBTRDTIM_OFFSET)
 
 /* Global USB3 PIPE Control Register */
 #define DWC3_GUSB3PIPECTL_PHYSOFTRST	(1 << 31)
diff --git a/include/dwc3-uboot.h b/include/dwc3-uboot.h
index d9b18c5f3e..3227c601bb 100644
--- a/include/dwc3-uboot.h
+++ b/include/dwc3-uboot.h
@@ -11,10 +11,12 @@
 #define __DWC3_UBOOT_H_
 
 #include <linux/usb/otg.h>
+#include <linux/usb/phy.h>
 
 struct dwc3_device {
 	unsigned long base;
 	enum usb_dr_mode dr_mode;
+	enum usb_phy_interface hsphy_mode;
 	u32 maximum_speed;
 	unsigned tx_fifo_resize:1;
 	unsigned has_lpm_erratum;
diff --git a/include/linux/usb/phy.h b/include/linux/usb/phy.h
new file mode 100644
index 0000000000..158ca9cd85
--- /dev/null
+++ b/include/linux/usb/phy.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * USB PHY defines
+ *
+ * These APIs may be used between USB controllers.  USB device drivers
+ * (for either host or peripheral roles) don't use these calls; they
+ * continue to use just usb_device and usb_gadget.
+ */
+
+#ifndef __LINUX_USB_PHY_H
+#define __LINUX_USB_PHY_H
+
+enum usb_phy_interface {
+	USBPHY_INTERFACE_MODE_UNKNOWN,
+	USBPHY_INTERFACE_MODE_UTMI,
+	USBPHY_INTERFACE_MODE_UTMIW,
+};
+
+#endif /* __LINUX_USB_PHY_H */

commit 7808becd6bd09aed86ec71c328a1e1b6cc0f7419
Author: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Date:   Thu Nov 21 22:15:23 2019 +0100

    UPSTREAM: usb: dwc2: fix possible alignment issues
    
    Since upgrading to gcc9, warnings are issued:
    "taking address of packed member of ‘...’ may result in an unaligned
    pointer value"
    
    Fix this by converting dwc2_fifo_read to use unaligned access since packed
    structures may be on an unaligned address, depending on USB hardware.
    
    Change-Id: I2cc286df6fda386353cd2d350534e8ae398e67bb
    Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 7dc0ac6015718f5fb66bb79bf53df19f64fbfeee)

diff --git a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
index 28d026f5a5..4fdcd5c56c 100644
--- a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
+++ b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
@@ -743,7 +743,7 @@ static int write_fifo_ep0(struct dwc2_ep *ep, struct dwc2_request *req)
 	return 0;
 }
 
-static int dwc2_fifo_read(struct dwc2_ep *ep, u32 *cp, int max)
+static int dwc2_fifo_read(struct dwc2_ep *ep, void *cp, int max)
 {
 	invalidate_dcache_range((unsigned long)cp, (unsigned long)cp +
 				ROUND(max, CONFIG_SYS_CACHELINE_SIZE));
@@ -1297,7 +1297,7 @@ static void dwc2_ep0_setup(struct dwc2_udc *dev)
 	nuke(ep, -EPROTO);
 
 	/* read control req from fifo (8 bytes) */
-	dwc2_fifo_read(ep, (u32 *)usb_ctrl, 8);
+	dwc2_fifo_read(ep, usb_ctrl, 8);
 
 	debug_cond(DEBUG_SETUP != 0,
 		   "%s: bRequestType = 0x%x(%s), bRequest = 0x%x"

commit bafc57b2ad8d8331ceb1c4c7e8f1651724ee05a8
Author: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Date:   Thu Nov 21 22:15:22 2019 +0100

    UPSTREAM: usb: composite: fix possible alignment issues
    
    Since upgrading to gcc9, warnings are issued:
    "taking address of packed member of ‘...’ may result in an unaligned
    pointer value"
    
    Fix this by converting two functions to use unaligned access since packed
    structures may be on an unaligned address, depending on USB hardware.
    
    Conflicts:
            drivers/usb/gadget/composite.c
    
    Change-Id: I9a42dcd3ca1a633204396e2a2699069a88df0890
    Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 616ebd8b9cb455c5949bd94c47283835eba1954a)

diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c
index 7cd99fbdd2..89341e8832 100644
--- a/drivers/usb/gadget/composite.c
+++ b/drivers/usb/gadget/composite.c
@@ -13,8 +13,16 @@
 
 #define USB_BUFSIZ	4096
 
+/* Helper type for accessing packed u16 pointers */
+typedef struct { __le16 val; } __packed __le16_packed;
+
 static struct usb_composite_driver *composite;
 
+static inline void le16_add_cpu_packed(__le16_packed *var, u16 val)
+{
+	var->val = cpu_to_le16(le16_to_cpu(var->val) + val);
+}
+
 /**
  * usb_add_function() - add a function to a configuration
  * @config: the configuration
@@ -289,65 +297,6 @@ static int count_configs(struct usb_composite_dev *cdev, unsigned type)
 	return count;
 }
 
-static int bos_desc(struct usb_composite_dev *cdev)
-{
-	struct usb_dev_cap_header	*cap;
-	struct usb_ext_cap_descriptor	*usb_ext;
-	struct usb_ss_cap_descriptor	*ss_cap;
-	struct usb_bos_descriptor	*bos = cdev->req->buf;
-
-	bos->bLength = USB_DT_BOS_SIZE;
-	bos->bDescriptorType = USB_DT_BOS;
-	bos->wTotalLength = cpu_to_le16(USB_DT_BOS_SIZE);
-	bos->bNumDeviceCaps = 0;
-
-	if (cdev->gadget->speed < USB_SPEED_SUPER) {
-		/* For rockusb with bcdUSB (0x0201) */
-		cap = cdev->req->buf + le16_to_cpu(bos->wTotalLength);
-		bos->bNumDeviceCaps++;
-		bos->wTotalLength = cpu_to_le16(bos->wTotalLength +
-						sizeof(*cap));
-		cap->bLength = sizeof(*cap);
-		cap->bDescriptorType = USB_DT_DEVICE_CAPABILITY;
-		cap->bDevCapabilityType = 0;
-	} else {
-		/*
-		 * A SuperSpeed device shall include the USB2.0
-		 * extension descriptor and shall support LPM when
-		 * operating in USB2.0 HS mode.
-		 */
-		usb_ext = cdev->req->buf + le16_to_cpu(bos->wTotalLength);
-		bos->bNumDeviceCaps++;
-		bos->wTotalLength = cpu_to_le16(bos->wTotalLength +
-						USB_DT_USB_EXT_CAP_SIZE);
-		usb_ext->bLength = USB_DT_USB_EXT_CAP_SIZE;
-		usb_ext->bDescriptorType = USB_DT_DEVICE_CAPABILITY;
-		usb_ext->bDevCapabilityType = USB_CAP_TYPE_EXT;
-		usb_ext->bmAttributes = USB_LPM_SUPPORT;
-
-		/*
-		 * The Superspeed USB Capability descriptor shall be
-		 * implemented by all SuperSpeed devices.
-		 */
-		ss_cap = cdev->req->buf + le16_to_cpu(bos->wTotalLength);
-		bos->bNumDeviceCaps++;
-		bos->wTotalLength = cpu_to_le16(bos->wTotalLength +
-						USB_DT_USB_SS_CAP_SIZE);
-		ss_cap->bLength = USB_DT_USB_SS_CAP_SIZE;
-		ss_cap->bDescriptorType = USB_DT_DEVICE_CAPABILITY;
-		ss_cap->bDevCapabilityType = USB_SS_CAP_TYPE;
-		ss_cap->bmAttributes = 0; /* LTM is not supported yet */
-		ss_cap->wSpeedSupported = cpu_to_le16(USB_FULL_SPEED_OPERATION |
-				USB_HIGH_SPEED_OPERATION |
-				USB_5GBPS_OPERATION);
-		ss_cap->bFunctionalitySupport = USB_FULL_SPEED_OPERATION;
-		ss_cap->bU1devExitLat = USB_DEFAULT_U1_DEV_EXIT_LAT;
-		ss_cap->bU2DevExitLat = cpu_to_le16(USB_DEFAULT_U2_DEV_EXIT_LAT);
-	}
-
-	return le16_to_cpu(bos->wTotalLength);
-}
-
 static void device_qual(struct usb_composite_dev *cdev)
 {
 	struct usb_qualifier_descriptor	*qual = cdev->req->buf;
@@ -566,20 +515,21 @@ done:
  * the host side.
  */
 
-static void collect_langs(struct usb_gadget_strings **sp, __le16 *buf)
+static void collect_langs(struct usb_gadget_strings **sp, void *buf)
 {
 	const struct usb_gadget_strings	*s;
 	u16				language;
-	__le16				*tmp;
+	__le16_packed			*tmp;
+	__le16_packed			*end = (buf + 252);
 
 	while (*sp) {
 		s = *sp;
 		language = cpu_to_le16(s->language);
-		for (tmp = buf; *tmp && tmp < &buf[126]; tmp++) {
-			if (*tmp == language)
+		for (tmp = buf; tmp->val && tmp < end; tmp++) {
+			if (tmp->val == language)
 				goto repeat;
 		}
-		*tmp++ = language;
+		tmp->val = language;
 repeat:
 		sp++;
 	}
@@ -774,6 +724,65 @@ static void composite_setup_complete(struct usb_ep *ep, struct usb_request *req)
 				req->status, req->actual, req->length);
 }
 
+static int bos_desc(struct usb_composite_dev *cdev)
+{
+	struct usb_dev_cap_header	*cap;
+	struct usb_ext_cap_descriptor	*usb_ext;
+	struct usb_ss_cap_descriptor	*ss_cap;
+	struct usb_bos_descriptor	*bos = cdev->req->buf;
+
+	bos->bLength = USB_DT_BOS_SIZE;
+	bos->bDescriptorType = USB_DT_BOS;
+	bos->wTotalLength = cpu_to_le16(USB_DT_BOS_SIZE);
+	bos->bNumDeviceCaps = 0;
+
+	if (cdev->gadget->speed < USB_SPEED_SUPER) {
+		/* For rockusb with bcdUSB (0x0201) */
+		cap = cdev->req->buf + le16_to_cpu(bos->wTotalLength);
+		bos->bNumDeviceCaps++;
+		bos->wTotalLength = cpu_to_le16(bos->wTotalLength +
+						sizeof(*cap));
+		cap->bLength = sizeof(*cap);
+		cap->bDescriptorType = USB_DT_DEVICE_CAPABILITY;
+		cap->bDevCapabilityType = 0;
+	} else {
+		/*
+		 * A SuperSpeed device shall include the USB2.0
+		 * extension descriptor and shall support LPM when
+		 * operating in USB2.0 HS mode.
+		 */
+		usb_ext = cdev->req->buf + le16_to_cpu(bos->wTotalLength);
+		bos->bNumDeviceCaps++;
+		le16_add_cpu_packed((__le16_packed *)&bos->wTotalLength,
+				    USB_DT_USB_EXT_CAP_SIZE);
+		usb_ext->bLength = USB_DT_USB_EXT_CAP_SIZE;
+		usb_ext->bDescriptorType = USB_DT_DEVICE_CAPABILITY;
+		usb_ext->bDevCapabilityType = USB_CAP_TYPE_EXT;
+		usb_ext->bmAttributes = USB_LPM_SUPPORT;
+
+		/*
+		 * The Superspeed USB Capability descriptor shall be
+		 * implemented by all SuperSpeed devices.
+		 */
+		ss_cap = cdev->req->buf + le16_to_cpu(bos->wTotalLength);
+		bos->bNumDeviceCaps++;
+		le16_add_cpu_packed((__le16_packed *)&bos->wTotalLength,
+				    USB_DT_USB_SS_CAP_SIZE);
+		ss_cap->bLength = USB_DT_USB_SS_CAP_SIZE;
+		ss_cap->bDescriptorType = USB_DT_DEVICE_CAPABILITY;
+		ss_cap->bDevCapabilityType = USB_SS_CAP_TYPE;
+		ss_cap->bmAttributes = 0; /* LTM is not supported yet */
+		ss_cap->wSpeedSupported = cpu_to_le16(USB_FULL_SPEED_OPERATION |
+				USB_HIGH_SPEED_OPERATION |
+				USB_5GBPS_OPERATION);
+		ss_cap->bFunctionalitySupport = USB_FULL_SPEED_OPERATION;
+		ss_cap->bU1devExitLat = USB_DEFAULT_U1_DEV_EXIT_LAT;
+		ss_cap->bU2DevExitLat = cpu_to_le16(USB_DEFAULT_U2_DEV_EXIT_LAT);
+	}
+
+	return le16_to_cpu(bos->wTotalLength);
+}
+
 /*
  * The setup() callback implements all the ep0 functionality that's
  * not handled lower down, in hardware or the hardware driver(like

commit 8cf2756ce27eec30b580f0a41bb08d98bb9b502a
Author: Vignesh Raghavendra <vigneshr@ti.com>
Date:   Mon Nov 18 19:16:33 2019 +0530

    UPSTREAM: usb: cdns3: Fix include file path
    
    xhci.h has now been moved to include/usb/ directory. Therefore, update the
    path in the Cadence USB drivers.
    
    Change-Id: Id8eb19ff4ee0130265b14d9f350f6f78c6d691aa
    Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit e5521b1c6f4e2d18f7b33e6db06af5e47fdef52c)

diff --git a/drivers/usb/cdns3/core.c b/drivers/usb/cdns3/core.c
index f1e4bb6278..8c8e02169e 100644
--- a/drivers/usb/cdns3/core.c
+++ b/drivers/usb/cdns3/core.c
@@ -18,7 +18,7 @@
 #include <linux/kernel.h>
 #include <linux/io.h>
 #include <usb.h>
-#include "../host/xhci.h"
+#include <usb/xhci.h>
 
 #include "core.h"
 #include "host-export.h"
diff --git a/drivers/usb/cdns3/host.c b/drivers/usb/cdns3/host.c
index 79be63001d..425d9d053d 100644
--- a/drivers/usb/cdns3/host.c
+++ b/drivers/usb/cdns3/host.c
@@ -11,7 +11,7 @@
 #include <dm.h>
 #include <linux/compat.h>
 #include <usb.h>
-#include "../host/xhci.h"
+#include <usb/xhci.h>
 
 #include "core.h"
 #include "drd.h"

commit 58693cd5f2c1c3afd9920ca99fc459f222a103d7
Author: Chunfeng Yun <chunfeng.yun@mediatek.com>
Date:   Fri Nov 8 10:55:52 2019 +0800

    UPSTREAM: usb: xhci: support 1.1 or later version
    
    The xHCI 1.1 version also need set Transfer Type field
    
    Change-Id: Icd6c9f61352f56037566c356773a1908726897ab
    Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit e0891bb679200a8cc73c3b3d98ba40c02c31b850)

diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
index 1dfa31d7c4..58bfc81941 100644
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -828,7 +828,7 @@ int xhci_ctrl_tx(struct usb_device *udev, unsigned long pipe,
 		field |= 0x1;
 
 	/* xHCI 1.0 6.4.1.2.1: Transfer Type field */
-	if (HC_VERSION(xhci_readl(&ctrl->hccr->cr_capbase)) == 0x100) {
+	if (HC_VERSION(xhci_readl(&ctrl->hccr->cr_capbase)) >= 0x100) {
 		if (length > 0) {
 			if (req->requesttype & USB_DIR_IN)
 				field |= (TRB_DATA_IN << TRB_TX_TYPE_SHIFT);

commit 349befe519f03336717d1fa110d521013618e214
Author: Vignesh Raghavendra <vigneshr@ti.com>
Date:   Tue Oct 1 17:26:36 2019 +0530

    UPSTREAM: usb: gadget: Add gadget_is_cdns3() macro
    
    Add a new bcdDevice entry for Cadence USB gadget controller similar to
    other controller and add gadget_is_cdns3() macro as well.
    
    Conflicts:
            drivers/usb/gadget/gadget_chips.h
    
    Change-Id: I9be2baf3a8b57a0b1fb9116f51a04a71d59bb5f0
    Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit d80effb1847822e521cda17b4c73c83629b035d0)

diff --git a/drivers/usb/gadget/gadget_chips.h b/drivers/usb/gadget/gadget_chips.h
index 9b0ad2e62b..91b0285244 100644
--- a/drivers/usb/gadget/gadget_chips.h
+++ b/drivers/usb/gadget/gadget_chips.h
@@ -149,13 +149,11 @@
 #define gadget_is_dwc3(g)        0
 #endif
 
-
-
-/*
- * CONFIG_USB_GADGET_SX2
- * CONFIG_USB_GADGET_AU1X00
- * ...
- */
+#ifdef CONFIG_USB_CDNS3_GADGET
+#define gadget_is_cdns3(g)        (!strcmp("cdns3-gadget", (g)->name))
+#else
+#define gadget_is_cdns3(g)        0
+#endif
 
 /**
  * usb_gadget_controller_number - support bcdDevice id convention
@@ -216,5 +214,7 @@ static inline int usb_gadget_controller_number(struct usb_gadget *gadget)
 		return 0x22;
 	else if (gadget_is_dwc3(gadget))
 		return 0x23;
+	else if (gadget_is_cdns3(gadget))
+		return 0x24;
 	return -ENOENT;
 }

commit 5cec6cdf3e03480a7f73c1a0abe792bc47b35177
Author: Vignesh Raghavendra <vigneshr@ti.com>
Date:   Tue Oct 1 17:26:35 2019 +0530

    UPSTREAM: usb: cdns3: Add TI wrapper driver for CDNS USB3 controller
    
    Add driver to handle TI specific wrapper for Cadence USB3 controller
    present on J721e SoC. Based on Linux driver for the same.
    
    Change-Id: I68fb3c8144633bb6f363ee0f5dd7f5461d4a38a0
    Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit a9ca4193bd3d96f1545d30c4b6a6845442403f26)

diff --git a/drivers/usb/cdns3/Kconfig b/drivers/usb/cdns3/Kconfig
index 25c0f103e7..4cf59c70d4 100644
--- a/drivers/usb/cdns3/Kconfig
+++ b/drivers/usb/cdns3/Kconfig
@@ -48,4 +48,11 @@ config SPL_USB_CDNS3_HOST
 
 	  Host controller is compliant with XHCI so it will use
 	  standard XHCI driver.
+
+config USB_CDNS3_TI
+	tristate "Cadence USB3 support on TI platforms"
+	default USB_CDNS3
+	help
+	  Say 'Y' here if you are building for Texas Instruments
+	  platforms that contain Cadence USB3 controller core. E.g.: J721e.
 endif
diff --git a/drivers/usb/cdns3/Makefile b/drivers/usb/cdns3/Makefile
index 525477954d..18d7190755 100644
--- a/drivers/usb/cdns3/Makefile
+++ b/drivers/usb/cdns3/Makefile
@@ -7,3 +7,5 @@ obj-$(CONFIG_USB_CDNS3)			+= cdns3.o
 cdns3-$(CONFIG_$(SPL_)USB_CDNS3_GADGET)	+= gadget.o ep0.o
 
 cdns3-$(CONFIG_$(SPL_)USB_CDNS3_HOST)	+= host.o
+
+obj-$(CONFIG_USB_CDNS3_TI)		+= cdns3-ti.o
diff --git a/drivers/usb/cdns3/cdns3-ti.c b/drivers/usb/cdns3/cdns3-ti.c
new file mode 100644
index 0000000000..2fa0104f1b
--- /dev/null
+++ b/drivers/usb/cdns3/cdns3-ti.c
@@ -0,0 +1,193 @@
+// SPDX-License-Identifier: GPL-2.0
+/**
+ * cdns_ti-ti.c - TI specific Glue layer for Cadence USB Controller
+ *
+ * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com
+ */
+
+#include <common.h>
+#include <asm-generic/io.h>
+#include <clk.h>
+#include <dm.h>
+#include <linux/io.h>
+#include <linux/usb/otg.h>
+#include <malloc.h>
+
+#include "core.h"
+
+/* USB Wrapper register offsets */
+#define USBSS_PID		0x0
+#define	USBSS_W1		0x4
+#define USBSS_STATIC_CONFIG	0x8
+#define USBSS_PHY_TEST		0xc
+#define	USBSS_DEBUG_CTRL	0x10
+#define	USBSS_DEBUG_INFO	0x14
+#define	USBSS_DEBUG_LINK_STATE	0x18
+#define	USBSS_DEVICE_CTRL	0x1c
+
+/* Wrapper 1 register bits */
+#define USBSS_W1_PWRUP_RST		BIT(0)
+#define USBSS_W1_OVERCURRENT_SEL	BIT(8)
+#define USBSS_W1_MODESTRAP_SEL		BIT(9)
+#define USBSS_W1_OVERCURRENT		BIT(16)
+#define USBSS_W1_MODESTRAP_MASK		GENMASK(18, 17)
+#define USBSS_W1_MODESTRAP_SHIFT	17
+#define USBSS_W1_USB2_ONLY		BIT(19)
+
+/* Static config register bits */
+#define USBSS1_STATIC_PLL_REF_SEL_MASK	GENMASK(8, 5)
+#define USBSS1_STATIC_PLL_REF_SEL_SHIFT	5
+#define USBSS1_STATIC_LOOPBACK_MODE_MASK	GENMASK(4, 3)
+#define USBSS1_STATIC_LOOPBACK_MODE_SHIFT	3
+#define USBSS1_STATIC_VBUS_SEL_MASK	GENMASK(2, 1)
+#define USBSS1_STATIC_VBUS_SEL_SHIFT	1
+#define USBSS1_STATIC_LANE_REVERSE	BIT(0)
+
+/* Modestrap modes */
+enum modestrap_mode { USBSS_MODESTRAP_MODE_NONE,
+		      USBSS_MODESTRAP_MODE_HOST,
+		      USBSS_MODESTRAP_MODE_PERIPHERAL};
+
+struct cdns_ti {
+	struct udevice *dev;
+	void __iomem *usbss;
+	int usb2_only:1;
+	int vbus_divider:1;
+	struct clk *usb2_refclk;
+	struct clk *lpm_clk;
+};
+
+static const int cdns_ti_rate_table[] = {	/* in KHZ */
+	9600,
+	10000,
+	12000,
+	19200,
+	20000,
+	24000,
+	25000,
+	26000,
+	38400,
+	40000,
+	58000,
+	50000,
+	52000,
+};
+
+static inline u32 cdns_ti_readl(struct cdns_ti *data, u32 offset)
+{
+	return readl(data->usbss + offset);
+}
+
+static inline void cdns_ti_writel(struct cdns_ti *data, u32 offset, u32 value)
+{
+	writel(value, data->usbss + offset);
+}
+
+static int cdns_ti_probe(struct udevice *dev)
+{
+	struct cdns_ti *data = dev_get_platdata(dev);
+	struct clk usb2_refclk;
+	int modestrap_mode;
+	unsigned long rate;
+	int rate_code, i;
+	u32 reg;
+	int ret;
+
+	data->dev = dev;
+
+	data->usbss = dev_remap_addr_index(dev, 0);
+	if (!data->usbss)
+		return -EINVAL;
+
+	ret = clk_get_by_name(dev, "usb2_refclk", &usb2_refclk);
+	if (ret) {
+		dev_err(dev, "Failed to get usb2_refclk\n");
+		return ret;
+	}
+
+	rate = clk_get_rate(&usb2_refclk);
+	rate /= 1000;	/* To KHz */
+	for (i = 0; i < ARRAY_SIZE(cdns_ti_rate_table); i++) {
+		if (cdns_ti_rate_table[i] == rate)
+			break;
+	}
+
+	if (i == ARRAY_SIZE(cdns_ti_rate_table)) {
+		dev_err(dev, "unsupported usb2_refclk rate: %lu KHz\n", rate);
+		return -EINVAL;
+	}
+
+	rate_code = i;
+
+	/* assert RESET */
+	reg = cdns_ti_readl(data, USBSS_W1);
+	reg &= ~USBSS_W1_PWRUP_RST;
+	cdns_ti_writel(data, USBSS_W1, reg);
+
+	/* set static config */
+	reg = cdns_ti_readl(data, USBSS_STATIC_CONFIG);
+	reg &= ~USBSS1_STATIC_PLL_REF_SEL_MASK;
+	reg |= rate_code << USBSS1_STATIC_PLL_REF_SEL_SHIFT;
+
+	reg &= ~USBSS1_STATIC_VBUS_SEL_MASK;
+	data->vbus_divider = dev_read_bool(dev, "ti,vbus-divider");
+	if (data->vbus_divider)
+		reg |= 1 << USBSS1_STATIC_VBUS_SEL_SHIFT;
+
+	cdns_ti_writel(data, USBSS_STATIC_CONFIG, reg);
+	reg = cdns_ti_readl(data, USBSS_STATIC_CONFIG);
+
+	/* set USB2_ONLY mode if requested */
+	reg = cdns_ti_readl(data, USBSS_W1);
+	data->usb2_only = dev_read_bool(dev, "ti,usb2-only");
+	if (data->usb2_only)
+		reg |= USBSS_W1_USB2_ONLY;
+
+	/* set modestrap  */
+	if (dev_read_bool(dev, "ti,modestrap-host"))
+		modestrap_mode = USBSS_MODESTRAP_MODE_HOST;
+	else if (dev_read_bool(dev, "ti,modestrap-peripheral"))
+		modestrap_mode = USBSS_MODESTRAP_MODE_PERIPHERAL;
+	else
+		modestrap_mode = USBSS_MODESTRAP_MODE_NONE;
+
+	reg |= USBSS_W1_MODESTRAP_SEL;
+	reg &= ~USBSS_W1_MODESTRAP_MASK;
+	reg |= modestrap_mode << USBSS_W1_MODESTRAP_SHIFT;
+	cdns_ti_writel(data, USBSS_W1, reg);
+
+	/* de-assert RESET */
+	reg |= USBSS_W1_PWRUP_RST;
+	cdns_ti_writel(data, USBSS_W1, reg);
+
+	return 0;
+}
+
+static int cdns_ti_remove(struct udevice *dev)
+{
+	struct cdns_ti *data = dev_get_platdata(dev);
+	u32 reg;
+
+	/* put device back to RESET*/
+	reg = cdns_ti_readl(data, USBSS_W1);
+	reg &= ~USBSS_W1_PWRUP_RST;
+	cdns_ti_writel(data, USBSS_W1, reg);
+
+	return 0;
+}
+
+static const struct udevice_id cdns_ti_of_match[] = {
+	{ .compatible = "ti,j721e-usb", },
+	{},
+};
+
+U_BOOT_DRIVER(cdns_ti) = {
+	.name = "cdns-ti",
+	.id = UCLASS_NOP,
+	.of_match = cdns_ti_of_match,
+	.bind = cdns3_bind,
+	.probe = cdns_ti_probe,
+	.remove = cdns_ti_remove,
+	.platdata_auto_alloc_size = sizeof(struct cdns_ti),
+	.flags = DM_FLAG_OS_PREPARE,
+};

commit 5fac2ed3c96444c8c2b384311264c18f66aa3082
Author: Vignesh Raghavendra <vigneshr@ti.com>
Date:   Tue Oct 1 17:26:34 2019 +0530

    UPSTREAM: usb: cdns3: gadget: Implement udc_set_speed() callback
    
    Implement udc_set_speed() callback to limit Controller's speed to
    high-speed/full-speed when working with gadgets that are high-speed or
    full-speed only
    
    Change-Id: Iee46beaf6336dc974597b3163287344c4bda2771
    Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 927c22b0dae7ee9e3e89d8be6393b030371cb842)

diff --git a/drivers/usb/cdns3/gadget.c b/drivers/usb/cdns3/gadget.c
index a4debb0ddf..0e02b77965 100644
--- a/drivers/usb/cdns3/gadget.c
+++ b/drivers/usb/cdns3/gadget.c
@@ -2378,6 +2378,29 @@ static int cdns3_gadget_udc_stop(struct usb_gadget *gadget)
 	return ret;
 }
 
+static void cdns3_gadget_udc_set_speed(struct usb_gadget *gadget,
+				       enum usb_device_speed speed)
+{
+	struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
+
+	switch (speed) {
+	case USB_SPEED_FULL:
+		writel(USB_CONF_SFORCE_FS, &priv_dev->regs->usb_conf);
+		writel(USB_CONF_USB3DIS, &priv_dev->regs->usb_conf);
+		break;
+	case USB_SPEED_HIGH:
+		writel(USB_CONF_USB3DIS, &priv_dev->regs->usb_conf);
+		break;
+	case USB_SPEED_SUPER:
+		break;
+	default:
+		dev_err(cdns->dev, "invalid speed parameter %d\n",
+			speed);
+	}
+
+	priv_dev->gadget.speed = speed;
+}
+
 static const struct usb_gadget_ops cdns3_gadget_ops = {
 	.get_frame = cdns3_gadget_get_frame,
 	.wakeup = cdns3_gadget_wakeup,
@@ -2386,6 +2409,7 @@ static const struct usb_gadget_ops cdns3_gadget_ops = {
 	.udc_start = cdns3_gadget_udc_start,
 	.udc_stop = cdns3_gadget_udc_stop,
 	.match_ep = cdns3_gadget_match_ep,
+	.udc_set_speed = cdns3_gadget_udc_set_speed,
 };
 
 static void cdns3_free_all_eps(struct cdns3_device *priv_dev)
@@ -2557,11 +2581,9 @@ static int cdns3_gadget_start(struct cdns3 *cdns)
 	/* Check the maximum_speed parameter */
 	switch (max_speed) {
 	case USB_SPEED_FULL:
-		writel(USB_CONF_SFORCE_FS, &priv_dev->regs->usb_conf);
-		break;
+		/* fall through */
 	case USB_SPEED_HIGH:
-		writel(USB_CONF_USB3DIS, &priv_dev->regs->usb_conf);
-		break;
+		/* fall through */
 	case USB_SPEED_SUPER:
 		break;
 	default:

commit f6ce6072be71a99f76b5c32d3c202f9330d66da6
Author: Vignesh Raghavendra <vigneshr@ti.com>
Date:   Tue Oct 1 17:26:33 2019 +0530

    UPSTREAM: usb: Add Cadence USB3 host and gadget driver
    
    Add support for USB3 host and gadget driver. This is a direct sync of
    Linux kernel Cadence USB stack that from v5.4-rc1 release.
    Driver has been modified so that it compiles without errors against
    U-Boot code base.
    Features not required for U-Boot such as scatter-gather DMA and OTG
    interrupt handling has been dropped.
    
    Change-Id: I168e032f35d259ad1bb7a7f9f3c066bd13f129d4
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    [jjhiblot@ti.com: Add PHY support]
    Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 7e91f6ccdc84fe5952e5c26769e65d12e5fc4733)

diff --git a/Makefile b/Makefile
index b9473f7495..3a77384600 100644
--- a/Makefile
+++ b/Makefile
@@ -682,6 +682,7 @@ libs-$(CONFIG_SYS_FSL_DDR) += drivers/ddr/fsl/
 libs-$(CONFIG_SYS_FSL_MMDC) += drivers/ddr/fsl/
 libs-$(CONFIG_ALTERA_SDRAM) += drivers/ddr/altera/
 libs-y += drivers/serial/
+libs-y += drivers/usb/cdns3/
 libs-y += drivers/usb/dwc3/
 libs-y += drivers/usb/common/
 libs-y += drivers/usb/emul/
diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig
index 9181729759..c1019d17dd 100644
--- a/drivers/usb/Kconfig
+++ b/drivers/usb/Kconfig
@@ -68,6 +68,8 @@ config SPL_DM_USB_GADGET
 
 source "drivers/usb/host/Kconfig"
 
+source "drivers/usb/cdns3/Kconfig"
+
 source "drivers/usb/dwc3/Kconfig"
 
 source "drivers/usb/musb-new/Kconfig"
diff --git a/drivers/usb/cdns3/Kconfig b/drivers/usb/cdns3/Kconfig
new file mode 100644
index 0000000000..25c0f103e7
--- /dev/null
+++ b/drivers/usb/cdns3/Kconfig
@@ -0,0 +1,51 @@
+config USB_CDNS3
+	tristate "Cadence USB3 Dual-Role Controller"
+	depends on USB_HOST || USB_GADGET
+	help
+	  Say Y here if your system has a Cadence USB3 dual-role controller.
+	  It supports: Host-only, and Peripheral-only.
+
+if USB_CDNS3
+
+config USB_CDNS3_GADGET
+	bool "Cadence USB3 device controller"
+	depends on USB_GADGET
+	select USB_GADGET_DUALSPEED
+	help
+	  Say Y here to enable device controller functionality of the
+	  Cadence USBSS-DEV driver.
+
+	  This controller supports FF and HS mode. It doesn't support
+	  LS and SSP mode.
+
+config USB_CDNS3_HOST
+	bool "Cadence USB3 host controller"
+	depends on USB_XHCI_HCD
+	help
+	  Say Y here to enable host controller functionality of the
+	  Cadence driver.
+
+	  Host controller is compliant with XHCI so it will use
+	  standard XHCI driver.
+
+config SPL_USB_CDNS3_GADGET
+	bool "SPL support for Cadence USB3 device controller"
+	depends on SPL_USB_GADGET
+	select USB_GADGET_DUALSPEED
+	help
+	  Say Y here to enable device controller functionality of the
+	  Cadence USBSS-DEV driver in SPL.
+
+	  This controller supports FF and HS mode. It doesn't support
+	  LS and SSP mode.
+
+config SPL_USB_CDNS3_HOST
+	bool "Cadence USB3 host controller"
+	depends on USB_XHCI_HCD && SPL_USB_HOST_SUPPORT
+	help
+	  Say Y here to enable host controller functionality of the
+	  Cadence driver.
+
+	  Host controller is compliant with XHCI so it will use
+	  standard XHCI driver.
+endif
diff --git a/drivers/usb/cdns3/Makefile b/drivers/usb/cdns3/Makefile
new file mode 100644
index 0000000000..525477954d
--- /dev/null
+++ b/drivers/usb/cdns3/Makefile
@@ -0,0 +1,9 @@
+# SPDX-License-Identifier: GPL-2.0
+
+cdns3-y					:= core.o drd.o
+
+obj-$(CONFIG_USB_CDNS3)			+= cdns3.o
+
+cdns3-$(CONFIG_$(SPL_)USB_CDNS3_GADGET)	+= gadget.o ep0.o
+
+cdns3-$(CONFIG_$(SPL_)USB_CDNS3_HOST)	+= host.o
diff --git a/drivers/usb/cdns3/core.c b/drivers/usb/cdns3/core.c
new file mode 100644
index 0000000000..f1e4bb6278
--- /dev/null
+++ b/drivers/usb/cdns3/core.c
@@ -0,0 +1,498 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Cadence USBSS DRD Driver.
+ *
+ * Copyright (C) 2018-2019 Cadence.
+ * Copyright (C) 2017-2018 NXP
+ * Copyright (C) 2019 Texas Instruments
+ *
+ * Author: Peter Chen <peter.chen@nxp.com>
+ *         Pawel Laszczak <pawell@cadence.com>
+ *         Roger Quadros <rogerq@ti.com>
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/device-internal.h>
+#include <dm/lists.h>
+#include <linux/kernel.h>
+#include <linux/io.h>
+#include <usb.h>
+#include "../host/xhci.h"
+
+#include "core.h"
+#include "host-export.h"
+#include "gadget-export.h"
+#include "drd.h"
+
+static int cdns3_idle_init(struct cdns3 *cdns);
+
+struct cdns3_host_priv {
+	struct xhci_ctrl xhci_ctrl;
+	struct cdns3 cdns;
+};
+
+struct cdns3_gadget_priv {
+	struct cdns3 cdns;
+};
+
+static inline
+struct cdns3_role_driver *cdns3_get_current_role_driver(struct cdns3 *cdns)
+{
+	WARN_ON(!cdns->roles[cdns->role]);
+	return cdns->roles[cdns->role];
+}
+
+static int cdns3_role_start(struct cdns3 *cdns, enum usb_role role)
+{
+	int ret;
+
+	if (WARN_ON(role > USB_ROLE_DEVICE))
+		return 0;
+
+	mutex_lock(&cdns->mutex);
+	cdns->role = role;
+	mutex_unlock(&cdns->mutex);
+
+	if (!cdns->roles[role])
+		return -ENXIO;
+
+	if (cdns->roles[role]->state == CDNS3_ROLE_STATE_ACTIVE)
+		return 0;
+
+	mutex_lock(&cdns->mutex);
+	ret = cdns->roles[role]->start(cdns);
+	if (!ret)
+		cdns->roles[role]->state = CDNS3_ROLE_STATE_ACTIVE;
+	mutex_unlock(&cdns->mutex);
+
+	return ret;
+}
+
+static void cdns3_role_stop(struct cdns3 *cdns)
+{
+	enum usb_role role = cdns->role;
+
+	if (WARN_ON(role > USB_ROLE_DEVICE))
+		return;
+
+	if (cdns->roles[role]->state == CDNS3_ROLE_STATE_INACTIVE)
+		return;
+
+	mutex_lock(&cdns->mutex);
+	cdns->roles[role]->stop(cdns);
+	cdns->roles[role]->state = CDNS3_ROLE_STATE_INACTIVE;
+	mutex_unlock(&cdns->mutex);
+}
+
+static void cdns3_exit_roles(struct cdns3 *cdns)
+{
+	cdns3_role_stop(cdns);
+	cdns3_drd_exit(cdns);
+}
+
+static enum usb_role cdsn3_hw_role_state_machine(struct cdns3 *cdns);
+
+/**
+ * cdns3_core_init_role - initialize role of operation
+ * @cdns: Pointer to cdns3 structure
+ *
+ * Returns 0 on success otherwise negative errno
+ */
+static int cdns3_core_init_role(struct cdns3 *cdns)
+{
+	struct udevice *dev = cdns->dev;
+	enum usb_dr_mode best_dr_mode;
+	enum usb_dr_mode dr_mode;
+	int ret = 0;
+
+	dr_mode = usb_get_dr_mode(dev_of_offset(dev));
+	cdns->role = USB_ROLE_NONE;
+
+	/*
+	 * If driver can't read mode by means of usb_get_dr_mode function then
+	 * chooses mode according with Kernel configuration. This setting
+	 * can be restricted later depending on strap pin configuration.
+	 */
+	if (dr_mode == USB_DR_MODE_UNKNOWN) {
+		if (IS_ENABLED(CONFIG_USB_CDNS3_HOST) &&
+		    IS_ENABLED(CONFIG_USB_CDNS3_GADGET))
+			dr_mode = USB_DR_MODE_OTG;
+		else if (IS_ENABLED(CONFIG_USB_CDNS3_HOST))
+			dr_mode = USB_DR_MODE_HOST;
+		else if (IS_ENABLED(CONFIG_USB_CDNS3_GADGET))
+			dr_mode = USB_DR_MODE_PERIPHERAL;
+	}
+
+	/*
+	 * At this point cdns->dr_mode contains strap configuration.
+	 * Driver try update this setting considering kernel configuration
+	 */
+	best_dr_mode = cdns->dr_mode;
+
+	ret = cdns3_idle_init(cdns);
+	if (ret)
+		return ret;
+
+	if (dr_mode == USB_DR_MODE_OTG) {
+		best_dr_mode = cdns->dr_mode;
+	} else if (cdns->dr_mode == USB_DR_MODE_OTG) {
+		best_dr_mode = dr_mode;
+	} else if (cdns->dr_mode != dr_mode) {
+		dev_err(dev, "Incorrect DRD configuration\n");
+		return -EINVAL;
+	}
+
+	dr_mode = best_dr_mode;
+
+#if defined(CONFIG_SPL_USB_HOST_SUPPORT) || !defined(CONFIG_SPL_BUILD)
+	if (dr_mode == USB_DR_MODE_OTG || dr_mode == USB_DR_MODE_HOST) {
+		ret = cdns3_host_init(cdns);
+		if (ret) {
+			dev_err(dev, "Host initialization failed with %d\n",
+				ret);
+			goto err;
+		}
+	}
+#endif
+
+#if CONFIG_IS_ENABLED(DM_USB_GADGET)
+	if (dr_mode == USB_DR_MODE_OTG || dr_mode == USB_DR_MODE_PERIPHERAL) {
+		ret = cdns3_gadget_init(cdns);
+		if (ret) {
+			dev_err(dev, "Device initialization failed with %d\n",
+				ret);
+			goto err;
+		}
+	}
+#endif
+
+	cdns->dr_mode = dr_mode;
+
+	ret = cdns3_drd_update_mode(cdns);
+	if (ret)
+		goto err;
+
+	if (cdns->dr_mode != USB_DR_MODE_OTG) {
+		ret = cdns3_hw_role_switch(cdns);
+		if (ret)
+			goto err;
+	}
+
+	return ret;
+err:
+	cdns3_exit_roles(cdns);
+	return ret;
+}
+
+/**
+ * cdsn3_hw_role_state_machine - role switch state machine based on hw events
+ * @cdns: Pointer to controller structure.
+ *
+ * Returns next role to be entered based on hw events.
+ */
+static enum usb_role cdsn3_hw_role_state_machine(struct cdns3 *cdns)
+{
+	enum usb_role role;
+	int id, vbus;
+
+	if (cdns->dr_mode != USB_DR_MODE_OTG)
+		goto not_otg;
+
+	id = cdns3_get_id(cdns);
+	vbus = cdns3_get_vbus(cdns);
+
+	/*
+	 * Role change state machine
+	 * Inputs: ID, VBUS
+	 * Previous state: cdns->role
+	 * Next state: role
+	 */
+	role = cdns->role;
+
+	switch (role) {
+	case USB_ROLE_NONE:
+		/*
+		 * Driver treats USB_ROLE_NONE synonymous to IDLE state from
+		 * controller specification.
+		 */
+		if (!id)
+			role = USB_ROLE_HOST;
+		else if (vbus)
+			role = USB_ROLE_DEVICE;
+		break;
+	case USB_ROLE_HOST: /* from HOST, we can only change to NONE */
+		if (id)
+			role = USB_ROLE_NONE;
+		break;
+	case USB_ROLE_DEVICE: /* from GADGET, we can only change to NONE*/
+		if (!vbus)
+			role = USB_ROLE_NONE;
+		break;
+	}
+
+	dev_dbg(cdns->dev, "role %d -> %d\n", cdns->role, role);
+
+	return role;
+
+not_otg:
+	if (cdns3_is_host(cdns))
+		role = USB_ROLE_HOST;
+	if (cdns3_is_device(cdns))
+		role = USB_ROLE_DEVICE;
+
+	return role;
+}
+
+static int cdns3_idle_role_start(struct cdns3 *cdns)
+{
+	return 0;
+}
+
+static void cdns3_idle_role_stop(struct cdns3 *cdns)
+{
+	/* Program Lane swap and bring PHY out of RESET */
+	generic_phy_reset(&cdns->usb3_phy);
+}
+
+static int cdns3_idle_init(struct cdns3 *cdns)
+{
+	struct cdns3_role_driver *rdrv;
+
+	rdrv = devm_kzalloc(cdns->dev, sizeof(*rdrv), GFP_KERNEL);
+	if (!rdrv)
+		return -ENOMEM;
+
+	rdrv->start = cdns3_idle_role_start;
+	rdrv->stop = cdns3_idle_role_stop;
+	rdrv->state = CDNS3_ROLE_STATE_INACTIVE;
+	rdrv->suspend = NULL;
+	rdrv->resume = NULL;
+	rdrv->name = "idle";
+
+	cdns->roles[USB_ROLE_NONE] = rdrv;
+
+	return 0;
+}
+
+/**
+ * cdns3_hw_role_switch - switch roles based on HW state
+ * @cdns3: controller
+ */
+int cdns3_hw_role_switch(struct cdns3 *cdns)
+{
+	enum usb_role real_role, current_role;
+	int ret = 0;
+
+	/* Do nothing if role based on syfs. */
+	if (cdns->role_override)
+		return 0;
+
+	current_role = cdns->role;
+	real_role = cdsn3_hw_role_state_machine(cdns);
+
+	/* Do nothing if nothing changed */
+	if (current_role == real_role)
+		goto exit;
+
+	cdns3_role_stop(cdns);
+
+	dev_dbg(cdns->dev, "Switching role %d -> %d", current_role, real_role);
+
+	ret = cdns3_role_start(cdns, real_role);
+	if (ret) {
+		/* Back to current role */
+		dev_err(cdns->dev, "set %d has failed, back to %d\n",
+			real_role, current_role);
+		ret = cdns3_role_start(cdns, current_role);
+		if (ret)
+			dev_err(cdns->dev, "back to %d failed too\n",
+				current_role);
+	}
+exit:
+	return ret;
+}
+
+static int cdns3_probe(struct cdns3 *cdns)
+{
+	struct udevice *dev = cdns->dev;
+	int ret;
+
+	cdns->xhci_regs = dev_remap_addr_name(dev, "xhci");
+	if (!cdns->xhci_regs)
+		return -EINVAL;
+
+	cdns->dev_regs = dev_remap_addr_name(dev, "dev");
+	if (!cdns->dev_regs)
+		return -EINVAL;
+
+	mutex_init(&cdns->mutex);
+
+	ret = generic_phy_get_by_name(dev, "cdns3,usb2-phy", &cdns->usb2_phy);
+	if (ret)
+		dev_warn(dev, "Unable to get USB2 phy (ret %d)\n", ret);
+
+	ret = generic_phy_init(&cdns->usb2_phy);
+	if (ret)
+		return ret;
+
+	ret = generic_phy_get_by_name(dev, "cdns3,usb3-phy", &cdns->usb3_phy);
+	if (ret)
+		dev_warn(dev, "Unable to get USB3 phy (ret %d)\n", ret);
+
+	ret = generic_phy_init(&cdns->usb3_phy);
+	if (ret)
+		return ret;
+
+	ret = generic_phy_power_on(&cdns->usb2_phy);
+	if (ret)
+		return ret;
+
+	ret = generic_phy_power_on(&cdns->usb3_phy);
+	if (ret)
+		return ret;
+
+	ret = cdns3_drd_init(cdns);
+	if (ret)
+		return ret;
+
+	ret = cdns3_core_init_role(cdns);
+	if (ret)
+		return ret;
+
+	dev_dbg(dev, "Cadence USB3 core: probe succeed\n");
+
+	return 0;
+}
+
+static int cdns3_remove(struct cdns3 *cdns)
+{
+	cdns3_exit_roles(cdns);
+	generic_phy_power_off(&cdns->usb2_phy);
+	generic_phy_power_off(&cdns->usb3_phy);
+	generic_phy_exit(&cdns->usb2_phy);
+	generic_phy_exit(&cdns->usb3_phy);
+	return 0;
+}
+
+static const struct udevice_id cdns3_ids[] = {
+	{ .compatible = "cdns,usb3" },
+	{ },
+};
+
+int cdns3_bind(struct udevice *parent)
+{
+	int from = dev_of_offset(parent);
+	const void *fdt = gd->fdt_blob;
+	enum usb_dr_mode dr_mode;
+	struct udevice *dev;
+	const char *driver;
+	const char *name;
+	int node;
+	int ret;
+
+	node = fdt_node_offset_by_compatible(fdt, from, "cdns,usb3");
+	if (node < 0) {
+		ret = -ENODEV;
+		goto fail;
+	}
+
+	name = fdt_get_name(fdt, node, NULL);
+	dr_mode = usb_get_dr_mode(node);
+
+	switch (dr_mode) {
+#if defined(CONFIG_SPL_USB_HOST_SUPPORT) || \
+	(!defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_HOST))
+	case USB_DR_MODE_HOST:
+		debug("%s: dr_mode: HOST\n", __func__);
+		driver = "cdns-usb3-host";
+		break;
+#endif
+#if CONFIG_IS_ENABLED(DM_USB_GADGET)
+	case USB_DR_MODE_PERIPHERAL:
+		debug("%s: dr_mode: PERIPHERAL\n", __func__);
+		driver = "cdns-usb3-peripheral";
+		break;
+#endif
+	default:
+		printf("%s: unsupported dr_mode\n", __func__);
+		ret = -ENODEV;
+		goto fail;
+	};
+
+	ret = device_bind_driver_to_node(parent, driver, name,
+					 offset_to_ofnode(node), &dev);
+	if (ret) {
+		printf("%s: not able to bind usb device mode\n",
+		       __func__);
+		goto fail;
+	}
+
+	return 0;
+
+fail:
+	/* do not return an error: failing to bind would hang the board */
+	return 0;
+}
+
+#if CONFIG_IS_ENABLED(DM_USB_GADGET)
+static int cdns3_gadget_probe(struct udevice *dev)
+{
+	struct cdns3_gadget_priv *priv = dev_get_priv(dev);
+	struct cdns3 *cdns = &priv->cdns;
+
+	cdns->dev = dev;
+
+	return cdns3_probe(cdns);
+}
+
+static int cdns3_gadget_remove(struct udevice *dev)
+{
+	struct cdns3_gadget_priv *priv = dev_get_priv(dev);
+	struct cdns3 *cdns = &priv->cdns;
+
+	return cdns3_remove(cdns);
+}
+
+U_BOOT_DRIVER(cdns_usb3_peripheral) = {
+	.name	= "cdns-usb3-peripheral",
+	.id	= UCLASS_USB_GADGET_GENERIC,
+	.of_match = cdns3_ids,
+	.probe = cdns3_gadget_probe,
+	.remove = cdns3_gadget_remove,
+	.priv_auto_alloc_size = sizeof(struct cdns3_gadget_priv),
+	.flags = DM_FLAG_ALLOC_PRIV_DMA,
+};
+#endif
+
+#if defined(CONFIG_SPL_USB_HOST_SUPPORT) || \
+	(!defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_HOST))
+static int cdns3_host_probe(struct udevice *dev)
+{
+	struct cdns3_host_priv *priv = dev_get_priv(dev);
+	struct cdns3 *cdns = &priv->cdns;
+
+	cdns->dev = dev;
+
+	return cdns3_probe(cdns);
+}
+
+static int cdns3_host_remove(struct udevice *dev)
+{
+	struct cdns3_host_priv *priv = dev_get_priv(dev);
+	struct cdns3 *cdns = &priv->cdns;
+
+	return cdns3_remove(cdns);
+}
+
+U_BOOT_DRIVER(cdns_usb3_host) = {
+	.name	= "cdns-usb3-host",
+	.id	= UCLASS_USB,
+	.of_match = cdns3_ids,
+	.probe = cdns3_host_probe,
+	.remove = cdns3_host_remove,
+	.priv_auto_alloc_size = sizeof(struct cdns3_host_priv),
+	.ops = &xhci_usb_ops,
+	.flags = DM_FLAG_ALLOC_PRIV_DMA,
+};
+#endif
diff --git a/drivers/usb/cdns3/core.h b/drivers/usb/cdns3/core.h
new file mode 100644
index 0000000000..0668d646fc
--- /dev/null
+++ b/drivers/usb/cdns3/core.h
@@ -0,0 +1,108 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Cadence USBSS DRD Header File.
+ *
+ * Copyright (C) 2017-2018 NXP
+ * Copyright (C) 2018-2019 Cadence.
+ *
+ * Authors: Peter Chen <peter.chen@nxp.com>
+ *          Pawel Laszczak <pawell@cadence.com>
+ */
+#include <linux/compiler.h>
+#include <linux/types.h>
+#include <linux/usb/otg.h>
+#include <generic-phy.h>
+
+#ifndef __LINUX_CDNS3_CORE_H
+#define __LINUX_CDNS3_CORE_H
+
+enum usb_role {
+	USB_ROLE_NONE,
+	USB_ROLE_HOST,
+	USB_ROLE_DEVICE,
+};
+
+struct cdns3;
+
+/**
+ * struct cdns3_role_driver - host/gadget role driver
+ * @start: start this role
+ * @stop: stop this role
+ * @suspend: suspend callback for this role
+ * @resume: resume callback for this role
+ * @irq: irq handler for this role
+ * @name: role name string (host/gadget)
+ * @state: current state
+ */
+struct cdns3_role_driver {
+	int (*start)(struct cdns3 *cdns);
+	void (*stop)(struct cdns3 *cdns);
+	int (*suspend)(struct cdns3 *cdns, bool do_wakeup);
+	int (*resume)(struct cdns3 *cdns, bool hibernated);
+	const char *name;
+#define CDNS3_ROLE_STATE_INACTIVE	0
+#define CDNS3_ROLE_STATE_ACTIVE		1
+	int state;
+};
+
+#define CDNS3_XHCI_RESOURCES_NUM	2
+/**
+ * struct cdns3 - Representation of Cadence USB3 DRD controller.
+ * @dev: pointer to Cadence device struct
+ * @xhci_regs: pointer to base of xhci registers
+ * @dev_regs: pointer to base of dev registers
+ * @otg_v0_regs: pointer to base of v0 otg registers
+ * @otg_v1_regs: pointer to base of v1 otg registers
+ * @otg_regs: pointer to base of otg registers
+ * @otg_irq: irq number for otg controller
+ * @dev_irq: irq number for device controller
+ * @roles: array of supported roles for this controller
+ * @role: current role
+ * @host_dev: the child host device pointer for cdns3 core
+ * @gadget_dev: the child gadget device pointer for cdns3 core
+ * @usb2_phy: pointer to USB2 PHY
+ * @usb3_phy: pointer to USB3 PHY
+ * @mutex: the mutex for concurrent code at driver
+ * @dr_mode: supported mode of operation it can be only Host, only Device
+ *           or OTG mode that allow to switch between Device and Host mode.
+ *           This field based on firmware setting, kernel configuration
+ *           and hardware configuration.
+ * @role_sw: pointer to role switch object.
+ * @role_override: set 1 if role rely on SW.
+ */
+struct cdns3 {
+	struct udevice			*dev;
+	void __iomem			*xhci_regs;
+	struct cdns3_usb_regs __iomem	*dev_regs;
+
+	struct cdns3_otg_legacy_regs	*otg_v0_regs;
+	struct cdns3_otg_regs		*otg_v1_regs;
+	struct cdns3_otg_common_regs	*otg_regs;
+#define CDNS3_CONTROLLER_V0	0
+#define CDNS3_CONTROLLER_V1	1
+	u32				version;
+
+	int				otg_irq;
+	int				dev_irq;
+	struct cdns3_role_driver	*roles[USB_ROLE_DEVICE + 1];
+	enum usb_role			role;
+	struct cdns3_device		*gadget_dev;
+	struct phy			usb2_phy;
+	struct phy			usb3_phy;
+	/* mutext used in workqueue*/
+	struct mutex			mutex;
+	enum usb_dr_mode		dr_mode;
+	int				role_override;
+};
+
+int cdns3_hw_role_switch(struct cdns3 *cdns);
+
+/**
+ * cdns3_bind - generic bind function
+ * @parent - pointer to parent udevice of which cdns3 USB controller
+ *           node is child of
+ *
+ * return 0 on success, negative errno otherwise
+ */
+int cdns3_bind(struct udevice *dev);
+#endif /* __LINUX_CDNS3_CORE_H */
diff --git a/drivers/usb/cdns3/debug.h b/drivers/usb/cdns3/debug.h
new file mode 100644
index 0000000000..0b4673a3a6
--- /dev/null
+++ b/drivers/usb/cdns3/debug.h
@@ -0,0 +1,162 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Cadence USBSS DRD Driver.
+ * Debug header file.
+ *
+ * Copyright (C) 2018-2019 Cadence.
+ *
+ * Author: Pawel Laszczak <pawell@cadence.com>
+ */
+#ifndef __LINUX_CDNS3_DEBUG
+#define __LINUX_CDNS3_DEBUG
+
+#include "core.h"
+#include "gadget.h"
+
+static inline char *cdns3_decode_usb_irq(char *str,
+					 enum usb_device_speed speed,
+					 u32 usb_ists)
+{
+	int ret;
+
+	ret = sprintf(str, "IRQ %08x = ", usb_ists);
+
+	if (usb_ists & (USB_ISTS_CON2I | USB_ISTS_CONI)) {
+		ret += sprintf(str + ret, "Connection %s\n",
+			       usb_speed_string(speed));
+	}
+	if (usb_ists & USB_ISTS_DIS2I || usb_ists & USB_ISTS_DISI)
+		ret += sprintf(str + ret, "Disconnection ");
+	if (usb_ists & USB_ISTS_L2ENTI)
+		ret += sprintf(str + ret, "suspended ");
+	if (usb_ists & USB_ISTS_L1ENTI)
+		ret += sprintf(str + ret, "L1 enter ");
+	if (usb_ists & USB_ISTS_L1EXTI)
+		ret += sprintf(str + ret, "L1 exit ");
+	if (usb_ists & USB_ISTS_L2ENTI)
+		ret += sprintf(str + ret, "L2 enter ");
+	if (usb_ists & USB_ISTS_L2EXTI)
+		ret += sprintf(str + ret, "L2 exit ");
+	if (usb_ists & USB_ISTS_U3EXTI)
+		ret += sprintf(str + ret, "U3 exit ");
+	if (usb_ists & USB_ISTS_UWRESI)
+		ret += sprintf(str + ret, "Warm Reset ");
+	if (usb_ists & USB_ISTS_UHRESI)
+		ret += sprintf(str + ret, "Hot Reset ");
+	if (usb_ists & USB_ISTS_U2RESI)
+		ret += sprintf(str + ret, "Reset");
+
+	return str;
+}
+
+static inline  char *cdns3_decode_ep_irq(char *str,
+					 u32 ep_sts,
+					 const char *ep_name)
+{
+	int ret;
+
+	ret = sprintf(str, "IRQ for %s: %08x ", ep_name, ep_sts);
+
+	if (ep_sts & EP_STS_SETUP)
+		ret += sprintf(str + ret, "SETUP ");
+	if (ep_sts & EP_STS_IOC)
+		ret += sprintf(str + ret, "IOC ");
+	if (ep_sts & EP_STS_ISP)
+		ret += sprintf(str + ret, "ISP ");
+	if (ep_sts & EP_STS_DESCMIS)
+		ret += sprintf(str + ret, "DESCMIS ");
+	if (ep_sts & EP_STS_STREAMR)
+		ret += sprintf(str + ret, "STREAMR ");
+	if (ep_sts & EP_STS_MD_EXIT)
+		ret += sprintf(str + ret, "MD_EXIT ");
+	if (ep_sts & EP_STS_TRBERR)
+		ret += sprintf(str + ret, "TRBERR ");
+	if (ep_sts & EP_STS_NRDY)
+		ret += sprintf(str + ret, "NRDY ");
+	if (ep_sts & EP_STS_PRIME)
+		ret += sprintf(str + ret, "PRIME ");
+	if (ep_sts & EP_STS_SIDERR)
+		ret += sprintf(str + ret, "SIDERRT ");
+	if (ep_sts & EP_STS_OUTSMM)
+		ret += sprintf(str + ret, "OUTSMM ");
+	if (ep_sts & EP_STS_ISOERR)
+		ret += sprintf(str + ret, "ISOERR ");
+	if (ep_sts & EP_STS_IOT)
+		ret += sprintf(str + ret, "IOT ");
+
+	return str;
+}
+
+static inline char *cdns3_decode_epx_irq(char *str,
+					 char *ep_name,
+					 u32 ep_sts)
+{
+	return cdns3_decode_ep_irq(str, ep_sts, ep_name);
+}
+
+static inline char *cdns3_decode_ep0_irq(char *str,
+					 int dir,
+					 u32 ep_sts)
+{
+	return cdns3_decode_ep_irq(str, ep_sts,
+				   dir ? "ep0IN" : "ep0OUT");
+}
+
+/**
+ * Debug a transfer ring.
+ *
+ * Prints out all TRBs in the endpoint ring, even those after the Link TRB.
+ *.
+ */
+static inline char *cdns3_dbg_ring(struct cdns3_endpoint *priv_ep,
+				   struct cdns3_trb *ring, char *str)
+{
+	dma_addr_t addr = priv_ep->trb_pool_dma;
+	struct cdns3_trb *trb;
+	int trb_per_sector;
+	int ret = 0;
+	int i;
+
+	trb_per_sector = GET_TRBS_PER_SEGMENT(priv_ep->type);
+
+	trb = &priv_ep->trb_pool[priv_ep->dequeue];
+	ret += sprintf(str + ret, "\n\t\tRing contents for %s:", priv_ep->name);
+
+	ret += sprintf(str + ret,
+		       "\n\t\tRing deq index: %d, trb: %p (virt), 0x%llx (dma)\n",
+		       priv_ep->dequeue, trb,
+		       (unsigned long long)cdns3_trb_virt_to_dma(priv_ep, trb));
+
+	trb = &priv_ep->trb_pool[priv_ep->enqueue];
+	ret += sprintf(str + ret,
+		       "\t\tRing enq index: %d, trb: %p (virt), 0x%llx (dma)\n",
+		       priv_ep->enqueue, trb,
+		       (unsigned long long)cdns3_trb_virt_to_dma(priv_ep, trb));
+
+	ret += sprintf(str + ret,
+		       "\t\tfree trbs: %d, CCS=%d, PCS=%d\n",
+		       priv_ep->free_trbs, priv_ep->ccs, priv_ep->pcs);
+
+	if (trb_per_sector > TRBS_PER_SEGMENT)
+		trb_per_sector = TRBS_PER_SEGMENT;
+
+	if (trb_per_sector > TRBS_PER_SEGMENT) {
+		sprintf(str + ret, "\t\tTo big transfer ring %d\n",
+			trb_per_sector);
+		return str;
+	}
+
+	for (i = 0; i < trb_per_sector; ++i) {
+		trb = &ring[i];
+		ret += sprintf(str + ret,
+			"\t\t@%pad %08x %08x %08x\n", &addr,
+			le32_to_cpu(trb->buffer),
+			le32_to_cpu(trb->length),
+			le32_to_cpu(trb->control));
+		addr += sizeof(*trb);
+	}
+
+	return str;
+}
+
+#endif /*__LINUX_CDNS3_DEBUG*/
diff --git a/drivers/usb/cdns3/drd.c b/drivers/usb/cdns3/drd.c
new file mode 100644
index 0000000000..13eb4899d4
--- /dev/null
+++ b/drivers/usb/cdns3/drd.c
@@ -0,0 +1,301 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Cadence USBSS DRD Driver.
+ *
+ * Copyright (C) 2018-2019 Cadence.
+ * Copyright (C) 2019 Texas Instruments
+ *
+ * Author: Pawel Laszczak <pawell@cadence.com>
+ *         Roger Quadros <rogerq@ti.com>
+ *
+ *
+ */
+#include <dm.h>
+#include <linux/delay.h>
+#include <linux/iopoll.h>
+#include <linux/kernel.h>
+#include <linux/usb/otg.h>
+
+#include "gadget.h"
+#include "drd.h"
+#include "core.h"
+
+#define readl_poll_timeout_atomic readl_poll_timeout
+#define usleep_range(a, b) udelay((b))
+/**
+ * cdns3_set_mode - change mode of OTG Core
+ * @cdns: pointer to context structure
+ * @mode: selected mode from cdns_role
+ *
+ * Returns 0 on success otherwise negative errno
+ */
+int cdns3_set_mode(struct cdns3 *cdns, enum usb_dr_mode mode)
+{
+	int ret = 0;
+	u32 reg;
+
+	switch (mode) {
+	case USB_DR_MODE_PERIPHERAL:
+		break;
+	case USB_DR_MODE_HOST:
+		break;
+	case USB_DR_MODE_OTG:
+		dev_dbg(cdns->dev, "Set controller to OTG mode\n");
+		if (cdns->version == CDNS3_CONTROLLER_V1) {
+			reg = readl(&cdns->otg_v1_regs->override);
+			reg |= OVERRIDE_IDPULLUP;
+			writel(reg, &cdns->otg_v1_regs->override);
+		} else {
+			reg = readl(&cdns->otg_v0_regs->ctrl1);
+			reg |= OVERRIDE_IDPULLUP_V0;
+			writel(reg, &cdns->otg_v0_regs->ctrl1);
+		}
+
+		/*
+		 * Hardware specification says: "ID_VALUE must be valid within
+		 * 50ms after idpullup is set to '1" so driver must wait
+		 * 50ms before reading this pin.
+		 */
+		usleep_range(50000, 60000);
+		break;
+	default:
+		dev_err(cdns->dev, "Unsupported mode of operation %d\n", mode);
+		return -EINVAL;
+	}
+
+	return ret;
+}
+
+int cdns3_get_id(struct cdns3 *cdns)
+{
+	int id;
+
+	id = readl(&cdns->otg_regs->sts) & OTGSTS_ID_VALUE;
+	dev_dbg(cdns->dev, "OTG ID: %d", id);
+
+	return id;
+}
+
+int cdns3_get_vbus(struct cdns3 *cdns)
+{
+	int vbus;
+
+	vbus = !!(readl(&cdns->otg_regs->sts) & OTGSTS_VBUS_VALID);
+	dev_dbg(cdns->dev, "OTG VBUS: %d", vbus);
+
+	return vbus;
+}
+
+int cdns3_is_host(struct cdns3 *cdns)
+{
+	if (cdns->dr_mode == USB_DR_MODE_HOST)
+		return 1;
+	else if (!cdns3_get_id(cdns))
+		return 1;
+
+	return 0;
+}
+
+int cdns3_is_device(struct cdns3 *cdns)
+{
+	if (cdns->dr_mode == USB_DR_MODE_PERIPHERAL)
+		return 1;
+	else if (cdns->dr_mode == USB_DR_MODE_OTG)
+		if (cdns3_get_id(cdns))
+			return 1;
+
+	return 0;
+}
+
+/**
+ * cdns3_drd_switch_host - start/stop host
+ * @cdns: Pointer to controller context structure
+ * @on: 1 for start, 0 for stop
+ *
+ * Returns 0 on success otherwise negative errno
+ */
+int cdns3_drd_switch_host(struct cdns3 *cdns, int on)
+{
+	int ret, val;
+	u32 reg = OTGCMD_OTG_DIS;
+
+	/* switch OTG core */
+	if (on) {
+		writel(OTGCMD_HOST_BUS_REQ | reg, &cdns->otg_regs->cmd);
+
+		dev_dbg(cdns->dev, "Waiting till Host mode is turned on\n");
+		ret = readl_poll_timeout_atomic(&cdns->otg_regs->sts, val,
+						val & OTGSTS_XHCI_READY,
+						100000);
+		if (ret) {
+			dev_err(cdns->dev, "timeout waiting for xhci_ready\n");
+			return ret;
+		}
+	} else {
+		writel(OTGCMD_HOST_BUS_DROP | OTGCMD_DEV_BUS_DROP |
+		       OTGCMD_DEV_POWER_OFF | OTGCMD_HOST_POWER_OFF,
+		       &cdns->otg_regs->cmd);
+		/* Waiting till H_IDLE state.*/
+		readl_poll_timeout_atomic(&cdns->otg_regs->state, val,
+					  !(val & OTGSTATE_HOST_STATE_MASK),
+					  2000000);
+	}
+
+	return 0;
+}
+
+/**
+ * cdns3_drd_switch_gadget - start/stop gadget
+ * @cdns: Pointer to controller context structure
+ * @on: 1 for start, 0 for stop
+ *
+ * Returns 0 on success otherwise negative errno
+ */
+int cdns3_drd_switch_gadget(struct cdns3 *cdns, int on)
+{
+	int ret, val;
+	u32 reg = OTGCMD_OTG_DIS;
+
+	/* switch OTG core */
+	if (on) {
+		writel(OTGCMD_DEV_BUS_REQ | reg, &cdns->otg_regs->cmd);
+
+		dev_dbg(cdns->dev, "Waiting till Device mode is turned on\n");
+
+		ret = readl_poll_timeout_atomic(&cdns->otg_regs->sts, val,
+						val & OTGSTS_DEV_READY,
+						100000);
+		if (ret) {
+			dev_err(cdns->dev, "timeout waiting for dev_ready\n");
+			return ret;
+		}
+	} else {
+		/*
+		 * driver should wait at least 10us after disabling Device
+		 * before turning-off Device (DEV_BUS_DROP)
+		 */
+		usleep_range(20, 30);
+		writel(OTGCMD_HOST_BUS_DROP | OTGCMD_DEV_BUS_DROP |
+		       OTGCMD_DEV_POWER_OFF | OTGCMD_HOST_POWER_OFF,
+		       &cdns->otg_regs->cmd);
+		/* Waiting till DEV_IDLE state.*/
+		readl_poll_timeout_atomic(&cdns->otg_regs->state, val,
+					  !(val & OTGSTATE_DEV_STATE_MASK),
+					  2000000);
+	}
+
+	return 0;
+}
+
+/**
+ * cdns3_init_otg_mode - initialize drd controller
+ * @cdns: Pointer to controller context structure
+ *
+ * Returns 0 on success otherwise negative errno
+ */
+static int cdns3_init_otg_mode(struct cdns3 *cdns)
+{
+	int ret = 0;
+
+	/* clear all interrupts */
+	writel(~0, &cdns->otg_regs->ivect);
+
+	ret = cdns3_set_mode(cdns, USB_DR_MODE_OTG);
+	if (ret)
+		return ret;
+
+	return ret;
+}
+
+/**
+ * cdns3_drd_update_mode - initialize mode of operation
+ * @cdns: Pointer to controller context structure
+ *
+ * Returns 0 on success otherwise negative errno
+ */
+int cdns3_drd_update_mode(struct cdns3 *cdns)
+{
+	int ret = 0;
+
+	switch (cdns->dr_mode) {
+	case USB_DR_MODE_PERIPHERAL:
+		ret = cdns3_set_mode(cdns, USB_DR_MODE_PERIPHERAL);
+		break;
+	case USB_DR_MODE_HOST:
+		ret = cdns3_set_mode(cdns, USB_DR_MODE_HOST);
+		break;
+	case USB_DR_MODE_OTG:
+		ret = cdns3_init_otg_mode(cdns);
+		break;
+	default:
+		dev_err(cdns->dev, "Unsupported mode of operation %d\n",
+			cdns->dr_mode);
+		return -EINVAL;
+	}
+
+	return ret;
+}
+
+int cdns3_drd_init(struct cdns3 *cdns)
+{
+	void __iomem *regs;
+	int ret = 0;
+	u32 state;
+
+	regs = dev_remap_addr_name(cdns->dev, "otg");
+	if (!regs)
+		return -EINVAL;
+
+	/* Detection of DRD version. Controller has been released
+	 * in two versions. Both are similar, but they have same changes
+	 * in register maps.
+	 * The first register in old version is command register and it's read
+	 * only, so driver should read 0 from it. On the other hand, in v1
+	 * the first register contains device ID number which is not set to 0.
+	 * Driver uses this fact to detect the proper version of
+	 * controller.
+	 */
+	cdns->otg_v0_regs = regs;
+	if (!readl(&cdns->otg_v0_regs->cmd)) {
+		cdns->version  = CDNS3_CONTROLLER_V0;
+		cdns->otg_v1_regs = NULL;
+		cdns->otg_regs = regs;
+		writel(1, &cdns->otg_v0_regs->simulate);
+		dev_info(cdns->dev, "DRD version v0 (%08x)\n",
+			 readl(&cdns->otg_v0_regs->version));
+	} else {
+		cdns->otg_v0_regs = NULL;
+		cdns->otg_v1_regs = regs;
+		cdns->otg_regs = (void *)&cdns->otg_v1_regs->cmd;
+		cdns->version  = CDNS3_CONTROLLER_V1;
+		writel(1, &cdns->otg_v1_regs->simulate);
+		dev_info(cdns->dev, "DRD version v1 (ID: %08x, rev: %08x)\n",
+			 readl(&cdns->otg_v1_regs->did),
+			 readl(&cdns->otg_v1_regs->rid));
+	}
+
+	state = OTGSTS_STRAP(readl(&cdns->otg_regs->sts));
+
+	/* Update dr_mode according to STRAP configuration. */
+	cdns->dr_mode = USB_DR_MODE_OTG;
+	if (state == OTGSTS_STRAP_HOST) {
+		dev_dbg(cdns->dev, "Controller strapped to HOST\n");
+		cdns->dr_mode = USB_DR_MODE_HOST;
+	} else if (state == OTGSTS_STRAP_GADGET) {
+		dev_dbg(cdns->dev, "Controller strapped to PERIPHERAL\n");
+		cdns->dr_mode = USB_DR_MODE_PERIPHERAL;
+	}
+
+	state = readl(&cdns->otg_regs->sts);
+	if (OTGSTS_OTG_NRDY(state) != 0) {
+		dev_err(cdns->dev, "Cadence USB3 OTG device not ready\n");
+		return -ENODEV;
+	}
+
+	return ret;
+}
+
+int cdns3_drd_exit(struct cdns3 *cdns)
+{
+	return 0;
+}
diff --git a/drivers/usb/cdns3/drd.h b/drivers/usb/cdns3/drd.h
new file mode 100644
index 0000000000..815b93f2fb
--- /dev/null
+++ b/drivers/usb/cdns3/drd.h
@@ -0,0 +1,166 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Cadence USB3 DRD header file.
+ *
+ * Copyright (C) 2018-2019 Cadence.
+ *
+ * Author: Pawel Laszczak <pawell@cadence.com>
+ */
+#ifndef __LINUX_CDNS3_DRD
+#define __LINUX_CDNS3_DRD
+
+#include <linux/types.h>
+#include <linux/usb/otg.h>
+#include "core.h"
+
+/*  DRD register interface for version v1. */
+struct cdns3_otg_regs {
+	__le32 did;
+	__le32 rid;
+	__le32 capabilities;
+	__le32 reserved1;
+	__le32 cmd;
+	__le32 sts;
+	__le32 state;
+	__le32 reserved2;
+	__le32 ien;
+	__le32 ivect;
+	__le32 refclk;
+	__le32 tmr;
+	__le32 reserved3[4];
+	__le32 simulate;
+	__le32 override;
+	__le32 susp_ctrl;
+	__le32 reserved4;
+	__le32 anasts;
+	__le32 adp_ramp_time;
+	__le32 ctrl1;
+	__le32 ctrl2;
+};
+
+/*  DRD register interface for version v0. */
+struct cdns3_otg_legacy_regs {
+	__le32 cmd;
+	__le32 sts;
+	__le32 state;
+	__le32 refclk;
+	__le32 ien;
+	__le32 ivect;
+	__le32 reserved1[3];
+	__le32 tmr;
+	__le32 reserved2[2];
+	__le32 version;
+	__le32 capabilities;
+	__le32 reserved3[2];
+	__le32 simulate;
+	__le32 reserved4[5];
+	__le32 ctrl1;
+};
+
+/*
+ * Common registers interface for both version of DRD.
+ */
+struct cdns3_otg_common_regs {
+	__le32 cmd;
+	__le32 sts;
+	__le32 state;
+	__le32 different1;
+	__le32 ien;
+	__le32 ivect;
+};
+
+/* CDNS_RID - bitmasks */
+#define CDNS_RID(p)			((p) & GENMASK(15, 0))
+
+/* CDNS_VID - bitmasks */
+#define CDNS_DID(p)			((p) & GENMASK(31, 0))
+
+/* OTGCMD - bitmasks */
+/* "Request the bus for Device mode. */
+#define OTGCMD_DEV_BUS_REQ		BIT(0)
+/* Request the bus for Host mode */
+#define OTGCMD_HOST_BUS_REQ		BIT(1)
+/* Enable OTG mode. */
+#define OTGCMD_OTG_EN			BIT(2)
+/* Disable OTG mode */
+#define OTGCMD_OTG_DIS			BIT(3)
+/*"Configure OTG as A-Device. */
+#define OTGCMD_A_DEV_EN			BIT(4)
+/*"Configure OTG as A-Device. */
+#define OTGCMD_A_DEV_DIS		BIT(5)
+/* Drop the bus for Device mod	e. */
+#define OTGCMD_DEV_BUS_DROP		BIT(8)
+/* Drop the bus for Host mode*/
+#define OTGCMD_HOST_BUS_DROP		BIT(9)
+/* Power Down USBSS-DEV. */
+#define OTGCMD_DEV_POWER_OFF		BIT(11)
+/* Power Down CDNSXHCI. */
+#define OTGCMD_HOST_POWER_OFF		BIT(12)
+
+/* OTGIEN - bitmasks */
+/* ID change interrupt enable */
+#define OTGIEN_ID_CHANGE_INT		BIT(0)
+/* Vbusvalid fall detected interrupt enable.*/
+#define OTGIEN_VBUSVALID_RISE_INT	BIT(4)
+/* Vbusvalid fall detected interrupt enable */
+#define OTGIEN_VBUSVALID_FALL_INT	BIT(5)
+
+/* OTGSTS - bitmasks */
+/*
+ * Current value of the ID pin. It is only valid when idpullup in
+ *  OTGCTRL1_TYPE register is set to '1'.
+ */
+#define OTGSTS_ID_VALUE			BIT(0)
+/* Current value of the vbus_valid */
+#define OTGSTS_VBUS_VALID		BIT(1)
+/* Current value of the b_sess_vld */
+#define OTGSTS_SESSION_VALID		BIT(2)
+/*Device mode is active*/
+#define OTGSTS_DEV_ACTIVE		BIT(3)
+/* Host mode is active. */
+#define OTGSTS_HOST_ACTIVE		BIT(4)
+/* OTG Controller not ready. */
+#define OTGSTS_OTG_NRDY_MASK		BIT(11)
+#define OTGSTS_OTG_NRDY(p)		((p) & OTGSTS_OTG_NRDY_MASK)
+/*
+ * Value of the strap pins.
+ * 000 - no default configuration
+ * 010 - Controller initiall configured as Host
+ * 100 - Controller initially configured as Device
+ */
+#define OTGSTS_STRAP(p)			(((p) & GENMASK(14, 12)) >> 12)
+#define OTGSTS_STRAP_NO_DEFAULT_CFG	0x00
+#define OTGSTS_STRAP_HOST_OTG		0x01
+#define OTGSTS_STRAP_HOST		0x02
+#define OTGSTS_STRAP_GADGET		0x04
+/* Host mode is turned on. */
+#define OTGSTS_XHCI_READY		BIT(26)
+/* "Device mode is turned on .*/
+#define OTGSTS_DEV_READY		BIT(27)
+
+/* OTGSTATE- bitmasks */
+#define OTGSTATE_DEV_STATE_MASK		GENMASK(2, 0)
+#define OTGSTATE_HOST_STATE_MASK	GENMASK(5, 3)
+#define OTGSTATE_HOST_STATE_IDLE	0x0
+#define OTGSTATE_HOST_STATE_VBUS_FALL	0x7
+#define OTGSTATE_HOST_STATE(p)		(((p) & OTGSTATE_HOST_STATE_MASK) >> 3)
+
+/* OTGREFCLK - bitmasks */
+#define OTGREFCLK_STB_CLK_SWITCH_EN	BIT(31)
+
+/* OVERRIDE - bitmasks */
+#define OVERRIDE_IDPULLUP		BIT(0)
+/* Only for CDNS3_CONTROLLER_V0 version */
+#define OVERRIDE_IDPULLUP_V0		BIT(24)
+
+int cdns3_is_host(struct cdns3 *cdns);
+int cdns3_is_device(struct cdns3 *cdns);
+int cdns3_get_id(struct cdns3 *cdns);
+int cdns3_get_vbus(struct cdns3 *cdns);
+int cdns3_drd_init(struct cdns3 *cdns);
+int cdns3_drd_exit(struct cdns3 *cdns);
+int cdns3_drd_update_mode(struct cdns3 *cdns);
+int cdns3_drd_switch_gadget(struct cdns3 *cdns, int on);
+int cdns3_drd_switch_host(struct cdns3 *cdns, int on);
+
+#endif /* __LINUX_CDNS3_DRD */
diff --git a/drivers/usb/cdns3/ep0.c b/drivers/usb/cdns3/ep0.c
new file mode 100644
index 0000000000..1903f61103
--- /dev/null
+++ b/drivers/usb/cdns3/ep0.c
@@ -0,0 +1,910 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Cadence USBSS DRD Driver - gadget side.
+ *
+ * Copyright (C) 2018 Cadence Design Systems.
+ * Copyright (C) 2017-2018 NXP
+ *
+ * Authors: Pawel Jez <pjez@cadence.com>,
+ *          Pawel Laszczak <pawell@cadence.com>
+ *          Peter Chen <peter.chen@nxp.com>
+ */
+
+#include <linux/usb/composite.h>
+#include <linux/iopoll.h>
+
+#include "gadget.h"
+#include "trace.h"
+
+#define readl_poll_timeout_atomic readl_poll_timeout
+#define usleep_range(a, b) udelay((b))
+
+static struct usb_endpoint_descriptor cdns3_gadget_ep0_desc = {
+	.bLength = USB_DT_ENDPOINT_SIZE,
+	.bDescriptorType = USB_DT_ENDPOINT,
+	.bmAttributes =	USB_ENDPOINT_XFER_CONTROL,
+};
+
+/**
+ * cdns3_ep0_run_transfer - Do transfer on default endpoint hardware
+ * @priv_dev: extended gadget object
+ * @dma_addr: physical address where data is/will be stored
+ * @length: data length
+ * @erdy: set it to 1 when ERDY packet should be sent -
+ *        exit from flow control state
+ */
+static void cdns3_ep0_run_transfer(struct cdns3_device *priv_dev,
+				   dma_addr_t dma_addr,
+				   unsigned int length, int erdy, int zlp)
+{
+	struct cdns3_usb_regs __iomem *regs = priv_dev->regs;
+	struct cdns3_endpoint *priv_ep = priv_dev->eps[0];
+
+	priv_ep->trb_pool[0].buffer = TRB_BUFFER(dma_addr);
+	priv_ep->trb_pool[0].length = TRB_LEN(length);
+
+	if (zlp) {
+		priv_ep->trb_pool[0].control = TRB_CYCLE | TRB_TYPE(TRB_NORMAL);
+		priv_ep->trb_pool[1].buffer = TRB_BUFFER(dma_addr);
+		priv_ep->trb_pool[1].length = TRB_LEN(0);
+		priv_ep->trb_pool[1].control = TRB_CYCLE | TRB_IOC |
+		    TRB_TYPE(TRB_NORMAL);
+	} else {
+		priv_ep->trb_pool[0].control = TRB_CYCLE | TRB_IOC |
+		    TRB_TYPE(TRB_NORMAL);
+		priv_ep->trb_pool[1].control = 0;
+	}
+
+	/* Flush both TRBs */
+	flush_dcache_range((unsigned long)priv_ep->trb_pool,
+			   (unsigned long)priv_ep->trb_pool +
+			   ROUND(sizeof(struct cdns3_trb) * 2,
+				 CONFIG_SYS_CACHELINE_SIZE));
+
+	trace_cdns3_prepare_trb(priv_ep, priv_ep->trb_pool);
+
+	cdns3_select_ep(priv_dev, priv_dev->ep0_data_dir);
+
+	writel(EP_STS_TRBERR, &regs->ep_sts);
+	writel(EP_TRADDR_TRADDR(priv_ep->trb_pool_dma), &regs->ep_traddr);
+	trace_cdns3_doorbell_ep0(priv_dev->ep0_data_dir ? "ep0in" : "ep0out",
+				 readl(&regs->ep_traddr));
+
+	/* TRB should be prepared before starting transfer. */
+	writel(EP_CMD_DRDY, &regs->ep_cmd);
+
+	/* Resume controller before arming transfer. */
+	__cdns3_gadget_wakeup(priv_dev);
+
+	if (erdy)
+		writel(EP_CMD_ERDY, &priv_dev->regs->ep_cmd);
+}
+
+/**
+ * cdns3_ep0_delegate_req - Returns status of handling setup packet
+ * Setup is handled by gadget driver
+ * @priv_dev: extended gadget object
+ * @ctrl_req: pointer to received setup packet
+ *
+ * Returns zero on success or negative value on failure
+ */
+static int cdns3_ep0_delegate_req(struct cdns3_device *priv_dev,
+				  struct usb_ctrlrequest *ctrl_req)
+{
+	int ret;
+
+	spin_unlock(&priv_dev->lock);
+	priv_dev->setup_pending = 1;
+	ret = priv_dev->gadget_driver->setup(&priv_dev->gadget, ctrl_req);
+	priv_dev->setup_pending = 0;
+	spin_lock(&priv_dev->lock);
+	return ret;
+}
+
+static void cdns3_prepare_setup_packet(struct cdns3_device *priv_dev)
+{
+	priv_dev->ep0_data_dir = 0;
+	priv_dev->ep0_stage = CDNS3_SETUP_STAGE;
+	cdns3_ep0_run_transfer(priv_dev, priv_dev->setup_dma,
+			       sizeof(struct usb_ctrlrequest), 0, 0);
+}
+
+static void cdns3_ep0_complete_setup(struct cdns3_device *priv_dev,
+				     u8 send_stall, u8 send_erdy)
+{
+	struct cdns3_endpoint *priv_ep = priv_dev->eps[0];
+	struct usb_request *request;
+
+	request = cdns3_next_request(&priv_ep->pending_req_list);
+	if (request)
+		list_del_init(&request->list);
+
+	if (send_stall) {
+		trace_cdns3_halt(priv_ep, send_stall, 0);
+		/* set_stall on ep0 */
+		cdns3_select_ep(priv_dev, 0x00);
+		writel(EP_CMD_SSTALL, &priv_dev->regs->ep_cmd);
+	} else {
+		cdns3_prepare_setup_packet(priv_dev);
+	}
+
+	priv_dev->ep0_stage = CDNS3_SETUP_STAGE;
+	writel((send_erdy ? EP_CMD_ERDY : 0) | EP_CMD_REQ_CMPL,
+	       &priv_dev->regs->ep_cmd);
+
+	cdns3_allow_enable_l1(priv_dev, 1);
+}
+
+/**
+ * cdns3_req_ep0_set_configuration - Handling of SET_CONFIG standard USB request
+ * @priv_dev: extended gadget object
+ * @ctrl_req: pointer to received setup packet
+ *
+ * Returns 0 if success, USB_GADGET_DELAYED_STATUS on deferred status stage,
+ * error code on error
+ */
+static int cdns3_req_ep0_set_configuration(struct cdns3_device *priv_dev,
+					   struct usb_ctrlrequest *ctrl_req)
+{
+	enum usb_device_state device_state = priv_dev->gadget.state;
+	struct cdns3_endpoint *priv_ep;
+	u32 config = le16_to_cpu(ctrl_req->wValue);
+	int result = 0;
+	int i;
+
+	switch (device_state) {
+	case USB_STATE_ADDRESS:
+		/* Configure non-control EPs */
+		for (i = 0; i < CDNS3_ENDPOINTS_MAX_COUNT; i++) {
+			priv_ep = priv_dev->eps[i];
+			if (!priv_ep)
+				continue;
+
+			if (priv_ep->flags & EP_CLAIMED)
+				cdns3_ep_config(priv_ep);
+		}
+
+		result = cdns3_ep0_delegate_req(priv_dev, ctrl_req);
+
+		if (result)
+			return result;
+
+		if (config) {
+			cdns3_set_hw_configuration(priv_dev);
+		} else {
+			cdns3_hw_reset_eps_config(priv_dev);
+			usb_gadget_set_state(&priv_dev->gadget,
+					     USB_STATE_ADDRESS);
+		}
+		break;
+	case USB_STATE_CONFIGURED:
+		result = cdns3_ep0_delegate_req(priv_dev, ctrl_req);
+
+		if (!config && !result) {
+			cdns3_hw_reset_eps_config(priv_dev);
+			usb_gadget_set_state(&priv_dev->gadget,
+					     USB_STATE_ADDRESS);
+		}
+		break;
+	default:
+		result = -EINVAL;
+	}
+
+	return result;
+}
+
+/**
+ * cdns3_req_ep0_set_address - Handling of SET_ADDRESS standard USB request
+ * @priv_dev: extended gadget object
+ * @ctrl_req: pointer to received setup packet
+ *
+ * Returns 0 if success, error code on error
+ */
+static int cdns3_req_ep0_set_address(struct cdns3_device *priv_dev,
+				     struct usb_ctrlrequest *ctrl_req)
+{
+	enum usb_device_state device_state = priv_dev->gadget.state;
+	u32 reg;
+	u32 addr;
+
+	addr = le16_to_cpu(ctrl_req->wValue);
+
+	if (addr > USB_DEVICE_MAX_ADDRESS) {
+		dev_err(priv_dev->dev,
+			"Device address (%d) cannot be greater than %d\n",
+			addr, USB_DEVICE_MAX_ADDRESS);
+		return -EINVAL;
+	}
+
+	if (device_state == USB_STATE_CONFIGURED) {
+		dev_err(priv_dev->dev,
+			"can't set_address from configured state\n");
+		return -EINVAL;
+	}
+
+	reg = readl(&priv_dev->regs->usb_cmd);
+
+	writel(reg | USB_CMD_FADDR(addr) | USB_CMD_SET_ADDR,
+	       &priv_dev->regs->usb_cmd);
+
+	usb_gadget_set_state(&priv_dev->gadget,
+			     (addr ? USB_STATE_ADDRESS : USB_STATE_DEFAULT));
+
+	return 0;
+}
+
+/**
+ * cdns3_req_ep0_get_status - Handling of GET_STATUS standard USB request
+ * @priv_dev: extended gadget object
+ * @ctrl_req: pointer to received setup packet
+ *
+ * Returns 0 if success, error code on error
+ */
+static int cdns3_req_ep0_get_status(struct cdns3_device *priv_dev,
+				    struct usb_ctrlrequest *ctrl)
+{
+	__le16 *response_pkt;
+	u16 usb_status = 0;
+	u32 recip;
+
+	recip = ctrl->bRequestType & USB_RECIP_MASK;
+
+	switch (recip) {
+	case USB_RECIP_DEVICE:
+		/* self powered */
+		if (priv_dev->is_selfpowered)
+			usb_status = BIT(USB_DEVICE_SELF_POWERED);
+
+		if (priv_dev->wake_up_flag)
+			usb_status |= BIT(USB_DEVICE_REMOTE_WAKEUP);
+
+		if (priv_dev->gadget.speed != USB_SPEED_SUPER)
+			break;
+
+		if (priv_dev->u1_allowed)
+			usb_status |= BIT(USB_DEV_STAT_U1_ENABLED);
+
+		if (priv_dev->u2_allowed)
+			usb_status |= BIT(USB_DEV_STAT_U2_ENABLED);
+
+		break;
+	case USB_RECIP_INTERFACE:
+		return cdns3_ep0_delegate_req(priv_dev, ctrl);
+	case USB_RECIP_ENDPOINT:
+		/* check if endpoint is stalled */
+		cdns3_select_ep(priv_dev, ctrl->wIndex);
+		if (EP_STS_STALL(readl(&priv_dev->regs->ep_sts)))
+			usb_status =  BIT(USB_ENDPOINT_HALT);
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	response_pkt = (__le16 *)priv_dev->setup_buf;
+	*response_pkt = cpu_to_le16(usb_status);
+
+	/* Flush setup response */
+	flush_dcache_range((unsigned long)priv_dev->setup_buf,
+			   (unsigned long)priv_dev->setup_buf +
+			   ROUND(sizeof(struct usb_ctrlrequest),
+				 CONFIG_SYS_CACHELINE_SIZE));
+
+	cdns3_ep0_run_transfer(priv_dev, priv_dev->setup_dma,
+			       sizeof(*response_pkt), 1, 0);
+	return 0;
+}
+
+static int cdns3_ep0_feature_handle_device(struct cdns3_device *priv_dev,
+					   struct usb_ctrlrequest *ctrl,
+					   int set)
+{
+	enum usb_device_state state;
+	enum usb_device_speed speed;
+	int ret = 0;
+	u16 tmode;
+
+	state = priv_dev->gadget.state;
+	speed = priv_dev->gadget.speed;
+
+	switch (ctrl->wValue) {
+	case USB_DEVICE_REMOTE_WAKEUP:
+		priv_dev->wake_up_flag = !!set;
+		break;
+	case USB_DEVICE_U1_ENABLE:
+		if (state != USB_STATE_CONFIGURED || speed != USB_SPEED_SUPER)
+			return -EINVAL;
+
+		priv_dev->u1_allowed = !!set;
+		break;
+	case USB_DEVICE_U2_ENABLE:
+		if (state != USB_STATE_CONFIGURED || speed != USB_SPEED_SUPER)
+			return -EINVAL;
+
+		priv_dev->u2_allowed = !!set;
+		break;
+	case USB_DEVICE_LTM_ENABLE:
+		ret = -EINVAL;
+		break;
+	case USB_DEVICE_TEST_MODE:
+		if (state != USB_STATE_CONFIGURED || speed > USB_SPEED_HIGH)
+			return -EINVAL;
+
+		tmode = le16_to_cpu(ctrl->wIndex);
+
+		if (!set || (tmode & 0xff) != 0)
+			return -EINVAL;
+
+		switch (tmode >> 8) {
+		case TEST_J:
+		case TEST_K:
+		case TEST_SE0_NAK:
+		case TEST_PACKET:
+			cdns3_ep0_complete_setup(priv_dev, 0, 1);
+			/**
+			 *  Little delay to give the controller some time
+			 * for sending status stage.
+			 * This time should be less then 3ms.
+			 */
+			usleep_range(1000, 2000);
+			cdns3_set_register_bit(&priv_dev->regs->usb_cmd,
+					       USB_CMD_STMODE |
+					       USB_STS_TMODE_SEL(tmode - 1));
+			break;
+		default:
+			ret = -EINVAL;
+		}
+		break;
+	default:
+		ret = -EINVAL;
+	}
+
+	return ret;
+}
+
+static int cdns3_ep0_feature_handle_intf(struct cdns3_device *priv_dev,
+					 struct usb_ctrlrequest *ctrl,
+					 int set)
+{
+	u32 wValue;
+	int ret = 0;
+
+	wValue = le16_to_cpu(ctrl->wValue);
+
+	switch (wValue) {
+	case USB_INTRF_FUNC_SUSPEND:
+		break;
+	default:
+		ret = -EINVAL;
+	}
+
+	return ret;
+}
+
+static int cdns3_ep0_feature_handle_endpoint(struct cdns3_device *priv_dev,
+					     struct usb_ctrlrequest *ctrl,
+					     int set)
+{
+	struct cdns3_endpoint *priv_ep;
+	int ret = 0;
+	u8 index;
+
+	if (le16_to_cpu(ctrl->wValue) != USB_ENDPOINT_HALT)
+		return -EINVAL;
+
+	if (!(ctrl->wIndex & ~USB_DIR_IN))
+		return 0;
+
+	index = cdns3_ep_addr_to_index(ctrl->wIndex);
+	priv_ep = priv_dev->eps[index];
+
+	cdns3_select_ep(priv_dev, ctrl->wIndex);
+
+	if (set)
+		__cdns3_gadget_ep_set_halt(priv_ep);
+	else if (!(priv_ep->flags & EP_WEDGE))
+		ret = __cdns3_gadget_ep_clear_halt(priv_ep);
+
+	cdns3_select_ep(priv_dev, 0x00);
+
+	return ret;
+}
+
+/**
+ * cdns3_req_ep0_handle_feature -
+ * Handling of GET/SET_FEATURE standard USB request
+ *
+ * @priv_dev: extended gadget object
+ * @ctrl_req: pointer to received setup packet
+ * @set: must be set to 1 for SET_FEATURE request
+ *
+ * Returns 0 if success, error code on error
+ */
+static int cdns3_req_ep0_handle_feature(struct cdns3_device *priv_dev,
+					struct usb_ctrlrequest *ctrl,
+					int set)
+{
+	int ret = 0;
+	u32 recip;
+
+	recip = ctrl->bRequestType & USB_RECIP_MASK;
+
+	switch (recip) {
+	case USB_RECIP_DEVICE:
+		ret = cdns3_ep0_feature_handle_device(priv_dev, ctrl, set);
+		break;
+	case USB_RECIP_INTERFACE:
+		ret = cdns3_ep0_feature_handle_intf(priv_dev, ctrl, set);
+		break;
+	case USB_RECIP_ENDPOINT:
+		ret = cdns3_ep0_feature_handle_endpoint(priv_dev, ctrl, set);
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return ret;
+}
+
+/**
+ * cdns3_req_ep0_set_sel - Handling of SET_SEL standard USB request
+ * @priv_dev: extended gadget object
+ * @ctrl_req: pointer to received setup packet
+ *
+ * Returns 0 if success, error code on error
+ */
+static int cdns3_req_ep0_set_sel(struct cdns3_device *priv_dev,
+				 struct usb_ctrlrequest *ctrl_req)
+{
+	if (priv_dev->gadget.state < USB_STATE_ADDRESS)
+		return -EINVAL;
+
+	if (ctrl_req->wLength != 6) {
+		dev_err(priv_dev->dev, "Set SEL should be 6 bytes, got %d\n",
+			ctrl_req->wLength);
+		return -EINVAL;
+	}
+
+	cdns3_ep0_run_transfer(priv_dev, priv_dev->setup_dma, 6, 1, 0);
+	return 0;
+}
+
+/**
+ * cdns3_req_ep0_set_isoch_delay -
+ * Handling of GET_ISOCH_DELAY standard USB request
+ * @priv_dev: extended gadget object
+ * @ctrl_req: pointer to received setup packet
+ *
+ * Returns 0 if success, error code on error
+ */
+static int cdns3_req_ep0_set_isoch_delay(struct cdns3_device *priv_dev,
+					 struct usb_ctrlrequest *ctrl_req)
+{
+	if (ctrl_req->wIndex || ctrl_req->wLength)
+		return -EINVAL;
+
+	priv_dev->isoch_delay = ctrl_req->wValue;
+
+	return 0;
+}
+
+/**
+ * cdns3_ep0_standard_request - Handling standard USB requests
+ * @priv_dev: extended gadget object
+ * @ctrl_req: pointer to received setup packet
+ *
+ * Returns 0 if success, error code on error
+ */
+static int cdns3_ep0_standard_request(struct cdns3_device *priv_dev,
+				      struct usb_ctrlrequest *ctrl_req)
+{
+	int ret;
+
+	switch (ctrl_req->bRequest) {
+	case USB_REQ_SET_ADDRESS:
+		ret = cdns3_req_ep0_set_address(priv_dev, ctrl_req);
+		break;
+	case USB_REQ_SET_CONFIGURATION:
+		ret = cdns3_req_ep0_set_configuration(priv_dev, ctrl_req);
+		break;
+	case USB_REQ_GET_STATUS:
+		ret = cdns3_req_ep0_get_status(priv_dev, ctrl_req);
+		break;
+	case USB_REQ_CLEAR_FEATURE:
+		ret = cdns3_req_ep0_handle_feature(priv_dev, ctrl_req, 0);
+		break;
+	case USB_REQ_SET_FEATURE:
+		ret = cdns3_req_ep0_handle_feature(priv_dev, ctrl_req, 1);
+		break;
+	case USB_REQ_SET_SEL:
+		ret = cdns3_req_ep0_set_sel(priv_dev, ctrl_req);
+		break;
+	case USB_REQ_SET_ISOCH_DELAY:
+		ret = cdns3_req_ep0_set_isoch_delay(priv_dev, ctrl_req);
+		break;
+	default:
+		ret = cdns3_ep0_delegate_req(priv_dev, ctrl_req);
+		break;
+	}
+
+	return ret;
+}
+
+static void __pending_setup_status_handler(struct cdns3_device *priv_dev)
+{
+	struct usb_request *request = priv_dev->pending_status_request;
+
+	if (priv_dev->status_completion_no_call && request &&
+	    request->complete) {
+		request->complete(&priv_dev->eps[0]->endpoint, request);
+		priv_dev->status_completion_no_call = 0;
+	}
+}
+
+void cdns3_pending_setup_status_handler(struct work_struct *work)
+{
+	struct cdns3_device *priv_dev = container_of(work, struct cdns3_device,
+			pending_status_wq);
+	unsigned long flags;
+
+	spin_lock_irqsave(&priv_dev->lock, flags);
+	__pending_setup_status_handler(priv_dev);
+	spin_unlock_irqrestore(&priv_dev->lock, flags);
+}
+
+/**
+ * cdns3_ep0_setup_phase - Handling setup USB requests
+ * @priv_dev: extended gadget object
+ */
+static void cdns3_ep0_setup_phase(struct cdns3_device *priv_dev)
+{
+	struct usb_ctrlrequest *ctrl = priv_dev->setup_buf;
+	struct cdns3_endpoint *priv_ep = priv_dev->eps[0];
+	int result;
+
+	priv_dev->ep0_data_dir = ctrl->bRequestType & USB_DIR_IN;
+
+	trace_cdns3_ctrl_req(ctrl);
+
+	if (!list_empty(&priv_ep->pending_req_list)) {
+		struct usb_request *request;
+
+		request = cdns3_next_request(&priv_ep->pending_req_list);
+		priv_ep->dir = priv_dev->ep0_data_dir;
+		cdns3_gadget_giveback(priv_ep, to_cdns3_request(request),
+				      -ECONNRESET);
+	}
+
+	if (le16_to_cpu(ctrl->wLength))
+		priv_dev->ep0_stage = CDNS3_DATA_STAGE;
+	else
+		priv_dev->ep0_stage = CDNS3_STATUS_STAGE;
+
+	if ((ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD)
+		result = cdns3_ep0_standard_request(priv_dev, ctrl);
+	else
+		result = cdns3_ep0_delegate_req(priv_dev, ctrl);
+
+	if (result == USB_GADGET_DELAYED_STATUS)
+		return;
+
+	if (result < 0)
+		cdns3_ep0_complete_setup(priv_dev, 1, 1);
+	else if (priv_dev->ep0_stage == CDNS3_STATUS_STAGE)
+		cdns3_ep0_complete_setup(priv_dev, 0, 1);
+}
+
+static void cdns3_transfer_completed(struct cdns3_device *priv_dev)
+{
+	struct cdns3_endpoint *priv_ep = priv_dev->eps[0];
+
+	if (!list_empty(&priv_ep->pending_req_list)) {
+		struct usb_request *request;
+
+		trace_cdns3_complete_trb(priv_ep, priv_ep->trb_pool);
+		request = cdns3_next_request(&priv_ep->pending_req_list);
+
+		/* Invalidate TRB before accessing it */
+		invalidate_dcache_range((unsigned long)priv_ep->trb_pool,
+					(unsigned long)priv_ep->trb_pool +
+					ROUND(sizeof(struct cdns3_trb),
+					      CONFIG_SYS_CACHELINE_SIZE));
+
+		request->actual =
+			TRB_LEN(le32_to_cpu(priv_ep->trb_pool->length));
+
+		priv_ep->dir = priv_dev->ep0_data_dir;
+		cdns3_gadget_giveback(priv_ep, to_cdns3_request(request), 0);
+	}
+
+	cdns3_ep0_complete_setup(priv_dev, 0, 0);
+}
+
+/**
+ * cdns3_check_new_setup - Check if controller receive new SETUP packet.
+ * @priv_dev: extended gadget object
+ *
+ * The SETUP packet can be kept in on-chip memory or in system memory.
+ */
+static bool cdns3_check_new_setup(struct cdns3_device *priv_dev)
+{
+	u32 ep_sts_reg;
+
+	cdns3_select_ep(priv_dev, 0 | USB_DIR_OUT);
+	ep_sts_reg = readl(&priv_dev->regs->ep_sts);
+
+	return !!(ep_sts_reg & (EP_STS_SETUP | EP_STS_STPWAIT));
+}
+
+/**
+ * cdns3_check_ep0_interrupt_proceed - Processes interrupt related to endpoint 0
+ * @priv_dev: extended gadget object
+ * @dir: USB_DIR_IN for IN direction, USB_DIR_OUT for OUT direction
+ */
+void cdns3_check_ep0_interrupt_proceed(struct cdns3_device *priv_dev, int dir)
+{
+	u32 ep_sts_reg;
+
+	cdns3_select_ep(priv_dev, dir);
+
+	ep_sts_reg = readl(&priv_dev->regs->ep_sts);
+	writel(ep_sts_reg, &priv_dev->regs->ep_sts);
+
+	trace_cdns3_ep0_irq(priv_dev, ep_sts_reg);
+
+	__pending_setup_status_handler(priv_dev);
+
+	if (ep_sts_reg & EP_STS_SETUP)
+		priv_dev->wait_for_setup = 1;
+
+	if (priv_dev->wait_for_setup && ep_sts_reg & EP_STS_IOC) {
+		priv_dev->wait_for_setup = 0;
+		cdns3_allow_enable_l1(priv_dev, 0);
+		cdns3_ep0_setup_phase(priv_dev);
+	} else if ((ep_sts_reg & EP_STS_IOC) || (ep_sts_reg & EP_STS_ISP)) {
+		priv_dev->ep0_data_dir = dir;
+		cdns3_transfer_completed(priv_dev);
+	}
+
+	if (ep_sts_reg & EP_STS_DESCMIS) {
+		if (dir == 0 && !priv_dev->setup_pending)
+			cdns3_prepare_setup_packet(priv_dev);
+	}
+}
+
+/**
+ * cdns3_gadget_ep0_enable
+ * Function shouldn't be called by gadget driver,
+ * endpoint 0 is allways active
+ */
+static int cdns3_gadget_ep0_enable(struct usb_ep *ep,
+				   const struct usb_endpoint_descriptor *desc)
+{
+	return -EINVAL;
+}
+
+/**
+ * cdns3_gadget_ep0_disable
+ * Function shouldn't be called by gadget driver,
+ * endpoint 0 is allways active
+ */
+static int cdns3_gadget_ep0_disable(struct usb_ep *ep)
+{
+	return -EINVAL;
+}
+
+/**
+ * cdns3_gadget_ep0_set_halt
+ * @ep: pointer to endpoint zero object
+ * @value: 1 for set stall, 0 for clear stall
+ *
+ * Returns 0
+ */
+static int cdns3_gadget_ep0_set_halt(struct usb_ep *ep, int value)
+{
+	/* TODO */
+	return 0;
+}
+
+/**
+ * cdns3_gadget_ep0_queue Transfer data on endpoint zero
+ * @ep: pointer to endpoint zero object
+ * @request: pointer to request object
+ * @gfp_flags: gfp flags
+ *
+ * Returns 0 on success, error code elsewhere
+ */
+static int cdns3_gadget_ep0_queue(struct usb_ep *ep,
+				  struct usb_request *request,
+				  gfp_t gfp_flags)
+{
+	struct cdns3_endpoint *priv_ep = ep_to_cdns3_ep(ep);
+	struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
+	unsigned long flags;
+	int erdy_sent = 0;
+	int ret = 0;
+	u8 zlp = 0;
+
+	trace_cdns3_ep0_queue(priv_dev, request);
+
+	/* cancel the request if controller receive new SETUP packet. */
+	if (cdns3_check_new_setup(priv_dev))
+		return -ECONNRESET;
+
+	/* send STATUS stage. Should be called only for SET_CONFIGURATION */
+	if (priv_dev->ep0_stage == CDNS3_STATUS_STAGE) {
+		spin_lock_irqsave(&priv_dev->lock, flags);
+		cdns3_select_ep(priv_dev, 0x00);
+
+		erdy_sent = !priv_dev->hw_configured_flag;
+		cdns3_set_hw_configuration(priv_dev);
+
+		if (!erdy_sent)
+			cdns3_ep0_complete_setup(priv_dev, 0, 1);
+
+		cdns3_allow_enable_l1(priv_dev, 1);
+
+		request->actual = 0;
+		priv_dev->status_completion_no_call = true;
+		priv_dev->pending_status_request = request;
+		spin_unlock_irqrestore(&priv_dev->lock, flags);
+
+		/*
+		 * Since there is no completion interrupt for status stage,
+		 * it needs to call ->completion in software after
+		 * ep0_queue is back.
+		 */
+#ifndef __UBOOT__
+		queue_work(system_freezable_wq, &priv_dev->pending_status_wq);
+#else
+		__pending_setup_status_handler(priv_dev);
+#endif
+		return 0;
+	}
+
+	spin_lock_irqsave(&priv_dev->lock, flags);
+	if (!list_empty(&priv_ep->pending_req_list)) {
+		dev_err(priv_dev->dev,
+			"can't handle multiple requests for ep0\n");
+		spin_unlock_irqrestore(&priv_dev->lock, flags);
+		return -EBUSY;
+	}
+
+	ret = usb_gadget_map_request(&priv_dev->gadget, request,
+				     priv_dev->ep0_data_dir);
+	if (ret) {
+		spin_unlock_irqrestore(&priv_dev->lock, flags);
+		dev_err(priv_dev->dev, "failed to map request\n");
+		return -EINVAL;
+	}
+
+	request->status = -EINPROGRESS;
+	list_add_tail(&request->list, &priv_ep->pending_req_list);
+
+	if (request->zero && request->length &&
+	    (request->length % ep->maxpacket == 0))
+		zlp = 1;
+
+	cdns3_ep0_run_transfer(priv_dev, request->dma, request->length, 1, zlp);
+
+	spin_unlock_irqrestore(&priv_dev->lock, flags);
+
+	return ret;
+}
+
+/**
+ * cdns3_gadget_ep_set_wedge Set wedge on selected endpoint
+ * @ep: endpoint object
+ *
+ * Returns 0
+ */
+int cdns3_gadget_ep_set_wedge(struct usb_ep *ep)
+{
+	struct cdns3_endpoint *priv_ep = ep_to_cdns3_ep(ep);
+
+	dev_dbg(priv_dev->dev, "Wedge for %s\n", ep->name);
+	cdns3_gadget_ep_set_halt(ep, 1);
+	priv_ep->flags |= EP_WEDGE;
+
+	return 0;
+}
+
+const struct usb_ep_ops cdns3_gadget_ep0_ops = {
+	.enable = cdns3_gadget_ep0_enable,
+	.disable = cdns3_gadget_ep0_disable,
+	.alloc_request = cdns3_gadget_ep_alloc_request,
+	.free_request = cdns3_gadget_ep_free_request,
+	.queue = cdns3_gadget_ep0_queue,
+	.dequeue = cdns3_gadget_ep_dequeue,
+	.set_halt = cdns3_gadget_ep0_set_halt,
+	.set_wedge = cdns3_gadget_ep_set_wedge,
+};
+
+/**
+ * cdns3_ep0_config - Configures default endpoint
+ * @priv_dev: extended gadget object
+ *
+ * Functions sets parameters: maximal packet size and enables interrupts
+ */
+void cdns3_ep0_config(struct cdns3_device *priv_dev)
+{
+	struct cdns3_usb_regs __iomem *regs;
+	struct cdns3_endpoint *priv_ep;
+	u32 max_packet_size = 64;
+
+	regs = priv_dev->regs;
+
+	if (priv_dev->gadget.speed == USB_SPEED_SUPER)
+		max_packet_size = 512;
+
+	priv_ep = priv_dev->eps[0];
+
+	if (!list_empty(&priv_ep->pending_req_list)) {
+		struct usb_request *request;
+
+		request = cdns3_next_request(&priv_ep->pending_req_list);
+		list_del_init(&request->list);
+	}
+
+	priv_dev->u1_allowed = 0;
+	priv_dev->u2_allowed = 0;
+
+	priv_dev->gadget.ep0->maxpacket = max_packet_size;
+	cdns3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(max_packet_size);
+
+	/* init ep out */
+	cdns3_select_ep(priv_dev, USB_DIR_OUT);
+
+	if (priv_dev->dev_ver >= DEV_VER_V3) {
+		cdns3_set_register_bit(&priv_dev->regs->dtrans,
+				       BIT(0) | BIT(16));
+		cdns3_set_register_bit(&priv_dev->regs->tdl_from_trb,
+				       BIT(0) | BIT(16));
+	}
+
+	writel(EP_CFG_ENABLE | EP_CFG_MAXPKTSIZE(max_packet_size),
+	       &regs->ep_cfg);
+
+	writel(EP_STS_EN_SETUPEN | EP_STS_EN_DESCMISEN | EP_STS_EN_TRBERREN,
+	       &regs->ep_sts_en);
+
+	/* init ep in */
+	cdns3_select_ep(priv_dev, USB_DIR_IN);
+
+	writel(EP_CFG_ENABLE | EP_CFG_MAXPKTSIZE(max_packet_size),
+	       &regs->ep_cfg);
+
+	writel(EP_STS_EN_SETUPEN | EP_STS_EN_TRBERREN, &regs->ep_sts_en);
+
+	cdns3_set_register_bit(&regs->usb_conf, USB_CONF_U1DS | USB_CONF_U2DS);
+}
+
+/**
+ * cdns3_init_ep0 Initializes software endpoint 0 of gadget
+ * @priv_dev: extended gadget object
+ * @ep_priv: extended endpoint object
+ *
+ * Returns 0 on success else error code.
+ */
+int cdns3_init_ep0(struct cdns3_device *priv_dev,
+		   struct cdns3_endpoint *priv_ep)
+{
+	sprintf(priv_ep->name, "ep0");
+
+	/* fill linux fields */
+	priv_ep->endpoint.ops = &cdns3_gadget_ep0_ops;
+	priv_ep->endpoint.maxburst = 1;
+	usb_ep_set_maxpacket_limit(&priv_ep->endpoint,
+				   CDNS3_EP0_MAX_PACKET_LIMIT);
+#ifndef __UBOOT__
+	priv_ep->endpoint.address = 0;
+#endif
+	priv_ep->endpoint.caps.type_control = 1;
+	priv_ep->endpoint.caps.dir_in = 1;
+	priv_ep->endpoint.caps.dir_out = 1;
+	priv_ep->endpoint.name = priv_ep->name;
+	priv_ep->endpoint.desc = &cdns3_gadget_ep0_desc;
+	priv_dev->gadget.ep0 = &priv_ep->endpoint;
+	priv_ep->type = USB_ENDPOINT_XFER_CONTROL;
+
+	return cdns3_allocate_trb_pool(priv_ep);
+}
diff --git a/drivers/usb/cdns3/gadget-export.h b/drivers/usb/cdns3/gadget-export.h
new file mode 100644
index 0000000000..577469eee9
--- /dev/null
+++ b/drivers/usb/cdns3/gadget-export.h
@@ -0,0 +1,28 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Cadence USBSS DRD Driver - Gadget Export APIs.
+ *
+ * Copyright (C) 2017 NXP
+ * Copyright (C) 2017-2018 NXP
+ *
+ * Authors: Peter Chen <peter.chen@nxp.com>
+ */
+#ifndef __LINUX_CDNS3_GADGET_EXPORT
+#define __LINUX_CDNS3_GADGET_EXPORT
+
+#ifdef CONFIG_USB_CDNS3_GADGET
+
+int cdns3_gadget_init(struct cdns3 *cdns);
+void cdns3_gadget_exit(struct cdns3 *cdns);
+#else
+
+static inline int cdns3_gadget_init(struct cdns3 *cdns)
+{
+	return -ENXIO;
+}
+
+static inline void cdns3_gadget_exit(struct cdns3 *cdns) { }
+
+#endif
+
+#endif /* __LINUX_CDNS3_GADGET_EXPORT */
diff --git a/drivers/usb/cdns3/gadget.c b/drivers/usb/cdns3/gadget.c
new file mode 100644
index 0000000000..a4debb0ddf
--- /dev/null
+++ b/drivers/usb/cdns3/gadget.c
@@ -0,0 +1,2738 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Cadence USBSS DRD Driver - gadget side.
+ *
+ * Copyright (C) 2018-2019 Cadence Design Systems.
+ * Copyright (C) 2017-2018 NXP
+ *
+ * Authors: Pawel Jez <pjez@cadence.com>,
+ *          Pawel Laszczak <pawell@cadence.com>
+ *          Peter Chen <peter.chen@nxp.com>
+ */
+
+/*
+ * Work around 1:
+ * At some situations, the controller may get stale data address in TRB
+ * at below sequences:
+ * 1. Controller read TRB includes data address
+ * 2. Software updates TRBs includes data address and Cycle bit
+ * 3. Controller read TRB which includes Cycle bit
+ * 4. DMA run with stale data address
+ *
+ * To fix this problem, driver needs to make the first TRB in TD as invalid.
+ * After preparing all TRBs driver needs to check the position of DMA and
+ * if the DMA point to the first just added TRB and doorbell is 1,
+ * then driver must defer making this TRB as valid. This TRB will be make
+ * as valid during adding next TRB only if DMA is stopped or at TRBERR
+ * interrupt.
+ *
+ * Issue has been fixed in DEV_VER_V3 version of controller.
+ *
+ * Work around 2:
+ * Controller for OUT endpoints has shared on-chip buffers for all incoming
+ * packets, including ep0out. It's FIFO buffer, so packets must be handle by DMA
+ * in correct order. If the first packet in the buffer will not be handled,
+ * then the following packets directed for other endpoints and  functions
+ * will be blocked.
+ * Additionally the packets directed to one endpoint can block entire on-chip
+ * buffers. In this case transfer to other endpoints also will blocked.
+ *
+ * To resolve this issue after raising the descriptor missing interrupt
+ * driver prepares internal usb_request object and use it to arm DMA transfer.
+ *
+ * The problematic situation was observed in case when endpoint has been enabled
+ * but no usb_request were queued. Driver try detects such endpoints and will
+ * use this workaround only for these endpoint.
+ *
+ * Driver use limited number of buffer. This number can be set by macro
+ * CDNS3_WA2_NUM_BUFFERS.
+ *
+ * Such blocking situation was observed on ACM gadget. For this function
+ * host send OUT data packet but ACM function is not prepared for this packet.
+ * It's cause that buffer placed in on chip memory block transfer to other
+ * endpoints.
+ *
+ * Issue has been fixed in DEV_VER_V2 version of controller.
+ *
+ */
+
+#include <dm.h>
+#include <linux/usb/gadget.h>
+#include <linux/compat.h>
+#include <linux/iopoll.h>
+#include <asm/dma-mapping.h>
+#include <linux/bitmap.h>
+#include <linux/bug.h>
+
+#include "core.h"
+#include "gadget-export.h"
+#include "gadget.h"
+#include "trace.h"
+#include "drd.h"
+
+#define readl_poll_timeout_atomic readl_poll_timeout
+#define usleep_range(a, b) udelay((b))
+
+static int __cdns3_gadget_ep_queue(struct usb_ep *ep,
+				   struct usb_request *request,
+				   gfp_t gfp_flags);
+
+/**
+ * cdns3_set_register_bit - set bit in given register.
+ * @ptr: address of device controller register to be read and changed
+ * @mask: bits requested to set
+ */
+void cdns3_set_register_bit(void __iomem *ptr, u32 mask)
+{
+	mask = readl(ptr) | mask;
+	writel(mask, ptr);
+}
+
+/**
+ * cdns3_ep_addr_to_index - Macro converts endpoint address to
+ * index of endpoint object in cdns3_device.eps[] container
+ * @ep_addr: endpoint address for which endpoint object is required
+ *
+ */
+u8 cdns3_ep_addr_to_index(u8 ep_addr)
+{
+	return (((ep_addr & 0x7F)) + ((ep_addr & USB_DIR_IN) ? 16 : 0));
+}
+
+static int cdns3_get_dma_pos(struct cdns3_device *priv_dev,
+			     struct cdns3_endpoint *priv_ep)
+{
+	int dma_index;
+
+	dma_index = readl(&priv_dev->regs->ep_traddr) - priv_ep->trb_pool_dma;
+
+	return dma_index / TRB_SIZE;
+}
+
+/**
+ * cdns3_next_request - returns next request from list
+ * @list: list containing requests
+ *
+ * Returns request or NULL if no requests in list
+ */
+struct usb_request *cdns3_next_request(struct list_head *list)
+{
+	return list_first_entry_or_null(list, struct usb_request, list);
+}
+
+/**
+ * cdns3_next_align_buf - returns next buffer from list
+ * @list: list containing buffers
+ *
+ * Returns buffer or NULL if no buffers in list
+ */
+struct cdns3_aligned_buf *cdns3_next_align_buf(struct list_head *list)
+{
+	return list_first_entry_or_null(list, struct cdns3_aligned_buf, list);
+}
+
+/**
+ * cdns3_next_priv_request - returns next request from list
+ * @list: list containing requests
+ *
+ * Returns request or NULL if no requests in list
+ */
+struct cdns3_request *cdns3_next_priv_request(struct list_head *list)
+{
+	return list_first_entry_or_null(list, struct cdns3_request, list);
+}
+
+/**
+ * select_ep - selects endpoint
+ * @priv_dev:  extended gadget object
+ * @ep: endpoint address
+ */
+void cdns3_select_ep(struct cdns3_device *priv_dev, u32 ep)
+{
+	if (priv_dev->selected_ep == ep)
+		return;
+
+	priv_dev->selected_ep = ep;
+	writel(ep, &priv_dev->regs->ep_sel);
+}
+
+dma_addr_t cdns3_trb_virt_to_dma(struct cdns3_endpoint *priv_ep,
+				 struct cdns3_trb *trb)
+{
+	u32 offset = (char *)trb - (char *)priv_ep->trb_pool;
+
+	return priv_ep->trb_pool_dma + offset;
+}
+
+int cdns3_ring_size(struct cdns3_endpoint *priv_ep)
+{
+	switch (priv_ep->type) {
+	case USB_ENDPOINT_XFER_ISOC:
+		return TRB_ISO_RING_SIZE;
+	case USB_ENDPOINT_XFER_CONTROL:
+		return TRB_CTRL_RING_SIZE;
+	default:
+		return TRB_RING_SIZE;
+	}
+}
+
+/**
+ * cdns3_allocate_trb_pool - Allocates TRB's pool for selected endpoint
+ * @priv_ep:  endpoint object
+ *
+ * Function will return 0 on success or -ENOMEM on allocation error
+ */
+int cdns3_allocate_trb_pool(struct cdns3_endpoint *priv_ep)
+{
+	int ring_size = cdns3_ring_size(priv_ep);
+	struct cdns3_trb *link_trb;
+
+	if (!priv_ep->trb_pool) {
+		priv_ep->trb_pool =
+		dma_alloc_coherent(ring_size,
+				   (unsigned long *)&priv_ep->trb_pool_dma);
+		if (!priv_ep->trb_pool)
+			return -ENOMEM;
+	} else {
+		memset(priv_ep->trb_pool, 0, ring_size);
+	}
+
+	if (!priv_ep->num)
+		return 0;
+
+	priv_ep->num_trbs = ring_size / TRB_SIZE;
+	/* Initialize the last TRB as Link TRB. */
+	link_trb = (priv_ep->trb_pool + (priv_ep->num_trbs - 1));
+	link_trb->buffer = TRB_BUFFER(priv_ep->trb_pool_dma);
+	link_trb->control = TRB_CYCLE | TRB_TYPE(TRB_LINK) | TRB_TOGGLE;
+
+	return 0;
+}
+
+static void cdns3_free_trb_pool(struct cdns3_endpoint *priv_ep)
+{
+	if (priv_ep->trb_pool) {
+		dma_free_coherent(priv_ep->trb_pool);
+		priv_ep->trb_pool = NULL;
+	}
+}
+
+/**
+ * cdns3_ep_stall_flush - Stalls and flushes selected endpoint
+ * @priv_ep: endpoint object
+ *
+ * Endpoint must be selected before call to this function
+ */
+static void cdns3_ep_stall_flush(struct cdns3_endpoint *priv_ep)
+{
+	struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
+	int val;
+
+	trace_cdns3_halt(priv_ep, 1, 1);
+
+	writel(EP_CMD_DFLUSH | EP_CMD_ERDY | EP_CMD_SSTALL,
+	       &priv_dev->regs->ep_cmd);
+
+	/* wait for DFLUSH cleared */
+	readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
+				  !(val & EP_CMD_DFLUSH), 1000);
+	priv_ep->flags |= EP_STALLED;
+	priv_ep->flags &= ~EP_STALL_PENDING;
+}
+
+/**
+ * cdns3_hw_reset_eps_config - reset endpoints configuration kept by controller.
+ * @priv_dev: extended gadget object
+ */
+void cdns3_hw_reset_eps_config(struct cdns3_device *priv_dev)
+{
+	writel(USB_CONF_CFGRST, &priv_dev->regs->usb_conf);
+
+	cdns3_allow_enable_l1(priv_dev, 0);
+	priv_dev->hw_configured_flag = 0;
+	priv_dev->onchip_used_size = 0;
+	priv_dev->out_mem_is_allocated = 0;
+	priv_dev->wait_for_setup = 0;
+}
+
+/**
+ * cdns3_ep_inc_trb - increment a trb index.
+ * @index: Pointer to the TRB index to increment.
+ * @cs: Cycle state
+ * @trb_in_seg: number of TRBs in segment
+ *
+ * The index should never point to the link TRB. After incrementing,
+ * if it is point to the link TRB, wrap around to the beginning and revert
+ * cycle state bit The
+ * link TRB is always at the last TRB entry.
+ */
+static void cdns3_ep_inc_trb(int *index, u8 *cs, int trb_in_seg)
+{
+	(*index)++;
+	if (*index == (trb_in_seg - 1)) {
+		*index = 0;
+		*cs ^=  1;
+	}
+}
+
+/**
+ * cdns3_ep_inc_enq - increment endpoint's enqueue pointer
+ * @priv_ep: The endpoint whose enqueue pointer we're incrementing
+ */
+static void cdns3_ep_inc_enq(struct cdns3_endpoint *priv_ep)
+{
+	priv_ep->free_trbs--;
+	cdns3_ep_inc_trb(&priv_ep->enqueue, &priv_ep->pcs, priv_ep->num_trbs);
+}
+
+/**
+ * cdns3_ep_inc_deq - increment endpoint's dequeue pointer
+ * @priv_ep: The endpoint whose dequeue pointer we're incrementing
+ */
+static void cdns3_ep_inc_deq(struct cdns3_endpoint *priv_ep)
+{
+	priv_ep->free_trbs++;
+	cdns3_ep_inc_trb(&priv_ep->dequeue, &priv_ep->ccs, priv_ep->num_trbs);
+}
+
+void cdns3_move_deq_to_next_trb(struct cdns3_request *priv_req)
+{
+	struct cdns3_endpoint *priv_ep = priv_req->priv_ep;
+	int current_trb = priv_req->start_trb;
+
+	while (current_trb != priv_req->end_trb) {
+		cdns3_ep_inc_deq(priv_ep);
+		current_trb = priv_ep->dequeue;
+	}
+
+	cdns3_ep_inc_deq(priv_ep);
+}
+
+/**
+ * cdns3_allow_enable_l1 - enable/disable permits to transition to L1.
+ * @priv_dev: Extended gadget object
+ * @enable: Enable/disable permit to transition to L1.
+ *
+ * If bit USB_CONF_L1EN is set and device receive Extended Token packet,
+ * then controller answer with ACK handshake.
+ * If bit USB_CONF_L1DS is set and device receive Extended Token packet,
+ * then controller answer with NYET handshake.
+ */
+void cdns3_allow_enable_l1(struct cdns3_device *priv_dev, int enable)
+{
+	if (enable)
+		writel(USB_CONF_L1EN, &priv_dev->regs->usb_conf);
+	else
+		writel(USB_CONF_L1DS, &priv_dev->regs->usb_conf);
+}
+
+enum usb_device_speed cdns3_get_speed(struct cdns3_device *priv_dev)
+{
+	u32 reg;
+
+	reg = readl(&priv_dev->regs->usb_sts);
+
+	if (DEV_SUPERSPEED(reg))
+		return USB_SPEED_SUPER;
+	else if (DEV_HIGHSPEED(reg))
+		return USB_SPEED_HIGH;
+	else if (DEV_FULLSPEED(reg))
+		return USB_SPEED_FULL;
+	else if (DEV_LOWSPEED(reg))
+		return USB_SPEED_LOW;
+	return USB_SPEED_UNKNOWN;
+}
+
+/**
+ * cdns3_start_all_request - add to ring all request not started
+ * @priv_dev: Extended gadget object
+ * @priv_ep: The endpoint for whom request will be started.
+ *
+ * Returns return ENOMEM if transfer ring i not enough TRBs to start
+ *         all requests.
+ */
+static int cdns3_start_all_request(struct cdns3_device *priv_dev,
+				   struct cdns3_endpoint *priv_ep)
+{
+	struct usb_request *request;
+	int ret = 0;
+
+	while (!list_empty(&priv_ep->deferred_req_list)) {
+		request = cdns3_next_request(&priv_ep->deferred_req_list);
+
+		ret = cdns3_ep_run_transfer(priv_ep, request);
+		if (ret)
+			return ret;
+
+		list_del(&request->list);
+		list_add_tail(&request->list,
+			      &priv_ep->pending_req_list);
+	}
+
+	priv_ep->flags &= ~EP_RING_FULL;
+	return ret;
+}
+
+/*
+ * WA2: Set flag for all not ISOC OUT endpoints. If this flag is set
+ * driver try to detect whether endpoint need additional internal
+ * buffer for unblocking on-chip FIFO buffer. This flag will be cleared
+ * if before first DESCMISS interrupt the DMA will be armed.
+ */
+#define cdns3_wa2_enable_detection(priv_dev, ep_priv, reg) do { \
+	if (!priv_ep->dir && priv_ep->type != USB_ENDPOINT_XFER_ISOC) { \
+		priv_ep->flags |= EP_QUIRK_EXTRA_BUF_DET; \
+		(reg) |= EP_STS_EN_DESCMISEN; \
+	} } while (0)
+
+/**
+ * cdns3_wa2_descmiss_copy_data copy data from internal requests to
+ * request queued by class driver.
+ * @priv_ep: extended endpoint object
+ * @request: request object
+ */
+static void cdns3_wa2_descmiss_copy_data(struct cdns3_endpoint *priv_ep,
+					 struct usb_request *request)
+{
+	struct usb_request *descmiss_req;
+	struct cdns3_request *descmiss_priv_req;
+
+	while (!list_empty(&priv_ep->wa2_descmiss_req_list)) {
+		int chunk_end;
+		int length;
+
+		descmiss_priv_req =
+			cdns3_next_priv_request(&priv_ep->wa2_descmiss_req_list);
+		descmiss_req = &descmiss_priv_req->request;
+
+		/* driver can't touch pending request */
+		if (descmiss_priv_req->flags & REQUEST_PENDING)
+			break;
+
+		chunk_end = descmiss_priv_req->flags & REQUEST_INTERNAL_CH;
+		length = request->actual + descmiss_req->actual;
+
+		request->status = descmiss_req->status;
+
+		if (length <= request->length) {
+			memcpy(&((u8 *)request->buf)[request->actual],
+			       descmiss_req->buf,
+			       descmiss_req->actual);
+			request->actual = length;
+		} else {
+			/* It should never occur */
+			request->status = -ENOMEM;
+		}
+
+		list_del_init(&descmiss_priv_req->list);
+
+		kfree(descmiss_req->buf);
+		cdns3_gadget_ep_free_request(&priv_ep->endpoint, descmiss_req);
+		--priv_ep->wa2_counter;
+
+		if (!chunk_end)
+			break;
+	}
+}
+
+struct usb_request *cdns3_wa2_gadget_giveback(struct cdns3_device *priv_dev,
+					      struct cdns3_endpoint *priv_ep,
+					      struct cdns3_request *priv_req)
+{
+	if (priv_ep->flags & EP_QUIRK_EXTRA_BUF_EN &&
+	    priv_req->flags & REQUEST_INTERNAL) {
+		struct usb_request *req;
+
+		req = cdns3_next_request(&priv_ep->deferred_req_list);
+
+		priv_ep->descmis_req = NULL;
+
+		if (!req)
+			return NULL;
+
+		cdns3_wa2_descmiss_copy_data(priv_ep, req);
+		if (!(priv_ep->flags & EP_QUIRK_END_TRANSFER) &&
+		    req->length != req->actual) {
+			/* wait for next part of transfer */
+			return NULL;
+		}
+
+		if (req->status == -EINPROGRESS)
+			req->status = 0;
+
+		list_del_init(&req->list);
+		cdns3_start_all_request(priv_dev, priv_ep);
+		return req;
+	}
+
+	return &priv_req->request;
+}
+
+int cdns3_wa2_gadget_ep_queue(struct cdns3_device *priv_dev,
+			      struct cdns3_endpoint *priv_ep,
+			      struct cdns3_request *priv_req)
+{
+	int deferred = 0;
+
+	/*
+	 * If transfer was queued before DESCMISS appear than we
+	 * can disable handling of DESCMISS interrupt. Driver assumes that it
+	 * can disable special treatment for this endpoint.
+	 */
+	if (priv_ep->flags & EP_QUIRK_EXTRA_BUF_DET) {
+		u32 reg;
+
+		cdns3_select_ep(priv_dev, priv_ep->num | priv_ep->dir);
+		priv_ep->flags &= ~EP_QUIRK_EXTRA_BUF_DET;
+		reg = readl(&priv_dev->regs->ep_sts_en);
+		reg &= ~EP_STS_EN_DESCMISEN;
+		trace_cdns3_wa2(priv_ep, "workaround disabled\n");
+		writel(reg, &priv_dev->regs->ep_sts_en);
+	}
+
+	if (priv_ep->flags & EP_QUIRK_EXTRA_BUF_EN) {
+		u8 pending_empty = list_empty(&priv_ep->pending_req_list);
+		u8 descmiss_empty = list_empty(&priv_ep->wa2_descmiss_req_list);
+
+		/*
+		 *  DESCMISS transfer has been finished, so data will be
+		 *  directly copied from internal allocated usb_request
+		 *  objects.
+		 */
+		if (pending_empty && !descmiss_empty &&
+		    !(priv_req->flags & REQUEST_INTERNAL)) {
+			cdns3_wa2_descmiss_copy_data(priv_ep,
+						     &priv_req->request);
+
+			trace_cdns3_wa2(priv_ep, "get internal stored data");
+
+			list_add_tail(&priv_req->request.list,
+				      &priv_ep->pending_req_list);
+			cdns3_gadget_giveback(priv_ep, priv_req,
+					      priv_req->request.status);
+
+			/*
+			 * Intentionally driver returns positive value as
+			 * correct value. It informs that transfer has
+			 * been finished.
+			 */
+			return EINPROGRESS;
+		}
+
+		/*
+		 * Driver will wait for completion DESCMISS transfer,
+		 * before starts new, not DESCMISS transfer.
+		 */
+		if (!pending_empty && !descmiss_empty) {
+			trace_cdns3_wa2(priv_ep, "wait for pending transfer\n");
+			deferred = 1;
+		}
+
+		if (priv_req->flags & REQUEST_INTERNAL)
+			list_add_tail(&priv_req->list,
+				      &priv_ep->wa2_descmiss_req_list);
+	}
+
+	return deferred;
+}
+
+static void cdns3_wa2_remove_old_request(struct cdns3_endpoint *priv_ep)
+{
+	struct cdns3_request *priv_req;
+
+	while (!list_empty(&priv_ep->wa2_descmiss_req_list)) {
+		u8 chain;
+
+		priv_req = cdns3_next_priv_request(&priv_ep->wa2_descmiss_req_list);
+		chain = !!(priv_req->flags & REQUEST_INTERNAL_CH);
+
+		trace_cdns3_wa2(priv_ep, "removes eldest request");
+
+		kfree(priv_req->request.buf);
+		cdns3_gadget_ep_free_request(&priv_ep->endpoint,
+					     &priv_req->request);
+		list_del_init(&priv_req->list);
+		--priv_ep->wa2_counter;
+
+		if (!chain)
+			break;
+	}
+}
+
+/**
+ * cdns3_wa2_descmissing_packet - handles descriptor missing event.
+ * @priv_dev: extended gadget object
+ *
+ * This function is used only for WA2. For more information see Work around 2
+ * description.
+ */
+static void cdns3_wa2_descmissing_packet(struct cdns3_endpoint *priv_ep)
+{
+	struct cdns3_request *priv_req;
+	struct usb_request *request;
+
+	if (priv_ep->flags & EP_QUIRK_EXTRA_BUF_DET) {
+		priv_ep->flags &= ~EP_QUIRK_EXTRA_BUF_DET;
+		priv_ep->flags |= EP_QUIRK_EXTRA_BUF_EN;
+	}
+
+	trace_cdns3_wa2(priv_ep, "Description Missing detected\n");
+
+	if (priv_ep->wa2_counter >= CDNS3_WA2_NUM_BUFFERS)
+		cdns3_wa2_remove_old_request(priv_ep);
+
+	request = cdns3_gadget_ep_alloc_request(&priv_ep->endpoint,
+						GFP_ATOMIC);
+	if (!request)
+		goto err;
+
+	priv_req = to_cdns3_request(request);
+	priv_req->flags |= REQUEST_INTERNAL;
+
+	/* if this field is still assigned it indicate that transfer related
+	 * with this request has not been finished yet. Driver in this
+	 * case simply allocate next request and assign flag REQUEST_INTERNAL_CH
+	 * flag to previous one. It will indicate that current request is
+	 * part of the previous one.
+	 */
+	if (priv_ep->descmis_req)
+		priv_ep->descmis_req->flags |= REQUEST_INTERNAL_CH;
+
+	priv_req->request.buf = kzalloc(CDNS3_DESCMIS_BUF_SIZE,
+					GFP_ATOMIC);
+	priv_ep->wa2_counter++;
+
+	if (!priv_req->request.buf) {
+		cdns3_gadget_ep_free_request(&priv_ep->endpoint, request);
+		goto err;
+	}
+
+	priv_req->request.length = CDNS3_DESCMIS_BUF_SIZE;
+	priv_ep->descmis_req = priv_req;
+
+	__cdns3_gadget_ep_queue(&priv_ep->endpoint,
+				&priv_ep->descmis_req->request,
+				GFP_ATOMIC);
+
+	return;
+
+err:
+	dev_err(priv_ep->cdns3_dev->dev,
+		"Failed: No sufficient memory for DESCMIS\n");
+}
+
+/**
+ * cdns3_gadget_giveback - call struct usb_request's ->complete callback
+ * @priv_ep: The endpoint to whom the request belongs to
+ * @priv_req: The request we're giving back
+ * @status: completion code for the request
+ *
+ * Must be called with controller's lock held and interrupts disabled. This
+ * function will unmap @req and call its ->complete() callback to notify upper
+ * layers that it has completed.
+ */
+void cdns3_gadget_giveback(struct cdns3_endpoint *priv_ep,
+			   struct cdns3_request *priv_req,
+			   int status)
+{
+	struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
+	struct usb_request *request = &priv_req->request;
+
+	list_del_init(&request->list);
+
+	if (request->status == -EINPROGRESS)
+		request->status = status;
+
+	usb_gadget_unmap_request(&priv_dev->gadget, request,
+				 priv_ep->dir);
+
+	if ((priv_req->flags & REQUEST_UNALIGNED) &&
+	    priv_ep->dir == USB_DIR_OUT && !request->status)
+		memcpy(request->buf, priv_req->aligned_buf->buf,
+		       request->length);
+
+	priv_req->flags &= ~(REQUEST_PENDING | REQUEST_UNALIGNED);
+	trace_cdns3_gadget_giveback(priv_req);
+
+	if (priv_dev->dev_ver < DEV_VER_V2) {
+		request = cdns3_wa2_gadget_giveback(priv_dev, priv_ep,
+						    priv_req);
+		if (!request)
+			return;
+	}
+
+	if (request->complete) {
+		spin_unlock(&priv_dev->lock);
+		usb_gadget_giveback_request(&priv_ep->endpoint,
+					    request);
+		spin_lock(&priv_dev->lock);
+	}
+
+	if (request->buf == priv_dev->zlp_buf)
+		cdns3_gadget_ep_free_request(&priv_ep->endpoint, request);
+}
+
+void cdns3_wa1_restore_cycle_bit(struct cdns3_endpoint *priv_ep)
+{
+	/* Work around for stale data address in TRB*/
+	if (priv_ep->wa1_set) {
+		trace_cdns3_wa1(priv_ep, "restore cycle bit");
+
+		priv_ep->wa1_set = 0;
+		priv_ep->wa1_trb_index = 0xFFFF;
+		if (priv_ep->wa1_cycle_bit) {
+			priv_ep->wa1_trb->control =
+				priv_ep->wa1_trb->control | 0x1;
+		} else {
+			priv_ep->wa1_trb->control =
+				priv_ep->wa1_trb->control & ~0x1;
+		}
+	}
+}
+
+static void cdns3_free_aligned_request_buf(struct cdns3_device *priv_dev)
+{
+	struct cdns3_aligned_buf *buf, *tmp;
+	unsigned long flags;
+
+	spin_lock_irqsave(&priv_dev->lock, flags);
+
+	list_for_each_entry_safe(buf, tmp, &priv_dev->aligned_buf_list, list) {
+		if (!buf->in_use) {
+			list_del(&buf->list);
+
+			/*
+			 * Re-enable interrupts to free DMA capable memory.
+			 * Driver can't free this memory with disabled
+			 * interrupts.
+			 */
+			spin_unlock_irqrestore(&priv_dev->lock, flags);
+			dma_free_coherent(buf->buf);
+			kfree(buf);
+			spin_lock_irqsave(&priv_dev->lock, flags);
+		}
+	}
+
+	spin_unlock_irqrestore(&priv_dev->lock, flags);
+}
+
+static int cdns3_prepare_aligned_request_buf(struct cdns3_request *priv_req)
+{
+	struct cdns3_endpoint *priv_ep = priv_req->priv_ep;
+	struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
+	struct cdns3_aligned_buf *buf;
+
+	/* check if buffer is aligned to 8. */
+	if (!((uintptr_t)priv_req->request.buf & 0x7))
+		return 0;
+
+	buf = priv_req->aligned_buf;
+
+	if (!buf || priv_req->request.length > buf->size) {
+		buf = kzalloc(sizeof(*buf), GFP_ATOMIC);
+		if (!buf)
+			return -ENOMEM;
+
+		buf->size = priv_req->request.length;
+
+		buf->buf = dma_alloc_coherent(buf->size,
+					      (unsigned long *)&buf->dma);
+		if (!buf->buf) {
+			kfree(buf);
+			return -ENOMEM;
+		}
+
+		if (priv_req->aligned_buf) {
+			trace_cdns3_free_aligned_request(priv_req);
+			priv_req->aligned_buf->in_use = 0;
+#ifndef __UBOOT__
+			queue_work(system_freezable_wq,
+				   &priv_dev->aligned_buf_wq);
+#else
+			cdns3_free_aligned_request_buf(priv_dev);
+#endif
+		}
+
+		buf->in_use = 1;
+		priv_req->aligned_buf = buf;
+
+		list_add_tail(&buf->list,
+			      &priv_dev->aligned_buf_list);
+	}
+
+	if (priv_ep->dir == USB_DIR_IN) {
+		memcpy(buf->buf, priv_req->request.buf,
+		       priv_req->request.length);
+	}
+
+	priv_req->flags |= REQUEST_UNALIGNED;
+	trace_cdns3_prepare_aligned_request(priv_req);
+
+	return 0;
+}
+
+static int cdns3_wa1_update_guard(struct cdns3_endpoint *priv_ep,
+				  struct cdns3_trb *trb)
+{
+	struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
+
+	if (!priv_ep->wa1_set) {
+		u32 doorbell;
+
+		doorbell = !!(readl(&priv_dev->regs->ep_cmd) & EP_CMD_DRDY);
+
+		if (doorbell) {
+			priv_ep->wa1_cycle_bit = priv_ep->pcs ? TRB_CYCLE : 0;
+			priv_ep->wa1_set = 1;
+			priv_ep->wa1_trb = trb;
+			priv_ep->wa1_trb_index = priv_ep->enqueue;
+			trace_cdns3_wa1(priv_ep, "set guard");
+			return 0;
+		}
+	}
+	return 1;
+}
+
+static void cdns3_wa1_tray_restore_cycle_bit(struct cdns3_device *priv_dev,
+					     struct cdns3_endpoint *priv_ep)
+{
+	int dma_index;
+	u32 doorbell;
+
+	doorbell = !!(readl(&priv_dev->regs->ep_cmd) & EP_CMD_DRDY);
+	dma_index = cdns3_get_dma_pos(priv_dev, priv_ep);
+
+	if (!doorbell || dma_index != priv_ep->wa1_trb_index)
+		cdns3_wa1_restore_cycle_bit(priv_ep);
+}
+
+/**
+ * cdns3_ep_run_transfer - start transfer on no-default endpoint hardware
+ * @priv_ep: endpoint object
+ *
+ * Returns zero on success or negative value on failure
+ */
+int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep,
+			  struct usb_request *request)
+{
+	struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
+	struct cdns3_request *priv_req;
+	struct cdns3_trb *trb;
+	dma_addr_t trb_dma;
+	u32 togle_pcs = 1;
+	int sg_iter = 0;
+	int num_trb = 1;
+	int address;
+	u32 control;
+	int pcs;
+
+	if (num_trb > priv_ep->free_trbs) {
+		priv_ep->flags |= EP_RING_FULL;
+		return -ENOBUFS;
+	}
+
+	priv_req = to_cdns3_request(request);
+	address = priv_ep->endpoint.desc->bEndpointAddress;
+
+	priv_ep->flags |= EP_PENDING_REQUEST;
+
+	/* must allocate buffer aligned to 8 */
+	if (priv_req->flags & REQUEST_UNALIGNED)
+		trb_dma = priv_req->aligned_buf->dma;
+	else
+		trb_dma = request->dma;
+
+	trb = priv_ep->trb_pool + priv_ep->enqueue;
+	priv_req->start_trb = priv_ep->enqueue;
+	priv_req->trb = trb;
+
+	cdns3_select_ep(priv_ep->cdns3_dev, address);
+
+	/* prepare ring */
+	if ((priv_ep->enqueue + num_trb)  >= (priv_ep->num_trbs - 1)) {
+		struct cdns3_trb *link_trb;
+		int doorbell, dma_index;
+		u32 ch_bit = 0;
+
+		doorbell = !!(readl(&priv_dev->regs->ep_cmd) & EP_CMD_DRDY);
+		dma_index = cdns3_get_dma_pos(priv_dev, priv_ep);
+
+		/* Driver can't update LINK TRB if it is current processed. */
+		if (doorbell && dma_index == priv_ep->num_trbs - 1) {
+			priv_ep->flags |= EP_DEFERRED_DRDY;
+			return -ENOBUFS;
+		}
+
+		/*updating C bt in  Link TRB before starting DMA*/
+		link_trb = priv_ep->trb_pool + (priv_ep->num_trbs - 1);
+		/*
+		 * For TRs size equal 2 enabling TRB_CHAIN for epXin causes
+		 * that DMA stuck at the LINK TRB.
+		 * On the other hand, removing TRB_CHAIN for longer TRs for
+		 * epXout cause that DMA stuck after handling LINK TRB.
+		 * To eliminate this strange behavioral driver set TRB_CHAIN
+		 * bit only for TR size > 2.
+		 */
+		if (priv_ep->type == USB_ENDPOINT_XFER_ISOC ||
+		    TRBS_PER_SEGMENT > 2)
+			ch_bit = TRB_CHAIN;
+
+		link_trb->control = ((priv_ep->pcs) ? TRB_CYCLE : 0) |
+				    TRB_TYPE(TRB_LINK) | TRB_TOGGLE | ch_bit;
+	}
+
+	if (priv_dev->dev_ver <= DEV_VER_V2)
+		togle_pcs = cdns3_wa1_update_guard(priv_ep, trb);
+
+	/* set incorrect Cycle Bit for first trb*/
+	control = priv_ep->pcs ? 0 : TRB_CYCLE;
+
+	do {
+		u32 length;
+		u16 td_size = 0;
+
+		/* fill TRB */
+		control |= TRB_TYPE(TRB_NORMAL);
+		trb->buffer = TRB_BUFFER(trb_dma);
+
+		length = request->length;
+
+		if (likely(priv_dev->dev_ver >= DEV_VER_V2))
+			td_size = DIV_ROUND_UP(length,
+					       priv_ep->endpoint.maxpacket);
+
+		trb->length = TRB_BURST_LEN(priv_ep->trb_burst_size) |
+					TRB_LEN(length);
+		if (priv_dev->gadget.speed == USB_SPEED_SUPER)
+			trb->length |= TRB_TDL_SS_SIZE(td_size);
+		else
+			control |= TRB_TDL_HS_SIZE(td_size);
+
+		pcs = priv_ep->pcs ? TRB_CYCLE : 0;
+
+		/*
+		 * first trb should be prepared as last to avoid processing
+		 *  transfer to early
+		 */
+		if (sg_iter != 0)
+			control |= pcs;
+
+		if (priv_ep->type == USB_ENDPOINT_XFER_ISOC  && !priv_ep->dir) {
+			control |= TRB_IOC | TRB_ISP;
+		} else {
+			/* for last element in TD or in SG list */
+			if (sg_iter == (num_trb - 1) && sg_iter != 0)
+				control |= pcs | TRB_IOC | TRB_ISP;
+		}
+
+		if (sg_iter)
+			trb->control = control;
+		else
+			priv_req->trb->control = control;
+
+		control = 0;
+		++sg_iter;
+		priv_req->end_trb = priv_ep->enqueue;
+		cdns3_ep_inc_enq(priv_ep);
+		trb = priv_ep->trb_pool + priv_ep->enqueue;
+	} while (sg_iter < num_trb);
+
+	trb = priv_req->trb;
+
+	priv_req->flags |= REQUEST_PENDING;
+
+	if (sg_iter == 1)
+		trb->control |= TRB_IOC | TRB_ISP;
+
+	/*
+	 * Memory barrier - cycle bit must be set before other filds in trb.
+	 */
+	dmb();
+
+	/* give the TD to the consumer*/
+	if (togle_pcs)
+		trb->control =  trb->control ^ 1;
+
+	if (priv_dev->dev_ver <= DEV_VER_V2)
+		cdns3_wa1_tray_restore_cycle_bit(priv_dev, priv_ep);
+
+	trace_cdns3_prepare_trb(priv_ep, priv_req->trb);
+
+	/*
+	 * Memory barrier - Cycle Bit must be set before trb->length  and
+	 * trb->buffer fields.
+	 */
+	dmb();
+
+	/*
+	 * For DMULT mode we can set address to transfer ring only once after
+	 * enabling endpoint.
+	 */
+	if (priv_ep->flags & EP_UPDATE_EP_TRBADDR) {
+		/*
+		 * Until SW is not ready to handle the OUT transfer the ISO OUT
+		 * Endpoint should be disabled (EP_CFG.ENABLE = 0).
+		 * EP_CFG_ENABLE must be set before updating ep_traddr.
+		 */
+		if (priv_ep->type == USB_ENDPOINT_XFER_ISOC  && !priv_ep->dir &&
+		    !(priv_ep->flags & EP_QUIRK_ISO_OUT_EN)) {
+			priv_ep->flags |= EP_QUIRK_ISO_OUT_EN;
+			cdns3_set_register_bit(&priv_dev->regs->ep_cfg,
+					       EP_CFG_ENABLE);
+		}
+
+		writel(EP_TRADDR_TRADDR(priv_ep->trb_pool_dma +
+					priv_req->start_trb * TRB_SIZE),
+					&priv_dev->regs->ep_traddr);
+
+		priv_ep->flags &= ~EP_UPDATE_EP_TRBADDR;
+	}
+
+	if (!priv_ep->wa1_set && !(priv_ep->flags & EP_STALLED)) {
+		trace_cdns3_ring(priv_ep);
+		/*clearing TRBERR and EP_STS_DESCMIS before seting DRDY*/
+		writel(EP_STS_TRBERR | EP_STS_DESCMIS, &priv_dev->regs->ep_sts);
+		writel(EP_CMD_DRDY, &priv_dev->regs->ep_cmd);
+		trace_cdns3_doorbell_epx(priv_ep->name,
+					 readl(&priv_dev->regs->ep_traddr));
+	}
+
+	/* WORKAROUND for transition to L0 */
+	__cdns3_gadget_wakeup(priv_dev);
+
+	return 0;
+}
+
+void cdns3_set_hw_configuration(struct cdns3_device *priv_dev)
+{
+	struct cdns3_endpoint *priv_ep;
+	struct usb_ep *ep;
+	int val;
+
+	if (priv_dev->hw_configured_flag)
+		return;
+
+	writel(USB_CONF_CFGSET, &priv_dev->regs->usb_conf);
+	writel(EP_CMD_ERDY | EP_CMD_REQ_CMPL, &priv_dev->regs->ep_cmd);
+
+	cdns3_set_register_bit(&priv_dev->regs->usb_conf,
+			       USB_CONF_U1EN | USB_CONF_U2EN);
+
+	/* wait until configuration set */
+	readl_poll_timeout_atomic(&priv_dev->regs->usb_sts, val,
+				  val & USB_STS_CFGSTS_MASK, 100);
+
+	priv_dev->hw_configured_flag = 1;
+
+	list_for_each_entry(ep, &priv_dev->gadget.ep_list, ep_list) {
+		priv_ep = ep_to_cdns3_ep(ep);
+		if (priv_ep->flags & EP_ENABLED)
+			cdns3_start_all_request(priv_dev, priv_ep);
+	}
+}
+
+/**
+ * cdns3_request_handled - check whether request has been handled by DMA
+ *
+ * @priv_ep: extended endpoint object.
+ * @priv_req: request object for checking
+ *
+ * Endpoint must be selected before invoking this function.
+ *
+ * Returns false if request has not been handled by DMA, else returns true.
+ *
+ * SR - start ring
+ * ER -  end ring
+ * DQ = priv_ep->dequeue - dequeue position
+ * EQ = priv_ep->enqueue -  enqueue position
+ * ST = priv_req->start_trb - index of first TRB in transfer ring
+ * ET = priv_req->end_trb - index of last TRB in transfer ring
+ * CI = current_index - index of processed TRB by DMA.
+ *
+ * As first step, function checks if cycle bit for priv_req->start_trb is
+ * correct.
+ *
+ * some rules:
+ * 1. priv_ep->dequeue never exceed current_index.
+ * 2  priv_ep->enqueue never exceed priv_ep->dequeue
+ * 3. exception: priv_ep->enqueue == priv_ep->dequeue
+ *    and priv_ep->free_trbs is zero.
+ *    This case indicate that TR is full.
+ *
+ * Then We can split recognition into two parts:
+ * Case 1 - priv_ep->dequeue < current_index
+ *      SR ... EQ ... DQ ... CI ... ER
+ *      SR ... DQ ... CI ... EQ ... ER
+ *
+ *      Request has been handled by DMA if ST and ET is between DQ and CI.
+ *
+ * Case 2 - priv_ep->dequeue > current_index
+ * This situation take place when CI go through the LINK TRB at the end of
+ * transfer ring.
+ *      SR ... CI ... EQ ... DQ ... ER
+ *
+ *      Request has been handled by DMA if ET is less then CI or
+ *      ET is greater or equal DQ.
+ */
+static bool cdns3_request_handled(struct cdns3_endpoint *priv_ep,
+				  struct cdns3_request *priv_req)
+{
+	struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
+	struct cdns3_trb *trb = priv_req->trb;
+	int current_index = 0;
+	int handled = 0;
+	int doorbell;
+
+	current_index = cdns3_get_dma_pos(priv_dev, priv_ep);
+	doorbell = !!(readl(&priv_dev->regs->ep_cmd) & EP_CMD_DRDY);
+
+	trb = &priv_ep->trb_pool[priv_req->start_trb];
+
+	if ((trb->control  & TRB_CYCLE) != priv_ep->ccs)
+		goto finish;
+
+	if (doorbell == 1 && current_index == priv_ep->dequeue)
+		goto finish;
+
+	/* The corner case for TRBS_PER_SEGMENT equal 2). */
+	if (TRBS_PER_SEGMENT == 2 && priv_ep->type != USB_ENDPOINT_XFER_ISOC) {
+		handled = 1;
+		goto finish;
+	}
+
+	if (priv_ep->enqueue == priv_ep->dequeue &&
+	    priv_ep->free_trbs == 0) {
+		handled = 1;
+	} else if (priv_ep->dequeue < current_index) {
+		if ((current_index == (priv_ep->num_trbs - 1)) &&
+		    !priv_ep->dequeue)
+			goto finish;
+
+		if (priv_req->end_trb >= priv_ep->dequeue &&
+		    priv_req->end_trb < current_index)
+			handled = 1;
+	} else if (priv_ep->dequeue  > current_index) {
+		if (priv_req->end_trb  < current_index ||
+		    priv_req->end_trb >= priv_ep->dequeue)
+			handled = 1;
+	}
+
+finish:
+	trace_cdns3_request_handled(priv_req, current_index, handled);
+
+	return handled;
+}
+
+static void cdns3_transfer_completed(struct cdns3_device *priv_dev,
+				     struct cdns3_endpoint *priv_ep)
+{
+	struct cdns3_request *priv_req;
+	struct usb_request *request;
+	struct cdns3_trb *trb;
+
+	while (!list_empty(&priv_ep->pending_req_list)) {
+		request = cdns3_next_request(&priv_ep->pending_req_list);
+		priv_req = to_cdns3_request(request);
+
+		/* Re-select endpoint. It could be changed by other CPU during
+		 * handling usb_gadget_giveback_request.
+		 */
+#ifndef __UBOOT__
+		cdns3_select_ep(priv_dev, priv_ep->endpoint.address);
+#else
+		cdns3_select_ep(priv_dev,
+				priv_ep->endpoint.desc->bEndpointAddress);
+#endif
+
+		if (!cdns3_request_handled(priv_ep, priv_req))
+			goto prepare_next_td;
+
+		trb = priv_ep->trb_pool + priv_ep->dequeue;
+		trace_cdns3_complete_trb(priv_ep, trb);
+
+		if (trb != priv_req->trb)
+			dev_warn(priv_dev->dev,
+				 "request_trb=0x%p, queue_trb=0x%p\n",
+				 priv_req->trb, trb);
+
+		request->actual = TRB_LEN(le32_to_cpu(trb->length));
+		cdns3_move_deq_to_next_trb(priv_req);
+		cdns3_gadget_giveback(priv_ep, priv_req, 0);
+
+		if (priv_ep->type != USB_ENDPOINT_XFER_ISOC &&
+		    TRBS_PER_SEGMENT == 2)
+			break;
+	}
+	priv_ep->flags &= ~EP_PENDING_REQUEST;
+
+prepare_next_td:
+	if (!(priv_ep->flags & EP_STALLED) &&
+	    !(priv_ep->flags & EP_STALL_PENDING))
+		cdns3_start_all_request(priv_dev, priv_ep);
+}
+
+void cdns3_rearm_transfer(struct cdns3_endpoint *priv_ep, u8 rearm)
+{
+	struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
+
+	cdns3_wa1_restore_cycle_bit(priv_ep);
+
+	if (rearm) {
+		trace_cdns3_ring(priv_ep);
+
+		/* Cycle Bit must be updated before arming DMA. */
+		dmb();
+		writel(EP_CMD_DRDY, &priv_dev->regs->ep_cmd);
+
+		__cdns3_gadget_wakeup(priv_dev);
+
+		trace_cdns3_doorbell_epx(priv_ep->name,
+					 readl(&priv_dev->regs->ep_traddr));
+	}
+}
+
+/**
+ * cdns3_check_ep_interrupt_proceed - Processes interrupt related to endpoint
+ * @priv_ep: endpoint object
+ *
+ * Returns 0
+ */
+static int cdns3_check_ep_interrupt_proceed(struct cdns3_endpoint *priv_ep)
+{
+	struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
+	u32 ep_sts_reg;
+
+#ifndef __UBOOT__
+	cdns3_select_ep(priv_dev, priv_ep->endpoint.address);
+#else
+	cdns3_select_ep(priv_dev, priv_ep->endpoint.desc->bEndpointAddress);
+#endif
+
+	trace_cdns3_epx_irq(priv_dev, priv_ep);
+
+	ep_sts_reg = readl(&priv_dev->regs->ep_sts);
+	writel(ep_sts_reg, &priv_dev->regs->ep_sts);
+
+	if (ep_sts_reg & EP_STS_TRBERR) {
+		if (priv_ep->flags & EP_STALL_PENDING &&
+		    !(ep_sts_reg & EP_STS_DESCMIS &&
+		    priv_dev->dev_ver < DEV_VER_V2)) {
+			cdns3_ep_stall_flush(priv_ep);
+		}
+
+		/*
+		 * For isochronous transfer driver completes request on
+		 * IOC or on TRBERR. IOC appears only when device receive
+		 * OUT data packet. If host disable stream or lost some packet
+		 * then the only way to finish all queued transfer is to do it
+		 * on TRBERR event.
+		 */
+		if (priv_ep->type == USB_ENDPOINT_XFER_ISOC &&
+		    !priv_ep->wa1_set) {
+			if (!priv_ep->dir) {
+				u32 ep_cfg = readl(&priv_dev->regs->ep_cfg);
+
+				ep_cfg &= ~EP_CFG_ENABLE;
+				writel(ep_cfg, &priv_dev->regs->ep_cfg);
+				priv_ep->flags &= ~EP_QUIRK_ISO_OUT_EN;
+			}
+			cdns3_transfer_completed(priv_dev, priv_ep);
+		} else if (!(priv_ep->flags & EP_STALLED) &&
+			  !(priv_ep->flags & EP_STALL_PENDING)) {
+			if (priv_ep->flags & EP_DEFERRED_DRDY) {
+				priv_ep->flags &= ~EP_DEFERRED_DRDY;
+				cdns3_start_all_request(priv_dev, priv_ep);
+			} else {
+				cdns3_rearm_transfer(priv_ep,
+						     priv_ep->wa1_set);
+			}
+		}
+	}
+
+	if ((ep_sts_reg & EP_STS_IOC) || (ep_sts_reg & EP_STS_ISP)) {
+		if (priv_ep->flags & EP_QUIRK_EXTRA_BUF_EN) {
+			if (ep_sts_reg & EP_STS_ISP)
+				priv_ep->flags |= EP_QUIRK_END_TRANSFER;
+			else
+				priv_ep->flags &= ~EP_QUIRK_END_TRANSFER;
+		}
+
+		cdns3_transfer_completed(priv_dev, priv_ep);
+	}
+
+	/*
+	 * WA2: this condition should only be meet when
+	 * priv_ep->flags & EP_QUIRK_EXTRA_BUF_DET or
+	 * priv_ep->flags & EP_QUIRK_EXTRA_BUF_EN.
+	 * In other cases this interrupt will be disabled/
+	 */
+	if (ep_sts_reg & EP_STS_DESCMIS && priv_dev->dev_ver < DEV_VER_V2 &&
+	    !(priv_ep->flags & EP_STALLED))
+		cdns3_wa2_descmissing_packet(priv_ep);
+
+	return 0;
+}
+
+static void cdns3_disconnect_gadget(struct cdns3_device *priv_dev)
+{
+	if (priv_dev->gadget_driver && priv_dev->gadget_driver->disconnect) {
+		spin_unlock(&priv_dev->lock);
+		priv_dev->gadget_driver->disconnect(&priv_dev->gadget);
+		spin_lock(&priv_dev->lock);
+	}
+}
+
+/**
+ * cdns3_check_usb_interrupt_proceed - Processes interrupt related to device
+ * @priv_dev: extended gadget object
+ * @usb_ists: bitmap representation of device's reported interrupts
+ * (usb_ists register value)
+ */
+static void cdns3_check_usb_interrupt_proceed(struct cdns3_device *priv_dev,
+					      u32 usb_ists)
+{
+	int speed = 0;
+
+	trace_cdns3_usb_irq(priv_dev, usb_ists);
+	if (usb_ists & USB_ISTS_L1ENTI) {
+		/*
+		 * WORKAROUND: CDNS3 controller has issue with hardware resuming
+		 * from L1. To fix it, if any DMA transfer is pending driver
+		 * must starts driving resume signal immediately.
+		 */
+		if (readl(&priv_dev->regs->drbl))
+			__cdns3_gadget_wakeup(priv_dev);
+	}
+
+	/* Connection detected */
+	if (usb_ists & (USB_ISTS_CON2I | USB_ISTS_CONI)) {
+		speed = cdns3_get_speed(priv_dev);
+		priv_dev->gadget.speed = speed;
+		usb_gadget_set_state(&priv_dev->gadget, USB_STATE_POWERED);
+		cdns3_ep0_config(priv_dev);
+	}
+
+	/* Disconnection detected */
+	if (usb_ists & (USB_ISTS_DIS2I | USB_ISTS_DISI)) {
+		cdns3_disconnect_gadget(priv_dev);
+		priv_dev->gadget.speed = USB_SPEED_UNKNOWN;
+		usb_gadget_set_state(&priv_dev->gadget, USB_STATE_NOTATTACHED);
+		cdns3_hw_reset_eps_config(priv_dev);
+	}
+
+	if (usb_ists & (USB_ISTS_L2ENTI | USB_ISTS_U3ENTI)) {
+		if (priv_dev->gadget_driver &&
+		    priv_dev->gadget_driver->suspend) {
+			spin_unlock(&priv_dev->lock);
+			priv_dev->gadget_driver->suspend(&priv_dev->gadget);
+			spin_lock(&priv_dev->lock);
+		}
+	}
+
+	if (usb_ists & (USB_ISTS_L2EXTI | USB_ISTS_U3EXTI)) {
+		if (priv_dev->gadget_driver &&
+		    priv_dev->gadget_driver->resume) {
+			spin_unlock(&priv_dev->lock);
+			priv_dev->gadget_driver->resume(&priv_dev->gadget);
+			spin_lock(&priv_dev->lock);
+		}
+	}
+
+	/* reset*/
+	if (usb_ists & (USB_ISTS_UWRESI | USB_ISTS_UHRESI | USB_ISTS_U2RESI)) {
+		if (priv_dev->gadget_driver) {
+			spin_unlock(&priv_dev->lock);
+			usb_gadget_udc_reset(&priv_dev->gadget,
+					     priv_dev->gadget_driver);
+			spin_lock(&priv_dev->lock);
+
+			/*read again to check the actual speed*/
+			speed = cdns3_get_speed(priv_dev);
+			priv_dev->gadget.speed = speed;
+			cdns3_hw_reset_eps_config(priv_dev);
+			cdns3_ep0_config(priv_dev);
+		}
+	}
+}
+
+/**
+ * cdns3_device_irq_handler- interrupt handler for device part of controller
+ *
+ * @irq: irq number for cdns3 core device
+ * @data: structure of cdns3
+ *
+ * Returns IRQ_HANDLED or IRQ_NONE
+ */
+static irqreturn_t cdns3_device_irq_handler(int irq, void *data)
+{
+	struct cdns3_device *priv_dev;
+	struct cdns3 *cdns = data;
+	irqreturn_t ret = IRQ_NONE;
+	u32 reg;
+
+	priv_dev = cdns->gadget_dev;
+
+	/* check USB device interrupt */
+	reg = readl(&priv_dev->regs->usb_ists);
+	if (reg) {
+		/* After masking interrupts the new interrupts won't be
+		 * reported in usb_ists/ep_ists. In order to not lose some
+		 * of them driver disables only detected interrupts.
+		 * They will be enabled ASAP after clearing source of
+		 * interrupt. This an unusual behavior only applies to
+		 * usb_ists register.
+		 */
+		reg = ~reg & readl(&priv_dev->regs->usb_ien);
+		/* mask deferred interrupt. */
+		writel(reg, &priv_dev->regs->usb_ien);
+		ret = IRQ_WAKE_THREAD;
+	}
+
+	/* check endpoint interrupt */
+	reg = readl(&priv_dev->regs->ep_ists);
+	if (reg) {
+		writel(0, &priv_dev->regs->ep_ien);
+		ret = IRQ_WAKE_THREAD;
+	}
+
+	return ret;
+}
+
+/**
+ * cdns3_device_thread_irq_handler- interrupt handler for device part
+ * of controller
+ *
+ * @irq: irq number for cdns3 core device
+ * @data: structure of cdns3
+ *
+ * Returns IRQ_HANDLED or IRQ_NONE
+ */
+static irqreturn_t cdns3_device_thread_irq_handler(int irq, void *data)
+{
+	struct cdns3_device *priv_dev;
+	struct cdns3 *cdns = data;
+	irqreturn_t ret = IRQ_NONE;
+	unsigned long flags;
+	int bit;
+	u32 reg;
+
+	priv_dev = cdns->gadget_dev;
+	spin_lock_irqsave(&priv_dev->lock, flags);
+
+	reg = readl(&priv_dev->regs->usb_ists);
+	if (reg) {
+		writel(reg, &priv_dev->regs->usb_ists);
+		writel(USB_IEN_INIT, &priv_dev->regs->usb_ien);
+		cdns3_check_usb_interrupt_proceed(priv_dev, reg);
+		ret = IRQ_HANDLED;
+	}
+
+	reg = readl(&priv_dev->regs->ep_ists);
+
+	/* handle default endpoint OUT */
+	if (reg & EP_ISTS_EP_OUT0) {
+		cdns3_check_ep0_interrupt_proceed(priv_dev, USB_DIR_OUT);
+		ret = IRQ_HANDLED;
+	}
+
+	/* handle default endpoint IN */
+	if (reg & EP_ISTS_EP_IN0) {
+		cdns3_check_ep0_interrupt_proceed(priv_dev, USB_DIR_IN);
+		ret = IRQ_HANDLED;
+	}
+
+	/* check if interrupt from non default endpoint, if no exit */
+	reg &= ~(EP_ISTS_EP_OUT0 | EP_ISTS_EP_IN0);
+	if (!reg)
+		goto irqend;
+
+	for_each_set_bit(bit, (unsigned long *)&reg,
+			 sizeof(u32) * BITS_PER_BYTE) {
+		cdns3_check_ep_interrupt_proceed(priv_dev->eps[bit]);
+		ret = IRQ_HANDLED;
+	}
+
+irqend:
+	writel(~0, &priv_dev->regs->ep_ien);
+	spin_unlock_irqrestore(&priv_dev->lock, flags);
+
+	return ret;
+}
+
+/**
+ * cdns3_ep_onchip_buffer_reserve - Try to reserve onchip buf for EP
+ *
+ * The real reservation will occur during write to EP_CFG register,
+ * this function is used to check if the 'size' reservation is allowed.
+ *
+ * @priv_dev: extended gadget object
+ * @size: the size (KB) for EP would like to allocate
+ * @is_in: endpoint direction
+ *
+ * Return 0 if the required size can met or negative value on failure
+ */
+static int cdns3_ep_onchip_buffer_reserve(struct cdns3_device *priv_dev,
+					  int size, int is_in)
+{
+	int remained;
+
+	/* 2KB are reserved for EP0*/
+	remained = priv_dev->onchip_buffers - priv_dev->onchip_used_size - 2;
+
+	if (is_in) {
+		if (remained < size)
+			return -EPERM;
+
+		priv_dev->onchip_used_size += size;
+	} else {
+		int required;
+
+		/**
+		 *  ALL OUT EPs are shared the same chunk onchip memory, so
+		 * driver checks if it already has assigned enough buffers
+		 */
+		if (priv_dev->out_mem_is_allocated >= size)
+			return 0;
+
+		required = size - priv_dev->out_mem_is_allocated;
+
+		if (required > remained)
+			return -EPERM;
+
+		priv_dev->out_mem_is_allocated += required;
+		priv_dev->onchip_used_size += required;
+	}
+
+	return 0;
+}
+
+void cdns3_configure_dmult(struct cdns3_device *priv_dev,
+			   struct cdns3_endpoint *priv_ep)
+{
+	struct cdns3_usb_regs __iomem *regs = priv_dev->regs;
+
+	/* For dev_ver > DEV_VER_V2 DMULT is configured per endpoint */
+	if (priv_dev->dev_ver <= DEV_VER_V2)
+		writel(USB_CONF_DMULT, &regs->usb_conf);
+
+	if (priv_dev->dev_ver == DEV_VER_V2)
+		writel(USB_CONF2_EN_TDL_TRB, &regs->usb_conf2);
+
+	if (priv_dev->dev_ver >= DEV_VER_V3 && priv_ep) {
+		u32 mask;
+
+		if (priv_ep->dir)
+			mask = BIT(priv_ep->num + 16);
+		else
+			mask = BIT(priv_ep->num);
+
+		if (priv_ep->type != USB_ENDPOINT_XFER_ISOC) {
+			cdns3_set_register_bit(&regs->tdl_from_trb, mask);
+			cdns3_set_register_bit(&regs->tdl_beh, mask);
+			cdns3_set_register_bit(&regs->tdl_beh2, mask);
+			cdns3_set_register_bit(&regs->dma_adv_td, mask);
+		}
+
+		if (priv_ep->type == USB_ENDPOINT_XFER_ISOC && !priv_ep->dir)
+			cdns3_set_register_bit(&regs->tdl_from_trb, mask);
+
+		cdns3_set_register_bit(&regs->dtrans, mask);
+	}
+}
+
+/**
+ * cdns3_ep_config Configure hardware endpoint
+ * @priv_ep: extended endpoint object
+ */
+void cdns3_ep_config(struct cdns3_endpoint *priv_ep)
+{
+	bool is_iso_ep = (priv_ep->type == USB_ENDPOINT_XFER_ISOC);
+	struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
+	u32 bEndpointAddress = priv_ep->num | priv_ep->dir;
+	u32 max_packet_size = 0;
+	u8 maxburst = 0;
+	u32 ep_cfg = 0;
+	u8 buffering;
+	u8 mult = 0;
+	int ret;
+
+	buffering = CDNS3_EP_BUF_SIZE - 1;
+
+	cdns3_configure_dmult(priv_dev, priv_ep);
+
+	switch (priv_ep->type) {
+	case USB_ENDPOINT_XFER_INT:
+		ep_cfg = EP_CFG_EPTYPE(USB_ENDPOINT_XFER_INT);
+
+		if ((priv_dev->dev_ver == DEV_VER_V2 && !priv_ep->dir) ||
+		    priv_dev->dev_ver > DEV_VER_V2)
+			ep_cfg |= EP_CFG_TDL_CHK;
+		break;
+	case USB_ENDPOINT_XFER_BULK:
+		ep_cfg = EP_CFG_EPTYPE(USB_ENDPOINT_XFER_BULK);
+
+		if ((priv_dev->dev_ver == DEV_VER_V2  && !priv_ep->dir) ||
+		    priv_dev->dev_ver > DEV_VER_V2)
+			ep_cfg |= EP_CFG_TDL_CHK;
+		break;
+	default:
+		ep_cfg = EP_CFG_EPTYPE(USB_ENDPOINT_XFER_ISOC);
+		mult = CDNS3_EP_ISO_HS_MULT - 1;
+		buffering = mult + 1;
+	}
+
+	switch (priv_dev->gadget.speed) {
+	case USB_SPEED_FULL:
+		max_packet_size = is_iso_ep ? 1023 : 64;
+		break;
+	case USB_SPEED_HIGH:
+		max_packet_size = is_iso_ep ? 1024 : 512;
+		break;
+	case USB_SPEED_SUPER:
+		/* It's limitation that driver assumes in driver. */
+		mult = 0;
+		max_packet_size = 1024;
+		if (priv_ep->type == USB_ENDPOINT_XFER_ISOC) {
+			maxburst = CDNS3_EP_ISO_SS_BURST - 1;
+			buffering = (mult + 1) *
+				    (maxburst + 1);
+
+			if (priv_ep->interval > 1)
+				buffering++;
+		} else {
+			maxburst = CDNS3_EP_BUF_SIZE - 1;
+		}
+		break;
+	default:
+		/* all other speed are not supported */
+		return;
+	}
+
+	if (max_packet_size == 1024)
+		priv_ep->trb_burst_size = 128;
+	else if (max_packet_size >= 512)
+		priv_ep->trb_burst_size = 64;
+	else
+		priv_ep->trb_burst_size = 16;
+
+	ret = cdns3_ep_onchip_buffer_reserve(priv_dev, buffering + 1,
+					     !!priv_ep->dir);
+	if (ret) {
+		dev_err(priv_dev->dev, "onchip mem is full, ep is invalid\n");
+		return;
+	}
+
+	ep_cfg |= EP_CFG_MAXPKTSIZE(max_packet_size) |
+		  EP_CFG_MULT(mult) |
+		  EP_CFG_BUFFERING(buffering) |
+		  EP_CFG_MAXBURST(maxburst);
+
+	cdns3_select_ep(priv_dev, bEndpointAddress);
+	writel(ep_cfg, &priv_dev->regs->ep_cfg);
+
+	dev_dbg(priv_dev->dev, "Configure %s: with val %08x\n",
+		priv_ep->name, ep_cfg);
+}
+
+/* Find correct direction for HW endpoint according to description */
+static int cdns3_ep_dir_is_correct(struct usb_endpoint_descriptor *desc,
+				   struct cdns3_endpoint *priv_ep)
+{
+	return (priv_ep->endpoint.caps.dir_in && usb_endpoint_dir_in(desc)) ||
+	       (priv_ep->endpoint.caps.dir_out && usb_endpoint_dir_out(desc));
+}
+
+static struct
+cdns3_endpoint *cdns3_find_available_ep(struct cdns3_device *priv_dev,
+					struct usb_endpoint_descriptor *desc)
+{
+	struct usb_ep *ep;
+	struct cdns3_endpoint *priv_ep;
+
+	list_for_each_entry(ep, &priv_dev->gadget.ep_list, ep_list) {
+		unsigned long num;
+		/* ep name pattern likes epXin or epXout */
+		char c[2] = {ep->name[2], '\0'};
+
+		num = simple_strtoul(c, NULL, 10);
+
+		priv_ep = ep_to_cdns3_ep(ep);
+		if (cdns3_ep_dir_is_correct(desc, priv_ep)) {
+			if (!(priv_ep->flags & EP_CLAIMED)) {
+				priv_ep->num  = num;
+				return priv_ep;
+			}
+		}
+	}
+
+	return ERR_PTR(-ENOENT);
+}
+
+/*
+ *  Cadence IP has one limitation that all endpoints must be configured
+ * (Type & MaxPacketSize) before setting configuration through hardware
+ * register, it means we can't change endpoints configuration after
+ * set_configuration.
+ *
+ * This function set EP_CLAIMED flag which is added when the gadget driver
+ * uses usb_ep_autoconfig to configure specific endpoint;
+ * When the udc driver receives set_configurion request,
+ * it goes through all claimed endpoints, and configure all endpoints
+ * accordingly.
+ *
+ * At usb_ep_ops.enable/disable, we only enable and disable endpoint through
+ * ep_cfg register which can be changed after set_configuration, and do
+ * some software operation accordingly.
+ */
+static struct
+usb_ep *cdns3_gadget_match_ep(struct usb_gadget *gadget,
+			      struct usb_endpoint_descriptor *desc,
+			      struct usb_ss_ep_comp_descriptor *comp_desc)
+{
+	struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
+	struct cdns3_endpoint *priv_ep;
+	unsigned long flags;
+
+	priv_ep = cdns3_find_available_ep(priv_dev, desc);
+	if (IS_ERR(priv_ep)) {
+		dev_err(priv_dev->dev, "no available ep\n");
+		return NULL;
+	}
+
+	dev_dbg(priv_dev->dev, "match endpoint: %s\n", priv_ep->name);
+
+	spin_lock_irqsave(&priv_dev->lock, flags);
+	priv_ep->endpoint.desc = desc;
+	priv_ep->dir  = usb_endpoint_dir_in(desc) ? USB_DIR_IN : USB_DIR_OUT;
+	priv_ep->type = usb_endpoint_type(desc);
+	priv_ep->flags |= EP_CLAIMED;
+	priv_ep->interval = desc->bInterval ? BIT(desc->bInterval - 1) : 0;
+
+	spin_unlock_irqrestore(&priv_dev->lock, flags);
+	return &priv_ep->endpoint;
+}
+
+/**
+ * cdns3_gadget_ep_alloc_request Allocates request
+ * @ep: endpoint object associated with request
+ * @gfp_flags: gfp flags
+ *
+ * Returns allocated request address, NULL on allocation error
+ */
+struct usb_request *cdns3_gadget_ep_alloc_request(struct usb_ep *ep,
+						  gfp_t gfp_flags)
+{
+	struct cdns3_endpoint *priv_ep = ep_to_cdns3_ep(ep);
+	struct cdns3_request *priv_req;
+
+	priv_req = kzalloc(sizeof(*priv_req), gfp_flags);
+	if (!priv_req)
+		return NULL;
+
+	priv_req->priv_ep = priv_ep;
+
+	trace_cdns3_alloc_request(priv_req);
+	return &priv_req->request;
+}
+
+/**
+ * cdns3_gadget_ep_free_request Free memory occupied by request
+ * @ep: endpoint object associated with request
+ * @request: request to free memory
+ */
+void cdns3_gadget_ep_free_request(struct usb_ep *ep,
+				  struct usb_request *request)
+{
+	struct cdns3_request *priv_req = to_cdns3_request(request);
+
+	if (priv_req->aligned_buf)
+		priv_req->aligned_buf->in_use = 0;
+
+	trace_cdns3_free_request(priv_req);
+	kfree(priv_req);
+}
+
+/**
+ * cdns3_gadget_ep_enable Enable endpoint
+ * @ep: endpoint object
+ * @desc: endpoint descriptor
+ *
+ * Returns 0 on success, error code elsewhere
+ */
+static int cdns3_gadget_ep_enable(struct usb_ep *ep,
+				  const struct usb_endpoint_descriptor *desc)
+{
+	struct cdns3_endpoint *priv_ep;
+	struct cdns3_device *priv_dev;
+	u32 reg = EP_STS_EN_TRBERREN;
+	u32 bEndpointAddress;
+	unsigned long flags;
+	int enable = 1;
+	int ret;
+	int val;
+
+	priv_ep = ep_to_cdns3_ep(ep);
+	priv_dev = priv_ep->cdns3_dev;
+
+	if (!ep || !desc || desc->bDescriptorType != USB_DT_ENDPOINT) {
+		dev_dbg(priv_dev->dev, "usbss: invalid parameters\n");
+		return -EINVAL;
+	}
+
+	if (!desc->wMaxPacketSize) {
+		dev_err(priv_dev->dev, "usbss: missing wMaxPacketSize\n");
+		return -EINVAL;
+	}
+
+	if (WARN_ON(priv_ep->flags & EP_ENABLED))
+		return 0;
+
+	spin_lock_irqsave(&priv_dev->lock, flags);
+
+	priv_ep->endpoint.desc = desc;
+	priv_ep->type = usb_endpoint_type(desc);
+	priv_ep->interval = desc->bInterval ? BIT(desc->bInterval - 1) : 0;
+
+	if (priv_ep->interval > ISO_MAX_INTERVAL &&
+	    priv_ep->type == USB_ENDPOINT_XFER_ISOC) {
+		dev_err(priv_dev->dev, "Driver is limited to %d period\n",
+			ISO_MAX_INTERVAL);
+
+		ret =  -EINVAL;
+		goto exit;
+	}
+
+	ret = cdns3_allocate_trb_pool(priv_ep);
+
+	if (ret)
+		goto exit;
+
+	bEndpointAddress = priv_ep->num | priv_ep->dir;
+	cdns3_select_ep(priv_dev, bEndpointAddress);
+
+	trace_cdns3_gadget_ep_enable(priv_ep);
+
+	writel(EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
+
+	ret = readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
+					!(val & (EP_CMD_CSTALL | EP_CMD_EPRST)),
+					1000);
+
+	if (unlikely(ret)) {
+		cdns3_free_trb_pool(priv_ep);
+		ret =  -EINVAL;
+		goto exit;
+	}
+
+	/* enable interrupt for selected endpoint */
+	cdns3_set_register_bit(&priv_dev->regs->ep_ien,
+			       BIT(cdns3_ep_addr_to_index(bEndpointAddress)));
+
+	if (priv_dev->dev_ver < DEV_VER_V2)
+		cdns3_wa2_enable_detection(priv_dev, priv_ep, reg);
+
+	writel(reg, &priv_dev->regs->ep_sts_en);
+
+	/*
+	 * For some versions of controller at some point during ISO OUT traffic
+	 * DMA reads Transfer Ring for the EP which has never got doorbell.
+	 * This issue was detected only on simulation, but to avoid this issue
+	 * driver add protection against it. To fix it driver enable ISO OUT
+	 * endpoint before setting DRBL. This special treatment of ISO OUT
+	 * endpoints are recommended by controller specification.
+	 */
+	if (priv_ep->type == USB_ENDPOINT_XFER_ISOC  && !priv_ep->dir)
+		enable = 0;
+
+	if (enable)
+		cdns3_set_register_bit(&priv_dev->regs->ep_cfg, EP_CFG_ENABLE);
+
+	ep->desc = desc;
+	priv_ep->flags &= ~(EP_PENDING_REQUEST | EP_STALLED | EP_STALL_PENDING |
+			    EP_QUIRK_ISO_OUT_EN | EP_QUIRK_EXTRA_BUF_EN);
+	priv_ep->flags |= EP_ENABLED | EP_UPDATE_EP_TRBADDR;
+	priv_ep->wa1_set = 0;
+	priv_ep->enqueue = 0;
+	priv_ep->dequeue = 0;
+	reg = readl(&priv_dev->regs->ep_sts);
+	priv_ep->pcs = !!EP_STS_CCS(reg);
+	priv_ep->ccs = !!EP_STS_CCS(reg);
+	/* one TRB is reserved for link TRB used in DMULT mode*/
+	priv_ep->free_trbs = priv_ep->num_trbs - 1;
+exit:
+	spin_unlock_irqrestore(&priv_dev->lock, flags);
+
+	return ret;
+}
+
+/**
+ * cdns3_gadget_ep_disable Disable endpoint
+ * @ep: endpoint object
+ *
+ * Returns 0 on success, error code elsewhere
+ */
+static int cdns3_gadget_ep_disable(struct usb_ep *ep)
+{
+	struct cdns3_endpoint *priv_ep;
+	struct cdns3_request *priv_req;
+	struct cdns3_device *priv_dev;
+	struct usb_request *request;
+	unsigned long flags;
+	int ret = 0;
+	u32 ep_cfg;
+	int val;
+
+	if (!ep) {
+		pr_err("usbss: invalid parameters\n");
+		return -EINVAL;
+	}
+
+	priv_ep = ep_to_cdns3_ep(ep);
+	priv_dev = priv_ep->cdns3_dev;
+
+	if (WARN_ON(!(priv_ep->flags & EP_ENABLED)))
+		return 0;
+
+	spin_lock_irqsave(&priv_dev->lock, flags);
+
+	trace_cdns3_gadget_ep_disable(priv_ep);
+
+	cdns3_select_ep(priv_dev, ep->desc->bEndpointAddress);
+
+	ep_cfg = readl(&priv_dev->regs->ep_cfg);
+	ep_cfg &= ~EP_CFG_ENABLE;
+	writel(ep_cfg, &priv_dev->regs->ep_cfg);
+
+	/**
+	 * Driver needs some time before resetting endpoint.
+	 * It need waits for clearing DBUSY bit or for timeout expired.
+	 * 10us is enough time for controller to stop transfer.
+	 */
+	readl_poll_timeout_atomic(&priv_dev->regs->ep_sts, val,
+				  !(val & EP_STS_DBUSY), 10);
+	writel(EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
+
+	readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
+				  !(val & (EP_CMD_CSTALL | EP_CMD_EPRST)),
+				  1000);
+	if (unlikely(ret))
+		dev_err(priv_dev->dev, "Timeout: %s resetting failed.\n",
+			priv_ep->name);
+
+	while (!list_empty(&priv_ep->pending_req_list)) {
+		request = cdns3_next_request(&priv_ep->pending_req_list);
+
+		cdns3_gadget_giveback(priv_ep, to_cdns3_request(request),
+				      -ESHUTDOWN);
+	}
+
+	while (!list_empty(&priv_ep->wa2_descmiss_req_list)) {
+		priv_req = cdns3_next_priv_request(&priv_ep->wa2_descmiss_req_list);
+
+		kfree(priv_req->request.buf);
+		cdns3_gadget_ep_free_request(&priv_ep->endpoint,
+					     &priv_req->request);
+		list_del_init(&priv_req->list);
+		--priv_ep->wa2_counter;
+	}
+
+	while (!list_empty(&priv_ep->deferred_req_list)) {
+		request = cdns3_next_request(&priv_ep->deferred_req_list);
+
+		cdns3_gadget_giveback(priv_ep, to_cdns3_request(request),
+				      -ESHUTDOWN);
+	}
+
+	priv_ep->descmis_req = NULL;
+
+	ep->desc = NULL;
+	priv_ep->flags &= ~EP_ENABLED;
+
+	spin_unlock_irqrestore(&priv_dev->lock, flags);
+
+	return ret;
+}
+
+/**
+ * cdns3_gadget_ep_queue Transfer data on endpoint
+ * @ep: endpoint object
+ * @request: request object
+ * @gfp_flags: gfp flags
+ *
+ * Returns 0 on success, error code elsewhere
+ */
+static int __cdns3_gadget_ep_queue(struct usb_ep *ep,
+				   struct usb_request *request,
+				   gfp_t gfp_flags)
+{
+	struct cdns3_endpoint *priv_ep = ep_to_cdns3_ep(ep);
+	struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
+	struct cdns3_request *priv_req;
+	int ret = 0;
+
+	request->actual = 0;
+	request->status = -EINPROGRESS;
+	priv_req = to_cdns3_request(request);
+	trace_cdns3_ep_queue(priv_req);
+
+	if (priv_dev->dev_ver < DEV_VER_V2) {
+		ret = cdns3_wa2_gadget_ep_queue(priv_dev, priv_ep,
+						priv_req);
+
+		if (ret == EINPROGRESS)
+			return 0;
+	}
+
+	ret = cdns3_prepare_aligned_request_buf(priv_req);
+	if (ret < 0)
+		return ret;
+
+	ret = usb_gadget_map_request(&priv_dev->gadget, request,
+				     usb_endpoint_dir_in(ep->desc));
+	if (ret)
+		return ret;
+
+	list_add_tail(&request->list, &priv_ep->deferred_req_list);
+
+	/*
+	 * If hardware endpoint configuration has not been set yet then
+	 * just queue request in deferred list. Transfer will be started in
+	 * cdns3_set_hw_configuration.
+	 */
+	if (priv_dev->hw_configured_flag && !(priv_ep->flags & EP_STALLED) &&
+	    !(priv_ep->flags & EP_STALL_PENDING))
+		cdns3_start_all_request(priv_dev, priv_ep);
+
+	return 0;
+}
+
+static int cdns3_gadget_ep_queue(struct usb_ep *ep, struct usb_request *request,
+				 gfp_t gfp_flags)
+{
+	struct usb_request *zlp_request;
+	struct cdns3_endpoint *priv_ep;
+	struct cdns3_device *priv_dev;
+	unsigned long flags;
+	int ret;
+
+	if (!request || !ep)
+		return -EINVAL;
+
+	priv_ep = ep_to_cdns3_ep(ep);
+	priv_dev = priv_ep->cdns3_dev;
+
+	spin_lock_irqsave(&priv_dev->lock, flags);
+
+	ret = __cdns3_gadget_ep_queue(ep, request, gfp_flags);
+
+	if (ret == 0 && request->zero && request->length &&
+	    (request->length % ep->maxpacket == 0)) {
+		struct cdns3_request *priv_req;
+
+		zlp_request = cdns3_gadget_ep_alloc_request(ep, GFP_ATOMIC);
+		zlp_request->buf = priv_dev->zlp_buf;
+		zlp_request->length = 0;
+
+		priv_req = to_cdns3_request(zlp_request);
+		priv_req->flags |= REQUEST_ZLP;
+
+		dev_dbg(priv_dev->dev, "Queuing ZLP for endpoint: %s\n",
+			priv_ep->name);
+		ret = __cdns3_gadget_ep_queue(ep, zlp_request, gfp_flags);
+	}
+
+	spin_unlock_irqrestore(&priv_dev->lock, flags);
+	return ret;
+}
+
+/**
+ * cdns3_gadget_ep_dequeue Remove request from transfer queue
+ * @ep: endpoint object associated with request
+ * @request: request object
+ *
+ * Returns 0 on success, error code elsewhere
+ */
+int cdns3_gadget_ep_dequeue(struct usb_ep *ep,
+			    struct usb_request *request)
+{
+	struct cdns3_endpoint *priv_ep = ep_to_cdns3_ep(ep);
+	struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
+	struct usb_request *req, *req_temp;
+	struct cdns3_request *priv_req;
+	struct cdns3_trb *link_trb;
+	unsigned long flags;
+	int ret = 0;
+
+	if (!ep || !request || !ep->desc)
+		return -EINVAL;
+
+	spin_lock_irqsave(&priv_dev->lock, flags);
+
+	priv_req = to_cdns3_request(request);
+
+	trace_cdns3_ep_dequeue(priv_req);
+
+	cdns3_select_ep(priv_dev, ep->desc->bEndpointAddress);
+
+	list_for_each_entry_safe(req, req_temp, &priv_ep->pending_req_list,
+				 list) {
+		if (request == req)
+			goto found;
+	}
+
+	list_for_each_entry_safe(req, req_temp, &priv_ep->deferred_req_list,
+				 list) {
+		if (request == req)
+			goto found;
+	}
+
+	goto not_found;
+
+found:
+
+	if (priv_ep->wa1_trb == priv_req->trb)
+		cdns3_wa1_restore_cycle_bit(priv_ep);
+
+	link_trb = priv_req->trb;
+	cdns3_move_deq_to_next_trb(priv_req);
+	cdns3_gadget_giveback(priv_ep, priv_req, -ECONNRESET);
+
+	/* Update ring */
+	request = cdns3_next_request(&priv_ep->deferred_req_list);
+	if (request) {
+		priv_req = to_cdns3_request(request);
+
+		link_trb->buffer = TRB_BUFFER(priv_ep->trb_pool_dma +
+					      (priv_req->start_trb * TRB_SIZE));
+		link_trb->control = (link_trb->control & TRB_CYCLE) |
+				    TRB_TYPE(TRB_LINK) | TRB_CHAIN | TRB_TOGGLE;
+	} else {
+		priv_ep->flags |= EP_UPDATE_EP_TRBADDR;
+	}
+
+not_found:
+	spin_unlock_irqrestore(&priv_dev->lock, flags);
+	return ret;
+}
+
+/**
+ * __cdns3_gadget_ep_set_halt Sets stall on selected endpoint
+ * Should be called after acquiring spin_lock and selecting ep
+ * @ep: endpoint object to set stall on.
+ */
+void __cdns3_gadget_ep_set_halt(struct cdns3_endpoint *priv_ep)
+{
+	struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
+
+	trace_cdns3_halt(priv_ep, 1, 0);
+
+	if (!(priv_ep->flags & EP_STALLED)) {
+		u32 ep_sts_reg = readl(&priv_dev->regs->ep_sts);
+
+		if (!(ep_sts_reg & EP_STS_DBUSY))
+			cdns3_ep_stall_flush(priv_ep);
+		else
+			priv_ep->flags |= EP_STALL_PENDING;
+	}
+}
+
+/**
+ * __cdns3_gadget_ep_clear_halt Clears stall on selected endpoint
+ * Should be called after acquiring spin_lock and selecting ep
+ * @ep: endpoint object to clear stall on
+ */
+int __cdns3_gadget_ep_clear_halt(struct cdns3_endpoint *priv_ep)
+{
+	struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
+	struct usb_request *request;
+	int ret = 0;
+	int val;
+
+	trace_cdns3_halt(priv_ep, 0, 0);
+
+	writel(EP_CMD_CSTALL | EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
+
+	/* wait for EPRST cleared */
+	readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
+				  !(val & EP_CMD_EPRST), 100);
+	if (ret)
+		return -EINVAL;
+
+	priv_ep->flags &= ~(EP_STALLED | EP_STALL_PENDING);
+
+	request = cdns3_next_request(&priv_ep->pending_req_list);
+
+	if (request)
+		cdns3_rearm_transfer(priv_ep, 1);
+
+	cdns3_start_all_request(priv_dev, priv_ep);
+	return ret;
+}
+
+/**
+ * cdns3_gadget_ep_set_halt Sets/clears stall on selected endpoint
+ * @ep: endpoint object to set/clear stall on
+ * @value: 1 for set stall, 0 for clear stall
+ *
+ * Returns 0 on success, error code elsewhere
+ */
+int cdns3_gadget_ep_set_halt(struct usb_ep *ep, int value)
+{
+	struct cdns3_endpoint *priv_ep = ep_to_cdns3_ep(ep);
+	struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
+	unsigned long flags;
+	int ret = 0;
+
+	if (!(priv_ep->flags & EP_ENABLED))
+		return -EPERM;
+
+	spin_lock_irqsave(&priv_dev->lock, flags);
+
+	cdns3_select_ep(priv_dev, ep->desc->bEndpointAddress);
+
+	if (!value) {
+		priv_ep->flags &= ~EP_WEDGE;
+		ret = __cdns3_gadget_ep_clear_halt(priv_ep);
+	} else {
+		__cdns3_gadget_ep_set_halt(priv_ep);
+	}
+
+	spin_unlock_irqrestore(&priv_dev->lock, flags);
+
+	return ret;
+}
+
+extern const struct usb_ep_ops cdns3_gadget_ep0_ops;
+
+static const struct usb_ep_ops cdns3_gadget_ep_ops = {
+	.enable = cdns3_gadget_ep_enable,
+	.disable = cdns3_gadget_ep_disable,
+	.alloc_request = cdns3_gadget_ep_alloc_request,
+	.free_request = cdns3_gadget_ep_free_request,
+	.queue = cdns3_gadget_ep_queue,
+	.dequeue = cdns3_gadget_ep_dequeue,
+	.set_halt = cdns3_gadget_ep_set_halt,
+	.set_wedge = cdns3_gadget_ep_set_wedge,
+};
+
+/**
+ * cdns3_gadget_get_frame Returns number of actual ITP frame
+ * @gadget: gadget object
+ *
+ * Returns number of actual ITP frame
+ */
+static int cdns3_gadget_get_frame(struct usb_gadget *gadget)
+{
+	struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
+
+	return readl(&priv_dev->regs->usb_itpn);
+}
+
+int __cdns3_gadget_wakeup(struct cdns3_device *priv_dev)
+{
+	enum usb_device_speed speed;
+
+	speed = cdns3_get_speed(priv_dev);
+
+	if (speed >= USB_SPEED_SUPER)
+		return 0;
+
+	/* Start driving resume signaling to indicate remote wakeup. */
+	writel(USB_CONF_LGO_L0, &priv_dev->regs->usb_conf);
+
+	return 0;
+}
+
+static int cdns3_gadget_wakeup(struct usb_gadget *gadget)
+{
+	struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
+	unsigned long flags;
+	int ret = 0;
+
+	spin_lock_irqsave(&priv_dev->lock, flags);
+	ret = __cdns3_gadget_wakeup(priv_dev);
+	spin_unlock_irqrestore(&priv_dev->lock, flags);
+	return ret;
+}
+
+static int cdns3_gadget_set_selfpowered(struct usb_gadget *gadget,
+					int is_selfpowered)
+{
+	struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
+	unsigned long flags;
+
+	spin_lock_irqsave(&priv_dev->lock, flags);
+	priv_dev->is_selfpowered = !!is_selfpowered;
+	spin_unlock_irqrestore(&priv_dev->lock, flags);
+	return 0;
+}
+
+static int cdns3_gadget_pullup(struct usb_gadget *gadget, int is_on)
+{
+	struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
+
+	if (is_on)
+		writel(USB_CONF_DEVEN, &priv_dev->regs->usb_conf);
+	else
+		writel(USB_CONF_DEVDS, &priv_dev->regs->usb_conf);
+
+	return 0;
+}
+
+static void cdns3_gadget_config(struct cdns3_device *priv_dev)
+{
+	struct cdns3_usb_regs __iomem *regs = priv_dev->regs;
+	u32 reg;
+
+	cdns3_ep0_config(priv_dev);
+
+	/* enable interrupts for endpoint 0 (in and out) */
+	writel(EP_IEN_EP_OUT0 | EP_IEN_EP_IN0, &regs->ep_ien);
+
+	/*
+	 * Driver needs to modify LFPS minimal U1 Exit time for DEV_VER_TI_V1
+	 * revision of controller.
+	 */
+	if (priv_dev->dev_ver == DEV_VER_TI_V1) {
+		reg = readl(&regs->dbg_link1);
+
+		reg &= ~DBG_LINK1_LFPS_MIN_GEN_U1_EXIT_MASK;
+		reg |= DBG_LINK1_LFPS_MIN_GEN_U1_EXIT(0x55) |
+		       DBG_LINK1_LFPS_MIN_GEN_U1_EXIT_SET;
+		writel(reg, &regs->dbg_link1);
+	}
+
+	/*
+	 * By default some platforms has set protected access to memory.
+	 * This cause problem with cache, so driver restore non-secure
+	 * access to memory.
+	 */
+	reg = readl(&regs->dma_axi_ctrl);
+	reg |= DMA_AXI_CTRL_MARPROT(DMA_AXI_CTRL_NON_SECURE) |
+	       DMA_AXI_CTRL_MAWPROT(DMA_AXI_CTRL_NON_SECURE);
+	writel(reg, &regs->dma_axi_ctrl);
+
+	/* enable generic interrupt*/
+	writel(USB_IEN_INIT, &regs->usb_ien);
+	writel(USB_CONF_CLK2OFFDS | USB_CONF_L1DS, &regs->usb_conf);
+
+	cdns3_configure_dmult(priv_dev, NULL);
+
+	cdns3_gadget_pullup(&priv_dev->gadget, 1);
+}
+
+/**
+ * cdns3_gadget_udc_start Gadget start
+ * @gadget: gadget object
+ * @driver: driver which operates on this gadget
+ *
+ * Returns 0 on success, error code elsewhere
+ */
+static int cdns3_gadget_udc_start(struct usb_gadget *gadget,
+				  struct usb_gadget_driver *driver)
+{
+	struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
+	unsigned long flags;
+
+	spin_lock_irqsave(&priv_dev->lock, flags);
+	priv_dev->gadget_driver = driver;
+	cdns3_gadget_config(priv_dev);
+	spin_unlock_irqrestore(&priv_dev->lock, flags);
+	return 0;
+}
+
+/**
+ * cdns3_gadget_udc_stop Stops gadget
+ * @gadget: gadget object
+ *
+ * Returns 0
+ */
+static int cdns3_gadget_udc_stop(struct usb_gadget *gadget)
+{
+	struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
+	struct cdns3_endpoint *priv_ep;
+	u32 bEndpointAddress;
+	struct usb_ep *ep;
+	int ret = 0;
+	int val;
+
+	priv_dev->gadget_driver = NULL;
+
+	priv_dev->onchip_used_size = 0;
+	priv_dev->out_mem_is_allocated = 0;
+	priv_dev->gadget.speed = USB_SPEED_UNKNOWN;
+
+	list_for_each_entry(ep, &priv_dev->gadget.ep_list, ep_list) {
+		priv_ep = ep_to_cdns3_ep(ep);
+		bEndpointAddress = priv_ep->num | priv_ep->dir;
+		cdns3_select_ep(priv_dev, bEndpointAddress);
+		writel(EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
+		readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
+					  !(val & EP_CMD_EPRST), 100);
+	}
+
+	/* disable interrupt for device */
+	writel(0, &priv_dev->regs->usb_ien);
+	writel(USB_CONF_DEVDS, &priv_dev->regs->usb_conf);
+
+	return ret;
+}
+
+static const struct usb_gadget_ops cdns3_gadget_ops = {
+	.get_frame = cdns3_gadget_get_frame,
+	.wakeup = cdns3_gadget_wakeup,
+	.set_selfpowered = cdns3_gadget_set_selfpowered,
+	.pullup = cdns3_gadget_pullup,
+	.udc_start = cdns3_gadget_udc_start,
+	.udc_stop = cdns3_gadget_udc_stop,
+	.match_ep = cdns3_gadget_match_ep,
+};
+
+static void cdns3_free_all_eps(struct cdns3_device *priv_dev)
+{
+	int i;
+
+	/* ep0 OUT point to ep0 IN. */
+	priv_dev->eps[16] = NULL;
+
+	for (i = 0; i < CDNS3_ENDPOINTS_MAX_COUNT; i++)
+		if (priv_dev->eps[i]) {
+			cdns3_free_trb_pool(priv_dev->eps[i]);
+			devm_kfree(priv_dev->dev, priv_dev->eps[i]);
+		}
+}
+
+/**
+ * cdns3_init_eps Initializes software endpoints of gadget
+ * @cdns3: extended gadget object
+ *
+ * Returns 0 on success, error code elsewhere
+ */
+static int cdns3_init_eps(struct cdns3_device *priv_dev)
+{
+	u32 ep_enabled_reg, iso_ep_reg;
+	struct cdns3_endpoint *priv_ep;
+	int ep_dir, ep_number;
+	u32 ep_mask;
+	int ret = 0;
+	int i;
+
+	/* Read it from USB_CAP3 to USB_CAP5 */
+	ep_enabled_reg = readl(&priv_dev->regs->usb_cap3);
+	iso_ep_reg = readl(&priv_dev->regs->usb_cap4);
+
+	dev_dbg(priv_dev->dev, "Initializing non-zero endpoints\n");
+
+	for (i = 0; i < CDNS3_ENDPOINTS_MAX_COUNT; i++) {
+		ep_dir = i >> 4;	/* i div 16 */
+		ep_number = i & 0xF;	/* i % 16 */
+		ep_mask = BIT(i);
+
+		if (!(ep_enabled_reg & ep_mask))
+			continue;
+
+		if (ep_dir && !ep_number) {
+			priv_dev->eps[i] = priv_dev->eps[0];
+			continue;
+		}
+
+		priv_ep = devm_kzalloc(priv_dev->dev, sizeof(*priv_ep),
+				       GFP_KERNEL);
+		if (!priv_ep) {
+			ret = -ENOMEM;
+			goto err;
+		}
+
+		/* set parent of endpoint object */
+		priv_ep->cdns3_dev = priv_dev;
+		priv_dev->eps[i] = priv_ep;
+		priv_ep->num = ep_number;
+		priv_ep->dir = ep_dir ? USB_DIR_IN : USB_DIR_OUT;
+
+		if (!ep_number) {
+			ret = cdns3_init_ep0(priv_dev, priv_ep);
+			if (ret) {
+				dev_err(priv_dev->dev, "Failed to init ep0\n");
+				goto err;
+			}
+		} else {
+			snprintf(priv_ep->name, sizeof(priv_ep->name), "ep%d%s",
+				 ep_number, !!ep_dir ? "in" : "out");
+			priv_ep->endpoint.name = priv_ep->name;
+
+			usb_ep_set_maxpacket_limit(&priv_ep->endpoint,
+						   CDNS3_EP_MAX_PACKET_LIMIT);
+			priv_ep->endpoint.max_streams = CDNS3_EP_MAX_STREAMS;
+			priv_ep->endpoint.ops = &cdns3_gadget_ep_ops;
+			if (ep_dir)
+				priv_ep->endpoint.caps.dir_in = 1;
+			else
+				priv_ep->endpoint.caps.dir_out = 1;
+
+			if (iso_ep_reg & ep_mask)
+				priv_ep->endpoint.caps.type_iso = 1;
+
+			priv_ep->endpoint.caps.type_bulk = 1;
+			priv_ep->endpoint.caps.type_int = 1;
+
+			list_add_tail(&priv_ep->endpoint.ep_list,
+				      &priv_dev->gadget.ep_list);
+		}
+
+		priv_ep->flags = 0;
+
+		dev_info(priv_dev->dev, "Initialized  %s support: %s %s\n",
+			 priv_ep->name,
+			 priv_ep->endpoint.caps.type_bulk ? "BULK, INT" : "",
+			 priv_ep->endpoint.caps.type_iso ? "ISO" : "");
+
+		INIT_LIST_HEAD(&priv_ep->pending_req_list);
+		INIT_LIST_HEAD(&priv_ep->deferred_req_list);
+		INIT_LIST_HEAD(&priv_ep->wa2_descmiss_req_list);
+	}
+
+	return 0;
+err:
+	cdns3_free_all_eps(priv_dev);
+	return -ENOMEM;
+}
+
+void cdns3_gadget_exit(struct cdns3 *cdns)
+{
+	struct cdns3_device *priv_dev;
+
+	priv_dev = cdns->gadget_dev;
+
+	usb_del_gadget_udc(&priv_dev->gadget);
+
+	cdns3_free_all_eps(priv_dev);
+
+	while (!list_empty(&priv_dev->aligned_buf_list)) {
+		struct cdns3_aligned_buf *buf;
+
+		buf = cdns3_next_align_buf(&priv_dev->aligned_buf_list);
+		dma_free_coherent(buf->buf);
+
+		list_del(&buf->list);
+		kfree(buf);
+	}
+
+	dma_free_coherent(priv_dev->setup_buf);
+
+	kfree(priv_dev->zlp_buf);
+	kfree(priv_dev);
+	cdns->gadget_dev = NULL;
+	cdns3_drd_switch_gadget(cdns, 0);
+}
+
+static int cdns3_gadget_start(struct cdns3 *cdns)
+{
+	struct cdns3_device *priv_dev;
+	u32 max_speed;
+	int ret;
+
+	priv_dev = kzalloc(sizeof(*priv_dev), GFP_KERNEL);
+	if (!priv_dev)
+		return -ENOMEM;
+
+	cdns->gadget_dev = priv_dev;
+	priv_dev->sysdev = cdns->dev;
+	priv_dev->dev = cdns->dev;
+	priv_dev->regs = cdns->dev_regs;
+
+	dev_read_u32(priv_dev->dev, "cdns,on-chip-buff-size",
+		     &priv_dev->onchip_buffers);
+
+	if (priv_dev->onchip_buffers <=  0) {
+		u32 reg = readl(&priv_dev->regs->usb_cap2);
+
+		priv_dev->onchip_buffers = USB_CAP2_ACTUAL_MEM_SIZE(reg);
+	}
+
+	if (!priv_dev->onchip_buffers)
+		priv_dev->onchip_buffers = 256;
+
+	max_speed = usb_get_maximum_speed(dev_of_offset(cdns->dev));
+
+	/* Check the maximum_speed parameter */
+	switch (max_speed) {
+	case USB_SPEED_FULL:
+		writel(USB_CONF_SFORCE_FS, &priv_dev->regs->usb_conf);
+		break;
+	case USB_SPEED_HIGH:
+		writel(USB_CONF_USB3DIS, &priv_dev->regs->usb_conf);
+		break;
+	case USB_SPEED_SUPER:
+		break;
+	default:
+		dev_err(cdns->dev, "invalid maximum_speed parameter %d\n",
+			max_speed);
+		/* fall through */
+	case USB_SPEED_UNKNOWN:
+		/* default to superspeed */
+		max_speed = USB_SPEED_SUPER;
+		break;
+	}
+
+	/* fill gadget fields */
+	priv_dev->gadget.max_speed = max_speed;
+	priv_dev->gadget.speed = USB_SPEED_UNKNOWN;
+	priv_dev->gadget.ops = &cdns3_gadget_ops;
+	priv_dev->gadget.name = "cdns3-gadget";
+#ifndef __UBOOT__
+	priv_dev->gadget.name = "usb-ss-gadget";
+	priv_dev->gadget.sg_supported = 1;
+	priv_dev->gadget.quirk_avoids_skb_reserve = 1;
+#endif
+
+	spin_lock_init(&priv_dev->lock);
+	INIT_WORK(&priv_dev->pending_status_wq,
+		  cdns3_pending_setup_status_handler);
+
+	/* initialize endpoint container */
+	INIT_LIST_HEAD(&priv_dev->gadget.ep_list);
+	INIT_LIST_HEAD(&priv_dev->aligned_buf_list);
+
+	ret = cdns3_init_eps(priv_dev);
+	if (ret) {
+		dev_err(priv_dev->dev, "Failed to create endpoints\n");
+		goto err1;
+	}
+
+	/* allocate memory for setup packet buffer */
+	priv_dev->setup_buf =
+		dma_alloc_coherent(8, (unsigned long *)&priv_dev->setup_dma);
+	if (!priv_dev->setup_buf) {
+		ret = -ENOMEM;
+		goto err2;
+	}
+
+	priv_dev->dev_ver = readl(&priv_dev->regs->usb_cap6);
+
+	dev_dbg(priv_dev->dev, "Device Controller version: %08x\n",
+		readl(&priv_dev->regs->usb_cap6));
+	dev_dbg(priv_dev->dev, "USB Capabilities:: %08x\n",
+		readl(&priv_dev->regs->usb_cap1));
+	dev_dbg(priv_dev->dev, "On-Chip memory cnfiguration: %08x\n",
+		readl(&priv_dev->regs->usb_cap2));
+
+	priv_dev->dev_ver = GET_DEV_BASE_VERSION(priv_dev->dev_ver);
+
+	priv_dev->zlp_buf = kzalloc(CDNS3_EP_ZLP_BUF_SIZE, GFP_KERNEL);
+	if (!priv_dev->zlp_buf) {
+		ret = -ENOMEM;
+		goto err3;
+	}
+
+	/* add USB gadget device */
+	ret = usb_add_gadget_udc((struct device *)priv_dev->dev,
+				 &priv_dev->gadget);
+	if (ret < 0) {
+		dev_err(priv_dev->dev,
+			"Failed to register USB device controller\n");
+		goto err4;
+	}
+
+	return 0;
+err4:
+	kfree(priv_dev->zlp_buf);
+err3:
+	dma_free_coherent(priv_dev->setup_buf);
+err2:
+	cdns3_free_all_eps(priv_dev);
+err1:
+	cdns->gadget_dev = NULL;
+	return ret;
+}
+
+static int __cdns3_gadget_init(struct cdns3 *cdns)
+{
+	int ret = 0;
+
+	cdns3_drd_switch_gadget(cdns, 1);
+
+	ret = cdns3_gadget_start(cdns);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
+static int cdns3_gadget_suspend(struct cdns3 *cdns, bool do_wakeup)
+{
+	struct cdns3_device *priv_dev = cdns->gadget_dev;
+
+	cdns3_disconnect_gadget(priv_dev);
+
+	priv_dev->gadget.speed = USB_SPEED_UNKNOWN;
+	usb_gadget_set_state(&priv_dev->gadget, USB_STATE_NOTATTACHED);
+	cdns3_hw_reset_eps_config(priv_dev);
+
+	/* disable interrupt for device */
+	writel(0, &priv_dev->regs->usb_ien);
+
+	cdns3_gadget_pullup(&priv_dev->gadget, 0);
+
+	return 0;
+}
+
+static int cdns3_gadget_resume(struct cdns3 *cdns, bool hibernated)
+{
+	struct cdns3_device *priv_dev = cdns->gadget_dev;
+
+	if (!priv_dev->gadget_driver)
+		return 0;
+
+	cdns3_gadget_config(priv_dev);
+
+	return 0;
+}
+
+/**
+ * cdns3_gadget_init - initialize device structure
+ *
+ * cdns: cdns3 instance
+ *
+ * This function initializes the gadget.
+ */
+int cdns3_gadget_init(struct cdns3 *cdns)
+{
+	struct cdns3_role_driver *rdrv;
+
+	rdrv = devm_kzalloc(cdns->dev, sizeof(*rdrv), GFP_KERNEL);
+	if (!rdrv)
+		return -ENOMEM;
+
+	rdrv->start	= __cdns3_gadget_init;
+	rdrv->stop	= cdns3_gadget_exit;
+	rdrv->suspend	= cdns3_gadget_suspend;
+	rdrv->resume	= cdns3_gadget_resume;
+	rdrv->state	= CDNS3_ROLE_STATE_INACTIVE;
+	rdrv->name	= "gadget";
+	cdns->roles[USB_ROLE_DEVICE] = rdrv;
+
+	return 0;
+}
+
+/**
+ * cdns3_gadget_uboot_handle_interrupt - handle cdns3 gadget interrupt
+ * @cdns: pointer to struct cdns3
+ *
+ * Handles ep0 and gadget interrupt
+ */
+static void cdns3_gadget_uboot_handle_interrupt(struct cdns3 *cdns)
+{
+	int ret = cdns3_device_irq_handler(0, cdns);
+
+	if (ret == IRQ_WAKE_THREAD)
+		cdns3_device_thread_irq_handler(0, cdns);
+}
+
+int dm_usb_gadget_handle_interrupts(struct udevice *dev)
+{
+	struct cdns3 *cdns = dev_get_priv(dev);
+
+	cdns3_gadget_uboot_handle_interrupt(cdns);
+
+	return 0;
+}
diff --git a/drivers/usb/cdns3/gadget.h b/drivers/usb/cdns3/gadget.h
new file mode 100644
index 0000000000..3d5242b331
--- /dev/null
+++ b/drivers/usb/cdns3/gadget.h
@@ -0,0 +1,1338 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * USBSS device controller driver header file
+ *
+ * Copyright (C) 2018-2019 Cadence.
+ * Copyright (C) 2017-2018 NXP
+ *
+ * Author: Pawel Laszczak <pawell@cadence.com>
+ *         Pawel Jez <pjez@cadence.com>
+ *         Peter Chen <peter.chen@nxp.com>
+ */
+#ifndef __LINUX_CDNS3_GADGET
+#define __LINUX_CDNS3_GADGET
+#include <linux/usb/gadget.h>
+
+/*
+ * USBSS-DEV register interface.
+ * This corresponds to the USBSS Device Controller Interface
+ */
+
+/**
+ * struct cdns3_usb_regs - device controller registers.
+ * @usb_conf:      Global Configuration.
+ * @usb_sts:       Global Status.
+ * @usb_cmd:       Global Command.
+ * @usb_itpn:      ITP/SOF number.
+ * @usb_lpm:       Global Command.
+ * @usb_ien:       USB Interrupt Enable.
+ * @usb_ists:      USB Interrupt Status.
+ * @ep_sel:        Endpoint Select.
+ * @ep_traddr:     Endpoint Transfer Ring Address.
+ * @ep_cfg:        Endpoint Configuration.
+ * @ep_cmd:        Endpoint Command.
+ * @ep_sts:        Endpoint Status.
+ * @ep_sts_sid:    Endpoint Status.
+ * @ep_sts_en:     Endpoint Status Enable.
+ * @drbl:          Doorbell.
+ * @ep_ien:        EP Interrupt Enable.
+ * @ep_ists:       EP Interrupt Status.
+ * @usb_pwr:       Global Power Configuration.
+ * @usb_conf2:     Global Configuration 2.
+ * @usb_cap1:      Capability 1.
+ * @usb_cap2:      Capability 2.
+ * @usb_cap3:      Capability 3.
+ * @usb_cap4:      Capability 4.
+ * @usb_cap5:      Capability 5.
+ * @usb_cap6:      Capability 6.
+ * @usb_cpkt1:     Custom Packet 1.
+ * @usb_cpkt2:     Custom Packet 2.
+ * @usb_cpkt3:     Custom Packet 3.
+ * @ep_dma_ext_addr: Upper address for DMA operations.
+ * @buf_addr:      Address for On-chip Buffer operations.
+ * @buf_data:      Data for On-chip Buffer operations.
+ * @buf_ctrl:      On-chip Buffer Access Control.
+ * @dtrans:        DMA Transfer Mode.
+ * @tdl_from_trb:  Source of TD Configuration.
+ * @tdl_beh:       TDL Behavior Configuration.
+ * @ep_tdl:        Endpoint TDL.
+ * @tdl_beh2:      TDL Behavior 2 Configuration.
+ * @dma_adv_td:    DMA Advance TD Configuration.
+ * @reserved1:     Reserved.
+ * @cfg_regs:      Configuration.
+ * @reserved2:     Reserved.
+ * @dma_axi_ctrl:  AXI Control.
+ * @dma_axi_id:    AXI ID register.
+ * @dma_axi_cap:   AXI Capability.
+ * @dma_axi_ctrl0: AXI Control 0.
+ * @dma_axi_ctrl1: AXI Control 1.
+ */
+struct cdns3_usb_regs {
+	__le32 usb_conf;
+	__le32 usb_sts;
+	__le32 usb_cmd;
+	__le32 usb_itpn;
+	__le32 usb_lpm;
+	__le32 usb_ien;
+	__le32 usb_ists;
+	__le32 ep_sel;
+	__le32 ep_traddr;
+	__le32 ep_cfg;
+	__le32 ep_cmd;
+	__le32 ep_sts;
+	__le32 ep_sts_sid;
+	__le32 ep_sts_en;
+	__le32 drbl;
+	__le32 ep_ien;
+	__le32 ep_ists;
+	__le32 usb_pwr;
+	__le32 usb_conf2;
+	__le32 usb_cap1;
+	__le32 usb_cap2;
+	__le32 usb_cap3;
+	__le32 usb_cap4;
+	__le32 usb_cap5;
+	__le32 usb_cap6;
+	__le32 usb_cpkt1;
+	__le32 usb_cpkt2;
+	__le32 usb_cpkt3;
+	__le32 ep_dma_ext_addr;
+	__le32 buf_addr;
+	__le32 buf_data;
+	__le32 buf_ctrl;
+	__le32 dtrans;
+	__le32 tdl_from_trb;
+	__le32 tdl_beh;
+	__le32 ep_tdl;
+	__le32 tdl_beh2;
+	__le32 dma_adv_td;
+	__le32 reserved1[26];
+	__le32 cfg_reg1;
+	__le32 dbg_link1;
+	__le32 dbg_link2;
+	__le32 cfg_regs[74];
+	__le32 reserved2[51];
+	__le32 dma_axi_ctrl;
+	__le32 dma_axi_id;
+	__le32 dma_axi_cap;
+	__le32 dma_axi_ctrl0;
+	__le32 dma_axi_ctrl1;
+};
+
+/* USB_CONF - bitmasks */
+/* Reset USB device configuration. */
+#define USB_CONF_CFGRST		BIT(0)
+/* Set Configuration. */
+#define USB_CONF_CFGSET		BIT(1)
+/* Disconnect USB device in SuperSpeed. */
+#define USB_CONF_USB3DIS	BIT(3)
+/* Disconnect USB device in HS/FS */
+#define USB_CONF_USB2DIS	BIT(4)
+/* Little Endian access - default */
+#define USB_CONF_LENDIAN	BIT(5)
+/*
+ * Big Endian access. Driver assume that byte order for
+ * SFRs access always is as Little Endian so this bit
+ * is not used.
+ */
+#define USB_CONF_BENDIAN	BIT(6)
+/* Device software reset. */
+#define USB_CONF_SWRST		BIT(7)
+/* Singular DMA transfer mode. Only for VER < DEV_VER_V3*/
+#define USB_CONF_DSING		BIT(8)
+/* Multiple DMA transfers mode. Only for VER < DEV_VER_V3 */
+#define USB_CONF_DMULT		BIT(9)
+/* DMA clock turn-off enable. */
+#define USB_CONF_DMAOFFEN	BIT(10)
+/* DMA clock turn-off disable. */
+#define USB_CONF_DMAOFFDS	BIT(11)
+/* Clear Force Full Speed. */
+#define USB_CONF_CFORCE_FS	BIT(12)
+/* Set Force Full Speed. */
+#define USB_CONF_SFORCE_FS	BIT(13)
+/* Device enable. */
+#define USB_CONF_DEVEN		BIT(14)
+/* Device disable. */
+#define USB_CONF_DEVDS		BIT(15)
+/* L1 LPM state entry enable (used in HS/FS mode). */
+#define USB_CONF_L1EN		BIT(16)
+/* L1 LPM state entry disable (used in HS/FS mode). */
+#define USB_CONF_L1DS		BIT(17)
+/* USB 2.0 clock gate disable. */
+#define USB_CONF_CLK2OFFEN	BIT(18)
+/* USB 2.0 clock gate enable. */
+#define USB_CONF_CLK2OFFDS	BIT(19)
+/* L0 LPM state entry request (used in HS/FS mode). */
+#define USB_CONF_LGO_L0		BIT(20)
+/* USB 3.0 clock gate disable. */
+#define USB_CONF_CLK3OFFEN	BIT(21)
+/* USB 3.0 clock gate enable. */
+#define USB_CONF_CLK3OFFDS	BIT(22)
+/* Bit 23 is reserved*/
+/* U1 state entry enable (used in SS mode). */
+#define USB_CONF_U1EN		BIT(24)
+/* U1 state entry disable (used in SS mode). */
+#define USB_CONF_U1DS		BIT(25)
+/* U2 state entry enable (used in SS mode). */
+#define USB_CONF_U2EN		BIT(26)
+/* U2 state entry disable (used in SS mode). */
+#define USB_CONF_U2DS		BIT(27)
+/* U0 state entry request (used in SS mode). */
+#define USB_CONF_LGO_U0		BIT(28)
+/* U1 state entry request (used in SS mode). */
+#define USB_CONF_LGO_U1		BIT(29)
+/* U2 state entry request (used in SS mode). */
+#define USB_CONF_LGO_U2		BIT(30)
+/* SS.Inactive state entry request (used in SS mode) */
+#define USB_CONF_LGO_SSINACT	BIT(31)
+
+/* USB_STS - bitmasks */
+/*
+ * Configuration status.
+ * 1 - device is in the configured state.
+ * 0 - device is not configured.
+ */
+#define USB_STS_CFGSTS_MASK	BIT(0)
+#define USB_STS_CFGSTS(p)	((p) & USB_STS_CFGSTS_MASK)
+/*
+ * On-chip memory overflow.
+ * 0 - On-chip memory status OK.
+ * 1 - On-chip memory overflow.
+ */
+#define USB_STS_OV_MASK		BIT(1)
+#define USB_STS_OV(p)		((p) & USB_STS_OV_MASK)
+/*
+ * SuperSpeed connection status.
+ * 0 - USB in SuperSpeed mode disconnected.
+ * 1 - USB in SuperSpeed mode connected.
+ */
+#define USB_STS_USB3CONS_MASK	BIT(2)
+#define USB_STS_USB3CONS(p)	((p) & USB_STS_USB3CONS_MASK)
+/*
+ * DMA transfer configuration status.
+ * 0 - single request.
+ * 1 - multiple TRB chain
+ * Supported only for controller version <  DEV_VER_V3
+ */
+#define USB_STS_DTRANS_MASK	BIT(3)
+#define USB_STS_DTRANS(p)	((p) & USB_STS_DTRANS_MASK)
+/*
+ * Device speed.
+ * 0 - Undefined (value after reset).
+ * 1 - Low speed
+ * 2 - Full speed
+ * 3 - High speed
+ * 4 - Super speed
+ */
+#define USB_STS_USBSPEED_MASK	GENMASK(6, 4)
+#define USB_STS_USBSPEED(p)	(((p) & USB_STS_USBSPEED_MASK) >> 4)
+#define USB_STS_LS		(0x1 << 4)
+#define USB_STS_FS		(0x2 << 4)
+#define USB_STS_HS		(0x3 << 4)
+#define USB_STS_SS		(0x4 << 4)
+#define DEV_UNDEFSPEED(p)	(((p) & USB_STS_USBSPEED_MASK) == (0x0 << 4))
+#define DEV_LOWSPEED(p)		(((p) & USB_STS_USBSPEED_MASK) == USB_STS_LS)
+#define DEV_FULLSPEED(p)	(((p) & USB_STS_USBSPEED_MASK) == USB_STS_FS)
+#define DEV_HIGHSPEED(p)	(((p) & USB_STS_USBSPEED_MASK) == USB_STS_HS)
+#define DEV_SUPERSPEED(p)	(((p) & USB_STS_USBSPEED_MASK) == USB_STS_SS)
+/*
+ * Endianness for SFR access.
+ * 0 - Little Endian order (default after hardware reset).
+ * 1 - Big Endian order
+ */
+#define USB_STS_ENDIAN_MASK	BIT(7)
+#define USB_STS_ENDIAN(p)	((p) & USB_STS_ENDIAN_MASK)
+/*
+ * HS/FS clock turn-off status.
+ * 0 - hsfs clock is always on.
+ * 1 - hsfs clock turn-off in L2 (HS/FS mode) is enabled
+ *          (default after hardware reset).
+ */
+#define USB_STS_CLK2OFF_MASK	BIT(8)
+#define USB_STS_CLK2OFF(p)	((p) & USB_STS_CLK2OFF_MASK)
+/*
+ * PCLK clock turn-off status.
+ * 0 - pclk clock is always on.
+ * 1 - pclk clock turn-off in U3 (SS mode) is enabled
+ *          (default after hardware reset).
+ */
+#define USB_STS_CLK3OFF_MASK	BIT(9)
+#define USB_STS_CLK3OFF(p)	((p) & USB_STS_CLK3OFF_MASK)
+/*
+ * Controller in reset state.
+ * 0 - Internal reset is active.
+ * 1 - Internal reset is not active and controller is fully operational.
+ */
+#define USB_STS_IN_RST_MASK	BIT(10)
+#define USB_STS_IN_RST(p)	((p) & USB_STS_IN_RST_MASK)
+/*
+ * Status of the "TDL calculation basing on TRB" feature.
+ * 0 - disabled
+ * 1 - enabled
+ * Supported only for DEV_VER_V2 controller version.
+ */
+#define USB_STS_TDL_TRB_ENABLED	BIT(11)
+/*
+ * Device enable Status.
+ * 0 - USB device is disabled (VBUS input is disconnected from internal logic).
+ * 1 - USB device is enabled (VBUS input is connected to the internal logic).
+ */
+#define USB_STS_DEVS_MASK	BIT(14)
+#define USB_STS_DEVS(p)		((p) & USB_STS_DEVS_MASK)
+/*
+ * Address status.
+ * 0 - USB device is default state.
+ * 1 - USB device is at least in address state.
+ */
+#define USB_STS_ADDRESSED_MASK	BIT(15)
+#define USB_STS_ADDRESSED(p)	((p) & USB_STS_ADDRESSED_MASK)
+/*
+ * L1 LPM state enable status (used in HS/FS mode).
+ * 0 - Entering to L1 LPM state disabled.
+ * 1 - Entering to L1 LPM state enabled.
+ */
+#define USB_STS_L1ENS_MASK	BIT(16)
+#define USB_STS_L1ENS(p)	((p) & USB_STS_L1ENS_MASK)
+/*
+ * Internal VBUS connection status (used both in HS/FS  and SS mode).
+ * 0 - internal VBUS is not detected.
+ * 1 - internal VBUS is detected.
+ */
+#define USB_STS_VBUSS_MASK	BIT(17)
+#define USB_STS_VBUSS(p)	((p) & USB_STS_VBUSS_MASK)
+/*
+ * HS/FS LPM  state (used in FS/HS mode).
+ * 0 - L0 State
+ * 1 - L1 State
+ * 2 - L2 State
+ * 3 - L3 State
+ */
+#define USB_STS_LPMST_MASK	GENMASK(19, 18)
+#define DEV_L0_STATE(p)		(((p) & USB_STS_LPMST_MASK) == (0x0 << 18))
+#define DEV_L1_STATE(p)		(((p) & USB_STS_LPMST_MASK) == (0x1 << 18))
+#define DEV_L2_STATE(p)		(((p) & USB_STS_LPMST_MASK) == (0x2 << 18))
+#define DEV_L3_STATE(p)		(((p) & USB_STS_LPMST_MASK) == (0x3 << 18))
+/*
+ * Disable HS status (used in FS/HS mode).
+ * 0 - the disconnect bit for HS/FS mode is set .
+ * 1 - the disconnect bit for HS/FS mode is not set.
+ */
+#define USB_STS_USB2CONS_MASK	BIT(20)
+#define USB_STS_USB2CONS(p)	((p) & USB_STS_USB2CONS_MASK)
+/*
+ * HS/FS mode connection status (used in FS/HS mode).
+ * 0 - High Speed operations in USB2.0 (FS/HS) mode not disabled.
+ * 1 - High Speed operations in USB2.0 (FS/HS).
+ */
+#define USB_STS_DISABLE_HS_MASK	BIT(21)
+#define USB_STS_DISABLE_HS(p)	((p) & USB_STS_DISABLE_HS_MASK)
+/*
+ * U1 state enable status (used in SS mode).
+ * 0 - Entering to  U1 state disabled.
+ * 1 - Entering to  U1 state enabled.
+ */
+#define USB_STS_U1ENS_MASK	BIT(24)
+#define USB_STS_U1ENS(p)	((p) & USB_STS_U1ENS_MASK)
+/*
+ * U2 state enable status (used in SS mode).
+ * 0 - Entering to  U2 state disabled.
+ * 1 - Entering to  U2 state enabled.
+ */
+#define USB_STS_U2ENS_MASK	BIT(25)
+#define USB_STS_U2ENS(p)	((p) & USB_STS_U2ENS_MASK)
+/*
+ * SuperSpeed Link LTSSM state. This field reflects USBSS-DEV current
+ * SuperSpeed link state
+ */
+#define USB_STS_LST_MASK	GENMASK(29, 26)
+#define DEV_LST_U0		(((p) & USB_STS_LST_MASK) == (0x0 << 26))
+#define DEV_LST_U1		(((p) & USB_STS_LST_MASK) == (0x1 << 26))
+#define DEV_LST_U2		(((p) & USB_STS_LST_MASK) == (0x2 << 26))
+#define DEV_LST_U3		(((p) & USB_STS_LST_MASK) == (0x3 << 26))
+#define DEV_LST_DISABLED	(((p) & USB_STS_LST_MASK) == (0x4 << 26))
+#define DEV_LST_RXDETECT	(((p) & USB_STS_LST_MASK) == (0x5 << 26))
+#define DEV_LST_INACTIVE	(((p) & USB_STS_LST_MASK) == (0x6 << 26))
+#define DEV_LST_POLLING		(((p) & USB_STS_LST_MASK) == (0x7 << 26))
+#define DEV_LST_RECOVERY	(((p) & USB_STS_LST_MASK) == (0x8 << 26))
+#define DEV_LST_HOT_RESET	(((p) & USB_STS_LST_MASK) == (0x9 << 26))
+#define DEV_LST_COMP_MODE	(((p) & USB_STS_LST_MASK) == (0xa << 26))
+#define DEV_LST_LB_STATE	(((p) & USB_STS_LST_MASK) == (0xb << 26))
+/*
+ * DMA clock turn-off status.
+ * 0 - DMA clock is always on (default after hardware reset).
+ * 1 - DMA clock turn-off in U1, U2 and U3 (SS mode) is enabled.
+ */
+#define USB_STS_DMAOFF_MASK	BIT(30)
+#define USB_STS_DMAOFF(p)	((p) & USB_STS_DMAOFF_MASK)
+/*
+ * SFR Endian status.
+ * 0 - Little Endian order (default after hardware reset).
+ * 1 - Big Endian order.
+ */
+#define USB_STS_ENDIAN2_MASK	BIT(31)
+#define USB_STS_ENDIAN2(p)	((p) & USB_STS_ENDIAN2_MASK)
+
+/* USB_CMD -  bitmasks */
+/* Set Function Address */
+#define USB_CMD_SET_ADDR	BIT(0)
+/*
+ * Function Address This field is saved to the device only when the field
+ * SET_ADDR is set '1 ' during write to USB_CMD register.
+ * Software is responsible for entering the address of the device during
+ * SET_ADDRESS request service. This field should be set immediately after
+ * the SETUP packet is decoded, and prior to confirmation of the status phase
+ */
+#define USB_CMD_FADDR_MASK	GENMASK(7, 1)
+#define USB_CMD_FADDR(p)	(((p) << 1) & USB_CMD_FADDR_MASK)
+/* Send Function Wake Device Notification TP (used only in SS mode). */
+#define USB_CMD_SDNFW		BIT(8)
+/* Set Test Mode (used only in HS/FS mode). */
+#define USB_CMD_STMODE		BIT(9)
+/* Test mode selector (used only in HS/FS mode) */
+#define USB_STS_TMODE_SEL_MASK	GENMASK(11, 10)
+#define USB_STS_TMODE_SEL(p)	(((p) << 10) & USB_STS_TMODE_SEL_MASK)
+/*
+ *  Send Latency Tolerance Message Device Notification TP (used only
+ *  in SS mode).
+ */
+#define USB_CMD_SDNLTM		BIT(12)
+/* Send Custom Transaction Packet (used only in SS mode) */
+#define USB_CMD_SPKT		BIT(13)
+/*Device Notification 'Function Wake' - Interface value (only in SS mode. */
+#define USB_CMD_DNFW_INT_MASK	GENMASK(23, 16)
+#define USB_STS_DNFW_INT(p)	(((p) << 16) & USB_CMD_DNFW_INT_MASK)
+/*
+ * Device Notification 'Latency Tolerance Message' -373 BELT value [7:0]
+ * (used only in SS mode).
+ */
+#define USB_CMD_DNLTM_BELT_MASK	GENMASK(27, 16)
+#define USB_STS_DNLTM_BELT(p)	(((p) << 16) & USB_CMD_DNLTM_BELT_MASK)
+
+/* USB_ITPN - bitmasks */
+/*
+ * ITP(SS) / SOF (HS/FS) number
+ * In SS mode this field represent number of last ITP received from host.
+ * In HS/FS mode this field represent number of last SOF received from host.
+ */
+#define USB_ITPN_MASK		GENMASK(13, 0)
+#define USB_ITPN(p)		((p) & USB_ITPN_MASK)
+
+/* USB_LPM - bitmasks */
+/* Host Initiated Resume Duration. */
+#define USB_LPM_HIRD_MASK	GENMASK(3, 0)
+#define USB_LPM_HIRD(p)		((p) & USB_LPM_HIRD_MASK)
+/* Remote Wakeup Enable (bRemoteWake). */
+#define USB_LPM_BRW		BIT(4)
+
+/* USB_IEN - bitmasks */
+/* SS connection interrupt enable */
+#define USB_IEN_CONIEN		BIT(0)
+/* SS disconnection interrupt enable. */
+#define USB_IEN_DISIEN		BIT(1)
+/* USB SS warm reset interrupt enable. */
+#define USB_IEN_UWRESIEN	BIT(2)
+/* USB SS hot reset interrupt enable */
+#define USB_IEN_UHRESIEN	BIT(3)
+/* SS link U3 state enter interrupt enable (suspend).*/
+#define USB_IEN_U3ENTIEN	BIT(4)
+/* SS link U3 state exit interrupt enable (wakeup). */
+#define USB_IEN_U3EXTIEN	BIT(5)
+/* SS link U2 state enter interrupt enable.*/
+#define USB_IEN_U2ENTIEN	BIT(6)
+/* SS link U2 state exit interrupt enable.*/
+#define USB_IEN_U2EXTIEN	BIT(7)
+/* SS link U1 state enter interrupt enable.*/
+#define USB_IEN_U1ENTIEN	BIT(8)
+/* SS link U1 state exit interrupt enable.*/
+#define USB_IEN_U1EXTIEN	BIT(9)
+/* ITP/SOF packet detected interrupt enable.*/
+#define USB_IEN_ITPIEN		BIT(10)
+/* Wakeup interrupt enable.*/
+#define USB_IEN_WAKEIEN		BIT(11)
+/* Send Custom Packet interrupt enable.*/
+#define USB_IEN_SPKTIEN		BIT(12)
+/* HS/FS mode connection interrupt enable.*/
+#define USB_IEN_CON2IEN		BIT(16)
+/* HS/FS mode disconnection interrupt enable.*/
+#define USB_IEN_DIS2IEN		BIT(17)
+/* USB reset (HS/FS mode) interrupt enable.*/
+#define USB_IEN_U2RESIEN	BIT(18)
+/* LPM L2 state enter interrupt enable.*/
+#define USB_IEN_L2ENTIEN	BIT(20)
+/* LPM  L2 state exit interrupt enable.*/
+#define USB_IEN_L2EXTIEN	BIT(21)
+/* LPM L1 state enter interrupt enable.*/
+#define USB_IEN_L1ENTIEN	BIT(24)
+/* LPM  L1 state exit interrupt enable.*/
+#define USB_IEN_L1EXTIEN	BIT(25)
+/* Configuration reset interrupt enable.*/
+#define USB_IEN_CFGRESIEN	BIT(26)
+/* Start of the USB SS warm reset interrupt enable.*/
+#define USB_IEN_UWRESSIEN	BIT(28)
+/* End of the USB SS warm reset interrupt enable.*/
+#define USB_IEN_UWRESEIEN	BIT(29)
+
+#define USB_IEN_INIT  (USB_IEN_U2RESIEN | USB_ISTS_DIS2I | USB_IEN_CON2IEN \
+		       | USB_IEN_UHRESIEN | USB_IEN_UWRESIEN | USB_IEN_DISIEN \
+		       | USB_IEN_CONIEN | USB_IEN_U3EXTIEN | USB_IEN_L2ENTIEN \
+		       | USB_IEN_L2EXTIEN | USB_IEN_L1ENTIEN | USB_IEN_U3ENTIEN)
+
+/* USB_ISTS - bitmasks */
+/* SS Connection detected. */
+#define USB_ISTS_CONI		BIT(0)
+/* SS Disconnection detected. */
+#define USB_ISTS_DISI		BIT(1)
+/* UUSB warm reset detectede. */
+#define USB_ISTS_UWRESI		BIT(2)
+/* USB hot reset detected. */
+#define USB_ISTS_UHRESI		BIT(3)
+/* U3 link state enter detected (suspend).*/
+#define USB_ISTS_U3ENTI		BIT(4)
+/* U3 link state exit detected (wakeup). */
+#define USB_ISTS_U3EXTI		BIT(5)
+/* U2 link state enter detected.*/
+#define USB_ISTS_U2ENTI		BIT(6)
+/* U2 link state exit detected.*/
+#define USB_ISTS_U2EXTI		BIT(7)
+/* U1 link state enter detected.*/
+#define USB_ISTS_U1ENTI		BIT(8)
+/* U1 link state exit detected.*/
+#define USB_ISTS_U1EXTI		BIT(9)
+/* ITP/SOF packet detected.*/
+#define USB_ISTS_ITPI		BIT(10)
+/* Wakeup detected.*/
+#define USB_ISTS_WAKEI		BIT(11)
+/* Send Custom Packet detected.*/
+#define USB_ISTS_SPKTI		BIT(12)
+/* HS/FS mode connection detected.*/
+#define USB_ISTS_CON2I		BIT(16)
+/* HS/FS mode disconnection detected.*/
+#define USB_ISTS_DIS2I		BIT(17)
+/* USB reset (HS/FS mode) detected.*/
+#define USB_ISTS_U2RESI		BIT(18)
+/* LPM L2 state enter detected.*/
+#define USB_ISTS_L2ENTI		BIT(20)
+/* LPM  L2 state exit detected.*/
+#define USB_ISTS_L2EXTI		BIT(21)
+/* LPM L1 state enter detected.*/
+#define USB_ISTS_L1ENTI		BIT(24)
+/* LPM L1 state exit detected.*/
+#define USB_ISTS_L1EXTI		BIT(25)
+/* USB configuration reset detected.*/
+#define USB_ISTS_CFGRESI	BIT(26)
+/* Start of the USB warm reset detected.*/
+#define USB_ISTS_UWRESSI	BIT(28)
+/* End of the USB warm reset detected.*/
+#define USB_ISTS_UWRESEI	BIT(29)
+
+/* USB_SEL - bitmasks */
+#define EP_SEL_EPNO_MASK	GENMASK(3, 0)
+/* Endpoint number. */
+#define EP_SEL_EPNO(p)		((p) & EP_SEL_EPNO_MASK)
+/* Endpoint direction bit - 0 - OUT, 1 - IN. */
+#define EP_SEL_DIR		BIT(7)
+
+#define select_ep_in(nr)	(EP_SEL_EPNO(p) | EP_SEL_DIR)
+#define select_ep_out		(EP_SEL_EPNO(p))
+
+/* EP_TRADDR - bitmasks */
+/* Transfer Ring address. */
+#define EP_TRADDR_TRADDR(p)	((p))
+
+/* EP_CFG - bitmasks */
+/* Endpoint enable */
+#define EP_CFG_ENABLE		BIT(0)
+/*
+ *  Endpoint type.
+ * 1 - isochronous
+ * 2 - bulk
+ * 3 - interrupt
+ */
+#define EP_CFG_EPTYPE_MASK	GENMASK(2, 1)
+#define EP_CFG_EPTYPE(p)	(((p) << 1)  & EP_CFG_EPTYPE_MASK)
+/* Stream support enable (only in SS mode). */
+#define EP_CFG_STREAM_EN	BIT(3)
+/* TDL check (only in SS mode for BULK EP). */
+#define EP_CFG_TDL_CHK		BIT(4)
+/* SID check (only in SS mode for BULK OUT EP). */
+#define EP_CFG_SID_CHK		BIT(5)
+/* DMA transfer endianness. */
+#define EP_CFG_EPENDIAN		BIT(7)
+/* Max burst size (used only in SS mode). */
+#define EP_CFG_MAXBURST_MASK	GENMASK(11, 8)
+#define EP_CFG_MAXBURST(p)	(((p) << 8) & EP_CFG_MAXBURST_MASK)
+/* ISO max burst. */
+#define EP_CFG_MULT_MASK	GENMASK(15, 14)
+#define EP_CFG_MULT(p)		(((p) << 14) & EP_CFG_MULT_MASK)
+/* ISO max burst. */
+#define EP_CFG_MAXPKTSIZE_MASK	GENMASK(26, 16)
+#define EP_CFG_MAXPKTSIZE(p)	(((p) << 16) & EP_CFG_MAXPKTSIZE_MASK)
+/* Max number of buffered packets. */
+#define EP_CFG_BUFFERING_MASK	GENMASK(31, 27)
+#define EP_CFG_BUFFERING(p)	(((p) << 27) & EP_CFG_BUFFERING_MASK)
+
+/* EP_CMD - bitmasks */
+/* Endpoint reset. */
+#define EP_CMD_EPRST		BIT(0)
+/* Endpoint STALL set. */
+#define EP_CMD_SSTALL		BIT(1)
+/* Endpoint STALL clear. */
+#define EP_CMD_CSTALL		BIT(2)
+/* Send ERDY TP. */
+#define EP_CMD_ERDY		BIT(3)
+/* Request complete. */
+#define EP_CMD_REQ_CMPL		BIT(5)
+/* Transfer descriptor ready. */
+#define EP_CMD_DRDY		BIT(6)
+/* Data flush. */
+#define EP_CMD_DFLUSH		BIT(7)
+/*
+ * Transfer Descriptor Length write  (used only for Bulk Stream capable
+ * endpoints in SS mode).
+ * Bit Removed from DEV_VER_V3 controller version.
+ */
+#define EP_CMD_STDL		BIT(8)
+/*
+ * Transfer Descriptor Length (used only in SS mode for bulk endpoints).
+ * Bits Removed from DEV_VER_V3 controller version.
+ */
+#define EP_CMD_TDL_MASK		GENMASK(15, 9)
+#define EP_CMD_TDL_SET(p)	(((p) << 9) & EP_CMD_TDL_MASK)
+#define EP_CMD_TDL_GET(p)	(((p) & EP_CMD_TDL_MASK) >> 9)
+
+/* ERDY Stream ID value (used in SS mode). */
+#define EP_CMD_ERDY_SID_MASK	GENMASK(31, 16)
+#define EP_CMD_ERDY_SID(p)	(((p) << 16) & EP_CMD_ERDY_SID_MASK)
+
+/* EP_STS - bitmasks */
+/* Setup transfer complete. */
+#define EP_STS_SETUP		BIT(0)
+/* Endpoint STALL status. */
+#define EP_STS_STALL(p)		((p) & BIT(1))
+/* Interrupt On Complete. */
+#define EP_STS_IOC		BIT(2)
+/* Interrupt on Short Packet. */
+#define EP_STS_ISP		BIT(3)
+/* Transfer descriptor missing. */
+#define EP_STS_DESCMIS		BIT(4)
+/* Stream Rejected (used only in SS mode) */
+#define EP_STS_STREAMR		BIT(5)
+/* EXIT from MOVE DATA State (used only for stream transfers in SS mode). */
+#define EP_STS_MD_EXIT		BIT(6)
+/* TRB error. */
+#define EP_STS_TRBERR		BIT(7)
+/* Not ready (used only in SS mode). */
+#define EP_STS_NRDY		BIT(8)
+/* DMA busy bit. */
+#define EP_STS_DBUSY		BIT(9)
+/* Endpoint Buffer Empty */
+#define EP_STS_BUFFEMPTY(p)	((p) & BIT(10))
+/* Current Cycle Status */
+#define EP_STS_CCS(p)		((p) & BIT(11))
+/* Prime (used only in SS mode. */
+#define EP_STS_PRIME		BIT(12)
+/* Stream error (used only in SS mode). */
+#define EP_STS_SIDERR		BIT(13)
+/* OUT size mismatch. */
+#define EP_STS_OUTSMM		BIT(14)
+/* ISO transmission error. */
+#define EP_STS_ISOERR		BIT(15)
+/* Host Packet Pending (only for SS mode). */
+#define EP_STS_HOSTPP(p)	((p) & BIT(16))
+/* Stream Protocol State Machine State (only for Bulk stream endpoints). */
+#define EP_STS_SPSMST_MASK		GENMASK(18, 17)
+#define EP_STS_SPSMST_DISABLED(p)	(((p) & EP_STS_SPSMST_MASK) >> 17)
+#define EP_STS_SPSMST_IDLE(p)		(((p) & EP_STS_SPSMST_MASK) >> 17)
+#define EP_STS_SPSMST_START_STREAM(p)	(((p) & EP_STS_SPSMST_MASK) >> 17)
+#define EP_STS_SPSMST_MOVE_DATA(p)	(((p) & EP_STS_SPSMST_MASK) >> 17)
+/* Interrupt On Transfer complete. */
+#define EP_STS_IOT		BIT(19)
+/* OUT queue endpoint number. */
+#define EP_STS_OUTQ_NO_MASK	GENMASK(27, 24)
+#define EP_STS_OUTQ_NO(p)	(((p) & EP_STS_OUTQ_NO_MASK) >> 24)
+/* OUT queue valid flag. */
+#define EP_STS_OUTQ_VAL_MASK	BIT(28)
+#define EP_STS_OUTQ_VAL(p)	((p) & EP_STS_OUTQ_VAL_MASK)
+/* SETUP WAIT. */
+#define EP_STS_STPWAIT		BIT(31)
+
+/* EP_STS_SID - bitmasks */
+/* Stream ID (used only in SS mode). */
+#define EP_STS_SID_MASK		GENMASK(15, 0)
+#define EP_STS_SID(p)		((p) & EP_STS_SID_MASK)
+
+/* EP_STS_EN - bitmasks */
+/* SETUP interrupt enable. */
+#define EP_STS_EN_SETUPEN	BIT(0)
+/* OUT transfer missing descriptor enable. */
+#define EP_STS_EN_DESCMISEN	BIT(4)
+/* Stream Rejected enable. */
+#define EP_STS_EN_STREAMREN	BIT(5)
+/* Move Data Exit enable.*/
+#define EP_STS_EN_MD_EXITEN	BIT(6)
+/* TRB enable. */
+#define EP_STS_EN_TRBERREN	BIT(7)
+/* NRDY enable. */
+#define EP_STS_EN_NRDYEN	BIT(8)
+/* Prime enable. */
+#define EP_STS_EN_PRIMEEEN	BIT(12)
+/* Stream error enable. */
+#define EP_STS_EN_SIDERREN	BIT(13)
+/* OUT size mismatch enable. */
+#define EP_STS_EN_OUTSMMEN	BIT(14)
+/* ISO transmission error enable. */
+#define EP_STS_EN_ISOERREN	BIT(15)
+/* Interrupt on Transmission complete enable. */
+#define EP_STS_EN_IOTEN		BIT(19)
+/* Setup Wait interrupt enable. */
+#define EP_STS_EN_STPWAITEN	BIT(31)
+
+/* DRBL- bitmasks */
+#define DB_VALUE_BY_INDEX(index) (1 << (index))
+#define DB_VALUE_EP0_OUT	BIT(0)
+#define DB_VALUE_EP0_IN		BIT(16)
+
+/* EP_IEN - bitmasks */
+#define EP_IEN(index)		(1 << (index))
+#define EP_IEN_EP_OUT0		BIT(0)
+#define EP_IEN_EP_IN0		BIT(16)
+
+/* EP_ISTS - bitmasks */
+#define EP_ISTS(index)		(1 << (index))
+#define EP_ISTS_EP_OUT0		BIT(0)
+#define EP_ISTS_EP_IN0		BIT(16)
+
+/* USB_PWR- bitmasks */
+/*Power Shut Off capability enable*/
+#define PUSB_PWR_PSO_EN		BIT(0)
+/*Power Shut Off capability disable*/
+#define PUSB_PWR_PSO_DS		BIT(1)
+/*
+ * Enables turning-off Reference Clock.
+ * This bit is optional and implemented only when support for OTG is
+ * implemented (indicated by OTG_READY bit set to '1').
+ */
+#define PUSB_PWR_STB_CLK_SWITCH_EN	BIT(8)
+/*
+ * Status bit indicating that operation required by STB_CLK_SWITCH_EN write
+ * is completed
+ */
+#define PUSB_PWR_STB_CLK_SWITCH_DONE	BIT(9)
+/* This bit informs if Fast Registers Access is enabled. */
+#define PUSB_PWR_FST_REG_ACCESS_STAT	BIT(30)
+/* Fast Registers Access Enable. */
+#define PUSB_PWR_FST_REG_ACCESS		BIT(31)
+
+/* USB_CONF2- bitmasks */
+/*
+ * Writing 1 disables TDL calculation basing on TRB feature in controller
+ * for DMULT mode.
+ * Bit supported only for DEV_VER_V2 version.
+ */
+#define USB_CONF2_DIS_TDL_TRB		BIT(1)
+/*
+ * Writing 1 enables TDL calculation basing on TRB feature in controller
+ * for DMULT mode.
+ * Bit supported only for DEV_VER_V2 version.
+ */
+#define USB_CONF2_EN_TDL_TRB		BIT(2)
+
+/* USB_CAP1- bitmasks */
+/*
+ * SFR Interface type
+ * These field reflects type of SFR interface implemented:
+ * 0x0 - OCP
+ * 0x1 - AHB,
+ * 0x2 - PLB
+ * 0x3 - AXI
+ * 0x4-0xF - reserved
+ */
+#define USB_CAP1_SFR_TYPE_MASK	GENMASK(3, 0)
+#define DEV_SFR_TYPE_OCP(p)	(((p) & USB_CAP1_SFR_TYPE_MASK) == 0x0)
+#define DEV_SFR_TYPE_AHB(p)	(((p) & USB_CAP1_SFR_TYPE_MASK) == 0x1)
+#define DEV_SFR_TYPE_PLB(p)	(((p) & USB_CAP1_SFR_TYPE_MASK) == 0x2)
+#define DEV_SFR_TYPE_AXI(p)	(((p) & USB_CAP1_SFR_TYPE_MASK) == 0x3)
+/*
+ * SFR Interface width
+ * These field reflects width of SFR interface implemented:
+ * 0x0 - 8 bit interface,
+ * 0x1 - 16 bit interface,
+ * 0x2 - 32 bit interface
+ * 0x3 - 64 bit interface
+ * 0x4-0xF - reserved
+ */
+#define USB_CAP1_SFR_WIDTH_MASK	GENMASK(7, 4)
+#define DEV_SFR_WIDTH_8(p)	(((p) & USB_CAP1_SFR_WIDTH_MASK) == (0x0 << 4))
+#define DEV_SFR_WIDTH_16(p)	(((p) & USB_CAP1_SFR_WIDTH_MASK) == (0x1 << 4))
+#define DEV_SFR_WIDTH_32(p)	(((p) & USB_CAP1_SFR_WIDTH_MASK) == (0x2 << 4))
+#define DEV_SFR_WIDTH_64(p)	(((p) & USB_CAP1_SFR_WIDTH_MASK) == (0x3 << 4))
+/*
+ * DMA Interface type
+ * These field reflects type of DMA interface implemented:
+ * 0x0 - OCP
+ * 0x1 - AHB,
+ * 0x2 - PLB
+ * 0x3 - AXI
+ * 0x4-0xF - reserved
+ */
+#define USB_CAP1_DMA_TYPE_MASK	GENMASK(11, 8)
+#define DEV_DMA_TYPE_OCP(p)	(((p) & USB_CAP1_DMA_TYPE_MASK) == (0x0 << 8))
+#define DEV_DMA_TYPE_AHB(p)	(((p) & USB_CAP1_DMA_TYPE_MASK) == (0x1 << 8))
+#define DEV_DMA_TYPE_PLB(p)	(((p) & USB_CAP1_DMA_TYPE_MASK) == (0x2 << 8))
+#define DEV_DMA_TYPE_AXI(p)	(((p) & USB_CAP1_DMA_TYPE_MASK) == (0x3 << 8))
+/*
+ * DMA Interface width
+ * These field reflects width of DMA interface implemented:
+ * 0x0 - reserved,
+ * 0x1 - reserved,
+ * 0x2 - 32 bit interface
+ * 0x3 - 64 bit interface
+ * 0x4-0xF - reserved
+ */
+#define USB_CAP1_DMA_WIDTH_MASK	GENMASK(15, 12)
+#define DEV_DMA_WIDTH_32(p)	(((p) & USB_CAP1_DMA_WIDTH_MASK) == (0x2 << 12))
+#define DEV_DMA_WIDTH_64(p)	(((p) & USB_CAP1_DMA_WIDTH_MASK) == (0x3 << 12))
+/*
+ * USB3 PHY Interface type
+ * These field reflects type of USB3 PHY interface implemented:
+ * 0x0 - USB PIPE,
+ * 0x1 - RMMI,
+ * 0x2-0xF - reserved
+ */
+#define USB_CAP1_U3PHY_TYPE_MASK GENMASK(19, 16)
+#define DEV_U3PHY_PIPE(p) (((p) & USB_CAP1_U3PHY_TYPE_MASK) == (0x0 << 16))
+#define DEV_U3PHY_RMMI(p) (((p) & USB_CAP1_U3PHY_TYPE_MASK) == (0x1 << 16))
+/*
+ * USB3 PHY Interface width
+ * These field reflects width of USB3 PHY interface implemented:
+ * 0x0 - 8 bit PIPE interface,
+ * 0x1 - 16 bit PIPE interface,
+ * 0x2 - 32 bit PIPE interface,
+ * 0x3 - 64 bit PIPE interface
+ * 0x4-0xF - reserved
+ * Note: When SSIC interface is implemented this field shows the width of
+ * internal PIPE interface. The RMMI interface is always 20bit wide.
+ */
+#define USB_CAP1_U3PHY_WIDTH_MASK GENMASK(23, 20)
+#define DEV_U3PHY_WIDTH_8(p) \
+	(((p) & USB_CAP1_U3PHY_WIDTH_MASK) == (0x0 << 20))
+#define DEV_U3PHY_WIDTH_16(p) \
+	(((p) & USB_CAP1_U3PHY_WIDTH_MASK) == (0x1 << 16))
+#define DEV_U3PHY_WIDTH_32(p) \
+	(((p) & USB_CAP1_U3PHY_WIDTH_MASK) == (0x2 << 20))
+#define DEV_U3PHY_WIDTH_64(p) \
+	(((p) & USB_CAP1_U3PHY_WIDTH_MASK) == (0x3 << 16))
+
+/*
+ * USB2 PHY Interface enable
+ * These field informs if USB2 PHY interface is implemented:
+ * 0x0 - interface NOT implemented,
+ * 0x1 - interface implemented
+ */
+#define USB_CAP1_U2PHY_EN(p)	((p) & BIT(24))
+/*
+ * USB2 PHY Interface type
+ * These field reflects type of USB2 PHY interface implemented:
+ * 0x0 - UTMI,
+ * 0x1 - ULPI
+ */
+#define DEV_U2PHY_ULPI(p)	((p) & BIT(25))
+/*
+ * USB2 PHY Interface width
+ * These field reflects width of USB2 PHY interface implemented:
+ * 0x0 - 8 bit interface,
+ * 0x1 - 16 bit interface,
+ * Note: The ULPI interface is always 8bit wide.
+ */
+#define DEV_U2PHY_WIDTH_16(p)	((p) & BIT(26))
+/*
+ * OTG Ready
+ * 0x0 - pure device mode
+ * 0x1 - some features and ports for CDNS USB OTG controller are implemented.
+ */
+#define USB_CAP1_OTG_READY(p)	((p) & BIT(27))
+
+/*
+ * When set, indicates that controller supports automatic internal TDL
+ * calculation basing on the size provided in TRB (TRB[22:17]) for DMULT mode
+ * Supported only for DEV_VER_V2 controller version.
+ */
+#define USB_CAP1_TDL_FROM_TRB(p)	((p) & BIT(28))
+
+/* USB_CAP2- bitmasks */
+/*
+ * The actual size of the connected On-chip RAM memory in kB:
+ * - 0 means 256 kB (max supported mem size)
+ * - value other than 0 reflects the mem size in kB
+ */
+#define USB_CAP2_ACTUAL_MEM_SIZE(p) ((p) & GENMASK(7, 0))
+/*
+ * Max supported mem size
+ * These field reflects width of on-chip RAM address bus width,
+ * which determines max supported mem size:
+ * 0x0-0x7 - reserved,
+ * 0x8 - support for 4kB mem,
+ * 0x9 - support for 8kB mem,
+ * 0xA - support for 16kB mem,
+ * 0xB - support for 32kB mem,
+ * 0xC - support for 64kB mem,
+ * 0xD - support for 128kB mem,
+ * 0xE - support for 256kB mem,
+ * 0xF - reserved
+ */
+#define USB_CAP2_MAX_MEM_SIZE(p) ((p) & GENMASK(11, 8))
+
+/* USB_CAP3- bitmasks */
+#define EP_IS_IMPLEMENTED(reg, index) ((reg) & (1 << (index)))
+
+/* USB_CAP4- bitmasks */
+#define EP_SUPPORT_ISO(reg, index) ((reg) & (1 << (index)))
+
+/* USB_CAP5- bitmasks */
+#define EP_SUPPORT_STREAM(reg, index) ((reg) & (1 << (index)))
+
+/* USB_CAP6- bitmasks */
+/* The USBSS-DEV Controller  Internal build number. */
+#define GET_DEV_BASE_VERSION(p) ((p) & GENMASK(23, 0))
+/* The USBSS-DEV Controller version number. */
+#define GET_DEV_CUSTOM_VERSION(p) ((p) & GENMASK(31, 24))
+
+#define DEV_VER_NXP_V1		0x00024502
+#define DEV_VER_TI_V1		0x00024509
+#define DEV_VER_V2		0x0002450C
+#define DEV_VER_V3		0x0002450d
+
+/* DBG_LINK1- bitmasks */
+/*
+ * LFPS_MIN_DET_U1_EXIT value This parameter configures the minimum
+ * time required for decoding the received LFPS as an LFPS.U1_Exit.
+ */
+#define DBG_LINK1_LFPS_MIN_DET_U1_EXIT(p)	((p) & GENMASK(7, 0))
+/*
+ * LFPS_MIN_GEN_U1_EXIT value This parameter configures the minimum time for
+ * phytxelecidle deassertion when LFPS.U1_Exit
+ */
+#define DBG_LINK1_LFPS_MIN_GEN_U1_EXIT_MASK	GENMASK(15, 8)
+#define DBG_LINK1_LFPS_MIN_GEN_U1_EXIT(p)	(((p) << 8) & GENMASK(15, 8))
+/*
+ * RXDET_BREAK_DIS value This parameter configures terminating the Far-end
+ * Receiver termination detection sequence:
+ * 0: it is possible that USBSS_DEV will terminate Farend receiver
+ *    termination detection sequence
+ * 1: USBSS_DEV will not terminate Far-end receiver termination
+ *    detection sequence
+ */
+#define DBG_LINK1_RXDET_BREAK_DIS		BIT(16)
+/* LFPS_GEN_PING value This parameter configures the LFPS.Ping generation */
+#define DBG_LINK1_LFPS_GEN_PING(p)		(((p) << 17) & GENMASK(21, 17))
+/*
+ * Set the LFPS_MIN_DET_U1_EXIT value Writing '1' to this bit writes the
+ * LFPS_MIN_DET_U1_EXIT field value to the device. This bit is automatically
+ * cleared. Writing '0' has no effect
+ */
+#define DBG_LINK1_LFPS_MIN_DET_U1_EXIT_SET	BIT(24)
+/*
+ * Set the LFPS_MIN_GEN_U1_EXIT value. Writing '1' to this bit writes the
+ * LFPS_MIN_GEN_U1_EXIT field value to the device. This bit is automatically
+ * cleared. Writing '0' has no effect
+ */
+#define DBG_LINK1_LFPS_MIN_GEN_U1_EXIT_SET	BIT(25)
+/*
+ * Set the RXDET_BREAK_DIS value Writing '1' to this bit writes
+ * the RXDET_BREAK_DIS field value to the device. This bit is automatically
+ * cleared. Writing '0' has no effect
+ */
+#define DBG_LINK1_RXDET_BREAK_DIS_SET		BIT(26)
+/*
+ * Set the LFPS_GEN_PING_SET value Writing '1' to this bit writes
+ * the LFPS_GEN_PING field value to the device. This bit is automatically
+ * cleared. Writing '0' has no effect."
+ */
+#define DBG_LINK1_LFPS_GEN_PING_SET		BIT(27)
+
+/* DMA_AXI_CTRL- bitmasks */
+/* The mawprot pin configuration. */
+#define DMA_AXI_CTRL_MARPROT(p) ((p) & GENMASK(2, 0))
+/* The marprot pin configuration. */
+#define DMA_AXI_CTRL_MAWPROT(p) (((p) & GENMASK(2, 0)) << 16)
+#define DMA_AXI_CTRL_NON_SECURE 0x02
+
+#define gadget_to_cdns3_device(g) (container_of(g, struct cdns3_device, gadget))
+
+#define ep_to_cdns3_ep(ep) (container_of(ep, struct cdns3_endpoint, endpoint))
+
+/*-------------------------------------------------------------------------*/
+/*
+ * USBSS-DEV DMA interface.
+ */
+#define TRBS_PER_SEGMENT	40
+
+#define ISO_MAX_INTERVAL	10
+
+#if TRBS_PER_SEGMENT < 2
+#error "Incorrect TRBS_PER_SEGMENT. Minimal Transfer Ring size is 2."
+#endif
+
+/*
+ *Only for ISOC endpoints - maximum number of TRBs is calculated as
+ * pow(2, bInterval-1) * number of usb requests. It is limitation made by
+ * driver to save memory. Controller must prepare TRB for each ITP even
+ * if bInterval > 1. It's the reason why driver needs so many TRBs for
+ * isochronous endpoints.
+ */
+#define TRBS_PER_ISOC_SEGMENT	(ISO_MAX_INTERVAL * 8)
+
+#define GET_TRBS_PER_SEGMENT(ep_type) ((ep_type) == USB_ENDPOINT_XFER_ISOC ? \
+				      TRBS_PER_ISOC_SEGMENT : TRBS_PER_SEGMENT)
+/**
+ * struct cdns3_trb - represent Transfer Descriptor block.
+ * @buffer:	pointer to buffer data
+ * @length:	length of data
+ * @control:	control flags.
+ *
+ * This structure describes transfer block serviced by DMA module.
+ */
+struct cdns3_trb {
+	__le32 buffer;
+	__le32 length;
+	__le32 control;
+};
+
+#define TRB_SIZE		(sizeof(struct cdns3_trb))
+#define TRB_RING_SIZE		(TRB_SIZE * TRBS_PER_SEGMENT)
+#define TRB_ISO_RING_SIZE	(TRB_SIZE * TRBS_PER_ISOC_SEGMENT)
+#define TRB_CTRL_RING_SIZE	(TRB_SIZE * 2)
+
+/* TRB bit mask */
+#define TRB_TYPE_BITMASK	GENMASK(15, 10)
+#define TRB_TYPE(p)		((p) << 10)
+#define TRB_FIELD_TO_TYPE(p)	(((p) & TRB_TYPE_BITMASK) >> 10)
+
+/* TRB type IDs */
+/* bulk, interrupt, isoc , and control data stage */
+#define TRB_NORMAL		1
+/* TRB for linking ring segments */
+#define TRB_LINK		6
+
+/* Cycle bit - indicates TRB ownership by driver or hw*/
+#define TRB_CYCLE		BIT(0)
+/*
+ * When set to '1', the device will toggle its interpretation of the Cycle bit
+ */
+#define TRB_TOGGLE		BIT(1)
+
+/*
+ * Short Packet (SP). OUT EPs at DMULT=1 only. Indicates if the TRB was
+ * processed while USB short packet was received. No more buffers defined by
+ * the TD will be used. DMA will automatically advance to next TD.
+ * - Shall be set to 0 by Software when putting TRB on the Transfer Ring
+ * - Shall be set to 1 by Controller when Short Packet condition for this TRB
+ *   is detected independent if ISP is set or not.
+ */
+#define TRB_SP			BIT(1)
+
+/* Interrupt on short packet*/
+#define TRB_ISP			BIT(2)
+/*Setting this bit enables FIFO DMA operation mode*/
+#define TRB_FIFO_MODE		BIT(3)
+/* Set PCIe no snoop attribute */
+#define TRB_CHAIN		BIT(4)
+/* Interrupt on completion */
+#define TRB_IOC			BIT(5)
+
+/* stream ID bitmasks. */
+#define TRB_STREAM_ID_BITMASK		GENMASK(31, 16)
+#define TRB_STREAM_ID(p)		((p) << 16)
+#define TRB_FIELD_TO_STREAMID(p)	(((p) & TRB_STREAM_ID_BITMASK) >> 16)
+
+/* Size of TD expressed in USB packets for HS/FS mode. */
+#define TRB_TDL_HS_SIZE(p)	(((p) << 16) & GENMASK(31, 16))
+#define TRB_TDL_HS_SIZE_GET(p)	(((p) & GENMASK(31, 16)) >> 16)
+
+/* transfer_len bitmasks. */
+#define TRB_LEN(p)		((p) & GENMASK(16, 0))
+
+/* Size of TD expressed in USB packets for SS mode. */
+#define TRB_TDL_SS_SIZE(p)	(((p) << 17) & GENMASK(23, 17))
+#define TRB_TDL_SS_SIZE_GET(p)	(((p) & GENMASK(23, 17)) >> 17)
+
+/* transfer_len bitmasks - bits 31:24 */
+#define TRB_BURST_LEN(p)	(((p) << 24) & GENMASK(31, 24))
+#define TRB_BURST_LEN_GET(p)	(((p) & GENMASK(31, 24)) >> 24)
+
+/* Data buffer pointer bitmasks*/
+#define TRB_BUFFER(p)		((p) & GENMASK(31, 0))
+
+/*-------------------------------------------------------------------------*/
+/* Driver numeric constants */
+
+/* Such declaration should be added to ch9.h */
+#define USB_DEVICE_MAX_ADDRESS		127
+
+/* Endpoint init values */
+#define CDNS3_EP_MAX_PACKET_LIMIT	1024
+#define CDNS3_EP_MAX_STREAMS		15
+#define CDNS3_EP0_MAX_PACKET_LIMIT	512
+
+/* All endpoints including EP0 */
+#define CDNS3_ENDPOINTS_MAX_COUNT	32
+#define CDNS3_EP_ZLP_BUF_SIZE		1024
+
+#define CDNS3_EP_BUF_SIZE		2	/* KB */
+#define CDNS3_EP_ISO_HS_MULT		3
+#define CDNS3_EP_ISO_SS_BURST		3
+#define CDNS3_MAX_NUM_DESCMISS_BUF	32
+#define CDNS3_DESCMIS_BUF_SIZE		2048	/* Bytes */
+#define CDNS3_WA2_NUM_BUFFERS		128
+/*-------------------------------------------------------------------------*/
+/* Used structs */
+
+struct cdns3_device;
+
+/**
+ * struct cdns3_endpoint - extended device side representation of USB endpoint.
+ * @endpoint: usb endpoint
+ * @pending_req_list: list of requests queuing on transfer ring.
+ * @deferred_req_list: list of requests waiting for queuing on transfer ring.
+ * @wa2_descmiss_req_list: list of requests internally allocated by driver.
+ * @trb_pool: transfer ring - array of transaction buffers
+ * @trb_pool_dma: dma address of transfer ring
+ * @cdns3_dev: device associated with this endpoint
+ * @name: a human readable name e.g. ep1out
+ * @flags: specify the current state of endpoint
+ * @descmis_req: internal transfer object used for getting data from on-chip
+ *     buffer. It can happen only if function driver doesn't send usb_request
+ *     object on time.
+ * @dir: endpoint direction
+ * @num: endpoint number (1 - 15)
+ * @type: set to bmAttributes & USB_ENDPOINT_XFERTYPE_MASK
+ * @interval: interval between packets used for ISOC endpoint.
+ * @free_trbs: number of free TRBs in transfer ring
+ * @num_trbs: number of all TRBs in transfer ring
+ * @pcs: producer cycle state
+ * @ccs: consumer cycle state
+ * @enqueue: enqueue index in transfer ring
+ * @dequeue: dequeue index in transfer ring
+ * @trb_burst_size: number of burst used in trb.
+ */
+struct cdns3_endpoint {
+	struct usb_ep		endpoint;
+	struct list_head	pending_req_list;
+	struct list_head	deferred_req_list;
+	struct list_head	wa2_descmiss_req_list;
+	int			wa2_counter;
+
+	struct cdns3_trb	*trb_pool;
+	dma_addr_t		trb_pool_dma;
+
+	struct cdns3_device	*cdns3_dev;
+	char			name[20];
+
+#define EP_ENABLED		BIT(0)
+#define EP_STALLED		BIT(1)
+#define EP_STALL_PENDING	BIT(2)
+#define EP_WEDGE		BIT(3)
+#define EP_TRANSFER_STARTED	BIT(4)
+#define EP_UPDATE_EP_TRBADDR	BIT(5)
+#define EP_PENDING_REQUEST	BIT(6)
+#define EP_RING_FULL		BIT(7)
+#define EP_CLAIMED		BIT(8)
+#define EP_DEFERRED_DRDY	BIT(9)
+#define EP_QUIRK_ISO_OUT_EN	BIT(10)
+#define EP_QUIRK_END_TRANSFER	BIT(11)
+#define EP_QUIRK_EXTRA_BUF_DET	BIT(12)
+#define EP_QUIRK_EXTRA_BUF_EN	BIT(13)
+	u32			flags;
+
+	struct cdns3_request	*descmis_req;
+
+	u8			dir;
+	u8			num;
+	u8			type;
+	int			interval;
+
+	int			free_trbs;
+	int			num_trbs;
+	u8			pcs;
+	u8			ccs;
+	int			enqueue;
+	int			dequeue;
+	u8			trb_burst_size;
+
+	unsigned int		wa1_set:1;
+	struct cdns3_trb	*wa1_trb;
+	unsigned int		wa1_trb_index;
+	unsigned int		wa1_cycle_bit:1;
+};
+
+/**
+ * struct cdns3_aligned_buf - represent aligned buffer used for DMA transfer
+ * @buf: aligned to 8 bytes data buffer. Buffer address used in
+ *       TRB shall be aligned to 8.
+ * @dma: dma address
+ * @size: size of buffer
+ * @in_use: inform if this buffer is associated with usb_request
+ * @list: used to adding instance of this object to list
+ */
+struct cdns3_aligned_buf {
+	void			*buf;
+	dma_addr_t		dma;
+	u32			size;
+	int			in_use:1;
+	struct list_head	list;
+};
+
+/**
+ * struct cdns3_request - extended device side representation of usb_request
+ *                        object .
+ * @request: generic usb_request object describing single I/O request.
+ * @priv_ep: extended representation of usb_ep object
+ * @trb: the first TRB association with this request
+ * @start_trb: number of the first TRB in transfer ring
+ * @end_trb: number of the last TRB in transfer ring
+ * @aligned_buf: object holds information about aligned buffer associated whit
+ *               this endpoint
+ * @flags: flag specifying special usage of request
+ * @list: used by internally allocated request to add to wa2_descmiss_req_list.
+ */
+struct cdns3_request {
+	struct usb_request		request;
+	struct cdns3_endpoint		*priv_ep;
+	struct cdns3_trb		*trb;
+	int				start_trb;
+	int				end_trb;
+	struct cdns3_aligned_buf	*aligned_buf;
+#define REQUEST_PENDING			BIT(0)
+#define REQUEST_INTERNAL		BIT(1)
+#define REQUEST_INTERNAL_CH		BIT(2)
+#define REQUEST_ZLP			BIT(3)
+#define REQUEST_UNALIGNED		BIT(4)
+	u32				flags;
+	struct list_head		list;
+};
+
+#define to_cdns3_request(r) (container_of(r, struct cdns3_request, request))
+
+/*Stages used during enumeration process.*/
+#define CDNS3_SETUP_STAGE		0x0
+#define CDNS3_DATA_STAGE		0x1
+#define CDNS3_STATUS_STAGE		0x2
+
+/**
+ * struct cdns3_device - represent USB device.
+ * @dev: pointer to device structure associated whit this controller
+ * @sysdev: pointer to the DMA capable device
+ * @gadget: device side representation of the peripheral controller
+ * @gadget_driver: pointer to the gadget driver
+ * @dev_ver: device controller version.
+ * @lock: for synchronizing
+ * @regs: base address for device side registers
+ * @setup_buf: used while processing usb control requests
+ * @setup_dma: dma address for setup_buf
+ * @zlp_buf - zlp buffer
+ * @ep0_stage: ep0 stage during enumeration process.
+ * @ep0_data_dir: direction for control transfer
+ * @eps: array of pointers to all endpoints with exclusion ep0
+ * @aligned_buf_list: list of aligned buffers internally allocated by driver
+ * @aligned_buf_wq: workqueue freeing  no longer used aligned buf.
+ * @selected_ep: actually selected endpoint. It's used only to improve
+ *               performance.
+ * @isoch_delay: value from Set Isoch Delay request. Only valid on SS/SSP.
+ * @u1_allowed: allow device transition to u1 state
+ * @u2_allowed: allow device transition to u2 state
+ * @is_selfpowered: device is self powered
+ * @setup_pending: setup packet is processing by gadget driver
+ * @hw_configured_flag: hardware endpoint configuration was set.
+ * @wake_up_flag: allow device to remote up the host
+ * @status_completion_no_call: indicate that driver is waiting for status s
+ *     stage completion. It's used in deferred SET_CONFIGURATION request.
+ * @onchip_buffers: number of available on-chip buffers.
+ * @onchip_used_size: actual size of on-chip memory assigned to endpoints.
+ * @pending_status_wq: workqueue handling status stage for deferred requests.
+ * @pending_status_request: request for which status stage was deferred
+ */
+struct cdns3_device {
+	struct udevice			*dev;
+	struct udevice			*sysdev;
+
+	struct usb_gadget		gadget;
+	struct usb_gadget_driver	*gadget_driver;
+
+#define CDNS_REVISION_V0		0x00024501
+#define CDNS_REVISION_V1		0x00024509
+	u32				dev_ver;
+
+	/* generic spin-lock for drivers */
+	spinlock_t			lock;
+
+	struct cdns3_usb_regs		__iomem *regs;
+
+	struct usb_ctrlrequest		*setup_buf;
+	dma_addr_t			setup_dma;
+	void				*zlp_buf;
+
+	u8				ep0_stage;
+	int				ep0_data_dir;
+
+	struct cdns3_endpoint		*eps[CDNS3_ENDPOINTS_MAX_COUNT];
+
+	struct list_head		aligned_buf_list;
+	struct work_struct		aligned_buf_wq;
+
+	u32				selected_ep;
+	u16				isoch_delay;
+
+	unsigned			wait_for_setup:1;
+	unsigned			u1_allowed:1;
+	unsigned			u2_allowed:1;
+	unsigned			is_selfpowered:1;
+	unsigned			setup_pending:1;
+	int				hw_configured_flag:1;
+	int				wake_up_flag:1;
+	unsigned			status_completion_no_call:1;
+	int				out_mem_is_allocated;
+
+	struct work_struct		pending_status_wq;
+	struct usb_request		*pending_status_request;
+
+	/*in KB */
+	u32				onchip_buffers;
+	u16				onchip_used_size;
+};
+
+void cdns3_set_register_bit(void __iomem *ptr, u32 mask);
+dma_addr_t cdns3_trb_virt_to_dma(struct cdns3_endpoint *priv_ep,
+				 struct cdns3_trb *trb);
+enum usb_device_speed cdns3_get_speed(struct cdns3_device *priv_dev);
+void cdns3_pending_setup_status_handler(struct work_struct *work);
+void cdns3_hw_reset_eps_config(struct cdns3_device *priv_dev);
+void cdns3_set_hw_configuration(struct cdns3_device *priv_dev);
+void cdns3_select_ep(struct cdns3_device *priv_dev, u32 ep);
+void cdns3_allow_enable_l1(struct cdns3_device *priv_dev, int enable);
+struct usb_request *cdns3_next_request(struct list_head *list);
+int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep,
+			  struct usb_request *request);
+void cdns3_rearm_transfer(struct cdns3_endpoint *priv_ep, u8 rearm);
+int cdns3_allocate_trb_pool(struct cdns3_endpoint *priv_ep);
+u8 cdns3_ep_addr_to_index(u8 ep_addr);
+int cdns3_gadget_ep_set_wedge(struct usb_ep *ep);
+int cdns3_gadget_ep_set_halt(struct usb_ep *ep, int value);
+void __cdns3_gadget_ep_set_halt(struct cdns3_endpoint *priv_ep);
+int __cdns3_gadget_ep_clear_halt(struct cdns3_endpoint *priv_ep);
+struct usb_request *cdns3_gadget_ep_alloc_request(struct usb_ep *ep,
+						  gfp_t gfp_flags);
+void cdns3_gadget_ep_free_request(struct usb_ep *ep,
+				  struct usb_request *request);
+int cdns3_gadget_ep_dequeue(struct usb_ep *ep, struct usb_request *request);
+void cdns3_gadget_giveback(struct cdns3_endpoint *priv_ep,
+			   struct cdns3_request *priv_req,
+			   int status);
+
+int cdns3_init_ep0(struct cdns3_device *priv_dev,
+		   struct cdns3_endpoint *priv_ep);
+void cdns3_ep0_config(struct cdns3_device *priv_dev);
+void cdns3_ep_config(struct cdns3_endpoint *priv_ep);
+void cdns3_check_ep0_interrupt_proceed(struct cdns3_device *priv_dev, int dir);
+int __cdns3_gadget_wakeup(struct cdns3_device *priv_dev);
+
+#endif /* __LINUX_CDNS3_GADGET */
diff --git a/drivers/usb/cdns3/host-export.h b/drivers/usb/cdns3/host-export.h
new file mode 100644
index 0000000000..b498a170b7
--- /dev/null
+++ b/drivers/usb/cdns3/host-export.h
@@ -0,0 +1,28 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Cadence USBSS DRD Driver - Host Export APIs
+ *
+ * Copyright (C) 2017-2018 NXP
+ *
+ * Authors: Peter Chen <peter.chen@nxp.com>
+ */
+#ifndef __LINUX_CDNS3_HOST_EXPORT
+#define __LINUX_CDNS3_HOST_EXPORT
+
+#ifdef CONFIG_USB_CDNS3_HOST
+
+int cdns3_host_init(struct cdns3 *cdns);
+void cdns3_host_exit(struct cdns3 *cdns);
+
+#else
+
+static inline int cdns3_host_init(struct cdns3 *cdns)
+{
+	return -ENXIO;
+}
+
+static inline void cdns3_host_exit(struct cdns3 *cdns) { }
+
+#endif /* CONFIG_USB_CDNS3_HOST */
+
+#endif /* __LINUX_CDNS3_HOST_EXPORT */
diff --git a/drivers/usb/cdns3/host.c b/drivers/usb/cdns3/host.c
new file mode 100644
index 0000000000..79be63001d
--- /dev/null
+++ b/drivers/usb/cdns3/host.c
@@ -0,0 +1,55 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Cadence USBSS DRD Driver - host side
+ *
+ * Copyright (C) 2018-2019 Cadence Design Systems.
+ * Copyright (C) 2017-2018 NXP
+ *
+ * Authors: Peter Chen <peter.chen@nxp.com>
+ *          Pawel Laszczak <pawell@cadence.com>
+ */
+#include <dm.h>
+#include <linux/compat.h>
+#include <usb.h>
+#include "../host/xhci.h"
+
+#include "core.h"
+#include "drd.h"
+
+static int __cdns3_host_init(struct cdns3 *cdns)
+{
+	struct xhci_hcor *hcor;
+	struct xhci_hccr *hccr;
+
+	cdns3_drd_switch_host(cdns, 1);
+
+	hccr = (struct xhci_hccr *)cdns->xhci_regs;
+	hcor = (struct xhci_hcor *)(cdns->xhci_regs +
+			HC_LENGTH(xhci_readl(&(hccr)->cr_capbase)));
+
+	return xhci_register(cdns->dev, hccr, hcor);
+}
+
+static void cdns3_host_exit(struct cdns3 *cdns)
+{
+	xhci_deregister(cdns->dev);
+	cdns3_drd_switch_host(cdns, 0);
+}
+
+int cdns3_host_init(struct cdns3 *cdns)
+{
+	struct cdns3_role_driver *rdrv;
+
+	rdrv = devm_kzalloc(cdns->dev, sizeof(*rdrv), GFP_KERNEL);
+	if (!rdrv)
+		return -ENOMEM;
+
+	rdrv->start	= __cdns3_host_init;
+	rdrv->stop	= cdns3_host_exit;
+	rdrv->state	= CDNS3_ROLE_STATE_INACTIVE;
+	rdrv->name	= "host";
+
+	cdns->roles[USB_ROLE_HOST] = rdrv;
+
+	return 0;
+}
diff --git a/drivers/usb/cdns3/trace.c b/drivers/usb/cdns3/trace.c
new file mode 100644
index 0000000000..459fa72d9c
--- /dev/null
+++ b/drivers/usb/cdns3/trace.c
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * USBSS device controller driver Trace Support
+ *
+ * Copyright (C) 2018-2019 Cadence.
+ *
+ * Author: Pawel Laszczak <pawell@cadence.com>
+ */
+
+#define CREATE_TRACE_POINTS
+#include "trace.h"
diff --git a/drivers/usb/cdns3/trace.h b/drivers/usb/cdns3/trace.h
new file mode 100644
index 0000000000..e86c02ae9b
--- /dev/null
+++ b/drivers/usb/cdns3/trace.h
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+#define trace_cdns3_prepare_trb(a, b)
+#define trace_cdns3_doorbell_ep0(a, b)
+#define trace_cdns3_ctrl_req(a)
+#define trace_cdns3_complete_trb(a, b)
+#define trace_cdns3_ep0_irq(a, b)
+#define trace_cdns3_gadget_giveback(a)
+#define trace_cdns3_free_aligned_request(a)
+#define trace_cdns3_prepare_aligned_request(a)
+#define trace_cdns3_ring(a)
+#define trace_cdns3_doorbell_epx(a, b)
+#define trace_cdns3_request_handled(a, b, c)
+#define trace_cdns3_epx_irq(a, b)
+#define trace_cdns3_usb_irq(a, b)
+#define trace_cdns3_alloc_request(a)
+#define trace_cdns3_free_request(a)
+#define trace_cdns3_gadget_ep_enable(a)
+#define trace_cdns3_gadget_ep_disable(a)
+#define trace_cdns3_ep0_queue(a, b)
+#define trace_cdns3_ep0_dequeue(a)
+#define trace_cdns3_ep_queue(a)
+#define trace_cdns3_ep_dequeue(a)
+#define trace_cdns3_halt(a, b, c)
+#define trace_cdns3_wa1(a, b)
+#define trace_cdns3_wa2(a, b)
diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index 6d73f4042f..e2f30b2bf5 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -86,6 +86,7 @@ endif
 libs-$(CONFIG_SPL_LIBDISK_SUPPORT) += disk/
 libs-y += drivers/
 libs-$(CONFIG_SPL_USB_GADGET) += drivers/usb/dwc3/
+libs-$(CONFIG_SPL_USB_GADGET) += drivers/usb/cdns3/
 libs-y += dts/
 libs-y += fs/
 libs-$(CONFIG_SPL_POST_MEM_SUPPORT) += post/drivers/

commit 16dff7857a5dae5a6083c71e6f277799b1f5b98f
Author: Sherry Sun <sherry.sun@nxp.com>
Date:   Tue Oct 1 17:26:32 2019 +0530

    UPSTREAM: usb: udc: Introduce ->udc_set_speed() method
    
    This patch was copied from kernel commit: 67fdfda4a99ed.
    
    Sometimes, the gadget driver we want to run has max_speed lower than
    what the UDC supports. In such situations, UDC might want to make sure
    we don't try to connect on speeds not supported by the gadget
    driver because that will just fail.
    
    So here introduce a new optional ->udc_set_speed() method which can be
    implemented by interested UDC drivers to achieve this purpose.
    
    Change-Id: I8ce57970c9095a92553ee12520e3724bd029d6b6
    Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
    Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 8d94e184ffdef48b40942c12d9e7b0290e60a1ef)

diff --git a/drivers/usb/gadget/udc/udc-core.c b/drivers/usb/gadget/udc/udc-core.c
index 49ba21cba3..83744c1542 100644
--- a/drivers/usb/gadget/udc/udc-core.c
+++ b/drivers/usb/gadget/udc/udc-core.c
@@ -268,6 +268,27 @@ EXPORT_SYMBOL_GPL(usb_del_gadget_udc);
 
 /* ------------------------------------------------------------------------- */
 
+/**
+ * usb_gadget_udc_set_speed - tells usb device controller speed supported by
+ *    current driver
+ * @udc: The device we want to set maximum speed
+ * @speed: The maximum speed to allowed to run
+ *
+ * This call is issued by the UDC Class driver before calling
+ * usb_gadget_udc_start() in order to make sure that we don't try to
+ * connect on speeds the gadget driver doesn't support.
+ */
+static inline void usb_gadget_udc_set_speed(struct usb_udc *udc,
+					    enum usb_device_speed speed)
+{
+	if (udc->gadget->ops->udc_set_speed) {
+		enum usb_device_speed s;
+
+		s = min(speed, udc->gadget->max_speed);
+		udc->gadget->ops->udc_set_speed(udc->gadget, s);
+	}
+}
+
 static int udc_bind_to_driver(struct usb_udc *udc, struct usb_gadget_driver *driver)
 {
 	int ret;
@@ -277,6 +298,8 @@ static int udc_bind_to_driver(struct usb_udc *udc, struct usb_gadget_driver *dri
 
 	udc->driver = driver;
 
+	usb_gadget_udc_set_speed(udc, driver->speed);
+
 	ret = driver->bind(udc->gadget);
 	if (ret)
 		goto err1;
diff --git a/include/linux/usb/gadget.h b/include/linux/usb/gadget.h
index 395242d508..705ed14976 100644
--- a/include/linux/usb/gadget.h
+++ b/include/linux/usb/gadget.h
@@ -472,6 +472,8 @@ struct usb_gadget_ops {
 	struct usb_ep *(*match_ep)(struct usb_gadget *,
 			struct usb_endpoint_descriptor *,
 			struct usb_ss_ep_comp_descriptor *);
+	void	(*udc_set_speed)(struct usb_gadget *gadget,
+				 enum usb_device_speed);
 };
 
 /**

commit 0943909d366fe9396d611764901fa2bf8e5d0b59
Author: Vignesh Raghavendra <vigneshr@ti.com>
Date:   Tue Oct 1 17:26:31 2019 +0530

    UPSTREAM: usb: gadget: Add match_ep() op to usb_gadget_ops
    
    Add match_ep() op to usb_gadget_ops similar to Linux kernel which is
    useful in finding a suitable ep match for the function driver. This will
    avoid adding more gadget_is_xxx() handling code to usb_ep_autoconfig().
    
    Also sync usb_ep_caps struct thats is usually used in the match_ep()
    callback by the gadget controller driver
    
    Change-Id: I94fe5d1b3ae984cbf3f6e10f86020191d8ca8090
    Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 77dcbdf3c1ce96de19c00caca0766b5bbaa0cf28)

diff --git a/drivers/usb/gadget/epautoconf.c b/drivers/usb/gadget/epautoconf.c
index 6d6dbcb09c..e566ad5a57 100644
--- a/drivers/usb/gadget/epautoconf.c
+++ b/drivers/usb/gadget/epautoconf.c
@@ -285,6 +285,9 @@ struct usb_ep *usb_ep_autoconfig(
 			return ep;
 	}
 
+	if (gadget->ops->match_ep)
+		ep = gadget->ops->match_ep(gadget, desc, NULL);
+
 	/* Second, look at endpoints until an unclaimed one looks usable */
 	list_for_each_entry(ep, &gadget->ep_list, ep_list) {
 		if (ep_matches(gadget, ep, desc))
diff --git a/include/linux/usb/gadget.h b/include/linux/usb/gadget.h
index 272130a705..395242d508 100644
--- a/include/linux/usb/gadget.h
+++ b/include/linux/usb/gadget.h
@@ -129,11 +129,30 @@ struct usb_ep_ops {
 	void (*fifo_flush) (struct usb_ep *ep);
 };
 
+/**
+ * struct usb_ep_caps - endpoint capabilities description
+ * @type_control:Endpoint supports control type (reserved for ep0).
+ * @type_iso:Endpoint supports isochronous transfers.
+ * @type_bulk:Endpoint supports bulk transfers.
+ * @type_int:Endpoint supports interrupt transfers.
+ * @dir_in:Endpoint supports IN direction.
+ * @dir_out:Endpoint supports OUT direction.
+ */
+struct usb_ep_caps {
+	unsigned type_control:1;
+	unsigned type_iso:1;
+	unsigned type_bulk:1;
+	unsigned type_int:1;
+	unsigned dir_in:1;
+	unsigned dir_out:1;
+};
+
 /**
  * struct usb_ep - device side representation of USB endpoint
  * @name:identifier for the endpoint, such as "ep-a" or "ep9in-bulk"
  * @ops: Function pointers used to access hardware-specific operations.
  * @ep_list:the gadget's ep_list holds all of its endpoints
+ * @caps:The structure describing types and directions supported by endoint.
  * @maxpacket:The maximum packet size used on this endpoint.  The initial
  *	value can sometimes be reduced (hardware allowing), according to
  *      the endpoint descriptor used to configure the endpoint.
@@ -159,6 +178,7 @@ struct usb_ep {
 	const char		*name;
 	const struct usb_ep_ops	*ops;
 	struct list_head	ep_list;
+	struct usb_ep_caps	caps;
 	unsigned		maxpacket:16;
 	unsigned		maxpacket_limit:16;
 	unsigned		max_streams:16;
@@ -449,6 +469,9 @@ struct usb_gadget_ops {
 	int	(*udc_start)(struct usb_gadget *,
 			     struct usb_gadget_driver *);
 	int	(*udc_stop)(struct usb_gadget *);
+	struct usb_ep *(*match_ep)(struct usb_gadget *,
+			struct usb_endpoint_descriptor *,
+			struct usb_ss_ep_comp_descriptor *);
 };
 
 /**

commit db0e15c2c39d6ed1cac27e50c2fe21c062e2564d
Author: Marek Vasut <marek.vasut+renesas@gmail.com>
Date:   Sun Oct 6 16:13:38 2019 +0200

    UPSTREAM: usb: ehci-hcd: Keep async schedule running
    
    Profiling the EHCI driver shows a significant performance problem in
    ehci_submit_async(). Specifically, this function keeps enabling and
    disabling async schedule back and forth for every single transaction.
    However, enabling/disabling the async schedule does not take effect
    immediatelly, but instead may take up to 1 mS (8 uFrames) to complete.
    
    This impacts USB storage significantly, esp. since the recent reduction
    of maximum transfer size to support more USB storage devices. This in
    turn results in sharp increase in the number of ehci_submit_async()
    calls. Since one USB storage BBB transfer does three such calls and
    the maximum transfer size is 120 kiB, the overhead is 6 mS per 120 kiB,
    which is unacceptable.
    
    However, this overhead can be removed simply by keeping the async
    schedule running. Specifically, the first transfer starts the async
    schedule and then each and every subsequent transfer only adds a new
    QH into that schedule, waits until the QH is completed and does NOT
    disable the async schedule. The async schedule is stopped only by
    shutting down the controller, which must happen before moving out
    of U-Boot, otherwise the controller will corrupt memory.
    
    Change-Id: I33a5eccac2579be09c5f1c9385ae245e680bc125
    Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
    Cc: Bin Meng <bmeng.cn@gmail.com>
    Cc: Simon Glass <sjg@chromium.org>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 02b0e1a36c5bc20174299312556ec4e266872bd6)

diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index 742759eef5..a355c8cce3 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -308,7 +308,7 @@ ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,
 	volatile struct qTD *vtd;
 	unsigned long ts;
 	uint32_t *tdp;
-	uint32_t endpt, maxpacket, token, usbsts;
+	uint32_t endpt, maxpacket, token, usbsts, qhtoken;
 	uint32_t c, toggle;
 	uint32_t cmd;
 	int timeout;
@@ -546,22 +546,21 @@ ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,
 	flush_dcache_range((unsigned long)qtd,
 			   ALIGN_END_ADDR(struct qTD, qtd, qtd_count));
 
-	/* Set async. queue head pointer. */
-	ehci_writel(&ctrl->hcor->or_asynclistaddr, virt_to_phys(&ctrl->qh_list));
-
 	usbsts = ehci_readl(&ctrl->hcor->or_usbsts);
 	ehci_writel(&ctrl->hcor->or_usbsts, (usbsts & 0x3f));
 
 	/* Enable async. schedule. */
 	cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
-	cmd |= CMD_ASE;
-	ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
+	if (!(cmd & CMD_ASE)) {
+		cmd |= CMD_ASE;
+		ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
 
-	ret = handshake((uint32_t *)&ctrl->hcor->or_usbsts, STS_ASS, STS_ASS,
-			100 * 1000);
-	if (ret < 0) {
-		printf("EHCI fail timeout STS_ASS set\n");
-		goto fail;
+		ret = handshake((uint32_t *)&ctrl->hcor->or_usbsts, STS_ASS, STS_ASS,
+				100 * 1000);
+		if (ret < 0) {
+			printf("EHCI fail timeout STS_ASS set\n");
+			goto fail;
+		}
 	}
 
 	/* Wait for TDs to be processed. */
@@ -582,6 +581,11 @@ ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,
 			break;
 		WATCHDOG_RESET();
 	} while (get_timer(ts) < timeout);
+	qhtoken = hc32_to_cpu(qh->qh_overlay.qt_token);
+
+	ctrl->qh_list.qh_link = cpu_to_hc32(virt_to_phys(&ctrl->qh_list) | QH_LINK_TYPE_QH);
+	flush_dcache_range((unsigned long)&ctrl->qh_list,
+		ALIGN_END_ADDR(struct QH, &ctrl->qh_list, 1));
 
 	/*
 	 * Invalidate the memory area occupied by buffer
@@ -600,25 +604,12 @@ ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,
 	if (QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE)
 		printf("EHCI timed out on TD - token=%#x\n", token);
 
-	/* Disable async schedule. */
-	cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
-	cmd &= ~CMD_ASE;
-	ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
-
-	ret = handshake((uint32_t *)&ctrl->hcor->or_usbsts, STS_ASS, 0,
-			100 * 1000);
-	if (ret < 0) {
-		printf("EHCI fail timeout STS_ASS reset\n");
-		goto fail;
-	}
-
-	token = hc32_to_cpu(qh->qh_overlay.qt_token);
-	if (!(QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE)) {
-		debug("TOKEN=%#x\n", token);
-		switch (QT_TOKEN_GET_STATUS(token) &
+	if (!(QT_TOKEN_GET_STATUS(qhtoken) & QT_TOKEN_STATUS_ACTIVE)) {
+		debug("TOKEN=%#x\n", qhtoken);
+		switch (QT_TOKEN_GET_STATUS(qhtoken) &
 			~(QT_TOKEN_STATUS_SPLITXSTATE | QT_TOKEN_STATUS_PERR)) {
 		case 0:
-			toggle = QT_TOKEN_GET_DT(token);
+			toggle = QT_TOKEN_GET_DT(qhtoken);
 			usb_settoggle(dev, usb_pipeendpoint(pipe),
 				       usb_pipeout(pipe), toggle);
 			dev->status = 0;
@@ -636,11 +627,11 @@ ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,
 			break;
 		default:
 			dev->status = USB_ST_CRC_ERR;
-			if (QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_HALTED)
+			if (QT_TOKEN_GET_STATUS(qhtoken) & QT_TOKEN_STATUS_HALTED)
 				dev->status |= USB_ST_STALLED;
 			break;
 		}
-		dev->act_len = length - QT_TOKEN_GET_TOTALBYTES(token);
+		dev->act_len = length - QT_TOKEN_GET_TOTALBYTES(qhtoken);
 	} else {
 		dev->act_len = 0;
 #ifndef CONFIG_USB_EHCI_FARADAY

commit 3a9207743d9dd0e2c2a4a6af4d84e0f10f03cd0f
Author: Marek Szyprowski <m.szyprowski@samsung.com>
Date:   Wed Oct 2 14:19:14 2019 +0200

    UPSTREAM: dwc3: flush cache only if there is a buffer attached to a request
    
    Calling cache flush on invalid buffer, even with zero length might cause
    an exception on certain platforms.
    
    Change-Id: Idf8e2c87a24c80627279faa69430881d5c2c6800
    Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit fd15b58c1a9a61edcdeef8ce1eb4df2442295f58)

diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index cc909d9d9a..99efd6799a 100644
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -243,7 +243,8 @@ void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req,
 
 	list_del(&req->list);
 	req->trb = NULL;
-	dwc3_flush_cache((uintptr_t)req->request.dma, req->request.length);
+	if (req->request.length)
+		dwc3_flush_cache((uintptr_t)req->request.dma, req->request.length);
 
 	if (req->request.status == -EINPROGRESS)
 		req->request.status = status;

commit 10daf974922be00e3d3bbca0dcf5a05ce47932ee
Author: Marek Szyprowski <m.szyprowski@samsung.com>
Date:   Wed Oct 2 12:27:18 2019 +0200

    UPSTREAM: gadget: f_thor: properly enable 3rd endpoint defined by the protocol
    
    This is needed to make Windows THOR flash tool happy, because it
    starts sending data only when interrupt packet is received on the 3rd
    endpoint.
    
    Change-Id: I51b9eee20646a7a0f65a1282fe96a575d3ebead7
    Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
    Acked-by: Lukasz Majewski <lukma@denx.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit ade08db8993687926773b32a477d9a24a9ede9e7)

diff --git a/drivers/usb/gadget/f_thor.c b/drivers/usb/gadget/f_thor.c
index 4a36cd4709..57110b7041 100644
--- a/drivers/usb/gadget/f_thor.c
+++ b/drivers/usb/gadget/f_thor.c
@@ -942,6 +942,13 @@ static int thor_eps_setup(struct usb_function *f)
 	dev->out_req = req;
 	/* ACM control EP */
 	ep = dev->int_ep;
+	d = ep_desc(gadget, &hs_int_desc, &fs_int_desc);
+	debug("(d)bEndpointAddress: 0x%x\n", d->bEndpointAddress);
+
+	result = usb_ep_enable(ep, d);
+	if (result)
+		goto err;
+
 	ep->driver_data = cdev;	/* claim */
 
 	return 0;

commit c6e835c1fdca80a7c6cd9abc6f1ea79803bff6fa
Author: Vignesh Raghavendra <vigneshr@ti.com>
Date:   Fri Oct 25 13:48:05 2019 +0530

    UPSTREAM: dwc3-generic: Don't fail probe if clk/reset entries are absent
    
    Some boards don't populate clk/reset entries as these are are optional
    as per binding documentation. Therefore, don't fail driver probe if
    clk/reset entries are absent in DT.
    
    This fixes fastboot failures seen due to enabling of CONFIG_CLK on AM57xx
    
    Change-Id: I5a8e1d24f74b78647fd263ba11eaf68d4252abb5
    Fixes: e8e683d33b0c ("board: ti: am57xx-idk: Configure the CDCE913 clock synthesizer")
    Reported-by: Sam Protsenko <semen.protsenko@linaro.org>
    Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit d624434f5ebc5e3eb5f5609f06200f477cf8d8b5)

diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c
index c42b9411bc..12dbcfde29 100644
--- a/drivers/usb/dwc3/dwc3-generic.c
+++ b/drivers/usb/dwc3/dwc3-generic.c
@@ -338,7 +338,7 @@ static int dwc3_glue_reset_init(struct udevice *dev,
 	int ret;
 
 	ret = reset_get_bulk(dev, &glue->resets);
-	if (ret == -ENOTSUPP)
+	if (ret == -ENOTSUPP || ret == -ENOENT)
 		return 0;
 	else if (ret)
 		return ret;
@@ -358,7 +358,7 @@ static int dwc3_glue_clk_init(struct udevice *dev,
 	int ret;
 
 	ret = clk_get_bulk(dev, &glue->clks);
-	if (ret == -ENOSYS)
+	if (ret == -ENOSYS || ret == -ENOENT)
 		return 0;
 	if (ret)
 		return ret;

commit 48afbe4fcc97a51b6c7f58458749325cc4ce886c
Author: Ye Li <ye.li@nxp.com>
Date:   Thu Oct 24 10:29:32 2019 -0300

    UPSTREAM: ehci-mx6: Update EHCI driver to support OTG0 on i.MX7ULP
    
    The ULP has two USB controllers. These two controllers have similar NC
    registers layout as i.MX7D. But OTG0 uses UTMI PHY simliar as i.MX6, not
    the integrated PHY on i.MX7D. The OTG1 needs off-chip HSIC PHY or ULPI PHY
    to work.
    
    This patch only supports OTG0 with UTMI PHY.
    
    Change-Id: Iccbcd113f87e5382eab12558abbb7ff596e4688d
    Signed-off-by: Ye Li <ye.li@nxp.com>
    Signed-off-by: Fabio Estevam <festevam@gmail.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 235f5e158e336371759f98ffbf265fe078cda251)

diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 90ad53429b..67f9ea2ddd 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -111,8 +111,8 @@ config USB_EHCI_MARVELL
 	  Enables support for the on-chip EHCI controller on MVEBU SoCs.
 
 config USB_EHCI_MX6
-	bool "Support for i.MX6 on-chip EHCI USB controller"
-	depends on ARCH_MX6
+	bool "Support for i.MX6/i.MX7ULP on-chip EHCI USB controller"
+	depends on ARCH_MX6 || ARCH_MX7ULP
 	default y
 	---help---
 	  Enables support for the on-chip EHCI controller on i.MX6 SoCs.
@@ -139,7 +139,7 @@ config USB_EHCI_VF
 	help
 	  Enables support for the on-chip EHCI controller on Vybrid SoCs.
 
-if USB_EHCI_MX7
+if USB_EHCI_MX6 || USB_EHCI_MX7
 
 config MXC_USB_OTG_HACTIVE
 	bool "USB Power pin high active"
diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c
index 563d29a537..5dde795a20 100644
--- a/drivers/usb/host/ehci-mx6.c
+++ b/drivers/usb/host/ehci-mx6.c
@@ -65,10 +65,12 @@ DECLARE_GLOBAL_DATA_PTR;
 #define UCMD_RUN_STOP           (1 << 0) /* controller run/stop */
 #define UCMD_RESET		(1 << 1) /* controller reset */
 
-#if defined(CONFIG_MX6)
+#if defined(CONFIG_MX6) || defined(CONFIG_MX7ULP)
 static const unsigned phy_bases[] = {
 	USB_PHY0_BASE_ADDR,
+#if defined(USB_PHY1_BASE_ADDR)
 	USB_PHY1_BASE_ADDR,
+#endif
 };
 
 static void usb_internal_phy_clock_gate(int index, int on)
@@ -85,6 +87,20 @@ static void usb_internal_phy_clock_gate(int index, int on)
 
 static void usb_power_config(int index)
 {
+#if defined(CONFIG_MX7ULP)
+	struct usbphy_regs __iomem *usbphy =
+		(struct usbphy_regs __iomem *)USB_PHY0_BASE_ADDR;
+
+	if (index > 0)
+		return;
+
+	writel(ANADIG_USB2_CHRG_DETECT_EN_B |
+		   ANADIG_USB2_CHRG_DETECT_CHK_CHRG_B,
+		   &usbphy->usb1_chrg_detect);
+
+	scg_enable_usb_pll(true);
+
+#else
 	struct anatop_regs __iomem *anatop =
 		(struct anatop_regs __iomem *)ANATOP_BASE_ADDR;
 	void __iomem *chrg_detect;
@@ -124,6 +140,8 @@ static void usb_power_config(int index)
 		     ANADIG_USB2_PLL_480_CTRL_POWER |
 		     ANADIG_USB2_PLL_480_CTRL_EN_USB_CLKS,
 		     pll_480_ctrl_set);
+
+#endif
 }
 
 /* Return 0 : host node, <>0 : device mode */
@@ -186,6 +204,14 @@ int usb_phy_mode(int port)
 		return USB_INIT_HOST;
 }
 
+#if defined(CONFIG_MX7ULP)
+struct usbnc_regs {
+	u32 ctrl1;
+	u32 ctrl2;
+	u32 reserve0[2];
+	u32 hsic_ctrl;
+};
+#else
 /* Base address for this IP block is 0x02184800 */
 struct usbnc_regs {
 	u32	ctrl[4];	/* otg/host1-3 */
@@ -194,6 +220,8 @@ struct usbnc_regs {
 	u32	otg_phy_ctrl_0;
 	u32	uh1_phy_ctrl_0;
 };
+#endif
+
 #elif defined(CONFIG_MX7)
 struct usbnc_regs {
 	u32 ctrl1;
@@ -214,20 +242,12 @@ static void usb_power_config(int index)
 	struct usbnc_regs *usbnc = (struct usbnc_regs *)(USB_BASE_ADDR +
 			(0x10000 * index) + USBNC_OFFSET);
 	void __iomem *phy_cfg2 = (void __iomem *)(&usbnc->phy_cfg2);
-	void __iomem *ctrl = (void __iomem *)(&usbnc->ctrl1);
 
 	/*
 	 * Clear the ACAENB to enable usb_otg_id detection,
 	 * otherwise it is the ACA detection enabled.
 	 */
 	clrbits_le32(phy_cfg2, USBNC_PHYCFG2_ACAENB);
-
-	/* Set power polarity to high active */
-#ifdef CONFIG_MXC_USB_OTG_HACTIVE
-	setbits_le32(ctrl, UCTRL_PWR_POL);
-#else
-	clrbits_le32(ctrl, UCTRL_PWR_POL);
-#endif
 }
 
 int usb_phy_mode(int port)
@@ -252,7 +272,7 @@ static void usb_oc_config(int index)
 	struct usbnc_regs *usbnc = (struct usbnc_regs *)(USB_BASE_ADDR +
 			USB_OTHERREGS_OFFSET);
 	void __iomem *ctrl = (void __iomem *)(&usbnc->ctrl[index]);
-#elif defined(CONFIG_MX7)
+#elif defined(CONFIG_MX7) || defined(CONFIG_MX7ULP)
 	struct usbnc_regs *usbnc = (struct usbnc_regs *)(USB_BASE_ADDR +
 			(0x10000 * index) + USBNC_OFFSET);
 	void __iomem *ctrl = (void __iomem *)(&usbnc->ctrl1);
@@ -266,6 +286,13 @@ static void usb_oc_config(int index)
 #endif
 
 	setbits_le32(ctrl, UCTRL_OVER_CUR_DIS);
+
+	/* Set power polarity to high active */
+#ifdef CONFIG_MXC_USB_OTG_HACTIVE
+	setbits_le32(ctrl, UCTRL_PWR_POL);
+#else
+	clrbits_le32(ctrl, UCTRL_PWR_POL);
+#endif
 }
 
 /**
@@ -329,7 +356,7 @@ int ehci_mx6_common_init(struct usb_ehci *ehci, int index)
 	usb_power_config(index);
 	usb_oc_config(index);
 
-#if defined(CONFIG_MX6)
+#if defined(CONFIG_MX6) || defined(CONFIG_MX7ULP)
 	usb_internal_phy_clock_gate(index, 1);
 	usb_phy_enable(index, ehci);
 #endif
@@ -344,7 +371,7 @@ int ehci_hcd_init(int index, enum usb_init_type init,
 	enum usb_init_type type;
 #if defined(CONFIG_MX6)
 	u32 controller_spacing = 0x200;
-#elif defined(CONFIG_MX7)
+#elif defined(CONFIG_MX7) || defined(CONFIG_MX7ULP)
 	u32 controller_spacing = 0x10000;
 #endif
 	struct usb_ehci *ehci = (struct usb_ehci *)(USB_BASE_ADDR +
@@ -447,7 +474,7 @@ static int ehci_usb_phy_mode(struct udevice *dev)
 	 * About fsl,usbphy, Refer to
 	 * Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt.
 	 */
-	if (is_mx6()) {
+	if (is_mx6() || is_mx7ulp()) {
 		phy_off = fdtdec_lookup_phandle(blob,
 						offset,
 						"fsl,usbphy");

commit a9aeb7ee7411a74291458916cde7fa28efeed4e6
Author: Igor Opaniuk <igor.opaniuk@toradex.com>
Date:   Thu Oct 10 16:09:35 2019 +0300

    UPSTREAM: usb: ehci-mx6: Fix bus enumeration for iMX7 SoCs
    
    This fixes the issues with calculation of controller indexes in
    ehci_usb_bind() for iMX7, as USB controllers on iMX7 SoCs aren't
    placed next to each other, and their addresses incremented by 0x10000.
    
    Example of USB nodes for iMX7S/D:
    
    usbotg1: usb@30b10000 {
        compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
        reg = <0x30b10000 0x200>;
               ^^^^^^^^^^
    ....
    usbotg2: usb@30b20000 {
        compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
        reg = <0x30b20000 0x200>;
               ^^^^^^^^^^
    ....
    
    usbh: usb@30b30000 {
        compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
        reg = <0x30b30000 0x200>;
               ^^^^^^^^^^
    ....
    
    Which was leading to usb enumeration issues:
    Colibri iMX7 # usb start
    starting USB...
    Bus usb@30b10000: USB EHCI 1.00
    Bus usb@30b20000: probe failed, error -22
    scanning bus usb@30b10000 for devices... 1 USB Device(s) found
           scanning usb for storage devices... 0 Storage Device(s) found
    
    Change-Id: I2c458dfa9e590ba054f63bb1e7ce1fad525eb56c
    Fixes: 501547cec1("usb: ehci-mx6: Fix bus enumeration for DM case")
    Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 1198a104d37b10064cd90f36d472787d549eda02)

diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c
index bfa9e7c7ad..563d29a537 100644
--- a/drivers/usb/host/ehci-mx6.c
+++ b/drivers/usb/host/ehci-mx6.c
@@ -514,10 +514,11 @@ static int ehci_usb_bind(struct udevice *dev)
 	 * from which it derives offsets in the PHY and ANATOP register sets.
 	 *
 	 * Here we attempt to calculate these indexes from DT information as
-	 * well as we can. The USB controllers on all existing iMX6/iMX7 SoCs
-	 * are placed next to each other, at addresses incremented by 0x200.
-	 * Thus, the index is derived from the multiple of 0x200 offset from
-	 * the first controller address.
+	 * well as we can. The USB controllers on all existing iMX6 SoCs
+	 * are placed next to each other, at addresses incremented by 0x200,
+	 * and iMX7 their addresses are shifted by 0x10000.
+	 * Thus, the index is derived from the multiple of 0x200 (0x10000 for
+	 * iMX7) offset from the first controller address.
 	 *
 	 * However, to complete conversion of this driver to DT probing, the
 	 * following has to be done:
@@ -532,10 +533,10 @@ static int ehci_usb_bind(struct udevice *dev)
 	 * With these changes in place, the ad-hoc indexing goes away and
 	 * the driver is fully converted to DT probing.
 	 */
-	fdt_size_t size;
-	fdt_addr_t addr = devfdt_get_addr_size_index(dev, 0, &size);
+	u32 controller_spacing = is_mx7() ? 0x10000 : 0x200;
+	fdt_addr_t addr = devfdt_get_addr_index(dev, 0);
 
-	dev->req_seq = (addr - USB_BASE_ADDR) / size;
+	dev->req_seq = (addr - USB_BASE_ADDR) / controller_spacing;
 
 	return 0;
 }

commit eedade57148226a3580fcb61f6959ed36ce14436
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Wed Sep 11 11:33:52 2019 +0200

    UPSTREAM: usb: dwc3: Add dwc3_of_parse() to get quirks information from DT
    
    Add a new function that read quirk and configuration information from the
    DT. The goal is to allow platforms using their own version of DWC3 driver
    to migrate to the generic DWC3 driver.
    The function is adapted from the function dwc3_get_properties() in the
    linux dwc3 driver introduced in commit c5ac6116db35d.
    
    Change-Id: I0716519c36b390cee532d3556e136012a277d036
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit ba6c5f7a28c8f8ac9eae194c2d37afa0ef51cb3d)

diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 5a55d7d6a5..ad29046b06 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -910,6 +910,71 @@ int dwc3_shutdown_phy(struct udevice *dev, struct phy *usb_phys, int num_phys)
 #endif
 
 #if CONFIG_IS_ENABLED(DM_USB)
+void dwc3_of_parse(struct dwc3 *dwc)
+{
+	const u8 *tmp;
+	struct udevice *dev = dwc->dev;
+	u8 lpm_nyet_threshold;
+	u8 tx_de_emphasis;
+	u8 hird_threshold;
+
+	/* default to highest possible threshold */
+	lpm_nyet_threshold = 0xff;
+
+	/* default to -3.5dB de-emphasis */
+	tx_de_emphasis = 1;
+
+	/*
+	 * default to assert utmi_sleep_n and use maximum allowed HIRD
+	 * threshold value of 0b1100
+	 */
+	hird_threshold = 12;
+
+	dwc->has_lpm_erratum = dev_read_bool(dev,
+				"snps,has-lpm-erratum");
+	tmp = dev_read_u8_array_ptr(dev, "snps,lpm-nyet-threshold", 1);
+	if (tmp)
+		lpm_nyet_threshold = *tmp;
+
+	dwc->is_utmi_l1_suspend = dev_read_bool(dev,
+				"snps,is-utmi-l1-suspend");
+	tmp = dev_read_u8_array_ptr(dev, "snps,hird-threshold", 1);
+	if (tmp)
+		hird_threshold = *tmp;
+
+	dwc->disable_scramble_quirk = dev_read_bool(dev,
+				"snps,disable_scramble_quirk");
+	dwc->u2exit_lfps_quirk = dev_read_bool(dev,
+				"snps,u2exit_lfps_quirk");
+	dwc->u2ss_inp3_quirk = dev_read_bool(dev,
+				"snps,u2ss_inp3_quirk");
+	dwc->req_p1p2p3_quirk = dev_read_bool(dev,
+				"snps,req_p1p2p3_quirk");
+	dwc->del_p1p2p3_quirk = dev_read_bool(dev,
+				"snps,del_p1p2p3_quirk");
+	dwc->del_phy_power_chg_quirk = dev_read_bool(dev,
+				"snps,del_phy_power_chg_quirk");
+	dwc->lfps_filter_quirk = dev_read_bool(dev,
+				"snps,lfps_filter_quirk");
+	dwc->rx_detect_poll_quirk = dev_read_bool(dev,
+				"snps,rx_detect_poll_quirk");
+	dwc->dis_u3_susphy_quirk = dev_read_bool(dev,
+				"snps,dis_u3_susphy_quirk");
+	dwc->dis_u2_susphy_quirk = dev_read_bool(dev,
+				"snps,dis_u2_susphy_quirk");
+	dwc->tx_de_emphasis_quirk = dev_read_bool(dev,
+				"snps,tx_de_emphasis_quirk");
+	tmp = dev_read_u8_array_ptr(dev, "snps,tx_de_emphasis", 1);
+	if (tmp)
+		tx_de_emphasis = *tmp;
+
+	dwc->lpm_nyet_threshold = lpm_nyet_threshold;
+	dwc->tx_de_emphasis = tx_de_emphasis;
+
+	dwc->hird_threshold = hird_threshold
+		| (dwc->is_utmi_l1_suspend << 4);
+}
+
 int dwc3_init(struct dwc3 *dwc)
 {
 	int ret;
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 08f048ba5e..23655191ab 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -1004,6 +1004,7 @@ struct dwc3_gadget_ep_cmd_params {
 
 /* prototypes */
 int dwc3_gadget_resize_tx_fifos(struct dwc3 *dwc);
+void dwc3_of_parse(struct dwc3 *dwc);
 int dwc3_init(struct dwc3 *dwc);
 void dwc3_remove(struct dwc3 *dwc);
 
diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c
index 7aae6331c5..c42b9411bc 100644
--- a/drivers/usb/dwc3/dwc3-generic.c
+++ b/drivers/usb/dwc3/dwc3-generic.c
@@ -48,8 +48,12 @@ static int dwc3_generic_probe(struct udevice *dev,
 	struct dwc3_generic_plat *plat = dev_get_platdata(dev);
 	struct dwc3 *dwc3 = &priv->dwc3;
 
+	dwc3->dev = dev;
 	dwc3->maximum_speed = plat->maximum_speed;
 	dwc3->dr_mode = plat->dr_mode;
+#if CONFIG_IS_ENABLED(OF_CONTROL)
+	dwc3_of_parse(dwc3);
+#endif
 
 	rc = dwc3_setup_phy(dev, &priv->phys, &priv->num_phys);
 	if (rc)
@@ -57,7 +61,7 @@ static int dwc3_generic_probe(struct udevice *dev,
 
 	priv->base = map_physmem(plat->base, DWC3_OTG_REGS_END, MAP_NOCACHE);
 	dwc3->regs = priv->base + DWC3_GLOBALS_REGS_START;
-	dwc3->dev = dev;
+
 
 	rc =  dwc3_init(dwc3);
 	if (rc) {

commit 28b6cda65ff03b6590027d7867bd9a863621dc4e
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Wed Sep 11 11:33:51 2019 +0200

    UPSTREAM: usb: dwc3-generic: if no max speed is specified in DT, assume super speed
    
    There is no need to fail if the maximum speed is not specified.
    If the speed is not specified, do the same as linux and assume super speed.
    
    Change-Id: I6fd5df9a3536a939b96915f6e260904da947e466
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 1a63e5e5fbfff7779ce24b404bef3b8ccddf1a8b)

diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c
index 54beca20e6..7aae6331c5 100644
--- a/drivers/usb/dwc3/dwc3-generic.c
+++ b/drivers/usb/dwc3/dwc3-generic.c
@@ -89,8 +89,8 @@ static int dwc3_generic_ofdata_to_platdata(struct udevice *dev)
 
 	plat->maximum_speed = usb_get_maximum_speed(node);
 	if (plat->maximum_speed == USB_SPEED_UNKNOWN) {
-		pr_err("Invalid usb maximum speed\n");
-		return -ENODEV;
+		pr_info("No USB maximum speed specified. Using super speed\n");
+		plat->maximum_speed = USB_SPEED_SUPER;
 	}
 
 	plat->dr_mode = usb_get_dr_mode(node);

commit f7133ecd39a62988e56fc3de5062f5da71a9b574
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Wed Sep 11 11:33:50 2019 +0200

    UPSTREAM: usb: dwc3-generic: add a new host driver that uses the dwc3 core
    
    Currently the host driver used by dwc3-generic is "xhci-dwc3". This is
    a functional driver but it doesn't use the dwc3 core and, in particular,
    it lacks some bits that may be important.
    For example on the k2 platforms, it is important that the phy are properly
    suspended when the USB is not used anymore. The dwc3 core also has a
    partial support for quirks.
    The new driver can be used as a drop-in replacement for "xhci-dwc3".
    
    In terms of implementation, it may seem strange that 2 private structures
    dwc3_generic_host_priv and dwc3_generic_priv) are used. The reason for this
    is simply that the xhci layer expects a struct xhci_ctrl at the beginning
    of the private data and it seemed wasteful to include it also for the
    peripheral case.
    
    Change-Id: I68b9e506836292d5de24feb55c5619d907c173ef
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit b575e909168ca559609f6793720c4811b1dd55fd)

diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 1768009494..5a55d7d6a5 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -909,7 +909,7 @@ int dwc3_shutdown_phy(struct udevice *dev, struct phy *usb_phys, int num_phys)
 }
 #endif
 
-#if CONFIG_IS_ENABLED(DM_USB_GADGET)
+#if CONFIG_IS_ENABLED(DM_USB)
 int dwc3_init(struct dwc3 *dwc)
 {
 	int ret;
diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c
index ce6d07b2aa..54beca20e6 100644
--- a/drivers/usb/dwc3/dwc3-generic.c
+++ b/drivers/usb/dwc3/dwc3-generic.c
@@ -21,6 +21,7 @@
 #include "gadget.h"
 #include <reset.h>
 #include <clk.h>
+#include <usb/xhci.h>
 
 struct dwc3_generic_plat {
 	fdt_addr_t base;
@@ -35,6 +36,11 @@ struct dwc3_generic_priv {
 	int num_phys;
 };
 
+struct dwc3_generic_host_priv {
+	struct xhci_ctrl xhci_ctrl;
+	struct dwc3_generic_priv gen_priv;
+};
+
 static int dwc3_generic_probe(struct udevice *dev,
 			      struct dwc3_generic_priv *priv)
 {
@@ -132,6 +138,50 @@ U_BOOT_DRIVER(dwc3_generic_peripheral) = {
 };
 #endif
 
+#if defined(CONFIG_SPL_USB_HOST_SUPPORT) || !defined(CONFIG_SPL_BUILD)
+static int dwc3_generic_host_probe(struct udevice *dev)
+{
+	struct xhci_hcor *hcor;
+	struct xhci_hccr *hccr;
+	struct dwc3_generic_host_priv *priv = dev_get_priv(dev);
+	int rc;
+
+	rc = dwc3_generic_probe(dev, &priv->gen_priv);
+	if (rc)
+		return rc;
+
+	hccr = (struct xhci_hccr *)priv->gen_priv.base;
+	hcor = (struct xhci_hcor *)(priv->gen_priv.base +
+			HC_LENGTH(xhci_readl(&(hccr)->cr_capbase)));
+
+	return xhci_register(dev, hccr, hcor);
+}
+
+static int dwc3_generic_host_remove(struct udevice *dev)
+{
+	struct dwc3_generic_host_priv *priv = dev_get_priv(dev);
+	int rc;
+
+	rc = xhci_deregister(dev);
+	if (rc)
+		return rc;
+
+	return dwc3_generic_remove(dev, &priv->gen_priv);
+}
+
+U_BOOT_DRIVER(dwc3_generic_host) = {
+	.name	= "dwc3-generic-host",
+	.id	= UCLASS_USB,
+	.ofdata_to_platdata = dwc3_generic_ofdata_to_platdata,
+	.probe = dwc3_generic_host_probe,
+	.remove = dwc3_generic_host_remove,
+	.priv_auto_alloc_size = sizeof(struct dwc3_generic_host_priv),
+	.platdata_auto_alloc_size = sizeof(struct dwc3_generic_plat),
+	.ops = &xhci_usb_ops,
+	.flags = DM_FLAG_ALLOC_PRIV_DMA,
+};
+#endif
+
 struct dwc3_glue_data {
 	struct clk_bulk		clks;
 	struct reset_ctl_bulk	resets;
@@ -252,10 +302,12 @@ static int dwc3_glue_bind(struct udevice *parent)
 			driver = "dwc3-generic-peripheral";
 #endif
 			break;
+#if defined(CONFIG_SPL_USB_HOST_SUPPORT) || !defined(CONFIG_SPL_BUILD)
 		case USB_DR_MODE_HOST:
 			debug("%s: dr_mode: HOST\n", __func__);
-			driver = "xhci-dwc3";
+			driver = "dwc3-generic-host";
 			break;
+#endif
 		default:
 			debug("%s: unsupported dr_mode\n", __func__);
 			return -ENODEV;

commit 0d25c40a9179f8d8e40a58b4fa787ae55aa1accf
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Wed Sep 11 11:33:49 2019 +0200

    UPSTREAM: usb: dwc3-generic: factorize code
    
    Factor code for re-usability.
    This is another step toward adding host support.
    
    Change-Id: I7c59c13bd9df4839e77555a45720fe318acde94c
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 1af590df164f88fffb6484842eec8c8d8e500e70)

diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c
index 48010b9d58..ce6d07b2aa 100644
--- a/drivers/usb/dwc3/dwc3-generic.c
+++ b/drivers/usb/dwc3/dwc3-generic.c
@@ -28,27 +28,17 @@ struct dwc3_generic_plat {
 	enum usb_dr_mode dr_mode;
 };
 
-#if CONFIG_IS_ENABLED(DM_USB_GADGET)
 struct dwc3_generic_priv {
+	void *base;
 	struct dwc3 dwc3;
 	struct phy *phys;
 	int num_phys;
 };
 
-int dm_usb_gadget_handle_interrupts(struct udevice *dev)
-{
-	struct dwc3_generic_priv *priv = dev_get_priv(dev);
-	struct dwc3 *dwc3 = &priv->dwc3;
-
-	dwc3_gadget_uboot_handle_interrupt(dwc3);
-
-	return 0;
-}
-
-static int dwc3_generic_peripheral_probe(struct udevice *dev)
+static int dwc3_generic_probe(struct udevice *dev,
+			      struct dwc3_generic_priv *priv)
 {
 	int rc;
-	struct dwc3_generic_priv *priv = dev_get_priv(dev);
 	struct dwc3_generic_plat *plat = dev_get_platdata(dev);
 	struct dwc3 *dwc3 = &priv->dwc3;
 
@@ -59,22 +49,22 @@ static int dwc3_generic_peripheral_probe(struct udevice *dev)
 	if (rc)
 		return rc;
 
-	dwc3->regs = map_physmem(plat->base, DWC3_OTG_REGS_END, MAP_NOCACHE);
-	dwc3->regs += DWC3_GLOBALS_REGS_START;
+	priv->base = map_physmem(plat->base, DWC3_OTG_REGS_END, MAP_NOCACHE);
+	dwc3->regs = priv->base + DWC3_GLOBALS_REGS_START;
 	dwc3->dev = dev;
 
 	rc =  dwc3_init(dwc3);
 	if (rc) {
-		unmap_physmem(dwc3->regs, MAP_NOCACHE);
+		unmap_physmem(priv->base, MAP_NOCACHE);
 		return rc;
 	}
 
 	return 0;
 }
 
-static int dwc3_generic_peripheral_remove(struct udevice *dev)
+static int dwc3_generic_remove(struct udevice *dev,
+			       struct dwc3_generic_priv *priv)
 {
-	struct dwc3_generic_priv *priv = dev_get_priv(dev);
 	struct dwc3 *dwc3 = &priv->dwc3;
 
 	dwc3_remove(dwc3);
@@ -84,7 +74,7 @@ static int dwc3_generic_peripheral_remove(struct udevice *dev)
 	return 0;
 }
 
-static int dwc3_generic_peripheral_ofdata_to_platdata(struct udevice *dev)
+static int dwc3_generic_ofdata_to_platdata(struct udevice *dev)
 {
 	struct dwc3_generic_plat *plat = dev_get_platdata(dev);
 	int node = dev_of_offset(dev);
@@ -106,10 +96,35 @@ static int dwc3_generic_peripheral_ofdata_to_platdata(struct udevice *dev)
 	return 0;
 }
 
+#if CONFIG_IS_ENABLED(DM_USB_GADGET)
+int dm_usb_gadget_handle_interrupts(struct udevice *dev)
+{
+	struct dwc3_generic_priv *priv = dev_get_priv(dev);
+	struct dwc3 *dwc3 = &priv->dwc3;
+
+	dwc3_gadget_uboot_handle_interrupt(dwc3);
+
+	return 0;
+}
+
+static int dwc3_generic_peripheral_probe(struct udevice *dev)
+{
+	struct dwc3_generic_priv *priv = dev_get_priv(dev);
+
+	return dwc3_generic_probe(dev, priv);
+}
+
+static int dwc3_generic_peripheral_remove(struct udevice *dev)
+{
+	struct dwc3_generic_priv *priv = dev_get_priv(dev);
+
+	return dwc3_generic_remove(dev, priv);
+}
+
 U_BOOT_DRIVER(dwc3_generic_peripheral) = {
 	.name	= "dwc3-generic-peripheral",
 	.id	= UCLASS_USB_GADGET_GENERIC,
-	.ofdata_to_platdata = dwc3_generic_peripheral_ofdata_to_platdata,
+	.ofdata_to_platdata = dwc3_generic_ofdata_to_platdata,
 	.probe = dwc3_generic_peripheral_probe,
 	.remove = dwc3_generic_peripheral_remove,
 	.priv_auto_alloc_size = sizeof(struct dwc3_generic_priv),

commit c28d0fe2244cb4871700031076668469c572ae90
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Wed Sep 11 11:33:48 2019 +0200

    UPSTREAM: usb: dwc3-generic: use platdata
    
    Separate platform data from the private data.
    This is one step toward adding host support.
    
    Change-Id: Ibd70d22283d064c77a179105c7e7f5675a598c49
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 3a38a0adb95bfebbbd39b2bb164f04bdeb10bc03)

diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c
index 848eefa318..48010b9d58 100644
--- a/drivers/usb/dwc3/dwc3-generic.c
+++ b/drivers/usb/dwc3/dwc3-generic.c
@@ -22,17 +22,22 @@
 #include <reset.h>
 #include <clk.h>
 
+struct dwc3_generic_plat {
+	fdt_addr_t base;
+	u32 maximum_speed;
+	enum usb_dr_mode dr_mode;
+};
+
 #if CONFIG_IS_ENABLED(DM_USB_GADGET)
-struct dwc3_generic_peripheral {
+struct dwc3_generic_priv {
 	struct dwc3 dwc3;
 	struct phy *phys;
 	int num_phys;
-	fdt_addr_t base;
 };
 
 int dm_usb_gadget_handle_interrupts(struct udevice *dev)
 {
-	struct dwc3_generic_peripheral *priv = dev_get_priv(dev);
+	struct dwc3_generic_priv *priv = dev_get_priv(dev);
 	struct dwc3 *dwc3 = &priv->dwc3;
 
 	dwc3_gadget_uboot_handle_interrupt(dwc3);
@@ -43,14 +48,18 @@ int dm_usb_gadget_handle_interrupts(struct udevice *dev)
 static int dwc3_generic_peripheral_probe(struct udevice *dev)
 {
 	int rc;
-	struct dwc3_generic_peripheral *priv = dev_get_priv(dev);
+	struct dwc3_generic_priv *priv = dev_get_priv(dev);
+	struct dwc3_generic_plat *plat = dev_get_platdata(dev);
 	struct dwc3 *dwc3 = &priv->dwc3;
 
+	dwc3->maximum_speed = plat->maximum_speed;
+	dwc3->dr_mode = plat->dr_mode;
+
 	rc = dwc3_setup_phy(dev, &priv->phys, &priv->num_phys);
 	if (rc)
 		return rc;
 
-	dwc3->regs = map_physmem(priv->base, DWC3_OTG_REGS_END, MAP_NOCACHE);
+	dwc3->regs = map_physmem(plat->base, DWC3_OTG_REGS_END, MAP_NOCACHE);
 	dwc3->regs += DWC3_GLOBALS_REGS_START;
 	dwc3->dev = dev;
 
@@ -65,7 +74,7 @@ static int dwc3_generic_peripheral_probe(struct udevice *dev)
 
 static int dwc3_generic_peripheral_remove(struct udevice *dev)
 {
-	struct dwc3_generic_peripheral *priv = dev_get_priv(dev);
+	struct dwc3_generic_priv *priv = dev_get_priv(dev);
 	struct dwc3 *dwc3 = &priv->dwc3;
 
 	dwc3_remove(dwc3);
@@ -77,20 +86,19 @@ static int dwc3_generic_peripheral_remove(struct udevice *dev)
 
 static int dwc3_generic_peripheral_ofdata_to_platdata(struct udevice *dev)
 {
-	struct dwc3_generic_peripheral *priv = dev_get_priv(dev);
-	struct dwc3 *dwc3 = &priv->dwc3;
+	struct dwc3_generic_plat *plat = dev_get_platdata(dev);
 	int node = dev_of_offset(dev);
 
-	priv->base = devfdt_get_addr(dev);
+	plat->base = devfdt_get_addr(dev);
 
-	dwc3->maximum_speed = usb_get_maximum_speed(node);
-	if (dwc3->maximum_speed == USB_SPEED_UNKNOWN) {
+	plat->maximum_speed = usb_get_maximum_speed(node);
+	if (plat->maximum_speed == USB_SPEED_UNKNOWN) {
 		pr_err("Invalid usb maximum speed\n");
 		return -ENODEV;
 	}
 
-	dwc3->dr_mode = usb_get_dr_mode(node);
-	if (dwc3->dr_mode == USB_DR_MODE_UNKNOWN) {
+	plat->dr_mode = usb_get_dr_mode(node);
+	if (plat->dr_mode == USB_DR_MODE_UNKNOWN) {
 		pr_err("Invalid usb mode setup\n");
 		return -ENODEV;
 	}
@@ -104,7 +112,8 @@ U_BOOT_DRIVER(dwc3_generic_peripheral) = {
 	.ofdata_to_platdata = dwc3_generic_peripheral_ofdata_to_platdata,
 	.probe = dwc3_generic_peripheral_probe,
 	.remove = dwc3_generic_peripheral_remove,
-	.priv_auto_alloc_size = sizeof(struct dwc3_generic_peripheral),
+	.priv_auto_alloc_size = sizeof(struct dwc3_generic_priv),
+	.platdata_auto_alloc_size = sizeof(struct dwc3_generic_plat),
 };
 #endif
 

commit b687c2bc01d70c7e7521a0b2dca3d63c878204b8
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Wed Sep 11 11:33:47 2019 +0200

    UPSTREAM: usb: dwc3: always use the inlined version of dwc3_host_init/dwc3_host_exit
    
    No one is actually implementing those functions.
    We could remove calls to these altogether, but it does not really hurt to
    keep the empty inlined version at the moment and it satisfies a symmetry
    with the gadget mode.
    
    Change-Id: Icad0b0babdda6150088d722984b03d9cdf5c368b
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 33a99b43651b58fbb10f3778a16dd4c0a4db9708)

diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index a8f46b020f..08f048ba5e 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -1007,15 +1007,10 @@ int dwc3_gadget_resize_tx_fifos(struct dwc3 *dwc);
 int dwc3_init(struct dwc3 *dwc);
 void dwc3_remove(struct dwc3 *dwc);
 
-#ifdef CONFIG_USB_DWC3_HOST
-int dwc3_host_init(struct dwc3 *dwc);
-void dwc3_host_exit(struct dwc3 *dwc);
-#else
 static inline int dwc3_host_init(struct dwc3 *dwc)
 { return 0; }
 static inline void dwc3_host_exit(struct dwc3 *dwc)
 { }
-#endif
 
 #ifdef CONFIG_USB_DWC3_GADGET
 int dwc3_gadget_init(struct dwc3 *dwc);

commit 143fc13bc1f142742cde03e7e93778155983d0bd
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Wed Sep 11 11:33:46 2019 +0200

    UPSTREAM: usb: xhci: move xhci.h to include usb
    
    The xhci.h header file is currently located under drivers/usb/xhci
    Move it to the include/usb folder to make it available to drivers that
    are not under drivers/usb/xhci
    
    Change-Id: I13705562893b30327708fbc321547bac79615785
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 1708a12377b98397606677e117f93f07d7cd2f7e)

diff --git a/MAINTAINERS b/MAINTAINERS
index a33e2bef60..35f8047c2f 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -544,6 +544,7 @@ M:	Bin Meng <bmeng.cn@gmail.com>
 S:	Maintained
 T:	git git://git.denx.de/u-boot-usb.git topic-xhci
 F:	drivers/usb/host/xhci*
+F:	include/usb/xhci.h
 
 VIDEO
 M:	Anatolij Gustschin <agust@denx.de>
diff --git a/drivers/usb/host/xhci-dwc3.c b/drivers/usb/host/xhci-dwc3.c
index 9efe4214af..3085f99ebc 100644
--- a/drivers/usb/host/xhci-dwc3.c
+++ b/drivers/usb/host/xhci-dwc3.c
@@ -15,7 +15,7 @@
 #include <usb.h>
 #include <dwc3-uboot.h>
 
-#include "xhci.h"
+#include <usb/xhci.h>
 #include <asm/io.h>
 #include <linux/usb/dwc3.h>
 #include <linux/usb/otg.h>
diff --git a/drivers/usb/host/xhci-exynos5.c b/drivers/usb/host/xhci-exynos5.c
index 6f08d5d5a2..26d88eb1b9 100644
--- a/drivers/usb/host/xhci-exynos5.c
+++ b/drivers/usb/host/xhci-exynos5.c
@@ -28,7 +28,7 @@
 #include <linux/compat.h>
 #include <linux/usb/dwc3.h>
 
-#include "xhci.h"
+#include <usb/xhci.h>
 
 /* Declare global data pointer */
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/drivers/usb/host/xhci-fsl.c b/drivers/usb/host/xhci-fsl.c
index afbc6840a0..3ee83f45d2 100644
--- a/drivers/usb/host/xhci-fsl.c
+++ b/drivers/usb/host/xhci-fsl.c
@@ -14,7 +14,7 @@
 #include <linux/compat.h>
 #include <linux/usb/xhci-fsl.h>
 #include <linux/usb/dwc3.h>
-#include "xhci.h"
+#include <usb/xhci.h>
 #include <fsl_errata.h>
 #include <fsl_usb.h>
 #include <dm.h>
diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
index a1f28fff3e..28fa0f7faf 100644
--- a/drivers/usb/host/xhci-mem.c
+++ b/drivers/usb/host/xhci-mem.c
@@ -22,7 +22,7 @@
 #include <asm/cache.h>
 #include <linux/errno.h>
 
-#include "xhci.h"
+#include <usb/xhci.h>
 
 #define CACHELINE_SIZE		CONFIG_SYS_CACHELINE_SIZE
 /**
diff --git a/drivers/usb/host/xhci-mvebu.c b/drivers/usb/host/xhci-mvebu.c
index dbdfce38da..73a1268080 100644
--- a/drivers/usb/host/xhci-mvebu.c
+++ b/drivers/usb/host/xhci-mvebu.c
@@ -13,7 +13,7 @@
 #include <power/regulator.h>
 #include <asm/gpio.h>
 
-#include "xhci.h"
+#include <usb/xhci.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/usb/host/xhci-omap.c b/drivers/usb/host/xhci-omap.c
index b814500bdb..d70ae0c221 100644
--- a/drivers/usb/host/xhci-omap.c
+++ b/drivers/usb/host/xhci-omap.c
@@ -20,7 +20,7 @@
 #include <linux/usb/dwc3.h>
 #include <linux/usb/xhci-omap.h>
 
-#include "xhci.h"
+#include <usb/xhci.h>
 
 /* Declare global data pointer */
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c
index 41526515d6..88a67a7f81 100644
--- a/drivers/usb/host/xhci-pci.c
+++ b/drivers/usb/host/xhci-pci.c
@@ -10,7 +10,7 @@
 #include <dm.h>
 #include <pci.h>
 #include <usb.h>
-#include "xhci.h"
+#include <usb/xhci.h>
 
 static void xhci_pci_init(struct udevice *dev, struct xhci_hccr **ret_hccr,
 			  struct xhci_hcor **ret_hcor)
diff --git a/drivers/usb/host/xhci-rcar.c b/drivers/usb/host/xhci-rcar.c
index c4a6f2a91e..c20466d069 100644
--- a/drivers/usb/host/xhci-rcar.c
+++ b/drivers/usb/host/xhci-rcar.c
@@ -13,7 +13,7 @@
 #include <usb.h>
 #include <wait_bit.h>
 
-#include "xhci.h"
+#include <usb/xhci.h>
 #include "xhci-rcar-r8a779x_usb3_v3.h"
 
 /* Register Offset */
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
index 7599c9183a..1dfa31d7c4 100644
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -20,7 +20,7 @@
 #include <asm/unaligned.h>
 #include <linux/errno.h>
 
-#include "xhci.h"
+#include <usb/xhci.h>
 
 /**
  * Is this TRB a link TRB or was the last TRB the last TRB in this event ring
diff --git a/drivers/usb/host/xhci-rockchip.c b/drivers/usb/host/xhci-rockchip.c
index 002bd5819b..75d3f4b5f4 100644
--- a/drivers/usb/host/xhci-rockchip.c
+++ b/drivers/usb/host/xhci-rockchip.c
@@ -14,7 +14,7 @@
 #include <linux/usb/dwc3.h>
 #include <power/regulator.h>
 
-#include "xhci.h"
+#include <usb/xhci.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index cddaefb83d..6e7e576005 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -29,7 +29,7 @@
 #include <asm/cache.h>
 #include <asm/unaligned.h>
 #include <linux/errno.h>
-#include "xhci.h"
+#include <usb/xhci.h>
 
 #ifndef CONFIG_USB_MAX_CONTROLLER_COUNT
 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
diff --git a/drivers/usb/phy/omap_usb_phy.c b/drivers/usb/phy/omap_usb_phy.c
index 7c7fba21f4..0461f21575 100644
--- a/drivers/usb/phy/omap_usb_phy.c
+++ b/drivers/usb/phy/omap_usb_phy.c
@@ -20,7 +20,7 @@
 #include <linux/usb/dwc3.h>
 #include <linux/usb/xhci-omap.h>
 
-#include "../host/xhci.h"
+#include <usb/xhci.h>
 
 #ifdef CONFIG_OMAP_USB3PHY1_HOST
 struct usb3_dpll_params {
diff --git a/drivers/usb/host/xhci.h b/include/usb/xhci.h
similarity index 100%
rename from drivers/usb/host/xhci.h
rename to include/usb/xhci.h

commit 2f6edaae3c630bd4756fc68faad20fd5212e5f50
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Wed Sep 11 11:33:45 2019 +0200

    UPSTREAM: usb: dwc3: switch to peripheral mode when exiting
    
    This allow the phy to enter idle and then suspend.
    the K2 platforms require the PHY to be suspended before the USB domain
    clock can be turned off.
    
    Change-Id: Id674a95ff3cacb9e614cdc583f4a755e8301b7d7
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit bbe3d4a6c14e17d251029e4dde07f184244e9a4a)

diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index d31ab8eaad..1768009494 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -590,6 +590,12 @@ static int dwc3_core_init_mode(struct dwc3 *dwc)
 	return 0;
 }
 
+static void dwc3_gadget_run(struct dwc3 *dwc)
+{
+	dwc3_writel(dwc->regs, DWC3_DCTL, DWC3_DCTL_RUN_STOP);
+	mdelay(100);
+}
+
 static void dwc3_core_exit_mode(struct dwc3 *dwc)
 {
 	switch (dwc->dr_mode) {
@@ -607,6 +613,13 @@ static void dwc3_core_exit_mode(struct dwc3 *dwc)
 		/* do nothing */
 		break;
 	}
+
+	/*
+	 * switch back to peripheral mode
+	 * This enables the phy to enter idle and then, if enabled, suspend.
+	 */
+	dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_DEVICE);
+	dwc3_gadget_run(dwc);
 }
 
 #define DWC3_ALIGN_MASK		(16 - 1)

commit 5d262e9885a83d84d82e6ec9e383cd2a8c893d95
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Wed Sep 11 11:33:44 2019 +0200

    UPSTREAM: usb: host: remove the xhci-zynqmp driver
    
    This driver is not used anymore.
    
    Conflicts:
            configs/avnet_ultra96_rev1_defconfig
            configs/xilinx_zynqmp_zcu100_revC_defconfig
            configs/xilinx_zynqmp_zcu102_rev1_0_defconfig
            configs/xilinx_zynqmp_zcu104_revA_defconfig
            configs/xilinx_zynqmp_zcu104_revC_defconfig
            configs/xilinx_zynqmp_zcu106_revA_defconfig
            configs/xilinx_zynqmp_zcu111_revA_defconfig
            drivers/usb/host/Kconfig
            drivers/usb/host/xhci-zynqmp.c
    
    Change-Id: I1faf3a98a74132ca2b2ba8b35931dee2c5bd5822
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit a8973731a452323e8767e8f9775c7d06921ebed5)

diff --git a/configs/avnet_ultra96_rev1_defconfig b/configs/avnet_ultra96_rev1_defconfig
new file mode 100644
index 0000000000..859c1f8ce8
--- /dev/null
+++ b/configs/avnet_ultra96_rev1_defconfig
@@ -0,0 +1,91 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ZYNQMP=y
+CONFIG_SYS_TEXT_BASE=0x8000000
+CONFIG_SYS_MALLOC_F_LEN=0x8000
+CONFIG_SPL=y
+CONFIG_DEBUG_UART_BASE=0xff010000
+CONFIG_DEBUG_UART_CLOCK=100000000
+CONFIG_ZYNQ_SDHCI_MAX_FREQ=15000000
+CONFIG_ZYNQMP_USB=y
+CONFIG_DEBUG_UART=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SPL_OS_BOOT=y
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
+CONFIG_SPL_ATF=y
+CONFIG_CMD_BOOTMENU=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_BIND=y
+CONFIG_CMD_CLK=y
+CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_FPGA_LOADBP=y
+CONFIG_CMD_FPGA_LOADP=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_POWEROFF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_TIMER=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="avnet-ultra96-rev1"
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_DM=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_CLK_ZYNQMP=y
+CONFIG_DFU_RAM=y
+CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQMPPL=y
+CONFIG_DM_GPIO=y
+CONFIG_XILINX_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_CADENCE=y
+CONFIG_I2C_MUX=y
+CONFIG_I2C_MUX_PCA954x=y
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
+CONFIG_MISC=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ZYNQ=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_WINBOND=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+# CONFIG_NETDEVICES is not set
+CONFIG_DEBUG_UART_ZYNQ=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_ZYNQ_SERIAL=y
+CONFIG_SPI=y
+CONFIG_ZYNQ_SPI=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_USB_ULPI_VIEWPORT=y
+CONFIG_USB_ULPI=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_USB_ETHER=y
+CONFIG_USB_ETH_CDC=y
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX=y
+CONFIG_WDT=y
+CONFIG_WDT_CDNS=y
+CONFIG_SPL_GZIP=y
+CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
diff --git a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig
index 92ac41a6f2..10c7c786d1 100644
--- a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig
+++ b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig
@@ -69,7 +69,6 @@ CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
-CONFIG_USB_XHCI_ZYNQMP=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_ULPI_VIEWPORT=y
diff --git a/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig b/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig
index fcfe0e998f..b452db38a4 100644
--- a/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig
+++ b/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig
@@ -68,7 +68,6 @@ CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
-CONFIG_USB_XHCI_ZYNQMP=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_ULPI_VIEWPORT=y
diff --git a/configs/xilinx_zynqmp_zc1751_xm017_dc3_defconfig b/configs/xilinx_zynqmp_zc1751_xm017_dc3_defconfig
index aaa025bd9e..b08f46def6 100644
--- a/configs/xilinx_zynqmp_zc1751_xm017_dc3_defconfig
+++ b/configs/xilinx_zynqmp_zc1751_xm017_dc3_defconfig
@@ -74,7 +74,6 @@ CONFIG_ZYNQ_SERIAL=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
-CONFIG_USB_XHCI_ZYNQMP=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_DWC3_GENERIC=y
diff --git a/configs/xilinx_zynqmp_zcu100_revC_defconfig b/configs/xilinx_zynqmp_zcu100_revC_defconfig
new file mode 100644
index 0000000000..f1b63e6df9
--- /dev/null
+++ b/configs/xilinx_zynqmp_zcu100_revC_defconfig
@@ -0,0 +1,88 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ZYNQMP=y
+CONFIG_SYS_TEXT_BASE=0x8000000
+CONFIG_SYS_MALLOC_F_LEN=0x8000
+CONFIG_SPL=y
+CONFIG_DEBUG_UART_BASE=0xff010000
+CONFIG_DEBUG_UART_CLOCK=100000000
+CONFIG_ZYNQ_SDHCI_MAX_FREQ=15000000
+CONFIG_ZYNQMP_USB=y
+CONFIG_DEBUG_UART=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SPL_OS_BOOT=y
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
+CONFIG_SPL_ATF=y
+CONFIG_CMD_BOOTMENU=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_BIND=y
+CONFIG_CMD_CLK=y
+CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_FPGA_LOADBP=y
+CONFIG_CMD_FPGA_LOADP=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_POWEROFF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_TIMER=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu100-revC"
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_DM=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_CLK_ZYNQMP=y
+CONFIG_DFU_RAM=y
+CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQMPPL=y
+CONFIG_DM_GPIO=y
+CONFIG_XILINX_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_CADENCE=y
+CONFIG_I2C_MUX=y
+CONFIG_I2C_MUX_PCA954x=y
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
+CONFIG_MISC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ZYNQ=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_WINBOND=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+# CONFIG_NETDEVICES is not set
+CONFIG_DEBUG_UART_ZYNQ=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_ZYNQ_SERIAL=y
+CONFIG_SPI=y
+CONFIG_ZYNQ_SPI=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_USB_ULPI_VIEWPORT=y
+CONFIG_USB_ULPI=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_USB_ETHER=y
+CONFIG_USB_ETH_CDC=y
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX=y
+CONFIG_SPL_GZIP=y
+CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
diff --git a/configs/xilinx_zynqmp_zcu102_rev1_0_defconfig b/configs/xilinx_zynqmp_zcu102_rev1_0_defconfig
new file mode 100644
index 0000000000..2791d0fce3
--- /dev/null
+++ b/configs/xilinx_zynqmp_zcu102_rev1_0_defconfig
@@ -0,0 +1,113 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ZYNQMP=y
+CONFIG_SYS_TEXT_BASE=0x8000000
+CONFIG_SYS_MALLOC_F_LEN=0x8000
+CONFIG_SPL=y
+CONFIG_DEBUG_UART_BASE=0xff000000
+CONFIG_DEBUG_UART_CLOCK=100000000
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_ZYNQMP_USB=y
+CONFIG_DEBUG_UART=y
+CONFIG_AHCI=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_SPL_OS_BOOT=y
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
+CONFIG_SPL_ATF=y
+CONFIG_CMD_THOR_DOWNLOAD=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_CMD_CLK=y
+CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_FPGA_LOADBP=y
+CONFIG_CMD_FPGA_LOADP=y
+CONFIG_CMD_FPGA_LOAD_SECURE=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SDRAM=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_TIMER=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu102-rev1.0"
+CONFIG_ENV_IS_IN_FAT=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_DM=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_SCSI_AHCI=y
+CONFIG_SATA_CEVA=y
+CONFIG_CLK_ZYNQMP=y
+CONFIG_DFU_RAM=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQMPPL=y
+CONFIG_DM_GPIO=y
+CONFIG_GPIO_HOG=y
+CONFIG_XILINX_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_CADENCE=y
+CONFIG_I2C_MUX=y
+CONFIG_I2C_MUX_PCA954x=y
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
+CONFIG_MISC=y
+CONFIG_I2C_EEPROM=y
+CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20
+CONFIG_SYS_I2C_EEPROM_ADDR=0x0
+CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ZYNQ=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_WINBOND=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_TI=y
+CONFIG_PHY_VITESSE=y
+CONFIG_PHY_FIXED=y
+CONFIG_PHY_GIGE=y
+CONFIG_MII=y
+CONFIG_ZYNQ_GEM=y
+CONFIG_SCSI=y
+CONFIG_DM_SCSI=y
+CONFIG_DEBUG_UART_ZYNQ=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_ZYNQ_SERIAL=y
+CONFIG_SPI=y
+CONFIG_ZYNQMP_GQSPI=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_USB_ULPI_VIEWPORT=y
+CONFIG_USB_ULPI=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Xilinx"
+CONFIG_USB_GADGET_VENDOR_NUM=0x03FD
+CONFIG_USB_GADGET_PRODUCT_NUM=0x0300
+CONFIG_USB_FUNCTION_THOR=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
diff --git a/configs/xilinx_zynqmp_zcu102_revA_defconfig b/configs/xilinx_zynqmp_zcu102_revA_defconfig
index 670206800e..fd204e3f98 100644
--- a/configs/xilinx_zynqmp_zcu102_revA_defconfig
+++ b/configs/xilinx_zynqmp_zcu102_revA_defconfig
@@ -72,7 +72,6 @@ CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
-CONFIG_USB_XHCI_ZYNQMP=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_ULPI_VIEWPORT=y
diff --git a/configs/xilinx_zynqmp_zcu102_revB_defconfig b/configs/xilinx_zynqmp_zcu102_revB_defconfig
index d878c18476..d1765b8821 100644
--- a/configs/xilinx_zynqmp_zcu102_revB_defconfig
+++ b/configs/xilinx_zynqmp_zcu102_revB_defconfig
@@ -72,7 +72,6 @@ CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
-CONFIG_USB_XHCI_ZYNQMP=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_ULPI_VIEWPORT=y
diff --git a/configs/xilinx_zynqmp_zcu104_revA_defconfig b/configs/xilinx_zynqmp_zcu104_revA_defconfig
new file mode 100644
index 0000000000..a134ba603e
--- /dev/null
+++ b/configs/xilinx_zynqmp_zcu104_revA_defconfig
@@ -0,0 +1,93 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ZYNQMP=y
+CONFIG_SYS_TEXT_BASE=0x8000000
+CONFIG_SYS_MALLOC_F_LEN=0x8000
+CONFIG_SPL=y
+CONFIG_DEBUG_UART_BASE=0xff000000
+CONFIG_DEBUG_UART_CLOCK=100000000
+CONFIG_ZYNQMP_USB=y
+CONFIG_DEBUG_UART=y
+CONFIG_AHCI=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SPL_OS_BOOT=y
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
+CONFIG_SPL_ATF=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_CLK=y
+CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_FPGA_LOADBP=y
+CONFIG_CMD_FPGA_LOADP=y
+CONFIG_CMD_FPGA_LOAD_SECURE=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_TIMER=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu104-revA"
+CONFIG_ENV_IS_IN_FAT=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_DM=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_SCSI_AHCI=y
+CONFIG_SATA_CEVA=y
+CONFIG_CLK_ZYNQMP=y
+CONFIG_DFU_RAM=y
+CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQMPPL=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_CADENCE=y
+CONFIG_I2C_MUX=y
+CONFIG_I2C_MUX_PCA954x=y
+CONFIG_MISC=y
+CONFIG_I2C_EEPROM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x0
+CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ZYNQ=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_WINBOND=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_TI=y
+CONFIG_PHY_VITESSE=y
+CONFIG_PHY_FIXED=y
+CONFIG_PHY_GIGE=y
+CONFIG_MII=y
+CONFIG_ZYNQ_GEM=y
+CONFIG_SCSI=y
+CONFIG_DM_SCSI=y
+CONFIG_DEBUG_UART_ZYNQ=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_ZYNQ_SERIAL=y
+CONFIG_SPI=y
+CONFIG_ZYNQMP_GQSPI=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_USB_ULPI_VIEWPORT=y
+CONFIG_USB_ULPI=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
diff --git a/configs/xilinx_zynqmp_zcu104_revC_defconfig b/configs/xilinx_zynqmp_zcu104_revC_defconfig
new file mode 100644
index 0000000000..1d2010f354
--- /dev/null
+++ b/configs/xilinx_zynqmp_zcu104_revC_defconfig
@@ -0,0 +1,97 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ZYNQMP=y
+CONFIG_SYS_TEXT_BASE=0x8000000
+CONFIG_SYS_MALLOC_F_LEN=0x8000
+CONFIG_SPL=y
+CONFIG_DEBUG_UART_BASE=0xff000000
+CONFIG_DEBUG_UART_CLOCK=100000000
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_ZYNQMP_USB=y
+CONFIG_DEBUG_UART=y
+CONFIG_AHCI=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SPL_OS_BOOT=y
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
+CONFIG_SPL_SPI_LOAD=y
+CONFIG_SPL_ATF=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_CLK=y
+CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_FPGA_LOADBP=y
+CONFIG_CMD_FPGA_LOADP=y
+CONFIG_CMD_FPGA_LOAD_SECURE=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_TIMER=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu104-revC"
+CONFIG_ENV_IS_IN_FAT=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_DM=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_SCSI_AHCI=y
+CONFIG_SATA_CEVA=y
+CONFIG_CLK_ZYNQMP=y
+CONFIG_DFU_RAM=y
+CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQMPPL=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_CADENCE=y
+CONFIG_I2C_MUX=y
+CONFIG_I2C_MUX_PCA954x=y
+CONFIG_MISC=y
+CONFIG_I2C_EEPROM=y
+CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20
+CONFIG_SYS_I2C_EEPROM_ADDR=0x0
+CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ZYNQ=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_WINBOND=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_TI=y
+CONFIG_PHY_VITESSE=y
+CONFIG_PHY_FIXED=y
+CONFIG_PHY_GIGE=y
+CONFIG_MII=y
+CONFIG_ZYNQ_GEM=y
+CONFIG_SCSI=y
+CONFIG_DM_SCSI=y
+CONFIG_DEBUG_UART_ZYNQ=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_ZYNQ_SERIAL=y
+CONFIG_SPI=y
+CONFIG_ZYNQMP_GQSPI=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_USB_ULPI_VIEWPORT=y
+CONFIG_USB_ULPI=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
diff --git a/configs/xilinx_zynqmp_zcu106_revA_defconfig b/configs/xilinx_zynqmp_zcu106_revA_defconfig
new file mode 100644
index 0000000000..4b3ea155ef
--- /dev/null
+++ b/configs/xilinx_zynqmp_zcu106_revA_defconfig
@@ -0,0 +1,106 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ZYNQMP=y
+CONFIG_SYS_TEXT_BASE=0x8000000
+CONFIG_SYS_MALLOC_F_LEN=0x8000
+CONFIG_SPL=y
+CONFIG_DEBUG_UART_BASE=0xff000000
+CONFIG_DEBUG_UART_CLOCK=100000000
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_ZYNQMP_USB=y
+CONFIG_DEBUG_UART=y
+CONFIG_AHCI=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SPL_OS_BOOT=y
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
+CONFIG_SPL_ATF=y
+CONFIG_CMD_THOR_DOWNLOAD=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_CLK=y
+CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_FPGA_LOADBP=y
+CONFIG_CMD_FPGA_LOADP=y
+CONFIG_CMD_FPGA_LOAD_SECURE=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_TIMER=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu106-revA"
+CONFIG_ENV_IS_IN_FAT=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_DM=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_SCSI_AHCI=y
+CONFIG_SATA_CEVA=y
+CONFIG_CLK_ZYNQMP=y
+CONFIG_DFU_RAM=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQMPPL=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_CADENCE=y
+CONFIG_I2C_MUX=y
+CONFIG_I2C_MUX_PCA954x=y
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
+CONFIG_MISC=y
+CONFIG_I2C_EEPROM=y
+CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20
+CONFIG_SYS_I2C_EEPROM_ADDR=0x0
+CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ZYNQ=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_WINBOND=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_TI=y
+CONFIG_PHY_VITESSE=y
+CONFIG_PHY_FIXED=y
+CONFIG_PHY_GIGE=y
+CONFIG_MII=y
+CONFIG_ZYNQ_GEM=y
+CONFIG_SCSI=y
+CONFIG_DM_SCSI=y
+CONFIG_DEBUG_UART_ZYNQ=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_ZYNQ_SERIAL=y
+CONFIG_SPI=y
+CONFIG_ZYNQMP_GQSPI=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_USB_ULPI_VIEWPORT=y
+CONFIG_USB_ULPI=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Xilinx"
+CONFIG_USB_GADGET_VENDOR_NUM=0x03FD
+CONFIG_USB_GADGET_PRODUCT_NUM=0x0300
+CONFIG_USB_FUNCTION_THOR=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
diff --git a/configs/xilinx_zynqmp_zcu111_revA_defconfig b/configs/xilinx_zynqmp_zcu111_revA_defconfig
new file mode 100644
index 0000000000..a84b53fe1d
--- /dev/null
+++ b/configs/xilinx_zynqmp_zcu111_revA_defconfig
@@ -0,0 +1,95 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ZYNQMP=y
+CONFIG_SYS_TEXT_BASE=0x8000000
+CONFIG_SYS_MALLOC_F_LEN=0x8000
+CONFIG_SPL=y
+CONFIG_DEBUG_UART_BASE=0xff000000
+CONFIG_DEBUG_UART_CLOCK=100000000
+CONFIG_ZYNQMP_USB=y
+CONFIG_DEBUG_UART=y
+CONFIG_AHCI=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SPL_OS_BOOT=y
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
+CONFIG_SPL_ATF=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_CLK=y
+CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_FPGA_LOADBP=y
+CONFIG_CMD_FPGA_LOADP=y
+CONFIG_CMD_FPGA_LOAD_SECURE=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_TIMER=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu111-revA"
+CONFIG_ENV_IS_IN_FAT=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_DM=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_SCSI_AHCI=y
+CONFIG_SATA_CEVA=y
+CONFIG_CLK_ZYNQMP=y
+CONFIG_DFU_RAM=y
+CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQMPPL=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_CADENCE=y
+CONFIG_I2C_MUX=y
+CONFIG_I2C_MUX_PCA954x=y
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
+CONFIG_MISC=y
+CONFIG_I2C_EEPROM=y
+CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20
+CONFIG_SYS_I2C_EEPROM_ADDR=0x0
+CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ZYNQ=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_WINBOND=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_TI=y
+CONFIG_PHY_VITESSE=y
+CONFIG_PHY_FIXED=y
+CONFIG_PHY_GIGE=y
+CONFIG_MII=y
+CONFIG_ZYNQ_GEM=y
+CONFIG_SCSI=y
+CONFIG_DM_SCSI=y
+CONFIG_DEBUG_UART_ZYNQ=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_ZYNQ_SERIAL=y
+CONFIG_SPI=y
+CONFIG_ZYNQMP_GQSPI=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_USB_ULPI_VIEWPORT=y
+CONFIG_USB_ULPI=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index b93a7d2db7..90ad53429b 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -63,13 +63,6 @@ config USB_XHCI_RCAR
 	  Choose this option to add support for USB 3.0 driver on Renesas
 	  RCar Gen3 SoCs.
 
-config USB_XHCI_ZYNQMP
-	bool "Support for Xilinx ZynqMP on-chip xHCI USB controller"
-	depends on ARCH_ZYNQMP
-	depends on DM_USB
-	help
-	  Enables support for the on-chip xHCI controller on Xilinx ZynqMP SoCs.
-
 config USB_XHCI_DRA7XX_INDEX
 	int "DRA7XX xHCI USB index"
 	range 0 1
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 24306f4a77..c71ef0d409 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -50,7 +50,6 @@ obj-$(CONFIG_USB_XHCI_HCD) += xhci.o xhci-mem.o xhci-ring.o
 obj-$(CONFIG_USB_XHCI_DWC3) += xhci-dwc3.o
 obj-$(CONFIG_USB_XHCI_DWC3_OF_SIMPLE) += dwc3-of-simple.o
 obj-$(CONFIG_USB_XHCI_ROCKCHIP) += xhci-rockchip.o
-obj-$(CONFIG_USB_XHCI_ZYNQMP) += xhci-zynqmp.o
 obj-$(CONFIG_USB_XHCI_EXYNOS) += xhci-exynos5.o
 obj-$(CONFIG_USB_XHCI_FSL) += xhci-fsl.o
 obj-$(CONFIG_USB_XHCI_MVEBU) += xhci-mvebu.o

commit 0dcb583e26b1f519ecb0d8bbd997a710593be7e7
Author: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Date:   Wed May 1 10:14:49 2019 +0530

    UPSTREAM: drivers: usb: dwc3: setup phy before dwc3 core soft reset
    
    Phy setup should be done before dwc3 soft core reset as it is done
    in linux & this fixes unreliable detection of usb cable on host side.
    
    Change-Id: I4e49d99544d0cd4a6c4215652b9ca328d29ce24c
    Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
    Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
    Signed-off-by: Michal Simek <michal.simek@xilinx.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 1a031d236a9eeb28ced5438242987ae6a45f3054)

diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 57fc7e02e4..d31ab8eaad 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -449,6 +449,8 @@ static int dwc3_core_init(struct dwc3 *dwc)
 		goto err0;
 	}
 
+	dwc3_phy_setup(dwc);
+
 	ret = dwc3_core_soft_reset(dwc);
 	if (ret)
 		goto err0;
@@ -523,8 +525,6 @@ static int dwc3_core_init(struct dwc3 *dwc)
 
 	dwc3_writel(dwc->regs, DWC3_GCTL, reg);
 
-	dwc3_phy_setup(dwc);
-
 	ret = dwc3_alloc_scratch_buffers(dwc);
 	if (ret)
 		goto err0;

commit 541cc5772509d94bb0a79a3873cc135f8f40378a
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Aug 28 16:23:47 2019 +0800

    UPSTREAM: usb: ohci-generic: don't probe fail if there is no clk_enable() ops
    
    Some clock driver do not have a clk_enable() call back, and we should not
    treat this as fail in ehci probe like other modules, eg. clk_enabl_bulk()
    do not return fail if ret value is '-ENOSYS'
    
    Change-Id: I6a87df188857287f860d4c7d9e66694e561da2dd
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
    (cherry picked from commit 6578db896113816e5b61d1914169fad5f06d7903)

diff --git a/drivers/usb/host/ohci-generic.c b/drivers/usb/host/ohci-generic.c
index ba16d2dce8..87c6d2d59f 100644
--- a/drivers/usb/host/ohci-generic.c
+++ b/drivers/usb/host/ohci-generic.c
@@ -97,7 +97,7 @@ static int ohci_usb_probe(struct udevice *dev)
 				break;
 
 			err = clk_enable(&priv->clocks[i]);
-			if (err) {
+			if (err && err != -ENOSYS) {
 				dev_err(dev, "failed to enable clock %d\n", i);
 				clk_free(&priv->clocks[i]);
 				goto clk_err;

commit 5311a685872792aca914d4c33430d64e8b053465
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Aug 28 16:23:46 2019 +0800

    UPSTREAM: usb: ehci-generic: don't probe fail if there is no clk_enable() ops
    
    Some clock driver do not have a clk_enable() call back, and we should not
    treat this as fail in ehci probe like other modules, eg. clk_enabl_bulk()
    do not return fail if ret value is '-ENOSYS'
    
    Change-Id: I4686a87238ff5dff7a8f1c2e4df03cce4581aa0b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
    (cherry picked from commit 54a0c7b2e7a233aa3975771592afb8e0e2f6acc0)

diff --git a/drivers/usb/host/ehci-generic.c b/drivers/usb/host/ehci-generic.c
index 18672d981c..9b7576d513 100644
--- a/drivers/usb/host/ehci-generic.c
+++ b/drivers/usb/host/ehci-generic.c
@@ -97,7 +97,7 @@ static int ehci_usb_probe(struct udevice *dev)
 			if (err < 0)
 				break;
 			err = clk_enable(&priv->clocks[i]);
-			if (err) {
+			if (err && err != -ENOSYS) {
 				dev_err(dev, "failed to enable clock %d\n", i);
 				clk_free(&priv->clocks[i]);
 				goto clk_err;

commit c203be140ce16a8d0e1637b5234d6965a1f4b102
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Wed Sep 11 09:44:10 2019 +0200

    UPSTREAM: usb: musb_hcd: fix compilation error
    
    commit 65c1f9820c8f79f "usb: Add nonblock argument to submit_int_msg"
    breaks the musb_hcd driver.
    Fixing it by adding the missing argument
    
    Change-Id: I54ead50fdf48f1936caca65e64a61486745f4723
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit e3e5825d0143c2b24583d256ef111ae9344382a2)

diff --git a/drivers/usb/musb/musb_hcd.c b/drivers/usb/musb/musb_hcd.c
index fee0848ade..82fcb76081 100644
--- a/drivers/usb/musb/musb_hcd.c
+++ b/drivers/usb/musb/musb_hcd.c
@@ -1056,8 +1056,8 @@ int usb_lowlevel_stop(int index)
  * This function supports usb interrupt transfers. Currently, usb interrupt
  * transfers are not supported.
  */
-int submit_int_msg(struct usb_device *dev, unsigned long pipe,
-				void *buffer, int len, int interval)
+int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
+		   int len, int interval, bool nonblock)
 {
 	int dir_out = usb_pipeout(pipe);
 	int ep = usb_pipeendpoint(pipe);

commit 85bca00e1b569a6fc4cca3c6e2ec38d78c08c826
Author: Michal Suchanek <msuchanek@suse.de>
Date:   Sun Aug 18 10:55:28 2019 +0200

    UPSTREAM: dwc2: use the nonblock argument in submit_int_msg
    
    An USB 1.1 keyboard connected to dwc2 through a high-speed hub does not
    report status until it changes. With this patch you can enable keyboard
    by pressing a key while USB devices are probed. Without a keypress no
    state is reported and the probe times out. We don't want to wait for a
    keypress or timeout while polling for keypresses so implement an int_msg
    nonblock variant that exits early on error.
    
    Change-Id: I6d89952ca5c00a1b076ae3fe9d9632ebdc6af843
    Signed-off-by: Michal Suchanek <msuchanek@suse.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 9dcab2c4d2cb50ab1864c818b82a72393c160236)

diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
index bc20a6154c..9a28821014 100644
--- a/drivers/usb/host/dwc2.c
+++ b/drivers/usb/host/dwc2.c
@@ -1126,7 +1126,7 @@ int _submit_int_msg(struct dwc2_priv *priv, struct usb_device *dev,
 			return -ETIMEDOUT;
 		}
 		ret = _submit_bulk_msg(priv, dev, pipe, buffer, len);
-		if (ret != -EAGAIN)
+		if ((ret != -EAGAIN) || nonblock)
 			return ret;
 	}
 }

commit 92937b1f661937286a87bf35153b9abb34413f17
Author: Michal Suchanek <msuchanek@suse.de>
Date:   Sun Aug 18 10:55:27 2019 +0200

    UPSTREAM: usb: Add nonblock argument to submit_int_msg
    
    This will be used to implement non-blocking keyboard polling in case of
    errors.
    
    Conflicts:
            common/usb.c
            common/usb_kbd.c
            common/usb_storage.c
            include/usb.h
    
    Change-Id: I4a951d779e2cf9e80380f93000a87a617453fb32
    Signed-off-by: Michal Suchanek <msuchanek@suse.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 3437121c037f502a3b0faaec97059777034a1ead)

diff --git a/common/usb.c b/common/usb.c
index dc8e312c5f..61439e39eb 100644
--- a/common/usb.c
+++ b/common/usb.c
@@ -193,12 +193,15 @@ int usb_disable_asynch(int disable)
  */
 
 /*
- * submits an Interrupt Message
+ * submits an Interrupt Message. Some drivers may implement non-blocking
+ * polling: when non-block is true and the device is not responding return
+ * -EAGAIN instead of waiting for device to respond.
  */
-int usb_submit_int_msg(struct usb_device *dev, unsigned long pipe,
-			void *buffer, int transfer_len, int interval)
+int usb_int_msg(struct usb_device *dev, unsigned long pipe,
+		void *buffer, int transfer_len, int interval, bool nonblock)
 {
-	return submit_int_msg(dev, pipe, buffer, transfer_len, interval);
+	return submit_int_msg(dev, pipe, buffer, transfer_len, interval,
+			      nonblock);
 }
 
 /*
diff --git a/common/usb_kbd.c b/common/usb_kbd.c
index 07932d1cb4..902473643e 100644
--- a/common/usb_kbd.c
+++ b/common/usb_kbd.c
@@ -317,10 +317,9 @@ static inline void usb_kbd_poll_for_event(struct usb_device *dev)
 	struct usb_kbd_pdata *data = dev->privptr;
 
 	/* Submit a interrupt transfer request */
-	usb_submit_int_msg(dev, data->intpipe, &data->new[0], data->intpktsize,
-			   data->intinterval);
-
-	usb_kbd_irq_worker(dev);
+	if (usb_int_msg(dev, data->intpipe, &data->new[0],
+			data->intpktsize, data->intinterval, true) >= 0)
+		usb_kbd_irq_worker(dev);
 #elif defined(CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP) || \
       defined(CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE)
 #if defined(CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP)
@@ -480,8 +479,8 @@ static int usb_kbd_probe_dev(struct usb_device *dev, unsigned int ifnum)
 	if (usb_get_report(dev, iface->desc.bInterfaceNumber,
 			   1, 0, data->new, USB_KBD_BOOT_REPORT_SIZE) < 0) {
 #else
-	if (usb_submit_int_msg(dev, data->intpipe, data->new, data->intpktsize,
-			       data->intinterval) < 0) {
+	if (usb_int_msg(dev, data->intpipe, data->new, data->intpktsize,
+			data->intinterval, false) < 0) {
 #endif
 		printf("Failed to get keyboard state from device %04x:%04x\n",
 		       dev->descriptor.idVendor, dev->descriptor.idProduct);
diff --git a/common/usb_storage.c b/common/usb_storage.c
index be0b2df5d9..c3784aff8f 100644
--- a/common/usb_storage.c
+++ b/common/usb_storage.c
@@ -654,8 +654,8 @@ static int usb_stor_CBI_get_status(struct scsi_cmd *srb, struct us_data *us)
 	int timeout;
 
 	us->ip_wanted = 1;
-	submit_int_msg(us->pusb_dev, us->irqpipe,
-			(void *) &us->ip_data, us->irqmaxp, us->irqinterval);
+	usb_int_msg(us->pusb_dev, us->irqpipe,
+		    (void *)&us->ip_data, us->irqmaxp, us->irqinterval, false);
 	timeout = 1000;
 	while (timeout--) {
 		if (us->ip_wanted == 0)
diff --git a/drivers/usb/emul/sandbox_keyb.c b/drivers/usb/emul/sandbox_keyb.c
index cff017668f..f7247eef8c 100644
--- a/drivers/usb/emul/sandbox_keyb.c
+++ b/drivers/usb/emul/sandbox_keyb.c
@@ -181,7 +181,8 @@ static int sandbox_keyb_control(struct udevice *dev, struct usb_device *udev,
 }
 
 static int sandbox_keyb_interrupt(struct udevice *dev, struct usb_device *udev,
-		unsigned long pipe, void *buffer, int length, int interval)
+		unsigned long pipe, void *buffer, int length, int interval,
+		bool nonblock)
 {
 	struct sandbox_keyb_priv *priv = dev_get_priv(dev);
 	uint8_t *data = buffer;
diff --git a/drivers/usb/emul/usb-emul-uclass.c b/drivers/usb/emul/usb-emul-uclass.c
index fbe11f3135..0aeddf826a 100644
--- a/drivers/usb/emul/usb-emul-uclass.c
+++ b/drivers/usb/emul/usb-emul-uclass.c
@@ -248,7 +248,8 @@ int usb_emul_bulk(struct udevice *emul, struct usb_device *udev,
 }
 
 int usb_emul_int(struct udevice *emul, struct usb_device *udev,
-		  unsigned long pipe, void *buffer, int length, int interval)
+		  unsigned long pipe, void *buffer, int length, int interval,
+		  bool nonblock)
 {
 	struct dm_usb_ops *ops = usb_get_emul_ops(emul);
 
@@ -256,7 +257,8 @@ int usb_emul_int(struct udevice *emul, struct usb_device *udev,
 		return -ENOSYS;
 	debug("%s: dev=%s\n", __func__, emul->name);
 
-	return ops->interrupt(emul, udev, pipe, buffer, length, interval);
+	return ops->interrupt(emul, udev, pipe, buffer, length, interval,
+			      nonblock);
 }
 
 int usb_emul_setup_device(struct udevice *dev, struct usb_string *strings,
diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
index 884613fe4e..bc20a6154c 100644
--- a/drivers/usb/host/dwc2.c
+++ b/drivers/usb/host/dwc2.c
@@ -1111,7 +1111,8 @@ static int _submit_control_msg(struct dwc2_priv *priv, struct usb_device *dev,
 }
 
 int _submit_int_msg(struct dwc2_priv *priv, struct usb_device *dev,
-		    unsigned long pipe, void *buffer, int len, int interval)
+		    unsigned long pipe, void *buffer, int len, int interval,
+		    bool nonblock)
 {
 	unsigned long timeout;
 	int ret;
@@ -1239,9 +1240,10 @@ int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
 }
 
 int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
-		   int len, int interval)
+		   int len, int interval, bool nonblock)
 {
-	return _submit_int_msg(&local, dev, pipe, buffer, len, interval);
+	return _submit_int_msg(&local, dev, pipe, buffer, len, interval,
+			       nonblock);
 }
 
 /* U-Boot USB control interface */
@@ -1295,13 +1297,14 @@ static int dwc2_submit_bulk_msg(struct udevice *dev, struct usb_device *udev,
 
 static int dwc2_submit_int_msg(struct udevice *dev, struct usb_device *udev,
 			       unsigned long pipe, void *buffer, int length,
-			       int interval)
+			       int interval, bool nonblock)
 {
 	struct dwc2_priv *priv = dev_get_priv(dev);
 
 	debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
 
-	return _submit_int_msg(priv, udev, pipe, buffer, length, interval);
+	return _submit_int_msg(priv, udev, pipe, buffer, length, interval,
+			       nonblock);
 }
 
 static int dwc2_usb_ofdata_to_platdata(struct udevice *dev)
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index c70a365840..742759eef5 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -1473,7 +1473,8 @@ out:
 }
 
 static int _ehci_submit_int_msg(struct usb_device *dev, unsigned long pipe,
-				void *buffer, int length, int interval)
+				void *buffer, int length, int interval,
+				bool nonblock)
 {
 	void *backbuffer;
 	struct int_queue *queue;
@@ -1523,9 +1524,10 @@ int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
 }
 
 int submit_int_msg(struct usb_device *dev, unsigned long pipe,
-		   void *buffer, int length, int interval)
+		   void *buffer, int length, int interval, bool nonblock)
 {
-	return _ehci_submit_int_msg(dev, pipe, buffer, length, interval);
+	return _ehci_submit_int_msg(dev, pipe, buffer, length, interval,
+				    nonblock);
 }
 
 struct int_queue *create_int_queue(struct usb_device *dev,
@@ -1567,10 +1569,11 @@ static int ehci_submit_bulk_msg(struct udevice *dev, struct usb_device *udev,
 
 static int ehci_submit_int_msg(struct udevice *dev, struct usb_device *udev,
 			       unsigned long pipe, void *buffer, int length,
-			       int interval)
+			       int interval, bool nonblock)
 {
 	debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
-	return _ehci_submit_int_msg(udev, pipe, buffer, length, interval);
+	return _ehci_submit_int_msg(udev, pipe, buffer, length, interval,
+				    nonblock);
 }
 
 static struct int_queue *ehci_create_int_queue(struct udevice *dev,
diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c
index ed5e3f8d12..76b9c8d4f4 100644
--- a/drivers/usb/host/ohci-hcd.c
+++ b/drivers/usb/host/ohci-hcd.c
@@ -1704,7 +1704,7 @@ int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
 }
 
 int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
-		int transfer_len, int interval)
+		int transfer_len, int interval, bool nonblock)
 {
 	info("submit_int_msg");
 	return submit_common_msg(&gohci, dev, pipe, buffer, transfer_len, NULL,
@@ -2156,7 +2156,7 @@ static int ohci_submit_bulk_msg(struct udevice *dev, struct usb_device *udev,
 
 static int ohci_submit_int_msg(struct udevice *dev, struct usb_device *udev,
 			       unsigned long pipe, void *buffer, int length,
-			       int interval)
+			       int interval, bool nonblock)
 {
 	ohci_t *ohci = dev_get_priv(usb_get_bus(dev));
 
diff --git a/drivers/usb/host/sl811-hcd.c b/drivers/usb/host/sl811-hcd.c
index b29c67e189..58a98ea793 100644
--- a/drivers/usb/host/sl811-hcd.c
+++ b/drivers/usb/host/sl811-hcd.c
@@ -385,7 +385,7 @@ int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
 }
 
 int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
-		   int len, int interval)
+		   int len, int interval, bool nonblock)
 {
 	PDEBUG(0, "dev = %p pipe = %#lx buf = %p size = %d int = %d\n", dev, pipe,
 	       buffer, len, interval);
diff --git a/drivers/usb/host/usb-sandbox.c b/drivers/usb/host/usb-sandbox.c
index 15055b351a..bc91241aa7 100644
--- a/drivers/usb/host/usb-sandbox.c
+++ b/drivers/usb/host/usb-sandbox.c
@@ -102,7 +102,7 @@ static int sandbox_submit_bulk(struct udevice *bus, struct usb_device *udev,
 
 static int sandbox_submit_int(struct udevice *bus, struct usb_device *udev,
 			      unsigned long pipe, void *buffer, int length,
-			      int interval)
+			      int interval, bool nonblock)
 {
 	struct udevice *emul;
 	int ret;
@@ -113,7 +113,8 @@ static int sandbox_submit_int(struct udevice *bus, struct usb_device *udev,
 	usbmon_trace(bus, pipe, NULL, emul);
 	if (ret)
 		return ret;
-	ret = usb_emul_int(emul, udev, pipe, buffer, length, interval);
+	ret = usb_emul_int(emul, udev, pipe, buffer, length, interval,
+			   nonblock);
 
 	return ret;
 }
diff --git a/drivers/usb/host/usb-uclass.c b/drivers/usb/host/usb-uclass.c
index b79eadefa0..733e32db2b 100644
--- a/drivers/usb/host/usb-uclass.c
+++ b/drivers/usb/host/usb-uclass.c
@@ -34,7 +34,7 @@ int usb_disable_asynch(int disable)
 }
 
 int submit_int_msg(struct usb_device *udev, unsigned long pipe, void *buffer,
-		   int length, int interval)
+		   int length, int interval, bool nonblock)
 {
 	struct udevice *bus = udev->controller_dev;
 	struct dm_usb_ops *ops = usb_get_ops(bus);
@@ -42,7 +42,8 @@ int submit_int_msg(struct usb_device *udev, unsigned long pipe, void *buffer,
 	if (!ops->interrupt)
 		return -ENOSYS;
 
-	return ops->interrupt(bus, udev, pipe, buffer, length, interval);
+	return ops->interrupt(bus, udev, pipe, buffer, length, interval,
+			      nonblock);
 }
 
 int submit_control_msg(struct usb_device *udev, unsigned long pipe,
diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index aaa1a6ce2b..cddaefb83d 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -1110,7 +1110,8 @@ unknown:
  * @return 0
  */
 static int _xhci_submit_int_msg(struct usb_device *udev, unsigned long pipe,
-				void *buffer, int length, int interval)
+				void *buffer, int length, int interval,
+				bool nonblock)
 {
 	if (usb_pipetype(pipe) != PIPE_INTERRUPT) {
 		printf("non-interrupt pipe (type=%lu)", usb_pipetype(pipe));
@@ -1278,9 +1279,10 @@ int submit_bulk_msg(struct usb_device *udev, unsigned long pipe, void *buffer,
 }
 
 int submit_int_msg(struct usb_device *udev, unsigned long pipe, void *buffer,
-		   int length, int interval)
+		   int length, int interval, bool nonblock)
 {
-	return _xhci_submit_int_msg(udev, pipe, buffer, length, interval);
+	return _xhci_submit_int_msg(udev, pipe, buffer, length, interval,
+				    nonblock);
 }
 
 /**
@@ -1387,10 +1389,11 @@ static int xhci_submit_bulk_msg(struct udevice *dev, struct usb_device *udev,
 
 static int xhci_submit_int_msg(struct udevice *dev, struct usb_device *udev,
 			       unsigned long pipe, void *buffer, int length,
-			       int interval)
+			       int interval, bool nonblock)
 {
 	debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
-	return _xhci_submit_int_msg(udev, pipe, buffer, length, interval);
+	return _xhci_submit_int_msg(udev, pipe, buffer, length, interval,
+				    nonblock);
 }
 
 static int xhci_alloc_device(struct udevice *dev, struct usb_device *udev)
diff --git a/drivers/usb/musb-new/musb_uboot.c b/drivers/usb/musb-new/musb_uboot.c
index e2aa313850..497e211c4c 100644
--- a/drivers/usb/musb-new/musb_uboot.c
+++ b/drivers/usb/musb-new/musb_uboot.c
@@ -113,7 +113,7 @@ static int _musb_submit_bulk_msg(struct musb_host_data *host,
 
 static int _musb_submit_int_msg(struct musb_host_data *host,
 	struct usb_device *dev, unsigned long pipe,
-	void *buffer, int len, int interval)
+	void *buffer, int len, int interval, bool nonblock)
 {
 	construct_urb(&host->urb, &host->hep, dev, USB_ENDPOINT_XFER_INT, pipe,
 		      buffer, len, NULL, interval);
@@ -274,9 +274,10 @@ int submit_control_msg(struct usb_device *dev, unsigned long pipe,
 }
 
 int submit_int_msg(struct usb_device *dev, unsigned long pipe,
-		   void *buffer, int length, int interval)
+		   void *buffer, int length, int interval, bool nonblock)
 {
-	return _musb_submit_int_msg(&musb_host, dev, pipe, buffer, length, interval);
+	return _musb_submit_int_msg(&musb_host, dev, pipe, buffer, length,
+				    interval, nonblock);
 }
 
 struct int_queue *create_int_queue(struct usb_device *dev,
@@ -326,10 +327,11 @@ static int musb_submit_bulk_msg(struct udevice *dev, struct usb_device *udev,
 
 static int musb_submit_int_msg(struct udevice *dev, struct usb_device *udev,
 			       unsigned long pipe, void *buffer, int length,
-			       int interval)
+			       int interval, bool nonblock)
 {
 	struct musb_host_data *host = dev_get_priv(dev);
-	return _musb_submit_int_msg(host, udev, pipe, buffer, length, interval);
+	return _musb_submit_int_msg(host, udev, pipe, buffer, length, interval,
+				    nonblock);
 }
 
 static struct int_queue *musb_create_int_queue(struct udevice *dev,
diff --git a/include/usb.h b/include/usb.h
index cf8ec98177..2775b36e11 100644
--- a/include/usb.h
+++ b/include/usb.h
@@ -185,7 +185,7 @@ int submit_bulk_msg(struct usb_device *dev, unsigned long pipe,
 int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
 			int transfer_len, struct devrequest *setup);
 int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
-			int transfer_len, int interval);
+			int transfer_len, int interval, bool nonblock);
 
 #if defined CONFIG_USB_EHCI_HCD || defined CONFIG_USB_MUSB_HOST \
 	|| CONFIG_IS_ENABLED(DM_USB)
@@ -262,8 +262,8 @@ int usb_control_msg(struct usb_device *dev, unsigned int pipe,
 			void *data, unsigned short size, int timeout);
 int usb_bulk_msg(struct usb_device *dev, unsigned int pipe,
 			void *data, int len, int *actual_length, int timeout);
-int usb_submit_int_msg(struct usb_device *dev, unsigned long pipe,
-			void *buffer, int transfer_len, int interval);
+int usb_int_msg(struct usb_device *dev, unsigned long pipe,
+		void *buffer, int transfer_len, int interval, bool nonblock);
 int usb_disable_asynch(int disable);
 int usb_maxpacket(struct usb_device *dev, unsigned long pipe);
 int usb_get_configuration_no(struct usb_device *dev, int cfgno,
@@ -709,7 +709,7 @@ struct dm_usb_ops {
 	 */
 	int (*interrupt)(struct udevice *bus, struct usb_device *udev,
 			 unsigned long pipe, void *buffer, int length,
-			 int interval);
+			 int interval, bool nonblock);
 
 	/**
 	 * create_int_queue() - Create and queue interrupt packets
@@ -1030,7 +1030,8 @@ int usb_emul_bulk(struct udevice *emul, struct usb_device *udev,
  * @return 0 if OK, -ve on error
  */
 int usb_emul_int(struct udevice *emul, struct usb_device *udev,
-		  unsigned long pipe, void *buffer, int length, int interval);
+		  unsigned long pipe, void *buffer, int length, int interval,
+		  bool nonblock);
 
 /**
  * usb_emul_find() - Find an emulator for a particular device

commit 5e8c228de78728ff82f72c9525a4361f4bc1f6dc
Author: Neil Armstrong <narmstrong@baylibre.com>
Date:   Mon Sep 9 18:52:39 2019 +0000

    UPSTREAM: usb: xhci-dwc3: Add support for dis_u2_susphy_quirk
    
    This quirk is necessary for the Amlogic GXL SoCs otherwise the
    Port 2 PHY doesn't get out of suspend and U-Boot resets the board after:
    
    XHCI timeout on event type 33... cannot recover.
    BUG: failure at drivers/usb/host/xhci-ring.c:474/xhci_wait_for_event()!
    BUG!
    
    This quirk is also handled in the dwc3 core code, but until the
    xhci-dwc3 driver uses the dwc3 core, the quirk must be handled here
    to fix USB support on the Amlogic libretech-cc and libretech-ac board
    when a device is only plugged in the OTG port.
    
    Change-Id: Iba72fb52411856785b6bd6ed829e1585ba00bebe
    Cc: Yuri Frolov <crashing.kernel@gmail.com>
    Cc: Bin Meng <bmeng.cn@gmail.com>
    Fixes: dc9cdf859e ("usb: dwc3: Add DWC3 controller driver support")
    Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit b35b8076828d1059c1fcc648ed8c8210ebe6a3dd)

diff --git a/drivers/usb/host/xhci-dwc3.c b/drivers/usb/host/xhci-dwc3.c
index 69e18d9548..9efe4214af 100644
--- a/drivers/usb/host/xhci-dwc3.c
+++ b/drivers/usb/host/xhci-dwc3.c
@@ -153,6 +153,9 @@ static int xhci_dwc3_probe(struct udevice *dev)
 	if (dev_read_bool(dev, "snps,dis-u2-freeclk-exists-quirk"))
 		reg &= ~DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS;
 
+	if (dev_read_bool(dev, "snps,dis_u2_susphy_quirk"))
+		reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
+
 	writel(reg, &dwc3_reg->g_usb2phycfg[0]);
 
 	dr_mode = usb_get_dr_mode(dev_of_offset(dev));

commit d3b04da041b3fd40ef1df4afd7d17e4378d8d59b
Author: Marek Vasut <marek.vasut+renesas@gmail.com>
Date:   Thu Aug 22 17:53:04 2019 +0200

    UPSTREAM: usb: r8a66597: Add optional DM VBUS regulator support
    
    Add DM regulator support for toggling VBUS, this is useful on boards
    which control the VBUS e.g. through GPIO.
    
    Change-Id: I0f6e296d34613ada8d7e96a8ec86a4288614822c
    Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
    Cc: Chris Brandt <chris.brandt@renesas.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 769a9cd4bbd7ae9b8170b3dd6ba54b84fde59224)

diff --git a/drivers/usb/host/r8a66597-hcd.c b/drivers/usb/host/r8a66597-hcd.c
index 9773e705c0..5578c8fe21 100644
--- a/drivers/usb/host/r8a66597-hcd.c
+++ b/drivers/usb/host/r8a66597-hcd.c
@@ -12,6 +12,7 @@
 #include <usb.h>
 #include <asm/io.h>
 #include <linux/iopoll.h>
+#include <power/regulator.h>
 
 #include "r8a66597.h"
 
@@ -819,9 +820,27 @@ static int r8a66597_usb_probe(struct udevice *dev)
 {
 	struct r8a66597 *priv = dev_get_priv(dev);
 	struct usb_bus_priv *bus_priv = dev_get_uclass_priv(dev);
+	int ret;
 
 	bus_priv->desc_before_addr = true;
 
+	if (CONFIG_IS_ENABLED(DM_REGULATOR)) {
+		ret = device_get_supply_regulator(dev, "vbus-supply",
+						  &priv->vbus_supply);
+		if (ret) {
+			dev_err(dev,
+				"can't get VBUS supply\n");
+			return ret;
+		}
+
+		ret = regulator_set_enable(priv->vbus_supply, true);
+		if (ret) {
+			dev_err(dev,
+				"can't enable VBUS supply\n");
+			return ret;
+		}
+	}
+
 	disable_controller(priv);
 	mdelay(100);
 
@@ -839,9 +858,19 @@ static int r8a66597_usb_probe(struct udevice *dev)
 static int r8a66597_usb_remove(struct udevice *dev)
 {
 	struct r8a66597 *priv = dev_get_priv(dev);
+	int ret;
 
 	disable_controller(priv);
 
+	if (CONFIG_IS_ENABLED(DM_REGULATOR)) {
+		ret = regulator_set_enable(priv->vbus_supply, false);
+		if (ret) {
+			dev_err(dev,
+				"can't disable VBUS supply\n");
+			return ret;
+		}
+	}
+
 	return 0;
 }
 
diff --git a/drivers/usb/host/r8a66597.h b/drivers/usb/host/r8a66597.h
index d5d190892d..ad06d36978 100644
--- a/drivers/usb/host/r8a66597.h
+++ b/drivers/usb/host/r8a66597.h
@@ -397,6 +397,7 @@ struct r8a66597 {
 	unsigned short port_change;
 	u16 speed;	/* HSMODE or FSMODE or LSMODE */
 	unsigned char rh_devnum;
+	struct udevice *vbus_supply;
 };
 
 static inline u16 r8a66597_read(struct r8a66597 *r8a66597, unsigned long offset)

commit 22941b48da834f00b8bfbf9624c03ebe176a5c41
Author: Marek Vasut <marek.vasut+renesas@gmail.com>
Date:   Sun Aug 11 13:44:10 2019 +0200

    UPSTREAM: usb: r8a66597: Checkpatch cleanup
    
    Fix remaining checkpatch complaints in the driver.
    
    Change-Id: Ic58362d2e4a9a6a560ceb5c12fbfb502b814ad6f
    Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
    Cc: Chris Brandt <chris.brandt@renesas.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 8b5483015496100b3f5a790a58cc3019815654e0)

diff --git a/drivers/usb/host/r8a66597-hcd.c b/drivers/usb/host/r8a66597-hcd.c
index e554e28ce1..9773e705c0 100644
--- a/drivers/usb/host/r8a66597-hcd.c
+++ b/drivers/usb/host/r8a66597-hcd.c
@@ -59,7 +59,7 @@ static void get_hub_data(struct usb_device *dev, u16 *hub_devnum, u16 *hubport)
 
 	/* check a device connected to root_hub */
 	if ((parent && parent->devnum == 1) ||
-	    (dev->devnum == 1))
+	    dev->devnum == 1)
 		return;
 
 	*hub_devnum = (u8)parent->devnum;
@@ -67,7 +67,7 @@ static void get_hub_data(struct usb_device *dev, u16 *hub_devnum, u16 *hubport)
 }
 
 static void set_devadd(struct r8a66597 *r8a66597, u8 r8a66597_address,
-			struct usb_device *dev, int port)
+		       struct usb_device *dev, int port)
 {
 	u16 val, usbspd, upphub, hubport;
 	unsigned long devadd_reg = get_devadd_addr(r8a66597_address);
@@ -322,7 +322,7 @@ static int send_bulk_packet(struct r8a66597 *r8a66597, struct usb_device *dev,
 	R8A66597_DPRINT("%s\n", __func__);
 
 	r8a66597_mdfy(r8a66597, MBW | BULK_OUT_PIPENUM,
-			MBW | CURPIPE, CFIFOSEL);
+		      MBW | CURPIPE, CFIFOSEL);
 	r8a66597_reg_wait(r8a66597, CFIFOSEL, CURPIPE, BULK_OUT_PIPENUM);
 	tmp = r8a66597_read(r8a66597, CFIFOCTR);
 	if ((tmp & FRDY) == 0) {
@@ -346,7 +346,7 @@ static int send_bulk_packet(struct r8a66597 *r8a66597, struct usb_device *dev,
 	dev->act_len += size;
 
 	r8a66597_mdfy(r8a66597, PID_BUF, PID,
-			get_pipectr_addr(BULK_OUT_PIPENUM));
+		      get_pipectr_addr(BULK_OUT_PIPENUM));
 
 	while (!(r8a66597_read(r8a66597, BEMPSTS) & (1 << BULK_OUT_PIPENUM)))
 		if (ctrlc())
@@ -355,7 +355,7 @@ static int send_bulk_packet(struct r8a66597 *r8a66597, struct usb_device *dev,
 
 	if (dev->act_len >= transfer_len)
 		r8a66597_mdfy(r8a66597, PID_NAK, PID,
-				get_pipectr_addr(BULK_OUT_PIPENUM));
+			      get_pipectr_addr(BULK_OUT_PIPENUM));
 
 	return 0;
 }
@@ -376,17 +376,17 @@ static int receive_bulk_packet(struct r8a66597 *r8a66597,
 	/* prepare */
 	if (dev->act_len == 0) {
 		r8a66597_mdfy(r8a66597, PID_NAK, PID,
-				get_pipectr_addr(pipenum));
+			      get_pipectr_addr(pipenum));
 		r8a66597_write(r8a66597, ~(1 << pipenum), BRDYSTS);
 
 		r8a66597_write(r8a66597, TRCLR, get_pipetre_addr(pipenum));
 		r8a66597_write(r8a66597,
-				(transfer_len + maxpacket - 1) / maxpacket,
+			       (transfer_len + maxpacket - 1) / maxpacket,
 				get_pipetrn_addr(pipenum));
 		r8a66597_bset(r8a66597, TRENB, get_pipetre_addr(pipenum));
 
 		r8a66597_mdfy(r8a66597, PID_BUF, PID,
-				get_pipectr_addr(pipenum));
+			      get_pipectr_addr(pipenum));
 	}
 
 	r8a66597_mdfy(r8a66597, MBW | pipenum, MBW | CURPIPE, CFIFOSEL);
@@ -463,7 +463,7 @@ static int receive_control_packet(struct r8a66597 *r8a66597,
 }
 
 static int send_status_packet(struct r8a66597 *r8a66597,
-			       unsigned long pipe)
+			      unsigned long pipe)
 {
 	r8a66597_bset(r8a66597, SQSET, DCPCTR);
 	r8a66597_mdfy(r8a66597, PID_NAK, PID, DCPCTR);
@@ -554,9 +554,7 @@ static int check_usb_device_connecting(struct r8a66597 *r8a66597)
 	return -1;	/* fail */
 }
 
-/*-------------------------------------------------------------------------*
- * Virtual Root Hub
- *-------------------------------------------------------------------------*/
+/* Virtual Root Hub */
 
 #include <usbroothubdes.h>
 
@@ -638,34 +636,34 @@ static int r8a66597_submit_rh_msg(struct udevice *udev, struct usb_device *dev,
 		switch ((wValue & 0xff00) >> 8) {
 		case (0x01): /* device descriptor */
 			len = min_t(unsigned int,
-				  leni,
+				    leni,
 				  min_t(unsigned int,
-				      sizeof(root_hub_dev_des),
+					sizeof(root_hub_dev_des),
 				      wLength));
 			memcpy(buffer, root_hub_dev_des, len);
 			break;
 		case (0x02): /* configuration descriptor */
 			len = min_t(unsigned int,
-				  leni,
+				    leni,
 				  min_t(unsigned int,
-				      sizeof(root_hub_config_des),
+					sizeof(root_hub_config_des),
 				      wLength));
 			memcpy(buffer, root_hub_config_des, len);
 			break;
 		case (0x03): /* string descriptors */
 			if (wValue == 0x0300) {
 				len = min_t(unsigned int,
-					  leni,
+					    leni,
 					  min_t(unsigned int,
-					      sizeof(root_hub_str_index0),
+						sizeof(root_hub_str_index0),
 					      wLength));
 				memcpy(buffer, root_hub_str_index0, len);
 			}
 			if (wValue == 0x0301) {
 				len = min_t(unsigned int,
-					  leni,
+					    leni,
 					  min_t(unsigned int,
-					      sizeof(root_hub_str_index1),
+						sizeof(root_hub_str_index1),
 					      wLength));
 				memcpy(buffer, root_hub_str_index1, len);
 			}
@@ -698,7 +696,8 @@ static int r8a66597_submit_rh_msg(struct udevice *udev, struct usb_device *dev,
 		} else {
 			data[0] += 2;
 			data[8] = (temp & RH_B_DR) >> 8;
-			data[10] = data[9] = 0xff;
+			data[9] = 0xff;
+			data[10] = 0xff;
 		}
 
 		len = min_t(unsigned int, leni,
@@ -708,7 +707,7 @@ static int r8a66597_submit_rh_msg(struct udevice *udev, struct usb_device *dev,
 	}
 
 	case RH_GET_CONFIGURATION:
-		*(__u8 *) buffer = 0x01;
+		*(__u8 *)buffer = 0x01;
 		len = 1;
 		break;
 	case RH_SET_CONFIGURATION:
@@ -728,9 +727,10 @@ static int r8a66597_submit_rh_msg(struct udevice *udev, struct usb_device *dev,
 	return stat;
 }
 
-static int r8a66597_submit_control_msg(struct udevice *udev, struct usb_device *dev,
-				   unsigned long pipe, void *buffer, int length,
-				   struct devrequest *setup)
+static int r8a66597_submit_control_msg(struct udevice *udev,
+				       struct usb_device *dev,
+				       unsigned long pipe, void *buffer,
+				       int length, struct devrequest *setup)
 {
 	struct r8a66597 *r8a66597 = dev_get_priv(udev);
 	u16 r8a66597_address = setup->request == USB_REQ_SET_ADDRESS ?
@@ -755,7 +755,7 @@ static int r8a66597_submit_control_msg(struct udevice *udev, struct usb_device *
 	dev->act_len = 0;
 	if (usb_pipein(pipe))
 		if (receive_control_packet(r8a66597, dev, buffer,
-						length) < 0)
+					   length) < 0)
 			return -1;
 
 	if (send_status_packet(r8a66597, pipe) < 0)
@@ -766,8 +766,9 @@ static int r8a66597_submit_control_msg(struct udevice *udev, struct usb_device *
 	return 0;
 }
 
-static int r8a66597_submit_bulk_msg(struct udevice *udev, struct usb_device *dev,
-				unsigned long pipe, void *buffer, int length)
+static int r8a66597_submit_bulk_msg(struct udevice *udev,
+				    struct usb_device *dev, unsigned long pipe,
+				    void *buffer, int length)
 {
 	struct r8a66597 *r8a66597 = dev_get_priv(udev);
 	int ret = 0;
@@ -789,10 +790,10 @@ static int r8a66597_submit_bulk_msg(struct udevice *udev, struct usb_device *dev
 
 		if (usb_pipein(pipe))
 			ret = receive_bulk_packet(r8a66597, dev, pipe, buffer,
-							length);
+						  length);
 		else
 			ret = send_bulk_packet(r8a66597, dev, pipe, buffer,
-							length);
+					       length);
 	}
 
 	if (ret == 0)
@@ -825,7 +826,7 @@ static int r8a66597_usb_probe(struct udevice *dev)
 	mdelay(100);
 
 	enable_controller(priv);
-	r8a66597_port_power(priv, 0 , 1);
+	r8a66597_port_power(priv, 0, 1);
 
 	/* check usb device */
 	check_usb_device_connecting(priv);
diff --git a/drivers/usb/host/r8a66597.h b/drivers/usb/host/r8a66597.h
index 29a25c51e8..d5d190892d 100644
--- a/drivers/usb/host/r8a66597.h
+++ b/drivers/usb/host/r8a66597.h
@@ -73,9 +73,9 @@
 #define PIPE3TRE	0x98
 #define PIPE3TRN	0x9A
 #define PIPE4TRE	0x9C
-#define	PIPE4TRN	0x9E
-#define	PIPE5TRE	0xA0
-#define	PIPE5TRN	0xA2
+#define PIPE4TRN	0x9E
+#define PIPE5TRE	0xA0
+#define PIPE5TRN	0xA2
 #define DEVADD0		0xD0
 #define DEVADD1		0xD2
 #define DEVADD2		0xD4
@@ -90,290 +90,290 @@
 #define SUSPMODE0	0x102	/* RZ/A only */
 
 /* System Configuration Control Register */
-#define	HSE		0x0080	/* b7: Hi-speed enable */
-#define	DCFM		0x0040	/* b6: Controller function select  */
-#define	DRPD		0x0020	/* b5: D+/- pull down control */
-#define	DPRPU		0x0010	/* b4: D+ pull up control */
-#define	XTAL		0x0004	/* b2: Crystal selection */
-#define	  XTAL12	 0x0004	  /* 12MHz */
-#define	  XTAL48	 0x0000	  /* 48MHz */
-#define	UPLLE		0x0002	/* b1: internal PLL control */
-#define	USBE		0x0001	/* b0: USB module operation enable */
+#define HSE		0x0080	/* b7: Hi-speed enable */
+#define DCFM		0x0040	/* b6: Controller function select  */
+#define DRPD		0x0020	/* b5: D+/- pull down control */
+#define DPRPU		0x0010	/* b4: D+ pull up control */
+#define XTAL		0x0004	/* b2: Crystal selection */
+#define XTAL12		0x0004	/* 12MHz */
+#define XTAL48		0x0000	/* 48MHz */
+#define UPLLE		0x0002	/* b1: internal PLL control */
+#define USBE		0x0001	/* b0: USB module operation enable */
 
 /* System Configuration Status Register */
-#define	OVCBIT		0x8000	/* b15-14: Over-current bit */
-#define	OVCMON		0xC000	/* b15-14: Over-current monitor */
-#define	SOFEA		0x0020	/* b5: SOF monitor */
-#define	IDMON		0x0004	/* b3: ID-pin monitor */
-#define	LNST		0x0003	/* b1-0: D+, D- line status */
-#define	  SE1		 0x0003	  /* SE1 */
-#define	  FS_KSTS	 0x0002	  /* Full-Speed K State */
-#define	  FS_JSTS	 0x0001	  /* Full-Speed J State */
-#define	  LS_JSTS	 0x0002	  /* Low-Speed J State */
-#define	  LS_KSTS	 0x0001	  /* Low-Speed K State */
-#define	  SE0		 0x0000	  /* SE0 */
+#define OVCBIT		0x8000	/* b15-14: Over-current bit */
+#define OVCMON		0xC000	/* b15-14: Over-current monitor */
+#define SOFEA		0x0020	/* b5: SOF monitor */
+#define IDMON		0x0004	/* b3: ID-pin monitor */
+#define LNST		0x0003	/* b1-0: D+, D- line status */
+#define SE1		0x0003	/* SE1 */
+#define FS_KSTS		0x0002	/* Full-Speed K State */
+#define FS_JSTS		0x0001	/* Full-Speed J State */
+#define LS_JSTS		0x0002	/* Low-Speed J State */
+#define LS_KSTS		0x0001	/* Low-Speed K State */
+#define SE0		0x0000	/* SE0 */
 
 /* Device State Control Register */
-#define	EXTLP0		0x0400	/* b10: External port */
-#define	VBOUT		0x0200	/* b9: VBUS output */
-#define	WKUP		0x0100	/* b8: Remote wakeup */
-#define	RWUPE		0x0080	/* b7: Remote wakeup sense */
-#define	USBRST		0x0040	/* b6: USB reset enable */
-#define	RESUME		0x0020	/* b5: Resume enable */
-#define	UACT		0x0010	/* b4: USB bus enable */
-#define	RHST		0x0007	/* b1-0: Reset handshake status */
-#define	  HSPROC	 0x0004	  /* HS handshake is processing */
-#define	  HSMODE	 0x0003	  /* Hi-Speed mode */
-#define	  FSMODE	 0x0002	  /* Full-Speed mode */
-#define	  LSMODE	 0x0001	  /* Low-Speed mode */
-#define	  UNDECID	 0x0000	  /* Undecided */
+#define EXTLP0		0x0400	/* b10: External port */
+#define VBOUT		0x0200	/* b9: VBUS output */
+#define WKUP		0x0100	/* b8: Remote wakeup */
+#define RWUPE		0x0080	/* b7: Remote wakeup sense */
+#define USBRST		0x0040	/* b6: USB reset enable */
+#define RESUME		0x0020	/* b5: Resume enable */
+#define UACT		0x0010	/* b4: USB bus enable */
+#define RHST		0x0007	/* b1-0: Reset handshake status */
+#define HSPROC		0x0004	/* HS handshake is processing */
+#define HSMODE		0x0003	/* Hi-Speed mode */
+#define FSMODE		0x0002	/* Full-Speed mode */
+#define LSMODE		0x0001	/* Low-Speed mode */
+#define UNDECID		0x0000	/* Undecided */
 
 /* Test Mode Register */
-#define	UTST			0x000F	/* b3-0: Test select */
-#define	  H_TST_PACKET		 0x000C	  /* HOST TEST Packet */
-#define	  H_TST_SE0_NAK		 0x000B	  /* HOST TEST SE0 NAK */
-#define	  H_TST_K		 0x000A	  /* HOST TEST K */
-#define	  H_TST_J		 0x0009	  /* HOST TEST J */
-#define	  H_TST_NORMAL		 0x0000	  /* HOST Normal Mode */
-#define	  P_TST_PACKET		 0x0004	  /* PERI TEST Packet */
-#define	  P_TST_SE0_NAK		 0x0003	  /* PERI TEST SE0 NAK */
-#define	  P_TST_K		 0x0002	  /* PERI TEST K */
-#define	  P_TST_J		 0x0001	  /* PERI TEST J */
-#define	  P_TST_NORMAL		 0x0000	  /* PERI Normal Mode */
+#define UTST		0x000F	/* b3-0: Test select */
+#define H_TST_PACKET	0x000C	/* HOST TEST Packet */
+#define H_TST_SE0_NAK	0x000B	/* HOST TEST SE0 NAK */
+#define H_TST_K		0x000A	/* HOST TEST K */
+#define H_TST_J		0x0009	/* HOST TEST J */
+#define H_TST_NORMAL	0x0000	/* HOST Normal Mode */
+#define P_TST_PACKET	0x0004	/* PERI TEST Packet */
+#define P_TST_SE0_NAK	0x0003	/* PERI TEST SE0 NAK */
+#define P_TST_K		0x0002	/* PERI TEST K */
+#define P_TST_J		0x0001	/* PERI TEST J */
+#define P_TST_NORMAL	0x0000	/* PERI Normal Mode */
 
 /* Data Pin Configuration Register */
-#define	LDRV			0x8000	/* b15: Drive Current Adjust */
-#define	  VIF1			  0x0000		/* VIF = 1.8V */
-#define	  VIF3			  0x8000		/* VIF = 3.3V */
-#define	INTA			0x0001	/* b1: USB INT-pin active */
+#define LDRV		0x8000	/* b15: Drive Current Adjust */
+#define VIF1		0x0000	/* VIF = 1.8V */
+#define VIF3		0x8000	/* VIF = 3.3V */
+#define INTA		0x0001	/* b1: USB INT-pin active */
 
 /* DMAx Pin Configuration Register */
-#define	DREQA			0x4000	/* b14: Dreq active select */
-#define	BURST			0x2000	/* b13: Burst mode */
-#define	DACKA			0x0400	/* b10: Dack active select */
-#define	DFORM			0x0380	/* b9-7: DMA mode select */
-#define	  CPU_ADR_RD_WR		 0x0000	  /* Address + RD/WR mode (CPU bus) */
-#define	  CPU_DACK_RD_WR	 0x0100	  /* DACK + RD/WR mode (CPU bus) */
-#define	  CPU_DACK_ONLY		 0x0180	  /* DACK only mode (CPU bus) */
-#define	  SPLIT_DACK_ONLY	 0x0200	  /* DACK only mode (SPLIT bus) */
-#define	DENDA			0x0040	/* b6: Dend active select */
-#define	PKTM			0x0020	/* b5: Packet mode */
-#define	DENDE			0x0010	/* b4: Dend enable */
-#define	OBUS			0x0004	/* b2: OUTbus mode */
+#define DREQA		0x4000	/* b14: Dreq active select */
+#define BURST		0x2000	/* b13: Burst mode */
+#define DACKA		0x0400	/* b10: Dack active select */
+#define DFORM		0x0380	/* b9-7: DMA mode select */
+#define CPU_ADR_RD_WR	0x0000	/* Address + RD/WR mode (CPU bus) */
+#define CPU_DACK_RD_WR	0x0100	/* DACK + RD/WR mode (CPU bus) */
+#define CPU_DACK_ONLY	0x0180	/* DACK only mode (CPU bus) */
+#define SPLIT_DACK_ONLY	0x0200	/* DACK only mode (SPLIT bus) */
+#define DENDA		0x0040	/* b6: Dend active select */
+#define PKTM		0x0020	/* b5: Packet mode */
+#define DENDE		0x0010	/* b4: Dend enable */
+#define OBUS		0x0004	/* b2: OUTbus mode */
 
 /* CFIFO/DxFIFO Port Select Register */
-#define	RCNT		0x8000	/* b15: Read count mode */
-#define	REW		0x4000	/* b14: Buffer rewind */
-#define	DCLRM		0x2000	/* b13: DMA buffer clear mode */
-#define	DREQE		0x1000	/* b12: DREQ output enable */
-#define	MBW		0x0800	/* b10: Maximum bit width for FIFO access */
-#define	  MBW_8		 0x0000	  /*  8bit */
-#define	  MBW_16	 0x0400	  /* 16bit */
-#define	  MBW_32	 0x0800   /* 32bit */
-#define	BIGEND		0x0100	/* b8: Big endian mode */
-#define	  BYTE_LITTLE	 0x0000		/* little dendian */
-#define	  BYTE_BIG	 0x0100		/* big endifan */
-#define	ISEL		0x0020	/* b5: DCP FIFO port direction select */
-#define	CURPIPE		0x000F	/* b2-0: PIPE select */
+#define RCNT		0x8000	/* b15: Read count mode */
+#define REW		0x4000	/* b14: Buffer rewind */
+#define DCLRM		0x2000	/* b13: DMA buffer clear mode */
+#define DREQE		0x1000	/* b12: DREQ output enable */
+#define MBW		0x0800	/* b10: Maximum bit width for FIFO access */
+#define MBW_8		0x0000	/*  8bit */
+#define MBW_16		0x0400	/* 16bit */
+#define MBW_32		0x0800	/* 32bit */
+#define BIGEND		0x0100	/* b8: Big endian mode */
+#define BYTE_LITTLE	0x0000	/* little dendian */
+#define BYTE_BIG	0x0100	/* big endifan */
+#define ISEL		0x0020	/* b5: DCP FIFO port direction select */
+#define CURPIPE		0x000F	/* b2-0: PIPE select */
 
 /* CFIFO/DxFIFO Port Control Register */
-#define	BVAL		0x8000	/* b15: Buffer valid flag */
-#define	BCLR		0x4000	/* b14: Buffer clear */
-#define	FRDY		0x2000	/* b13: FIFO ready */
-#define	DTLN		0x0FFF	/* b11-0: FIFO received data length */
+#define BVAL		0x8000	/* b15: Buffer valid flag */
+#define BCLR		0x4000	/* b14: Buffer clear */
+#define FRDY		0x2000	/* b13: FIFO ready */
+#define DTLN		0x0FFF	/* b11-0: FIFO received data length */
 
 /* Interrupt Enable Register 0 */
-#define	VBSE	0x8000	/* b15: VBUS interrupt */
-#define	RSME	0x4000	/* b14: Resume interrupt */
-#define	SOFE	0x2000	/* b13: Frame update interrupt */
-#define	DVSE	0x1000	/* b12: Device state transition interrupt */
-#define	CTRE	0x0800	/* b11: Control transfer stage transition interrupt */
-#define	BEMPE	0x0400	/* b10: Buffer empty interrupt */
-#define	NRDYE	0x0200	/* b9: Buffer not ready interrupt */
-#define	BRDYE	0x0100	/* b8: Buffer ready interrupt */
+#define VBSE	0x8000	/* b15: VBUS interrupt */
+#define RSME	0x4000	/* b14: Resume interrupt */
+#define SOFE	0x2000	/* b13: Frame update interrupt */
+#define DVSE	0x1000	/* b12: Device state transition interrupt */
+#define CTRE	0x0800	/* b11: Control transfer stage transition interrupt */
+#define BEMPE	0x0400	/* b10: Buffer empty interrupt */
+#define NRDYE	0x0200	/* b9: Buffer not ready interrupt */
+#define BRDYE	0x0100	/* b8: Buffer ready interrupt */
 
 /* Interrupt Enable Register 1 */
-#define	OVRCRE		0x8000	/* b15: Over-current interrupt */
-#define	BCHGE		0x4000	/* b14: USB us chenge interrupt */
-#define	DTCHE		0x1000	/* b12: Detach sense interrupt */
-#define	ATTCHE		0x0800	/* b11: Attach sense interrupt */
-#define	EOFERRE		0x0040	/* b6: EOF error interrupt */
-#define	SIGNE		0x0020	/* b5: SETUP IGNORE interrupt */
-#define	SACKE		0x0010	/* b4: SETUP ACK interrupt */
+#define OVRCRE		0x8000	/* b15: Over-current interrupt */
+#define BCHGE		0x4000	/* b14: USB us chenge interrupt */
+#define DTCHE		0x1000	/* b12: Detach sense interrupt */
+#define ATTCHE		0x0800	/* b11: Attach sense interrupt */
+#define EOFERRE		0x0040	/* b6: EOF error interrupt */
+#define SIGNE		0x0020	/* b5: SETUP IGNORE interrupt */
+#define SACKE		0x0010	/* b4: SETUP ACK interrupt */
 
 /* BRDY Interrupt Enable/Status Register */
-#define	BRDY9		0x0200	/* b9: PIPE9 */
-#define	BRDY8		0x0100	/* b8: PIPE8 */
-#define	BRDY7		0x0080	/* b7: PIPE7 */
-#define	BRDY6		0x0040	/* b6: PIPE6 */
-#define	BRDY5		0x0020	/* b5: PIPE5 */
-#define	BRDY4		0x0010	/* b4: PIPE4 */
-#define	BRDY3		0x0008	/* b3: PIPE3 */
-#define	BRDY2		0x0004	/* b2: PIPE2 */
-#define	BRDY1		0x0002	/* b1: PIPE1 */
-#define	BRDY0		0x0001	/* b1: PIPE0 */
+#define BRDY9		0x0200	/* b9: PIPE9 */
+#define BRDY8		0x0100	/* b8: PIPE8 */
+#define BRDY7		0x0080	/* b7: PIPE7 */
+#define BRDY6		0x0040	/* b6: PIPE6 */
+#define BRDY5		0x0020	/* b5: PIPE5 */
+#define BRDY4		0x0010	/* b4: PIPE4 */
+#define BRDY3		0x0008	/* b3: PIPE3 */
+#define BRDY2		0x0004	/* b2: PIPE2 */
+#define BRDY1		0x0002	/* b1: PIPE1 */
+#define BRDY0		0x0001	/* b1: PIPE0 */
 
 /* NRDY Interrupt Enable/Status Register */
-#define	NRDY9		0x0200	/* b9: PIPE9 */
-#define	NRDY8		0x0100	/* b8: PIPE8 */
-#define	NRDY7		0x0080	/* b7: PIPE7 */
-#define	NRDY6		0x0040	/* b6: PIPE6 */
-#define	NRDY5		0x0020	/* b5: PIPE5 */
-#define	NRDY4		0x0010	/* b4: PIPE4 */
-#define	NRDY3		0x0008	/* b3: PIPE3 */
-#define	NRDY2		0x0004	/* b2: PIPE2 */
-#define	NRDY1		0x0002	/* b1: PIPE1 */
-#define	NRDY0		0x0001	/* b1: PIPE0 */
+#define NRDY9		0x0200	/* b9: PIPE9 */
+#define NRDY8		0x0100	/* b8: PIPE8 */
+#define NRDY7		0x0080	/* b7: PIPE7 */
+#define NRDY6		0x0040	/* b6: PIPE6 */
+#define NRDY5		0x0020	/* b5: PIPE5 */
+#define NRDY4		0x0010	/* b4: PIPE4 */
+#define NRDY3		0x0008	/* b3: PIPE3 */
+#define NRDY2		0x0004	/* b2: PIPE2 */
+#define NRDY1		0x0002	/* b1: PIPE1 */
+#define NRDY0		0x0001	/* b1: PIPE0 */
 
 /* BEMP Interrupt Enable/Status Register */
-#define	BEMP9		0x0200	/* b9: PIPE9 */
-#define	BEMP8		0x0100	/* b8: PIPE8 */
-#define	BEMP7		0x0080	/* b7: PIPE7 */
-#define	BEMP6		0x0040	/* b6: PIPE6 */
-#define	BEMP5		0x0020	/* b5: PIPE5 */
-#define	BEMP4		0x0010	/* b4: PIPE4 */
-#define	BEMP3		0x0008	/* b3: PIPE3 */
-#define	BEMP2		0x0004	/* b2: PIPE2 */
-#define	BEMP1		0x0002	/* b1: PIPE1 */
-#define	BEMP0		0x0001	/* b0: PIPE0 */
+#define BEMP9		0x0200	/* b9: PIPE9 */
+#define BEMP8		0x0100	/* b8: PIPE8 */
+#define BEMP7		0x0080	/* b7: PIPE7 */
+#define BEMP6		0x0040	/* b6: PIPE6 */
+#define BEMP5		0x0020	/* b5: PIPE5 */
+#define BEMP4		0x0010	/* b4: PIPE4 */
+#define BEMP3		0x0008	/* b3: PIPE3 */
+#define BEMP2		0x0004	/* b2: PIPE2 */
+#define BEMP1		0x0002	/* b1: PIPE1 */
+#define BEMP0		0x0001	/* b0: PIPE0 */
 
 /* SOF Pin Configuration Register */
-#define	TRNENSEL	0x0100	/* b8: Select transaction enable period */
-#define	BRDYM		0x0040	/* b6: BRDY clear timing */
-#define	INTL		0x0020	/* b5: Interrupt sense select */
-#define	EDGESTS		0x0010	/* b4:  */
-#define	SOFMODE		0x000C	/* b3-2: SOF pin select */
-#define	  SOF_125US	 0x0008	  /* SOF OUT 125us Frame Signal */
-#define	  SOF_1MS	 0x0004	  /* SOF OUT 1ms Frame Signal */
-#define	  SOF_DISABLE	 0x0000	  /* SOF OUT Disable */
+#define TRNENSEL	0x0100	/* b8: Select transaction enable period */
+#define BRDYM		0x0040	/* b6: BRDY clear timing */
+#define INTL		0x0020	/* b5: Interrupt sense select */
+#define EDGESTS		0x0010	/* b4:  */
+#define SOFMODE		0x000C	/* b3-2: SOF pin select */
+#define SOF_125US	0x0008	/* SOF OUT 125us Frame Signal */
+#define SOF_1MS		0x0004	/* SOF OUT 1ms Frame Signal */
+#define SOF_DISABLE	0x0000	/* SOF OUT Disable */
 
 /* Interrupt Status Register 0 */
-#define	VBINT	0x8000	/* b15: VBUS interrupt */
-#define	RESM	0x4000	/* b14: Resume interrupt */
-#define	SOFR	0x2000	/* b13: SOF frame update interrupt */
-#define	DVST	0x1000	/* b12: Device state transition interrupt */
-#define	CTRT	0x0800	/* b11: Control transfer stage transition interrupt */
-#define	BEMP	0x0400	/* b10: Buffer empty interrupt */
-#define	NRDY	0x0200	/* b9: Buffer not ready interrupt */
-#define	BRDY	0x0100	/* b8: Buffer ready interrupt */
-#define	VBSTS	0x0080	/* b7: VBUS input port */
-#define	DVSQ	0x0070	/* b6-4: Device state */
-#define	  DS_SPD_CNFG	 0x0070	  /* Suspend Configured */
-#define	  DS_SPD_ADDR	 0x0060	  /* Suspend Address */
-#define	  DS_SPD_DFLT	 0x0050	  /* Suspend Default */
-#define	  DS_SPD_POWR	 0x0040	  /* Suspend Powered */
-#define	  DS_SUSP	 0x0040	  /* Suspend */
-#define	  DS_CNFG	 0x0030	  /* Configured */
-#define	  DS_ADDS	 0x0020	  /* Address */
-#define	  DS_DFLT	 0x0010	  /* Default */
-#define	  DS_POWR	 0x0000	  /* Powered */
-#define	DVSQS		0x0030	/* b5-4: Device state */
-#define	VALID		0x0008	/* b3: Setup packet detected flag */
-#define	CTSQ		0x0007	/* b2-0: Control transfer stage */
-#define	  CS_SQER	 0x0006	  /* Sequence error */
-#define	  CS_WRND	 0x0005	  /* Control write nodata status stage */
-#define	  CS_WRSS	 0x0004	  /* Control write status stage */
-#define	  CS_WRDS	 0x0003	  /* Control write data stage */
-#define	  CS_RDSS	 0x0002	  /* Control read status stage */
-#define	  CS_RDDS	 0x0001	  /* Control read data stage */
-#define	  CS_IDST	 0x0000	  /* Idle or setup stage */
+#define VBINT	0x8000	/* b15: VBUS interrupt */
+#define RESM	0x4000	/* b14: Resume interrupt */
+#define SOFR	0x2000	/* b13: SOF frame update interrupt */
+#define DVST	0x1000	/* b12: Device state transition interrupt */
+#define CTRT	0x0800	/* b11: Control transfer stage transition interrupt */
+#define BEMP	0x0400	/* b10: Buffer empty interrupt */
+#define NRDY	0x0200	/* b9: Buffer not ready interrupt */
+#define BRDY	0x0100	/* b8: Buffer ready interrupt */
+#define VBSTS	0x0080	/* b7: VBUS input port */
+#define DVSQ	0x0070	/* b6-4: Device state */
+#define DS_SPD_CNFG	0x0070	/* Suspend Configured */
+#define DS_SPD_ADDR	0x0060	/* Suspend Address */
+#define DS_SPD_DFLT	0x0050	/* Suspend Default */
+#define DS_SPD_POWR	0x0040	/* Suspend Powered */
+#define DS_SUSP		0x0040	/* Suspend */
+#define DS_CNFG		0x0030	/* Configured */
+#define DS_ADDS		0x0020	/* Address */
+#define DS_DFLT		0x0010	/* Default */
+#define DS_POWR		0x0000	/* Powered */
+#define DVSQS		0x0030	/* b5-4: Device state */
+#define VALID		0x0008	/* b3: Setup packet detected flag */
+#define CTSQ		0x0007	/* b2-0: Control transfer stage */
+#define CS_SQER		0x0006	/* Sequence error */
+#define CS_WRND		0x0005	/* Control write nodata status stage */
+#define CS_WRSS		0x0004	/* Control write status stage */
+#define CS_WRDS		0x0003	/* Control write data stage */
+#define CS_RDSS		0x0002	/* Control read status stage */
+#define CS_RDDS		0x0001	/* Control read data stage */
+#define CS_IDST		0x0000	/* Idle or setup stage */
 
 /* Interrupt Status Register 1 */
-#define	OVRCR		0x8000	/* b15: Over-current interrupt */
-#define	BCHG		0x4000	/* b14: USB bus chenge interrupt */
-#define	DTCH		0x1000	/* b12: Detach sense interrupt */
-#define	ATTCH		0x0800	/* b11: Attach sense interrupt */
-#define	EOFERR		0x0040	/* b6: EOF-error interrupt */
-#define	SIGN		0x0020	/* b5: Setup ignore interrupt */
-#define	SACK		0x0010	/* b4: Setup acknowledge interrupt */
+#define OVRCR		0x8000	/* b15: Over-current interrupt */
+#define BCHG		0x4000	/* b14: USB bus chenge interrupt */
+#define DTCH		0x1000	/* b12: Detach sense interrupt */
+#define ATTCH		0x0800	/* b11: Attach sense interrupt */
+#define EOFERR		0x0040	/* b6: EOF-error interrupt */
+#define SIGN		0x0020	/* b5: Setup ignore interrupt */
+#define SACK		0x0010	/* b4: Setup acknowledge interrupt */
 
 /* Frame Number Register */
-#define	OVRN		0x8000	/* b15: Overrun error */
-#define	CRCE		0x4000	/* b14: Received data error */
-#define	FRNM		0x07FF	/* b10-0: Frame number */
+#define OVRN		0x8000	/* b15: Overrun error */
+#define CRCE		0x4000	/* b14: Received data error */
+#define FRNM		0x07FF	/* b10-0: Frame number */
 
 /* Micro Frame Number Register */
-#define	UFRNM		0x0007	/* b2-0: Micro frame number */
+#define UFRNM		0x0007	/* b2-0: Micro frame number */
 
 /* Default Control Pipe Maxpacket Size Register */
 /* Pipe Maxpacket Size Register */
-#define	DEVSEL	0xF000	/* b15-14: Device address select */
-#define	MAXP	0x007F	/* b6-0: Maxpacket size of default control pipe */
+#define DEVSEL	0xF000	/* b15-14: Device address select */
+#define MAXP	0x007F	/* b6-0: Maxpacket size of default control pipe */
 
 /* Default Control Pipe Control Register */
-#define	BSTS		0x8000	/* b15: Buffer status */
-#define	SUREQ		0x4000	/* b14: Send USB request  */
-#define	CSCLR		0x2000	/* b13: complete-split status clear */
-#define	CSSTS		0x1000	/* b12: complete-split status */
-#define	SUREQCLR	0x0800	/* b11: stop setup request */
-#define	SQCLR		0x0100	/* b8: Sequence toggle bit clear */
-#define	SQSET		0x0080	/* b7: Sequence toggle bit set */
-#define	SQMON		0x0040	/* b6: Sequence toggle bit monitor */
-#define	PBUSY		0x0020	/* b5: pipe busy */
-#define	PINGE		0x0010	/* b4: ping enable */
-#define	CCPL		0x0004	/* b2: Enable control transfer complete */
-#define	PID		0x0003	/* b1-0: Response PID */
-#define	  PID_STALL11	 0x0003	  /* STALL */
-#define	  PID_STALL	 0x0002	  /* STALL */
-#define	  PID_BUF	 0x0001	  /* BUF */
-#define	  PID_NAK	 0x0000	  /* NAK */
+#define BSTS		0x8000	/* b15: Buffer status */
+#define SUREQ		0x4000	/* b14: Send USB request  */
+#define CSCLR		0x2000	/* b13: complete-split status clear */
+#define CSSTS		0x1000	/* b12: complete-split status */
+#define SUREQCLR	0x0800	/* b11: stop setup request */
+#define SQCLR		0x0100	/* b8: Sequence toggle bit clear */
+#define SQSET		0x0080	/* b7: Sequence toggle bit set */
+#define SQMON		0x0040	/* b6: Sequence toggle bit monitor */
+#define PBUSY		0x0020	/* b5: pipe busy */
+#define PINGE		0x0010	/* b4: ping enable */
+#define CCPL		0x0004	/* b2: Enable control transfer complete */
+#define PID		0x0003	/* b1-0: Response PID */
+#define PID_STALL11	0x0003	/* STALL */
+#define PID_STALL	0x0002	/* STALL */
+#define PID_BUF		0x0001	/* BUF */
+#define PID_NAK		0x0000	/* NAK */
 
 /* Pipe Window Select Register */
-#define	PIPENM		0x0007	/* b2-0: Pipe select */
+#define PIPENM		0x0007	/* b2-0: Pipe select */
 
 /* Pipe Configuration Register */
-#define	R8A66597_TYP	0xC000	/* b15-14: Transfer type */
-#define	  R8A66597_ISO	 0xC000		  /* Isochronous */
-#define	  R8A66597_INT	 0x8000		  /* Interrupt */
-#define	  R8A66597_BULK	 0x4000		  /* Bulk */
-#define	R8A66597_BFRE	0x0400	/* b10: Buffer ready interrupt mode select */
-#define	R8A66597_DBLB	0x0200	/* b9: Double buffer mode select */
-#define	R8A66597_CNTMD	0x0100	/* b8: Continuous transfer mode select */
-#define	R8A66597_SHTNAK	0x0080	/* b7: Transfer end NAK */
-#define	R8A66597_DIR	0x0010	/* b4: Transfer direction select */
-#define	R8A66597_EPNUM	0x000F	/* b3-0: Eendpoint number select */
+#define R8A66597_TYP	0xC000	/* b15-14: Transfer type */
+#define R8A66597_ISO	0xC000	/* Isochronous */
+#define R8A66597_INT	0x8000	/* Interrupt */
+#define R8A66597_BULK	0x4000	/* Bulk */
+#define R8A66597_BFRE	0x0400	/* b10: Buffer ready interrupt mode select */
+#define R8A66597_DBLB	0x0200	/* b9: Double buffer mode select */
+#define R8A66597_CNTMD	0x0100	/* b8: Continuous transfer mode select */
+#define R8A66597_SHTNAK	0x0080	/* b7: Transfer end NAK */
+#define R8A66597_DIR	0x0010	/* b4: Transfer direction select */
+#define R8A66597_EPNUM	0x000F	/* b3-0: Eendpoint number select */
 
 /* Pipe Buffer Configuration Register */
-#define	BUFSIZE		0x7C00	/* b14-10: Pipe buffer size */
-#define	BUFNMB		0x007F	/* b6-0: Pipe buffer number */
-#define	PIPE0BUF	256
-#define	PIPExBUF	64
+#define BUFSIZE		0x7C00	/* b14-10: Pipe buffer size */
+#define BUFNMB		0x007F	/* b6-0: Pipe buffer number */
+#define PIPE0BUF	256
+#define PIPExBUF	64
 
 /* Pipe Maxpacket Size Register */
-#define	MXPS		0x07FF	/* b10-0: Maxpacket size */
+#define MXPS	0x07FF	/* b10-0: Maxpacket size */
 
 /* Pipe Cycle Configuration Register */
-#define	IFIS	0x1000	/* b12: Isochronous in-buffer flush mode select */
-#define	IITV	0x0007	/* b2-0: Isochronous interval */
+#define IFIS	0x1000	/* b12: Isochronous in-buffer flush mode select */
+#define IITV	0x0007	/* b2-0: Isochronous interval */
 
 /* Pipex Control Register */
-#define	BSTS	0x8000	/* b15: Buffer status */
-#define	INBUFM	0x4000	/* b14: IN buffer monitor (Only for PIPE1 to 5) */
-#define	CSCLR	0x2000	/* b13: complete-split status clear */
-#define	CSSTS	0x1000	/* b12: complete-split status */
-#define	ATREPM	0x0400	/* b10: Auto repeat mode */
-#define	ACLRM	0x0200	/* b9: Out buffer auto clear mode */
-#define	SQCLR	0x0100	/* b8: Sequence toggle bit clear */
-#define	SQSET	0x0080	/* b7: Sequence toggle bit set */
-#define	SQMON	0x0040	/* b6: Sequence toggle bit monitor */
-#define	PBUSY	0x0020	/* b5: pipe busy */
-#define	PID	0x0003	/* b1-0: Response PID */
+#define BSTS	0x8000	/* b15: Buffer status */
+#define INBUFM	0x4000	/* b14: IN buffer monitor (Only for PIPE1 to 5) */
+#define CSCLR	0x2000	/* b13: complete-split status clear */
+#define CSSTS	0x1000	/* b12: complete-split status */
+#define ATREPM	0x0400	/* b10: Auto repeat mode */
+#define ACLRM	0x0200	/* b9: Out buffer auto clear mode */
+#define SQCLR	0x0100	/* b8: Sequence toggle bit clear */
+#define SQSET	0x0080	/* b7: Sequence toggle bit set */
+#define SQMON	0x0040	/* b6: Sequence toggle bit monitor */
+#define PBUSY	0x0020	/* b5: pipe busy */
+#define PID	0x0003	/* b1-0: Response PID */
 
 /* PIPExTRE */
-#define	TRENB		0x0200	/* b9: Transaction counter enable */
-#define	TRCLR		0x0100	/* b8: Transaction counter clear */
+#define TRENB		0x0200	/* b9: Transaction counter enable */
+#define TRCLR		0x0100	/* b8: Transaction counter clear */
 
 /* PIPExTRN */
-#define	TRNCNT		0xFFFF	/* b15-0: Transaction counter */
+#define TRNCNT		0xFFFF	/* b15-0: Transaction counter */
 
 /* DEVADDx */
-#define	UPPHUB		0x7800
-#define	HUBPORT		0x0700
-#define	USBSPD		0x00C0
-#define	RTPORT		0x0001
+#define UPPHUB		0x7800
+#define HUBPORT		0x0700
+#define USBSPD		0x00C0
+#define RTPORT		0x0001
 
 /* Suspend Mode Register */
-#define SUSPM		0x4000 /* b14: Suspend */
+#define SUSPM		0x4000	/* b14: Suspend */
 
 #define R8A66597_MAX_NUM_PIPE		10
 #define R8A66597_BUF_BSIZE		8
@@ -388,9 +388,7 @@
 #define BULK_OUT_PIPENUM	4
 #define BULK_OUT_BUFNUM		40
 
-#define check_bulk_or_isoc(pipenum)	((pipenum >= 1 && pipenum <= 5))
-#define check_interrupt(pipenum)	((pipenum >= 6 && pipenum <= 9))
-#define make_devsel(addr)		(addr << 12)
+#define make_devsel(addr)		((addr) << 12)
 
 struct r8a66597 {
 	unsigned long reg;
@@ -421,6 +419,7 @@ static inline void r8a66597_read_fifo(struct r8a66597 *r8a66597,
 
 	if (len & 0x00000003) {
 		unsigned long tmp = readl(fifoaddr);
+
 		memcpy((unsigned char *)buf + count * 4, &tmp, len & 0x03);
 	}
 }
@@ -460,6 +459,7 @@ static inline void r8a66597_mdfy(struct r8a66597 *r8a66597,
 				 u16 val, u16 pat, unsigned long offset)
 {
 	u16 tmp;
+
 	tmp = r8a66597_read(r8a66597, offset);
 	tmp = tmp & (~pat);
 	tmp = tmp | val;
@@ -524,7 +524,6 @@ static inline void r8a66597_port_power(struct r8a66597 *r8a66597, int port,
 #define get_pipetrn_addr(pipenum)	(PIPE1TRN + (pipenum - 1) * 4)
 #define get_devadd_addr(address)	(DEVADD0 + address * 2)
 
-
 /* USB HUB CONSTANTS (not OHCI-specific; see hub.h, based on usb_ohci.h) */
 
 /* destination of request */
@@ -607,11 +606,11 @@ static inline void r8a66597_port_power(struct r8a66597 *r8a66597, int port,
 
 /* roothub.a masks */
 #define RH_A_NDP	(0xff << 0)	/* number of downstream ports */
-#define RH_A_PSM	(1 << 8)	/* power switching mode */
-#define RH_A_NPS	(1 << 9)	/* no power switching */
-#define RH_A_DT		(1 << 10)	/* device type (mbz) */
-#define RH_A_OCPM	(1 << 11)	/* over current protection mode */
-#define RH_A_NOCP	(1 << 12)	/* no over current protection */
+#define RH_A_PSM	BIT(8)	/* power switching mode */
+#define RH_A_NPS	BIT(9)	/* no power switching */
+#define RH_A_DT		BIT(10)	/* device type (mbz) */
+#define RH_A_OCPM	BIT(11)	/* over current protection mode */
+#define RH_A_NOCP	BIT(12)	/* no over current protection */
 #define RH_A_POTPGT	(0xff << 24)	/* power on to power good time */
 
 #endif	/* __R8A66597_H__ */

commit deb45038aa1dbeb5b4281bdac574e1b601409818
Author: Marek Vasut <marek.vasut+renesas@gmail.com>
Date:   Sun Aug 11 13:23:43 2019 +0200

    UPSTREAM: usb: r8a66597: Add Kconfig entry
    
    Add missing Kconfig entry for the R8A66597 driver.
    
    Change-Id: I8f476bc44995b1aaf296a3b9105e8e2d42876c20
    Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
    Cc: Chris Brandt <chris.brandt@renesas.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit a3d65651d9dd1b65722c21bf739d1e9978320a47)

diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 1a3969e434..b93a7d2db7 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -264,3 +264,12 @@ config USB_DWC2_BUFFER_SIZE
 	  because larger transactions could be split in smaller ones.
 
 endif # USB_DWC2
+
+config USB_R8A66597_HCD
+	bool "Renesas R8A66597 USB Core support"
+	depends on OF_CONTROL
+	depends on DM_USB
+	select USB_HOST
+	---help---
+	  This enables support for the on-chip Renesas R8A66597 USB 2.0
+	  controller, present in various RZ and SH SoCs.

commit 1e9a8859b7bb7a542065068181ebeb31e247ef61
Author: Marek Vasut <marek.vasut+renesas@gmail.com>
Date:   Sun Aug 11 12:34:38 2019 +0200

    UPSTREAM: usb: r8a66597: Convert to USB DM
    
    Convert the R8A66597 USB driver to DM and add support for DT probing.
    Drop support for legacy non-DM and non-DT probing, since there are no
    platform using that.
    
    Change-Id: Ic4a15ca6cdbea7782257b37683a62a971f4902bc
    Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
    Cc: Chris Brandt <chris.brandt@renesas.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 7f3858f90d01cca631d7c6b40301618af060acd7)

diff --git a/drivers/usb/host/r8a66597-hcd.c b/drivers/usb/host/r8a66597-hcd.c
index 8ed99e75ff..e554e28ce1 100644
--- a/drivers/usb/host/r8a66597-hcd.c
+++ b/drivers/usb/host/r8a66597-hcd.c
@@ -8,6 +8,7 @@
 
 #include <common.h>
 #include <console.h>
+#include <dm.h>
 #include <usb.h>
 #include <asm/io.h>
 #include <linux/iopoll.h>
@@ -20,29 +21,49 @@
 #define R8A66597_DPRINT(...)
 #endif
 
-static struct r8a66597 gr8a66597;
+static inline struct usb_device *usb_dev_get_parent(struct usb_device *udev)
+{
+	struct udevice *parent = udev->dev->parent;
+
+	/*
+	 * When called from usb-uclass.c: usb_scan_device() udev->dev points
+	 * to the parent udevice, not the actual udevice belonging to the
+	 * udev as the device is not instantiated yet.
+	 *
+	 * If dev is an usb-bus, then we are called from usb_scan_device() for
+	 * an usb-device plugged directly into the root port, return NULL.
+	 */
+	if (device_get_uclass_id(udev->dev) == UCLASS_USB)
+		return NULL;
+
+	/*
+	 * If these 2 are not the same we are being called from
+	 * usb_scan_device() and udev itself is the parent.
+	 */
+	if (dev_get_parent_priv(udev->dev) != udev)
+		return udev;
+
+	/* We are being called normally, use the parent pointer */
+	if (device_get_uclass_id(parent) == UCLASS_USB_HUB)
+		return dev_get_parent_priv(parent);
+
+	return NULL;
+}
 
 static void get_hub_data(struct usb_device *dev, u16 *hub_devnum, u16 *hubport)
 {
-	int i;
+	struct usb_device *parent = usb_dev_get_parent(dev);
 
 	*hub_devnum = 0;
 	*hubport = 0;
 
 	/* check a device connected to root_hub */
-	if ((dev->parent && dev->parent->devnum == 1) ||
+	if ((parent && parent->devnum == 1) ||
 	    (dev->devnum == 1))
 		return;
 
-	for (i = 0; i < USB_MAXCHILDREN; i++) {
-		if (dev->parent->children[i] == dev) {
-			*hub_devnum = (u8)dev->parent->devnum;
-			*hubport = i;
-			return;
-		}
-	}
-
-	printf("get_hub_data error.\n");
+	*hub_devnum = (u8)parent->devnum;
+	*hubport = parent->portnr - 1;
 }
 
 static void set_devadd(struct r8a66597 *r8a66597, u8 r8a66597_address,
@@ -539,10 +560,11 @@ static int check_usb_device_connecting(struct r8a66597 *r8a66597)
 
 #include <usbroothubdes.h>
 
-static int r8a66597_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
-			void *buffer, int transfer_len, struct devrequest *cmd)
+static int r8a66597_submit_rh_msg(struct udevice *udev, struct usb_device *dev,
+				  unsigned long pipe, void *buffer,
+				  int transfer_len, struct devrequest *cmd)
 {
-	struct r8a66597 *r8a66597 = &gr8a66597;
+	struct r8a66597 *r8a66597 = dev_get_priv(udev);
 	int leni = transfer_len;
 	int len = 0;
 	int stat = 0;
@@ -610,7 +632,7 @@ static int r8a66597_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
 		}
 		break;
 	case RH_SET_ADDRESS:
-		gr8a66597.rh_devnum = wValue;
+		r8a66597->rh_devnum = wValue;
 		break;
 	case RH_GET_DESCRIPTOR:
 		switch ((wValue & 0xff00) >> 8) {
@@ -706,50 +728,21 @@ static int r8a66597_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
 	return stat;
 }
 
-int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
-		    int transfer_len)
+static int r8a66597_submit_control_msg(struct udevice *udev, struct usb_device *dev,
+				   unsigned long pipe, void *buffer, int length,
+				   struct devrequest *setup)
 {
-	struct r8a66597 *r8a66597 = &gr8a66597;
-	int ret = 0;
-
-	R8A66597_DPRINT("%s\n", __func__);
-	R8A66597_DPRINT("pipe = %08x, buffer = %p, len = %d, devnum = %d\n",
-			pipe, buffer, transfer_len, dev->devnum);
-
-	set_devadd(r8a66597, dev->devnum, dev, 0);
-
-	pipe_buffer_setting(r8a66597, dev, pipe);
-
-	dev->act_len = 0;
-	while (dev->act_len < transfer_len && ret == 0) {
-		if (ctrlc())
-			return -1;
-
-		if (usb_pipein(pipe))
-			ret = receive_bulk_packet(r8a66597, dev, pipe, buffer,
-							transfer_len);
-		else
-			ret = send_bulk_packet(r8a66597, dev, pipe, buffer,
-							transfer_len);
-	}
-
-	if (ret == 0)
-		dev->status = 0;
-
-	return ret;
-}
-
-int submit_control_msg(struct usb_device *dev, unsigned long pipe,
-		       void *buffer, int transfer_len, struct devrequest *setup)
-{
-	struct r8a66597 *r8a66597 = &gr8a66597;
+	struct r8a66597 *r8a66597 = dev_get_priv(udev);
 	u16 r8a66597_address = setup->request == USB_REQ_SET_ADDRESS ?
 					0 : dev->devnum;
 
+	debug("%s: dev='%s', udev=%p, udev->dev='%s', portnr=%d\n", __func__,
+	      udev->name, dev, dev->dev->name, dev->portnr);
+
 	R8A66597_DPRINT("%s\n", __func__);
 	if (usb_pipedevice(pipe) == r8a66597->rh_devnum)
-		return r8a66597_submit_rh_msg(dev, pipe, buffer, transfer_len,
-						setup);
+		return r8a66597_submit_rh_msg(udev, dev, pipe, buffer,
+					      length, setup);
 
 	R8A66597_DPRINT("%s: setup\n", __func__);
 	set_devadd(r8a66597, r8a66597_address, dev, 0);
@@ -762,7 +755,7 @@ int submit_control_msg(struct usb_device *dev, unsigned long pipe,
 	dev->act_len = 0;
 	if (usb_pipein(pipe))
 		if (receive_control_packet(r8a66597, dev, buffer,
-						transfer_len) < 0)
+						length) < 0)
 			return -1;
 
 	if (send_status_packet(r8a66597, pipe) < 0)
@@ -773,40 +766,102 @@ int submit_control_msg(struct usb_device *dev, unsigned long pipe,
 	return 0;
 }
 
-int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
-			int transfer_len, int interval)
+static int r8a66597_submit_bulk_msg(struct udevice *udev, struct usb_device *dev,
+				unsigned long pipe, void *buffer, int length)
 {
-	/* no implement */
+	struct r8a66597 *r8a66597 = dev_get_priv(udev);
+	int ret = 0;
+
+	debug("%s: dev='%s', udev=%p\n", __func__, udev->name, dev);
+
 	R8A66597_DPRINT("%s\n", __func__);
-	return 0;
+	R8A66597_DPRINT("pipe = %08x, buffer = %p, len = %d, devnum = %d\n",
+			pipe, buffer, length, dev->devnum);
+
+	set_devadd(r8a66597, dev->devnum, dev, 0);
+
+	pipe_buffer_setting(r8a66597, dev, pipe);
+
+	dev->act_len = 0;
+	while (dev->act_len < length && ret == 0) {
+		if (ctrlc())
+			return -1;
+
+		if (usb_pipein(pipe))
+			ret = receive_bulk_packet(r8a66597, dev, pipe, buffer,
+							length);
+		else
+			ret = send_bulk_packet(r8a66597, dev, pipe, buffer,
+							length);
+	}
+
+	if (ret == 0)
+		dev->status = 0;
+
+	return ret;
 }
 
-int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
+static int r8a66597_usb_ofdata_to_platdata(struct udevice *dev)
 {
-	struct r8a66597 *r8a66597 = &gr8a66597;
+	struct r8a66597 *priv = dev_get_priv(dev);
+	fdt_addr_t addr;
 
-	R8A66597_DPRINT("%s\n", __func__);
+	addr = dev_read_addr(dev);
+	if (addr == FDT_ADDR_T_NONE)
+		return -EINVAL;
+	priv->reg = addr;
 
-	memset(r8a66597, 0, sizeof(*r8a66597));
-	r8a66597->reg = CONFIG_R8A66597_BASE_ADDR;
+	return 0;
+}
 
-	disable_controller(r8a66597);
+static int r8a66597_usb_probe(struct udevice *dev)
+{
+	struct r8a66597 *priv = dev_get_priv(dev);
+	struct usb_bus_priv *bus_priv = dev_get_uclass_priv(dev);
+
+	bus_priv->desc_before_addr = true;
+
+	disable_controller(priv);
 	mdelay(100);
 
-	enable_controller(r8a66597);
-	r8a66597_port_power(r8a66597, 0 , 1);
+	enable_controller(priv);
+	r8a66597_port_power(priv, 0 , 1);
 
 	/* check usb device */
-	check_usb_device_connecting(r8a66597);
+	check_usb_device_connecting(priv);
 
 	mdelay(50);
 
 	return 0;
 }
 
-int usb_lowlevel_stop(int index)
+static int r8a66597_usb_remove(struct udevice *dev)
 {
-	disable_controller(&gr8a66597);
+	struct r8a66597 *priv = dev_get_priv(dev);
+
+	disable_controller(priv);
 
 	return 0;
 }
+
+struct dm_usb_ops r8a66597_usb_ops = {
+	.control = r8a66597_submit_control_msg,
+	.bulk = r8a66597_submit_bulk_msg,
+};
+
+static const struct udevice_id r8a66597_usb_ids[] = {
+	{ .compatible = "renesas,rza1-usbhs" },
+	{ }
+};
+
+U_BOOT_DRIVER(usb_r8a66597) = {
+	.name	= "r8a66597_usb",
+	.id	= UCLASS_USB,
+	.of_match = r8a66597_usb_ids,
+	.ofdata_to_platdata = r8a66597_usb_ofdata_to_platdata,
+	.probe	= r8a66597_usb_probe,
+	.remove = r8a66597_usb_remove,
+	.ops	= &r8a66597_usb_ops,
+	.priv_auto_alloc_size = sizeof(struct r8a66597),
+	.flags	= DM_FLAG_ALLOC_PRIV_DMA,
+};

commit f6833e50d972a1299b99d2822659eb6c70dabcb2
Author: Marek Vasut <marek.vasut+renesas@gmail.com>
Date:   Sun Aug 11 13:23:11 2019 +0200

    UPSTREAM: usb: r8a66597: Remove BE support
    
    While the USB controller can work both in LE and BE modes, there is
    no user for the BE mode, so drop it. If there ever is a user for it,
    it can be easily re-added back.
    
    Change-Id: Icbafe9f751113a669c5322af618bcc27bf20ac75
    Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
    Cc: Chris Brandt <chris.brandt@renesas.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 81644e01c02967edd3da7eb6c776478a34fa7370)

diff --git a/drivers/usb/host/r8a66597-hcd.c b/drivers/usb/host/r8a66597-hcd.c
index 2655671d6a..8ed99e75ff 100644
--- a/drivers/usb/host/r8a66597-hcd.c
+++ b/drivers/usb/host/r8a66597-hcd.c
@@ -140,9 +140,9 @@ static int enable_controller(struct r8a66597 *r8a66597)
 	for (port = 0; port < R8A66597_MAX_ROOT_HUB; port++)
 		r8a66597_write(r8a66597, 0, get_intenb_reg(port));
 
-	r8a66597_bset(r8a66597, CONFIG_R8A66597_ENDIAN & BIGEND, CFIFOSEL);
-	r8a66597_bset(r8a66597, CONFIG_R8A66597_ENDIAN & BIGEND, D0FIFOSEL);
-	r8a66597_bset(r8a66597, CONFIG_R8A66597_ENDIAN & BIGEND, D1FIFOSEL);
+	r8a66597_bclr(r8a66597, BIGEND, CFIFOSEL);
+	r8a66597_bclr(r8a66597, BIGEND, D0FIFOSEL);
+	r8a66597_bclr(r8a66597, BIGEND, D1FIFOSEL);
 	r8a66597_bset(r8a66597, TRNENSEL, SOFCFG);
 
 	for (port = 0; port < R8A66597_MAX_ROOT_HUB; port++)

commit 1dc8df6a64225ea0bafb7a88c2a64b7d2e6356b0
Author: Marek Vasut <marek.vasut+renesas@gmail.com>
Date:   Sun Aug 11 13:20:12 2019 +0200

    UPSTREAM: usb: r8a66597: Replace IO accessors
    
    Replace in{bwl}()/out{bwl}() IO accessors with read{bwl}()/write{bwl}(),
    to make the driver compile both on SH and ARM.
    
    Change-Id: I5fc72a93b162d7473a3717a07bfdcd88fe455ec5
    Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
    Cc: Chris Brandt <chris.brandt@renesas.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 4c9a135715ad80ec10a9e642d35e3bbf1535fe56)

diff --git a/drivers/usb/host/r8a66597.h b/drivers/usb/host/r8a66597.h
index 9f7ad682b5..29a25c51e8 100644
--- a/drivers/usb/host/r8a66597.h
+++ b/drivers/usb/host/r8a66597.h
@@ -403,7 +403,7 @@ struct r8a66597 {
 
 static inline u16 r8a66597_read(struct r8a66597 *r8a66597, unsigned long offset)
 {
-	return inw(r8a66597->reg + offset);
+	return readw(r8a66597->reg + offset);
 }
 
 static inline void r8a66597_read_fifo(struct r8a66597 *r8a66597,
@@ -417,10 +417,10 @@ static inline void r8a66597_read_fifo(struct r8a66597 *r8a66597,
 
 	count = len / 4;
 	for (i = 0; i < count; i++)
-		p[i] = inl(r8a66597->reg + offset);
+		p[i] = readl(r8a66597->reg + offset);
 
 	if (len & 0x00000003) {
-		unsigned long tmp = inl(fifoaddr);
+		unsigned long tmp = readl(fifoaddr);
 		memcpy((unsigned char *)buf + count * 4, &tmp, len & 0x03);
 	}
 }
@@ -428,7 +428,7 @@ static inline void r8a66597_read_fifo(struct r8a66597 *r8a66597,
 static inline void r8a66597_write(struct r8a66597 *r8a66597, u16 val,
 				  unsigned long offset)
 {
-	outw(val, r8a66597->reg + offset);
+	writew(val, r8a66597->reg + offset);
 }
 
 static inline void r8a66597_write_fifo(struct r8a66597 *r8a66597,
@@ -443,15 +443,15 @@ static inline void r8a66597_write_fifo(struct r8a66597 *r8a66597,
 
 	count = len / 4;
 	for (i = 0; i < count; i++)
-		outl(p[i], fifoaddr);
+		writel(p[i], fifoaddr);
 
 	if (len & 0x00000003) {
 		pb = (unsigned char *)buf + count * 4;
 		for (i = 0; i < (len & 0x00000003); i++) {
 			if (r8a66597_read(r8a66597, CFIFOSEL) & BIGEND)
-				outb(pb[i], fifoaddr + i);
+				writeb(pb[i], fifoaddr + i);
 			else
-				outb(pb[i], fifoaddr + 3 - i);
+				writeb(pb[i], fifoaddr + 3 - i);
 		}
 	}
 }

commit 7a9643b134e44dd0fe0741506ae12b45aad186ac
Author: Marek Vasut <marek.vasut+renesas@gmail.com>
Date:   Sun Aug 11 12:21:08 2019 +0200

    UPSTREAM: usb: r8a66597: Make CONFIG_RZA_USB default
    
    No other platforms use this r8a66597 controller but RZ/A1,
    make RZ/A1 support the default and drop all the other SoC
    support to remove ifdeffery.
    
    Change-Id: I15bd3497d23c34c6cd43c849f09ec3904ec898da
    Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
    Cc: Chris Brandt <chris.brandt@renesas.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 3ff134b7f1c06f8482ef8ab296d5a89743d219db)

diff --git a/drivers/usb/host/r8a66597-hcd.c b/drivers/usb/host/r8a66597-hcd.c
index 187265a2cd..2655671d6a 100644
--- a/drivers/usb/host/r8a66597-hcd.c
+++ b/drivers/usb/host/r8a66597-hcd.c
@@ -71,20 +71,6 @@ static int r8a66597_clock_enable(struct r8a66597 *r8a66597)
 		}
 	} while ((tmp & USBE) != USBE);
 	r8a66597_bclr(r8a66597, USBE, SYSCFG0);
-#if !defined(CONFIG_RZA_USB)
-	r8a66597_mdfy(r8a66597, CONFIG_R8A66597_XTAL, XTAL, SYSCFG0);
-
-	i = 0;
-	r8a66597_bset(r8a66597, XCKE, SYSCFG0);
-	do {
-		udelay(1000);
-		tmp = r8a66597_read(r8a66597, SYSCFG0);
-		if (i++ > 500) {
-			printf("register access fail.\n");
-			return -1;
-		}
-	} while ((tmp & SCKE) != SCKE);
-#else
 	/*
 	 * RZ/A Only:
 	 * Bits XTAL(UCKSEL) and UPLLE in SYSCFG0 for USB0 controls both USB0
@@ -97,28 +83,18 @@ static int r8a66597_clock_enable(struct r8a66597 *r8a66597)
 	setbits(le16, R8A66597_BASE0, UPLLE);
 	mdelay(1);
 	r8a66597_bset(r8a66597, SUSPM, SUSPMODE0);
-#endif /* CONFIG_RZA_USB */
 
 	return 0;
 }
 
 static void r8a66597_clock_disable(struct r8a66597 *r8a66597)
 {
-#if !defined(CONFIG_RZA_USB)
-	r8a66597_bclr(r8a66597, SCKE, SYSCFG0);
-	udelay(1);
-	r8a66597_bclr(r8a66597, PLLC, SYSCFG0);
-	r8a66597_bclr(r8a66597, XCKE, SYSCFG0);
-	r8a66597_bclr(r8a66597, USBE, SYSCFG0);
-#else
 	r8a66597_bclr(r8a66597, SUSPM, SUSPMODE0);
 
 	clrbits(le16, R8A66597_BASE0, UPLLE);
 	mdelay(1);
 	r8a66597_bclr(r8a66597, USBE, SYSCFG0);
 	mdelay(1);
-
-#endif
 }
 
 static void r8a66597_enable_port(struct r8a66597 *r8a66597, int port)
@@ -128,10 +104,6 @@ static void r8a66597_enable_port(struct r8a66597 *r8a66597, int port)
 	val = port ? DRPD : DCFM | DRPD;
 	r8a66597_bset(r8a66597, val, get_syscfg_reg(port));
 	r8a66597_bset(r8a66597, HSE, get_syscfg_reg(port));
-
-#if !defined(CONFIG_RZA_USB)
-	r8a66597_write(r8a66597, BURST | CPU_ADR_RD_WR, get_dmacfg_reg(port));
-#endif
 }
 
 static void r8a66597_disable_port(struct r8a66597 *r8a66597, int port)
@@ -161,9 +133,6 @@ static int enable_controller(struct r8a66597 *r8a66597)
 	if (ret < 0)
 		return ret;
 
-#if !defined(CONFIG_RZA_USB)
-	r8a66597_bset(r8a66597, CONFIG_R8A66597_LDRV & LDRV, PINCFG);
-#endif
 	r8a66597_bset(r8a66597, USBE, SYSCFG0);
 
 	r8a66597_bset(r8a66597, INTL, SOFCFG);
@@ -281,16 +250,13 @@ static int send_setup_packet(struct r8a66597 *r8a66597, struct usb_device *dev,
 	unsigned long setup_addr = USBREQ;
 	u16 intsts1;
 	int timeout = 3000;
-#if defined(CONFIG_RZA_USB)
 	u16 dcpctr;
-#endif
 	u16 devsel = setup->request == USB_REQ_SET_ADDRESS ? 0 : dev->devnum;
 
 	r8a66597_write(r8a66597, make_devsel(devsel) |
 				 (8 << dev->maxpacketsize), DCPMAXP);
 	r8a66597_write(r8a66597, ~(SIGN | SACK), INTSTS1);
 
-#if defined(CONFIG_RZA_USB)
 	dcpctr = r8a66597_read(r8a66597, DCPCTR);
 	if ((dcpctr & PID) == PID_BUF) {
 		if (readw_poll_timeout(r8a66597->reg + DCPCTR, dcpctr,
@@ -299,7 +265,6 @@ static int send_setup_packet(struct r8a66597 *r8a66597, struct usb_device *dev,
 			return -ETIMEDOUT;
 		}
 	}
-#endif
 
 	for (i = 0; i < 4; i++) {
 		r8a66597_write(r8a66597, le16_to_cpu(p[i]), setup_addr);
diff --git a/drivers/usb/host/r8a66597.h b/drivers/usb/host/r8a66597.h
index e20fd7e029..9f7ad682b5 100644
--- a/drivers/usb/host/r8a66597.h
+++ b/drivers/usb/host/r8a66597.h
@@ -90,27 +90,14 @@
 #define SUSPMODE0	0x102	/* RZ/A only */
 
 /* System Configuration Control Register */
-#if !defined(CONFIG_RZA_USB)
-#define	XTAL		0xC000	/* b15-14: Crystal selection */
-#define	  XTAL48	 0x8000	  /* 48MHz */
-#define	  XTAL24	 0x4000	  /* 24MHz */
-#define	  XTAL12	 0x0000	  /* 12MHz */
-#define	XCKE		0x2000	/* b13: External clock enable */
-#define	PLLC		0x0800	/* b11: PLL control */
-#define	SCKE		0x0400	/* b10: USB clock enable */
-#define	PCSDIS		0x0200	/* b9: not CS wakeup */
-#define	LPSME		0x0100	/* b8: Low power sleep mode */
-#endif
 #define	HSE		0x0080	/* b7: Hi-speed enable */
 #define	DCFM		0x0040	/* b6: Controller function select  */
 #define	DRPD		0x0020	/* b5: D+/- pull down control */
 #define	DPRPU		0x0010	/* b4: D+ pull up control */
-#if defined(CONFIG_RZA_USB)
 #define	XTAL		0x0004	/* b2: Crystal selection */
 #define	  XTAL12	 0x0004	  /* 12MHz */
 #define	  XTAL48	 0x0000	  /* 48MHz */
 #define	UPLLE		0x0002	/* b1: internal PLL control */
-#endif
 #define	USBE		0x0001	/* b0: USB module operation enable */
 
 /* System Configuration Status Register */
@@ -179,11 +166,7 @@
 #define	REW		0x4000	/* b14: Buffer rewind */
 #define	DCLRM		0x2000	/* b13: DMA buffer clear mode */
 #define	DREQE		0x1000	/* b12: DREQ output enable */
-#if !defined(CONFIG_RZA_USB)
-#define	MBW		0x0400	/* b10: Maximum bit width for FIFO access */
-#else
 #define	MBW		0x0800	/* b10: Maximum bit width for FIFO access */
-#endif
 #define	  MBW_8		 0x0000	  /*  8bit */
 #define	  MBW_16	 0x0400	  /* 16bit */
 #define	  MBW_32	 0x0800   /* 32bit */
@@ -428,7 +411,6 @@ static inline void r8a66597_read_fifo(struct r8a66597 *r8a66597,
 				      int len)
 {
 	int i;
-#if defined(CONFIG_RZA_USB)
 	unsigned long fifoaddr = r8a66597->reg + offset;
 	unsigned long count;
 	unsigned long *p = buf;
@@ -441,13 +423,6 @@ static inline void r8a66597_read_fifo(struct r8a66597 *r8a66597,
 		unsigned long tmp = inl(fifoaddr);
 		memcpy((unsigned char *)buf + count * 4, &tmp, len & 0x03);
 	}
-#else
-	unsigned short *p = buf;
-
-	len = (len + 1) / 2;
-	for (i = 0; i < len; i++)
-		p[i] = inw(r8a66597->reg + offset);
-#endif
 }
 
 static inline void r8a66597_write(struct r8a66597 *r8a66597, u16 val,
@@ -462,7 +437,6 @@ static inline void r8a66597_write_fifo(struct r8a66597 *r8a66597,
 {
 	int i;
 	unsigned long fifoaddr = r8a66597->reg + offset;
-#if defined(CONFIG_RZA_USB)
 	unsigned long count;
 	unsigned char *pb;
 	unsigned long *p = buf;
@@ -480,19 +454,6 @@ static inline void r8a66597_write_fifo(struct r8a66597 *r8a66597,
 				outb(pb[i], fifoaddr + 3 - i);
 		}
 	}
-#else
-	int odd = len & 0x0001;
-	unsigned short *p = buf;
-
-	len = len / 2;
-	for (i = 0; i < len; i++)
-		outw(p[i], fifoaddr);
-
-	if (odd) {
-		unsigned char *pb = (unsigned char *)(buf + len);
-		outb(*pb, fifoaddr);
-	}
-#endif
 }
 
 static inline void r8a66597_mdfy(struct r8a66597 *r8a66597,

commit 5899aea64a9f99e67c24e51f4f143dc91f19dd73
Author: Marek Vasut <marek.vasut+renesas@gmail.com>
Date:   Sun Aug 11 12:18:44 2019 +0200

    UPSTREAM: usb: r8a66597: Remove CONFIG_SUPERH_ON_CHIP_R8A66597
    
    Remove CONFIG_SUPERH_ON_CHIP_R8A66597 macro, which is unused.
    
    Change-Id: I27a8ff1b6487ebc2db6ce50fa2b034030e84f156
    Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
    Cc: Chris Brandt <chris.brandt@renesas.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 0b80f212824f632f1acb0d74fd932c05a0262fc3)

diff --git a/drivers/usb/host/r8a66597-hcd.c b/drivers/usb/host/r8a66597-hcd.c
index 9dbb18343a..187265a2cd 100644
--- a/drivers/usb/host/r8a66597-hcd.c
+++ b/drivers/usb/host/r8a66597-hcd.c
@@ -62,17 +62,6 @@ static int r8a66597_clock_enable(struct r8a66597 *r8a66597)
 	u16 tmp;
 	int i = 0;
 
-#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597)
-	do {
-		r8a66597_write(r8a66597, SCKE, SYSCFG0);
-		tmp = r8a66597_read(r8a66597, SYSCFG0);
-		if (i++ > 1000) {
-			printf("register access fail.\n");
-			return -1;
-		}
-	} while ((tmp & SCKE) != SCKE);
-	r8a66597_write(r8a66597, 0x04, 0x02);
-#else
 	do {
 		r8a66597_write(r8a66597, USBE, SYSCFG0);
 		tmp = r8a66597_read(r8a66597, SYSCFG0);
@@ -109,7 +98,6 @@ static int r8a66597_clock_enable(struct r8a66597 *r8a66597)
 	mdelay(1);
 	r8a66597_bset(r8a66597, SUSPM, SUSPMODE0);
 #endif /* CONFIG_RZA_USB */
-#endif	/* #if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) */
 
 	return 0;
 }
@@ -119,11 +107,9 @@ static void r8a66597_clock_disable(struct r8a66597 *r8a66597)
 #if !defined(CONFIG_RZA_USB)
 	r8a66597_bclr(r8a66597, SCKE, SYSCFG0);
 	udelay(1);
-#if !defined(CONFIG_SUPERH_ON_CHIP_R8A66597)
 	r8a66597_bclr(r8a66597, PLLC, SYSCFG0);
 	r8a66597_bclr(r8a66597, XCKE, SYSCFG0);
 	r8a66597_bclr(r8a66597, USBE, SYSCFG0);
-#endif
 #else
 	r8a66597_bclr(r8a66597, SUSPM, SUSPMODE0);
 
diff --git a/drivers/usb/host/r8a66597.h b/drivers/usb/host/r8a66597.h
index baa16605d8..e20fd7e029 100644
--- a/drivers/usb/host/r8a66597.h
+++ b/drivers/usb/host/r8a66597.h
@@ -179,15 +179,11 @@
 #define	REW		0x4000	/* b14: Buffer rewind */
 #define	DCLRM		0x2000	/* b13: DMA buffer clear mode */
 #define	DREQE		0x1000	/* b12: DREQ output enable */
-#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597)
-#define	MBW		0x0800
-#else
 #if !defined(CONFIG_RZA_USB)
 #define	MBW		0x0400	/* b10: Maximum bit width for FIFO access */
 #else
 #define	MBW		0x0800	/* b10: Maximum bit width for FIFO access */
 #endif
-#endif
 #define	  MBW_8		 0x0000	  /*  8bit */
 #define	  MBW_16	 0x0400	  /* 16bit */
 #define	  MBW_32	 0x0800   /* 32bit */
@@ -399,11 +395,7 @@
 #define R8A66597_MAX_NUM_PIPE		10
 #define R8A66597_BUF_BSIZE		8
 #define R8A66597_MAX_DEVICE		10
-#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597)
-#define R8A66597_MAX_ROOT_HUB		1
-#else
 #define R8A66597_MAX_ROOT_HUB		2
-#endif
 #define R8A66597_MAX_SAMPLING		5
 #define R8A66597_RH_POLL_TIME		10
 
@@ -436,7 +428,7 @@ static inline void r8a66597_read_fifo(struct r8a66597 *r8a66597,
 				      int len)
 {
 	int i;
-#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) || defined(CONFIG_RZA_USB)
+#if defined(CONFIG_RZA_USB)
 	unsigned long fifoaddr = r8a66597->reg + offset;
 	unsigned long count;
 	unsigned long *p = buf;
@@ -470,7 +462,7 @@ static inline void r8a66597_write_fifo(struct r8a66597 *r8a66597,
 {
 	int i;
 	unsigned long fifoaddr = r8a66597->reg + offset;
-#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) || defined(CONFIG_RZA_USB)
+#if defined(CONFIG_RZA_USB)
 	unsigned long count;
 	unsigned char *pb;
 	unsigned long *p = buf;

commit 2b5fff1c93bdef7a3c2f9314b3fcfd50eb3712fb
Author: Ralph Siemsen <ralph.siemsen@linaro.org>
Date:   Fri Jun 28 10:42:02 2019 -0400

    UPSTREAM: usb: gadget: f_dfu.c: fix memory leak
    
    dfu_prepare_function() allocates N+1 descriptor header structures,
    the last one being the "DFU Functional Descriptor".
    
    dfu_unbind() handles de-allocation, but fails to free the final
    one (eg. "DFU Functional Descriptor"), leading to memory leak.
    
    Fixed by incrementing counter, as in dfu_prepare_function().
    
    Change-Id: I990f3874d6e3dca78036d6f30a05e765fbe38c67
    Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit fe876984a428cc0058bdb536ac948397762f3c0d)

diff --git a/drivers/usb/gadget/f_dfu.c b/drivers/usb/gadget/f_dfu.c
index bc4be712da..f811a30be5 100644
--- a/drivers/usb/gadget/f_dfu.c
+++ b/drivers/usb/gadget/f_dfu.c
@@ -749,6 +749,7 @@ static void dfu_unbind(struct usb_configuration *c, struct usb_function *f)
 
 	if (f_dfu->function) {
 		i = alt_num;
+		i++; /* free DFU Functional Descriptor */
 		while (i) {
 			free(f_dfu->function[--i]);
 			f_dfu->function[i] = NULL;

commit 384b75a5e86ab3d1b12d77c8d59d029efb385cce
Author: Heiko Schocher <hs@denx.de>
Date:   Tue Jul 16 10:49:07 2019 +0200

    UPSTREAM: usb, ohci, pci: add DM support for PCI-based OHCI USB controller
    
    add new DM based PCI driver ohci-pci for PCI-based
    OHCI USB support.
    
    Change-Id: Ie3cb7e552e48eb100cdfc2f7807136297b5563cb
    Signed-off-by: Heiko Schocher <hs@denx.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 991e66017ccd79cf4b89a729433a9606a771bd2b)

diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index d1280ec9cb..1a3969e434 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -201,6 +201,13 @@ config USB_OHCI_HCD
 	  based system where you're not sure, the "lspci -v" entry will list the
 	  right "prog-if" for your USB controller(s):  EHCI, OHCI, or UHCI.
 
+config USB_OHCI_PCI
+	bool "Support for PCI-based OHCI USB controller"
+	depends on DM_USB
+	default n
+	help
+	  Enables support for the PCI-based OHCI controller.
+
 if USB_OHCI_HCD
 
 config USB_OHCI_GENERIC
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 2e1ab6c228..24306f4a77 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -18,6 +18,7 @@ obj-$(CONFIG_USB_R8A66597_HCD) += r8a66597-hcd.o
 obj-$(CONFIG_USB_SL811HS) += sl811-hcd.o
 obj-$(CONFIG_USB_OHCI_EP93XX) += ohci-ep93xx.o
 obj-$(CONFIG_USB_OHCI_LPC32XX) += ohci-lpc32xx.o
+obj-$(CONFIG_USB_OHCI_PCI) += ohci-pci.o
 obj-$(CONFIG_USB_OHCI_GENERIC) += ohci-generic.o
 
 # echi
diff --git a/drivers/usb/host/ohci-pci.c b/drivers/usb/host/ohci-pci.c
new file mode 100644
index 0000000000..4c1c778672
--- /dev/null
+++ b/drivers/usb/host/ohci-pci.c
@@ -0,0 +1,52 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019
+ * Heiko Schocher, DENX Software Engineering, hs@denx.de.
+ *
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <pci.h>
+#include <usb.h>
+#include <asm/io.h>
+
+#include "ohci.h"
+
+static int ohci_pci_probe(struct udevice *dev)
+{
+	struct ohci_regs *regs;
+
+	regs = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_0, PCI_REGION_MEM);
+	return ohci_register(dev, regs);
+}
+
+static int ohci_pci_remove(struct udevice *dev)
+{
+	return ohci_deregister(dev);
+}
+
+static const struct udevice_id ohci_pci_ids[] = {
+	{ .compatible = "ohci-pci" },
+	{ }
+};
+
+U_BOOT_DRIVER(ohci_pci) = {
+	.name	= "ohci_pci",
+	.id	= UCLASS_USB,
+	.probe = ohci_pci_probe,
+	.remove = ohci_pci_remove,
+	.of_match = ohci_pci_ids,
+	.ops	= &ohci_usb_ops,
+	.platdata_auto_alloc_size = sizeof(struct usb_platdata),
+	.priv_auto_alloc_size = sizeof(ohci_t),
+	.flags	= DM_FLAG_ALLOC_PRIV_DMA,
+};
+
+static struct pci_device_id ohci_pci_supported[] = {
+	{ PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_OHCI, ~0) },
+	{},
+};
+
+U_BOOT_PCI_DEVICE(ohci_pci, ohci_pci_supported);

commit 53764d8fd5ceb85545c97261c9274b0e14a72fe3
Author: Heiko Schocher <hs@denx.de>
Date:   Tue Jul 16 10:49:06 2019 +0200

    UPSTREAM: usb, ohci: add warning if none on pci found
    
    Change-Id: I7e7a39a7d3ff257381a63a6bc07f86d1fa16a159
    Signed-off-by: Heiko Schocher <hs@denx.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit f9c7fecbeb938d9a17e31bf7c8766190752790ae)

diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c
index d85328e619..ed5e3f8d12 100644
--- a/drivers/usb/host/ohci-hcd.c
+++ b/drivers/usb/host/ohci-hcd.c
@@ -2048,8 +2048,11 @@ int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
 		pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base);
 		printf("OHCI regs address 0x%08x\n", base);
 		gohci.regs = (struct ohci_regs *)base;
-	} else
+	} else {
+		printf("%s: OHCI devnr: %d not found\n", __func__,
+		       CONFIG_PCI_OHCI_DEVNO);
 		return -1;
+	}
 #else
 	gohci.regs = (struct ohci_regs *)CONFIG_SYS_USB_OHCI_REGS_BASE;
 #endif

commit 55f7a84eaaa47020ea2a6964e5240ffd591b73c9
Author: Heiko Schocher <hs@denx.de>
Date:   Tue Jul 16 10:49:05 2019 +0200

    UPSTREAM: usb, ohci-hcd: set OHCI_USE_NPS if DM_PCI
    
    set OHCI_USE_NPS if DM_PCI is enabled.
    
    Change-Id: I75001b7d3c9efdcd448d089ee0e99019a35d9d31
    Signed-off-by: Heiko Schocher <hs@denx.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit dc4e48d845d9971d2b21f99c12f874dd06cedc0a)

diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c
index 8156993a7b..d85328e619 100644
--- a/drivers/usb/host/ohci-hcd.c
+++ b/drivers/usb/host/ohci-hcd.c
@@ -51,8 +51,9 @@
 #endif
 
 #if defined(CONFIG_CPU_ARM920T) || \
-    defined(CONFIG_PCI_OHCI) || \
-    defined(CONFIG_SYS_OHCI_USE_NPS)
+	defined(CONFIG_PCI_OHCI) || \
+	defined(CONFIG_DM_PCI) || \
+	defined(CONFIG_SYS_OHCI_USE_NPS)
 # define OHCI_USE_NPS		/* force NoPowerSwitching mode */
 #endif
 

commit 27242ba8ac8dc1623b551cfb1db1132ba25aa7e7
Author: Heiko Schocher <hs@denx.de>
Date:   Tue Jul 16 10:49:04 2019 +0200

    UPSTREAM: usb, ohci: fix ohci swap register access
    
    commit 57faca19a82f ("drivers: USB: OHCI: allow compilation for 64-bit targets")
    broke ohci support for the mpc85xx based socrates board,
    as it removed volatile keyword from ohci_readl/writel.
    
    Fix this so usb works again on socrates board.
    
    Change-Id: I558791c276aa1641dd735b825ba93f8da8ed0830
    Signed-off-by: Heiko Schocher <hs@denx.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit a5a7486e62b0aa4afa1fe1a3b30f7dd682eb1ff8)

diff --git a/drivers/usb/host/ohci.h b/drivers/usb/host/ohci.h
index 3a62d769eb..889b4f4a87 100644
--- a/drivers/usb/host/ohci.h
+++ b/drivers/usb/host/ohci.h
@@ -14,8 +14,8 @@
 #include <asm/io.h>
 
 #ifdef CONFIG_SYS_OHCI_SWAP_REG_ACCESS
-# define ohci_readl(a) __swap_32(readl(a))
-# define ohci_writel(v, a) writel(__swap_32(v), a)
+# define ohci_readl(a) __swap_32(in_be32((u32 *)a))
+# define ohci_writel(a, b) out_be32((u32 *)b, __swap_32(a))
 #else
 # define ohci_readl(a) readl(a)
 # define ohci_writel(v, a) writel(v, a)

commit da2bd437b796b2673ca5246dd6c6adbf97a7359a
Author: Heiko Schocher <hs@denx.de>
Date:   Tue Jul 16 10:49:03 2019 +0200

    UPSTREAM: usb, ohci-hdc: fix warning 'ohci_pci_ids' defined but not used
    
    var ohci_pci_ids is only used if DM_USB is not enabled.
    So define this varaible only if
    !CONFIG_IS_ENABLED(DM_USB)
    
    Change-Id: I2da8e2b51cd2f225e7b452bf5bb0179a2d1e4ee4
    Signed-off-by: Heiko Schocher <hs@denx.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit b005d7d5f96539450e50450f12491913e135c2a9)

diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c
index 721efec115..8156993a7b 100644
--- a/drivers/usb/host/ohci-hcd.c
+++ b/drivers/usb/host/ohci-hcd.c
@@ -65,6 +65,7 @@
 #define OHCI_CONTROL_INIT \
 	(OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
 
+#if !CONFIG_IS_ENABLED(DM_USB)
 #ifdef CONFIG_PCI_OHCI
 static struct pci_device_id ohci_pci_ids[] = {
 	{0x10b9, 0x5237},	/* ULI1575 PCI OHCI module ids */
@@ -74,6 +75,7 @@ static struct pci_device_id ohci_pci_ids[] = {
 	{0, 0}
 };
 #endif
+#endif
 
 #ifdef CONFIG_PCI_EHCI_DEVNO
 static struct pci_device_id ehci_pci_ids[] = {

commit 3e620e502c09c21ce7d6de4ee9f1306a470d8d33
Author: Adam Ford <aford173@gmail.com>
Date:   Wed Jul 10 13:59:10 2019 -0500

    UPSTREAM: usb: musb-new: Add support for da8xx-musb
    
    With the recently added phy driver, this patch will enable the
    musb driver on the da8xx to operate in host mode.
    
    Change-Id: I31da15be4324f43429fddf31323ff9fc648425ae
    Signed-off-by: Adam Ford <aford173@gmail.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 5608331d813630120871d04847b59628ec59f7f9)

diff --git a/drivers/usb/musb-new/Kconfig b/drivers/usb/musb-new/Kconfig
index 81a0ffd9ea..bf86bc589d 100644
--- a/drivers/usb/musb-new/Kconfig
+++ b/drivers/usb/musb-new/Kconfig
@@ -18,6 +18,14 @@ config USB_MUSB_GADGET
 	help
 	  Enables the MUSB USB dual-role controller in gadget mode.
 
+config USB_MUSB_DA8XX
+	bool "Enable DA8xx MUSB Controller"
+	depends on DM_USB
+	help
+	  Say y here to enable support for the dual role high
+	  speed USB controller based on the Mentor Graphics
+	  silicon IP.
+
 config USB_MUSB_TI
 	bool "Enable TI OTG USB controller"
 	depends on DM_USB
diff --git a/drivers/usb/musb-new/Makefile b/drivers/usb/musb-new/Makefile
index 296f230fbf..9fcabcfa63 100644
--- a/drivers/usb/musb-new/Makefile
+++ b/drivers/usb/musb-new/Makefile
@@ -8,6 +8,7 @@ obj-$(CONFIG_USB_MUSB_GADGET) += musb_gadget.o musb_gadget_ep0.o musb_core.o
 obj-$(CONFIG_USB_MUSB_GADGET) += musb_uboot.o
 obj-$(CONFIG_USB_MUSB_HOST) += musb_host.o musb_core.o musb_uboot.o
 obj-$(CONFIG_USB_MUSB_DSPS) += musb_dsps.o
+obj-$(CONFIG_USB_MUSB_DA8XX)	+= da8xx.o
 obj-$(CONFIG_USB_MUSB_AM35X) += am35x.o
 obj-$(CONFIG_USB_MUSB_OMAP2PLUS) += omap2430.o
 obj-$(CONFIG_USB_MUSB_PIC32) += pic32.o
diff --git a/drivers/usb/musb-new/da8xx.c b/drivers/usb/musb-new/da8xx.c
new file mode 100644
index 0000000000..899b30db68
--- /dev/null
+++ b/drivers/usb/musb-new/da8xx.c
@@ -0,0 +1,350 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Texas Instruments da8xx "glue layer"
+ *
+ * Copyright (c) 2019, by Texas Instruments
+ *
+ * Based on the DA8xx "glue layer" code.
+ * Copyright (c) 2008-2019, MontaVista Software, Inc. <source@mvista.com>
+ *
+ * DT support
+ * Copyright (c) 2016 Petr Kulhavy <petr@barix.com>
+ * This file is part of the Inventra Controller Driver for Linux.
+ *
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/device-internal.h>
+#include <dm/lists.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/da8xx-usb.h>
+#include <linux/usb/otg.h>
+#include <asm/omap_musb.h>
+#include <generic-phy.h>
+#include "linux-compat.h"
+#include "musb_core.h"
+#include "musb_uboot.h"
+
+/* USB 2.0 OTG module registers */
+#define DA8XX_USB_REVISION_REG	0x00
+#define DA8XX_USB_CTRL_REG	0x04
+#define DA8XX_USB_STAT_REG	0x08
+#define DA8XX_USB_EMULATION_REG 0x0c
+#define DA8XX_USB_SRP_FIX_TIME_REG 0x18
+#define DA8XX_USB_INTR_SRC_REG	0x20
+#define DA8XX_USB_INTR_SRC_SET_REG 0x24
+#define DA8XX_USB_INTR_SRC_CLEAR_REG 0x28
+#define DA8XX_USB_INTR_MASK_REG 0x2c
+#define DA8XX_USB_INTR_MASK_SET_REG 0x30
+#define DA8XX_USB_INTR_MASK_CLEAR_REG 0x34
+#define DA8XX_USB_INTR_SRC_MASKED_REG 0x38
+#define DA8XX_USB_END_OF_INTR_REG 0x3c
+#define DA8XX_USB_GENERIC_RNDIS_EP_SIZE_REG(n) (0x50 + (((n) - 1) << 2))
+
+/* Control register bits */
+#define DA8XX_SOFT_RESET_MASK	1
+
+#define DA8XX_USB_TX_EP_MASK	0x1f		/* EP0 + 4 Tx EPs */
+#define DA8XX_USB_RX_EP_MASK	0x1e		/* 4 Rx EPs */
+
+/* USB interrupt register bits */
+#define DA8XX_INTR_USB_SHIFT	16
+#define DA8XX_INTR_USB_MASK	(0x1ff << DA8XX_INTR_USB_SHIFT) /* 8 Mentor */
+					/* interrupts and DRVVBUS interrupt */
+#define DA8XX_INTR_DRVVBUS	0x100
+#define DA8XX_INTR_RX_SHIFT	8
+#define DA8XX_INTR_RX_MASK	(DA8XX_USB_RX_EP_MASK << DA8XX_INTR_RX_SHIFT)
+#define DA8XX_INTR_TX_SHIFT	0
+#define DA8XX_INTR_TX_MASK	(DA8XX_USB_TX_EP_MASK << DA8XX_INTR_TX_SHIFT)
+
+#define DA8XX_MENTOR_CORE_OFFSET 0x400
+
+static irqreturn_t da8xx_musb_interrupt(int irq, void *hci)
+{
+	struct musb		*musb = hci;
+	void __iomem		*reg_base = musb->ctrl_base;
+	unsigned long		flags;
+	irqreturn_t		ret = IRQ_NONE;
+	u32			status;
+
+	spin_lock_irqsave(&musb->lock, flags);
+
+	/*
+	 * NOTE: DA8XX shadows the Mentor IRQs.  Don't manage them through
+	 * the Mentor registers (except for setup), use the TI ones and EOI.
+	 */
+
+	/* Acknowledge and handle non-CPPI interrupts */
+	status = musb_readl(reg_base, DA8XX_USB_INTR_SRC_MASKED_REG);
+	if (!status)
+		goto eoi;
+
+	musb_writel(reg_base, DA8XX_USB_INTR_SRC_CLEAR_REG, status);
+	dev_dbg(musb->controller, "USB IRQ %08x\n", status);
+
+	musb->int_rx = (status & DA8XX_INTR_RX_MASK) >> DA8XX_INTR_RX_SHIFT;
+	musb->int_tx = (status & DA8XX_INTR_TX_MASK) >> DA8XX_INTR_TX_SHIFT;
+	musb->int_usb = (status & DA8XX_INTR_USB_MASK) >> DA8XX_INTR_USB_SHIFT;
+
+	/*
+	 * DRVVBUS IRQs are the only proxy we have (a very poor one!) for
+	 * DA8xx's missing ID change IRQ.  We need an ID change IRQ to
+	 * switch appropriately between halves of the OTG state machine.
+	 * Managing DEVCTL.Session per Mentor docs requires that we know its
+	 * value but DEVCTL.BDevice is invalid without DEVCTL.Session set.
+	 * Also, DRVVBUS pulses for SRP (but not at 5 V)...
+	 */
+	if (status & (DA8XX_INTR_DRVVBUS << DA8XX_INTR_USB_SHIFT)) {
+		int drvvbus = musb_readl(reg_base, DA8XX_USB_STAT_REG);
+		void __iomem *mregs = musb->mregs;
+		u8 devctl = musb_readb(mregs, MUSB_DEVCTL);
+		int err;
+
+		err = musb->int_usb & MUSB_INTR_VBUSERROR;
+		if (err) {
+			/*
+			 * The Mentor core doesn't debounce VBUS as needed
+			 * to cope with device connect current spikes. This
+			 * means it's not uncommon for bus-powered devices
+			 * to get VBUS errors during enumeration.
+			 *
+			 * This is a workaround, but newer RTL from Mentor
+			 * seems to allow a better one: "re"-starting sessions
+			 * without waiting for VBUS to stop registering in
+			 * devctl.
+			 */
+			musb->int_usb &= ~MUSB_INTR_VBUSERROR;
+			WARNING("VBUS error workaround (delay coming)\n");
+		} else if (drvvbus) {
+			MUSB_HST_MODE(musb);
+			musb->port1_status |= USB_PORT_STAT_POWER;
+		} else if (!(musb->int_usb & MUSB_INTR_BABBLE)) {
+			/*
+			 * When babble condition happens, drvvbus interrupt
+			 * is also generated. Ignore this drvvbus interrupt
+			 * and let babble interrupt handler recovers the
+			 * controller; otherwise, the host-mode flag is lost
+			 * due to the MUSB_DEV_MODE() call below and babble
+			 * recovery logic will not be called.
+			 */
+			musb->is_active = 0;
+			MUSB_DEV_MODE(musb);
+			musb->port1_status &= ~USB_PORT_STAT_POWER;
+		}
+		ret = IRQ_HANDLED;
+	}
+
+	if (musb->int_tx || musb->int_rx || musb->int_usb)
+		ret |= musb_interrupt(musb);
+eoi:
+	/* EOI needs to be written for the IRQ to be re-asserted. */
+	if (ret == IRQ_HANDLED || status)
+		musb_writel(reg_base, DA8XX_USB_END_OF_INTR_REG, 0);
+
+	spin_unlock_irqrestore(&musb->lock, flags);
+
+	return ret;
+}
+
+static int da8xx_musb_init(struct musb *musb)
+{
+	u32  revision;
+	void __iomem *reg_base = musb->ctrl_base;
+
+	int ret;
+
+	/* reset the controller */
+	writel(0x1, &da8xx_usb_regs->control);
+	udelay(50);
+
+	/* Returns zero if e.g. not clocked */
+	revision = readl(&da8xx_usb_regs->revision);
+	if (revision == 0)
+		return -ENODEV;
+
+	/* Disable all interrupts */
+	writel((DA8XX_USB_USBINT_MASK | DA8XX_USB_TXINT_MASK |
+		DA8XX_USB_RXINT_MASK), &da8xx_usb_regs->intmsk_set);
+
+	musb->mregs += DA8XX_MENTOR_CORE_OFFSET;
+
+	/* NOTE: IRQs are in mixed mode, not bypass to pure MUSB */
+	debug("DA8xx OTG revision %08x, control %02x\n", revision,
+	      musb_readb(reg_base, DA8XX_USB_CTRL_REG));
+
+	musb->isr = da8xx_musb_interrupt;
+	return 0;
+}
+
+static int da8xx_musb_exit(struct musb *musb)
+{
+	/* flush any interrupts */
+	writel((DA8XX_USB_USBINT_MASK | DA8XX_USB_TXINT_MASK |
+		DA8XX_USB_RXINT_MASK), &da8xx_usb_regs->intmsk_clr);
+	writel(0, &da8xx_usb_regs->eoi);
+
+	return 0;
+}
+
+/**
+ * da8xx_musb_enable - enable interrupts
+ */
+static int da8xx_musb_enable(struct musb *musb)
+{
+	void __iomem *reg_base = musb->ctrl_base;
+	u32 mask;
+
+	/* Workaround: setup IRQs through both register sets. */
+	mask = ((musb->epmask & DA8XX_USB_TX_EP_MASK) << DA8XX_INTR_TX_SHIFT) |
+	       ((musb->epmask & DA8XX_USB_RX_EP_MASK) << DA8XX_INTR_RX_SHIFT) |
+	       DA8XX_INTR_USB_MASK;
+	musb_writel(reg_base, DA8XX_USB_INTR_MASK_SET_REG, mask);
+
+	/* Force the DRVVBUS IRQ so we can start polling for ID change. */
+	musb_writel(reg_base, DA8XX_USB_INTR_SRC_SET_REG,
+		    DA8XX_INTR_DRVVBUS << DA8XX_INTR_USB_SHIFT);
+
+	return 0;
+}
+
+/**
+ * da8xx_musb_disable - disable HDRC and flush interrupts
+ */
+static void da8xx_musb_disable(struct musb *musb)
+{
+	void __iomem *reg_base = musb->ctrl_base;
+
+	musb_writel(reg_base, DA8XX_USB_INTR_MASK_CLEAR_REG,
+		    DA8XX_INTR_USB_MASK |
+		    DA8XX_INTR_TX_MASK | DA8XX_INTR_RX_MASK);
+	musb_writel(reg_base, DA8XX_USB_END_OF_INTR_REG, 0);
+}
+
+void da8xx_musb_reset(struct udevice *dev)
+{
+	void *reg_base = dev_read_addr_ptr(dev);
+
+	/* Reset the controller */
+	musb_writel(reg_base, DA8XX_USB_CTRL_REG, DA8XX_SOFT_RESET_MASK);
+}
+
+void da8xx_musb_clear_irq(struct udevice *dev)
+{
+	/* flush any interrupts */
+	writel((DA8XX_USB_USBINT_MASK | DA8XX_USB_TXINT_MASK |
+		DA8XX_USB_RXINT_MASK), &da8xx_usb_regs->intmsk_clr);
+	writel(0, &da8xx_usb_regs->eoi);
+}
+
+const struct musb_platform_ops da8xx_ops = {
+	.init		= da8xx_musb_init,
+	.exit		= da8xx_musb_exit,
+	.enable		= da8xx_musb_enable,
+	.disable	= da8xx_musb_disable,
+};
+
+struct da8xx_musb_platdata {
+	void *base;
+	void *ctrl_mod_base;
+	struct musb_hdrc_platform_data plat;
+	struct musb_hdrc_config musb_config;
+	struct omap_musb_board_data otg_board_data;
+	struct phy phy;
+};
+
+static int da8xx_musb_ofdata_to_platdata(struct udevice *dev)
+{
+	struct da8xx_musb_platdata *platdata = dev_get_platdata(dev);
+	const void *fdt = gd->fdt_blob;
+	int node = dev_of_offset(dev);
+
+	platdata->base = (void *)dev_read_addr_ptr(dev);
+	platdata->musb_config.multipoint = 1;
+	platdata->musb_config.dyn_fifo = 1;
+	platdata->musb_config.num_eps = 5;
+	platdata->musb_config.ram_bits = 10;
+	platdata->plat.power = fdtdec_get_int(fdt, node, "power", 50);
+	platdata->otg_board_data.interface_type = MUSB_INTERFACE_UTMI;
+	platdata->plat.mode = MUSB_HOST;
+	platdata->otg_board_data.dev = dev;
+	platdata->plat.config = &platdata->musb_config;
+	platdata->plat.platform_ops = &da8xx_ops;
+	platdata->plat.board_data = &platdata->otg_board_data;
+	platdata->otg_board_data.clear_irq = da8xx_musb_clear_irq;
+	platdata->otg_board_data.reset = da8xx_musb_reset;
+	return 0;
+}
+
+static int da8xx_musb_probe(struct udevice *dev)
+{
+	struct musb_host_data *host = dev_get_priv(dev);
+	struct da8xx_musb_platdata *platdata = dev_get_platdata(dev);
+	struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
+	struct omap_musb_board_data *otg_board_data;
+	int ret;
+	void *base = dev_read_addr_ptr(dev);
+
+	/* Get the phy info from the device tree */
+	ret = generic_phy_get_by_name(dev, "usb-phy", &platdata->phy);
+	if (ret)
+		return ret;
+
+	/* Initialize the phy */
+	ret = generic_phy_init(&platdata->phy);
+	if (ret)
+		return ret;
+
+	/* enable psc for usb2.0 */
+	lpsc_on(33);
+
+	/* Enable phy */
+	generic_phy_power_on(&platdata->phy);
+
+	priv->desc_before_addr = true;
+	otg_board_data = &platdata->otg_board_data;
+
+	host->host = musb_init_controller(&platdata->plat,
+					  (struct device *)otg_board_data,
+					  platdata->base);
+	if (!host->host) {
+		ret = -ENODEV;
+		goto shutdown; /* Shutdown what we started */
+	}
+
+	ret = musb_lowlevel_init(host);
+
+	if (ret == 0)
+		return 0;
+shutdown:
+	/* Turn off the phy if we fail */
+	generic_phy_power_off(&platdata->phy);
+	lpsc_disable(33);
+	return ret;
+}
+
+static int da8xx_musb_remove(struct udevice *dev)
+{
+	struct musb_host_data *host = dev_get_priv(dev);
+
+	musb_stop(host->host);
+
+	return 0;
+}
+
+static const struct udevice_id da8xx_musb_ids[] = {
+	{ .compatible = "ti,da830-musb" },
+	{ }
+};
+
+U_BOOT_DRIVER(da8xx_musb) = {
+	.name	= "da8xx-musb",
+	.id		= UCLASS_USB,
+	.of_match = da8xx_musb_ids,
+	.ofdata_to_platdata = da8xx_musb_ofdata_to_platdata,
+	.probe = da8xx_musb_probe,
+	.remove = da8xx_musb_remove,
+	.ops = &musb_usb_ops,
+	.platdata_auto_alloc_size = sizeof(struct da8xx_musb_platdata),
+	.priv_auto_alloc_size = sizeof(struct musb_host_data),
+};

commit e16bd00f723813caf7d31bbde4c32956e8943833
Author: Mark Kettenis <kettenis@openbsd.org>
Date:   Sun Jun 30 18:01:55 2019 +0200

    UPSTREAM: usb: xhci-dwc3: Add USB2 PHY configuration
    
    Configure USB2 PHY register based on "phy_type" property and
    handle all the quirks that are relevant for Rockchip RK3399 SoCs.
    
    Change-Id: Idac50a031e8e924712fef8ad61a622f8e85f3e86
    Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
    Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 062790f461312f1b954ae876f85da8f6ce5fcc73)

diff --git a/drivers/usb/host/xhci-dwc3.c b/drivers/usb/host/xhci-dwc3.c
index b68d421a59..69e18d9548 100644
--- a/drivers/usb/host/xhci-dwc3.c
+++ b/drivers/usb/host/xhci-dwc3.c
@@ -121,6 +121,8 @@ static int xhci_dwc3_probe(struct udevice *dev)
 	struct dwc3 *dwc3_reg;
 	enum usb_dr_mode dr_mode;
 	struct xhci_dwc3_platdata *plat = dev_get_platdata(dev);
+	const char *phy;
+	u32 reg;
 	int ret;
 
 	hccr = (struct xhci_hccr *)((uintptr_t)dev_read_addr(dev));
@@ -135,6 +137,24 @@ static int xhci_dwc3_probe(struct udevice *dev)
 
 	dwc3_core_init(dwc3_reg);
 
+	/* Set dwc3 usb2 phy config */
+	reg = readl(&dwc3_reg->g_usb2phycfg[0]);
+
+	phy = dev_read_string(dev, "phy_type");
+	if (phy && strcmp(phy, "utmi_wide") == 0) {
+		reg |= DWC3_GUSB2PHYCFG_PHYIF;
+		reg &= ~DWC3_GUSB2PHYCFG_USBTRDTIM_MASK;
+		reg |= DWC3_GUSB2PHYCFG_USBTRDTIM_16BIT;
+	}
+
+	if (dev_read_bool(dev, "snps,dis_enblslpm-quirk"))
+		reg &= ~DWC3_GUSB2PHYCFG_ENBLSLPM;
+
+	if (dev_read_bool(dev, "snps,dis-u2-freeclk-exists-quirk"))
+		reg &= ~DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS;
+
+	writel(reg, &dwc3_reg->g_usb2phycfg[0]);
+
 	dr_mode = usb_get_dr_mode(dev_of_offset(dev));
 	if (dr_mode == USB_DR_MODE_UNKNOWN)
 		/* by default set dual role mode to HOST */

commit f44c88f169dac78de9a082dff18327acca29e670
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Fri Jul 5 09:33:58 2019 +0200

    UPSTREAM: usb: dwc3: Use UCLASS_NOP instead of UCLASS_MISC for the DWC3 generic glue
    
    dwc3-generic has been broken since MISC uclass has been modified to scan DT
    sub-nodes after bind.
    Fixing it by a using the no-op uclass.
    
    Change-Id: Id95c49a16951cbe8bc7e58d8a3f85a7372ffd00a
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 3b83829ed63fabe460592395571c1d8fd9b861c8)

diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c
index cd1e19546b..848eefa318 100644
--- a/drivers/usb/dwc3/dwc3-generic.c
+++ b/drivers/usb/dwc3/dwc3-generic.c
@@ -350,7 +350,7 @@ static const struct udevice_id dwc3_glue_ids[] = {
 
 U_BOOT_DRIVER(dwc3_generic_wrapper) = {
 	.name	= "dwc3-generic-wrapper",
-	.id	= UCLASS_MISC,
+	.id	= UCLASS_NOP,
 	.of_match = dwc3_glue_ids,
 	.bind = dwc3_glue_bind,
 	.probe = dwc3_glue_probe,

commit 8fff75ba3bbc49c637bef9c162bfd11e7938548a
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Fri Jul 5 09:33:56 2019 +0200

    UPSTREAM: usb: dwc3-generic: remove dm_scan_fdt_dev() from the remove() callback
    
    There is simply no reason to do that here.
    
    Change-Id: I4336f493dc638bd0b5dd57cbd4a934c93c5bb0ff
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit e445d46651de61fdfecf34cc2cd97d58ca6c5cf3)

diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c
index c92f5f3dbb..cd1e19546b 100644
--- a/drivers/usb/dwc3/dwc3-generic.c
+++ b/drivers/usb/dwc3/dwc3-generic.c
@@ -337,7 +337,7 @@ static int dwc3_glue_remove(struct udevice *dev)
 
 	clk_release_bulk(&glue->clks);
 
-	return dm_scan_fdt_dev(dev);
+	return 0;
 }
 
 static const struct udevice_id dwc3_glue_ids[] = {

commit 920516c875d6a8e77352b249ed7fa22441d5d7b8
Author: Marek Vasut <marex@denx.de>
Date:   Mon Jun 24 19:05:47 2019 +0200

    UPSTREAM: usb: ehci-mx6: Fix bus enumeration for DM case
    
    The EHCI iMX6 driver is only partly converted to DT probing and
    still uses a tremendous amount of hard-coded addresses. Worse,
    the driver uses hard-coded SoC-model-specific base addresses, which
    are derived from values protected by SoC-specific macros, hence the
    driver is also compiled for a specific SoC model. Even worse, the
    driver depends on specific sequential indexing of the controllers,
    from which it derives offsets in the PHY and ANATOP register sets.
    
    However, when the driver is probed from DT, the indexing is not
    correct. In fact, each controller has index 0. This patch derives
    the index for DT probing case from the controller base addresses,
    which is not the way this should be done, however it is the least
    intrusive approach, favorable this close to release.
    
    The necessary steps to convert this driver fully to DT probing are
    described inside the patch, however this should be done in the next
    release and depends on iMX clock driver patches.
    
    Change-Id: I81cef54d5e6f1bab2aef407ad053b5af3cd4e94f
    Signed-off-by: Marek Vasut <marex@denx.de>
    Cc: Abel Vesa <abel.vesa@nxp.com>
    Cc: Adam Ford <aford173@gmail.com>
    Cc: Fabio Estevam <festevam@gmail.com>
    Cc: Ludwig Zenz <lzenz@dh-electronics.com>
    Cc: Lukasz Majewski <lukma@denx.de>
    Cc: Peng Fan <peng.fan@nxp.com>
    Cc: Stefano Babic <sbabic@denx.de>
    Cc: Vagrant Cascadian <vagrant@debian.org>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 501547cec1f7f0438cae388a104ff60f18576c01)

diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c
index 93b90c2f3a..bfa9e7c7ad 100644
--- a/drivers/usb/host/ehci-mx6.c
+++ b/drivers/usb/host/ehci-mx6.c
@@ -504,6 +504,42 @@ static int ehci_usb_ofdata_to_platdata(struct udevice *dev)
 	return 0;
 }
 
+static int ehci_usb_bind(struct udevice *dev)
+{
+	/*
+	 * TODO:
+	 * This driver is only partly converted to DT probing and still uses
+	 * a tremendous amount of hard-coded addresses. To make things worse,
+	 * the driver depends on specific sequential indexing of controllers,
+	 * from which it derives offsets in the PHY and ANATOP register sets.
+	 *
+	 * Here we attempt to calculate these indexes from DT information as
+	 * well as we can. The USB controllers on all existing iMX6/iMX7 SoCs
+	 * are placed next to each other, at addresses incremented by 0x200.
+	 * Thus, the index is derived from the multiple of 0x200 offset from
+	 * the first controller address.
+	 *
+	 * However, to complete conversion of this driver to DT probing, the
+	 * following has to be done:
+	 * - DM clock framework support for iMX must be implemented
+	 * - usb_power_config() has to be converted to clock framework
+	 *   -> Thus, the ad-hoc "index" variable goes away.
+	 * - USB PHY handling has to be factored out into separate driver
+	 *   -> Thus, the ad-hoc "index" variable goes away from the PHY
+	 *      code, the PHY driver must parse it's address from DT. This
+	 *      USB driver must find the PHY driver via DT phandle.
+	 *   -> usb_power_config() shall be moved to PHY driver
+	 * With these changes in place, the ad-hoc indexing goes away and
+	 * the driver is fully converted to DT probing.
+	 */
+	fdt_size_t size;
+	fdt_addr_t addr = devfdt_get_addr_size_index(dev, 0, &size);
+
+	dev->req_seq = (addr - USB_BASE_ADDR) / size;
+
+	return 0;
+}
+
 static int ehci_usb_probe(struct udevice *dev)
 {
 	struct usb_platdata *plat = dev_get_platdata(dev);
@@ -565,6 +601,7 @@ U_BOOT_DRIVER(usb_mx6) = {
 	.id	= UCLASS_USB,
 	.of_match = mx6_usb_ids,
 	.ofdata_to_platdata = ehci_usb_ofdata_to_platdata,
+	.bind	= ehci_usb_bind,
 	.probe	= ehci_usb_probe,
 	.remove = ehci_deregister,
 	.ops	= &ehci_usb_ops,

commit e7093b518a2723e6e16bfd5dbdbbd6cf29657faf
Author: Frieder Schrempf <frieder.schrempf@kontron.de>
Date:   Tue Jun 4 21:56:29 2019 +0200

    UPSTREAM: usb: gadget: f_sdp: Allow SPL to load and boot FIT via SDP
    
    Add support for loading u-boot FIT images over the USB SDP protocol in
    the SPL
    
    Change-Id: I41461b58c088a10eca6e48b0d49c76944c37c3fa
    Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
    [Various build fixes]
    Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
    Tested-by: Fabio Estevam <festevam@gmail.com>
    Tested-by: Lukasz Majewski <lukma@denx.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 2c72ead7387404eba16c556d2f204c52c36c27f9)

diff --git a/common/spl/spl_sdp.c b/common/spl/spl_sdp.c
index 0c4603a3db..859b48bf35 100644
--- a/common/spl/spl_sdp.c
+++ b/common/spl/spl_sdp.c
@@ -28,10 +28,14 @@ static int spl_sdp_load_image(struct spl_image_info *spl_image,
 		return -ENODEV;
 	}
 
-	/* This command typically does not return but jumps to an image */
-	sdp_handle(controller_index);
-	pr_err("SDP ended\n");
+	/*
+	 * This command either loads a legacy image, jumps and never returns,
+	 * or it loads a FIT image and returns it to be handled by the SPL
+	 * code.
+	 */
+	ret = spl_sdp_handle(controller_index, spl_image);
+	debug("SDP ended\n");
 
-	return -EINVAL;
+	return ret;
 }
 SPL_LOAD_IMAGE_METHOD("USB SDP", 0, BOOT_DEVICE_BOARD, spl_sdp_load_image);
diff --git a/drivers/usb/gadget/f_sdp.c b/drivers/usb/gadget/f_sdp.c
index ac90a69dde..bfab01be63 100644
--- a/drivers/usb/gadget/f_sdp.c
+++ b/drivers/usb/gadget/f_sdp.c
@@ -639,7 +639,20 @@ static u32 sdp_jump_imxheader(void *address)
 	return 0;
 }
 
-static void sdp_handle_in_ep(void)
+#ifdef CONFIG_SPL_BUILD
+#ifdef CONFIG_SPL_LOAD_FIT
+static ulong sdp_fit_read(struct spl_load_info *load, ulong sector,
+			  ulong count, void *buf)
+{
+	debug("%s: sector %lx, count %lx, buf %lx\n",
+	      __func__, sector, count, (ulong)buf);
+	memcpy(buf, (void *)(load->dev + sector), count);
+	return count;
+}
+#endif
+#endif
+
+static void sdp_handle_in_ep(struct spl_image_info *spl_image)
 {
 	u8 *data = sdp_func->in_req->buf;
 	u32 status;
@@ -691,10 +704,25 @@ static void sdp_handle_in_ep(void)
 		/* If imx header fails, try some U-Boot specific headers */
 		if (status) {
 #ifdef CONFIG_SPL_BUILD
+			image_header_t *header =
+				sdp_ptr(sdp_func->jmp_address);
+#ifdef CONFIG_SPL_LOAD_FIT
+			if (image_get_magic(header) == FDT_MAGIC) {
+				struct spl_load_info load;
+
+				debug("Found FIT\n");
+				load.dev = header;
+				load.bl_len = 1;
+				load.read = sdp_fit_read;
+				spl_load_simple_fit(spl_image, &load, 0,
+						    header);
+
+				return;
+			}
+#endif
 			/* In SPL, allow jumps to U-Boot images */
 			struct spl_image_info spl_image = {};
-			spl_parse_image_header(&spl_image,
-				(struct image_header *)sdp_func->jmp_address);
+			spl_parse_image_header(&spl_image, header);
 			jump_to_image_no_args(&spl_image);
 #else
 			/* In U-Boot, allow jumps to scripts */
@@ -716,19 +744,32 @@ static void sdp_handle_in_ep(void)
 	};
 }
 
-void sdp_handle(int controller_index)
+#ifndef CONFIG_SPL_BUILD
+int sdp_handle(int controller_index)
+#else
+int spl_sdp_handle(int controller_index, struct spl_image_info *spl_image)
+#endif
 {
 	printf("SDP: handle requests...\n");
 	while (1) {
 		if (ctrlc()) {
 			puts("\rCTRL+C - Operation aborted.\n");
-			return;
+			return -EINVAL;
 		}
 
+#ifdef CONFIG_SPL_BUILD
+		if (spl_image->flags & SPL_FIT_FOUND)
+			return 0;
+#endif
+
 		WATCHDOG_RESET();
 		usb_gadget_handle_interrupts(controller_index);
 
-		sdp_handle_in_ep();
+#ifdef CONFIG_SPL_BUILD
+		sdp_handle_in_ep(spl_image);
+#else
+		sdp_handle_in_ep(NULL);
+#endif
 	}
 }
 
diff --git a/include/sdp.h b/include/sdp.h
index f476bab8f1..c64908b69d 100644
--- a/include/sdp.h
+++ b/include/sdp.h
@@ -11,6 +11,13 @@
 #define __SDP_H_
 
 int sdp_init(int controller_index);
-void sdp_handle(int controller_index);
+
+#ifdef CONFIG_SPL_BUILD
+#include <spl.h>
+
+int spl_sdp_handle(int controller_index, struct spl_image_info *spl_image);
+#else
+int sdp_handle(int controller_index);
+#endif
 
 #endif /* __SDP_H_ */

commit ba6d0aabab60746b6515d0193bdd0c0c43da69a9
Author: Patrick Delaunay <patrick.delaunay@st.com>
Date:   Tue Jun 18 16:57:18 2019 +0200

    UPSTREAM: usb: dwc2: allow peripheral mode for OTG configuration
    
    Allow device mode in DWC2 driver when device tree select the dr_mode
    "peripheral" or "otg".
    
    The device mode is not allowed when dr_mode = "host" in device tree.
    
    Change-Id: Iede854cdf940f5e1ef14a7e394087ac97998213a
    Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
    Reviewed-by: Marek Vasut <marex@denx.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 7c654683464dc4cd89f9a8198e26336263390b57)

diff --git a/drivers/usb/gadget/dwc2_udc_otg.c b/drivers/usb/gadget/dwc2_udc_otg.c
index 510d15305f..363e0bc65b 100644
--- a/drivers/usb/gadget/dwc2_udc_otg.c
+++ b/drivers/usb/gadget/dwc2_udc_otg.c
@@ -1043,7 +1043,8 @@ static int dwc2_udc_otg_ofdata_to_platdata(struct udevice *dev)
 	void (*set_params)(struct dwc2_plat_otg_data *data);
 	int ret;
 
-	if (usb_get_dr_mode(node) != USB_DR_MODE_PERIPHERAL) {
+	if (usb_get_dr_mode(node) != USB_DR_MODE_PERIPHERAL &&
+	    usb_get_dr_mode(node) != USB_DR_MODE_OTG) {
 		dev_dbg(dev, "Invalid mode\n");
 		return -ENODEV;
 	}

commit aea37ef60fc3b543441a7e660408b7ae1554fb94
Author: Patrick Delaunay <patrick.delaunay@st.com>
Date:   Tue Jun 18 16:57:16 2019 +0200

    UPSTREAM: usb: dwc2: correctly handle binding for g-tx-fifo-size
    
    Manage g-tx-fifo-size as a array as specify in the binding.
    
    Change-Id: Ie2f0fa8eda62d762fe79072db377c1b00b23ee4c
    Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
    Reviewed-by: Marek Vasut <marex@denx.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 7350a75b517b6162c8f832a9ead09b9e26e8068f)

diff --git a/drivers/usb/gadget/dwc2_udc_otg.c b/drivers/usb/gadget/dwc2_udc_otg.c
index 7be63416a1..510d15305f 100644
--- a/drivers/usb/gadget/dwc2_udc_otg.c
+++ b/drivers/usb/gadget/dwc2_udc_otg.c
@@ -1041,6 +1041,7 @@ static int dwc2_udc_otg_ofdata_to_platdata(struct udevice *dev)
 	int node = dev_of_offset(dev);
 	ulong drvdata;
 	void (*set_params)(struct dwc2_plat_otg_data *data);
+	int ret;
 
 	if (usb_get_dr_mode(node) != USB_DR_MODE_PERIPHERAL) {
 		dev_dbg(dev, "Invalid mode\n");
@@ -1052,7 +1053,18 @@ static int dwc2_udc_otg_ofdata_to_platdata(struct udevice *dev)
 	platdata->rx_fifo_sz = dev_read_u32_default(dev, "g-rx-fifo-size", 0);
 	platdata->np_tx_fifo_sz = dev_read_u32_default(dev,
 						       "g-np-tx-fifo-size", 0);
-	platdata->tx_fifo_sz = dev_read_u32_default(dev, "g-tx-fifo-size", 0);
+
+	platdata->tx_fifo_sz_nb =
+		dev_read_size(dev, "g-tx-fifo-size") / sizeof(u32);
+	if (platdata->tx_fifo_sz_nb > DWC2_MAX_HW_ENDPOINTS)
+		platdata->tx_fifo_sz_nb = DWC2_MAX_HW_ENDPOINTS;
+	if (platdata->tx_fifo_sz_nb) {
+		ret = dev_read_u32_array(dev, "g-tx-fifo-size",
+					 platdata->tx_fifo_sz_array,
+					 platdata->tx_fifo_sz_nb);
+		if (ret)
+			return ret;
+	}
 
 	platdata->force_b_session_valid =
 		dev_read_bool(dev, "u-boot,force-b-session-valid");

commit 7472a52faf4094999e3735edc12adc2997cb20d7
Author: Yinbo Zhu <yinbo.zhu@nxp.com>
Date:   Thu Apr 11 11:02:05 2019 +0000

    UPSTREAM: usb: ehci: adopt 32 bit address for CONFIG_PPC
    
    adopt 32 bit addr in fsl_esdhc for CONFIG_PPC.
    So  adopt 32 bit address for CONFIG_PPC.
    
    Change-Id: Ibb69849ed19fa18f494807020f9a6a911692b1aa
    Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
    Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit ad9f2be3348c088e7839fd3598db3b352060bff1)

diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index 5080d5fb24..0f8bf28057 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -76,8 +76,12 @@ static int ehci_fsl_init_after_reset(struct ehci_ctrl *ctrl)
 	struct usb_ehci *ehci = NULL;
 	struct ehci_fsl_priv *priv = container_of(ctrl, struct ehci_fsl_priv,
 						   ehci);
-
+#ifdef CONFIG_PPC
+	ehci = (struct usb_ehci *)lower_32_bits(priv->hcd_base);
+#else
 	ehci = (struct usb_ehci *)priv->hcd_base;
+#endif
+
 	if (ehci_fsl_init(priv, ehci, priv->ehci.hccr, priv->ehci.hcor) < 0)
 		return -ENXIO;
 
@@ -103,7 +107,11 @@ static int ehci_fsl_probe(struct udevice *dev)
 		debug("Can't get the EHCI register base address\n");
 		return -ENXIO;
 	}
+#ifdef CONFIG_PPC
+	ehci = (struct usb_ehci *)lower_32_bits(priv->hcd_base);
+#else
 	ehci = (struct usb_ehci *)priv->hcd_base;
+#endif
 	hccr = (struct ehci_hccr *)(&ehci->caplength);
 	hcor = (struct ehci_hcor *)
 		((void *)hccr + HC_LENGTH(ehci_readl(&hccr->cr_capbase)));

commit 0620c8ad4ca3c272d9f8d01448cfadabd385794e
Author: Adam Ford <aford173@gmail.com>
Date:   Tue May 7 06:57:39 2019 -0500

    UPSTREAM: usb: ohci: ohci-da8xx: Cleanup Error handling and fix flags
    
    Per feedback from Marek, he suggested better handling and
    to enable DM_FLAG_OS_PREPARE, this patch re-orders some of
    the error checking, and errors returns the error code right
    away and also sets DM_FLAG_OS_PREPARE.
    
    Change-Id: I639a5e4f6d5c89a18e722db2601cf18acb96cbb3
    Signed-off-by: Adam Ford <aford173@gmail.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 3a90b50a32b6b8a2d66dc10c19e3c15d5bd1a092)

diff --git a/drivers/usb/host/ohci-da8xx.c b/drivers/usb/host/ohci-da8xx.c
index 25fe17ca3f..f09b2043b5 100644
--- a/drivers/usb/host/ohci-da8xx.c
+++ b/drivers/usb/host/ohci-da8xx.c
@@ -94,6 +94,10 @@ static int ohci_da8xx_probe(struct udevice *dev)
 	err = 0;
 	priv->clock_count = 0;
 	clock_nb = dev_count_phandle_with_args(dev, "clocks", "#clock-cells");
+
+	if (clock_nb < 0)
+		return clock_nb;
+
 	if (clock_nb > 0) {
 		priv->clocks = devm_kcalloc(dev, clock_nb, sizeof(struct clk),
 					    GFP_KERNEL);
@@ -113,9 +117,6 @@ static int ohci_da8xx_probe(struct udevice *dev)
 			}
 			priv->clock_count++;
 		}
-	} else if (clock_nb != -ENOENT) {
-		dev_err(dev, "failed to get clock phandle(%d)\n", clock_nb);
-		return clock_nb;
 	}
 
 	err = usb_cpu_init();
@@ -171,6 +172,6 @@ U_BOOT_DRIVER(ohci_generic) = {
 	.remove = ohci_da8xx_remove,
 	.ops	= &ohci_usb_ops,
 	.priv_auto_alloc_size = sizeof(struct da8xx_ohci),
-	.flags	= DM_FLAG_ALLOC_PRIV_DMA,
+	.flags	= DM_FLAG_ALLOC_PRIV_DMA | DM_FLAG_OS_PREPARE,
 };
 #endif

commit 518b4f5b8d78dc6fbddc9ee93469fd3bf7dde9fe
Author: Neil Armstrong <narmstrong@baylibre.com>
Date:   Tue Feb 19 13:42:01 2019 +0100

    UPSTREAM: usb: dwc3: Add Meson G12A USB Glue
    
    Adds support for Amlogic G12A USB Control Glue HW.
    
    The Amlogic G12A SoC Family embeds 2 USB Controllers :
    - a DWC3 IP configured as Host for USB2 and USB3
    - a DWC2 IP configured as Peripheral USB2 Only
    
    A glue connects these both controllers to 2 USB2 PHYs, and optionnally
    to an USB3+PCIE Combo PHY shared with the PCIE controller.
    
    The Glue configures the UTMI 8bit interfaces for the USB2 PHYs, including
    routing of the OTG PHY between the DWC3 and DWC2 controllers, and
    setups the on-chip OTG mode selection for this PHY.
    
    This driver sets the OTG capable port as Host mode by default,
    the switch to Device mode is to be done in a separate patch.
    
    Change-Id: I099bb5fbda0fdd52c4d78e32f879f8324bda4c59
    Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
    Reviewed-by: Marek Vasut <marex@denx.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit adb049abf7a209629c7b5e4bc673a0d802c616c2)

diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig
index bbd8105c06..25e1a38aee 100644
--- a/drivers/usb/dwc3/Kconfig
+++ b/drivers/usb/dwc3/Kconfig
@@ -44,6 +44,14 @@ config USB_DWC3_GENERIC
 	  Select this for Xilinx ZynqMP and similar Platforms.
 	  This wrapper supports Host and Peripheral operation modes.
 
+config USB_DWC3_MESON_G12A
+	bool "Amlogic Meson G12A USB wrapper"
+	depends on DM_USB && USB_DWC3 && ARCH_MESON
+	imply PHY
+	help
+	  Select this for Amlogic Meson G12A Platforms.
+	  This wrapper supports Host and Peripheral operation modes.
+
 config USB_DWC3_UNIPHIER
 	bool "DesignWare USB3 Host Support on UniPhier Platforms"
 	depends on ARCH_UNIPHIER && USB_XHCI_DWC3
diff --git a/drivers/usb/dwc3/Makefile b/drivers/usb/dwc3/Makefile
index 22142fb9d4..c8298a8e6d 100644
--- a/drivers/usb/dwc3/Makefile
+++ b/drivers/usb/dwc3/Makefile
@@ -9,6 +9,7 @@ dwc3-y					:= core.o
 obj-$(CONFIG_USB_DWC3_GADGET)		+= gadget.o ep0.o
 
 obj-$(CONFIG_USB_DWC3_OMAP)		+= dwc3-omap.o
+obj-$(CONFIG_USB_DWC3_MESON_G12A)	+= dwc3-meson-g12a.o
 obj-$(CONFIG_USB_DWC3_GENERIC)		+= dwc3-generic.o
 obj-$(CONFIG_USB_DWC3_UNIPHIER)		+= dwc3-uniphier.o
 obj-$(CONFIG_USB_DWC3_PHY_OMAP)		+= ti_usb_phy.o
diff --git a/drivers/usb/dwc3/dwc3-meson-g12a.c b/drivers/usb/dwc3/dwc3-meson-g12a.c
new file mode 100644
index 0000000000..832bcd70ff
--- /dev/null
+++ b/drivers/usb/dwc3/dwc3-meson-g12a.c
@@ -0,0 +1,456 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Amlogic G12A DWC3 Glue layer
+ *
+ * Copyright (C) 2019 BayLibre, SAS
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ */
+
+#include <common.h>
+#include <asm-generic/io.h>
+#include <dm.h>
+#include <dm/device-internal.h>
+#include <dm/lists.h>
+#include <dwc3-uboot.h>
+#include <generic-phy.h>
+#include <linux/usb/ch9.h>
+#include <linux/usb/gadget.h>
+#include <malloc.h>
+#include <regmap.h>
+#include <usb.h>
+#include "core.h"
+#include "gadget.h"
+#include <reset.h>
+#include <clk.h>
+#include <power/regulator.h>
+#include <linux/bitfield.h>
+#include <linux/bitops.h>
+#include <linux/compat.h>
+
+/* USB2 Ports Control Registers */
+
+#define U2P_REG_SIZE						0x20
+
+#define U2P_R0							0x0
+	#define U2P_R0_HOST_DEVICE				BIT(0)
+	#define U2P_R0_POWER_OK					BIT(1)
+	#define U2P_R0_HAST_MODE				BIT(2)
+	#define U2P_R0_POWER_ON_RESET				BIT(3)
+	#define U2P_R0_ID_PULLUP				BIT(4)
+	#define U2P_R0_DRV_VBUS					BIT(5)
+
+#define U2P_R1							0x4
+	#define U2P_R1_PHY_READY				BIT(0)
+	#define U2P_R1_ID_DIG					BIT(1)
+	#define U2P_R1_OTG_SESSION_VALID			BIT(2)
+	#define U2P_R1_VBUS_VALID				BIT(3)
+
+/* USB Glue Control Registers */
+
+#define USB_R0							0x80
+	#define USB_R0_P30_LANE0_TX2RX_LOOPBACK			BIT(17)
+	#define USB_R0_P30_LANE0_EXT_PCLK_REQ			BIT(18)
+	#define USB_R0_P30_PCS_RX_LOS_MASK_VAL_MASK		GENMASK(28, 19)
+	#define USB_R0_U2D_SS_SCALEDOWN_MODE_MASK		GENMASK(30, 29)
+	#define USB_R0_U2D_ACT					BIT(31)
+
+#define USB_R1							0x84
+	#define USB_R1_U3H_BIGENDIAN_GS				BIT(0)
+	#define USB_R1_U3H_PME_ENABLE				BIT(1)
+	#define USB_R1_U3H_HUB_PORT_OVERCURRENT_MASK		GENMASK(4, 2)
+	#define USB_R1_U3H_HUB_PORT_PERM_ATTACH_MASK		GENMASK(9, 7)
+	#define USB_R1_U3H_HOST_U2_PORT_DISABLE_MASK		GENMASK(13, 12)
+	#define USB_R1_U3H_HOST_U3_PORT_DISABLE			BIT(16)
+	#define USB_R1_U3H_HOST_PORT_POWER_CONTROL_PRESENT	BIT(17)
+	#define USB_R1_U3H_HOST_MSI_ENABLE			BIT(18)
+	#define USB_R1_U3H_FLADJ_30MHZ_REG_MASK			GENMASK(24, 19)
+	#define USB_R1_P30_PCS_TX_SWING_FULL_MASK		GENMASK(31, 25)
+
+#define USB_R2							0x88
+	#define USB_R2_P30_PCS_TX_DEEMPH_3P5DB_MASK		GENMASK(25, 20)
+	#define USB_R2_P30_PCS_TX_DEEMPH_6DB_MASK		GENMASK(31, 26)
+
+#define USB_R3							0x8c
+	#define USB_R3_P30_SSC_ENABLE				BIT(0)
+	#define USB_R3_P30_SSC_RANGE_MASK			GENMASK(3, 1)
+	#define USB_R3_P30_SSC_REF_CLK_SEL_MASK			GENMASK(12, 4)
+	#define USB_R3_P30_REF_SSP_EN				BIT(13)
+
+#define USB_R4							0x90
+	#define USB_R4_P21_PORT_RESET_0				BIT(0)
+	#define USB_R4_P21_SLEEP_M0				BIT(1)
+	#define USB_R4_MEM_PD_MASK				GENMASK(3, 2)
+	#define USB_R4_P21_ONLY					BIT(4)
+
+#define USB_R5							0x94
+	#define USB_R5_ID_DIG_SYNC				BIT(0)
+	#define USB_R5_ID_DIG_REG				BIT(1)
+	#define USB_R5_ID_DIG_CFG_MASK				GENMASK(3, 2)
+	#define USB_R5_ID_DIG_EN_0				BIT(4)
+	#define USB_R5_ID_DIG_EN_1				BIT(5)
+	#define USB_R5_ID_DIG_CURR				BIT(6)
+	#define USB_R5_ID_DIG_IRQ				BIT(7)
+	#define USB_R5_ID_DIG_TH_MASK				GENMASK(15, 8)
+	#define USB_R5_ID_DIG_CNT_MASK				GENMASK(23, 16)
+
+enum {
+	USB2_HOST_PHY = 0,
+	USB2_OTG_PHY,
+	USB3_HOST_PHY,
+	PHY_COUNT,
+};
+
+static const char *phy_names[PHY_COUNT] = {
+	"usb2-phy0", "usb2-phy1", "usb3-phy0",
+};
+
+struct dwc3_meson_g12a {
+	struct udevice		*dev;
+	struct regmap           *regmap;
+	struct clk		clk;
+	struct reset_ctl	reset;
+	struct phy		phys[PHY_COUNT];
+	enum usb_dr_mode	otg_mode;
+	enum usb_dr_mode	otg_phy_mode;
+	unsigned int		usb2_ports;
+	unsigned int		usb3_ports;
+#if CONFIG_IS_ENABLED(DM_REGULATOR)
+	struct udevice		*vbus_supply;
+#endif
+};
+
+#define U2P_REG_SIZE						0x20
+#define USB_REG_OFFSET						0x80
+
+static void dwc3_meson_g12a_usb2_set_mode(struct dwc3_meson_g12a *priv,
+					  int i, enum usb_dr_mode mode)
+{
+	switch (mode) {
+	case USB_DR_MODE_HOST:
+	case USB_DR_MODE_OTG:
+	case USB_DR_MODE_UNKNOWN:
+		regmap_update_bits(priv->regmap, U2P_R0 + (U2P_REG_SIZE * i),
+				U2P_R0_HOST_DEVICE,
+				U2P_R0_HOST_DEVICE);
+		break;
+
+	case USB_DR_MODE_PERIPHERAL:
+		regmap_update_bits(priv->regmap, U2P_R0 + (U2P_REG_SIZE * i),
+				U2P_R0_HOST_DEVICE, 0);
+		break;
+	}
+}
+
+static int dwc3_meson_g12a_usb2_init(struct dwc3_meson_g12a *priv)
+{
+	int i;
+
+	if (priv->otg_mode == USB_DR_MODE_PERIPHERAL)
+		priv->otg_phy_mode = USB_DR_MODE_PERIPHERAL;
+	else
+		priv->otg_phy_mode = USB_DR_MODE_HOST;
+
+	for (i = 0 ; i < USB3_HOST_PHY ; ++i) {
+		if (!priv->phys[i].dev)
+			continue;
+
+		regmap_update_bits(priv->regmap, U2P_R0 + (U2P_REG_SIZE * i),
+				   U2P_R0_POWER_ON_RESET,
+				   U2P_R0_POWER_ON_RESET);
+
+		if (i == USB2_OTG_PHY) {
+			regmap_update_bits(priv->regmap,
+					   U2P_R0 + (U2P_REG_SIZE * i),
+					   U2P_R0_ID_PULLUP | U2P_R0_DRV_VBUS,
+					   U2P_R0_ID_PULLUP | U2P_R0_DRV_VBUS);
+
+			dwc3_meson_g12a_usb2_set_mode(priv, i,
+						      priv->otg_phy_mode);
+		} else
+			dwc3_meson_g12a_usb2_set_mode(priv, i,
+						      USB_DR_MODE_HOST);
+
+		regmap_update_bits(priv->regmap, U2P_R0 + (U2P_REG_SIZE * i),
+				   U2P_R0_POWER_ON_RESET, 0);
+	}
+
+	return 0;
+}
+
+static void dwc3_meson_g12a_usb3_init(struct dwc3_meson_g12a *priv)
+{
+	regmap_update_bits(priv->regmap, USB_R3,
+			USB_R3_P30_SSC_RANGE_MASK |
+			USB_R3_P30_REF_SSP_EN,
+			USB_R3_P30_SSC_ENABLE |
+			FIELD_PREP(USB_R3_P30_SSC_RANGE_MASK, 2) |
+			USB_R3_P30_REF_SSP_EN);
+	udelay(2);
+
+	regmap_update_bits(priv->regmap, USB_R2,
+			USB_R2_P30_PCS_TX_DEEMPH_3P5DB_MASK,
+			FIELD_PREP(USB_R2_P30_PCS_TX_DEEMPH_3P5DB_MASK, 0x15));
+
+	regmap_update_bits(priv->regmap, USB_R2,
+			USB_R2_P30_PCS_TX_DEEMPH_6DB_MASK,
+			FIELD_PREP(USB_R2_P30_PCS_TX_DEEMPH_6DB_MASK, 0x20));
+
+	udelay(2);
+
+	regmap_update_bits(priv->regmap, USB_R1,
+			USB_R1_U3H_HOST_PORT_POWER_CONTROL_PRESENT,
+			USB_R1_U3H_HOST_PORT_POWER_CONTROL_PRESENT);
+
+	regmap_update_bits(priv->regmap, USB_R1,
+			USB_R1_P30_PCS_TX_SWING_FULL_MASK,
+			FIELD_PREP(USB_R1_P30_PCS_TX_SWING_FULL_MASK, 127));
+}
+
+static void dwc3_meson_g12a_usb_init_mode(struct dwc3_meson_g12a *priv)
+{
+	if (priv->otg_phy_mode == USB_DR_MODE_PERIPHERAL) {
+		regmap_update_bits(priv->regmap, USB_R0,
+				USB_R0_U2D_ACT, USB_R0_U2D_ACT);
+		regmap_update_bits(priv->regmap, USB_R0,
+				USB_R0_U2D_SS_SCALEDOWN_MODE_MASK, 0);
+		regmap_update_bits(priv->regmap, USB_R4,
+				USB_R4_P21_SLEEP_M0, USB_R4_P21_SLEEP_M0);
+	} else {
+		regmap_update_bits(priv->regmap, USB_R0,
+				USB_R0_U2D_ACT, 0);
+		regmap_update_bits(priv->regmap, USB_R4,
+				USB_R4_P21_SLEEP_M0, 0);
+	}
+}
+
+static int dwc3_meson_g12a_usb_init(struct dwc3_meson_g12a *priv)
+{
+	int ret;
+
+	ret = dwc3_meson_g12a_usb2_init(priv);
+	if (ret)
+		return ret;
+
+	regmap_update_bits(priv->regmap, USB_R1,
+			USB_R1_U3H_FLADJ_30MHZ_REG_MASK,
+			FIELD_PREP(USB_R1_U3H_FLADJ_30MHZ_REG_MASK, 0x20));
+
+	regmap_update_bits(priv->regmap, USB_R5,
+			USB_R5_ID_DIG_EN_0,
+			USB_R5_ID_DIG_EN_0);
+	regmap_update_bits(priv->regmap, USB_R5,
+			USB_R5_ID_DIG_EN_1,
+			USB_R5_ID_DIG_EN_1);
+	regmap_update_bits(priv->regmap, USB_R5,
+			USB_R5_ID_DIG_TH_MASK,
+			FIELD_PREP(USB_R5_ID_DIG_TH_MASK, 0xff));
+
+	/* If we have an actual SuperSpeed port, initialize it */
+	if (priv->usb3_ports)
+		dwc3_meson_g12a_usb3_init(priv);
+
+	dwc3_meson_g12a_usb_init_mode(priv);
+
+	return 0;
+}
+
+int dwc3_meson_g12a_force_mode(struct udevice *dev, enum usb_dr_mode mode)
+{
+	struct dwc3_meson_g12a *priv = dev_get_platdata(dev);
+
+	if (!priv)
+		return -EINVAL;
+
+	if (mode != USB_DR_MODE_HOST && mode != USB_DR_MODE_PERIPHERAL)
+		return -EINVAL;
+
+	if (!priv->phys[USB2_OTG_PHY].dev)
+		return -EINVAL;
+
+	if (mode == priv->otg_mode)
+		return 0;
+
+	if (mode == USB_DR_MODE_HOST)
+		debug("%s: switching to Host Mode\n", __func__);
+	else
+		debug("%s: switching to Device Mode\n", __func__);
+
+#if CONFIG_IS_ENABLED(DM_REGULATOR)
+	if (priv->vbus_supply) {
+		int ret = regulator_set_enable(priv->vbus_supply,
+					(mode == USB_DR_MODE_PERIPHERAL));
+		if (ret)
+			return ret;
+	}
+#endif
+	priv->otg_phy_mode = mode;
+
+	dwc3_meson_g12a_usb2_set_mode(priv, USB2_OTG_PHY, mode);
+
+	dwc3_meson_g12a_usb_init_mode(priv);
+
+	return 0;
+}
+
+static int dwc3_meson_g12a_get_phys(struct dwc3_meson_g12a *priv)
+{
+	int i, ret;
+
+	for (i = 0 ; i < PHY_COUNT ; ++i) {
+		ret = generic_phy_get_by_name(priv->dev, phy_names[i],
+					      &priv->phys[i]);
+		if (ret == -ENOENT)
+			continue;
+
+		if (ret)
+			return ret;
+
+		if (i == USB3_HOST_PHY)
+			priv->usb3_ports++;
+		else
+			priv->usb2_ports++;
+	}
+
+	debug("%s: usb2 ports: %d\n", __func__, priv->usb2_ports);
+	debug("%s: usb3 ports: %d\n", __func__, priv->usb3_ports);
+
+	return 0;
+}
+
+static int dwc3_meson_g12a_reset_init(struct dwc3_meson_g12a *priv)
+{
+	int ret;
+
+	ret = reset_get_by_index(priv->dev, 0, &priv->reset);
+	if (ret)
+		return ret;
+
+	ret = reset_assert(&priv->reset);
+	udelay(1);
+	ret |= reset_deassert(&priv->reset);
+	if (ret) {
+		reset_free(&priv->reset);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int dwc3_meson_g12a_clk_init(struct dwc3_meson_g12a *priv)
+{
+	int ret;
+
+	ret = clk_get_by_index(priv->dev, 0, &priv->clk);
+	if (ret)
+		return ret;
+
+#if CONFIG_IS_ENABLED(CLK)
+	ret = clk_enable(&priv->clk);
+	if (ret) {
+		clk_free(&priv->clk);
+		return ret;
+	}
+#endif
+
+	return 0;
+}
+
+static int dwc3_meson_g12a_probe(struct udevice *dev)
+{
+	struct dwc3_meson_g12a *priv = dev_get_platdata(dev);
+	int ret, i;
+
+	priv->dev = dev;
+
+	ret = regmap_init_mem(dev_ofnode(dev), &priv->regmap);
+	if (ret)
+		return ret;
+
+	ret = dwc3_meson_g12a_clk_init(priv);
+	if (ret)
+		return ret;
+
+	ret = dwc3_meson_g12a_reset_init(priv);
+	if (ret)
+		return ret;
+
+	ret = dwc3_meson_g12a_get_phys(priv);
+	if (ret)
+		return ret;
+
+#if CONFIG_IS_ENABLED(DM_REGULATOR)
+	ret = device_get_supply_regulator(dev, "vbus-supply",
+					  &priv->vbus_supply);
+	if (ret && ret != -ENOENT) {
+		pr_err("Failed to get PHY regulator\n");
+		return ret;
+	}
+
+	if (priv->vbus_supply) {
+		ret = regulator_set_enable(priv->vbus_supply, true);
+		if (ret)
+			return ret;
+	}
+#endif
+
+	priv->otg_mode = usb_get_dr_mode(dev_of_offset(dev));
+
+	ret = dwc3_meson_g12a_usb_init(priv);
+	if (ret)
+		return ret;
+
+	for (i = 0 ; i < PHY_COUNT ; ++i) {
+		if (!priv->phys[i].dev)
+			continue;
+
+		ret = generic_phy_init(&priv->phys[i]);
+		if (ret)
+			goto err_phy_init;
+	}
+
+	return 0;
+
+err_phy_init:
+	for (i = 0 ; i < PHY_COUNT ; ++i) {
+		if (!priv->phys[i].dev)
+			continue;
+
+		 generic_phy_exit(&priv->phys[i]);
+	}
+
+	return ret;
+}
+
+static int dwc3_meson_g12a_remove(struct udevice *dev)
+{
+	struct dwc3_meson_g12a *priv = dev_get_platdata(dev);
+	int i;
+
+	reset_release_all(&priv->reset, 1);
+
+	clk_release_all(&priv->clk, 1);
+
+	for (i = 0 ; i < PHY_COUNT ; ++i) {
+		if (!priv->phys[i].dev)
+			continue;
+
+		 generic_phy_exit(&priv->phys[i]);
+	}
+
+	return dm_scan_fdt_dev(dev);
+}
+
+static const struct udevice_id dwc3_meson_g12a_ids[] = {
+	{ .compatible = "amlogic,meson-g12a-usb-ctrl" },
+	{ }
+};
+
+U_BOOT_DRIVER(dwc3_generic_wrapper) = {
+	.name	= "dwc3-meson-g12a",
+	.id	= UCLASS_SIMPLE_BUS,
+	.of_match = dwc3_meson_g12a_ids,
+	.probe = dwc3_meson_g12a_probe,
+	.remove = dwc3_meson_g12a_remove,
+	.platdata_auto_alloc_size = sizeof(struct dwc3_meson_g12a),
+
+};

commit dff9f0f7f06c7322576c9f76c69940c1c022324d
Author: Adam Ford <aford173@gmail.com>
Date:   Tue Apr 30 05:21:41 2019 -0500

    UPSTREAM: usb: ohci: ohci-da8xx: Enable da850-ohci driver with DM support
    
    This patch reuses some former code for the hawkboard, combines it
    with some some similar DM_USB compatible code for the OHCI driver,
    and enables the use of the da850's OHCI controller with DM_USB
    compatibility.
    
    Change-Id: I86a1fdf6bf2163deae6b6f8c09fcb0ea53b73067
    Signed-off-by: Adam Ford <aford173@gmail.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 9da5474389c784474274d8e1d1d04fab924d3c39)

diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index c6fd2df590..d1280ec9cb 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -211,6 +211,11 @@ config USB_OHCI_GENERIC
 	---help---
 	  Enables support for generic OHCI controller.
 
+config USB_OHCI_DA8XX
+	bool "Support for da850 OHCI USB controller"
+	help
+	  Enable support for the da850 USB controller.
+
 endif # USB_OHCI_HCD
 
 config USB_UHCI_HCD
diff --git a/drivers/usb/host/ohci-da8xx.c b/drivers/usb/host/ohci-da8xx.c
index 9816628065..25fe17ca3f 100644
--- a/drivers/usb/host/ohci-da8xx.c
+++ b/drivers/usb/host/ohci-da8xx.c
@@ -5,9 +5,54 @@
  */
 
 #include <common.h>
-
+#include <asm/io.h>
+#include <clk.h>
+#include <dm.h>
+#include <dm/ofnode.h>
+#include <generic-phy.h>
+#include <reset.h>
+#include "ohci.h"
 #include <asm/arch/da8xx-usb.h>
 
+struct da8xx_ohci {
+	ohci_t ohci;
+	struct clk *clocks;	/* clock list */
+	struct phy phy;
+	int clock_count;	/* number of clock in clock list */
+};
+
+static int usb_phy_on(void)
+{
+	unsigned long timeout;
+
+	clrsetbits_le32(&davinci_syscfg_regs->cfgchip2,
+			(CFGCHIP2_RESET | CFGCHIP2_PHYPWRDN |
+			CFGCHIP2_OTGPWRDN | CFGCHIP2_OTGMODE |
+			CFGCHIP2_REFFREQ | CFGCHIP2_USB1PHYCLKMUX),
+			(CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN |
+			CFGCHIP2_PHY_PLLON | CFGCHIP2_REFFREQ_24MHZ |
+			CFGCHIP2_USB2PHYCLKMUX | CFGCHIP2_USB1SUSPENDM));
+
+	/* wait until the usb phy pll locks */
+	timeout = get_timer(0);
+	while (get_timer(timeout) < 10) {
+		if (readl(&davinci_syscfg_regs->cfgchip2) & CFGCHIP2_PHYCLKGD)
+			return 1;
+	}
+
+	/* USB phy was not turned on */
+	return 0;
+}
+
+static void usb_phy_off(void)
+{
+	/* Power down the on-chip PHY. */
+	clrsetbits_le32(&davinci_syscfg_regs->cfgchip2,
+			CFGCHIP2_PHY_PLLON | CFGCHIP2_USB1SUSPENDM,
+			CFGCHIP2_PHYPWRDN | CFGCHIP2_OTGPWRDN |
+			CFGCHIP2_RESET);
+}
+
 int usb_cpu_init(void)
 {
 	/* enable psc for usb2.0 */
@@ -38,3 +83,94 @@ int usb_cpu_init_fail(void)
 {
 	return usb_cpu_stop();
 }
+
+#if CONFIG_IS_ENABLED(DM_USB)
+static int ohci_da8xx_probe(struct udevice *dev)
+{
+	struct ohci_regs *regs = (struct ohci_regs *)devfdt_get_addr(dev);
+	struct da8xx_ohci *priv = dev_get_priv(dev);
+	int i, err, ret, clock_nb;
+
+	err = 0;
+	priv->clock_count = 0;
+	clock_nb = dev_count_phandle_with_args(dev, "clocks", "#clock-cells");
+	if (clock_nb > 0) {
+		priv->clocks = devm_kcalloc(dev, clock_nb, sizeof(struct clk),
+					    GFP_KERNEL);
+		if (!priv->clocks)
+			return -ENOMEM;
+
+		for (i = 0; i < clock_nb; i++) {
+			err = clk_get_by_index(dev, i, &priv->clocks[i]);
+			if (err < 0)
+				break;
+
+			err = clk_enable(&priv->clocks[i]);
+			if (err) {
+				dev_err(dev, "failed to enable clock %d\n", i);
+				clk_free(&priv->clocks[i]);
+				goto clk_err;
+			}
+			priv->clock_count++;
+		}
+	} else if (clock_nb != -ENOENT) {
+		dev_err(dev, "failed to get clock phandle(%d)\n", clock_nb);
+		return clock_nb;
+	}
+
+	err = usb_cpu_init();
+
+	if (err)
+		goto clk_err;
+
+	err = ohci_register(dev, regs);
+	if (err)
+		goto phy_err;
+
+	return 0;
+
+phy_err:
+	ret = usb_cpu_stop();
+	if (ret)
+		dev_err(dev, "failed to shutdown usb phy\n");
+
+clk_err:
+	ret = clk_release_all(priv->clocks, priv->clock_count);
+	if (ret)
+		dev_err(dev, "failed to disable all clocks\n");
+
+	return err;
+}
+
+static int ohci_da8xx_remove(struct udevice *dev)
+{
+	struct da8xx_ohci *priv = dev_get_priv(dev);
+	int ret;
+
+	ret = ohci_deregister(dev);
+	if (ret)
+		return ret;
+
+	ret = usb_cpu_stop();
+	if (ret)
+		return ret;
+
+	return clk_release_all(priv->clocks, priv->clock_count);
+}
+
+static const struct udevice_id da8xx_ohci_ids[] = {
+	{ .compatible = "ti,da830-ohci" },
+	{ }
+};
+
+U_BOOT_DRIVER(ohci_generic) = {
+	.name	= "ohci-da8xx",
+	.id	= UCLASS_USB,
+	.of_match = da8xx_ohci_ids,
+	.probe = ohci_da8xx_probe,
+	.remove = ohci_da8xx_remove,
+	.ops	= &ohci_usb_ops,
+	.priv_auto_alloc_size = sizeof(struct da8xx_ohci),
+	.flags	= DM_FLAG_ALLOC_PRIV_DMA,
+};
+#endif

commit 200d235e496356bf8c21e04cc6734666db5ce45a
Author: Adam Ford <aford173@gmail.com>
Date:   Sun Apr 28 16:45:25 2019 -0500

    UPSTREAM: usb: ohci: Re-enable commented out delay
    
    There is a delay function that was commented out.  This patch
    re-enables it, because it will be needed for da850 ohci support.
    
    Change-Id: Ibfbe2844807ac13501cc17a297c724791e1eac52
    Signed-off-by: Adam Ford <aford173@gmail.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit e0b0af666a81f166397e3aebd26e9401ae48c97d)

diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c
index fc3589ccb2..721efec115 100644
--- a/drivers/usb/host/ohci-hcd.c
+++ b/drivers/usb/host/ohci-hcd.c
@@ -1546,10 +1546,8 @@ static int submit_common_msg(ohci_t *ohci, struct usb_device *dev,
 		return -1;
 	}
 
-#if 0
 	mdelay(10);
 	/* ohci_dump_status(ohci); */
-#endif
 
 	timeout = USB_TIMEOUT_MS(pipe);
 

commit 0163d8d8bfe3fefaae247cd1709853bdcd64cf01
Author: Lukasz Majewski <lukma@denx.de>
Date:   Thu Apr 4 12:26:52 2019 +0200

    UPSTREAM: USB: DM: Convert i.MX5 ehci code to driver model
    
    This commit converts i.MX5's EHCI USB host driver to driver model (DM_USB).
    It is a straightforward conversion (to reuse as much code as possible),
    based on ehci-mx6.c code.
    
    Change-Id: I14727c670f5ecf78f2caaab56f04d8be578a91fb
    Signed-off-by: Lukasz Majewski <lukma@denx.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 22988766da6fe200b6947b8181ddbde663643248)

diff --git a/drivers/usb/host/ehci-mx5.c b/drivers/usb/host/ehci-mx5.c
index 2b36cebdb3..19f31485db 100644
--- a/drivers/usb/host/ehci-mx5.c
+++ b/drivers/usb/host/ehci-mx5.c
@@ -13,6 +13,8 @@
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/clock.h>
+#include <dm.h>
+#include <power/regulator.h>
 
 #include "ehci.h"
 
@@ -224,6 +226,7 @@ __weak void mx5_ehci_powerup_fixup(struct ehci_ctrl *ctrl, uint32_t *status_reg,
 	mdelay(50);
 }
 
+#if !CONFIG_IS_ENABLED(DM_USB)
 static const struct ehci_ops mx5_ehci_ops = {
 	.powerup_fixup		= mx5_ehci_powerup_fixup,
 };
@@ -268,3 +271,103 @@ int ehci_hcd_stop(int index)
 {
 	return 0;
 }
+#else /* CONFIG_IS_ENABLED(DM_USB) */
+struct ehci_mx5_priv_data {
+	struct ehci_ctrl ctrl;
+	struct usb_ehci *ehci;
+	struct udevice *vbus_supply;
+	enum usb_init_type init_type;
+	int portnr;
+};
+
+static const struct ehci_ops mx5_ehci_ops = {
+	.powerup_fixup		= mx5_ehci_powerup_fixup,
+};
+
+static int ehci_usb_ofdata_to_platdata(struct udevice *dev)
+{
+	struct usb_platdata *plat = dev_get_platdata(dev);
+	const char *mode;
+
+	mode = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "dr_mode", NULL);
+	if (mode) {
+		if (strcmp(mode, "peripheral") == 0)
+			plat->init_type = USB_INIT_DEVICE;
+		else if (strcmp(mode, "host") == 0)
+			plat->init_type = USB_INIT_HOST;
+		else
+			return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int ehci_usb_probe(struct udevice *dev)
+{
+	struct usb_platdata *plat = dev_get_platdata(dev);
+	struct usb_ehci *ehci = (struct usb_ehci *)devfdt_get_addr(dev);
+	struct ehci_mx5_priv_data *priv = dev_get_priv(dev);
+	enum usb_init_type type = plat->init_type;
+	struct ehci_hccr *hccr;
+	struct ehci_hcor *hcor;
+	int ret;
+
+	set_usboh3_clk();
+	enable_usboh3_clk(true);
+	set_usb_phy_clk();
+	enable_usb_phy1_clk(true);
+	enable_usb_phy2_clk(true);
+	mdelay(1);
+
+	priv->ehci = ehci;
+	priv->portnr = dev->seq;
+	priv->init_type = type;
+
+	ret = device_get_supply_regulator(dev, "vbus-supply",
+					  &priv->vbus_supply);
+	if (ret)
+		debug("%s: No vbus supply\n", dev->name);
+
+	if (!ret && priv->vbus_supply) {
+		ret = regulator_set_enable(priv->vbus_supply,
+					   (type == USB_INIT_DEVICE) ?
+					   false : true);
+		if (ret) {
+			puts("Error enabling VBUS supply\n");
+			return ret;
+		}
+	}
+
+	hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
+	hcor = (struct ehci_hcor *)((uint32_t)hccr +
+			HC_LENGTH(ehci_readl(&(hccr)->cr_capbase)));
+	setbits_le32(&ehci->usbmode, CM_HOST);
+
+	__raw_writel(CONFIG_MXC_USB_PORTSC, &ehci->portsc);
+	setbits_le32(&ehci->portsc, USB_EN);
+
+	mxc_set_usbcontrol(priv->portnr, CONFIG_MXC_USB_FLAGS);
+	mdelay(10);
+
+	return ehci_register(dev, hccr, hcor, &mx5_ehci_ops, 0,
+			     priv->init_type);
+}
+
+static const struct udevice_id mx5_usb_ids[] = {
+	{ .compatible = "fsl,imx53-usb" },
+	{ }
+};
+
+U_BOOT_DRIVER(usb_mx5) = {
+	.name	= "ehci_mx5",
+	.id	= UCLASS_USB,
+	.of_match = mx5_usb_ids,
+	.ofdata_to_platdata = ehci_usb_ofdata_to_platdata,
+	.probe	= ehci_usb_probe,
+	.remove = ehci_deregister,
+	.ops	= &ehci_usb_ops,
+	.platdata_auto_alloc_size = sizeof(struct usb_platdata),
+	.priv_auto_alloc_size = sizeof(struct ehci_mx5_priv_data),
+	.flags	= DM_FLAG_ALLOC_PRIV_DMA,
+};
+#endif /* !CONFIG_IS_ENABLED(DM_USB) */

commit 24b360da41304fb31bf5b3ac36f650bdc7f7f071
Author: Fabrice Gasnier <fabrice.gasnier@st.com>
Date:   Wed Apr 17 16:46:13 2019 +0200

    UPSTREAM: usb: dwc2: fix gadget disconnect
    
    This fixes a disconnect issue detected with fastboot command, when using
    dwc2 driver.
    - On u-boot side:
    uboot>$ fastboot 0
    - On USB host PC side, few seconds after
    PC>$ fastboot reboot # Get stuck, uboot target never reboots
    
    By enabling DEBUG_ISR logs, the bus suspend interrupt is seen before the
    PC command has been issued. When the USB bus suspend occurs, there's a HACK
    that disables the fastboot (composite driver). Here is the call stack
    upon USB bus suspend:
    - dwc2_handle_usb_suspend_intr()
      - dev->driver->disconnect()
        - composite_disconnect()
          - reset_config()
            - f->disable()
              - fastboot_disable()
                - usb_ep_disable(f_fb->out_ep);
                - usb_ep_disable(f_fb->in_ep);
                .. other disable calls.
    
    When the resume interrupt happens, everything has been disabled, then
    nothing happens. fastboot command gets stuck on HOST side.
    
    Remove original HACK, that disconnects the composite driver upon
    USB bus suspend. Implement disconnect detection instead:
    - check GINTSTS OTG interrupt
    - read GOTGINT register
    - check GOTGINT, SesEndDet bit (e.g. session end)
    This is inspired by what is implemented currently in Linux dwc2 driver.
    
    Change-Id: I061bf19a7be2c85fdde3490ef792f18612de9c56
    Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
    Reviewed-by: Marek Vasut <marex@denx.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 7fd9f31c6bd13609da61b985cf8f5f65ebebd913)

diff --git a/drivers/usb/gadget/dwc2_udc_otg_regs.h b/drivers/usb/gadget/dwc2_udc_otg_regs.h
index 3675eadc8b..e32ad4a6a7 100644
--- a/drivers/usb/gadget/dwc2_udc_otg_regs.h
+++ b/drivers/usb/gadget/dwc2_udc_otg_regs.h
@@ -95,6 +95,9 @@ struct dwc2_usbotg_reg {
 #define A_VALOVAL			BIT(5)
 #define A_VALOEN			BIT(4)
 
+/* DWC2_UDC_OTG_GOTINT */
+#define GOTGINT_SES_END_DET		(1<<2)
+
 /* DWC2_UDC_OTG_GAHBCFG */
 #define PTXFE_HALF			(0<<8)
 #define PTXFE_ZERO			(1<<8)
@@ -127,6 +130,7 @@ struct dwc2_usbotg_reg {
 #define INT_NP_TX_FIFO_EMPTY		(0x1<<5)
 #define INT_RX_FIFO_NOT_EMPTY		(0x1<<4)
 #define INT_SOF			(0x1<<3)
+#define INT_OTG			(0x1<<2)
 #define INT_DEV_MODE			(0x0<<0)
 #define INT_HOST_MODE			(0x1<<1)
 #define INT_GOUTNakEff			(0x01<<7)
@@ -256,7 +260,7 @@ struct dwc2_usbotg_reg {
 
 /* Masks definitions */
 #define GINTMSK_INIT	(INT_OUT_EP | INT_IN_EP | INT_RESUME | INT_ENUMDONE\
-			| INT_RESET | INT_SUSPEND)
+			| INT_RESET | INT_SUSPEND | INT_OTG)
 #define DOEPMSK_INIT	(CTRL_OUT_EP_SETUP_PHASE_DONE | AHB_ERROR|TRANSFER_DONE)
 #define DIEPMSK_INIT	(NON_ISO_IN_EP_TIMEOUT|AHB_ERROR|TRANSFER_DONE)
 #define GAHBCFG_INIT	(PTXFE_HALF | NPTXFE_HALF | MODE_DMA | BURST_INCR4\
diff --git a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
index a306ec55c7..28d026f5a5 100644
--- a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
+++ b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
@@ -468,7 +468,7 @@ static void process_ep_out_intr(struct dwc2_udc *dev)
 static int dwc2_udc_irq(int irq, void *_dev)
 {
 	struct dwc2_udc *dev = _dev;
-	u32 intr_status;
+	u32 intr_status, gotgint;
 	u32 usb_status, gintmsk;
 	unsigned long flags = 0;
 
@@ -522,14 +522,24 @@ static int dwc2_udc_irq(int irq, void *_dev)
 		    && dev->driver) {
 			if (dev->driver->suspend)
 				dev->driver->suspend(&dev->gadget);
+		}
+	}
+
+	if (intr_status & INT_OTG) {
+		gotgint = readl(&reg->gotgint);
+		debug_cond(DEBUG_ISR,
+			   "\tOTG interrupt: (GOTGINT):0x%x\n", gotgint);
 
-			/* HACK to let gadget detect disconnected state */
+		if (gotgint & GOTGINT_SES_END_DET) {
+			debug_cond(DEBUG_ISR, "\t\tSession End Detected\n");
+			/* Let gadget detect disconnected state */
 			if (dev->driver->disconnect) {
 				spin_unlock_irqrestore(&dev->lock, flags);
 				dev->driver->disconnect(&dev->gadget);
 				spin_lock_irqsave(&dev->lock, flags);
 			}
 		}
+		writel(gotgint, &reg->gotgint);
 	}
 
 	if (intr_status & INT_RESUME) {

commit db704406b392eb9fd505131a21ab7c14074c4807
Author: Patrick Delaunay <patrick.delaunay@st.com>
Date:   Fri Mar 29 15:42:24 2019 +0100

    UPSTREAM: stm32mp1: add stusb1600 support for DK1 and DK2 board
    
    The DK1 and DK2 boards use the USB Type-C controller STUSB1600.
    This patch updates:
    - the device tree to add the I2C node in the DT
    - the board stm32mp1 to probe this I2C device and use this controller
      to check cable detection.
    - the DWC2 driver to support a new dt property
      "u-boot,force-b-session-valid" which forces B session and
      device mode; it is a workaround because the VBUS sensing and
      ID detection isn't available with stusb1600.
    
    Conflicts:
            arch/arm/dts/stm32mp157-pinctrl.dtsi
            arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi
            arch/arm/dts/stm32mp157a-dk1.dts
            board/st/stm32mp1/stm32mp1.c
    
    Change-Id: I73b62dce9c3e0661e6d2463b87389229cd3559a7
    Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
    Reviewed-by: Lukasz Majewski <lukma@denx.de>
    (cherry picked from commit 6fe7dd3327d552bacf4266d7f1ed074bf98ffb92)

diff --git a/arch/arm/dts/stm32mp157-pinctrl.dtsi b/arch/arm/dts/stm32mp157-pinctrl.dtsi
new file mode 100644
index 0000000000..0aae69b0a0
--- /dev/null
+++ b/arch/arm/dts/stm32mp157-pinctrl.dtsi
@@ -0,0 +1,453 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
+ * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
+ */
+#include <dt-bindings/pinctrl/stm32-pinfunc.h>
+
+/ {
+	soc {
+		pinctrl: pin-controller@50002000 {
+			#address-cells = <1>;
+			#size-cells = <1>;
+			compatible = "st,stm32mp157-pinctrl";
+			ranges = <0 0x50002000 0xa400>;
+			interrupt-parent = <&exti>;
+			st,syscfg = <&exti 0x60 0xff>;
+			pins-are-numbered;
+
+			gpioa: gpio@50002000 {
+				gpio-controller;
+				#gpio-cells = <2>;
+				interrupt-controller;
+				#interrupt-cells = <2>;
+				reg = <0x0 0x400>;
+				clocks = <&rcc GPIOA>;
+				st,bank-name = "GPIOA";
+				ngpios = <16>;
+				gpio-ranges = <&pinctrl 0 0 16>;
+			};
+
+			gpiob: gpio@50003000 {
+				gpio-controller;
+				#gpio-cells = <2>;
+				interrupt-controller;
+				#interrupt-cells = <2>;
+				reg = <0x1000 0x400>;
+				clocks = <&rcc GPIOB>;
+				st,bank-name = "GPIOB";
+				ngpios = <16>;
+				gpio-ranges = <&pinctrl 0 16 16>;
+			};
+
+			gpioc: gpio@50004000 {
+				gpio-controller;
+				#gpio-cells = <2>;
+				interrupt-controller;
+				#interrupt-cells = <2>;
+				reg = <0x2000 0x400>;
+				clocks = <&rcc GPIOC>;
+				st,bank-name = "GPIOC";
+				ngpios = <16>;
+				gpio-ranges = <&pinctrl 0 32 16>;
+			};
+
+			gpiod: gpio@50005000 {
+				gpio-controller;
+				#gpio-cells = <2>;
+				interrupt-controller;
+				#interrupt-cells = <2>;
+				reg = <0x3000 0x400>;
+				clocks = <&rcc GPIOD>;
+				st,bank-name = "GPIOD";
+				ngpios = <16>;
+				gpio-ranges = <&pinctrl 0 48 16>;
+			};
+
+			gpioe: gpio@50006000 {
+				gpio-controller;
+				#gpio-cells = <2>;
+				interrupt-controller;
+				#interrupt-cells = <2>;
+				reg = <0x4000 0x400>;
+				clocks = <&rcc GPIOE>;
+				st,bank-name = "GPIOE";
+				ngpios = <16>;
+				gpio-ranges = <&pinctrl 0 64 16>;
+			};
+
+			gpiof: gpio@50007000 {
+				gpio-controller;
+				#gpio-cells = <2>;
+				interrupt-controller;
+				#interrupt-cells = <2>;
+				reg = <0x5000 0x400>;
+				clocks = <&rcc GPIOF>;
+				st,bank-name = "GPIOF";
+				ngpios = <16>;
+				gpio-ranges = <&pinctrl 0 80 16>;
+			};
+
+			gpiog: gpio@50008000 {
+				gpio-controller;
+				#gpio-cells = <2>;
+				interrupt-controller;
+				#interrupt-cells = <2>;
+				reg = <0x6000 0x400>;
+				clocks = <&rcc GPIOG>;
+				st,bank-name = "GPIOG";
+				ngpios = <16>;
+				gpio-ranges = <&pinctrl 0 96 16>;
+			};
+
+			gpioh: gpio@50009000 {
+				gpio-controller;
+				#gpio-cells = <2>;
+				interrupt-controller;
+				#interrupt-cells = <2>;
+				reg = <0x7000 0x400>;
+				clocks = <&rcc GPIOH>;
+				st,bank-name = "GPIOH";
+				ngpios = <16>;
+				gpio-ranges = <&pinctrl 0 112 16>;
+			};
+
+			gpioi: gpio@5000a000 {
+				gpio-controller;
+				#gpio-cells = <2>;
+				interrupt-controller;
+				#interrupt-cells = <2>;
+				reg = <0x8000 0x400>;
+				clocks = <&rcc GPIOI>;
+				st,bank-name = "GPIOI";
+				ngpios = <16>;
+				gpio-ranges = <&pinctrl 0 128 16>;
+			};
+
+			gpioj: gpio@5000b000 {
+				gpio-controller;
+				#gpio-cells = <2>;
+				interrupt-controller;
+				#interrupt-cells = <2>;
+				reg = <0x9000 0x400>;
+				clocks = <&rcc GPIOJ>;
+				st,bank-name = "GPIOJ";
+				ngpios = <16>;
+				gpio-ranges = <&pinctrl 0 144 16>;
+			};
+
+			gpiok: gpio@5000c000 {
+				gpio-controller;
+				#gpio-cells = <2>;
+				interrupt-controller;
+				#interrupt-cells = <2>;
+				reg = <0xa000 0x400>;
+				clocks = <&rcc GPIOK>;
+				st,bank-name = "GPIOK";
+				ngpios = <8>;
+				gpio-ranges = <&pinctrl 0 160 8>;
+			};
+
+			adc12_usb_pwr_pins_a: adc12-usb-pwr-pins-0 {
+				pins {
+					pinmux = <STM32_PINMUX('A', 4, ANALOG)>, /* ADC12 in18 */
+						 <STM32_PINMUX('A', 5, ANALOG)>; /* ADC12 in19 */
+				};
+			};
+
+			cec_pins_a: cec-0 {
+				pins {
+					pinmux = <STM32_PINMUX('A', 15, AF4)>;
+					bias-disable;
+					drive-open-drain;
+					slew-rate = <0>;
+				};
+			};
+
+			ethernet0_rgmii_pins_a: rgmii-0 {
+				pins1 {
+					pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
+						 <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
+						 <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
+						 <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
+						 <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
+						 <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
+						 <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
+						 <STM32_PINMUX('A', 2, AF11)>, /* ETH_MDIO */
+						 <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
+					bias-disable;
+					drive-push-pull;
+					slew-rate = <3>;
+				};
+				pins2 {
+					pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
+						 <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
+						 <STM32_PINMUX('B', 0, AF11)>, /* ETH_RGMII_RXD2 */
+						 <STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */
+						 <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
+						 <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
+					bias-disable;
+				};
+			};
+
+			ethernet0_rgmii_pins_sleep_a: rgmii-sleep-0 {
+				pins1 {
+					pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
+						 <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
+						 <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */
+						 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
+						 <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
+						 <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
+						 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
+						 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
+						 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
+						 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
+						 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
+						 <STM32_PINMUX('B', 0, ANALOG)>, /* ETH_RGMII_RXD2 */
+						 <STM32_PINMUX('B', 1, ANALOG)>, /* ETH_RGMII_RXD3 */
+						 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
+						 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
+				};
+			};
+
+			i2c1_pins_a: i2c1-0 {
+				pins {
+					pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */
+						 <STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */
+					bias-disable;
+					drive-open-drain;
+					slew-rate = <0>;
+				};
+			};
+
+			i2c2_pins_a: i2c2-0 {
+				pins {
+					pinmux = <STM32_PINMUX('H', 4, AF4)>, /* I2C2_SCL */
+						 <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
+					bias-disable;
+					drive-open-drain;
+					slew-rate = <0>;
+				};
+			};
+
+			i2c5_pins_a: i2c5-0 {
+				pins {
+					pinmux = <STM32_PINMUX('A', 11, AF4)>, /* I2C5_SCL */
+						 <STM32_PINMUX('A', 12, AF4)>; /* I2C5_SDA */
+					bias-disable;
+					drive-open-drain;
+					slew-rate = <0>;
+				};
+			};
+
+			m_can1_pins_a: m-can1-0 {
+				pins1 {
+					pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */
+					slew-rate = <1>;
+					drive-push-pull;
+					bias-disable;
+				};
+				pins2 {
+					pinmux = <STM32_PINMUX('I', 9, AF9)>; /* CAN1_RX */
+					bias-disable;
+				};
+			};
+
+			pwm2_pins_a: pwm2-0 {
+				pins {
+					pinmux = <STM32_PINMUX('A', 3, AF1)>; /* TIM2_CH4 */
+					bias-pull-down;
+					drive-push-pull;
+					slew-rate = <0>;
+				};
+			};
+
+			pwm8_pins_a: pwm8-0 {
+				pins {
+					pinmux = <STM32_PINMUX('I', 2, AF3)>; /* TIM8_CH4 */
+					bias-pull-down;
+					drive-push-pull;
+					slew-rate = <0>;
+				};
+			};
+
+			pwm12_pins_a: pwm12-0 {
+				pins {
+					pinmux = <STM32_PINMUX('H', 6, AF2)>; /* TIM12_CH1 */
+					bias-pull-down;
+					drive-push-pull;
+					slew-rate = <0>;
+				};
+			};
+
+			qspi_clk_pins_a: qspi-clk-0 {
+				pins {
+					pinmux = <STM32_PINMUX('F', 10, AF9)>; /* QSPI_CLK */
+					bias-disable;
+					drive-push-pull;
+					slew-rate = <3>;
+				};
+			};
+
+			qspi_bk1_pins_a: qspi-bk1-0 {
+				pins1 {
+					pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QSPI_BK1_IO0 */
+						 <STM32_PINMUX('F', 9, AF10)>, /* QSPI_BK1_IO1 */
+						 <STM32_PINMUX('F', 7, AF9)>, /* QSPI_BK1_IO2 */
+						 <STM32_PINMUX('F', 6, AF9)>; /* QSPI_BK1_IO3 */
+					bias-disable;
+					drive-push-pull;
+					slew-rate = <3>;
+				};
+				pins2 {
+					pinmux = <STM32_PINMUX('B', 6, AF10)>; /* QSPI_BK1_NCS */
+					bias-pull-up;
+					drive-push-pull;
+					slew-rate = <3>;
+				};
+			};
+
+			qspi_bk2_pins_a: qspi-bk2-0 {
+				pins1 {
+					pinmux = <STM32_PINMUX('H', 2, AF9)>, /* QSPI_BK2_IO0 */
+						 <STM32_PINMUX('H', 3, AF9)>, /* QSPI_BK2_IO1 */
+						 <STM32_PINMUX('G', 10, AF11)>, /* QSPI_BK2_IO2 */
+						 <STM32_PINMUX('G', 7, AF11)>; /* QSPI_BK2_IO3 */
+					bias-disable;
+					drive-push-pull;
+					slew-rate = <3>;
+				};
+				pins2 {
+					pinmux = <STM32_PINMUX('C', 0, AF10)>; /* QSPI_BK2_NCS */
+					bias-pull-up;
+					drive-push-pull;
+					slew-rate = <3>;
+				};
+			};
+			sdmmc1_b4_pins_a: sdmmc1-b4@0 {
+				pins {
+					pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
+						 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
+						 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
+						 <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
+						 <STM32_PINMUX('C', 12, AF12)>, /* SDMMC1_CK */
+						 <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
+					slew-rate = <3>;
+					drive-push-pull;
+					bias-disable;
+				};
+			};
+
+			sdmmc1_dir_pins_a: sdmmc1-dir@0 {
+				pins {
+					pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
+						 <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */
+						 <STM32_PINMUX('B', 9, AF11)>, /* SDMMC1_CDIR */
+						 <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
+					slew-rate = <3>;
+					drive-push-pull;
+					bias-pull-up;
+				};
+			};
+			sdmmc2_b4_pins_a: sdmmc2-b4@0 {
+				pins {
+					pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
+						 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
+						 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
+						 <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
+						 <STM32_PINMUX('E', 3, AF9)>, /* SDMMC2_CK */
+						 <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
+					slew-rate = <3>;
+					drive-push-pull;
+					bias-pull-up;
+				};
+			};
+
+			sdmmc2_d47_pins_a: sdmmc2-d47@0 {
+				pins {
+					pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
+						 <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
+						 <STM32_PINMUX('E', 5, AF9)>, /* SDMMC2_D6 */
+						 <STM32_PINMUX('D', 3, AF9)>; /* SDMMC2_D7 */
+					slew-rate = <3>;
+					drive-push-pull;
+					bias-pull-up;
+				};
+			};
+
+			stusb1600_pins_a: stusb1600-0 {
+				pins {
+					pinmux = <STM32_PINMUX('I', 11, ANALOG)>;
+					bias-pull-up;
+				};
+			};
+
+			uart4_pins_a: uart4-0 {
+				pins1 {
+					pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
+					bias-disable;
+					drive-push-pull;
+					slew-rate = <0>;
+				};
+				pins2 {
+					pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
+					bias-disable;
+				};
+			};
+
+			usbotg_hs_pins_a: usbotg_hs-0 {
+				pins {
+					pinmux = <STM32_PINMUX('A', 10, ANALOG)>; /* OTG_ID */
+				};
+			};
+		};
+
+		pinctrl_z: pin-controller-z@54004000 {
+			#address-cells = <1>;
+			#size-cells = <1>;
+			compatible = "st,stm32mp157-z-pinctrl";
+			ranges = <0 0x54004000 0x400>;
+			pins-are-numbered;
+			interrupt-parent = <&exti>;
+			st,syscfg = <&exti 0x60 0xff>;
+
+			gpioz: gpio@54004000 {
+				gpio-controller;
+				#gpio-cells = <2>;
+				interrupt-controller;
+				#interrupt-cells = <2>;
+				reg = <0 0x400>;
+				clocks = <&rcc GPIOZ>;
+				st,bank-name = "GPIOZ";
+				st,bank-ioport = <11>;
+				ngpios = <8>;
+				gpio-ranges = <&pinctrl_z 0 400 8>;
+			};
+
+			i2c4_pins_a: i2c4-0 {
+				pins {
+					pinmux = <STM32_PINMUX('Z', 4, AF6)>, /* I2C4_SCL */
+						 <STM32_PINMUX('Z', 5, AF6)>; /* I2C4_SDA */
+					bias-disable;
+					drive-open-drain;
+					slew-rate = <0>;
+				};
+			};
+
+			spi1_pins_a: spi1-0 {
+				pins1 {
+					pinmux = <STM32_PINMUX('Z', 0, AF5)>, /* SPI1_SCK */
+						 <STM32_PINMUX('Z', 2, AF5)>; /* SPI1_MOSI */
+					bias-disable;
+					drive-push-pull;
+					slew-rate = <1>;
+				};
+
+				pins2 {
+					pinmux = <STM32_PINMUX('Z', 1, AF5)>; /* SPI1_MISO */
+					bias-disable;
+				};
+			};
+		};
+	};
+};
diff --git a/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi b/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi
new file mode 100644
index 0000000000..0f32a38dc9
--- /dev/null
+++ b/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi
@@ -0,0 +1,200 @@
+// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+/*
+ * Copyright : STMicroelectronics 2018
+ */
+
+#include <dt-bindings/clock/stm32mp1-clksrc.h>
+#include "stm32mp157-u-boot.dtsi"
+#include "stm32mp15-ddr3-1x4Gb-1066-binG.dtsi"
+
+/ {
+	aliases {
+		i2c3 = &i2c4;
+		mmc0 = &sdmmc1;
+		usb0 = &usbotg_hs;
+	};
+	config {
+		u-boot,boot-led = "heartbeat";
+		u-boot,error-led = "error";
+		st,adc_usb_pd = <&adc1 18>, <&adc1 19>;
+	};
+	led {
+		red {
+			label = "error";
+			gpios = <&gpioa 13 GPIO_ACTIVE_LOW>;
+			default-state = "off";
+			status = "okay";
+		};
+
+		blue {
+			default-state = "on";
+		};
+	};
+};
+
+&adc {
+	pinctrl-names = "default";
+	pinctrl-0 = <&adc12_usb_pwr_pins_a>;
+	vdd-supply = <&vdd>;
+	vdda-supply = <&vdd>;
+	vref-supply = <&vrefbuf>;
+	status = "okay";
+	adc1: adc@0 {
+		/*
+		 * Type-C USB_PWR_CC1 & USB_PWR_CC2 on in18 & in19.
+		 * Use at least 5 * RC time, e.g. 5 * (Rp + Rd) * C:
+		 * 5 * (56 + 47kOhms) * 5pF => 2.5us.
+		 * Use arbitrary margin here (e.g. 5µs).
+		 */
+		st,min-sample-time-nsecs = <5000>;
+		/* ANA0, ANA1, USB Type-C CC1 & CC2 */
+		st,adc-channels = <0 1 18 19>;
+		status = "okay";
+	};
+};
+
+&clk_hse {
+	st,digbypass;
+};
+
+&i2c4 {
+	u-boot,dm-pre-reloc;
+};
+
+&i2c4_pins_a {
+	u-boot,dm-pre-reloc;
+	pins {
+		u-boot,dm-pre-reloc;
+	};
+};
+
+&pmic {
+	u-boot,dm-pre-reloc;
+};
+
+&rcc {
+	st,clksrc = <
+		CLK_MPU_PLL1P
+		CLK_AXI_PLL2P
+		CLK_MCU_PLL3P
+		CLK_PLL12_HSE
+		CLK_PLL3_HSE
+		CLK_PLL4_HSE
+		CLK_RTC_LSE
+		CLK_MCO1_DISABLED
+		CLK_MCO2_DISABLED
+	>;
+
+	st,clkdiv = <
+		1 /*MPU*/
+		0 /*AXI*/
+		0 /*MCU*/
+		1 /*APB1*/
+		1 /*APB2*/
+		1 /*APB3*/
+		1 /*APB4*/
+		2 /*APB5*/
+		23 /*RTC*/
+		0 /*MCO1*/
+		0 /*MCO2*/
+	>;
+
+	st,pkcs = <
+		CLK_CKPER_HSE
+		CLK_FMC_ACLK
+		CLK_QSPI_ACLK
+		CLK_ETH_DISABLED
+		CLK_SDMMC12_PLL4P
+		CLK_DSI_DSIPLL
+		CLK_STGEN_HSE
+		CLK_USBPHY_HSE
+		CLK_SPI2S1_PLL3Q
+		CLK_SPI2S23_PLL3Q
+		CLK_SPI45_HSI
+		CLK_SPI6_HSI
+		CLK_I2C46_HSI
+		CLK_SDMMC3_PLL4P
+		CLK_USBO_USBPHY
+		CLK_ADC_CKPER
+		CLK_CEC_LSE
+		CLK_I2C12_HSI
+		CLK_I2C35_HSI
+		CLK_UART1_HSI
+		CLK_UART24_HSI
+		CLK_UART35_HSI
+		CLK_UART6_HSI
+		CLK_UART78_HSI
+		CLK_SPDIF_PLL4P
+		CLK_FDCAN_PLL4Q
+		CLK_SAI1_PLL3Q
+		CLK_SAI2_PLL3Q
+		CLK_SAI3_PLL3Q
+		CLK_SAI4_PLL3Q
+		CLK_RNG1_LSI
+		CLK_RNG2_LSI
+		CLK_LPTIM1_PCLK1
+		CLK_LPTIM23_PCLK3
+		CLK_LPTIM45_LSE
+	>;
+
+	/* VCO = 1300.0 MHz => P = 650 (CPU) */
+	pll1: st,pll@0 {
+		cfg = < 2 80 0 0 0 PQR(1,0,0) >;
+		frac = < 0x800 >;
+		u-boot,dm-pre-reloc;
+	};
+
+	/* VCO = 1066.0 MHz => P = 266 (AXI), Q = 533 (GPU), R = 533 (DDR) */
+	pll2: st,pll@1 {
+		cfg = < 2 65 1 0 0 PQR(1,1,1) >;
+		frac = < 0x1400 >;
+		u-boot,dm-pre-reloc;
+	};
+
+	/* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */
+	pll3: st,pll@2 {
+		cfg = < 1 33 1 16 36 PQR(1,1,1) >;
+		frac = < 0x1a04 >;
+		u-boot,dm-pre-reloc;
+	};
+
+	/* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */
+	pll4: st,pll@3 {
+		cfg = < 3 98 5 7 7 PQR(1,1,1) >;
+		u-boot,dm-pre-reloc;
+	};
+};
+
+&sdmmc1 {
+	u-boot,dm-spl;
+};
+
+&sdmmc1_b4_pins_a {
+	u-boot,dm-spl;
+	pins {
+		u-boot,dm-spl;
+	};
+};
+
+&uart4 {
+	u-boot,dm-pre-reloc;
+};
+
+&uart4_pins_a {
+	u-boot,dm-pre-reloc;
+	pins1 {
+		u-boot,dm-pre-reloc;
+	};
+	pins2 {
+		u-boot,dm-pre-reloc;
+	};
+};
+
+&usbotg_hs {
+	u-boot,force-b-session-valid;
+	hnp-srp-disable;
+};
+
+&v3v3 {
+	regulator-always-on;
+};
diff --git a/arch/arm/dts/stm32mp157a-dk1.dts b/arch/arm/dts/stm32mp157a-dk1.dts
new file mode 100644
index 0000000000..e36773dde9
--- /dev/null
+++ b/arch/arm/dts/stm32mp157a-dk1.dts
@@ -0,0 +1,294 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
+ * Author: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics.
+ */
+
+/dts-v1/;
+
+#include "stm32mp157c.dtsi"
+#include "stm32mp157-pinctrl.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/mfd/st,stpmic1.h>
+
+/ {
+	model = "STMicroelectronics STM32MP157A-DK1 Discovery Board";
+	compatible = "st,stm32mp157a-dk1", "st,stm32mp157";
+
+	aliases {
+		ethernet0 = &ethernet0;
+		serial0 = &uart4;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory@c0000000 {
+		reg = <0xc0000000 0x20000000>;
+	};
+
+	led {
+		compatible = "gpio-leds";
+		blue {
+			label = "heartbeat";
+			gpios = <&gpiod 11 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "heartbeat";
+			default-state = "off";
+		};
+	};
+};
+
+&ethernet0 {
+	status = "okay";
+	pinctrl-0 = <&ethernet0_rgmii_pins_a>;
+	pinctrl-1 = <&ethernet0_rgmii_pins_sleep_a>;
+	pinctrl-names = "default", "sleep";
+	phy-mode = "rgmii";
+	max-speed = <1000>;
+	phy-handle = <&phy0>;
+
+	mdio0 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "snps,dwmac-mdio";
+		phy0: ethernet-phy@0 {
+			reg = <0>;
+		};
+	};
+};
+
+&i2c4 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c4_pins_a>;
+	i2c-scl-rising-time-ns = <185>;
+	i2c-scl-falling-time-ns = <20>;
+	status = "okay";
+	/delete-property/dmas;
+	/delete-property/dma-names;
+
+	typec: stusb1600@28 {
+		compatible = "st,stusb1600";
+		reg = <0x28>;
+		interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
+		interrupt-parent = <&gpioi>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&stusb1600_pins_a>;
+
+		status = "okay";
+
+		typec_con: connector {
+			compatible = "usb-c-connector";
+			label = "USB-C";
+			power-role = "sink";
+			power-opmode = "default";
+		};
+	};
+
+	pmic: stpmic@33 {
+		compatible = "st,stpmic1";
+		reg = <0x33>;
+		interrupt-controller;
+		#interrupt-cells = <2>;
+		status = "okay";
+
+		st,main-control-register = <0x04>;
+		st,vin-control-register = <0xc0>;
+		st,usb-control-register = <0x20>;
+
+		regulators {
+			compatible = "st,stpmic1-regulators";
+
+			ldo1-supply = <&v3v3>;
+			ldo3-supply = <&vdd_ddr>;
+			ldo6-supply = <&v3v3>;
+			pwr_sw1-supply = <&bst_out>;
+			pwr_sw2-supply = <&bst_out>;
+
+			vddcore: buck1 {
+				regulator-name = "vddcore";
+				regulator-min-microvolt = <1200000>;
+				regulator-max-microvolt = <1350000>;
+				regulator-always-on;
+				regulator-initial-mode = <0>;
+				regulator-over-current-protection;
+			};
+
+			vdd_ddr: buck2 {
+				regulator-name = "vdd_ddr";
+				regulator-min-microvolt = <1350000>;
+				regulator-max-microvolt = <1350000>;
+				regulator-always-on;
+				regulator-initial-mode = <0>;
+				regulator-over-current-protection;
+			};
+
+			vdd: buck3 {
+				regulator-name = "vdd";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+				st,mask-reset;
+				regulator-initial-mode = <0>;
+				regulator-over-current-protection;
+			};
+
+			v3v3: buck4 {
+				regulator-name = "v3v3";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+				regulator-over-current-protection;
+				regulator-initial-mode = <0>;
+			};
+
+			v1v8_audio: ldo1 {
+				regulator-name = "v1v8_audio";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+				interrupts = <IT_CURLIM_LDO1 0>;
+			};
+
+			v3v3_hdmi: ldo2 {
+				regulator-name = "v3v3_hdmi";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+				interrupts = <IT_CURLIM_LDO2 0>;
+			};
+
+			vtt_ddr: ldo3 {
+				regulator-name = "vtt_ddr";
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <750000>;
+				regulator-always-on;
+				regulator-over-current-protection;
+			};
+
+			vdd_usb: ldo4 {
+				regulator-name = "vdd_usb";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				interrupts = <IT_CURLIM_LDO4 0>;
+			};
+
+			vdda: ldo5 {
+				regulator-name = "vdda";
+				regulator-min-microvolt = <2900000>;
+				regulator-max-microvolt = <2900000>;
+				interrupts = <IT_CURLIM_LDO5 0>;
+				regulator-boot-on;
+			};
+
+			v1v2_hdmi: ldo6 {
+				regulator-name = "v1v2_hdmi";
+				regulator-min-microvolt = <1200000>;
+				regulator-max-microvolt = <1200000>;
+				regulator-always-on;
+				interrupts = <IT_CURLIM_LDO6 0>;
+
+			};
+
+			vref_ddr: vref_ddr {
+				regulator-name = "vref_ddr";
+				regulator-always-on;
+				regulator-over-current-protection;
+			};
+
+			 bst_out: boost {
+				regulator-name = "bst_out";
+				interrupts = <IT_OCP_BOOST 0>;
+			 };
+
+			vbus_otg: pwr_sw1 {
+				regulator-name = "vbus_otg";
+				interrupts = <IT_OCP_OTG 0>;
+				regulator-active-discharge;
+			 };
+
+			 vbus_sw: pwr_sw2 {
+				regulator-name = "vbus_sw";
+				interrupts = <IT_OCP_SWOUT 0>;
+				regulator-active-discharge;
+			 };
+		};
+
+		onkey {
+			compatible = "st,stpmic1-onkey";
+			interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 1>;
+			interrupt-names = "onkey-falling", "onkey-rising";
+			status = "okay";
+		};
+
+		watchdog {
+			compatible = "st,stpmic1-wdt";
+			status = "disabled";
+		};
+	};
+};
+
+&iwdg2 {
+	timeout-sec = <32>;
+	status = "okay";
+};
+
+&pwr {
+	pwr-supply = <&vdd>;
+};
+
+&rng1 {
+	status = "okay";
+};
+
+&rtc {
+	status = "okay";
+};
+
+&sdmmc1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&sdmmc1_b4_pins_a>;
+	broken-cd;
+	st,neg-edge;
+	bus-width = <4>;
+	vmmc-supply = <&v3v3>;
+	status = "okay";
+};
+
+&uart4 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart4_pins_a>;
+	status = "okay";
+};
+
+&usbh_ehci {
+	phys = <&usbphyc_port0>;
+	phy-names = "usb";
+	status = "okay";
+};
+
+&usbotg_hs {
+	dr_mode = "peripheral";
+	phys = <&usbphyc_port1 0>;
+	phy-names = "usb2-phy";
+	status = "okay";
+};
+
+&usbphyc {
+	status = "okay";
+};
+
+&usbphyc_port0 {
+	phy-supply = <&vdd_usb>;
+};
+
+&usbphyc_port1 {
+	phy-supply = <&vdd_usb>;
+};
+
+&vrefbuf {
+	regulator-min-microvolt = <2500000>;
+	regulator-max-microvolt = <2500000>;
+	vdda-supply = <&vdd>;
+	status = "okay";
+};
diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c
new file mode 100644
index 0000000000..76917b022e
--- /dev/null
+++ b/board/st/stm32mp1/stm32mp1.c
@@ -0,0 +1,506 @@
+// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+/*
+ * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
+ */
+#include <common.h>
+#include <adc.h>
+#include <config.h>
+#include <clk.h>
+#include <dm.h>
+#include <g_dnl.h>
+#include <generic-phy.h>
+#include <i2c.h>
+#include <led.h>
+#include <misc.h>
+#include <phy.h>
+#include <reset.h>
+#include <syscon.h>
+#include <usb.h>
+#include <asm/io.h>
+#include <asm/gpio.h>
+#include <asm/arch/stm32.h>
+#include <power/regulator.h>
+#include <usb/dwc2_udc.h>
+
+/* SYSCFG registers */
+#define SYSCFG_BOOTR		0x00
+#define SYSCFG_PMCSETR		0x04
+#define SYSCFG_IOCTRLSETR	0x18
+#define SYSCFG_ICNR		0x1C
+#define SYSCFG_CMPCR		0x20
+#define SYSCFG_CMPENSETR	0x24
+#define SYSCFG_PMCCLRR		0x44
+
+#define SYSCFG_BOOTR_BOOT_MASK		GENMASK(2, 0)
+#define SYSCFG_BOOTR_BOOTPD_SHIFT	4
+
+#define SYSCFG_IOCTRLSETR_HSLVEN_TRACE		BIT(0)
+#define SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI	BIT(1)
+#define SYSCFG_IOCTRLSETR_HSLVEN_ETH		BIT(2)
+#define SYSCFG_IOCTRLSETR_HSLVEN_SDMMC		BIT(3)
+#define SYSCFG_IOCTRLSETR_HSLVEN_SPI		BIT(4)
+
+#define SYSCFG_CMPCR_SW_CTRL		BIT(1)
+#define SYSCFG_CMPCR_READY		BIT(8)
+
+#define SYSCFG_CMPENSETR_MPU_EN		BIT(0)
+
+#define SYSCFG_PMCSETR_ETH_CLK_SEL	BIT(16)
+#define SYSCFG_PMCSETR_ETH_REF_CLK_SEL	BIT(17)
+
+#define SYSCFG_PMCSETR_ETH_SELMII	BIT(20)
+
+#define SYSCFG_PMCSETR_ETH_SEL_MASK	GENMASK(23, 21)
+#define SYSCFG_PMCSETR_ETH_SEL_GMII_MII	(0 << 21)
+#define SYSCFG_PMCSETR_ETH_SEL_RGMII	(1 << 21)
+#define SYSCFG_PMCSETR_ETH_SEL_RMII	(4 << 21)
+
+/*
+ * Get a global data pointer
+ */
+DECLARE_GLOBAL_DATA_PTR;
+
+#define USB_WARNING_LOW_THRESHOLD_UV	660000
+#define USB_START_LOW_THRESHOLD_UV	1230000
+#define USB_START_HIGH_THRESHOLD_UV	2100000
+
+int checkboard(void)
+{
+	int ret;
+	char *mode;
+	u32 otp;
+	struct udevice *dev;
+	const char *fdt_compat;
+	int fdt_compat_len;
+
+	if (IS_ENABLED(CONFIG_STM32MP1_TRUSTED))
+		mode = "trusted";
+	else
+		mode = "basic";
+
+	printf("Board: stm32mp1 in %s mode", mode);
+	fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
+				 &fdt_compat_len);
+	if (fdt_compat && fdt_compat_len)
+		printf(" (%s)", fdt_compat);
+	puts("\n");
+
+	ret = uclass_get_device_by_driver(UCLASS_MISC,
+					  DM_GET_DRIVER(stm32mp_bsec),
+					  &dev);
+
+	if (!ret)
+		ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
+				&otp, sizeof(otp));
+	if (!ret && otp) {
+		printf("Board: MB%04x Var%d Rev.%c-%02d\n",
+		       otp >> 16,
+		       (otp >> 12) & 0xF,
+		       ((otp >> 8) & 0xF) - 1 + 'A',
+		       otp & 0xF);
+	}
+
+	return 0;
+}
+
+static void board_key_check(void)
+{
+#if defined(CONFIG_FASTBOOT) || defined(CONFIG_CMD_STM32PROG)
+	ofnode node;
+	struct gpio_desc gpio;
+	enum forced_boot_mode boot_mode = BOOT_NORMAL;
+
+	node = ofnode_path("/config");
+	if (!ofnode_valid(node)) {
+		debug("%s: no /config node?\n", __func__);
+		return;
+	}
+#ifdef CONFIG_FASTBOOT
+	if (gpio_request_by_name_nodev(node, "st,fastboot-gpios", 0,
+				       &gpio, GPIOD_IS_IN)) {
+		debug("%s: could not find a /config/st,fastboot-gpios\n",
+		      __func__);
+	} else {
+		if (dm_gpio_get_value(&gpio)) {
+			puts("Fastboot key pressed, ");
+			boot_mode = BOOT_FASTBOOT;
+		}
+
+		dm_gpio_free(NULL, &gpio);
+	}
+#endif
+#ifdef CONFIG_CMD_STM32PROG
+	if (gpio_request_by_name_nodev(node, "st,stm32prog-gpios", 0,
+				       &gpio, GPIOD_IS_IN)) {
+		debug("%s: could not find a /config/st,stm32prog-gpios\n",
+		      __func__);
+	} else {
+		if (dm_gpio_get_value(&gpio)) {
+			puts("STM32Programmer key pressed, ");
+			boot_mode = BOOT_STM32PROG;
+		}
+		dm_gpio_free(NULL, &gpio);
+	}
+#endif
+
+	if (boot_mode != BOOT_NORMAL) {
+		puts("entering download mode...\n");
+		clrsetbits_le32(TAMP_BOOT_CONTEXT,
+				TAMP_BOOT_FORCED_MASK,
+				boot_mode);
+	}
+#endif
+}
+
+#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
+
+/* STMicroelectronics STUSB1600 Type-C controller */
+#define STUSB1600_CC_CONNECTION_STATUS		0x0E
+
+/* STUSB1600_CC_CONNECTION_STATUS bitfields */
+#define STUSB1600_CC_ATTACH			BIT(0)
+
+static int stusb1600_init(struct udevice **dev_stusb1600)
+{
+	ofnode node;
+	struct udevice *dev, *bus;
+	int ret;
+	u32 chip_addr;
+
+	*dev_stusb1600 = NULL;
+
+	/* if node stusb1600 is present, means DK1 or DK2 board */
+	node = ofnode_by_compatible(ofnode_null(), "st,stusb1600");
+	if (!ofnode_valid(node))
+		return -ENODEV;
+
+	ret = ofnode_read_u32(node, "reg", &chip_addr);
+	if (ret)
+		return -EINVAL;
+
+	ret = uclass_get_device_by_ofnode(UCLASS_I2C, ofnode_get_parent(node),
+					  &bus);
+	if (ret) {
+		printf("bus for stusb1600 not found\n");
+		return -ENODEV;
+	}
+
+	ret = dm_i2c_probe(bus, chip_addr, 0, &dev);
+	if (!ret)
+		*dev_stusb1600 = dev;
+
+	return ret;
+}
+
+static int stusb1600_cable_connected(struct udevice *dev)
+{
+	u8 status;
+
+	if (dm_i2c_read(dev, STUSB1600_CC_CONNECTION_STATUS, &status, 1))
+		return 0;
+
+	return status & STUSB1600_CC_ATTACH;
+}
+
+#include <usb/dwc2_udc.h>
+int g_dnl_board_usb_cable_connected(void)
+{
+	struct udevice *stusb1600;
+	struct udevice *dwc2_udc_otg;
+	int ret;
+
+	if (!stusb1600_init(&stusb1600))
+		return stusb1600_cable_connected(stusb1600);
+
+	ret = uclass_get_device_by_driver(UCLASS_USB_GADGET_GENERIC,
+					  DM_GET_DRIVER(dwc2_udc_otg),
+					  &dwc2_udc_otg);
+	if (!ret)
+		debug("dwc2_udc_otg init failed\n");
+
+	return dwc2_udc_B_session_valid(dwc2_udc_otg);
+}
+#endif /* CONFIG_USB_GADGET */
+
+static int get_led(struct udevice **dev, char *led_string)
+{
+	char *led_name;
+	int ret;
+
+	led_name = fdtdec_get_config_string(gd->fdt_blob, led_string);
+	if (!led_name) {
+		pr_debug("%s: could not find %s config string\n",
+			 __func__, led_string);
+		return -ENOENT;
+	}
+	ret = led_get_by_label(led_name, dev);
+	if (ret) {
+		debug("%s: get=%d\n", __func__, ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int setup_led(enum led_state_t cmd)
+{
+	struct udevice *dev;
+	int ret;
+
+	ret = get_led(&dev, "u-boot,boot-led");
+	if (ret)
+		return ret;
+
+	ret = led_set_state(dev, cmd);
+	return ret;
+}
+
+static int board_check_usb_power(void)
+{
+	struct ofnode_phandle_args adc_args;
+	struct udevice *adc;
+	struct udevice *led;
+	ofnode node;
+	unsigned int raw;
+	int max_uV = 0;
+	int ret, uV, adc_count;
+	u8 i, nb_blink;
+
+	node = ofnode_path("/config");
+	if (!ofnode_valid(node)) {
+		debug("%s: no /config node?\n", __func__);
+		return -ENOENT;
+	}
+
+	/*
+	 * Retrieve the ADC channels devices and get measurement
+	 * for each of them
+	 */
+	adc_count = ofnode_count_phandle_with_args(node, "st,adc_usb_pd",
+						   "#io-channel-cells");
+	if (adc_count < 0) {
+		if (adc_count == -ENOENT)
+			return 0;
+
+		pr_err("%s: can't find adc channel (%d)\n", __func__,
+		       adc_count);
+
+		return adc_count;
+	}
+
+	for (i = 0; i < adc_count; i++) {
+		if (ofnode_parse_phandle_with_args(node, "st,adc_usb_pd",
+						   "#io-channel-cells", 0, i,
+						   &adc_args)) {
+			pr_debug("%s: can't find /config/st,adc_usb_pd\n",
+				 __func__);
+			return 0;
+		}
+
+		ret = uclass_get_device_by_ofnode(UCLASS_ADC, adc_args.node,
+						  &adc);
+
+		if (ret) {
+			pr_err("%s: Can't get adc device(%d)\n", __func__,
+			       ret);
+			return ret;
+		}
+
+		ret = adc_channel_single_shot(adc->name, adc_args.args[0],
+					      &raw);
+		if (ret) {
+			pr_err("%s: single shot failed for %s[%d]!\n",
+			       __func__, adc->name, adc_args.args[0]);
+			return ret;
+		}
+		/* Convert to uV */
+		if (!adc_raw_to_uV(adc, raw, &uV)) {
+			if (uV > max_uV)
+				max_uV = uV;
+			pr_debug("%s: %s[%02d] = %u, %d uV\n", __func__,
+				 adc->name, adc_args.args[0], raw, uV);
+		} else {
+			pr_err("%s: Can't get uV value for %s[%d]\n",
+			       __func__, adc->name, adc_args.args[0]);
+		}
+	}
+
+	/*
+	 * If highest value is inside 1.23 Volts and 2.10 Volts, that means
+	 * board is plugged on an USB-C 3A power supply and boot process can
+	 * continue.
+	 */
+	if (max_uV > USB_START_LOW_THRESHOLD_UV &&
+	    max_uV < USB_START_HIGH_THRESHOLD_UV)
+		return 0;
+
+	/* Display warning message and make u-boot,error-led blinking */
+	pr_err("\n*******************************************\n");
+
+	if (max_uV < USB_WARNING_LOW_THRESHOLD_UV) {
+		pr_err("*   WARNING 500mA power supply detected   *\n");
+		nb_blink = 2;
+	} else {
+		pr_err("* WARNING 1.5A power supply detected      *\n");
+		nb_blink = 3;
+	}
+
+	pr_err("* Current too low, use a 3A power supply! *\n");
+	pr_err("*******************************************\n\n");
+
+	ret = get_led(&led, "u-boot,error-led");
+	if (ret)
+		return ret;
+
+	for (i = 0; i < nb_blink * 2; i++) {
+		led_set_state(led, LEDST_TOGGLE);
+		mdelay(125);
+	}
+	led_set_state(led, LEDST_ON);
+
+	return 0;
+}
+
+static void sysconf_init(void)
+{
+#ifndef CONFIG_STM32MP1_TRUSTED
+	u8 *syscfg;
+#ifdef CONFIG_DM_REGULATOR
+	struct udevice *pwr_dev;
+	struct udevice *pwr_reg;
+	struct udevice *dev;
+	int ret;
+	u32 otp = 0;
+#endif
+	u32 bootr;
+
+	syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
+
+	/* interconnect update : select master using the port 1 */
+	/* LTDC = AXI_M9 */
+	/* GPU  = AXI_M8 */
+	/* today information is hardcoded in U-Boot */
+	writel(BIT(9), syscfg + SYSCFG_ICNR);
+
+	/* disable Pull-Down for boot pin connected to VDD */
+	bootr = readl(syscfg + SYSCFG_BOOTR);
+	bootr &= ~(SYSCFG_BOOTR_BOOT_MASK << SYSCFG_BOOTR_BOOTPD_SHIFT);
+	bootr |= (bootr & SYSCFG_BOOTR_BOOT_MASK) << SYSCFG_BOOTR_BOOTPD_SHIFT;
+	writel(bootr, syscfg + SYSCFG_BOOTR);
+
+#ifdef CONFIG_DM_REGULATOR
+	/* High Speed Low Voltage Pad mode Enable for SPI, SDMMC, ETH, QSPI
+	 * and TRACE. Needed above ~50MHz and conditioned by AFMUX selection.
+	 * The customer will have to disable this for low frequencies
+	 * or if AFMUX is selected but the function not used, typically for
+	 * TRACE. Otherwise, impact on power consumption.
+	 *
+	 * WARNING:
+	 *   enabling High Speed mode while VDD>2.7V
+	 *   with the OTP product_below_2v5 (OTP 18, BIT 13)
+	 *   erroneously set to 1 can damage the IC!
+	 *   => U-Boot set the register only if VDD < 2.7V (in DT)
+	 *      but this value need to be consistent with board design
+	 */
+	ret = syscon_get_by_driver_data(STM32MP_SYSCON_PWR, &pwr_dev);
+	if (!ret) {
+		ret = uclass_get_device_by_driver(UCLASS_MISC,
+						  DM_GET_DRIVER(stm32mp_bsec),
+						  &dev);
+		if (ret) {
+			pr_err("Can't find stm32mp_bsec driver\n");
+			return;
+		}
+
+		ret = misc_read(dev, STM32_BSEC_SHADOW(18), &otp, 4);
+		if (!ret)
+			otp = otp & BIT(13);
+
+		/* get VDD = pwr-supply */
+		ret = device_get_supply_regulator(pwr_dev, "pwr-supply",
+						  &pwr_reg);
+
+		/* check if VDD is Low Voltage */
+		if (!ret) {
+			if (regulator_get_value(pwr_reg) < 2700000) {
+				writel(SYSCFG_IOCTRLSETR_HSLVEN_TRACE |
+				       SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI |
+				       SYSCFG_IOCTRLSETR_HSLVEN_ETH |
+				       SYSCFG_IOCTRLSETR_HSLVEN_SDMMC |
+				       SYSCFG_IOCTRLSETR_HSLVEN_SPI,
+				       syscfg + SYSCFG_IOCTRLSETR);
+
+				if (!otp)
+					pr_err("product_below_2v5=0: HSLVEN protected by HW\n");
+			} else {
+				if (otp)
+					pr_err("product_below_2v5=1: HSLVEN update is destructive, no update as VDD>2.7V\n");
+			}
+		} else {
+			debug("VDD unknown");
+		}
+	}
+#endif
+
+	/* activate automatic I/O compensation
+	 * warning: need to ensure CSI enabled and ready in clock driver
+	 */
+	writel(SYSCFG_CMPENSETR_MPU_EN, syscfg + SYSCFG_CMPENSETR);
+
+	while (!(readl(syscfg + SYSCFG_CMPCR) & SYSCFG_CMPCR_READY))
+		;
+	clrbits_le32(syscfg + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL);
+#endif
+}
+
+/* board dependent setup after realloc */
+int board_init(void)
+{
+	struct udevice *dev;
+
+	/* address of boot parameters */
+	gd->bd->bi_boot_params = STM32_DDR_BASE + 0x100;
+
+	/* probe all PINCTRL for hog */
+	for (uclass_first_device(UCLASS_PINCTRL, &dev);
+	     dev;
+	     uclass_next_device(&dev)) {
+		pr_debug("probe pincontrol = %s\n", dev->name);
+	}
+
+	board_key_check();
+
+	sysconf_init();
+
+	if (IS_ENABLED(CONFIG_LED))
+		led_default_state();
+
+	return 0;
+}
+
+int board_late_init(void)
+{
+#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
+	const void *fdt_compat;
+	int fdt_compat_len;
+
+	fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
+				 &fdt_compat_len);
+	if (fdt_compat && fdt_compat_len) {
+		if (strncmp(fdt_compat, "st,", 3) != 0)
+			env_set("board_name", fdt_compat);
+		else
+			env_set("board_name", fdt_compat + 3);
+	}
+#endif
+
+	/* for DK1/DK2 boards */
+	board_check_usb_power();
+
+	return 0;
+}
+
+void board_quiesce_devices(void)
+{
+	setup_led(LEDST_OFF);
+}
diff --git a/doc/device-tree-bindings/usb/dwc2.txt b/doc/device-tree-bindings/usb/dwc2.txt
index eb60ffae58..61493f7cb0 100644
--- a/doc/device-tree-bindings/usb/dwc2.txt
+++ b/doc/device-tree-bindings/usb/dwc2.txt
@@ -39,6 +39,8 @@ Refer to phy/phy-bindings.txt for generic phy consumer properties
 - g-tx-fifo-size: size of periodic tx fifo per endpoint (except ep0) in gadget mode.
 - usb33d-supply: external VBUS and ID sensing comparators supply, in order to
   perform OTG operation, used on STM32MP1 SoCs.
+- u-boot,force-b-session-valid: force B-peripheral session instead of relying on
+  VBUS sensing (only valid when dr_mode = "peripheral" and for u-boot).
 
 Deprecated properties:
 - g-use-dma: gadget DMA mode is automatically detected
diff --git a/drivers/usb/gadget/dwc2_udc_otg.c b/drivers/usb/gadget/dwc2_udc_otg.c
index 8ec4ad0d69..7be63416a1 100644
--- a/drivers/usb/gadget/dwc2_udc_otg.c
+++ b/drivers/usb/gadget/dwc2_udc_otg.c
@@ -1055,7 +1055,7 @@ static int dwc2_udc_otg_ofdata_to_platdata(struct udevice *dev)
 	platdata->tx_fifo_sz = dev_read_u32_default(dev, "g-tx-fifo-size", 0);
 
 	platdata->force_b_session_valid =
-		dev_read_bool(dev, "force-b-session-valid");
+		dev_read_bool(dev, "u-boot,force-b-session-valid");
 
 	/* force platdata according compatible */
 	drvdata = dev_get_driver_data(dev);
@@ -1077,6 +1077,9 @@ static void dwc2_set_stm32mp1_hsotg_params(struct dwc2_plat_otg_data *p)
 		| 0 << 8	/* [0:SRP disable 1:SRP enable]*/
 		| 0 << 6	/* 0: high speed utmi+, 1: full speed serial*/
 		| 0x7 << 0;	/* FS timeout calibration**/
+
+	if (p->force_b_session_valid)
+		p->usb_gusbcfg |= 1 << 30; /* FDMOD: Force device mode */
 }
 
 static int dwc2_udc_otg_reset_init(struct udevice *dev,
@@ -1168,7 +1171,8 @@ static int dwc2_udc_otg_probe(struct udevice *dev)
 
 	if (platdata->force_b_session_valid)
 		/* Override B session bits : value and enable */
-		setbits_le32(&usbotg_reg->gotgctl,  B_VALOEN | B_VALOVAL);
+		setbits_le32(&usbotg_reg->gotgctl,
+			     A_VALOEN | A_VALOVAL | B_VALOEN | B_VALOVAL);
 
 	ret = dwc2_udc_probe(platdata);
 	if (ret)

commit acd7aca8c0359c8a56813551b4cf29183b0d7a42
Author: Patrick Delaunay <patrick.delaunay@st.com>
Date:   Fri Mar 29 15:42:21 2019 +0100

    UPSTREAM: usb: dwc2: add support for STM32MP1
    
    Add compatible "st,stm32mp1-hsotg" and associated driver data to manage
    the usb33d-supply and the ST specific register for VBus sensing.
    
    Change-Id: If60971ebf415cb708b04af38c7b61d5321a13181
    Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
    Reviewed-by: Lukasz Majewski <lukma@denx.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 931e9d7aa7228867eec7e33fd45718e6018cc96d)

diff --git a/doc/device-tree-bindings/usb/dwc2.txt b/doc/device-tree-bindings/usb/dwc2.txt
index 6dc3c4a344..eb60ffae58 100644
--- a/doc/device-tree-bindings/usb/dwc2.txt
+++ b/doc/device-tree-bindings/usb/dwc2.txt
@@ -37,6 +37,8 @@ Refer to phy/phy-bindings.txt for generic phy consumer properties
 - g-rx-fifo-size: size of rx fifo size in gadget mode.
 - g-np-tx-fifo-size: size of non-periodic tx fifo size in gadget mode.
 - g-tx-fifo-size: size of periodic tx fifo per endpoint (except ep0) in gadget mode.
+- usb33d-supply: external VBUS and ID sensing comparators supply, in order to
+  perform OTG operation, used on STM32MP1 SoCs.
 
 Deprecated properties:
 - g-use-dma: gadget DMA mode is automatically detected
diff --git a/drivers/usb/gadget/dwc2_udc_otg.c b/drivers/usb/gadget/dwc2_udc_otg.c
index 0ab0544632..8ec4ad0d69 100644
--- a/drivers/usb/gadget/dwc2_udc_otg.c
+++ b/drivers/usb/gadget/dwc2_udc_otg.c
@@ -944,6 +944,7 @@ struct dwc2_priv_data {
 	struct reset_ctl_bulk	resets;
 	struct phy *phys;
 	int num_phys;
+	struct udevice *usb33d_supply;
 };
 
 int dm_usb_gadget_handle_interrupts(struct udevice *dev)
@@ -1038,6 +1039,8 @@ static int dwc2_udc_otg_ofdata_to_platdata(struct udevice *dev)
 {
 	struct dwc2_plat_otg_data *platdata = dev_get_platdata(dev);
 	int node = dev_of_offset(dev);
+	ulong drvdata;
+	void (*set_params)(struct dwc2_plat_otg_data *data);
 
 	if (usb_get_dr_mode(node) != USB_DR_MODE_PERIPHERAL) {
 		dev_dbg(dev, "Invalid mode\n");
@@ -1054,9 +1057,28 @@ static int dwc2_udc_otg_ofdata_to_platdata(struct udevice *dev)
 	platdata->force_b_session_valid =
 		dev_read_bool(dev, "force-b-session-valid");
 
+	/* force platdata according compatible */
+	drvdata = dev_get_driver_data(dev);
+	if (drvdata) {
+		set_params = (void *)drvdata;
+		set_params(platdata);
+	}
+
 	return 0;
 }
 
+static void dwc2_set_stm32mp1_hsotg_params(struct dwc2_plat_otg_data *p)
+{
+	p->activate_stm_id_vb_detection = true;
+	p->usb_gusbcfg =
+		0 << 15		/* PHY Low Power Clock sel*/
+		| 0x9 << 10	/* USB Turnaround time (0x9 for HS phy) */
+		| 0 << 9	/* [0:HNP disable,1:HNP enable]*/
+		| 0 << 8	/* [0:SRP disable 1:SRP enable]*/
+		| 0 << 6	/* 0: high speed utmi+, 1: full speed serial*/
+		| 0x7 << 0;	/* FS timeout calibration**/
+}
+
 static int dwc2_udc_otg_reset_init(struct udevice *dev,
 				   struct reset_ctl_bulk *resets)
 {
@@ -1124,6 +1146,26 @@ static int dwc2_udc_otg_probe(struct udevice *dev)
 	if (ret)
 		return ret;
 
+	if (CONFIG_IS_ENABLED(DM_REGULATOR) &&
+	    platdata->activate_stm_id_vb_detection &&
+	    !platdata->force_b_session_valid) {
+		ret = device_get_supply_regulator(dev, "usb33d-supply",
+						  &priv->usb33d_supply);
+		if (ret) {
+			dev_err(dev, "can't get voltage level detector supply\n");
+			return ret;
+		}
+		ret = regulator_set_enable(priv->usb33d_supply, true);
+		if (ret) {
+			dev_err(dev, "can't enable voltage level detector supply\n");
+			return ret;
+		}
+		/* Enable vbus sensing */
+		setbits_le32(&usbotg_reg->ggpio,
+			     GGPIO_STM32_OTG_GCCFG_VBDEN |
+			     GGPIO_STM32_OTG_GCCFG_IDEN);
+	}
+
 	if (platdata->force_b_session_valid)
 		/* Override B session bits : value and enable */
 		setbits_le32(&usbotg_reg->gotgctl,  B_VALOEN | B_VALOVAL);
@@ -1156,6 +1198,9 @@ static int dwc2_udc_otg_remove(struct udevice *dev)
 
 static const struct udevice_id dwc2_udc_otg_ids[] = {
 	{ .compatible = "snps,dwc2" },
+	{ .compatible = "st,stm32mp1-hsotg",
+	  .data = (ulong)dwc2_set_stm32mp1_hsotg_params },
+	{},
 };
 
 U_BOOT_DRIVER(dwc2_udc_otg) = {
diff --git a/drivers/usb/gadget/dwc2_udc_otg_regs.h b/drivers/usb/gadget/dwc2_udc_otg_regs.h
index 96703f2bb3..3675eadc8b 100644
--- a/drivers/usb/gadget/dwc2_udc_otg_regs.h
+++ b/drivers/usb/gadget/dwc2_udc_otg_regs.h
@@ -61,8 +61,9 @@ struct dwc2_usbotg_reg {
 	u32 grxstsp; /* Receive Status Debug Pop/Status Pop */
 	u32 grxfsiz; /* Receive FIFO Size */
 	u32 gnptxfsiz; /* Non-Periodic Transmit FIFO Size */
-
-	u8  res1[36];
+	u8  res0[12];
+	u32 ggpio;     /* 0x038 */
+	u8  res1[20];
 	u32 ghwcfg4; /* User HW Config4 */
 	u8  res2[176];
 	u32 dieptxf[15]; /* Device Periodic Transmit FIFO size register */
@@ -282,4 +283,9 @@ struct dwc2_usbotg_reg {
 /* User HW Config4 */
 #define GHWCFG4_NUM_IN_EPS_MASK		(0xf << 26)
 #define GHWCFG4_NUM_IN_EPS_SHIFT	26
+
+/* OTG general core configuration register (OTG_GCCFG:0x38) for STM32MP1 */
+#define GGPIO_STM32_OTG_GCCFG_VBDEN               BIT(21)
+#define GGPIO_STM32_OTG_GCCFG_IDEN                BIT(22)
+
 #endif
diff --git a/include/usb/dwc2_udc.h b/include/usb/dwc2_udc.h
index a8800f7069..7eb2b1f4e2 100644
--- a/include/usb/dwc2_udc.h
+++ b/include/usb/dwc2_udc.h
@@ -27,6 +27,7 @@ struct dwc2_plat_otg_data {
 	unsigned int	tx_fifo_sz_array[DWC2_MAX_HW_ENDPOINTS];
 	unsigned char   tx_fifo_sz_nb;
 	bool		force_b_session_valid;
+	bool		activate_stm_id_vb_detection;
 };
 
 int dwc2_udc_probe(struct dwc2_plat_otg_data *pdata);

commit 6187c346516df218f85a906c8a8d58f3e5ed34d5
Author: Patrice Chotard <patrice.chotard@st.com>
Date:   Fri Mar 29 15:42:20 2019 +0100

    UPSTREAM: usb: dwc2_udc_otg: Add tx_fifo_sz array support
    
    All TX fifo size can be different, add tx_fifo_sz_array[]
    into dwc2_plat_otg_data to be able to set them.
    
    tx_fifo_sz_array[] is 17 Bytes long and can contains max 16
    tx fifo size (synopsys IP supports max 16 IN endpoints).
    First entry of tx_fifo_sz_array[] is the number of valid
    fifo size the array contains.
    
    In case of tx_fifo_sz_array[] doesn't contains the same
    number of element than max hardware endpoint, display
    a warning message.
    
    Compatibility with board which doesn't use tx_fifo_sz_array[]
    (Rockchip rk322x/rk3128/rv1108/rk3288/rk3036) is kept.
    
    Change-Id: If32954770f9571a1bb18376239ef9cff9a721178
    Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
    Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
    Reviewed-by: Lukasz Majewski <lukma@denx.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 763bb106f66c147b7d0c3046dbba66a07d7a9dd2)

diff --git a/drivers/usb/gadget/dwc2_udc_otg.c b/drivers/usb/gadget/dwc2_udc_otg.c
index 232c936c90..0ab0544632 100644
--- a/drivers/usb/gadget/dwc2_udc_otg.c
+++ b/drivers/usb/gadget/dwc2_udc_otg.c
@@ -459,6 +459,7 @@ static void reconfig_usbd(struct dwc2_udc *dev)
 	uint32_t dflt_gusbcfg;
 	uint32_t rx_fifo_sz, tx_fifo_sz, np_tx_fifo_sz;
 	u32 max_hw_ep;
+	int pdata_hw_ep;
 
 	debug("Reseting OTG controller\n");
 
@@ -544,11 +545,20 @@ static void reconfig_usbd(struct dwc2_udc *dev)
 	/* retrieve the number of IN Endpoints (excluding ep0) */
 	max_hw_ep = (readl(&reg->ghwcfg4) & GHWCFG4_NUM_IN_EPS_MASK) >>
 		    GHWCFG4_NUM_IN_EPS_SHIFT;
+	pdata_hw_ep = dev->pdata->tx_fifo_sz_nb;
+
+	/* tx_fifo_sz_nb should equal to number of IN Endpoint */
+	if (pdata_hw_ep && max_hw_ep != pdata_hw_ep)
+		pr_warn("Got %d hw endpoint but %d tx-fifo-size in array !!\n",
+			max_hw_ep, pdata_hw_ep);
+
+	for (i = 0; i < max_hw_ep; i++) {
+		if (pdata_hw_ep)
+			tx_fifo_sz = dev->pdata->tx_fifo_sz_array[i];
 
-	for (i = 0; i < max_hw_ep; i++)
 		writel((rx_fifo_sz + np_tx_fifo_sz + (tx_fifo_sz * i)) |
 			tx_fifo_sz << 16, &reg->dieptxf[i]);
-
+	}
 	/* Flush the RX FIFO */
 	writel(RX_FIFO_FLUSH, &reg->grstctl);
 	while (readl(&reg->grstctl) & RX_FIFO_FLUSH)
diff --git a/include/usb/dwc2_udc.h b/include/usb/dwc2_udc.h
index be53ca97c5..a8800f7069 100644
--- a/include/usb/dwc2_udc.h
+++ b/include/usb/dwc2_udc.h
@@ -10,6 +10,7 @@
 #define __DWC2_USB_GADGET
 
 #define PHY0_SLEEP              (1 << 5)
+#define DWC2_MAX_HW_ENDPOINTS	16
 
 struct dwc2_plat_otg_data {
 	void		*priv;
@@ -23,6 +24,8 @@ struct dwc2_plat_otg_data {
 	unsigned int	rx_fifo_sz;
 	unsigned int	np_tx_fifo_sz;
 	unsigned int	tx_fifo_sz;
+	unsigned int	tx_fifo_sz_array[DWC2_MAX_HW_ENDPOINTS];
+	unsigned char   tx_fifo_sz_nb;
 	bool		force_b_session_valid;
 };
 

commit 38b0d5741a71ba7ceb408c3eb1bc4eb8ee72fe82
Author: Patrick Delaunay <patrick.delaunay@st.com>
Date:   Fri Mar 29 15:42:19 2019 +0100

    UPSTREAM: usb: dwc2_udc_otg: Read MAX_HW_ENDPOINT from HWCFG4 register
    
    Some DWC2 ip variant doesn't use 16 hardware endpoint as hardcoded
    in the driver. Bits INEps [29:26] of HWCFG4 register allows to get
    this information.
    
    Change-Id: I22f88ef7ee2749cce3c93f5c8a455a1de165b9dd
    Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
    Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
    Reviewed-by: Lukasz Majewski <lukma@denx.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 5bd97e80730bdda59656ca927d67d62fb2a4ecb6)

diff --git a/drivers/usb/gadget/dwc2_udc_otg.c b/drivers/usb/gadget/dwc2_udc_otg.c
index 01873d450e..232c936c90 100644
--- a/drivers/usb/gadget/dwc2_udc_otg.c
+++ b/drivers/usb/gadget/dwc2_udc_otg.c
@@ -458,6 +458,7 @@ static void reconfig_usbd(struct dwc2_udc *dev)
 	unsigned int uTemp = writel(CORE_SOFT_RESET, &reg->grstctl);
 	uint32_t dflt_gusbcfg;
 	uint32_t rx_fifo_sz, tx_fifo_sz, np_tx_fifo_sz;
+	u32 max_hw_ep;
 
 	debug("Reseting OTG controller\n");
 
@@ -540,9 +541,13 @@ static void reconfig_usbd(struct dwc2_udc *dev)
 	writel((np_tx_fifo_sz << 16) | rx_fifo_sz,
 	       &reg->gnptxfsiz);
 
-	for (i = 1; i < DWC2_MAX_HW_ENDPOINTS; i++)
-		writel((rx_fifo_sz + np_tx_fifo_sz + tx_fifo_sz*(i-1)) |
-			tx_fifo_sz << 16, &reg->dieptxf[i-1]);
+	/* retrieve the number of IN Endpoints (excluding ep0) */
+	max_hw_ep = (readl(&reg->ghwcfg4) & GHWCFG4_NUM_IN_EPS_MASK) >>
+		    GHWCFG4_NUM_IN_EPS_SHIFT;
+
+	for (i = 0; i < max_hw_ep; i++)
+		writel((rx_fifo_sz + np_tx_fifo_sz + (tx_fifo_sz * i)) |
+			tx_fifo_sz << 16, &reg->dieptxf[i]);
 
 	/* Flush the RX FIFO */
 	writel(RX_FIFO_FLUSH, &reg->grstctl);
diff --git a/drivers/usb/gadget/dwc2_udc_otg_priv.h b/drivers/usb/gadget/dwc2_udc_otg_priv.h
index c564053e94..669d3d0dc6 100644
--- a/drivers/usb/gadget/dwc2_udc_otg_priv.h
+++ b/drivers/usb/gadget/dwc2_udc_otg_priv.h
@@ -24,7 +24,6 @@
 #define EP_FIFO_SIZE2		1024
 /* ep0-control, ep1in-bulk, ep2out-bulk, ep3in-int */
 #define DWC2_MAX_ENDPOINTS	4
-#define DWC2_MAX_HW_ENDPOINTS	16
 
 #define WAIT_FOR_SETUP          0
 #define DATA_STATE_XMIT         1
diff --git a/drivers/usb/gadget/dwc2_udc_otg_regs.h b/drivers/usb/gadget/dwc2_udc_otg_regs.h
index c4f572316a..96703f2bb3 100644
--- a/drivers/usb/gadget/dwc2_udc_otg_regs.h
+++ b/drivers/usb/gadget/dwc2_udc_otg_regs.h
@@ -61,22 +61,25 @@ struct dwc2_usbotg_reg {
 	u32 grxstsp; /* Receive Status Debug Pop/Status Pop */
 	u32 grxfsiz; /* Receive FIFO Size */
 	u32 gnptxfsiz; /* Non-Periodic Transmit FIFO Size */
-	u8  res1[216];
+
+	u8  res1[36];
+	u32 ghwcfg4; /* User HW Config4 */
+	u8  res2[176];
 	u32 dieptxf[15]; /* Device Periodic Transmit FIFO size register */
-	u8  res2[1728];
+	u8  res3[1728];
 	/* Device Configuration */
 	u32 dcfg; /* Device Configuration Register */
 	u32 dctl; /* Device Control */
 	u32 dsts; /* Device Status */
-	u8  res3[4];
+	u8  res4[4];
 	u32 diepmsk; /* Device IN Endpoint Common Interrupt Mask */
 	u32 doepmsk; /* Device OUT Endpoint Common Interrupt Mask */
 	u32 daint; /* Device All Endpoints Interrupt */
 	u32 daintmsk; /* Device All Endpoints Interrupt Mask */
-	u8  res4[224];
+	u8  res5[224];
 	struct dwc2_dev_in_endp in_endp[16];
 	struct dwc2_dev_out_endp out_endp[16];
-	u8  res5[768];
+	u8  res6[768];
 	struct ep_fifo ep[16];
 };
 
@@ -275,4 +278,8 @@ struct dwc2_usbotg_reg {
 /* Device ALL Endpoints Interrupt Register (DAINT) */
 #define DAINT_IN_EP_INT(x)                        (x << 0)
 #define DAINT_OUT_EP_INT(x)                       (x << 16)
+
+/* User HW Config4 */
+#define GHWCFG4_NUM_IN_EPS_MASK		(0xf << 26)
+#define GHWCFG4_NUM_IN_EPS_SHIFT	26
 #endif

commit 3015f8bebd7c846e63cc03f1d382a2f71fdb85f1
Author: Patrick Delaunay <patrick.delaunay@st.com>
Date:   Fri Mar 29 15:42:18 2019 +0100

    UPSTREAM: usb: dwc2: Add function for session B check
    
    Add a new function to check the session B validity, to be use to check
    cable connection.
    
    Change-Id: I914d7353e926df26787261c99f07e5c58dbf24ff
    Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
    Reviewed-by: Lukasz Majewski <lukma@denx.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 2d76160f049c42087011cfa0e6e878aa2ed6b406)

diff --git a/drivers/usb/gadget/dwc2_udc_otg.c b/drivers/usb/gadget/dwc2_udc_otg.c
index 52179d393b..01873d450e 100644
--- a/drivers/usb/gadget/dwc2_udc_otg.c
+++ b/drivers/usb/gadget/dwc2_udc_otg.c
@@ -1153,4 +1153,13 @@ U_BOOT_DRIVER(dwc2_udc_otg) = {
 	.platdata_auto_alloc_size = sizeof(struct dwc2_plat_otg_data),
 	.priv_auto_alloc_size = sizeof(struct dwc2_priv_data),
 };
+
+int dwc2_udc_B_session_valid(struct udevice *dev)
+{
+	struct dwc2_plat_otg_data *platdata = dev_get_platdata(dev);
+	struct dwc2_usbotg_reg *usbotg_reg =
+		(struct dwc2_usbotg_reg *)platdata->regs_otg;
+
+	return readl(&usbotg_reg->gotgctl) & B_SESSION_VALID;
+}
 #endif /* CONFIG_IS_ENABLED(DM_USB_GADGET) */
diff --git a/include/usb/dwc2_udc.h b/include/usb/dwc2_udc.h
index 8972219e15..be53ca97c5 100644
--- a/include/usb/dwc2_udc.h
+++ b/include/usb/dwc2_udc.h
@@ -28,4 +28,6 @@ struct dwc2_plat_otg_data {
 
 int dwc2_udc_probe(struct dwc2_plat_otg_data *pdata);
 
+int dwc2_udc_B_session_valid(struct udevice *dev);
+
 #endif	/* __DWC2_USB_GADGET */

commit 5c4beedb876574a63592498febde0dd56a70ac1b
Author: Patrick Delaunay <patrick.delaunay@st.com>
Date:   Fri Mar 29 15:42:17 2019 +0100

    UPSTREAM: usb: dwc2: Add force-b-session-valid support
    
    Handle "force-b-session-valid" property from DT.
    
    Change-Id: I5a0bf871506257b449897cb67732fef430704134
    Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
    Reviewed-by: Lukasz Majewski <lukma@denx.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 0fdd0bc621f060fcf60fd4ba48a2a32f338ffeac)

diff --git a/drivers/usb/gadget/dwc2_udc_otg.c b/drivers/usb/gadget/dwc2_udc_otg.c
index b9e42b77c1..52179d393b 100644
--- a/drivers/usb/gadget/dwc2_udc_otg.c
+++ b/drivers/usb/gadget/dwc2_udc_otg.c
@@ -1036,6 +1036,9 @@ static int dwc2_udc_otg_ofdata_to_platdata(struct udevice *dev)
 						       "g-np-tx-fifo-size", 0);
 	platdata->tx_fifo_sz = dev_read_u32_default(dev, "g-tx-fifo-size", 0);
 
+	platdata->force_b_session_valid =
+		dev_read_bool(dev, "force-b-session-valid");
+
 	return 0;
 }
 
@@ -1090,6 +1093,8 @@ static int dwc2_udc_otg_probe(struct udevice *dev)
 {
 	struct dwc2_plat_otg_data *platdata = dev_get_platdata(dev);
 	struct dwc2_priv_data *priv = dev_get_priv(dev);
+	struct dwc2_usbotg_reg *usbotg_reg =
+		(struct dwc2_usbotg_reg *)platdata->regs_otg;
 	int ret;
 
 	ret = dwc2_udc_otg_clk_init(dev, &priv->clks);
@@ -1104,6 +1109,10 @@ static int dwc2_udc_otg_probe(struct udevice *dev)
 	if (ret)
 		return ret;
 
+	if (platdata->force_b_session_valid)
+		/* Override B session bits : value and enable */
+		setbits_le32(&usbotg_reg->gotgctl,  B_VALOEN | B_VALOVAL);
+
 	ret = dwc2_udc_probe(platdata);
 	if (ret)
 		return ret;
diff --git a/drivers/usb/gadget/dwc2_udc_otg_regs.h b/drivers/usb/gadget/dwc2_udc_otg_regs.h
index 1e7210063e..c4f572316a 100644
--- a/drivers/usb/gadget/dwc2_udc_otg_regs.h
+++ b/drivers/usb/gadget/dwc2_udc_otg_regs.h
@@ -84,8 +84,12 @@ struct dwc2_usbotg_reg {
 /*definitions related to CSR setting */
 
 /* DWC2_UDC_OTG_GOTGCTL */
-#define B_SESSION_VALID		(0x1<<19)
-#define A_SESSION_VALID		(0x1<<18)
+#define B_SESSION_VALID			BIT(19)
+#define A_SESSION_VALID			BIT(18)
+#define B_VALOVAL			BIT(7)
+#define B_VALOEN			BIT(6)
+#define A_VALOVAL			BIT(5)
+#define A_VALOEN			BIT(4)
 
 /* DWC2_UDC_OTG_GAHBCFG */
 #define PTXFE_HALF			(0<<8)
diff --git a/include/usb/dwc2_udc.h b/include/usb/dwc2_udc.h
index 1a370e0e86..8972219e15 100644
--- a/include/usb/dwc2_udc.h
+++ b/include/usb/dwc2_udc.h
@@ -23,6 +23,7 @@ struct dwc2_plat_otg_data {
 	unsigned int	rx_fifo_sz;
 	unsigned int	np_tx_fifo_sz;
 	unsigned int	tx_fifo_sz;
+	bool		force_b_session_valid;
 };
 
 int dwc2_udc_probe(struct dwc2_plat_otg_data *pdata);

commit b486dd9ec484bc97b2b75d5ebad9977d6e84b9ff
Author: Patrick Delaunay <patrick.delaunay@st.com>
Date:   Fri Mar 29 15:42:16 2019 +0100

    UPSTREAM: usb: dwc2: force reset assert before to probe the driver
    
    Reset the hardware to be sure of the device state.
    
    Change-Id: Ia86b8b929d6f5316820464a8dbfadbadd7e9d3dc
    Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
    Reviewed-by: Lukasz Majewski <lukma@denx.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit c2c74f97afff9351077f2236ab6fa5638de9bd86)

diff --git a/drivers/usb/gadget/dwc2_udc_otg.c b/drivers/usb/gadget/dwc2_udc_otg.c
index d5df8b18c7..b9e42b77c1 100644
--- a/drivers/usb/gadget/dwc2_udc_otg.c
+++ b/drivers/usb/gadget/dwc2_udc_otg.c
@@ -1051,7 +1051,12 @@ static int dwc2_udc_otg_reset_init(struct udevice *dev,
 	if (ret)
 		return ret;
 
-	ret = reset_deassert_bulk(resets);
+	ret = reset_assert_bulk(resets);
+
+	if (!ret) {
+		udelay(2);
+		ret = reset_deassert_bulk(resets);
+	}
 	if (ret) {
 		reset_release_bulk(resets);
 		return ret;

commit 1b9a1ae6803dbc03063c90aa7c81582e28bab58d
Author: Patrick Delaunay <patrick.delaunay@st.com>
Date:   Fri Mar 29 15:42:15 2019 +0100

    UPSTREAM: usb: dwc2: convert driver to DM_USB_GADGET
    
    Minimal conversion to driver model by using the uclass
    UCLASS_USB_GADGET_GENERIC based on:
    - reset uclass
    - clock uclass
    - generic uclass.
    
    Change-Id: Id366ea00cb1126d14cb8cef2a9e86b86df6cd612
    Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
    Reviewed-by: Lukasz Majewski <lukma@denx.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit c791c8431c34da803fdac4a308999879a6a33834)

diff --git a/doc/device-tree-bindings/usb/dwc2.txt b/doc/device-tree-bindings/usb/dwc2.txt
new file mode 100644
index 0000000000..6dc3c4a344
--- /dev/null
+++ b/doc/device-tree-bindings/usb/dwc2.txt
@@ -0,0 +1,54 @@
+Platform DesignWare HS OTG USB 2.0 controller
+-----------------------------------------------------
+
+Required properties:
+- compatible : One of:
+  - brcm,bcm2835-usb: The DWC2 USB controller instance in the BCM2835 SoC.
+  - hisilicon,hi6220-usb: The DWC2 USB controller instance in the hi6220 SoC.
+  - rockchip,rk3066-usb: The DWC2 USB controller instance in the rk3066 Soc;
+  - "rockchip,px30-usb", "rockchip,rk3066-usb", "snps,dwc2": for px30 Soc;
+  - "rockchip,rk3188-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3188 Soc;
+  - "rockchip,rk3288-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3288 Soc;
+  - "lantiq,arx100-usb": The DWC2 USB controller instance in Lantiq ARX SoCs;
+  - "lantiq,xrx200-usb": The DWC2 USB controller instance in Lantiq XRX SoCs;
+  - "amlogic,meson8-usb": The DWC2 USB controller instance in Amlogic Meson8 SoCs;
+  - "amlogic,meson8b-usb": The DWC2 USB controller instance in Amlogic Meson8b SoCs;
+  - "amlogic,meson-gxbb-usb": The DWC2 USB controller instance in Amlogic S905 SoCs;
+  - "amcc,dwc-otg": The DWC2 USB controller instance in AMCC Canyonlands 460EX SoCs;
+  - snps,dwc2: A generic DWC2 USB controller with default parameters.
+  - "st,stm32f4x9-fsotg": The DWC2 USB FS/HS controller instance in STM32F4x9 SoCs
+  configured in FS mode;
+  - "st,stm32f4x9-hsotg": The DWC2 USB HS controller instance in STM32F4x9 SoCs
+  configured in HS mode;
+  - "st,stm32f7-hsotg": The DWC2 USB HS controller instance in STM32F7 SoCs
+    configured in HS mode;
+- reg : Should contain 1 register range (address and length)
+- interrupts : Should contain 1 interrupt
+- clocks: clock provider specifier
+- clock-names: shall be "otg"
+Refer to clk/clock-bindings.txt for generic clock consumer properties
+
+Optional properties:
+- phys: phy provider specifier
+- phy-names: shall be "usb2-phy"
+Refer to phy/phy-bindings.txt for generic phy consumer properties
+- dr_mode: shall be one of "host", "peripheral" and "otg"
+  Refer to usb/generic.txt
+- g-rx-fifo-size: size of rx fifo size in gadget mode.
+- g-np-tx-fifo-size: size of non-periodic tx fifo size in gadget mode.
+- g-tx-fifo-size: size of periodic tx fifo per endpoint (except ep0) in gadget mode.
+
+Deprecated properties:
+- g-use-dma: gadget DMA mode is automatically detected
+
+Example:
+
+        usb@101c0000 {
+                compatible = "ralink,rt3050-usb, snps,dwc2";
+                reg = <0x101c0000 40000>;
+                interrupts = <18>;
+		clocks = <&usb_otg_ahb_clk>;
+		clock-names = "otg";
+		phys = <&usbphy>;
+		phy-names = "usb2-phy";
+        };
diff --git a/drivers/usb/gadget/dwc2_udc_otg.c b/drivers/usb/gadget/dwc2_udc_otg.c
index 389502f392..d5df8b18c7 100644
--- a/drivers/usb/gadget/dwc2_udc_otg.c
+++ b/drivers/usb/gadget/dwc2_udc_otg.c
@@ -19,11 +19,17 @@
  */
 #undef DEBUG
 #include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <generic-phy.h>
+#include <malloc.h>
+#include <reset.h>
+
 #include <linux/errno.h>
 #include <linux/list.h>
-#include <malloc.h>
 
 #include <linux/usb/ch9.h>
+#include <linux/usb/otg.h>
 #include <linux/usb/gadget.h>
 
 #include <asm/byteorder.h>
@@ -32,6 +38,8 @@
 
 #include <asm/mach-types.h>
 
+#include <power/regulator.h>
+
 #include "dwc2_udc_otg_regs.h"
 #include "dwc2_udc_otg_priv.h"
 
@@ -224,6 +232,7 @@ static int udc_enable(struct dwc2_udc *dev)
 	return 0;
 }
 
+#if !CONFIG_IS_ENABLED(DM_USB_GADGET)
 /*
   Register entry point for the peripheral controller driver.
 */
@@ -298,6 +307,54 @@ int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
 	udc_disable(dev);
 	return 0;
 }
+#else /* !CONFIG_IS_ENABLED(DM_USB_GADGET) */
+
+static int dwc2_gadget_start(struct usb_gadget *g,
+			     struct usb_gadget_driver *driver)
+{
+	struct dwc2_udc *dev = the_controller;
+
+	debug_cond(DEBUG_SETUP != 0, "%s: %s\n", __func__, "no name");
+
+	if (!driver ||
+	    (driver->speed != USB_SPEED_FULL &&
+	     driver->speed != USB_SPEED_HIGH) ||
+	    !driver->bind || !driver->disconnect || !driver->setup)
+		return -EINVAL;
+
+	if (!dev)
+		return -ENODEV;
+
+	if (dev->driver)
+		return -EBUSY;
+
+	/* first hook up the driver ... */
+	dev->driver = driver;
+
+	debug_cond(DEBUG_SETUP != 0,
+		   "Registered gadget driver %s\n", dev->gadget.name);
+	return udc_enable(dev);
+}
+
+static int dwc2_gadget_stop(struct usb_gadget *g)
+{
+	struct dwc2_udc *dev = the_controller;
+
+	if (!dev)
+		return -ENODEV;
+
+	if (!dev->driver)
+		return -EINVAL;
+
+	dev->driver = 0;
+	stop_activity(dev, dev->driver);
+
+	udc_disable(dev);
+
+	return 0;
+}
+
+#endif /* !CONFIG_IS_ENABLED(DM_USB_GADGET) */
 
 /*
  *	done - retire a request; caller blocked irqs
@@ -732,6 +789,10 @@ static void dwc2_fifo_flush(struct usb_ep *_ep)
 
 static const struct usb_gadget_ops dwc2_udc_ops = {
 	/* current versions must always be self-powered */
+#if CONFIG_IS_ENABLED(DM_USB_GADGET)
+	.udc_start		= dwc2_gadget_start,
+	.udc_stop		= dwc2_gadget_stop,
+#endif
 };
 
 static struct dwc2_udc memory = {
@@ -843,12 +904,239 @@ int dwc2_udc_probe(struct dwc2_plat_otg_data *pdata)
 	return retval;
 }
 
-int usb_gadget_handle_interrupts(int index)
+int dwc2_udc_handle_interrupt(void)
 {
 	u32 intr_status = readl(&reg->gintsts);
 	u32 gintmsk = readl(&reg->gintmsk);
 
 	if (intr_status & gintmsk)
 		return dwc2_udc_irq(1, (void *)the_controller);
+
+	return 0;
+}
+
+#if !CONFIG_IS_ENABLED(DM_USB_GADGET)
+
+int usb_gadget_handle_interrupts(int index)
+{
+	return dwc2_udc_handle_interrupt();
+}
+
+#else /* CONFIG_IS_ENABLED(DM_USB_GADGET) */
+
+struct dwc2_priv_data {
+	struct clk_bulk		clks;
+	struct reset_ctl_bulk	resets;
+	struct phy *phys;
+	int num_phys;
+};
+
+int dm_usb_gadget_handle_interrupts(struct udevice *dev)
+{
+	return dwc2_udc_handle_interrupt();
+}
+
+int dwc2_phy_setup(struct udevice *dev, struct phy **array, int *num_phys)
+{
+	int i, ret, count;
+	struct phy *usb_phys;
+
+	/* Return if no phy declared */
+	if (!dev_read_prop(dev, "phys", NULL))
+		return 0;
+
+	count = dev_count_phandle_with_args(dev, "phys", "#phy-cells");
+	if (count <= 0)
+		return count;
+
+	usb_phys = devm_kcalloc(dev, count, sizeof(struct phy),
+				GFP_KERNEL);
+	if (!usb_phys)
+		return -ENOMEM;
+
+	for (i = 0; i < count; i++) {
+		ret = generic_phy_get_by_index(dev, i, &usb_phys[i]);
+		if (ret && ret != -ENOENT) {
+			dev_err(dev, "Failed to get USB PHY%d for %s\n",
+				i, dev->name);
+			return ret;
+		}
+	}
+
+	for (i = 0; i < count; i++) {
+		ret = generic_phy_init(&usb_phys[i]);
+		if (ret) {
+			dev_err(dev, "Can't init USB PHY%d for %s\n",
+				i, dev->name);
+			goto phys_init_err;
+		}
+	}
+
+	for (i = 0; i < count; i++) {
+		ret = generic_phy_power_on(&usb_phys[i]);
+		if (ret) {
+			dev_err(dev, "Can't power USB PHY%d for %s\n",
+				i, dev->name);
+			goto phys_poweron_err;
+		}
+	}
+
+	*array = usb_phys;
+	*num_phys =  count;
+
 	return 0;
+
+phys_poweron_err:
+	for (i = count - 1; i >= 0; i--)
+		generic_phy_power_off(&usb_phys[i]);
+
+	for (i = 0; i < count; i++)
+		generic_phy_exit(&usb_phys[i]);
+
+	return ret;
+
+phys_init_err:
+	for (; i >= 0; i--)
+		generic_phy_exit(&usb_phys[i]);
+
+	return ret;
 }
+
+void dwc2_phy_shutdown(struct udevice *dev, struct phy *usb_phys, int num_phys)
+{
+	int i, ret;
+
+	for (i = 0; i < num_phys; i++) {
+		if (!generic_phy_valid(&usb_phys[i]))
+			continue;
+
+		ret = generic_phy_power_off(&usb_phys[i]);
+		ret |= generic_phy_exit(&usb_phys[i]);
+		if (ret) {
+			dev_err(dev, "Can't shutdown USB PHY%d for %s\n",
+				i, dev->name);
+		}
+	}
+}
+
+static int dwc2_udc_otg_ofdata_to_platdata(struct udevice *dev)
+{
+	struct dwc2_plat_otg_data *platdata = dev_get_platdata(dev);
+	int node = dev_of_offset(dev);
+
+	if (usb_get_dr_mode(node) != USB_DR_MODE_PERIPHERAL) {
+		dev_dbg(dev, "Invalid mode\n");
+		return -ENODEV;
+	}
+
+	platdata->regs_otg = dev_read_addr(dev);
+
+	platdata->rx_fifo_sz = dev_read_u32_default(dev, "g-rx-fifo-size", 0);
+	platdata->np_tx_fifo_sz = dev_read_u32_default(dev,
+						       "g-np-tx-fifo-size", 0);
+	platdata->tx_fifo_sz = dev_read_u32_default(dev, "g-tx-fifo-size", 0);
+
+	return 0;
+}
+
+static int dwc2_udc_otg_reset_init(struct udevice *dev,
+				   struct reset_ctl_bulk *resets)
+{
+	int ret;
+
+	ret = reset_get_bulk(dev, resets);
+	if (ret == -ENOTSUPP)
+		return 0;
+
+	if (ret)
+		return ret;
+
+	ret = reset_deassert_bulk(resets);
+	if (ret) {
+		reset_release_bulk(resets);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int dwc2_udc_otg_clk_init(struct udevice *dev,
+				 struct clk_bulk *clks)
+{
+	int ret;
+
+	ret = clk_get_bulk(dev, clks);
+	if (ret == -ENOSYS)
+		return 0;
+
+	if (ret)
+		return ret;
+
+	ret = clk_enable_bulk(clks);
+	if (ret) {
+		clk_release_bulk(clks);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int dwc2_udc_otg_probe(struct udevice *dev)
+{
+	struct dwc2_plat_otg_data *platdata = dev_get_platdata(dev);
+	struct dwc2_priv_data *priv = dev_get_priv(dev);
+	int ret;
+
+	ret = dwc2_udc_otg_clk_init(dev, &priv->clks);
+	if (ret)
+		return ret;
+
+	ret = dwc2_udc_otg_reset_init(dev, &priv->resets);
+	if (ret)
+		return ret;
+
+	ret = dwc2_phy_setup(dev, &priv->phys, &priv->num_phys);
+	if (ret)
+		return ret;
+
+	ret = dwc2_udc_probe(platdata);
+	if (ret)
+		return ret;
+
+	the_controller->driver = 0;
+
+	ret = usb_add_gadget_udc((struct device *)dev, &the_controller->gadget);
+
+	return ret;
+}
+
+static int dwc2_udc_otg_remove(struct udevice *dev)
+{
+	struct dwc2_priv_data *priv = dev_get_priv(dev);
+
+	usb_del_gadget_udc(&the_controller->gadget);
+
+	reset_release_bulk(&priv->resets);
+
+	clk_release_bulk(&priv->clks);
+
+	dwc2_phy_shutdown(dev, priv->phys, priv->num_phys);
+
+	return dm_scan_fdt_dev(dev);
+}
+
+static const struct udevice_id dwc2_udc_otg_ids[] = {
+	{ .compatible = "snps,dwc2" },
+};
+
+U_BOOT_DRIVER(dwc2_udc_otg) = {
+	.name	= "dwc2-udc-otg",
+	.id	= UCLASS_USB_GADGET_GENERIC,
+	.of_match = dwc2_udc_otg_ids,
+	.ofdata_to_platdata = dwc2_udc_otg_ofdata_to_platdata,
+	.probe = dwc2_udc_otg_probe,
+	.remove = dwc2_udc_otg_remove,
+	.platdata_auto_alloc_size = sizeof(struct dwc2_plat_otg_data),
+	.priv_auto_alloc_size = sizeof(struct dwc2_priv_data),
+};
+#endif /* CONFIG_IS_ENABLED(DM_USB_GADGET) */

commit a0c39c07465736fd4fd3885668ceaacd0f533e10
Author: Patrick Delaunay <patrick.delaunay@st.com>
Date:   Fri Mar 29 15:42:14 2019 +0100

    UPSTREAM: usb: dwc2: remove unused variable regs_otg
    
    Remove the global regs_otg variable.
    
    Change-Id: Iea128368e3b6593cf15d2e2bd31dfe03c445ad32
    Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
    Reviewed-by: Lukasz Majewski <lukma@denx.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit a812d77617749eeaddfa8b9796b9a2eece1ad2f5)

diff --git a/drivers/usb/gadget/dwc2_udc_otg.c b/drivers/usb/gadget/dwc2_udc_otg.c
index 4b893df820..389502f392 100644
--- a/drivers/usb/gadget/dwc2_udc_otg.c
+++ b/drivers/usb/gadget/dwc2_udc_otg.c
@@ -141,7 +141,6 @@ static struct usb_ep_ops dwc2_ep_ops = {
 
 /***********************************************************/
 
-void __iomem		*regs_otg;
 struct dwc2_usbotg_reg *reg;
 
 bool dfu_usb_get_reset(void)
@@ -820,8 +819,6 @@ int dwc2_udc_probe(struct dwc2_plat_otg_data *pdata)
 
 	reg = (struct dwc2_usbotg_reg *)pdata->regs_otg;
 
-	/* regs_otg = (void *)pdata->regs_otg; */
-
 	dev->gadget.is_dualspeed = 1;	/* Hack only*/
 	dev->gadget.is_otg = 0;
 	dev->gadget.is_a_peripheral = 0;

commit 2522005341954e0fe400284ba60ffa6394819b8a
Author: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Date:   Mon Mar 25 17:24:54 2019 +0100

    UPSTREAM: configs: move CONFIG_USB_EHCI_VF to Kconfig
    
    Move CONFIG_USB_EHCI_VF to drivers/usb/host/Kconfig and update the one
    and only user thereof being colibri_vf.
    
    Change-Id: I69228893cb776f077e68a80ee236aeed6e7c2d26
    Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
    Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 20df4b570d164675da17bf23998e51271f5a79a3)

diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 969b1e5a99..c6fd2df590 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -139,6 +139,13 @@ config USB_EHCI_OMAP
 	  Enables support for the on-chip EHCI controller on OMAP3 and later
 	  SoCs.
 
+config USB_EHCI_VF
+	bool "Support for Vybrid on-chip EHCI USB controller"
+	depends on ARCH_VF610
+	default y
+	help
+	  Enables support for the on-chip EHCI controller on Vybrid SoCs.
+
 if USB_EHCI_MX7
 
 config MXC_USB_OTG_HACTIVE
diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h
index 2f08dffbd0..cf71f36f4c 100644
--- a/include/configs/colibri_vf.h
+++ b/include/configs/colibri_vf.h
@@ -169,7 +169,6 @@
 #endif
 
 /* USB Host Support */
-#define CONFIG_USB_EHCI_VF
 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 400f1aba1c..da9096a402 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -4968,7 +4968,6 @@ CONFIG_USB_EHCI_SPEAR
 CONFIG_USB_EHCI_TEGRA
 CONFIG_USB_EHCI_TXFIFO_THRESH
 CONFIG_USB_EHCI_VCT
-CONFIG_USB_EHCI_VF
 CONFIG_USB_ETH_QMULT
 CONFIG_USB_ETH_SUBSET
 CONFIG_USB_EXT2_BOOT

commit 0457b2cd595d6e68863a495a1a2ea6caecd8841c
Author: Adam Ford <aford173@gmail.com>
Date:   Wed Apr 3 08:41:56 2019 -0500

    UPSTREAM: usb: ehci-mx6: Use common code to extract dr_mode
    
    There exists code in drivers/common/common.c to read the dr_mode
    from the device tree.  This patch converts this driver to use that
    function to initialize the driver.
    
    Change-Id: Id4cc8e5a61f63bef9813e83b4183253caccedd1a
    Signed-off-by: Adam Ford <aford173@gmail.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 69535b33bc1fce43dcc10b646cf44db81cffa131)

diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c
index 30398d4a8b..93b90c2f3a 100644
--- a/drivers/usb/host/ehci-mx6.c
+++ b/drivers/usb/host/ehci-mx6.c
@@ -19,6 +19,7 @@
 #include <dm.h>
 #include <asm/mach-types.h>
 #include <power/regulator.h>
+#include <linux/usb/otg.h>
 
 #include "ehci.h"
 
@@ -484,23 +485,23 @@ static int ehci_usb_phy_mode(struct udevice *dev)
 static int ehci_usb_ofdata_to_platdata(struct udevice *dev)
 {
 	struct usb_platdata *plat = dev_get_platdata(dev);
-	const char *mode;
+	enum usb_dr_mode dr_mode;
 
-	mode = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "dr_mode", NULL);
-	if (mode) {
-		if (strcmp(mode, "peripheral") == 0)
-			plat->init_type = USB_INIT_DEVICE;
-		else if (strcmp(mode, "host") == 0)
-			plat->init_type = USB_INIT_HOST;
-		else if (strcmp(mode, "otg") == 0)
-			return ehci_usb_phy_mode(dev);
-		else
-			return -EINVAL;
+	dr_mode = usb_get_dr_mode(dev_of_offset(dev));
 
-		return 0;
-	}
+	switch (dr_mode) {
+	case USB_DR_MODE_HOST:
+		plat->init_type = USB_INIT_HOST;
+		break;
+	case USB_DR_MODE_PERIPHERAL:
+		plat->init_type = USB_INIT_DEVICE;
+		break;
+	case USB_DR_MODE_OTG:
+	case USB_DR_MODE_UNKNOWN:
+		return ehci_usb_phy_mode(dev);
+	};
 
-	return ehci_usb_phy_mode(dev);
+	return 0;
 }
 
 static int ehci_usb_probe(struct udevice *dev)

commit 79e8eddfb9c077581c8b5f20994a94dba51c45e7
Author: Ismael Luceno Cortes <ismael.luceno@silicon-gears.com>
Date:   Tue Mar 19 09:19:44 2019 +0000

    UPSTREAM: usb: host: Print device name when scanning
    
    Drop the counter, it has no meaning other than being the order in which
    the interface is found; the name assigned to the USB host controller
    interface is a better indicator.
    
    Example of the original output:
    > USB0:   USB EHCI 1.10
    > scanning bus 0 for devices... 2 USB Device(s) found
    >        scanning usb for storage devices... 1 Storage Device(s) found
    
    Patched output:
    > Bus usb@ee080100: USB EHCI 1.10
    > scanning bus usb@ee080100 for devices... 2 USB Device(s) found
    >        scanning usb for storage devices... 1 Storage Device(s) found
    
    Change-Id: I4d009cd00a03018c4fec2f9ba573e35010f6328f
    Signed-off-by: Ismael Luceno <ismael.luceno@silicon-gears.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 89aea23abb971fa89b7a96c02024b63d0b918a78)

diff --git a/drivers/usb/host/usb-uclass.c b/drivers/usb/host/usb-uclass.c
index 4e40f4bc3d..b79eadefa0 100644
--- a/drivers/usb/host/usb-uclass.c
+++ b/drivers/usb/host/usb-uclass.c
@@ -213,7 +213,7 @@ static void usb_scan_bus(struct udevice *bus, bool recurse)
 
 	assert(recurse);	/* TODO: Support non-recusive */
 
-	printf("scanning bus %d for devices... ", bus->seq);
+	printf("scanning bus %s for devices... ", bus->name);
 	debug("\n");
 	ret = usb_scan_device(bus, 0, USB_SPEED_FULL, &dev);
 	if (ret)
@@ -245,7 +245,6 @@ int usb_init(void)
 	struct usb_bus_priv *priv;
 	struct udevice *bus;
 	struct uclass *uc;
-	int count = 0;
 	int ret;
 
 	asynch_allowed = 1;
@@ -258,8 +257,7 @@ int usb_init(void)
 
 	uclass_foreach_dev(bus, uc) {
 		/* init low_level USB */
-		printf("USB%d:   ", count);
-		count++;
+		printf("Bus %s: ", bus->name);
 
 #ifdef CONFIG_SANDBOX
 		/*
@@ -330,10 +328,8 @@ int usb_init(void)
 	remove_inactive_children(uc, bus);
 
 	/* if we were not able to find at least one working bus, bail out */
-	if (!count)
-		printf("No controllers found\n");
-	else if (controllers_initialized == 0)
-		printf("USB error: all controllers failed lowlevel init\n");
+	if (controllers_initialized == 0)
+		printf("No working controllers found\n");
 
 	return usb_started ? 0 : -1;
 }

commit 95dc2be99c214768dea72748a0cca3f237580c25
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Thu Jan 24 15:44:53 2019 +0100

    UPSTREAM: usb: udc-uclass: Fixed problem when no alias is defined in DT
    
    commit 801f1fa442 "dm: usb: udc: Use SEQ_ALIAS to index the USB gadget
    ports" changed the way the udevice if found. It uses the alias to find
    a udevice for a given USB port number. In the commit log it was stated
    that if no alias is provided, the bind order will be used instead. However
    it doesn't work. Fixing this by adding a call to uclass_get_device() if
    uclass_get_device_by_seq() fails.
    
    Change-Id: Ib2304c5ecd5d46089c3273ca3ecaa3f9eb5399f8
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Tested-by: Vignesh R <vigneshr@ti.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit e81d9de531fb4c7f14344736bd7568c954e64e14)

diff --git a/drivers/usb/gadget/udc/udc-uclass.c b/drivers/usb/gadget/udc/udc-uclass.c
index 8d7864797a..3053ccf7d9 100644
--- a/drivers/usb/gadget/udc/udc-uclass.c
+++ b/drivers/usb/gadget/udc/udc-uclass.c
@@ -23,8 +23,11 @@ int usb_gadget_initialize(int index)
 		return 0;
 	ret = uclass_get_device_by_seq(UCLASS_USB_GADGET_GENERIC, index, &dev);
 	if (!dev || ret) {
-		pr_err("No USB device found\n");
-		return -ENODEV;
+		ret = uclass_get_device(UCLASS_USB_GADGET_GENERIC, index, &dev);
+		if (!dev || ret) {
+			pr_err("No USB device found\n");
+			return -ENODEV;
+		}
 	}
 	dev_array[index] = dev;
 	return 0;

commit 8a4a81a1483bfb63cbcd2cd91681846c1d21d74d
Author: Abel Vesa <abel.vesa@nxp.com>
Date:   Fri Feb 1 16:40:08 2019 +0000

    UPSTREAM: usb: ehci-mx6: Make regulator DM_REGULATOR dependent
    
    Do the regulator related work only if the build has the DM_REGULATOR.
    
    Change-Id: If11178f890f6084633565fd6d36bfb6f3834293c
    Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
    Reviewed-by: Peng Fan <peng.fan@nxp.com>
    Reviewed-by: Fabio Estevam <festevam@gmail.com>
    Reviewed-by: Lukasz Majewski <lukma@denx.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 921208ebca6f109990359b3089b5f416b269b07b)

diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c
index 64e05984a1..30398d4a8b 100644
--- a/drivers/usb/host/ehci-mx6.c
+++ b/drivers/usb/host/ehci-mx6.c
@@ -405,6 +405,7 @@ static int mx6_init_after_reset(struct ehci_ctrl *dev)
 	if (ret)
 		return ret;
 
+#if CONFIG_IS_ENABLED(DM_REGULATOR)
 	if (priv->vbus_supply) {
 		ret = regulator_set_enable(priv->vbus_supply,
 					   (type == USB_INIT_DEVICE) ?
@@ -414,6 +415,7 @@ static int mx6_init_after_reset(struct ehci_ctrl *dev)
 			return ret;
 		}
 	}
+#endif
 
 	if (type == USB_INIT_DEVICE)
 		return 0;
@@ -515,15 +517,17 @@ static int ehci_usb_probe(struct udevice *dev)
 	priv->portnr = dev->seq;
 	priv->init_type = type;
 
+#if CONFIG_IS_ENABLED(DM_REGULATOR)
 	ret = device_get_supply_regulator(dev, "vbus-supply",
 					  &priv->vbus_supply);
 	if (ret)
 		debug("%s: No vbus supply\n", dev->name);
-
+#endif
 	ret = ehci_mx6_common_init(ehci, priv->portnr);
 	if (ret)
 		return ret;
 
+#if CONFIG_IS_ENABLED(DM_REGULATOR)
 	if (priv->vbus_supply) {
 		ret = regulator_set_enable(priv->vbus_supply,
 					   (type == USB_INIT_DEVICE) ?
@@ -533,6 +537,7 @@ static int ehci_usb_probe(struct udevice *dev)
 			return ret;
 		}
 	}
+#endif
 
 	if (priv->init_type == USB_INIT_HOST) {
 		setbits_le32(&ehci->usbmode, CM_HOST);

commit b1c323b17820d48b84e8513ed594b3a020461f21
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Tue Jan 22 16:48:16 2019 +0100

    UPSTREAM: usb: ether: call _usb_eth_halt() if initialization fails
    
    If the host does not respond in time, the initialization fails. However
    the usb ether driver will still be registered. This will make
    usb_gadget_probe_driver() fail the next time the initialization is
    attempted because it cannot find an available UDC.
    
    Fixing this by calling _usb_eth_halt() when the init fails.
    
    Change-Id: Id61795e444e12265657a8a070f48b35d4a9ca280
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Acked-by: Lukasz Majewski <lukma@denx.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 1c1464c2b19f1b96885040b8adc9cf5ba3c7b32d)

diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c
index 8e65ac107c..0c6b0fca53 100644
--- a/drivers/usb/gadget/ether.c
+++ b/drivers/usb/gadget/ether.c
@@ -2338,6 +2338,8 @@ fail:
 }
 
 /*-------------------------------------------------------------------------*/
+static void _usb_eth_halt(struct ether_priv *priv);
+
 static int _usb_eth_init(struct ether_priv *priv)
 {
 	struct eth_dev *dev = &priv->ethdev;
@@ -2411,6 +2413,7 @@ static int _usb_eth_init(struct ether_priv *priv)
 	rx_submit(dev, dev->rx_req, 0);
 	return 0;
 fail:
+	_usb_eth_halt(priv);
 	return -1;
 }
 
@@ -2490,7 +2493,7 @@ static int _usb_eth_recv(struct ether_priv *priv)
 	return 0;
 }
 
-void _usb_eth_halt(struct ether_priv *priv)
+static void _usb_eth_halt(struct ether_priv *priv)
 {
 	struct eth_dev *dev = &priv->ethdev;
 

commit 09b32b41f240f8271fead1fe35dbb052c9e7da28
Author: Andrew F. Davis <afd@ti.com>
Date:   Thu Jan 17 13:43:02 2019 -0600

    UPSTREAM: spl: Kconfig: Drop the _SUPPORT postfix from SPL_DFU
    
    The symbol CONFIG_SPL_DFU_SUPPORT in SPL build has the same
    meaning as CONFIG_DFU in regular U-Boot. Drop the _SUPPORT
    to allow for cleaner use in code.
    
    Conflicts:
            arch/arm/mach-zynqmp/spl.c
            common/Makefile
            common/spl/Kconfig
            common/spl/spl_ram.c
    
    Change-Id: I93f09d5953284d511df135e6e71c03c0552719a2
    Signed-off-by: Andrew F. Davis <afd@ti.com>
    Reviewed-by: Tom Rini <trini@konsulko.com>
    Acked-by: Lukasz Majewski <lukma@denx.de>
    (cherry picked from commit 6536ca4d6676bf38e50784298e713edc30b9cde9)

diff --git a/arch/arm/cpu/armv8/zynqmp/spl.c b/arch/arm/cpu/armv8/zynqmp/spl.c
index 468dc1dc4d..971de15d94 100644
--- a/arch/arm/cpu/armv8/zynqmp/spl.c
+++ b/arch/arm/cpu/armv8/zynqmp/spl.c
@@ -94,7 +94,7 @@ u32 spl_boot_device(void)
 	case EMMC_MODE:
 		return BOOT_DEVICE_MMC1;
 #endif
-#ifdef CONFIG_SPL_DFU_SUPPORT
+#ifdef CONFIG_SPL_DFU
 	case USB_MODE:
 		return BOOT_DEVICE_DFU;
 #endif
diff --git a/arch/arm/mach-omap2/boot-common.c b/arch/arm/mach-omap2/boot-common.c
index 26245aa169..7221016db3 100644
--- a/arch/arm/mach-omap2/boot-common.c
+++ b/arch/arm/mach-omap2/boot-common.c
@@ -109,7 +109,7 @@ void save_omap_boot_params(void)
 			sys_boot_device = 1;
 			break;
 #endif
-#if defined(BOOT_DEVICE_DFU) && !defined(CONFIG_SPL_DFU_SUPPORT)
+#if defined(BOOT_DEVICE_DFU) && !defined(CONFIG_SPL_DFU)
 		case BOOT_DEVICE_DFU:
 			sys_boot_device = 1;
 			break;
diff --git a/arch/arm/mach-zynqmp/spl.c b/arch/arm/mach-zynqmp/spl.c
new file mode 100644
index 0000000000..fb3955c93f
--- /dev/null
+++ b/arch/arm/mach-zynqmp/spl.c
@@ -0,0 +1,134 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2015 - 2016 Xilinx, Inc.
+ *
+ * Michal Simek <michal.simek@xilinx.com>
+ */
+
+#include <common.h>
+#include <debug_uart.h>
+#include <spl.h>
+
+#include <asm/io.h>
+#include <asm/spl.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/sys_proto.h>
+
+void board_init_f(ulong dummy)
+{
+	board_early_init_f();
+	board_early_init_r();
+
+#ifdef CONFIG_DEBUG_UART
+	/* Uart debug for sure */
+	debug_uart_init();
+	puts("Debug uart enabled\n"); /* or printch() */
+#endif
+	/* Delay is required for clocks to be propagated */
+	udelay(1000000);
+
+	/* Clear the BSS */
+	memset(__bss_start, 0, __bss_end - __bss_start);
+
+	/* No need to call timer init - it is empty for ZynqMP */
+	board_init_r(NULL, 0);
+}
+
+static void ps_mode_reset(ulong mode)
+{
+	writel(mode << ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_EN_SHIFT,
+	       &crlapb_base->boot_pin_ctrl);
+	udelay(5);
+	writel(mode << ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_VAL_SHIFT |
+	       mode << ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_EN_SHIFT,
+	       &crlapb_base->boot_pin_ctrl);
+}
+
+/*
+ * Set default PS_MODE1 which is used for USB ULPI phy reset
+ * Also other resets can be connected to this certain pin
+ */
+#ifndef MODE_RESET
+# define MODE_RESET	PS_MODE1
+#endif
+
+#ifdef CONFIG_SPL_BOARD_INIT
+void spl_board_init(void)
+{
+	preloader_console_init();
+	ps_mode_reset(MODE_RESET);
+	board_init();
+}
+#endif
+
+u32 spl_boot_device(void)
+{
+	u32 reg = 0;
+	u8 bootmode;
+
+#if defined(CONFIG_SPL_ZYNQMP_ALT_BOOTMODE_ENABLED)
+	/* Change default boot mode at run-time */
+	writel(CONFIG_SPL_ZYNQMP_ALT_BOOTMODE << BOOT_MODE_ALT_SHIFT,
+	       &crlapb_base->boot_mode);
+#endif
+
+	reg = readl(&crlapb_base->boot_mode);
+	if (reg >> BOOT_MODE_ALT_SHIFT)
+		reg >>= BOOT_MODE_ALT_SHIFT;
+
+	bootmode = reg & BOOT_MODES_MASK;
+
+	switch (bootmode) {
+	case JTAG_MODE:
+		return BOOT_DEVICE_RAM;
+#ifdef CONFIG_SPL_MMC_SUPPORT
+	case SD_MODE1:
+	case SD1_LSHFT_MODE: /* not working on silicon v1 */
+/* if both controllers enabled, then these two are the second controller */
+#if defined(CONFIG_ZYNQ_SDHCI0) && defined(CONFIG_ZYNQ_SDHCI1)
+		return BOOT_DEVICE_MMC2;
+/* else, fall through, the one SDHCI controller that is enabled is number 1 */
+#endif
+	case SD_MODE:
+	case EMMC_MODE:
+		return BOOT_DEVICE_MMC1;
+#endif
+#ifdef CONFIG_SPL_DFU
+	case USB_MODE:
+		return BOOT_DEVICE_DFU;
+#endif
+#ifdef CONFIG_SPL_SATA_SUPPORT
+	case SW_SATA_MODE:
+		return BOOT_DEVICE_SATA;
+#endif
+#ifdef CONFIG_SPL_SPI_SUPPORT
+	case QSPI_MODE_24BIT:
+	case QSPI_MODE_32BIT:
+		return BOOT_DEVICE_SPI;
+#endif
+	default:
+		printf("Invalid Boot Mode:0x%x\n", bootmode);
+		break;
+	}
+
+	return 0;
+}
+
+#ifdef CONFIG_SPL_OS_BOOT
+int spl_start_uboot(void)
+{
+	handoff_setup();
+
+	return 0;
+}
+#endif
+
+#ifdef CONFIG_SPL_LOAD_FIT
+int board_fit_config_name_match(const char *name)
+{
+	/* Just empty function now - can't decide what to choose */
+	debug("%s: %s\n", __func__, name);
+
+	return 0;
+}
+#endif
diff --git a/common/Makefile b/common/Makefile
index 29a5555988..913dd5d16a 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -67,8 +67,10 @@ obj-$(CONFIG_$(SPL_TPL_)BOOTSTAGE) += bootstage.o
 
 ifdef CONFIG_SPL_BUILD
 ifndef CONFIG_TPL_BUILD
-obj-$(CONFIG_SPL_DFU_SUPPORT) += dfu.o
-obj-$(CONFIG_SPL_DFU_SUPPORT) += cli_hush.o
+ifdef CONFIG_SPL_DFU
+obj-$(CONFIG_DFU_OVER_USB) += dfu.o
+endif
+obj-$(CONFIG_SPL_DFU) += cli_hush.o
 obj-$(CONFIG_SPL_HASH_SUPPORT) += hash.o
 obj-$(CONFIG_SPL_YMODEM_SUPPORT) += xyzModem.o
 obj-$(CONFIG_SPL_LOAD_FIT) += common_fit.o
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 6a101be5c7..0920720ae0 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -698,8 +698,8 @@ config SPL_USBETH_SUPPORT
 	  since the network stack uses a number of environment variables.
 	  See also SPL_NET_SUPPORT and SPL_ETH_SUPPORT.
 
-config SPL_DFU_SUPPORT
-	bool "Support DFU (Device Firmware Upgarde)"
+config SPL_DFU
+	bool "Support DFU (Device Firmware Upgrade)"
 	select SPL_HASH_SUPPORT
 	select SPL_DFU_NO_RESET
 	depends on SPL_RAM_SUPPORT
@@ -713,11 +713,11 @@ config SPL_DFU_SUPPORT
 
 choice
 	bool "DFU device selection"
-	depends on SPL_DFU_SUPPORT
+	depends on SPL_DFU
 
 config SPL_DFU_RAM
 	bool "RAM device"
-	depends on SPL_DFU_SUPPORT && SPL_RAM_SUPPORT
+	depends on SPL_DFU && SPL_RAM_SUPPORT
 	help
 	 select RAM/DDR memory device for loading binary images
 	 (u-boot/kernel) to the selected device partition using
diff --git a/common/spl/Makefile b/common/spl/Makefile
index 26c37ddffe..65ba4480c7 100644
--- a/common/spl/Makefile
+++ b/common/spl/Makefile
@@ -40,7 +40,7 @@ obj-$(CONFIG_$(SPL_TPL_)USB_SUPPORT) += spl_usb.o
 obj-$(CONFIG_$(SPL_TPL_)FAT_SUPPORT) += spl_fat.o
 obj-$(CONFIG_$(SPL_TPL_)EXT_SUPPORT) += spl_ext.o
 obj-$(CONFIG_$(SPL_TPL_)SATA_SUPPORT) += spl_sata.o
-obj-$(CONFIG_$(SPL_TPL_)DFU_SUPPORT) += spl_dfu.o
+obj-$(CONFIG_$(SPL_TPL_)DFU) += spl_dfu.o
 obj-$(CONFIG_$(SPL_TPL_)SPI_LOAD) += spl_spi.o
 obj-$(CONFIG_$(SPL_TPL_)RAM_SUPPORT) += spl_ram.o
 obj-$(CONFIG_$(SPL_TPL_)USB_SDP_SUPPORT) += spl_sdp.o
diff --git a/common/spl/spl_ram.c b/common/spl/spl_ram.c
index 1b1a16c9c1..28663d8915 100644
--- a/common/spl/spl_ram.c
+++ b/common/spl/spl_ram.c
@@ -34,7 +34,7 @@ static int spl_ram_load_image(struct spl_image_info *spl_image,
 
 	header = (struct image_header *)CONFIG_SPL_LOAD_FIT_ADDRESS;
 
-#if defined(CONFIG_SPL_DFU_SUPPORT)
+#if CONFIG_IS_ENABLED(DFU)
 	if (bootdev->boot_device == BOOT_DEVICE_DFU)
 		spl_dfu_cmd(0, "dfu_alt_info_ram", "ram", "0");
 #endif
@@ -66,7 +66,7 @@ static int spl_ram_load_image(struct spl_image_info *spl_image,
 #if defined(CONFIG_SPL_RAM_DEVICE)
 SPL_LOAD_IMAGE_METHOD("RAM", 0, BOOT_DEVICE_RAM, spl_ram_load_image);
 #endif
-#if defined(CONFIG_SPL_DFU_SUPPORT)
+#if CONFIG_IS_ENABLED(DFU)
 SPL_LOAD_IMAGE_METHOD("DFU", 0, BOOT_DEVICE_DFU, spl_ram_load_image);
 #endif
 
diff --git a/configs/evb-rk3066_defconfig b/configs/evb-rk3066_defconfig
index 01b0fa6c96..14523e8587 100644
--- a/configs/evb-rk3066_defconfig
+++ b/configs/evb-rk3066_defconfig
@@ -71,7 +71,7 @@ CONFIG_CMD_DFU=y
 CONFIG_SPL_BLK=y
 CONFIG_SPL_CLK=y
 CONFIG_SPL_DFU_RAM=y
-CONFIG_SPL_DFU_SUPPORT=y
+CONFIG_SPL_DFU=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_OF_CONTROL=y
diff --git a/configs/mk808_defconfig b/configs/mk808_defconfig
index 6d72902589..6377de0b1a 100644
--- a/configs/mk808_defconfig
+++ b/configs/mk808_defconfig
@@ -72,7 +72,7 @@ CONFIG_CMD_DFU=y
 CONFIG_SPL_BLK=y
 CONFIG_SPL_CLK=y
 CONFIG_SPL_DFU_RAM=y
-CONFIG_SPL_DFU_SUPPORT=y
+CONFIG_SPL_DFU=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_MTD_SUPPORT=y
diff --git a/drivers/Makefile b/drivers/Makefile
index 252bd22e2f..c93dd90820 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -47,7 +47,7 @@ obj-$(CONFIG_SPL_USB_GADGET) += usb/gadget/udc/
 obj-$(CONFIG_SPL_USB_GADGET) += usb/gadget/
 obj-$(CONFIG_SPL_USB_GADGET) += usb/common/
 obj-$(CONFIG_SPL_USB_GADGET) += usb/gadget/udc/
-obj-$(CONFIG_SPL_DFU_SUPPORT) += dfu/
+obj-$(CONFIG_SPL_DFU) += dfu/
 obj-$(CONFIG_SPL_WATCHDOG_SUPPORT) += watchdog/
 obj-$(CONFIG_SPL_USB_HOST_SUPPORT) += usb/host/
 obj-$(CONFIG_OMAP_USB_PHY) += usb/phy/
diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile
index e6d0b4baaa..97b904de85 100644
--- a/drivers/usb/gadget/Makefile
+++ b/drivers/usb/gadget/Makefile
@@ -10,7 +10,7 @@ obj-$(CONFIG_USB_ETHER) += epautoconf.o config.o usbstring.o
 
 ifdef CONFIG_SPL_BUILD
 obj-$(CONFIG_SPL_USB_GADGET) += g_dnl.o
-obj-$(CONFIG_SPL_DFU_SUPPORT) += f_dfu.o
+obj-$(CONFIG_SPL_DFU) += f_dfu.o
 obj-$(CONFIG_SPL_USB_SDP_SUPPORT) += f_sdp.o
 endif
 
diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h
index e25eef8df5..db2d91c831 100644
--- a/include/configs/dra7xx_evm.h
+++ b/include/configs/dra7xx_evm.h
@@ -80,7 +80,7 @@
 
 #ifdef CONFIG_SPL_BUILD
 #undef CONFIG_CMD_BOOTD
-#ifdef CONFIG_SPL_DFU_SUPPORT
+#ifdef CONFIG_SPL_DFU
 #define CONFIG_SPL_LOAD_FIT_ADDRESS 0x80200000
 #define DFUARGS \
 	"dfu_bufsiz=0x10000\0" \
diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h
index 92438db0e9..fe7a17de64 100644
--- a/include/configs/xilinx_zynqmp.h
+++ b/include/configs/xilinx_zynqmp.h
@@ -215,7 +215,7 @@
 #endif
 
 /* SPL can't handle all huge variables - define just DFU */
-#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_DFU_SUPPORT)
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_DFU)
 #undef CONFIG_EXTRA_ENV_SETTINGS
 # define CONFIG_EXTRA_ENV_SETTINGS \
 	"dfu_alt_info_ram=uboot.bin ram 0x8000000 0x1000000;" \
@@ -254,7 +254,7 @@
 # define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	"u-boot.img"
 #endif
 
-#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_DFU_SUPPORT)
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_DFU)
 # undef CONFIG_CMD_BOOTD
 # define CONFIG_SPL_ENV_SUPPORT
 # define CONFIG_SPL_HASH_SUPPORT

commit 6baf2cc3b21c30039e040727667de3ca23048659
Author: Jagan Teki <jagan@amarulasolutions.com>
Date:   Tue Jul 10 23:29:36 2018 +0530

    UPSTREAM: usb: host: Drop [e-o]hci-sunxi drivers
    
    Now Allwinner platform is all set to use Generic USB
    controller drivers, so remove the legacy sunxi drivers.
    
    Conflicts:
            drivers/usb/host/ehci-sunxi.c
            drivers/usb/host/ohci-sunxi.c
            scripts/config_whitelist.txt
    
    Change-Id: I68dec1660d92dce8833d5a05584694d7b7c4ab36
    Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
    Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
    (cherry picked from commit 543049ab590620a91b37fa0296edd3bcddd0eba2)

diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index d0c28dcbae..2e1ab6c228 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -17,7 +17,6 @@ obj-$(CONFIG_USB_OHCI_DA8XX) += ohci-da8xx.o
 obj-$(CONFIG_USB_R8A66597_HCD) += r8a66597-hcd.o
 obj-$(CONFIG_USB_SL811HS) += sl811-hcd.o
 obj-$(CONFIG_USB_OHCI_EP93XX) += ohci-ep93xx.o
-obj-$(CONFIG_USB_OHCI_SUNXI) += ohci-sunxi.o
 obj-$(CONFIG_USB_OHCI_LPC32XX) += ohci-lpc32xx.o
 obj-$(CONFIG_USB_OHCI_GENERIC) += ohci-generic.o
 
@@ -39,7 +38,6 @@ obj-$(CONFIG_USB_EHCI_MARVELL) += ehci-marvell.o
 obj-$(CONFIG_USB_EHCI_MSM) += ehci-msm.o
 obj-$(CONFIG_USB_EHCI_PCI) += ehci-pci.o
 obj-$(CONFIG_USB_EHCI_SPEAR) += ehci-spear.o
-obj-$(CONFIG_USB_EHCI_SUNXI) += ehci-sunxi.o
 obj-$(CONFIG_USB_EHCI_TEGRA) += ehci-tegra.o
 obj-$(CONFIG_USB_EHCI_VCT) += ehci-vct.o
 obj-$(CONFIG_USB_EHCI_VF) += ehci-vf.o
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index fca2d78950..400f1aba1c 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -4965,7 +4965,6 @@ CONFIG_USB_EHCI_MXC
 CONFIG_USB_EHCI_MXS
 CONFIG_USB_EHCI_RMOBILE
 CONFIG_USB_EHCI_SPEAR
-CONFIG_USB_EHCI_SUNXI
 CONFIG_USB_EHCI_TEGRA
 CONFIG_USB_EHCI_TXFIFO_THRESH
 CONFIG_USB_EHCI_VCT
@@ -5015,8 +5014,6 @@ CONFIG_USB_OHCI
 CONFIG_USB_OHCI_EP93XX
 CONFIG_USB_OHCI_LPC32XX
 CONFIG_USB_OHCI_NEW
-CONFIG_USB_OHCI_SUNXI
-CONFIG_USB_OMAP3
 CONFIG_USB_OTG
 CONFIG_USB_OTG_BLACKLIST_HUB
 CONFIG_USB_PHY_CFG_BASE

commit 9e4d05401416da7649ccaef39151454a2ae2af4c
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Fri Dec 21 09:50:21 2018 +0100

    UPSTREAM: dm: usb: gadget: Fix boot breakage on sunxi platforms
    
    Fixes commit 013116243950 ("dm: usb: create a new UCLASS ID for USB gadget
    devices")
    
    The UCLASS_DRIVER for id UCLASS_USB_GADGET_GENERIC needs to be declared
    even for platforms that do not enable DM_USB_GADGET. Otherwise the driver
    for their usb peripheral controller fails to bind.
    
    Change-Id: Ide6104f24be321d05d399b03a9fc38663f44a2d1
    Reported-by: Priit Laes <plaes@plaes.org>
    Reported-by: Jagan Teki <jagan@amarulasolutions.com>
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Tested-by: Priit Laes <plaes@plaes.org>
    Acked-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit b3c518a88278619b1e109de114c450237d03e032)

diff --git a/drivers/usb/gadget/udc/Makefile b/drivers/usb/gadget/udc/Makefile
index b0a92767f8..edecf2658e 100644
--- a/drivers/usb/gadget/udc/Makefile
+++ b/drivers/usb/gadget/udc/Makefile
@@ -8,4 +8,5 @@ ifndef CONFIG_$(SPL_)DM_USB_GADGET
 obj-$(CONFIG_USB_DWC3_GADGET)	+= udc-core.o
 endif
 
-obj-$(CONFIG_$(SPL_)DM_USB_GADGET)	+= udc-uclass.o udc-core.o
+obj-$(CONFIG_$(SPL_)DM_USB_GADGET)	+= udc-core.o
+obj-$(CONFIG_$(SPL_)DM) += udc-uclass.o
diff --git a/drivers/usb/gadget/udc/udc-uclass.c b/drivers/usb/gadget/udc/udc-uclass.c
index e9f8f5f246..8d7864797a 100644
--- a/drivers/usb/gadget/udc/udc-uclass.c
+++ b/drivers/usb/gadget/udc/udc-uclass.c
@@ -9,6 +9,7 @@
 #include <dm/device-internal.h>
 #include <linux/usb/gadget.h>
 
+#if CONFIG_IS_ENABLED(DM_USB_GADGET)
 #define MAX_UDC_DEVICES 4
 static struct udevice *dev_array[MAX_UDC_DEVICES];
 int usb_gadget_initialize(int index)
@@ -51,6 +52,7 @@ int usb_gadget_handle_interrupts(int index)
 		return -EINVAL;
 	return dm_usb_gadget_handle_interrupts(dev_array[index]);
 }
+#endif
 
 UCLASS_DRIVER(usb_gadget_generic) = {
 	.id		= UCLASS_USB_GADGET_GENERIC,

commit eccca8a35db09759f3c97ad60a3e831538391120
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Thu Jan 10 15:44:13 2019 +0100

    UPSTREAM: Kconfig: rename CONFIG_SPL_USB_GADGET as CONFIG_SPL_USB_GADGET
    
    The SPL option for USB gadget should be named after the option for u-boot
    (CONFIG_USB_GADGET)
    
    Conflicts:
            arch/arm/mach-imx/mx6/Kconfig
            arch/arm/mach-imx/spl.c
            configs/am335x_boneblack_vboot_defconfig
            configs/am335x_evm_usbspl_defconfig
            configs/am43xx_evm_defconfig
            configs/am43xx_hs_evm_defconfig
            configs/imx6q_logic_defconfig
            configs/mx6memcal_defconfig
            configs/mx6sabresd_defconfig
            configs/pico-hobbit-imx6ul_defconfig
            configs/pico-hobbit-imx7d_defconfig
            configs/pico-imx6ul_defconfig
            configs/pico-imx7d_defconfig
            configs/pico-pi-imx6ul_defconfig
            configs/pico-pi-imx7d_defconfig
            drivers/Makefile
    
    Change-Id: I51305422f13cb7d743274f82c531000c0f93c144
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit f811e9763f4b6f6f5e3fe9c2fa30d2b6c62d289e)

diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c
index 147aac1573..3ca5420e53 100644
--- a/arch/arm/mach-imx/spl.c
+++ b/arch/arm/mach-imx/spl.c
@@ -84,7 +84,7 @@ u32 spl_boot_device(void)
 	return BOOT_DEVICE_NONE;
 }
 
-#ifdef CONFIG_SPL_USB_GADGET_SUPPORT
+#ifdef CONFIG_SPL_USB_GADGET
 int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
 {
 	put_unaligned(CONFIG_USB_GADGET_PRODUCT_NUM + 0xfff, &dev->idProduct);
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 7e77a045dd..6a101be5c7 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -680,13 +680,13 @@ config SPL_USB_SUPPORT
 	  config options. This enables loading from USB using a configured
 	  device.
 
-config SPL_USB_GADGET_SUPPORT
+config SPL_USB_GADGET
 	bool "Suppport USB Gadget drivers"
 	help
 	  Enable USB Gadget API which allows to enable USB device functions
 	  in SPL.
 
-if SPL_USB_GADGET_SUPPORT
+if SPL_USB_GADGET
 
 config SPL_USBETH_SUPPORT
 	bool "Support USB Ethernet drivers"
diff --git a/configs/am335x_evm_usbspl_defconfig b/configs/am335x_evm_usbspl_defconfig
index c51f343ab1..0bdedb4533 100644
--- a/configs/am335x_evm_usbspl_defconfig
+++ b/configs/am335x_evm_usbspl_defconfig
@@ -14,7 +14,7 @@ CONFIG_SPL_STACK_R=y
 CONFIG_SPL_MUSB_NEW_SUPPORT=y
 CONFIG_SPL_NET_SUPPORT=y
 CONFIG_SPL_OS_BOOT=y
-CONFIG_SPL_USB_GADGET_SUPPORT=y
+CONFIG_SPL_USB_GADGET=y
 CONFIG_SPL_USBETH_SUPPORT=y
 # CONFIG_SPL_YMODEM_SUPPORT is not set
 CONFIG_FASTBOOT=y
diff --git a/configs/am43xx_hs_evm_defconfig b/configs/am43xx_hs_evm_defconfig
index a9b7eca8e7..ec1d12f13e 100644
--- a/configs/am43xx_hs_evm_defconfig
+++ b/configs/am43xx_hs_evm_defconfig
@@ -25,7 +25,7 @@ CONFIG_SPL_NET_SUPPORT=y
 CONFIG_SPL_NET_VCI_STRING="AM43xx U-Boot SPL"
 CONFIG_SPL_USB_HOST_SUPPORT=y
 CONFIG_SPL_USB_SUPPORT=y
-CONFIG_SPL_USB_GADGET_SUPPORT=y
+CONFIG_SPL_USB_GADGET=y
 CONFIG_SPL_USBETH_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_IMLS is not set
diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig
index 57332f5368..cc4706ff68 100644
--- a/configs/apalis_imx6_defconfig
+++ b/configs/apalis_imx6_defconfig
@@ -18,7 +18,7 @@ CONFIG_SPL=y
 CONFIG_SPL_DMA_SUPPORT=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_USB_HOST_SUPPORT=y
-CONFIG_SPL_USB_GADGET_SUPPORT=y
+CONFIG_SPL_USB_GADGET=y
 CONFIG_SPL_USB_SDP_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="Apalis iMX6 # "
diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig
index 9b45811e01..2844180e73 100644
--- a/configs/colibri_imx6_defconfig
+++ b/configs/colibri_imx6_defconfig
@@ -18,7 +18,7 @@ CONFIG_SPL=y
 CONFIG_SPL_DMA_SUPPORT=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_USB_HOST_SUPPORT=y
-CONFIG_SPL_USB_GADGET_SUPPORT=y
+CONFIG_SPL_USB_GADGET=y
 CONFIG_SPL_USB_SDP_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="Colibri iMX6 # "
diff --git a/configs/display5_factory_defconfig b/configs/display5_factory_defconfig
index 3cd2d6c888..57c703a063 100644
--- a/configs/display5_factory_defconfig
+++ b/configs/display5_factory_defconfig
@@ -23,7 +23,7 @@ CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_OS_BOOT=y
 CONFIG_SPL_SPI_LOAD=y
 CONFIG_SPL_USB_HOST_SUPPORT=y
-CONFIG_SPL_USB_GADGET_SUPPORT=y
+CONFIG_SPL_USB_GADGET=y
 CONFIG_SPL_USB_SDP_SUPPORT=y
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_HUSH_PARSER=y
diff --git a/configs/evb-rk3066_defconfig b/configs/evb-rk3066_defconfig
index 86b97406ac..01b0fa6c96 100644
--- a/configs/evb-rk3066_defconfig
+++ b/configs/evb-rk3066_defconfig
@@ -84,7 +84,7 @@ CONFIG_SPL_STACK_R_ADDR=0x70000000
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200000
 CONFIG_SPL_SYSCON=y
 CONFIG_SPL_TINY_MEMSET=y
-CONFIG_SPL_USB_GADGET_SUPPORT=y
+CONFIG_SPL_USB_GADGET=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 # CONFIG_SPL_USE_ARCH_MEMCPY is not set
 # CONFIG_SPL_USE_ARCH_MEMSET is not set
diff --git a/configs/mk808_defconfig b/configs/mk808_defconfig
index c3bb8df49a..6d72902589 100644
--- a/configs/mk808_defconfig
+++ b/configs/mk808_defconfig
@@ -87,7 +87,7 @@ CONFIG_SPL_STACK_R_ADDR=0x70000000
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200000
 CONFIG_SPL_SYSCON=y
 CONFIG_SPL_TINY_MEMSET=y
-CONFIG_SPL_USB_GADGET_SUPPORT=y
+CONFIG_SPL_USB_GADGET=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 # CONFIG_SPL_USE_ARCH_MEMCPY is not set
 # CONFIG_SPL_USE_ARCH_MEMSET is not set
diff --git a/configs/mx6memcal_defconfig b/configs/mx6memcal_defconfig
new file mode 100644
index 0000000000..e9e1fc2635
--- /dev/null
+++ b/configs/mx6memcal_defconfig
@@ -0,0 +1,43 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
+CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_MX6_DDRCAL=y
+CONFIG_TARGET_MX6MEMCAL=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,SPL,MX6QDL"
+CONFIG_SUPPORT_RAW_INITRD=y
+CONFIG_SPL_USB_HOST_SUPPORT=y
+CONFIG_SPL_USB_GADGET=y
+CONFIG_SPL_USB_ETHER=y
+CONFIG_SPL_USB_SDP_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_HUSH_PARSER=y
+# CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_BOOTM is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_EXPORTENV is not set
+# CONFIG_CMD_IMPORTENV is not set
+# CONFIG_CMD_EDITENV is not set
+# CONFIG_CMD_SAVEENV is not set
+# CONFIG_CMD_ENV_EXISTS is not set
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_CACHE=y
+# CONFIG_NET is not set
+# CONFIG_MMC is not set
+CONFIG_USB=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="FSL"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
+CONFIG_CI_UDC=y
+CONFIG_REGEX=y
diff --git a/configs/pico-hobbit-imx6ul_defconfig b/configs/pico-hobbit-imx6ul_defconfig
new file mode 100644
index 0000000000..299eb37c12
--- /dev/null
+++ b/configs/pico-hobbit-imx6ul_defconfig
@@ -0,0 +1,52 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
+CONFIG_SYS_TEXT_BASE=0x87800000
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_TARGET_PICO_IMX6UL=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
+CONFIG_BOOTDELAY=3
+CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
+CONFIG_DEFAULT_FDT_FILE="imx6ul-pico-hobbit.dtb"
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_USB_HOST_SUPPORT=y
+CONFIG_SPL_USB_GADGET=y
+CONFIG_SPL_USB_SDP_SUPPORT=y
+CONFIG_CMD_BOOTMENU=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_SDP=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_DFU_MMC=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_SIZE=0x10000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_FSL_ESDHC=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_MII=y
+CONFIG_USB=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="FSL"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
+CONFIG_CI_UDC=y
+CONFIG_OF_LIBFDT=y
diff --git a/configs/pico-hobbit-imx7d_defconfig b/configs/pico-hobbit-imx7d_defconfig
new file mode 100644
index 0000000000..4fe7beeaec
--- /dev/null
+++ b/configs/pico-hobbit-imx7d_defconfig
@@ -0,0 +1,59 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MX7=y
+CONFIG_SYS_TEXT_BASE=0x87800000
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_TARGET_PICO_IMX7D=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL=y
+CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
+CONFIG_IMX_RDC=y
+CONFIG_IMX_BOOTAUX=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
+CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
+CONFIG_DEFAULT_FDT_FILE="imx7d-pico-hobbit.dtb"
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_USB_HOST_SUPPORT=y
+CONFIG_SPL_USB_GADGET=y
+CONFIG_SPL_USB_SDP_SUPPORT=y
+# CONFIG_CMD_BOOTD is not set
+CONFIG_CMD_BOOTMENU=y
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_XIMG is not set
+CONFIG_CMD_SPL=y
+CONFIG_CMD_SPL_WRITE_SIZE=0x20000
+CONFIG_CMD_DFU=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_SDP=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_MII is not set
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_DFU_MMC=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x82000000
+CONFIG_FASTBOOT_BUF_SIZE=0x10000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_FSL_ESDHC=y
+CONFIG_PHYLIB=y
+CONFIG_MII=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_MXC_USB_OTG_HACTIVE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="FSL"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
+CONFIG_CI_UDC=y
+CONFIG_OF_LIBFDT=y
diff --git a/configs/pico-pi-imx6ul_defconfig b/configs/pico-pi-imx6ul_defconfig
new file mode 100644
index 0000000000..9049a49ee0
--- /dev/null
+++ b/configs/pico-pi-imx6ul_defconfig
@@ -0,0 +1,52 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
+CONFIG_SYS_TEXT_BASE=0x87800000
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_TARGET_PICO_IMX6UL=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
+CONFIG_BOOTDELAY=3
+CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
+CONFIG_DEFAULT_FDT_FILE="imx6ul-pico-pi.dtb"
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_USB_HOST_SUPPORT=y
+CONFIG_SPL_USB_GADGET=y
+CONFIG_SPL_USB_SDP_SUPPORT=y
+CONFIG_CMD_BOOTMENU=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_SDP=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_DFU_MMC=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_SIZE=0x10000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_FSL_ESDHC=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_MII=y
+CONFIG_USB=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="FSL"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
+CONFIG_CI_UDC=y
+CONFIG_OF_LIBFDT=y
diff --git a/configs/pico-pi-imx7d_defconfig b/configs/pico-pi-imx7d_defconfig
new file mode 100644
index 0000000000..a2d857eeb8
--- /dev/null
+++ b/configs/pico-pi-imx7d_defconfig
@@ -0,0 +1,59 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MX7=y
+CONFIG_SYS_TEXT_BASE=0x87800000
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_TARGET_PICO_IMX7D=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL=y
+CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
+CONFIG_IMX_RDC=y
+CONFIG_IMX_BOOTAUX=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
+CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
+CONFIG_DEFAULT_FDT_FILE="imx7d-pico-pi.dtb"
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_USB_HOST_SUPPORT=y
+CONFIG_SPL_USB_GADGET=y
+CONFIG_SPL_USB_SDP_SUPPORT=y
+# CONFIG_CMD_BOOTD is not set
+CONFIG_CMD_BOOTMENU=y
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_XIMG is not set
+CONFIG_CMD_SPL=y
+CONFIG_CMD_SPL_WRITE_SIZE=0x20000
+CONFIG_CMD_DFU=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_SDP=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_MII is not set
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_DFU_MMC=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x82000000
+CONFIG_FASTBOOT_BUF_SIZE=0x10000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_FSL_ESDHC=y
+CONFIG_PHYLIB=y
+CONFIG_MII=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_MXC_USB_OTG_HACTIVE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="FSL"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
+CONFIG_CI_UDC=y
+CONFIG_OF_LIBFDT=y
diff --git a/drivers/Makefile b/drivers/Makefile
index 8f9aaf5714..252bd22e2f 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -42,8 +42,11 @@ obj-$(CONFIG_SPL_PCI_SUPPORT) += pci/
 obj-$(CONFIG_SPL_PCH_SUPPORT) += pch/
 obj-$(CONFIG_SPL_RTC_SUPPORT) += rtc/
 obj-$(CONFIG_SPL_MUSB_NEW_SUPPORT) += usb/musb-new/
-obj-$(CONFIG_SPL_USB_GADGET_SUPPORT) += usb/gadget/
-obj-$(CONFIG_SPL_USB_GADGET_SUPPORT) += usb/gadget/udc/
+obj-$(CONFIG_SPL_USB_GADGET) += usb/gadget/
+obj-$(CONFIG_SPL_USB_GADGET) += usb/gadget/udc/
+obj-$(CONFIG_SPL_USB_GADGET) += usb/gadget/
+obj-$(CONFIG_SPL_USB_GADGET) += usb/common/
+obj-$(CONFIG_SPL_USB_GADGET) += usb/gadget/udc/
 obj-$(CONFIG_SPL_DFU_SUPPORT) += dfu/
 obj-$(CONFIG_SPL_WATCHDOG_SUPPORT) += watchdog/
 obj-$(CONFIG_SPL_USB_HOST_SUPPORT) += usb/host/
diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile
index 7258099c1c..e6d0b4baaa 100644
--- a/drivers/usb/gadget/Makefile
+++ b/drivers/usb/gadget/Makefile
@@ -9,7 +9,7 @@ obj-$(CONFIG_USB_GADGET) += epautoconf.o config.o usbstring.o
 obj-$(CONFIG_USB_ETHER) += epautoconf.o config.o usbstring.o
 
 ifdef CONFIG_SPL_BUILD
-obj-$(CONFIG_SPL_USB_GADGET_SUPPORT) += g_dnl.o
+obj-$(CONFIG_SPL_USB_GADGET) += g_dnl.o
 obj-$(CONFIG_SPL_DFU_SUPPORT) += f_dfu.o
 obj-$(CONFIG_SPL_USB_SDP_SUPPORT) += f_sdp.o
 endif
diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index 97b10d82c5..6d73f4042f 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -85,7 +85,7 @@ endif
 
 libs-$(CONFIG_SPL_LIBDISK_SUPPORT) += disk/
 libs-y += drivers/
-libs-$(CONFIG_SPL_USB_GADGET_SUPPORT) += drivers/usb/dwc3/
+libs-$(CONFIG_SPL_USB_GADGET) += drivers/usb/dwc3/
 libs-y += dts/
 libs-y += fs/
 libs-$(CONFIG_SPL_POST_MEM_SUPPORT) += post/drivers/

commit 152ba5092aa280fc5018f395432a4439698097c8
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Sat Dec 15 17:43:27 2018 +0100

    UPSTREAM: dm: usb: udc: Use SEQ_ALIAS to index the USB gadget ports
    
    dfu, fastbot and other usb gadget commands take the USB port index as a
    parameter. Currently this index is assigned in the order of the driver
    bindings.
    Changing this behavior using the SEQ_ALIAS feature. This option assign to
    the device a SEQ number based on its alias (if it exists)
    
    To use it we must set the DM_UC_FLAG_SEQ_ALIAS flag and follow the existing
    naming convention: use "usb" for the name of the gadget UCLASS_DRIVER
    (same as for the UCLASS_USB).
    
    If no alias is provided, then the index falls back to the order in which
    the bindings took place.
    
    Change-Id: I3bd5d0ef6871f69d2e4b2667817a0a81e0cee83e
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Reported-by: Sam Protsenko <semen.protsenko@linaro.org>
    Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
    Tested-by: Sam Protsenko <semen.protsenko@linaro.org>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 801f1fa44275e274e33bdfc7fb76535cc6118d61)

diff --git a/drivers/usb/gadget/udc/udc-uclass.c b/drivers/usb/gadget/udc/udc-uclass.c
index 062051857a..e9f8f5f246 100644
--- a/drivers/usb/gadget/udc/udc-uclass.c
+++ b/drivers/usb/gadget/udc/udc-uclass.c
@@ -20,7 +20,7 @@ int usb_gadget_initialize(int index)
 		return -EINVAL;
 	if (dev_array[index])
 		return 0;
-	ret = uclass_get_device(UCLASS_USB_GADGET_GENERIC, index, &dev);
+	ret = uclass_get_device_by_seq(UCLASS_USB_GADGET_GENERIC, index, &dev);
 	if (!dev || ret) {
 		pr_err("No USB device found\n");
 		return -ENODEV;
@@ -54,5 +54,6 @@ int usb_gadget_handle_interrupts(int index)
 
 UCLASS_DRIVER(usb_gadget_generic) = {
 	.id		= UCLASS_USB_GADGET_GENERIC,
-	.name		= "usb_gadget_generic",
+	.name		= "usb",
+	.flags		= DM_UC_FLAG_SEQ_ALIAS,
 };

commit 3403786c687ad59ce4f57ac0e4d9f08569541358
Author: Ye Li <ye.li@nxp.com>
Date:   Mon Jan 7 02:45:46 2019 +0000

    UPSTREAM: usb: xhci-mem: Fix scratchpad array issue
    
    After updating the value of dev_context_ptrs[0], we should flush this
    from cache to memory. Otherwise the xhci controller won't use it.
    
    Change-Id: I1328e8ddfcf84a46975897b5eb46f4f887e81464
    Signed-off-by: Ye Li <ye.li@nxp.com>
    Reviewed-by: Marek Vasut <marex@denx.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 8c6cc71b40357dad4e3f21e9f1bd84db76a3d994)

diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
index 9ceb9698ef..a1f28fff3e 100644
--- a/drivers/usb/host/xhci-mem.c
+++ b/drivers/usb/host/xhci-mem.c
@@ -370,6 +370,9 @@ static int xhci_scratchpad_alloc(struct xhci_ctrl *ctrl)
 	ctrl->dcbaa->dev_context_ptrs[0] =
 		cpu_to_le64((uintptr_t)scratchpad->sp_array);
 
+	xhci_flush_cache((uintptr_t)&ctrl->dcbaa->dev_context_ptrs[0],
+		sizeof(ctrl->dcbaa->dev_context_ptrs[0]));
+
 	page_size = xhci_readl(&hcor->or_pagesize) & 0xffff;
 	for (i = 0; i < 16; i++) {
 		if ((0x1 & page_size) != 0)

commit 204f1379834a139feeaeb30cd85844cedd2e29d6
Author: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Date:   Thu Dec 13 15:16:36 2018 +0530

    UPSTREAM: usb: composite: Fix max packet size for USB3.0
    
    For USB3.0, the max packetsize for GET_DESCRIPTOR should be
    sent as exponent value for 2. This means for 512, max packet
    size should be filled with 9(2^9=512). Also, fill the USB
    version field with 3.0 if speed is negotiated to Superspeed.
    This fixes the issue of DFU gadget download failure with
    superspeed. Without this patch, the max packet size is
    overflowed to zero as the bMaxPacketsize is of u8 and hence
    host is not able to detect this device.
    
    Conflicts:
            drivers/usb/gadget/composite.c
    
    Change-Id: I6aff8e97637d788f309273f0c0afb49dbb71001d
    Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    (cherry picked from commit 771e76515ed5abe7eff73a54ccb0c9ae55f34388)

diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c
index 4ea7dbc607..7cd99fbdd2 100644
--- a/drivers/usb/gadget/composite.c
+++ b/drivers/usb/gadget/composite.c
@@ -822,8 +822,7 @@ composite_setup(struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl)
 		case USB_DT_DEVICE:
 			cdev->desc.bNumConfigurations =
 				count_configs(cdev, USB_DT_DEVICE);
-			cdev->desc.bMaxPacketSize0 =
-				cdev->gadget->ep0->maxpacket;
+
 			if (gadget_is_superspeed(gadget) &&
 			    gadget->speed >= USB_SPEED_SUPER) {
 				/*
@@ -836,6 +835,9 @@ composite_setup(struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl)
 				else
 					cdev->desc.bcdUSB = cpu_to_le16(0x0300);
 				cdev->desc.bMaxPacketSize0 = 9;
+			} else {
+				cdev->desc.bMaxPacketSize0 =
+					cdev->gadget->ep0->maxpacket;
 			}
 
 			value = min(w_length, (u16) sizeof cdev->desc);

commit f7334c8176f890d1f0ae12d98907932a2db72af5
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Tue Dec 4 11:30:50 2018 +0100

    UPSTREAM: dwc3-generic: Add support for the am437x
    
    Change-Id: Ifbb1d31cfa83384e60c2d20af4e1b37085ee4232
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Reviewed-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 1ce5f1f933b6b3e0994b4b7d198afe0198442888)

diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c
index d78bff4e20..c92f5f3dbb 100644
--- a/drivers/usb/dwc3/dwc3-generic.c
+++ b/drivers/usb/dwc3/dwc3-generic.c
@@ -344,6 +344,7 @@ static const struct udevice_id dwc3_glue_ids[] = {
 	{ .compatible = "xlnx,zynqmp-dwc3" },
 	{ .compatible = "ti,keystone-dwc3"},
 	{ .compatible = "ti,dwc3", .data = (ulong)&ti_ops },
+	{ .compatible = "ti,am437x-dwc3", .data = (ulong)&ti_ops },
 	{ }
 };
 

commit 5277273c32b08bf7931038df2fbc94fea727534b
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Tue Dec 4 11:13:00 2018 +0100

    UPSTREAM: usb: host: replace xhci-keystone driver by the generic dwc3 driver
    
    The keystone platforms can use the generic DC3 driver. Removing the
    keystone-spcecific xchi driver and add the configuration options to enable
    the generic DWC3 driver on all K2 platforms.
    
    Conflicts:
            configs/k2e_evm_defconfig
            configs/k2e_hs_evm_defconfig
            configs/k2g_evm_defconfig
            configs/k2g_hs_evm_defconfig
            configs/k2hk_evm_defconfig
            configs/k2hk_hs_evm_defconfig
            configs/k2l_evm_defconfig
            configs/k2l_hs_evm_defconfig
            drivers/usb/host/xhci-keystone.c
    
    Change-Id: I0d708152a220704d24b86c528ee7ace2b0b05a4a
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Reviewed-by: Tom Rini <trini@konsulko.com>
    (cherry picked from commit 4dd76d0f96ab18a2bda622ec4dac822e908dd069)

diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig
index c8a03b9216..821d0bd91c 100644
--- a/configs/k2e_evm_defconfig
+++ b/configs/k2e_evm_defconfig
@@ -34,6 +34,7 @@ CONFIG_ENV_IS_IN_NAND=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_TI_AEMIF=y
+CONFIG_MISC=y
 # CONFIG_MMC is not set
 CONFIG_NAND=y
 CONFIG_NAND_DAVINCI=y
@@ -42,12 +43,19 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_DM_ETH=y
+CONFIG_MII=y
+CONFIG_PHY=y
+CONFIG_NOP_PHY=y
+CONFIG_KEYSTONE_USB_PHY=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_DAVINCI_SPI=y
 CONFIG_USB=y
+CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/k2e_hs_evm_defconfig b/configs/k2e_hs_evm_defconfig
index 01320fb16c..824442e7ac 100644
--- a/configs/k2e_hs_evm_defconfig
+++ b/configs/k2e_hs_evm_defconfig
@@ -23,6 +23,7 @@ CONFIG_ENV_IS_IN_NAND=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_TI_AEMIF=y
+CONFIG_MISC=y
 # CONFIG_MMC is not set
 CONFIG_NAND=y
 CONFIG_NAND_DAVINCI=y
@@ -31,12 +32,19 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_DM_ETH=y
+CONFIG_MII=y
+CONFIG_PHY=y
+CONFIG_NOP_PHY=y
+CONFIG_KEYSTONE_USB_PHY=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_DAVINCI_SPI=y
 CONFIG_USB=y
+CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig
index 6c7eb30a72..ead23de47c 100644
--- a/configs/k2g_evm_defconfig
+++ b/configs/k2g_evm_defconfig
@@ -32,6 +32,8 @@ CONFIG_OF_CONTROL=y
 CONFIG_OF_LIST="keystone-k2g-generic keystone-k2g-evm keystone-k2g-ice"
 CONFIG_DM=y
 # CONFIG_BLK is not set
+CONFIG_SYS_I2C_DAVINCI=y
+CONFIG_MISC=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_NAND=y
@@ -45,6 +47,12 @@ CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
 CONFIG_DM_ETH=y
+<<<<<<< HEAD
+=======
+CONFIG_MII=y
+CONFIG_PHY=y
+CONFIG_NOP_PHY=y
+>>>>>>> 4dd76d0... usb: host: replace xhci-keystone driver by the generic dwc3 driver
 CONFIG_REMOTEPROC_TI_POWER=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
@@ -52,6 +60,9 @@ CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_DAVINCI_SPI=y
 CONFIG_USB=y
+CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/k2g_hs_evm_defconfig b/configs/k2g_hs_evm_defconfig
index c8dc268265..aec3c5e3e7 100644
--- a/configs/k2g_hs_evm_defconfig
+++ b/configs/k2g_hs_evm_defconfig
@@ -20,6 +20,8 @@ CONFIG_EFI_PARTITION=y
 CONFIG_OF_CONTROL=y
 CONFIG_DM=y
 # CONFIG_BLK is not set
+CONFIG_SYS_I2C_DAVINCI=y
+CONFIG_MISC=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_NAND=y
@@ -33,6 +35,12 @@ CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
 CONFIG_DM_ETH=y
+<<<<<<< HEAD
+=======
+CONFIG_MII=y
+CONFIG_PHY=y
+CONFIG_NOP_PHY=y
+>>>>>>> 4dd76d0... usb: host: replace xhci-keystone driver by the generic dwc3 driver
 CONFIG_REMOTEPROC_TI_POWER=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
@@ -40,6 +48,9 @@ CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_DAVINCI_SPI=y
 CONFIG_USB=y
+CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig
index 495148e7d0..447d861b69 100644
--- a/configs/k2hk_evm_defconfig
+++ b/configs/k2hk_evm_defconfig
@@ -34,6 +34,7 @@ CONFIG_ENV_IS_IN_NAND=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_TI_AEMIF=y
+CONFIG_MISC=y
 # CONFIG_MMC is not set
 CONFIG_NAND=y
 CONFIG_NAND_DAVINCI=y
@@ -42,12 +43,22 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_DM_ETH=y
+<<<<<<< HEAD
+=======
+CONFIG_MII=y
+CONFIG_PHY=y
+CONFIG_NOP_PHY=y
+CONFIG_KEYSTONE_USB_PHY=y
+>>>>>>> 4dd76d0... usb: host: replace xhci-keystone driver by the generic dwc3 driver
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_DAVINCI_SPI=y
 CONFIG_USB=y
+CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/k2hk_hs_evm_defconfig b/configs/k2hk_hs_evm_defconfig
index 94c6f98f58..53a3511614 100644
--- a/configs/k2hk_hs_evm_defconfig
+++ b/configs/k2hk_hs_evm_defconfig
@@ -23,6 +23,7 @@ CONFIG_ENV_IS_IN_NAND=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_TI_AEMIF=y
+CONFIG_MISC=y
 # CONFIG_MMC is not set
 CONFIG_NAND=y
 CONFIG_NAND_DAVINCI=y
@@ -31,12 +32,19 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_DM_ETH=y
+CONFIG_MII=y
+CONFIG_PHY=y
+CONFIG_NOP_PHY=y
+CONFIG_KEYSTONE_USB_PHY=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_DAVINCI_SPI=y
 CONFIG_USB=y
+CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig
index 6f9ce2c429..973bddbe60 100644
--- a/configs/k2l_evm_defconfig
+++ b/configs/k2l_evm_defconfig
@@ -34,6 +34,7 @@ CONFIG_ENV_IS_IN_NAND=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_TI_AEMIF=y
+CONFIG_MISC=y
 # CONFIG_MMC is not set
 CONFIG_NAND=y
 CONFIG_NAND_DAVINCI=y
@@ -42,12 +43,19 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_DM_ETH=y
+CONFIG_MII=y
+CONFIG_PHY=y
+CONFIG_NOP_PHY=y
+CONFIG_KEYSTONE_USB_PHY=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_DAVINCI_SPI=y
 CONFIG_USB=y
+CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/k2l_hs_evm_defconfig b/configs/k2l_hs_evm_defconfig
index 0381a7240c..592cd42224 100644
--- a/configs/k2l_hs_evm_defconfig
+++ b/configs/k2l_hs_evm_defconfig
@@ -27,6 +27,7 @@ CONFIG_ENV_IS_IN_NAND=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_TI_AEMIF=y
+CONFIG_MISC=y
 # CONFIG_MMC is not set
 CONFIG_NAND=y
 CONFIG_NAND_DAVINCI=y
@@ -36,12 +37,19 @@ CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_MARVELL=y
 CONFIG_DM_ETH=y
+CONFIG_MII=y
+CONFIG_PHY=y
+CONFIG_NOP_PHY=y
+CONFIG_KEYSTONE_USB_PHY=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_DAVINCI_SPI=y
 CONFIG_USB=y
+CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
 CONFIG_USB_STORAGE=y
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 236058f224..d0c28dcbae 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -52,7 +52,6 @@ obj-$(CONFIG_USB_XHCI_DWC3) += xhci-dwc3.o
 obj-$(CONFIG_USB_XHCI_DWC3_OF_SIMPLE) += dwc3-of-simple.o
 obj-$(CONFIG_USB_XHCI_ROCKCHIP) += xhci-rockchip.o
 obj-$(CONFIG_USB_XHCI_ZYNQMP) += xhci-zynqmp.o
-obj-$(CONFIG_USB_XHCI_KEYSTONE) += xhci-keystone.o
 obj-$(CONFIG_USB_XHCI_EXYNOS) += xhci-exynos5.o
 obj-$(CONFIG_USB_XHCI_FSL) += xhci-fsl.o
 obj-$(CONFIG_USB_XHCI_MVEBU) += xhci-mvebu.o
diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h
index c7431f7ec7..932627ec60 100644
--- a/include/configs/ti_armv7_keystone2.h
+++ b/include/configs/ti_armv7_keystone2.h
@@ -182,13 +182,6 @@
 #define CONFIG_SYS_NAND_MAX_CHIPS		1
 #define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
 
-/* USB Configuration */
-#define CONFIG_USB_XHCI_KEYSTONE
-#define CONFIG_USB_SS_BASE			KS2_USB_SS_BASE
-#define CONFIG_USB_HOST_XHCI_BASE		KS2_USB_HOST_XHCI_BASE
-#define CONFIG_DEV_USB_PHY_BASE			KS2_DEV_USB_PHY_BASE
-#define CONFIG_USB_PHY_CFG_BASE			KS2_USB_PHY_CFG_BASE
-
 /* U-Boot general configuration */
 #define CONFIG_MISC_INIT_R
 #define CONFIG_MX_CYCLIC

commit 4323bebbd537eb3f13bce7256c233dcf38f4d3c0
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Tue Dec 4 11:12:56 2018 +0100

    UPSTREAM: usb: dwc3-generic: make it compatible with "ti, keystone-dwc3"
    
    Change-Id: Ibb728efe79707ce2d5b4cc7910428b4821719b28
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Reviewed-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 1c03ade328dd08603fa717076c5888557f1a9fa7)

diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c
index 31ed1842c6..d78bff4e20 100644
--- a/drivers/usb/dwc3/dwc3-generic.c
+++ b/drivers/usb/dwc3/dwc3-generic.c
@@ -342,6 +342,7 @@ static int dwc3_glue_remove(struct udevice *dev)
 
 static const struct udevice_id dwc3_glue_ids[] = {
 	{ .compatible = "xlnx,zynqmp-dwc3" },
+	{ .compatible = "ti,keystone-dwc3"},
 	{ .compatible = "ti,dwc3", .data = (ulong)&ti_ops },
 	{ }
 };

commit 0a04ddb5ea876f3785dca631e9e41e7428e6ee6f
Author: Martyn Welch <martyn@welchs.me.uk>
Date:   Mon Dec 10 11:05:16 2018 +0000

    UPSTREAM: usb: Don't enable CONFIG_SPL_DM_USB for non-DM SPL
    
    When CONFIG_SPL_DM_USB was added, it was added defaulted on without
    protection to ensure it didn't get set for non-DM SPL builds.
    
    This leads to unexpected and confusing failures when building a DM based
    U-Boot but with a non-DM SPL, as the defconfig is unlikely to have
    CONFIG_SPL_DM_USB actively disabled.
    
    Tweak the Kconfig to not enable this setting unless CONFIG_SPL_DM is set.
    
    Change-Id: I11e59ec852e9621f01e526e21805a922ba1feb44
    Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 16ecb295b3834d8017d922ae46eedbbf6fd6c99b)

diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig
index f170893548..9181729759 100644
--- a/drivers/usb/Kconfig
+++ b/drivers/usb/Kconfig
@@ -49,7 +49,7 @@ config DM_USB
 
 config SPL_DM_USB
 	bool "Enable driver model for USB in SPL"
-	depends on DM_USB
+	depends on SPL_DM && DM_USB
 	default y
 
 config DM_USB_GADGET

commit 57521aaaf8e6098197d33443c6e2133815c14e4a
Author: Lukasz Majewski <lukma@denx.de>
Date:   Fri Nov 23 17:36:19 2018 +0100

    UPSTREAM: usb: composite: Move bitmap related operations to ./include/linux/bitmap.h
    
    The BITMAP related operations can now be moved to ./include/linux/bitmap.h
    file to mimic the Linux kernel directory tree.
    
    This change also allows to remove the lin_gadget_compat.h header file
    (which is a legacy code only for composite U-boot layer).
    It was also possible to remove #includes from several USB gadget drivers.
    
    Conflicts:
            include/usb/lin_gadget_compat.h
    
    Change-Id: Id61d6f9cef89ca238f082f430f6d01ac1009aa07
    Signed-off-by: Lukasz Majewski <lukma@denx.de>
    Reviewed-by: Stefan Agner <stefan.agner@toradex.com>
    (cherry picked from commit 916fa097997a5e1b70768ce944de28e038d4bebf)

diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index 808d6f8ed8..cc909d9d9a 100644
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -17,7 +17,6 @@
 #include <common.h>
 #include <malloc.h>
 #include <asm/dma-mapping.h>
-#include <usb/lin_gadget_compat.h>
 #include <linux/bug.h>
 #include <linux/list.h>
 
diff --git a/drivers/usb/dwc3/ti_usb_phy.c b/drivers/usb/dwc3/ti_usb_phy.c
index 8088afc970..2cf4253209 100644
--- a/drivers/usb/dwc3/ti_usb_phy.c
+++ b/drivers/usb/dwc3/ti_usb_phy.c
@@ -20,7 +20,6 @@
 #include <common.h>
 #include <malloc.h>
 #include <ti-usb-phy-uboot.h>
-#include <usb/lin_gadget_compat.h>
 #include <linux/ioport.h>
 #include <asm/io.h>
 #include <asm/arch/sys_proto.h>
diff --git a/drivers/usb/eth/r8152.c b/drivers/usb/eth/r8152.c
index e09351b0d2..7fc4acc375 100644
--- a/drivers/usb/eth/r8152.c
+++ b/drivers/usb/eth/r8152.c
@@ -11,7 +11,6 @@
 #include <malloc.h>
 #include <memalign.h>
 #include <usb.h>
-#include <usb/lin_gadget_compat.h>
 #include <linux/mii.h>
 #include <linux/bitops.h>
 #include "usb_ether.h"
diff --git a/drivers/usb/gadget/at91_udc.c b/drivers/usb/gadget/at91_udc.c
index ad2f606b78..d88219ff92 100644
--- a/drivers/usb/gadget/at91_udc.c
+++ b/drivers/usb/gadget/at91_udc.c
@@ -25,7 +25,6 @@
 #include <linux/usb/gadget.h>
 #include <linux/usb/at91_udc.h>
 #include <malloc.h>
-#include <usb/lin_gadget_compat.h>
 
 #include "at91_udc.h"
 
diff --git a/drivers/usb/gadget/atmel_usba_udc.c b/drivers/usb/gadget/atmel_usba_udc.c
index c0a95a97c9..adb345340b 100644
--- a/drivers/usb/gadget/atmel_usba_udc.c
+++ b/drivers/usb/gadget/atmel_usba_udc.c
@@ -17,7 +17,6 @@
 #include <linux/usb/gadget.h>
 #include <linux/usb/atmel_usba_udc.h>
 #include <malloc.h>
-#include <usb/lin_gadget_compat.h>
 
 #include "atmel_usba_udc.h"
 
diff --git a/drivers/usb/gadget/dwc2_udc_otg.c b/drivers/usb/gadget/dwc2_udc_otg.c
index 608764bae7..4b893df820 100644
--- a/drivers/usb/gadget/dwc2_udc_otg.c
+++ b/drivers/usb/gadget/dwc2_udc_otg.c
@@ -34,7 +34,6 @@
 
 #include "dwc2_udc_otg_regs.h"
 #include "dwc2_udc_otg_priv.h"
-#include <usb/lin_gadget_compat.h>
 
 /***********************************************************/
 
diff --git a/drivers/usb/gadget/dwc2_udc_otg_phy.c b/drivers/usb/gadget/dwc2_udc_otg_phy.c
index 0c4620d56d..c6e1e02d7d 100644
--- a/drivers/usb/gadget/dwc2_udc_otg_phy.c
+++ b/drivers/usb/gadget/dwc2_udc_otg_phy.c
@@ -34,7 +34,6 @@
 
 #include "dwc2_udc_otg_regs.h"
 #include "dwc2_udc_otg_priv.h"
-#include <usb/lin_gadget_compat.h>
 
 #include <usb/dwc2_udc.h>
 
diff --git a/drivers/usb/gadget/dwc2_udc_otg_priv.h b/drivers/usb/gadget/dwc2_udc_otg_priv.h
index a0dd2c826e..c564053e94 100644
--- a/drivers/usb/gadget/dwc2_udc_otg_priv.h
+++ b/drivers/usb/gadget/dwc2_udc_otg_priv.h
@@ -13,7 +13,6 @@
 #include <linux/usb/ch9.h>
 #include <linux/usb/gadget.h>
 #include <linux/list.h>
-#include <usb/lin_gadget_compat.h>
 #include <usb/dwc2_udc.h>
 
 /*-------------------------------------------------------------------------*/
diff --git a/drivers/usb/gadget/f_mass_storage.c b/drivers/usb/gadget/f_mass_storage.c
index ff02d6225f..b30dfa1bcc 100644
--- a/drivers/usb/gadget/f_mass_storage.c
+++ b/drivers/usb/gadget/f_mass_storage.c
@@ -258,7 +258,7 @@
 #include <linux/usb/gadget.h>
 #include <linux/usb/gadget.h>
 #include <linux/usb/composite.h>
-#include <usb/lin_gadget_compat.h>
+#include <linux/bitmap.h>
 #include <g_dnl.h>
 
 /*------------------------------------------------------------------------*/
diff --git a/drivers/usb/gadget/pxa25x_udc.c b/drivers/usb/gadget/pxa25x_udc.c
index 6a8949da34..fb29d82a9c 100644
--- a/drivers/usb/gadget/pxa25x_udc.c
+++ b/drivers/usb/gadget/pxa25x_udc.c
@@ -30,7 +30,6 @@
 
 #include <linux/usb/ch9.h>
 #include <linux/usb/gadget.h>
-#include <usb/lin_gadget_compat.h>
 #include <asm/arch/pxa-regs.h>
 
 #include "pxa25x_udc.h"
diff --git a/include/linux/bitmap.h b/include/linux/bitmap.h
new file mode 100644
index 0000000000..4a54ae0509
--- /dev/null
+++ b/include/linux/bitmap.h
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: GPL-2.0+
+#ifndef __LINUX_BITMAP_H
+#define __LINUX_BITMAP_H
+
+#include <asm/types.h>
+#include <linux/types.h>
+#include <linux/bitops.h>
+
+#define small_const_nbits(nbits) \
+	(__builtin_constant_p(nbits) && (nbits) <= BITS_PER_LONG)
+
+static inline void bitmap_zero(unsigned long *dst, int nbits)
+{
+	if (small_const_nbits(nbits)) {
+		*dst = 0UL;
+	} else {
+		int len = BITS_TO_LONGS(nbits) * sizeof(unsigned long);
+
+		memset(dst, 0, len);
+	}
+}
+
+#endif /* __LINUX_BITMAP_H */
diff --git a/include/linux/types.h b/include/linux/types.h
index 7c33e7adbc..11c492a741 100644
--- a/include/linux/types.h
+++ b/include/linux/types.h
@@ -165,4 +165,7 @@ struct ustat {
 	char			f_fpack[6];
 };
 
+#define DECLARE_BITMAP(name, bits) \
+	unsigned long name[BITS_TO_LONGS(bits)]
+
 #endif /* _LINUX_TYPES_H */
diff --git a/include/linux/usb/composite.h b/include/linux/usb/composite.h
index e676d8beff..98c147456f 100644
--- a/include/linux/usb/composite.h
+++ b/include/linux/usb/composite.h
@@ -25,7 +25,7 @@
 #include <common.h>
 #include <linux/usb/ch9.h>
 #include <linux/usb/gadget.h>
-#include <usb/lin_gadget_compat.h>
+#include <linux/bitmap.h>
 
 /*
  * USB function drivers should return USB_GADGET_DELAYED_STATUS if they

commit 8379698a1f7c2c8e7f715762b746a1095fce5729
Author: Petr Štetiar <ynezz@true.cz>
Date:   Fri Nov 23 14:37:52 2018 +0100

    UPSTREAM: usb: gadget: f_sdp: Provide filesize env variable for downloaded images
    
    Currently it's not possible to get filesize of downloaded images and
    it's impossible to automate some tasks in scripts. So this patch adds
    `filesize` environment variable with size (as hex number in bytes) of
    the last successfully downloaded file via `sdp` command.
    
    Change-Id: I1daec88c46cc51c510880ebf052e3b455ef9ead6
    Cc: Lukasz Majewski <lukma@denx.de>
    Cc: Marek Vasut <marex@denx.de>
    Cc: Stefan Agner <stefan.agner@toradex.com>
    Signed-off-by: Petr Štetiar <ynezz@true.cz>
    Reviewed-by: Stefan Agner <stefan.agner@toradex.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit bb00a015d624f683c66c9e30341f93b678d03d2e)

diff --git a/drivers/usb/gadget/f_sdp.c b/drivers/usb/gadget/f_sdp.c
index 43c5cfbb77..ac90a69dde 100644
--- a/drivers/usb/gadget/f_sdp.c
+++ b/drivers/usb/gadget/f_sdp.c
@@ -101,6 +101,7 @@ struct f_sdp {
 	enum sdp_state			state;
 	enum sdp_state			next_state;
 	u32				dnl_address;
+	u32				dnl_bytes;
 	u32				dnl_bytes_remaining;
 	u32				jmp_address;
 	bool				always_send_status;
@@ -277,6 +278,7 @@ static void sdp_rx_command_complete(struct usb_ep *ep, struct usb_request *req)
 		sdp->state = SDP_STATE_RX_FILE_DATA;
 		sdp->dnl_address = be32_to_cpu(cmd->addr);
 		sdp->dnl_bytes_remaining = be32_to_cpu(cmd->cnt);
+		sdp->dnl_bytes = sdp->dnl_bytes_remaining;
 		sdp->next_state = SDP_STATE_IDLE;
 
 		printf("Downloading file of size %d to 0x%08x... ",
@@ -356,6 +358,9 @@ static void sdp_rx_data_complete(struct usb_ep *ep, struct usb_request *req)
 	if (sdp->dnl_bytes_remaining)
 		return;
 
+#ifndef CONFIG_SPL_BUILD
+	env_set_hex("filesize", sdp->dnl_bytes);
+#endif
 	printf("done\n");
 
 	switch (sdp->state) {

commit bb24d586ab99aaf8650471d860cca5508f8751e7
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Thu Nov 29 10:57:40 2018 +0100

    UPSTREAM: dwc3-generic: Add support for the TI DWC3 glue
    
    Change-Id: Id225a6f88c94a187f3d19f1bef90dd66a9399a95
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit d66e54ac8084f892bf9a43f3242b5e2bf9a686ed)

diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c
index ef9da5f872..31ed1842c6 100644
--- a/drivers/usb/dwc3/dwc3-generic.c
+++ b/drivers/usb/dwc3/dwc3-generic.c
@@ -119,6 +119,90 @@ struct dwc3_glue_ops {
 			       enum usb_dr_mode mode);
 };
 
+void dwc3_ti_select_dr_mode(struct udevice *dev, int index,
+			    enum usb_dr_mode mode)
+{
+#define USBOTGSS_UTMI_OTG_STATUS		0x0084
+#define USBOTGSS_UTMI_OTG_OFFSET		0x0480
+
+/* UTMI_OTG_STATUS REGISTER */
+#define USBOTGSS_UTMI_OTG_STATUS_SW_MODE	BIT(31)
+#define USBOTGSS_UTMI_OTG_STATUS_POWERPRESENT	BIT(9)
+#define USBOTGSS_UTMI_OTG_STATUS_TXBITSTUFFENABLE BIT(8)
+#define USBOTGSS_UTMI_OTG_STATUS_IDDIG		BIT(4)
+#define USBOTGSS_UTMI_OTG_STATUS_SESSEND	BIT(3)
+#define USBOTGSS_UTMI_OTG_STATUS_SESSVALID	BIT(2)
+#define USBOTGSS_UTMI_OTG_STATUS_VBUSVALID	BIT(1)
+enum dwc3_omap_utmi_mode {
+	DWC3_OMAP_UTMI_MODE_UNKNOWN = 0,
+	DWC3_OMAP_UTMI_MODE_HW,
+	DWC3_OMAP_UTMI_MODE_SW,
+};
+
+	u32 use_id_pin;
+	u32 host_mode;
+	u32 reg;
+	u32 utmi_mode;
+	u32 utmi_status_offset = USBOTGSS_UTMI_OTG_STATUS;
+
+	struct dwc3_glue_data *glue = dev_get_platdata(dev);
+	void *base = map_physmem(glue->regs, 0x10000, MAP_NOCACHE);
+
+	if (device_is_compatible(dev, "ti,am437x-dwc3"))
+		utmi_status_offset += USBOTGSS_UTMI_OTG_OFFSET;
+
+	utmi_mode = dev_read_u32_default(dev, "utmi-mode",
+					 DWC3_OMAP_UTMI_MODE_UNKNOWN);
+	if (utmi_mode != DWC3_OMAP_UTMI_MODE_HW) {
+		debug("%s: OTG is not supported. defaulting to PERIPHERAL\n",
+		      dev->name);
+		mode = USB_DR_MODE_PERIPHERAL;
+	}
+
+	switch (mode)  {
+	case USB_DR_MODE_PERIPHERAL:
+		use_id_pin = 0;
+		host_mode = 0;
+		break;
+	case USB_DR_MODE_HOST:
+		use_id_pin = 0;
+		host_mode = 1;
+		break;
+	case USB_DR_MODE_OTG:
+	default:
+		use_id_pin = 1;
+		host_mode = 0;
+		break;
+	}
+
+	reg = readl(base + utmi_status_offset);
+
+	reg &= ~(USBOTGSS_UTMI_OTG_STATUS_SW_MODE);
+	if (!use_id_pin)
+		reg |= USBOTGSS_UTMI_OTG_STATUS_SW_MODE;
+
+	writel(reg, base + utmi_status_offset);
+
+	reg &= ~(USBOTGSS_UTMI_OTG_STATUS_SESSEND |
+		USBOTGSS_UTMI_OTG_STATUS_VBUSVALID |
+		USBOTGSS_UTMI_OTG_STATUS_IDDIG);
+
+	reg |= USBOTGSS_UTMI_OTG_STATUS_SESSVALID |
+		USBOTGSS_UTMI_OTG_STATUS_POWERPRESENT;
+
+	if (!host_mode)
+		reg |= USBOTGSS_UTMI_OTG_STATUS_IDDIG |
+			USBOTGSS_UTMI_OTG_STATUS_VBUSVALID;
+
+	writel(reg, base + utmi_status_offset);
+
+	unmap_physmem(base, MAP_NOCACHE);
+}
+
+struct dwc3_glue_ops ti_ops = {
+	.select_dr_mode = dwc3_ti_select_dr_mode,
+};
+
 static int dwc3_glue_bind(struct udevice *parent)
 {
 	const void *fdt = gd->fdt_blob;
@@ -258,6 +342,7 @@ static int dwc3_glue_remove(struct udevice *dev)
 
 static const struct udevice_id dwc3_glue_ids[] = {
 	{ .compatible = "xlnx,zynqmp-dwc3" },
+	{ .compatible = "ti,dwc3", .data = (ulong)&ti_ops },
 	{ }
 };
 

commit dc627159e26f348e00cc4805491cd6eaa3192ad8
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Thu Nov 29 10:52:50 2018 +0100

    UPSTREAM: usb: dwc3: Fix a compilation error with the edison defconfig
    
    The error is:
    In file included from include/part.h:10:0,
                     from include/usb.h:18,
                     from include/linux/usb/gadget.h:22,
                     from drivers/usb/dwc3/ep0.c:20:
    include/ide.h:62:14: error: unknown type name ‘uchar’
     void ide_led(uchar led, uchar status);
    
    Fixing it by including common.h that defines the uchar type.
    
    Change-Id: I97a5eabe32e03709a7e2800cd6ee8adf186daa76
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 4d3825c1915e1649c4be0320e74be158e4698655)

diff --git a/drivers/usb/dwc3/ep0.c b/drivers/usb/dwc3/ep0.c
index 4f32ceb271..aa5215ed95 100644
--- a/drivers/usb/dwc3/ep0.c
+++ b/drivers/usb/dwc3/ep0.c
@@ -13,7 +13,7 @@
  *
  * SPDX-License-Identifier:     GPL-2.0
  */
-
+#include <common.h>
 #include <linux/kernel.h>
 #include <linux/list.h>
 

commit c08fbf46213390109620b127e3f1c9608f455e60
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Thu Nov 29 10:52:49 2018 +0100

    UPSTREAM: dwc3-generic: Add select_dr_mode operation
    
    The select_dr_mode operation is executed when the glue driver is probed.
    The role of this optional function is to configure the operating mode
    of the controller at the glue level.
    
    Change-Id: I613fc4e985d9400ae9f27b6becff9d6c8d105e98
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 93991cf1969077108ae36e90acb3cd25a6a449ac)

diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c
index 060662cc13..ef9da5f872 100644
--- a/drivers/usb/dwc3/dwc3-generic.c
+++ b/drivers/usb/dwc3/dwc3-generic.c
@@ -8,6 +8,7 @@
  */
 
 #include <common.h>
+#include <asm-generic/io.h>
 #include <dm.h>
 #include <dm/device-internal.h>
 #include <dm/lists.h>
@@ -110,6 +111,12 @@ U_BOOT_DRIVER(dwc3_generic_peripheral) = {
 struct dwc3_glue_data {
 	struct clk_bulk		clks;
 	struct reset_ctl_bulk	resets;
+	fdt_addr_t regs;
+};
+
+struct dwc3_glue_ops {
+	void (*select_dr_mode)(struct udevice *dev, int index,
+			       enum usb_dr_mode mode);
 };
 
 static int dwc3_glue_bind(struct udevice *parent)
@@ -205,9 +212,14 @@ static int dwc3_glue_clk_init(struct udevice *dev,
 
 static int dwc3_glue_probe(struct udevice *dev)
 {
+	struct dwc3_glue_ops *ops = (struct dwc3_glue_ops *)dev_get_driver_data(dev);
 	struct dwc3_glue_data *glue = dev_get_platdata(dev);
+	struct udevice *child = NULL;
+	int index = 0;
 	int ret;
 
+	glue->regs = dev_read_addr(dev);
+
 	ret = dwc3_glue_clk_init(dev, glue);
 	if (ret)
 		return ret;
@@ -216,6 +228,20 @@ static int dwc3_glue_probe(struct udevice *dev)
 	if (ret)
 		return ret;
 
+	ret = device_find_first_child(dev, &child);
+	if (ret)
+		return ret;
+
+	while (child) {
+		enum usb_dr_mode dr_mode;
+
+		dr_mode = usb_get_dr_mode(dev_of_offset(child));
+		device_find_next_child(&child);
+		if (ops && ops->select_dr_mode)
+			ops->select_dr_mode(dev, index, dr_mode);
+		index++;
+	}
+
 	return 0;
 }
 

commit bb4f93a7dea0e89133d5292adedd9d9d5a1ee605
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Thu Nov 29 10:52:48 2018 +0100

    UPSTREAM: dwc3-generic: Handle the PHYs, the clocks and the reset lines
    
    This make the driver more generic. At this point this driver can replace
    the dwc3-of-simple implementation.
    Make the description in the Kconfig more generic too.
    
    Change-Id: Icf52db944e2559492cee912e14357f79713ba797
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 446e3a205b871943736e22565092771fac98a9a4)

diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig
index 943b7630eb..bbd8105c06 100644
--- a/drivers/usb/dwc3/Kconfig
+++ b/drivers/usb/dwc3/Kconfig
@@ -38,10 +38,11 @@ config USB_DWC3_OMAP
 	  Say 'Y' here if you have one such device
 
 config USB_DWC3_GENERIC
-	bool "Xilinx ZynqMP and similar Platforms"
-	depends on DM_USB && USB_DWC3
+	bool "Generic implementation of a DWC3 wrapper (aka dwc3 glue)"
+	depends on DM_USB && USB_DWC3 && MISC
 	help
-	  Some platforms can reuse this DWC3 generic implementation.
+	  Select this for Xilinx ZynqMP and similar Platforms.
+	  This wrapper supports Host and Peripheral operation modes.
 
 config USB_DWC3_UNIPHIER
 	bool "DesignWare USB3 Host Support on UniPhier Platforms"
diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c
index 4a4c36d23b..060662cc13 100644
--- a/drivers/usb/dwc3/dwc3-generic.c
+++ b/drivers/usb/dwc3/dwc3-generic.c
@@ -11,58 +11,85 @@
 #include <dm.h>
 #include <dm/device-internal.h>
 #include <dm/lists.h>
-#include <linux/usb/otg.h>
-#include <linux/compat.h>
+#include <dwc3-uboot.h>
 #include <linux/usb/ch9.h>
 #include <linux/usb/gadget.h>
 #include <malloc.h>
 #include <usb.h>
 #include "core.h"
 #include "gadget.h"
-#include "linux-compat.h"
+#include <reset.h>
+#include <clk.h>
 
 #if CONFIG_IS_ENABLED(DM_USB_GADGET)
+struct dwc3_generic_peripheral {
+	struct dwc3 dwc3;
+	struct phy *phys;
+	int num_phys;
+	fdt_addr_t base;
+};
+
 int dm_usb_gadget_handle_interrupts(struct udevice *dev)
 {
-	struct dwc3 *priv = dev_get_priv(dev);
+	struct dwc3_generic_peripheral *priv = dev_get_priv(dev);
+	struct dwc3 *dwc3 = &priv->dwc3;
 
-	dwc3_gadget_uboot_handle_interrupt(priv);
+	dwc3_gadget_uboot_handle_interrupt(dwc3);
 
 	return 0;
 }
 
 static int dwc3_generic_peripheral_probe(struct udevice *dev)
 {
-	struct dwc3 *priv = dev_get_priv(dev);
+	int rc;
+	struct dwc3_generic_peripheral *priv = dev_get_priv(dev);
+	struct dwc3 *dwc3 = &priv->dwc3;
+
+	rc = dwc3_setup_phy(dev, &priv->phys, &priv->num_phys);
+	if (rc)
+		return rc;
+
+	dwc3->regs = map_physmem(priv->base, DWC3_OTG_REGS_END, MAP_NOCACHE);
+	dwc3->regs += DWC3_GLOBALS_REGS_START;
+	dwc3->dev = dev;
+
+	rc =  dwc3_init(dwc3);
+	if (rc) {
+		unmap_physmem(dwc3->regs, MAP_NOCACHE);
+		return rc;
+	}
 
-	return dwc3_init(priv);
+	return 0;
 }
 
 static int dwc3_generic_peripheral_remove(struct udevice *dev)
 {
-	struct dwc3 *priv = dev_get_priv(dev);
+	struct dwc3_generic_peripheral *priv = dev_get_priv(dev);
+	struct dwc3 *dwc3 = &priv->dwc3;
 
-	dwc3_remove(priv);
+	dwc3_remove(dwc3);
+	dwc3_shutdown_phy(dev, priv->phys, priv->num_phys);
+	unmap_physmem(dwc3->regs, MAP_NOCACHE);
 
 	return 0;
 }
 
 static int dwc3_generic_peripheral_ofdata_to_platdata(struct udevice *dev)
 {
-	struct dwc3 *priv = dev_get_priv(dev);
+	struct dwc3_generic_peripheral *priv = dev_get_priv(dev);
+	struct dwc3 *dwc3 = &priv->dwc3;
 	int node = dev_of_offset(dev);
 
-	priv->regs = (void *)devfdt_get_addr(dev);
-	priv->regs += DWC3_GLOBALS_REGS_START;
+	priv->base = devfdt_get_addr(dev);
 
-	priv->maximum_speed = usb_get_maximum_speed(node);
-	if (priv->maximum_speed == USB_SPEED_UNKNOWN) {
+	dwc3->maximum_speed = usb_get_maximum_speed(node);
+	if (dwc3->maximum_speed == USB_SPEED_UNKNOWN) {
 		pr_err("Invalid usb maximum speed\n");
 		return -ENODEV;
 	}
 
-	priv->dr_mode = usb_get_dr_mode(node);
-	if (priv->dr_mode == USB_DR_MODE_UNKNOWN) {
+	dwc3->dr_mode = usb_get_dr_mode(node);
+	if (dwc3->dr_mode == USB_DR_MODE_UNKNOWN) {
 		pr_err("Invalid usb mode setup\n");
 		return -ENODEV;
 	}
@@ -76,12 +103,16 @@ U_BOOT_DRIVER(dwc3_generic_peripheral) = {
 	.ofdata_to_platdata = dwc3_generic_peripheral_ofdata_to_platdata,
 	.probe = dwc3_generic_peripheral_probe,
 	.remove = dwc3_generic_peripheral_remove,
-	.platdata_auto_alloc_size = sizeof(struct usb_platdata),
-	.priv_auto_alloc_size = sizeof(struct dwc3),
+	.priv_auto_alloc_size = sizeof(struct dwc3_generic_peripheral),
 };
 #endif
 
-static int dwc3_generic_bind(struct udevice *parent)
+struct dwc3_glue_data {
+	struct clk_bulk		clks;
+	struct reset_ctl_bulk	resets;
+};
+
+static int dwc3_glue_bind(struct udevice *parent)
 {
 	const void *fdt = gd->fdt_blob;
 	int node;
@@ -92,29 +123,32 @@ static int dwc3_generic_bind(struct udevice *parent)
 		const char *name = fdt_get_name(fdt, node, NULL);
 		enum usb_dr_mode dr_mode;
 		struct udevice *dev;
-		const char *driver;
+		const char *driver = NULL;
 
 		debug("%s: subnode name: %s\n", __func__, name);
-		if (strncmp(name, "dwc3@", 4))
-			continue;
 
 		dr_mode = usb_get_dr_mode(node);
 
 		switch (dr_mode) {
 		case USB_DR_MODE_PERIPHERAL:
 		case USB_DR_MODE_OTG:
+#if CONFIG_IS_ENABLED(DM_USB_GADGET)
 			debug("%s: dr_mode: OTG or Peripheral\n", __func__);
 			driver = "dwc3-generic-peripheral";
+#endif
 			break;
 		case USB_DR_MODE_HOST:
 			debug("%s: dr_mode: HOST\n", __func__);
-			driver = "dwc3-generic-host";
+			driver = "xhci-dwc3";
 			break;
 		default:
 			debug("%s: unsupported dr_mode\n", __func__);
 			return -ENODEV;
 		};
 
+		if (!driver)
+			continue;
+
 		ret = device_bind_driver_to_node(parent, driver, name,
 						 offset_to_ofnode(node), &dev);
 		if (ret) {
@@ -127,7 +161,76 @@ static int dwc3_generic_bind(struct udevice *parent)
 	return 0;
 }
 
-static const struct udevice_id dwc3_generic_ids[] = {
+static int dwc3_glue_reset_init(struct udevice *dev,
+				struct dwc3_glue_data *glue)
+{
+	int ret;
+
+	ret = reset_get_bulk(dev, &glue->resets);
+	if (ret == -ENOTSUPP)
+		return 0;
+	else if (ret)
+		return ret;
+
+	ret = reset_deassert_bulk(&glue->resets);
+	if (ret) {
+		reset_release_bulk(&glue->resets);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int dwc3_glue_clk_init(struct udevice *dev,
+			      struct dwc3_glue_data *glue)
+{
+	int ret;
+
+	ret = clk_get_bulk(dev, &glue->clks);
+	if (ret == -ENOSYS)
+		return 0;
+	if (ret)
+		return ret;
+
+#if CONFIG_IS_ENABLED(CLK)
+	ret = clk_enable_bulk(&glue->clks);
+	if (ret) {
+		clk_release_bulk(&glue->clks);
+		return ret;
+	}
+#endif
+
+	return 0;
+}
+
+static int dwc3_glue_probe(struct udevice *dev)
+{
+	struct dwc3_glue_data *glue = dev_get_platdata(dev);
+	int ret;
+
+	ret = dwc3_glue_clk_init(dev, glue);
+	if (ret)
+		return ret;
+
+	ret = dwc3_glue_reset_init(dev, glue);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
+static int dwc3_glue_remove(struct udevice *dev)
+{
+	struct dwc3_glue_data *glue = dev_get_platdata(dev);
+
+	reset_release_bulk(&glue->resets);
+
+	clk_release_bulk(&glue->clks);
+
+	return dm_scan_fdt_dev(dev);
+}
+
+static const struct udevice_id dwc3_glue_ids[] = {
 	{ .compatible = "xlnx,zynqmp-dwc3" },
 	{ }
 };
@@ -135,6 +238,10 @@ static const struct udevice_id dwc3_generic_ids[] = {
 U_BOOT_DRIVER(dwc3_generic_wrapper) = {
 	.name	= "dwc3-generic-wrapper",
 	.id	= UCLASS_MISC,
-	.of_match = dwc3_generic_ids,
-	.bind = dwc3_generic_bind,
+	.of_match = dwc3_glue_ids,
+	.bind = dwc3_glue_bind,
+	.probe = dwc3_glue_probe,
+	.remove = dwc3_glue_remove,
+	.platdata_auto_alloc_size = sizeof(struct dwc3_glue_data),
+
 };

commit ad761bde9caf97bf64cfbb8fc58d08445a4928ef
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Tue Jan 7 10:09:47 2020 +0800

    configs: rk3328: enable dwc3 core
    
    Change-Id: I2a3b7e0afaadb36db46d36e84bdf03ca712aa84c
    Fixes: d648a50c0a27 ("dwc3: move phy operation to core.c")
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index 9841e6f0dd..3e55505686 100644
--- a/configs/evb-rk3328_defconfig
+++ b/configs/evb-rk3328_defconfig
@@ -88,6 +88,7 @@ CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_GENERIC=y
 CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC3=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index 0dfed5bd57..104e149321 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -112,6 +112,7 @@ CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_GENERIC=y
 CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC3=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y

commit 72d48a52ffa0e486c5b7192dd9d796d6d068796b
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Thu Nov 29 10:52:45 2018 +0100

    UPSTREAM: dwc3: move phy operation to core.c
    
    Those operations can be used for peripheral operation as well as host
    operation.
    
    Change-Id: Ifa3b83bd690cd11f6750fd893e6ac36b2a0214b3
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit d648a50c0a27452a5439e7982b23b97c64820430)

diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index ff7d6a394c..57fc7e02e4 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -21,7 +21,7 @@
 #include <asm/dma-mapping.h>
 #include <linux/ioport.h>
 #include <dm.h>
-
+#include <generic-phy.h>
 #include <linux/usb/ch9.h>
 #include <linux/usb/gadget.h>
 
@@ -811,6 +811,91 @@ MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
 MODULE_LICENSE("GPL v2");
 MODULE_DESCRIPTION("DesignWare USB3 DRD Controller Driver");
 
+#if CONFIG_IS_ENABLED(PHY) && CONFIG_IS_ENABLED(DM_USB)
+int dwc3_setup_phy(struct udevice *dev, struct phy **array, int *num_phys)
+{
+	int i, ret, count;
+	struct phy *usb_phys;
+
+	/* Return if no phy declared */
+	if (!dev_read_prop(dev, "phys", NULL))
+		return 0;
+	count = dev_count_phandle_with_args(dev, "phys", "#phy-cells");
+	if (count <= 0)
+		return count;
+
+	usb_phys = devm_kcalloc(dev, count, sizeof(struct phy),
+				GFP_KERNEL);
+	if (!usb_phys)
+		return -ENOMEM;
+
+	for (i = 0; i < count; i++) {
+		ret = generic_phy_get_by_index(dev, i, &usb_phys[i]);
+		if (ret && ret != -ENOENT) {
+			pr_err("Failed to get USB PHY%d for %s\n",
+			       i, dev->name);
+			return ret;
+		}
+	}
+
+	for (i = 0; i < count; i++) {
+		ret = generic_phy_init(&usb_phys[i]);
+		if (ret) {
+			pr_err("Can't init USB PHY%d for %s\n",
+			       i, dev->name);
+			goto phys_init_err;
+		}
+	}
+
+	for (i = 0; i < count; i++) {
+		ret = generic_phy_power_on(&usb_phys[i]);
+		if (ret) {
+			pr_err("Can't power USB PHY%d for %s\n",
+			       i, dev->name);
+			goto phys_poweron_err;
+		}
+	}
+
+	*array = usb_phys;
+	*num_phys =  count;
+	return 0;
+
+phys_poweron_err:
+	for (i = count - 1; i >= 0; i--)
+		generic_phy_power_off(&usb_phys[i]);
+
+	for (i = 0; i < count; i++)
+		generic_phy_exit(&usb_phys[i]);
+
+	return ret;
+
+phys_init_err:
+	for (; i >= 0; i--)
+		generic_phy_exit(&usb_phys[i]);
+
+	return ret;
+}
+
+int dwc3_shutdown_phy(struct udevice *dev, struct phy *usb_phys, int num_phys)
+{
+	int i, ret;
+
+	for (i = 0; i < num_phys; i++) {
+		if (!generic_phy_valid(&usb_phys[i]))
+			continue;
+
+		ret = generic_phy_power_off(&usb_phys[i]);
+		ret |= generic_phy_exit(&usb_phys[i]);
+		if (ret) {
+			pr_err("Can't shutdown USB PHY%d for %s\n",
+			       i, dev->name);
+		}
+	}
+
+	return 0;
+}
+#endif
+
 #if CONFIG_IS_ENABLED(DM_USB_GADGET)
 int dwc3_init(struct dwc3 *dwc)
 {
@@ -862,5 +947,4 @@ void dwc3_remove(struct dwc3 *dwc)
 	dwc3_core_exit(dwc);
 	kfree(dwc->mem);
 }
-
 #endif
diff --git a/drivers/usb/host/xhci-dwc3.c b/drivers/usb/host/xhci-dwc3.c
index d231e5e29b..b68d421a59 100644
--- a/drivers/usb/host/xhci-dwc3.c
+++ b/drivers/usb/host/xhci-dwc3.c
@@ -13,6 +13,7 @@
 #include <fdtdec.h>
 #include <generic-phy.h>
 #include <usb.h>
+#include <dwc3-uboot.h>
 
 #include "xhci.h"
 #include <asm/io.h>
@@ -113,105 +114,21 @@ void dwc3_set_fladj(struct dwc3 *dwc3_reg, u32 val)
 }
 
 #if CONFIG_IS_ENABLED(DM_USB)
-static int xhci_dwc3_setup_phy(struct udevice *dev)
-{
-	struct xhci_dwc3_platdata *plat = dev_get_platdata(dev);
-	int i, ret, count;
-
-	/* Return if no phy declared */
-	if (!dev_read_prop(dev, "phys", NULL))
-		return 0;
-
-	count = dev_count_phandle_with_args(dev, "phys", "#phy-cells");
-	if (count <= 0)
-		return count;
-
-	plat->usb_phys = devm_kcalloc(dev, count, sizeof(struct phy),
-				      GFP_KERNEL);
-	if (!plat->usb_phys)
-		return -ENOMEM;
-
-	for (i = 0; i < count; i++) {
-		ret = generic_phy_get_by_index(dev, i, &plat->usb_phys[i]);
-		if (ret && ret != -ENOENT) {
-			pr_err("Failed to get USB PHY%d for %s\n",
-			       i, dev->name);
-			return ret;
-		}
-
-		++plat->num_phys;
-	}
-
-	for (i = 0; i < plat->num_phys; i++) {
-		ret = generic_phy_init(&plat->usb_phys[i]);
-		if (ret) {
-			pr_err("Can't init USB PHY%d for %s\n",
-			       i, dev->name);
-			goto phys_init_err;
-		}
-	}
-
-	for (i = 0; i < plat->num_phys; i++) {
-		ret = generic_phy_power_on(&plat->usb_phys[i]);
-		if (ret) {
-			pr_err("Can't power USB PHY%d for %s\n",
-			       i, dev->name);
-			goto phys_poweron_err;
-		}
-	}
-
-	return 0;
-
-phys_poweron_err:
-	for (; i >= 0; i--)
-		generic_phy_power_off(&plat->usb_phys[i]);
-
-	for (i = 0; i < plat->num_phys; i++)
-		generic_phy_exit(&plat->usb_phys[i]);
-
-	return ret;
-
-phys_init_err:
-	for (; i >= 0; i--)
-		generic_phy_exit(&plat->usb_phys[i]);
-
-	return ret;
-}
-
-static int xhci_dwc3_shutdown_phy(struct udevice *dev)
-{
-	struct xhci_dwc3_platdata *plat = dev_get_platdata(dev);
-	int i, ret;
-
-	for (i = 0; i < plat->num_phys; i++) {
-		if (!generic_phy_valid(&plat->usb_phys[i]))
-			continue;
-
-		ret = generic_phy_power_off(&plat->usb_phys[i]);
-		ret |= generic_phy_exit(&plat->usb_phys[i]);
-		if (ret) {
-			pr_err("Can't shutdown USB PHY%d for %s\n",
-			       i, dev->name);
-		}
-	}
-
-	return 0;
-}
-
 static int xhci_dwc3_probe(struct udevice *dev)
 {
 	struct xhci_hcor *hcor;
 	struct xhci_hccr *hccr;
 	struct dwc3 *dwc3_reg;
 	enum usb_dr_mode dr_mode;
+	struct xhci_dwc3_platdata *plat = dev_get_platdata(dev);
 	int ret;
 
 	hccr = (struct xhci_hccr *)((uintptr_t)dev_read_addr(dev));
 	hcor = (struct xhci_hcor *)((uintptr_t)hccr +
 			HC_LENGTH(xhci_readl(&(hccr)->cr_capbase)));
 
-	ret = xhci_dwc3_setup_phy(dev);
-	if (ret)
+	ret = dwc3_setup_phy(dev, &plat->usb_phys, &plat->num_phys);
+	if (ret && (ret != -ENOTSUPP))
 		return ret;
 
 	dwc3_reg = (struct dwc3 *)((char *)(hccr) + DWC3_REG_OFFSET);
@@ -230,7 +147,9 @@ static int xhci_dwc3_probe(struct udevice *dev)
 
 static int xhci_dwc3_remove(struct udevice *dev)
 {
-	xhci_dwc3_shutdown_phy(dev);
+	struct xhci_dwc3_platdata *plat = dev_get_platdata(dev);
+
+	dwc3_shutdown_phy(dev, plat->usb_phys, plat->num_phys);
 
 	return xhci_deregister(dev);
 }
diff --git a/include/dwc3-uboot.h b/include/dwc3-uboot.h
index cc9ffe8825..d9b18c5f3e 100644
--- a/include/dwc3-uboot.h
+++ b/include/dwc3-uboot.h
@@ -40,4 +40,23 @@ struct dwc3_device {
 int dwc3_uboot_init(struct dwc3_device *dev);
 void dwc3_uboot_exit(int index);
 void dwc3_uboot_handle_interrupt(int index);
+
+struct phy;
+#if CONFIG_IS_ENABLED(PHY) && CONFIG_IS_ENABLED(DM_USB)
+int dwc3_setup_phy(struct udevice *dev, struct phy **array, int *num_phys);
+int dwc3_shutdown_phy(struct udevice *dev, struct phy *usb_phys, int num_phys);
+#else
+static inline int dwc3_setup_phy(struct udevice *dev, struct phy **array,
+				 int *num_phys)
+{
+	return -ENOTSUPP;
+}
+
+static inline int dwc3_shutdown_phy(struct udevice *dev, struct phy *usb_phys,
+				    int num_phys)
+{
+	return -ENOTSUPP;
+}
+#endif
+
 #endif /* __DWC3_UBOOT_H_ */

commit 20828bbaa724e2dae360b8e48839a7d1366ea21b
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Thu Nov 29 10:52:46 2018 +0100

    UPSTREAM: dm: usb: create a new UCLASS ID for USB gadget devices
    
    UCLASS_USB_DEV_GENERIC was meant for USB devices connected to host
    controllers, not gadget devices.
    Adding a new UCLASS for gadget devices alone.
    
    Also move the generic DM code for USB gadgets in a separate file for
    clarity.
    
    Conflicts:
            board/sunxi/board.c
    
    Change-Id: I9bd01ad0814b81f7718927660a8ece4080c5f988
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 0131162439508801b9f8a330fa731f04273c9337)

diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index ab3137b5a7..f7c5c19094 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -592,7 +592,35 @@ void sunxi_board_init(void)
 #ifdef CONFIG_USB_GADGET
 int g_dnl_board_usb_cable_connected(void)
 {
-	return sunxi_usb_phy_vbus_detect(0);
+	struct udevice *dev;
+	struct phy phy;
+	int ret;
+
+	ret = uclass_get_device(UCLASS_USB_GADGET_GENERIC, 0, &dev);
+	if (ret) {
+		pr_err("%s: Cannot find USB device\n", __func__);
+		return ret;
+	}
+
+	ret = generic_phy_get_by_name(dev, "usb", &phy);
+	if (ret) {
+		pr_err("failed to get %s USB PHY\n", dev->name);
+		return ret;
+	}
+
+	ret = generic_phy_init(&phy);
+	if (ret) {
+		pr_err("failed to init %s USB PHY\n", dev->name);
+		return ret;
+	}
+
+	ret = sun4i_usb_phy_vbus_detect(&phy);
+	if (ret == 1) {
+		pr_err("A charger is plugged into the OTG\n");
+		return -ENODEV;
+	}
+
+	return ret;
 }
 #endif
 
diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c
index a5bc44cc69..4a4c36d23b 100644
--- a/drivers/usb/dwc3/dwc3-generic.c
+++ b/drivers/usb/dwc3/dwc3-generic.c
@@ -72,7 +72,7 @@ static int dwc3_generic_peripheral_ofdata_to_platdata(struct udevice *dev)
 
 U_BOOT_DRIVER(dwc3_generic_peripheral) = {
 	.name	= "dwc3-generic-peripheral",
-	.id	= UCLASS_USB_DEV_GENERIC,
+	.id	= UCLASS_USB_GADGET_GENERIC,
 	.ofdata_to_platdata = dwc3_generic_peripheral_ofdata_to_platdata,
 	.probe = dwc3_generic_peripheral_probe,
 	.remove = dwc3_generic_peripheral_remove,
diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c
index e569b7e1cc..8e65ac107c 100644
--- a/drivers/usb/gadget/ether.c
+++ b/drivers/usb/gadget/ether.c
@@ -2676,7 +2676,7 @@ int usb_ether_init(void)
 	struct udevice *usb_dev;
 	int ret;
 
-	ret = uclass_first_device(UCLASS_USB_DEV_GENERIC, &usb_dev);
+	ret = uclass_first_device(UCLASS_USB_GADGET_GENERIC, &usb_dev);
 	if (!usb_dev || ret) {
 		pr_err("No USB device found\n");
 		return ret;
diff --git a/drivers/usb/gadget/udc/Makefile b/drivers/usb/gadget/udc/Makefile
index 1699ccdf94..b0a92767f8 100644
--- a/drivers/usb/gadget/udc/Makefile
+++ b/drivers/usb/gadget/udc/Makefile
@@ -4,4 +4,8 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
 
+ifndef CONFIG_$(SPL_)DM_USB_GADGET
 obj-$(CONFIG_USB_DWC3_GADGET)	+= udc-core.o
+endif
+
+obj-$(CONFIG_$(SPL_)DM_USB_GADGET)	+= udc-uclass.o udc-core.o
diff --git a/drivers/usb/gadget/udc/udc-core.c b/drivers/usb/gadget/udc/udc-core.c
index 1b867d8979..49ba21cba3 100644
--- a/drivers/usb/gadget/udc/udc-core.c
+++ b/drivers/usb/gadget/udc/udc-core.c
@@ -353,44 +353,3 @@ EXPORT_SYMBOL_GPL(usb_gadget_unregister_driver);
 MODULE_DESCRIPTION("UDC Framework");
 MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
 MODULE_LICENSE("GPL v2");
-
-#if CONFIG_IS_ENABLED(DM_USB_GADGET)
-#define MAX_UDC_DEVICES 4
-static struct udevice *dev_array[MAX_UDC_DEVICES];
-int usb_gadget_initialize(int index)
-{
-	int ret;
-	struct udevice *dev = NULL;
-
-	if (index < 0 || index >= ARRAY_SIZE(dev_array))
-		return -EINVAL;
-	if (dev_array[index])
-		return 0;
-	ret = uclass_get_device(UCLASS_USB_DEV_GENERIC, index, &dev);
-	if (!dev || ret) {
-		pr_err("No USB device found\n");
-		return -ENODEV;
-	}
-	dev_array[index] = dev;
-	return 0;
-}
-
-int usb_gadget_release(int index)
-{
-	int ret;
-
-	if (index < 0 || index >= ARRAY_SIZE(dev_array))
-		return -EINVAL;
-	ret = device_remove(dev_array[index], DM_REMOVE_NORMAL);
-	if (!ret)
-		dev_array[index] = NULL;
-	return ret;
-}
-
-int usb_gadget_handle_interrupts(int index)
-{
-	if (index < 0 || index >= ARRAY_SIZE(dev_array))
-		return -EINVAL;
-	return dm_usb_gadget_handle_interrupts(dev_array[index]);
-}
-#endif
diff --git a/drivers/usb/gadget/udc/udc-uclass.c b/drivers/usb/gadget/udc/udc-uclass.c
new file mode 100644
index 0000000000..062051857a
--- /dev/null
+++ b/drivers/usb/gadget/udc/udc-uclass.c
@@ -0,0 +1,58 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com
+ * Written by Jean-Jacques Hiblot <jjhiblot@ti.com>
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/device-internal.h>
+#include <linux/usb/gadget.h>
+
+#define MAX_UDC_DEVICES 4
+static struct udevice *dev_array[MAX_UDC_DEVICES];
+int usb_gadget_initialize(int index)
+{
+	int ret;
+	struct udevice *dev = NULL;
+
+	if (index < 0 || index >= ARRAY_SIZE(dev_array))
+		return -EINVAL;
+	if (dev_array[index])
+		return 0;
+	ret = uclass_get_device(UCLASS_USB_GADGET_GENERIC, index, &dev);
+	if (!dev || ret) {
+		pr_err("No USB device found\n");
+		return -ENODEV;
+	}
+	dev_array[index] = dev;
+	return 0;
+}
+
+int usb_gadget_release(int index)
+{
+#if CONFIG_IS_ENABLED(DM_DEVICE_REMOVE)
+	int ret;
+	if (index < 0 || index >= ARRAY_SIZE(dev_array))
+		return -EINVAL;
+
+	ret = device_remove(dev_array[index], DM_REMOVE_NORMAL);
+	if (!ret)
+		dev_array[index] = NULL;
+	return ret;
+#else
+	return -ENOTSUPP;
+#endif
+}
+
+int usb_gadget_handle_interrupts(int index)
+{
+	if (index < 0 || index >= ARRAY_SIZE(dev_array))
+		return -EINVAL;
+	return dm_usb_gadget_handle_interrupts(dev_array[index]);
+}
+
+UCLASS_DRIVER(usb_gadget_generic) = {
+	.id		= UCLASS_USB_GADGET_GENERIC,
+	.name		= "usb_gadget_generic",
+};
diff --git a/drivers/usb/musb-new/omap2430.c b/drivers/usb/musb-new/omap2430.c
index 7c757aba64..7d60b17add 100644
--- a/drivers/usb/musb-new/omap2430.c
+++ b/drivers/usb/musb-new/omap2430.c
@@ -264,7 +264,7 @@ U_BOOT_DRIVER(omap2430_musb) = {
 #ifdef CONFIG_USB_MUSB_HOST
 	.id		= UCLASS_USB,
 #else
-	.id		= UCLASS_USB_DEV_GENERIC,
+	.id		= UCLASS_USB_GADGET_GENERIC,
 #endif
 	.of_match = omap2430_musb_ids,
 	.ofdata_to_platdata = omap2430_musb_ofdata_to_platdata,
diff --git a/drivers/usb/musb-new/sunxi.c b/drivers/usb/musb-new/sunxi.c
index c77bde0354..d5bba5996a 100644
--- a/drivers/usb/musb-new/sunxi.c
+++ b/drivers/usb/musb-new/sunxi.c
@@ -381,7 +381,7 @@ U_BOOT_DRIVER(usb_musb) = {
 #ifdef CONFIG_USB_MUSB_HOST
 	.id		= UCLASS_USB,
 #else
-	.id		= UCLASS_USB_DEV_GENERIC,
+	.id		= UCLASS_USB_GADGET_GENERIC,
 #endif
 	.of_match	= sunxi_musb_ids,
 	.probe		= musb_usb_probe,
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 69cf23a940..8b64046a07 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -90,6 +90,7 @@ enum uclass_id {
 	UCLASS_USB,		/* USB bus */
 	UCLASS_USB_DEV_GENERIC,	/* USB generic device */
 	UCLASS_USB_HUB,		/* USB hub */
+	UCLASS_USB_GADGET_GENERIC,	/* USB generic device */
 	UCLASS_VIDEO,		/* Video or LCD device */
 	UCLASS_VIDEO_BRIDGE,	/* Video bridge, e.g. DisplayPort to LVDS */
 	UCLASS_VIDEO_CONSOLE,	/* Text console driver for video device */

commit 7273610712606bcdd33c7d6f9f16358a459ba58f
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Thu Nov 29 10:52:44 2018 +0100

    UPSTREAM: dwc3_generic: do not probe the USB device driver when it's bound
    
    The driver will be probed when usb_gadget_initialize() is called.
    
    Change-Id: I3783059179b8b4f21592227ea948f809a6b7c438
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 20bebd866690bb09dd1c1cb8ac674c3b17b63c6d)

diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c
index a1deb9cf1c..a5bc44cc69 100644
--- a/drivers/usb/dwc3/dwc3-generic.c
+++ b/drivers/usb/dwc3/dwc3-generic.c
@@ -70,21 +70,14 @@ static int dwc3_generic_peripheral_ofdata_to_platdata(struct udevice *dev)
 	return 0;
 }
 
-static int dwc3_generic_peripheral_bind(struct udevice *dev)
-{
-	return device_probe(dev);
-}
-
 U_BOOT_DRIVER(dwc3_generic_peripheral) = {
 	.name	= "dwc3-generic-peripheral",
 	.id	= UCLASS_USB_DEV_GENERIC,
 	.ofdata_to_platdata = dwc3_generic_peripheral_ofdata_to_platdata,
 	.probe = dwc3_generic_peripheral_probe,
 	.remove = dwc3_generic_peripheral_remove,
-	.bind = dwc3_generic_peripheral_bind,
 	.platdata_auto_alloc_size = sizeof(struct usb_platdata),
 	.priv_auto_alloc_size = sizeof(struct dwc3),
-	.flags	= DM_FLAG_ALLOC_PRIV_DMA,
 };
 #endif
 

commit 256dc48f8740c46bb7340f754ac768ea91297c5a
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Thu Nov 29 10:52:43 2018 +0100

    UPSTREAM: usb: udc: implement DM versions of usb_gadget_initialize()/_release()/_handle_interrupt()
    
    When DM_USB_GADGET the platform code for the USB device must be replaced by
    calls to a USB device driver.
    
    usb_gadget_initialize() probes the USB device driver.
    usb_gadget_release() removes the USB device driver.
    
    Change-Id: I759a0d192d4baafeb188cfad4b3a08b5d2d05c23
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Reviewed-by: Lukasz Majewski <lukma@denx.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit ff8d75583487eb69bcb6f036088d979c76db3753)

diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c
index eab77cbc32..a1deb9cf1c 100644
--- a/drivers/usb/dwc3/dwc3-generic.c
+++ b/drivers/usb/dwc3/dwc3-generic.c
@@ -22,19 +22,9 @@
 #include "linux-compat.h"
 
 #if CONFIG_IS_ENABLED(DM_USB_GADGET)
-int usb_gadget_handle_interrupts(int index)
+int dm_usb_gadget_handle_interrupts(struct udevice *dev)
 {
-	struct dwc3 *priv;
-	struct udevice *dev;
-	int ret;
-
-	ret = uclass_first_device(UCLASS_USB_DEV_GENERIC, &dev);
-	if (!dev || ret) {
-		pr_err("No USB device found\n");
-		return -ENODEV;
-	}
-
-	priv = dev_get_priv(dev);
+	struct dwc3 *priv = dev_get_priv(dev);
 
 	dwc3_gadget_uboot_handle_interrupt(priv);
 
diff --git a/drivers/usb/gadget/udc/udc-core.c b/drivers/usb/gadget/udc/udc-core.c
index 326757b547..1b867d8979 100644
--- a/drivers/usb/gadget/udc/udc-core.c
+++ b/drivers/usb/gadget/udc/udc-core.c
@@ -19,7 +19,8 @@
 #include <asm/cache.h>
 #include <asm/dma-mapping.h>
 #include <common.h>
-
+#include <dm.h>
+#include <dm/device-internal.h>
 #include <linux/usb/ch9.h>
 #include <linux/usb/gadget.h>
 
@@ -352,3 +353,44 @@ EXPORT_SYMBOL_GPL(usb_gadget_unregister_driver);
 MODULE_DESCRIPTION("UDC Framework");
 MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
 MODULE_LICENSE("GPL v2");
+
+#if CONFIG_IS_ENABLED(DM_USB_GADGET)
+#define MAX_UDC_DEVICES 4
+static struct udevice *dev_array[MAX_UDC_DEVICES];
+int usb_gadget_initialize(int index)
+{
+	int ret;
+	struct udevice *dev = NULL;
+
+	if (index < 0 || index >= ARRAY_SIZE(dev_array))
+		return -EINVAL;
+	if (dev_array[index])
+		return 0;
+	ret = uclass_get_device(UCLASS_USB_DEV_GENERIC, index, &dev);
+	if (!dev || ret) {
+		pr_err("No USB device found\n");
+		return -ENODEV;
+	}
+	dev_array[index] = dev;
+	return 0;
+}
+
+int usb_gadget_release(int index)
+{
+	int ret;
+
+	if (index < 0 || index >= ARRAY_SIZE(dev_array))
+		return -EINVAL;
+	ret = device_remove(dev_array[index], DM_REMOVE_NORMAL);
+	if (!ret)
+		dev_array[index] = NULL;
+	return ret;
+}
+
+int usb_gadget_handle_interrupts(int index)
+{
+	if (index < 0 || index >= ARRAY_SIZE(dev_array))
+		return -EINVAL;
+	return dm_usb_gadget_handle_interrupts(dev_array[index]);
+}
+#endif
diff --git a/include/linux/usb/gadget.h b/include/linux/usb/gadget.h
index 556ec07b30..272130a705 100644
--- a/include/linux/usb/gadget.h
+++ b/include/linux/usb/gadget.h
@@ -938,6 +938,12 @@ extern void usb_ep_autoconfig_reset(struct usb_gadget *);
 
 extern int usb_gadget_handle_interrupts(int index);
 
+#if CONFIG_IS_ENABLED(DM_USB_GADGET)
+int usb_gadget_initialize(int index);
+int usb_gadget_release(int index);
+int dm_usb_gadget_handle_interrupts(struct udevice *dev);
+#else
+#include <usb.h>
 static inline int usb_gadget_initialize(int index)
 {
 	return board_usb_init(index, USB_INIT_DEVICE);
@@ -947,4 +953,6 @@ static inline int usb_gadget_release(int index)
 {
 	return board_usb_cleanup(index, USB_INIT_DEVICE);
 }
+#endif
+
 #endif	/* __LINUX_USB_GADGET_H */

commit 717f5765d999cce9416a306ddc56b7a5d3cce962
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Thu Nov 29 10:52:42 2018 +0100

    UPSTREAM: usb: introduce a separate config option for DM USB device
    
    Using CONFIG_DM_USB for this purpose prevents using DM_USB for host and not
    for device.
    
    Conflicts:
            arch/arm/Kconfig
    
    Change-Id: I075c887a77e2243463a580eac59d842b620af2f5
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Reviewed-by: Lukasz Majewski <lukma@denx.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 687ab54560809e01a10652ef82dbac6ae72deb91)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 2502577577..0ef6ad4710 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -814,6 +814,7 @@ config ARCH_ZYNQMP
 	select SPL_CLK
 	select DM_USB if USB
 	imply FAT_WRITE
+	imply DM_USB_GADGET
 
 config TEGRA
 	bool "NVIDIA Tegra"
diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig
index 06291a82fa..f170893548 100644
--- a/drivers/usb/Kconfig
+++ b/drivers/usb/Kconfig
@@ -52,6 +52,20 @@ config SPL_DM_USB
 	depends on DM_USB
 	default y
 
+config DM_USB_GADGET
+	bool "Enable driver model for USB Gadget"
+	depends on DM_USB
+	help
+	  Enable driver model for USB Gadget (Peripheral
+	  mode)
+
+config SPL_DM_USB_GADGET
+	bool "Enable driver model for USB Gadget in sPL"
+	depends on SPL_DM_USB
+	help
+	  Enable driver model for USB Gadget in SPL
+	  (Peripheral mode)
+
 source "drivers/usb/host/Kconfig"
 
 source "drivers/usb/dwc3/Kconfig"
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index ca60409bfa..ff7d6a394c 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -811,8 +811,7 @@ MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
 MODULE_LICENSE("GPL v2");
 MODULE_DESCRIPTION("DesignWare USB3 DRD Controller Driver");
 
-#if CONFIG_IS_ENABLED(DM_USB)
-
+#if CONFIG_IS_ENABLED(DM_USB_GADGET)
 int dwc3_init(struct dwc3 *dwc)
 {
 	int ret;
diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c
index ca63eac3d9..eab77cbc32 100644
--- a/drivers/usb/dwc3/dwc3-generic.c
+++ b/drivers/usb/dwc3/dwc3-generic.c
@@ -21,8 +21,7 @@
 #include "gadget.h"
 #include "linux-compat.h"
 
-DECLARE_GLOBAL_DATA_PTR;
-
+#if CONFIG_IS_ENABLED(DM_USB_GADGET)
 int usb_gadget_handle_interrupts(int index)
 {
 	struct dwc3 *priv;
@@ -97,6 +96,7 @@ U_BOOT_DRIVER(dwc3_generic_peripheral) = {
 	.priv_auto_alloc_size = sizeof(struct dwc3),
 	.flags	= DM_FLAG_ALLOC_PRIV_DMA,
 };
+#endif
 
 static int dwc3_generic_bind(struct udevice *parent)
 {

commit b95d44460f4a5f2487ec45ffa74f55cb5c5e7ad7
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Thu Nov 29 10:52:41 2018 +0100

    UPSTREAM: usb: gadget: Do not call board_usb_xxx() directly in USB gadget drivers
    
    Add 2 functions to wrap the calls to board_usb_init() and
    board_usb_cleanup().
    This is a preparatory work for DM support for UDC drivers (DM_USB_GADGET).
    
    Conflicts:
            cmd/fastboot.c
            cmd/rockusb.c
            cmd/usb_mass_storage.c
    
    Change-Id: I2b3a567d9dff75a03176d76d9fd9775cd8a0792e
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Reviewed-by: Lukasz Majewski <lukma@denx.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit a06955ae1ef2a942f18025d4fefceea2c638a76f)

diff --git a/cmd/fastboot.c b/cmd/fastboot.c
index c9ef71da45..31d934447c 100644
--- a/cmd/fastboot.c
+++ b/cmd/fastboot.c
@@ -47,7 +47,7 @@ static int do_fastboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 	usb_controller = argv[2];
 	controller_index = simple_strtoul(usb_controller, NULL, 0);
 
-	ret = board_usb_init(controller_index, USB_INIT_DEVICE);
+	ret = usb_gadget_initialize(controller_index);
 	if (ret) {
 		pr_err("USB init failed: %d", ret);
 		return CMD_RET_FAILURE;
@@ -88,7 +88,7 @@ exit:
 	sysmem_free(CONFIG_FASTBOOT_BUF_ADDR);
 	g_dnl_unregister();
 	g_dnl_clear_detach();
-	board_usb_cleanup(controller_index, USB_INIT_DEVICE);
+	usb_gadget_release(controller_index);
 
 	return ret;
 #endif
diff --git a/cmd/rockusb.c b/cmd/rockusb.c
index aa7400ad90..364b02db76 100644
--- a/cmd/rockusb.c
+++ b/cmd/rockusb.c
@@ -166,7 +166,8 @@ static int do_rkusb(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 
 	controller_index = (unsigned int)(simple_strtoul(
 				usb_controller,	NULL, 0));
-	if (board_usb_init(controller_index, USB_INIT_DEVICE)) {
+	rc = usb_gadget_initialize(controller_index);
+	if (rc) {
 		pr_err("Couldn't init USB controller.");
 		rc = CMD_RET_FAILURE;
 		goto cleanup_rkusb;
@@ -251,7 +252,7 @@ static int do_rkusb(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 cleanup_register:
 	g_dnl_unregister();
 cleanup_board:
-	board_usb_cleanup(controller_index, USB_INIT_DEVICE);
+	usb_gadget_release(controller_index);
 cleanup_rkusb:
 	rkusb_fini();
 
diff --git a/cmd/thordown.c b/cmd/thordown.c
index 1bb5fc2ec2..c560cc9c6b 100644
--- a/cmd/thordown.c
+++ b/cmd/thordown.c
@@ -31,7 +31,7 @@ int do_thor_down(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 		goto done;
 
 	int controller_index = simple_strtoul(usb_controller, NULL, 0);
-	ret = board_usb_init(controller_index, USB_INIT_DEVICE);
+	ret = usb_gadget_initialize(controller_index);
 	if (ret) {
 		pr_err("USB init failed: %d", ret);
 		ret = CMD_RET_FAILURE;
@@ -56,7 +56,7 @@ int do_thor_down(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 
 exit:
 	g_dnl_unregister();
-	board_usb_cleanup(controller_index, USB_INIT_DEVICE);
+	usb_gadget_release(controller_index);
 done:
 	dfu_free_entities();
 
diff --git a/cmd/usb_gadget_sdp.c b/cmd/usb_gadget_sdp.c
index 97d00ec545..d7a9035343 100644
--- a/cmd/usb_gadget_sdp.c
+++ b/cmd/usb_gadget_sdp.c
@@ -21,7 +21,7 @@ static int do_sdp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 
 	char *usb_controller = argv[1];
 	int controller_index = simple_strtoul(usb_controller, NULL, 0);
-	board_usb_init(controller_index, USB_INIT_DEVICE);
+	usb_gadget_initialize(controller_index);
 
 	g_dnl_clear_detach();
 	g_dnl_register("usb_dnl_sdp");
@@ -38,7 +38,7 @@ static int do_sdp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 
 exit:
 	g_dnl_unregister();
-	board_usb_cleanup(controller_index, USB_INIT_DEVICE);
+	usb_gadget_release(controller_index);
 
 	return ret;
 }
diff --git a/cmd/usb_mass_storage.c b/cmd/usb_mass_storage.c
index cfeecb7068..a05504b000 100644
--- a/cmd/usb_mass_storage.c
+++ b/cmd/usb_mass_storage.c
@@ -161,8 +161,8 @@ static int do_usb_mass_storage(cmd_tbl_t *cmdtp, int flag,
 
 	controller_index = (unsigned int)(simple_strtoul(
 				usb_controller,	NULL, 0));
-	if (board_usb_init(controller_index, USB_INIT_DEVICE)) {
-		pr_err("Couldn't init USB controller.");
+	if (usb_gadget_initialize(controller_index)) {
+		pr_err("Couldn't init USB controller.\n");
 		rc = CMD_RET_FAILURE;
 		goto cleanup_ums_init;
 	}
@@ -232,7 +232,7 @@ static int do_usb_mass_storage(cmd_tbl_t *cmdtp, int flag,
 cleanup_register:
 	g_dnl_unregister();
 cleanup_board:
-	board_usb_cleanup(controller_index, USB_INIT_DEVICE);
+	usb_gadget_release(controller_index);
 cleanup_ums_init:
 	ums_fini();
 
diff --git a/common/dfu.c b/common/dfu.c
index 07dff317a6..578a841bd3 100644
--- a/common/dfu.c
+++ b/common/dfu.c
@@ -24,9 +24,9 @@ int run_usb_dnl_gadget(int usbctrl_index, char *usb_dnl_gadget)
 	bool dfu_reset = false;
 	int ret, i = 0;
 
-	ret = board_usb_init(usbctrl_index, USB_INIT_DEVICE);
+	ret = usb_gadget_initialize(usbctrl_index);
 	if (ret) {
-		pr_err("board usb init failed\n");
+		pr_err("usb_gadget_initialize failed\n");
 		return CMD_RET_FAILURE;
 	}
 	g_dnl_clear_detach();
@@ -85,7 +85,7 @@ int run_usb_dnl_gadget(int usbctrl_index, char *usb_dnl_gadget)
 	}
 exit:
 	g_dnl_unregister();
-	board_usb_cleanup(usbctrl_index, USB_INIT_DEVICE);
+	usb_gadget_release(usbctrl_index);
 
 	if (dfu_reset)
 		do_reset(NULL, 0, 0, NULL);
diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c
index 21c97d024f..e569b7e1cc 100644
--- a/drivers/usb/gadget/ether.c
+++ b/drivers/usb/gadget/ether.c
@@ -105,9 +105,6 @@ struct eth_dev {
 	struct usb_gadget	*gadget;
 	struct usb_request	*req;		/* for control responses */
 	struct usb_request	*stat_req;	/* for cdc & rndis status */
-#if CONFIG_IS_ENABLED(DM_USB)
-	struct udevice		*usb_udev;
-#endif
 
 	u8			config;
 	struct usb_ep		*in_ep, *out_ep, *status_ep;
@@ -2341,40 +2338,17 @@ fail:
 }
 
 /*-------------------------------------------------------------------------*/
-
-#if CONFIG_IS_ENABLED(DM_USB)
-int dm_usb_init(struct eth_dev *e_dev)
-{
-	struct udevice *dev = NULL;
-	int ret;
-
-	ret = uclass_first_device(UCLASS_USB_DEV_GENERIC, &dev);
-	if (!dev || ret) {
-		pr_err("No USB device found\n");
-		return -ENODEV;
-	}
-
-	e_dev->usb_udev = dev;
-
-	return ret;
-}
-#endif
-
 static int _usb_eth_init(struct ether_priv *priv)
 {
 	struct eth_dev *dev = &priv->ethdev;
 	struct usb_gadget *gadget;
 	unsigned long ts;
+	int ret;
 	unsigned long timeout = USB_CONNECT_TIMEOUT;
 
-#if CONFIG_IS_ENABLED(DM_USB)
-	if (dm_usb_init(dev)) {
-		pr_err("USB ether not found\n");
-		return -ENODEV;
-	}
-#else
-	board_usb_init(0, USB_INIT_DEVICE);
-#endif
+	ret = usb_gadget_initialize(0);
+	if (ret)
+		return ret;
 
 	/* Configure default mac-addresses for the USB ethernet device */
 #ifdef CONFIG_USBNET_DEV_ADDR
@@ -2546,9 +2520,7 @@ void _usb_eth_halt(struct ether_priv *priv)
 	}
 
 	usb_gadget_unregister_driver(&priv->eth_driver);
-#if !CONFIG_IS_ENABLED(DM_USB)
-	board_usb_cleanup(0, USB_INIT_DEVICE);
-#endif
+	usb_gadget_release(0);
 }
 
 #ifndef CONFIG_DM_ETH
diff --git a/include/linux/usb/gadget.h b/include/linux/usb/gadget.h
index 0961a64cda..556ec07b30 100644
--- a/include/linux/usb/gadget.h
+++ b/include/linux/usb/gadget.h
@@ -19,6 +19,7 @@
 #define __LINUX_USB_GADGET_H
 
 #include <errno.h>
+#include <usb.h>
 #include <linux/compat.h>
 #include <linux/list.h>
 
@@ -937,4 +938,13 @@ extern void usb_ep_autoconfig_reset(struct usb_gadget *);
 
 extern int usb_gadget_handle_interrupts(int index);
 
+static inline int usb_gadget_initialize(int index)
+{
+	return board_usb_init(index, USB_INIT_DEVICE);
+}
+
+static inline int usb_gadget_release(int index)
+{
+	return board_usb_cleanup(index, USB_INIT_DEVICE);
+}
 #endif	/* __LINUX_USB_GADGET_H */

commit 3da53cbff947503ae0321c511c4210439c29746f
Author: Alexander Graf <agraf@suse.de>
Date:   Fri Oct 19 14:41:01 2018 +0200

    UPSTREAM: usb: Do not compile USB_STORAGE with BLK && !DM_USB
    
    The USB storage driver does not compile when CONFIG_BLK is set,
    but DM_USB is not set, as we're missing the DM device links for
    CONFIG_BLK enabled code paths.
    
    So far it looks like nobody fell into this trap, because no board
    enabled CONFIG_BLK and CONFIG_USB_STORAGE while not enabling
    CONFIG_DM_USB, but we should still reflect that dependency properly
    in Kconfig so that implicit enabling of CONFIG_USB_STORAGE works.
    
    Change-Id: I5f87b577eb94e0ee33036b7162fcece7e04841aa
    Signed-off-by: Alexander Graf <agraf@suse.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit dc03b704f4364da6df6a86aafccc3828ade8ed43)

diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig
index 998fae79f2..06291a82fa 100644
--- a/drivers/usb/Kconfig
+++ b/drivers/usb/Kconfig
@@ -66,6 +66,7 @@ comment "USB peripherals"
 
 config USB_STORAGE
 	bool "USB Mass Storage support"
+	depends on !(BLK && !DM_USB)
 	---help---
 	  Say Y here if you want to connect USB mass storage devices to your
 	  board's USB port.

commit 3739bf7e200ad727e67b53cf85aa8bc823ac67c7
Author: Sven Schwermer <sven@svenschwermer.de>
Date:   Wed Nov 21 08:43:56 2018 +0100

    UPSTREAM: usb: s/CONFIG_DM_USB/CONFIG_IS_ENABLED(DM_USB)/
    
    This allows to disable the USB driver model in SPL because it checks
    the CONFIG_SPL_DM_USB variable for SPL builds. Nothing changes for
    regular non-SPL builds.
    
    Conflicts:
            drivers/usb/host/ehci-atmel.c
            drivers/usb/host/xhci-fsl.c
    
    Change-Id: If6c980c620cf97c1dd131f60953c305e34dba505
    Signed-off-by: Sven Schwermer <sven@svenschwermer.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit fd09c205fc57b90a782cac33449ef172575d0a8c)

diff --git a/common/usb.c b/common/usb.c
index a6d88fdcb9..dc8e312c5f 100644
--- a/common/usb.c
+++ b/common/usb.c
@@ -43,7 +43,7 @@
 static int asynch_allowed;
 char usb_started; /* flag for the started/stopped USB status */
 
-#ifndef CONFIG_DM_USB
+#if !CONFIG_IS_ENABLED(DM_USB)
 static struct usb_device usb_dev[USB_MAX_DEVICE];
 static int dev_index;
 
@@ -184,7 +184,7 @@ int usb_disable_asynch(int disable)
 	asynch_allowed = !disable;
 	return old_value;
 }
-#endif /* !CONFIG_DM_USB */
+#endif /* !CONFIG_IS_ENABLED(DM_USB) */
 
 
 /*-------------------------------------------------------------------
@@ -849,7 +849,7 @@ int usb_string(struct usb_device *dev, int index, char *buf, size_t size)
  * the USB device are static allocated [USB_MAX_DEVICE].
  */
 
-#ifndef CONFIG_DM_USB
+#if !CONFIG_IS_ENABLED(DM_USB)
 
 /* returns a pointer to the device with the index [index].
  * if the device is not assigned (dev->devnum==-1) returns NULL
@@ -906,7 +906,7 @@ __weak int usb_alloc_device(struct usb_device *udev)
 {
 	return 0;
 }
-#endif /* !CONFIG_DM_USB */
+#endif /* !CONFIG_IS_ENABLED(DM_USB) */
 
 static int usb_hub_port_reset(struct usb_device *dev, struct usb_device *hub)
 {
@@ -1166,7 +1166,7 @@ int usb_setup_device(struct usb_device *dev, bool do_read,
 	return ret;
 }
 
-#ifndef CONFIG_DM_USB
+#if !CONFIG_IS_ENABLED(DM_USB)
 /*
  * By the time we get here, the device has gotten a new device ID
  * and is in the default state. We need to identify the thing and
@@ -1215,14 +1215,14 @@ int board_usb_cleanup(int index, enum usb_init_type init)
 
 bool usb_device_has_child_on_port(struct usb_device *parent, int port)
 {
-#ifdef CONFIG_DM_USB
+#if CONFIG_IS_ENABLED(DM_USB)
 	return false;
 #else
 	return parent->children[port] != NULL;
 #endif
 }
 
-#ifdef CONFIG_DM_USB
+#if CONFIG_IS_ENABLED(DM_USB)
 void usb_find_usb2_hub_address_port(struct usb_device *udev,
 			       uint8_t *hub_address, uint8_t *hub_port)
 {
diff --git a/common/usb_hub.c b/common/usb_hub.c
index b46dfa16cc..4a33aa36b6 100644
--- a/common/usb_hub.c
+++ b/common/usb_hub.c
@@ -67,7 +67,7 @@ static inline bool usb_hub_is_superspeed(struct usb_device *hdev)
 	return hdev->descriptor.bDeviceProtocol == 3;
 }
 
-#ifdef CONFIG_DM_USB
+#if CONFIG_IS_ENABLED(DM_USB)
 bool usb_hub_is_root_hub(struct udevice *hub)
 {
 	if (device_get_uclass_id(hub->parent) != UCLASS_USB_HUB)
@@ -128,7 +128,7 @@ int usb_get_port_status(struct usb_device *dev, int port, void *data)
 			USB_REQ_GET_STATUS, USB_DIR_IN | USB_RT_PORT, 0, port,
 			data, sizeof(struct usb_port_status), USB_CNTL_TIMEOUT);
 
-#ifdef CONFIG_DM_USB
+#if CONFIG_IS_ENABLED(DM_USB)
 	if (ret < 0)
 		return ret;
 
@@ -212,7 +212,7 @@ static void usb_hub_power_on(struct usb_hub_device *hub)
 	      max(100, (int)pgood_delay) + 1000);
 }
 
-#ifndef CONFIG_DM_USB
+#if !CONFIG_IS_ENABLED(DM_USB)
 static struct usb_hub_device hub_dev[USB_MAX_HUB];
 static int usb_hub_index;
 
@@ -276,7 +276,7 @@ static int usb_hub_port_reset(struct usb_device *dev, int port,
 	unsigned short portstatus, portchange;
 	int delay = HUB_SHORT_RESET_TIME; /* start with short reset delay */
 
-#ifdef CONFIG_DM_USB
+#if CONFIG_IS_ENABLED(DM_USB)
 	debug("%s: resetting '%s' port %d...\n", __func__, dev->dev->name,
 	      port + 1);
 #else
@@ -397,7 +397,7 @@ int usb_hub_port_connect_change(struct usb_device *dev, int port)
 		break;
 	}
 
-#ifdef CONFIG_DM_USB
+#if CONFIG_IS_ENABLED(DM_USB)
 	struct udevice *child;
 
 	ret = usb_scan_device(dev->dev, port + 1, speed, &child);
@@ -607,7 +607,7 @@ static struct usb_hub_device *usb_get_hub_device(struct usb_device *dev)
 {
 	struct usb_hub_device *hub;
 
-#ifndef CONFIG_DM_USB
+#if !CONFIG_IS_ENABLED(DM_USB)
 	/* "allocate" Hub device */
 	hub = usb_hub_allocate();
 #else
@@ -791,7 +791,7 @@ static int usb_hub_configure(struct usb_device *dev)
 	      (le16_to_cpu(hubsts->wHubStatus) & HUB_STATUS_OVERCURRENT) ? \
 	      "" : "no ");
 
-#ifdef CONFIG_DM_USB
+#if CONFIG_IS_ENABLED(DM_USB)
 	/*
 	 * Update USB host controller's internal representation of this hub
 	 * after the hub descriptor is fetched.
@@ -933,7 +933,7 @@ int usb_hub_probe(struct usb_device *dev, int ifnum)
 	return ret;
 }
 
-#ifdef CONFIG_DM_USB
+#if CONFIG_IS_ENABLED(DM_USB)
 int usb_hub_scan(struct udevice *hub)
 {
 	struct usb_device *udev = dev_get_parent_priv(hub);
diff --git a/common/usb_kbd.c b/common/usb_kbd.c
index 8cbdba6ac2..07932d1cb4 100644
--- a/common/usb_kbd.c
+++ b/common/usb_kbd.c
@@ -537,7 +537,7 @@ static int probe_usb_keyboard(struct usb_device *dev)
 	return 0;
 }
 
-#ifndef CONFIG_DM_USB
+#if !CONFIG_IS_ENABLED(DM_USB)
 /* Search for keyboard and register it if found. */
 int drv_usb_kbd_init(void)
 {
@@ -600,7 +600,7 @@ int usb_kbd_deregister(int force)
 
 #endif
 
-#ifdef CONFIG_DM_USB
+#if CONFIG_IS_ENABLED(DM_USB)
 
 static int usb_kbd_probe(struct udevice *dev)
 {
diff --git a/common/usb_storage.c b/common/usb_storage.c
index a91b1c0d2f..be0b2df5d9 100644
--- a/common/usb_storage.c
+++ b/common/usb_storage.c
@@ -303,7 +303,7 @@ int usb_stor_scan(int mode)
 	if (mode == 1)
 		printf("       scanning usb for storage devices... ");
 
-#ifndef CONFIG_DM_USB
+#if !CONFIG_IS_ENABLED(DM_USB)
 	unsigned char i;
 
 	usb_disable_asynch(1); /* asynch transfer not allowed */
@@ -946,7 +946,7 @@ static void usb_stor_set_max_xfer_blk(struct usb_device *udev,
 	size_t __maybe_unused size;
 	int __maybe_unused ret;
 
-#ifndef CONFIG_DM_USB
+#if !CONFIG_IS_ENABLED(DM_USB)
 #ifdef CONFIG_USB_EHCI_HCD
 	/*
 	 * The U-Boot EHCI driver can handle any transfer length as long as
@@ -1500,7 +1500,7 @@ int usb_stor_get_info(struct usb_device *dev, struct us_data *ss,
 	return 1;
 }
 
-#ifdef CONFIG_DM_USB
+#if CONFIG_IS_ENABLED(DM_USB)
 
 static int usb_mass_storage_probe(struct udevice *dev)
 {
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index af97f97b57..ca60409bfa 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -811,7 +811,7 @@ MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
 MODULE_LICENSE("GPL v2");
 MODULE_DESCRIPTION("DesignWare USB3 DRD Controller Driver");
 
-#ifdef CONFIG_DM_USB
+#if CONFIG_IS_ENABLED(DM_USB)
 
 int dwc3_init(struct dwc3 *dwc)
 {
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 16400061f7..a8f46b020f 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -724,7 +724,7 @@ struct dwc3 {
 	/* device lock */
 	spinlock_t		lock;
 
-#if defined(__UBOOT__) && defined(CONFIG_DM_USB)
+#if defined(__UBOOT__) && CONFIG_IS_ENABLED(DM_USB)
 	struct udevice		*dev;
 #else
 	struct device		*dev;
diff --git a/drivers/usb/eth/usb_ether.c b/drivers/usb/eth/usb_ether.c
index 36734e2e51..b76f5cc2fa 100644
--- a/drivers/usb/eth/usb_ether.c
+++ b/drivers/usb/eth/usb_ether.c
@@ -272,7 +272,7 @@ int usb_host_eth_scan(int mode)
 	}
 
 	usb_max_eth_dev = 0;
-#ifdef CONFIG_DM_USB
+#if CONFIG_IS_ENABLED(DM_USB)
 	/*
 	 * TODO: We should add U_BOOT_USB_DEVICE() declarations to each USB
 	 * Ethernet driver and then most of this file can be removed.
diff --git a/drivers/usb/gadget/ci_udc.c b/drivers/usb/gadget/ci_udc.c
index 05c01ce5d6..a19dd0a14e 100644
--- a/drivers/usb/gadget/ci_udc.c
+++ b/drivers/usb/gadget/ci_udc.c
@@ -1009,7 +1009,7 @@ int usb_gadget_register_driver(struct usb_gadget_driver *driver)
 	if (driver->speed != USB_SPEED_FULL && driver->speed != USB_SPEED_HIGH)
 		return -EINVAL;
 
-#ifdef CONFIG_DM_USB
+#if CONFIG_IS_ENABLED(DM_USB)
 	ret = usb_setup_ehci_gadget(&controller.ctrl);
 #else
 	ret = usb_lowlevel_init(0, USB_INIT_DEVICE, (void **)&controller.ctrl);
diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c
index a80486e91f..21c97d024f 100644
--- a/drivers/usb/gadget/ether.c
+++ b/drivers/usb/gadget/ether.c
@@ -105,7 +105,7 @@ struct eth_dev {
 	struct usb_gadget	*gadget;
 	struct usb_request	*req;		/* for control responses */
 	struct usb_request	*stat_req;	/* for cdc & rndis status */
-#ifdef CONFIG_DM_USB
+#if CONFIG_IS_ENABLED(DM_USB)
 	struct udevice		*usb_udev;
 #endif
 
@@ -2342,7 +2342,7 @@ fail:
 
 /*-------------------------------------------------------------------------*/
 
-#ifdef CONFIG_DM_USB
+#if CONFIG_IS_ENABLED(DM_USB)
 int dm_usb_init(struct eth_dev *e_dev)
 {
 	struct udevice *dev = NULL;
@@ -2367,7 +2367,7 @@ static int _usb_eth_init(struct ether_priv *priv)
 	unsigned long ts;
 	unsigned long timeout = USB_CONNECT_TIMEOUT;
 
-#ifdef CONFIG_DM_USB
+#if CONFIG_IS_ENABLED(DM_USB)
 	if (dm_usb_init(dev)) {
 		pr_err("USB ether not found\n");
 		return -ENODEV;
@@ -2546,7 +2546,7 @@ void _usb_eth_halt(struct ether_priv *priv)
 	}
 
 	usb_gadget_unregister_driver(&priv->eth_driver);
-#ifndef CONFIG_DM_USB
+#if !CONFIG_IS_ENABLED(DM_USB)
 	board_usb_cleanup(0, USB_INIT_DEVICE);
 #endif
 }
diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
index 04436cf703..884613fe4e 100644
--- a/drivers/usb/host/dwc2.c
+++ b/drivers/usb/host/dwc2.c
@@ -32,7 +32,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define MAX_ENDPOINT			16
 
 struct dwc2_priv {
-#ifdef CONFIG_DM_USB
+#if CONFIG_IS_ENABLED(DM_USB)
 	uint8_t aligned_buffer[DWC2_DATA_BUF_SIZE] __aligned(ARCH_DMA_MINALIGN);
 	uint8_t status_buffer[DWC2_STATUS_BUF_SIZE] __aligned(ARCH_DMA_MINALIGN);
 #ifdef CONFIG_DM_REGULATOR
@@ -57,7 +57,7 @@ struct dwc2_priv {
 	struct reset_ctl_bulk	resets;
 };
 
-#ifndef CONFIG_DM_USB
+#if !CONFIG_IS_ENABLED(DM_USB)
 /* We need cacheline-aligned buffers for DMA transfers and dcache support */
 DEFINE_ALIGN_BUFFER(uint8_t, aligned_buffer_addr, DWC2_DATA_BUF_SIZE,
 		ARCH_DMA_MINALIGN);
@@ -171,7 +171,7 @@ static void dwc_otg_core_reset(struct dwc2_core_regs *regs)
 	mdelay(100);
 }
 
-#if defined(CONFIG_DM_USB) && defined(CONFIG_DM_REGULATOR)
+#if CONFIG_IS_ENABLED(DM_USB) && defined(CONFIG_DM_REGULATOR)
 static int dwc_vbus_supply_init(struct udevice *dev)
 {
 	struct dwc2_priv *priv = dev_get_priv(dev);
@@ -214,7 +214,7 @@ static int dwc_vbus_supply_init(struct udevice *dev)
 	return 0;
 }
 
-#if defined(CONFIG_DM_USB)
+#if CONFIG_IS_ENABLED(DM_USB)
 static int dwc_vbus_supply_exit(struct udevice *dev)
 {
 	return 0;
@@ -1225,7 +1225,7 @@ static void dwc2_uninit_common(struct dwc2_core_regs *regs)
 			DWC2_HPRT0_PRTRST);
 }
 
-#ifndef CONFIG_DM_USB
+#if !CONFIG_IS_ENABLED(DM_USB)
 int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
 		       int len, struct devrequest *setup)
 {
@@ -1270,7 +1270,7 @@ int usb_lowlevel_stop(int index)
 }
 #endif
 
-#ifdef CONFIG_DM_USB
+#if CONFIG_IS_ENABLED(DM_USB)
 static int dwc2_submit_control_msg(struct udevice *dev, struct usb_device *udev,
 				   unsigned long pipe, void *buffer, int length,
 				   struct devrequest *setup)
diff --git a/drivers/usb/host/ehci-atmel.c b/drivers/usb/host/ehci-atmel.c
index f6c6b019ca..6ea5764b99 100644
--- a/drivers/usb/host/ehci-atmel.c
+++ b/drivers/usb/host/ehci-atmel.c
@@ -15,9 +15,7 @@
 
 #include "ehci.h"
 
-DECLARE_GLOBAL_DATA_PTR;
-
-#ifndef CONFIG_DM_USB
+#if !CONFIG_IS_ENABLED(DM_USB)
 
 int ehci_hcd_init(int index, enum usb_init_type init,
 		struct ehci_hccr **hccr, struct ehci_hcor **hcor)
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index 17d1fae382..5080d5fb24 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -26,7 +26,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
 #endif
 
-#ifdef CONFIG_DM_USB
+#if CONFIG_IS_ENABLED(DM_USB)
 struct ehci_fsl_priv {
 	struct ehci_ctrl ehci;
 	fdt_addr_t hcd_base;
@@ -35,7 +35,7 @@ struct ehci_fsl_priv {
 #endif
 
 static void set_txfifothresh(struct usb_ehci *, u32);
-#ifdef CONFIG_DM_USB
+#if CONFIG_IS_ENABLED(DM_USB)
 static int ehci_fsl_init(struct ehci_fsl_priv *priv, struct usb_ehci *ehci,
 		  struct ehci_hccr *hccr, struct ehci_hcor *hcor);
 #else
@@ -55,7 +55,7 @@ static int usb_phy_clk_valid(struct usb_ehci *ehci)
 	}
 }
 
-#ifdef CONFIG_DM_USB
+#if CONFIG_IS_ENABLED(DM_USB)
 static int ehci_fsl_ofdata_to_platdata(struct udevice *dev)
 {
 	struct ehci_fsl_priv *priv = dev_get_priv(dev);
@@ -177,7 +177,7 @@ int ehci_hcd_stop(int index)
 }
 #endif
 
-#ifdef CONFIG_DM_USB
+#if CONFIG_IS_ENABLED(DM_USB)
 static int ehci_fsl_init(struct ehci_fsl_priv *priv, struct usb_ehci *ehci,
 		  struct ehci_hccr *hccr, struct ehci_hcor *hcor)
 #else
@@ -186,7 +186,7 @@ static int ehci_fsl_init(int index, struct usb_ehci *ehci,
 #endif
 {
 	const char *phy_type = NULL;
-#ifndef CONFIG_DM_USB
+#if !CONFIG_IS_ENABLED(DM_USB)
 	size_t len;
 	char current_usb_controller[5];
 #endif
@@ -212,7 +212,7 @@ static int ehci_fsl_init(int index, struct usb_ehci *ehci,
 	out_be32(&ehci->snoop2, 0x80000000 | SNOOP_SIZE_2GB);
 
 	/* Init phy */
-#ifdef CONFIG_DM_USB
+#if CONFIG_IS_ENABLED(DM_USB)
 	if (priv->phy_type)
 		phy_type = priv->phy_type;
 #else
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index 45dfd65d6f..c70a365840 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -31,7 +31,7 @@
  */
 #define HCHALT_TIMEOUT (8 * 1000)
 
-#ifndef CONFIG_DM_USB
+#if !CONFIG_IS_ENABLED(DM_USB)
 static struct ehci_ctrl ehcic[CONFIG_USB_MAX_CONTROLLER_COUNT];
 #endif
 
@@ -112,7 +112,7 @@ static struct descriptor {
 
 static struct ehci_ctrl *ehci_get_ctrl(struct usb_device *udev)
 {
-#ifdef CONFIG_DM_USB
+#if CONFIG_IS_ENABLED(DM_USB)
 	return dev_get_priv(usb_get_bus(udev->dev));
 #else
 	return udev->controller;
@@ -964,7 +964,7 @@ static void ehci_setup_ops(struct ehci_ctrl *ctrl, const struct ehci_ops *ops)
 	}
 }
 
-#ifndef CONFIG_DM_USB
+#if !CONFIG_IS_ENABLED(DM_USB)
 void ehci_set_controller_priv(int index, void *priv, const struct ehci_ops *ops)
 {
 	struct ehci_ctrl *ctrl = &ehcic[index];
@@ -1088,7 +1088,7 @@ static int ehci_common_init(struct ehci_ctrl *ctrl, uint tweaks)
 	return 0;
 }
 
-#ifndef CONFIG_DM_USB
+#if !CONFIG_IS_ENABLED(DM_USB)
 int usb_lowlevel_stop(int index)
 {
 	ehci_shutdown(&ehcic[index]);
@@ -1509,7 +1509,7 @@ static int _ehci_submit_int_msg(struct usb_device *dev, unsigned long pipe,
 	return result;
 }
 
-#ifndef CONFIG_DM_USB
+#if !CONFIG_IS_ENABLED(DM_USB)
 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe,
 			    void *buffer, int length)
 {
@@ -1547,7 +1547,7 @@ int destroy_int_queue(struct usb_device *dev, struct int_queue *queue)
 }
 #endif
 
-#ifdef CONFIG_DM_USB
+#if CONFIG_IS_ENABLED(DM_USB)
 static int ehci_submit_control_msg(struct udevice *dev, struct usb_device *udev,
 				   unsigned long pipe, void *buffer, int length,
 				   struct devrequest *setup)
diff --git a/drivers/usb/host/ehci-marvell.c b/drivers/usb/host/ehci-marvell.c
index 7a0f2083ad..1ac860eb40 100644
--- a/drivers/usb/host/ehci-marvell.c
+++ b/drivers/usb/host/ehci-marvell.c
@@ -39,7 +39,7 @@ DECLARE_GLOBAL_DATA_PTR;
 /*
  * USB 2.0 Bridge Address Decoding registers setup
  */
-#ifdef CONFIG_DM_USB
+#if CONFIG_IS_ENABLED(DM_USB)
 
 struct ehci_mvebu_priv {
 	struct ehci_ctrl ehci;
@@ -229,4 +229,4 @@ int ehci_hcd_stop(int index)
 	return 0;
 }
 
-#endif /* CONFIG_DM_USB */
+#endif /* CONFIG_IS_ENABLED(DM_USB) */
diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c
index 2c8fc3c4b1..64e05984a1 100644
--- a/drivers/usb/host/ehci-mx6.c
+++ b/drivers/usb/host/ehci-mx6.c
@@ -336,7 +336,7 @@ int ehci_mx6_common_init(struct usb_ehci *ehci, int index)
 	return 0;
 }
 
-#ifndef CONFIG_DM_USB
+#if !CONFIG_IS_ENABLED(DM_USB)
 int ehci_hcd_init(int index, enum usb_init_type init,
 		struct ehci_hccr **hccr, struct ehci_hcor **hcor)
 {
diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c
index 84b2b4a9e6..7a220a3dd5 100644
--- a/drivers/usb/host/ehci-pci.c
+++ b/drivers/usb/host/ehci-pci.c
@@ -20,7 +20,7 @@ struct ehci_pci_priv {
 	struct phy phy;
 };
 
-#ifdef CONFIG_DM_USB
+#if CONFIG_IS_ENABLED(DM_USB)
 static int ehci_pci_init(struct udevice *dev, struct ehci_hccr **ret_hccr,
 			  struct ehci_hcor **ret_hcor)
 {
@@ -122,9 +122,9 @@ int ehci_hcd_stop(int index)
 {
 	return 0;
 }
-#endif /* nCONFIG_DM_USB */
+#endif /* !CONFIG_IS_ENABLED(DM_USB) */
 
-#ifdef CONFIG_DM_USB
+#if CONFIG_IS_ENABLED(DM_USB)
 static int ehci_pci_probe(struct udevice *dev)
 {
 	struct ehci_hccr *hccr;
@@ -174,4 +174,4 @@ static struct pci_device_id ehci_pci_supported[] = {
 
 U_BOOT_PCI_DEVICE(ehci_pci, ehci_pci_supported);
 
-#endif /* CONFIG_DM_USB */
+#endif /* CONFIG_IS_ENABLED(DM_USB) */
diff --git a/drivers/usb/host/ehci-vf.c b/drivers/usb/host/ehci-vf.c
index 3d63cfa193..599c021476 100644
--- a/drivers/usb/host/ehci-vf.c
+++ b/drivers/usb/host/ehci-vf.c
@@ -154,7 +154,7 @@ int ehci_vf_common_init(struct usb_ehci *ehci, int index)
 	return 0;
 }
 
-#ifndef CONFIG_DM_USB
+#if !CONFIG_IS_ENABLED(DM_USB)
 int ehci_hcd_init(int index, enum usb_init_type init,
 		struct ehci_hccr **hccr, struct ehci_hcor **hcor)
 {
diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c
index fdfc870efa..fc3589ccb2 100644
--- a/drivers/usb/host/ohci-hcd.c
+++ b/drivers/usb/host/ohci-hcd.c
@@ -121,7 +121,7 @@ static struct pci_device_id ehci_pci_ids[] = {
 #define invalidate_dcache_iso_td(addr) invalidate_dcache_buffer(addr, 32)
 #define invalidate_dcache_hcca(addr) invalidate_dcache_buffer(addr, 256)
 
-#ifdef CONFIG_DM_USB
+#if CONFIG_IS_ENABLED(DM_USB)
 /*
  * The various ohci_mdelay(1) calls in the code seem unnecessary. We keep
  * them around when building for older boards not yet converted to the dm
@@ -132,7 +132,7 @@ static struct pci_device_id ehci_pci_ids[] = {
 #define ohci_mdelay(x) mdelay(x)
 #endif
 
-#ifndef CONFIG_DM_USB
+#if !CONFIG_IS_ENABLED(DM_USB)
 /* global ohci_t */
 static ohci_t gohci;
 /* this must be aligned to a 256 byte boundary */
@@ -1692,7 +1692,7 @@ static int _ohci_destroy_int_queue(ohci_t *ohci, struct usb_device *dev,
 	return 0;
 }
 
-#ifndef CONFIG_DM_USB
+#if !CONFIG_IS_ENABLED(DM_USB)
 /* submit routines called from usb.c */
 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
 		int transfer_len)
@@ -1981,7 +1981,7 @@ static int hc_interrupt(ohci_t *ohci)
 
 /*-------------------------------------------------------------------------*/
 
-#ifndef CONFIG_DM_USB
+#if !CONFIG_IS_ENABLED(DM_USB)
 
 /*-------------------------------------------------------------------------*/
 
@@ -2131,7 +2131,7 @@ int submit_control_msg(struct usb_device *dev, unsigned long pipe,
 }
 #endif
 
-#ifdef CONFIG_DM_USB
+#if CONFIG_IS_ENABLED(DM_USB)
 static int ohci_submit_control_msg(struct udevice *dev, struct usb_device *udev,
 				   unsigned long pipe, void *buffer, int length,
 				   struct devrequest *setup)
diff --git a/drivers/usb/host/ohci.h b/drivers/usb/host/ohci.h
index 2350831932..3a62d769eb 100644
--- a/drivers/usb/host/ohci.h
+++ b/drivers/usb/host/ohci.h
@@ -27,7 +27,7 @@
 #define ED_ALIGNMENT 16
 #endif
 
-#if defined CONFIG_DM_USB && ARCH_DMA_MINALIGN > 32
+#if CONFIG_IS_ENABLED(DM_USB) && ARCH_DMA_MINALIGN > 32
 #define TD_ALIGNMENT ARCH_DMA_MINALIGN
 #else
 #define TD_ALIGNMENT 32
@@ -406,7 +406,7 @@ typedef struct ohci {
 	const char	*slot_name;
 } ohci_t;
 
-#ifdef CONFIG_DM_USB
+#if CONFIG_IS_ENABLED(DM_USB)
 extern struct dm_usb_ops ohci_usb_ops;
 
 int ohci_register(struct udevice *dev, struct ohci_regs *regs);
diff --git a/drivers/usb/host/xhci-dwc3.c b/drivers/usb/host/xhci-dwc3.c
index adfa4a75cd..d231e5e29b 100644
--- a/drivers/usb/host/xhci-dwc3.c
+++ b/drivers/usb/host/xhci-dwc3.c
@@ -112,7 +112,7 @@ void dwc3_set_fladj(struct dwc3 *dwc3_reg, u32 val)
 			GFLADJ_30MHZ(val));
 }
 
-#ifdef CONFIG_DM_USB
+#if CONFIG_IS_ENABLED(DM_USB)
 static int xhci_dwc3_setup_phy(struct udevice *dev)
 {
 	struct xhci_dwc3_platdata *plat = dev_get_platdata(dev);
diff --git a/drivers/usb/host/xhci-fsl.c b/drivers/usb/host/xhci-fsl.c
index f77c78d422..afbc6840a0 100644
--- a/drivers/usb/host/xhci-fsl.c
+++ b/drivers/usb/host/xhci-fsl.c
@@ -19,10 +19,7 @@
 #include <fsl_usb.h>
 #include <dm.h>
 
-/* Declare global data pointer */
-DECLARE_GLOBAL_DATA_PTR;
-
-#ifndef CONFIG_DM_USB
+#if !CONFIG_IS_ENABLED(DM_USB)
 static struct fsl_xhci fsl_xhci;
 unsigned long ctr_addr[] = FSL_USB_XHCI_ADDR;
 #else
@@ -110,7 +107,7 @@ static int fsl_xhci_core_exit(struct fsl_xhci *fsl_xhci)
 	return 0;
 }
 
-#ifdef CONFIG_DM_USB
+#if CONFIG_IS_ENABLED(DM_USB)
 static int xhci_fsl_probe(struct udevice *dev)
 {
 	struct xhci_fsl_priv *priv = dev_get_priv(dev);
diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
index 0582a9be40..9ceb9698ef 100644
--- a/drivers/usb/host/xhci-mem.c
+++ b/drivers/usb/host/xhci-mem.c
@@ -724,7 +724,7 @@ void xhci_setup_addressable_virt_dev(struct xhci_ctrl *ctrl,
 	int slot_id = udev->slot_id;
 	int speed = udev->speed;
 	int route = 0;
-#ifdef CONFIG_DM_USB
+#if CONFIG_IS_ENABLED(DM_USB)
 	struct usb_device *dev = udev;
 	struct usb_hub_device *hub;
 #endif
@@ -740,7 +740,7 @@ void xhci_setup_addressable_virt_dev(struct xhci_ctrl *ctrl,
 	/* Only the control endpoint is valid - one endpoint context */
 	slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
 
-#ifdef CONFIG_DM_USB
+#if CONFIG_IS_ENABLED(DM_USB)
 	/* Calculate the route string for this device */
 	port_num = dev->portnr;
 	while (!usb_hub_is_root_hub(dev->dev)) {
@@ -783,7 +783,7 @@ void xhci_setup_addressable_virt_dev(struct xhci_ctrl *ctrl,
 		BUG();
 	}
 
-#ifdef CONFIG_DM_USB
+#if CONFIG_IS_ENABLED(DM_USB)
 	/* Set up TT fields to support FS/LS devices */
 	if (speed == USB_SPEED_LOW || speed == USB_SPEED_FULL) {
 		struct udevice *parent = udev->dev;
diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index c737b0659e..aaa1a6ce2b 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -109,13 +109,13 @@ static struct descriptor {
 	},
 };
 
-#ifndef CONFIG_DM_USB
+#if !CONFIG_IS_ENABLED(DM_USB)
 static struct xhci_ctrl xhcic[CONFIG_USB_MAX_CONTROLLER_COUNT];
 #endif
 
 struct xhci_ctrl *xhci_get_ctrl(struct usb_device *udev)
 {
-#ifdef CONFIG_DM_USB
+#if CONFIG_IS_ENABLED(DM_USB)
 	struct udevice *dev;
 
 	/* Find the USB controller */
@@ -742,7 +742,7 @@ static int _xhci_alloc_device(struct usb_device *udev)
 	return 0;
 }
 
-#ifndef CONFIG_DM_USB
+#if !CONFIG_IS_ENABLED(DM_USB)
 int usb_alloc_device(struct usb_device *udev)
 {
 	return _xhci_alloc_device(udev);
@@ -1257,7 +1257,7 @@ static int xhci_lowlevel_stop(struct xhci_ctrl *ctrl)
 	return 0;
 }
 
-#ifndef CONFIG_DM_USB
+#if !CONFIG_IS_ENABLED(DM_USB)
 int submit_control_msg(struct usb_device *udev, unsigned long pipe,
 		       void *buffer, int length, struct devrequest *setup)
 {
@@ -1341,9 +1341,9 @@ int usb_lowlevel_stop(int index)
 
 	return 0;
 }
-#endif /* CONFIG_DM_USB */
+#endif /* CONFIG_IS_ENABLED(DM_USB) */
 
-#ifdef CONFIG_DM_USB
+#if CONFIG_IS_ENABLED(DM_USB)
 
 static int xhci_submit_control_msg(struct udevice *dev, struct usb_device *udev,
 				   unsigned long pipe, void *buffer, int length,
diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
index ba5f650144..e5b30592ee 100644
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -1212,7 +1212,7 @@ void xhci_hcd_stop(int index);
 #define XHCI_STS_CNR		(1 << 11)
 
 struct xhci_ctrl {
-#ifdef CONFIG_DM_USB
+#if CONFIG_IS_ENABLED(DM_USB)
 	struct udevice *dev;
 #endif
 	struct xhci_hccr *hccr;	/* R/O registers, not need for volatile */
diff --git a/drivers/usb/musb-new/musb_uboot.c b/drivers/usb/musb-new/musb_uboot.c
index 8662c0ff70..e2aa313850 100644
--- a/drivers/usb/musb-new/musb_uboot.c
+++ b/drivers/usb/musb-new/musb_uboot.c
@@ -22,7 +22,7 @@ struct int_queue {
 	struct urb urb;
 };
 
-#ifndef CONFIG_DM_USB
+#if !CONFIG_IS_ENABLED(DM_USB)
 struct musb_host_data musb_host;
 #endif
 
@@ -249,7 +249,7 @@ int musb_lowlevel_init(struct musb_host_data *host)
 	return 0;
 }
 
-#ifndef CONFIG_DM_USB
+#if !CONFIG_IS_ENABLED(DM_USB)
 int usb_lowlevel_stop(int index)
 {
 	if (!musb_host.host) {
@@ -306,9 +306,9 @@ int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
 {
 	return musb_lowlevel_init(&musb_host);
 }
-#endif /* !CONFIG_DM_USB */
+#endif /* !CONFIG_IS_ENABLED(DM_USB) */
 
-#ifdef CONFIG_DM_USB
+#if CONFIG_IS_ENABLED(DM_USB)
 static int musb_submit_control_msg(struct udevice *dev, struct usb_device *udev,
 				   unsigned long pipe, void *buffer, int length,
 				   struct devrequest *setup)
@@ -370,7 +370,7 @@ struct dm_usb_ops musb_usb_ops = {
 	.destroy_int_queue = musb_destroy_int_queue,
 	.reset_root_port = musb_reset_root_port,
 };
-#endif /* CONFIG_DM_USB */
+#endif /* CONFIG_IS_ENABLED(DM_USB) */
 #endif /* CONFIG_USB_MUSB_HOST */
 
 #ifdef CONFIG_USB_MUSB_GADGET
@@ -431,7 +431,7 @@ int musb_register(struct musb_hdrc_platform_data *plat, void *bdata,
 	struct musb **musbp;
 
 	switch (plat->mode) {
-#if defined(CONFIG_USB_MUSB_HOST) && !defined(CONFIG_DM_USB)
+#if defined(CONFIG_USB_MUSB_HOST) && !CONFIG_IS_ENABLED(DM_USB)
 	case MUSB_HOST:
 		musbp = &musb_host.host;
 		break;
diff --git a/drivers/usb/musb-new/omap2430.c b/drivers/usb/musb-new/omap2430.c
index 53a5cb734e..7c757aba64 100644
--- a/drivers/usb/musb-new/omap2430.c
+++ b/drivers/usb/musb-new/omap2430.c
@@ -136,7 +136,7 @@ const struct musb_platform_ops omap2430_ops = {
 	.disable	= omap2430_musb_disable,
 };
 
-#if defined(CONFIG_DM_USB)
+#if CONFIG_IS_ENABLED(DM_USB)
 
 struct omap2430_musb_platdata {
 	void *base;
@@ -277,4 +277,4 @@ U_BOOT_DRIVER(omap2430_musb) = {
 	.priv_auto_alloc_size = sizeof(struct musb_host_data),
 };
 
-#endif /* CONFIG_DM_USB */
+#endif /* CONFIG_IS_ENABLED(DM_USB) */
diff --git a/drivers/usb/musb-new/ti-musb.c b/drivers/usb/musb-new/ti-musb.c
index 233857ad7a..b332fac887 100644
--- a/drivers/usb/musb-new/ti-musb.c
+++ b/drivers/usb/musb-new/ti-musb.c
@@ -20,7 +20,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#ifdef CONFIG_DM_USB
+#if CONFIG_IS_ENABLED(DM_USB)
 
 /* USB 2.0 PHY Control */
 #define CM_PHY_PWRDN			(1 << 0)
@@ -252,4 +252,4 @@ U_BOOT_DRIVER(ti_musb_wrapper) = {
 	.bind = ti_musb_wrapper_bind,
 };
 
-#endif /* CONFIG_DM_USB */
+#endif /* CONFIG_IS_ENABLED(DM_USB) */
diff --git a/drivers/usb/musb-new/usb-compat.h b/drivers/usb/musb-new/usb-compat.h
index 760bd787bc..f2c18ad3a2 100644
--- a/drivers/usb/musb-new/usb-compat.h
+++ b/drivers/usb/musb-new/usb-compat.h
@@ -67,7 +67,7 @@ static inline int usb_hcd_unmap_urb_for_dma(struct usb_hcd *hcd,
 	return 0;
 }
 
-#ifdef CONFIG_DM_USB
+#if CONFIG_IS_ENABLED(DM_USB)
 static inline struct usb_device *usb_dev_get_parent(struct usb_device *udev)
 {
 	struct udevice *parent = udev->dev->parent;
diff --git a/include/usb.h b/include/usb.h
index 342f6f0516..cf8ec98177 100644
--- a/include/usb.h
+++ b/include/usb.h
@@ -141,7 +141,7 @@ struct usb_device {
 	int act_len;			/* transferred bytes */
 	int maxchild;			/* Number of ports if hub */
 	int portnr;			/* Port number, 1=first */
-#ifndef CONFIG_DM_USB
+#if !CONFIG_IS_ENABLED(DM_USB)
 	/* parent hub, or NULL if this is the root hub */
 	struct usb_device *parent;
 	struct usb_device *children[USB_MAXCHILDREN];
@@ -149,7 +149,7 @@ struct usb_device {
 #endif
 	/* slot_id - for xHCI enabled devices */
 	unsigned int slot_id;
-#ifdef CONFIG_DM_USB
+#if CONFIG_IS_ENABLED(DM_USB)
 	struct udevice *dev;		/* Pointer to associated device */
 	struct udevice *controller_dev;	/* Pointer to associated controller */
 #endif
@@ -174,7 +174,7 @@ enum usb_init_type {
 int usb_lowlevel_init(int index, enum usb_init_type init, void **controller);
 int usb_lowlevel_stop(int index);
 
-#if defined(CONFIG_USB_MUSB_HOST) || defined(CONFIG_DM_USB)
+#if defined(CONFIG_USB_MUSB_HOST) || CONFIG_IS_ENABLED(DM_USB)
 int usb_reset_root_port(struct usb_device *dev);
 #else
 #define usb_reset_root_port(dev)
@@ -188,7 +188,7 @@ int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
 			int transfer_len, int interval);
 
 #if defined CONFIG_USB_EHCI_HCD || defined CONFIG_USB_MUSB_HOST \
-	|| defined(CONFIG_DM_USB)
+	|| CONFIG_IS_ENABLED(DM_USB)
 struct int_queue *create_int_queue(struct usb_device *dev, unsigned long pipe,
 	int queuesize, int elementsize, void *buffer, int interval);
 int destroy_int_queue(struct usb_device *dev, struct int_queue *queue);
@@ -589,7 +589,7 @@ struct usb_hub_device {
 	struct usb_tt tt;		/* Transaction Translator */
 };
 
-#ifdef CONFIG_DM_USB
+#if CONFIG_IS_ENABLED(DM_USB)
 /**
  * struct usb_platdata - Platform data about a USB controller
  *
@@ -913,7 +913,7 @@ int usb_setup_ehci_gadget(struct ehci_ctrl **ctlrp);
  */
 void usb_stor_reset(void);
 
-#else /* !CONFIG_DM_USB */
+#else /* !CONFIG_IS_ENABLED(DM_USB) */
 
 struct usb_device *usb_get_dev_index(int index);
 

commit 796dd72a95558ef5d6aeee318132184afdd5c1a1
Author: Ramon Fried <ramon.fried@gmail.com>
Date:   Fri Sep 21 13:35:44 2018 +0300

    UPSTREAM: ehci: msm: Add missing platdata
    
    platdata_auto_alloc_size was not initialized in structure.
    Caused null pointer dereference when configuring device as
    gadget.
    
    Change-Id: Ia4e8b681de09fa290a1031bd43240ac2603d494b
    Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 2df49234c6508052ed02602f882d3ce0332d937f)

diff --git a/drivers/usb/host/ehci-msm.c b/drivers/usb/host/ehci-msm.c
index ea008bb184..957096a192 100644
--- a/drivers/usb/host/ehci-msm.c
+++ b/drivers/usb/host/ehci-msm.c
@@ -173,5 +173,6 @@ U_BOOT_DRIVER(usb_ehci) = {
 	.remove = ehci_usb_remove,
 	.ops	= &ehci_usb_ops,
 	.priv_auto_alloc_size = sizeof(struct msm_ehci_priv),
+	.platdata_auto_alloc_size = sizeof(struct usb_platdata),
 	.flags	= DM_FLAG_ALLOC_PRIV_DMA,
 };

commit 4e900a7dc30456c89a7fc9871e3d1dd32347ae44
Author: Patrice Chotard <patrice.chotard@st.com>
Date:   Tue Sep 4 11:37:25 2018 +0200

    UPSTREAM: usb: ehci-generic: Add vbus-supply regulator support
    
    Add vbus-supply regulator support.
    On some board vbus is not controlled by the phy but by
    an external regulator.
    
    Change-Id: I1d2851dd9bc1294d0e7bbeff3e6695ca1235d247
    Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 5c349e179db794eff99dd5d3bbac6845d173709e)

diff --git a/drivers/usb/host/ehci-generic.c b/drivers/usb/host/ehci-generic.c
index 09414bac6b..18672d981c 100644
--- a/drivers/usb/host/ehci-generic.c
+++ b/drivers/usb/host/ehci-generic.c
@@ -12,6 +12,7 @@
 #include <asm/io.h>
 #include <dm.h>
 #include "ehci.h"
+#include <power/regulator.h>
 
 /*
  * Even though here we don't explicitly use "struct ehci_ctrl"
@@ -23,10 +24,56 @@ struct generic_ehci {
 	struct clk *clocks;
 	struct reset_ctl *resets;
 	struct phy phy;
+#ifdef CONFIG_DM_REGULATOR
+	struct udevice *vbus_supply;
+#endif
 	int clock_count;
 	int reset_count;
 };
 
+#ifdef CONFIG_DM_REGULATOR
+static int ehci_enable_vbus_supply(struct udevice *dev)
+{
+	struct generic_ehci *priv = dev_get_priv(dev);
+	int ret;
+
+	ret = device_get_supply_regulator(dev, "vbus-supply",
+					  &priv->vbus_supply);
+	if (ret && ret != -ENOENT)
+		return ret;
+
+	if (priv->vbus_supply) {
+		ret = regulator_set_enable(priv->vbus_supply, true);
+		if (ret) {
+			dev_err(dev, "Error enabling VBUS supply\n");
+			return ret;
+		}
+	} else {
+		dev_dbg(dev, "No vbus supply\n");
+	}
+
+	return 0;
+}
+
+static int ehci_disable_vbus_supply(struct generic_ehci *priv)
+{
+	if (priv->vbus_supply)
+		return regulator_set_enable(priv->vbus_supply, false);
+	else
+		return 0;
+}
+#else
+static int ehci_enable_vbus_supply(struct udevice *dev)
+{
+	return 0;
+}
+
+static int ehci_disable_vbus_supply(struct generic_ehci *priv)
+{
+	return 0;
+}
+#endif
+
 static int ehci_usb_probe(struct udevice *dev)
 {
 	struct generic_ehci *priv = dev_get_priv(dev);
@@ -96,10 +143,14 @@ static int ehci_usb_probe(struct udevice *dev)
 		}
 	}
 
-	err = ehci_setup_phy(dev, &priv->phy, 0);
+	err = ehci_enable_vbus_supply(dev);
 	if (err)
 		goto reset_err;
 
+	err = ehci_setup_phy(dev, &priv->phy, 0);
+	if (err)
+		goto regulator_err;
+
 	hccr = map_physmem(dev_read_addr(dev), 0x100, MAP_NOCACHE);
 	hcor = (struct ehci_hcor *)((uintptr_t)hccr +
 				    HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
@@ -115,6 +166,11 @@ phy_err:
 	if (ret)
 		dev_err(dev, "failed to shutdown usb phy\n");
 
+regulator_err:
+	ret = ehci_disable_vbus_supply(priv);
+	if (ret)
+		dev_err(dev, "failed to disable VBUS supply\n");
+
 reset_err:
 	ret = reset_release_all(priv->resets, priv->reset_count);
 	if (ret)
@@ -140,6 +196,10 @@ static int ehci_usb_remove(struct udevice *dev)
 	if (ret)
 		return ret;
 
+	ret = ehci_disable_vbus_supply(priv);
+	if (ret)
+		return ret;
+
 	ret =  reset_release_all(priv->resets, priv->reset_count);
 	if (ret)
 		return ret;

commit a1bebf3735e3712fa1303df00e39fd78d1bcd103
Author: Ley Foon Tan <ley.foon.tan@intel.com>
Date:   Wed Aug 29 00:08:48 2018 +0800

    UPSTREAM: usb: dwc2: Add reset ctrl to driver
    
    Add code to reset all reset signals as in usb DT node. A reset property
    is an optional feature, so only print out a warning and do not fail if a
    reset property is not present.
    
    If a reset property is discovered, then use it to deassert, thus
    bringing the IP out of reset.
    
    Change-Id: I1c8560b20900d65d628c05df20f5e6e5555bc2cf
    Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 88c34b8da62cfb4188ff9a59acb32f88ce9ed1b0)

diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
index d7fe42a385..04436cf703 100644
--- a/drivers/usb/host/dwc2.c
+++ b/drivers/usb/host/dwc2.c
@@ -16,6 +16,7 @@
 #include <wait_bit.h>
 #include <asm/io.h>
 #include <power/regulator.h>
+#include <reset.h>
 
 #include "dwc2.h"
 
@@ -52,6 +53,8 @@ struct dwc2_priv {
 	 */
 	bool hnp_srp_disable;
 	bool oc_disable;
+
+	struct reset_ctl_bulk	resets;
 };
 
 #ifndef CONFIG_DM_USB
@@ -1127,11 +1130,43 @@ int _submit_int_msg(struct dwc2_priv *priv, struct usb_device *dev,
 	}
 }
 
+static int dwc2_reset(struct udevice *dev)
+{
+	int ret;
+	struct dwc2_priv *priv = dev_get_priv(dev);
+
+	ret = reset_get_bulk(dev, &priv->resets);
+	if (ret) {
+		dev_warn(dev, "Can't get reset: %d\n", ret);
+		/* Return 0 if error due to !CONFIG_DM_RESET and reset
+		 * DT property is not present.
+		 */
+		if (ret == -ENOENT || ret == -ENOTSUPP)
+			return 0;
+		else
+			return ret;
+	}
+
+	ret = reset_deassert_bulk(&priv->resets);
+	if (ret) {
+		reset_release_bulk(&priv->resets);
+		dev_err(dev, "Failed to reset: %d\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
 static int dwc2_init_common(struct udevice *dev, struct dwc2_priv *priv)
 {
 	struct dwc2_core_regs *regs = priv->regs;
 	uint32_t snpsid;
 	int i, j;
+	int ret;
+
+	ret = dwc2_reset(dev);
+	if (ret)
+		return ret;
 
 	snpsid = readl(&regs->gsnpsid);
 	dev_info(dev, "Core Release: %x.%03x\n",
@@ -1310,6 +1345,8 @@ static int dwc2_usb_remove(struct udevice *dev)
 
 	dwc2_uninit_common(priv->regs);
 
+	reset_release_bulk(&priv->resets);
+
 	return 0;
 }
 

commit 97147d3ec174f11932f9eb9ddab25ea3e594d89a
Author: Marek Vasut <marek.vasut+renesas@gmail.com>
Date:   Tue Aug 7 12:27:10 2018 +0200

    UPSTREAM: usb: ehci: Add PHY support to ehci-pci
    
    Add support for operating a PHY attached to ehci-pci. There are
    systems where the EHCI controller is internally wired to a PCI
    bus and has a PHY connected to it as well, ie. the R-Car Gen2.
    
    Change-Id: I012fad45af6f59e0e7e2d30dd2a4da578f68bef0
    Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 1335e7745f77f122cf4196b8da2aa2fc5edad475)

diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c
index dceba4bd7a..84b2b4a9e6 100644
--- a/drivers/usb/host/ehci-pci.c
+++ b/drivers/usb/host/ehci-pci.c
@@ -17,17 +17,23 @@
 /* Information about a USB port */
 struct ehci_pci_priv {
 	struct ehci_ctrl ehci;
+	struct phy phy;
 };
 
 #ifdef CONFIG_DM_USB
-
-static void ehci_pci_init(struct udevice *dev, struct ehci_hccr **ret_hccr,
+static int ehci_pci_init(struct udevice *dev, struct ehci_hccr **ret_hccr,
 			  struct ehci_hcor **ret_hcor)
 {
+	struct ehci_pci_priv *priv = dev_get_priv(dev);
 	struct ehci_hccr *hccr;
 	struct ehci_hcor *hcor;
+	int ret;
 	u32 cmd;
 
+	ret = ehci_setup_phy(dev, &priv->phy, 0);
+	if (ret)
+		return ret;
+
 	hccr = (struct ehci_hccr *)dm_pci_map_bar(dev,
 			PCI_BASE_ADDRESS_0, PCI_REGION_MEM);
 	hcor = (struct ehci_hcor *)((uintptr_t) hccr +
@@ -44,6 +50,8 @@ static void ehci_pci_init(struct udevice *dev, struct ehci_hccr **ret_hccr,
 	dm_pci_read_config32(dev, PCI_COMMAND, &cmd);
 	cmd |= PCI_COMMAND_MASTER;
 	dm_pci_write_config32(dev, PCI_COMMAND, cmd);
+
+	return 0;
 }
 
 #else
@@ -121,12 +129,27 @@ static int ehci_pci_probe(struct udevice *dev)
 {
 	struct ehci_hccr *hccr;
 	struct ehci_hcor *hcor;
+	int ret;
 
-	ehci_pci_init(dev, &hccr, &hcor);
+	ret = ehci_pci_init(dev, &hccr, &hcor);
+	if (ret)
+		return ret;
 
 	return ehci_register(dev, hccr, hcor, NULL, 0, USB_INIT_HOST);
 }
 
+static int ehci_pci_remove(struct udevice *dev)
+{
+	struct ehci_pci_priv *priv = dev_get_priv(dev);
+	int ret;
+
+	ret = ehci_deregister(dev);
+	if (ret)
+		return ret;
+
+	return ehci_shutdown_phy(dev, &priv->phy);
+}
+
 static const struct udevice_id ehci_pci_ids[] = {
 	{ .compatible = "ehci-pci" },
 	{ }
@@ -136,7 +159,7 @@ U_BOOT_DRIVER(ehci_pci) = {
 	.name	= "ehci_pci",
 	.id	= UCLASS_USB,
 	.probe = ehci_pci_probe,
-	.remove = ehci_deregister,
+	.remove = ehci_pci_remove,
 	.of_match = ehci_pci_ids,
 	.ops	= &ehci_usb_ops,
 	.platdata_auto_alloc_size = sizeof(struct usb_platdata),

commit f5439a16d8c42b2b85b577a0e7b6572bf20583c5
Author: Marek Vasut <marek.vasut+renesas@gmail.com>
Date:   Wed Aug 8 14:29:55 2018 +0200

    UPSTREAM: usb: ehci: Make the PHY handling generic
    
    Pull out the EHCI PHY functions into the ehci-hcd.c to let other
    EHCI drivers use them.
    
    Change-Id: I5b1cbaf7acb4cee6034e891ee7aecf0ca7d50728
    Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit b43cdf9b3fe246a8920d2b62ee41fc1722315ef0)

diff --git a/drivers/usb/host/ehci-generic.c b/drivers/usb/host/ehci-generic.c
index b012d8651f..09414bac6b 100644
--- a/drivers/usb/host/ehci-generic.c
+++ b/drivers/usb/host/ehci-generic.c
@@ -27,56 +27,6 @@ struct generic_ehci {
 	int reset_count;
 };
 
-static int ehci_setup_phy(struct udevice *dev, int index)
-{
-	struct generic_ehci *priv = dev_get_priv(dev);
-	int ret;
-
-	ret = generic_phy_get_by_index(dev, index, &priv->phy);
-	if (ret) {
-		if (ret != -ENOENT) {
-			dev_err(dev, "failed to get usb phy\n");
-			return ret;
-		}
-	} else {
-		ret = generic_phy_init(&priv->phy);
-		if (ret) {
-			dev_err(dev, "failed to init usb phy\n");
-			return ret;
-		}
-
-		ret = generic_phy_power_on(&priv->phy);
-		if (ret) {
-			dev_err(dev, "failed to power on usb phy\n");
-			return generic_phy_exit(&priv->phy);
-		}
-	}
-
-	return 0;
-}
-
-static int ehci_shutdown_phy(struct udevice *dev)
-{
-	struct generic_ehci *priv = dev_get_priv(dev);
-	int ret = 0;
-
-	if (generic_phy_valid(&priv->phy)) {
-		ret = generic_phy_power_off(&priv->phy);
-		if (ret) {
-			dev_err(dev, "failed to power off usb phy\n");
-			return ret;
-		}
-
-		ret = generic_phy_exit(&priv->phy);
-		if (ret) {
-			dev_err(dev, "failed to power off usb phy\n");
-			return ret;
-		}
-	}
-
-	return 0;
-}
-
 static int ehci_usb_probe(struct udevice *dev)
 {
 	struct generic_ehci *priv = dev_get_priv(dev);
@@ -146,7 +96,7 @@ static int ehci_usb_probe(struct udevice *dev)
 		}
 	}
 
-	err = ehci_setup_phy(dev, 0);
+	err = ehci_setup_phy(dev, &priv->phy, 0);
 	if (err)
 		goto reset_err;
 
@@ -161,7 +111,7 @@ static int ehci_usb_probe(struct udevice *dev)
 	return 0;
 
 phy_err:
-	ret = ehci_shutdown_phy(dev);
+	ret = ehci_shutdown_phy(dev, &priv->phy);
 	if (ret)
 		dev_err(dev, "failed to shutdown usb phy\n");
 
@@ -186,7 +136,7 @@ static int ehci_usb_remove(struct udevice *dev)
 	if (ret)
 		return ret;
 
-	ret = ehci_shutdown_phy(dev);
+	ret = ehci_shutdown_phy(dev, &priv->phy);
 	if (ret)
 		return ret;
 
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index 2582bf36eb..45dfd65d6f 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -1676,3 +1676,69 @@ struct dm_usb_ops ehci_usb_ops = {
 };
 
 #endif
+
+#ifdef CONFIG_PHY
+int ehci_setup_phy(struct udevice *dev, struct phy *phy, int index)
+{
+	int ret;
+
+	if (!phy)
+		return 0;
+
+	ret = generic_phy_get_by_index(dev, index, phy);
+	if (ret) {
+		if (ret != -ENOENT) {
+			dev_err(dev, "failed to get usb phy\n");
+			return ret;
+		}
+	} else {
+		ret = generic_phy_init(phy);
+		if (ret) {
+			dev_err(dev, "failed to init usb phy\n");
+			return ret;
+		}
+
+		ret = generic_phy_power_on(phy);
+		if (ret) {
+			dev_err(dev, "failed to power on usb phy\n");
+			return generic_phy_exit(phy);
+		}
+	}
+
+	return 0;
+}
+
+int ehci_shutdown_phy(struct udevice *dev, struct phy *phy)
+{
+	int ret = 0;
+
+	if (!phy)
+		return 0;
+
+	if (generic_phy_valid(phy)) {
+		ret = generic_phy_power_off(phy);
+		if (ret) {
+			dev_err(dev, "failed to power off usb phy\n");
+			return ret;
+		}
+
+		ret = generic_phy_exit(phy);
+		if (ret) {
+			dev_err(dev, "failed to power off usb phy\n");
+			return ret;
+		}
+	}
+
+	return 0;
+}
+#else
+int ehci_setup_phy(struct udevice *dev, struct phy *phy, int index)
+{
+	return 0;
+}
+
+int ehci_shutdown_phy(struct udevice *dev, struct phy *phy)
+{
+	return 0;
+}
+#endif
diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h
index 18692b732e..935ebbda3a 100644
--- a/drivers/usb/host/ehci.h
+++ b/drivers/usb/host/ehci.h
@@ -10,6 +10,7 @@
 #define USB_EHCI_H
 
 #include <usb.h>
+#include <generic-phy.h>
 
 /* Section 2.2.3 - N_PORTS */
 #define MAX_HC_PORTS		15
@@ -289,4 +290,8 @@ int ehci_register(struct udevice *dev, struct ehci_hccr *hccr,
 int ehci_deregister(struct udevice *dev);
 extern struct dm_usb_ops ehci_usb_ops;
 
+/* EHCI PHY functions */
+int ehci_setup_phy(struct udevice *dev, struct phy *phy, int index);
+int ehci_shutdown_phy(struct udevice *dev, struct phy *phy);
+
 #endif /* USB_EHCI_H */

commit 807262447fcdb373850e667d63791da1651addbb
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Thu Aug 9 16:17:40 2018 +0200

    UPSTREAM: usb: gadget: Add bcdDevice for the DWC3 USB Gadget Controller
    
    Add an entry in usb_gadget_controller_number() for the DWC3 gadget
    controller. Without it, it is not possible to bind the USB Ethernet driver.
    
    Change-Id: I7d911f734aa279418cd43fa1ec9947e33236c35f
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit c73251eac199a54643ead1febde2db0b02970cc6)

diff --git a/drivers/usb/gadget/gadget_chips.h b/drivers/usb/gadget/gadget_chips.h
index f320708431..9b0ad2e62b 100644
--- a/drivers/usb/gadget/gadget_chips.h
+++ b/drivers/usb/gadget/gadget_chips.h
@@ -214,5 +214,7 @@ static inline int usb_gadget_controller_number(struct usb_gadget *gadget)
 		return 0x21;
 	else if (gadget_is_fotg210(gadget))
 		return 0x22;
+	else if (gadget_is_dwc3(gadget))
+		return 0x23;
 	return -ENOENT;
 }

commit b30beda2aed2fb4438cd54ec9480a46438d25c14
Author: Adam Ford <aford173@gmail.com>
Date:   Tue Jul 31 05:58:01 2018 -0500

    UPSTREAM: usb: musb-new: omap2430: Enable DM_USB and OF support
    
    With upcoming changes that require CONFIG_BLK, this broke
    USB Mass Storage on the OMAP3 boards because if CONFIG_BLK is
    enabled, it assumes that DM_USB is enabled, but it wasn't yet
    available on omap3 and omap4 boards.
    
    This patch converts the OMAP2430 MUSB glue to support DM_USB and
    extracts the necessary information based on the device tree.
    
    It's based on the ti-musb driver, but there are enough significant
    differences in both the architecture and device tree entires between
    am33xx and OMAP3/OMAP4, that I think it makes sense to continue to
    keep the separate.
    
    Per doc/driver-model/usb-info.txt, the USB gadget stuff hasn't
    migrated to DM_USB yet, so this only supports USB Host for now.
    
    Users wanting USB Gadgets will need to disable DM_USB and leave
    it the old way for now.
    
    Change-Id: I07fd347129706d136fadd4d6aa735c5df95cb17e
    Signed-off-by: Adam Ford <aford173@gmail.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 1a35526e1d54a346e12435bee757bfe47093157d)

diff --git a/drivers/usb/musb-new/omap2430.c b/drivers/usb/musb-new/omap2430.c
index cc7fa8fc37..53a5cb734e 100644
--- a/drivers/usb/musb-new/omap2430.c
+++ b/drivers/usb/musb-new/omap2430.c
@@ -10,14 +10,18 @@
  * SPDX-License-Identifier:	GPL-2.0
  */
 #include <common.h>
+#include <dm.h>
+#include <dm/device-internal.h>
+#include <dm/lists.h>
+#include <linux/usb/otg.h>
 #include <asm/omap_common.h>
 #include <asm/omap_musb.h>
 #include <twl4030.h>
 #include <twl6030.h>
 #include "linux-compat.h"
-
 #include "musb_core.h"
 #include "omap2430.h"
+#include "musb_uboot.h"
 
 static inline void omap2430_low_level_exit(struct musb *musb)
 {
@@ -44,6 +48,7 @@ static int omap2430_musb_init(struct musb *musb)
 	u32 l;
 	int status = 0;
 	unsigned long int start;
+
 	struct omap_musb_board_data *data =
 		(struct omap_musb_board_data *)musb->controller;
 
@@ -130,3 +135,146 @@ const struct musb_platform_ops omap2430_ops = {
 	.enable		= omap2430_musb_enable,
 	.disable	= omap2430_musb_disable,
 };
+
+#if defined(CONFIG_DM_USB)
+
+struct omap2430_musb_platdata {
+	void *base;
+	void *ctrl_mod_base;
+	struct musb_hdrc_platform_data plat;
+	struct musb_hdrc_config musb_config;
+	struct omap_musb_board_data otg_board_data;
+};
+
+static int omap2430_musb_ofdata_to_platdata(struct udevice *dev)
+{
+	struct omap2430_musb_platdata *platdata = dev_get_platdata(dev);
+	const void *fdt = gd->fdt_blob;
+	int node = dev_of_offset(dev);
+
+	platdata->base = (void *)dev_read_addr_ptr(dev);
+
+	platdata->musb_config.multipoint = fdtdec_get_int(fdt, node,
+							  "multipoint",
+							  -1);
+	if (platdata->musb_config.multipoint < 0) {
+		pr_err("MUSB multipoint DT entry missing\n");
+		return -ENOENT;
+	}
+
+	platdata->musb_config.dyn_fifo = 1;
+	platdata->musb_config.num_eps = fdtdec_get_int(fdt, node,
+						       "num-eps", -1);
+	if (platdata->musb_config.num_eps < 0) {
+		pr_err("MUSB num-eps DT entry missing\n");
+		return -ENOENT;
+	}
+
+	platdata->musb_config.ram_bits = fdtdec_get_int(fdt, node,
+							"ram-bits", -1);
+	if (platdata->musb_config.ram_bits < 0) {
+		pr_err("MUSB ram-bits DT entry missing\n");
+		return -ENOENT;
+	}
+
+	platdata->plat.power = fdtdec_get_int(fdt, node,
+								"power", -1);
+	if (platdata->plat.power < 0) {
+		pr_err("MUSB power DT entry missing\n");
+		return -ENOENT;
+	}
+
+	platdata->otg_board_data.interface_type = fdtdec_get_int(fdt, node,
+									"interface-type", -1);
+	if (platdata->otg_board_data.interface_type < 0) {
+		pr_err("MUSB interface-type DT entry missing\n");
+		return -ENOENT;
+	}
+
+#if 0 /* In a perfect world, mode would be set to OTG, mode 3 from DT */
+	platdata->plat.mode = fdtdec_get_int(fdt, node,
+										"mode", -1);
+	if (platdata->plat.mode < 0) {
+		pr_err("MUSB mode DT entry missing\n");
+		return -ENOENT;
+	}
+#else /* MUSB_OTG, it doesn't work */
+#ifdef CONFIG_USB_MUSB_HOST /* Host seems to be the only option that works */
+	platdata->plat.mode = MUSB_HOST;
+#else /* For that matter, MUSB_PERIPHERAL doesn't either */
+	platdata->plat.mode = MUSB_PERIPHERAL;
+#endif
+#endif
+	platdata->otg_board_data.dev = dev;
+	platdata->plat.config = &platdata->musb_config;
+	platdata->plat.platform_ops = &omap2430_ops;
+	platdata->plat.board_data = &platdata->otg_board_data;
+	return 0;
+}
+
+static int omap2430_musb_probe(struct udevice *dev)
+{
+#ifdef CONFIG_USB_MUSB_HOST
+	struct musb_host_data *host = dev_get_priv(dev);
+#endif
+	struct omap2430_musb_platdata *platdata = dev_get_platdata(dev);
+	struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
+	struct omap_musb_board_data *otg_board_data;
+	int ret;
+	void *base = dev_read_addr_ptr(dev);
+
+	priv->desc_before_addr = true;
+
+	otg_board_data = &platdata->otg_board_data;
+
+#ifdef CONFIG_USB_MUSB_HOST
+	host->host = musb_init_controller(&platdata->plat,
+					  (struct device *)otg_board_data,
+					  platdata->base);
+	if (!host->host) {
+		return -EIO;
+	}
+
+	ret = musb_lowlevel_init(host);
+#else
+	ret = musb_register(&platdata->plat,
+			  (struct device *)otg_board_data,
+			  platdata->base);
+#endif
+	return ret;
+}
+
+static int omap2430_musb_remove(struct udevice *dev)
+{
+	struct musb_host_data *host = dev_get_priv(dev);
+
+	musb_stop(host->host);
+
+	return 0;
+}
+
+static const struct udevice_id omap2430_musb_ids[] = {
+	{ .compatible = "ti,omap3-musb" },
+	{ .compatible = "ti,omap4-musb" },
+	{ }
+};
+
+U_BOOT_DRIVER(omap2430_musb) = {
+	.name	= "omap2430-musb",
+#ifdef CONFIG_USB_MUSB_HOST
+	.id		= UCLASS_USB,
+#else
+	.id		= UCLASS_USB_DEV_GENERIC,
+#endif
+	.of_match = omap2430_musb_ids,
+	.ofdata_to_platdata = omap2430_musb_ofdata_to_platdata,
+	.probe = omap2430_musb_probe,
+	.remove = omap2430_musb_remove,
+#ifdef CONFIG_USB_MUSB_HOST
+	.ops = &musb_usb_ops,
+#endif
+	.platdata_auto_alloc_size = sizeof(struct omap2430_musb_platdata),
+	.priv_auto_alloc_size = sizeof(struct musb_host_data),
+};
+
+#endif /* CONFIG_DM_USB */

commit dbf3d7f8edf071149a71962929361a5780be8737
Author: Adam Ford <aford173@gmail.com>
Date:   Fri Jul 13 15:50:02 2018 -0500

    UPSTREAM: usb: musb-new: omap2430: Remove dead code
    
    A bunch of code was encapsulated in #ifdef's whether or not
    it is building or for U-Boot.  Since this code is always building
    for U-Boot, this patch removes the dead code.
    
    Change-Id: If7d6332fb5690cc64a7379304b95221e94071d09
    Signed-off-by: Adam Ford <aford173@gmail.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 10d5ed9a54c5498992ebda56383c23a42bc70438)

diff --git a/drivers/usb/musb-new/omap2430.c b/drivers/usb/musb-new/omap2430.c
index ba22dfe6cb..cc7fa8fc37 100644
--- a/drivers/usb/musb-new/omap2430.c
+++ b/drivers/usb/musb-new/omap2430.c
@@ -9,202 +9,16 @@
  *
  * SPDX-License-Identifier:	GPL-2.0
  */
-#ifndef __UBOOT__
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/init.h>
-#include <linux/list.h>
-#include <linux/io.h>
-#include <linux/platform_device.h>
-#include <linux/dma-mapping.h>
-#include <linux/pm_runtime.h>
-#include <linux/err.h>
-#include <linux/usb/musb-omap.h>
-#else
 #include <common.h>
 #include <asm/omap_common.h>
 #include <asm/omap_musb.h>
 #include <twl4030.h>
 #include <twl6030.h>
 #include "linux-compat.h"
-#endif
 
 #include "musb_core.h"
 #include "omap2430.h"
 
-#ifndef __UBOOT__
-struct omap2430_glue {
-	struct device		*dev;
-	struct platform_device	*musb;
-	enum omap_musb_vbus_id_status status;
-	struct work_struct	omap_musb_mailbox_work;
-};
-#define glue_to_musb(g)		platform_get_drvdata(g->musb)
-
-struct omap2430_glue		*_glue;
-
-static struct timer_list musb_idle_timer;
-
-static void musb_do_idle(unsigned long _musb)
-{
-	struct musb	*musb = (void *)_musb;
-	unsigned long	flags;
-	u8	power;
-	u8	devctl;
-
-	spin_lock_irqsave(&musb->lock, flags);
-
-	switch (musb->xceiv->state) {
-	case OTG_STATE_A_WAIT_BCON:
-
-		devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
-		if (devctl & MUSB_DEVCTL_BDEVICE) {
-			musb->xceiv->state = OTG_STATE_B_IDLE;
-			MUSB_DEV_MODE(musb);
-		} else {
-			musb->xceiv->state = OTG_STATE_A_IDLE;
-			MUSB_HST_MODE(musb);
-		}
-		break;
-	case OTG_STATE_A_SUSPEND:
-		/* finish RESUME signaling? */
-		if (musb->port1_status & MUSB_PORT_STAT_RESUME) {
-			power = musb_readb(musb->mregs, MUSB_POWER);
-			power &= ~MUSB_POWER_RESUME;
-			dev_dbg(musb->controller, "root port resume stopped, power %02x\n", power);
-			musb_writeb(musb->mregs, MUSB_POWER, power);
-			musb->is_active = 1;
-			musb->port1_status &= ~(USB_PORT_STAT_SUSPEND
-						| MUSB_PORT_STAT_RESUME);
-			musb->port1_status |= USB_PORT_STAT_C_SUSPEND << 16;
-			usb_hcd_poll_rh_status(musb_to_hcd(musb));
-			/* NOTE: it might really be A_WAIT_BCON ... */
-			musb->xceiv->state = OTG_STATE_A_HOST;
-		}
-		break;
-	case OTG_STATE_A_HOST:
-		devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
-		if (devctl &  MUSB_DEVCTL_BDEVICE)
-			musb->xceiv->state = OTG_STATE_B_IDLE;
-		else
-			musb->xceiv->state = OTG_STATE_A_WAIT_BCON;
-	default:
-		break;
-	}
-	spin_unlock_irqrestore(&musb->lock, flags);
-}
-
-
-static void omap2430_musb_try_idle(struct musb *musb, unsigned long timeout)
-{
-	unsigned long		default_timeout = jiffies + msecs_to_jiffies(3);
-	static unsigned long	last_timer;
-
-	if (timeout == 0)
-		timeout = default_timeout;
-
-	/* Never idle if active, or when VBUS timeout is not set as host */
-	if (musb->is_active || ((musb->a_wait_bcon == 0)
-			&& (musb->xceiv->state == OTG_STATE_A_WAIT_BCON))) {
-		dev_dbg(musb->controller, "%s active, deleting timer\n",
-			otg_state_string(musb->xceiv->state));
-		del_timer(&musb_idle_timer);
-		last_timer = jiffies;
-		return;
-	}
-
-	if (time_after(last_timer, timeout)) {
-		if (!timer_pending(&musb_idle_timer))
-			last_timer = timeout;
-		else {
-			dev_dbg(musb->controller, "Longer idle timer already pending, ignoring\n");
-			return;
-		}
-	}
-	last_timer = timeout;
-
-	dev_dbg(musb->controller, "%s inactive, for idle timer for %lu ms\n",
-		otg_state_string(musb->xceiv->state),
-		(unsigned long)jiffies_to_msecs(timeout - jiffies));
-	mod_timer(&musb_idle_timer, timeout);
-}
-
-static void omap2430_musb_set_vbus(struct musb *musb, int is_on)
-{
-	struct usb_otg	*otg = musb->xceiv->otg;
-	u8		devctl;
-	unsigned long timeout = jiffies + msecs_to_jiffies(1000);
-	int ret = 1;
-	/* HDRC controls CPEN, but beware current surges during device
-	 * connect.  They can trigger transient overcurrent conditions
-	 * that must be ignored.
-	 */
-
-	devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
-
-	if (is_on) {
-		if (musb->xceiv->state == OTG_STATE_A_IDLE) {
-			/* start the session */
-			devctl |= MUSB_DEVCTL_SESSION;
-			musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
-			/*
-			 * Wait for the musb to set as A device to enable the
-			 * VBUS
-			 */
-			while (musb_readb(musb->mregs, MUSB_DEVCTL) & 0x80) {
-
-				cpu_relax();
-
-				if (time_after(jiffies, timeout)) {
-					dev_err(musb->controller,
-					"configured as A device timeout");
-					ret = -EINVAL;
-					break;
-				}
-			}
-
-			if (ret && otg->set_vbus)
-				otg_set_vbus(otg, 1);
-		} else {
-			musb->is_active = 1;
-			otg->default_a = 1;
-			musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
-			devctl |= MUSB_DEVCTL_SESSION;
-			MUSB_HST_MODE(musb);
-		}
-	} else {
-		musb->is_active = 0;
-
-		/* NOTE:  we're skipping A_WAIT_VFALL -> A_IDLE and
-		 * jumping right to B_IDLE...
-		 */
-
-		otg->default_a = 0;
-		musb->xceiv->state = OTG_STATE_B_IDLE;
-		devctl &= ~MUSB_DEVCTL_SESSION;
-
-		MUSB_DEV_MODE(musb);
-	}
-	musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
-
-	dev_dbg(musb->controller, "VBUS %s, devctl %02x "
-		/* otg %3x conf %08x prcm %08x */ "\n",
-		otg_state_string(musb->xceiv->state),
-		musb_readb(musb->mregs, MUSB_DEVCTL));
-}
-
-static int omap2430_musb_set_mode(struct musb *musb, u8 musb_mode)
-{
-	u8	devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
-
-	devctl |= MUSB_DEVCTL_SESSION;
-	musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
-
-	return 0;
-}
-#endif
-
 static inline void omap2430_low_level_exit(struct musb *musb)
 {
 	u32 l;
@@ -224,100 +38,14 @@ static inline void omap2430_low_level_init(struct musb *musb)
 	musb_writel(musb->mregs, OTG_FORCESTDBY, l);
 }
 
-#ifndef __UBOOT__
-void omap_musb_mailbox(enum omap_musb_vbus_id_status status)
-{
-	struct omap2430_glue	*glue = _glue;
-	struct musb		*musb = glue_to_musb(glue);
-
-	glue->status = status;
-	if (!musb) {
-		dev_err(glue->dev, "musb core is not yet ready\n");
-		return;
-	}
-
-	schedule_work(&glue->omap_musb_mailbox_work);
-}
-EXPORT_SYMBOL_GPL(omap_musb_mailbox);
-
-static void omap_musb_set_mailbox(struct omap2430_glue *glue)
-{
-	struct musb *musb = glue_to_musb(glue);
-	struct device *dev = musb->controller;
-	struct musb_hdrc_platform_data *pdata = dev->platform_data;
-	struct omap_musb_board_data *data = pdata->board_data;
-	struct usb_otg *otg = musb->xceiv->otg;
-
-	switch (glue->status) {
-	case OMAP_MUSB_ID_GROUND:
-		dev_dbg(dev, "ID GND\n");
-
-		otg->default_a = true;
-		musb->xceiv->state = OTG_STATE_A_IDLE;
-		musb->xceiv->last_event = USB_EVENT_ID;
-		if (!is_otg_enabled(musb) || musb->gadget_driver) {
-			pm_runtime_get_sync(dev);
-			usb_phy_init(musb->xceiv);
-			omap2430_musb_set_vbus(musb, 1);
-		}
-		break;
-
-	case OMAP_MUSB_VBUS_VALID:
-		dev_dbg(dev, "VBUS Connect\n");
-
-		otg->default_a = false;
-		musb->xceiv->state = OTG_STATE_B_IDLE;
-		musb->xceiv->last_event = USB_EVENT_VBUS;
-		if (musb->gadget_driver)
-			pm_runtime_get_sync(dev);
-		usb_phy_init(musb->xceiv);
-		break;
-
-	case OMAP_MUSB_ID_FLOAT:
-	case OMAP_MUSB_VBUS_OFF:
-		dev_dbg(dev, "VBUS Disconnect\n");
-
-		musb->xceiv->last_event = USB_EVENT_NONE;
-		if (is_otg_enabled(musb) || is_peripheral_enabled(musb))
-			if (musb->gadget_driver) {
-				pm_runtime_mark_last_busy(dev);
-				pm_runtime_put_autosuspend(dev);
-			}
-
-		if (data->interface_type == MUSB_INTERFACE_UTMI) {
-			if (musb->xceiv->otg->set_vbus)
-				otg_set_vbus(musb->xceiv->otg, 0);
-		}
-		usb_phy_shutdown(musb->xceiv);
-		break;
-	default:
-		dev_dbg(dev, "ID float\n");
-	}
-}
-
-
-static void omap_musb_mailbox_work(struct work_struct *mailbox_work)
-{
-	struct omap2430_glue *glue = container_of(mailbox_work,
-				struct omap2430_glue, omap_musb_mailbox_work);
-	omap_musb_set_mailbox(glue);
-}
-#endif
 
 static int omap2430_musb_init(struct musb *musb)
 {
 	u32 l;
 	int status = 0;
 	unsigned long int start;
-#ifndef __UBOOT__
-	struct device *dev = musb->controller;
-	struct omap2430_glue *glue = dev_get_drvdata(dev->parent);
-	struct musb_hdrc_platform_data *plat = dev->platform_data;
-	struct omap_musb_board_data *data = plat->board_data;
-#else
 	struct omap_musb_board_data *data =
 		(struct omap_musb_board_data *)musb->controller;
-#endif
 
 	/* Reset the controller */
 	musb_writel(musb->mregs, OTG_SYSCONFIG, SOFTRST);
@@ -335,24 +63,6 @@ static int omap2430_musb_init(struct musb *musb)
 		}
 	}
 
-#ifndef __UBOOT__
-	/* We require some kind of external transceiver, hooked
-	 * up through ULPI.  TWL4030-family PMICs include one,
-	 * which needs a driver, drivers aren't always needed.
-	 */
-	musb->xceiv = devm_usb_get_phy(dev, USB_PHY_TYPE_USB2);
-	if (IS_ERR_OR_NULL(musb->xceiv)) {
-		pr_err("HS USB OTG: no transceiver configured\n");
-		return -ENODEV;
-	}
-
-	status = pm_runtime_get_sync(dev);
-	if (status < 0) {
-		dev_err(dev, "pm_runtime_get_sync FAILED %d\n", status);
-		goto err1;
-	}
-#endif
-
 	l = musb_readl(musb->mregs, OTG_INTERFSEL);
 
 	if (data->interface_type == MUSB_INTERFACE_UTMI) {
@@ -372,64 +82,14 @@ static int omap2430_musb_init(struct musb *musb)
 			musb_readl(musb->mregs, OTG_SYSSTATUS),
 			musb_readl(musb->mregs, OTG_INTERFSEL),
 			musb_readl(musb->mregs, OTG_SIMENABLE));
-
-#ifndef __UBOOT__
-	setup_timer(&musb_idle_timer, musb_do_idle, (unsigned long) musb);
-
-	if (glue->status != OMAP_MUSB_UNKNOWN)
-		omap_musb_set_mailbox(glue);
-
-	pm_runtime_put_noidle(musb->controller);
-#endif
 	return 0;
 
 err1:
 	return status;
 }
 
-#ifndef __UBOOT__
-static void omap2430_musb_enable(struct musb *musb)
-#else
 static int omap2430_musb_enable(struct musb *musb)
-#endif
 {
-#ifndef __UBOOT__
-	u8		devctl;
-	unsigned long timeout = jiffies + msecs_to_jiffies(1000);
-	struct device *dev = musb->controller;
-	struct omap2430_glue *glue = dev_get_drvdata(dev->parent);
-	struct musb_hdrc_platform_data *pdata = dev->platform_data;
-	struct omap_musb_board_data *data = pdata->board_data;
-
-	switch (glue->status) {
-
-	case OMAP_MUSB_ID_GROUND:
-		usb_phy_init(musb->xceiv);
-		if (data->interface_type != MUSB_INTERFACE_UTMI)
-			break;
-		devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
-		/* start the session */
-		devctl |= MUSB_DEVCTL_SESSION;
-		musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
-		while (musb_readb(musb->mregs, MUSB_DEVCTL) &
-				MUSB_DEVCTL_BDEVICE) {
-			cpu_relax();
-
-			if (time_after(jiffies, timeout)) {
-				dev_err(dev, "configured as A device timeout");
-				break;
-			}
-		}
-		break;
-
-	case OMAP_MUSB_VBUS_VALID:
-		usb_phy_init(musb->xceiv);
-		break;
-
-	default:
-		break;
-	}
-#else
 #ifdef CONFIG_TWL4030_USB
 	if (twl4030_usb_ulpi_init()) {
 		serial_printf("ERROR: %s Could not initialize PHY\n",
@@ -448,18 +108,11 @@ static int omap2430_musb_enable(struct musb *musb)
 #endif
 
 	return 0;
-#endif
 }
 
 static void omap2430_musb_disable(struct musb *musb)
 {
-#ifndef __UBOOT__
-	struct device *dev = musb->controller;
-	struct omap2430_glue *glue = dev_get_drvdata(dev->parent);
 
-	if (glue->status != OMAP_MUSB_UNKNOWN)
-		usb_phy_shutdown(musb->xceiv);
-#endif
 }
 
 static int omap2430_musb_exit(struct musb *musb)
@@ -471,174 +124,9 @@ static int omap2430_musb_exit(struct musb *musb)
 	return 0;
 }
 
-#ifndef __UBOOT__
-static const struct musb_platform_ops omap2430_ops = {
-#else
 const struct musb_platform_ops omap2430_ops = {
-#endif
 	.init		= omap2430_musb_init,
 	.exit		= omap2430_musb_exit,
-
-#ifndef __UBOOT__
-	.set_mode	= omap2430_musb_set_mode,
-	.try_idle	= omap2430_musb_try_idle,
-
-	.set_vbus	= omap2430_musb_set_vbus,
-#endif
-
 	.enable		= omap2430_musb_enable,
 	.disable	= omap2430_musb_disable,
 };
-
-#ifndef __UBOOT__
-static u64 omap2430_dmamask = DMA_BIT_MASK(32);
-
-static int __devinit omap2430_probe(struct platform_device *pdev)
-{
-	struct musb_hdrc_platform_data	*pdata = pdev->dev.platform_data;
-	struct platform_device		*musb;
-	struct omap2430_glue		*glue;
-	int				ret = -ENOMEM;
-
-	glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
-	if (!glue) {
-		dev_err(&pdev->dev, "failed to allocate glue context\n");
-		goto err0;
-	}
-
-	musb = platform_device_alloc("musb-hdrc", -1);
-	if (!musb) {
-		dev_err(&pdev->dev, "failed to allocate musb device\n");
-		goto err0;
-	}
-
-	musb->dev.parent		= &pdev->dev;
-	musb->dev.dma_mask		= &omap2430_dmamask;
-	musb->dev.coherent_dma_mask	= omap2430_dmamask;
-
-	glue->dev			= &pdev->dev;
-	glue->musb			= musb;
-	glue->status			= OMAP_MUSB_UNKNOWN;
-
-	pdata->platform_ops		= &omap2430_ops;
-
-	platform_set_drvdata(pdev, glue);
-
-	/*
-	 * REVISIT if we ever have two instances of the wrapper, we will be
-	 * in big trouble
-	 */
-	_glue	= glue;
-
-	INIT_WORK(&glue->omap_musb_mailbox_work, omap_musb_mailbox_work);
-
-	ret = platform_device_add_resources(musb, pdev->resource,
-			pdev->num_resources);
-	if (ret) {
-		dev_err(&pdev->dev, "failed to add resources\n");
-		goto err1;
-	}
-
-	ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
-	if (ret) {
-		dev_err(&pdev->dev, "failed to add platform_data\n");
-		goto err1;
-	}
-
-	pm_runtime_enable(&pdev->dev);
-
-	ret = platform_device_add(musb);
-	if (ret) {
-		dev_err(&pdev->dev, "failed to register musb device\n");
-		goto err1;
-	}
-
-	return 0;
-
-err1:
-	platform_device_put(musb);
-
-err0:
-	return ret;
-}
-
-static int __devexit omap2430_remove(struct platform_device *pdev)
-{
-	struct omap2430_glue		*glue = platform_get_drvdata(pdev);
-
-	cancel_work_sync(&glue->omap_musb_mailbox_work);
-	platform_device_del(glue->musb);
-	platform_device_put(glue->musb);
-
-	return 0;
-}
-
-#ifdef CONFIG_PM
-
-static int omap2430_runtime_suspend(struct device *dev)
-{
-	struct omap2430_glue		*glue = dev_get_drvdata(dev);
-	struct musb			*musb = glue_to_musb(glue);
-
-	if (musb) {
-		musb->context.otg_interfsel = musb_readl(musb->mregs,
-				OTG_INTERFSEL);
-
-		omap2430_low_level_exit(musb);
-		usb_phy_set_suspend(musb->xceiv, 1);
-	}
-
-	return 0;
-}
-
-static int omap2430_runtime_resume(struct device *dev)
-{
-	struct omap2430_glue		*glue = dev_get_drvdata(dev);
-	struct musb			*musb = glue_to_musb(glue);
-
-	if (musb) {
-		omap2430_low_level_init(musb);
-		musb_writel(musb->mregs, OTG_INTERFSEL,
-				musb->context.otg_interfsel);
-
-		usb_phy_set_suspend(musb->xceiv, 0);
-	}
-
-	return 0;
-}
-
-static struct dev_pm_ops omap2430_pm_ops = {
-	.runtime_suspend = omap2430_runtime_suspend,
-	.runtime_resume = omap2430_runtime_resume,
-};
-
-#define DEV_PM_OPS	(&omap2430_pm_ops)
-#else
-#define DEV_PM_OPS	NULL
-#endif
-
-static struct platform_driver omap2430_driver = {
-	.probe		= omap2430_probe,
-	.remove		= __devexit_p(omap2430_remove),
-	.driver		= {
-		.name	= "musb-omap2430",
-		.pm	= DEV_PM_OPS,
-	},
-};
-
-MODULE_DESCRIPTION("OMAP2PLUS MUSB Glue Layer");
-MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
-MODULE_LICENSE("GPL v2");
-
-static int __init omap2430_init(void)
-{
-	return platform_driver_register(&omap2430_driver);
-}
-subsys_initcall(omap2430_init);
-
-static void __exit omap2430_exit(void)
-{
-	platform_driver_unregister(&omap2430_driver);
-}
-module_exit(omap2430_exit);
-#endif

commit 56578c1b0958eb3d40fc5e6c37e9c9149896c813
Author: Seung-Woo Kim <sw0312.kim@samsung.com>
Date:   Mon Jun 4 15:53:39 2018 +0900

    UPSTREAM: gadget: f_thor: fix hang-up with ctrl-c
    
    After the commit 6aae84769a0b ("gadget: f_thor: Fix memory leaks of
    usb request and its buffer"), there is hang-up with ctrl-c in some
    udc. It is because req of out_ep is freed before out_ep is disabled.
    Fix hang-up with ctrl-c by disabling ep before free req of the ep.
    
    Change-Id: I39257664aa47501172a217c39727a9f1ef66bc17
    Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit c194bdf226030e45bcb2db3dcbb2d72e5052820a)

diff --git a/drivers/usb/gadget/f_thor.c b/drivers/usb/gadget/f_thor.c
index 50332f8d4d..4a36cd4709 100644
--- a/drivers/usb/gadget/f_thor.c
+++ b/drivers/usb/gadget/f_thor.c
@@ -878,14 +878,14 @@ static void thor_func_disable(struct usb_function *f)
 
 	/* Avoid freeing memory when ep is still claimed */
 	if (dev->in_ep->driver_data) {
-		free_ep_req(dev->in_ep, dev->in_req);
 		usb_ep_disable(dev->in_ep);
+		free_ep_req(dev->in_ep, dev->in_req);
 		dev->in_ep->driver_data = NULL;
 	}
 
 	if (dev->out_ep->driver_data) {
-		usb_ep_free_request(dev->out_ep, dev->out_req);
 		usb_ep_disable(dev->out_ep);
+		usb_ep_free_request(dev->out_ep, dev->out_req);
 		dev->out_ep->driver_data = NULL;
 	}
 

commit b56d3e0f20d37e75b227cf82556c399c272340b5
Author: Emmanuel Vadot <manu@freebsd.org>
Date:   Mon Jul 2 14:34:23 2018 +0200

    UPSTREAM: usb: dwc2: Add brcm,bcm2708-usb compatible
    
    When using CONFIG_OF_BOARD on rpi to use the dtb provided by the
    RaspberryPi Fundation, the compatible string isn't the same, resulting
    in not-functional usb from u-boot.
    
    Change-Id: I1e780fe22dac4a19f099c6cf071c6be5e8eafea0
    Signed-off-by: Oleksandr Tymoshenko <gonzo@FreeBSD.org>
    Signed-off-by: Emmanuel Vadot <manu@freebsd.org>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit ff5d5cc2331033c8a6987bb644827b52484160d9)

diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
index d90e036897..d7fe42a385 100644
--- a/drivers/usb/host/dwc2.c
+++ b/drivers/usb/host/dwc2.c
@@ -1321,6 +1321,7 @@ struct dm_usb_ops dwc2_usb_ops = {
 
 static const struct udevice_id dwc2_usb_ids[] = {
 	{ .compatible = "brcm,bcm2835-usb" },
+	{ .compatible = "brcm,bcm2708-usb" },
 	{ .compatible = "snps,dwc2" },
 	{ }
 };

commit 73b4df6a98d2d973cbf1e2b18947abbdbdb82bc1
Author: Andrew Thomas <andrew.thomas@oracle.com>
Date:   Mon Jun 18 11:56:06 2018 -0700

    UPSTREAM: dwc2 USB controller hangs with lan78xx
    
    This bug is the combination of dwc2 USB controller and lan78xx
    USB ethernet controller, which is the combination in use on
    the Raspberry Pi Model 3 B+.
    
    When the host attempts to receive a packet, but a packet has not
    arrived, the lan78xx controller responds by setting BIR
    (Bulk-In Empty Response) to NAK. Unfortunately, this hangs
    the USB controller and requires the USB controller to
    be reset.
    
    The fix proposed is to have the lan78xx controller respond
    by setting BIR to ZLP.
    
    Change-Id: I42751eefc9b2f449f550f129a76ab1ce4288d184
    Signed-off-by: Andrew Thomas <andrew.thomas@oracle.com>
    Tested-by: Peter Robinson <pbrobinson@gmail.com>
    Reviewed-by: Alexander Graf <agraf@suse.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit af15946aa081dbcd0bec7d507a2b2db4e6b6cda5)

diff --git a/drivers/usb/eth/lan78xx.c b/drivers/usb/eth/lan78xx.c
index d1e61c32da..11431381cb 100644
--- a/drivers/usb/eth/lan78xx.c
+++ b/drivers/usb/eth/lan78xx.c
@@ -297,7 +297,7 @@ static int lan78xx_basic_reset(struct usb_device *udev,
 	ret = lan7x_read_reg(udev, LAN78XX_USB_CFG0, &val);
 	if (ret)
 		return ret;
-	val |= LAN78XX_USB_CFG0_BIR;
+	val &= ~LAN78XX_USB_CFG0_BIR;
 	return lan7x_write_reg(udev, LAN78XX_USB_CFG0, val);
 }
 

commit 4cdd770b03b4bc5eff048ef614f9dc82e75d7f28
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Sun Jun 3 19:04:14 2018 -0700

    UPSTREAM: usb: xhci-pci: Fix compiler warning
    
    This fixes the following compiler warning:
    
      "warning: cast from pointer to integer of different size
      [-Wpointer-to-int-cast]"
    
    Change-Id: I4e47b2bcb02dbc59ccc4f471d86bcc6d901eeec7
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 9fddf6c7dd9dca493969d4ebd5e5fc2b2e21be9c)

diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c
index e4a0ef4a1a..41526515d6 100644
--- a/drivers/usb/host/xhci-pci.c
+++ b/drivers/usb/host/xhci-pci.c
@@ -24,9 +24,8 @@ static void xhci_pci_init(struct udevice *dev, struct xhci_hccr **ret_hccr,
 	hcor = (struct xhci_hcor *)((uintptr_t) hccr +
 			HC_LENGTH(xhci_readl(&hccr->cr_capbase)));
 
-	debug("XHCI-PCI init hccr 0x%x and hcor 0x%x hc_length %d\n",
-	      (u32)hccr, (u32)hcor,
-	      (u32)HC_LENGTH(xhci_readl(&hccr->cr_capbase)));
+	debug("XHCI-PCI init hccr %p and hcor %p hc_length %d\n",
+	      hccr, hcor, (u32)HC_LENGTH(xhci_readl(&hccr->cr_capbase)));
 
 	*ret_hccr = hccr;
 	*ret_hcor = hcor;

commit 391af51a3531ee4bddb1594b9a2bebc075fef8f9
Author: Michal Simek <michal.simek@xilinx.com>
Date:   Thu May 3 09:30:16 2018 +0200

    UPSTREAM: usb: xhci: zynqmp: Fix header location
    
    There is no reason to specify header with full soc name.
    Symlink is setup automatically (arch -> arch-zynqmp)
    
    Change-Id: I00fcdab4aafd7f4a6a32c6258bedde4af2212c6a
    Signed-off-by: Michal Simek <michal.simek@xilinx.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit b168591c899e869dc4fcd71752cbe32c91355348)

diff --git a/drivers/usb/host/xhci-zynqmp.c b/drivers/usb/host/xhci-zynqmp.c
index 979c7ce35e..3c45859a3d 100644
--- a/drivers/usb/host/xhci-zynqmp.c
+++ b/drivers/usb/host/xhci-zynqmp.c
@@ -14,7 +14,7 @@
 #include <dm.h>
 #include <usb.h>
 #include <linux/errno.h>
-#include <asm/arch-zynqmp/hardware.h>
+#include <asm/arch/hardware.h>
 #include <linux/compat.h>
 #include <linux/usb/dwc3.h>
 #include "xhci.h"

commit 2ec502ebe9341f3bffadfedd940cbc578ab9943e
Author: Seung-Woo Kim <sw0312.kim@samsung.com>
Date:   Fri May 25 14:21:01 2018 +0900

    UPSTREAM: gadget: f_thor: Fix memory leaks of usb request and its buffer
    
    There are memory leaks of usb request and its buffer for ep0,
    in_ep, and out ep. Fix memory leaks of usb request and its buffer.
    
    Change-Id: Ia0d3c872c06b16057d07ff1dfd9331a7ebef588f
    Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 6aae84769a0be095daf94d34fdd61b12d59a7022)

diff --git a/drivers/usb/gadget/f_thor.c b/drivers/usb/gadget/f_thor.c
index 59375ca270..50332f8d4d 100644
--- a/drivers/usb/gadget/f_thor.c
+++ b/drivers/usb/gadget/f_thor.c
@@ -621,22 +621,6 @@ static void thor_rx_tx_complete(struct usb_ep *ep, struct usb_request *req)
 	      status, req->actual, req->length);
 }
 
-static struct usb_request *thor_start_ep(struct usb_ep *ep)
-{
-	struct usb_request *req;
-
-	req = alloc_ep_req(ep, THOR_PACKET_SIZE);
-	debug("%s: ep:%p req:%p\n", __func__, ep, req);
-
-	if (!req)
-		return NULL;
-
-	memset(req->buf, 0, req->length);
-	req->complete = thor_rx_tx_complete;
-
-	return req;
-}
-
 static void thor_setup_complete(struct usb_ep *ep, struct usb_request *req)
 {
 	if (req->status || req->actual != req->length)
@@ -753,6 +737,13 @@ int thor_handle(void)
 	return 0;
 }
 
+static void free_ep_req(struct usb_ep *ep, struct usb_request *req)
+{
+	if (req->buf)
+		free(req->buf);
+	usb_ep_free_request(ep, req);
+}
+
 static int thor_func_bind(struct usb_configuration *c, struct usb_function *f)
 {
 	struct usb_gadget *gadget = c->cdev->gadget;
@@ -861,21 +852,18 @@ static int thor_func_bind(struct usb_configuration *c, struct usb_function *f)
 	return 0;
 
  fail:
+	if (dev->req)
+		free_ep_req(gadget->ep0, dev->req);
 	free(dev);
 	return status;
 }
 
-static void free_ep_req(struct usb_ep *ep, struct usb_request *req)
-{
-	free(req->buf);
-	usb_ep_free_request(ep, req);
-}
-
 static void thor_unbind(struct usb_configuration *c, struct usb_function *f)
 {
 	struct f_thor *f_thor = func_to_thor(f);
 	struct thor_dev *dev = f_thor->dev;
 
+	free_ep_req(dev->gadget->ep0, dev->req);
 	free(dev);
 	memset(thor_func, 0, sizeof(*thor_func));
 	thor_func = NULL;
@@ -896,8 +884,6 @@ static void thor_func_disable(struct usb_function *f)
 	}
 
 	if (dev->out_ep->driver_data) {
-		free(dev->out_req->buf);
-		dev->out_req->buf = NULL;
 		usb_ep_free_request(dev->out_ep, dev->out_req);
 		usb_ep_disable(dev->out_ep);
 		dev->out_ep->driver_data = NULL;
@@ -925,16 +911,17 @@ static int thor_eps_setup(struct usb_function *f)
 
 	result = usb_ep_enable(ep, d);
 	if (result)
-		goto exit;
+		goto err;
 
 	ep->driver_data = cdev; /* claim */
-	req = thor_start_ep(ep);
+	req = alloc_ep_req(ep, THOR_PACKET_SIZE);
 	if (!req) {
-		usb_ep_disable(ep);
 		result = -EIO;
-		goto exit;
+		goto err_disable_in_ep;
 	}
 
+	memset(req->buf, 0, req->length);
+	req->complete = thor_rx_tx_complete;
 	dev->in_req = req;
 	ep = dev->out_ep;
 	d = ep_desc(gadget, &hs_out_desc, &fs_out_desc);
@@ -942,22 +929,34 @@ static int thor_eps_setup(struct usb_function *f)
 
 	result = usb_ep_enable(ep, d);
 	if (result)
-		goto exit;
+		goto err_free_in_req;
 
 	ep->driver_data = cdev; /* claim */
-	req = thor_start_ep(ep);
+	req = usb_ep_alloc_request(ep, 0);
 	if (!req) {
-		usb_ep_disable(ep);
 		result = -EIO;
-		goto exit;
+		goto err_disable_out_ep;
 	}
 
+	req->complete = thor_rx_tx_complete;
 	dev->out_req = req;
 	/* ACM control EP */
 	ep = dev->int_ep;
 	ep->driver_data = cdev;	/* claim */
 
- exit:
+	return 0;
+
+ err_disable_out_ep:
+	usb_ep_disable(dev->out_ep);
+
+ err_free_in_req:
+	free_ep_req(dev->in_ep, dev->in_req);
+	dev->in_req = NULL;
+
+ err_disable_in_ep:
+	usb_ep_disable(dev->in_ep);
+
+ err:
 	return result;
 }
 

commit 54ed217144b4dc67a5fa4581a6e3a0c26922930f
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Thu May 24 17:11:57 2018 +0200

    UPSTREAM: rockchip: xhci: remove DTS parsing for PHY (which is unused)
    
    The xhci wrapper-driver for Rockchip searches the DTS to find its
    child node compatbile with 'rockchip,rk3399-usb3-phy' to retrieve the
    base-address of the PHY.  However, this is currently broken (and
    always has been), returning NULL.  However, the (wrongly) retrieved
    base-address is never used.
    
    We thus remove this code for now.
    
    Change-Id: Ie62ad30b6faae8eb8f483aa9d9d43923ffee6020
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit afa314d3a37797bd88c9a379a6fa150e6829fdf9)

diff --git a/drivers/usb/host/xhci-rockchip.c b/drivers/usb/host/xhci-rockchip.c
index b1f9884273..002bd5819b 100644
--- a/drivers/usb/host/xhci-rockchip.c
+++ b/drivers/usb/host/xhci-rockchip.c
@@ -20,7 +20,6 @@ DECLARE_GLOBAL_DATA_PTR;
 
 struct rockchip_xhci_platdata {
 	fdt_addr_t hcd_base;
-	fdt_addr_t phy_base;
 	struct udevice *vbus_supply;
 };
 
@@ -38,7 +37,6 @@ struct rockchip_xhci {
 static int xhci_usb_ofdata_to_platdata(struct udevice *dev)
 {
 	struct rockchip_xhci_platdata *plat = dev_get_platdata(dev);
-	struct udevice *child;
 	int ret = 0;
 
 	/*
@@ -50,20 +48,6 @@ static int xhci_usb_ofdata_to_platdata(struct udevice *dev)
 		return -ENXIO;
 	}
 
-	/* Get the base address for usbphy from the device node */
-	for (device_find_first_child(dev, &child); child;
-	     device_find_next_child(&child)) {
-		if (!device_is_compatible(child, "rockchip,rk3399-usb3-phy"))
-			continue;
-		plat->phy_base = devfdt_get_addr(child);
-		break;
-	}
-
-	if (plat->phy_base == FDT_ADDR_T_NONE) {
-		pr_err("Can't get the usbphy register address\n");
-		return -ENXIO;
-	}
-
 	/* Vbus regulator */
 	ret = device_get_supply_regulator(dev, "vbus-supply",
 					  &plat->vbus_supply);

commit affcda62ecce036087febeb2a6981b90e48f1f3a
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Wed May 23 23:40:50 2018 -0700

    UPSTREAM: usb: xhci: Handle endianness in xhci_set_configuration()
    
    In xhci_set_configuration(), 'Context Entries' field in the slot
    context was cleared with mask LAST_CTX_MASK, but it should have
    taken the endianness into consideration.
    
    Change-Id: I5d6b94d213751151b7b8180d01e88c5ce5bf9f5a
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit e40406603fe22a5b18d7e8ac7a2eb0f2d2b13cf1)

diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index 20005783b5..c737b0659e 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -537,7 +537,7 @@ static int xhci_set_configuration(struct usb_device *udev)
 	/* slot context */
 	xhci_slot_copy(ctrl, in_ctx, out_ctx);
 	slot_ctx = xhci_get_slot_ctx(ctrl, in_ctx);
-	slot_ctx->dev_info &= ~(LAST_CTX_MASK);
+	slot_ctx->dev_info &= ~(cpu_to_le32(LAST_CTX_MASK));
 	slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(max_ep_flag + 1) | 0);
 
 	xhci_endpoint_copy(ctrl, in_ctx, out_ctx, 0);

commit fc48a70cf14b9a211979cb4e187004d4a7a44591
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Wed May 23 23:40:49 2018 -0700

    UPSTREAM: usb: xhci: Fix config fail of FS hub behind a HS hub with MTT
    
    If a full speed hub connects to a high speed hub which supports MTT,
    the MTT field of its slot context will be set to 1 when xHCI driver
    setups an xHCI virtual device in xhci_setup_addressable_virt_dev().
    Once usb core fetch its hub descriptor, and need to update the xHC's
    internal data structures for the device, the HUB field of its slot
    context will be set to 1 too, meanwhile MTT is also set before, this
    will cause configure endpoint command fail. In the case, we should
    clear MTT to 0 for full speed hub according to section 6.2.2.
    
    This keeps in sync with Linux kernel commit:
      096b110: usb: xhci: fix config fail of FS hub behind a HS hub with MTT
    
    Change-Id: I48538e3d150f79f9bca591b0a4527cf9c5d7a2ba
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit eaaefb066c86f08fb285e73fb8c5fbf497be6b57)

diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index 0671b925dc..20005783b5 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -1436,8 +1436,15 @@ static int xhci_update_hub_device(struct udevice *dev, struct usb_device *udev)
 
 	/* Update hub related fields */
 	slot_ctx->dev_info |= cpu_to_le32(DEV_HUB);
-	if (hub->tt.multi && udev->speed == USB_SPEED_HIGH)
+	/*
+	 * refer to section 6.2.2: MTT should be 0 for full speed hub,
+	 * but it may be already set to 1 when setup an xHCI virtual
+	 * device, so clear it anyway.
+	 */
+	if (hub->tt.multi)
 		slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
+	else if (udev->speed == USB_SPEED_FULL)
+		slot_ctx->dev_info &= cpu_to_le32(~DEV_MTT);
 	slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(udev->maxchild));
 	/*
 	 * Set TT think time - convert from ns to FS bit times.

commit 02d2355842ab19b04c727e5ed963c7537d91858c
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Wed May 23 23:40:48 2018 -0700

    UPSTREAM: usb: xhci: Initialize dev_state to 0 in the input slot context
    
    Per xHCI spec chapter 6.2.2 table 6-7, as input, software shall
    initialize the dev_state field to '0'. Though this does not seem
    to cause any issue with most xHC implementations, let's do this
    to conform with the spec.
    
    Change-Id: I604a4c9edb9b88b25ba96e16d6f7013bee64df8c
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Tested-by: Marek Vasut <marek.vasut@gmail.com>
    Tested-by: Matthias Blankertz <matthias.blankertz@cetitec.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit ae751b060e8cee3f9c48112898cd3e31ee6c0734)

diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index bbfece208b..0671b925dc 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -1453,6 +1453,7 @@ static int xhci_update_hub_device(struct udevice *dev, struct usb_device *udev)
 		think_time = (think_time / 666) - 1;
 	if (udev->speed == USB_SPEED_HIGH)
 		slot_ctx->tt_info |= cpu_to_le32(TT_THINK_TIME(think_time));
+	slot_ctx->dev_state = 0;
 
 	return xhci_configure_endpoints(udev, false);
 }

commit d222f63d8ebfd6c6731a49144102442b8e9127f9
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Wed May 23 23:40:47 2018 -0700

    UPSTREAM: usb: xhci: Set accurate add context flags when updating hub attributes
    
    If a USB 3.0 hub is plugged into the root port of the xHC, the xHCI
    driver will issue a 'Configure Endpoint' command to the xHC for it
    to update its internal data structure for this hub device. The hub
    attributes are in the slot context so we need tell xHC to update the
    slot context by setting the add context flags of the input control
    context to only cover the slot context.
    
    At present the add context flags is or'ed with the slot context bit,
    but it should really be accurately set to the slot context, as the
    variable that holds the value of the add context flags comes from
    whatever was set in the last command execution, which may contain
    additional contexts that 'Configure Endpoint' command should not
    touch. Some xHC implementations like x86 don't complain such, but
    it was observed on Renesas RCar Gen3 platform that the RCar xHC
    complains with a 'TRB error' completion codes as the response.
    
    Change-Id: I5141a85024ea60c3dbb7bde5b6a6811142ce1f8b
    Reported-by: Marek Vasut <marek.vasut@gmail.com>
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Tested-by: Marek Vasut <marek.vasut@gmail.com>
    Tested-by: Matthias Blankertz <matthias.blankertz@cetitec.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 793c819c6e2168110ad7cfca0349738c79d79a1f)

diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index 4673738d1e..bbfece208b 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -1425,7 +1425,7 @@ static int xhci_update_hub_device(struct udevice *dev, struct usb_device *udev)
 
 	ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
 	/* Initialize the input context control */
-	ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
+	ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
 	ctrl_ctx->drop_flags = 0;
 
 	xhci_inval_cache((uintptr_t)out_ctx->bytes, out_ctx->size);

commit 2e8806dedd513a1ffb194ee9b2b2069ad5623d75
Author: Matthias Blankertz <matthias.blankertz@cetitec.com>
Date:   Tue May 22 15:24:48 2018 +0200

    UPSTREAM: usb: xhci-rcar: deregister before deactivating clock
    
    During the execution of xhci_deregister xHCI registers are accessed. If
    the clock is already deactivated when xhci_deregister is called this can
    lead to undefined behavior. Change the order to deregister the device
    before deactivating the clock.
    
    Change-Id: I038a8b46e8ebf7733dc850aaeb2915add0fc79ce
    Signed-off-by: Matthias Blankertz <matthias.blankertz@cetitec.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 3f484226793166c75bd56784832d4c1a84061ad5)

diff --git a/drivers/usb/host/xhci-rcar.c b/drivers/usb/host/xhci-rcar.c
index b6f7ba8fe0..c4a6f2a91e 100644
--- a/drivers/usb/host/xhci-rcar.c
+++ b/drivers/usb/host/xhci-rcar.c
@@ -130,12 +130,15 @@ err_clk:
 
 static int xhci_rcar_deregister(struct udevice *dev)
 {
+	int ret;
 	struct rcar_xhci_platdata *plat = dev_get_platdata(dev);
 
+	ret = xhci_deregister(dev);
+
 	clk_disable(&plat->clk);
 	clk_free(&plat->clk);
 
-	return xhci_deregister(dev);
+	return ret;
 }
 
 static int xhci_rcar_ofdata_to_platdata(struct udevice *dev)

commit a63699a6143a7bda022d4016663378d99c3b31e7
Author: Jagan Teki <jagan@amarulasolutions.com>
Date:   Mon May 7 13:03:17 2018 +0530

    UPSTREAM: usb: sunxi: Simplify ccm reg base code
    
    Move struct sunxi_ccm_reg pointer to private structure
    so-that accessing ccm reg base become more proper way
    and avoid local initialization in each function.
    
    Change-Id: Ic3b1456368fc6395b09a93a5535191bc78e7c0b7
    Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
    Acked-by: Jun Nie <jun.nie@linaro.org>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 831cc98b1f8cf81cf34185e34b2021e2766eb4d8)

diff --git a/drivers/usb/host/ehci-sunxi.c b/drivers/usb/host/ehci-sunxi.c
index 6ecb7c4d12..ed9763c63d 100644
--- a/drivers/usb/host/ehci-sunxi.c
+++ b/drivers/usb/host/ehci-sunxi.c
@@ -27,19 +27,23 @@
 
 struct ehci_sunxi_priv {
 	struct ehci_ctrl ehci;
+	struct sunxi_ccm_reg *ccm;
 	int ahb_gate_mask; /* Mask of ahb_gate0 clk gate bits for this hcd */
 	int phy_index;     /* Index of the usb-phy attached to this hcd */
 };
 
 static int ehci_usb_probe(struct udevice *dev)
 {
-	struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
 	struct usb_platdata *plat = dev_get_platdata(dev);
 	struct ehci_sunxi_priv *priv = dev_get_priv(dev);
 	struct ehci_hccr *hccr = (struct ehci_hccr *)devfdt_get_addr(dev);
 	struct ehci_hcor *hcor;
 	int extra_ahb_gate_mask = 0;
 
+	priv->ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+	if (IS_ERR(priv->ccm))
+		return PTR_ERR(priv->ccm);
+
 	/*
 	 * This should go away once we've moved to the driver model for
 	 * clocks resp. phys.
@@ -53,10 +57,10 @@ static int ehci_usb_probe(struct udevice *dev)
 	extra_ahb_gate_mask <<= priv->phy_index * AHB_CLK_DIST;
 	priv->phy_index++; /* Non otg phys start at 1 */
 
-	setbits_le32(&ccm->ahb_gate0,
+	setbits_le32(&priv->ccm->ahb_gate0,
 		     priv->ahb_gate_mask | extra_ahb_gate_mask);
 #ifdef CONFIG_SUNXI_GEN_SUN6I
-	setbits_le32(&ccm->ahb_reset0_cfg,
+	setbits_le32(&priv->ccm->ahb_reset0_cfg,
 		     priv->ahb_gate_mask | extra_ahb_gate_mask);
 #endif
 
@@ -71,7 +75,6 @@ static int ehci_usb_probe(struct udevice *dev)
 
 static int ehci_usb_remove(struct udevice *dev)
 {
-	struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
 	struct ehci_sunxi_priv *priv = dev_get_priv(dev);
 	int ret;
 
@@ -82,9 +85,9 @@ static int ehci_usb_remove(struct udevice *dev)
 	sunxi_usb_phy_exit(priv->phy_index);
 
 #ifdef CONFIG_SUNXI_GEN_SUN6I
-	clrbits_le32(&ccm->ahb_reset0_cfg, priv->ahb_gate_mask);
+	clrbits_le32(&priv->ccm->ahb_reset0_cfg, priv->ahb_gate_mask);
 #endif
-	clrbits_le32(&ccm->ahb_gate0, priv->ahb_gate_mask);
+	clrbits_le32(&priv->ccm->ahb_gate0, priv->ahb_gate_mask);
 
 	return 0;
 }
diff --git a/drivers/usb/host/ohci-sunxi.c b/drivers/usb/host/ohci-sunxi.c
index 133774f6e6..35efa88795 100644
--- a/drivers/usb/host/ohci-sunxi.c
+++ b/drivers/usb/host/ohci-sunxi.c
@@ -26,6 +26,7 @@
 #endif
 
 struct ohci_sunxi_priv {
+	struct sunxi_ccm_reg *ccm;
 	ohci_t ohci;
 	int ahb_gate_mask; /* Mask of ahb_gate0 clk gate bits for this hcd */
 	int usb_gate_mask; /* Mask of usb_clk_cfg clk gate bits for this hcd */
@@ -34,12 +35,15 @@ struct ohci_sunxi_priv {
 
 static int ohci_usb_probe(struct udevice *dev)
 {
-	struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
 	struct usb_bus_priv *bus_priv = dev_get_uclass_priv(dev);
 	struct ohci_sunxi_priv *priv = dev_get_priv(dev);
 	struct ohci_regs *regs = (struct ohci_regs *)devfdt_get_addr(dev);
 	int extra_ahb_gate_mask = 0;
 
+	priv->ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+	if (IS_ERR(priv->ccm))
+		return PTR_ERR(priv->ccm);
+
 	bus_priv->companion = true;
 
 	/*
@@ -57,11 +61,11 @@ static int ohci_usb_probe(struct udevice *dev)
 	priv->usb_gate_mask <<= priv->phy_index;
 	priv->phy_index++; /* Non otg phys start at 1 */
 
-	setbits_le32(&ccm->ahb_gate0,
+	setbits_le32(&priv->ccm->ahb_gate0,
 		     priv->ahb_gate_mask | extra_ahb_gate_mask);
-	setbits_le32(&ccm->usb_clk_cfg, priv->usb_gate_mask);
+	setbits_le32(&priv->ccm->usb_clk_cfg, priv->usb_gate_mask);
 #ifdef CONFIG_SUNXI_GEN_SUN6I
-	setbits_le32(&ccm->ahb_reset0_cfg,
+	setbits_le32(&priv->ccm->ahb_reset0_cfg,
 		     priv->ahb_gate_mask | extra_ahb_gate_mask);
 #endif
 
@@ -73,7 +77,6 @@ static int ohci_usb_probe(struct udevice *dev)
 
 static int ohci_usb_remove(struct udevice *dev)
 {
-	struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
 	struct ohci_sunxi_priv *priv = dev_get_priv(dev);
 	int ret;
 
@@ -84,10 +87,10 @@ static int ohci_usb_remove(struct udevice *dev)
 	sunxi_usb_phy_exit(priv->phy_index);
 
 #ifdef CONFIG_SUNXI_GEN_SUN6I
-	clrbits_le32(&ccm->ahb_reset0_cfg, priv->ahb_gate_mask);
+	clrbits_le32(&priv->ccm->ahb_reset0_cfg, priv->ahb_gate_mask);
 #endif
-	clrbits_le32(&ccm->usb_clk_cfg, priv->usb_gate_mask);
-	clrbits_le32(&ccm->ahb_gate0, priv->ahb_gate_mask);
+	clrbits_le32(&priv->ccm->usb_clk_cfg, priv->usb_gate_mask);
+	clrbits_le32(&priv->ccm->ahb_gate0, priv->ahb_gate_mask);
 
 	return 0;
 }
diff --git a/drivers/usb/musb-new/sunxi.c b/drivers/usb/musb-new/sunxi.c
index aedc24b937..c77bde0354 100644
--- a/drivers/usb/musb-new/sunxi.c
+++ b/drivers/usb/musb-new/sunxi.c
@@ -76,6 +76,13 @@
  * From usbc/usbc.c
  ******************************************************************************/
 
+struct sunxi_glue {
+	struct musb_host_data mdata;
+	struct sunxi_ccm_reg *ccm;
+	struct device dev;
+};
+#define to_sunxi_glue(d)	container_of(d, struct sunxi_glue, dev)
+
 static u32 USBC_WakeUp_ClearChangeDetect(u32 reg_val)
 {
 	u32 temp = reg_val;
@@ -256,15 +263,15 @@ static void sunxi_musb_disable(struct musb *musb)
 
 static int sunxi_musb_init(struct musb *musb)
 {
-	struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+	struct sunxi_glue *glue = to_sunxi_glue(musb->controller);
 
 	pr_debug("%s():\n", __func__);
 
 	musb->isr = sunxi_musb_interrupt;
 
-	setbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_USB0);
+	setbits_le32(&glue->ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_USB0);
 #ifdef CONFIG_SUNXI_GEN_SUN6I
-	setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_USB0);
+	setbits_le32(&glue->ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_USB0);
 #endif
 	sunxi_usb_phy_init(0);
 
@@ -310,7 +317,8 @@ static struct musb_hdrc_platform_data musb_plat = {
 
 static int musb_usb_probe(struct udevice *dev)
 {
-	struct musb_host_data *host = dev_get_priv(dev);
+	struct sunxi_glue *glue = dev_get_priv(dev);
+	struct musb_host_data *host = &glue->mdata;
 	struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
 	void *base = dev_read_addr_ptr(dev);
 	int ret;
@@ -318,10 +326,14 @@ static int musb_usb_probe(struct udevice *dev)
 	if (!base)
 		return -EINVAL;
 
+	glue->ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+	if (IS_ERR(glue->ccm))
+		return PTR_ERR(glue->ccm);
+
 	priv->desc_before_addr = true;
 
 #ifdef CONFIG_USB_MUSB_HOST
-	host->host = musb_init_controller(&musb_plat, NULL, base);
+	host->host = musb_init_controller(&musb_plat, &glue->dev, base);
 	if (!host->host)
 		return -EIO;
 
@@ -329,7 +341,7 @@ static int musb_usb_probe(struct udevice *dev)
 	if (!ret)
 		printf("Allwinner mUSB OTG (Host)\n");
 #else
-	ret = musb_register(&musb_plat, NULL, base);
+	ret = musb_register(&musb_plat, &glue->dev, base);
 	if (!ret)
 		printf("Allwinner mUSB OTG (Peripheral)\n");
 #endif
@@ -339,16 +351,16 @@ static int musb_usb_probe(struct udevice *dev)
 
 static int musb_usb_remove(struct udevice *dev)
 {
-	struct musb_host_data *host = dev_get_priv(dev);
-	struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+	struct sunxi_glue *glue = dev_get_priv(dev);
+	struct musb_host_data *host = &glue->mdata;
 
 	musb_stop(host->host);
 
 	sunxi_usb_phy_exit(0);
 #ifdef CONFIG_SUNXI_GEN_SUN6I
-	clrbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_USB0);
+	clrbits_le32(&glue->ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_USB0);
 #endif
-	clrbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_USB0);
+	clrbits_le32(&glue->ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_USB0);
 
 	free(host->host);
 	host->host = NULL;
@@ -378,5 +390,5 @@ U_BOOT_DRIVER(usb_musb) = {
 	.ops		= &musb_usb_ops,
 #endif
 	.platdata_auto_alloc_size = sizeof(struct usb_platdata),
-	.priv_auto_alloc_size = sizeof(struct musb_host_data),
+	.priv_auto_alloc_size = sizeof(struct sunxi_glue),
 };

commit e4371f1f169f09d6702344c129868ea94f0d6dfd
Author: Michal Simek <michal.simek@xilinx.com>
Date:   Fri May 18 13:15:09 2018 +0200

    UPSTREAM: usb: xhci: zynqmp: Remove support for !DM_USB
    
    Switch to DM_USB was done and there is no need to keep !DM_USB code in
    tree.
    
    Change-Id: Ib39e8431dbad9fa330d70235bb48bfb03d942f1b
    Signed-off-by: Michal Simek <michal.simek@xilinx.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit d067624c47bf15b9b5b716ae8be510fa1fb615a2)

diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 8f0a00e479..969b1e5a99 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -66,6 +66,7 @@ config USB_XHCI_RCAR
 config USB_XHCI_ZYNQMP
 	bool "Support for Xilinx ZynqMP on-chip xHCI USB controller"
 	depends on ARCH_ZYNQMP
+	depends on DM_USB
 	help
 	  Enables support for the on-chip xHCI controller on Xilinx ZynqMP SoCs.
 
diff --git a/drivers/usb/host/xhci-zynqmp.c b/drivers/usb/host/xhci-zynqmp.c
index 9eafd11a79..979c7ce35e 100644
--- a/drivers/usb/host/xhci-zynqmp.c
+++ b/drivers/usb/host/xhci-zynqmp.c
@@ -58,23 +58,15 @@ DECLARE_GLOBAL_DATA_PTR;
 #define USBOTGSS_IRQ_SET_1_DMADISABLECLR_EN	BIT(17)
 
 struct zynqmp_xhci {
-#ifdef CONFIG_DM_USB
 	struct usb_platdata usb_plat;
-#endif
 	struct xhci_ctrl ctrl;
 	struct xhci_hccr *hcd;
 	struct dwc3 *dwc3_reg;
 };
 
-#ifdef CONFIG_DM_USB
 struct zynqmp_xhci_platdata {
 	fdt_addr_t hcd_base;
 };
-#else
-static struct zynqmp_xhci zynqmp_xhci;
-
-unsigned long ctr_addr[] = CONFIG_ZYNQMP_XHCI_LIST;
-#endif
 
 static int zynqmp_xhci_core_init(struct zynqmp_xhci *zynqmp_xhci)
 {
@@ -92,42 +84,6 @@ static int zynqmp_xhci_core_init(struct zynqmp_xhci *zynqmp_xhci)
 	return ret;
 }
 
-#ifndef CONFIG_DM_USB
-int xhci_hcd_init(int index, struct xhci_hccr **hccr, struct xhci_hcor **hcor)
-{
-	struct zynqmp_xhci *ctx = &zynqmp_xhci;
-	int ret = 0;
-	uint32_t hclen;
-
-	if (index < 0 || index >= ARRAY_SIZE(ctr_addr))
-		return -EINVAL;
-
-	ctx->hcd = (struct xhci_hccr *)ctr_addr[index];
-	ctx->dwc3_reg = (struct dwc3 *)((void *)ctx->hcd + DWC3_REG_OFFSET);
-
-	ret = board_usb_init(index, USB_INIT_HOST);
-	if (ret != 0) {
-		puts("Failed to initialize board for USB\n");
-		return ret;
-	}
-
-	ret = zynqmp_xhci_core_init(ctx);
-	if (ret < 0) {
-		puts("Failed to initialize xhci\n");
-		return ret;
-	}
-
-	*hccr = (struct xhci_hccr *)ctx->hcd;
-	hclen = HC_LENGTH(xhci_readl(&(*hccr)->cr_capbase));
-	*hcor = (struct xhci_hcor *)((uintptr_t) *hccr + hclen);
-
-	debug("zynqmp-xhci: init hccr %p and hcor %p hc_length %d\n",
-	      *hccr, *hcor, hclen);
-
-	return ret;
-}
-#endif
-
 void xhci_hcd_stop(int index)
 {
 	/*
@@ -138,7 +94,6 @@ void xhci_hcd_stop(int index)
 	return;
 }
 
-#ifdef CONFIG_DM_USB
 static int xhci_usb_probe(struct udevice *dev)
 {
 	struct zynqmp_xhci_platdata *plat = dev_get_platdata(dev);
@@ -192,4 +147,3 @@ U_BOOT_DRIVER(dwc3_generic_host) = {
 	.priv_auto_alloc_size = sizeof(struct zynqmp_xhci),
 	.flags = DM_FLAG_ALLOC_PRIV_DMA,
 };
-#endif
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index caaa7555b1..fca2d78950 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -5128,7 +5128,6 @@ CONFIG_ZLIB
 CONFIG_ZLT
 CONFIG_ZM7300
 CONFIG_ZYNQMP_EEPROM
-CONFIG_ZYNQMP_XHCI_LIST
 CONFIG_ZYNQ_EEPROM
 CONFIG_ZYNQ_EEPROM_BUS
 CONFIG_ZYNQ_GEM_EEPROM_ADDR

commit 171274d78a43d6b1d7f04682858bfb49429ff1c8
Author: Michal Simek <michal.simek@xilinx.com>
Date:   Fri May 18 13:15:07 2018 +0200

    UPSTREAM: usb: xhci: zynqmp: Add support for DM_USB
    
    The patch is adding support for DM_USB for xhci driver.
    
    Change-Id: I329d442af804384d5749d1559d7ffcc36362715f
    Signed-off-by: Michal Simek <michal.simek@xilinx.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 41a3d4fda4377e971c4fbc7d0b7f335f2c4373ad)

diff --git a/drivers/usb/host/xhci-zynqmp.c b/drivers/usb/host/xhci-zynqmp.c
index cec1bc46d0..9eafd11a79 100644
--- a/drivers/usb/host/xhci-zynqmp.c
+++ b/drivers/usb/host/xhci-zynqmp.c
@@ -11,6 +11,7 @@
  */
 
 #include <common.h>
+#include <dm.h>
 #include <usb.h>
 #include <linux/errno.h>
 #include <asm/arch-zynqmp/hardware.h>
@@ -57,13 +58,23 @@ DECLARE_GLOBAL_DATA_PTR;
 #define USBOTGSS_IRQ_SET_1_DMADISABLECLR_EN	BIT(17)
 
 struct zynqmp_xhci {
+#ifdef CONFIG_DM_USB
+	struct usb_platdata usb_plat;
+#endif
+	struct xhci_ctrl ctrl;
 	struct xhci_hccr *hcd;
 	struct dwc3 *dwc3_reg;
 };
 
+#ifdef CONFIG_DM_USB
+struct zynqmp_xhci_platdata {
+	fdt_addr_t hcd_base;
+};
+#else
 static struct zynqmp_xhci zynqmp_xhci;
 
 unsigned long ctr_addr[] = CONFIG_ZYNQMP_XHCI_LIST;
+#endif
 
 static int zynqmp_xhci_core_init(struct zynqmp_xhci *zynqmp_xhci)
 {
@@ -81,6 +92,7 @@ static int zynqmp_xhci_core_init(struct zynqmp_xhci *zynqmp_xhci)
 	return ret;
 }
 
+#ifndef CONFIG_DM_USB
 int xhci_hcd_init(int index, struct xhci_hccr **hccr, struct xhci_hcor **hcor)
 {
 	struct zynqmp_xhci *ctx = &zynqmp_xhci;
@@ -114,6 +126,7 @@ int xhci_hcd_init(int index, struct xhci_hccr **hccr, struct xhci_hcor **hcor)
 
 	return ret;
 }
+#endif
 
 void xhci_hcd_stop(int index)
 {
@@ -124,3 +137,59 @@ void xhci_hcd_stop(int index)
 
 	return;
 }
+
+#ifdef CONFIG_DM_USB
+static int xhci_usb_probe(struct udevice *dev)
+{
+	struct zynqmp_xhci_platdata *plat = dev_get_platdata(dev);
+	struct zynqmp_xhci *ctx = dev_get_priv(dev);
+	struct xhci_hcor *hcor;
+	int ret;
+
+	ctx->hcd = (struct xhci_hccr *)plat->hcd_base;
+	ctx->dwc3_reg = (struct dwc3 *)((char *)(ctx->hcd) + DWC3_REG_OFFSET);
+
+	ret = zynqmp_xhci_core_init(ctx);
+	if (ret) {
+		puts("XHCI: failed to initialize controller\n");
+		return -EINVAL;
+	}
+
+	hcor = (struct xhci_hcor *)((ulong)ctx->hcd +
+				  HC_LENGTH(xhci_readl(&ctx->hcd->cr_capbase)));
+
+	return xhci_register(dev, ctx->hcd, hcor);
+}
+
+static int xhci_usb_remove(struct udevice *dev)
+{
+	return xhci_deregister(dev);
+}
+
+static int xhci_usb_ofdata_to_platdata(struct udevice *dev)
+{
+	struct zynqmp_xhci_platdata *plat = dev_get_platdata(dev);
+	const void *blob = gd->fdt_blob;
+
+	/* Get the base address for XHCI controller from the device node */
+	plat->hcd_base = fdtdec_get_addr(blob, dev_of_offset(dev), "reg");
+	if (plat->hcd_base == FDT_ADDR_T_NONE) {
+		debug("Can't get the XHCI register base address\n");
+		return -ENXIO;
+	}
+
+	return 0;
+}
+
+U_BOOT_DRIVER(dwc3_generic_host) = {
+	.name = "dwc3-generic-host",
+	.id = UCLASS_USB,
+	.ofdata_to_platdata = xhci_usb_ofdata_to_platdata,
+	.probe = xhci_usb_probe,
+	.remove = xhci_usb_remove,
+	.ops = &xhci_usb_ops,
+	.platdata_auto_alloc_size = sizeof(struct zynqmp_xhci_platdata),
+	.priv_auto_alloc_size = sizeof(struct zynqmp_xhci),
+	.flags = DM_FLAG_ALLOC_PRIV_DMA,
+};
+#endif

commit 81cd8855461024da3ea24dcdd7c31b4aa8b7eee3
Author: Mugunthan V N <mugunthanvnm@ti.com>
Date:   Fri May 18 13:15:05 2018 +0200

    UPSTREAM: usb: common: add support to get maximum speed from dt
    
    Add support to get maximum speed from dt so that usb drivers
    makes use of it for DT parsing.
    
    Change-Id: I3c809fd822813efbb5d7494c36803eb9f502e466
    Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
    Signed-off-by: Michal Simek <michal.simek@xilinx.com>
    (rebase and fix errors)
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 59592b99d884f0524a29afe4a412bbed65cfc5b7)

diff --git a/drivers/usb/common/common.c b/drivers/usb/common/common.c
index 69cf11cbf5..e8866ef43d 100644
--- a/drivers/usb/common/common.c
+++ b/drivers/usb/common/common.c
@@ -10,6 +10,7 @@
 #include <common.h>
 #include <linux/libfdt.h>
 #include <linux/usb/otg.h>
+#include <linux/usb/ch9.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -38,3 +39,31 @@ enum usb_dr_mode usb_get_dr_mode(int node)
 
 	return USB_DR_MODE_UNKNOWN;
 }
+
+static const char *const speed_names[] = {
+	[USB_SPEED_UNKNOWN] = "UNKNOWN",
+	[USB_SPEED_LOW] = "low-speed",
+	[USB_SPEED_FULL] = "full-speed",
+	[USB_SPEED_HIGH] = "high-speed",
+	[USB_SPEED_WIRELESS] = "wireless",
+	[USB_SPEED_SUPER] = "super-speed",
+};
+
+enum usb_device_speed usb_get_maximum_speed(int node)
+{
+	const void *fdt = gd->fdt_blob;
+	const char *max_speed;
+	int i;
+
+	max_speed = fdt_getprop(fdt, node, "maximum-speed", NULL);
+	if (!max_speed) {
+		pr_err("usb maximum-speed not found\n");
+		return USB_SPEED_UNKNOWN;
+	}
+
+	for (i = 0; i < ARRAY_SIZE(speed_names); i++)
+		if (!strcmp(max_speed, speed_names[i]))
+			return i;
+
+	return USB_SPEED_UNKNOWN;
+}
diff --git a/include/linux/usb/otg.h b/include/linux/usb/otg.h
index 8f8ac6aeef..b61ef19b22 100644
--- a/include/linux/usb/otg.h
+++ b/include/linux/usb/otg.h
@@ -26,4 +26,13 @@ enum usb_dr_mode {
  */
 enum usb_dr_mode usb_get_dr_mode(int node);
 
+/**
+ * usb_get_maximum_speed() - Get maximum speed for given device
+ * @node: Node offset to the given device
+ *
+ * The function gets phy interface string from property 'maximum-speed',
+ * and returns the correspondig enum usb_device_speed
+ */
+enum usb_device_speed usb_get_maximum_speed(int node);
+
 #endif /* __LINUX_USB_OTG_H */

commit 667c22550f6c682630e7c6b1ef5476ec4801525e
Author: Seung-Woo Kim <sw0312.kim@samsung.com>
Date:   Thu May 10 10:52:15 2018 +0900

    UPSTREAM: gadget: f_thor: update to support more than 4GB file as thor 5.0
    
    During file download, it only uses 32bit variable for file size and
    it limits maximum file size less than 4GB. Update to support more
    than 4GB file with using two 32bit variables for file size as thor
    protocol 5.0.
    
    Change-Id: If855ff85ef1984ac77d9caa6c49c99f32798121f
    Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 1fe9ae76b113103bcc40aa15949f9dd8aa0a06a2)

diff --git a/drivers/usb/gadget/f_thor.c b/drivers/usb/gadget/f_thor.c
index 70b123e9fa..59375ca270 100644
--- a/drivers/usb/gadget/f_thor.c
+++ b/drivers/usb/gadget/f_thor.c
@@ -263,8 +263,10 @@ static long long int process_rqt_download(const struct rqt_box *rqt)
 
 	switch (rqt->rqt_data) {
 	case RQT_DL_INIT:
-		thor_file_size = rqt->int_data[0];
-		debug("INIT: total %d bytes\n", rqt->int_data[0]);
+		thor_file_size = (unsigned long long int)rqt->int_data[0] +
+				 (((unsigned long long int)rqt->int_data[1])
+				  << 32);
+		debug("INIT: total %llu bytes\n", thor_file_size);
 		break;
 	case RQT_DL_FILE_INFO:
 		file_type = rqt->int_data[0];
@@ -275,7 +277,9 @@ static long long int process_rqt_download(const struct rqt_box *rqt)
 			break;
 		}
 
-		thor_file_size = rqt->int_data[1];
+		thor_file_size = (unsigned long long int)rqt->int_data[1] +
+				 (((unsigned long long int)rqt->int_data[2])
+				  << 32);
 		memcpy(f_name, rqt->str_data[0], F_NAME_BUF_SIZE);
 		f_name[F_NAME_BUF_SIZE] = '\0';
 
diff --git a/drivers/usb/gadget/f_thor.h b/drivers/usb/gadget/f_thor.h
index 83412851dd..7820788a14 100644
--- a/drivers/usb/gadget/f_thor.h
+++ b/drivers/usb/gadget/f_thor.h
@@ -35,7 +35,7 @@ struct usb_cdc_attribute_vendor_descriptor {
 	__u8 DAUValue;
 } __packed;
 
-#define VER_PROTOCOL_MAJOR	4
+#define VER_PROTOCOL_MAJOR	5
 #define VER_PROTOCOL_MINOR	0
 
 enum rqt {

commit 57086a026ffbc480d4e89b2e58cdf63d57a1ec28
Author: Seung-Woo Kim <sw0312.kim@samsung.com>
Date:   Thu May 10 10:52:14 2018 +0900

    UPSTREAM: gadget: f_thor: fix filename overflow
    
    The thor sender can send filename without null character and it is
    used without consideration of overflow. Actually, character array
    for filename is assigned with DEFINE_CACHE_ALIGN_BUFFER() and it
    is bigger than size of memcpy, so there was no real overflow.
    Fix filename overflow for code level integrity.
    
    Change-Id: Ie6f2fdd29fede8f26ae72a6048204b9cc8ece3ed
    Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit f9e8dc0abda94869d2734843c1c14ba6f2867031)

diff --git a/drivers/usb/gadget/f_thor.c b/drivers/usb/gadget/f_thor.c
index 18f233ab58..70b123e9fa 100644
--- a/drivers/usb/gadget/f_thor.c
+++ b/drivers/usb/gadget/f_thor.c
@@ -48,7 +48,7 @@ DEFINE_CACHE_ALIGN_BUFFER(unsigned char, thor_rx_data_buf,
 /* ********************************************************** */
 /*         THOR protocol - transmission handling	      */
 /* ********************************************************** */
-DEFINE_CACHE_ALIGN_BUFFER(char, f_name, F_NAME_BUF_SIZE);
+DEFINE_CACHE_ALIGN_BUFFER(char, f_name, F_NAME_BUF_SIZE + 1);
 static unsigned long long int thor_file_size;
 static int alt_setting_num;
 
@@ -277,6 +277,7 @@ static long long int process_rqt_download(const struct rqt_box *rqt)
 
 		thor_file_size = rqt->int_data[1];
 		memcpy(f_name, rqt->str_data[0], F_NAME_BUF_SIZE);
+		f_name[F_NAME_BUF_SIZE] = '\0';
 
 		debug("INFO: name(%s, %d), size(%llu), type(%d)\n",
 		      f_name, 0, thor_file_size, file_type);

commit 43156a850e12df9fede282b3618ebeb2fb98bd47
Author: Bryan O'Donoghue <pure.logic@nexus-software.ie>
Date:   Mon Apr 30 15:56:10 2018 +0100

    UPSTREAM: usb: composite convert __set_bit to generic_set_bit
    
    Compiling the f_mass_storage driver for an x86 target results in a
    compilation error as set_bit and clear_bit are provided by bitops.h
    
    To address that situation we discussed on the list moving to
    genetic_set_bit() instead.
    
    Doing a quick grep for similar situations in drivers/usb shows that the
    composite device is using __set_bit().
    
    This patch switches over to generic_set_bit to maintain consistency between
    the two gadget drivers.
    
    Change-Id: I2716277c00dd9309d2fe57e4aa68c18ada82ef1a
    Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie>
    Cc: Lukasz Majewski <lukma@denx.de>
    Cc: Marek Vasut <marex@denx.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 31dd8efeb661c8dbffff9175a09cf2bab090906a)

diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c
index 164d869c8c..4ea7dbc607 100644
--- a/drivers/usb/gadget/composite.c
+++ b/drivers/usb/gadget/composite.c
@@ -465,7 +465,7 @@ static int set_config(struct usb_composite_dev *cdev,
 			ep = (struct usb_endpoint_descriptor *)*descriptors;
 			addr = ((ep->bEndpointAddress & 0x80) >> 3)
 			     |	(ep->bEndpointAddress & 0x0f);
-			__set_bit(addr, f->endpoints);
+			generic_set_bit(addr, f->endpoints);
 		}
 
 		result = f->set_alt(f, tmp, 0);

commit aa10d76eac8ce972e0f96def2094cec7c63e7ff4
Author: Bryan O'Donoghue <pure.logic@nexus-software.ie>
Date:   Mon Apr 30 15:56:09 2018 +0100

    UPSTREAM: usb: f_mass_storage: Fix set_bit and clear_bit usage
    
    Compiling the f_mass_storage driver for an x86 target results in a
    compilation error as set_bit and clear_bit are provided by bitops.h
    
    Looking at the provenance of the current u-boot code and the git change
    history in the kernel, it looks like we have a local copy of set_bit and
    clear_bit as a hold-over from porting the Linux driver into u-boot.
    
    These days __set_bit and __clear_bit are optionally provided by an arch and
    can be used as inputs to generic_bit_set and generic_bit_clear.
    
    This patch switches over to generic_set_bit and generic_clear_bit to
    accommodate.
    
    Tested on i.MX WaRP7 and Intel Edison
    
    Change-Id: Ic7a56f08dcd5782a963a935df8217f5fdb605ee2
    Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie>
    Cc: Lukasz Majewski <lukma@denx.de>
    Cc: Marek Vasut <marex@denx.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 5ac73f6879327beef45bc58484f1f09c2f0cb37c)

diff --git a/drivers/usb/gadget/f_mass_storage.c b/drivers/usb/gadget/f_mass_storage.c
index dd9d045adb..ff02d6225f 100644
--- a/drivers/usb/gadget/f_mass_storage.c
+++ b/drivers/usb/gadget/f_mass_storage.c
@@ -254,6 +254,7 @@
 #include <rockusb.h>
 
 #include <asm/unaligned.h>
+#include <linux/bitops.h>
 #include <linux/usb/gadget.h>
 #include <linux/usb/gadget.h>
 #include <linux/usb/composite.h>
@@ -285,26 +286,6 @@ static const char fsg_string_interface[] = "Mass Storage";
 struct kref {int x; };
 struct completion {int x; };
 
-inline void set_bit(int nr, volatile void *addr)
-{
-	int	mask;
-	unsigned int *a = (unsigned int *) addr;
-
-	a += nr >> 5;
-	mask = 1 << (nr & 0x1f);
-	*a |= mask;
-}
-
-inline void clear_bit(int nr, volatile void *addr)
-{
-	int	mask;
-	unsigned int *a = (unsigned int *) addr;
-
-	a += nr >> 5;
-	mask = 1 << (nr & 0x1f);
-	*a &= ~mask;
-}
-
 struct fsg_dev;
 struct fsg_common;
 
@@ -2104,7 +2085,7 @@ static int received_cbw(struct fsg_dev *fsg, struct fsg_buffhd *bh)
 		 * we can simply accept and discard any data received
 		 * until the next reset. */
 		wedge_bulk_in_endpoint(fsg);
-		set_bit(IGNORE_BULK_OUT, &fsg->atomic_bitflags);
+		generic_set_bit(IGNORE_BULK_OUT, &fsg->atomic_bitflags);
 		return -EINVAL;
 	}
 
@@ -2272,7 +2253,7 @@ reset:
 	fsg->bulk_out_enabled = 1;
 	common->bulk_out_maxpacket =
 				le16_to_cpu(get_unaligned(&d->wMaxPacketSize));
-	clear_bit(IGNORE_BULK_OUT, &fsg->atomic_bitflags);
+	generic_clear_bit(IGNORE_BULK_OUT, &fsg->atomic_bitflags);
 
 	/* Allocate the requests */
 	for (i = 0; i < FSG_NUM_BUFFERS; ++i) {

commit 0afa4b6c53948c8112d2ea8a383a18b56ea62dbb
Author: Neil Armstrong <narmstrong@baylibre.com>
Date:   Tue Apr 3 11:44:19 2018 +0200

    UPSTREAM: clk: add sandbox test for bulk API
    
    This patch adds the bulk clock API tests for the sandbox test suite.
    
    It's very similar to the main test but only uses the _bulk() API and
    checks if the clocks are correctly enabled/disabled.
    
    Change-Id: Ibfd7ea033e9a1c2ca76d88be8ca562a660f30448
    Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 65388d0dc5a36fc86718ffcdf08ac5671ae27b5d)

diff --git a/arch/sandbox/include/asm/clk.h b/arch/sandbox/include/asm/clk.h
index 9dc6c8184b..01b5ba4e07 100644
--- a/arch/sandbox/include/asm/clk.h
+++ b/arch/sandbox/include/asm/clk.h
@@ -63,6 +63,14 @@ int sandbox_clk_query_enable(struct udevice *dev, int id);
  * @return:	0 if OK, or a negative error code.
  */
 int sandbox_clk_test_get(struct udevice *dev);
+/**
+ * sandbox_clk_test_get_bulk - Ask the sandbox clock test device to request its
+ * clocks with the bulk clk API.
+ *
+ * @dev:	The sandbox clock test (client) devivce.
+ * @return:	0 if OK, or a negative error code.
+ */
+int sandbox_clk_test_get_bulk(struct udevice *dev);
 /**
  * sandbox_clk_test_get_rate - Ask the sandbox clock test device to query a
  * clock's rate.
@@ -90,6 +98,14 @@ ulong sandbox_clk_test_set_rate(struct udevice *dev, int id, ulong rate);
  * @return:	0 if OK, or a negative error code.
  */
 int sandbox_clk_test_enable(struct udevice *dev, int id);
+/**
+ * sandbox_clk_test_enable_bulk - Ask the sandbox clock test device to enable
+ * all clocks in it's clock bulk struct.
+ *
+ * @dev:	The sandbox clock test (client) devivce.
+ * @return:	0 if OK, or a negative error code.
+ */
+int sandbox_clk_test_enable_bulk(struct udevice *dev);
 /**
  * sandbox_clk_test_disable - Ask the sandbox clock test device to disable a
  * clock.
@@ -99,6 +115,14 @@ int sandbox_clk_test_enable(struct udevice *dev, int id);
  * @return:	0 if OK, or a negative error code.
  */
 int sandbox_clk_test_disable(struct udevice *dev, int id);
+/**
+ * sandbox_clk_test_disable_bulk - Ask the sandbox clock test device to disable
+ * all clocks in it's clock bulk struct.
+ *
+ * @dev:	The sandbox clock test (client) devivce.
+ * @return:	0 if OK, or a negative error code.
+ */
+int sandbox_clk_test_disable_bulk(struct udevice *dev);
 /**
  * sandbox_clk_test_free - Ask the sandbox clock test device to free its
  * clocks.
@@ -107,5 +131,13 @@ int sandbox_clk_test_disable(struct udevice *dev, int id);
  * @return:	0 if OK, or a negative error code.
  */
 int sandbox_clk_test_free(struct udevice *dev);
+/**
+ * sandbox_clk_test_release_bulk - Ask the sandbox clock test device to release
+ * all clocks in it's clock bulk struct.
+ *
+ * @dev:	The sandbox clock test (client) devivce.
+ * @return:	0 if OK, or a negative error code.
+ */
+int sandbox_clk_test_release_bulk(struct udevice *dev);
 
 #endif
diff --git a/drivers/clk/clk_sandbox_test.c b/drivers/clk/clk_sandbox_test.c
index 999100de9d..d0898815b3 100644
--- a/drivers/clk/clk_sandbox_test.c
+++ b/drivers/clk/clk_sandbox_test.c
@@ -11,6 +11,7 @@
 
 struct sandbox_clk_test {
 	struct clk clks[SANDBOX_CLK_TEST_ID_COUNT];
+	struct clk_bulk bulk;
 };
 
 static const char * const sandbox_clk_test_names[] = {
@@ -34,6 +35,13 @@ int sandbox_clk_test_get(struct udevice *dev)
 	return 0;
 }
 
+int sandbox_clk_test_get_bulk(struct udevice *dev)
+{
+	struct sandbox_clk_test *sbct = dev_get_priv(dev);
+
+	return clk_get_bulk(dev, &sbct->bulk);
+}
+
 ulong sandbox_clk_test_get_rate(struct udevice *dev, int id)
 {
 	struct sandbox_clk_test *sbct = dev_get_priv(dev);
@@ -64,6 +72,13 @@ int sandbox_clk_test_enable(struct udevice *dev, int id)
 	return clk_enable(&sbct->clks[id]);
 }
 
+int sandbox_clk_test_enable_bulk(struct udevice *dev)
+{
+	struct sandbox_clk_test *sbct = dev_get_priv(dev);
+
+	return clk_enable_bulk(&sbct->bulk);
+}
+
 int sandbox_clk_test_disable(struct udevice *dev, int id)
 {
 	struct sandbox_clk_test *sbct = dev_get_priv(dev);
@@ -74,6 +89,13 @@ int sandbox_clk_test_disable(struct udevice *dev, int id)
 	return clk_disable(&sbct->clks[id]);
 }
 
+int sandbox_clk_test_disable_bulk(struct udevice *dev)
+{
+	struct sandbox_clk_test *sbct = dev_get_priv(dev);
+
+	return clk_disable_bulk(&sbct->bulk);
+}
+
 int sandbox_clk_test_free(struct udevice *dev)
 {
 	struct sandbox_clk_test *sbct = dev_get_priv(dev);
@@ -88,6 +110,13 @@ int sandbox_clk_test_free(struct udevice *dev)
 	return 0;
 }
 
+int sandbox_clk_test_release_bulk(struct udevice *dev)
+{
+	struct sandbox_clk_test *sbct = dev_get_priv(dev);
+
+	return clk_release_bulk(&sbct->bulk);
+}
+
 static const struct udevice_id sandbox_clk_test_ids[] = {
 	{ .compatible = "sandbox,clk-test" },
 	{ }
diff --git a/test/dm/clk.c b/test/dm/clk.c
index 712a1e674a..d3649103ee 100644
--- a/test/dm/clk.c
+++ b/test/dm/clk.c
@@ -101,3 +101,40 @@ static int dm_test_clk(struct unit_test_state *uts)
 	return 0;
 }
 DM_TEST(dm_test_clk, DM_TESTF_SCAN_FDT);
+
+static int dm_test_clk_bulk(struct unit_test_state *uts)
+{
+	struct udevice *dev_clk, *dev_test;
+
+	ut_assertok(uclass_get_device_by_name(UCLASS_CLK, "clk-sbox",
+					      &dev_clk));
+	ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test",
+					      &dev_test));
+	ut_assertok(sandbox_clk_test_get_bulk(dev_test));
+
+	ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
+	ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
+
+	/* Fixed clock does not support enable, thus should not fail */
+	ut_assertok(sandbox_clk_test_enable_bulk(dev_test));
+	ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
+	ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
+
+	/* Fixed clock does not support disable, thus should not fail */
+	ut_assertok(sandbox_clk_test_disable_bulk(dev_test));
+	ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
+	ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
+
+	/* Fixed clock does not support enable, thus should not fail */
+	ut_assertok(sandbox_clk_test_enable_bulk(dev_test));
+	ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
+	ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
+
+	/* Fixed clock does not support disable, thus should not fail */
+	ut_assertok(sandbox_clk_test_release_bulk(dev_test));
+	ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
+	ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
+
+	return 0;
+}
+DM_TEST(dm_test_clk_bulk, DM_TESTF_SCAN_FDT);

commit 977da8af083075f21983537b899319e3c568d934
Author: Neil Armstrong <narmstrong@baylibre.com>
Date:   Tue Apr 3 11:44:18 2018 +0200

    UPSTREAM: clk: Add get/enable/disable/release for a bulk of clocks
    
    This patch adds a "bulk" API to the clock API in order to get/enable/disable
    /release a group of clocks associated with a device.
    
    This bulk API will avoid adding a copy of the same code to manage
    a group of clocks in drivers.
    
    Conflicts:
            drivers/clk/clk-uclass.c
    
    Change-Id: I7f992b206662bf5f931a835d98b3e3cd0f4347f1
    Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit a855be87da49ba750e83ecc526235fe33099f76e)

diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index 4b1a177dcc..a4938c18ad 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -105,6 +105,39 @@ int clk_get_by_index(struct udevice *dev, int index, struct clk *clk)
 	return clk_get_by_indexed_prop(dev, "clocks", index, clk);
 }
 
+int clk_get_bulk(struct udevice *dev, struct clk_bulk *bulk)
+{
+	int i, ret, err, count;
+	
+	bulk->count = 0;
+
+	count = dev_count_phandle_with_args(dev, "clocks", "#clock-cells");
+	if (!count)
+		return 0;
+
+	bulk->clks = devm_kcalloc(dev, count, sizeof(struct clk), GFP_KERNEL);
+	if (!bulk->clks)
+		return -ENOMEM;
+
+	for (i = 0; i < count; i++) {
+		ret = clk_get_by_index(dev, i, &bulk->clks[i]);
+		if (ret < 0)
+			goto bulk_get_err;
+
+		++bulk->count;
+	}
+
+	return 0;
+
+bulk_get_err:
+	err = clk_release_all(bulk->clks, bulk->count);
+	if (err)
+		debug("%s: could release all clocks for %p\n",
+		      __func__, dev);
+
+	return ret;
+}
+
 static int clk_set_default_parents(struct udevice *dev)
 {
 	struct clk clk, parent_clk;
@@ -357,6 +390,19 @@ int clk_enable(struct clk *clk)
 	return ops->enable(clk);
 }
 
+int clk_enable_bulk(struct clk_bulk *bulk)
+{
+	int i, ret;
+
+	for (i = 0; i < bulk->count; i++) {
+		ret = clk_enable(&bulk->clks[i]);
+		if (ret < 0 && ret != -ENOSYS)
+			return ret;
+	}
+
+	return 0;
+}
+
 int clk_disable(struct clk *clk)
 {
 	const struct clk_ops *ops = clk_dev_ops(clk->dev);
@@ -369,6 +415,19 @@ int clk_disable(struct clk *clk)
 	return ops->disable(clk);
 }
 
+int clk_disable_bulk(struct clk_bulk *bulk)
+{
+	int i, ret;
+
+	for (i = 0; i < bulk->count; i++) {
+		ret = clk_disable(&bulk->clks[i]);
+		if (ret < 0 && ret != -ENOSYS)
+			return ret;
+	}
+
+	return 0;
+}
+
 int clks_probe(void)
 {
 	struct udevice *dev;
diff --git a/include/clk.h b/include/clk.h
index 44ca263bc1..f89b3acdba 100644
--- a/include/clk.h
+++ b/include/clk.h
@@ -60,6 +60,23 @@ struct clk {
 	unsigned long id;
 };
 
+/**
+ * struct clk_bulk - A handle to (allowing control of) a bulk of clocks.
+ *
+ * Clients provide storage for the clock bulk. The content of the structure is
+ * managed solely by the clock API. A clock bulk struct is
+ * initialized by "get"ing the clock bulk struct.
+ * The clock bulk struct is passed to all other bulk clock APIs to apply
+ * the API to all the clock in the bulk struct.
+ *
+ * @clks: An array of clock handles.
+ * @count: The number of clock handles in the clks array.
+ */
+struct clk_bulk {
+	struct clk *clks;
+	unsigned int count;
+};
+
 #if CONFIG_IS_ENABLED(OF_CONTROL) && CONFIG_IS_ENABLED(CLK)
 struct phandle_1_arg;
 int clk_get_by_index_platdata(struct udevice *dev, int index,
@@ -82,6 +99,21 @@ int clk_get_by_index_platdata(struct udevice *dev, int index,
  */
 int clk_get_by_index(struct udevice *dev, int index, struct clk *clk);
 
+/**
+ * clock_get_bulk - Get/request all clocks of a device.
+ *
+ * This looks up and requests all clocks of the client device; each device is
+ * assumed to have n clocks associated with it somehow, and this function finds
+ * and requests all of them in a separate structure. The mapping of client
+ * device clock indices to provider clocks may be via device-tree properties,
+ * board-provided mapping tables, or some other mechanism.
+ *
+ * @dev:	The client device.
+ * @bulk	A pointer to a clock bulk struct to initialize.
+ * @return 0 if OK, or a negative error code.
+ */
+int clk_get_bulk(struct udevice *dev, struct clk_bulk *bulk);
+
 /**
  * clock_get_by_name - Get/request a clock by name.
  *
@@ -120,6 +152,11 @@ static inline int clk_get_by_index(struct udevice *dev, int index,
 	return -ENOSYS;
 }
 
+static inline int clk_get_bulk(struct udevice *dev, struct clk_bulk *bulk)
+{
+	return -ENOSYS;
+}
+
 static inline int clk_get_by_name(struct udevice *dev, const char *name,
 			   struct clk *clk)
 {
@@ -130,7 +167,6 @@ static inline int clk_release_all(struct clk *clk, int count)
 {
 	return -ENOSYS;
 }
-
 #endif
 
 #if (CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)) && \
@@ -150,6 +186,22 @@ static inline int clk_set_defaults(struct udevice *dev)
 }
 #endif
 
+/**
+ * clk_release_bulk() - Disable (turn off)/Free an array of previously
+ * requested clocks in a clock bulk struct.
+ *
+ * For each clock contained in the clock bulk struct, this function will check
+ * if clock has been previously requested and then will disable and free it.
+ *
+ * @clk:	A clock bulk struct that was previously successfully
+ *		requested by clk_get_bulk().
+ * @return zero on success, or -ve error code.
+ */
+static inline int clk_release_bulk(struct clk_bulk *bulk)
+{
+	return clk_release_all(bulk->clks, bulk->count);
+}
+
 /**
  * clk_request - Request a clock by provider-specific ID.
  *
@@ -234,6 +286,15 @@ int clk_set_parent(struct clk *clk, struct clk *parent);
  */
 int clk_enable(struct clk *clk);
 
+/**
+ * clk_enable_bulk() - Enable (turn on) all clocks in a clock bulk struct.
+ *
+ * @bulk:	A clock bulk struct that was previously successfully requested
+ *		by clk_get_bulk().
+ * @return zero on success, or -ve error code.
+ */
+int clk_enable_bulk(struct clk_bulk *bulk);
+
 /**
  * clk_disable() - Disable (turn off) a clock.
  *
@@ -243,6 +304,15 @@ int clk_enable(struct clk *clk);
  */
 int clk_disable(struct clk *clk);
 
+/**
+ * clk_disable_bulk() - Disable (turn off) all clocks in a clock bulk struct.
+ *
+ * @bulk:	A clock bulk struct that was previously successfully requested
+ *		by clk_get_bulk().
+ * @return zero on success, or -ve error code.
+ */
+int clk_disable_bulk(struct clk_bulk *bulk);
+
 int soc_clk_dump(void);
 
 int clks_probe(void);

commit 2a2b09e3d9e28b6f88a3036c8f1f45e13e1bfc62
Author: Neil Armstrong <narmstrong@baylibre.com>
Date:   Thu Apr 12 10:03:19 2018 +0200

    UPSTREAM: reset: fix bulk API when DM_RESET is disabled
    
    In the commit "reset: Add get/assert/deassert/release for bulk of reset signals"
    the disabled reset_release_bulk() and reset_get_bulk() used the wrong
    struct clk_bulk instead of struct reset_ctl_bulk.
    
    Change-Id: Id98f7a6f6f4d5f2fca88f71b6254ca3795888d85
    Fixes: 0c28233903b5 ("reset: Add get/assert/deassert/release for bulk of reset signals")
    Reported-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 1dd181ff2b3009405d12ad0b3782176490da2446)

diff --git a/include/reset.h b/include/reset.h
index d38f1765ec..ae247ceb4f 100644
--- a/include/reset.h
+++ b/include/reset.h
@@ -243,7 +243,8 @@ static inline int reset_get_by_index(struct udevice *dev, int index,
 	return -ENOTSUPP;
 }
 
-static inline int reset_get_bulk(struct udevice *dev, struct clk_bulk *bulk)
+static inline int reset_get_bulk(struct udevice *dev,
+				 struct reset_ctl_bulk *bulk)
 {
 	return -ENOTSUPP;
 }
@@ -284,7 +285,7 @@ static inline int reset_release_all(struct reset_ctl *reset_ctl, int count)
 	return 0;
 }
 
-static inline int reset_release_bulk(struct clk_bulk *bulk)
+static inline int reset_release_bulk(struct reset_ctl_bulk *bulk)
 {
 	return 0;
 }

commit f7a4178d8b222591438166990a5a8a5ace9fadbe
Author: Neil Armstrong <narmstrong@baylibre.com>
Date:   Tue Apr 3 11:40:51 2018 +0200

    UPSTREAM: reset: add sandbox test for bulk API
    
    This patch adds the bulk reset API tests for the sandbox test suite.
    
    Unlike the main test, it also check the "other" reset signal using the bulk API
    and checks if the resets are correctly asserted/deasserted.
    
    To allow the bulk API to work, and avoid changing the DT, the number of resets
    of the sandbox reset controller has been bumped to 101 for the "other" reset
    line to be valid.
    
    Change-Id: Iac62a1c6ee5637695f7d0dd77b35f047eca641a9
    Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 91f5f8b73ccba5bf591912fe6e8c500a7d51eb93)

diff --git a/arch/sandbox/include/asm/reset.h b/arch/sandbox/include/asm/reset.h
index 7146aa5ab2..0cd7702b88 100644
--- a/arch/sandbox/include/asm/reset.h
+++ b/arch/sandbox/include/asm/reset.h
@@ -14,8 +14,12 @@ struct udevice;
 int sandbox_reset_query(struct udevice *dev, unsigned long id);
 
 int sandbox_reset_test_get(struct udevice *dev);
+int sandbox_reset_test_get_bulk(struct udevice *dev);
 int sandbox_reset_test_assert(struct udevice *dev);
+int sandbox_reset_test_assert_bulk(struct udevice *dev);
 int sandbox_reset_test_deassert(struct udevice *dev);
+int sandbox_reset_test_deassert_bulk(struct udevice *dev);
 int sandbox_reset_test_free(struct udevice *dev);
+int sandbox_reset_test_release_bulk(struct udevice *dev);
 
 #endif
diff --git a/drivers/reset/sandbox-reset-test.c b/drivers/reset/sandbox-reset-test.c
index e37d6c91ef..f0ceaa0483 100644
--- a/drivers/reset/sandbox-reset-test.c
+++ b/drivers/reset/sandbox-reset-test.c
@@ -12,6 +12,7 @@
 
 struct sandbox_reset_test {
 	struct reset_ctl ctl;
+	struct reset_ctl_bulk bulk;
 };
 
 int sandbox_reset_test_get(struct udevice *dev)
@@ -21,6 +22,13 @@ int sandbox_reset_test_get(struct udevice *dev)
 	return reset_get_by_name(dev, "test", &sbrt->ctl);
 }
 
+int sandbox_reset_test_get_bulk(struct udevice *dev)
+{
+	struct sandbox_reset_test *sbrt = dev_get_priv(dev);
+
+	return reset_get_bulk(dev, &sbrt->bulk);
+}
+
 int sandbox_reset_test_assert(struct udevice *dev)
 {
 	struct sandbox_reset_test *sbrt = dev_get_priv(dev);
@@ -28,6 +36,13 @@ int sandbox_reset_test_assert(struct udevice *dev)
 	return reset_assert(&sbrt->ctl);
 }
 
+int sandbox_reset_test_assert_bulk(struct udevice *dev)
+{
+	struct sandbox_reset_test *sbrt = dev_get_priv(dev);
+
+	return reset_assert_bulk(&sbrt->bulk);
+}
+
 int sandbox_reset_test_deassert(struct udevice *dev)
 {
 	struct sandbox_reset_test *sbrt = dev_get_priv(dev);
@@ -35,6 +50,13 @@ int sandbox_reset_test_deassert(struct udevice *dev)
 	return reset_deassert(&sbrt->ctl);
 }
 
+int sandbox_reset_test_deassert_bulk(struct udevice *dev)
+{
+	struct sandbox_reset_test *sbrt = dev_get_priv(dev);
+
+	return reset_deassert_bulk(&sbrt->bulk);
+}
+
 int sandbox_reset_test_free(struct udevice *dev)
 {
 	struct sandbox_reset_test *sbrt = dev_get_priv(dev);
@@ -42,6 +64,13 @@ int sandbox_reset_test_free(struct udevice *dev)
 	return reset_free(&sbrt->ctl);
 }
 
+int sandbox_reset_test_release_bulk(struct udevice *dev)
+{
+	struct sandbox_reset_test *sbrt = dev_get_priv(dev);
+
+	return reset_release_bulk(&sbrt->bulk);
+}
+
 static const struct udevice_id sandbox_reset_test_ids[] = {
 	{ .compatible = "sandbox,reset-ctl-test" },
 	{ }
diff --git a/drivers/reset/sandbox-reset.c b/drivers/reset/sandbox-reset.c
index 4258af521b..c310749dc8 100644
--- a/drivers/reset/sandbox-reset.c
+++ b/drivers/reset/sandbox-reset.c
@@ -10,7 +10,7 @@
 #include <asm/io.h>
 #include <asm/reset.h>
 
-#define SANDBOX_RESET_SIGNALS 3
+#define SANDBOX_RESET_SIGNALS 101
 
 struct sandbox_reset_signal {
 	bool asserted;
diff --git a/test/dm/reset.c b/test/dm/reset.c
index 0ae8031540..8dc0023c08 100644
--- a/test/dm/reset.c
+++ b/test/dm/reset.c
@@ -13,6 +13,9 @@
 /* This must match the specifier for mbox-names="test" in the DT node */
 #define TEST_RESET_ID 2
 
+/* This is the other reset phandle specifier handled by bulk */
+#define OTHER_RESET_ID 2
+
 static int dm_test_reset(struct unit_test_state *uts)
 {
 	struct udevice *dev_reset;
@@ -37,3 +40,33 @@ static int dm_test_reset(struct unit_test_state *uts)
 	return 0;
 }
 DM_TEST(dm_test_reset, DM_TESTF_SCAN_FDT);
+
+static int dm_test_reset_bulk(struct unit_test_state *uts)
+{
+	struct udevice *dev_reset;
+	struct udevice *dev_test;
+
+	ut_assertok(uclass_get_device_by_name(UCLASS_RESET, "reset-ctl",
+					      &dev_reset));
+	ut_asserteq(0, sandbox_reset_query(dev_reset, TEST_RESET_ID));
+	ut_asserteq(0, sandbox_reset_query(dev_reset, OTHER_RESET_ID));
+
+	ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "reset-ctl-test",
+					      &dev_test));
+	ut_assertok(sandbox_reset_test_get_bulk(dev_test));
+
+	ut_assertok(sandbox_reset_test_assert_bulk(dev_test));
+	ut_asserteq(1, sandbox_reset_query(dev_reset, TEST_RESET_ID));
+	ut_asserteq(1, sandbox_reset_query(dev_reset, OTHER_RESET_ID));
+
+	ut_assertok(sandbox_reset_test_deassert_bulk(dev_test));
+	ut_asserteq(0, sandbox_reset_query(dev_reset, TEST_RESET_ID));
+	ut_asserteq(0, sandbox_reset_query(dev_reset, OTHER_RESET_ID));
+
+	ut_assertok(sandbox_reset_test_release_bulk(dev_test));
+	ut_asserteq(1, sandbox_reset_query(dev_reset, TEST_RESET_ID));
+	ut_asserteq(1, sandbox_reset_query(dev_reset, OTHER_RESET_ID));
+
+	return 0;
+}
+DM_TEST(dm_test_reset_bulk, DM_TESTF_SCAN_FDT);

commit d7940296654ae604971e93d79e1c456badaf1605
Author: Neil Armstrong <narmstrong@baylibre.com>
Date:   Tue Apr 3 11:40:50 2018 +0200

    UPSTREAM: reset: Add get/assert/deassert/release for bulk of reset signals
    
    This patch adds a "bulk" API to the reset API in order to get/deassert/
    assert/release a group of reset signals associated with a device.
    
    This bulk API will avoid adding a copy of the same code to manage
    a group of reset signals in drivers.
    
    Change-Id: Iabad4ac36791622b6560cff8aafc6bfbc4c9bde3
    Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 0c28233903b5af9a7f41b3200993cfa197b35719)

diff --git a/drivers/reset/reset-uclass.c b/drivers/reset/reset-uclass.c
index 307a29705f..9a5c9c91b9 100644
--- a/drivers/reset/reset-uclass.c
+++ b/drivers/reset/reset-uclass.c
@@ -81,6 +81,40 @@ int reset_get_by_index(struct udevice *dev, int index,
 	return 0;
 }
 
+int reset_get_bulk(struct udevice *dev, struct reset_ctl_bulk *bulk)
+{
+	int i, ret, err, count;
+	
+	bulk->count = 0;
+
+	count = dev_count_phandle_with_args(dev, "resets", "#reset-cells");
+	if (!count)
+		return 0;
+
+	bulk->resets = devm_kcalloc(dev, count, sizeof(struct reset_ctl),
+				    GFP_KERNEL);
+	if (!bulk->resets)
+		return -ENOMEM;
+
+	for (i = 0; i < count; i++) {
+		ret = reset_get_by_index(dev, i, &bulk->resets[i]);
+		if (ret < 0)
+			goto bulk_get_err;
+
+		++bulk->count;
+	}
+
+	return 0;
+
+bulk_get_err:
+	err = reset_release_all(bulk->resets, bulk->count);
+	if (err)
+		debug("%s: could release all resets for %p\n",
+		      __func__, dev);
+
+	return ret;
+}
+
 int reset_get_by_name(struct udevice *dev, const char *name,
 		     struct reset_ctl *reset_ctl)
 {
@@ -126,6 +160,19 @@ int reset_assert(struct reset_ctl *reset_ctl)
 	return ops->rst_assert(reset_ctl);
 }
 
+int reset_assert_bulk(struct reset_ctl_bulk *bulk)
+{
+	int i, ret;
+
+	for (i = 0; i < bulk->count; i++) {
+		ret = reset_assert(&bulk->resets[i]);
+		if (ret < 0)
+			return ret;
+	}
+
+	return 0;
+}
+
 int reset_deassert(struct reset_ctl *reset_ctl)
 {
 	struct reset_ops *ops = reset_dev_ops(reset_ctl->dev);
@@ -135,6 +182,19 @@ int reset_deassert(struct reset_ctl *reset_ctl)
 	return ops->rst_deassert(reset_ctl);
 }
 
+int reset_deassert_bulk(struct reset_ctl_bulk *bulk)
+{
+	int i, ret;
+
+	for (i = 0; i < bulk->count; i++) {
+		ret = reset_deassert(&bulk->resets[i]);
+		if (ret < 0)
+			return ret;
+	}
+
+	return 0;
+}
+
 int reset_release_all(struct reset_ctl *reset_ctl, int count)
 {
 	int i, ret;
diff --git a/include/reset.h b/include/reset.h
index 7185ade7ac..d38f1765ec 100644
--- a/include/reset.h
+++ b/include/reset.h
@@ -60,6 +60,24 @@ struct reset_ctl {
 	unsigned long id;
 };
 
+/**
+ * struct reset_ctl_bulk - A handle to (allowing control of) a bulk of reset
+ * signals.
+ *
+ * Clients provide storage for the reset control bulk. The content of the
+ * structure is managed solely by the reset API. A reset control bulk struct is
+ * initialized by "get"ing the reset control bulk struct.
+ * The reset control bulk struct is passed to all other bulk reset APIs to apply
+ * the API to all the reset signals in the bulk struct.
+ *
+ * @resets: An array of reset signal handles handles.
+ * @count: The number of reset signal handles in the reset array.
+ */
+struct reset_ctl_bulk {
+	struct reset_ctl *resets;
+	unsigned int count;
+};
+
 #ifdef CONFIG_DM_RESET
 /**
  * reset_get_by_index - Get/request a reset signal by integer index.
@@ -80,6 +98,22 @@ struct reset_ctl {
 int reset_get_by_index(struct udevice *dev, int index,
 		       struct reset_ctl *reset_ctl);
 
+/**
+ * reset_get_bulk - Get/request all reset signals of a device.
+ *
+ * This looks up and requests all reset signals of the client device; each
+ * device is assumed to have n reset signals associated with it somehow,
+ * and this function finds and requests all of them in a separate structure.
+ * The mapping of client device reset signals indices to provider reset signals
+ * may be via device-tree properties, board-provided mapping tables, or some
+ * other mechanism.
+ *
+ * @dev:	The client device.
+ * @bulk	A pointer to a reset control bulk struct to initialize.
+ * @return 0 if OK, or a negative error code.
+ */
+int reset_get_bulk(struct udevice *dev, struct reset_ctl_bulk *bulk);
+
 /**
  * reset_get_by_name - Get/request a reset signal by name.
  *
@@ -131,6 +165,21 @@ int reset_free(struct reset_ctl *reset_ctl);
  */
 int reset_assert(struct reset_ctl *reset_ctl);
 
+/**
+ * reset_assert_bulk - Assert all reset signals in a reset control bulk struct.
+ *
+ * This function will assert the specified reset signals in a reset control
+ * bulk struct, thus resetting the affected HW module(s). Depending on the
+ * reset controller hardware, the reset signals will either stay asserted
+ * until reset_deassert_bulk() is called, or the hardware may autonomously
+ * clear the reset signals itself.
+ *
+ * @bulk:	A reset control bulk struct that was previously successfully
+ *		requested by reset_get_bulk().
+ * @return 0 if OK, or a negative error code.
+ */
+int reset_assert_bulk(struct reset_ctl_bulk *bulk);
+
 /**
  * reset_deassert - Deassert a reset signal.
  *
@@ -144,6 +193,20 @@ int reset_assert(struct reset_ctl *reset_ctl);
  */
 int reset_deassert(struct reset_ctl *reset_ctl);
 
+/**
+ * reset_deassert_bulk - Deassert all reset signals in a reset control bulk
+ * struct.
+ *
+ * This function will deassert the specified reset signals in a reset control
+ * bulk struct, thus releasing the affected HW modules() from reset, and
+ * allowing them to continue normal operation.
+ *
+ * @bulk:	A reset control bulk struct that was previously successfully
+ *		requested by reset_get_bulk().
+ * @return 0 if OK, or a negative error code.
+ */
+int reset_deassert_bulk(struct reset_ctl_bulk *bulk);
+
 /**
  * reset_release_all - Assert/Free an array of previously requested resets.
  *
@@ -156,6 +219,23 @@ int reset_deassert(struct reset_ctl *reset_ctl);
  * @return 0 if OK, or a negative error code.
  */
 int reset_release_all(struct reset_ctl *reset_ctl, int count);
+
+/**
+ * reset_release_bulk - Assert/Free an array of previously requested reset
+ * signals in a reset control bulk struct.
+ *
+ * For each reset contained in the reset control bulk struct, this function
+ * will check if reset has been previously requested and then will assert
+ * and free it.
+ *
+ * @bulk:	A reset control bulk struct that was previously successfully
+ *		requested by reset_get_bulk().
+ * @return 0 if OK, or a negative error code.
+ */
+static inline int reset_release_bulk(struct reset_ctl_bulk *bulk)
+{
+	return reset_release_all(bulk->resets, bulk->count);
+}
 #else
 static inline int reset_get_by_index(struct udevice *dev, int index,
 				     struct reset_ctl *reset_ctl)
@@ -163,6 +243,11 @@ static inline int reset_get_by_index(struct udevice *dev, int index,
 	return -ENOTSUPP;
 }
 
+static inline int reset_get_bulk(struct udevice *dev, struct clk_bulk *bulk)
+{
+	return -ENOTSUPP;
+}
+
 static inline int reset_get_by_name(struct udevice *dev, const char *name,
 				    struct reset_ctl *reset_ctl)
 {
@@ -179,16 +264,30 @@ static inline int reset_assert(struct reset_ctl *reset_ctl)
 	return 0;
 }
 
+static inline int reset_assert_bulk(struct reset_ctl_bulk *bulk)
+{
+	return 0;
+}
+
 static inline int reset_deassert(struct reset_ctl *reset_ctl)
 {
 	return 0;
 }
 
+static inline int reset_deassert_bulk(struct reset_ctl_bulk *bulk)
+{
+	return 0;
+}
+
 static inline int reset_release_all(struct reset_ctl *reset_ctl, int count)
 {
 	return 0;
 }
 
+static inline int reset_release_bulk(struct clk_bulk *bulk)
+{
+	return 0;
+}
 #endif
 
 #endif

commit 75b27a42f165ff18c7288908d764a57bd7bd1122
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Sun Mar 18 13:12:14 2018 +0100

    UPSTREAM: usb: f_mass_storage: simplify logical expression
    
    An unsigned int is always >= 0.
    
    Change-Id: Iba5723469069b0155bcaca876071e32679a0437d
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 48cdfa2f8177dbdfc77c365c0f3f918ceadbe484)

diff --git a/drivers/usb/gadget/f_mass_storage.c b/drivers/usb/gadget/f_mass_storage.c
index 7a66a3e1f8..dd9d045adb 100644
--- a/drivers/usb/gadget/f_mass_storage.c
+++ b/drivers/usb/gadget/f_mass_storage.c
@@ -1749,7 +1749,7 @@ static int check_command(struct fsg_common *common, int cmnd_size,
 		    common->lun, lun);
 
 	/* Check the LUN */
-	if (common->lun >= 0 && common->lun < common->nluns) {
+	if (common->lun < common->nluns) {
 		curlun = &common->luns[common->lun];
 		if (common->cmnd[0] != SC_REQUEST_SENSE) {
 			curlun->sense_data = SS_NO_SENSE;

commit dd2dbc26752454f39dc4cf2fb9fe84298de9516f
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Sun Mar 18 13:05:58 2018 +0100

    UPSTREAM: usb: gadget: remove duplicate assignment.
    
    We should not make the same assignement twice.
    
    Change-Id: Ic68e484297b575ff965b3dc21a9a2d7ce06bc08c
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit fa9da8ee60a7387b9e9b0358bd73ef5dbc73736c)

diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c
index 5f604824e6..164d869c8c 100644
--- a/drivers/usb/gadget/composite.c
+++ b/drivers/usb/gadget/composite.c
@@ -167,7 +167,7 @@ static int config_buf(struct usb_configuration *config,
 	int				len = USB_BUFSIZ - USB_DT_CONFIG_SIZE;
 	void				*next = buf + USB_DT_CONFIG_SIZE;
 	struct usb_descriptor_header    **descriptors;
-	struct usb_config_descriptor	*c = buf;
+	struct usb_config_descriptor	*c;
 	int				status;
 	struct usb_function		*f;
 

commit 310695f3d2cc1d7d735b2cdb375c761c1c53e071
Author: Alex Kiernan <alex.kiernan@gmail.com>
Date:   Thu Apr 19 04:32:57 2018 +0000

    UPSTREAM: spl: disk: usb: Add dependencies to sprintf/strto*
    
    If SPL serial support is disabled nothing brings in sprintf, snprintf
    or simple_strtoul:
    
      env/built-in.o: In function `regex_callback':
      env/attr.c:128: undefined reference to `sprintf'
      disk/built-in.o: In function `blk_get_device_by_str':
      disk/part.c:386: undefined reference to `simple_strtoul'
      disk/part.c:395: undefined reference to `simple_strtoul'
      disk/built-in.o: In function `blk_get_device_part_str':
      disk/part.c:522: undefined reference to `simple_strtoul'
      disk/built-in.o: In function `part_set_generic_name':
      disk/part.c:704: undefined reference to `sprintf'
      drivers/built-in.o: In function `init_peripheral_ep':
      drivers/usb/musb-new/musb_gadget.c:1826: undefined reference to `sprintf'
      drivers/built-in.o: In function `musb_core_init':
      drivers/usb/musb-new/musb_core.c:1451: undefined reference to `snprintf'
    
    Add those dependencies here.
    
    Change-Id: I3512dc53bc93a556aee250d98d1a5977d9e2a537
    Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit ab9e12f651d9211aa0d3c9b9e579c38bd8704054)

diff --git a/disk/Kconfig b/disk/Kconfig
index c5d30331ce..3bebfb68d7 100644
--- a/disk/Kconfig
+++ b/disk/Kconfig
@@ -4,6 +4,10 @@ menu "Partition Types"
 config PARTITIONS
 	bool "Enable Partition Labels (disklabels) support"
 	default y
+	select SPL_SPRINTF if SPL
+	select TPL_SPRINTF if TPL
+	select SPL_STRTO if SPL
+	select TPL_STRTO if TPL
 	help
 	  Partition Labels (disklabels) Supported:
 	  Zero or more of the following:
diff --git a/drivers/usb/musb-new/Kconfig b/drivers/usb/musb-new/Kconfig
index caba42c26f..81a0ffd9ea 100644
--- a/drivers/usb/musb-new/Kconfig
+++ b/drivers/usb/musb-new/Kconfig
@@ -5,12 +5,16 @@ comment "MUSB Controller Driver"
 
 config USB_MUSB_HOST
 	bool "MUSB host mode support"
+	select SPL_SPRINTF if SPL
+	select TPL_SPRINTF if TPL
 	help
 	  Enables the MUSB USB dual-role controller in host mode.
 
 config USB_MUSB_GADGET
 	bool "MUSB gadget mode support"
 	select USB_GADGET_DUALSPEED
+	select SPL_SPRINTF if SPL
+	select TPL_SPRINTF if TPL
 	help
 	  Enables the MUSB USB dual-role controller in gadget mode.
 

commit 088d8eb9be6001e4c1be13ee95c2beb044456c72
Author: Christophe Kerello <christophe.kerello@st.com>
Date:   Thu Mar 15 09:34:17 2018 +0100

    UPSTREAM: usb: gadget: composite: fix NULL pointer when a non standard request is received
    
    In case usb configuration is unknown (cdev->config == NULL), non standard
    request should not be processed.
    Remove also the cdev->config check below which will never happen.
    
    This issue was seen using ums feature.
    
    Change-Id: I6930deeceadf0eff8e4bfbfb6fdfb254d47a4c83
    Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
    Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit d57ed4d9f2cb6abc9438104f321b4fe3bc829d57)

diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c
index eddb45bf27..5f604824e6 100644
--- a/drivers/usb/gadget/composite.c
+++ b/drivers/usb/gadget/composite.c
@@ -951,6 +951,9 @@ unknown:
 			ctrl->bRequestType, ctrl->bRequest,
 			w_value, w_index, w_length);
 
+		if (!cdev->config)
+			goto done;
+
 		/*
 		 * functions always handle their interfaces and endpoints...
 		 * punt other recipients (other, WUSB, ...) to the current
@@ -1001,7 +1004,7 @@ unknown:
 			value = f->setup(f, ctrl);
 		else {
 			c = cdev->config;
-			if (c && c->setup)
+			if (c->setup)
 				value = c->setup(c, ctrl);
 		}
 

commit 3056fcd3568460178aa6d76b0c8fff385fbc3d79
Author: Neil Armstrong <narmstrong@baylibre.com>
Date:   Wed Apr 25 11:39:08 2018 +0200

    UPSTREAM: usb: host: dwc3: fix phys init
    
    When no PHYs are declared in the dwc3 node, the phy init fails.
    This patch checks if the "phys" property is presend and reports
    the error returned by dev_count_phandle_with_args().
    
    This patchs also fixes the styles issues added in last commit.
    
    This patch should fix the DWC3 support on the UniPhier SoC family.
    
    Change-Id: I59c50f81dfd695a2a8047ed13c1af21af64b044b
    Fixes: 7c839ea70c49 ("usb: host: dwc3: Add support for multiple PHYs")
    Reported-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 003659bda94a1444ebdfefea3f0928f8e90f9d8f)

diff --git a/drivers/usb/host/xhci-dwc3.c b/drivers/usb/host/xhci-dwc3.c
index c1007350b7..adfa4a75cd 100644
--- a/drivers/usb/host/xhci-dwc3.c
+++ b/drivers/usb/host/xhci-dwc3.c
@@ -113,16 +113,21 @@ void dwc3_set_fladj(struct dwc3 *dwc3_reg, u32 val)
 }
 
 #ifdef CONFIG_DM_USB
-static int xhci_dwc3_setup_phy(struct udevice *dev, int count)
+static int xhci_dwc3_setup_phy(struct udevice *dev)
 {
 	struct xhci_dwc3_platdata *plat = dev_get_platdata(dev);
-	int i, ret;
+	int i, ret, count;
 
-	if (!count)
+	/* Return if no phy declared */
+	if (!dev_read_prop(dev, "phys", NULL))
 		return 0;
 
+	count = dev_count_phandle_with_args(dev, "phys", "#phy-cells");
+	if (count <= 0)
+		return count;
+
 	plat->usb_phys = devm_kcalloc(dev, count, sizeof(struct phy),
-					GFP_KERNEL);
+				      GFP_KERNEL);
 	if (!plat->usb_phys)
 		return -ENOMEM;
 
@@ -136,7 +141,7 @@ static int xhci_dwc3_setup_phy(struct udevice *dev, int count)
 
 		++plat->num_phys;
 	}
-	
+
 	for (i = 0; i < plat->num_phys; i++) {
 		ret = generic_phy_init(&plat->usb_phys[i]);
 		if (ret) {
@@ -145,7 +150,7 @@ static int xhci_dwc3_setup_phy(struct udevice *dev, int count)
 			goto phys_init_err;
 		}
 	}
-	
+
 	for (i = 0; i < plat->num_phys; i++) {
 		ret = generic_phy_power_on(&plat->usb_phys[i]);
 		if (ret) {
@@ -157,7 +162,6 @@ static int xhci_dwc3_setup_phy(struct udevice *dev, int count)
 
 	return 0;
 
-
 phys_poweron_err:
 	for (; i >= 0; i--)
 		generic_phy_power_off(&plat->usb_phys[i]);
@@ -187,7 +191,7 @@ static int xhci_dwc3_shutdown_phy(struct udevice *dev)
 		ret |= generic_phy_exit(&plat->usb_phys[i]);
 		if (ret) {
 			pr_err("Can't shutdown USB PHY%d for %s\n",
-				i, dev->name);
+			       i, dev->name);
 		}
 	}
 
@@ -206,8 +210,7 @@ static int xhci_dwc3_probe(struct udevice *dev)
 	hcor = (struct xhci_hcor *)((uintptr_t)hccr +
 			HC_LENGTH(xhci_readl(&(hccr)->cr_capbase)));
 
-	ret = xhci_dwc3_setup_phy(dev, dev_count_phandle_with_args(
-						dev, "phys", "#phy-cells"));
+	ret = xhci_dwc3_setup_phy(dev);
 	if (ret)
 		return ret;
 

commit 2aad62fa1bb77da9a9af1881719427a610b3f57c
Author: Neil Armstrong <narmstrong@baylibre.com>
Date:   Thu Apr 12 10:13:50 2018 +0200

    UPSTREAM: usb: dwc3-of-simple: fix error check of clk_get_bulk when disabled
    
    The disabled clk API returns -ENOSYS unlike the reset API returning -ENOTSUPP.
    
    Change-Id: I4473e78c1ebc5c945515694b4041b22a48f36d34
    Fixes: ca7fdc8b1267 ("usb: host: Add simple of glue driver for DWC3 USB Controllers integration")
    Reported-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 38276090ee7fda6b31cac638d8c5f4fb61f57b0b)

diff --git a/drivers/usb/host/dwc3-of-simple.c b/drivers/usb/host/dwc3-of-simple.c
index abc3928f8b..440dd1027d 100644
--- a/drivers/usb/host/dwc3-of-simple.c
+++ b/drivers/usb/host/dwc3-of-simple.c
@@ -50,7 +50,7 @@ static int dwc3_of_simple_clk_init(struct udevice *dev,
 	int ret;
 
 	ret = clk_get_bulk(dev, &simple->clks);
-	if (ret == -ENOTSUPP)
+	if (ret == -ENOSYS)
 		return 0;
 	if (ret)
 		return ret;

commit dc229bd7f91c7df0b348eae36307069277b3da0b
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Thu Apr 12 10:41:11 2018 +0200

    UPSTREAM: usb: dwc3-of-simple: Add support for DRA7/AM57 platforms.
    
    Add the compatibility with "ti,dwc3" and enable it by default if DM_USB
    is enabled.
    
    Change-Id: Ic0a89dad93c6ec22102a0475b802da80e76fbb09
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit cc73ba97c008e96df5799dc37acbb04344fb3ac6)

diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 485bc2d42f..8f0a00e479 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -24,6 +24,7 @@ config USB_XHCI_DWC3
 config USB_XHCI_DWC3_OF_SIMPLE
 	bool "DesignWare USB3 DRD Generic OF Simple Glue Layer"
 	depends on DM_USB
+	default y if DRA7XX
 	help
 	  Support USB2/3 functionality in simple SoC integrations with
 	  USB controller based on the DesignWare USB3 IP Core.
diff --git a/drivers/usb/host/dwc3-of-simple.c b/drivers/usb/host/dwc3-of-simple.c
index 54a5f60b52..abc3928f8b 100644
--- a/drivers/usb/host/dwc3-of-simple.c
+++ b/drivers/usb/host/dwc3-of-simple.c
@@ -95,6 +95,7 @@ static int dwc3_of_simple_remove(struct udevice *dev)
 
 static const struct udevice_id dwc3_of_simple_ids[] = {
 	{ .compatible = "amlogic,meson-gxl-dwc3" },
+	{ .compatible = "ti,dwc3" },
 	{ }
 };
 

commit 9c0fd9e6849f9ed26fb7fca78f3c43e00bc4d9b3
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Thu Apr 12 10:41:10 2018 +0200

    UPSTREAM: usb: dwc3-of-simple: Fix dependencies
    
    This simple glue layer does not require CONFIG_MISC, but it does require
    CONFIG_DM_USB.
    
    Change-Id: I02e2b228cd259f4ee25bcdcb501f92e7ecbb9242
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 103774b71cc0e510f890f639f9c3a65ad9d005c9)

diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 6595c71c14..485bc2d42f 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -23,7 +23,7 @@ config USB_XHCI_DWC3
 
 config USB_XHCI_DWC3_OF_SIMPLE
 	bool "DesignWare USB3 DRD Generic OF Simple Glue Layer"
-	select MISC
+	depends on DM_USB
 	help
 	  Support USB2/3 functionality in simple SoC integrations with
 	  USB controller based on the DesignWare USB3 IP Core.

commit 3cdbc0574bbbb2c10578e0e8bd324a192ca71e4a
Author: Neil Armstrong <narmstrong@baylibre.com>
Date:   Wed Apr 11 17:08:01 2018 +0200

    UPSTREAM: usb: host: dwc3: Add support for multiple PHYs
    
    DWC3 Ips can have more than 1 PHY for USB2 and 1 PHY for USB3, add support
    for a generic number of PHYs and adapt the code to handle a generic
    number of PHYs.
    
    Change-Id: Iaea6c612c8b4c8b2bc0e03303e45371db5630c35
    Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 7c839ea70c4991e8d4c322e074359ac5e155d59d)

diff --git a/drivers/usb/host/xhci-dwc3.c b/drivers/usb/host/xhci-dwc3.c
index 1022dd5512..c1007350b7 100644
--- a/drivers/usb/host/xhci-dwc3.c
+++ b/drivers/usb/host/xhci-dwc3.c
@@ -22,8 +22,8 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 struct xhci_dwc3_platdata {
-	struct phy usb_phy;
-	struct phy usb3_phy;
+	struct phy *usb_phys;
+	int num_phys;
 };
 
 void dwc3_set_mode(struct dwc3 *dwc3_reg, u32 mode)
@@ -113,45 +113,82 @@ void dwc3_set_fladj(struct dwc3 *dwc3_reg, u32 val)
 }
 
 #ifdef CONFIG_DM_USB
-static int xhci_dwc3_setup_phy(struct udevice *dev, int index, struct phy *phy)
+static int xhci_dwc3_setup_phy(struct udevice *dev, int count)
 {
-	int ret = 0;
+	struct xhci_dwc3_platdata *plat = dev_get_platdata(dev);
+	int i, ret;
+
+	if (!count)
+		return 0;
 
-	ret = generic_phy_get_by_index(dev, index, phy);
-	if (ret) {
-		if (ret != -ENOENT) {
-			pr_err("Failed to get USB PHY for %s\n", dev->name);
+	plat->usb_phys = devm_kcalloc(dev, count, sizeof(struct phy),
+					GFP_KERNEL);
+	if (!plat->usb_phys)
+		return -ENOMEM;
+
+	for (i = 0; i < count; i++) {
+		ret = generic_phy_get_by_index(dev, i, &plat->usb_phys[i]);
+		if (ret && ret != -ENOENT) {
+			pr_err("Failed to get USB PHY%d for %s\n",
+			       i, dev->name);
 			return ret;
 		}
-	} else {
-		ret = generic_phy_init(phy);
+
+		++plat->num_phys;
+	}
+	
+	for (i = 0; i < plat->num_phys; i++) {
+		ret = generic_phy_init(&plat->usb_phys[i]);
 		if (ret) {
-			pr_err("Can't init USB PHY for %s\n", dev->name);
-			return ret;
+			pr_err("Can't init USB PHY%d for %s\n",
+			       i, dev->name);
+			goto phys_init_err;
 		}
-		ret = generic_phy_power_on(phy);
+	}
+	
+	for (i = 0; i < plat->num_phys; i++) {
+		ret = generic_phy_power_on(&plat->usb_phys[i]);
 		if (ret) {
-			pr_err("Can't power on USB PHY for %s\n", dev->name);
-			generic_phy_exit(phy);
-			return ret;
+			pr_err("Can't power USB PHY%d for %s\n",
+			       i, dev->name);
+			goto phys_poweron_err;
 		}
 	}
 
 	return 0;
+
+
+phys_poweron_err:
+	for (; i >= 0; i--)
+		generic_phy_power_off(&plat->usb_phys[i]);
+
+	for (i = 0; i < plat->num_phys; i++)
+		generic_phy_exit(&plat->usb_phys[i]);
+
+	return ret;
+
+phys_init_err:
+	for (; i >= 0; i--)
+		generic_phy_exit(&plat->usb_phys[i]);
+
+	return ret;
 }
 
-static int xhci_dwc3_shutdown_phy(struct phy *phy)
+static int xhci_dwc3_shutdown_phy(struct udevice *dev)
 {
-	int ret = 0;
+	struct xhci_dwc3_platdata *plat = dev_get_platdata(dev);
+	int i, ret;
 
-	if (generic_phy_valid(phy)) {
-		ret = generic_phy_power_off(phy);
-		if (ret)
-			return ret;
+	for (i = 0; i < plat->num_phys; i++) {
+		if (!generic_phy_valid(&plat->usb_phys[i]))
+			continue;
 
-		ret = generic_phy_exit(phy);
-		if (ret)
-			return ret;
+		ret = generic_phy_power_off(&plat->usb_phys[i]);
+		ret |= generic_phy_exit(&plat->usb_phys[i]);
+		if (ret) {
+			pr_err("Can't shutdown USB PHY%d for %s\n",
+				i, dev->name);
+		}
 	}
 
 	return 0;
@@ -159,7 +196,6 @@ static int xhci_dwc3_shutdown_phy(struct phy *phy)
 
 static int xhci_dwc3_probe(struct udevice *dev)
 {
-	struct xhci_dwc3_platdata *plat = dev_get_platdata(dev);
 	struct xhci_hcor *hcor;
 	struct xhci_hccr *hccr;
 	struct dwc3 *dwc3_reg;
@@ -170,18 +206,10 @@ static int xhci_dwc3_probe(struct udevice *dev)
 	hcor = (struct xhci_hcor *)((uintptr_t)hccr +
 			HC_LENGTH(xhci_readl(&(hccr)->cr_capbase)));
 
-	ret = xhci_dwc3_setup_phy(dev, 0, &plat->usb_phy);
-	if (ret) {
-		pr_err("Failed to setup USB PHY for %s\n", dev->name);
+	ret = xhci_dwc3_setup_phy(dev, dev_count_phandle_with_args(
+						dev, "phys", "#phy-cells"));
+	if (ret)
 		return ret;
-	}
-
-	ret = xhci_dwc3_setup_phy(dev, 1, &plat->usb3_phy);
-	if (ret) {
-		pr_err("Failed to setup USB3 PHY for %s\n", dev->name);
-		xhci_dwc3_shutdown_phy(&plat->usb_phy);
-		return ret;
-	}
 
 	dwc3_reg = (struct dwc3 *)((char *)(hccr) + DWC3_REG_OFFSET);
 
@@ -199,16 +227,7 @@ static int xhci_dwc3_probe(struct udevice *dev)
 
 static int xhci_dwc3_remove(struct udevice *dev)
 {
-	struct xhci_dwc3_platdata *plat = dev_get_platdata(dev);
-	int ret;
-
-	ret = xhci_dwc3_shutdown_phy(&plat->usb_phy);
-	if (ret)
-		pr_err("Can't shutdown USB PHY for %s\n", dev->name);
-
-	ret = xhci_dwc3_shutdown_phy(&plat->usb3_phy);
-	if (ret)
-		pr_err("Can't shutdown USB3 PHY for %s\n", dev->name);
+	xhci_dwc3_shutdown_phy(dev);
 
 	return xhci_deregister(dev);
 }

commit 8e0c702beb34a314587d6232cf5b4d5900f6af6f
Author: Neil Armstrong <narmstrong@baylibre.com>
Date:   Wed Apr 11 17:08:00 2018 +0200

    UPSTREAM: usb: host: Add simple of glue driver for DWC3 USB Controllers integration
    
    This is a port of the dwc3-of-simple driver from Linux to enable/deassert
    clock and resets of a simple DWC3 Controller HW glue.
    
    Change-Id: I9fa64dcd401e3946a1924ef249b64f419f76fe0c
    Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit ca7fdc8b1267ad0189060c853502761086c8d74a)

diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 526340412f..6595c71c14 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -21,6 +21,13 @@ config USB_XHCI_DWC3
 	  Say Y or if your system has a Dual Role SuperSpeed
 	  USB controller based on the DesignWare USB3 IP Core.
 
+config USB_XHCI_DWC3_OF_SIMPLE
+	bool "DesignWare USB3 DRD Generic OF Simple Glue Layer"
+	select MISC
+	help
+	  Support USB2/3 functionality in simple SoC integrations with
+	  USB controller based on the DesignWare USB3 IP Core.
+
 config USB_XHCI_MVEBU
 	bool "MVEBU USB 3.0 support"
 	default y
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 915d531e7a..236058f224 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -49,6 +49,7 @@ obj-$(CONFIG_USB_EHCI_ZYNQ) += ehci-zynq.o
 # xhci
 obj-$(CONFIG_USB_XHCI_HCD) += xhci.o xhci-mem.o xhci-ring.o
 obj-$(CONFIG_USB_XHCI_DWC3) += xhci-dwc3.o
+obj-$(CONFIG_USB_XHCI_DWC3_OF_SIMPLE) += dwc3-of-simple.o
 obj-$(CONFIG_USB_XHCI_ROCKCHIP) += xhci-rockchip.o
 obj-$(CONFIG_USB_XHCI_ZYNQMP) += xhci-zynqmp.o
 obj-$(CONFIG_USB_XHCI_KEYSTONE) += xhci-keystone.o
diff --git a/drivers/usb/host/dwc3-of-simple.c b/drivers/usb/host/dwc3-of-simple.c
new file mode 100644
index 0000000000..54a5f60b52
--- /dev/null
+++ b/drivers/usb/host/dwc3-of-simple.c
@@ -0,0 +1,109 @@
+/*
+ * dwc3-of-simple.c - OF glue layer for simple integrations
+ *
+ * Copyright (c) 2015 Texas Instruments Incorporated - http://www.ti.com
+ *
+ * Author: Felipe Balbi <balbi@ti.com>
+ *
+ * Copyright (C) 2018 BayLibre, SAS
+ * Author: Neil Armstrong <narmstron@baylibre.com>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <fdtdec.h>
+#include <reset.h>
+#include <clk.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct dwc3_of_simple {
+	struct clk_bulk		clks;
+	struct reset_ctl_bulk	resets;
+};
+
+static int dwc3_of_simple_reset_init(struct udevice *dev,
+				     struct dwc3_of_simple *simple)
+{
+	int ret;
+
+	ret = reset_get_bulk(dev, &simple->resets);
+	if (ret == -ENOTSUPP)
+		return 0;
+	else if (ret)
+		return ret;
+
+	ret = reset_deassert_bulk(&simple->resets);
+	if (ret) {
+		reset_release_bulk(&simple->resets);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int dwc3_of_simple_clk_init(struct udevice *dev,
+				   struct dwc3_of_simple *simple)
+{
+	int ret;
+
+	ret = clk_get_bulk(dev, &simple->clks);
+	if (ret == -ENOTSUPP)
+		return 0;
+	if (ret)
+		return ret;
+
+#if CONFIG_IS_ENABLED(CLK)
+	ret = clk_enable_bulk(&simple->clks);
+	if (ret) {
+		clk_release_bulk(&simple->clks);
+		return ret;
+	}
+#endif
+
+	return 0;
+}
+
+static int dwc3_of_simple_probe(struct udevice *dev)
+{
+	struct dwc3_of_simple *simple = dev_get_platdata(dev);
+	int ret;
+
+	ret = dwc3_of_simple_clk_init(dev, simple);
+	if (ret)
+		return ret;
+
+	ret = dwc3_of_simple_reset_init(dev, simple);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
+static int dwc3_of_simple_remove(struct udevice *dev)
+{
+	struct dwc3_of_simple *simple = dev_get_platdata(dev);
+
+	reset_release_bulk(&simple->resets);
+
+	clk_release_bulk(&simple->clks);
+
+	return dm_scan_fdt_dev(dev);
+}
+
+static const struct udevice_id dwc3_of_simple_ids[] = {
+	{ .compatible = "amlogic,meson-gxl-dwc3" },
+	{ }
+};
+
+U_BOOT_DRIVER(dwc3_of_simple) = {
+	.name = "dwc3-of-simple",
+	.id = UCLASS_SIMPLE_BUS,
+	.of_match = dwc3_of_simple_ids,
+	.probe = dwc3_of_simple_probe,
+	.remove = dwc3_of_simple_remove,
+	.platdata_auto_alloc_size = sizeof(struct dwc3_of_simple),
+	.flags = DM_FLAG_ALLOC_PRIV_DMA,
+};

commit 9781b677e0aff22a71d2232508c24bd2e36ff718
Author: Alex Kiernan <alex.kiernan@gmail.com>
Date:   Sun Apr 1 09:22:36 2018 +0000

    UPSTREAM: usb: gadget: USB_ETHER requires network support
    
    In order to compile the USB Ethernet gadget support we require that NET
    is enabled, add that dependency here.
    
    Conflicts:
            drivers/usb/gadget/Kconfig
    
    Change-Id: I776612d3d67944646400ec9ca220652cb040803f
    Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
    Acked-by: Joe Hershberger <joe.hershberger@ni.com>
    (cherry picked from commit a18d1064db93490422b968bac1a9e10387a34cfc)

diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index 78faac74e9..33cb3dcd9a 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -138,6 +138,7 @@ endif # USB_GADGET_DOWNLOAD
 
 config USB_ETHER
 	bool "USB Ethernet Gadget"
+	depends on NET
 	help
 	  Creates an Ethernet network device through a USB peripheral
 	  controller. This will create a network interface on both the device

commit 071d6bebbd6a86dc15098709f469050b19edd64c
Author: Patrice Chotard <patrice.chotard@st.com>
Date:   Thu Mar 15 18:00:32 2018 +0100

    UPSTREAM: usb: dwc2: Replace printf, pr_err by dev_info, dev_err
    
    Replace printf() call by dev_info() and pr_err() by dev_err()
    
    Change-Id: I841f5ef56885e225d4903aad92b3f83b724a8e30
    Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit ac6c796c3f5c7b7594cf4ecede8cd8fb8d2611ba)

diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
index 2917fceef8..d90e036897 100644
--- a/drivers/usb/host/dwc2.c
+++ b/drivers/usb/host/dwc2.c
@@ -114,7 +114,7 @@ static void dwc_otg_flush_tx_fifo(struct dwc2_core_regs *regs, const int num)
 	ret = wait_for_bit_le32(&regs->grstctl, DWC2_GRSTCTL_TXFFLSH,
 				false, 1000, false);
 	if (ret)
-		printf("%s: Timeout!\n", __func__);
+		dev_info(dev, "%s: Timeout!\n", __func__);
 
 	/* Wait for 3 PHY Clocks */
 	udelay(1);
@@ -133,7 +133,7 @@ static void dwc_otg_flush_rx_fifo(struct dwc2_core_regs *regs)
 	ret = wait_for_bit_le32(&regs->grstctl, DWC2_GRSTCTL_RXFFLSH,
 				false, 1000, false);
 	if (ret)
-		printf("%s: Timeout!\n", __func__);
+		dev_info(dev, "%s: Timeout!\n", __func__);
 
 	/* Wait for 3 PHY Clocks */
 	udelay(1);
@@ -151,14 +151,14 @@ static void dwc_otg_core_reset(struct dwc2_core_regs *regs)
 	ret = wait_for_bit_le32(&regs->grstctl, DWC2_GRSTCTL_AHBIDLE,
 				true, 1000, false);
 	if (ret)
-		printf("%s: Timeout!\n", __func__);
+		dev_info(dev, "%s: Timeout!\n", __func__);
 
 	/* Core Soft Reset */
 	writel(DWC2_GRSTCTL_CSFTRST, &regs->grstctl);
 	ret = wait_for_bit_le32(&regs->grstctl, DWC2_GRSTCTL_CSFTRST,
 				false, 1000, false);
 	if (ret)
-		printf("%s: Timeout!\n", __func__);
+		dev_info(dev, "%s: Timeout!\n", __func__);
 
 	/*
 	 * Wait for core to come out of reset.
@@ -183,7 +183,7 @@ static int dwc_vbus_supply_init(struct udevice *dev)
 
 	ret = regulator_set_enable(priv->vbus_supply, true);
 	if (ret) {
-		pr_err("Error enabling vbus supply\n");
+		dev_err(dev, "Error enabling vbus supply\n");
 		return ret;
 	}
 
@@ -297,7 +297,7 @@ static void dwc_otg_core_host_init(struct udevice *dev,
 		ret = wait_for_bit_le32(&regs->hc_regs[i].hcchar,
 					DWC2_HCCHAR_CHEN, false, 1000, false);
 		if (ret)
-			printf("%s: Timeout!\n", __func__);
+			dev_info("%s: Timeout!\n", __func__);
 	}
 
 	/* Turn on the vbus power. */
@@ -1118,7 +1118,7 @@ int _submit_int_msg(struct dwc2_priv *priv, struct usb_device *dev,
 	timeout = get_timer(0) + USB_TIMEOUT_MS(pipe);
 	for (;;) {
 		if (get_timer(0) > timeout) {
-			printf("Timeout poll on interrupt endpoint\n");
+			dev_err(dev, "Timeout poll on interrupt endpoint\n");
 			return -ETIMEDOUT;
 		}
 		ret = _submit_bulk_msg(priv, dev, pipe, buffer, len);
@@ -1134,11 +1134,13 @@ static int dwc2_init_common(struct udevice *dev, struct dwc2_priv *priv)
 	int i, j;
 
 	snpsid = readl(&regs->gsnpsid);
-	printf("Core Release: %x.%03x\n", snpsid >> 12 & 0xf, snpsid & 0xfff);
+	dev_info(dev, "Core Release: %x.%03x\n",
+		 snpsid >> 12 & 0xf, snpsid & 0xfff);
 
 	if ((snpsid & DWC2_SNPSID_DEVID_MASK) != DWC2_SNPSID_DEVID_VER_2xx &&
 	    (snpsid & DWC2_SNPSID_DEVID_MASK) != DWC2_SNPSID_DEVID_VER_3xx) {
-		printf("SNPSID invalid (not DWC2 OTG device): %08x\n", snpsid);
+		dev_info(dev, "SNPSID invalid (not DWC2 OTG device): %08x\n",
+			 snpsid);
 		return -ENODEV;
 	}
 

commit 8d1c811e5c57f1ffad5d344eed3a810f10ff3dba
Author: Christophe Kerello <christophe.kerello@st.com>
Date:   Thu Mar 15 18:00:31 2018 +0100

    UPSTREAM: usb: dwc2: increase timeout in wait_for_chhltd
    
    This patch increases timeout to 2s.
    It was seen on 2 USB devices (Verbatim STORE N GO 070B4AED0FB22358 and
    USB DISK 2.0 9000729BA41DDF40) that the request sense command takes
    between 1.3s and and 1.5s.
    
    Change-Id: I3e241e2c731298cf238b31deea2785a08c012b73
    Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
    Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit c2e4c8656978302ff2846a655fb87c658220c4e0)

diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
index c41a0c5d95..2917fceef8 100644
--- a/drivers/usb/host/dwc2.c
+++ b/drivers/usb/host/dwc2.c
@@ -811,7 +811,7 @@ int wait_for_chhltd(struct dwc2_hc_regs *hc_regs, uint32_t *sub, u8 *toggle)
 	uint32_t hcint, hctsiz;
 
 	ret = wait_for_bit_le32(&hc_regs->hcint, DWC2_HCINT_CHHLTD, true,
-				1000, false);
+				2000, false);
 	if (ret)
 		return ret;
 

commit f7dd21876bb4ee933207be02a720116e5a85ab86
Author: Patrice Chotard <patrice.chotard@st.com>
Date:   Wed Mar 14 17:48:58 2018 +0100

    UPSTREAM: usb: ohci-generic: replace pr_err() by dev_err()
    
    As we get access to struct udevice, use dev_err() instead
    of pr_err().
    
    Conflicts:
            drivers/usb/host/ohci-generic.c
    
    Change-Id: Iead8650006d027d32910cd3dae24d934326f578f
    Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
    (cherry picked from commit 6048d42fa7a2b97913db9a033675bf267fb4e030)

diff --git a/drivers/usb/host/ohci-generic.c b/drivers/usb/host/ohci-generic.c
index e95b66b6b9..ba16d2dce8 100644
--- a/drivers/usb/host/ohci-generic.c
+++ b/drivers/usb/host/ohci-generic.c
@@ -97,15 +97,15 @@ static int ohci_usb_probe(struct udevice *dev)
 				break;
 
 			err = clk_enable(&priv->clocks[i]);
-			if (err && err != -ENOSYS) {
-				pr_err("failed to enable clock %d\n", i);
+			if (err) {
+				dev_err(dev, "failed to enable clock %d\n", i);
 				clk_free(&priv->clocks[i]);
 				goto clk_err;
 			}
 			priv->clock_count++;
 		}
 	} else if (clock_nb != -ENOENT) {
-		pr_err("failed to get clock phandle(%d)\n", clock_nb);
+		dev_err(dev, "failed to get clock phandle(%d)\n", clock_nb);
 		return clock_nb;
 	}
 
@@ -125,20 +125,19 @@ static int ohci_usb_probe(struct udevice *dev)
 
 			err = reset_deassert(&priv->resets[i]);
 			if (err) {
-				pr_err("failed to deassert reset %d\n", i);
+				dev_err(dev, "failed to deassert reset %d\n", i);
 				reset_free(&priv->resets[i]);
 				goto reset_err;
 			}
 			priv->reset_count++;
 		}
 	} else if (reset_nb != -ENOENT) {
-		pr_err("failed to get reset phandle(%d)\n", reset_nb);
+		dev_err(dev, "failed to get reset phandle(%d)\n", reset_nb);
 		goto clk_err;
 	}
 
 	err = ohci_setup_phy(dev, 0);
 	if (err)
-
 		goto reset_err;
 
 	regs = map_physmem(dev_read_addr(dev), 0x100, MAP_NOCACHE);
@@ -156,11 +155,11 @@ phy_err:
 reset_err:
 	ret = reset_release_all(priv->resets, priv->reset_count);
 	if (ret)
-		pr_err("failed to assert all resets\n");
+		dev_err(dev, "failed to assert all resets\n");
 clk_err:
 	ret = clk_release_all(priv->clocks, priv->clock_count);
 	if (ret)
-		pr_err("failed to disable all clocks\n");
+		dev_err(dev, "failed to disable all clocks\n");
 
 	return err;
 }

commit 8a1be4739b537c9cb0253ec3799baf434af9c9c7
Author: Patrice Chotard <patrice.chotard@st.com>
Date:   Wed Mar 14 17:48:57 2018 +0100

    UPSTREAM: usb: ohci-generic: factorize PHY operation
    
    Factorize PHY get/init/poweron and PHY poweroff/exit operations
    into separate function, it simplify the error path.
    
    Change-Id: I191c2690754972d689d6e4bbed0f5582a7f64a27
    Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit cab4d48a939537ab10e00429fc774825b743ed10)

diff --git a/drivers/usb/host/ohci-generic.c b/drivers/usb/host/ohci-generic.c
index bdaffef39a..e95b66b6b9 100644
--- a/drivers/usb/host/ohci-generic.c
+++ b/drivers/usb/host/ohci-generic.c
@@ -26,6 +26,56 @@ struct generic_ohci {
 	int reset_count;	/* number of reset in reset list */
 };
 
+static int ohci_setup_phy(struct udevice *dev, int index)
+{
+	struct generic_ohci *priv = dev_get_priv(dev);
+	int ret;
+
+	ret = generic_phy_get_by_index(dev, index, &priv->phy);
+	if (ret) {
+		if (ret != -ENOENT) {
+			dev_err(dev, "failed to get usb phy\n");
+			return ret;
+		}
+	} else {
+		ret = generic_phy_init(&priv->phy);
+		if (ret) {
+			dev_err(dev, "failed to init usb phy\n");
+			return ret;
+		}
+
+		ret = generic_phy_power_on(&priv->phy);
+		if (ret) {
+			dev_err(dev, "failed to power on usb phy\n");
+			return generic_phy_exit(&priv->phy);
+		}
+	}
+
+	return 0;
+}
+
+static int ohci_shutdown_phy(struct udevice *dev)
+{
+	struct generic_ohci *priv = dev_get_priv(dev);
+	int ret = 0;
+
+	if (generic_phy_valid(&priv->phy)) {
+		ret = generic_phy_power_off(&priv->phy);
+		if (ret) {
+			dev_err(dev, "failed to power off usb phy\n");
+			return ret;
+		}
+
+		ret = generic_phy_exit(&priv->phy);
+		if (ret) {
+			dev_err(dev, "failed to power off usb phy\n");
+			return ret;
+		}
+	}
+
+	return 0;
+}
+
 static int ohci_usb_probe(struct udevice *dev)
 {
 	struct ohci_regs *regs;
@@ -86,26 +136,10 @@ static int ohci_usb_probe(struct udevice *dev)
 		goto clk_err;
 	}
 
-	err = generic_phy_get_by_index(dev, 0, &priv->phy);
-	if (err) {
-		if (err != -ENOENT) {
-			pr_err("failed to get usb phy\n");
-			goto reset_err;
-		}
-	} else {
-
-		err = generic_phy_init(&priv->phy);
-		if (err) {
-			pr_err("failed to init usb phy\n");
-			goto reset_err;
-		}
+	err = ohci_setup_phy(dev, 0);
+	if (err)
 
-		err = generic_phy_power_on(&priv->phy);
-		if (err) {
-			dev_err(dev, "failed to power on usb phy\n");
-			goto phy_power_err;
-		}
-	}
+		goto reset_err;
 
 	regs = map_physmem(dev_read_addr(dev), 0x100, MAP_NOCACHE);
 	err = ohci_register(dev, regs);
@@ -115,18 +149,9 @@ static int ohci_usb_probe(struct udevice *dev)
 	return 0;
 
 phy_err:
-	if (generic_phy_valid(&priv->phy)) {
-		ret = generic_phy_power_off(&priv->phy);
-		if (ret)
-			dev_err(dev, "failed to power off usb phy\n");
-	}
-
-phy_power_err:
-	if (generic_phy_valid(&priv->phy)) {
-		ret = generic_phy_exit(&priv->phy);
-		if (ret)
-			pr_err("failed to release phy\n");
-	}
+	ret = ohci_shutdown_phy(dev);
+	if (ret)
+		dev_err(dev, "failed to shutdown usb phy\n");
 
 reset_err:
 	ret = reset_release_all(priv->resets, priv->reset_count);
@@ -149,15 +174,9 @@ static int ohci_usb_remove(struct udevice *dev)
 	if (ret)
 		return ret;
 
-	if (generic_phy_valid(&priv->phy)) {
-		ret = generic_phy_power_off(&priv->phy);
-		if (ret)
-			return ret;
-
-		ret = generic_phy_exit(&priv->phy);
-		if (ret)
-			return ret;
-	}
+	ret = ohci_shutdown_phy(dev);
+	if (ret)
+		return ret;
 
 	ret = reset_release_all(priv->resets, priv->reset_count);
 	if (ret)

commit 324810fcc3a0851ae0026e5326957a03b396728d
Author: Patrice Chotard <patrice.chotard@st.com>
Date:   Wed Mar 14 17:48:56 2018 +0100

    UPSTREAM: usb: ohci-generic: handle phy power on/off
    
    Add generic_phy_power_on() and generic_phy_power_off()
    calls to switch ON/OFF phy during probe and remove functions.
    
    Change-Id: Iea4dcb865e7c23c016e23601b20c77933258da87
    Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 633e1ec6bf7131d3c8fecbb4adcc96e17925a015)

diff --git a/drivers/usb/host/ohci-generic.c b/drivers/usb/host/ohci-generic.c
index bf5b2d79a4..bdaffef39a 100644
--- a/drivers/usb/host/ohci-generic.c
+++ b/drivers/usb/host/ohci-generic.c
@@ -99,6 +99,12 @@ static int ohci_usb_probe(struct udevice *dev)
 			pr_err("failed to init usb phy\n");
 			goto reset_err;
 		}
+
+		err = generic_phy_power_on(&priv->phy);
+		if (err) {
+			dev_err(dev, "failed to power on usb phy\n");
+			goto phy_power_err;
+		}
 	}
 
 	regs = map_physmem(dev_read_addr(dev), 0x100, MAP_NOCACHE);
@@ -109,6 +115,13 @@ static int ohci_usb_probe(struct udevice *dev)
 	return 0;
 
 phy_err:
+	if (generic_phy_valid(&priv->phy)) {
+		ret = generic_phy_power_off(&priv->phy);
+		if (ret)
+			dev_err(dev, "failed to power off usb phy\n");
+	}
+
+phy_power_err:
 	if (generic_phy_valid(&priv->phy)) {
 		ret = generic_phy_exit(&priv->phy);
 		if (ret)
@@ -137,6 +150,10 @@ static int ohci_usb_remove(struct udevice *dev)
 		return ret;
 
 	if (generic_phy_valid(&priv->phy)) {
+		ret = generic_phy_power_off(&priv->phy);
+		if (ret)
+			return ret;
+
 		ret = generic_phy_exit(&priv->phy);
 		if (ret)
 			return ret;

commit b653780c2135093a5cc09169bce5b4e9c6d59b46
Author: Patrice Chotard <patrice.chotard@st.com>
Date:   Wed Mar 14 17:48:55 2018 +0100

    UPSTREAM: usb: ehci-generic: replace pr_err() by dev_err()
    
    As we get access to struct udevice, use dev_err() instead
    of pr_err().
    
    Conflicts:
            drivers/usb/host/ehci-generic.c
    
    Change-Id: I7f97a466cee007c6c5b1ffd7fefd29ed7c528d54
    Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
    (cherry picked from commit df7777ab4386a5982d978a558e9b973085654c5e)

diff --git a/drivers/usb/host/ehci-generic.c b/drivers/usb/host/ehci-generic.c
index ae6c98270f..b012d8651f 100644
--- a/drivers/usb/host/ehci-generic.c
+++ b/drivers/usb/host/ehci-generic.c
@@ -100,8 +100,8 @@ static int ehci_usb_probe(struct udevice *dev)
 			if (err < 0)
 				break;
 			err = clk_enable(&priv->clocks[i]);
-			if (err && err != -ENOSYS) {
-				pr_err("failed to enable clock %d\n", i);
+			if (err) {
+				dev_err(dev, "failed to enable clock %d\n", i);
 				clk_free(&priv->clocks[i]);
 				goto clk_err;
 			}
@@ -109,7 +109,8 @@ static int ehci_usb_probe(struct udevice *dev)
 		}
 	} else {
 		if (clock_nb != -ENOENT) {
-			pr_err("failed to get clock phandle(%d)\n", clock_nb);
+			dev_err(dev, "failed to get clock phandle(%d)\n",
+				clock_nb);
 			return clock_nb;
 		}
 	}
@@ -130,7 +131,8 @@ static int ehci_usb_probe(struct udevice *dev)
 				break;
 
 			if (reset_deassert(&priv->resets[i])) {
-				pr_err("failed to deassert reset %d\n", i);
+				dev_err(dev, "failed to deassert reset %d\n",
+					i);
 				reset_free(&priv->resets[i]);
 				goto reset_err;
 			}
@@ -138,14 +140,14 @@ static int ehci_usb_probe(struct udevice *dev)
 		}
 	} else {
 		if (reset_nb != -ENOENT) {
-			pr_err("failed to get reset phandle(%d)\n", reset_nb);
+			dev_err(dev, "failed to get reset phandle(%d)\n",
+				reset_nb);
 			goto clk_err;
 		}
 	}
 
 	err = ehci_setup_phy(dev, 0);
 	if (err)
-
 		goto reset_err;
 
 	hccr = map_physmem(dev_read_addr(dev), 0x100, MAP_NOCACHE);
@@ -166,11 +168,11 @@ phy_err:
 reset_err:
 	ret = reset_release_all(priv->resets, priv->reset_count);
 	if (ret)
-		pr_err("failed to assert all resets\n");
+		dev_err(dev, "failed to assert all resets\n");
 clk_err:
 	ret = clk_release_all(priv->clocks, priv->clock_count);
 	if (ret)
-		pr_err("failed to disable all clocks\n");
+		dev_err(dev, "failed to disable all clocks\n");
 
 	return err;
 }

commit f06fcfdecf5b05ec6e73a93ee11e215b7c27269d
Author: Patrice Chotard <patrice.chotard@st.com>
Date:   Wed Mar 14 17:48:54 2018 +0100

    UPSTREAM: usb: ehci-generic: factorize PHY operation
    
    Factorize PHY get/init/poweron and PHY poweroff/exit operations
    into separate function, it simplify the error path.
    
    Change-Id: Ic59fcd93c52fc4908eb356b7e188cc5d48441645
    Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 20f06a48332d8dec255e3e808c3c97bb3222c2fd)

diff --git a/drivers/usb/host/ehci-generic.c b/drivers/usb/host/ehci-generic.c
index 8edf6abb7e..ae6c98270f 100644
--- a/drivers/usb/host/ehci-generic.c
+++ b/drivers/usb/host/ehci-generic.c
@@ -27,6 +27,56 @@ struct generic_ehci {
 	int reset_count;
 };
 
+static int ehci_setup_phy(struct udevice *dev, int index)
+{
+	struct generic_ehci *priv = dev_get_priv(dev);
+	int ret;
+
+	ret = generic_phy_get_by_index(dev, index, &priv->phy);
+	if (ret) {
+		if (ret != -ENOENT) {
+			dev_err(dev, "failed to get usb phy\n");
+			return ret;
+		}
+	} else {
+		ret = generic_phy_init(&priv->phy);
+		if (ret) {
+			dev_err(dev, "failed to init usb phy\n");
+			return ret;
+		}
+
+		ret = generic_phy_power_on(&priv->phy);
+		if (ret) {
+			dev_err(dev, "failed to power on usb phy\n");
+			return generic_phy_exit(&priv->phy);
+		}
+	}
+
+	return 0;
+}
+
+static int ehci_shutdown_phy(struct udevice *dev)
+{
+	struct generic_ehci *priv = dev_get_priv(dev);
+	int ret = 0;
+
+	if (generic_phy_valid(&priv->phy)) {
+		ret = generic_phy_power_off(&priv->phy);
+		if (ret) {
+			dev_err(dev, "failed to power off usb phy\n");
+			return ret;
+		}
+
+		ret = generic_phy_exit(&priv->phy);
+		if (ret) {
+			dev_err(dev, "failed to power off usb phy\n");
+			return ret;
+		}
+	}
+
+	return 0;
+}
+
 static int ehci_usb_probe(struct udevice *dev)
 {
 	struct generic_ehci *priv = dev_get_priv(dev);
@@ -93,26 +143,10 @@ static int ehci_usb_probe(struct udevice *dev)
 		}
 	}
 
-	err = generic_phy_get_by_index(dev, 0, &priv->phy);
-	if (err) {
-		if (err != -ENOENT) {
-			pr_err("failed to get usb phy\n");
-			goto reset_err;
-		}
-	} else {
-
-		err = generic_phy_init(&priv->phy);
-		if (err) {
-			pr_err("failed to init usb phy\n");
-			goto reset_err;
-		}
+	err = ehci_setup_phy(dev, 0);
+	if (err)
 
-		err = generic_phy_power_on(&priv->phy);
-		if (err) {
-			dev_err(dev, "failed to power on usb phy\n");
-			goto phy_power_err;
-		}
-	}
+		goto reset_err;
 
 	hccr = map_physmem(dev_read_addr(dev), 0x100, MAP_NOCACHE);
 	hcor = (struct ehci_hcor *)((uintptr_t)hccr +
@@ -125,18 +159,9 @@ static int ehci_usb_probe(struct udevice *dev)
 	return 0;
 
 phy_err:
-	if (generic_phy_valid(&priv->phy)) {
-		ret = generic_phy_power_off(&priv->phy);
-		if (ret)
-			dev_err(dev, "failed to power off usb phy\n");
-	}
-
-phy_power_err:
-	if (generic_phy_valid(&priv->phy)) {
-		ret = generic_phy_exit(&priv->phy);
-		if (ret)
-			pr_err("failed to release phy\n");
-	}
+	ret = ehci_shutdown_phy(dev);
+	if (ret)
+		dev_err(dev, "failed to shutdown usb phy\n");
 
 reset_err:
 	ret = reset_release_all(priv->resets, priv->reset_count);
@@ -159,15 +184,9 @@ static int ehci_usb_remove(struct udevice *dev)
 	if (ret)
 		return ret;
 
-	if (generic_phy_valid(&priv->phy)) {
-		ret = generic_phy_power_off(&priv->phy);
-		if (ret)
-			return ret;
-
-		ret = generic_phy_exit(&priv->phy);
-		if (ret)
-			return ret;
-	}
+	ret = ehci_shutdown_phy(dev);
+	if (ret)
+		return ret;
 
 	ret =  reset_release_all(priv->resets, priv->reset_count);
 	if (ret)

commit 3d54c05685e3526d0833231d2920a24fe6c8acbc
Author: Patrice Chotard <patrice.chotard@st.com>
Date:   Wed Mar 14 17:48:53 2018 +0100

    UPSTREAM: usb: ehci-generic: handle phy power on/off
    
    Add generic_phy_power_on() and generic_phy_power_off()
    calls to switch ON/OFF phy during probe and remove functions.
    
    Change-Id: Ic25c41efcdca60c303c218241eed3139b1323e35
    Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
    Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit a800a6793f095746173834ead6b3663bc3c0542c)

diff --git a/drivers/usb/host/ehci-generic.c b/drivers/usb/host/ehci-generic.c
index ad59aa8c19..8edf6abb7e 100644
--- a/drivers/usb/host/ehci-generic.c
+++ b/drivers/usb/host/ehci-generic.c
@@ -106,6 +106,12 @@ static int ehci_usb_probe(struct udevice *dev)
 			pr_err("failed to init usb phy\n");
 			goto reset_err;
 		}
+
+		err = generic_phy_power_on(&priv->phy);
+		if (err) {
+			dev_err(dev, "failed to power on usb phy\n");
+			goto phy_power_err;
+		}
 	}
 
 	hccr = map_physmem(dev_read_addr(dev), 0x100, MAP_NOCACHE);
@@ -119,6 +125,13 @@ static int ehci_usb_probe(struct udevice *dev)
 	return 0;
 
 phy_err:
+	if (generic_phy_valid(&priv->phy)) {
+		ret = generic_phy_power_off(&priv->phy);
+		if (ret)
+			dev_err(dev, "failed to power off usb phy\n");
+	}
+
+phy_power_err:
 	if (generic_phy_valid(&priv->phy)) {
 		ret = generic_phy_exit(&priv->phy);
 		if (ret)
@@ -147,6 +160,10 @@ static int ehci_usb_remove(struct udevice *dev)
 		return ret;
 
 	if (generic_phy_valid(&priv->phy)) {
+		ret = generic_phy_power_off(&priv->phy);
+		if (ret)
+			return ret;
+
 		ret = generic_phy_exit(&priv->phy);
 		if (ret)
 			return ret;

commit 69b8cf166f26c9cb5e5feab992bee78a31815582
Author: Stefan Roese <sr@denx.de>
Date:   Tue Mar 13 08:41:07 2018 +0100

    UPSTREAM: usb: Remove unused ppc4xx EHCI host driver
    
    ppc4xx support was removed some time ago. Lets remove the now unused
    EHCI driver and all its references for this platform as well.
    
    Change-Id: Id9f1759ed0aeb068d682b3d488ec8548a3afb6a5
    Signed-off-by: Stefan Roese <sr@denx.de>
    Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Cc: Marek Vasut <marex@denx.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 2715e32ce117f596053d3a133d465cbb3d16531c)

diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 3ffcf64ddf..915d531e7a 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -35,7 +35,6 @@ obj-$(CONFIG_USB_EHCI_MX5) += ehci-mx5.o
 obj-$(CONFIG_USB_EHCI_MX6) += ehci-mx6.o
 obj-$(CONFIG_USB_EHCI_MX7) += ehci-mx6.o
 obj-$(CONFIG_USB_EHCI_OMAP) += ehci-omap.o
-obj-$(CONFIG_USB_EHCI_PPC4XX) += ehci-ppc4xx.o
 obj-$(CONFIG_USB_EHCI_MARVELL) += ehci-marvell.o
 obj-$(CONFIG_USB_EHCI_MSM) += ehci-msm.o
 obj-$(CONFIG_USB_EHCI_PCI) += ehci-pci.o
diff --git a/drivers/usb/host/ehci-ppc4xx.c b/drivers/usb/host/ehci-ppc4xx.c
deleted file mode 100644
index 9d23577642..0000000000
--- a/drivers/usb/host/ehci-ppc4xx.c
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * (C) Copyright 2010, Chris Zhang <chris@seamicro.com>
- *
- * Author: Chris Zhang <chris@seamicro.com>
- * This code is based on ehci freescale driver
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-#include <common.h>
-#include <usb.h>
-#include <asm/io.h>
-
-#include "ehci.h"
-
-/*
- * Create the appropriate control structures to manage
- * a new EHCI host controller.
- */
-int ehci_hcd_init(int index, enum usb_init_type init,
-		struct ehci_hccr **hccr, struct ehci_hcor **hcor)
-{
-	*hccr = (struct ehci_hccr *)(CONFIG_SYS_PPC4XX_USB_ADDR);
-	*hcor = (struct ehci_hcor *)((uint32_t) *hccr +
-		HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
-	return 0;
-}
-
-/*
- * Destroy the appropriate control structures corresponding
- * the the EHCI host controller.
- */
-int ehci_hcd_stop(int index)
-{
-	return 0;
-}

commit a5a589c81ea440f9eb28ebf31b1ecf99ad10ec18
Author: Vignesh R <vigneshr@ti.com>
Date:   Wed Mar 7 14:50:10 2018 +0530

    UPSTREAM: ubs: xhci-dwc3: Enable USB3 PHY when available
    
    DWC3 USB3 controllers will need USB3 PHY to be enabled, in addition to
    USB2 PHY, to be functional. Therefore enable USB3 PHY when available.
    
    Change-Id: I84353e548c844d599d56df9702b75972f636a2b3
    Signed-off-by: Vignesh R <vigneshr@ti.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 2fd4242cc50e2da6666028e65a10467171e3dab6)

diff --git a/drivers/usb/host/xhci-dwc3.c b/drivers/usb/host/xhci-dwc3.c
index e61a04eeb8..1022dd5512 100644
--- a/drivers/usb/host/xhci-dwc3.c
+++ b/drivers/usb/host/xhci-dwc3.c
@@ -23,6 +23,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 struct xhci_dwc3_platdata {
 	struct phy usb_phy;
+	struct phy usb3_phy;
 };
 
 void dwc3_set_mode(struct dwc3 *dwc3_reg, u32 mode)
@@ -175,6 +176,13 @@ static int xhci_dwc3_probe(struct udevice *dev)
 		return ret;
 	}
 
+	ret = xhci_dwc3_setup_phy(dev, 1, &plat->usb3_phy);
+	if (ret) {
+		pr_err("Failed to setup USB3 PHY for %s\n", dev->name);
+		xhci_dwc3_shutdown_phy(&plat->usb_phy);
+		return ret;
+	}
+
 	dwc3_reg = (struct dwc3 *)((char *)(hccr) + DWC3_REG_OFFSET);
 
 	dwc3_core_init(dwc3_reg);
@@ -198,6 +206,9 @@ static int xhci_dwc3_remove(struct udevice *dev)
 	if (ret)
 		pr_err("Can't shutdown USB PHY for %s\n", dev->name);
 
+	ret = xhci_dwc3_shutdown_phy(&plat->usb3_phy);
+	if (ret)
+		pr_err("Can't shutdown USB3 PHY for %s\n", dev->name);
 
 	return xhci_deregister(dev);
 }

commit ba870c53769227ebfaad9c9f081abf5d2667af20
Author: Vignesh R <vigneshr@ti.com>
Date:   Wed Mar 7 14:50:09 2018 +0530

    UPSTREAM: usb: xhci-dwc3: Refractor PHY operations into separate function
    
    Refractor PHY get/init/poweron and PHY poweroff/exit operations into
    separate function so that its easy to support multiple PHYs.
    
    Change-Id: I837032c52bfa9360cc8bbf5fa38eb35e83155db6
    Signed-off-by: Vignesh R <vigneshr@ti.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 3fc2635d3da8f87675629b6058b646b63d684dff)

diff --git a/drivers/usb/host/xhci-dwc3.c b/drivers/usb/host/xhci-dwc3.c
index cf1986bebd..e61a04eeb8 100644
--- a/drivers/usb/host/xhci-dwc3.c
+++ b/drivers/usb/host/xhci-dwc3.c
@@ -112,39 +112,69 @@ void dwc3_set_fladj(struct dwc3 *dwc3_reg, u32 val)
 }
 
 #ifdef CONFIG_DM_USB
-static int xhci_dwc3_probe(struct udevice *dev)
+static int xhci_dwc3_setup_phy(struct udevice *dev, int index, struct phy *phy)
 {
-	struct xhci_dwc3_platdata *plat = dev_get_platdata(dev);
-	struct xhci_hcor *hcor;
-	struct xhci_hccr *hccr;
-	struct dwc3 *dwc3_reg;
-	enum usb_dr_mode dr_mode;
-	int ret;
-
-	hccr = (struct xhci_hccr *)((uintptr_t)dev_read_addr(dev));
-	hcor = (struct xhci_hcor *)((uintptr_t)hccr +
-			HC_LENGTH(xhci_readl(&(hccr)->cr_capbase)));
+	int ret = 0;
 
-	ret = generic_phy_get_by_index(dev, 0, &plat->usb_phy);
+	ret = generic_phy_get_by_index(dev, index, phy);
 	if (ret) {
 		if (ret != -ENOENT) {
 			pr_err("Failed to get USB PHY for %s\n", dev->name);
 			return ret;
 		}
 	} else {
-		ret = generic_phy_init(&plat->usb_phy);
+		ret = generic_phy_init(phy);
 		if (ret) {
 			pr_err("Can't init USB PHY for %s\n", dev->name);
 			return ret;
 		}
-
-		ret = generic_phy_power_on(&plat->usb_phy);
+		ret = generic_phy_power_on(phy);
 		if (ret) {
 			pr_err("Can't power on USB PHY for %s\n", dev->name);
+			generic_phy_exit(phy);
 			return ret;
 		}
 	}
 
+	return 0;
+}
+
+static int xhci_dwc3_shutdown_phy(struct phy *phy)
+{
+	int ret = 0;
+
+	if (generic_phy_valid(phy)) {
+		ret = generic_phy_power_off(phy);
+		if (ret)
+			return ret;
+
+		ret = generic_phy_exit(phy);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+static int xhci_dwc3_probe(struct udevice *dev)
+{
+	struct xhci_dwc3_platdata *plat = dev_get_platdata(dev);
+	struct xhci_hcor *hcor;
+	struct xhci_hccr *hccr;
+	struct dwc3 *dwc3_reg;
+	enum usb_dr_mode dr_mode;
+	int ret;
+
+	hccr = (struct xhci_hccr *)((uintptr_t)dev_read_addr(dev));
+	hcor = (struct xhci_hcor *)((uintptr_t)hccr +
+			HC_LENGTH(xhci_readl(&(hccr)->cr_capbase)));
+
+	ret = xhci_dwc3_setup_phy(dev, 0, &plat->usb_phy);
+	if (ret) {
+		pr_err("Failed to setup USB PHY for %s\n", dev->name);
+		return ret;
+	}
+
 	dwc3_reg = (struct dwc3 *)((char *)(hccr) + DWC3_REG_OFFSET);
 
 	dwc3_core_init(dwc3_reg);
@@ -164,19 +194,10 @@ static int xhci_dwc3_remove(struct udevice *dev)
 	struct xhci_dwc3_platdata *plat = dev_get_platdata(dev);
 	int ret;
 
-	if (generic_phy_valid(&plat->usb_phy)) {
-		ret = generic_phy_power_off(&plat->usb_phy);
-		if (ret) {
-			pr_err("Can't poweroff USB PHY for %s\n", dev->name);
-			return ret;
-		}
+	ret = xhci_dwc3_shutdown_phy(&plat->usb_phy);
+	if (ret)
+		pr_err("Can't shutdown USB PHY for %s\n", dev->name);
 
-		ret = generic_phy_exit(&plat->usb_phy);
-		if (ret) {
-			pr_err("Can't deinit USB PHY for %s\n", dev->name);
-			return ret;
-		}
-	}
 
 	return xhci_deregister(dev);
 }

commit 7e2b815bcb5bc9374200c95ab15571de5aa0ce22
Author: Vignesh R <vigneshr@ti.com>
Date:   Wed Mar 7 14:50:08 2018 +0530

    UPSTREAM: usb: xhci-dwc3: Power on USB PHY before using
    
    It is wrong that expect .phy_init() to also power on the PHY. Therefore,
    explicitly, call generic_phy_power_on() after generic_phy_power_init() in
    order to power on PHY before using it.
    
    Change-Id: I587d32f108148813e5eb7b7039b0af9daf15d774
    Signed-off-by: Vignesh R <vigneshr@ti.com>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 7d4e4d30631ba9350a18ab2243e749d583b402ab)

diff --git a/drivers/usb/host/xhci-dwc3.c b/drivers/usb/host/xhci-dwc3.c
index 258d1cd00a..cf1986bebd 100644
--- a/drivers/usb/host/xhci-dwc3.c
+++ b/drivers/usb/host/xhci-dwc3.c
@@ -137,6 +137,12 @@ static int xhci_dwc3_probe(struct udevice *dev)
 			pr_err("Can't init USB PHY for %s\n", dev->name);
 			return ret;
 		}
+
+		ret = generic_phy_power_on(&plat->usb_phy);
+		if (ret) {
+			pr_err("Can't power on USB PHY for %s\n", dev->name);
+			return ret;
+		}
 	}
 
 	dwc3_reg = (struct dwc3 *)((char *)(hccr) + DWC3_REG_OFFSET);
@@ -159,6 +165,12 @@ static int xhci_dwc3_remove(struct udevice *dev)
 	int ret;
 
 	if (generic_phy_valid(&plat->usb_phy)) {
+		ret = generic_phy_power_off(&plat->usb_phy);
+		if (ret) {
+			pr_err("Can't poweroff USB PHY for %s\n", dev->name);
+			return ret;
+		}
+
 		ret = generic_phy_exit(&plat->usb_phy);
 		if (ret) {
 			pr_err("Can't deinit USB PHY for %s\n", dev->name);

commit 79bf39c6d7f65d88e98015662399d135510f5f30
Author: Alexey Brodkin <Alexey.Brodkin@synopsys.com>
Date:   Wed Feb 28 16:16:58 2018 +0300

    UPSTREAM: usb: dwc2: Allow selection of data buffer size
    
    If we use hardware with very small RAM (let's consider just a couple
    of hundreds of kB but not megabytes) it is not super convenient to lose
    64kB for statically allocated bufer which most probably won't be used
    as big as it is. Typically we'll have much shorter data packages to
    excahnge and in the worst case longer packets will be split on separate
    transactions.
    
    For those corner-cases user will be able to set his buffer size of
    choice via USB_DWC2_BUFFER_SIZE option in menuconfig.
    
    By default we'll use 64 kB as it was hard-coeded before so existing
    users shouldn't be affected at all.
    
    Change-Id: I7cbf1bfaa301434e96bc8230f638131d7d95e7dc
    Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
    Cc: Marek Vasut <marex@denx.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 42637fdae833f8c3e8a0270ea7e74152cbd8ef38)

diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 9fd7529289..526340412f 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -224,3 +224,15 @@ config USB_DWC2
 	  Hi-Speed (480 Mbps), Full-Speed (12 Mbps), and Low-Speed (1.5 Mbps)
 	  operation is compliant to the controller Supplement. If you want to
 	  enable this controller in host mode, say Y.
+
+if USB_DWC2
+config USB_DWC2_BUFFER_SIZE
+	int "Data buffer size in kB"
+	default 64
+	---help---
+	  By default 64 kB buffer is used but if amount of RAM avaialble on
+	  the target is not enough to accommodate allocation of buffer of
+	  that size it is possible to shrink it. Smaller sizes should be fine
+	  because larger transactions could be split in smaller ones.
+
+endif # USB_DWC2
diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
index d5f39d18d7..c41a0c5d95 100644
--- a/drivers/usb/host/dwc2.c
+++ b/drivers/usb/host/dwc2.c
@@ -25,7 +25,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define DWC2_HC_CHANNEL			0
 
 #define DWC2_STATUS_BUF_SIZE		64
-#define DWC2_DATA_BUF_SIZE		(64 * 1024)
+#define DWC2_DATA_BUF_SIZE		(CONFIG_USB_DWC2_BUFFER_SIZE * 1024)
 
 #define MAX_DEVICE			16
 #define MAX_ENDPOINT			16

commit bf6dfe012e686ec1d2dd6f6f417991adb4c0317b
Author: Marek Vasut <marek.vasut+renesas@gmail.com>
Date:   Mon Feb 26 10:35:15 2018 +0100

    UPSTREAM: usb: xhci-rcar: Add R8A77965 M3N entries
    
    Add entries for the R8A77965 M3N SoC.
    
    Change-Id: Ibd31f3bb8fe93dbab3082de79268f77fde8c8bcd
    Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
    Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 4f0533ffcd37bc1c877d6b59235c042ca78ccf10)

diff --git a/drivers/usb/host/xhci-rcar.c b/drivers/usb/host/xhci-rcar.c
index b8beb7b2c2..b6f7ba8fe0 100644
--- a/drivers/usb/host/xhci-rcar.c
+++ b/drivers/usb/host/xhci-rcar.c
@@ -154,6 +154,7 @@ static int xhci_rcar_ofdata_to_platdata(struct udevice *dev)
 static const struct udevice_id xhci_rcar_ids[] = {
 	{ .compatible = "renesas,xhci-r8a7795" },
 	{ .compatible = "renesas,xhci-r8a7796" },
+	{ .compatible = "renesas,xhci-r8a77965" },
 	{ }
 };
 

commit c0cee20e03c89b1f90a0ebc7f8c4bbcb1c91399a
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Wed Feb 21 03:57:09 2018 +0000

    UPSTREAM: usb: kbd: select SYS_STDIO_DEREGISTER
    
    If SYS_STDIO_DEREGISTER is not selected and USB_KEYBOARD is selected
    U-Boot cannot be built due to missing function stdio_deregister_dev.
    
    So USB_KEYBOARD should select SYS_STDIO_DEREGISTER.
    
    Change-Id: If49d18a6015eeef66af94205fdd3e2e56654fae2
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 462c117ce045571fef86f88fad3be8b3117897b1)

diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig
index 842058439d..998fae79f2 100644
--- a/drivers/usb/Kconfig
+++ b/drivers/usb/Kconfig
@@ -72,6 +72,7 @@ config USB_STORAGE
 
 config USB_KEYBOARD
 	bool "USB Keyboard support"
+	select SYS_STDIO_DEREGISTER
 	---help---
 	  Say Y here if you want to use a USB keyboard for U-Boot command line
 	  input.

commit 5ab232da85604aef2b05c50c2651c8f749eaaaf0
Author: Andre Heider <a.heider@gmail.com>
Date:   Thu Feb 15 10:17:29 2018 +0100

    UPSTREAM: usb: gadget: sdp: fix pointer cast warnings for 64bit archs
    
    The SDP protocol contains multiple 32bit pointers. Add a helper function
    to get a valid pointer from these values and use it.
    
    This fixes the following warnings:
    
    drivers/usb/gadget/f_sdp.c: In function ‘sdp_rx_data_complete’:
    drivers/usb/gadget/f_sdp.c:347:10: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
       memcpy((void *)sdp->dnl_address, req->buf + 1, datalen);
              ^
    drivers/usb/gadget/f_sdp.c: In function ‘sdp_jump_imxheader’:
    drivers/usb/gadget/f_sdp.c:625:10: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
      entry = (void *)headerv2->entry;
              ^
    drivers/usb/gadget/f_sdp.c: In function ‘sdp_handle_in_ep’:
    drivers/usb/gadget/f_sdp.c:668:20: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
       memcpy(&data[1], (void *)sdp_func->dnl_address, datalen);
                        ^
    drivers/usb/gadget/f_sdp.c:679:31: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
       status = sdp_jump_imxheader((void *)sdp_func->jmp_address);
                                   ^
    
    Change-Id: Ieeef44484fc81b3a423067adb218cce4f8b2553b
    Signed-off-by: Andre Heider <a.heider@gmail.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit a64a614db70f1c758aea0a1620c4fcd49e037d47)

diff --git a/drivers/usb/gadget/f_sdp.c b/drivers/usb/gadget/f_sdp.c
index 6da0530095..43c5cfbb77 100644
--- a/drivers/usb/gadget/f_sdp.c
+++ b/drivers/usb/gadget/f_sdp.c
@@ -230,6 +230,11 @@ static struct usb_gadget_strings *sdp_generic_strings[] = {
 	NULL,
 };
 
+static inline void *sdp_ptr(u32 val)
+{
+	return (void *)(uintptr_t)val;
+}
+
 static void sdp_rx_command_complete(struct usb_ep *ep, struct usb_request *req)
 {
 	struct f_sdp *sdp = req->context;
@@ -344,7 +349,7 @@ static void sdp_rx_data_complete(struct usb_ep *ep, struct usb_request *req)
 	}
 
 	if (sdp->state == SDP_STATE_RX_FILE_DATA) {
-		memcpy((void *)sdp->dnl_address, req->buf + 1, datalen);
+		memcpy(sdp_ptr(sdp->dnl_address), req->buf + 1, datalen);
 		sdp->dnl_address += datalen;
 	}
 
@@ -622,7 +627,7 @@ static u32 sdp_jump_imxheader(void *address)
 	}
 
 	printf("Jumping to 0x%08x\n", headerv2->entry);
-	entry = (void *)headerv2->entry;
+	entry = sdp_ptr(headerv2->entry);
 	entry();
 
 	/* The image probably never returns hence we won't reach that point */
@@ -665,7 +670,7 @@ static void sdp_handle_in_ep(void)
 		if (datalen > 64)
 			datalen = 64;
 
-		memcpy(&data[1], (void *)sdp_func->dnl_address, datalen);
+		memcpy(&data[1], sdp_ptr(sdp_func->dnl_address), datalen);
 		sdp_func->in_req->length = 65;
 
 		sdp_func->dnl_bytes_remaining -= datalen;
@@ -676,7 +681,7 @@ static void sdp_handle_in_ep(void)
 		break;
 	case SDP_STATE_JUMP:
 		printf("Jumping to header at 0x%08x\n", sdp_func->jmp_address);
-		status = sdp_jump_imxheader((void *)sdp_func->jmp_address);
+		status = sdp_jump_imxheader(sdp_ptr(sdp_func->jmp_address));
 
 		/* If imx header fails, try some U-Boot specific headers */
 		if (status) {

commit 8e33586e7caf9697f4c693cb0c0112aeee837968
Author: Andre Heider <a.heider@gmail.com>
Date:   Thu Feb 15 07:08:55 2018 +0100

    UPSTREAM: usb: gadget: sdp: add missing line breaks
    
    Cosmetic change.
    
    Change-Id: Ia6606d3e491c3032882476f00d4e306c30da8953
    Signed-off-by: Andre Heider <a.heider@gmail.com>
    Reviewed-by: Lukasz Majewski <lukma@denx.de>
    Acked-by: Stefan Agner <stefan.agner@toradex.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 24ccd0c8fd6285636edb94d0ece2cbcf062d64eb)

diff --git a/cmd/usb_gadget_sdp.c b/cmd/usb_gadget_sdp.c
index ae4d73c125..97d00ec545 100644
--- a/cmd/usb_gadget_sdp.c
+++ b/cmd/usb_gadget_sdp.c
@@ -28,13 +28,13 @@ static int do_sdp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 
 	ret = sdp_init(controller_index);
 	if (ret) {
-		pr_err("SDP init failed: %d", ret);
+		pr_err("SDP init failed: %d\n", ret);
 		goto exit;
 	}
 
 	/* This command typically does not return but jumps to an image */
 	sdp_handle(controller_index);
-	pr_err("SDP ended");
+	pr_err("SDP ended\n");
 
 exit:
 	g_dnl_unregister();
diff --git a/common/spl/spl_sdp.c b/common/spl/spl_sdp.c
index 333d518f4d..0c4603a3db 100644
--- a/common/spl/spl_sdp.c
+++ b/common/spl/spl_sdp.c
@@ -24,13 +24,13 @@ static int spl_sdp_load_image(struct spl_image_info *spl_image,
 
 	ret = sdp_init(controller_index);
 	if (ret) {
-		pr_err("SDP init failed: %d", ret);
+		pr_err("SDP init failed: %d\n", ret);
 		return -ENODEV;
 	}
 
 	/* This command typically does not return but jumps to an image */
 	sdp_handle(controller_index);
-	pr_err("SDP ended");
+	pr_err("SDP ended\n");
 
 	return -EINVAL;
 }
diff --git a/drivers/usb/gadget/f_sdp.c b/drivers/usb/gadget/f_sdp.c
index dd7b9cddb1..6da0530095 100644
--- a/drivers/usb/gadget/f_sdp.c
+++ b/drivers/usb/gadget/f_sdp.c
@@ -238,12 +238,12 @@ static void sdp_rx_command_complete(struct usb_ep *ep, struct usb_request *req)
 	u8 report = data[0];
 
 	if (status != 0) {
-		pr_err("Status: %d", status);
+		pr_err("Status: %d\n", status);
 		return;
 	}
 
 	if (report != 1) {
-		pr_err("Unexpected report %d", report);
+		pr_err("Unexpected report %d\n", report);
 		return;
 	}
 
@@ -323,12 +323,12 @@ static void sdp_rx_data_complete(struct usb_ep *ep, struct usb_request *req)
 	int datalen = req->length - 1;
 
 	if (status != 0) {
-		pr_err("Status: %d", status);
+		pr_err("Status: %d\n", status);
 		return;
 	}
 
 	if (report != 2) {
-		pr_err("Unexpected report %d", report);
+		pr_err("Unexpected report %d\n", report);
 		return;
 	}
 
@@ -361,7 +361,7 @@ static void sdp_rx_data_complete(struct usb_ep *ep, struct usb_request *req)
 		sdp->state = SDP_STATE_TX_SEC_CONF;
 		break;
 	default:
-		pr_err("Invalid state: %d", sdp->state);
+		pr_err("Invalid state: %d\n", sdp->state);
 	}
 }
 
@@ -371,7 +371,7 @@ static void sdp_tx_complete(struct usb_ep *ep, struct usb_request *req)
 	int status = req->status;
 
 	if (status != 0) {
-		pr_err("Status: %d", status);
+		pr_err("Status: %d\n", status);
 		return;
 	}
 
@@ -394,7 +394,7 @@ static void sdp_tx_complete(struct usb_ep *ep, struct usb_request *req)
 			sdp->state = SDP_STATE_IDLE;
 		break;
 	default:
-		pr_err("Wrong State: %d", sdp->state);
+		pr_err("Wrong State: %d\n", sdp->state);
 		sdp->state = SDP_STATE_IDLE;
 		break;
 	}

commit 99ed621795dafebf039f1dbeb6658c6ff6566d43
Author: Faiz Abbas <faiz_abbas@ti.com>
Date:   Thu Feb 15 17:12:11 2018 +0530

    UPSTREAM: usb: host: xhci-omap: Remove redundant board_usb_init and board_usb_cleanup functions
    
    board_usb_init()/_cleanup() should be in board files and don't have
    a place in the xhci-omap driver. Weak versions for
    board_usb_init()/_cleanup() already exist in common/usb.c
    (for host mode) and drivers/usb/gadget/g_dnl.c (for gadget mode).
    
    Therefore, remove init and cleanup functions from xhci-omap and
    implement them in the board files.
    
    Change-Id: I9d1fbcbf31fe63f86a5d0a38d767b7070ecfa1fb
    Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
    Reviewed-by: Marek Vasut <marex@denx.de>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit b16c129c2290d26e7b16b4309713c78f6146bc8a)

diff --git a/board/compulab/cl-som-am57x/cl-som-am57x.c b/board/compulab/cl-som-am57x/cl-som-am57x.c
index 389eebb589..d7dc8a42e4 100644
--- a/board/compulab/cl-som-am57x/cl-som-am57x.c
+++ b/board/compulab/cl-som-am57x/cl-som-am57x.c
@@ -16,6 +16,7 @@
 #include <asm/arch/sys_proto.h>
 #include "../common/common.h"
 #include "../common/eeprom.h"
+#include <asm/omap_common.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -64,3 +65,15 @@ u32 get_board_rev(void)
 {
 	return cl_eeprom_get_board_rev(CONFIG_SYS_I2C_EEPROM_BUS);
 }
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+	enable_usb_clocks(index);
+	return 0;
+}
+
+int board_usb_cleanup(int index, enum usb_init_type init)
+{
+	disable_usb_clocks(index);
+	return 0;
+}
diff --git a/board/compulab/cm_t43/cm_t43.c b/board/compulab/cm_t43/cm_t43.c
index 0d5da6f5e9..bdbea4f5e5 100644
--- a/board/compulab/cm_t43/cm_t43.c
+++ b/board/compulab/cm_t43/cm_t43.c
@@ -14,6 +14,8 @@
 #include <power/pmic.h>
 #include <power/tps65218.h>
 #include "board.h"
+#include <usb.h>
+#include <asm/omap_common.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -50,6 +52,18 @@ int board_init(void)
 	return 0;
 }
 
+int board_usb_init(int index, enum usb_init_type init)
+{
+	enable_usb_clocks(index);
+	return 0;
+}
+
+int board_usb_cleanup(int index, enum usb_init_type init)
+{
+	disable_usb_clocks(index);
+	return 0;
+}
+
 #ifdef CONFIG_DRIVER_TI_CPSW
 
 static void cpsw_control(int enabled)
diff --git a/board/ti/am43xx/board.c b/board/ti/am43xx/board.c
index 2c417e7545..818b9fe78b 100644
--- a/board/ti/am43xx/board.c
+++ b/board/ti/am43xx/board.c
@@ -682,7 +682,7 @@ int usb_gadget_handle_interrupts(int index)
 #endif /* CONFIG_USB_DWC3 */
 
 #if defined(CONFIG_USB_DWC3) || defined(CONFIG_USB_XHCI_OMAP)
-int omap_xhci_board_usb_init(int index, enum usb_init_type init)
+int board_usb_init(int index, enum usb_init_type init)
 {
 	enable_usb_clocks(index);
 #ifdef CONFIG_USB_DWC3
@@ -713,7 +713,7 @@ int omap_xhci_board_usb_init(int index, enum usb_init_type init)
 	return 0;
 }
 
-int omap_xhci_board_usb_cleanup(int index, enum usb_init_type init)
+int board_usb_cleanup(int index, enum usb_init_type init)
 {
 #ifdef CONFIG_USB_DWC3
 	switch (index) {
diff --git a/board/ti/am57xx/board.c b/board/ti/am57xx/board.c
index 7e7056cf71..8b040518b8 100644
--- a/board/ti/am57xx/board.c
+++ b/board/ti/am57xx/board.c
@@ -783,7 +783,7 @@ int usb_gadget_handle_interrupts(int index)
 #endif /* CONFIG_USB_DWC3 */
 
 #if defined(CONFIG_USB_DWC3) || defined(CONFIG_USB_XHCI_OMAP)
-int omap_xhci_board_usb_init(int index, enum usb_init_type init)
+int board_usb_init(int index, enum usb_init_type init)
 {
 	enable_usb_clocks(index);
 	switch (index) {
@@ -817,7 +817,7 @@ int omap_xhci_board_usb_init(int index, enum usb_init_type init)
 	return 0;
 }
 
-int omap_xhci_board_usb_cleanup(int index, enum usb_init_type init)
+int board_usb_cleanup(int index, enum usb_init_type init)
 {
 #ifdef CONFIG_USB_DWC3
 	switch (index) {
diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c
index 93d3d0b54e..299fa0c532 100644
--- a/board/ti/dra7xx/evm.c
+++ b/board/ti/dra7xx/evm.c
@@ -751,7 +751,7 @@ static struct ti_usb_phy_device usb_phy2_device = {
 	.index = 1,
 };
 
-int omap_xhci_board_usb_init(int index, enum usb_init_type init)
+int board_usb_init(int index, enum usb_init_type init)
 {
 	enable_usb_clocks(index);
 	switch (index) {
@@ -788,7 +788,7 @@ int omap_xhci_board_usb_init(int index, enum usb_init_type init)
 	return 0;
 }
 
-int omap_xhci_board_usb_cleanup(int index, enum usb_init_type init)
+int board_usb_cleanup(int index, enum usb_init_type init)
 {
 	switch (index) {
 	case 0:
diff --git a/drivers/usb/host/xhci-omap.c b/drivers/usb/host/xhci-omap.c
index d6c5744818..b814500bdb 100644
--- a/drivers/usb/host/xhci-omap.c
+++ b/drivers/usb/host/xhci-omap.c
@@ -27,28 +27,6 @@ DECLARE_GLOBAL_DATA_PTR;
 
 static struct omap_xhci omap;
 
-__weak int omap_xhci_board_usb_init(int index, enum usb_init_type init)
-{
-	enable_usb_clocks(index);
-	return 0;
-}
-
-int board_usb_init(int index, enum usb_init_type init)
-{
-	return omap_xhci_board_usb_init(index, init);
-}
-
-__weak int omap_xhci_board_usb_cleanup(int index, enum usb_init_type init)
-{
-	disable_usb_clocks(index);
-	return 0;
-}
-
-int board_usb_cleanup(int index, enum usb_init_type init)
-{
-	return omap_xhci_board_usb_cleanup(index, init);
-}
-
 static int omap_xhci_core_init(struct omap_xhci *omap)
 {
 	int ret = 0;

commit 3cd212425d0cce1f130c145ad9086bc9323b03c8
Author: Alexey Brodkin <Alexey.Brodkin@synopsys.com>
Date:   Wed Jan 31 17:56:59 2018 +0300

    UPSTREAM: usb: dwc2: Rename CONFIG_DWC2_UTMI_PHY_WIDTH to CONFIG_DWC2_UTMI_WIDTH
    
    For some reason from day one we used to have both CONFIG_DWC2_UTMI_WIDTH
    mentioned in dwc2.h and in scripts/config_whitelist.txt but never really used
    and CONFIG_DWC2_UTMI_PHY_WIDTH used in real code in dwc2.c (but never
    defined).
    
    Moreover even though CONFIG_DWC2_UTMI_WIDTH might be either 8 or 16
    depending on hardware (and the same is said in a comment for it in
    dwc2.h) but then 8 is hardcoded in the header leaving no ability to
    override this value in board's configuration.
    
    Change-Id: Ibc6560c79a09d2116478b2131c1e0f3b02f67503
    Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
    Cc: Marek Vasut <marex@denx.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 163f8858ae8bfcd94ef8d6c4ed75ff3abb642450)

diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
index 3ba448933b..d5f39d18d7 100644
--- a/drivers/usb/host/dwc2.c
+++ b/drivers/usb/host/dwc2.c
@@ -402,7 +402,7 @@ static void dwc_otg_core_init(struct dwc2_priv *priv)
 		usbcfg &= ~DWC2_GUSBCFG_DDRSEL;
 #endif
 	} else {	/* UTMI+ interface */
-#if (CONFIG_DWC2_UTMI_PHY_WIDTH == 16)
+#if (CONFIG_DWC2_UTMI_WIDTH == 16)
 		usbcfg |= DWC2_GUSBCFG_PHYIF;
 #endif
 	}
diff --git a/drivers/usb/host/dwc2.h b/drivers/usb/host/dwc2.h
index 4482dc621d..574607a2ac 100644
--- a/drivers/usb/host/dwc2.h
+++ b/drivers/usb/host/dwc2.h
@@ -775,7 +775,9 @@ struct dwc2_core_regs {
 #define DWC2_PHY_TYPE_UTMI		1
 #define DWC2_PHY_TYPE_ULPI		2
 #define CONFIG_DWC2_PHY_TYPE		DWC2_PHY_TYPE_UTMI	/* PHY type */
+#ifndef CONFIG_DWC2_UTMI_WIDTH
 #define CONFIG_DWC2_UTMI_WIDTH		8	/* UTMI bus width (8/16) */
+#endif
 
 #undef CONFIG_DWC2_PHY_ULPI_DDR			/* ULPI PHY uses DDR mode */
 #define CONFIG_DWC2_PHY_ULPI_EXT_VBUS		/* ULPI PHY controls VBUS */

commit 9a4089eeb750a1e035c63a0937e32e9554b8ad75
Author: Ulf Magnusson <ulfalizer@gmail.com>
Date:   Tue Jan 30 14:07:05 2018 +0100

    UPSTREAM: usb: ulpi: kconfig: Remove meaningless choice default
    
    'default' on a choice refers to the symbol selected by default, not to
    the choice mode, so 'default n' is meaningless.
    
    No functional changes. Optional choices implicitly default to n mode
    (and there is no way to make them default to another mode).
    
    Discovered in Kconfiglib (https://github.com/ulfalizer/Kconfiglib),
    which prints the following warning:
    
            warning: the default selection n (undefined) of <choice> (defined at drivers/usb/ulpi/Kconfig:3) is not contained in the choice
    
    I've added a corresponding warning to the C tools too, which is
    currently in linux-next: https://patchwork.kernel.org/patch/9983667/
    
    Change-Id: Ie3ab0ee0a9b4bb6112ebe348adca240daca3c066
    Signed-off-by: Ulf Magnusson <ulfalizer@gmail.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit a43aebee89acf57b4e22018f401cffc9fef4fd85)

diff --git a/drivers/usb/ulpi/Kconfig b/drivers/usb/ulpi/Kconfig
index 329d2df3ed..001564d40c 100644
--- a/drivers/usb/ulpi/Kconfig
+++ b/drivers/usb/ulpi/Kconfig
@@ -3,7 +3,6 @@ comment "ULPI drivers"
 choice
 	prompt "ULPI Viewport type"
 	optional
-	default n
 	help
 	  Select ULPI viewport (SoC-side interface to ULPI) implementation
 	  appropriate for the device if you want to communicate with

commit b3c55b569ec96e82335e17455061ab359e4ff94b
Author: Tom Rini <trini@konsulko.com>
Date:   Mon Feb 5 09:51:50 2018 -0500

    UPSTREAM: usb: dwc2: make casts of ep->dma_buf consistent
    
    In most places in the code we cast this to an unsigned long, but in one
    place we cast to an unsigned int.  For consistency and to fix a warning
    on 64bit targets, always cast this to unsigned long.  For the long term
    we should however change the declaration of dma_buf.
    
    Conflicts:
            drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
    
    Change-Id: I56b7b6da2d716a9cd40ec4edbc928de433dfd4ca
    Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Acked-by: Lukasz Majewski <lukma@denx.de>
    Acked-by: Marek Vasut <marex@denx.de>
    Signed-off-by: Tom Rini <trini@konsulko.com>
    (cherry picked from commit a4d403290e32f95cfd254f2778e08f655ddd5a49)

diff --git a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
index 73ba0daa4d..a306ec55c7 100644
--- a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
+++ b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
@@ -114,8 +114,7 @@ static int setdma_rx(struct dwc2_ep *ep, struct dwc2_request *req)
 				(unsigned long) ep->dma_buf +
 				ROUND(ep->len, CONFIG_SYS_CACHELINE_SIZE));
 
-	writel((unsigned int)(unsigned long)ep->dma_buf,
-	       &reg->out_endp[ep_num].doepdma);
+	writel((unsigned long) ep->dma_buf, &reg->out_endp[ep_num].doepdma);
 	writel(DOEPT_SIZ_PKT_CNT(pktcnt) | DOEPT_SIZ_XFER_SIZE(length),
 	       &reg->out_endp[ep_num].doeptsiz);
 	writel(DEPCTL_EPENA|DEPCTL_CNAK|ctrl, &reg->out_endp[ep_num].doepctl);

commit fe101b96c47c90a244f0b33e51bfebe1c973b409
Author: Tom Rini <trini@konsulko.com>
Date:   Sat Jan 27 15:22:56 2018 -0500

    UPSTREAM: usb: host: Drop unused hcd_name from r8a66597-hcd.c
    
    The variable hcd_name is unsued, drop.
    
    Change-Id: Ifdf235cabe480114f966bd3fd24260078d2359e0
    Cc: Marek Vasut <marex@denx.de>
    Cc: Chris Brandt <chris.brandt@renesas.com>
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 40b61180c1b0fcfceb82e80fb03ce0e88b31e7ab)

diff --git a/drivers/usb/host/r8a66597-hcd.c b/drivers/usb/host/r8a66597-hcd.c
index e0ca2cb0d4..9dbb18343a 100644
--- a/drivers/usb/host/r8a66597-hcd.c
+++ b/drivers/usb/host/r8a66597-hcd.c
@@ -20,7 +20,6 @@
 #define R8A66597_DPRINT(...)
 #endif
 
-static const char hcd_name[] = "r8a66597_hcd";
 static struct r8a66597 gr8a66597;
 
 static void get_hub_data(struct usb_device *dev, u16 *hub_devnum, u16 *hubport)

commit cd186d5ab93791a1f83cec1d8318ce7b8ae35322
Author: Tom Rini <trini@konsulko.com>
Date:   Sat Jan 27 15:21:47 2018 -0500

    UPSTREAM: usb: Remove isp116x-hcd support
    
    The isp116x-hcd driver is extremely long unused, so just remove it.
    
    Change-Id: I72802a2bdc6a4f397f634af230d6393fa9c1c4f3
    Cc: Marek Vasut <marex@denx.de>
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 1c0ae0097b3607e7f3d4066b2a8307a0a3e62c72)

diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 82108b620c..3ffcf64ddf 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -14,7 +14,6 @@ endif
 obj-$(CONFIG_USB_OHCI_NEW) += ohci-hcd.o
 obj-$(CONFIG_USB_ATMEL) += ohci-at91.o
 obj-$(CONFIG_USB_OHCI_DA8XX) += ohci-da8xx.o
-obj-$(CONFIG_USB_ISP116X_HCD) += isp116x-hcd.o
 obj-$(CONFIG_USB_R8A66597_HCD) += r8a66597-hcd.o
 obj-$(CONFIG_USB_SL811HS) += sl811-hcd.o
 obj-$(CONFIG_USB_OHCI_EP93XX) += ohci-ep93xx.o
diff --git a/drivers/usb/host/isp116x-hcd.c b/drivers/usb/host/isp116x-hcd.c
deleted file mode 100644
index 32874d73de..0000000000
--- a/drivers/usb/host/isp116x-hcd.c
+++ /dev/null
@@ -1,1323 +0,0 @@
-/*
- * ISP116x HCD (Host Controller Driver) for u-boot.
- *
- * Copyright (C) 2006-2007 Rodolfo Giometti <giometti@linux.it>
- * Copyright (C) 2006-2007 Eurotech S.p.A. <info@eurotech.it>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- *
- * Derived in part from the SL811 HCD driver "u-boot/drivers/usb/sl811_usb.c"
- * (original copyright message follows):
- *
- *    (C) Copyright 2004
- *    Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- *    This code is based on linux driver for sl811hs chip, source at
- *    drivers/usb/host/sl811.c:
- *
- *    SL811 Host Controller Interface driver for USB.
- *
- *    Copyright (c) 2003/06, Courage Co., Ltd.
- *
- *    Based on:
- *         1.uhci.c by Linus Torvalds, Johannes Erdfelt, Randy Dunlap,
- *           Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber,
- *           Adam Richter, Gregory P. Smith;
- *         2.Original SL811 driver (hc_sl811.o) by Pei Liu <pbl@cypress.com>
- *         3.Rewrited as sl811.o by Yin Aihua <yinah:couragetech.com.cn>
- *
- *    [[GNU/GPL disclaimer]]
- *
- * and in part from AU1x00 OHCI HCD driver "u-boot/arch/mips/cpu/au1x00_usb_ohci.c"
- * (original copyright message follows):
- *
- *    URB OHCI HCD (Host Controller Driver) for USB on the AU1x00.
- *
- *    (C) Copyright 2003
- *    Gary Jennejohn, DENX Software Engineering <garyj@denx.de>
- *
- *    [[GNU/GPL disclaimer]]
- *
- *    Note: Part of this code has been derived from linux
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <usb.h>
-#include <malloc.h>
-#include <linux/list.h>
-
-/*
- * ISP116x chips require certain delays between accesses to its
- * registers. The following timing options exist.
- *
- * 1. Configure your memory controller (the best)
- * 2. Use ndelay (easiest, poorest). For that, enable the following macro.
- *
- * Value is in microseconds.
- */
-#ifdef ISP116X_HCD_USE_UDELAY
-#define UDELAY		1
-#endif
-
-/*
- * On some (slowly?) machines an extra delay after data packing into
- * controller's FIFOs is required, * otherwise you may get the following
- * error:
- *
- *   uboot> usb start
- *   (Re)start USB...
- *   USB:   scanning bus for devices... isp116x: isp116x_submit_job: CTL:TIMEOUT
- *   isp116x: isp116x_submit_job: ****** FIFO not ready! ******
- *
- *         USB device not responding, giving up (status=4)
- *         isp116x: isp116x_submit_job: ****** FIFO not empty! ******
- *         isp116x: isp116x_submit_job: ****** FIFO not empty! ******
- *         isp116x: isp116x_submit_job: ****** FIFO not empty! ******
- *         3 USB Device(s) found
- *                scanning bus for storage devices... 0 Storage Device(s) found
- *
- * Value is in milliseconds.
- */
-#ifdef ISP116X_HCD_USE_EXTRA_DELAY
-#define EXTRA_DELAY	2
-#endif
-
-/*
- * Enable the following defines if you wish enable debugging messages.
- */
-#undef DEBUG			/* enable debugging messages */
-#undef TRACE			/* enable tracing code */
-#undef VERBOSE			/* verbose debugging messages */
-
-#include "isp116x.h"
-
-#define DRIVER_VERSION	"08 Jan 2007"
-static const char hcd_name[] = "isp116x-hcd";
-
-struct isp116x isp116x_dev;
-struct isp116x_platform_data isp116x_board;
-static int got_rhsc;		/* root hub status change */
-struct usb_device *devgone;	/* device which was disconnected */
-static int rh_devnum;		/* address of Root Hub endpoint */
-
-/* ------------------------------------------------------------------------- */
-
-static int isp116x_reset(struct isp116x *isp116x);
-
-/* --- Debugging functions ------------------------------------------------- */
-
-#define isp116x_show_reg(d, r) {				\
-	if ((r) < 0x20) {					\
-		DBG("%-12s[%02x]: %08x", #r,			\
-			r, isp116x_read_reg32(d, r));		\
-	} else {						\
-		DBG("%-12s[%02x]:     %04x", #r,		\
-			r, isp116x_read_reg16(d, r));		\
-	}							\
-}
-
-#define isp116x_show_regs(d) {					\
-	isp116x_show_reg(d, HCREVISION);			\
-	isp116x_show_reg(d, HCCONTROL);				\
-	isp116x_show_reg(d, HCCMDSTAT);				\
-	isp116x_show_reg(d, HCINTSTAT);				\
-	isp116x_show_reg(d, HCINTENB);				\
-	isp116x_show_reg(d, HCFMINTVL);				\
-	isp116x_show_reg(d, HCFMREM);				\
-	isp116x_show_reg(d, HCFMNUM);				\
-	isp116x_show_reg(d, HCLSTHRESH);			\
-	isp116x_show_reg(d, HCRHDESCA);				\
-	isp116x_show_reg(d, HCRHDESCB);				\
-	isp116x_show_reg(d, HCRHSTATUS);			\
-	isp116x_show_reg(d, HCRHPORT1);				\
-	isp116x_show_reg(d, HCRHPORT2);				\
-	isp116x_show_reg(d, HCHWCFG);				\
-	isp116x_show_reg(d, HCDMACFG);				\
-	isp116x_show_reg(d, HCXFERCTR);				\
-	isp116x_show_reg(d, HCuPINT);				\
-	isp116x_show_reg(d, HCuPINTENB);			\
-	isp116x_show_reg(d, HCCHIPID);				\
-	isp116x_show_reg(d, HCSCRATCH);				\
-	isp116x_show_reg(d, HCITLBUFLEN);			\
-	isp116x_show_reg(d, HCATLBUFLEN);			\
-	isp116x_show_reg(d, HCBUFSTAT);				\
-	isp116x_show_reg(d, HCRDITL0LEN);			\
-	isp116x_show_reg(d, HCRDITL1LEN);			\
-}
-
-#if defined(TRACE)
-
-static int isp116x_get_current_frame_number(struct usb_device *usb_dev)
-{
-	struct isp116x *isp116x = &isp116x_dev;
-
-	return isp116x_read_reg32(isp116x, HCFMNUM);
-}
-
-static void dump_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
-		     int len, char *str)
-{
-#if defined(VERBOSE)
-	int i;
-#endif
-
-	DBG("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d stat:%#lx",
-	    str,
-	    isp116x_get_current_frame_number(dev),
-	    usb_pipedevice(pipe),
-	    usb_pipeendpoint(pipe),
-	    usb_pipeout(pipe) ? 'O' : 'I',
-	    usb_pipetype(pipe) < 2 ?
-	    (usb_pipeint(pipe) ?
-	     "INTR" : "ISOC") :
-	    (usb_pipecontrol(pipe) ? "CTRL" : "BULK"), len, dev->status);
-#if defined(VERBOSE)
-	if (len > 0 && buffer) {
-		printf(__FILE__ ": data(%d):", len);
-		for (i = 0; i < 16 && i < len; i++)
-			printf(" %02x", ((__u8 *) buffer)[i]);
-		printf("%s\n", i < len ? "..." : "");
-	}
-#endif
-}
-
-#define PTD_DIR_STR(ptd)  ({char __c;		\
-	switch(PTD_GET_DIR(ptd)){		\
-	case 0:  __c = 's'; break;		\
-	case 1:  __c = 'o'; break;		\
-	default: __c = 'i'; break;		\
-	}; __c;})
-
-/*
-  Dump PTD info. The code documents the format
-  perfectly, right :)
-*/
-static inline void dump_ptd(struct ptd *ptd)
-{
-#if defined(VERBOSE)
-	int k;
-#endif
-
-	DBG("PTD(ext) : cc:%x %d%c%d %d,%d,%d t:%x %x%x%x",
-	    PTD_GET_CC(ptd),
-	    PTD_GET_FA(ptd), PTD_DIR_STR(ptd), PTD_GET_EP(ptd),
-	    PTD_GET_COUNT(ptd), PTD_GET_LEN(ptd), PTD_GET_MPS(ptd),
-	    PTD_GET_TOGGLE(ptd),
-	    PTD_GET_ACTIVE(ptd), PTD_GET_SPD(ptd), PTD_GET_LAST(ptd));
-#if defined(VERBOSE)
-	printf("isp116x: %s: PTD(byte): ", __FUNCTION__);
-	for (k = 0; k < sizeof(struct ptd); ++k)
-		printf("%02x ", ((u8 *) ptd)[k]);
-	printf("\n");
-#endif
-}
-
-static inline void dump_ptd_data(struct ptd *ptd, u8 * buf, int type)
-{
-#if defined(VERBOSE)
-	int k;
-
-	if (type == 0 /* 0ut data */ ) {
-		printf("isp116x: %s: out data: ", __FUNCTION__);
-		for (k = 0; k < PTD_GET_LEN(ptd); ++k)
-			printf("%02x ", ((u8 *) buf)[k]);
-		printf("\n");
-	}
-	if (type == 1 /* 1n data */ ) {
-		printf("isp116x: %s: in data: ", __FUNCTION__);
-		for (k = 0; k < PTD_GET_COUNT(ptd); ++k)
-			printf("%02x ", ((u8 *) buf)[k]);
-		printf("\n");
-	}
-
-	if (PTD_GET_LAST(ptd))
-		DBG("--- last PTD ---");
-#endif
-}
-
-#else
-
-#define dump_msg(dev, pipe, buffer, len, str)			do { } while (0)
-#define dump_pkt(dev, pipe, buffer, len, setup, str, small)	do {} while (0)
-
-#define dump_ptd(ptd)			do {} while (0)
-#define dump_ptd_data(ptd, buf, type)	do {} while (0)
-
-#endif
-
-/* --- Virtual Root Hub ---------------------------------------------------- */
-
-#include <usbroothubdes.h>
-
-/*
- * Hub class-specific descriptor is constructed dynamically
- */
-
-/* --- Virtual root hub management functions ------------------------------- */
-
-static int rh_check_port_status(struct isp116x *isp116x)
-{
-	u32 temp, ndp, i;
-	int res;
-
-	res = -1;
-	temp = isp116x_read_reg32(isp116x, HCRHSTATUS);
-	ndp = (temp & RH_A_NDP);
-	for (i = 0; i < ndp; i++) {
-		temp = isp116x_read_reg32(isp116x, HCRHPORT1 + i);
-		/* check for a device disconnect */
-		if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
-		     (RH_PS_PESC | RH_PS_CSC)) && ((temp & RH_PS_CCS) == 0)) {
-			res = i;
-			break;
-		}
-	}
-	return res;
-}
-
-/* --- HC management functions --------------------------------------------- */
-
-/* Write len bytes to fifo, pad till 32-bit boundary
- */
-static void write_ptddata_to_fifo(struct isp116x *isp116x, void *buf, int len)
-{
-	u8 *dp = (u8 *) buf;
-	u16 *dp2 = (u16 *) buf;
-	u16 w;
-	int quot = len % 4;
-
-	if ((unsigned long)dp2 & 1) {
-		/* not aligned */
-		for (; len > 1; len -= 2) {
-			w = *dp++;
-			w |= *dp++ << 8;
-			isp116x_raw_write_data16(isp116x, w);
-		}
-		if (len)
-			isp116x_write_data16(isp116x, (u16) * dp);
-	} else {
-		/* aligned */
-		for (; len > 1; len -= 2)
-			isp116x_raw_write_data16(isp116x, *dp2++);
-		if (len)
-			isp116x_write_data16(isp116x, 0xff & *((u8 *) dp2));
-	}
-	if (quot == 1 || quot == 2)
-		isp116x_raw_write_data16(isp116x, 0);
-}
-
-/* Read len bytes from fifo and then read till 32-bit boundary
- */
-static void read_ptddata_from_fifo(struct isp116x *isp116x, void *buf, int len)
-{
-	u8 *dp = (u8 *) buf;
-	u16 *dp2 = (u16 *) buf;
-	u16 w;
-	int quot = len % 4;
-
-	if ((unsigned long)dp2 & 1) {
-		/* not aligned */
-		for (; len > 1; len -= 2) {
-			w = isp116x_raw_read_data16(isp116x);
-			*dp++ = w & 0xff;
-			*dp++ = (w >> 8) & 0xff;
-		}
-		if (len)
-			*dp = 0xff & isp116x_read_data16(isp116x);
-	} else {
-		/* aligned */
-		for (; len > 1; len -= 2)
-			*dp2++ = isp116x_raw_read_data16(isp116x);
-		if (len)
-			*(u8 *) dp2 = 0xff & isp116x_read_data16(isp116x);
-	}
-	if (quot == 1 || quot == 2)
-		isp116x_raw_read_data16(isp116x);
-}
-
-/* Write PTD's and data for scheduled transfers into the fifo ram.
- * Fifo must be empty and ready */
-static void pack_fifo(struct isp116x *isp116x, struct usb_device *dev,
-		      unsigned long pipe, struct ptd *ptd, int n, void *data,
-		      int len)
-{
-	int buflen = n * sizeof(struct ptd) + len;
-	int i, done;
-
-	DBG("--- pack buffer %p - %d bytes (fifo %d) ---", data, len, buflen);
-
-	isp116x_write_reg16(isp116x, HCuPINT, HCuPINT_AIIEOT);
-	isp116x_write_reg16(isp116x, HCXFERCTR, buflen);
-	isp116x_write_addr(isp116x, HCATLPORT | ISP116x_WRITE_OFFSET);
-
-	done = 0;
-	for (i = 0; i < n; i++) {
-		DBG("i=%d - done=%d - len=%d", i, done, PTD_GET_LEN(&ptd[i]));
-
-		dump_ptd(&ptd[i]);
-		isp116x_write_data16(isp116x, ptd[i].count);
-		isp116x_write_data16(isp116x, ptd[i].mps);
-		isp116x_write_data16(isp116x, ptd[i].len);
-		isp116x_write_data16(isp116x, ptd[i].faddr);
-
-		dump_ptd_data(&ptd[i], (__u8 *) data + done, 0);
-		write_ptddata_to_fifo(isp116x,
-				      (__u8 *) data + done,
-				      PTD_GET_LEN(&ptd[i]));
-
-		done += PTD_GET_LEN(&ptd[i]);
-	}
-}
-
-/* Read the processed PTD's and data from fifo ram back to URBs' buffers.
- * Fifo must be full and done */
-static int unpack_fifo(struct isp116x *isp116x, struct usb_device *dev,
-		       unsigned long pipe, struct ptd *ptd, int n, void *data,
-		       int len)
-{
-	int buflen = n * sizeof(struct ptd) + len;
-	int i, done, cc, ret;
-
-	isp116x_write_reg16(isp116x, HCuPINT, HCuPINT_AIIEOT);
-	isp116x_write_reg16(isp116x, HCXFERCTR, buflen);
-	isp116x_write_addr(isp116x, HCATLPORT);
-
-	ret = TD_CC_NOERROR;
-	done = 0;
-	for (i = 0; i < n; i++) {
-		DBG("i=%d - done=%d - len=%d", i, done, PTD_GET_LEN(&ptd[i]));
-
-		ptd[i].count = isp116x_read_data16(isp116x);
-		ptd[i].mps = isp116x_read_data16(isp116x);
-		ptd[i].len = isp116x_read_data16(isp116x);
-		ptd[i].faddr = isp116x_read_data16(isp116x);
-		dump_ptd(&ptd[i]);
-
-		read_ptddata_from_fifo(isp116x,
-				       (__u8 *) data + done,
-				       PTD_GET_LEN(&ptd[i]));
-		dump_ptd_data(&ptd[i], (__u8 *) data + done, 1);
-
-		done += PTD_GET_LEN(&ptd[i]);
-
-		cc = PTD_GET_CC(&ptd[i]);
-
-		/* Data underrun means basically that we had more buffer space than
-		 * the function had data. It is perfectly normal but upper levels have
-		 * to know how much we actually transferred.
-		 */
-		if (cc == TD_NOTACCESSED ||
-				(cc != TD_CC_NOERROR && (ret == TD_CC_NOERROR || ret == TD_DATAUNDERRUN)))
-			ret = cc;
-	}
-
-	DBG("--- unpack buffer %p - %d bytes (fifo %d) ---", data, len, buflen);
-
-	return ret;
-}
-
-/* Interrupt handling
- */
-static int isp116x_interrupt(struct isp116x *isp116x)
-{
-	u16 irqstat;
-	u32 intstat;
-	int ret = 0;
-
-	isp116x_write_reg16(isp116x, HCuPINTENB, 0);
-	irqstat = isp116x_read_reg16(isp116x, HCuPINT);
-	isp116x_write_reg16(isp116x, HCuPINT, irqstat);
-	DBG("------ irqstat %x ------", irqstat);
-
-	if (irqstat & HCuPINT_ATL) {
-		DBG("------ HCuPINT_ATL ------");
-		udelay(500);
-		ret = 1;
-	}
-
-	if (irqstat & HCuPINT_OPR) {
-		intstat = isp116x_read_reg32(isp116x, HCINTSTAT);
-		isp116x_write_reg32(isp116x, HCINTSTAT, intstat);
-		DBG("------ HCuPINT_OPR %x ------", intstat);
-
-		if (intstat & HCINT_UE) {
-			ERR("unrecoverable error, controller disabled");
-
-			/* FIXME: be optimistic, hope that bug won't repeat
-			 * often. Make some non-interrupt context restart the
-			 * controller. Count and limit the retries though;
-			 * either hardware or software errors can go forever...
-			 */
-			isp116x_reset(isp116x);
-			ret = -1;
-			return -1;
-		}
-
-		if (intstat & HCINT_RHSC) {
-			got_rhsc = 1;
-			ret = 1;
-			/* When root hub or any of its ports is going
-			   to come out of suspend, it may take more
-			   than 10ms for status bits to stabilize. */
-			mdelay(20);
-		}
-
-		if (intstat & HCINT_SO) {
-			ERR("schedule overrun");
-			ret = -1;
-		}
-
-		irqstat &= ~HCuPINT_OPR;
-	}
-
-	return ret;
-}
-
-/* With one PTD we can transfer almost 1K in one go;
- * HC does the splitting into endpoint digestible transactions
- */
-struct ptd ptd[1];
-
-static inline int max_transfer_len(struct usb_device *dev, unsigned long pipe)
-{
-	unsigned mpck = usb_maxpacket(dev, pipe);
-
-	/* One PTD can transfer 1023 bytes but try to always
-	 * transfer multiples of endpoint buffer size
-	 */
-	return 1023 / mpck * mpck;
-}
-
-/* Do an USB transfer
- */
-static int isp116x_submit_job(struct usb_device *dev, unsigned long pipe,
-			      int dir, void *buffer, int len)
-{
-	struct isp116x *isp116x = &isp116x_dev;
-	int type = usb_pipetype(pipe);
-	int epnum = usb_pipeendpoint(pipe);
-	int max = usb_maxpacket(dev, pipe);
-	int dir_out = usb_pipeout(pipe);
-	int speed_low = (dev->speed == USB_SPEED_LOW);
-	int i, done = 0, stat, timeout, cc;
-
-	/* 500 frames or 0.5s timeout when function is busy and NAKs transactions for a while */
-	int retries = 500;
-
-	DBG("------------------------------------------------");
-	dump_msg(dev, pipe, buffer, len, "SUBMIT");
-	DBG("------------------------------------------------");
-
-	if (len >= 1024) {
-		ERR("Too big job");
-		dev->status = USB_ST_CRC_ERR;
-		return -1;
-	}
-
-	if (isp116x->disabled) {
-		ERR("EPIPE");
-		dev->status = USB_ST_CRC_ERR;
-		return -1;
-	}
-
-	/* device pulled? Shortcut the action. */
-	if (devgone == dev) {
-		ERR("ENODEV");
-		dev->status = USB_ST_CRC_ERR;
-		return USB_ST_CRC_ERR;
-	}
-
-	if (!max) {
-		ERR("pipesize for pipe %lx is zero", pipe);
-		dev->status = USB_ST_CRC_ERR;
-		return -1;
-	}
-
-	if (type == PIPE_ISOCHRONOUS) {
-		ERR("isochronous transfers not supported");
-		dev->status = USB_ST_CRC_ERR;
-		return -1;
-	}
-
-	/* FIFO not empty? */
-	if (isp116x_read_reg16(isp116x, HCBUFSTAT) & HCBUFSTAT_ATL_FULL) {
-		ERR("****** FIFO not empty! ******");
-		dev->status = USB_ST_BUF_ERR;
-		return -1;
-	}
-
-      retry:
-	isp116x_write_reg32(isp116x, HCINTSTAT, 0xff);
-
-	/* Prepare the PTD data */
-	ptd->count = PTD_CC_MSK | PTD_ACTIVE_MSK |
-		PTD_TOGGLE(usb_gettoggle(dev, epnum, dir_out));
-	ptd->mps = PTD_MPS(max) | PTD_SPD(speed_low) | PTD_EP(epnum) | PTD_LAST_MSK;
-	ptd->len = PTD_LEN(len) | PTD_DIR(dir);
-	ptd->faddr = PTD_FA(usb_pipedevice(pipe));
-
-retry_same:
-	/* Pack data into FIFO ram */
-	pack_fifo(isp116x, dev, pipe, ptd, 1, buffer, len);
-#ifdef EXTRA_DELAY
-	mdelay(EXTRA_DELAY);
-#endif
-
-	/* Start the data transfer */
-
-	/* Allow more time for a BULK device to react - some are slow */
-	if (usb_pipebulk(pipe))
-		timeout = 5000;
-	else
-		timeout = 100;
-
-	/* Wait for it to complete */
-	for (;;) {
-		/* Check whether the controller is done */
-		stat = isp116x_interrupt(isp116x);
-
-		if (stat < 0) {
-			dev->status = USB_ST_CRC_ERR;
-			break;
-		}
-		if (stat > 0)
-			break;
-
-		/* Check the timeout */
-		if (--timeout)
-			udelay(1);
-		else {
-			ERR("CTL:TIMEOUT ");
-			stat = USB_ST_CRC_ERR;
-			break;
-		}
-	}
-
-	/* We got an Root Hub Status Change interrupt */
-	if (got_rhsc) {
-		isp116x_show_regs(isp116x);
-
-		got_rhsc = 0;
-
-		/* Abuse timeout */
-		timeout = rh_check_port_status(isp116x);
-		if (timeout >= 0) {
-			/*
-			 * FIXME! NOTE! AAAARGH!
-			 * This is potentially dangerous because it assumes
-			 * that only one device is ever plugged in!
-			 */
-			devgone = dev;
-		}
-	}
-
-	/* Ok, now we can read transfer status */
-
-	/* FIFO not ready? */
-	if (!(isp116x_read_reg16(isp116x, HCBUFSTAT) & HCBUFSTAT_ATL_DONE)) {
-		ERR("****** FIFO not ready! ******");
-		dev->status = USB_ST_BUF_ERR;
-		return -1;
-	}
-
-	/* Unpack data from FIFO ram */
-	cc = unpack_fifo(isp116x, dev, pipe, ptd, 1, buffer, len);
-
-	i = PTD_GET_COUNT(ptd);
-	done += i;
-	buffer += i;
-	len -= i;
-
-	/* There was some kind of real problem; Prepare the PTD again
-	 * and retry from the failed transaction on
-	 */
-	if (cc && cc != TD_NOTACCESSED && cc != TD_DATAUNDERRUN) {
-		if (retries >= 100) {
-			retries -= 100;
-			/* The chip will have toggled the toggle bit for the failed
-			 * transaction too. We have to toggle it back.
-			 */
-			usb_settoggle(dev, epnum, dir_out, !PTD_GET_TOGGLE(ptd));
-			goto retry;
-		}
-	}
-	/* "Normal" errors; TD_NOTACCESSED would mean in effect that the function have NAKed
-	 * the transactions from the first on for the whole frame. It may be busy and we retry
-	 * with the same PTD. PTD_ACTIVE (and not TD_NOTACCESSED) would mean that some of the
-	 * PTD didn't make it because the function was busy or the frame ended before the PTD
-	 * finished. We prepare the rest of the data and try again.
-	 */
-	else if (cc == TD_NOTACCESSED || PTD_GET_ACTIVE(ptd) || (cc != TD_DATAUNDERRUN && PTD_GET_COUNT(ptd) < PTD_GET_LEN(ptd))) {
-		if (retries) {
-			--retries;
-			if (cc == TD_NOTACCESSED && PTD_GET_ACTIVE(ptd) && !PTD_GET_COUNT(ptd)) goto retry_same;
-			usb_settoggle(dev, epnum, dir_out, PTD_GET_TOGGLE(ptd));
-			goto retry;
-		}
-	}
-
-	if (cc != TD_CC_NOERROR && cc != TD_DATAUNDERRUN) {
-		DBG("****** completition code error %x ******", cc);
-		switch (cc) {
-		case TD_CC_BITSTUFFING:
-			dev->status = USB_ST_BIT_ERR;
-			break;
-		case TD_CC_STALL:
-			dev->status = USB_ST_STALLED;
-			break;
-		case TD_BUFFEROVERRUN:
-		case TD_BUFFERUNDERRUN:
-			dev->status = USB_ST_BUF_ERR;
-			break;
-		default:
-			dev->status = USB_ST_CRC_ERR;
-		}
-		return -cc;
-	}
-	else usb_settoggle(dev, epnum, dir_out, PTD_GET_TOGGLE(ptd));
-
-	dump_msg(dev, pipe, buffer, len, "SUBMIT(ret)");
-
-	dev->status = 0;
-	return done;
-}
-
-/* Adapted from au1x00_usb_ohci.c
- */
-static int isp116x_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
-				 void *buffer, int transfer_len,
-				 struct devrequest *cmd)
-{
-	struct isp116x *isp116x = &isp116x_dev;
-	u32 tmp = 0;
-
-	int leni = transfer_len;
-	int len = 0;
-	int stat = 0;
-	u32 datab[4];
-	u8 *data_buf = (u8 *) datab;
-	u16 bmRType_bReq;
-	u16 wValue;
-	u16 wIndex;
-	u16 wLength;
-
-	if (usb_pipeint(pipe)) {
-		INFO("Root-Hub submit IRQ: NOT implemented");
-		return 0;
-	}
-
-	bmRType_bReq = cmd->requesttype | (cmd->request << 8);
-	wValue = swap_16(cmd->value);
-	wIndex = swap_16(cmd->index);
-	wLength = swap_16(cmd->length);
-
-	DBG("--- HUB ----------------------------------------");
-	DBG("submit rh urb, req=%x val=%#x index=%#x len=%d",
-	    bmRType_bReq, wValue, wIndex, wLength);
-	dump_msg(dev, pipe, buffer, transfer_len, "RH");
-	DBG("------------------------------------------------");
-
-	switch (bmRType_bReq) {
-	case RH_GET_STATUS:
-		DBG("RH_GET_STATUS");
-
-		*(__u16 *) data_buf = swap_16(1);
-		len = 2;
-		break;
-
-	case RH_GET_STATUS | RH_INTERFACE:
-		DBG("RH_GET_STATUS | RH_INTERFACE");
-
-		*(__u16 *) data_buf = swap_16(0);
-		len = 2;
-		break;
-
-	case RH_GET_STATUS | RH_ENDPOINT:
-		DBG("RH_GET_STATUS | RH_ENDPOINT");
-
-		*(__u16 *) data_buf = swap_16(0);
-		len = 2;
-		break;
-
-	case RH_GET_STATUS | RH_CLASS:
-		DBG("RH_GET_STATUS | RH_CLASS");
-
-		tmp = isp116x_read_reg32(isp116x, HCRHSTATUS);
-
-		*(__u32 *) data_buf = swap_32(tmp & ~(RH_HS_CRWE | RH_HS_DRWE));
-		len = 4;
-		break;
-
-	case RH_GET_STATUS | RH_OTHER | RH_CLASS:
-		DBG("RH_GET_STATUS | RH_OTHER | RH_CLASS");
-
-		tmp = isp116x_read_reg32(isp116x, HCRHPORT1 + wIndex - 1);
-		*(__u32 *) data_buf = swap_32(tmp);
-		isp116x_show_regs(isp116x);
-		len = 4;
-		break;
-
-	case RH_CLEAR_FEATURE | RH_ENDPOINT:
-		DBG("RH_CLEAR_FEATURE | RH_ENDPOINT");
-
-		switch (wValue) {
-		case RH_ENDPOINT_STALL:
-			DBG("C_HUB_ENDPOINT_STALL");
-			len = 0;
-			break;
-		}
-		break;
-
-	case RH_CLEAR_FEATURE | RH_CLASS:
-		DBG("RH_CLEAR_FEATURE | RH_CLASS");
-
-		switch (wValue) {
-		case RH_C_HUB_LOCAL_POWER:
-			DBG("C_HUB_LOCAL_POWER");
-			len = 0;
-			break;
-
-		case RH_C_HUB_OVER_CURRENT:
-			DBG("C_HUB_OVER_CURRENT");
-			isp116x_write_reg32(isp116x, HCRHSTATUS, RH_HS_OCIC);
-			len = 0;
-			break;
-		}
-		break;
-
-	case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
-		DBG("RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS");
-
-		switch (wValue) {
-		case RH_PORT_ENABLE:
-			isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
-					    RH_PS_CCS);
-			len = 0;
-			break;
-
-		case RH_PORT_SUSPEND:
-			isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
-					    RH_PS_POCI);
-			len = 0;
-			break;
-
-		case RH_PORT_POWER:
-			isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
-					    RH_PS_LSDA);
-			len = 0;
-			break;
-
-		case RH_C_PORT_CONNECTION:
-			isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
-					    RH_PS_CSC);
-			len = 0;
-			break;
-
-		case RH_C_PORT_ENABLE:
-			isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
-					    RH_PS_PESC);
-			len = 0;
-			break;
-
-		case RH_C_PORT_SUSPEND:
-			isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
-					    RH_PS_PSSC);
-			len = 0;
-			break;
-
-		case RH_C_PORT_OVER_CURRENT:
-			isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
-					    RH_PS_POCI);
-			len = 0;
-			break;
-
-		case RH_C_PORT_RESET:
-			isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
-					    RH_PS_PRSC);
-			len = 0;
-			break;
-
-		default:
-			ERR("invalid wValue");
-			stat = USB_ST_STALLED;
-		}
-
-		isp116x_show_regs(isp116x);
-
-		break;
-
-	case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
-		DBG("RH_SET_FEATURE | RH_OTHER | RH_CLASS");
-
-		switch (wValue) {
-		case RH_PORT_SUSPEND:
-			isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
-					    RH_PS_PSS);
-			len = 0;
-			break;
-
-		case RH_PORT_RESET:
-			/* Spin until any current reset finishes */
-			while (1) {
-				tmp =
-				    isp116x_read_reg32(isp116x,
-						       HCRHPORT1 + wIndex - 1);
-				if (!(tmp & RH_PS_PRS))
-					break;
-				mdelay(1);
-			}
-			isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
-					    RH_PS_PRS);
-			mdelay(10);
-
-			len = 0;
-			break;
-
-		case RH_PORT_POWER:
-			isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
-					    RH_PS_PPS);
-			len = 0;
-			break;
-
-		case RH_PORT_ENABLE:
-			isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
-					    RH_PS_PES);
-			len = 0;
-			break;
-
-		default:
-			ERR("invalid wValue");
-			stat = USB_ST_STALLED;
-		}
-
-		isp116x_show_regs(isp116x);
-
-		break;
-
-	case RH_SET_ADDRESS:
-		DBG("RH_SET_ADDRESS");
-
-		rh_devnum = wValue;
-		len = 0;
-		break;
-
-	case RH_GET_DESCRIPTOR:
-		DBG("RH_GET_DESCRIPTOR: %x, %d", wValue, wLength);
-
-		switch (wValue) {
-		case (USB_DT_DEVICE << 8):	/* device descriptor */
-			len = min_t(unsigned int,
-				    leni, min_t(unsigned int,
-						sizeof(root_hub_dev_des),
-						wLength));
-			data_buf = root_hub_dev_des;
-			break;
-
-		case (USB_DT_CONFIG << 8):	/* configuration descriptor */
-			len = min_t(unsigned int,
-				    leni, min_t(unsigned int,
-						sizeof(root_hub_config_des),
-						wLength));
-			data_buf = root_hub_config_des;
-			break;
-
-		case ((USB_DT_STRING << 8) | 0x00):	/* string 0 descriptors */
-			len = min_t(unsigned int,
-				    leni, min_t(unsigned int,
-						sizeof(root_hub_str_index0),
-						wLength));
-			data_buf = root_hub_str_index0;
-			break;
-
-		case ((USB_DT_STRING << 8) | 0x01):	/* string 1 descriptors */
-			len = min_t(unsigned int,
-				    leni, min_t(unsigned int,
-						sizeof(root_hub_str_index1),
-						wLength));
-			data_buf = root_hub_str_index1;
-			break;
-
-		default:
-			ERR("invalid wValue");
-			stat = USB_ST_STALLED;
-		}
-
-		break;
-
-	case RH_GET_DESCRIPTOR | RH_CLASS:
-		DBG("RH_GET_DESCRIPTOR | RH_CLASS");
-
-		tmp = isp116x_read_reg32(isp116x, HCRHDESCA);
-
-		data_buf[0] = 0x09;	/* min length; */
-		data_buf[1] = 0x29;
-		data_buf[2] = tmp & RH_A_NDP;
-		data_buf[3] = 0;
-		if (tmp & RH_A_PSM)	/* per-port power switching? */
-			data_buf[3] |= 0x01;
-		if (tmp & RH_A_NOCP)	/* no overcurrent reporting? */
-			data_buf[3] |= 0x10;
-		else if (tmp & RH_A_OCPM)	/* per-port overcurrent rep? */
-			data_buf[3] |= 0x08;
-
-		/* Corresponds to data_buf[4-7] */
-		datab[1] = 0;
-		data_buf[5] = (tmp & RH_A_POTPGT) >> 24;
-
-		tmp = isp116x_read_reg32(isp116x, HCRHDESCB);
-
-		data_buf[7] = tmp & RH_B_DR;
-		if (data_buf[2] < 7)
-			data_buf[8] = 0xff;
-		else {
-			data_buf[0] += 2;
-			data_buf[8] = (tmp & RH_B_DR) >> 8;
-			data_buf[10] = data_buf[9] = 0xff;
-		}
-
-		len = min_t(unsigned int, leni,
-			    min_t(unsigned int, data_buf[0], wLength));
-		break;
-
-	case RH_GET_CONFIGURATION:
-		DBG("RH_GET_CONFIGURATION");
-
-		*(__u8 *) data_buf = 0x01;
-		len = 1;
-		break;
-
-	case RH_SET_CONFIGURATION:
-		DBG("RH_SET_CONFIGURATION");
-
-		isp116x_write_reg32(isp116x, HCRHSTATUS, RH_HS_LPSC);
-		len = 0;
-		break;
-
-	default:
-		ERR("*** *** *** unsupported root hub command *** *** ***");
-		stat = USB_ST_STALLED;
-	}
-
-	len = min_t(int, len, leni);
-	if (buffer != data_buf)
-		memcpy(buffer, data_buf, len);
-
-	dev->act_len = len;
-	dev->status = stat;
-	DBG("dev act_len %d, status %d", dev->act_len, dev->status);
-
-	dump_msg(dev, pipe, buffer, transfer_len, "RH(ret)");
-
-	return stat;
-}
-
-/* --- Transfer functions -------------------------------------------------- */
-
-int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
-		   int len, int interval)
-{
-	DBG("dev=%p pipe=%#lx buf=%p size=%d int=%d",
-	    dev, pipe, buffer, len, interval);
-
-	return -1;
-}
-
-int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
-		       int len, struct devrequest *setup)
-{
-	int devnum = usb_pipedevice(pipe);
-	int epnum = usb_pipeendpoint(pipe);
-	int max = max_transfer_len(dev, pipe);
-	int dir_in = usb_pipein(pipe);
-	int done, ret;
-
-	/* Control message is for the HUB? */
-	if (devnum == rh_devnum)
-		return isp116x_submit_rh_msg(dev, pipe, buffer, len, setup);
-
-	/* Ok, no HUB message so send the message to the device */
-
-	/* Setup phase */
-	DBG("--- SETUP PHASE --------------------------------");
-	usb_settoggle(dev, epnum, 1, 0);
-	ret = isp116x_submit_job(dev, pipe,
-				 PTD_DIR_SETUP,
-				 setup, sizeof(struct devrequest));
-	if (ret < 0) {
-		DBG("control setup phase error (ret = %d", ret);
-		return -1;
-	}
-
-	/* Data phase */
-	DBG("--- DATA PHASE ---------------------------------");
-	done = 0;
-	usb_settoggle(dev, epnum, !dir_in, 1);
-	while (done < len) {
-		ret = isp116x_submit_job(dev, pipe,
-					 dir_in ? PTD_DIR_IN : PTD_DIR_OUT,
-					 (__u8 *) buffer + done,
-					 max > len - done ? len - done : max);
-		if (ret < 0) {
-			DBG("control data phase error (ret = %d)", ret);
-			return -1;
-		}
-		done += ret;
-
-		if (dir_in && ret < max)	/* short packet */
-			break;
-	}
-
-	/* Status phase */
-	DBG("--- STATUS PHASE -------------------------------");
-	usb_settoggle(dev, epnum, !dir_in, 1);
-	ret = isp116x_submit_job(dev, pipe,
-				 !dir_in ? PTD_DIR_IN : PTD_DIR_OUT, NULL, 0);
-	if (ret < 0) {
-		DBG("control status phase error (ret = %d", ret);
-		return -1;
-	}
-
-	dev->act_len = done;
-
-	dump_msg(dev, pipe, buffer, len, "DEV(ret)");
-
-	return done;
-}
-
-int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
-		    int len)
-{
-	int dir_out = usb_pipeout(pipe);
-	int max = max_transfer_len(dev, pipe);
-	int done, ret;
-
-	DBG("--- BULK ---------------------------------------");
-	DBG("dev=%ld pipe=%ld buf=%p size=%d dir_out=%d",
-	    usb_pipedevice(pipe), usb_pipeendpoint(pipe), buffer, len, dir_out);
-
-	done = 0;
-	while (done < len) {
-		ret = isp116x_submit_job(dev, pipe,
-					 !dir_out ? PTD_DIR_IN : PTD_DIR_OUT,
-					 (__u8 *) buffer + done,
-					 max > len - done ? len - done : max);
-		if (ret < 0) {
-			DBG("error on bulk message (ret = %d)", ret);
-			return -1;
-		}
-
-		done += ret;
-
-		if (!dir_out && ret < max)	/* short packet */
-			break;
-	}
-
-	dev->act_len = done;
-
-	return 0;
-}
-
-/* --- Basic functions ----------------------------------------------------- */
-
-static int isp116x_sw_reset(struct isp116x *isp116x)
-{
-	int retries = 15;
-	int ret = 0;
-
-	DBG("");
-
-	isp116x->disabled = 1;
-
-	isp116x_write_reg16(isp116x, HCSWRES, HCSWRES_MAGIC);
-	isp116x_write_reg32(isp116x, HCCMDSTAT, HCCMDSTAT_HCR);
-	while (--retries) {
-		/* It usually resets within 1 ms */
-		mdelay(1);
-		if (!(isp116x_read_reg32(isp116x, HCCMDSTAT) & HCCMDSTAT_HCR))
-			break;
-	}
-	if (!retries) {
-		ERR("software reset timeout");
-		ret = -1;
-	}
-	return ret;
-}
-
-static int isp116x_reset(struct isp116x *isp116x)
-{
-	unsigned long t;
-	u16 clkrdy = 0;
-	int ret, timeout = 15 /* ms */ ;
-
-	DBG("");
-
-	ret = isp116x_sw_reset(isp116x);
-	if (ret)
-		return ret;
-
-	for (t = 0; t < timeout; t++) {
-		clkrdy = isp116x_read_reg16(isp116x, HCuPINT) & HCuPINT_CLKRDY;
-		if (clkrdy)
-			break;
-		mdelay(1);
-	}
-	if (!clkrdy) {
-		ERR("clock not ready after %dms", timeout);
-		/* After sw_reset the clock won't report to be ready, if
-		   H_WAKEUP pin is high. */
-		ERR("please make sure that the H_WAKEUP pin is pulled low!");
-		ret = -1;
-	}
-	return ret;
-}
-
-static void isp116x_stop(struct isp116x *isp116x)
-{
-	u32 val;
-
-	DBG("");
-
-	isp116x_write_reg16(isp116x, HCuPINTENB, 0);
-
-	/* Switch off ports' power, some devices don't come up
-	   after next 'start' without this */
-	val = isp116x_read_reg32(isp116x, HCRHDESCA);
-	val &= ~(RH_A_NPS | RH_A_PSM);
-	isp116x_write_reg32(isp116x, HCRHDESCA, val);
-	isp116x_write_reg32(isp116x, HCRHSTATUS, RH_HS_LPS);
-
-	isp116x_sw_reset(isp116x);
-}
-
-/*
- *  Configure the chip. The chip must be successfully reset by now.
- */
-static int isp116x_start(struct isp116x *isp116x)
-{
-	struct isp116x_platform_data *board = isp116x->board;
-	u32 val;
-
-	DBG("");
-
-	/* Clear interrupt status and disable all interrupt sources */
-	isp116x_write_reg16(isp116x, HCuPINT, 0xff);
-	isp116x_write_reg16(isp116x, HCuPINTENB, 0);
-
-	isp116x_write_reg16(isp116x, HCITLBUFLEN, ISP116x_ITL_BUFSIZE);
-	isp116x_write_reg16(isp116x, HCATLBUFLEN, ISP116x_ATL_BUFSIZE);
-
-	/* Hardware configuration */
-	val = HCHWCFG_DBWIDTH(1);
-	if (board->sel15Kres)
-		val |= HCHWCFG_15KRSEL;
-	/* Remote wakeup won't work without working clock */
-	if (board->remote_wakeup_enable)
-		val |= HCHWCFG_CLKNOTSTOP;
-	if (board->oc_enable)
-		val |= HCHWCFG_ANALOG_OC;
-	isp116x_write_reg16(isp116x, HCHWCFG, val);
-
-	/* --- Root hub configuration */
-	val = (25 << 24) & RH_A_POTPGT;
-	/* AN10003_1.pdf recommends RH_A_NPS (no power switching) to
-	   be always set. Yet, instead, we request individual port
-	   power switching. */
-	val |= RH_A_PSM;
-	/* Report overcurrent per port */
-	val |= RH_A_OCPM;
-	isp116x_write_reg32(isp116x, HCRHDESCA, val);
-	isp116x->rhdesca = isp116x_read_reg32(isp116x, HCRHDESCA);
-
-	val = RH_B_PPCM;
-	isp116x_write_reg32(isp116x, HCRHDESCB, val);
-	isp116x->rhdescb = isp116x_read_reg32(isp116x, HCRHDESCB);
-
-	val = 0;
-	if (board->remote_wakeup_enable)
-		val |= RH_HS_DRWE;
-	isp116x_write_reg32(isp116x, HCRHSTATUS, val);
-	isp116x->rhstatus = isp116x_read_reg32(isp116x, HCRHSTATUS);
-
-	isp116x_write_reg32(isp116x, HCFMINTVL, 0x27782edf);
-
-	/* Go operational */
-	val = HCCONTROL_USB_OPER;
-	if (board->remote_wakeup_enable)
-		val |= HCCONTROL_RWE;
-	isp116x_write_reg32(isp116x, HCCONTROL, val);
-
-	/* Disable ports to avoid race in device enumeration */
-	isp116x_write_reg32(isp116x, HCRHPORT1, RH_PS_CCS);
-	isp116x_write_reg32(isp116x, HCRHPORT2, RH_PS_CCS);
-
-	isp116x_show_regs(isp116x);
-
-	isp116x->disabled = 0;
-
-	return 0;
-}
-
-/* --- Init functions ------------------------------------------------------ */
-
-int isp116x_check_id(struct isp116x *isp116x)
-{
-	int val;
-
-	val = isp116x_read_reg16(isp116x, HCCHIPID);
-	if ((val & HCCHIPID_MASK) != HCCHIPID_MAGIC) {
-		ERR("invalid chip ID %04x", val);
-		return -1;
-	}
-
-	return 0;
-}
-
-int usb_lowlevel_init(int index, enum usb_init_type init, void **controller))
-{
-	struct isp116x *isp116x = &isp116x_dev;
-
-	DBG("");
-
-	got_rhsc = rh_devnum = 0;
-
-	/* Init device registers addr */
-	isp116x->addr_reg = (u16 *) ISP116X_HCD_ADDR;
-	isp116x->data_reg = (u16 *) ISP116X_HCD_DATA;
-
-	/* Setup specific board settings */
-#ifdef ISP116X_HCD_SEL15kRES
-	isp116x_board.sel15Kres = 1;
-#endif
-#ifdef ISP116X_HCD_OC_ENABLE
-	isp116x_board.oc_enable = 1;
-#endif
-#ifdef ISP116X_HCD_REMOTE_WAKEUP_ENABLE
-	isp116x_board.remote_wakeup_enable = 1;
-#endif
-	isp116x->board = &isp116x_board;
-
-	/* Try to get ISP116x silicon chip ID */
-	if (isp116x_check_id(isp116x) < 0)
-		return -1;
-
-	isp116x->disabled = 1;
-	isp116x->sleeping = 0;
-
-	isp116x_reset(isp116x);
-	isp116x_start(isp116x);
-
-	return 0;
-}
-
-int usb_lowlevel_stop(int index)
-{
-	struct isp116x *isp116x = &isp116x_dev;
-
-	DBG("");
-
-	if (!isp116x->disabled)
-		isp116x_stop(isp116x);
-
-	return 0;
-}
diff --git a/drivers/usb/host/isp116x.h b/drivers/usb/host/isp116x.h
deleted file mode 100644
index 5b7afaf42c..0000000000
--- a/drivers/usb/host/isp116x.h
+++ /dev/null
@@ -1,476 +0,0 @@
-/*
- * ISP116x register declarations and HCD data structures
- *
- * Copyright (C) 2007 Rodolfo Giometti <giometti@linux.it>
- * Copyright (C) 2007 Eurotech S.p.A. <info@eurotech.it>
- * Copyright (C) 2005 Olav Kongas <ok@artecdesign.ee>
- * Portions:
- * Copyright (C) 2004 Lothar Wassmann
- * Copyright (C) 2004 Psion Teklogix
- * Copyright (C) 2004 David Brownell
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifdef DEBUG
-#define DBG(fmt, args...)	\
-		printf("isp116x: %s: " fmt "\n" , __FUNCTION__ , ## args)
-#else
-#define DBG(fmt, args...)	do {} while (0)
-#endif
-
-#ifdef VERBOSE
-#    define VDBG		DBG
-#else
-#    define VDBG(fmt, args...)	do {} while (0)
-#endif
-
-#define ERR(fmt, args...)	\
-		printf("isp116x: %s: " fmt "\n" , __FUNCTION__ , ## args)
-#define WARN(fmt, args...)	\
-		printf("isp116x: %s: " fmt "\n" , __FUNCTION__ , ## args)
-#define INFO(fmt, args...)	\
-		printf("isp116x: " fmt "\n" , ## args)
-
-/* ------------------------------------------------------------------------- */
-
-/* us of 1ms frame */
-#define  MAX_LOAD_LIMIT		850
-
-/* Full speed: max # of bytes to transfer for a single urb
-   at a time must be < 1024 && must be multiple of 64.
-   832 allows transfering 4kiB within 5 frames. */
-#define MAX_TRANSFER_SIZE_FULLSPEED	832
-
-/* Low speed: there is no reason to schedule in very big
-   chunks; often the requested long transfers are for
-   string descriptors containing short strings. */
-#define MAX_TRANSFER_SIZE_LOWSPEED	64
-
-/* Bytetime (us), a rough indication of how much time it
-   would take to transfer a byte of useful data over USB */
-#define BYTE_TIME_FULLSPEED	1
-#define BYTE_TIME_LOWSPEED	20
-
-/* Buffer sizes */
-#define ISP116x_BUF_SIZE	4096
-#define ISP116x_ITL_BUFSIZE	0
-#define ISP116x_ATL_BUFSIZE	((ISP116x_BUF_SIZE) - 2*(ISP116x_ITL_BUFSIZE))
-
-#define ISP116x_WRITE_OFFSET	0x80
-
-/* --- ISP116x registers/bits ---------------------------------------------- */
-
-#define	HCREVISION	0x00
-#define	HCCONTROL	0x01
-#define		HCCONTROL_HCFS	(3 << 6)	/* host controller
-						   functional state */
-#define		HCCONTROL_USB_RESET	(0 << 6)
-#define		HCCONTROL_USB_RESUME	(1 << 6)
-#define		HCCONTROL_USB_OPER	(2 << 6)
-#define		HCCONTROL_USB_SUSPEND	(3 << 6)
-#define		HCCONTROL_RWC	(1 << 9)	/* remote wakeup connected */
-#define		HCCONTROL_RWE	(1 << 10)	/* remote wakeup enable */
-#define	HCCMDSTAT	0x02
-#define		HCCMDSTAT_HCR	(1 << 0)	/* host controller reset */
-#define		HCCMDSTAT_SOC	(3 << 16)	/* scheduling overrun count */
-#define	HCINTSTAT	0x03
-#define		HCINT_SO	(1 << 0)	/* scheduling overrun */
-#define		HCINT_WDH	(1 << 1)	/* writeback of done_head */
-#define		HCINT_SF	(1 << 2)	/* start frame */
-#define		HCINT_RD	(1 << 3)	/* resume detect */
-#define		HCINT_UE	(1 << 4)	/* unrecoverable error */
-#define		HCINT_FNO	(1 << 5)	/* frame number overflow */
-#define		HCINT_RHSC	(1 << 6)	/* root hub status change */
-#define		HCINT_OC	(1 << 30)	/* ownership change */
-#define		HCINT_MIE	(1 << 31)	/* master interrupt enable */
-#define	HCINTENB	0x04
-#define	HCINTDIS	0x05
-#define	HCFMINTVL	0x0d
-#define	HCFMREM		0x0e
-#define	HCFMNUM		0x0f
-#define	HCLSTHRESH	0x11
-#define	HCRHDESCA	0x12
-#define		RH_A_NDP	(0x3 << 0)	/* # downstream ports */
-#define		RH_A_PSM	(1 << 8)	/* power switching mode */
-#define		RH_A_NPS	(1 << 9)	/* no power switching */
-#define		RH_A_DT		(1 << 10)	/* device type (mbz) */
-#define		RH_A_OCPM	(1 << 11)	/* overcurrent protection
-						   mode */
-#define		RH_A_NOCP	(1 << 12)	/* no overcurrent protection */
-#define		RH_A_POTPGT	(0xff << 24)	/* power on -> power good
-						   time */
-#define	HCRHDESCB	0x13
-#define		RH_B_DR		(0xffff << 0)	/* device removable flags */
-#define		RH_B_PPCM	(0xffff << 16)	/* port power control mask */
-#define	HCRHSTATUS	0x14
-#define		RH_HS_LPS	(1 << 0)	/* local power status */
-#define		RH_HS_OCI	(1 << 1)	/* over current indicator */
-#define		RH_HS_DRWE	(1 << 15)	/* device remote wakeup
-						   enable */
-#define		RH_HS_LPSC	(1 << 16)	/* local power status change */
-#define		RH_HS_OCIC	(1 << 17)	/* over current indicator
-						   change */
-#define		RH_HS_CRWE	(1 << 31)	/* clear remote wakeup
-						   enable */
-#define	HCRHPORT1	0x15
-#define		RH_PS_CCS	(1 << 0)	/* current connect status */
-#define		RH_PS_PES	(1 << 1)	/* port enable status */
-#define		RH_PS_PSS	(1 << 2)	/* port suspend status */
-#define		RH_PS_POCI	(1 << 3)	/* port over current
-						   indicator */
-#define		RH_PS_PRS	(1 << 4)	/* port reset status */
-#define		RH_PS_PPS	(1 << 8)	/* port power status */
-#define		RH_PS_LSDA	(1 << 9)	/* low speed device attached */
-#define		RH_PS_CSC	(1 << 16)	/* connect status change */
-#define		RH_PS_PESC	(1 << 17)	/* port enable status change */
-#define		RH_PS_PSSC	(1 << 18)	/* port suspend status
-						   change */
-#define		RH_PS_OCIC	(1 << 19)	/* over current indicator
-						   change */
-#define		RH_PS_PRSC	(1 << 20)	/* port reset status change */
-#define		HCRHPORT_CLRMASK	(0x1f << 16)
-#define	HCRHPORT2	0x16
-#define	HCHWCFG		0x20
-#define		HCHWCFG_15KRSEL		(1 << 12)
-#define		HCHWCFG_CLKNOTSTOP	(1 << 11)
-#define		HCHWCFG_ANALOG_OC	(1 << 10)
-#define		HCHWCFG_DACK_MODE	(1 << 8)
-#define		HCHWCFG_EOT_POL		(1 << 7)
-#define		HCHWCFG_DACK_POL	(1 << 6)
-#define		HCHWCFG_DREQ_POL	(1 << 5)
-#define		HCHWCFG_DBWIDTH_MASK	(0x03 << 3)
-#define		HCHWCFG_DBWIDTH(n)	(((n) << 3) & HCHWCFG_DBWIDTH_MASK)
-#define		HCHWCFG_INT_POL		(1 << 2)
-#define		HCHWCFG_INT_TRIGGER	(1 << 1)
-#define		HCHWCFG_INT_ENABLE	(1 << 0)
-#define	HCDMACFG	0x21
-#define		HCDMACFG_BURST_LEN_MASK	(0x03 << 5)
-#define		HCDMACFG_BURST_LEN(n)	(((n) << 5) & HCDMACFG_BURST_LEN_MASK)
-#define		HCDMACFG_BURST_LEN_1	HCDMACFG_BURST_LEN(0)
-#define		HCDMACFG_BURST_LEN_4	HCDMACFG_BURST_LEN(1)
-#define		HCDMACFG_BURST_LEN_8	HCDMACFG_BURST_LEN(2)
-#define		HCDMACFG_DMA_ENABLE	(1 << 4)
-#define		HCDMACFG_BUF_TYPE_MASK	(0x07 << 1)
-#define		HCDMACFG_CTR_SEL	(1 << 2)
-#define		HCDMACFG_ITLATL_SEL	(1 << 1)
-#define		HCDMACFG_DMA_RW_SELECT	(1 << 0)
-#define	HCXFERCTR	0x22
-#define	HCuPINT		0x24
-#define		HCuPINT_SOF		(1 << 0)
-#define		HCuPINT_ATL		(1 << 1)
-#define		HCuPINT_AIIEOT		(1 << 2)
-#define		HCuPINT_OPR		(1 << 4)
-#define		HCuPINT_SUSP		(1 << 5)
-#define		HCuPINT_CLKRDY		(1 << 6)
-#define	HCuPINTENB	0x25
-#define	HCCHIPID	0x27
-#define		HCCHIPID_MASK		0xff00
-#define		HCCHIPID_MAGIC		0x6100
-#define	HCSCRATCH	0x28
-#define	HCSWRES		0x29
-#define		HCSWRES_MAGIC		0x00f6
-#define	HCITLBUFLEN	0x2a
-#define	HCATLBUFLEN	0x2b
-#define	HCBUFSTAT	0x2c
-#define		HCBUFSTAT_ITL0_FULL	(1 << 0)
-#define		HCBUFSTAT_ITL1_FULL	(1 << 1)
-#define		HCBUFSTAT_ATL_FULL	(1 << 2)
-#define		HCBUFSTAT_ITL0_DONE	(1 << 3)
-#define		HCBUFSTAT_ITL1_DONE	(1 << 4)
-#define		HCBUFSTAT_ATL_DONE	(1 << 5)
-#define	HCRDITL0LEN	0x2d
-#define	HCRDITL1LEN	0x2e
-#define	HCITLPORT	0x40
-#define	HCATLPORT	0x41
-
-/* PTD accessor macros. */
-#define PTD_GET_COUNT(p)	(((p)->count & PTD_COUNT_MSK) >> 0)
-#define PTD_COUNT(v)		(((v) << 0) & PTD_COUNT_MSK)
-#define PTD_GET_TOGGLE(p)	(((p)->count & PTD_TOGGLE_MSK) >> 10)
-#define PTD_TOGGLE(v)		(((v) << 10) & PTD_TOGGLE_MSK)
-#define PTD_GET_ACTIVE(p)	(((p)->count & PTD_ACTIVE_MSK) >> 11)
-#define PTD_ACTIVE(v)		(((v) << 11) & PTD_ACTIVE_MSK)
-#define PTD_GET_CC(p)		(((p)->count & PTD_CC_MSK) >> 12)
-#define PTD_CC(v)		(((v) << 12) & PTD_CC_MSK)
-#define PTD_GET_MPS(p)		(((p)->mps & PTD_MPS_MSK) >> 0)
-#define PTD_MPS(v)		(((v) << 0) & PTD_MPS_MSK)
-#define PTD_GET_SPD(p)		(((p)->mps & PTD_SPD_MSK) >> 10)
-#define PTD_SPD(v)		(((v) << 10) & PTD_SPD_MSK)
-#define PTD_GET_LAST(p)		(((p)->mps & PTD_LAST_MSK) >> 11)
-#define PTD_LAST(v)		(((v) << 11) & PTD_LAST_MSK)
-#define PTD_GET_EP(p)		(((p)->mps & PTD_EP_MSK) >> 12)
-#define PTD_EP(v)		(((v) << 12) & PTD_EP_MSK)
-#define PTD_GET_LEN(p)		(((p)->len & PTD_LEN_MSK) >> 0)
-#define PTD_LEN(v)		(((v) << 0) & PTD_LEN_MSK)
-#define PTD_GET_DIR(p)		(((p)->len & PTD_DIR_MSK) >> 10)
-#define PTD_DIR(v)		(((v) << 10) & PTD_DIR_MSK)
-#define PTD_GET_B5_5(p)		(((p)->len & PTD_B5_5_MSK) >> 13)
-#define PTD_B5_5(v)		(((v) << 13) & PTD_B5_5_MSK)
-#define PTD_GET_FA(p)		(((p)->faddr & PTD_FA_MSK) >> 0)
-#define PTD_FA(v)		(((v) << 0) & PTD_FA_MSK)
-#define PTD_GET_FMT(p)		(((p)->faddr & PTD_FMT_MSK) >> 7)
-#define PTD_FMT(v)		(((v) << 7) & PTD_FMT_MSK)
-
-/*  Hardware transfer status codes -- CC from ptd->count */
-#define TD_CC_NOERROR      0x00
-#define TD_CC_CRC          0x01
-#define TD_CC_BITSTUFFING  0x02
-#define TD_CC_DATATOGGLEM  0x03
-#define TD_CC_STALL        0x04
-#define TD_DEVNOTRESP      0x05
-#define TD_PIDCHECKFAIL    0x06
-#define TD_UNEXPECTEDPID   0x07
-#define TD_DATAOVERRUN     0x08
-#define TD_DATAUNDERRUN    0x09
-    /* 0x0A, 0x0B reserved for hardware */
-#define TD_BUFFEROVERRUN   0x0C
-#define TD_BUFFERUNDERRUN  0x0D
-    /* 0x0E, 0x0F reserved for HCD */
-#define TD_NOTACCESSED     0x0F
-
-/* ------------------------------------------------------------------------- */
-
-#define	LOG2_PERIODIC_SIZE	5	/* arbitrary; this matches OHCI */
-#define	PERIODIC_SIZE		(1 << LOG2_PERIODIC_SIZE)
-
-/* Philips transfer descriptor */
-struct ptd {
-	u16 count;
-#define	PTD_COUNT_MSK	(0x3ff << 0)
-#define	PTD_TOGGLE_MSK	(1 << 10)
-#define	PTD_ACTIVE_MSK	(1 << 11)
-#define	PTD_CC_MSK	(0xf << 12)
-	u16 mps;
-#define	PTD_MPS_MSK	(0x3ff << 0)
-#define	PTD_SPD_MSK	(1 << 10)
-#define	PTD_LAST_MSK	(1 << 11)
-#define	PTD_EP_MSK	(0xf << 12)
-	u16 len;
-#define	PTD_LEN_MSK	(0x3ff << 0)
-#define	PTD_DIR_MSK	(3 << 10)
-#define	PTD_DIR_SETUP	(0)
-#define	PTD_DIR_OUT	(1)
-#define	PTD_DIR_IN	(2)
-#define	PTD_B5_5_MSK	(1 << 13)
-	u16 faddr;
-#define	PTD_FA_MSK	(0x7f << 0)
-#define	PTD_FMT_MSK	(1 << 7)
-} __attribute__ ((packed, aligned(2)));
-
-struct isp116x_ep {
-	struct usb_device *udev;
-	struct ptd ptd;
-
-	u8 maxpacket;
-	u8 epnum;
-	u8 nextpid;
-
-	u16 length;		/* of current packet */
-	unsigned char *data;	/* to databuf */
-
-	u16 error_count;
-};
-
-/* URB struct */
-#define N_URB_TD		48
-#define URB_DEL			1
-typedef struct {
-	struct isp116x_ep *ed;
-	void *transfer_buffer;	/* (in) associated data buffer */
-	int actual_length;	/* (return) actual transfer length */
-	unsigned long pipe;	/* (in) pipe information */
-#if 0
-	int state;
-#endif
-} urb_priv_t;
-
-struct isp116x_platform_data {
-	/* Enable internal resistors on downstream ports */
-	unsigned sel15Kres:1;
-	/* On-chip overcurrent detection */
-	unsigned oc_enable:1;
-	/* Enable wakeup by devices on usb bus (e.g. wakeup
-	   by attachment/detachment or by device activity
-	   such as moving a mouse). When chosen, this option
-	   prevents stopping internal clock, increasing
-	   thereby power consumption in suspended state. */
-	unsigned remote_wakeup_enable:1;
-};
-
-struct isp116x {
-	u16 *addr_reg;
-	u16 *data_reg;
-
-	struct isp116x_platform_data *board;
-
-	struct dentry *dentry;
-	unsigned long stat1, stat2, stat4, stat8, stat16;
-
-	/* Status flags */
-	unsigned disabled:1;
-	unsigned sleeping:1;
-
-	/* Root hub registers */
-	u32 rhdesca;
-	u32 rhdescb;
-	u32 rhstatus;
-	u32 rhport[2];
-
-	/* Schedule for the current frame */
-	struct isp116x_ep *atl_active;
-	int atl_buflen;
-	int atl_bufshrt;
-	int atl_last_dir;
-	int atl_finishing;
-};
-
-/* ------------------------------------------------- */
-
-/* Inter-io delay (ns). The chip is picky about access timings; it
- * expects at least:
- * 150ns delay between consecutive accesses to DATA_REG,
- * 300ns delay between access to ADDR_REG and DATA_REG
- * OE, WE MUST NOT be changed during these intervals
- */
-#if defined(UDELAY)
-#define	isp116x_delay(h,d)	udelay(d)
-#else
-#define	isp116x_delay(h,d)	do {} while (0)
-#endif
-
-static inline void isp116x_write_addr(struct isp116x *isp116x, unsigned reg)
-{
-	writew(reg & 0xff, isp116x->addr_reg);
-	isp116x_delay(isp116x, UDELAY);
-}
-
-static inline void isp116x_write_data16(struct isp116x *isp116x, u16 val)
-{
-	writew(val, isp116x->data_reg);
-	isp116x_delay(isp116x, UDELAY);
-}
-
-static inline void isp116x_raw_write_data16(struct isp116x *isp116x, u16 val)
-{
-	__raw_writew(val, isp116x->data_reg);
-	isp116x_delay(isp116x, UDELAY);
-}
-
-static inline u16 isp116x_read_data16(struct isp116x *isp116x)
-{
-	u16 val;
-
-	val = readw(isp116x->data_reg);
-	isp116x_delay(isp116x, UDELAY);
-	return val;
-}
-
-static inline u16 isp116x_raw_read_data16(struct isp116x *isp116x)
-{
-	u16 val;
-
-	val = __raw_readw(isp116x->data_reg);
-	isp116x_delay(isp116x, UDELAY);
-	return val;
-}
-
-static inline void isp116x_write_data32(struct isp116x *isp116x, u32 val)
-{
-	writew(val & 0xffff, isp116x->data_reg);
-	isp116x_delay(isp116x, UDELAY);
-	writew(val >> 16, isp116x->data_reg);
-	isp116x_delay(isp116x, UDELAY);
-}
-
-static inline u32 isp116x_read_data32(struct isp116x *isp116x)
-{
-	u32 val;
-
-	val = (u32) readw(isp116x->data_reg);
-	isp116x_delay(isp116x, UDELAY);
-	val |= ((u32) readw(isp116x->data_reg)) << 16;
-	isp116x_delay(isp116x, UDELAY);
-	return val;
-}
-
-/* Let's keep register access functions out of line. Hint:
-   we wait at least 150 ns at every access.
-*/
-static u16 isp116x_read_reg16(struct isp116x *isp116x, unsigned reg)
-{
-	isp116x_write_addr(isp116x, reg);
-	return isp116x_read_data16(isp116x);
-}
-
-static u32 isp116x_read_reg32(struct isp116x *isp116x, unsigned reg)
-{
-	isp116x_write_addr(isp116x, reg);
-	return isp116x_read_data32(isp116x);
-}
-
-static void isp116x_write_reg16(struct isp116x *isp116x, unsigned reg,
-				unsigned val)
-{
-	isp116x_write_addr(isp116x, reg | ISP116x_WRITE_OFFSET);
-	isp116x_write_data16(isp116x, (u16) (val & 0xffff));
-}
-
-static void isp116x_write_reg32(struct isp116x *isp116x, unsigned reg,
-				unsigned val)
-{
-	isp116x_write_addr(isp116x, reg | ISP116x_WRITE_OFFSET);
-	isp116x_write_data32(isp116x, (u32) val);
-}
-
-/* --- USB HUB constants (not OHCI-specific; see hub.h) -------------------- */
-
-/* destination of request */
-#define RH_INTERFACE               0x01
-#define RH_ENDPOINT                0x02
-#define RH_OTHER                   0x03
-
-#define RH_CLASS                   0x20
-#define RH_VENDOR                  0x40
-
-/* Requests: bRequest << 8 | bmRequestType */
-#define RH_GET_STATUS           0x0080
-#define RH_CLEAR_FEATURE        0x0100
-#define RH_SET_FEATURE          0x0300
-#define RH_SET_ADDRESS          0x0500
-#define RH_GET_DESCRIPTOR       0x0680
-#define RH_SET_DESCRIPTOR       0x0700
-#define RH_GET_CONFIGURATION    0x0880
-#define RH_SET_CONFIGURATION    0x0900
-#define RH_GET_STATE            0x0280
-#define RH_GET_INTERFACE        0x0A80
-#define RH_SET_INTERFACE        0x0B00
-#define RH_SYNC_FRAME           0x0C80
-/* Our Vendor Specific Request */
-#define RH_SET_EP               0x2000
-
-/* Hub port features */
-#define RH_PORT_CONNECTION         0x00
-#define RH_PORT_ENABLE             0x01
-#define RH_PORT_SUSPEND            0x02
-#define RH_PORT_OVER_CURRENT       0x03
-#define RH_PORT_RESET              0x04
-#define RH_PORT_POWER              0x08
-#define RH_PORT_LOW_SPEED          0x09
-
-#define RH_C_PORT_CONNECTION       0x10
-#define RH_C_PORT_ENABLE           0x11
-#define RH_C_PORT_SUSPEND          0x12
-#define RH_C_PORT_OVER_CURRENT     0x13
-#define RH_C_PORT_RESET            0x14
-
-/* Hub features */
-#define RH_C_HUB_LOCAL_POWER       0x00
-#define RH_C_HUB_OVER_CURRENT      0x01
-
-#define RH_DEVICE_REMOTE_WAKEUP    0x00
-#define RH_ENDPOINT_STALL          0x01
-
-#define RH_ACK                     0x01
-#define RH_REQ_ERR                 -1
-#define RH_NACK                    0x00

commit 7dfe2a4c07a9363fa280eeaab4a564b94e26ab14
Author: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Date:   Thu Jan 25 20:43:58 2018 +0100

    UPSTREAM: usb: ehci: mxs: fix swapped argument in ehci_writel()
    
    ehci_writel() swaps the arguments for address and value. One call
    in ehci-mxs ignores that.
    
    This fixes the warning:
    
    drivers/usb/host/ehci-mxs.c: In function ?ehci_hcd_stop?:
    drivers/usb/host/ehci-mxs.c:159:19: error: initialization makes integer from pointer without a cast [-Werror=int-conversion]
      ehci_writel(tmp, &hcor->or_usbcmd);
                       ^
    arch/arm/include/asm/io.h:117:34: note: in definition of macro ?writel?
     #define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; })
                                      ^
    drivers/usb/host/ehci-mxs.c:159:2: note: in expansion of macro ?ehci_writel?
      ^~~~~~~~~~~
    
    Change-Id: I9b7bccbd906f21bb51e91bae97c3f9f08e199493
    Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 6f7c92db4c7d1e45503fb10e60caa1ec2bb18d10)

diff --git a/drivers/usb/host/ehci-mxs.c b/drivers/usb/host/ehci-mxs.c
index 6b8d969bb0..9872415562 100644
--- a/drivers/usb/host/ehci-mxs.c
+++ b/drivers/usb/host/ehci-mxs.c
@@ -156,7 +156,7 @@ int ehci_hcd_stop(int index)
 
 	tmp = ehci_readl(&hcor->or_usbcmd);
 	tmp &= ~CMD_RUN;
-	ehci_writel(tmp, &hcor->or_usbcmd);
+	ehci_writel(&hcor->or_usbcmd, tmp);
 
 	/* Disable the PHY */
 	tmp = USBPHY_PWD_RXPWDRX | USBPHY_PWD_RXPWDDIFF |

commit 0b717d3ee00e8acb88cb50244c01ad6e76acba41
Author: Gustavo A. R. Silva <gustavo@embeddedor.com>
Date:   Sat Jan 20 02:37:31 2018 -0600

    UPSTREAM: usb: xhci: Fix bool initialization in xhci_bulk_tx
    
    Bool initializations should use true and false.
    
    This issue was detected with the help of Coccinelle.
    
    Change-Id: I0764368f0b911e5f5c5b2bd425c01fc68a4a3227
    Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
    Cc: Bin Meng <bmeng.cn@gmail.com>
    Cc: Marek Vasut <marex@denx.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit eacccbda431c4eff9073f2b4abfaba88524cd12f)

diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
index 579e6707eb..7599c9183a 100644
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -557,7 +557,7 @@ int xhci_bulk_tx(struct usb_device *udev, unsigned long pipe,
 {
 	int num_trbs = 0;
 	struct xhci_generic_trb *start_trb;
-	bool first_trb = 0;
+	bool first_trb = false;
 	int start_cycle;
 	u32 field = 0;
 	u32 length_field = 0;

commit 6a6bbe5b360d5b7e00cc0e333f04059b62f896dc
Author: Chen-Yu Tsai <wens@csie.org>
Date:   Sat Dec 30 20:44:07 2017 +0800

    UPSTREAM: musb: sunxi: Use base address from device tree
    
    Now that the musb sunxi glue driver is completely device model / device
    tree driven, we should use the base address from the device tree,
    instead of hard-coding it in the source code.
    
    Change-Id: I2f0a568df81baaf46082e536c5738836a0aecdd8
    Fixes: 3a61b080acee ("musb: sunxi: switch to the device model")
    Signed-off-by: Chen-Yu Tsai <wens@csie.org>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit f4f9896ac310402de0e4f5d2c15a93cb89425aca)

diff --git a/drivers/usb/musb-new/sunxi.c b/drivers/usb/musb-new/sunxi.c
index 7ee44ea919..aedc24b937 100644
--- a/drivers/usb/musb-new/sunxi.c
+++ b/drivers/usb/musb-new/sunxi.c
@@ -312,13 +312,16 @@ static int musb_usb_probe(struct udevice *dev)
 {
 	struct musb_host_data *host = dev_get_priv(dev);
 	struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
+	void *base = dev_read_addr_ptr(dev);
 	int ret;
 
+	if (!base)
+		return -EINVAL;
+
 	priv->desc_before_addr = true;
 
 #ifdef CONFIG_USB_MUSB_HOST
-	host->host = musb_init_controller(&musb_plat, NULL,
-					  (void *)SUNXI_USB0_BASE);
+	host->host = musb_init_controller(&musb_plat, NULL, base);
 	if (!host->host)
 		return -EIO;
 
@@ -326,7 +329,7 @@ static int musb_usb_probe(struct udevice *dev)
 	if (!ret)
 		printf("Allwinner mUSB OTG (Host)\n");
 #else
-	ret = musb_register(&musb_plat, NULL, (void *)SUNXI_USB0_BASE);
+	ret = musb_register(&musb_plat, NULL, base);
 	if (!ret)
 		printf("Allwinner mUSB OTG (Peripheral)\n");
 #endif

commit 69c579eb4632795a3e14921f1130474b4d899067
Author: Ran Wang <ran.wang_1@nxp.com>
Date:   Wed Dec 20 10:34:19 2017 +0800

    UPSTREAM: usb: ehci: fsl: Fix some compile warnings.
    
    When enable CONFIG_HAS_FSL_DR_USB, we might encounter below compile
    warning, apply this patch can fix it:
    
    drivers/usb/host/ehci-fsl.c:109:4: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
       ((u32)hccr + HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
        ^
    drivers/usb/host/ehci-fsl.c:108:9: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
      hcor = (struct ehci_hcor *)
             ^
    drivers/usb/host/ehci-fsl.c:115:8: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
            (u32)hccr, (u32)hcor,
            ^
    include/log.h:131:26: note: in definition of macro 'debug_cond'
        printf(pr_fmt(fmt), ##args); \
                              ^~~~
    drivers/usb/host/ehci-fsl.c:114:2: note: in expansion of macro 'debug'
      debug("ehci-fsl: init hccr %x and hcor %x hc_length %d\n",
      ^~~~~
    drivers/usb/host/ehci-fsl.c:115:19: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
            (u32)hccr, (u32)hcor,
                       ^
    include/log.h:131:26: note: in definition of macro 'debug_cond'
        printf(pr_fmt(fmt), ##args); \
                              ^~~~
    drivers/usb/host/ehci-fsl.c:114:2: note: in expansion of macro 'debug'
      debug("ehci-fsl: init hccr %x and hcor %x hc_length %d\n",
      ^~~~~
    
    Change-Id: I8313bda124018031c621ce1439f180b185809784
    Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit be3872ea816cdc59c346c17a71dfc8d0d0bbf3ea)

diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index 62c431b99f..17d1fae382 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -106,14 +106,14 @@ static int ehci_fsl_probe(struct udevice *dev)
 	ehci = (struct usb_ehci *)priv->hcd_base;
 	hccr = (struct ehci_hccr *)(&ehci->caplength);
 	hcor = (struct ehci_hcor *)
-		((u32)hccr + HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
+		((void *)hccr + HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
 
 	if (ehci_fsl_init(priv, ehci, hccr, hcor) < 0)
 		return -ENXIO;
 
-	debug("ehci-fsl: init hccr %x and hcor %x hc_length %d\n",
-	      (u32)hccr, (u32)hcor,
-	      (u32)HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
+	debug("ehci-fsl: init hccr %p and hcor %p hc_length %d\n",
+	      (void *)hccr, (void *)hcor,
+	      HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
 
 	return ehci_register(dev, hccr, hcor, &fsl_ehci_ops, 0, USB_INIT_HOST);
 }

commit 739cab1759fcda18338c643d9e3b81fa42604f4e
Author: Wenbin song <wenbin.song@nxp.com>
Date:   Mon Dec 4 12:18:28 2017 +0800

    UPSTREAM: armv8: ls1043a/ls2080a: check SoC by device ID
    
    Check LS1043A/LS2080a by device ID without using personality ID to
    determine revision number. This check applies to all various
    personalities of the same SoC family.
    
    Change-Id: I7be6b46fc17aa7f7a3a40677de0c18c9dd095c52
    Signed-off-by: Wenbin Song <wenbin.song@nxp.com>
    Reviewed-by: York Sun <york.sun@nxp.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit a8f33034f2ed029dd04aae4cfdf11bf1f13a03a2)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index c6fede31ba..0834002fa6 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -501,8 +501,8 @@ int arch_early_init_r(void)
 	 * erratum A009635 is valid only for LS2080A SoC and
 	 * its personalitiesi
 	 */
-	svr_dev_id = get_svr() >> 16;
-	if (svr_dev_id == SVR_DEV_LS2080A)
+	svr_dev_id = get_svr();
+	if (IS_SVR_DEV(svr_dev_id, SVR_DEV(SVR_LS2080A)))
 		erratum_a009635();
 #endif
 #if defined(CONFIG_SYS_FSL_ERRATUM_A009942) && defined(CONFIG_SYS_FSL_DDR)
@@ -561,8 +561,8 @@ int timer_init(void)
 	 * For LS2080A SoC and its personalities, timer controller
 	 * offset is different
 	 */
-	svr_dev_id = get_svr() >> 16;
-	if (svr_dev_id == SVR_DEV_LS2080A)
+	svr_dev_id = get_svr();
+	if (IS_SVR_DEV(svr_dev_id, SVR_DEV(SVR_LS2080A)))
 		cntcr = (u32 *)SYS_FSL_LS2080A_LS2085A_TIMER_ADDR;
 
 #endif
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
index 247a1833bc..d308d1bbb5 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
@@ -145,7 +145,7 @@ static void fdt_fixup_gic(void *blob)
 
 	val = gur_in32(&gur->svr);
 
-	if (SVR_SOC_VER(val) != SVR_LS1043A) {
+	if (!IS_SVR_DEV(val, SVR_DEV(SVR_LS1043A))) {
 		align_64k = 1;
 	} else if (SVR_REV(val) != REV1_0) {
 		val = scfg_in32(&scfg->gic_align) & (0x01 << GIC_ADDR_BIT);
@@ -327,7 +327,7 @@ static void fdt_fixup_msi(void *blob)
 
 	rev = gur_in32(&gur->svr);
 
-	if (SVR_SOC_VER(rev) != SVR_LS1043A)
+	if (!IS_SVR_DEV(rev, SVR_DEV(SVR_LS1043A)))
 		return;
 
 	rev = SVR_REV(rev);
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
index 3136e3f3a2..c4c84b6d3c 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
+++ b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
@@ -37,9 +37,8 @@ ENTRY(get_gic_offset)
 	ldr     x2, =DCFG_CCSR_SVR
 	ldr	w2, [x2]
 	rev	w2, w2
-	mov	w3, w2
-	ands	w3, w3, #SVR_WO_E << 8
-	mov	w4, #SVR_LS1043A << 8
+	lsr	w3, w2, #16
+	ldr	w4, =SVR_DEV(SVR_LS1043A)
 	cmp	w3, w4
 	b.ne	1f
 	ands	w2, w2, #0xff
@@ -92,7 +91,7 @@ ENTRY(lowlevel_init)
 	 */
 	bl	get_svr
 	lsr	w0, w0, #16
-	ldr	w1, =SVR_DEV_LS2080A
+	ldr	w1, =SVR_DEV(SVR_LS2080A)
 	cmp	w0, w1
 	b.eq	1f
 
@@ -224,7 +223,7 @@ ENTRY(lowlevel_init)
 	 */
 	bl	get_svr
 	lsr	w0, w0, #16
-	ldr	w1, =SVR_DEV_LS2080A
+	ldr	w1, =SVR_DEV(SVR_LS2080A)
 	cmp	w0, w1
 	b.eq	1f
 
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
index aeb12739aa..ef54c16563 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
@@ -68,8 +68,6 @@ struct cpu_type {
 #define SVR_LS2081A		0x870918
 #define SVR_LS2041A		0x870914
 
-#define SVR_DEV_LS2080A		0x8701
-
 #define SVR_MAJ(svr)		(((svr) >> 4) & 0xf)
 #define SVR_MIN(svr)		(((svr) >> 0) & 0xf)
 #define SVR_REV(svr)		(((svr) >> 0) & 0xff)
@@ -77,6 +75,8 @@ struct cpu_type {
 #define IS_E_PROCESSOR(svr)	(!((svr >> 8) & 0x1))
 #define IS_SVR_REV(svr, maj, min) \
 		((SVR_MAJ(svr) == (maj)) && (SVR_MIN(svr) == (min)))
+#define SVR_DEV(svr)		((svr) >> 8)
+#define IS_SVR_DEV(svr, dev)	(((svr) >> 16) == (dev))
 
 /* ahci port register default value */
 #define AHCI_PORT_PHY_1_CFG    0xa003fffe
diff --git a/drivers/net/fsl-mc/dpio/qbman_private.h b/drivers/net/fsl-mc/dpio/qbman_private.h
index 73bbae373e..873323be0f 100644
--- a/drivers/net/fsl-mc/dpio/qbman_private.h
+++ b/drivers/net/fsl-mc/dpio/qbman_private.h
@@ -175,8 +175,8 @@ void qbman_version(u32 *major, u32 *minor)
 	 * LS2080A SoC and its personalities has qbman cotroller version 4.0
 	 * New SoCs like LS2088A, LS1088A has qbman conroller version 4.1
 	 */
-	svr_dev_id = get_svr() >> 16;
-	if (svr_dev_id == SVR_DEV_LS2080A) {
+	svr_dev_id = get_svr();
+	if (IS_SVR_DEV(svr_dev_id, SVR_DEV(SVR_LS2080A))) {
 		*major = 4;
 		*minor = 0;
 	} else {
diff --git a/drivers/usb/common/fsl-errata.c b/drivers/usb/common/fsl-errata.c
index 823beb32f6..6e2a464e0a 100644
--- a/drivers/usb/common/fsl-errata.c
+++ b/drivers/usb/common/fsl-errata.c
@@ -198,6 +198,11 @@ bool has_erratum_a010151(void)
 	u32 svr = get_svr();
 	u32 soc = SVR_SOC_VER(svr);
 
+#ifdef CONFIG_ARM64
+	if (IS_SVR_DEV(svr, SVR_DEV(SVR_LS1043A)))
+		return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1);
+#endif
+
 	switch (soc) {
 #ifdef CONFIG_ARM64
 	case SVR_LS2080A:
@@ -209,8 +214,6 @@ bool has_erratum_a010151(void)
 	case SVR_LS1046A:
 	case SVR_LS1012A:
 		return IS_SVR_REV(svr, 1, 0);
-	case SVR_LS1043A:
-		return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1);
 #endif
 #ifdef CONFIG_ARCH_LS1021A
 	case SOC_VER_LS1020:

commit 04be14f81d53df29746fad71a81683a9ea39e350
Author: Chris Brandt <chris.brandt@renesas.com>
Date:   Wed Nov 29 14:49:21 2017 -0500

    UPSTREAM: usb: r8a66597: convert wait loop to readw_poll_timeout
    
    It is better to use an existing wait loop implementation.
    
    Change-Id: I0e17c681c338573e64b912f0b6ce4ad86f336471
    Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 243fd6420d2275275b8267ead971a7dbd69b369f)

diff --git a/drivers/usb/host/r8a66597-hcd.c b/drivers/usb/host/r8a66597-hcd.c
index 28d2bc8454..e0ca2cb0d4 100644
--- a/drivers/usb/host/r8a66597-hcd.c
+++ b/drivers/usb/host/r8a66597-hcd.c
@@ -10,6 +10,7 @@
 #include <console.h>
 #include <usb.h>
 #include <asm/io.h>
+#include <linux/iopoll.h>
 
 #include "r8a66597.h"
 
@@ -297,7 +298,6 @@ static int send_setup_packet(struct r8a66597 *r8a66597, struct usb_device *dev,
 	int timeout = 3000;
 #if defined(CONFIG_RZA_USB)
 	u16 dcpctr;
-	int timeout2 = 10000;
 #endif
 	u16 devsel = setup->request == USB_REQ_SET_ADDRESS ? 0 : dev->devnum;
 
@@ -308,13 +308,10 @@ static int send_setup_packet(struct r8a66597 *r8a66597, struct usb_device *dev,
 #if defined(CONFIG_RZA_USB)
 	dcpctr = r8a66597_read(r8a66597, DCPCTR);
 	if ((dcpctr & PID) == PID_BUF) {
-		timeout2 = 10000;
-		while (!(dcpctr & BSTS)) {
-			dcpctr = r8a66597_read(r8a66597, DCPCTR);
-			if (timeout2-- < 0) {
-				printf("DCPCTR clear timeout!\n");
-				break;
-			}
+		if (readw_poll_timeout(r8a66597->reg + DCPCTR, dcpctr,
+				       dcpctr & BSTS, 1000) < 0) {
+			printf("DCPCTR BSTS timeout!\n");
+			return -ETIMEDOUT;
 		}
 	}
 #endif

commit 9b0c1da92cdcff1fe2515043228d7e3ddde9e960
Author: Chris Brandt <chris.brandt@renesas.com>
Date:   Mon Nov 27 14:04:10 2017 -0500

    UPSTREAM: usb: r8a66597: Add support for RZ/A series
    
    While the USB HW in the RZ/A is basically the same, there are some
    differences from the original versions that were in the SH SoCs.
    
    Change-Id: I3e285f8060b152bbd41041ba632d057e6b8fde8c
    Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 11f4678962960636f1a07cea8d040f468463f8c3)

diff --git a/drivers/usb/host/r8a66597-hcd.c b/drivers/usb/host/r8a66597-hcd.c
index 6ef51906c2..28d2bc8454 100644
--- a/drivers/usb/host/r8a66597-hcd.c
+++ b/drivers/usb/host/r8a66597-hcd.c
@@ -82,6 +82,7 @@ static int r8a66597_clock_enable(struct r8a66597 *r8a66597)
 		}
 	} while ((tmp & USBE) != USBE);
 	r8a66597_bclr(r8a66597, USBE, SYSCFG0);
+#if !defined(CONFIG_RZA_USB)
 	r8a66597_mdfy(r8a66597, CONFIG_R8A66597_XTAL, XTAL, SYSCFG0);
 
 	i = 0;
@@ -94,6 +95,20 @@ static int r8a66597_clock_enable(struct r8a66597 *r8a66597)
 			return -1;
 		}
 	} while ((tmp & SCKE) != SCKE);
+#else
+	/*
+	 * RZ/A Only:
+	 * Bits XTAL(UCKSEL) and UPLLE in SYSCFG0 for USB0 controls both USB0
+	 * and USB1, so we must always set the USB0 register
+	 */
+#if (CONFIG_R8A66597_XTAL == 1)
+	setbits(le16, R8A66597_BASE0, XTAL);
+#endif
+	mdelay(1);
+	setbits(le16, R8A66597_BASE0, UPLLE);
+	mdelay(1);
+	r8a66597_bset(r8a66597, SUSPM, SUSPMODE0);
+#endif /* CONFIG_RZA_USB */
 #endif	/* #if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) */
 
 	return 0;
@@ -101,6 +116,7 @@ static int r8a66597_clock_enable(struct r8a66597 *r8a66597)
 
 static void r8a66597_clock_disable(struct r8a66597 *r8a66597)
 {
+#if !defined(CONFIG_RZA_USB)
 	r8a66597_bclr(r8a66597, SCKE, SYSCFG0);
 	udelay(1);
 #if !defined(CONFIG_SUPERH_ON_CHIP_R8A66597)
@@ -108,6 +124,15 @@ static void r8a66597_clock_disable(struct r8a66597 *r8a66597)
 	r8a66597_bclr(r8a66597, XCKE, SYSCFG0);
 	r8a66597_bclr(r8a66597, USBE, SYSCFG0);
 #endif
+#else
+	r8a66597_bclr(r8a66597, SUSPM, SUSPMODE0);
+
+	clrbits(le16, R8A66597_BASE0, UPLLE);
+	mdelay(1);
+	r8a66597_bclr(r8a66597, USBE, SYSCFG0);
+	mdelay(1);
+
+#endif
 }
 
 static void r8a66597_enable_port(struct r8a66597 *r8a66597, int port)
@@ -118,7 +143,9 @@ static void r8a66597_enable_port(struct r8a66597 *r8a66597, int port)
 	r8a66597_bset(r8a66597, val, get_syscfg_reg(port));
 	r8a66597_bset(r8a66597, HSE, get_syscfg_reg(port));
 
+#if !defined(CONFIG_RZA_USB)
 	r8a66597_write(r8a66597, BURST | CPU_ADR_RD_WR, get_dmacfg_reg(port));
+#endif
 }
 
 static void r8a66597_disable_port(struct r8a66597 *r8a66597, int port)
@@ -148,7 +175,9 @@ static int enable_controller(struct r8a66597 *r8a66597)
 	if (ret < 0)
 		return ret;
 
+#if !defined(CONFIG_RZA_USB)
 	r8a66597_bset(r8a66597, CONFIG_R8A66597_LDRV & LDRV, PINCFG);
+#endif
 	r8a66597_bset(r8a66597, USBE, SYSCFG0);
 
 	r8a66597_bset(r8a66597, INTL, SOFCFG);
@@ -266,12 +295,30 @@ static int send_setup_packet(struct r8a66597 *r8a66597, struct usb_device *dev,
 	unsigned long setup_addr = USBREQ;
 	u16 intsts1;
 	int timeout = 3000;
+#if defined(CONFIG_RZA_USB)
+	u16 dcpctr;
+	int timeout2 = 10000;
+#endif
 	u16 devsel = setup->request == USB_REQ_SET_ADDRESS ? 0 : dev->devnum;
 
 	r8a66597_write(r8a66597, make_devsel(devsel) |
 				 (8 << dev->maxpacketsize), DCPMAXP);
 	r8a66597_write(r8a66597, ~(SIGN | SACK), INTSTS1);
 
+#if defined(CONFIG_RZA_USB)
+	dcpctr = r8a66597_read(r8a66597, DCPCTR);
+	if ((dcpctr & PID) == PID_BUF) {
+		timeout2 = 10000;
+		while (!(dcpctr & BSTS)) {
+			dcpctr = r8a66597_read(r8a66597, DCPCTR);
+			if (timeout2-- < 0) {
+				printf("DCPCTR clear timeout!\n");
+				break;
+			}
+		}
+	}
+#endif
+
 	for (i = 0; i < 4; i++) {
 		r8a66597_write(r8a66597, le16_to_cpu(p[i]), setup_addr);
 		setup_addr += 2;
diff --git a/drivers/usb/host/r8a66597.h b/drivers/usb/host/r8a66597.h
index 67dc3c4588..baa16605d8 100644
--- a/drivers/usb/host/r8a66597.h
+++ b/drivers/usb/host/r8a66597.h
@@ -87,8 +87,10 @@
 #define DEVADD8		0xE0
 #define DEVADD9		0xE2
 #define DEVADDA		0xE4
+#define SUSPMODE0	0x102	/* RZ/A only */
 
 /* System Configuration Control Register */
+#if !defined(CONFIG_RZA_USB)
 #define	XTAL		0xC000	/* b15-14: Crystal selection */
 #define	  XTAL48	 0x8000	  /* 48MHz */
 #define	  XTAL24	 0x4000	  /* 24MHz */
@@ -98,10 +100,17 @@
 #define	SCKE		0x0400	/* b10: USB clock enable */
 #define	PCSDIS		0x0200	/* b9: not CS wakeup */
 #define	LPSME		0x0100	/* b8: Low power sleep mode */
+#endif
 #define	HSE		0x0080	/* b7: Hi-speed enable */
 #define	DCFM		0x0040	/* b6: Controller function select  */
 #define	DRPD		0x0020	/* b5: D+/- pull down control */
 #define	DPRPU		0x0010	/* b4: D+ pull up control */
+#if defined(CONFIG_RZA_USB)
+#define	XTAL		0x0004	/* b2: Crystal selection */
+#define	  XTAL12	 0x0004	  /* 12MHz */
+#define	  XTAL48	 0x0000	  /* 48MHz */
+#define	UPLLE		0x0002	/* b1: internal PLL control */
+#endif
 #define	USBE		0x0001	/* b0: USB module operation enable */
 
 /* System Configuration Status Register */
@@ -173,10 +182,15 @@
 #if defined(CONFIG_SUPERH_ON_CHIP_R8A66597)
 #define	MBW		0x0800
 #else
+#if !defined(CONFIG_RZA_USB)
 #define	MBW		0x0400	/* b10: Maximum bit width for FIFO access */
+#else
+#define	MBW		0x0800	/* b10: Maximum bit width for FIFO access */
+#endif
 #endif
 #define	  MBW_8		 0x0000	  /*  8bit */
 #define	  MBW_16	 0x0400	  /* 16bit */
+#define	  MBW_32	 0x0800   /* 32bit */
 #define	BIGEND		0x0100	/* b8: Big endian mode */
 #define	  BYTE_LITTLE	 0x0000		/* little dendian */
 #define	  BYTE_BIG	 0x0100		/* big endifan */
@@ -379,6 +393,9 @@
 #define	USBSPD		0x00C0
 #define	RTPORT		0x0001
 
+/* Suspend Mode Register */
+#define SUSPM		0x4000 /* b14: Suspend */
+
 #define R8A66597_MAX_NUM_PIPE		10
 #define R8A66597_BUF_BSIZE		8
 #define R8A66597_MAX_DEVICE		10
@@ -419,7 +436,7 @@ static inline void r8a66597_read_fifo(struct r8a66597 *r8a66597,
 				      int len)
 {
 	int i;
-#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597)
+#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) || defined(CONFIG_RZA_USB)
 	unsigned long fifoaddr = r8a66597->reg + offset;
 	unsigned long count;
 	unsigned long *p = buf;
@@ -453,7 +470,7 @@ static inline void r8a66597_write_fifo(struct r8a66597 *r8a66597,
 {
 	int i;
 	unsigned long fifoaddr = r8a66597->reg + offset;
-#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597)
+#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) || defined(CONFIG_RZA_USB)
 	unsigned long count;
 	unsigned char *pb;
 	unsigned long *p = buf;

commit ebf1b63aee4dd3f2c1c096ed3af71e52b490439b
Author: Vincent Prince <vincent.prince.fr@gmail.com>
Date:   Mon Oct 23 11:16:35 2017 +0200

    UPSTREAM: Trigger watchdog before calling usb_gadget_handle_interrupts
    
    This prevents board resets when calling sdp command on boards which have a watchdog.
    
    Change-Id: Ice6421fda757ae104afee5aa9a2dea584de05192
    Signed-off-by: Vincent Prince <vincent.prince.fr@gmail.com>
    Reviewed-by: Lukasz Majewski <lukma@denx.de>
    Reviewed-by: Stefan Agner <stefan.agner@toradex.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 8171dac00dfcb4c67ad2e4aafaf28fe91d9c5368)

diff --git a/drivers/usb/gadget/f_sdp.c b/drivers/usb/gadget/f_sdp.c
index fd3da922a6..dd7b9cddb1 100644
--- a/drivers/usb/gadget/f_sdp.c
+++ b/drivers/usb/gadget/f_sdp.c
@@ -32,6 +32,7 @@
 #include <spl.h>
 #include <image.h>
 #include <imximage.h>
+#include <watchdog.h>
 
 #define HID_REPORT_ID_MASK	0x000000ff
 
@@ -602,6 +603,8 @@ int sdp_init(int controller_index)
 			puts("\rCTRL+C - Operation aborted.\n");
 			return 1;
 		}
+
+		WATCHDOG_RESET();
 		usb_gadget_handle_interrupts(controller_index);
 	}
 
@@ -712,6 +715,7 @@ void sdp_handle(int controller_index)
 			return;
 		}
 
+		WATCHDOG_RESET();
 		usb_gadget_handle_interrupts(controller_index);
 
 		sdp_handle_in_ep();

commit b27ae02dfdf0e26d23901e9b898629d6ec470a60
Author: Marek Vasut <marek.vasut@gmail.com>
Date:   Sun Oct 15 15:01:29 2017 +0200

    UPSTREAM: usb: xhci: Add Renesas R-Car xHCI driver
    
    Add firmware V3, firmware loader and XHCI glue for the Renesas R-Car
    Gen3 SoCs XHCI controller. Thus far only the R-Car Gen3 R8A7795 ES2.0+
    and R8A7796 are supported.
    
    Conflicts:
            drivers/usb/host/Kconfig
            drivers/usb/host/Makefile
            drivers/usb/host/xhci-rcar.c
    
    Change-Id: I3c5417289b4e8b1a54b90a39fa7b426381b761fb
    Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
    Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
    Cc: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit e1cc60c0d635408b18a31dcdc2002bba07da21a4)

diff --git a/Licenses/r8a779x_usb3.txt b/Licenses/r8a779x_usb3.txt
new file mode 100644
index 0000000000..e2afcc9e81
--- /dev/null
+++ b/Licenses/r8a779x_usb3.txt
@@ -0,0 +1,26 @@
+Copyright (c) 2014, Renesas Electronics Corporation
+All rights reserved.
+
+Redistribution and use in binary form, without modification, are permitted
+provided that the following conditions are met:
+
+1. Redistribution in binary form must reproduce the above copyright notice,
+   this list of conditions and the following disclaimer in the documentation
+   and/or other materials provided with the distribution.
+2. The name of Renesas Electronics Corporation may not be used to endorse or
+   promote products derived from this software without specific prior written
+   permission.
+3. Reverse engineering, decompilation, or disassembly of this software is
+   not permitted.
+
+THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS ELECTRONICS CORPORATION DISCLAIMS
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, AND
+NONINFRINGEMENT OF THIRD PARTY RIGHTS. IN NO EVENT SHALL RENESAS ELECTRONICS
+CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
+OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGE.
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 5438feb8f5..9fd7529289 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -47,6 +47,14 @@ config USB_XHCI_ROCKCHIP
 	help
 	  Enables support for the on-chip xHCI controller on Rockchip SoCs.
 
+config USB_XHCI_RCAR
+	bool "Renesas RCar USB 3.0 support"
+	default y
+	depends on ARCH_RMOBILE
+	help
+	  Choose this option to add support for USB 3.0 driver on Renesas
+	  RCar Gen3 SoCs.
+
 config USB_XHCI_ZYNQMP
 	bool "Support for Xilinx ZynqMP on-chip xHCI USB controller"
 	depends on ARCH_ZYNQMP
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index d5375a94fa..82108b620c 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -59,6 +59,7 @@ obj-$(CONFIG_USB_XHCI_FSL) += xhci-fsl.o
 obj-$(CONFIG_USB_XHCI_MVEBU) += xhci-mvebu.o
 obj-$(CONFIG_USB_XHCI_OMAP) += xhci-omap.o
 obj-$(CONFIG_USB_XHCI_PCI) += xhci-pci.o
+obj-$(CONFIG_USB_XHCI_RCAR) += xhci-rcar.o
 
 # designware
 obj-$(CONFIG_USB_DWC2) += dwc2.o
diff --git a/drivers/usb/host/xhci-rcar-r8a779x_usb3_v3.h b/drivers/usb/host/xhci-rcar-r8a779x_usb3_v3.h
new file mode 100644
index 0000000000..f0f48a3354
--- /dev/null
+++ b/drivers/usb/host/xhci-rcar-r8a779x_usb3_v3.h
@@ -0,0 +1,643 @@
+/*
+ * Renesas RCar xHCI controller firmware version 3
+ *
+ * Copyright (c) 2014, Renesas Electronics Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in binary form, without modification, are permitted
+ * provided that the following conditions are met:
+ *
+ * 1. Redistribution in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 2. The name of Renesas Electronics Corporation may not be used to endorse or
+ *    promote products derived from this software without specific prior written
+ *    permission.
+ * 3. Reverse engineering, decompilation, or disassembly of this software is
+ *    not permitted.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS ELECTRONICS CORPORATION DISCLAIMS
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, AND
+ * NONINFRINGEMENT OF THIRD PARTY RIGHTS. IN NO EVENT SHALL RENESAS ELECTRONICS
+ * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
+ * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * This file is generated from the firmware blob r8a779x_usb3_v3.dlmem
+ * with associated license file LICENCE.r8a779x_usb3, both taken from
+ * linux-firmware.git [1] as of:
+ *
+ *     commit 7c3dfc0bb21bf717dc19a6b677a866aef8b70c35
+ *     Author: Yoshihiro Shimoda
+ *     Date:   Wed Aug 10 19:56:39 2016 +0900
+ *
+ *         usb: host: xhci-rcar: update firmware for R-Car H3 and M3-W
+ *
+ * To generate the content of the array below, use ie. the following command:
+ * $ hexdump -v -e '/4 "0x%08x, "' r8a779x_usb3_v3.dlmem | \
+ * 	sed "s@\(.\{47\}\) @\1\n@g"
+ *
+ * [1] git://git.kernel.org/pub/scm/linux/kernel/git/dwmw2/linux-firmware.git
+ */
+
+#ifndef __FIRMWARE_R8A779X_USB3_V3__
+#define __FIRMWARE_R8A779X_USB3_V3__
+
+static const u32 firmware_r8a779x_usb3_v3[] = {
+	0xf4c455aa, 0x00d20014, 0x00000000, 0x23dc00e8,
+	0x00000000, 0x1a5c2007, 0x0001ff63, 0x001eff80,
+	0x0001ff23, 0x007f1a44, 0xff631a5c, 0xff800001,
+	0xff2301e2, 0x1a440001, 0x0780007f, 0x06250061,
+	0x00021e74, 0x40002e05, 0x40002e05, 0x8000f625,
+	0xdc90062a, 0x556f0000, 0xdd14062a, 0x17040000,
+	0x5573d612, 0x15ea062a, 0x57650000, 0x16c285d5,
+	0x060200f0, 0x1deaffe0, 0xe4251724, 0x05d9128d,
+	0x10001620, 0xe4251764, 0xd6151724, 0x1db1129f,
+	0x8625ef25, 0x0088063f, 0x32010002, 0x3200007d,
+	0x0392ffbe, 0x05e251e0, 0xffbe3200, 0x51e003e4,
+	0x520005ba, 0xef2515f5, 0x063f8625, 0x000200ae,
+	0x007d3200, 0xd6151724, 0x05b9129d, 0x0d8cffbe,
+	0xd61417c4, 0xd6179e24, 0x000037d3, 0x4ad0ffbe,
+	0x06405201, 0x26e6007f, 0x0f9a0631, 0x063f0000,
+	0x00000e64, 0x0782007f, 0x8f250061, 0xee248019,
+	0x30030000, 0x00f4063f, 0x00710002, 0x80158725,
+	0x00d00626, 0x3a010002, 0x0108063f, 0x00700002,
+	0x0505f01d, 0x7e3d0501, 0x7d030008, 0x80001640,
+	0x150d1511, 0xf6241509, 0x0509fd00, 0x1503121f,
+	0x801d7725, 0x00013723, 0x1764121e, 0x063f5c11,
+	0x0002013e, 0x0642006e, 0x0780007f, 0xe8060061,
+	0x0d0cffbe, 0x0001577d, 0x007f0640, 0x0d0a07be,
+	0x17201624, 0x9c00062a, 0x118a03ff, 0x17210764,
+	0xffec0602, 0xf6240d89, 0x35011720, 0x12820503,
+	0x1505125d, 0x1724007f, 0x11461721, 0xf6241db2,
+	0x55021720, 0x12c2100a, 0x3f6211c4, 0x160a172d,
+	0x15030001, 0x17295724, 0x05bb51e2, 0x17250764,
+	0x17251724, 0xeeee062a, 0x12c2eeee, 0x576211c4,
+	0x007f172d, 0x00610780, 0xe8060086, 0x17e0ffbe,
+	0x5c591724, 0x1281580a, 0xe9e00db1, 0x17240d92,
+	0x129dd605, 0x172405d9, 0x129dd605, 0x500bfdd1,
+	0x007f0640, 0x3bd60631, 0x063f0000, 0x00000e64,
+	0x0780007f, 0x06250061, 0x00021e74, 0x40002e05,
+	0x40002e05, 0x0dd00744, 0x17441201, 0xef840dd1,
+	0xea610dd1, 0x0dc205e1, 0x0dd1ea63, 0x15b50df2,
+	0x0046ff80, 0x1de251e0, 0x14b6ff80, 0xff800df5,
+	0x0dc50116, 0x023aff80, 0xff8005b5, 0xff800360,
+	0x05c514be, 0xffbe3201, 0x3f841702, 0x39fd0dd1,
+	0x0622ddf2, 0xaaaa1100, 0x32013902, 0x16d8ffbe,
+	0x0640d5f5, 0x0780007f, 0xffbe0061, 0x51e00398,
+	0x320105ca, 0x00eeffbe, 0x1c3affbe, 0x0386ffbe,
+	0x05ca51e0, 0xffbe3201, 0xff8000dc, 0xff800438,
+	0x321f04a2, 0xfebcffbf, 0x036affbe, 0x05ca51e0,
+	0xffbe3201, 0x172400c0, 0x1282d60d, 0xffbe15e9,
+	0xf62442ce, 0x1500d600, 0xf1ff5620, 0x1501114a,
+	0xd6051724, 0x05d9128d, 0xd6019e24, 0x000087d3,
+	0xd6b91724, 0x08f01764, 0x032affbe, 0x05ca51e0,
+	0xffbe3201, 0xef250080, 0x063f8625, 0x000202fc,
+	0x007d3201, 0x030effbe, 0x05ca51e0, 0xffbe3201,
+	0xff800064, 0x062604d6, 0x000224ac, 0x1de8ffbe,
+	0x15f251e0, 0x02eeffbe, 0x05ca51e0, 0xffbe3201,
+	0xef250044, 0x063f8625, 0x00020338, 0x007d3200,
+	0x016087e0, 0xffbe3201, 0x52011578, 0x0dd05744,
+	0x007f0640, 0x30e10780, 0xd6051724, 0x128dd200,
+	0x172415a9, 0x1282d60d, 0x172405d1, 0x1285d605,
+	0x9e240da1, 0x17d3d600, 0xffbe0000, 0xff80440a,
+	0x6dd500e2, 0x481affbe, 0xd7e91724, 0x15d11284,
+	0xd60d1724, 0x15911282, 0x1e26ffbe, 0xd6011724,
+	0x05b91298, 0xd602bfc4, 0xd6051724, 0x05d9129b,
+	0x04001640, 0xd6051764, 0xd7e91724, 0x05a91284,
+	0x1724d201, 0x128dd605, 0x17240d91, 0x1282d60d,
+	0xd1e005d9, 0xffbe05ba, 0xef251eda, 0x063f82b1,
+	0x000203de, 0x1724007d, 0x1282d60d, 0xd1e035a9,
+	0x172435ea, 0x1281d6b9, 0x178425f9, 0x11e008f3,
+	0xea0125ba, 0x80001625, 0x00c4de02, 0x301d15d5,
+	0xffbe0086, 0x51e0d8a6, 0x372a0de2, 0xe73b0001,
+	0x063f0001, 0x00020422, 0x51e0007c, 0x87c405ca,
+	0x0da5d6b8, 0x1724ea41, 0x52025c59, 0x05a91281,
+	0xe9ea5201, 0x1201e5d7, 0x08f91744, 0xd60c8fc4,
+	0x05dad1e0, 0x205affbe, 0x03caff80, 0x30ff0640,
+	0x00610780, 0x8625ef25, 0x046a063f, 0x32010002,
+	0xffbe007d, 0xffbe1572, 0x064015de, 0x0780007f,
+	0x17a40061, 0x12610dd1, 0x178415ba, 0x11e0e459,
+	0xffbe0df2, 0xef2542f2, 0x063f806d, 0x0002049a,
+	0x9e24007d, 0x1fd3d60f, 0x07440000, 0x17240dd1,
+	0x1285d605, 0x27c405e9, 0xff80d6b2, 0x45d50092,
+	0x82b9ef25, 0x04c4063f, 0x007d0002, 0x05c251e0,
+	0x181effbe, 0x17243da5, 0x1282e421, 0x32000dd9,
+	0x13deffbe, 0x82c1ef25, 0x04e8063f, 0x007d0002,
+	0x0dd00744, 0x17242da5, 0x1288e421, 0xffbe05b9,
+	0x17242250, 0x1289e425, 0xffbe05b9, 0x1724224c,
+	0x128ae425, 0xffbe05b9, 0xffbe24d6, 0x51e000f8,
+	0x320105ca, 0xfe4effbd, 0xe4211724, 0x0dd91281,
+	0x0dd117a4, 0x05da1261, 0xd60f9e24, 0x00001fd3,
+	0xd60c9fc4, 0x0026ff80, 0x007f0640, 0x00610780,
+	0x8625ef25, 0x0556063f, 0x32000002, 0xffbe007d,
+	0xffbe1562, 0x0640166e, 0x0782007f, 0xef250061,
+	0x063f8019, 0x00020574, 0x007d3003, 0x8625ef25,
+	0x0582063f, 0x32000002, 0xffbe007d, 0xffbe168c,
+	0x372316b4, 0xef250001, 0x063f801d, 0x0002059a,
+	0xffbe007d, 0x06421724, 0x0780007f, 0x172400e1,
+	0x1281e421, 0x17240d81, 0x1284e439, 0xff8005c1,
+	0x45c50090, 0x82b9ef25, 0x05c8063f, 0x007d0002,
+	0x05c251e0, 0x188affbe, 0xef253d95, 0x063f82d5,
+	0x000205e0, 0x007d3200, 0x8311ef25, 0x05ec063f,
+	0x007d0002, 0x08f717a4, 0x05ba11e0, 0x0450ff80,
+	0x02bcff80, 0x08f71784, 0x25821262, 0x08f717a4,
+	0x1dca11e0, 0x456cffbe, 0xffbee00a, 0xef25313e,
+	0x063f82e1, 0x00020622, 0xef25007d, 0x063f82f1,
+	0x0002062e, 0xffbe007d, 0xe1e0327a, 0xffbe05f2,
+	0x51e04542, 0xffbe05ba, 0x06402cf4, 0x078200ff,
+	0xef250061, 0x063f8019, 0x00020658, 0x007d3003,
+	0x8625ef25, 0x0666063f, 0x32010002, 0x1724007d,
+	0x1281ea01, 0x07c405b1, 0xffbeea00, 0xf62416da,
+	0x1558d600, 0x00105640, 0x1559110a, 0x171affbe,
+	0x00013723, 0x801def25, 0x0698063f, 0x007d0002,
+	0x85adef25, 0x06a4063f, 0x007d0002, 0x8019ef25,
+	0x06b2063f, 0x30030002, 0xffbe007d, 0x3723174e,
+	0xef250001, 0x063f801d, 0x000206c6, 0x0642007d,
+	0x0780007f, 0x121f0061, 0x5c00f624, 0x15091507,
+	0x150d150b, 0xfd00f624, 0x15031505, 0xe900f624,
+	0x15071505, 0xd600f624, 0x15061505, 0x0d911282,
+	0x1764121f, 0x0000d605, 0x00000000, 0x00000000,
+	0x8001ef25, 0x0714063f, 0x007d0002, 0x8015ef25,
+	0x01ec0626, 0x3a020002, 0x0728063f, 0x007d0002,
+	0x8021ef25, 0x0734063f, 0x007d0002, 0x007f0640,
+	0x00210780, 0xfbccffbd, 0x07d01620, 0x0fb8f624,
+	0x56801480, 0x5481ffff, 0x14835482, 0x001c1620,
+	0x0818f624, 0x520413b0, 0x120353b1, 0x13b313b2,
+	0x5bb45a01, 0x5c8153b5, 0x00c85620, 0x5e205482,
+	0x5c830190, 0x00645e20, 0x54855c84, 0x04870486,
+	0x00fa5620, 0x5e205488, 0x5c89012c, 0x5e20548a,
+	0x5c8b0014, 0x03c05620, 0x5205548c, 0x539b539a,
+	0x639c6206, 0x6b9d6a09, 0x539f5b9e, 0x63a153a0,
+	0x5ba25a0a, 0x00105e20, 0x5a025ba3, 0x5ba55ba4,
+	0x13a713a6, 0x5ba913a8, 0x13ab5baa, 0x13ad13ac,
+	0x5baf53ae, 0x003f0640, 0x00610780, 0xe000f624,
+	0x96201544, 0x9e24f0ff, 0x1152fb75, 0x03001682,
+	0xafd31545, 0xffbe0000, 0x27c41806, 0xef25d6b2,
+	0x063f834d, 0x00020812, 0xffbe007d, 0x064018a0,
+	0x0782007f, 0xef250061, 0x063f8019, 0x0002082c,
+	0x007d3003, 0x08f317a4, 0x1d8a1261, 0xd6051724,
+	0x15c9129c, 0x08001640, 0xd6051764, 0x00001200,
+	0x00000000, 0x00000000, 0x12671241, 0x1724fd96,
+	0x129cd605, 0x074405b1, 0xffbe08f3, 0x51e02500,
+	0xffbe1dc2, 0x37232554, 0xef250001, 0x063f801d,
+	0x0002087e, 0x1724007d, 0x5640d605, 0x114a0300,
+	0xffbe15c2, 0x17241a1e, 0x1282fd05, 0x17240de1,
+	0x1285d605, 0x0d95fd91, 0x00013723, 0x801def25,
+	0x08b0063f, 0x007d0002, 0x007f0642, 0x00610782,
+	0x8019ef25, 0x08c6063f, 0x30030002, 0xffbe007d,
+	0x51e02650, 0xffbe05da, 0xffbe26d6, 0x37232710,
+	0xef250001, 0x063f801d, 0x000208e6, 0x0642007d,
+	0x0780007f, 0xffbe0021, 0x51e02906, 0xffbe05b2,
+	0x06402acc, 0x0780003f, 0xef250061, 0x063f8631,
+	0x0002090e, 0x51e0007d, 0xffbe05ba, 0x0640325c,
+	0x0780007f, 0xd20070e1, 0x17441201, 0x16250855,
+	0xce028000, 0xde020330, 0x17240334, 0xe802eab5,
+	0xea9aeaca, 0x003f16c2, 0x35c2e9e2, 0x001f16dd,
+	0x000c36e2, 0x170631c4, 0x362694b4, 0x12d894b0,
+	0x1261129c, 0x05d21df1, 0x0da11263, 0x1da515c2,
+	0x0001e739, 0x0974063f, 0x007c0002, 0xe73b15d5,
+	0x063f0001, 0x00020982, 0x06aa007c, 0x0dc2ffff,
+	0x0da5d201, 0x0009e73b, 0x0998063f, 0x007c0002,
+	0xff8005b5, 0xea41003e, 0x003f56dd, 0xeab65744,
+	0x1640c5d5, 0xf6240001, 0x1503ea00, 0xe802155a,
+	0xea9aeaca, 0x003f16c2, 0xbd8ae9e2, 0x05fad261,
+	0x8339ef25, 0x09d4063f, 0x007d0002, 0x70ff0640,
+	0x00610780, 0x5864f006, 0x5ad81303, 0x12d85a9c,
+	0x0dba1299, 0x80011724, 0x30005640, 0x25d2114a,
+	0x80011724, 0x129a12ca, 0x52c25002, 0x572a51c4,
+	0x66408001, 0x514c8000, 0x060b1d82, 0x15d1fff0,
+	0x57eb5201, 0x5f2400c0, 0x514be435, 0x38020de2,
+	0x000c16e2, 0x854def25, 0x47e211c4, 0x32440fc9,
+	0x0a40063f, 0x007d0002, 0x007f0640, 0x00e10780,
+	0x2200063c, 0xf624aaaa, 0xe86000a4, 0xea610384,
+	0x0d8205e1, 0x0d91ea63, 0x0dd50db2, 0x4292ffbe,
+	0xff800dd5, 0x0da50034, 0x0076ff80, 0xffbe05f5,
+	0x05c542de, 0xffbe3202, 0x3f840ed2, 0x39fd00a5,
+	0x391c05d2, 0xffbe3202, 0x17840eae, 0x11e000a9,
+	0x0640ddba, 0x078000ff, 0xefa40061, 0xea6100a5,
+	0x159205e1, 0x05e1ea63, 0x0da50d82, 0x430effbe,
+	0xffbe0da5, 0x05f543bc, 0x4406ffbe, 0x320305c5,
+	0x0e88ffbe, 0x00a53fa4, 0x0d8239fd, 0x33000622,
+	0x3902aaaa, 0xffbe3204, 0x06400e5e, 0x0780007f,
+	0xef8400e1, 0xe7a400a7, 0x101d00a7, 0xffed0602,
+	0x00424de1, 0x00160013, 0x001c0019, 0x0022001f,
+	0x00280025, 0x002e002b, 0x00340031, 0x003a0037,
+	0x0040003d, 0x00490043, 0xffbe0046, 0x3da543ea,
+	0x4488ffbe, 0xffbe35f5, 0x35c5448a, 0x0098ff80,
+	0xff803595, 0x2de500d4, 0x0114ff80, 0xff802db5,
+	0x2d8501a8, 0x01e0ff80, 0xff8025d5, 0x25a502fe,
+	0x05b0ff80, 0xff801df5, 0x1dc505d4, 0x694effbe,
+	0xffbe1d95, 0x15e56a22, 0x0604ff80, 0xff8015b5,
+	0x1585061e, 0x6c9effbe, 0xffbe0dd5, 0x0da56cea,
+	0x6d96ffbe, 0xffbe05f5, 0x05c56e5e, 0xffbe3204,
+	0x3f840dba, 0x39fd00a7, 0x06220d82, 0xaaaa4400,
+	0x32083902, 0x0d90ffbe, 0x00a73fa4, 0x0d9239fc,
+	0x55000622, 0x3902aaaa, 0x00103620, 0x0d78ffbe,
+	0x00ff0640, 0x00a717a4, 0x1dab1269, 0x000a0042,
+	0x001b000c, 0x0010000e, 0x0012001b, 0x001b0014,
+	0x07be0016, 0x07be4470, 0x07be4522, 0x07be458e,
+	0x07be45ae, 0x07be461a, 0x07be463a, 0x32054696,
+	0x0d4807be, 0x17a4007f, 0x126900a7, 0x00421dcb,
+	0x001d000a, 0x0010000c, 0x0016000e, 0x00140012,
+	0x0018001d, 0x46fc07be, 0x47d607be, 0x494407be,
+	0x487207be, 0x4a3607be, 0x4a8a07be, 0x497a07be,
+	0x4b7407be, 0x07be3206, 0x007f0d02, 0x00a717a4,
+	0xffe70602, 0x004245d1, 0x00460019, 0x001d001b,
+	0x0021001f, 0x00250023, 0x00290027, 0x002d002b,
+	0x0031002f, 0x00350033, 0x00370046, 0x003b0039,
+	0x0046003d, 0x0046003f, 0x07be0041, 0x07be4b80,
+	0x07be4c5e, 0x07be4d0c, 0x07be4d72, 0x07be4dd2,
+	0x07be4e8c, 0x07be4f12, 0x07be504c, 0x07be50f6,
+	0x07be512c, 0x07be51c6, 0x07be5212, 0x07be5320,
+	0x07be5462, 0x07be54d0, 0x07be55fa, 0x07be562e,
+	0x07be5698, 0x07be56d0, 0x07be582c, 0x3207599c,
+	0x0c6807be, 0x17a4007f, 0x126900a7, 0x00421d8b,
+	0x0019000a, 0x000e000c, 0x00100019, 0x00120019,
+	0x00140019, 0x5a3e07be, 0x5abc07be, 0x5b5407be,
+	0x5bba07be, 0x5c2207be, 0x5d3c07be, 0x07be3208,
+	0x007f0c2a, 0x00a717a4, 0x0d811261, 0x12631582,
+	0x0dd205f1, 0x05e21264, 0x07be05f5, 0x07805d24,
+	0x07be0010, 0x32095f2c, 0x0c0007be, 0x0786007f,
+	0x378470e1, 0x16240811, 0xe8068284, 0xe9c2eac5,
+	0xe4391724, 0xd200e200, 0x07a4de24, 0x05e91283,
+	0x07b337a4, 0x6cb6ffbe, 0xffbe65e5, 0x171da9f6,
+	0x12d90001, 0x1264129d, 0xf7dd0d9a, 0x05e20006,
+	0x0007e79d, 0xe2d8d201, 0x17bbe29f, 0x3784000d,
+	0xcf250811, 0x063f83cd, 0x00020dbc, 0x129f12de,
+	0x00793802, 0xf6241201, 0x139c00ac, 0xd1e0039d,
+	0xe1e02582, 0x171d0dda, 0xf6240015, 0x12ddeb54,
+	0x12c3129e, 0x121ff1c2, 0x15031501, 0x120115a5,
+	0x00acf624, 0x571d139c, 0x56ca000b, 0x5241001f,
+	0x00c017ea, 0x139d125f, 0x07b4f624, 0x05030501,
+	0x0e5497c4, 0x0e540fc4, 0x000d3f3b, 0x0e5407c4,
+	0x17441203, 0x300700a7, 0x3acb3298, 0x3ac63a9b,
+	0x08e0ffbe, 0x00ac3624, 0x00401620, 0x1501f003,
+	0x17250503, 0x3e24839d, 0x400a0e54, 0x1505480b,
+	0x05ccffbe, 0x70ff0646, 0x00210780, 0x00a717a4,
+	0x0d911261, 0x126415f2, 0x15f22591, 0x1d811266,
+	0x1d950de2, 0x003aff80, 0xfd191724, 0x129512c5,
+	0x16c21242, 0x17440003, 0x15851714, 0x0132ff80,
+	0xffbe0dd5, 0x0da55f18, 0x01a6ff80, 0xffbe05f5,
+	0x05c560f8, 0xffbe320a, 0x06400ab2, 0x0780003f,
+	0x5f2400e1, 0xee2407b1, 0x662407a4, 0x100b8000,
+	0x50021298, 0x51cc52c2, 0x0da211e0, 0xffdf0602,
+	0x172a05f1, 0x56400001, 0x51428000, 0x320b05ba,
+	0x56405dc5, 0x51423000, 0x36c255e2, 0x100b00ff,
+	0xe72512cb, 0x129b841d, 0x063f3802, 0x00020efa,
+	0x5744007c, 0x008a0810, 0x060d680a, 0x05baff01,
+	0x45b53205, 0x100d6ac5, 0x172211c4, 0x16c28299,
+	0x12610007, 0x12633df2, 0x100a35ea, 0x66c21285,
+	0x16ca0003, 0x5a01001f, 0x00c05fe2, 0x17196764,
+	0x100c62c2, 0x172211c4, 0x5f64ea49, 0x114b171d,
+	0x17241dea, 0x12c5fd19, 0x12421295, 0x000376c2,
+	0xfd191724, 0x129512c5, 0x000316c2, 0xfd9a11ee,
+	0x172d69c4, 0x16c28299, 0x12610007, 0x126315b2,
+	0x61c40daa, 0xea49172c, 0x05d25942, 0x17441206,
+	0x15c500a7, 0x00133620, 0x000f3fbd, 0x6b0effbe,
+	0xef250dd5, 0x063f8625, 0x00020fa8, 0x007d3201,
+	0xf6241201, 0x138400a4, 0x06401383, 0x172400ff,
+	0x5e24e421, 0x128107a4, 0x172405d9, 0x1283e439,
+	0x37ab05d9, 0x07be000f, 0x17846a64, 0x12c50811,
+	0x172211c4, 0x16c28299, 0x12630007, 0xf62405f2,
+	0x038300a4, 0x13841201, 0x172425a5, 0x57241719,
+	0x12c2171d, 0x172211c4, 0x5142ea49, 0xfd191724,
+	0x129512c5, 0x05f251e0, 0x16c21242, 0x17440003,
+	0x0dd51714, 0x17155784, 0x000316c2, 0x05fa11ea,
+	0x000f3fab, 0x00133620, 0x6a7207be, 0x0788007f,
+	0x67240021, 0x62d2eab1, 0x160c629a, 0x1261ffff,
+	0x126315b3, 0x12691592, 0x126b0df2, 0x126d0dd2,
+	0x06020db2, 0x0d82ffef, 0xffed1602, 0x05c31261,
+	0x12611259, 0x57844d9b, 0x5e240811, 0x100a8284,
+	0x11cb12c5, 0x05b26261, 0x0dba6262, 0x51c452c2,
+	0x8085572a, 0x05d9528e, 0x07635200, 0x05f50001,
+	0xeb6d5724, 0x00015763, 0xeb715724, 0x5503f003,
+	0x1b005640, 0x05075505, 0x56ca530d, 0x568a0003,
+	0x538d0080, 0x57225b0e, 0x5ecb0001, 0x6eca00e0,
+	0x590d001f, 0x52d45b8e, 0x538f5299, 0xffff560c,
+	0x05e35261, 0x05c25269, 0xffef060a, 0x3f8205ea,
+	0x3ec7000d, 0x05d5000f, 0xeab13f24, 0x3a9c3acc,
+	0xffbe3003, 0x12050436, 0x00a71744, 0x003f0648,
+	0x00a717a4, 0x0d811261, 0x12631582, 0x0dd205f1,
+	0x05e21264, 0x07be05f5, 0x07be5eac, 0x07be5fc4,
+	0x320b6022, 0x082407be, 0x17a4007f, 0x126900a7,
+	0x00421dab, 0x000c000a, 0x000e001b, 0x001b0010,
+	0x00140012, 0x0016001b, 0x603607be, 0x613a07be,
+	0x61a607be, 0x61c607be, 0x623207be, 0x625207be,
+	0x62d007be, 0x07be320c, 0x007f07e2, 0x00a717a4,
+	0x05d11261, 0x12620db2, 0x05d505c2, 0x643807be,
+	0x655407be, 0x07be320d, 0x007f07c2, 0x00a717a4,
+	0x05d11261, 0x126205e2, 0x05f505e2, 0x654007be,
+	0x65fe07be, 0x666607be, 0x07be320e, 0x0780079e,
+	0x008610e1, 0xeac5e806, 0x077de9c4, 0x077d8289,
+	0x077d828d, 0x077d8291, 0x077d8295, 0x077d8299,
+	0x077d829d, 0xe00682a1, 0xd8070087, 0x6b06ffbe,
+	0x8285171d, 0x301c381b, 0x129d12d9, 0x05ca1264,
+	0x6c54ffbe, 0xffbe05b5, 0x06406c86, 0x078010ff,
+	0xd80770e1, 0xd008009b, 0xc809009a, 0x009ce006,
+	0xeac5e81c, 0x82841624, 0x301de9c2, 0x46203a00,
+	0xffbe0020, 0x301c062a, 0x401a381b, 0xffbe4819,
+	0x301c6cba, 0x0001171d, 0x401a381b, 0x12d94819,
+	0x1264129d, 0xffbe158a, 0xf7dd6e9e, 0x48190006,
+	0x381b401a, 0x05ca301c, 0x6f1affbe, 0xffbe05e5,
+	0x05b56f4e, 0x6f54ffbe, 0x70ff0640, 0x10e10780,
+	0xe8060086, 0xe9c4eac5, 0x0087e006, 0xffbed807,
+	0x171d7016, 0xee3d8285, 0x301c8284, 0x12d9381b,
+	0x1264129d, 0xffbe0dea, 0xf7dd7012, 0x381b0006,
+	0x05ca301c, 0x7064ffbe, 0xffbe05e5, 0x05b570c6,
+	0x70f8ffbe, 0x10ff0640, 0x00610780, 0xe8060086,
+	0x1624eac4, 0xe9c205a4, 0x00051728, 0x008b5807,
+	0x30025002, 0x529852d0, 0x00013e0a, 0x32900087,
+	0x2da25a61, 0x1dc25a63, 0x35aa5a64, 0x129d12da,
+	0x05e21261, 0x0d821263, 0x0da21265, 0x30080dd5,
+	0x8512ffbe, 0x300825f5, 0x85f4ffbe, 0x300825b5,
+	0x86d6ffbe, 0x30081df5, 0x879cffbe, 0x12da1db5,
+	0x1261129d, 0x126505b2, 0xffbe05ca, 0x15a58858,
+	0x8862ffbe, 0x12da0df5, 0x1261129d, 0x126505b2,
+	0xffbe05ca, 0x05e58860, 0x8886ffbe, 0xffbe05b5,
+	0x577d88ac, 0x06400001, 0x0780007f, 0x00860061,
+	0xeac4e806, 0x05a41624, 0xefc7e9c2, 0x30070004,
+	0xffbe05ca, 0x05b588c4, 0x8976ffbe, 0x0005577d,
+	0x007f0640, 0xffe1078a, 0x00bc3620, 0x8cbcffbe,
+	0xffbea00a, 0x57638cbe, 0xffbe0002, 0x57638cb6,
+	0xffbe0004, 0x57638cb4, 0x36200006, 0xffbe00bc,
+	0x57638cae, 0x36200008, 0xffbe00bc, 0x57638caa,
+	0xffbe000a, 0x57638cdc, 0xffbe000c, 0x57638cd4,
+	0xffbe000e, 0x57638cd2, 0x36200010, 0xffbe00bc,
+	0x57638ccc, 0xaa000012, 0xb200ba00, 0xe815ca00,
+	0x1624eac3, 0xe9c204a4, 0xd860f01d, 0xe063c067,
+	0x0220dff4, 0xffbe3018, 0xf01d8c42, 0xe7ea1061,
+	0x57e30220, 0x5fe30003, 0x17ea0005, 0x50650220,
+	0x57ebe1db, 0x11dc0220, 0x5fe351c2, 0x10640007,
+	0x022017eb, 0x11cad862, 0x000957e3, 0xdfeae066,
+	0x30180220, 0xffbed9c2, 0xe7ea8c16, 0xf01d0220,
+	0xd060e1db, 0x000b17e3, 0xd8633018, 0x0220d7e2,
+	0x8c04ffbe, 0x1061f01d, 0x0220dfea, 0x000d57e3,
+	0x000f5fe3, 0x022017ea, 0xd9da5065, 0x022057eb,
+	0x51c211db, 0x00115fe3, 0x17eb1064, 0xd0620220,
+	0x57e311ca, 0xd8660013, 0x0220d7ea, 0xd1c23018,
+	0x8c0affbe, 0x0220dfea, 0xb9fcd9da, 0xb81c05a9,
+	0x05a9b1fb, 0xee1db01b, 0xca410040, 0xca640099,
+	0x10159dc1, 0x500212c2, 0xbf6a51c4, 0x11c403bd,
+	0x03ddb762, 0x0095aa41, 0x85f1aa68, 0xffff064a,
+	0x00210780, 0x00041706, 0x12da0087, 0x16c2129d,
+	0x3a610003, 0x2dc255b1, 0x3dd13a63, 0x3a6415e2,
+	0x12614dda, 0x0de205e1, 0x05e11263, 0x45e50d82,
+	0xa402ffbe, 0xffbe45c5, 0x4595a464, 0xa546ffbe,
+	0xffbe3de5, 0x3db5a602, 0x05e11261, 0x12630de2,
+	0x0d8205e1, 0xffbe35b5, 0x3595a3b8, 0xa41affbe,
+	0xffbe2de5, 0x2db5a4d2, 0xa58effbe, 0x12612d85,
+	0x0de205e1, 0x05e11263, 0x25850d82, 0xa35cffbe,
+	0xffbe1de5, 0x1db5a3d0, 0xa47cffbe, 0xffbe1d85,
+	0x15d5a538, 0x05e11261, 0x12630de2, 0x0d8205e1,
+	0xffbe0dd5, 0x0db5a31c, 0xa3a6ffbe, 0xffbe0d85,
+	0x05d5a428, 0xa50effbe, 0x520105a5, 0x003f0640,
+	0x00210780, 0x0fc11784, 0x05f211e0, 0x0fb8f624,
+	0x03883069, 0xabf4ffbe, 0xfd111724, 0x05b11284,
+	0xfd081fc4, 0x003f0640, 0xf0e10780, 0x8625ef25,
+	0x3201d200, 0x15e4063f, 0x007d0002, 0x5c591724,
+	0x1281c00a, 0x0000e7e9, 0x80001625, 0x00c0ce02,
+	0x301c1db5, 0xffbe0086, 0xe80ac6b2, 0x15b2e9e0,
+	0xff80301d, 0x373d00a0, 0xdf390001, 0x063f0001,
+	0x0002161e, 0x5261007b, 0xcfdd05c2, 0x05b20003,
+	0x0d95d201, 0x1724e241, 0x12815c59, 0x000017e9,
+	0xe587e1e2, 0x8625ef25, 0x164a063f, 0x30180002,
+	0x501a007d, 0xf0ff0640, 0x10e10780, 0x5c591724,
+	0x1281ea02, 0xea0105a9, 0x80001625, 0x00c0de02,
+	0x301d15e5, 0xffbe0086, 0xe00ac642, 0x0de2e1e0,
+	0xff80301c, 0x373c0030, 0xe73b0001, 0x063f0001,
+	0x0002168e, 0x5261007c, 0xea410db2, 0x5c591724,
+	0x12815202, 0x520105a9, 0xe5c7e9ea, 0x06405200,
+	0x1a5c10ff, 0x00011726, 0x0001062a, 0x17630012,
+	0x12cb0001, 0x114a128b, 0x00125640, 0x0dea11ea,
+	0x17461202, 0x00000002, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x1a440000, 0xf624007f,
+	0x03800d24, 0x00dc1620, 0x12021381, 0x03831382,
+	0x0d290764, 0x12011388, 0x007f1389, 0x00e10780,
+	0x09e1ef84, 0x09e1e7a4, 0x1267101d, 0x0042259b,
+	0x000b0008, 0x0011000e, 0x00170014, 0x001d001a,
+	0x006eff80, 0xff8015d5, 0x15a501c2, 0xd03cffbe,
+	0xffbe0df5, 0x0dc5d088, 0xd0f8ffbe, 0xff800d95,
+	0x05e501f8, 0xd1f6ffbe, 0xffbe05b5, 0x3f84d2f4,
+	0x39fd09e1, 0x06220d92, 0xaaaa6600, 0x36203902,
+	0xffbe0020, 0x3fa401d2, 0x39fc09e1, 0x06220d92,
+	0xaaaa7700, 0x36203902, 0xffbe0040, 0x178401ba,
+	0x11e009e1, 0xff8005b2, 0x0640066c, 0x078000ff,
+	0x17a40021, 0x126109e1, 0x05f205d1, 0x0d821263,
+	0xff800d95, 0x05e5002c, 0x0056ff80, 0xffbe05b5,
+	0xffbecdd4, 0x5784d2a8, 0x17a409e1, 0x51e209e3,
+	0xf62405d2, 0x13a409bc, 0x064003a5, 0x0780003f,
+	0xffbe0061, 0x1724cc88, 0x12815c59, 0xef250df1,
+	0x063f8625, 0x000217f4, 0x007d3201, 0x8625ef25,
+	0x1802063f, 0x300a0002, 0x0640007d, 0x0788007f,
+	0x17240061, 0x12815c59, 0x17246de1, 0x5640c0a1,
+	0x114a8000, 0x17240d9a, 0x129cd621, 0x962405d1,
+	0x1fd2d623, 0x17240000, 0x5640c0a1, 0x114a8000,
+	0x12035da2, 0xc000f624, 0x15501531, 0x55b2114a,
+	0x8625ef25, 0x1856063f, 0x32010002, 0x1724007d,
+	0x128efb75, 0x178415c9, 0x06025c61, 0xfdc2ffdf,
+	0x5c611784, 0xffde0602, 0x172405ea, 0x06c2fb9d,
+	0xf5fa000c, 0xfb759624, 0x0000afd2, 0xc0648fc4,
+	0xd6239624, 0x00009fd2, 0x0dd11784, 0x05fa1262,
+	0x3a013200, 0x4a024200, 0x3224ffbe, 0x17441202,
+	0x172409e1, 0x1282c061, 0x074405c9, 0x1db509e1,
+	0xc000f624, 0x35583d5a, 0xffbd4210, 0x1624fdf4,
+	0xf00308fc, 0x16201501, 0x150300c0, 0x20001620,
+	0x17251505, 0x362481ad, 0x400a09bc, 0x1507480b,
+	0xfad6ffbd, 0x007f0648, 0x00210780, 0x09e117a4,
+	0x05e211e0, 0x05f21264, 0x0d821265, 0xffbe0d95,
+	0x05e5ccac, 0xccf2ffbe, 0xffbe05b5, 0xffbecd76,
+	0x5784d14c, 0x17a409e1, 0x51e209e3, 0x12640db2,
+	0x9e2405da, 0x07d3c049, 0xf6240000, 0x13a409bc,
+	0x064003a5, 0x0780003f, 0xffbe0061, 0x1784cf60,
+	0x126609e1, 0xef250dda, 0x063f824d, 0x0002195a,
+	0xef25007d, 0x063f8251, 0x00021966, 0x0640007d,
+	0x0780007f, 0xffbe0021, 0x1784d2a0, 0x12610a15,
+	0x05d20de1, 0x05e11263, 0x0d950d82, 0xd30cffbe,
+	0xffbe05e5, 0x05b5d3da, 0xd4b4ffbe, 0x003f0640,
+	0x00210780, 0x0a0d1724, 0x00ff062b, 0x5200ffff,
+	0x1262114b, 0x96400da2, 0x11f20030, 0x96400d92,
+	0x11f20031, 0x0d950d82, 0xd518ffbe, 0xffbe05e5,
+	0x05b5d5f8, 0xd60effbe, 0x003f0640, 0x00210780,
+	0x0a0d1724, 0x5ec25200, 0x060b00ff, 0x15eaff80,
+	0x12611298, 0x05f215b1, 0x0d811263, 0x126f0da2,
+	0x0dc50db2, 0xd63cffbe, 0xffbe0d95, 0x05e5d64c,
+	0xd65cffbe, 0xffbe05b5, 0x0640d662, 0x17a4003f,
+	0x12610a0f, 0x05f21581, 0x05f11263, 0x126f0d82,
+	0x0d950d82, 0xd65a07be, 0xd68007be, 0xd6a607be,
+	0xd6c007be, 0x0780007f, 0x17840021, 0x52000a0d,
+	0xff800602, 0x05e20df9, 0xff7e0602, 0x0d8205e9,
+	0xffbe0d95, 0x05e5d6f6, 0xd706ffbe, 0xffbe05b5,
+	0x0640d720, 0x1784003f, 0x06020a0d, 0x05baff80,
+	0xd74607be, 0xff7f0602, 0x07be05ba, 0x07bed768,
+	0x0780d76e, 0x17240021, 0x062b0a0d, 0xffff00ff,
+	0x114b5200, 0x0da21262, 0x00309640, 0x0d9211f2,
+	0x00319640, 0x0d8211f2, 0xffbe0d95, 0x05e5d822,
+	0xd8d4ffbe, 0xffbe05b5, 0x0640d8ec, 0x1784003f,
+	0x520109e1, 0x05ba1266, 0xd91a07be, 0x1784007f,
+	0x520109e1, 0x05ba1266, 0xd98007be, 0x0780007f,
+	0xee240061, 0x301dc500, 0xd9d6ffbe, 0x0009361d,
+	0xd9e8ffbe, 0x0012361d, 0xffbe3a00, 0x361dda00,
+	0x3a000019, 0xda2cffbe, 0x001f361d, 0xffbe3a01,
+	0x361dd9ec, 0x3a010026, 0xda18ffbe, 0x007f0640,
+	0x00610780, 0xc500ee24, 0xffbe301d, 0x361dda12,
+	0xffbe0005, 0x0640da1a, 0x0780007f, 0x170400e1,
+	0x16c2097c, 0x12610007, 0x126305b2, 0xffbe05ba,
+	0x1724db90, 0x1285c0a1, 0x063c2dd1, 0xaaaa8800,
+	0x0b71efa4, 0x0b700744, 0x0d91ea61, 0xea630db2,
+	0xea650dc2, 0xea660dd2, 0x0df50de2, 0xdce8ffbe,
+	0xffbe0dc5, 0x0d95dd3a, 0xdddcffbe, 0xffbe05e5,
+	0x05b5de32, 0x00a6ff80, 0x0b713fa4, 0x05e239fd,
+	0x3620391c, 0xffbd0080, 0x1784fd8e, 0x11e00b71,
+	0x0640dd8a, 0x078000ff, 0x170400e1, 0x16c2093c,
+	0x12610007, 0x126305b2, 0xffbe05ba, 0xffbedbb8,
+	0x51e0eba0, 0x17243592, 0x1285c0a1, 0x063c2dd1,
+	0xaaaacc00, 0x0c57efa4, 0x0c560744, 0x0d91ea61,
+	0xea630db2, 0xea650dc2, 0xea660dd2, 0x0df50de2,
+	0xe2dcffbe, 0xffbe0dc5, 0x0d95e32e, 0xe3e8ffbe,
+	0xffbe05e5, 0x05b5e47c, 0x00feff80, 0x0c573fa4,
+	0x05e239fd, 0x3620391c, 0xffbd0400, 0x1784fd0a,
+	0x11e00c57, 0x0640dd8a, 0x078000ff, 0xef840061,
+	0x101d0b73, 0x359b126b, 0x000c0042, 0x0012000f,
+	0x00180015, 0x001e001b, 0x00240021, 0x002a0027,
+	0xffbe002d, 0x2595dd88, 0x005cff80, 0xffbe1de5,
+	0x1db5de12, 0xde3effbe, 0xffbe1d85, 0x15d5de94,
+	0xde9cffbe, 0xffbe15a5, 0x0df5dea4, 0xdf38ffbe,
+	0xffbe0dc5, 0x0d95dfaa, 0xdfe0ffbe, 0xffbe05e5,
+	0x05b5dff6, 0xe054ffbe, 0x0b733f84, 0x0d9239fd,
+	0x99000622, 0x3902aaaa, 0x01003620, 0xfc78ffbd,
+	0x007f0640, 0x00610780, 0x0b73efa4, 0x0d81ea61,
+	0xea630da2, 0x0dd20db1, 0x0de2ea65, 0xffbe0df5,
+	0x0dc5e036, 0xe05cffbe, 0xffbe0d95, 0x05e5e098,
+	0xe0e8ffbe, 0xffbe05b5, 0x3fa4e198, 0x39fd0b73,
+	0x06220d92, 0xaaaabb00, 0x36203902, 0xffbd0200,
+	0x0640fc26, 0x0780007f, 0xef840061, 0x101d0c59,
+	0x359b126b, 0x000c0042, 0x0012000f, 0x00180015,
+	0x001e001b, 0x00240021, 0x002a0027, 0xffbe002d,
+	0x2595e3c8, 0x005cff80, 0xffbe1de5, 0x1db5e41c,
+	0xe47affbe, 0xffbe1d85, 0x15d5e4e0, 0xe508ffbe,
+	0xffbe15a5, 0x0df5e530, 0xe544ffbe, 0xffbe0dc5,
+	0x0d95e61e, 0xe680ffbe, 0xffbe05e5, 0x05b5e696,
+	0xe728ffbe, 0x0c593f84, 0x0d9239fd, 0xdd000622,
+	0x3902aaaa, 0x08003620, 0xfb9cffbd, 0x007f0640,
+	0x00610780, 0x0c59efa4, 0x0d81ea61, 0xea630dd2,
+	0x05f20de1, 0x0de2ea65, 0xffbe0df5, 0x0dc5e70a,
+	0xe734ffbe, 0xffbe0d95, 0x05e5e840, 0xe890ffbe,
+	0xffbe05b5, 0x3fa4e8c4, 0x39fd0c59, 0x06220d92,
+	0xaaaaee00, 0x36203902, 0xffbd1000, 0x0640fb4a,
+	0x0780007f, 0x17240061, 0x1286c061, 0x16200d99,
+	0x17640020, 0x3202c061, 0xffbe3a00, 0xefa4ef1c,
+	0x07440cd5, 0xea610cd9, 0x0db20d91, 0x15c1ea63,
+	0xea650db2, 0x0de20dc1, 0xffbe0df5, 0x0dc5eb38,
+	0xeb5effbe, 0xffbe0d95, 0x05e5ebe6, 0xec4affbe,
+	0xffbe05b5, 0x3fa4ecc8, 0x39fd0cd5, 0x06220d92,
+	0xaaaaff00, 0x36203902, 0xffbd2000, 0x17a4fada,
+	0x11e00cd9, 0x0640d5da, 0x0000007f, 0x000200de,
+	0x0000102c, 0x00001064, 0x0000109e, 0x0000111c,
+	0x0000115a, 0x00020142, 0x00020154, 0x000011a6,
+	0x000011ee, 0x000012a6, 0x00001250, 0x000012f4,
+	0x00001376, 0x0000ccc8, 0x0000ccfc, 0x0000cd72,
+	0x0000cda8, 0x0000ce0a, 0x0000cecc, 0x000215d0,
+	0x0000cfc4, 0x0000d018, 0x0000d062, 0x00021650,
+	0x0000d12e, 0x0000d1a8, 0x0000d204, 0x0000d274,
+	0x0000d2d0, 0x0000d334, 0x0000d3fe, 0x0000d462,
+	0x0000d4e8, 0x0000d54a, 0x0000d5d0, 0x0000d632,
+	0x0000d67a, 0x0000d6e2, 0x0000d73a, 0x0000d7b4,
+	0x0000d84c, 0x0000d8c4, 0x0000d916, 0x0000d968,
+	0x0000d9e4, 0x0000da36, 0x0000dab2, 0x0000db04,
+	0x0000db5a, 0x0000db84, 0x0000dba4, 0x0000dbd8,
+	0x0000dc22, 0x0000dc50, 0x0000dc90, 0x0000dcc6,
+	0x0000dd14, 0x0000dd62, 0x0000dd86, 0x0000dda2,
+	0x0000ddba, 0x0000ddce, 0x0000dde2, 0x0000ddf8,
+	0x0000de12, 0x0000de28, 0x0000de3e, 0x0000de84,
+	0x0000defe, 0x0000dfb2, 0x0000dfe6, 0x0000e01a,
+	0x0000e050, 0x0000e086, 0x0000e0bc, 0x0000e0f2,
+	0x0000e150, 0x0000e19c, 0x0000e1d0, 0x0000e212,
+	0x0000e304, 0x0000e27a, 0x0000e318, 0x0000e3a4,
+	0x0000e42a, 0x0000c608, 0x0000c6d8, 0x0000c74e,
+	0x0000c76a, 0x0000c786, 0x0000c7d6, 0x0000c866,
+	0x0000c930, 0x0000c960, 0x0000c98e, 0x0000c9c8,
+	0x0000c9de, 0x0000c9fc, 0x0000ca28, 0x0000ca6c,
+	0x0000ca90, 0x0000caa2, 0x0000cae4, 0x0000cb88,
+	0x0000cc30, 0x0000cc52, 0x0000e578, 0x0000ea76,
+	0x0000eae6, 0x0000eb6a, 0x0002196a, 0x00021998,
+	0x0000eff6, 0x0000f018, 0x000219d4, 0x00021a16,
+	0x0000f11e, 0x0000f146, 0x00021a3e, 0x00021a6e,
+	0x0000f23e, 0x0000f268, 0x0000f29e, 0x00021a8a,
+	0x0000f3c8, 0x0000f3e8, 0x00021ac6, 0x00021ad6,
+	0x0000f48a, 0x00021ae6, 0x00021b28, 0x0000f57e,
+	0x0000f60c, 0x0000f660, 0x0000f68a, 0x0000f6a2,
+	0x0000f6b2, 0x0000f6dc, 0x00021b42, 0x00021bbe,
+	0x0000f940, 0x0000f9b6, 0x0000fe5e, 0x0000ffbc,
+	0x00010084, 0x000105e0, 0x000106ee, 0x00010722,
+	0x00010762, 0x0001078a, 0x000107f8, 0x0001085c,
+	0x0001089e, 0x000109e8, 0x00010be0, 0x00010c84,
+	0x00010cf4, 0x00010d82, 0x00010da0, 0x00010e0e,
+	0x00010e60, 0x00010eb4, 0x00010f18, 0x00010f66,
+	0x00010f6e, 0x00010f76, 0x00010fb6, 0x00010fd4,
+	0x00001ed6, 0x00002164, 0x000022bc, 0x000023ec,
+	0x00002328, 0x00002530, 0x00000000, 0x000025d4,
+	0x0000274c, 0x000208ea, 0x000034b4, 0x000035ca,
+	0x000036ae, 0x0000372e, 0x0000382e, 0x0000385e,
+	0x00003910, 0x00003960, 0x0000398e, 0x000039fc,
+	0x00003a68, 0x00003a98, 0x00003ace, 0x00003b0e,
+	0x00003b2e, 0x00003b60, 0x00003b6a, 0x000208fe,
+	0x00003bb4, 0x00003cba, 0x00003d48, 0x00003dd4,
+	0x00003e80, 0x00003f26, 0x0002091a, 0x00004030,
+	0x0000408a, 0x00004116, 0x00004144, 0x000041e4,
+	0x00004328, 0x00004416, 0x0000450a, 0x00004572,
+	0x000045a8, 0x000045fc, 0x00004650, 0x0000468c,
+	0x000046de, 0x00004790, 0x0000488c, 0x00004a8c,
+	0x000048ac, 0x00004ab0, 0x00000000, 0x00000000,
+	0x00000000, 0x00004c18, 0x00004ae0, 0x000022f2,
+	0x00004e64, 0x00006e08, 0x00006c0e, 0x00007a08,
+	0x00007a48, 0x00007aba, 0x00007ada, 0x00007af8,
+	0x00007b82, 0x00007bd2, 0x00007c40, 0x00007cae,
+	0x000211b6, 0x00021206, 0x00021274, 0x00008484,
+	0x0000851c, 0x0000857a, 0x000085ca, 0x0000865e,
+	0x00008758, 0x000087ec, 0x000088a2, 0x00008948,
+	0x00008a54, 0x00008ac8, 0x00008b58, 0x00008bdc,
+	0x00008bf2, 0x00008c4c, 0x00008cb4, 0x00008d5e,
+	0x00008de6, 0x00008e6c, 0x00008f34, 0x00008f5e,
+	0x00008ff4, 0x00009046, 0x000090da, 0x0000911c,
+	0x00009146, 0x0000918e, 0x000091ae, 0x000091fa,
+	0x000092e4, 0x000093a0, 0x000093e2, 0x00009424,
+	0x00009458, 0x00009488, 0x000094ca, 0x0000950c,
+	0x00009540, 0x00009586, 0x000096ac, 0x000097f6,
+	0x000212c0, 0x00009bb2, 0x00009bde, 0x00009c12,
+	0x00021362, 0x00009daa, 0x00009e20, 0x00009e7a,
+	0x00009eb4, 0x00009f1a, 0x00009f7e, 0x00009fd6,
+	0x0000a00a, 0x0002138c, 0x0000a0cc, 0x0000a110,
+	0x0000a156, 0x0000a192, 0x0000a1e2, 0x0000a28e,
+	0x0000a3ec, 0x0000a4ac, 0x0000a4d6, 0x0000a52a,
+	0x0000a62c, 0x0000a662, 0x0000a77c, 0x0000a7be,
+	0x0000a7e4, 0x0000a820, 0x0000a87a, 0x0000a914,
+	0x0000a972, 0x0000aa32, 0x0000aaa2, 0x0000abf8,
+	0x0000ad28, 0x0000ad48, 0x0000adb0, 0x0000ae52,
+	0x0000ae8c, 0x0000af88, 0x0000b002, 0x0000b0ae,
+	0x0000b1aa, 0x0000b2f0, 0x0000b3b0, 0x0000b442,
+	0x0000b470, 0x0000b51a, 0x0000b550, 0x0000b578,
+	0x0000b59a, 0x0000b5cc, 0x0000b5f6, 0x0000b648,
+	0x0000b78e, 0x0000b7e6, 0x0000b894, 0x000214e8,
+	0x0000bb76, 0x0000bce2, 0x0000bd04, 0x0000bd94,
+	0x0000be98, 0x0000bfb0, 0x0000bfb2, 0x0000bff2,
+	0x0000c060, 0x0000c0d8, 0x0000c158, 0x0000c1c6,
+	0x0000c30e, 0x000215a8, 0x0000c388, 0x0000c4d0,
+	0x0000c50e, 0x0000c548, 0x0000c588, 0x0000c5c8,
+	0x000013e4, 0x00001436, 0x0000147e, 0x000014a6,
+	0x000014de, 0x000014f2, 0x00001546, 0x000015c4,
+	0x000015ea, 0x0000164c, 0x00001660, 0x0000168e,
+	0x000016ca, 0x000016f0, 0x0000171e, 0x0000175e,
+	0x00001798, 0x000017be, 0x000017e4, 0x0000183a,
+	0x0000186a, 0x000018cc, 0x0000193a, 0x0002017e,
+	0x00001966, 0x0000198e, 0x0000a1ca, 0x0000c2b4,
+	0x000201bc, 0x0000cc74, 0x00011014, 0x00011076,
+	0x000032dc, 0x000079cf
+};
+
+#endif /* __FIRMWARE_R8A779X_USB3_V3__ */
diff --git a/drivers/usb/host/xhci-rcar.c b/drivers/usb/host/xhci-rcar.c
index 71202d7b03..b8beb7b2c2 100644
--- a/drivers/usb/host/xhci-rcar.c
+++ b/drivers/usb/host/xhci-rcar.c
@@ -55,18 +55,30 @@ static int xhci_rcar_download_fw(struct rcar_xhci *ctx, const u32 *fw_data,
 		setbits_le32(regs + RCAR_USB3_DL_CTRL,
 			     RCAR_USB3_DL_CTRL_FW_SET_DATA0);
 
+<<<<<<< HEAD
 		ret = wait_for_bit_le32(regs + RCAR_USB3_DL_CTRL,
 					RCAR_USB3_DL_CTRL_FW_SET_DATA0, false,
 					10, false);
+=======
+		ret = wait_for_bit("xhci-rcar", regs + RCAR_USB3_DL_CTRL,
+				   RCAR_USB3_DL_CTRL_FW_SET_DATA0, false,
+				   10, false);
+>>>>>>> e1cc60c... usb: xhci: Add Renesas R-Car xHCI driver
 		if (ret)
 			break;
 	}
 
 	clrbits_le32(regs + RCAR_USB3_DL_CTRL, RCAR_USB3_DL_CTRL_ENABLE);
 
+<<<<<<< HEAD
 	ret = wait_for_bit_le32(regs + RCAR_USB3_DL_CTRL,
 				RCAR_USB3_DL_CTRL_FW_SUCCESS, true,
 				10, false);
+=======
+	ret = wait_for_bit("xhci-rcar", regs + RCAR_USB3_DL_CTRL,
+			   RCAR_USB3_DL_CTRL_FW_SUCCESS, true,
+			   10, false);
+>>>>>>> e1cc60c... usb: xhci: Add Renesas R-Car xHCI driver
 
 	return ret;
 }

commit 0e266cad6e79fd084a3115bcc4c5cd9708f9480f
Author: Jon Nettleton <jon@solid-run.com>
Date:   Mon Nov 6 10:33:19 2017 +0200

    UPSTREAM: mvebu: usb: xhci: a38x support
    
    This makes the initial changes need to support the
    a38x series of SOCs.  It adds the device-tree identifier
    as well as changing the board_support function to take
    the IO address designated by device-tree.
    
    Change-Id: I9558197847260da87cd1b74101c7fa0e9c2f37ef
    Signed-off-by: Jon Nettleton <jon@solid-run.com>
    [baruch: use fdt_addr_t; update 37xx and 8K implementations]
    Signed-off-by: Baruch Siach <baruch@tkos.co.il>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit d3d036af8c0ee848c4113dc609bbd6ab26ebc6cb)

diff --git a/board/Marvell/mvebu_armada-37xx/board.c b/board/Marvell/mvebu_armada-37xx/board.c
index 8dc1f46d97..ac3e3a392f 100644
--- a/board/Marvell/mvebu_armada-37xx/board.c
+++ b/board/Marvell/mvebu_armada-37xx/board.c
@@ -123,7 +123,7 @@ int board_ahci_enable(void)
 }
 
 /* Board specific xHCI enable code */
-int board_xhci_enable(void)
+int board_xhci_enable(fdt_addr_t base)
 {
 	struct udevice *dev;
 	int ret;
diff --git a/board/Marvell/mvebu_armada-8k/board.c b/board/Marvell/mvebu_armada-8k/board.c
index 7d1b5d9f62..f4eabfb14f 100644
--- a/board/Marvell/mvebu_armada-8k/board.c
+++ b/board/Marvell/mvebu_armada-8k/board.c
@@ -95,7 +95,7 @@ int board_xhci_config(void)
 	return 0;
 }
 
-int board_xhci_enable(void)
+int board_xhci_enable(fdt_addr_t base)
 {
 	struct udevice *dev;
 	int ret;
diff --git a/drivers/usb/host/xhci-mvebu.c b/drivers/usb/host/xhci-mvebu.c
index b9201a5a6a..dbdfce38da 100644
--- a/drivers/usb/host/xhci-mvebu.c
+++ b/drivers/usb/host/xhci-mvebu.c
@@ -35,7 +35,7 @@ struct mvebu_xhci {
  * Dummy implementation that can be overwritten by a board
  * specific function
  */
-__weak int board_xhci_enable(void)
+__weak int board_xhci_enable(fdt_addr_t base)
 {
 	return 0;
 }
@@ -62,7 +62,7 @@ static int xhci_usb_probe(struct udevice *dev)
 	}
 
 	/* Enable USB xHCI (VBUS, reset etc) in board specific code */
-	board_xhci_enable();
+	board_xhci_enable(devfdt_get_addr_index(dev, 1));
 
 	return xhci_register(dev, ctx->hcd, hcor);
 }
@@ -85,6 +85,7 @@ static int xhci_usb_ofdata_to_platdata(struct udevice *dev)
 
 static const struct udevice_id xhci_usb_ids[] = {
 	{ .compatible = "marvell,armada3700-xhci" },
+	{ .compatible = "marvell,armada-380-xhci" },
 	{ .compatible = "marvell,armada-8k-xhci" },
 	{ }
 };

commit ed0303ef9d2fdddfbfff59866e25be00334fba9b
Author: Marek Vasut <marek.vasut@gmail.com>
Date:   Tue Sep 12 19:07:25 2017 +0200

    UPSTREAM: usb: Drop the EHCI RCar Gen3
    
    Since we use EHCI generic driver on RCar Gen3 , this driver is useless.
    Remove it.
    
    Conflicts:
            drivers/usb/host/ehci-rcar_gen3.c
    
    Change-Id: I09967397444c5442c2466426672840e3398a03b5
    Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
    Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
    Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
    Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit c322d4b72ba02d7b531e4814c46ed2098f3397f1)

diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index eb035a476b..5438feb8f5 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -148,14 +148,6 @@ config USB_EHCI_PCI
 	help
 	  Enables support for the PCI-based EHCI controller.
 
-config USB_EHCI_RCAR_GEN3
-	bool "Support for Renesas RCar M3/H3 EHCI USB controller"
-	depends on RCAR_GEN3
-	default y
-	---help---
-	  Enables support for the on-chip EHCI controller on Renesas
-	  R8A7795 and R8A7796 SoCs.
-
 config USB_EHCI_ZYNQ
 	bool "Support for Xilinx Zynq on-chip EHCI USB controller"
 	depends on ARCH_ZYNQ
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 55929578ef..d5375a94fa 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -46,7 +46,6 @@ obj-$(CONFIG_USB_EHCI_TEGRA) += ehci-tegra.o
 obj-$(CONFIG_USB_EHCI_VCT) += ehci-vct.o
 obj-$(CONFIG_USB_EHCI_VF) += ehci-vf.o
 obj-$(CONFIG_USB_EHCI_RMOBILE) += ehci-rmobile.o
-obj-$(CONFIG_USB_EHCI_RCAR_GEN3) += ehci-rcar_gen3.o
 obj-$(CONFIG_USB_EHCI_ZYNQ) += ehci-zynq.o
 
 # xhci

commit 0f3e8dc9d2d50b28c9aa9cd1bc0f16a87d50c3a9
Author: Maxime Ripard <maxime.ripard@free-electrons.com>
Date:   Tue Sep 5 22:10:35 2017 +0200

    UPSTREAM: musb: sunxi: switch to the device model
    
    The device model was implemented so far using a hook that needed to be
    called from the board support, without DT support and only for the host.
    
    Switch to probing both in peripheral and host mode through the DT.
    
    Change-Id: Ieec474f3236f6c7e43e94735f1d544d36708bda0
    Reviewed-by: Łukasz Majewski <lukma@denx.de>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 3a61b080acee941a1b14b709b58ff9cde0b367bc)

diff --git a/arch/arm/include/asm/arch-sunxi/usb_phy.h b/arch/arm/include/asm/arch-sunxi/usb_phy.h
index cef6c985bc..5a9cacb6f4 100644
--- a/arch/arm/include/asm/arch-sunxi/usb_phy.h
+++ b/arch/arm/include/asm/arch-sunxi/usb_phy.h
@@ -19,10 +19,3 @@ void sunxi_usb_phy_power_off(int index);
 int sunxi_usb_phy_vbus_detect(int index);
 int sunxi_usb_phy_id_detect(int index);
 void sunxi_usb_phy_enable_squelch_detect(int index, int enable);
-
-/* Not really phy related, but we have to declare this somewhere ... */
-#if defined(CONFIG_USB_MUSB_HOST) || defined(CONFIG_USB_MUSB_GADGET)
-void sunxi_musb_board_init(void);
-#else
-#define sunxi_musb_board_init()
-#endif
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index 4e05faf9af..ab3137b5a7 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -736,7 +736,6 @@ int misc_init_r(void)
 	if (ret)
 		return ret;
 #endif
-	sunxi_musb_board_init();
 
 	return 0;
 }
diff --git a/drivers/usb/musb-new/sunxi.c b/drivers/usb/musb-new/sunxi.c
index 5c1a902e42..7ee44ea919 100644
--- a/drivers/usb/musb-new/sunxi.c
+++ b/drivers/usb/musb-new/sunxi.c
@@ -308,9 +308,6 @@ static struct musb_hdrc_platform_data musb_plat = {
 	.platform_ops	= &sunxi_musb_ops,
 };
 
-#ifdef CONFIG_USB_MUSB_HOST
-static int musb_usb_remove(struct udevice *dev);
-
 static int musb_usb_probe(struct udevice *dev)
 {
 	struct musb_host_data *host = dev_get_priv(dev);
@@ -319,16 +316,20 @@ static int musb_usb_probe(struct udevice *dev)
 
 	priv->desc_before_addr = true;
 
+#ifdef CONFIG_USB_MUSB_HOST
 	host->host = musb_init_controller(&musb_plat, NULL,
 					  (void *)SUNXI_USB0_BASE);
 	if (!host->host)
 		return -EIO;
 
 	ret = musb_lowlevel_init(host);
-	if (ret == 0)
-		printf("MUSB OTG\n");
-	else
-		musb_usb_remove(dev);
+	if (!ret)
+		printf("Allwinner mUSB OTG (Host)\n");
+#else
+	ret = musb_register(&musb_plat, NULL, (void *)SUNXI_USB0_BASE);
+	if (!ret)
+		printf("Allwinner mUSB OTG (Peripheral)\n");
+#endif
 
 	return ret;
 }
@@ -352,30 +353,27 @@ static int musb_usb_remove(struct udevice *dev)
 	return 0;
 }
 
-U_BOOT_DRIVER(usb_musb) = {
-	.name	= "sunxi-musb",
-	.id	= UCLASS_USB,
-	.probe = musb_usb_probe,
-	.remove = musb_usb_remove,
-	.ops	= &musb_usb_ops,
-	.platdata_auto_alloc_size = sizeof(struct usb_platdata),
-	.priv_auto_alloc_size = sizeof(struct musb_host_data),
+static const struct udevice_id sunxi_musb_ids[] = {
+	{ .compatible = "allwinner,sun4i-a10-musb" },
+	{ .compatible = "allwinner,sun6i-a31-musb" },
+	{ .compatible = "allwinner,sun8i-a33-musb" },
+	{ .compatible = "allwinner,sun8i-h3-musb" },
+	{ }
 };
-#endif
 
-void sunxi_musb_board_init(void)
-{
+U_BOOT_DRIVER(usb_musb) = {
+	.name		= "sunxi-musb",
 #ifdef CONFIG_USB_MUSB_HOST
-	struct udevice *dev;
-
-	/*
-	 * Bind the driver directly for now as musb linux kernel support is
-	 * still pending upstream so our dts files do not have the necessary
-	 * nodes yet. TODO: Remove this as soon as the dts nodes are in place
-	 * and bind by compatible instead.
-	 */
-	device_bind_driver(dm_root(), "sunxi-musb", "sunxi-musb", &dev);
+	.id		= UCLASS_USB,
 #else
-	musb_register(&musb_plat, NULL, (void *)SUNXI_USB0_BASE);
+	.id		= UCLASS_USB_DEV_GENERIC,
 #endif
-}
+	.of_match	= sunxi_musb_ids,
+	.probe		= musb_usb_probe,
+	.remove		= musb_usb_remove,
+#ifdef CONFIG_USB_MUSB_HOST
+	.ops		= &musb_usb_ops,
+#endif
+	.platdata_auto_alloc_size = sizeof(struct usb_platdata),
+	.priv_auto_alloc_size = sizeof(struct musb_host_data),
+};

commit 2646d32f70f8e7bd99f76e81c4d8d892857f481a
Author: Maxime Ripard <maxime.ripard@free-electrons.com>
Date:   Tue Sep 12 19:41:15 2017 +0200

    UPSTREAM: sunxi: provide default USB gadget setup
    
    All the Allwinner boards use the same manufacturer, VID and PID for the
    gadgets. Make them the defaults to remove some boilerplate from our
    defconfigs.
    
    Change-Id: I53d0e6d45a60645af4b8c0a16afb81e4db97b9f6
    Reviewed-by: Łukasz Majewski <lukma@denx.de>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit e02687bda96cc8ed942e14b558796d3043d24b23)

diff --git a/configs/A13-OLinuXino_defconfig b/configs/A13-OLinuXino_defconfig
index 2574018d82..ae790164df 100644
--- a/configs/A13-OLinuXino_defconfig
+++ b/configs/A13-OLinuXino_defconfig
@@ -32,7 +32,4 @@ CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="Allwinner Technology"
-CONFIG_USB_GADGET_VENDOR_NUM=0x1f3a
-CONFIG_USB_GADGET_PRODUCT_NUM=0x1010
 CONFIG_USB_GADGET_DOWNLOAD=y
diff --git a/configs/A20-OLinuXino-Lime2-eMMC_defconfig b/configs/A20-OLinuXino-Lime2-eMMC_defconfig
index 5663a824e7..b136af66b7 100644
--- a/configs/A20-OLinuXino-Lime2-eMMC_defconfig
+++ b/configs/A20-OLinuXino-Lime2-eMMC_defconfig
@@ -34,7 +34,4 @@ CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="Allwinner Technology"
-CONFIG_USB_GADGET_VENDOR_NUM=0x1f3a
-CONFIG_USB_GADGET_PRODUCT_NUM=0x1010
 CONFIG_USB_GADGET_DOWNLOAD=y
diff --git a/configs/A20-OLinuXino-Lime2_defconfig b/configs/A20-OLinuXino-Lime2_defconfig
index 63d0132936..ebb435f309 100644
--- a/configs/A20-OLinuXino-Lime2_defconfig
+++ b/configs/A20-OLinuXino-Lime2_defconfig
@@ -33,7 +33,4 @@ CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="Allwinner Technology"
-CONFIG_USB_GADGET_VENDOR_NUM=0x1f3a
-CONFIG_USB_GADGET_PRODUCT_NUM=0x1010
 CONFIG_USB_GADGET_DOWNLOAD=y
diff --git a/configs/CHIP_defconfig b/configs/CHIP_defconfig
index 278039c055..7d50d0533d 100644
--- a/configs/CHIP_defconfig
+++ b/configs/CHIP_defconfig
@@ -23,8 +23,5 @@ CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="Allwinner Technology"
-CONFIG_USB_GADGET_VENDOR_NUM=0x1f3a
-CONFIG_USB_GADGET_PRODUCT_NUM=0x1010
 CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/configs/CHIP_pro_defconfig b/configs/CHIP_pro_defconfig
index 9375caefd1..fe37bda0a7 100644
--- a/configs/CHIP_pro_defconfig
+++ b/configs/CHIP_pro_defconfig
@@ -28,8 +28,5 @@ CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="Allwinner Technology"
-CONFIG_USB_GADGET_VENDOR_NUM=0x1f3a
-CONFIG_USB_GADGET_PRODUCT_NUM=0x1010
 CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/configs/Cubietruck_defconfig b/configs/Cubietruck_defconfig
index 2d1753645b..1b2989d364 100644
--- a/configs/Cubietruck_defconfig
+++ b/configs/Cubietruck_defconfig
@@ -33,7 +33,4 @@ CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="Allwinner Technology"
-CONFIG_USB_GADGET_VENDOR_NUM=0x1f3a
-CONFIG_USB_GADGET_PRODUCT_NUM=0x1010
 CONFIG_USB_GADGET_DOWNLOAD=y
diff --git a/configs/Nintendo_NES_Classic_Edition_defconfig b/configs/Nintendo_NES_Classic_Edition_defconfig
index 99f7d30f15..5986764a14 100644
--- a/configs/Nintendo_NES_Classic_Edition_defconfig
+++ b/configs/Nintendo_NES_Classic_Edition_defconfig
@@ -23,7 +23,4 @@ CONFIG_AXP_ELDO2_VOLT=1800
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="Allwinner Technology"
-CONFIG_USB_GADGET_VENDOR_NUM=0x1f3a
-CONFIG_USB_GADGET_PRODUCT_NUM=0x1010
 CONFIG_USB_GADGET_DOWNLOAD=y
diff --git a/configs/Sinlinx_SinA33_defconfig b/configs/Sinlinx_SinA33_defconfig
index 8c5fc75879..9299aedd60 100644
--- a/configs/Sinlinx_SinA33_defconfig
+++ b/configs/Sinlinx_SinA33_defconfig
@@ -28,7 +28,4 @@ CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="Allwinner Technology"
-CONFIG_USB_GADGET_VENDOR_NUM=0x1f3a
-CONFIG_USB_GADGET_PRODUCT_NUM=0x1010
 CONFIG_USB_GADGET_DOWNLOAD=y
diff --git a/configs/parrot_r16_defconfig b/configs/parrot_r16_defconfig
index 4b70fc5687..57db9587fe 100644
--- a/configs/parrot_r16_defconfig
+++ b/configs/parrot_r16_defconfig
@@ -24,7 +24,4 @@ CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="Allwinner Technology"
-CONFIG_USB_GADGET_VENDOR_NUM=0x1f3a
-CONFIG_USB_GADGET_PRODUCT_NUM=0x1010
 CONFIG_USB_GADGET_DOWNLOAD=y
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index dfeeb5725a..78faac74e9 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -38,6 +38,7 @@ if USB_GADGET
 
 config USB_GADGET_MANUFACTURER
 	string "Vendor name of the USB device"
+	default "Allwinner Technology" if ARCH_SUNXI
 	default "U-Boot"
 	help
 	  Vendor name of the USB device emulated, reported to the host device.
@@ -45,6 +46,7 @@ config USB_GADGET_MANUFACTURER
 
 config USB_GADGET_VENDOR_NUM
 	hex "Vendor ID of the USB device"
+	default 0x1f3a if ARCH_SUNXI
 	default 0x0
 	help
 	  Vendor ID of the USB device emulated, reported to the host device.
@@ -53,6 +55,7 @@ config USB_GADGET_VENDOR_NUM
 
 config USB_GADGET_PRODUCT_NUM
 	hex "Product ID of the USB device"
+	default 0x1010 if ARCH_SUNXI
 	default 0x0
 	help
 	  Product ID of the USB device emulated, reported to the host device.

commit b466df35fbe10c58a843081cd56ffa8866da5d02
Author: Maxime Ripard <maxime.ripard@free-electrons.com>
Date:   Thu Sep 7 09:15:08 2017 +0200

    UPSTREAM: usb: gadget: usb_ether: Move settings to common
    
    The usb_ether gadget duplicates the USB settings for the manufacturer,
    product ID and vendor ID.
    
    Make sure we use the common option so that we can expect a single VID/PID
    couple for a single device.
    
    Change-Id: I71cabacc3dcf5a7335996b2ddaf812e1c97b097b
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Lukasz Majewski <lukma@denx.de>
    Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 10ac57fda3ff46a20af7ded6cc03d78e88032495)

diff --git a/configs/sama5d2_ptc_nandflash_defconfig b/configs/sama5d2_ptc_nandflash_defconfig
index 6672a5ce11..431056a50a 100644
--- a/configs/sama5d2_ptc_nandflash_defconfig
+++ b/configs/sama5d2_ptc_nandflash_defconfig
@@ -29,5 +29,6 @@ CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Atmel SAMA5D2_PTC"
 CONFIG_USB_GADGET_ATMEL_USBA=y
 CONFIG_USB_ETHER=y
diff --git a/configs/sama5d2_ptc_spiflash_defconfig b/configs/sama5d2_ptc_spiflash_defconfig
index 9a23a808f1..66bb671820 100644
--- a/configs/sama5d2_ptc_spiflash_defconfig
+++ b/configs/sama5d2_ptc_spiflash_defconfig
@@ -30,5 +30,6 @@ CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Atmel SAMA5D2_PTC"
 CONFIG_USB_GADGET_ATMEL_USBA=y
 CONFIG_USB_ETHER=y
diff --git a/configs/vinco_defconfig b/configs/vinco_defconfig
index 08aa8c52a2..57ca8f9490 100644
--- a/configs/vinco_defconfig
+++ b/configs/vinco_defconfig
@@ -31,6 +31,7 @@ CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="L+G VInCo"
 CONFIG_USB_GADGET_ATMEL_USBA=y
 CONFIG_USB_ETHER=y
 CONFIG_USB_HOST_ETHER=y
diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c
index 2e0ff452d8..a80486e91f 100644
--- a/drivers/usb/gadget/ether.c
+++ b/drivers/usb/gadget/ether.c
@@ -273,8 +273,8 @@ static inline int BITRATE(struct usb_gadget *g)
  * static ushort idProduct;
  */
 
-#if defined(CONFIG_USBNET_MANUFACTURER)
-static char *iManufacturer = CONFIG_USBNET_MANUFACTURER;
+#if defined(CONFIG_USB_GADGET_MANUFACTURER)
+static char *iManufacturer = CONFIG_USB_GADGET_MANUFACTURER;
 #else
 static char *iManufacturer = "U-Boot";
 #endif
@@ -2073,11 +2073,11 @@ static int eth_bind(struct usb_gadget *gadget)
 	 * to choose the right configuration otherwise.
 	 */
 	if (rndis) {
-#if defined(CONFIG_USB_RNDIS_VENDOR_ID) && defined(CONFIG_USB_RNDIS_PRODUCT_ID)
+#if defined(CONFIG_USB_GADGET_VENDOR_NUM) && defined(CONFIG_USB_GADGET_PRODUCT_NUM)
 		device_desc.idVendor =
-			__constant_cpu_to_le16(CONFIG_USB_RNDIS_VENDOR_ID);
+			__constant_cpu_to_le16(CONFIG_USB_GADGET_VENDOR_NUM);
 		device_desc.idProduct =
-			__constant_cpu_to_le16(CONFIG_USB_RNDIS_PRODUCT_ID);
+			__constant_cpu_to_le16(CONFIG_USB_GADGET_PRODUCT_NUM);
 #else
 		device_desc.idVendor =
 			__constant_cpu_to_le16(RNDIS_VENDOR_NUM);
@@ -2092,9 +2092,9 @@ static int eth_bind(struct usb_gadget *gadget)
 	 * supporting one submode of the "SAFE" variant of MDLM.)
 	 */
 	} else {
-#if defined(CONFIG_USB_CDC_VENDOR_ID) && defined(CONFIG_USB_CDC_PRODUCT_ID)
-		device_desc.idVendor = cpu_to_le16(CONFIG_USB_CDC_VENDOR_ID);
-		device_desc.idProduct = cpu_to_le16(CONFIG_USB_CDC_PRODUCT_ID);
+#if defined(CONFIG_USB_GADGET_VENDOR_NUM) && defined(CONFIG_USB_GADGET_PRODUCT_NUM)
+		device_desc.idVendor = cpu_to_le16(CONFIG_USB_GADGET_VENDOR_NUM);
+		device_desc.idProduct = cpu_to_le16(CONFIG_USB_GADGET_PRODUCT_NUM);
 #else
 		if (!cdc) {
 			device_desc.idVendor =
diff --git a/include/configs/ma5d4evk.h b/include/configs/ma5d4evk.h
index 6d25d84c6e..3aeb7e6ef1 100644
--- a/include/configs/ma5d4evk.h
+++ b/include/configs/ma5d4evk.h
@@ -97,7 +97,6 @@
 #ifdef CONFIG_CMD_USB
 
 /* USB device */
-#define CONFIG_USBNET_MANUFACTURER      "AriesEmbedded"
 #define CONFIG_USB_FUNCTION_MASS_STORAGE
 #define CONFIG_SYS_DFU_DATA_BUF_SIZE	(1 * 1024 * 1024)
 #define DFU_DEFAULT_POLL_TIMEOUT	300
diff --git a/include/configs/sama5d2_ptc.h b/include/configs/sama5d2_ptc.h
index 543592e3a5..2328c7614e 100644
--- a/include/configs/sama5d2_ptc.h
+++ b/include/configs/sama5d2_ptc.h
@@ -60,7 +60,6 @@
 #endif
 
 /* USB device */
-#define CONFIG_USBNET_MANUFACTURER      "Atmel SAMA5D2_PTC"
 
 /* Ethernet Hardware */
 #define CONFIG_MACB
diff --git a/include/configs/vinco.h b/include/configs/vinco.h
index e2449ef6f4..3a3cfd4ca7 100644
--- a/include/configs/vinco.h
+++ b/include/configs/vinco.h
@@ -63,7 +63,6 @@
 #endif
 
 /* USB device */
-#define CONFIG_USBNET_MANUFACTURER      "L+G VInCo"
 
 /* Ethernet Hardware */
 #define CONFIG_PHY_SMSC
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 2a118b5dbf..caaa7555b1 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -4941,7 +4941,6 @@ CONFIG_USBD_SERIAL_OUT_PKTSIZE
 CONFIG_USBD_VENDORID
 CONFIG_USBID_ADDR
 CONFIG_USBNET_DEV_ADDR
-CONFIG_USBNET_MANUFACTURER
 CONFIG_USBTTY
 CONFIG_USB_AM35X
 CONFIG_USB_ATMEL

commit 473221da5a5a767b650f97c0a6e63b0854c2221a
Author: Maxime Ripard <maxime.ripard@free-electrons.com>
Date:   Thu Sep 7 08:58:08 2017 +0200

    UPSTREAM: usb: gadget: Make g_dnl USB settings common
    
    The g_dnl USB settings for the vendor ID, product ID and manufacturer are
    actually common settings that can and should be shared by all the gadgets.
    
    Make them common by renaming them, and convert all the users.
    
    Conflicts:
            configs/cgtqmx6eval_defconfig
            configs/dms-ba16-1g_defconfig
            configs/evb-rk3036_defconfig
            configs/evb-rk3229_defconfig
            configs/evb-rv1108_defconfig
            configs/fennec-rk3288_defconfig
            configs/stih410-b2260_defconfig
    
    Change-Id: Ib855d37af9f539ef794a2519c75c027e67bd091c
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Lukasz Majewski <lukma@denx.de>
    Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit a95aee6af70d8815547b81329125f2800c8ee37c)

diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c
index 15b04d6c79..147aac1573 100644
--- a/arch/arm/mach-imx/spl.c
+++ b/arch/arm/mach-imx/spl.c
@@ -87,7 +87,7 @@ u32 spl_boot_device(void)
 #ifdef CONFIG_SPL_USB_GADGET_SUPPORT
 int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
 {
-	put_unaligned(CONFIG_G_DNL_PRODUCT_NUM + 0xfff, &dev->idProduct);
+	put_unaligned(CONFIG_USB_GADGET_PRODUCT_NUM + 0xfff, &dev->idProduct);
 
 	return 0;
 }
diff --git a/board/samsung/common/gadget.c b/board/samsung/common/gadget.c
index 6a1e57f164..ef732befc4 100644
--- a/board/samsung/common/gadget.c
+++ b/board/samsung/common/gadget.c
@@ -17,8 +17,8 @@ int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
 		put_unaligned(CONFIG_G_DNL_UMS_VENDOR_NUM, &dev->idVendor);
 		put_unaligned(CONFIG_G_DNL_UMS_PRODUCT_NUM, &dev->idProduct);
 	} else {
-		put_unaligned(CONFIG_G_DNL_VENDOR_NUM, &dev->idVendor);
-		put_unaligned(CONFIG_G_DNL_PRODUCT_NUM, &dev->idProduct);
+		put_unaligned(CONFIG_USB_GADGET_VENDOR_NUM, &dev->idVendor);
+		put_unaligned(CONFIG_USB_GADGET_PRODUCT_NUM, &dev->idProduct);
 	}
 	return 0;
 }
diff --git a/board/siemens/common/factoryset.c b/board/siemens/common/factoryset.c
index b4f027af28..81bbb5758d 100644
--- a/board/siemens/common/factoryset.c
+++ b/board/siemens/common/factoryset.c
@@ -145,8 +145,8 @@ int factoryset_read_eeprom(int i2c_addr)
 	unsigned char *cp, *cp1;
 
 #if defined(CONFIG_USB_FUNCTION_DFU)
-	factory_dat.usb_vendor_id = CONFIG_G_DNL_VENDOR_NUM;
-	factory_dat.usb_product_id = CONFIG_G_DNL_PRODUCT_NUM;
+	factory_dat.usb_vendor_id = CONFIG_USB_GADGET_VENDOR_NUM;
+	factory_dat.usb_product_id = CONFIG_USB_GADGET_PRODUCT_NUM;
 #endif
 	if (i2c_probe(i2c_addr))
 		goto err;
diff --git a/configs/A13-OLinuXino_defconfig b/configs/A13-OLinuXino_defconfig
index fbacce07cf..2574018d82 100644
--- a/configs/A13-OLinuXino_defconfig
+++ b/configs/A13-OLinuXino_defconfig
@@ -32,7 +32,7 @@ CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Allwinner Technology"
+CONFIG_USB_GADGET_VENDOR_NUM=0x1f3a
+CONFIG_USB_GADGET_PRODUCT_NUM=0x1010
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Allwinner Technology"
-CONFIG_G_DNL_VENDOR_NUM=0x1f3a
-CONFIG_G_DNL_PRODUCT_NUM=0x1010
diff --git a/configs/A20-OLinuXino-Lime2-eMMC_defconfig b/configs/A20-OLinuXino-Lime2-eMMC_defconfig
index 58aa988b23..5663a824e7 100644
--- a/configs/A20-OLinuXino-Lime2-eMMC_defconfig
+++ b/configs/A20-OLinuXino-Lime2-eMMC_defconfig
@@ -34,7 +34,7 @@ CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Allwinner Technology"
+CONFIG_USB_GADGET_VENDOR_NUM=0x1f3a
+CONFIG_USB_GADGET_PRODUCT_NUM=0x1010
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Allwinner Technology"
-CONFIG_G_DNL_VENDOR_NUM=0x1f3a
-CONFIG_G_DNL_PRODUCT_NUM=0x1010
diff --git a/configs/A20-OLinuXino-Lime2_defconfig b/configs/A20-OLinuXino-Lime2_defconfig
index 6d7c588613..63d0132936 100644
--- a/configs/A20-OLinuXino-Lime2_defconfig
+++ b/configs/A20-OLinuXino-Lime2_defconfig
@@ -33,7 +33,7 @@ CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Allwinner Technology"
+CONFIG_USB_GADGET_VENDOR_NUM=0x1f3a
+CONFIG_USB_GADGET_PRODUCT_NUM=0x1010
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Allwinner Technology"
-CONFIG_G_DNL_VENDOR_NUM=0x1f3a
-CONFIG_G_DNL_PRODUCT_NUM=0x1010
diff --git a/configs/CHIP_defconfig b/configs/CHIP_defconfig
index 83228bd10f..278039c055 100644
--- a/configs/CHIP_defconfig
+++ b/configs/CHIP_defconfig
@@ -23,8 +23,8 @@ CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Allwinner Technology"
+CONFIG_USB_GADGET_VENDOR_NUM=0x1f3a
+CONFIG_USB_GADGET_PRODUCT_NUM=0x1010
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Allwinner Technology"
-CONFIG_G_DNL_VENDOR_NUM=0x1f3a
-CONFIG_G_DNL_PRODUCT_NUM=0x1010
 CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/configs/CHIP_pro_defconfig b/configs/CHIP_pro_defconfig
index effded3d64..9375caefd1 100644
--- a/configs/CHIP_pro_defconfig
+++ b/configs/CHIP_pro_defconfig
@@ -28,8 +28,8 @@ CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Allwinner Technology"
+CONFIG_USB_GADGET_VENDOR_NUM=0x1f3a
+CONFIG_USB_GADGET_PRODUCT_NUM=0x1010
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Allwinner Technology"
-CONFIG_G_DNL_VENDOR_NUM=0x1f3a
-CONFIG_G_DNL_PRODUCT_NUM=0x1010
 CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/configs/Cubietruck_defconfig b/configs/Cubietruck_defconfig
index f93ff0d6c4..2d1753645b 100644
--- a/configs/Cubietruck_defconfig
+++ b/configs/Cubietruck_defconfig
@@ -33,7 +33,7 @@ CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Allwinner Technology"
+CONFIG_USB_GADGET_VENDOR_NUM=0x1f3a
+CONFIG_USB_GADGET_PRODUCT_NUM=0x1010
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Allwinner Technology"
-CONFIG_G_DNL_VENDOR_NUM=0x1f3a
-CONFIG_G_DNL_PRODUCT_NUM=0x1010
diff --git a/configs/Nintendo_NES_Classic_Edition_defconfig b/configs/Nintendo_NES_Classic_Edition_defconfig
index d05375d0db..99f7d30f15 100644
--- a/configs/Nintendo_NES_Classic_Edition_defconfig
+++ b/configs/Nintendo_NES_Classic_Edition_defconfig
@@ -23,7 +23,7 @@ CONFIG_AXP_ELDO2_VOLT=1800
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Allwinner Technology"
+CONFIG_USB_GADGET_VENDOR_NUM=0x1f3a
+CONFIG_USB_GADGET_PRODUCT_NUM=0x1010
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Allwinner Technology"
-CONFIG_G_DNL_VENDOR_NUM=0x1f3a
-CONFIG_G_DNL_PRODUCT_NUM=0x1010
diff --git a/configs/Sinlinx_SinA33_defconfig b/configs/Sinlinx_SinA33_defconfig
index af00e54347..8c5fc75879 100644
--- a/configs/Sinlinx_SinA33_defconfig
+++ b/configs/Sinlinx_SinA33_defconfig
@@ -28,7 +28,7 @@ CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Allwinner Technology"
+CONFIG_USB_GADGET_VENDOR_NUM=0x1f3a
+CONFIG_USB_GADGET_PRODUCT_NUM=0x1010
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Allwinner Technology"
-CONFIG_G_DNL_VENDOR_NUM=0x1f3a
-CONFIG_G_DNL_PRODUCT_NUM=0x1010
diff --git a/configs/am335x_baltos_defconfig b/configs/am335x_baltos_defconfig
index 0722f1ca95..5647ac1bf7 100644
--- a/configs/am335x_baltos_defconfig
+++ b/configs/am335x_baltos_defconfig
@@ -60,10 +60,10 @@ CONFIG_USB_MUSB_HOST=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0403
+CONFIG_USB_GADGET_PRODUCT_NUM=0xbd00
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
-CONFIG_G_DNL_VENDOR_NUM=0x0403
-CONFIG_G_DNL_PRODUCT_NUM=0xbd00
 CONFIG_USB_ETHER=y
 CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00"
 CONFIG_FAT_WRITE=y
diff --git a/configs/am335x_boneblack_defconfig b/configs/am335x_boneblack_defconfig
index 6ab8ac386f..f9cc495b30 100644
--- a/configs/am335x_boneblack_defconfig
+++ b/configs/am335x_boneblack_defconfig
@@ -39,10 +39,10 @@ CONFIG_USB_MUSB_HOST=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0451
+CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
-CONFIG_G_DNL_VENDOR_NUM=0x0451
-CONFIG_G_DNL_PRODUCT_NUM=0xd022
 CONFIG_USB_ETHER=y
 CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00"
 CONFIG_LZO=y
diff --git a/configs/am335x_boneblack_vboot_defconfig b/configs/am335x_boneblack_vboot_defconfig
index e54435d1d9..6f8480a316 100644
--- a/configs/am335x_boneblack_vboot_defconfig
+++ b/configs/am335x_boneblack_vboot_defconfig
@@ -49,9 +49,9 @@ CONFIG_USB_MUSB_HOST=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0451
+CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
-CONFIG_G_DNL_VENDOR_NUM=0x0451
-CONFIG_G_DNL_PRODUCT_NUM=0xd022
 CONFIG_USB_ETHER=y
 CONFIG_LZO=y
diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig
index 1f4ca54460..0bb3e32c6c 100644
--- a/configs/am335x_evm_defconfig
+++ b/configs/am335x_evm_defconfig
@@ -52,10 +52,10 @@ CONFIG_USB_MUSB_GADGET=y
 CONFIG_USB_MUSB_TI=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0451
+CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
-CONFIG_G_DNL_VENDOR_NUM=0x0451
-CONFIG_G_DNL_PRODUCT_NUM=0xd022
 CONFIG_USB_ETHER=y
 CONFIG_RSA=y
 CONFIG_LZO=y
diff --git a/configs/am335x_evm_nor_defconfig b/configs/am335x_evm_nor_defconfig
index ffb20b9d07..29527c150e 100644
--- a/configs/am335x_evm_nor_defconfig
+++ b/configs/am335x_evm_nor_defconfig
@@ -39,10 +39,10 @@ CONFIG_USB_MUSB_HOST=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0451
+CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
-CONFIG_G_DNL_VENDOR_NUM=0x0451
-CONFIG_G_DNL_PRODUCT_NUM=0xd022
 CONFIG_USB_ETHER=y
 CONFIG_LZO=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/am335x_evm_norboot_defconfig b/configs/am335x_evm_norboot_defconfig
index 73dca07424..69a9f48640 100644
--- a/configs/am335x_evm_norboot_defconfig
+++ b/configs/am335x_evm_norboot_defconfig
@@ -33,10 +33,10 @@ CONFIG_USB_MUSB_HOST=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0451
+CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
-CONFIG_G_DNL_VENDOR_NUM=0x0451
-CONFIG_G_DNL_PRODUCT_NUM=0xd022
 CONFIG_USB_ETHER=y
 CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00"
 CONFIG_LZO=y
diff --git a/configs/am335x_evm_spiboot_defconfig b/configs/am335x_evm_spiboot_defconfig
index 9209a9951e..3bd782d337 100644
--- a/configs/am335x_evm_spiboot_defconfig
+++ b/configs/am335x_evm_spiboot_defconfig
@@ -37,10 +37,10 @@ CONFIG_USB_MUSB_HOST=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0451
+CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
-CONFIG_G_DNL_VENDOR_NUM=0x0451
-CONFIG_G_DNL_PRODUCT_NUM=0xd022
 CONFIG_USB_ETHER=y
 CONFIG_LZO=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/am335x_evm_usbspl_defconfig b/configs/am335x_evm_usbspl_defconfig
index c24ad5be51..c51f343ab1 100644
--- a/configs/am335x_evm_usbspl_defconfig
+++ b/configs/am335x_evm_usbspl_defconfig
@@ -43,10 +43,10 @@ CONFIG_USB_MUSB_HOST=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0451
+CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
-CONFIG_G_DNL_VENDOR_NUM=0x0451
-CONFIG_G_DNL_PRODUCT_NUM=0xd022
 CONFIG_USB_ETHER=y
 CONFIG_LZO=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/am335x_hs_evm_defconfig b/configs/am335x_hs_evm_defconfig
index 53fe33a7a1..5832d48857 100644
--- a/configs/am335x_hs_evm_defconfig
+++ b/configs/am335x_hs_evm_defconfig
@@ -56,10 +56,10 @@ CONFIG_USB_MUSB_GADGET=y
 CONFIG_USB_MUSB_TI=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0451
+CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
-CONFIG_G_DNL_VENDOR_NUM=0x0451
-CONFIG_G_DNL_PRODUCT_NUM=0xd022
 CONFIG_USB_ETHER=y
 CONFIG_RSA=y
 CONFIG_LZO=y
diff --git a/configs/am43xx_evm_defconfig b/configs/am43xx_evm_defconfig
index bfd202129c..3ac6f6c818 100644
--- a/configs/am43xx_evm_defconfig
+++ b/configs/am43xx_evm_defconfig
@@ -53,7 +53,7 @@ CONFIG_USB_DWC3_OMAP=y
 CONFIG_USB_DWC3_PHY_OMAP=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0403
+CONFIG_USB_GADGET_PRODUCT_NUM=0xbd00
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
-CONFIG_G_DNL_VENDOR_NUM=0x0403
-CONFIG_G_DNL_PRODUCT_NUM=0xbd00
diff --git a/configs/am43xx_evm_ethboot_defconfig b/configs/am43xx_evm_ethboot_defconfig
index 0f5331459f..87d7a43930 100644
--- a/configs/am43xx_evm_ethboot_defconfig
+++ b/configs/am43xx_evm_ethboot_defconfig
@@ -62,8 +62,8 @@ CONFIG_USB_DWC3_OMAP=y
 CONFIG_USB_DWC3_PHY_OMAP=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0403
+CONFIG_USB_GADGET_PRODUCT_NUM=0xbd00
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
-CONFIG_G_DNL_VENDOR_NUM=0x0403
-CONFIG_G_DNL_PRODUCT_NUM=0xbd00
 CONFIG_OF_LIBFDT=y
diff --git a/configs/am43xx_evm_qspiboot_defconfig b/configs/am43xx_evm_qspiboot_defconfig
index d7214b202b..8e381d47d5 100644
--- a/configs/am43xx_evm_qspiboot_defconfig
+++ b/configs/am43xx_evm_qspiboot_defconfig
@@ -53,9 +53,9 @@ CONFIG_USB_DWC3_OMAP=y
 CONFIG_USB_DWC3_PHY_OMAP=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0403
+CONFIG_USB_GADGET_PRODUCT_NUM=0xbd00
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
-CONFIG_G_DNL_VENDOR_NUM=0x0403
-CONFIG_G_DNL_PRODUCT_NUM=0xbd00
 CONFIG_FAT_WRITE=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/am43xx_evm_usbhost_boot_defconfig b/configs/am43xx_evm_usbhost_boot_defconfig
index e2fb65af69..bbd732b569 100644
--- a/configs/am43xx_evm_usbhost_boot_defconfig
+++ b/configs/am43xx_evm_usbhost_boot_defconfig
@@ -76,7 +76,7 @@ CONFIG_USB_DWC3_OMAP=y
 CONFIG_USB_DWC3_PHY_OMAP=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0403
+CONFIG_USB_GADGET_PRODUCT_NUM=0xbd00
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
-CONFIG_G_DNL_VENDOR_NUM=0x0403
-CONFIG_G_DNL_PRODUCT_NUM=0xbd00
diff --git a/configs/am43xx_hs_evm_defconfig b/configs/am43xx_hs_evm_defconfig
index 157eccf763..a9b7eca8e7 100644
--- a/configs/am43xx_hs_evm_defconfig
+++ b/configs/am43xx_hs_evm_defconfig
@@ -64,7 +64,7 @@ CONFIG_USB_DWC3_OMAP=y
 CONFIG_USB_DWC3_PHY_OMAP=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0403
+CONFIG_USB_GADGET_PRODUCT_NUM=0xbd00
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
-CONFIG_G_DNL_VENDOR_NUM=0x0403
-CONFIG_G_DNL_PRODUCT_NUM=0xbd00
diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig
index e9cc1a039f..77af1f90eb 100644
--- a/configs/am57xx_evm_defconfig
+++ b/configs/am57xx_evm_defconfig
@@ -73,7 +73,7 @@ CONFIG_USB_DWC3_OMAP=y
 CONFIG_USB_DWC3_PHY_OMAP=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0451
+CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
-CONFIG_G_DNL_VENDOR_NUM=0x0451
-CONFIG_G_DNL_PRODUCT_NUM=0xd022
diff --git a/configs/am57xx_evm_nodt_defconfig b/configs/am57xx_evm_nodt_defconfig
index f96348699b..ae7c3464e0 100644
--- a/configs/am57xx_evm_nodt_defconfig
+++ b/configs/am57xx_evm_nodt_defconfig
@@ -62,9 +62,9 @@ CONFIG_USB_DWC3_OMAP=y
 CONFIG_USB_DWC3_PHY_OMAP=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0451
+CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
-CONFIG_G_DNL_VENDOR_NUM=0x0451
-CONFIG_G_DNL_PRODUCT_NUM=0xd022
 CONFIG_FAT_WRITE=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig
index 28e23460f8..9bd764ae90 100644
--- a/configs/am57xx_hs_evm_defconfig
+++ b/configs/am57xx_hs_evm_defconfig
@@ -76,7 +76,7 @@ CONFIG_USB_DWC3_OMAP=y
 CONFIG_USB_DWC3_PHY_OMAP=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0451
+CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
-CONFIG_G_DNL_VENDOR_NUM=0x0451
-CONFIG_G_DNL_PRODUCT_NUM=0xd022
diff --git a/configs/android6.0-rk3399_defconfig b/configs/android6.0-rk3399_defconfig
index 287afbda63..5bd55da071 100644
--- a/configs/android6.0-rk3399_defconfig
+++ b/configs/android6.0-rk3399_defconfig
@@ -82,9 +82,9 @@ CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x330a
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x330a
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_ETHER_ASIX88179=y
diff --git a/configs/apalis-tk1_defconfig b/configs/apalis-tk1_defconfig
index e6e3a9bfe9..84e0106491 100644
--- a/configs/apalis-tk1_defconfig
+++ b/configs/apalis-tk1_defconfig
@@ -47,9 +47,9 @@ CONFIG_DM_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Toradex"
+CONFIG_USB_GADGET_VENDOR_NUM=0x1b67
+CONFIG_USB_GADGET_PRODUCT_NUM=0xffff
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Toradex"
-CONFIG_G_DNL_VENDOR_NUM=0x1b67
-CONFIG_G_DNL_PRODUCT_NUM=0xffff
 CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig
index 13f2a3b849..57332f5368 100644
--- a/configs/apalis_imx6_defconfig
+++ b/configs/apalis_imx6_defconfig
@@ -55,11 +55,11 @@ CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Toradex"
+CONFIG_USB_GADGET_VENDOR_NUM=0x1b67
+CONFIG_USB_GADGET_PRODUCT_NUM=0x4000
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Toradex"
-CONFIG_G_DNL_VENDOR_NUM=0x1b67
-CONFIG_G_DNL_PRODUCT_NUM=0x4000
 CONFIG_USB_HOST_ETHER=y
 CONFIG_FAT_WRITE=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/apalis_imx6_nospl_com_defconfig b/configs/apalis_imx6_nospl_com_defconfig
index 7165749cfb..60ece90d99 100644
--- a/configs/apalis_imx6_nospl_com_defconfig
+++ b/configs/apalis_imx6_nospl_com_defconfig
@@ -44,11 +44,11 @@ CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Toradex"
+CONFIG_USB_GADGET_VENDOR_NUM=0x1b67
+CONFIG_USB_GADGET_PRODUCT_NUM=0x4020
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Toradex"
-CONFIG_G_DNL_VENDOR_NUM=0x1b67
-CONFIG_G_DNL_PRODUCT_NUM=0x4020
 CONFIG_USB_HOST_ETHER=y
 CONFIG_FAT_WRITE=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/apalis_imx6_nospl_it_defconfig b/configs/apalis_imx6_nospl_it_defconfig
index 0ad7674ee5..4fd356f9bd 100644
--- a/configs/apalis_imx6_nospl_it_defconfig
+++ b/configs/apalis_imx6_nospl_it_defconfig
@@ -44,11 +44,11 @@ CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Toradex"
+CONFIG_USB_GADGET_VENDOR_NUM=0x1b67
+CONFIG_USB_GADGET_PRODUCT_NUM=0x4020
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Toradex"
-CONFIG_G_DNL_VENDOR_NUM=0x1b67
-CONFIG_G_DNL_PRODUCT_NUM=0x4020
 CONFIG_USB_HOST_ETHER=y
 CONFIG_FAT_WRITE=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/apalis_t30_defconfig b/configs/apalis_t30_defconfig
index e15e11ad92..588c1842a3 100644
--- a/configs/apalis_t30_defconfig
+++ b/configs/apalis_t30_defconfig
@@ -40,9 +40,9 @@ CONFIG_DM_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Toradex"
+CONFIG_USB_GADGET_VENDOR_NUM=0x1b67
+CONFIG_USB_GADGET_PRODUCT_NUM=0x4000
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Toradex"
-CONFIG_G_DNL_VENDOR_NUM=0x1b67
-CONFIG_G_DNL_PRODUCT_NUM=0x4000
 CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/configs/bcm11130_defconfig b/configs/bcm11130_defconfig
index cf3a7cd74d..4d93975d69 100644
--- a/configs/bcm11130_defconfig
+++ b/configs/bcm11130_defconfig
@@ -27,9 +27,9 @@ CONFIG_MMC_SDHCI_KONA=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Broadcom Corporation"
+CONFIG_USB_GADGET_VENDOR_NUM=0x18d1
+CONFIG_USB_GADGET_PRODUCT_NUM=0x0d02
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Broadcom Corporation"
-CONFIG_G_DNL_VENDOR_NUM=0x18d1
-CONFIG_G_DNL_PRODUCT_NUM=0x0d02
diff --git a/configs/bcm11130_nand_defconfig b/configs/bcm11130_nand_defconfig
index 2ce917981e..555ff05382 100644
--- a/configs/bcm11130_nand_defconfig
+++ b/configs/bcm11130_nand_defconfig
@@ -27,9 +27,9 @@ CONFIG_NAND=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Broadcom Corporation"
+CONFIG_USB_GADGET_VENDOR_NUM=0x18d1
+CONFIG_USB_GADGET_PRODUCT_NUM=0x0d02
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Broadcom Corporation"
-CONFIG_G_DNL_VENDOR_NUM=0x18d1
-CONFIG_G_DNL_PRODUCT_NUM=0x0d02
diff --git a/configs/bcm23550_w1d_defconfig b/configs/bcm23550_w1d_defconfig
index 70918654f5..49f7e40d15 100644
--- a/configs/bcm23550_w1d_defconfig
+++ b/configs/bcm23550_w1d_defconfig
@@ -34,11 +34,11 @@ CONFIG_MMC_SDHCI_KONA=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Broadcom Corporation"
+CONFIG_USB_GADGET_VENDOR_NUM=0x18d1
+CONFIG_USB_GADGET_PRODUCT_NUM=0x0d02
 CONFIG_USB_GADGET_BCM_UDC_OTG_PHY=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Broadcom Corporation"
-CONFIG_G_DNL_VENDOR_NUM=0x18d1
-CONFIG_G_DNL_PRODUCT_NUM=0x0d02
 CONFIG_OF_LIBFDT=y
diff --git a/configs/bcm28155_ap_defconfig b/configs/bcm28155_ap_defconfig
index db1ad40132..9e17b60e54 100644
--- a/configs/bcm28155_ap_defconfig
+++ b/configs/bcm28155_ap_defconfig
@@ -35,11 +35,11 @@ CONFIG_MMC_SDHCI_KONA=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Broadcom Corporation"
+CONFIG_USB_GADGET_VENDOR_NUM=0x18d1
+CONFIG_USB_GADGET_PRODUCT_NUM=0x0d02
 CONFIG_USB_GADGET_BCM_UDC_OTG_PHY=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Broadcom Corporation"
-CONFIG_G_DNL_VENDOR_NUM=0x18d1
-CONFIG_G_DNL_PRODUCT_NUM=0x0d02
 CONFIG_OF_LIBFDT=y
diff --git a/configs/bcm28155_w1d_defconfig b/configs/bcm28155_w1d_defconfig
index 3684fae370..8f8668ba5b 100644
--- a/configs/bcm28155_w1d_defconfig
+++ b/configs/bcm28155_w1d_defconfig
@@ -29,9 +29,9 @@ CONFIG_BCM_SF2_ETH_GMAC=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Broadcom Corporation"
+CONFIG_USB_GADGET_VENDOR_NUM=0x18d1
+CONFIG_USB_GADGET_PRODUCT_NUM=0x0d02
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Broadcom Corporation"
-CONFIG_G_DNL_VENDOR_NUM=0x18d1
-CONFIG_G_DNL_PRODUCT_NUM=0x0d02
diff --git a/configs/beaver_defconfig b/configs/beaver_defconfig
index 7fb88e452b..ad26354b4d 100644
--- a/configs/beaver_defconfig
+++ b/configs/beaver_defconfig
@@ -45,10 +45,10 @@ CONFIG_DM_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="NVIDIA"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0955
+CONFIG_USB_GADGET_PRODUCT_NUM=0x701a
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="NVIDIA"
-CONFIG_G_DNL_VENDOR_NUM=0x0955
-CONFIG_G_DNL_PRODUCT_NUM=0x701a
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
diff --git a/configs/birdland_bav335a_defconfig b/configs/birdland_bav335a_defconfig
index 4ea8643261..b5ce92c315 100644
--- a/configs/birdland_bav335a_defconfig
+++ b/configs/birdland_bav335a_defconfig
@@ -68,10 +68,10 @@ CONFIG_USB_MUSB_HOST=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0451
+CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
-CONFIG_G_DNL_VENDOR_NUM=0x0451
-CONFIG_G_DNL_PRODUCT_NUM=0xd022
 CONFIG_FAT_WRITE=y
 CONFIG_LZO=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/birdland_bav335b_defconfig b/configs/birdland_bav335b_defconfig
index 35b3d8edb9..dde63d1bf5 100644
--- a/configs/birdland_bav335b_defconfig
+++ b/configs/birdland_bav335b_defconfig
@@ -68,10 +68,10 @@ CONFIG_USB_MUSB_HOST=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0451
+CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
-CONFIG_G_DNL_VENDOR_NUM=0x0451
-CONFIG_G_DNL_PRODUCT_NUM=0xd022
 CONFIG_FAT_WRITE=y
 CONFIG_LZO=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/cei-tk1-som_defconfig b/configs/cei-tk1-som_defconfig
index 91b5647e64..a4cd2701e1 100644
--- a/configs/cei-tk1-som_defconfig
+++ b/configs/cei-tk1-som_defconfig
@@ -48,10 +48,10 @@ CONFIG_DM_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="NVIDIA"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0955
+CONFIG_USB_GADGET_PRODUCT_NUM=0x701a
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="NVIDIA"
-CONFIG_G_DNL_VENDOR_NUM=0x0955
-CONFIG_G_DNL_PRODUCT_NUM=0x701a
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
diff --git a/configs/cgtqmx6eval_defconfig b/configs/cgtqmx6eval_defconfig
new file mode 100644
index 0000000000..b17c30fcd2
--- /dev/null
+++ b/configs/cgtqmx6eval_defconfig
@@ -0,0 +1,68 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_TARGET_CGTQMX6EVAL=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_VIDEO=y
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6QDL"
+CONFIG_BOOTDELAY=3
+# CONFIG_CONSOLE_MUX is not set
+CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
+# CONFIG_SYS_STDIO_DEREGISTER is not set
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_SPL=y
+CONFIG_SPL_EXT_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="CGT-QMX6-Quad U-Boot > "
+CONFIG_FASTBOOT=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_CMD_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x12000000
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SATA=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_DFU_MMC=y
+CONFIG_DFU_SF=y
+CONFIG_PHYLIB=y
+CONFIG_USB=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Congatec"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
+CONFIG_CI_UDC=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX=y
+# CONFIG_VIDEO_SW_CURSOR is not set
+CONFIG_OF_LIBFDT=y
diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig
index 880439bf52..ced5c621ae 100644
--- a/configs/chromebit_mickey_defconfig
+++ b/configs/chromebit_mickey_defconfig
@@ -73,11 +73,11 @@ CONFIG_ROCKCHIP_SPI=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x320a
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x320a
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_VIDEO_ROCKCHIP=y
diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig
index 61a3774e0c..685ff53ddf 100644
--- a/configs/chromebook_jerry_defconfig
+++ b/configs/chromebook_jerry_defconfig
@@ -74,11 +74,11 @@ CONFIG_ROCKCHIP_SPI=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x320a
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x320a
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_VIDEO_ROCKCHIP=y
diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig
index a60011462f..12aa95a3dc 100644
--- a/configs/chromebook_minnie_defconfig
+++ b/configs/chromebook_minnie_defconfig
@@ -73,11 +73,11 @@ CONFIG_ROCKCHIP_SPI=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x320a
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x320a
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_VIDEO_ROCKCHIP=y
diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig
index 7e100869a4..9b45811e01 100644
--- a/configs/colibri_imx6_defconfig
+++ b/configs/colibri_imx6_defconfig
@@ -53,11 +53,11 @@ CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Toradex"
+CONFIG_USB_GADGET_VENDOR_NUM=0x1b67
+CONFIG_USB_GADGET_PRODUCT_NUM=0x4000
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Toradex"
-CONFIG_G_DNL_VENDOR_NUM=0x1b67
-CONFIG_G_DNL_PRODUCT_NUM=0x4000
 CONFIG_USB_HOST_ETHER=y
 CONFIG_FAT_WRITE=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/colibri_imx6_nospl_defconfig b/configs/colibri_imx6_nospl_defconfig
index ba4b2dd9d4..320400317b 100644
--- a/configs/colibri_imx6_nospl_defconfig
+++ b/configs/colibri_imx6_nospl_defconfig
@@ -42,11 +42,11 @@ CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Toradex"
+CONFIG_USB_GADGET_VENDOR_NUM=0x1b67
+CONFIG_USB_GADGET_PRODUCT_NUM=0x4000
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Toradex"
-CONFIG_G_DNL_VENDOR_NUM=0x1b67
-CONFIG_G_DNL_PRODUCT_NUM=0x4000
 CONFIG_USB_HOST_ETHER=y
 CONFIG_FAT_WRITE=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/colibri_imx7_defconfig b/configs/colibri_imx7_defconfig
index 55b13ff279..6f0ae56464 100644
--- a/configs/colibri_imx7_defconfig
+++ b/configs/colibri_imx7_defconfig
@@ -57,10 +57,10 @@ CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Toradex"
+CONFIG_USB_GADGET_VENDOR_NUM=0x1b67
+CONFIG_USB_GADGET_PRODUCT_NUM=0x4000
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Toradex"
-CONFIG_G_DNL_VENDOR_NUM=0x1b67
-CONFIG_G_DNL_PRODUCT_NUM=0x4000
 CONFIG_OF_LIBFDT_OVERLAY=y
 CONFIG_FDT_FIXUP_PARTITIONS=y
diff --git a/configs/colibri_t20_defconfig b/configs/colibri_t20_defconfig
index 0b5604c851..786d50b458 100644
--- a/configs/colibri_t20_defconfig
+++ b/configs/colibri_t20_defconfig
@@ -47,11 +47,11 @@ CONFIG_USB_ULPI_VIEWPORT=y
 CONFIG_USB_ULPI=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Toradex"
+CONFIG_USB_GADGET_VENDOR_NUM=0x1b67
+CONFIG_USB_GADGET_PRODUCT_NUM=0x4000
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Toradex"
-CONFIG_G_DNL_VENDOR_NUM=0x1b67
-CONFIG_G_DNL_PRODUCT_NUM=0x4000
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_DM_VIDEO=y
diff --git a/configs/colibri_t30_defconfig b/configs/colibri_t30_defconfig
index 65fa90fa29..1601aa6bc6 100644
--- a/configs/colibri_t30_defconfig
+++ b/configs/colibri_t30_defconfig
@@ -34,11 +34,11 @@ CONFIG_DM_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Toradex"
+CONFIG_USB_GADGET_VENDOR_NUM=0x1b67
+CONFIG_USB_GADGET_PRODUCT_NUM=0x4000
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Toradex"
-CONFIG_G_DNL_VENDOR_NUM=0x1b67
-CONFIG_G_DNL_PRODUCT_NUM=0x4000
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/configs/colibri_vf_defconfig b/configs/colibri_vf_defconfig
index 9649ee36db..23d3ba0740 100644
--- a/configs/colibri_vf_defconfig
+++ b/configs/colibri_vf_defconfig
@@ -55,11 +55,11 @@ CONFIG_DM_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Toradex"
+CONFIG_USB_GADGET_VENDOR_NUM=0x1b67
+CONFIG_USB_GADGET_PRODUCT_NUM=0x4000
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Toradex"
-CONFIG_G_DNL_VENDOR_NUM=0x1b67
-CONFIG_G_DNL_PRODUCT_NUM=0x4000
 CONFIG_VIDEO_FSL_DCU_FB=y
 CONFIG_SYS_CONSOLE_FG_COL=0x00
 CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/configs/corvus_defconfig b/configs/corvus_defconfig
index f850d1c52d..fb3c623ebe 100644
--- a/configs/corvus_defconfig
+++ b/configs/corvus_defconfig
@@ -52,9 +52,9 @@ CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Siemens AG"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0908
+CONFIG_USB_GADGET_PRODUCT_NUM=0x02d2
 CONFIG_USB_GADGET_ATMEL_USBA=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Siemens AG"
-CONFIG_G_DNL_VENDOR_NUM=0x0908
-CONFIG_G_DNL_PRODUCT_NUM=0x02d2
 # CONFIG_EFI_LOADER is not set
diff --git a/configs/dalmore_defconfig b/configs/dalmore_defconfig
index ba3d478b1e..caf998be99 100644
--- a/configs/dalmore_defconfig
+++ b/configs/dalmore_defconfig
@@ -39,10 +39,10 @@ CONFIG_DM_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="NVIDIA"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0955
+CONFIG_USB_GADGET_PRODUCT_NUM=0x701a
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="NVIDIA"
-CONFIG_G_DNL_VENDOR_NUM=0x0955
-CONFIG_G_DNL_PRODUCT_NUM=0x701a
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
diff --git a/configs/dms-ba16-1g_defconfig b/configs/dms-ba16-1g_defconfig
new file mode 100644
index 0000000000..352ab04c8b
--- /dev/null
+++ b/configs/dms-ba16-1g_defconfig
@@ -0,0 +1,47 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
+CONFIG_TARGET_ADVANTECH_DMS_BA16=y
+CONFIG_SYS_DDR_1G=y
+CONFIG_VIDEO=y
+CONFIG_BOOTDELAY=1
+# CONFIG_CONSOLE_MUX is not set
+CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
+# CONFIG_SYS_STDIO_DEREGISTER is not set
+CONFIG_DEFAULT_FDT_FILE="imx6q-dms-ba16.dtb"
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_USB=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Advantech"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
+CONFIG_CI_UDC=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+# CONFIG_VIDEO_SW_CURSOR is not set
+CONFIG_OF_LIBFDT=y
diff --git a/configs/dms-ba16_defconfig b/configs/dms-ba16_defconfig
index 08d96add3b..8a38c8d8c4 100644
--- a/configs/dms-ba16_defconfig
+++ b/configs/dms-ba16_defconfig
@@ -37,10 +37,10 @@ CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Advantech"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Advantech"
-CONFIG_G_DNL_VENDOR_NUM=0x0525
-CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 # CONFIG_VIDEO_SW_CURSOR is not set
 CONFIG_OF_LIBFDT=y
diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig
index ae8e815bda..6da2c0c618 100644
--- a/configs/dra7xx_evm_defconfig
+++ b/configs/dra7xx_evm_defconfig
@@ -91,7 +91,7 @@ CONFIG_USB_DWC3_OMAP=y
 CONFIG_USB_DWC3_PHY_OMAP=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0451
+CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
-CONFIG_G_DNL_VENDOR_NUM=0x0451
-CONFIG_G_DNL_PRODUCT_NUM=0xd022
diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig
index 9d15726629..21fa029a3b 100644
--- a/configs/dra7xx_hs_evm_defconfig
+++ b/configs/dra7xx_hs_evm_defconfig
@@ -93,7 +93,7 @@ CONFIG_USB_DWC3_OMAP=y
 CONFIG_USB_DWC3_PHY_OMAP=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0451
+CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
-CONFIG_G_DNL_VENDOR_NUM=0x0451
-CONFIG_G_DNL_PRODUCT_NUM=0xd022
diff --git a/configs/draco_defconfig b/configs/draco_defconfig
index 1c5c2899b4..923afed749 100644
--- a/configs/draco_defconfig
+++ b/configs/draco_defconfig
@@ -67,8 +67,8 @@ CONFIG_USB_MUSB_HOST=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Siemens AG"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0908
+CONFIG_USB_GADGET_PRODUCT_NUM=0x02d2
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Siemens AG"
-CONFIG_G_DNL_VENDOR_NUM=0x0908
-CONFIG_G_DNL_PRODUCT_NUM=0x02d2
 CONFIG_USB_ETHER=y
diff --git a/configs/e2220-1170_defconfig b/configs/e2220-1170_defconfig
index 41248189e3..2670512286 100644
--- a/configs/e2220-1170_defconfig
+++ b/configs/e2220-1170_defconfig
@@ -35,8 +35,8 @@ CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="NVIDIA"
-CONFIG_G_DNL_VENDOR_NUM=0x0955
-CONFIG_G_DNL_PRODUCT_NUM=0x701a
+CONFIG_USB_GADGET_MANUFACTURER="NVIDIA"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0955
+CONFIG_USB_GADGET_PRODUCT_NUM=0x701a
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
diff --git a/configs/edison_defconfig b/configs/edison_defconfig
index d58700c204..d3b67c336f 100644
--- a/configs/edison_defconfig
+++ b/configs/edison_defconfig
@@ -33,9 +33,9 @@ CONFIG_DM_PCI_COMPAT=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Intel"
-CONFIG_G_DNL_VENDOR_NUM=0x8087
-CONFIG_G_DNL_PRODUCT_NUM=0x0a99
+CONFIG_USB_GADGET_MANUFACTURER="Intel"
+CONFIG_USB_GADGET_VENDOR_NUM=0x8087
+CONFIG_USB_GADGET_PRODUCT_NUM=0x0a99
 # CONFIG_USB_HOST_ETHER is not set
 CONFIG_FAT_WRITE=y
 CONFIG_SHA1=y
diff --git a/configs/etamin_defconfig b/configs/etamin_defconfig
index ef3aa1f64a..a7c72ec7ff 100644
--- a/configs/etamin_defconfig
+++ b/configs/etamin_defconfig
@@ -67,8 +67,8 @@ CONFIG_USB_MUSB_HOST=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Siemens AG"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0908
+CONFIG_USB_GADGET_PRODUCT_NUM=0x02d2
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Siemens AG"
-CONFIG_G_DNL_VENDOR_NUM=0x0908
-CONFIG_G_DNL_PRODUCT_NUM=0x02d2
 CONFIG_USB_ETHER=y
diff --git a/configs/evb-aarch32-rk3308_defconfig b/configs/evb-aarch32-rk3308_defconfig
index 67ce254d9b..83844d77b5 100644
--- a/configs/evb-aarch32-rk3308_defconfig
+++ b/configs/evb-aarch32-rk3308_defconfig
@@ -81,9 +81,9 @@ CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x330d
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x330d
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 7703a47fee..ee82936ac4 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -110,9 +110,9 @@ CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x330d
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x330d
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
diff --git a/configs/evb-px3se_defconfig b/configs/evb-px3se_defconfig
index f122ef935a..5932370e9c 100644
--- a/configs/evb-px3se_defconfig
+++ b/configs/evb-px3se_defconfig
@@ -52,8 +52,8 @@ CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x310c
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x310c
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_ERRNO_STR=y
diff --git a/configs/evb-rk3036_defconfig b/configs/evb-rk3036_defconfig
index 280179c3b9..c02fbebd9b 100644
--- a/configs/evb-rk3036_defconfig
+++ b/configs/evb-rk3036_defconfig
@@ -76,11 +76,11 @@ CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x310a
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x310a
 CONFIG_CMD_DHRYSTONE=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_ERRNO_STR=y
diff --git a/configs/evb-rk3066_defconfig b/configs/evb-rk3066_defconfig
index 953c8a7ebe..86b97406ac 100644
--- a/configs/evb-rk3066_defconfig
+++ b/configs/evb-rk3066_defconfig
@@ -56,9 +56,9 @@ CONFIG_USB_GADGET_DWC2_OTG_PHY=y
 CONFIG_USB_GADGET_VBUS_DRAW=500 
 CONFIG_CMD_USB_MASS_STORAGE=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x300a
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x300a
 CONFIG_BOARD_LATE_INIT=y
 CONFIG_MTD_DEVICE=y
 CONFIG_NAND_ROCKCHIP=y
diff --git a/configs/evb-rk3128_defconfig b/configs/evb-rk3128_defconfig
index d00294df78..82584200cb 100644
--- a/configs/evb-rk3128_defconfig
+++ b/configs/evb-rk3128_defconfig
@@ -49,8 +49,8 @@ CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x310c
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x310c
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_ERRNO_STR=y
diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index 43a92f340c..9fe67375b9 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -76,11 +76,11 @@ CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x18d1
+CONFIG_USB_GADGET_PRODUCT_NUM=0xd00d
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x18d1
-CONFIG_G_DNL_PRODUCT_NUM=0xd00d
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_TPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
diff --git a/configs/evb-rk3288-rk1608_defconfig b/configs/evb-rk3288-rk1608_defconfig
index 2dfa1e8c40..1bd5b4a81d 100644
--- a/configs/evb-rk3288-rk1608_defconfig
+++ b/configs/evb-rk3288-rk1608_defconfig
@@ -71,9 +71,9 @@ CONFIG_USB=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x320a
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x320a
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_VIDEO_ROCKCHIP=y
diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig
index cf61d0dabf..07cca84a6d 100644
--- a/configs/evb-rk3288_defconfig
+++ b/configs/evb-rk3288_defconfig
@@ -71,11 +71,11 @@ CONFIG_SYSRESET=y
 # CONFIG_USING_KERNEL_DTB is not set
 CONFIG_USB=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x320a
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x320a
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index 543ebe7916..947f1c06bc 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -96,9 +96,9 @@ CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x330d
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x330d
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_LZ4=y
diff --git a/configs/evb-rk3326_defconfig b/configs/evb-rk3326_defconfig
index 0dfedb1cf9..6888a0f881 100644
--- a/configs/evb-rk3326_defconfig
+++ b/configs/evb-rk3326_defconfig
@@ -101,9 +101,9 @@ CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x330d
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x330d
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index 0a5b2b87ba..9841e6f0dd 100644
--- a/configs/evb-rk3328_defconfig
+++ b/configs/evb-rk3328_defconfig
@@ -93,9 +93,9 @@ CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x330a
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x330a
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index c93a836923..90c472ec2a 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -84,9 +84,9 @@ CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x330a
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x330a
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_ETHER_ASIX88179=y
diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig
index 0266903fe5..32b073382d 100644
--- a/configs/evb-rv1108_defconfig
+++ b/configs/evb-rv1108_defconfig
@@ -94,11 +94,11 @@ CONFIG_USB_OHCI_GENERIC=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x110a
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x110a
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
diff --git a/configs/fennec-rk3288_defconfig b/configs/fennec-rk3288_defconfig
index 3158280c01..0098c0dbea 100644
--- a/configs/fennec-rk3288_defconfig
+++ b/configs/fennec-rk3288_defconfig
@@ -74,11 +74,11 @@ CONFIG_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x320a
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x320a
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig
index 1673b9f8e3..65e08b3316 100644
--- a/configs/firefly-rk3288_defconfig
+++ b/configs/firefly-rk3288_defconfig
@@ -71,11 +71,11 @@ CONFIG_USB_DWC2=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x320a
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x320a
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_ETHER_SMSC95XX=y
diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
index 05eb150a7a..17d1276b8f 100644
--- a/configs/firefly-rk3399_defconfig
+++ b/configs/firefly-rk3399_defconfig
@@ -82,9 +82,9 @@ CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x18d1
-CONFIG_G_DNL_PRODUCT_NUM=0xd00d
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x18d1
+CONFIG_USB_GADGET_PRODUCT_NUM=0xd00d
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_ETHER_ASIX88179=y
diff --git a/configs/gva-rk3229_defconfig b/configs/gva-rk3229_defconfig
index e2230b5322..5595e7eb7b 100644
--- a/configs/gva-rk3229_defconfig
+++ b/configs/gva-rk3229_defconfig
@@ -72,9 +72,9 @@ CONFIG_USB_DWC2=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x18d1
-CONFIG_G_DNL_PRODUCT_NUM=0xd00d
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x18d1
+CONFIG_USB_GADGET_PRODUCT_NUM=0xd00d
 CONFIG_SHA1=y
 CONFIG_SHA256=y
 CONFIG_ERRNO_STR=y
diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig
index f720f56a45..968bb1a9dc 100644
--- a/configs/gwventana_emmc_defconfig
+++ b/configs/gwventana_emmc_defconfig
@@ -67,11 +67,11 @@ CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Gateworks"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Gateworks"
-CONFIG_G_DNL_VENDOR_NUM=0x0525
-CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 CONFIG_USB_ETHER=y
 CONFIG_USB_ETH_CDC=y
 CONFIG_USB_HOST_ETHER=y
diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig
index 910b307fe3..a17b457e1f 100644
--- a/configs/gwventana_gw5904_defconfig
+++ b/configs/gwventana_gw5904_defconfig
@@ -71,11 +71,11 @@ CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Gateworks"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Gateworks"
-CONFIG_G_DNL_VENDOR_NUM=0x0525
-CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 CONFIG_USB_ETHER=y
 CONFIG_USB_ETH_CDC=y
 CONFIG_USB_HOST_ETHER=y
diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig
index c05f6a2439..4c976a73ce 100644
--- a/configs/gwventana_nand_defconfig
+++ b/configs/gwventana_nand_defconfig
@@ -68,11 +68,11 @@ CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Gateworks"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Gateworks"
-CONFIG_G_DNL_VENDOR_NUM=0x0525
-CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 CONFIG_USB_ETHER=y
 CONFIG_USB_ETH_CDC=y
 CONFIG_USB_HOST_ETHER=y
diff --git a/configs/jetson-tk1_defconfig b/configs/jetson-tk1_defconfig
index 1e3e4bed6a..f40f6ae56f 100644
--- a/configs/jetson-tk1_defconfig
+++ b/configs/jetson-tk1_defconfig
@@ -49,10 +49,10 @@ CONFIG_DM_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="NVIDIA"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0955
+CONFIG_USB_GADGET_PRODUCT_NUM=0x701a
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="NVIDIA"
-CONFIG_G_DNL_VENDOR_NUM=0x0955
-CONFIG_G_DNL_PRODUCT_NUM=0x701a
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
diff --git a/configs/kc1_defconfig b/configs/kc1_defconfig
index d9c2efcf7c..d27a7f5abb 100644
--- a/configs/kc1_defconfig
+++ b/configs/kc1_defconfig
@@ -42,8 +42,8 @@ CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0451
+CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
-CONFIG_G_DNL_VENDOR_NUM=0x0451
-CONFIG_G_DNL_PRODUCT_NUM=0xd022
 CONFIG_OF_LIBFDT=y
diff --git a/configs/kylin-rk3036_defconfig b/configs/kylin-rk3036_defconfig
index d74add4fab..0f58d2a209 100644
--- a/configs/kylin-rk3036_defconfig
+++ b/configs/kylin-rk3036_defconfig
@@ -71,11 +71,11 @@ CONFIG_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x310a
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x310a
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_ETHER_SMSC95XX=y
diff --git a/configs/ma5d4evk_defconfig b/configs/ma5d4evk_defconfig
index 0655505a13..43ab704163 100644
--- a/configs/ma5d4evk_defconfig
+++ b/configs/ma5d4evk_defconfig
@@ -47,11 +47,11 @@ CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="AriesEmbedded"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_USB_GADGET_ATMEL_USBA=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="AriesEmbedded"
-CONFIG_G_DNL_VENDOR_NUM=0x0525
-CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 CONFIG_USB_ETHER=y
 CONFIG_FAT_WRITE=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig
index 7d918982ef..ec760d0544 100644
--- a/configs/miqi-rk3288_defconfig
+++ b/configs/miqi-rk3288_defconfig
@@ -71,11 +71,11 @@ CONFIG_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x320a
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x320a
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_ETHER_SMSC95XX=y
diff --git a/configs/mk808_defconfig b/configs/mk808_defconfig
index 4dfe5dda5c..c3bb8df49a 100644
--- a/configs/mk808_defconfig
+++ b/configs/mk808_defconfig
@@ -55,9 +55,9 @@ CONFIG_USB_GADGET_DWC2_OTG_PHY=y
 CONFIG_USB_GADGET_VBUS_DRAW=500 
 CONFIG_CMD_USB_MASS_STORAGE=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x300a
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x300a
 CONFIG_BOARD_LATE_INIT=y
 CONFIG_MTD_DEVICE=y
 CONFIG_NAND_ROCKCHIP=y
diff --git a/configs/mx6qsabrelite_defconfig b/configs/mx6qsabrelite_defconfig
index f716c8fd7f..92e0a578df 100644
--- a/configs/mx6qsabrelite_defconfig
+++ b/configs/mx6qsabrelite_defconfig
@@ -49,11 +49,11 @@ CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Boundary"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Boundary"
-CONFIG_G_DNL_VENDOR_NUM=0x0525
-CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 CONFIG_USB_ETHER=y
 CONFIG_USB_ETH_CDC=y
 # CONFIG_VIDEO_SW_CURSOR is not set
diff --git a/configs/mx6sabreauto_defconfig b/configs/mx6sabreauto_defconfig
index fd236ea0a4..9fe24692a1 100644
--- a/configs/mx6sabreauto_defconfig
+++ b/configs/mx6sabreauto_defconfig
@@ -49,11 +49,11 @@ CONFIG_PHYLIB=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="FSL"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="FSL"
-CONFIG_G_DNL_VENDOR_NUM=0x0525
-CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 # CONFIG_VIDEO_SW_CURSOR is not set
diff --git a/configs/mx6sabresd_defconfig b/configs/mx6sabresd_defconfig
index 0e49e69c8c..d511fc98b9 100644
--- a/configs/mx6sabresd_defconfig
+++ b/configs/mx6sabresd_defconfig
@@ -48,11 +48,11 @@ CONFIG_PCI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="FSL"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="FSL"
-CONFIG_G_DNL_VENDOR_NUM=0x0525
-CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 # CONFIG_VIDEO_SW_CURSOR is not set
diff --git a/configs/mx7dsabresd_defconfig b/configs/mx7dsabresd_defconfig
index 690aa69e63..c6e56d5809 100644
--- a/configs/mx7dsabresd_defconfig
+++ b/configs/mx7dsabresd_defconfig
@@ -65,11 +65,11 @@ CONFIG_USB_EHCI_HCD=y
 CONFIG_MXC_USB_OTG_HACTIVE=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="FSL"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="FSL"
-CONFIG_G_DNL_VENDOR_NUM=0x0525
-CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_ERRNO_STR=y
diff --git a/configs/mx7dsabresd_secure_defconfig b/configs/mx7dsabresd_secure_defconfig
index 89e3fae2d5..7cb8ffdcbd 100644
--- a/configs/mx7dsabresd_secure_defconfig
+++ b/configs/mx7dsabresd_secure_defconfig
@@ -67,11 +67,11 @@ CONFIG_USB_EHCI_HCD=y
 CONFIG_MXC_USB_OTG_HACTIVE=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="FSL"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="FSL"
-CONFIG_G_DNL_VENDOR_NUM=0x0525
-CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_ERRNO_STR=y
diff --git a/configs/nitrogen6dl2g_defconfig b/configs/nitrogen6dl2g_defconfig
index fd4a465581..a5fdb48d24 100644
--- a/configs/nitrogen6dl2g_defconfig
+++ b/configs/nitrogen6dl2g_defconfig
@@ -46,11 +46,11 @@ CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Boundary"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Boundary"
-CONFIG_G_DNL_VENDOR_NUM=0x0525
-CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 CONFIG_USB_ETHER=y
 CONFIG_USB_ETH_CDC=y
 # CONFIG_VIDEO_SW_CURSOR is not set
diff --git a/configs/nitrogen6dl_defconfig b/configs/nitrogen6dl_defconfig
index 30046e3f3a..1803bdba88 100644
--- a/configs/nitrogen6dl_defconfig
+++ b/configs/nitrogen6dl_defconfig
@@ -46,11 +46,11 @@ CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Boundary"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Boundary"
-CONFIG_G_DNL_VENDOR_NUM=0x0525
-CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 CONFIG_USB_ETHER=y
 CONFIG_USB_ETH_CDC=y
 # CONFIG_VIDEO_SW_CURSOR is not set
diff --git a/configs/nitrogen6q2g_defconfig b/configs/nitrogen6q2g_defconfig
index f9160c208f..3c9b44023f 100644
--- a/configs/nitrogen6q2g_defconfig
+++ b/configs/nitrogen6q2g_defconfig
@@ -47,11 +47,11 @@ CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Boundary"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Boundary"
-CONFIG_G_DNL_VENDOR_NUM=0x0525
-CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 CONFIG_USB_ETHER=y
 CONFIG_USB_ETH_CDC=y
 # CONFIG_VIDEO_SW_CURSOR is not set
diff --git a/configs/nitrogen6q_defconfig b/configs/nitrogen6q_defconfig
index 8bca0e0443..82b05febae 100644
--- a/configs/nitrogen6q_defconfig
+++ b/configs/nitrogen6q_defconfig
@@ -47,11 +47,11 @@ CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Boundary"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Boundary"
-CONFIG_G_DNL_VENDOR_NUM=0x0525
-CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 CONFIG_USB_ETHER=y
 CONFIG_USB_ETH_CDC=y
 # CONFIG_VIDEO_SW_CURSOR is not set
diff --git a/configs/nitrogen6s1g_defconfig b/configs/nitrogen6s1g_defconfig
index 668fbaa370..3e4c20357c 100644
--- a/configs/nitrogen6s1g_defconfig
+++ b/configs/nitrogen6s1g_defconfig
@@ -46,11 +46,11 @@ CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Boundary"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Boundary"
-CONFIG_G_DNL_VENDOR_NUM=0x0525
-CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 CONFIG_USB_ETHER=y
 CONFIG_USB_ETH_CDC=y
 # CONFIG_VIDEO_SW_CURSOR is not set
diff --git a/configs/nitrogen6s_defconfig b/configs/nitrogen6s_defconfig
index 99106c9a1f..107cbfc9bc 100644
--- a/configs/nitrogen6s_defconfig
+++ b/configs/nitrogen6s_defconfig
@@ -46,11 +46,11 @@ CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Boundary"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Boundary"
-CONFIG_G_DNL_VENDOR_NUM=0x0525
-CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 CONFIG_USB_ETHER=y
 CONFIG_USB_ETH_CDC=y
 # CONFIG_VIDEO_SW_CURSOR is not set
diff --git a/configs/nyan-big_defconfig b/configs/nyan-big_defconfig
index 29d918d974..ba9d8f545c 100644
--- a/configs/nyan-big_defconfig
+++ b/configs/nyan-big_defconfig
@@ -65,11 +65,11 @@ CONFIG_DM_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="NVIDIA"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0955
+CONFIG_USB_GADGET_PRODUCT_NUM=0x701a
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="NVIDIA"
-CONFIG_G_DNL_VENDOR_NUM=0x0955
-CONFIG_G_DNL_PRODUCT_NUM=0x701a
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_DM_VIDEO=y
diff --git a/configs/odroid-xu3_defconfig b/configs/odroid-xu3_defconfig
index a5e47c84f2..ab7f8bde9d 100644
--- a/configs/odroid-xu3_defconfig
+++ b/configs/odroid-xu3_defconfig
@@ -43,10 +43,10 @@ CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_DWC3_PHY_SAMSUNG=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Samsung"
+CONFIG_USB_GADGET_VENDOR_NUM=0x04e8
+CONFIG_USB_GADGET_PRODUCT_NUM=0x6601
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Samsung"
-CONFIG_G_DNL_VENDOR_NUM=0x04e8
-CONFIG_G_DNL_PRODUCT_NUM=0x6601
 CONFIG_USB_HOST_ETHER=y
 CONFIG_VIDEO_BRIDGE=y
 CONFIG_ERRNO_STR=y
diff --git a/configs/odroid_defconfig b/configs/odroid_defconfig
index 0dc1a250c5..ddac08cb98 100644
--- a/configs/odroid_defconfig
+++ b/configs/odroid_defconfig
@@ -56,11 +56,11 @@ CONFIG_DM_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Samsung"
+CONFIG_USB_GADGET_VENDOR_NUM=0x04e8
+CONFIG_USB_GADGET_PRODUCT_NUM=0x6601
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Samsung"
-CONFIG_G_DNL_VENDOR_NUM=0x04e8
-CONFIG_G_DNL_PRODUCT_NUM=0x6601
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_SMSC95XX=y
 CONFIG_ERRNO_STR=y
diff --git a/configs/omap3_beagle_defconfig b/configs/omap3_beagle_defconfig
index 32324c8933..73bc40ac94 100644
--- a/configs/omap3_beagle_defconfig
+++ b/configs/omap3_beagle_defconfig
@@ -51,10 +51,10 @@ CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="TI"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0451
+CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="TI"
-CONFIG_G_DNL_VENDOR_NUM=0x0451
-CONFIG_G_DNL_PRODUCT_NUM=0xd022
 CONFIG_USB_ETHER=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
diff --git a/configs/omap3_evm_defconfig b/configs/omap3_evm_defconfig
index c157054acd..b4500ea2f2 100644
--- a/configs/omap3_evm_defconfig
+++ b/configs/omap3_evm_defconfig
@@ -55,10 +55,10 @@ CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0451
+CONFIG_USB_GADGET_PRODUCT_NUM=0x5678
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
-CONFIG_G_DNL_VENDOR_NUM=0x0451
-CONFIG_G_DNL_PRODUCT_NUM=0x5678
 CONFIG_USB_ETHER=y
 CONFIG_FAT_WRITE=y
 CONFIG_BCH=y
diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconfig
index 3478c802ed..acba15d9d9 100644
--- a/configs/omap3_logic_defconfig
+++ b/configs/omap3_logic_defconfig
@@ -47,9 +47,9 @@ CONFIG_OMAP3_SPI=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="TI"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0451
+CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="TI"
-CONFIG_G_DNL_VENDOR_NUM=0x0451
-CONFIG_G_DNL_PRODUCT_NUM=0xd022
 CONFIG_USB_ETHER=y
 CONFIG_BCH=y
diff --git a/configs/omap5_uevm_defconfig b/configs/omap5_uevm_defconfig
index c4009600c5..b18aba366a 100644
--- a/configs/omap5_uevm_defconfig
+++ b/configs/omap5_uevm_defconfig
@@ -50,10 +50,10 @@ CONFIG_USB_DWC3_OMAP=y
 CONFIG_USB_DWC3_PHY_OMAP=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0403
+CONFIG_USB_GADGET_PRODUCT_NUM=0xbd00
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
-CONFIG_G_DNL_VENDOR_NUM=0x0403
-CONFIG_G_DNL_PRODUCT_NUM=0xbd00
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_SMSC95XX=y
 CONFIG_FAT_WRITE=y
diff --git a/configs/opos6uldev_defconfig b/configs/opos6uldev_defconfig
index a880c62eb6..0c2319272a 100644
--- a/configs/opos6uldev_defconfig
+++ b/configs/opos6uldev_defconfig
@@ -79,10 +79,10 @@ CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Armadeus Systems"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Armadeus Systems"
-CONFIG_G_DNL_VENDOR_NUM=0x0525
-CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 CONFIG_OF_LIBFDT_OVERLAY=y
 # CONFIG_EFI_LOADER is not set
diff --git a/configs/origen_defconfig b/configs/origen_defconfig
index 298e7a4943..013eec185a 100644
--- a/configs/origen_defconfig
+++ b/configs/origen_defconfig
@@ -41,8 +41,8 @@ CONFIG_MMC_SDHCI_S5P=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Samsung"
+CONFIG_USB_GADGET_VENDOR_NUM=0x04e8
+CONFIG_USB_GADGET_PRODUCT_NUM=0x6601
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Samsung"
-CONFIG_G_DNL_VENDOR_NUM=0x04e8
-CONFIG_G_DNL_PRODUCT_NUM=0x6601
diff --git a/configs/p2371-0000_defconfig b/configs/p2371-0000_defconfig
index e499b82d34..e186526550 100644
--- a/configs/p2371-0000_defconfig
+++ b/configs/p2371-0000_defconfig
@@ -36,8 +36,8 @@ CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="NVIDIA"
-CONFIG_G_DNL_VENDOR_NUM=0x0955
-CONFIG_G_DNL_PRODUCT_NUM=0x701a
+CONFIG_USB_GADGET_MANUFACTURER="NVIDIA"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0955
+CONFIG_USB_GADGET_PRODUCT_NUM=0x701a
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig
index 3330d23e40..6713564763 100644
--- a/configs/p2371-2180_defconfig
+++ b/configs/p2371-2180_defconfig
@@ -43,8 +43,8 @@ CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="NVIDIA"
-CONFIG_G_DNL_VENDOR_NUM=0x0955
-CONFIG_G_DNL_PRODUCT_NUM=0x701a
+CONFIG_USB_GADGET_MANUFACTURER="NVIDIA"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0955
+CONFIG_USB_GADGET_PRODUCT_NUM=0x701a
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
diff --git a/configs/p2571_defconfig b/configs/p2571_defconfig
index 9259c1316e..ae896bdde6 100644
--- a/configs/p2571_defconfig
+++ b/configs/p2571_defconfig
@@ -36,8 +36,8 @@ CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="NVIDIA"
-CONFIG_G_DNL_VENDOR_NUM=0x0955
-CONFIG_G_DNL_PRODUCT_NUM=0x701a
+CONFIG_USB_GADGET_MANUFACTURER="NVIDIA"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0955
+CONFIG_USB_GADGET_PRODUCT_NUM=0x701a
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
diff --git a/configs/parrot_r16_defconfig b/configs/parrot_r16_defconfig
index 53825eba33..4b70fc5687 100644
--- a/configs/parrot_r16_defconfig
+++ b/configs/parrot_r16_defconfig
@@ -24,7 +24,7 @@ CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Allwinner Technology"
+CONFIG_USB_GADGET_VENDOR_NUM=0x1f3a
+CONFIG_USB_GADGET_PRODUCT_NUM=0x1010
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Allwinner Technology"
-CONFIG_G_DNL_VENDOR_NUM=0x1f3a
-CONFIG_G_DNL_PRODUCT_NUM=0x1010
diff --git a/configs/phycore-rk3288_defconfig b/configs/phycore-rk3288_defconfig
index 40bf1fc069..b2bdaa16ca 100644
--- a/configs/phycore-rk3288_defconfig
+++ b/configs/phycore-rk3288_defconfig
@@ -70,11 +70,11 @@ CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x320a
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x320a
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_ETHER_SMSC95XX=y
diff --git a/configs/pico-imx6ul_defconfig b/configs/pico-imx6ul_defconfig
index abafc65f57..c213493b12 100644
--- a/configs/pico-imx6ul_defconfig
+++ b/configs/pico-imx6ul_defconfig
@@ -32,9 +32,9 @@ CONFIG_PHY_MICREL=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="FSL"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="FSL"
-CONFIG_G_DNL_VENDOR_NUM=0x0525
-CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 CONFIG_OF_LIBFDT=y
diff --git a/configs/pico-imx7d_defconfig b/configs/pico-imx7d_defconfig
index 114c397d2e..d34e6cecbb 100644
--- a/configs/pico-imx7d_defconfig
+++ b/configs/pico-imx7d_defconfig
@@ -28,9 +28,9 @@ CONFIG_USB_EHCI_HCD=y
 CONFIG_MXC_USB_OTG_HACTIVE=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="FSL"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="FSL"
-CONFIG_G_DNL_VENDOR_NUM=0x0525
-CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 CONFIG_OF_LIBFDT=y
diff --git a/configs/popmetal-rk3288_defconfig b/configs/popmetal-rk3288_defconfig
index c818c43197..8030ccd36f 100644
--- a/configs/popmetal-rk3288_defconfig
+++ b/configs/popmetal-rk3288_defconfig
@@ -68,11 +68,11 @@ CONFIG_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x320a
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x320a
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_ETHER_SMSC95XX=y
diff --git a/configs/px30_defconfig b/configs/px30_defconfig
index aa618cedae..0f0cd2adfa 100644
--- a/configs/px30_defconfig
+++ b/configs/px30_defconfig
@@ -114,9 +114,9 @@ CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x330d
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x330d
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
diff --git a/configs/pxm2_defconfig b/configs/pxm2_defconfig
index d5ad7d01fd..32f7f9ff52 100644
--- a/configs/pxm2_defconfig
+++ b/configs/pxm2_defconfig
@@ -71,10 +71,10 @@ CONFIG_USB_MUSB_HOST=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Siemens AG"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0908
+CONFIG_USB_GADGET_PRODUCT_NUM=0x02d2
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Siemens AG"
-CONFIG_G_DNL_VENDOR_NUM=0x0908
-CONFIG_G_DNL_PRODUCT_NUM=0x02d2
 CONFIG_USB_ETHER=y
 CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00"
 # CONFIG_VIDEO_SW_CURSOR is not set
diff --git a/configs/rastaban_defconfig b/configs/rastaban_defconfig
index 7215fadd7e..b7153655c5 100644
--- a/configs/rastaban_defconfig
+++ b/configs/rastaban_defconfig
@@ -67,9 +67,9 @@ CONFIG_USB_MUSB_HOST=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Siemens AG"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0908
+CONFIG_USB_GADGET_PRODUCT_NUM=0x02d2
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Siemens AG"
-CONFIG_G_DNL_VENDOR_NUM=0x0908
-CONFIG_G_DNL_PRODUCT_NUM=0x02d2
 CONFIG_USB_ETHER=y
 CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00"
diff --git a/configs/rk1806_defconfig b/configs/rk1806_defconfig
index fd6d4fe645..5bda9781f7 100644
--- a/configs/rk1806_defconfig
+++ b/configs/rk1806_defconfig
@@ -110,9 +110,9 @@ CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x330d
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x330d
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
diff --git a/configs/rk1808_defconfig b/configs/rk1808_defconfig
index 3550ec2e83..3b7b988b22 100644
--- a/configs/rk1808_defconfig
+++ b/configs/rk1808_defconfig
@@ -111,9 +111,9 @@ CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x330d
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x330d
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
diff --git a/configs/rk3036_defconfig b/configs/rk3036_defconfig
index 8dccaac096..b72797e310 100644
--- a/configs/rk3036_defconfig
+++ b/configs/rk3036_defconfig
@@ -91,9 +91,9 @@ CONFIG_USB=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x310a
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x310a
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_CMD_DHRYSTONE=y
 CONFIG_ERRNO_STR=y
diff --git a/configs/rk3126_defconfig b/configs/rk3126_defconfig
index 3099cdeb11..4793fc76c1 100644
--- a/configs/rk3126_defconfig
+++ b/configs/rk3126_defconfig
@@ -83,9 +83,9 @@ CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x310c
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x310c
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_VIDEO_ROCKCHIP=y
diff --git a/configs/rk3128x_defconfig b/configs/rk3128x_defconfig
index 9b3da6a3a9..15c47c6387 100644
--- a/configs/rk3128x_defconfig
+++ b/configs/rk3128x_defconfig
@@ -112,9 +112,9 @@ CONFIG_USB_DWC2=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x18d1
-CONFIG_G_DNL_PRODUCT_NUM=0xd00d
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x18d1
+CONFIG_USB_GADGET_PRODUCT_NUM=0xd00d
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
diff --git a/configs/rk322x_defconfig b/configs/rk322x_defconfig
index 3dc30b7f25..a2ead85db6 100644
--- a/configs/rk322x_defconfig
+++ b/configs/rk322x_defconfig
@@ -107,9 +107,9 @@ CONFIG_USB_DWC2=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x18d1
-CONFIG_G_DNL_PRODUCT_NUM=0xd00d
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x18d1
+CONFIG_USB_GADGET_PRODUCT_NUM=0xd00d
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
diff --git a/configs/rk3288_defconfig b/configs/rk3288_defconfig
index 355d6f5389..e003189e9e 100644
--- a/configs/rk3288_defconfig
+++ b/configs/rk3288_defconfig
@@ -94,9 +94,9 @@ CONFIG_USB=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x320a
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x320a
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
diff --git a/configs/rk3308-aarch32_defconfig b/configs/rk3308-aarch32_defconfig
index e9633aa1a1..d7ba62746d 100644
--- a/configs/rk3308-aarch32_defconfig
+++ b/configs/rk3308-aarch32_defconfig
@@ -92,9 +92,9 @@ CONFIG_USB=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x330d
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x330d
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_LZ4=y
diff --git a/configs/rk3308_defconfig b/configs/rk3308_defconfig
index 962d137b88..542a3d4d17 100644
--- a/configs/rk3308_defconfig
+++ b/configs/rk3308_defconfig
@@ -110,9 +110,9 @@ CONFIG_USB=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x330d
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x330d
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_LZ4=y
diff --git a/configs/rk3326-aarch32_defconfig b/configs/rk3326-aarch32_defconfig
index dc6760a2e6..1c9ddfbee4 100644
--- a/configs/rk3326-aarch32_defconfig
+++ b/configs/rk3326-aarch32_defconfig
@@ -90,9 +90,9 @@ CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x330d
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x330d
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
diff --git a/configs/rk3326_defconfig b/configs/rk3326_defconfig
index b9c59f871c..544f3420ec 100644
--- a/configs/rk3326_defconfig
+++ b/configs/rk3326_defconfig
@@ -108,9 +108,9 @@ CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x330d
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x330d
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index e170d77e47..0dfed5bd57 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -116,9 +116,9 @@ CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x330a
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x330a
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
diff --git a/configs/rk3368_defconfig b/configs/rk3368_defconfig
index 51a2cf6888..17c9bec3c8 100644
--- a/configs/rk3368_defconfig
+++ b/configs/rk3368_defconfig
@@ -89,9 +89,9 @@ CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x330a
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x330a
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
index 1a201bc913..5eed0b6d06 100755
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -112,9 +112,9 @@ CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x330a
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x330a
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
diff --git a/configs/rk3399pro_defconfig b/configs/rk3399pro_defconfig
index 876e4b9e38..bd4bedca43 100644
--- a/configs/rk3399pro_defconfig
+++ b/configs/rk3399pro_defconfig
@@ -115,9 +115,9 @@ CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x330a
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x330a
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_ETHER_ASIX88179=y
diff --git a/configs/rock2_defconfig b/configs/rock2_defconfig
index 8e542d6ca0..741d617329 100644
--- a/configs/rock2_defconfig
+++ b/configs/rock2_defconfig
@@ -66,11 +66,11 @@ CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x320a
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x320a
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_VIDEO_ROCKCHIP=y
diff --git a/configs/rut_defconfig b/configs/rut_defconfig
index a4c5866f4c..39b41f5118 100644
--- a/configs/rut_defconfig
+++ b/configs/rut_defconfig
@@ -72,10 +72,10 @@ CONFIG_USB_MUSB_HOST=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Siemens AG"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0908
+CONFIG_USB_GADGET_PRODUCT_NUM=0x02d2
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Siemens AG"
-CONFIG_G_DNL_VENDOR_NUM=0x0908
-CONFIG_G_DNL_PRODUCT_NUM=0x02d2
 CONFIG_USB_ETHER=y
 # CONFIG_VIDEO_SW_CURSOR is not set
 CONFIG_SYS_CONSOLE_BG_COL=0xff
diff --git a/configs/s5p_goni_defconfig b/configs/s5p_goni_defconfig
index 7d8792cb05..eb6c2d70c0 100644
--- a/configs/s5p_goni_defconfig
+++ b/configs/s5p_goni_defconfig
@@ -35,9 +35,9 @@ CONFIG_DM_PMIC=y
 CONFIG_DM_PMIC_MAX8998=y
 CONFIG_USB=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Samsung"
+CONFIG_USB_GADGET_VENDOR_NUM=0x04e8
+CONFIG_USB_GADGET_PRODUCT_NUM=0x6601
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Samsung"
-CONFIG_G_DNL_VENDOR_NUM=0x04e8
-CONFIG_G_DNL_PRODUCT_NUM=0x6601
 CONFIG_FAT_WRITE=y
diff --git a/configs/s5pc210_universal_defconfig b/configs/s5pc210_universal_defconfig
index 2dcf2cfe0c..149fd3394b 100644
--- a/configs/s5pc210_universal_defconfig
+++ b/configs/s5pc210_universal_defconfig
@@ -48,8 +48,8 @@ CONFIG_DM_PMIC_MAX8998=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Samsung"
+CONFIG_USB_GADGET_VENDOR_NUM=0x04e8
+CONFIG_USB_GADGET_PRODUCT_NUM=0x6601
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Samsung"
-CONFIG_G_DNL_VENDOR_NUM=0x04e8
-CONFIG_G_DNL_PRODUCT_NUM=0x6601
diff --git a/configs/smartweb_defconfig b/configs/smartweb_defconfig
index c1d4fe302d..89f1cd6990 100644
--- a/configs/smartweb_defconfig
+++ b/configs/smartweb_defconfig
@@ -49,10 +49,10 @@ CONFIG_PHYLIB=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Siemens AG"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0908
+CONFIG_USB_GADGET_PRODUCT_NUM=0x02d2
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Siemens AG"
-CONFIG_G_DNL_VENDOR_NUM=0x0908
-CONFIG_G_DNL_PRODUCT_NUM=0x02d2
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_ETHER_MCS7830=y
diff --git a/configs/sniper_defconfig b/configs/sniper_defconfig
index f24153b56f..75371c47ce 100644
--- a/configs/sniper_defconfig
+++ b/configs/sniper_defconfig
@@ -43,8 +43,8 @@ CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0451
+CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
-CONFIG_G_DNL_VENDOR_NUM=0x0451
-CONFIG_G_DNL_PRODUCT_NUM=0xd022
 CONFIG_OF_LIBFDT=y
diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig
index 0336a414a4..1a4c277e81 100644
--- a/configs/socfpga_arria5_defconfig
+++ b/configs/socfpga_arria5_defconfig
@@ -66,9 +66,9 @@ CONFIG_DM_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="altera"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="altera"
-CONFIG_G_DNL_VENDOR_NUM=0x0525
-CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 CONFIG_USE_TINY_PRINTF=y
diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig
index 2ad76ccc36..b41a9ee9a7 100644
--- a/configs/socfpga_cyclone5_defconfig
+++ b/configs/socfpga_cyclone5_defconfig
@@ -66,9 +66,9 @@ CONFIG_DM_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="altera"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="altera"
-CONFIG_G_DNL_VENDOR_NUM=0x0525
-CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 CONFIG_USE_TINY_PRINTF=y
diff --git a/configs/socfpga_de0_nano_soc_defconfig b/configs/socfpga_de0_nano_soc_defconfig
index 7dea99a7b3..01c865c790 100644
--- a/configs/socfpga_de0_nano_soc_defconfig
+++ b/configs/socfpga_de0_nano_soc_defconfig
@@ -60,9 +60,9 @@ CONFIG_DM_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="terasic"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="terasic"
-CONFIG_G_DNL_VENDOR_NUM=0x0525
-CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 CONFIG_USE_TINY_PRINTF=y
diff --git a/configs/socfpga_de10_nano_defconfig b/configs/socfpga_de10_nano_defconfig
index 163d3ce96f..d6b5241538 100644
--- a/configs/socfpga_de10_nano_defconfig
+++ b/configs/socfpga_de10_nano_defconfig
@@ -59,9 +59,9 @@ CONFIG_DM_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="terasic"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="terasic"
-CONFIG_G_DNL_VENDOR_NUM=0x0525
-CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 CONFIG_USE_TINY_PRINTF=y
diff --git a/configs/socfpga_mcvevk_defconfig b/configs/socfpga_mcvevk_defconfig
index 7b84f060ba..00abd957c5 100644
--- a/configs/socfpga_mcvevk_defconfig
+++ b/configs/socfpga_mcvevk_defconfig
@@ -59,9 +59,9 @@ CONFIG_DM_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="denx"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="denx"
-CONFIG_G_DNL_VENDOR_NUM=0x0525
-CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 CONFIG_USE_TINY_PRINTF=y
diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig
index 6969c16ba4..a093a611ca 100644
--- a/configs/socfpga_sockit_defconfig
+++ b/configs/socfpga_sockit_defconfig
@@ -66,9 +66,9 @@ CONFIG_DM_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="terasic"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="terasic"
-CONFIG_G_DNL_VENDOR_NUM=0x0525
-CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 CONFIG_USE_TINY_PRINTF=y
diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig
index c1246aa126..406303e48f 100644
--- a/configs/socfpga_socrates_defconfig
+++ b/configs/socfpga_socrates_defconfig
@@ -66,9 +66,9 @@ CONFIG_DM_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="ebv"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="ebv"
-CONFIG_G_DNL_VENDOR_NUM=0x0525
-CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 CONFIG_USE_TINY_PRINTF=y
diff --git a/configs/socfpga_vining_fpga_defconfig b/configs/socfpga_vining_fpga_defconfig
index 93947b027c..b889bbd07f 100644
--- a/configs/socfpga_vining_fpga_defconfig
+++ b/configs/socfpga_vining_fpga_defconfig
@@ -83,9 +83,9 @@ CONFIG_DM_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="samtec"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="samtec"
-CONFIG_G_DNL_VENDOR_NUM=0x0525
-CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 CONFIG_USE_TINY_PRINTF=y
diff --git a/configs/stih410-b2260_defconfig b/configs/stih410-b2260_defconfig
index 10e1a2d06d..c188d64b97 100644
--- a/configs/stih410-b2260_defconfig
+++ b/configs/stih410-b2260_defconfig
@@ -25,4 +25,21 @@ CONFIG_PINCTRL=y
 CONFIG_STI_ASC_SERIAL=y
 CONFIG_SYSRESET=y
 CONFIG_TIMER=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_USB_GADGET_MANUFACTURER="STMicroelectronics"
+CONFIG_USB_GADGET_VENDOR_NUM=0x483
+CONFIG_USB_GADGET_PRODUCT_NUM=0x7270
+CONFIG_OF_LIBFDT_OVERLAY=y
 CONFIG_SPL_OF_LIBFDT=y
diff --git a/configs/taurus_defconfig b/configs/taurus_defconfig
index 1a90f0514e..b869e3a7d1 100644
--- a/configs/taurus_defconfig
+++ b/configs/taurus_defconfig
@@ -56,8 +56,8 @@ CONFIG_PHYLIB=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Siemens AG"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0908
+CONFIG_USB_GADGET_PRODUCT_NUM=0x02d2
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Siemens AG"
-CONFIG_G_DNL_VENDOR_NUM=0x0908
-CONFIG_G_DNL_PRODUCT_NUM=0x02d2
 CONFIG_USE_TINY_PRINTF=y
diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig
index 20814ccea3..81225e865a 100644
--- a/configs/tbs2910_defconfig
+++ b/configs/tbs2910_defconfig
@@ -45,10 +45,10 @@ CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="TBS"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="TBS"
-CONFIG_G_DNL_VENDOR_NUM=0x0525
-CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 CONFIG_CFB_CONSOLE_ANSI=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/thuban_defconfig b/configs/thuban_defconfig
index fc1ddd6718..282dd3be2c 100644
--- a/configs/thuban_defconfig
+++ b/configs/thuban_defconfig
@@ -67,8 +67,8 @@ CONFIG_USB_MUSB_HOST=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Siemens AG"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0908
+CONFIG_USB_GADGET_PRODUCT_NUM=0x02d2
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Siemens AG"
-CONFIG_G_DNL_VENDOR_NUM=0x0908
-CONFIG_G_DNL_PRODUCT_NUM=0x02d2
 CONFIG_USB_ETHER=y
diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig
index 9af919d15e..9b08ea01dc 100644
--- a/configs/tinker-rk3288_defconfig
+++ b/configs/tinker-rk3288_defconfig
@@ -70,11 +70,11 @@ CONFIG_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x320a
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x320a
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_ETHER_SMSC95XX=y
diff --git a/configs/topic_miami_defconfig b/configs/topic_miami_defconfig
index 1080554cba..a8028b6b18 100644
--- a/configs/topic_miami_defconfig
+++ b/configs/topic_miami_defconfig
@@ -46,8 +46,8 @@ CONFIG_USB_ULPI_VIEWPORT=y
 CONFIG_USB_ULPI=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Xilinx"
+CONFIG_USB_GADGET_VENDOR_NUM=0x03fd
+CONFIG_USB_GADGET_PRODUCT_NUM=0x0300
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Xilinx"
-CONFIG_G_DNL_VENDOR_NUM=0x03fd
-CONFIG_G_DNL_PRODUCT_NUM=0x0300
diff --git a/configs/topic_miamilite_defconfig b/configs/topic_miamilite_defconfig
index 1450fbc61a..568eb66d51 100644
--- a/configs/topic_miamilite_defconfig
+++ b/configs/topic_miamilite_defconfig
@@ -47,8 +47,8 @@ CONFIG_USB_ULPI_VIEWPORT=y
 CONFIG_USB_ULPI=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Xilinx"
+CONFIG_USB_GADGET_VENDOR_NUM=0x03fd
+CONFIG_USB_GADGET_PRODUCT_NUM=0x0300
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Xilinx"
-CONFIG_G_DNL_VENDOR_NUM=0x03fd
-CONFIG_G_DNL_PRODUCT_NUM=0x0300
diff --git a/configs/topic_miamiplus_defconfig b/configs/topic_miamiplus_defconfig
index d3fc7ad63f..94fa96221c 100644
--- a/configs/topic_miamiplus_defconfig
+++ b/configs/topic_miamiplus_defconfig
@@ -46,8 +46,8 @@ CONFIG_USB_ULPI_VIEWPORT=y
 CONFIG_USB_ULPI=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Xilinx"
+CONFIG_USB_GADGET_VENDOR_NUM=0x03fd
+CONFIG_USB_GADGET_PRODUCT_NUM=0x0300
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Xilinx"
-CONFIG_G_DNL_VENDOR_NUM=0x03fd
-CONFIG_G_DNL_PRODUCT_NUM=0x0300
diff --git a/configs/trats2_defconfig b/configs/trats2_defconfig
index bcc73d4fa2..a4cd8c875c 100644
--- a/configs/trats2_defconfig
+++ b/configs/trats2_defconfig
@@ -50,8 +50,8 @@ CONFIG_DM_PMIC_MAX77686=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Samsung"
+CONFIG_USB_GADGET_VENDOR_NUM=0x04e8
+CONFIG_USB_GADGET_PRODUCT_NUM=0x6601
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Samsung"
-CONFIG_G_DNL_VENDOR_NUM=0x04e8
-CONFIG_G_DNL_PRODUCT_NUM=0x6601
diff --git a/configs/trats_defconfig b/configs/trats_defconfig
index 3f0c59baad..5c567f660d 100644
--- a/configs/trats_defconfig
+++ b/configs/trats_defconfig
@@ -49,8 +49,8 @@ CONFIG_PMIC_MAX8997=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Samsung"
+CONFIG_USB_GADGET_VENDOR_NUM=0x04e8
+CONFIG_USB_GADGET_PRODUCT_NUM=0x6601
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Samsung"
-CONFIG_G_DNL_VENDOR_NUM=0x04e8
-CONFIG_G_DNL_PRODUCT_NUM=0x6601
diff --git a/configs/venice2_defconfig b/configs/venice2_defconfig
index f90936e744..5820897ae5 100644
--- a/configs/venice2_defconfig
+++ b/configs/venice2_defconfig
@@ -38,10 +38,10 @@ CONFIG_DM_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="NVIDIA"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0955
+CONFIG_USB_GADGET_PRODUCT_NUM=0x701a
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="NVIDIA"
-CONFIG_G_DNL_VENDOR_NUM=0x0955
-CONFIG_G_DNL_PRODUCT_NUM=0x701a
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
diff --git a/configs/warp7_defconfig b/configs/warp7_defconfig
index 32cf7a4da4..c91090cac0 100644
--- a/configs/warp7_defconfig
+++ b/configs/warp7_defconfig
@@ -33,11 +33,11 @@ CONFIG_USB_EHCI_HCD=y
 CONFIG_MXC_USB_OTG_HACTIVE=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="FSL"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="FSL"
-CONFIG_G_DNL_VENDOR_NUM=0x0525
-CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 CONFIG_USB_ETHER=y
 CONFIG_USB_ETH_CDC=y
 CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00"
diff --git a/configs/warp7_secure_defconfig b/configs/warp7_secure_defconfig
index 99764dbd0b..5a2b39493a 100644
--- a/configs/warp7_secure_defconfig
+++ b/configs/warp7_secure_defconfig
@@ -31,11 +31,11 @@ CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_MXC_USB_OTG_HACTIVE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="FSL"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="FSL"
-CONFIG_G_DNL_VENDOR_NUM=0x0525
-CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 CONFIG_USB_ETHER=y
 CONFIG_USB_ETH_CDC=y
 CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00"
diff --git a/configs/warp_defconfig b/configs/warp_defconfig
index 8e58790269..3432a786ba 100644
--- a/configs/warp_defconfig
+++ b/configs/warp_defconfig
@@ -30,9 +30,9 @@ CONFIG_DFU_MMC=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="FSL"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="FSL"
-CONFIG_G_DNL_VENDOR_NUM=0x0525
-CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 CONFIG_OF_LIBFDT=y
diff --git a/configs/xilinx_zynqmp_ep_defconfig b/configs/xilinx_zynqmp_ep_defconfig
index c3ba5bf632..03f529e6f4 100644
--- a/configs/xilinx_zynqmp_ep_defconfig
+++ b/configs/xilinx_zynqmp_ep_defconfig
@@ -85,8 +85,8 @@ CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Xilinx"
-CONFIG_G_DNL_VENDOR_NUM=0x03fd
-CONFIG_G_DNL_PRODUCT_NUM=0x0300
+CONFIG_USB_GADGET_MANUFACTURER="Xilinx"
+CONFIG_USB_GADGET_VENDOR_NUM=0x03fd
+CONFIG_USB_GADGET_PRODUCT_NUM=0x0300
 # CONFIG_REGEX is not set
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
diff --git a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig
index 588b15430b..92ac41a6f2 100644
--- a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig
+++ b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig
@@ -77,7 +77,7 @@ CONFIG_USB_ULPI=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Xilinx"
-CONFIG_G_DNL_VENDOR_NUM=0x03FD
-CONFIG_G_DNL_PRODUCT_NUM=0x0300
+CONFIG_USB_GADGET_MANUFACTURER="Xilinx"
+CONFIG_USB_GADGET_VENDOR_NUM=0x03FD
+CONFIG_USB_GADGET_PRODUCT_NUM=0x0300
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
diff --git a/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig b/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig
index 166d253a05..fcfe0e998f 100644
--- a/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig
+++ b/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig
@@ -76,7 +76,7 @@ CONFIG_USB_ULPI=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Xilinx"
-CONFIG_G_DNL_VENDOR_NUM=0x03FD
-CONFIG_G_DNL_PRODUCT_NUM=0x0300
+CONFIG_USB_GADGET_MANUFACTURER="Xilinx"
+CONFIG_USB_GADGET_VENDOR_NUM=0x03FD
+CONFIG_USB_GADGET_PRODUCT_NUM=0x0300
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
diff --git a/configs/xilinx_zynqmp_zcu102_revA_defconfig b/configs/xilinx_zynqmp_zcu102_revA_defconfig
index ee0beda47a..670206800e 100644
--- a/configs/xilinx_zynqmp_zcu102_revA_defconfig
+++ b/configs/xilinx_zynqmp_zcu102_revA_defconfig
@@ -80,7 +80,7 @@ CONFIG_USB_ULPI=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Xilinx"
-CONFIG_G_DNL_VENDOR_NUM=0x03FD
-CONFIG_G_DNL_PRODUCT_NUM=0x0300
+CONFIG_USB_GADGET_MANUFACTURER="Xilinx"
+CONFIG_USB_GADGET_VENDOR_NUM=0x03FD
+CONFIG_USB_GADGET_PRODUCT_NUM=0x0300
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
diff --git a/configs/xilinx_zynqmp_zcu102_revB_defconfig b/configs/xilinx_zynqmp_zcu102_revB_defconfig
index e47e4bf6e5..d878c18476 100644
--- a/configs/xilinx_zynqmp_zcu102_revB_defconfig
+++ b/configs/xilinx_zynqmp_zcu102_revB_defconfig
@@ -80,7 +80,7 @@ CONFIG_USB_ULPI=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Xilinx"
-CONFIG_G_DNL_VENDOR_NUM=0x03FD
-CONFIG_G_DNL_PRODUCT_NUM=0x0300
+CONFIG_USB_GADGET_MANUFACTURER="Xilinx"
+CONFIG_USB_GADGET_VENDOR_NUM=0x03FD
+CONFIG_USB_GADGET_PRODUCT_NUM=0x0300
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
diff --git a/configs/zynq_microzed_defconfig b/configs/zynq_microzed_defconfig
index ae248f51bc..cb867010e2 100644
--- a/configs/zynq_microzed_defconfig
+++ b/configs/zynq_microzed_defconfig
@@ -53,8 +53,8 @@ CONFIG_USB_ULPI_VIEWPORT=y
 CONFIG_USB_ULPI=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Xilinx"
+CONFIG_USB_GADGET_VENDOR_NUM=0x03FD
+CONFIG_USB_GADGET_PRODUCT_NUM=0x0300
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Xilinx"
-CONFIG_G_DNL_VENDOR_NUM=0x03FD
-CONFIG_G_DNL_PRODUCT_NUM=0x0300
diff --git a/configs/zynq_picozed_defconfig b/configs/zynq_picozed_defconfig
index 0afdd1147a..39d76ba965 100644
--- a/configs/zynq_picozed_defconfig
+++ b/configs/zynq_picozed_defconfig
@@ -42,8 +42,8 @@ CONFIG_USB_ULPI_VIEWPORT=y
 CONFIG_USB_ULPI=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Xilinx"
+CONFIG_USB_GADGET_VENDOR_NUM=0x03fd
+CONFIG_USB_GADGET_PRODUCT_NUM=0x0300
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Xilinx"
-CONFIG_G_DNL_VENDOR_NUM=0x03fd
-CONFIG_G_DNL_PRODUCT_NUM=0x0300
diff --git a/configs/zynq_z_turn_defconfig b/configs/zynq_z_turn_defconfig
index 3684b8531f..d21a8faa0f 100644
--- a/configs/zynq_z_turn_defconfig
+++ b/configs/zynq_z_turn_defconfig
@@ -52,8 +52,8 @@ CONFIG_USB_ULPI_VIEWPORT=y
 CONFIG_USB_ULPI=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Xilinx"
+CONFIG_USB_GADGET_VENDOR_NUM=0x03FD
+CONFIG_USB_GADGET_PRODUCT_NUM=0x0300
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Xilinx"
-CONFIG_G_DNL_VENDOR_NUM=0x03FD
-CONFIG_G_DNL_PRODUCT_NUM=0x0300
diff --git a/configs/zynq_zc702_defconfig b/configs/zynq_zc702_defconfig
index eb78c5b5ec..8f1cc39f4f 100644
--- a/configs/zynq_zc702_defconfig
+++ b/configs/zynq_zc702_defconfig
@@ -62,8 +62,8 @@ CONFIG_USB_ULPI_VIEWPORT=y
 CONFIG_USB_ULPI=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Xilinx"
+CONFIG_USB_GADGET_VENDOR_NUM=0x03fd
+CONFIG_USB_GADGET_PRODUCT_NUM=0x0300
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Xilinx"
-CONFIG_G_DNL_VENDOR_NUM=0x03fd
-CONFIG_G_DNL_PRODUCT_NUM=0x0300
diff --git a/configs/zynq_zc706_defconfig b/configs/zynq_zc706_defconfig
index a7c18c381e..e213bb4356 100644
--- a/configs/zynq_zc706_defconfig
+++ b/configs/zynq_zc706_defconfig
@@ -58,8 +58,8 @@ CONFIG_USB_ULPI_VIEWPORT=y
 CONFIG_USB_ULPI=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Xilinx"
+CONFIG_USB_GADGET_VENDOR_NUM=0x03fd
+CONFIG_USB_GADGET_PRODUCT_NUM=0x0300
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Xilinx"
-CONFIG_G_DNL_VENDOR_NUM=0x03fd
-CONFIG_G_DNL_PRODUCT_NUM=0x0300
diff --git a/configs/zynq_zed_defconfig b/configs/zynq_zed_defconfig
index bb512aff09..3a18c4aeb3 100644
--- a/configs/zynq_zed_defconfig
+++ b/configs/zynq_zed_defconfig
@@ -53,8 +53,8 @@ CONFIG_USB_ULPI_VIEWPORT=y
 CONFIG_USB_ULPI=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Xilinx"
+CONFIG_USB_GADGET_VENDOR_NUM=0x03fd
+CONFIG_USB_GADGET_PRODUCT_NUM=0x0300
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Xilinx"
-CONFIG_G_DNL_VENDOR_NUM=0x03fd
-CONFIG_G_DNL_PRODUCT_NUM=0x0300
diff --git a/configs/zynq_zybo_defconfig b/configs/zynq_zybo_defconfig
index fd31b4dc14..9edde2ace3 100644
--- a/configs/zynq_zybo_defconfig
+++ b/configs/zynq_zybo_defconfig
@@ -58,8 +58,8 @@ CONFIG_USB_ULPI_VIEWPORT=y
 CONFIG_USB_ULPI=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Xilinx"
+CONFIG_USB_GADGET_VENDOR_NUM=0x03fd
+CONFIG_USB_GADGET_PRODUCT_NUM=0x0300
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Xilinx"
-CONFIG_G_DNL_VENDOR_NUM=0x03fd
-CONFIG_G_DNL_PRODUCT_NUM=0x0300
diff --git a/doc/README.android-fastboot b/doc/README.android-fastboot
index b8afa15762..2c3ee7810a 100644
--- a/doc/README.android-fastboot
+++ b/doc/README.android-fastboot
@@ -34,11 +34,11 @@ The fastboot gadget relies on the USB download gadget, so the following
 options must be configured:
 
 CONFIG_USB_GADGET_DOWNLOAD
-CONFIG_G_DNL_VENDOR_NUM
-CONFIG_G_DNL_PRODUCT_NUM
-CONFIG_G_DNL_MANUFACTURER
+CONFIG_USB_GADGET_VENDOR_NUM
+CONFIG_USB_GADGET_PRODUCT_NUM
+CONFIG_USB_GADGET_MANUFACTURER
 
-NOTE: The CONFIG_G_DNL_VENDOR_NUM must be one of the numbers supported by
+NOTE: The CONFIG_USB_GADGET_VENDOR_NUM must be one of the numbers supported by
 the fastboot client. The list of vendor IDs supported can be found in the
 fastboot client source code (fastboot.c) mentioned above.
 
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index 7a1ee74a55..dfeeb5725a 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -36,6 +36,27 @@ menuconfig USB_GADGET
 
 if USB_GADGET
 
+config USB_GADGET_MANUFACTURER
+	string "Vendor name of the USB device"
+	default "U-Boot"
+	help
+	  Vendor name of the USB device emulated, reported to the host device.
+	  This is usually either the manufacturer of the device or the SoC.
+
+config USB_GADGET_VENDOR_NUM
+	hex "Vendor ID of the USB device"
+	default 0x0
+	help
+	  Vendor ID of the USB device emulated, reported to the host device.
+	  This is usually the board or SoC vendor's, unless you've registered
+	  for one.
+
+config USB_GADGET_PRODUCT_NUM
+	hex "Product ID of the USB device"
+	default 0x0
+	help
+	  Product ID of the USB device emulated, reported to the host device.
+
 config USB_GADGET_ATMEL_USBA
 	bool "Atmel USBA"
 	select USB_GADGET_DUALSPEED
@@ -110,15 +131,6 @@ config USB_FUNCTION_SDP
 	  allows to download images into memory and execute (jump to) them
 	  using the same protocol as implemented by the i.MX family's boot ROM.
 
-config G_DNL_MANUFACTURER
-	string "Vendor name of USB device"
-
-config G_DNL_VENDOR_NUM
-	hex "Vendor ID of USB device"
-
-config G_DNL_PRODUCT_NUM
-	hex "Product ID of USB device"
-
 endif # USB_GADGET_DOWNLOAD
 
 config USB_ETHER
diff --git a/drivers/usb/gadget/g_dnl.c b/drivers/usb/gadget/g_dnl.c
index 2f238efe4c..400b016049 100644
--- a/drivers/usb/gadget/g_dnl.c
+++ b/drivers/usb/gadget/g_dnl.c
@@ -26,9 +26,9 @@
 
 /*
  * One needs to define the following:
- * CONFIG_G_DNL_VENDOR_NUM
- * CONFIG_G_DNL_PRODUCT_NUM
- * CONFIG_G_DNL_MANUFACTURER
+ * CONFIG_USB_GADGET_VENDOR_NUM
+ * CONFIG_USB_GADGET_PRODUCT_NUM
+ * CONFIG_USB_GADGET_MANUFACTURER
  * at e.g. ./configs/<board>_defconfig
  */
 
@@ -46,7 +46,7 @@
 
 static const char product[] = "USB download gadget";
 static char g_dnl_serial[MAX_STRING_SERIAL];
-static const char manufacturer[] = CONFIG_G_DNL_MANUFACTURER;
+static const char manufacturer[] = CONFIG_USB_GADGET_MANUFACTURER;
 
 void g_dnl_set_serialnumber(char *s)
 {
@@ -63,8 +63,8 @@ static struct usb_device_descriptor device_desc = {
 	.bDeviceClass = USB_CLASS_PER_INTERFACE,
 	.bDeviceSubClass = 0, /*0x02:CDC-modem , 0x00:CDC-serial*/
 
-	.idVendor = __constant_cpu_to_le16(CONFIG_G_DNL_VENDOR_NUM),
-	.idProduct = __constant_cpu_to_le16(CONFIG_G_DNL_PRODUCT_NUM),
+	.idVendor = __constant_cpu_to_le16(CONFIG_USB_GADGET_VENDOR_NUM),
+	.idProduct = __constant_cpu_to_le16(CONFIG_USB_GADGET_PRODUCT_NUM),
 	/* .iProduct = DYNAMIC */
 	/* .iSerialNumber = DYNAMIC */
 	.bNumConfigurations = 1,
diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h
index 4ae10bd8ba..9d29bf0152 100644
--- a/include/configs/am43xx_evm.h
+++ b/include/configs/am43xx_evm.h
@@ -89,9 +89,9 @@
 
 #undef CONFIG_USB_GADGET_DOWNLOAD
 #undef CONFIG_USB_GADGET_VBUS_DRAW
-#undef CONFIG_G_DNL_MANUFACTURER
-#undef CONFIG_G_DNL_VENDOR_NUM
-#undef CONFIG_G_DNL_PRODUCT_NUM
+#undef CONFIG_USB_GADGET_MANUFACTURER
+#undef CONFIG_USB_GADGET_VENDOR_NUM
+#undef CONFIG_USB_GADGET_PRODUCT_NUM
 #undef CONFIG_USB_GADGET_DUALSPEED
 #endif
 
diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h
index 8bc7fbde9e..13a45010bf 100644
--- a/include/configs/odroid_xu3.h
+++ b/include/configs/odroid_xu3.h
@@ -45,7 +45,7 @@
 #define DFU_MANIFEST_POLL_TIMEOUT       25000
 
 /* THOR */
-#define CONFIG_G_DNL_THOR_VENDOR_NUM	CONFIG_G_DNL_VENDOR_NUM
+#define CONFIG_G_DNL_THOR_VENDOR_NUM	CONFIG_USB_GADGET_VENDOR_NUM
 #define CONFIG_G_DNL_THOR_PRODUCT_NUM	0x685D
 #define CONFIG_USB_FUNCTION_THOR
 

commit f9cd3a64709c011fcb4aa40d74d1a6adaca2710b
Author: Fabio Estevam <fabio.estevam@nxp.com>
Date:   Tue Sep 5 20:46:39 2017 -0300

    UPSTREAM: toradex: imx6: Move g_dnl_bind_fixup() into common SPL code
    
    Instead of having every board file to add its own g_dnl_bind_fixup()
    implementation, move it to the common imx6 SPL code.
    
    Change-Id: Id8ee1026cbd8cde4b0711829373f99ba58a6363b
    Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
    Reviewed-by: Łukasz Majewski <lukma@denx.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 511db3bf5a27a2f7eca0f60b6adb1eff74bd6df6)

diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c
index 258578ac25..15b04d6c79 100644
--- a/arch/arm/mach-imx/spl.c
+++ b/arch/arm/mach-imx/spl.c
@@ -14,6 +14,7 @@
 #include <asm/spl.h>
 #include <spl.h>
 #include <asm/mach-imx/hab.h>
+#include <g_dnl.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -82,6 +83,15 @@ u32 spl_boot_device(void)
 	}
 	return BOOT_DEVICE_NONE;
 }
+
+#ifdef CONFIG_SPL_USB_GADGET_SUPPORT
+int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
+{
+	put_unaligned(CONFIG_G_DNL_PRODUCT_NUM + 0xfff, &dev->idProduct);
+
+	return 0;
+}
+#endif
 #endif
 
 #if defined(CONFIG_SPL_MMC_SUPPORT)
diff --git a/board/toradex/apalis_imx6/apalis_imx6.c b/board/toradex/apalis_imx6/apalis_imx6.c
index b246c27dfe..2f5a32a2ff 100644
--- a/board/toradex/apalis_imx6/apalis_imx6.c
+++ b/board/toradex/apalis_imx6/apalis_imx6.c
@@ -29,7 +29,6 @@
 #include <dm/platform_data/serial_mxc.h>
 #include <dm/platdata.h>
 #include <fsl_esdhc.h>
-#include <g_dnl.h>
 #include <i2c.h>
 #include <imx_thermal.h>
 #include <linux/errno.h>
@@ -1224,18 +1223,6 @@ void reset_cpu(ulong addr)
 {
 }
 
-#ifdef CONFIG_SPL_USB_GADGET_SUPPORT
-int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
-{
-	unsigned short usb_pid;
-
-	usb_pid = TORADEX_USB_PRODUCT_NUM_OFFSET + 0xfff;
-	put_unaligned(usb_pid, &dev->idProduct);
-
-	return 0;
-}
-#endif
-
 #endif
 
 static struct mxc_serial_platdata mxc_serial_plat = {
diff --git a/board/toradex/colibri_imx6/colibri_imx6.c b/board/toradex/colibri_imx6/colibri_imx6.c
index 1a1f021e89..6888d62df6 100644
--- a/board/toradex/colibri_imx6/colibri_imx6.c
+++ b/board/toradex/colibri_imx6/colibri_imx6.c
@@ -28,7 +28,6 @@
 #include <dm/platform_data/serial_mxc.h>
 #include <dm/platdata.h>
 #include <fsl_esdhc.h>
-#include <g_dnl.h>
 #include <i2c.h>
 #include <imx_thermal.h>
 #include <linux/errno.h>
@@ -1108,18 +1107,6 @@ void reset_cpu(ulong addr)
 {
 }
 
-#ifdef CONFIG_SPL_USB_GADGET_SUPPORT
-int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
-{
-	unsigned short usb_pid;
-
-	usb_pid = TORADEX_USB_PRODUCT_NUM_OFFSET + 0xfff;
-	put_unaligned(usb_pid, &dev->idProduct);
-
-	return 0;
-}
-#endif
-
 #endif
 
 static struct mxc_serial_platdata mxc_serial_plat = {

commit 68e15c2b9235fc9262ad229c27b08944b15f21da
Author: Maxime Ripard <maxime.ripard@free-electrons.com>
Date:   Thu Sep 7 08:46:14 2017 +0200

    UPSTREAM: usb: gadget: usb_ether: Move the interfaces to Kconfig
    
    We need to select an interface for the usb_ether gadget, and they haven't
    been converted to Kconfig yet. Add a choice to make sure we have an option
    selected, and convert all the users.
    
    Change-Id: Idd2f234e7538672e2002d14eb2b11893f2751a66
    Reviewed-by: Łukasz Majewski <lukma@denx.de>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit d2f0f4af4b655de9c63976be659288c88ae23953)

diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig
index 78781da4ab..f720f56a45 100644
--- a/configs/gwventana_emmc_defconfig
+++ b/configs/gwventana_emmc_defconfig
@@ -73,6 +73,7 @@ CONFIG_G_DNL_MANUFACTURER="Gateworks"
 CONFIG_G_DNL_VENDOR_NUM=0x0525
 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 CONFIG_USB_ETHER=y
+CONFIG_USB_ETH_CDC=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_ETHER_SMSC95XX=y
diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig
index c35b5e7f08..910b307fe3 100644
--- a/configs/gwventana_gw5904_defconfig
+++ b/configs/gwventana_gw5904_defconfig
@@ -77,6 +77,7 @@ CONFIG_G_DNL_MANUFACTURER="Gateworks"
 CONFIG_G_DNL_VENDOR_NUM=0x0525
 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 CONFIG_USB_ETHER=y
+CONFIG_USB_ETH_CDC=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_ETHER_SMSC95XX=y
diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig
index bf45e23c86..c05f6a2439 100644
--- a/configs/gwventana_nand_defconfig
+++ b/configs/gwventana_nand_defconfig
@@ -74,6 +74,7 @@ CONFIG_G_DNL_MANUFACTURER="Gateworks"
 CONFIG_G_DNL_VENDOR_NUM=0x0525
 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 CONFIG_USB_ETHER=y
+CONFIG_USB_ETH_CDC=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_ETHER_SMSC95XX=y
diff --git a/configs/mx6qsabrelite_defconfig b/configs/mx6qsabrelite_defconfig
index bab0d0c79f..f716c8fd7f 100644
--- a/configs/mx6qsabrelite_defconfig
+++ b/configs/mx6qsabrelite_defconfig
@@ -55,5 +55,6 @@ CONFIG_G_DNL_MANUFACTURER="Boundary"
 CONFIG_G_DNL_VENDOR_NUM=0x0525
 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 CONFIG_USB_ETHER=y
+CONFIG_USB_ETH_CDC=y
 # CONFIG_VIDEO_SW_CURSOR is not set
 CONFIG_OF_LIBFDT=y
diff --git a/configs/nitrogen6dl2g_defconfig b/configs/nitrogen6dl2g_defconfig
index 0d19b85a30..fd4a465581 100644
--- a/configs/nitrogen6dl2g_defconfig
+++ b/configs/nitrogen6dl2g_defconfig
@@ -52,5 +52,6 @@ CONFIG_G_DNL_MANUFACTURER="Boundary"
 CONFIG_G_DNL_VENDOR_NUM=0x0525
 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 CONFIG_USB_ETHER=y
+CONFIG_USB_ETH_CDC=y
 # CONFIG_VIDEO_SW_CURSOR is not set
 CONFIG_OF_LIBFDT=y
diff --git a/configs/nitrogen6dl_defconfig b/configs/nitrogen6dl_defconfig
index a20580eb77..30046e3f3a 100644
--- a/configs/nitrogen6dl_defconfig
+++ b/configs/nitrogen6dl_defconfig
@@ -52,5 +52,6 @@ CONFIG_G_DNL_MANUFACTURER="Boundary"
 CONFIG_G_DNL_VENDOR_NUM=0x0525
 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 CONFIG_USB_ETHER=y
+CONFIG_USB_ETH_CDC=y
 # CONFIG_VIDEO_SW_CURSOR is not set
 CONFIG_OF_LIBFDT=y
diff --git a/configs/nitrogen6q2g_defconfig b/configs/nitrogen6q2g_defconfig
index 940c74a5ec..f9160c208f 100644
--- a/configs/nitrogen6q2g_defconfig
+++ b/configs/nitrogen6q2g_defconfig
@@ -53,5 +53,6 @@ CONFIG_G_DNL_MANUFACTURER="Boundary"
 CONFIG_G_DNL_VENDOR_NUM=0x0525
 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 CONFIG_USB_ETHER=y
+CONFIG_USB_ETH_CDC=y
 # CONFIG_VIDEO_SW_CURSOR is not set
 CONFIG_OF_LIBFDT=y
diff --git a/configs/nitrogen6q_defconfig b/configs/nitrogen6q_defconfig
index 83772cb2ef..8bca0e0443 100644
--- a/configs/nitrogen6q_defconfig
+++ b/configs/nitrogen6q_defconfig
@@ -53,5 +53,6 @@ CONFIG_G_DNL_MANUFACTURER="Boundary"
 CONFIG_G_DNL_VENDOR_NUM=0x0525
 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 CONFIG_USB_ETHER=y
+CONFIG_USB_ETH_CDC=y
 # CONFIG_VIDEO_SW_CURSOR is not set
 CONFIG_OF_LIBFDT=y
diff --git a/configs/nitrogen6s1g_defconfig b/configs/nitrogen6s1g_defconfig
index 862b41a3f8..668fbaa370 100644
--- a/configs/nitrogen6s1g_defconfig
+++ b/configs/nitrogen6s1g_defconfig
@@ -52,5 +52,6 @@ CONFIG_G_DNL_MANUFACTURER="Boundary"
 CONFIG_G_DNL_VENDOR_NUM=0x0525
 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 CONFIG_USB_ETHER=y
+CONFIG_USB_ETH_CDC=y
 # CONFIG_VIDEO_SW_CURSOR is not set
 CONFIG_OF_LIBFDT=y
diff --git a/configs/nitrogen6s_defconfig b/configs/nitrogen6s_defconfig
index e5376313b9..99106c9a1f 100644
--- a/configs/nitrogen6s_defconfig
+++ b/configs/nitrogen6s_defconfig
@@ -52,5 +52,6 @@ CONFIG_G_DNL_MANUFACTURER="Boundary"
 CONFIG_G_DNL_VENDOR_NUM=0x0525
 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 CONFIG_USB_ETHER=y
+CONFIG_USB_ETH_CDC=y
 # CONFIG_VIDEO_SW_CURSOR is not set
 CONFIG_OF_LIBFDT=y
diff --git a/configs/novena_defconfig b/configs/novena_defconfig
index 786ab2854f..a7056ff137 100644
--- a/configs/novena_defconfig
+++ b/configs/novena_defconfig
@@ -49,6 +49,7 @@ CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y
 CONFIG_USB_GADGET=y
 CONFIG_CI_UDC=y
 CONFIG_USB_ETHER=y
+CONFIG_USB_ETH_CDC=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_ETHER_SMSC95XX=y
diff --git a/configs/sansa_fuze_plus_defconfig b/configs/sansa_fuze_plus_defconfig
index c6d50ccb8e..b5443dda98 100644
--- a/configs/sansa_fuze_plus_defconfig
+++ b/configs/sansa_fuze_plus_defconfig
@@ -33,4 +33,5 @@ CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_GADGET=y
 CONFIG_CI_UDC=y
 CONFIG_USB_ETHER=y
+CONFIG_USB_ETH_CDC=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/warp7_defconfig b/configs/warp7_defconfig
index 8a3717facd..32cf7a4da4 100644
--- a/configs/warp7_defconfig
+++ b/configs/warp7_defconfig
@@ -39,5 +39,6 @@ CONFIG_G_DNL_MANUFACTURER="FSL"
 CONFIG_G_DNL_VENDOR_NUM=0x0525
 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 CONFIG_USB_ETHER=y
+CONFIG_USB_ETH_CDC=y
 CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00"
 CONFIG_OF_LIBFDT=y
diff --git a/configs/warp7_secure_defconfig b/configs/warp7_secure_defconfig
index 83a06079fd..99764dbd0b 100644
--- a/configs/warp7_secure_defconfig
+++ b/configs/warp7_secure_defconfig
@@ -37,5 +37,6 @@ CONFIG_G_DNL_MANUFACTURER="FSL"
 CONFIG_G_DNL_VENDOR_NUM=0x0525
 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 CONFIG_USB_ETHER=y
+CONFIG_USB_ETH_CDC=y
 CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00"
 CONFIG_OF_LIBFDT=y
diff --git a/configs/xfi3_defconfig b/configs/xfi3_defconfig
index 6cc7845282..91768a4a71 100644
--- a/configs/xfi3_defconfig
+++ b/configs/xfi3_defconfig
@@ -32,4 +32,5 @@ CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_GADGET=y
 CONFIG_CI_UDC=y
 CONFIG_USB_ETHER=y
+CONFIG_USB_ETH_CDC=y
 CONFIG_OF_LIBFDT=y
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index 6558d2458b..7a1ee74a55 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -133,6 +133,34 @@ config USB_ETHER
 
 if USB_ETHER
 
+choice
+	prompt "USB Ethernet Gadget Model"
+	default USB_ETH_RNDIS
+	help
+	  There is several models (protocols) to implement Ethernet over USB
+	  devices. The main ones are Microsoft's RNDIS and USB's CDC-Ethernet
+	  (also called CDC-ECM). RNDIS is obviously compatible with Windows,
+	  while CDC-ECM is not. Most other operating systems support both, so
+	  if inter-operability is a concern, RNDIS is to be preferred.
+
+config USB_ETH_CDC
+	bool "CDC-ECM Protocol"
+	help
+	  CDC (Communications Device Class) is the standard for Ethernet over
+	  USB devices. While there's several alternatives, the most widely used
+	  protocol is ECM (Ethernet Control Model). However, compatibility with
+	  Windows is not that great.
+
+config USB_ETH_RNDIS
+	bool "RNDIS Protocol"
+	help
+	  The RNDIS (Remote Network Driver Interface Specification) is a
+	  Microsoft proprietary protocol to create an Ethernet device over USB.
+	  Windows obviously supports it, as well as all the major operating
+	  systems, so it's the best option for compatibility.
+
+endchoice
+
 config USBNET_DEVADDR
 	string "USB Gadget Ethernet device mac address"
 	default "de:ad:be:ef:00:01"
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index 28009e82c8..0e08264858 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -257,10 +257,6 @@
 #define CONFIG_AM335X_USB1
 #define CONFIG_AM335X_USB1_MODE MUSB_HOST
 
-#ifdef CONFIG_USB_MUSB_GADGET
-#define CONFIG_USB_ETH_RNDIS
-#endif /* CONFIG_USB_MUSB_GADGET */
-
 /*
  * Disable MMC DM for SPL build and can be re-enabled after adding
  * DM support in SPL
diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h
index 1696bf709b..5b62a9d59f 100644
--- a/include/configs/am3517_evm.h
+++ b/include/configs/am3517_evm.h
@@ -79,10 +79,6 @@
 
 #endif /* CONFIG_USB_MUSB_HOST */
 
-#ifdef CONFIG_USB_MUSB_GADGET
-#define CONFIG_USB_ETH_RNDIS
-#endif /* CONFIG_USB_MUSB_GADGET */
-
 #endif /* CONFIG_USB_MUSB_AM35X */
 
 /* I2C */
diff --git a/include/configs/baltos.h b/include/configs/baltos.h
index 16e86fd447..567b1c998b 100644
--- a/include/configs/baltos.h
+++ b/include/configs/baltos.h
@@ -278,10 +278,6 @@
 #define CONFIG_AM335X_USB1
 #define CONFIG_AM335X_USB1_MODE MUSB_OTG
 
-#ifdef CONFIG_USB_MUSB_GADGET
-#define CONFIG_USB_ETH_RNDIS
-#endif /* CONFIG_USB_MUSB_GADGET */
-
 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_USBETH_SUPPORT)
 /* disable host part of MUSB in SPL */
 /* disable EFI partitions and partition UUID support */
diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index c462fb1e64..8af89aab94 100644
--- a/include/configs/gw_ventana.h
+++ b/include/configs/gw_ventana.h
@@ -142,7 +142,6 @@
 #define CONFIG_MXC_USB_PORTSC     (PORT_PTS_UTMI | PORT_PTS_PTW)
 #define CONFIG_MXC_USB_FLAGS      0
 #define CONFIG_USBD_HS
-#define CONFIG_USB_ETH_CDC
 #define CONFIG_NETCONSOLE
 
 /* USB Mass Storage Gadget */
diff --git a/include/configs/ma5d4evk.h b/include/configs/ma5d4evk.h
index 2ad4952f5e..6d25d84c6e 100644
--- a/include/configs/ma5d4evk.h
+++ b/include/configs/ma5d4evk.h
@@ -97,7 +97,6 @@
 #ifdef CONFIG_CMD_USB
 
 /* USB device */
-#define CONFIG_USB_ETH_RNDIS
 #define CONFIG_USBNET_MANUFACTURER      "AriesEmbedded"
 #define CONFIG_USB_FUNCTION_MASS_STORAGE
 #define CONFIG_SYS_DFU_DATA_BUF_SIZE	(1 * 1024 * 1024)
diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h
index ca37f584f0..6068b70d2d 100644
--- a/include/configs/nitrogen6x.h
+++ b/include/configs/nitrogen6x.h
@@ -19,7 +19,6 @@
 
 #define CONFIG_MISC_INIT_R
 #define CONFIG_USBD_HS
-#define CONFIG_USB_ETH_CDC
 #define CONFIG_NETCONSOLE
 
 #define CONFIG_MXC_UART
diff --git a/include/configs/novena.h b/include/configs/novena.h
index 9068ee2182..4825d5bac1 100644
--- a/include/configs/novena.h
+++ b/include/configs/novena.h
@@ -129,7 +129,6 @@
 #define CONFIG_MXC_USB_FLAGS		0
 /* Gadget part */
 #define CONFIG_USBD_HS
-#define CONFIG_USB_ETH_CDC
 #define CONFIG_NETCONSOLE
 #endif
 
diff --git a/include/configs/pcm051.h b/include/configs/pcm051.h
index 309bbd6bd3..79f3f48df8 100644
--- a/include/configs/pcm051.h
+++ b/include/configs/pcm051.h
@@ -133,10 +133,6 @@
 #define CONFIG_AM335X_USB1
 #define CONFIG_AM335X_USB1_MODE MUSB_HOST
 
-#ifdef CONFIG_USB_MUSB_GADGET
-#define CONFIG_USB_ETH_RNDIS
-#endif /* CONFIG_USB_MUSB_GADGET */
-
 #define CONFIG_PHY_SMSC
 
 #endif	/* ! __CONFIG_PCM051_H */
diff --git a/include/configs/sama5d2_ptc.h b/include/configs/sama5d2_ptc.h
index a1a0602cdd..543592e3a5 100644
--- a/include/configs/sama5d2_ptc.h
+++ b/include/configs/sama5d2_ptc.h
@@ -60,7 +60,6 @@
 #endif
 
 /* USB device */
-#define CONFIG_USB_ETH_RNDIS
 #define CONFIG_USBNET_MANUFACTURER      "Atmel SAMA5D2_PTC"
 
 /* Ethernet Hardware */
diff --git a/include/configs/sansa_fuze_plus.h b/include/configs/sansa_fuze_plus.h
index 9e33ca4227..99200140fe 100644
--- a/include/configs/sansa_fuze_plus.h
+++ b/include/configs/sansa_fuze_plus.h
@@ -39,7 +39,6 @@
 #define CONFIG_EHCI_MXS_PORT0
 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
 
-#define CONFIG_USB_ETH_CDC
 #define CONFIG_NETCONSOLE
 #endif
 
diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h
index e86f5a2584..99d590873e 100644
--- a/include/configs/siemens-am33x-common.h
+++ b/include/configs/siemens-am33x-common.h
@@ -175,10 +175,6 @@
 #define CONFIG_AM335X_USB1
 #define CONFIG_AM335X_USB1_MODE MUSB_HOST
 
-#ifdef CONFIG_USB_MUSB_GADGET
-#define CONFIG_USB_ETH_RNDIS
-#endif /* CONFIG_USB_MUSB_GADGET */
-
 /* USB DRACO ID as default */
 #define CONFIG_USBD_HS
 
diff --git a/include/configs/vinco.h b/include/configs/vinco.h
index 524af87b47..e2449ef6f4 100644
--- a/include/configs/vinco.h
+++ b/include/configs/vinco.h
@@ -63,7 +63,6 @@
 #endif
 
 /* USB device */
-#define CONFIG_USB_ETH_RNDIS
 #define CONFIG_USBNET_MANUFACTURER      "L+G VInCo"
 
 /* Ethernet Hardware */
diff --git a/include/configs/warp7.h b/include/configs/warp7.h
index 05ae3542a9..11f1bc3eab 100644
--- a/include/configs/warp7.h
+++ b/include/configs/warp7.h
@@ -136,8 +136,6 @@
 #define CONFIG_SYS_DFU_DATA_BUF_SIZE	SZ_16M
 #define DFU_DEFAULT_POLL_TIMEOUT	300
 
-#define CONFIG_USB_ETH_CDC
-#define CONFIG_USB_ETH_RNDIS
 #define CONFIG_USBNET_DEV_ADDR		"de:ad:be:af:00:01"
 
 #endif
diff --git a/include/configs/xfi3.h b/include/configs/xfi3.h
index 7bbfd75c0c..1e70a762e0 100644
--- a/include/configs/xfi3.h
+++ b/include/configs/xfi3.h
@@ -39,7 +39,6 @@
 #define CONFIG_EHCI_MXS_PORT0
 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
 
-#define CONFIG_USB_ETH_CDC
 #define CONFIG_NETCONSOLE
 #endif
 
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index d5a3a305f9..2a118b5dbf 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -4971,9 +4971,7 @@ CONFIG_USB_EHCI_TEGRA
 CONFIG_USB_EHCI_TXFIFO_THRESH
 CONFIG_USB_EHCI_VCT
 CONFIG_USB_EHCI_VF
-CONFIG_USB_ETH_CDC
 CONFIG_USB_ETH_QMULT
-CONFIG_USB_ETH_RNDIS
 CONFIG_USB_ETH_SUBSET
 CONFIG_USB_EXT2_BOOT
 CONFIG_USB_FAT_BOOT

commit 74fae1c7e99cc6dcaee22c1d0eccb9aeccbbdad6
Author: Maxime Ripard <maxime.ripard@free-electrons.com>
Date:   Wed Sep 6 23:23:21 2017 +0200

    UPSTREAM: usb: gadget: Convert USB_ETHER to Kconfig
    
    The USB Ethernet gadget option has not yet been moved to Kconfig, let's
    deal with that.
    
    Change-Id: Ie970ea4a67b81012f1c6382b38a04fac00c6ee75
    Reviewed-by: Łukasz Majewski <lukma@denx.de>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 3f33d3c8f4cc1b19a4a74e185bd3b6910f30e00f)

diff --git a/configs/am335x_baltos_defconfig b/configs/am335x_baltos_defconfig
index 123a603d02..0722f1ca95 100644
--- a/configs/am335x_baltos_defconfig
+++ b/configs/am335x_baltos_defconfig
@@ -64,6 +64,7 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
 CONFIG_G_DNL_VENDOR_NUM=0x0403
 CONFIG_G_DNL_PRODUCT_NUM=0xbd00
+CONFIG_USB_ETHER=y
 CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00"
 CONFIG_FAT_WRITE=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/am335x_boneblack_defconfig b/configs/am335x_boneblack_defconfig
index 197e5de423..6ab8ac386f 100644
--- a/configs/am335x_boneblack_defconfig
+++ b/configs/am335x_boneblack_defconfig
@@ -43,6 +43,7 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
 CONFIG_G_DNL_VENDOR_NUM=0x0451
 CONFIG_G_DNL_PRODUCT_NUM=0xd022
+CONFIG_USB_ETHER=y
 CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00"
 CONFIG_LZO=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/am335x_boneblack_vboot_defconfig b/configs/am335x_boneblack_vboot_defconfig
index a69d9685c3..e54435d1d9 100644
--- a/configs/am335x_boneblack_vboot_defconfig
+++ b/configs/am335x_boneblack_vboot_defconfig
@@ -53,4 +53,5 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
 CONFIG_G_DNL_VENDOR_NUM=0x0451
 CONFIG_G_DNL_PRODUCT_NUM=0xd022
+CONFIG_USB_ETHER=y
 CONFIG_LZO=y
diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig
index 44157f0b89..1f4ca54460 100644
--- a/configs/am335x_evm_defconfig
+++ b/configs/am335x_evm_defconfig
@@ -56,6 +56,7 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
 CONFIG_G_DNL_VENDOR_NUM=0x0451
 CONFIG_G_DNL_PRODUCT_NUM=0xd022
+CONFIG_USB_ETHER=y
 CONFIG_RSA=y
 CONFIG_LZO=y
 CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/configs/am335x_evm_nor_defconfig b/configs/am335x_evm_nor_defconfig
index 80d5c9f20c..ffb20b9d07 100644
--- a/configs/am335x_evm_nor_defconfig
+++ b/configs/am335x_evm_nor_defconfig
@@ -43,6 +43,7 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
 CONFIG_G_DNL_VENDOR_NUM=0x0451
 CONFIG_G_DNL_PRODUCT_NUM=0xd022
+CONFIG_USB_ETHER=y
 CONFIG_LZO=y
 CONFIG_OF_LIBFDT=y
 CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/configs/am335x_evm_norboot_defconfig b/configs/am335x_evm_norboot_defconfig
index 9374cc3865..73dca07424 100644
--- a/configs/am335x_evm_norboot_defconfig
+++ b/configs/am335x_evm_norboot_defconfig
@@ -37,6 +37,7 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
 CONFIG_G_DNL_VENDOR_NUM=0x0451
 CONFIG_G_DNL_PRODUCT_NUM=0xd022
+CONFIG_USB_ETHER=y
 CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00"
 CONFIG_LZO=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/am335x_evm_spiboot_defconfig b/configs/am335x_evm_spiboot_defconfig
index 48f4d69521..9209a9951e 100644
--- a/configs/am335x_evm_spiboot_defconfig
+++ b/configs/am335x_evm_spiboot_defconfig
@@ -41,6 +41,7 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
 CONFIG_G_DNL_VENDOR_NUM=0x0451
 CONFIG_G_DNL_PRODUCT_NUM=0xd022
+CONFIG_USB_ETHER=y
 CONFIG_LZO=y
 CONFIG_OF_LIBFDT=y
 CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/configs/am335x_evm_usbspl_defconfig b/configs/am335x_evm_usbspl_defconfig
index cf4f52bfa9..c24ad5be51 100644
--- a/configs/am335x_evm_usbspl_defconfig
+++ b/configs/am335x_evm_usbspl_defconfig
@@ -47,6 +47,7 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
 CONFIG_G_DNL_VENDOR_NUM=0x0451
 CONFIG_G_DNL_PRODUCT_NUM=0xd022
+CONFIG_USB_ETHER=y
 CONFIG_LZO=y
 CONFIG_OF_LIBFDT=y
 CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/configs/am335x_hs_evm_defconfig b/configs/am335x_hs_evm_defconfig
index 169650ad1f..53fe33a7a1 100644
--- a/configs/am335x_hs_evm_defconfig
+++ b/configs/am335x_hs_evm_defconfig
@@ -60,5 +60,6 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
 CONFIG_G_DNL_VENDOR_NUM=0x0451
 CONFIG_G_DNL_PRODUCT_NUM=0xd022
+CONFIG_USB_ETHER=y
 CONFIG_RSA=y
 CONFIG_LZO=y
diff --git a/configs/draco_defconfig b/configs/draco_defconfig
index d884ba3bbc..1c5c2899b4 100644
--- a/configs/draco_defconfig
+++ b/configs/draco_defconfig
@@ -71,3 +71,4 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Siemens AG"
 CONFIG_G_DNL_VENDOR_NUM=0x0908
 CONFIG_G_DNL_PRODUCT_NUM=0x02d2
+CONFIG_USB_ETHER=y
diff --git a/configs/etamin_defconfig b/configs/etamin_defconfig
index 5b8a597aa2..ef3aa1f64a 100644
--- a/configs/etamin_defconfig
+++ b/configs/etamin_defconfig
@@ -71,3 +71,4 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Siemens AG"
 CONFIG_G_DNL_VENDOR_NUM=0x0908
 CONFIG_G_DNL_PRODUCT_NUM=0x02d2
+CONFIG_USB_ETHER=y
diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig
index 60a11675d2..78781da4ab 100644
--- a/configs/gwventana_emmc_defconfig
+++ b/configs/gwventana_emmc_defconfig
@@ -72,6 +72,7 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Gateworks"
 CONFIG_G_DNL_VENDOR_NUM=0x0525
 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
+CONFIG_USB_ETHER=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_ETHER_SMSC95XX=y
diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig
index e81cadbff8..c35b5e7f08 100644
--- a/configs/gwventana_gw5904_defconfig
+++ b/configs/gwventana_gw5904_defconfig
@@ -76,6 +76,7 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Gateworks"
 CONFIG_G_DNL_VENDOR_NUM=0x0525
 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
+CONFIG_USB_ETHER=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_ETHER_SMSC95XX=y
diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig
index 9e3f710b58..bf45e23c86 100644
--- a/configs/gwventana_nand_defconfig
+++ b/configs/gwventana_nand_defconfig
@@ -73,6 +73,7 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Gateworks"
 CONFIG_G_DNL_VENDOR_NUM=0x0525
 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
+CONFIG_USB_ETHER=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_ETHER_SMSC95XX=y
diff --git a/configs/h2200_defconfig b/configs/h2200_defconfig
index 5d2189e589..8b4deaead6 100644
--- a/configs/h2200_defconfig
+++ b/configs/h2200_defconfig
@@ -29,3 +29,6 @@ CONFIG_CMD_PING=y
 # CONFIG_CMD_MISC is not set
 # CONFIG_MMC is not set
 CONFIG_PXA_SERIAL=y
+CONFIG_USB=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_ETHER=y
diff --git a/configs/ma5d4evk_defconfig b/configs/ma5d4evk_defconfig
index 0d8c109fbc..0655505a13 100644
--- a/configs/ma5d4evk_defconfig
+++ b/configs/ma5d4evk_defconfig
@@ -52,6 +52,7 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="AriesEmbedded"
 CONFIG_G_DNL_VENDOR_NUM=0x0525
 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
+CONFIG_USB_ETHER=y
 CONFIG_FAT_WRITE=y
 CONFIG_OF_LIBFDT=y
 # CONFIG_EFI_LOADER is not set
diff --git a/configs/mx6qsabrelite_defconfig b/configs/mx6qsabrelite_defconfig
index 57aba7e6d0..bab0d0c79f 100644
--- a/configs/mx6qsabrelite_defconfig
+++ b/configs/mx6qsabrelite_defconfig
@@ -54,5 +54,6 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Boundary"
 CONFIG_G_DNL_VENDOR_NUM=0x0525
 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
+CONFIG_USB_ETHER=y
 # CONFIG_VIDEO_SW_CURSOR is not set
 CONFIG_OF_LIBFDT=y
diff --git a/configs/nitrogen6dl2g_defconfig b/configs/nitrogen6dl2g_defconfig
index 50e6b70bc9..0d19b85a30 100644
--- a/configs/nitrogen6dl2g_defconfig
+++ b/configs/nitrogen6dl2g_defconfig
@@ -51,5 +51,6 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Boundary"
 CONFIG_G_DNL_VENDOR_NUM=0x0525
 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
+CONFIG_USB_ETHER=y
 # CONFIG_VIDEO_SW_CURSOR is not set
 CONFIG_OF_LIBFDT=y
diff --git a/configs/nitrogen6dl_defconfig b/configs/nitrogen6dl_defconfig
index 61e5ea4e21..a20580eb77 100644
--- a/configs/nitrogen6dl_defconfig
+++ b/configs/nitrogen6dl_defconfig
@@ -51,5 +51,6 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Boundary"
 CONFIG_G_DNL_VENDOR_NUM=0x0525
 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
+CONFIG_USB_ETHER=y
 # CONFIG_VIDEO_SW_CURSOR is not set
 CONFIG_OF_LIBFDT=y
diff --git a/configs/nitrogen6q2g_defconfig b/configs/nitrogen6q2g_defconfig
index 9dbb7181ee..940c74a5ec 100644
--- a/configs/nitrogen6q2g_defconfig
+++ b/configs/nitrogen6q2g_defconfig
@@ -52,5 +52,6 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Boundary"
 CONFIG_G_DNL_VENDOR_NUM=0x0525
 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
+CONFIG_USB_ETHER=y
 # CONFIG_VIDEO_SW_CURSOR is not set
 CONFIG_OF_LIBFDT=y
diff --git a/configs/nitrogen6q_defconfig b/configs/nitrogen6q_defconfig
index 5478390fd8..83772cb2ef 100644
--- a/configs/nitrogen6q_defconfig
+++ b/configs/nitrogen6q_defconfig
@@ -52,5 +52,6 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Boundary"
 CONFIG_G_DNL_VENDOR_NUM=0x0525
 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
+CONFIG_USB_ETHER=y
 # CONFIG_VIDEO_SW_CURSOR is not set
 CONFIG_OF_LIBFDT=y
diff --git a/configs/nitrogen6s1g_defconfig b/configs/nitrogen6s1g_defconfig
index 0188168642..862b41a3f8 100644
--- a/configs/nitrogen6s1g_defconfig
+++ b/configs/nitrogen6s1g_defconfig
@@ -51,5 +51,6 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Boundary"
 CONFIG_G_DNL_VENDOR_NUM=0x0525
 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
+CONFIG_USB_ETHER=y
 # CONFIG_VIDEO_SW_CURSOR is not set
 CONFIG_OF_LIBFDT=y
diff --git a/configs/nitrogen6s_defconfig b/configs/nitrogen6s_defconfig
index 51f1f91be8..e5376313b9 100644
--- a/configs/nitrogen6s_defconfig
+++ b/configs/nitrogen6s_defconfig
@@ -51,5 +51,6 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Boundary"
 CONFIG_G_DNL_VENDOR_NUM=0x0525
 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
+CONFIG_USB_ETHER=y
 # CONFIG_VIDEO_SW_CURSOR is not set
 CONFIG_OF_LIBFDT=y
diff --git a/configs/novena_defconfig b/configs/novena_defconfig
index 2921525f9f..786ab2854f 100644
--- a/configs/novena_defconfig
+++ b/configs/novena_defconfig
@@ -48,6 +48,7 @@ CONFIG_USB_KEYBOARD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y
 CONFIG_USB_GADGET=y
 CONFIG_CI_UDC=y
+CONFIG_USB_ETHER=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_ETHER_SMSC95XX=y
diff --git a/configs/omap3_beagle_defconfig b/configs/omap3_beagle_defconfig
index 3764482776..32324c8933 100644
--- a/configs/omap3_beagle_defconfig
+++ b/configs/omap3_beagle_defconfig
@@ -55,6 +55,7 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="TI"
 CONFIG_G_DNL_VENDOR_NUM=0x0451
 CONFIG_G_DNL_PRODUCT_NUM=0xd022
+CONFIG_USB_ETHER=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_ETHER_MCS7830=y
diff --git a/configs/omap3_evm_defconfig b/configs/omap3_evm_defconfig
index 07bd93c007..c157054acd 100644
--- a/configs/omap3_evm_defconfig
+++ b/configs/omap3_evm_defconfig
@@ -59,6 +59,7 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
 CONFIG_G_DNL_VENDOR_NUM=0x0451
 CONFIG_G_DNL_PRODUCT_NUM=0x5678
+CONFIG_USB_ETHER=y
 CONFIG_FAT_WRITE=y
 CONFIG_BCH=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconfig
index 2dc6cfff19..3478c802ed 100644
--- a/configs/omap3_logic_defconfig
+++ b/configs/omap3_logic_defconfig
@@ -51,4 +51,5 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="TI"
 CONFIG_G_DNL_VENDOR_NUM=0x0451
 CONFIG_G_DNL_PRODUCT_NUM=0xd022
+CONFIG_USB_ETHER=y
 CONFIG_BCH=y
diff --git a/configs/pcm051_rev1_defconfig b/configs/pcm051_rev1_defconfig
index 1eda7acf13..a8f0ec5b4e 100644
--- a/configs/pcm051_rev1_defconfig
+++ b/configs/pcm051_rev1_defconfig
@@ -62,5 +62,6 @@ CONFIG_USB_MUSB_HOST=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_ETHER=y
 CONFIG_FAT_WRITE=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/pcm051_rev3_defconfig b/configs/pcm051_rev3_defconfig
index debdbd5d8a..6b5d52de8c 100644
--- a/configs/pcm051_rev3_defconfig
+++ b/configs/pcm051_rev3_defconfig
@@ -62,5 +62,6 @@ CONFIG_USB_MUSB_HOST=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_ETHER=y
 CONFIG_FAT_WRITE=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/pxm2_defconfig b/configs/pxm2_defconfig
index 731821f9db..d5ad7d01fd 100644
--- a/configs/pxm2_defconfig
+++ b/configs/pxm2_defconfig
@@ -75,6 +75,7 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Siemens AG"
 CONFIG_G_DNL_VENDOR_NUM=0x0908
 CONFIG_G_DNL_PRODUCT_NUM=0x02d2
+CONFIG_USB_ETHER=y
 CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00"
 # CONFIG_VIDEO_SW_CURSOR is not set
 CONFIG_SYS_CONSOLE_BG_COL=0xff
diff --git a/configs/rastaban_defconfig b/configs/rastaban_defconfig
index 8ad9bc1bc4..7215fadd7e 100644
--- a/configs/rastaban_defconfig
+++ b/configs/rastaban_defconfig
@@ -71,4 +71,5 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Siemens AG"
 CONFIG_G_DNL_VENDOR_NUM=0x0908
 CONFIG_G_DNL_PRODUCT_NUM=0x02d2
+CONFIG_USB_ETHER=y
 CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00"
diff --git a/configs/rut_defconfig b/configs/rut_defconfig
index 034943b03a..a4c5866f4c 100644
--- a/configs/rut_defconfig
+++ b/configs/rut_defconfig
@@ -76,6 +76,7 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Siemens AG"
 CONFIG_G_DNL_VENDOR_NUM=0x0908
 CONFIG_G_DNL_PRODUCT_NUM=0x02d2
+CONFIG_USB_ETHER=y
 # CONFIG_VIDEO_SW_CURSOR is not set
 CONFIG_SYS_CONSOLE_BG_COL=0xff
 CONFIG_SYS_CONSOLE_FG_COL=0x00
diff --git a/configs/sama5d2_ptc_nandflash_defconfig b/configs/sama5d2_ptc_nandflash_defconfig
index bca3ac2fcb..6672a5ce11 100644
--- a/configs/sama5d2_ptc_nandflash_defconfig
+++ b/configs/sama5d2_ptc_nandflash_defconfig
@@ -30,3 +30,4 @@ CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_ATMEL_USBA=y
+CONFIG_USB_ETHER=y
diff --git a/configs/sama5d2_ptc_spiflash_defconfig b/configs/sama5d2_ptc_spiflash_defconfig
index e4fb49f662..9a23a808f1 100644
--- a/configs/sama5d2_ptc_spiflash_defconfig
+++ b/configs/sama5d2_ptc_spiflash_defconfig
@@ -31,3 +31,4 @@ CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_ATMEL_USBA=y
+CONFIG_USB_ETHER=y
diff --git a/configs/sansa_fuze_plus_defconfig b/configs/sansa_fuze_plus_defconfig
index f6ce09c366..c6d50ccb8e 100644
--- a/configs/sansa_fuze_plus_defconfig
+++ b/configs/sansa_fuze_plus_defconfig
@@ -32,4 +32,5 @@ CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_GADGET=y
 CONFIG_CI_UDC=y
+CONFIG_USB_ETHER=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/thuban_defconfig b/configs/thuban_defconfig
index 27e6d34481..fc1ddd6718 100644
--- a/configs/thuban_defconfig
+++ b/configs/thuban_defconfig
@@ -71,3 +71,4 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Siemens AG"
 CONFIG_G_DNL_VENDOR_NUM=0x0908
 CONFIG_G_DNL_PRODUCT_NUM=0x02d2
+CONFIG_USB_ETHER=y
diff --git a/configs/vinco_defconfig b/configs/vinco_defconfig
index 2cd4466a08..08aa8c52a2 100644
--- a/configs/vinco_defconfig
+++ b/configs/vinco_defconfig
@@ -32,5 +32,6 @@ CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_ATMEL_USBA=y
+CONFIG_USB_ETHER=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_SMSC95XX=y
diff --git a/configs/warp7_defconfig b/configs/warp7_defconfig
index f430f30bbb..8a3717facd 100644
--- a/configs/warp7_defconfig
+++ b/configs/warp7_defconfig
@@ -38,5 +38,6 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="FSL"
 CONFIG_G_DNL_VENDOR_NUM=0x0525
 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
+CONFIG_USB_ETHER=y
 CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00"
 CONFIG_OF_LIBFDT=y
diff --git a/configs/warp7_secure_defconfig b/configs/warp7_secure_defconfig
index 96e2c9e5cf..83a06079fd 100644
--- a/configs/warp7_secure_defconfig
+++ b/configs/warp7_secure_defconfig
@@ -36,5 +36,6 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="FSL"
 CONFIG_G_DNL_VENDOR_NUM=0x0525
 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
+CONFIG_USB_ETHER=y
 CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00"
 CONFIG_OF_LIBFDT=y
diff --git a/configs/xfi3_defconfig b/configs/xfi3_defconfig
index de80da69c6..6cc7845282 100644
--- a/configs/xfi3_defconfig
+++ b/configs/xfi3_defconfig
@@ -31,4 +31,5 @@ CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_GADGET=y
 CONFIG_CI_UDC=y
+CONFIG_USB_ETHER=y
 CONFIG_OF_LIBFDT=y
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index 510efd67b9..6558d2458b 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -121,6 +121,18 @@ config G_DNL_PRODUCT_NUM
 
 endif # USB_GADGET_DOWNLOAD
 
+config USB_ETHER
+	bool "USB Ethernet Gadget"
+	help
+	  Creates an Ethernet network device through a USB peripheral
+	  controller. This will create a network interface on both the device
+	  (U-Boot) and the host (remote device) that can be used just like any
+	  other nework interface.
+	  It will bind on the peripheral USB controller, ignoring the USB hosts
+	  controllers in the system.
+
+if USB_ETHER
+
 config USBNET_DEVADDR
 	string "USB Gadget Ethernet device mac address"
 	default "de:ad:be:ef:00:01"
@@ -135,4 +147,6 @@ config USBNET_HOST_ADDR
 	  Ethernet MAC address of the host-side (ie. remote device's) MAC
 	  address of the usb_ether interface
 
+endif # USB_ETHER
+
 endif # USB_GADGET
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index a37663d3a2..28009e82c8 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -258,7 +258,6 @@
 #define CONFIG_AM335X_USB1_MODE MUSB_HOST
 
 #ifdef CONFIG_USB_MUSB_GADGET
-#define CONFIG_USB_ETHER
 #define CONFIG_USB_ETH_RNDIS
 #endif /* CONFIG_USB_MUSB_GADGET */
 
diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h
index c8c7f16c52..1696bf709b 100644
--- a/include/configs/am3517_evm.h
+++ b/include/configs/am3517_evm.h
@@ -80,7 +80,6 @@
 #endif /* CONFIG_USB_MUSB_HOST */
 
 #ifdef CONFIG_USB_MUSB_GADGET
-#define CONFIG_USB_ETHER
 #define CONFIG_USB_ETH_RNDIS
 #endif /* CONFIG_USB_MUSB_GADGET */
 
diff --git a/include/configs/baltos.h b/include/configs/baltos.h
index 2e71b19552..16e86fd447 100644
--- a/include/configs/baltos.h
+++ b/include/configs/baltos.h
@@ -279,7 +279,6 @@
 #define CONFIG_AM335X_USB1_MODE MUSB_OTG
 
 #ifdef CONFIG_USB_MUSB_GADGET
-#define CONFIG_USB_ETHER
 #define CONFIG_USB_ETH_RNDIS
 #endif /* CONFIG_USB_MUSB_GADGET */
 
diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index 639655b65e..c462fb1e64 100644
--- a/include/configs/gw_ventana.h
+++ b/include/configs/gw_ventana.h
@@ -142,7 +142,6 @@
 #define CONFIG_MXC_USB_PORTSC     (PORT_PTS_UTMI | PORT_PTS_PTW)
 #define CONFIG_MXC_USB_FLAGS      0
 #define CONFIG_USBD_HS
-#define CONFIG_USB_ETHER
 #define CONFIG_USB_ETH_CDC
 #define CONFIG_NETCONSOLE
 
diff --git a/include/configs/h2200.h b/include/configs/h2200.h
index e956e89a89..24ff53f6f1 100644
--- a/include/configs/h2200.h
+++ b/include/configs/h2200.h
@@ -123,7 +123,6 @@
 	"bootm ; "
 
 #define CONFIG_USB_GADGET_PXA2XX
-#define CONFIG_USB_ETHER
 #define CONFIG_USB_ETH_SUBSET
 
 #define CONFIG_USBNET_DEV_ADDR		"de:ad:be:ef:00:01"
diff --git a/include/configs/ma5d4evk.h b/include/configs/ma5d4evk.h
index 50b21c9d97..2ad4952f5e 100644
--- a/include/configs/ma5d4evk.h
+++ b/include/configs/ma5d4evk.h
@@ -97,7 +97,6 @@
 #ifdef CONFIG_CMD_USB
 
 /* USB device */
-#define CONFIG_USB_ETHER
 #define CONFIG_USB_ETH_RNDIS
 #define CONFIG_USBNET_MANUFACTURER      "AriesEmbedded"
 #define CONFIG_USB_FUNCTION_MASS_STORAGE
diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h
index d32d8f871a..ca37f584f0 100644
--- a/include/configs/nitrogen6x.h
+++ b/include/configs/nitrogen6x.h
@@ -19,7 +19,6 @@
 
 #define CONFIG_MISC_INIT_R
 #define CONFIG_USBD_HS
-#define CONFIG_USB_ETHER
 #define CONFIG_USB_ETH_CDC
 #define CONFIG_NETCONSOLE
 
diff --git a/include/configs/novena.h b/include/configs/novena.h
index be8c6911e6..9068ee2182 100644
--- a/include/configs/novena.h
+++ b/include/configs/novena.h
@@ -129,7 +129,6 @@
 #define CONFIG_MXC_USB_FLAGS		0
 /* Gadget part */
 #define CONFIG_USBD_HS
-#define CONFIG_USB_ETHER
 #define CONFIG_USB_ETH_CDC
 #define CONFIG_NETCONSOLE
 #endif
diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
index e4adcbc6e8..0ff3194569 100644
--- a/include/configs/omap3_beagle.h
+++ b/include/configs/omap3_beagle.h
@@ -51,7 +51,6 @@
 #define CONFIG_USB_MUSB_OMAP2PLUS
 #define CONFIG_USB_MUSB_PIO_ONLY
 #define CONFIG_TWL4030_USB		1
-#define CONFIG_USB_ETHER
 
 /* USB EHCI */
 
diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h
index 8077e67f58..e068c29d73 100644
--- a/include/configs/omap3_evm.h
+++ b/include/configs/omap3_evm.h
@@ -79,7 +79,6 @@
 #define CONFIG_USB_OMAP3
 #define CONFIG_USB_MUSB_OMAP2PLUS
 #define CONFIG_USB_MUSB_PIO_ONLY
-#define CONFIG_USB_ETHER
 
 /* USB EHCI */
 #define CONFIG_SYS_USB_FAT_BOOT_PARTITION  1
diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h
index 258bb70cd2..fc330029aa 100644
--- a/include/configs/omap3_logic.h
+++ b/include/configs/omap3_logic.h
@@ -57,7 +57,6 @@
 /* USB */
 #define CONFIG_USB_MUSB_OMAP2PLUS
 #define CONFIG_USB_MUSB_PIO_ONLY
-#define CONFIG_USB_ETHER
 
 /* TWL4030 */
 #define CONFIG_TWL4030_USB
diff --git a/include/configs/pcm051.h b/include/configs/pcm051.h
index f678b2944d..309bbd6bd3 100644
--- a/include/configs/pcm051.h
+++ b/include/configs/pcm051.h
@@ -134,7 +134,6 @@
 #define CONFIG_AM335X_USB1_MODE MUSB_HOST
 
 #ifdef CONFIG_USB_MUSB_GADGET
-#define CONFIG_USB_ETHER
 #define CONFIG_USB_ETH_RNDIS
 #endif /* CONFIG_USB_MUSB_GADGET */
 
diff --git a/include/configs/sama5d2_ptc.h b/include/configs/sama5d2_ptc.h
index b04781893d..a1a0602cdd 100644
--- a/include/configs/sama5d2_ptc.h
+++ b/include/configs/sama5d2_ptc.h
@@ -60,7 +60,6 @@
 #endif
 
 /* USB device */
-#define CONFIG_USB_ETHER
 #define CONFIG_USB_ETH_RNDIS
 #define CONFIG_USBNET_MANUFACTURER      "Atmel SAMA5D2_PTC"
 
diff --git a/include/configs/sansa_fuze_plus.h b/include/configs/sansa_fuze_plus.h
index 250917b1dc..9e33ca4227 100644
--- a/include/configs/sansa_fuze_plus.h
+++ b/include/configs/sansa_fuze_plus.h
@@ -39,7 +39,6 @@
 #define CONFIG_EHCI_MXS_PORT0
 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
 
-#define CONFIG_USB_ETHER
 #define CONFIG_USB_ETH_CDC
 #define CONFIG_NETCONSOLE
 #endif
diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h
index 3b10a38229..e86f5a2584 100644
--- a/include/configs/siemens-am33x-common.h
+++ b/include/configs/siemens-am33x-common.h
@@ -176,7 +176,6 @@
 #define CONFIG_AM335X_USB1_MODE MUSB_HOST
 
 #ifdef CONFIG_USB_MUSB_GADGET
-#define CONFIG_USB_ETHER
 #define CONFIG_USB_ETH_RNDIS
 #endif /* CONFIG_USB_MUSB_GADGET */
 
diff --git a/include/configs/tao3530.h b/include/configs/tao3530.h
index 7b7a4ec0af..f82ff30866 100644
--- a/include/configs/tao3530.h
+++ b/include/configs/tao3530.h
@@ -208,8 +208,6 @@
 /* USB EHCI */
 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO	162
 
-#define CONFIG_USB_ETHER
-
 /* Defines for SPL */
 #define CONFIG_SPL_FRAMEWORK
 
diff --git a/include/configs/vinco.h b/include/configs/vinco.h
index 189ceca821..524af87b47 100644
--- a/include/configs/vinco.h
+++ b/include/configs/vinco.h
@@ -63,7 +63,6 @@
 #endif
 
 /* USB device */
-#define CONFIG_USB_ETHER
 #define CONFIG_USB_ETH_RNDIS
 #define CONFIG_USBNET_MANUFACTURER      "L+G VInCo"
 
diff --git a/include/configs/warp7.h b/include/configs/warp7.h
index 9ce4251566..05ae3542a9 100644
--- a/include/configs/warp7.h
+++ b/include/configs/warp7.h
@@ -136,7 +136,6 @@
 #define CONFIG_SYS_DFU_DATA_BUF_SIZE	SZ_16M
 #define DFU_DEFAULT_POLL_TIMEOUT	300
 
-#define CONFIG_USB_ETHER
 #define CONFIG_USB_ETH_CDC
 #define CONFIG_USB_ETH_RNDIS
 #define CONFIG_USBNET_DEV_ADDR		"de:ad:be:af:00:01"
diff --git a/include/configs/xfi3.h b/include/configs/xfi3.h
index 73f431681d..7bbfd75c0c 100644
--- a/include/configs/xfi3.h
+++ b/include/configs/xfi3.h
@@ -39,7 +39,6 @@
 #define CONFIG_EHCI_MXS_PORT0
 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
 
-#define CONFIG_USB_ETHER
 #define CONFIG_USB_ETH_CDC
 #define CONFIG_NETCONSOLE
 #endif
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 4ea15fc257..d5a3a305f9 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -4971,7 +4971,6 @@ CONFIG_USB_EHCI_TEGRA
 CONFIG_USB_EHCI_TXFIFO_THRESH
 CONFIG_USB_EHCI_VCT
 CONFIG_USB_EHCI_VF
-CONFIG_USB_ETHER
 CONFIG_USB_ETH_CDC
 CONFIG_USB_ETH_QMULT
 CONFIG_USB_ETH_RNDIS

commit 17c5fbc90d670ac4660cc7db1ae22656fc8a2a10
Author: Maxime Ripard <maxime.ripard@free-electrons.com>
Date:   Wed Sep 6 22:53:43 2017 +0200

    UPSTREAM: usb: gadget: Move USBNET_HOST_ADDR to Kconfig
    
    While the USB Ethernet device address is already defined in Kconfig, the
    host address isn't. Convert it.
    
    Change-Id: I527f287a8714bd460a2261a9b4ba6be71e8ee436
    Reviewed-by: Łukasz Majewski <lukma@denx.de>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit c163668a4abaeef3eaab22b4a5ac13d2d74f1306)

diff --git a/configs/am335x_baltos_defconfig b/configs/am335x_baltos_defconfig
index 3ef3fff5ea..123a603d02 100644
--- a/configs/am335x_baltos_defconfig
+++ b/configs/am335x_baltos_defconfig
@@ -64,5 +64,6 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
 CONFIG_G_DNL_VENDOR_NUM=0x0403
 CONFIG_G_DNL_PRODUCT_NUM=0xbd00
+CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00"
 CONFIG_FAT_WRITE=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/am335x_boneblack_defconfig b/configs/am335x_boneblack_defconfig
index befd930ca7..197e5de423 100644
--- a/configs/am335x_boneblack_defconfig
+++ b/configs/am335x_boneblack_defconfig
@@ -43,6 +43,7 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
 CONFIG_G_DNL_VENDOR_NUM=0x0451
 CONFIG_G_DNL_PRODUCT_NUM=0xd022
+CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00"
 CONFIG_LZO=y
 CONFIG_OF_LIBFDT=y
 CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/configs/am335x_evm_norboot_defconfig b/configs/am335x_evm_norboot_defconfig
index 5fdaf0ee9d..9374cc3865 100644
--- a/configs/am335x_evm_norboot_defconfig
+++ b/configs/am335x_evm_norboot_defconfig
@@ -37,6 +37,7 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
 CONFIG_G_DNL_VENDOR_NUM=0x0451
 CONFIG_G_DNL_PRODUCT_NUM=0xd022
+CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00"
 CONFIG_LZO=y
 CONFIG_OF_LIBFDT=y
 CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/configs/pxm2_defconfig b/configs/pxm2_defconfig
index 11198b8fd2..731821f9db 100644
--- a/configs/pxm2_defconfig
+++ b/configs/pxm2_defconfig
@@ -75,6 +75,7 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Siemens AG"
 CONFIG_G_DNL_VENDOR_NUM=0x0908
 CONFIG_G_DNL_PRODUCT_NUM=0x02d2
+CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00"
 # CONFIG_VIDEO_SW_CURSOR is not set
 CONFIG_SYS_CONSOLE_BG_COL=0xff
 CONFIG_SYS_CONSOLE_FG_COL=0x00
diff --git a/configs/rastaban_defconfig b/configs/rastaban_defconfig
index 27a71a7728..8ad9bc1bc4 100644
--- a/configs/rastaban_defconfig
+++ b/configs/rastaban_defconfig
@@ -71,3 +71,4 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Siemens AG"
 CONFIG_G_DNL_VENDOR_NUM=0x0908
 CONFIG_G_DNL_PRODUCT_NUM=0x02d2
+CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00"
diff --git a/configs/warp7_defconfig b/configs/warp7_defconfig
index 99fe800317..f430f30bbb 100644
--- a/configs/warp7_defconfig
+++ b/configs/warp7_defconfig
@@ -38,4 +38,5 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="FSL"
 CONFIG_G_DNL_VENDOR_NUM=0x0525
 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
+CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00"
 CONFIG_OF_LIBFDT=y
diff --git a/configs/warp7_secure_defconfig b/configs/warp7_secure_defconfig
index 8beda72cd8..96e2c9e5cf 100644
--- a/configs/warp7_secure_defconfig
+++ b/configs/warp7_secure_defconfig
@@ -36,4 +36,5 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="FSL"
 CONFIG_G_DNL_VENDOR_NUM=0x0525
 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
+CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00"
 CONFIG_OF_LIBFDT=y
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index 6dc9d177f5..510efd67b9 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -128,4 +128,11 @@ config USBNET_DEVADDR
 	  Ethernet MAC address of the device-side (ie. local board's) MAC
 	  address of the usb_ether interface
 
+config USBNET_HOST_ADDR
+	string "USB Gadget Ethernet host mac address"
+	default "de:ad:be:ef:00:00"
+	help
+	  Ethernet MAC address of the host-side (ie. remote device's) MAC
+	  address of the usb_ether interface
+
 endif # USB_GADGET
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index 66f7a3f604..a37663d3a2 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -260,7 +260,6 @@
 #ifdef CONFIG_USB_MUSB_GADGET
 #define CONFIG_USB_ETHER
 #define CONFIG_USB_ETH_RNDIS
-#define CONFIG_USBNET_HOST_ADDR	"de:ad:be:af:00:00"
 #endif /* CONFIG_USB_MUSB_GADGET */
 
 /*
diff --git a/include/configs/baltos.h b/include/configs/baltos.h
index edc9466327..2e71b19552 100644
--- a/include/configs/baltos.h
+++ b/include/configs/baltos.h
@@ -281,7 +281,6 @@
 #ifdef CONFIG_USB_MUSB_GADGET
 #define CONFIG_USB_ETHER
 #define CONFIG_USB_ETH_RNDIS
-#define CONFIG_USBNET_HOST_ADDR	"de:ad:be:af:00:00"
 #endif /* CONFIG_USB_MUSB_GADGET */
 
 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_USBETH_SUPPORT)
diff --git a/include/configs/h2200.h b/include/configs/h2200.h
index 870014ddf4..e956e89a89 100644
--- a/include/configs/h2200.h
+++ b/include/configs/h2200.h
@@ -127,7 +127,6 @@
 #define CONFIG_USB_ETH_SUBSET
 
 #define CONFIG_USBNET_DEV_ADDR		"de:ad:be:ef:00:01"
-#define CONFIG_USBNET_HOST_ADDR	"de:ad:be:ef:00:02"
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	"stdin=serial\0" \
 	"stdout=serial\0" \
diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h
index 308d441477..3b10a38229 100644
--- a/include/configs/siemens-am33x-common.h
+++ b/include/configs/siemens-am33x-common.h
@@ -178,7 +178,6 @@
 #ifdef CONFIG_USB_MUSB_GADGET
 #define CONFIG_USB_ETHER
 #define CONFIG_USB_ETH_RNDIS
-#define CONFIG_USBNET_HOST_ADDR	"de:ad:be:af:00:00"
 #endif /* CONFIG_USB_MUSB_GADGET */
 
 /* USB DRACO ID as default */
diff --git a/include/configs/warp7.h b/include/configs/warp7.h
index 75ae8a3e33..9ce4251566 100644
--- a/include/configs/warp7.h
+++ b/include/configs/warp7.h
@@ -139,7 +139,6 @@
 #define CONFIG_USB_ETHER
 #define CONFIG_USB_ETH_CDC
 #define CONFIG_USB_ETH_RNDIS
-#define CONFIG_USBNET_HOST_ADDR		"de:ad:be:af:00:00"
 #define CONFIG_USBNET_DEV_ADDR		"de:ad:be:af:00:01"
 
 #endif
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 1ae4bf30d0..4ea15fc257 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -4941,7 +4941,6 @@ CONFIG_USBD_SERIAL_OUT_PKTSIZE
 CONFIG_USBD_VENDORID
 CONFIG_USBID_ADDR
 CONFIG_USBNET_DEV_ADDR
-CONFIG_USBNET_HOST_ADDR
 CONFIG_USBNET_MANUFACTURER
 CONFIG_USBTTY
 CONFIG_USB_AM35X

commit 0c3f0a1ec7d574d12657a29ff674c7cca50a30ad
Author: Maxime Ripard <maxime.ripard@free-electrons.com>
Date:   Tue Sep 12 18:32:45 2017 +0200

    UPSTREAM: usb: gadget: Document USBNET_DEVADDR
    
    Add an help about the USBNET_DEVADDR Kconfig option to make it clearer what
    it's about.
    
    Change-Id: I633f3104bb6bffb703be52f50ee18085d4242f13
    Acked-by: Łukasz Majewski <lukma@denx.de>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 74e7997c70d80e4b3de0622fbff3e75f72b8c1ce)

diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index d526269088..6dc9d177f5 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -124,5 +124,8 @@ endif # USB_GADGET_DOWNLOAD
 config USBNET_DEVADDR
 	string "USB Gadget Ethernet device mac address"
 	default "de:ad:be:ef:00:01"
+	help
+	  Ethernet MAC address of the device-side (ie. local board's) MAC
+	  address of the usb_ether interface
 
 endif # USB_GADGET

commit 8f2649d8687314981068211166209b2f39bf5467
Author: Maxime Ripard <maxime.ripard@free-electrons.com>
Date:   Wed Sep 6 22:54:52 2017 +0200

    UPSTREAM: usb: gadget: Move USBNET_DEVADDR option out of g_dnl
    
    The USBNET_DEVADDR has nothing to do with the USB download gadget, but
    rather with the USB Ethernet gadget. Move it out of the if statement.
    
    Change-Id: I03f4abb5326eff247cc1aaeb31ddb7b11b1b06c9
    Acked-by: Łukasz Majewski <lukma@denx.de>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 5506ff149d4aa4b76f162a71c2cf68c2b00d38e9)

diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index 225b66bc95..d526269088 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -119,10 +119,10 @@ config G_DNL_VENDOR_NUM
 config G_DNL_PRODUCT_NUM
 	hex "Product ID of USB device"
 
+endif # USB_GADGET_DOWNLOAD
+
 config USBNET_DEVADDR
 	string "USB Gadget Ethernet device mac address"
 	default "de:ad:be:ef:00:01"
 
-endif # USB_GADGET_DOWNLOAD
-
 endif # USB_GADGET

commit 782be0c4f4309bfdbb253c554dc420ad5d2da45c
Author: Christophe Kerello <christophe.kerello@st.com>
Date:   Thu Mar 15 18:00:30 2018 +0100

    UPSTREAM: usb: dwc2: disable external vbus supply when the device is removed
    
    This patch adds an interface to disable the power in dwc2 driver.
    This new interface is called when the device is removed.
    
    Change-Id: I4b00ce5f259abe07971753860fc801ff0ebfa0b0
    Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
    Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 82e7975b85bea1c2acccf30e6fd11e1a48a7e783)

diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
index 4b41662026..3ba448933b 100644
--- a/drivers/usb/host/dwc2.c
+++ b/drivers/usb/host/dwc2.c
@@ -34,6 +34,9 @@ struct dwc2_priv {
 #ifdef CONFIG_DM_USB
 	uint8_t aligned_buffer[DWC2_DATA_BUF_SIZE] __aligned(ARCH_DMA_MINALIGN);
 	uint8_t status_buffer[DWC2_STATUS_BUF_SIZE] __aligned(ARCH_DMA_MINALIGN);
+#ifdef CONFIG_DM_REGULATOR
+	struct udevice *vbus_supply;
+#endif
 #else
 	uint8_t *aligned_buffer;
 	uint8_t *status_buffer;
@@ -168,16 +171,17 @@ static void dwc_otg_core_reset(struct dwc2_core_regs *regs)
 #if defined(CONFIG_DM_USB) && defined(CONFIG_DM_REGULATOR)
 static int dwc_vbus_supply_init(struct udevice *dev)
 {
-	struct udevice *vbus_supply;
+	struct dwc2_priv *priv = dev_get_priv(dev);
 	int ret;
 
-	ret = device_get_supply_regulator(dev, "vbus-supply", &vbus_supply);
+	ret = device_get_supply_regulator(dev, "vbus-supply",
+					  &priv->vbus_supply);
 	if (ret) {
 		debug("%s: No vbus supply\n", dev->name);
 		return 0;
 	}
 
-	ret = regulator_set_enable(vbus_supply, true);
+	ret = regulator_set_enable(priv->vbus_supply, true);
 	if (ret) {
 		pr_err("Error enabling vbus supply\n");
 		return ret;
@@ -185,11 +189,34 @@ static int dwc_vbus_supply_init(struct udevice *dev)
 
 	return 0;
 }
+
+static int dwc_vbus_supply_exit(struct udevice *dev)
+{
+	struct dwc2_priv *priv = dev_get_priv(dev);
+	int ret;
+
+	if (priv->vbus_supply) {
+		ret = regulator_set_enable(priv->vbus_supply, false);
+		if (ret) {
+			dev_err(dev, "Error disabling vbus supply\n");
+			return ret;
+		}
+	}
+
+	return 0;
+}
 #else
 static int dwc_vbus_supply_init(struct udevice *dev)
 {
 	return 0;
 }
+
+#if defined(CONFIG_DM_USB)
+static int dwc_vbus_supply_exit(struct udevice *dev)
+{
+	return 0;
+}
+#endif
 #endif
 
 /*
@@ -1273,6 +1300,11 @@ static int dwc2_usb_probe(struct udevice *dev)
 static int dwc2_usb_remove(struct udevice *dev)
 {
 	struct dwc2_priv *priv = dev_get_priv(dev);
+	int ret;
+
+	ret = dwc_vbus_supply_exit(dev);
+	if (ret)
+		return ret;
 
 	dwc2_uninit_common(priv->regs);
 

commit c8f2d7ee9488482e75a35e7f6b8f02ab3e1c3c60
Author: Sven Schwermer <sven@svenschwermer.de>
Date:   Wed Nov 21 08:43:55 2018 +0100

    UPSTREAM: usb: Remove CMD_USB dependency for common code
    
    Common USB code is built whenever USB is enabled (in non-SPL builds).
    The USB uclass is built whenever (SPL_)DM_USB is enabled. Both need to
    be independent from CMD_USB.
    
    Change-Id: Idb5e7ffeea8cb325855cb2d1b6713d62fe438120
    Signed-off-by: Sven Schwermer <sven@svenschwermer.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit ab5817027f9b4fce25f5f2a3e20577ac55bbd7e0)

diff --git a/common/Makefile b/common/Makefile
index 2a446867dc..29a5555988 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -36,7 +36,7 @@ obj-$(CONFIG_MII) += miiphyutil.o
 obj-$(CONFIG_CMD_MII) += miiphyutil.o
 obj-$(CONFIG_PHYLIB) += miiphyutil.o
 
-ifdef CONFIG_CMD_USB
+ifdef CONFIG_USB
 obj-y += usb.o usb_hub.o
 obj-$(CONFIG_USB_STORAGE) += usb_storage.o
 endif
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 98c6f9659b..55929578ef 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -6,7 +6,7 @@
 #
 
 ifdef CONFIG_$(SPL_)DM_USB
-obj-$(CONFIG_CMD_USB) += usb-uclass.o
+obj-y += usb-uclass.o
 obj-$(CONFIG_SANDBOX) += usb-sandbox.o
 endif
 

commit 7f10e9b86f2fbb6b93ff4ac5239ddb4eec179f85
Author: Sven Schwermer <sven@svenschwermer.de>
Date:   Wed Nov 21 08:43:53 2018 +0100

    UPSTREAM: usb: Introduce CONFIG_SPL_DM_USB
    
    This allows building the SPL without driver model for USB. Since
    CONFIG_SPL_DM_USB is enabled if and only if CONFIG_DM_USB was enabled
    before, this patch does not change the build behaviour.
    
    Change-Id: Icadae3860460b222d01a5cd36371df599724198a
    Signed-off-by: Sven Schwermer <sven@svenschwermer.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 41a25f46044c5f9b57197cfcc931106a3b8327d7)

diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig
index e7658b4d95..842058439d 100644
--- a/drivers/usb/Kconfig
+++ b/drivers/usb/Kconfig
@@ -47,6 +47,11 @@ config DM_USB
 	  declared with the U_BOOT_USB_DEVICE() macro and will be
 	  automatically probed when found on the bus.
 
+config SPL_DM_USB
+	bool "Enable driver model for USB in SPL"
+	depends on DM_USB
+	default y
+
 source "drivers/usb/host/Kconfig"
 
 source "drivers/usb/dwc3/Kconfig"
diff --git a/drivers/usb/common/Makefile b/drivers/usb/common/Makefile
index aee7e32e59..0e30558c78 100644
--- a/drivers/usb/common/Makefile
+++ b/drivers/usb/common/Makefile
@@ -3,6 +3,6 @@
 # SPDX-License-Identifier:      GPL-2.0+
 #
 
-obj-$(CONFIG_DM_USB) += common.o
+obj-$(CONFIG_$(SPL_)DM_USB) += common.o
 obj-$(CONFIG_USB_EHCI_FSL) += fsl-dt-fixup.o fsl-errata.o
 obj-$(CONFIG_USB_XHCI_FSL) += fsl-dt-fixup.o fsl-errata.o
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index ab5a99faa8..98c6f9659b 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -5,7 +5,7 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
 
-ifdef CONFIG_DM_USB
+ifdef CONFIG_$(SPL_)DM_USB
 obj-$(CONFIG_CMD_USB) += usb-uclass.o
 obj-$(CONFIG_SANDBOX) += usb-sandbox.o
 endif

commit f7f4c6d79a44d3662180231ae8a7d18efe9ff64a
Author: Ramon Fried <ramon.fried@gmail.com>
Date:   Wed Jun 6 00:38:59 2018 +0300

    UPSTREAM: bug.h: introduce WARN_ONCE
    
    Add WARN_ONCE definition to allow single time notification
    of warnings to the user.
    Taken from Linux kernel (4.17) with slight changes
    (Removed __section(.data.once))
    
    Change-Id: I815e26ffd253395ae7f3d120c83f0ee421bb627e
    Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
    [trini: Drop the musb and dwc3 compat versions]
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 948f32c8563568a76153f61ee4094c5aafe21eaf)

diff --git a/drivers/usb/dwc3/linux-compat.h b/drivers/usb/dwc3/linux-compat.h
index 3326dbaae4..42c41ccc17 100644
--- a/drivers/usb/dwc3/linux-compat.h
+++ b/drivers/usb/dwc3/linux-compat.h
@@ -12,7 +12,6 @@
 #ifndef __DWC3_LINUX_COMPAT__
 #define __DWC3_LINUX_COMPAT__
 
-#define WARN(val, format, arg...)	debug(format, ##arg)
 #define dev_WARN(dev, format, arg...)	debug(format, ##arg)
 
 static inline size_t strlcat(char *dest, const char *src, size_t n)
diff --git a/drivers/usb/musb-new/linux-compat.h b/drivers/usb/musb-new/linux-compat.h
index 7bb53d2b19..f366ae58e8 100644
--- a/drivers/usb/musb-new/linux-compat.h
+++ b/drivers/usb/musb-new/linux-compat.h
@@ -5,12 +5,6 @@
 #include <linux/list.h>
 #include <linux/compat.h>
 
-#define WARN(condition, fmt, args...) ({	\
-	int ret_warn = !!condition;		\
-	if (ret_warn)				\
-		printf(fmt, ##args);		\
-	ret_warn; })
-
 #define device_init_wakeup(dev, a) do {} while (0)
 
 #define platform_data device_data
diff --git a/include/linux/bug.h b/include/linux/bug.h
index f07bb716fc..29f84168a3 100644
--- a/include/linux/bug.h
+++ b/include/linux/bug.h
@@ -20,6 +20,13 @@
 	unlikely(__ret_warn_on);					\
 })
 
+#define WARN(condition, format...) ({                   \
+	int __ret_warn_on = !!(condition);              \
+	if (unlikely(__ret_warn_on))                    \
+		printf(format);                  \
+	unlikely(__ret_warn_on);                    \
+})
+
 #define WARN_ON_ONCE(condition)	({				\
 	static bool __warned;					\
 	int __ret_warn_once = !!(condition);			\
@@ -31,4 +38,15 @@
 	unlikely(__ret_warn_once);				\
 })
 
+#define WARN_ONCE(condition, format...) ({          \
+	static bool __warned;     \
+	int __ret_warn_once = !!(condition);            \
+								\
+	if (unlikely(__ret_warn_once && !__warned)) {       \
+		__warned = true;                \
+		WARN(1, format);                \
+	}                           \
+	unlikely(__ret_warn_once);              \
+})
+
 #endif	/* _LINUX_BUG_H */

commit e2f919a1c4fe4ebbc89c610844233ed429809faa
Author: Michal Simek <michal.simek@xilinx.com>
Date:   Fri May 18 13:15:06 2018 +0200

    UPSTREAM: usb: dwc3: Add generic DWC3 glue logic driver
    
    By enabling BLK by default this is the next driver which needs to get
    support for DM_USB. Adding generic DWC3 glue logic which only
    parse nodes and read device mode. Based on it probe proper
    host/peripheral DWC3 drivers for it.
    
    Change-Id: I946ce3749b0323302426b9a08c70f37297654e33
    Signed-off-by: Michal Simek <michal.simek@xilinx.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 49d674547c5bf668802b4b6a24218205fed957f0)

diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig
index ae7fc1c630..943b7630eb 100644
--- a/drivers/usb/dwc3/Kconfig
+++ b/drivers/usb/dwc3/Kconfig
@@ -37,6 +37,12 @@ config USB_DWC3_OMAP
 
 	  Say 'Y' here if you have one such device
 
+config USB_DWC3_GENERIC
+	bool "Xilinx ZynqMP and similar Platforms"
+	depends on DM_USB && USB_DWC3
+	help
+	  Some platforms can reuse this DWC3 generic implementation.
+
 config USB_DWC3_UNIPHIER
 	bool "DesignWare USB3 Host Support on UniPhier Platforms"
 	depends on ARCH_UNIPHIER && USB_XHCI_DWC3
diff --git a/drivers/usb/dwc3/Makefile b/drivers/usb/dwc3/Makefile
index 51497768b2..22142fb9d4 100644
--- a/drivers/usb/dwc3/Makefile
+++ b/drivers/usb/dwc3/Makefile
@@ -9,6 +9,7 @@ dwc3-y					:= core.o
 obj-$(CONFIG_USB_DWC3_GADGET)		+= gadget.o ep0.o
 
 obj-$(CONFIG_USB_DWC3_OMAP)		+= dwc3-omap.o
+obj-$(CONFIG_USB_DWC3_GENERIC)		+= dwc3-generic.o
 obj-$(CONFIG_USB_DWC3_UNIPHIER)		+= dwc3-uniphier.o
 obj-$(CONFIG_USB_DWC3_PHY_OMAP)		+= ti_usb_phy.o
 obj-$(CONFIG_USB_DWC3_PHY_SAMSUNG)	+= samsung_usb_phy.o
diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c
new file mode 100644
index 0000000000..ca63eac3d9
--- /dev/null
+++ b/drivers/usb/dwc3/dwc3-generic.c
@@ -0,0 +1,157 @@
+// SPDX-License-Identifier:     GPL-2.0
+/*
+ * Generic DWC3 Glue layer
+ *
+ * Copyright (C) 2016 - 2018 Xilinx, Inc.
+ *
+ * Based on dwc3-omap.c.
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/device-internal.h>
+#include <dm/lists.h>
+#include <linux/usb/otg.h>
+#include <linux/compat.h>
+#include <linux/usb/ch9.h>
+#include <linux/usb/gadget.h>
+#include <malloc.h>
+#include <usb.h>
+#include "core.h"
+#include "gadget.h"
+#include "linux-compat.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int usb_gadget_handle_interrupts(int index)
+{
+	struct dwc3 *priv;
+	struct udevice *dev;
+	int ret;
+
+	ret = uclass_first_device(UCLASS_USB_DEV_GENERIC, &dev);
+	if (!dev || ret) {
+		pr_err("No USB device found\n");
+		return -ENODEV;
+	}
+
+	priv = dev_get_priv(dev);
+
+	dwc3_gadget_uboot_handle_interrupt(priv);
+
+	return 0;
+}
+
+static int dwc3_generic_peripheral_probe(struct udevice *dev)
+{
+	struct dwc3 *priv = dev_get_priv(dev);
+
+	return dwc3_init(priv);
+}
+
+static int dwc3_generic_peripheral_remove(struct udevice *dev)
+{
+	struct dwc3 *priv = dev_get_priv(dev);
+
+	dwc3_remove(priv);
+
+	return 0;
+}
+
+static int dwc3_generic_peripheral_ofdata_to_platdata(struct udevice *dev)
+{
+	struct dwc3 *priv = dev_get_priv(dev);
+	int node = dev_of_offset(dev);
+
+	priv->regs = (void *)devfdt_get_addr(dev);
+	priv->regs += DWC3_GLOBALS_REGS_START;
+
+	priv->maximum_speed = usb_get_maximum_speed(node);
+	if (priv->maximum_speed == USB_SPEED_UNKNOWN) {
+		pr_err("Invalid usb maximum speed\n");
+		return -ENODEV;
+	}
+
+	priv->dr_mode = usb_get_dr_mode(node);
+	if (priv->dr_mode == USB_DR_MODE_UNKNOWN) {
+		pr_err("Invalid usb mode setup\n");
+		return -ENODEV;
+	}
+
+	return 0;
+}
+
+static int dwc3_generic_peripheral_bind(struct udevice *dev)
+{
+	return device_probe(dev);
+}
+
+U_BOOT_DRIVER(dwc3_generic_peripheral) = {
+	.name	= "dwc3-generic-peripheral",
+	.id	= UCLASS_USB_DEV_GENERIC,
+	.ofdata_to_platdata = dwc3_generic_peripheral_ofdata_to_platdata,
+	.probe = dwc3_generic_peripheral_probe,
+	.remove = dwc3_generic_peripheral_remove,
+	.bind = dwc3_generic_peripheral_bind,
+	.platdata_auto_alloc_size = sizeof(struct usb_platdata),
+	.priv_auto_alloc_size = sizeof(struct dwc3),
+	.flags	= DM_FLAG_ALLOC_PRIV_DMA,
+};
+
+static int dwc3_generic_bind(struct udevice *parent)
+{
+	const void *fdt = gd->fdt_blob;
+	int node;
+	int ret;
+
+	for (node = fdt_first_subnode(fdt, dev_of_offset(parent)); node > 0;
+	     node = fdt_next_subnode(fdt, node)) {
+		const char *name = fdt_get_name(fdt, node, NULL);
+		enum usb_dr_mode dr_mode;
+		struct udevice *dev;
+		const char *driver;
+
+		debug("%s: subnode name: %s\n", __func__, name);
+		if (strncmp(name, "dwc3@", 4))
+			continue;
+
+		dr_mode = usb_get_dr_mode(node);
+
+		switch (dr_mode) {
+		case USB_DR_MODE_PERIPHERAL:
+		case USB_DR_MODE_OTG:
+			debug("%s: dr_mode: OTG or Peripheral\n", __func__);
+			driver = "dwc3-generic-peripheral";
+			break;
+		case USB_DR_MODE_HOST:
+			debug("%s: dr_mode: HOST\n", __func__);
+			driver = "dwc3-generic-host";
+			break;
+		default:
+			debug("%s: unsupported dr_mode\n", __func__);
+			return -ENODEV;
+		};
+
+		ret = device_bind_driver_to_node(parent, driver, name,
+						 offset_to_ofnode(node), &dev);
+		if (ret) {
+			debug("%s: not able to bind usb device mode\n",
+			      __func__);
+			return ret;
+		}
+	}
+
+	return 0;
+}
+
+static const struct udevice_id dwc3_generic_ids[] = {
+	{ .compatible = "xlnx,zynqmp-dwc3" },
+	{ }
+};
+
+U_BOOT_DRIVER(dwc3_generic_wrapper) = {
+	.name	= "dwc3-generic-wrapper",
+	.id	= UCLASS_MISC,
+	.of_match = dwc3_generic_ids,
+	.bind = dwc3_generic_bind,
+};

commit 434f82ed082a044e535eaecc190aeb61da50965e
Author: Mugunthan V N <mugunthanvnm@ti.com>
Date:   Fri May 18 13:15:04 2018 +0200

    UPSTREAM: usb: dwc3: Add dwc3_init/remove with DM_USB
    
    The patch is preparing dwc3 core for enabling DM_USB with peripheral
    driver with using driver model support.
    The driver will be bound by the DWC3 wrapper driver based on the
    dr_mode device tree entry.
    
    Change-Id: If18bda57dfccaa3df104df5defa326d930a8abbe
    Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
    (Remove dwc3-omap changes)
    Signed-off-by: Michal Simek <michal.simek@xilinx.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 23ba2d6372e45479106922c6241a7a09707bbe08)

diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index b804facf51..af97f97b57 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -810,3 +810,58 @@ MODULE_ALIAS("platform:dwc3");
 MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
 MODULE_LICENSE("GPL v2");
 MODULE_DESCRIPTION("DesignWare USB3 DRD Controller Driver");
+
+#ifdef CONFIG_DM_USB
+
+int dwc3_init(struct dwc3 *dwc)
+{
+	int ret;
+
+	dwc3_cache_hwparams(dwc);
+
+	ret = dwc3_alloc_event_buffers(dwc, DWC3_EVENT_BUFFERS_SIZE);
+	if (ret) {
+		dev_err(dwc->dev, "failed to allocate event buffers\n");
+		return -ENOMEM;
+	}
+
+	ret = dwc3_core_init(dwc);
+	if (ret) {
+		dev_err(dev, "failed to initialize core\n");
+		goto core_fail;
+	}
+
+	ret = dwc3_event_buffers_setup(dwc);
+	if (ret) {
+		dev_err(dwc->dev, "failed to setup event buffers\n");
+		goto event_fail;
+	}
+
+	ret = dwc3_core_init_mode(dwc);
+	if (ret)
+		goto mode_fail;
+
+	return 0;
+
+mode_fail:
+	dwc3_event_buffers_cleanup(dwc);
+
+event_fail:
+	dwc3_core_exit(dwc);
+
+core_fail:
+	dwc3_free_event_buffers(dwc);
+
+	return ret;
+}
+
+void dwc3_remove(struct dwc3 *dwc)
+{
+	dwc3_core_exit_mode(dwc);
+	dwc3_event_buffers_cleanup(dwc);
+	dwc3_free_event_buffers(dwc);
+	dwc3_core_exit(dwc);
+	kfree(dwc->mem);
+}
+
+#endif
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 0c61c51467..16400061f7 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -724,7 +724,11 @@ struct dwc3 {
 	/* device lock */
 	spinlock_t		lock;
 
+#if defined(__UBOOT__) && defined(CONFIG_DM_USB)
+	struct udevice		*dev;
+#else
 	struct device		*dev;
+#endif
 
 	struct platform_device	*xhci;
 	struct resource		xhci_resources[DWC3_XHCI_RESOURCES_NUM];
@@ -1000,6 +1004,8 @@ struct dwc3_gadget_ep_cmd_params {
 
 /* prototypes */
 int dwc3_gadget_resize_tx_fifos(struct dwc3 *dwc);
+int dwc3_init(struct dwc3 *dwc);
+void dwc3_remove(struct dwc3 *dwc);
 
 #ifdef CONFIG_USB_DWC3_HOST
 int dwc3_host_init(struct dwc3 *dwc);
diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index af71b62a5d..808d6f8ed8 100644
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -2610,7 +2610,7 @@ int dwc3_gadget_init(struct dwc3 *dwc)
 	if (ret)
 		goto err4;
 
-	ret = usb_add_gadget_udc(dwc->dev, &dwc->gadget);
+	ret = usb_add_gadget_udc((struct device *)dwc->dev, &dwc->gadget);
 	if (ret) {
 		dev_err(dwc->dev, "failed to register udc\n");
 		goto err4;

commit b6985a21056ffc08eeb7858a432598be5fe78bb6
Author: Mugunthan V N <mugunthanvnm@ti.com>
Date:   Fri May 18 13:10:27 2018 +0200

    UPSTREAM: drivers: usb: dwc3: remove devm_zalloc from linux_compact
    
    devm_zalloc() is already defined in dm/device.h header, so
    devm_zalloc can be removed from linux_compact.h beader file.
    
    Change-Id: I33e25cbd18245d689d4599ef2a1e46603128c633
    Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
    Signed-off-by: Michal Simek <michal.simek@xilinx.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 0ad3f771b69c0db837f40f6ffd5d41915fc07095)

diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index d073f30cf0..b804facf51 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -20,6 +20,7 @@
 #include <dwc3-uboot.h>
 #include <asm/dma-mapping.h>
 #include <linux/ioport.h>
+#include <dm.h>
 
 #include <linux/usb/ch9.h>
 #include <linux/usb/gadget.h>
@@ -114,7 +115,8 @@ static struct dwc3_event_buffer *dwc3_alloc_one_event_buffer(struct dwc3 *dwc,
 {
 	struct dwc3_event_buffer	*evt;
 
-	evt = devm_kzalloc(dwc->dev, sizeof(*evt), GFP_KERNEL);
+	evt = devm_kzalloc((struct udevice *)dwc->dev, sizeof(*evt),
+			   GFP_KERNEL);
 	if (!evt)
 		return ERR_PTR(-ENOMEM);
 
@@ -634,7 +636,8 @@ int dwc3_uboot_init(struct dwc3_device *dwc3_dev)
 	const void *blob = gd->fdt_blob;
 	int node;
 
-	mem = devm_kzalloc(dev, sizeof(*dwc) + DWC3_ALIGN_MASK, GFP_KERNEL);
+	mem = devm_kzalloc((struct udevice *)dev,
+			   sizeof(*dwc) + DWC3_ALIGN_MASK, GFP_KERNEL);
 	if (!mem)
 		return -ENOMEM;
 
diff --git a/drivers/usb/dwc3/dwc3-omap.c b/drivers/usb/dwc3/dwc3-omap.c
index 3dcc2f4847..b314e80498 100644
--- a/drivers/usb/dwc3/dwc3-omap.c
+++ b/drivers/usb/dwc3/dwc3-omap.c
@@ -17,6 +17,7 @@
 #include <common.h>
 #include <malloc.h>
 #include <asm/io.h>
+#include <dm.h>
 #include <dwc3-omap-uboot.h>
 #include <linux/usb/dwc3-omap.h>
 #include <linux/ioport.h>
@@ -377,7 +378,7 @@ int dwc3_omap_uboot_init(struct dwc3_omap_device *omap_dev)
 	struct device		*dev = NULL;
 	struct dwc3_omap	*omap;
 
-	omap = devm_kzalloc(dev, sizeof(*omap), GFP_KERNEL);
+	omap = devm_kzalloc((struct udevice *)dev, sizeof(*omap), GFP_KERNEL);
 	if (!omap)
 		return -ENOMEM;
 
diff --git a/drivers/usb/dwc3/linux-compat.h b/drivers/usb/dwc3/linux-compat.h
index 5cbe377e3c..3326dbaae4 100644
--- a/drivers/usb/dwc3/linux-compat.h
+++ b/drivers/usb/dwc3/linux-compat.h
@@ -21,9 +21,4 @@ static inline size_t strlcat(char *dest, const char *src, size_t n)
 	return strlen(dest) + strlen(src);
 }
 
-static inline void *devm_kzalloc(struct device *dev, unsigned int size,
-				 unsigned int flags)
-{
-	return kzalloc(size, flags);
-}
 #endif
diff --git a/drivers/usb/dwc3/ti_usb_phy.c b/drivers/usb/dwc3/ti_usb_phy.c
index 218a8e586c..8088afc970 100644
--- a/drivers/usb/dwc3/ti_usb_phy.c
+++ b/drivers/usb/dwc3/ti_usb_phy.c
@@ -24,6 +24,7 @@
 #include <linux/ioport.h>
 #include <asm/io.h>
 #include <asm/arch/sys_proto.h>
+#include <dm.h>
 
 #include "linux-compat.h"
 

commit 1488d4b92d5720da80aff18dfe1165fefe9cf4fa
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Fri Oct 13 19:21:56 2017 +0900

    UPSTREAM: usb: dwc3-uniphier: replace <common.h> with <linux/bitops.h>
    
    Including <common.h> pulls in a lot of bloat.  What this driver needs
    is BIT(), so replace it with <linux/bitops.h>
    
    Change-Id: Ib384a74db503c5fa324dcfd119a095595ba8c663
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Acked-by: Marek Vasut <marex@denx.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 4bb3dac77234b43ce188e2bcb6b439351bea5134)

diff --git a/drivers/usb/dwc3/dwc3-uniphier.c b/drivers/usb/dwc3/dwc3-uniphier.c
index 0d13770d40..25b17a85d0 100644
--- a/drivers/usb/dwc3/dwc3-uniphier.c
+++ b/drivers/usb/dwc3/dwc3-uniphier.c
@@ -7,8 +7,8 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
-#include <common.h>
 #include <dm.h>
+#include <linux/bitops.h>
 #include <linux/errno.h>
 #include <linux/io.h>
 #include <linux/sizes.h>

commit ecf8ea9ffa9e73c4ed935261211a19e89880530b
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Thu Sep 28 22:01:00 2017 +0900

    UPSTREAM: usb: dwc3: add UniPhier specific glue layer
    
    Add UniPhier platform specific glue layer to support USB3 Host mode
    on Synopsys DWC3 IP.
    
    Change-Id: I51194b1b15860f2813029b53ad7e5deec63344ff
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Reviewed-by: Marek Vasut <marex@denx.de>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit dc04b35ef2c8c04cb362758ec467777348ef3f15)

diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig
index a291ceb6ae..ae7fc1c630 100644
--- a/drivers/usb/dwc3/Kconfig
+++ b/drivers/usb/dwc3/Kconfig
@@ -37,6 +37,13 @@ config USB_DWC3_OMAP
 
 	  Say 'Y' here if you have one such device
 
+config USB_DWC3_UNIPHIER
+	bool "DesignWare USB3 Host Support on UniPhier Platforms"
+	depends on ARCH_UNIPHIER && USB_XHCI_DWC3
+	help
+	  Support of USB2/3 functionality in Socionext UniPhier platforms.
+	  Say 'Y' here if you have one such device.
+
 menu "PHY Subsystem"
 
 config USB_DWC3_PHY_OMAP
diff --git a/drivers/usb/dwc3/Makefile b/drivers/usb/dwc3/Makefile
index 2964bae0d8..51497768b2 100644
--- a/drivers/usb/dwc3/Makefile
+++ b/drivers/usb/dwc3/Makefile
@@ -9,5 +9,6 @@ dwc3-y					:= core.o
 obj-$(CONFIG_USB_DWC3_GADGET)		+= gadget.o ep0.o
 
 obj-$(CONFIG_USB_DWC3_OMAP)		+= dwc3-omap.o
+obj-$(CONFIG_USB_DWC3_UNIPHIER)		+= dwc3-uniphier.o
 obj-$(CONFIG_USB_DWC3_PHY_OMAP)		+= ti_usb_phy.o
 obj-$(CONFIG_USB_DWC3_PHY_SAMSUNG)	+= samsung_usb_phy.o
diff --git a/drivers/usb/dwc3/dwc3-uniphier.c b/drivers/usb/dwc3/dwc3-uniphier.c
new file mode 100644
index 0000000000..0d13770d40
--- /dev/null
+++ b/drivers/usb/dwc3/dwc3-uniphier.c
@@ -0,0 +1,120 @@
+/*
+ * UniPhier Specific Glue Layer for DWC3
+ *
+ * Copyright (C) 2016-2017 Socionext Inc.
+ *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <linux/errno.h>
+#include <linux/io.h>
+#include <linux/sizes.h>
+
+#define UNIPHIER_PRO4_DWC3_RESET	0x40
+#define   UNIPHIER_PRO4_DWC3_RESET_XIOMMU	BIT(5)
+#define   UNIPHIER_PRO4_DWC3_RESET_XLINK	BIT(4)
+#define   UNIPHIER_PRO4_DWC3_RESET_PHY_SS	BIT(2)
+
+#define UNIPHIER_PRO5_DWC3_RESET	0x00
+#define   UNIPHIER_PRO5_DWC3_RESET_PHY_S1	BIT(17)
+#define   UNIPHIER_PRO5_DWC3_RESET_PHY_S0	BIT(16)
+#define   UNIPHIER_PRO5_DWC3_RESET_XLINK	BIT(15)
+#define   UNIPHIER_PRO5_DWC3_RESET_XIOMMU	BIT(14)
+
+#define UNIPHIER_PXS2_DWC3_RESET	0x00
+#define   UNIPHIER_PXS2_DWC3_RESET_XLINK	BIT(15)
+
+static int uniphier_pro4_dwc3_init(void __iomem *regs)
+{
+	u32 tmp;
+
+	tmp = readl(regs + UNIPHIER_PRO4_DWC3_RESET);
+	tmp &= ~UNIPHIER_PRO4_DWC3_RESET_PHY_SS;
+	tmp |= UNIPHIER_PRO4_DWC3_RESET_XIOMMU | UNIPHIER_PRO4_DWC3_RESET_XLINK;
+	writel(tmp, regs + UNIPHIER_PRO4_DWC3_RESET);
+
+	return 0;
+}
+
+static int uniphier_pro5_dwc3_init(void __iomem *regs)
+{
+	u32 tmp;
+
+	tmp = readl(regs + UNIPHIER_PRO5_DWC3_RESET);
+	tmp &= ~(UNIPHIER_PRO5_DWC3_RESET_PHY_S1 |
+		 UNIPHIER_PRO5_DWC3_RESET_PHY_S0);
+	tmp |= UNIPHIER_PRO5_DWC3_RESET_XLINK | UNIPHIER_PRO5_DWC3_RESET_XIOMMU;
+	writel(tmp, regs + UNIPHIER_PRO5_DWC3_RESET);
+
+	return 0;
+}
+
+static int uniphier_pxs2_dwc3_init(void __iomem *regs)
+{
+	u32 tmp;
+
+	tmp = readl(regs + UNIPHIER_PXS2_DWC3_RESET);
+	tmp |= UNIPHIER_PXS2_DWC3_RESET_XLINK;
+	writel(tmp, regs + UNIPHIER_PXS2_DWC3_RESET);
+
+	return 0;
+}
+
+static int uniphier_dwc3_probe(struct udevice *dev)
+{
+	fdt_addr_t base;
+	void __iomem *regs;
+	int (*init)(void __iomem *regs);
+	int ret;
+
+	base = devfdt_get_addr(dev);
+	if (base == FDT_ADDR_T_NONE)
+		return -EINVAL;
+
+	regs = ioremap(base, SZ_32K);
+	if (!regs)
+		return -ENOMEM;
+
+	init = (typeof(init))dev_get_driver_data(dev);
+	ret = init(regs);
+	if (ret)
+		dev_err(dev, "failed to init glue layer\n");
+
+	iounmap(regs);
+
+	return ret;
+}
+
+static const struct udevice_id uniphier_dwc3_match[] = {
+	{
+		.compatible = "socionext,uniphier-pro4-dwc3",
+		.data = (ulong)uniphier_pro4_dwc3_init,
+	},
+	{
+		.compatible = "socionext,uniphier-pro5-dwc3",
+		.data = (ulong)uniphier_pro5_dwc3_init,
+	},
+	{
+		.compatible = "socionext,uniphier-pxs2-dwc3",
+		.data = (ulong)uniphier_pxs2_dwc3_init,
+	},
+	{
+		.compatible = "socionext,uniphier-ld20-dwc3",
+		.data = (ulong)uniphier_pxs2_dwc3_init,
+	},
+	{
+		.compatible = "socionext,uniphier-pxs3-dwc3",
+		.data = (ulong)uniphier_pxs2_dwc3_init,
+	},
+	{ /* sentinel */ }
+};
+
+U_BOOT_DRIVER(usb_xhci) = {
+	.name = "uniphier-dwc3",
+	.id = UCLASS_SIMPLE_BUS,
+	.of_match = uniphier_dwc3_match,
+	.probe = uniphier_dwc3_probe,
+};

commit 7832d01e496384987f5f57eae162c86fed0090de
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Sun Oct 1 06:19:39 2017 -0700

    UPSTREAM: usb: sandbox: Fix emulator device select logic in usb_emul_find_devnum()
    
    Current emulator select logic in usb_emul_find_devnum() is to test
    the USB address. The USB address of the device being enumerated is
    initialized to zero at the beginning of the enumeration process in
    usb_setup_device(). At this point, the saved USB address in the
    platform data has not been assigned to any valid USB address either.
    This means: the logic will select an emulator device according to
    its sequence of declaring order in the device tree. Take test.dts
    for example, flash-stick@0 will be selected before flash-stick@1.
    But unfortunately such logic is wrong.
    
    In fact USB devices show up in a random order during the enumeration
    which means usb_emul_find_devnum() may be called on port 3 for keyb@3
    before on port 0 for flash-stick@0.
    
    To fix this, we introduce a new emulator uclass specific platdata
    to store the USB device's port number on its parent hub, and update
    the logic to test the port number instead.
    
    Change-Id: Idbe23382957153d66a4c45f5f7789e002cd65a2f
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 84aa8536f0197e439832f56cc7b554af488fc3c8)

diff --git a/drivers/usb/emul/sandbox_hub.c b/drivers/usb/emul/sandbox_hub.c
index 4a192055ab..9a0f47b81c 100644
--- a/drivers/usb/emul/sandbox_hub.c
+++ b/drivers/usb/emul/sandbox_hub.c
@@ -307,8 +307,10 @@ static int sandbox_hub_bind(struct udevice *dev)
 static int sandbox_child_post_bind(struct udevice *dev)
 {
 	struct sandbox_hub_platdata *plat = dev_get_parent_platdata(dev);
+	struct usb_emul_platdata *emul = dev_get_uclass_platdata(dev);
 
 	plat->port = dev_read_u32_default(dev, "reg", -1);
+	emul->port1 = plat->port + 1;
 
 	return 0;
 }
diff --git a/drivers/usb/emul/usb-emul-uclass.c b/drivers/usb/emul/usb-emul-uclass.c
index 0b036681cc..fbe11f3135 100644
--- a/drivers/usb/emul/usb-emul-uclass.c
+++ b/drivers/usb/emul/usb-emul-uclass.c
@@ -106,7 +106,7 @@ static int usb_emul_get_descriptor(struct usb_dev_platdata *plat, int value,
 	return upto ? upto : length ? -EIO : 0;
 }
 
-static int usb_emul_find_devnum(int devnum, struct udevice **emulp)
+static int usb_emul_find_devnum(int devnum, int port1, struct udevice **emulp)
 {
 	struct udevice *dev;
 	struct uclass *uc;
@@ -119,7 +119,37 @@ static int usb_emul_find_devnum(int devnum, struct udevice **emulp)
 	uclass_foreach_dev(dev, uc) {
 		struct usb_dev_platdata *udev = dev_get_parent_platdata(dev);
 
-		if (udev->devnum == devnum) {
+		/*
+		 * devnum is initialzied to zero at the beginning of the
+		 * enumeration process in usb_setup_device(). At this
+		 * point, udev->devnum has not been assigned to any valid
+		 * USB address either, so we can't rely on the comparison
+		 * result between udev->devnum and devnum to select an
+		 * emulator device.
+		 */
+		if (!devnum) {
+			struct usb_emul_platdata *plat;
+
+			/*
+			 * If the parent is sandbox USB controller, we are
+			 * the root hub. And there is only one root hub
+			 * in the system.
+			 */
+			if (device_get_uclass_id(dev->parent) == UCLASS_USB) {
+				debug("%s: Found emulator '%s'\n",
+				      __func__, dev->name);
+				*emulp = dev;
+				return 0;
+			}
+
+			plat = dev_get_uclass_platdata(dev);
+			if (plat->port1 == port1) {
+				debug("%s: Found emulator '%s', port %d\n",
+				      __func__, dev->name, port1);
+				*emulp = dev;
+				return 0;
+			}
+		} else if (udev->devnum == devnum) {
 			debug("%s: Found emulator '%s', addr %d\n", __func__,
 			      dev->name, udev->devnum);
 			*emulp = dev;
@@ -131,18 +161,19 @@ static int usb_emul_find_devnum(int devnum, struct udevice **emulp)
 	return -ENOENT;
 }
 
-int usb_emul_find(struct udevice *bus, ulong pipe, struct udevice **emulp)
+int usb_emul_find(struct udevice *bus, ulong pipe, int port1,
+		  struct udevice **emulp)
 {
 	int devnum = usb_pipedevice(pipe);
 
-	return usb_emul_find_devnum(devnum, emulp);
+	return usb_emul_find_devnum(devnum, port1, emulp);
 }
 
 int usb_emul_find_for_dev(struct udevice *dev, struct udevice **emulp)
 {
 	struct usb_dev_platdata *udev = dev_get_parent_platdata(dev);
 
-	return usb_emul_find_devnum(udev->devnum, emulp);
+	return usb_emul_find_devnum(udev->devnum, 0, emulp);
 }
 
 int usb_emul_control(struct udevice *emul, struct usb_device *udev,
@@ -267,6 +298,7 @@ UCLASS_DRIVER(usb_emul) = {
 	.id		= UCLASS_USB_EMUL,
 	.name		= "usb_emul",
 	.post_bind	= dm_scan_fdt_dev,
+	.per_device_platdata_auto_alloc_size = sizeof(struct usb_emul_platdata),
 	.per_child_auto_alloc_size = sizeof(struct usb_device),
 	.per_child_platdata_auto_alloc_size = sizeof(struct usb_dev_platdata),
 };
diff --git a/drivers/usb/host/usb-sandbox.c b/drivers/usb/host/usb-sandbox.c
index f85d36ba42..15055b351a 100644
--- a/drivers/usb/host/usb-sandbox.c
+++ b/drivers/usb/host/usb-sandbox.c
@@ -50,7 +50,7 @@ static int sandbox_submit_control(struct udevice *bus,
 
 	/* Just use child of dev as emulator? */
 	debug("%s: bus=%s\n", __func__, bus->name);
-	ret = usb_emul_find(bus, pipe, &emul);
+	ret = usb_emul_find(bus, pipe, udev->portnr, &emul);
 	usbmon_trace(bus, pipe, setup, emul);
 	if (ret)
 		return ret;
@@ -83,7 +83,7 @@ static int sandbox_submit_bulk(struct udevice *bus, struct usb_device *udev,
 
 	/* Just use child of dev as emulator? */
 	debug("%s: bus=%s\n", __func__, bus->name);
-	ret = usb_emul_find(bus, pipe, &emul);
+	ret = usb_emul_find(bus, pipe, udev->portnr, &emul);
 	usbmon_trace(bus, pipe, NULL, emul);
 	if (ret)
 		return ret;
@@ -109,7 +109,7 @@ static int sandbox_submit_int(struct udevice *bus, struct usb_device *udev,
 
 	/* Just use child of dev as emulator? */
 	debug("%s: bus=%s\n", __func__, bus->name);
-	ret = usb_emul_find(bus, pipe, &emul);
+	ret = usb_emul_find(bus, pipe, udev->portnr, &emul);
 	usbmon_trace(bus, pipe, NULL, emul);
 	if (ret)
 		return ret;
diff --git a/include/usb.h b/include/usb.h
index 48541f4dff..342f6f0516 100644
--- a/include/usb.h
+++ b/include/usb.h
@@ -652,6 +652,18 @@ struct usb_bus_priv {
 	bool companion;
 };
 
+/**
+ * struct usb_emul_platdata - platform data about the USB emulator
+ *
+ * Given a USB emulator (UCLASS_USB_EMUL) 'dev', this is
+ * dev_get_uclass_platdata(dev).
+ *
+ * @port1:	USB emulator device port number on the parent hub
+ */
+struct usb_emul_platdata {
+	int port1;	/* Port number (numbered from 1) */
+};
+
 /**
  * struct dm_usb_ops - USB controller operations
  *
@@ -1023,14 +1035,16 @@ int usb_emul_int(struct udevice *emul, struct usb_device *udev,
 /**
  * usb_emul_find() - Find an emulator for a particular device
  *
- * Check @pipe to find a device number on bus @bus and return it.
+ * Check @pipe and @port1 to find a device number on bus @bus and return it.
  *
  * @bus:	USB bus (controller)
  * @pipe:	Describes pipe being used, and includes the device number
+ * @port1:	Describes port number on the parent hub
  * @emulp:	Returns pointer to emulator, or NULL if not found
  * @return 0 if found, -ve on error
  */
-int usb_emul_find(struct udevice *bus, ulong pipe, struct udevice **emulp);
+int usb_emul_find(struct udevice *bus, ulong pipe, int port1,
+		  struct udevice **emulp);
 
 /**
  * usb_emul_find_for_dev() - Find an emulator for a particular device

commit 20419987e80732c2e6b34ef551b173ab6cc50607
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Sun Oct 1 06:19:38 2017 -0700

    UPSTREAM: usb: sandbox: Initialize root hub's device speed to high speed
    
    At present 'usb tree' shows that the root hub on the Sandbox USB
    controller is at full speed. But its device descriptor says it's
    USB 2.0, so let's report it as a high speed device.
    
    Change-Id: I95758bc8e0b3730286d461ff1136b797b3a10abd
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 813f74ea47d0f77f809d85619153923a99b07222)

diff --git a/drivers/usb/host/usb-sandbox.c b/drivers/usb/host/usb-sandbox.c
index 5e3d96c208..f85d36ba42 100644
--- a/drivers/usb/host/usb-sandbox.c
+++ b/drivers/usb/host/usb-sandbox.c
@@ -12,6 +12,10 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+struct sandbox_usb_ctrl {
+	int rootdev;
+};
+
 static void usbmon_trace(struct udevice *bus, ulong pipe,
 			 struct devrequest *setup, struct udevice *emul)
 {
@@ -40,6 +44,7 @@ static int sandbox_submit_control(struct udevice *bus,
 				      void *buffer, int length,
 				      struct devrequest *setup)
 {
+	struct sandbox_usb_ctrl *ctrl = dev_get_priv(bus);
 	struct udevice *emul;
 	int ret;
 
@@ -49,6 +54,14 @@ static int sandbox_submit_control(struct udevice *bus,
 	usbmon_trace(bus, pipe, setup, emul);
 	if (ret)
 		return ret;
+
+	if (usb_pipedevice(pipe) == ctrl->rootdev) {
+		if (setup->request == USB_REQ_SET_ADDRESS) {
+			debug("%s: Set root hub's USB address\n", __func__);
+			ctrl->rootdev = le16_to_cpu(setup->value);
+		}
+	}
+
 	ret = usb_emul_control(emul, udev, pipe, buffer, length, setup);
 	if (ret < 0) {
 		debug("ret=%d\n", ret);
@@ -107,6 +120,16 @@ static int sandbox_submit_int(struct udevice *bus, struct usb_device *udev,
 
 static int sandbox_alloc_device(struct udevice *dev, struct usb_device *udev)
 {
+	struct sandbox_usb_ctrl *ctrl = dev_get_priv(dev);
+
+	/*
+	 * Root hub will be the first device to be initailized.
+	 * If this device is a root hub, initialize its device speed
+	 * to high speed as we are a USB 2.0 controller.
+	 */
+	if (ctrl->rootdev == 0)
+		udev->speed = USB_SPEED_HIGH;
+
 	return 0;
 }
 
@@ -133,4 +156,5 @@ U_BOOT_DRIVER(usb_sandbox) = {
 	.of_match = sandbox_usb_ids,
 	.probe = sandbox_usb_probe,
 	.ops	= &sandbox_usb_ops,
+	.priv_auto_alloc_size = sizeof(struct sandbox_usb_ctrl),
 };

commit 929b32f8c5346ccfa4cd6ce1f1c7bddc3cea75a3
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Sun Oct 1 06:19:44 2017 -0700

    UPSTREAM: dm: usb: emul: Drop usb_emul_reset()
    
    With the root hub unbinding in usb_stop(), there is no need to do
    a Sandbox-specific reset operation. usb_emul_reset() is no longer
    used anywhere, drop it.
    
    Change-Id: I07087b328686bcf0020a938fcd4ea8ac74396b9b
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit ad56e4b684a97565cdce15c28df1ccff9032d594)

diff --git a/drivers/usb/emul/usb-emul-uclass.c b/drivers/usb/emul/usb-emul-uclass.c
index 421a411888..0b036681cc 100644
--- a/drivers/usb/emul/usb-emul-uclass.c
+++ b/drivers/usb/emul/usb-emul-uclass.c
@@ -263,14 +263,6 @@ int usb_emul_setup_device(struct udevice *dev, struct usb_string *strings,
 	return 0;
 }
 
-void usb_emul_reset(struct udevice *dev)
-{
-	struct usb_dev_platdata *plat = dev_get_parent_platdata(dev);
-
-	plat->devnum = 0;
-	plat->configno = 0;
-}
-
 UCLASS_DRIVER(usb_emul) = {
 	.id		= UCLASS_USB_EMUL,
 	.name		= "usb_emul",
diff --git a/drivers/usb/host/usb-uclass.c b/drivers/usb/host/usb-uclass.c
index bfc0556d7d..4e40f4bc3d 100644
--- a/drivers/usb/host/usb-uclass.c
+++ b/drivers/usb/host/usb-uclass.c
@@ -194,17 +194,6 @@ int usb_stop(void)
 		}
 	}
 
-#ifdef CONFIG_SANDBOX
-	struct udevice *dev;
-
-	/* Reset all enulation devices */
-	ret = uclass_get(UCLASS_USB_EMUL, &uc);
-	if (ret)
-		return ret;
-
-	uclass_foreach_dev(dev, uc)
-		usb_emul_reset(dev);
-#endif
 #ifdef CONFIG_USB_STORAGE
 	usb_stor_reset();
 #endif
diff --git a/include/usb.h b/include/usb.h
index 1d802754ed..48541f4dff 100644
--- a/include/usb.h
+++ b/include/usb.h
@@ -1053,14 +1053,6 @@ int usb_emul_find_for_dev(struct udevice *dev, struct udevice **emulp);
 struct usb_generic_descriptor **usb_emul_find_descriptor(
 		struct usb_generic_descriptor **ptr, int type, int index);
 
-/**
- * usb_emul_reset() - Reset all emulators ready for use
- *
- * Clear out any address information in the emulators and make then ready for
- * a new USB scan
- */
-void usb_emul_reset(struct udevice *dev);
-
 /**
  * usb_show_tree() - show the USB device tree
  *

commit dc007f395f7c63d8d5ee99b7ca6ef8644abff64d
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Sun Oct 1 06:19:41 2017 -0700

    UPSTREAM: usb: emul: hub: Report the actual device speed of the emulation device
    
    At present the usb hub emulator always reports its downstream port
    speed as full speed. Actually it is high speed for sandbox-flash,
    and low speed for sandbox-keyb. We can determine the device speed
    by checking its device descriptor bcdUSB field, and do the proper
    hub port status report based on that.
    
    Change-Id: I1b0848d856fb0e3351bfb5c678cc387d5bb5ca9f
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit d7771f0c5cd429286c7555360d779d21568e3ba0)

diff --git a/drivers/usb/emul/sandbox_hub.c b/drivers/usb/emul/sandbox_hub.c
index 9ed700036e..4a192055ab 100644
--- a/drivers/usb/emul/sandbox_hub.c
+++ b/drivers/usb/emul/sandbox_hub.c
@@ -121,9 +121,12 @@ struct sandbox_hub_priv {
 	int change[SANDBOX_NUM_PORTS];
 };
 
-static struct udevice *hub_find_device(struct udevice *hub, int port)
+static struct udevice *hub_find_device(struct udevice *hub, int port,
+				       enum usb_device_speed *speed)
 {
 	struct udevice *dev;
+	struct usb_generic_descriptor **gen_desc;
+	struct usb_device_descriptor **dev_desc;
 
 	for (device_find_first_child(hub, &dev);
 	     dev;
@@ -131,8 +134,27 @@ static struct udevice *hub_find_device(struct udevice *hub, int port)
 		struct sandbox_hub_platdata *plat;
 
 		plat = dev_get_parent_platdata(dev);
-		if (plat->port == port)
+		if (plat->port == port) {
+			gen_desc = plat->plat.desc_list;
+			gen_desc = usb_emul_find_descriptor(gen_desc,
+							    USB_DT_DEVICE, 0);
+			dev_desc = (struct usb_device_descriptor **)gen_desc;
+
+			switch (le16_to_cpu((*dev_desc)->bcdUSB)) {
+			case 0x0100:
+				*speed = USB_SPEED_LOW;
+				break;
+			case 0x0101:
+				*speed = USB_SPEED_FULL;
+				break;
+			case 0x0200:
+			default:
+				*speed = USB_SPEED_HIGH;
+				break;
+			}
+
 			return dev;
+		}
 	}
 
 	return NULL;
@@ -146,7 +168,8 @@ static int clrset_post_state(struct udevice *hub, int port, int clear, int set)
 	int ret = 0;
 
 	if ((clear | set) & USB_PORT_STAT_POWER) {
-		struct udevice *dev = hub_find_device(hub, port);
+		enum usb_device_speed speed;
+		struct udevice *dev = hub_find_device(hub, port, &speed);
 
 		if (dev) {
 			if (set & USB_PORT_STAT_POWER) {
@@ -156,6 +179,10 @@ static int clrset_post_state(struct udevice *hub, int port, int clear, int set)
 				if (!ret) {
 					set |= USB_PORT_STAT_CONNECTION |
 						USB_PORT_STAT_ENABLE;
+					if (speed == USB_SPEED_LOW)
+						set |= USB_PORT_STAT_LOW_SPEED;
+					else if (speed == USB_SPEED_HIGH)
+						set |= USB_PORT_STAT_HIGH_SPEED;
 				}
 
 			} else if (clear & USB_PORT_STAT_POWER) {

commit 8e288127682e96ff6626e869c72c8af3ec7960d4
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Sun Oct 1 06:19:40 2017 -0700

    UPSTREAM: usb: emul: Expose find_descriptor() as a public API
    
    This can be useful outside of the sandbox usb emulation uclass
    driver. Expose it as a public API with a proper prefix (usb_emul_).
    
    Change-Id: Ic7819416c6e4b6201aaa7ea46d033002aed5ad06
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 848436a48d21447fc78bef67a4cbf11392536de2)

diff --git a/drivers/usb/emul/usb-emul-uclass.c b/drivers/usb/emul/usb-emul-uclass.c
index e4a267bf00..421a411888 100644
--- a/drivers/usb/emul/usb-emul-uclass.c
+++ b/drivers/usb/emul/usb-emul-uclass.c
@@ -52,7 +52,7 @@ static int usb_emul_get_string(struct usb_string *strings, int index,
 	return -EINVAL;
 }
 
-static struct usb_generic_descriptor **find_descriptor(
+struct usb_generic_descriptor **usb_emul_find_descriptor(
 		struct usb_generic_descriptor **ptr, int type, int index)
 {
 	debug("%s: type=%x, index=%d\n", __func__, type, index);
@@ -91,8 +91,7 @@ static int usb_emul_get_descriptor(struct usb_dev_platdata *plat, int value,
 					   length);
 	}
 
-	ptr = find_descriptor((struct usb_generic_descriptor **)plat->desc_list,
-			      type, index);
+	ptr = usb_emul_find_descriptor(plat->desc_list, type, index);
 	if (!ptr) {
 		debug("%s: Could not find descriptor type %d, index %d\n",
 		      __func__, type, index);
diff --git a/include/usb.h b/include/usb.h
index 1563c9abf3..1d802754ed 100644
--- a/include/usb.h
+++ b/include/usb.h
@@ -1042,6 +1042,17 @@ int usb_emul_find(struct udevice *bus, ulong pipe, struct udevice **emulp);
  */
 int usb_emul_find_for_dev(struct udevice *dev, struct udevice **emulp);
 
+/**
+ * usb_emul_find_descriptor() - Find a USB descriptor of a particular device
+ *
+ * @ptr:	a pointer to a list of USB descriptor pointers
+ * @type:	type of USB descriptor to find
+ * @index:	if @type is USB_DT_CONFIG, this is the configuration value
+ * @return a pointer to the USB descriptor found, NULL if not found
+ */
+struct usb_generic_descriptor **usb_emul_find_descriptor(
+		struct usb_generic_descriptor **ptr, int type, int index);
+
 /**
  * usb_emul_reset() - Reset all emulators ready for use
  *

commit 879f76fc345a10ccae2e5023f10003318c194d6f
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Sun Oct 1 06:19:36 2017 -0700

    UPSTREAM: usb: emul: Remove maxpacketsize in usb_emul_setup_device()
    
    This parameter is never used.
    
    Change-Id: I83dd997f267bc0f7ccabd3ba360df68163e2e634
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
    (cherry picked from commit 98b639fc503e16cffa902d3ab89b29b9b5dcbf57)

diff --git a/drivers/usb/emul/sandbox_flash.c b/drivers/usb/emul/sandbox_flash.c
index 98d20c0bc1..2f84b360ec 100644
--- a/drivers/usb/emul/sandbox_flash.c
+++ b/drivers/usb/emul/sandbox_flash.c
@@ -390,8 +390,7 @@ static int sandbox_flash_bind(struct udevice *dev)
 	fs[2].id = STRINGID_SERIAL;
 	fs[2].s = dev->name;
 
-	return usb_emul_setup_device(dev, PACKET_SIZE_64, plat->flash_strings,
-				     flash_desc_list);
+	return usb_emul_setup_device(dev, plat->flash_strings, flash_desc_list);
 }
 
 static int sandbox_flash_probe(struct udevice *dev)
diff --git a/drivers/usb/emul/sandbox_hub.c b/drivers/usb/emul/sandbox_hub.c
index 1432858fd5..9ed700036e 100644
--- a/drivers/usb/emul/sandbox_hub.c
+++ b/drivers/usb/emul/sandbox_hub.c
@@ -274,8 +274,7 @@ static int sandbox_hub_submit_control_msg(struct udevice *bus,
 
 static int sandbox_hub_bind(struct udevice *dev)
 {
-	return usb_emul_setup_device(dev, PACKET_SIZE_64, hub_strings,
-				     hub_desc_list);
+	return usb_emul_setup_device(dev, hub_strings, hub_desc_list);
 }
 
 static int sandbox_child_post_bind(struct udevice *dev)
diff --git a/drivers/usb/emul/sandbox_keyb.c b/drivers/usb/emul/sandbox_keyb.c
index 27359851df..cff017668f 100644
--- a/drivers/usb/emul/sandbox_keyb.c
+++ b/drivers/usb/emul/sandbox_keyb.c
@@ -208,8 +208,7 @@ static int sandbox_keyb_bind(struct udevice *dev)
 	fs[2].id = STRINGID_SERIAL;
 	fs[2].s = dev->name;
 
-	return usb_emul_setup_device(dev, PACKET_SIZE_8, plat->keyb_strings,
-				     keyb_desc_list);
+	return usb_emul_setup_device(dev, plat->keyb_strings, keyb_desc_list);
 }
 
 static int sandbox_keyb_probe(struct udevice *dev)
diff --git a/drivers/usb/emul/usb-emul-uclass.c b/drivers/usb/emul/usb-emul-uclass.c
index 6e03c1e0d9..e4a267bf00 100644
--- a/drivers/usb/emul/usb-emul-uclass.c
+++ b/drivers/usb/emul/usb-emul-uclass.c
@@ -229,8 +229,8 @@ int usb_emul_int(struct udevice *emul, struct usb_device *udev,
 	return ops->interrupt(emul, udev, pipe, buffer, length, interval);
 }
 
-int usb_emul_setup_device(struct udevice *dev, int maxpacketsize,
-			  struct usb_string *strings, void **desc_list)
+int usb_emul_setup_device(struct udevice *dev, struct usb_string *strings,
+			  void **desc_list)
 {
 	struct usb_dev_platdata *plat = dev_get_parent_platdata(dev);
 	struct usb_generic_descriptor **ptr;
diff --git a/include/usb.h b/include/usb.h
index 0ddc0822b4..1563c9abf3 100644
--- a/include/usb.h
+++ b/include/usb.h
@@ -976,7 +976,6 @@ int usb_get_max_xfer_size(struct usb_device *dev, size_t *size);
  * the USB emulation uclass about the features of the emulator.
  *
  * @dev:		Emulation device
- * @maxpacketsize:	Maximum packet size (e.g. PACKET_SIZE_64)
  * @strings:		List of USB string descriptors, terminated by a NULL
  *			entry
  * @desc_list:		List of points or USB descriptors, terminated by NULL.
@@ -984,8 +983,8 @@ int usb_get_max_xfer_size(struct usb_device *dev, size_t *size);
  *			and others follow on after that.
  * @return 0 if OK, -ENOSYS if not implemented, other -ve on error
  */
-int usb_emul_setup_device(struct udevice *dev, int maxpacketsize,
-			  struct usb_string *strings, void **desc_list);
+int usb_emul_setup_device(struct udevice *dev, struct usb_string *strings,
+			  void **desc_list);
 
 /**
  * usb_emul_control() - Send a control packet to an emulator

commit 9cde1b1d0397a62bc2c5c1bbee2f9f7a41208b8f
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue Dec 31 14:46:05 2019 +0800

    test: storage: support rkflash
    
    1.Support RKNANDC_NAND, RKSFC_NAND and RKSFC_NOR;
    2.Adjust Userdata part size to reasonable value.
    
    Change-Id: I20a4264848ba4ccd8385e9dee36cd16391cd517e
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/test/rockchip/test-storage.c b/test/rockchip/test-storage.c
index 175508b70f..5003d117df 100644
--- a/test/rockchip/test-storage.c
+++ b/test/rockchip/test-storage.c
@@ -23,22 +23,22 @@
 #include "test-rockchip.h"
 
 #define DEFAULT_STORAGE_RW_PART		"userdata"
-enum if_type blk_get_type_by_name(char* devtype)
+static enum if_type blk_get_type_by_name_and_num(char *devtype, int devnum)
 {
 	int type = -1;
 
 	if (!strcmp(devtype, "mmc"))
 		type = IF_TYPE_MMC;
-#ifdef CONFIG_RKNAND
+#if defined(CONFIG_RKNAND) || defined(CONFIG_RKNANDC_NAND)
 	else if (!strcmp(devtype, "rknand"))
 		type = IF_TYPE_RKNAND;
 #endif
 #ifdef CONFIG_RKSFC_NAND
-	else if (!strcmp(devtype, "spinand"))
+	else if (!strcmp(devtype, "rksfc") && devnum == 0)
 		type = IF_TYPE_SPINAND;
 #endif
 #ifdef CONFIG_RKSFC_NOR
-	else if (!strcmp(devtype, "spinor"))
+	else if (!strcmp(devtype, "rksfc") && devnum == 1)
 		type = IF_TYPE_SPINOR;
 #endif
 #ifdef CONFIG_DM_RAMDISK
@@ -55,7 +55,13 @@ enum if_type blk_get_type_by_name(char* devtype)
 	return type;
 }
 
-#if defined(CONFIG_MMC) || defined(CONFIG_RKNAND) || defined(CONFIG_DM_RAMDISK) || defined(CONFIG_USB_HOST)
+#if defined(CONFIG_MMC) ||\
+	defined(CONFIG_RKNAND) ||\
+	defined(CONFIG_DM_RAMDISK) ||\
+	defined(CONFIG_USB_HOST) ||\
+	defined(CONFIG_RKNANDC_NAND) ||\
+	defined(CONFIG_RKSFC_NAND) ||\
+	defined(CONFIG_RKSFC_NOR)
 static int do_test_storage(cmd_tbl_t *cmdtp, int flag,
 			   int argc, char *const argv[],
 			   const char *devtype,
@@ -96,7 +102,8 @@ static int do_test_storage(cmd_tbl_t *cmdtp, int flag,
 	} else {
 		int if_type;
 		int num = simple_strtoul(devnum, NULL, 10);
-		if_type = blk_get_type_by_name((char *)devtype);
+
+		if_type = blk_get_type_by_name_and_num((char *)devtype, num);
 		dev_desc = blk_get_devnum_by_type(if_type, num);
 	}
 	if (!dev_desc) {
@@ -114,6 +121,8 @@ static int do_test_storage(cmd_tbl_t *cmdtp, int flag,
 
 	/* 32MB */
 	sector = part.start;
+	if (part.start + part.size > dev_desc->lba)
+		part.size = dev_desc->lba - part.start;
 	blocks = part.size > 0x10000 ? 0x10000 : part.size;
 	round  = 4;
 
@@ -126,7 +135,6 @@ static int do_test_storage(cmd_tbl_t *cmdtp, int flag,
 	       sector, sector + blocks,
 	       (blocks * dev_desc->blksz) >> 20, round);
 
-
 	/* 3. Prepare memory */
 #ifdef CONFIG_RKIMG_BOOTLOADER
 	w_buf = sysmem_alloc_by_name("storage_w", blocks * dev_desc->blksz);
@@ -259,7 +267,7 @@ static int do_test_sdmmc(cmd_tbl_t *cmdtp, int flag,
 }
 #endif
 
-#ifdef CONFIG_RKNAND
+#if defined(CONFIG_RKNAND) || defined(CONFIG_RKNANDC_NAND)
 static int do_test_rknand(cmd_tbl_t *cmdtp, int flag,
 			  int argc, char *const argv[])
 {
@@ -267,6 +275,22 @@ static int do_test_rknand(cmd_tbl_t *cmdtp, int flag,
 }
 #endif
 
+#ifdef CONFIG_RKSFC_NAND
+static int do_test_rkflash_spinand(cmd_tbl_t *cmdtp, int flag,
+				   int argc, char *const argv[])
+{
+	return do_test_storage(cmdtp, flag, argc, argv, "rksfc", "0", "RKSFC0");
+}
+#endif
+
+#ifdef CONFIG_RKSFC_NOR
+static int do_test_rkflash_spinor(cmd_tbl_t *cmdtp, int flag,
+				  int argc, char *const argv[])
+{
+	return do_test_storage(cmdtp, flag, argc, argv, "rksfc", "1", "RKSFC1");
+}
+#endif
+
 #ifdef CONFIG_DM_RAMDISK
 static int do_test_blk(cmd_tbl_t *cmdtp, int flag,
 		       int argc, char *const argv[])
@@ -274,7 +298,14 @@ static int do_test_blk(cmd_tbl_t *cmdtp, int flag,
 	return do_test_storage(cmdtp, flag, argc, argv, NULL, NULL, "BLK");
 }
 #endif
-#endif/* defined(CONFIG_MMC) || defined(CONFIG_RKNAND) || defined(CONFIG_DM_RAMDISK) */
+#endif/* defined(CONFIG_MMC) ||\
+       * defined(CONFIG_RKNAND) ||\
+       * defined(CONFIG_DM_RAMDISK) ||\
+       * defined(CONFIG_USB_HOST) ||\
+       * defined(CONFIG_RKNANDC_NAND) ||\
+       * defined(CONFIG_RKSFC_NAND) ||\
+       * defined(CONFIG_RKSFC_NOR)
+       */
 
 #if defined(CONFIG_OPTEE_CLIENT) && defined(CONFIG_MMC)
 static int do_test_secure_storage(cmd_tbl_t *cmdtp, int flag,
@@ -374,7 +405,7 @@ static int do_test_part(cmd_tbl_t *cmdtp, int flag,
 
 #ifdef CONFIG_USB_HOST
 static int do_test_usb(cmd_tbl_t *cmdtp, int flag,
-			int argc, char *const argv[])
+		       int argc, char *const argv[])
 {
 	run_command("usb start", 0);
 	return do_test_storage(cmdtp, flag, argc, argv, "usb", "0", "usb0");
@@ -398,9 +429,15 @@ static cmd_tbl_t sub_cmd[] = {
 #ifdef CONFIG_ROCKCHIP_OTP
 	UNIT_CMD_DEFINE(otp, 0),
 #endif
-#ifdef CONFIG_RKNAND
+#if defined(CONFIG_RKNAND) || defined(CONFIG_RKNANDC_NAND)
 	UNIT_CMD_DEFINE(rknand, 0),
 #endif
+#ifdef CONFIG_RKSFC_NAND
+	UNIT_CMD_DEFINE(rkflash_spinand, 0),
+#endif
+#ifdef CONFIG_RKSFC_NOR
+	UNIT_CMD_DEFINE(rkflash_spinor, 0),
+#endif
 #if defined(CONFIG_OPTEE_CLIENT) && defined(CONFIG_MMC)
 	UNIT_CMD_DEFINE(secure_storage, 0),
 #endif
@@ -426,9 +463,15 @@ static char sub_cmd_help[] =
 "    [.] rktest emmc                        - test emmc read/write speed\n"
 "    [.] rktest sdmmc                       - test sd card and fat fs read/write\n"
 #endif
-#ifdef CONFIG_RKNAND
+#if defined(CONFIG_RKNAND) || defined(CONFIG_RKNANDC_NAND)
 "    [.] rktest rknand                      - test rknand read/write speed\n"
 #endif
+#ifdef CONFIG_RKSFC_NAND
+"    [.] rktest rkflash_spinand             - test RKFLASH DM driver spinand read/write speed\n"
+#endif
+#ifdef CONFIG_RKSFC_NOR
+"    [.] rktest rkflash_spinor              - test RKFLASH DM driver read/write speed\n"
+#endif
 #if defined(CONFIG_OPTEE_CLIENT) && defined(CONFIG_MMC)
 "    [.] rktest secure_storage              - test secure storage\n"
 #endif

commit 2f0750eb18eaa11cfc588b33f9e74a79ee281b64
Author: Rob Clark <robdclark@gmail.com>
Date:   Wed Sep 13 18:05:33 2017 -0400

    UPSTREAM: efi_loader: refactor boot device and loaded_image handling
    
    Get rid of the hacky fake boot-device and duplicate device-path
    constructing (which needs to match what efi_disk and efi_net do).
    Instead convert over to use efi_device_path helpers to construct
    device-paths, and use that to look up the actual boot device.
    
    Also, extract out a helper to plug things in properly to the
    loaded_image.  In a following patch we'll want to re-use this in
    efi_load_image() to handle the case of loading an image from a
    file_path.
    
    Signed-off-by: Rob Clark <robdclark@gmail.com>
    Signed-off-by: Alexander Graf <agraf@suse.de>
    (cherry picked from commit 95c5553ea268144056c4bafc318b9e8b5c096a6c)
    
    Change-Id: Iaa6a9865f2cbd15d6537d200bd86662fa4baf5a0
    Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>

diff --git a/cmd/bootefi.c b/cmd/bootefi.c
index 52e046383d..1cbcdd51a7 100644
--- a/cmd/bootefi.c
+++ b/cmd/bootefi.c
@@ -22,97 +22,14 @@ DECLARE_GLOBAL_DATA_PTR;
 
 static uint8_t efi_obj_list_initalized;
 
-/*
- * When booting using the "bootefi" command, we don't know which
- * physical device the file came from. So we create a pseudo-device
- * called "bootefi" with the device path /bootefi.
- *
- * In addition to the originating device we also declare the file path
- * of "bootefi" based loads to be /bootefi.
- */
-static struct efi_device_path_file_path bootefi_image_path[] = {
-	{
-		.dp.type = DEVICE_PATH_TYPE_MEDIA_DEVICE,
-		.dp.sub_type = DEVICE_PATH_SUB_TYPE_FILE_PATH,
-		.dp.length = sizeof(bootefi_image_path[0]),
-		.str = { 'b','o','o','t','e','f','i' },
-	}, {
-		.dp.type = DEVICE_PATH_TYPE_END,
-		.dp.sub_type = DEVICE_PATH_SUB_TYPE_END,
-		.dp.length = sizeof(bootefi_image_path[0]),
-	}
-};
-
-static struct efi_device_path_file_path bootefi_device_path[] = {
-	{
-		.dp.type = DEVICE_PATH_TYPE_MEDIA_DEVICE,
-		.dp.sub_type = DEVICE_PATH_SUB_TYPE_FILE_PATH,
-		.dp.length = sizeof(bootefi_image_path[0]),
-		.str = { 'b','o','o','t','e','f','i' },
-	}, {
-		.dp.type = DEVICE_PATH_TYPE_END,
-		.dp.sub_type = DEVICE_PATH_SUB_TYPE_END,
-		.dp.length = sizeof(bootefi_image_path[0]),
-	}
-};
-
-/* The EFI loaded_image interface for the image executed via "bootefi" */
-static struct efi_loaded_image loaded_image_info = {
-	.device_handle = bootefi_device_path,
-	.file_path = bootefi_image_path,
-};
-
-/* The EFI object struct for the image executed via "bootefi" */
-static struct efi_object loaded_image_info_obj = {
-	.handle = &loaded_image_info,
-	.protocols = {
-		{
-			/*
-			 * When asking for the loaded_image interface, just
-			 * return handle which points to loaded_image_info
-			 */
-			.guid = &efi_guid_loaded_image,
-			.protocol_interface = &loaded_image_info,
-		},
-		{
-			/*
-			 * When asking for the device path interface, return
-			 * bootefi_device_path
-			 */
-			.guid = &efi_guid_device_path,
-			.protocol_interface = bootefi_device_path,
-		},
-		{
-			.guid = &efi_guid_console_control,
-			.protocol_interface = (void *) &efi_console_control
-		},
-		{
-			.guid = &efi_guid_device_path_to_text_protocol,
-			.protocol_interface = (void *) &efi_device_path_to_text
-		},
-	},
-};
-
-/* The EFI object struct for the device the "bootefi" image was loaded from */
-static struct efi_object bootefi_device_obj = {
-	.handle = bootefi_device_path,
-	.protocols = {
-		{
-			/* When asking for the device path interface, return
-			 * bootefi_device_path */
-			.guid = &efi_guid_device_path,
-			.protocol_interface = bootefi_device_path
-		}
-	},
-};
+static struct efi_device_path *bootefi_image_path;
+static struct efi_device_path *bootefi_device_path;
 
 /* Initialize and populate EFI object list */
 static void efi_init_obj_list(void)
 {
 	efi_obj_list_initalized = 1;
 
-	list_add_tail(&loaded_image_info_obj.link, &efi_obj_list);
-	list_add_tail(&bootefi_device_obj.link, &efi_obj_list);
 	efi_console_register();
 #ifdef CONFIG_PARTITIONS
 	efi_disk_register();
@@ -121,13 +38,7 @@ static void efi_init_obj_list(void)
 	efi_gop_register();
 #endif
 #ifdef CONFIG_NET
-	void *nethandle = loaded_image_info.device_handle;
-	efi_net_register(&nethandle);
-
-	if (!memcmp(bootefi_device_path[0].str, "N\0e\0t", 6))
-		loaded_image_info.device_handle = nethandle;
-	else
-		loaded_image_info.device_handle = bootefi_device_path;
+	efi_net_register();
 #endif
 #ifdef CONFIG_GENERATE_SMBIOS_TABLE
 	efi_smbios_register();
@@ -210,14 +121,27 @@ static unsigned long efi_run_in_el2(asmlinkage ulong (*entry)(
  * Load an EFI payload into a newly allocated piece of memory, register all
  * EFI objects it would want to access and jump to it.
  */
-static unsigned long do_bootefi_exec(void *efi, void *fdt)
+static unsigned long do_bootefi_exec(void *efi, void *fdt,
+				     struct efi_device_path *device_path,
+				     struct efi_device_path *image_path)
 {
+	struct efi_loaded_image loaded_image_info = {};
+	struct efi_object loaded_image_info_obj = {};
+	ulong ret;
+
 	ulong (*entry)(void *image_handle, struct efi_system_table *st)
 		asmlinkage;
 	ulong fdt_pages, fdt_size, fdt_start, fdt_end;
 	const efi_guid_t fdt_guid = EFI_FDT_GUID;
 	bootm_headers_t img = { 0 };
 
+	/* Initialize and populate EFI object list */
+	if (!efi_obj_list_initalized)
+		efi_init_obj_list();
+
+	efi_setup_loaded_image(&loaded_image_info, &loaded_image_info_obj,
+			       device_path, image_path);
+
 	/*
 	 * gd lives in a fixed register which may get clobbered while we execute
 	 * the payload. So save it here and restore it on every callback entry
@@ -252,18 +176,18 @@ static unsigned long do_bootefi_exec(void *efi, void *fdt)
 
 	/* Load the EFI payload */
 	entry = efi_load_pe(efi, &loaded_image_info);
-	if (!entry)
-		return -ENOENT;
-
-	/* Initialize and populate EFI object list */
-	if (!efi_obj_list_initalized)
-		efi_init_obj_list();
+	if (!entry) {
+		ret = -ENOENT;
+		goto exit;
+	}
 
 	/* Call our payload! */
 	debug("%s:%d Jumping to 0x%lx\n", __func__, __LINE__, (long)entry);
 
 	if (setjmp(&loaded_image_info.exit_jmp)) {
-		return loaded_image_info.exit_status;
+		ret = loaded_image_info.exit_status;
+		EFI_EXIT(ret);
+		goto exit;
 	}
 
 #ifdef CONFIG_ARM64
@@ -282,7 +206,13 @@ static unsigned long do_bootefi_exec(void *efi, void *fdt)
 	}
 #endif
 
-	return efi_do_enter(&loaded_image_info, &systab, entry);
+	ret = efi_do_enter(&loaded_image_info, &systab, entry);
+
+exit:
+	/* image has returned, loaded-image obj goes *poof*: */
+	list_del(&loaded_image_info_obj.link);
+
+	return ret;
 }
 
 
@@ -319,7 +249,8 @@ static int do_bootefi(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	}
 
 	printf("## Starting EFI application at %08lx ...\n", addr);
-	r = do_bootefi_exec((void *)addr, (void*)fdt_addr);
+	r = do_bootefi_exec((void *)addr, (void *)fdt_addr,
+			    bootefi_device_path, bootefi_image_path);
 	printf("## Application terminated, r = %lu\n",
 	       r & ~EFI_ERROR_MASK);
 
@@ -348,58 +279,44 @@ U_BOOT_CMD(
 	bootefi_help_text
 );
 
-void efi_set_bootdev(const char *dev, const char *devnr, const char *path)
+static int parse_partnum(const char *devnr)
 {
-	__maybe_unused struct blk_desc *desc;
-	char devname[32] = { 0 }; /* dp->str is u16[32] long */
-	char *colon, *s;
-
-#if defined(CONFIG_BLK) || CONFIG_IS_ENABLED(ISO_PARTITION)
-	desc = blk_get_dev(dev, simple_strtol(devnr, NULL, 10));
-#endif
-
-#ifdef CONFIG_BLK
-	if (desc) {
-		snprintf(devname, sizeof(devname), "%s", desc->bdev->name);
-	} else
-#endif
-
-	{
-		/* Assemble the condensed device name we use in efi_disk.c */
-		snprintf(devname, sizeof(devname), "%s%s", dev, devnr);
+	const char *str = strchr(devnr, ':');
+	if (str) {
+		str++;
+		return simple_strtoul(str, NULL, 16);
 	}
+	return 0;
+}
 
-	colon = strchr(devname, ':');
-
-#if CONFIG_IS_ENABLED(ISO_PARTITION)
-	/* For ISOs we create partition block devices */
-	if (desc && (desc->type != DEV_TYPE_UNKNOWN) &&
-	    (desc->part_type == PART_TYPE_ISO)) {
-		if (!colon)
-			snprintf(devname, sizeof(devname), "%s:1", devname);
+void efi_set_bootdev(const char *dev, const char *devnr, const char *path)
+{
+	char filename[32] = { 0 }; /* dp->str is u16[32] long */
+	char *s;
 
-		colon = NULL;
-	}
-#endif
+	if (strcmp(dev, "Net")) {
+		struct blk_desc *desc;
+		int part;
 
-	if (colon)
-		*colon = '\0';
+		desc = blk_get_dev(dev, simple_strtol(devnr, NULL, 10));
+		part = parse_partnum(devnr);
 
-	/* Patch bootefi_device_path to the target device */
-	memset(bootefi_device_path[0].str, 0, sizeof(bootefi_device_path[0].str));
-	ascii2unicode(bootefi_device_path[0].str, devname);
+		bootefi_device_path = efi_dp_from_part(desc, part);
+	} else {
+#ifdef CONFIG_NET
+		bootefi_device_path = efi_dp_from_eth();
+#endif
+	}
 
-	/* Patch bootefi_image_path to the target file path */
-	memset(bootefi_image_path[0].str, 0, sizeof(bootefi_image_path[0].str));
 	if (strcmp(dev, "Net")) {
 		/* Add leading / to fs paths, because they're absolute */
-		snprintf(devname, sizeof(devname), "/%s", path);
+		snprintf(filename, sizeof(filename), "/%s", path);
 	} else {
-		snprintf(devname, sizeof(devname), "%s", path);
+		snprintf(filename, sizeof(filename), "%s", path);
 	}
 	/* DOS style file path: */
-	s = devname;
+	s = filename;
 	while ((s = strchr(s, '/')))
 		*s++ = '\\';
-	ascii2unicode(bootefi_image_path[0].str, devname);
+	bootefi_image_path = efi_dp_from_file(NULL, 0, filename);
 }
diff --git a/include/efi_loader.h b/include/efi_loader.h
index d052b03ab7..27cce2d10a 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -134,7 +134,7 @@ int efi_disk_register(void);
 /* Called by bootefi to make GOP (graphical) interface available */
 int efi_gop_register(void);
 /* Called by bootefi to make the network interface available */
-int efi_net_register(void **handle);
+int efi_net_register(void);
 /* Called by bootefi to make SMBIOS tables available */
 void efi_smbios_register(void);
 
@@ -191,6 +191,9 @@ uint64_t efi_add_memory_map(uint64_t start, uint64_t pages, int memory_type,
 int efi_memory_init(void);
 /* Adds new or overrides configuration table entry to the system table */
 efi_status_t efi_install_configuration_table(const efi_guid_t *guid, void *table);
+void efi_setup_loaded_image(struct efi_loaded_image *info, struct efi_object *obj,
+			    struct efi_device_path *device_path,
+			    struct efi_device_path *file_path);
 
 #ifdef CONFIG_EFI_LOADER_BOUNCE_BUFFER
 extern void *efi_bounce_buffer;
diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c
index fb556e61cd..cf69c06721 100644
--- a/lib/efi_loader/efi_boottime.c
+++ b/lib/efi_loader/efi_boottime.c
@@ -726,6 +726,42 @@ static efi_status_t EFIAPI efi_install_configuration_table_ext(efi_guid_t *guid,
 	return EFI_EXIT(efi_install_configuration_table(guid, table));
 }
 
+/* Initialize a loaded_image_info + loaded_image_info object with correct
+ * protocols, boot-device, etc.
+ */
+void efi_setup_loaded_image(struct efi_loaded_image *info, struct efi_object *obj,
+			    struct efi_device_path *device_path,
+			    struct efi_device_path *file_path)
+{
+	obj->handle = info;
+
+	/*
+	 * When asking for the device path interface, return
+	 * bootefi_device_path
+	 */
+	obj->protocols[0].guid = &efi_guid_device_path;
+	obj->protocols[0].protocol_interface = device_path;
+
+	/*
+	 * When asking for the loaded_image interface, just
+	 * return handle which points to loaded_image_info
+	 */
+	obj->protocols[1].guid = &efi_guid_loaded_image;
+	obj->protocols[1].protocol_interface = info;
+
+	obj->protocols[2].guid = &efi_guid_console_control;
+	obj->protocols[2].protocol_interface = (void *)&efi_console_control;
+
+	obj->protocols[3].guid = &efi_guid_device_path_to_text_protocol;
+	obj->protocols[3].protocol_interface =
+		(void *)&efi_device_path_to_text;
+
+	info->file_path = file_path;
+	info->device_handle = efi_dp_find_obj(device_path, NULL);
+
+	list_add_tail(&obj->link, &efi_obj_list);
+}
+
 static efi_status_t EFIAPI efi_load_image(bool boot_policy,
 					  efi_handle_t parent_image,
 					  struct efi_device_path *file_path,
diff --git a/lib/efi_loader/efi_net.c b/lib/efi_loader/efi_net.c
index 0b949d86e8..0e135bab21 100644
--- a/lib/efi_loader/efi_net.c
+++ b/lib/efi_loader/efi_net.c
@@ -210,7 +210,7 @@ void efi_net_set_dhcp_ack(void *pkt, int len)
 }
 
 /* This gets called from do_bootefi_exec(). */
-int efi_net_register(void **handle)
+int efi_net_register(void)
 {
 	struct efi_net_obj *netobj;
 	struct efi_device_path_mac_addr dp_net = {
@@ -268,8 +268,5 @@ int efi_net_register(void **handle)
 	/* Hook net up to the device list */
 	list_add_tail(&netobj->parent.link, &efi_obj_list);
 
-	if (handle)
-		*handle = &netobj->net;
-
 	return 0;
 }

commit a0955e7ebd50f75ca6505c7ceea6dff6632559a3
Author: Rob Clark <robdclark@gmail.com>
Date:   Wed Sep 13 18:05:31 2017 -0400

    UPSTREAM: efi_loader: use proper device-paths for partitions
    
    Also, create disk objects for the disk itself, in addition to the
    partitions.  (UEFI terminology is a bit confusing, a "disk" object is
    really a partition.)  This helps grub properly identify the boot device
    since it is trying to match up partition "disk" object with it's parent
    device.
    
    Now instead of seeing devices like:
    
      /File(sdhci@07864000.blk)/EndEntire
      /File(usb_mass_storage.lun0)/EndEntire
    
    You see:
    
      /ACPI(133741d0,0)/UnknownMessaging(1d)/EndEntire
      /ACPI(133741d0,0)/UnknownMessaging(1d)/HD(0,800,64000,dd904a8c00000000,1,1)/EndEntire
      /ACPI(133741d0,0)/UnknownMessaging(1d)/HD(1,64800,200000,dd904a8c00000000,1,1)/EndEntire
      /ACPI(133741d0,0)/UnknownMessaging(1d)/HD(2,264800,19a000,dd904a8c00000000,1,1)/EndEntire
      /ACPI(133741d0,0)/USB(0,0)/USB(0,0)/USB(0,0)/EndEntire
      /ACPI(133741d0,0)/USB(0,0)/USB(0,0)/USB(0,0)/HD(0,800,60000,38ca680200000000,1,1)/EndEntire
      /ACPI(133741d0,0)/USB(0,0)/USB(0,0)/USB(0,0)/HD(1,61000,155000,38ca680200000000,1,1)/EndEntire
      /ACPI(133741d0,0)/USB(0,0)/USB(0,0)/USB(0,0)/HD(2,20fa800,1bbf8800,38ca680200000000,1,1)/EndEntire
      /ACPI(133741d0,0)/USB(0,0)/USB(0,0)/USB(0,0)/HD(3,1b6800,1f44000,38ca680200000000,1,1)/EndEntire
    
    This is on a board with single USB disk and single sd-card.  The
    UnknownMessaging(1d) node in the device-path is the MMC device,
    but grub_efi_print_device_path() hasn't been updated yet for some
    of the newer device-path sub-types.
    
    This patch is inspired by a patch originally from Peter Jones, but
    re-worked to use efi_device_path, so it doesn't much resemble the
    original.
    
    Signed-off-by: Rob Clark <robdclark@gmail.com>
    [agraf: s/unsigned/unsigned int/]
    Signed-off-by: Alexander Graf <agraf@suse.de>
    (cherry picked from commit 884bcf6f65c414dce3b3d2a91e2c9eba0e5e08f8)
    
    Change-Id: I8d891a25dd321b718b0429d8b8a895cc4490f272
    Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>

diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c
index ed06485e33..4e3de020a0 100644
--- a/lib/efi_loader/efi_disk.c
+++ b/lib/efi_loader/efi_disk.c
@@ -28,11 +28,13 @@ struct efi_disk_obj {
 	/* EFI Interface Media descriptor struct, referenced by ops */
 	struct efi_block_io_media media;
 	/* EFI device path to this block device */
-	struct efi_device_path_file_path *dp;
+	struct efi_device_path *dp;
+	/* partition # */
+	unsigned int part;
 	/* Offset into disk for simple partitions */
 	lbaint_t offset;
 	/* Internal block device */
-	const struct blk_desc *desc;
+	struct blk_desc *desc;
 };
 
 static efi_status_t EFIAPI efi_disk_reset(struct efi_block_io *this,
@@ -172,26 +174,26 @@ static const struct efi_block_io block_io_disk_template = {
 
 static void efi_disk_add_dev(const char *name,
 			     const char *if_typename,
-			     const struct blk_desc *desc,
+			     struct blk_desc *desc,
 			     int dev_index,
-			     lbaint_t offset)
+			     lbaint_t offset,
+			     unsigned int part)
 {
 	struct efi_disk_obj *diskobj;
-	struct efi_device_path_file_path *dp;
-	int objlen = sizeof(*diskobj) + (sizeof(*dp) * 2);
 
 	/* Don't add empty devices */
 	if (!desc->lba)
 		return;
 
-	diskobj = calloc(1, objlen);
+	diskobj = calloc(1, sizeof(*diskobj));
 
 	/* Fill in object data */
-	dp = (void *)&diskobj[1];
+	diskobj->dp = efi_dp_from_part(desc, part);
+	diskobj->part = part;
 	diskobj->parent.protocols[0].guid = &efi_block_io_guid;
 	diskobj->parent.protocols[0].protocol_interface = &diskobj->ops;
 	diskobj->parent.protocols[1].guid = &efi_guid_device_path;
-	diskobj->parent.protocols[1].protocol_interface = dp;
+	diskobj->parent.protocols[1].protocol_interface = diskobj->dp;
 	diskobj->parent.handle = diskobj;
 	diskobj->ops = block_io_disk_template;
 	diskobj->ifname = if_typename;
@@ -207,17 +209,6 @@ static void efi_disk_add_dev(const char *name,
 	diskobj->media.last_block = desc->lba - offset;
 	diskobj->ops.media = &diskobj->media;
 
-	/* Fill in device path */
-	diskobj->dp = dp;
-	dp[0].dp.type = DEVICE_PATH_TYPE_MEDIA_DEVICE;
-	dp[0].dp.sub_type = DEVICE_PATH_SUB_TYPE_FILE_PATH;
-	dp[0].dp.length = sizeof(*dp);
-	ascii2unicode(dp[0].str, name);
-
-	dp[1].dp.type = DEVICE_PATH_TYPE_END;
-	dp[1].dp.sub_type = DEVICE_PATH_SUB_TYPE_END;
-	dp[1].dp.length = sizeof(*dp);
-
 	/* Hook up to the device list */
 	list_add_tail(&diskobj->parent.link, &efi_obj_list);
 }
@@ -236,14 +227,18 @@ static int efi_disk_create_eltorito(struct blk_desc *desc,
 	if (desc->part_type != PART_TYPE_ISO)
 		return 0;
 
+	/* and devices for each partition: */
 	while (!part_get_info(desc, part, &info)) {
 		snprintf(devname, sizeof(devname), "%s:%d", pdevname,
 			 part);
 		efi_disk_add_dev(devname, if_typename, desc, diskid,
-				 info.start);
+				 info.start, part);
 		part++;
 		disks++;
 	}
+
+	/* ... and add block device: */
+	efi_disk_add_dev(devname, if_typename, desc, diskid, 0, 0);
 #endif
 
 	return disks;
@@ -271,9 +266,22 @@ int efi_disk_register(void)
 	     uclass_next_device_check(&dev)) {
 		struct blk_desc *desc = dev_get_uclass_platdata(dev);
 		const char *if_typename = dev->driver->name;
+		disk_partition_t info;
+		int part = 1;
 
 		printf("Scanning disk %s...\n", dev->name);
-		efi_disk_add_dev(dev->name, if_typename, desc, desc->devnum, 0);
+
+		/* add devices for each partition: */
+		while (!part_get_info(desc, part, &info)) {
+			efi_disk_add_dev(dev->name, if_typename, desc,
+					 desc->devnum, 0, part);
+			part++;
+		}
+
+		/* ... and add block device: */
+		efi_disk_add_dev(dev->name, if_typename, desc,
+				 desc->devnum, 0, 0);
+
 		disks++;
 
 		/*
@@ -309,7 +317,7 @@ int efi_disk_register(void)
 
 			snprintf(devname, sizeof(devname), "%s%d",
 				 if_typename, i);
-			efi_disk_add_dev(devname, if_typename, desc, i, 0);
+			efi_disk_add_dev(devname, if_typename, desc, i, 0, 0);
 			disks++;
 
 			/*

commit 1fa8dee8765778064ffb22cffc4777b467e2706c
Author: Rob Clark <robdclark@gmail.com>
Date:   Wed Sep 13 18:05:28 2017 -0400

    UPSTREAM: efi_loader: add device-path utils
    
    Helpers to construct device-paths from devices, partitions, files, and
    for parsing and manipulating device-paths.
    
    For non-legacy devices, this will use u-boot's device-model to construct
    device-paths which include bus hierarchy to construct device-paths.  For
    legacy devices we still fake it, but slightly more convincingly.
    
    Signed-off-by: Rob Clark <robdclark@gmail.com>
    Signed-off-by: Alexander Graf <agraf@suse.de>
    (cherry picked from commit b66c60dde9d48889b93694326d40f7e5208cff25)
    
    Change-Id: I9825d4132ec08bef46a3b5b7c6946a5636d73ce9
    Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>

diff --git a/include/efi_api.h b/include/efi_api.h
index d540ada8c7..a9ddfe0f4b 100644
--- a/include/efi_api.h
+++ b/include/efi_api.h
@@ -314,6 +314,7 @@ struct efi_device_path_acpi_path {
 #define DEVICE_PATH_TYPE_MESSAGING_DEVICE	0x03
 #  define DEVICE_PATH_SUB_TYPE_MSG_USB		0x05
 #  define DEVICE_PATH_SUB_TYPE_MSG_MAC_ADDR	0x0b
+#  define DEVICE_PATH_SUB_TYPE_MSG_USB_CLASS	0x0f
 #  define DEVICE_PATH_SUB_TYPE_MSG_SD		0x1a
 #  define DEVICE_PATH_SUB_TYPE_MSG_MMC		0x1d
 
@@ -329,6 +330,15 @@ struct efi_device_path_mac_addr {
 	u8 if_type;
 };
 
+struct efi_device_path_usb_class {
+	struct efi_device_path dp;
+	u16 vendor_id;
+	u16 product_id;
+	u8 device_class;
+	u8 device_subclass;
+	u8 device_protocol;
+} __packed;
+
 struct efi_device_path_sd_mmc_path {
 	struct efi_device_path dp;
 	u8 slot_number;
diff --git a/include/efi_loader.h b/include/efi_loader.h
index 1179234f68..d052b03ab7 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -197,6 +197,32 @@ extern void *efi_bounce_buffer;
 #define EFI_LOADER_BOUNCE_BUFFER_SIZE (64 * 1024 * 1024)
 #endif
 
+
+struct efi_device_path *efi_dp_next(const struct efi_device_path *dp);
+int efi_dp_match(struct efi_device_path *a, struct efi_device_path *b);
+struct efi_object *efi_dp_find_obj(struct efi_device_path *dp,
+				   struct efi_device_path **rem);
+unsigned efi_dp_size(const struct efi_device_path *dp);
+struct efi_device_path *efi_dp_dup(const struct efi_device_path *dp);
+struct efi_device_path *efi_dp_append(const struct efi_device_path *dp1,
+				      const struct efi_device_path *dp2);
+struct efi_device_path *efi_dp_append_node(const struct efi_device_path *dp,
+					   const struct efi_device_path *node);
+
+
+struct efi_device_path *efi_dp_from_dev(struct udevice *dev);
+struct efi_device_path *efi_dp_from_part(struct blk_desc *desc, int part);
+struct efi_device_path *efi_dp_from_file(struct blk_desc *desc, int part,
+					 const char *path);
+struct efi_device_path *efi_dp_from_eth(void);
+void efi_dp_split_file_path(struct efi_device_path *full_path,
+			    struct efi_device_path **device_path,
+			    struct efi_device_path **file_path);
+
+#define EFI_DP_TYPE(_dp, _type, _subtype) \
+	(((_dp)->type == DEVICE_PATH_TYPE_##_type) && \
+	 ((_dp)->sub_type == DEVICE_PATH_SUB_TYPE_##_subtype))
+
 /* Convert strings from normal C strings to uEFI strings */
 static inline void ascii2unicode(u16 *unicode, const char *ascii)
 {
diff --git a/lib/efi_loader/Makefile b/lib/efi_loader/Makefile
index 30bf343a36..f35e5ce8a8 100644
--- a/lib/efi_loader/Makefile
+++ b/lib/efi_loader/Makefile
@@ -15,7 +15,7 @@ always := $(efiprogs-y)
 
 obj-$(CONFIG_CMD_BOOTEFI_HELLO) += helloworld_efi.o
 obj-y += efi_image_loader.o efi_boottime.o efi_runtime.o efi_console.o
-obj-y += efi_memory.o efi_device_path_to_text.o
+obj-y += efi_memory.o efi_device_path_to_text.o efi_device_path.o
 obj-$(CONFIG_LCD) += efi_gop.o
 obj-$(CONFIG_DM_VIDEO) += efi_gop.o
 obj-$(CONFIG_PARTITIONS) += efi_disk.o
diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c
index 289ed4c95b..fb556e61cd 100644
--- a/lib/efi_loader/efi_boottime.c
+++ b/lib/efi_loader/efi_boottime.c
@@ -665,8 +665,17 @@ static efi_status_t EFIAPI efi_locate_device_path(efi_guid_t *protocol,
 			struct efi_device_path **device_path,
 			efi_handle_t *device)
 {
-	EFI_ENTRY("%p, %p, %p", protocol, device_path, device);
-	return EFI_EXIT(EFI_NOT_FOUND);
+	struct efi_object *efiobj;
+
+	EFI_ENTRY("%pUl, %p, %p", protocol, device_path, device);
+
+	efiobj = efi_dp_find_obj(*device_path, device_path);
+	if (!efiobj)
+		return EFI_EXIT(EFI_NOT_FOUND);
+
+	*device = efiobj->handle;
+
+	return EFI_EXIT(EFI_SUCCESS);
 }
 
 /* Collapses configuration table entries, removing index i */
diff --git a/lib/efi_loader/efi_device_path.c b/lib/efi_loader/efi_device_path.c
new file mode 100644
index 0000000000..5d5c3b3464
--- /dev/null
+++ b/lib/efi_loader/efi_device_path.c
@@ -0,0 +1,563 @@
+/*
+ * EFI device path from u-boot device-model mapping
+ *
+ * (C) Copyright 2017 Rob Clark
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <blk.h>
+#include <dm.h>
+#include <usb.h>
+#include <mmc.h>
+#include <efi_loader.h>
+#include <inttypes.h>
+#include <part.h>
+
+/* template END node: */
+static const struct efi_device_path END = {
+	.type     = DEVICE_PATH_TYPE_END,
+	.sub_type = DEVICE_PATH_SUB_TYPE_END,
+	.length   = sizeof(END),
+};
+
+#define U_BOOT_GUID \
+	EFI_GUID(0xe61d73b9, 0xa384, 0x4acc, \
+		 0xae, 0xab, 0x82, 0xe8, 0x28, 0xf3, 0x62, 0x8b)
+
+/* template ROOT node: */
+static const struct efi_device_path_vendor ROOT = {
+	.dp = {
+		.type     = DEVICE_PATH_TYPE_HARDWARE_DEVICE,
+		.sub_type = DEVICE_PATH_SUB_TYPE_VENDOR,
+		.length   = sizeof(ROOT),
+	},
+	.guid = U_BOOT_GUID,
+};
+
+static void *dp_alloc(size_t sz)
+{
+	void *buf;
+
+	if (efi_allocate_pool(EFI_ALLOCATE_ANY_PAGES, sz, &buf) != EFI_SUCCESS)
+		return NULL;
+
+	return buf;
+}
+
+/*
+ * Iterate to next block in device-path, terminating (returning NULL)
+ * at /End* node.
+ */
+struct efi_device_path *efi_dp_next(const struct efi_device_path *dp)
+{
+	if (dp == NULL)
+		return NULL;
+	if (dp->type == DEVICE_PATH_TYPE_END)
+		return NULL;
+	dp = ((void *)dp) + dp->length;
+	if (dp->type == DEVICE_PATH_TYPE_END)
+		return NULL;
+	return (struct efi_device_path *)dp;
+}
+
+/*
+ * Compare two device-paths, stopping when the shorter of the two hits
+ * an End* node.  This is useful to, for example, compare a device-path
+ * representing a device with one representing a file on the device, or
+ * a device with a parent device.
+ */
+int efi_dp_match(struct efi_device_path *a, struct efi_device_path *b)
+{
+	while (1) {
+		int ret;
+
+		ret = memcmp(&a->length, &b->length, sizeof(a->length));
+		if (ret)
+			return ret;
+
+		ret = memcmp(a, b, a->length);
+		if (ret)
+			return ret;
+
+		a = efi_dp_next(a);
+		b = efi_dp_next(b);
+
+		if (!a || !b)
+			return 0;
+	}
+}
+
+
+/*
+ * See UEFI spec (section 3.1.2, about short-form device-paths..
+ * tl;dr: we can have a device-path that starts with a USB WWID
+ * or USB Class node, and a few other cases which don't encode
+ * the full device path with bus hierarchy:
+ *
+ *   - MESSAGING:USB_WWID
+ *   - MESSAGING:USB_CLASS
+ *   - MEDIA:FILE_PATH
+ *   - MEDIA:HARD_DRIVE
+ *   - MESSAGING:URI
+ */
+static struct efi_device_path *shorten_path(struct efi_device_path *dp)
+{
+	while (dp) {
+		/*
+		 * TODO: Add MESSAGING:USB_WWID and MESSAGING:URI..
+		 * in practice fallback.efi just uses MEDIA:HARD_DRIVE
+		 * so not sure when we would see these other cases.
+		 */
+		if (EFI_DP_TYPE(dp, MESSAGING_DEVICE, MSG_USB_CLASS) ||
+		    EFI_DP_TYPE(dp, MEDIA_DEVICE, HARD_DRIVE_PATH) ||
+		    EFI_DP_TYPE(dp, MEDIA_DEVICE, FILE_PATH))
+			return dp;
+
+		dp = efi_dp_next(dp);
+	}
+
+	return dp;
+}
+
+static struct efi_object *find_obj(struct efi_device_path *dp, bool short_path,
+				   struct efi_device_path **rem)
+{
+	struct efi_object *efiobj;
+
+	list_for_each_entry(efiobj, &efi_obj_list, link) {
+		int i;
+
+		for (i = 0; i < ARRAY_SIZE(efiobj->protocols); i++) {
+			struct efi_handler *handler = &efiobj->protocols[i];
+			struct efi_device_path *obj_dp;
+
+			if (!handler->guid)
+				break;
+
+			if (guidcmp(handler->guid, &efi_guid_device_path))
+				continue;
+
+			obj_dp = handler->protocol_interface;
+
+			do {
+				if (efi_dp_match(dp, obj_dp) == 0) {
+					if (rem) {
+						*rem = ((void *)dp) +
+							efi_dp_size(obj_dp);
+					}
+					return efiobj;
+				}
+
+				obj_dp = shorten_path(efi_dp_next(obj_dp));
+			} while (short_path && obj_dp);
+		}
+	}
+
+	return NULL;
+}
+
+
+/*
+ * Find an efiobj from device-path, if 'rem' is not NULL, returns the
+ * remaining part of the device path after the matched object.
+ */
+struct efi_object *efi_dp_find_obj(struct efi_device_path *dp,
+				   struct efi_device_path **rem)
+{
+	struct efi_object *efiobj;
+
+	efiobj = find_obj(dp, false, rem);
+
+	if (!efiobj)
+		efiobj = find_obj(dp, true, rem);
+
+	return efiobj;
+}
+
+/* return size not including End node: */
+unsigned efi_dp_size(const struct efi_device_path *dp)
+{
+	unsigned sz = 0;
+
+	while (dp) {
+		sz += dp->length;
+		dp = efi_dp_next(dp);
+	}
+
+	return sz;
+}
+
+struct efi_device_path *efi_dp_dup(const struct efi_device_path *dp)
+{
+	struct efi_device_path *ndp;
+	unsigned sz = efi_dp_size(dp) + sizeof(END);
+
+	if (!dp)
+		return NULL;
+
+	ndp = dp_alloc(sz);
+	memcpy(ndp, dp, sz);
+
+	return ndp;
+}
+
+struct efi_device_path *efi_dp_append(const struct efi_device_path *dp1,
+				      const struct efi_device_path *dp2)
+{
+	struct efi_device_path *ret;
+
+	if (!dp1) {
+		ret = efi_dp_dup(dp2);
+	} else if (!dp2) {
+		ret = efi_dp_dup(dp1);
+	} else {
+		/* both dp1 and dp2 are non-null */
+		unsigned sz1 = efi_dp_size(dp1);
+		unsigned sz2 = efi_dp_size(dp2);
+		void *p = dp_alloc(sz1 + sz2 + sizeof(END));
+		memcpy(p, dp1, sz1);
+		memcpy(p + sz1, dp2, sz2);
+		memcpy(p + sz1 + sz2, &END, sizeof(END));
+		ret = p;
+	}
+
+	return ret;
+}
+
+struct efi_device_path *efi_dp_append_node(const struct efi_device_path *dp,
+					   const struct efi_device_path *node)
+{
+	struct efi_device_path *ret;
+
+	if (!node && !dp) {
+		ret = efi_dp_dup(&END);
+	} else if (!node) {
+		ret = efi_dp_dup(dp);
+	} else if (!dp) {
+		unsigned sz = node->length;
+		void *p = dp_alloc(sz + sizeof(END));
+		memcpy(p, node, sz);
+		memcpy(p + sz, &END, sizeof(END));
+		ret = p;
+	} else {
+		/* both dp and node are non-null */
+		unsigned sz = efi_dp_size(dp);
+		void *p = dp_alloc(sz + node->length + sizeof(END));
+		memcpy(p, dp, sz);
+		memcpy(p + sz, node, node->length);
+		memcpy(p + sz + node->length, &END, sizeof(END));
+		ret = p;
+	}
+
+	return ret;
+}
+
+#ifdef CONFIG_DM
+/* size of device-path not including END node for device and all parents
+ * up to the root device.
+ */
+static unsigned dp_size(struct udevice *dev)
+{
+	if (!dev || !dev->driver)
+		return sizeof(ROOT);
+
+	switch (dev->driver->id) {
+	case UCLASS_ROOT:
+	case UCLASS_SIMPLE_BUS:
+		/* stop traversing parents at this point: */
+		return sizeof(ROOT);
+	case UCLASS_MMC:
+		return dp_size(dev->parent) +
+			sizeof(struct efi_device_path_sd_mmc_path);
+	case UCLASS_MASS_STORAGE:
+	case UCLASS_USB_HUB:
+		return dp_size(dev->parent) +
+			sizeof(struct efi_device_path_usb_class);
+	default:
+		/* just skip over unknown classes: */
+		return dp_size(dev->parent);
+	}
+}
+
+static void *dp_fill(void *buf, struct udevice *dev)
+{
+	if (!dev || !dev->driver)
+		return buf;
+
+	switch (dev->driver->id) {
+	case UCLASS_ROOT:
+	case UCLASS_SIMPLE_BUS: {
+		/* stop traversing parents at this point: */
+		struct efi_device_path_vendor *vdp = buf;
+		*vdp = ROOT;
+		return &vdp[1];
+	}
+#if defined(CONFIG_DM_MMC) && defined(CONFIG_MMC)
+	case UCLASS_MMC: {
+		struct efi_device_path_sd_mmc_path *sddp =
+			dp_fill(buf, dev->parent);
+		struct mmc *mmc = mmc_get_mmc_dev(dev);
+		struct blk_desc *desc = mmc_get_blk_desc(mmc);
+
+		sddp->dp.type     = DEVICE_PATH_TYPE_MESSAGING_DEVICE;
+		sddp->dp.sub_type = (desc->if_type == IF_TYPE_MMC) ?
+			DEVICE_PATH_SUB_TYPE_MSG_MMC :
+			DEVICE_PATH_SUB_TYPE_MSG_SD;
+		sddp->dp.length   = sizeof(*sddp);
+		sddp->slot_number = dev->seq;
+
+		return &sddp[1];
+	}
+#endif
+	case UCLASS_MASS_STORAGE:
+	case UCLASS_USB_HUB: {
+		struct efi_device_path_usb_class *udp =
+			dp_fill(buf, dev->parent);
+		struct usb_device *udev = dev_get_parent_priv(dev);
+		struct usb_device_descriptor *desc = &udev->descriptor;
+
+		udp->dp.type     = DEVICE_PATH_TYPE_MESSAGING_DEVICE;
+		udp->dp.sub_type = DEVICE_PATH_SUB_TYPE_MSG_USB_CLASS;
+		udp->dp.length   = sizeof(*udp);
+		udp->vendor_id   = desc->idVendor;
+		udp->product_id  = desc->idProduct;
+		udp->device_class    = desc->bDeviceClass;
+		udp->device_subclass = desc->bDeviceSubClass;
+		udp->device_protocol = desc->bDeviceProtocol;
+
+		return &udp[1];
+	}
+	default:
+		debug("unhandled device class: %s (%u)\n",
+		      dev->name, dev->driver->id);
+		return dp_fill(buf, dev->parent);
+	}
+}
+
+/* Construct a device-path from a device: */
+struct efi_device_path *efi_dp_from_dev(struct udevice *dev)
+{
+	void *buf, *start;
+
+	start = buf = dp_alloc(dp_size(dev) + sizeof(END));
+	buf = dp_fill(buf, dev);
+	*((struct efi_device_path *)buf) = END;
+
+	return start;
+}
+#endif
+
+static unsigned dp_part_size(struct blk_desc *desc, int part)
+{
+	unsigned dpsize;
+
+#ifdef CONFIG_BLK
+	dpsize = dp_size(desc->bdev->parent);
+#else
+	dpsize = sizeof(ROOT) + sizeof(struct efi_device_path_usb);
+#endif
+
+	if (part == 0) /* the actual disk, not a partition */
+		return dpsize;
+
+	if (desc->part_type == PART_TYPE_ISO)
+		dpsize += sizeof(struct efi_device_path_cdrom_path);
+	else
+		dpsize += sizeof(struct efi_device_path_hard_drive_path);
+
+	return dpsize;
+}
+
+static void *dp_part_fill(void *buf, struct blk_desc *desc, int part)
+{
+	disk_partition_t info;
+
+#ifdef CONFIG_BLK
+	buf = dp_fill(buf, desc->bdev->parent);
+#else
+	/*
+	 * We *could* make a more accurate path, by looking at if_type
+	 * and handling all the different cases like we do for non-
+	 * legacy (ie CONFIG_BLK=y) case.  But most important thing
+	 * is just to have a unique device-path for if_type+devnum.
+	 * So map things to a fictional USB device:
+	 */
+	struct efi_device_path_usb *udp;
+
+	memcpy(buf, &ROOT, sizeof(ROOT));
+	buf += sizeof(ROOT);
+
+	udp = buf;
+	udp->dp.type = DEVICE_PATH_TYPE_MESSAGING_DEVICE;
+	udp->dp.sub_type = DEVICE_PATH_SUB_TYPE_MSG_USB;
+	udp->dp.length = sizeof(*udp);
+	udp->parent_port_number = desc->if_type;
+	udp->usb_interface = desc->devnum;
+	buf = &udp[1];
+#endif
+
+	if (part == 0) /* the actual disk, not a partition */
+		return buf;
+
+	part_get_info(desc, part, &info);
+
+	if (desc->part_type == PART_TYPE_ISO) {
+		struct efi_device_path_cdrom_path *cddp = buf;
+
+		cddp->boot_entry = part - 1;
+		cddp->dp.type = DEVICE_PATH_TYPE_MEDIA_DEVICE;
+		cddp->dp.sub_type = DEVICE_PATH_SUB_TYPE_CDROM_PATH;
+		cddp->dp.length = sizeof(*cddp);
+		cddp->partition_start = info.start;
+		cddp->partition_end = info.size;
+
+		buf = &cddp[1];
+	} else {
+		struct efi_device_path_hard_drive_path *hddp = buf;
+
+		hddp->dp.type = DEVICE_PATH_TYPE_MEDIA_DEVICE;
+		hddp->dp.sub_type = DEVICE_PATH_SUB_TYPE_HARD_DRIVE_PATH;
+		hddp->dp.length = sizeof(*hddp);
+		hddp->partition_number = part - 1;
+		hddp->partition_start = info.start;
+		hddp->partition_end = info.size;
+		if (desc->part_type == PART_TYPE_EFI)
+			hddp->partmap_type = 2;
+		else
+			hddp->partmap_type = 1;
+		hddp->signature_type = desc->sig_type;
+		if (hddp->signature_type != 0)
+			memcpy(hddp->partition_signature, &desc->guid_sig,
+			       sizeof(hddp->partition_signature));
+
+		buf = &hddp[1];
+	}
+
+	return buf;
+}
+
+
+/* Construct a device-path from a partition on a blk device: */
+struct efi_device_path *efi_dp_from_part(struct blk_desc *desc, int part)
+{
+	void *buf, *start;
+
+	start = buf = dp_alloc(dp_part_size(desc, part) + sizeof(END));
+
+	buf = dp_part_fill(buf, desc, part);
+
+	*((struct efi_device_path *)buf) = END;
+
+	return start;
+}
+
+/* convert path to an UEFI style path (ie. DOS style backslashes and utf16) */
+static void path_to_uefi(u16 *uefi, const char *path)
+{
+	while (*path) {
+		char c = *(path++);
+		if (c == '/')
+			c = '\\';
+		*(uefi++) = c;
+	}
+	*uefi = '\0';
+}
+
+/*
+ * If desc is NULL, this creates a path with only the file component,
+ * otherwise it creates a full path with both device and file components
+ */
+struct efi_device_path *efi_dp_from_file(struct blk_desc *desc, int part,
+		const char *path)
+{
+	struct efi_device_path_file_path *fp;
+	void *buf, *start;
+	unsigned dpsize = 0, fpsize;
+
+	if (desc)
+		dpsize = dp_part_size(desc, part);
+
+	fpsize = sizeof(struct efi_device_path) + 2 * (strlen(path) + 1);
+	dpsize += fpsize;
+
+	start = buf = dp_alloc(dpsize + sizeof(END));
+
+	if (desc)
+		buf = dp_part_fill(buf, desc, part);
+
+	/* add file-path: */
+	fp = buf;
+	fp->dp.type = DEVICE_PATH_TYPE_MEDIA_DEVICE;
+	fp->dp.sub_type = DEVICE_PATH_SUB_TYPE_FILE_PATH;
+	fp->dp.length = fpsize;
+	path_to_uefi(fp->str, path);
+	buf += fpsize;
+
+	*((struct efi_device_path *)buf) = END;
+
+	return start;
+}
+
+#ifdef CONFIG_NET
+struct efi_device_path *efi_dp_from_eth(void)
+{
+	struct efi_device_path_mac_addr *ndp;
+	void *buf, *start;
+	unsigned dpsize = 0;
+
+	assert(eth_get_dev());
+
+#ifdef CONFIG_DM_ETH
+	dpsize += dp_size(eth_get_dev());
+#else
+	dpsize += sizeof(ROOT);
+#endif
+	dpsize += sizeof(*ndp);
+
+	start = buf = dp_alloc(dpsize + sizeof(END));
+
+#ifdef CONFIG_DM_ETH
+	buf = dp_fill(buf, eth_get_dev());
+#else
+	memcpy(buf, &ROOT, sizeof(ROOT));
+	buf += sizeof(ROOT);
+#endif
+
+	ndp = buf;
+	ndp->dp.type = DEVICE_PATH_TYPE_MESSAGING_DEVICE;
+	ndp->dp.sub_type = DEVICE_PATH_SUB_TYPE_MSG_MAC_ADDR;
+	ndp->dp.length = sizeof(*ndp);
+	memcpy(ndp->mac.addr, eth_get_ethaddr(), ARP_HLEN);
+	buf = &ndp[1];
+
+	*((struct efi_device_path *)buf) = END;
+
+	return start;
+}
+#endif
+
+/*
+ * Helper to split a full device path (containing both device and file
+ * parts) into it's constituent parts.
+ */
+void efi_dp_split_file_path(struct efi_device_path *full_path,
+			    struct efi_device_path **device_path,
+			    struct efi_device_path **file_path)
+{
+	struct efi_device_path *p, *dp, *fp;
+
+	dp = efi_dp_dup(full_path);
+	p = dp;
+	while (!EFI_DP_TYPE(p, MEDIA_DEVICE, FILE_PATH))
+		p = efi_dp_next(p);
+	fp = efi_dp_dup(p);
+
+	p->type = DEVICE_PATH_TYPE_END;
+	p->sub_type = DEVICE_PATH_SUB_TYPE_END;
+	p->length = sizeof(*p);
+
+	*device_path = dp;
+	*file_path = fp;
+}

commit 9fafdb851e7694b5ef41b98ecd1c390f19412e88
Author: Peter Jones <pjones@redhat.com>
Date:   Wed Sep 13 18:05:27 2017 -0400

    UPSTREAM: efi: add some more device path structures
    
    Signed-off-by: Peter Jones <pjones@redhat.com>
    Signed-off-by: Rob Clark <robdclark@gmail.com>
    Signed-off-by: Alexander Graf <agraf@suse.de>
    (cherry picked from commit c80214ce1f39a9b9da32dbe941ff83051b03c080)
    
    Change-Id: Ice059bac8f3e6f74c2d95ddca7a3116068484cd2
    Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>

diff --git a/include/efi_api.h b/include/efi_api.h
index ec1b321e8e..d540ada8c7 100644
--- a/include/efi_api.h
+++ b/include/efi_api.h
@@ -290,8 +290,38 @@ struct efi_mac_addr {
 	u8 addr[32];
 };
 
+#define DEVICE_PATH_TYPE_HARDWARE_DEVICE	0x01
+#  define DEVICE_PATH_SUB_TYPE_VENDOR		0x04
+
+struct efi_device_path_vendor {
+	struct efi_device_path dp;
+	efi_guid_t guid;
+	u8 vendor_data[];
+} __packed;
+
+#define DEVICE_PATH_TYPE_ACPI_DEVICE		0x02
+#  define DEVICE_PATH_SUB_TYPE_ACPI_DEVICE	0x01
+
+#define EFI_PNP_ID(ID)				(u32)(((ID) << 16) | 0x41D0)
+#define EISA_PNP_ID(ID)				EFI_PNP_ID(ID)
+
+struct efi_device_path_acpi_path {
+	struct efi_device_path dp;
+	u32 hid;
+	u32 uid;
+} __packed;
+
 #define DEVICE_PATH_TYPE_MESSAGING_DEVICE	0x03
+#  define DEVICE_PATH_SUB_TYPE_MSG_USB		0x05
 #  define DEVICE_PATH_SUB_TYPE_MSG_MAC_ADDR	0x0b
+#  define DEVICE_PATH_SUB_TYPE_MSG_SD		0x1a
+#  define DEVICE_PATH_SUB_TYPE_MSG_MMC		0x1d
+
+struct efi_device_path_usb {
+	struct efi_device_path dp;
+	u8 parent_port_number;
+	u8 usb_interface;
+} __packed;
 
 struct efi_device_path_mac_addr {
 	struct efi_device_path dp;
@@ -299,9 +329,33 @@ struct efi_device_path_mac_addr {
 	u8 if_type;
 };
 
+struct efi_device_path_sd_mmc_path {
+	struct efi_device_path dp;
+	u8 slot_number;
+} __packed;
+
 #define DEVICE_PATH_TYPE_MEDIA_DEVICE		0x04
+#  define DEVICE_PATH_SUB_TYPE_HARD_DRIVE_PATH	0x01
+#  define DEVICE_PATH_SUB_TYPE_CDROM_PATH	0x02
 #  define DEVICE_PATH_SUB_TYPE_FILE_PATH	0x04
 
+struct efi_device_path_hard_drive_path {
+	struct efi_device_path dp;
+	u32 partition_number;
+	u64 partition_start;
+	u64 partition_end;
+	u8 partition_signature[16];
+	u8 partmap_type;
+	u8 signature_type;
+} __packed;
+
+struct efi_device_path_cdrom_path {
+	struct efi_device_path dp;
+	u32 boot_entry;
+	u64 partition_start;
+	u64 partition_end;
+} __packed;
+
 struct efi_device_path_file_path {
 	struct efi_device_path dp;
 	u16 str[32];

commit 52db8715b401e3651c3b7e339b67de7dc5aff2fb
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Nov 11 17:08:08 2019 +0800

    video/drm: analogix_dp: Workaround async issue between pclk clock and 24m clock
    
    Background:
    - EDP software register bank is on the EDP 24m clock domain;
    - CPU access EDP software register bank, need to go through EDP APB
      read/write bus and EDP internal read/write bus;
    - EDP APB read/write bus is on the EDP pclk clock domain;
    - EDP internal read/write bus is on the EDP 24m clock domain;
    - Asynchronous logic circuit is added between APB read/write bus and
      Internal read/write bus;
    
    Issue:
    There is a bug on the Asynchronous logic circuit between APB read/write
    bus and Internal read/write bus; This bug will be random to cause the
    following wrong control/address signals sequence happen;
    - For write, maybe wrong register address is wrote in;
    - For read, maybe wrong register address is read out;
    
    Workaround:
    - For CPU write EDP register operation, write any register need
    following three steps,
    1): Read EDP_BASE+0x00 dummy register firstly, latch the dummy
    register address on Reg_Address bus, to avoid next step write to
    wrong register to cause function register overrun;
    2): 1st time to write the EDP register you want to operate,
    to latch the real write address on Reg_Address bus;
    3): 2nd time to write the EDP register you want to operate,
    to make sure the data is write on the real write address;
    - For CPU read EDP register operation, read any register need following
    two steps,
    1): 1st time to read the EDP register you want to operate, to latch
    the real read address on Reg_Address bus;
    2): 2nd time to read the EDP register you want to operate, to make
    sure the data is read out from the real read address;
    
    Change-Id: I42613145b1d414321ac1aef290a35969a1461e36
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/analogix_dp_reg.c b/drivers/video/drm/analogix_dp_reg.c
index a38900b5b8..6204d0f1f3 100644
--- a/drivers/video/drm/analogix_dp_reg.c
+++ b/drivers/video/drm/analogix_dp_reg.c
@@ -33,18 +33,32 @@
 #define COMMON_INT_MASK_4	(HOTPLUG_CHG | HPD_LOST | PLUG)
 #define INT_STA_MASK		INT_HPD
 
+static void analogix_dp_write(struct analogix_dp_device *dp, u32 reg, u32 val)
+{
+	readl(dp->reg_base);
+	writel(val, dp->reg_base + reg);
+	writel(val, dp->reg_base + reg);
+}
+
+static u32 analogix_dp_read(struct analogix_dp_device *dp, u32 reg)
+{
+	readl(dp->reg_base + reg);
+
+	return readl(dp->reg_base + reg);
+}
+
 void analogix_dp_enable_video_mute(struct analogix_dp_device *dp, bool enable)
 {
 	u32 reg;
 
 	if (enable) {
-		reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1);
+		reg = analogix_dp_read(dp, ANALOGIX_DP_VIDEO_CTL_1);
 		reg |= HDCP_VIDEO_MUTE;
-		writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1);
+		analogix_dp_write(dp, ANALOGIX_DP_VIDEO_CTL_1, reg);
 	} else {
-		reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1);
+		reg = analogix_dp_read(dp, ANALOGIX_DP_VIDEO_CTL_1);
 		reg &= ~HDCP_VIDEO_MUTE;
-		writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1);
+		analogix_dp_write(dp, ANALOGIX_DP_VIDEO_CTL_1, reg);
 	}
 }
 
@@ -52,9 +66,9 @@ void analogix_dp_stop_video(struct analogix_dp_device *dp)
 {
 	u32 reg;
 
-	reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1);
+	reg = analogix_dp_read(dp, ANALOGIX_DP_VIDEO_CTL_1);
 	reg &= ~VIDEO_EN;
-	writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1);
+	analogix_dp_write(dp, ANALOGIX_DP_VIDEO_CTL_1, reg);
 }
 
 void analogix_dp_lane_swap(struct analogix_dp_device *dp, bool enable)
@@ -68,7 +82,7 @@ void analogix_dp_lane_swap(struct analogix_dp_device *dp, bool enable)
 		reg = LANE3_MAP_LOGIC_LANE_3 | LANE2_MAP_LOGIC_LANE_2 |
 		      LANE1_MAP_LOGIC_LANE_1 | LANE0_MAP_LOGIC_LANE_0;
 
-	writel(reg, dp->reg_base + ANALOGIX_DP_LANE_MAP);
+	analogix_dp_write(dp, ANALOGIX_DP_LANE_MAP, reg);
 }
 
 void analogix_dp_init_analog_param(struct analogix_dp_device *dp)
@@ -76,10 +90,10 @@ void analogix_dp_init_analog_param(struct analogix_dp_device *dp)
 	u32 reg;
 
 	reg = TX_TERMINAL_CTRL_50_OHM;
-	writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_1);
+	analogix_dp_write(dp, ANALOGIX_DP_ANALOG_CTL_1, reg);
 
 	reg = SEL_24M | TX_DVDD_BIT_1_0625V;
-	writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_2);
+	analogix_dp_write(dp, ANALOGIX_DP_ANALOG_CTL_2, reg);
 
 	if (dp->plat_data.dev_type == ROCKCHIP_DP) {
 		reg = REF_CLK_24M;
@@ -87,43 +101,43 @@ void analogix_dp_init_analog_param(struct analogix_dp_device *dp)
 		    dp->plat_data.subdev_type == RK3368_EDP)
 			reg ^= REF_CLK_MASK;
 
-		writel(reg, dp->reg_base + ANALOGIX_DP_PLL_REG_1);
-		writel(0x95, dp->reg_base + ANALOGIX_DP_PLL_REG_2);
-		writel(0x40, dp->reg_base + ANALOGIX_DP_PLL_REG_3);
-		writel(0x58, dp->reg_base + ANALOGIX_DP_PLL_REG_4);
-		writel(0x22, dp->reg_base + ANALOGIX_DP_PLL_REG_5);
+		analogix_dp_write(dp, ANALOGIX_DP_PLL_REG_1, reg);
+		analogix_dp_write(dp, ANALOGIX_DP_PLL_REG_2, 0x95);
+		analogix_dp_write(dp, ANALOGIX_DP_PLL_REG_3, 0x40);
+		analogix_dp_write(dp, ANALOGIX_DP_PLL_REG_4, 0x58);
+		analogix_dp_write(dp, ANALOGIX_DP_PLL_REG_5, 0x22);
 	}
 
 	reg = DRIVE_DVDD_BIT_1_0625V | VCO_BIT_600_MICRO;
-	writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_3);
+	analogix_dp_write(dp, ANALOGIX_DP_ANALOG_CTL_3, reg);
 
 	reg = PD_RING_OSC | AUX_TERMINAL_CTRL_50_OHM |
 		TX_CUR1_2X | TX_CUR_16_MA;
-	writel(reg, dp->reg_base + ANALOGIX_DP_PLL_FILTER_CTL_1);
+	analogix_dp_write(dp, ANALOGIX_DP_PLL_FILTER_CTL_1, reg);
 
 	reg = CH3_AMP_400_MV | CH2_AMP_400_MV |
 		CH1_AMP_400_MV | CH0_AMP_400_MV;
-	writel(reg, dp->reg_base + ANALOGIX_DP_TX_AMP_TUNING_CTL);
+	analogix_dp_write(dp, ANALOGIX_DP_TX_AMP_TUNING_CTL, reg);
 }
 
 void analogix_dp_init_interrupt(struct analogix_dp_device *dp)
 {
 	/* Set interrupt pin assertion polarity as high */
-	writel(INT_POL1 | INT_POL0, dp->reg_base + ANALOGIX_DP_INT_CTL);
+	analogix_dp_write(dp, ANALOGIX_DP_INT_CTL, INT_POL1 | INT_POL0);
 
 	/* Clear pending regisers */
-	writel(0xff, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_1);
-	writel(0x4f, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_2);
-	writel(0xe0, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_3);
-	writel(0xe7, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_4);
-	writel(0x63, dp->reg_base + ANALOGIX_DP_INT_STA);
+	analogix_dp_write(dp, ANALOGIX_DP_COMMON_INT_STA_1, 0xff);
+	analogix_dp_write(dp, ANALOGIX_DP_COMMON_INT_STA_2, 0x4f);
+	analogix_dp_write(dp, ANALOGIX_DP_COMMON_INT_STA_3, 0xe0);
+	analogix_dp_write(dp, ANALOGIX_DP_COMMON_INT_STA_4, 0xe7);
+	analogix_dp_write(dp, ANALOGIX_DP_INT_STA, 0x63);
 
 	/* 0:mask,1: unmask */
-	writel(0x00, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_1);
-	writel(0x00, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_2);
-	writel(0x00, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_3);
-	writel(0x00, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4);
-	writel(0x00, dp->reg_base + ANALOGIX_DP_INT_STA_MASK);
+	analogix_dp_write(dp, ANALOGIX_DP_COMMON_INT_MASK_1, 0x00);
+	analogix_dp_write(dp, ANALOGIX_DP_COMMON_INT_MASK_2, 0x00);
+	analogix_dp_write(dp, ANALOGIX_DP_COMMON_INT_MASK_3, 0x00);
+	analogix_dp_write(dp, ANALOGIX_DP_COMMON_INT_MASK_4, 0x00);
+	analogix_dp_write(dp, ANALOGIX_DP_INT_STA_MASK, 0x00);
 }
 
 void analogix_dp_reset(struct analogix_dp_device *dp)
@@ -136,44 +150,44 @@ void analogix_dp_reset(struct analogix_dp_device *dp)
 	reg = MASTER_VID_FUNC_EN_N | SLAVE_VID_FUNC_EN_N |
 		AUD_FIFO_FUNC_EN_N | AUD_FUNC_EN_N |
 		HDCP_FUNC_EN_N | SW_FUNC_EN_N;
-	writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_1);
+	analogix_dp_write(dp, ANALOGIX_DP_FUNC_EN_1, reg);
 
 	reg = SSC_FUNC_EN_N | AUX_FUNC_EN_N |
 		SERDES_FIFO_FUNC_EN_N |
 		LS_CLK_DOMAIN_FUNC_EN_N;
-	writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_2);
+	analogix_dp_write(dp, ANALOGIX_DP_FUNC_EN_2, reg);
 
 	udelay(30);
 
 	analogix_dp_lane_swap(dp, 0);
 
-	writel(0x0, dp->reg_base + ANALOGIX_DP_SYS_CTL_1);
-	writel(0x40, dp->reg_base + ANALOGIX_DP_SYS_CTL_2);
-	writel(0x0, dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
-	writel(0x0, dp->reg_base + ANALOGIX_DP_SYS_CTL_4);
+	analogix_dp_write(dp, ANALOGIX_DP_SYS_CTL_1, 0x0);
+	analogix_dp_write(dp, ANALOGIX_DP_SYS_CTL_2, 0x40);
+	analogix_dp_write(dp, ANALOGIX_DP_SYS_CTL_3, 0x0);
+	analogix_dp_write(dp, ANALOGIX_DP_SYS_CTL_4, 0x0);
 
-	writel(0x0, dp->reg_base + ANALOGIX_DP_PKT_SEND_CTL);
-	writel(0x0, dp->reg_base + ANALOGIX_DP_HDCP_CTL);
+	analogix_dp_write(dp, ANALOGIX_DP_PKT_SEND_CTL, 0x0);
+	analogix_dp_write(dp, ANALOGIX_DP_HDCP_CTL, 0x0);
 
-	writel(0x5e, dp->reg_base + ANALOGIX_DP_HPD_DEGLITCH_L);
-	writel(0x1a, dp->reg_base + ANALOGIX_DP_HPD_DEGLITCH_H);
+	analogix_dp_write(dp, ANALOGIX_DP_HPD_DEGLITCH_L, 0x5e);
+	analogix_dp_write(dp, ANALOGIX_DP_HPD_DEGLITCH_H, 0x1a);
 
-	writel(0x10, dp->reg_base + ANALOGIX_DP_LINK_DEBUG_CTL);
+	analogix_dp_write(dp, ANALOGIX_DP_LINK_DEBUG_CTL, 0x10);
 
-	writel(0x0, dp->reg_base + ANALOGIX_DP_PHY_TEST);
+	analogix_dp_write(dp, ANALOGIX_DP_PHY_TEST, 0x0);
 
-	writel(0x0, dp->reg_base + ANALOGIX_DP_VIDEO_FIFO_THRD);
-	writel(0x20, dp->reg_base + ANALOGIX_DP_AUDIO_MARGIN);
+	analogix_dp_write(dp, ANALOGIX_DP_VIDEO_FIFO_THRD, 0x0);
+	analogix_dp_write(dp, ANALOGIX_DP_AUDIO_MARGIN, 0x20);
 
-	writel(0x4, dp->reg_base + ANALOGIX_DP_M_VID_GEN_FILTER_TH);
-	writel(0x2, dp->reg_base + ANALOGIX_DP_M_AUD_GEN_FILTER_TH);
+	analogix_dp_write(dp, ANALOGIX_DP_M_VID_GEN_FILTER_TH, 0x4);
+	analogix_dp_write(dp, ANALOGIX_DP_M_AUD_GEN_FILTER_TH, 0x2);
 
-	writel(0x00000101, dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL);
+	analogix_dp_write(dp, ANALOGIX_DP_SOC_GENERAL_CTL, 0x00000101);
 }
 
 void analogix_dp_swreset(struct analogix_dp_device *dp)
 {
-	writel(RESET_DP_TX, dp->reg_base + ANALOGIX_DP_TX_SW_RESET);
+	analogix_dp_write(dp, ANALOGIX_DP_TX_SW_RESET, RESET_DP_TX);
 }
 
 void analogix_dp_config_interrupt(struct analogix_dp_device *dp)
@@ -182,19 +196,19 @@ void analogix_dp_config_interrupt(struct analogix_dp_device *dp)
 
 	/* 0: mask, 1: unmask */
 	reg = COMMON_INT_MASK_1;
-	writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_1);
+	analogix_dp_write(dp, ANALOGIX_DP_COMMON_INT_MASK_1, reg);
 
 	reg = COMMON_INT_MASK_2;
-	writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_2);
+	analogix_dp_write(dp, ANALOGIX_DP_COMMON_INT_MASK_2, reg);
 
 	reg = COMMON_INT_MASK_3;
-	writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_3);
+	analogix_dp_write(dp, ANALOGIX_DP_COMMON_INT_MASK_3, reg);
 
 	reg = COMMON_INT_MASK_4;
-	writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4);
+	analogix_dp_write(dp, ANALOGIX_DP_COMMON_INT_MASK_4, reg);
 
 	reg = INT_STA_MASK;
-	writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA_MASK);
+	analogix_dp_write(dp, ANALOGIX_DP_INT_STA_MASK, reg);
 }
 
 void analogix_dp_mute_hpd_interrupt(struct analogix_dp_device *dp)
@@ -202,13 +216,13 @@ void analogix_dp_mute_hpd_interrupt(struct analogix_dp_device *dp)
 	u32 reg;
 
 	/* 0: mask, 1: unmask */
-	reg = readl(dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4);
+	reg = analogix_dp_read(dp, ANALOGIX_DP_COMMON_INT_MASK_4);
 	reg &= ~COMMON_INT_MASK_4;
-	writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4);
+	analogix_dp_write(dp, ANALOGIX_DP_COMMON_INT_MASK_4, reg);
 
-	reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA_MASK);
+	reg = analogix_dp_read(dp, ANALOGIX_DP_INT_STA_MASK);
 	reg &= ~INT_STA_MASK;
-	writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA_MASK);
+	analogix_dp_write(dp, ANALOGIX_DP_INT_STA_MASK, reg);
 }
 
 void analogix_dp_unmute_hpd_interrupt(struct analogix_dp_device *dp)
@@ -217,17 +231,17 @@ void analogix_dp_unmute_hpd_interrupt(struct analogix_dp_device *dp)
 
 	/* 0: mask, 1: unmask */
 	reg = COMMON_INT_MASK_4;
-	writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4);
+	analogix_dp_write(dp, ANALOGIX_DP_COMMON_INT_MASK_4, reg);
 
 	reg = INT_STA_MASK;
-	writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA_MASK);
+	analogix_dp_write(dp, ANALOGIX_DP_INT_STA_MASK, reg);
 }
 
 enum pll_status analogix_dp_get_pll_lock_status(struct analogix_dp_device *dp)
 {
 	u32 reg;
 
-	reg = readl(dp->reg_base + ANALOGIX_DP_DEBUG_CTL);
+	reg = analogix_dp_read(dp, ANALOGIX_DP_DEBUG_CTL);
 	if (reg & PLL_LOCK)
 		return PLL_LOCKED;
 	else
@@ -239,13 +253,13 @@ void analogix_dp_set_pll_power_down(struct analogix_dp_device *dp, bool enable)
 	u32 reg;
 
 	if (enable) {
-		reg = readl(dp->reg_base + ANALOGIX_DP_PLL_CTL);
+		reg = analogix_dp_read(dp, ANALOGIX_DP_PLL_CTL);
 		reg |= DP_PLL_PD;
-		writel(reg, dp->reg_base + ANALOGIX_DP_PLL_CTL);
+		analogix_dp_write(dp, ANALOGIX_DP_PLL_CTL, reg);
 	} else {
-		reg = readl(dp->reg_base + ANALOGIX_DP_PLL_CTL);
+		reg = analogix_dp_read(dp, ANALOGIX_DP_PLL_CTL);
 		reg &= ~DP_PLL_PD;
-		writel(reg, dp->reg_base + ANALOGIX_DP_PLL_CTL);
+		analogix_dp_write(dp, ANALOGIX_DP_PLL_CTL, reg);
 	}
 }
 
@@ -262,77 +276,77 @@ void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
 	switch (block) {
 	case AUX_BLOCK:
 		if (enable) {
-			reg = readl(dp->reg_base + phy_pd_addr);
+			reg = analogix_dp_read(dp, phy_pd_addr);
 			reg |= AUX_PD;
-			writel(reg, dp->reg_base + phy_pd_addr);
+			analogix_dp_write(dp, phy_pd_addr, reg);
 		} else {
-			reg = readl(dp->reg_base + phy_pd_addr);
+			reg = analogix_dp_read(dp, phy_pd_addr);
 			reg &= ~AUX_PD;
-			writel(reg, dp->reg_base + phy_pd_addr);
+			analogix_dp_write(dp, phy_pd_addr, reg);
 		}
 		break;
 	case CH0_BLOCK:
 		if (enable) {
-			reg = readl(dp->reg_base + phy_pd_addr);
+			reg = analogix_dp_read(dp, phy_pd_addr);
 			reg |= CH0_PD;
-			writel(reg, dp->reg_base + phy_pd_addr);
+			analogix_dp_write(dp, phy_pd_addr, reg);
 		} else {
-			reg = readl(dp->reg_base + phy_pd_addr);
+			reg = analogix_dp_read(dp, phy_pd_addr);
 			reg &= ~CH0_PD;
-			writel(reg, dp->reg_base + phy_pd_addr);
+			analogix_dp_write(dp, phy_pd_addr, reg);
 		}
 		break;
 	case CH1_BLOCK:
 		if (enable) {
-			reg = readl(dp->reg_base + phy_pd_addr);
+			reg = analogix_dp_read(dp, phy_pd_addr);
 			reg |= CH1_PD;
-			writel(reg, dp->reg_base + phy_pd_addr);
+			analogix_dp_write(dp, phy_pd_addr, reg);
 		} else {
-			reg = readl(dp->reg_base + phy_pd_addr);
+			reg = analogix_dp_read(dp, phy_pd_addr);
 			reg &= ~CH1_PD;
-			writel(reg, dp->reg_base + phy_pd_addr);
+			analogix_dp_write(dp, phy_pd_addr, reg);
 		}
 		break;
 	case CH2_BLOCK:
 		if (enable) {
-			reg = readl(dp->reg_base + phy_pd_addr);
+			reg = analogix_dp_read(dp, phy_pd_addr);
 			reg |= CH2_PD;
-			writel(reg, dp->reg_base + phy_pd_addr);
+			analogix_dp_write(dp, phy_pd_addr, reg);
 		} else {
-			reg = readl(dp->reg_base + phy_pd_addr);
+			reg = analogix_dp_read(dp, phy_pd_addr);
 			reg &= ~CH2_PD;
-			writel(reg, dp->reg_base + phy_pd_addr);
+			analogix_dp_write(dp, phy_pd_addr, reg);
 		}
 		break;
 	case CH3_BLOCK:
 		if (enable) {
-			reg = readl(dp->reg_base + phy_pd_addr);
+			reg = analogix_dp_read(dp, phy_pd_addr);
 			reg |= CH3_PD;
-			writel(reg, dp->reg_base + phy_pd_addr);
+			analogix_dp_write(dp, phy_pd_addr, reg);
 		} else {
-			reg = readl(dp->reg_base + phy_pd_addr);
+			reg = analogix_dp_read(dp, phy_pd_addr);
 			reg &= ~CH3_PD;
-			writel(reg, dp->reg_base + phy_pd_addr);
+			analogix_dp_write(dp, phy_pd_addr, reg);
 		}
 		break;
 	case ANALOG_TOTAL:
 		if (enable) {
-			reg = readl(dp->reg_base + phy_pd_addr);
+			reg = analogix_dp_read(dp, phy_pd_addr);
 			reg |= DP_PHY_PD;
-			writel(reg, dp->reg_base + phy_pd_addr);
+			analogix_dp_write(dp, phy_pd_addr, reg);
 		} else {
-			reg = readl(dp->reg_base + phy_pd_addr);
+			reg = analogix_dp_read(dp, phy_pd_addr);
 			reg &= ~DP_PHY_PD;
-			writel(reg, dp->reg_base + phy_pd_addr);
+			analogix_dp_write(dp, phy_pd_addr, reg);
 		}
 		break;
 	case POWER_ALL:
 		if (enable) {
 			reg = DP_PHY_PD | AUX_PD | CH3_PD | CH2_PD |
 				CH1_PD | CH0_PD;
-			writel(reg, dp->reg_base + phy_pd_addr);
+			analogix_dp_write(dp, phy_pd_addr, reg);
 		} else {
-			writel(0x00, dp->reg_base + phy_pd_addr);
+			analogix_dp_write(dp, phy_pd_addr, 0x00);
 		}
 		break;
 	default:
@@ -348,11 +362,11 @@ void analogix_dp_init_analog_func(struct analogix_dp_device *dp)
 	analogix_dp_set_analog_power_down(dp, POWER_ALL, 0);
 
 	reg = PLL_LOCK_CHG;
-	writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_1);
+	analogix_dp_write(dp, ANALOGIX_DP_COMMON_INT_STA_1, reg);
 
-	reg = readl(dp->reg_base + ANALOGIX_DP_DEBUG_CTL);
+	reg = analogix_dp_read(dp, ANALOGIX_DP_DEBUG_CTL);
 	reg &= ~(F_PLL_LOCK | PLL_LOCK_CTRL);
-	writel(reg, dp->reg_base + ANALOGIX_DP_DEBUG_CTL);
+	analogix_dp_write(dp, ANALOGIX_DP_DEBUG_CTL, reg);
 
 	/* Power up PLL */
 	if (analogix_dp_get_pll_lock_status(dp) == PLL_UNLOCKED) {
@@ -370,10 +384,10 @@ void analogix_dp_init_analog_func(struct analogix_dp_device *dp)
 	}
 
 	/* Enable Serdes FIFO function and Link symbol clock domain module */
-	reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_2);
+	reg = analogix_dp_read(dp, ANALOGIX_DP_FUNC_EN_2);
 	reg &= ~(SERDES_FIFO_FUNC_EN_N | LS_CLK_DOMAIN_FUNC_EN_N
 		| AUX_FUNC_EN_N);
-	writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_2);
+	analogix_dp_write(dp, ANALOGIX_DP_FUNC_EN_2, reg);
 }
 
 void analogix_dp_clear_hotplug_interrupts(struct analogix_dp_device *dp)
@@ -384,10 +398,10 @@ void analogix_dp_clear_hotplug_interrupts(struct analogix_dp_device *dp)
 		return;
 
 	reg = HOTPLUG_CHG | HPD_LOST | PLUG;
-	writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_4);
+	analogix_dp_write(dp, ANALOGIX_DP_COMMON_INT_STA_4, reg);
 
 	reg = INT_HPD;
-	writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA);
+	analogix_dp_write(dp, ANALOGIX_DP_INT_STA, reg);
 }
 
 void analogix_dp_init_hpd(struct analogix_dp_device *dp)
@@ -399,18 +413,18 @@ void analogix_dp_init_hpd(struct analogix_dp_device *dp)
 
 	analogix_dp_clear_hotplug_interrupts(dp);
 
-	reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
+	reg = analogix_dp_read(dp, ANALOGIX_DP_SYS_CTL_3);
 	reg &= ~(F_HPD | HPD_CTRL);
-	writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
+	analogix_dp_write(dp, ANALOGIX_DP_SYS_CTL_3, reg);
 }
 
 void analogix_dp_force_hpd(struct analogix_dp_device *dp)
 {
 	u32 reg;
 
-	reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
-	reg = (F_HPD | HPD_CTRL);
-	writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
+	reg = analogix_dp_read(dp, ANALOGIX_DP_SYS_CTL_3);
+	reg |= (F_HPD | HPD_CTRL);
+	analogix_dp_write(dp, ANALOGIX_DP_SYS_CTL_3, reg);
 }
 
 enum dp_irq_type analogix_dp_get_irq_type(struct analogix_dp_device *dp)
@@ -425,7 +439,7 @@ enum dp_irq_type analogix_dp_get_irq_type(struct analogix_dp_device *dp)
 			return DP_IRQ_TYPE_HP_CABLE_OUT;
 	} else {
 		/* Parse hotplug interrupt status register */
-		reg = readl(dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_4);
+		reg = analogix_dp_read(dp, ANALOGIX_DP_COMMON_INT_STA_4);
 
 		if (reg & PLUG)
 			return DP_IRQ_TYPE_HP_CABLE_IN;
@@ -445,9 +459,9 @@ void analogix_dp_reset_aux(struct analogix_dp_device *dp)
 	u32 reg;
 
 	/* Disable AUX channel module */
-	reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_2);
+	reg = analogix_dp_read(dp, ANALOGIX_DP_FUNC_EN_2);
 	reg |= AUX_FUNC_EN_N;
-	writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_2);
+	analogix_dp_write(dp, ANALOGIX_DP_FUNC_EN_2, reg);
 }
 
 void analogix_dp_init_aux(struct analogix_dp_device *dp)
@@ -456,7 +470,7 @@ void analogix_dp_init_aux(struct analogix_dp_device *dp)
 
 	/* Clear inerrupts related to AUX channel */
 	reg = RPLY_RECEIV | AUX_ERR;
-	writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA);
+	analogix_dp_write(dp, ANALOGIX_DP_INT_STA, reg);
 
 	analogix_dp_reset_aux(dp);
 
@@ -469,16 +483,16 @@ void analogix_dp_init_aux(struct analogix_dp_device *dp)
 		reg = AUX_BIT_PERIOD_EXPECTED_DELAY(3) |
 		      AUX_HW_RETRY_COUNT_SEL(0) |
 		      AUX_HW_RETRY_INTERVAL_600_MICROSECONDS;
-	writel(reg, dp->reg_base + ANALOGIX_DP_AUX_HW_RETRY_CTL);
+	analogix_dp_write(dp, ANALOGIX_DP_AUX_HW_RETRY_CTL, reg);
 
 	/* Receive AUX Channel DEFER commands equal to DEFFER_COUNT*64 */
 	reg = DEFER_CTRL_EN | DEFER_COUNT(1);
-	writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_DEFER_CTL);
+	analogix_dp_write(dp, ANALOGIX_DP_AUX_CH_DEFER_CTL, reg);
 
 	/* Enable AUX channel module */
-	reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_2);
+	reg = analogix_dp_read(dp, ANALOGIX_DP_FUNC_EN_2);
 	reg &= ~AUX_FUNC_EN_N;
-	writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_2);
+	analogix_dp_write(dp, ANALOGIX_DP_FUNC_EN_2, reg);
 }
 
 int analogix_dp_get_plug_in_status(struct analogix_dp_device *dp)
@@ -489,7 +503,7 @@ int analogix_dp_get_plug_in_status(struct analogix_dp_device *dp)
 		if (dm_gpio_get_value(&dp->hpd_gpio))
 			return 0;
 	} else {
-		reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
+		reg = analogix_dp_read(dp, ANALOGIX_DP_SYS_CTL_3);
 		if (reg & HPD_STATUS)
 			return 0;
 	}
@@ -501,9 +515,9 @@ void analogix_dp_enable_sw_function(struct analogix_dp_device *dp)
 {
 	u32 reg;
 
-	reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_1);
+	reg = analogix_dp_read(dp, ANALOGIX_DP_FUNC_EN_1);
 	reg &= ~SW_FUNC_EN_N;
-	writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_1);
+	analogix_dp_write(dp, ANALOGIX_DP_FUNC_EN_1, reg);
 }
 
 int analogix_dp_start_aux_transaction(struct analogix_dp_device *dp)
@@ -513,12 +527,12 @@ int analogix_dp_start_aux_transaction(struct analogix_dp_device *dp)
 	int timeout_loop = 0;
 
 	/* Enable AUX CH operation */
-	reg = readl(dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_2);
+	reg = analogix_dp_read(dp, ANALOGIX_DP_AUX_CH_CTL_2);
 	reg |= AUX_EN;
-	writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_2);
+	analogix_dp_write(dp, ANALOGIX_DP_AUX_CH_CTL_2, reg);
 
 	/* Is AUX CH command reply received? */
-	reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA);
+	reg = analogix_dp_read(dp, ANALOGIX_DP_INT_STA);
 	while (!(reg & RPLY_RECEIV)) {
 		timeout_loop++;
 		if (DP_TIMEOUT_LOOP_COUNT < timeout_loop) {
@@ -526,22 +540,22 @@ int analogix_dp_start_aux_transaction(struct analogix_dp_device *dp)
 			return -ETIMEDOUT;
 		}
 
-		reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA);
+		reg = analogix_dp_read(dp, ANALOGIX_DP_INT_STA);
 		udelay(11);
 	}
 
 	/* Clear interrupt source for AUX CH command reply */
-	writel(RPLY_RECEIV, dp->reg_base + ANALOGIX_DP_INT_STA);
+	analogix_dp_write(dp, ANALOGIX_DP_INT_STA, reg);
 
 	/* Clear interrupt source for AUX CH access error */
-	reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA);
+	reg = analogix_dp_read(dp, ANALOGIX_DP_INT_STA);
 	if (reg & AUX_ERR) {
-		writel(AUX_ERR, dp->reg_base + ANALOGIX_DP_INT_STA);
+		analogix_dp_write(dp, ANALOGIX_DP_INT_STA, AUX_ERR);
 		return -EREMOTEIO;
 	}
 
 	/* Check AUX CH error access status */
-	reg = readl(dp->reg_base + ANALOGIX_DP_AUX_CH_STA);
+	reg = analogix_dp_read(dp, ANALOGIX_DP_AUX_CH_STA);
 	if ((reg & AUX_STATUS_MASK) != 0) {
 		dev_err(dp->dev,
 			"AUX CH error happens: %d\n", reg & AUX_STATUS_MASK);
@@ -562,19 +576,19 @@ int analogix_dp_write_byte_to_dpcd(struct analogix_dp_device *dp,
 	for (i = 0; i < 3; i++) {
 		/* Clear AUX CH data buffer */
 		reg = BUF_CLR;
-		writel(reg, dp->reg_base + ANALOGIX_DP_BUFFER_DATA_CTL);
+		analogix_dp_write(dp, ANALOGIX_DP_BUFFER_DATA_CTL, reg);
 
 		/* Select DPCD device address */
 		reg = AUX_ADDR_7_0(reg_addr);
-		writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_7_0);
+		analogix_dp_write(dp, ANALOGIX_DP_AUX_ADDR_7_0, reg);
 		reg = AUX_ADDR_15_8(reg_addr);
-		writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_15_8);
+		analogix_dp_write(dp, ANALOGIX_DP_AUX_ADDR_15_8, reg);
 		reg = AUX_ADDR_19_16(reg_addr);
-		writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_19_16);
+		analogix_dp_write(dp, ANALOGIX_DP_AUX_ADDR_19_16, reg);
 
 		/* Write data buffer */
 		reg = (unsigned int)data;
-		writel(reg, dp->reg_base + ANALOGIX_DP_BUF_DATA_0);
+		analogix_dp_write(dp, ANALOGIX_DP_BUF_DATA_0, reg);
 
 		/*
 		 * Set DisplayPort transaction and write 1 byte
@@ -582,7 +596,7 @@ int analogix_dp_write_byte_to_dpcd(struct analogix_dp_device *dp,
 		 * If Bit 3 is 0, I2C transaction.
 		 */
 		reg = AUX_TX_COMM_DP_TRANSACTION | AUX_TX_COMM_WRITE;
-		writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_1);
+		analogix_dp_write(dp, ANALOGIX_DP_AUX_CH_CTL_1, reg);
 
 		/* Start AUX transaction */
 		retval = analogix_dp_start_aux_transaction(dp);
@@ -604,15 +618,15 @@ int analogix_dp_read_byte_from_dpcd(struct analogix_dp_device *dp,
 	for (i = 0; i < 3; i++) {
 		/* Clear AUX CH data buffer */
 		reg = BUF_CLR;
-		writel(reg, dp->reg_base + ANALOGIX_DP_BUFFER_DATA_CTL);
+		analogix_dp_write(dp, ANALOGIX_DP_BUFFER_DATA_CTL, reg);
 
 		/* Select DPCD device address */
 		reg = AUX_ADDR_7_0(reg_addr);
-		writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_7_0);
+		analogix_dp_write(dp, ANALOGIX_DP_AUX_ADDR_7_0, reg);
 		reg = AUX_ADDR_15_8(reg_addr);
-		writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_15_8);
+		analogix_dp_write(dp, ANALOGIX_DP_AUX_ADDR_15_8, reg);
 		reg = AUX_ADDR_19_16(reg_addr);
-		writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_19_16);
+		analogix_dp_write(dp, ANALOGIX_DP_AUX_ADDR_19_16, reg);
 
 		/*
 		 * Set DisplayPort transaction and read 1 byte
@@ -620,7 +634,7 @@ int analogix_dp_read_byte_from_dpcd(struct analogix_dp_device *dp,
 		 * If Bit 3 is 0, I2C transaction.
 		 */
 		reg = AUX_TX_COMM_DP_TRANSACTION | AUX_TX_COMM_READ;
-		writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_1);
+		analogix_dp_write(dp, ANALOGIX_DP_AUX_CH_CTL_1, reg);
 
 		/* Start AUX transaction */
 		retval = analogix_dp_start_aux_transaction(dp);
@@ -629,7 +643,7 @@ int analogix_dp_read_byte_from_dpcd(struct analogix_dp_device *dp,
 	}
 
 	/* Read data buffer */
-	reg = readl(dp->reg_base + ANALOGIX_DP_BUF_DATA_0);
+	reg = analogix_dp_read(dp, ANALOGIX_DP_BUF_DATA_0);
 	*data = (unsigned char)(reg & 0xff);
 
 	return retval;
@@ -649,7 +663,7 @@ int analogix_dp_write_bytes_to_dpcd(struct analogix_dp_device *dp,
 
 	/* Clear AUX CH data buffer */
 	reg = BUF_CLR;
-	writel(reg, dp->reg_base + ANALOGIX_DP_BUFFER_DATA_CTL);
+	analogix_dp_write(dp, ANALOGIX_DP_BUFFER_DATA_CTL, reg);
 
 	start_offset = 0;
 	while (start_offset < count) {
@@ -662,18 +676,17 @@ int analogix_dp_write_bytes_to_dpcd(struct analogix_dp_device *dp,
 		for (i = 0; i < 3; i++) {
 			/* Select DPCD device address */
 			reg = AUX_ADDR_7_0(reg_addr + start_offset);
-			writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_7_0);
+			analogix_dp_write(dp, ANALOGIX_DP_AUX_ADDR_7_0, reg);
 			reg = AUX_ADDR_15_8(reg_addr + start_offset);
-			writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_15_8);
+			analogix_dp_write(dp, ANALOGIX_DP_AUX_ADDR_15_8, reg);
 			reg = AUX_ADDR_19_16(reg_addr + start_offset);
-			writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_19_16);
+			analogix_dp_write(dp, ANALOGIX_DP_AUX_ADDR_19_16, reg);
 
 			for (cur_data_idx = 0; cur_data_idx < cur_data_count;
 			     cur_data_idx++) {
 				reg = data[start_offset + cur_data_idx];
-				writel(reg, dp->reg_base +
-				       ANALOGIX_DP_BUF_DATA_0 +
-				       4 * cur_data_idx);
+				analogix_dp_write(dp, ANALOGIX_DP_BUF_DATA_0 +
+				       4 * cur_data_idx, reg);
 			}
 
 			/*
@@ -683,7 +696,7 @@ int analogix_dp_write_bytes_to_dpcd(struct analogix_dp_device *dp,
 			 */
 			reg = AUX_LENGTH(cur_data_count) |
 				AUX_TX_COMM_DP_TRANSACTION | AUX_TX_COMM_WRITE;
-			writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_1);
+			analogix_dp_write(dp, ANALOGIX_DP_AUX_CH_CTL_1, reg);
 
 			/* Start AUX transaction */
 			retval = analogix_dp_start_aux_transaction(dp);
@@ -711,7 +724,7 @@ int analogix_dp_read_bytes_from_dpcd(struct analogix_dp_device *dp,
 
 	/* Clear AUX CH data buffer */
 	reg = BUF_CLR;
-	writel(reg, dp->reg_base + ANALOGIX_DP_BUFFER_DATA_CTL);
+	analogix_dp_write(dp, ANALOGIX_DP_BUFFER_DATA_CTL, reg);
 
 	start_offset = 0;
 	while (start_offset < count) {
@@ -725,11 +738,11 @@ int analogix_dp_read_bytes_from_dpcd(struct analogix_dp_device *dp,
 		for (i = 0; i < 3; i++) {
 			/* Select DPCD device address */
 			reg = AUX_ADDR_7_0(reg_addr + start_offset);
-			writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_7_0);
+			analogix_dp_write(dp, ANALOGIX_DP_AUX_ADDR_7_0, reg);
 			reg = AUX_ADDR_15_8(reg_addr + start_offset);
-			writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_15_8);
+			analogix_dp_write(dp, ANALOGIX_DP_AUX_ADDR_15_8, reg);
 			reg = AUX_ADDR_19_16(reg_addr + start_offset);
-			writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_19_16);
+			analogix_dp_write(dp, ANALOGIX_DP_AUX_ADDR_19_16, reg);
 
 			/*
 			 * Set DisplayPort transaction and read
@@ -738,7 +751,7 @@ int analogix_dp_read_bytes_from_dpcd(struct analogix_dp_device *dp,
 			 */
 			reg = AUX_LENGTH(cur_data_count) |
 				AUX_TX_COMM_DP_TRANSACTION | AUX_TX_COMM_READ;
-			writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_1);
+			analogix_dp_write(dp, ANALOGIX_DP_AUX_CH_CTL_1, reg);
 
 			/* Start AUX transaction */
 			retval = analogix_dp_start_aux_transaction(dp);
@@ -748,7 +761,7 @@ int analogix_dp_read_bytes_from_dpcd(struct analogix_dp_device *dp,
 
 		for (cur_data_idx = 0; cur_data_idx < cur_data_count;
 		    cur_data_idx++) {
-			reg = readl(dp->reg_base + ANALOGIX_DP_BUF_DATA_0
+			reg = analogix_dp_read(dp, ANALOGIX_DP_BUF_DATA_0
 						 + 4 * cur_data_idx);
 			data[start_offset + cur_data_idx] =
 				(unsigned char)reg;
@@ -769,12 +782,12 @@ int analogix_dp_select_i2c_device(struct analogix_dp_device *dp,
 
 	/* Set EDID device address */
 	reg = device_addr;
-	writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_7_0);
-	writel(0x0, dp->reg_base + ANALOGIX_DP_AUX_ADDR_15_8);
-	writel(0x0, dp->reg_base + ANALOGIX_DP_AUX_ADDR_19_16);
+	analogix_dp_write(dp, ANALOGIX_DP_AUX_ADDR_7_0, reg);
+	analogix_dp_write(dp, ANALOGIX_DP_AUX_ADDR_15_8, 0x0);
+	analogix_dp_write(dp, ANALOGIX_DP_AUX_ADDR_19_16, 0x0);
 
 	/* Set offset from base address of EDID device */
-	writel(reg_addr, dp->reg_base + ANALOGIX_DP_BUF_DATA_0);
+	analogix_dp_write(dp, ANALOGIX_DP_BUF_DATA_0, reg_addr);
 
 	/*
 	 * Set I2C transaction and write address
@@ -783,7 +796,7 @@ int analogix_dp_select_i2c_device(struct analogix_dp_device *dp,
 	 */
 	reg = AUX_TX_COMM_I2C_TRANSACTION | AUX_TX_COMM_MOT |
 		AUX_TX_COMM_WRITE;
-	writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_1);
+	analogix_dp_write(dp, ANALOGIX_DP_AUX_CH_CTL_1, reg);
 
 	/* Start AUX transaction */
 	retval = analogix_dp_start_aux_transaction(dp);
@@ -805,7 +818,7 @@ int analogix_dp_read_byte_from_i2c(struct analogix_dp_device *dp,
 	for (i = 0; i < 3; i++) {
 		/* Clear AUX CH data buffer */
 		reg = BUF_CLR;
-		writel(reg, dp->reg_base + ANALOGIX_DP_BUFFER_DATA_CTL);
+		analogix_dp_write(dp, ANALOGIX_DP_BUFFER_DATA_CTL, reg);
 
 		/* Select EDID device */
 		retval = analogix_dp_select_i2c_device(dp, device_addr,
@@ -820,7 +833,7 @@ int analogix_dp_read_byte_from_i2c(struct analogix_dp_device *dp,
 		 */
 		reg = AUX_TX_COMM_I2C_TRANSACTION |
 			AUX_TX_COMM_READ;
-		writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_1);
+		analogix_dp_write(dp, ANALOGIX_DP_AUX_CH_CTL_1, reg);
 
 		/* Start AUX transaction */
 		retval = analogix_dp_start_aux_transaction(dp);
@@ -830,7 +843,7 @@ int analogix_dp_read_byte_from_i2c(struct analogix_dp_device *dp,
 
 	/* Read data */
 	if (retval == 0)
-		*data = readl(dp->reg_base + ANALOGIX_DP_BUF_DATA_0);
+		*data = analogix_dp_read(dp, ANALOGIX_DP_BUF_DATA_0);
 
 	return retval;
 }
@@ -851,12 +864,12 @@ int analogix_dp_read_bytes_from_i2c(struct analogix_dp_device *dp,
 		for (j = 0; j < 3; j++) {
 			/* Clear AUX CH data buffer */
 			reg = BUF_CLR;
-			writel(reg, dp->reg_base + ANALOGIX_DP_BUFFER_DATA_CTL);
+			analogix_dp_write(dp, ANALOGIX_DP_BUFFER_DATA_CTL, reg);
 
 			/* Set normal AUX CH command */
-			reg = readl(dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_2);
+			reg = analogix_dp_read(dp, ANALOGIX_DP_AUX_CH_CTL_2);
 			reg &= ~ADDR_ONLY;
-			writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_2);
+			analogix_dp_write(dp, ANALOGIX_DP_AUX_CH_CTL_2, reg);
 
 			/*
 			 * If Rx sends defer, Tx sends only reads
@@ -877,8 +890,8 @@ int analogix_dp_read_bytes_from_i2c(struct analogix_dp_device *dp,
 				reg = AUX_LENGTH(16) |
 					AUX_TX_COMM_I2C_TRANSACTION |
 					AUX_TX_COMM_READ;
-				writel(reg, dp->reg_base +
-					ANALOGIX_DP_AUX_CH_CTL_1);
+				analogix_dp_write(dp, ANALOGIX_DP_AUX_CH_CTL_1,
+						  reg);
 
 				/* Start AUX transaction */
 				retval = analogix_dp_start_aux_transaction(dp);
@@ -886,7 +899,7 @@ int analogix_dp_read_bytes_from_i2c(struct analogix_dp_device *dp,
 					break;
 			}
 			/* Check if Rx sends defer */
-			reg = readl(dp->reg_base + ANALOGIX_DP_AUX_RX_COMM);
+			reg = analogix_dp_read(dp, ANALOGIX_DP_AUX_RX_COMM);
 			if (reg == AUX_RX_COMM_AUX_DEFER ||
 			    reg == AUX_RX_COMM_I2C_DEFER) {
 				dev_dbg(dp->dev, "Defer: %d\n\n", reg);
@@ -895,7 +908,7 @@ int analogix_dp_read_bytes_from_i2c(struct analogix_dp_device *dp,
 		}
 
 		for (cur_data_idx = 0; cur_data_idx < 16; cur_data_idx++) {
-			reg = readl(dp->reg_base + ANALOGIX_DP_BUF_DATA_0
+			reg = analogix_dp_read(dp, ANALOGIX_DP_BUF_DATA_0
 						 + 4 * cur_data_idx);
 			edid[i + cur_data_idx] = (unsigned char)reg;
 		}
@@ -910,14 +923,14 @@ void analogix_dp_set_link_bandwidth(struct analogix_dp_device *dp, u32 bwtype)
 
 	reg = bwtype;
 	if ((bwtype == DP_LINK_BW_2_7) || (bwtype == DP_LINK_BW_1_62))
-		writel(reg, dp->reg_base + ANALOGIX_DP_LINK_BW_SET);
+		analogix_dp_write(dp, ANALOGIX_DP_LINK_BW_SET, reg);
 }
 
 void analogix_dp_get_link_bandwidth(struct analogix_dp_device *dp, u32 *bwtype)
 {
 	u32 reg;
 
-	reg = readl(dp->reg_base + ANALOGIX_DP_LINK_BW_SET);
+	reg = analogix_dp_read(dp, ANALOGIX_DP_LINK_BW_SET);
 	*bwtype = reg;
 }
 
@@ -926,14 +939,14 @@ void analogix_dp_set_lane_count(struct analogix_dp_device *dp, u32 count)
 	u32 reg;
 
 	reg = count;
-	writel(reg, dp->reg_base + ANALOGIX_DP_LANE_COUNT_SET);
+	analogix_dp_write(dp, ANALOGIX_DP_LANE_COUNT_SET, reg);
 }
 
 void analogix_dp_get_lane_count(struct analogix_dp_device *dp, u32 *count)
 {
 	u32 reg;
 
-	reg = readl(dp->reg_base + ANALOGIX_DP_LANE_COUNT_SET);
+	reg = analogix_dp_read(dp, ANALOGIX_DP_LANE_COUNT_SET);
 	*count = reg;
 }
 
@@ -943,13 +956,13 @@ void analogix_dp_enable_enhanced_mode(struct analogix_dp_device *dp,
 	u32 reg;
 
 	if (enable) {
-		reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_4);
+		reg = analogix_dp_read(dp, ANALOGIX_DP_SYS_CTL_4);
 		reg |= ENHANCED;
-		writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_4);
+		analogix_dp_write(dp, ANALOGIX_DP_SYS_CTL_4, reg);
 	} else {
-		reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_4);
+		reg = analogix_dp_read(dp, ANALOGIX_DP_SYS_CTL_4);
 		reg &= ~ENHANCED;
-		writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_4);
+		analogix_dp_write(dp, ANALOGIX_DP_SYS_CTL_4, reg);
 	}
 }
 
@@ -961,25 +974,25 @@ void analogix_dp_set_training_pattern(struct analogix_dp_device *dp,
 	switch (pattern) {
 	case PRBS7:
 		reg = SCRAMBLING_ENABLE | LINK_QUAL_PATTERN_SET_PRBS7;
-		writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET);
+		analogix_dp_write(dp, ANALOGIX_DP_TRAINING_PTN_SET, reg);
 		break;
 	case D10_2:
 		reg = SCRAMBLING_ENABLE | LINK_QUAL_PATTERN_SET_D10_2;
-		writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET);
+		analogix_dp_write(dp, ANALOGIX_DP_TRAINING_PTN_SET, reg);
 		break;
 	case TRAINING_PTN1:
 		reg = SCRAMBLING_DISABLE | SW_TRAINING_PATTERN_SET_PTN1;
-		writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET);
+		analogix_dp_write(dp, ANALOGIX_DP_TRAINING_PTN_SET, reg);
 		break;
 	case TRAINING_PTN2:
 		reg = SCRAMBLING_DISABLE | SW_TRAINING_PATTERN_SET_PTN2;
-		writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET);
+		analogix_dp_write(dp, ANALOGIX_DP_TRAINING_PTN_SET, reg);
 		break;
 	case DP_NONE:
 		reg = SCRAMBLING_ENABLE |
 			LINK_QUAL_PATTERN_SET_DISABLE |
 			SW_TRAINING_PATTERN_SET_NORMAL;
-		writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET);
+		analogix_dp_write(dp, ANALOGIX_DP_TRAINING_PTN_SET, reg);
 		break;
 	default:
 		break;
@@ -991,10 +1004,10 @@ void analogix_dp_set_lane0_pre_emphasis(struct analogix_dp_device *dp,
 {
 	u32 reg;
 
-	reg = readl(dp->reg_base + ANALOGIX_DP_LN0_LINK_TRAINING_CTL);
+	reg = analogix_dp_read(dp, ANALOGIX_DP_LN0_LINK_TRAINING_CTL);
 	reg &= ~PRE_EMPHASIS_SET_MASK;
 	reg |= level << PRE_EMPHASIS_SET_SHIFT;
-	writel(reg, dp->reg_base + ANALOGIX_DP_LN0_LINK_TRAINING_CTL);
+	analogix_dp_write(dp, ANALOGIX_DP_LN0_LINK_TRAINING_CTL, reg);
 }
 
 void analogix_dp_set_lane1_pre_emphasis(struct analogix_dp_device *dp,
@@ -1002,10 +1015,10 @@ void analogix_dp_set_lane1_pre_emphasis(struct analogix_dp_device *dp,
 {
 	u32 reg;
 
-	reg = readl(dp->reg_base + ANALOGIX_DP_LN1_LINK_TRAINING_CTL);
+	reg = analogix_dp_read(dp, ANALOGIX_DP_LN1_LINK_TRAINING_CTL);
 	reg &= ~PRE_EMPHASIS_SET_MASK;
 	reg |= level << PRE_EMPHASIS_SET_SHIFT;
-	writel(reg, dp->reg_base + ANALOGIX_DP_LN1_LINK_TRAINING_CTL);
+	analogix_dp_write(dp, ANALOGIX_DP_LN1_LINK_TRAINING_CTL, reg);
 }
 
 void analogix_dp_set_lane2_pre_emphasis(struct analogix_dp_device *dp,
@@ -1013,10 +1026,10 @@ void analogix_dp_set_lane2_pre_emphasis(struct analogix_dp_device *dp,
 {
 	u32 reg;
 
-	reg = readl(dp->reg_base + ANALOGIX_DP_LN2_LINK_TRAINING_CTL);
+	reg = analogix_dp_read(dp, ANALOGIX_DP_LN2_LINK_TRAINING_CTL);
 	reg &= ~PRE_EMPHASIS_SET_MASK;
 	reg |= level << PRE_EMPHASIS_SET_SHIFT;
-	writel(reg, dp->reg_base + ANALOGIX_DP_LN2_LINK_TRAINING_CTL);
+	analogix_dp_write(dp, ANALOGIX_DP_LN2_LINK_TRAINING_CTL, reg);
 }
 
 void analogix_dp_set_lane3_pre_emphasis(struct analogix_dp_device *dp,
@@ -1024,10 +1037,10 @@ void analogix_dp_set_lane3_pre_emphasis(struct analogix_dp_device *dp,
 {
 	u32 reg;
 
-	reg = readl(dp->reg_base + ANALOGIX_DP_LN3_LINK_TRAINING_CTL);
+	reg = analogix_dp_read(dp, ANALOGIX_DP_LN3_LINK_TRAINING_CTL);
 	reg &= ~PRE_EMPHASIS_SET_MASK;
 	reg |= level << PRE_EMPHASIS_SET_SHIFT;
-	writel(reg, dp->reg_base + ANALOGIX_DP_LN3_LINK_TRAINING_CTL);
+	analogix_dp_write(dp, ANALOGIX_DP_LN3_LINK_TRAINING_CTL, reg);
 }
 
 void analogix_dp_set_lane0_link_training(struct analogix_dp_device *dp,
@@ -1036,7 +1049,7 @@ void analogix_dp_set_lane0_link_training(struct analogix_dp_device *dp,
 	u32 reg;
 
 	reg = training_lane;
-	writel(reg, dp->reg_base + ANALOGIX_DP_LN0_LINK_TRAINING_CTL);
+	analogix_dp_write(dp, ANALOGIX_DP_LN0_LINK_TRAINING_CTL, reg);
 }
 
 void analogix_dp_set_lane1_link_training(struct analogix_dp_device *dp,
@@ -1045,7 +1058,7 @@ void analogix_dp_set_lane1_link_training(struct analogix_dp_device *dp,
 	u32 reg;
 
 	reg = training_lane;
-	writel(reg, dp->reg_base + ANALOGIX_DP_LN1_LINK_TRAINING_CTL);
+	analogix_dp_write(dp, ANALOGIX_DP_LN1_LINK_TRAINING_CTL, reg);
 }
 
 void analogix_dp_set_lane2_link_training(struct analogix_dp_device *dp,
@@ -1054,7 +1067,7 @@ void analogix_dp_set_lane2_link_training(struct analogix_dp_device *dp,
 	u32 reg;
 
 	reg = training_lane;
-	writel(reg, dp->reg_base + ANALOGIX_DP_LN2_LINK_TRAINING_CTL);
+	analogix_dp_write(dp, ANALOGIX_DP_LN2_LINK_TRAINING_CTL, reg);
 }
 
 void analogix_dp_set_lane3_link_training(struct analogix_dp_device *dp,
@@ -1063,14 +1076,14 @@ void analogix_dp_set_lane3_link_training(struct analogix_dp_device *dp,
 	u32 reg;
 
 	reg = training_lane;
-	writel(reg, dp->reg_base + ANALOGIX_DP_LN3_LINK_TRAINING_CTL);
+	analogix_dp_write(dp, ANALOGIX_DP_LN3_LINK_TRAINING_CTL, reg);
 }
 
 u32 analogix_dp_get_lane0_link_training(struct analogix_dp_device *dp)
 {
 	u32 reg;
 
-	reg = readl(dp->reg_base + ANALOGIX_DP_LN0_LINK_TRAINING_CTL);
+	reg = analogix_dp_read(dp, ANALOGIX_DP_LN0_LINK_TRAINING_CTL);
 	return reg;
 }
 
@@ -1078,7 +1091,7 @@ u32 analogix_dp_get_lane1_link_training(struct analogix_dp_device *dp)
 {
 	u32 reg;
 
-	reg = readl(dp->reg_base + ANALOGIX_DP_LN1_LINK_TRAINING_CTL);
+	reg = analogix_dp_read(dp, ANALOGIX_DP_LN1_LINK_TRAINING_CTL);
 	return reg;
 }
 
@@ -1086,7 +1099,7 @@ u32 analogix_dp_get_lane2_link_training(struct analogix_dp_device *dp)
 {
 	u32 reg;
 
-	reg = readl(dp->reg_base + ANALOGIX_DP_LN2_LINK_TRAINING_CTL);
+	reg = analogix_dp_read(dp, ANALOGIX_DP_LN2_LINK_TRAINING_CTL);
 	return reg;
 }
 
@@ -1094,7 +1107,7 @@ u32 analogix_dp_get_lane3_link_training(struct analogix_dp_device *dp)
 {
 	u32 reg;
 
-	reg = readl(dp->reg_base + ANALOGIX_DP_LN3_LINK_TRAINING_CTL);
+	reg = analogix_dp_read(dp, ANALOGIX_DP_LN3_LINK_TRAINING_CTL);
 	return reg;
 }
 
@@ -1102,15 +1115,15 @@ void analogix_dp_reset_macro(struct analogix_dp_device *dp)
 {
 	u32 reg;
 
-	reg = readl(dp->reg_base + ANALOGIX_DP_PHY_TEST);
+	reg = analogix_dp_read(dp, ANALOGIX_DP_PHY_TEST);
 	reg |= MACRO_RST;
-	writel(reg, dp->reg_base + ANALOGIX_DP_PHY_TEST);
+	analogix_dp_write(dp, ANALOGIX_DP_PHY_TEST, reg);
 
 	/* 10 us is the minimum reset time. */
 	udelay(20);
 
 	reg &= ~MACRO_RST;
-	writel(reg, dp->reg_base + ANALOGIX_DP_PHY_TEST);
+	analogix_dp_write(dp, ANALOGIX_DP_PHY_TEST, reg);
 }
 
 void analogix_dp_init_video(struct analogix_dp_device *dp)
@@ -1118,19 +1131,19 @@ void analogix_dp_init_video(struct analogix_dp_device *dp)
 	u32 reg;
 
 	reg = VSYNC_DET | VID_FORMAT_CHG | VID_CLK_CHG;
-	writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_1);
+	analogix_dp_write(dp, ANALOGIX_DP_COMMON_INT_STA_1, reg);
 
 	reg = 0x0;
-	writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_1);
+	analogix_dp_write(dp, ANALOGIX_DP_SYS_CTL_1, reg);
 
 	reg = CHA_CRI(4) | CHA_CTRL;
-	writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_2);
+	analogix_dp_write(dp, ANALOGIX_DP_SYS_CTL_2, reg);
 
 	reg = 0x0;
-	writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
+	analogix_dp_write(dp, ANALOGIX_DP_SYS_CTL_3, reg);
 
 	reg = VID_HRES_TH(2) | VID_VRES_TH(0);
-	writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_8);
+	analogix_dp_write(dp, ANALOGIX_DP_VIDEO_CTL_8, reg);
 }
 
 void analogix_dp_set_video_color_format(struct analogix_dp_device *dp)
@@ -1141,34 +1154,34 @@ void analogix_dp_set_video_color_format(struct analogix_dp_device *dp)
 	reg = (dp->video_info.dynamic_range << IN_D_RANGE_SHIFT) |
 		(dp->video_info.color_depth << IN_BPC_SHIFT) |
 		(dp->video_info.color_space << IN_COLOR_F_SHIFT);
-	writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_2);
+	analogix_dp_write(dp, ANALOGIX_DP_VIDEO_CTL_2, reg);
 
 	/* Set Input Color YCbCr Coefficients to ITU601 or ITU709 */
-	reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_3);
+	reg = analogix_dp_read(dp, ANALOGIX_DP_VIDEO_CTL_3);
 	reg &= ~IN_YC_COEFFI_MASK;
 	if (dp->video_info.ycbcr_coeff)
 		reg |= IN_YC_COEFFI_ITU709;
 	else
 		reg |= IN_YC_COEFFI_ITU601;
-	writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_3);
+	analogix_dp_write(dp, ANALOGIX_DP_VIDEO_CTL_3, reg);
 }
 
 int analogix_dp_is_slave_video_stream_clock_on(struct analogix_dp_device *dp)
 {
 	u32 reg;
 
-	reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_1);
-	writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_1);
+	reg = analogix_dp_read(dp, ANALOGIX_DP_SYS_CTL_1);
+	analogix_dp_write(dp, ANALOGIX_DP_SYS_CTL_1, reg);
 
-	reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_1);
+	reg = analogix_dp_read(dp, ANALOGIX_DP_SYS_CTL_1);
 
 	if (!(reg & DET_STA))
 		return -EINVAL;
 
-	reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_2);
-	writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_2);
+	reg = analogix_dp_read(dp, ANALOGIX_DP_SYS_CTL_2);
+	analogix_dp_write(dp, ANALOGIX_DP_SYS_CTL_2, reg);
 
-	reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_2);
+	reg = analogix_dp_read(dp, ANALOGIX_DP_SYS_CTL_2);
 
 	if (reg & CHA_STA)
 		return -EINVAL;
@@ -1183,30 +1196,30 @@ void analogix_dp_set_video_cr_mn(struct analogix_dp_device *dp,
 	u32 reg;
 
 	if (type == REGISTER_M) {
-		reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_4);
+		reg = analogix_dp_read(dp, ANALOGIX_DP_SYS_CTL_4);
 		reg |= FIX_M_VID;
-		writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_4);
+		analogix_dp_write(dp, ANALOGIX_DP_SYS_CTL_4, reg);
 		reg = m_value & 0xff;
-		writel(reg, dp->reg_base + ANALOGIX_DP_M_VID_0);
+		analogix_dp_write(dp, ANALOGIX_DP_M_VID_0, reg);
 		reg = (m_value >> 8) & 0xff;
-		writel(reg, dp->reg_base + ANALOGIX_DP_M_VID_1);
+		analogix_dp_write(dp, ANALOGIX_DP_M_VID_1, reg);
 		reg = (m_value >> 16) & 0xff;
-		writel(reg, dp->reg_base + ANALOGIX_DP_M_VID_2);
+		analogix_dp_write(dp, ANALOGIX_DP_M_VID_2, reg);
 
 		reg = n_value & 0xff;
-		writel(reg, dp->reg_base + ANALOGIX_DP_N_VID_0);
+		analogix_dp_write(dp, ANALOGIX_DP_N_VID_0, reg);
 		reg = (n_value >> 8) & 0xff;
-		writel(reg, dp->reg_base + ANALOGIX_DP_N_VID_1);
+		analogix_dp_write(dp, ANALOGIX_DP_N_VID_1, reg);
 		reg = (n_value >> 16) & 0xff;
-		writel(reg, dp->reg_base + ANALOGIX_DP_N_VID_2);
+		analogix_dp_write(dp, ANALOGIX_DP_N_VID_2, reg);
 	} else  {
-		reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_4);
+		reg = analogix_dp_read(dp, ANALOGIX_DP_SYS_CTL_4);
 		reg &= ~FIX_M_VID;
-		writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_4);
+		analogix_dp_write(dp, ANALOGIX_DP_SYS_CTL_4, reg);
 
-		writel(0x00, dp->reg_base + ANALOGIX_DP_N_VID_0);
-		writel(0x80, dp->reg_base + ANALOGIX_DP_N_VID_1);
-		writel(0x00, dp->reg_base + ANALOGIX_DP_N_VID_2);
+		analogix_dp_write(dp, ANALOGIX_DP_N_VID_0, 0x00);
+		analogix_dp_write(dp, ANALOGIX_DP_N_VID_1, 0x80);
+		analogix_dp_write(dp, ANALOGIX_DP_N_VID_2, 0x00);
 	}
 }
 
@@ -1215,13 +1228,13 @@ void analogix_dp_set_video_timing_mode(struct analogix_dp_device *dp, u32 type)
 	u32 reg;
 
 	if (type == VIDEO_TIMING_FROM_CAPTURE) {
-		reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
+		reg = analogix_dp_read(dp, ANALOGIX_DP_VIDEO_CTL_10);
 		reg &= ~FORMAT_SEL;
-		writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
+		analogix_dp_write(dp, ANALOGIX_DP_VIDEO_CTL_10, reg);
 	} else {
-		reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
+		reg = analogix_dp_read(dp, ANALOGIX_DP_VIDEO_CTL_10);
 		reg |= FORMAT_SEL;
-		writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
+		analogix_dp_write(dp, ANALOGIX_DP_VIDEO_CTL_10, reg);
 	}
 }
 
@@ -1230,15 +1243,15 @@ void analogix_dp_enable_video_master(struct analogix_dp_device *dp, bool enable)
 	u32 reg;
 
 	if (enable) {
-		reg = readl(dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL);
+		reg = analogix_dp_read(dp, ANALOGIX_DP_SOC_GENERAL_CTL);
 		reg &= ~VIDEO_MODE_MASK;
 		reg |= VIDEO_MASTER_MODE_EN | VIDEO_MODE_MASTER_MODE;
-		writel(reg, dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL);
+		analogix_dp_write(dp, ANALOGIX_DP_SOC_GENERAL_CTL, reg);
 	} else {
-		reg = readl(dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL);
+		reg = analogix_dp_read(dp, ANALOGIX_DP_SOC_GENERAL_CTL);
 		reg &= ~VIDEO_MODE_MASK;
 		reg |= VIDEO_MODE_SLAVE_MODE;
-		writel(reg, dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL);
+		analogix_dp_write(dp, ANALOGIX_DP_SOC_GENERAL_CTL, reg);
 	}
 }
 
@@ -1246,19 +1259,19 @@ void analogix_dp_start_video(struct analogix_dp_device *dp)
 {
 	u32 reg;
 
-	reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1);
+	reg = analogix_dp_read(dp, ANALOGIX_DP_VIDEO_CTL_1);
 	reg |= VIDEO_EN;
-	writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1);
+	analogix_dp_write(dp, ANALOGIX_DP_VIDEO_CTL_1, reg);
 }
 
 int analogix_dp_is_video_stream_on(struct analogix_dp_device *dp)
 {
 	u32 reg;
 
-	reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
-	writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
+	reg = analogix_dp_read(dp, ANALOGIX_DP_SYS_CTL_3);
+	analogix_dp_write(dp, ANALOGIX_DP_SYS_CTL_3, reg);
 
-	reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
+	reg = analogix_dp_read(dp, ANALOGIX_DP_SYS_CTL_3);
 	if (!(reg & STRM_VALID))
 		return -EINVAL;
 
@@ -1269,44 +1282,44 @@ void analogix_dp_config_video_slave_mode(struct analogix_dp_device *dp)
 {
 	u32 reg;
 
-	reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_1);
+	reg = analogix_dp_read(dp, ANALOGIX_DP_FUNC_EN_1);
 	reg &= ~(MASTER_VID_FUNC_EN_N | SLAVE_VID_FUNC_EN_N);
 	reg |= MASTER_VID_FUNC_EN_N;
-	writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_1);
+	analogix_dp_write(dp, ANALOGIX_DP_FUNC_EN_1, reg);
 
-	reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
+	reg = analogix_dp_read(dp, ANALOGIX_DP_VIDEO_CTL_10);
 	reg &= ~INTERACE_SCAN_CFG;
 	reg |= (dp->video_info.interlaced << 2);
-	writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
+	analogix_dp_write(dp, ANALOGIX_DP_VIDEO_CTL_10, reg);
 
-	reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
+	reg = analogix_dp_read(dp, ANALOGIX_DP_VIDEO_CTL_10);
 	reg &= ~VSYNC_POLARITY_CFG;
 	reg |= (dp->video_info.v_sync_polarity << 1);
-	writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
+	analogix_dp_write(dp, ANALOGIX_DP_VIDEO_CTL_10, reg);
 
-	reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
+	reg = analogix_dp_read(dp, ANALOGIX_DP_VIDEO_CTL_10);
 	reg &= ~HSYNC_POLARITY_CFG;
 	reg |= (dp->video_info.h_sync_polarity << 0);
-	writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
+	analogix_dp_write(dp, ANALOGIX_DP_VIDEO_CTL_10, reg);
 
 	reg = AUDIO_MODE_SPDIF_MODE | VIDEO_MODE_SLAVE_MODE;
-	writel(reg, dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL);
+	analogix_dp_write(dp, ANALOGIX_DP_SOC_GENERAL_CTL, reg);
 }
 
 void analogix_dp_enable_scrambling(struct analogix_dp_device *dp)
 {
 	u32 reg;
 
-	reg = readl(dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET);
+	reg = analogix_dp_read(dp, ANALOGIX_DP_TRAINING_PTN_SET);
 	reg &= ~SCRAMBLING_DISABLE;
-	writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET);
+	analogix_dp_write(dp, ANALOGIX_DP_TRAINING_PTN_SET, reg);
 }
 
 void analogix_dp_disable_scrambling(struct analogix_dp_device *dp)
 {
 	u32 reg;
 
-	reg = readl(dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET);
+	reg = analogix_dp_read(dp, ANALOGIX_DP_TRAINING_PTN_SET);
 	reg |= SCRAMBLING_DISABLE;
-	writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET);
+	analogix_dp_write(dp, ANALOGIX_DP_TRAINING_PTN_SET, reg);
 }

commit faf4a351fce0fa1f913b99a57742c9dc4a91aa9f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Dec 20 13:05:50 2019 +0800

    configs: rk1806: use rk1806-evb.dts
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I6b0c8ea9882ae70945b33331f80137f4724a7f3e

diff --git a/configs/rk1806_defconfig b/configs/rk1806_defconfig
index d9a88a33e9..fd6d4fe645 100644
--- a/configs/rk1806_defconfig
+++ b/configs/rk1806_defconfig
@@ -13,7 +13,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_TARGET_EVB_RK1808=y
 CONFIG_SPL_STACK_R_ADDR=0x3fe0000
-CONFIG_DEFAULT_DEVICE_TREE="rk1808-evb"
+CONFIG_DEFAULT_DEVICE_TREE="rk1806-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 CONFIG_FIT=y

commit f4c9b02d9e6d1d72bd079bc7d1e38c06c4dfcb3c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Dec 20 13:05:13 2019 +0800

    rockchip: dts: add rk1806-evb.dts
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ic0ef2210f190bb8e229c1d97eb3b78447335e56c

diff --git a/arch/arm/dts/rk1806-evb.dts b/arch/arm/dts/rk1806-evb.dts
new file mode 100644
index 0000000000..dc96b37535
--- /dev/null
+++ b/arch/arm/dts/rk1806-evb.dts
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier:     GPL-2.0+
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ *
+ */
+
+/dts-v1/;
+#include "rk1808-evb.dts"
+
+/ {
+	model = "Rockchip RK1806 EVB";
+};
+

commit 1ce69de6f2da4e4221ec9126e539cb4bf1caf23d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 24 20:58:55 2019 +0800

    lib: sysmem: promise sysmem_alloc_by_name() alloc cacheline align buffer
    
    This function is called to alloc buffer for storage driver
    access, make sure the address is cacheline align.
    
    Also better for any module which calls it.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I520d16ea28764671eb566cc96cab744ca6b13fc2

diff --git a/lib/sysmem.c b/lib/sysmem.c
index 761d820eed..5371f7bd0e 100644
--- a/lib/sysmem.c
+++ b/lib/sysmem.c
@@ -570,7 +570,7 @@ void *sysmem_alloc_by_name(const char *name, phys_size_t size)
 					name,
 					SYSMEM_ALLOC_ANYWHERE,
 					size,
-					SYSMEM_ALLOC_NO_ALIGN);
+					ARCH_DMA_MINALIGN);
 	if (!paddr)
 		sysmem_dump();
 

commit 398d3e80fb6e34c153ffb9a0b5935d450b428bc7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 24 20:45:41 2019 +0800

    make.sh: add sub command to build envtools
    
    command:
            ./make.sh env
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I8736042dd31da17f9998dae969d5f607c42ec563

diff --git a/make.sh b/make.sh
index f4cf3ab01e..480a7c02b8 100755
--- a/make.sh
+++ b/make.sh
@@ -90,6 +90,7 @@ help()
 	echo "	./make.sh evb-rk3399               --- build for evb-rk3399_defconfig"
 	echo "	./make.sh firefly-rk3288           --- build for firefly-rk3288_defconfig"
 	echo "	./make.sh                          --- build with exist .config"
+	echo "	./make.sh env                      --- build envtools"
 	echo
 	echo "2. Pack:"
 	echo "	./make.sh uboot                    --- pack uboot.img"
@@ -118,7 +119,7 @@ prepare()
 
 	case $BOARD in
 		# Parse from exit .config
-		''|elf*|loader*|spl*|itb|debug*|trust|uboot|map|sym)
+		''|elf*|loader*|spl*|itb|debug*|trust|uboot|map|sym|env)
 		if [ ! -f .config ]; then
 			echo
 			echo "Build failed, Can't find .config"
@@ -137,7 +138,7 @@ prepare()
 		;;
 
 		#Subcmd
-		''|elf*|loader*|spl*|itb|debug*|trust*|uboot|map|sym)
+		''|elf*|loader*|spl*|itb|debug*|trust*|uboot|map|sym|env)
 		;;
 
 		*)
@@ -270,6 +271,11 @@ sub_commands()
 		exit 0
 		;;
 
+		env)
+		make CROSS_COMPILE=${TOOLCHAIN_GCC} envtools	
+		exit 0
+		;;
+
 		*)
 		# Search function and code position of address
 		RELOC_OFF=${FUNCADDR#*-}

commit 771645931b98855e86ff5831c9e303d81c541524
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Thu Dec 19 15:14:03 2019 +0800

    configs: rk3036: enable CONFIG_RKSFC_NOR
    
    Change-Id: I1c5ad37110d0bdc0f3847bd972fa7f7fb679b3fa
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    Signed-off-by: Hans Yang <yhx@rock-chips.com>

diff --git a/configs/rk3036_defconfig b/configs/rk3036_defconfig
index 7c6dcac89f..8dccaac096 100644
--- a/configs/rk3036_defconfig
+++ b/configs/rk3036_defconfig
@@ -80,6 +80,8 @@ CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_DM_RESET=y
+CONFIG_RKFLASH=y
+CONFIG_RKSFC_NOR=y
 # CONFIG_TPL_DM_SERIAL is not set
 CONFIG_DEBUG_UART_BASE=0x20068000
 CONFIG_DEBUG_UART_CLOCK=24000000

commit 64ba9ad7e911e9271ae24801f04168a784f438fb
Author: Hans Yang <yhx@rock-chips.com>
Date:   Tue Dec 24 14:41:13 2019 +0800

    make.sh: support rk3036 build trust.img/uboot.img 512KB
    
    Change-Id: I71360722bfbf16dcafd54b7a2d14fff2fc5bc5d1
    Signed-off-by: Hans Yang <yhx@rock-chips.com>

diff --git a/make.sh b/make.sh
index 12bb3a40b0..f4cf3ab01e 100755
--- a/make.sh
+++ b/make.sh
@@ -407,6 +407,9 @@ fixup_platform_configure()
 	elif [ $RKCHIP = "RK1808" ]; then
 		PLATFORM_UBOOT_IMG_SIZE="--size 1024 2"
 		PLATFORM_TRUST_IMG_SIZE="--size 1024 2"
+	elif [ $RKCHIP = "RK3036" ]; then
+		PLATFORM_UBOOT_IMG_SIZE="--size 512 1"
+		PLATFORM_TRUST_IMG_SIZE="--size 512 1"
 	fi
 
 # <*> Fixup AARCH32 for ARM64 cpu platforms

commit 85975b101c1e766258212416d5c419eff4766e4c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 24 12:41:28 2019 +0800

    make.sh: add big endian sha256 for rk3368h
    
    Should be the same as rk3368, otherwise the loader will
    verify trust.img failed when secure boot is enabled.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I25ba5b7ad8a1673e09db1167ff780fe0c8c5a95f

diff --git a/make.sh b/make.sh
index ea6b26e7e5..12bb3a40b0 100755
--- a/make.sh
+++ b/make.sh
@@ -390,7 +390,7 @@ fixup_platform_configure()
 	if [ $RKCHIP = "PX30" -o $RKCHIP = "RK3326" -o $RKCHIP = "RK3308" -o $RKCHIP = "RK1808" ]; then
 		PLATFORM_RSA="--rsa 3"
 	# RK3368 use rk big endian SHA256, it's pack magic is "2"
-	elif [ $RKCHIP = "RK3368" ]; then
+	elif [ $RKCHIP = "RK3368" -o $RKCHIP = "RK3368H" ]; then
 		PLATFORM_SHA="--sha 2"
 	# other platforms use default configure
 	fi

commit ea9b5c12f75faf1f8935014473b2437338ccad09
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Dec 20 10:04:36 2019 +0800

    configs: rk3036: remove unused modules
    
    rk3036 is usual for linux os.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I0ad8559eaa47d28ce979ddff05c50a376d63899a

diff --git a/configs/rk3036_defconfig b/configs/rk3036_defconfig
index 455ed1d231..7c6dcac89f 100644
--- a/configs/rk3036_defconfig
+++ b/configs/rk3036_defconfig
@@ -17,6 +17,7 @@ CONFIG_SPL_STACK_R_ADDR=0x60600000
 CONFIG_DEFAULT_DEVICE_TREE="rk3036-sdk"
 CONFIG_DEBUG_UART=y
 CONFIG_TPL_SYS_MALLOC_F_LEN=0x0
+CONFIG_ANDROID_BOOT_IMAGE=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
@@ -32,9 +33,7 @@ CONFIG_SPL_OPTEE_SUPPORT=y
 CONFIG_SPL_OPTEE=y
 CONFIG_TPL_TINY_FRAMEWORK=y
 CONFIG_TPL_SERIAL_SUPPORT=y
-CONFIG_FASTBOOT_BUF_SIZE=0x04000000
-CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_FASTBOOT is not set
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
@@ -97,10 +96,4 @@ CONFIG_USE_TINY_PRINTF=y
 CONFIG_CMD_DHRYSTONE=y
 CONFIG_ERRNO_STR=y
 # CONFIG_EFI_LOADER is not set
-CONFIG_AVB_LIBAVB=y
-CONFIG_AVB_LIBAVB_AB=y
-CONFIG_AVB_LIBAVB_ATX=y
-CONFIG_AVB_LIBAVB_USER=y
-CONFIG_OPTEE_CLIENT=y
-CONFIG_OPTEE_V1=y
 CONFIG_TEST_ROCKCHIP=y

commit 2f602f70efb73aa696b8d325a405548eff9cef62
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Dec 20 08:41:31 2019 +0800

    include: rk3036: update configures
    
    - define CONFIG_PREBOOT empty;
    - add ENV_MEM_LAYOUT_SETTINGS1 for 128M board;
    - remove fdt_high to enable relocation skip by android_image_separate().
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I9390cf4dd000a0e7a154fd3c3e7b3138d2e63347

diff --git a/include/configs/evb_rk3036.h b/include/configs/evb_rk3036.h
index 1bfb8c9178..36be165fd5 100644
--- a/include/configs/evb_rk3036.h
+++ b/include/configs/evb_rk3036.h
@@ -19,13 +19,7 @@
 #ifndef CONFIG_SPL_BUILD
 /* Enable gpt partition table */
 #undef CONFIG_PREBOOT
-#define CONFIG_PREBOOT \
-	"mmc dev 0; " \
-	"gpt guid mmc 0; " \
-	"if test $? = 1; then " \
-		"fastboot usb 0; " \
-	"fi; "
-
+#define CONFIG_PREBOOT
 #define CONFIG_SYS_BOOT_RAMDISK_HIGH
 
 /* Store env in emmc */
diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index a1387e0d9c..026f11dac0 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -12,7 +12,7 @@
 #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
-#define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/*  64M */
+#define CONFIG_SYS_BOOTM_LEN		(64 << 20)	/*  64M */
 
 #define CONFIG_SPL_FRAMEWORK
 
@@ -46,7 +46,14 @@
 #define CONFIG_USB_FUNCTION_MASS_STORAGE
 #define CONFIG_CMD_USB_MASS_STORAGE
 
-/* usb host */
+/* memory <= 128M board */
+#define ENV_MEM_LAYOUT_SETTINGS1 \
+	"scriptaddr1=0x60000000\0" \
+	"pxefile_addr1_r=0x60100000\0" \
+	"fdt_addr1_r=0x61f00000\0" \
+	"kernel_addr1_r=0x62000000\0" \
+	"ramdisk_addr1_r=0x64000000\0"
+
 #define ENV_MEM_LAYOUT_SETTINGS \
 	"scriptaddr=0x60000000\0" \
 	"pxefile_addr_r=0x60100000\0" \
@@ -56,12 +63,10 @@
 
 #include <config_distro_bootcmd.h>
 
-/* Linux fails to load the fdt if it's loaded above 512M on a evb-rk3036 board,
- * so limit the fdt reallocation to that */
 #define CONFIG_EXTRA_ENV_SETTINGS \
-	"fdt_high=0x7fffffff\0" \
 	"partitions=" PARTS_DEFAULT \
 	ENV_MEM_LAYOUT_SETTINGS \
+	ENV_MEM_LAYOUT_SETTINGS1 \
 	RKIMG_DET_BOOTDEV \
 	BOOTENV
 #endif

commit 7ebffaaf203812bbf9d13be4ae853da102ddba77
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Dec 2 13:07:24 2019 +0800

    dm: serial: add "serial_dev_" API for normal serial device
    
    "serial_" API is designed for UART debug and "serial_stub_" API
    is designed for stdio device(e.g. keyboard, video, lcd...).
    
    We need new API for normal serial device, e.g. a UART working
    with other peripheral device.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ifc2cb2ca9c1d4a395e89ceb5e059ec05a07b1967

diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c
index b4d6b7b6e7..ec90dbcde1 100644
--- a/drivers/serial/serial-uclass.c
+++ b/drivers/serial/serial-uclass.c
@@ -307,6 +307,58 @@ void serial_clear(void)
 	__serial_clear(gd->cur_serial_dev);
 }
 
+void serial_dev_putc(struct udevice *dev, char ch)
+{
+	if (!dev)
+		return;
+
+	_serial_putc(dev, ch);
+}
+
+void serial_dev_puts(struct udevice *dev, const char *str)
+{
+	if (!dev)
+		return;
+
+	_serial_puts(dev, str);
+}
+
+int serial_dev_getc(struct udevice *dev)
+{
+	if (!dev)
+		return 0;
+
+	return _serial_getc(dev);
+}
+
+int serial_dev_tstc(struct udevice *dev)
+{
+	if (!dev)
+		return 0;
+
+	return _serial_tstc(dev);
+}
+
+void serial_dev_setbrg(struct udevice *dev, int baudrate)
+{
+	struct dm_serial_ops *ops;
+
+	if (!dev)
+		return;
+
+	ops = serial_get_ops(dev);
+	if (ops->setbrg)
+		ops->setbrg(dev, baudrate);
+}
+
+void serial_dev_clear(struct udevice *dev)
+{
+	if (!dev)
+		return;
+
+	__serial_clear(dev);
+}
+
 void serial_stdio_init(void)
 {
 }
diff --git a/include/serial.h b/include/serial.h
index d87f01082a..e418b02f30 100644
--- a/include/serial.h
+++ b/include/serial.h
@@ -207,4 +207,12 @@ void sh_serial_initialize(void);
 void uartlite_serial_initialize(void);
 void zynq_serial_initialize(void);
 
+/* serial device */
+int serial_dev_getc(struct udevice *dev);
+int serial_dev_tstc(struct udevice *dev);
+void serial_dev_putc(struct udevice *dev, char ch);
+void serial_dev_puts(struct udevice *dev, const char *str);
+void serial_dev_setbrg(struct udevice *dev, int baudrate);
+void serial_dev_clear(struct udevice *dev);
+
 #endif

commit 5d5f363eb95cd5fd79b5a928cfdfd76b37add5ba
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 3 20:49:59 2019 +0800

    rockchip: board: init debug uart if not use pre-loader serial
    
    Pre-loader serial has higher priority.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Idd736b78454f7bc662abe61d25bbfa3a3e4c0d90

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index c40186905f..9f81d9a211 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -540,9 +540,15 @@ static void early_download_init(void)
 #endif
 }
 
+static void board_debug_init(void)
+{
+	if (!gd->serial.using_pre_serial)
+		board_debug_uart_init();
+}
+
 int board_init(void)
 {
-	board_debug_uart_init();
+	board_debug_init();
 
 #ifdef DEBUG
 	soc_clk_dump();

commit 27e62cd7db444b3c601ea6c8f276357a5c92f13f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 17 11:56:39 2019 +0800

    lib: avb: implement get_preloaded_partition callback
    
    It works only when verification error is allowed, it avoids
    AVB workflow to load the full partition which wastes time.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Icbcd48b7bf97d826663523099c944e269f17b709

diff --git a/include/android_avb/avb_ops.h b/include/android_avb/avb_ops.h
index f1dbefb03b..0aefd62b82 100644
--- a/include/android_avb/avb_ops.h
+++ b/include/android_avb/avb_ops.h
@@ -154,7 +154,8 @@ struct AvbOps {
                                          const char* partition,
                                          size_t num_bytes,
                                          uint8_t** out_pointer,
-                                         size_t* out_num_bytes_preloaded);
+                                         size_t* out_num_bytes_preloaded,
+                                         int allow_verification_error);
 
   /* Writes |num_bytes| from |bffer| at offset |offset| to partition
    * with name |partition| (NUL-terminated UTF-8 string). If |offset|
diff --git a/lib/avb/libavb/avb_slot_verify.c b/lib/avb/libavb/avb_slot_verify.c
index 16acace531..a08a375bf3 100644
--- a/lib/avb/libavb/avb_slot_verify.c
+++ b/lib/avb/libavb/avb_slot_verify.c
@@ -79,7 +79,8 @@ static AvbSlotVerifyResult load_full_partition(AvbOps* ops,
                                                const char* part_name,
                                                uint64_t image_size,
                                                uint8_t** out_image_buf,
-                                               bool* out_image_preloaded) {
+                                               bool* out_image_preloaded,
+                                               int allow_verification_error) {
   size_t part_num_read;
   AvbIOResult io_ret;
 
@@ -97,7 +98,8 @@ static AvbSlotVerifyResult load_full_partition(AvbOps* ops,
   /* Try use a preloaded one. */
   if (ops->get_preloaded_partition != NULL) {
     io_ret = ops->get_preloaded_partition(
-        ops, part_name, image_size, out_image_buf, &part_num_read);
+        ops, part_name, image_size, out_image_buf, &part_num_read,
+	allow_verification_error);
     if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
       return AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
     } else if (io_ret != AVB_IO_RESULT_OK) {
@@ -382,7 +384,8 @@ static AvbSlotVerifyResult load_and_verify_hash_partition(
   }
 
   ret = load_full_partition(
-      ops, part_name, image_size, &image_buf, &image_preloaded);
+      ops, part_name, image_size, &image_buf, &image_preloaded,
+      allow_verification_error);
   if (ret != AVB_SLOT_VERIFY_RESULT_OK) {
     goto out;
   }
@@ -518,7 +521,7 @@ static AvbSlotVerifyResult load_requested_partitions(
     avb_debugv(part_name, ": Loading entire partition.\n", NULL);
 
     ret = load_full_partition(
-        ops, part_name, image_size, &image_buf, &image_preloaded);
+        ops, part_name, image_size, &image_buf, &image_preloaded, 1);
     if (ret != AVB_SLOT_VERIFY_RESULT_OK) {
       goto out;
     }
diff --git a/lib/avb/libavb_user/avb_ops_user.c b/lib/avb/libavb_user/avb_ops_user.c
index 9d4db76340..6761c40b72 100644
--- a/lib/avb/libavb_user/avb_ops_user.c
+++ b/lib/avb/libavb_user/avb_ops_user.c
@@ -400,6 +400,44 @@ AvbIOResult rk_get_random(AvbAtxOps *atx_ops,
 	return 0;
 }
 
+#ifdef CONFIG_ANDROID_BOOT_IMAGE
+static AvbIOResult get_preloaded_partition(AvbOps* ops,
+					   const char* partition,
+					   size_t num_bytes,
+					   uint8_t** out_pointer,
+					   size_t* out_num_bytes_preloaded,
+					   int allow_verification_error)
+{
+	struct blk_desc *dev_desc;
+	ulong load_addr;
+	int ret;
+
+	/* no need go further */
+	if (!allow_verification_error)
+		return AVB_IO_RESULT_OK;
+
+	printf("get image from preloaded partition...\n");
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc)
+	    return AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+
+	load_addr = env_get_ulong("kernel_addr_r", 16, 0);
+	if (!load_addr)
+		return AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT;
+
+	ret = android_image_load_by_partname(dev_desc, partition, &load_addr);
+	if (!ret) {
+		*out_pointer = (u8 *)load_addr;
+		*out_num_bytes_preloaded = num_bytes; /* return what it expects */
+		ret = AVB_SLOT_VERIFY_RESULT_OK;
+	} else {
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+	}
+
+	return ret;
+}
+#endif
+
 AvbOps *avb_ops_user_new(void)
 {
 	AvbOps *ops;
@@ -435,6 +473,9 @@ AvbOps *avb_ops_user_new(void)
 	ops->write_is_device_unlocked = write_is_device_unlocked;
 	ops->get_unique_guid_for_partition = get_unique_guid_for_partition;
 	ops->get_size_of_partition = get_size_of_partition;
+#ifdef CONFIG_ANDROID_BOOT_IMAGE
+	ops->get_preloaded_partition = get_preloaded_partition;
+#endif
 	ops->ab_ops->read_ab_metadata = avb_ab_data_read;
 	ops->ab_ops->write_ab_metadata = avb_ab_data_write;
 	ops->atx_ops->read_permanent_attributes = avb_read_perm_attr;

commit 260e24d2057bd214d108ec64901fc1b19abdbb63
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Dec 18 14:41:31 2019 +0800

    rockchip: dts: rk3326: support eMMC hs200
    
    Change-Id: Ib0cf27fe1a1fc3bc53d3440ead2631b53fc9f8b2
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/dts/rk3326-evb.dts b/arch/arm/dts/rk3326-evb.dts
index acc51eccb9..caef898bac 100644
--- a/arch/arm/dts/rk3326-evb.dts
+++ b/arch/arm/dts/rk3326-evb.dts
@@ -389,6 +389,7 @@
 	fifo-mode;
 	bus-width = <8>;
 	cap-mmc-highspeed;
+	mmc-hs200-1_8v;
 	supports-emmc;
 	disable-wp;
 	non-removable;

commit 289af5f4baf14e057b4143e308ef0332f6d25f0d
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Thu Dec 19 19:50:46 2019 +0800

    drm/rockchip: add dual channel swap config
    
    some pcb layout dual mipi/lvds channel maybe mistake. we can set
    rockchip,dual-channel-swap = <1> to swap the dual channel at dts
    file.
    
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Change-Id: I7398b83bff0fd0dedd77834ee2a8ff14f2ae11ea

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 4d8bf77ef0..e47437a423 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -1386,6 +1386,9 @@ static int rockchip_display_probe(struct udevice *dev)
 
 		get_crtc_mcu_mode(&s->crtc_state);
 
+		ret = ofnode_read_u32_default(s->crtc_state.node,
+					      "rockchip,dual-channel-swap", 0);
+		s->crtc_state.dual_channel_swap = ret;
 		if (connector_panel_init(s)) {
 			printf("Warn: Failed to init panel drivers\n");
 			free(s);
diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index cc719b8aac..b37425df7b 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -84,6 +84,7 @@ struct crtc_state {
 	int crtc_h;
 	bool yuv_overlay;
 	struct rockchip_mcu_timing mcu_timing;
+	u32 dual_channel_swap;
 };
 
 struct panel_state {
diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index 67fd430061..76d6f7a830 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -305,7 +305,8 @@ static int rockchip_vop_init(struct display_state *state)
 		VOP_CTRL_SET(vop, mipi_dual_channel_en,
 			!!(conn_state->output_type & ROCKCHIP_OUTPUT_DSI_DUAL_CHANNEL));
 		VOP_CTRL_SET(vop, data01_swap,
-			!!(conn_state->output_type & ROCKCHIP_OUTPUT_DSI_DUAL_LINK));
+			!!(conn_state->output_type & ROCKCHIP_OUTPUT_DSI_DUAL_LINK) ||
+			crtc_state->dual_channel_swap);
 		break;
 	case DRM_MODE_CONNECTOR_DisplayPort:
 		VOP_CTRL_SET(vop, dp_dclk_pol, 0);

commit b6b05c71548fb7b70faba7f78afa3fed8530184e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Dec 20 08:32:59 2019 +0800

    common: android: skip blk read and memcpy if image size is 0
    
    blk_read() may return error code if image size is 0, it depends
    on block layer implementation.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I29bab10835e9029780a957e871a600a6fbdf6068

diff --git a/common/image-android.c b/common/image-android.c
index 03b0032a99..0aa79a7fb5 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -374,6 +374,9 @@ static int image_read(img_t img, struct andr_img_hdr *hdr,
 		return -ENOMEM;
 	}
 
+	if (!blksz || !datasz)
+		goto crypto_calc;
+
 	/* load */
 	if (ram_base) {
 		memcpy(ramdst, (char *)((ulong)ram_base + offset), datasz);
@@ -386,6 +389,7 @@ static int image_read(img_t img, struct andr_img_hdr *hdr,
 		}
 	}
 
+crypto_calc:
 	/* sha1 */
 #ifdef CONFIG_DM_CRYPTO
 	if (crypto) {

commit 7edaca227031847650bfe63091b3f3c473bd2249
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Thu Dec 19 12:46:05 2019 +0800

    rkflash: support SPI Nor gpt update
    
    Change-Id: I8469f7141f2b4e62340e8f8b7b25038ab7d19f44
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/rkflash_api.c b/drivers/rkflash/rkflash_api.c
index a87b4d8a19..797b676fd4 100644
--- a/drivers/rkflash/rkflash_api.c
+++ b/drivers/rkflash/rkflash_api.c
@@ -64,6 +64,30 @@ int rksfc_nor_read(struct udevice *udev, u32 sec, u32 n_sec, void *p_data)
 	return n_sec;
 }
 
+/* Workaround for GPT not aligned program */
+int rksfc_nor_simply_over_write(struct udevice *udev,
+				u32 sec,
+				u32 n_sec,
+				const void *p_data)
+{
+	struct rkflash_info *priv = dev_get_priv(udev);
+	struct SFNOR_DEV *p_dev = (struct SFNOR_DEV *)&priv->flash_dev_info;
+	u8 *pbuf_temp;
+	u32 addr_aligned, offset, remain;
+
+	addr_aligned = sec / NOR_SECS_PAGE * NOR_SECS_PAGE;
+	offset = sec - addr_aligned;
+	remain = (offset + n_sec + NOR_SECS_PAGE - 1) / NOR_SECS_PAGE * NOR_SECS_PAGE;
+
+	pbuf_temp = malloc(remain * 512);
+	snor_read(p_dev, addr_aligned, remain, pbuf_temp);
+	memcpy(pbuf_temp + offset * 512, p_data, n_sec * 512);
+	snor_write(p_dev, addr_aligned, remain, pbuf_temp);
+	free(pbuf_temp);
+
+	return n_sec;
+}
+
 int rksfc_nor_write(struct udevice *udev,
 		    u32 sec,
 		    u32 n_sec,
@@ -74,6 +98,10 @@ int rksfc_nor_write(struct udevice *udev,
 	char *buf = (char *)p_data;
 	struct rkflash_info *priv = dev_get_priv(udev);
 	struct SFNOR_DEV *p_dev = (struct SFNOR_DEV *)&priv->flash_dev_info;
+	u32 sfc_nor_density = rksfc_nor_get_capacity(udev);
+
+	if (sec >= (sfc_nor_density - 33))
+		return rksfc_nor_simply_over_write(udev, sec, n_sec, p_data);
 
 	if (sec + n_sec - 1 < FLASH_VENDOR_PART_START ||
 	    sec > FLASH_VENDOR_PART_END) {
diff --git a/drivers/rkflash/sfc_nor.c b/drivers/rkflash/sfc_nor.c
index c443cfd11c..2076471d15 100644
--- a/drivers/rkflash/sfc_nor.c
+++ b/drivers/rkflash/sfc_nor.c
@@ -242,6 +242,8 @@ int snor_erase(struct SFNOR_DEV *p_dev,
 	union SFCCMD_DATA sfcmd;
 	int timeout[] = {400, 2000, 40000};   /* ms */
 
+	rkflash_print_dio("%s %x\n", __func__, addr);
+
 	if (erase_type > ERASE_CHIP)
 		return SFC_PARAM_ERR;
 
@@ -431,6 +433,8 @@ int snor_read(struct SFNOR_DEV *p_dev, u32 sec, u32 n_sec, void *p_data)
 	u32 addr, size, len;
 	u8 *p_buf =  (u8 *)p_data;
 
+	rkflash_print_dio("%s %x %x\n", __func__, sec, n_sec);
+
 	if ((sec + n_sec) > p_dev->capacity)
 		return SFC_PARAM_ERR;
 
@@ -463,6 +467,8 @@ int snor_write(struct SFNOR_DEV *p_dev, u32 sec, u32 n_sec, void *p_data)
 	u8 *p_buf =  (u8 *)p_data;
 	u32 total_sec = n_sec;
 
+	rkflash_print_dio("%s %x %x %x\n", __func__, sec, n_sec, ((u32 *)p_data)[0]);
+
 	if ((sec + n_sec) > p_dev->capacity)
 		return SFC_PARAM_ERR;
 
diff --git a/drivers/rkflash/sfc_nor.h b/drivers/rkflash/sfc_nor.h
index adeb6f36ca..0b4e369826 100644
--- a/drivers/rkflash/sfc_nor.h
+++ b/drivers/rkflash/sfc_nor.h
@@ -12,7 +12,7 @@
 #define NOR_PAGE_SIZE		256
 #define NOR_BLOCK_SIZE		(64 * 1024)
 #define NOR_SECS_BLK		(NOR_BLOCK_SIZE / 512)
-#define NOR_SECS_PAGE		4
+#define NOR_SECS_PAGE		8
 
 #define FEA_READ_STATUE_MASK	(0x3 << 0)
 #define FEA_STATUE_MODE1	0

commit 164b2567a2aed5273ec01661d435702d4d6938a0
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed Dec 18 20:10:28 2019 +0800

    rockchip: rk3036: enable SFC
    
    Change-Id: I7eab386c35495377249532b389f9819c9e5c8a79
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/dts/rk3036-sdk-u-boot.dtsi b/arch/arm/dts/rk3036-sdk-u-boot.dtsi
index 51ee4a6e54..e666446f0e 100644
--- a/arch/arm/dts/rk3036-sdk-u-boot.dtsi
+++ b/arch/arm/dts/rk3036-sdk-u-boot.dtsi
@@ -10,6 +10,11 @@
 	u-boot,dm-pre-reloc;
 };
 
+&sfc {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 &grf {
 	u-boot,dm-pre-reloc;
 };
@@ -20,4 +25,4 @@
 
 &uart2 {
 	u-boot,dm-pre-reloc;
-};
\ No newline at end of file
+};

commit 52a8a1a43a5a5b6cb829d3938d0617f7fc4779ca
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed Dec 18 20:09:41 2019 +0800

    rockchip: rk3036: add SFC node
    
    Change-Id: If91914f86786014f0407fb1d0280545e00368faa
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/dts/rk3036.dtsi b/arch/arm/dts/rk3036.dtsi
index 5f37fa8459..c0f4b5de2c 100644
--- a/arch/arm/dts/rk3036.dtsi
+++ b/arch/arm/dts/rk3036.dtsi
@@ -271,6 +271,17 @@
 		pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
 	};
 
+	sfc: sfc@102080000 {
+		compatible = "rockchip,rksfc";
+		reg = <0x10208000 0x4000>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
+		clock-names = "clk_sfc", "hclk_sfc";
+		status = "disabled";
+	};
+
 	sdmmc: dwmmc@10214000 {
 		compatible = "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc";
 		reg = <0x10214000 0x4000>;

commit fd25a27f5396de530b5ec97e7d60682736ea52df
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed Dec 18 20:08:16 2019 +0800

    clk: rockchip: rk3036: add HCLK_sfc
    
    Change-Id: I18ce656c79e2a62190f356d889f39bb561659023
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/include/dt-bindings/clock/rk3036-cru.h b/include/dt-bindings/clock/rk3036-cru.h
index 87acf4af7f..7ac691e09d 100644
--- a/include/dt-bindings/clock/rk3036-cru.h
+++ b/include/dt-bindings/clock/rk3036-cru.h
@@ -82,6 +82,7 @@
 #define HCLK_OTG0		449
 #define HCLK_OTG1		450
 #define HCLK_NANDC		453
+#define HCLK_SFC		454
 #define HCLK_SDMMC		456
 #define HCLK_SDIO		457
 #define HCLK_EMMC		459

commit 24e0d34a9a793d9a7971782b02a68a94396ac149
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Thu Dec 19 21:02:58 2019 +0800

    rkflash: return 0 when flash ops block size equals 0
    
    Uniform with emmc
    
    Change-Id: I97413edcd418b794bcde085a4f7b66e53f548e8b
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/rkflash_blk.c b/drivers/rkflash/rkflash_blk.c
index 338acd996c..9cc73abc5f 100644
--- a/drivers/rkflash/rkflash_blk.c
+++ b/drivers/rkflash/rkflash_blk.c
@@ -21,7 +21,7 @@ ulong rkflash_bread(struct udevice *udev, lbaint_t start,
 
 	debug("%s lba %x cnt %x\n", __func__, (u32)start, (u32)blkcnt);
 	if (blkcnt == 0)
-		return -EINVAL;
+		return 0;
 
 	if ((start + blkcnt) > block_dev->lba)
 		return -EINVAL;
@@ -39,7 +39,7 @@ ulong rkflash_bwrite(struct udevice *udev, lbaint_t start,
 	struct rkflash_info *priv = dev_get_priv(udev->parent);
 
 	if (blkcnt == 0)
-		return -EINVAL;
+		return 0;
 
 	if ((start + blkcnt) > block_dev->lba)
 		return -EINVAL;
@@ -57,7 +57,7 @@ ulong rkflash_berase(struct udevice *udev, lbaint_t start,
 	struct rkflash_info *priv = dev_get_priv(udev->parent);
 
 	if (blkcnt == 0)
-		return -EINVAL;
+		return 0;
 
 	if ((start + blkcnt) > block_dev->lba)
 		return -EINVAL;

commit 6527836d2acbfc59350f6d13f4e75bd5fcbb0b0c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 17 10:47:07 2019 +0800

    common: android: rename and export load_android_image()
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I7398b83bff0fd0dedd77834ee2a8ff14f2ae11e0

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index aaf3d2866b..74c60769ca 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -1051,9 +1051,9 @@ out:
 }
 #endif
 
-static int load_android_image(struct blk_desc *dev_desc,
-			      char *boot_partname,
-			      unsigned long *load_address)
+int android_image_load_by_partname(struct blk_desc *dev_desc,
+				   const char *boot_partname,
+				   unsigned long *load_address)
 {
 	disk_partition_t boot_part;
 	int ret, part_num;
@@ -1185,8 +1185,9 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 			printf("Not AVB images, AVB skip\n");
 			env_update("bootargs",
 				   "androidboot.verifiedbootstate=orange");
-			if (load_android_image(dev_desc, boot_partname,
-					       &load_address)) {
+			if (android_image_load_by_partname(dev_desc,
+							   boot_partname,
+							   &load_address)) {
 				printf("Android image load failed\n");
 				return -1;
 			}
@@ -1206,7 +1207,9 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	 * 2. Load the boot/recovery from the desired "boot" partition.
 	 * Determine if this is an AOSP image.
 	 */
-	if (load_android_image(dev_desc, boot_partname, &load_address)) {
+	if (android_image_load_by_partname(dev_desc,
+					   boot_partname,
+					   &load_address)) {
 		printf("Android image load failed\n");
 		return -1;
 	}
diff --git a/include/image.h b/include/image.h
index e06c902464..f681c7ef7e 100644
--- a/include/image.h
+++ b/include/image.h
@@ -1300,6 +1300,9 @@ long android_image_load(struct blk_desc *dev_desc,
 			unsigned long load_address,
 			unsigned long max_size);
 
+int android_image_load_by_partname(struct blk_desc *dev_desc,
+				   const char *boot_partname,
+				   unsigned long *load_address);
 #endif /* CONFIG_ANDROID_BOOT_IMAGE */
 
 int bootm_parse_comp(const unsigned char *hdr);

commit 7b2520c78e9da0cf40e1fde8342bfbc5a01b125b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 17 14:21:30 2019 +0800

    common: android: not go further if image is in-place
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I7ba27cd704638af933b8581f08192c3ab53c1928

diff --git a/common/image-android.c b/common/image-android.c
index 23ddc27a66..03b0032a99 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -598,6 +598,9 @@ int android_image_memcpy_separate(struct andr_img_hdr *hdr, ulong *load_addr)
 	int comp;
 
 	comp = android_image_parse_comp(hdr, &comp_addr);
+	if (comp_addr == (ulong)hdr)
+		return 0;
+
 	if (android_image_separate(hdr, NULL, (void *)comp_addr, hdr))
 		return -1;
 

commit 978c395756f1772e2a557af4969ae3b64430c39a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 17 11:58:40 2019 +0800

    crypto: rockchip: v1: add address print for aligned failed message
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I9009f88646942caf950d9da949581d60273a2eb8

diff --git a/drivers/crypto/rockchip/crypto_v1.c b/drivers/crypto/rockchip/crypto_v1.c
index eb6a3044a8..a4524d015e 100644
--- a/drivers/crypto/rockchip/crypto_v1.c
+++ b/drivers/crypto/rockchip/crypto_v1.c
@@ -105,7 +105,9 @@ static int rockchip_crypto_sha_update(struct udevice *dev,
 
 	priv->length += len;
 	if ((priv->length != priv->ctx->length) && !IS_ALIGNED(len, 4)) {
-		printf("Crypto-v1: require update data length 4-byte aligned\n");
+		printf("Crypto-v1: require update data length 4-byte "
+		       "aligned(0x%08lx - 0x%08lx)\n",
+		       (ulong)input, (ulong)input + len);
 		return -EINVAL;
 	}
 

commit bc2416fb9555abea343fc17ea2943e43e06a35e0
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 17 14:37:42 2019 +0800

    configs: rk322x: remove fdt_high
    
    We place it at the address lower than 256MB, remove this in order
    to enable relocation skip by android_image_separate().
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I9fbeb9372a99165cbca0c4dc20582a19316e6e48

diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h
index 6c1e3e77db..da4eac28a0 100644
--- a/include/configs/rk322x_common.h
+++ b/include/configs/rk322x_common.h
@@ -50,10 +50,7 @@
 
 #include <config_distro_bootcmd.h>
 
-/* Linux fails to load the fdt if it's loaded above 512M on a evb-rk3036 board,
- * so limit the fdt reallocation to that */
 #define CONFIG_EXTRA_ENV_SETTINGS \
-	"fdt_high=0x7fffffff\0" \
 	"partitions=" PARTS_DEFAULT \
 	ENV_MEM_LAYOUT_SETTINGS \
 	ROCKCHIP_DEVICE_SETTINGS \

commit e7dc3ddef676f45cd0ab62f391409687b84a57e1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 17 14:34:52 2019 +0800

    configs: rk3288: remove initrd/fdt high
    
    We place them at the address lower than 256MB, remove this
    in order to enable relocation skip by android_image_separate().
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ic1d5c949572902122547aad830761743dd7ecb05

diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index 6d12bbcb65..35aff11851 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -67,11 +67,7 @@
 
 #include <config_distro_bootcmd.h>
 
-/* Linux fails to load the fdt if it's loaded above 256M on a Rock 2 board, so
- * limit the fdt reallocation to that */
 #define CONFIG_EXTRA_ENV_SETTINGS \
-	"fdt_high=0x0fffffff\0" \
-	"initrd_high=0x0fffffff\0" \
 	"partitions=" PARTS_DEFAULT \
 	ENV_MEM_LAYOUT_SETTINGS \
 	ROCKCHIP_DEVICE_SETTINGS \

commit 0453d738ecc5b8468d24ffe694d6522095719e27
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Dec 12 12:37:25 2019 +0800

    rockchip: param: support parse 4GB+ memory size
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ifac53c5fd97e0708b0eeef8d455cdcb5c0dc8d4d

diff --git a/arch/arm/mach-rockchip/param.c b/arch/arm/mach-rockchip/param.c
index d79ae89094..5b2ae8ff78 100644
--- a/arch/arm/mach-rockchip/param.c
+++ b/arch/arm/mach-rockchip/param.c
@@ -12,6 +12,8 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#define SZ_4GB				0x100000000ULL
+
 #if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
 #define SDRAM_OFFSET(offset)		(CONFIG_SYS_SDRAM_BASE + (offset))
 #define PARAM_DRAM_INFO_OFFSET		(SZ_32M)
@@ -255,24 +257,41 @@ struct memblock *param_parse_ddr_mem(int *out_count)
 	 */
 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
 	struct tag *t;
+	u64 base, size;
+	int n;
 
 	t = atags_get_tag(ATAG_DDR_MEM);
 	if (t && t->u.ddr_mem.count) {
 		count = t->u.ddr_mem.count;
-		mem = calloc(count, sizeof(*mem));
+		mem = calloc(count + MEM_RESV_COUNT, sizeof(*mem));
 		if (!mem) {
 			printf("Calloc ddr memory failed\n");
 			return 0;
 		}
 
-		for (i = 0; i < count; i++) {
-			mem[i].base = t->u.ddr_mem.bank[i];
-			mem[i].size =
-			  ddr_mem_get_usable_size(t->u.ddr_mem.bank[i],
-						  t->u.ddr_mem.bank[i + count]);
+		for (i = 0, n = 0; i < count; i++, n++) {
+			base = t->u.ddr_mem.bank[i];
+			size = t->u.ddr_mem.bank[i + count];
+
+			/* 0~4GB */
+			if (base < SZ_4GB) {
+				mem[n].base = base;
+				mem[n].size = ddr_mem_get_usable_size(base, size);
+				if (base + size > SZ_4GB) {
+					n++;
+					mem[n].base_u64 = SZ_4GB;
+					mem[n].size_u64 = base + size - SZ_4GB;
+				}
+			} else {
+				/* 4GB+ */
+				mem[n].base_u64 = base;
+				mem[n].size_u64 = size;
+			}
+
+			assert(n < count + MEM_RESV_COUNT);
 		}
 
-		*out_count = count;
+		*out_count = n;
 		return mem;
 	}
 #endif

commit 470c509241b00acccae95369d72024d9ddad46c8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Dec 12 16:35:03 2019 +0800

    board_f/arm: fixup 4GB+ memory size
    
    - fixup gd->bd->bi_dram[] before update "/memory" node
    - append 4GB+ memory size when announce dram
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I8908426c54d251e5cfa9216b0dc5470145e37cb5

diff --git a/arch/arm/lib/bootm-fdt.c b/arch/arm/lib/bootm-fdt.c
index 8b9ef7de3b..e9b66acc3a 100644
--- a/arch/arm/lib/bootm-fdt.c
+++ b/arch/arm/lib/bootm-fdt.c
@@ -22,6 +22,7 @@
 #endif
 #include <asm/psci.h>
 #include <asm/spin_table.h>
+#include <bidram.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -51,6 +52,9 @@ int arch_fixup_fdt(void *blob)
 	u64 start[CONFIG_NR_DRAM_BANKS];
 	u64 size[CONFIG_NR_DRAM_BANKS];
 
+#ifdef CONFIG_BIDRAM
+	bidram_fixup();
+#endif
 	for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
 		start[bank] = bd->bi_dram[bank].start;
 		size[bank] = bd->bi_dram[bank].size;
diff --git a/common/board_f.c b/common/board_f.c
index 3be9ccdd9c..ada279ed8b 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -40,6 +40,7 @@
 #include <asm/sections.h>
 #include <dm/root.h>
 #include <linux/errno.h>
+#include <bidram.h>
 #include <sysmem.h>
 
 /*
@@ -184,6 +185,9 @@ static int show_dram_config(void)
 	size = gd->ram_size;
 #endif
 
+#ifdef CONFIG_BIDRAM
+	size += bidram_append_size();
+#endif
 	print_size(size, "");
 	board_add_ram_info(0);
 	putc('\n');

commit 1d09cf29cded007e7cb3c55a78f6a0a5a3845a12
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Dec 12 11:51:31 2019 +0800

    lib: bidram: add 4GB+ memory size support
    
    - On ARMv7: LPAE seems to be not friendly that brings a lot of
      compile errors.
    
    - On ARMv8: MMU translate table is static defined by mem_map[]
      and max 4GB as usual. It is not created dynamically according
      to real memory size, that is different from ARMv7.
    
    - 4GB memory is enough for U-Boot on both ARMv7 an ARMv8.
    
    Considering all that, we decide to make max 4GB size to be visiable
    for U-Boot, but still pass the real available memory size to kernel
    by bidram_fixup() called at late before fixup "/memory" node.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Idd5fa769e940b0618446909f8f9edc39f596f072

diff --git a/include/bidram.h b/include/bidram.h
index 4eb9ed9c75..7ba0497389 100644
--- a/include/bidram.h
+++ b/include/bidram.h
@@ -14,6 +14,9 @@ struct bidram {
 	struct lmb lmb;
 	struct list_head reserved_head;
 	bool has_init;
+	bool fixup;
+	u64 base_u64[MEM_RESV_COUNT]; /* 4GB+ */
+	u64 size_u64[MEM_RESV_COUNT];
 };
 
 /**
@@ -64,6 +67,20 @@ int bidram_reserve_by_name(const char *name, phys_addr_t base, phys_size_t size)
  */
 void bidram_dump(void);
 
+/**
+ * bidram_fixup() - Fixup bi_dram[] for 4GB+ memory
+ *
+ * @return 0 on success, otherwise error
+ */
+int bidram_fixup(void);
+
+/**
+ * bidram_append_size() - Append 4GB+ memory
+ *
+ * @return 4GB+ size
+ */
+u64 bidram_append_size(void);
+
 /**
  * bidram_reserved_is_overlap() - Check outside memory is overlap with reserved
  *
diff --git a/include/memblk.h b/include/memblk.h
index 15accdb17b..8254fb7a4b 100644
--- a/include/memblk.h
+++ b/include/memblk.h
@@ -7,6 +7,7 @@
 #define _MEMBLK_H
 
 #define ALIAS_COUNT_MAX		2
+#define MEM_RESV_COUNT		3
 
 enum memblk_id {
 	MEMBLK_ID_UNK,
@@ -47,6 +48,8 @@ struct memblk_attr {
 struct memblock {
 	phys_addr_t base;
 	phys_size_t size;
+	u64 base_u64; /* 4GB+ */
+	u64 size_u64;
 	phys_addr_t orig_base;
 	struct memblk_attr attr;
 	struct list_head node;
diff --git a/lib/bidram.c b/lib/bidram.c
index 5f6fac8a0a..ec563ee8b9 100644
--- a/lib/bidram.c
+++ b/lib/bidram.c
@@ -119,6 +119,7 @@ static int bidram_add(phys_addr_t base, phys_size_t size)
 
 void bidram_gen_gd_bi_dram(void)
 {
+	struct bidram *bidram = &plat_bidram;
 	struct lmb *lmb = &plat_bidram.lmb;
 	struct lmb_property *mem_rgn = lmb->memory.region;
 	struct lmb_property *res_rgn = lmb->reserved.region;
@@ -168,14 +169,50 @@ void bidram_gen_gd_bi_dram(void)
 					    gd->bd->bi_dram[idx].start;
 	}
 done:
+	/* Append 4GB+ memory blocks */
+	if (bidram->fixup) {
+		for (i = 0; i < MEM_RESV_COUNT; i++) {
+			if (!bidram->size_u64[i])
+				continue;
+			gd->bd->bi_dram[idx].start = bidram->base_u64[i];
+			gd->bd->bi_dram[idx].size  = bidram->size_u64[i];
+			BIDRAM_D("FIXUP: gd->bi_dram[%d]: start=0x%llx, size=0x%llx\n",
+				 idx, bidram->base_u64[i], bidram->size_u64[i]);
+			idx++;
+		}
+	}
+
 	for (i = 0; i < idx; i++) {
-		BIDRAM_D("gd bi_dram[%d]: start=0x%08lx, end=0x%08lx\n",
-			 i, (ulong)gd->bd->bi_dram[i].start,
-			 (ulong)gd->bd->bi_dram[i].start +
-			 (ulong)gd->bd->bi_dram[i].size);
+		BIDRAM_D("GEN: gd->bi_dram[%d]: start=0x%llx, end=0x%llx\n",
+			 i, (u64)gd->bd->bi_dram[i].start,
+			 (u64)gd->bd->bi_dram[i].start +
+			 (u64)gd->bd->bi_dram[i].size);
 	}
 }
 
+int bidram_fixup(void)
+{
+	struct bidram *bidram = &plat_bidram;
+
+	bidram->fixup = true;
+	bidram_gen_gd_bi_dram();
+
+	return 0;
+}
+
+u64 bidram_append_size(void)
+{
+	struct bidram *bidram = &plat_bidram;
+	u64 size = 0;
+	int i;
+
+	/* 4GB+ */
+	for (i = 0; i < MEM_RESV_COUNT; i++)
+		size += bidram->size_u64[i];
+
+	return size;
+}
+
 static int bidram_is_overlap(phys_addr_t base1, phys_size_t size1,
 			     phys_addr_t base2, phys_size_t size2)
 {
@@ -341,7 +378,7 @@ phys_size_t bidram_get_ram_size(void)
 	phys_addr_t end_addr;
 	parse_fn_t parse_fn;
 	int i, count, ret;
-	int bad_cnt = 0;
+	int bad_cnt = 0, n = 0;
 	char bad_name[12];
 
 	parse_fn = board_bidram_parse_fn();
@@ -373,19 +410,18 @@ phys_size_t bidram_get_ram_size(void)
 			 i, (ulong)list[i].base,
 			 (ulong)list[i].base + (ulong)list[i].size);
 
-		if (!list[i].size)
+		if (!list[i].size) {
+			/* handle 4GB+ */
+			if (list[i].size_u64 && n < MEM_RESV_COUNT) {
+				bidram->base_u64[n] = list[i].base_u64;
+				bidram->size_u64[n] = list[i].size_u64;
+				n++;
+			}
 			continue;
+		}
 
 		/* We assume the last block gives the ram addr end */
-		if (i == count - 1) {
-			ram_addr_end = list[i].base + list[i].size;
-			ret = bidram_add(CONFIG_SYS_SDRAM_BASE,
-					 ram_addr_end - CONFIG_SYS_SDRAM_BASE);
-			if (ret) {
-				BIDRAM_E("Failed to add bidram from bi_dram[%d]\n", i);
-				return 0;
-			}
-		}
+		ram_addr_end = list[i].base + list[i].size;
 
 		/* This is a bad dram bank? record it */
 		if (i > 0) {
@@ -405,6 +441,13 @@ phys_size_t bidram_get_ram_size(void)
 		}
 	}
 
+	ret = bidram_add(CONFIG_SYS_SDRAM_BASE,
+			 ram_addr_end - CONFIG_SYS_SDRAM_BASE);
+	if (ret) {
+		BIDRAM_E("Failed to add bidram from bi_dram[%d]\n", i);
+		return 0;
+	}
+
 	/* Reserve bad dram bank after bidram_add(), treat as reserved region */
 	for (i = 0; i < bad_cnt; i++) {
 		if (gd->flags & GD_FLG_RELOC)

commit 36d452911c4da4a8fda575a7749518df1595e4da
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Dec 16 20:56:40 2019 +0800

    asm-generic: global data: use u64 for bi_dram start/size
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I2c253633734e901caf6e3122b4b916f4eb6cd124

diff --git a/include/asm-generic/u-boot.h b/include/asm-generic/u-boot.h
index bb2fc0fe95..17493cb8b7 100644
--- a/include/asm-generic/u-boot.h
+++ b/include/asm-generic/u-boot.h
@@ -91,8 +91,8 @@ typedef struct bd_info {
 	unsigned int	bi_andr_version;
 #ifdef CONFIG_NR_DRAM_BANKS
 	struct {			/* RAM configuration */
-		phys_addr_t start;
-		phys_size_t size;
+		u64 start;
+		u64 size;
 	} bi_dram[CONFIG_NR_DRAM_BANKS];
 #endif /* CONFIG_NR_DRAM_BANKS */
 } bd_t;

commit 028a3c087958354767360c818b7df81ef657708a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Dec 16 18:26:23 2019 +0800

    dm: cmd: add "dm aliases" support
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I46d44a31a6fe82627bde5ff655b125e44add7a8a

diff --git a/drivers/core/of_access.c b/drivers/core/of_access.c
index cfaee4e4d6..eee3c36e96 100644
--- a/drivers/core/of_access.c
+++ b/drivers/core/of_access.c
@@ -851,9 +851,11 @@ struct device_node *of_alias_dump(void)
 
 	mutex_lock(&of_mutex);
 	list_for_each_entry(app, &aliases_lookup, link) {
-		printf("%s: Alias %s%d: %s, phandle=%d\n", __func__,
+		printf("%10s%d: %20s, phandle=%d %4s\n",
 		       app->stem, app->id,
-		       app->np->full_name, app->np->phandle);
+		       app->np->full_name, app->np->phandle,
+		       of_get_property(app->np, "u-boot,dm-pre-reloc", NULL) ||
+		       of_get_property(app->np, "u-boot,dm-spl", NULL) ? "*" : "");
 	}
 	mutex_unlock(&of_mutex);
 
diff --git a/test/dm/cmd_dm.c b/test/dm/cmd_dm.c
index a3c5971a8b..a4f2165b64 100644
--- a/test/dm/cmd_dm.c
+++ b/test/dm/cmd_dm.c
@@ -14,6 +14,7 @@
 #include <mapmem.h>
 #include <errno.h>
 #include <asm/io.h>
+#include <dm/of_access.h>
 #include <dm/root.h>
 #include <dm/util.h>
 
@@ -41,10 +42,20 @@ static int do_dm_dump_devres(cmd_tbl_t *cmdtp, int flag, int argc,
 	return 0;
 }
 
+static int do_dm_dump_aliases(cmd_tbl_t *cmdtp, int flag, int argc,
+			      char * const argv[])
+{
+#ifdef CONFIG_OF_LIVE
+	of_alias_dump();
+#endif
+	return 0;
+}
+
 static cmd_tbl_t test_commands[] = {
 	U_BOOT_CMD_MKENT(tree, 0, 1, do_dm_dump_all, "", ""),
 	U_BOOT_CMD_MKENT(uclass, 1, 1, do_dm_dump_uclass, "", ""),
 	U_BOOT_CMD_MKENT(devres, 1, 1, do_dm_dump_devres, "", ""),
+	U_BOOT_CMD_MKENT(aliases, 0, 1, do_dm_dump_aliases, "", ""),
 };
 
 static __maybe_unused void dm_reloc(void)
@@ -85,5 +96,6 @@ U_BOOT_CMD(
 	"Driver model low level access",
 	"tree         Dump driver model tree ('*' = activated)\n"
 	"dm uclass        Dump list of instances for each uclass\n"
-	"dm devres        Dump list of device resources for each device"
+	"dm devres        Dump list of device resources for each device\n"
+	"dm aliases       Dump list of aliases"
 );

commit 503458d2fe9317622b914df6badb5190d20ef545
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Dec 16 11:37:27 2019 +0800

    core: device: allow serial node bind from kernel dtb
    
    Previously we have to use serial node only from U-Boot dtb,
    because we can't handle two problems to avoid serial intr fail:
    
    - CRU phandle miss match between kernel and U-Boot dtb
    - No "clock-frequency" in kernel serial node
    
    These problems are workarund by current code, but the dm serial
    seems to be works normally only for uart debug but not other uart.
    
    Since the problems have been solved, let's allow serial driver-device
    bind from kernel dtb.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If3453509151e086afc5b7558277bec53842ac8eb

diff --git a/drivers/core/device.c b/drivers/core/device.c
index dfce232b74..206b2fb05c 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -72,7 +72,7 @@ static int device_bind_common(struct udevice *parent, const struct driver *drv,
 			if (!strcmp(name, dev->name) &&
 			    (dev_read_bool(dev, "u-boot,dm-pre-reloc") ||
 			     dev_read_bool(dev, "u-boot,dm-spl"))) {
-				if (drv->id == UCLASS_SERIAL || drv->id == UCLASS_CRYPTO) {
+				if (drv->id == UCLASS_CRYPTO) {
 					/* Always use serial node from U-Boot dtb */
 					debug("%s do not delete uboot dev: %s\n",
 					      __func__, dev->name);

commit 80fe0cff6f6d962fd2f87169fd6cf6a8f95ea929
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Dec 16 16:15:49 2019 +0800

    dm: serial: bind stdout device anyway
    
    If the console is not marked to be bound, bind it anyway.
    
    This makes serial node in U-Boot dtb no need to be enabled
    and bound into dm tree since they are not sured to be the
    stdout for pre-loader serial.
    
    This avoids the mix of kernel and U-Boot serial node under
    serial uclass list, otherwise serial device bound from U-Boot
    dtb always have the higher priority.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I4d35626288124d14d47df2e7492d12f1af6a36ae

diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c
index aaa864b8ac..b4d6b7b6e7 100644
--- a/drivers/serial/serial-uclass.c
+++ b/drivers/serial/serial-uclass.c
@@ -108,6 +108,18 @@ static void serial_find_console_or_panic(void)
 				gd->cur_serial_dev = dev;
 				return;
 			}
+
+			/*
+			 * If the console is not marked to be bound, bind it
+			 * anyway.
+			 */
+			if (!lists_bind_fdt(gd->dm_root, np_to_ofnode(np),
+					    &dev)) {
+				if (!device_probe(dev)) {
+					gd->cur_serial_dev = dev;
+					return;
+				}
+			}
 		} else {
 			if (!serial_check_stdout(blob, &dev)) {
 				gd->cur_serial_dev = dev;

commit 02c954e50503dd3e48c9af9ea43aaa574496d708
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Dec 16 11:51:58 2019 +0800

    serial: ns16550: optimise
    
    - set default clock rate 24000000;
    - pre-loader param only applied on target serial debug;
    - no special workarund when kernel dtb is enabled since
      we have solved phandle miss match issue.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ic10e1f4120e7e2458773e3fcc5925ba69d062d61

diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index ab34dc6cb3..36e7c8911a 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -88,7 +88,7 @@ static inline int serial_in_shift(void *addr, int shift)
 #ifdef CONFIG_DM_SERIAL
 
 #ifndef CONFIG_SYS_NS16550_CLK
-#define CONFIG_SYS_NS16550_CLK  0
+#define CONFIG_SYS_NS16550_CLK  24000000
 #endif
 
 static void ns16550_writeb(NS16550_t port, int offset, int value)
@@ -481,7 +481,7 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
 	plat->base = addr;
 #else
 
-	if (gd && gd->serial.using_pre_serial && !gd->cur_serial_dev)
+	if (gd && gd->serial.using_pre_serial && gd->serial.id == dev->req_seq)
 		addr = gd->serial.addr;
 
 	plat->base = (unsigned long)map_physmem(addr, 0, MAP_NOCACHE);
@@ -496,11 +496,7 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
 		if (!IS_ERR_VALUE(err))
 			plat->clock = err;
 	} else if (err != -ENOENT && err != -ENODEV && err != -ENOSYS) {
-		debug("ns16550 failed to get clock\n");
-#ifdef CONFIG_USING_KERNEL_DTB
-/* With kernel dtb support, serial ofnode not able to get cru phandle */
-		if(err != -EINVAL)
-#endif
+		printf("ns16550 failed to get clock, err=%d\n", err);
 		return err;
 	}
 

commit 369e944c844f783508b7839ae86a3418e2f63bc7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Dec 12 18:07:07 2019 +0800

    fdt/Makefile: make u-boot-dtb.bin 8-byte aligned
    
    The dts/kern.dtb is appended after u-boot-dtb.bin for U-disk boot.
    
    Make sure u-boot-dtb.bin is 8-byte aligned to avoid data-abort on
    calling: fdt_check_header(gd->fdt_blob_kern).
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Id5f2daf0c5446e7ea828cb970d3d4879e3acda86

diff --git a/Makefile b/Makefile
index ddea829dbf..b9473f7495 100644
--- a/Makefile
+++ b/Makefile
@@ -887,6 +887,9 @@ endif
 quiet_cmd_copy = COPY    $@
       cmd_copy = cp $< $@
 
+quiet_cmd_truncate = ALIGN   $@
+      cmd_truncate = truncate -s "%8" $@
+
 ifeq ($(CONFIG_MULTI_DTB_FIT),y)
 
 fit-dtb.blob: dts/dt.dtb FORCE
@@ -909,11 +912,13 @@ u-boot-dtb.bin: u-boot-nodtb.bin dts/dt-spl.dtb FORCE
 ifneq ($(wildcard dts/kern.dtb),)
 u-boot-dtb-kern.bin: u-boot-dtb.bin FORCE
 	$(call if_changed,copy)
+	$(call if_changed,truncate)
 u-boot.bin: u-boot-dtb-kern.bin dts/kern.dtb FORCE
 	$(call if_changed,cat)
 else
 u-boot.bin: u-boot-dtb.bin FORCE
 	$(call if_changed,copy)
+	$(call if_changed,truncate)
 endif
 else
 
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 589cec3e94..5b637f2639 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -1286,8 +1286,8 @@ int fdtdec_setup(void)
 	gd->fdt_blob = (ulong *)&_end;
 
 #    ifdef CONFIG_USING_KERNEL_DTB
-	gd->fdt_blob_kern =
-		(ulong *)((ulong)gd->fdt_blob + fdt_totalsize(gd->fdt_blob));
+	gd->fdt_blob_kern = (ulong *)((ulong)gd->fdt_blob +
+					ALIGN(fdt_totalsize(gd->fdt_blob), 8));
 #    endif
 #  endif
 # elif defined(CONFIG_OF_BOARD)

commit 9f8dc1751f0e2fd0966d51acd1845891470df21d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Dec 13 14:47:38 2019 +0800

    rockchip: board: fixup gpio phandle for key nodes from U-Boot dtb
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I4a6af5334bf512d3713b9f32db903f85c818bfe7

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index df77569d01..c40186905f 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -237,7 +237,7 @@ int board_late_init(void)
 
 #ifdef CONFIG_USING_KERNEL_DTB
 /* Here, only fixup cru phandle, pmucru is not included */
-static int phandles_fixup(void *fdt)
+static int phandles_fixup_cru(void *fdt)
 {
 	const char *props[] = { "clocks", "assigned-clocks" };
 	struct udevice *dev;
@@ -343,9 +343,84 @@ static int phandles_fixup(void *fdt)
 	return 0;
 }
 
+static int phandles_fixup_gpio(void *fdt, void *ufdt)
+{
+	struct udevice *dev;
+	struct uclass *uc;
+	const char *prop = "gpios";
+	const char *comp;
+	char *gpio_name[10];
+	int gpio_off[10];
+	int pinctrl;
+	int offset;
+	int i = 0;
+	int n = 0;
+
+	pinctrl = fdt_path_offset(fdt, "/pinctrl");
+	if (pinctrl < 0)
+		return 0;
+
+	memset(gpio_name, 0, sizeof(gpio_name));
+	for (offset = fdt_first_subnode(fdt, pinctrl);
+	     offset >= 0;
+	     offset = fdt_next_subnode(fdt, offset)) {
+		/* assume the font nodes are gpio node */
+		if (++i >= ARRAY_SIZE(gpio_name))
+			break;
+
+		comp = fdt_getprop(fdt, offset, "compatible", NULL);
+		if (!comp)
+			continue;
+
+		if (!strcmp(comp, "rockchip,gpio-bank")) {
+			gpio_name[n] = (char *)fdt_get_name(fdt, offset, NULL);
+			gpio_off[n]  = offset;
+			n++;
+		}
+	}
+
+	if (!gpio_name[0])
+		return 0;
+
+	if (uclass_get(UCLASS_KEY, &uc) || list_empty(&uc->dev_head))
+		return 0;
+
+	list_for_each_entry(dev, &uc->dev_head, uclass_node) {
+		u32 new_phd, phd_old;
+		char *name;
+		ofnode ofn;
+
+		if (!dev_read_bool(dev, "u-boot,dm-pre-reloc") &&
+		    !dev_read_bool(dev, "u-boot,dm-spl"))
+			continue;
+
+		if (dev_read_u32_array(dev, prop, &phd_old, 1))
+			continue;
+
+		ofn = ofnode_get_by_phandle(phd_old);
+		if (!ofnode_valid(ofn))
+			continue;
+
+		name = (char *)ofnode_get_name(ofn);
+		if (!name)
+			continue;
+
+		for (i = 0; i < ARRAY_SIZE(gpio_name[i]); i++) {
+			if (gpio_name[i] && !strcmp(name, gpio_name[i])) {
+				new_phd = fdt_get_phandle(fdt, gpio_off[i]);
+				dev_write_u32_array(dev, prop, &new_phd, 1);
+				break;
+			}
+		}
+	}
+
+	return 0;
+}
+
 int init_kernel_dtb(void)
 {
 	ulong fdt_addr;
+	void *ufdt_blob;
 	int ret;
 
 	fdt_addr = env_get_ulong("fdt_addr_r", 16, 0);
@@ -371,13 +446,18 @@ int init_kernel_dtb(void)
 		}
 	}
 
+	ufdt_blob = (void *)gd->fdt_blob;
 	gd->fdt_blob = (void *)fdt_addr;
 
 	/*
 	 * There is a phandle miss match between U-Boot and kernel dtb node,
-	 * the typical is cru phandle, we fixup it in U-Boot live dt nodes.
+	 * we fixup it in U-Boot live dt nodes.
+	 *
+	 * CRU:	 all nodes.
+	 * GPIO: key nodes.
 	 */
-	phandles_fixup((void *)gd->fdt_blob);
+	phandles_fixup_cru((void *)gd->fdt_blob);
+	phandles_fixup_gpio((void *)gd->fdt_blob, (void *)ufdt_blob);
 
 	of_live_build((void *)gd->fdt_blob, (struct device_node **)&gd->of_root);
 	dm_scan_fdt((void *)gd->fdt_blob, false);

commit 6520ac9cab1cd28b6f7581cd08c77b8e5bb77514
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Dec 6 09:51:32 2019 +0800

    rockchip: rkcommon: don't set image head for signed image
    
    Reserve "RSAK" tag
    
    Change-Id: Ibfe2e6d83bd89ce75dfa0b7fc97038037a181cab
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index 27e0004eba..d502607202 100644
--- a/tools/rkcommon.c
+++ b/tools/rkcommon.c
@@ -202,7 +202,8 @@ int rkcommon_set_header(void *buf, uint file_size, uint max_size,
 	rkcommon_set_header0(buf, file_size, max_size, params);
 
 	/* Set up the SPL name (i.e. copy spl_hdr over) */
-	memcpy(&hdr->magic, rkcommon_get_spl_hdr(params), RK_SPL_HDR_SIZE);
+	if (memcmp(&hdr->magic, "RSAK", 4))
+		memcpy(&hdr->magic, rkcommon_get_spl_hdr(params), RK_SPL_HDR_SIZE);
 
 	if (rkcommon_need_rc4_spl(params))
 		rkcommon_rc4_encode_spl(buf, RK_SPL_HDR_START,

commit 1f1e1246f675e3fe195e83fad909816125e26808
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Tue Nov 26 18:10:55 2019 +0800

    clk: rockchip: rv1109: Add clock driver
    
    Add basic clock for rv1109 which including cpu, bus, emmc clock init.
    
    Change-Id: I093f9e75bf296b3cc7f0ee8f88496e42857a2d96
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rv1109.h b/arch/arm/include/asm/arch-rockchip/cru_rv1109.h
new file mode 100644
index 0000000000..bf9439feb3
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/cru_rv1109.h
@@ -0,0 +1,332 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2019 Rockchip Electronics Co. Ltd.
+ * Author: Finley Xiao <finley.xiao@rock-chips.com>
+ */
+
+#ifndef _ASM_ARCH_CRU_RV1109_H
+#define _ASM_ARCH_CRU_RV1109_H
+
+#include <common.h>
+
+#define MHz		1000000
+#define KHz		1000
+#define OSC_HZ		(24 * MHz)
+
+#define APLL_HZ		(600 * MHz)
+#define GPLL_HZ		(1188 * MHz)
+#define CPLL_HZ		(1000 * MHz)
+#define HPLL_HZ		(1600 * MHz)
+#define PCLK_PDPMU_HZ	(100 * MHz)
+#define ACLK_PDBUS_HZ	(500 * MHz)
+#define HCLK_PDBUS_HZ	(200 * MHz)
+#define PCLK_PDBUS_HZ	(100 * MHz)
+#define ACLK_PDPHP_HZ	(300 * MHz)
+#define HCLK_PDPHP_HZ	(200 * MHz)
+#define HCLK_PDCORE_HZ	(100 * MHz)
+#define HCLK_PDAUDIO_HZ	(150 * MHz)
+
+/* RV1109 pll id */
+enum rv1109_pll_id {
+	APLL,
+	DPLL,
+	CPLL,
+	HPLL,
+	GPLL,
+	PLL_COUNT,
+};
+
+struct rv1109_clk_info {
+	unsigned long id;
+	char *name;
+	bool is_cru;
+};
+
+/* Private data for the clock driver - used by rockchip_get_cru() */
+struct rv1109_pmuclk_priv {
+	struct rv1109_pmucru *pmucru;
+	ulong gpll_hz;
+};
+
+struct rv1109_clk_priv {
+	struct rv1109_cru *cru;
+	struct rv1109_grf *grf;
+	ulong gpll_hz;
+	ulong cpll_hz;
+	ulong armclk_hz;
+	ulong armclk_enter_hz;
+	ulong armclk_init_hz;
+	bool sync_kernel;
+	bool set_armclk_rate;
+};
+
+struct rv1109_pll {
+	unsigned int con0;
+	unsigned int con1;
+	unsigned int con2;
+	unsigned int con3;
+	unsigned int con4;
+	unsigned int con5;
+	unsigned int con6;
+	unsigned int reserved0[1];
+};
+
+struct rv1109_pmucru {
+	unsigned int pmu_mode;
+	unsigned int reserved1[3];
+	struct rv1109_pll pll;
+	unsigned int offsetcal_status;
+	unsigned int reserved2[51];
+	unsigned int pmu_clksel_con[14];
+	unsigned int reserved3[18];
+	unsigned int pmu_clkgate_con[3];
+	unsigned int reserved4[29];
+	unsigned int pmu_softrst_con[2];
+	unsigned int reserved5[14];
+	unsigned int pmu_autocs_con[2];
+};
+
+check_member(rv1109_pmucru, pmu_autocs_con[1], 0x244);
+
+struct rv1109_cru {
+	struct rv1109_pll pll[4];
+	unsigned int offsetcal_status[4];
+	unsigned int mode;
+	unsigned int reserved1[27];
+	unsigned int clksel_con[78];
+	unsigned int reserved2[18];
+	unsigned int clkgate_con[25];
+	unsigned int reserved3[7];
+	unsigned int softrst_con[15];
+	unsigned int reserved4[17];
+	unsigned int ssgtbl[32];
+	unsigned int glb_cnt_th;
+	unsigned int glb_rst_st;
+	unsigned int glb_srst_fst;
+	unsigned int glb_srst_snd;
+	unsigned int glb_rst_con;
+	unsigned int reserved5[11];
+	unsigned int sdmmc_con[2];
+	unsigned int sdio_con[2];
+	unsigned int emmc_con[2];
+	unsigned int reserved6[2];
+	unsigned int gmac_con;
+	unsigned int misc[2];
+	unsigned int reserved7[45];
+	unsigned int autocs_con[26];
+};
+
+check_member(rv1109_cru, autocs_con[25], 0x584);
+
+struct pll_rate_table {
+	unsigned long rate;
+	unsigned int fbdiv;
+	unsigned int postdiv1;
+	unsigned int refdiv;
+	unsigned int postdiv2;
+	unsigned int dsmpd;
+	unsigned int frac;
+};
+
+struct cpu_rate_table {
+	unsigned long rate;
+	unsigned int aclk_div;
+	unsigned int pclk_div;
+};
+
+#define RV1109_PMU_MODE			0x0
+#define RV1109_PMU_PLL_CON(x)		((x) * 0x4 + 0x10)
+#define RV1109_PLL_CON(x)		((x) * 0x4)
+#define RV1109_MODE_CON			0x90
+
+enum {
+	/* CRU_PMU_CLK_SEL0_CON */
+	RTC32K_SEL_SHIFT	= 7,
+	RTC32K_SEL_MASK		= 0x3 << RTC32K_SEL_SHIFT,
+	RTC32K_SEL_PMUPVTM	= 0,
+	RTC32K_SEL_OSC1_32K,
+	RTC32K_SEL_OSC0_DIV32K,
+
+	/* CRU_PMU_CLK_SEL1_CON */
+	PCLK_PDPMU_DIV_SHIFT	= 0,
+	PCLK_PDPMU_DIV_MASK	= 0x1f,
+
+	/* CRU_PMU_CLK_SEL2_CON */
+	CLK_I2C0_DIV_SHIFT	= 0,
+	CLK_I2C0_DIV_MASK	= 0x7f,
+
+	/* CRU_PMU_CLK_SEL3_CON */
+	CLK_I2C2_DIV_SHIFT	= 0,
+	CLK_I2C2_DIV_MASK	= 0x7f,
+
+	/* CRU_PMU_CLK_SEL6_CON */
+	CLK_PWM1_SEL_SHIFT	= 15,
+	CLK_PWM1_SEL_MASK	= 1 << CLK_PWM1_SEL_SHIFT,
+	CLK_PWM1_SEL_XIN24M	= 0,
+	CLK_PWM1_SEL_GPLL,
+	CLK_PWM1_DIV_SHIFT	= 8,
+	CLK_PWM1_DIV_MASK	= 0x7f << CLK_PWM1_DIV_SHIFT,
+	CLK_PWM0_SEL_SHIFT	= 7,
+	CLK_PWM0_SEL_MASK	= 1 << CLK_PWM0_SEL_SHIFT,
+	CLK_PWM0_SEL_XIN24M	= 0,
+	CLK_PWM0_SEL_GPLL,
+	CLK_PWM0_DIV_SHIFT	= 0,
+	CLK_PWM0_DIV_MASK	= 0x7f,
+
+	/* CRU_PMU_CLK_SEL9_CON */
+	CLK_SPI0_SEL_SHIFT	= 7,
+	CLK_SPI0_SEL_MASK	= 1 << CLK_SPI0_SEL_SHIFT,
+	CLK_SPI0_SEL_GPLL	= 0,
+	CLK_SPI0_SEL_XIN24M,
+	CLK_SPI0_DIV_SHIFT	= 0,
+	CLK_SPI0_DIV_MASK	= 0x7f,
+
+	/* CRU_PMU_CLK_SEL13_CON */
+	CLK_RTC32K_FRAC_NUMERATOR_SHIFT		= 16,
+	CLK_RTC32K_FRAC_NUMERATOR_MASK		= 0xffff << 16,
+	CLK_RTC32K_FRAC_DENOMINATOR_SHIFT	= 0,
+	CLK_RTC32K_FRAC_DENOMINATOR_MASK	= 0xffff,
+
+	/* CRU_CLK_SEL0_CON */
+	CORE_HCLK_DIV_SHIFT	= 8,
+	CORE_HCLK_DIV_MASK	= 0x1f << CORE_HCLK_DIV_SHIFT,
+
+	/* CRU_CLK_SEL1_CON */
+	CORE_DBG_DIV_SHIFT	= 4,
+	CORE_DBG_DIV_MASK	= 0xf << CORE_DBG_DIV_SHIFT,
+	CORE_ACLK_DIV_SHIFT	= 0,
+	CORE_ACLK_DIV_MASK	= 0x07,
+
+	/* CRU_CLK_SEL2_CON */
+	HCLK_PDBUS_SEL_SHIFT	= 15,
+	HCLK_PDBUS_SEL_MASK	= 1 << HCLK_PDBUS_SEL_SHIFT,
+	HCLK_PDBUS_SEL_GPLL	= 0,
+	HCLK_PDBUS_SEL_CPLL,
+	HCLK_PDBUS_DIV_SHIFT	= 8,
+	HCLK_PDBUS_DIV_MASK	= 0x1f << HCLK_PDBUS_DIV_SHIFT,
+	ACLK_PDBUS_SEL_SHIFT	= 6,
+	ACLK_PDBUS_SEL_MASK	= 0x3 << ACLK_PDBUS_SEL_SHIFT,
+	ACLK_PDBUS_SEL_GPLL	= 0,
+	ACLK_PDBUS_SEL_CPLL,
+	ACLK_PDBUS_SEL_DPLL,
+	ACLK_PDBUS_DIV_SHIFT	= 0,
+	ACLK_PDBUS_DIV_MASK	= 0x1f,
+
+	/* CRU_CLK_SEL3_CON */
+	PCLK_PDBUS_SEL_SHIFT	= 7,
+	PCLK_PDBUS_SEL_MASK	= 1 << PCLK_PDBUS_SEL_SHIFT,
+	PCLK_PDBUS_SEL_GPLL	= 0,
+	PCLK_PDBUS_SEL_CPLL,
+	PCLK_PDBUS_DIV_SHIFT	= 0,
+	PCLK_PDBUS_DIV_MASK	= 0x1f,
+
+	/* CRU_CLK_SEL4_CON */
+	ACLK_CRYPTO_SEL_SHIFT	= 7,
+	ACLK_CRYPTO_SEL_MASK	= 1 << ACLK_CRYPTO_SEL_SHIFT,
+	ACLK_CRYPTO_SEL_GPLL	= 0,
+	ACLK_CRYPTO_SEL_CPLL,
+	ACLK_CRYPTO_DIV_SHIFT	= 0,
+	ACLK_CRYPTO_DIV_MASK	= 0x1f,
+
+	/* CRU_CLK_SEL5_CON */
+	CLK_I2C3_DIV_SHIFT	= 8,
+	CLK_I2C3_DIV_MASK	= 0x7f << CLK_I2C3_DIV_SHIFT,
+	CLK_I2C1_DIV_SHIFT	= 0,
+	CLK_I2C1_DIV_MASK	= 0x7f,
+
+	/* CRU_CLK_SEL6_CON */
+	CLK_I2C5_DIV_SHIFT	= 8,
+	CLK_I2C5_DIV_MASK	= 0x7f << CLK_I2C5_DIV_SHIFT,
+	CLK_I2C4_DIV_SHIFT	= 0,
+	CLK_I2C4_DIV_MASK	= 0x7f,
+
+	/* CRU_CLK_SEL7_CON */
+	CLK_CRYPTO_PKA_SEL_SHIFT	= 15,
+	CLK_CRYPTO_PKA_SEL_MASK		= 1 << CLK_CRYPTO_PKA_SEL_SHIFT,
+	CLK_CRYPTO_PKA_SEL_GPLL		= 0,
+	CLK_CRYPTO_PKA_SEL_CPLL,
+	CLK_CRYPTO_PKA_DIV_SHIFT	= 8,
+	CLK_CRYPTO_PKA_DIV_MASK		= 0x1f << CLK_CRYPTO_PKA_DIV_SHIFT,
+	CLK_CRYPTO_CORE_SEL_SHIFT	= 7,
+	CLK_CRYPTO_CORE_SEL_MASK	= 1 << CLK_CRYPTO_CORE_SEL_SHIFT,
+	CLK_CRYPTO_CORE_SEL_GPLL	= 0,
+	CLK_CRYPTO_CORE_SEL_CPLL,
+	CLK_CRYPTO_CORE_DIV_SHIFT	= 0,
+	CLK_CRYPTO_CORE_DIV_MASK	= 0x1f,
+
+	/* CRU_CLK_SEL8_CON */
+	CLK_SPI1_SEL_SHIFT	= 8,
+	CLK_SPI1_SEL_MASK	= 1 << CLK_SPI1_SEL_SHIFT,
+	CLK_SPI1_SEL_GPLL	= 0,
+	CLK_SPI1_SEL_XIN24M,
+	CLK_SPI1_DIV_SHIFT	= 0,
+	CLK_SPI1_DIV_MASK	= 0x7f,
+
+	/* CRU_CLK_SEL9_CON */
+	CLK_PWM2_SEL_SHIFT	= 15,
+	CLK_PWM2_SEL_MASK	= 1 << CLK_PWM2_SEL_SHIFT,
+	CLK_PWM2_SEL_XIN24M	= 0,
+	CLK_PWM2_SEL_GPLL,
+	CLK_PWM2_DIV_SHIFT	= 8,
+	CLK_PWM2_DIV_MASK	= 0x7f << CLK_PWM2_DIV_SHIFT,
+
+	/* CRU_CLK_SEL20_CON */
+	CLK_SARADC_DIV_SHIFT	= 0,
+	CLK_SARADC_DIV_MASK	= 0x7ff,
+
+	/* CRU_CLK_SEL26_CON */
+	HCLK_PDAUDIO_DIV_SHIFT	= 0,
+	HCLK_PDAUDIO_DIV_MASK	= 0x1f,
+
+	/* CRU_CLK_SEL45_CON */
+	ACLK_PDVO_SEL_SHIFT	= 7,
+	ACLK_PDVO_SEL_MASK	= 1 << ACLK_PDVO_SEL_SHIFT,
+	ACLK_PDVO_SEL_GPLL	= 0,
+	ACLK_PDVO_SEL_CPLL,
+	ACLK_PDVO_DIV_SHIFT	= 0,
+	ACLK_PDVO_DIV_MASK	= 0x1f,
+
+	/* CRU_CLK_SEL47_CON */
+	DCLK_VOP_SEL_SHIFT	= 8,
+	DCLK_VOP_SEL_MASK	= 1 << DCLK_VOP_SEL_SHIFT,
+	DCLK_VOP_SEL_GPLL	= 0,
+	DCLK_VOP_SEL_CPLL,
+	DCLK_VOP_DIV_SHIFT	= 0,
+	DCLK_VOP_DIV_MASK	= 0xff,
+
+	/* CRU_CLK_SEL53_CON */
+	HCLK_PDPHP_DIV_SHIFT	= 8,
+	HCLK_PDPHP_DIV_MASK	= 0x1f << HCLK_PDPHP_DIV_SHIFT,
+	ACLK_PDPHP_SEL_SHIFT	= 7,
+	ACLK_PDPHP_SEL_MASK	= 1 << ACLK_PDPHP_SEL_SHIFT,
+	ACLK_PDPHP_SEL_GPLL	= 0,
+	ACLK_PDPHP_SEL_CPLL,
+	ACLK_PDPHP_DIV_SHIFT	= 0,
+	ACLK_PDPHP_DIV_MASK	= 0x1f,
+
+	/* CRU_CLK_SEL57_CON */
+	EMMC_SEL_SHIFT	= 14,
+	EMMC_SEL_MASK	= 0x3 << EMMC_SEL_SHIFT,
+	EMMC_SEL_GPLL	= 0,
+	EMMC_SEL_CPLL,
+	EMMC_SEL_XIN24M,
+	EMMC_DIV_SHIFT	= 0,
+	EMMC_DIV_MASK	= 0xff,
+
+	/* CRU_GMAC_CON */
+	GMAC_SRC_M1_SEL_SHIFT	= 5,
+	GMAC_SRC_M1_SEL_MASK	= 0x1 << GMAC_SRC_M1_SEL_SHIFT,
+	GMAC_SRC_M1_SEL_INT	= 0,
+	GMAC_SRC_M1_SEL_EXT,
+	GMAC_SRC_M0_SEL_SHIFT	= 0,
+	GMAC_SRC_M0_SEL_MASK	= 0x1,
+	GMAC_SRC_M0_SEL_INT	= 0,
+	GMAC_SRC_M0_SEL_EXT,
+
+	/* GRF_IOFUNC_CON1 */
+	GMAC_SRC_SEL_SHIFT	= 12,
+	GMAC_SRC_SEL_MASK	= 1 < GMAC_SRC_SEL_SHIFT,
+	GMAC_SRC_SEL_M0		= 0,
+	GMAC_SRC_SEL_M1,
+};
+#endif
diff --git a/drivers/clk/rockchip/Makefile b/drivers/clk/rockchip/Makefile
index 80b5058c45..925c8a6211 100644
--- a/drivers/clk/rockchip/Makefile
+++ b/drivers/clk/rockchip/Makefile
@@ -18,3 +18,4 @@ obj-$(CONFIG_ROCKCHIP_RK3328) += clk_rk3328.o
 obj-$(CONFIG_ROCKCHIP_RK3368) += clk_rk3368.o
 obj-$(CONFIG_ROCKCHIP_RK3399) += clk_rk3399.o
 obj-$(CONFIG_ROCKCHIP_RV1108) += clk_rv1108.o
+obj-$(CONFIG_ROCKCHIP_RV1109) += clk_rv1109.o
diff --git a/drivers/clk/rockchip/clk_rv1109.c b/drivers/clk/rockchip/clk_rv1109.c
new file mode 100644
index 0000000000..6424b3db5b
--- /dev/null
+++ b/drivers/clk/rockchip/clk_rv1109.c
@@ -0,0 +1,1743 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ * Author: Finley Xiao <finley.xiao@rock-chips.com>
+ */
+
+#include <common.h>
+#include <bitfield.h>
+#include <clk-uclass.h>
+#include <dm.h>
+#include <errno.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rv1109.h>
+#include <asm/arch/grf_rv1109.h>
+#include <asm/arch/hardware.h>
+#include <asm/io.h>
+#include <dm/lists.h>
+#include <dt-bindings/clock/rv1109-cru.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define RV1109_CPUCLK_RATE(_rate, _aclk_div, _pclk_div)		\
+{								\
+	.rate	= _rate##U,					\
+	.aclk_div = _aclk_div,					\
+	.pclk_div = _pclk_div,					\
+}
+
+#define DIV_TO_RATE(input_rate, div)    ((input_rate) / ((div) + 1))
+
+static struct rockchip_cpu_rate_table rv1109_cpu_rates[] = {
+	RV1109_CPUCLK_RATE(1200000000, 1, 5),
+	RV1109_CPUCLK_RATE(1008000000, 1, 5),
+	RV1109_CPUCLK_RATE(816000000, 1, 3),
+	RV1109_CPUCLK_RATE(600000000, 1, 3),
+	RV1109_CPUCLK_RATE(408000000, 1, 1),
+};
+
+static struct rockchip_pll_rate_table rv1109_pll_rates[] = {
+	/* _mhz, _refdiv, _fbdiv, _postdiv1, _postdiv2, _dsmpd, _frac */
+	RK3036_PLL_RATE(1600000000, 3, 200, 1, 1, 1, 0),
+	RK3036_PLL_RATE(1200000000, 1, 50, 1, 1, 1, 0),
+	RK3036_PLL_RATE(1188000000, 2, 99, 1, 1, 1, 0),
+	RK3036_PLL_RATE(1100000000, 12, 550, 1, 1, 1, 0),
+	RK3036_PLL_RATE(1008000000, 1, 84, 2, 1, 1, 0),
+	RK3036_PLL_RATE(1000000000, 6, 500, 2, 1, 1, 0),
+	RK3036_PLL_RATE(816000000, 1, 68, 2, 1, 1, 0),
+	RK3036_PLL_RATE(800000000, 6, 400, 2, 1, 1, 0),
+	RK3036_PLL_RATE(600000000, 1, 75, 3, 1, 1, 0),
+	RK3036_PLL_RATE(594000000, 2, 99, 2, 1, 1, 0),
+	RK3036_PLL_RATE(500000000, 6, 250, 2, 1, 1, 0),
+	RK3036_PLL_RATE(200000000, 1, 200, 6, 4, 1, 0),
+	RK3036_PLL_RATE(100000000, 1, 150, 6, 6, 1, 0),
+	{ /* sentinel */ },
+};
+
+static struct rockchip_pll_clock rv1109_pll_clks[] = {
+	[APLL] = PLL(pll_rk3328, PLL_APLL, RV1109_PLL_CON(0),
+		     RV1109_MODE_CON, 0, 10, 0, rv1109_pll_rates),
+	[DPLL] = PLL(pll_rk3328, PLL_DPLL, RV1109_PLL_CON(8),
+		     RV1109_MODE_CON, 2, 10, 0, NULL),
+	[CPLL] = PLL(pll_rk3328, PLL_CPLL, RV1109_PLL_CON(16),
+		     RV1109_MODE_CON, 4, 10, 0, rv1109_pll_rates),
+	[HPLL] = PLL(pll_rk3328, PLL_HPLL, RV1109_PLL_CON(24),
+		     RV1109_MODE_CON, 6, 10, 0, rv1109_pll_rates),
+	[GPLL] = PLL(pll_rk3328, PLL_GPLL, RV1109_PMU_PLL_CON(0),
+		     RV1109_PMU_MODE, 0, 10, 0, rv1109_pll_rates),
+};
+
+#ifndef CONFIG_SPL_BUILD
+#define RV1109_CLK_DUMP(_id, _name, _iscru)	\
+{						\
+	.id = _id,				\
+	.name = _name,				\
+	.is_cru = _iscru,			\
+}
+
+static const struct rv1109_clk_info clks_dump[] = {
+	RV1109_CLK_DUMP(PLL_APLL, "apll", true),
+	RV1109_CLK_DUMP(PLL_DPLL, "dpll", true),
+	RV1109_CLK_DUMP(PLL_GPLL, "gpll", false),
+	RV1109_CLK_DUMP(PLL_CPLL, "cpll", true),
+	RV1109_CLK_DUMP(PLL_HPLL, "hpll", true),
+	RV1109_CLK_DUMP(ACLK_PDBUS, "aclk_pdbus", true),
+	RV1109_CLK_DUMP(HCLK_PDBUS, "hclk_pdbus", true),
+	RV1109_CLK_DUMP(PCLK_PDBUS, "pclk_pdbus", true),
+	RV1109_CLK_DUMP(ACLK_PDPHP, "aclk_pdphp", true),
+	RV1109_CLK_DUMP(HCLK_PDPHP, "hclk_pdphp", true),
+	RV1109_CLK_DUMP(HCLK_PDAUDIO, "hclk_pdaudio", true),
+	RV1109_CLK_DUMP(HCLK_PDCORE_NIU, "hclk_pdcore", true),
+	RV1109_CLK_DUMP(PCLK_PDPMU, "pclk_pdpmu", false),
+};
+#endif
+
+/*
+ *
+ * rational_best_approximation(31415, 10000,
+ *		(1 << 8) - 1, (1 << 5) - 1, &n, &d);
+ *
+ * you may look at given_numerator as a fixed point number,
+ * with the fractional part size described in given_denominator.
+ *
+ * for theoretical background, see:
+ * http://en.wikipedia.org/wiki/Continued_fraction
+ */
+static void rational_best_approximation(unsigned long given_numerator,
+					unsigned long given_denominator,
+					unsigned long max_numerator,
+					unsigned long max_denominator,
+					unsigned long *best_numerator,
+					unsigned long *best_denominator)
+{
+	unsigned long n, d, n0, d0, n1, d1;
+
+	n = given_numerator;
+	d = given_denominator;
+	n0 = 0;
+	d1 = 0;
+	n1 = 1;
+	d0 = 1;
+	for (;;) {
+		unsigned long t, a;
+
+		if (n1 > max_numerator || d1 > max_denominator) {
+			n1 = n0;
+			d1 = d0;
+			break;
+		}
+		if (d == 0)
+			break;
+		t = d;
+		a = n / d;
+		d = n % d;
+		n = t;
+		t = n0 + a * n1;
+		n0 = n1;
+		n1 = t;
+		t = d0 + a * d1;
+		d0 = d1;
+		d1 = t;
+	}
+	*best_numerator = n1;
+	*best_denominator = d1;
+}
+
+static ulong rv1109_gpll_get_pmuclk(struct rv1109_pmuclk_priv *priv)
+{
+	return rockchip_pll_get_rate(&rv1109_pll_clks[GPLL],
+				     priv->pmucru, GPLL);
+}
+
+static ulong rv1109_gpll_set_pmuclk(struct rv1109_pmuclk_priv *priv, ulong rate)
+{
+	int ret;
+
+	/*
+	 * the child div is big enough for gpll 1188MHz,
+	 * even maskrom has change some clocks.
+	 */
+	ret = rockchip_pll_set_rate(&rv1109_pll_clks[GPLL],
+				    priv->pmucru, GPLL, rate);
+	if (!ret)
+		priv->gpll_hz = rate;
+
+	return ret;
+}
+
+static ulong rv1109_rtc32k_get_pmuclk(struct rv1109_pmuclk_priv *priv)
+{
+	struct rv1109_pmucru *pmucru = priv->pmucru;
+	unsigned long m, n;
+	u32 fracdiv;
+
+	fracdiv = readl(&pmucru->pmu_clksel_con[13]);
+	m = fracdiv & CLK_RTC32K_FRAC_NUMERATOR_MASK;
+	m >>= CLK_RTC32K_FRAC_NUMERATOR_SHIFT;
+	n = fracdiv & CLK_RTC32K_FRAC_DENOMINATOR_MASK;
+	n >>= CLK_RTC32K_FRAC_DENOMINATOR_SHIFT;
+
+	return OSC_HZ * m / n;
+}
+
+static ulong rv1109_rtc32k_set_pmuclk(struct rv1109_pmuclk_priv *priv,
+				      ulong rate)
+{
+	struct rv1109_pmucru *pmucru = priv->pmucru;
+	unsigned long m, n, val;
+
+	rational_best_approximation(rate, OSC_HZ,
+				    GENMASK(16 - 1, 0),
+				    GENMASK(16 - 1, 0),
+				    &m, &n);
+	val = m << CLK_RTC32K_FRAC_NUMERATOR_SHIFT | n;
+	writel(val, &pmucru->pmu_clksel_con[13]);
+
+	return rv1109_rtc32k_get_pmuclk(priv);
+}
+
+static ulong rv1109_i2c_get_pmuclk(struct rv1109_pmuclk_priv *priv,
+				   ulong clk_id)
+{
+	struct rv1109_pmucru *pmucru = priv->pmucru;
+	u32 div, con;
+
+	switch (clk_id) {
+	case CLK_I2C0:
+		con = readl(&pmucru->pmu_clksel_con[2]);
+		div = (con & CLK_I2C0_DIV_MASK) >> CLK_I2C0_DIV_SHIFT;
+		break;
+	case CLK_I2C2:
+		con = readl(&pmucru->pmu_clksel_con[3]);
+		div = (con & CLK_I2C1_DIV_MASK) >> CLK_I2C1_DIV_SHIFT;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(priv->gpll_hz, div);
+}
+
+static ulong rv1109_i2c_set_pmuclk(struct rv1109_pmuclk_priv *priv,
+				   ulong clk_id, ulong rate)
+{
+	struct rv1109_pmucru *pmucru = priv->pmucru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);
+	assert(src_clk_div - 1 <= 127);
+
+	switch (clk_id) {
+	case CLK_I2C0:
+		rk_clrsetreg(&pmucru->pmu_clksel_con[2], CLK_I2C0_DIV_MASK,
+			     (src_clk_div - 1) << CLK_I2C0_DIV_SHIFT);
+		break;
+	case CLK_I2C2:
+		rk_clrsetreg(&pmucru->pmu_clksel_con[3], CLK_I2C2_DIV_MASK,
+			     (src_clk_div - 1) << CLK_I2C2_DIV_SHIFT);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return rv1109_i2c_get_pmuclk(priv, clk_id);
+}
+
+static ulong rv1109_pwm_get_pmuclk(struct rv1109_pmuclk_priv *priv,
+				   ulong clk_id)
+{
+	struct rv1109_pmucru *pmucru = priv->pmucru;
+	u32 div, sel, con;
+
+	switch (clk_id) {
+	case CLK_PWM0:
+		con = readl(&pmucru->pmu_clksel_con[6]);
+		sel = (con & CLK_PWM0_SEL_MASK) >> CLK_PWM0_SEL_SHIFT;
+		div = (con & CLK_PWM0_DIV_MASK) >> CLK_PWM0_DIV_SHIFT;
+		if (sel == CLK_PWM0_SEL_XIN24M)
+			return OSC_HZ;
+		break;
+	case CLK_PWM1:
+		con = readl(&pmucru->pmu_clksel_con[6]);
+		sel = (con & CLK_PWM1_SEL_MASK) >> CLK_PWM1_SEL_SHIFT;
+		div = (con & CLK_PWM1_DIV_MASK) >> CLK_PWM1_DIV_SHIFT;
+		if (sel == CLK_PWM1_SEL_XIN24M)
+			return OSC_HZ;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(priv->gpll_hz, div);
+}
+
+static ulong rv1109_pwm_set_pmuclk(struct rv1109_pmuclk_priv *priv,
+				   ulong clk_id, ulong rate)
+{
+	struct rv1109_pmucru *pmucru = priv->pmucru;
+	int src_clk_div;
+
+	switch (clk_id) {
+	case CLK_PWM0:
+		if (rate == OSC_HZ) {
+			rk_clrsetreg(&pmucru->pmu_clksel_con[6],
+				     CLK_PWM0_SEL_MASK,
+				     CLK_PWM0_SEL_XIN24M << CLK_PWM0_SEL_SHIFT);
+			rk_clrsetreg(&pmucru->pmu_clksel_con[6],
+				     CLK_PWM0_DIV_MASK, 0);
+		} else {
+			src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);
+			assert(src_clk_div - 1 <= 127);
+			rk_clrsetreg(&pmucru->pmu_clksel_con[6],
+				     CLK_PWM0_DIV_MASK,
+				     (src_clk_div - 1) << CLK_PWM0_DIV_SHIFT);
+			rk_clrsetreg(&pmucru->pmu_clksel_con[6],
+				     CLK_PWM0_SEL_MASK,
+				     CLK_PWM0_SEL_GPLL << CLK_PWM0_SEL_SHIFT);
+		}
+		break;
+	case CLK_PWM1:
+		if (rate == OSC_HZ) {
+			rk_clrsetreg(&pmucru->pmu_clksel_con[6],
+				     CLK_PWM1_SEL_MASK,
+				     CLK_PWM1_SEL_XIN24M << CLK_PWM1_SEL_SHIFT);
+			rk_clrsetreg(&pmucru->pmu_clksel_con[6],
+				     CLK_PWM1_DIV_MASK, 0);
+		} else {
+			src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);
+			assert(src_clk_div - 1 <= 127);
+			rk_clrsetreg(&pmucru->pmu_clksel_con[6],
+				     CLK_PWM1_DIV_MASK,
+				     (src_clk_div - 1) << CLK_PWM1_DIV_SHIFT);
+			rk_clrsetreg(&pmucru->pmu_clksel_con[6],
+				     CLK_PWM1_SEL_MASK,
+				     CLK_PWM1_SEL_GPLL << CLK_PWM1_SEL_SHIFT);
+		}
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return rv1109_pwm_get_pmuclk(priv, clk_id);
+}
+
+static ulong rv1109_spi_get_pmuclk(struct rv1109_pmuclk_priv *priv)
+{
+	struct rv1109_pmucru *pmucru = priv->pmucru;
+	u32 div, con;
+
+	con = readl(&pmucru->pmu_clksel_con[9]);
+	div = (con & CLK_SPI0_DIV_MASK) >> CLK_SPI0_DIV_SHIFT;
+
+	return DIV_TO_RATE(priv->gpll_hz, div);
+}
+
+static ulong rv1109_spi_set_pmuclk(struct rv1109_pmuclk_priv *priv,
+				   ulong rate)
+{
+	struct rv1109_pmucru *pmucru = priv->pmucru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);
+	assert(src_clk_div - 1 <= 127);
+
+	rk_clrsetreg(&pmucru->pmu_clksel_con[9],
+		     CLK_SPI0_SEL_MASK | CLK_SPI0_DIV_MASK,
+		     CLK_SPI0_SEL_GPLL << CLK_SPI0_SEL_SHIFT |
+		     (src_clk_div - 1) << CLK_SPI0_DIV_SHIFT);
+
+	return rv1109_spi_get_pmuclk(priv);
+}
+
+static ulong rv1109_pdpmu_get_pmuclk(struct rv1109_pmuclk_priv *priv)
+{
+	struct rv1109_pmucru *pmucru = priv->pmucru;
+	u32 div, con;
+
+	con = readl(&pmucru->pmu_clksel_con[1]);
+	div = (con & PCLK_PDPMU_DIV_MASK) >> PCLK_PDPMU_DIV_SHIFT;
+
+	return DIV_TO_RATE(priv->gpll_hz, div);
+}
+
+static ulong rv1109_pdpmu_set_pmuclk(struct rv1109_pmuclk_priv *priv,
+				     ulong rate)
+{
+	struct rv1109_pmucru *pmucru = priv->pmucru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);
+	assert(src_clk_div - 1 <= 31);
+
+	rk_clrsetreg(&pmucru->pmu_clksel_con[1],
+		     PCLK_PDPMU_DIV_MASK,
+		     (src_clk_div - 1) << PCLK_PDPMU_DIV_SHIFT);
+
+	return rv1109_pdpmu_get_pmuclk(priv);
+}
+
+static ulong rv1109_pmuclk_get_rate(struct clk *clk)
+{
+	struct rv1109_pmuclk_priv *priv = dev_get_priv(clk->dev);
+	ulong rate = 0;
+
+	if (!priv->gpll_hz) {
+		printf("%s gpll=%lu\n", __func__, priv->gpll_hz);
+		return -ENOENT;
+	}
+
+	debug("%s %ld\n", __func__, clk->id);
+	switch (clk->id) {
+	case PLL_GPLL:
+		rate = rv1109_gpll_get_pmuclk(priv);
+		break;
+	case CLK_RTC32K:
+		rate = rv1109_rtc32k_get_pmuclk(priv);
+		break;
+	case CLK_I2C0:
+	case CLK_I2C2:
+		rate = rv1109_i2c_get_pmuclk(priv, clk->id);
+		break;
+	case CLK_PWM0:
+	case CLK_PWM1:
+		rate = rv1109_pwm_get_pmuclk(priv, clk->id);
+		break;
+	case CLK_SPI0:
+		rate = rv1109_spi_get_pmuclk(priv);
+		break;
+	case PCLK_PDPMU:
+		rate = rv1109_pdpmu_get_pmuclk(priv);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return rate;
+}
+
+static ulong rv1109_pmuclk_set_rate(struct clk *clk, ulong rate)
+{
+	struct rv1109_pmuclk_priv *priv = dev_get_priv(clk->dev);
+	ulong ret = 0;
+
+	if (!priv->gpll_hz) {
+		printf("%s gpll=%lu\n", __func__, priv->gpll_hz);
+		return -ENOENT;
+	}
+
+	debug("%s %ld %ld\n", __func__, clk->id, rate);
+	switch (clk->id) {
+	case PLL_GPLL:
+		ret = rv1109_gpll_set_pmuclk(priv, rate);
+		break;
+	case CLK_RTC32K:
+		ret = rv1109_rtc32k_set_pmuclk(priv, rate);
+		break;
+	case CLK_I2C0:
+	case CLK_I2C2:
+		ret = rv1109_i2c_set_pmuclk(priv, clk->id, rate);
+		break;
+	case CLK_PWM0:
+	case CLK_PWM1:
+		ret = rv1109_pwm_set_pmuclk(priv, clk->id, rate);
+		break;
+	case CLK_SPI0:
+		ret = rv1109_spi_set_pmuclk(priv, rate);
+		break;
+	case PCLK_PDPMU:
+		ret = rv1109_pdpmu_set_pmuclk(priv, rate);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+}
+
+static int rv1109_rtc32k_set_parent(struct clk *clk, struct clk *parent)
+{
+	struct rv1109_pmuclk_priv *priv = dev_get_priv(clk->dev);
+	struct rv1109_pmucru *pmucru = priv->pmucru;
+
+	if (parent->id == CLK_OSC0_DIV32K)
+		rk_clrsetreg(&pmucru->pmu_clksel_con[0], RTC32K_SEL_MASK,
+			     RTC32K_SEL_OSC0_DIV32K << RTC32K_SEL_SHIFT);
+	else
+		rk_clrsetreg(&pmucru->pmu_clksel_con[0], RTC32K_SEL_MASK,
+			     RTC32K_SEL_OSC1_32K << RTC32K_SEL_SHIFT);
+
+	return 0;
+}
+
+static int rv1109_pmuclk_set_parent(struct clk *clk, struct clk *parent)
+{
+	switch (clk->id) {
+	case CLK_RTC32K:
+		return rv1109_rtc32k_set_parent(clk, parent);
+	default:
+		return -ENOENT;
+	}
+}
+static struct clk_ops rv1109_pmuclk_ops = {
+	.get_rate = rv1109_pmuclk_get_rate,
+	.set_rate = rv1109_pmuclk_set_rate,
+	.set_parent = rv1109_pmuclk_set_parent,
+};
+
+static int rv1109_pmuclk_probe(struct udevice *dev)
+{
+	struct rv1109_pmuclk_priv *priv = dev_get_priv(dev);
+
+	priv->gpll_hz =	rv1109_gpll_get_pmuclk(priv);
+
+	return 0;
+}
+
+static int rv1109_pmuclk_ofdata_to_platdata(struct udevice *dev)
+{
+	struct rv1109_pmuclk_priv *priv = dev_get_priv(dev);
+
+	priv->pmucru = dev_read_addr_ptr(dev);
+
+	return 0;
+}
+
+static int rv1109_pmuclk_bind(struct udevice *dev)
+{
+	int ret = 0;
+	struct udevice *sf_child;
+	struct softreset_reg *sf_priv;
+
+	ret = device_bind_driver_to_node(dev, "rockchip_reset",
+					 "reset", dev_ofnode(dev),
+					 &sf_child);
+	if (ret) {
+		debug("Warning: No rockchip reset driver: ret=%d\n", ret);
+	} else {
+		sf_priv = malloc(sizeof(struct softreset_reg));
+		sf_priv->sf_reset_offset = offsetof(struct rv1109_pmucru,
+						    pmu_softrst_con[0]);
+		sf_priv->sf_reset_num = 2;
+		sf_child->priv = sf_priv;
+	}
+
+	return 0;
+}
+
+static const struct udevice_id rv1109_pmuclk_ids[] = {
+	{ .compatible = "rockchip,rv1109-pmucru" },
+	{ }
+};
+
+U_BOOT_DRIVER(rockchip_rv1109_pmucru) = {
+	.name		= "rockchip_rv1109_pmucru",
+	.id		= UCLASS_CLK,
+	.of_match	= rv1109_pmuclk_ids,
+	.priv_auto_alloc_size = sizeof(struct rv1109_pmuclk_priv),
+	.ofdata_to_platdata = rv1109_pmuclk_ofdata_to_platdata,
+	.ops		= &rv1109_pmuclk_ops,
+	.bind		= rv1109_pmuclk_bind,
+	.probe		= rv1109_pmuclk_probe,
+};
+
+
+static int rv1109_armclk_set_clk(struct rv1109_clk_priv *priv, ulong hz)
+{
+	struct rv1109_cru *cru = priv->cru;
+	const struct rockchip_cpu_rate_table *rate;
+	ulong old_rate;
+
+	rate = rockchip_get_cpu_settings(rv1109_cpu_rates, hz);
+	if (!rate) {
+		printf("%s unsupported rate\n", __func__);
+		return -EINVAL;
+	}
+
+	/*
+	 * set up dependent divisors for DBG and ACLK clocks.
+	 */
+	old_rate = rockchip_pll_get_rate(&rv1109_pll_clks[APLL],
+					 priv->cru, APLL);
+	if (old_rate > hz) {
+		if (rockchip_pll_set_rate(&rv1109_pll_clks[APLL],
+					  priv->cru, APLL, hz))
+			return -EINVAL;
+		rk_clrsetreg(&cru->clksel_con[1],
+			     CORE_DBG_DIV_MASK | CORE_ACLK_DIV_MASK,
+			     rate->pclk_div << CORE_DBG_DIV_SHIFT |
+			     rate->aclk_div << CORE_ACLK_DIV_SHIFT);
+	} else if (old_rate < hz) {
+		rk_clrsetreg(&cru->clksel_con[1],
+			     CORE_DBG_DIV_MASK | CORE_ACLK_DIV_MASK,
+			     rate->pclk_div << CORE_DBG_DIV_SHIFT |
+			     rate->aclk_div << CORE_ACLK_DIV_SHIFT);
+		if (rockchip_pll_set_rate(&rv1109_pll_clks[APLL],
+					  priv->cru, APLL, hz))
+			return -EINVAL;
+	}
+
+	return 0;
+}
+
+static ulong rv1109_pdcore_get_clk(struct rv1109_clk_priv *priv)
+{
+	struct rv1109_cru *cru = priv->cru;
+	u32 con, div;
+
+	con = readl(&cru->clksel_con[0]);
+	div = (con & CORE_HCLK_DIV_MASK) >> CORE_HCLK_DIV_SHIFT;
+
+	return DIV_TO_RATE(priv->gpll_hz, div);
+}
+
+static ulong rv1109_pdcore_set_clk(struct rv1109_clk_priv *priv, ulong rate)
+{
+	struct rv1109_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->cpll_hz, rate);
+	assert(src_clk_div - 1 <= 31);
+
+	rk_clrsetreg(&cru->clksel_con[0], CORE_HCLK_DIV_MASK,
+		     (src_clk_div - 1) << CORE_HCLK_DIV_SHIFT);
+
+	return rv1109_pdcore_get_clk(priv);
+}
+
+static ulong rv1109_pdbus_get_clk(struct rv1109_clk_priv *priv, ulong clk_id)
+{
+	struct rv1109_cru *cru = priv->cru;
+	u32 con, div, sel, parent;
+
+	switch (clk_id) {
+	case ACLK_PDBUS:
+		con = readl(&cru->clksel_con[2]);
+		div = (con & ACLK_PDBUS_DIV_MASK) >> ACLK_PDBUS_DIV_SHIFT;
+		sel = (con & ACLK_PDBUS_SEL_MASK) >> ACLK_PDBUS_SEL_SHIFT;
+		if (sel == ACLK_PDBUS_SEL_GPLL)
+			parent = priv->gpll_hz;
+		else if (sel == ACLK_PDBUS_SEL_CPLL)
+			parent = priv->cpll_hz;
+		else
+			return -ENOENT;
+		break;
+	case HCLK_PDBUS:
+		con = readl(&cru->clksel_con[2]);
+		div = (con & HCLK_PDBUS_DIV_MASK) >> HCLK_PDBUS_DIV_SHIFT;
+		parent = priv->gpll_hz;
+		break;
+	case PCLK_PDBUS:
+		con = readl(&cru->clksel_con[3]);
+		div = (con & PCLK_PDBUS_DIV_MASK) >> PCLK_PDBUS_DIV_SHIFT;
+		parent = priv->gpll_hz;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rv1109_pdbus_set_clk(struct rv1109_clk_priv *priv, ulong clk_id,
+				  ulong rate)
+{
+	struct rv1109_cru *cru = priv->cru;
+	int src_clk_div;
+
+	switch (clk_id) {
+	case ACLK_PDBUS:
+		src_clk_div = DIV_ROUND_UP(priv->cpll_hz, rate);
+		assert(src_clk_div - 1 <= 31);
+		rk_clrsetreg(&cru->clksel_con[2],
+			     ACLK_PDBUS_SEL_MASK | ACLK_PDBUS_DIV_MASK,
+			     ACLK_PDBUS_SEL_CPLL << ACLK_PDBUS_SEL_SHIFT |
+			     (src_clk_div - 1) << ACLK_PDBUS_DIV_SHIFT);
+		break;
+	case HCLK_PDBUS:
+		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);
+		assert(src_clk_div - 1 <= 31);
+		rk_clrsetreg(&cru->clksel_con[2],
+			     HCLK_PDBUS_SEL_MASK | HCLK_PDBUS_DIV_MASK,
+			     HCLK_PDBUS_SEL_GPLL << HCLK_PDBUS_SEL_SHIFT |
+			     (src_clk_div - 1) << HCLK_PDBUS_DIV_SHIFT);
+		break;
+	case PCLK_PDBUS:
+		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);
+		assert(src_clk_div - 1 <= 31);
+		rk_clrsetreg(&cru->clksel_con[3],
+			     PCLK_PDBUS_SEL_MASK | PCLK_PDBUS_DIV_MASK,
+			     PCLK_PDBUS_SEL_GPLL << PCLK_PDBUS_SEL_SHIFT |
+			     (src_clk_div - 1) << PCLK_PDBUS_DIV_SHIFT);
+		break;
+
+	default:
+		printf("do not support this pdbus freq\n");
+		return -EINVAL;
+	}
+
+	return rv1109_pdbus_get_clk(priv, clk_id);
+}
+
+static ulong rv1109_pdphp_get_clk(struct rv1109_clk_priv *priv, ulong clk_id)
+{
+	struct rv1109_cru *cru = priv->cru;
+	u32 con, div, parent;
+
+	switch (clk_id) {
+	case ACLK_PDPHP:
+		con = readl(&cru->clksel_con[53]);
+		div = (con & ACLK_PDPHP_DIV_MASK) >> ACLK_PDPHP_DIV_SHIFT;
+		parent = priv->gpll_hz;
+		break;
+	case HCLK_PDPHP:
+		con = readl(&cru->clksel_con[53]);
+		div = (con & HCLK_PDPHP_DIV_MASK) >> HCLK_PDPHP_DIV_SHIFT;
+		parent = priv->gpll_hz;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rv1109_pdphp_set_clk(struct rv1109_clk_priv *priv, ulong clk_id,
+				  ulong rate)
+{
+	struct rv1109_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->cpll_hz, rate);
+	assert(src_clk_div - 1 <= 31);
+
+	switch (clk_id) {
+	case ACLK_PDPHP:
+		rk_clrsetreg(&cru->clksel_con[53],
+			     ACLK_PDPHP_SEL_MASK | ACLK_PDPHP_DIV_MASK,
+			     ACLK_PDPHP_SEL_GPLL << ACLK_PDPHP_SEL_SHIFT |
+			     (src_clk_div - 1) << ACLK_PDPHP_DIV_SHIFT);
+		break;
+	case HCLK_PDPHP:
+		rk_clrsetreg(&cru->clksel_con[53],
+			     HCLK_PDPHP_DIV_MASK,
+			     (src_clk_div - 1) << HCLK_PDBUS_DIV_SHIFT);
+		break;
+	default:
+		printf("do not support this pdphp freq\n");
+		return -EINVAL;
+	}
+
+	return rv1109_pdphp_get_clk(priv, clk_id);
+}
+
+static ulong rv1109_pdaudio_get_clk(struct rv1109_clk_priv *priv)
+{
+	struct rv1109_cru *cru = priv->cru;
+	u32 con, div;
+
+	con = readl(&cru->clksel_con[26]);
+	div = (con & HCLK_PDAUDIO_DIV_MASK) >> HCLK_PDAUDIO_DIV_SHIFT;
+
+	return DIV_TO_RATE(priv->gpll_hz, div);
+}
+
+static ulong rv1109_pdaudio_set_clk(struct rv1109_clk_priv *priv, ulong rate)
+{
+	struct rv1109_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->cpll_hz, rate);
+	assert(src_clk_div - 1 <= 31);
+
+	rk_clrsetreg(&cru->clksel_con[26], HCLK_PDAUDIO_DIV_MASK,
+		     (src_clk_div - 1) << HCLK_PDAUDIO_DIV_SHIFT);
+
+	return rv1109_pdaudio_get_clk(priv);
+}
+
+static ulong rv1109_i2c_get_clk(struct rv1109_clk_priv *priv, ulong clk_id)
+{
+	struct rv1109_cru *cru = priv->cru;
+	u32 div, con;
+
+	switch (clk_id) {
+	case CLK_I2C1:
+		con = readl(&cru->clksel_con[5]);
+		div = (con & CLK_I2C1_DIV_MASK) >> CLK_I2C1_DIV_SHIFT;
+		break;
+	case CLK_I2C3:
+		con = readl(&cru->clksel_con[5]);
+		div = (con & CLK_I2C3_DIV_MASK) >> CLK_I2C3_DIV_SHIFT;
+		break;
+	case CLK_I2C4:
+		con = readl(&cru->clksel_con[6]);
+		div = (con & CLK_I2C4_DIV_MASK) >> CLK_I2C4_DIV_SHIFT;
+		break;
+	case CLK_I2C5:
+		con = readl(&cru->clksel_con[6]);
+		div = (con & CLK_I2C5_DIV_MASK) >> CLK_I2C5_DIV_SHIFT;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(priv->gpll_hz, div);
+}
+
+static ulong rv1109_i2c_set_clk(struct rv1109_clk_priv *priv, ulong clk_id,
+				ulong rate)
+{
+	struct rv1109_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);
+	assert(src_clk_div - 1 <= 127);
+
+	switch (clk_id) {
+	case CLK_I2C1:
+		rk_clrsetreg(&cru->clksel_con[5], CLK_I2C1_DIV_MASK,
+			     (src_clk_div - 1) << CLK_I2C1_DIV_SHIFT);
+		break;
+	case CLK_I2C3:
+		rk_clrsetreg(&cru->clksel_con[5], CLK_I2C3_DIV_MASK,
+			     (src_clk_div - 1) << CLK_I2C3_DIV_SHIFT);
+		break;
+	case CLK_I2C4:
+		rk_clrsetreg(&cru->clksel_con[6], CLK_I2C4_DIV_MASK,
+			     (src_clk_div - 1) << CLK_I2C4_DIV_SHIFT);
+		break;
+	case CLK_I2C5:
+		rk_clrsetreg(&cru->clksel_con[6], CLK_I2C5_DIV_MASK,
+			     (src_clk_div - 1) << CLK_I2C5_DIV_SHIFT);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return rv1109_i2c_get_clk(priv, clk_id);
+}
+
+static ulong rv1109_spi_get_clk(struct rv1109_clk_priv *priv)
+{
+	struct rv1109_cru *cru = priv->cru;
+	u32 div, con;
+
+	con = readl(&cru->clksel_con[8]);
+	div = (con & CLK_SPI1_DIV_MASK) >> CLK_SPI1_DIV_SHIFT;
+
+	return DIV_TO_RATE(priv->gpll_hz, div);
+}
+
+static ulong rv1109_spi_set_clk(struct rv1109_clk_priv *priv, ulong rate)
+{
+	struct rv1109_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);
+	assert(src_clk_div - 1 <= 127);
+
+	rk_clrsetreg(&cru->clksel_con[8],
+		     CLK_SPI1_SEL_MASK | CLK_SPI1_DIV_MASK,
+		     CLK_SPI1_SEL_GPLL << CLK_SPI1_SEL_SHIFT |
+		     (src_clk_div - 1) << CLK_SPI1_DIV_SHIFT);
+
+	return rv1109_spi_get_clk(priv);
+}
+
+static ulong rv1109_pwm_get_clk(struct rv1109_clk_priv *priv)
+{
+	struct rv1109_cru *cru = priv->cru;
+	u32 div, sel, con;
+
+	con = readl(&cru->clksel_con[9]);
+	sel = (con & CLK_PWM2_SEL_MASK) >> CLK_PWM2_SEL_SHIFT;
+	div = (con & CLK_PWM2_DIV_MASK) >> CLK_PWM2_DIV_SHIFT;
+	if (sel == CLK_PWM2_SEL_XIN24M)
+		return OSC_HZ;
+
+	return DIV_TO_RATE(priv->gpll_hz, div);
+}
+
+static ulong rv1109_pwm_set_clk(struct rv1109_clk_priv *priv, ulong rate)
+{
+	struct rv1109_cru *cru = priv->cru;
+	int src_clk_div;
+
+	if (rate == OSC_HZ) {
+		rk_clrsetreg(&cru->clksel_con[9], CLK_PWM2_SEL_MASK,
+			     CLK_PWM2_SEL_XIN24M << CLK_PWM2_SEL_SHIFT);
+		rk_clrsetreg(&cru->clksel_con[9], CLK_PWM2_DIV_MASK, 0);
+	} else {
+		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);
+		assert(src_clk_div - 1 <= 127);
+		rk_clrsetreg(&cru->clksel_con[9], CLK_PWM2_DIV_MASK,
+			     (src_clk_div - 1) << CLK_PWM2_DIV_SHIFT);
+		rk_clrsetreg(&cru->clksel_con[9], CLK_PWM2_SEL_MASK,
+			     CLK_PWM2_SEL_GPLL << CLK_PWM2_SEL_SHIFT);
+	}
+
+	return rv1109_pwm_get_clk(priv);
+}
+
+static ulong rv1109_saradc_get_clk(struct rv1109_clk_priv *priv)
+{
+	struct rv1109_cru *cru = priv->cru;
+	u32 div, con;
+
+	con = readl(&cru->clksel_con[20]);
+	div = (con & CLK_SARADC_DIV_MASK) >> CLK_SARADC_DIV_SHIFT;
+
+	return DIV_TO_RATE(OSC_HZ, div);
+}
+
+static ulong rv1109_saradc_set_clk(struct rv1109_clk_priv *priv, ulong rate)
+{
+	struct rv1109_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(OSC_HZ, rate);
+	assert(src_clk_div - 1 <= 2047);
+	rk_clrsetreg(&cru->clksel_con[20], CLK_SARADC_DIV_MASK,
+		     (src_clk_div - 1) << CLK_SARADC_DIV_SHIFT);
+
+	return rv1109_saradc_get_clk(priv);
+}
+
+static ulong rv1109_crypto_get_clk(struct rv1109_clk_priv *priv, ulong clk_id)
+{
+	struct rv1109_cru *cru = priv->cru;
+	u32 div, sel, con, parent;
+
+	switch (clk_id) {
+	case CLK_CRYPTO_CORE:
+		con = readl(&cru->clksel_con[7]);
+		div = (con & CLK_CRYPTO_CORE_DIV_MASK) >> CLK_CRYPTO_CORE_DIV_SHIFT;
+		sel = (con & CLK_CRYPTO_CORE_SEL_MASK) >> CLK_CRYPTO_CORE_SEL_SHIFT;
+		if (sel == CLK_CRYPTO_CORE_SEL_GPLL)
+			parent = priv->gpll_hz;
+		else if (sel == CLK_CRYPTO_CORE_SEL_CPLL)
+			parent = priv->cpll_hz;
+		else
+			return -ENOENT;
+		break;
+	case CLK_CRYPTO_PKA:
+		con = readl(&cru->clksel_con[7]);
+		div = (con & CLK_CRYPTO_PKA_DIV_MASK) >> CLK_CRYPTO_PKA_DIV_SHIFT;
+		sel = (con & CLK_CRYPTO_PKA_SEL_MASK) >> CLK_CRYPTO_PKA_SEL_SHIFT;
+		if (sel == CLK_CRYPTO_PKA_SEL_GPLL)
+			parent = priv->gpll_hz;
+		else if (sel == CLK_CRYPTO_PKA_SEL_CPLL)
+			parent = priv->cpll_hz;
+		else
+			return -ENOENT;
+		break;
+	case ACLK_CRYPTO:
+		con = readl(&cru->clksel_con[4]);
+		div = (con & ACLK_CRYPTO_DIV_MASK) >> ACLK_CRYPTO_DIV_SHIFT;
+		sel = (con & ACLK_CRYPTO_SEL_MASK) >> ACLK_CRYPTO_SEL_SHIFT;
+		if (sel == ACLK_CRYPTO_SEL_GPLL)
+			parent = priv->gpll_hz;
+		else if (sel == ACLK_CRYPTO_SEL_CPLL)
+			parent = priv->cpll_hz;
+		else
+			return -ENOENT;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rv1109_crypto_set_clk(struct rv1109_clk_priv *priv, ulong clk_id,
+				   ulong rate)
+{
+	struct rv1109_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);
+	assert(src_clk_div - 1 <= 31);
+
+	switch (clk_id) {
+	case CLK_CRYPTO_CORE:
+		rk_clrsetreg(&cru->clksel_con[7],
+			     CLK_CRYPTO_CORE_SEL_MASK |
+			     CLK_CRYPTO_CORE_DIV_MASK,
+			     CLK_CRYPTO_CORE_SEL_GPLL <<
+			     CLK_CRYPTO_CORE_SEL_SHIFT |
+			     (src_clk_div - 1) << CLK_CRYPTO_CORE_DIV_SHIFT);
+		break;
+	case CLK_CRYPTO_PKA:
+		rk_clrsetreg(&cru->clksel_con[7],
+			     CLK_CRYPTO_PKA_SEL_MASK |
+			     CLK_CRYPTO_PKA_DIV_MASK,
+			     CLK_CRYPTO_PKA_SEL_GPLL <<
+			     CLK_CRYPTO_PKA_SEL_SHIFT |
+			     (src_clk_div - 1) << CLK_CRYPTO_PKA_DIV_SHIFT);
+		break;
+	case ACLK_CRYPTO:
+		rk_clrsetreg(&cru->clksel_con[4],
+			     ACLK_CRYPTO_SEL_MASK | ACLK_CRYPTO_DIV_MASK,
+			     ACLK_CRYPTO_SEL_GPLL << ACLK_CRYPTO_SEL_SHIFT |
+			     (src_clk_div - 1) << ACLK_CRYPTO_DIV_SHIFT);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return rv1109_crypto_get_clk(priv, clk_id);
+}
+
+static ulong rv1109_mmc_get_clk(struct rv1109_clk_priv *priv, ulong clk_id)
+{
+	struct rv1109_cru *cru = priv->cru;
+	u32 div, sel, con, con_id;
+
+	switch (clk_id) {
+	case HCLK_SDMMC:
+	case CLK_SDMMC:
+		con_id = 55;
+		break;
+	case HCLK_SDIO:
+	case CLK_SDIO:
+		con_id = 56;
+		break;
+	case HCLK_EMMC:
+	case CLK_EMMC:
+	case SCLK_EMMC_SAMPLE:
+		con_id = 57;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	con = readl(&cru->clksel_con[con_id]);
+	div = (con & EMMC_DIV_MASK) >> EMMC_DIV_SHIFT;
+	sel = (con & EMMC_SEL_MASK) >> EMMC_SEL_SHIFT;
+	if (sel == EMMC_SEL_GPLL)
+		return DIV_TO_RATE(priv->gpll_hz, div) / 2;
+	else if (sel == EMMC_SEL_CPLL)
+		return DIV_TO_RATE(priv->cpll_hz, div) / 2;
+	else if (sel == EMMC_SEL_XIN24M)
+		return DIV_TO_RATE(OSC_HZ, div) / 2;
+
+	return -ENOENT;
+}
+
+static ulong rv1109_emmc_set_clk(struct rv1109_clk_priv *priv, ulong clk_id,
+				 ulong rate)
+{
+	struct rv1109_cru *cru = priv->cru;
+	int src_clk_div;
+	u32 con_id;
+
+	switch (clk_id) {
+	case HCLK_SDMMC:
+	case CLK_SDMMC:
+		con_id = 55;
+		break;
+	case HCLK_SDIO:
+	case CLK_SDIO:
+		con_id = 56;
+		break;
+	case HCLK_EMMC:
+	case CLK_EMMC:
+		con_id = 57;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	/* Select clk_sdmmc/emmc source from GPLL by default */
+	/* mmc clock defaulg div 2 internal, need provide double in cru */
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz / 2, rate);
+
+	if (src_clk_div > 127) {
+		/* use 24MHz source for 400KHz clock */
+		src_clk_div = DIV_ROUND_UP(OSC_HZ / 2, rate);
+		rk_clrsetreg(&cru->clksel_con[con_id],
+			     EMMC_SEL_MASK | EMMC_DIV_MASK,
+			     EMMC_SEL_XIN24M << EMMC_SEL_SHIFT |
+			     (src_clk_div - 1) << EMMC_DIV_SHIFT);
+	} else {
+		rk_clrsetreg(&cru->clksel_con[con_id],
+			     EMMC_SEL_MASK | EMMC_DIV_MASK,
+			     EMMC_SEL_GPLL << EMMC_SEL_SHIFT |
+			     (src_clk_div - 1) << EMMC_DIV_SHIFT);
+	}
+
+	return rv1109_mmc_get_clk(priv, clk_id);
+}
+
+static ulong rv1109_aclk_vop_get_clk(struct rv1109_clk_priv *priv)
+{
+	struct rv1109_cru *cru = priv->cru;
+	u32 div, sel, con, parent;
+
+	con = readl(&cru->clksel_con[45]);
+	div = (con & ACLK_PDVO_DIV_MASK) >> ACLK_PDVO_DIV_SHIFT;
+	sel = (con & ACLK_PDVO_SEL_MASK) >> ACLK_PDVO_SEL_SHIFT;
+	if (sel == ACLK_PDVO_SEL_GPLL)
+		parent = priv->gpll_hz;
+	else if (sel == ACLK_PDVO_SEL_CPLL)
+		parent = priv->cpll_hz;
+	else
+		return -ENOENT;
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rv1109_aclk_vop_set_clk(struct rv1109_clk_priv *priv, ulong rate)
+{
+	struct rv1109_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, rate);
+	assert(src_clk_div - 1 <= 31);
+	rk_clrsetreg(&cru->clksel_con[45],
+		     ACLK_PDVO_SEL_MASK | ACLK_PDVO_DIV_MASK,
+		     ACLK_PDVO_SEL_GPLL << ACLK_PDVO_SEL_SHIFT |
+		     (src_clk_div - 1) << ACLK_PDVO_DIV_SHIFT);
+
+	return rv1109_aclk_vop_get_clk(priv);
+}
+
+static ulong rv1109_dclk_vop_get_clk(struct rv1109_clk_priv *priv)
+{
+	struct rv1109_cru *cru = priv->cru;
+	u32 div, sel, con, parent;
+
+	con = readl(&cru->clksel_con[47]);
+	div = (con & DCLK_VOP_DIV_MASK) >> DCLK_VOP_DIV_SHIFT;
+	sel = (con & DCLK_VOP_SEL_MASK) >> DCLK_VOP_SEL_SHIFT;
+	if (sel == DCLK_VOP_SEL_GPLL)
+		parent = priv->gpll_hz;
+	else if (sel == DCLK_VOP_SEL_CPLL)
+		parent = priv->cpll_hz;
+	else
+		return -ENOENT;
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rv1109_dclk_vop_set_clk(struct rv1109_clk_priv *priv, ulong rate)
+{
+	struct rv1109_cru *cru = priv->cru;
+	ulong pll_rate, now, best_rate = 0;
+	u32 i, div, best_div = 0, best_sel = 0;
+
+	for (i = 0; i <= DCLK_VOP_SEL_CPLL; i++) {
+		switch (i) {
+		case DCLK_VOP_SEL_GPLL:
+			pll_rate = priv->gpll_hz;
+			break;
+		case DCLK_VOP_SEL_CPLL:
+			pll_rate = priv->cpll_hz;
+			break;
+		default:
+			printf("do not support this vop pll sel\n");
+			return -EINVAL;
+		}
+
+		div = DIV_ROUND_UP(pll_rate, rate);
+		if (div > 255)
+			continue;
+		now = pll_rate / div;
+		if (abs(rate - now) < abs(rate - best_rate)) {
+			best_rate = now;
+			best_div = div;
+			best_sel = i;
+		}
+		debug("pll_rate=%lu, best_rate=%lu, best_div=%u, best_sel=%u\n",
+		      pll_rate, best_rate, best_div, best_sel);
+	}
+
+	if (best_rate) {
+		rk_clrsetreg(&cru->clksel_con[47],
+			     DCLK_VOP_SEL_MASK | DCLK_VOP_DIV_MASK,
+			     best_sel << DCLK_VOP_SEL_SHIFT |
+			     (best_div - 1) << DCLK_VOP_DIV_SHIFT);
+	} else {
+		printf("do not support this vop freq %lu\n", rate);
+		return -EINVAL;
+	}
+
+
+	return rv1109_dclk_vop_get_clk(priv);
+}
+
+static ulong rv1109_clk_get_rate(struct clk *clk)
+{
+	struct rv1109_clk_priv *priv = dev_get_priv(clk->dev);
+	ulong rate = 0;
+
+	if (!priv->gpll_hz) {
+		printf("%s gpll=%lu\n", __func__, priv->gpll_hz);
+		return -ENOENT;
+	}
+
+	switch (clk->id) {
+	case PLL_APLL:
+	case ARMCLK:
+		rate = rockchip_pll_get_rate(&rv1109_pll_clks[APLL], priv->cru,
+					     APLL);
+		break;
+	case PLL_CPLL:
+		rate = rockchip_pll_get_rate(&rv1109_pll_clks[CPLL], priv->cru,
+					     CPLL);
+		break;
+	case HCLK_PDCORE_NIU:
+		rate = rv1109_pdcore_get_clk(priv);
+		break;
+	case ACLK_PDBUS:
+	case HCLK_PDBUS:
+	case PCLK_PDBUS:
+		rate = rv1109_pdbus_get_clk(priv, clk->id);
+		break;
+	case ACLK_PDPHP:
+	case HCLK_PDPHP:
+		rate = rv1109_pdphp_get_clk(priv, clk->id);
+		break;
+	case HCLK_PDAUDIO:
+		rate = rv1109_pdaudio_get_clk(priv);
+		break;
+	case CLK_I2C1:
+	case CLK_I2C3:
+	case CLK_I2C4:
+	case CLK_I2C5:
+		rate = rv1109_i2c_get_clk(priv, clk->id);
+		break;
+	case CLK_SPI1:
+		rate = rv1109_spi_get_clk(priv);
+		break;
+	case CLK_PWM2:
+		rate = rv1109_pwm_get_clk(priv);
+		break;
+	case CLK_SARADC:
+		rate = rv1109_saradc_get_clk(priv);
+		break;
+	case CLK_CRYPTO_CORE:
+	case CLK_CRYPTO_PKA:
+	case ACLK_CRYPTO:
+		rate = rv1109_crypto_get_clk(priv, clk->id);
+		break;
+	case CLK_SDMMC:
+	case HCLK_SDMMC:
+	case CLK_SDIO:
+	case HCLK_SDIO:
+	case CLK_EMMC:
+	case HCLK_EMMC:
+	case SCLK_EMMC_SAMPLE:
+		rate = rv1109_mmc_get_clk(priv, clk->id);
+		break;
+	case ACLK_PDVO:
+	case ACLK_VOP:
+		rate = rv1109_aclk_vop_get_clk(priv);
+		break;
+	case DCLK_VOP:
+		rate = rv1109_dclk_vop_get_clk(priv);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return rate;
+};
+
+static ulong rv1109_clk_set_rate(struct clk *clk, ulong rate)
+{
+	struct rv1109_clk_priv *priv = dev_get_priv(clk->dev);
+	ulong ret = 0;
+
+	if (!priv->gpll_hz) {
+		printf("%s gpll=%lu\n", __func__, priv->gpll_hz);
+		return -ENOENT;
+	}
+
+	switch (clk->id) {
+	case PLL_APLL:
+	case ARMCLK:
+		if (priv->armclk_hz)
+			rv1109_armclk_set_clk(priv, rate);
+		priv->armclk_hz = rate;
+		break;
+	case PLL_CPLL:
+		ret = rockchip_pll_set_rate(&rv1109_pll_clks[CPLL], priv->cru,
+					    CPLL, rate);
+		break;
+	case ACLK_PDBUS:
+	case HCLK_PDBUS:
+	case PCLK_PDBUS:
+		ret = rv1109_pdbus_set_clk(priv, clk->id, rate);
+		break;
+	case ACLK_PDPHP:
+	case HCLK_PDPHP:
+		ret = rv1109_pdphp_set_clk(priv, clk->id, rate);
+		break;
+	case HCLK_PDCORE_NIU:
+		ret = rv1109_pdcore_set_clk(priv, rate);
+		break;
+	case HCLK_PDAUDIO:
+		ret = rv1109_pdaudio_set_clk(priv, rate);
+		break;
+	case CLK_I2C1:
+	case CLK_I2C3:
+	case CLK_I2C4:
+	case CLK_I2C5:
+		ret = rv1109_i2c_set_clk(priv, clk->id, rate);
+		break;
+	case CLK_SPI1:
+		ret = rv1109_spi_set_clk(priv, rate);
+		break;
+	case CLK_PWM2:
+		ret = rv1109_pwm_set_clk(priv, rate);
+		break;
+	case CLK_SARADC:
+		ret = rv1109_saradc_set_clk(priv, rate);
+		break;
+	case CLK_CRYPTO_CORE:
+	case CLK_CRYPTO_PKA:
+	case ACLK_CRYPTO:
+		ret = rv1109_crypto_set_clk(priv, clk->id, rate);
+		break;
+	case CLK_SDMMC:
+	case HCLK_SDMMC:
+	case CLK_SDIO:
+	case HCLK_SDIO:
+	case CLK_EMMC:
+	case HCLK_EMMC:
+		ret = rv1109_emmc_set_clk(priv, clk->id, rate);
+		break;
+	case ACLK_PDVO:
+	case ACLK_VOP:
+		ret = rv1109_aclk_vop_set_clk(priv, rate);
+		break;
+	case DCLK_VOP:
+		ret = rv1109_dclk_vop_set_clk(priv, rate);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+};
+
+#define ROCKCHIP_MMC_DELAY_SEL		BIT(10)
+#define ROCKCHIP_MMC_DEGREE_MASK	0x3
+#define ROCKCHIP_MMC_DELAYNUM_OFFSET	2
+#define ROCKCHIP_MMC_DELAYNUM_MASK	(0xff << ROCKCHIP_MMC_DELAYNUM_OFFSET)
+
+#define PSECS_PER_SEC 1000000000000LL
+/*
+ * Each fine delay is between 44ps-77ps. Assume each fine delay is 60ps to
+ * simplify calculations. So 45degs could be anywhere between 33deg and 57.8deg.
+ */
+#define ROCKCHIP_MMC_DELAY_ELEMENT_PSEC 60
+
+int rv1109_mmc_get_phase(struct clk *clk)
+{
+	struct rv1109_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rv1109_cru *cru = priv->cru;
+	u32 raw_value, delay_num;
+	u16 degrees = 0;
+	ulong rate;
+
+	rate = rv1109_clk_get_rate(clk);
+	if (rate < 0)
+		return rate;
+
+	if (clk->id == SCLK_EMMC_SAMPLE)
+		raw_value = readl(&cru->emmc_con[1]);
+	else if (clk->id == SCLK_SDMMC_SAMPLE)
+		raw_value = readl(&cru->sdmmc_con[1]);
+	else
+		raw_value = readl(&cru->sdio_con[1]);
+
+	raw_value >>= 1;
+	degrees = (raw_value & ROCKCHIP_MMC_DEGREE_MASK) * 90;
+
+	if (raw_value & ROCKCHIP_MMC_DELAY_SEL) {
+		/* degrees/delaynum * 10000 */
+		unsigned long factor = (ROCKCHIP_MMC_DELAY_ELEMENT_PSEC / 10) *
+					36 * (rate / 1000000);
+
+		delay_num = (raw_value & ROCKCHIP_MMC_DELAYNUM_MASK);
+		delay_num >>= ROCKCHIP_MMC_DELAYNUM_OFFSET;
+		degrees += DIV_ROUND_CLOSEST(delay_num * factor, 10000);
+	}
+
+	return degrees % 360;
+}
+
+int rv1109_mmc_set_phase(struct clk *clk, u32 degrees)
+{
+	struct rv1109_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rv1109_cru *cru = priv->cru;
+	u8 nineties, remainder, delay_num;
+	u32 raw_value, delay;
+	ulong rate;
+
+	rate = rv1109_clk_get_rate(clk);
+	if (rate < 0)
+		return rate;
+
+	nineties = degrees / 90;
+	remainder = (degrees % 90);
+
+	/*
+	 * Convert to delay; do a little extra work to make sure we
+	 * don't overflow 32-bit / 64-bit numbers.
+	 */
+	delay = 10000000; /* PSECS_PER_SEC / 10000 / 10 */
+	delay *= remainder;
+	delay = DIV_ROUND_CLOSEST(delay, (rate / 1000) * 36 *
+				  (ROCKCHIP_MMC_DELAY_ELEMENT_PSEC / 10));
+
+	delay_num = (u8)min_t(u32, delay, 255);
+
+	raw_value = delay_num ? ROCKCHIP_MMC_DELAY_SEL : 0;
+	raw_value |= delay_num << ROCKCHIP_MMC_DELAYNUM_OFFSET;
+	raw_value |= nineties;
+
+	raw_value <<= 1;
+	if (clk->id == SCLK_EMMC_SAMPLE)
+		writel(raw_value | 0xffff0000, &cru->emmc_con[1]);
+	else if (clk->id == SCLK_SDMMC_SAMPLE)
+		writel(raw_value | 0xffff0000, &cru->sdmmc_con[1]);
+	else
+		writel(raw_value | 0xffff0000, &cru->sdio_con[1]);
+
+	debug("mmc set_phase(%d) delay_nums=%u reg=%#x actual_degrees=%d\n",
+	      degrees, delay_num, raw_value, rv1109_mmc_get_phase(clk));
+
+	return 0;
+}
+
+static int rv1109_clk_get_phase(struct clk *clk)
+{
+	int ret;
+
+	debug("%s %ld\n", __func__, clk->id);
+	switch (clk->id) {
+	case SCLK_EMMC_SAMPLE:
+	case SCLK_SDMMC_SAMPLE:
+	case SCLK_SDIO_SAMPLE:
+		ret = rv1109_mmc_get_phase(clk);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+}
+
+static int rv1109_clk_set_phase(struct clk *clk, int degrees)
+{
+	int ret;
+
+	debug("%s %ld\n", __func__, clk->id);
+	switch (clk->id) {
+	case SCLK_EMMC_SAMPLE:
+	case SCLK_SDMMC_SAMPLE:
+	case SCLK_SDIO_SAMPLE:
+		ret = rv1109_mmc_set_phase(clk, degrees);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+}
+
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+static int rv1109_gmac_src_set_parent(struct clk *clk, struct clk *parent)
+{
+	struct rv1109_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rv1109_grf *grf = priv->grf;
+
+	if (parent->id == CLK_GMAC_SRC_M0)
+		rk_clrsetreg(&grf->iofunc_con1, GMAC_SRC_SEL_MASK,
+			     GMAC_SRC_SEL_M0 << GMAC_SRC_SEL_SHIFT);
+	else if(parent->id == CLK_GMAC_SRC_M1)
+		rk_clrsetreg(&grf->iofunc_con1, GMAC_SRC_SEL_MASK,
+			     GMAC_SRC_SEL_M1 << GMAC_SRC_SEL_SHIFT);
+
+	return 0;
+}
+
+static int rv1109_gmac_src_m0_set_parent(struct clk *clk, struct clk *parent)
+{
+	struct rv1109_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rv1109_cru *cru = priv->cru;
+
+	if (parent->id == CLK_GMAC_DIV)
+		rk_clrsetreg(&cru->gmac_con, GMAC_SRC_M0_SEL_MASK,
+			     GMAC_SRC_M0_SEL_INT << GMAC_SRC_M0_SEL_SHIFT);
+	else
+		rk_clrsetreg(&cru->gmac_con, GMAC_SRC_SEL_MASK,
+			     GMAC_SRC_M0_SEL_EXT << GMAC_SRC_M0_SEL_SHIFT);
+
+	return 0;
+}
+
+static int rv1109_gmac_src_m1_set_parent(struct clk *clk, struct clk *parent)
+{
+	struct rv1109_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rv1109_cru *cru = priv->cru;
+
+	if (parent->id == CLK_GMAC_DIV)
+		rk_clrsetreg(&cru->gmac_con, GMAC_SRC_M0_SEL_MASK,
+			     GMAC_SRC_M1_SEL_INT << GMAC_SRC_M1_SEL_SHIFT);
+	else
+		rk_clrsetreg(&cru->gmac_con, GMAC_SRC_SEL_MASK,
+			     GMAC_SRC_M1_SEL_EXT << GMAC_SRC_M1_SEL_SHIFT);
+
+	return 0;
+}
+
+static int rv1109_clk_set_parent(struct clk *clk, struct clk *parent)
+{
+	switch (clk->id) {
+	case CLK_GMAC_SRC:
+		return rv1109_gmac_src_set_parent(clk, parent);
+	case CLK_GMAC_SRC_M0:
+		return rv1109_gmac_src_m0_set_parent(clk, parent);
+	case CLK_GMAC_SRC_M1:
+		return rv1109_gmac_src_m1_set_parent(clk, parent);
+	default:
+		return -ENOENT;
+	}
+
+	return 0;
+}
+#endif
+
+static struct clk_ops rv1109_clk_ops = {
+	.get_rate = rv1109_clk_get_rate,
+	.set_rate = rv1109_clk_set_rate,
+	.get_phase = rv1109_clk_get_phase,
+	.set_phase = rv1109_clk_set_phase,
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+	.set_parent = rv1109_clk_set_parent,
+#endif
+};
+
+static int rv1109_gpll_set_clk(ulong rate)
+{
+	struct udevice *pmucru_dev;
+	struct rv1109_pmuclk_priv *priv;
+	int ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_CLK,
+					  DM_GET_DRIVER(rockchip_rv1109_pmucru),
+					  &pmucru_dev);
+	if (ret) {
+		printf("%s: could not find pmucru device\n", __func__);
+		return ret;
+	}
+	priv = dev_get_priv(pmucru_dev);
+
+	ret = rv1109_gpll_set_pmuclk(priv, rate);
+	if (ret) {
+		printf("%s: failed to set gpll rate %lu\n", __func__, rate);
+		return ret;
+	}
+	rv1109_pdpmu_set_pmuclk(priv, PCLK_PDPMU_HZ);
+
+	return ret;
+}
+
+static void rv1109_clk_init(struct rv1109_clk_priv *priv)
+{
+	int ret;
+
+	priv->sync_kernel = false;
+	if (!priv->armclk_enter_hz) {
+		priv->armclk_enter_hz =
+			rockchip_pll_get_rate(&rv1109_pll_clks[APLL],
+					      priv->cru, APLL);
+		priv->armclk_init_hz = priv->armclk_enter_hz ;
+	}
+
+	if (priv->armclk_init_hz != APLL_HZ) {
+		ret = rv1109_armclk_set_clk(priv, APLL_HZ);
+		if (!ret)
+			priv->armclk_init_hz = APLL_HZ;
+	}
+	if (priv->gpll_hz != GPLL_HZ) {
+		ret = rv1109_gpll_set_clk(GPLL_HZ);
+		if (!ret)
+			priv->gpll_hz = GPLL_HZ;
+	}
+	if (priv->cpll_hz != CPLL_HZ) {
+		ret = rockchip_pll_set_rate(&rv1109_pll_clks[CPLL], priv->cru,
+					    CPLL, CPLL_HZ);
+		if (!ret)
+			priv->cpll_hz = CPLL_HZ;
+	}
+	rv1109_pdbus_set_clk(priv, ACLK_PDBUS, ACLK_PDBUS_HZ);
+	rv1109_pdbus_set_clk(priv, HCLK_PDBUS, HCLK_PDBUS_HZ);
+	rv1109_pdbus_set_clk(priv, PCLK_PDBUS, PCLK_PDBUS_HZ);
+	rv1109_pdphp_set_clk(priv, ACLK_PDPHP, ACLK_PDPHP_HZ);
+	rv1109_pdphp_set_clk(priv, HCLK_PDPHP, HCLK_PDPHP_HZ);
+	rv1109_pdcore_set_clk(priv, HCLK_PDCORE_HZ);
+	rv1109_pdaudio_set_clk(priv, HCLK_PDAUDIO_HZ);
+}
+
+static int rv1109_clk_probe(struct udevice *dev)
+{
+	struct rv1109_clk_priv *priv = dev_get_priv(dev);
+	int ret;
+
+	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	if (IS_ERR(priv->grf))
+		return PTR_ERR(priv->grf);
+
+	rv1109_clk_init(priv);
+
+	/* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
+	ret = clk_set_defaults(dev);
+	if (ret)
+		debug("%s clk_set_defaults failed %d\n", __func__, ret);
+	else
+		priv->sync_kernel = true;
+
+	return 0;
+}
+
+static int rv1109_clk_ofdata_to_platdata(struct udevice *dev)
+{
+	struct rv1109_clk_priv *priv = dev_get_priv(dev);
+
+	priv->cru = dev_read_addr_ptr(dev);
+
+	return 0;
+}
+
+static int rv1109_clk_bind(struct udevice *dev)
+{
+	int ret;
+	struct udevice *sys_child, *sf_child;
+	struct sysreset_reg *priv;
+	struct softreset_reg *sf_priv;
+
+	/* The reset driver does not have a device node, so bind it here */
+	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
+				 &sys_child);
+	if (ret) {
+		debug("Warning: No sysreset driver: ret=%d\n", ret);
+	} else {
+		priv = malloc(sizeof(struct sysreset_reg));
+		priv->glb_srst_fst_value = offsetof(struct rv1109_cru,
+						    glb_srst_fst);
+		priv->glb_srst_snd_value = offsetof(struct rv1109_cru,
+						    glb_srst_snd);
+		sys_child->priv = priv;
+	}
+
+	ret = device_bind_driver_to_node(dev, "rockchip_reset", "reset",
+					 dev_ofnode(dev), &sf_child);
+	if (ret) {
+		debug("Warning: No rockchip reset driver: ret=%d\n", ret);
+	} else {
+		sf_priv = malloc(sizeof(struct softreset_reg));
+		sf_priv->sf_reset_offset = offsetof(struct rv1109_cru,
+						    softrst_con[0]);
+		sf_priv->sf_reset_num = 15;
+		sf_child->priv = sf_priv;
+	}
+
+	return 0;
+}
+
+static const struct udevice_id rv1109_clk_ids[] = {
+	{ .compatible = "rockchip,rv1109-cru" },
+	{ }
+};
+
+U_BOOT_DRIVER(rockchip_rv1109_cru) = {
+	.name		= "rockchip_rv1109_cru",
+	.id		= UCLASS_CLK,
+	.of_match	= rv1109_clk_ids,
+	.priv_auto_alloc_size = sizeof(struct rv1109_clk_priv),
+	.ofdata_to_platdata = rv1109_clk_ofdata_to_platdata,
+	.ops		= &rv1109_clk_ops,
+	.bind		= rv1109_clk_bind,
+	.probe		= rv1109_clk_probe,
+};
+
+#ifndef CONFIG_SPL_BUILD
+/**
+ * soc_clk_dump() - Print clock frequencies
+ * Returns zero on success
+ *
+ * Implementation for the clk dump command.
+ */
+int soc_clk_dump(void)
+{
+	struct udevice *cru_dev, *pmucru_dev;
+	struct rv1109_clk_priv *priv;
+	const struct rv1109_clk_info *clk_dump;
+	struct clk clk;
+	unsigned long clk_count = ARRAY_SIZE(clks_dump);
+	unsigned long rate;
+	int i, ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_CLK,
+					  DM_GET_DRIVER(rockchip_rv1109_cru),
+					  &cru_dev);
+	if (ret) {
+		printf("%s failed to get cru device\n", __func__);
+		return ret;
+	}
+
+	ret = uclass_get_device_by_driver(UCLASS_CLK,
+					  DM_GET_DRIVER(rockchip_rv1109_pmucru),
+					  &pmucru_dev);
+	if (ret) {
+		printf("%s failed to get pmucru device\n", __func__);
+		return ret;
+	}
+
+	priv = dev_get_priv(cru_dev);
+	printf("CLK: (%s. arm: enter %lu KHz, init %lu KHz, kernel %lu%s)\n",
+	       priv->sync_kernel ? "sync kernel" : "uboot",
+	       priv->armclk_enter_hz / 1000,
+	       priv->armclk_init_hz / 1000,
+	       priv->set_armclk_rate ? priv->armclk_hz / 1000 : 0,
+	       priv->set_armclk_rate ? " KHz" : "N/A");
+	for (i = 0; i < clk_count; i++) {
+		clk_dump = &clks_dump[i];
+		if (clk_dump->name) {
+			clk.id = clk_dump->id;
+			if (clk_dump->is_cru)
+				ret = clk_request(cru_dev, &clk);
+			else
+				ret = clk_request(pmucru_dev, &clk);
+			if (ret < 0)
+				return ret;
+
+			rate = clk_get_rate(&clk);
+			clk_free(&clk);
+			if (i == 0) {
+				if (rate < 0)
+					printf("  %s %s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("  %s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
+			} else {
+				if (rate < 0)
+					printf("  %s %s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("  %s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
+			}
+		}
+	}
+
+	return 0;
+}
+#endif
diff --git a/include/dt-bindings/clock/rv1109-cru.h b/include/dt-bindings/clock/rv1109-cru.h
index 4149b773f8..3d97546780 100644
--- a/include/dt-bindings/clock/rv1109-cru.h
+++ b/include/dt-bindings/clock/rv1109-cru.h
@@ -7,374 +7,400 @@
 #ifndef _DT_BINDINGS_CLK_ROCKCHIP_RV1109_H
 #define _DT_BINDINGS_CLK_ROCKCHIP_RV1109_H
 
-/* core clocks */
+/* pmucru-clocks indices */
+
+/* pll clocks */
+#define PLL_GPLL		1
+
+/* sclk (special clocks) */
+#define CLK_OSC0_DIV32K		2
+#define CLK_RTC32K		3
+#define CLK_WIFI_DIV		4
+#define CLK_WIFI_OSC0		5
+#define CLK_WIFI		6
+#define CLK_PMU			7
+#define SCLK_UART1_DIV		8
+#define SCLK_UART1_FRACDIV	9
+#define SCLK_UART1_MUX		10
+#define SCLK_UART1		11
+#define CLK_I2C0		12
+#define CLK_I2C2		13
+#define CLK_CAPTURE_PWM0	14
+#define CLK_PWM0		15
+#define CLK_CAPTURE_PWM1	16
+#define CLK_PWM1		17
+#define CLK_SPI0		18
+#define DBCLK_GPIO0		19
+#define CLK_PMUPVTM		20
+#define CLK_CORE_PMUPVTM	21
+#define CLK_REF12M		22
+#define CLK_USBPHY_OTP_REF	23
+#define CLK_USBPHY_HOST_REF	24
+#define CLK_REF24M		25
+#define CLK_MIPIDSIPHY_REF	26
+
+/* pclk */
+#define PCLK_PDPMU		30
+#define PCLK_PMU		31
+#define PCLK_UART1		32
+#define PCLK_I2C0		33
+#define PCLK_I2C2		34
+#define PCLK_PWM0		35
+#define PCLK_PWM1		36
+#define PCLK_SPI0		37
+#define PCLK_GPIO0		38
+#define PCLK_PMUSGRF		39
+#define PCLK_PMUGRF		40
+#define PCLK_PMUCRU		41
+#define PCLK_CHIPVEROTP		42
+#define PCLK_PDPMU_NIU		43
+#define PCLK_PMUPVTM		44
+#define PCLK_SCRKEYGEN		45
+
+#define CLKPMU_NR_CLKS		(PCLK_SCRKEYGEN + 1)
+
+/* cru-clocks indices */
+
+/* pll clocks */
 #define PLL_APLL		1
 #define PLL_DPLL		2
 #define PLL_CPLL		3
 #define PLL_HPLL		4
-#define ARMCLK			5
 
 /* sclk (special clocks) */
-#define USB480M			10
-#define CLK_CORE_CPUPVTM	11
-#define CLK_CPUPVTM		12
-#define CLK_CPU_TSADC		13
-#define CLK_CPU_TSADCPHY	14
-#define CLK_NPU			15
-#define CLK_NPU_DIV		16
-#define CLK_NPU_NP5		17
-#define CLK_CORE_NPU		18
-#define CLK_CORE_NPUPVTM	19
-#define CLK_NPUPVTM		20
-#define CLK_NPU_TSADC		21
-#define CLK_NPU_TSADCPHY	22
-#define CLK_VENC_CORE		23
-#define CLK_VDEC_CORE		24
-#define CLK_VDEC_CA		25
-#define CLK_VDEC_HEVC_CA	26
-#define CLK_ISP			27
-#define CLK_MIPICSI_OUT_DIV	28
-#define CLK_MIPICSI_OUT_FRACDIV	29
-#define CLK_MIPICSI_OUT_MUX	30
-#define CLK_MIPICSI_OUT		31
-#define CLK_CIF_OUT_DIV		32
-#define CLK_CIF_OUT_FRACDIV	33
-#define CLK_CIF_OUT_MUX		34
-#define CLK_CIF_OUT		35
-#define CLK_RGA_CORE		36
-#define CLK_IEP_CORE		37
-#define CLK_ISPP		38
-#define CCLKIN_SDCARD		39
-#define CCLKIN_SDIO		40
-#define CCLKIN_EMMC		41
-#define CLK_NANDC		42
-#define SCLK_SFC		43
-#define CLK_USBHOST_UTMI_OHCI	44
-#define CLK_USBOTG_REF		45
-#define CLK_GMAC_DIV		46
-#define CLK_GMAC_REF		47
-#define CLK_GMAC_TX		48
-#define CLK_GMAC_RX		49
-#define CLK_GMAC_ETHERNET_OUT	50
-#define CLK_GMAC_PTPREF		51
-#define CLK_DDR			52
-#define CLK_DDR_MON		53
-#define TMCLK_DDR_MON		54
-#define CLK_SCR1		55
-#define CLK_SCR1_RTC		56
-#define CLK_SCR1_JTAG		57
-#define SCLK_UART0_DIV		58
-#define SCLK_UART0_FRAC		59
-#define SCLK_UART0_MUX		60
-#define SCLK_UART0		61
-#define SCLK_UART2_DIV		62
-#define SCLK_UART2_FRAC		63
-#define SCLK_UART2_MUX		64
-#define SCLK_UART2		65
-#define SCLK_UART3_DIV		66
-#define SCLK_UART3_FRAC		67
-#define SCLK_UART3_MUX		68
-#define SCLK_UART3		69
-#define SCLK_UART4_DIV		70
-#define SCLK_UART4_FRAC		71
-#define SCLK_UART4_MUX		72
-#define SCLK_UART4		73
-#define SCLK_UART5_DIV		74
-#define SCLK_UART5_FRAC		75
-#define SCLK_UART5_MUX		76
-#define SCLK_UART5		77
-#define CLK_I2C1		78
-#define CLK_I2C3		79
-#define CLK_I2C4		80
-#define CLK_I2C5		81
-#define CLK_SPI1		82
-#define CLK_PWM2		83
-#define DBCLK_GPIO1		84
-#define DBCLK_GPIO2		85
-#define DBCLK_GPIO3		86
-#define DBCLK_GPIO4		87
-#define CLK_SARADC		88
-#define CLK_TIMER0		89
-#define CLK_TIMER1		90
-#define CLK_TIMER2		91
-#define CLK_TIMER3		92
-#define CLK_TIMER4		93
-#define CLK_TIMER5		94
-#define CLK_STIMER0		95
-#define CLK_STIMER1		96
-#define CLK_CRYPT_CORE		97
-#define CLK_CRYPT_PKA		98
-#define MCLK_I2S8CH_TX_DIV	99
-#define MCLK_I2S8CH_TX_FRACDIV	100
-#define MCLK_I2S8CH_TX_MUX	101
-#define MCLK_I2S8CH_RX_DIV	102
-#define MCLK_I2S8CH_RX_FRACDIV	103
-#define MCLK_I2S8CH_RX_MUX	104
-#define MCLK_I2S8CH_TX_SRC	105
-#define MCLK_I2S8CH_RX_SRC	106
-#define MCLK_I2S8CH_TX		107
-#define MCLK_I2S8CH_RX		108
-#define MCLK_I2S8CH_TX_OUT2IO	109
-#define MCLK_I2S8CH_RX_OUT2IO	110
-#define MCLK_I2S2CH0_DIV	111
-#define MCLK_I2S2CH0_FRACDIV	112
-#define MCLK_I2S2CH0_MUX	113
-#define MCLK_I2S2CH0		114
-#define MCLK_I2S2CH0_OUT2IO	115
-#define MCLK_I2S2CH1_DIV	116
-#define MCLK_I2S2CH1_FRACDIV	117
-#define MCLK_I2S2CH1_MUX	118
-#define MCLK_I2S2CH1		119
-#define MCLK_I2S2CH1_OUT2IO	120
-#define MCLK_PDM		121
-#define SCLK_ADUPWM_DIV		122
-#define SCLK_AUDPWM_FRACDIV	123
-#define SCLK_AUDPWM_MUX		124
-#define CLK_ACDCDIG_ADC		125
-#define CLK_ACDCDIG_DAC		126
-#define CLK_ACDCDIG_I2C		127
+#define ARMCLK			5
+#define USB480M			6
+#define CLK_CORE_CPUPVTM	7
+#define CLK_CPUPVTM		8
+#define CLK_SCR1		9
+#define CLK_SCR1_CORE		10
+#define CLK_SCR1_RTC		11
+#define CLK_SCR1_JTAG		12
+#define SCLK_UART0_DIV		13
+#define SCLK_UART0_FRAC		14
+#define SCLK_UART0_MUX		15
+#define SCLK_UART0		16
+#define SCLK_UART2_DIV		17
+#define SCLK_UART2_FRAC		18
+#define SCLK_UART2_MUX		19
+#define SCLK_UART2		20
+#define SCLK_UART3_DIV		21
+#define SCLK_UART3_FRAC		22
+#define SCLK_UART3_MUX		23
+#define SCLK_UART3		24
+#define SCLK_UART4_DIV		25
+#define SCLK_UART4_FRAC		26
+#define SCLK_UART4_MUX		27
+#define SCLK_UART4		28
+#define SCLK_UART5_DIV		29
+#define SCLK_UART5_FRAC		30
+#define SCLK_UART5_MUX		31
+#define SCLK_UART5		32
+#define CLK_I2C1		33
+#define CLK_I2C3		34
+#define CLK_I2C4		35
+#define CLK_I2C5		36
+#define CLK_SPI1		37
+#define CLK_CAPTURE_PWM2	38
+#define CLK_PWM2		39
+#define DBCLK_GPIO1		40
+#define DBCLK_GPIO2		41
+#define DBCLK_GPIO3		42
+#define DBCLK_GPIO4		43
+#define CLK_SARADC		44
+#define CLK_TIMER0		45
+#define CLK_TIMER1		46
+#define CLK_TIMER2		47
+#define CLK_TIMER3		48
+#define CLK_TIMER4		49
+#define CLK_TIMER5		50
+#define CLK_CAN			51
+#define CLK_NPU_TSADC		52
+#define CLK_NPU_TSADCPHY	53
+#define CLK_CPU_TSADC		54
+#define CLK_CPU_TSADCPHY	55
+#define CLK_CRYPTO_CORE		56
+#define CLK_CRYPTO_PKA		57
+#define MCLK_I2S8CH_TX_DIV	58
+#define MCLK_I2S8CH_TX_FRACDIV	59
+#define MCLK_I2S8CH_TX_MUX	60
+#define MCLK_I2S8CH_TX		61
+#define MCLK_I2S8CH_RX_DIV	62
+#define MCLK_I2S8CH_RX_FRACDIV	63
+#define MCLK_I2S8CH_RX_MUX	64
+#define MCLK_I2S8CH_RX		65
+#define MCLK_I2S8CH_TX_OUT2IO	66
+#define MCLK_I2S8CH_RX_OUT2IO	67
+#define MCLK_I2S2CH0_DIV	68
+#define MCLK_I2S2CH0_FRACDIV	69
+#define MCLK_I2S2CH0_MUX	70
+#define MCLK_I2S2CH0		71
+#define MCLK_I2S2CH0_OUT2IO	72
+#define MCLK_I2S2CH1_DIV	73
+#define MCLK_I2S2CH1_FRACDIV	74
+#define MCLK_I2S2CH1_MUX	75
+#define MCLK_I2S2CH1		76
+#define MCLK_I2S2CH1_OUT2IO	77
+#define MCLK_PDM		78
+#define SCLK_ADUPWM_DIV		79
+#define SCLK_AUDPWM_FRACDIV	80
+#define SCLK_AUDPWM_MUX		81
+#define	SCLK_AUDPWM		82
+#define CLK_ACDCDIG_ADC		83
+#define CLK_ACDCDIG_DAC		84
+#define CLK_ACDCDIG_I2C		85
+#define CLK_VENC_CORE		86
+#define CLK_VDEC_CORE		87
+#define CLK_VDEC_CA		88
+#define CLK_VDEC_HEVC_CA	89
+#define CLK_RGA_CORE		90
+#define CLK_IEP_CORE		91
+#define CLK_ISP_DIV		92
+#define CLK_ISP_NP5		93
+#define CLK_ISP_NUX		94
+#define CLK_ISP			95
+#define CLK_CIF_OUT_DIV		96
+#define CLK_CIF_OUT_FRACDIV	97
+#define CLK_CIF_OUT_MUX		98
+#define CLK_CIF_OUT		99
+#define CLK_MIPICSI_OUT_DIV	100
+#define CLK_MIPICSI_OUT_FRACDIV	101
+#define CLK_MIPICSI_OUT_MUX	102
+#define CLK_MIPICSI_OUT		103
+#define CLK_ISPP_DIV		104
+#define CLK_ISPP_NP5		105
+#define CLK_ISPP_NUX		106
+#define CLK_ISPP		107
+#define CLK_SDMMC		108
+#define SCLK_SDMMC_DRV		109
+#define SCLK_SDMMC_SAMPLE	110
+#define CLK_SDIO		111
+#define SCLK_SDIO_DRV		112
+#define SCLK_SDIO_SAMPLE	113
+#define CLK_EMMC		114
+#define SCLK_EMMC_DRV		115
+#define SCLK_EMMC_SAMPLE	116
+#define CLK_NANDC		117
+#define SCLK_SFC		118
+#define CLK_USBHOST_UTMI_OHCI	119
+#define CLK_USBOTG_REF		120
+#define CLK_GMAC_DIV		121
+#define CLK_GMAC_RGMII_M0	122
+#define CLK_GMAC_SRC_M0		123
+#define CLK_GMAC_RGMII_M1	124
+#define CLK_GMAC_SRC_M1		125
+#define CLK_GMAC_SRC		126
+#define CLK_GMAC_REF		127
+#define CLK_GMAC_TX_SRC		128
+#define CLK_GMAC_TX_DIV5	129
+#define CLK_GMAC_TX_DIV50	130
+#define RGMII_MODE_CLK		131
+#define CLK_GMAC_RX_SRC		132
+#define CLK_GMAC_RX_DIV2	133
+#define CLK_GMAC_RX_DIV20	134
+#define RMII_MODE_CLK		135
+#define CLK_GMAC_TX_RX		136
+#define CLK_GMAC_PTPREF		137
+#define CLK_GMAC_ETHERNET_OUT	138
+#define CLK_DDRPHY		139
+#define CLK_DDR_MON		140
+#define TMCLK_DDR_MON		141
+#define CLK_NPU_DIV		142
+#define CLK_NPU_NP5		143
+#define CLK_CORE_NPU		144
+#define CLK_CORE_NPUPVTM	145
+#define CLK_NPUPVTM		146
 
 /* dclk */
-#define DCLK_CIF		140
-#define DCLK_CIFLITE		141
-#define DCLK_VOP_DIV		142
-#define DCLK_VOP_FRACDIV	143
-#define DCLK_VOP_MUX		144
-#define DCLK_VOP		145
-#define DCLK_DECOM		146
+#define DCLK_DECOM		150
+#define DCLK_VOP_DIV		151
+#define DCLK_VOP_FRACDIV	152
+#define DCLK_VOP_MUX		153
+#define DCLK_VOP		154
+#define DCLK_CIF		155
+#define DCLK_CIFLITE		156
 
 /* aclk */
-#define ACLK_PDNPU_DIV		160
-#define ACLK_PDNPU_NP5		161
-#define ACLK_PDNPU		162
-#define ACLK_PDNPU_NIU		163
-#define ACLK_NPU		164
-#define ACLK_PDVEPU		165
-#define ACLK_PDVEPU_NIU		166
-#define ACLK_VENC		167
-#define ACLK_PDVDEC_NIU		168
+#define ACLK_PDBUS		160
+#define ACLK_DMAC		161
+#define ACLK_DCF		162
+#define ACLK_SPINLOCK		163
+#define ACLK_DECOM		164
+#define ACLK_PDCRYPTO		165
+#define ACLK_CRYPTO		166
+#define ACLK_PDVEPU		167
+#define ACLK_VENC		168
 #define ACLK_PDVDEC		169
-#define ACLK_VDEC		170
-#define ACLK_PDJPEG		171
-#define ACLK_PDJPEG_NIU		172
-#define ACLK_JPEG		173
-#define ACLK_PDVI		174
-#define ACLK_PDVI_NIU		175
-#define ACLK_ISP		176
-#define ACLK_CIF		177
-#define ACLK_CIFLITE		178
-#define ACLK_PDVO		179
-#define ACLK_PDVO_NIU		180
-#define ACLK_RGA		181
-#define ACLK_VOP		182
-#define ACLK_IEP		183
-#define ACLK_PDISPP		184
-#define ACLK_PDISPP_NIU		185
+#define ACLK_PDJPEG		170
+#define ACLK_VDEC		171
+#define ACLK_JPEG		172
+#define ACLK_PDVO		173
+#define ACLK_RGA		174
+#define ACLK_VOP		175
+#define ACLK_IEP		176
+#define ACLK_PDVI_DIV		177
+#define ACLK_PDVI_NP5		178
+#define ACLK_PDVI		179
+#define ACLK_ISP		180
+#define ACLK_CIF		181
+#define ACLK_CIFLITE		182
+#define ACLK_PDISPP_DIV		183
+#define ACLK_PDISPP_NP5		184
+#define ACLK_PDISPP		185
 #define ACLK_ISPP		186
 #define ACLK_PDPHP		187
-#define ACLK_PDPHPMID		188
-#define ACLK_PDPHPMID_NIU	189
-#define ACLK_PDUSB		190
-#define ACLK_PDUSB_NIU		191
-#define ACLK_USBOTG		192
-#define ACLK_PDGMAC		193
-#define ACLK_PDGMAC_NIU		194
-#define ACLK_GMAC		195
-#define ACLK_PDBUS_PRE		196
-#define ACLK_PDBUS		197
-#define ACLK_PDBUS_HOLD_NIU1	198
-#define ACLK_PDBUS_NIU1		199
-#define ACLK_PDBUS_NIU2		200
-#define ACLK_PDBUS_NIU3		201
-#define ACLK_DMAC		202
-#define ACLK_DCF		203
-#define ACLK_SPINLOCK		204
-#define ACLK_PDCRYPT		205
-#define ACLK_PDCRYPT_NIU	206
+#define ACLK_PDUSB		188
+#define ACLK_USBOTG		189
+#define ACLK_PDGMAC		190
+#define ACLK_GMAC		191
+#define ACLK_PDNPU_DIV		192
+#define ACLK_PDNPU_NP5		193
+#define ACLK_PDNPU		194
+#define ACLK_NPU		195
 
 /* hclk */
-#define HCLK_PDNPU_NIU		230
-#define HCLK_PDNPU		231
-#define HCLK_NPU		232
-#define HCLK_PDVEPU		233
-#define HCLK_PDVEPU_NIU		234
-#define HCLK_VENC		235
-#define HCLK_PDVDEC		236
-#define HCLK_PDVDEC_NIU		237
-#define HCLK_VDEC		238
-#define HCLK_PDJPEG		239
-#define HCLK_PDJPEG_NIU		240
-#define HCLK_JPEG		241
-#define HCLK_PDVI		242
-#define HCLK_PDVI_NIU		243
-#define HCLK_ISP		244
-#define HCLK_CIF		245
-#define HCLK_CIFLITE		245
-#define HCLK_PDVO		246
-#define HCLK_PDVO_NIU		247
-#define HCLK_RGA		248
-#define HCLK_VOP		249
-#define HCLK_IEP		250
-#define HCLK_PDISPP		251
-#define HCLK_PDISPP_NIU		252
-#define HCLK_ISPP		253
-#define HCLK_PDPHP		254
-#define HCLK_PDPHPMID		255
-#define HCLK_PDPHPMID_NIU	256
-#define HCLK_PDSDCARD		257
-#define HCLK_PDSDCARD_NIU	258
-#define HCLK_SDCARD		259
-#define HCLK_PDSDIO		260
-#define HCLK_PDSDIO_NIU		261
-#define HCLK_SDIO		262
-#define HCLK_PDNVM		263
-#define HCLK_PDNVM_NIU		264
-#define HCLK_EMMC		265
-#define HCLK_NANDC		266
-#define HCLK_SFC		267
-#define HCLK_SFCXIP		268
-#define HCLK_PDUSB		269
-#define HCLK_PDUSB_NIU		270
-#define HCLK_USBHOST		271
-#define HCLK_USBHOST_ARB	272
-#define HCLK_PDBUS_PRE		273
-#define HCLK_PDBUS		274
-#define HCLK_PDBUS_NIU1		275
-#define HCLK_PDBUS_NIU2		276
-#define HCLK_PDBUS_NIU3		277
-#define HCLK_AHBROM		278
-#define HCLK_PDCRYPT		279
-#define HCLK_PDCRYPT_NIU	280
-#define HCLK_PDAUDIO		281
-#define HCLK_PDAUDIO_NIU	282
-#define HCLK_I2S8CH		283
-#define HCLK_I2S2CH0		284
-#define HCLK_I2S2CH1		285
-#define HCLK_PDM		286
-#define HCLK_AUDPWM		287
+#define HCLK_PDCORE_NIU		200
+#define HCLK_PDUSB		201
+#define HCLK_PDCRYPTO		202
+#define HCLK_CRYPTO		203
+#define HCLK_PDAUDIO		204
+#define HCLK_I2S8CH		205
+#define HCLK_I2S2CH0		206
+#define HCLK_I2S2CH1		207
+#define HCLK_PDM		208
+#define HCLK_AUDPWM		209
+#define HCLK_PDVEPU		210
+#define HCLK_VENC		211
+#define HCLK_PDVDEC		212
+#define HCLK_PDJPEG		213
+#define HCLK_VDEC		214
+#define HCLK_JPEG		215
+#define HCLK_PDVO		216
+#define HCLK_RGA		217
+#define HCLK_VOP		218
+#define HCLK_IEP		219
+#define HCLK_PDVI		220
+#define HCLK_ISP		221
+#define HCLK_CIF		222
+#define HCLK_CIFLITE		223
+#define HCLK_PDISPP		224
+#define HCLK_ISPP		225
+#define HCLK_PDPHP		226
+#define HCLK_PDSDMMC		227
+#define HCLK_SDMMC		228
+#define HCLK_PDSDIO		229
+#define HCLK_SDIO		230
+#define HCLK_PDNVM		231
+#define HCLK_EMMC		232
+#define HCLK_NANDC		233
+#define HCLK_SFC		234
+#define HCLK_SFCXIP		235
+#define HCLK_PDBUS		236
+#define HCLK_USBHOST		237
+#define HCLK_USBHOST_ARB	238
+#define HCLK_PDNPU		239
+#define HCLK_NPU		240
 
 /* pclk */
-#define PCLK_CPUPVTM		300
-#define PCLK_CPU_TSADC		301
-#define PCLK_PDNPU		302
-#define PCLK_PDNPU_NIU		303
-#define PCLK_NPUPVTM		304
-#define PCLK_NPU_TSADC		305
-#define PCLK_PDVI		306
-#define PCLK_PDVI_NIU		307
-#define PCLK_CSIHOST		308
-#define PCLK_PDVO		309
-#define PCLK_PDVO_NIU		310
-#define PCLK_DSIHOST		311
-#define PCLK_PDGMAC		312
-#define PCLK_PDGMAC_NIU		313
-#define PCLK_GMAC		314
-#define PCLK_PDDDR		315
-#define PCLK_DDR_MON		316
-#define PCLK_PDBUS_PRE		317
-#define PCLK_PDBUS		318
-#define PCLK_PDBUS_NIU1		319
-#define PCLK_DCF		320
-#define PCLK_GRF		321
-#define PCLK_SGRF		322
-#define PCLK_WDT		323
-#define PCLK_SWDT		324
-#define PCLK_UART0		325
-#define PCLK_UART2		326
-#define PCLK_UART3		327
-#define PCLK_UART4		328
-#define PCLK_UART5		329
-#define PCLK_I2C1		330
-#define PCLK_I2C3		331
-#define PCLK_I2C4		332
-#define PCLK_I2C5		333
-#define PCLK_SPI1		334
-#define PCLK_PWM2		335
-#define PCLK_GPIO1		336
-#define PCLK_GPIO2		337
-#define PCLK_GPIO3		338
-#define PCLK_GPIO4		339
-#define PCLK_SARADC		340
-#define PCLK_TIMER		341
-#define PCLK_STIMER		342
-#define PCLK_DECOM		343
-#define PCLK_PDAUDIO_NIU	344
-#define PCLK_ACDCDIG		345
-#define PCLK_PDTOP		346
-#define PCLK_TOPNIU		347
-#define PCLK_TOPCRU		348
-#define PCLK_TOPGRF		349
-#define PCLK_CPUEMADET		350
-#define PCLK_DDRPHY		351
-#define PCLK_DSIPHY		352
-#define PCLK_CSIPHY0		353
-#define PCLK_CSIPHY1		354
-#define PCLK_USBPHY_HOST	355
-#define PCLK_USBPHY_OTG		356
+#define PCLK_CPUPVTM		245
+#define PCLK_PDBUS		246
+#define PCLK_DCF		247
+#define PCLK_WDT		248
+#define PCLK_MAILBOX		249
+#define PCLK_UART0		250
+#define PCLK_UART2		251
+#define PCLK_UART3		252
+#define PCLK_UART4		253
+#define PCLK_UART5		254
+#define PCLK_I2C1		255
+#define PCLK_I2C3		256
+#define PCLK_I2C4		257
+#define PCLK_I2C5		258
+#define PCLK_SPI1		259
+#define PCLK_CAPTURE_PWM2	260
+#define PCLK_PWM2		261
+#define PCLK_GPIO1		262
+#define PCLK_GPIO2		263
+#define PCLK_GPIO3		264
+#define PCLK_GPIO4		265
+#define PCLK_SARADC		266
+#define PCLK_TIMER		267
+#define PCLK_DECOM		268
+#define PCLK_CAN		269
+#define PCLK_NPU_TSADC		270
+#define PCLK_CPU_TSADC		271
+#define PCLK_ACDCDIG		272
+#define PCLK_PDVO		273
+#define PCLK_DSIHOST		274
+#define PCLK_PDVI		275
+#define PCLK_CSIHOST		276
+#define PCLK_PDGMAC		277
+#define PCLK_GMAC		278
+#define PCLK_PDDDR		279
+#define PCLK_DDR_MON		280
+#define PCLK_PDNPU		281
+#define PCLK_NPUPVTM		282
+#define PCLK_PDTOP		283
+#define PCLK_TOPCRU		284
+#define PCLK_TOPGRF		285
+#define PCLK_CPUEMADET		286
+#define PCLK_DDRPHY		287
+#define PCLK_DSIPHY		289
+#define PCLK_CSIPHY0		290
+#define PCLK_CSIPHY1		291
+#define PCLK_USBPHY_HOST	292
+#define PCLK_USBPHY_OTG		293
 
 #define CLK_NR_CLKS		(PCLK_USBPHY_OTG + 1)
 
-/* pmu-clocks indices */
+/* pmu soft-reset indices */
 
-#define PLL_GPLL		1
+/* pmu_cru_softrst_con0 */
+#define SRST_PDPMU_NIU_P	0
+#define SRST_PMU_SGRF_P		1
+#define SRST_PMU_SGRF_REMAP_P	2
+#define SRST_I2C0_P		3
+#define SRST_I2C0		4
+#define SRST_I2C2_P		7
+#define SRST_I2C2		8
+#define SRST_UART1_P		9
+#define SRST_UART1		10
+#define SRST_PWM0_P		11
+#define SRST_PWM0		12
+#define SRST_PWM1_P		13
+#define SRST_PWM1		14
+#define SRST_DDR_FAIL_SAFE	15
 
-#define CLK_RTC32K		4
-#define CLK_XIN24M_DIV		5
-#define CLK_WIFI_DIV		6
-#define CLK_WIFI		7
-#define SCLK_UART1_DIV		8
-#define SCLK_UART1_FRACDIV	9
-#define SCLK_UART1_MUX		10
-#define SCLK_UART1		11
-#define CLK_I2C0		12
-#define CLK_I2C2		13
-#define CLK_SPI0		14
-#define DBCLK_GPIO0		15
-#define CLK_PWM0		16
-#define CLK_PWM1		17
-#define CLK_PMUPVTM		18
-#define CLK_CORE_PMUPVTM	19
-#define CLK_REF12M_DIV		20
-#define CLK_USBPHY_OTP_REF	21
-#define CLK_USBPHY_HOST_REF	22
-#define CLK_REF24M_DIV		23
-#define CLK_MIPIDSIPHY_REF	24
-
-#define PCLK_PDPMU		30
-#define PCLK_PMU		31
-#define PCLK_PDPMU_NIU		32
-#define PCLK_PMUMEM		33
-#define PCLK_UART1		34
-#define PCLK_I2C0		35
-#define PCLK_I2C2		35
-#define PCLK_SPI0		36
-#define PCLK_GPIO0		37
-#define PCLK_PWM0		38
-#define PCLK_PWM1		39
-#define PCLK_PMUSGRF		40
-#define PCLK_PMUGRF		41
-#define PCLK_PMUCRU		42
-#define PCLK_PMUPVTM		43
-
-#define CLKPMU_NR_CLKS		(PCLK_PMUPVTM + 1)
+/* pmu_cru_softrst_con1 */
+#define SRST_GPIO0_P		17
+#define SRST_GPIO0_DB		18
+#define SRST_SPI0_P		19
+#define SRST_SPI0		20
+#define SRST_PMUGRF_P		21
+#define SRST_CHIPVEROTP_P	22
+#define SRST_PMUPVTM		24
+#define SRST_PMUPVTM_P		25
+#define SRST_PMUCRU_P		30
 
 /* soft-reset indices */
 
 /* cru_softrst_con0 */
 #define SRST_CORE0_PO		0
 #define SRST_CORE1_PO		1
-#define SRST_CORE0		2
-#define SRST_CORE1		3
-#define SRST_CORE0_DBG		4
-#define SRST_CORE1_DBG		5
-#define SRST_DBG_DAPLITE_P	6
-#define SRST_CORE_NIU_A		7
-#define SRST_NL2		8
-#define SRST_DBG_NIU_P		9
-#define SRST_DAPLITE_P		10
-#define SRST_PDCORE_NIU_H	11
-#define SRST_CPUPVTM_P		12
-#define SRST_CPUPVTM		13
+#define SRST_CORE2_PO		2
+#define SRST_CORE3_PO		3
+#define SRST_CORE0		4
+#define SRST_CORE1		5
+#define SRST_CORE2		6
+#define SRST_CORE3		7
+#define SRST_CORE0_DBG		8
+#define SRST_CORE1_DBG		9
+#define SRST_CORE2_DBG		10
+#define SRST_CORE3_DBG		11
+#define SRST_NL2		12
+#define SRST_CORE_NIU_A		13
+#define SRST_DBG_DAPLITE_P	14
+#define SRST_DAPLITE_P		15
 
 /* cru_softrst_con1 */
 #define SRST_PDBUS_NIU1_A	16
@@ -385,11 +411,11 @@
 #define SRST_PDBUS_NIU3_A	21
 #define SRST_PDBUS_NIU3_H	22
 #define SRST_PDBUS_HOLD_NIU1_A	23
-#define SRST_DMAC_A		24
-#define SRST_AHBROM_H		25
-#define SRST_DCF_A		28
-#define SRST_DCF_P		29
-#define SRST_SCR1		30
+#define SRST_DBG_NIU_P		24
+#define SRST_PDCORE_NIIU_H	25
+#define SRST_SCR1_NIU		26
+#define SRST_DCF_A		29
+#define SRST_DCF_P		30
 #define SRST_BUSMEM_A		31
 
 /* cru_softrst_con2 */
@@ -403,6 +429,7 @@
 #define SRST_I2C5		39
 #define SRST_SPI1_P		40
 #define SRST_SPI1		41
+#define SRST_SCR1_CORE		42
 #define SRST_PWM2_P		44
 #define SRST_PWM2		45
 #define SRST_SPINLOCK_A		46
@@ -431,6 +458,7 @@
 #define SRST_TIMER3		67
 #define SRST_TIMER4		68
 #define SRST_TIMER5		69
+#define SRST_INTMUX_P		70
 #define SRST_GPIO1_P		72
 #define SRST_GPIO1_DB		73
 #define SRST_GPIO2_P		74
@@ -443,19 +471,15 @@
 /* cru_softrst_con5 */
 #define SRST_CAN_P		80
 #define SRST_CAN		81
-#define SRST_STIMER_P		82
-#define SRST_STIMER0		83
-#define SRST_STIMER1		84
 #define SRST_DECOM_A		85
 #define SRST_DECOM_P		86
 #define SRST_DECOM_D		87
-#define SRST_PDCRYPT_NIU_A	88
-#define SRST_PDCRYPT_NIU_H	89
+#define SRST_PDCRYPTO_NIU_A	88
+#define SRST_PDCRYPTO_NIU_H	89
 #define SRST_CRYPTO_A		90
 #define SRST_CRYPTO_H		91
 #define SRST_CRYPTO_CORE	92
 #define SRST_CRYPTO_PKA		93
-#define SRST_SWDT_P		94
 #define SRST_SGRF_P		95
 
 /* cru_softrst_con6 */
@@ -471,7 +495,7 @@
 #define SRST_PDM_H		105
 #define SRST_PDM_M		106
 #define SRST_AUDPWM_H		107
-#define SRST_AUDPWM_S		108
+#define SRST_AUDPWM		108
 #define SRST_ACDCDIG_P		109
 #define SRST_ACDCDIG		110
 
@@ -508,6 +532,7 @@
 #define SRST_IEP_A		139
 #define SRST_IEP_H		140
 #define SRST_IEP_CORE		141
+#define SRST_ISP_RX_P		142
 
 /* cru_softrst_con9 */
 #define SRST_PDVI_NIU_A		144
@@ -519,26 +544,27 @@
 #define SRST_CIF_D		150
 #define SRST_CIF_P		151
 #define SRST_CIF_I		152
-#define SRST_CSIHOST_P		153
+#define SRST_CIF_RX_P		153
 #define SRST_PDISPP_NIU_A	154
 #define SRST_PDISPP_NIU_H	155
 #define SRST_ISPP_A		156
 #define SRST_ISPP_H		157
 #define SRST_ISPP		158
+#define SRST_CSIHOST_P		159
 
 /* cru_softrst_con10 */
 #define SRST_PDPHPMID_NIU_A	160
 #define SRST_PDPHPMID_NIU_H	161
 #define SRST_PDNVM_NIU_H	163
-#define SRST_SDCARD_H		164
+#define SRST_SDMMC_H		164
 #define SRST_SDIO_H		165
 #define SRST_EMMC_H		166
 #define SRST_SFC_H		167
 #define SRST_SFCXIP_H		168
-#define SRST_SFC_S		169
+#define SRST_SFC		169
 #define SRST_NANDC_H		170
-#define SRST_NANDC_N		171
-#define SRST_PDSDCARD_H		173
+#define SRST_NANDC		171
+#define SRST_PDSDMMC_H		173
 #define SRST_PDSDIO_H		174
 
 /* cru_softrst_con11 */
@@ -554,10 +580,9 @@
 #define SRST_USBPHYOR_HOST	185
 #define SRST_PDGMAC_NIU_A	188
 #define SRST_PDGMAC_NIU_P	189
-#define SRST_GMAC_A		190
+#define SRST_MAC_PTPREF		190
 
 /* cru_softrst_con12 */
-#define SRST_DDR_UPCTL_P	192
 #define SRST_DDR_DFICTL_P	193
 #define SRST_DDR_MON_P		194
 #define SRST_DDR_STANDBY_P	195
@@ -565,22 +590,30 @@
 #define SRST_DDR_MSCH_P		197
 #define SRST_DDR_SPLIT_A	198
 #define SRST_DDR_MSCH		199
-#define SRST_DDR_UPCTL_A	200
-#define SRST_DDR_UPCTL		201
 #define SRST_DDR_DFICTL		202
 #define SRST_DDR_STANDBY	203
+#define SRST_NPUSCR1_CORE	204
+#define SRST_NPUSCR1_NIU	205
 #define SRST_DDRPHY_P		206
 #define SRST_DDRPHY		207
 
 /* cru_softrst_con13 */
-#define SRST_NPU_A		208
-#define SRST_PDNPU_NIU_A	209
-#define SRST_NPU_H		210
-#define SRST_PDNPU_NIU_H	211
-#define SRST_NPUPVTM_P		212
-#define SRST_PDNPU_NIU_P	213
-#define SRST_NPU		214
+#define SRST_PDNPU_NIU_A	208
+#define SRST_PDNPU_NIU_H	209
+#define SRST_PDNPU_NIU_P	210
+#define SRST_NPU_A		211
+#define SRST_NPU_H		212
+#define SRST_NPU		213
+#define SRST_NPUPVTM_P		214
 #define SRST_NPUPVTM		215
+#define SRST_NPU_TSADC_P	216
+#define SRST_NPU_TSADC		217
+#define SRST_NPU_TSADCPHY	218
+#define SRST_NPU_MAILBOX_P	219
+#define SRST_CIFLITE_A		220
+#define SRST_CIFLITE_H		221
+#define SRST_CIFLITE_D		222
+#define SRST_CIFLITE_RX_P	223
 
 /* cru_softrst_con14 */
 #define SRST_TOPNIU_P		224
@@ -593,8 +626,7 @@
 #define SRST_CPU_TSADC_P	232
 #define SRST_CPU_TSADC		233
 #define SRST_CPU_TSADCPHY	234
-#define SRST_NPU_TSADC_P	235
-#define SRST_NPU_TSADC		236
-#define SRST_NPU_TSADCPHY	237
+#define SRST_CPUPVTM_P		235
+#define SRST_CPUPVTM		236
 
 #endif

commit 73d14f5be3de0c2b75f615759a3d63022491bae6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Dec 2 10:54:01 2019 +0800

    rockchip: include: add grf_rv1109.h
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I4bdd1f75a4184eb0f4ee19fe0da97f8f79c80c84

diff --git a/arch/arm/include/asm/arch-rockchip/grf_rv1109.h b/arch/arm/include/asm/arch-rockchip/grf_rv1109.h
new file mode 100644
index 0000000000..8ff3f94e48
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/grf_rv1109.h
@@ -0,0 +1,205 @@
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#ifndef _ASM_ARCH_GRF_RV1109_H
+#define _ASM_ARCH_GRF_RV1109_H
+
+#include <common.h>
+
+struct rv1109_grf {
+	unsigned int soc_con0;
+	unsigned int soc_con1;
+	unsigned int soc_con2;
+	unsigned int reserved0[1];
+	unsigned int soc_status0;
+	unsigned int soc_status1;
+	unsigned int reserved1[2];
+	unsigned int cpu_con0;
+	unsigned int cpu_con1;
+	unsigned int reserved2[2];
+	unsigned int cpu_status0;
+	unsigned int reserved3[3];
+	unsigned int noc_con0;
+	unsigned int noc_con1;
+	unsigned int noc_con2;
+	unsigned int noc_con3;
+	unsigned int usbhost_con0;
+	unsigned int usbhost_con1;
+	unsigned int usbhost_status0;
+	unsigned int usbotg_con0;
+	unsigned int usbotg_con1;
+	unsigned int usbotg_status0;
+	unsigned int usbotg_status1;
+	unsigned int usbotg_status2;
+	unsigned int mac_con0;
+	unsigned int mac_con1;
+	unsigned int mac_con2;
+	unsigned int reserved4[2];
+	unsigned int mac_status0;
+	unsigned int mac_status1;
+	unsigned int mac_status2;
+	unsigned int mem_con0;
+	unsigned int mem_con1;
+	unsigned int mem_con2;
+	unsigned int mem_con3;
+	unsigned int reserved5[(0x100 - 0x09c) / 4 - 1];
+	unsigned int tsadc_con0;
+	unsigned int reserved6[3];
+	unsigned int chip_id;
+	unsigned int reserved7[(0x10000 - 0x110) / 4 - 1];
+	unsigned int gpio0c_iomux_h;
+	unsigned int gpio0d_iomux_l;
+	unsigned int gpio0d_iomux_h;
+	unsigned int reserved8[1];
+	unsigned int gpio1a_iomux_l;
+	unsigned int gpio1a_iomux_h;
+	unsigned int gpio1b_iomux_l;
+	unsigned int gpio1b_iomux_h;
+	unsigned int gpio1c_iomux_l;
+	unsigned int gpio1c_iomux_h;
+	unsigned int gpio1d_iomux_l;
+	unsigned int gpio1d_iomux_h;
+	unsigned int gpio2a_iomux_l;
+	unsigned int gpio2a_iomux_h;
+	unsigned int gpio2b_iomux_l;
+	unsigned int gpio2b_iomux_h;
+	unsigned int gpio2c_iomux_l;
+	unsigned int gpio2c_iomux_h;
+	unsigned int gpio2d_iomux_l;
+	unsigned int gpio2d_iomux_h;
+	unsigned int gpio3a_iomux_l;
+	unsigned int gpio3a_iomux_h;
+	unsigned int gpio3b_iomux_l;
+	unsigned int gpio3b_iomux_h;
+	unsigned int gpio3c_iomux_l;
+	unsigned int gpio3c_iomux_h;
+	unsigned int gpio3d_iomux_l;
+	unsigned int gpio3d_iomux_h;
+	unsigned int gpio4a_iomux_l;
+	unsigned int reserved9[3];
+	unsigned int gpio0c_ds_h;
+	unsigned int gpio0d_ds_l;
+	unsigned int gpio0d_ds_h;
+	unsigned int reserved10[1];
+	unsigned int gpio1a_ds_l;
+	unsigned int gpio1a_ds_h;
+	unsigned int gpio1b_ds_l;
+	unsigned int gpio1b_ds_h;
+	unsigned int gpio1c_ds_l;
+	unsigned int gpio1c_ds_h;
+	unsigned int gpio1d_ds_l;
+	unsigned int gpio1d_ds_h;
+	unsigned int gpio2a_ds_l;
+	unsigned int gpio2a_ds_h;
+	unsigned int gpio2b_ds_l;
+	unsigned int gpio2b_ds_h;
+	unsigned int gpio2c_ds_l;
+	unsigned int gpio2c_ds_h;
+	unsigned int gpio2d_ds_l;
+	unsigned int gpio2d_ds_h;
+	unsigned int gpio3a_ds_l;
+	unsigned int gpio3a_ds_h;
+	unsigned int gpio3b_ds_l;
+	unsigned int gpio3b_ds_h;
+	unsigned int gpio3c_ds_l;
+	unsigned int gpio3c_ds_h;
+	unsigned int gpio3d_ds_l;
+	unsigned int gpio3d_ds_h;
+	unsigned int gpio4a_ds_l;
+	unsigned int reserved12[3];
+	unsigned int gpio0c_p_h;
+	unsigned int gpio0d_p;
+	unsigned int gpio1a_p;
+	unsigned int gpio1b_p;
+	unsigned int gpio1c_p;
+	unsigned int gpio1d_p;
+	unsigned int gpio2a_p;
+	unsigned int gpio2b_p;
+	unsigned int gpio2c_p;
+	unsigned int gpio2d_p;
+	unsigned int gpio3a_p;
+	unsigned int gpio3b_p;
+	unsigned int gpio3c_p;
+	unsigned int gpio3d_p;
+	unsigned int gpio4a_p;
+	unsigned int reserved13[1];
+	unsigned int gpio0c_ie_h;
+	unsigned int gpio0d_ie;
+	unsigned int gpio1a_ie;
+	unsigned int gpio1b_ie;
+	unsigned int gpio1c_ie;
+	unsigned int gpio1d_ie;
+	unsigned int gpio2a_ie;
+	unsigned int gpio2b_ie;
+	unsigned int gpio2c_ie;
+	unsigned int gpio2d_ie;
+	unsigned int gpio3a_ie;
+	unsigned int gpio3b_ie;
+	unsigned int gpio3c_ie;
+	unsigned int gpio3d_ie;
+	unsigned int gpio4a_ie;
+	unsigned int reserved14[1];
+	unsigned int gpio0c_smt_h;
+	unsigned int gpio0d_smt;
+	unsigned int gpio1a_smt;
+	unsigned int gpio1b_smt;
+	unsigned int gpio1c_smt;
+	unsigned int gpio1d_smt;
+	unsigned int gpio2a_smt;
+	unsigned int gpio2b_smt;
+	unsigned int gpio2c_smt;
+	unsigned int gpio2d_smt;
+	unsigned int gpio3a_smt;
+	unsigned int gpio3b_smt;
+	unsigned int gpio3c_smt;
+	unsigned int gpio3d_smt;
+	unsigned int gpio4a_smt;
+	unsigned int reserved15[(0x10200 - 0x101b8) / 4 - 1];
+	unsigned int csiphy0_con;
+	unsigned int reserved16[1];
+	unsigned int csiphy0_status;
+	unsigned int reserved17[1];
+	unsigned int csiphy1_con;
+	unsigned int reserved18[1];
+	unsigned int csiphy1_status;
+	unsigned int reserved19[1];
+	unsigned int dsiphy_con;
+	unsigned int reserved20[3];
+	unsigned int usbphy_con0;
+	unsigned int usbphy_con1;
+	unsigned int usbphy_con2;
+	unsigned int reserved21[3];
+	unsigned int usbphy_status;
+	unsigned int reserved22[1];
+	unsigned int cifio_con;
+	unsigned int sddetflt_con;
+	unsigned int uart2rx_low_con;
+	unsigned int reserved23[1];
+	unsigned int iofunc_con0;
+	unsigned int iofunc_con1;
+	unsigned int iofunc_con2;
+	unsigned int iofunc_con3;
+	unsigned int usbphy0_cfg_con;
+	unsigned int usbphy0_cfg_addrin;
+	unsigned int usbphy0_cfg_addrout;
+	unsigned int usbphy0_cfg_dly_con;
+	unsigned int usbphy1_cfg_con;
+	unsigned int usbphy1_cfg_addrin;
+	unsigned int usbphy1_cfg_addrout;
+	unsigned int usbphy1_cfg_dly_con;
+	unsigned int reserved24[(0x10300 - 0x1028c) / 4 - 1];
+	unsigned int usb_sig_detect_con;
+	unsigned int usb_sig_detect_status;
+	unsigned int usb_sig_detect_clr;
+	unsigned int reserved25[1];
+	unsigned int usb_linestate_con;
+	unsigned int usb_disconnect_con;
+	unsigned int usb_bvalid_con;
+	unsigned int usb_id_con;
+};
+
+check_member(rv1109_grf, usb_id_con, 0x1031c);
+
+#endif

commit 9b4285f197e68cd3e135543e436d36a2522e2dba
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 11 08:55:15 2019 +0800

    common.h: include stacktrace.h
    
    dump_stack() is a common function for all modules, place head
    file in common.h is convenient for them.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ic36c826617116f204e6e416f09b00a8a2061a93f

diff --git a/include/common.h b/include/common.h
index 624daaca37..9a2e2c8b4b 100644
--- a/include/common.h
+++ b/include/common.h
@@ -37,6 +37,7 @@ typedef volatile unsigned char	vu_char;
 #include <part.h>
 #include <flash.h>
 #include <image.h>
+#include <stacktrace.h>
 
 /* Bring in printf format macros if inttypes.h is included */
 #define __STDC_FORMAT_MACROS

commit 6e4be8490deb40d7423b8a94d2a94b69aee9711a
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Wed Nov 20 15:45:28 2019 +0800

    configs: rk3288: enable crypto v1
    
    enable CONFIG_DM_CRYPTO
    enable CONFIG_ROCKCHIP_CRYPTO_V1
    
    Change-Id: Ib641019dcefdc7d26f0836783701e90b857779b3
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/configs/rk3288_defconfig b/configs/rk3288_defconfig
index 80c444a128..355d6f5389 100644
--- a/configs/rk3288_defconfig
+++ b/configs/rk3288_defconfig
@@ -56,6 +56,8 @@ CONFIG_SYSCON=y
 CONFIG_SPL_SYSCON=y
 CONFIG_CLK=y
 CONFIG_SPL_CLK=y
+CONFIG_DM_CRYPTO=y
+CONFIG_ROCKCHIP_CRYPTO_V1=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y

commit fcccd23a111deef8f2fec6540edc77dd50fbe392
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 30 11:58:12 2019 +0800

    make.sh: move debug command to scripts/rkpatch.sh
    
    Change-Id: Ie9eba5a585b78c92ee56f2fca9ac412ab5068ffa
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 330a12735f..ea6b26e7e5 100755
--- a/make.sh
+++ b/make.sh
@@ -231,7 +231,7 @@ sub_commands()
 		;;
 
 		debug)
-		debug_command
+		./scripts/rkpatch.sh ${opt}
 		exit 0
 		;;
 
@@ -421,88 +421,6 @@ fixup_platform_configure()
 	fi
 }
 
-debug_command()
-{
-		if [ "${cmd}" = 'debug' -a "${opt}" = 'debug' ]; then
-			echo
-			echo "The commands will modify .config and files, and can't auto restore changes!"
-			echo "debug-N, the N:"
-			echo "    1. lib/initcall.c debug() -> printf()"
-			echo "    2. common/board_r.c and common/board_f.c debug() -> printf()"
-			echo "    3. global #define DEBUG"
-			echo "    4. enable CONFIG_ROCKCHIP_DEBUGGER"
-			echo "    5. enable CONFIG_ROCKCHIP_CRC"
-			echo "    6. enable CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP"
-			echo "    7. enable CONFIG_ROCKCHIP_CRASH_DUMP"
-			echo "    8. set CONFIG_BOOTDELAY=5"
-			echo "    9. armv7 start.S: print entry warning"
-			echo "   10. armv8 start.S: print entry warning"
-			echo "   11. firmware bootflow debug() -> printf()"
-			echo "   12. bootstage timing report"
-			echo
-			echo "Enabled: "
-			grep '^CONFIG_ROCKCHIP_DEBUGGER=y' .config > /dev/null \
-			&& echo "    CONFIG_ROCKCHIP_DEBUGGER"
-			grep '^CONFIG_ROCKCHIP_CRC=y' .config > /dev/null \
-			&& echo "    CONFIG_ROCKCHIP_CRC"
-			grep '^CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP=y' .config > /dev/null \
-			&& echo "    CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP"
-			grep '^CONFIG_ROCKCHIP_CRASH_DUMP=y' .config > /dev/null \
-			&& echo "    CONFIG_ROCKCHIP_CRASH_DUMP"
-
-		elif [ "${opt}" = '1' ]; then
-			sed -i 's/\<debug\>/printf/g' lib/initcall.c
-			sed -i 's/ifdef DEBUG/if 1/g' lib/initcall.c
-			echo "DEBUG [1]: lib/initcall.c debug() -> printf()"
-		elif [ "${opt}" = '2' ]; then
-			sed -i 's/\<debug\>/printf/g' ./common/board_f.c
-			sed -i 's/\<debug\>/printf/g' ./common/board_r.c
-			echo "DEBUG [2]: common/board_r.c and common/board_f.c debug() -> printf()"
-		elif [ "${opt}" = '3' ]; then
-			sed -i '$i \#define DEBUG\' include/configs/rockchip-common.h
-			echo "DEBUG [3]: global #define DEBUG"
-		elif [ "${opt}" = '4' ]; then
-			sed -i 's/\# CONFIG_ROCKCHIP_DEBUGGER is not set/CONFIG_ROCKCHIP_DEBUGGER=y/g' .config
-			echo "DEBUG [4]: CONFIG_ROCKCHIP_DEBUGGER is enabled"
-		elif [ "${opt}" = '5' ]; then
-			sed -i 's/\# CONFIG_ROCKCHIP_CRC is not set/CONFIG_ROCKCHIP_CRC=y/g' .config
-			echo "DEBUG [5]: CONFIG_ROCKCHIP_CRC is enabled"
-		elif [ "${opt}" = '6' ]; then
-			sed -i 's/\# CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP is not set/CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP=y/g' .config
-			echo "DEBUG [6]: CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP is enabled"
-		elif [ "${opt}" = '7' ]; then
-			sed -i 's/\# CONFIG_ROCKCHIP_CRASH_DUMP is not set/CONFIG_ROCKCHIP_CRASH_DUMP=y/g' .config
-			echo "DEBUG [7]: CONFIG_ROCKCHIP_CRASH_DUMP is enabled"
-		elif [ "${opt}" = '8' ]; then
-			sed -i 's/^CONFIG_BOOTDELAY=0/CONFIG_BOOTDELAY=5/g' .config
-			echo "DEBUG [8]: CONFIG_BOOTDELAY is 5s"
-		elif [ "${opt}" = '9' ]; then
-			sed -i '/save_boot_params_ret:/a\ldr r0, =CONFIG_DEBUG_UART_BASE\nmov r1, #100\nloop:\nmov r2, #0x55\nstr r2, [r0]\nsub r1, r1, #1\ncmp r1, #0\nbne loop\ndsb' \
-			./arch/arm/cpu/armv7/start.S
-			echo "DEBUG [9]: armv7 start.S entry warning 'UUUU...'"
-		elif [ "${opt}" = '10' ]; then
-			sed -i '/save_boot_params_ret:/a\ldr x0, =CONFIG_DEBUG_UART_BASE\nmov x1, #100\nloop:\nmov x2, #0x55\nstr x2, [x0]\nsub x1, x1, #1\ncmp x1, #0\nb.ne loop\ndsb sy' \
-			./arch/arm/cpu/armv8/start.S
-			echo "DEBUG [10]: armv8 start.S entry warning 'UUUU...'"
-		elif [ "${opt}" = '11' ]; then
-			sed -i 's/\<debug\>/printf/g' common/fdt_support.c
-			sed -i 's/\<debug\>/printf/g' common/image-fdt.c
-			sed -i 's/\<debug\>/printf/g' common/image.c
-			sed -i 's/\<debug\>/printf/g' arch/arm/lib/bootm.c
-			sed -i 's/\<debug\>/printf/g' common/bootm.c
-			sed -i 's/\<debug\>/printf/g' common/image.c
-			sed -i 's/\<debug\>/printf/g' common/image-android.c
-			sed -i 's/\<debug\>/printf/g' common/android_bootloader.c
-			echo "DEBUG [11]: firmware bootflow debug() -> printf()"
-		elif [ "${opt}" = '12' ]; then
-			sed -i '$a\CONFIG_BOOTSTAGE=y\' .config
-			sed -i '$a\CONFIG_BOOTSTAGE_REPORT=y\' .config
-			sed -i '$a\CONFIG_CMD_BOOTSTAGE=y\' .config
-			echo "DEBUG [12]: bootstage timing report"
-		fi
-		echo
-}
-
 pack_uboot_image()
 {
 	local UBOOT_LOAD_ADDR UBOOT_MAX_KB UBOOT_KB HEAD_KB=2
diff --git a/scripts/rkpatch.sh b/scripts/rkpatch.sh
new file mode 100755
index 0000000000..3e53f69a06
--- /dev/null
+++ b/scripts/rkpatch.sh
@@ -0,0 +1,109 @@
+#!/bin/bash
+#
+# Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier: GPL-2.0
+#
+
+case $1 in
+--help|-help|help|--h|-h|debug|'')
+	echo
+	echo "    1. lib/initcall.c debug() -> printf()"
+	echo "    2. common/board_r.c and common/board_f.c debug() -> printf()"
+	echo "    3. global #define DEBUG"
+	echo "    4. enable CONFIG_ROCKCHIP_DEBUGGER"
+	echo "    5. enable CONFIG_ROCKCHIP_CRC"
+	echo "    6. enable CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP"
+	echo "    7. enable CONFIG_ROCKCHIP_CRASH_DUMP"
+	echo "    8. set CONFIG_BOOTDELAY=5"
+	echo "    9. armv7 start.S: print entry warning"
+	echo "   10. armv8 start.S: print entry warning"
+	echo "   11. firmware bootflow debug() -> printf()"
+	echo "   12. bootstage timing report"
+	echo "   13. starting kernel halt dump"
+	echo
+	echo "Enabled in .config: "
+	grep '^CONFIG_ROCKCHIP_DEBUGGER=y' .config > /dev/null \
+	&& echo "    CONFIG_ROCKCHIP_DEBUGGER"
+	grep '^CONFIG_ROCKCHIP_CRC=y' .config > /dev/null \
+	&& echo "    CONFIG_ROCKCHIP_CRC"
+	grep '^CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP=y' .config > /dev/null \
+	&& echo "    CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP"
+	grep '^CONFIG_ROCKCHIP_CRASH_DUMP=y' .config > /dev/null \
+	&& echo "    CONFIG_ROCKCHIP_CRASH_DUMP"
+	;;
+1)
+	sed -i 's/\<debug\>/printf/g' lib/initcall.c
+	sed -i 's/ifdef DEBUG/if 1/g' lib/initcall.c
+	echo "DEBUG [1]: lib/initcall.c debug() -> printf()"
+	;;
+2)
+	sed -i 's/\<debug\>/printf/g' ./common/board_f.c
+	sed -i 's/\<debug\>/printf/g' ./common/board_r.c
+	echo "DEBUG [2]: common/board_r.c and common/board_f.c debug() -> printf()"
+	;;
+3)
+	sed -i '$i \#define DEBUG\' include/configs/rockchip-common.h
+	echo "DEBUG [3]: global #define DEBUG"
+	;;
+4)
+	sed -i 's/\# CONFIG_ROCKCHIP_DEBUGGER is not set/CONFIG_ROCKCHIP_DEBUGGER=y/g' .config
+	echo "DEBUG [4]: CONFIG_ROCKCHIP_DEBUGGER is enabled"
+	;;
+5)
+	sed -i 's/\# CONFIG_ROCKCHIP_CRC is not set/CONFIG_ROCKCHIP_CRC=y/g' .config
+	echo "DEBUG [5]: CONFIG_ROCKCHIP_CRC is enabled"
+	;;
+6)
+	sed -i 's/\# CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP is not set/CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP=y/g' .config
+	echo "DEBUG [6]: CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP is enabled"
+	;;
+7)
+	sed -i 's/\# CONFIG_ROCKCHIP_CRASH_DUMP is not set/CONFIG_ROCKCHIP_CRASH_DUMP=y/g' .config
+	echo "DEBUG [7]: CONFIG_ROCKCHIP_CRASH_DUMP is enabled"
+	;;
+8)
+	sed -i 's/^CONFIG_BOOTDELAY=0/CONFIG_BOOTDELAY=5/g' .config
+	echo "DEBUG [8]: CONFIG_BOOTDELAY is 5s"
+	;;
+9)
+	sed -i '/save_boot_params_ret:/a\ldr r0, =CONFIG_DEBUG_UART_BASE\nmov r1, #100\nloop:\nmov r2, #0x55\nstr r2, [r0]\nsub r1, r1, #1\ncmp r1, #0\nbne loop\ndsb' \
+	./arch/arm/cpu/armv7/start.S
+	echo "DEBUG [9]: armv7 start.S entry warning 'UUUU...'"
+	;;
+10)
+	sed -i '/save_boot_params_ret:/a\ldr x0, =CONFIG_DEBUG_UART_BASE\nmov x1, #100\nloop:\nmov x2, #0x55\nstr x2, [x0]\nsub x1, x1, #1\ncmp x1, #0\nb.ne loop\ndsb sy' \
+	./arch/arm/cpu/armv8/start.S
+	echo "DEBUG [10]: armv8 start.S entry warning 'UUUU...'"
+	;;
+11)
+	sed -i 's/\<debug\>/printf/g' common/fdt_support.c
+	sed -i 's/\<debug\>/printf/g' common/image-fdt.c
+	sed -i 's/\<debug\>/printf/g' common/image.c
+	sed -i 's/\<debug\>/printf/g' arch/arm/lib/bootm.c
+	sed -i 's/\<debug\>/printf/g' common/bootm.c
+	sed -i 's/\<debug\>/printf/g' common/image.c
+	sed -i 's/\<debug\>/printf/g' common/image-android.c
+	sed -i 's/\<debug\>/printf/g' common/android_bootloader.c
+	echo "DEBUG [11]: firmware bootflow debug() -> printf()"
+	;;
+12)
+	sed -i '$a\CONFIG_BOOTSTAGE=y\' .config
+	sed -i '$a\CONFIG_BOOTSTAGE_REPORT=y\' .config
+	sed -i '$a\CONFIG_CMD_BOOTSTAGE=y\' .config
+	echo "DEBUG [12]: bootstage timing report"
+	;;
+13)
+	sed -i 's/\# CONFIG_ROCKCHIP_DEBUGGER is not set/CONFIG_ROCKCHIP_DEBUGGER=y/g' .config
+	sed -i '/br x4/i\b .' arch/arm/cpu/armv8/transition.S
+	sed -i 's/announce_and_cleanup(fake);/if (0)announce_and_cleanup(fake);/g' arch/arm/lib/bootm.c
+	sed -i '/announce_and_cleanup(fake)/a\enable_interrupts()\;' arch/arm/lib/bootm.c
+	sed -i '/kernel_entry(0, machid, r2)/i\printf("#### Jump to kernel!!")\;' arch/arm/lib/bootm.c
+	sed -i '/kernel_entry(0, machid, r2)/i\__asm("b .")\;' arch/arm/lib/bootm.c
+	sed -i 's/\<debug\>/printf/g' arch/arm/lib/bootm.c
+	echo "DEBUG [13]: starting kernel halt dump"
+	;;
+*)
+	echo "Unknown command: $1"
+esac
+echo

commit d6e1155e0cf8e7aedea400fb71cfa2248ef494ae
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 10 15:16:04 2019 +0800

    make.sh: remove "all" mode for loader and trust
    
    This is a early function, we can assign the ini file now:
    
    ./make.sh loader <ini>
    ./make.sh trust  <ini>
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I35e02a155ca622003af717f4b9ccf76741d7576e

diff --git a/make.sh b/make.sh
index b75474e4ff..330a12735f 100755
--- a/make.sh
+++ b/make.sh
@@ -94,10 +94,8 @@ help()
 	echo "2. Pack:"
 	echo "	./make.sh uboot                    --- pack uboot.img"
 	echo "	./make.sh trust                    --- pack trust.img"
-	echo "	./make.sh trust-all                --- pack trust img (all supported)"
 	echo "	./make.sh trust <ini>              --- pack trust img with assigned ini file"
 	echo "	./make.sh loader                   --- pack loader bin"
-	echo "	./make.sh loader-all	           --- pack loader bin (all supported)"
 	echo "	./make.sh loader <ini>             --- pack loader img with assigned ini file"
 	echo "	./make.sh spl                      --- pack loader with u-boot-spl.bin and u-boot-tpl.bin"
 	echo "	./make.sh spl-s                    --- pack loader only replace miniloader with u-boot-spl.bin"
@@ -248,12 +246,12 @@ sub_commands()
 		;;
 
 		trust)
-		pack_trust_image ${opt}
+		pack_trust_image
 		exit 0
 		;;
 
 		loader)
-		pack_loader_image ${opt}
+		pack_loader_image
 		exit 0
 		;;
 
@@ -533,13 +531,8 @@ pack_uboot_image()
 	${RKTOOLS}/loaderimage --pack --uboot u-boot.bin uboot.img ${UBOOT_LOAD_ADDR} ${PLATFORM_UBOOT_IMG_SIZE}
 
 	# Delete u-boot.img and u-boot-dtb.img, which makes users not be confused with final uboot.img
-	if [ -f u-boot.img ]; then
-		rm u-boot.img
-	fi
-
-	if [ -f u-boot-dtb.img ]; then
-		rm u-boot-dtb.img
-	fi
+	ls u-boot.img >/dev/null 2>&1 && rm u-boot.img -rf
+	ls u-boot-dtb.img >/dev/null 2>&1 && rm u-boot-dtb.img -rf
 	echo "pack uboot okay! Input: u-boot.bin"
 }
 
@@ -599,13 +592,10 @@ pack_spl_loader_image()
 		return
 	fi
 
-	# Copy to .temp folder
-	if [ -d ${RKBIN}/.temp ]; then
-		rm ${RKBIN}/.temp -rf
-	fi
-
+	ls ${RKBIN}/.temp >/dev/null 2>&1 && rm ${RKBIN}/.temp -rf
 	mkdir ${RKBIN}/.temp
 
+	# Copy to .temp folder
 	cp spl/u-boot-spl.bin ${RKBIN}/.temp/
 	cp tpl/u-boot-tpl.bin ${RKBIN}/.temp/
 	cp ${ini} ${RKBIN}/.temp/${RKCHIP_LOADER}MINIALL.ini -f
@@ -633,7 +623,7 @@ pack_spl_loader_image()
 
 pack_loader_image()
 {
-	local mode=$1 files ini=${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL.ini
+	local ini=${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL.ini
 
 	if [ "$FILE" != "" ]; then
 		ini=$FILE;
@@ -656,24 +646,13 @@ pack_loader_image()
 
 	cd ${RKBIN}
 
-	if [ "${mode}" = 'all' ]; then
-		files=`ls ${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL*.ini`
-		for ini in $files
-		do
-			if [ -f "$ini" ]; then
-				${RKTOOLS}/boot_merger ${BIN_PATH_FIXUP} $ini
-				echo "pack loader okay! Input: $ini"
-			fi
-		done
-	else
-		${RKTOOLS}/boot_merger ${BIN_PATH_FIXUP} $ini
-		echo "pack loader okay! Input: $ini"
-	fi
+	${RKTOOLS}/boot_merger ${BIN_PATH_FIXUP} $ini
+	echo "pack loader okay! Input: $ini"
 
 	cd - && mv ${RKBIN}/*_loader_*.bin ./
 }
 
-__pack_32bit_trust_image()
+pack_32bit_trust_image()
 {
 	local ini=$1 TOS TOS_TA DARM_BASE TEE_LOAD_ADDR TEE_OUTPUT TEE_OFFSET
 
@@ -720,7 +699,7 @@ __pack_32bit_trust_image()
 	echo
 }
 
-__pack_64bit_trust_image()
+pack_64bit_trust_image()
 {
 	local ini=$1
 
@@ -740,7 +719,7 @@ __pack_64bit_trust_image()
 
 pack_trust_image()
 {
-	local mode=$1 files ini
+	local ini
 
 	ls trust*.img >/dev/null 2>&1 && rm trust*.img
 
@@ -758,32 +737,14 @@ pack_trust_image()
 			echo "pack trust okay! Input: ${ini}"
 			return;
 		fi
-
-		if [ "${mode}" = 'all' ]; then
-			files=`ls ${RKBIN}/RKTRUST/${RKCHIP_TRUST}TRUST*.ini`
-			for ini in $files
-			do
-				__pack_64bit_trust_image ${ini}
-			done
-		else
-			__pack_64bit_trust_image ${ini}
-		fi
+		pack_64bit_trust_image ${ini}
 	# ARM uses loaderimage
 	else
 		ini=${RKBIN}/RKTRUST/${RKCHIP_TRUST}TOS.ini
 		if [ "$FILE" != "" ]; then
 			ini=$FILE;
 		fi
-
-		if [ "${mode}" = 'all' ]; then
-			files=`ls ${RKBIN}/RKTRUST/${RKCHIP_TRUST}TOS*.ini`
-			for ini in $files
-			do
-				__pack_32bit_trust_image ${ini}
-			done
-		else
-			__pack_32bit_trust_image ${ini}
-		fi
+		pack_32bit_trust_image ${ini}
 	fi
 }
 

commit d6821889dff223a1d138ad5a53fb2b5302a1f4ef
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 10 14:37:22 2019 +0800

    make.sh: remove "O=<dir>" support
    
    It seems useless at the most time and makes this
    script complicated.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I157c7e036451dae79453706bbfcc81860686bfe5

diff --git a/make.sh b/make.sh
index 1f9bd20a6e..b75474e4ff 100755
--- a/make.sh
+++ b/make.sh
@@ -79,7 +79,6 @@ help()
 	echo
 	echo "	 - board:   board name of defconfig"
 	echo "	 - subcmd:  |elf*|loader*|spl*|itb||trust*|uboot|map|sym|<addr>|"
-	echo "	 - O=<dir>: assigned output directory, not recommend"
 	echo "	 - ini:     assigned ini file to pack trust/loader"
 	echo
 	echo "Output:"
@@ -87,13 +86,12 @@ help()
 	echo
 	echo "Example:"
 	echo
-	echo "1. Build board:"
+	echo "1. Build:"
 	echo "	./make.sh evb-rk3399               --- build for evb-rk3399_defconfig"
-	echo "	./make.sh evb-rk3399 O=rockdev     --- build for evb-rk3399_defconfig with output dir "./rockdev""
 	echo "	./make.sh firefly-rk3288           --- build for firefly-rk3288_defconfig"
 	echo "	./make.sh                          --- build with exist .config"
 	echo
-	echo "2. Pack helper:"
+	echo "2. Pack:"
 	echo "	./make.sh uboot                    --- pack uboot.img"
 	echo "	./make.sh trust                    --- pack trust.img"
 	echo "	./make.sh trust-all                --- pack trust img (all supported)"
@@ -105,7 +103,7 @@ help()
 	echo "	./make.sh spl-s                    --- pack loader only replace miniloader with u-boot-spl.bin"
 	echo "	./make.sh itb                      --- pack u-boot.itb(TODO: bl32 is not included for ARMv8)"
 	echo
-	echo "3. Debug helper:"
+	echo "3. Debug:"
 	echo "	./make.sh elf                      --- dump elf file with -D(default)"
 	echo "	./make.sh elf-S                    --- dump elf file with -S"
 	echo "	./make.sh elf-d                    --- dump elf file with -d"
@@ -120,44 +118,17 @@ prepare()
 {
 	local absolute_path cmd dir count
 
-	# Parse output directory 'O=<dir>'
-	cmd=${OUTDIR%=*}
-	if [ "${cmd}" = 'O' ]; then
-		OUTDIR=${OUTDIR#*=}
-		OUTOPT=O=${OUTDIR}
-	else
-		case $BOARD in
-			# Parse from exit .config
-			''|elf*|loader*|spl*|itb|debug*|trust|uboot|map|sym)
-			count=`find -name .config | wc -l`
-			dir=`find -name .config`
-			# Good, find only one .config
-			if [ $count -eq 1 ]; then
-				dir=${dir%/*}
-				OUTDIR=${dir#*/}
-				# Set OUTOPT if not current directory
-				if [ $OUTDIR != '.' ]; then
-					OUTOPT=O=${OUTDIR}
-				fi
-			elif [ $count -eq 0 ]; then
-				echo
-				echo "Build failed, Can't find .config"
-				help
-				exit 1
-			else
-				echo
-				echo "Build failed, find $count '.config': "
-				echo "$dir"
-				echo "Please leave only one of them"
-				exit 1
-			fi
-			;;
-
-			*)
-			OUTDIR=.
-			;;
-		esac
-	fi
+	case $BOARD in
+		# Parse from exit .config
+		''|elf*|loader*|spl*|itb|debug*|trust|uboot|map|sym)
+		if [ ! -f .config ]; then
+			echo
+			echo "Build failed, Can't find .config"
+			help
+			exit 1
+		fi
+		;;
+	esac
 
 	# Parse help and make defconfig
 	case $BOARD in
@@ -210,7 +181,7 @@ select_toolchain()
 {
 	local absolute_path
 
-	if grep  -q '^CONFIG_ARM64=y' ${OUTDIR}/.config ; then
+	if grep  -q '^CONFIG_ARM64=y' .config ; then
 		if [ -d ${TOOLCHAIN_ARM64} ]; then
 			absolute_path=$(cd `dirname ${TOOLCHAIN_ARM64}`; pwd)
 			TOOLCHAIN_GCC=${absolute_path}/bin/${GCC_ARM64}
@@ -238,7 +209,7 @@ select_toolchain()
 sub_commands()
 {
 	local cmd=${SUBCMD%-*} opt=${SUBCMD#*-}
-	local elf=${OUTDIR}/u-boot map=${OUTDIR}/u-boot.map sym=${OUTDIR}/u-boot.sym
+	local elf=u-boot map=u-boot.map sym=u-boot.sym
 
 	if [ "$FILE" == "tpl" -o "$FILE" == "spl" ]; then
 		elf=`find -name u-boot-${FILE}`
@@ -351,31 +322,31 @@ select_chip_info()
 	#  - RK????, RK????X
 	#  - RV????
 	local chip_reg='^CONFIG_ROCKCHIP_[R,P][X,V,K][0-9ESX]{1,5}'
-	count=`egrep -c ${chip_reg} ${OUTDIR}/.config`
+	count=`egrep -c ${chip_reg} .config`
 	# Obtain the matching only
-	RKCHIP=`egrep -o ${chip_reg} ${OUTDIR}/.config`
+	RKCHIP=`egrep -o ${chip_reg} .config`
 
 	if [ $count -eq 1 ]; then
 		RKCHIP=${RKCHIP##*_}
-		grep '^CONFIG_ROCKCHIP_RK3368=y' ${OUTDIR}/.config >/dev/null \
+		grep '^CONFIG_ROCKCHIP_RK3368=y' .config >/dev/null \
 			&& RKCHIP=RK3368H
-		grep '^CONFIG_ROCKCHIP_RV1108=y' ${OUTDIR}/.config >/dev/null \
+		grep '^CONFIG_ROCKCHIP_RV1108=y' .config >/dev/null \
 			&& RKCHIP=RV110X
 	elif [ $count -gt 1 ]; then
 		# Grep the RK CHIP variant
-		grep '^CONFIG_ROCKCHIP_PX3SE=y' ${OUTDIR}/.config > /dev/null \
+		grep '^CONFIG_ROCKCHIP_PX3SE=y' .config > /dev/null \
 			&& RKCHIP=PX3SE
-		grep '^CONFIG_ROCKCHIP_RK3126=y' ${OUTDIR}/.config >/dev/null \
+		grep '^CONFIG_ROCKCHIP_RK3126=y' .config >/dev/null \
 			&& RKCHIP=RK3126
-		grep '^CONFIG_ROCKCHIP_RK3326=y' ${OUTDIR}/.config >/dev/null \
+		grep '^CONFIG_ROCKCHIP_RK3326=y' .config >/dev/null \
 			&& RKCHIP=RK3326
-		grep '^CONFIG_ROCKCHIP_RK3128X=y' ${OUTDIR}/.config >/dev/null \
+		grep '^CONFIG_ROCKCHIP_RK3128X=y' .config >/dev/null \
 			&& RKCHIP=RK3128X
-		grep '^CONFIG_ROCKCHIP_PX5=y' ${OUTDIR}/.config >/dev/null \
+		grep '^CONFIG_ROCKCHIP_PX5=y' .config >/dev/null \
 			&& RKCHIP=PX5
-		grep '^CONFIG_ROCKCHIP_RK3399PRO=y' ${OUTDIR}/.config >/dev/null \
+		grep '^CONFIG_ROCKCHIP_RK3399PRO=y' .config >/dev/null \
 			&& RKCHIP=RK3399PRO
-		grep '^CONFIG_ROCKCHIP_RK1806=y' ${OUTDIR}/.config >/dev/null \
+		grep '^CONFIG_ROCKCHIP_RK1806=y' .config >/dev/null \
 			&& RKCHIP=RK1806
 	else
 		echo "Can't get Rockchip SoC definition in .config"
@@ -391,7 +362,7 @@ select_chip_info()
 	for item in "${RKCHIP_INI_DESC[@]}"
 	do
 		target_board=`echo $item | awk '{ print $1 }'`
-		if grep  -q "^${target_board}=y" ${OUTDIR}/.config ; then
+		if grep  -q "^${target_board}=y" .config ; then
 			value=`echo $item | awk '{ print $2 }'`
 			if [ "$value" != "NA" ]; then
 				RKCHIP_LABEL=${value};
@@ -428,7 +399,7 @@ fixup_platform_configure()
 
 # <*> Fixup images size pack for platforms
 	if [ $RKCHIP = "RK3308" ]; then
-		if grep -q '^CONFIG_ARM64_BOOT_AARCH32=y' ${OUTDIR}/.config ; then
+		if grep -q '^CONFIG_ARM64_BOOT_AARCH32=y' .config ; then
 			PLATFORM_UBOOT_IMG_SIZE="--size 512 2"
 			PLATFORM_TRUST_IMG_SIZE="--size 512 2"
 		else
@@ -441,7 +412,7 @@ fixup_platform_configure()
 	fi
 
 # <*> Fixup AARCH32 for ARM64 cpu platforms
-	if grep -q '^CONFIG_ARM64_BOOT_AARCH32=y' ${OUTDIR}/.config ; then
+	if grep -q '^CONFIG_ARM64_BOOT_AARCH32=y' .config ; then
 		if [ $RKCHIP = "RK3308" ]; then
 			RKCHIP_LABEL=${RKCHIP_LABEL}"AARCH32"
 			RKCHIP_TRUST=${RKCHIP_TRUST}"AARCH32"
@@ -472,13 +443,13 @@ debug_command()
 			echo "   12. bootstage timing report"
 			echo
 			echo "Enabled: "
-			grep '^CONFIG_ROCKCHIP_DEBUGGER=y' ${OUTDIR}/.config > /dev/null \
+			grep '^CONFIG_ROCKCHIP_DEBUGGER=y' .config > /dev/null \
 			&& echo "    CONFIG_ROCKCHIP_DEBUGGER"
-			grep '^CONFIG_ROCKCHIP_CRC=y' ${OUTDIR}/.config > /dev/null \
+			grep '^CONFIG_ROCKCHIP_CRC=y' .config > /dev/null \
 			&& echo "    CONFIG_ROCKCHIP_CRC"
-			grep '^CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP=y' ${OUTDIR}/.config > /dev/null \
+			grep '^CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP=y' .config > /dev/null \
 			&& echo "    CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP"
-			grep '^CONFIG_ROCKCHIP_CRASH_DUMP=y' ${OUTDIR}/.config > /dev/null \
+			grep '^CONFIG_ROCKCHIP_CRASH_DUMP=y' .config > /dev/null \
 			&& echo "    CONFIG_ROCKCHIP_CRASH_DUMP"
 
 		elif [ "${opt}" = '1' ]; then
@@ -493,19 +464,19 @@ debug_command()
 			sed -i '$i \#define DEBUG\' include/configs/rockchip-common.h
 			echo "DEBUG [3]: global #define DEBUG"
 		elif [ "${opt}" = '4' ]; then
-			sed -i 's/\# CONFIG_ROCKCHIP_DEBUGGER is not set/CONFIG_ROCKCHIP_DEBUGGER=y/g' ${OUTDIR}/.config
+			sed -i 's/\# CONFIG_ROCKCHIP_DEBUGGER is not set/CONFIG_ROCKCHIP_DEBUGGER=y/g' .config
 			echo "DEBUG [4]: CONFIG_ROCKCHIP_DEBUGGER is enabled"
 		elif [ "${opt}" = '5' ]; then
-			sed -i 's/\# CONFIG_ROCKCHIP_CRC is not set/CONFIG_ROCKCHIP_CRC=y/g' ${OUTDIR}/.config
+			sed -i 's/\# CONFIG_ROCKCHIP_CRC is not set/CONFIG_ROCKCHIP_CRC=y/g' .config
 			echo "DEBUG [5]: CONFIG_ROCKCHIP_CRC is enabled"
 		elif [ "${opt}" = '6' ]; then
-			sed -i 's/\# CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP is not set/CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP=y/g' ${OUTDIR}/.config
+			sed -i 's/\# CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP is not set/CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP=y/g' .config
 			echo "DEBUG [6]: CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP is enabled"
 		elif [ "${opt}" = '7' ]; then
-			sed -i 's/\# CONFIG_ROCKCHIP_CRASH_DUMP is not set/CONFIG_ROCKCHIP_CRASH_DUMP=y/g' ${OUTDIR}/.config
+			sed -i 's/\# CONFIG_ROCKCHIP_CRASH_DUMP is not set/CONFIG_ROCKCHIP_CRASH_DUMP=y/g' .config
 			echo "DEBUG [7]: CONFIG_ROCKCHIP_CRASH_DUMP is enabled"
 		elif [ "${opt}" = '8' ]; then
-			sed -i 's/^CONFIG_BOOTDELAY=0/CONFIG_BOOTDELAY=5/g' ${OUTDIR}/.config
+			sed -i 's/^CONFIG_BOOTDELAY=0/CONFIG_BOOTDELAY=5/g' .config
 			echo "DEBUG [8]: CONFIG_BOOTDELAY is 5s"
 		elif [ "${opt}" = '9' ]; then
 			sed -i '/save_boot_params_ret:/a\ldr r0, =CONFIG_DEBUG_UART_BASE\nmov r1, #100\nloop:\nmov r2, #0x55\nstr r2, [r0]\nsub r1, r1, #1\ncmp r1, #0\nbne loop\ndsb' \
@@ -526,9 +497,9 @@ debug_command()
 			sed -i 's/\<debug\>/printf/g' common/android_bootloader.c
 			echo "DEBUG [11]: firmware bootflow debug() -> printf()"
 		elif [ "${opt}" = '12' ]; then
-			sed -i '$a\CONFIG_BOOTSTAGE=y\' ${OUTDIR}/.config
-			sed -i '$a\CONFIG_BOOTSTAGE_REPORT=y\' ${OUTDIR}/.config
-			sed -i '$a\CONFIG_CMD_BOOTSTAGE=y\' ${OUTDIR}/.config
+			sed -i '$a\CONFIG_BOOTSTAGE=y\' .config
+			sed -i '$a\CONFIG_BOOTSTAGE_REPORT=y\' .config
+			sed -i '$a\CONFIG_CMD_BOOTSTAGE=y\' .config
 			echo "DEBUG [12]: bootstage timing report"
 		fi
 		echo
@@ -554,22 +525,22 @@ pack_uboot_image()
 	fi
 
 	# Pack image
-	UBOOT_LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
+	UBOOT_LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" include/autoconf.mk|tr -d '\r'`
 	if [ ! $UBOOT_LOAD_ADDR ]; then
-		UBOOT_LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${OUTDIR}/.config|tr -d '\r'`
+		UBOOT_LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" .config|tr -d '\r'`
 	fi
 
-	${RKTOOLS}/loaderimage --pack --uboot ${OUTDIR}/u-boot.bin uboot.img ${UBOOT_LOAD_ADDR} ${PLATFORM_UBOOT_IMG_SIZE}
+	${RKTOOLS}/loaderimage --pack --uboot u-boot.bin uboot.img ${UBOOT_LOAD_ADDR} ${PLATFORM_UBOOT_IMG_SIZE}
 
 	# Delete u-boot.img and u-boot-dtb.img, which makes users not be confused with final uboot.img
-	if [ -f ${OUTDIR}/u-boot.img ]; then
-		rm ${OUTDIR}/u-boot.img
+	if [ -f u-boot.img ]; then
+		rm u-boot.img
 	fi
 
-	if [ -f ${OUTDIR}/u-boot-dtb.img ]; then
-		rm ${OUTDIR}/u-boot-dtb.img
+	if [ -f u-boot-dtb.img ]; then
+		rm u-boot-dtb.img
 	fi
-	echo "pack uboot okay! Input: ${OUTDIR}/u-boot.bin"
+	echo "pack uboot okay! Input: u-boot.bin"
 }
 
 pack_uboot_itb_image()
@@ -577,7 +548,7 @@ pack_uboot_itb_image()
 	local ini
 
 	# ARM64
-	if grep -Eq ''^CONFIG_ARM64=y'|'^CONFIG_ARM64_BOOT_AARCH32=y'' ${OUTDIR}/.config ; then
+	if grep -Eq ''^CONFIG_ARM64=y'|'^CONFIG_ARM64_BOOT_AARCH32=y'' .config ; then
 		ini=${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST.ini
 		if [ ! -f ${ini} ]; then
 			echo "pack trust failed! Can't find: ${ini}"
@@ -635,8 +606,8 @@ pack_spl_loader_image()
 
 	mkdir ${RKBIN}/.temp
 
-	cp ${OUTDIR}/spl/u-boot-spl.bin ${RKBIN}/.temp/
-	cp ${OUTDIR}/tpl/u-boot-tpl.bin ${RKBIN}/.temp/
+	cp spl/u-boot-spl.bin ${RKBIN}/.temp/
+	cp tpl/u-boot-tpl.bin ${RKBIN}/.temp/
 	cp ${ini} ${RKBIN}/.temp/${RKCHIP_LOADER}MINIALL.ini -f
 
 	cd ${RKBIN}
@@ -726,7 +697,7 @@ __pack_32bit_trust_image()
 	fi
 
 	# OP-TEE is 132M(0x8400000) offset from DRAM base.
-	DARM_BASE=`sed -n "/CONFIG_SYS_SDRAM_BASE=/s/CONFIG_SYS_SDRAM_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
+	DARM_BASE=`sed -n "/CONFIG_SYS_SDRAM_BASE=/s/CONFIG_SYS_SDRAM_BASE=//p" include/autoconf.mk|tr -d '\r'`
 	TEE_LOAD_ADDR=$((DARM_BASE+TEE_OFFSET))
 
 	# Convert Dec to Hex
@@ -774,7 +745,7 @@ pack_trust_image()
 	ls trust*.img >/dev/null 2>&1 && rm trust*.img
 
 	# ARM64 uses trust_merger
-	if grep -Eq ''^CONFIG_ARM64=y'|'^CONFIG_ARM64_BOOT_AARCH32=y'' ${OUTDIR}/.config ; then
+	if grep -Eq ''^CONFIG_ARM64=y'|'^CONFIG_ARM64_BOOT_AARCH32=y'' .config ; then
 		ini=${RKBIN}/RKTRUST/${RKCHIP_TRUST}TRUST.ini
 		if [ "$FILE" != "" ]; then
 			ini=$FILE;

commit 61533898056403823f2bd1f2ae8fc18e9dbe764c
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Dec 5 20:03:19 2019 +0800

    fastboot: delete command at-disable-unlock-vboot
    
    It is no need to support this command that it makes difficult
    to debug when disable unlock device.
    
    Change-Id: I1f38d9d0d12aa8a7cbadf5c87567e52fb712013e
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index e9f86745af..5f2eeaa777 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -2108,17 +2108,6 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 		}
 #else
 		fastboot_tx_write_str("FAILnot implemented");
-#endif
-	} else if (strncmp("at-disable-unlock-vboot", cmd + 4, 23) == 0) {
-#ifdef CONFIG_RK_AVB_LIBAVB_USER
-		uint8_t lock_state;
-		lock_state = 2;
-		if (rk_avb_write_lock_state(lock_state))
-			fastboot_tx_write_str("FAILwrite lock state failed");
-		else
-			fastboot_tx_write_str("OKAY");
-#else
-		fastboot_tx_write_str("FAILnot implemented");
 #endif
 	} else if (strncmp("fuse at-perm-attr", cmd + 4, 16) == 0) {
 		cb_oem_perm_attr();

commit 3402728795f892b1fd71bc7b6d4b2d9c708699a3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Dec 5 13:04:26 2019 +0800

    serial: ns16550: gd->serial works when !gd->cur_serial_dev
    
    Make gd->serial only works for UART debug but not other UART driver.
    This requires other UART must initialized late than UART debug,
    recommend in board_late_init().
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I9633b5f8a2dfac9c2f9a733207088e5919669209

diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index 63587786f3..ab34dc6cb3 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -481,7 +481,7 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
 	plat->base = addr;
 #else
 
-	if (gd && gd->serial.using_pre_serial)
+	if (gd && gd->serial.using_pre_serial && !gd->cur_serial_dev)
 		addr = gd->serial.addr;
 
 	plat->base = (unsigned long)map_physmem(addr, 0, MAP_NOCACHE);

commit 6ba52d9f28ae3728e13c51c95a30b2898777f6d6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 4 15:45:48 2019 +0800

    rockchip: update grf_px30.h according to latest TRM
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ie02f26d60cc75c82cf9098a15d3b913a890d3f7b

diff --git a/arch/arm/include/asm/arch-rockchip/grf_px30.h b/arch/arm/include/asm/arch-rockchip/grf_px30.h
index fa9f501da7..64422e784f 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_px30.h
@@ -113,29 +113,30 @@ struct px30_grf {
 check_member(px30_grf, mac_con1, 0x904);
 
 struct px30_pmugrf {
-	unsigned int gpio0a_e;
-	unsigned int gpio0b_e;
-	unsigned int gpio0c_e;
-	unsigned int gpio0d_e;
+	unsigned int gpio0a_iomux;
+	unsigned int gpio0b_iomux;
+	unsigned int gpio0c_iomux;
+	unsigned int reserved0[1];
 	unsigned int gpio0a_p;
 	unsigned int gpio0b_p;
 	unsigned int gpio0c_p;
-	unsigned int gpio0d_p;
-	unsigned int gpio0al_iomux;
-	unsigned int gpio0bl_iomux;
-	unsigned int gpio0cl_iomux;
-	unsigned int gpio0dl_iomux;
+	unsigned int reserved1[1];
+	unsigned int gpio0a_e;
+	unsigned int gpio0b_e;
+	unsigned int gpio0c_e;
+	unsigned int reserved2[1];
 	unsigned int gpio0l_sr;
 	unsigned int gpio0h_sr;
 	unsigned int gpio0l_smt;
 	unsigned int gpio0h_smt;
-	unsigned int reserved1[(0x100 - 0x3c) / 4 - 1];
-	unsigned int soc_con[4];
-	unsigned int reserved2[(0x180 - 0x10c) / 4 - 1];
+	unsigned int reserved3[(0x100 - 0x3c) / 4 - 1];
+	unsigned int soc_con[3];
+	unsigned int failsafe_con;
+	unsigned int reserved4[(0x180 - 0x10c) / 4 - 1];
 	unsigned int pvtm_con[2];
-	unsigned int reserved3[2];
+	unsigned int reserved5[2];
 	unsigned int pvtm_status[2];
-	unsigned int reserved4[(0x200 - 0x194) / 4 - 1];
+	unsigned int reserved6[(0x200 - 0x194) / 4 - 1];
 	unsigned int os_reg[12];
 	unsigned int reset_function_status;
 };

commit c484df2f8521be9389688f2bb41343546c9f497d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Dec 9 15:47:46 2019 +0800

    common: android: refactor image load and sha1 verify
    
    Unify single image load/memcpy to image_read(), containing
    sha1 update.
    
    Not support verify image by RK legacy mkbootimg tools.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ide88d2dda79f3335a6c34e41bdce56eac0d66408

diff --git a/common/Kconfig b/common/Kconfig
index 13cf17b976..d5c1a88d7c 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -649,13 +649,6 @@ config ANDROID_BOOT_IMAGE_HASH
 	  This enables support for Android image hash verify, the mkbootimg always use
 	  SHA1 for images.
 
-config HASH_ROCKCHIP_LEGACY
-	bool "Image hash with Rockchip legacy mkbootimg tool pack"
-	depends on ANDROID_BOOT_IMAGE_HASH
-	help
-	  This option enables adding more android hdr variants into image hash
-	  calculation in legacy rockchip mkbootimg tool.
-
 config SKIP_RELOCATE_UBOOT
 	bool "Skip U-Boot relocation"
 	help
diff --git a/common/image-android.c b/common/image-android.c
index a507ca8300..23ddc27a66 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -270,7 +270,7 @@ int android_image_get_fdt(const struct andr_img_hdr *hdr,
 	return 0;
 }
 
-#ifdef CONFIG_ANDROID_BOOT_IMAGE_HASH
+#if defined(CONFIG_DM_CRYPTO) && defined(CONFIG_ANDROID_BOOT_IMAGE_HASH)
 static void print_hash(const char *label, u8 *hash, int len)
 {
 	int i;
@@ -280,249 +280,237 @@ static void print_hash(const char *label, u8 *hash, int len)
 		printf("%02x", hash[i]);
 	printf("\n");
 }
+#endif
 
-/*
- * This is only for Non-AVB image, because AVB image is verified by AVB bootflow.
- * The kernel/ramdisk/second address should be the real address in hdr before
- * calling this function.
- *
- * mkbootimg tool always use SHA1 for images.
- */
-static int android_image_hash_verify(struct andr_img_hdr *hdr)
+typedef enum {
+	IMG_KERNEL,
+	IMG_RAMDISK,
+	IMG_SECOND,
+	IMG_RECOVERY_DTBO,
+	IMG_RK_DTB,	/* within resource.img in second position */
+	IMG_DTB,
+	IMG_MAX,
+} img_t;
+
+static int image_read(img_t img, struct andr_img_hdr *hdr,
+		      ulong blkstart, void *ram_base,
+		      struct udevice *crypto)
 {
-	u8 hash[20];
-
-#ifdef DEBUG
-	android_print_contents(hdr);
+	struct blk_desc *desc = rockchip_get_bootdev();
+	__maybe_unused u32 sizesz;
+	ulong pgsz = hdr->page_size;
+	ulong blksz = desc->blksz;
+	ulong blkcnt, blkoff;
+	ulong offset = 0;
+	ulong datasz;
+	void *ramdst;
+	int ret = 0;
+
+	switch (img) {
+	case IMG_KERNEL:
+		offset = 0; /* include a page_size(image header) */
+		blkcnt = DIV_ROUND_UP(hdr->kernel_size + pgsz, blksz);
+		ramdst = (void *)env_get_ulong("android_addr_r", 16, 0);
+		datasz = hdr->kernel_size + pgsz;
+		sizesz = sizeof(hdr->kernel_size);
+		if (!sysmem_alloc_base(MEMBLK_ID_KERNEL,
+				(phys_addr_t)ramdst, blkcnt * blksz))
+			return -ENOMEM;
+		break;
+	case IMG_RAMDISK:
+		offset = pgsz + ALIGN(hdr->kernel_size, pgsz);
+		blkcnt = DIV_ROUND_UP(hdr->ramdisk_size, blksz);
+		ramdst = (void *)env_get_ulong("ramdisk_addr_r", 16, 0);
+		datasz = hdr->ramdisk_size;
+		sizesz = sizeof(hdr->ramdisk_size);
+		if (datasz && !sysmem_alloc_base(MEMBLK_ID_RAMDISK,
+				(phys_addr_t)ramdst, blkcnt * blksz))
+			return -ENOMEM;
+		break;
+	case IMG_SECOND:
+		offset = pgsz +
+			 ALIGN(hdr->kernel_size, pgsz) +
+			 ALIGN(hdr->ramdisk_size, pgsz);
+		blkcnt = DIV_ROUND_UP(hdr->second_size, blksz);
+		datasz = hdr->second_size;
+		sizesz = sizeof(hdr->second_size);
+		ramdst = malloc(blkcnt * blksz);
+		break;
+	case IMG_RECOVERY_DTBO:
+		offset = pgsz +
+			 ALIGN(hdr->kernel_size, pgsz) +
+			 ALIGN(hdr->ramdisk_size, pgsz) +
+			 ALIGN(hdr->second_size, pgsz);
+		blkcnt = DIV_ROUND_UP(hdr->recovery_dtbo_size, blksz);
+		datasz = hdr->recovery_dtbo_size;
+		sizesz = sizeof(hdr->recovery_dtbo_size);
+		ramdst = malloc(blkcnt * blksz);
+		break;
+	case IMG_DTB:
+		offset = pgsz +
+			 ALIGN(hdr->kernel_size, pgsz) +
+			 ALIGN(hdr->ramdisk_size, pgsz) +
+			 ALIGN(hdr->second_size, pgsz) +
+			 ALIGN(hdr->recovery_dtbo_size, pgsz);
+		blkcnt = DIV_ROUND_UP(hdr->dtb_size, blksz);
+		datasz = hdr->dtb_size;
+		sizesz = sizeof(hdr->dtb_size);
+		ramdst = malloc(blkcnt * blksz);
+		break;
+	case IMG_RK_DTB:
+#ifdef CONFIG_RKIMG_BOOTLOADER
+		/* No going further, it handles DTBO, HW-ID, etc */
+		ramdst = (void *)env_get_ulong("fdt_addr_r", 16, 0);
+		if (gd->fdt_blob != (void *)ramdst)
+			ret = rockchip_read_dtb_file(ramdst);
 #endif
-
-	if (hdr->kernel_addr == ANDROID_IMAGE_DEFAULT_KERNEL_ADDR) {
-		printf("No real image address in android hdr\n");
+		return ret < 0 ? ret : 0;
+	default:
 		return -EINVAL;
 	}
 
-#ifdef CONFIG_DM_CRYPTO
-	struct udevice *dev;
-	sha_context ctx;
-
-	dev = crypto_get_device(CRYPTO_SHA1);
-	if (!dev) {
-		printf("Can't find crypto device for SHA1 capability\n");
-		return -ENODEV;
+	if (!ramdst) {
+		printf("No memory for image(%d)\n", img);
+		return -ENOMEM;
 	}
 
-	ctx.algo = CRYPTO_SHA1;
-	ctx.length = hdr->kernel_size + sizeof(hdr->kernel_size) +
-		     hdr->ramdisk_size + sizeof(hdr->ramdisk_size) +
-		     hdr->second_size + sizeof(hdr->second_size);
-#ifdef CONFIG_HASH_ROCKCHIP_LEGACY
-	ctx.length += sizeof(hdr->tags_addr) + sizeof(hdr->page_size) +
-		      sizeof(hdr->unused) + sizeof(hdr->name) +
-		      sizeof(hdr->cmdline);
-#endif
-
-	crypto_sha_init(dev, &ctx);
-
-	crypto_sha_update(dev, (u32 *)(ulong)hdr->kernel_addr,
-			  hdr->kernel_size);
-	crypto_sha_update(dev, (u32 *)&hdr->kernel_size,
-			  sizeof(hdr->kernel_size));
-	crypto_sha_update(dev, (u32 *)(ulong)hdr->ramdisk_addr,
-			  hdr->ramdisk_size);
-	crypto_sha_update(dev, (u32 *)&hdr->ramdisk_size,
-			  sizeof(hdr->ramdisk_size));
-	crypto_sha_update(dev, (u32 *)(ulong)hdr->second_addr,
-			  hdr->second_size);
-	crypto_sha_update(dev, (u32 *)&hdr->second_size,
-			  sizeof(hdr->second_size));
-#ifdef CONFIG_HASH_ROCKCHIP_LEGACY
-	crypto_sha_update(dev, (u32 *)&hdr->tags_addr, sizeof(hdr->tags_addr));
-	crypto_sha_update(dev, (u32 *)&hdr->page_size, sizeof(hdr->page_size));
-	crypto_sha_update(dev, (u32 *)&hdr->header_version,
-			  sizeof(hdr->header_version));
-	crypto_sha_update(dev, (u32 *)&hdr->os_version, sizeof(hdr->os_version));
-	crypto_sha_update(dev, (u32 *)&hdr->name, sizeof(hdr->name));
-	crypto_sha_update(dev, (u32 *)&hdr->cmdline, sizeof(hdr->cmdline));
-#endif
-
-	crypto_sha_final(dev, &ctx, hash);
-
-#elif CONFIG_SHA1
-	sha1_context ctx;
-
-	sha1_starts(&ctx);
-	sha1_update(&ctx, (u8 *)(ulong)hdr->kernel_addr, hdr->kernel_size);
-	sha1_update(&ctx, (u8 *)&hdr->kernel_size, sizeof(hdr->kernel_size));
-	sha1_update(&ctx, (u8 *)(ulong)hdr->ramdisk_addr, hdr->ramdisk_size);
-	sha1_update(&ctx, (u8 *)&hdr->ramdisk_size, sizeof(hdr->ramdisk_size));
-	sha1_update(&ctx, (u8 *)(ulong)hdr->second_addr, hdr->second_size);
-	sha1_update(&ctx, (u8 *)&hdr->second_size, sizeof(hdr->second_size));
-#ifdef CONFIG_HASH_ROCKCHIP_LEGACY
-	sha1_update(&ctx, (u8 *)&hdr->tags_addr, sizeof(hdr->tags_addr));
-	sha1_update(&ctx, (u8 *)&hdr->page_size, sizeof(hdr->page_size));
-	sha1_update(&ctx, (u8 *)&hdr->header_version,
-		    sizeof(hdr->header_version));
-	sha1_update(&ctx, (u8 *)&hdr->os_version, sizeof(hdr->os_version));
-	sha1_update(&ctx, (u8 *)&hdr->name, sizeof(hdr->name));
-	sha1_update(&ctx, (u8 *)&hdr->cmdline, sizeof(hdr->cmdline));
-#endif
+	/* load */
+	if (ram_base) {
+		memcpy(ramdst, (char *)((ulong)ram_base + offset), datasz);
+	} else {
+		blkoff = DIV_ROUND_UP(offset, blksz);
+		ret = blk_dread(desc, blkstart + blkoff, blkcnt, ramdst);
+		if (ret != blkcnt) {
+			printf("Failed to read img(%d), ret=%d\n", img, ret);
+			return -EIO;
+		}
+	}
 
-	sha1_finish(&ctx, hash);
-#endif	/* CONFIG_SHA1 */
+	/* sha1 */
+#ifdef CONFIG_DM_CRYPTO
+	if (crypto) {
+		if (img == IMG_KERNEL) {
+			ramdst += pgsz;
+			datasz -= pgsz;
+		}
 
-	if (memcmp(hash, hdr->id, 20)) {
-		print_hash("SHA1 from image header", (u8 *)hdr->id, 20);
-		print_hash("SHA1 real", (u8 *)hash, 20);
-		return -EBADFD;
+		crypto_sha_update(crypto, (u32 *)ramdst, datasz);
+		crypto_sha_update(crypto, (u32 *)&datasz, sizesz);
 	}
+#endif
 
 	return 0;
 }
-#endif
 
 static int android_image_separate(struct andr_img_hdr *hdr,
 				  const disk_partition_t *part,
 				  void *load_address,
 				  void *ram_base)
 {
-	struct blk_desc *dev_desc = rockchip_get_bootdev();
-	ulong ramdisk_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0);
-	char *fdt_high = env_get("fdt_high");
-	char *ramdisk_high = env_get("initrd_high");
-	ulong blk_start, blk_cnt, size;
-	ulong start, second_addr_r = 0;
-	int ret;
+	char *initrd_high;
+	char *fdt_high;
+	ulong bstart;
 
 	if (android_image_check_header(hdr)) {
 		printf("Bad android image header\n");
 		return -EINVAL;
 	}
 
-	if (hdr->kernel_size) {
-		size = hdr->kernel_size + hdr->page_size;
-		blk_cnt = DIV_ROUND_UP(size, dev_desc->blksz);
-		if (!sysmem_alloc_base(MEMBLK_ID_KERNEL,
-				       (phys_addr_t)load_address,
-				       blk_cnt * dev_desc->blksz))
-			return -ENXIO;
-
-		if (ram_base) {
-			start = (ulong)ram_base;
-			memcpy((char *)load_address, (char *)start, size);
-		} else {
-			blk_start = part->start;
-			ret = blk_dread(dev_desc, blk_start,
-					blk_cnt, load_address);
-			if (ret != blk_cnt) {
-				printf("%s: read kernel failed, ret=%d\n",
-				      __func__, ret);
-				return -1;
-			}
-		}
-	}
-
-	if (hdr->ramdisk_size) {
-		size = hdr->page_size + ALIGN(hdr->kernel_size, hdr->page_size);
-		blk_cnt = DIV_ROUND_UP(hdr->ramdisk_size, dev_desc->blksz);
-		if (!sysmem_alloc_base(MEMBLK_ID_RAMDISK,
-				       ramdisk_addr_r,
-				       blk_cnt * dev_desc->blksz))
-			return -ENXIO;
-		if (ram_base) {
-			start = (unsigned long)ram_base;
-			start += hdr->page_size;
-			start += ALIGN(hdr->kernel_size, hdr->page_size);
-			memcpy((char *)ramdisk_addr_r,
-			       (char *)start, hdr->ramdisk_size);
-		} else {
-			blk_start = part->start +
-				DIV_ROUND_UP(size, dev_desc->blksz);
-			ret = blk_dread(dev_desc, blk_start,
-					blk_cnt, (void *)ramdisk_addr_r);
-			if (ret != blk_cnt) {
-				printf("%s: read ramdisk failed, ret=%d\n",
-				      __func__, ret);
-				return -1;
-			}
-		}
-	}
+	/* set for image_read(IMG_KERNEL, ...) */
+	env_set_hex("android_addr_r", (ulong)load_address);
+	bstart = part ? part->start : 0;
 
 	/*
-	 * Load dtb file by rockchip_read_dtb_file() which support pack
-	 * dtb in second position or resource file.
+	 * 1. Load images to their individual target ram position
+	 *    in order to disable fdt/ramdisk relocation.
 	 */
-#ifdef CONFIG_RKIMG_BOOTLOADER
-	ulong fdt_addr_r = env_get_ulong("fdt_addr_r", 16, 0);
-
-	if (hdr->second_size && (gd->fdt_blob != (void *)fdt_addr_r)) {
-		ulong fdt_size;
+#if defined(CONFIG_DM_CRYPTO) && defined(CONFIG_ANDROID_BOOT_IMAGE_HASH)
+	struct udevice *dev;
+	sha_context ctx;
+	uchar hash[20];
 
-		fdt_size = rockchip_read_dtb_file((void *)fdt_addr_r);
-		if (fdt_size < 0) {
-			printf("%s: read fdt failed\n", __func__);
-			return ret;
-		}
+	ctx.length = 0;
+	ctx.algo = CRYPTO_SHA1;
+	dev = crypto_get_device(ctx.algo);
+	if (!dev) {
+		printf("Can't find crypto device for SHA1 capability\n");
+		return -ENODEV;
 	}
-#endif
 
-#ifdef CONFIG_ANDROID_BOOT_IMAGE_HASH
-	if (hdr->second_size) {
-		ulong blk_start, blk_cnt;
+  #ifdef CONFIG_ROCKCHIP_CRYPTO_V1
+	/* v1: requires total length before sha init */
+	ctx.length += hdr->kernel_size + sizeof(hdr->kernel_size) +
+		      hdr->ramdisk_size + sizeof(hdr->ramdisk_size) +
+		      hdr->second_size + sizeof(hdr->second_size);
+	if (hdr->header_version > 0)
+		ctx.length += hdr->recovery_dtbo_size +
+					sizeof(hdr->recovery_dtbo_size);
+	if (hdr->header_version > 1)
+		ctx.length += hdr->dtb_size + sizeof(hdr->dtb_size);
+  #endif
+	crypto_sha_init(dev, &ctx);
 
-		/* Just for image data hash calculation */
-		second_addr_r = (ulong)malloc(hdr->second_size);
-		if (!second_addr_r)
-			return -ENOMEM;
+	/* load, never change order ! */
+	if (image_read(IMG_RK_DTB,  hdr, bstart, ram_base, NULL))
+		return -1;
+	if (image_read(IMG_KERNEL,  hdr, bstart, ram_base, dev))
+		return -1;
+	if (image_read(IMG_RAMDISK, hdr, bstart, ram_base, dev))
+		return -1;
+	if (image_read(IMG_SECOND,  hdr, bstart, ram_base, dev))
+		return -1;
+	if (hdr->header_version > 0) {
+		if (image_read(IMG_RECOVERY_DTBO, hdr, bstart, ram_base, dev))
+			return -1;
+	}
+	if (hdr->header_version > 1) {
+		if (image_read(IMG_DTB, hdr, bstart, ram_base, dev))
+			return -1;
+	}
 
-		size = hdr->page_size +
-		       ALIGN(hdr->kernel_size, hdr->page_size) +
-		       ALIGN(hdr->ramdisk_size, hdr->page_size);
-		blk_cnt = DIV_ROUND_UP(hdr->second_size, dev_desc->blksz);
-
-		if (ram_base) {
-			start = (unsigned long)ram_base;
-			start += hdr->page_size;
-			start += ALIGN(hdr->kernel_size, hdr->page_size);
-			start += ALIGN(hdr->ramdisk_size, hdr->page_size);
-			memcpy((char *)second_addr_r,
-			       (char *)start, hdr->second_size);
-		} else {
-			blk_start = part->start +
-					DIV_ROUND_UP(size, dev_desc->blksz);
-			ret = blk_dread(dev_desc, blk_start, blk_cnt,
-					(void *)second_addr_r);
-			if (ret != blk_cnt) {
-				printf("%s: read second pos failed, ret=%d\n",
-				       __func__, ret);
-				return -1;
-			}
-		}
+	crypto_sha_final(dev, &ctx, hash);
+	if (memcmp(hash, hdr->id, 20)) {
+		print_hash("Hash from header", (u8 *)hdr->id, 20);
+		print_hash("Hash real", (u8 *)hash, 20);
+		return -EBADFD;
+	} else {
+		printf("Image hash OK\n");
+	}
+
+#else /* !(CONFIG_DM_CRYPTO && CONFIG_ANDROID_BOOT_IMAGE_HASH) */
+	if (image_read(IMG_RK_DTB,  hdr, bstart, ram_base, NULL))
+		return -1;
+	if (image_read(IMG_KERNEL,  hdr, bstart, ram_base, NULL))
+		return -1;
+	if (image_read(IMG_RAMDISK, hdr, bstart, ram_base, NULL))
+		return -1;
+	if (image_read(IMG_SECOND,  hdr, bstart, ram_base, NULL))
+		return -1;
+	if (hdr->header_version > 0) {
+		if (image_read(IMG_RECOVERY_DTBO, hdr, bstart, ram_base, NULL))
+			return -1;
+	}
+	if (hdr->header_version > 1) {
+		if (image_read(IMG_DTB, hdr, bstart, ram_base, NULL))
+			return -1;
 	}
 #endif
 
 	/*
-	 * Update hdr with real image address.
-	 *
-	 * kernel_addr depends on load_address can handle both the
-	 * compressed and no-compressed kernel position.
+	 * 2. Disable fdt/ramdisk relocation, it saves boot time.
 	 */
-	hdr->kernel_addr = (ulong)load_address + hdr->page_size;
-	hdr->second_addr = second_addr_r;
-	hdr->ramdisk_addr = ramdisk_addr_r;
+	initrd_high = env_get("initrd_high");
+	fdt_high = env_get("fdt_high");
 
-	/*
-	 * Since images are loaded separate, fdt/ramdisk relocation
-	 * can be disabled, it saves boot time.
-	 */
 	if (!fdt_high) {
 		env_set_hex("fdt_high", -1UL);
 		printf("Fdt ");
 	}
-	if (!ramdisk_high) {
+	if (!initrd_high) {
 		env_set_hex("initrd_high", -1UL);
 		printf("Ramdisk ");
 	}
-	if (!fdt_high || !ramdisk_high)
+	if (!fdt_high || !initrd_high)
 		printf("skip relocation\n");
 
 	return 0;
@@ -685,16 +673,6 @@ long android_image_load(struct blk_desc *dev_desc,
 
 	debug("Loading Android Image to 0x%08lx\n", load_address);
 
-	/* Verify image hash */
-#ifdef CONFIG_ANDROID_BOOT_IMAGE_HASH
-	if (android_image_hash_verify(hdr)) {
-		printf("HASH: Image verify failed!\n");
-		return -EBADFD;
-	}
-
-	printf("HASH: Image verify OK\n");
-#endif
-
 	free(hdr);
 	return load_address;
 

commit e1b9a8426d639e558da1cc707c505dfbe8e57007
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Nov 26 15:53:22 2019 +0800

    common: android: support decompress kernel for AVB bootflow
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If253d573384d697338f92b591b28efde9dab48bf

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 69b0a90d90..aaf3d2866b 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -778,9 +778,11 @@ static AvbSlotVerifyResult android_slot_verify(char *boot_partname,
 		/* Reserve page_size */
 		hdr = (void *)slot_data[0]->loaded_partitions->data;
 		load_address -= hdr->page_size;
+		if (android_image_memcpy_separate(hdr, &load_address)) {
+			printf("Failed to separate copy android image\n");
+			return AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+		}
 		*android_load_address = load_address;
-
-		android_image_memcpy_separate(hdr, (void *)load_address);
 	} else {
 		slot_set_unbootable(&ab_data.slots[slot_index_to_boot]);
 	}
diff --git a/common/image-android.c b/common/image-android.c
index 8fb5d9039d..a507ca8300 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -380,18 +380,18 @@ static int android_image_hash_verify(struct andr_img_hdr *hdr)
 }
 #endif
 
-int android_image_load_separate(struct andr_img_hdr *hdr,
-				const disk_partition_t *part,
-				void *load_address, void *ram_base)
+static int android_image_separate(struct andr_img_hdr *hdr,
+				  const disk_partition_t *part,
+				  void *load_address,
+				  void *ram_base)
 {
 	struct blk_desc *dev_desc = rockchip_get_bootdev();
 	ulong ramdisk_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0);
-	ulong kernel_addr_r = env_get_ulong("kernel_addr_r", 16, 0);
 	char *fdt_high = env_get("fdt_high");
 	char *ramdisk_high = env_get("initrd_high");
 	ulong blk_start, blk_cnt, size;
 	ulong start, second_addr_r = 0;
-	int ret, blk_read = 0;
+	int ret;
 
 	if (android_image_check_header(hdr)) {
 		printf("Bad android image header\n");
@@ -418,7 +418,6 @@ int android_image_load_separate(struct andr_img_hdr *hdr,
 				      __func__, ret);
 				return -1;
 			}
-			blk_read += ret;
 		}
 	}
 
@@ -445,7 +444,6 @@ int android_image_load_separate(struct andr_img_hdr *hdr,
 				      __func__, ret);
 				return -1;
 			}
-			blk_read += ret;
 		}
 	}
 
@@ -464,8 +462,6 @@ int android_image_load_separate(struct andr_img_hdr *hdr,
 			printf("%s: read fdt failed\n", __func__);
 			return ret;
 		}
-
-		blk_read += DIV_ROUND_UP(fdt_size, dev_desc->blksz);
 	}
 #endif
 
@@ -500,14 +496,17 @@ int android_image_load_separate(struct andr_img_hdr *hdr,
 				       __func__, ret);
 				return -1;
 			}
-
-			blk_read += blk_cnt;
 		}
 	}
 #endif
 
-	/* Update hdr with real image address */
-	hdr->kernel_addr = kernel_addr_r;
+	/*
+	 * Update hdr with real image address.
+	 *
+	 * kernel_addr depends on load_address can handle both the
+	 * compressed and no-compressed kernel position.
+	 */
+	hdr->kernel_addr = (ulong)load_address + hdr->page_size;
 	hdr->second_addr = second_addr_r;
 	hdr->ramdisk_addr = ramdisk_addr_r;
 
@@ -515,25 +514,109 @@ int android_image_load_separate(struct andr_img_hdr *hdr,
 	 * Since images are loaded separate, fdt/ramdisk relocation
 	 * can be disabled, it saves boot time.
 	 */
-	if (blk_read > 0 || ram_base) {
-		if (!fdt_high) {
-			env_set_hex("fdt_high", -1UL);
-			printf("Fdt ");
-		}
-		if (!ramdisk_high) {
-			env_set_hex("initrd_high", -1UL);
-			printf("Ramdisk ");
+	if (!fdt_high) {
+		env_set_hex("fdt_high", -1UL);
+		printf("Fdt ");
+	}
+	if (!ramdisk_high) {
+		env_set_hex("initrd_high", -1UL);
+		printf("Ramdisk ");
+	}
+	if (!fdt_high || !ramdisk_high)
+		printf("skip relocation\n");
+
+	return 0;
+}
+
+/*
+ * 'boot_android' cmd use "kernel_addr_r" as default load address !
+ * We update it according to compress type and "kernel_addr_c/r".
+ */
+int android_image_parse_comp(struct andr_img_hdr *hdr, ulong *load_addr)
+{
+	ulong kernel_addr_c;
+	int comp;
+
+	kernel_addr_c = env_get_ulong("kernel_addr_c", 16, 0);
+	comp = android_image_parse_kernel_comp(hdr);
+
+#ifdef CONFIG_ARM64
+	/*
+	 * On 64-bit kernel, assuming use IMAGE by default.
+	 *
+	 * kernel_addr_c is for LZ4-IMAGE but maybe not defined.
+	 * kernel_addr_r is for IMAGE.
+	 */
+	if (comp != IH_COMP_NONE) {
+		ulong comp_addr;
+
+		if (kernel_addr_c) {
+			comp_addr = kernel_addr_c;
+		} else {
+			printf("Warn: No \"kernel_addr_c\"\n");
+			comp_addr = CONFIG_SYS_SDRAM_BASE + 0x2000000;/* 32M */
+			env_set_ulong("kernel_addr_c", comp_addr);
 		}
-		if (!fdt_high || !ramdisk_high)
-			printf("skip relocation\n");
+
+		*load_addr = comp_addr - hdr->page_size;
+	}
+#else
+	/*
+	 * On 32-bit kernel, assuming use zImage by default.
+	 *
+	 * kernel_addr_c is for LZ4/zImage but maybe not defined.
+	 * kernel_addr_r is for zImage when kernel_addr_c is not defined.
+	 * kernel_addr_r is for IMAGE when kernel_addr_c is defined.
+	 */
+	if (comp == IH_COMP_NONE) {
+		if (kernel_addr_c)
+			*load_addr = env_get_ulong("kernel_addr_r", 16, 0);
+		else
+			*load_addr = CONFIG_SYS_SDRAM_BASE + 0x8000;
+	} else {
+		if (kernel_addr_c)
+			*load_addr = kernel_addr_c - hdr->page_size;
+	}
+#endif
+
+	env_set_ulong("os_comp", comp);
+	return comp;
+}
+
+void android_image_set_decomp(struct andr_img_hdr *hdr, int comp)
+{
+	ulong kernel_addr_r;
+
+	/* zImage handles decompress itself */
+	if (comp != IH_COMP_NONE && comp != IH_COMP_ZIMAGE) {
+		kernel_addr_r = env_get_ulong("kernel_addr_r", 16, 0x02080000);
+		android_image_set_kload(hdr, kernel_addr_r);
+		android_image_set_comp(hdr, comp);
+	} else {
+		android_image_set_comp(hdr, IH_COMP_NONE);
 	}
+}
 
-	return blk_read;
+static int android_image_load_separate(struct andr_img_hdr *hdr,
+				       const disk_partition_t *part,
+				       void *load_addr)
+{
+	return android_image_separate(hdr, part, load_addr, NULL);
 }
 
-int android_image_memcpy_separate(struct andr_img_hdr *hdr, void *load_address)
+int android_image_memcpy_separate(struct andr_img_hdr *hdr, ulong *load_addr)
 {
-	return android_image_load_separate(hdr, NULL, load_address, hdr);
+	ulong comp_addr = *load_addr;
+	int comp;
+
+	comp = android_image_parse_comp(hdr, &comp_addr);
+	if (android_image_separate(hdr, NULL, (void *)comp_addr, hdr))
+		return -1;
+
+	*load_addr = comp_addr;
+	android_image_set_decomp((void *)comp_addr, comp);
+
+	return 0;
 }
 
 long android_image_load(struct blk_desc *dev_desc,
@@ -543,11 +626,7 @@ long android_image_load(struct blk_desc *dev_desc,
 	struct andr_img_hdr *hdr;
 	u32 blksz = dev_desc->blksz;
 	u32 pszcnt, hdrcnt, kercnt;
-	void *buf;
-	long blk_cnt = 0;
-	long blk_read = 0;
-	u32 comp;
-	u32 kload_addr;
+	int comp, ret;
 
 	if (max_size < part_info->blksz)
 		return -1;
@@ -568,16 +647,18 @@ long android_image_load(struct blk_desc *dev_desc,
 
 	hdr = memalign(ARCH_DMA_MINALIGN, (hdrcnt + pszcnt + kercnt) * blksz);
 	if (!hdr) {
-		printf("%s: no memory\n", __func__);
+		printf("No memory\n");
 		return -1;
 	}
 
-	if (blk_dread(dev_desc, part_info->start, hdrcnt, hdr) != hdrcnt)
-		blk_read = -1;
+	if (blk_dread(dev_desc, part_info->start, hdrcnt, hdr) != hdrcnt) {
+		printf("Failed to read image header\n");
+		goto fail;
+	}
 
-	if (!blk_read && android_image_check_header(hdr) != 0) {
+	if (android_image_check_header(hdr) != 0) {
 		printf("** Invalid Android Image header **\n");
-		blk_read = -1;
+		goto fail;
 	}
 
 	/*
@@ -585,94 +666,41 @@ long android_image_load(struct blk_desc *dev_desc,
 	 * reading kernel image for compress validation.
 	 */
 	pszcnt = DIV_ROUND_UP(hdr->page_size, blksz);
-
 	if (blk_dread(dev_desc, part_info->start + pszcnt, kercnt,
-		      (void *)((ulong)hdr + hdr->page_size)) != kercnt)
-		blk_read = -1;
+		      (void *)((ulong)hdr + hdr->page_size)) != kercnt) {
+		printf("Failed to read kernel header\n");
+		goto fail;
+	}
 
-	/* page_size for image header */
 	load_address -= hdr->page_size;
 
-	/* We don't know the size of the Android image before reading the header
-	 * so we don't limit the size of the mapped memory.
-	 */
-	buf = map_sysmem(load_address, 0 /* size */);
-	if (!blk_read) {
-		blk_cnt = (android_image_get_end(hdr) - (ulong)hdr +
-			   part_info->blksz - 1) / part_info->blksz;
-		comp = android_image_parse_kernel_comp(hdr);
-		/*
-		 * We should load compressed kernel Image to high memory at
-		 * address "kernel_addr_c".
-		 */
-		if (comp != IH_COMP_NONE) {
-			ulong kernel_addr_c;
-
-			env_set_ulong("os_comp", comp);
-			kernel_addr_c = env_get_ulong("kernel_addr_c", 16, 0);
-			if (kernel_addr_c) {
-				load_address = kernel_addr_c - hdr->page_size;
-				unmap_sysmem(buf);
-				buf = map_sysmem(load_address, 0 /* size */);
-			}
-#ifdef CONFIG_ARM64
-			else {
-				printf("Warn: \"kernel_addr_c\" is not defined "
-				       "for compressed kernel Image!\n");
-				load_address += android_image_get_ksize(hdr) * 3;
-				load_address = ALIGN(load_address, ARCH_DMA_MINALIGN);
-				env_set_ulong("kernel_addr_c", load_address);
-
-				load_address -= hdr->page_size;
-				unmap_sysmem(buf);
-				buf = map_sysmem(load_address, 0 /* size */);
-			}
-#endif
-		}
+	/* Let's load kernel now ! */
+	comp = android_image_parse_comp(hdr, &load_address);
+	ret = android_image_load_separate(hdr, part_info, (void *)load_address);
+	if (ret) {
+		printf("Failed to load android image\n");
+		goto fail;
+	}
+	android_image_set_decomp((void *)load_address, comp);
 
-		if (blk_cnt * part_info->blksz > max_size) {
-			debug("Android Image too big (%lu bytes, max %lu)\n",
-			      android_image_get_end(hdr) - (ulong)hdr,
-			      max_size);
-			blk_read = -1;
-		} else {
-			debug("Loading Android Image (%lu blocks) to 0x%lx... ",
-			      blk_cnt, load_address);
-			blk_read =
-			android_image_load_separate(hdr, part_info, buf, NULL);
-		}
+	debug("Loading Android Image to 0x%08lx\n", load_address);
 
-		/* Verify image hash */
+	/* Verify image hash */
 #ifdef CONFIG_ANDROID_BOOT_IMAGE_HASH
-		if (android_image_hash_verify(hdr)) {
-			printf("Image hash miss match!\n");
-			return -EBADFD;
-		}
+	if (android_image_hash_verify(hdr)) {
+		printf("HASH: Image verify failed!\n");
+		return -EBADFD;
+	}
 
-		printf("Image hash verify ok\n");
+	printf("HASH: Image verify OK\n");
 #endif
-		/*
-		 * zImage is not need to decompress
-		 * kernel will handle decompress itself
-		 */
-		if (comp != IH_COMP_NONE && comp != IH_COMP_ZIMAGE) {
-			kload_addr = env_get_ulong("kernel_addr_r", 16, 0x02080000);
-			android_image_set_kload(buf, kload_addr);
-			android_image_set_comp(buf, comp);
-		} else {
-			android_image_set_comp(buf, IH_COMP_NONE);
-		}
-
-	}
 
 	free(hdr);
-	unmap_sysmem(buf);
-
-	debug("%lu blocks read\n", blk_read);
-	if (blk_read < 0)
-		return -1;
-
 	return load_address;
+
+fail:
+	free(hdr);
+	return -1;
 }
 
 #if !defined(CONFIG_SPL_BUILD)
diff --git a/include/image.h b/include/image.h
index 96e47a8481..e06c902464 100644
--- a/include/image.h
+++ b/include/image.h
@@ -1276,30 +1276,9 @@ ulong android_image_get_end(const struct andr_img_hdr *hdr);
 ulong android_image_get_kload(const struct andr_img_hdr *hdr);
 void android_print_contents(const struct andr_img_hdr *hdr);
 
-/** android_image_load_separate - Load an Android Image separate from storage
- *
- * Load an Android Image based on the header size in the storage.
- *
- * @hdr:		The android image header
- * @part:		The partition where to read the image from
- * @load_address:	The address where the image will be loaded
- * @ram_src:		The ram source to load, if NULL load from partition
- * @return the blk count.
- */
-int android_image_load_separate(struct andr_img_hdr *hdr,
-				const disk_partition_t *part,
-				void *load_address,
-				void *ram_base);
-
-/** android_image_load_separate - Memcpy an Android Image separate from ram
- *
- * Memcpy an Android Image based on the header size in the ram.
- *
- * @hdr:		The android image header and memcpy base address
- * @load_address:	The address where the image will be loaded
- * @return the blk count.
- */
-int android_image_memcpy_separate(struct andr_img_hdr *hdr, void *load_address);
+void android_image_set_decomp(struct andr_img_hdr *hdr, int comp);
+int android_image_parse_comp(struct andr_img_hdr *hdr, ulong *load_addr);
+int android_image_memcpy_separate(struct andr_img_hdr *hdr, ulong *load_address);
 
 /** android_image_load - Load an Android Image from storage.
  *

commit 3f7fb06b2474d0aaf082577806e3bd64586415d9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Nov 26 11:26:38 2019 +0800

    common: android: make image separate load mandory
    
    Since this feature is stable and helpful to save boot time,
    let't make it mandory.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I36f244c6d319d6b54ed3d54730352c8d5b4cc6bd

diff --git a/common/Kconfig b/common/Kconfig
index f81b0bb115..13cf17b976 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -641,15 +641,6 @@ config ANDROID_BOOT_IMAGE
 	  This enables support for booting images which use the Android
 	  image format header.
 
-config ANDROID_BOOT_IMAGE_SEPARATE
-	bool "Enable support for Android image separate loading"
-	depends on ANDROID_BOOT_IMAGE
-	default y
-	help
-	  This enables support for android image separate loading. With this support,
-	  we can load ramdisk/fdt/kernel separate and skip ramdisk and fdt relocation
-	  safely. It saves a lot of boot time.
-
 config ANDROID_BOOT_IMAGE_HASH
 	bool "Enable support for Android image hash verify"
 	depends on ANDROID_BOOT_IMAGE
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 56dd56e2e2..69b0a90d90 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -780,13 +780,7 @@ static AvbSlotVerifyResult android_slot_verify(char *boot_partname,
 		load_address -= hdr->page_size;
 		*android_load_address = load_address;
 
-#ifdef CONFIG_ANDROID_BOOT_IMAGE_SEPARATE
 		android_image_memcpy_separate(hdr, (void *)load_address);
-#else
-		memcpy((uint8_t *)load_address,
-		       slot_data[0]->loaded_partitions->data,
-		       slot_data[0]->loaded_partitions->data_size);
-#endif
 	} else {
 		slot_set_unbootable(&ab_data.slots[slot_index_to_boot]);
 	}
diff --git a/common/image-android.c b/common/image-android.c
index d13a47528b..8fb5d9039d 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -222,15 +222,14 @@ ulong android_image_get_kload(const struct andr_img_hdr *hdr)
 int android_image_get_ramdisk(const struct andr_img_hdr *hdr,
 			      ulong *rd_data, ulong *rd_len)
 {
+	ulong ramdisk_addr_r;
+
 	if (!hdr->ramdisk_size) {
 		*rd_data = *rd_len = 0;
 		return -1;
 	}
 
-	/* We have load ramdisk at "ramdisk_addr_r" */
-#ifdef CONFIG_ANDROID_BOOT_IMAGE_SEPARATE
-	ulong ramdisk_addr_r;
-
+	/* Have been loaded by android_image_load_separate() on ramdisk_addr_r */
 	ramdisk_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0);
 	if (!ramdisk_addr_r) {
 		printf("No Found Ramdisk Load Address.\n");
@@ -238,12 +237,6 @@ int android_image_get_ramdisk(const struct andr_img_hdr *hdr,
 	}
 
 	*rd_data = ramdisk_addr_r;
-#else
-	*rd_data = (unsigned long)hdr;
-	*rd_data += hdr->page_size;
-	*rd_data += ALIGN(hdr->kernel_size, hdr->page_size);
-#endif
-
 	*rd_len = hdr->ramdisk_size;
 
 	printf("RAM disk load addr 0x%08lx size %u KiB\n",
@@ -255,16 +248,14 @@ int android_image_get_ramdisk(const struct andr_img_hdr *hdr,
 int android_image_get_fdt(const struct andr_img_hdr *hdr,
 			      ulong *rd_data)
 {
+	ulong fdt_addr_r;
+
 	if (!hdr->second_size) {
 		*rd_data = 0;
 		return -1;
 	}
 
-	/* We have load fdt at "fdt_addr_r" */
-#if defined(CONFIG_USING_KERNEL_DTB) || \
-    defined(CONFIG_ANDROID_BOOT_IMAGE_SEPARATE)
-	ulong fdt_addr_r;
-
+	/* Have been loaded by android_image_load_separate() on fdt_addr_r */
 	fdt_addr_r = env_get_ulong("fdt_addr_r", 16, 0);
 	if (!fdt_addr_r) {
 		printf("No Found FDT Load Address.\n");
@@ -272,12 +263,6 @@ int android_image_get_fdt(const struct andr_img_hdr *hdr,
 	}
 
 	*rd_data = fdt_addr_r;
-#else
-	*rd_data = (unsigned long)hdr;
-	*rd_data += hdr->page_size;
-	*rd_data += ALIGN(hdr->kernel_size, hdr->page_size);
-	*rd_data += ALIGN(hdr->ramdisk_size, hdr->page_size);
-#endif
 
 	debug("FDT load addr 0x%08x size %u KiB\n",
 	      hdr->second_addr, DIV_ROUND_UP(hdr->second_size, 1024));
@@ -395,10 +380,9 @@ static int android_image_hash_verify(struct andr_img_hdr *hdr)
 }
 #endif
 
-#ifdef CONFIG_ANDROID_BOOT_IMAGE_SEPARATE
 int android_image_load_separate(struct andr_img_hdr *hdr,
 				const disk_partition_t *part,
-				void *load_address, void *ram_src)
+				void *load_address, void *ram_base)
 {
 	struct blk_desc *dev_desc = rockchip_get_bootdev();
 	ulong ramdisk_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0);
@@ -422,8 +406,8 @@ int android_image_load_separate(struct andr_img_hdr *hdr,
 				       blk_cnt * dev_desc->blksz))
 			return -ENXIO;
 
-		if (ram_src) {
-			start = (ulong)ram_src;
+		if (ram_base) {
+			start = (ulong)ram_base;
 			memcpy((char *)load_address, (char *)start, size);
 		} else {
 			blk_start = part->start;
@@ -445,8 +429,8 @@ int android_image_load_separate(struct andr_img_hdr *hdr,
 				       ramdisk_addr_r,
 				       blk_cnt * dev_desc->blksz))
 			return -ENXIO;
-		if (ram_src) {
-			start = (unsigned long)ram_src;
+		if (ram_base) {
+			start = (unsigned long)ram_base;
 			start += hdr->page_size;
 			start += ALIGN(hdr->kernel_size, hdr->page_size);
 			memcpy((char *)ramdisk_addr_r,
@@ -499,8 +483,8 @@ int android_image_load_separate(struct andr_img_hdr *hdr,
 		       ALIGN(hdr->ramdisk_size, hdr->page_size);
 		blk_cnt = DIV_ROUND_UP(hdr->second_size, dev_desc->blksz);
 
-		if (ram_src) {
-			start = (unsigned long)ram_src;
+		if (ram_base) {
+			start = (unsigned long)ram_base;
 			start += hdr->page_size;
 			start += ALIGN(hdr->kernel_size, hdr->page_size);
 			start += ALIGN(hdr->ramdisk_size, hdr->page_size);
@@ -531,7 +515,7 @@ int android_image_load_separate(struct andr_img_hdr *hdr,
 	 * Since images are loaded separate, fdt/ramdisk relocation
 	 * can be disabled, it saves boot time.
 	 */
-	if (blk_read > 0 || ram_src) {
+	if (blk_read > 0 || ram_base) {
 		if (!fdt_high) {
 			env_set_hex("fdt_high", -1UL);
 			printf("Fdt ");
@@ -551,7 +535,6 @@ int android_image_memcpy_separate(struct andr_img_hdr *hdr, void *load_address)
 {
 	return android_image_load_separate(hdr, NULL, load_address, hdr);
 }
-#endif /* CONFIG_ANDROID_BOOT_IMAGE_SEPARATE */
 
 long android_image_load(struct blk_desc *dev_desc,
 			const disk_partition_t *part_info,
@@ -655,19 +638,8 @@ long android_image_load(struct blk_desc *dev_desc,
 		} else {
 			debug("Loading Android Image (%lu blocks) to 0x%lx... ",
 			      blk_cnt, load_address);
-
-#ifdef CONFIG_ANDROID_BOOT_IMAGE_SEPARATE
 			blk_read =
 			android_image_load_separate(hdr, part_info, buf, NULL);
-#else
-			if (!sysmem_alloc_base(MEMBLK_ID_ANDROID,
-					       (phys_addr_t)buf,
-						blk_cnt * part_info->blksz))
-				return -ENXIO;
-
-			blk_read = blk_dread(dev_desc, part_info->start,
-					     blk_cnt, buf);
-#endif
 		}
 
 		/* Verify image hash */
@@ -696,16 +668,9 @@ long android_image_load(struct blk_desc *dev_desc,
 	free(hdr);
 	unmap_sysmem(buf);
 
-#ifndef CONFIG_ANDROID_BOOT_IMAGE_SEPARATE
-	debug("%lu blocks read: %s\n",
-	      blk_read, (blk_read == blk_cnt) ? "OK" : "ERROR");
-	if (blk_read != blk_cnt)
-		return -1;
-#else
 	debug("%lu blocks read\n", blk_read);
 	if (blk_read < 0)
-		return blk_read;
-#endif
+		return -1;
 
 	return load_address;
 }
diff --git a/include/image.h b/include/image.h
index 7ef8f8166b..96e47a8481 100644
--- a/include/image.h
+++ b/include/image.h
@@ -1288,7 +1288,8 @@ void android_print_contents(const struct andr_img_hdr *hdr);
  */
 int android_image_load_separate(struct andr_img_hdr *hdr,
 				const disk_partition_t *part,
-				void *load_address, void *ram_src);
+				void *load_address,
+				void *ram_base);
 
 /** android_image_load_separate - Memcpy an Android Image separate from ram
  *

commit 07f987d8d495380787203e2bc2accd44100e6051
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Dec 8 18:00:37 2019 +0800

    rockchip: resource: support parse logo_kernel.bmp from logo partition
    
    "logo" partition layout, not change order:
    
    |----------------------| 0x00
    | raw logo.bmp         |
    |----------------------| N*512-byte aligned
    | raw logo_kernel.bmp  |
    |----------------------|
    
    N: the sector count of logo.bmp
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I2deba013d3963c99664c5bfd69693835a46ba48f

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 47e615362b..2617605282 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -204,6 +204,49 @@ static int replace_resource_entry(const char *f_name, uint32_t base,
 	return 0;
 }
 
+static int read_logo_bmp(const char *name, disk_partition_t *part,
+			 uint32_t offset, uint32_t *size)
+{
+	struct blk_desc *dev_desc;
+	struct bmp_header *header;
+	u32 blk_start, blk_offset, filesz;
+	int ret;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc)
+		return -ENODEV;
+
+	blk_offset = DIV_ROUND_UP(offset, dev_desc->blksz);
+	blk_start = part->start + blk_offset;
+	header = memalign(ARCH_DMA_MINALIGN, dev_desc->blksz);
+	if (!header) {
+		ret = -ENOMEM;
+		goto err;
+	}
+	ret = blk_dread(dev_desc, blk_start, 1, header);
+	if (ret != 1) {
+		ret = -EIO;
+		goto err;
+	}
+
+	if (header->signature[0] != 'B' ||
+	    header->signature[1] != 'M') {
+		ret = -EINVAL;
+		goto err;
+	}
+
+	filesz = get_unaligned_le32(&header->file_size);
+	ret = replace_resource_entry(name, blk_start, blk_offset, filesz);
+	if (!ret) {
+		printf("LOGO: %s\n", name);
+		if (size)
+			*size = filesz;
+	}
+err:
+	free(header);
+
+	return ret;
+}
 /*
  * There are: logo/battery pictures and dtb file in the resource image by default.
  *
@@ -220,7 +263,6 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 {
 	struct resource_entry *entry;
 	struct blk_desc *dev_desc;
-	struct bmp_header *header;
 	char *boot_partname = PART_BOOT;
 	disk_partition_t part_info;
 	int resource_found = 0;
@@ -428,36 +470,28 @@ parse_second_pos_dtb:
 parse_logo:
 #endif
 	/*
-	 * Add logo.bmp from "logo" parititon
+	 * Add logo.bmp and logo_kernel.bmp from "logo" parititon
+	 *
+	 * Provide a "logo" partition for user to store logo.bmp and
+	 * logo_kernel.bmp, so that the users can update them from
+	 * kernel or user-space dynamically.
 	 *
-	 * We provide a "logo" partition for user to store logo.bmp
-	 * and update from kernel user space dynamically.
+	 * "logo" partition layout, not change order:
+	 *
+	 *   |----------------------| 0x00
+	 *   | raw logo.bmp         |
+	 *   |----------------------| N*512-byte aligned
+	 *   | raw logo_kernel.bmp  |
+	 *   |----------------------|
+	 *
+	 * N: the sector count of logo.bmp
 	 */
 	if (part_get_info_by_name(dev_desc, PART_LOGO, &part_info) >= 0) {
-		header = memalign(ARCH_DMA_MINALIGN, dev_desc->blksz);
-		if (!header) {
-			ret = -ENOMEM;
-			goto err;
-		}
-
-		ret = blk_dread(dev_desc, part_info.start, 1, header);
-		if (ret != 1) {
-			ret = -EIO;
-			goto err2;
-		}
-
-		if (header->signature[0] != 'B' ||
-		    header->signature[1] != 'M') {
-			ret = 0;
-			goto err2;
-		}
+		u32 filesz;
 
-		ret = replace_resource_entry("logo.bmp", part_info.start, 0,
-					     get_unaligned_le32(&header->file_size));
-		if (!ret)
-			printf("Found logo.bmp in logo part\n");
-err2:
-		free(header);
+		if (!read_logo_bmp("logo.bmp", &part_info, 0, &filesz))
+			read_logo_bmp("logo_kernel.bmp", &part_info,
+				      filesz, NULL);
 	}
 
 	/*

commit ea43a22275efb8709b4c8339b31bd500720685dc
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Mon Nov 25 10:03:38 2019 +0800

    configs: rk3128x: enable crypto v1
    
    enable CONFIG_DM_CRYPTO
    enable CONFIG_ROCKCHIP_CRYPTO_V1
    
    Change-Id: I009fb6441f3fa7e61b3f2c6f32ae8d8161747aa9
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/configs/rk3128x_defconfig b/configs/rk3128x_defconfig
index 307ff2d5a7..9b3da6a3a9 100644
--- a/configs/rk3128x_defconfig
+++ b/configs/rk3128x_defconfig
@@ -72,6 +72,8 @@ CONFIG_TPL_SYSCON=y
 CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_TPL_CLK=y
+CONFIG_DM_CRYPTO=y
+CONFIG_ROCKCHIP_CRYPTO_V1=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y

commit 44d495f61193e29b2c152cccb0cb93a61c04b63f
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Fri Nov 22 15:24:30 2019 +0800

    configs: rk3368: enable crypto v1
    
    enable CONFIG_DM_CRYPTO
    enable CONFIG_ROCKCHIP_CRYPTO_V1
    
    Change-Id: Ib37e4587b5f28f45c7d1389922060ddbd787f24e
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/configs/rk3368_defconfig b/configs/rk3368_defconfig
index 0872c3f545..51a2cf6888 100644
--- a/configs/rk3368_defconfig
+++ b/configs/rk3368_defconfig
@@ -44,6 +44,8 @@ CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-cl
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_CLK=y
+CONFIG_DM_CRYPTO=y
+CONFIG_ROCKCHIP_CRYPTO_V1=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y

commit 1be69feab08cff2dc18cb8cfdb72dee91219e003
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Fri Nov 22 15:23:12 2019 +0800

    rockchip: dts: rk3368: add and enable crypto node
    
    Change-Id: Icfffb1311388ff7de59b9c9da7d5f25c7eb35684
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/arch/arm/dts/rk3368-evb.dts b/arch/arm/dts/rk3368-evb.dts
index 7502caca5b..bf6aff2278 100644
--- a/arch/arm/dts/rk3368-evb.dts
+++ b/arch/arm/dts/rk3368-evb.dts
@@ -14,6 +14,10 @@
 	compatible = "rockchip,rk3368-evb", "rockchip,rk3368";
 };
 
+&crypto {
+	status = "okay";
+};
+
 &emmc {
 	fifo-mode;
 	bus-width = <8>;
diff --git a/arch/arm/dts/rk3368-u-boot.dtsi b/arch/arm/dts/rk3368-u-boot.dtsi
index 38ba454823..4964e0dca1 100644
--- a/arch/arm/dts/rk3368-u-boot.dtsi
+++ b/arch/arm/dts/rk3368-u-boot.dtsi
@@ -51,6 +51,10 @@
 	u-boot,dm-pre-reloc;
 };
 
+&crypto {
+	u-boot,dm-pre-reloc;
+};
+
 &grf {
 	u-boot,dm-pre-reloc;
 };
diff --git a/arch/arm/dts/rk3368.dtsi b/arch/arm/dts/rk3368.dtsi
index 228e8af994..de9434151d 100644
--- a/arch/arm/dts/rk3368.dtsi
+++ b/arch/arm/dts/rk3368.dtsi
@@ -750,6 +750,14 @@
 		interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
 	};
 
+	crypto: crypto@ff8a0000 {
+		compatible = "rockchip,rk3368-crypto";
+		reg = <0x0 0xff8a0000 0x0 0x10000>;
+		clock-names = "sclk_crypto";
+		clocks = <&cru SCLK_CRYPTO>;
+		status = "disabled";
+	};
+
 	gic: interrupt-controller@ffb71000 {
 		compatible = "arm,gic-400";
 		interrupt-controller;

commit 14ce00ea6054d950077c021d7b484c52dc54399f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Dec 7 15:00:31 2019 +0800

    scripts: repack-bootimg: repack second if total repack
    
    The second is resource.img.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ibc09eb2ebb3dc8ba3fda5710d6ae8dfa807c0099

diff --git a/scripts/repack-bootimg b/scripts/repack-bootimg
index 61cc32c49c..643a2fef25 100755
--- a/scripts/repack-bootimg
+++ b/scripts/repack-bootimg
@@ -3,6 +3,8 @@
 # Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd.
 set -e
 
+ARGC=$#
+
 usage() {
 	cat >&2 << USAGE
 usage: $0 [-h] [-z] --boot_img BOOT_IMG [--out OUT] [--kernel KERNEL] [--ramdisk RAMDISK] [--second SECOND] [--dtb DTB ] [--recovery_dtbo RECOVERY_DTBO] -o OUTPUT
@@ -118,6 +120,11 @@ log="$out/unpack.log"
 mkdir -p $out
 $srctree/scripts/unpack_bootimg --boot_img $boot_img --out $out > $log
 
+if [ $ARGC -eq 4 ]; then
+	$srctree/scripts/unpack_resource.sh $second out/resource/ > /dev/null
+	$srctree/tools/resource_tool --root=out/resource --image=$second out/resource/* > /dev/null
+fi
+
 cmdline=$(grep -a "^command line args: " $log | tr '\0' '\n'| sed "s/^command line args: //")
 extra_cmdline=$(grep -a "^additional command line args: " $log | tr '\0' '\n'| sed "s/^additional command line args: //")
 version=$(grep -a "^boot image header version: " $log | sed "s/^boot image header version: //")

commit 20769c6481925ede93331dba8ca5ad0bf1183749
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Fri Dec 6 15:57:03 2019 +0800

    clk: rockchip: rk1808: Restore crypto frequency after PLL frequency setting
    
    Change-Id: I4821309bfe1a2333469eae1d92f1d7716ea6635e
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk1808.c b/drivers/clk/rockchip/clk_rk1808.c
index 51223f93fa..c12ea5b922 100644
--- a/drivers/clk/rockchip/clk_rk1808.c
+++ b/drivers/clk/rockchip/clk_rk1808.c
@@ -1243,6 +1243,9 @@ static int rk1808_clk_probe(struct udevice *dev)
 {
 	struct rk1808_clk_priv *priv = dev_get_priv(dev);
 	int ret;
+#ifndef CONFIG_SPL_BUILD
+	ulong crypto_rate, crypto_apk_rate;
+#endif
 
 	priv->sync_kernel = false;
 	if (!priv->armclk_enter_hz) {
@@ -1266,6 +1269,11 @@ static int rk1808_clk_probe(struct udevice *dev)
 	priv->npll_hz = rockchip_pll_get_rate(&rk1808_pll_clks[NPLL],
 					      priv->cru, NPLL);
 
+#ifndef CONFIG_SPL_BUILD
+	crypto_rate = rk1808_crypto_get_clk(priv, SCLK_CRYPTO);
+	crypto_apk_rate = rk1808_crypto_get_clk(priv, SCLK_CRYPTO_APK);
+#endif
+
 	/* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
 	ret = clk_set_defaults(dev);
 	if (ret)
@@ -1273,6 +1281,11 @@ static int rk1808_clk_probe(struct udevice *dev)
 	else
 		priv->sync_kernel = true;
 
+#ifndef CONFIG_SPL_BUILD
+	rk1808_crypto_set_clk(priv, SCLK_CRYPTO, crypto_rate);
+	rk1808_crypto_set_clk(priv, SCLK_CRYPTO_APK, crypto_apk_rate);
+#endif
+
 	return 0;
 }
 

commit 897c26947d194a946dfcaa333672249a1bae6815
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Thu Nov 21 17:02:36 2019 +0800

    configs: rk3328: enable crypto v1
    
    enable CONFIG_DM_CRYPTO
    enable CONFIG_ROCKCHIP_CRYPTO_V1
    
    Change-Id: I26a5c561c768a28bb63cfce382b59ad2b3f69296
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index 5dd4bb8e4c..e170d77e47 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -73,6 +73,8 @@ CONFIG_SPL_SYSCON=y
 CONFIG_TPL_SYSCON=y
 CONFIG_CLK=y
 CONFIG_SPL_CLK=y
+CONFIG_DM_CRYPTO=y
+CONFIG_ROCKCHIP_CRYPTO_V1=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y

commit 2b0e21e891900d9945bc8ff98d752b1a19915f45
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Thu Nov 21 16:58:58 2019 +0800

    rockchip: dts: rk3328: add and enable crypto node
    
    Change-Id: I93603c71fa04287529d49113c7d5728f57eb242f
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts
index af9c7b7a89..06d90e2318 100644
--- a/arch/arm/dts/rk3328-evb.dts
+++ b/arch/arm/dts/rk3328-evb.dts
@@ -88,6 +88,10 @@
 	status = "okay";
 };
 
+&crypto {
+	status = "okay";
+};
+
 &emmc {
 	bus-width = <8>;
 	cap-mmc-highspeed;
diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi
index 091eed2146..ee0dd9460d 100644
--- a/arch/arm/dts/rk3328-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-u-boot.dtsi
@@ -21,6 +21,10 @@
 	u-boot,dm-pre-reloc;
 };
 
+&crypto {
+	u-boot,dm-pre-reloc;
+};
+
 &grf {
 	u-boot,dm-pre-reloc;
 };
diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi
index abe05f5be9..73356ea27d 100644
--- a/arch/arm/dts/rk3328.dtsi
+++ b/arch/arm/dts/rk3328.dtsi
@@ -186,6 +186,14 @@
 		status = "disabled";
 	};
 
+	crypto: crypto@ff060000 {
+		compatible = "rockchip,rk322x-crypto";
+		reg = <0x0 0xff060000 0x0 0x10000>;
+		clock-names = "sclk_crypto";
+		clocks = <&cru SCLK_CRYPTO>;
+		status = "disabled";
+	};
+
 	grf: syscon@ff100000 {
 		compatible = "rockchip,rk3328-grf", "syscon", "simple-mfd";
 		reg = <0x0 0xff100000 0x0 0x1000>;

commit ba68da9b9cbea226e2d4443e366cdb7fa1f9c51f
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Fri Nov 22 11:20:37 2019 +0800

    configs: rk1808: enable crypto v2
    
    enable CONFIG_DM_CRYPTO
    enable CONFIG_ROCKCHIP_CRYPTO_V2
    
    Change-Id: I2af6bac370e421428e6a3bdc2ef77a8e51656a0e
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/configs/rk1808_defconfig b/configs/rk1808_defconfig
index d9ab78240a..3550ec2e83 100644
--- a/configs/rk1808_defconfig
+++ b/configs/rk1808_defconfig
@@ -67,6 +67,8 @@ CONFIG_SYSCON=y
 CONFIG_SPL_SYSCON=y
 CONFIG_CLK=y
 CONFIG_SPL_CLK=y
+CONFIG_DM_CRYPTO=y
+CONFIG_ROCKCHIP_CRYPTO_V2=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y

commit ccd7cfbbb387e1f02540e05de670e9ad509abe4b
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Fri Nov 22 15:43:37 2019 +0800

    configs: rk3399pro: enable crypto v1
    
    enable CONFIG_DM_CRYPTO
    enable CONFIG_ROCKCHIP_CRYPTO_V1
    
    Change-Id: I53216cdf0fcb64ff7b05e078d7137d03c522711a
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/configs/rk3399pro_defconfig b/configs/rk3399pro_defconfig
index 3c5df47751..876e4b9e38 100644
--- a/configs/rk3399pro_defconfig
+++ b/configs/rk3399pro_defconfig
@@ -61,6 +61,8 @@ CONFIG_SYSCON=y
 CONFIG_SPL_SYSCON=y
 CONFIG_CLK=y
 CONFIG_SPL_CLK=y
+CONFIG_DM_CRYPTO=y
+CONFIG_ROCKCHIP_CRYPTO_V1=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y

commit 8e2f0535a9ef9916289f7fd97463d730efeba763
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Thu Nov 21 16:04:34 2019 +0800

    configs: rk322x: enable crypto v1
    
    enable CONFIG_DM_CRYPTO
    enable CONFIG_ROCKCHIP_CRYPTO_V1
    
    Change-Id: Ia58772565619f5c8c825a5d7eb9707c29084f144
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/configs/rk322x_defconfig b/configs/rk322x_defconfig
index 7eb32a9ae4..3dc30b7f25 100644
--- a/configs/rk322x_defconfig
+++ b/configs/rk322x_defconfig
@@ -71,6 +71,8 @@ CONFIG_TPL_SYSCON=y
 CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_TPL_CLK=y
+CONFIG_DM_CRYPTO=y
+CONFIG_ROCKCHIP_CRYPTO_V1=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y

commit 7a92af66747fd504124e74f83b53ee1d4c607e3a
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Thu Nov 21 16:03:15 2019 +0800

    rockchip: dts: rk322x: add and enable crypto node
    
    Change-Id: Ic8d398dc471672e0ddc50fafd7bf668bc6398fdc
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/arch/arm/dts/rk3229-evb.dts b/arch/arm/dts/rk3229-evb.dts
index 62acc7f5a2..bd171ca957 100644
--- a/arch/arm/dts/rk3229-evb.dts
+++ b/arch/arm/dts/rk3229-evb.dts
@@ -76,6 +76,10 @@
 	status = "okay";
 };
 
+&crypto {
+	status = "okay";
+};
+
 &emmc {
 	status = "okay";
 };
diff --git a/arch/arm/dts/rk322x-u-boot.dtsi b/arch/arm/dts/rk322x-u-boot.dtsi
index 90f709dc3e..acb5f506b9 100644
--- a/arch/arm/dts/rk322x-u-boot.dtsi
+++ b/arch/arm/dts/rk322x-u-boot.dtsi
@@ -19,6 +19,10 @@
 	u-boot,dm-pre-reloc;
 };
 
+&crypto {
+	u-boot,dm-pre-reloc;
+};
+
 &dmc {
 	u-boot,dm-pre-reloc;
 };
diff --git a/arch/arm/dts/rk322x.dtsi b/arch/arm/dts/rk322x.dtsi
index e9ee5a2933..f3cb5ad07f 100644
--- a/arch/arm/dts/rk322x.dtsi
+++ b/arch/arm/dts/rk322x.dtsi
@@ -129,6 +129,14 @@
 		};
 	};
 
+	crypto: crypto@100a0000 {
+		compatible = "rockchip,rk322x-crypto";
+		reg = <0x100a0000 0x10000>;
+		clock-names = "sclk_crypto";
+		clocks = <&cru SCLK_CRYPTO>;
+		status = "disabled";
+	};
+
 	i2s1: i2s1@100b0000 {
 		compatible = "rockchip,rk3228-i2s", "rockchip,rk3066-i2s";
 		reg = <0x100b0000 0x4000>;

commit d7c8479792b08acb6039549bff2333afc730f41d
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Thu Nov 21 16:39:13 2019 +0800

    configs: rk3308(aarch32): enable crypto v2
    
    enable CONFIG_DM_CRYPTO
    enable CONFIG_ROCKCHIP_CRYPTO_V2
    
    Change-Id: Ic7a3aff9702fae6766ed1e2e0db30e26c448d838
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/configs/rk3308-aarch32_defconfig b/configs/rk3308-aarch32_defconfig
index 226d8fc72c..e9633aa1a1 100644
--- a/configs/rk3308-aarch32_defconfig
+++ b/configs/rk3308-aarch32_defconfig
@@ -44,6 +44,8 @@ CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_CLK=y
+CONFIG_DM_CRYPTO=y
+CONFIG_ROCKCHIP_CRYPTO_V2=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y
diff --git a/configs/rk3308_defconfig b/configs/rk3308_defconfig
index d7e625da28..962d137b88 100644
--- a/configs/rk3308_defconfig
+++ b/configs/rk3308_defconfig
@@ -62,6 +62,8 @@ CONFIG_TPL_DM=y
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_CLK=y
+CONFIG_DM_CRYPTO=y
+CONFIG_ROCKCHIP_CRYPTO_V2=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y

commit ed6f2c93bcb56b8c6e38c1ddde9460e24973d21c
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Thu Nov 21 16:32:34 2019 +0800

    rockchip: dts: rk3308-evb: enable crypto
    
    Change-Id: I9cb50f7520973ffbd83cbada5555ca2aa4ec54c0
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-evb.dts b/arch/arm/dts/rk3308-evb.dts
index 3178d459c5..3056f5bb87 100644
--- a/arch/arm/dts/rk3308-evb.dts
+++ b/arch/arm/dts/rk3308-evb.dts
@@ -402,3 +402,7 @@
 		};
 	};
 };
+
+&crypto {
+	status = "okay";
+};

commit c13aa93bb63e070c260590bfce0acf58d7815421
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Thu Nov 21 16:23:49 2019 +0800

    configs: px30: enable crypto v2
    
    enable CONFIG_DM_CRYPTO
    enable CONFIG_ROCKCHIP_CRYPTO_V2
    
    Change-Id: I3bf90bb2ca0e8af7643348fd96328bea092dd34c
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/configs/px30_defconfig b/configs/px30_defconfig
index f101dd4fed..aa618cedae 100644
--- a/configs/px30_defconfig
+++ b/configs/px30_defconfig
@@ -62,6 +62,8 @@ CONFIG_SYSCON=y
 CONFIG_SPL_SYSCON=y
 CONFIG_CLK=y
 CONFIG_SPL_CLK=y
+CONFIG_DM_CRYPTO=y
+CONFIG_ROCKCHIP_CRYPTO_V2=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y

commit 3cdcdbca2d3151bceee83e8fc30f619738b6249e
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Wed Nov 20 15:04:16 2019 +0800

    configs: rk3326(aarch32): enable crypto v2
    
    enable CONFIG_DM_CRYPTO
    enable CONFIG_ROCKCHIP_CRYPTO_V2
    
    Change-Id: I4a21d5daaf6edc75e5df1b343e0fd29a46da45be
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/configs/rk3326-aarch32_defconfig b/configs/rk3326-aarch32_defconfig
index 023dbbc006..dc6760a2e6 100644
--- a/configs/rk3326-aarch32_defconfig
+++ b/configs/rk3326-aarch32_defconfig
@@ -49,6 +49,8 @@ CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-cl
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_CLK=y
+CONFIG_DM_CRYPTO=y
+CONFIG_ROCKCHIP_CRYPTO_V2=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y
diff --git a/configs/rk3326_defconfig b/configs/rk3326_defconfig
index 0ab7324838..b9c59f871c 100644
--- a/configs/rk3326_defconfig
+++ b/configs/rk3326_defconfig
@@ -66,6 +66,8 @@ CONFIG_SYSCON=y
 CONFIG_SPL_SYSCON=y
 CONFIG_CLK=y
 CONFIG_SPL_CLK=y
+CONFIG_DM_CRYPTO=y
+CONFIG_ROCKCHIP_CRYPTO_V2=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y

commit 85dc87d14aa16c139a0ad4f4257039f70a83041a
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Thu Nov 21 16:22:10 2019 +0800

    rockchip: dts: px30-evb: enable crypto
    
    Change-Id: Ieff0609a8310a0da6215e042905321928115e7b9
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/arch/arm/dts/px30-evb.dts b/arch/arm/dts/px30-evb.dts
index d134a1e759..bf1c857d62 100644
--- a/arch/arm/dts/px30-evb.dts
+++ b/arch/arm/dts/px30-evb.dts
@@ -399,6 +399,10 @@
 	status = "okay";
 };
 
+&crypto {
+	status = "okay";
+};
+
 &emmc {
 	bus-width = <8>;
 	cap-mmc-highspeed;

commit fb5bc6bbf9a6539653b004883a3f9d1fada028a8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Dec 9 20:08:48 2019 +0800

    crypto: rockchip: v1: require update data length 4-byte aligned
    
    Only the last update data length can be any length.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I4ee6c596575306799f562433e83323d805b59d32

diff --git a/drivers/crypto/rockchip/crypto_v1.c b/drivers/crypto/rockchip/crypto_v1.c
index b9de742204..eb6a3044a8 100644
--- a/drivers/crypto/rockchip/crypto_v1.c
+++ b/drivers/crypto/rockchip/crypto_v1.c
@@ -17,6 +17,7 @@
 struct rockchip_crypto_priv {
 	struct rk_crypto_reg *reg;
 	struct clk clk;
+	sha_context *ctx;
 	u32 frequency;
 	char *clocks;
 	u32 nclocks;
@@ -47,6 +48,7 @@ static int rockchip_crypto_sha_init(struct udevice *dev, sha_context *ctx)
 		return -EINVAL;
 	}
 
+	priv->ctx = ctx;
 	priv->length = 0;
 	writel(ctx->length, &reg->crypto_hash_msg_len);
 	if (ctx->algo == CRYPTO_SHA256) {
@@ -102,6 +104,10 @@ static int rockchip_crypto_sha_update(struct udevice *dev,
 		return -EINVAL;
 
 	priv->length += len;
+	if ((priv->length != priv->ctx->length) && !IS_ALIGNED(len, 4)) {
+		printf("Crypto-v1: require update data length 4-byte aligned\n");
+		return -EINVAL;
+	}
 
 	/* Must flush dcache before crypto DMA fetch data region */
 	aligned_input = round_down((ulong)input, CONFIG_SYS_CACHELINE_SIZE);

commit da2d9dd013105b5a685f188ec9ac42107a889155
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Mon Dec 2 17:23:45 2019 +0800

    crypto: rockchip: v1: make input buffer CONFIG_SYS_CACHELINE_SIZE aligned
    
    Avoid warning from flush_dcache(): "CACHE: Misaligned operation at range ..."
    
    Change-Id: I8879a3a0dc324463dc5e042bace183a6a2d453a5
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/drivers/crypto/rockchip/crypto_v1.c b/drivers/crypto/rockchip/crypto_v1.c
index 4d24f53b69..b9de742204 100644
--- a/drivers/crypto/rockchip/crypto_v1.c
+++ b/drivers/crypto/rockchip/crypto_v1.c
@@ -96,6 +96,7 @@ static int rockchip_crypto_sha_update(struct udevice *dev,
 {
 	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
 	struct rk_crypto_reg *reg = priv->reg;
+	ulong aligned_input, aligned_len;
 
 	if (!len)
 		return -EINVAL;
@@ -103,7 +104,10 @@ static int rockchip_crypto_sha_update(struct udevice *dev,
 	priv->length += len;
 
 	/* Must flush dcache before crypto DMA fetch data region */
-	flush_cache((unsigned long)input, len);
+	aligned_input = round_down((ulong)input, CONFIG_SYS_CACHELINE_SIZE);
+	aligned_len = round_up(len + ((ulong)input - aligned_input),
+			       CONFIG_SYS_CACHELINE_SIZE);
+	flush_cache(aligned_input, aligned_len);
 
 	/* Wait last complete */
 	do {} while (readl(&reg->crypto_ctrl) & HASH_START);

commit b5038b6202dca972204b929a36eefd3233627667
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 28 09:31:41 2019 +0800

    crypto: rockchip: v1: update print message
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ic65aa48277f13b9dbf416a4ca19019d27ad0b546

diff --git a/drivers/crypto/rockchip/crypto_v1.c b/drivers/crypto/rockchip/crypto_v1.c
index c3d2d2791b..4d24f53b69 100644
--- a/drivers/crypto/rockchip/crypto_v1.c
+++ b/drivers/crypto/rockchip/crypto_v1.c
@@ -43,8 +43,7 @@ static int rockchip_crypto_sha_init(struct udevice *dev, sha_context *ctx)
 		return -EINVAL;
 
 	if (!ctx->length) {
-		printf("%s: Err: crypto v1 request total data "
-		       "length when sha init\n", __func__);
+		printf("Crypto-v1: require data total length for sha init\n");
 		return -EINVAL;
 	}
 
@@ -132,9 +131,8 @@ static int rockchip_crypto_sha_final(struct udevice *dev,
 	int i;
 
 	if (priv->length != ctx->length) {
-		printf("%s: Err: update total length(0x%x) is not equal "
-		       "to init total length(0x%x)!\n",
-		       __func__, priv->length, ctx->length);
+		printf("Crypto-v1: data total length(0x%08x) != init length(0x%08x)!\n",
+		       priv->length, ctx->length);
 		return -EIO;
 	}
 
@@ -225,7 +223,7 @@ static int rockchip_crypto_ofdata_to_platdata(struct udevice *dev)
 	int len;
 
 	if (!dev_read_prop(dev, "clocks", &len)) {
-		printf("Can't find \"clocks\" property\n");
+		printf("Crypto-v1: can't find \"clocks\" property\n");
 		return -EINVAL;
 	}
 
@@ -236,7 +234,7 @@ static int rockchip_crypto_ofdata_to_platdata(struct udevice *dev)
 	priv->nclocks = len / sizeof(u32);
 	if (dev_read_u32_array(dev, "clocks", (u32 *)priv->clocks,
 			       priv->nclocks)) {
-		printf("Can't read \"clocks\" property\n");
+		printf("Crypto-v1: can't read \"clocks\" property\n");
 		return -EINVAL;
 	}
 
@@ -255,7 +253,7 @@ static int rockchip_crypto_probe(struct udevice *dev)
 
 	ret = rockchip_get_clk(&priv->clk.dev);
 	if (ret) {
-		printf("Failed to get clk device, ret=%d\n", ret);
+		printf("Crypto-v1: failed to get clk device, ret=%d\n", ret);
 		return ret;
 	}
 
@@ -264,8 +262,8 @@ static int rockchip_crypto_probe(struct udevice *dev)
 		priv->clk.id = clocks[i];
 		ret = clk_set_rate(&priv->clk, priv->frequency);
 		if (ret < 0) {
-			printf("%s: Failed to set clk(%ld): ret=%d\n",
-			       __func__, priv->clk.id, ret);
+			printf("Crypto-v1: failed to set clk(%ld): ret=%d\n",
+			       priv->clk.id, ret);
 			return ret;
 		}
 	}

commit c0e47d038c58f264b6eaf9137e03ffd3cf80cdae
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Mon Dec 2 17:10:30 2019 +0800

    crypto: rockchip: v2: rk1808 is not support SHA512
    
    Change-Id: Ic910d5e87657c80d454c4d8b6dc575ece2867f3e
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/drivers/crypto/rockchip/crypto_v2.c b/drivers/crypto/rockchip/crypto_v2.c
index 04ff74e880..a09d4ecaa5 100644
--- a/drivers/crypto/rockchip/crypto_v2.c
+++ b/drivers/crypto/rockchip/crypto_v2.c
@@ -479,7 +479,9 @@ static u32 rockchip_crypto_capability(struct udevice *dev)
 	return CRYPTO_MD5 |
 	       CRYPTO_SHA1 |
 	       CRYPTO_SHA256 |
+#if !defined(CONFIG_ROCKCHIP_RK1808)
 	       CRYPTO_SHA512 |
+#endif
 	       CRYPTO_RSA512 |
 	       CRYPTO_RSA1024 |
 	       CRYPTO_RSA2048 |

commit 8609b717aad05a1d2d49cca8727ede94495c1ec1
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Mon Dec 2 17:08:39 2019 +0800

    cmd: crypto: unifiy hash output variable
    
    rk1808 is not support SHA512.
    
    Change-Id: Ica8c1a04553e862915417c36db6362df049e002e
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/cmd/crypto.c b/cmd/crypto.c
index 329ced8ef4..f2e1aaba57 100644
--- a/cmd/crypto.c
+++ b/cmd/crypto.c
@@ -233,15 +233,8 @@ static int do_crypto(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	sha256_context sha256_ctx;
 	sha512_context sha512_ctx;
 	rsa_key rsa_key;
-	u8 sha256_out0[32];
-	u8 sha256_out1[32];
-	u8 sha1_out0[20];
-	u8 sha1_out1[20];
-	u8 rsa_out[256];
-	u8 md5_out0[16];
-	u8 md5_out1[16];
-	u8 sha512_out0[64];
-	u8 sha512_out1[64];
+	u8 hard_out[256];
+	u8 soft_out[64];
 	u32 cap;
 
 	/* CRYPTO_V1 TODO: SHA512 is not available */
@@ -249,7 +242,10 @@ static int do_crypto(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	cap = CRYPTO_MD5 | CRYPTO_SHA1 | CRYPTO_SHA256 |
 	      CRYPTO_RSA2048;
 #else
-	cap = CRYPTO_MD5 | CRYPTO_SHA1 | CRYPTO_SHA256 | CRYPTO_SHA512 |
+	cap = CRYPTO_MD5 | CRYPTO_SHA1 | CRYPTO_SHA256 |
+#if !defined(CONFIG_ROCKCHIP_RK1808)
+	      CRYPTO_SHA512 |
+#endif
 	      CRYPTO_RSA2048 | CRYPTO_TRNG;
 #endif
 	dev = crypto_get_device(cap);
@@ -262,10 +258,11 @@ static int do_crypto(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	if (cap & CRYPTO_MD5) {
 		csha_ctx.algo = CRYPTO_MD5;
 		csha_ctx.length = sizeof(foo_data);
+		memset(hard_out, 0x00, sizeof(hard_out));
 		crypto_sha_csum(dev, &csha_ctx, (char *)foo_data,
-				sizeof(foo_data), md5_out0);
-		md5(foo_data, sizeof(foo_data), md5_out1);
-		dump_hash("MD5", md5_out0, md5_out1,
+				sizeof(foo_data), hard_out);
+		md5(foo_data, sizeof(foo_data), soft_out);
+		dump_hash("MD5", hard_out, soft_out,
 			  crypto_algo_nbits(csha_ctx.algo));
 	}
 
@@ -273,12 +270,13 @@ static int do_crypto(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	if (cap & CRYPTO_SHA1) {
 		csha_ctx.algo = CRYPTO_SHA1;
 		csha_ctx.length = sizeof(foo_data);
+		memset(hard_out, 0x00, sizeof(hard_out));
 		crypto_sha_csum(dev, &csha_ctx, (char *)foo_data,
-				sizeof(foo_data), sha1_out0);
+				sizeof(foo_data), hard_out);
 		sha1_starts(&sha1_ctx);
 		sha1_update(&sha1_ctx, (const u8 *)foo_data, sizeof(foo_data));
-		sha1_finish(&sha1_ctx, sha1_out1);
-		dump_hash("SHA1", sha1_out0, sha1_out1,
+		sha1_finish(&sha1_ctx, soft_out);
+		dump_hash("SHA1", hard_out, soft_out,
 			  crypto_algo_nbits(csha_ctx.algo));
 	}
 
@@ -286,13 +284,14 @@ static int do_crypto(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	if (cap & CRYPTO_SHA512) {
 		csha_ctx.algo = CRYPTO_SHA512;
 		csha_ctx.length = sizeof(foo_data);
+		memset(hard_out, 0x00, sizeof(hard_out));
 		crypto_sha_csum(dev, &csha_ctx, (char *)foo_data,
-				sizeof(foo_data), sha512_out0);
+				sizeof(foo_data), hard_out);
 		sha512_starts(&sha512_ctx);
 		sha512_update(&sha512_ctx, (const u8 *)foo_data,
 			      sizeof(foo_data));
-		sha512_finish(&sha512_ctx, sha512_out1);
-		dump_hash("SHA512", sha512_out0, sha512_out1,
+		sha512_finish(&sha512_ctx, soft_out);
+		dump_hash("SHA512", hard_out, soft_out,
 			  crypto_algo_nbits(csha_ctx.algo));
 	}
 
@@ -300,13 +299,14 @@ static int do_crypto(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	if (cap & CRYPTO_SHA256) {
 		csha_ctx.algo = CRYPTO_SHA256;
 		csha_ctx.length = sizeof(foo_data);
+		memset(hard_out, 0x00, sizeof(hard_out));
 		crypto_sha_csum(dev, &csha_ctx, (char *)foo_data,
-				sizeof(foo_data), sha256_out0);
+				sizeof(foo_data), hard_out);
 		sha256_starts(&sha256_ctx);
 		sha256_update(&sha256_ctx, (const u8 *)foo_data,
 			      sizeof(foo_data));
-		sha256_finish(&sha256_ctx, sha256_out1);
-		dump_hash("SHA256", sha256_out0, sha256_out1,
+		sha256_finish(&sha256_ctx, soft_out);
+		dump_hash("SHA256", hard_out, soft_out,
 			  crypto_algo_nbits(csha_ctx.algo));
 	}
 
@@ -319,16 +319,21 @@ static int do_crypto(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 #ifdef CONFIG_ROCKCHIP_CRYPTO_V1
 		rsa_key.c = (u32 *)&rsa2048_c;
 #endif
-		crypto_rsa_verify(dev, &rsa_key, rsa2048_sha256_sign, rsa_out);
-		dump_hash("RSA2048-SHA256", rsa_out,
-			  sha256_out1, crypto_algo_nbits(csha_ctx.algo));
+		memset(hard_out, 0x00, sizeof(hard_out));
+		crypto_rsa_verify(dev, &rsa_key, rsa2048_sha256_sign, hard_out);
+		sha256_starts(&sha256_ctx);
+		sha256_update(&sha256_ctx, (const u8 *)foo_data,
+			      sizeof(foo_data));
+		sha256_finish(&sha256_ctx, soft_out);
+		dump_hash("RSA2048-SHA256", hard_out,
+			  soft_out, crypto_algo_nbits(csha_ctx.algo));
 	}
 
 	/* TRNG */
 	if (cap & CRYPTO_TRNG) {
-		memset(rsa_out, 0x00, sizeof(rsa_out));
-		crypto_get_trng(dev, rsa_out, sizeof(rsa_out));
-		dump_hex("TRNG", rsa_out, sizeof(rsa_out));
+		memset(hard_out, 0x00, sizeof(hard_out));
+		crypto_get_trng(dev, hard_out, sizeof(hard_out));
+		dump_hex("TRNG", hard_out, sizeof(hard_out));
 	}
 
 	return 0;

commit 1d2a3f6ca3cf52fa4ed4be938b068639415503ab
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Dec 9 18:56:49 2019 +0800

    dm: crypto: move head file to crypto.h
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Iac0f2e5eec7d0370182f7b6a2c904b4542bbbc37

diff --git a/drivers/crypto/crypto-uclass.c b/drivers/crypto/crypto-uclass.c
index 0158046a81..5c59d0c516 100644
--- a/drivers/crypto/crypto-uclass.c
+++ b/drivers/crypto/crypto-uclass.c
@@ -3,10 +3,7 @@
  * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
  */
 
-#include <common.h>
 #include <crypto.h>
-#include <dm.h>
-#include <u-boot/sha1.h>
 
 u32 crypto_algo_nbits(u32 algo)
 {
diff --git a/include/crypto.h b/include/crypto.h
index 6322052a8d..4faa732f31 100644
--- a/include/crypto.h
+++ b/include/crypto.h
@@ -6,6 +6,10 @@
 #ifndef _CORE_CRYPTO_H_
 #define _CORE_CRYPTO_H_
 
+#include <common.h>
+#include <dm.h>
+#include <u-boot/sha1.h>
+
 /* Algorithms/capability of crypto, works together with crypto_algo_nbits() */
 #define CRYPTO_MD5		BIT(0)
 #define CRYPTO_SHA1		BIT(1)

commit 4333cc9aff4288aa9728c51a652c6cb5f2a9085d
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Wed Oct 23 16:11:53 2019 +0800

    rockchip: drivers: clk: rk3328: add spi clk config for spl and uboot
    
    Change-Id: I12da02d52e3c4aec64fbd6a378cd40e96c3775ce
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c
index d4778379e6..b4d68a1928 100644
--- a/drivers/clk/rockchip/clk_rk3328.c
+++ b/drivers/clk/rockchip/clk_rk3328.c
@@ -348,6 +348,35 @@ static ulong rk3328_mmc_set_clk(struct rk3328_clk_priv *priv,
 	return rk3328_mmc_get_clk(priv, clk_id);
 }
 
+static ulong rk3328_spi_get_clk(struct rk3328_clk_priv *priv)
+{
+	struct rk3328_cru *cru = priv->cru;
+	u32 div, con, mux, p_rate;
+
+	con = readl(&cru->clksel_con[24]);
+	div = (con & CLK_SPI_DIV_CON_MASK) >> CLK_SPI_DIV_CON_SHIFT;
+	mux = (con & CLK_SPI_PLL_SEL_MASK) >> CLK_SPI_PLL_SEL_SHIFT;
+	if (mux)
+		p_rate = priv->gpll_hz;
+	else
+		p_rate = priv->cpll_hz;
+
+	return DIV_TO_RATE(p_rate, div);
+}
+
+static ulong rk3328_spi_set_clk(struct rk3328_clk_priv *priv, uint hz)
+{
+	struct rk3328_cru *cru = priv->cru;
+	u32 div = priv->gpll_hz / hz;
+
+	rk_clrsetreg(&cru->clksel_con[24],
+		     CLK_SPI_PLL_SEL_MASK | CLK_SPI_DIV_CON_MASK,
+		     CLK_SPI_PLL_SEL_GPLL << CLK_SPI_PLL_SEL_SHIFT |
+		     (div - 1) << CLK_SPI_DIV_CON_SHIFT);
+
+	return DIV_TO_RATE(priv->gpll_hz, div);
+}
+
 #ifndef CONFIG_SPL_BUILD
 static ulong rk3328_pwm_get_clk(struct rk3328_clk_priv *priv)
 {
@@ -760,6 +789,9 @@ static ulong rk3328_clk_get_rate(struct clk *clk)
 	case SCLK_EMMC_SAMPLE:
 		rate = rk3328_mmc_get_clk(priv, clk->id);
 		break;
+	case SCLK_SPI:
+		rate = rk3328_spi_get_clk(priv);
+		break;
 #ifndef CONFIG_SPL_BUILD
 	case SCLK_I2C0:
 	case SCLK_I2C1:
@@ -838,6 +870,9 @@ static ulong rk3328_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_EMMC:
 		ret = rk3328_mmc_set_clk(priv, clk->id, rate);
 		break;
+	case SCLK_SPI:
+		ret = rk3328_spi_set_clk(priv, rate);
+		break;
 #ifndef CONFIG_SPL_BUILD
 	case SCLK_I2C0:
 	case SCLK_I2C1:

commit 08ab3f3cb0ddc8d968d9cc8434530e2088b5cd30
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Wed Oct 23 16:09:16 2019 +0800

    rockchip: drivers: spi: add compatible info for rk3328 and rk3066
    
    Change-Id: I9ffda6e902f1639f90c5383ed4df5fc8aad11c70
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/drivers/spi/rk_spi.c b/drivers/spi/rk_spi.c
index 03d3fa6763..9e64e6cca2 100644
--- a/drivers/spi/rk_spi.c
+++ b/drivers/spi/rk_spi.c
@@ -453,6 +453,8 @@ static const struct udevice_id rockchip_spi_ids[] = {
 	{ .compatible = "rockchip,rk3288-spi" },
 	{ .compatible = "rockchip,rk3368-spi" },
 	{ .compatible = "rockchip,rk3399-spi" },
+	{ .compatible = "rockchip,rk3066-spi" },
+	{ .compatible = "rockchip,rk3328-spi" },
 	{ }
 };
 

commit e2721f298916f3062d584b4c46d906d0709b767b
Author: Guochun Huang <hero.huang@rock-chips.com>
Date:   Mon Dec 2 19:40:50 2019 +0800

    drm/rockchip: lvds: Add support for MEDIA_BUS_FMT_RGB101010_1X7X5_SPWG/JEIDA bus format
    
    Change-Id: I41b14d4a9fa2a19fb6df177eb92c0d2cf1c2fb3b
    Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index 698a017158..b5ddb184d2 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -63,6 +63,8 @@ enum lvds_format {
 	LVDS_8BIT_MODE_FORMAT_2,
 	LVDS_8BIT_MODE_FORMAT_3,
 	LVDS_6BIT_MODE,
+	LVDS_10BIT_MODE_FORMAT_1,
+	LVDS_10BIT_MODE_FORMAT_2,
 };
 
 struct rockchip_lvds;
@@ -106,9 +108,14 @@ static int rockchip_lvds_connector_init(struct display_state *state)
 	case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:	/* jeida-24 */
 		lvds->format = LVDS_8BIT_MODE_FORMAT_2;
 		break;
+	case MEDIA_BUS_FMT_RGB101010_1X7X5_JEIDA: /* jeida-30 */
+		lvds->format = LVDS_10BIT_MODE_FORMAT_1;
 	case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:	/* vesa-18 */
 		lvds->format = LVDS_8BIT_MODE_FORMAT_3;
 		break;
+	case MEDIA_BUS_FMT_RGB101010_1X7X5_SPWG: /* vesa-30 */
+		lvds->format = LVDS_10BIT_MODE_FORMAT_2;
+		break;
 	case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:	/* vesa-24 */
 	default:
 		lvds->format = LVDS_8BIT_MODE_FORMAT_1;
@@ -117,6 +124,11 @@ static int rockchip_lvds_connector_init(struct display_state *state)
 
 	conn_state->type = DRM_MODE_CONNECTOR_LVDS;
 	conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
+
+	if ((lvds->format == LVDS_10BIT_MODE_FORMAT_1) ||
+		(lvds->format == LVDS_10BIT_MODE_FORMAT_2))
+		conn_state->output_mode = ROCKCHIP_OUT_MODE_AAAA;
+
 	conn_state->color_space = V4L2_COLORSPACE_DEFAULT;
 
 	return 0;
diff --git a/include/linux/media-bus-format.h b/include/linux/media-bus-format.h
index a5ce8dc74b..bb63436578 100644
--- a/include/linux/media-bus-format.h
+++ b/include/linux/media-bus-format.h
@@ -34,7 +34,7 @@
 
 #define MEDIA_BUS_FMT_FIXED			0x0001
 
-/* RGB - next is	0x101c */
+/* RGB - next is	0x1024 */
 #define MEDIA_BUS_FMT_RGB444_1X12		0x1016
 #define MEDIA_BUS_FMT_RGB444_2X8_PADHI_BE	0x1001
 #define MEDIA_BUS_FMT_RGB444_2X8_PADHI_LE	0x1002
@@ -68,6 +68,8 @@
 #define MEDIA_BUS_FMT_SRGB888_DUMMY_4X8		0x101f
 #define MEDIA_BUS_FMT_SBGR888_DUMMY_4X8		0x1020
 #define MEDIA_BUS_FMT_SRBG888_DUMMY_4X8		0x1021
+#define MEDIA_BUS_FMT_RGB101010_1X7X5_SPWG      0x1022
+#define MEDIA_BUS_FMT_RGB101010_1X7X5_JEIDA     0x1023
 
 /* YUV (including grey) - next is	0x2026 */
 #define MEDIA_BUS_FMT_Y8_1X8			0x2001

commit 2eb7260f2e30b6fb19de30cf447e13079f208400
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 3 20:12:07 2019 +0800

    cmd: fdt: use gd->fdt_blob as default fdt address
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I16a413bcbca17842cd560367ebae6454a63354f2

diff --git a/cmd/fdt.c b/cmd/fdt.c
index 65661fabb2..0a1e725711 100644
--- a/cmd/fdt.c
+++ b/cmd/fdt.c
@@ -151,11 +151,9 @@ static int do_fdt(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	}
 
 	if (!working_fdt) {
-		puts(
-			"No FDT memory address configured. Please configure\n"
-			"the FDT address via \"fdt addr <address>\" command.\n"
-			"Aborting!\n");
-		return CMD_RET_FAILURE;
+		working_fdt = (void *)gd->fdt_blob;
+		printf("No FDT memory address configured. Default at 0x%08lx\n",
+		       (ulong)gd->fdt_blob);
 	}
 
 	/*

commit d625acc28e2963c097074c49a25072346e686a1c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 3 12:42:36 2019 +0800

    rockchip: board: fix cru phandle fixup failed
    
    Fixes: (2a5ad8b rockchip: board: treat 'u-boot,dm-spl' as 'u-boot,dm-pre-reloc')
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ia0e9c875e0f341ef50d2c47911b166ebd1ebc369

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 5aba5400d0..df77569d01 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -289,7 +289,7 @@ static int phandles_fixup(void *fdt)
 
 		list_for_each_entry(dev, &uc->dev_head, uclass_node) {
 			/* Only U-Boot node go further */
-			if (!dev_read_bool(dev, "u-boot,dm-pre-reloc") ||
+			if (!dev_read_bool(dev, "u-boot,dm-pre-reloc") &&
 			    !dev_read_bool(dev, "u-boot,dm-spl"))
 				continue;
 

commit b455f42c3d375b815715544dc6731655d4f003d2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 3 12:39:59 2019 +0800

    core: root: fix reloc condition error '||' => '&&'
    
    Fixes: (930ceb1 driver: core/input: treat 'u-boot,dm-spl' as 'u-boot,dm-pre-reloc')
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ie0dad067451bc35ade865fbd9e52f43d0ec83aab

diff --git a/drivers/core/root.c b/drivers/core/root.c
index 07db4e396b..0e3562f908 100644
--- a/drivers/core/root.c
+++ b/drivers/core/root.c
@@ -225,7 +225,7 @@ static int dm_scan_fdt_live(struct udevice *parent,
 	for (np = node_parent->child; np; np = np->sibling) {
 		if (pre_reloc_only &&
 #ifdef CONFIG_USING_KERNEL_DTB
-		    (!of_find_property(np, "u-boot,dm-pre-reloc", NULL) ||
+		    (!of_find_property(np, "u-boot,dm-pre-reloc", NULL) &&
 		     !of_find_property(np, "u-boot,dm-spl", NULL)))
 #else
 		     !of_find_property(np, "u-boot,dm-pre-reloc", NULL))

commit 8226ac627b5b3ede95dcc11d22792af2387c3bf7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 3 13:08:25 2019 +0800

    rockchip: board: print DTB hash result
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Icc622b51b415f8aeaf1333dba1491426b906e806

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index be8312e6c9..47e615362b 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -900,8 +900,6 @@ static int fdt_check_hash(void *fdt_addr, struct resource_file *file)
 	if (!file->hash_size)
 		return 0;
 
-	printf("Crypto: enable\n");
-
 	if (file->hash_size == 20)
 		crypto_csum(CRYPTO_SHA1, fdt_addr, file->f_size, hash);
 	else if (file->hash_size == 32)
@@ -912,6 +910,8 @@ static int fdt_check_hash(void *fdt_addr, struct resource_file *file)
 	if (memcmp(hash, file->hash, file->hash_size))
 		return -EBADF;
 
+	printf("HASH: OK(c)\n");
+
 	return 0;
 }
 
@@ -933,6 +933,8 @@ static int fdt_check_hash(void *fdt_addr, struct resource_file *file)
 	if (memcmp(hash, file->hash, file->hash_size))
 		return -EBADF;
 
+	printf("HASH: OK(s)\n");
+
 	return 0;
 }
 #endif

commit b554a8f003892018bf031d1216320ef02f18cf0a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 3 12:57:27 2019 +0800

    common: board_f: print new fdt address
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I61a9e6e65a5a81639424f27bda4d389e002f1132

diff --git a/common/board_f.c b/common/board_f.c
index 8e28147626..3be9ccdd9c 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -648,7 +648,8 @@ static int setup_reloc(void)
 #endif
 	memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
 
-	printf("Relocation Offset is: %08lx\n", gd->reloc_off);
+	printf("Relocation Offset: %08lx, fdt: %08lx\n",
+	      gd->reloc_off, (ulong)gd->new_fdt);
 	debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
 	      gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
 	      gd->start_addr_sp);

commit 83c9bd4bbeb565a9ce39339fa54342bbe818ce48
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 25 16:49:52 2019 +0800

    board: rockchip: pass fuse programmed state to kernel
    
    This flag is passed from miniloader by atags.
    
    Change-Id: Ib39a23f762d64e9326222d544db8aeca037b0b36
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rk_atags.h b/arch/arm/include/asm/arch-rockchip/rk_atags.h
index aeb1b3c6cc..9d8aa8ca9d 100644
--- a/arch/arm/include/asm/arch-rockchip/rk_atags.h
+++ b/arch/arm/include/asm/arch-rockchip/rk_atags.h
@@ -56,6 +56,9 @@
 #define SOC_FLAGS_ET01		0x45543031
 #define SOC_FLAGS_ET02		0x45543032
 
+/* pub key programmed magic */
+#define PUBKEY_FUSE_PROGRAMMED	0x4B415352
+
 struct tag_serial {
 	u32 version;
 	u32 enable;
@@ -118,8 +121,9 @@ struct tag_atf_mem {
 struct tag_pub_key {
 	u32 version;
 	u32 len;
-	u8  data[768];
-	u32 reserved[6];
+	u8  data[768];	/* u32 rsa_n[64], rsa_e[64], rsa_c[64] */
+	u32 flag;
+	u32 reserved[5];
 	u32 hash;
 } __packed;
 
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index a3805263f7..5aba5400d0 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -197,6 +197,22 @@ static int boot_from_udisk(void)
 }
 #endif
 
+static void cmdline_handle(void)
+{
+#ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
+	struct tag *t;
+
+	t = atags_get_tag(ATAG_PUB_KEY);
+	if (t) {
+		/* Pass if efuse/otp programmed */
+		if (t->u.pub_key.flag == PUBKEY_FUSE_PROGRAMMED)
+			env_update("bootargs", "fuse.programmed=1");
+		else
+			env_update("bootargs", "fuse.programmed=0");
+	}
+#endif
+}
+
 int board_late_init(void)
 {
 	rockchip_set_ethaddr();
@@ -214,6 +230,7 @@ int board_late_init(void)
 	rockchip_show_logo();
 #endif
 	soc_clk_dump();
+	cmdline_handle();
 
 	return rk_board_late_init();
 }

commit 7a6f40248d7549fa2c3835944609a819b33dd40d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Nov 29 10:53:16 2019 +0800

    rockchip: board: fix always entering recovery on normal boot U-disk
    
    As usual, entering recovery depends on Misc partition content.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Ic3c2d13e4b087c0408989edf435ef27a44cac5d7

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 80a80d4ce0..a3805263f7 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -186,7 +186,6 @@ static int boot_from_udisk(void)
 			rockchip_set_bootdev(desc);
 			env_set("devtype", "usb");
 			env_set("devnum", "0");
-			env_set("reboot_mode", "recovery-usb");
 			printf("Boot from usb 0\n");
 		} else {
 			printf("No usb dev 0 found\n");

commit f0aa8c5d41757f2d8f58c9626329192e03f910c6
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Nov 29 09:13:21 2019 +0800

    rockchip: board: dump soc clk before use kernel dtb
    
    When enable DEBUG, dump soc clk before use kernel dtb, so that
    we can get the clock status in U-Boot before load and use
    kernel dtb.
    
    Change-Id: Iee4244bde4ddd8ec1207f1c7cf6942c5b4e8f876
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index bee191d466..80a80d4ce0 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -448,6 +448,10 @@ int board_init(void)
 {
 	board_debug_uart_init();
 
+#ifdef DEBUG
+	soc_clk_dump();
+#endif
+
 #ifdef CONFIG_USING_KERNEL_DTB
 	init_kernel_dtb();
 #endif

commit c3339d2b004f52934300fce3a0a081c338be58ae
Author: CanYang He <hcy@rock-chips.com>
Date:   Fri Nov 29 18:28:14 2019 +0800

    driver: ram: rockchip: fix some soc can not use sdram_common api
    
    Change-Id: Ifef625c090bfcc33fd077d3562e8a6a37ead98b9
    Signed-off-by: CanYang He <hcy@rock-chips.com>

diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index 8ebc381a61..fbbe864ffc 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -5,20 +5,20 @@
 #
 
 obj-$(CONFIG_ROCKCHIP_SDRAM_COMMON) += sdram_common.o
-obj-$(CONFIG_ROCKCHIP_RK3368) = dmc-rk3368.o
-obj-$(CONFIG_ROCKCHIP_RV1108) = sdram_rv1108_pctl_phy.o sdram_rv1108.o
-obj-$(CONFIG_ROCKCHIP_RK3128) = sdram_rk3128.o
-obj-$(CONFIG_ROCKCHIP_RK3188) = sdram_rk3188.o
-obj-$(CONFIG_ROCKCHIP_RK322X) = sdram_rk322x.o
-obj-$(CONFIG_ROCKCHIP_RK3288) = sdram_rk3288.o
+obj-$(CONFIG_ROCKCHIP_RK3368) += dmc-rk3368.o
+obj-$(CONFIG_ROCKCHIP_RV1108) += sdram_rv1108_pctl_phy.o sdram_rv1108.o
+obj-$(CONFIG_ROCKCHIP_RK3128) += sdram_rk3128.o
+obj-$(CONFIG_ROCKCHIP_RK3188) += sdram_rk3188.o
+obj-$(CONFIG_ROCKCHIP_RK322X) += sdram_rk322x.o
+obj-$(CONFIG_ROCKCHIP_RK3288) += sdram_rk3288.o
 obj-$(CONFIG_ROCKCHIP_RK3328) += sdram_rk3328.o sdram_pctl_px30.o sdram_phy_px30.o
 obj-$(CONFIG_ROCKCHIP_RK3399) += sdram_rk3399.o
 obj-$(CONFIG_ROCKCHIP_PX30) += sdram_px30.o sdram_pctl_px30.o sdram_phy_px30.o
 obj-$(CONFIG_ROCKCHIP_PX30) += rockchip_sdram.o
-obj-$(CONFIG_ROCKCHIP_RK1808) = rockchip_sdram.o
+obj-$(CONFIG_ROCKCHIP_RK1808) += rockchip_sdram.o
 obj-$(CONFIG_ROCKCHIP_RV1108) += rockchip_sdram.o
-obj-$(CONFIG_ROCKCHIP_RK3036) = rockchip_sdram.o
-obj-$(CONFIG_ROCKCHIP_RK3308) = rockchip_sdram.o
+obj-$(CONFIG_ROCKCHIP_RK3036) += rockchip_sdram.o
+obj-$(CONFIG_ROCKCHIP_RK3308) += rockchip_sdram.o
 ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
 obj-$(CONFIG_ROCKCHIP_DMC) += rockchip_dmc.o
 endif

commit 783f7f6ecf69eeeb89fcf07cf9c1e317edc4a9dd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Nov 22 17:37:34 2019 +0800

    make.sh: add rk1806 build support
    
    Build cmd: ./make.sh rk1806
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If04fd324b4ce8e196e711e50275dd26b0919655b

diff --git a/make.sh b/make.sh
index 09ae08a0a2..1f9bd20a6e 100755
--- a/make.sh
+++ b/make.sh
@@ -375,6 +375,8 @@ select_chip_info()
 			&& RKCHIP=PX5
 		grep '^CONFIG_ROCKCHIP_RK3399PRO=y' ${OUTDIR}/.config >/dev/null \
 			&& RKCHIP=RK3399PRO
+		grep '^CONFIG_ROCKCHIP_RK1806=y' ${OUTDIR}/.config >/dev/null \
+			&& RKCHIP=RK1806
 	else
 		echo "Can't get Rockchip SoC definition in .config"
 		exit 1
@@ -567,7 +569,6 @@ pack_uboot_image()
 	if [ -f ${OUTDIR}/u-boot-dtb.img ]; then
 		rm ${OUTDIR}/u-boot-dtb.img
 	fi
-
 	echo "pack uboot okay! Input: ${OUTDIR}/u-boot.bin"
 }
 
@@ -673,6 +674,15 @@ pack_loader_image()
 	fi
 
 	ls *_loader_*.bin >/dev/null 2>&1 && rm *_loader_*.bin
+
+	numline=`cat $ini | wc -l`
+	if [ $numline -eq 1 ]; then
+		image=`sed -n "/PATH=/p" $ini | tr -d '\r' | cut -d '=' -f 2`
+		cp ${RKBIN}/${image} ./
+		echo "pack trust okay! Input: ${ini}"
+		return;
+	fi
+
 	cd ${RKBIN}
 
 	if [ "${mode}" = 'all' ]; then
@@ -762,6 +772,7 @@ pack_trust_image()
 	local mode=$1 files ini
 
 	ls trust*.img >/dev/null 2>&1 && rm trust*.img
+
 	# ARM64 uses trust_merger
 	if grep -Eq ''^CONFIG_ARM64=y'|'^CONFIG_ARM64_BOOT_AARCH32=y'' ${OUTDIR}/.config ; then
 		ini=${RKBIN}/RKTRUST/${RKCHIP_TRUST}TRUST.ini
@@ -769,6 +780,14 @@ pack_trust_image()
 			ini=$FILE;
 		fi
 
+		numline=`cat $ini | wc -l`
+		if [ $numline -eq 1 ]; then
+			image=`sed -n "/PATH=/p" $ini | tr -d '\r' | cut -d '=' -f 2`
+			cp ${RKBIN}/${image} ./trust.img
+			echo "pack trust okay! Input: ${ini}"
+			return;
+		fi
+
 		if [ "${mode}" = 'all' ]; then
 			files=`ls ${RKBIN}/RKTRUST/${RKCHIP_TRUST}TRUST*.ini`
 			for ini in $files
@@ -784,6 +803,7 @@ pack_trust_image()
 		if [ "$FILE" != "" ]; then
 			ini=$FILE;
 		fi
+
 		if [ "${mode}" = 'all' ]; then
 			files=`ls ${RKBIN}/RKTRUST/${RKCHIP_TRUST}TOS*.ini`
 			for ini in $files

commit 4887899d2f54e6840e7253b05fd8ee8bd59bddda
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Nov 22 15:54:11 2019 +0800

    configs: add rk1806 defconfig
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I6e064c470e3f2ea6ea1aa622fc0776ea73675b7a

diff --git a/configs/rk1806_defconfig b/configs/rk1806_defconfig
new file mode 100644
index 0000000000..d9a88a33e9
--- /dev/null
+++ b/configs/rk1806_defconfig
@@ -0,0 +1,128 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
+CONFIG_ROCKCHIP_RK1808=y
+CONFIG_ROCKCHIP_RK1806=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_TARGET_EVB_RK1808=y
+CONFIG_SPL_STACK_R_ADDR=0x3fe0000
+CONFIG_DEFAULT_DEVICE_TREE="rk1808-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_BOOTDELAY=0
+# CONFIG_CONSOLE_MUX is not set
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_SPL=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_SEPARATE_BSS=y
+# CONFIG_SPL_SKIP_RELOCATE is not set
+CONFIG_SPL_RELOC_TEXT_BASE=0x3001000
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_FASTBOOT_BUF_ADDR=0x00800800
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_LZMADEC is not set
+# CONFIG_CMD_UNZIP is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPT=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_ITEST is not set
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_MISC is not set
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_RKPARM_PARTITION=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_ADC_KEY=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PINCTRL=y
+CONFIG_DM_FUEL_GAUGE=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_FAN53555=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_RKFLASH=y
+CONFIG_RKNANDC_NAND=y
+CONFIG_RKSFC_NAND=y
+CONFIG_RKSFC_NOR=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0xff550000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x330d
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_INNO_MIPI_PHY=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_DRM_ROCKCHIP_RGB=y
+CONFIG_LCD=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_LZ4=y
+CONFIG_ERRNO_STR=y
+# CONFIG_EFI_LOADER is not set
+CONFIG_TEST_ROCKCHIP=y

commit 760b0468deac537b636c4d5693555215612f2bdb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Nov 22 15:53:28 2019 +0800

    rockchip: Kconfig: add RK1806 SoC
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I12bc82d47aa11afcececc7ce7b8f7d7cbecb8336

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 6845823248..8dfef036f4 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -378,6 +378,12 @@ config ROCKCHIP_RK1808
 
 if ROCKCHIP_RK1808
 
+config ROCKCHIP_RK1806
+	bool "Support Rockchip RK1806"
+	help
+	  The Rockchip RK1806 is a ARM-based Soc which embedded with dual
+	  Cortex-A35.
+
 config COPROCESSOR_RK1808
 	bool "RK1808 coprocessor"
 	help

commit ed7d08b837fdc8e13f9fa7f012ee8114ba37f296
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Nov 29 17:05:00 2019 +0800

    rockchip: rk1806: add sip version smc call
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I833adf5cd86f45c0f2e9d98866d7c17adb3baaf0

diff --git a/arch/arm/mach-rockchip/rk1808/rk1808.c b/arch/arm/mach-rockchip/rk1808/rk1808.c
index 2c99de8435..26677b61bb 100644
--- a/arch/arm/mach-rockchip/rk1808/rk1808.c
+++ b/arch/arm/mach-rockchip/rk1808/rk1808.c
@@ -10,6 +10,7 @@
 #include <asm/arch/grf_rk1808.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/rk_atags.h>
+#include <asm/arch/rockchip_smccc.h>
 #include <asm/gpio.h>
 #include <debug_uart.h>
 
@@ -208,6 +209,14 @@ static int env_fixup_ramdisk_addr_r(void)
 }
 #endif
 
+int rk_board_init(void)
+{
+#if defined(CONFIG_ROCKCHIP_SMCCC) && defined(CONFIG_ROCKCHIP_RK1806)
+	sip_smc_get_sip_version();
+#endif
+	return 0;
+}
+
 int rk_board_late_init(void)
 {
 #if defined(CONFIG_DM_RAMDISK) && !defined(CONFIG_SPL_BUILD)

commit 94001eb0161a222f34b5a4697631e35ceb06de61
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 28 14:43:38 2019 +0800

    rockchip: smccc: include arm-smccc.h in rockchip_smccc.h
    
    So that the other drivers don't need to include arm-smccc.h
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: If6638ecf2d4a9e6b33a04215df40c19314a764cc

diff --git a/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h b/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
index 8785666816..c290553615 100644
--- a/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
+++ b/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
@@ -7,6 +7,8 @@
 #ifndef __ROCKCHIP_SMCCC_H__
 #define __ROCKCHIP_SMCCC_H__
 
+#include <linux/arm-smccc.h>
+
 /* Rockchip platform SiP call ID */
 #define SIP_ATF_VERSION			0x82000001
 #define SIP_ACCESS_REG			0x82000002
diff --git a/arch/arm/mach-rockchip/rockchip_smccc.c b/arch/arm/mach-rockchip/rockchip_smccc.c
index 815ad5e015..8ec9bad8f4 100644
--- a/arch/arm/mach-rockchip/rockchip_smccc.c
+++ b/arch/arm/mach-rockchip/rockchip_smccc.c
@@ -8,7 +8,6 @@
 #include <asm/io.h>
 #include <asm/psci.h>
 #include <asm/suspend.h>
-#include <linux/arm-smccc.h>
 #include <linux/io.h>
 
 #ifdef CONFIG_ARM64

commit 59d931994cd3eecbcde167e47ebe31144d5254d1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 28 12:03:53 2019 +0800

    scripts: add README for rockchip scripts and tool
    
    Provide a quick reference to developers.
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I7cb96ad558637a5d06e2e450070bc3a8bda23043

diff --git a/scripts/README.rockchip b/scripts/README.rockchip
new file mode 100644
index 0000000000..4bbe819e3e
--- /dev/null
+++ b/scripts/README.rockchip
@@ -0,0 +1,53 @@
+#
+# Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier: GPL-2.0
+#
+
+Example usage of scripts/tools for Rockchip
+
+- Here only shows the typical example usage, but not all
+- Mainly for providing developers with a quick reference
+- Get more detail information by scripts/tools help
+========================================================
+
+[scripts]
+	# pack_resource.sh
+		./scripts/pack_resource.sh resource.img
+
+	# unpack_resource.sh
+		./scripts/unpack_resource.sh resource.img  out/
+
+	# mkbootimg
+		./scripts/mkbootimg --kernel zImage --second resource.img --ramdisk ramdisk.img --out boot.img
+
+	# unpack_bootimg
+		./scripts/unpack_bootimg --boot_img boot.img --out out/
+
+	# repack-bootimg
+		./scripts/repack-bootimg --boot_img boot.img --kernel zImage -o boot_repack.img
+
+	# stacktrace.sh
+		./scripts/stacktrace.sh dump.txt
+		./scripts/stacktrace.sh dump.txt spl
+		./scripts/stacktrace.sh dump.txt tpl
+
+[tools]
+	# resource_tool
+		./tools/resource_tool rk-kernel.dtb logo_kernel.bmp logo.bmp
+		./tools/resource_tool --unpack --image=resource.img out/
+
+	# trust_merger
+		./tools/trust_merger ./RKTRUST/RK3399TRUST.ini
+		./tools/trust_merger --unpack trust.img
+
+	# boot_merger
+		./tools/boot_merger ./RKBOOT/RK3399MINIALL.ini
+		./tools/boot_merger --unpack rk3399_loader_v1.17.115.bin
+
+	# loaderimage
+		./tools/loaderimage --pack --uboot ./u-boot.bin uboot.img 0x60000000 --size 1024 2
+		./tools/loaderimage --unpack --uboot uboot.img uboot.bin
+
+		./tools/loaderimage --pack --trustos ./bin/rk32/rk322x_tee_v2.00.bin trust.img 0x80000000  --size 1024 2
+		./tools/loaderimage --unpack --trustos trust.img tee.bin

commit 25a2be8e4d15eab6f8be91f057f4ea471f8848e0
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 28 11:35:22 2019 +0800

    scripts: repack-bootimg: fix os patch level "m" equal 0
    
    Traceback (most recent call last):
      File "./scripts/mkbootimg", line 234, in <module>
        main()
      File "./scripts/mkbootimg", line 224, in main
        args = parse_cmdline()
      File "./scripts/mkbootimg", line 210, in parse_cmdline
        return parser.parse_args()
      File "/usr/lib/python2.7/argparse.py", line 1690, in parse_args
        args, argv = self.parse_known_args(args, namespace)
      File "/usr/lib/python2.7/argparse.py", line 1722, in parse_known_args
        namespace, args = self._parse_known_args(args, namespace)
      File "/usr/lib/python2.7/argparse.py", line 1928, in _parse_known_args
        start_index = consume_optional(start_index)
      File "/usr/lib/python2.7/argparse.py", line 1868, in consume_optional
        take_action(action, args, option_string)
      File "/usr/lib/python2.7/argparse.py", line 1780, in take_action
        argument_values = self._get_values(action, argument_strings)
      File "/usr/lib/python2.7/argparse.py", line 2220, in _get_values
        value = self._get_value(action, arg_string)
      File "/usr/lib/python2.7/argparse.py", line 2249, in _get_value
        result = type_func(arg_string)
      File "./scripts/mkbootimg", line 172, in parse_os_patch_level
        assert m > 0 and m <= 12
    AssertionError
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I625717d27b9e807c4a2afee6b38eca9750ee4e41

diff --git a/scripts/repack-bootimg b/scripts/repack-bootimg
index aecd5a7ffc..61cc32c49c 100755
--- a/scripts/repack-bootimg
+++ b/scripts/repack-bootimg
@@ -133,6 +133,11 @@ os_version=$(printf '%d.%d.%d' $a $b $c)
 v=$(($os_version_patch_level & 0x7ff))
 y=$((($v >> 4) + 2000))
 m=$((($v & 15)))
+
+if [ $m -eq 0 ]; then
+	m=1
+fi
+
 os_patch_level=$(printf '%d-%02d-01' $y $m)
 
 dtb_size=$(grep -a "^dtb size: " $log | sed "s/^dtb size: //")

commit c641fb242b104034e9b22f8bbc485928da3c4e7c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 25 08:53:34 2019 +0800

    common: Kconfig: select SHA1 if !DM_CRYPTO for android image verify
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: Id010fe3e5947ad19fdba8a2dd97f421d83282105

diff --git a/common/Kconfig b/common/Kconfig
index 093a442e93..f81b0bb115 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -653,7 +653,7 @@ config ANDROID_BOOT_IMAGE_SEPARATE
 config ANDROID_BOOT_IMAGE_HASH
 	bool "Enable support for Android image hash verify"
 	depends on ANDROID_BOOT_IMAGE
-	select SHA1
+	select SHA1 if !DM_CRYPTO
 	help
 	  This enables support for Android image hash verify, the mkbootimg always use
 	  SHA1 for images.

commit c6d268e39eec84cd066747270743d16d49a0c12b
Author: Xiao Ya peng <yp.xiao@rock-chips.com>
Date:   Wed Nov 27 16:20:22 2019 +0800

    configs: rk322x: enable CONFIG_CMD_DTIMG
    
    Change-Id: I2565da9b3ce0475709cec2ec5d2f51f4383655ea
    Signed-off-by: Xiao Ya peng <yp.xiao@rock-chips.com>

diff --git a/configs/rk322x_defconfig b/configs/rk322x_defconfig
index 891dc340ff..7eb32a9ae4 100644
--- a/configs/rk322x_defconfig
+++ b/configs/rk322x_defconfig
@@ -34,6 +34,7 @@ CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_CMD_DTIMG=y
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set

commit 53bea680ec07567b7fe2ceb62ca976e19d6d407c
Author: Tony Xu <tony.xu@rock-chips.com>
Date:   Fri Nov 22 16:28:31 2019 +0800

    common: write keybox: always write storage flag to security sorage
    
    Change-Id: Iaa536eb51216f46a35ae5999ed19ad5703509b6a
    Signed-off-by: Tony Xu <tony.xu@rock-chips.com>

diff --git a/common/write_keybox.c b/common/write_keybox.c
old mode 100644
new mode 100755
index 061dc5e2a8..15f370fe09
--- a/common/write_keybox.c
+++ b/common/write_keybox.c
@@ -20,6 +20,104 @@
 #define	ATTESTATION_TAG	"ATTE"
 #define PLAYREADY30_TAG	"SL30"
 
+TEEC_Result write_to_security_storage(uint8_t is_use_rpmb,
+				      uint8_t *filename,
+				      uint32_t filename_size,
+				      uint8_t *data,
+				      uint32_t data_size)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	TEEC_SharedMemory SharedMem0 = {0};
+	TEEC_SharedMemory SharedMem1 = {0};
+	uint32_t ErrorOrigin;
+
+	TEEC_UUID tempuuid = { 0x1b484ea5,
+			       0x698b,
+			       0x4142,
+			       { 0x82, 0xb8, 0x3a,
+				 0xcf, 0x16, 0xe9,
+				 0x9e, 0x2a } };
+
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult) {
+		printf("OpteeClientApiLibInitialize fail\n");
+		return TeecResult;
+	}
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult) {
+		printf("TEEC_InitializeContext fail\n");
+		return TeecResult;
+	}
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						    TEEC_NONE,
+						    TEEC_NONE,
+						    TEEC_NONE);
+
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a = is_use_rpmb;
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				      &TeecSession,
+				      TeecUuid,
+				      TEEC_LOGIN_PUBLIC,
+				      NULL, &TeecOperation,
+				      &ErrorOrigin);
+	if (TeecResult) {
+		printf("TEEC_OpenSession fail\n");
+		return TeecResult;
+	}
+
+	SharedMem0.size = filename_size;
+	SharedMem0.flags = 0;
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult) {
+		printf("TEEC_AllocateSharedMemory fail\n");
+		return TeecResult;
+	}
+	memcpy(SharedMem0.buffer, filename, SharedMem0.size);
+
+	SharedMem1.size = data_size;
+	SharedMem1.flags = 0;
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+	if (TeecResult) {
+		printf("TEEC_AllocateSharedMemory fail\n");
+		return TeecResult;
+	}
+	memcpy(SharedMem1.buffer, data, SharedMem1.size);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						    TEEC_MEMREF_TEMP_INOUT,
+						    TEEC_NONE,
+						    TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					1,
+					&TeecOperation,
+					&ErrorOrigin);
+	if (TeecResult) {
+		printf("TEEC_InvokeCommand fail\n");
+		return TeecResult;
+	}
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+	TEEC_CloseSession(&TeecSession);
+	TEEC_FinalizeContext(&TeecContext);
+	debug("TeecResult %x\n", TeecResult);
+
+	return TeecResult;
+}
+
 uint32_t rk_send_keybox_to_ta(uint8_t *filename, uint32_t filename_size,
 			      TEEC_UUID uuid,
 			      uint8_t *key, uint32_t key_size,
@@ -146,13 +244,13 @@ uint32_t write_keybox_to_secure_storage(uint8_t *received_data, uint32_t len)
 	if (is_use_rpmb)
 		printf("I will write key to rpmb\n");
 	else
-		printf("I will write key to security partition");
-	rc = write_to_keymaster((uint8_t *)"security_partition",
-				sizeof("security_partition"),
-				&is_use_rpmb, sizeof(is_use_rpmb));
+		printf("I will write key to security partition\n");
+
+	rc = write_to_security_storage(0, (uint8_t *)"security_partition",
+				       sizeof("security_partition"),
+				       &is_use_rpmb, sizeof(is_use_rpmb));
 	if (rc)
 		return -EIO;
-
 	widevine_data = (uint8_t *)new_strstr((char *)received_data,
 					      WIDEVINE_TAG, len);
 	attestation_data = (uint8_t *)new_strstr((char *)received_data,
@@ -200,11 +298,12 @@ uint32_t write_keybox_to_secure_storage(uint8_t *received_data, uint32_t len)
 		uint32_t ret;
 
 		data_size = *(playready_sl30_data + SIZE_OF_TAG);
-		ret = write_to_keymaster((uint8_t *)"PlayReady_SL3000",
-					 sizeof("PlayReady_SL3000"),
-					 playready_sl30_data + SIZE_OF_TAG +
-					 sizeof(data_size),
-					 data_size);
+		ret = write_to_security_storage(is_use_rpmb,
+						(uint8_t *)"PlayReady_SL3000",
+						sizeof("PlayReady_SL3000"),
+						playready_sl30_data +
+						SIZE_OF_TAG +sizeof(data_size),
+						data_size);
 		if (ret == TEEC_SUCCESS) {
 			rc = 0;
 			printf("write PlayReady SL3000 root key to secure storage success\n");
@@ -223,9 +322,11 @@ uint32_t write_keybox_to_secure_storage(uint8_t *received_data, uint32_t len)
 		memcpy(raw_data, &len, sizeof(uint32_t));
 		memcpy((raw_data + sizeof(uint32_t)), received_data, len);
 
-		ret = write_to_keymaster((uint8_t *)"raw_data",
-					 sizeof("raw_data"),
-					 raw_data, len + sizeof(uint32_t));
+		ret = write_to_security_storage(is_use_rpmb,
+						(uint8_t *)"raw_data",
+						sizeof("raw_data"),
+						raw_data,
+						len + sizeof(uint32_t));
 		if (ret == TEEC_SUCCESS)
 			rc = 0;
 		else
diff --git a/include/write_keybox.h b/include/write_keybox.h
index 55cd94536b..305e1d0bed 100644
--- a/include/write_keybox.h
+++ b/include/write_keybox.h
@@ -7,6 +7,7 @@
 #define	WRITE_KEYBOX_H_
 
 #include <common.h>
+#include <optee_include/tee_client_api.h>
 
 #if defined CONFIG_ANDROID_WRITE_KEYBOX && defined CONFIG_ANDROID_KEYMASTER_CA
 /*
@@ -19,6 +20,23 @@
  */
 uint32_t write_keybox_to_secure_storage(uint8_t *received_data, uint32_t len);
 
+/*
+ * write_to_secure_storage
+ *
+ * @is_use_rpmb:	0, write data to security patition
+ *			1, write data to rpmb
+ * @filename:		the file name of data written to secure storage
+ * @filename_size:	size of filename
+ * @data:		the data want to write to secure storage
+ * @data_size:		size of data
+ *
+ * @return a nonzero number in case of error, or 0 on success.
+ */
+TEEC_Result write_to_security_storage(uint8_t is_use_rpmb,
+				      uint8_t *filename,
+				      uint32_t filename_size,
+				      uint8_t *data,
+				      uint32_t data_size);
 /*
  * read_raw_data_from_secure_storege
  *

commit a872a3be27e80522569579555a09f8c81dee4b3b
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Wed Nov 13 14:43:05 2019 +0800

    Revert "drm/rockchip: hdmi: init vmode picture_aspect_ratio"
    
    This reverts commit 888e59c91d7f6f905c339c1892002d06e056a329.
    
    The same mode may have different picture aspect ratio.
    Some TV modes support only one of picture aspect ratios.
    If the picture aspect ratio of this mode do not match in
    the whitelist, the mode will be unavailable.
    
    While HWC can make kernel don't report the picture
    aspect ratios by ioctl, which avoids the judgment of the
    picture aspect ratio in the whitelist.Some TVS will not
    suffer from a loss of resolution.
    
    Change-Id: I1c9b3f3ff9286ac5fcf8443d5d7544e2cd0cd0f2
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_dw_hdmi.c b/drivers/video/drm/rockchip_dw_hdmi.c
index 80f59c7ce4..30acb21b29 100644
--- a/drivers/video/drm/rockchip_dw_hdmi.c
+++ b/drivers/video/drm/rockchip_dw_hdmi.c
@@ -358,7 +358,6 @@ static bool drm_mode_equal(const struct base_drm_display_mode *mode1,
 	    mode1->vsync_start == mode2->vsync_start &&
 	    mode1->vsync_end == mode2->vsync_end &&
 	    mode1->vtotal == mode2->vtotal &&
-	    mode1->picture_aspect_ratio == mode2->picture_aspect_ratio &&
 	    (mode1->flags & flags_mask) == (mode2->flags & flags_mask)) {
 		return true;
 	}
@@ -709,8 +708,6 @@ void drm_rk_selete_output(struct hdmi_edid_data *edid_data,
 		if (base_parameter.screen_list[i].type ==
 		    DRM_MODE_CONNECTOR_HDMIA) {
 			screen_info = &base_parameter.screen_list[i];
-			screen_info->mode.picture_aspect_ratio =
-				(screen_info->mode.flags & DRM_MODE_FLAG_PIC_AR_MASK) >> 19;
 			break;
 		}
 	}

commit 61ab4d721f0349105f612e633a7fa2a59ceb52ea
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Nov 27 10:22:07 2019 +0800

    power: io-domain: Don't printf sudev->name when get regulator failed
    
    This patch fixed the following issue:
    
    Stack:
           [< 00295020 >]  strnlen+0x10/0x28
           [< 002965b4 >]  vsnprintf_internal+0x61c/0xa84
           [< 00296a6c >]  vscnprintf+0x50/0x74
           [< 00296c58 >]  printf+0x94/0xb4
           [< 00263e04 >]  rockchip_iodomain_probe+0xcc/0x19c
           [< 0022e310 >]  device_probe+0x21c/0x268
           [< 0022f3e8 >]  uclass_get_device_tail+0x1c/0x40
           [< 0022f6dc >]  uclass_first_device+0x30/0x44
           [< 00263cdc >]  io_domain_init+0x2c/0x50
           [< 00202da8 >]  board_init+0xb4/0xc4
           [< 0027a480 >]  initcall_run_list+0x58/0x94
           [< 00214fbc >]  board_init_r+0x20/0x24
           [< 00201b24 >]  relocation_return+0x4/0x0
    
    Change-Id: I1afc2613a1dba32e7f9c6ad2165e80853d421187
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/power/io-domain/rockchip-io-domain.c b/drivers/power/io-domain/rockchip-io-domain.c
index ced9fd4f49..6f680dbdc0 100644
--- a/drivers/power/io-domain/rockchip-io-domain.c
+++ b/drivers/power/io-domain/rockchip-io-domain.c
@@ -485,9 +485,9 @@ static struct udevice *of_get_regulator(ofnode node, const char *supply)
 		snode = ofnode_get_by_phandle(phandle);
 		ret = regulator_get_by_devname(snode.np->name, &sudev);
 		if (ret) {
-			printf("%s: %s: Get supply(%s) failed, ret=%d",
+			printf("%s: Get (%s) regulator: %s failed, ret=%d\n",
 			       __func__,
-			       sudev->name, snode.np->full_name, ret);
+			       sname, snode.np->full_name, ret);
 			return NULL;
 		}
 		debug("IO-DOMAIN: supply: %s\n", snode.np->full_name);

commit 27d36fbda0172a16fc0e332bec617482edfd9919
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 20 16:26:30 2019 +0800

    cmd: crypto: make foo_data[] cacheline aligned
    
    Crypto-v1 needs flush_dcache() for SHA, this avoids the warning
    message "CACHE: Misaligned operation at range ...".
    
    Change-Id: Ie766af60db83ec1f290103c2059863fa50d0a0ad
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/cmd/crypto.c b/cmd/crypto.c
index 46a8f9aa82..329ced8ef4 100644
--- a/cmd/crypto.c
+++ b/cmd/crypto.c
@@ -12,7 +12,7 @@
 #include <u-boot/sha256.h>
 #include <u-boot/sha512.h>
 
-static u8 foo_data[] = {
+__cacheline_aligned static u8 foo_data[] = {
 	0x52, 0x53, 0x41, 0x4b, 0x00, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x00,
 	0xda, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xd5, 0xf2, 0xfc, 0xbb,

commit cc3d6741441b8b18959be8e13eb74fd0ce4f4237
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 20 16:24:36 2019 +0800

    linux: compiler-gcc: add __cacheline_aligned
    
    Change-Id: I0cc437885aa3a1e6637c1aeee9df718ac61fa914
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/linux/compiler-gcc.h b/include/linux/compiler-gcc.h
index 22ab246fee..810dbeb503 100644
--- a/include/linux/compiler-gcc.h
+++ b/include/linux/compiler-gcc.h
@@ -87,6 +87,7 @@
 #define __packed	__attribute__((packed))
 #define __weak		__attribute__((weak))
 #define __alias(symbol)	__attribute__((alias(#symbol)))
+#define __cacheline_aligned __attribute__((__aligned__(CONFIG_SYS_CACHELINE_SIZE)))
 
 /*
  * it doesn't make sense on ARM (currently the only user of __naked)

commit 5e941216fb0ec140490e7d8289417a2a23656d6a
Author: Wu Liangqing <wlq@rock-chips.com>
Date:   Tue Nov 26 11:40:01 2019 +0800

    configs: rk3126: add CONFIG_ROCKCHIP_VENDOR_PARTITION
    
    Change-Id: Id0212bae4bd018404cb2d09f415a8ca207010706
    Signed-off-by: Wu Liangqing <wlq@rock-chips.com>

diff --git a/configs/rk3126_defconfig b/configs/rk3126_defconfig
index 5c38548969..3099cdeb11 100644
--- a/configs/rk3126_defconfig
+++ b/configs/rk3126_defconfig
@@ -4,6 +4,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x38000
 CONFIG_ROCKCHIP_RK3128=y
 CONFIG_ROCKCHIP_RK3126=y
 CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3126-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y

commit 1f404b074d3946d80dc1203d4a56c255e83a8adc
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Mon Nov 25 14:24:33 2019 +0800

    rockchip: atags: remove atags useless func when build tpl
    
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
    Change-Id: I496fde41388eee0d16d206d892c7b68945b36f56

diff --git a/arch/arm/mach-rockchip/rk_atags.c b/arch/arm/mach-rockchip/rk_atags.c
index 75458aff4d..b3d05abc67 100644
--- a/arch/arm/mach-rockchip/rk_atags.c
+++ b/arch/arm/mach-rockchip/rk_atags.c
@@ -18,7 +18,7 @@
 #define for_each_tag(t, base)		\
 	for (t = base; t->hdr.size; t = tag_next(t))
 
-#ifdef CONFIG_SPL_BUILD
+#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
 /*
  * The array is used to transform rom bootsource type to rk atags boot type.
  */
@@ -309,7 +309,7 @@ struct tag *atags_get_tag(u32 magic)
 struct tag *atags_get_tag(u32 magic) { return NULL; }
 #endif
 
-#ifdef CONFIG_SPL_BUILD
+#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
 int get_bootdev_by_brom_bootsource(void)
 {
 	int bootsource = 0;

commit 8ccbf1ca607ecd85dba3fb5bb9bffc811c71127a
Author: YouMin Chen <cym@rock-chips.com>
Date:   Thu Oct 31 18:25:04 2019 +0800

    rockchip: atags: the macro definition about memset/memcpy
    
    If have define USE_ARCH_MEMSET/USE_ARCH_MEMCPY,it don't need
    to realize memset/memcpy for rk_atags whit TPL.
    
    Change-Id: I464f364edf711573dbad61302ff9e01f3a0edbf2
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rk_atags.h b/arch/arm/include/asm/arch-rockchip/rk_atags.h
index 5ef9d3332e..aeb1b3c6cc 100644
--- a/arch/arm/include/asm/arch-rockchip/rk_atags.h
+++ b/arch/arm/include/asm/arch-rockchip/rk_atags.h
@@ -261,8 +261,13 @@ void atags_stat(void);
 
 #if CONFIG_IS_ENABLED(TINY_FRAMEWORK) &&		\
 	!CONFIG_IS_ENABLED(LIBGENERIC_SUPPORT) &&	\
-	defined(CONFIG_ARM64)
+	!CONFIG_IS_ENABLED(USE_ARCH_MEMSET)
 void *memset(void *s, int c, size_t count);
+#endif
+
+#if CONFIG_IS_ENABLED(TINY_FRAMEWORK) &&		\
+	!CONFIG_IS_ENABLED(LIBGENERIC_SUPPORT) &&	\
+	!CONFIG_IS_ENABLED(USE_ARCH_MEMCPY)
 void *memcpy(void *dest, const void *src, size_t count);
 #endif
 
diff --git a/arch/arm/mach-rockchip/rk_atags.c b/arch/arm/mach-rockchip/rk_atags.c
index f7faab603f..75458aff4d 100644
--- a/arch/arm/mach-rockchip/rk_atags.c
+++ b/arch/arm/mach-rockchip/rk_atags.c
@@ -47,7 +47,7 @@ static int spl_bootdev_map[] = {
 
 #if CONFIG_IS_ENABLED(TINY_FRAMEWORK) &&		\
 	!CONFIG_IS_ENABLED(LIBGENERIC_SUPPORT) &&	\
-	defined(CONFIG_ARM64)
+	!CONFIG_IS_ENABLED(USE_ARCH_MEMSET)
 /**
  * memset - Fill a region of memory with the given value
  * @s: Pointer to the start of the area.
@@ -67,7 +67,11 @@ void *memset(void *s, int c, size_t count)
 
 	return s;
 }
+#endif
 
+#if CONFIG_IS_ENABLED(TINY_FRAMEWORK) &&		\
+	!CONFIG_IS_ENABLED(LIBGENERIC_SUPPORT) &&	\
+	!CONFIG_IS_ENABLED(USE_ARCH_MEMCPY)
 /**
  * memcpy - Copy one area of memory to another
  * @dest: Where to copy to

commit 763ecaa3060272ce614e171d1955ecfc73db92ee
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 21 17:47:22 2019 +0800

    scripts: stacktrace.sh: use grep to filter lines
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I3817c654f9391dd6b6a216333a3a8c9fc519c0d3

diff --git a/scripts/stacktrace.sh b/scripts/stacktrace.sh
index 70b4dd68e2..5418b8c368 100755
--- a/scripts/stacktrace.sh
+++ b/scripts/stacktrace.sh
@@ -46,7 +46,7 @@ echo "SYMBOL File: ${SYMBOL_FILE}"
 echo
 # Parse PC and LR
 echo "Call trace:"
-sed -n "/:   \[</p" $INPUT_FILE | while read line
+grep '\[< ' $INPUT_FILE | grep '>\]' | grep [PC,LR] | while read line
 do
 	echo -n " ${line}  "
 
@@ -78,7 +78,7 @@ echo
 
 # Parse stack
 echo "Stack:"
-sed -n "/        \[</p" $INPUT_FILE | while read line
+grep '\[< ' $INPUT_FILE | grep '>\]' | grep -v [PC,LR] | while read line
 do
 	echo -n "       ${line}  "
 

commit 270d4d86b36f5ad0c7c836aeb0675d60df93ac0e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 21 18:08:02 2019 +0800

    core: read: add dev_read_s32_default()
    
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    Change-Id: I174670da004001feafcec568e978d2dfd9f55ef9

diff --git a/drivers/core/read.c b/drivers/core/read.c
index 9b216726ac..2692113853 100644
--- a/drivers/core/read.c
+++ b/drivers/core/read.c
@@ -15,6 +15,11 @@ int dev_read_u32_default(struct udevice *dev, const char *propname, int def)
 	return ofnode_read_u32_default(dev_ofnode(dev), propname, def);
 }
 
+int dev_read_s32_default(struct udevice *dev, const char *propname, int def)
+{
+	return ofnode_read_s32_default(dev_ofnode(dev), propname, def);
+}
+
 const char *dev_read_string(struct udevice *dev, const char *propname)
 {
 	return ofnode_read_string(dev_ofnode(dev), propname);
diff --git a/include/dm/read.h b/include/dm/read.h
index 71b128ff10..0a78d04815 100644
--- a/include/dm/read.h
+++ b/include/dm/read.h
@@ -55,6 +55,16 @@ static inline bool dev_of_valid(struct udevice *dev)
  */
 int dev_read_u32_default(struct udevice *dev, const char *propname, int def);
 
+/**
+ * dev_read_s32_default() - read a signed 32-bit integer from a device's DT property
+ *
+ * @dev:	device to read DT property from
+ * @propname:	name of the property to read from
+ * @def:	default value to return if the property has no value
+ * @return property value, or @def if not found
+ */
+int dev_read_s32_default(struct udevice *dev, const char *propname, int def);
+
 /**
  * dev_read_string() - Read a string from a device's DT property
  *

commit 2442fbadc28e23a66bb5df3d2468080215248f64
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Nov 20 16:27:45 2019 +0800

    fastboot: support cmd boot-recovery & reboot-fastboot
    
    Change-Id: I01693db8304c8fb1804c4342501cdbb38f8ccf2a
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 50a2336721..e9f86745af 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -13,6 +13,7 @@
 #include <config.h>
 #include <common.h>
 #include <console.h>
+#include <android_bootloader.h>
 #include <errno.h>
 #include <fastboot.h>
 #include <malloc.h>
@@ -548,12 +549,28 @@ int __weak fb_set_reboot_flag(void)
 static void cb_reboot(struct usb_ep *ep, struct usb_request *req)
 {
 	char *cmd = req->buf;
+
 	if (!strcmp_l1("reboot-bootloader", cmd)) {
 		if (fb_set_reboot_flag()) {
 			fastboot_tx_write_str("FAILCannot set reboot flag");
 			return;
 		}
 	}
+#ifdef CONFIG_ANDROID_BOOTLOADER
+	if (!strcmp_l1("reboot-fastboot", cmd)) {
+		if (android_bcb_write("boot-fastboot")) {
+			fastboot_tx_write_str("FAILCannot set boot-fastboot");
+			return;
+		}
+	}
+
+	if (!strcmp_l1("reboot-recovery", cmd)) {
+		if (android_bcb_write("boot-recovery")) {
+			fastboot_tx_write_str("FAILCannot set boot-recovery");
+			return;
+		}
+	}
+#endif
 	fastboot_func->in_req->complete = compl_do_reset;
 	fastboot_tx_write_str("OKAY");
 }

commit fd633ddcf6d0e8380e5daf63308e18a158a5d90e
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Nov 20 16:20:30 2019 +0800

    android: add function android_bcb_write
    
    Change-Id: Ie65068dc4fca751a9bcc959c56209aaf4729f638
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 5a6a302eca..56dd56e2e2 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -318,6 +318,36 @@ static enum android_boot_mode android_bootloader_load_and_clear_mode(
 	return ANDROID_BOOT_MODE_NORMAL;
 }
 
+int android_bcb_write(char *cmd)
+{
+	struct android_bootloader_message message = {0};
+	disk_partition_t part_info;
+	struct blk_desc *dev_desc;
+	int ret;
+
+	if (!cmd)
+		return -ENOMEM;
+
+	if (strlen(cmd) >= 32)
+		return -ENOMEM;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -ENODEV;
+	}
+
+	ret = part_get_info_by_name(dev_desc, ANDROID_PARTITION_MISC, &part_info);
+	if (ret < 0) {
+		printf("%s: Could not found misc partition, just run recovery\n",
+		       __func__);
+		return -ENODEV;
+	}
+
+	strcpy(message.command, cmd);
+	return android_bootloader_message_write(dev_desc, &part_info, &message);
+}
+
 /**
  * Return the reboot reason string for the passed boot mode.
  *
diff --git a/include/android_bootloader.h b/include/android_bootloader.h
index d8f6114e70..e4e47f767a 100644
--- a/include/android_bootloader.h
+++ b/include/android_bootloader.h
@@ -93,4 +93,12 @@ char *android_str_append(char *base_name, char *slot_suffix);
  */
 int android_fdt_overlay_apply(void *fdt_addr);
 
+/** android_bcb_write- write the android bootloader message.
+ *
+ * @cmd: boot command
+ *
+ * @return 0 on success, otherwise failed.
+ */
+int android_bcb_write(char *cmd);
+
 #endif  /* __ANDROID_BOOTLOADER_H */

commit f61a2da6e83942dd9558eb4f97f0ed31cbb5b40e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 20 11:28:13 2019 +0800

    usb: gadget: validate NULL string before strncpy()
    
    The variable "s" is passed as NULL(i.e 0) When g_dnl_set_serialnumber()
    is called from hdelete_r() originally.
    
    The memory 0~1M is secure for ATF on rockchip arm64 platforms,
    so the strncpy() accesses 0 address and causes a data-abort.
    
    This issue occurs on deleting env "serial#".
    
    Change-Id: Idbf76d26809ab8b195ff4f8193e2eeac99692289
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/usb/gadget/g_dnl.c b/drivers/usb/gadget/g_dnl.c
index 039331a5af..2f238efe4c 100644
--- a/drivers/usb/gadget/g_dnl.c
+++ b/drivers/usb/gadget/g_dnl.c
@@ -51,7 +51,8 @@ static const char manufacturer[] = CONFIG_G_DNL_MANUFACTURER;
 void g_dnl_set_serialnumber(char *s)
 {
 	memset(g_dnl_serial, 0, MAX_STRING_SERIAL);
-	strncpy(g_dnl_serial, s, MAX_STRING_SERIAL - 1);
+	if (s)
+		strncpy(g_dnl_serial, s, MAX_STRING_SERIAL - 1);
 }
 
 static struct usb_device_descriptor device_desc = {

commit 6de0075c5d04380ef872dcf812fe4dfea6da42ae
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Nov 19 17:19:49 2019 +0800

    rockchip: Kconfig: enable CONFIG_DEBUG_UART_BOARD_INIT for all SoC
    
    Some SoC may missing this config, this is need by all the SoC, so set it
    at higher level.
    
    Change-Id: I16e935635cce61d02d6641992483baf98f9fe71b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index d0117eb856..2502577577 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1145,6 +1145,7 @@ config ARCH_ROCKCHIP
 	select SYS_NS16550
 	select SKIP_RELOCATE_UBOOT if !ARM64
 	select SPI
+	select DEBUG_UART_BOARD_INIT
 	imply CMD_FASTBOOT
 	imply FASTBOOT
 	imply FAT_WRITE
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 4b325c9d8a..6845823248 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -14,7 +14,6 @@ config ROCKCHIP_PX30
 	imply SPL_SEPARATE_BSS
 	imply SPL_SERIAL_SUPPORT
 	imply TPL_SERIAL_SUPPORT
-	select DEBUG_UART_BOARD_INIT
 	help
 	  The Rockchip PX30 is a ARM-based SoC with a quad-core Cortex-A35
 	  including NEON and GPU, Mali-400 graphics, several DDR3 options
@@ -51,7 +50,6 @@ config ROCKCHIP_RK3036
 	select ROCKCHIP_BROM_HELPER
 	select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
 	select TPL_NEEDS_SEPARATE_STACK if TPL
-	select DEBUG_UART_BOARD_INIT
 	select ARM_SMCCC
 	help
 	  The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
@@ -136,7 +134,6 @@ config ROCKCHIP_RK322X
 	imply SPL_SERIAL_SUPPORT
 	imply TPL_SERIAL_SUPPORT
 	select ROCKCHIP_BROM_HELPER
-	select DEBUG_UART_BOARD_INIT
 	select TPL_LIBCOMMON_SUPPORT
 	select TPL_LIBGENERIC_SUPPORT
 	select GICV2
@@ -213,7 +210,6 @@ endif
 config ROCKCHIP_RK3308
 	bool "Support Rockchip RK3308"
 	select ARM64 if !ARM64_BOOT_AARCH32
-	select DEBUG_UART_BOARD_INIT
 	select ARM_SMCCC
 	select GICV2
 	select SUPPORT_SPL if !ARM64_BOOT_AARCH32
@@ -244,7 +240,6 @@ config ROCKCHIP_RK3328
 	imply SPL_SERIAL_SUPPORT
 	imply TPL_SERIAL_SUPPORT
 	imply SPL_SEPARATE_BSS
-	select DEBUG_UART_BOARD_INIT
 	select ARM_SMCCC
 	help
 	  The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
@@ -279,7 +274,6 @@ config ROCKCHIP_RK3368
 	imply SPL_SEPARATE_BSS
 	imply SPL_SERIAL_SUPPORT
 	imply TPL_SERIAL_SUPPORT
-	select DEBUG_UART_BOARD_INIT
 	select GICV2
 	select ARM_SMCCC
 	help
@@ -328,7 +322,6 @@ config ROCKCHIP_RK3399
 	select SPL_SEPARATE_BSS
 	select SPL_SERIAL_SUPPORT
 	select SPL_DRIVERS_MISC_SUPPORT
-	select DEBUG_UART_BOARD_INIT
 	select GICV3
 	select BOARD_LATE_INIT
 	select ROCKCHIP_BROM_HELPER
@@ -377,7 +370,6 @@ config ROCKCHIP_RK1808
 	select ARM64
 	select ARM_SMCCC
 	select GICV3 if !COPROCESSOR_RK1808
-	select DEBUG_UART_BOARD_INIT
 	select SUPPORT_SPL if !COPROCESSOR_RK1808
 	select SUPPORT_TPL if !COPROCESSOR_RK1808
 	help

commit c90232ab816e2a23c8a006a849a72d23c819d7b6
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Nov 18 18:18:52 2019 +0800

    rockchip: ram: add support for rk3326 evb
    
    PX30 evb is ddr3;
    RK3326 evb is lpddr3
    
    Change-Id: I02c365e8c0f9b5e6cfa47ad7c5972d6a8ce327d9
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram_px30.c b/drivers/ram/rockchip/sdram_px30.c
index 407c74fd98..0a6723d0d8 100644
--- a/drivers/ram/rockchip/sdram_px30.c
+++ b/drivers/ram/rockchip/sdram_px30.c
@@ -51,7 +51,11 @@ struct dram_info {
 struct dram_info dram_info;
 
 struct px30_sdram_params sdram_configs[] = {
+#ifdef CONFIG_ROCKCHIP_RK3326
+#include	"sdram-px30-lpddr3-detect-333.inc"
+#else
 #include	"sdram-px30-ddr3-detect-333.inc"
+#endif
 };
 
 struct ddr_phy_skew skew = {

commit e82920f397d2fa9cc54567594651442d0a32ed8a
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Nov 18 17:41:46 2019 +0800

    rockchip: px30: Enable support for UART5
    
    Because the UART2 IOs are mux with SDcard, in order to use SDCard,
    we need to use UART5(on evb RPi connector) instead of UART2M0
    
    Change-Id: Ibeab51636eb748f389d9211193c0b5682c266c9e
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/px30-evb.dts b/arch/arm/dts/px30-evb.dts
index 21b8f5e985..d134a1e759 100644
--- a/arch/arm/dts/px30-evb.dts
+++ b/arch/arm/dts/px30-evb.dts
@@ -416,6 +416,10 @@
 	status = "okay";
 };
 
+&uart5 {
+	status = "okay";
+};
+
 &uart2 {
 	status = "okay";
 };
diff --git a/arch/arm/dts/px30-u-boot.dtsi b/arch/arm/dts/px30-u-boot.dtsi
index 2508cb9dd7..81ed249076 100644
--- a/arch/arm/dts/px30-u-boot.dtsi
+++ b/arch/arm/dts/px30-u-boot.dtsi
@@ -20,6 +20,11 @@
 	u-boot,dm-pre-reloc;
 };
 
+&uart5 {
+	clock-frequency = <24000000>;
+	u-boot,dm-pre-reloc;
+};
+
 &uart2 {
 	clock-frequency = <24000000>;
 	u-boot,dm-pre-reloc;
diff --git a/arch/arm/include/asm/arch-rockchip/cru_px30.h b/arch/arm/include/asm/arch-rockchip/cru_px30.h
index 87d32154e8..7a229b3beb 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_px30.h
@@ -312,25 +312,6 @@ enum {
 	CRYPTO_DIV_SHIFT	= 0,
 	CRYPTO_DIV_MASK		= 0x1f << CRYPTO_DIV_SHIFT,
 
-	/* CRU_CLK_SEL37_CON */
-	UART2_PLL_SEL_SHIFT	= 14,
-	UART2_PLL_SEL_MASK	= 3 << UART2_PLL_SEL_SHIFT,
-	UART2_PLL_SEL_GPLL	= 0,
-	UART2_PLL_SEL_24M,
-	UART2_PLL_SEL_480M,
-	UART2_PLL_SEL_NPLL,
-	UART2_DIV_CON_SHIFT	= 0,
-	UART2_DIV_CON_MASK	= 0x1f << UART2_DIV_CON_SHIFT,
-
-	/* CRU_CLK_SEL38_CON */
-	UART2_CLK_SEL_SHIFT	= 14,
-	UART2_CLK_SEL_MASK	= 3 << UART2_PLL_SEL_SHIFT,
-	UART2_CLK_SEL_UART2	= 0,
-	UART2_CLK_SEL_UART2_NP5,
-	UART2_CLK_SEL_UART2_FRAC,
-	UART2_DIVNP5_SHIFT	= 0,
-	UART2_DIVNP5_MASK	= 0x1f << UART2_DIVNP5_SHIFT,
-
 	/* CRU_CLK_SEL30_CON */
 	CLK_I2S1_DIV_CON_MASK	= 0x7f,
 	CLK_I2S1_PLL_SEL_MASK	= 0X1 << 8,
@@ -351,6 +332,63 @@ enum {
 	CLK_I2S1_FRAC_DENOMINATOR_SHIFT	= 0,
 	CLK_I2S1_FRAC_DENOMINATOR_MASK	= 0xffff,
 
+	/* CRU_CLK_SEL34_CON */
+	UART1_PLL_SEL_SHIFT	= 14,
+	UART1_PLL_SEL_MASK	= 3 << UART1_PLL_SEL_SHIFT,
+	UART1_PLL_SEL_GPLL	= 0,
+	UART1_PLL_SEL_24M,
+	UART1_PLL_SEL_480M,
+	UART1_PLL_SEL_NPLL,
+	UART1_DIV_CON_SHIFT	= 0,
+	UART1_DIV_CON_MASK	= 0x1f << UART1_DIV_CON_SHIFT,
+
+	/* CRU_CLK_SEL35_CON */
+	UART1_CLK_SEL_SHIFT	= 14,
+	UART1_CLK_SEL_MASK	= 3 << UART1_PLL_SEL_SHIFT,
+	UART1_CLK_SEL_UART1	= 0,
+	UART1_CLK_SEL_UART1_NP5,
+	UART1_CLK_SEL_UART1_FRAC,
+	UART1_DIVNP5_SHIFT	= 0,
+	UART1_DIVNP5_MASK	= 0x1f << UART1_DIVNP5_SHIFT,
+
+	/* CRU_CLK_SEL37_CON */
+	UART2_PLL_SEL_SHIFT	= 14,
+	UART2_PLL_SEL_MASK	= 3 << UART2_PLL_SEL_SHIFT,
+	UART2_PLL_SEL_GPLL	= 0,
+	UART2_PLL_SEL_24M,
+	UART2_PLL_SEL_480M,
+	UART2_PLL_SEL_NPLL,
+	UART2_DIV_CON_SHIFT	= 0,
+	UART2_DIV_CON_MASK	= 0x1f << UART2_DIV_CON_SHIFT,
+
+	/* CRU_CLK_SEL38_CON */
+	UART2_CLK_SEL_SHIFT	= 14,
+	UART2_CLK_SEL_MASK	= 3 << UART2_PLL_SEL_SHIFT,
+	UART2_CLK_SEL_UART2	= 0,
+	UART2_CLK_SEL_UART2_NP5,
+	UART2_CLK_SEL_UART2_FRAC,
+	UART2_DIVNP5_SHIFT	= 0,
+	UART2_DIVNP5_MASK	= 0x1f << UART2_DIVNP5_SHIFT,
+
+	/* CRU_CLK_SEL46_CON */
+	UART5_PLL_SEL_SHIFT	= 14,
+	UART5_PLL_SEL_MASK	= 3 << UART5_PLL_SEL_SHIFT,
+	UART5_PLL_SEL_GPLL	= 0,
+	UART5_PLL_SEL_24M,
+	UART5_PLL_SEL_480M,
+	UART5_PLL_SEL_NPLL,
+	UART5_DIV_CON_SHIFT	= 0,
+	UART5_DIV_CON_MASK	= 0x1f << UART5_DIV_CON_SHIFT,
+
+	/* CRU_CLK_SEL47_CON */
+	UART5_CLK_SEL_SHIFT	= 14,
+	UART5_CLK_SEL_MASK	= 3 << UART5_PLL_SEL_SHIFT,
+	UART5_CLK_SEL_UART5	= 0,
+	UART5_CLK_SEL_UART5_NP5,
+	UART5_CLK_SEL_UART5_FRAC,
+	UART5_DIVNP5_SHIFT	= 0,
+	UART5_DIVNP5_MASK	= 0x1f << UART5_DIVNP5_SHIFT,
+
 	/* CRU_CLK_SEL49_CON */
 	CLK_I2C_PLL_SEL_GPLL		= 0,
 	CLK_I2C_PLL_SEL_24M,
diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c
index 6102ffe4bc..8085f46d2f 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -51,6 +51,97 @@ static struct mm_region px30_mem_map[] = {
 struct mm_region *mem_map = px30_mem_map;
 #endif
 
+#define PMU_PWRDN_CON			0xff000018
+#define GRF_BASE			0xff140000
+#define CRU_BASE			0xff2b0000
+#define VIDEO_PHY_BASE			0xff2e0000
+#define SERVICE_CORE_ADDR		0xff508000
+#define DDR_FW_BASE			0xff534000
+
+#define FW_DDR_CON			0x40
+
+#define QOS_PRIORITY			0x08
+
+#define QOS_PRIORITY_LEVEL(h, l)	((((h) & 3) << 8) | ((l) & 3))
+
+/* GRF_GPIO1CL_IOMUX */
+enum {
+	GPIO1C1_SHIFT		= 4,
+	GPIO1C1_MASK		= 0xf << GPIO1C1_SHIFT,
+	GPIO1C1_GPIO		= 0,
+	GPIO1C1_UART1_TX,
+
+	GPIO1C0_SHIFT		= 0,
+	GPIO1C0_MASK		= 0xf << GPIO1C0_SHIFT,
+	GPIO1C0_GPIO		= 0,
+	GPIO1C0_UART1_RX,
+};
+
+/* GRF_GPIO1DL_IOMUX */
+enum {
+	GPIO1D3_SHIFT		= 12,
+	GPIO1D3_MASK		= 0xf << GPIO1D3_SHIFT,
+	GPIO1D3_GPIO		= 0,
+	GPIO1D3_SDMMC_D1,
+	GPIO1D3_UART2_RXM0,
+
+	GPIO1D2_SHIFT		= 8,
+	GPIO1D2_MASK		= 0xf << GPIO1D2_SHIFT,
+	GPIO1D2_GPIO		= 0,
+	GPIO1D2_SDMMC_D0,
+	GPIO1D2_UART2_TXM0,
+};
+
+/* GRF_GPIO1DH_IOMUX */
+enum {
+	GPIO1D7_SHIFT		= 12,
+	GPIO1D7_MASK		= 0xf << GPIO1D7_SHIFT,
+	GPIO1D7_GPIO		= 0,
+	GPIO1D7_SDMMC_CMD,
+
+	GPIO1D6_SHIFT		= 8,
+	GPIO1D6_MASK		= 0xf << GPIO1D6_SHIFT,
+	GPIO1D6_GPIO		= 0,
+	GPIO1D6_SDMMC_CLK,
+
+	GPIO1D5_SHIFT		= 4,
+	GPIO1D5_MASK		= 0xf << GPIO1D5_SHIFT,
+	GPIO1D5_GPIO		= 0,
+	GPIO1D5_SDMMC_D3,
+
+	GPIO1D4_SHIFT		= 0,
+	GPIO1D4_MASK		= 0xf << GPIO1D4_SHIFT,
+	GPIO1D4_GPIO		= 0,
+	GPIO1D4_SDMMC_D2,
+};
+
+/* GRF_GPIO2BH_IOMUX */
+enum {
+	GPIO2B6_SHIFT		= 8,
+	GPIO2B6_MASK		= 0xf << GPIO2B6_SHIFT,
+	GPIO2B6_GPIO		= 0,
+	GPIO2B6_CIF_D1M0,
+	GPIO2B6_UART2_RXM1,
+
+	GPIO2B4_SHIFT		= 0,
+	GPIO2B4_MASK		= 0xf << GPIO2B4_SHIFT,
+	GPIO2B4_GPIO		= 0,
+	GPIO2B4_CIF_D0M0,
+	GPIO2B4_UART2_TXM1,
+};
+
+/* GRF_GPIO3AL_IOMUX */
+enum {
+	GPIO3A2_SHIFT		= 8,
+	GPIO3A2_MASK		= 0xf << GPIO3A2_SHIFT,
+	GPIO3A2_GPIO		= 0,
+	GPIO3A2_UART5_TX	= 4,
+
+	GPIO3A1_SHIFT		= 4,
+	GPIO3A1_MASK		= 0xf << GPIO3A1_SHIFT,
+	GPIO3A1_GPIO		= 0,
+	GPIO3A1_UART5_RX	= 4,
+};
 int arch_cpu_init(void)
 {
 #ifdef CONFIG_SPL_BUILD
@@ -64,8 +155,29 @@ int arch_cpu_init(void)
 #ifdef CONFIG_SPL_BUILD
 	/* Set cpu qos priority */
 	writel(QOS_PRIORITY_LEVEL(1, 1), SERVICE_CORE_ADDR + QOS_PRIORITY);
+
+#if !defined(CONFIG_DEBUG_UART_BOARD_INIT) || \
+    (CONFIG_DEBUG_UART_BASE != 0xff160000) || \
+    (CONFIG_DEBUG_UART_CHANNEL != 0)
+	static struct px30_grf * const grf = (void *)GRF_BASE;
+	/* fix sdmmc pinmux if not using uart2-channel0 as debug uart */
+	rk_clrsetreg(&grf->gpio1dl_iomux,
+		     GPIO1D3_MASK | GPIO1D2_MASK,
+		     GPIO1D3_SDMMC_D1 << GPIO1D3_SHIFT |
+		     GPIO1D2_SDMMC_D0 << GPIO1D2_SHIFT);
+	rk_clrsetreg(&grf->gpio1dh_iomux,
+		     GPIO1D7_MASK | GPIO1D6_MASK | GPIO1D5_MASK | GPIO1D4_MASK,
+		     GPIO1D7_SDMMC_CMD << GPIO1D7_SHIFT |
+		     GPIO1D6_SDMMC_CLK << GPIO1D6_SHIFT |
+		     GPIO1D5_SDMMC_D3 << GPIO1D5_SHIFT |
+		     GPIO1D4_SDMMC_D2 << GPIO1D4_SHIFT);
 #endif
 
+#endif
+
+	/* Enable PD_VO (default disable at reset) */
+	rk_clrreg(PMU_PWRDN_CON, 1 << 13);
+
 	/* Disable video phy bandgap by default */
 	writel(0x82, VIDEO_PHY_BASE + 0x0000);
 	writel(0x05, VIDEO_PHY_BASE + 0x03ac);
@@ -82,7 +194,35 @@ int arch_cpu_init(void)
 void board_debug_uart_init(void)
 {
 	static struct px30_grf * const grf = (void *)GRF_BASE;
+	static struct px30_cru * const cru = (void *)CRU_BASE;
+
+#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff158000)
+	/* uart_sel_clk default select 24MHz */
+	rk_clrsetreg(&cru->clksel_con[34],
+		     UART1_PLL_SEL_MASK | UART1_DIV_CON_MASK,
+		     UART1_PLL_SEL_24M << UART1_PLL_SEL_SHIFT | 0);
+	rk_clrsetreg(&cru->clksel_con[35],
+		     UART1_CLK_SEL_MASK,
+		     UART1_CLK_SEL_UART1 << UART1_CLK_SEL_SHIFT);
 
+	rk_clrsetreg(&grf->gpio1cl_iomux,
+		     GPIO1C1_MASK | GPIO1C0_MASK,
+		     GPIO1C1_UART1_TX << GPIO1C1_SHIFT |
+		     GPIO1C0_UART1_RX << GPIO1C0_SHIFT);
+#elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff178000)
+	/* uart_sel_clk default select 24MHz */
+	rk_clrsetreg(&cru->clksel_con[46],
+		     UART5_PLL_SEL_MASK | UART5_DIV_CON_MASK,
+		     UART5_PLL_SEL_24M << UART5_PLL_SEL_SHIFT | 0);
+	rk_clrsetreg(&cru->clksel_con[47],
+		     UART5_CLK_SEL_MASK,
+		     UART5_CLK_SEL_UART5 << UART5_CLK_SEL_SHIFT);
+
+	rk_clrsetreg(&grf->gpio3al_iomux,
+		     GPIO3A2_MASK | GPIO3A1_MASK,
+		     GPIO3A2_UART5_TX << GPIO3A2_SHIFT |
+		     GPIO3A1_UART5_RX << GPIO3A1_SHIFT);
+#else
 	/* GRF_IOFUNC_CON0 */
 	enum {
 		CON_IOMUX_UART2SEL_SHIFT	= 10,
@@ -92,36 +232,6 @@ void board_debug_uart_init(void)
 		CON_IOMUX_UART2SEL_USBPHY,
 	};
 
-#ifdef CONFIG_TPL_BUILD
-	static struct px30_cru * const cru = (void *)CRU_BASE;
-	static struct rk_uart * const uart = (void *)UART2_BASE;
-
-	/* GRF_GPIO2BH_IOMUX */
-	enum {
-		GPIO2B7_SHIFT		= 12,
-		GPIO2B7_MASK		= 0xf << GPIO2B7_SHIFT,
-		GPIO2B7_GPIO		= 0,
-		GPIO2B7_CIF_D10M0,
-		GPIO2B7_I2C2_SCL,
-
-		GPIO2B6_SHIFT		= 8,
-		GPIO2B6_MASK		= 0xf << GPIO2B6_SHIFT,
-		GPIO2B6_GPIO		= 0,
-		GPIO2B6_CIF_D1M0,
-		GPIO2B6_UART2_RXM1,
-
-		GPIO2B5_SHIFT		= 4,
-		GPIO2B5_MASK		= 0xf << GPIO2B5_SHIFT,
-		GPIO2B5_GPIO		= 0,
-		GPIO2B5_PWM2,
-
-		GPIO2B4_SHIFT		= 0,
-		GPIO2B4_MASK		= 0xf << GPIO2B4_SHIFT,
-		GPIO2B4_GPIO		= 0,
-		GPIO2B4_CIF_D0M0,
-		GPIO2B4_UART2_TXM1,
-	};
-
 	/* uart_sel_clk default select 24MHz */
 	rk_clrsetreg(&cru->clksel_con[37],
 		     UART2_PLL_SEL_MASK | UART2_DIV_CON_MASK,
@@ -130,6 +240,7 @@ void board_debug_uart_init(void)
 		     UART2_CLK_SEL_MASK,
 		     UART2_CLK_SEL_UART2 << UART2_CLK_SEL_SHIFT);
 
+#if (CONFIG_DEBUG_UART2_CHANNEL == 1)
 	/* Enable early UART2 */
 	rk_clrsetreg(&grf->iofunc_con0,
 		     CON_IOMUX_UART2SEL_MASK,
@@ -141,53 +252,21 @@ void board_debug_uart_init(void)
 	 * so only need set uart2_rxm1 and uart2_txm1 here.
 	 */
 	rk_clrsetreg(&grf->gpio2bh_iomux,
-		     GPIO2B6_MASK,
-		     GPIO2B6_UART2_RXM1 << GPIO2B6_SHIFT);
-	rk_clrsetreg(&grf->gpio2bh_iomux,
-		     GPIO2B4_MASK,
+		     GPIO2B6_MASK | GPIO2B4_MASK,
+		     GPIO2B6_UART2_RXM1 << GPIO2B6_SHIFT |
 		     GPIO2B4_UART2_TXM1 << GPIO2B4_SHIFT);
-
-	/* enable FIFO */
-	writel(0x1, &uart->sfe);
 #else
-#ifdef CONFIG_SPL_BUILD
-	/* GRF_GPIO1DL_IOMUX */
-	enum {
-		GPIO1D3_SHIFT		= 12,
-		GPIO1D3_MASK		= 0xf << GPIO1D3_SHIFT,
-		GPIO1D3_GPIO		= 0,
-		GPIO1D3_SDMMC_D1,
-		GPIO1D3_UART2_RXM0,
-
-		GPIO1D2_SHIFT		= 8,
-		GPIO1D2_MASK		= 0xf << GPIO1D2_SHIFT,
-		GPIO1D2_GPIO		= 0,
-		GPIO1D2_SDMMC_D0,
-		GPIO1D2_UART2_TXM0,
-
-		GPIO1D1_SHIFT		= 4,
-		GPIO1D1_MASK		= 0xf << GPIO1D1_SHIFT,
-		GPIO1D1_GPIO		= 0,
-		GPIO1D1_SDIO_D3,
-
-		GPIO1D0_SHIFT		= 0,
-		GPIO1D0_MASK		= 0xf << GPIO1D0_SHIFT,
-		GPIO1D0_GPIO		= 0,
-		GPIO1D0_SDIO_D2,
-	};
+	rk_clrsetreg(&grf->iofunc_con0,
+		     CON_IOMUX_UART2SEL_MASK,
+		     CON_IOMUX_UART2SEL_M0 << CON_IOMUX_UART2SEL_SHIFT);
 
-	/* Do not set the iomux in U-Boot proper because SD card may using it */
-	/* Enable early UART2 channel m0 on the px30 */
 	rk_clrsetreg(&grf->gpio1dl_iomux,
 		     GPIO1D3_MASK | GPIO1D2_MASK,
 		     GPIO1D3_UART2_RXM0 << GPIO1D3_SHIFT |
 		     GPIO1D2_UART2_TXM0 << GPIO1D2_SHIFT);
-#endif
-	/* Set channel C as UART2 input */
-	rk_clrsetreg(&grf->iofunc_con0,
-		     CON_IOMUX_UART2SEL_MASK,
-		     CON_IOMUX_UART2SEL_M0 << CON_IOMUX_UART2SEL_SHIFT);
-#endif
+#endif /* CONFIG_DEBUG_UART2_CHANNEL == 1 */
+
+#endif /* CONFIG_DEBUG_UART_BASE && CONFIG_DEBUG_UART_BASE == ... */
 }
 
 int set_armclk_rate(void)

commit f546c94580b0eefd0fea9046d09b87a0c5fb46ac
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Nov 19 15:16:48 2019 +0800

    rockchip: rk3288: no need to check PLL setting.
    
    Remove assert to make DEBUG work.
    
    Change-Id: Idd41066f98c759b4fefe25c8715138c1c54df418
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index eb5ec6ec5b..ab346ef539 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -183,9 +183,6 @@ static int rkclk_set_pll(struct rk3288_cru *cru, enum rk_clk_id clk_id,
 
 	debug("PLL at %x: nf=%d, nr=%d, no=%d, vco=%u Hz, output=%u Hz\n",
 	      (uint)pll, div->nf, div->nr, div->no, vco_hz, output_hz);
-	assert(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ &&
-	       output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ &&
-	       (div->no == 1 || !(div->no % 2)));
 
 	/* enter reset */
 	rk_setreg(&pll->con3, 1 << PLL_RESET_SHIFT);

commit 0746f808ef1b1a9281092626c632d31e258aba52
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Nov 19 15:45:57 2019 +0800

    make.sh: add rv1109 build support
    
    Change-Id: I96984d88f840f0162cfb5a2b834aab3686c017d5
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 09ae08a0a2..6efacaf4ef 100755
--- a/make.sh
+++ b/make.sh
@@ -361,6 +361,8 @@ select_chip_info()
 			&& RKCHIP=RK3368H
 		grep '^CONFIG_ROCKCHIP_RV1108=y' ${OUTDIR}/.config >/dev/null \
 			&& RKCHIP=RV110X
+		grep '^CONFIG_ROCKCHIP_RV1109=y' ${OUTDIR}/.config >/dev/null \
+			&& RKCHIP=RV1109
 	elif [ $count -gt 1 ]; then
 		# Grep the RK CHIP variant
 		grep '^CONFIG_ROCKCHIP_PX3SE=y' ${OUTDIR}/.config > /dev/null \

commit b18d7a540c5f8dfd8764551a74bc5001d2cb6236
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Nov 19 15:45:01 2019 +0800

    board: rockchip: add rv1109 evb support
    
    Add basic support for rv1109 evb.
    
    Change-Id: I88bd871880feffbe745e0d5ed22ec7f02e9caa75
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/board/rockchip/evb_rv1109/Kconfig b/board/rockchip/evb_rv1109/Kconfig
new file mode 100644
index 0000000000..1266dda08c
--- /dev/null
+++ b/board/rockchip/evb_rv1109/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_EVB_RV1109
+
+config SYS_BOARD
+	default "evb_rv1109"
+
+config SYS_VENDOR
+	default "rockchip"
+
+config SYS_CONFIG_NAME
+	default "evb_rv1109"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+
+endif
diff --git a/board/rockchip/evb_rv1109/Makefile b/board/rockchip/evb_rv1109/Makefile
new file mode 100644
index 0000000000..6d2cb5b925
--- /dev/null
+++ b/board/rockchip/evb_rv1109/Makefile
@@ -0,0 +1,7 @@
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+# Copyright (c) 2019 Rockchip Electronics Co., Ltd
+#
+
+obj-y	+= evb_rv1109.o
diff --git a/board/rockchip/evb_rv1109/evb_rv1109.c b/board/rockchip/evb_rv1109/evb_rv1109.c
new file mode 100644
index 0000000000..7cd98fc9b8
--- /dev/null
+++ b/board/rockchip/evb_rv1109/evb_rv1109.c
@@ -0,0 +1,10 @@
+/*
+ * SPDX-License-Identifier:     GPL-2.0+
+ *
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
diff --git a/configs/rv1109_defconfig b/configs/rv1109_defconfig
new file mode 100644
index 0000000000..d5cf744dac
--- /dev/null
+++ b/configs/rv1109_defconfig
@@ -0,0 +1,70 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0x1000
+CONFIG_ROCKCHIP_RV1109=y
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_TARGET_EVB_RV1109=y
+CONFIG_DEFAULT_DEVICE_TREE="rv1109-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_FASTBOOT_BUF_ADDR=0x800800
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPT=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_ITEST is not set
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_MISC is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_ADC_KEY=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PINCTRL=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0x11030000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x18d1
+CONFIG_G_DNL_PRODUCT_NUM=0xd00d
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_ERRNO_STR=y
+# CONFIG_EFI_LOADER is not set
diff --git a/include/configs/evb_rv1109.h b/include/configs/evb_rv1109.h
new file mode 100644
index 0000000000..43129fd170
--- /dev/null
+++ b/include/configs/evb_rv1109.h
@@ -0,0 +1,26 @@
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __EVB_RV1109_H
+#define __EVB_RV1109_H
+
+#include <configs/rv1109_common.h>
+
+#define CONFIG_SUPPORT_EMMC_RPMB
+#define CONFIG_SYS_MMC_ENV_DEV 0
+
+#define ROCKCHIP_DEVICE_SETTINGS \
+			"stdout=serial,vidconsole\0" \
+			"stderr=serial,vidconsole\0"
+#undef CONFIG_CONSOLE_SCROLL_LINES
+#define CONFIG_CONSOLE_SCROLL_LINES            10
+
+#ifndef CONFIG_SPL_BUILD
+#undef CONFIG_BOOTCOMMAND
+#define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
+#endif
+
+#endif

commit bb4d043eacb68339f07bbb4e1071c7b582ea8f66
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Nov 19 15:42:07 2019 +0800

    dts: rockchip: add rv1109 support
    
    Sync from kernel:
    (3f4e5d7 Merge branch 'develop-4.19')
    
    Change-Id: I1b7f842676ed04aa3a45b8150dc92aaafd5ac4b6
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rv1109-evb.dts b/arch/arm/dts/rv1109-evb.dts
new file mode 100644
index 0000000000..a15dc55165
--- /dev/null
+++ b/arch/arm/dts/rv1109-evb.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd.
+ */
+
+/dts-v1/;
+#include "rv1109.dtsi"
+#include "rv1109-u-boot.dtsi"
+
+/ {
+	model = "Rockchip RV1109 Evaluation Board";
+	compatible = "rockchip,rv1109-evb", "rockchip,rv1109";
+};
+
+&uart2 {
+	status = "okay";
+};
diff --git a/arch/arm/dts/rv1109-u-boot.dtsi b/arch/arm/dts/rv1109-u-boot.dtsi
new file mode 100644
index 0000000000..744a860286
--- /dev/null
+++ b/arch/arm/dts/rv1109-u-boot.dtsi
@@ -0,0 +1,24 @@
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+/ {
+	chosen {
+		stdout-path = &uart2;
+	};
+};
+
+&cru {
+	u-boot,dm-pre-reloc;
+};
+
+&grf {
+	u-boot,dm-pre-reloc;
+};
+
+&uart2 {
+	u-boot,dm-pre-reloc;
+	clock-frequency = <24000000>;
+};
diff --git a/arch/arm/dts/rv1109.dtsi b/arch/arm/dts/rv1109.dtsi
new file mode 100644
index 0000000000..a4c6c29a62
--- /dev/null
+++ b/arch/arm/dts/rv1109.dtsi
@@ -0,0 +1,215 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd.
+ */
+
+#include <dt-bindings/clock/rv1109-cru.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	compatible = "rockchip,rv1109";
+
+	interrupt-parent = <&gic>;
+
+	aliases {
+		serial0 = &uart0;
+		serial1 = &uart1;
+		serial2 = &uart2;
+		serial3 = &uart3;
+		serial4 = &uart4;
+		serial5 = &uart5;
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu0: cpu@f00 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a7";
+			reg = <0xf00>;
+			clocks = <&cru ARMCLK>;
+		};
+
+		cpu1: cpu@f01 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a7";
+			reg = <0xf01>;
+		};
+
+		cpu2: cpu@f02 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a7";
+			reg = <0xf02>;
+		};
+
+		cpu3: cpu@f03 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a7";
+			reg = <0xf03>;
+		};
+	};
+
+	arm-pmu {
+		compatible = "arm,cortex-a7-pmu";
+		interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
+	};
+
+	timer {
+		compatible = "arm,armv7-timer";
+		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+		clock-frequency = <24000000>;
+	};
+
+	xin24m: oscillator {
+		compatible = "fixed-clock";
+		clock-frequency = <24000000>;
+		clock-output-names = "xin24m";
+		#clock-cells = <0>;
+	};
+
+	grf: syscon@fe000000 {
+		compatible = "rockchip,rv1109-grf", "syscon";
+		reg = <0xfe000000 0x1000>;
+	};
+
+	gic: interrupt-controller@feff0000 {
+		compatible = "arm,gic-400";
+		interrupt-controller;
+		#interrupt-cells = <3>;
+		#address-cells = <0>;
+
+		reg = <0xfeff1000 0x1000>,
+		      <0xfeff2000 0x2000>,
+		      <0xfeff4000 0x2000>,
+		      <0xfeff6000 0x2000>;
+		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+	};
+
+	amba {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		dmac: dma-controller@ff4e0000 {
+			compatible = "arm,pl330", "arm,primecell";
+			reg = <0xff4e0000 0x4000>;
+			interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
+			#dma-cells = <1>;
+			clocks = <&cru ACLK_DMAC>;
+			clock-names = "apb_pclk";
+		};
+	};
+
+	uart1: serial@ff410000 {
+		compatible = "rockchip,rv1109-uart", "snps,dw-apb-uart";
+		reg = <0xff410000 0x100>;
+		interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		clock-frequency = <24000000>;
+		clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
+		clock-names = "baudclk", "apb_pclk";
+		status = "disabled";
+	};
+
+	pmucru: clock-controller@ff480000 {
+		compatible = "rockchip,rv1109-pmucru";
+		reg = <0xff480000 0x1000>;
+		rockchip,grf = <&grf>;
+		#clock-cells = <1>;
+		#reset-cells = <1>;
+	};
+
+	cru: clock-controller@ff490000 {
+		compatible = "rockchip,rv1109-cru";
+		reg = <0xff490000 0x1000>;
+		rockchip,grf = <&grf>;
+		#clock-cells = <1>;
+		#reset-cells = <1>;
+	};
+
+	fiq_debugger: fiq-debugger {
+		compatible = "rockchip,fiq-debugger";
+		rockchip,serial-id = <2>;
+		rockchip,wake-irq = <0>;
+		rockchip,irq-mode-enable = <0>;
+		rockchip,baudrate = <115200>;  /* Only 115200 and 1500000 */
+		interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
+		status = "disabled";
+	};
+
+	uart0: serial@ff560000 {
+		compatible = "rockchip,rv1109-uart", "snps,dw-apb-uart";
+		reg = <0xff560000 0x100>;
+		interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		clock-frequency = <24000000>;
+		clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
+		clock-names = "baudclk", "apb_pclk";
+		status = "disabled";
+	};
+
+	uart2: serial@ff570000 {
+		compatible = "rockchip,rv1109-uart", "snps,dw-apb-uart";
+		reg = <0xff570000 0x100>;
+		interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		clock-frequency = <24000000>;
+		clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
+		clock-names = "baudclk", "apb_pclk";
+		status = "disabled";
+	};
+
+	uart3: serial@ff580000 {
+		compatible = "rockchip,rv1109-uart", "snps,dw-apb-uart";
+		reg = <0xff580000 0x100>;
+		interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		clock-frequency = <24000000>;
+		clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>;
+		clock-names = "baudclk", "apb_pclk";
+		status = "disabled";
+	};
+
+	uart4: serial@ff590000 {
+		compatible = "rockchip,rv1109-uart", "snps,dw-apb-uart";
+		reg = <0xff590000 0x100>;
+		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		clock-frequency = <24000000>;
+		clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
+		clock-names = "baudclk", "apb_pclk";
+		status = "disabled";
+	};
+
+	uart5: serial@ff5a0000 {
+		compatible = "rockchip,rv1109-uart", "snps,dw-apb-uart";
+		reg = <0xff5a0000 0x100>;
+		interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		clock-frequency = <24000000>;
+		clocks = <&cru SCLK_UART5>, <&cru PCLK_UART5>;
+		clock-names = "baudclk", "apb_pclk";
+		status = "disabled";
+	};
+};

commit 0dc037782d08d5a142c06174ad2ae2c6dfe329ca
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Nov 19 15:28:24 2019 +0800

    arm: rockchip: add RV1109 SOC support
    
    RV1109 is a SoC from Rockchip, which embedded with a
    dual-core ARM Cortex-A7 and a risc-v core.
    
    Change-Id: I0e82c6f1487bd7f2948df81055b78553c139e144
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 4b325c9d8a..033b7a6935 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -422,6 +422,14 @@ config TPL_STACK
 
 endif
 
+config ROCKCHIP_RV1109
+	bool "Support Rockchip RV1109"
+	select CPU_V7
+	select BOARD_LATE_INIT
+	help
+	  The Rockchip RV1109 is a ARM-based SoC with a dual-core Cortex-A7
+	  and a risc-v core.
+
 config SPL_ROCKCHIP_BACK_TO_BROM
 	bool "SPL returns to bootrom"
 	default y if ROCKCHIP_RK3036
@@ -463,6 +471,7 @@ config ROCKCHIP_BOOT_MODE_REG
 	default 0xff320300 if ROCKCHIP_RK3399
 	default 0xfe020200 if ROCKCHIP_RK1808
 	default 0x10300580 if ROCKCHIP_RV1108
+	default 0xfe020200 if ROCKCHIP_RV1109
 	default 0
 	help
 	  The Soc will enter to different boot mode(defined in asm/arch/boot_mode.h)
@@ -482,6 +491,7 @@ config ROCKCHIP_STIMER_BASE
 	default 0xff830020 if ROCKCHIP_RK3368
 	default 0xff8680a0 if ROCKCHIP_RK3399
 	default 0x10350020 if ROCKCHIP_RV1108
+	default 0xff670020 if ROCKCHIP_RV1109
 	default 0
 	help
 	  The secure timer inited in SPL/TPL in secure word, ARM generic timer
@@ -500,6 +510,7 @@ config ROCKCHIP_IRAM_START_ADDR
 	default 0xff8c0000 if ROCKCHIP_RK3368
 	default 0xff8c0000 if ROCKCHIP_RK3399
 	default 0x10080000 if ROCKCHIP_RV1108
+	default 0xff700000 if ROCKCHIP_RV1109
 	default 0
 	help
 	  The IRAM start addr is to locate variant of the boot device from
@@ -690,4 +701,6 @@ source "arch/arm/mach-rockchip/rk3368/Kconfig"
 source "arch/arm/mach-rockchip/rk3399/Kconfig"
 source "arch/arm/mach-rockchip/rk1808/Kconfig"
 source "arch/arm/mach-rockchip/rv1108/Kconfig"
+source "arch/arm/mach-rockchip/rv1109/Kconfig"
+
 endif
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index e09b1e8be4..ce493d6f06 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -52,6 +52,7 @@ obj-$(CONFIG_ROCKCHIP_RK3368) += rk3368/
 obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399/
 obj-$(CONFIG_ROCKCHIP_RK1808) += rk1808/
 obj-$(CONFIG_ROCKCHIP_RV1108) += rv1108/
+obj-$(CONFIG_ROCKCHIP_RV1109) += rv1109/
 
 # Clear out SPL objects, in case this is a TPL build
 obj-spl-$(CONFIG_TPL_BUILD) =
diff --git a/arch/arm/mach-rockchip/rv1109/Kconfig b/arch/arm/mach-rockchip/rv1109/Kconfig
new file mode 100644
index 0000000000..71042c5c1e
--- /dev/null
+++ b/arch/arm/mach-rockchip/rv1109/Kconfig
@@ -0,0 +1,16 @@
+if ROCKCHIP_RV1109
+
+config TARGET_EVB_RV1109
+	bool "EVB_RV1109"
+	help
+	  RV1109 EVB is a evaluation board for Rockchp RV1109.
+
+config SYS_SOC
+	default "rockchip"
+
+config SYS_MALLOC_F_LEN
+	default 0x400
+
+source board/rockchip/evb_rv1109/Kconfig
+
+endif
diff --git a/arch/arm/mach-rockchip/rv1109/Makefile b/arch/arm/mach-rockchip/rv1109/Makefile
new file mode 100644
index 0000000000..0189801109
--- /dev/null
+++ b/arch/arm/mach-rockchip/rv1109/Makefile
@@ -0,0 +1,8 @@
+#
+# (C) Copyright 2019 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y += syscon_rv1109.o
+obj-y += rv1109.o
diff --git a/arch/arm/mach-rockchip/rv1109/rv1109.c b/arch/arm/mach-rockchip/rv1109/rv1109.c
new file mode 100644
index 0000000000..0c2ace3595
--- /dev/null
+++ b/arch/arm/mach-rockchip/rv1109/rv1109.c
@@ -0,0 +1,10 @@
+/*
+ * Copyright (c) 2019 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#include <common.h>
+#include <asm/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
diff --git a/arch/arm/mach-rockchip/rv1109/syscon_rv1109.c b/arch/arm/mach-rockchip/rv1109/syscon_rv1109.c
new file mode 100644
index 0000000000..0b0e663565
--- /dev/null
+++ b/arch/arm/mach-rockchip/rv1109/syscon_rv1109.c
@@ -0,0 +1,22 @@
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+
+static const struct udevice_id rv1109_syscon_ids[] = {
+	{ .compatible = "rockchip,rv1109-grf", .data = ROCKCHIP_SYSCON_GRF },
+	{ }
+};
+
+U_BOOT_DRIVER(syscon_rv1109) = {
+	.name = "rv1109_syscon",
+	.id = UCLASS_SYSCON,
+	.of_match = rv1109_syscon_ids,
+};
+
diff --git a/include/configs/rv1109_common.h b/include/configs/rv1109_common.h
new file mode 100644
index 0000000000..31eb414445
--- /dev/null
+++ b/include/configs/rv1109_common.h
@@ -0,0 +1,57 @@
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __CONFIG_RV1109_COMMON_H
+#define __CONFIG_RV1109_COMMON_H
+
+#include "rockchip-common.h"
+
+#define COUNTER_FREQUENCY		24000000
+#define CONFIG_SYS_MALLOC_LEN		(32 << 20)
+#define CONFIG_SYS_CBSIZE		1024
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_SYS_NS16550_MEM32
+
+#define CONFIG_SYS_TEXT_BASE		0x00600000
+#define CONFIG_SYS_INIT_SP_ADDR		0x00800000
+#define CONFIG_SYS_LOAD_ADDR		0x00C00800
+#define CONFIG_SYS_BOOTM_LEN		(64 << 20)
+
+#define GICD_BASE			0xfeff1000
+#define GICC_BASE			0xfeff2000
+
+/* MMC/SD IP block */
+#define CONFIG_BOUNCE_BUFFER
+
+#define CONFIG_SYS_SDRAM_BASE		0
+#define SDRAM_MAX_SIZE			0xfd000000
+
+#ifndef CONFIG_SPL_BUILD
+
+/* usb mass storage */
+#define CONFIG_USB_FUNCTION_MASS_STORAGE
+#define CONFIG_ROCKUSB_G_DNL_PID        0x330d
+
+#define ENV_MEM_LAYOUT_SETTINGS		\
+	"scriptaddr=0x00000000\0"	\
+	"pxefile_addr_r=0x00100000\0"	\
+	"fdt_addr_r=0x08300000\0"	\
+	"kernel_addr_r=0x02008000\0"	\
+	"ramdisk_addr_r=0x0a200000\0"
+
+#include <config_distro_bootcmd.h>
+#define CONFIG_EXTRA_ENV_SETTINGS	\
+	ENV_MEM_LAYOUT_SETTINGS		\
+	"partitions=" PARTS_DEFAULT	\
+	ROCKCHIP_DEVICE_SETTINGS	\
+	RKIMG_DET_BOOTDEV		\
+	BOOTENV_SHARED_RKNAND		\
+	BOOTENV
+#endif
+
+#define CONFIG_PREBOOT
+
+#endif
diff --git a/include/dt-bindings/clock/rv1109-cru.h b/include/dt-bindings/clock/rv1109-cru.h
new file mode 100644
index 0000000000..4149b773f8
--- /dev/null
+++ b/include/dt-bindings/clock/rv1109-cru.h
@@ -0,0 +1,600 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2019 Rockchip Electronics Co. Ltd.
+ * Author: Finley Xiao <finley.xiao@rock-chips.com>
+ */
+
+#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RV1109_H
+#define _DT_BINDINGS_CLK_ROCKCHIP_RV1109_H
+
+/* core clocks */
+#define PLL_APLL		1
+#define PLL_DPLL		2
+#define PLL_CPLL		3
+#define PLL_HPLL		4
+#define ARMCLK			5
+
+/* sclk (special clocks) */
+#define USB480M			10
+#define CLK_CORE_CPUPVTM	11
+#define CLK_CPUPVTM		12
+#define CLK_CPU_TSADC		13
+#define CLK_CPU_TSADCPHY	14
+#define CLK_NPU			15
+#define CLK_NPU_DIV		16
+#define CLK_NPU_NP5		17
+#define CLK_CORE_NPU		18
+#define CLK_CORE_NPUPVTM	19
+#define CLK_NPUPVTM		20
+#define CLK_NPU_TSADC		21
+#define CLK_NPU_TSADCPHY	22
+#define CLK_VENC_CORE		23
+#define CLK_VDEC_CORE		24
+#define CLK_VDEC_CA		25
+#define CLK_VDEC_HEVC_CA	26
+#define CLK_ISP			27
+#define CLK_MIPICSI_OUT_DIV	28
+#define CLK_MIPICSI_OUT_FRACDIV	29
+#define CLK_MIPICSI_OUT_MUX	30
+#define CLK_MIPICSI_OUT		31
+#define CLK_CIF_OUT_DIV		32
+#define CLK_CIF_OUT_FRACDIV	33
+#define CLK_CIF_OUT_MUX		34
+#define CLK_CIF_OUT		35
+#define CLK_RGA_CORE		36
+#define CLK_IEP_CORE		37
+#define CLK_ISPP		38
+#define CCLKIN_SDCARD		39
+#define CCLKIN_SDIO		40
+#define CCLKIN_EMMC		41
+#define CLK_NANDC		42
+#define SCLK_SFC		43
+#define CLK_USBHOST_UTMI_OHCI	44
+#define CLK_USBOTG_REF		45
+#define CLK_GMAC_DIV		46
+#define CLK_GMAC_REF		47
+#define CLK_GMAC_TX		48
+#define CLK_GMAC_RX		49
+#define CLK_GMAC_ETHERNET_OUT	50
+#define CLK_GMAC_PTPREF		51
+#define CLK_DDR			52
+#define CLK_DDR_MON		53
+#define TMCLK_DDR_MON		54
+#define CLK_SCR1		55
+#define CLK_SCR1_RTC		56
+#define CLK_SCR1_JTAG		57
+#define SCLK_UART0_DIV		58
+#define SCLK_UART0_FRAC		59
+#define SCLK_UART0_MUX		60
+#define SCLK_UART0		61
+#define SCLK_UART2_DIV		62
+#define SCLK_UART2_FRAC		63
+#define SCLK_UART2_MUX		64
+#define SCLK_UART2		65
+#define SCLK_UART3_DIV		66
+#define SCLK_UART3_FRAC		67
+#define SCLK_UART3_MUX		68
+#define SCLK_UART3		69
+#define SCLK_UART4_DIV		70
+#define SCLK_UART4_FRAC		71
+#define SCLK_UART4_MUX		72
+#define SCLK_UART4		73
+#define SCLK_UART5_DIV		74
+#define SCLK_UART5_FRAC		75
+#define SCLK_UART5_MUX		76
+#define SCLK_UART5		77
+#define CLK_I2C1		78
+#define CLK_I2C3		79
+#define CLK_I2C4		80
+#define CLK_I2C5		81
+#define CLK_SPI1		82
+#define CLK_PWM2		83
+#define DBCLK_GPIO1		84
+#define DBCLK_GPIO2		85
+#define DBCLK_GPIO3		86
+#define DBCLK_GPIO4		87
+#define CLK_SARADC		88
+#define CLK_TIMER0		89
+#define CLK_TIMER1		90
+#define CLK_TIMER2		91
+#define CLK_TIMER3		92
+#define CLK_TIMER4		93
+#define CLK_TIMER5		94
+#define CLK_STIMER0		95
+#define CLK_STIMER1		96
+#define CLK_CRYPT_CORE		97
+#define CLK_CRYPT_PKA		98
+#define MCLK_I2S8CH_TX_DIV	99
+#define MCLK_I2S8CH_TX_FRACDIV	100
+#define MCLK_I2S8CH_TX_MUX	101
+#define MCLK_I2S8CH_RX_DIV	102
+#define MCLK_I2S8CH_RX_FRACDIV	103
+#define MCLK_I2S8CH_RX_MUX	104
+#define MCLK_I2S8CH_TX_SRC	105
+#define MCLK_I2S8CH_RX_SRC	106
+#define MCLK_I2S8CH_TX		107
+#define MCLK_I2S8CH_RX		108
+#define MCLK_I2S8CH_TX_OUT2IO	109
+#define MCLK_I2S8CH_RX_OUT2IO	110
+#define MCLK_I2S2CH0_DIV	111
+#define MCLK_I2S2CH0_FRACDIV	112
+#define MCLK_I2S2CH0_MUX	113
+#define MCLK_I2S2CH0		114
+#define MCLK_I2S2CH0_OUT2IO	115
+#define MCLK_I2S2CH1_DIV	116
+#define MCLK_I2S2CH1_FRACDIV	117
+#define MCLK_I2S2CH1_MUX	118
+#define MCLK_I2S2CH1		119
+#define MCLK_I2S2CH1_OUT2IO	120
+#define MCLK_PDM		121
+#define SCLK_ADUPWM_DIV		122
+#define SCLK_AUDPWM_FRACDIV	123
+#define SCLK_AUDPWM_MUX		124
+#define CLK_ACDCDIG_ADC		125
+#define CLK_ACDCDIG_DAC		126
+#define CLK_ACDCDIG_I2C		127
+
+/* dclk */
+#define DCLK_CIF		140
+#define DCLK_CIFLITE		141
+#define DCLK_VOP_DIV		142
+#define DCLK_VOP_FRACDIV	143
+#define DCLK_VOP_MUX		144
+#define DCLK_VOP		145
+#define DCLK_DECOM		146
+
+/* aclk */
+#define ACLK_PDNPU_DIV		160
+#define ACLK_PDNPU_NP5		161
+#define ACLK_PDNPU		162
+#define ACLK_PDNPU_NIU		163
+#define ACLK_NPU		164
+#define ACLK_PDVEPU		165
+#define ACLK_PDVEPU_NIU		166
+#define ACLK_VENC		167
+#define ACLK_PDVDEC_NIU		168
+#define ACLK_PDVDEC		169
+#define ACLK_VDEC		170
+#define ACLK_PDJPEG		171
+#define ACLK_PDJPEG_NIU		172
+#define ACLK_JPEG		173
+#define ACLK_PDVI		174
+#define ACLK_PDVI_NIU		175
+#define ACLK_ISP		176
+#define ACLK_CIF		177
+#define ACLK_CIFLITE		178
+#define ACLK_PDVO		179
+#define ACLK_PDVO_NIU		180
+#define ACLK_RGA		181
+#define ACLK_VOP		182
+#define ACLK_IEP		183
+#define ACLK_PDISPP		184
+#define ACLK_PDISPP_NIU		185
+#define ACLK_ISPP		186
+#define ACLK_PDPHP		187
+#define ACLK_PDPHPMID		188
+#define ACLK_PDPHPMID_NIU	189
+#define ACLK_PDUSB		190
+#define ACLK_PDUSB_NIU		191
+#define ACLK_USBOTG		192
+#define ACLK_PDGMAC		193
+#define ACLK_PDGMAC_NIU		194
+#define ACLK_GMAC		195
+#define ACLK_PDBUS_PRE		196
+#define ACLK_PDBUS		197
+#define ACLK_PDBUS_HOLD_NIU1	198
+#define ACLK_PDBUS_NIU1		199
+#define ACLK_PDBUS_NIU2		200
+#define ACLK_PDBUS_NIU3		201
+#define ACLK_DMAC		202
+#define ACLK_DCF		203
+#define ACLK_SPINLOCK		204
+#define ACLK_PDCRYPT		205
+#define ACLK_PDCRYPT_NIU	206
+
+/* hclk */
+#define HCLK_PDNPU_NIU		230
+#define HCLK_PDNPU		231
+#define HCLK_NPU		232
+#define HCLK_PDVEPU		233
+#define HCLK_PDVEPU_NIU		234
+#define HCLK_VENC		235
+#define HCLK_PDVDEC		236
+#define HCLK_PDVDEC_NIU		237
+#define HCLK_VDEC		238
+#define HCLK_PDJPEG		239
+#define HCLK_PDJPEG_NIU		240
+#define HCLK_JPEG		241
+#define HCLK_PDVI		242
+#define HCLK_PDVI_NIU		243
+#define HCLK_ISP		244
+#define HCLK_CIF		245
+#define HCLK_CIFLITE		245
+#define HCLK_PDVO		246
+#define HCLK_PDVO_NIU		247
+#define HCLK_RGA		248
+#define HCLK_VOP		249
+#define HCLK_IEP		250
+#define HCLK_PDISPP		251
+#define HCLK_PDISPP_NIU		252
+#define HCLK_ISPP		253
+#define HCLK_PDPHP		254
+#define HCLK_PDPHPMID		255
+#define HCLK_PDPHPMID_NIU	256
+#define HCLK_PDSDCARD		257
+#define HCLK_PDSDCARD_NIU	258
+#define HCLK_SDCARD		259
+#define HCLK_PDSDIO		260
+#define HCLK_PDSDIO_NIU		261
+#define HCLK_SDIO		262
+#define HCLK_PDNVM		263
+#define HCLK_PDNVM_NIU		264
+#define HCLK_EMMC		265
+#define HCLK_NANDC		266
+#define HCLK_SFC		267
+#define HCLK_SFCXIP		268
+#define HCLK_PDUSB		269
+#define HCLK_PDUSB_NIU		270
+#define HCLK_USBHOST		271
+#define HCLK_USBHOST_ARB	272
+#define HCLK_PDBUS_PRE		273
+#define HCLK_PDBUS		274
+#define HCLK_PDBUS_NIU1		275
+#define HCLK_PDBUS_NIU2		276
+#define HCLK_PDBUS_NIU3		277
+#define HCLK_AHBROM		278
+#define HCLK_PDCRYPT		279
+#define HCLK_PDCRYPT_NIU	280
+#define HCLK_PDAUDIO		281
+#define HCLK_PDAUDIO_NIU	282
+#define HCLK_I2S8CH		283
+#define HCLK_I2S2CH0		284
+#define HCLK_I2S2CH1		285
+#define HCLK_PDM		286
+#define HCLK_AUDPWM		287
+
+/* pclk */
+#define PCLK_CPUPVTM		300
+#define PCLK_CPU_TSADC		301
+#define PCLK_PDNPU		302
+#define PCLK_PDNPU_NIU		303
+#define PCLK_NPUPVTM		304
+#define PCLK_NPU_TSADC		305
+#define PCLK_PDVI		306
+#define PCLK_PDVI_NIU		307
+#define PCLK_CSIHOST		308
+#define PCLK_PDVO		309
+#define PCLK_PDVO_NIU		310
+#define PCLK_DSIHOST		311
+#define PCLK_PDGMAC		312
+#define PCLK_PDGMAC_NIU		313
+#define PCLK_GMAC		314
+#define PCLK_PDDDR		315
+#define PCLK_DDR_MON		316
+#define PCLK_PDBUS_PRE		317
+#define PCLK_PDBUS		318
+#define PCLK_PDBUS_NIU1		319
+#define PCLK_DCF		320
+#define PCLK_GRF		321
+#define PCLK_SGRF		322
+#define PCLK_WDT		323
+#define PCLK_SWDT		324
+#define PCLK_UART0		325
+#define PCLK_UART2		326
+#define PCLK_UART3		327
+#define PCLK_UART4		328
+#define PCLK_UART5		329
+#define PCLK_I2C1		330
+#define PCLK_I2C3		331
+#define PCLK_I2C4		332
+#define PCLK_I2C5		333
+#define PCLK_SPI1		334
+#define PCLK_PWM2		335
+#define PCLK_GPIO1		336
+#define PCLK_GPIO2		337
+#define PCLK_GPIO3		338
+#define PCLK_GPIO4		339
+#define PCLK_SARADC		340
+#define PCLK_TIMER		341
+#define PCLK_STIMER		342
+#define PCLK_DECOM		343
+#define PCLK_PDAUDIO_NIU	344
+#define PCLK_ACDCDIG		345
+#define PCLK_PDTOP		346
+#define PCLK_TOPNIU		347
+#define PCLK_TOPCRU		348
+#define PCLK_TOPGRF		349
+#define PCLK_CPUEMADET		350
+#define PCLK_DDRPHY		351
+#define PCLK_DSIPHY		352
+#define PCLK_CSIPHY0		353
+#define PCLK_CSIPHY1		354
+#define PCLK_USBPHY_HOST	355
+#define PCLK_USBPHY_OTG		356
+
+#define CLK_NR_CLKS		(PCLK_USBPHY_OTG + 1)
+
+/* pmu-clocks indices */
+
+#define PLL_GPLL		1
+
+#define CLK_RTC32K		4
+#define CLK_XIN24M_DIV		5
+#define CLK_WIFI_DIV		6
+#define CLK_WIFI		7
+#define SCLK_UART1_DIV		8
+#define SCLK_UART1_FRACDIV	9
+#define SCLK_UART1_MUX		10
+#define SCLK_UART1		11
+#define CLK_I2C0		12
+#define CLK_I2C2		13
+#define CLK_SPI0		14
+#define DBCLK_GPIO0		15
+#define CLK_PWM0		16
+#define CLK_PWM1		17
+#define CLK_PMUPVTM		18
+#define CLK_CORE_PMUPVTM	19
+#define CLK_REF12M_DIV		20
+#define CLK_USBPHY_OTP_REF	21
+#define CLK_USBPHY_HOST_REF	22
+#define CLK_REF24M_DIV		23
+#define CLK_MIPIDSIPHY_REF	24
+
+#define PCLK_PDPMU		30
+#define PCLK_PMU		31
+#define PCLK_PDPMU_NIU		32
+#define PCLK_PMUMEM		33
+#define PCLK_UART1		34
+#define PCLK_I2C0		35
+#define PCLK_I2C2		35
+#define PCLK_SPI0		36
+#define PCLK_GPIO0		37
+#define PCLK_PWM0		38
+#define PCLK_PWM1		39
+#define PCLK_PMUSGRF		40
+#define PCLK_PMUGRF		41
+#define PCLK_PMUCRU		42
+#define PCLK_PMUPVTM		43
+
+#define CLKPMU_NR_CLKS		(PCLK_PMUPVTM + 1)
+
+/* soft-reset indices */
+
+/* cru_softrst_con0 */
+#define SRST_CORE0_PO		0
+#define SRST_CORE1_PO		1
+#define SRST_CORE0		2
+#define SRST_CORE1		3
+#define SRST_CORE0_DBG		4
+#define SRST_CORE1_DBG		5
+#define SRST_DBG_DAPLITE_P	6
+#define SRST_CORE_NIU_A		7
+#define SRST_NL2		8
+#define SRST_DBG_NIU_P		9
+#define SRST_DAPLITE_P		10
+#define SRST_PDCORE_NIU_H	11
+#define SRST_CPUPVTM_P		12
+#define SRST_CPUPVTM		13
+
+/* cru_softrst_con1 */
+#define SRST_PDBUS_NIU1_A	16
+#define SRST_PDBUS_NIU1_H	17
+#define SRST_PDBUS_NIU1_P	18
+#define SRST_PDBUS_NIU2_A	19
+#define SRST_PDBUS_NIU2_H	20
+#define SRST_PDBUS_NIU3_A	21
+#define SRST_PDBUS_NIU3_H	22
+#define SRST_PDBUS_HOLD_NIU1_A	23
+#define SRST_DMAC_A		24
+#define SRST_AHBROM_H		25
+#define SRST_DCF_A		28
+#define SRST_DCF_P		29
+#define SRST_SCR1		30
+#define SRST_BUSMEM_A		31
+
+/* cru_softrst_con2 */
+#define SRST_I2C1_P		32
+#define SRST_I2C1		33
+#define SRST_I2C3_P		34
+#define SRST_I2C3		35
+#define SRST_I2C4_P		36
+#define SRST_I2C4		37
+#define SRST_I2C5_P		38
+#define SRST_I2C5		39
+#define SRST_SPI1_P		40
+#define SRST_SPI1		41
+#define SRST_PWM2_P		44
+#define SRST_PWM2		45
+#define SRST_SPINLOCK_A		46
+
+/* cru_softrst_con3 */
+#define SRST_UART0_P		48
+#define SRST_UART0		49
+#define SRST_UART2_P		50
+#define SRST_UART2		51
+#define SRST_UART3_P		52
+#define SRST_UART3		53
+#define SRST_UART4_P		54
+#define SRST_UART4		55
+#define SRST_UART5_P		56
+#define SRST_UART5		57
+#define SRST_WDT_P		58
+#define SRST_SARADC_P		59
+#define SRST_GRF_P		61
+#define SRST_TIMER_P		62
+#define SRST_MAILBOX_P		63
+
+/* cru_softrst_con4 */
+#define SRST_TIMER0		64
+#define SRST_TIMER1		65
+#define SRST_TIMER2		66
+#define SRST_TIMER3		67
+#define SRST_TIMER4		68
+#define SRST_TIMER5		69
+#define SRST_GPIO1_P		72
+#define SRST_GPIO1_DB		73
+#define SRST_GPIO2_P		74
+#define SRST_GPIO2_DB		75
+#define SRST_GPIO3_P		76
+#define SRST_GPIO3_DB		77
+#define SRST_GPIO4_P		78
+#define SRST_GPIO4_DB		79
+
+/* cru_softrst_con5 */
+#define SRST_CAN_P		80
+#define SRST_CAN		81
+#define SRST_STIMER_P		82
+#define SRST_STIMER0		83
+#define SRST_STIMER1		84
+#define SRST_DECOM_A		85
+#define SRST_DECOM_P		86
+#define SRST_DECOM_D		87
+#define SRST_PDCRYPT_NIU_A	88
+#define SRST_PDCRYPT_NIU_H	89
+#define SRST_CRYPTO_A		90
+#define SRST_CRYPTO_H		91
+#define SRST_CRYPTO_CORE	92
+#define SRST_CRYPTO_PKA		93
+#define SRST_SWDT_P		94
+#define SRST_SGRF_P		95
+
+/* cru_softrst_con6 */
+#define SRST_PDAUDIO_NIU_H	96
+#define SRST_PDAUDIO_NIU_P	97
+#define SRST_I2S8CH_H		98
+#define SRST_I2S8CH_TX_M	99
+#define SRST_I2S8CH_RX_M	100
+#define SRST_I2S2CH0_H		101
+#define SRST_I2S2CH0_M		102
+#define SRST_I2S2CH1_H		103
+#define SRST_I2S2CH1_M		104
+#define SRST_PDM_H		105
+#define SRST_PDM_M		106
+#define SRST_AUDPWM_H		107
+#define SRST_AUDPWM_S		108
+#define SRST_ACDCDIG_P		109
+#define SRST_ACDCDIG		110
+
+/* cru_softrst_con7 */
+#define SRST_PDVEPU_NIU_A	112
+#define SRST_PDVEPU_NIU_H	113
+#define SRST_VENC_A		114
+#define SRST_VENC_H		115
+#define SRST_VENC_CORE		116
+#define SRST_PDVDEC_NIU_A	117
+#define SRST_PDVDEC_NIU_H	118
+#define SRST_VDEC_A		119
+#define SRST_VDEC_H		120
+#define SRST_VDEC_CORE		121
+#define SRST_VDEC_CA		122
+#define SRST_VDEC_HEVC_CA	123
+#define SRST_PDJPEG_NIU_A	124
+#define SRST_PDJPEG_NIU_H	125
+#define SRST_JPEG_A		126
+#define SRST_JPEG_H		127
+
+/* cru_softrst_con8 */
+#define SRST_PDVO_NIU_A		128
+#define SRST_PDVO_NIU_H		129
+#define SRST_PDVO_NIU_P		130
+#define SRST_RGA_A		131
+#define SRST_RGA_H		132
+#define SRST_RGA_CORE		133
+#define SRST_VOP_A		134
+#define SRST_VOP_H		135
+#define SRST_VOP_D		136
+#define SRST_TXBYTEHS_DSIHOST	137
+#define SRST_DSIHOST_P		138
+#define SRST_IEP_A		139
+#define SRST_IEP_H		140
+#define SRST_IEP_CORE		141
+
+/* cru_softrst_con9 */
+#define SRST_PDVI_NIU_A		144
+#define SRST_PDVI_NIU_H		145
+#define SRST_PDVI_NIU_P		146
+#define SRST_ISP		147
+#define SRST_CIF_A		148
+#define SRST_CIF_H		149
+#define SRST_CIF_D		150
+#define SRST_CIF_P		151
+#define SRST_CIF_I		152
+#define SRST_CSIHOST_P		153
+#define SRST_PDISPP_NIU_A	154
+#define SRST_PDISPP_NIU_H	155
+#define SRST_ISPP_A		156
+#define SRST_ISPP_H		157
+#define SRST_ISPP		158
+
+/* cru_softrst_con10 */
+#define SRST_PDPHPMID_NIU_A	160
+#define SRST_PDPHPMID_NIU_H	161
+#define SRST_PDNVM_NIU_H	163
+#define SRST_SDCARD_H		164
+#define SRST_SDIO_H		165
+#define SRST_EMMC_H		166
+#define SRST_SFC_H		167
+#define SRST_SFCXIP_H		168
+#define SRST_SFC_S		169
+#define SRST_NANDC_H		170
+#define SRST_NANDC_N		171
+#define SRST_PDSDCARD_H		173
+#define SRST_PDSDIO_H		174
+
+/* cru_softrst_con11 */
+#define SRST_PDUSB_NIU_A	176
+#define SRST_PDUSB_NIU_H	177
+#define SRST_USBHOST_H		178
+#define SRST_USBHOST_ARB_H	179
+#define SRST_USBHOST_UTMI	180
+#define SRST_USBOTG_A		181
+#define SRST_USBPHY_OTG_P	182
+#define SRST_USBPHY_HOST_P	183
+#define SRST_USBPHYOR_OTG	184
+#define SRST_USBPHYOR_HOST	185
+#define SRST_PDGMAC_NIU_A	188
+#define SRST_PDGMAC_NIU_P	189
+#define SRST_GMAC_A		190
+
+/* cru_softrst_con12 */
+#define SRST_DDR_UPCTL_P	192
+#define SRST_DDR_DFICTL_P	193
+#define SRST_DDR_MON_P		194
+#define SRST_DDR_STANDBY_P	195
+#define SRST_DDR_GRF_P		196
+#define SRST_DDR_MSCH_P		197
+#define SRST_DDR_SPLIT_A	198
+#define SRST_DDR_MSCH		199
+#define SRST_DDR_UPCTL_A	200
+#define SRST_DDR_UPCTL		201
+#define SRST_DDR_DFICTL		202
+#define SRST_DDR_STANDBY	203
+#define SRST_DDRPHY_P		206
+#define SRST_DDRPHY		207
+
+/* cru_softrst_con13 */
+#define SRST_NPU_A		208
+#define SRST_PDNPU_NIU_A	209
+#define SRST_NPU_H		210
+#define SRST_PDNPU_NIU_H	211
+#define SRST_NPUPVTM_P		212
+#define SRST_PDNPU_NIU_P	213
+#define SRST_NPU		214
+#define SRST_NPUPVTM		215
+
+/* cru_softrst_con14 */
+#define SRST_TOPNIU_P		224
+#define SRST_TOPCRU_P		225
+#define SRST_TOPGRF_P		226
+#define SRST_CPUEMADET_P	227
+#define SRST_CSIPHY0_P		228
+#define SRST_CSIPHY1_P		229
+#define SRST_DSIPHY_P		230
+#define SRST_CPU_TSADC_P	232
+#define SRST_CPU_TSADC		233
+#define SRST_CPU_TSADCPHY	234
+#define SRST_NPU_TSADC_P	235
+#define SRST_NPU_TSADC		236
+#define SRST_NPU_TSADCPHY	237
+
+#endif

commit b8dc613cbc483a8abfcf4203e4fa0e18f60b1d27
Merge: 5a0e83417b ef473e3642
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Nov 19 16:15:43 2019 +0800

    Merge branch 'next-dev' into thunder-boot

commit ef473e3642fe16fd46ded9815791b623cd11c4f3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 14 09:12:23 2019 +0800

    regulator: pwm: remove init voltage setting
    
    Regulator uclass takes over this job, avoid to init twice.
    
    Change-Id: Idea56143bd7008742936d3bbe1ebadb00c683a47
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/pwm_regulator.c b/drivers/power/regulator/pwm_regulator.c
index 4582737fe1..24c28a85a1 100644
--- a/drivers/power/regulator/pwm_regulator.c
+++ b/drivers/power/regulator/pwm_regulator.c
@@ -139,12 +139,6 @@ static int pwm_regulator_probe(struct udevice *dev)
 	priv->max_voltage = uc_pdata->max_uV;
 	priv->min_voltage = uc_pdata->min_uV;
 
-	if (priv->init_voltage > 0) {
-		debug("pwm-regulator(%s): init %d uV\n",
-		       dev->name, priv->init_voltage);
-		pwm_regulator_set_voltage(dev, priv->init_voltage);
-	}
-
 	return 0;
 }
 

commit 0a34d7e5dbfc5f1f7ab20cc24dbb87060d531461
Author: Dayao Ji <jdy@rock-chips.com>
Date:   Tue Nov 12 11:34:29 2019 +0800

    common: android: support A/B with DP support
    
    Need to pass androidboot.force_normal_boot=1 instead of
    skip_initramfs when A/B supporting dynamic partition.
    
    Change-Id: I1748690d04d4ef16e121d8dc88f69745a3cbb77d
    Signed-off-by: Dayao Ji <jdy@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 244e921051..5a6a302eca 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -35,6 +35,8 @@ DECLARE_GLOBAL_DATA_PTR;
 #define ANDROID_PARTITION_RECOVERY  "recovery"
 #define ANDROID_PARTITION_SYSTEM "system"
 #define ANDROID_PARTITION_VBMETA "vbmeta"
+#define ANDROID_PARTITION_SUPER "super"
+
 
 #define ANDROID_ARG_SLOT_SUFFIX "androidboot.slot_suffix="
 #define ANDROID_ARG_ROOT "root="
@@ -49,6 +51,52 @@ DECLARE_GLOBAL_DATA_PTR;
 #define UUID_SIZE 37
 
 #ifdef CONFIG_ANDROID_AB
+static int is_support_dynamic_partition(struct blk_desc *dev_desc)
+{
+	disk_partition_t super_part_info;
+	disk_partition_t boot_part_info;
+	int part_num;
+	int is_dp = 0;
+	char *super_dp = NULL;
+	char *super_info = "androidboot.super_partition=";
+
+	memset(&super_part_info, 0x0, sizeof(super_part_info));
+	part_num = part_get_info_by_name(dev_desc, ANDROID_PARTITION_SUPER,
+					 &super_part_info);
+	if (part_num < 0) {
+		memset(&boot_part_info, 0x0, sizeof(boot_part_info));
+		part_num = part_get_info_by_name(dev_desc, ANDROID_PARTITION_BOOT,
+					 &boot_part_info);
+		if (part_num < 0) {
+			is_dp = 0;
+		} else {
+			andr_img_hdr hdr;
+			ulong hdr_blocks = sizeof(struct andr_img_hdr) /
+			boot_part_info.blksz;
+
+			memset(&hdr, 0x0, sizeof(hdr));
+			if (blk_dread(dev_desc, boot_part_info.start, hdr_blocks, &hdr) !=
+				hdr_blocks) {
+				is_dp = 0;
+			} else {
+				debug("hdr cmdline=%s\n", hdr.cmdline);
+				super_dp = strstr(hdr.cmdline, super_info);
+				if (super_dp != NULL) {
+					is_dp = 1;
+				} else {
+					is_dp = 0;
+				}
+			}
+		}
+	} else {
+		debug("Find super partition, the firmware support dynamic partition\n");
+		is_dp = 1;
+	}
+
+	debug("%s is_dp=%d\n", __func__, is_dp);
+	return is_dp;
+}
+
 static int get_partition_unique_uuid(char *partition,
 				     char *guid_buf,
 				     size_t guid_buf_size)
@@ -101,6 +149,17 @@ static void update_root_uuid_if_android_ab(void)
 	char root_partuuid[70] = "root=PARTUUID=";
 	char *boot_args = env_get("bootargs");
 	char guid_buf[UUID_SIZE] = {0};
+	struct blk_desc *dev_desc;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: Could not find device\n", __func__);
+		return;
+	}
+
+	if (is_support_dynamic_partition(dev_desc)) {
+		return;
+	}
 
 	if (!strstr(boot_args, "root=")) {
 		get_partition_unique_uuid(ANDROID_PARTITION_SYSTEM,
@@ -1042,7 +1101,20 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 		 * recovery initramfs in the boot partition.
 		 */
 #ifdef CONFIG_ANDROID_AB
-		mode_cmdline = "skip_initramfs";
+		/*  In A/B, the recovery image is built as boot.img, containing the
+		* recovery's ramdisk. Previously, bootloader used the skip_initramfs
+		* kernel command line parameter to decide which mode to boot into.
+		* For Android >=10 and with dynamic partition support, the bootloader
+		* MUST NOT pass skip_initramfs to the kernel command-line.
+		* Instead, bootloader should pass androidboot.force_normal_boot=1
+		* and then Android's first-stage init in ramdisk
+		* will skip recovery and boot normal Android.
+		*/
+		if (is_support_dynamic_partition(dev_desc)) {
+			mode_cmdline = "androidboot.force_normal_boot=1";
+		} else {
+			mode_cmdline = "skip_initramfs";
+		}
 #endif
 		break;
 	case ANDROID_BOOT_MODE_RECOVERY:

commit ad65dd86b6568a71527169c7d468f589059c6fdb
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue Nov 12 10:53:56 2019 +0800

    mtd: spinand: support GD5F2GQ4UExxG
    
    Change-Id: If7b0c17129b9a914fc6854959cf074b33b876a5e
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/gigadevice.c b/drivers/mtd/nand/spi/gigadevice.c
index f2242ec1ec..b273b49ae3 100644
--- a/drivers/mtd/nand/spi/gigadevice.c
+++ b/drivers/mtd/nand/spi/gigadevice.c
@@ -13,8 +13,8 @@
 #include <linux/mtd/spinand.h>
 
 #define SPINAND_MFR_GIGADEVICE			0xC8
-#define GD5FXGQ4XA_STATUS_ECC_1_7_BITFLIPS	(1 << 4)
-#define GD5FXGQ4XA_STATUS_ECC_8_BITFLIPS	(3 << 4)
+#define GD5FXGQ4XA_STATUS_ECC_BELOW_BITFLIPS	(1 << 4)
+#define GD5FXGQ4XA_STATUS_ECC_MAX_BITFLIPS	(3 << 4)
 
 #define GD5FXGQ4XEXXG_REG_STATUS2		0xf0
 
@@ -59,7 +59,7 @@ static int gd5fxgq4xexxg_ooblayout_free(struct mtd_info *mtd, int section,
 	return 0;
 }
 
-static int gd5fxgq4xexxg_ecc_get_status(struct spinand_device *spinand,
+static int gd5f1gq4xexxg_ecc_get_status(struct spinand_device *spinand,
 					u8 status)
 {
 	u8 status2;
@@ -71,7 +71,7 @@ static int gd5fxgq4xexxg_ecc_get_status(struct spinand_device *spinand,
 	case STATUS_ECC_NO_BITFLIPS:
 		return 0;
 
-	case GD5FXGQ4XA_STATUS_ECC_1_7_BITFLIPS:
+	case GD5FXGQ4XA_STATUS_ECC_BELOW_BITFLIPS:
 		/*
 		 * Read status2 register to determine a more fine grained
 		 * bit error status
@@ -88,7 +88,7 @@ static int gd5fxgq4xexxg_ecc_get_status(struct spinand_device *spinand,
 		return ((status & STATUS_ECC_MASK) >> 2) |
 			((status2 & STATUS_ECC_MASK) >> 4);
 
-	case GD5FXGQ4XA_STATUS_ECC_8_BITFLIPS:
+	case GD5FXGQ4XA_STATUS_ECC_MAX_BITFLIPS:
 		return 8;
 
 	case STATUS_ECC_UNCOR_ERROR:
@@ -101,6 +101,48 @@ static int gd5fxgq4xexxg_ecc_get_status(struct spinand_device *spinand,
 	return -EINVAL;
 }
 
+static int gd5f2gq4xexxg_ecc_get_status(struct spinand_device *spinand,
+					u8 status)
+{
+	u8 status2;
+	struct spi_mem_op op = SPINAND_GET_FEATURE_OP(GD5FXGQ4XEXXG_REG_STATUS2,
+						      &status2);
+	int ret;
+
+	switch (status & STATUS_ECC_MASK) {
+	case STATUS_ECC_NO_BITFLIPS:
+		return 0;
+
+	case GD5FXGQ4XA_STATUS_ECC_BELOW_BITFLIPS:
+		/*
+		 * Read status2 register to determine a more fine grained
+		 * bit error status
+		 */
+		ret = spi_mem_exec_op(spinand->slave, &op);
+		if (ret)
+			return ret;
+
+		/*
+		 * 4 ... 7 bits are flipped (1..4 can't be detected, so
+		 * report the maximum of 4 in this case
+		 */
+		/* bits sorted this way (3...0): ECCS1,ECCS0,ECCSE1,ECCSE0 */
+		return (((status & STATUS_ECC_MASK) >> 2) |
+			((status2 & STATUS_ECC_MASK) >> 4)) - 3;
+
+	case GD5FXGQ4XA_STATUS_ECC_MAX_BITFLIPS:
+		return -EBADMSG;
+
+	case STATUS_ECC_UNCOR_ERROR:
+		return -EBADMSG;
+
+	default:
+		break;
+	}
+
+	return -EINVAL;
+}
+
 static const struct mtd_ooblayout_ops gd5fxgq4xexxg_ooblayout = {
 	.ecc = gd5fxgq4xexxg_ooblayout_ecc,
 	.free = gd5fxgq4xexxg_ooblayout_free,
@@ -115,7 +157,16 @@ static const struct spinand_info gigadevice_spinand_table[] = {
 					      &update_cache_variants),
 		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&gd5fxgq4xexxg_ooblayout,
-				     gd5fxgq4xexxg_ecc_get_status)),
+				     gd5f1gq4xexxg_ecc_get_status)),
+	SPINAND_INFO("GD5F2GQ4UExxG", 0x52,
+		     NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
+		     NAND_ECCREQ(4, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&gd5fxgq4xexxg_ooblayout,
+				     gd5f2gq4xexxg_ecc_get_status)),
 };
 
 static int gigadevice_spinand_detect(struct spinand_device *spinand)

commit a05d66844581f3a7458f83fee6be7b19dd5627d3
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Wed Nov 13 15:52:20 2019 +0800

    rockchip: rv1108: reduce u-boot.bin size below 512KB
    
    According to rkcommon.h, when back to bootrom from ddr
    initializing, the next payload size is defined RK_MAX_BOOT_SIZE,
    which is 512KB.
    
    So we disable some cmd module here.
    
    Current u-boot-dtb.bin is 508KB.
    
    Change-Id: I1ff97907c19fd33f428627a6de66ec790514599a
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig
index c605c33a13..0266903fe5 100644
--- a/configs/evb-rv1108_defconfig
+++ b/configs/evb-rv1108_defconfig
@@ -18,23 +18,30 @@ CONFIG_DEBUG_UART=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y
-CONFIG_PANIC_HANG=y
 CONFIG_TPL_TINY_FRAMEWORK=y
 CONFIG_TPL_SERIAL_SUPPORT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x62000000
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=1
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_DM is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
 CONFIG_RANDOM_UUID=y
 CONFIG_CMD_BOOT_ANDROID=y
-CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_NFS is not set
 CONFIG_CMD_CACHE=y
-CONFIG_CMD_TIME=y
+# CONFIG_CMD_MISC is not set
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_TPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
@@ -96,5 +103,7 @@ CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_PANIC_HANG=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
+# CONFIG_EFI_LOADER is not set

commit df7b19b0b16f95232d2b30c750a5aabe5bb927e5
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Wed Nov 13 14:31:46 2019 +0800

    rockchip: dts: rv1108-evb: enable sdmmc
    
    Add sd card support, tested on rv1108 evb v11.
    
    Change-Id: I61e25c78c23c4f774a314b9489f81dab1d990531
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/dts/rv1108-evb.dts b/arch/arm/dts/rv1108-evb.dts
index db5aebb6d5..ac5370cdac 100644
--- a/arch/arm/dts/rv1108-evb.dts
+++ b/arch/arm/dts/rv1108-evb.dts
@@ -208,6 +208,17 @@
 	status = "okay";
 };
 
+&sdmmc {
+	bus-width = <4>;
+	cap-mmc-highspeed;
+	cap-sd-highspeed;
+	disable-wp;
+	max-frequency = <150000000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
+	status = "okay";
+};
+
 &sfc {
 	compatible = "rockchip,rksfc";
 	status = "okay";

commit 2bfd4c143b683c36c734277411f16cb7ceb9e27b
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Wed Nov 13 11:44:13 2019 +0800

    rockchip: dts: rv1108: increase sdmmc drive strength to 8ma
    
    sync from linux kernel develop-3.10:
    "ARM: dts: rk1108: increase sdmmc's drive strength to 8ma"
    (sha1: 90ac5cb61aabf2e344c10b4c55954d6a3f41bd55)
    
    Change-Id: Ifd38ced2b0a9cada25e9348f455454c9edbc7bd8
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/dts/rv1108.dtsi b/arch/arm/dts/rv1108.dtsi
index 1c1649b3a4..96e27099a3 100644
--- a/arch/arm/dts/rv1108.dtsi
+++ b/arch/arm/dts/rv1108.dtsi
@@ -600,26 +600,26 @@
 
 		sdmmc {
 			sdmmc_clk: sdmmc-clk {
-				rockchip,pins = <3 RK_PC4 RK_FUNC_1 &pcfg_pull_none_drv_4ma>;
+				rockchip,pins = <3 RK_PC4 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
 			};
 
 			sdmmc_cmd: sdmmc-cmd {
-				rockchip,pins = <3 RK_PC5 RK_FUNC_1 &pcfg_pull_up_drv_4ma>;
+				rockchip,pins = <3 RK_PC5 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
 			};
 
 			sdmmc_cd: sdmmc-cd {
-				rockchip,pins = <0 RK_PA1 RK_FUNC_1 &pcfg_pull_up_drv_4ma>;
+				rockchip,pins = <0 RK_PA1 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
 			};
 
 			sdmmc_bus1: sdmmc-bus1 {
-				rockchip,pins = <3 RK_PC3 RK_FUNC_1 &pcfg_pull_up_drv_4ma>;
+				rockchip,pins = <3 RK_PC3 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
 			};
 
 			sdmmc_bus4: sdmmc-bus4 {
-				rockchip,pins = <3 RK_PC3 RK_FUNC_1 &pcfg_pull_up_drv_4ma>,
-						<3 RK_PC2 RK_FUNC_1 &pcfg_pull_up_drv_4ma>,
-						<3 RK_PC1 RK_FUNC_1 &pcfg_pull_up_drv_4ma>,
-						<3 RK_PC0 RK_FUNC_1 &pcfg_pull_up_drv_4ma>;
+				rockchip,pins = <3 RK_PC3 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
+						<3 RK_PC2 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
+						<3 RK_PC1 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
+						<3 RK_PC0 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
 			};
 		};
 

commit a84f21ebb8081749eedcfa68d5225d4619d6d9ac
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Nov 12 19:45:07 2019 +0800

    rockchip: add misc BCB message offset compatibility
    
    Rockchip platforms defines BCB message at the 16KB offset of
    misc partition while the Google defines it at 0x0 offset.
    
    From Android-Q, the 0x0 offset is mandary on Google VTS, so this
    patch is a compatibility according to android image 'os_version'.
    
    Android os version >= 10 is at 0x0 offset, otherwise at 16KB offset.
    
    Change-Id: I54a7674e2dc2e0c29fc624f17b4453663c9ea462
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 3acc074155..be8312e6c9 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -258,15 +258,14 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 	if (!hdr)
 		return -ENOMEM;
 
+	/*
+	 * Anyway, we must read android hdr firstly from boot partition to get
+	 * the 'os_version' for android_bcb_msg_sector_offset() to confirm BCB
+	 * message offset of misc partition.
+	 */
 #ifdef CONFIG_ANDROID_BOOT_IMAGE
 	struct andr_img_hdr *andr_hdr;
 
-	/* Get boot mode from misc */
-#ifndef CONFIG_ANDROID_AB
-	if (rockchip_get_boot_mode() == BOOT_MODE_RECOVERY)
-		boot_partname = PART_RECOVERY;
-#endif
-
 	ret = part_get_info_by_name(dev_desc, boot_partname, &part_info);
 	if (ret < 0) {
 		printf("%s: failed to get %s part, ret=%d\n",
@@ -274,7 +273,6 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 		goto parse_resource_part;
 	}
 
-	/* Try to find resource from android second position */
 	andr_hdr = (void *)hdr;
 	ret = blk_dread(dev_desc, part_info.start, cnt, andr_hdr);
 	if (ret != cnt) {
@@ -289,14 +287,40 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 		u32 os_ver = andr_hdr->os_version >> 11;
 		u32 os_lvl = andr_hdr->os_version & ((1U << 11) - 1);
 
-#ifdef DEBUG
-		android_print_contents(andr_hdr);
-#endif
-		if (os_ver)
+		if (os_ver) {
+			gd->bd->bi_andr_version = andr_hdr->os_version;
 			printf("Android %u.%u, Build %u.%u\n",
 			       (os_ver >> 14) & 0x7F, (os_ver >> 7) & 0x7F,
 			       (os_lvl >> 4) + 2000, os_lvl & 0x0F);
+		}
+	}
+
+	/* Get boot mode from misc and read if recovery mode */
+#ifndef CONFIG_ANDROID_AB
+	if (rockchip_get_boot_mode() == BOOT_MODE_RECOVERY) {
+		boot_partname = PART_RECOVERY;
 
+		ret = part_get_info_by_name(dev_desc, boot_partname, &part_info);
+		if (ret < 0) {
+			printf("%s: failed to get %s part, ret=%d\n",
+			       __func__, boot_partname, ret);
+			goto parse_resource_part;
+		}
+
+		/* Try to find resource from android second position */
+		andr_hdr = (void *)hdr;
+		ret = blk_dread(dev_desc, part_info.start, cnt, andr_hdr);
+		if (ret != cnt) {
+			printf("%s: failed to read %s hdr, ret=%d\n",
+			       __func__, part_info.name, ret);
+			ret = -EIO;
+			goto out;
+		}
+	}
+#endif
+
+	ret = android_image_check_header(andr_hdr);
+	if (!ret) {
 		rsce_base = part_info.start * dev_desc->blksz;
 		rsce_base += andr_hdr->page_size;
 		rsce_base += ALIGN(andr_hdr->kernel_size, andr_hdr->page_size);
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 8da8f80fab..244e921051 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -42,8 +42,6 @@ DECLARE_GLOBAL_DATA_PTR;
 #define ANDROID_VERIFY_STATE "androidboot.verifiedbootstate="
 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
 #define ANDROID_ARG_FDT_FILENAME "rk-kernel.dtb"
-#define BOOTLOADER_MESSAGE_OFFSET_IN_MISC	(16 * 1024)
-#define BOOTLOADER_MESSAGE_BLK_OFFSET	(BOOTLOADER_MESSAGE_OFFSET_IN_MISC >> 9)
 #else
 #define ANDROID_ARG_FDT_FILENAME "kernel.dtb"
 #endif
@@ -185,12 +183,8 @@ int android_bootloader_message_load(
 		return -1;
 	}
 
-#ifdef CONFIG_RKIMG_BOOTLOADER
-	if (blk_dread(dev_desc, part_info->start + BOOTLOADER_MESSAGE_BLK_OFFSET,
+	if (blk_dread(dev_desc, part_info->start + android_bcb_msg_sector_offset(),
 	     message_blocks, message) !=
-#else
-	if (blk_dread(dev_desc, part_info->start, message_blocks, message) !=
-#endif
 	    message_blocks) {
 		printf("Could not read from misc partition\n");
 		return -1;
@@ -204,13 +198,9 @@ static int android_bootloader_message_write(
 	const disk_partition_t *part_info,
 	struct android_bootloader_message *message)
 {
-#ifdef CONFIG_RKIMG_BOOTLOADER
 	ulong message_blocks = sizeof(struct android_bootloader_message) /
-	    part_info->blksz + BOOTLOADER_MESSAGE_BLK_OFFSET;
-#else
-	ulong message_blocks = sizeof(struct android_bootloader_message) /
-	    part_info->blksz;
-#endif
+	    part_info->blksz + android_bcb_msg_sector_offset();
+
 	if (message_blocks > part_info->size) {
 		printf("misc partition too small.\n");
 		return -1;
diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 76bb6b0db6..4d5761aed0 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -9,6 +9,9 @@
 #include <bootm.h>
 #include <boot_rkimg.h>
 #include <console.h>
+#ifdef CONFIG_ANDROID_BOOT_IMAGE
+#include <image.h>
+#endif
 #include <malloc.h>
 #include <mmc.h>
 #include <part.h>
@@ -306,6 +309,11 @@ static void rkloader_set_bootloader_msg(struct bootloader_message *bmsg)
 	struct blk_desc *dev_desc;
 	disk_partition_t part_info;
 	int ret, cnt;
+#ifdef CONFIG_ANDROID_BOOT_IMAGE
+	u32 bcb_offset = android_bcb_msg_sector_offset();
+#else
+	u32 bcb_offset = BOOTLOADER_MESSAGE_BLK_OFFSET;
+#endif
 
 	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {
@@ -321,7 +329,7 @@ static void rkloader_set_bootloader_msg(struct bootloader_message *bmsg)
 
 	cnt = DIV_ROUND_UP(sizeof(struct bootloader_message), dev_desc->blksz);
 	ret = blk_dwrite(dev_desc,
-			 part_info.start + BOOTLOADER_MESSAGE_BLK_OFFSET,
+			 part_info.start + bcb_offset,
 			 cnt, bmsg);
 	if (ret != cnt)
 		printf("%s: Wipe data failed\n", __func__);
@@ -390,6 +398,11 @@ int rockchip_get_boot_mode(void)
 	char *env_reboot_mode;
 	int clear_boot_reg = 0;
 	int ret, cnt;
+#ifdef CONFIG_ANDROID_BOOT_IMAGE
+	u32 bcb_offset = android_bcb_msg_sector_offset();
+#else
+	u32 bcb_offset = BOOTLOADER_MESSAGE_BLK_OFFSET;
+#endif
 
 	/*
 	 * Here, we mainly check for:
@@ -428,7 +441,7 @@ int rockchip_get_boot_mode(void)
 	cnt = DIV_ROUND_UP(sizeof(struct bootloader_message), dev_desc->blksz);
 	bmsg = memalign(ARCH_DMA_MINALIGN, cnt * dev_desc->blksz);
 	ret = blk_dread(dev_desc,
-			part_info.start + BOOTLOADER_MESSAGE_BLK_OFFSET,
+			part_info.start + bcb_offset,
 			cnt, bmsg);
 	if (ret != cnt) {
 		free(bmsg);

commit c092b1390df0b197fd4f50af0236505099b5c2bd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Nov 12 19:44:10 2019 +0800

    common: image: provide BCB offset according to android os version
    
    Rockchip platforms defines BCB message at the 16KB offset of
    misc partition while the Google defines it at 0x0 offset.
    
    From Android-Q, the 0x0 offset is mandary on Google VTS.
    
    Change-Id: Iac36d421ed605684353c30bfe0e9982bdd5de065
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/image-android.c b/common/image-android.c
index b6b8062777..d13a47528b 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -29,6 +29,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #define ANDROID_IMAGE_DEFAULT_KERNEL_ADDR	0x10008000
 #define ANDROID_ARG_FDT_FILENAME "rk-kernel.dtb"
+#define ANDROID_Q_VER				10
 
 /* Defined by rockchip legacy mkboot tool(SDK version < 8.1) */
 #define ANDROID_ROCKCHIP_LEGACY_PAGE_SIZE	0x4000
@@ -36,6 +37,28 @@ DECLARE_GLOBAL_DATA_PTR;
 static char andr_tmp_str[ANDR_BOOT_ARGS_SIZE + 1];
 static u32 android_kernel_comp_type = IH_COMP_NONE;
 
+u32 android_image_major_version(void)
+{
+	/* MSB 7-bits */
+	return gd->bd->bi_andr_version >> 25;
+}
+
+u32 android_bcb_msg_sector_offset(void)
+{
+	/*
+	 * Rockchip platforms defines BCB message at the 16KB offset of
+	 * misc partition while the Google defines it at 0x0 offset.
+	 *
+	 * From Android-Q, the 0x0 offset is mandary on Google VTS, so that
+	 * this is a compatibility according to android image 'os_version'.
+	 */
+#ifdef CONFIG_RKIMG_BOOTLOADER
+	return (android_image_major_version() >= ANDROID_Q_VER) ? 0x0 : 0x20;
+#else
+	return 0x0;
+#endif
+}
+
 static ulong android_image_get_kernel_addr(const struct andr_img_hdr *hdr)
 {
 	/*
diff --git a/include/asm-generic/u-boot.h b/include/asm-generic/u-boot.h
index f734d53eec..bb2fc0fe95 100644
--- a/include/asm-generic/u-boot.h
+++ b/include/asm-generic/u-boot.h
@@ -86,6 +86,9 @@ typedef struct bd_info {
 
 	ulong	        bi_arch_number;	/* unique id for this board */
 	ulong	        bi_boot_params;	/* where this board expects params */
+
+	/* same as android image header 'os_version' */
+	unsigned int	bi_andr_version;
 #ifdef CONFIG_NR_DRAM_BANKS
 	struct {			/* RAM configuration */
 		phys_addr_t start;
diff --git a/include/image.h b/include/image.h
index 0afb2ae2cc..7ef8f8166b 100644
--- a/include/image.h
+++ b/include/image.h
@@ -1262,6 +1262,8 @@ static inline int fit_image_check_target_arch(const void *fdt, int node)
 
 #if defined(CONFIG_ANDROID_BOOT_IMAGE)
 struct andr_img_hdr;
+u32 android_bcb_msg_sector_offset(void);
+u32 android_image_major_version(void);
 int android_image_check_header(const struct andr_img_hdr *hdr);
 int android_image_get_kernel(const struct andr_img_hdr *hdr, int verify,
 			     ulong *os_data, ulong *os_len);

commit f501ba4438ec90b7319385e025cf3942e95227a6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 29 21:10:52 2019 +0800

    cmd: boot: add mode args for "reset"
    
    - Add "reboot" command as alias of "reset";
    - Support command like: reboot loader/bootloader/recovery, etc.
    
    Change-Id: I9748664aeca052a775a3f88f7fdf9b3923941026
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/cmd/boot.c b/cmd/boot.c
index 5790255a3a..1710b3aa89 100644
--- a/cmd/boot.c
+++ b/cmd/boot.c
@@ -73,11 +73,17 @@ U_BOOT_CMD(
 #endif
 
 U_BOOT_CMD(
-        reset, 1, 0,    do_reset,
+        reset, 2, 0,    do_reset,
         "Perform RESET of the CPU",
         ""
 );
 
+U_BOOT_CMD(
+        reboot, 2, 0,    do_reset,
+        "Perform RESET of the CPU, alias of 'reset'",
+        ""
+);
+
 #ifdef CONFIG_CMD_POWEROFF
 U_BOOT_CMD(
 	poweroff, 1, 0,	do_poweroff,

commit bcb84b5d6424fc573751f4ae218961e50001bf2b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 29 21:19:25 2019 +0800

    dm: sysreset: support mode args for reboot/reset command
    
    Support command like: reboot loader/bootloader/recovery, etc.
    It depends on the node whose compatible is "syscon-reboot-mode".
    
    Change-Id: I3ef497c6a4355a0d8be9a277bd77bbee43df57fb
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
index 76fcd3165a..2b66ed12fb 100644
--- a/drivers/sysreset/Makefile
+++ b/drivers/sysreset/Makefile
@@ -5,9 +5,15 @@
 #
 
 obj-$(CONFIG_$(SPL_TPL_)SYSRESET) += sysreset-uclass.o
+
+ifndef CONFIG_SPL_BUILD
+obj-$(CONFIG_SYSRESET) += sysreset-syscon-reboot.o
+endif
+
 ifndef CONFIG_TPL_BUILD
 obj-$(CONFIG_SYSRESET_PSCI) += sysreset_psci.o
 endif
+
 obj-$(CONFIG_SYSRESET_SYSCON) += sysreset_syscon.o
 obj-$(CONFIG_SYSRESET_WATCHDOG) += sysreset_watchdog.o
 
@@ -16,6 +22,7 @@ obj-$(CONFIG_ARCH_SNAPDRAGON) += sysreset_snapdragon.o
 obj-$(CONFIG_ARCH_STI) += sysreset_sti.o
 obj-$(CONFIG_TARGET_XTFPGA) += sysreset_xtfpga.o
 obj-$(CONFIG_ARCH_ASPEED) += sysreset_ast.o
+
 ifndef CONFIG_TPL_BUILD
 obj-$(CONFIG_ARCH_ROCKCHIP) += sysreset_rockchip.o
 endif
diff --git a/drivers/sysreset/sysreset-syscon-reboot.c b/drivers/sysreset/sysreset-syscon-reboot.c
new file mode 100644
index 0000000000..163d5e4ebd
--- /dev/null
+++ b/drivers/sysreset/sysreset-syscon-reboot.c
@@ -0,0 +1,73 @@
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <sysreset.h>
+#include <linux/io.h>
+#include <asm/arch/boot_mode.h>
+
+#define CMD_PREFIX	"mode-"
+
+struct command {
+	const char *name;
+	u32 magic;
+};
+
+static const struct command static_defined_command[] = {
+	{ .name = "bootrom", .magic = BOOT_BROM_DOWNLOAD, }
+};
+
+static int syscon_reboot_request_by_mode(struct udevice *dev, const char *mode)
+{
+	const char *prefix = CMD_PREFIX;
+	char *command;
+	u32 magic;
+	int i;
+
+	if (!mode)
+		return 0;
+
+	command = calloc(1, strlen(mode) + sizeof(prefix));
+	if (!command)
+		return -ENOMEM;
+
+	strcat(command, prefix);
+	strcat(command, mode);
+
+	magic = dev_read_u32_default(dev, command, BOOT_NORMAL);
+	if (magic == BOOT_NORMAL) {
+		for (i = 0; i < ARRAY_SIZE(static_defined_command); i++) {
+			if (!strcmp(static_defined_command[i].name, mode)) {
+				magic = static_defined_command[i].magic;
+				break;
+			}
+		}
+	}
+
+	printf("## Reboot mode: %s(%x)\n\n", mode, magic);
+
+	writel(magic, CONFIG_ROCKCHIP_BOOT_MODE_REG);
+	free(command);
+
+	return 0;
+}
+
+static const struct sysreset_ops syscon_reboot_ops = {
+	.request_by_mode = syscon_reboot_request_by_mode,
+};
+
+static const struct udevice_id syscon_reboot_match[] = {
+	{ .compatible = "syscon-reboot-mode", },
+	{},
+};
+
+U_BOOT_DRIVER(sysreset_syscon_reboot) = {
+	.name = "sysreset_syscon_reboot",
+	.id = UCLASS_SYSRESET,
+	.of_match = syscon_reboot_match,
+	.ops = &syscon_reboot_ops,
+};
diff --git a/drivers/sysreset/sysreset-uclass.c b/drivers/sysreset/sysreset-uclass.c
index 489f80fd48..43d433ead5 100644
--- a/drivers/sysreset/sysreset-uclass.c
+++ b/drivers/sysreset/sysreset-uclass.c
@@ -81,10 +81,36 @@ void reset_cpu(ulong addr)
 	sysreset_walk_halt(SYSRESET_WARM);
 }
 
+void reboot(const char *mode)
+{
+#ifndef CONFIG_SPL_BUILD
+	struct sysreset_ops *ops;
+	struct udevice *dev;
+	int ret;
+
+	if (!mode)
+		goto finish;
+
+	ret = uclass_get_device_by_driver(UCLASS_SYSRESET,
+					  DM_GET_DRIVER(sysreset_syscon_reboot),
+					  &dev);
+	if (!ret) {
+		ops = sysreset_get_ops(dev);
+		if (ops && ops->request_by_mode)
+			ops->request_by_mode(dev, mode);
+	}
+finish:
+#endif
+	flushc();
+	sysreset_walk_halt(SYSRESET_COLD);
+}
 
 int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
-	sysreset_walk_halt(SYSRESET_COLD);
+	if (argc > 1)
+		reboot(argv[1]);
+	else
+		reboot(NULL);
 
 	return 0;
 }
diff --git a/include/sysreset.h b/include/sysreset.h
index 393c7be3d8..d8d10c5570 100644
--- a/include/sysreset.h
+++ b/include/sysreset.h
@@ -29,6 +29,19 @@ struct sysreset_ops {
 	 *		(in which case this method will not actually return)
 	 */
 	int (*request)(struct udevice *dev, enum sysreset_t type);
+
+	/**
+	 * request_by_mode() - request a sysreset of the given mode
+	 *
+	 * Note that this function may return before the reset takes effect.
+	 *
+	 * @mode:	mode to request
+	 * @return -EINPROGRESS if the reset has been started and
+	 *		will complete soon, -EPROTONOSUPPORT if not supported
+	 *		by this device, 0 if the reset has already happened
+	 *		(in which case this method will not actually return)
+	 */
+	int (*request_by_mode)(struct udevice *dev, const char *mode);
 };
 
 #define sysreset_get_ops(dev)        ((struct sysreset_ops *)(dev)->driver->ops)
@@ -68,4 +81,11 @@ void sysreset_walk_halt(enum sysreset_t type);
  */
 void reset_cpu(ulong addr);
 
+/**
+ * reboot() - calls sysreset_walk(SYSRESET_WARM)
+ *
+ * Support the command like: reboot loader/bootloader/recovery, etc.
+ */
+void reboot(const char *mode);
+
 #endif

commit 467d16db4b9af3b408da34ab3df7febe3bd75929
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 11 18:29:50 2019 +0800

    tools: rockchip: resource_tool: independent on other files
    
    Merge all codes into resource_tool.c
    
    Sync from kernel-4.4:
    (0787850 rk: scripts/resource_tool: add sha1 for file entry)
    
    Change-Id: Iff379458086f1623e7e5126dcb532b178d94c684
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/tools/Makefile b/tools/Makefile
index d1548e9048..1482a9f22b 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -67,7 +67,7 @@ hostprogs-y += resource_tool
 boot_merger-objs := rockchip/boot_merger.o rockchip/sha2.o lib/sha256.o
 trust_merger-objs := rockchip/trust_merger.o rockchip/sha2.o lib/sha256.o
 loaderimage-objs := rockchip/loaderimage.o rockchip/sha.o lib/sha256.o rockchip/crc32_rk.o
-resource_tool-objs := rockchip/resource_tool.o lib/sha1.o lib/sha256.o
+resource_tool-objs := rockchip/resource_tool.o
 endif
 
 FIT_SIG_OBJS-$(CONFIG_FIT_SIGNATURE) := common/image-sig.o
diff --git a/tools/rockchip/resource_tool.c b/tools/rockchip/resource_tool.c
index b2d20bc350..c28d406887 100644
--- a/tools/rockchip/resource_tool.c
+++ b/tools/rockchip/resource_tool.c
@@ -11,8 +11,553 @@
 #include <stdbool.h>
 #include <sys/stat.h>
 #include <time.h>
-#include <u-boot/sha1.h>
-#include <u-boot/sha256.h>
+
+/**
+ * \brief	   SHA-1 context structure
+ */
+typedef struct
+{
+    unsigned long total[2];	/*!< number of bytes processed	*/
+    unsigned long state[5];	/*!< intermediate digest state	*/
+    unsigned char buffer[64];	/*!< data block being processed */
+}
+sha1_context;
+
+/*
+ * 32-bit integer manipulation macros (big endian)
+ */
+#ifndef GET_UINT32_BE
+#define GET_UINT32_BE(n,b,i) {				\
+	(n) = ( (unsigned long) (b)[(i)    ] << 24 )	\
+	    | ( (unsigned long) (b)[(i) + 1] << 16 )	\
+	    | ( (unsigned long) (b)[(i) + 2] <<  8 )	\
+	    | ( (unsigned long) (b)[(i) + 3]       );	\
+}
+#endif
+#ifndef PUT_UINT32_BE
+#define PUT_UINT32_BE(n,b,i) {				\
+	(b)[(i)    ] = (unsigned char) ( (n) >> 24 );	\
+	(b)[(i) + 1] = (unsigned char) ( (n) >> 16 );	\
+	(b)[(i) + 2] = (unsigned char) ( (n) >>  8 );	\
+	(b)[(i) + 3] = (unsigned char) ( (n)       );	\
+}
+#endif
+
+/*
+ * SHA-1 context setup
+ */
+static
+void sha1_starts (sha1_context * ctx)
+{
+	ctx->total[0] = 0;
+	ctx->total[1] = 0;
+
+	ctx->state[0] = 0x67452301;
+	ctx->state[1] = 0xEFCDAB89;
+	ctx->state[2] = 0x98BADCFE;
+	ctx->state[3] = 0x10325476;
+	ctx->state[4] = 0xC3D2E1F0;
+}
+
+static void sha1_process(sha1_context *ctx, const unsigned char data[64])
+{
+	unsigned long temp, W[16], A, B, C, D, E;
+
+	GET_UINT32_BE (W[0], data, 0);
+	GET_UINT32_BE (W[1], data, 4);
+	GET_UINT32_BE (W[2], data, 8);
+	GET_UINT32_BE (W[3], data, 12);
+	GET_UINT32_BE (W[4], data, 16);
+	GET_UINT32_BE (W[5], data, 20);
+	GET_UINT32_BE (W[6], data, 24);
+	GET_UINT32_BE (W[7], data, 28);
+	GET_UINT32_BE (W[8], data, 32);
+	GET_UINT32_BE (W[9], data, 36);
+	GET_UINT32_BE (W[10], data, 40);
+	GET_UINT32_BE (W[11], data, 44);
+	GET_UINT32_BE (W[12], data, 48);
+	GET_UINT32_BE (W[13], data, 52);
+	GET_UINT32_BE (W[14], data, 56);
+	GET_UINT32_BE (W[15], data, 60);
+
+#define S(x,n)	((x << n) | ((x & 0xFFFFFFFF) >> (32 - n)))
+
+#define R(t) (						\
+	temp = W[(t -  3) & 0x0F] ^ W[(t - 8) & 0x0F] ^	\
+	       W[(t - 14) & 0x0F] ^ W[ t      & 0x0F],	\
+	( W[t & 0x0F] = S(temp,1) )			\
+)
+
+#define P(a,b,c,d,e,x)	{				\
+	e += S(a,5) + F(b,c,d) + K + x; b = S(b,30);	\
+}
+
+	A = ctx->state[0];
+	B = ctx->state[1];
+	C = ctx->state[2];
+	D = ctx->state[3];
+	E = ctx->state[4];
+
+#define F(x,y,z) (z ^ (x & (y ^ z)))
+#define K 0x5A827999
+
+	P (A, B, C, D, E, W[0]);
+	P (E, A, B, C, D, W[1]);
+	P (D, E, A, B, C, W[2]);
+	P (C, D, E, A, B, W[3]);
+	P (B, C, D, E, A, W[4]);
+	P (A, B, C, D, E, W[5]);
+	P (E, A, B, C, D, W[6]);
+	P (D, E, A, B, C, W[7]);
+	P (C, D, E, A, B, W[8]);
+	P (B, C, D, E, A, W[9]);
+	P (A, B, C, D, E, W[10]);
+	P (E, A, B, C, D, W[11]);
+	P (D, E, A, B, C, W[12]);
+	P (C, D, E, A, B, W[13]);
+	P (B, C, D, E, A, W[14]);
+	P (A, B, C, D, E, W[15]);
+	P (E, A, B, C, D, R (16));
+	P (D, E, A, B, C, R (17));
+	P (C, D, E, A, B, R (18));
+	P (B, C, D, E, A, R (19));
+
+#undef K
+#undef F
+
+#define F(x,y,z) (x ^ y ^ z)
+#define K 0x6ED9EBA1
+
+	P (A, B, C, D, E, R (20));
+	P (E, A, B, C, D, R (21));
+	P (D, E, A, B, C, R (22));
+	P (C, D, E, A, B, R (23));
+	P (B, C, D, E, A, R (24));
+	P (A, B, C, D, E, R (25));
+	P (E, A, B, C, D, R (26));
+	P (D, E, A, B, C, R (27));
+	P (C, D, E, A, B, R (28));
+	P (B, C, D, E, A, R (29));
+	P (A, B, C, D, E, R (30));
+	P (E, A, B, C, D, R (31));
+	P (D, E, A, B, C, R (32));
+	P (C, D, E, A, B, R (33));
+	P (B, C, D, E, A, R (34));
+	P (A, B, C, D, E, R (35));
+	P (E, A, B, C, D, R (36));
+	P (D, E, A, B, C, R (37));
+	P (C, D, E, A, B, R (38));
+	P (B, C, D, E, A, R (39));
+
+#undef K
+#undef F
+
+#define F(x,y,z) ((x & y) | (z & (x | y)))
+#define K 0x8F1BBCDC
+
+	P (A, B, C, D, E, R (40));
+	P (E, A, B, C, D, R (41));
+	P (D, E, A, B, C, R (42));
+	P (C, D, E, A, B, R (43));
+	P (B, C, D, E, A, R (44));
+	P (A, B, C, D, E, R (45));
+	P (E, A, B, C, D, R (46));
+	P (D, E, A, B, C, R (47));
+	P (C, D, E, A, B, R (48));
+	P (B, C, D, E, A, R (49));
+	P (A, B, C, D, E, R (50));
+	P (E, A, B, C, D, R (51));
+	P (D, E, A, B, C, R (52));
+	P (C, D, E, A, B, R (53));
+	P (B, C, D, E, A, R (54));
+	P (A, B, C, D, E, R (55));
+	P (E, A, B, C, D, R (56));
+	P (D, E, A, B, C, R (57));
+	P (C, D, E, A, B, R (58));
+	P (B, C, D, E, A, R (59));
+
+#undef K
+#undef F
+
+#define F(x,y,z) (x ^ y ^ z)
+#define K 0xCA62C1D6
+
+	P (A, B, C, D, E, R (60));
+	P (E, A, B, C, D, R (61));
+	P (D, E, A, B, C, R (62));
+	P (C, D, E, A, B, R (63));
+	P (B, C, D, E, A, R (64));
+	P (A, B, C, D, E, R (65));
+	P (E, A, B, C, D, R (66));
+	P (D, E, A, B, C, R (67));
+	P (C, D, E, A, B, R (68));
+	P (B, C, D, E, A, R (69));
+	P (A, B, C, D, E, R (70));
+	P (E, A, B, C, D, R (71));
+	P (D, E, A, B, C, R (72));
+	P (C, D, E, A, B, R (73));
+	P (B, C, D, E, A, R (74));
+	P (A, B, C, D, E, R (75));
+	P (E, A, B, C, D, R (76));
+	P (D, E, A, B, C, R (77));
+	P (C, D, E, A, B, R (78));
+	P (B, C, D, E, A, R (79));
+
+#undef K
+#undef F
+
+	ctx->state[0] += A;
+	ctx->state[1] += B;
+	ctx->state[2] += C;
+	ctx->state[3] += D;
+	ctx->state[4] += E;
+}
+
+#undef P
+#undef R
+#undef S
+
+/*
+ * SHA-1 process buffer
+ */
+static
+void sha1_update(sha1_context *ctx, const unsigned char *input,
+		 unsigned int ilen)
+{
+	int fill;
+	unsigned long left;
+
+	if (ilen <= 0)
+		return;
+
+	left = ctx->total[0] & 0x3F;
+	fill = 64 - left;
+
+	ctx->total[0] += ilen;
+	ctx->total[0] &= 0xFFFFFFFF;
+
+	if (ctx->total[0] < (unsigned long) ilen)
+		ctx->total[1]++;
+
+	if (left && ilen >= fill) {
+		memcpy ((void *) (ctx->buffer + left), (void *) input, fill);
+		sha1_process (ctx, ctx->buffer);
+		input += fill;
+		ilen -= fill;
+		left = 0;
+	}
+
+	while (ilen >= 64) {
+		sha1_process (ctx, input);
+		input += 64;
+		ilen -= 64;
+	}
+
+	if (ilen > 0) {
+		memcpy ((void *) (ctx->buffer + left), (void *) input, ilen);
+	}
+}
+
+static const unsigned char sha1_padding[64] = {
+	0x80, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	   0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	   0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	   0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*
+ * SHA-1 final digest
+ */
+static
+void sha1_finish (sha1_context * ctx, unsigned char output[20])
+{
+	unsigned long last, padn;
+	unsigned long high, low;
+	unsigned char msglen[8];
+
+	high = (ctx->total[0] >> 29)
+		| (ctx->total[1] << 3);
+	low = (ctx->total[0] << 3);
+
+	PUT_UINT32_BE (high, msglen, 0);
+	PUT_UINT32_BE (low, msglen, 4);
+
+	last = ctx->total[0] & 0x3F;
+	padn = (last < 56) ? (56 - last) : (120 - last);
+
+	sha1_update (ctx, (unsigned char *) sha1_padding, padn);
+	sha1_update (ctx, msglen, 8);
+
+	PUT_UINT32_BE (ctx->state[0], output, 0);
+	PUT_UINT32_BE (ctx->state[1], output, 4);
+	PUT_UINT32_BE (ctx->state[2], output, 8);
+	PUT_UINT32_BE (ctx->state[3], output, 12);
+	PUT_UINT32_BE (ctx->state[4], output, 16);
+}
+
+/*
+ * Output = SHA-1( input buffer )
+ */
+static
+void sha1_csum(const unsigned char *input, unsigned int ilen,
+	       unsigned char *output)
+{
+	sha1_context ctx;
+
+	sha1_starts (&ctx);
+	sha1_update (&ctx, input, ilen);
+	sha1_finish (&ctx, output);
+}
+
+typedef struct {
+	uint32_t total[2];
+	uint32_t state[8];
+	uint8_t buffer[64];
+} sha256_context;
+
+static
+void sha256_starts(sha256_context * ctx)
+{
+	ctx->total[0] = 0;
+	ctx->total[1] = 0;
+
+	ctx->state[0] = 0x6A09E667;
+	ctx->state[1] = 0xBB67AE85;
+	ctx->state[2] = 0x3C6EF372;
+	ctx->state[3] = 0xA54FF53A;
+	ctx->state[4] = 0x510E527F;
+	ctx->state[5] = 0x9B05688C;
+	ctx->state[6] = 0x1F83D9AB;
+	ctx->state[7] = 0x5BE0CD19;
+}
+
+static void sha256_process(sha256_context *ctx, const uint8_t data[64])
+{
+	uint32_t temp1, temp2;
+	uint32_t W[64];
+	uint32_t A, B, C, D, E, F, G, H;
+
+	GET_UINT32_BE(W[0], data, 0);
+	GET_UINT32_BE(W[1], data, 4);
+	GET_UINT32_BE(W[2], data, 8);
+	GET_UINT32_BE(W[3], data, 12);
+	GET_UINT32_BE(W[4], data, 16);
+	GET_UINT32_BE(W[5], data, 20);
+	GET_UINT32_BE(W[6], data, 24);
+	GET_UINT32_BE(W[7], data, 28);
+	GET_UINT32_BE(W[8], data, 32);
+	GET_UINT32_BE(W[9], data, 36);
+	GET_UINT32_BE(W[10], data, 40);
+	GET_UINT32_BE(W[11], data, 44);
+	GET_UINT32_BE(W[12], data, 48);
+	GET_UINT32_BE(W[13], data, 52);
+	GET_UINT32_BE(W[14], data, 56);
+	GET_UINT32_BE(W[15], data, 60);
+
+#define SHR(x,n) ((x & 0xFFFFFFFF) >> n)
+#define ROTR(x,n) (SHR(x,n) | (x << (32 - n)))
+
+#define S0(x) (ROTR(x, 7) ^ ROTR(x,18) ^ SHR(x, 3))
+#define S1(x) (ROTR(x,17) ^ ROTR(x,19) ^ SHR(x,10))
+
+#define S2(x) (ROTR(x, 2) ^ ROTR(x,13) ^ ROTR(x,22))
+#define S3(x) (ROTR(x, 6) ^ ROTR(x,11) ^ ROTR(x,25))
+
+#define F0(x,y,z) ((x & y) | (z & (x | y)))
+#define F1(x,y,z) (z ^ (x & (y ^ z)))
+
+#define R(t)					\
+(						\
+	W[t] = S1(W[t - 2]) + W[t - 7] +	\
+		S0(W[t - 15]) + W[t - 16]	\
+)
+
+#define P(a,b,c,d,e,f,g,h,x,K) {		\
+	temp1 = h + S3(e) + F1(e,f,g) + K + x;	\
+	temp2 = S2(a) + F0(a,b,c);		\
+	d += temp1; h = temp1 + temp2;		\
+}
+
+	A = ctx->state[0];
+	B = ctx->state[1];
+	C = ctx->state[2];
+	D = ctx->state[3];
+	E = ctx->state[4];
+	F = ctx->state[5];
+	G = ctx->state[6];
+	H = ctx->state[7];
+
+	P(A, B, C, D, E, F, G, H, W[0], 0x428A2F98);
+	P(H, A, B, C, D, E, F, G, W[1], 0x71374491);
+	P(G, H, A, B, C, D, E, F, W[2], 0xB5C0FBCF);
+	P(F, G, H, A, B, C, D, E, W[3], 0xE9B5DBA5);
+	P(E, F, G, H, A, B, C, D, W[4], 0x3956C25B);
+	P(D, E, F, G, H, A, B, C, W[5], 0x59F111F1);
+	P(C, D, E, F, G, H, A, B, W[6], 0x923F82A4);
+	P(B, C, D, E, F, G, H, A, W[7], 0xAB1C5ED5);
+	P(A, B, C, D, E, F, G, H, W[8], 0xD807AA98);
+	P(H, A, B, C, D, E, F, G, W[9], 0x12835B01);
+	P(G, H, A, B, C, D, E, F, W[10], 0x243185BE);
+	P(F, G, H, A, B, C, D, E, W[11], 0x550C7DC3);
+	P(E, F, G, H, A, B, C, D, W[12], 0x72BE5D74);
+	P(D, E, F, G, H, A, B, C, W[13], 0x80DEB1FE);
+	P(C, D, E, F, G, H, A, B, W[14], 0x9BDC06A7);
+	P(B, C, D, E, F, G, H, A, W[15], 0xC19BF174);
+	P(A, B, C, D, E, F, G, H, R(16), 0xE49B69C1);
+	P(H, A, B, C, D, E, F, G, R(17), 0xEFBE4786);
+	P(G, H, A, B, C, D, E, F, R(18), 0x0FC19DC6);
+	P(F, G, H, A, B, C, D, E, R(19), 0x240CA1CC);
+	P(E, F, G, H, A, B, C, D, R(20), 0x2DE92C6F);
+	P(D, E, F, G, H, A, B, C, R(21), 0x4A7484AA);
+	P(C, D, E, F, G, H, A, B, R(22), 0x5CB0A9DC);
+	P(B, C, D, E, F, G, H, A, R(23), 0x76F988DA);
+	P(A, B, C, D, E, F, G, H, R(24), 0x983E5152);
+	P(H, A, B, C, D, E, F, G, R(25), 0xA831C66D);
+	P(G, H, A, B, C, D, E, F, R(26), 0xB00327C8);
+	P(F, G, H, A, B, C, D, E, R(27), 0xBF597FC7);
+	P(E, F, G, H, A, B, C, D, R(28), 0xC6E00BF3);
+	P(D, E, F, G, H, A, B, C, R(29), 0xD5A79147);
+	P(C, D, E, F, G, H, A, B, R(30), 0x06CA6351);
+	P(B, C, D, E, F, G, H, A, R(31), 0x14292967);
+	P(A, B, C, D, E, F, G, H, R(32), 0x27B70A85);
+	P(H, A, B, C, D, E, F, G, R(33), 0x2E1B2138);
+	P(G, H, A, B, C, D, E, F, R(34), 0x4D2C6DFC);
+	P(F, G, H, A, B, C, D, E, R(35), 0x53380D13);
+	P(E, F, G, H, A, B, C, D, R(36), 0x650A7354);
+	P(D, E, F, G, H, A, B, C, R(37), 0x766A0ABB);
+	P(C, D, E, F, G, H, A, B, R(38), 0x81C2C92E);
+	P(B, C, D, E, F, G, H, A, R(39), 0x92722C85);
+	P(A, B, C, D, E, F, G, H, R(40), 0xA2BFE8A1);
+	P(H, A, B, C, D, E, F, G, R(41), 0xA81A664B);
+	P(G, H, A, B, C, D, E, F, R(42), 0xC24B8B70);
+	P(F, G, H, A, B, C, D, E, R(43), 0xC76C51A3);
+	P(E, F, G, H, A, B, C, D, R(44), 0xD192E819);
+	P(D, E, F, G, H, A, B, C, R(45), 0xD6990624);
+	P(C, D, E, F, G, H, A, B, R(46), 0xF40E3585);
+	P(B, C, D, E, F, G, H, A, R(47), 0x106AA070);
+	P(A, B, C, D, E, F, G, H, R(48), 0x19A4C116);
+	P(H, A, B, C, D, E, F, G, R(49), 0x1E376C08);
+	P(G, H, A, B, C, D, E, F, R(50), 0x2748774C);
+	P(F, G, H, A, B, C, D, E, R(51), 0x34B0BCB5);
+	P(E, F, G, H, A, B, C, D, R(52), 0x391C0CB3);
+	P(D, E, F, G, H, A, B, C, R(53), 0x4ED8AA4A);
+	P(C, D, E, F, G, H, A, B, R(54), 0x5B9CCA4F);
+	P(B, C, D, E, F, G, H, A, R(55), 0x682E6FF3);
+	P(A, B, C, D, E, F, G, H, R(56), 0x748F82EE);
+	P(H, A, B, C, D, E, F, G, R(57), 0x78A5636F);
+	P(G, H, A, B, C, D, E, F, R(58), 0x84C87814);
+	P(F, G, H, A, B, C, D, E, R(59), 0x8CC70208);
+	P(E, F, G, H, A, B, C, D, R(60), 0x90BEFFFA);
+	P(D, E, F, G, H, A, B, C, R(61), 0xA4506CEB);
+	P(C, D, E, F, G, H, A, B, R(62), 0xBEF9A3F7);
+	P(B, C, D, E, F, G, H, A, R(63), 0xC67178F2);
+
+	ctx->state[0] += A;
+	ctx->state[1] += B;
+	ctx->state[2] += C;
+	ctx->state[3] += D;
+	ctx->state[4] += E;
+	ctx->state[5] += F;
+	ctx->state[6] += G;
+	ctx->state[7] += H;
+}
+
+#undef P
+#undef R
+#undef F1
+#undef F0
+#undef S3
+#undef S2
+#undef S1
+#undef S0
+#undef ROTR
+#undef SHR
+
+static
+void sha256_update(sha256_context *ctx, const uint8_t *input, uint32_t length)
+{
+	uint32_t left, fill;
+
+	if (!length)
+		return;
+
+	left = ctx->total[0] & 0x3F;
+	fill = 64 - left;
+
+	ctx->total[0] += length;
+	ctx->total[0] &= 0xFFFFFFFF;
+
+	if (ctx->total[0] < length)
+		ctx->total[1]++;
+
+	if (left && length >= fill) {
+		memcpy((void *) (ctx->buffer + left), (void *) input, fill);
+		sha256_process(ctx, ctx->buffer);
+		length -= fill;
+		input += fill;
+		left = 0;
+	}
+
+	while (length >= 64) {
+		sha256_process(ctx, input);
+		length -= 64;
+		input += 64;
+	}
+
+	if (length)
+		memcpy((void *) (ctx->buffer + left), (void *) input, length);
+}
+
+static uint8_t sha256_padding[64] = {
+	0x80, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	   0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	   0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	   0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+static
+void sha256_finish(sha256_context * ctx, uint8_t digest[32])
+{
+	uint32_t last, padn;
+	uint32_t high, low;
+	uint8_t msglen[8];
+
+	high = ((ctx->total[0] >> 29)
+		| (ctx->total[1] << 3));
+	low = (ctx->total[0] << 3);
+
+	PUT_UINT32_BE(high, msglen, 0);
+	PUT_UINT32_BE(low, msglen, 4);
+
+	last = ctx->total[0] & 0x3F;
+	padn = (last < 56) ? (56 - last) : (120 - last);
+
+	sha256_update(ctx, sha256_padding, padn);
+	sha256_update(ctx, msglen, 8);
+
+	PUT_UINT32_BE(ctx->state[0], digest, 0);
+	PUT_UINT32_BE(ctx->state[1], digest, 4);
+	PUT_UINT32_BE(ctx->state[2], digest, 8);
+	PUT_UINT32_BE(ctx->state[3], digest, 12);
+	PUT_UINT32_BE(ctx->state[4], digest, 16);
+	PUT_UINT32_BE(ctx->state[5], digest, 20);
+	PUT_UINT32_BE(ctx->state[6], digest, 24);
+	PUT_UINT32_BE(ctx->state[7], digest, 28);
+}
+
+/*
+ * Output = SHA-256( input buffer ).
+ */
+static
+void sha256_csum(const unsigned char *input, unsigned int ilen,
+		 unsigned char *output)
+{
+	sha256_context ctx;
+
+	sha256_starts(&ctx);
+	sha256_update(&ctx, input, ilen);
+	sha256_finish(&ctx, output);
+}
 
 /* #define DEBUG */
 

commit 92cdb0ce918a19abd8854f601979ec362ef20572
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Nov 8 10:08:41 2019 +0800

    scripts: repack-bootimg: independent on kernel build args
    
    Use args just like pack command to replace kernel/second/ramdisk/dtb
    as you want:
    
    repack kernel:
        ./scripts/repack-bootimg --boot_img boot.img --kernel zImage -o boot_repack.img
    
    repack second:
        ./scripts/repack-bootimg --boot_img boot.img --second resource.img -o boot_repack.img
    
    Change-Id: I88167049fe645114f1ef2f6a453b12e95456607c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/scripts/repack-bootimg b/scripts/repack-bootimg
index a4f0298c44..aecd5a7ffc 100755
--- a/scripts/repack-bootimg
+++ b/scripts/repack-bootimg
@@ -95,23 +95,23 @@ fi
 srctree=${srctree-"."}
 objtree=${objtree-"."}
 out=${out-"out"}
-if [ "$($srctree/scripts/config --state CONFIG_ARM64)" == "y" ]; then
-	if [ "$compressed_kernel" == "y" ]; then
-		default_kernel=arch/arm64/boot/Image.lz4
-	else
-		default_kernel=arch/arm64/boot/Image
-	fi
-else
-	if [ "$compressed_kernel" == "y" ]; then
-		default_kernel=arch/arm/boot/zImage
-	else
-		default_kernel=arch/arm/boot/Image
-	fi
+
+if [ "$kernel" == "" ]; then
+	kernel=${kernel-$out/kernel}
+fi
+
+if [ "$second" == "" ]; then
+	second=${second-$out/second}
+fi
+
+if [ "$ramdisk" == "" ]; then
+	ramdisk=${ramdisk-$out/ramdisk}
 fi
-kernel=${kernel-$objtree/$default_kernel}
-second=${second-$objtree/resource.img}
-ramdisk=${ramdisk-$out/ramdisk}
-dtb=${dtb-$out/dtb}
+
+if [ "$dtb" == "" ]; then
+	dtb=${dtb-$out/dtb}
+fi
+
 recovery_dtbo=${recovery_dtbo-$out/recovery_dtbo}
 log="$out/unpack.log"
 
@@ -158,3 +158,5 @@ $RECOVERY_DTBO \
 --os_version $os_version \
 --os_patch_level $os_patch_level \
 --output $output
+
+echo -e "\nRepack Image is ready: $output\n"

commit 8a334094eed8b1101b3678f75f102162249c5866
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 7 21:15:01 2019 +0800

    scripts: add mkbootimg and unpack_bootimg
    
    Pack boot.img:
        ./scripts/mkbootimg --kernel zImage --second resource.img --ramdisk ramdisk.img --out boot.img
    
    Unpack boot.img:
        ./scripts/unpack_bootimg --boot_img boot.img --out out/
    
    sync from kernel 4.19:
    (ac97525 drm/rockchip: cdn-dp: Add bus format setting)
    
    Change-Id: I886db6e2ac11d07852c2c9a4cb7c5088dbfa3cd5
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/scripts/mkbootimg b/scripts/mkbootimg
new file mode 100755
index 0000000000..c3e09aba34
--- /dev/null
+++ b/scripts/mkbootimg
@@ -0,0 +1,234 @@
+#!/usr/bin/env python
+# Copyright 2015, The Android Open Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+from __future__ import print_function
+from sys import argv, exit, stderr
+from argparse import ArgumentParser, FileType, Action
+from os import fstat
+from struct import pack
+from hashlib import sha1
+import sys
+import re
+
+def filesize(f):
+    if f is None:
+        return 0
+    try:
+        return fstat(f.fileno()).st_size
+    except OSError:
+        return 0
+
+
+def update_sha(sha, f):
+    if f:
+        sha.update(f.read())
+        f.seek(0)
+        sha.update(pack('I', filesize(f)))
+    else:
+        sha.update(pack('I', 0))
+
+
+def pad_file(f, padding):
+    pad = (padding - (f.tell() & (padding - 1))) & (padding - 1)
+    f.write(pack(str(pad) + 'x'))
+
+
+def get_number_of_pages(image_size, page_size):
+    """calculates the number of pages required for the image"""
+    return (image_size + page_size - 1) / page_size
+
+
+def get_recovery_dtbo_offset(args):
+    """calculates the offset of recovery_dtbo image in the boot image"""
+    num_header_pages = 1 # header occupies a page
+    num_kernel_pages = get_number_of_pages(filesize(args.kernel), args.pagesize)
+    num_ramdisk_pages = get_number_of_pages(filesize(args.ramdisk), args.pagesize)
+    num_second_pages = get_number_of_pages(filesize(args.second), args.pagesize)
+    dtbo_offset = args.pagesize * (num_header_pages + num_kernel_pages +
+                                   num_ramdisk_pages + num_second_pages)
+    return dtbo_offset
+
+
+def write_header(args):
+    BOOT_IMAGE_HEADER_V1_SIZE = 1648
+    BOOT_IMAGE_HEADER_V2_SIZE = 1660
+    BOOT_MAGIC = 'ANDROID!'.encode()
+
+    if (args.header_version > 2):
+        raise ValueError('Boot header version %d not supported' % args.header_version)
+
+    args.output.write(pack('8s', BOOT_MAGIC))
+    final_ramdisk_offset = (args.base + args.ramdisk_offset) if filesize(args.ramdisk) > 0 else 0
+    final_second_offset = (args.base + args.second_offset) if filesize(args.second) > 0 else 0
+    args.output.write(pack('10I',
+        filesize(args.kernel),                          # size in bytes
+        args.base + args.kernel_offset,                 # physical load addr
+        filesize(args.ramdisk),                         # size in bytes
+        final_ramdisk_offset,                           # physical load addr
+        filesize(args.second),                          # size in bytes
+        final_second_offset,                            # physical load addr
+        args.base + args.tags_offset,                   # physical addr for kernel tags
+        args.pagesize,                                  # flash page size we assume
+        args.header_version,                            # version of bootimage header
+        (args.os_version << 11) | args.os_patch_level)) # os version and patch level
+    args.output.write(pack('16s', args.board.encode())) # asciiz product name
+    args.output.write(pack('512s', args.cmdline[:512].encode()))
+
+    sha = sha1()
+    update_sha(sha, args.kernel)
+    update_sha(sha, args.ramdisk)
+    update_sha(sha, args.second)
+
+    if args.header_version > 0:
+        update_sha(sha, args.recovery_dtbo)
+    if args.header_version > 1:
+        update_sha(sha, args.dtb)
+
+    img_id = pack('32s', sha.digest())
+
+    args.output.write(img_id)
+    args.output.write(pack('1024s', args.cmdline[512:].encode()))
+
+    if args.header_version > 0:
+        args.output.write(pack('I', filesize(args.recovery_dtbo)))   # size in bytes
+        if args.recovery_dtbo:
+            args.output.write(pack('Q', get_recovery_dtbo_offset(args))) # recovery dtbo offset
+        else:
+            args.output.write(pack('Q', 0)) # Will be set to 0 for devices without a recovery dtbo
+
+    # Populate boot image header size for header versions 1 and 2.
+    if args.header_version == 1:
+        args.output.write(pack('I', BOOT_IMAGE_HEADER_V1_SIZE))
+    elif args.header_version == 2:
+        args.output.write(pack('I', BOOT_IMAGE_HEADER_V2_SIZE))
+
+    if args.header_version > 1:
+        args.output.write(pack('I', filesize(args.dtb)))   # size in bytes
+        args.output.write(pack('Q', args.base + args.dtb_offset)) # dtb physical load address
+    pad_file(args.output, args.pagesize)
+    return img_id
+
+
+class ValidateStrLenAction(Action):
+    def __init__(self, option_strings, dest, nargs=None, **kwargs):
+        if 'maxlen' not in kwargs:
+            raise ValueError('maxlen must be set')
+        self.maxlen = int(kwargs['maxlen'])
+        del kwargs['maxlen']
+        super(ValidateStrLenAction, self).__init__(option_strings, dest, **kwargs)
+
+    def __call__(self, parser, namespace, values, option_string=None):
+        if len(values) > self.maxlen:
+            raise ValueError('String argument too long: max {0:d}, got {1:d}'.
+                format(self.maxlen, len(values)))
+        setattr(namespace, self.dest, values)
+
+
+def write_padded_file(f_out, f_in, padding):
+    if f_in is None:
+        return
+    f_out.write(f_in.read())
+    pad_file(f_out, padding)
+
+
+def parse_int(x):
+    return int(x, 0)
+
+def parse_os_version(x):
+    match = re.search(r'^(\d{1,3})(?:\.(\d{1,3})(?:\.(\d{1,3}))?)?', x)
+    if match:
+        a = int(match.group(1))
+        b = c = 0
+        if match.lastindex >= 2:
+            b = int(match.group(2))
+        if match.lastindex == 3:
+            c = int(match.group(3))
+        # 7 bits allocated for each field
+        assert a < 128
+        assert b < 128
+        assert c < 128
+        return (a << 14) | (b << 7) | c
+    return 0
+
+def parse_os_patch_level(x):
+    match = re.search(r'^(\d{4})-(\d{2})-(\d{2})', x)
+    if match:
+        y = int(match.group(1)) - 2000
+        m = int(match.group(2))
+        # 7 bits allocated for the year, 4 bits for the month
+        assert y >= 0 and y < 128
+        assert m > 0 and m <= 12
+        return (y << 4) | m
+    return 0
+
+def parse_cmdline():
+    parser = ArgumentParser()
+    parser.add_argument('--kernel', help='path to the kernel', type=FileType('rb'),
+                        required=True)
+    parser.add_argument('--ramdisk', help='path to the ramdisk', type=FileType('rb'))
+    parser.add_argument('--second', help='path to the 2nd bootloader', type=FileType('rb'))
+    parser.add_argument('--dtb', help='path to dtb', type=FileType('rb'))
+    recovery_dtbo_group = parser.add_mutually_exclusive_group()
+    recovery_dtbo_group.add_argument('--recovery_dtbo', help='path to the recovery DTBO', type=FileType('rb'))
+    recovery_dtbo_group.add_argument('--recovery_acpio', help='path to the recovery ACPIO',
+                                     type=FileType('rb'), metavar='RECOVERY_ACPIO', dest='recovery_dtbo')
+    parser.add_argument('--cmdline', help='extra arguments to be passed on the '
+                        'kernel command line', default='', action=ValidateStrLenAction, maxlen=1536)
+    parser.add_argument('--base', help='base address', type=parse_int, default=0x10000000)
+    parser.add_argument('--kernel_offset', help='kernel offset', type=parse_int, default=0x00008000)
+    parser.add_argument('--ramdisk_offset', help='ramdisk offset', type=parse_int, default=0x01000000)
+    parser.add_argument('--second_offset', help='2nd bootloader offset', type=parse_int,
+                        default=0x00f00000)
+    parser.add_argument('--dtb_offset', help='dtb offset', type=parse_int, default=0x01f00000)
+
+    parser.add_argument('--os_version', help='operating system version', type=parse_os_version,
+                        default=0)
+    parser.add_argument('--os_patch_level', help='operating system patch level',
+                        type=parse_os_patch_level, default=0)
+    parser.add_argument('--tags_offset', help='tags offset', type=parse_int, default=0x00000100)
+    parser.add_argument('--board', help='board name', default='', action=ValidateStrLenAction,
+                        maxlen=16)
+    parser.add_argument('--pagesize', help='page size', type=parse_int,
+                        choices=[2**i for i in range(11,15)], default=2048)
+    parser.add_argument('--id', help='print the image ID on standard output',
+                        action='store_true')
+    parser.add_argument('--header_version', help='boot image header version', type=parse_int, default=0)
+    parser.add_argument('-o', '--output', help='output file name', type=FileType('wb'),
+                        required=True)
+    return parser.parse_args()
+
+
+def write_data(args):
+    write_padded_file(args.output, args.kernel, args.pagesize)
+    write_padded_file(args.output, args.ramdisk, args.pagesize)
+    write_padded_file(args.output, args.second, args.pagesize)
+
+    if args.header_version > 0:
+        write_padded_file(args.output, args.recovery_dtbo, args.pagesize)
+    if args.header_version > 1:
+        write_padded_file(args.output, args.dtb, args.pagesize)
+
+def main():
+    args = parse_cmdline()
+    img_id = write_header(args)
+    write_data(args)
+    if args.id:
+        if isinstance(img_id, str):
+            # Python 2's struct.pack returns a string, but py3 returns bytes.
+            img_id = [ord(x) for x in img_id]
+        print('0x' + ''.join('{:02x}'.format(c) for c in img_id))
+
+if __name__ == '__main__':
+    main()
diff --git a/scripts/repack-bootimg b/scripts/repack-bootimg
new file mode 100755
index 0000000000..a4f0298c44
--- /dev/null
+++ b/scripts/repack-bootimg
@@ -0,0 +1,160 @@
+#!/bin/bash
+# SPDX-License-Identifier: GPL-2.0
+# Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd.
+set -e
+
+usage() {
+	cat >&2 << USAGE
+usage: $0 [-h] [-z] --boot_img BOOT_IMG [--out OUT] [--kernel KERNEL] [--ramdisk RAMDISK] [--second SECOND] [--dtb DTB ] [--recovery_dtbo RECOVERY_DTBO] -o OUTPUT
+
+optional arguments:
+  -h, --help            show this help message and exit
+  -z                    pack compressed kernel image
+  --boot_img BOOT_IMG   path to the original boot image
+  --out OUT             path to out binaries (default: out)
+  --kernel KERNEL       path to the new kernel
+  --ramdisk RAMDISK     path to the new ramdisk
+  --second SECOND       path to the new 2nd bootloader (default: resource.img)
+  --dtb DTB             path to the new dtb
+  --recovery_dtbo RECOVERY_DTBO
+                        path to the new recovery DTBO
+  -o OUTPUT, --output OUTPUT
+                        output file name
+USAGE
+}
+
+# Parse command-line arguments
+while [ $# -gt 0 ]; do
+	case $1 in
+		--boot_img)
+			boot_img=$2
+			shift 2
+			;;
+		--out)
+			out=$2
+			shift 2
+			;;
+		--kernel)
+			kernel=$2
+			shift 2
+			;;
+		--ramdisk)
+			ramdisk=$2
+			shift 2
+			;;
+		--second)
+			second=$2
+			shift 2
+			;;
+		--dtb)
+			dtb=$2
+			shift 2
+			;;
+		--recovery_dtbo)
+			recovery_dtbo=$2
+			shift 2
+			;;
+		-h)
+			usage
+			exit 0
+			;;
+		--help)
+			usage
+			exit 0
+			;;
+		-z)
+			compressed_kernel=y
+			shift
+			;;
+		-o)
+			output=$2
+			shift 2
+			;;
+		--output)
+			output=$2
+			shift 2
+			;;
+		*)
+			shift
+			;;
+        esac
+done
+
+if [ "$boot_img" == "" -o ! -e "$boot_img" ]; then
+	echo "No boot img"
+	usage
+	exit 1
+fi
+
+if [ "$output" == "" ]; then
+	echo "No output file name"
+	usage
+	exit 1
+fi
+
+srctree=${srctree-"."}
+objtree=${objtree-"."}
+out=${out-"out"}
+if [ "$($srctree/scripts/config --state CONFIG_ARM64)" == "y" ]; then
+	if [ "$compressed_kernel" == "y" ]; then
+		default_kernel=arch/arm64/boot/Image.lz4
+	else
+		default_kernel=arch/arm64/boot/Image
+	fi
+else
+	if [ "$compressed_kernel" == "y" ]; then
+		default_kernel=arch/arm/boot/zImage
+	else
+		default_kernel=arch/arm/boot/Image
+	fi
+fi
+kernel=${kernel-$objtree/$default_kernel}
+second=${second-$objtree/resource.img}
+ramdisk=${ramdisk-$out/ramdisk}
+dtb=${dtb-$out/dtb}
+recovery_dtbo=${recovery_dtbo-$out/recovery_dtbo}
+log="$out/unpack.log"
+
+mkdir -p $out
+$srctree/scripts/unpack_bootimg --boot_img $boot_img --out $out > $log
+
+cmdline=$(grep -a "^command line args: " $log | tr '\0' '\n'| sed "s/^command line args: //")
+extra_cmdline=$(grep -a "^additional command line args: " $log | tr '\0' '\n'| sed "s/^additional command line args: //")
+version=$(grep -a "^boot image header version: " $log | sed "s/^boot image header version: //")
+
+os_version_patch_level=$(grep -a "^os version and patch level: " $log | sed "s/^os version and patch level: //")
+
+v=$(($os_version_patch_level >> 11))
+a=$(($v >> 14))
+b=$((($v >> 7) & 0x7f))
+c=$(($v & 0x7f))
+os_version=$(printf '%d.%d.%d' $a $b $c)
+
+v=$(($os_version_patch_level & 0x7ff))
+y=$((($v >> 4) + 2000))
+m=$((($v & 15)))
+os_patch_level=$(printf '%d-%02d-01' $y $m)
+
+dtb_size=$(grep -a "^dtb size: " $log | sed "s/^dtb size: //")
+dtb_size=${dtb_size:-0}
+if [ $dtb_size -gt 0 -a -e "$dtb" ]; then
+	DTB="--dtb $dtb"
+fi
+
+recovery_dtbo_size=$(grep -a "^recovery dtbo size: " $log | sed "s/^recovery dtbo size: //")
+recovery_dtbo_size=${recovery_dtbo_size:-0}
+if [ $recovery_dtbo_size -gt 0 -a -e "$recovery_dtbo" ]; then
+	RECOVERY_DTBO="--recovery_dtbo $recovery_dtbo"
+fi
+
+$srctree/scripts/mkbootimg \
+--kernel $kernel \
+--second $second \
+--ramdisk $ramdisk \
+$DTB \
+$RECOVERY_DTBO \
+--cmdline "${cmdline}${extra_cmdline}" \
+--header_version $version \
+--os_version $os_version \
+--os_patch_level $os_patch_level \
+--output $output
diff --git a/scripts/unpack_bootimg b/scripts/unpack_bootimg
new file mode 100755
index 0000000000..789bf5e6d9
--- /dev/null
+++ b/scripts/unpack_bootimg
@@ -0,0 +1,152 @@
+#!/usr/bin/env python
+# Copyright 2018, The Android Open Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""unpacks the bootimage.
+
+Extracts the kernel, ramdisk, second bootloader, dtb and recovery dtbo images.
+"""
+
+from __future__ import print_function
+from argparse import ArgumentParser, FileType
+from struct import unpack
+import os
+
+
+def create_out_dir(dir_path):
+    """creates a directory 'dir_path' if it does not exist"""
+    if not os.path.exists(dir_path):
+        os.makedirs(dir_path)
+
+
+def extract_image(offset, size, bootimage, extracted_image_name):
+    """extracts an image from the bootimage"""
+    bootimage.seek(offset)
+    with open(extracted_image_name, 'wb') as file_out:
+        file_out.write(bootimage.read(size))
+
+
+def get_number_of_pages(image_size, page_size):
+    """calculates the number of pages required for the image"""
+    return (image_size + page_size - 1) / page_size
+
+
+def unpack_bootimage(args):
+    """extracts kernel, ramdisk, second bootloader and recovery dtbo"""
+    boot_magic = unpack('8s', args.boot_img.read(8))
+    print('boot_magic: %s' % boot_magic)
+    kernel_ramdisk_second_info = unpack('10I', args.boot_img.read(10 * 4))
+    print('kernel_size: %s' % kernel_ramdisk_second_info[0])
+    print('kernel load address: %#x' % kernel_ramdisk_second_info[1])
+    print('ramdisk size: %s' % kernel_ramdisk_second_info[2])
+    print('ramdisk load address: %#x' % kernel_ramdisk_second_info[3])
+    print('second bootloader size: %s' % kernel_ramdisk_second_info[4])
+    print('second bootloader load address: %#x' % kernel_ramdisk_second_info[5])
+    print('kernel tags load address: %#x' % kernel_ramdisk_second_info[6])
+    print('page size: %s' % kernel_ramdisk_second_info[7])
+    print('boot image header version: %s' % kernel_ramdisk_second_info[8])
+    print('os version and patch level: %s' % kernel_ramdisk_second_info[9])
+
+    product_name = unpack('16s', args.boot_img.read(16))
+    print('product name: %s' % product_name)
+    cmdline = unpack('512s', args.boot_img.read(512))
+    print('command line args: %s' % cmdline)
+
+    args.boot_img.read(32)  # ignore SHA
+
+    extra_cmdline = unpack('1024s', args.boot_img.read(1024))
+    print('additional command line args: %s' % extra_cmdline)
+
+    kernel_size = kernel_ramdisk_second_info[0]
+    ramdisk_size = kernel_ramdisk_second_info[2]
+    second_size = kernel_ramdisk_second_info[4]
+    page_size = kernel_ramdisk_second_info[7]
+    version = kernel_ramdisk_second_info[8]
+    if version > 0:
+        recovery_dtbo_size = unpack('I', args.boot_img.read(1 * 4))[0]
+        print('recovery dtbo size: %s' % recovery_dtbo_size)
+        recovery_dtbo_offset = unpack('Q', args.boot_img.read(8))[0]
+        print('recovery dtbo offset: %#x' % recovery_dtbo_offset)
+        boot_header_size = unpack('I', args.boot_img.read(4))[0]
+        print('boot header size: %s' % boot_header_size)
+    else:
+        recovery_dtbo_size = 0
+    if version > 1:
+        dtb_size = unpack('I', args.boot_img.read(4))[0]
+        print('dtb size: %s' % dtb_size)
+        dtb_load_address = unpack('Q', args.boot_img.read(8))[0]
+        print('dtb address: %#x' % dtb_load_address)
+    else:
+        dtb_size = 0
+
+
+    # The first page contains the boot header
+    num_header_pages = 1
+
+    num_kernel_pages = get_number_of_pages(kernel_size, page_size)
+    kernel_offset = page_size * num_header_pages  # header occupies a page
+    image_info_list = [(kernel_offset, kernel_size, 'kernel')]
+
+    num_ramdisk_pages = get_number_of_pages(ramdisk_size, page_size)
+    ramdisk_offset = page_size * (num_header_pages + num_kernel_pages
+                                 ) # header + kernel
+    image_info_list.append((ramdisk_offset, ramdisk_size, 'ramdisk'))
+
+    if second_size > 0:
+        second_offset = page_size * (
+                num_header_pages + num_kernel_pages + num_ramdisk_pages
+                )  # header + kernel + ramdisk
+        image_info_list.append((second_offset, second_size, 'second'))
+
+    if recovery_dtbo_size > 0:
+        image_info_list.append((recovery_dtbo_offset, recovery_dtbo_size,
+                                'recovery_dtbo'))
+    if dtb_size > 0:
+        num_second_pages = get_number_of_pages(second_size, page_size)
+        num_recovery_dtbo_pages = get_number_of_pages(recovery_dtbo_size, page_size)
+        dtb_offset = page_size * (
+            num_header_pages + num_kernel_pages + num_ramdisk_pages + num_second_pages +
+            num_recovery_dtbo_pages
+        )
+
+        image_info_list.append((dtb_offset, dtb_size, 'dtb'))
+
+    for image_info in image_info_list:
+        extract_image(image_info[0], image_info[1], args.boot_img,
+                      os.path.join(args.out, image_info[2]))
+
+
+def parse_cmdline():
+    """parse command line arguments"""
+    parser = ArgumentParser(
+        description='Unpacks boot.img/recovery.img, extracts the kernel,'
+        'ramdisk, second bootloader, recovery dtbo and dtb')
+    parser.add_argument(
+        '--boot_img',
+        help='path to boot image',
+        type=FileType('rb'),
+        required=True)
+    parser.add_argument('--out', help='path to out binaries', default='out')
+    return parser.parse_args()
+
+
+def main():
+    """parse arguments and unpack boot image"""
+    args = parse_cmdline()
+    create_out_dir(args.out)
+    unpack_bootimage(args)
+
+
+if __name__ == '__main__':
+    main()

commit 0db1499c05b5bbe5d00333e91df953a257fad6db
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Oct 22 18:23:47 2019 +0800

    rockchip: rk3399: update SPL_STACK_R_ADDR
    
    Use the same SPL_STACK_R_ADDR in Kconfig instead of each board config;
    default to 0x4000000(64MB) instead of 0x80000(512KB) for this address
    can support all the SoCs including those may have only 64MB memory, and
    also reserve enough space for atf, kernel(in falcon mode) loading.
    
    After the ATF entry move to 0x40000, the stack from 0x80000 may be override
    when loading ATF bl31.
    
    Change-Id: I9bb524ee0762e908bd390393168f30ca197e2a52
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig b/arch/arm/mach-rockchip/rk3399/Kconfig
index c4a6d46649..c97b8acd45 100644
--- a/arch/arm/mach-rockchip/rk3399/Kconfig
+++ b/arch/arm/mach-rockchip/rk3399/Kconfig
@@ -37,6 +37,9 @@ config SYS_SOC
 config SYS_MALLOC_F_LEN
 	default 0x0800
 
+config SPL_STACK_R_ADDR
+	default 0x04000000
+
 source "board/rockchip/evb_rk3399/Kconfig"
 source "board/theobroma-systems/puma_rk3399/Kconfig"
 
diff --git a/configs/android6.0-rk3399_defconfig b/configs/android6.0-rk3399_defconfig
index 9d5ad1e473..287afbda63 100644
--- a/configs/android6.0-rk3399_defconfig
+++ b/configs/android6.0-rk3399_defconfig
@@ -6,7 +6,6 @@ CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_ROCKCHIP_RK3399=y
 CONFIG_RKIMG_BOOTLOADER=y
 # CONFIG_USING_KERNEL_DTB is not set
-CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index 8816c421cf..c93a836923 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -6,7 +6,6 @@ CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_ROCKCHIP_RK3399=y
 CONFIG_RKIMG_BOOTLOADER=y
 # CONFIG_USING_KERNEL_DTB is not set
-CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
index fa4d44c0db..05eb150a7a 100644
--- a/configs/firefly-rk3399_defconfig
+++ b/configs/firefly-rk3399_defconfig
@@ -6,7 +6,6 @@ CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_RK3399=y
 CONFIG_RKIMG_BOOTLOADER=y
-CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3399-firefly"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig
index d537cb06d8..c357effc74 100644
--- a/configs/puma-rk3399_defconfig
+++ b/configs/puma-rk3399_defconfig
@@ -10,7 +10,6 @@ CONFIG_ROCKCHIP_BOOT_MODE_REG=0x0
 CONFIG_TARGET_PUMA_RK3399=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
-CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3399-puma-ddr1600"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
index fddb4474dd..1a201bc913 100755
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -7,7 +7,6 @@ CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_RK3399=y
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
-CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
diff --git a/configs/rk3399pro_defconfig b/configs/rk3399pro_defconfig
index de717eb0a2..3c5df47751 100644
--- a/configs/rk3399pro_defconfig
+++ b/configs/rk3399pro_defconfig
@@ -8,7 +8,6 @@ CONFIG_ROCKCHIP_RK3399=y
 CONFIG_ROCKCHIP_RK3399PRO=y
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
-CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y

commit 191d31cd1200e1b349bb44874943c286c0db8bb3
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Oct 22 18:17:51 2019 +0800

    rockchip: update CONFIG_SPL_MAX_SIZE to 0x40000
    
    We are using DRAM offset 0~0x40000 as SPL text size, Note that BSS,
    STACK and MALLOC may using separate space.
    
    Change-Id: I1d9128b339140569e427fad44dc0a2f3058deaf0
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index 210a436fb7..6d12bbcb65 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -25,7 +25,7 @@
 #define CONFIG_SYS_LOAD_ADDR		0x00800800
 #define CONFIG_SPL_STACK		0x00180000
 #define CONFIG_SPL_TEXT_BASE		0x00000000
-#define CONFIG_SPL_MAX_SIZE		0x100000
+#define CONFIG_SPL_MAX_SIZE		0x40000
 
 #define CONFIG_SYS_BOOTM_LEN		(64 << 20)	/*  64M */
 #define GICD_BASE			0xffc01000
diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index 6be9ad7d8b..5b6c0a5c91 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -20,7 +20,7 @@
 #define CONFIG_SYS_LOAD_ADDR		0x00800800
 #define CONFIG_SPL_STACK		0x00400000
 #define CONFIG_SPL_TEXT_BASE		0x00000000
-#define CONFIG_SPL_MAX_SIZE             0x100000
+#define CONFIG_SPL_MAX_SIZE             0x40000
 #define CONFIG_SPL_BSS_START_ADDR	0x00400000
 #define CONFIG_SPL_BSS_MAX_SIZE         0x2000
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */
diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h
index 0ce974b8e4..975b1fcbe7 100644
--- a/include/configs/rk3368_common.h
+++ b/include/configs/rk3368_common.h
@@ -28,7 +28,7 @@
 
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_TEXT_BASE            0x00000000
-#define CONFIG_SPL_MAX_SIZE             0x60000
+#define CONFIG_SPL_MAX_SIZE             0x40000
 #define CONFIG_SPL_BSS_START_ADDR       0x400000
 #define CONFIG_SPL_BSS_MAX_SIZE         0x20000
 #define CONFIG_SPL_STACK		0x00188000
diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index 0328275f48..69895876fa 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -22,7 +22,7 @@
 #define CONFIG_SYS_LOAD_ADDR		0x00800800
 #define CONFIG_SPL_STACK		0x00400000
 #define CONFIG_SPL_TEXT_BASE		0x00000000
-#define CONFIG_SPL_MAX_SIZE             0x100000
+#define CONFIG_SPL_MAX_SIZE             0x40000
 #define CONFIG_SPL_BSS_START_ADDR	0x00400000
 #define CONFIG_SPL_BSS_MAX_SIZE         0x2000
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */

commit 0bd795746889aafcb9c7007a0e21aa18861773eb
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Oct 22 18:17:05 2019 +0800

    rockchip: configs: rk3328: no need to reserve IRAM in SPL
    
    Remove CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x50000 and it will default to
    0. No need to reserve the space for we move the bl31 entry to 0x40000
    and limit the size of SPL at 0~0x40000.
    
    Change-Id: I39a69f2ee03a93b4556cc29ab41f62c344f28a02
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index 18a3649f4e..0a5b2b87ba 100644
--- a/configs/evb-rk3328_defconfig
+++ b/configs/evb-rk3328_defconfig
@@ -5,7 +5,6 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_RK3328=y
-CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0000
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index 10854bc3cd..5dd4bb8e4c 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -5,7 +5,6 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_RK3328=y
-CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x40000
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_TPL_LIBCOMMON_SUPPORT=y

commit 81adf89fd1b5ad4b62a96a62dbed825d28664167
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Oct 22 18:16:28 2019 +0800

    rockchip: configs: rk3368: no need to reserve IRAM in SPL
    
    Remove CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x50000 and it will default to
    0. No need to reserve the space for we move the bl31 entry to 0x40000
    and limit the size of SPL at 0~0x40000.
    
    Change-Id: I76385fcb3524eb16c19c3006c59954edc2f3531e
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-px5_defconfig b/configs/evb-px5_defconfig
index 68fbce641d..61fc789c64 100644
--- a/configs/evb-px5_defconfig
+++ b/configs/evb-px5_defconfig
@@ -7,7 +7,6 @@ CONFIG_TPL_MAX_SIZE=32768
 CONFIG_ROCKCHIP_RK3368=y
 CONFIG_ROCKCHIP_PX5=y
 CONFIG_TARGET_EVB_PX5=y
-CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x40000
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y

commit 714c681b5484c3cfc514aa1c4a8537c16d1ce80e
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Oct 22 18:12:50 2019 +0800

    rockchip: rk3399: configs: no need to reserve IRAM in SPL
    
    Remove CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x50000 and it will default to
    0. No need to reserve the space for we move the bl31 entry to 0x40000
    and limit the size of SPL at 0~0x40000.
    
    Change-Id: Iff502eec2a38bfe112b5cadc22d772fded39c4ed
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/android6.0-rk3399_defconfig b/configs/android6.0-rk3399_defconfig
index 19cd2e04f4..9d5ad1e473 100644
--- a/configs/android6.0-rk3399_defconfig
+++ b/configs/android6.0-rk3399_defconfig
@@ -4,7 +4,6 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_ROCKCHIP_RK3399=y
-CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x50000
 CONFIG_RKIMG_BOOTLOADER=y
 # CONFIG_USING_KERNEL_DTB is not set
 CONFIG_SPL_STACK_R_ADDR=0x80000
diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index 38043e4e1e..18a3649f4e 100644
--- a/configs/evb-rk3328_defconfig
+++ b/configs/evb-rk3328_defconfig
@@ -5,7 +5,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_RK3328=y
-CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x40000
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0000
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index c375f1f934..8816c421cf 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -4,7 +4,6 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_ROCKCHIP_RK3399=y
-CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x50000
 CONFIG_RKIMG_BOOTLOADER=y
 # CONFIG_USING_KERNEL_DTB is not set
 CONFIG_SPL_STACK_R_ADDR=0x80000
diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
index a80952fe02..fa4d44c0db 100644
--- a/configs/firefly-rk3399_defconfig
+++ b/configs/firefly-rk3399_defconfig
@@ -5,7 +5,6 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_RK3399=y
-CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x50000
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3399-firefly"
diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
index 9cb16d002b..fddb4474dd 100755
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -5,7 +5,6 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_RK3399=y
-CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x50000
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
diff --git a/configs/rk3399pro_defconfig b/configs/rk3399pro_defconfig
index c921487f87..de717eb0a2 100644
--- a/configs/rk3399pro_defconfig
+++ b/configs/rk3399pro_defconfig
@@ -6,7 +6,6 @@ CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_RK3399=y
 CONFIG_ROCKCHIP_RK3399PRO=y
-CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x50000
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_SPL_STACK_R_ADDR=0x80000

commit ce7ac0aae2adc30a193d25faa73812802a088617
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Nov 8 20:10:19 2019 +0800

    rockchip: px30: add SFC node
    
    Change-Id: I86828e529d30a018f38a61e6b669d8d3a5879f2e
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/dts/px30.dtsi b/arch/arm/dts/px30.dtsi
index e7c864d128..b347de9ed5 100644
--- a/arch/arm/dts/px30.dtsi
+++ b/arch/arm/dts/px30.dtsi
@@ -879,6 +879,15 @@
 		status = "disabled";
 	};
 
+	sfc: sfc@ff3a0000 {
+		compatible = "rockchip,rksfc","rockchip,sfc";
+		reg = <0x0 0xff3a0000 0x0 0x4000>;
+		interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
+		clock-names = "clk_sfc", "hclk_sfc";
+		status = "disabled";
+	};
+
 	nandc0: nandc@ff3b0000 {
 		compatible = "rockchip,rk-nandc";
 		reg = <0x0 0xff3b0000 0x0 0x4000>;

commit 48f2fe23c23dd4a284fb8c823e841f8cb690d5c8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 11 16:49:12 2019 +0800

    configs: rk3308: increase CONFIG_SYS_MALLOC_F_LEN
    
    Make sure there is enough memory when more nodes are
    enabled in u-boot.dtb.
    
    Change-Id: Ieb204daa41c04035b86064962569b08152375124
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-aarch32-rk3308_defconfig b/configs/evb-aarch32-rk3308_defconfig
index 5eb82250e0..67ce254d9b 100644
--- a/configs/evb-aarch32-rk3308_defconfig
+++ b/configs/evb-aarch32-rk3308_defconfig
@@ -1,6 +1,6 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_ROCKCHIP_RK3308=y
 CONFIG_ARM64_BOOT_AARCH32=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index 6e96eaed93..543ebe7916 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -2,7 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_RK3308=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
diff --git a/configs/rk3308-aarch32_defconfig b/configs/rk3308-aarch32_defconfig
index ffa565e3d6..226d8fc72c 100644
--- a/configs/rk3308-aarch32_defconfig
+++ b/configs/rk3308-aarch32_defconfig
@@ -1,6 +1,6 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_ROCKCHIP_RK3308=y
 CONFIG_ARM64_BOOT_AARCH32=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
diff --git a/configs/rk3308_defconfig b/configs/rk3308_defconfig
index c2cfc190f3..d7e625da28 100644
--- a/configs/rk3308_defconfig
+++ b/configs/rk3308_defconfig
@@ -2,7 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_RK3308=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0

commit a9bb1266c6775d7726c29853260d0004dbb75508
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Nov 11 11:32:32 2019 +0800

    dts: rk3308: add sdmmc node to support sdmmc
    
    Change-Id: Iebf8b4c800ceaea95530c553955e727e2d76345f
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-evb.dts b/arch/arm/dts/rk3308-evb.dts
index ef880960bc..3178d459c5 100644
--- a/arch/arm/dts/rk3308-evb.dts
+++ b/arch/arm/dts/rk3308-evb.dts
@@ -319,6 +319,20 @@
 	status = "disabled";
 };
 
+&sdmmc {
+	bus-width = <4>;
+	cap-mmc-highspeed;
+	cap-sd-highspeed;
+	supports-sd;
+	card-detect-delay = <800>;
+	ignore-pm-notify;
+	sd-uhs-sdr12;
+	sd-uhs-sdr25;
+	sd-uhs-sdr50;
+	sd-uhs-sdr104;
+	status = "disabled";
+};
+
 &u2phy {
 	status = "okay";
 };
diff --git a/arch/arm/dts/rk3308-u-boot.dtsi b/arch/arm/dts/rk3308-u-boot.dtsi
index d65cc135c0..e7095ea786 100644
--- a/arch/arm/dts/rk3308-u-boot.dtsi
+++ b/arch/arm/dts/rk3308-u-boot.dtsi
@@ -8,7 +8,7 @@
 
 	chosen {
 		stdout-path = &uart2;
-		u-boot,spl-boot-order = &sfc, &nandc, &emmc;
+		u-boot,spl-boot-order = &sdmmc, &sfc, &nandc, &emmc;
 	};
 };
 
@@ -43,6 +43,42 @@
 	};
 };
 
+&pinctrl {
+	u-boot,dm-pre-reloc;
+};
+
+&pcfg_pull_none_4ma {
+	u-boot,dm-spl;
+};
+
+&pcfg_pull_up_4ma {
+	u-boot,dm-spl;
+};
+
+&sdmmc {
+	u-boot,dm-pre-reloc;
+};
+
+&sdmmc_pin {
+	u-boot,dm-spl;
+};
+
+&sdmmc_clk {
+	u-boot,dm-spl;
+};
+
+&sdmmc_cmd {
+	u-boot,dm-spl;
+};
+
+&sdmmc_bus4 {
+	u-boot,dm-spl;
+};
+
+&sdmmc_pwren {
+	u-boot,dm-spl;
+};
+
 &sfc {
 	u-boot,dm-pre-reloc;
 	status = "okay";
diff --git a/arch/arm/dts/rk3308.dtsi b/arch/arm/dts/rk3308.dtsi
index 2889eec138..9c68260146 100644
--- a/arch/arm/dts/rk3308.dtsi
+++ b/arch/arm/dts/rk3308.dtsi
@@ -23,6 +23,8 @@
 		serial2 = &uart2;
 		serial3 = &uart3;
 		serial4 = &uart4;
+		mmc0 = &emmc;
+		mmc1 = &sdmmc;
 	};
 
 	cpus {

commit 224c13b893137442a1dd1f8c249a24aa0f821001
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Nov 11 09:50:21 2019 +0800

    rk3308: add node "sdmmc_pin"
    
    So that we can add "u-boot,dm-pre-reloc" to node "sdmmc_pin"
    in rk3308-u-boot.dtsi to control the sdmmc iomux in spl.
    
    Change-Id: I867927c37dd20f1b586a62676a195dbf52dca44d
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/dts/rk3308.dtsi b/arch/arm/dts/rk3308.dtsi
index a72997a9bd..2889eec138 100644
--- a/arch/arm/dts/rk3308.dtsi
+++ b/arch/arm/dts/rk3308.dtsi
@@ -861,7 +861,7 @@
 			};
 		};
 
-		sdmmc {
+		sdmmc_pin: sdmmc_pin {
 			sdmmc_clk: sdmmc-clk {
 				rockchip,pins =
 					<4 RK_PD5 1 &pcfg_pull_none_4ma>;

commit d2e2dbd6d5465e47b2918dab8617088f595f28b0
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Nov 6 11:57:01 2019 +0800

    pinctrl: rockchip: use flat device tree to find the node in spl
    
    Change-Id: I9eaa8aa17a0fad3bf9ea67746db3ed470a63a85b
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index b6f6adfc9c..5f17159808 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -2576,7 +2576,7 @@ static int rockchip_pinctrl_set_state(struct udevice *dev,
 	int prop_len, param;
 	const u32 *data;
 	ofnode node;
-#ifdef CONFIG_OF_LIVE
+#if defined(CONFIG_OF_LIVE) && !defined(CONFIG_SPL_BUILD)
 	const struct device_node *np;
 	struct property *pp;
 #else
@@ -2616,7 +2616,7 @@ static int rockchip_pinctrl_set_state(struct udevice *dev,
 		node = ofnode_get_by_phandle(conf);
 		if (!ofnode_valid(node))
 			return -ENODEV;
-#ifdef CONFIG_OF_LIVE
+#if defined(CONFIG_OF_LIVE) && !defined(CONFIG_SPL_BUILD)
 		np = ofnode_to_np(node);
 		for (pp = np->properties; pp; pp = pp->next) {
 			prop_name = pp->name;

commit 5d3e5a0afcd941e342b330fdb1aecc0dd3419b88
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Nov 8 18:16:24 2019 +0800

    Revert "regulator: fixed: print failed message"
    
    This reverts commit b8f8a3972937ba2875934a41a15347c0c664a8dd.
    
    Change-Id: I6a2d474504833b9a4efa3ef37dc76c4051db1098
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/fixed.c b/drivers/power/regulator/fixed.c
index fd8650ea76..97b4a98bf0 100644
--- a/drivers/power/regulator/fixed.c
+++ b/drivers/power/regulator/fixed.c
@@ -44,7 +44,7 @@ static int fixed_regulator_ofdata_to_platdata(struct udevice *dev)
 	gpio = &dev_pdata->gpio;
 	ret = gpio_request_by_name(dev, "gpio", 0, gpio, flags);
 	if (ret) {
-		printf("Fixed regulator optional enable GPIO - not found! Error: %d\n",
+		debug("Fixed regulator optional enable GPIO - not found! Error: %d\n",
 		      ret);
 		if (ret != -ENOENT)
 			return ret;

commit d9ba2df1adb339b0ddb6006eb596b4bb8f6bab34
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Thu Nov 7 17:33:11 2019 +0800

    rockchip: dts: include rk3368-u-boot.dtsi for px5 evb
    
    Let's rk3368-px5-evb-u-boot.dtsi include rk3368-u-boot.dtsi.
    
    Note: px5 evb use uart4 as debug console.
    
    Change-Id: Icca1fe00f95fb956abd41d34202af380b18f3c34
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi b/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi
index ce515853d0..9376b9e790 100644
--- a/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi
+++ b/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi
@@ -3,8 +3,12 @@
  *
  * SPDX-License-Identifier:     GPL-2.0+	X11
  */
+
+#include "rk3368-u-boot.dtsi"
+
 / {
 	chosen {
+		stdout-path = "serial4:115200n8";
 		u-boot,spl-boot-order = &emmc;
 	};
 };

commit e1f8eabf6cf55908ed13709e015eb3407d9da58f
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Thu Nov 7 17:31:57 2019 +0800

    rockchip: dts: Enable sdmmc on px5 evb
    
    Change-Id: Ib7cf9595e337d4179d79775deb0a126f6ccb4878
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/dts/rk3368-px5-evb.dts b/arch/arm/dts/rk3368-px5-evb.dts
index e9c5ebad47..b58966386e 100644
--- a/arch/arm/dts/rk3368-px5-evb.dts
+++ b/arch/arm/dts/rk3368-px5-evb.dts
@@ -300,6 +300,17 @@
 	status = "okay";
 };
 
+&sdmmc {
+	bus-width = <4>;
+	cap-mmc-highspeed;
+	cap-sd-highspeed;
+	disable-wp;
+	max-frequency = <150000000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
+	status = "okay";
+};
+
 &tsadc {
 	status = "okay";
 	rockchip,hw-tshut-mode = <0>; /* CRU */

commit 3c9d2903a989cfbace9a9e9c2a0216368085508a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 4 11:51:12 2019 +0800

    common: image: fix parse kernel compressed type issue
    
    This issue happens on the SDK version < 8.1. The reason is we don't
    read enough blocks from storage for kernel compressed type validation.
    
    ANDROID_ROCKCHIP_LEGACY_PAGE_SIZE(16KB) is defined by rockchip legacy
    mkboot tool(SDK version < 8.1) and larger than Google defined.
    
    To compatible this, we malloc enough buffer but only read android
    header and kernel image(1 block) from storage.
    
    Change-Id: I9800e4150985adcd5dbd78c28c471604eb403eae
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/image-android.c b/common/image-android.c
index c12b0f92a8..b6b8062777 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -30,6 +30,9 @@ DECLARE_GLOBAL_DATA_PTR;
 #define ANDROID_IMAGE_DEFAULT_KERNEL_ADDR	0x10008000
 #define ANDROID_ARG_FDT_FILENAME "rk-kernel.dtb"
 
+/* Defined by rockchip legacy mkboot tool(SDK version < 8.1) */
+#define ANDROID_ROCKCHIP_LEGACY_PAGE_SIZE	0x4000
+
 static char andr_tmp_str[ANDR_BOOT_ARGS_SIZE + 1];
 static u32 android_kernel_comp_type = IH_COMP_NONE;
 
@@ -531,29 +534,39 @@ long android_image_load(struct blk_desc *dev_desc,
 			const disk_partition_t *part_info,
 			unsigned long load_address,
 			unsigned long max_size) {
+	struct andr_img_hdr *hdr;
+	u32 blksz = dev_desc->blksz;
+	u32 pszcnt, hdrcnt, kercnt;
 	void *buf;
 	long blk_cnt = 0;
 	long blk_read = 0;
 	u32 comp;
 	u32 kload_addr;
-	u32 blkcnt;
-	struct andr_img_hdr *hdr;
 
 	if (max_size < part_info->blksz)
 		return -1;
 
 	/*
-	 * Read the Android boot.img header and a few parts of
-	 * the head of kernel image(2 blocks maybe enough).
+	 * read Android image header and leave enough space for page_size align
+	 * and kernel image header(1 block maybe enough).
+	 *
+	 * ANDROID_ROCKCHIP_LEGACY_PAGE_SIZE is defined by rockchip legacy
+	 * mkboot tool(SDK version < 8.1) and larger than Google defined.
+	 *
+	 * To compatible this, we malloc enough buffer but only read android
+	 * header and kernel image(1 block) from storage(ignore page size).
 	 */
-	blkcnt = DIV_ROUND_UP(sizeof(*hdr), 512) + 2;
-	hdr = memalign(ARCH_DMA_MINALIGN, blkcnt * 512);
+	kercnt = 1;
+	hdrcnt = DIV_ROUND_UP(sizeof(*hdr), blksz);
+	pszcnt = DIV_ROUND_UP(ANDROID_ROCKCHIP_LEGACY_PAGE_SIZE, blksz);
+
+	hdr = memalign(ARCH_DMA_MINALIGN, (hdrcnt + pszcnt + kercnt) * blksz);
 	if (!hdr) {
 		printf("%s: no memory\n", __func__);
 		return -1;
 	}
 
-	if (blk_dread(dev_desc, part_info->start, blkcnt, hdr) != blkcnt)
+	if (blk_dread(dev_desc, part_info->start, hdrcnt, hdr) != hdrcnt)
 		blk_read = -1;
 
 	if (!blk_read && android_image_check_header(hdr) != 0) {
@@ -561,6 +574,16 @@ long android_image_load(struct blk_desc *dev_desc,
 		blk_read = -1;
 	}
 
+	/*
+	 * Update and skip pszcnt(hdr is included) according to hdr->page_size,
+	 * reading kernel image for compress validation.
+	 */
+	pszcnt = DIV_ROUND_UP(hdr->page_size, blksz);
+
+	if (blk_dread(dev_desc, part_info->start + pszcnt, kercnt,
+		      (void *)((ulong)hdr + hdr->page_size)) != kercnt)
+		blk_read = -1;
+
 	/* page_size for image header */
 	load_address -= hdr->page_size;
 

commit b8f8a3972937ba2875934a41a15347c0c664a8dd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 6 15:34:39 2019 +0800

    regulator: fixed: print failed message
    
    Fixed-regulator maybe the first device probed by regulators_enable_boot_on(),
    its failure ends up the other regulator traverse(e.g. PMIC regulator), we hope
    to get this information.
    
    Change-Id: I2f1f67232dbb8a1b72dc8dfec75f1f6414b2abb9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/fixed.c b/drivers/power/regulator/fixed.c
index 97b4a98bf0..fd8650ea76 100644
--- a/drivers/power/regulator/fixed.c
+++ b/drivers/power/regulator/fixed.c
@@ -44,7 +44,7 @@ static int fixed_regulator_ofdata_to_platdata(struct udevice *dev)
 	gpio = &dev_pdata->gpio;
 	ret = gpio_request_by_name(dev, "gpio", 0, gpio, flags);
 	if (ret) {
-		debug("Fixed regulator optional enable GPIO - not found! Error: %d\n",
+		printf("Fixed regulator optional enable GPIO - not found! Error: %d\n",
 		      ret);
 		if (ret != -ENOENT)
 			return ret;

commit 54c0dba4a182b13f90b1e5e0dbf000e8e776981d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 6 15:32:13 2019 +0800

    dm: regulator: print uc_pdata name instead of dev name
    
    The uc_pdata->name is from property "regulator-name" which
    is more accuracy to descript this regulator.
    
    Change-Id: I813604ff528b757a1f9b9191dbdd4472f838a367
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/regulator-uclass.c b/drivers/power/regulator/regulator-uclass.c
index 0041c6a72a..0c692bbcf5 100644
--- a/drivers/power/regulator/regulator-uclass.c
+++ b/drivers/power/regulator/regulator-uclass.c
@@ -289,7 +289,7 @@ int regulator_autoset(struct udevice *dev)
 		ret = regulator_set_value(dev, uc_pdata->init_uV);
 		if (!ret)
 			printf("%s init %d uV\n",
-			       dev->name, uc_pdata->init_uV);
+			       uc_pdata->name, uc_pdata->init_uV);
 	}
 
 	if (!ret && (uc_pdata->flags & REGULATOR_FLAG_AUTOSET_UA))

commit fde344bd1b99193f36aa1f5e8972c75e59cb7630
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Nov 5 18:39:51 2019 +0800

    configs: rk3399: enable crypto v1
    
    Change-Id: Iea8c869ff9cec34f1117dd3b3f995df2db73cf4c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
index 5275595ea5..9cb16d002b 100755
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -62,6 +62,8 @@ CONFIG_SYSCON=y
 CONFIG_SPL_SYSCON=y
 CONFIG_CLK=y
 CONFIG_SPL_CLK=y
+CONFIG_DM_CRYPTO=y
+CONFIG_ROCKCHIP_CRYPTO_V1=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y

commit e0cee412340f5a84f6af40408167305b085cd032
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 4 20:28:11 2019 +0800

    rockchip: resource: add sha1/256 verify for kernel dtb
    
    This is important and necessary for U-disk firmware upgrade to
    avoid loading the bad kernel dtb to init USB driver.
    
    Also helpful for normal boot.
    
    Change-Id: I81629991547ccb2930312278295e9737f4827945
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index ae00122221..4b325c9d8a 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -573,6 +573,16 @@ config ROCKCHIP_RESOURCE_IMAGE
 	  This enables support to get dtb or logo files from
 	  rockchip resource image format partition.
 
+config ROCKCHIP_DTB_VERIFY
+	bool "Enable hash verify for DTB in the resource file"
+	depends on ROCKCHIP_RESOURCE_IMAGE
+	select SHA1 if !DM_CRYPTO
+	select SHA256 if !DM_CRYPTO
+	default y
+	help
+	  This enables the hash verify for DTB in the resource file, it means we
+	  always read DTB from second position even the DTB position is present.
+
 config ROCKCHIP_USB_BOOT
 	bool "Enable support for rockchip U-disk boot"
 	depends on USB
diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 84288c161d..3acc074155 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -9,6 +9,7 @@
 #include <android_image.h>
 #include <boot_rkimg.h>
 #include <bmp_layout.h>
+#include <crypto.h>
 #include <fs.h>
 #include <malloc.h>
 #include <sysmem.h>
@@ -18,6 +19,8 @@
 #include <android_avb/rk_avb_ops_user.h>
 #include <dm/ofnode.h>
 #include <linux/list.h>
+#include <u-boot/sha1.h>
+#include <u-boot/sha256.h>
 #include <asm/arch/resource_img.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -29,7 +32,8 @@ DECLARE_GLOBAL_DATA_PTR;
 #define CONTENT_VERSION			0
 #define ENTRY_TAG			"ENTR"
 #define ENTRY_TAG_SIZE			4
-#define MAX_FILE_NAME_LEN		256
+#define MAX_FILE_NAME_LEN		220
+#define MAX_HASH_LEN			32
 
 #define DTB_FILE			"rk-kernel.dtb"
 
@@ -95,12 +99,16 @@ struct resource_img_hdr {
 struct resource_entry {
 	char		tag[4];
 	char		name[MAX_FILE_NAME_LEN];
+	char		hash[MAX_HASH_LEN];
+	uint32_t	hash_size;
 	uint32_t	f_offset;
 	uint32_t	f_size;
 };
 
 struct resource_file {
 	char		name[MAX_FILE_NAME_LEN];
+	char		hash[MAX_HASH_LEN];
+	uint32_t	hash_size;
 	uint32_t	f_offset;	/* Sector addr */
 	uint32_t	f_size;		/* Bytes */
 	struct list_head link;
@@ -151,6 +159,8 @@ static int add_file_to_list(struct resource_entry *entry, int rsce_base)
 	file->rsce_base = rsce_base;
 	file->f_offset = entry->f_offset;
 	file->f_size = entry->f_size;
+	file->hash_size = entry->hash_size;
+	memcpy(file->hash, entry->hash, entry->hash_size);
 	list_add_tail(&file->link, &entrys_head);
 
 	debug("entry:%p  %s offset:%d size:%d\n",
@@ -216,7 +226,7 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 	int resource_found = 0;
 	void *content = NULL;
 	int rsce_base = 0;
-	int dtb_offset = 0;
+	__maybe_unused int dtb_offset = 0;
 	int dtb_size = 0;
 	int e_num, cnt;
 	int size;
@@ -429,14 +439,17 @@ err2:
 	/*
 	 * boot_img_hdr_v2 feature.
 	 *
-	 * If dtb position is present, replace the old with new one
+	 * If dtb position is present, replace the old with new one if
+	 * we don't need to verify DTB hash from resource.img file entry.
 	 */
 	if (dtb_size) {
+#ifndef CONFIG_ROCKCHIP_DTB_VERIFY
 		ret = replace_resource_entry(DTB_FILE, rsce_base,
 					     dtb_offset, dtb_size);
 		if (ret)
 			printf("Failed to load dtb from dtb position\n");
 		else
+#endif
 			env_update("bootargs", "androidboot.dtb_idx=0");
 	}
 err:
@@ -835,6 +848,72 @@ static int rockchip_read_distro_dtb(void *fdt_addr)
 }
 #endif
 
+#ifdef CONFIG_ROCKCHIP_DTB_VERIFY
+#ifdef CONFIG_DM_CRYPTO
+static int crypto_csum(u32 cap, char *input, u32 input_len, u8 *output)
+{
+	sha_context csha_ctx;
+	struct udevice *dev;
+
+	dev = crypto_get_device(cap);
+	if (!dev) {
+		printf("Can't find expected crypto device\n");
+		return -ENODEV;
+	}
+
+	csha_ctx.algo = cap;
+	csha_ctx.length = input_len;
+	crypto_sha_csum(dev, &csha_ctx, (char *)input,
+			input_len, output);
+
+	return 0;
+}
+
+static int fdt_check_hash(void *fdt_addr, struct resource_file *file)
+{
+	uchar hash[32];
+
+	if (!file->hash_size)
+		return 0;
+
+	printf("Crypto: enable\n");
+
+	if (file->hash_size == 20)
+		crypto_csum(CRYPTO_SHA1, fdt_addr, file->f_size, hash);
+	else if (file->hash_size == 32)
+		crypto_csum(CRYPTO_SHA256, fdt_addr, file->f_size, hash);
+	else
+		return -EINVAL;
+
+	if (memcmp(hash, file->hash, file->hash_size))
+		return -EBADF;
+
+	return 0;
+}
+
+#else
+static int fdt_check_hash(void *fdt_addr, struct resource_file *file)
+{
+	uchar hash[32];
+
+	if (!file->hash_size)
+		return 0;
+
+	if (file->hash_size == 20)
+		sha1_csum((const uchar *)fdt_addr, file->f_size, hash);
+	else if (file->hash_size == 32)
+		sha256_csum((const uchar *)fdt_addr, file->f_size, hash);
+	else
+		return -EINVAL;
+
+	if (memcmp(hash, file->hash, file->hash_size))
+		return -EBADF;
+
+	return 0;
+}
+#endif
+#endif	/* CONFIG_ROCKCHIP_DTB_VERIFY */
+
 int rockchip_read_dtb_file(void *fdt_addr)
 {
 	struct resource_file *file;
@@ -867,6 +946,14 @@ int rockchip_read_dtb_file(void *fdt_addr)
 		return -EBADF;
 	}
 
+	/* Note: We only load the DTB from resource.img to verify */
+#ifdef CONFIG_ROCKCHIP_DTB_VERIFY
+	if (fdt_check_hash(fdt_addr, file)) {
+		printf("Get a bad hash of DTB !\n");
+		return -EBADF;
+	}
+#endif
+
 	if (!sysmem_alloc_base(MEMBLK_ID_FDT, (phys_addr_t)fdt_addr,
 			       ALIGN(file->f_size, RK_BLK_SIZE) +
 			       CONFIG_SYS_FDT_PAD))

commit fcecee42b0b779ae4bf56d12f73c4341776357f7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 7 09:15:00 2019 +0800

    rockchip: resource: update print message
    
    At this moment, we just load file entries but not really load file.
    
    Change-Id: I550e6bd90bcdf81f866c0d5f5c6b71faa0ecde19
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 06a808a12c..84288c161d 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -287,9 +287,6 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 			       (os_ver >> 14) & 0x7F, (os_ver >> 7) & 0x7F,
 			       (os_lvl >> 4) + 2000, os_lvl & 0x0F);
 
-		debug("%s: Load resource from %s second pos\n",
-		      __func__, part_info.name);
-
 		rsce_base = part_info.start * dev_desc->blksz;
 		rsce_base += andr_hdr->page_size;
 		rsce_base += ALIGN(andr_hdr->kernel_size, andr_hdr->page_size);
@@ -313,8 +310,6 @@ parse_resource_part:
 
 	/* If not find android image, get resource file from resource part */
 	if (!resource_found) {
-		debug("%s: Load resource from resource part\n", __func__);
-
 		boot_partname = PART_RESOURCE;
 		ret = part_get_info_by_name(dev_desc, boot_partname, &part_info);
 		if (ret < 0) {
@@ -370,7 +365,7 @@ parse_resource_part:
 	}
 
 	ret = 0;
-	printf("Load FDT from %s part\n", boot_partname);
+	printf("Found DTB in %s part\n", boot_partname);
 
 parse_second_pos_dtb:
 #ifdef CONFIG_ANDROID_BOOT_IMAGE
@@ -393,7 +388,7 @@ parse_second_pos_dtb:
 		add_file_to_list(entry, part_info.start);
 		free(entry);
 		ret = 0;
-		printf("Load FDT from %s part(second pos)\n", boot_partname);
+		printf("Found DTB in %s part(second pos)\n", boot_partname);
 	}
 
 parse_logo:
@@ -426,7 +421,7 @@ parse_logo:
 		ret = replace_resource_entry("logo.bmp", part_info.start, 0,
 					     get_unaligned_le32(&header->file_size));
 		if (!ret)
-			printf("Load logo.bmp from logo part\n");
+			printf("Found logo.bmp in logo part\n");
 err2:
 		free(header);
 	}

commit ca6fb2913f132ab9e0cca20e71b67a6c15d3f9a0
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Nov 5 18:50:57 2019 +0800

    rockchip: Kconfig: add CONFIG_ROCKCHIP_HWID_DTB for hw-id dtb
    
    Only a few developers need this feature, disable it by default.
    
    Change-Id: I074594c8e47c34a05324e363d11613383f3528a7
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 191097e717..ae00122221 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -596,6 +596,14 @@ config ROCKCHIP_EARLY_DISTRO_DTB_PATH
 	  "DTB file path in the bootable partition image"
 endif
 
+config ROCKCHIP_HWID_DTB
+	bool "Enable support for selecting DTB by hardware id"
+	depends on ROCKCHIP_RESOURCE_IMAGE
+	default n
+	help
+	  This enables select the expected DTB from sets by hardware id,
+	  i.e. GPIO or ADC value.
+
 config ROCKCHIP_VENDOR_PARTITION
 	bool "Rockchip vendor storage partition support"
 	depends on RKIMG_BOOTLOADER
diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 155404304f..06a808a12c 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -525,6 +525,7 @@ int rockchip_read_resource_file(void *buf, const char *name,
 	return ret;
 }
 
+#ifdef CONFIG_ROCKCHIP_HWID_DTB
 #define is_digit(c)		((c) >= '0' && (c) <= '9')
 #define is_abcd(c)		((c) >= 'a' && (c) <= 'd')
 #define is_equal(c)		((c) == '=')
@@ -537,7 +538,6 @@ int rockchip_read_resource_file(void *buf, const char *name,
 #define MAX_ADC_CH_NR		10
 #define MAX_GPIO_NR		10
 
-#ifdef CONFIG_ADC
 /*
  * How to make it works ?
  *
@@ -626,12 +626,6 @@ static int rockchip_read_dtb_by_adc(const char *file_name)
 
 	return found ? 0 : -ENOENT;
 }
-#else
-static int rockchip_read_dtb_by_adc(const char *file_name)
-{
-	return  -ENOENT;
-}
-#endif
 
 static int gpio_parse_base_address(fdt_addr_t *gpio_base_addr)
 {
@@ -793,6 +787,7 @@ static struct resource_file *rockchip_read_hwid_dtb(void)
 
 	return NULL;
 }
+#endif
 
 #ifdef CONFIG_ROCKCHIP_EARLY_DISTRO_DTB
 static int rockchip_read_distro_dtb(void *fdt_addr)
@@ -859,7 +854,9 @@ int rockchip_read_dtb_file(void *fdt_addr)
 		if (ret > 0)
 			return ret; /* found & load done */
 #endif
+#ifdef CONFIG_ROCKCHIP_HWID_DTB
 		file = rockchip_read_hwid_dtb();
+#endif
 		if (!file)
 			return -ENODEV;
 	}

commit a6926964ec0924fe0bfceee88ae8665c8ee80da8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 4 20:26:20 2019 +0800

    rockchip: resource: clean rockchip_read_dtb_file()
    
    Remove unused rockchip_get_resource_file_size().
    
    Change-Id: I5fd24f68b226e9b3ae3a36e574f5efd8c8728e65
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/resource_img.h b/arch/arm/include/asm/arch-rockchip/resource_img.h
index ca3399087d..492913bae2 100644
--- a/arch/arm/include/asm/arch-rockchip/resource_img.h
+++ b/arch/arm/include/asm/arch-rockchip/resource_img.h
@@ -29,16 +29,6 @@ int rockchip_read_resource_file(void *buf, const char *name, int offset, int len
  */
 int rockchip_get_resource_file_offset(void *resc_hdr, const char *name);
 
-/*
- * rockchip_get_resource_file_size() - read file size
- *
- * @resc_img_hdr: resource file hdr
- * @name: file name
- *
- * @return negative on error, otherwise file size
- */
-int rockchip_get_resource_file_size(void *resc_hdr, const char *name);
-
 /*
  * rockchip_get_resource_file_size() - read file size
  *
diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 848700a267..155404304f 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -484,17 +484,6 @@ int rockchip_get_resource_file_offset(void *resc_hdr, const char *name)
 	return file->f_offset;
 }
 
-int rockchip_get_resource_file_size(void *resc_hdr, const char *name)
-{
-	struct resource_file *file;
-
-	file = get_file_info(resc_hdr, name);
-	if (!file)
-		return -ENFILE;
-
-	return file->f_size;
-}
-
 /*
  * read file from resource partition
  * @buf: destination buf to store file data;
@@ -780,14 +769,40 @@ static int rockchip_read_dtb_by_gpio(const char *file_name)
 	return found ? 0 : -ENOENT;
 }
 
+/* Get according to hardware id(GPIO/ADC) */
+static struct resource_file *rockchip_read_hwid_dtb(void)
+{
+	struct resource_file *file;
+	struct list_head *node;
+
+	/* Find dtb file according to hardware id(GPIO/ADC) */
+	list_for_each(node, &entrys_head) {
+		file = list_entry(node, struct resource_file, link);
+		if (!strstr(file->name, ".dtb"))
+			continue;
+
+		if (strstr(file->name, KEY_WORDS_ADC_CTRL) &&
+		    strstr(file->name, KEY_WORDS_ADC_CH) &&
+		    !rockchip_read_dtb_by_adc(file->name)) {
+			return file;
+		} else if (strstr(file->name, KEY_WORDS_GPIO) &&
+			   !rockchip_read_dtb_by_gpio(file->name)) {
+			return file;
+		}
+	}
+
+	return NULL;
+}
+
 #ifdef CONFIG_ROCKCHIP_EARLY_DISTRO_DTB
-static int rockchip_read_distro_dtb_file(char *fdt_addr)
+static int rockchip_read_distro_dtb(void *fdt_addr)
 {
 	const char *cmd = "part list ${devtype} ${devnum} -bootable devplist";
 	char *devnum, *devtype, *devplist;
 	char devnum_part[12];
 	char fdt_hex_str[19];
 	char *fs_argv[5];
+	int size;
 	int ret;
 
 	if (!rockchip_get_bootdev() || !fdt_addr)
@@ -819,69 +834,50 @@ static int rockchip_read_distro_dtb_file(char *fdt_addr)
 	if (fdt_check_header(fdt_addr))
 		return -EIO;
 
-	return fdt_totalsize(fdt_addr);
+	size = fdt_totalsize(fdt_addr);
+	if (!sysmem_alloc_base(MEMBLK_ID_FDT, (phys_addr_t)fdt_addr,
+			       ALIGN(size, RK_BLK_SIZE) + CONFIG_SYS_FDT_PAD))
+		return -ENOMEM;
+
+	printf("Distro DTB: %s\n", CONFIG_ROCKCHIP_EARLY_DISTRO_DTB_PATH);
+
+	return size;
 }
 #endif
 
 int rockchip_read_dtb_file(void *fdt_addr)
 {
 	struct resource_file *file;
-	struct list_head *node;
-	char *dtb_name = DTB_FILE;
-	int size = -ENODEV;
+	char *def_dtb = DTB_FILE;
+	int ret;
 
-	if (!get_file_info(NULL, dtb_name)) {
+	/* search order: "rk-kernel.dtb" -> distro -> hwid */
+	file = get_file_info(NULL, def_dtb);
+	if (!file) {
 #ifdef CONFIG_ROCKCHIP_EARLY_DISTRO_DTB
-		/* Load dtb from distro boot.img */
-		printf("Distro DTB: %s\n",
-		       CONFIG_ROCKCHIP_EARLY_DISTRO_DTB_PATH);
-		size = rockchip_read_distro_dtb_file(fdt_addr);
-		if (size < 0)
-			return size;
-
-		if (!sysmem_alloc_base(MEMBLK_ID_FDT,
-			(phys_addr_t)fdt_addr,
-			ALIGN(size, RK_BLK_SIZE) + CONFIG_SYS_FDT_PAD))
-			return -ENOMEM;
+		ret = rockchip_read_distro_dtb(fdt_addr);
+		if (ret > 0)
+			return ret; /* found & load done */
 #endif
-		return -ENODEV;
+		file = rockchip_read_hwid_dtb();
+		if (!file)
+			return -ENODEV;
 	}
 
-	/* Find dtb file according to hardware id(GPIO/ADC) */
-	list_for_each(node, &entrys_head) {
-		file = list_entry(node, struct resource_file, link);
-		if (!strstr(file->name, ".dtb"))
-			continue;
-
-		if (strstr(file->name, KEY_WORDS_ADC_CTRL) &&
-		    strstr(file->name, KEY_WORDS_ADC_CH) &&
-		    !rockchip_read_dtb_by_adc(file->name)) {
-			dtb_name = file->name;
-			break;
-		} else if (strstr(file->name, KEY_WORDS_GPIO) &&
-			   !rockchip_read_dtb_by_gpio(file->name)) {
-			dtb_name = file->name;
-			break;
-		}
-	}
-
-	printf("DTB: %s\n", dtb_name);
-
-	size = rockchip_get_resource_file_size((void *)fdt_addr, dtb_name);
-	if (size < 0)
-		return size;
-
-	size = rockchip_read_resource_file((void *)fdt_addr, dtb_name, 0, 0);
-	if (size < 0)
-		return size;
+	/* found! */
+	printf("DTB: %s\n", file->name);
+	ret = rockchip_read_resource_file(fdt_addr, file->name, 0, 0);
+	if (ret < 0)
+		return ret;
 
 	if (fdt_check_header(fdt_addr)) {
-		printf("Get a bad DTB file\n");
+		printf("Get a bad DTB file !\n");
 		return -EBADF;
 	}
 
 	if (!sysmem_alloc_base(MEMBLK_ID_FDT, (phys_addr_t)fdt_addr,
-			       ALIGN(size, RK_BLK_SIZE) + CONFIG_SYS_FDT_PAD))
+			       ALIGN(file->f_size, RK_BLK_SIZE) +
+			       CONFIG_SYS_FDT_PAD))
 		return -ENOMEM;
 
 	/* Apply DTBO */
@@ -889,5 +885,5 @@ int rockchip_read_dtb_file(void *fdt_addr)
 	android_fdt_overlay_apply((void *)fdt_addr);
 #endif
 
-	return size;
+	return file->f_size;
 }

commit 5e817a0ea4271df00a147e77316f36f286ff9a56
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 4 20:23:09 2019 +0800

    tools: rockchip: resource_tool: add sha1 for file entry
    
    Change-Id: If7bd80d68019f6ea5ad737793ed996d47134b568
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/tools/Makefile b/tools/Makefile
index 1482a9f22b..d1548e9048 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -67,7 +67,7 @@ hostprogs-y += resource_tool
 boot_merger-objs := rockchip/boot_merger.o rockchip/sha2.o lib/sha256.o
 trust_merger-objs := rockchip/trust_merger.o rockchip/sha2.o lib/sha256.o
 loaderimage-objs := rockchip/loaderimage.o rockchip/sha.o lib/sha256.o rockchip/crc32_rk.o
-resource_tool-objs := rockchip/resource_tool.o
+resource_tool-objs := rockchip/resource_tool.o lib/sha1.o lib/sha256.o
 endif
 
 FIT_SIG_OBJS-$(CONFIG_FIT_SIGNATURE) := common/image-sig.o
diff --git a/tools/rockchip/resource_tool.c b/tools/rockchip/resource_tool.c
index 217ad31a2e..b2d20bc350 100644
--- a/tools/rockchip/resource_tool.c
+++ b/tools/rockchip/resource_tool.c
@@ -11,6 +11,8 @@
 #include <stdbool.h>
 #include <sys/stat.h>
 #include <time.h>
+#include <u-boot/sha1.h>
+#include <u-boot/sha256.h>
 
 /* #define DEBUG */
 
@@ -55,10 +57,14 @@ typedef struct {
 } resource_ptn_header;
 
 #define INDEX_TBL_ENTR_TAG "ENTR"
-#define MAX_INDEX_ENTRY_PATH_LEN 256
+#define MAX_INDEX_ENTRY_PATH_LEN	220
+#define MAX_HASH_LEN			32
+
 typedef struct {
 	char tag[4]; /* tag, "ENTR" */
 	char path[MAX_INDEX_ENTRY_PATH_LEN];
+	char hash[MAX_HASH_LEN]; /* hash data */
+	uint32_t hash_size;	 /* 20 or 32 */
 	uint32_t content_offset; /* blocks, offset of resource content. */
 	uint32_t content_size;   /* bytes, size of resource content. */
 } index_tbl_entry;
@@ -855,13 +861,13 @@ static inline size_t get_file_size(const char *path)
 	return st.st_size;
 }
 
-static int write_file(int offset_block, const char *src_path)
+static int write_file(int offset_block, const char *src_path,
+		      char hash[], int hash_size)
 {
 	LOGD("try to write file(%s) to offset:%d...", src_path, offset_block);
-	char buf[BLOCK_SIZE];
+	char *buf = NULL;
 	int ret = -1;
 	size_t file_size;
-	int blocks;
 	FILE *src_file = fopen(src_path, "rb");
 	if (!src_file) {
 		LOGE("Failed to open:%s", src_path);
@@ -872,23 +878,33 @@ static int write_file(int offset_block, const char *src_path)
 	if (file_size < 0) {
 		goto end;
 	}
-	blocks = fix_blocks(file_size);
 
-	int i;
-	for (i = 0; i < blocks; i++) {
-		memset(buf, 0, sizeof(buf));
-		if (!fread(buf, 1, BLOCK_SIZE, src_file)) {
-			LOGE("Failed to read:%s", src_path);
-			goto end;
-		}
-		if (!write_data(offset_block + i, buf, BLOCK_SIZE)) {
-			goto end;
-		}
-	}
-	ret = blocks;
+	buf = calloc(file_size, 1);
+	if (!buf)
+		goto end;
+
+	if (!fread(buf, file_size, 1, src_file))
+		goto end;
+
+	if (!write_data(offset_block, buf, file_size))
+		goto end;
+
+	if (hash_size == 20)
+		sha1_csum((const unsigned char *)buf, file_size,
+			  (unsigned char *)hash);
+	else if (hash_size == 32)
+		sha256_csum((const unsigned char *)buf, file_size,
+			    (unsigned char *)hash);
+	else
+		goto end;
+
+	ret = file_size;
 end:
 	if (src_file)
 		fclose(src_file);
+	if (buf)
+		free(buf);
+
 	return ret;
 }
 
@@ -917,8 +933,10 @@ static bool write_index_tbl(const int file_num, const char **files)
 	int offset =
 	        header.header_size + header.tbl_entry_size * header.tbl_entry_num;
 	index_tbl_entry entry;
-	memcpy(entry.tag, INDEX_TBL_ENTR_TAG, sizeof(entry.tag));
+	char hash[20];	/* sha1 */
 	int i;
+
+	memcpy(entry.tag, INDEX_TBL_ENTR_TAG, sizeof(entry.tag));
 	for (i = 0; i < file_num; i++) {
 		size_t file_size = get_file_size(files[i]);
 		if (file_size < 0)
@@ -926,9 +944,12 @@ static bool write_index_tbl(const int file_num, const char **files)
 		entry.content_size = file_size;
 		entry.content_offset = offset;
 
-		if (write_file(offset, files[i]) < 0)
+		if (write_file(offset, files[i], hash, sizeof(hash)) < 0)
 			goto end;
 
+		memcpy(entry.hash, hash, sizeof(hash));
+		entry.hash_size = sizeof(hash);
+
 		LOGD("try to write index entry(%s)...", files[i]);
 
 		/* switch for le. */

commit 5a0e83417be85311e5acc87166a1efc0c6427490
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Nov 6 15:40:27 2019 +0800

    spl: atf: pass kernel parameters through bl33_ep_info->args
    
    Pass when enable CONFIG_SPL_KERNEL_BOOT.
    
    Change-Id: Ia3d14bdc9dafe894a46d54a50123a2ad5a73f742
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/spl/spl_atf.c b/common/spl/spl_atf.c
index 1de602c5e1..a6ea1a2968 100644
--- a/common/spl/spl_atf.c
+++ b/common/spl/spl_atf.c
@@ -80,7 +80,18 @@ bl33_setup:
 	bl33_ep_info->pc = bl33_entry;
 	bl33_ep_info->spsr = SPSR_64(MODE_EL2, MODE_SP_ELX,
 				     DISABLE_ALL_EXECPTIONS);
-
+#if defined(CONFIG_SPL_KERNEL_BOOT) && defined(CONFIG_ARM64)
+	/*
+	 * Reference: arch/arm/lib/bootm.c
+	 * boot_jump_linux(bootm_headers_t *images, int flag)
+	 * {
+	 * 	......
+	 * 	armv8_switch_to_el2((u64)images->ft_addr, 0, 0, 0,
+	 * 			   images->ep, ES_TO_AARCH64);
+	 * }
+	 */
+	bl33_ep_info->args.arg0 = CONFIG_SPL_FDT_ADDR;
+#endif
 	bl2_to_bl31_params->bl33_image_info = &bl31_params_mem.bl33_image_info;
 	SET_PARAM_HEAD(bl2_to_bl31_params->bl33_image_info,
 		       ATF_PARAM_IMAGE_BINARY, ATF_VERSION_1, 0);

commit 46b16a76d01cd38967d6f2d09839a9b370c6af0b
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Nov 6 15:39:55 2019 +0800

    spl: add SPL_KERNEL_BOOT
    
    Change-Id: Idc16c6c6fc5fb6b2a394f6e431b93a11fd3526bc
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index fe0c7169e0..39534213df 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -833,6 +833,12 @@ config SPL_RAMDISK_ADDR
 	  Define the ramdisk address where load ramdisk image to.
 	  This is used to boot kernel in spl.
 
+config SPL_KERNEL_BOOT
+	bool "Enable boot kernel in SPL"
+	depends on SPL
+	help
+	  Enable boot kernel in SPL.
+
 config TPL
 	bool
 	depends on SUPPORT_TPL

commit d4c8787cd924af4b79135cd0026b4bb87040abb4
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Nov 6 14:54:27 2019 +0800

    rockchip: rk1808: support mmc_gpio_init_direct()
    
    Change-Id: Ife83d792d93a0d2f2c7150d0e777612d351b7d9c
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk1808/rk1808.c b/arch/arm/mach-rockchip/rk1808/rk1808.c
index 2c99de8435..5ae52e00b6 100644
--- a/arch/arm/mach-rockchip/rk1808/rk1808.c
+++ b/arch/arm/mach-rockchip/rk1808/rk1808.c
@@ -216,3 +216,14 @@ int rk_board_late_init(void)
 
 	return 0;
 }
+
+void mmc_gpio_init_direct(void)
+{
+	static struct rk1808_grf * const grf = (void *)GRF_BASE;
+
+	/*
+	 * The rk1808's pin drive strength control must set to 2ma.
+	 */
+	rk_clrsetreg(&grf->gpio1a_e, 0xffff, 0x5555);
+	rk_clrsetreg(&grf->gpio1b_e, 0xff, 0x00);
+}

commit e1c1c23dd865ed05a39291cd1746290e50ce94ad
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Nov 5 11:25:01 2019 +0800

    android: change the verification mode
    
    The mode AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE will add
    "androidboot.vbmeta.invalidate_on_error=yes" to cmdline, and kernel
    will invalidate vbmeta if verified fail. This will modify the vbmeta.img
    head and make uboot verify vbmeta.img fail in avb system. And in avb & ab
    system, we can use the retry-count to change slot if verify fail without
    modify the vbmeta. So just use the mode AVB_HASHTREE_ERROR_MODE_RESTART.
    
    Change-Id: I98d60683d5365b996fcca2e85d4847d4a6df2ef6
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index f4cc636c65..8da8f80fab 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -629,7 +629,7 @@ static AvbSlotVerifyResult android_slot_verify(char *boot_partname,
 			requested_partitions,
 			slot_suffix,
 			flags,
-			AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE,
+			AVB_HASHTREE_ERROR_MODE_RESTART,
 			&slot_data[0]);
 
 	strcat(verify_state, ANDROID_VERIFY_STATE);

commit b754d4701312cb07117a269f5347a5749ea1c900
Author: Yu YongZhen <yuyz@rock-chips.com>
Date:   Sat Nov 2 17:36:53 2019 +0800

    video/drm: rgb: add S888 mode support
    
    Change-Id: I73c6cec7a35dd5e15110da429b836463cab0a193
    Signed-off-by: Yu YongZhen <yuyz@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_rgb.c b/drivers/video/drm/rockchip_rgb.c
index bc4637172e..6bfd445753 100644
--- a/drivers/video/drm/rockchip_rgb.c
+++ b/drivers/video/drm/rockchip_rgb.c
@@ -118,6 +118,11 @@ static int rockchip_rgb_connector_init(struct display_state *state)
 	case MEDIA_BUS_FMT_RGB565_1X16:
 		conn_state->output_mode = ROCKCHIP_OUT_MODE_P565;
 		break;
+	case MEDIA_BUS_FMT_SRGB888_3X8:
+	case MEDIA_BUS_FMT_SBGR888_3X8:
+	case MEDIA_BUS_FMT_SRBG888_3X8:
+		conn_state->output_mode = ROCKCHIP_OUT_MODE_S888;
+		break;
 	case MEDIA_BUS_FMT_RGB888_1X24:
 	case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
 	default:
diff --git a/include/linux/media-bus-format.h b/include/linux/media-bus-format.h
index d8622ebd19..a5ce8dc74b 100644
--- a/include/linux/media-bus-format.h
+++ b/include/linux/media-bus-format.h
@@ -62,6 +62,12 @@
 #define MEDIA_BUS_FMT_RGB121212_1X36		0x1019
 #define MEDIA_BUS_FMT_RGB161616_1X48		0x101a
 #define MEDIA_BUS_FMT_RGB666_1X7X3_JEIDA	0x101b
+#define MEDIA_BUS_FMT_SRGB888_3X8		0x101c
+#define MEDIA_BUS_FMT_SBGR888_3X8		0x101d
+#define MEDIA_BUS_FMT_SRBG888_3X8		0x101e
+#define MEDIA_BUS_FMT_SRGB888_DUMMY_4X8		0x101f
+#define MEDIA_BUS_FMT_SBGR888_DUMMY_4X8		0x1020
+#define MEDIA_BUS_FMT_SRBG888_DUMMY_4X8		0x1021
 
 /* YUV (including grey) - next is	0x2026 */
 #define MEDIA_BUS_FMT_Y8_1X8			0x2001

commit 3aff587f063d12970d803a7a63d4a23a18274718
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 4 20:47:09 2019 +0800

    tools: rockchip: remove useless checksum
    
    Change-Id: I0b40f0b0677920abfe873fd6b8db23475f113a78
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/tools/Makefile b/tools/Makefile
index e4a18e37f6..1482a9f22b 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -63,13 +63,11 @@ hostprogs-y += boot_merger
 hostprogs-y += trust_merger
 hostprogs-y += loaderimage
 hostprogs-y += resource_tool
-hostprogs-y += checksum
 
 boot_merger-objs := rockchip/boot_merger.o rockchip/sha2.o lib/sha256.o
 trust_merger-objs := rockchip/trust_merger.o rockchip/sha2.o lib/sha256.o
 loaderimage-objs := rockchip/loaderimage.o rockchip/sha.o lib/sha256.o rockchip/crc32_rk.o
 resource_tool-objs := rockchip/resource_tool.o
-checksum-objs := rockchip/checksum.o rockchip/crc32_rk.o
 endif
 
 FIT_SIG_OBJS-$(CONFIG_FIT_SIGNATURE) := common/image-sig.o
diff --git a/tools/rockchip/checksum.c b/tools/rockchip/checksum.c
deleted file mode 100644
index 15304cd426..0000000000
--- a/tools/rockchip/checksum.c
+++ /dev/null
@@ -1,118 +0,0 @@
-/*
- * (C) Copyright 2008-2015 Fuzhou Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-#include <sys/stat.h>
-#include <stdio.h>
-#include <stdint.h>
-#include <u-boot/crc.h>
-
-extern uint32_t crc32_rk(uint32_t, const unsigned char *, uint32_t);
-
-#define SZ_4M 0x00400000
-#define SZ_16M 0x01000000
-#define SZ_32M 0x02000000
-#define RK_BLK_SIZE 512
-
-void usage(const char *prog)
-{
-	fprintf(stderr, "Usage: %s <image>\n", prog);
-}
-
-/*
- * Neutralize little endians.
- */
-uint32_t le_uint32(uint32_t x)
-{
-	uint32_t val;
-	uint8_t *p = (uint8_t *)(&x);
-
-	val = (*p++ & 0xff) << 0;
-	val |= (*p++ & 0xff) << 8;
-	val |= (*p++ & 0xff) << 16;
-	val |= (*p & 0xff) << 24;
-
-	return val;
-}
-
-int main(int argc, char *argv[])
-{
-	FILE *fp;
-	uint32_t blocks = 0;
-
-	fp = fopen(argv[1], "rb");
-	if (!fp) {
-		perror(argv[1]);
-		return -1;
-	}
-
-	struct stat sb;
-	int ret = stat(argv[1], &sb);
-	if (!fp || ret) {
-		perror(argv[1]);
-		return -1;
-	}
-	blocks = sb.st_size / RK_BLK_SIZE;
-	if (sb.st_size % RK_BLK_SIZE) {
-		printf("size should align %d", RK_BLK_SIZE);
-		return -1;
-	}
-
-	printf("totle blocks:0x%08x\n", blocks);
-
-#ifdef CONFIG_FASTBOOT_TRANSFER_BUFFER_SIZE_EACH
-	uint32_t buf_size = CONFIG_FASTBOOT_TRANSFER_BUFFER_SIZE_EACH;
-#else
-	uint32_t buf_size = 16 * 1024 * 1024;
-#endif
-	void *buf = malloc(buf_size);
-	uint16_t buf_blocks = buf_size / RK_BLK_SIZE;
-	uint32_t offset = 0;
-#ifndef CONFIG_QUICK_CHECKSUM
-	uint32_t *crc_array = (uint32_t *)malloc(buf_size);
-	uint16_t crc_counts = 0;
-	uint32_t checksum = 0;
-#else
-	long long unsigned int checksum = 0;
-#endif
-	while (blocks > 0) {
-		uint16_t read_blocks = blocks > buf_blocks ? buf_blocks : blocks;
-
-		if (fread(buf, read_blocks * RK_BLK_SIZE, 1, fp) != 1) {
-			printf("read failed, offset:0x%08x, blocks:0x%08x\n", offset,
-			       read_blocks);
-			return -1;
-		}
-		offset += read_blocks;
-		blocks -= read_blocks;
-#ifndef CONFIG_QUICK_CHECKSUM
-		crc_array[crc_counts] = crc32_rk(0, buf, read_blocks * RK_BLK_SIZE);
-		printf("offset:0x%08x, blocks:0x%08x, crc:0x%08x\n", offset, read_blocks,
-		       crc_array[crc_counts]);
-		crc_counts++;
-#else
-		int i = 0;
-		uint32_t *data = (uint32_t *)buf;
-		for (i = 0; i<read_blocks *RK_BLK_SIZE>> 2; i++)
-			checksum += le_uint32(data[i]);
-		printf("offset:0x%08x, blocks:0x%08x, checksum:0x%016llx\n", offset,
-		       read_blocks, checksum);
-#endif
-	}
-
-#ifndef CONFIG_QUICK_CHECKSUM
-	/* 3:compute whole checksum */
-	checksum = (crc_counts == 1) ? crc_array[0]
-	           : crc32_rk(0, (unsigned char *)crc_array,
-	                      sizeof(uint32_t) * crc_counts);
-	printf("whole checksum:0x%08x\n", checksum);
-	free(crc_array);
-#else
-	printf("whole checksum:0x%016llx\n", checksum);
-#endif
-	free(buf);
-
-	fclose(fp);
-	return 0;
-}

commit fc474da559677770b90ad295d5331144c52c5a98
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Nov 5 12:21:22 2019 +0800

    lib: sha256: add sha256_csum()
    
    Change-Id: I3b053f9c07df0d124cdbde9f905e309bcd11c84e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/u-boot/sha256.h b/include/u-boot/sha256.h
index 9aa1251789..e63f3365e9 100644
--- a/include/u-boot/sha256.h
+++ b/include/u-boot/sha256.h
@@ -21,5 +21,7 @@ void sha256_finish(sha256_context * ctx, uint8_t digest[SHA256_SUM_LEN]);
 
 void sha256_csum_wd(const unsigned char *input, unsigned int ilen,
 		unsigned char *output, unsigned int chunk_sz);
+void sha256_csum(const unsigned char *input, unsigned int ilen,
+		 unsigned char *output);
 
 #endif /* _SHA256_H */
diff --git a/lib/sha256.c b/lib/sha256.c
index 7f5a3618d0..251825ce0f 100644
--- a/lib/sha256.c
+++ b/lib/sha256.c
@@ -257,6 +257,19 @@ void sha256_finish(sha256_context * ctx, uint8_t digest[32])
 	PUT_UINT32_BE(ctx->state[7], digest, 28);
 }
 
+/*
+ * Output = SHA-256( input buffer ).
+ */
+void sha256_csum(const unsigned char *input, unsigned int ilen,
+		 unsigned char *output)
+{
+	sha256_context ctx;
+
+	sha256_starts(&ctx);
+	sha256_update(&ctx, input, ilen);
+	sha256_finish(&ctx, output);
+}
+
 /*
  * Output = SHA-256( input buffer ). Trigger the watchdog every 'chunk_sz'
  * bytes of input processed.

commit c6666740ee3b51c3e102bfbaf1ab95b78df29246
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Oct 24 15:48:46 2019 +0800

    common: android/rkimg: remove/clean android a/b (slot) code
    
    - the partition disk layer takes over the responsibility of slot suffix
      appending, we remove relative code to make file clean;
    - put android a/b code together and name them to be eary understood,
      this makes file esay to read.
    
    Change-Id: Id8c838da682ce6098bd7192d7d7c64269f4e86ba
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/cmd/boot_android.c b/cmd/boot_android.c
index 6ff298e959..01ee3c0332 100755
--- a/cmd/boot_android.c
+++ b/cmd/boot_android.c
@@ -755,7 +755,6 @@ int do_avb_flow(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 		load_address = CONFIG_SYS_LOAD_ADDR;
 		rk_avb_ab_slot_select(ops->ab_ops, boot_slot_select);
 		strcat(slot_partition[1], requested_partitions[1]);
-		strcat(slot_partition[1], boot_slot_select);
 		printf("%s\n", slot_partition[1]);
 		ops->get_unique_guid_for_partition(ops,
 						   slot_partition[1],
@@ -767,7 +766,7 @@ int do_avb_flow(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 		strcat(root_data, " ");
 		strcat(root_data, command_line);
 		env_set("bootargs", root_data);
-		if (android_avb_boot_flow(boot_slot_select, load_address)) {
+		if (android_avb_boot_flow(load_address)) {
 			printf("Cannot boot the system, goto the fastboot!\n");
 			avb_ops_user_free(ops);
 			goto fail;
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 747fae1887..f4cc636c65 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -74,25 +74,104 @@ static int get_partition_unique_uuid(char *partition,
 
 	return 0;
 }
-#endif
 
-char *android_str_append(char *base_name, char *slot_suffix)
+static void reset_cpu_if_android_ab(void)
+{
+	printf("Reset in AB system.\n");
+	flushc();
+	/*
+	 * Since we use the retry-count in ab system, then can
+	 * try reboot if verify fail until the retry-count is
+	 * equal to zero.
+	 */
+	reset_cpu(0);
+}
+
+static void update_root_uuid_if_android_ab(void)
+{
+	/*
+	 * In android a/b & avb process, the system.img is mandory and the
+	 * "root=" will be added in vbmeta.img.
+	 *
+	 * In linux a/b & avb process, the system is NOT mandory and the
+	 * "root=" will not be added in vbmeta.img but in kernel dts bootargs.
+	 * (Parsed and droped late, i.e. "root=" is not available now/always).
+	 *
+	 * To compatible with the above two processes, test the existence of
+	 * "root=" and create it for linux ab & avb.
+	 */
+	char root_partuuid[70] = "root=PARTUUID=";
+	char *boot_args = env_get("bootargs");
+	char guid_buf[UUID_SIZE] = {0};
+
+	if (!strstr(boot_args, "root=")) {
+		get_partition_unique_uuid(ANDROID_PARTITION_SYSTEM,
+					  guid_buf, UUID_SIZE);
+		strcat(root_partuuid, guid_buf);
+		env_update("bootargs", root_partuuid);
+	}
+}
+
+static int decrease_tries_if_android_ab(char *slot_suffix)
 {
-	char *part_name;
-	size_t part_name_len;
-
-	part_name_len = strlen(base_name) + 1;
-	if (slot_suffix)
-		part_name_len += strlen(slot_suffix);
-	part_name = malloc(part_name_len);
-	if (!part_name)
-		return NULL;
-	strcpy(part_name, base_name);
-	if (slot_suffix && (slot_suffix[0] != '\0'))
-		strcat(part_name, slot_suffix);
-
-	return part_name;
+	AvbABData ab_data_orig;
+	AvbABData ab_data;
+	AvbOps *ops;
+	size_t slot_index = 0;
+
+	/* TODO: get from pre-loader or misc partition */
+	if (rk_avb_get_current_slot(slot_suffix)) {
+		printf("rk_avb_get_current_slot() failed\n");
+		return -1;
+	}
+
+	if (!strncmp(slot_suffix, "_a", 2))
+		slot_index = 0;
+	else if (!strncmp(slot_suffix, "_b", 2))
+		slot_index = 1;
+	else
+		slot_index = 0;
+
+	ops = avb_ops_user_new();
+	if (!ops) {
+		printf("avb_ops_user_new() failed!\n");
+		return -1;
+	}
+
+	if (load_metadata(ops->ab_ops, &ab_data, &ab_data_orig)) {
+		printf("Can not load metadata\n");
+		return -1;
+	}
+
+	/* ... and decrement tries remaining, if applicable. */
+	if (!ab_data.slots[slot_index].successful_boot &&
+	    ab_data.slots[slot_index].tries_remaining > 0)
+		ab_data.slots[slot_index].tries_remaining -= 1;
+
+	if (save_metadata_if_changed(ops->ab_ops, &ab_data, &ab_data_orig)) {
+		printf("Can not save metadata\n");
+		return -1;
+	}
+
+	if (slot_suffix[0] != '_') {
+#ifndef CONFIG_ANDROID_AVB
+		printf("###There is no bootable slot, bring up lastboot!###\n");
+		if (rk_get_lastboot() == 1)
+			memcpy(slot_suffix, "_b", 2);
+		else if (rk_get_lastboot() == 0)
+			memcpy(slot_suffix, "_a", 2);
+		else
+#endif
+			return -1;
+	}
+
+	return 0;
 }
+#else
+static inline void reset_cpu_if_android_ab(void) {}
+static inline void update_root_uuid_if_android_ab(void) {}
+static inline int decrease_tries_if_android_ab(char *slot_suffix) { return 0; }
+#endif
 
 int android_bootloader_message_load(
 	struct blk_desc *dev_desc,
@@ -209,35 +288,6 @@ static const char *android_boot_mode_str(enum android_boot_mode mode)
 	return NULL;
 }
 
-static int android_part_get_info_by_name_suffix(struct blk_desc *dev_desc,
-						const char *base_name,
-						const char *slot_suffix,
-						disk_partition_t *part_info)
-{
-	char *part_name;
-	int part_num;
-	size_t part_name_len;
-
-	part_name_len = strlen(base_name) + 1;
-	if (slot_suffix)
-		part_name_len += strlen(slot_suffix);
-	part_name = malloc(part_name_len);
-	if (!part_name)
-		return -1;
-	strcpy(part_name, base_name);
-	if (slot_suffix && (slot_suffix[0] != '\0'))
-		strcat(part_name, slot_suffix);
-
-	part_num = part_get_info_by_name(dev_desc, part_name, part_info);
-	if (part_num < 0) {
-		debug("ANDROID: Could not find partition \"%s\"\n", part_name);
-		part_num = -1;
-	}
-
-	free(part_name);
-	return part_num;
-}
-
 static int android_bootloader_boot_bootloader(void)
 {
 	const char *fastboot_cmd = env_get("fastbootcmd");
@@ -255,9 +305,8 @@ static int android_bootloader_get_fdt(const char *part_name,
 		const char *load_file_name)
 {
 	struct blk_desc *dev_desc;
-	disk_partition_t boot_part_info;
+	disk_partition_t part_info;
 	char *fdt_addr = NULL;
-	char slot_suffix[5] = {0};
 	char dev_part[3] = {0};
 	loff_t bytes = 0;
 	loff_t pos = 0;
@@ -272,24 +321,11 @@ static int android_bootloader_get_fdt(const char *part_name,
 		return -1;
 	}
 
-	memset(&boot_part_info, 0, sizeof(boot_part_info));
-
-#ifdef CONFIG_RK_AVB_LIBAVB_USER
-	if (rk_avb_get_current_slot(slot_suffix)) {
-		printf("ANDROID: Get Current Slot error.\n");
-		return -1;
-	}
-
-	part_num = android_part_get_info_by_name_suffix(dev_desc,
-					     part_name,
-					     slot_suffix, &boot_part_info);
-#else
-	part_num = part_get_info_by_name(dev_desc, part_name, &boot_part_info);
+	part_num = part_get_info_by_name(dev_desc, part_name, &part_info);
 	if (part_num < 0) {
 		printf("ANDROID: Could not find partition \"%s\"\n", part_name);
 		return -1;
 	}
-#endif
 
 	snprintf(dev_part, ARRAY_SIZE(dev_part), ":%x", part_num);
 	if (fs_set_blk_dev_with_part(dev_desc, part_num))
@@ -731,7 +767,7 @@ __weak int board_select_fdt_index(ulong dt_table_hdr)
 
 static int android_get_dtbo(ulong *fdt_dtbo,
 			    const struct andr_img_hdr *hdr,
-			    int *index)
+			    int *index, int boot_mode)
 {
 	struct dt_table_header *dt_hdr = NULL;
 	struct blk_desc *dev_desc;
@@ -745,27 +781,11 @@ static int android_get_dtbo(ulong *fdt_dtbo,
 	int ret;
 
 	/* Get partition according to boot mode */
-	if (rockchip_get_boot_mode() == BOOT_MODE_RECOVERY)
+	if (boot_mode == BOOT_MODE_RECOVERY)
 		part_name = PART_RECOVERY;
 	else
 		part_name = PART_DTBO;
 
-#ifdef CONFIG_ANDROID_AB
-	char slot_suffix[3] = {0};
-	char *part_name_temp = PART_DTBO;
-
-	if (rk_avb_get_current_slot(slot_suffix)) {
-		printf("%s: rk_avb_get_current_slot failed !\n", __func__);
-		return -ENODEV;
-	}
-	part_name = android_str_append(part_name_temp, slot_suffix);
-	if (!part_name) {
-		printf("%s: android_str_append failed !\n", __func__);
-		return -EINVAL;
-	}
-	debug("%s: part_name=%s\n", __func__, part_name);
-#endif
-
 	/* Get partition info */
 	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {
@@ -870,31 +890,20 @@ int android_fdt_overlay_apply(void *fdt_addr)
 	char buf[32] = {0};
 	u32 blk_cnt;
 	ulong fdt_dtbo = -1;
+	int boot_mode;
 	int index = -1;
 	int ret;
 
-	/* Get partition according to boot mode */
-	if (rockchip_get_boot_mode() == BOOT_MODE_RECOVERY)
+	boot_mode = rockchip_get_boot_mode();
+#ifdef CONFIG_ANDROID_AB
+	if (boot_mode == BOOT_MODE_RECOVERY)
+		boot_mode = BOOT_MODE_NORMAL;
+#endif
+	if (boot_mode == BOOT_MODE_RECOVERY)
 		part_name = PART_RECOVERY;
 	else
 		part_name = PART_BOOT;
 
-#ifdef CONFIG_ANDROID_AB
-	char slot_suffix[3] = {0};
-	char *part_name_temp = PART_BOOT;
-
-	if (rk_avb_get_current_slot(slot_suffix)) {
-		printf("%s: rk_avb_get_current_slot failed !\n", __func__);
-		return -ENODEV;
-	}
-	part_name = android_str_append(part_name_temp, slot_suffix);
-	if (!part_name) {
-		printf("%s: android_str_append failed !\n", __func__);
-		return -EINVAL;
-	}
-	printf("%s: part_name=%s\n", __func__, part_name);
-#endif
-
 	/* Get partition info */
 	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {
@@ -936,7 +945,7 @@ int android_fdt_overlay_apply(void *fdt_addr)
 		goto out;
 	}
 
-	ret = android_get_dtbo(&fdt_dtbo, (void *)hdr, &index);
+	ret = android_get_dtbo(&fdt_dtbo, (void *)hdr, &index, boot_mode);
 	if (!ret) {
 		phys_size_t fdt_size;
 		/* Must incease size before overlay */
@@ -969,16 +978,12 @@ out:
 
 static int load_android_image(struct blk_desc *dev_desc,
 			      char *boot_partname,
-			      char *slot_suffix,
 			      unsigned long *load_address)
 {
 	disk_partition_t boot_part;
 	int ret, part_num;
 
-	part_num = android_part_get_info_by_name_suffix(dev_desc,
-							boot_partname,
-							slot_suffix,
-							&boot_part);
+	part_num = part_get_info_by_name(dev_desc, boot_partname, &boot_part);
 	if (part_num < 0) {
 		printf("%s: Can't find part: %s\n", __func__, boot_partname);
 		return -1;
@@ -1036,58 +1041,9 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 
 	printf("ANDROID: reboot reason: \"%s\"\n", android_boot_mode_str(mode));
 
-#ifdef CONFIG_ANDROID_AB
-	/*TODO: get from pre-loader or misc partition*/
-	if (rk_avb_get_current_slot(slot_suffix)) {
-		printf("rk_avb_get_current_slot() failed\n");
+	/* Get current slot_suffix */
+	if (decrease_tries_if_android_ab(slot_suffix))
 		return -1;
-	}
-
-	AvbOps *ops;
-	AvbABData ab_data;
-	AvbABData ab_data_orig;
-	size_t slot_index_to_boot = 0;
-
-	if (!strncmp(slot_suffix, "_a", 2))
-		slot_index_to_boot = 0;
-	else if (!strncmp(slot_suffix, "_b", 2))
-		slot_index_to_boot = 1;
-	else
-		slot_index_to_boot = 0;
-	ops = avb_ops_user_new();
-	if (ops == NULL) {
-		printf("avb_ops_user_new() failed!\n");
-		return -1;
-	}
-
-	if(load_metadata(ops->ab_ops, &ab_data, &ab_data_orig)) {
-		printf("Can not load metadata\n");
-		return -1;
-	}
-
-	/* ... and decrement tries remaining, if applicable. */
-	if (!ab_data.slots[slot_index_to_boot].successful_boot &&
-		ab_data.slots[slot_index_to_boot].tries_remaining > 0) {
-		ab_data.slots[slot_index_to_boot].tries_remaining -= 1;
-	}
-
-	if (save_metadata_if_changed(ops->ab_ops, &ab_data, &ab_data_orig)) {
-		printf("Can not save metadata\n");
-		return -1;
-	}
-
-	if (slot_suffix[0] != '_') {
-#ifndef CONFIG_ANDROID_AVB
-		printf("###There is no bootable slot, bring up lastboot!###\n");
-		if (rk_get_lastboot() == 1)
-			memcpy(slot_suffix, "_b", 2);
-		else if(rk_get_lastboot() == 0)
-			memcpy(slot_suffix, "_a", 2);
-		else
-#endif
-			return -1;
-	}
-#endif
 
 	switch (mode) {
 	case ANDROID_BOOT_MODE_NORMAL:
@@ -1117,7 +1073,6 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 
 #ifdef CONFIG_ANDROID_AVB
 	uint8_t vboot_flag = 0;
-	char vbmeta_partition[9] = {0};
 	disk_partition_t vbmeta_part_info;
 
 	if (trusty_read_vbootkey_enable_flag(&vboot_flag)) {
@@ -1130,29 +1085,20 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 		if (android_slot_verify(boot_partname, &load_address,
 					slot_suffix)) {
 			printf("AVB verify failed\n");
-#ifdef CONFIG_ANDROID_AB
-			printf("Reset in AB system.\n");
-			flushc();
-			/*
-			 * Since we use the retry-count in ab system, then can
-			 * try reboot if verify fail until the retry-count is
-			 * equal to zero.
-			 */
-			reset_cpu(0);
-#endif
+			reset_cpu_if_android_ab();
+
 			return -1;
 		}
 	} else {
-		strcat(vbmeta_partition, ANDROID_PARTITION_VBMETA);
-		strcat(vbmeta_partition, slot_suffix);
-		part_num = part_get_info_by_name(dev_desc, vbmeta_partition,
+		part_num = part_get_info_by_name(dev_desc,
+						 ANDROID_PARTITION_VBMETA,
 						 &vbmeta_part_info);
 		if (part_num < 0) {
 			printf("Not AVB images, AVB skip\n");
 			env_update("bootargs",
 				   "androidboot.verifiedbootstate=orange");
 			if (load_android_image(dev_desc, boot_partname,
-					       slot_suffix, &load_address)) {
+					       &load_address)) {
 				printf("Android image load failed\n");
 				return -1;
 			}
@@ -1161,16 +1107,8 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 			if (android_slot_verify(boot_partname, &load_address,
 						slot_suffix)) {
 				printf("AVB verify failed\n");
-#ifdef CONFIG_ANDROID_AB
-				printf("Reset in AB system.\n");
-				flushc();
-				/*
-				 * Since we use the retry-count in ab system,
-				 * then can try reboot if verify fail until
-				 * the retry-count is equal to zero.
-				 */
-				reset_cpu(0);
-#endif
+				reset_cpu_if_android_ab();
+
 				return -1;
 			}
 		}
@@ -1180,32 +1118,12 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	 * 2. Load the boot/recovery from the desired "boot" partition.
 	 * Determine if this is an AOSP image.
 	 */
-	if (load_android_image(dev_desc, boot_partname,
-			       slot_suffix, &load_address)) {
+	if (load_android_image(dev_desc, boot_partname, &load_address)) {
 		printf("Android image load failed\n");
 		return -1;
 	}
 #endif
-
-#ifdef CONFIG_ANDROID_AB
-	/* In android a/b & avb process, the "root=" will be add which parameter
-	 * is in vbmeta.In linux a/b & avb process, the "root=" must be add by
-	 * follow code. To be compatible with the above two processes, test it
-	 * is necessary to add "root=".
-	 */
-	char root_partition[20] = {0};
-	char guid_buf[UUID_SIZE] = {0};
-	char root_partuuid[70] = "root=PARTUUID=";
-	char *boot_args = env_get("bootargs");
-
-	if (!strstr(boot_args, "root=")) {
-		strcat(root_partition, ANDROID_PARTITION_SYSTEM);
-		strcat(root_partition, slot_suffix);
-		get_partition_unique_uuid(root_partition, guid_buf, UUID_SIZE);
-		strcat(root_partuuid, guid_buf);
-		env_update("bootargs", root_partuuid);
-	}
-#endif
+	update_root_uuid_if_android_ab();
 
 	/* Set Android root variables. */
 	env_set_ulong("android_root_devnum", dev_desc->devnum);
@@ -1251,24 +1169,33 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	return -1;
 }
 
-int android_avb_boot_flow(char *slot_suffix, unsigned long kernel_address)
+int android_avb_boot_flow(unsigned long kernel_address)
 {
 	struct blk_desc *dev_desc;
 	disk_partition_t boot_part_info;
 	int ret;
+
 	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {
 		printf("%s: dev_desc is NULL!\n", __func__);
 		return -1;
 	}
+
 	/* Load the kernel from the desired "boot" partition. */
-	android_part_get_info_by_name_suffix(dev_desc,
-					     ANDROID_PARTITION_BOOT,
-					     slot_suffix, &boot_part_info);
-	ret = android_image_load(dev_desc, &boot_part_info, kernel_address,
-				 -1UL);
-	if (ret < 0)
+	ret = part_get_info_by_name(dev_desc, ANDROID_PARTITION_BOOT,
+				    &boot_part_info);
+	if (ret < 0) {
+		printf("%s: failed to get boot part\n", __func__);
 		return ret;
+	}
+
+	ret = android_image_load(dev_desc, &boot_part_info,
+				 kernel_address, -1UL);
+	if (ret < 0) {
+		printf("Android avb boot failed, error %d.\n", ret);
+		return ret;
+	}
+
 	android_bootloader_boot_kernel(kernel_address);
 
 	/* TODO: If the kernel doesn't boot mark the selected slot as bad. */
@@ -1280,17 +1207,25 @@ int android_boot_flow(unsigned long kernel_address)
 	struct blk_desc *dev_desc;
 	disk_partition_t boot_part_info;
 	int ret;
+
 	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {
 		printf("%s: dev_desc is NULL!\n", __func__);
 		return -1;
 	}
 	/* Load the kernel from the desired "boot" partition. */
-	part_get_info_by_name(dev_desc, ANDROID_PARTITION_BOOT, &boot_part_info);
+	ret = part_get_info_by_name(dev_desc, ANDROID_PARTITION_BOOT,
+				    &boot_part_info);
+	if (ret < 0) {
+		printf("%s: failed to get boot part\n", __func__);
+		return ret;
+	}
+
 	ret = android_image_load(dev_desc, &boot_part_info, kernel_address,
 				 -1UL);
 	if (ret < 0)
 		return ret;
+
 	android_bootloader_boot_kernel(kernel_address);
 
 	/* TODO: If the kernel doesn't boot mark the selected slot as bad. */
diff --git a/include/android_bootloader.h b/include/android_bootloader.h
index 15498b7fe3..d8f6114e70 100644
--- a/include/android_bootloader.h
+++ b/include/android_bootloader.h
@@ -44,12 +44,11 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 /** android_avb_boot_flow - Execute the Android Bootloader Flow.
  * This fuction use to select and boot kernel through ab_suffix.
  *
- * @ab_suffix:		the boot slot to boot from.
  * @kernel_address:	address where to load the kernel if needed.
  *
  * @return a negative number in case of error, otherwise it doesn't return.
  */
-int android_avb_boot_flow(char *ab_suffix, unsigned long kernel_address);
+int android_avb_boot_flow(unsigned long kernel_address);
 
 /** android_assemble_cmdline - Assemble args for cmdline.
  *

commit f2b98302da1fc9738e89f112be65db250857d685
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Oct 24 15:59:19 2019 +0800

    rockchip: resource: remove android a/b slot append
    
    The partition disk layer takes over the responsibility of
    slot suffix appending.
    
    Change-Id: Ia02f5b8635676d49ec60eec7d3930740f2ba5ee4
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index ed51223f08..848700a267 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -257,21 +257,6 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 		boot_partname = PART_RECOVERY;
 #endif
 
-	/* Get slot suffix and append it for A/B system */
-#ifdef CONFIG_ANDROID_AB
-	char slot_suffix[3] = {0};
-
-	if (rk_avb_get_current_slot(slot_suffix)) {
-		ret = -ENODEV;
-		goto out;
-	}
-
-	boot_partname = android_str_append(boot_partname, slot_suffix);
-	if (!boot_partname) {
-		ret = -EINVAL;
-		goto out;
-	}
-#endif
 	ret = part_get_info_by_name(dev_desc, boot_partname, &part_info);
 	if (ret < 0) {
 		printf("%s: failed to get %s part, ret=%d\n",

commit bd4d909bda65c7c94f125b157334b6fb46c119be
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Oct 24 15:41:37 2019 +0800

    disk: part: auto append android a/b slot suffix when query partition
    
    This patch takes over the responsibility of slot suffix appending from
    developer to framework on querying partition, it makes slot suffix
    invisible for developers.
    
    Change-Id: I33e1e8f6611232c4797d68b7b844a70db88a3eb8
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/disk/part.c b/disk/part.c
index 81c1972fe2..6b8942fe68 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -12,6 +12,10 @@
 #include <malloc.h>
 #include <part.h>
 #include <ubifs_uboot.h>
+#ifdef CONFIG_ANDROID_AB
+#include <android_avb/avb_ops_user.h>
+#include <android_avb/rk_avb_ops_user.h>
+#endif
 
 #undef	PART_DEBUG
 
@@ -667,8 +671,56 @@ cleanup:
 	return ret;
 }
 
+#ifdef CONFIG_ANDROID_AB
+/*
+ * For android A/B system, we append the current slot suffix quietly,
+ * this takes over the responsibility of slot suffix appending from
+ * developer to framework.
+ */
+int part_get_info_by_name(struct blk_desc *dev_desc, const char *name,
+			  disk_partition_t *info)
+{
+	struct part_driver *part_drv;
+	char name_slot[32] = {0};
+	int none_slot_try = 1;
+	int ret, i;
+
+	part_drv = part_driver_lookup_type(dev_desc);
+	if (!part_drv)
+		return -1;
+
+	/* 1. Query partition with A/B slot suffix */
+	if (rk_avb_append_part_slot(name, name_slot))
+		return -1;
+
+retry:
+	debug("## Query partition(%d): %s\n", none_slot_try, name_slot);
+
+	for (i = 1; i < part_drv->max_entries; i++) {
+		ret = part_drv->get_info(dev_desc, i, info);
+		if (ret != 0) {
+			/* no more entries in table */
+			break;
+		}
+		if (strcmp(name_slot, (const char *)info->name) == 0) {
+			/* matched */
+			return i;
+		}
+	}
+
+	/* 2. Query partition without A/B slot suffix if above failed */
+	if (none_slot_try) {
+		none_slot_try = 0;
+		strcpy(name_slot, name);
+		goto retry;
+	}
+
+	return -1;
+}
+
+#else
 int part_get_info_by_name(struct blk_desc *dev_desc, const char *name,
-	disk_partition_t *info)
+			  disk_partition_t *info)
 {
 	struct part_driver *part_drv;
 	int ret;
@@ -691,6 +743,7 @@ int part_get_info_by_name(struct blk_desc *dev_desc, const char *name,
 
 	return -1;
 }
+#endif
 
 void part_set_generic_name(const struct blk_desc *dev_desc,
 	int part_num, char *name)

commit eb89f0a81d5f3acfd204aba421262c29b038beef
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Oct 24 15:39:05 2019 +0800

    lib: avb: add partition slot append interface
    
    Dump current slot information is helpful.
    
    Change-Id: I872c29b9a67860703951a4e88e9549be17b94eed
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/android_avb/rk_avb_ops_user.h b/include/android_avb/rk_avb_ops_user.h
index 7317f1795b..1d1b8c415d 100644
--- a/include/android_avb/rk_avb_ops_user.h
+++ b/include/android_avb/rk_avb_ops_user.h
@@ -76,6 +76,17 @@ int rk_avb_set_slot_active(unsigned int *slot_number);
  */
 int rk_avb_get_current_slot(char *select_slot);
 
+/**
+ * Append current slot to given partition name
+ *
+ * @param part_name	partition name
+ * @param slot		given slot suffix, auto append current slot if NULL
+ * @param new_name	partition name with slot suffix appended
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int rk_avb_append_part_slot(const char *part_name, char *new_name);
+
 /**
  * The android things defines permanent attributes to
  * store PSK_public, product id. We can use this function
diff --git a/lib/avb/rk_avb_user/rk_avb_ops_user.c b/lib/avb/rk_avb_user/rk_avb_ops_user.c
index e3a154f89e..63a3d10e19 100644
--- a/lib/avb/rk_avb_user/rk_avb_ops_user.c
+++ b/lib/avb/rk_avb_user/rk_avb_ops_user.c
@@ -112,6 +112,7 @@ AvbABFlowResult rk_avb_ab_slot_select(AvbABOps* ab_ops,char* select_slot)
 	AvbIOResult io_ret = AVB_IO_RESULT_OK;
 	AvbABData ab_data;
 	size_t slot_index_to_boot;
+	static int last_slot_index = -1;
 
 	io_ret = ab_ops->read_ab_metadata(ab_ops, &ab_data);
 	if (io_ret != AVB_IO_RESULT_OK) {
@@ -140,6 +141,14 @@ AvbABFlowResult rk_avb_ab_slot_select(AvbABOps* ab_ops,char* select_slot)
 	} else if(slot_index_to_boot == 1) {
 		strcpy(select_slot, "_b");
 	}
+
+	if (last_slot_index != slot_index_to_boot) {
+		last_slot_index = slot_index_to_boot;
+		printf("A/B-slot: %s, successful: %d, tries-remain: %d\n",
+		       select_slot,
+		       ab_data.slots[slot_index_to_boot].successful_boot,
+		       ab_data.slots[slot_index_to_boot].tries_remaining);
+	}
 out:
 	return ret;
 }
@@ -172,6 +181,26 @@ int rk_avb_get_current_slot(char *select_slot)
 	return ret;
 }
 
+int rk_avb_append_part_slot(const char *part_name, char *new_name)
+{
+	char slot_suffix[3] = {0};
+
+	if (!strcmp(part_name, "misc")) {
+		strcat(new_name, part_name);
+		return 0;
+	}
+
+	if (rk_avb_get_current_slot(slot_suffix)) {
+		printf("%s: failed to get slot suffix !\n", __func__);
+		return -1;
+	}
+
+	strcpy(new_name, part_name);
+	strcat(new_name, slot_suffix);
+
+	return 0;
+}
+
 int rk_avb_read_permanent_attributes(uint8_t *attributes, uint32_t size)
 {
 #ifdef CONFIG_OPTEE_CLIENT

commit 0ed06f16e27e9488f8e89a425dd9c8695d493a20
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 21 10:09:21 2019 +0800

    rockchip: support boot from U-disk
    
    - The U-disk boot is only supported from U-Boot, the earlier preloader
      doesn't support it;
    - MMC1(SD) has higher priority than U-disk;
    - Always boot into recovery mode and deliver "usbfwupdate" to cmdline;
    - Usb driver may depend on clock/regulator init, so behind of them;
    - Suggest to add ./dts/kern.dtb file to promise the kernel dtb always
      to be loaded successfully even the native images are all damaged.
    
    Change-Id: Ibbb2a061a727752277ac1b80abf362de5d94cca2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 7c9ea4d1fc..191097e717 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -573,6 +573,13 @@ config ROCKCHIP_RESOURCE_IMAGE
 	  This enables support to get dtb or logo files from
 	  rockchip resource image format partition.
 
+config ROCKCHIP_USB_BOOT
+	bool "Enable support for rockchip U-disk boot"
+	depends on USB
+	default n
+	help
+	  This enables support for rockchip U-disk boot.
+
 config ROCKCHIP_EARLY_DISTRO_DTB
 	bool "Enable support for distro dtb early"
 	depends on DISTRO_DEFAULTS && USING_KERNEL_DTB
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 523bcfc599..bee191d466 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -7,6 +7,8 @@
 #include <common.h>
 #include <amp.h>
 #include <bidram.h>
+#include <boot_rkimg.h>
+#include <cli.h>
 #include <clk.h>
 #include <console.h>
 #include <debug_uart.h>
@@ -159,6 +161,43 @@ int fb_set_reboot_flag(void)
 }
 #endif
 
+#ifdef CONFIG_ROCKCHIP_USB_BOOT
+static int boot_from_udisk(void)
+{
+	struct blk_desc *desc;
+	char *devtype;
+	char *devnum;
+
+	devtype = env_get("devtype");
+	devnum = env_get("devnum");
+
+	/* Booting priority: mmc1 > udisk */
+	if (!strcmp(devtype, "mmc") && !strcmp(devnum, "1"))
+		return 0;
+
+	if (!run_command("usb start", -1)) {
+		desc = blk_get_devnum_by_type(IF_TYPE_USB, 0);
+		if (!desc) {
+			printf("No usb device found\n");
+			return -ENODEV;
+		}
+
+		if (!run_command("rkimgtest usb 0", -1)) {
+			rockchip_set_bootdev(desc);
+			env_set("devtype", "usb");
+			env_set("devnum", "0");
+			env_set("reboot_mode", "recovery-usb");
+			printf("Boot from usb 0\n");
+		} else {
+			printf("No usb dev 0 found\n");
+			return -ENODEV;
+		}
+	}
+
+	return 0;
+}
+#endif
+
 int board_late_init(void)
 {
 	rockchip_set_ethaddr();
@@ -166,6 +205,9 @@ int board_late_init(void)
 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0)
 	setup_boot_mode();
 #endif
+#ifdef CONFIG_ROCKCHIP_USB_BOOT
+	boot_from_udisk();
+#endif
 #ifdef CONFIG_DM_CHARGE_DISPLAY
 	charge_display();
 #endif
@@ -298,19 +340,31 @@ int init_kernel_dtb(void)
 
 	ret = rockchip_read_dtb_file((void *)fdt_addr);
 	if (ret < 0) {
-		printf("Read kernel dtb failed, ret=%d\n", ret);
-		return 0;
+		if (!fdt_check_header(gd->fdt_blob_kern)) {
+			fdt_addr = (ulong)memalign(ARCH_DMA_MINALIGN,
+					fdt_totalsize(gd->fdt_blob_kern));
+			if (!fdt_addr)
+				return -ENOMEM;
+
+			memcpy((void *)fdt_addr, gd->fdt_blob_kern,
+			       fdt_totalsize(gd->fdt_blob_kern));
+			printf("DTB: embedded kern.dtb\n");
+		} else {
+			printf("Failed to get kernel dtb, ret=%d\n", ret);
+			return ret;
+		}
 	}
 
+	gd->fdt_blob = (void *)fdt_addr;
+
 	/*
 	 * There is a phandle miss match between U-Boot and kernel dtb node,
 	 * the typical is cru phandle, we fixup it in U-Boot live dt nodes.
 	 */
-	phandles_fixup((void *)fdt_addr);
+	phandles_fixup((void *)gd->fdt_blob);
 
-	of_live_build((void *)fdt_addr, (struct device_node **)&gd->of_root);
-	dm_scan_fdt((void *)fdt_addr, false);
-	gd->fdt_blob = (void *)fdt_addr;
+	of_live_build((void *)gd->fdt_blob, (struct device_node **)&gd->of_root);
+	dm_scan_fdt((void *)gd->fdt_blob, false);
 
 	/* Reserve 'reserved-memory' */
 	ret = boot_fdt_add_sysmem_rsv_regions((void *)gd->fdt_blob);
diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index 7d9bd312a0..9227786ce0 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -157,7 +157,7 @@ void rockchip_dnl_mode_check(void)
 			do_reset(NULL, 0, 0, NULL);
 		} else {
 			printf("entering recovery mode!\n");
-			env_set("reboot_mode", "recovery");
+			env_set("reboot_mode", "recovery-key");
 		}
 	} else if (is_hotkey(HK_FASTBOOT)) {
 		env_set("reboot_mode", "fastboot");
diff --git a/cmd/boot_android.c b/cmd/boot_android.c
index 255e4921fe..6ff298e959 100755
--- a/cmd/boot_android.c
+++ b/cmd/boot_android.c
@@ -675,7 +675,7 @@ int do_avb_flow(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 		 */
 		char *env_rebootmode = env_get("reboot_mode");
 
-		if (env_rebootmode && !strcmp("recovery", env_rebootmode))
+		if (env_rebootmode && !strncmp("recovery", env_rebootmode, 8))
 			printf("Enter recovery mode by command 'reboot recovery'!\n");
 		else
 			mode_cmdline = "skip_initramfs";
diff --git a/cmd/bootrkp.c b/cmd/bootrkp.c
index 7418b669ed..121bb80579 100755
--- a/cmd/bootrkp.c
+++ b/cmd/bootrkp.c
@@ -103,10 +103,20 @@ static int do_rkimg_test(cmd_tbl_t *cmdtp, int flag, int argc,
 	}
 
 	if (buffer[0] == 0xFCDC8C3B) {
-		printf("Found IDB in SDcard\n");
 		ret = CMD_RET_SUCCESS;
-		if (0 == buffer[128 + 104 / 4]) /* TAG in IDB */
-			env_update("bootargs", "sdfwupdate");
+
+		if (!strcmp("mmc", argv[1]))
+			printf("Found IDB in SDcard\n");
+		else
+			printf("Found IDB in U-disk\n");
+
+		/* TAG in IDB */
+		if (0 == buffer[128 + 104 / 4]) {
+			if (!strcmp("mmc", argv[1]))
+				env_update("bootargs", "sdfwupdate");
+			else
+				env_update("bootargs", "usbfwupdate");
+		}
 	} else {
 		ret = CMD_RET_FAILURE;
 	}
diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 15eaf7a8b2..76bb6b0db6 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -255,9 +255,15 @@ int get_bootdev_type(void)
 	return type;
 }
 
+static struct blk_desc *dev_desc;
+
+void rockchip_set_bootdev(struct blk_desc *desc)
+{
+	dev_desc = desc;
+}
+
 struct blk_desc *rockchip_get_bootdev(void)
 {
-	static struct blk_desc *dev_desc = NULL;
 	int dev_type;
 	int devnum;
 
@@ -392,9 +398,12 @@ int rockchip_get_boot_mode(void)
 	 */
 	env_reboot_mode = env_get("reboot_mode");
 	if (env_reboot_mode) {
-		if (!strcmp(env_reboot_mode, "recovery")) {
+		if (!strcmp(env_reboot_mode, "recovery-key")) {
 			boot_mode = BOOT_MODE_RECOVERY;
 			printf("boot mode: recovery (key)\n");
+		} else if (!strcmp(env_reboot_mode, "recovery-usb")) {
+			boot_mode = BOOT_MODE_RECOVERY;
+			printf("boot mode: recovery (usb)\n");
 		} else if (!strcmp(env_reboot_mode, "fastboot")) {
 			boot_mode = BOOT_MODE_BOOTLOADER;
 			printf("boot mode: fastboot\n");
diff --git a/include/boot_rkimg.h b/include/boot_rkimg.h
index 14e077847c..3a14ab2ab4 100644
--- a/include/boot_rkimg.h
+++ b/include/boot_rkimg.h
@@ -36,6 +36,7 @@ int read_rockchip_image(struct blk_desc *dev_desc,
 			disk_partition_t *part_info, void *dst);
 
 struct blk_desc *rockchip_get_bootdev(void);
+void rockchip_set_bootdev(struct blk_desc *desc);
 
 /*
  * reboot into recovery and wipe data

commit 01f0422dca01f4b710ad8a4719ea9c3f070344c2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 21 19:21:55 2019 +0800

    common: bootm: skip usb_stop() if usb is boot device
    
    We may access usb at late sequence.
    
    Change-Id: I8e8b40fc7e1018fe279f384282481805bceb5daa
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/bootm.c b/common/bootm.c
index 564f8fe8c5..160c9b34cf 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -521,6 +521,13 @@ ulong bootm_disable_interrupts(void)
 {
 	ulong iflag;
 
+	/*
+	 * Do not go further if usb is boot device,
+	 * We may access usb at late sequence.
+	 */
+	if (!strcmp(env_get("devtype"), "usb"))
+		return 0;
+
 	/*
 	 * We have reached the point of no return: we are going to
 	 * overwrite all exception vector code, so we cannot easily

commit 5704c899ed54eefefdadfcb769555812e347da46
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 21 09:08:50 2019 +0800

    fdtdec: support pack "kern.dtb" to the end of u-boot.bin
    
    - It provides a way to promise kernel dtb can be loaded successfully
      even when the image is damaged.
    - This makes developers easily to add what they what just like a "U-Boot" dtb.
    - The kern.dtb file is pack into the end of u-boot.bin while ./dts/kern.dtb
      is exist.
    
    Change-Id: I93a36a9c65ea8719e5610cdcbcc7708e5337c53f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/Makefile b/Makefile
index c60ad289ab..ddea829dbf 100644
--- a/Makefile
+++ b/Makefile
@@ -904,13 +904,24 @@ u-boot.bin: u-boot-fit-dtb.bin FORCE
 else ifeq ($(CONFIG_OF_SEPARATE),y)
 ifeq ($(CONFIG_USING_KERNEL_DTB),y)
 u-boot-dtb.bin: u-boot-nodtb.bin dts/dt-spl.dtb FORCE
+	$(call if_changed,cat)
+
+ifneq ($(wildcard dts/kern.dtb),)
+u-boot-dtb-kern.bin: u-boot-dtb.bin FORCE
+	$(call if_changed,copy)
+u-boot.bin: u-boot-dtb-kern.bin dts/kern.dtb FORCE
+	$(call if_changed,cat)
 else
-u-boot-dtb.bin: u-boot-nodtb.bin dts/dt.dtb FORCE
+u-boot.bin: u-boot-dtb.bin FORCE
+	$(call if_changed,copy)
 endif
-	$(call if_changed,cat)
+else
 
+u-boot-dtb.bin: u-boot-nodtb.bin dts/dt.dtb FORCE
+	$(call if_changed,cat)
 u-boot.bin: u-boot-dtb.bin FORCE
 	$(call if_changed,copy)
+endif
 else
 u-boot.bin: u-boot-nodtb.bin FORCE
 	$(call if_changed,copy)
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index a8df46d23d..836985d143 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -83,6 +83,9 @@ typedef struct global_data {
 	struct udevice	*timer;		/* Timer instance for Driver Model */
 #endif
 
+#ifdef CONFIG_USING_KERNEL_DTB
+	const void *fdt_blob_kern;	/* Kernel dtb at the tail of u-boot.bin */
+#endif
 	const void *fdt_blob;		/* Our device tree, NULL if none */
 	void *new_fdt;			/* Relocated FDT */
 	unsigned long fdt_size;		/* Space reserved for relocated FDT */
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index a6e3bccb0a..589cec3e94 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -1284,6 +1284,11 @@ int fdtdec_setup(void)
 #  else
 	/* FDT is at end of image */
 	gd->fdt_blob = (ulong *)&_end;
+
+#    ifdef CONFIG_USING_KERNEL_DTB
+	gd->fdt_blob_kern =
+		(ulong *)((ulong)gd->fdt_blob + fdt_totalsize(gd->fdt_blob));
+#    endif
 #  endif
 # elif defined(CONFIG_OF_BOARD)
 	/* Allow the board to override the fdt address. */

commit 6069a2cc248ac8b0689477a68e47c20bfb555124
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 21 14:43:20 2019 +0800

    rockchip: resource: fix/optimise some code logic
    
    - alloc sysmem after load kernel dtb successfully;
    - allow distro kernel dtb to be loaded later than other
      resource file, that is not controlled by code condition
      "if (list_empty(&entrys_head))".
    
    Change-Id: If1657289a4f8980ad7d7a5df7da0e061aab21504
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 59a2332472..ed51223f08 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -845,22 +845,21 @@ int rockchip_read_dtb_file(void *fdt_addr)
 	char *dtb_name = DTB_FILE;
 	int size = -ENODEV;
 
-	if (list_empty(&entrys_head)) {
-		if (init_resource_list(NULL)) {
-			/* Load dtb from distro boot.img */
+	if (!get_file_info(NULL, dtb_name)) {
 #ifdef CONFIG_ROCKCHIP_EARLY_DISTRO_DTB
-			printf("Distro DTB: %s\n",
-			       CONFIG_ROCKCHIP_EARLY_DISTRO_DTB_PATH);
-			size = rockchip_read_distro_dtb_file(fdt_addr);
-			if (size < 0)
-				return size;
-			if (!sysmem_alloc_base(MEMBLK_ID_FDT,
-				(phys_addr_t)fdt_addr,
-				ALIGN(size, RK_BLK_SIZE) + CONFIG_SYS_FDT_PAD))
-				return -ENOMEM;
-#endif
+		/* Load dtb from distro boot.img */
+		printf("Distro DTB: %s\n",
+		       CONFIG_ROCKCHIP_EARLY_DISTRO_DTB_PATH);
+		size = rockchip_read_distro_dtb_file(fdt_addr);
+		if (size < 0)
 			return size;
-		}
+
+		if (!sysmem_alloc_base(MEMBLK_ID_FDT,
+			(phys_addr_t)fdt_addr,
+			ALIGN(size, RK_BLK_SIZE) + CONFIG_SYS_FDT_PAD))
+			return -ENOMEM;
+#endif
+		return -ENODEV;
 	}
 
 	/* Find dtb file according to hardware id(GPIO/ADC) */
@@ -887,10 +886,6 @@ int rockchip_read_dtb_file(void *fdt_addr)
 	if (size < 0)
 		return size;
 
-	if (!sysmem_alloc_base(MEMBLK_ID_FDT, (phys_addr_t)fdt_addr,
-			       ALIGN(size, RK_BLK_SIZE) + CONFIG_SYS_FDT_PAD))
-		return -ENOMEM;
-
 	size = rockchip_read_resource_file((void *)fdt_addr, dtb_name, 0, 0);
 	if (size < 0)
 		return size;
@@ -900,6 +895,10 @@ int rockchip_read_dtb_file(void *fdt_addr)
 		return -EBADF;
 	}
 
+	if (!sysmem_alloc_base(MEMBLK_ID_FDT, (phys_addr_t)fdt_addr,
+			       ALIGN(size, RK_BLK_SIZE) + CONFIG_SYS_FDT_PAD))
+		return -ENOMEM;
+
 	/* Apply DTBO */
 #if defined(CONFIG_CMD_DTIMG) && defined(CONFIG_OF_LIBFDT_OVERLAY)
 	android_fdt_overlay_apply((void *)fdt_addr);

commit bcf005ba08d3434002b07899eb22f336dde0f46b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Nov 1 11:01:24 2019 +0800

    lib: sysmem: no need to increase alloc size when base is 0
    
    Change-Id: Ia716956e1a0e980330d6a7f7eb6c89f91e133ddf
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/lib/sysmem.c b/lib/sysmem.c
index 485a26229d..761d820eed 100644
--- a/lib/sysmem.c
+++ b/lib/sysmem.c
@@ -393,7 +393,6 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 		 */
 		} else if (!base) {
 			base += ARCH_DMA_MINALIGN;
-			size += ARCH_DMA_MINALIGN;
 		} else if (base <= gd->bd->bi_dram[0].start) {
 			/*
 			 * On Rockchip platform:

commit 3ceae1099b4a573f6613e9d886ef713d6952f36b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 4 10:22:31 2019 +0800

    rockchip: param: fix get usable size error
    
    fixes: (ced10db rockchip: param: add SDRAM_MAX_SIZE as ram top limit)
    
    Change-Id: I9b27570116d931be484548c440df30f5026de1bd
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/param.c b/arch/arm/mach-rockchip/param.c
index 48b4edcf0a..d79ae89094 100644
--- a/arch/arm/mach-rockchip/param.c
+++ b/arch/arm/mach-rockchip/param.c
@@ -236,7 +236,8 @@ int param_parse_bootdev(char **devtype, char **devnum)
 
 static phys_size_t ddr_mem_get_usable_size(u64 base, u64 size)
 {
-	return (base + size >= SDRAM_MAX_SIZE) ? (SDRAM_MAX_SIZE - base) : size;
+	return (base + size >= CONFIG_SYS_SDRAM_BASE + SDRAM_MAX_SIZE) ?
+	       (CONFIG_SYS_SDRAM_BASE + SDRAM_MAX_SIZE - base) : size;
 }
 
 struct memblock *param_parse_ddr_mem(int *out_count)

commit d65bf0c630844cddb5105ca99ad00ca6dd50bbc3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Oct 31 16:26:24 2019 +0800

    lib: sysmem: fix alloc failed at 0x0 address
    
    The 0x0 address is usually allocated by 32-bit uncompressed kernel
    and this alloc action is just a peek. Due to LMB core doesn't support
    alloc at 0x0 address, we have to alloc the memblk backword a few bytes.
    
    This patch is mainly to avoid fail message from sysmem/LMB.
    
    Change-Id: I894ae2252a30a7690d10899484266191dfb12d15
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/lib/sysmem.c b/lib/sysmem.c
index 30b0a7a7f2..485a26229d 100644
--- a/lib/sysmem.c
+++ b/lib/sysmem.c
@@ -382,6 +382,18 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 			base = gd->start_addr_sp -
 					CONFIG_SYS_STACK_SIZE - size - 0x1000;
 
+		/*
+		 * The 0x0 address is usually allocated by 32-bit uncompressed
+		 * kernel and this alloc action is just a peek.
+		 *
+		 * Due to LMB core doesn't support alloc at 0x0 address, we have
+		 * to alloc the memblk backword a few bytes.
+		 *
+		 * ARCH_DMA_MINALIGN maybe a good choice.
+		 */
+		} else if (!base) {
+			base += ARCH_DMA_MINALIGN;
+			size += ARCH_DMA_MINALIGN;
 		} else if (base <= gd->bd->bi_dram[0].start) {
 			/*
 			 * On Rockchip platform:

commit ced10dbe1c0bcf64108ceb8f9435aa2130e0633d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Oct 31 14:52:01 2019 +0800

    rockchip: param: add SDRAM_MAX_SIZE as ram top limit
    
    This patch handles the boot fail for RK3288 4GB machine.
    
    Change-Id: I2be6e532120595a6c10e9e99a779d9ec32f48fb5
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/param.c b/arch/arm/mach-rockchip/param.c
index 6c944eb4d8..48b4edcf0a 100644
--- a/arch/arm/mach-rockchip/param.c
+++ b/arch/arm/mach-rockchip/param.c
@@ -234,6 +234,11 @@ int param_parse_bootdev(char **devtype, char **devnum)
 }
 #endif
 
+static phys_size_t ddr_mem_get_usable_size(u64 base, u64 size)
+{
+	return (base + size >= SDRAM_MAX_SIZE) ? (SDRAM_MAX_SIZE - base) : size;
+}
+
 struct memblock *param_parse_ddr_mem(int *out_count)
 {
 	struct udevice *dev;
@@ -261,7 +266,9 @@ struct memblock *param_parse_ddr_mem(int *out_count)
 
 		for (i = 0; i < count; i++) {
 			mem[i].base = t->u.ddr_mem.bank[i];
-			mem[i].size = t->u.ddr_mem.bank[i + count];
+			mem[i].size =
+			  ddr_mem_get_usable_size(t->u.ddr_mem.bank[i],
+						  t->u.ddr_mem.bank[i + count]);
 		}
 
 		*out_count = count;
@@ -293,7 +300,7 @@ struct memblock *param_parse_ddr_mem(int *out_count)
 
 	for (i = 0; i < count; i++) {
 		mem[i].base = CONFIG_SYS_SDRAM_BASE;
-		mem[i].size = ram.size;
+		mem[i].size = ddr_mem_get_usable_size(mem[i].base, ram.size);
 	}
 
 	*out_count = count;

commit f3ba630b34647965e3bd12c31b2920b425e8c40f
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Oct 30 16:37:54 2019 +0800

    mtd: mtd_blk: fix get: mtd error if device is nand
    
    Change-Id: I1cebba63cbabefa87fd67d98a4d93e151604626d
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index fe5eb63635..1c233c3658 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -184,6 +184,8 @@ static int mtd_blk_probe(struct udevice *udev)
 	memcpy(desc->product, mtd->name, strlen(mtd->name));
 	memcpy(desc->revision, "V1.00", sizeof("V1.00"));
 	if (mtd->type == MTD_NANDFLASH) {
+		if (desc->devnum == BLK_MTD_NAND)
+			mtd = dev_get_priv(udev->parent);
 		/*
 		 * Find the first useful block in the end,
 		 * and it is the end lba of the nand storage.

commit 4bac908b8b7bde152ea3e29051325393317ab781
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Oct 30 11:51:36 2019 +0800

    rockchip: spl-boot-order: move rk_nand_init() to the function end
    
    Since the nand driver is not standard dm driver in spl, so move
    rk_nand_init() to the function end.
    
    Change-Id: I075a309fa3d2d0b938863cdb1867b70d217f2ce3
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/spl-boot-order.c b/arch/arm/mach-rockchip/spl-boot-order.c
index 385cadd917..e3994b287a 100644
--- a/arch/arm/mach-rockchip/spl-boot-order.c
+++ b/arch/arm/mach-rockchip/spl-boot-order.c
@@ -51,11 +51,6 @@ static int spl_node_to_boot_device(int node)
 		}
 	}
 
-#ifdef CONFIG_SPL_NAND_SUPPORT
-	if (!rk_nand_init())
-		return BOOT_DEVICE_NAND;
-#endif
-
 	/*
 	 * This should eventually move into the SPL code, once SPL becomes
 	 * aware of the block-device layer.  Until then (and to avoid unneeded
@@ -96,6 +91,11 @@ static int spl_node_to_boot_device(int node)
 	if (!uclass_get_device_by_of_offset(UCLASS_SPI_FLASH, node, &parent))
 		return BOOT_DEVICE_SPI;
 
+#ifdef CONFIG_SPL_NAND_SUPPORT
+	if (!rk_nand_init())
+		return BOOT_DEVICE_NAND;
+#endif
+
 	return -1;
 }
 

commit 19d68200a994cbb003e539e07d23f40a017b6b91
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Oct 28 22:14:25 2019 +0800

    rkflash: decrece reserved IDBlock from 16 to 8
    
    Change-Id: Ice651f23ad487b6c08aacf73bab9bc7942155928
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/rk_sftl_arm_v7.S b/drivers/rkflash/rk_sftl_arm_v7.S
index 6213c7993a..1113098210 100644
--- a/drivers/rkflash/rk_sftl_arm_v7.S
+++ b/drivers/rkflash/rk_sftl_arm_v7.S
@@ -2,7 +2,7 @@
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:    GPL-2.0
- * date: 2019-07-01
+ * date: 2019-10-28
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -12944,7 +12944,7 @@ FtlWriteToIDB:
 .L1718:
 	ldr	r3, [sp, #24]
 	add	r10, r10, r3
-	cmp	r10, #15
+	cmp	r10, #7
 	bls	.L1720
 	ldr	r3, [sp, #20]
 	cbnz	r3, .L1721
@@ -14461,215 +14461,215 @@ power_up_flag:
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",%progbits,1
 .LC1:
 	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
-	.section	.rodata.__func__.10020,"a",%progbits
+	.section	.rodata.__func__.10026,"a",%progbits
 	.set	.LANCHOR175,. + 0
-	.type	__func__.10020, %object
-	.size	__func__.10020, 23
-__func__.10020:
+	.type	__func__.10026, %object
+	.size	__func__.10026, 23
+__func__.10026:
 	.ascii	"rk_ftl_garbage_collect\000"
-	.section	.rodata.__func__.10292,"a",%progbits
+	.section	.rodata.__func__.10298,"a",%progbits
 	.set	.LANCHOR137,. + 0
-	.type	__func__.10292, %object
-	.size	__func__.10292, 15
-__func__.10292:
+	.type	__func__.10298, %object
+	.size	__func__.10298, 15
+__func__.10298:
 	.ascii	"FlashReadPages\000"
-	.section	.rodata.__func__.10311,"a",%progbits
+	.section	.rodata.__func__.10317,"a",%progbits
 	.set	.LANCHOR142,. + 0
-	.type	__func__.10311, %object
-	.size	__func__.10311, 15
-__func__.10311:
+	.type	__func__.10317, %object
+	.size	__func__.10317, 15
+__func__.10317:
 	.ascii	"FlashProgPages\000"
-	.section	.rodata.__func__.10335,"a",%progbits
+	.section	.rodata.__func__.10341,"a",%progbits
 	.set	.LANCHOR77,. + 0
-	.type	__func__.10335, %object
-	.size	__func__.10335, 17
-__func__.10335:
+	.type	__func__.10341, %object
+	.size	__func__.10341, 17
+__func__.10341:
 	.ascii	"FlashEraseBlocks\000"
-	.section	.rodata.__func__.10450,"a",%progbits
+	.section	.rodata.__func__.10456,"a",%progbits
 	.set	.LANCHOR185,. + 0
-	.type	__func__.10450, %object
-	.size	__func__.10450, 14
-__func__.10450:
+	.type	__func__.10456, %object
+	.size	__func__.10456, 14
+__func__.10456:
 	.ascii	"FtlWriteToIDB\000"
-	.section	.rodata.__func__.8937,"a",%progbits
+	.section	.rodata.__func__.8943,"a",%progbits
 	.set	.LANCHOR169,. + 0
-	.type	__func__.8937, %object
-	.size	__func__.8937, 13
-__func__.8937:
+	.type	__func__.8943, %object
+	.size	__func__.8943, 13
+__func__.8943:
 	.ascii	"FtlProgPages\000"
-	.section	.rodata.__func__.8965,"a",%progbits
+	.section	.rodata.__func__.8971,"a",%progbits
 	.set	.LANCHOR177,. + 0
-	.type	__func__.8965, %object
-	.size	__func__.8965, 9
-__func__.8965:
+	.type	__func__.8971, %object
+	.size	__func__.8971, 9
+__func__.8971:
 	.ascii	"FtlWrite\000"
-	.section	.rodata.__func__.9047,"a",%progbits
+	.section	.rodata.__func__.9053,"a",%progbits
 	.set	.LANCHOR128,. + 0
-	.type	__func__.9047, %object
-	.size	__func__.9047, 14
-__func__.9047:
+	.type	__func__.9053, %object
+	.size	__func__.9053, 14
+__func__.9053:
 	.ascii	"FtlBbt2Bitmap\000"
-	.section	.rodata.__func__.9082,"a",%progbits
+	.section	.rodata.__func__.9088,"a",%progbits
 	.set	.LANCHOR141,. + 0
-	.type	__func__.9082, %object
-	.size	__func__.9082, 11
-__func__.9082:
+	.type	__func__.9088, %object
+	.size	__func__.9088, 11
+__func__.9088:
 	.ascii	"FtlLoadBbt\000"
-	.section	.rodata.__func__.9197,"a",%progbits
+	.section	.rodata.__func__.9203,"a",%progbits
 	.set	.LANCHOR49,. + 0
-	.type	__func__.9197, %object
-	.size	__func__.9197, 17
-__func__.9197:
+	.type	__func__.9203, %object
+	.size	__func__.9203, 17
+__func__.9203:
 	.ascii	"INSERT_FREE_LIST\000"
-	.section	.rodata.__func__.9202,"a",%progbits
+	.section	.rodata.__func__.9208,"a",%progbits
 	.set	.LANCHOR45,. + 0
-	.type	__func__.9202, %object
-	.size	__func__.9202, 17
-__func__.9202:
+	.type	__func__.9208, %object
+	.size	__func__.9208, 17
+__func__.9208:
 	.ascii	"INSERT_DATA_LIST\000"
-	.section	.rodata.__func__.9233,"a",%progbits
+	.section	.rodata.__func__.9239,"a",%progbits
 	.set	.LANCHOR50,. + 0
-	.type	__func__.9233, %object
-	.size	__func__.9233, 17
-__func__.9233:
+	.type	__func__.9239, %object
+	.size	__func__.9239, 17
+__func__.9239:
 	.ascii	"List_remove_node\000"
-	.section	.rodata.__func__.9265,"a",%progbits
+	.section	.rodata.__func__.9271,"a",%progbits
 	.set	.LANCHOR54,. + 0
-	.type	__func__.9265, %object
-	.size	__func__.9265, 22
-__func__.9265:
+	.type	__func__.9271, %object
+	.size	__func__.9271, 22
+__func__.9271:
 	.ascii	"List_update_data_list\000"
-	.section	.rodata.__func__.9274,"a",%progbits
+	.section	.rodata.__func__.9280,"a",%progbits
 	.set	.LANCHOR150,. + 0
-	.type	__func__.9274, %object
-	.size	__func__.9274, 16
-__func__.9274:
+	.type	__func__.9280, %object
+	.size	__func__.9280, 16
+__func__.9280:
 	.ascii	"load_l2p_region\000"
-	.section	.rodata.__func__.9307,"a",%progbits
+	.section	.rodata.__func__.9313,"a",%progbits
 	.set	.LANCHOR81,. + 0
-	.type	__func__.9307, %object
-	.size	__func__.9307, 26
-__func__.9307:
+	.type	__func__.9313, %object
+	.size	__func__.9313, 26
+__func__.9313:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.section	.rodata.__func__.9318,"a",%progbits
+	.section	.rodata.__func__.9324,"a",%progbits
 	.set	.LANCHOR151,. + 0
-	.type	__func__.9318, %object
-	.size	__func__.9318, 15
-__func__.9318:
+	.type	__func__.9324, %object
+	.size	__func__.9324, 15
+__func__.9324:
 	.ascii	"ftl_map_blk_gc\000"
-	.section	.rodata.__func__.9333,"a",%progbits
+	.section	.rodata.__func__.9339,"a",%progbits
 	.set	.LANCHOR148,. + 0
-	.type	__func__.9333, %object
-	.size	__func__.9333, 31
-__func__.9333:
+	.type	__func__.9339, %object
+	.size	__func__.9339, 31
+__func__.9339:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.section	.rodata.__func__.9347,"a",%progbits
+	.section	.rodata.__func__.9353,"a",%progbits
 	.set	.LANCHOR149,. + 0
-	.type	__func__.9347, %object
-	.size	__func__.9347, 16
-__func__.9347:
+	.type	__func__.9353, %object
+	.size	__func__.9353, 16
+__func__.9353:
 	.ascii	"FtlMapWritePage\000"
-	.section	.rodata.__func__.9372,"a",%progbits
+	.section	.rodata.__func__.9378,"a",%progbits
 	.set	.LANCHOR57,. + 0
-	.type	__func__.9372, %object
-	.size	__func__.9372, 22
-__func__.9372:
+	.type	__func__.9378, %object
+	.size	__func__.9378, 22
+__func__.9378:
 	.ascii	"select_l2p_ram_region\000"
-	.section	.rodata.__func__.9389,"a",%progbits
+	.section	.rodata.__func__.9395,"a",%progbits
 	.set	.LANCHOR153,. + 0
-	.type	__func__.9389, %object
-	.size	__func__.9389, 9
-__func__.9389:
+	.type	__func__.9395, %object
+	.size	__func__.9395, 9
+__func__.9395:
 	.ascii	"log2phys\000"
-	.section	.rodata.__func__.9453,"a",%progbits
+	.section	.rodata.__func__.9459,"a",%progbits
 	.set	.LANCHOR165,. + 0
-	.type	__func__.9453, %object
-	.size	__func__.9453, 15
-__func__.9453:
+	.type	__func__.9459, %object
+	.size	__func__.9459, 15
+__func__.9459:
 	.ascii	"FtlVpcTblFlush\000"
-	.section	.rodata.__func__.9475,"a",%progbits
+	.section	.rodata.__func__.9481,"a",%progbits
 	.set	.LANCHOR140,. + 0
-	.type	__func__.9475, %object
-	.size	__func__.9475, 14
-__func__.9475:
+	.type	__func__.9481, %object
+	.size	__func__.9481, 14
+__func__.9481:
 	.ascii	"FtlScanSysBlk\000"
-	.section	.rodata.__func__.9531,"a",%progbits
+	.section	.rodata.__func__.9537,"a",%progbits
 	.set	.LANCHOR178,. + 0
-	.type	__func__.9531, %object
-	.size	__func__.9531, 15
-__func__.9531:
+	.type	__func__.9537, %object
+	.size	__func__.9537, 15
+__func__.9537:
 	.ascii	"FtlLoadSysInfo\000"
-	.section	.rodata.__func__.9553,"a",%progbits
+	.section	.rodata.__func__.9559,"a",%progbits
 	.set	.LANCHOR180,. + 0
-	.type	__func__.9553, %object
-	.size	__func__.9553, 18
-__func__.9553:
+	.type	__func__.9559, %object
+	.size	__func__.9559, 18
+__func__.9559:
 	.ascii	"FtlMapTblRecovery\000"
-	.section	.rodata.__func__.9599,"a",%progbits
+	.section	.rodata.__func__.9605,"a",%progbits
 	.set	.LANCHOR154,. + 0
-	.type	__func__.9599, %object
-	.size	__func__.9599, 16
-__func__.9599:
+	.type	__func__.9605, %object
+	.size	__func__.9605, 16
+__func__.9605:
 	.ascii	"FtlReUsePrevPpa\000"
-	.section	.rodata.__func__.9633,"a",%progbits
+	.section	.rodata.__func__.9639,"a",%progbits
 	.set	.LANCHOR155,. + 0
-	.type	__func__.9633, %object
-	.size	__func__.9633, 22
-__func__.9633:
+	.type	__func__.9639, %object
+	.size	__func__.9639, 22
+__func__.9639:
 	.ascii	"FtlRecoverySuperblock\000"
-	.section	.rodata.__func__.9690,"a",%progbits
+	.section	.rodata.__func__.9696,"a",%progbits
 	.set	.LANCHOR60,. + 0
-	.type	__func__.9690, %object
-	.size	__func__.9690, 16
-__func__.9690:
+	.type	__func__.9696, %object
+	.size	__func__.9696, 16
+__func__.9696:
 	.ascii	"make_superblock\000"
-	.section	.rodata.__func__.9711,"a",%progbits
+	.section	.rodata.__func__.9717,"a",%progbits
 	.set	.LANCHOR136,. + 0
-	.type	__func__.9711, %object
-	.size	__func__.9711, 18
-__func__.9711:
+	.type	__func__.9717, %object
+	.size	__func__.9717, 18
+__func__.9717:
 	.ascii	"SupperBlkListInit\000"
-	.section	.rodata.__func__.9738,"a",%progbits
+	.section	.rodata.__func__.9744,"a",%progbits
 	.set	.LANCHOR159,. + 0
-	.type	__func__.9738, %object
-	.size	__func__.9738, 14
-__func__.9738:
+	.type	__func__.9744, %object
+	.size	__func__.9744, 14
+__func__.9744:
 	.ascii	"ftl_check_vpc\000"
-	.section	.rodata.__func__.9803,"a",%progbits
+	.section	.rodata.__func__.9809,"a",%progbits
 	.set	.LANCHOR144,. + 0
-	.type	__func__.9803, %object
-	.size	__func__.9803, 25
-__func__.9803:
+	.type	__func__.9809, %object
+	.size	__func__.9809, 25
+__func__.9809:
 	.ascii	"allocate_data_superblock\000"
-	.section	.rodata.__func__.9824,"a",%progbits
+	.section	.rodata.__func__.9830,"a",%progbits
 	.set	.LANCHOR168,. + 0
-	.type	__func__.9824, %object
-	.size	__func__.9824, 29
-__func__.9824:
+	.type	__func__.9830, %object
+	.size	__func__.9830, 29
+__func__.9830:
 	.ascii	"allocate_new_data_superblock\000"
-	.section	.rodata.__func__.9831,"a",%progbits
+	.section	.rodata.__func__.9837,"a",%progbits
 	.set	.LANCHOR61,. + 0
-	.type	__func__.9831, %object
-	.size	__func__.9831, 19
-__func__.9831:
+	.type	__func__.9837, %object
+	.size	__func__.9837, 19
+__func__.9837:
 	.ascii	"get_new_active_ppa\000"
-	.section	.rodata.__func__.9844,"a",%progbits
+	.section	.rodata.__func__.9850,"a",%progbits
 	.set	.LANCHOR146,. + 0
-	.type	__func__.9844, %object
-	.size	__func__.9844, 16
-__func__.9844:
+	.type	__func__.9850, %object
+	.size	__func__.9850, 16
+__func__.9850:
 	.ascii	"update_vpc_list\000"
-	.section	.rodata.__func__.9851,"a",%progbits
+	.section	.rodata.__func__.9857,"a",%progbits
 	.set	.LANCHOR147,. + 0
-	.type	__func__.9851, %object
-	.size	__func__.9851, 20
-__func__.9851:
+	.type	__func__.9857, %object
+	.size	__func__.9857, 20
+__func__.9857:
 	.ascii	"decrement_vpc_count\000"
-	.section	.rodata.__func__.9921,"a",%progbits
+	.section	.rodata.__func__.9927,"a",%progbits
 	.set	.LANCHOR170,. + 0
-	.type	__func__.9921, %object
-	.size	__func__.9921, 19
-__func__.9921:
+	.type	__func__.9927, %object
+	.size	__func__.9927, 19
+__func__.9927:
 	.ascii	"FtlGcFreeTempBlock\000"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",%progbits,1
 .LC21:
@@ -14715,5 +14715,5 @@ __func__.9921:
 	.ascii	"\012\000"
 	.section	.rodata.sftl_init.str1.1,"aMS",%progbits,1
 .LC49:
-	.ascii	"SFTL version: 5.0.50 20190215\000"
+	.ascii	"SFTL version: 5.0.51 20191028\000"
 	.hidden	free
diff --git a/drivers/rkflash/rk_sftl_arm_v8.S b/drivers/rkflash/rk_sftl_arm_v8.S
index 3055fbad4a..8ae51384e4 100644
--- a/drivers/rkflash/rk_sftl_arm_v8.S
+++ b/drivers/rkflash/rk_sftl_arm_v8.S
@@ -2,7 +2,7 @@
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:    GPL-2.0
- * date: 2019-07-01
+ * date: 2019-10-28
  */
 	.arch armv8-a+nosimd
 	.file	"rk_sftl.c"
@@ -11509,7 +11509,7 @@ FtlWriteToIDB:
 .L1550:
 	ldr	w0, [x29, 156]
 	add	w22, w22, w0
-	cmp	w22, 15
+	cmp	w22, 7
 	bls	.L1553
 	ldr	w0, [x29, 152]
 	cbnz	w0, .L1554
@@ -12955,250 +12955,250 @@ power_up_flag:
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",@progbits,1
 .LC1:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
-	.section	.rodata.__func__.6246,"a",@progbits
+	.section	.rodata.__func__.6252,"a",@progbits
 	.align	3
 	.set	.LANCHOR169,. + 0
-	.type	__func__.6246, %object
-	.size	__func__.6246, 13
-__func__.6246:
+	.type	__func__.6252, %object
+	.size	__func__.6252, 13
+__func__.6252:
 	.string	"FtlProgPages"
-	.section	.rodata.__func__.6274,"a",@progbits
+	.section	.rodata.__func__.6280,"a",@progbits
 	.align	3
 	.set	.LANCHOR177,. + 0
-	.type	__func__.6274, %object
-	.size	__func__.6274, 9
-__func__.6274:
+	.type	__func__.6280, %object
+	.size	__func__.6280, 9
+__func__.6280:
 	.string	"FtlWrite"
-	.section	.rodata.__func__.6356,"a",@progbits
+	.section	.rodata.__func__.6362,"a",@progbits
 	.align	3
 	.set	.LANCHOR128,. + 0
-	.type	__func__.6356, %object
-	.size	__func__.6356, 14
-__func__.6356:
+	.type	__func__.6362, %object
+	.size	__func__.6362, 14
+__func__.6362:
 	.string	"FtlBbt2Bitmap"
-	.section	.rodata.__func__.6391,"a",@progbits
+	.section	.rodata.__func__.6397,"a",@progbits
 	.align	3
 	.set	.LANCHOR141,. + 0
-	.type	__func__.6391, %object
-	.size	__func__.6391, 11
-__func__.6391:
+	.type	__func__.6397, %object
+	.size	__func__.6397, 11
+__func__.6397:
 	.string	"FtlLoadBbt"
-	.section	.rodata.__func__.6506,"a",@progbits
+	.section	.rodata.__func__.6512,"a",@progbits
 	.align	3
 	.set	.LANCHOR49,. + 0
-	.type	__func__.6506, %object
-	.size	__func__.6506, 17
-__func__.6506:
+	.type	__func__.6512, %object
+	.size	__func__.6512, 17
+__func__.6512:
 	.string	"INSERT_FREE_LIST"
-	.section	.rodata.__func__.6511,"a",@progbits
+	.section	.rodata.__func__.6517,"a",@progbits
 	.align	3
 	.set	.LANCHOR45,. + 0
-	.type	__func__.6511, %object
-	.size	__func__.6511, 17
-__func__.6511:
+	.type	__func__.6517, %object
+	.size	__func__.6517, 17
+__func__.6517:
 	.string	"INSERT_DATA_LIST"
-	.section	.rodata.__func__.6542,"a",@progbits
+	.section	.rodata.__func__.6548,"a",@progbits
 	.align	3
 	.set	.LANCHOR50,. + 0
-	.type	__func__.6542, %object
-	.size	__func__.6542, 17
-__func__.6542:
+	.type	__func__.6548, %object
+	.size	__func__.6548, 17
+__func__.6548:
 	.string	"List_remove_node"
-	.section	.rodata.__func__.6574,"a",@progbits
+	.section	.rodata.__func__.6580,"a",@progbits
 	.align	3
 	.set	.LANCHOR54,. + 0
-	.type	__func__.6574, %object
-	.size	__func__.6574, 22
-__func__.6574:
+	.type	__func__.6580, %object
+	.size	__func__.6580, 22
+__func__.6580:
 	.string	"List_update_data_list"
-	.section	.rodata.__func__.6583,"a",@progbits
+	.section	.rodata.__func__.6589,"a",@progbits
 	.align	3
 	.set	.LANCHOR150,. + 0
-	.type	__func__.6583, %object
-	.size	__func__.6583, 16
-__func__.6583:
+	.type	__func__.6589, %object
+	.size	__func__.6589, 16
+__func__.6589:
 	.string	"load_l2p_region"
-	.section	.rodata.__func__.6616,"a",@progbits
+	.section	.rodata.__func__.6622,"a",@progbits
 	.align	3
 	.set	.LANCHOR81,. + 0
-	.type	__func__.6616, %object
-	.size	__func__.6616, 26
-__func__.6616:
+	.type	__func__.6622, %object
+	.size	__func__.6622, 26
+__func__.6622:
 	.string	"ftl_map_blk_alloc_new_blk"
-	.section	.rodata.__func__.6627,"a",@progbits
+	.section	.rodata.__func__.6633,"a",@progbits
 	.align	3
 	.set	.LANCHOR151,. + 0
-	.type	__func__.6627, %object
-	.size	__func__.6627, 15
-__func__.6627:
+	.type	__func__.6633, %object
+	.size	__func__.6633, 15
+__func__.6633:
 	.string	"ftl_map_blk_gc"
-	.section	.rodata.__func__.6642,"a",@progbits
+	.section	.rodata.__func__.6648,"a",@progbits
 	.align	3
 	.set	.LANCHOR148,. + 0
-	.type	__func__.6642, %object
-	.size	__func__.6642, 31
-__func__.6642:
+	.type	__func__.6648, %object
+	.size	__func__.6648, 31
+__func__.6648:
 	.string	"Ftl_write_map_blk_to_last_page"
-	.section	.rodata.__func__.6656,"a",@progbits
+	.section	.rodata.__func__.6662,"a",@progbits
 	.align	3
 	.set	.LANCHOR149,. + 0
-	.type	__func__.6656, %object
-	.size	__func__.6656, 16
-__func__.6656:
+	.type	__func__.6662, %object
+	.size	__func__.6662, 16
+__func__.6662:
 	.string	"FtlMapWritePage"
-	.section	.rodata.__func__.6681,"a",@progbits
+	.section	.rodata.__func__.6687,"a",@progbits
 	.align	3
 	.set	.LANCHOR57,. + 0
-	.type	__func__.6681, %object
-	.size	__func__.6681, 22
-__func__.6681:
+	.type	__func__.6687, %object
+	.size	__func__.6687, 22
+__func__.6687:
 	.string	"select_l2p_ram_region"
-	.section	.rodata.__func__.6698,"a",@progbits
+	.section	.rodata.__func__.6704,"a",@progbits
 	.align	3
 	.set	.LANCHOR153,. + 0
-	.type	__func__.6698, %object
-	.size	__func__.6698, 9
-__func__.6698:
+	.type	__func__.6704, %object
+	.size	__func__.6704, 9
+__func__.6704:
 	.string	"log2phys"
-	.section	.rodata.__func__.6762,"a",@progbits
+	.section	.rodata.__func__.6768,"a",@progbits
 	.align	3
 	.set	.LANCHOR165,. + 0
-	.type	__func__.6762, %object
-	.size	__func__.6762, 15
-__func__.6762:
+	.type	__func__.6768, %object
+	.size	__func__.6768, 15
+__func__.6768:
 	.string	"FtlVpcTblFlush"
-	.section	.rodata.__func__.6784,"a",@progbits
+	.section	.rodata.__func__.6790,"a",@progbits
 	.align	3
 	.set	.LANCHOR140,. + 0
-	.type	__func__.6784, %object
-	.size	__func__.6784, 14
-__func__.6784:
+	.type	__func__.6790, %object
+	.size	__func__.6790, 14
+__func__.6790:
 	.string	"FtlScanSysBlk"
-	.section	.rodata.__func__.6840,"a",@progbits
+	.section	.rodata.__func__.6846,"a",@progbits
 	.align	3
 	.set	.LANCHOR178,. + 0
-	.type	__func__.6840, %object
-	.size	__func__.6840, 15
-__func__.6840:
+	.type	__func__.6846, %object
+	.size	__func__.6846, 15
+__func__.6846:
 	.string	"FtlLoadSysInfo"
-	.section	.rodata.__func__.6862,"a",@progbits
+	.section	.rodata.__func__.6868,"a",@progbits
 	.align	3
 	.set	.LANCHOR180,. + 0
-	.type	__func__.6862, %object
-	.size	__func__.6862, 18
-__func__.6862:
+	.type	__func__.6868, %object
+	.size	__func__.6868, 18
+__func__.6868:
 	.string	"FtlMapTblRecovery"
-	.section	.rodata.__func__.6908,"a",@progbits
+	.section	.rodata.__func__.6914,"a",@progbits
 	.align	3
 	.set	.LANCHOR154,. + 0
-	.type	__func__.6908, %object
-	.size	__func__.6908, 16
-__func__.6908:
+	.type	__func__.6914, %object
+	.size	__func__.6914, 16
+__func__.6914:
 	.string	"FtlReUsePrevPpa"
-	.section	.rodata.__func__.6942,"a",@progbits
+	.section	.rodata.__func__.6948,"a",@progbits
 	.align	3
 	.set	.LANCHOR155,. + 0
-	.type	__func__.6942, %object
-	.size	__func__.6942, 22
-__func__.6942:
+	.type	__func__.6948, %object
+	.size	__func__.6948, 22
+__func__.6948:
 	.string	"FtlRecoverySuperblock"
-	.section	.rodata.__func__.6999,"a",@progbits
+	.section	.rodata.__func__.7005,"a",@progbits
 	.align	3
 	.set	.LANCHOR60,. + 0
-	.type	__func__.6999, %object
-	.size	__func__.6999, 16
-__func__.6999:
+	.type	__func__.7005, %object
+	.size	__func__.7005, 16
+__func__.7005:
 	.string	"make_superblock"
-	.section	.rodata.__func__.7020,"a",@progbits
+	.section	.rodata.__func__.7026,"a",@progbits
 	.align	3
 	.set	.LANCHOR136,. + 0
-	.type	__func__.7020, %object
-	.size	__func__.7020, 18
-__func__.7020:
+	.type	__func__.7026, %object
+	.size	__func__.7026, 18
+__func__.7026:
 	.string	"SupperBlkListInit"
-	.section	.rodata.__func__.7047,"a",@progbits
+	.section	.rodata.__func__.7053,"a",@progbits
 	.align	3
 	.set	.LANCHOR159,. + 0
-	.type	__func__.7047, %object
-	.size	__func__.7047, 14
-__func__.7047:
+	.type	__func__.7053, %object
+	.size	__func__.7053, 14
+__func__.7053:
 	.string	"ftl_check_vpc"
-	.section	.rodata.__func__.7112,"a",@progbits
+	.section	.rodata.__func__.7118,"a",@progbits
 	.align	3
 	.set	.LANCHOR144,. + 0
-	.type	__func__.7112, %object
-	.size	__func__.7112, 25
-__func__.7112:
+	.type	__func__.7118, %object
+	.size	__func__.7118, 25
+__func__.7118:
 	.string	"allocate_data_superblock"
-	.section	.rodata.__func__.7133,"a",@progbits
+	.section	.rodata.__func__.7139,"a",@progbits
 	.align	3
 	.set	.LANCHOR168,. + 0
-	.type	__func__.7133, %object
-	.size	__func__.7133, 29
-__func__.7133:
+	.type	__func__.7139, %object
+	.size	__func__.7139, 29
+__func__.7139:
 	.string	"allocate_new_data_superblock"
-	.section	.rodata.__func__.7140,"a",@progbits
+	.section	.rodata.__func__.7146,"a",@progbits
 	.align	3
 	.set	.LANCHOR61,. + 0
-	.type	__func__.7140, %object
-	.size	__func__.7140, 19
-__func__.7140:
+	.type	__func__.7146, %object
+	.size	__func__.7146, 19
+__func__.7146:
 	.string	"get_new_active_ppa"
-	.section	.rodata.__func__.7153,"a",@progbits
+	.section	.rodata.__func__.7159,"a",@progbits
 	.align	3
 	.set	.LANCHOR146,. + 0
-	.type	__func__.7153, %object
-	.size	__func__.7153, 16
-__func__.7153:
+	.type	__func__.7159, %object
+	.size	__func__.7159, 16
+__func__.7159:
 	.string	"update_vpc_list"
-	.section	.rodata.__func__.7160,"a",@progbits
+	.section	.rodata.__func__.7166,"a",@progbits
 	.align	3
 	.set	.LANCHOR147,. + 0
-	.type	__func__.7160, %object
-	.size	__func__.7160, 20
-__func__.7160:
+	.type	__func__.7166, %object
+	.size	__func__.7166, 20
+__func__.7166:
 	.string	"decrement_vpc_count"
-	.section	.rodata.__func__.7230,"a",@progbits
+	.section	.rodata.__func__.7236,"a",@progbits
 	.align	3
 	.set	.LANCHOR170,. + 0
-	.type	__func__.7230, %object
-	.size	__func__.7230, 19
-__func__.7230:
+	.type	__func__.7236, %object
+	.size	__func__.7236, 19
+__func__.7236:
 	.string	"FtlGcFreeTempBlock"
-	.section	.rodata.__func__.7329,"a",@progbits
+	.section	.rodata.__func__.7335,"a",@progbits
 	.align	3
 	.set	.LANCHOR175,. + 0
-	.type	__func__.7329, %object
-	.size	__func__.7329, 23
-__func__.7329:
+	.type	__func__.7335, %object
+	.size	__func__.7335, 23
+__func__.7335:
 	.string	"rk_ftl_garbage_collect"
-	.section	.rodata.__func__.7601,"a",@progbits
+	.section	.rodata.__func__.7607,"a",@progbits
 	.align	3
 	.set	.LANCHOR137,. + 0
-	.type	__func__.7601, %object
-	.size	__func__.7601, 15
-__func__.7601:
+	.type	__func__.7607, %object
+	.size	__func__.7607, 15
+__func__.7607:
 	.string	"FlashReadPages"
-	.section	.rodata.__func__.7620,"a",@progbits
+	.section	.rodata.__func__.7626,"a",@progbits
 	.align	3
 	.set	.LANCHOR142,. + 0
-	.type	__func__.7620, %object
-	.size	__func__.7620, 15
-__func__.7620:
+	.type	__func__.7626, %object
+	.size	__func__.7626, 15
+__func__.7626:
 	.string	"FlashProgPages"
-	.section	.rodata.__func__.7644,"a",@progbits
+	.section	.rodata.__func__.7650,"a",@progbits
 	.align	3
 	.set	.LANCHOR77,. + 0
-	.type	__func__.7644, %object
-	.size	__func__.7644, 17
-__func__.7644:
+	.type	__func__.7650, %object
+	.size	__func__.7650, 17
+__func__.7650:
 	.string	"FlashEraseBlocks"
-	.section	.rodata.__func__.7759,"a",@progbits
+	.section	.rodata.__func__.7765,"a",@progbits
 	.align	3
 	.set	.LANCHOR185,. + 0
-	.type	__func__.7759, %object
-	.size	__func__.7759, 14
-__func__.7759:
+	.type	__func__.7765, %object
+	.size	__func__.7765, 14
+__func__.7765:
 	.string	"FtlWriteToIDB"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",@progbits,1
 .LC21:
@@ -13243,5 +13243,5 @@ __func__.7759:
 	.string	"\n"
 	.section	.rodata.sftl_init.str1.1,"aMS",@progbits,1
 .LC49:
-	.string	"SFTL version: 5.0.50 20190215"
+	.string	"SFTL version: 5.0.51 20191028"
 	.hidden	free

commit cd6239260ce3bea4a2b50618aac14f759aa6978f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 28 10:23:07 2019 +0800

    make.sh: ignore warn/error message of command 'ls'
    
    fix: "ls: cannot access trust*.img: No such file or director".
    
    Change-Id: Iabecb6b751dd3ba3f25fe725dac17cf4b7c39801
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 369b023763..09ae08a0a2 100755
--- a/make.sh
+++ b/make.sh
@@ -761,7 +761,7 @@ pack_trust_image()
 {
 	local mode=$1 files ini
 
-	ls trust*.img >/dev/null && rm trust*.img
+	ls trust*.img >/dev/null 2>&1 && rm trust*.img
 	# ARM64 uses trust_merger
 	if grep -Eq ''^CONFIG_ARM64=y'|'^CONFIG_ARM64_BOOT_AARCH32=y'' ${OUTDIR}/.config ; then
 		ini=${RKBIN}/RKTRUST/${RKCHIP_TRUST}TRUST.ini

commit 9b32339749ef16f99ac814a18f45ab8f687bd357
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Oct 25 15:28:55 2019 +0800

    fastboot: add Android-Q feature support
    
    Add "fasboot getvar is-userspace" support.
    
    The Android-Q document shows "not allow the flashing of dynamic partitions"
    is not aimed at the physical partition(call "super") but its child partitions
    (i.e. system, vendor, oem...).
    
    Change-Id: I4e21a9728a1093b68a9d1a08420586f33dcf0117
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 9de6db4bc1..50a2336721 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -790,6 +790,10 @@ static int fb_read_var(char *cmd, char *response,
 		fb_add_string(response, chars_left, "no", NULL);
 		break;
 	}
+	case FB_IS_USERSPACE: {
+		fb_add_string(response, chars_left, "no", NULL);
+		break;
+	}
 #ifdef CONFIG_RK_AVB_LIBAVB_USER
 	case FB_HAS_COUNT: {
 		char slot_count[2];
@@ -1062,6 +1066,7 @@ static const struct {
 	{ NAME_NO_ARGS("battery-voltage"), FB_BATT_VOLTAGE},
 	{ NAME_NO_ARGS("variant"), FB_VARIANT},
 	{ NAME_NO_ARGS("battery-soc-ok"), FB_BATT_SOC_OK},
+	{ NAME_NO_ARGS("is-userspace"), FB_IS_USERSPACE},
 #ifdef CONFIG_RK_AVB_LIBAVB_USER
 	/* Slots related */
 	{ NAME_NO_ARGS("slot-count"), FB_HAS_COUNT},
diff --git a/include/fastboot.h b/include/fastboot.h
index 452ff1d801..13963d304b 100644
--- a/include/fastboot.h
+++ b/include/fastboot.h
@@ -34,6 +34,7 @@ typedef enum {
 	FB_OFF_MODE_CHARGE,
 	FB_BATT_VOLTAGE,
 	FB_BATT_SOC_OK,
+	FB_IS_USERSPACE,
 #ifdef CONFIG_RK_AVB_LIBAVB_USER
 	FB_HAS_COUNT,
 	FB_HAS_SLOT,

commit 8b84e8b62937df3089e3fc1c112cf05f6829666d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 28 09:18:07 2019 +0800

    rockchip: rk3399: correct comment
    
    Change-Id: I98046f1869504c0877e5e344ef121dfde7824227
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c
index ba5f7319c7..71f5f1fd84 100644
--- a/arch/arm/mach-rockchip/rk3399/rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
@@ -133,7 +133,7 @@ void board_debug_uart_init(void)
 		     GRF_GPIO2C1_SEL_MASK,
 		     GRF_UART0BT_SOUT << GRF_GPIO2C1_SEL_SHIFT);
 #else
-	/* Enable early UART2 channel C on the RK3399/RK3399PRO */
+	/* Enable early UART2 channel on the RK3399/RK3399PRO */
 	rk_clrsetreg(&grf->gpio4c_iomux,
 		     GRF_GPIO4C3_SEL_MASK,
 		     GRF_UART2DGBC_SIN << GRF_GPIO4C3_SEL_SHIFT);

commit c84f0ed80a3fa9a7c470bbcb6747b763280506fa
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed Oct 23 16:17:24 2019 +0800

    rkflash: uniform code with linux
    
    Uniform loader, u-boot, linux low layer driver code to reduce bug in
    the migration process
    
    Change-Id: I618345fdfece2a59437a15cb3bd8d70b7c292abb
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/flash.c b/drivers/rkflash/flash.c
index 835efe7f51..36d00f68ce 100644
--- a/drivers/rkflash/flash.c
+++ b/drivers/rkflash/flash.c
@@ -44,14 +44,6 @@ static struct NAND_PARA_INFO_T nand_para = {
 	{0}
 };	/* TC58NVG0S3HTA00 */
 
-void nandc_flash_reset(u8 cs)
-{
-	nandc_flash_cs(cs);
-	nandc_writel(RESET_CMD, NANDC_CHIP_CMD(cs));
-	nandc_wait_flash_ready(cs);
-	nandc_flash_de_cs(cs);
-}
-
 static void flash_read_id_raw(u8 cs, u8 *buf)
 {
 	u8 *ptr = (u8 *)buf;
@@ -73,9 +65,9 @@ static void flash_read_id_raw(u8 cs, u8 *buf)
 
 	nandc_flash_de_cs(cs);
 	if (ptr[0] != 0xFF && ptr[0] && ptr[1] != 0xFF)
-		PRINT_NANDC_E("No.%d FLASH ID:%x %x %x %x %x %x\n",
-			      cs + 1, ptr[0], ptr[1], ptr[2],
-			      ptr[3], ptr[4], ptr[5]);
+		rkflash_print_error("No.%d FLASH ID:%x %x %x %x %x %x\n",
+				    cs + 1, ptr[0], ptr[1], ptr[2],
+				    ptr[3], ptr[4], ptr[5]);
 }
 
 static void flash_bch_sel(u8 bits)
@@ -168,8 +160,9 @@ static u32 flash_read_ecc(u8 cs)
 
 static u32 flash_read_page_raw(u8 cs, u32 page_addr, u32 *p_data, u32 *p_spare)
 {
-	u32 error_ecc_bits;
+	u32 error_ecc_bits, ret;
 	u32 sec_per_page = nand_para.sec_per_page;
+	u32 nand_ecc = 0;
 
 	nandc_wait_flash_ready(cs);
 	nandc_flash_cs(cs);
@@ -180,53 +173,53 @@ static u32 flash_read_page_raw(u8 cs, u32 page_addr, u32 *p_data, u32 *p_spare)
 
 	error_ecc_bits = nandc_xfer_data(cs, NANDC_READ, sec_per_page,
 					 p_data, p_spare);
-	/*
-	if (error_ecc_bits > 12) {
-		PRINT_NANDC_E("%s %x %x error_ecc_bits %d\n",
-			      __func__, cs, page_addr, error_ecc_bits);
-		if (p_data)
-			PRINT_NANDC_HEX("data:", p_data, 4, 2);
-		if (p_spare)
-			PRINT_NANDC_HEX("spare:", p_spare, 4, 2);
-	}
-	*/
+
 	nandc_flash_de_cs(cs);
 
 	if (error_ecc_bits != NAND_STS_ECC_ERR) {
 		if (error_ecc_bits >= (u32)nand_para.ecc_bits - 3) {
-			error_ecc_bits = NAND_STS_REFRESH;
+			ret = NAND_STS_REFRESH;
 		} else {
-			error_ecc_bits = NAND_STS_OK;
+			ret = NAND_STS_OK;
 			if (g_nand_ecc_en) {
-				u32 nand_ecc = flash_read_ecc(cs);
+				nand_ecc = flash_read_ecc(cs);
 
 				if (nand_ecc >= 6) {
-					PRINT_NANDC_E("%s nand ecc %x ecc %d\n",
-						      __func__, page_addr, nand_ecc);
-					error_ecc_bits = NAND_STS_REFRESH;
+					rkflash_print_error("%s nand ecc %x ecc %d\n",
+							    __func__, page_addr, nand_ecc);
+					ret = NAND_STS_REFRESH;
 				}
 			}
 		}
+	} else {
+		ret = NAND_STS_ECC_ERR;
 	}
+	if (nand_ecc > 4 || error_ecc_bits > 4)
+		rkflash_print_info("%s %x %x nandc ecc= %d, internal ecc= %d\n",
+				   __func__, cs, page_addr, error_ecc_bits, nand_ecc);
 
-	return error_ecc_bits;
+	return ret;
 }
 
 static u32 flash_read_page(u8 cs, u32 page_addr, u32 *p_data, u32 *p_spare)
 {
-	u32 ret, i;
+	u32 ret, i = 0;
 
 	ret = flash_read_page_raw(cs, page_addr, p_data, p_spare);
 	if (ret == NAND_STS_ECC_ERR) {
-		for (i = 0; i < 50; i++) {
+		for (; i < 50; i++) {
 			ret = flash_read_page_raw(cs, page_addr, p_data, p_spare);
 			if (ret != NAND_STS_ECC_ERR) {
 				ret = NAND_STS_REFRESH;
 				break;
 			}
 		}
-		PRINT_NANDC_E("flash_read_page %x err_ecc %d\n", page_addr, ret);
+		rkflash_print_error("%s %x err_ecc %d\n",
+				    __func__, page_addr, ret);
 	}
+	rkflash_print_dio("%s %x %x retry=%x\n",
+			  __func__, page_addr, p_data[0], i);
+
 	return ret;
 }
 
@@ -235,6 +228,7 @@ static u32 flash_prog_page(u8 cs, u32 page_addr, u32 *p_data, u32 *p_spare)
 	u32 status;
 	u32 sec_per_page = nand_para.sec_per_page;
 
+	rkflash_print_dio("%s %x %x\n", __func__, page_addr, p_data[0]);
 	nandc_wait_flash_ready(cs);
 	nandc_flash_cs(cs);
 	flash_prog_first_cmd(cs, page_addr);
@@ -244,10 +238,10 @@ static u32 flash_prog_page(u8 cs, u32 page_addr, u32 *p_data, u32 *p_spare)
 	status = flash_read_status(cs, page_addr);
 	nandc_flash_de_cs(cs);
 	status &= 0x01;
-	if (status) {
-		PRINT_NANDC_I("%s addr=%x status=%x\n",
-			      __func__, page_addr, status);
-	}
+	if (status)
+		rkflash_print_info("%s addr=%x status=%x\n",
+				   __func__, page_addr, status);
+
 	return status;
 }
 
@@ -255,6 +249,7 @@ static u32 flash_erase_block(u8 cs, u32 page_addr)
 {
 	u32 status;
 
+	rkflash_print_dio("%s %x\n", __func__, page_addr);
 	nandc_wait_flash_ready(cs);
 	nandc_flash_cs(cs);
 	flash_erase_cmd(cs, page_addr);
@@ -262,10 +257,10 @@ static u32 flash_erase_block(u8 cs, u32 page_addr)
 	status = flash_read_status(cs, page_addr);
 	nandc_flash_de_cs(cs);
 	status &= 0x01;
-	if (status) {
-		PRINT_NANDC_I("%s pageadd=%x status=%x\n",
-			      __func__, page_addr, status);
-	}
+	if (status)
+		rkflash_print_info("%s pageadd=%x status=%x\n",
+				   __func__, page_addr, status);
+
 	return status;
 }
 
@@ -290,7 +285,7 @@ static void flash_read_spare(u8 cs, u32 page_addr, u8 *spare)
  * Read the 1st page's 1st spare byte of a phy_blk
  * If not FF, it's bad blk
  */
-static s32 get_bad_blk_list(u16 *table, u32 die)
+static s32 flash_get_bad_blk_list(u16 *table, u32 die)
 {
 	u16 blk;
 	u32 bad_cnt, page_addr0, page_addr1, page_addr2;
@@ -314,95 +309,12 @@ static s32 get_bad_blk_list(u16 *table, u32 die)
 		    bad_flag1 != 0xFF ||
 		    bad_flag2 != 0xFF) {
 			table[bad_cnt++] = blk;
-			PRINT_NANDC_E("die[%d], bad_blk[%d]\n", die, blk);
+			rkflash_print_error("die[%d], bad_blk[%d]\n", die, blk);
 		}
 	}
 	return bad_cnt;
 }
 
-#if FLASH_STRESS_TEST_EN
-
-#define FLASH_PAGE_SIZE	2048
-#define FLASH_SPARE_SIZE	8
-
-static u16 bad_blk_list[1024];
-static u32 pwrite[FLASH_PAGE_SIZE / 4];
-static u32 pread[FLASH_PAGE_SIZE / 4];
-static u32 pspare_write[FLASH_SPARE_SIZE / 4];
-static u32 pspare_read[FLASH_SPARE_SIZE / 4];
-static u32 bad_blk_num;
-static u32 bad_page_num;
-
-static void flash_test(void)
-{
-	u32 i, blk, page, bad_cnt, page_addr;
-	int ret;
-	u32 pages_num = 64;
-	u32 blk_addr = 64;
-	u32 is_bad_blk = 0;
-
-	PRINT_NANDC_E("%s\n", __func__);
-	bad_blk_num = 0;
-	bad_page_num = 0;
-	bad_cnt	= get_bad_blk_list(bad_blk_list, 0);
-
-	for (blk = 0; blk < 1024; blk++) {
-		for (i = 0; i < bad_cnt; i++) {
-			if (bad_blk_list[i] == blk)
-				break;
-		}
-		if (i < bad_cnt)
-			continue;
-		is_bad_blk = 0;
-		PRINT_NANDC_E("Flash prog block: %x\n", blk);
-		flash_erase_block(0, blk * blk_addr);
-		for (page = 0; page < pages_num; page++) {
-			page_addr = blk * blk_addr + page;
-			for (i = 0; i < 512; i++)
-				pwrite[i] = (page_addr << 16) + i;
-			pspare_write[0] = pwrite[0] + 0x5AF0;
-			pspare_write[1] = pspare_write[0] + 1;
-			flash_prog_page(0, page_addr, pwrite, pspare_write);
-			memset(pread, 0, 2048);
-			memset(pspare_read, 0, 8);
-			ret = flash_read_page(0, page_addr, pread,
-					      pspare_read);
-			if (ret != NAND_STS_OK)
-				is_bad_blk = 1;
-			for (i = 0; i < 512; i++) {
-				if (pwrite[i] != pread[i]) {
-					is_bad_blk = 1;
-					break;
-				}
-			}
-			for (i = 0; i < 2; i++) {
-				if (pspare_write[i] != pspare_read[i]) {
-					is_bad_blk = 1;
-					break;
-				}
-			}
-			if (is_bad_blk) {
-				bad_page_num++;
-				PRINT_NANDC_E("ERR:page %x, ret= %x\n",
-					      page_addr,
-					      ret);
-				PRINT_NANDC_HEX("data:", pread, 4, 8);
-				PRINT_NANDC_HEX("spare:", pspare_read, 4, 2);
-			}
-		}
-		flash_erase_block(0, blk * blk_addr);
-		if (is_bad_blk)
-			bad_blk_num++;
-	}
-	PRINT_NANDC_E("bad_blk_num = %d, bad_page_num = %d\n",
-		      bad_blk_num, bad_page_num);
-
-	PRINT_NANDC_E("Flash Test Finish!!!\n");
-	while (1)
-		;
-}
-#endif
-
 static void flash_die_info_init(void)
 {
 	u32 cs;
@@ -418,61 +330,61 @@ static void flash_die_info_init(void)
 			nand_para.blk_per_plane;
 }
 
-static void nandc_flash_print_info(void)
+static void flash_show_info(void)
 {
-	PRINT_NANDC_I("No.0 FLASH ID: %x %x %x %x %x %x\n",
-		      nand_para.nand_id[0],
-		      nand_para.nand_id[1],
-		      nand_para.nand_id[2],
-		      nand_para.nand_id[3],
-		      nand_para.nand_id[4],
-		      nand_para.nand_id[5]);
-	PRINT_NANDC_I("die_per_chip: %x\n", nand_para.die_per_chip);
-	PRINT_NANDC_I("sec_per_page: %x\n", nand_para.sec_per_page);
-	PRINT_NANDC_I("page_per_blk: %x\n", nand_para.page_per_blk);
-	PRINT_NANDC_I("cell: %x\n", nand_para.cell);
-	PRINT_NANDC_I("plane_per_die: %x\n", nand_para.plane_per_die);
-	PRINT_NANDC_I("blk_per_plane: %x\n", nand_para.blk_per_plane);
-	PRINT_NANDC_I("TotleBlock: %x\n", g_totle_block);
-	PRINT_NANDC_I("die gap: %x\n", nand_para.die_gap);
-	PRINT_NANDC_I("lsb_mode: %x\n", nand_para.lsb_mode);
-	PRINT_NANDC_I("read_retry_mode: %x\n", nand_para.read_retry_mode);
-	PRINT_NANDC_I("ecc_bits: %x\n", nand_para.ecc_bits);
-	PRINT_NANDC_I("Use ecc_bits: %x\n", g_nand_flash_ecc_bits);
-	PRINT_NANDC_I("access_freq: %x\n", nand_para.access_freq);
-	PRINT_NANDC_I("opt_mode: %x\n", nand_para.opt_mode);
-
-	PRINT_NANDC_I("Cache read enable: %x\n",
-		      nand_para.operation_opt & NAND_CACHE_READ_EN ? 1 : 0);
-	PRINT_NANDC_I("Cache random read enable: %x\n",
-		      nand_para.operation_opt &
-			NAND_CACHE_RANDOM_READ_EN ? 1 : 0);
-	PRINT_NANDC_I("Cache prog enable: %x\n",
-		      nand_para.operation_opt & NAND_CACHE_PROG_EN ? 1 : 0);
-	PRINT_NANDC_I("multi read enable: %x\n",
-		      nand_para.operation_opt & NAND_MULTI_READ_EN ? 1 : 0);
-
-	PRINT_NANDC_I("multi prog enable: %x\n",
-		      nand_para.operation_opt & NAND_MULTI_PROG_EN ? 1 : 0);
-	PRINT_NANDC_I("interleave enable: %x\n",
-		      nand_para.operation_opt & NAND_INTERLEAVE_EN ? 1 : 0);
-
-	PRINT_NANDC_I("read retry enable: %x\n",
-		      nand_para.operation_opt & NAND_READ_RETRY_EN ? 1 : 0);
-	PRINT_NANDC_I("randomizer enable: %x\n",
-		      nand_para.operation_opt & NAND_RANDOMIZER_EN ? 1 : 0);
-
-	PRINT_NANDC_I("SDR enable: %x\n",
-		      nand_para.operation_opt & NAND_SDR_EN ? 1 : 0);
-	PRINT_NANDC_I("ONFI enable: %x\n",
-		      nand_para.operation_opt & NAND_ONFI_EN ? 1 : 0);
-	PRINT_NANDC_I("TOGGLE enable: %x\n",
-		      nand_para.operation_opt & NAND_TOGGLE_EN ? 1 : 0);
-
-	PRINT_NANDC_I("g_nand_idb_res_blk_num: %x\n", g_nand_idb_res_blk_num);
+	rkflash_print_info("No.0 FLASH ID: %x %x %x %x %x %x\n",
+			   nand_para.nand_id[0],
+			   nand_para.nand_id[1],
+			   nand_para.nand_id[2],
+			   nand_para.nand_id[3],
+			   nand_para.nand_id[4],
+			   nand_para.nand_id[5]);
+	rkflash_print_info("die_per_chip: %x\n", nand_para.die_per_chip);
+	rkflash_print_info("sec_per_page: %x\n", nand_para.sec_per_page);
+	rkflash_print_info("page_per_blk: %x\n", nand_para.page_per_blk);
+	rkflash_print_info("cell: %x\n", nand_para.cell);
+	rkflash_print_info("plane_per_die: %x\n", nand_para.plane_per_die);
+	rkflash_print_info("blk_per_plane: %x\n", nand_para.blk_per_plane);
+	rkflash_print_info("TotleBlock: %x\n", g_totle_block);
+	rkflash_print_info("die gap: %x\n", nand_para.die_gap);
+	rkflash_print_info("lsb_mode: %x\n", nand_para.lsb_mode);
+	rkflash_print_info("read_retry_mode: %x\n", nand_para.read_retry_mode);
+	rkflash_print_info("ecc_bits: %x\n", nand_para.ecc_bits);
+	rkflash_print_info("Use ecc_bits: %x\n", g_nand_flash_ecc_bits);
+	rkflash_print_info("access_freq: %x\n", nand_para.access_freq);
+	rkflash_print_info("opt_mode: %x\n", nand_para.opt_mode);
+
+	rkflash_print_info("Cache read enable: %x\n",
+			   nand_para.operation_opt & NAND_CACHE_READ_EN ? 1 : 0);
+	rkflash_print_info("Cache random read enable: %x\n",
+			   nand_para.operation_opt &
+			   NAND_CACHE_RANDOM_READ_EN ? 1 : 0);
+	rkflash_print_info("Cache prog enable: %x\n",
+			   nand_para.operation_opt & NAND_CACHE_PROG_EN ? 1 : 0);
+	rkflash_print_info("multi read enable: %x\n",
+			   nand_para.operation_opt & NAND_MULTI_READ_EN ? 1 : 0);
+
+	rkflash_print_info("multi prog enable: %x\n",
+			   nand_para.operation_opt & NAND_MULTI_PROG_EN ? 1 : 0);
+	rkflash_print_info("interleave enable: %x\n",
+			   nand_para.operation_opt & NAND_INTERLEAVE_EN ? 1 : 0);
+
+	rkflash_print_info("read retry enable: %x\n",
+			   nand_para.operation_opt & NAND_READ_RETRY_EN ? 1 : 0);
+	rkflash_print_info("randomizer enable: %x\n",
+			   nand_para.operation_opt & NAND_RANDOMIZER_EN ? 1 : 0);
+
+	rkflash_print_info("SDR enable: %x\n",
+			   nand_para.operation_opt & NAND_SDR_EN ? 1 : 0);
+	rkflash_print_info("ONFI enable: %x\n",
+			   nand_para.operation_opt & NAND_ONFI_EN ? 1 : 0);
+	rkflash_print_info("TOGGLE enable: %x\n",
+			   nand_para.operation_opt & NAND_TOGGLE_EN ? 1 : 0);
+
+	rkflash_print_info("g_nand_idb_res_blk_num: %x\n", g_nand_idb_res_blk_num);
 }
 
-static void ftl_flash_init(void)
+static void flash_ftl_ops_init(void)
 {
 	u8 nandc_ver = nandc_get_version();
 
@@ -494,7 +406,7 @@ static void ftl_flash_init(void)
 	g_nand_phy_info.ecc_bits	= nand_para.ecc_bits;
 
 	/* driver register */
-	g_nand_ops.get_bad_blk_list	= get_bad_blk_list;
+	g_nand_ops.get_bad_blk_list	= flash_get_bad_blk_list;
 	g_nand_ops.erase_blk		= flash_erase_block;
 	g_nand_ops.prog_page		= flash_prog_page;
 	g_nand_ops.read_page		= flash_read_page;
@@ -504,11 +416,19 @@ static void ftl_flash_init(void)
 	}
 }
 
+void nandc_flash_reset(u8 cs)
+{
+	nandc_flash_cs(cs);
+	nandc_writel(RESET_CMD, NANDC_CHIP_CMD(cs));
+	nandc_wait_flash_ready(cs);
+	nandc_flash_de_cs(cs);
+}
+
 u32 nandc_flash_init(void __iomem *nandc_addr)
 {
 	u32 cs;
 
-	PRINT_NANDC_I("...%s enter...\n", __func__);
+	rkflash_print_error("...%s enter...\n", __func__);
 	g_nand_idb_res_blk_num = MAX_IDB_RESERVED_BLOCK;
 	g_nand_ecc_en = 0;
 
@@ -526,8 +446,8 @@ u32 nandc_flash_init(void __iomem *nandc_addr)
 			    id_byte[0][1] != 0xD1 &&
 			    id_byte[0][1] != 0x95 &&
 			    id_byte[0][1] != 0xDC &&
+			    id_byte[0][1] != 0xD3 &&
 			    id_byte[0][1] != 0x48)
-
 				return FTL_UNSUPPORTED_FLASH;
 		}
 	}
@@ -539,7 +459,8 @@ u32 nandc_flash_init(void __iomem *nandc_addr)
 		nand_para.nand_id[1] = 0xDA;
 	} else if (id_byte[0][1] == 0xDC) {
 		nand_para.nand_id[1] = 0xDC;
-		if (id_byte[0][0] == 0x2C && id_byte[0][3] == 0xA6) {
+		if ((id_byte[0][0] == 0x2C && id_byte[0][3] == 0xA6) ||
+		    (id_byte[0][0] == 0xC2 && id_byte[0][3] == 0xA2)) {
 			nand_para.plane_per_die = 2;
 			nand_para.sec_per_page = 8;
 		} else if (id_byte[0][0] == 0x98 && id_byte[0][3] == 0x26) {
@@ -555,16 +476,16 @@ u32 nandc_flash_init(void __iomem *nandc_addr)
 		nand_para.page_per_blk = 128;
 		nand_para.plane_per_die = 2;
 		nand_para.blk_per_plane = 2048;
+	} else if (id_byte[0][1] == 0xD3) {
+		nand_para.sec_per_page = 8;
+		nand_para.page_per_blk = 64;
+		nand_para.plane_per_die = 2;
+		nand_para.blk_per_plane = 2048;
 	}
 	flash_die_info_init();
 	flash_bch_sel(nand_para.ecc_bits);
-	nandc_flash_print_info();
-	/* flash_print_info(); */
-	ftl_flash_init();
-
-	#if FLASH_STRESS_TEST_EN
-	flash_test();
-	#endif
+	flash_show_info();
+	flash_ftl_ops_init();
 
 	return 0;
 }
diff --git a/drivers/rkflash/flash.h b/drivers/rkflash/flash.h
index 92e9878030..0067816773 100644
--- a/drivers/rkflash/flash.h
+++ b/drivers/rkflash/flash.h
@@ -122,16 +122,6 @@ struct NAND_PARA_INFO_T {
 	u8	reversd2[6];	/* 32 bytes */
 };
 
-struct FLASH_INFO_T {
-	u16	block_size;
-	u8	ecc_bits;
-	u32	flash_size;
-	u16	page_size;
-	u8	access_time;
-	u8	manufacturer_name;
-	u8	flash_mask;
-};
-
 extern struct nand_phy_info	g_nand_phy_info;
 extern struct nand_ops		g_nand_ops;
 extern void __iomem *nandc_base;
diff --git a/drivers/rkflash/nandc.h b/drivers/rkflash/nandc.h
index e0eb40355c..dce9fcfd4a 100644
--- a/drivers/rkflash/nandc.h
+++ b/drivers/rkflash/nandc.h
@@ -60,7 +60,6 @@ union FM_CTL_T {
 		unsigned syn_clken : 1;
 		unsigned syn_mode : 1;
 		unsigned flash_abort_en : 1;
-		/*share with flash_abort_stat*/
 		unsigned flash_abort_clear : 1;
 		unsigned sif_read_delay : 3;
 		unsigned io_mux : 3;
diff --git a/drivers/rkflash/rkflash_api.c b/drivers/rkflash/rkflash_api.c
index 26c82a780f..a87b4d8a19 100644
--- a/drivers/rkflash/rkflash_api.c
+++ b/drivers/rkflash/rkflash_api.c
@@ -77,7 +77,7 @@ int rksfc_nor_write(struct udevice *udev,
 
 	if (sec + n_sec - 1 < FLASH_VENDOR_PART_START ||
 	    sec > FLASH_VENDOR_PART_END) {
-		ret = snor_write(p_dev, sec, n_sec, p_data);
+		ret = snor_write(p_dev, sec, n_sec, (void *)p_data);
 		if (ret != n_sec)
 			return ret;
 	} else {
@@ -133,10 +133,13 @@ int rksfc_nand_init(struct udevice *udev)
 	int ret;
 
 	ret = sfc_nand_init();
-	if (ret)
+	if (ret) {
 		return ret;
-	else
+	} else {
+		sfc_nand_ftl_ops_init();
+
 		return sftl_init();
+	}
 }
 
 int rksfc_nand_read(struct udevice *udev, u32 index, u32 count, void *buf)
diff --git a/drivers/rkflash/rkflash_debug.c b/drivers/rkflash/rkflash_debug.c
index df532db1fd..97976c262c 100644
--- a/drivers/rkflash/rkflash_debug.c
+++ b/drivers/rkflash/rkflash_debug.c
@@ -5,35 +5,89 @@
  */
 
 #include <blk.h>
+#include <common.h>
+#include <hexdump.h>
 
 #include "rkflash_debug.h"
 #include "rkflash_blk.h"
 #include "boot_rkimg.h"
 
-void rkflash_print_hex(char *s, void *buf, u32 width, u32 len)
+static unsigned int rkflash_debug;
+
+__printf(1, 2) int rkflash_print_dio(const char *fmt, ...)
 {
-	u32 i, j;
-	char *p8 = (char *)buf;
-	short *p16 = (short *)buf;
-	u32 *p32 = (u32 *)buf;
-
-	j = 0;
-	for (i = 0; i < len; i++) {
-		if (j == 0)
-			printf("%s 0x%x:", s, i * width);
-
-		if (width == 4)
-			printf("%x ", p32[i]);
-		else if (width == 2)
-			printf("%x ", p16[i]);
-		else
-			printf("%02x ", p8[i]);
-		if (++j >= 16) {
-			j = 0;
-			printf("\n");
-		}
+	int nret = 0;
+#if PRINT_SWI_CON_IO
+	if (rkflash_debug & PRINT_BIT_CON_IO)  {
+		va_list args;
+
+		if (!fmt)
+			return nret;
+
+		va_start(args, fmt);
+		nret = vprintf(fmt, args);
+		va_end(args);
+	}
+#endif
+	return nret;
+}
+
+__printf(1, 2) int rkflash_print_bio(const char *fmt, ...)
+{
+	int nret = 0;
+#if PRINT_SWI_BLK_IO
+	if (rkflash_debug & PRINT_BIT_BLK_IO)  {
+		va_list args;
+
+		if (!fmt)
+			return nret;
+
+		va_start(args, fmt);
+		nret = vprintf(fmt, args);
+		va_end(args);
 	}
-	printf("\n");
+#endif
+	return nret;
+}
+
+__printf(1, 2) int rkflash_print_info(const char *fmt, ...)
+{
+	int nret = 0;
+#if PRINT_SWI_INFO
+	va_list args;
+
+	if (!fmt)
+		return nret;
+
+	va_start(args, fmt);
+	nret = vprintf(fmt, args);
+	va_end(args);
+#endif
+	return nret;
+}
+
+__printf(1, 2) int rkflash_print_error(const char *fmt, ...)
+{
+	int nret = 0;
+#if PRINT_SWI_ERROR
+	va_list args;
+
+	if (!fmt)
+		return nret;
+
+	va_start(args, fmt);
+	nret = vprintf(fmt, args);
+	va_end(args);
+#endif
+	return nret;
+}
+
+void rkflash_print_hex(const char *s, const void *buf, int w, size_t len)
+{
+#if PRINT_SWI_ERROR
+	print_hex_dump(s, DUMP_PREFIX_OFFSET, 4, w,
+		       buf, (len) * w, 0);
+#endif
 }
 
 #if (BLK_STRESS_TEST_EN)
diff --git a/drivers/rkflash/rkflash_debug.h b/drivers/rkflash/rkflash_debug.h
index e93c837c2d..19ece77e72 100644
--- a/drivers/rkflash/rkflash_debug.h
+++ b/drivers/rkflash/rkflash_debug.h
@@ -11,64 +11,36 @@
 #include <dm.h>
 
 /*
- * Test switch
+ * Debug control center
+ * 1. Set Printing-adding-macro to 1 to allow print code being compiled in.
+ * 2. Set variable 'rkflash_debug' to control debug print to enable print.
  */
-#define BLK_STRESS_TEST_EN	0
 
 /*
- * Print switch, set to 1 if needed
- * I - info
- * E - error
- * HEX - multiline print
+ * Printing-adding
  */
+#define	PRINT_SWI_INFO		0
+#define	PRINT_SWI_ERROR		1
+#define PRINT_SWI_HEX		1
 
-#define	PRINT_SWI_SFC_I		0
-#define	PRINT_SWI_SFC_E		1
-#define PRINT_SWI_SFC_HEX	1
-
-#define	PRINT_SWI_NANDC_I	0
-#define	PRINT_SWI_NANDC_E	1
-#define PRINT_SWI_NANDC_HEX	1
-
-#if (PRINT_SWI_SFC_I)
-#define PRINT_SFC_I(...) printf(__VA_ARGS__)
-#else
-#define PRINT_SFC_I(...)
-#endif
-
-#if (PRINT_SWI_SFC_E)
-#define PRINT_SFC_E(...) printf(__VA_ARGS__)
-#else
-#define PRINT_SFC_E(...)
-#endif
-
-#if (PRINT_SWI_SFC_HEX)
-#define PRINT_SFC_HEX(s, buf, width, len)\
-		rkflash_print_hex(s, buf, width, len)
-#else
-#define PRINT_SFC_HEX(s, buf, width, len)
-#endif
+#define	PRINT_SWI_CON_IO	1
+#define	PRINT_SWI_BLK_IO	1
 
-#if (PRINT_SWI_NANDC_I)
-#define PRINT_NANDC_I(...) printf(__VA_ARGS__)
-#else
-#define PRINT_NANDC_I(...)
-#endif
+/*
+ * Print switch, set var rkflash_debug corresponding bit to 1 if needed.
+ * I - info
+ * IO - IO request about
+ */
+#define	PRINT_BIT_CON_IO	BIT(0)
+#define	PRINT_BIT_BLK_IO	BIT(4)
 
-#if (PRINT_SWI_NANDC_E)
-#define PRINT_NANDC_E(...) printf(__VA_ARGS__)
-#else
-#define PRINT_NANDC_E(...)
-#endif
+__printf(1, 2) int rkflash_print_info(const char *fmt, ...);
+__printf(1, 2) int rkflash_print_error(const char *fmt, ...);
+void rkflash_print_hex(const char *s, const void *buf, int w, size_t len);
 
-#if (PRINT_SWI_NANDC_HEX)
-#define PRINT_NANDC_HEX(s, buf, width, len)\
-		rkflash_print_hex(s, buf, width, len)
-#else
-#define PRINT_NANDC_HEX(s, buf, width, len)
-#endif
+__printf(1, 2) int rkflash_print_dio(const char *fmt, ...);
+__printf(1, 2) int rkflash_print_bio(const char *fmt, ...);
 
-void rkflash_print_hex(char *s, void *buf, u32 width, u32 len);
 void rkflash_test(struct udevice *p_dev);
 
 #endif
diff --git a/drivers/rkflash/sfc.h b/drivers/rkflash/sfc.h
index a1431f8b09..4ad808f856 100644
--- a/drivers/rkflash/sfc.h
+++ b/drivers/rkflash/sfc.h
@@ -20,7 +20,7 @@
 #define SFC_RX_WMARK_SHIFT	(8)
 #define SFC_TX_WMARK_SHIFT	(0)
 
-/*return value*/
+/* return value */
 #define SFC_OK                      (0)
 #define SFC_ERROR                   (-1)
 #define SFC_PARAM_ERR               (-2)
@@ -109,6 +109,20 @@ union SFCFSR_DATA {
 	} b;
 };
 
+/* Manufactory ID */
+#define MID_WINBOND	0xEF
+#define MID_GIGADEV	0xC8
+#define MID_MICRON	0x2C
+#define MID_MACRONIX	0xC2
+#define MID_SPANSION	0x01
+#define MID_EON		0x1C
+#define MID_ST		0x20
+#define MID_XTX		0x0B
+#define MID_PUYA	0x85
+#define MID_XMC		0x20
+#define MID_DOSILICON	0xF8
+#define MID_ZBIT	0x5E
+
 /*------------------------------ Global Typedefs -----------------------------*/
 enum SFC_DATA_LINES {
 	DATA_LINES_X1 = 0,
diff --git a/drivers/rkflash/sfc_nand.c b/drivers/rkflash/sfc_nand.c
index 6a7bfcef24..d8b8ff9b42 100644
--- a/drivers/rkflash/sfc_nand.c
+++ b/drivers/rkflash/sfc_nand.c
@@ -81,7 +81,6 @@ static struct nand_info spi_nand_tbl[] = {
 	{0xC8C1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 8, 0xB0, 0, 4, 8, &sfc_nand_ecc_status_sp3},
 };
 
-static u8 id_byte[8];
 static struct nand_info *p_nand_info;
 static u32 gp_page_buf[SFC_NAND_PAGE_MAX_SIZE / 4];
 static struct SFNAND_DEV sfc_nand_dev;
@@ -183,10 +182,10 @@ static int sfc_nand_wait_busy(u8 *data, int timeout)
 
 /*
  * ecc default:
- * 0, No bit errors were detected
- * 1, Bit errors were detected and corrected.
- * 2, Multiple bit errors were detected and not corrected.
- * 3, Bits errors were detected and corrected, bit error count
+ * 0x00, No bit errors were detected
+ * 0x01, Bit errors were detected and corrected.
+ * 0x10, Multiple bit errors were detected and not corrected.
+ * 0x11, Bits errors were detected and corrected, bit error count
  *	exceed the bit flip detection threshold
  */
 static u32 sfc_nand_ecc_status(void)
@@ -261,7 +260,7 @@ u32 sfc_nand_ecc_status_sp1(void)
  * [0x0100, 0x0111], Bit errors were detected and corrected. Not
  *	reach Flipping Bits;
  * [0x1000, 0x1011], Multiple bit errors were detected and
- *	not corrected;
+ *	not corrected.
  * [0x1100, 0x1111], reserved.
  */
 u32 sfc_nand_ecc_status_sp2(void)
@@ -416,12 +415,13 @@ u32 sfc_nand_ecc_status_sp5(void)
 	return ret;
 }
 
-static u32 sfc_nand_erase_block(u8 cs, u32 addr)
+u32 sfc_nand_erase_block(u8 cs, u32 addr)
 {
 	int ret;
 	union SFCCMD_DATA sfcmd;
 	u8 status;
 
+	rkflash_print_dio("%s %x\n", __func__, addr);
 	sfcmd.d32 = 0;
 	sfcmd.b.cmd = p_nand_info->block_erase_cmd;
 	sfcmd.b.addrbits = SFC_ADDR_24BITS;
@@ -432,10 +432,11 @@ static u32 sfc_nand_erase_block(u8 cs, u32 addr)
 	ret = sfc_nand_wait_busy(&status, 1000 * 1000);
 	if (status & (1 << 2))
 		return SFC_NAND_PROG_ERASE_ERROR;
+
 	return ret;
 }
 
-static u32 sfc_nand_prog_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
+static u32 sfc_nand_prog_page_raw(u8 cs, u32 addr, u32 *p_page_buf)
 {
 	int ret;
 	u32 plane;
@@ -443,19 +444,8 @@ static u32 sfc_nand_prog_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
 	union SFCCTRL_DATA sfctrl;
 	u8 status;
 	u32 sec_per_page = p_nand_info->sec_per_page;
-	u32 spare_offs_1 = p_nand_info->spare_offs_1;
-	u32 spare_offs_2 = p_nand_info->spare_offs_2;
-	u32 data_size = sec_per_page * 512;
 
-	PRINT_SFC_I("%s %x %x %x\n", __func__, addr, p_data[0], p_spare[0]);
-	memcpy(gp_page_buf, p_data, data_size);
-	ftl_memset(&gp_page_buf[data_size / 4], 0xff, sec_per_page * 16);
-	gp_page_buf[(data_size + spare_offs_1) / 4] = p_spare[0];
-	gp_page_buf[(data_size + spare_offs_2) / 4] = p_spare[1];
-	if (sec_per_page == 8) {
-		gp_page_buf[(data_size + spare_offs_1) / 4 + 1] = p_spare[2];
-		gp_page_buf[(data_size + spare_offs_2) / 4 + 1] = p_spare[3];
-	}
+	rkflash_print_dio("%s %x %x\n", __func__, addr, p_page_buf[0]);
 	sfc_nand_write_en();
 	if (sfc_nand_dev.prog_lines == DATA_LINES_X4 &&
 	    p_nand_info->feature & FEA_SOFT_QOP_BIT &&
@@ -472,40 +462,58 @@ static u32 sfc_nand_prog_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
 	sfctrl.b.datalines = sfc_nand_dev.prog_lines;
 	sfctrl.b.addrbits = 16;
 	plane = p_nand_info->plane_per_die == 2 ? ((addr >> 6) & 0x1) << 12 : 0;
-	sfc_request(sfcmd.d32, sfctrl.d32, plane, gp_page_buf);
+	sfc_request(sfcmd.d32, sfctrl.d32, plane, p_page_buf);
 
 	sfcmd.d32 = 0;
 	sfcmd.b.cmd = p_nand_info->page_prog_cmd;
 	sfcmd.b.addrbits = SFC_ADDR_24BITS;
 	sfcmd.b.datasize = 0;
 	sfcmd.b.rw = SFC_WRITE;
-	ret = sfc_request(sfcmd.d32, 0, addr, p_data);
+	ret = sfc_request(sfcmd.d32, 0, addr, p_page_buf);
 	if (ret != SFC_OK)
 		return ret;
 	ret = sfc_nand_wait_busy(&status, 1000 * 1000);
 	if (status & (1 << 3))
 		return SFC_NAND_PROG_ERASE_ERROR;
+
 	return ret;
 }
 
-static u32 sfc_nand_read_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
+u32 sfc_nand_prog_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
+{
+	int ret;
+	u32 sec_per_page = p_nand_info->sec_per_page;
+	u32 data_size = sec_per_page * SFC_NAND_SECTOR_SIZE;
+	u32 spare_offs_1 = p_nand_info->spare_offs_1;
+	u32 spare_offs_2 = p_nand_info->spare_offs_2;
+
+	memcpy(gp_page_buf, p_data, data_size);
+	memset(&gp_page_buf[data_size / 4], 0xff, sec_per_page * 16);
+	gp_page_buf[(data_size + spare_offs_1) / 4] = p_spare[0];
+	gp_page_buf[(data_size + spare_offs_2) / 4] = p_spare[1];
+	if (sec_per_page == 8) {
+		gp_page_buf[(data_size + spare_offs_1) / 4 + 1] = p_spare[2];
+		gp_page_buf[(data_size + spare_offs_2) / 4 + 1] = p_spare[3];
+	}
+	ret = sfc_nand_prog_page_raw(cs, addr, gp_page_buf);
+
+	return ret;
+}
+
+static u32 sfc_nand_read_page_raw(u8 cs, u32 addr, u32 *p_page_buf)
 {
 	int ret;
 	u32 plane;
 	union SFCCMD_DATA sfcmd;
 	union SFCCTRL_DATA sfctrl;
 	u32 ecc_result;
-	u32 spare_offs_1 = p_nand_info->spare_offs_1;
-	u32 spare_offs_2 = p_nand_info->spare_offs_2;
 	u32 sec_per_page = p_nand_info->sec_per_page;
-	u32 data_size = sec_per_page * 512;
 
-	PRINT_SFC_I("%s %x %x %x\n", __func__, addr, p_data[0], p_spare[0]);
 	sfcmd.d32 = 0;
 	sfcmd.b.cmd = p_nand_info->page_read_cmd;
 	sfcmd.b.datasize = 0;
 	sfcmd.b.addrbits = SFC_ADDR_24BITS;
-	sfc_request(sfcmd.d32, 0, addr, p_data);
+	sfc_request(sfcmd.d32, 0, addr, p_page_buf);
 
 	if (p_nand_info->ecc_status)
 		ecc_result = p_nand_info->ecc_status();
@@ -525,7 +533,24 @@ static u32 sfc_nand_read_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
 	sfctrl.b.datalines = sfc_nand_dev.read_lines;
 
 	plane = p_nand_info->plane_per_die == 2 ? ((addr >> 6) & 0x1) << 12 : 0;
-	ret = sfc_request(sfcmd.d32, sfctrl.d32, plane << 8, gp_page_buf);
+	ret = sfc_request(sfcmd.d32, sfctrl.d32, plane << 8, p_page_buf);
+	rkflash_print_dio("%s %x %x\n", __func__, addr, p_page_buf[0]);
+
+	if (ret != SFC_OK)
+		return SFC_NAND_HW_ERROR;
+
+	return ecc_result;
+}
+
+u32 sfc_nand_read_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
+{
+	int ret;
+	u32 sec_per_page = p_nand_info->sec_per_page;
+	u32 data_size = sec_per_page * SFC_NAND_SECTOR_SIZE;
+	u32 spare_offs_1 = p_nand_info->spare_offs_1;
+	u32 spare_offs_2 = p_nand_info->spare_offs_2;
+
+	ret = sfc_nand_read_page_raw(cs, addr, gp_page_buf);
 	memcpy(p_data, gp_page_buf, data_size);
 	p_spare[0] = gp_page_buf[(data_size + spare_offs_1) / 4];
 	p_spare[1] = gp_page_buf[(data_size + spare_offs_2) / 4];
@@ -533,21 +558,50 @@ static u32 sfc_nand_read_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
 		p_spare[2] = gp_page_buf[(data_size + spare_offs_1) / 4 + 1];
 		p_spare[3] = gp_page_buf[(data_size + spare_offs_2) / 4 + 1];
 	}
-	if (ret != SFC_OK)
-		return SFC_NAND_ECC_ERROR;
 
-	if (ecc_result != SFC_NAND_ECC_OK) {
-		PRINT_SFC_E("%s[0x%x], ret=0x%x\n", __func__, addr, ecc_result);
+	if (ret != SFC_NAND_ECC_OK) {
+		rkflash_print_error("%s[0x%x], ret=0x%x\n", __func__, addr, ret);
 		if (p_data)
-			PRINT_SFC_HEX("data:", p_data, 4, 8);
+			rkflash_print_hex("data:", p_data, 4, 8);
 		if (p_spare)
-			PRINT_SFC_HEX("spare:", p_spare, 4, 2);
+			rkflash_print_hex("spare:", p_spare, 4, 2);
 	}
 
-	return ecc_result;
+	return ret;
 }
 
-static int sfc_nand_read_id_raw(u8 *data)
+u32 sfc_nand_check_bad_block(u8 cs, u32 addr)
+{
+	u32 ret;
+	u32 data_size = p_nand_info->sec_per_page * SFC_NAND_SECTOR_SIZE;
+
+	ret = sfc_nand_read_page_raw(cs, addr, gp_page_buf);
+	if (ret)
+		return true;
+	/* Original bad block */
+	if ((gp_page_buf[data_size / 4] & 0xFF) != 0xFF)
+		return true;
+
+	return false;
+}
+
+u32 sfc_nand_mark_bad_block(u8 cs, u32 addr)
+{
+	u32 ret;
+	u32 data_size = p_nand_info->sec_per_page * SFC_NAND_SECTOR_SIZE;
+
+	ret = sfc_nand_read_page_raw(cs, addr, gp_page_buf);
+	if (ret)
+		return SFC_NAND_HW_ERROR;
+	gp_page_buf[data_size / 4] = 0x0;
+	ret = sfc_nand_prog_page_raw(cs, addr, gp_page_buf);
+	if (ret)
+		return SFC_NAND_HW_ERROR;
+
+	return ret;
+}
+
+int sfc_nand_read_id(u8 *data)
 {
 	int ret;
 	union SFCCMD_DATA sfcmd;
@@ -574,9 +628,15 @@ static int sfc_nand_get_bad_block_list(u16 *table, u32 die)
 	u32 *pread;
 	u32 *pspare_read;
 
-	PRINT_SFC_E("%s\n", __func__);
-	pread = ftl_malloc(2048);
+	rkflash_print_info("%s\n", __func__);
+	pread = ftl_malloc(SFC_NAND_PAGE_MAX_SIZE);
 	pspare_read = ftl_malloc(8);
+	if (!pread || !pspare_read) {
+		kfree(pread);
+		kfree(pspare_read);
+		return -1;
+	}
+
 	bad_cnt = 0;
 	blk_per_die = p_nand_info->plane_per_die *
 			p_nand_info->blk_per_plane;
@@ -588,98 +648,16 @@ static int sfc_nand_get_bad_block_list(u16 *table, u32 die)
 		if (pread[0] != 0xFFFFFFFF ||
 		    pspare_read[0] != 0xFFFFFFFF) {
 			table[bad_cnt++] = blk;
-			PRINT_SFC_E("die[%d], bad_blk[%d]\n", die, blk);
+			rkflash_print_error("die[%d], bad_blk[%d]\n", die, blk);
 		}
 	}
 	ftl_free(pread);
 	ftl_free(pspare_read);
-	return (int)bad_cnt;
-}
 
-#if SFC_NAND_STRESS_TEST_EN
-
-#define SFC_NAND_PAGE_SIZE	2048
-#define SFC_NAND_SPARE_SIZE	8
-
-static u16 bad_blk_list[1024];
-static u32 pwrite[SFC_NAND_PAGE_SIZE / 4];
-static u32 pread[SFC_NAND_PAGE_SIZE / 4];
-static u32 pspare_write[SFC_NAND_SPARE_SIZE / 4];
-static u32 pspare_read[SFC_NAND_SPARE_SIZE / 4];
-static u32 bad_blk_num;
-static u32 bad_page_num;
-
-static void sfc_nand_test(void)
-{
-	u32 i, blk, page, bad_cnt, page_addr;
-	int ret;
-	u32 pages_num = 64;
-	u32 blk_addr = 64;
-	u32 is_bad_blk = 0;
-
-	PRINT_SFC_E("%s\n", __func__);
-
-	bad_blk_num = 0;
-	bad_page_num = 0;
-	bad_cnt	= sfc_nand_get_bad_block_list(bad_blk_list, 0);
-
-	for (blk = 0; blk < 1024; blk++) {
-		for (i = 0; i < bad_cnt; i++) {
-			if (bad_blk_list[i] == blk)
-				break;
-		}
-		if (i < bad_cnt)
-			continue;
-		is_bad_blk = 0;
-		PRINT_SFC_E("Flash prog block: %x\n", blk);
-		sfc_nand_erase_block(0, blk * blk_addr);
-		for (page = 0; page < pages_num; page++) {
-			page_addr = blk * blk_addr + page;
-			for (i = 0; i < 512; i++)
-				pwrite[i] = (page_addr << 16) + i;
-			pspare_write[0] = pwrite[0] + 0x5AF0;
-			pspare_write[1] = pspare_write[0] + 1;
-			sfc_nand_prog_page(0, page_addr, pwrite, pspare_write);
-			memset(pread, 0, 2048);
-			memset(pspare_read, 0, 8);
-			ret = sfc_nand_read_page(0, page_addr, pread,
-						 pspare_read);
-			if (ret != SFC_NAND_ECC_OK)
-				is_bad_blk = 1;
-			for (i = 0; i < 512; i++) {
-				if (pwrite[i] != pread[i]) {
-					is_bad_blk = 1;
-					break;
-				}
-			}
-			for (i = 0; i < 2; i++) {
-				if (pspare_write[i] != pspare_read[i]) {
-					is_bad_blk = 1;
-					break;
-				}
-			}
-			if (is_bad_blk) {
-				bad_page_num++;
-				PRINT_SFC_E("ERR:page%x, ret=%x\n",
-					    page_addr, ret);
-				PRINT_SFC_HEX("data:", pread, 4, 8);
-				PRINT_SFC_HEX("spare:", pspare_read, 4, 2);
-			}
-		}
-		sfc_nand_erase_block(0, blk * blk_addr);
-		if (is_bad_blk)
-			bad_blk_num++;
-	}
-	PRINT_SFC_E("bad_blk_num = %d, bad_page_num = %d\n",
-		    bad_blk_num, bad_page_num);
-
-	PRINT_SFC_E("Flash Test Finish!!!\n");
-	while (1)
-		;
+	return (int)bad_cnt;
 }
-#endif
 
-static void ftl_flash_init(void)
+void sfc_nand_ftl_ops_init(void)
 {
 	/* para init */
 	g_nand_phy_info.nand_type	= 1;
@@ -688,7 +666,7 @@ static void ftl_flash_init(void)
 	g_nand_phy_info.blk_per_plane	= p_nand_info->blk_per_plane;
 	g_nand_phy_info.page_per_blk	= p_nand_info->page_per_blk;
 	g_nand_phy_info.page_per_slc_blk = p_nand_info->page_per_blk;
-	g_nand_phy_info.byte_per_sec	= 512;
+	g_nand_phy_info.byte_per_sec	= SFC_NAND_SECTOR_SIZE;
 	g_nand_phy_info.sec_per_page	= p_nand_info->sec_per_page;
 	g_nand_phy_info.sec_per_blk	= p_nand_info->sec_per_page *
 					  p_nand_info->page_per_blk;
@@ -729,11 +707,11 @@ static int spi_nand_enable_QE(void)
 
 u32 sfc_nand_init(void)
 {
-	PRINT_SFC_I("...%s enter...\n", __func__);
+	u8 status, id_byte[8];
 
-	sfc_nand_read_id_raw(id_byte);
-	PRINT_SFC_E("sfc_nand id: %x %x %x\n",
-		    id_byte[0], id_byte[1], id_byte[2]);
+	sfc_nand_read_id(id_byte);
+	rkflash_print_error("sfc_nand id: %x %x %x\n",
+			    id_byte[0], id_byte[1], id_byte[2]);
 	if (id_byte[0] == 0xFF || id_byte[0] == 0x00)
 		return FTL_NO_FLASH;
 
@@ -743,6 +721,9 @@ u32 sfc_nand_init(void)
 
 	sfc_nand_dev.manufacturer = id_byte[0];
 	sfc_nand_dev.mem_type = id_byte[1];
+	sfc_nand_dev.capacity = p_nand_info->density;
+	sfc_nand_dev.block_size = p_nand_info->page_per_blk * p_nand_info->sec_per_page;
+	sfc_nand_dev.page_size = p_nand_info->sec_per_page;
 
 	/* disable block lock */
 	sfc_nand_write_feature(0xA0, 0);
@@ -764,31 +745,25 @@ u32 sfc_nand_init(void)
 		sfc_nand_dev.page_prog_cmd = p_nand_info->prog_cache_cmd_4;
 	}
 
-	if (1) {
-		u8 status;
-
-		sfc_nand_read_feature(0xA0, &status);
-		PRINT_SFC_I("sfc_nand A0 = 0x%x\n", status);
-		sfc_nand_read_feature(0xB0, &status);
-		PRINT_SFC_I("sfc_nand B0 = 0x%x\n", status);
-		sfc_nand_read_feature(0xC0, &status);
-		PRINT_SFC_I("sfc_nand C0 = 0x%x\n", status);
-		PRINT_SFC_I("read_lines = %x\n", sfc_nand_dev.read_lines);
-		PRINT_SFC_I("prog_lines = %x\n", sfc_nand_dev.prog_lines);
-		PRINT_SFC_I("page_read_cmd = %x\n", sfc_nand_dev.page_read_cmd);
-		PRINT_SFC_I("page_prog_cmd = %x\n", sfc_nand_dev.page_prog_cmd);
-	}
-	ftl_flash_init();
-
-	#if SFC_NAND_STRESS_TEST_EN
-	sfc_nand_test();
-	#endif
+	sfc_nand_read_feature(0xA0, &status);
+	rkflash_print_info("sfc_nand A0 = 0x%x\n", status);
+	sfc_nand_read_feature(0xB0, &status);
+	rkflash_print_info("sfc_nand B0 = 0x%x\n", status);
+	rkflash_print_info("read_lines = %x\n", sfc_nand_dev.read_lines);
+	rkflash_print_info("prog_lines = %x\n", sfc_nand_dev.prog_lines);
+	rkflash_print_info("page_read_cmd = %x\n", sfc_nand_dev.page_read_cmd);
+	rkflash_print_info("page_prog_cmd = %x\n", sfc_nand_dev.page_prog_cmd);
 
 	return SFC_OK;
 }
 
-int sfc_nand_read_id(u8 *data)
+void sfc_nand_deinit(void)
 {
-	memcpy(data, id_byte, 3);
-	return 0;
+	/* to-do */
 }
+
+struct SFNAND_DEV *sfc_nand_get_private_dev(void)
+{
+	return &sfc_nand_dev;
+}
+
diff --git a/drivers/rkflash/sfc_nand.h b/drivers/rkflash/sfc_nand.h
index c99ec5ab63..289834f777 100644
--- a/drivers/rkflash/sfc_nand.h
+++ b/drivers/rkflash/sfc_nand.h
@@ -7,16 +7,17 @@
 #ifndef __SFC_NAND_H
 #define __SFC_NAND_H
 
-#define SFC_NAND_STRESS_TEST_EN		0
+#include "flash_com.h"
 
-#define SFC_NAND_PROG_ERASE_ERROR	-2
-#define SFC_NAND_HW_ERROR		-1
+#define SFC_NAND_PROG_ERASE_ERROR	2
+#define SFC_NAND_HW_ERROR		1
 #define SFC_NAND_ECC_ERROR		NAND_ERROR
 #define SFC_NAND_ECC_REFRESH		NAND_STS_REFRESH
 #define SFC_NAND_ECC_OK			NAND_STS_OK
 
 #define SFC_NAND_PAGE_MAX_SIZE		4224
 #define SFC_NAND_SECTOR_FULL_SIZE	528
+#define SFC_NAND_SECTOR_SIZE		512
 
 #define FEA_READ_STATUE_MASK    (0x3 << 0)
 #define FEA_STATUE_MODE1        0
@@ -27,14 +28,6 @@
 #define FEA_4BYTE_ADDR_MODE	BIT(5)
 #define FEA_SOFT_QOP_BIT	BIT(6)
 
-#define MID_WINBOND             0xEF
-#define MID_GIGADEV             0xC8
-#define MID_MICRON              0x2C
-#define MID_MACRONIX            0xC2
-#define MID_SPANSION            0x01
-#define MID_EON                 0x1C
-#define MID_ST                  0x20
-
 /* Command Set */
 #define CMD_READ_JEDECID        (0x9F)
 #define CMD_READ_DATA           (0x03)
@@ -114,8 +107,8 @@ struct nand_info {
 	u8 QE_address;
 	u8 QE_bits;
 
-	u8 spare_offs_1;	/* 4/8 bytes for 2KB/4KB page size flash */
-	u8 spare_offs_2;	/* 4/8 bytes for 2KB/4KB page size flash */
+	u8 spare_offs_1;
+	u8 spare_offs_2;
 	u32 (*ecc_status)(void);
 };
 
@@ -130,5 +123,12 @@ u32 sfc_nand_ecc_status_sp2(void);
 u32 sfc_nand_ecc_status_sp3(void);
 u32 sfc_nand_ecc_status_sp4(void);
 u32 sfc_nand_ecc_status_sp5(void);
+u32 sfc_nand_erase_block(u8 cs, u32 addr);
+u32 sfc_nand_prog_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare);
+u32 sfc_nand_read_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare);
+u32 sfc_nand_check_bad_block(u8 cs, u32 addr);
+u32 sfc_nand_mark_bad_block(u8 cs, u32 addr);
+void sfc_nand_ftl_ops_init(void);
+struct SFNAND_DEV *sfc_nand_get_private_dev(void);
 
 #endif
diff --git a/drivers/rkflash/sfc_nor.c b/drivers/rkflash/sfc_nor.c
index f97b5f9dd0..c443cfd11c 100644
--- a/drivers/rkflash/sfc_nor.c
+++ b/drivers/rkflash/sfc_nor.c
@@ -8,9 +8,8 @@
 #include <linux/kernel.h>
 #include <linux/string.h>
 
-#include "sfc_nor.h"
 #include "rkflash_debug.h"
-#include "rkflash_blk.h"
+#include "sfc_nor.h"
 
 static struct flash_info spi_flash_tbl[] = {
 	/* GD25Q32B */
@@ -24,13 +23,13 @@ static struct flash_info spi_flash_tbl[] = {
 	/* GD25Q512MC */
 	{ 0xc84020, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x1C, 17, 6, 0 },
 	/* 25Q64JVSSIQ */
-	{ 0xef4017, 128, 8, 0x13, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0 },
+	{ 0xef4017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0 },
 	/* 25Q128FV and 25Q128JV*/
 	{ 0xef4018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 9, 0 },
-	/* 25Q256FV */
+	/* 25Q256F/J */
 	{ 0xef4019, 128, 8, 0x13, 0x02, 0x6C, 0x32, 0x20, 0xD8, 0x3C, 16, 9, 0 },
 	/* 25Q64FWSSIG */
-	{ 0xef6017, 128, 8, 0x13, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0 },
+	{ 0xef6017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0 },
 	/* MX25L6433F */
 	{ 0xc22017, 128, 8, 0x03, 0x02, 0x6B, 0x38, 0x20, 0xD8, 0x0E, 14, 6, 0 },
 	/* MX25L12835E/F MX25L12833FMI-10G */
@@ -51,6 +50,8 @@ static struct flash_info spi_flash_tbl[] = {
 	{ 0x207017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 0, 0 },
 	/* XT25F128A XM25QH128A */
 	{ 0x207018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x00, 15, 0, 0 },
+	/* XT25F64BSSIGU-5 */
+	{ 0x0b4017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 14, 9, 0 },
 	/* XT25F128BSSIGU */
 	{ 0x0b4018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 15, 9, 0 },
 	/* EN25QH128A */
@@ -61,34 +62,16 @@ static struct flash_info spi_flash_tbl[] = {
 	{ 0x1c3817, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 0, 0 },
 	/* P25Q64H */
 	{ 0x856017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0 },
+	/* EN25QH256A */
+	{ 0x1c7019, 128, 8, 0x13, 0x12, 0x6C, 0x34, 0x21, 0xDC, 0x3C, 16, 0, 0 },
+	/* FM25Q64A */
+	{ 0xf83217, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 14, 9, 0 },
+	/* ZB25VQ64 */
+	{ 0x5e4017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0 },
+	/* ZB25VQ128 */
+	{ 0x5e4018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 9, 0 },
 };
 
-static const u8 sfnor_dev_code[] = {
-	0x11,
-	0x12,
-	0x13,
-	0x14,
-	0x15,
-	0x16,
-	0x17,
-	0x18,
-	0x19
-};
-
-static const u32 sfnor_capacity[] = {
-	0x20000,        /* 128k-byte */
-	0x40000,        /* 256k-byte */
-	0x80000,        /* 512k-byte */
-	0x100000,       /* 1M-byte */
-	0x200000,       /* 2M-byte */
-	0x400000,       /* 4M-byte */
-	0x800000,       /* 8M-byte */
-	0x1000000,      /* 16M-byte */
-	0x2000000       /* 32M-byte */
-};
-
-static struct flash_info *g_spi_flash_info;
-
 static int snor_write_en(void)
 {
 	int ret;
@@ -102,6 +85,23 @@ static int snor_write_en(void)
 	return ret;
 }
 
+int snor_reset_device(void)
+{
+	int ret;
+	union SFCCMD_DATA sfcmd;
+
+	sfcmd.d32 = 0;
+	sfcmd.b.cmd = CMD_ENABLE_RESER;
+	sfc_request(sfcmd.d32, 0, 0, NULL);
+
+	sfcmd.d32 = 0;
+	sfcmd.b.cmd = CMD_RESET_DEVICE;
+	ret = sfc_request(sfcmd.d32, 0, 0, NULL);
+	/* tRST=30us , delay 1ms here */
+	mdelay(1);
+	return ret;
+}
+
 static int snor_enter_4byte_mode(void)
 {
 	int ret;
@@ -150,7 +150,7 @@ static int snor_wait_busy(int timeout)
 
 		sfc_delay(1);
 	}
-	PRINT_SFC_E("%s  error %x\n", __func__, timeout);
+	rkflash_print_error("%s  error %x\n", __func__, timeout);
 
 	return SFC_BUSY_TIMEOUT;
 }
@@ -234,9 +234,9 @@ static int snor_write_status(u32 reg_index, u8 status)
 	return ret;
 }
 
-static int snor_erase(struct SFNOR_DEV *p_dev,
-		      u32 addr,
-		      enum NOR_ERASE_TYPE erase_type)
+int snor_erase(struct SFNOR_DEV *p_dev,
+	       u32 addr,
+	       enum NOR_ERASE_TYPE erase_type)
 {
 	int ret;
 	union SFCCMD_DATA sfcmd;
@@ -268,10 +268,10 @@ static int snor_erase(struct SFNOR_DEV *p_dev,
 	return ret;
 }
 
-static int snor_prog_page(struct SFNOR_DEV *p_dev,
-			  u32 addr,
-			  void *p_data,
-			  u32 size)
+int snor_prog_page(struct SFNOR_DEV *p_dev,
+		   u32 addr,
+		   void *p_data,
+		   u32 size)
 {
 	int ret;
 	union SFCCMD_DATA sfcmd;
@@ -336,7 +336,9 @@ static int snor_enable_QE(struct SFNOR_DEV *p_dev)
 	    p_dev->manufacturer == MID_XTX ||
 	    p_dev->manufacturer == MID_MACRONIX ||
 	    p_dev->manufacturer == MID_PUYA ||
-	    p_dev->manufacturer == MID_XMC) {
+	    p_dev->manufacturer == MID_XMC ||
+	    p_dev->manufacturer == MID_DOSILICON ||
+	    p_dev->manufacturer == MID_ZBIT) {
 		reg_index = p_dev->QE_bits >> 3;
 		bit_offset = p_dev->QE_bits & 0x7;
 		ret = snor_read_status(reg_index, &status);
@@ -353,45 +355,41 @@ static int snor_enable_QE(struct SFNOR_DEV *p_dev)
 	return ret;
 }
 
-#if (SNOR_4BIT_DATA_DETECT_EN)
-static int snor_set_dlines(struct SFNOR_DEV *p_dev, enum SFC_DATA_LINES lines)
+int snor_disable_QE(struct SFNOR_DEV *p_dev)
 {
-	int ret;
-	u8 read_cmd[] = {CMD_FAST_READ_X1, CMD_FAST_READ_X2, CMD_FAST_READ_X4};
+	int ret = SFC_OK;
+	int reg_index;
+	int bit_offset;
+	u8 status;
 
-	if (lines == DATA_LINES_X4) {
-		ret = snor_enable_QE(p_dev);
+	if (p_dev->manufacturer == MID_GIGADEV ||
+	    p_dev->manufacturer == MID_WINBOND ||
+	    p_dev->manufacturer == MID_XTX ||
+	    p_dev->manufacturer == MID_MACRONIX ||
+	    p_dev->manufacturer == MID_PUYA ||
+	    p_dev->manufacturer == MID_XMC ||
+	    p_dev->manufacturer == MID_DOSILICON ||
+	    p_dev->manufacturer == MID_ZBIT) {
+		reg_index = p_dev->QE_bits >> 3;
+		bit_offset = p_dev->QE_bits & 0x7;
+		ret = snor_read_status(reg_index, &status);
 		if (ret != SFC_OK)
 			return ret;
-	}
 
-	p_dev->read_lines = lines;
-	p_dev->read_cmd = read_cmd[lines];
+		if (!(status & (1 << bit_offset)))
+			return SFC_OK;
 
-	if (p_dev->manufacturer == MID_GIGADEV ||
-	    p_dev->manufacturer == MID_WINBOND ||
-	    p_dev->manufacturer == MID_MACRONIX) {
-		p_dev->prog_lines = (lines != DATA_LINES_X2) ?
-				     lines : DATA_LINES_X1;
-		if (lines == DATA_LINES_X1) {
-			p_dev->prog_cmd = CMD_PAGE_PROG;
-		} else {
-			if (p_dev->manufacturer == MID_GIGADEV ||
-			    p_dev->manufacturer == MID_WINBOND)
-				p_dev->prog_cmd = CMD_PAGE_PROG_X4;
-			else
-				p_dev->prog_cmd = CMD_PAGE_PROG_A4;
-		}
+		status &= ~(1 << bit_offset);
+		return p_dev->write_status(reg_index, status);
 	}
 
-	return SFC_OK;
+	return ret;
 }
-#endif
 
-static int snor_read_data(struct SFNOR_DEV *p_dev,
-			  u32 addr,
-			  void *p_data,
-			  u32 size)
+int snor_read_data(struct SFNOR_DEV *p_dev,
+		   u32 addr,
+		   void *p_data,
+		   u32 size)
 {
 	int ret;
 	union SFCCMD_DATA sfcmd;
@@ -436,15 +434,14 @@ int snor_read(struct SFNOR_DEV *p_dev, u32 sec, u32 n_sec, void *p_data)
 	if ((sec + n_sec) > p_dev->capacity)
 		return SFC_PARAM_ERR;
 
-	mutex_lock(&p_dev->lock);
 	addr = sec << 9;
 	size = n_sec << 9;
 	while (size) {
 		len = size < SFC_MAX_IOSIZE ? size : SFC_MAX_IOSIZE;
 		ret = snor_read_data(p_dev, addr, p_buf, len);
 		if (ret != SFC_OK) {
-			PRINT_SFC_E("snor_read_data %x ret= %x\n",
-				    addr >> 9, ret);
+			rkflash_print_error("snor_read_data %x ret= %x\n",
+					    addr >> 9, ret);
 			goto out;
 		}
 
@@ -453,14 +450,13 @@ int snor_read(struct SFNOR_DEV *p_dev, u32 sec, u32 n_sec, void *p_data)
 		p_buf += len;
 	}
 out:
-	mutex_unlock(&p_dev->lock);
 	if (!ret)
 		ret = n_sec;
 
 	return ret;
 }
 
-int snor_write(struct SFNOR_DEV *p_dev, u32 sec, u32 n_sec, const void *p_data)
+int snor_write(struct SFNOR_DEV *p_dev, u32 sec, u32 n_sec, void *p_data)
 {
 	int ret = SFC_OK;
 	u32 len, blk_size, offset;
@@ -470,7 +466,6 @@ int snor_write(struct SFNOR_DEV *p_dev, u32 sec, u32 n_sec, const void *p_data)
 	if ((sec + n_sec) > p_dev->capacity)
 		return SFC_PARAM_ERR;
 
-	mutex_lock(&p_dev->lock);
 	while (n_sec) {
 		if (sec < 512 || sec >= p_dev->capacity  - 512)
 			blk_size = 8;
@@ -482,8 +477,8 @@ int snor_write(struct SFNOR_DEV *p_dev, u32 sec, u32 n_sec, const void *p_data)
 			ret = snor_erase(p_dev, sec << 9, (blk_size == 8) ?
 				ERASE_SECTOR : ERASE_BLOCK64K);
 			if (ret != SFC_OK) {
-				PRINT_SFC_E("snor_erase %x ret= %x\n",
-					    sec, ret);
+				rkflash_print_error("snor_erase %x ret= %x\n",
+						    sec, ret);
 				goto out;
 			}
 		}
@@ -491,7 +486,7 @@ int snor_write(struct SFNOR_DEV *p_dev, u32 sec, u32 n_sec, const void *p_data)
 		      (blk_size - offset) : n_sec;
 		ret = snor_prog(p_dev, sec << 9, p_buf, len << 9);
 		if (ret != SFC_OK) {
-			PRINT_SFC_E("snor_prog %x ret= %x\n", sec, ret);
+			rkflash_print_error("snor_prog %x ret= %x\n", sec, ret);
 			goto out;
 		}
 		n_sec -= len;
@@ -499,14 +494,13 @@ int snor_write(struct SFNOR_DEV *p_dev, u32 sec, u32 n_sec, const void *p_data)
 		p_buf += len << 9;
 	}
 out:
-	mutex_unlock(&p_dev->lock);
 	if (!ret)
 		ret = total_sec;
 
 	return ret;
 }
 
-static int snor_read_id(u8 *data)
+int snor_read_id(u8 *data)
 {
 	int ret;
 	union SFCCMD_DATA     sfcmd;
@@ -541,17 +535,6 @@ u32 snor_get_capacity(struct SFNOR_DEV *p_dev)
 	return p_dev->capacity;
 }
 
-static void snor_print_spi_chip_info(struct SFNOR_DEV *p_dev)
-{
-	PRINT_SFC_I("addr_mode: %x\n", p_dev->addr_mode);
-	PRINT_SFC_I("read_lines: %x\n", p_dev->read_lines);
-	PRINT_SFC_I("prog_lines: %x\n", p_dev->prog_lines);
-	PRINT_SFC_I("read_cmd: %x\n", p_dev->read_cmd);
-	PRINT_SFC_I("prog_cmd: %x\n", p_dev->prog_cmd);
-	PRINT_SFC_I("blk_erase_cmd: %x\n", p_dev->blk_erase_cmd);
-	PRINT_SFC_I("sec_erase_cmd: %x\n", p_dev->sec_erase_cmd);
-}
-
 static struct flash_info *snor_get_flash_info(u8 *flash_id)
 {
 	u32 i;
@@ -583,23 +566,23 @@ static void *snor_flash_info_adjust(struct flash_info *spi_flash_info)
 
 int snor_init(struct SFNOR_DEV *p_dev)
 {
+	struct flash_info *g_spi_flash_info;
 	u32 i;
 	u8 id_byte[5];
-	int err;
+
+	if (!p_dev)
+		return SFC_PARAM_ERR;
 
 	memset(p_dev, 0, sizeof(struct SFNOR_DEV));
 	snor_read_id(id_byte);
-	PRINT_SFC_E("sfc nor id: %x %x %x\n",
-		    id_byte[0], id_byte[1], id_byte[2]);
-	if (0xFF == id_byte[0] || 0x00 == id_byte[0]) {
-		err = SFC_ERROR;
-		goto err_out;
-	}
+	rkflash_print_error("sfc nor id: %x %x %x\n",
+			    id_byte[0], id_byte[1], id_byte[2]);
+	if (0xFF == id_byte[0] || 0x00 == id_byte[0])
+		return SFC_ERROR;
 
 	p_dev->manufacturer = id_byte[0];
 	p_dev->mem_type = id_byte[1];
 
-	mutex_init(&p_dev->lock);
 	g_spi_flash_info = snor_get_flash_info(id_byte);
 	if (g_spi_flash_info) {
 		snor_flash_info_adjust(g_spi_flash_info);
@@ -613,6 +596,7 @@ int snor_init(struct SFNOR_DEV *p_dev)
 		p_dev->prog_lines = DATA_LINES_X1;
 		p_dev->read_lines = DATA_LINES_X1;
 		p_dev->QE_bits = g_spi_flash_info->QE_bits;
+		p_dev->addr_mode = ADDR_MODE_3BYTE;
 
 		i = g_spi_flash_info->feature & FEA_READ_STATUE_MASK;
 		if (i == 0)
@@ -638,40 +622,28 @@ int snor_init(struct SFNOR_DEV *p_dev)
 
 		if ((g_spi_flash_info->feature & FEA_4BYTE_ADDR_MODE))
 			snor_enter_4byte_mode();
-
-		goto normal_out;
-	}
-
-	for (i = 0; i < sizeof(sfnor_dev_code); i++) {
-		if (id_byte[2] == sfnor_dev_code[i]) {
-			p_dev->capacity = sfnor_capacity[i] >> 9;
-			break;
-		}
-	}
-
-	if (i >= sizeof(sfnor_dev_code)) {
-		err = SFC_ERROR;
-		goto err_out;
+	} else {
+		p_dev->capacity = 1 << id_byte[2] >> 3;
+		p_dev->QE_bits = 0;
+		p_dev->blk_size = NOR_SECS_BLK;
+		p_dev->page_size = NOR_SECS_PAGE;
+		p_dev->read_cmd = CMD_READ_DATA;
+		p_dev->prog_cmd = CMD_PAGE_PROG;
+		p_dev->sec_erase_cmd = CMD_SECTOR_ERASE;
+		p_dev->blk_erase_cmd = CMD_BLOCK_ERASE;
+		p_dev->prog_lines = DATA_LINES_X1;
+		p_dev->read_lines = DATA_LINES_X1;
+		p_dev->write_status = snor_write_status;
 	}
 
-	p_dev->QE_bits = 9;
-	p_dev->blk_size = NOR_SECS_BLK;
-	p_dev->page_size = NOR_SECS_PAGE;
-	p_dev->read_cmd = CMD_READ_DATA;
-	p_dev->prog_cmd = CMD_PAGE_PROG;
-	p_dev->sec_erase_cmd = CMD_SECTOR_ERASE;
-	p_dev->blk_erase_cmd = CMD_BLOCK_ERASE;
-	p_dev->write_status = snor_write_status2;
-	#if (SNOR_4BIT_DATA_DETECT_EN)
-	snor_set_dlines(p_dev, DATA_LINES_X4);
-	#endif
-
-normal_out:
-	snor_print_spi_chip_info(p_dev);
+	rkflash_print_info("addr_mode: %x\n", p_dev->addr_mode);
+	rkflash_print_info("read_lines: %x\n", p_dev->read_lines);
+	rkflash_print_info("prog_lines: %x\n", p_dev->prog_lines);
+	rkflash_print_info("read_cmd: %x\n", p_dev->read_cmd);
+	rkflash_print_info("prog_cmd: %x\n", p_dev->prog_cmd);
+	rkflash_print_info("blk_erase_cmd: %x\n", p_dev->blk_erase_cmd);
+	rkflash_print_info("sec_erase_cmd: %x\n", p_dev->sec_erase_cmd);
 
 	return SFC_OK;
-
-err_out:
-	return err;
 }
 
diff --git a/drivers/rkflash/sfc_nor.h b/drivers/rkflash/sfc_nor.h
index 5b4c1233bb..adeb6f36ca 100644
--- a/drivers/rkflash/sfc_nor.h
+++ b/drivers/rkflash/sfc_nor.h
@@ -4,14 +4,11 @@
  * SPDX-License-Identifier:	GPL-2.0
  */
 
-#ifndef _SFNOR_H
-#define _SFNOR_H
+#ifndef _SFC_NOR_H
+#define _SFC_NOR_H
 
 #include "sfc.h"
 
-/* Four line data transmission detection */
-#define SNOR_4BIT_DATA_DETECT_EN	0
-
 #define NOR_PAGE_SIZE		256
 #define NOR_BLOCK_SIZE		(64 * 1024)
 #define NOR_SECS_BLK		(NOR_BLOCK_SIZE / 512)
@@ -25,18 +22,6 @@
 #define FEA_4BYTE_ADDR		BIT(4)
 #define FEA_4BYTE_ADDR_MODE	BIT(5)
 
-/*Manufactory ID*/
-#define MID_WINBOND             0xEF
-#define MID_GIGADEV             0xC8
-#define MID_MICRON              0x2C
-#define MID_MACRONIX            0xC2
-#define MID_SPANSION            0x01
-#define MID_EON                 0x1C
-#define MID_ST                  0x20
-#define MID_XTX                 0x0B
-#define MID_PUYA                0x85
-#define MID_XMC                 0x20
-
 /*Command Set*/
 #define CMD_READ_JEDECID        (0x9F)
 #define CMD_READ_DATA           (0x03)
@@ -127,7 +112,6 @@ struct SFNOR_DEV {
 	enum SFC_DATA_LINES prog_lines;
 
 	SNOR_WRITE_STATUS write_status;
-	struct mutex	lock; /* to lock this object */
 };
 
 struct flash_info {
@@ -152,6 +136,14 @@ struct flash_info {
 int snor_init(struct SFNOR_DEV *p_dev);
 u32 snor_get_capacity(struct SFNOR_DEV *p_dev);
 int snor_read(struct SFNOR_DEV *p_dev, u32 sec, u32 n_sec, void *p_data);
-int snor_write(struct SFNOR_DEV *p_dev, u32 sec, u32 n_sec, const void *p_data);
+int snor_write(struct SFNOR_DEV *p_dev, u32 sec, u32 n_sec, void *p_data);
+int snor_erase(struct SFNOR_DEV *p_dev,
+	       u32 addr,
+	       enum NOR_ERASE_TYPE erase_type);
+int snor_read_id(u8 *data);
+int snor_prog_page(struct SFNOR_DEV *p_dev, u32 addr, void *p_data, u32 size);
+int snor_read_data(struct SFNOR_DEV *p_dev, u32 addr, void *p_data, u32 size);
+int snor_reset_device(void);
+int snor_disable_QE(struct SFNOR_DEV *p_dev);
 
 #endif

commit d935323b7d09176371d60a0f8ed711d9a4dbb0fc
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Oct 24 10:40:51 2019 +0800

    common: board_info: print "AArch32" cpu mode
    
    Change-Id: I7384f1fd1e8cad69464a3b218d7570e044905daa
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/board_info.c b/common/board_info.c
index 16cf966233..b48fd1ebc0 100644
--- a/common/board_info.c
+++ b/common/board_info.c
@@ -27,5 +27,10 @@ int __weak show_board_info(void)
 		printf("Model: %s\n", model);
 #endif
 
+#ifdef CONFIG_ARM64_BOOT_AARCH32
+	if (!(gd->flags & GD_FLG_RELOC))
+		printf("CPU: AArch32\n");
+#endif
+
 	return checkboard();
 }

commit 74ab8aa2e78ea08c1672678ea0819929d1e3910f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Oct 24 10:04:51 2019 +0800

    arm: lib: interrupt/stacktrace: remove unhelpful message
    
    Update message dump format.
    
    Change-Id: Ieea57283ba21d91ba5172a339450a7aaefa0d1b5
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/lib/interrupts.c b/arch/arm/lib/interrupts.c
index b178554fc5..ac47db1ac0 100644
--- a/arch/arm/lib/interrupts.c
+++ b/arch/arm/lib/interrupts.c
@@ -99,7 +99,13 @@ void show_regs (struct pt_regs *regs)
 		processor_modes[processor_mode (regs)],
 		thumb_mode (regs) ? " (T)" : "");
 
-	iomem_show("sp", regs->ARM_sp, 0x00, 0xfc);
+#ifdef CONFIG_ROCKCHIP_CRASH_DUMP
+	iomem_show_by_compatible("-cru", 0, 0x400);
+	iomem_show_by_compatible("-pmucru", 0, 0x400);
+	iomem_show_by_compatible("-grf", 0, 0x400);
+	iomem_show_by_compatible("-pmugrf", 0, 0x400);
+#endif
+
 	dump_core_stack(regs);
 }
 
diff --git a/arch/arm/lib/interrupts_64.c b/arch/arm/lib/interrupts_64.c
index cb36d0364b..36d442048c 100644
--- a/arch/arm/lib/interrupts_64.c
+++ b/arch/arm/lib/interrupts_64.c
@@ -35,191 +35,75 @@ int disable_interrupts(void)
 
 void show_regs(struct pt_regs *regs)
 {
-	int i;
 	int el = current_el();
-	const char *h_scr_name[] = {
-		[2] = "HCR_EL2",
-		[3] = "SCR_EL3",
-	};
+	int i;
+
 	const char *esr_bits_ec[] = {
-		[0]  = "EC[31:26] == 000000, Exception with an unknown reason",
-		[1]  = "EC[31:26] == 000001, Exception from a WFI or WFE instruction",
-		[3]  = "EC[31:26] == 000011, Exception from an MCR or MRC access",
-		[4]  = "EC[31:26] == 000100, Exception from an MCRR or MRRC access",
-		[5]  = "EC[31:26] == 000101, Exception from an MCR or MRC access",
-		[6]  = "EC[31:26] == 000110, Exception from an LDC or STC access to CP14",
-		[7]  = "EC[31:26] == 000111, Exception from an access to an Advanced SIMD or floating-point register, resulting from CPACR_EL1.FPEN or CPTR_ELx.TFP",
-		[8]  = "EC[31:26] == 001000, Exception from an MCR or MRC access",
-		[12] = "EC[31:26] == 001100, Exception from an MCRR or MRRC access",
-		[14] = "EC[31:26] == 001110, Exception from an Illegal execution state, or a PC or SP alignment fault",
-		[10] = "EC[31:26] == 010001, Exception from HVC or SVC instruction execution",
-		[18] = "EC[31:26] == 010010, Exception from HVC or SVC instruction execution",
-		[19] = "EC[31:26] == 010011, Exception from SMC instruction execution in AArch32 state",
-		[21] = "EC[31:26] == 010101, Exception from HVC or SVC instruction execution",
-		[22] = "EC[31:26] == 010110, Exception from HVC or SVC instruction execution",
-		[23] = "EC[31:26] == 010111, Exception from SMC instruction execution in AArch64 state",
-		[24] = "EC[31:26] == 011000, Exception from MSR, MRS, or System instruction execution in AArch64 state",
-		[31] = "EC[31:26] == 011111, IMPLEMENTATION DEFINED exception to EL3",
-		[32] = "EC[31:26] == 100000, Exception from an Instruction abort",
-		[33] = "EC[31:26] == 100001, Exception from an Instruction abort",
-		[34] = "EC[31:26] == 100010, Exception from an Illegal execution state, or a PC or SP alignment fault",
-		[36] = "EC[31:26] == 100100, Exception from a Data abort, from lower exception level",
-		[37] = "EC[31:26] == 100101, Exception from a Data abort, from current exception level",
-		[38] = "EC[31:26] == 100110, Exception from an Illegal execution state, or a PC or SP alignment fault",
-		[40] = "EC[31:26] == 101000, Exception from a trapped Floating-point exception",
-		[44] = "EC[31:26] == 101100, Exception from a trapped Floating-point exception",
-		[47] = "EC[31:26] == 101111, SError interrupt",
-		[48] = "EC[31:26] == 110000, Exception from a Breakpoint or Vector Catch debug event",
-		[49] = "EC[31:26] == 110001, Exception from a Breakpoint or Vector Catch debug event",
-		[50] = "EC[31:26] == 110010, Exception from a Software Step debug event",
-		[51] = "EC[31:26] == 110011, Exception from a Software Step debug event",
-		[52] = "EC[31:26] == 110100, Exception from a Watchpoint debug event",
-		[53] = "EC[31:26] == 110101, Exception from a Watchpoint debug event",
-		[56] = "EC[31:26] == 111000, Exception from execution of a Software Breakpoint instructio",
-	};
-	const char *esr_bits_il[] = {
-		"IL[25] == 0, 16-bit instruction trapped",
-		"IL[25] == 1, 32-bit instruction trapped",
-	};
-	const char *daif_bits_f[] = {
-		"F[6] == 0, FIQ not masked",
-		"F[6] == 1, FIQ masked",
-	};
-	const char *daif_bits_i[] = {
-		"I[7] == 0, IRQ not masked",
-		"I[7] == 1, IRQ masked",
-	};
-	const char *daif_bits_a[] = {
-		"A[8] == 0, ABORT not masked",
-		"A[8] == 1, ABORT masked",
-	};
-	const char *daif_bits_d[] = {
-		"D[9] == 0, DBG not masked",
-		"D[9] == 1, DBG masked",
-	};
-	const char *spsr_bits_m_aarch32[] = {
-		[0]  = "M[3:0] == 0000, User",
-		[1]  = "M[3:0] == 0001, FIQ",
-		[2]  = "M[3:0] == 0010, IRQ",
-		[3]  = "M[3:0] == 0011, Supervisor",
-		[6]  = "M[3:0] == 0110, Monitor",
-		[7]  = "M[3:0] == 0111, Abort",
-		[10] = "M[3:0] == 1010, Hyp",
-		[11] = "M[3:0] == 1011, Undefined",
-		[15] = "M[3:0] == 1111, System",
-	};
-	const char *spsr_bits_m_aarch64[] = {
-		[0] = "M[3:0] == 0000, EL0t",
-		[4] = "M[3:0] == 0100, EL1t",
-		[5] = "M[3:0] == 0101, EL1h",
-		[8] = "M[3:0] == 1000, EL2t",
-		[9] = "M[3:0] == 1001, EL2h",
-		[10] = "M[3:0] == 1100, EL3t",
-		[11] = "M[3:0] == 1101, EL3h",
-	};
-	const char *spsr_bits_m[] = {
-		"M[4] == 0, Exception taken from AArch64",
-		"M[4] == 1, Exception taken from AArch32",
-	};
-	const char *spsr_bits_f[] = {
-		"F[6] == 0, FIQ not masked",
-		"F[6] == 1, FIQ masked",
-	};
-	const char *spsr_bits_i[] = {
-		"I[7] == 0, IRQ not masked",
-		"I[7] == 1, IRQ masked",
-	};
-	const char *spsr_bits_a[] = {
-		"A[8] == 0, ABORT not masked",
-		"A[8] == 1, ABORT masked",
-	};
-	const char *spsr_bits_d[] = {
-		"D[9] == 0, DBG not masked",
-		"D[9] == 1, DBG masked",
-	};
-	const char *sctlr_bits_i[] = {
-		"I[12] == 0, Icache disabled",
-		"I[12] == 1, Icaches enabled",
-	};
-	const char *sctlr_bits_c[] = {
-		"C[2] == 0, Dcache disabled",
-		"C[2] == 1, Dcache enabled",
-	};
-	const char *sctlr_bits_m[] = {
-		"M[0] == 0, MMU disabled",
-		"M[0] == 1, MMU enabled",
+		[0]  = "an unknown reason",
+		[1]  = "a WFI or WFE instruction",
+		[3]  = "an MCR or MRC access",
+		[4]  = "an MCRR or MRRC access",
+		[5]  = "an MCR or MRC access",
+		[6]  = "an LDC or STC access to CP14",
+		[7]  = "an access to an Advanced SIMD or floating-point register, resulting from CPACR_EL1.FPEN or CPTR_ELx.TFP",
+		[8]  = "an MCR or MRC access",
+		[12] = "an MCRR or MRRC access",
+		[14] = "an Illegal execution state, or a PC or SP alignment fault",
+		[10] = "HVC or SVC instruction execution",
+		[18] = "HVC or SVC instruction execution",
+		[19] = "SMC instruction execution in AArch32 state",
+		[21] = "HVC or SVC instruction execution",
+		[22] = "HVC or SVC instruction execution",
+		[23] = "SMC instruction execution in AArch64 state",
+		[24] = "MSR, MRS, or System instruction execution in AArch64 state",
+		[31] = "IMPLEMENTATION DEFINED exception to EL3",
+		[32] = "an Instruction abort",
+		[33] = "an Instruction abort",
+		[34] = "an Illegal execution state, or a PC or SP alignment fault",
+		[36] = "a Data abort, from lower exception level",
+		[37] = "a Data abort, from current exception level",
+		[38] = "an Illegal execution state, or a PC or SP alignment fault",
+		[40] = "a trapped Floating-point exception",
+		[44] = "a trapped Floating-point exception",
+		[47] = "SError interrupt",
+		[48] = "a Breakpoint or Vector Catch debug event",
+		[49] = "a Breakpoint or Vector Catch debug event",
+		[50] = "a Software Step debug event",
+		[51] = "a Software Step debug event",
+		[52] = "a Watchpoint debug event",
+		[53] = "a Watchpoint debug event",
+		[56] = "execution of a Software Breakpoint instructio",
 	};
 
-	printf("* Relocate offset = %016lx\n", gd->reloc_off);
+	printf("\n");
 
+	/* PC/LR/SP ... */
+	printf("* Reason:        Exception from %s\n", esr_bits_ec[REG_BITS(regs->esr, 26, 0x3f)]);
 	if (gd->flags & GD_FLG_RELOC) {
-		printf("* ELR(PC)    =   %016lx\n", regs->elr - gd->reloc_off);
+		printf("* PC         =   %016lx\n", regs->elr - gd->reloc_off);
 		printf("* LR         =   %016lx\n", regs->regs[30] - gd->reloc_off);
 	} else {
 		printf("* ELR(PC)    =   %016lx\n", regs->elr);
 		printf("* LR         =   %016lx\n", regs->regs[30]);
 	}
-
 	printf("* SP         =   %016lx\n", regs->sp);
-	printf("\n");
-
-	/*
-	 * System registers
-	 */
-	/* ESR_EL2 */
 	printf("* ESR_EL%d    =   %016lx\n", el, regs->esr);
-	printf("\t%s\n", esr_bits_ec[REG_BITS(regs->esr, 26, 0x3f)]);
-	printf("\t%s\n", esr_bits_il[REG_BITS(regs->esr, 25, 0x01)]);
-	printf("\n");
-	/* DAIF */
-	printf("* DAIF       =   %016lx\n", regs->daif);
-	printf("\t%s\n", daif_bits_d[REG_BITS(regs->daif, 9, 0x1)]);
-	printf("\t%s\n", daif_bits_a[REG_BITS(regs->daif, 8, 0x1)]);
-	printf("\t%s\n", daif_bits_i[REG_BITS(regs->daif, 7, 0x1)]);
-	printf("\t%s\n", daif_bits_f[REG_BITS(regs->daif, 6, 0x1)]);
-	printf("\n");
-	/* SPSR_ELx */
-	printf("* SPSR_EL%d   =	 %016lx\n", el, regs->spsr);
-	printf("\t%s\n", spsr_bits_d[REG_BITS(regs->spsr, 9, 0x1)]);
-	printf("\t%s\n", spsr_bits_a[REG_BITS(regs->spsr, 8, 0x1)]);
-	printf("\t%s\n", spsr_bits_i[REG_BITS(regs->spsr, 7, 0x1)]);
-	printf("\t%s\n", spsr_bits_f[REG_BITS(regs->spsr, 6, 0x1)]);
-	printf("\t%s\n", spsr_bits_m[REG_BITS(regs->spsr, 4, 0x1)]);
-	if (REG_BITS(regs->spsr, 4, 0x1))
-		printf("\t%s\n", spsr_bits_m_aarch32[REG_BITS(regs->spsr, 0, 0xf)]);
-	else
-		printf("\t%s\n", spsr_bits_m_aarch64[REG_BITS(regs->spsr, 0, 0xf)]);
-	printf("\n");
-	/* SCTLR_EL2 */
-	printf("* SCTLR_EL%d  =	 %016lx\n", el, regs->sctlr);
-	printf("\t%s\n", sctlr_bits_i[REG_BITS(regs->sctlr, 12, 0x1)]);
-	printf("\t%s\n", sctlr_bits_c[REG_BITS(regs->sctlr, 2, 0x1)]);
-	printf("\t%s\n", sctlr_bits_m[REG_BITS(regs->sctlr, 0, 0x1)]);
-	printf("\n");
-
-	/* Other */
-	if (el >= 2)
-		printf("* %s    =   %016lx\n", h_scr_name[el], regs->hcr);
-	printf("* VBAR_EL%d   =   %016lx\n", el, regs->vbar);
-	printf("* TTBR0_EL%d  =   %016lx\n", el, regs->ttbr0);
-	printf("\n");
+	printf("* Reloc Off  =   %016lx\n\n", gd->reloc_off);
 
+	/* CPU */
 	for (i = 0; i < 29; i += 2)
 		printf("x%-2d: %016lx x%-2d: %016lx\n",
 		       i, regs->regs[i], i+1, regs->regs[i+1]);
-
-	printf("\n");
-	iomem_show("SP", regs->sp, 0x00, 0xfc);
-
 	printf("\n");
 
+	/* SoC */
 #ifdef CONFIG_ROCKCHIP_CRASH_DUMP
 	iomem_show_by_compatible("-cru", 0, 0x400);
 	iomem_show_by_compatible("-pmucru", 0, 0x400);
 	iomem_show_by_compatible("-grf", 0, 0x400);
 	iomem_show_by_compatible("-pmugrf", 0, 0x400);
-	/* tobe add here ... */
 #endif
+	/* Call trace */
 	dump_core_stack(regs);
 }
 
diff --git a/arch/arm/lib/stacktrace.c b/arch/arm/lib/stacktrace.c
index 1520098219..37eb39f433 100644
--- a/arch/arm/lib/stacktrace.c
+++ b/arch/arm/lib/stacktrace.c
@@ -479,6 +479,13 @@ void print_stack_arm32(struct unwind_state_arm32 *state,
 		       ulong stack, size_t stack_size)
 {
 	ulong pc, lr;
+#if defined(CONFIG_TPL_BUILD)
+	char *build = "tpl";
+#elif defined(CONFIG_SPL_BUILD)
+	char *build = "spl";
+#else
+	char *build = "";
+#endif
 
 	if (gd->flags & GD_FLG_RELOC) {
 		pc = (ulong)state->registers[PC] - gd->reloc_off;
@@ -503,9 +510,9 @@ void print_stack_arm32(struct unwind_state_arm32 *state,
 	} while (unwind_stack_arm32(state, exidx, exidx_sz,
 				    kernel_stack, stack, stack_size));
 
-	printf("\nCopy above stack info to a file(eg. dump.txt), and\n"
-	       "execute command in your U-Boot project: "
-	       "./scripts/stacktrace.sh dump.txt\n\n");
+	printf("\nCopy info from \"Call trace...\" to a file(eg. dump.txt), and run\n"
+	       "command in your U-Boot project: "
+	       "./scripts/stacktrace.sh dump.txt %s\n\n", build);
 }
 
 void dump_core_stack(struct pt_regs *regs)
diff --git a/arch/arm/lib/stacktrace_64.c b/arch/arm/lib/stacktrace_64.c
index 5637926175..75201a70fa 100644
--- a/arch/arm/lib/stacktrace_64.c
+++ b/arch/arm/lib/stacktrace_64.c
@@ -63,6 +63,13 @@ void dump_core_stack(struct pt_regs *regs)
 {
 	struct stackframe frame;
 	ulong pc, lr;
+#if defined(CONFIG_TPL_BUILD)
+	char *build = "tpl";
+#elif defined(CONFIG_SPL_BUILD)
+	char *build = "spl";
+#else
+	char *build = "";
+#endif
 
 	frame.fp = regs->regs[29];
 	frame.sp = regs->sp;
@@ -90,9 +97,9 @@ void dump_core_stack(struct pt_regs *regs)
 		printf("	[< %08lx >]\n", pc);
 	} while (walk_stackframe(&frame));
 
-	printf("\nCopy above stack info to a file(eg. dump.txt), and\n"
-	       "execute command in your U-Boot project: "
-	       "./scripts/stacktrace.sh dump.txt\n\n");
+	printf("\nCopy info from \"Call trace...\" to a file(eg. dump.txt), and run\n"
+	       "command in your U-Boot project: "
+	       "./scripts/stacktrace.sh dump.txt %s\n\n", build);
 }
 
 void dump_stack(void)

commit 2a5ad8b35594dd5c93deec6fa1c1b022232e0193
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Oct 24 09:01:28 2019 +0800

    rockchip: board: treat 'u-boot,dm-spl' as 'u-boot,dm-pre-reloc'
    
    It works when CONFIG_USING_KERNEL_DTB is enabled, because we can
    set either 'u-boot,dm-spl' or 'u-boot,dm-pre-reloc' for the node
    that we can to leave in the u-boot.dtb.
    
    Change-Id: I682e3900b9bf479f998304737031525004538724
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 0a522cd891..523bcfc599 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -231,7 +231,8 @@ static int phandles_fixup(void *fdt)
 
 		list_for_each_entry(dev, &uc->dev_head, uclass_node) {
 			/* Only U-Boot node go further */
-			if (!dev_read_bool(dev, "u-boot,dm-pre-reloc"))
+			if (!dev_read_bool(dev, "u-boot,dm-pre-reloc") ||
+			    !dev_read_bool(dev, "u-boot,dm-spl"))
 				continue;
 
 			for (i = 0; i < ARRAY_SIZE(props); i++) {

commit 930ceb12e0667ea079f6dd6ecd4ca24d6a3257e6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Oct 24 08:59:55 2019 +0800

    driver: core/input: treat 'u-boot,dm-spl' as 'u-boot,dm-pre-reloc'
    
    It works when CONFIG_USING_KERNEL_DTB is enabled, because we can
    set either 'u-boot,dm-spl' or 'u-boot,dm-pre-reloc' for the node
    that we can to leave in the u-boot.dtb.
    
    Change-Id: Id3cec0c64ee55ca9bc1e5871e7ad5a2ebb4b1b6a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/core/device.c b/drivers/core/device.c
index 7b8f0e3e1c..dfce232b74 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -70,7 +70,8 @@ static int device_bind_common(struct udevice *parent, const struct driver *drv,
 
 		list_for_each_entry_safe(dev, n, &uc->dev_head, uclass_node) {
 			if (!strcmp(name, dev->name) &&
-			    dev_read_bool(dev, "u-boot,dm-pre-reloc")) {
+			    (dev_read_bool(dev, "u-boot,dm-pre-reloc") ||
+			     dev_read_bool(dev, "u-boot,dm-spl"))) {
 				if (drv->id == UCLASS_SERIAL || drv->id == UCLASS_CRYPTO) {
 					/* Always use serial node from U-Boot dtb */
 					debug("%s do not delete uboot dev: %s\n",
diff --git a/drivers/core/dump.c b/drivers/core/dump.c
index 89162641f2..2264e5f6af 100644
--- a/drivers/core/dump.c
+++ b/drivers/core/dump.c
@@ -35,7 +35,8 @@ static void show_devices(struct udevice *dev, int depth, int last_flag)
 	}
 
 	printf("%s %s\n", dev->name,
-	       dev_read_bool(dev, "u-boot,dm-pre-reloc") ? "*" : "");
+	       dev_read_bool(dev, "u-boot,dm-pre-reloc") ||
+	       dev_read_bool(dev, "u-boot,dm-spl") ? "*" : "");
 
 	list_for_each_entry(child, &dev->child_head, sibling_node) {
 		is_last = list_is_last(&child->sibling_node, &dev->child_head);
diff --git a/drivers/core/root.c b/drivers/core/root.c
index d6dfeea263..07db4e396b 100644
--- a/drivers/core/root.c
+++ b/drivers/core/root.c
@@ -224,7 +224,12 @@ static int dm_scan_fdt_live(struct udevice *parent,
 
 	for (np = node_parent->child; np; np = np->sibling) {
 		if (pre_reloc_only &&
-		    !of_find_property(np, "u-boot,dm-pre-reloc", NULL))
+#ifdef CONFIG_USING_KERNEL_DTB
+		    (!of_find_property(np, "u-boot,dm-pre-reloc", NULL) ||
+		     !of_find_property(np, "u-boot,dm-spl", NULL)))
+#else
+		     !of_find_property(np, "u-boot,dm-pre-reloc", NULL))
+#endif
 			continue;
 		if (!of_device_is_available(np)) {
 			pr_debug("   - ignoring disabled device\n");
diff --git a/drivers/input/key-uclass.c b/drivers/input/key-uclass.c
index 46bcb30a34..7a06559ab4 100644
--- a/drivers/input/key-uclass.c
+++ b/drivers/input/key-uclass.c
@@ -263,7 +263,8 @@ static int key_post_probe(struct udevice *dev)
 		return -ENXIO;
 
 	/* True from U-Boot key node */
-	uc_key->pre_reloc = dev_read_bool(dev, "u-boot,dm-pre-reloc");
+	uc_key->pre_reloc = dev_read_bool(dev, "u-boot,dm-pre-reloc") ||
+			    dev_read_bool(dev, "u-boot,dm-spl");
 
 	if (uc_key->type == ADC_KEY) {
 		uc_key->max = uc_key->adcval + margin;

commit f988e29580da4efb55aa86382e9f5b128b1ee145
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 10 11:43:20 2019 +0800

    cmd: nvedit: add "env update ..." sub command
    
    It supports to add/append/replace variable(s).
    
    Change-Id: I1219e67e3dc778a634689516503e311d0577f35d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/cmd/nvedit.c b/cmd/nvedit.c
index f5e704e178..8efb064a74 100644
--- a/cmd/nvedit.c
+++ b/cmd/nvedit.c
@@ -1158,6 +1158,15 @@ static int do_env_delete(cmd_tbl_t *cmdtp, int flag,
 	return ret;
 }
 
+static int do_env_update(cmd_tbl_t *cmdtp, int flag,
+			 int argc, char *const argv[])
+{
+	if (argc != 3)
+		return CMD_RET_USAGE;
+
+	return env_update(argv[1], argv[2]);
+}
+
 #ifdef CONFIG_CMD_EXPORTENV
 /*
  * env export [-t | -b | -c] [-s size] addr [var ...]
@@ -1463,6 +1472,7 @@ static cmd_tbl_t cmd_env_sub[] = {
 #endif
 	U_BOOT_CMD_MKENT(default, 1, 0, do_env_default, "", ""),
 	U_BOOT_CMD_MKENT(delete, CONFIG_SYS_MAXARGS, 0, do_env_delete, "", ""),
+	U_BOOT_CMD_MKENT(update, 3, 0, do_env_update, "", ""),
 #if defined(CONFIG_CMD_EDITENV)
 	U_BOOT_CMD_MKENT(edit, 2, 0, do_env_edit, "", ""),
 #endif
@@ -1531,6 +1541,7 @@ static char env_help_text[] =
 	"default [-f] -a - [forcibly] reset default environment\n"
 	"env default [-f] var [...] - [forcibly] reset variable(s) to their default values\n"
 	"env delete [-f] var [...] - [forcibly] delete variable(s)\n"
+	"env update [name] [value] - add/append/replace variable(s)\n"
 #if defined(CONFIG_CMD_EDITENV)
 	"env edit name - edit environment variable\n"
 #endif

commit 871b668671f2f347710f4ef2a8bfbaa50428a654
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 22 18:11:38 2019 +0800

    pmic: rk8xx: default disable virq chip by new interface
    
    The irq framework takes over the enable/disable management
    for virq chip.
    
    Change-Id: I63202b22b121b4a889d5a408a6a5a8f50a3c24d8
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index 96ce4809df..870309dff4 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -373,7 +373,7 @@ static int rk8xx_irq_chip_init(struct udevice *dev)
 	}
 
 	if (irq_chip) {
-		ret = virq_add_chip(dev, irq_chip, priv->irq, 1);
+		ret = virq_add_chip(dev, irq_chip, priv->irq);
 		if (ret) {
 			printf("Failed to add irqchip(irq=%d), ret=%d\n",
 			       priv->irq, ret);

commit 25c13168fe0e525e44f79fab23cb8266c4299140
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 22 18:09:11 2019 +0800

    irq: virq: add parent irq enable/disable management
    
    - disable virq chip by default;
    - fix bank->use_count little than 0;
    
    Change-Id: I69aa07cc2924dab40eea6524588869361ad8cf66
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/irq/irq-generic.c b/drivers/irq/irq-generic.c
index f5cdd09115..c2b2acabda 100644
--- a/drivers/irq/irq-generic.c
+++ b/drivers/irq/irq-generic.c
@@ -414,7 +414,7 @@ static int do_dump_irqs(cmd_tbl_t *cmdtp, int flag,
 	char *drv_name;
 	int pirq;
 
-	printf(" IRQ    En    Handler       Driver         Name              Count\n");
+	printf(" IRQ    En    Handler       Driver         Name              Trig\n");
 	printf("----------------------------------------------------------------------\n");
 
 	for (pirq = 0; pirq < PLATFORM_MAX_IRQ; pirq++) {
diff --git a/drivers/irq/irq-gpio.c b/drivers/irq/irq-gpio.c
index 0fbb40752b..a128e02e54 100644
--- a/drivers/irq/irq-gpio.c
+++ b/drivers/irq/irq-gpio.c
@@ -290,6 +290,9 @@ static int gpio_irq_disable(int irq)
 	if (!bank)
 		return -EINVAL;
 
+	if (bank->use_count <= 0)
+		return 0;
+
 	gpio &= GPIO_PIN_MASK;
 	if (gpio >= bank->ngpio)
 		return -EINVAL;
diff --git a/drivers/irq/virq.c b/drivers/irq/virq.c
index 9e8bb348d8..02475732ff 100644
--- a/drivers/irq/virq.c
+++ b/drivers/irq/virq.c
@@ -38,6 +38,7 @@ struct virq_desc {
 	struct virq_data *virqs;	/* child irq data list */
 	struct udevice *parent;		/* parent device */
 	int pirq;			/* parent irq */
+	int use_count;			/* enable count */
 	int irq_base;			/* child irq base */
 	int irq_end;			/* child irq end */
 	uint reg_stride;
@@ -238,12 +239,12 @@ void virq_chip_generic_handler(int pirq, void *pdata)
 	}
 }
 
-int virq_add_chip(struct udevice *dev, struct virq_chip *chip,
-		  int irq, int enable)
+int virq_add_chip(struct udevice *dev, struct virq_chip *chip, int irq)
 {
 	struct virq_data *vdata;
 	struct virq_desc *desc;
 	uint *status_buf;
+	uint status_reg;
 	uint mask_reg;
 	int ret;
 	int i;
@@ -274,6 +275,7 @@ int virq_add_chip(struct udevice *dev, struct virq_chip *chip,
 	desc->pirq = irq;
 	desc->chip = chip;
 	desc->virqs = vdata;
+	desc->use_count = 0;
 	desc->irq_base = vdata[0].irq;
 	desc->irq_end = vdata[chip->num_irqs - 1].irq;
 	desc->status_buf = status_buf;
@@ -292,10 +294,19 @@ int virq_add_chip(struct udevice *dev, struct virq_chip *chip,
 			       __func__, mask_reg, ret);
 	}
 
+	/* Clear all status */
+	for (i = 0; i < chip->num_regs; i++) {
+		status_reg = reg_base_get(desc, chip->status_base, i);
+		ret = chip->i2c_write(dev, status_reg, ~0U);
+		if (ret)
+			printf("%s: Clear status register 0x%x failed, ret=%d\n",
+			       __func__, status_reg, ret);
+	}
+
 	/* Add parent irq into interrupt framework with generic virq handler */
 	irq_install_handler(irq, virq_chip_generic_handler, dev);
 
-	return enable ? irq_handler_enable(irq) : irq_handler_disable(irq);
+	return irq_handler_disable(irq);
 
 free1:
 	free(desc);
@@ -358,18 +369,41 @@ static int __virq_enable(int irq, int enable)
 
 static int virq_enable(int irq)
 {
+	struct virq_desc *desc = find_virq_desc(irq);
+	int ret;
+
 	if (bad_virq(irq))
 		return -EINVAL;
 
-	return __virq_enable(irq, 1);
+	ret = __virq_enable(irq, 1);
+	if (!ret) {
+		if (desc->use_count == 0)
+			irq_handler_enable(desc->pirq);
+		desc->use_count++;
+	}
+
+	return ret;
 }
 
 static int virq_disable(int irq)
 {
+	struct virq_desc *desc = find_virq_desc(irq);
+	int ret;
+
 	if (bad_virq(irq))
 		return -EINVAL;
 
-	return __virq_enable(irq, 0);
+	ret = __virq_enable(irq, 0);
+	if (!ret) {
+		if (desc->use_count <= 0)
+			return ret;
+
+		if (desc->use_count == 1)
+			irq_handler_disable(desc->pirq);
+		desc->use_count--;
+	}
+
+	return ret;
 }
 
 struct irq_chip virq_generic_chip = {
diff --git a/include/irq-generic.h b/include/irq-generic.h
index c543c4aed3..9f3410a038 100644
--- a/include/irq-generic.h
+++ b/include/irq-generic.h
@@ -120,7 +120,6 @@ int phandle_gpio_to_irq(u32 gpio_phandle, u32 pin);
 
 /* Virtual irq */
 int virq_to_irq(struct virq_chip *chip, int virq);
-int virq_add_chip(struct udevice *dev, struct virq_chip *chip,
-		  int irq, int enable);
+int virq_add_chip(struct udevice *dev, struct virq_chip *chip, int irq);
 
 #endif /* _IRQ_GENERIC_H */

commit e6c4e3fbd5d0c84c50276be074561d2774021642
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 21 09:02:59 2019 +0800

    disk: efi: ignore error message when signature is 0
    
    Since the patch "3bdef7e gpt: return 1 directly when test the mbr sector"
    always treats partition type as GPT, the error message is always printed
    which may make developers miss understand.
    
    Change-Id: I8be6cf5027ff4b61549b83132492d41d2b352ecd
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/disk/part_efi.c b/disk/part_efi.c
index dfbef58555..b7b0349f2c 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -80,10 +80,11 @@ static int validate_gpt_header(gpt_header *gpt_h, lbaint_t lba,
 
 	/* Check the GPT header signature */
 	if (le64_to_cpu(gpt_h->signature) != GPT_HEADER_SIGNATURE) {
-		printf("%s signature is wrong: 0x%llX != 0x%llX\n",
-		       "GUID Partition Table Header",
-		       le64_to_cpu(gpt_h->signature),
-		       GPT_HEADER_SIGNATURE);
+		if (le64_to_cpu(gpt_h->signature) != 0)
+			printf("%s signature is wrong: 0x%llX != 0x%llX\n",
+			       "GUID Partition Table Header",
+			       le64_to_cpu(gpt_h->signature),
+			       GPT_HEADER_SIGNATURE);
 		return -1;
 	}
 

commit 3cc97df118778140b922ade1e319ac30a4d471f6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 21 16:02:38 2019 +0800

    scripts: add unpack_resource.sh
    
    Change-Id: Ie4422bfc36fb7a4c40adfbe1104d04fbd0d7d22a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/scripts/unpack_resource.sh b/scripts/unpack_resource.sh
new file mode 100755
index 0000000000..14fe4b26cc
--- /dev/null
+++ b/scripts/unpack_resource.sh
@@ -0,0 +1,58 @@
+#!/bin/sh
+#
+# Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier: GPL-2.0
+#
+
+
+IMAGE_FILE=$1
+OUTPUT_DIR=$2
+PACK_TOOL=../rkbin/tools/resource_tool
+
+usage()
+{
+	echo "Usage:"
+	echo "  $0 <resource.img> <output dir> "
+}
+
+prepare()
+{
+	echo
+	if [ "$IMAGE_FILE" = '--help' -o "$IMAGE_FILE" = '-h' -o "$IMAGE_FILE" = '--h' ]; then
+		usage
+		exit 0
+	elif [ ! -f "$PACK_TOOL" ];then
+		echo "Can't find '../rkbin/' Responsity, please download it before pack image!"
+		echo "How to obtain? 3 ways:"
+		echo "	1. Login your Rockchip gerrit account: \"Projects\" -> \"List\" -> search \"rk/rkbin\" Responsity"
+		echo "	2. Github Responsity: https://github.com/rockchip-linux/rkbin"
+		echo "	3. Download full release SDK Responsity"
+		exit 1
+	elif [ -z "$IMAGE_FILE" ];then
+		usage
+		exit 1
+	elif [ ! -f "$IMAGE_FILE" ];then
+		echo "Can't find file: $IMAGE_FILE"
+		usage
+		exit 1
+	elif [ -z "$OUTPUT_DIR" ];then
+		echo "Missing: <output dir>"
+		usage
+		exit 1
+	fi
+}
+
+append_resource()
+{
+	if [ ! -d $OUTPUT_DIR ]; then
+		mkdir $OUTPUT_DIR
+	fi
+	echo "Unpack $IMAGE_FILE to $OUTPUT_DIR"
+	$PACK_TOOL --unpack --verbose --image=$IMAGE_FILE $OUTPUT_DIR 2>&1|grep entry|sed "s/^.*://"|xargs echo
+	echo
+	echo "resource.img is unpacked successfully"
+}
+
+prepare
+append_resource

commit 86574b32ce8d8b6667860a21c164747fadc76baa
Author: Tony Xu <tony.xu@rock-chips.com>
Date:   Tue Oct 8 10:50:26 2019 +0800

    common: write_keybox: support write keybox by RKDevInfoWriteTool
    
    Change-Id: I853663623f4550469b676239c44586e5efb6b21f
    Signed-off-by: Tony Xu <tony.xu@rock-chips.com>

diff --git a/common/write_keybox.c b/common/write_keybox.c
index 1abf587654..061dc5e2a8 100644
--- a/common/write_keybox.c
+++ b/common/write_keybox.c
@@ -15,7 +15,6 @@
 
 #define STORAGE_CMD_WRITE	6
 #define	SIZE_OF_TAG		4
-#define	SIZE_OF_USB_CMD	8
 #define	BOOT_FROM_EMMC	(1 << 1)
 #define	WIDEVINE_TAG	"KBOX"
 #define	ATTESTATION_TAG	"ATTE"
@@ -125,6 +124,9 @@ uint32_t rk_send_keybox_to_ta(uint8_t *filename, uint32_t filename_size,
 
 uint32_t write_keybox_to_secure_storage(uint8_t *received_data, uint32_t len)
 {
+	uint8_t *widevine_data;
+	uint8_t *attestation_data;
+	uint8_t *playready_sl30_data;
 	uint32_t key_size;
 	uint32_t data_size;
 	int rc = 0;
@@ -141,27 +143,37 @@ uint32_t write_keybox_to_secure_storage(uint8_t *received_data, uint32_t len)
 #ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
 	is_use_rpmb = 0;
 #endif
+	if (is_use_rpmb)
+		printf("I will write key to rpmb\n");
+	else
+		printf("I will write key to security partition");
 	rc = write_to_keymaster((uint8_t *)"security_partition",
 				sizeof("security_partition"),
 				&is_use_rpmb, sizeof(is_use_rpmb));
 	if (rc)
 		return -EIO;
 
-	if (memcmp(received_data, WIDEVINE_TAG, SIZE_OF_TAG) == 0) {
+	widevine_data = (uint8_t *)new_strstr((char *)received_data,
+					      WIDEVINE_TAG, len);
+	attestation_data = (uint8_t *)new_strstr((char *)received_data,
+						 ATTESTATION_TAG, len);
+	playready_sl30_data = (uint8_t *)new_strstr((char *)received_data,
+						    PLAYREADY30_TAG, len);
+	if (widevine_data) {
 		/* widevine keybox */
 		TEEC_UUID widevine_uuid = { 0x1b484ea5, 0x698b, 0x4142,
 			{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
 
-		key_size = *(received_data + SIZE_OF_TAG);
-		data_size = *(received_data + SIZE_OF_TAG + sizeof(key_size));
+		key_size = *(widevine_data + SIZE_OF_TAG);
+		data_size = *(widevine_data + SIZE_OF_TAG + sizeof(key_size));
 
 		ret = rk_send_keybox_to_ta((uint8_t *)"widevine_keybox",
 					   sizeof("widevine_keybox"),
 					   widevine_uuid,
-					   received_data + SIZE_OF_TAG +
+					   widevine_data + SIZE_OF_TAG +
 					   sizeof(key_size) + sizeof(data_size),
 					   key_size,
-					   received_data + 12 + key_size,
+					   widevine_data + 12 + key_size,
 					   data_size);
 		if (ret == TEEC_SUCCESS) {
 			rc = 0;
@@ -170,11 +182,12 @@ uint32_t write_keybox_to_secure_storage(uint8_t *received_data, uint32_t len)
 			rc = -EIO;
 			printf("write widevine keybox to secure storage fail\n");
 		}
-	} else if (memcmp(received_data, ATTESTATION_TAG, SIZE_OF_TAG) == 0) {
+	} else if (attestation_data) {
 		/* attestation key */
 		atap_result ret;
 
-		ret = write_attestation_key_to_secure_storage(received_data, len);
+		ret = write_attestation_key_to_secure_storage(attestation_data,
+							      len);
 		if (ret == ATAP_RESULT_OK) {
 			rc = 0;
 			printf("write attestation key to secure storage success\n");
@@ -182,14 +195,14 @@ uint32_t write_keybox_to_secure_storage(uint8_t *received_data, uint32_t len)
 			rc = -EIO;
 			printf("write attestation key to secure storage fail\n");
 		}
-	} else if (memcmp(received_data, PLAYREADY30_TAG, SIZE_OF_TAG) == 0) {
+	} else if (playready_sl30_data) {
 		/* PlayReady SL3000 root key */
 		uint32_t ret;
 
-		data_size = *(received_data + SIZE_OF_TAG);
+		data_size = *(playready_sl30_data + SIZE_OF_TAG);
 		ret = write_to_keymaster((uint8_t *)"PlayReady_SL3000",
 					 sizeof("PlayReady_SL3000"),
-					 received_data + SIZE_OF_TAG +
+					 playready_sl30_data + SIZE_OF_TAG +
 					 sizeof(data_size),
 					 data_size);
 		if (ret == TEEC_SUCCESS) {
@@ -204,14 +217,20 @@ uint32_t write_keybox_to_secure_storage(uint8_t *received_data, uint32_t len)
 	/* write all data to secure storage for readback check */
 	if (!rc) {
 		uint32_t ret;
+		uint8_t *raw_data = malloc(len + sizeof(uint32_t));
+
+		/* add raw_data_len(4 byte) in begin of raw_data */
+		memcpy(raw_data, &len, sizeof(uint32_t));
+		memcpy((raw_data + sizeof(uint32_t)), received_data, len);
 
 		ret = write_to_keymaster((uint8_t *)"raw_data",
 					 sizeof("raw_data"),
-					 received_data, len);
+					 raw_data, len + sizeof(uint32_t));
 		if (ret == TEEC_SUCCESS)
 			rc = 0;
 		else
 			rc = -EIO;
+		free(raw_data);
 	}
 	return rc;
 }
@@ -219,12 +238,34 @@ uint32_t write_keybox_to_secure_storage(uint8_t *received_data, uint32_t len)
 uint32_t read_raw_data_from_secure_storage(uint8_t *data, uint32_t data_size)
 {
 	uint32_t rc;
+	uint32_t key_size;
+	uint8_t *read_data = malloc(1024 * 40);
 
 	rc = read_from_keymaster((uint8_t *)"raw_data", sizeof("raw_data"),
-				 data, data_size - SIZE_OF_USB_CMD);
+				 read_data, data_size);
 	if (rc != TEEC_SUCCESS)
 		return 0;
-	rc = data_size - SIZE_OF_USB_CMD;
+
+	memcpy(&key_size, read_data, sizeof(uint32_t));
+	memcpy(data, read_data + sizeof(uint32_t), key_size);
+	rc = key_size;
+	free(read_data);
 
 	return rc;
 }
+
+char *new_strstr(const char *s1, const char *s2, uint32_t l1)
+{
+	uint32_t l2;
+
+	l2 = strlen(s2);
+	if (!l2)
+		return (char *)s1;
+	while (l1 >= l2) {
+		l1--;
+		if (!memcmp(s1, s2, l2))
+			return (char *)s1;
+		s1++;
+	}
+	return NULL;
+}
diff --git a/include/write_keybox.h b/include/write_keybox.h
index 445562948c..55cd94536b 100644
--- a/include/write_keybox.h
+++ b/include/write_keybox.h
@@ -29,6 +29,7 @@ uint32_t write_keybox_to_secure_storage(uint8_t *received_data, uint32_t len);
  */
 uint32_t read_raw_data_from_secure_storage(uint8_t *received_data,
 					   uint32_t len);
+char *new_strstr(const char *s1, const char *s2, uint32_t l1);
 #else
 inline uint32_t write_keybox_to_secure_storage(uint8_t *raw_data,
 					       uint32_t data_size)

commit 5bc73b33ae844e487ae4a4eb823a501ff21d2a0e
Author: Dayao Ji <jdy@rock-chips.com>
Date:   Fri Oct 11 17:55:16 2019 +0800

    common: android: add androidboot.dtbo_idx to cmdline
    
    fix following vts issue:
    0 == 0 Kernel command line missing androidboot.dtbo_idx
    
    Change-Id: Ib2990b5e204d704d895662c60f18e9e0c8a05b25
    Signed-off-by: Dayao Ji <jdy@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 9ace6cfe6a..747fae1887 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -750,6 +750,22 @@ static int android_get_dtbo(ulong *fdt_dtbo,
 	else
 		part_name = PART_DTBO;
 
+#ifdef CONFIG_ANDROID_AB
+	char slot_suffix[3] = {0};
+	char *part_name_temp = PART_DTBO;
+
+	if (rk_avb_get_current_slot(slot_suffix)) {
+		printf("%s: rk_avb_get_current_slot failed !\n", __func__);
+		return -ENODEV;
+	}
+	part_name = android_str_append(part_name_temp, slot_suffix);
+	if (!part_name) {
+		printf("%s: android_str_append failed !\n", __func__);
+		return -EINVAL;
+	}
+	debug("%s: part_name=%s\n", __func__, part_name);
+#endif
+
 	/* Get partition info */
 	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {
@@ -863,6 +879,22 @@ int android_fdt_overlay_apply(void *fdt_addr)
 	else
 		part_name = PART_BOOT;
 
+#ifdef CONFIG_ANDROID_AB
+	char slot_suffix[3] = {0};
+	char *part_name_temp = PART_BOOT;
+
+	if (rk_avb_get_current_slot(slot_suffix)) {
+		printf("%s: rk_avb_get_current_slot failed !\n", __func__);
+		return -ENODEV;
+	}
+	part_name = android_str_append(part_name_temp, slot_suffix);
+	if (!part_name) {
+		printf("%s: android_str_append failed !\n", __func__);
+		return -EINVAL;
+	}
+	printf("%s: part_name=%s\n", __func__, part_name);
+#endif
+
 	/* Get partition info */
 	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {

commit 4d8bb99d141cc8de3016094c7f0174dc3de0d05c
Author: Jian Qiu <qiujian@rock-chips.com>
Date:   Thu Oct 17 17:24:18 2019 +0800

    configs: rk3126: enable CONFIG_CMD_DTIMG
    
    Change-Id: Ia17bc29999577503220023036738aea07a612dc2
    Signed-off-by: Jian Qiu <qiujian@rock-chips.com>

diff --git a/configs/rk3126_defconfig b/configs/rk3126_defconfig
index 66ca79a99a..5c38548969 100644
--- a/configs/rk3126_defconfig
+++ b/configs/rk3126_defconfig
@@ -17,6 +17,7 @@ CONFIG_FASTBOOT_BUF_ADDR=0x60800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_CMD_DTIMG=y
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set

commit 00dd75d2961eb0587b00fec7d5fd33658c26d1f0
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Oct 10 10:55:13 2019 +0800

    mmc: avoid reading ext_csd several times
    
    Change-Id: I1fc0b719d3a6da2afd1f2dff904b15167c76158c
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 7ef5170018..7bbce128e5 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -30,6 +30,8 @@ static const unsigned int sd_au_size[] = {
 	SZ_16M / 512,	(SZ_16M + SZ_8M) / 512,	SZ_32M / 512,	SZ_64M / 512,
 };
 
+static char mmc_ext_csd[512];
+
 #if CONFIG_IS_ENABLED(MMC_TINY)
 static struct mmc mmc_static;
 struct mmc *find_mmc_device(int dev_num)
@@ -543,10 +545,18 @@ static int mmc_complete_op_cond(struct mmc *mmc)
 
 static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
 {
+	static int initialized;
 	struct mmc_cmd cmd;
 	struct mmc_data data;
 	int err;
 
+	if (initialized) {
+		memcpy(ext_csd, mmc_ext_csd, 512);
+		return 0;
+	}
+
+	initialized = 1;
+
 	/* Get the Card Status Register */
 	cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
 	cmd.resp_type = MMC_RSP_R1;
@@ -558,6 +568,7 @@ static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
 	data.flags = MMC_DATA_READ;
 
 	err = mmc_send_cmd(mmc, &cmd, &data);
+	memcpy(mmc_ext_csd, ext_csd, 512);
 
 	return err;
 }

commit 15737894e442cc5c7b68e4b7cf721b52173acb3e
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Sep 26 09:51:41 2019 +0800

    mmc: add func mmc_gpio_init_direct in spl
    
    Sometimes we need to reconfigure the eMMC gpio state in spl without
    pinctrl driver. So add func mmc_gpio_init_direct to initialize the
    eMMC gpio in different platform.
    
    Change-Id: I5917c1bbe474f33dc8ba3f47b6368e4337ee2f35
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index d159c6f64c..fdd49294e6 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -37,6 +37,10 @@ struct rockchip_dwmmc_priv {
 	u32 minmax[2];
 };
 
+#ifdef CONFIG_SPL_BUILD
+__weak void mmc_gpio_init_direct(void) {}
+#endif
+
 static uint rockchip_dwmmc_get_mmc_clk(struct dwmci_host *host, uint freq)
 {
 	struct udevice *dev = host->priv;
@@ -158,6 +162,9 @@ static int rockchip_dwmmc_probe(struct udevice *dev)
 	struct udevice *pwr_dev __maybe_unused;
 	int ret;
 
+#ifdef CONFIG_SPL_BUILD
+	mmc_gpio_init_direct();
+#endif
 #if CONFIG_IS_ENABLED(OF_PLATDATA)
 	struct dtd_rockchip_rk3288_dw_mshc *dtplat = &plat->dtplat;
 
diff --git a/include/mmc.h b/include/mmc.h
index e3e1bbaeaf..8bf4761457 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -766,5 +766,12 @@ int mmc_get_env_dev(void);
  */
 struct blk_desc *mmc_get_blk_desc(struct mmc *mmc);
 
+
+/**
+ * mmc_gpio_init_direct()
+ *
+ */
+void mmc_gpio_init_direct(void);
+
 #endif /* _MMC_H_ */
 

commit a9f7ad7f114e145bc668578c1ece54c2dd500630
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Sep 25 12:11:12 2019 +0800

    clk: rockchip: rk1808: set gpll to 594000000
    
    The eMMC clk is depended on gpll, and the eMMC is needed to run 150MHz
    in HS200 mode. So set gpll to 594000000.
    
    Change-Id: I28f56f161eb40cf640f7d979f53f8e6fdaff957c
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk1808.h b/arch/arm/include/asm/arch-rockchip/cru_rk1808.h
index 9e12f805e4..299fd3e560 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk1808.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk1808.h
@@ -13,6 +13,7 @@
 #define OSC_HZ		(24 * MHz)
 #define APLL_HZ		(1200 * MHz)
 #define PCLK_PMU_HZ	(100 * MHz)
+#define GPLL_HZ		(594 * MHz)
 
 /* PX30 pll id */
 enum rk1808_pll_id {
diff --git a/drivers/clk/rockchip/clk_rk1808.c b/drivers/clk/rockchip/clk_rk1808.c
index 51223f93fa..be9297e430 100644
--- a/drivers/clk/rockchip/clk_rk1808.c
+++ b/drivers/clk/rockchip/clk_rk1808.c
@@ -1258,7 +1258,17 @@ static int rk1808_clk_probe(struct udevice *dev)
 			printf("%s failed to set armclk rate\n", __func__);
 		priv->armclk_init_hz = APLL_HZ;
 	}
-
+#ifdef CONFIG_SPL_BUILD
+	/*
+	 * The eMMC clk is depended on gpll, and the eMMC is needed to
+	 * run 150MHz in HS200 mode. So set gpll to GPLL_HZ(594000000)
+	 * which can be divided near to 150MHz.
+	 */
+	ret = rockchip_pll_set_rate(&rk1808_pll_clks[GPLL],
+				    priv->cru, GPLL, GPLL_HZ);
+	if (ret < 0)
+		printf("%s failed to set gpll rate\n", __func__);
+#endif
 	priv->cpll_hz = rockchip_pll_get_rate(&rk1808_pll_clks[CPLL],
 					      priv->cru, CPLL);
 	priv->gpll_hz = rockchip_pll_get_rate(&rk1808_pll_clks[GPLL],

commit a5f4ae85a685d7028de7156396b8261cbd282dbf
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Sep 24 20:49:08 2019 +0800

    common: spl: rkfw: support boot kernel in spl
    
    Load kernel through android format, then jump to kernel through ATF.
    
    Change-Id: I6c14faa6c4371fdc897e00068be7d9d86a8c2608
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/spl/spl_rkfw.c b/common/spl/spl_rkfw.c
index 02fd32dc00..833136440c 100644
--- a/common/spl/spl_rkfw.c
+++ b/common/spl/spl_rkfw.c
@@ -4,8 +4,11 @@
  */
 
 #include <common.h>
+#include <android_image.h>
+#include <errno.h>
 #include <malloc.h>
 #include <spl_rkfw.h>
+#include <linux/kernel.h>
 
 static const __aligned(16) struct s_fip_name_id fip_name_id[] = {
 	{ BL30_IMAGE_NAME, UUID_SCP_FIRMWARE_BL30 },		/* optional */
@@ -243,6 +246,73 @@ static int rkfw_load_uboot(struct spl_load_info *info, u32 image_sector,
 	return 0;
 }
 
+static int rkfw_load_kernel(struct spl_load_info *info, u32 image_sector,
+			    uintptr_t *bl33_entry, u32 try_count)
+{
+	struct andr_img_hdr *hdr;
+	int ret, cnt;
+	int dtb_sector, ramdisk_sector;
+
+	cnt = ALIGN(sizeof(struct andr_img_hdr), 512) >> 9;
+	hdr = malloc(cnt * 512);
+	if (!hdr)
+		return -ENOMEM;
+
+	ret = info->read(info, image_sector, cnt, (void *)hdr);
+	if (ret != cnt) {
+		ret = -EIO;
+		goto out;
+	}
+
+	if (memcmp(hdr->magic, ANDR_BOOT_MAGIC, strlen(ANDR_BOOT_MAGIC)) != 0) {
+		printf("SPL: boot image head magic error\n");
+		ret = -EINVAL;
+		goto out;
+	}
+
+	ramdisk_sector = ALIGN(hdr->kernel_size, hdr->page_size);
+	dtb_sector = ALIGN(hdr->kernel_size, hdr->page_size)
+			+ ALIGN(hdr->ramdisk_size, hdr->page_size)
+			+ ALIGN(hdr->second_size, hdr->page_size);
+	image_sector = image_sector + cnt;
+	cnt = ALIGN(hdr->kernel_size, hdr->page_size) >> 9;
+
+	/* Load kernel image */
+	ret = info->read(info, image_sector, cnt, (void *)CONFIG_SPL_KERNEL_ADDR);
+	if (ret != cnt) {
+		ret = -EIO;
+		goto out;
+	}
+
+	/* Load ramdisk image */
+	if (hdr->ramdisk_size) {
+		ret = info->read(info, (ramdisk_sector >> 9) + image_sector,
+				 ALIGN(hdr->ramdisk_size, hdr->page_size) >> 9,
+				 (void *)CONFIG_SPL_RAMDISK_ADDR);
+		if (ret != (ALIGN(hdr->ramdisk_size, hdr->page_size) >> 9)) {
+			ret = -EIO;
+			goto out;
+		}
+	}
+
+	/* Load dtb image */
+	ret = info->read(info, (dtb_sector >> 9) + image_sector,
+			 ALIGN(hdr->dtb_size, hdr->page_size) >> 9,
+			 (void *)CONFIG_SPL_FDT_ADDR);
+
+	if (ret != (ALIGN(hdr->dtb_size, hdr->page_size) >> 9)) {
+		ret = -EIO;
+		goto out;
+	}
+
+	*bl33_entry = CONFIG_SPL_KERNEL_ADDR;
+	ret = 0;
+out:
+	free(hdr);
+
+	return ret;
+}
+
 int spl_load_rkfw_image(struct spl_image_info *spl_image,
 			struct spl_load_info *info,
 			u32 trust_sector, u32 uboot_sector)
@@ -261,11 +331,19 @@ int spl_load_rkfw_image(struct spl_image_info *spl_image,
 
 	ret = rkfw_load_uboot(info, uboot_sector,
 			      &spl_image->entry_point_bl33, try_count);
-	if (ret) {
+	if (ret)
 		printf("Load uboot image failed! ret=%d\n", ret);
+	else
+		goto boot;
+
+	ret = rkfw_load_kernel(info, uboot_sector,
+			     &spl_image->entry_point_bl33, try_count);
+	if (ret) {
+		printf("Load kernel image failed! ret=%d\n", ret);
 		goto out;
 	}
 
+boot:
 #if CONFIG_IS_ENABLED(LOAD_FIT)
 	spl_image->fdt_addr = 0;
 #endif

commit cb560f193412cfee7b699072d37f477cbb49fb04
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue Oct 15 09:53:24 2019 +0800

    mtd: spinand: Fix GD5F1GQ4UExxG flash info table QE bit flag
    
    Change-Id: Id55ae1dad8798e9c607d76831dc3309882227b3e
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/gigadevice.c b/drivers/mtd/nand/spi/gigadevice.c
index 3681c5eed9..f2242ec1ec 100644
--- a/drivers/mtd/nand/spi/gigadevice.c
+++ b/drivers/mtd/nand/spi/gigadevice.c
@@ -113,7 +113,7 @@ static const struct spinand_info gigadevice_spinand_table[] = {
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
 					      &write_cache_variants,
 					      &update_cache_variants),
-		     0,
+		     SPINAND_HAS_QE_BIT,
 		     SPINAND_ECCINFO(&gd5fxgq4xexxg_ooblayout,
 				     gd5fxgq4xexxg_ecc_get_status)),
 };

commit 1d39542f38706f9077905bba81475e4c3684cbd0
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Oct 15 09:21:11 2019 +0800

    mtd: mtd_blk: find the useful lba size
    
    Find the first useful block in the end, and it is the end of
    the nand storage.
    
    Change-Id: I83203cbd764b2a6a6baa69694407f75339f176d5
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index 31b1b8c3c0..fe5eb63635 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -177,18 +177,32 @@ static int mtd_blk_probe(struct udevice *udev)
 {
 	struct mtd_info *mtd = dev_get_uclass_priv(udev->parent);
 	struct blk_desc *desc = dev_get_uclass_platdata(udev);
+	int ret, i;
 
 	desc->bdev->priv = mtd;
 	sprintf(desc->vendor, "0x%.4x", 0x2207);
 	memcpy(desc->product, mtd->name, strlen(mtd->name));
 	memcpy(desc->revision, "V1.00", sizeof("V1.00"));
 	if (mtd->type == MTD_NANDFLASH) {
-		/* Reserve 4 blocks for BBT(Bad Block Table) */
-		desc->lba = (mtd->size >> 9) - (mtd->erasesize >> 9) * 4;
+		/*
+		 * Find the first useful block in the end,
+		 * and it is the end lba of the nand storage.
+		 */
+		for (i = 0; i < (mtd->size / mtd->erasesize); i++) {
+			ret =  mtd_block_isbad(mtd,
+					       mtd->size - mtd->erasesize * (i + 1));
+			if (!ret) {
+				desc->lba = (mtd->size >> 9) -
+					(mtd->erasesize >> 9) * i;
+				break;
+			}
+		}
 	} else {
 		desc->lba = mtd->size >> 9;
 	}
 
+	debug("MTD: desc->lba is %lx\n", desc->lba);
+
 	return 0;
 }
 

commit 535b44c04d1d7790f833006feb56b9e9c02fb646
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Aug 28 14:51:44 2019 +0800

    cmd: rockusb: forbid to flash mmc 1(sdcard)
    
    Change-Id: I186bfe127e6146aab1df52f8bafb20da9d1647d2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/cmd/rockusb.c b/cmd/rockusb.c
index 804adb05ab..aa7400ad90 100644
--- a/cmd/rockusb.c
+++ b/cmd/rockusb.c
@@ -154,6 +154,11 @@ static int do_rkusb(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 	devtype = argv[2];
 	devnum	= argv[3];
 
+	if (!strcmp(devtype, "mmc") && !strcmp(devnum, "1")) {
+		pr_err("Forbid to flash mmc 1(sdcard)\n");
+		return CMD_RET_FAILURE;
+	}
+
 	g_rkusb = &rkusb;
 	rc = rkusb_init(devtype, devnum);
 	if (rc < 0)

commit 5e135dc7919527cea6d253e44aa06cf7c011d7ce
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Tue Oct 15 19:35:39 2019 +0800

    configs: rk3368: enable rockchip io domain driver
    
    Change-Id: I65508590bbc78b532b3f968c47b6c861d35c14bc
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/configs/rk3368_defconfig b/configs/rk3368_defconfig
index 5a4afd9880..0872c3f545 100644
--- a/configs/rk3368_defconfig
+++ b/configs/rk3368_defconfig
@@ -60,6 +60,8 @@ CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
 CONFIG_POWER_FG_RK818=y
+CONFIG_IO_DOMAIN=y
+CONFIG_ROCKCHIP_IO_DOMAIN=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y

commit 6d8fffba7f790cde6a02791f9584003554bc525a
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Sep 24 20:28:06 2019 +0800

    spl: support SPL_KERNEL_ADDR & SPL_FDT_ADDR & SPL_RAMDISK_ADDR
    
    Change-Id: I8b7fdfab958c8a24a2f5c87565d32d1c89442491
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 7e77a045dd..fe0c7169e0 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -809,6 +809,30 @@ config RKFW_U_BOOT_SECTOR
 	depends on SPL_LOAD_RKFW
 	default 0x4000
 
+config SPL_KERNEL_ADDR
+	hex "Kernel load address in spl"
+	depends on SPL
+	default 0x280000
+	help
+	  Define the kernel address where load kernel image to.
+	  This is used to boot kernel in spl.
+
+config SPL_FDT_ADDR
+	hex "Device tree blob load address in spl"
+	depends on SPL
+	default 0x01f00000
+	help
+	  Define the fdt address where load dtb image to.
+	  This is used to boot kernel in spl.
+
+config SPL_RAMDISK_ADDR
+	hex "Ramdisk load address in spl"
+	depends on SPL
+	default 0x0a200000
+	help
+	  Define the ramdisk address where load ramdisk image to.
+	  This is used to boot kernel in spl.
+
 config TPL
 	bool
 	depends on SUPPORT_TPL

commit af6c3684534f3e200a52ceffde6b78548c97ad3b
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Sep 24 11:37:28 2019 +0800

    mmc: support hs200 in spl
    
    Change-Id: I21e965c58e92e3bec55f0319da7a10488c7fbc5b
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 54a316fab5..7ef5170018 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -840,7 +840,6 @@ static int mmc_select_hs_ddr(struct mmc *mmc)
 	return 0;
 }
 
-#ifndef CONFIG_SPL_BUILD
 static int mmc_select_hs200(struct mmc *mmc)
 {
 	int ret;
@@ -864,7 +863,6 @@ static int mmc_select_hs200(struct mmc *mmc)
 
 	return ret;
 }
-#endif
 
 static int mmc_select_hs400(struct mmc *mmc)
 {
@@ -995,12 +993,9 @@ static int mmc_change_freq(struct mmc *mmc)
 
 	avail_type = mmc_select_card_type(mmc, ext_csd);
 
-#ifndef CONFIG_SPL_BUILD
 	if (avail_type & EXT_CSD_CARD_TYPE_HS200)
 		err = mmc_select_hs200(mmc);
-	else
-#endif
-	if (avail_type & EXT_CSD_CARD_TYPE_HS)
+	else if (avail_type & EXT_CSD_CARD_TYPE_HS)
 		err = mmc_select_hs(mmc);
 	else
 		err = -EINVAL;

commit ca69da84036fe4885340ab8067ffa4341133dd98
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 15 11:19:44 2019 +0800

    make.sh: fix missing create .temp folder after delete
    
    Change-Id: I05ffb3f518a96158bbd0940287d79ce73610b2c4
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index eac352b74d..369b023763 100755
--- a/make.sh
+++ b/make.sh
@@ -630,9 +630,10 @@ pack_spl_loader_image()
 	# Copy to .temp folder
 	if [ -d ${RKBIN}/.temp ]; then
 		rm ${RKBIN}/.temp -rf
-	else
-		mkdir ${RKBIN}/.temp
 	fi
+
+	mkdir ${RKBIN}/.temp
+
 	cp ${OUTDIR}/spl/u-boot-spl.bin ${RKBIN}/.temp/
 	cp ${OUTDIR}/tpl/u-boot-tpl.bin ${RKBIN}/.temp/
 	cp ${ini} ${RKBIN}/.temp/${RKCHIP_LOADER}MINIALL.ini -f

commit 160fd5b6881c797e3cdfeddf8ba23b60b7392a6e
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Sep 9 19:40:41 2019 +0800

    configs: rk1808: support build spl image
    
    Change-Id: Ibb8718c85991e85556b199d6221eb249e0d8e2e4
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/rk1808_defconfig b/configs/rk1808_defconfig
index 1c075e6faa..d9ab78240a 100644
--- a/configs/rk1808_defconfig
+++ b/configs/rk1808_defconfig
@@ -1,20 +1,37 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_RK1808=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_TARGET_EVB_RK1808=y
+CONFIG_SPL_STACK_R_ADDR=0x3fe0000
 CONFIG_DEFAULT_DEVICE_TREE="rk1808-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
 CONFIG_BOOTDELAY=0
 # CONFIG_CONSOLE_MUX is not set
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_SPL=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_SEPARATE_BSS=y
+# CONFIG_SPL_SKIP_RELOCATE is not set
+CONFIG_SPL_RELOC_TEXT_BASE=0x3001000
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_FASTBOOT_BUF_ADDR=0x00800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
@@ -41,11 +58,15 @@ CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_DOS_PARTITION is not set
 # CONFIG_ISO_PARTITION is not set
 CONFIG_RKPARM_PARTITION=y
+CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
 CONFIG_CLK=y
+CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y
@@ -66,6 +87,7 @@ CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
+CONFIG_SPL_RAM=y
 CONFIG_DM_RESET=y
 CONFIG_RKFLASH=y
 CONFIG_RKNANDC_NAND=y
@@ -97,6 +119,9 @@ CONFIG_DRM_ROCKCHIP_INNO_MIPI_PHY=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_LCD=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
 CONFIG_LZ4=y
+CONFIG_ERRNO_STR=y
 # CONFIG_EFI_LOADER is not set
 CONFIG_TEST_ROCKCHIP=y

commit b4761549e81382ad939e37e076e8e4538a685dca
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Sep 12 15:17:24 2019 +0800

    rockchip: rk1808: support spl build
    
    Add some spl configs for spl build.
    
    Change-Id: Idc0d3e89c3ac316a540bd6fc7571b68ee440952c
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/configs/rk1808_common.h b/include/configs/rk1808_common.h
index 480824ddfe..d3007380bb 100644
--- a/include/configs/rk1808_common.h
+++ b/include/configs/rk1808_common.h
@@ -9,6 +9,13 @@
 
 #include "rockchip-common.h"
 
+#define CONFIG_SPL_FRAMEWORK
+#define CONFIG_SPL_TEXT_BASE		0x00000000
+#define CONFIG_SPL_MAX_SIZE		0x00020000
+#define CONFIG_SPL_BSS_START_ADDR	0x03fe0000
+#define CONFIG_SPL_BSS_MAX_SIZE		0x00002000
+#define CONFIG_SPL_STACK		0x03fe0000
+
 #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT

commit 3d95740a704ed951aaf79f6c66cf24f3af57bc1b
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Sep 16 14:25:47 2019 +0800

    rockchip: rk1808: support spl & tpl build
    
    Change-Id: I6588fcc592d4ce64b8f0f774c7bca4d0a633543d
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 23c77021b6..7c9ea4d1fc 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -378,6 +378,8 @@ config ROCKCHIP_RK1808
 	select ARM_SMCCC
 	select GICV3 if !COPROCESSOR_RK1808
 	select DEBUG_UART_BOARD_INIT
+	select SUPPORT_SPL if !COPROCESSOR_RK1808
+	select SUPPORT_TPL if !COPROCESSOR_RK1808
 	help
 	  The Rockchip RK1808 is a ARM-based Soc which embedded with dual
 	  Cortex-A35.

commit a13a6cc2f581f6930e20309961270b08de1a6fec
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Thu Oct 10 15:21:24 2019 +0800

    clk: rockchip: rk3308: drop CONFIG_SPL_BUILD control rules
    
    Change-Id: Iba8a3cfcf201e10630211b1190bf9e95b04cf475
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index 75c78eaa8a..49149fd615 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -743,7 +743,6 @@ static ulong rk3308_audio_set_clk(struct rk3308_clk_priv *priv, ulong clk_id,
 	return rk3308_peri_get_clk(priv, clk_id);
 }
 
-#ifndef CONFIG_SPL_BUILD
 static ulong rk3308_crypto_get_clk(struct rk3308_clk_priv *priv, ulong clk_id)
 {
 	struct rk3308_cru *cru = priv->cru;
@@ -800,7 +799,6 @@ static ulong rk3308_crypto_set_clk(struct rk3308_clk_priv *priv, ulong clk_id,
 
 	return rk3308_crypto_get_clk(priv, clk_id);
 }
-#endif
 
 static ulong rk3308_clk_get_rate(struct clk *clk)
 {
@@ -871,12 +869,10 @@ static ulong rk3308_clk_get_rate(struct clk *clk)
 	case PCLK_AUDIO:
 		rate = rk3308_audio_get_clk(priv, clk->id);
 		break;
-#ifndef CONFIG_SPL_BUILD
 	case SCLK_CRYPTO:
 	case SCLK_CRYPTO_APK:
 		rate = rk3308_crypto_get_clk(priv, clk->id);
 		break;
-#endif
 	default:
 		return -ENOENT;
 	}
@@ -951,12 +947,10 @@ static ulong rk3308_clk_set_rate(struct clk *clk, ulong rate)
 	case PCLK_AUDIO:
 		rate = rk3308_audio_set_clk(priv, clk->id, rate);
 		break;
-#ifndef CONFIG_SPL_BUILD
 	case SCLK_CRYPTO:
 	case SCLK_CRYPTO_APK:
 		ret = rk3308_crypto_set_clk(priv, clk->id, rate);
 		break;
-#endif
 	default:
 		return -ENOENT;
 	}

commit c9d107b5b916b0b04542eaaff879d1dbd726be3d
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Wed Oct 9 11:01:52 2019 +0800

    dm: crypto: add TRNG test
    
    Change-Id: Id88d07ff36d20fa19e4be969673f88384f2f658e
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/cmd/crypto.c b/cmd/crypto.c
index 4f64a5cad8..46a8f9aa82 100644
--- a/cmd/crypto.c
+++ b/cmd/crypto.c
@@ -191,7 +191,7 @@ static u8 rsa2048_sha256_sign[] = {
 	0x19, 0x9a, 0x1d, 0x32,
 };
 
-static void dump(const char *title, void *hard_d, void *soft_d, u32 nbits)
+static void dump_hash(const char *title, void *hard_d, void *soft_d, u32 nbits)
 {
 	int i, same;
 	char *buf;
@@ -212,6 +212,19 @@ static void dump(const char *title, void *hard_d, void *soft_d, u32 nbits)
 	printf("\n\n");
 }
 
+static void dump_hex(const char *name, const u8 *array, u32 len)
+{
+	int i;
+
+	printf("[%s]: %uByte", name, len);
+	for (i = 0; i < len; i++) {
+		if (i % 32 == 0)
+			printf("\n");
+		printf("%02x ", array[i]);
+	}
+	printf("\n");
+}
+
 static int do_crypto(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
 	struct udevice *dev;
@@ -237,7 +250,7 @@ static int do_crypto(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	      CRYPTO_RSA2048;
 #else
 	cap = CRYPTO_MD5 | CRYPTO_SHA1 | CRYPTO_SHA256 | CRYPTO_SHA512 |
-	      CRYPTO_RSA2048;
+	      CRYPTO_RSA2048 | CRYPTO_TRNG;
 #endif
 	dev = crypto_get_device(cap);
 	if (!dev) {
@@ -246,56 +259,77 @@ static int do_crypto(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	}
 
 	/* MD5 */
-	csha_ctx.algo = CRYPTO_MD5;
-	csha_ctx.length = sizeof(foo_data);
-	crypto_sha_csum(dev, &csha_ctx, (char *)foo_data,
-			sizeof(foo_data), md5_out0);
-	md5(foo_data, sizeof(foo_data), md5_out1);
-	dump("MD5", md5_out0, md5_out1, crypto_algo_nbits(csha_ctx.algo));
+	if (cap & CRYPTO_MD5) {
+		csha_ctx.algo = CRYPTO_MD5;
+		csha_ctx.length = sizeof(foo_data);
+		crypto_sha_csum(dev, &csha_ctx, (char *)foo_data,
+				sizeof(foo_data), md5_out0);
+		md5(foo_data, sizeof(foo_data), md5_out1);
+		dump_hash("MD5", md5_out0, md5_out1,
+			  crypto_algo_nbits(csha_ctx.algo));
+	}
 
 	/* SHA1 */
-	csha_ctx.algo = CRYPTO_SHA1;
-	csha_ctx.length = sizeof(foo_data);
-	crypto_sha_csum(dev, &csha_ctx, (char *)foo_data,
-			sizeof(foo_data), sha1_out0);
-	sha1_starts(&sha1_ctx);
-	sha1_update(&sha1_ctx, (const u8 *)foo_data, sizeof(foo_data));
-	sha1_finish(&sha1_ctx, sha1_out1);
-	dump("SHA1", sha1_out0, sha1_out1, crypto_algo_nbits(csha_ctx.algo));
+	if (cap & CRYPTO_SHA1) {
+		csha_ctx.algo = CRYPTO_SHA1;
+		csha_ctx.length = sizeof(foo_data);
+		crypto_sha_csum(dev, &csha_ctx, (char *)foo_data,
+				sizeof(foo_data), sha1_out0);
+		sha1_starts(&sha1_ctx);
+		sha1_update(&sha1_ctx, (const u8 *)foo_data, sizeof(foo_data));
+		sha1_finish(&sha1_ctx, sha1_out1);
+		dump_hash("SHA1", sha1_out0, sha1_out1,
+			  crypto_algo_nbits(csha_ctx.algo));
+	}
 
 	/* SHA512 */
-	csha_ctx.algo = CRYPTO_SHA512;
-	csha_ctx.length = sizeof(foo_data);
-	crypto_sha_csum(dev, &csha_ctx, (char *)foo_data,
-			sizeof(foo_data), sha512_out0);
-	sha512_starts(&sha512_ctx);
-	sha512_update(&sha512_ctx, (const u8 *)foo_data, sizeof(foo_data));
-	sha512_finish(&sha512_ctx, sha512_out1);
-	dump("SHA512", sha512_out0, sha512_out1,
-	     crypto_algo_nbits(csha_ctx.algo));
+	if (cap & CRYPTO_SHA512) {
+		csha_ctx.algo = CRYPTO_SHA512;
+		csha_ctx.length = sizeof(foo_data);
+		crypto_sha_csum(dev, &csha_ctx, (char *)foo_data,
+				sizeof(foo_data), sha512_out0);
+		sha512_starts(&sha512_ctx);
+		sha512_update(&sha512_ctx, (const u8 *)foo_data,
+			      sizeof(foo_data));
+		sha512_finish(&sha512_ctx, sha512_out1);
+		dump_hash("SHA512", sha512_out0, sha512_out1,
+			  crypto_algo_nbits(csha_ctx.algo));
+	}
 
 	/* SHA256 */
-	csha_ctx.algo = CRYPTO_SHA256;
-	csha_ctx.length = sizeof(foo_data);
-	crypto_sha_csum(dev, &csha_ctx, (char *)foo_data,
-			sizeof(foo_data), sha256_out0);
-	sha256_starts(&sha256_ctx);
-	sha256_update(&sha256_ctx, (const u8 *)foo_data, sizeof(foo_data));
-	sha256_finish(&sha256_ctx, sha256_out1);
-	dump("SHA256", sha256_out0, sha256_out1,
-	     crypto_algo_nbits(csha_ctx.algo));
+	if (cap & CRYPTO_SHA256) {
+		csha_ctx.algo = CRYPTO_SHA256;
+		csha_ctx.length = sizeof(foo_data);
+		crypto_sha_csum(dev, &csha_ctx, (char *)foo_data,
+				sizeof(foo_data), sha256_out0);
+		sha256_starts(&sha256_ctx);
+		sha256_update(&sha256_ctx, (const u8 *)foo_data,
+			      sizeof(foo_data));
+		sha256_finish(&sha256_ctx, sha256_out1);
+		dump_hash("SHA256", sha256_out0, sha256_out1,
+			  crypto_algo_nbits(csha_ctx.algo));
+	}
 
 	/* RSA2048-SHA256 */
-	memset(&rsa_key, 0x00, sizeof(rsa_key));
-	rsa_key.algo = CRYPTO_RSA2048;
-	rsa_key.n = (u32 *)&rsa2048_n;
-	rsa_key.e = (u32 *)&rsa2048_e;
+	if ((cap & CRYPTO_RSA2048) && (cap & CRYPTO_SHA256)) {
+		memset(&rsa_key, 0x00, sizeof(rsa_key));
+		rsa_key.algo = CRYPTO_RSA2048;
+		rsa_key.n = (u32 *)&rsa2048_n;
+		rsa_key.e = (u32 *)&rsa2048_e;
 #ifdef CONFIG_ROCKCHIP_CRYPTO_V1
-	rsa_key.c = (u32 *)&rsa2048_c;
+		rsa_key.c = (u32 *)&rsa2048_c;
 #endif
-	crypto_rsa_verify(dev, &rsa_key, rsa2048_sha256_sign, rsa_out);
-	dump("RSA2048-SHA256", rsa_out,
-	     sha256_out1, crypto_algo_nbits(csha_ctx.algo));
+		crypto_rsa_verify(dev, &rsa_key, rsa2048_sha256_sign, rsa_out);
+		dump_hash("RSA2048-SHA256", rsa_out,
+			  sha256_out1, crypto_algo_nbits(csha_ctx.algo));
+	}
+
+	/* TRNG */
+	if (cap & CRYPTO_TRNG) {
+		memset(rsa_out, 0x00, sizeof(rsa_out));
+		crypto_get_trng(dev, rsa_out, sizeof(rsa_out));
+		dump_hex("TRNG", rsa_out, sizeof(rsa_out));
+	}
 
 	return 0;
 }

commit 434d6fd368d76f3bfc507c4bb84476a53cfac992
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Wed Oct 9 11:00:51 2019 +0800

    crypto: add crypto v2 TRNG support
    
    Change-Id: I25d4e8115e3ab9060d3bc87db06de481e299d6ab
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/drivers/crypto/crypto-uclass.c b/drivers/crypto/crypto-uclass.c
index 3c31347af5..0158046a81 100644
--- a/drivers/crypto/crypto-uclass.c
+++ b/drivers/crypto/crypto-uclass.c
@@ -121,6 +121,16 @@ int crypto_rsa_verify(struct udevice *dev, rsa_key *ctx, u8 *sign, u8 *output)
 	return ops->rsa_verify(dev, ctx, sign, output);
 }
 
+int crypto_get_trng(struct udevice *dev, u8 *output, u32 len)
+{
+	const struct dm_crypto_ops *ops = device_get_ops(dev);
+
+	if (!ops || !ops->get_trng)
+		return -ENOSYS;
+
+	return ops->get_trng(dev, output, len);
+}
+
 UCLASS_DRIVER(crypto) = {
 	.id	= UCLASS_CRYPTO,
 	.name	= "crypto",
diff --git a/drivers/crypto/rockchip/crypto_v2.c b/drivers/crypto/rockchip/crypto_v2.c
index 09136d0fc6..04ff74e880 100644
--- a/drivers/crypto/rockchip/crypto_v2.c
+++ b/drivers/crypto/rockchip/crypto_v2.c
@@ -438,6 +438,42 @@ exit:
 	return ret;
 }
 
+static int rk_trng(u8 *trng, u32 len)
+{
+	u32 i, reg_ctrl = 0;
+	int ret = -EINVAL;
+	u32 buf[8];
+
+	if (len > CRYPTO_TRNG_MAX)
+		return -EINVAL;
+
+	memset(buf, 0, sizeof(buf));
+
+	/* enable osc_ring to get entropy, sample period is set as 50 */
+	crypto_write(50, CRYPTO_RNG_SAMPLE_CNT);
+
+	reg_ctrl |= CRYPTO_RNG_256_bit_len;
+	reg_ctrl |= CRYPTO_RNG_SLOWER_SOC_RING_1;
+	reg_ctrl |= CRYPTO_RNG_ENABLE;
+	reg_ctrl |= CRYPTO_RNG_START;
+	reg_ctrl |= CRYPTO_WRITE_MASK_ALL;
+
+	crypto_write(reg_ctrl | CRYPTO_WRITE_MASK_ALL, CRYPTO_RNG_CTL);
+	RK_WHILE_TIME_OUT(crypto_read(CRYPTO_RNG_CTL) & CRYPTO_RNG_START,
+			  RK_CRYPTO_TIME_OUT, ret);
+
+	if (ret == 0) {
+		for (i = 0; i < ARRAY_SIZE(buf); i++)
+			buf[i] = crypto_read(CRYPTO_RNG_DOUT_0 + i * 4);
+		memcpy(trng, buf, len);
+	}
+
+	/* close TRNG */
+	crypto_write(0 | CRYPTO_WRITE_MASK_ALL, CRYPTO_RNG_CTL);
+
+	return ret;
+}
+
 static u32 rockchip_crypto_capability(struct udevice *dev)
 {
 	return CRYPTO_MD5 |
@@ -448,7 +484,8 @@ static u32 rockchip_crypto_capability(struct udevice *dev)
 	       CRYPTO_RSA1024 |
 	       CRYPTO_RSA2048 |
 	       CRYPTO_RSA3072 |
-	       CRYPTO_RSA4096;
+	       CRYPTO_RSA4096 |
+	       CRYPTO_TRNG;
 }
 
 static int rockchip_crypto_sha_init(struct udevice *dev, sha_context *ctx)
@@ -559,12 +596,33 @@ exit:
 	return ret;
 }
 
+static int rockchip_crypto_get_trng(struct udevice *dev, u8 *output, u32 len)
+{
+	int ret;
+	u32 i;
+
+	if (!dev || !output || !len)
+		return -EINVAL;
+
+	for (i = 0; i < len / CRYPTO_TRNG_MAX; i++) {
+		ret = rk_trng(output + i * CRYPTO_TRNG_MAX, CRYPTO_TRNG_MAX);
+		if (ret)
+			goto fail;
+	}
+
+	ret = rk_trng(output + i * CRYPTO_TRNG_MAX, len % CRYPTO_TRNG_MAX);
+
+fail:
+	return ret;
+}
+
 static const struct dm_crypto_ops rockchip_crypto_ops = {
 	.capability = rockchip_crypto_capability,
 	.sha_init   = rockchip_crypto_sha_init,
 	.sha_update = rockchip_crypto_sha_update,
 	.sha_final  = rockchip_crypto_sha_final,
 	.rsa_verify = rockchip_crypto_rsa_verify,
+	.get_trng = rockchip_crypto_get_trng,
 };
 
 /*
diff --git a/include/crypto.h b/include/crypto.h
index f9829b3fe4..6322052a8d 100644
--- a/include/crypto.h
+++ b/include/crypto.h
@@ -18,6 +18,8 @@
 #define CRYPTO_RSA3072		BIT(13)
 #define CRYPTO_RSA4096		BIT(14)
 
+#define CRYPTO_TRNG		BIT(15)
+
 #define BYTE2WORD(bytes)	((bytes) / 4)
 #define BITS2BYTE(nbits)	((nbits) / 8)
 #define BITS2WORD(nbits)	((nbits) / 32)
@@ -47,6 +49,9 @@ struct dm_crypto_ops {
 	/* RSA verify */
 	int (*rsa_verify)(struct udevice *dev, rsa_key *ctx,
 			  u8 *sign, u8 *output);
+
+	/* TRNG get */
+	int (*get_trng)(struct udevice *dev, u8 *output, u32 len);
 };
 
 /**
@@ -123,4 +128,15 @@ int crypto_sha_csum(struct udevice *dev, sha_context *ctx,
  */
 int crypto_rsa_verify(struct udevice *dev, rsa_key *ctx, u8 *sign, u8 *output);
 
+/**
+ * crypto_get_trng() - Crypto get trng
+ *
+ * @dev: crypto device
+ * @output: output trng data
+ * @len: trng len to get
+ *
+ * @return 0 on success, otherwise failed
+ */
+int crypto_get_trng(struct udevice *dev, u8 *output, u32 len);
+
 #endif
diff --git a/include/rockchip/crypto_v2.h b/include/rockchip/crypto_v2.h
index bcbaf0788c..3dc6382ca5 100644
--- a/include/rockchip/crypto_v2.h
+++ b/include/rockchip/crypto_v2.h
@@ -559,6 +559,8 @@ enum rk_hash_algo {
 #define LLI_USER_PRIVACY_KEY		_BIT(7)
 #define LLI_USER_ROOT_KEY		_BIT(8)
 
+#define CRYPTO_TRNG_MAX			32
+
 enum endian_mode {
 	BIG_ENDIAN = 0,
 	LITTLE_ENDIAN

commit 394f2cff980796e323a8987e08651d3fdb36bfdc
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Wed Oct 9 10:12:12 2019 +0800

    dts: rk3308: add crypto node
    
    Change-Id: I36fe3bf4ad238679f9613520bf5c86ab4766ace0
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-u-boot.dtsi b/arch/arm/dts/rk3308-u-boot.dtsi
index d8089907da..d65cc135c0 100644
--- a/arch/arm/dts/rk3308-u-boot.dtsi
+++ b/arch/arm/dts/rk3308-u-boot.dtsi
@@ -59,6 +59,11 @@
 	};
 };
 
+&crypto {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 &saradc {
 	u-boot,dm-pre-reloc;
 	status = "okay";
diff --git a/arch/arm/dts/rk3308.dtsi b/arch/arm/dts/rk3308.dtsi
index 05849cfdfb..a72997a9bd 100644
--- a/arch/arm/dts/rk3308.dtsi
+++ b/arch/arm/dts/rk3308.dtsi
@@ -245,6 +245,15 @@
 		};
 	};
 
+	crypto: crypto@ff2f0000 {
+		compatible = "rockchip,rk3308-crypto";
+		reg = <0x0 0xff2f0000 0x0 0x4000>;
+		clock-names = "sclk_crypto", "apkclk_crypto";
+		clocks = <&cru SCLK_CRYPTO>, <&cru SCLK_CRYPTO_APK>;
+		clock-frequency = <200000000>, <300000000>;
+		status = "disabled";
+	};
+
 	pwm0: pwm@ff180000 {
 		compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
 		reg = <0x0 0xff180000 0x0 0x10>;

commit 8132d8af90919443f0e043761826742521cdbf10
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Wed Oct 9 10:10:16 2019 +0800

    crypto: crypto v2: add rk3308 support
    
    current support: px30/rk1808/rk3308
    
    Change-Id: Ic7ae717bcbc6340a50e23051b35dba695f6222bb
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/drivers/crypto/rockchip/crypto_v2.c b/drivers/crypto/rockchip/crypto_v2.c
index d5091499ae..09136d0fc6 100644
--- a/drivers/crypto/rockchip/crypto_v2.c
+++ b/drivers/crypto/rockchip/crypto_v2.c
@@ -663,6 +663,7 @@ static int rockchip_crypto_probe(struct udevice *dev)
 static const struct udevice_id rockchip_crypto_ids[] = {
 	{ .compatible = "rockchip,px30-crypto" },
 	{ .compatible = "rockchip,rk1808-crypto" },
+	{ .compatible = "rockchip,rk3308-crypto" },
 	{ }
 };
 

commit 0afd6c2b7196d2a32d5904bf09ba5fac5c436a79
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Oct 10 11:55:02 2019 +0800

    driver: Makefile: add crypto compile for SPL
    
    Change-Id: I686b223ba6e3cd208af2e6663fdf5bb2f430a27f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/Makefile b/drivers/Makefile
index 7075c6824f..8f9aaf5714 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -4,6 +4,7 @@
 
 obj-$(CONFIG_$(SPL_TPL_)CLK) += clk/
 obj-$(CONFIG_$(SPL_TPL_)DM) += core/
+obj-$(CONFIG_$(SPL_TPL_)DM_CRYPTO) += crypto/
 obj-$(CONFIG_$(SPL_TPL_)DRIVERS_MISC_SUPPORT) += misc/ sysreset/ firmware/
 obj-$(CONFIG_$(SPL_TPL_)I2C_SUPPORT) += i2c/
 obj-$(CONFIG_$(SPL_TPL_)LED) += led/

commit 35ca3e037c7243a7e03c25931e03f56c64aa168a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 14 20:23:14 2019 +0800

    cmd: bootrkp: fix always detect sdcard successfully
    
    fixes:(1476830 cmd: bootrkp: clean up code)
    
    Change-Id: I437174085875b70bd72768f900b7c64c33163822
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/cmd/bootrkp.c b/cmd/bootrkp.c
index 5e1960b651..7418b669ed 100755
--- a/cmd/bootrkp.c
+++ b/cmd/bootrkp.c
@@ -104,13 +104,16 @@ static int do_rkimg_test(cmd_tbl_t *cmdtp, int flag, int argc,
 
 	if (buffer[0] == 0xFCDC8C3B) {
 		printf("Found IDB in SDcard\n");
+		ret = CMD_RET_SUCCESS;
 		if (0 == buffer[128 + 104 / 4]) /* TAG in IDB */
 			env_update("bootargs", "sdfwupdate");
+	} else {
+		ret = CMD_RET_FAILURE;
 	}
 
 	free(buffer);
 
-	return CMD_RET_SUCCESS;
+	return ret;
 }
 
 U_BOOT_CMD(

commit 7ceab850224bd02f440834c635c1e35500599d9a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 14 19:34:03 2019 +0800

    common: fdt_support: add hotkey to dump cmdline
    
    Change-Id: Icb95fc242f9cb5ee33807aac6c25ebe093ba6ecd
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/fdt_support.c b/common/fdt_support.c
index 4d3547c452..5ed1d25974 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -286,6 +286,9 @@ int fdt_chosen(void *fdt)
 	int   err;
 	int   i;
 	char  *str;		/* used to set string properties */
+	int dump;
+
+	dump = is_hotkey(HK_CMDLINE);
 
 	err = fdt_check_header(fdt);
 	if (err < 0) {
@@ -303,12 +306,16 @@ int fdt_chosen(void *fdt)
 #ifdef CONFIG_ARCH_ROCKCHIP
 		const char *bootargs;
 
-		debug("uboot bootargs: %s\n\n", str);
+		if (dump)
+			printf("## U-Boot bootargs: %s\n", str);
+
 		for (i = 0; i < ARRAY_SIZE(arr_bootargs); i++) {
 			bootargs = fdt_getprop(fdt, nodeoffset,
 					       arr_bootargs[i], NULL);
 			if (bootargs) {
-				debug("kernel %s: %s\n\n", arr_bootargs[i], bootargs);
+				if (dump)
+					printf("## Kernel %s: %s\n",
+					       arr_bootargs[i], bootargs);
 				/*
 				 * Append kernel bootargs
 				 * If use AB system, delete default "root=" which route
@@ -349,7 +356,8 @@ int fdt_chosen(void *fdt)
 		}
 	}
 
-	debug("merged bootargs: %s\n\n", env_get("bootargs"));
+	if (dump)
+		printf("## Merged bootargs: %s\n", env_get("bootargs"));
 
 	return fdt_fixup_stdout(fdt, nodeoffset);
 }

commit 16bd7102464f037751212fe989109235ed7c1e2a
Author: YouMin Chen <cym@rock-chips.com>
Date:   Tue Sep 24 16:24:52 2019 +0800

    driver: ram: rockchip: rk3328: dram init select common code
    
    Change-Id: Ifa9561942a631ec5feed75e558a0cbe5e20673af
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/dts/rk3328-sdram-ddr3-666.dtsi b/arch/arm/dts/rk3328-sdram-ddr3-666.dtsi
index d99e7e0352..3e88ed443b 100644
--- a/arch/arm/dts/rk3328-sdram-ddr3-666.dtsi
+++ b/arch/arm/dts/rk3328-sdram-ddr3-666.dtsi
@@ -14,6 +14,8 @@
 		0x0
 		0x10
 		0x10
+		0x10
+		0x10
 		0
 
 		0x9028b189
@@ -26,6 +28,8 @@
 
 		333
 		3
+		1
+		0
 		0
 
 		0x00000000
diff --git a/arch/arm/dts/rk3328-sdram-ddr4-666.dtsi b/arch/arm/dts/rk3328-sdram-ddr4-666.dtsi
index 78be7f0bec..0859649a69 100644
--- a/arch/arm/dts/rk3328-sdram-ddr4-666.dtsi
+++ b/arch/arm/dts/rk3328-sdram-ddr4-666.dtsi
@@ -11,6 +11,8 @@
 		0x0
 		0x11
 		0x0
+		0x11
+		0x0
 		0
 
 		0x94291288
@@ -23,6 +25,8 @@
 
 		333
 		0
+		1
+		0
 		0
 
 		0x00000000
diff --git a/arch/arm/dts/rk3328-sdram-lpddr3-666.dtsi b/arch/arm/dts/rk3328-sdram-lpddr3-666.dtsi
index 62d809e833..b9d3b3b948 100644
--- a/arch/arm/dts/rk3328-sdram-lpddr3-666.dtsi
+++ b/arch/arm/dts/rk3328-sdram-lpddr3-666.dtsi
@@ -14,6 +14,8 @@
 		0x0
 		0x10
 		0x10
+		0x10
+		0x10
 		0
 
 		0x0c48a18a
@@ -26,6 +28,8 @@
 
 		333
 		6
+		1
+		0
 		0
 
 		0x00000000
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rk3328.h b/arch/arm/include/asm/arch-rockchip/sdram_rk3328.h
index 51cc03fbce..97e766b39b 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_rk3328.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_rk3328.h
@@ -6,197 +6,14 @@
 
 #ifndef _ASM_ARCH_SDRAM_RK3328_H
 #define _ASM_ARCH_SDRAM_RK3328_H
+#include <asm/arch/sdram_common.h>
+#include <asm/arch/sdram_pctl_px30.h>
+#include <asm/arch/sdram_phy_px30.h>
+#include <asm/arch/sdram_phy_ron_rtt_px30.h>
 
 #define SR_IDLE		93
 #define PD_IDLE		13
 #define SDRAM_ADDR	0x00000000
-#define PATTERN		(0x5aa5f00f)
-
-/* ddr pctl registers define */
-#define DDR_PCTL2_MSTR			0x0
-#define DDR_PCTL2_STAT			0x4
-#define DDR_PCTL2_MSTR1			0x8
-#define DDR_PCTL2_MRCTRL0		0x10
-#define DDR_PCTL2_MRCTRL1		0x14
-#define DDR_PCTL2_MRSTAT		0x18
-#define DDR_PCTL2_MRCTRL2		0x1c
-#define DDR_PCTL2_DERATEEN		0x20
-#define DDR_PCTL2_DERATEINT		0x24
-#define DDR_PCTL2_PWRCTL		0x30
-#define DDR_PCTL2_PWRTMG		0x34
-#define DDR_PCTL2_HWLPCTL		0x38
-#define DDR_PCTL2_RFSHCTL0		0x50
-#define DDR_PCTL2_RFSHCTL1		0x54
-#define DDR_PCTL2_RFSHCTL2		0x58
-#define DDR_PCTL2_RFSHCTL4		0x5c
-#define DDR_PCTL2_RFSHCTL3		0x60
-#define DDR_PCTL2_RFSHTMG		0x64
-#define DDR_PCTL2_RFSHTMG1		0x68
-#define DDR_PCTL2_RFSHCTL5		0x6c
-#define DDR_PCTL2_INIT0			0xd0
-#define DDR_PCTL2_INIT1			0xd4
-#define DDR_PCTL2_INIT2			0xd8
-#define DDR_PCTL2_INIT3			0xdc
-#define DDR_PCTL2_INIT4			0xe0
-#define DDR_PCTL2_INIT5			0xe4
-#define DDR_PCTL2_INIT6			0xe8
-#define DDR_PCTL2_INIT7			0xec
-#define DDR_PCTL2_DIMMCTL		0xf0
-#define DDR_PCTL2_RANKCTL		0xf4
-#define DDR_PCTL2_CHCTL			0xfc
-#define DDR_PCTL2_DRAMTMG0		0x100
-#define DDR_PCTL2_DRAMTMG1		0x104
-#define DDR_PCTL2_DRAMTMG2		0x108
-#define DDR_PCTL2_DRAMTMG3		0x10c
-#define DDR_PCTL2_DRAMTMG4		0x110
-#define DDR_PCTL2_DRAMTMG5		0x114
-#define DDR_PCTL2_DRAMTMG6		0x118
-#define DDR_PCTL2_DRAMTMG7		0x11c
-#define DDR_PCTL2_DRAMTMG8		0x120
-#define DDR_PCTL2_DRAMTMG9		0x124
-#define DDR_PCTL2_DRAMTMG10		0x128
-#define DDR_PCTL2_DRAMTMG11		0x12c
-#define DDR_PCTL2_DRAMTMG12		0x130
-#define DDR_PCTL2_DRAMTMG13		0x134
-#define DDR_PCTL2_DRAMTMG14		0x138
-#define DDR_PCTL2_DRAMTMG15		0x13c
-#define DDR_PCTL2_DRAMTMG16		0x140
-#define DDR_PCTL2_ZQCTL0		0x180
-#define DDR_PCTL2_ZQCTL1		0x184
-#define DDR_PCTL2_ZQCTL2		0x188
-#define DDR_PCTL2_ZQSTAT		0x18c
-#define DDR_PCTL2_DFITMG0		0x190
-#define DDR_PCTL2_DFITMG1		0x194
-#define DDR_PCTL2_DFILPCFG0		0x198
-#define DDR_PCTL2_DFILPCFG1		0x19c
-#define DDR_PCTL2_DFIUPD0		0x1a0
-#define DDR_PCTL2_DFIUPD1		0x1a4
-#define DDR_PCTL2_DFIUPD2		0x1a8
-#define DDR_PCTL2_DFIMISC		0x1b0
-#define DDR_PCTL2_DFITMG2		0x1b4
-#define DDR_PCTL2_DFITMG3		0x1b8
-#define DDR_PCTL2_DFISTAT		0x1bc
-#define DDR_PCTL2_DBICTL		0x1c0
-#define DDR_PCTL2_ADDRMAP0		0x200
-#define DDR_PCTL2_ADDRMAP1		0x204
-#define DDR_PCTL2_ADDRMAP2		0x208
-#define DDR_PCTL2_ADDRMAP3		0x20c
-#define DDR_PCTL2_ADDRMAP4		0x210
-#define DDR_PCTL2_ADDRMAP5		0x214
-#define DDR_PCTL2_ADDRMAP6		0x218
-#define DDR_PCTL2_ADDRMAP7		0x21c
-#define DDR_PCTL2_ADDRMAP8		0x220
-#define DDR_PCTL2_ADDRMAP9		0x224
-#define DDR_PCTL2_ADDRMAP10		0x228
-#define DDR_PCTL2_ADDRMAP11		0x22c
-#define DDR_PCTL2_ODTCFG		0x240
-#define DDR_PCTL2_ODTMAP		0x244
-#define DDR_PCTL2_SCHED			0x250
-#define DDR_PCTL2_SCHED1		0x254
-#define DDR_PCTL2_PERFHPR1		0x25c
-#define DDR_PCTL2_PERFLPR1		0x264
-#define DDR_PCTL2_PERFWR1		0x26c
-#define DDR_PCTL2_DQMAP0		0x280
-#define DDR_PCTL2_DQMAP1		0x284
-#define DDR_PCTL2_DQMAP2		0x288
-#define DDR_PCTL2_DQMAP3		0x28c
-#define DDR_PCTL2_DQMAP4		0x290
-#define DDR_PCTL2_DQMAP5		0x294
-#define DDR_PCTL2_DBG0			0x300
-#define DDR_PCTL2_DBG1			0x304
-#define DDR_PCTL2_DBGCAM		0x308
-#define DDR_PCTL2_DBGCMD		0x30c
-#define DDR_PCTL2_DBGSTAT		0x310
-#define DDR_PCTL2_SWCTL			0x320
-#define DDR_PCTL2_SWSTAT		0x324
-#define DDR_PCTL2_POISONCFG		0x36c
-#define DDR_PCTL2_POISONSTAT		0x370
-#define DDR_PCTL2_ADVECCINDEX		0x374
-#define DDR_PCTL2_ADVECCSTAT		0x378
-#define DDR_PCTL2_PSTAT			0x3fc
-#define DDR_PCTL2_PCCFG			0x400
-#define DDR_PCTL2_PCFGR_n		0x404
-#define DDR_PCTL2_PCFGW_n		0x408
-#define DDR_PCTL2_PCTRL_n		0x490
-
-/* PCTL2_MRSTAT */
-#define MR_WR_BUSY			BIT(0)
-
-/* PHY_REG0 */
-#define DIGITAL_DERESET			BIT(3)
-#define ANALOG_DERESET			BIT(2)
-#define DIGITAL_RESET			(0 << 3)
-#define ANALOG_RESET			(0 << 2)
-
-/* PHY_REG1 */
-#define PHY_DDR2			(0)
-#define PHY_LPDDR2			(1)
-#define PHY_DDR3			(2)
-#define PHY_LPDDR3			(3)
-#define PHY_DDR4			(4)
-#define PHY_BL_4			(0 << 2)
-#define PHY_BL_8			BIT(2)
-
-/* PHY_REG2 */
-#define PHY_DTT_EN			BIT(0)
-#define PHY_DTT_DISB			(0 << 0)
-#define PHY_WRITE_LEVELING_EN		BIT(2)
-#define PHY_WRITE_LEVELING_DISB		(0 << 2)
-#define PHY_SELECT_CS0			(2)
-#define PHY_SELECT_CS1			(1)
-#define PHY_SELECT_CS0_1		(0)
-#define PHY_WRITE_LEVELING_SELECTCS(n)	(n << 6)
-#define PHY_DATA_TRAINING_SELECTCS(n)	(n << 4)
-
-#define PHY_DDR3_RON_RTT_DISABLE	(0)
-#define PHY_DDR3_RON_RTT_451ohm		(1)
-#define PHY_DDR3_RON_RTT_225ohm		(2)
-#define PHY_DDR3_RON_RTT_150ohm		(3)
-#define PHY_DDR3_RON_RTT_112ohm		(4)
-#define PHY_DDR3_RON_RTT_90ohm		(5)
-#define PHY_DDR3_RON_RTT_75ohm		(6)
-#define PHY_DDR3_RON_RTT_64ohm		(7)
-#define PHY_DDR3_RON_RTT_56ohm		(16)
-#define PHY_DDR3_RON_RTT_50ohm		(17)
-#define PHY_DDR3_RON_RTT_45ohm		(18)
-#define PHY_DDR3_RON_RTT_41ohm		(19)
-#define PHY_DDR3_RON_RTT_37ohm		(20)
-#define PHY_DDR3_RON_RTT_34ohm		(21)
-#define PHY_DDR3_RON_RTT_33ohm		(22)
-#define PHY_DDR3_RON_RTT_30ohm		(23)
-#define PHY_DDR3_RON_RTT_28ohm		(24)
-#define PHY_DDR3_RON_RTT_26ohm		(25)
-#define PHY_DDR3_RON_RTT_25ohm		(26)
-#define PHY_DDR3_RON_RTT_23ohm		(27)
-#define PHY_DDR3_RON_RTT_22ohm		(28)
-#define PHY_DDR3_RON_RTT_21ohm		(29)
-#define PHY_DDR3_RON_RTT_20ohm		(30)
-#define PHY_DDR3_RON_RTT_19ohm		(31)
-
-#define PHY_DDR4_LPDDR3_RON_RTT_DISABLE	(0)
-#define PHY_DDR4_LPDDR3_RON_RTT_480ohm	(1)
-#define PHY_DDR4_LPDDR3_RON_RTT_240ohm	(2)
-#define PHY_DDR4_LPDDR3_RON_RTT_160ohm	(3)
-#define PHY_DDR4_LPDDR3_RON_RTT_120ohm	(4)
-#define PHY_DDR4_LPDDR3_RON_RTT_96ohm	(5)
-#define PHY_DDR4_LPDDR3_RON_RTT_80ohm	(6)
-#define PHY_DDR4_LPDDR3_RON_RTT_68ohm	(7)
-#define PHY_DDR4_LPDDR3_RON_RTT_60ohm	(16)
-#define PHY_DDR4_LPDDR3_RON_RTT_53ohm	(17)
-#define PHY_DDR4_LPDDR3_RON_RTT_48ohm	(18)
-#define PHY_DDR4_LPDDR3_RON_RTT_43ohm	(19)
-#define PHY_DDR4_LPDDR3_RON_RTT_40ohm	(20)
-#define PHY_DDR4_LPDDR3_RON_RTT_37ohm	(21)
-#define PHY_DDR4_LPDDR3_RON_RTT_34ohm	(22)
-#define PHY_DDR4_LPDDR3_RON_RTT_32ohm	(23)
-#define PHY_DDR4_LPDDR3_RON_RTT_30ohm	(24)
-#define PHY_DDR4_LPDDR3_RON_RTT_28ohm	(25)
-#define PHY_DDR4_LPDDR3_RON_RTT_26ohm	(26)
-#define PHY_DDR4_LPDDR3_RON_RTT_25ohm	(27)
-#define PHY_DDR4_LPDDR3_RON_RTT_24ohm	(28)
-#define PHY_DDR4_LPDDR3_RON_RTT_22ohm	(29)
-#define PHY_DDR4_LPDDR3_RON_RTT_21ohm	(30)
-#define PHY_DDR4_LPDDR3_RON_RTT_20ohm	(31)
 
 /* noc registers define */
 #define DDRCONF				0x8
@@ -218,60 +35,17 @@
 #define DDR_GRF_STATUS_BASE	(0X100)
 #define DDR_GRF_STATUS(n)	(DDR_GRF_STATUS_BASE + (n) * 4)
 
-/*
- * sys_reg bitfield struct
- * [31]		row_3_4_ch1
- * [30]		row_3_4_ch0
- * [29:28]	chinfo
- * [27]		rank_ch1
- * [26:25]	col_ch1
- * [24]		bk_ch1
- * [23:22]	cs0_row_ch1
- * [21:20]	cs1_row_ch1
- * [19:18]	bw_ch1
- * [17:16]	dbw_ch1;
- * [15:13]	ddrtype
- * [12]		channelnum
- * [11]		rank_ch0
- * [10:9]	col_ch0
- * [8]		bk_ch0
- * [7:6]	cs0_row_ch0
- * [5:4]	cs1_row_ch0
- * [3:2]	bw_ch0
- * [1:0]	dbw_ch0
-*/
-#define SYS_REG_ENC_ROW_3_4(n)	((n) << 30)
-#define SYS_REG_DEC_ROW_3_4(n)	((n >> 30) & 0x1)
-#define SYS_REG_ENC_CHINFO()		(1 << 28)
-#define SYS_REG_ENC_DDRTYPE(n)		((n) << 13)
-#define SYS_REG_ENC_NUM_CH(n)		(((n) - 1) << 12)
-#define SYS_REG_DEC_NUM_CH(n)		(1 + ((n >> 12) & 0x1))
-#define SYS_REG_ENC_RANK(n)		(((n) - 1) << 11)
-#define SYS_REG_DEC_RANK(n)		(1 + ((n >> 11) & 0x1))
-#define SYS_REG_ENC_COL(n)		(((n) - 9) << 9)
-#define SYS_REG_DEC_COL(n)		(9 + ((n >> 9) & 0x3))
-#define SYS_REG_ENC_BK(n)		(((n) == 3 ? 0 : 1) << 8)
-#define SYS_REG_DEC_BK(n)		(3 - ((n >> 8) & 0x1))
-#define SYS_REG_ENC_CS0_ROW(n)		(((n) - 13) << 6)
-#define SYS_REG_DEC_CS0_ROW(n)		(13 + ((n >> 6) & 0x3))
-#define SYS_REG_ENC_CS1_ROW(n)		(((n) - 13) << 4)
-#define SYS_REG_DEC_CS1_ROW(n)		(13 + ((n >> 4) & 0x3))
-#define SYS_REG_ENC_BW(n)		((2 >> (n)) << 2)
-#define SYS_REG_DEC_BW(n)		(2 >> ((n >> 2) & 0x3))
-#define SYS_REG_ENC_DBW(n)		((2 >> (n)) << 0)
-#define SYS_REG_DEC_DBW(n)		(2 >> ((n >> 0) & 0x3))
-
 /* CRU_SOFTRESET_CON5 */
-#define ddrphy_psrstn_req(n)    (((0x1 << 15) << 16) | (n << 15))
-#define ddrphy_srstn_req(n)     (((0x1 << 14) << 16) | (n << 14))
-#define ddrctrl_psrstn_req(n)	(((0x1 << 13) << 16) | (n << 13))
-#define ddrctrl_srstn_req(n)	(((0x1 << 12) << 16) | (n << 12))
-#define ddrmsch_srstn_req(n)	(((0x1 << 11) << 16) | (n << 11))
-#define msch_srstn_req(n)		(((0x1 << 9) << 16) | (n << 9))
-#define dfimon_srstn_req(n)		(((0x1 << 8) << 16) | (n << 8))
-#define grf_ddr_srstn_req(n)	(((0x1 << 7) << 16) | (n << 7))
+#define ddrphy_psrstn_req(n)    (((0x1 << 15) << 16) | ((n) << 15))
+#define ddrphy_srstn_req(n)     (((0x1 << 14) << 16) | ((n) << 14))
+#define ddrctrl_psrstn_req(n)	(((0x1 << 13) << 16) | ((n) << 13))
+#define ddrctrl_srstn_req(n)	(((0x1 << 12) << 16) | ((n) << 12))
+#define ddrmsch_srstn_req(n)	(((0x1 << 11) << 16) | ((n) << 11))
+#define msch_srstn_req(n)		(((0x1 << 9) << 16) | ((n) << 9))
+#define dfimon_srstn_req(n)		(((0x1 << 8) << 16) | ((n) << 8))
+#define grf_ddr_srstn_req(n)	(((0x1 << 7) << 16) | ((n) << 7))
 /* CRU_SOFTRESET_CON9 */
-#define ddrctrl_asrstn_req(n)		(((0x1 << 9) << 16) | (n << 9))
+#define ddrctrl_asrstn_req(n)		(((0x1 << 9) << 16) | ((n) << 9))
 
 /* CRU register */
 #define CRU_PLL_CON(pll_id, n)	((pll_id)  * 0x20 + (n) * 4)
@@ -298,65 +72,13 @@
 #define POSTDIV2(n)   ((0x7 << (6 + 16)) | ((n) << 6))
 #define REFDIV(n)     ((0x3F << 16) | (n))
 
-union noc_ddrtiming {
-	u32 d32;
-	struct {
-		unsigned acttoact:6;
-		unsigned rdtomiss:6;
-		unsigned wrtomiss:6;
-		unsigned burstlen:3;
-		unsigned rdtowr:5;
-		unsigned wrtord:5;
-		unsigned bwratio:1;
-	} b;
-} NOC_TIMING_T;
-
-union noc_activate {
-	u32 d32;
-	struct {
-		unsigned rrd:4;
-		unsigned faw:6;
-		unsigned fawbank:1;
-		unsigned reserved1:21;
-	} b;
-};
-
-union noc_devtodev {
-	u32 d32;
-	struct {
-		unsigned busrdtord:2;
-		unsigned busrdtowr:2;
-		unsigned buswrtord:2;
-		unsigned reserved2:26;
-	} b;
-};
-
-union noc_ddr4timing {
-	u32 d32;
-	struct {
-		unsigned ccdl:3;
-		unsigned wrtordl:5;
-		unsigned rrdl:4;
-		unsigned reserved2:20;
-	} b;
-};
-
-union noc_ddrmode {
-	u32 d32;
-	struct {
-		unsigned autoprecharge:1;
-		unsigned bwratioextended:1;
-		unsigned reserved3:30;
-	} b;
-};
-
 u16 ddr_cfg_2_rbc[] = {
-	/***************************
-	* [5:4]  row(13+n)
-	* [3]    cs(0:0 cs, 1:2 cs)
-	* [2]  bank(0:0bank,1:8bank)
-	* [1:0]    col(11+n)
-	****************************/
+	/*
+	 * [5:4]  row(13+n)
+	 * [3]    cs(0:0 cs, 1:2 cs)
+	 * [2]  bank(0:0bank,1:8bank)
+	 * [1:0]    col(11+n)
+	 */
 	/* row,        cs,       bank,   col */
 	((3 << 4) | (0 << 3) | (1 << 2) | 0),
 	((3 << 4) | (0 << 3) | (1 << 2) | 1),
@@ -440,17 +162,65 @@ u32 addrmap[21][9] = {
 		0x07070707, 0x00000f07, 0x3f00}
 };
 
-struct rk3328_msch_timings {
-	union noc_ddrtiming ddrtiming;
-	union noc_ddrmode ddrmode;
-	u32 readlatency;
-	union noc_activate activate;
-	union noc_devtodev devtodev;
-	union noc_ddr4timing ddr4timing;
-	u32 agingx0;
+struct rk3328_ddr_grf_regs {
+	u32 ddr_grf_con[4];
+	u32 reserved[(0x100 - 0x10) / 4];
+	u32 ddr_grf_status[11];
+};
+
+union noc_ddrtiming {
+	u32 d32;
+	struct {
+		unsigned acttoact:6;
+		unsigned rdtomiss:6;
+		unsigned wrtomiss:6;
+		unsigned burstlen:3;
+		unsigned rdtowr:5;
+		unsigned wrtord:5;
+		unsigned bwratio:1;
+	} b;
+};
+
+union noc_activate {
+	u32 d32;
+	struct {
+		unsigned rrd:4;
+		unsigned faw:6;
+		unsigned fawbank:1;
+		unsigned reserved1:21;
+	} b;
+};
+
+union noc_devtodev {
+	u32 d32;
+	struct {
+		unsigned busrdtord:2;
+		unsigned busrdtowr:2;
+		unsigned buswrtord:2;
+		unsigned reserved2:26;
+	} b;
 };
 
-struct rk3328_msch_regs {
+union noc_ddr4timing {
+	u32 d32;
+	struct {
+		unsigned ccdl:3;
+		unsigned wrtordl:5;
+		unsigned rrdl:4;
+		unsigned reserved2:20;
+	} b;
+};
+
+union noc_ddrmode {
+	u32 d32;
+	struct {
+		unsigned autoprecharge:1;
+		unsigned bwratioextended:1;
+		unsigned reserved3:30;
+	} b;
+};
+
+struct msch_regs {
 	u32 coreid;
 	u32 revisionid;
 	u32 ddrconf;
@@ -469,58 +239,27 @@ struct rk3328_msch_regs {
 	u32 ddr4_timing;
 };
 
-struct rk3328_ddr_grf_regs {
-	u32 ddr_grf_con[4];
-	u32 reserved[(0x100 - 0x10) / 4];
-	u32 ddr_grf_status[11];
-};
-
-struct rk3328_ddr_pctl_regs {
-	u32 pctl[30][2];
-};
-
-struct rk3328_ddr_phy_regs {
-	u32 phy[5][2];
-};
-
-struct rk3328_ddr_skew {
-	u32 a0_a1_skew[15];
-	u32 cs0_dm0_skew[11];
-	u32 cs0_dm1_skew[11];
-	u32 cs0_dm2_skew[11];
-	u32 cs0_dm3_skew[11];
-	u32 cs1_dm0_skew[11];
-	u32 cs1_dm1_skew[11];
-	u32 cs1_dm2_skew[11];
-	u32 cs1_dm3_skew[11];
+struct sdram_msch_timings {
+	union noc_ddrtiming ddrtiming;
+	union noc_ddrmode ddrmode;
+	u32 readlatency;
+	union noc_activate activate;
+	union noc_devtodev devtodev;
+	union noc_ddr4timing ddr4timing;
+	u32 agingx0;
 };
 
 struct rk3328_sdram_channel {
-	unsigned int rank;
-	unsigned int col;
-	/* 3:8bank, 2:4bank */
-	unsigned int bk;
-	/* channel buswidth, 2:32bit, 1:16bit, 0:8bit */
-	unsigned int bw;
-	/* die buswidth, 2:32bit, 1:16bit, 0:8bit */
-	unsigned int dbw;
-	unsigned int row_3_4;
-	unsigned int cs0_row;
-	unsigned int cs1_row;
-	unsigned int ddrconfig;
-	struct rk3328_msch_timings noc_timings;
+	struct sdram_cap_info cap_info;
+	struct sdram_msch_timings noc_timings;
 };
 
 struct rk3328_sdram_params {
 	struct rk3328_sdram_channel ch;
-	unsigned int ddr_freq;
-	unsigned int dramtype;
-	unsigned int odt;
-	struct rk3328_ddr_pctl_regs pctl_regs;
-	struct rk3328_ddr_phy_regs phy_regs;
-	struct rk3328_ddr_skew skew;
+	struct sdram_base_params base;
+	struct ddr_pctl_regs pctl_regs;
+	struct ddr_phy_regs phy_regs;
+	struct ddr_phy_skew skew;
 };
 
-#define PHY_REG(base, n)		(base + 4 * (n))
-
 #endif
diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index 520dd79d6b..38043e4e1e 100644
--- a/configs/evb-rk3328_defconfig
+++ b/configs/evb-rk3328_defconfig
@@ -73,6 +73,7 @@ CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
+CONFIG_ROCKCHIP_SDRAM_COMMON=y
 CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF130000
diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index 3d230bda80..10854bc3cd 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -95,6 +95,7 @@ CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
+CONFIG_ROCKCHIP_SDRAM_COMMON=y
 CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF130000
diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index 307eda57eb..8ebc381a61 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -11,7 +11,7 @@ obj-$(CONFIG_ROCKCHIP_RK3128) = sdram_rk3128.o
 obj-$(CONFIG_ROCKCHIP_RK3188) = sdram_rk3188.o
 obj-$(CONFIG_ROCKCHIP_RK322X) = sdram_rk322x.o
 obj-$(CONFIG_ROCKCHIP_RK3288) = sdram_rk3288.o
-obj-$(CONFIG_ROCKCHIP_RK3328) = sdram_rk3328.o
+obj-$(CONFIG_ROCKCHIP_RK3328) += sdram_rk3328.o sdram_pctl_px30.o sdram_phy_px30.o
 obj-$(CONFIG_ROCKCHIP_RK3399) += sdram_rk3399.o
 obj-$(CONFIG_ROCKCHIP_PX30) += sdram_px30.o sdram_pctl_px30.o sdram_phy_px30.o
 obj-$(CONFIG_ROCKCHIP_PX30) += rockchip_sdram.o
diff --git a/drivers/ram/rockchip/sdram_rk3328.c b/drivers/ram/rockchip/sdram_rk3328.c
index 929f8bc248..266ab49103 100644
--- a/drivers/ram/rockchip/sdram_rk3328.c
+++ b/drivers/ram/rockchip/sdram_rk3328.c
@@ -23,11 +23,11 @@
 DECLARE_GLOBAL_DATA_PTR;
 struct dram_info {
 #ifdef CONFIG_TPL_BUILD
-	struct rk3328_ddr_pctl_regs *pctl;
-	struct rk3328_ddr_phy_regs *phy;
+	struct ddr_pctl_regs *pctl;
+	struct ddr_phy_regs *phy;
 	struct clk ddr_clk;
 	struct rk3328_cru *cru;
-	struct rk3328_msch_regs *msch;
+	struct msch_regs *msch;
 	struct rk3328_ddr_grf_regs *ddr_grf;
 #endif
 	struct ram_info info;
@@ -74,10 +74,11 @@ static void rkclk_ddr_reset(struct dram_info *dram,
 	writel(ddrctrl_asrstn_req(ctl_srstn), &dram->cru->softrst_con[9]);
 }
 
-static void rkclk_set_dpll(struct dram_info *dram, unsigned int mhz)
+static void rkclk_set_dpll(struct dram_info *dram, unsigned int hz)
 {
 	unsigned int refdiv, postdiv1, postdiv2, fbdiv;
 	int delay = 1000;
+	u32 mhz = hz / MHZ;
 
 	refdiv = 1;
 	if (mhz <= 300) {
@@ -125,52 +126,7 @@ static void rkclk_configure_ddr(struct dram_info *dram,
 	clrbits_le32(PHY_REG(phy_base, 0xef), 1 << 7);
 
 	/* for inno ddr phy need 2*freq */
-	rkclk_set_dpll(dram,  sdram_params->ddr_freq * 2);
-}
-
-static void phy_soft_reset(struct dram_info *dram)
-{
-	void __iomem *phy_base = dram->phy;
-
-	clrbits_le32(PHY_REG(phy_base, 0), 0x3 << 2);
-	udelay(1);
-	setbits_le32(PHY_REG(phy_base, 0), ANALOG_DERESET);
-	udelay(5);
-	setbits_le32(PHY_REG(phy_base, 0), DIGITAL_DERESET);
-	udelay(1);
-}
-
-static int pctl_cfg(struct dram_info *dram,
-		    struct rk3328_sdram_params *sdram_params)
-{
-	u32 i;
-	void __iomem *pctl_base = dram->pctl;
-
-	for (i = 0; sdram_params->pctl_regs.pctl[i][0] != 0xFFFFFFFF; i++) {
-		writel(sdram_params->pctl_regs.pctl[i][1],
-		       pctl_base + sdram_params->pctl_regs.pctl[i][0]);
-	}
-	clrsetbits_le32(pctl_base + DDR_PCTL2_PWRTMG,
-			(0xff << 16) | 0x1f,
-			((SR_IDLE & 0xff) << 16) | (PD_IDLE & 0x1f));
-	/*
-	 * dfi_lp_en_pd=1,dfi_lp_wakeup_pd=2
-	 * hw_lp_idle_x32=1
-	 */
-	if (sdram_params->dramtype == LPDDR3) {
-		setbits_le32(pctl_base + DDR_PCTL2_DFILPCFG0, 1);
-		clrsetbits_le32(pctl_base + DDR_PCTL2_DFILPCFG0,
-				0xf << 4,
-				2 << 4);
-	}
-	clrsetbits_le32(pctl_base + DDR_PCTL2_HWLPCTL,
-			0xfff << 16,
-			1 << 16);
-	/* disable zqcs */
-	setbits_le32(pctl_base + DDR_PCTL2_ZQCTL0, 1u << 31);
-	setbits_le32(pctl_base + 0x2000 + DDR_PCTL2_ZQCTL0, 1u << 31);
-
-	return 0;
+	rkclk_set_dpll(dram,  sdram_params->base.ddr_freq * MHZ * 2);
 }
 
 /* return ddrconfig value
@@ -179,20 +135,39 @@ static int pctl_cfg(struct dram_info *dram,
  * only support cs0_row >= cs1_row
  */
 static unsigned int calculate_ddrconfig(
-	struct rk3328_sdram_params *sdram_params)
+		struct rk3328_sdram_params *sdram_params)
 {
+	struct sdram_cap_info *cap_info = &sdram_params->ch.cap_info;
 	u32 cs, bw, die_bw, col, row, bank;
+	u32 cs1_row;
 	u32 i, tmp;
 	u32 ddrconf = -1;
 
-	cs = sdram_ch.rank;
-	bw = sdram_ch.bw;
-	die_bw = sdram_ch.dbw;
-	col = sdram_ch.col;
-	row = sdram_ch.cs0_row;
-	bank = sdram_ch.bk;
+	cs = cap_info->rank;
+	bw = cap_info->bw;
+	die_bw = cap_info->dbw;
+	col = cap_info->col;
+	row = cap_info->cs0_row;
+	cs1_row = cap_info->cs1_row;
+	bank = cap_info->bk;
+
+	if (sdram_params->base.dramtype == DDR4) {
+		/* when DDR_TEST, CS always at MSB position for easy test */
+		if (cs == 2 && row == cs1_row) {
+			/* include 2cs cap both 2^n  or both (2^n - 2^(n-2)) */
+			tmp = ((row - 13) << 3) | (1 << 2) | (bw & 0x2) |
+			      die_bw;
+			for (i = 17; i < 21; i++) {
+				if (((tmp & 0x7) ==
+				     (ddr4_cfg_2_rbc[i - 10] & 0x7)) &&
+				    ((tmp & 0x3c) <=
+				     (ddr4_cfg_2_rbc[i - 10] & 0x3c))) {
+					ddrconf = i;
+					goto out;
+				}
+			}
+		}
 
-	if (sdram_params->dramtype == DDR4) {
 		tmp = ((cs - 1) << 6) | ((row - 13) << 3) | (bw & 0x2) | die_bw;
 		for (i = 10; i < 17; i++) {
 			if (((tmp & 0x7) == (ddr4_cfg_2_rbc[i - 10] & 0x7)) &&
@@ -208,6 +183,18 @@ static unsigned int calculate_ddrconfig(
 			goto out;
 		}
 
+		/* when DDR_TEST, CS always at MSB position for easy test */
+		if (cs == 2 && row == cs1_row) {
+			/* include 2cs cap both 2^n  or both (2^n - 2^(n-2)) */
+			for (i = 5; i < 8; i++) {
+				if ((bw + col - 11) == (ddr_cfg_2_rbc[i] &
+							0x3)) {
+					ddrconf = i;
+					goto out;
+				}
+			}
+		}
+
 		tmp = ((row - 13) << 4) | (1 << 2) | ((bw + col - 11) << 0);
 		for (i = 0; i < 5; i++)
 			if (((tmp & 0xf) == (ddr_cfg_2_rbc[i] & 0xf)) &&
@@ -219,23 +206,11 @@ static unsigned int calculate_ddrconfig(
 
 out:
 	if (ddrconf > 20)
-		printf("calculate_ddrconfig error\n");
+		printf("calculate ddrconfig error\n");
 
 	return ddrconf;
 }
 
-/* n: Unit bytes */
-static void copy_to_reg(u32 *dest, u32 *src, u32 n)
-{
-	int i;
-
-	for (i = 0; i < n / sizeof(u32); i++) {
-		writel(*src, dest);
-		src++;
-		dest++;
-	}
-}
-
 /*******
  * calculate controller dram address map, and setting to register.
  * argument sdram_ch.ddrconf must be right value before
@@ -244,274 +219,42 @@ static void copy_to_reg(u32 *dest, u32 *src, u32 n)
 static void set_ctl_address_map(struct dram_info *dram,
 				struct rk3328_sdram_params *sdram_params)
 {
+	struct sdram_cap_info *cap_info = &sdram_params->ch.cap_info;
 	void __iomem *pctl_base = dram->pctl;
 
-	copy_to_reg((u32 *)(pctl_base + DDR_PCTL2_ADDRMAP0),
-		    &addrmap[sdram_ch.ddrconfig][0], 9 * 4);
-	if ((sdram_params->dramtype == LPDDR3) && (sdram_ch.row_3_4))
+	sdram_copy_to_reg((u32 *)(pctl_base + DDR_PCTL2_ADDRMAP0),
+			  &addrmap[cap_info->ddrconfig][0], 9 * 4);
+	if (sdram_params->base.dramtype == LPDDR3 && cap_info->row_3_4)
 		setbits_le32(pctl_base + DDR_PCTL2_ADDRMAP6, 1 << 31);
-	if ((sdram_params->dramtype == DDR4) && (sdram_ch.bw == 0x1))
+	if (sdram_params->base.dramtype == DDR4 && cap_info->bw == 0x1)
 		setbits_le32(pctl_base + DDR_PCTL2_PCCFG, 1 << 8);
 
-	if (sdram_ch.rank == 1)
+	if (cap_info->rank == 1)
 		clrsetbits_le32(pctl_base + DDR_PCTL2_ADDRMAP0, 0x1f, 0x1f);
 }
 
-static void phy_dll_bypass_set(struct dram_info *dram, u32 freq)
-{
-	u32 tmp;
-	void __iomem *phy_base = dram->phy;
-
-	setbits_le32(PHY_REG(phy_base, 0x13), 1 << 4);
-	clrbits_le32(PHY_REG(phy_base, 0x14), 1 << 3);
-	setbits_le32(PHY_REG(phy_base, 0x26), 1 << 4);
-	clrbits_le32(PHY_REG(phy_base, 0x27), 1 << 3);
-	setbits_le32(PHY_REG(phy_base, 0x36), 1 << 4);
-	clrbits_le32(PHY_REG(phy_base, 0x37), 1 << 3);
-	setbits_le32(PHY_REG(phy_base, 0x46), 1 << 4);
-	clrbits_le32(PHY_REG(phy_base, 0x47), 1 << 3);
-	setbits_le32(PHY_REG(phy_base, 0x56), 1 << 4);
-	clrbits_le32(PHY_REG(phy_base, 0x57), 1 << 3);
-
-	if (freq <= (400 * MHz))
-		/* DLL bypass */
-		setbits_le32(PHY_REG(phy_base, 0xa4), 0x1f);
-	else
-		clrbits_le32(PHY_REG(phy_base, 0xa4), 0x1f);
-	if (freq <= (680 * MHz))
-		tmp = 2;
-	else
-		tmp = 1;
-	writel(tmp, PHY_REG(phy_base, 0x28));
-	writel(tmp, PHY_REG(phy_base, 0x38));
-	writel(tmp, PHY_REG(phy_base, 0x48));
-	writel(tmp, PHY_REG(phy_base, 0x58));
-}
-
-static void set_ds_odt(struct dram_info *dram,
-		       struct rk3328_sdram_params *sdram_params)
-{
-	u32 cmd_drv, clk_drv, dqs_drv, dqs_odt;
-	void __iomem *phy_base = dram->phy;
-
-	if (sdram_params->dramtype == DDR3) {
-		cmd_drv = PHY_DDR3_RON_RTT_34ohm;
-		clk_drv = PHY_DDR3_RON_RTT_45ohm;
-		dqs_drv = PHY_DDR3_RON_RTT_34ohm;
-		dqs_odt = PHY_DDR3_RON_RTT_225ohm;
-	} else {
-		cmd_drv = PHY_DDR4_LPDDR3_RON_RTT_34ohm;
-		clk_drv = PHY_DDR4_LPDDR3_RON_RTT_43ohm;
-		dqs_drv = PHY_DDR4_LPDDR3_RON_RTT_34ohm;
-		dqs_odt = PHY_DDR4_LPDDR3_RON_RTT_240ohm;
-	}
-	/* DS */
-	writel(cmd_drv, PHY_REG(phy_base, 0x11));
-	clrsetbits_le32(PHY_REG(phy_base, 0x12), 0x1f << 3, cmd_drv << 3);
-	writel(clk_drv, PHY_REG(phy_base, 0x16));
-	writel(clk_drv, PHY_REG(phy_base, 0x18));
-	writel(dqs_drv, PHY_REG(phy_base, 0x20));
-	writel(dqs_drv, PHY_REG(phy_base, 0x2f));
-	writel(dqs_drv, PHY_REG(phy_base, 0x30));
-	writel(dqs_drv, PHY_REG(phy_base, 0x3f));
-	writel(dqs_drv, PHY_REG(phy_base, 0x40));
-	writel(dqs_drv, PHY_REG(phy_base, 0x4f));
-	writel(dqs_drv, PHY_REG(phy_base, 0x50));
-	writel(dqs_drv, PHY_REG(phy_base, 0x5f));
-	/* ODT */
-	writel(dqs_odt, PHY_REG(phy_base, 0x21));
-	writel(dqs_odt, PHY_REG(phy_base, 0x2e));
-	writel(dqs_odt, PHY_REG(phy_base, 0x31));
-	writel(dqs_odt, PHY_REG(phy_base, 0x3e));
-	writel(dqs_odt, PHY_REG(phy_base, 0x41));
-	writel(dqs_odt, PHY_REG(phy_base, 0x4e));
-	writel(dqs_odt, PHY_REG(phy_base, 0x51));
-	writel(dqs_odt, PHY_REG(phy_base, 0x5e));
-}
-
-static void phy_cfg(struct dram_info *dram,
-		    struct rk3328_sdram_params *sdram_params)
-{
-	u32 i;
-	void __iomem *phy_base = dram->phy;
-
-	phy_dll_bypass_set(dram, sdram_params->ddr_freq);
-	for (i = 0; sdram_params->phy_regs.phy[i][0] != 0xFFFFFFFF; i++) {
-		writel(sdram_params->phy_regs.phy[i][1],
-		       phy_base + sdram_params->phy_regs.phy[i][0]);
-	}
-	if (sdram_ch.bw == 2) {
-		clrsetbits_le32(PHY_REG(phy_base, 0), 0xf << 4, 0xf << 4);
-	} else {
-		clrsetbits_le32(PHY_REG(phy_base, 0), 0xf << 4, 3 << 4);
-		/* disable DQS2,DQS3 tx dll  for saving power */
-		clrbits_le32(PHY_REG(phy_base, 0x46), 1 << 3);
-		clrbits_le32(PHY_REG(phy_base, 0x56), 1 << 3);
-	}
-	set_ds_odt(dram, sdram_params);
-	/* deskew */
-	setbits_le32(PHY_REG(phy_base, 2), 8);
-	copy_to_reg(PHY_REG(phy_base, 0xb0),
-		    &sdram_params->skew.a0_a1_skew[0], 15 * 4);
-	copy_to_reg(PHY_REG(phy_base, 0x70),
-		    &sdram_params->skew.cs0_dm0_skew[0], 44 * 4);
-	copy_to_reg(PHY_REG(phy_base, 0xc0),
-		    &sdram_params->skew.cs0_dm1_skew[0], 44 * 4);
-}
-
-static int update_refresh_reg(struct dram_info *dram)
-{
-	void __iomem *pctl_base = dram->pctl;
-	u32 ret;
-
-	ret = readl(pctl_base + DDR_PCTL2_RFSHCTL3) ^ (1 << 1);
-	writel(ret, pctl_base + DDR_PCTL2_RFSHCTL3);
-
-	return 0;
-}
-
 static int data_training(struct dram_info *dram, u32 cs, u32 dramtype)
 {
-	u32 ret;
-	u32 dis_auto_zq = 0;
 	void __iomem *pctl_base = dram->pctl;
-	void __iomem *phy_base = dram->phy;
-
-	/* disable zqcs */
-	if (!(readl(pctl_base + DDR_PCTL2_ZQCTL0) &
-		(1ul << 31))) {
-		dis_auto_zq = 1;
-		setbits_le32(pctl_base + DDR_PCTL2_ZQCTL0, 1 << 31);
-	}
-	/* disable auto refresh */
-	setbits_le32(pctl_base + DDR_PCTL2_RFSHCTL3, 1);
-	update_refresh_reg(dram);
-
-	if (dramtype == DDR4) {
-		clrsetbits_le32(PHY_REG(phy_base, 0x29), 0x3, 0);
-		clrsetbits_le32(PHY_REG(phy_base, 0x39), 0x3, 0);
-		clrsetbits_le32(PHY_REG(phy_base, 0x49), 0x3, 0);
-		clrsetbits_le32(PHY_REG(phy_base, 0x59), 0x3, 0);
-	}
-	/* choose training cs */
-	clrsetbits_le32(PHY_REG(phy_base, 2), 0x33, (0x20 >> cs));
-	/* enable gate training */
-	clrsetbits_le32(PHY_REG(phy_base, 2), 0x33, (0x20 >> cs) | 1);
-	udelay(50);
-	ret = readl(PHY_REG(phy_base, 0xff));
-	/* disable gate training */
-	clrsetbits_le32(PHY_REG(phy_base, 2), 0x33, (0x20 >> cs) | 0);
-	/* restore zqcs */
-	if (dis_auto_zq)
-		clrbits_le32(pctl_base + DDR_PCTL2_ZQCTL0, 1 << 31);
-	/* restore auto refresh */
-	clrbits_le32(pctl_base + DDR_PCTL2_RFSHCTL3, 1);
-	update_refresh_reg(dram);
-
-	if (dramtype == DDR4) {
-		clrsetbits_le32(PHY_REG(phy_base, 0x29), 0x3, 0x2);
-		clrsetbits_le32(PHY_REG(phy_base, 0x39), 0x3, 0x2);
-		clrsetbits_le32(PHY_REG(phy_base, 0x49), 0x3, 0x2);
-		clrsetbits_le32(PHY_REG(phy_base, 0x59), 0x3, 0x2);
-	}
-
-	if (ret & 0x10) {
-		ret = -1;
-	} else {
-		ret = (ret & 0xf) ^ (readl(PHY_REG(phy_base, 0)) >> 4);
-		ret = (ret == 0) ? 0 : -1;
-	}
-	return ret;
-}
-
-/* rank = 1: cs0
- * rank = 2: cs1
- * rank = 3: cs0 & cs1
- * note: be careful of keep mr original val
- */
-static int write_mr(struct dram_info *dram, u32 rank, u32 mr_num, u32 arg,
-		    u32 dramtype)
-{
-	void __iomem *pctl_base = dram->pctl;
-
-	while (readl(pctl_base + DDR_PCTL2_MRSTAT) & MR_WR_BUSY)
-		continue;
-	if ((dramtype == DDR3) || (dramtype == DDR4)) {
-		writel((mr_num << 12) | (rank << 4) | (0 << 0),
-		       pctl_base + DDR_PCTL2_MRCTRL0);
-		writel(arg, pctl_base + DDR_PCTL2_MRCTRL1);
-	} else {
-		writel((rank << 4) | (0 << 0),
-		       pctl_base + DDR_PCTL2_MRCTRL0);
-		writel((mr_num << 8) | (arg & 0xff),
-		       pctl_base + DDR_PCTL2_MRCTRL1);
-	}
-
-	setbits_le32(pctl_base + DDR_PCTL2_MRCTRL0, 1u << 31);
-	while (readl(pctl_base + DDR_PCTL2_MRCTRL0) & (1u << 31))
-		continue;
-	while (readl(pctl_base + DDR_PCTL2_MRSTAT) & MR_WR_BUSY)
-		continue;
-
-	return 0;
-}
-
-/*
- * rank : 1:cs0, 2:cs1, 3:cs0&cs1
- * vrefrate: 4500: 45%,
- */
-static int write_vrefdq(struct dram_info *dram, u32 rank, u32 vrefrate,
-			u32 dramtype)
-{
-	u32 tccd_l, value;
 	u32 dis_auto_zq = 0;
-	void __iomem *pctl_base = dram->pctl;
+	u32 pwrctl;
+	u32 ret;
 
-	if ((dramtype != DDR4) || (vrefrate < 4500) ||
-	    (vrefrate > 9200))
-		return -1;
+	/* disable auto low-power */
+	pwrctl = readl(pctl_base + DDR_PCTL2_PWRCTL);
+	writel(0, pctl_base + DDR_PCTL2_PWRCTL);
 
-	tccd_l = (readl(pctl_base + DDR_PCTL2_DRAMTMG4) >> 16) & 0xf;
-	tccd_l = (tccd_l - 4) << 10;
+	dis_auto_zq = pctl_dis_zqcs_aref(dram->pctl);
 
-	if (vrefrate > 7500) {
-		/* range 1 */
-		value = ((vrefrate - 6000) / 65) | tccd_l;
-	} else {
-		/* range 2 */
-		value = ((vrefrate - 4500) / 65) | tccd_l | (1 << 6);
-	}
+	ret = phy_data_training(dram->phy, cs, dramtype);
 
-	/* disable zqcs */
-	if (!(readl(pctl_base + DDR_PCTL2_ZQCTL0) &
-		(1ul << 31))) {
-		dis_auto_zq = 1;
-		setbits_le32(pctl_base + DDR_PCTL2_ZQCTL0, 1 << 31);
-	}
-	/* disable auto refresh */
-	setbits_le32(pctl_base + DDR_PCTL2_RFSHCTL3, 1);
-	update_refresh_reg(dram);
-
-	/* enable vrefdq calibratin */
-	write_mr(dram, rank, 6, value | (1 << 7), dramtype);
-	udelay(1);/* tvrefdqe */
-	/* write vrefdq value */
-	write_mr(dram, rank, 6, value | (1 << 7), dramtype);
-	udelay(1);/* tvref_time */
-	write_mr(dram, rank, 6, value | (0 << 7), dramtype);
-	udelay(1);/* tvrefdqx */
-
-	/* restore zqcs */
-	if (dis_auto_zq)
-		clrbits_le32(pctl_base + DDR_PCTL2_ZQCTL0, 1 << 31);
-	/* restore auto refresh */
-	clrbits_le32(pctl_base + DDR_PCTL2_RFSHCTL3, 1);
-	update_refresh_reg(dram);
+	pctl_rest_zqcs_aref(dram->pctl, dis_auto_zq);
 
-	return 0;
-}
+	/* restore auto low-power */
+	writel(pwrctl, pctl_base + DDR_PCTL2_PWRCTL);
 
-#define _MAX_(x, y) (x > y ? x : y)
+	return ret;
+}
 
 static void rx_deskew_switch_adjust(struct dram_info *dram)
 {
@@ -520,7 +263,7 @@ static void rx_deskew_switch_adjust(struct dram_info *dram)
 	void __iomem *phy_base = dram->phy;
 
 	for (i = 0; i < 4; i++)
-		gate_val = _MAX_(readl(PHY_REG(phy_base, 0xfb + i)), gate_val);
+		gate_val = MAX(readl(PHY_REG(phy_base, 0xfb + i)), gate_val);
 
 	deskew_val = (gate_val >> 3) + 1;
 	deskew_val = (deskew_val > 0x1f) ? 0x1f : deskew_val;
@@ -541,40 +284,39 @@ static void set_ddrconfig(struct dram_info *dram, u32 ddrconfig)
 	writel(ddrconfig, &dram->msch->ddrconf);
 }
 
+static void sdram_msch_config(struct msch_regs *msch,
+		       struct sdram_msch_timings *noc_timings)
+{
+	writel(noc_timings->ddrtiming.d32, &msch->ddrtiming);
+
+	writel(noc_timings->ddrmode.d32, &msch->ddrmode);
+	writel(noc_timings->readlatency, &msch->readlatency);
+
+	writel(noc_timings->activate.d32, &msch->activate);
+	writel(noc_timings->devtodev.d32, &msch->devtodev);
+	writel(noc_timings->ddr4timing.d32, &msch->ddr4_timing);
+	writel(noc_timings->agingx0, &msch->aging0);
+	writel(noc_timings->agingx0, &msch->aging1);
+	writel(noc_timings->agingx0, &msch->aging2);
+	writel(noc_timings->agingx0, &msch->aging3);
+	writel(noc_timings->agingx0, &msch->aging4);
+	writel(noc_timings->agingx0, &msch->aging5);
+}
+
 static void dram_all_config(struct dram_info *dram,
 			    struct rk3328_sdram_params *sdram_params)
 {
-	u32 sys_reg = 0;
+	struct sdram_cap_info *cap_info = &sdram_params->ch.cap_info;
+	u32 sys_reg2 = 0;
+	u32 sys_reg3 = 0;
 
-	set_ddrconfig(dram, sdram_ch.ddrconfig);
-
-	sys_reg |= SYS_REG_ENC_DDRTYPE(sdram_params->dramtype);
-	sys_reg |= SYS_REG_ENC_ROW_3_4(sdram_ch.row_3_4);
-	sys_reg |= SYS_REG_ENC_RANK(sdram_ch.rank);
-	sys_reg |= SYS_REG_ENC_COL(sdram_ch.col);
-	sys_reg |= SYS_REG_ENC_BK(sdram_ch.bk);
-	sys_reg |= SYS_REG_ENC_CS0_ROW(sdram_ch.cs0_row);
-	if (sdram_ch.cs1_row)
-		sys_reg |= SYS_REG_ENC_CS1_ROW(sdram_ch.cs1_row);
-	sys_reg |= SYS_REG_ENC_BW(sdram_ch.bw);
-	sys_reg |= SYS_REG_ENC_DBW(sdram_ch.dbw);
-
-	writel(sys_reg, &dram->grf->os_reg[2]);
-
-	writel(sdram_ch.noc_timings.ddrtiming.d32, &dram->msch->ddrtiming);
-
-	writel(sdram_ch.noc_timings.ddrmode.d32, &dram->msch->ddrmode);
-	writel(sdram_ch.noc_timings.readlatency, &dram->msch->readlatency);
-
-	writel(sdram_ch.noc_timings.activate.d32, &dram->msch->activate);
-	writel(sdram_ch.noc_timings.devtodev.d32, &dram->msch->devtodev);
-	writel(sdram_ch.noc_timings.ddr4timing.d32, &dram->msch->ddr4_timing);
-	writel(sdram_ch.noc_timings.agingx0, &dram->msch->aging0);
-	writel(sdram_ch.noc_timings.agingx0, &dram->msch->aging1);
-	writel(sdram_ch.noc_timings.agingx0, &dram->msch->aging2);
-	writel(sdram_ch.noc_timings.agingx0, &dram->msch->aging3);
-	writel(sdram_ch.noc_timings.agingx0, &dram->msch->aging4);
-	writel(sdram_ch.noc_timings.agingx0, &dram->msch->aging5);
+	set_ddrconfig(dram, cap_info->ddrconfig);
+	sdram_org_config(cap_info, &sdram_params->base, &sys_reg2,
+			 &sys_reg3, 0);
+	writel(sys_reg2, &dram->grf->os_reg[2]);
+	writel(sys_reg3, &dram->grf->os_reg[3]);
+
+	sdram_msch_config(dram->msch, &sdram_ch.noc_timings);
 }
 
 static void enable_low_power(struct dram_info *dram,
@@ -602,6 +344,7 @@ static void enable_low_power(struct dram_info *dram,
 static int sdram_init(struct dram_info *dram,
 		      struct rk3328_sdram_params *sdram_params, u32 pre_init)
 {
+	struct sdram_cap_info *cap_info = &sdram_params->ch.cap_info;
 	void __iomem *pctl_base = dram->pctl;
 
 	rkclk_ddr_reset(dram, 1, 1, 1, 1);
@@ -613,30 +356,18 @@ static int sdram_init(struct dram_info *dram,
 	 */
 	rkclk_ddr_reset(dram, 1, 1, 1, 0);
 	rkclk_configure_ddr(dram, sdram_params);
-	if (pre_init == 0) {
-		switch (sdram_params->dramtype) {
-		case DDR3:
-			printf("DDR3\n");
-			break;
-		case DDR4:
-			printf("DDR4\n");
-			break;
-		case LPDDR3:
-		default:
-			printf("LPDDR3\n");
-			break;
-		}
-	}
+
 	/* release phy srst to provide clk to ctrl */
 	rkclk_ddr_reset(dram, 1, 1, 0, 0);
 	udelay(10);
-	phy_soft_reset(dram);
+	phy_soft_reset(dram->phy);
 	/* release ctrl presetn, and config ctl registers */
 	rkclk_ddr_reset(dram, 1, 0, 0, 0);
-	pctl_cfg(dram, sdram_params);
-	sdram_ch.ddrconfig = calculate_ddrconfig(sdram_params);
+	pctl_cfg(dram->pctl, &sdram_params->pctl_regs, SR_IDLE, PD_IDLE);
+	cap_info->ddrconfig = calculate_ddrconfig(sdram_params);
 	set_ctl_address_map(dram, sdram_params);
-	phy_cfg(dram, sdram_params);
+	phy_cfg(dram->phy, &sdram_params->phy_regs, &sdram_params->skew,
+		&sdram_params->base, cap_info->bw);
 
 	/* enable dfi_init_start to init phy after ctl srstn deassert */
 	setbits_le32(pctl_base + DDR_PCTL2_DFIMISC, (1 << 5) | (1 << 4));
@@ -646,13 +377,18 @@ static int sdram_init(struct dram_info *dram,
 		continue;
 
 	/* do ddr gate training */
-	if (data_training(dram, 0, sdram_params->dramtype) != 0) {
+	if (data_training(dram, 0, sdram_params->base.dramtype) != 0) {
+		printf("data training error\n");
+		return -1;
+	}
+	if (data_training(dram, 1, sdram_params->base.dramtype) != 0) {
 		printf("data training error\n");
 		return -1;
 	}
 
-	if (sdram_params->dramtype == DDR4)
-		write_vrefdq(dram, 0x3, 5670, sdram_params->dramtype);
+	if (sdram_params->base.dramtype == DDR4)
+		pctl_write_vrefdq(dram->pctl, 0x3, 5670,
+				  sdram_params->base.dramtype);
 
 	if (pre_init == 0) {
 		rx_deskew_switch_adjust(dram);
@@ -669,7 +405,7 @@ static u64 dram_detect_cap(struct dram_info *dram,
 			   struct rk3328_sdram_params *sdram_params,
 			   unsigned char channel)
 {
-	void __iomem *pctl_base = dram->pctl;
+	struct sdram_cap_info *cap_info = &sdram_params->ch.cap_info;
 
 	/*
 	 * for ddr3: ddrconf = 3
@@ -679,14 +415,10 @@ static u64 dram_detect_cap(struct dram_info *dram,
 	 */
 	u32 bk, bktmp;
 	u32 col, coltmp;
-	u32 row, rowtmp, row_3_4;
-	void __iomem *test_addr, *test_addr1;
-	u32 dbw;
+	u32 rowtmp;
 	u32 cs;
 	u32 bw = 1;
-	u64 cap = 0;
-	u32 dram_type = sdram_params->dramtype;
-	u32 pwrctl;
+	u32 dram_type = sdram_params->base.dramtype;
 
 	if (dram_type != DDR4) {
 		/* detect col and bk for ddr3/lpddr3 */
@@ -694,33 +426,10 @@ static u64 dram_detect_cap(struct dram_info *dram,
 		bktmp = 3;
 		rowtmp = 16;
 
-		for (col = coltmp; col >= 9; col -= 1) {
-			writel(0, SDRAM_ADDR);
-			test_addr = (void __iomem *)(SDRAM_ADDR +
-					(1ul << (col + bw - 1ul)));
-			writel(PATTERN, test_addr);
-			if ((readl(test_addr) == PATTERN) &&
-			    (readl(SDRAM_ADDR) == 0))
-				break;
-		}
-		if (col == 8) {
-			printf("col error\n");
+		if (sdram_detect_col(cap_info, coltmp) != 0)
 			goto cap_err;
-		}
-
-		test_addr = (void __iomem *)(SDRAM_ADDR +
-				(1ul << (coltmp + bktmp + bw - 1ul)));
-		writel(0, SDRAM_ADDR);
-		writel(PATTERN, test_addr);
-		if ((readl(test_addr) == PATTERN) &&
-		    (readl(SDRAM_ADDR) == 0))
-			bk = 3;
-		else
-			bk = 2;
-		if (dram_type == LPDDR3)
-			dbw = 2;
-		else
-			dbw = 1;
+		sdram_detect_bank(cap_info, coltmp, bktmp);
+		sdram_detect_dbw(cap_info, dram_type);
 	} else {
 		/* detect bg for ddr4 */
 		coltmp = 10;
@@ -729,178 +438,49 @@ static u64 dram_detect_cap(struct dram_info *dram,
 
 		col = 10;
 		bk = 2;
-		test_addr = (void __iomem *)(SDRAM_ADDR +
-				(1ul << (coltmp + bw + 1ul)));
-		writel(0, SDRAM_ADDR);
-		writel(PATTERN, test_addr);
-		if ((readl(test_addr) == PATTERN) &&
-		    (readl(SDRAM_ADDR) == 0))
-			dbw = 0;
-		else
-			dbw = 1;
+		cap_info->col = col;
+		cap_info->bk = bk;
+		sdram_detect_bg(cap_info, coltmp);
 	}
+
 	/* detect row */
-	for (row = rowtmp; row > 12; row--) {
-		writel(0, SDRAM_ADDR);
-		test_addr = (void __iomem *)(SDRAM_ADDR +
-				(1ul << (row + bktmp + coltmp + bw - 1ul)));
-		writel(PATTERN, test_addr);
-		if ((readl(test_addr) == PATTERN) &&
-		    (readl(SDRAM_ADDR) == 0))
-			break;
-	}
-	if (row == 12) {
-		printf("row error");
+	if (sdram_detect_row(cap_info, coltmp, bktmp, rowtmp) != 0)
 		goto cap_err;
-	}
-	/* detect row_3_4 */
-	test_addr = SDRAM_ADDR;
-	test_addr1 = (void __iomem *)(SDRAM_ADDR +
-			(0x3ul << (row + bktmp + coltmp + bw - 1ul - 1ul)));
-
-	writel(0, test_addr);
-	writel(PATTERN, test_addr1);
-	if ((readl(test_addr) == 0) &&
-	    (readl(test_addr1) == PATTERN))
-		row_3_4 = 0;
-	else
-		row_3_4 = 1;
 
-	/* disable auto low-power */
-	pwrctl = readl(pctl_base + DDR_PCTL2_PWRCTL);
-	writel(0, pctl_base + DDR_PCTL2_PWRCTL);
+	/* detect row_3_4 */
+	sdram_detect_row_3_4(cap_info, coltmp, bktmp);
 
-	/* bw and cs detect using phy read gate training */
+	/* bw and cs detect using data training */
 	if (data_training(dram, 1, dram_type) == 0)
 		cs = 1;
 	else
 		cs = 0;
+	cap_info->rank = cs + 1;
 
 	bw = 2;
+	cap_info->bw = bw;
 
-	/* restore auto low-power */
-	writel(pwrctl, pctl_base + DDR_PCTL2_PWRCTL);
-
-	sdram_ch.rank = cs + 1;
-	sdram_ch.col = col;
-	sdram_ch.bk = bk;
-	sdram_ch.dbw = dbw;
-	sdram_ch.bw = bw;
-	sdram_ch.cs0_row = row;
-	if (cs)
-		sdram_ch.cs1_row = row;
-	else
-		sdram_ch.cs1_row = 0;
-	sdram_ch.row_3_4 = row_3_4;
-
-	if (dram_type == DDR4)
-		cap = 1llu << (cs + row + bk + col + ((dbw == 0) ? 2 : 1) + bw);
-	else
-		cap = 1llu << (cs + row + bk + col + bw);
-
-	return cap;
-
-cap_err:
-	return 0;
-}
-
-static u32 remodify_sdram_params(struct rk3328_sdram_params *sdram_params)
-{
-	u32 tmp = 0, tmp_adr = 0, i;
-
-	for (i = 0; sdram_params->pctl_regs.pctl[i][0] != 0xFFFFFFFF; i++) {
-		if (sdram_params->pctl_regs.pctl[i][0] == 0) {
-			tmp = sdram_params->pctl_regs.pctl[i][1];/* MSTR */
-			tmp_adr = i;
-		}
-	}
-
-	tmp &= ~((3ul << 30) | (3ul << 24) | (3ul << 12));
-
-	switch (sdram_ch.dbw) {
-	case 2:
-		tmp |= (3ul << 30);
-		break;
-	case 1:
-		tmp |= (2ul << 30);
-		break;
-	case 0:
-	default:
-		tmp |= (1ul << 30);
-		break;
+	cap_info->cs0_high16bit_row = cap_info->cs0_row;
+	if (cs) {
+		cap_info->cs1_row = cap_info->cs0_row;
+		cap_info->cs1_high16bit_row = cap_info->cs0_row;
+	} else {
+		cap_info->cs1_row = 0;
+		cap_info->cs1_high16bit_row = 0;
 	}
 
-	if (sdram_ch.rank == 2)
-		tmp |= 3 << 24;
-	else
-		tmp |= 1 << 24;
-
-	tmp |= (2 - sdram_ch.bw) << 12;
-
-	sdram_params->pctl_regs.pctl[tmp_adr][1] = tmp;
-
-	if (sdram_ch.bw == 2)
-		sdram_ch.noc_timings.ddrtiming.b.bwratio = 0;
-	else
-		sdram_ch.noc_timings.ddrtiming.b.bwratio = 1;
-
 	return 0;
-}
-
-static int dram_detect_cs1_row(struct rk3328_sdram_params *sdram_params,
-			       unsigned char channel)
-{
-	u32 ret = 0;
-	u32 cs1_bit;
-	void __iomem *test_addr, *cs1_addr;
-	u32 row, bktmp, coltmp, bw;
-	u32 ddrconf = sdram_ch.ddrconfig;
-
-	if (sdram_ch.rank == 2) {
-		cs1_bit = addrmap[ddrconf][0] + 8;
-
-		if (cs1_bit > 31)
-			goto out;
-
-		cs1_addr = (void __iomem *)(1ul << cs1_bit);
-		if (cs1_bit < 20)
-			cs1_bit = 1;
-		else
-			cs1_bit = 0;
-
-		if (sdram_params->dramtype == DDR4) {
-			if (sdram_ch.dbw == 0)
-				bktmp = sdram_ch.bk + 2;
-			else
-				bktmp = sdram_ch.bk + 1;
-		} else {
-			bktmp = sdram_ch.bk;
-		}
-		bw = sdram_ch.bw;
-		coltmp = sdram_ch.col;
-
-		/* detect cs1 row */
-		for (row = sdram_ch.cs0_row; row > 12; row--) {
-			test_addr = (void __iomem *)(SDRAM_ADDR + cs1_addr +
-					(1ul << (row + cs1_bit + bktmp +
-					 coltmp + bw - 1ul)));
-			writel(0, SDRAM_ADDR + cs1_addr);
-			writel(PATTERN, test_addr);
-			if ((readl(test_addr) == PATTERN) &&
-			    (readl(SDRAM_ADDR + cs1_addr) == 0)) {
-				ret = row;
-				break;
-			}
-		}
-	}
-
-out:
-	return ret;
+cap_err:
+	return -1;
 }
 
 static int sdram_init_detect(struct dram_info *dram,
 			     struct rk3328_sdram_params *sdram_params)
 {
+	u32 sys_reg = 0;
+	u32 sys_reg3 = 0;
+	struct sdram_cap_info *cap_info = &sdram_params->ch.cap_info;
+
 	debug("Starting SDRAM initialization...\n");
 
 	memcpy(&sdram_ch, &sdram_params->ch,
@@ -910,13 +490,30 @@ static int sdram_init_detect(struct dram_info *dram,
 	dram_detect_cap(dram, sdram_params, 0);
 
 	/* modify bw, cs related timing */
-	remodify_sdram_params(sdram_params);
+	pctl_remodify_sdram_params(&sdram_params->pctl_regs, cap_info,
+				   sdram_params->base.dramtype);
+
+	if (cap_info->bw == 2)
+		sdram_ch.noc_timings.ddrtiming.b.bwratio = 0;
+	else
+		sdram_ch.noc_timings.ddrtiming.b.bwratio = 1;
+
 	/* reinit sdram by real dram cap */
 	sdram_init(dram, sdram_params, 0);
 
 	/* redetect cs1 row */
-	sdram_ch.cs1_row =
-		dram_detect_cs1_row(sdram_params, 0);
+	sdram_detect_cs1_row(cap_info, sdram_params->base.dramtype);
+	if (cap_info->cs1_row) {
+		sys_reg = readl(&dram->grf->os_reg[2]);
+		sys_reg3 = readl(&dram->grf->os_reg[3]);
+		SYS_REG_ENC_CS1_ROW(cap_info->cs1_row,
+				    sys_reg, sys_reg3, 0);
+		writel(sys_reg, &dram->grf->os_reg[2]);
+		writel(sys_reg3, &dram->grf->os_reg[3]);
+	}
+
+	sdram_print_ddr_info(&sdram_params->ch.cap_info,
+			     &sdram_params->base, 0);
 
 	return 0;
 }

commit bbf5a1e48355d369e2829a2e4ad06da092869697
Author: YouMin Chen <cym@rock-chips.com>
Date:   Tue Sep 24 16:18:30 2019 +0800

    driver: ram: rockchip: dram common code add RK3328 driver
    
    Change-Id: I956f9eb01ce3fc393901aab6bf1a40931114b1b0
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h b/arch/arm/include/asm/arch-rockchip/sdram_common.h
index b6e9f6de09..c3db223b38 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_common.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_common.h
@@ -6,9 +6,15 @@
 #ifndef _ASM_ARCH_SDRAM_SHARE_H
 #define _ASM_ARCH_SDRAM_SHARE_H
 
-#define MHZ		(1000000)
+#ifndef MHZ
+#define MHZ		(1000 * 1000)
+#endif
+
 #define PATTERN		(0x5aa5f00f)
 
+#define MIN(a, b)	(((a) > (b)) ? (b) : (a))
+#define MAX(a, b)	(((a) > (b)) ? (a) : (b))
+
 struct sdram_cap_info {
 	unsigned int rank;
 	unsigned int col;
diff --git a/drivers/ram/rockchip/sdram_phy_px30.c b/drivers/ram/rockchip/sdram_phy_px30.c
index 076c210f49..bcc049e6f6 100644
--- a/drivers/ram/rockchip/sdram_phy_px30.c
+++ b/drivers/ram/rockchip/sdram_phy_px30.c
@@ -14,6 +14,7 @@ static void sdram_phy_dll_bypass_set(void __iomem *phy_base, u32 freq)
 {
 	u32 tmp;
 	u32 i, j;
+	u32 dqs_dll_freq;
 
 	setbits_le32(PHY_REG(phy_base, 0x13), 1 << 4);
 	clrbits_le32(PHY_REG(phy_base, 0x14), 1 << 3);
@@ -23,13 +24,19 @@ static void sdram_phy_dll_bypass_set(void __iomem *phy_base, u32 freq)
 		clrbits_le32(PHY_REG(phy_base, j + 0x1), 1 << 3);
 	}
 
-	if (freq <= (400 * MHZ))
+	if (freq <= 400)
 		/* DLL bypass */
 		setbits_le32(PHY_REG(phy_base, 0xa4), 0x1f);
 	else
 		clrbits_le32(PHY_REG(phy_base, 0xa4), 0x1f);
 
-	if (freq <= (801 * MHZ))
+	#ifdef CONFIG_ROCKCHIP_RK3328
+	dqs_dll_freq = 680;
+	#else
+	dqs_dll_freq = 801;
+	#endif
+
+	if (freq <= dqs_dll_freq)
 		tmp = 2;
 	else
 		tmp = 1;
@@ -134,7 +141,9 @@ int phy_data_training(void __iomem *phy_base, u32 cs, u32 dramtype)
 	ret = readl(PHY_REG(phy_base, 0xff));
 	/* disable gate training */
 	clrsetbits_le32(PHY_REG(phy_base, 2), 0x33, (0x20 >> cs) | 0);
+	#ifndef CONFIG_ROCKCHIP_RK3328
 	clrbits_le32(PHY_REG(phy_base, 2), 0x30);
+	#endif
 
 	if (dramtype == DDR4) {
 		clrsetbits_le32(PHY_REG(phy_base, 0x29), 0x3, 0x2);
@@ -155,7 +164,6 @@ int phy_data_training(void __iomem *phy_base, u32 cs, u32 dramtype)
 		writel(odt_val, PHY_REG(phy_base, j + 0x1));
 		writel(odt_val, PHY_REG(phy_base, j + 0xe));
 	}
-
 	return ret;
 }
 

commit 5e6e8f2deb191f6a22b92687133c0c1f28fbeddd
Author: YouMin Chen <cym@rock-chips.com>
Date:   Wed Oct 9 17:04:19 2019 +0800

    driver: ram: rockchip: modify sdram common driver
    
    Remove the config about SDRAM_COMMON_CAP_DETECT,SDRAM_COMMON_OSREG,
    SDRAM_COMMON_MSCH_RK3399 and SDRAM_COMMON_MSCH_PX30.
    
    Change-Id: I17f2bdae585454a1d869ae9d967843d1d169381f
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h b/arch/arm/include/asm/arch-rockchip/sdram_common.h
index 09a3fde15f..b6e9f6de09 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_common.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_common.h
@@ -6,7 +6,8 @@
 #ifndef _ASM_ARCH_SDRAM_SHARE_H
 #define _ASM_ARCH_SDRAM_SHARE_H
 
-#define MHZ		1000000
+#define MHZ		(1000000)
+#define PATTERN		(0x5aa5f00f)
 
 struct sdram_cap_info {
 	unsigned int rank;
@@ -33,7 +34,6 @@ struct sdram_base_params {
 	unsigned int odt;
 };
 
-#ifdef CONFIG_SDRAM_COMMON_OSREG
 /*
  * sys_reg bitfield struct
  * [31]		row_3_4_ch1
@@ -107,157 +107,6 @@ struct sdram_base_params {
 void sdram_org_config(struct sdram_cap_info *cap_info,
 		      struct sdram_base_params *base,
 		      u32 *p_os_reg2, u32 *p_os_reg3, u32 channel);
-#endif
-
-#if defined(CONFIG_SDRAM_COMMON_MSCH_PX30) || \
-	defined(CONFIG_SDRAM_COMMON_MSCH_RK3399)
-union noc_ddrtiminga0 {
-	u32 d32;
-	struct {
-		unsigned acttoact : 6;
-		unsigned reserved0 : 2;
-		unsigned rdtomiss : 6;
-		unsigned reserved1 : 2;
-		unsigned wrtomiss : 6;
-		unsigned reserved2 : 2;
-		unsigned readlatency : 8;
-	} b;
-};
-
-union noc_ddrtimingb0 {
-	u32 d32;
-	struct {
-		unsigned rdtowr : 5;
-		unsigned reserved0 : 3;
-		unsigned wrtord : 5;
-		unsigned reserved1 : 3;
-		unsigned rrd : 4;
-		unsigned reserved2 : 4;
-		unsigned faw : 6;
-		unsigned reserved3 : 2;
-	} b;
-};
-
-union noc_ddrtimingc0 {
-	u32 d32;
-	struct {
-		unsigned burstpenalty : 4;
-		unsigned reserved0 : 4;
-		unsigned wrtomwr : 6;
-		unsigned reserved1 : 18;
-	} b;
-};
-
-union noc_devtodev0 {
-	u32 d32;
-	struct {
-		unsigned busrdtord : 3;
-		unsigned reserved0 : 1;
-		unsigned busrdtowr : 3;
-		unsigned reserved1 : 1;
-		unsigned buswrtord : 3;
-		unsigned reserved2 : 1;
-		unsigned buswrtowr : 3;
-		unsigned reserved3 : 17;
-	} b;
-};
-
-union noc_ddrmode {
-	u32 d32;
-	struct {
-		unsigned autoprecharge : 1;
-		unsigned bypassfiltering : 1;
-		unsigned fawbank : 1;
-		unsigned burstsize : 2;
-		unsigned mwrsize : 2;
-		unsigned reserved2 : 1;
-		unsigned forceorder : 8;
-		unsigned forceorderstate : 8;
-		unsigned reserved3 : 8;
-	} b;
-};
-
-union noc_ddr4timing {
-	u32 d32;
-	struct {
-		unsigned ccdl : 3;
-		unsigned wrtordl : 5;
-		unsigned rrdl : 4;
-		unsigned reserved1 : 20;
-	} b;
-};
-#endif
-
-#ifdef CONFIG_SDRAM_COMMON_MSCH_PX30
-struct msch_regs {
-	u32 coreid;
-	u32 revisionid;
-	u32 deviceconf;
-	u32 devicesize;
-	u32 ddrtiminga0;
-	u32 ddrtimingb0;
-	u32 ddrtimingc0;
-	u32 devtodev0;
-	u32 reserved1[(0x110 - 0x20) / 4];
-	u32 ddrmode;
-	u32 ddr4timing;
-	u32 reserved2[(0x1000 - 0x118) / 4];
-	u32 agingx0;
-	u32 reserved3[(0x1040 - 0x1004) / 4];
-	u32 aging0;
-	u32 aging1;
-	u32 aging2;
-	u32 aging3;
-};
-
-struct sdram_msch_timings {
-	union noc_ddrtiminga0 ddrtiminga0;
-	union noc_ddrtimingb0 ddrtimingb0;
-	union noc_ddrtimingc0 ddrtimingc0;
-	union noc_devtodev0 devtodev0;
-	union noc_ddrmode ddrmode;
-	union noc_ddr4timing ddr4timing;
-	u32 agingx0;
-};
-
-void sdram_msch_config(struct msch_regs *msch,
-		       struct sdram_msch_timings *noc_timings,
-		       struct sdram_cap_info *cap_info,
-		       struct sdram_base_params *base);
-#endif
-
-#ifdef CONFIG_SDRAM_COMMON_MSCH_RK3399
-struct msch_regs {
-	u32 coreid;
-	u32 revisionid;
-	u32 ddrconf;
-	u32 ddrsize;
-	union noc_ddrtiminga0 ddrtiminga0;
-	union noc_ddrtimingb0 ddrtimingb0;
-	union noc_ddrtimingc0 ddrtimingc0;
-	union noc_devtodev0 devtodev0;
-	u32 reserved0[(0x110 - 0x20) / 4];
-	union noc_ddrmode ddrmode;
-	u32 reserved1[(0x1000 - 0x114) / 4];
-	u32 agingx0;
-};
-
-struct sdram_msch_timings {
-	union noc_ddrtiminga0 ddrtiminga0;
-	union noc_ddrtimingb0 ddrtimingb0;
-	union noc_ddrtimingc0 ddrtimingc0;
-	union noc_devtodev0 devtodev0;
-	union noc_ddrmode ddrmode;
-	u32 agingx0;
-};
-
-void sdram_msch_config(struct msch_regs *msch,
-		       struct sdram_msch_timings *noc_timings);
-#endif
-
-#ifdef CONFIG_SDRAM_COMMON_CAP_DETECT
-
-#define PATTERN				(0x5aa5f00f)
 
 int sdram_detect_bw(struct sdram_cap_info *cap_info);
 int sdram_detect_cs(struct sdram_cap_info *cap_info);
@@ -274,7 +123,6 @@ int sdram_detect_row_3_4(struct sdram_cap_info *cap_info,
 			 u32 coltmp, u32 bktmp);
 int sdram_detect_high_row(struct sdram_cap_info *cap_info);
 int sdram_detect_cs1_row(struct sdram_cap_info *cap_info, u32 dram_type);
-#endif
 
 void sdram_print_dram_type(unsigned char dramtype);
 void sdram_print_ddr_info(struct sdram_cap_info *cap_info,
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_msch.h b/arch/arm/include/asm/arch-rockchip/sdram_msch.h
new file mode 100644
index 0000000000..cfb3d9cc86
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/sdram_msch.h
@@ -0,0 +1,85 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * Copyright (C) 2019 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _ASM_ARCH_SDRAM_MSCH_H
+#define _ASM_ARCH_SDRAM_MSCH_H
+
+union noc_ddrtiminga0 {
+	u32 d32;
+	struct {
+		unsigned acttoact : 6;
+		unsigned reserved0 : 2;
+		unsigned rdtomiss : 6;
+		unsigned reserved1 : 2;
+		unsigned wrtomiss : 6;
+		unsigned reserved2 : 2;
+		unsigned readlatency : 8;
+	} b;
+};
+
+union noc_ddrtimingb0 {
+	u32 d32;
+	struct {
+		unsigned rdtowr : 5;
+		unsigned reserved0 : 3;
+		unsigned wrtord : 5;
+		unsigned reserved1 : 3;
+		unsigned rrd : 4;
+		unsigned reserved2 : 4;
+		unsigned faw : 6;
+		unsigned reserved3 : 2;
+	} b;
+};
+
+union noc_ddrtimingc0 {
+	u32 d32;
+	struct {
+		unsigned burstpenalty : 4;
+		unsigned reserved0 : 4;
+		unsigned wrtomwr : 6;
+		unsigned reserved1 : 18;
+	} b;
+};
+
+union noc_devtodev0 {
+	u32 d32;
+	struct {
+		unsigned busrdtord : 3;
+		unsigned reserved0 : 1;
+		unsigned busrdtowr : 3;
+		unsigned reserved1 : 1;
+		unsigned buswrtord : 3;
+		unsigned reserved2 : 1;
+		unsigned buswrtowr : 3;
+		unsigned reserved3 : 17;
+	} b;
+};
+
+union noc_ddrmode {
+	u32 d32;
+	struct {
+		unsigned autoprecharge : 1;
+		unsigned bypassfiltering : 1;
+		unsigned fawbank : 1;
+		unsigned burstsize : 2;
+		unsigned mwrsize : 2;
+		unsigned reserved2 : 1;
+		unsigned forceorder : 8;
+		unsigned forceorderstate : 8;
+		unsigned reserved3 : 8;
+	} b;
+};
+
+union noc_ddr4timing {
+	u32 d32;
+	struct {
+		unsigned ccdl : 3;
+		unsigned wrtordl : 5;
+		unsigned rrdl : 4;
+		unsigned reserved1 : 20;
+	} b;
+};
+
+#endif
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_px30.h b/arch/arm/include/asm/arch-rockchip/sdram_px30.h
index 3588f4ceec..b10f420bbd 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_px30.h
@@ -6,6 +6,7 @@
 #ifndef _ASM_ARCH_SDRAM_PX30_H
 #define _ASM_ARCH_SDRAM_PX30_H
 #include <asm/arch/sdram_common.h>
+#include <asm/arch/sdram_msch.h>
 #include <asm/arch/sdram_pctl_px30.h>
 #include <asm/arch/sdram_phy_px30.h>
 #include <asm/arch/sdram_phy_ron_rtt_px30.h>
@@ -165,6 +166,37 @@ struct px30_ddr_grf_regs {
 	u32 ddr_grf_status[11];
 };
 
+struct msch_regs {
+	u32 coreid;
+	u32 revisionid;
+	u32 deviceconf;
+	u32 devicesize;
+	u32 ddrtiminga0;
+	u32 ddrtimingb0;
+	u32 ddrtimingc0;
+	u32 devtodev0;
+	u32 reserved1[(0x110 - 0x20) / 4];
+	u32 ddrmode;
+	u32 ddr4timing;
+	u32 reserved2[(0x1000 - 0x118) / 4];
+	u32 agingx0;
+	u32 reserved3[(0x1040 - 0x1004) / 4];
+	u32 aging0;
+	u32 aging1;
+	u32 aging2;
+	u32 aging3;
+};
+
+struct sdram_msch_timings {
+	union noc_ddrtiminga0 ddrtiminga0;
+	union noc_ddrtimingb0 ddrtimingb0;
+	union noc_ddrtimingc0 ddrtimingc0;
+	union noc_devtodev0 devtodev0;
+	union noc_ddrmode ddrmode;
+	union noc_ddr4timing ddr4timing;
+	u32 agingx0;
+};
+
 struct px30_sdram_channel {
 	struct sdram_cap_info cap_info;
 	struct sdram_msch_timings noc_timings;
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h b/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h
index f2bc376528..333b094157 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h
@@ -7,6 +7,7 @@
 #ifndef _ASM_ARCH_SDRAM_RK3399_H
 #define _ASM_ARCH_SDRAM_RK3399_H
 #include <asm/arch/sdram_common.h>
+#include <asm/arch/sdram_msch.h>
 
 struct rk3399_ddr_pctl_regs {
 	u32 denali_ctl[332];
@@ -41,6 +42,30 @@ struct rk3399_ddr_cic_regs {
 /* DENALI_CTL_274 */
 #define MEM_RST_VALID	1
 
+struct msch_regs {
+	u32 coreid;
+	u32 revisionid;
+	u32 ddrconf;
+	u32 ddrsize;
+	union noc_ddrtiminga0 ddrtiminga0;
+	union noc_ddrtimingb0 ddrtimingb0;
+	union noc_ddrtimingc0 ddrtimingc0;
+	union noc_devtodev0 devtodev0;
+	u32 reserved0[(0x110 - 0x20) / 4];
+	union noc_ddrmode ddrmode;
+	u32 reserved1[(0x1000 - 0x114) / 4];
+	u32 agingx0;
+};
+
+struct sdram_msch_timings {
+	union noc_ddrtiminga0 ddrtiminga0;
+	union noc_ddrtimingb0 ddrtimingb0;
+	union noc_ddrtimingc0 ddrtimingc0;
+	union noc_devtodev0 devtodev0;
+	union noc_ddrmode ddrmode;
+	u32 agingx0;
+};
+
 struct rk3399_sdram_channel {
 	struct sdram_cap_info cap_info;
 	struct sdram_msch_timings noc_timings;
diff --git a/configs/android6.0-rk3399_defconfig b/configs/android6.0-rk3399_defconfig
index b45169552f..19cd2e04f4 100644
--- a/configs/android6.0-rk3399_defconfig
+++ b/configs/android6.0-rk3399_defconfig
@@ -68,9 +68,6 @@ CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_ROCKCHIP_SDRAM_COMMON=y
-CONFIG_SDRAM_COMMON_CAP_DETECT=y
-CONFIG_SDRAM_COMMON_OSREG=y
-CONFIG_SDRAM_COMMON_MSCH_RK3399=y
 CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF1A0000
diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 9eccf06d30..7703a47fee 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -87,9 +87,6 @@ CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
 CONFIG_ROCKCHIP_SDRAM_COMMON=y
-CONFIG_SDRAM_COMMON_CAP_DETECT=y
-CONFIG_SDRAM_COMMON_OSREG=y
-CONFIG_SDRAM_COMMON_MSCH_PX30=y
 CONFIG_DM_RESET=y
 CONFIG_RKNAND=y
 CONFIG_BAUDRATE=1500000
diff --git a/configs/evb-rk3326_defconfig b/configs/evb-rk3326_defconfig
index 448e048283..0dfedb1cf9 100644
--- a/configs/evb-rk3326_defconfig
+++ b/configs/evb-rk3326_defconfig
@@ -84,9 +84,6 @@ CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
 CONFIG_ROCKCHIP_SDRAM_COMMON=y
-CONFIG_SDRAM_COMMON_CAP_DETECT=y
-CONFIG_SDRAM_COMMON_OSREG=y
-CONFIG_SDRAM_COMMON_MSCH_PX30=y
 CONFIG_DM_RESET=y
 CONFIG_RKNAND=y
 CONFIG_BAUDRATE=1500000
diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index c431b34bf8..c375f1f934 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -68,9 +68,6 @@ CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_ROCKCHIP_SDRAM_COMMON=y
-CONFIG_SDRAM_COMMON_CAP_DETECT=y
-CONFIG_SDRAM_COMMON_OSREG=y
-CONFIG_SDRAM_COMMON_MSCH_RK3399=y
 CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF1A0000
diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
index 75df4e314d..a80952fe02 100644
--- a/configs/firefly-rk3399_defconfig
+++ b/configs/firefly-rk3399_defconfig
@@ -68,9 +68,6 @@ CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_ROCKCHIP_SDRAM_COMMON=y
-CONFIG_SDRAM_COMMON_CAP_DETECT=y
-CONFIG_SDRAM_COMMON_OSREG=y
-CONFIG_SDRAM_COMMON_MSCH_RK3399=y
 CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF1A0000
diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig
index 52411bbdab..d537cb06d8 100644
--- a/configs/puma-rk3399_defconfig
+++ b/configs/puma-rk3399_defconfig
@@ -78,9 +78,6 @@ CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_ROCKCHIP_SDRAM_COMMON=y
-CONFIG_SDRAM_COMMON_CAP_DETECT=y
-CONFIG_SDRAM_COMMON_OSREG=y
-CONFIG_SDRAM_COMMON_MSCH_RK3399=y
 CONFIG_DEBUG_UART_BASE=0xFF180000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
diff --git a/configs/px30_defconfig b/configs/px30_defconfig
index 8fadf326d5..f101dd4fed 100644
--- a/configs/px30_defconfig
+++ b/configs/px30_defconfig
@@ -89,9 +89,6 @@ CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
 CONFIG_ROCKCHIP_SDRAM_COMMON=y
-CONFIG_SDRAM_COMMON_CAP_DETECT=y
-CONFIG_SDRAM_COMMON_OSREG=y
-CONFIG_SDRAM_COMMON_MSCH_PX30=y
 CONFIG_DM_RESET=y
 CONFIG_RKNAND=y
 CONFIG_BAUDRATE=1500000
diff --git a/configs/rk3326-aarch32_defconfig b/configs/rk3326-aarch32_defconfig
index 28a01788a5..023dbbc006 100644
--- a/configs/rk3326-aarch32_defconfig
+++ b/configs/rk3326-aarch32_defconfig
@@ -71,9 +71,6 @@ CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_TPL_RAM=y
 CONFIG_ROCKCHIP_SDRAM_COMMON=y
-CONFIG_SDRAM_COMMON_CAP_DETECT=y
-CONFIG_SDRAM_COMMON_OSREG=y
-CONFIG_SDRAM_COMMON_MSCH_PX30=y
 CONFIG_DM_RESET=y
 CONFIG_RKNAND=y
 CONFIG_BAUDRATE=1500000
diff --git a/configs/rk3326_defconfig b/configs/rk3326_defconfig
index 0c0a36db7c..0ab7324838 100644
--- a/configs/rk3326_defconfig
+++ b/configs/rk3326_defconfig
@@ -89,9 +89,6 @@ CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
 CONFIG_ROCKCHIP_SDRAM_COMMON=y
-CONFIG_SDRAM_COMMON_CAP_DETECT=y
-CONFIG_SDRAM_COMMON_OSREG=y
-CONFIG_SDRAM_COMMON_MSCH_PX30=y
 CONFIG_DM_RESET=y
 CONFIG_RKNAND=y
 CONFIG_BAUDRATE=1500000
diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
index bd2a6d9992..5275595ea5 100755
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -94,9 +94,6 @@ CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_ROCKCHIP_SDRAM_COMMON=y
-CONFIG_SDRAM_COMMON_CAP_DETECT=y
-CONFIG_SDRAM_COMMON_OSREG=y
-CONFIG_SDRAM_COMMON_MSCH_RK3399=y
 CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF1A0000
diff --git a/configs/rk3399pro_defconfig b/configs/rk3399pro_defconfig
index 4313b0d810..c921487f87 100644
--- a/configs/rk3399pro_defconfig
+++ b/configs/rk3399pro_defconfig
@@ -97,9 +97,6 @@ CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_ROCKCHIP_SDRAM_COMMON=y
-CONFIG_SDRAM_COMMON_CAP_DETECT=y
-CONFIG_SDRAM_COMMON_OSREG=y
-CONFIG_SDRAM_COMMON_MSCH_RK3399=y
 CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF1A0000
diff --git a/drivers/ram/rockchip/Kconfig b/drivers/ram/rockchip/Kconfig
index c312366626..3c74756351 100644
--- a/drivers/ram/rockchip/Kconfig
+++ b/drivers/ram/rockchip/Kconfig
@@ -8,19 +8,3 @@ config ROCKCHIP_SDRAM_COMMON
 	depends on TPL_RAM || SPL_RAM
 	help
 	  This enable sdram common driver
-
-config SDRAM_COMMON_CAP_DETECT
-	bool "Enable rockchip sdram capacity detect driver"
-	depends on ROCKCHIP_SDRAM_COMMON
-
-config SDRAM_COMMON_OSREG
-	bool "Enable rockchip sdram set sys os_reg driver"
-	depends on ROCKCHIP_SDRAM_COMMON
-
-config SDRAM_COMMON_MSCH_RK3399
-	bool "Enable rockchip sdram set RK3399 msch driver"
-	depends on ROCKCHIP_SDRAM_COMMON
-
-config SDRAM_COMMON_MSCH_PX30
-	bool "Enable rockchip sdram set PX30 msch driver"
-	depends on ROCKCHIP_SDRAM_COMMON
diff --git a/drivers/ram/rockchip/sdram_common.c b/drivers/ram/rockchip/sdram_common.c
index 5ec4a8bcb8..6fb119084a 100644
--- a/drivers/ram/rockchip/sdram_common.c
+++ b/drivers/ram/rockchip/sdram_common.c
@@ -137,7 +137,6 @@ void sdram_copy_to_reg(u32 *dest, const u32 *src, u32 n)
 	}
 }
 
-#ifdef CONFIG_SDRAM_COMMON_OSREG
 void sdram_org_config(struct sdram_cap_info *cap_info,
 		      struct sdram_base_params *base,
 		      u32 *p_os_reg2, u32 *p_os_reg3, u32 channel)
@@ -160,60 +159,7 @@ void sdram_org_config(struct sdram_cap_info *cap_info,
 	*p_os_reg3 |= SYS_REG_ENC_CS1_COL(cap_info->col, channel);
 	*p_os_reg3 |= SYS_REG_ENC_VERSION(DDR_SYS_REG_VERSION);
 }
-#endif
 
-#ifdef CONFIG_SDRAM_COMMON_MSCH_RK3399
-void sdram_msch_config(struct msch_regs *msch,
-		       struct sdram_msch_timings *noc_timings)
-{
-	writel(noc_timings->ddrtiminga0.d32,
-	       &msch->ddrtiminga0.d32);
-	writel(noc_timings->ddrtimingb0.d32,
-	       &msch->ddrtimingb0.d32);
-	writel(noc_timings->ddrtimingc0.d32,
-	       &msch->ddrtimingc0.d32);
-	writel(noc_timings->devtodev0.d32,
-	       &msch->devtodev0.d32);
-	writel(noc_timings->ddrmode.d32,
-	       &msch->ddrmode.d32);
-}
-#endif
-
-#ifdef CONFIG_SDRAM_COMMON_MSCH_PX30
-void sdram_msch_config(struct msch_regs *msch,
-		       struct sdram_msch_timings *noc_timings,
-		       struct sdram_cap_info *cap_info,
-		       struct sdram_base_params *base)
-{
-	u64 cs_cap[2];
-
-	cs_cap[0] = sdram_get_cs_cap(cap_info, 0, base->dramtype);
-	cs_cap[1] = sdram_get_cs_cap(cap_info, 1, base->dramtype);
-	writel(((((cs_cap[1] >> 20) / 64) & 0xff) << 8) |
-			(((cs_cap[0] >> 20) / 64) & 0xff),
-			&msch->devicesize);
-
-	writel(noc_timings->ddrtiminga0.d32,
-	       &msch->ddrtiminga0);
-	writel(noc_timings->ddrtimingb0.d32,
-	       &msch->ddrtimingb0);
-	writel(noc_timings->ddrtimingc0.d32,
-	       &msch->ddrtimingc0);
-	writel(noc_timings->devtodev0.d32,
-	       &msch->devtodev0);
-	writel(noc_timings->ddrmode.d32, &msch->ddrmode);
-	writel(noc_timings->ddr4timing.d32,
-	       &msch->ddr4timing);
-	writel(noc_timings->agingx0, &msch->agingx0);
-	writel(noc_timings->agingx0, &msch->aging0);
-	writel(noc_timings->agingx0, &msch->aging1);
-	writel(noc_timings->agingx0, &msch->aging2);
-	writel(noc_timings->agingx0, &msch->aging3);
-}
-
-#endif
-
-#ifdef CONFIG_SDRAM_COMMON_CAP_DETECT
 int sdram_detect_bw(struct sdram_cap_info *cap_info)
 {
 	return 0;
@@ -452,5 +398,4 @@ int sdram_detect_cs1_row(struct sdram_cap_info *cap_info, u32 dram_type)
 
 	return 0;
 }
-#endif
 
diff --git a/drivers/ram/rockchip/sdram_px30.c b/drivers/ram/rockchip/sdram_px30.c
index f0a4e27089..407c74fd98 100644
--- a/drivers/ram/rockchip/sdram_px30.c
+++ b/drivers/ram/rockchip/sdram_px30.c
@@ -301,6 +301,37 @@ static void set_ddrconfig(struct dram_info *dram, u32 ddrconfig)
 	rk_clrsetreg(&dram->grf->soc_noc_con[1], 0x3 << 14, 0 << 14);
 }
 
+static void sdram_msch_config(struct msch_regs *msch,
+			      struct sdram_msch_timings *noc_timings,
+			      struct sdram_cap_info *cap_info,
+			      struct sdram_base_params *base)
+{
+	u64 cs_cap[2];
+
+	cs_cap[0] = sdram_get_cs_cap(cap_info, 0, base->dramtype);
+	cs_cap[1] = sdram_get_cs_cap(cap_info, 1, base->dramtype);
+	writel(((((cs_cap[1] >> 20) / 64) & 0xff) << 8) |
+			(((cs_cap[0] >> 20) / 64) & 0xff),
+			&msch->devicesize);
+
+	writel(noc_timings->ddrtiminga0.d32,
+	       &msch->ddrtiminga0);
+	writel(noc_timings->ddrtimingb0.d32,
+	       &msch->ddrtimingb0);
+	writel(noc_timings->ddrtimingc0.d32,
+	       &msch->ddrtimingc0);
+	writel(noc_timings->devtodev0.d32,
+	       &msch->devtodev0);
+	writel(noc_timings->ddrmode.d32, &msch->ddrmode);
+	writel(noc_timings->ddr4timing.d32,
+	       &msch->ddr4timing);
+	writel(noc_timings->agingx0, &msch->agingx0);
+	writel(noc_timings->agingx0, &msch->aging0);
+	writel(noc_timings->agingx0, &msch->aging1);
+	writel(noc_timings->agingx0, &msch->aging2);
+	writel(noc_timings->agingx0, &msch->aging3);
+}
+
 static void dram_all_config(struct dram_info *dram,
 			    struct px30_sdram_params *sdram_params)
 {
diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c
index def2ba3f36..1c672d97f2 100644
--- a/drivers/ram/rockchip/sdram_rk3399.c
+++ b/drivers/ram/rockchip/sdram_rk3399.c
@@ -1795,6 +1795,21 @@ static void set_ddrconfig(const struct chan_info *chan,
 	       &ddr_msch_regs->ddrsize);
 }
 
+static void sdram_msch_config(struct msch_regs *msch,
+			      struct sdram_msch_timings *noc_timings)
+{
+	writel(noc_timings->ddrtiminga0.d32,
+	       &msch->ddrtiminga0.d32);
+	writel(noc_timings->ddrtimingb0.d32,
+	       &msch->ddrtimingb0.d32);
+	writel(noc_timings->ddrtimingc0.d32,
+	       &msch->ddrtimingc0.d32);
+	writel(noc_timings->devtodev0.d32,
+	       &msch->devtodev0.d32);
+	writel(noc_timings->ddrmode.d32,
+	       &msch->ddrmode.d32);
+}
+
 static void dram_all_config(struct dram_info *dram,
 			    struct rk3399_sdram_params *sdram_params)
 {

commit 5685f66a36b1075ddd2059231521de610aa4b626
Author: YouMin Chen <cym@rock-chips.com>
Date:   Thu Mar 7 18:01:18 2019 +0800

    driver: ram: rockchip: rename sdram_share.* to sdram_common.*
    
    Change-Id: I8dddb0269764f748d3ae277b2cb04f86bb015ba2
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_share.h b/arch/arm/include/asm/arch-rockchip/sdram_common.h
similarity index 100%
rename from arch/arm/include/asm/arch-rockchip/sdram_share.h
rename to arch/arm/include/asm/arch-rockchip/sdram_common.h
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_pctl_px30.h b/arch/arm/include/asm/arch-rockchip/sdram_pctl_px30.h
index 9f493be489..b085652f72 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_pctl_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_pctl_px30.h
@@ -5,7 +5,7 @@
 
 #ifndef _ASM_ARCH_SDRAM_PCTL_PX30_H
 #define _ASM_ARCH_SDRAM_PCTL_PX30_H
-#include <asm/arch/sdram_share.h>
+#include <asm/arch/sdram_common.h>
 
 struct ddr_pctl_regs {
 	u32 pctl[30][2];
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_phy_px30.h b/arch/arm/include/asm/arch-rockchip/sdram_phy_px30.h
index 249be58f7e..4637a895b8 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_phy_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_phy_px30.h
@@ -5,7 +5,7 @@
 
 #ifndef _ASM_ARCH_SDRAM_PHY_PX30_H
 #define _ASM_ARCH_SDRAM_PHY_PX30_H
-#include <asm/arch/sdram_share.h>
+#include <asm/arch/sdram_common.h>
 #include <asm/arch/sdram_phy_ron_rtt_px30.h>
 
 struct ddr_phy_regs {
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_px30.h b/arch/arm/include/asm/arch-rockchip/sdram_px30.h
index dbed792f0d..3588f4ceec 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_px30.h
@@ -5,7 +5,7 @@
 
 #ifndef _ASM_ARCH_SDRAM_PX30_H
 #define _ASM_ARCH_SDRAM_PX30_H
-#include <asm/arch/sdram_share.h>
+#include <asm/arch/sdram_common.h>
 #include <asm/arch/sdram_pctl_px30.h>
 #include <asm/arch/sdram_phy_px30.h>
 #include <asm/arch/sdram_phy_ron_rtt_px30.h>
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h b/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h
index 9f608d72ad..f2bc376528 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h
@@ -6,7 +6,7 @@
 
 #ifndef _ASM_ARCH_SDRAM_RK3399_H
 #define _ASM_ARCH_SDRAM_RK3399_H
-#include <asm/arch/sdram_share.h>
+#include <asm/arch/sdram_common.h>
 
 struct rk3399_ddr_pctl_regs {
 	u32 denali_ctl[332];
diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index db46f5680f..307eda57eb 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -4,7 +4,7 @@
 # SPDX-License-Identifier:      GPL-2.0+
 #
 
-obj-$(CONFIG_ROCKCHIP_SDRAM_COMMON) += sdram_share.o
+obj-$(CONFIG_ROCKCHIP_SDRAM_COMMON) += sdram_common.o
 obj-$(CONFIG_ROCKCHIP_RK3368) = dmc-rk3368.o
 obj-$(CONFIG_ROCKCHIP_RV1108) = sdram_rv1108_pctl_phy.o sdram_rv1108.o
 obj-$(CONFIG_ROCKCHIP_RK3128) = sdram_rk3128.o
diff --git a/drivers/ram/rockchip/sdram_share.c b/drivers/ram/rockchip/sdram_common.c
similarity index 99%
rename from drivers/ram/rockchip/sdram_share.c
rename to drivers/ram/rockchip/sdram_common.c
index a366350ff8..5ec4a8bcb8 100644
--- a/drivers/ram/rockchip/sdram_share.c
+++ b/drivers/ram/rockchip/sdram_common.c
@@ -8,7 +8,7 @@
 #include <ram.h>
 #include <asm/io.h>
 #include <asm/arch/sdram.h>
-#include <asm/arch/sdram_share.h>
+#include <asm/arch/sdram_common.h>
 
 void sdram_print_dram_type(unsigned char dramtype)
 {
diff --git a/drivers/ram/rockchip/sdram_phy_px30.c b/drivers/ram/rockchip/sdram_phy_px30.c
index d185e67b8c..076c210f49 100644
--- a/drivers/ram/rockchip/sdram_phy_px30.c
+++ b/drivers/ram/rockchip/sdram_phy_px30.c
@@ -7,7 +7,7 @@
 #include <ram.h>
 #include <asm/io.h>
 #include <asm/arch/sdram.h>
-#include <asm/arch/sdram_share.h>
+#include <asm/arch/sdram_common.h>
 #include <asm/arch/sdram_phy_px30.h>
 
 static void sdram_phy_dll_bypass_set(void __iomem *phy_base, u32 freq)

commit e1f97ec39adccac9463624bcf83443c432cd1497
Author: YouMin Chen <cym@rock-chips.com>
Date:   Thu Mar 7 17:31:43 2019 +0800

    driver: ram: rockchip: rename sdram_common.* to sdram.*
    
    Change-Id: Idc6edee2906297d3ab681a36dc58c79283c0eb57
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h b/arch/arm/include/asm/arch-rockchip/sdram.h
similarity index 97%
rename from arch/arm/include/asm/arch-rockchip/sdram_common.h
rename to arch/arm/include/asm/arch-rockchip/sdram.h
index 0d2c29916b..11d61533e1 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_common.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram.h
@@ -4,8 +4,8 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 
-#ifndef _ASM_ARCH_SDRAM_COMMON_H
-#define _ASM_ARCH_SDRAM_COMMON_H
+#ifndef _ASM_ARCH_SDRAM_H
+#define _ASM_ARCH_SDRAM_H
 
 enum {
 	DDR4 = 0,
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 946f32f1a1..e09b1e8be4 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -35,7 +35,7 @@ obj-$(CONFIG_ROCKCHIP_DEBUGGER) += rockchip_debugger.o
 endif
 
 obj-$(CONFIG_$(SPL_TPL_)RAM) += param.o
-obj-$(CONFIG_$(SPL_TPL_)RAM) += sdram_common.o
+obj-$(CONFIG_$(SPL_TPL_)RAM) += sdram.o
 
 obj-$(CONFIG_ROCKCHIP_PX30) += px30/
 obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036/
diff --git a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
index 55abfd2166..d00714ff1a 100644
--- a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
+++ b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
@@ -770,7 +770,7 @@ int sdram_init(void)
 #if !CONFIG_IS_ENABLED(RAM)
 /*
  * When CONFIG_RAM is enabled, the dram_init() function is implemented
- * in sdram_common.c.
+ * in sdram.c.
  */
 int dram_init(void)
 {
diff --git a/arch/arm/mach-rockchip/rk3066/sdram_rk3066.c b/arch/arm/mach-rockchip/rk3066/sdram_rk3066.c
index b38e32efe5..4367ad86d4 100644
--- a/arch/arm/mach-rockchip/rk3066/sdram_rk3066.c
+++ b/arch/arm/mach-rockchip/rk3066/sdram_rk3066.c
@@ -22,7 +22,7 @@
 #include <asm/arch/grf_rk3066.h>
 #include <asm/arch/pmu_rk3188.h>
 #include <asm/arch/sdram_rk3288.h>
-#include <asm/arch/sdram_common.h>
+#include <asm/arch/sdram.h>
 #include <linux/err.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/arm/mach-rockchip/rv1108/rv1108.c b/arch/arm/mach-rockchip/rv1108/rv1108.c
index e88f27f5d9..cd81758702 100644
--- a/arch/arm/mach-rockchip/rv1108/rv1108.c
+++ b/arch/arm/mach-rockchip/rv1108/rv1108.c
@@ -7,7 +7,7 @@
 #include <common.h>
 #include <asm/io.h>
 #include <ram.h>
-#include <asm/arch/sdram_common.h>
+#include <asm/arch/sdram.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/grf_rv1108.h>
 
diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram.c
similarity index 99%
rename from arch/arm/mach-rockchip/sdram_common.c
rename to arch/arm/mach-rockchip/sdram.c
index f71aacc9cd..53e356ce60 100644
--- a/arch/arm/mach-rockchip/sdram_common.c
+++ b/arch/arm/mach-rockchip/sdram.c
@@ -11,7 +11,7 @@
 #include <asm/io.h>
 #include <asm/arch/param.h>
 #include <asm/arch/rk_atags.h>
-#include <asm/arch/sdram_common.h>
+#include <asm/arch/sdram.h>
 #include <dm/uclass-internal.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index 042e53ec2f..53fe711cb2 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -13,7 +13,7 @@
 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
 #include <asm/arch/rk_atags.h>
 #endif
-#include <asm/arch/sdram_common.h>
+#include <asm/arch/sdram.h>
 #include <asm/arch-rockchip/sys_proto.h>
 #include <asm/io.h>
 
diff --git a/cmd/ddr_tool/ddr_test_px30.S b/cmd/ddr_tool/ddr_test_px30.S
index a6c7352e3a..a6e9854df8 100644
--- a/cmd/ddr_tool/ddr_test_px30.S
+++ b/cmd/ddr_tool/ddr_test_px30.S
@@ -1813,7 +1813,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.file 35 "include/iomux.h"
 	.file 36 "include/log.h"
 	.file 37 "include/stdio.h"
-	.file 38 "./arch/arm/include/asm/arch/sdram_common.h"
+	.file 38 "./arch/arm/include/asm/arch/sdram.h"
 	.file 39 "cmd/ddr_tool/../memtester/io_map.h"
 	.file 40 "cmd/ddr_tool/../memtester/ddr_tester_common.h"
 	.file 41 "include/vsprintf.h"
diff --git a/cmd/ddr_tool/ddr_test_rk1808.S b/cmd/ddr_tool/ddr_test_rk1808.S
index 6e8e95f038..156f79f587 100644
--- a/cmd/ddr_tool/ddr_test_rk1808.S
+++ b/cmd/ddr_tool/ddr_test_rk1808.S
@@ -1603,7 +1603,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.file 33 "include/console.h"
 	.file 34 "include/log.h"
 	.file 35 "include/stdio.h"
-	.file 36 "./arch/arm/include/asm/arch/sdram_common.h"
+	.file 36 "./arch/arm/include/asm/arch/sdram.h"
 	.file 37 "cmd/ddr_tool/../memtester/io_map.h"
 	.file 38 "cmd/ddr_tool/../memtester/ddr_tester_common.h"
 	.file 39 "include/vsprintf.h"
diff --git a/cmd/ddr_tool/ddr_test_rk3328.S b/cmd/ddr_tool/ddr_test_rk3328.S
index a6c7352e3a..a6e9854df8 100644
--- a/cmd/ddr_tool/ddr_test_rk3328.S
+++ b/cmd/ddr_tool/ddr_test_rk3328.S
@@ -1813,7 +1813,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.file 35 "include/iomux.h"
 	.file 36 "include/log.h"
 	.file 37 "include/stdio.h"
-	.file 38 "./arch/arm/include/asm/arch/sdram_common.h"
+	.file 38 "./arch/arm/include/asm/arch/sdram.h"
 	.file 39 "cmd/ddr_tool/../memtester/io_map.h"
 	.file 40 "cmd/ddr_tool/../memtester/ddr_tester_common.h"
 	.file 41 "include/vsprintf.h"
diff --git a/cmd/memtester/io_map.c b/cmd/memtester/io_map.c
index ed45a0137e..252576b2ba 100644
--- a/cmd/memtester/io_map.c
+++ b/cmd/memtester/io_map.c
@@ -4,7 +4,7 @@
  */
 
 #include <common.h>
-#include <asm/arch/sdram_common.h>
+#include <asm/arch/sdram.h>
 #include "io_map.h"
 
 #define IO_TYPE_1_1_16		0	/* up1 1:1 mode 16bit */
diff --git a/drivers/ram/rockchip/dmc-rk3368.c b/drivers/ram/rockchip/dmc-rk3368.c
index cb1a88cb82..47b92fe8f0 100644
--- a/drivers/ram/rockchip/dmc-rk3368.c
+++ b/drivers/ram/rockchip/dmc-rk3368.c
@@ -18,7 +18,7 @@
 #include <asm/arch/grf_rk3368.h>
 #include <asm/arch/ddr_rk3368.h>
 #include <asm/arch/sdram_rk3288.h>
-#include <asm/arch/sdram_common.h>
+#include <asm/arch/sdram.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/ram/rockchip/rockchip_sdram.c b/drivers/ram/rockchip/rockchip_sdram.c
index 437e675e30..a2ce76ed13 100644
--- a/drivers/ram/rockchip/rockchip_sdram.c
+++ b/drivers/ram/rockchip/rockchip_sdram.c
@@ -14,7 +14,7 @@
 #include <asm/arch/grf_rk3036.h>
 #include <asm/arch/grf_rk3308.h>
 #include <asm/arch/rockchip_dmc.h>
-#include <asm/arch/sdram_common.h>
+#include <asm/arch/sdram.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/ram/rockchip/sdram_pctl_px30.c b/drivers/ram/rockchip/sdram_pctl_px30.c
index 247d9317b3..ff87239ce8 100644
--- a/drivers/ram/rockchip/sdram_pctl_px30.c
+++ b/drivers/ram/rockchip/sdram_pctl_px30.c
@@ -6,7 +6,7 @@
 #include <common.h>
 #include <ram.h>
 #include <asm/io.h>
-#include <asm/arch/sdram_common.h>
+#include <asm/arch/sdram.h>
 #include <asm/arch/sdram_pctl_px30.h>
 
 /*
diff --git a/drivers/ram/rockchip/sdram_phy_px30.c b/drivers/ram/rockchip/sdram_phy_px30.c
index ad139d8107..d185e67b8c 100644
--- a/drivers/ram/rockchip/sdram_phy_px30.c
+++ b/drivers/ram/rockchip/sdram_phy_px30.c
@@ -6,7 +6,7 @@
 #include <common.h>
 #include <ram.h>
 #include <asm/io.h>
-#include <asm/arch/sdram_common.h>
+#include <asm/arch/sdram.h>
 #include <asm/arch/sdram_share.h>
 #include <asm/arch/sdram_phy_px30.h>
 
diff --git a/drivers/ram/rockchip/sdram_px30.c b/drivers/ram/rockchip/sdram_px30.c
index c3f56a18be..f0a4e27089 100644
--- a/drivers/ram/rockchip/sdram_px30.c
+++ b/drivers/ram/rockchip/sdram_px30.c
@@ -13,7 +13,7 @@
 #include <asm/arch/cru_px30.h>
 #include <asm/arch/grf_px30.h>
 #include <asm/arch/hardware.h>
-#include <asm/arch/sdram_common.h>
+#include <asm/arch/sdram.h>
 #include <asm/arch/sdram_px30.h>
 
 /*
diff --git a/drivers/ram/rockchip/sdram_rk3128.c b/drivers/ram/rockchip/sdram_rk3128.c
index 68b0830884..85015d4bdd 100644
--- a/drivers/ram/rockchip/sdram_rk3128.c
+++ b/drivers/ram/rockchip/sdram_rk3128.c
@@ -10,7 +10,7 @@
 #include <syscon.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/grf_rk3128.h>
-#include <asm/arch/sdram_common.h>
+#include <asm/arch/sdram.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 struct dram_info {
diff --git a/drivers/ram/rockchip/sdram_rk3188.c b/drivers/ram/rockchip/sdram_rk3188.c
index 3c094b8f44..0c7b3da927 100644
--- a/drivers/ram/rockchip/sdram_rk3188.c
+++ b/drivers/ram/rockchip/sdram_rk3188.c
@@ -22,7 +22,7 @@
 #include <asm/arch/grf_rk3188.h>
 #include <asm/arch/pmu_rk3188.h>
 #include <asm/arch/sdram_rk3288.h>
-#include <asm/arch/sdram_common.h>
+#include <asm/arch/sdram.h>
 #include <linux/err.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/drivers/ram/rockchip/sdram_rk322x.c b/drivers/ram/rockchip/sdram_rk322x.c
index 8df2039288..76f3aca6b9 100644
--- a/drivers/ram/rockchip/sdram_rk322x.c
+++ b/drivers/ram/rockchip/sdram_rk322x.c
@@ -18,7 +18,7 @@
 #include <asm/arch/hardware.h>
 #include <asm/arch/sdram_rk322x.h>
 #include <asm/arch/uart.h>
-#include <asm/arch/sdram_common.h>
+#include <asm/arch/sdram.h>
 #include <asm/types.h>
 #include <linux/err.h>
 
diff --git a/drivers/ram/rockchip/sdram_rk3288.c b/drivers/ram/rockchip/sdram_rk3288.c
index 8bc58c3f58..ada28c0ca3 100644
--- a/drivers/ram/rockchip/sdram_rk3288.c
+++ b/drivers/ram/rockchip/sdram_rk3288.c
@@ -22,7 +22,7 @@
 #include <asm/arch/grf_rk3288.h>
 #include <asm/arch/pmu_rk3288.h>
 #include <asm/arch/sdram_rk3288.h>
-#include <asm/arch/sdram_common.h>
+#include <asm/arch/sdram.h>
 #include <linux/err.h>
 #include <power/regulator.h>
 #include <power/rk8xx_pmic.h>
diff --git a/drivers/ram/rockchip/sdram_rk3328.c b/drivers/ram/rockchip/sdram_rk3328.c
index 1941e1c9e2..929f8bc248 100644
--- a/drivers/ram/rockchip/sdram_rk3328.c
+++ b/drivers/ram/rockchip/sdram_rk3328.c
@@ -16,7 +16,7 @@
 #include <asm/arch/cru_rk3328.h>
 #include <asm/arch/grf_rk3328.h>
 #include <asm/arch/rockchip_dmc.h>
-#include <asm/arch/sdram_common.h>
+#include <asm/arch/sdram.h>
 #include <asm/arch/sdram_rk3328.h>
 #include <asm/arch/uart.h>
 
diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c
index 11641468cc..def2ba3f36 100644
--- a/drivers/ram/rockchip/sdram_rk3399.c
+++ b/drivers/ram/rockchip/sdram_rk3399.c
@@ -15,7 +15,7 @@
 #include <syscon.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
-#include <asm/arch/sdram_common.h>
+#include <asm/arch/sdram.h>
 #include <asm/arch/sdram_rk3399.h>
 #include <asm/arch/cru_rk3399.h>
 #include <asm/arch/grf_rk3399.h>
diff --git a/drivers/ram/rockchip/sdram_rv1108.c b/drivers/ram/rockchip/sdram_rv1108.c
index 696e24838c..0d1e2f4a59 100644
--- a/drivers/ram/rockchip/sdram_rv1108.c
+++ b/drivers/ram/rockchip/sdram_rv1108.c
@@ -13,7 +13,7 @@
 #include <asm/arch/hardware.h>
 #include <asm/arch/sdram_rv1108.h>
 #include <asm/arch/timer.h>
-#include <asm/arch/sdram_common.h>
+#include <asm/arch/sdram.h>
 
 struct dram_info info;
 
diff --git a/drivers/ram/rockchip/sdram_rv1108_pctl_phy.c b/drivers/ram/rockchip/sdram_rv1108_pctl_phy.c
index d5b6749251..ea730703f1 100644
--- a/drivers/ram/rockchip/sdram_rv1108_pctl_phy.c
+++ b/drivers/ram/rockchip/sdram_rv1108_pctl_phy.c
@@ -14,7 +14,7 @@
 #include <asm/arch/hardware.h>
 #include <asm/arch/sdram_rv1108_pctl_phy.h>
 #include <asm/arch/timer.h>
-#include <asm/arch/sdram_common.h>
+#include <asm/arch/sdram.h>
 
 #if defined(CONFIG_ROCKCHIP_RV1108)
 #include <asm/arch/sdram_rv1108.h>
diff --git a/drivers/ram/rockchip/sdram_share.c b/drivers/ram/rockchip/sdram_share.c
index 9ec9906c60..a366350ff8 100644
--- a/drivers/ram/rockchip/sdram_share.c
+++ b/drivers/ram/rockchip/sdram_share.c
@@ -7,7 +7,7 @@
 #include <debug_uart.h>
 #include <ram.h>
 #include <asm/io.h>
-#include <asm/arch/sdram_common.h>
+#include <asm/arch/sdram.h>
 #include <asm/arch/sdram_share.h>
 
 void sdram_print_dram_type(unsigned char dramtype)

commit 451da917c9d4e8ca053f7c31605370beeef3ab4d
Author: YouMin Chen <cym@rock-chips.com>
Date:   Thu Mar 7 15:23:51 2019 +0800

    driver: ram: rk3288: rename sdram.h to sdram_rk3288.h
    
    Change-Id: Ie7a7820d78397250f37917947b91cb940ffd5bda
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/sdram.h b/arch/arm/include/asm/arch-rockchip/sdram_rk3288.h
similarity index 100%
rename from arch/arm/include/asm/arch-rockchip/sdram.h
rename to arch/arm/include/asm/arch-rockchip/sdram_rk3288.h
diff --git a/arch/arm/mach-rockchip/rk3066/sdram_rk3066.c b/arch/arm/mach-rockchip/rk3066/sdram_rk3066.c
index e7475b8965..b38e32efe5 100644
--- a/arch/arm/mach-rockchip/rk3066/sdram_rk3066.c
+++ b/arch/arm/mach-rockchip/rk3066/sdram_rk3066.c
@@ -21,7 +21,7 @@
 #include <asm/arch/ddr_rk3188.h>
 #include <asm/arch/grf_rk3066.h>
 #include <asm/arch/pmu_rk3188.h>
-#include <asm/arch/sdram.h>
+#include <asm/arch/sdram_rk3288.h>
 #include <asm/arch/sdram_common.h>
 #include <linux/err.h>
 
diff --git a/drivers/ram/rockchip/dmc-rk3368.c b/drivers/ram/rockchip/dmc-rk3368.c
index 2349217153..cb1a88cb82 100644
--- a/drivers/ram/rockchip/dmc-rk3368.c
+++ b/drivers/ram/rockchip/dmc-rk3368.c
@@ -17,7 +17,7 @@
 #include <asm/arch/cru_rk3368.h>
 #include <asm/arch/grf_rk3368.h>
 #include <asm/arch/ddr_rk3368.h>
-#include <asm/arch/sdram.h>
+#include <asm/arch/sdram_rk3288.h>
 #include <asm/arch/sdram_common.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/drivers/ram/rockchip/sdram_rk3188.c b/drivers/ram/rockchip/sdram_rk3188.c
index 365d00ef54..3c094b8f44 100644
--- a/drivers/ram/rockchip/sdram_rk3188.c
+++ b/drivers/ram/rockchip/sdram_rk3188.c
@@ -21,7 +21,7 @@
 #include <asm/arch/ddr_rk3188.h>
 #include <asm/arch/grf_rk3188.h>
 #include <asm/arch/pmu_rk3188.h>
-#include <asm/arch/sdram.h>
+#include <asm/arch/sdram_rk3288.h>
 #include <asm/arch/sdram_common.h>
 #include <linux/err.h>
 
diff --git a/drivers/ram/rockchip/sdram_rk3288.c b/drivers/ram/rockchip/sdram_rk3288.c
index 95efb117fc..8bc58c3f58 100644
--- a/drivers/ram/rockchip/sdram_rk3288.c
+++ b/drivers/ram/rockchip/sdram_rk3288.c
@@ -21,7 +21,7 @@
 #include <asm/arch/ddr_rk3288.h>
 #include <asm/arch/grf_rk3288.h>
 #include <asm/arch/pmu_rk3288.h>
-#include <asm/arch/sdram.h>
+#include <asm/arch/sdram_rk3288.h>
 #include <asm/arch/sdram_common.h>
 #include <linux/err.h>
 #include <power/regulator.h>

commit 01fc0bcda6eefcad51a6cc0c2d353db9f3a7853b
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Oct 9 11:59:52 2019 +0800

    spl: mtd_blk: correct the error parameter
    
    The mmc is not passed in spl_mtd_load_rkfw, use desc.
    
    Change-Id: I68a577487dc8a4f2a82c4b80095f10cd6319b508
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/spl/spl_mtd_blk.c b/common/spl/spl_mtd_blk.c
index fadde03b65..c14516ae02 100644
--- a/common/spl/spl_mtd_blk.c
+++ b/common/spl/spl_mtd_blk.c
@@ -93,9 +93,9 @@ int spl_mtd_load_rkfw(struct spl_image_info *spl_image, struct blk_desc *desc)
 	char trust_partition[] = "trust";
 	char uboot_partition[] = "uboot";
 
-	spl_get_partitions_sector(mmc_get_blk_desc(mmc), trust_partition,
+	spl_get_partitions_sector(desc, trust_partition,
 				  &trust_sectors);
-	spl_get_partitions_sector(mmc_get_blk_desc(mmc), uboot_partition,
+	spl_get_partitions_sector(desc, uboot_partition,
 				  &uboot_sectors);
 #endif
 

commit 9873075571bdc81e013018f201af1273647d20a2
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed Oct 9 15:08:33 2019 +0800

    spi: rockchip sfc: supporting less 16MB SPI Nor
    
    Address should not be packet with dummy bit.
    
    Change-Id: I70708d7025a5f135e18378c59e9598031cb44d6c
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/spi/rockchip_sfc.c b/drivers/spi/rockchip_sfc.c
index 8f54c6eed1..68cf67d1b1 100644
--- a/drivers/spi/rockchip_sfc.c
+++ b/drivers/spi/rockchip_sfc.c
@@ -494,12 +494,18 @@ static int rockchip_sfc_xfer(struct udevice *dev, unsigned int bitlen,
 		case 6: /* Nor >16MB 0x6b dummy op */
 			sfc->addr_bits = SFC_ADDR_32BITS;
 			sfc->dummy_bits = 8;
-			sfc->addr = pcmd[4] | (pcmd[3] << 8) | (pcmd[2] << 16)| (pcmd[1] << 24);
+			sfc->addr = pcmd[4] | (pcmd[3] << 8) | (pcmd[2] << 16) | (pcmd[1] << 24);
 			break;
 		case 5: /* Nor <=16MB 0x6b dummy op, Nor >16MB no dummy op */
-			sfc->addr_bits = SFC_ADDR_32BITS;
-			sfc->dummy_bits = 0;
-			sfc->addr = pcmd[4] | (pcmd[3] << 8) | (pcmd[2] << 16)| (pcmd[1] << 24);
+			if (sfc->cmd == 0x6b) {
+				sfc->addr_bits = SFC_ADDR_24BITS;
+				sfc->dummy_bits = 8;
+				sfc->addr = pcmd[3] | (pcmd[2] << 8) | (pcmd[1] << 16);
+			} else {
+				sfc->addr_bits = SFC_ADDR_32BITS;
+				sfc->dummy_bits = 0;
+				sfc->addr = pcmd[4] | (pcmd[3] << 8) | (pcmd[2] << 16) | (pcmd[1] << 24);
+			}
 			break;
 		case 4: /* Nand erase and read, Nor <=16MB no dummy op */
 			sfc->addr_bits = SFC_ADDR_24BITS;

commit 9bf43d0b7852a3e24e97cad76f40daea073fe77a
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Thu Sep 26 23:28:25 2019 +0800

    mtd: spi-nor-ids: Add Gigadevice gd25q128 ID
    
    Change-Id: I73e7aa7e06c8d6b86110485a701b67300607949a
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index ec929760ee..807425a657 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -106,6 +106,11 @@ const struct flash_info spi_nor_ids[] = {
 			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
 			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
 	},
+	{
+		INFO("gd25q128", 0xc84018, 0, 64 * 1024, 256,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+	},
 	{
 		INFO("gd25lq128", 0xc86018, 0, 64 * 1024, 256,
 			SECT_4K | SPI_NOR_DUAL_READ |

commit 6e1213715cdbf94e71f6beafe62ceee3d54e18fc
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Thu Sep 26 22:35:19 2019 +0800

    spi: rockchip_sfc support SPI Nor which's capacity is larger than 16MB
    
    Change-Id: I2e76abae6d84d8e393395458bb1cf801a30e9fb8
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/spi/rockchip_sfc.c b/drivers/spi/rockchip_sfc.c
index 39d817b849..8f54c6eed1 100644
--- a/drivers/spi/rockchip_sfc.c
+++ b/drivers/spi/rockchip_sfc.c
@@ -248,28 +248,6 @@ static void rockchip_sfc_setup_xfer(struct rockchip_sfc *sfc, u32 trb)
 	u32 val = 0x02;
 	u8 data_width = IF_TYPE_STD;
 
-	switch (sfc->addr_bits) {
-	case 0:
-		sfc->addr_bits = SFC_ADDR_0BITS;
-		break;
-	case 8:
-		sfc->addr_bits = SFC_ADDR_XBITS;
-		writel(7, &regs->abit);
-		break;
-	case 16:
-		sfc->addr_bits = SFC_ADDR_XBITS;
-		writel(15, &regs->abit);
-		break;
-	case 24:
-		sfc->addr_bits = SFC_ADDR_24BITS;
-		break;
-	case 32:
-		sfc->addr_bits = SFC_ADDR_32BITS;
-		break;
-	default:
-		pr_err("%s addr-bits error %d\n", __func__, sfc->addr_bits);
-		return;
-	}
 	SFC_DBG("--- sfc.addr_bit %x\n", sfc->addr_bits);
 
 	if (sfc->addr_bits == SFC_ADDR_24BITS ||
@@ -512,25 +490,41 @@ static int rockchip_sfc_xfer(struct udevice *dev, unsigned int bitlen,
 
 	if (flags & SPI_XFER_BEGIN) {
 		sfc->cmd = pcmd[0];
-		if (len >= 4) {
-			sfc->addr_bits = 24;
-			sfc->dummy_bits = (len - 4) << 3;
+		switch (len) {
+		case 6: /* Nor >16MB 0x6b dummy op */
+			sfc->addr_bits = SFC_ADDR_32BITS;
+			sfc->dummy_bits = 8;
+			sfc->addr = pcmd[4] | (pcmd[3] << 8) | (pcmd[2] << 16)| (pcmd[1] << 24);
+			break;
+		case 5: /* Nor <=16MB 0x6b dummy op, Nor >16MB no dummy op */
+			sfc->addr_bits = SFC_ADDR_32BITS;
+			sfc->dummy_bits = 0;
+			sfc->addr = pcmd[4] | (pcmd[3] << 8) | (pcmd[2] << 16)| (pcmd[1] << 24);
+			break;
+		case 4: /* Nand erase and read, Nor <=16MB no dummy op */
+			sfc->addr_bits = SFC_ADDR_24BITS;
+			sfc->dummy_bits = 0;
 			sfc->addr = pcmd[3] | (pcmd[2] << 8) | (pcmd[1] << 16);
-		} else if (len == 3 && dout) {
-			sfc->addr_bits = 16;
+			break;
+		case 3: /* Nand prog,  */
+			sfc->addr_bits = SFC_ADDR_XBITS;
 			sfc->dummy_bits = 0;
 			sfc->addr = pcmd[2] | pcmd[1] << 8;
-		} else if (len == 2 && dout) {
-			sfc->addr_bits = 8;
+			break;
+		case 2: /* Nand read/write feature */
+			sfc->addr_bits = SFC_ADDR_XBITS;
 			sfc->dummy_bits = 0;
 			sfc->addr = pcmd[1];
-		} else {
-			sfc->addr_bits = 0;
+			break;
+		default: /* Nand/Nor Read/Write status */
+			sfc->addr_bits = SFC_ADDR_0BITS;
 			sfc->dummy_bits = 0;
 			sfc->addr = 0;
+			break;
 		}
+		SFC_DBG("%s %d %x %d %d %x\n", __func__, len, sfc->cmd, sfc->addr_bits,
+			sfc->dummy_bits, sfc->addr);
 	}
-
 	if (flags & SPI_XFER_END) {
 		if (din) {
 			sfc->rw = SFC_RD;

commit 5a9f9698ff492ea4fc20492b729a933b2509ed04
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Oct 8 12:05:19 2019 +0800

    rockchip: spl-boot-order: support scan spi nor device
    
    Change-Id: I185a833cec0f52df2357a6308bd5de19a9576134
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/spl-boot-order.c b/arch/arm/mach-rockchip/spl-boot-order.c
index 47ad07090a..385cadd917 100644
--- a/arch/arm/mach-rockchip/spl-boot-order.c
+++ b/arch/arm/mach-rockchip/spl-boot-order.c
@@ -34,8 +34,22 @@ static int spl_node_to_boot_device(int node)
 {
 	struct udevice *parent;
 
-	if (!uclass_get_device_by_of_offset(UCLASS_SPI, node, &parent))
-		return BOOT_DEVICE_MTD_BLK_SPI_NAND;
+	if (!uclass_get_device_by_of_offset(UCLASS_SPI, node, &parent)) {
+		struct udevice *spi_dev;
+
+		for (device_find_first_child(parent, &spi_dev);
+		     spi_dev;
+		     device_find_next_child(&spi_dev)) {
+			if (device_get_uclass_id(spi_dev) == UCLASS_SPI_FLASH) {
+				return BOOT_DEVICE_MTD_BLK_SPI_NOR;
+			} else if (device_get_uclass_id(spi_dev) == UCLASS_MTD) {
+				return BOOT_DEVICE_MTD_BLK_SPI_NAND;
+			} else {
+				printf("Can not find spi flash device\n");
+				return -ENOSYS;
+			}
+		}
+	}
 
 #ifdef CONFIG_SPL_NAND_SUPPORT
 	if (!rk_nand_init())

commit e1c38c9f84a8f446328fa5b525d6a3d391980880
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Oct 8 10:03:44 2019 +0800

    rockchip: common: add mtd_blk spi nor scan support
    
    Change-Id: I74b2c02bf9d23ffe8a3eada92f90132d0742fbea
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index 42b76a1bc4..f9cb2b3c19 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -119,6 +119,8 @@
 		"setenv devtype mtd; setenv devnum 0;" \
 	"elif mtd_blk dev 1; then " \
 		"setenv devtype mtd; setenv devnum 1;" \
+	"elif mtd_blk dev 2; then " \
+		"setenv devtype mtd; setenv devnum 2;" \
 	"elif rknand dev 0; then " \
 		"setenv devtype rknand; setenv devnum 0;" \
 	"elif rksfc dev 0; then " \

commit 82ee4254158e33c79021caade5639182d8116b64
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Oct 8 09:53:05 2019 +0800

    dm: blk: fix spi flash uclass different error when use mtd block
    
    The normal mtd block attachment steps are UCLASS_BLK -> UCLASS_MTD ->
    UCLASS_(SPI or NAND). Since the spi flash frame is attached to
    UCLASS_SPI_FLASH, this make mistake to find the UCLASS_MTD when
    find the mtd block device. Fix it here when enable CONFIG_MTD_BLK.
    
    Change-Id: I815f85a3bc51aa31e0896d9809a0b5a90f186a18
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
index 3400d1d922..0d3574ffb7 100644
--- a/drivers/block/blk-uclass.c
+++ b/drivers/block/blk-uclass.c
@@ -126,9 +126,30 @@ struct blk_desc *blk_get_devnum_by_typename(const char *if_typename, int devnum)
 
 		/* Find out the parent device uclass */
 		if (device_get_uclass_id(dev->parent) != uclass_id) {
+#ifdef CONFIG_MTD_BLK
+			/*
+			 * The normal mtd block attachment steps are
+			 * UCLASS_BLK -> UCLASS_MTD -> UCLASS_(SPI or NAND).
+			 * Since the spi flash frame is attached to
+			 * UCLASS_SPI_FLASH, this make mistake to find
+			 * the UCLASS_MTD when find the mtd block device.
+			 * Fix it here when enable CONFIG_MTD_BLK.
+			 */
+			if ((if_type == IF_TYPE_MTD) &&
+			    (devnum == BLK_MTD_SPI_NOR)) {
+				debug("Fix the spi flash uclass different\n");
+			} else {
+				debug("%s: parent uclass %d, this dev %d\n",
+				      __func__,
+				      device_get_uclass_id(dev->parent),
+				      uclass_id);
+				continue;
+			}
+#else
 			debug("%s: parent uclass %d, this dev %d\n", __func__,
 			      device_get_uclass_id(dev->parent), uclass_id);
 			continue;
+#endif
 		}
 
 		if (device_probe(dev))

commit 0dccd0d87e336b52ec0f50fab544c4e5f6443102
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Sep 27 11:09:42 2019 +0800

    mtd: mtd_blk: support spi nor read
    
    Change-Id: Id2b60f1e08441504b2feb16b5df8d24acdeefa45
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index b543f6aabc..31b1b8c3c0 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -96,8 +96,10 @@ ulong mtd_dread(struct udevice *udev, lbaint_t start,
 		lbaint_t blkcnt, void *dst)
 {
 	struct blk_desc *desc = dev_get_uclass_platdata(udev);
+#if defined(CONFIG_NAND) || defined(CONFIG_MTD_SPI_NAND) || defined(CONFIG_SPI_FLASH_MTD)
 	loff_t off = (loff_t)(start * 512);
 	size_t rwsize = blkcnt * 512;
+#endif
 	struct mtd_info *mtd;
 	int ret = 0;
 
@@ -135,14 +137,23 @@ ulong mtd_dread(struct udevice *udev, lbaint_t start,
 		else
 #elif defined(CONFIG_SPL_BUILD)
 		size_t retlen;
+
 		mtd_read(mtd, off, rwsize, &retlen, dst);
 		if (retlen == rwsize)
 			return blkcnt;
+		else
 #endif
 			return 0;
 	} else if (desc->devnum == BLK_MTD_SPI_NOR) {
-		/* Not implemented */
-		return 0;
+#if defined(CONFIG_SPI_FLASH_MTD) || defined(CONFIG_SPL_BUILD)
+		size_t retlen_nor;
+
+		mtd_read(mtd, off, rwsize, &retlen_nor, dst);
+		if (retlen_nor == rwsize)
+			return blkcnt;
+		else
+#endif
+			return 0;
 	} else {
 		return 0;
 	}

commit a5ce032fe15d93750419352f18fabfbe57934d0a
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Sep 27 10:30:26 2019 +0800

    mtd: spi flash: bind spi flash device to mtd block
    
    Change-Id: I8252304b984e18e15c2c0a5f1efa0d336baf53b2
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index 0aed7a6d80..22467d8562 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -9,6 +9,7 @@
  */
 
 #include <common.h>
+#include <blk.h>
 #include <dm.h>
 #include <errno.h>
 #include <malloc.h>
@@ -138,6 +139,21 @@ static int spi_flash_std_get_sw_write_prot(struct udevice *dev)
 	return spi_flash_cmd_get_sw_write_prot(flash);
 }
 
+static int spi_flash_std_bind(struct udevice *udev)
+{
+	int ret = 0;
+
+#ifdef CONFIG_MTD_BLK
+	struct udevice *bdev;
+
+	ret = blk_create_devicef(udev, "mtd_blk", "blk", IF_TYPE_MTD,
+				 BLK_MTD_SPI_NOR, 512, 0, &bdev);
+	if (ret)
+		printf("Cannot create block device\n");
+#endif
+	return ret;
+}
+
 static int spi_flash_std_probe(struct udevice *dev)
 {
 	struct spi_slave *slave = dev_get_parent_priv(dev);
@@ -175,6 +191,7 @@ U_BOOT_DRIVER(spi_flash_std) = {
 	.name		= "spi_flash_std",
 	.id		= UCLASS_SPI_FLASH,
 	.of_match	= spi_flash_std_ids,
+	.bind		= spi_flash_std_bind,
 	.probe		= spi_flash_std_probe,
 	.remove		= spi_flash_std_remove,
 	.priv_auto_alloc_size = sizeof(struct spi_flash),

commit e57a08e58f261a8b7bec5618d4e451b966f59d20
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Fri Sep 20 18:10:21 2019 +0800

    clk: rk3399: fix up the i2c clk error
    
    I2c MUx is in cpll by default, but cpll is for dclk_vop exclusive.
    If dclk_vop set rate after i2c init, the CPLL changed,
    but the i2c not perception, it will resulting the wrong frequency
    of the i2c.
    So set the i2c frequency according to the kernel configuration.
    and Hang I2C on the GPLL.
    
    Change-Id: I91f891e9033e9d4648027ea253998a54011f4863
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 9f88e8a7cd..bfa2e87f8e 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -1472,6 +1472,27 @@ static void rkclk_init(struct rk3399_cru *cru)
 		     (4 - 1) << ACLK_EMMC_DIV_CON_SHIFT);
 	rk_clrsetreg(&cru->clksel_con[22], 0x3f << 0, 7 << 0);
 
+	/*
+	 * I2c MUx is in cpll by default, but cpll is for dclk_vop exclusive.
+	 * If dclk_vop set rate after i2c init, the CPLL changed,
+	 * but the i2c not perception, it will resulting the wrong
+	 * frequency of the i2c.
+	 * So set the i2c frequency according to the kernel configuration,
+	 * and Hang I2C on the GPLL.
+	 */
+	rk_clrsetreg(&cru->clksel_con[61], I2C_CLK_REG_MASK(1),
+		     I2C_CLK_REG_VALUE(1, 4));
+	rk_clrsetreg(&cru->clksel_con[62], I2C_CLK_REG_MASK(2),
+		     I2C_CLK_REG_VALUE(2, 4));
+	rk_clrsetreg(&cru->clksel_con[63], I2C_CLK_REG_MASK(3),
+		     I2C_CLK_REG_VALUE(3, 4));
+	rk_clrsetreg(&cru->clksel_con[61], I2C_CLK_REG_MASK(5),
+		     I2C_CLK_REG_VALUE(5, 4));
+	rk_clrsetreg(&cru->clksel_con[62], I2C_CLK_REG_MASK(6),
+		     I2C_CLK_REG_VALUE(6, 4));
+	rk_clrsetreg(&cru->clksel_con[63], I2C_CLK_REG_MASK(7),
+		     I2C_CLK_REG_VALUE(7, 4));
+
 	rkclk_set_pll(&cru->gpll_con[0], &gpll_init_cfg);
 }
 
@@ -1499,6 +1520,7 @@ static int rk3399_clk_probe(struct udevice *dev)
 	if (!priv->armbclk_init_hz)
 		priv->armbclk_init_hz =
 		rkclk_pll_get_rate(&priv->cru->apll_b_con[0]);
+
 	return 0;
 }
 

commit 39e38ab3702106bea2e0051ce774f13f81a6716d
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Sep 26 17:00:53 2019 +0800

    mtd: mtd_blk: distinguish the nand driver with spl build and uboot build
    
    Since func nand_read_skip_bad is used in uboot, so just build it in
    uboot build. And use func mtd_read to replace it.
    
    Change-Id: Ic5e161f7f03cd2da0099891812360af67a2b9db8
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index 961b5d171a..b543f6aabc 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -102,7 +102,7 @@ ulong mtd_dread(struct udevice *udev, lbaint_t start,
 	int ret = 0;
 
 	if (!desc)
-		return 0;
+		return ret;
 
 	mtd = desc->bdev->priv;
 	if (!mtd)
@@ -112,7 +112,7 @@ ulong mtd_dread(struct udevice *udev, lbaint_t start,
 		return 0;
 
 	if (desc->devnum == BLK_MTD_NAND) {
-#ifdef CONFIG_NAND
+#if defined(CONFIG_NAND) && !defined(CONFIG_SPL_BUILD)
 		mtd = dev_get_priv(udev->parent);
 		if (!mtd)
 			return 0;
@@ -126,13 +126,18 @@ ulong mtd_dread(struct udevice *udev, lbaint_t start,
 #endif
 			return 0;
 	} else if (desc->devnum == BLK_MTD_SPI_NAND) {
-#ifdef CONFIG_MTD_SPI_NAND
+#if defined(CONFIG_MTD_SPI_NAND) && !defined(CONFIG_SPL_BUILD)
 		ret = nand_read_skip_bad(mtd, off, &rwsize,
 					 NULL, mtd->size,
 					 (u_char *)(dst));
 		if (!ret)
 			return blkcnt;
 		else
+#elif defined(CONFIG_SPL_BUILD)
+		size_t retlen;
+		mtd_read(mtd, off, rwsize, &retlen, dst);
+		if (retlen == rwsize)
+			return blkcnt;
 #endif
 			return 0;
 	} else if (desc->devnum == BLK_MTD_SPI_NOR) {

commit 8f5984c080a39cb71c53fefca4fc690e39fea22b
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Sep 26 16:58:05 2019 +0800

    dts: rk3308: add sfc node in spl boot order
    
    Change-Id: Id03caaf715de626b1227a80e144877f9f522a1d2
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-u-boot.dtsi b/arch/arm/dts/rk3308-u-boot.dtsi
index 46f62b0c4c..d8089907da 100644
--- a/arch/arm/dts/rk3308-u-boot.dtsi
+++ b/arch/arm/dts/rk3308-u-boot.dtsi
@@ -8,7 +8,7 @@
 
 	chosen {
 		stdout-path = &uart2;
-		u-boot,spl-boot-order = &nandc, &emmc;
+		u-boot,spl-boot-order = &sfc, &nandc, &emmc;
 	};
 };
 
@@ -46,6 +46,17 @@
 &sfc {
 	u-boot,dm-pre-reloc;
 	status = "okay";
+
+	#address-cells = <1>;
+	#size-cells = <0>;
+	flash@0 {
+		u-boot,dm-spl;
+		compatible = "spi-nand";
+		reg = <0>;
+		spi-tx-bus-width = <1>;
+		spi-rx-bus-width = <4>;
+		spi-max-frequency = <96000000>;
+	};
 };
 
 &saradc {

commit b2ee20d32b42b15d4336b15744e0d0eca8f389ae
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Sep 26 16:49:31 2019 +0800

    mtd: spinand: fix missing select target info
    
    Change-Id: Iee5048f9ffabc9a4b7a3f6ef2dc1e3f2d819eda9
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/winbond.c b/drivers/mtd/nand/spi/winbond.c
index 6ba8bc5c7b..53017d6e58 100644
--- a/drivers/mtd/nand/spi/winbond.c
+++ b/drivers/mtd/nand/spi/winbond.c
@@ -93,7 +93,8 @@ static const struct spinand_info winbond_spinand_table[] = {
 					      &write_cache_variants,
 					      &update_cache_variants),
 		     0,
-		     SPINAND_ECCINFO(&w25m02gv_ooblayout, NULL)),
+		     SPINAND_ECCINFO(&w25m02gv_ooblayout, NULL),
+		     SPINAND_SELECT_TARGET(w25m02gv_select_target)),
 };
 
 /**

commit f84e81c7cec13852e594d19b5f5f91d9c67988ec
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Thu Sep 26 09:42:30 2019 +0800

    rockchip: configs: enable usb host for rk3308 evb
    
    Enable usb host and ums cmd.
    
    Change-Id: Iaed75bffc7156620b1b523ebf4ffc077c1bdf939
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/configs/evb-aarch32-rk3308_defconfig b/configs/evb-aarch32-rk3308_defconfig
index 1937284b35..5eb82250e0 100644
--- a/configs/evb-aarch32-rk3308_defconfig
+++ b/configs/evb-aarch32-rk3308_defconfig
@@ -32,6 +32,8 @@ CONFIG_CMD_GPT=y
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_MISC is not set
@@ -49,11 +51,11 @@ CONFIG_DM_KEY=y
 CONFIG_ADC_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_PHY=y
-CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
 CONFIG_REGULATOR_PWM=y
@@ -72,6 +74,10 @@ CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index d06e0978ba..6e96eaed93 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -46,6 +46,8 @@ CONFIG_CMD_GPT=y
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_MISC is not set
@@ -87,6 +89,10 @@ CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y

commit 374b84446410e3f14789ec3880317b33d1f4f0e3
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Thu Sep 26 09:10:56 2019 +0800

    rockchip: rk3308-evb: Add usb host vbus regulator
    
    RK3308 EVB use GPIO0_C5 control 5V power supply for
    usb host.
    
    Change-Id: Iafdffc7aa5114eb4909b083e2e2a98088d792b14
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-evb.dts b/arch/arm/dts/rk3308-evb.dts
index 7ddcae479f..ef880960bc 100644
--- a/arch/arm/dts/rk3308-evb.dts
+++ b/arch/arm/dts/rk3308-evb.dts
@@ -257,6 +257,15 @@
 		};
 	};
 
+	vbus_host: vbus-host-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&usb_drv>;
+		regulator-name = "vbus_host";
+	};
+
 	vdd_log: vdd_core: vdd-core {
 		compatible = "pwm-regulator";
 		pwms = <&pwm0 0 5000 1>;
@@ -371,4 +380,11 @@
 				<1 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
 	};
+
+	usb {
+		usb_drv: usb-drv {
+			rockchip,pins =
+				<0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
 };

commit 8172425635730c1eea72c1ef3e89930b185d0af1
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Tue Aug 20 17:56:36 2019 +0800

    drivers: rknand: add support Micron B05A and B16A
    
    Change-Id: Ib908242be9ea9d31d007deaabba66e1537d0a1d6
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/drivers/rknand/rk_ftl_arm_v7.S b/drivers/rknand/rk_ftl_arm_v7.S
index afdb29731e..14a5efc101 100644
--- a/drivers/rknand/rk_ftl_arm_v7.S
+++ b/drivers/rknand/rk_ftl_arm_v7.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2019-05-08
+ * date: 2019-08-28
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -4706,7 +4706,7 @@ make_superblock:
 	cmp	r2, r3
 	bcc	.L662
 	ldr	r1, .L674+4
-	movw	r2, #2577
+	mov	r2, #2576
 	ldr	r0, .L674+8
 	bl	printf
 	ldr	r1, .L674+12
@@ -6502,7 +6502,7 @@ SupperBlkListInit:
 	cmp	r3, r5
 	bge	.L908
 	ldr	r1, .L909+64
-	movw	r2, #2647
+	movw	r2, #2646
 	ldr	r0, .L909+68
 	bl	printf
 	ldr	r1, .L909+72
@@ -10412,107 +10412,117 @@ FlashGetReadRetryDefault:
 	.fpu softvfp
 	.type	FlashInit, %function
 FlashInit:
-	@ args = 0, pretend = 0, frame = 24
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-	sub	sp, sp, #40
+	sub	sp, sp, #32
 	mov	r0, #32768
 	movs	r5, #0
 	bl	ftl_malloc
-	ldr	r3, .L1560
-	ldr	fp, .L1560+124
-	ldr	r10, .L1560+128
+	ldr	r3, .L1561
+	ldr	fp, .L1561+124
+	ldr	r10, .L1561+128
 	str	r0, [r3]
 	mov	r0, #32768
 	bl	ftl_malloc
-	ldr	r3, .L1560+4
-	ldr	r8, .L1560+132
-	ldr	r6, .L1560+8
+	ldr	r3, .L1561+4
+	ldr	r6, .L1561+8
+	ldr	r7, .L1561+12
 	str	r0, [r3]
 	mov	r0, #4096
 	bl	ftl_malloc
-	ldr	r3, .L1560+12
-	ldr	r7, .L1560+16
+	ldr	r3, .L1561+16
+	ldr	r8, .L1561+132
 	str	r0, [r3]
 	mov	r0, #32768
 	bl	ftl_malloc
-	ldr	r3, .L1560+20
+	ldr	r3, .L1561+20
 	str	r0, [r3]
 	mov	r0, #4096
 	bl	ftl_malloc
-	ldr	r3, .L1560+24
-	ldr	r2, .L1560+28
-	strb	r5, [r10]
+	ldr	r3, .L1561+24
+	ldr	r2, .L1561+28
+	strb	r5, [r6]
 	str	r0, [r3]
 	movs	r3, #50
 	strb	r3, [r2]
 	movs	r2, #128
 	strb	r3, [fp]
 	mov	r0, r4
-	ldr	r3, .L1560+32
-	ldr	r4, .L1560+36
-	strb	r5, [r8]
-	str	r5, [r3]
-	ldr	r3, .L1560+40
+	ldr	r3, .L1561+32
+	ldr	r4, .L1561+36
 	strb	r5, [r7]
+	str	r5, [r3]
+	ldr	r3, .L1561+40
+	strb	r5, [r10]
 	str	r2, [r3]
-	ldr	r3, .L1560+44
+	ldr	r3, .L1561+44
 	str	r5, [r3]
 	movs	r3, #60
-	strb	r3, [r6]
+	strb	r3, [r8]
 	bl	NandcInit
-	str	r10, [sp, #20]
-	ldr	r10, .L1560+136
-	str	r8, [sp, #28]
-	mov	r8, r6
-	mov	r6, r4
-	str	fp, [sp, #24]
-.L1462:
-	add	r1, r10, r5, lsl #3
-	uxtb	r2, r5
-	ldr	r3, [r10, r5, lsl #3]
-	ldrb	r1, [r1, #4]	@ zero_extendqisi2
-	mov	fp, r2
-	mov	r0, r2
-	str	r3, [sp, #36]
-	str	r1, [sp, #32]
+	str	fp, [sp, #20]
+	str	r10, [sp, #24]
+.L1463:
+	ldr	r3, .L1561+48
+	uxtb	r10, r5
+	mov	r0, r10
+	ldr	r3, [r3, r5, lsl #3]
+	str	r3, [sp, #28]
+	ldr	r3, .L1561+48
+	add	r2, r3, r5, lsl #3
+	ldrb	fp, [r2, #4]	@ zero_extendqisi2
 	bl	FlashReset
-	mov	r0, fp
+	mov	r0, r10
 	bl	NandcFlashCs
-	ldr	r1, [sp, #32]
+	ldr	r3, [sp, #28]
+	movs	r2, #144
 	movs	r0, #200
-	ldr	r3, [sp, #36]
-	add	r3, r3, r1, lsl #8
-	movs	r1, #144
-	str	r1, [r3, #2056]
-	movs	r1, #0
-	str	r1, [r3, #2052]
-	str	r3, [sp, #32]
+	add	fp, r3, fp, lsl #8
+	str	r2, [fp, #2056]
+	movs	r2, #0
+	str	r2, [fp, #2052]
+	str	r2, [sp, #28]
 	bl	udelay
-	ldr	r3, [sp, #32]
-	mov	r0, fp
-	ldr	r1, [r3, #2048]
+	ldr	r1, [fp, #2048]
+	uxtb	r1, r1
 	strb	r1, [r4]
-	ldr	r1, [r3, #2048]
-	strb	r1, [r4, #1]
-	ldr	r1, [r3, #2048]
-	strb	r1, [r4, #2]
-	ldr	r1, [r3, #2048]
-	strb	r1, [r4, #3]
-	ldr	r1, [r3, #2048]
-	strb	r1, [r4, #4]
-	ldr	r3, [r3, #2048]
-	strb	r3, [r4, #5]
+	cmp	r1, #44
+	ldr	r0, [fp, #2048]
+	strb	r0, [r4, #1]
+	ldr	r0, [fp, #2048]
+	strb	r0, [r4, #2]
+	ldr	r0, [fp, #2048]
+	strb	r0, [r4, #3]
+	ldr	r0, [fp, #2048]
+	strb	r0, [r4, #4]
+	ldr	r0, [fp, #2048]
+	strb	r0, [r4, #5]
+	bne	.L1458
+	movs	r1, #239
+	movs	r0, #200
+	str	r1, [fp, #2056]
+	movs	r1, #1
+	str	r1, [fp, #2052]
+	bl	udelay
+	ldr	r2, [sp, #28]
+	movs	r1, #4
+	str	r1, [fp, #2048]
+	str	r2, [fp, #2048]
+	str	r2, [fp, #2048]
+	str	r2, [fp, #2048]
+.L1458:
+	mov	r0, r10
 	bl	NandcFlashDeCs
 	ldrb	r2, [r4]	@ zero_extendqisi2
 	subs	r3, r2, #1
 	uxtb	r3, r3
 	cmp	r3, #253
-	bhi	.L1458
+	bhi	.L1459
 	ldrb	r1, [r4, #5]	@ zero_extendqisi2
 	ldrb	r3, [r4, #1]	@ zero_extendqisi2
-	ldr	r0, .L1560+48
+	ldr	r0, .L1561+52
 	str	r1, [sp, #12]
 	ldrb	r1, [r4, #4]	@ zero_extendqisi2
 	str	r1, [sp, #8]
@@ -10522,17 +10532,18 @@ FlashInit:
 	str	r1, [sp]
 	adds	r1, r5, #1
 	bl	printf
-.L1458:
-	cbnz	r5, .L1459
-	ldrb	r3, [r6]	@ zero_extendqisi2
+.L1459:
+	cbnz	r5, .L1460
+	ldr	r2, .L1561+36
+	ldrb	r3, [r2]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, #253
-	bhi	.L1509
-	ldrb	r3, [r6, #1]	@ zero_extendqisi2
+	bhi	.L1510
+	ldrb	r3, [r2, #1]	@ zero_extendqisi2
 	cmp	r3, #255
-	beq	.L1509
-.L1459:
+	beq	.L1510
+.L1460:
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	adds	r5, r5, #1
 	adds	r4, r4, #8
@@ -10541,123 +10552,123 @@ FlashInit:
 	moveq	r3, #44
 	strbeq	r3, [r4, #-8]
 	cmp	r5, #4
-	bne	.L1462
-	ldrb	r3, [r6]	@ zero_extendqisi2
-	cmp	r3, #173
-	beq	.L1463
-	ldr	r3, .L1560+52
+	bne	.L1463
+	ldr	r3, .L1561+36
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	mov	r10, r3
+	cmp	r2, #173
+	beq	.L1464
+	ldr	r3, .L1561+56
 	ldr	r0, [r3]
 	bl	NandcSetDdrMode
-.L1463:
+.L1464:
 	mov	r2, #852
 	movs	r1, #0
-	ldr	r0, .L1560+56
+	ldr	r0, .L1561+60
 	bl	ftl_memset
-	ldr	r4, .L1560+60
-	ldr	r3, .L1560+64
-	ldr	r5, .L1560+68
+	ldr	r4, .L1561+64
+	movs	r2, #0
+	ldr	r3, .L1561+68
+	ldr	r5, .L1561+72
 	str	r3, [r4]
-	movs	r3, #0
-	strb	r3, [r5]
-	ldr	r3, .L1560+72
-	str	r5, [sp, #32]
-	ldr	r1, [r3]
-	ldr	r3, .L1560+76
-	cmp	r1, r3
-	mov	r10, r3
+	ldr	r3, .L1561+76
+	strb	r2, [r3]
+	mov	fp, r3
+	ldr	r2, .L1561+80
+	ldr	r1, [r2]
+	cmp	r1, r5
 	ittt	eq
-	ldreq	r3, .L1560+80
+	ldreq	r3, .L1561+84
 	moveq	r2, #1
 	streq	r2, [r3]
-	ldrb	r3, [r6, #1]	@ zero_extendqisi2
+	ldrb	r3, [r10, #1]	@ zero_extendqisi2
 	cmp	r3, #161
-	beq	.L1465
+	beq	.L1466
 	cmp	r3, #241
-	beq	.L1465
+	beq	.L1466
 	cmp	r3, #218
-	beq	.L1465
+	beq	.L1466
 	and	r2, r3, #253
 	cmp	r2, #209
-	beq	.L1465
+	beq	.L1466
 	cmp	r3, #220
-	bne	.L1466
-	ldrb	r2, [r6, #3]	@ zero_extendqisi2
+	bne	.L1467
+	ldrb	r2, [r10, #3]	@ zero_extendqisi2
 	cmp	r2, #149
-	bne	.L1466
-.L1465:
-	ldr	r2, [sp, #20]
-	movs	r0, #1
-	ldr	r5, [sp, #24]
-	ldrb	ip, [r6]	@ zero_extendqisi2
-	strb	r0, [r2]
+	bne	.L1467
+.L1466:
+	ldr	ip, .L1561+36
 	movs	r2, #16
-	strb	r2, [r5]
+	ldr	r0, [sp, #20]
+	mov	r10, #1
 	strb	r2, [r8]
-	cmp	ip, #152
-	ldr	r2, .L1560+84
-	strb	ip, [r2, #1]
+	ldrb	lr, [ip]	@ zero_extendqisi2
+	strb	r2, [r0]
+	ldr	r2, .L1561+88
+	cmp	lr, #152
+	strb	r10, [r7]
+	strb	lr, [r2, #1]
 	strb	r3, [r2, #2]
-	bne	.L1468
-	ldrsb	ip, [r6, #4]
+	bne	.L1469
+	ldrsb	ip, [ip, #4]
 	cmp	ip, #0
-	blt	.L1469
+	blt	.L1470
 	movs	r0, #24
 	strb	r0, [r8]
-.L1468:
-	cmp	r1, r10
-	beq	.L1471
+.L1469:
+	cmp	r1, r5
+	beq	.L1472
 	movw	r0, #2049
 	cmp	r1, r0
-	bne	.L1472
-.L1471:
+	bne	.L1473
+.L1472:
 	movs	r1, #16
 	strb	r1, [r8]
-.L1472:
+.L1473:
 	cmp	r3, #218
-	bne	.L1473
+	bne	.L1474
 	mov	r1, #2048
-.L1556:
+.L1557:
 	strh	r1, [r2, #14]	@ movhi
 	strb	r3, [r2, #2]
-.L1474:
+.L1475:
 	movs	r2, #32
-	ldr	r1, .L1560+88
-	ldr	r0, .L1560+92
+	ldr	r1, .L1561+92
+	ldr	r0, .L1561+96
 	bl	ftl_memcpy
 	movs	r2, #32
-	ldr	r1, .L1560+84
-	ldr	r0, .L1560+64
+	ldr	r1, .L1561+88
+	ldr	r0, .L1561+68
 	bl	ftl_memcpy
-.L1466:
-	ldr	r3, [sp, #20]
-	ldr	r8, .L1560+140
-	ldrb	r3, [r3]	@ zero_extendqisi2
+.L1467:
+	ldrb	r3, [r7]	@ zero_extendqisi2
+	ldr	r10, .L1561+136
 	cmp	r3, #0
-	bne	.L1477
+	bne	.L1478
 	bl	FlashLoadPhyInfoInRam
-	cbnz	r0, .L1479
+	cbnz	r0, .L1480
 	ldr	r3, [r4]
-	ldr	fp, .L1560+104
+	ldr	r8, .L1561+108
 	ldrh	r3, [r3, #16]
 	lsrs	r3, r3, #8
 	lsls	r1, r3, #31
 	and	r0, r3, #7
-	strb	r0, [fp]
-	bmi	.L1479
+	strb	r0, [r8]
+	bmi	.L1480
 	movs	r3, #1
-	strb	r3, [r7]
+	strb	r3, [r6]
 	bl	FlashSetInterfaceMode
-	ldrb	r0, [fp]	@ zero_extendqisi2
+	ldrb	r0, [r8]	@ zero_extendqisi2
 	bl	NandcSetMode
-.L1479:
+.L1480:
 	ldr	r3, [r4]
 	ldrb	r3, [r3, #26]	@ zero_extendqisi2
-	strb	r3, [r8]
+	strb	r3, [r10]
 	bl	FlashLoadPhyInfo
 	cmp	r0, #0
-	beq	.L1477
+	beq	.L1478
 	ldr	r3, [r4]
-	ldr	r0, .L1560+96
+	ldr	r0, .L1561+100
 	ldrh	r1, [r3, #14]
 	bl	printf
 	bl	FlashLoadPhyInfoInRam
@@ -10668,68 +10679,57 @@ FlashInit:
 	ldrb	r0, [r3, #19]	@ zero_extendqisi2
 	bl	FlashGetReadRetryDefault
 	ldr	r3, [r4]
-	ldr	r2, .L1560+100
+	ldr	r2, .L1561+104
 	ldrb	r1, [r3, #9]	@ zero_extendqisi2
 	ldrh	r2, [r2]
 	addw	r2, r2, #4095
 	cmp	r1, r2, asr #12
-	blt	.L1482
+	blt	.L1483
 	ldrh	r2, [r3, #14]
 	adds	r2, r2, #255
 	cmp	r1, r2, asr #8
-	bge	.L1483
-.L1482:
+	bge	.L1484
+.L1483:
 	ldrh	r2, [r3, #14]
 	bic	r2, r2, #255
 	strh	r2, [r3, #14]	@ movhi
-.L1483:
-	ldr	r3, .L1560+104
+.L1484:
+	ldr	r3, .L1561+108
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	tst	r3, #6
-	beq	.L1484
+	beq	.L1485
 	bl	FlashSavePhyInfo
-	ldr	r3, .L1560+108
+	ldr	r3, .L1561+112
 	movs	r0, #0
 	ldr	r1, [r3]
 	bl	FlashDdrParaScan
-.L1484:
+.L1485:
 	bl	FlashSavePhyInfo
-.L1477:
-	ldr	fp, [r4]
-	ldr	r1, [sp, #32]
-	ldr	r5, .L1560+112
-	ldrh	r2, [fp, #16]
-	ldrb	r3, [fp, #26]	@ zero_extendqisi2
-	ldrh	r0, [fp, #10]
-	strb	r3, [r8]
-	ubfx	r3, r2, #7, #1
-	strb	r3, [r1]
+.L1478:
+	ldr	r8, [r4]
+	ldrh	r2, [r8, #16]
+	ldrb	r3, [r8, #26]	@ zero_extendqisi2
+	ldrh	r0, [r8, #10]
 	ubfx	r1, r2, #3, #1
-	ldr	r3, .L1560+116
+	strb	r3, [r10]
+	ubfx	r3, r2, #7, #1
+	strb	r3, [fp]
+	ldr	r3, .L1561+116
+	ldr	fp, .L1561+140
 	strb	r1, [r3]
 	ubfx	r1, r2, #4, #1
-	ldr	r3, .L1560+120
+	ldr	r3, .L1561+120
 	ubfx	r2, r2, #8, #3
 	strb	r1, [r3]
-	ldr	r3, .L1560+104
-	ldrb	r1, [fp, #12]	@ zero_extendqisi2
-	strb	r2, [r3]
-	movs	r2, #0
-	str	r2, [r5]
-	str	r3, [sp, #28]
-	bl	__aeabi_idiv
-	mov	r1, r0
-	ldrb	r0, [fp, #18]	@ zero_extendqisi2
-	bl	BuildFlashLsbPageTable
-	b	.L1561
-.L1562:
+	b	.L1562
+.L1563:
 	.align	2
-.L1560:
+.L1561:
 	.word	.LANCHOR147
 	.word	.LANCHOR153
-	.word	.LANCHOR152
-	.word	.LANCHOR197
 	.word	.LANCHOR30
+	.word	.LANCHOR2
+	.word	.LANCHOR197
 	.word	.LANCHOR198
 	.word	.LANCHOR199
 	.word	.LANCHOR150
@@ -10737,14 +10737,15 @@ FlashInit:
 	.word	.LANCHOR22
 	.word	.LANCHOR4
 	.word	.LANCHOR144
+	.word	.LANCHOR0
 	.word	.LC23
 	.word	.LANCHOR155
 	.word	.LANCHOR20
 	.word	.LANCHOR18
 	.word	.LANCHOR31
+	.word	1446522928
 	.word	.LANCHOR6
 	.word	.LANCHOR119
-	.word	1446522928
 	.word	.LANCHOR29
 	.word	.LANCHOR201
 	.word	.LANCHOR143+32
@@ -10753,251 +10754,263 @@ FlashInit:
 	.word	.LANCHOR122
 	.word	.LANCHOR24
 	.word	.LANCHOR148
-	.word	.LANCHOR145
 	.word	.LANCHOR202
 	.word	.LANCHOR27
 	.word	.LANCHOR3
-	.word	.LANCHOR2
 	.word	.LANCHOR200
-	.word	.LANCHOR0
+	.word	.LANCHOR152
 	.word	.LANCHOR15
-.L1561:
+	.word	.LANCHOR145
+.L1562:
+	ldr	r3, .L1564
+	ldrb	r1, [r8, #12]	@ zero_extendqisi2
+	strb	r2, [r3]
+	movs	r2, #0
+	str	r2, [fp]
+	str	r3, [sp, #24]
+	bl	__aeabi_idiv
+	mov	r1, r0
+	ldrb	r0, [r8, #18]	@ zero_extendqisi2
+	bl	BuildFlashLsbPageTable
 	bl	FlashDieInfoInit
 	ldr	r2, [r4]
-	ldr	r3, [sp, #28]
+	ldr	r3, [sp, #24]
 	ldrh	r1, [r2, #16]
-	mov	fp, r3
+	mov	r8, r3
 	tst	r1, #64
-	mov	r1, r5
-	beq	.L1486
+	mov	r1, fp
+	beq	.L1487
 	ldrb	r0, [r2, #19]	@ zero_extendqisi2
-	ldr	r3, .L1563
-	ldr	ip, .L1563+60
+	ldr	r3, .L1564+4
+	ldr	ip, .L1564+68
 	strb	r0, [r3]
 	ldrb	r2, [ip, #1]	@ zero_extendqisi2
-	ldr	r3, .L1563+4
+	ldr	r3, .L1564+8
 	ldrb	ip, [ip, #2]	@ zero_extendqisi2
 	strb	r2, [r3]
-	ldr	r2, .L1563+8
+	ldr	r2, .L1564+12
 	strb	ip, [r2]
 	add	ip, r0, #-1
 	cmp	ip, #7
 	mov	ip, r2
-	bhi	.L1487
-	ldr	r3, .L1563+12
-	str	r3, [r5]
+	bhi	.L1488
+	ldr	r3, .L1564+16
+	str	r3, [fp]
 	subs	r3, r0, #5
 	cmp	r3, #1
-	bls	.L1488
+	bls	.L1489
 	cmp	r0, #8
-	bne	.L1489
-.L1488:
-	ldr	r3, .L1563+16
+	bne	.L1490
+.L1489:
+	ldr	r3, .L1564+20
 	movs	r2, #1
 	str	r2, [r3]
-.L1489:
+.L1490:
 	cmp	r0, #7
-	ldr	r3, .L1563+20
-	beq	.L1490
+	ldr	r3, .L1564+24
+	beq	.L1491
 	sub	r2, r3, #8
 	cmp	r0, #8
 	it	ne
 	movne	r3, r2
-.L1490:
+.L1491:
 	subs	r1, r3, #1
 	movs	r2, #0
 	adds	r3, r3, #31
-.L1492:
-	ldrsb	r5, [r1, #1]!
-	cbnz	r5, .L1491
+.L1493:
+	ldrsb	ip, [r1, #1]!
+	cmp	ip, #0
+	bne	.L1492
 	adds	r2, r2, #1
-.L1491:
+.L1492:
 	cmp	r3, r1
-	bne	.L1492
+	bne	.L1493
 	cmp	r2, #27
-	bls	.L1486
+	bls	.L1487
 	bl	FlashGetReadRetryDefault
 	bl	FlashSavePhyInfo
-.L1486:
-	ldr	r3, .L1563+24
+.L1487:
+	ldr	r3, .L1564+28
 	ldr	r3, [r3]
-	cmp	r3, r10
-	bne	.L1503
-	ldrb	r3, [r8]	@ zero_extendqisi2
-	cbz	r3, .L1503
-	ldr	r3, .L1563+28
+	cmp	r3, r5
+	bne	.L1504
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	cbz	r3, .L1504
+	ldr	r3, .L1564+32
 	movs	r2, #0
 	ldr	r3, [r3]
 	strb	r2, [r3, #18]
-.L1503:
-	ldrb	r3, [r6]	@ zero_extendqisi2
+.L1504:
+	ldr	r3, .L1564+36
+	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #44
-	bne	.L1504
-	ldrb	r3, [r7]	@ zero_extendqisi2
-	cbz	r3, .L1504
+	bne	.L1505
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	cbz	r3, .L1505
 	movs	r3, #0
 	movs	r0, #1
-	strb	r3, [r7]
+	strb	r3, [r6]
 	bl	FlashSetInterfaceMode
 	movs	r0, #1
 	bl	NandcSetMode
-.L1504:
-	ldrb	r3, [fp]	@ zero_extendqisi2
+.L1505:
+	ldrb	r3, [r8]	@ zero_extendqisi2
 	tst	r3, #6
-	beq	.L1505
-	ldrb	r2, [r7]	@ zero_extendqisi2
-	cbnz	r2, .L1506
+	beq	.L1506
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	cbnz	r2, .L1507
 	lsls	r3, r3, #31
-	bmi	.L1505
-.L1506:
+	bmi	.L1506
+.L1507:
 	movs	r0, #0
 	bl	flash_enter_slc_mode
-	ldr	r3, .L1563+32
+	ldr	r3, .L1564+40
 	movs	r0, #0
 	ldr	r1, [r3]
 	bl	FlashDdrParaScan
 	movs	r0, #0
 	bl	flash_exit_slc_mode
-.L1505:
+.L1506:
 	ldr	r3, [r4]
-	movs	r7, #16
+	movs	r6, #16
 	ldrb	r0, [r3, #20]	@ zero_extendqisi2
 	bl	FlashBchSel
-	ldr	r0, .L1563+36
+	ldr	r0, .L1564+44
 	bl	FlashReadIdbDataRaw
 	ldr	r8, [r4]
-	ldr	r3, [sp, #24]
-	ldr	r4, .L1563+40
+	ldr	r3, [sp, #20]
+	ldr	r4, .L1564+48
 	ldrb	r1, [r8, #12]	@ zero_extendqisi2
-	strb	r7, [r3]
+	strb	r6, [r3]
 	ldrh	r5, [r8, #10]
 	strh	r1, [r4, #8]	@ movhi
 	ldrb	r3, [r8, #7]	@ zero_extendqisi2
+	ldrh	r10, [r8, #14]
 	mov	r0, r5
 	str	r3, [r4, #4]
-	ldr	r3, [r6]
-	ldrh	r6, [r8, #14]
+	ldr	r3, .L1564+36
+	ldr	r3, [r3]
 	str	r3, [r4]
-	ldr	r3, .L1563+44
+	ldr	r3, .L1564+52
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	strh	r3, [r4, #10]	@ movhi
 	ldrb	r3, [r8, #13]	@ zero_extendqisi2
 	strh	r5, [r4, #16]	@ movhi
-	strh	r6, [r4, #14]	@ movhi
+	strh	r10, [r4, #14]	@ movhi
 	strh	r3, [r4, #12]	@ movhi
 	bl	__aeabi_idiv
-	mov	r2, #512
 	strh	r0, [r4, #18]	@ movhi
+	mov	r2, #512
 	ldrb	r3, [r8, #9]	@ zero_extendqisi2
 	strh	r2, [r4, #24]	@ movhi
-	ldr	r2, [sp, #20]
+	ldrb	r2, [r7]	@ zero_extendqisi2
 	strh	r3, [r4, #20]	@ movhi
 	smulbb	r5, r5, r3
-	strh	r7, [r4, #26]	@ movhi
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	uxth	r5, r5
+	strh	r6, [r4, #26]	@ movhi
 	cmp	r2, #1
+	uxth	r5, r5
 	strh	r5, [r4, #22]	@ movhi
-	bne	.L1507
+	bne	.L1508
 	lsls	r3, r3, #1
-	lsrs	r2, r6, #1
+	lsr	r2, r10, #1
 	lsls	r5, r5, #1
 	strh	r3, [r4, #20]	@ movhi
 	movs	r3, #8
 	strh	r2, [r4, #14]	@ movhi
 	strh	r5, [r4, #22]	@ movhi
 	strh	r3, [r4, #26]	@ movhi
-.L1507:
+.L1508:
 	ldrb	r0, [r8, #20]	@ zero_extendqisi2
 	bl	FlashBchSel
 	movs	r0, #0
 .L1457:
-	add	sp, sp, #40
+	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1473:
+.L1474:
 	cmp	r3, #220
-	bne	.L1475
+	bne	.L1476
 	mov	r1, #4096
-	b	.L1556
-.L1475:
+	b	.L1557
+.L1476:
 	cmp	r3, #211
 	itttt	eq
 	moveq	r3, #4096
 	strheq	r3, [r2, #14]	@ movhi
 	moveq	r3, #2
 	strbeq	r3, [r2, #13]
-	b	.L1474
-.L1487:
+	b	.L1475
+.L1488:
 	sub	lr, r0, #17
 	cmp	lr, #2
-	bhi	.L1494
-	ldr	r3, .L1563+48
+	bhi	.L1495
+	ldr	r3, .L1564+56
 	cmp	r0, #19
-	str	r3, [r5]
+	str	r3, [fp]
 	ite	ne
 	movne	r3, #7
 	moveq	r3, #15
 	strb	r3, [r2]
-	b	.L1486
-.L1494:
+	b	.L1487
+.L1495:
 	cmp	r0, #33
-	beq	.L1496
+	beq	.L1497
 	sub	r2, r0, #65
 	cmp	r2, #1
-	bhi	.L1497
-.L1496:
-	ldr	r2, .L1563+52
+	bhi	.L1498
+.L1497:
+	ldr	r2, .L1564+60
 	str	r2, [r1]
 	movs	r2, #4
 	strb	r2, [r3]
 	movs	r3, #7
 	strb	r3, [ip]
-	b	.L1486
-.L1497:
+	b	.L1487
+.L1498:
 	sub	r2, r0, #67
 	uxtb	r2, r2
 	cmp	r2, #1
-	bls	.L1498
+	bls	.L1499
 	sub	ip, r0, #34
 	cmp	ip, #1
-	bhi	.L1499
-.L1498:
-	ldr	r5, .L1563+52
+	bhi	.L1500
+.L1499:
+	ldr	ip, .L1564+60
 	cmp	r0, #35
-	str	r5, [r1]
-	ldr	r1, .L1563+8
-	beq	.L1500
+	str	ip, [r1]
+	ldr	r1, .L1564+12
+	beq	.L1501
 	cmp	r0, #68
-	beq	.L1500
+	beq	.L1501
 	movs	r0, #7
-.L1557:
+.L1558:
 	cmp	r2, #1
 	strb	r0, [r1]
 	ite	ls
 	movls	r2, #4
 	movhi	r2, #5
 	strb	r2, [r3]
-	b	.L1486
-.L1500:
+	b	.L1487
+.L1501:
 	movs	r0, #17
-	b	.L1557
-.L1499:
+	b	.L1558
+.L1500:
 	cmp	r0, #49
 	itt	eq
-	ldreq	r3, .L1563+56
-	streq	r3, [r5]
-	b	.L1486
-.L1509:
+	ldreq	r3, .L1564+64
+	streq	r3, [fp]
+	b	.L1487
+.L1510:
 	mvn	r0, #1
 	b	.L1457
-.L1469:
-	ldr	r5, [sp, #28]
-	strb	r0, [r5]
-	b	.L1468
-.L1564:
+.L1470:
+	ldr	r0, [sp, #24]
+	strb	r10, [r0]
+	b	.L1469
+.L1565:
 	.align	2
-.L1563:
+.L1564:
+	.word	.LANCHOR24
 	.word	.LANCHOR9
 	.word	.LANCHOR12
 	.word	.LANCHOR151
@@ -11006,6 +11019,7 @@ FlashInit:
 	.word	.LANCHOR20+28
 	.word	.LANCHOR119
 	.word	.LANCHOR18
+	.word	.LANCHOR22
 	.word	.LANCHOR148
 	.word	.LANCHOR141
 	.word	.LANCHOR14
@@ -11026,7 +11040,7 @@ FlashInit:
 FlashReadSlc2KPages:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1622
+	ldr	r3, .L1623
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	movs	r7, #0
@@ -11034,15 +11048,15 @@ FlashReadSlc2KPages:
 	ldrb	fp, [r3, #9]	@ zero_extendqisi2
 	str	r1, [sp, #8]
 	str	r2, [sp, #12]
-.L1566:
+.L1567:
 	ldr	r3, [sp, #8]
 	cmp	r7, r3
-	bne	.L1590
+	bne	.L1591
 	movs	r0, #0
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1590:
+.L1591:
 	ldr	r3, [sp, #8]
 	add	r2, sp, #20
 	ldr	r1, [sp, #12]
@@ -11052,26 +11066,26 @@ FlashReadSlc2KPages:
 	str	r3, [sp]
 	add	r3, sp, #16
 	bl	LogAddr2PhyAddr
-	ldr	r2, .L1622+4
+	ldr	r2, .L1623+4
 	ldr	r3, [sp, #16]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, r3
-	bhi	.L1567
+	bhi	.L1568
 	mov	r3, #-1
 	str	r3, [r4]
-.L1568:
+.L1569:
 	adds	r7, r7, #1
 	adds	r4, r4, #36
-	b	.L1566
-.L1567:
-	ldr	r2, .L1622+8
+	b	.L1567
+.L1568:
+	ldr	r2, .L1623+8
 	mov	r8, #0
 	ldrb	r5, [r2, r3]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	NandcWaitFlashReady
 	mov	r0, r5
 	bl	NandcFlashCs
-.L1569:
+.L1570:
 	ldr	r1, [sp, #20]
 	mov	r0, r5
 	bl	FlashReadCmd
@@ -11084,23 +11098,23 @@ FlashReadSlc2KPages:
 	str	r3, [sp]
 	ldr	r3, [r4, #8]
 	bl	NandcXferData
-	ldr	r3, .L1622+12
+	ldr	r3, .L1623+12
 	mov	r6, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1570
-.L1573:
+	bne	.L1571
+.L1574:
 	adds	r3, r6, #1
-	beq	.L1571
-.L1572:
+	beq	.L1572
+.L1573:
 	cmp	r8, #0
-	beq	.L1575
-.L1574:
-	mov	r6, #256
+	beq	.L1576
 .L1575:
-	mov	r8, #0
+	mov	r6, #256
 .L1576:
-	ldr	r3, .L1622+16
+	mov	r8, #0
+.L1577:
+	ldr	r3, .L1623+16
 	mov	r0, r5
 	ldr	r1, [sp, #20]
 	ldr	r3, [r3]
@@ -11109,109 +11123,109 @@ FlashReadSlc2KPages:
 	mov	r0, r5
 	bl	NandcWaitFlashReady
 	ldr	r3, [r4, #8]
-	cbz	r3, .L1577
+	cbz	r3, .L1578
 	add	r3, r3, #2048
-.L1577:
+.L1578:
 	ldr	r2, [r4, #12]
-	cbz	r2, .L1578
+	cbz	r2, .L1579
 	adds	r2, r2, #8
-.L1578:
+.L1579:
 	str	r2, [sp]
 	movs	r1, #0
 	mov	r2, fp
 	mov	r0, r5
 	bl	NandcXferData
-	ldr	r3, .L1622+12
+	ldr	r3, .L1623+12
 	mov	r10, r0
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	cmp	r2, #0
-	bne	.L1579
-.L1582:
+	bne	.L1580
+.L1583:
 	cmp	r10, #-1
-	beq	.L1580
-.L1581:
+	beq	.L1581
+.L1582:
 	cmp	r8, #0
-	beq	.L1584
-.L1583:
-	mov	r10, #256
+	beq	.L1585
 .L1584:
+	mov	r10, #256
+.L1585:
 	mov	r0, r5
 	bl	NandcFlashDeCs
-	ldr	r2, .L1622+20
+	ldr	r2, .L1623+20
 	cmp	r6, r10
 	it	cc
 	movcc	r6, r10
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	add	r3, r2, r2, lsl #1
 	cmp	r6, r3, asr #2
-	bhi	.L1585
+	bhi	.L1586
 	movs	r3, #0
-.L1621:
+.L1622:
 	str	r3, [r4]
 	ldr	r3, [r4, #12]
-	cbz	r3, .L1586
+	cbz	r3, .L1587
 	ldr	r1, [r3, #12]
 	adds	r1, r1, #1
-	bne	.L1586
+	bne	.L1587
 	ldr	r1, [r3, #8]
 	adds	r0, r1, #1
-	bne	.L1586
+	bne	.L1587
 	ldr	r3, [r3]
 	adds	r3, r3, #1
 	it	ne
 	strne	r1, [r4]
-.L1586:
+.L1587:
 	ldr	r3, [r4]
 	adds	r1, r3, #1
-	bne	.L1568
+	bne	.L1569
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1622+24
+	ldr	r0, .L1623+24
 	bl	printf
 	ldr	r1, [r4, #8]
-	cbz	r1, .L1588
+	cbz	r1, .L1589
 	movs	r3, #8
 	movs	r2, #4
-	ldr	r0, .L1622+28
+	ldr	r0, .L1623+28
 	bl	rknand_print_hex
-.L1588:
+.L1589:
 	ldr	r1, [r4, #12]
 	cmp	r1, #0
-	beq	.L1568
+	beq	.L1569
 	movs	r3, #4
-	ldr	r0, .L1622+32
+	ldr	r0, .L1623+32
 	mov	r2, r3
 	bl	rknand_print_hex
-	b	.L1568
-.L1570:
+	b	.L1569
+.L1571:
 	mov	r0, r5
 	bl	flash_read_ecc
 	cmp	r0, #5
-	bls	.L1573
+	bls	.L1574
 	mov	r6, #256
-	b	.L1572
-.L1571:
+	b	.L1573
+.L1572:
 	cmp	r8, #10
-	beq	.L1574
+	beq	.L1575
 	add	r8, r8, #1
-	b	.L1569
-.L1579:
+	b	.L1570
+.L1580:
 	mov	r0, r5
 	bl	flash_read_ecc
 	cmp	r0, #5
-	bls	.L1582
+	bls	.L1583
 	mov	r10, #256
-	b	.L1581
-.L1580:
+	b	.L1582
+.L1581:
 	cmp	r8, #10
-	beq	.L1583
+	beq	.L1584
 	add	r8, r8, #1
-	b	.L1576
-.L1585:
+	b	.L1577
+.L1586:
 	mov	r3, #256
-	b	.L1621
-.L1623:
+	b	.L1622
+.L1624:
 	.align	2
-.L1622:
+.L1623:
 	.word	.LANCHOR31
 	.word	.LANCHOR25
 	.word	.LANCHOR26
@@ -11233,36 +11247,36 @@ FlashReadSlc2KPages:
 FlashReadPages:
 	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1715
+	ldr	r3, .L1716
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #40
 	mov	r10, r0
 	str	r1, [sp, #24]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r2, [sp, #12]
-	cbnz	r3, .L1625
-	ldr	r2, .L1715+4
+	cbnz	r3, .L1626
+	ldr	r2, .L1716+4
 	mov	r8, r3
 	str	r3, [sp, #8]
 	ldrb	r2, [r2, #9]	@ zero_extendqisi2
 	str	r2, [sp, #20]
-	ldr	r2, .L1715+8
+	ldr	r2, .L1716+8
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	str	r2, [sp, #28]
-.L1626:
+.L1627:
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #24]
 	cmp	r3, r2
-	bcc	.L1664
+	bcc	.L1665
 	movs	r0, #0
-	b	.L1624
-.L1625:
+	b	.L1625
+.L1626:
 	bl	FlashReadSlc2KPages
-.L1624:
+.L1625:
 	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1664:
+.L1665:
 	ldr	r2, [sp, #8]
 	movs	r3, #36
 	ldr	r1, [sp, #12]
@@ -11278,86 +11292,86 @@ FlashReadPages:
 	str	r3, [sp]
 	add	r3, sp, #32
 	bl	LogAddr2PhyAddr
-	ldr	r2, .L1715+12
+	ldr	r2, .L1716+12
 	mov	r5, r0
 	ldr	r3, [sp, #32]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, r3
-	bhi	.L1628
+	bhi	.L1629
 	mov	r3, #-1
 	str	r3, [r10, fp]
-.L1629:
+.L1630:
 	ldr	r3, [sp, #8]
 	adds	r3, r3, #1
 	str	r3, [sp, #8]
-	b	.L1626
-.L1628:
-	ldr	r2, .L1715+16
+	b	.L1627
+.L1629:
+	ldr	r2, .L1716+16
 	ldrb	r4, [r2, r3]	@ zero_extendqisi2
-	ldr	r3, .L1715+20
+	ldr	r3, .L1716+20
 	mov	r0, r4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
 	it	eq
 	moveq	r5, #0
 	bl	NandcWaitFlashReady
-	ldr	r3, .L1715+24
+	ldr	r3, .L1716+24
 	ldr	r3, [r3]
 	ldrb	r2, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r2, #1
 	cmp	r3, #7
-	bhi	.L1631
-	ldr	r3, .L1715+28
+	bhi	.L1632
+	ldr	r3, .L1716+28
 	subs	r2, r2, #7
 	cmp	r2, #1
-	ldr	r2, .L1715+32
+	ldr	r2, .L1716+32
 	add	r1, r3, r4
 	ldrb	r3, [r1, #12]	@ zero_extendqisi2
 	ldrb	r2, [r2, r4]	@ zero_extendqisi2
 	it	ls
 	ldrbls	r3, [r1, #20]	@ zero_extendqisi2
 	cmp	r2, r3
-	beq	.L1631
-	ldr	r2, .L1715+36
+	beq	.L1632
+	ldr	r2, .L1716+36
 	mov	r0, r4
 	ldrb	r1, [r2, #-3]	@ zero_extendqisi2
 	bl	HynixSetRRPara
-.L1631:
+.L1632:
 	mov	r0, r4
 	bl	NandcFlashCs
 	ldr	r3, [sp, #12]
 	cmp	r3, #1
-	beq	.L1633
+	beq	.L1634
 	ldr	r3, [sp, #16]
 	cmp	r3, #0
-	bge	.L1634
-.L1633:
-	ldr	r3, .L1715+40
+	bge	.L1635
+.L1634:
+	ldr	r3, .L1716+40
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1634
+	cbz	r3, .L1635
 	mov	r0, r4
 	bl	flash_enter_slc_mode
-.L1641:
+.L1642:
 	ldr	r1, [sp, #36]
 	adds	r6, r1, #1
-	bne	.L1636
+	bne	.L1637
 	cmp	r4, #255
-	beq	.L1666
-.L1636:
-	cbz	r5, .L1638
-	ldr	r3, .L1715+44
+	beq	.L1667
+.L1637:
+	cbz	r5, .L1639
+	ldr	r3, .L1716+44
 	mov	r0, r4
 	ldr	r2, [r3]
 	add	r2, r2, r1
 	bl	FlashReadDpCmd
-.L1639:
+.L1640:
 	mov	r0, r4
 	bl	NandcWaitFlashReady
-	cbz	r5, .L1637
+	cbz	r5, .L1638
 	ldr	r1, [sp, #36]
 	mov	r0, r4
 	bl	FlashReadDpDataOutCmd
-.L1637:
+.L1638:
 	ldr	r3, [r7, #12]
 	movs	r1, #0
 	ldr	r2, [sp, #20]
@@ -11365,30 +11379,30 @@ FlashReadPages:
 	str	r3, [sp]
 	ldr	r3, [r7, #8]
 	bl	NandcXferData
-	ldr	r3, .L1715+8
+	ldr	r3, .L1716+8
 	mov	r6, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1640
+	cbz	r3, .L1641
 	adds	r0, r0, #1
-	bne	.L1640
-	ldr	r3, .L1715+8
+	bne	.L1641
+	ldr	r3, .L1716+8
 	movs	r5, #0
 	strb	r5, [r3]
-	b	.L1641
-.L1634:
+	b	.L1642
+.L1635:
 	mov	r0, r4
 	bl	flash_exit_slc_mode
-	b	.L1641
-.L1638:
+	b	.L1642
+.L1639:
 	mov	r0, r4
 	bl	FlashReadCmd
-	b	.L1639
-.L1666:
+	b	.L1640
+.L1667:
 	movs	r5, #0
-	b	.L1637
-.L1640:
-	cbz	r5, .L1642
-	ldr	r3, .L1715+44
+	b	.L1638
+.L1641:
+	cbz	r5, .L1643
+	ldr	r3, .L1716+44
 	mov	r0, r4
 	ldr	r1, [sp, #36]
 	ldr	r3, [r3]
@@ -11407,30 +11421,30 @@ FlashReadPages:
 	mov	r8, r0
 	it	eq
 	moveq	r5, #0
-.L1642:
+.L1643:
 	mov	r0, r4
 	bl	NandcFlashDeCs
-	ldr	r3, .L1715+8
+	ldr	r3, .L1716+8
 	adds	r1, r6, #1
 	ldrb	r2, [sp, #28]	@ zero_extendqisi2
 	strb	r2, [r3]
-	bne	.L1643
-	ldr	r3, .L1715+48
+	bne	.L1644
+	ldr	r3, .L1716+48
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L1644
-.L1648:
-	ldr	r3, .L1715+52
+	cbnz	r3, .L1645
+.L1649:
+	ldr	r3, .L1716+52
 	ldr	r5, [r3]
 	cmp	r5, #0
-	bne	.L1645
+	bne	.L1646
 	ldr	r3, [r7, #12]
 	mov	r0, r4
 	ldr	r2, [r7, #8]
 	ldr	r1, [sp, #36]
 	bl	FlashReadRawPage
-	b	.L1714
-.L1644:
-	ldr	r3, .L1715+56
+	b	.L1715
+.L1645:
+	ldr	r3, .L1716+56
 	mov	r0, r4
 	ldr	r1, [sp, #36]
 	ldr	r3, [r3]
@@ -11442,33 +11456,33 @@ FlashReadPages:
 	bl	FlashDdrTunningRead
 	adds	r2, r0, #1
 	mov	r6, r0
-	beq	.L1647
-	ldr	r3, .L1715+60
+	beq	.L1648
+	ldr	r3, .L1716+60
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r0, r3, lsr #1
-	bls	.L1667
-.L1647:
+	bls	.L1668
+.L1648:
 	ubfx	r0, r5, #8, #8
 	bl	NandcSetDdrPara
 	adds	r3, r6, #1
-	beq	.L1648
-.L1667:
+	beq	.L1649
+.L1668:
 	movs	r5, #0
-.L1643:
-	ldr	r3, .L1715+60
+.L1644:
+	ldr	r3, .L1716+60
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r6, r3, asr #2
-	bls	.L1656
-	ldr	r3, .L1715+52
+	bls	.L1657
+	ldr	r3, .L1716+52
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L1656
+	bne	.L1657
 	mov	r6, #256
-	b	.L1651
-.L1716:
+	b	.L1652
+.L1717:
 	.align	2
-.L1715:
+.L1716:
 	.word	.LANCHOR2
 	.word	.LANCHOR31
 	.word	.LANCHOR6
@@ -11485,7 +11499,7 @@ FlashReadPages:
 	.word	.LANCHOR145
 	.word	.LANCHOR19
 	.word	.LANCHOR33
-.L1645:
+.L1646:
 	ldr	r3, [r7, #12]
 	mov	r0, r4
 	ldr	r2, [r7, #8]
@@ -11493,128 +11507,128 @@ FlashReadPages:
 	blx	r5
 	adds	r5, r0, #1
 	mov	r6, r0
-	bne	.L1649
-	ldr	r3, .L1717
+	bne	.L1650
+	ldr	r3, .L1718
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	cmp	r3, #7
-	bhi	.L1650
-	ldr	r2, .L1717+4
+	bhi	.L1651
+	ldr	r2, .L1718+4
 	movs	r3, #0
 	mov	r0, r4
 	ldrb	r1, [r2, #-3]	@ zero_extendqisi2
 	bl	HynixSetRRPara
-.L1650:
+.L1651:
 	ldr	r3, [r7, #12]
 	mov	r0, r4
 	ldr	r2, [r7, #8]
 	ldr	r1, [sp, #36]
 	bl	FlashReadRawPage
-	ldr	r2, .L1717+8
+	ldr	r2, .L1718+8
 	mov	r6, r0
 	mov	r3, r0
 	ldr	r1, [r7, #4]
-	ldr	r0, .L1717+12
+	ldr	r0, .L1718+12
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	bl	printf
 	adds	r0, r6, #1
-	bne	.L1649
-	ldr	r3, .L1717+16
+	bne	.L1650
+	ldr	r3, .L1718+16
 	ldrb	r5, [r3]	@ zero_extendqisi2
-	cbz	r5, .L1651
+	cbz	r5, .L1652
 	ldr	r3, [sp, #12]
 	mov	r0, r4
 	cmp	r3, #1
-	beq	.L1652
+	beq	.L1653
 	ldr	r3, [sp, #16]
 	cmp	r3, #0
-	bge	.L1653
-.L1652:
+	bge	.L1654
+.L1653:
 	bl	flash_enter_slc_mode
-.L1654:
-	ldr	r3, .L1717+20
+.L1655:
+	ldr	r3, .L1718+20
 	mov	r0, r4
 	ldr	r2, [r7, #8]
 	ldr	r1, [sp, #36]
 	ldr	r5, [r3]
 	ldr	r3, [r7, #12]
 	blx	r5
-.L1714:
+.L1715:
 	adds	r1, r0, #1
 	mov	r6, r0
 	mov	r5, #0
-	bne	.L1656
-.L1651:
+	bne	.L1657
+.L1652:
 	str	r6, [r10, fp]
-.L1657:
+.L1658:
 	ldr	r3, [r10, fp]
 	adds	r2, r3, #1
-	bne	.L1659
-	ldr	r2, .L1717+8
+	bne	.L1660
+	ldr	r2, .L1718+8
 	ldr	r1, [r7, #4]
-	ldr	r0, .L1717+24
+	ldr	r0, .L1718+24
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	bl	printf
 	ldr	r1, [r7, #12]
-	cbz	r1, .L1659
+	cbz	r1, .L1660
 	movs	r3, #4
-	ldr	r0, .L1717+28
+	ldr	r0, .L1718+28
 	mov	r2, r3
 	bl	rknand_print_hex
-.L1659:
-	cbz	r5, .L1661
-	ldr	r3, .L1717+8
+.L1660:
+	cbz	r5, .L1662
+	ldr	r3, .L1718+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r8, r3, asr #2
-	bls	.L1662
-	ldr	r3, .L1717+20
+	bls	.L1663
+	ldr	r3, .L1718+20
 	ldr	r3, [r3]
 	cmp	r3, #0
 	it	eq
 	moveq	r8, #256
-.L1662:
+.L1663:
 	cmp	r8, #-1
 	add	r3, fp, #36
 	str	r8, [r10, r3]
-	beq	.L1661
+	beq	.L1662
 	cmp	r8, #256
 	itt	ne
 	movne	r2, #0
 	strne	r2, [r10, r3]
-.L1661:
+.L1662:
 	ldr	r3, [sp, #8]
 	add	r3, r3, r5
 	str	r3, [sp, #8]
 	ldr	r3, [sp, #12]
 	cmp	r3, #1
-	beq	.L1663
+	beq	.L1664
 	ldr	r3, [sp, #16]
 	cmp	r3, #0
-	bge	.L1629
-.L1663:
-	ldr	r3, .L1717+16
+	bge	.L1630
+.L1664:
+	ldr	r3, .L1718+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1629
+	beq	.L1630
 	mov	r0, r4
 	bl	flash_exit_slc_mode
-	b	.L1629
-.L1653:
+	b	.L1630
+.L1654:
 	bl	flash_exit_slc_mode
-	b	.L1654
-.L1649:
+	b	.L1655
+.L1650:
 	movs	r5, #0
-.L1656:
+.L1657:
 	cmp	r6, #256
-	beq	.L1651
+	beq	.L1652
 	movs	r3, #0
 	str	r3, [r10, fp]
-	b	.L1657
-.L1718:
+	b	.L1658
+.L1719:
 	.align	2
-.L1717:
+.L1718:
 	.word	.LANCHOR18
 	.word	.LANCHOR20+4
 	.word	.LANCHOR33
@@ -11641,23 +11655,23 @@ FlashProgSlc2KPages:
 	mov	r8, r1
 	mov	r4, r0
 	mov	r6, r0
-	ldr	r3, .L1748
+	ldr	r3, .L1749
 	movs	r7, #0
-	ldr	fp, .L1748+28
+	ldr	fp, .L1749+28
 	str	r2, [sp, #8]
 	ldrb	r10, [r3, #9]	@ zero_extendqisi2
-.L1720:
+.L1721:
 	cmp	r7, r8
-	bne	.L1726
+	bne	.L1727
 	ldr	r3, [sp, #12]
 	cmp	r3, #0
-	bne	.L1737
-.L1747:
+	bne	.L1738
+.L1748:
 	movs	r0, #0
 	add	sp, sp, #64
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1726:
+.L1727:
 	sub	r3, r8, r7
 	add	r2, sp, #20
 	uxtb	r3, r3
@@ -11666,19 +11680,19 @@ FlashProgSlc2KPages:
 	str	r3, [sp]
 	add	r3, sp, #24
 	bl	LogAddr2PhyAddr
-	ldr	r2, .L1748+4
+	ldr	r2, .L1749+4
 	ldr	r3, [sp, #24]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, r3
-	bhi	.L1721
+	bhi	.L1722
 	mov	r3, #-1
 	str	r3, [r6]
-.L1722:
+.L1723:
 	adds	r7, r7, #1
 	adds	r6, r6, #36
-	b	.L1720
-.L1721:
-	ldr	r2, .L1748+8
+	b	.L1721
+.L1722:
+	ldr	r2, .L1749+8
 	ldrb	r5, [r2, r3]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	NandcWaitFlashReady
@@ -11710,13 +11724,13 @@ FlashProgSlc2KPages:
 	add	r1, r1, r3
 	bl	FlashProgFirstCmd
 	ldr	r3, [r6, #8]
-	cbz	r3, .L1723
+	cbz	r3, .L1724
 	add	r3, r3, #2048
-.L1723:
+.L1724:
 	ldr	r2, [r6, #12]
-	cbz	r2, .L1724
+	cbz	r2, .L1725
 	adds	r2, r2, #8
-.L1724:
+.L1725:
 	str	r2, [sp]
 	movs	r1, #1
 	mov	r2, r10
@@ -11738,24 +11752,24 @@ FlashProgSlc2KPages:
 	movmi	r3, #-1
 	strmi	r3, [r6]
 	bl	NandcFlashDeCs
-	b	.L1722
-.L1733:
+	b	.L1723
+.L1734:
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	bne	.L1728
+	bne	.L1729
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1748+12
+	ldr	r0, .L1749+12
 	bl	printf
-.L1729:
+.L1730:
 	add	r8, r8, #1
 	adds	r4, r4, #36
-.L1727:
-	cmp	r7, r8
-	bne	.L1733
-	b	.L1747
 .L1728:
+	cmp	r7, r8
+	bne	.L1734
+	b	.L1748
+.L1729:
 	sub	r3, r7, r8
-	ldr	fp, .L1748+32
+	ldr	fp, .L1749+32
 	uxtb	r3, r3
 	add	r2, sp, #20
 	ldr	r1, [sp, #8]
@@ -11784,46 +11798,46 @@ FlashProgSlc2KPages:
 	bl	FlashReadPages
 	ldr	r5, [sp, #28]
 	adds	r3, r5, #1
-	bne	.L1730
+	bne	.L1731
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1748+16
+	ldr	r0, .L1749+16
 	bl	printf
 	str	r5, [r4]
-.L1730:
+.L1731:
 	ldr	r3, [r4, #12]
-	cbz	r3, .L1731
+	cbz	r3, .L1732
 	ldr	r2, [r3]
 	ldr	r3, [fp]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L1731
+	beq	.L1732
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1748+20
+	ldr	r0, .L1749+20
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4]
-.L1731:
+.L1732:
 	ldr	r3, [r4, #8]
 	cmp	r3, #0
-	beq	.L1729
+	beq	.L1730
 	ldr	r2, [r3]
 	ldr	r3, [r10]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L1729
+	beq	.L1730
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1748+24
+	ldr	r0, .L1749+24
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4]
-	b	.L1729
-.L1737:
+	b	.L1730
+.L1738:
 	mov	r8, #0
-	ldr	r10, .L1748+36
-	b	.L1727
-.L1749:
+	ldr	r10, .L1749+36
+	b	.L1728
+.L1750:
 	.align	2
-.L1748:
+.L1749:
 	.word	.LANCHOR31
 	.word	.LANCHOR25
 	.word	.LANCHOR26
@@ -11848,7 +11862,7 @@ FlashProgPages:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #72
-	ldr	r5, .L1802
+	ldr	r5, .L1803
 	mov	r4, r0
 	mov	r8, r2
 	str	r1, [sp, #8]
@@ -11856,36 +11870,36 @@ FlashProgPages:
 	str	r3, [sp, #20]
 	ldrb	r5, [r5, #19]	@ zero_extendqisi2
 	str	r5, [sp, #16]
-	ldr	r5, .L1802+4
+	ldr	r5, .L1803+4
 	ldrb	r7, [r5]	@ zero_extendqisi2
-	cbnz	r7, .L1751
-	ldr	r3, .L1802+8
+	cbnz	r7, .L1752
+	ldr	r3, .L1803+8
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
 	str	r3, [sp, #12]
-.L1752:
+.L1753:
 	ldr	r3, [sp, #8]
 	cmp	r7, r3
-	bcc	.L1765
-	ldr	r6, .L1802+12
+	bcc	.L1766
+	ldr	r6, .L1803+12
 	movs	r5, #0
-	ldr	r7, .L1802+16
-.L1766:
+	ldr	r7, .L1803+16
+.L1767:
 	ldrb	r3, [r6]	@ zero_extendqisi2
 	cmp	r5, r3
-	bcc	.L1768
+	bcc	.L1769
 	ldr	r3, [sp, #20]
 	cmp	r3, #0
-	bne	.L1769
-.L1777:
+	bne	.L1770
+.L1778:
 	movs	r0, #0
-	b	.L1750
-.L1751:
+	b	.L1751
+.L1752:
 	bl	FlashProgSlc2KPages
-.L1750:
+.L1751:
 	add	sp, sp, #72
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1765:
+.L1766:
 	ldr	r3, [sp, #8]
 	movs	r6, #36
 	muls	r6, r7, r6
@@ -11898,81 +11912,81 @@ FlashProgPages:
 	mov	r0, fp
 	add	r3, sp, #32
 	bl	LogAddr2PhyAddr
-	ldr	r3, .L1802+12
+	ldr	r3, .L1803+12
 	mov	r10, r0
 	ldr	r0, [sp, #32]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r0
-	bhi	.L1754
+	bhi	.L1755
 	mov	r3, #-1
 	str	r3, [r4, r6]
-.L1755:
+.L1756:
 	adds	r7, r7, #1
-	b	.L1752
-.L1754:
-	ldr	r3, .L1802+20
+	b	.L1753
+.L1755:
+	ldr	r3, .L1803+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	ldr	r3, .L1802+24
+	ldr	r3, .L1803+24
 	it	eq
 	moveq	r10, #0
 	add	r3, r3, r0, lsl #4
 	ldr	r3, [r3, #8]
-	cbz	r3, .L1757
+	cbz	r3, .L1758
 	uxtb	r0, r0
 	bl	FlashWaitCmdDone
-.L1757:
+.L1758:
 	ldr	r3, [sp, #32]
 	movs	r1, #0
-	ldr	r2, .L1802+24
+	ldr	r2, .L1803+24
 	add	r2, r2, r3, lsl #4
 	str	r1, [r2, #12]
 	ldr	r1, [sp, #28]
 	str	fp, [r2, #8]
 	str	r1, [r2, #4]
 	cmp	r10, #0
-	beq	.L1758
+	beq	.L1759
 	add	r1, r6, #36
 	add	r1, r1, r4
 	str	r1, [r2, #12]
-.L1758:
-	ldr	r2, .L1802+28
+.L1759:
+	ldr	r2, .L1803+28
 	ldrb	r5, [r2, r3]	@ zero_extendqisi2
 	lsls	r3, r3, #4
-	ldr	r2, .L1802+24
+	ldr	r2, .L1803+24
 	mov	r0, r5
 	strb	r5, [r2, r3]
-	ldr	r3, .L1802+12
+	ldr	r3, .L1803+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1759
+	bne	.L1760
 	bl	NandcWaitFlashReady
-.L1760:
+.L1761:
 	ldr	r3, [sp, #16]
 	subs	r3, r3, #1
 	cmp	r3, #7
-	bhi	.L1761
-	ldr	r3, .L1802+32
+	bhi	.L1762
+	ldr	r3, .L1803+32
 	ldrb	r3, [r3, r5]	@ zero_extendqisi2
-	cbz	r3, .L1761
-	ldr	r1, .L1802+36
+	cbz	r3, .L1762
+	ldr	r1, .L1803+36
 	movs	r3, #0
 	mov	r0, r5
 	adds	r2, r1, #4
 	ldrb	r1, [r1, #1]	@ zero_extendqisi2
 	bl	HynixSetRRPara
-.L1761:
+.L1762:
 	mov	r0, r5
 	bl	NandcFlashCs
 	cmp	r8, #1
 	mov	r0, r5
-	bne	.L1762
-	ldr	r3, .L1802+16
+	bne	.L1763
+	ldr	r3, .L1803+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1762
+	beq	.L1763
 	bl	flash_enter_slc_mode
-.L1763:
+.L1764:
 	ldr	r1, [sp, #28]
 	mov	r0, r5
 	bl	FlashProgFirstCmd
@@ -11984,11 +11998,11 @@ FlashProgPages:
 	ldr	r3, [fp, #8]
 	bl	NandcXferData
 	cmp	r10, #0
-	beq	.L1764
+	beq	.L1765
 	ldr	r1, [sp, #28]
 	mov	r0, r5
 	bl	FlashProgDpFirstCmd
-	ldr	r3, .L1802+40
+	ldr	r3, .L1803+40
 	mov	r0, r5
 	ldr	r2, [sp, #32]
 	adds	r6, r6, #36
@@ -11999,7 +12013,7 @@ FlashProgPages:
 	it	ne
 	movne	r2, #1
 	bl	FlashWaitReadyEN
-	ldr	r3, .L1802+44
+	ldr	r3, .L1803+44
 	mov	r0, r5
 	ldr	r1, [sp, #28]
 	ldr	r3, [r3]
@@ -12012,19 +12026,19 @@ FlashProgPages:
 	str	r3, [sp]
 	ldr	r3, [r6, #8]
 	bl	NandcXferData
-.L1764:
+.L1765:
 	ldr	r1, [sp, #28]
 	mov	r0, r5
 	bl	FlashProgSecondCmd
 	mov	r0, r5
 	add	r7, r7, r10
 	bl	NandcFlashDeCs
-	b	.L1755
-.L1759:
+	b	.L1756
+.L1760:
 	bl	NandcFlashCs
 	ldr	r2, [sp, #32]
 	mov	r0, r5
-	ldr	r3, .L1802+40
+	ldr	r3, .L1803+40
 	ldr	r1, [sp, #28]
 	ldr	r2, [r3, r2, lsl #2]
 	adds	r2, r2, #0
@@ -12033,45 +12047,45 @@ FlashProgPages:
 	bl	FlashWaitReadyEN
 	mov	r0, r5
 	bl	NandcFlashDeCs
-	b	.L1760
-.L1762:
+	b	.L1761
+.L1763:
 	bl	flash_exit_slc_mode
-	b	.L1763
-.L1768:
+	b	.L1764
+.L1769:
 	uxtb	r0, r5
 	bl	FlashWaitCmdDone
 	cmp	r8, #1
-	bne	.L1767
+	bne	.L1768
 	ldrb	r3, [r7]	@ zero_extendqisi2
-	cbz	r3, .L1767
-	ldr	r2, .L1802+24
+	cbz	r3, .L1768
+	ldr	r2, .L1803+24
 	lsls	r3, r5, #4
 	ldrb	r0, [r2, r3]	@ zero_extendqisi2
 	bl	flash_exit_slc_mode
-.L1767:
+.L1768:
 	adds	r5, r5, #1
-	b	.L1766
-.L1769:
-	ldr	r10, .L1802+64
-	movs	r7, #0
+	b	.L1767
 .L1770:
+	ldr	r10, .L1803+64
+	movs	r7, #0
+.L1771:
 	ldr	r3, [sp, #8]
 	cmp	r7, r3
-	beq	.L1777
+	beq	.L1778
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	bne	.L1771
+	bne	.L1772
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1802+48
+	ldr	r0, .L1803+48
 	bl	printf
-.L1772:
+.L1773:
 	adds	r7, r7, #1
 	adds	r4, r4, #36
-	b	.L1770
-.L1771:
+	b	.L1771
+.L1772:
 	ldr	r3, [sp, #8]
 	add	r2, sp, #28
-	ldr	fp, .L1802+68
+	ldr	fp, .L1803+68
 	mov	r1, r8
 	mov	r0, r4
 	mov	r6, r4
@@ -12100,42 +12114,42 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	r5, [sp, #36]
 	adds	r3, r5, #1
-	bne	.L1773
+	bne	.L1774
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1802+52
+	ldr	r0, .L1803+52
 	bl	printf
 	str	r5, [r4]
-.L1773:
+.L1774:
 	ldr	r3, [r4, #12]
-	cbz	r3, .L1774
+	cbz	r3, .L1775
 	ldr	r2, [r3]
 	ldr	r3, [fp]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L1774
+	beq	.L1775
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1802+56
+	ldr	r0, .L1803+56
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4]
-.L1774:
+.L1775:
 	ldr	r3, [r4, #8]
 	cmp	r3, #0
-	beq	.L1772
+	beq	.L1773
 	ldr	r2, [r3]
 	ldr	r3, [r10]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L1772
+	beq	.L1773
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1802+60
+	ldr	r0, .L1803+60
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4]
-	b	.L1772
-.L1803:
+	b	.L1773
+.L1804:
 	.align	2
-.L1802:
+.L1803:
 	.word	.LANCHOR18
 	.word	.LANCHOR2
 	.word	.LANCHOR31
@@ -12166,14 +12180,14 @@ FlashProgPages:
 FlashTestBlk:
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1807
+	ldr	r3, .L1808
 	push	{r4, r5, lr}
 	mov	r4, r0
 	sub	sp, sp, #108
 	ldr	r3, [r3]
 	cmp	r0, r3
-	bcc	.L1806
-	ldr	r5, .L1807+4
+	bcc	.L1807
+	ldr	r5, .L1808+4
 	add	r0, sp, #40
 	movs	r2, #32
 	movs	r1, #165
@@ -12205,17 +12219,17 @@ FlashTestBlk:
 	movne	r4, #1
 	negs	r4, r4
 	bl	FlashEraseBlocks
-.L1804:
+.L1805:
 	mov	r0, r4
 	add	sp, sp, #108
 	@ sp needed
 	pop	{r4, r5, pc}
-.L1806:
+.L1807:
 	movs	r4, #0
-	b	.L1804
-.L1808:
+	b	.L1805
+.L1809:
 	.align	2
-.L1807:
+.L1808:
 	.word	.LANCHOR149
 	.word	.LANCHOR153
 	.size	FlashTestBlk, .-FlashTestBlk
@@ -12230,48 +12244,48 @@ FlashTestBlk:
 FtlLowFormatEraseBlock:
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1854
+	ldr	r3, .L1855
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #40
 	str	r0, [sp, #8]
 	ldr	r3, [r3]
 	str	r1, [sp, #4]
 	cmp	r3, #0
-	bne	.L1836
-	ldr	r2, .L1854+4
+	bne	.L1837
+	ldr	r2, .L1855+4
 	mov	r10, r3
 	mov	r5, r3
 	mov	r4, r3
 	mov	r8, #36
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	str	r2, [sp, #20]
-	ldr	r2, .L1854+8
+	ldr	r2, .L1855+8
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	str	r2, [sp, #12]
-	ldr	r2, .L1854+12
+	ldr	r2, .L1855+12
 	str	r0, [r2]
-	ldr	r2, .L1854+16
+	ldr	r2, .L1855+16
 	ldrh	fp, [r2]
-	ldr	r2, .L1854+20
+	ldr	r2, .L1855+20
 	ldr	r7, [r2]
-	ldr	r2, .L1854+24
+	ldr	r2, .L1855+24
 	ldr	r2, [r2]
 	str	r2, [sp, #16]
-	ldr	r2, .L1854+28
+	ldr	r2, .L1855+28
 	ldrh	r2, [r2]
 	str	r2, [sp, #24]
-.L1811:
+.L1812:
 	uxth	r2, r10
 	cmp	fp, r2
-	bhi	.L1815
+	bhi	.L1816
 	cmp	r5, #0
-	beq	.L1809
+	beq	.L1810
 	ldr	r3, [sp, #12]
 	mov	r0, r7
-	ldr	r10, .L1854+4
+	ldr	r10, .L1855+4
 	mov	r8, #0
 	mov	r2, r5
-	ldr	r7, .L1854+20
+	ldr	r7, .L1855+20
 	adds	r6, r3, #0
 	it	ne
 	movne	r6, #1
@@ -12281,44 +12295,44 @@ FtlLowFormatEraseBlock:
 	ldrb	r3, [sp, #20]	@ zero_extendqisi2
 	strb	r3, [r10]
 	mov	r10, #36
-.L1817:
+.L1818:
 	uxth	r3, r8
 	cmp	r5, r3
-	bhi	.L1819
+	bhi	.L1820
 	ldr	r3, [sp, #4]
 	cmp	r3, #0
-	bne	.L1820
+	bne	.L1821
 	uxth	r6, r6
 	movs	r3, #6
 	str	r3, [sp, #16]
 	movs	r3, #1
 	str	r3, [sp, #12]
-.L1821:
+.L1822:
 	mov	r8, #0
-.L1830:
-	ldr	r3, .L1854+16
+.L1831:
+	ldr	r3, .L1855+16
 	mov	fp, #0
 	mov	r5, fp
 	ldrh	r3, [r3]
 	str	r3, [sp, #24]
-	ldr	r3, .L1854+20
+	ldr	r3, .L1855+20
 	ldr	r10, [r3]
-	ldr	r3, .L1854+32
+	ldr	r3, .L1855+32
 	ldr	r3, [r3]
 	str	r3, [sp, #28]
-	ldr	r3, .L1854+36
+	ldr	r3, .L1855+36
 	ldr	r3, [r3]
 	str	r3, [sp, #32]
-	ldr	r3, .L1854+28
+	ldr	r3, .L1855+28
 	ldrh	r3, [r3]
 	str	r3, [sp, #36]
-.L1822:
+.L1823:
 	ldr	r3, [sp, #24]
 	uxth	r2, fp
 	cmp	r3, r2
-	bhi	.L1825
-	cbz	r5, .L1809
-	ldr	fp, .L1854+4
+	bhi	.L1826
+	cbz	r5, .L1810
+	ldr	fp, .L1855+4
 	movs	r3, #1
 	mov	r0, r10
 	movs	r7, #0
@@ -12327,59 +12341,59 @@ FtlLowFormatEraseBlock:
 	strb	r7, [fp]
 	bl	FlashProgPages
 	ldrb	r3, [sp, #20]	@ zero_extendqisi2
-	ldr	r10, .L1854+20
+	ldr	r10, .L1855+20
 	strb	r3, [fp]
 	mov	fp, #36
-.L1827:
+.L1828:
 	uxth	r3, r7
 	cmp	r5, r3
-	bhi	.L1829
+	bhi	.L1830
 	ldr	r3, [sp, #16]
 	add	r8, r8, r3
 	ldr	r3, [sp, #12]
 	uxth	r8, r8
 	cmp	r3, r8
-	bhi	.L1830
-	ldr	r8, .L1854+20
+	bhi	.L1831
+	ldr	r8, .L1855+20
 	movs	r7, #0
 	mov	r10, #36
-.L1831:
+.L1832:
 	uxth	r3, r7
 	cmp	r5, r3
-	bhi	.L1833
+	bhi	.L1834
 	ldr	r3, [sp, #8]
 	cmp	r3, #63
-	bls	.L1834
+	bls	.L1835
 	ldr	r3, [sp, #4]
-	cbz	r3, .L1809
-.L1834:
-	ldr	r3, .L1854+20
+	cbz	r3, .L1810
+.L1835:
+	ldr	r3, .L1855+20
 	mov	r2, r5
 	mov	r1, r6
 	ldr	r0, [r3]
 	bl	FlashEraseBlocks
-.L1809:
+.L1810:
 	mov	r0, r4
 	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1815:
+.L1816:
 	mul	r2, r8, r10
 	movs	r3, #0
 	ldr	r1, [sp, #8]
 	str	r3, [r7, r2]
-	ldr	r3, .L1854+40
+	ldr	r3, .L1855+40
 	ldrb	r0, [r3, r10]	@ zero_extendqisi2
 	bl	V2P_block
 	ldr	r3, [sp, #4]
 	mov	r6, r0
-	cbz	r3, .L1812
+	cbz	r3, .L1813
 	bl	IsBlkInVendorPart
-	cbnz	r0, .L1813
-.L1812:
+	cbnz	r0, .L1814
+.L1813:
 	mov	r0, r6
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L1814
+	cbnz	r0, .L1815
 	ldr	r3, [sp, #24]
 	mla	r1, r8, r5, r7
 	lsls	r6, r6, #10
@@ -12392,62 +12406,62 @@ FtlLowFormatEraseBlock:
 	bic	r2, r2, #3
 	add	r2, r2, r3
 	str	r2, [r1, #12]
-.L1813:
-	add	r10, r10, #1
-	b	.L1811
 .L1814:
+	add	r10, r10, #1
+	b	.L1812
+.L1815:
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L1813
-.L1819:
+	b	.L1814
+.L1820:
 	mul	r3, r10, r8
 	ldr	r2, [r7]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
 	adds	r3, r3, #1
-	bne	.L1818
+	bne	.L1819
 	ldr	r0, [r1, #4]
 	adds	r4, r4, #1
 	uxth	r4, r4
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.L1818:
+.L1819:
 	add	r8, r8, #1
-	b	.L1817
-.L1820:
-	ldr	r3, .L1854+44
+	b	.L1818
+.L1821:
+	ldr	r3, .L1855+44
 	ldrh	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L1854+8
+	ldr	r3, .L1855+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L1837
+	cbnz	r3, .L1838
 	ldr	r3, [sp, #12]
 	movs	r6, #1
 	lsrs	r3, r3, #2
 	str	r3, [sp, #16]
-	b	.L1821
-.L1837:
+	b	.L1822
+.L1838:
 	movs	r6, #1
 	str	r6, [sp, #16]
-	b	.L1821
-.L1825:
+	b	.L1822
+.L1826:
 	movs	r3, #36
 	ldr	r1, [sp, #8]
 	mul	r2, r3, fp
 	movs	r3, #0
 	str	r3, [r10, r2]
-	ldr	r3, .L1854+40
+	ldr	r3, .L1855+40
 	ldrb	r0, [r3, fp]	@ zero_extendqisi2
 	bl	V2P_block
 	ldr	r3, [sp, #4]
 	mov	r7, r0
-	cbz	r3, .L1823
+	cbz	r3, .L1824
 	bl	IsBlkInVendorPart
-	cbnz	r0, .L1824
-.L1823:
+	cbnz	r0, .L1825
+.L1824:
 	mov	r0, r7
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L1824
+	cbnz	r0, .L1825
 	movs	r3, #36
 	add	r7, r8, r7, lsl #10
 	mla	r1, r3, r5, r10
@@ -12462,44 +12476,44 @@ FtlLowFormatEraseBlock:
 	bic	r2, r2, #3
 	add	r2, r2, r3
 	str	r2, [r1, #12]
-.L1824:
+.L1825:
 	add	fp, fp, #1
-	b	.L1822
-.L1829:
+	b	.L1823
+.L1830:
 	mul	r3, fp, r7
 	ldr	r2, [r10]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
-	cbz	r3, .L1828
+	cbz	r3, .L1829
 	ldr	r0, [r1, #4]
 	adds	r4, r4, #1
 	uxth	r4, r4
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.L1828:
+.L1829:
 	adds	r7, r7, #1
-	b	.L1827
-.L1833:
+	b	.L1828
+.L1834:
 	ldr	r3, [sp, #4]
-	cbz	r3, .L1832
+	cbz	r3, .L1833
 	mul	r3, r10, r7
 	ldr	r2, [r8]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
-	cbnz	r3, .L1832
+	cbnz	r3, .L1833
 	ldr	r0, [r1, #4]
 	movs	r1, #1
 	ubfx	r0, r0, #10, #16
 	bl	FtlFreeSysBlkQueueIn
-.L1832:
+.L1833:
 	adds	r7, r7, #1
-	b	.L1831
-.L1836:
+	b	.L1832
+.L1837:
 	movs	r4, #0
-	b	.L1809
-.L1855:
+	b	.L1810
+.L1856:
 	.align	2
-.L1854:
+.L1855:
 	.word	.LANCHOR76
 	.word	.LANCHOR27
 	.word	.LANCHOR15
@@ -12525,33 +12539,33 @@ FtlBbmTblFlush:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L1872
+	ldr	r3, .L1873
 	ldr	r4, [r3]
 	str	r3, [sp, #12]
 	cmp	r4, #0
-	bne	.L1858
-	ldr	r3, .L1872+4
+	bne	.L1859
+	ldr	r3, .L1873+4
 	mov	r1, r4
-	ldr	r7, .L1872+8
-	ldr	r5, .L1872+12
+	ldr	r7, .L1873+8
+	ldr	r5, .L1873+12
 	ldr	r3, [r3]
 	ldr	r0, [r7]
 	mov	fp, r7
-	ldr	r6, .L1872+16
+	ldr	r6, .L1873+16
 	str	r3, [r5, #12]
-	ldr	r7, .L1872+20
-	ldr	r3, .L1872+24
-	ldr	r8, .L1872+56
+	ldr	r7, .L1873+20
+	ldr	r3, .L1873+24
+	ldr	r8, .L1873+56
 	str	r0, [r5, #8]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-.L1859:
+.L1860:
 	ldrh	r3, [r7]
 	cmp	r4, r3
-	blt	.L1860
+	blt	.L1861
 	ldr	r6, [r5, #12]
 	movs	r2, #16
-	ldr	r4, .L1872+28
+	ldr	r4, .L1873+28
 	movs	r1, #255
 	movs	r7, #0
 	mov	r0, r6
@@ -12568,15 +12582,15 @@ FtlBbmTblFlush:
 	strh	r3, [r6, #8]	@ movhi
 	ldrh	r3, [r4, #6]
 	strh	r3, [r6, #10]	@ movhi
-	ldr	r3, .L1872+32
+	ldr	r3, .L1873+32
 	ldr	r3, [r3]
 	strh	r3, [r6, #12]	@ movhi
-.L1861:
+.L1862:
 	ldr	r3, [fp]
 	ldrh	r2, [r4, #2]
 	ldrh	r1, [r4]
 	str	r3, [r5, #8]
-	ldr	r3, .L1872+4
+	ldr	r3, .L1873+4
 	ldrh	r0, [r6, #10]
 	ldr	r3, [r3]
 	str	r3, [r5, #12]
@@ -12586,14 +12600,14 @@ FtlBbmTblFlush:
 	str	r3, [r5, #4]
 	ldrh	r3, [r4, #4]
 	str	r0, [sp]
-	ldr	r0, .L1872+36
+	ldr	r0, .L1873+36
 	bl	printf
-	ldr	r3, .L1872+40
+	ldr	r3, .L1873+40
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1862
+	blt	.L1863
 	ldr	r3, [r4, #8]
 	mov	r1, #0	@ movhi
 	ldrh	r2, [r4]
@@ -12604,7 +12618,7 @@ FtlBbmTblFlush:
 	strh	r2, [r6, #8]	@ movhi
 	ldrh	r3, [r4, #4]
 	strh	r2, [r4, #4]	@ movhi
-	ldr	r2, .L1872+44
+	ldr	r2, .L1873+44
 	strh	r3, [r4]	@ movhi
 	lsls	r3, r3, #10
 	ldr	r0, [r2]
@@ -12613,9 +12627,9 @@ FtlBbmTblFlush:
 	mov	r1, r2
 	str	r3, [r0, #4]
 	bl	FlashEraseBlocks
-.L1862:
+.L1863:
 	movs	r3, #1
-	ldr	r0, .L1872+12
+	ldr	r0, .L1873+12
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
@@ -12624,27 +12638,27 @@ FtlBbmTblFlush:
 	strh	r3, [r10, #2]	@ movhi
 	ldr	r3, [r5]
 	adds	r2, r3, #1
-	bne	.L1863
+	bne	.L1864
 	adds	r7, r7, #1
 	ldr	r1, [r5, #4]
 	uxth	r7, r7
-	ldr	r0, .L1872+48
+	ldr	r0, .L1873+48
 	bl	printf
 	cmp	r7, #3
-	bls	.L1861
+	bls	.L1862
 	mov	r2, r7
 	ldr	r1, [r5, #4]
-	ldr	r0, .L1872+52
+	ldr	r0, .L1873+52
 	bl	printf
 	ldr	r2, [sp, #12]
 	movs	r3, #1
 	str	r3, [r2]
-.L1858:
+.L1859:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1860:
+.L1861:
 	ldrh	r2, [r8]
 	ldr	r3, [r5, #8]
 	ldr	r1, [r6, #4]!
@@ -12653,17 +12667,17 @@ FtlBbmTblFlush:
 	adds	r4, r4, #1
 	add	r0, r3, r0, lsl #2
 	bl	ftl_memcpy
-	b	.L1859
-.L1863:
+	b	.L1860
+.L1864:
 	add	r8, r8, #1
 	cmp	r8, #1
-	beq	.L1861
+	beq	.L1862
 	cmp	r3, #256
-	beq	.L1861
-	b	.L1858
-.L1873:
+	beq	.L1862
+	b	.L1859
+.L1874:
 	.align	2
-.L1872:
+.L1873:
 	.word	.LANCHOR76
 	.word	.LANCHOR188
 	.word	.LANCHOR183
@@ -12691,149 +12705,149 @@ FtlBbmTblFlush:
 allocate_data_superblock:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1939
+	ldr	r3, .L1940
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L1876
-.L1875:
-	ldr	r3, .L1939+4
-	ldr	r8, .L1939+60
-	ldr	r7, .L1939+8
+	bne	.L1877
+.L1876:
+	ldr	r3, .L1940+4
+	ldr	r8, .L1940+60
+	ldr	r7, .L1940+8
 	ldrh	r3, [r3]
 	ldrh	r2, [r8]
 	add	r3, r3, r2
 	ldrh	r2, [r7]
 	cmp	r3, r2
-	ble	.L1877
-	ldr	r1, .L1939+12
-	movw	r2, #3165
-	ldr	r0, .L1939+16
+	ble	.L1878
+	ldr	r1, .L1940+12
+	movw	r2, #3164
+	ldr	r0, .L1940+16
 	bl	printf
-	ldr	r1, .L1939+20
-	ldr	r0, .L1939+24
+	ldr	r1, .L1940+20
+	ldr	r0, .L1940+24
 	bl	printf
-.L1877:
-	ldr	r3, .L1939+28
+.L1878:
+	ldr	r3, .L1940+28
 	ldrb	r2, [r4, #8]	@ zero_extendqisi2
 	cmp	r4, r3
-	bne	.L1878
-	ldr	r3, .L1939+4
+	bne	.L1879
+	ldr	r3, .L1940+4
 	ldrh	r5, [r3]
-	ldr	r3, .L1939+32
+	ldr	r3, .L1940+32
 	ldr	r3, [r3]
 	lsrs	r0, r5, #1
 	adds	r1, r0, #1
 	mul	r6, r3, r5
 	add	r1, r1, r6, lsr #2
-	ldr	r6, .L1939+36
+	ldr	r6, .L1940+36
 	uxth	r1, r1
 	ldr	r6, [r6]
-	cbz	r6, .L1879
-	ldr	r6, .L1939+40
+	cbz	r6, .L1880
+	ldr	r6, .L1940+40
 	ldr	r6, [r6]
 	cmp	r6, #39
-	bhi	.L1879
+	bhi	.L1880
 	cmp	r6, #2
-	bls	.L1913
+	bls	.L1914
 	lsls	r1, r5, #31
-	bpl	.L1909
+	bpl	.L1910
 	cmp	r3, #0
-	beq	.L1913
-.L1909:
+	beq	.L1914
+.L1910:
 	mov	r1, r0
-	b	.L1879
-.L1878:
+	b	.L1880
+.L1879:
 	cmp	r2, #1
-	bne	.L1913
-	ldr	r3, .L1939+44
+	bne	.L1914
+	ldr	r3, .L1940+44
 	ldrh	r3, [r3]
 	cmp	r3, #1
-	beq	.L1913
-	ldr	r3, .L1939+48
+	beq	.L1914
+	ldr	r3, .L1940+48
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1913
-	ldr	r3, .L1939+4
-	ldr	r0, .L1939+36
+	bne	.L1914
+	ldr	r3, .L1940+4
+	ldr	r0, .L1940+36
 	ldrh	r3, [r3]
 	ldr	r0, [r0]
 	lsrs	r1, r3, #3
-	cbz	r0, .L1879
-	ldr	r0, .L1939+40
+	cbz	r0, .L1880
+	ldr	r0, .L1940+40
 	ldr	r0, [r0]
 	cmp	r0, #1
-	bhi	.L1879
+	bhi	.L1880
 	rsb	r3, r3, r3, lsl #3
 	ubfx	r1, r3, #3, #16
-.L1879:
-	cbz	r1, .L1880
+.L1880:
+	cbz	r1, .L1881
 	subs	r1, r1, #1
 	uxth	r1, r1
-.L1880:
-	ldr	r0, .L1939+52
+.L1881:
+	ldr	r0, .L1940+52
 	bl	List_pop_index_node
-	ldr	r3, .L1939+4
+	ldr	r3, .L1940+4
 	mov	r5, r0
 	uxth	r10, r0
 	ldrh	r3, [r3]
-	cbnz	r3, .L1881
-	ldr	r1, .L1939+12
-	movw	r2, #3185
-	ldr	r0, .L1939+16
+	cbnz	r3, .L1882
+	ldr	r1, .L1940+12
+	mov	r2, #3184
+	ldr	r0, .L1940+16
 	bl	printf
-	ldr	r1, .L1939+20
-	ldr	r0, .L1939+24
+	ldr	r1, .L1940+20
+	ldr	r0, .L1940+24
 	bl	printf
-.L1881:
-	ldr	r3, .L1939+4
-	ldr	r2, .L1939+4
+.L1882:
+	ldr	r3, .L1940+4
+	ldr	r2, .L1940+4
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	strh	r3, [r2]	@ movhi
 	ldrh	r3, [r7]
 	cmp	r3, r10
-	bls	.L1875
+	bls	.L1876
 	uxth	r5, r5
 	lsls	r3, r5, #1
 	str	r3, [sp]
-	ldr	r3, .L1939+56
+	ldr	r3, .L1940+56
 	ldr	r3, [r3]
 	ldrh	r6, [r3, r5, lsl #1]
 	cmp	r6, #0
-	bne	.L1875
+	bne	.L1876
 	strh	r10, [r4]	@ movhi
 	mov	r0, r4
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1883
-	ldr	r3, .L1939+56
+	bne	.L1884
+	ldr	r3, .L1940+56
 	movw	r2, #65535
 	ldr	r3, [r3]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
-	ldr	r3, .L1939+4
+	ldr	r3, .L1940+4
 	ldrh	r2, [r8]
 	ldrh	r3, [r3]
 	add	r3, r3, r2
 	ldrh	r2, [r7]
 	cmp	r3, r2
-	ble	.L1875
-	movw	r2, #3201
-	ldr	r1, .L1939+12
-	ldr	r0, .L1939+16
+	ble	.L1876
+	mov	r2, #3200
+	ldr	r1, .L1940+12
+	ldr	r0, .L1940+16
 	bl	printf
-	ldr	r1, .L1939+20
-	ldr	r0, .L1939+24
+	ldr	r1, .L1940+20
+	ldr	r0, .L1940+24
 	bl	printf
-	b	.L1875
-.L1913:
+	b	.L1876
+.L1914:
 	movs	r1, #0
-	b	.L1880
-.L1940:
+	b	.L1881
+.L1941:
 	.align	2
-.L1939:
+.L1940:
 	.word	.LANCHOR76
 	.word	.LANCHOR88
 	.word	.LANCHOR40
@@ -12850,82 +12864,82 @@ allocate_data_superblock:
 	.word	.LANCHOR87
 	.word	.LANCHOR83
 	.word	.LANCHOR85
-.L1883:
-	ldr	r3, .L1941
+.L1884:
+	ldr	r3, .L1942
 	ldrh	r2, [r8]
 	ldrh	r3, [r3]
 	add	r3, r3, r2
 	ldrh	r2, [r7]
 	cmp	r3, r2
-	ble	.L1885
-	ldr	r1, .L1941+4
-	movw	r2, #3204
-	ldr	r0, .L1941+8
+	ble	.L1886
+	ldr	r1, .L1942+4
+	movw	r2, #3203
+	ldr	r0, .L1942+8
 	bl	printf
-	ldr	r1, .L1941+12
-	ldr	r0, .L1941+16
+	ldr	r1, .L1942+12
+	ldr	r0, .L1942+16
 	bl	printf
-.L1885:
-	ldr	r3, .L1941+20
+.L1886:
+	ldr	r3, .L1942+20
 	add	lr, r4, #16
-	ldr	r2, .L1941+24
+	ldr	r2, .L1942+24
 	mov	r8, #0
 	ldr	ip, [r3]
 	ldrh	r0, [r2]
 	movs	r2, #36
 	mov	r3, ip
 	mla	r0, r2, r0, ip
-.L1886:
+.L1887:
 	cmp	r0, r3
-	bne	.L1888
-	cbnz	r6, .L1889
-	ldr	r1, .L1941+4
-	mov	r2, #3216
-	ldr	r0, .L1941+8
+	bne	.L1889
+	cbnz	r6, .L1890
+	ldr	r1, .L1942+4
+	movw	r2, #3215
+	ldr	r0, .L1942+8
 	bl	printf
-	ldr	r1, .L1941+12
-	ldr	r0, .L1941+16
+	ldr	r1, .L1942+12
+	ldr	r0, .L1942+16
 	bl	printf
-.L1889:
-	ldr	r3, .L1941+28
-	ldr	r8, .L1941+80
+.L1890:
+	ldr	r3, .L1942+28
+	ldr	r8, .L1942+80
 	ldr	r3, [r3]
-	cbz	r3, .L1890
-	ldr	r3, .L1941+32
+	cbz	r3, .L1891
+	ldr	r3, .L1942+32
 	cmp	r4, r3
-	bne	.L1890
+	bne	.L1891
 	ldr	r3, [r8]
 	ldrh	r3, [r3, r5, lsl #1]
 	cmp	r3, #40
 	itt	hi
 	movhi	r3, #0
 	strbhi	r3, [r4, #8]
-.L1890:
-	ldr	r3, .L1941+36
+.L1891:
+	ldr	r3, .L1942+36
 	ldrh	r3, [r3]
 	cmp	r3, r10
-	bne	.L1891
-	ldr	r1, .L1941+4
-	movw	r2, #3223
-	ldr	r0, .L1941+8
+	bne	.L1892
+	ldr	r1, .L1942+4
+	movw	r2, #3222
+	ldr	r0, .L1942+8
 	bl	printf
-	ldr	r1, .L1941+12
-	ldr	r0, .L1941+16
+	ldr	r1, .L1942+12
+	ldr	r0, .L1942+16
 	bl	printf
-.L1891:
+.L1892:
 	ldrb	r2, [r4, #8]	@ zero_extendqisi2
-	ldr	r3, .L1941+40
-	ldr	fp, .L1941+84
+	ldr	r3, .L1942+40
+	ldr	fp, .L1942+84
 	cmp	r2, #0
-	bne	.L1892
+	bne	.L1893
 	ldr	r1, [r8]
 	ldrh	r2, [r1, r5, lsl #1]
 	cmp	r2, #0
-	beq	.L1893
-	ldr	r0, .L1941+44
+	beq	.L1894
+	ldr	r0, .L1942+44
 	ldrh	r0, [r0]
 	add	r2, r2, r0
-.L1936:
+.L1937:
 	strh	r2, [r1, r5, lsl #1]	@ movhi
 	mov	r0, r10
 	ldr	r2, [r3]
@@ -12934,43 +12948,43 @@ allocate_data_superblock:
 	adds	r2, r2, #1
 	str	r2, [r3]
 	bl	ftl_set_blk_mode
-.L1937:
+.L1938:
 	ldr	r2, [r8]
 	ldr	r3, [sp, #4]
 	ldrh	r0, [r2, r5, lsl #1]
-	ldr	r2, .L1941+48
+	ldr	r2, .L1942+48
 	ldr	r1, [r2]
 	cmp	r0, r1
 	ldrh	r1, [r7]
 	it	hi
 	strhi	r0, [r2]
-	ldr	r2, .L1941+44
+	ldr	r2, .L1942+44
 	ldr	r0, [r3]
 	ldr	r3, [fp]
 	ldrh	r2, [r2]
-	ldr	r7, .L1941+52
+	ldr	r7, .L1942+52
 	mla	r0, r0, r2, r3
 	bl	__aeabi_uidiv
-	ldr	r3, .L1941+56
+	ldr	r3, .L1942+56
 	str	r0, [r3]
-	ldr	r3, .L1941+60
+	ldr	r3, .L1942+60
 	ldr	r2, [r3]
 	ldr	r3, [r2, #16]
 	adds	r3, r3, #1
 	str	r3, [r2, #16]
-	ldr	r3, .L1941+20
+	ldr	r3, .L1942+20
 	ldr	r0, [r3]
 	movs	r3, #36
 	adds	r1, r0, #4
 	mla	r3, r3, r6, r0
 	adds	r3, r3, #40
-.L1897:
+.L1898:
 	adds	r1, r1, #36
 	cmp	r3, r1
-	bne	.L1898
-	ldr	r3, .L1941+64
+	bne	.L1899
+	ldr	r3, .L1942+64
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1899
+	cbz	r3, .L1900
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	mov	r2, r6
 	cmp	r3, #1
@@ -12978,8 +12992,8 @@ allocate_data_superblock:
 	moveq	r1, #0
 	movne	r1, #1
 	bl	FlashEraseBlocks
-.L1899:
-	ldr	r3, .L1941+20
+.L1900:
+	ldr	r3, .L1942+20
 	movs	r7, #0
 	mov	r8, r7
 	mov	fp, #36
@@ -12987,43 +13001,43 @@ allocate_data_superblock:
 	ldrb	r1, [r4, #8]	@ zero_extendqisi2
 	ldr	r0, [r3]
 	bl	FlashEraseBlocks
-.L1901:
+.L1902:
 	uxth	r3, r7
 	cmp	r6, r3
-	bhi	.L1903
+	bhi	.L1904
 	cmp	r8, #0
-	beq	.L1904
+	beq	.L1905
 	mov	r0, r10
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L1904:
+.L1905:
 	ldrb	r2, [r4, #7]	@ zero_extendqisi2
 	cmp	r2, #0
-	bne	.L1905
-	ldr	r3, .L1941+68
+	bne	.L1906
+	ldr	r3, .L1942+68
 	movw	r2, #65535
 	ldr	r3, [r3]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
-	b	.L1875
-.L1888:
+	b	.L1876
+.L1889:
 	ldrh	r1, [lr], #2
 	movw	fp, #65535
 	str	r8, [r3, #8]
 	str	r8, [r3, #12]
 	cmp	r1, fp
-	beq	.L1887
+	beq	.L1888
 	mla	fp, r2, r6, ip
 	adds	r6, r6, #1
 	lsls	r1, r1, #10
 	uxth	r6, r6
 	str	r1, [fp, #4]
-.L1887:
+.L1888:
 	adds	r3, r3, #36
-	b	.L1886
-.L1893:
+	b	.L1887
+.L1894:
 	movs	r2, #2
-	b	.L1936
-.L1892:
+	b	.L1937
+.L1893:
 	ldr	r1, [r8]
 	mov	r0, r10
 	str	r3, [sp, #4]
@@ -13034,20 +13048,20 @@ allocate_data_superblock:
 	adds	r2, r2, #1
 	str	r2, [fp]
 	bl	ftl_set_blk_mode.part.10
-	b	.L1937
-.L1898:
+	b	.L1938
+.L1899:
 	ldr	r2, [r1, #-36]
 	ands	r2, r2, r7
 	str	r2, [r1, #-36]
-	b	.L1897
-.L1903:
-	ldr	r2, .L1941+20
+	b	.L1898
+.L1904:
+	ldr	r2, .L1942+20
 	mul	r3, fp, r7
 	ldr	r2, [r2]
 	adds	r1, r2, r3
 	ldr	r2, [r2, r3]
 	adds	r3, r2, #1
-	bne	.L1902
+	bne	.L1903
 	ldr	r0, [r1, #4]
 	add	r8, r8, #1
 	str	r2, [sp, #4]
@@ -13059,12 +13073,12 @@ allocate_data_superblock:
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	strb	r3, [r4, #7]
-.L1902:
+.L1903:
 	adds	r7, r7, #1
-	b	.L1901
-.L1905:
-	ldr	r3, .L1941+72
-	ldr	r1, .L1941+76
+	b	.L1902
+.L1906:
+	ldr	r3, .L1942+72
+	ldr	r1, .L1942+76
 	ldrh	r3, [r3]
 	strh	r10, [r4]	@ movhi
 	smulbb	r3, r3, r2
@@ -13077,30 +13091,30 @@ allocate_data_superblock:
 	str	r2, [r4, #12]
 	adds	r2, r2, #1
 	str	r2, [r1]
-	ldr	r2, .L1941+68
+	ldr	r2, .L1942+68
 	ldr	r1, [sp]
 	ldr	r2, [r2]
 	strh	r3, [r2, r1]	@ movhi
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L1906
+	cbz	r3, .L1907
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1876
-.L1906:
-	ldr	r1, .L1941+4
-	movw	r2, #3282
-	ldr	r0, .L1941+8
+	cbnz	r3, .L1877
+.L1907:
+	ldr	r1, .L1942+4
+	movw	r2, #3281
+	ldr	r0, .L1942+8
 	bl	printf
-	ldr	r1, .L1941+12
-	ldr	r0, .L1941+16
+	ldr	r1, .L1942+12
+	ldr	r0, .L1942+16
 	bl	printf
-.L1876:
+.L1877:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1942:
+.L1943:
 	.align	2
-.L1941:
+.L1942:
 	.word	.LANCHOR88
 	.word	.LANCHOR204
 	.word	.LC5
@@ -13137,43 +13151,43 @@ FtlGcFreeBadSuperBlk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, r0
-	ldr	r4, .L1955
+	ldr	r4, .L1956
 	ldrh	r3, [r4]
-	cbz	r3, .L1944
-	ldr	r8, .L1955+12
+	cbz	r3, .L1945
+	ldr	r8, .L1956+12
 	movs	r7, #0
-.L1945:
-	ldr	r3, .L1955+4
+.L1946:
+	ldr	r3, .L1956+4
 	ldrh	r2, [r3]
 	uxth	r3, r7
 	cmp	r2, r3
-	bhi	.L1951
+	bhi	.L1952
 	bl	FtlGcReFreshBadBlk
-.L1944:
+.L1945:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1951:
-	ldr	r2, .L1955+8
+.L1952:
+	ldr	r2, .L1956+8
 	uxth	r3, r7
 	mov	r1, r10
 	mov	fp, #0
 	ldrb	r0, [r2, r3]	@ zero_extendqisi2
 	bl	V2P_block
 	mov	r1, r0
-.L1946:
+.L1947:
 	ldrh	r3, [r4]
 	uxth	r5, fp
 	cmp	r3, r5
-	bhi	.L1950
+	bhi	.L1951
 	adds	r7, r7, #1
-	b	.L1945
-.L1950:
+	b	.L1946
+.L1951:
 	uxth	r6, fp
 	ldrh	r3, [r8, r6, lsl #1]
 	cmp	r3, r1
-	bne	.L1947
+	bne	.L1948
 	mov	r0, r1
 	str	r1, [sp, #4]
 	bl	FtlBbmMapBadBlock
@@ -13181,23 +13195,23 @@ FtlGcFreeBadSuperBlk:
 	ldrh	r2, [r4]
 	add	r3, r8, r6, lsl #1
 	ldr	r1, [sp, #4]
-.L1948:
+.L1949:
 	cmp	r5, r2
-	bcc	.L1949
+	bcc	.L1950
 	subs	r2, r2, #1
 	strh	r2, [r4]	@ movhi
-.L1947:
+.L1948:
 	add	fp, fp, #1
-	b	.L1946
-.L1949:
+	b	.L1947
+.L1950:
 	ldrh	r0, [r3, #2]!
 	adds	r5, r5, #1
 	uxth	r5, r5
 	strh	r0, [r3, #-2]	@ movhi
-	b	.L1948
-.L1956:
+	b	.L1949
+.L1957:
 	.align	2
-.L1955:
+.L1956:
 	.word	.LANCHOR116
 	.word	.LANCHOR38
 	.word	.LANCHOR47
@@ -13216,32 +13230,32 @@ update_vpc_list:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	mov	r4, r0
-	ldr	r3, .L1967
+	ldr	r3, .L1968
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	bne	.L1958
-	ldr	r2, .L1967+4
+	bne	.L1959
+	ldr	r2, .L1968+4
 	ldrh	r1, [r2]
 	cmp	r1, r0
-	bne	.L1959
+	bne	.L1960
 	movw	r3, #65535
 	strh	r3, [r2]	@ movhi
-.L1960:
-	ldr	r5, .L1967+8
+.L1961:
+	ldr	r5, .L1968+8
 	mov	r1, r4
-	ldr	r0, .L1967+12
+	ldr	r0, .L1968+12
 	bl	List_remove_node
 	ldrh	r3, [r5]
-	cbnz	r3, .L1962
-	ldr	r1, .L1967+16
-	movw	r2, #3393
-	ldr	r0, .L1967+20
+	cbnz	r3, .L1963
+	ldr	r1, .L1968+16
+	mov	r2, #3392
+	ldr	r0, .L1968+20
 	bl	printf
-	ldr	r1, .L1967+24
-	ldr	r0, .L1967+28
+	ldr	r1, .L1968+24
+	ldr	r0, .L1968+28
 	bl	printf
-.L1962:
+.L1963:
 	ldrh	r3, [r5]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -13249,47 +13263,47 @@ update_vpc_list:
 	bl	free_data_superblock
 	mov	r0, r4
 	bl	FtlGcFreeBadSuperBlk
-	ldr	r3, .L1967+32
+	ldr	r3, .L1968+32
 	ldrh	r2, [r5]
 	ldrh	r3, [r3]
 	add	r3, r3, r2
-	ldr	r2, .L1967+36
+	ldr	r2, .L1968+36
 	ldrh	r2, [r2]
 	cmp	r3, r2
-	ble	.L1966
-	ldr	r1, .L1967+16
-	movw	r2, #3396
-	ldr	r0, .L1967+20
+	ble	.L1967
+	ldr	r1, .L1968+16
+	movw	r2, #3395
+	ldr	r0, .L1968+20
 	bl	printf
-	ldr	r1, .L1967+24
-	ldr	r0, .L1967+28
+	ldr	r1, .L1968+24
+	ldr	r0, .L1968+28
 	bl	printf
-.L1966:
+.L1967:
 	movs	r3, #1
-	b	.L1957
-.L1959:
-	ldr	r2, .L1967+40
+	b	.L1958
+.L1960:
+	ldr	r2, .L1968+40
 	ldrh	r2, [r2]
 	cmp	r2, r0
-	beq	.L1957
-	ldr	r2, .L1967+44
+	beq	.L1958
+	ldr	r2, .L1968+44
 	ldrh	r2, [r2]
 	cmp	r2, r0
-	beq	.L1957
-	ldr	r2, .L1967+48
+	beq	.L1958
+	ldr	r2, .L1968+48
 	ldrh	r2, [r2]
 	cmp	r2, r0
-	bne	.L1960
-.L1957:
+	bne	.L1961
+.L1958:
 	mov	r0, r3
 	pop	{r3, r4, r5, pc}
-.L1958:
+.L1959:
 	bl	List_update_data_list
 	movs	r3, #0
-	b	.L1957
-.L1968:
+	b	.L1958
+.L1969:
 	.align	2
-.L1967:
+.L1968:
 	.word	.LANCHOR83
 	.word	.LANCHOR205
 	.word	.LANCHOR85
@@ -13319,47 +13333,47 @@ decrement_vpc_count:
 	push	{r4, r5, r6, lr}
 	cmp	r0, r3
 	mov	r4, r0
-	beq	.L1970
-	ldr	r5, .L1981
+	beq	.L1971
+	ldr	r5, .L1982
 	ldr	r3, [r5]
 	ldrh	r2, [r3, r0, lsl #1]
 	cmp	r2, #0
-	bne	.L1971
+	bne	.L1972
 	mov	r1, r0
-	ldr	r0, .L1981+4
+	ldr	r0, .L1982+4
 	bl	printf
 	ldr	r3, [r5]
 	ldrh	r3, [r3, r4, lsl #1]
-	cbnz	r3, .L1972
-	ldr	r1, .L1981+8
-	movw	r2, #3411
-	ldr	r0, .L1981+12
+	cbnz	r3, .L1973
+	ldr	r1, .L1982+8
+	movw	r2, #3410
+	ldr	r0, .L1982+12
 	bl	printf
-	ldr	r1, .L1981+16
-	ldr	r0, .L1981+20
+	ldr	r1, .L1982+16
+	ldr	r0, .L1982+20
 	bl	printf
-.L1972:
+.L1973:
 	ldr	r3, [r5]
 	movs	r2, #32
 	mov	r1, r4
-	ldr	r0, .L1981+24
+	ldr	r0, .L1982+24
 	strh	r2, [r3, r4, lsl #1]	@ movhi
 	bl	test_node_in_list
-	cbz	r0, .L1973
-	ldr	r6, .L1981+28
+	cbz	r0, .L1974
+	ldr	r6, .L1982+28
 	mov	r1, r4
-	ldr	r0, .L1981+24
+	ldr	r0, .L1982+24
 	bl	List_remove_node
 	ldrh	r3, [r6]
-	cbnz	r3, .L1974
-	ldr	r1, .L1981+8
-	movw	r2, #3415
-	ldr	r0, .L1981+12
+	cbnz	r3, .L1975
+	ldr	r1, .L1982+8
+	movw	r2, #3414
+	ldr	r0, .L1982+12
 	bl	printf
-	ldr	r1, .L1981+16
-	ldr	r0, .L1981+20
+	ldr	r1, .L1982+16
+	ldr	r0, .L1982+20
 	bl	printf
-.L1974:
+.L1975:
 	ldrh	r3, [r6]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -13367,33 +13381,33 @@ decrement_vpc_count:
 	bl	INSERT_DATA_LIST
 	ldr	r3, [r5]
 	mov	r1, r4
-	ldr	r0, .L1981+32
+	ldr	r0, .L1982+32
 	ldrh	r2, [r3, r4, lsl #1]
 	bl	printf
-.L1973:
+.L1974:
 	mov	r0, r4
 	bl	FtlGcRefreshBlock
-.L1977:
+.L1978:
 	movs	r5, #0
-	b	.L1969
-.L1971:
+	b	.L1970
+.L1972:
 	subs	r2, r2, #1
 	strh	r2, [r3, r0, lsl #1]	@ movhi
-.L1970:
-	ldr	r6, .L1981+36
+.L1971:
+	ldr	r6, .L1982+36
 	movw	r3, #65535
 	ldrh	r0, [r6]
 	cmp	r0, r3
-	bne	.L1976
+	bne	.L1977
 	strh	r4, [r6]	@ movhi
-	b	.L1977
-.L1976:
+	b	.L1978
+.L1977:
 	cmp	r4, r0
-	beq	.L1977
+	beq	.L1978
 	bl	update_vpc_list
-	ldr	r3, .L1981+40
+	ldr	r3, .L1982+40
 	adds	r5, r0, #0
-	ldr	r2, .L1981+44
+	ldr	r2, .L1982+44
 	it	ne
 	movne	r5, #1
 	strh	r4, [r6]	@ movhi
@@ -13401,28 +13415,28 @@ decrement_vpc_count:
 	ldr	r2, [r2]
 	subs	r3, r3, r2
 	asrs	r2, r3, #1
-	ldr	r3, .L1981+48
+	ldr	r3, .L1982+48
 	muls	r3, r2, r3
-	ldr	r2, .L1981
+	ldr	r2, .L1982
 	ldr	r2, [r2]
 	uxth	r1, r3
 	ldrh	r2, [r2, r1, lsl #1]
-	cbnz	r2, .L1969
+	cbnz	r2, .L1970
 	cmp	r4, r1
-	beq	.L1969
-	ldr	r1, .L1981+8
-	movw	r2, #3436
-	ldr	r0, .L1981+12
+	beq	.L1970
+	ldr	r1, .L1982+8
+	movw	r2, #3435
+	ldr	r0, .L1982+12
 	bl	printf
-	ldr	r1, .L1981+16
-	ldr	r0, .L1981+20
+	ldr	r1, .L1982+16
+	ldr	r0, .L1982+20
 	bl	printf
-.L1969:
+.L1970:
 	mov	r0, r5
 	pop	{r4, r5, r6, pc}
-.L1982:
+.L1983:
 	.align	2
-.L1981:
+.L1982:
 	.word	.LANCHOR83
 	.word	.LC36
 	.word	.LANCHOR208
@@ -13452,71 +13466,71 @@ FtlSlcSuperblockCheck:
 	push	{r4, r5, r6, lr}
 	mov	r4, r0
 	cmp	r3, #0
-	beq	.L1983
+	beq	.L1984
 	ldrh	r2, [r0]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1983
+	beq	.L1984
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
-	ldr	r5, .L1994
-	ldr	r6, .L1994+4
+	ldr	r5, .L1995
+	ldr	r6, .L1995+4
 	adds	r3, r3, #8
 	ldrh	r3, [r0, r3, lsl #1]
-.L1987:
+.L1988:
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L1989
+	beq	.L1990
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1990
+	bne	.L1991
 	ldrb	r1, [r5]	@ zero_extendqisi2
-	cbnz	r1, .L1990
+	cbnz	r1, .L1991
 	ldrh	r1, [r4, #2]
 	ldrh	r1, [r6, r1, lsl #1]
 	cmp	r1, r2
-	bne	.L1990
+	bne	.L1991
 	ldrh	r3, [r4, #4]
 	ldrh	r0, [r4]
 	subs	r3, r3, #1
 	strh	r3, [r4, #4]	@ movhi
 	bl	decrement_vpc_count
 	ldrh	r2, [r4, #4]
-	cbnz	r2, .L1989
+	cbnz	r2, .L1990
 	ldrh	r3, [r4, #2]
 	strb	r2, [r4, #6]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	pop	{r4, r5, r6, pc}
-.L1989:
+.L1990:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	ldr	r2, .L1994+8
+	ldr	r2, .L1995+8
 	adds	r3, r3, #1
 	ldrh	r2, [r2]
 	uxtb	r3, r3
 	strb	r3, [r4, #6]
 	cmp	r2, r3
-	bne	.L1988
+	bne	.L1989
 	ldrh	r3, [r4, #2]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [r4, #6]
-.L1988:
+.L1989:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r3, [r4, r3, lsl #1]
-	b	.L1987
-.L1990:
+	b	.L1988
+.L1991:
 	ldrb	r2, [r5]	@ zero_extendqisi2
-	cbz	r2, .L1983
+	cbz	r2, .L1984
 	cmp	r3, #1
-	bne	.L1983
-	ldr	r3, .L1994+12
+	bne	.L1984
+	ldr	r3, .L1995+12
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1983
-	ldr	r3, .L1994+16
+	bcc	.L1984
+	ldr	r3, .L1995+16
 	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
 	ldr	r2, [r3]
@@ -13524,16 +13538,16 @@ FtlSlcSuperblockCheck:
 	subs	r3, r3, r0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
 	movs	r3, #0
-	ldr	r2, .L1994+20
+	ldr	r2, .L1995+20
 	strh	r3, [r4, #4]	@ movhi
 	strb	r3, [r4, #6]
 	ldrh	r2, [r2]
 	strh	r2, [r4, #2]	@ movhi
-.L1983:
+.L1984:
 	pop	{r4, r5, r6, pc}
-.L1995:
+.L1996:
 	.align	2
-.L1994:
+.L1995:
 	.word	.LANCHOR15
 	.word	.LANCHOR120
 	.word	.LANCHOR38
@@ -13557,93 +13571,93 @@ get_new_active_ppa:
 	push	{r4, r5, r6, r7, r8, lr}
 	mov	r4, r0
 	cmp	r2, r3
-	bne	.L1997
-	ldr	r1, .L2018
-	movw	r2, #3333
-	ldr	r0, .L2018+4
+	bne	.L1998
+	ldr	r1, .L2019
+	movw	r2, #3332
+	ldr	r0, .L2019+4
 	bl	printf
-	ldr	r1, .L2018+8
-	ldr	r0, .L2018+12
+	ldr	r1, .L2019+8
+	ldr	r0, .L2019+12
 	bl	printf
-.L1997:
-	ldr	r5, .L2018+16
+.L1998:
+	ldr	r5, .L2019+16
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5]
 	cmp	r2, r3
-	bne	.L1998
-	ldr	r1, .L2018
-	movw	r2, #3334
-	ldr	r0, .L2018+4
+	bne	.L1999
+	ldr	r1, .L2019
+	movw	r2, #3333
+	ldr	r0, .L2019+4
 	bl	printf
-	ldr	r1, .L2018+8
-	ldr	r0, .L2018+12
+	ldr	r1, .L2019+8
+	ldr	r0, .L2019+12
 	bl	printf
-.L1998:
+.L1999:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1999
-	ldr	r1, .L2018
-	movw	r2, #3335
-	ldr	r0, .L2018+4
+	cbnz	r3, .L2000
+	ldr	r1, .L2019
+	movw	r2, #3334
+	ldr	r0, .L2019+4
 	bl	printf
-	ldr	r1, .L2018+8
-	ldr	r0, .L2018+12
+	ldr	r1, .L2019+8
+	ldr	r0, .L2019+12
 	bl	printf
-.L1999:
+.L2000:
 	movs	r3, #0
-	ldr	r7, .L2018+20
+	ldr	r7, .L2019+20
 	strb	r3, [r4, #10]
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	ldr	r6, .L2018+24
+	ldr	r6, .L2019+24
 	adds	r3, r3, #8
 	ldrh	r2, [r4, r3, lsl #1]
-.L2000:
+.L2001:
 	movw	r0, #65535
 	cmp	r2, r0
-	beq	.L2001
+	beq	.L2002
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	ldrh	r1, [r4, #2]
 	cmp	r3, #1
 	ldrh	r3, [r4, #4]
-	bne	.L2003
+	bne	.L2004
 	ldrb	ip, [r6]	@ zero_extendqisi2
 	cmp	ip, #0
-	bne	.L2003
-	ldr	ip, .L2018+28
+	bne	.L2004
+	ldr	ip, .L2019+28
 	ldrh	ip, [ip, r1, lsl #1]
 	cmp	ip, r0
-	bne	.L2003
+	bne	.L2004
 	subs	r3, r3, #1
 	ldrh	r0, [r4]
 	strh	r3, [r4, #4]	@ movhi
 	bl	decrement_vpc_count
-.L2001:
+.L2002:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	ldrh	r2, [r7]
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r2, r3
 	strb	r3, [r4, #6]
-	bne	.L2002
+	bne	.L2003
 	ldrh	r3, [r4, #2]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [r4, #6]
-.L2002:
+.L2003:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r2, [r4, r3, lsl #1]
-	b	.L2000
-.L2003:
-	ldr	r8, .L2018+24
+	b	.L2001
+.L2004:
+	ldr	r8, .L2019+24
 	orr	r6, r1, r2, lsl #10
 	subs	r3, r3, #1
 	strh	r3, [r4, #4]	@ movhi
-.L2004:
+.L2005:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	movw	r2, #65535
 	ldrh	r0, [r7]
-.L2006:
+.L2007:
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, r0
@@ -13655,31 +13669,31 @@ get_new_active_ppa:
 	add	r1, r3, #8
 	ldrh	r1, [r4, r1, lsl #1]
 	cmp	r1, r2
-	beq	.L2006
+	beq	.L2007
 	strb	r3, [r4, #6]
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L2007
+	bne	.L2008
 	ldrb	r1, [r8]	@ zero_extendqisi2
 	ldrh	r3, [r4, #2]
-	cbnz	r1, .L2008
-	ldr	r1, .L2018+28
+	cbnz	r1, .L2009
+	ldr	r1, .L2019+28
 	ldrh	r3, [r1, r3, lsl #1]
 	cmp	r3, r2
-	bne	.L2007
+	bne	.L2008
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L2007
+	cbz	r3, .L2008
 	subs	r3, r3, #1
 	ldrh	r0, [r4]
 	strh	r3, [r4, #4]	@ movhi
 	bl	decrement_vpc_count
-	b	.L2004
-.L2008:
-	ldr	r2, .L2018+32
+	b	.L2005
+.L2009:
+	ldr	r2, .L2019+32
 	ldrh	r2, [r2]
 	cmp	r3, r2
-	bcc	.L2007
-	ldr	r3, .L2018+36
+	bcc	.L2008
+	ldr	r3, .L2019+36
 	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
 	ldr	r2, [r3]
@@ -13691,26 +13705,26 @@ get_new_active_ppa:
 	strh	r3, [r4, #4]	@ movhi
 	strb	r3, [r4, #6]
 	strh	r2, [r4, #2]	@ movhi
-.L2007:
+.L2008:
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5]
 	cmp	r2, r3
-	bne	.L1996
+	bne	.L1997
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L1996
-	ldr	r1, .L2018
-	movw	r2, #3379
-	ldr	r0, .L2018+4
+	cbz	r3, .L1997
+	ldr	r1, .L2019
+	movw	r2, #3378
+	ldr	r0, .L2019+4
 	bl	printf
-	ldr	r1, .L2018+8
-	ldr	r0, .L2018+12
+	ldr	r1, .L2019+8
+	ldr	r0, .L2019+12
 	bl	printf
-.L1996:
+.L1997:
 	mov	r0, r6
 	pop	{r4, r5, r6, r7, r8, pc}
-.L2019:
+.L2020:
 	.align	2
-.L2018:
+.L2019:
 	.word	.LANCHOR209
 	.word	.LC5
 	.word	.LC6
@@ -13733,16 +13747,16 @@ get_new_active_ppa:
 FtlVpcTblFlush:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L2044
+	ldr	r2, .L2045
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	ldr	r3, [r2]
 	str	r2, [sp, #4]
 	cmp	r3, #0
-	bne	.L2022
-	ldr	r4, .L2044+4
-	ldr	r8, .L2044+112
-	ldr	fp, .L2044+116
-	ldr	r5, .L2044+8
+	bne	.L2023
+	ldr	r4, .L2045+4
+	ldr	r8, .L2045+112
+	ldr	fp, .L2045+116
+	ldr	r5, .L2045+8
 	ldr	r0, [r8]
 	ldr	r6, [fp]
 	ldrh	r2, [r4]
@@ -13750,21 +13764,21 @@ FtlVpcTblFlush:
 	str	r6, [r5, #12]
 	strh	r2, [r6, #2]	@ movhi
 	movw	r2, #61604
-	ldr	r7, .L2044+12
+	ldr	r7, .L2045+12
 	strh	r2, [r6]	@ movhi
 	str	r3, [r6, #12]
-	ldr	ip, .L2044+120
+	ldr	ip, .L2045+120
 	ldr	r2, [r4, #8]
 	str	r3, [r6, #8]
-	ldr	r3, .L2044+16
+	ldr	r3, .L2045+16
 	str	r2, [r6, #4]
 	stm	r7, {r3, ip}
 	ldrh	r3, [r4, #6]
 	strh	r3, [r7, #8]	@ movhi
-	ldr	r3, .L2044+20
+	ldr	r3, .L2045+20
 	ldrh	r3, [r3]
 	strb	r3, [r7, #10]
-	ldr	r3, .L2044+24
+	ldr	r3, .L2045+24
 	ldrh	r2, [r3]
 	ldrh	r1, [r3, #2]
 	strh	r2, [r7, #14]	@ movhi
@@ -13772,7 +13786,7 @@ FtlVpcTblFlush:
 	ldrb	r3, [r3, #8]	@ zero_extendqisi2
 	strb	r3, [r7, #11]
 	orr	r2, r2, r1, lsl #6
-	ldr	r3, .L2044+28
+	ldr	r3, .L2045+28
 	strh	r2, [r7, #16]	@ movhi
 	ldrh	r2, [r3]
 	ldrh	r1, [r3, #2]
@@ -13781,7 +13795,7 @@ FtlVpcTblFlush:
 	ldrb	r3, [r3, #8]	@ zero_extendqisi2
 	strb	r3, [r7, #12]
 	orr	r2, r2, r1, lsl #6
-	ldr	r3, .L2044+32
+	ldr	r3, .L2045+32
 	strh	r2, [r7, #20]	@ movhi
 	ldrh	r2, [r3]
 	strh	r2, [r7, #22]	@ movhi
@@ -13790,33 +13804,33 @@ FtlVpcTblFlush:
 	ldrb	r3, [r3, #8]	@ zero_extendqisi2
 	strb	r3, [r7, #13]
 	orr	r2, r2, r1, lsl #6
-	ldr	r3, .L2044+36
+	ldr	r3, .L2045+36
 	movs	r1, #255
 	strh	r2, [r7, #24]	@ movhi
 	ldr	r3, [r3]
 	str	r3, [r7, #32]
-	ldr	r3, .L2044+40
+	ldr	r3, .L2045+40
 	ldr	r3, [r3]
 	str	r3, [r7, #40]
-	ldr	r3, .L2044+44
+	ldr	r3, .L2045+44
 	ldr	r3, [r3]
 	str	r3, [r7, #36]
-	ldr	r3, .L2044+48
+	ldr	r3, .L2045+48
 	ldrh	r3, [r3]
 	strh	r3, [r7, #44]	@ movhi
-	ldr	r3, .L2044+52
+	ldr	r3, .L2045+52
 	ldrh	r3, [r3]
 	strh	r3, [r7, #46]	@ movhi
-	ldr	r3, .L2044+56
+	ldr	r3, .L2045+56
 	ldrh	r2, [r3]
 	bl	ftl_memset
 	mov	r1, r7
-	ldr	r7, .L2044+60
+	ldr	r7, .L2045+60
 	movs	r2, #48
 	ldr	r0, [r5, #8]
 	bl	ftl_memcpy
 	ldrh	r2, [r7]
-	ldr	r3, .L2044+64
+	ldr	r3, .L2045+64
 	ldr	r0, [r5, #8]
 	ldr	r1, [r3]
 	lsls	r2, r2, #1
@@ -13824,7 +13838,7 @@ FtlVpcTblFlush:
 	bl	ftl_memcpy
 	ldrh	r0, [r7]
 	ldr	r3, [r5, #8]
-	ldr	r1, .L2044+68
+	ldr	r1, .L2045+68
 	lsrs	r2, r0, #3
 	adds	r0, r0, #24
 	lsls	r0, r0, #1
@@ -13833,12 +13847,12 @@ FtlVpcTblFlush:
 	bic	r0, r0, #3
 	add	r0, r0, r3
 	bl	ftl_memcpy
-	ldr	r3, .L2044+72
+	ldr	r3, .L2045+72
 	ldrh	r3, [r3]
-	cbz	r3, .L2023
+	cbz	r3, .L2024
 	ldrh	r0, [r7]
-	ldr	r3, .L2044+76
-	ldr	r1, .L2044+80
+	ldr	r3, .L2045+76
+	ldr	r1, .L2045+80
 	ldrh	r2, [r3]
 	lsrs	r3, r0, #3
 	ldr	r1, [r1]
@@ -13849,12 +13863,12 @@ FtlVpcTblFlush:
 	ubfx	r3, r3, #2, #14
 	add	r0, r0, r3, lsl #2
 	bl	ftl_memcpy
-.L2023:
+.L2024:
 	movs	r7, #0
 	movw	r10, #65535
 	movs	r0, #0
 	bl	FtlUpdateVaildLpn
-.L2024:
+.L2025:
 	ldr	r3, [r8]
 	ldrh	r1, [r4, #2]
 	ldrh	r2, [r4]
@@ -13863,18 +13877,18 @@ FtlVpcTblFlush:
 	str	r3, [r5, #12]
 	orr	r3, r1, r2, lsl #10
 	str	r3, [r5, #4]
-	ldr	r3, .L2044+84
+	ldr	r3, .L2045+84
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r1, r3
-	blt	.L2025
+	blt	.L2026
 	movs	r3, #0
 	ldrh	r10, [r4, #4]
 	strh	r3, [r4, #2]	@ movhi
 	strh	r2, [r4, #4]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L2044+40
-	ldr	r1, .L2044+40
+	ldr	r3, .L2045+40
+	ldr	r1, .L2045+40
 	strh	r0, [r4]	@ movhi
 	ldr	r3, [r3]
 	adds	r2, r3, #1
@@ -13884,18 +13898,18 @@ FtlVpcTblFlush:
 	str	r2, [r5, #4]
 	str	r3, [r6, #4]
 	strh	r0, [r6, #2]	@ movhi
-.L2025:
-	ldr	r3, .L2044+88
+.L2026:
+	ldr	r3, .L2045+88
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2026
-	ldr	r3, .L2044+56
+	cbz	r3, .L2027
+	ldr	r3, .L2045+56
 	ldr	r0, [r8]
 	ldrh	r1, [r3]
 	bl	js_hash
 	str	r0, [r6, #12]
-.L2026:
+.L2027:
 	movs	r3, #1
-	ldr	r0, .L2044+8
+	ldr	r0, .L2045+8
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
@@ -13905,55 +13919,55 @@ FtlVpcTblFlush:
 	uxth	r3, r3
 	adds	r1, r2, #1
 	strh	r3, [r4, #2]	@ movhi
-	bne	.L2027
-	cmp	r3, #1
 	bne	.L2028
-	ldr	r1, .L2044+92
+	cmp	r3, #1
+	bne	.L2029
+	ldr	r1, .L2045+92
 	movw	r2, #1219
-	ldr	r0, .L2044+96
+	ldr	r0, .L2045+96
 	bl	printf
-	ldr	r1, .L2044+100
-	ldr	r0, .L2044+104
+	ldr	r1, .L2045+100
+	ldr	r0, .L2045+104
 	bl	printf
-.L2028:
+.L2029:
 	ldrh	r3, [r4, #2]
 	adds	r7, r7, #1
 	uxth	r7, r7
 	cmp	r3, #1
 	itttt	eq
-	ldreq	r3, .L2044+84
+	ldreq	r3, .L2045+84
 	ldrheq	r3, [r3]
 	addeq	r3, r3, #-1
 	strheq	r3, [r4, #2]	@ movhi
 	cmp	r7, #3
-	bls	.L2024
+	bls	.L2025
 	mov	r2, r7
 	ldr	r1, [r5, #4]
-	ldr	r0, .L2044+108
+	ldr	r0, .L2045+108
 	bl	printf
 	ldr	r2, [sp, #4]
 	movs	r3, #1
 	str	r3, [r2]
-.L2022:
+.L2023:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2027:
+.L2028:
 	cmp	r3, #1
-	beq	.L2024
+	beq	.L2025
 	cmp	r2, #256
-	beq	.L2024
+	beq	.L2025
 	movw	r3, #65535
 	cmp	r10, r3
-	beq	.L2022
+	beq	.L2023
 	movs	r1, #1
 	mov	r0, r10
 	bl	FtlFreeSysBlkQueueIn
-	b	.L2022
-.L2045:
+	b	.L2023
+.L2046:
 	.align	2
-.L2044:
+.L2045:
 	.word	.LANCHOR76
 	.word	.LANCHOR210
 	.word	.LANCHOR203
@@ -13984,7 +13998,7 @@ FtlVpcTblFlush:
 	.word	.LC38
 	.word	.LANCHOR183
 	.word	.LANCHOR188
-	.word	1342177366
+	.word	1342177367
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
 	.section	.text.FtlSuperblockPowerLostFix,"ax",%progbits
 	.align	1
@@ -13997,31 +14011,31 @@ FtlVpcTblFlush:
 FtlSuperblockPowerLostFix:
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2061
+	ldr	r3, .L2062
 	push	{r4, r5, r6, r7, r8, r10, lr}
 	mov	r4, r0
 	sub	sp, sp, #44
 	ldr	r8, [r3]
 	cmp	r8, #0
-	bne	.L2046
-	ldr	r3, .L2061+4
+	bne	.L2047
+	ldr	r3, .L2062+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L2057
+	beq	.L2058
 	ldrb	r3, [r0, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L2057
+	bne	.L2058
 	ldrh	r6, [r0, #4]
 	mov	r8, r3
-.L2048:
+.L2049:
 	mov	r3, #-1
-	ldr	r2, .L2061+8
+	ldr	r2, .L2062+8
 	str	r3, [sp, #20]
 	movs	r7, #0
-	ldr	r3, .L2061+12
+	ldr	r3, .L2062+12
 	ldr	r5, [r2]
 	mvn	r2, #2
-	ldr	r10, .L2061+24
+	ldr	r10, .L2062+24
 	ldr	r3, [r3]
 	str	r5, [sp, #16]
 	str	r3, [sp, #12]
@@ -14037,38 +14051,38 @@ FtlSuperblockPowerLostFix:
 	add	r2, r2, #1269760
 	addw	r2, r2, #1507
 	str	r2, [r3, #4]
-.L2049:
+.L2050:
 	adds	r6, r6, #-1
-	bcc	.L2052
+	bcc	.L2053
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L2050
-.L2052:
-	ldr	r3, .L2061+16
+	cbnz	r3, .L2051
+.L2053:
+	ldr	r3, .L2062+16
 	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
-	ldr	r3, .L2061+20
+	ldr	r3, .L2062+20
 	ldrh	r3, [r3]
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [r4, #6]
 	strh	r3, [r4, #4]	@ movhi
-.L2046:
+.L2047:
 	add	sp, sp, #44
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L2057:
+.L2058:
 	movs	r6, #12
-	b	.L2048
-.L2050:
+	b	.L2049
+.L2051:
 	mov	r0, r4
 	bl	get_new_active_ppa
 	str	r0, [sp, #8]
 	adds	r0, r0, #1
-	beq	.L2052
+	beq	.L2053
 	ldr	r3, [r10]
 	movs	r1, #1
 	add	r0, sp, #4
@@ -14083,10 +14097,10 @@ FtlSuperblockPowerLostFix:
 	bl	FlashProgPages
 	ldrh	r0, [r4]
 	bl	decrement_vpc_count
-	b	.L2049
-.L2062:
+	b	.L2050
+.L2063:
 	.align	2
-.L2061:
+.L2062:
 	.word	.LANCHOR76
 	.word	.LANCHOR15
 	.word	.LANCHOR188
@@ -14106,36 +14120,36 @@ FtlSuperblockPowerLostFix:
 FtlLoadFactoryBbt:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2073
+	ldr	r3, .L2074
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r6, #0
-	ldr	r5, .L2073+4
+	ldr	r5, .L2074+4
 	ldr	r3, [r3]
-	ldr	r7, .L2073+8
-	ldr	r10, .L2073+20
+	ldr	r7, .L2074+8
+	ldr	r10, .L2074+20
 	str	r3, [r5, #8]
-	ldr	r3, .L2073+12
+	ldr	r3, .L2074+12
 	ldr	r8, [r3]
 	str	r8, [r5, #12]
-.L2064:
-	ldr	r3, .L2073+16
+.L2065:
+	ldr	r3, .L2074+16
 	ldrh	r3, [r3]
 	cmp	r6, r3
-	bcc	.L2069
+	bcc	.L2070
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2069:
+.L2070:
 	ldrh	r4, [r10]
 	movw	r3, #65535
-	ldr	fp, .L2073+4
+	ldr	fp, .L2074+4
 	strh	r3, [r7, #2]!	@ movhi
 	subs	r4, r4, #1
 	uxth	r4, r4
-.L2065:
+.L2066:
 	ldrh	r3, [r10]
 	sub	r2, r3, #15
 	cmp	r2, r4
-	bgt	.L2067
+	bgt	.L2068
 	mla	r3, r6, r3, r4
 	movs	r2, #1
 	mov	r1, r2
@@ -14145,22 +14159,22 @@ FtlLoadFactoryBbt:
 	bl	FlashReadPages
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L2066
+	beq	.L2067
 	ldrh	r2, [r8]
 	movw	r3, #61664
 	cmp	r2, r3
-	bne	.L2066
+	bne	.L2067
 	strh	r4, [r7]	@ movhi
-.L2067:
+.L2068:
 	adds	r6, r6, #1
-	b	.L2064
-.L2066:
+	b	.L2065
+.L2067:
 	subs	r4, r4, #1
 	uxth	r4, r4
-	b	.L2065
-.L2074:
+	b	.L2066
+.L2075:
 	.align	2
-.L2073:
+.L2074:
 	.word	.LANCHOR183
 	.word	.LANCHOR203
 	.word	.LANCHOR74+10
@@ -14182,12 +14196,12 @@ FtlGetLastWrittenPage:
 	cmp	r1, #1
 	push	{r4, r5, r6, r7, r8, lr}
 	it	eq
-	ldreq	r3, .L2087
+	ldreq	r3, .L2088
 	sub	sp, sp, #104
 	lsl	r7, r0, #10
 	mov	r2, r1
 	it	ne
-	ldrne	r3, .L2087+4
+	ldrne	r3, .L2088+4
 	mov	r8, r1
 	movs	r6, #0
 	movs	r1, #1
@@ -14203,16 +14217,16 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	r3, [sp, #40]
 	adds	r3, r3, #1
-	bne	.L2078
-.L2079:
+	bne	.L2079
+.L2080:
 	cmp	r6, r5
-	ble	.L2082
-.L2078:
+	ble	.L2083
+.L2079:
 	mov	r0, r5
 	add	sp, sp, #104
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L2082:
+.L2083:
 	adds	r3, r6, r5
 	mov	r2, r8
 	add	r3, r3, r3, lsr #31
@@ -14225,23 +14239,23 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	r3, [sp, #40]
 	adds	r3, r3, #1
-	bne	.L2080
+	bne	.L2081
 	ldr	r3, [sp, #44]
 	adds	r3, r3, #1
-	bne	.L2080
+	bne	.L2081
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
-	beq	.L2080
+	beq	.L2081
 	subs	r4, r4, #1
 	sxth	r5, r4
-	b	.L2079
-.L2080:
+	b	.L2080
+.L2081:
 	adds	r4, r4, #1
 	sxth	r6, r4
-	b	.L2079
-.L2088:
+	b	.L2080
+.L2089:
 	.align	2
-.L2087:
+.L2088:
 	.word	.LANCHOR53
 	.word	.LANCHOR52
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
@@ -14257,24 +14271,24 @@ FtlLoadBbt:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	ldr	r8, .L2118+48
-	ldr	r4, .L2118
+	ldr	r8, .L2119+48
+	ldr	r4, .L2119
 	ldr	r3, [r8]
-	ldr	r7, .L2118+4
+	ldr	r7, .L2119+4
 	mov	r10, r4
 	str	r3, [r4, #8]
-	ldr	r3, .L2118+8
+	ldr	r3, .L2119+8
 	ldr	r6, [r3]
 	str	r6, [r4, #12]
 	bl	FtlBbtMemInit
 	ldrh	r5, [r7]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L2090:
+.L2091:
 	ldrh	r3, [r7]
 	subs	r3, r3, #47
 	cmp	r3, r5
-	bgt	.L2093
+	bgt	.L2094
 	lsls	r3, r5, #10
 	movs	r2, #1
 	mov	r1, r2
@@ -14283,7 +14297,7 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	bne	.L2091
+	bne	.L2092
 	ldr	r3, [r4, #4]
 	movs	r2, #1
 	mov	r1, r2
@@ -14291,104 +14305,104 @@ FtlLoadBbt:
 	adds	r3, r3, #1
 	str	r3, [r4, #4]
 	bl	FlashReadPages
-.L2091:
+.L2092:
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L2092
+	beq	.L2093
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L2092
-	ldr	r3, .L2118+12
+	bne	.L2093
+	ldr	r3, .L2119+12
 	ldr	r2, [r6, #4]
 	strh	r5, [r3]	@ movhi
 	str	r2, [r3, #8]
 	ldrh	r2, [r6, #8]
 	strh	r2, [r3, #4]	@ movhi
-.L2093:
-	ldr	r5, .L2118+12
+.L2094:
+	ldr	r5, .L2119+12
 	movw	r2, #65535
 	ldrh	r3, [r5]
 	cmp	r3, r2
-	beq	.L2107
+	beq	.L2108
 	ldrh	r3, [r5, #4]
 	cmp	r3, r2
-	beq	.L2097
+	beq	.L2098
 	lsls	r3, r3, #10
 	movs	r2, #1
 	mov	r1, r2
-	ldr	r0, .L2118
+	ldr	r0, .L2119
 	str	r3, [r4, #4]
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L2097
+	beq	.L2098
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L2097
+	bne	.L2098
 	ldr	r3, [r6, #4]
 	ldr	r2, [r5, #8]
 	cmp	r3, r2
-	bls	.L2097
+	bls	.L2098
 	ldrh	r2, [r5, #4]
 	str	r3, [r5, #8]
 	ldrh	r3, [r6, #8]
 	strh	r2, [r5]	@ movhi
 	strh	r3, [r5, #4]	@ movhi
-.L2097:
-	ldr	r10, .L2118
+.L2098:
+	ldr	r10, .L2119
 	movs	r1, #1
 	ldrh	r0, [r5]
 	bl	FtlGetLastWrittenPage
 	sxth	r7, r0
 	adds	r0, r0, #1
 	strh	r0, [r5, #2]	@ movhi
-.L2099:
+.L2100:
 	cmp	r7, #0
-	bge	.L2102
-	ldr	r1, .L2118+16
+	bge	.L2103
+	ldr	r1, .L2119+16
 	mov	r2, #334
-	ldr	r0, .L2118+20
+	ldr	r0, .L2119+20
 	bl	printf
-	ldr	r1, .L2118+24
-	ldr	r0, .L2118+28
+	ldr	r1, .L2119+24
+	ldr	r0, .L2119+28
 	bl	printf
-.L2101:
+.L2102:
 	ldrh	r3, [r6, #10]
 	ldrh	r0, [r6, #12]
 	strh	r3, [r5, #6]	@ movhi
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L2104
-	ldr	r3, .L2118+32
+	beq	.L2105
+	ldr	r3, .L2119+32
 	ldr	r2, [r3]
 	cmp	r0, r2
-	beq	.L2104
-	ldr	r3, .L2118+36
+	beq	.L2105
+	ldr	r3, .L2119+36
 	ldrh	r3, [r3]
 	lsrs	r3, r3, #2
 	cmp	r2, r3
-	bcs	.L2104
+	bcs	.L2105
 	cmp	r0, r3
-	bcs	.L2104
+	bcs	.L2105
 	bl	FtlSysBlkNumInit
-.L2104:
-	ldr	r6, .L2118+40
-	movs	r5, #0
-	ldr	r7, .L2118+44
-	ldr	r8, .L2118+52
 .L2105:
+	ldr	r6, .L2119+40
+	movs	r5, #0
+	ldr	r7, .L2119+44
+	ldr	r8, .L2119+52
+.L2106:
 	ldrh	r3, [r7]
 	cmp	r5, r3
-	bcc	.L2106
+	bcc	.L2107
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L2092:
+.L2093:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L2090
-.L2102:
+	b	.L2091
+.L2103:
 	ldrh	r3, [r5]
 	movs	r2, #1
 	mov	r1, r2
@@ -14400,16 +14414,16 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L2100
+	beq	.L2101
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	beq	.L2101
-.L2100:
+	beq	.L2102
+.L2101:
 	subs	r7, r7, #1
 	sxth	r7, r7
-	b	.L2099
-.L2106:
+	b	.L2100
+.L2107:
 	ldrh	r2, [r8]
 	ldr	r1, [r4, #8]
 	ldr	r0, [r6, #4]!
@@ -14417,13 +14431,13 @@ FtlLoadBbt:
 	mla	r1, r5, r2, r1
 	adds	r5, r5, #1
 	bl	ftl_memcpy
-	b	.L2105
-.L2107:
+	b	.L2106
+.L2108:
 	mov	r0, #-1
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L2119:
+.L2120:
 	.align	2
-.L2118:
+.L2119:
 	.word	.LANCHOR203
 	.word	.LANCHOR51
 	.word	.LANCHOR188
@@ -14460,13 +14474,13 @@ ftl_map_blk_gc:
 	ldrh	r2, [r4, #8]
 	subs	r3, r3, #4
 	cmp	r2, r3
-	blt	.L2121
+	blt	.L2122
 	uxth	r0, r0
 	ldrh	r8, [r5, r0, lsl #1]
 	cmp	r8, #0
-	beq	.L2121
+	beq	.L2122
 	ldr	r3, [r4, #32]
-	cbnz	r3, .L2121
+	cbnz	r3, .L2122
 	movs	r2, #1
 	str	r2, [r4, #32]
 	strh	r3, [r5, r0, lsl #1]	@ movhi
@@ -14474,35 +14488,35 @@ ftl_map_blk_gc:
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	ldr	r3, .L2133
+	ldr	r3, .L2134
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L2122
+	bcc	.L2123
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L2122:
-	ldr	r5, .L2133+4
-	movs	r6, #0
 .L2123:
+	ldr	r5, .L2134+4
+	movs	r6, #0
+.L2124:
 	ldrh	r3, [r4, #6]
 	uxth	r10, r6
 	cmp	r3, r10
-	bhi	.L2129
+	bhi	.L2130
 	movs	r1, #1
 	mov	r0, r8
 	bl	FtlFreeSysBlkQueueIn
 	movs	r3, #0
 	str	r3, [r4, #32]
-.L2121:
-	ldr	r3, .L2133
+.L2122:
+	ldr	r3, .L2134
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L2127
+	bcc	.L2128
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-	b	.L2127
-.L2129:
+	b	.L2128
+.L2130:
 	ldr	r3, [sp]
 	uxth	fp, r6
 	add	r3, r3, fp, lsl #2
@@ -14510,65 +14524,65 @@ ftl_map_blk_gc:
 	ldr	r3, [sp]
 	ldr	r2, [r3, fp, lsl #2]
 	cmp	r8, r2, lsr #10
-	bne	.L2124
-	ldr	r3, .L2133+8
+	bne	.L2125
+	ldr	r3, .L2134+8
 	str	r2, [r5, #4]
 	movs	r2, #1
-	ldr	r0, .L2133+4
+	ldr	r0, .L2134+4
 	ldr	r1, [r3]
 	str	r1, [r5, #8]
-	ldr	r1, .L2133+12
+	ldr	r1, .L2134+12
 	ldr	r7, [r1]
 	mov	r1, r2
 	str	r7, [r5, #12]
 	bl	FlashReadPages
 	ldrh	r2, [r7, #8]
 	cmp	r2, r10
-	beq	.L2125
-	ldr	r1, .L2133+16
+	beq	.L2126
+	ldr	r1, .L2134+16
 	movw	r2, #661
-	ldr	r0, .L2133+20
+	ldr	r0, .L2134+20
 	bl	printf
-	ldr	r1, .L2133+24
-	ldr	r0, .L2133+28
+	ldr	r1, .L2134+24
+	ldr	r0, .L2134+28
 	bl	printf
-.L2125:
+.L2126:
 	ldr	r2, [r5]
 	adds	r2, r2, #1
 	ldrh	r2, [r7, #8]
-	bne	.L2126
-.L2128:
+	bne	.L2127
+.L2129:
 	ldr	r1, [sp, #4]
 	movs	r3, #0
-	ldr	r0, .L2133+32
+	ldr	r0, .L2134+32
 	str	r3, [r1]
 	ldr	r1, [r5, #4]
 	bl	printf
-	ldr	r3, .L2133+36
+	ldr	r3, .L2134+36
 	movs	r2, #1
 	str	r2, [r3]
-.L2127:
+.L2128:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2126:
+.L2127:
 	cmp	r2, r10
-	bne	.L2128
+	bne	.L2129
 	ldrh	r0, [r7]
 	ldrh	r1, [r4, #4]
 	cmp	r0, r1
-	bne	.L2128
+	bne	.L2129
 	ldr	r2, [r5, #8]
 	mov	r1, fp
 	mov	r0, r4
 	bl	FtlMapWritePage
-.L2124:
+.L2125:
 	adds	r6, r6, #1
-	b	.L2123
-.L2134:
+	b	.L2124
+.L2135:
 	.align	2
-.L2133:
+.L2134:
 	.word	.LANCHOR53
 	.word	.LANCHOR203
 	.word	.LANCHOR184
@@ -14591,26 +14605,26 @@ ftl_map_blk_gc:
 Ftl_write_map_blk_to_last_page:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2149
+	ldr	r3, .L2150
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	ldr	r5, [r3]
-	cbnz	r5, .L2136
+	cbnz	r5, .L2137
 	ldrh	r3, [r0]
 	movw	r2, #65535
 	ldr	r6, [r0, #12]
 	cmp	r3, r2
-	bne	.L2137
+	bne	.L2138
 	ldrh	r3, [r0, #8]
-	cbz	r3, .L2138
-	ldr	r1, .L2149+4
+	cbz	r3, .L2139
+	ldr	r1, .L2150+4
 	movw	r2, #697
-	ldr	r0, .L2149+8
+	ldr	r0, .L2150+8
 	bl	printf
-	ldr	r1, .L2149+12
-	ldr	r0, .L2149+16
+	ldr	r1, .L2150+12
+	ldr	r0, .L2150+16
 	bl	printf
-.L2138:
+.L2139:
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
@@ -14622,20 +14636,20 @@ Ftl_write_map_blk_to_last_page:
 	ldr	r3, [r4, #28]
 	adds	r3, r3, #1
 	str	r3, [r4, #28]
-.L2136:
+.L2137:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2137:
+.L2138:
 	ldrh	r8, [r6, r3, lsl #1]
 	movs	r1, #255
 	ldrh	r3, [r0, #2]
-	ldr	r7, .L2149+20
-	ldr	fp, .L2149+40
+	ldr	r7, .L2150+20
+	ldr	fp, .L2150+40
 	ldr	r10, [r0, #24]
 	orr	r3, r3, r8, lsl #10
 	ldr	r0, [fp]
 	str	r3, [r7, #4]
-	ldr	r3, .L2149+24
+	ldr	r3, .L2150+24
 	str	r0, [r7, #8]
 	ldr	r6, [r3]
 	ldr	r3, [r4, #28]
@@ -14646,7 +14660,7 @@ Ftl_write_map_blk_to_last_page:
 	ldrh	r3, [r4, #4]
 	strh	r8, [r6, #2]	@ movhi
 	strh	r3, [r6]	@ movhi
-	ldr	r3, .L2149+28
+	ldr	r3, .L2150+28
 	ldrh	r2, [r3]
 	lsls	r2, r2, #3
 	bl	ftl_memset
@@ -14654,46 +14668,46 @@ Ftl_write_map_blk_to_last_page:
 	mov	r3, r5
 	ldr	r1, [fp]
 	mov	r2, r5
-.L2139:
+.L2140:
 	uxth	r0, r3
 	cmp	ip, r0
-	bhi	.L2141
-	ldr	r3, .L2149+32
+	bhi	.L2142
+	ldr	r3, .L2150+32
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2142
-	ldr	r3, .L2149+36
+	cbz	r3, .L2143
+	ldr	r3, .L2150+36
 	ldr	r0, [r7, #8]
 	ldrh	r1, [r3]
 	bl	js_hash
 	str	r0, [r6, #12]
-.L2142:
+.L2143:
 	movs	r2, #1
 	movs	r3, #0
 	mov	r1, r2
-	ldr	r0, .L2149+20
+	ldr	r0, .L2150+20
 	bl	FlashProgPages
 	ldrh	r3, [r4, #2]
 	mov	r0, r4
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	bl	ftl_map_blk_gc
-	b	.L2136
-.L2141:
+	b	.L2137
+.L2142:
 	ldr	r0, [r10, r3, lsl #2]
 	cmp	r8, r0, lsr #10
-	bne	.L2140
+	bne	.L2141
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r3, [r1, r2, lsl #3]
 	add	r5, r1, r2, lsl #3
 	ldr	r0, [r10, r3, lsl #2]
 	str	r0, [r5, #4]
-.L2140:
+.L2141:
 	adds	r3, r3, #1
-	b	.L2139
-.L2150:
+	b	.L2140
+.L2151:
 	.align	2
-.L2149:
+.L2150:
 	.word	.LANCHOR76
 	.word	.LANCHOR214
 	.word	.LC5
@@ -14719,12 +14733,12 @@ FtlMapWritePage:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-	ldr	r10, .L2177+44
+	ldr	r10, .L2178+44
 	mov	r8, r1
 	movs	r6, #0
 	str	r2, [sp, #4]
-.L2152:
-	ldr	r2, .L2177
+.L2153:
+	ldr	r2, .L2178
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
@@ -14732,48 +14746,48 @@ FtlMapWritePage:
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	bge	.L2153
+	bge	.L2154
 	ldrh	r2, [r4]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L2154
-.L2153:
+	bne	.L2155
+.L2154:
 	mov	r0, r4
 	bl	Ftl_write_map_blk_to_last_page
-.L2154:
-	ldr	r3, .L2177+4
+.L2155:
+	ldr	r3, .L2178+4
 	ldr	r2, [r3]
 	str	r3, [sp, #8]
 	cmp	r2, #0
-	bne	.L2172
+	bne	.L2173
 	ldrh	r2, [r4]
 	ldr	r3, [r4, #12]
 	ldrh	r3, [r3, r2, lsl #1]
-	cbnz	r3, .L2156
-	ldr	r1, .L2177+8
+	cbnz	r3, .L2157
+	ldr	r1, .L2178+8
 	movw	r2, #759
-	ldr	r0, .L2177+12
+	ldr	r0, .L2178+12
 	bl	printf
-	ldr	r1, .L2177+16
-	ldr	r0, .L2177+20
+	ldr	r1, .L2178+16
+	ldr	r0, .L2178+20
 	bl	printf
-.L2156:
+.L2157:
 	ldrh	r2, [r4]
 	ldrh	r3, [r4, #10]
 	cmp	r2, r3
-	bcc	.L2157
-	ldr	r1, .L2177+8
+	bcc	.L2158
+	ldr	r1, .L2178+8
 	mov	r2, #760
-	ldr	r0, .L2177+12
+	ldr	r0, .L2178+12
 	bl	printf
-	ldr	r1, .L2177+16
-	ldr	r0, .L2177+20
+	ldr	r1, .L2178+16
+	ldr	r0, .L2178+20
 	bl	printf
-.L2157:
+.L2158:
 	ldrh	r2, [r4]
 	movs	r1, #0
 	ldr	r3, [r4, #12]
-	ldr	r5, .L2177+24
+	ldr	r5, .L2178+24
 	ldrh	r7, [r3, r2, lsl #1]
 	movs	r2, #16
 	ldrh	r3, [r4, #2]
@@ -14782,7 +14796,7 @@ FtlMapWritePage:
 	str	r3, [r5, #4]
 	ldr	r3, [sp, #4]
 	str	r3, [r5, #8]
-	ldr	r3, .L2177+28
+	ldr	r3, .L2178+28
 	ldr	r0, [r3]
 	str	r0, [r5, #12]
 	bl	ftl_memset
@@ -14794,18 +14808,18 @@ FtlMapWritePage:
 	strh	r8, [r3, #8]	@ movhi
 	strh	r7, [r3, #2]	@ movhi
 	strh	r2, [r3]	@ movhi
-	ldr	r2, .L2177+32
+	ldr	r2, .L2178+32
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbz	r2, .L2158
-	ldr	r2, .L2177+36
+	cbz	r2, .L2159
+	ldr	r2, .L2178+36
 	ldr	r0, [r5, #8]
 	ldrh	r1, [r2]
 	bl	js_hash
 	ldr	r3, [sp, #12]
 	str	r0, [r3, #12]
-.L2158:
+.L2159:
 	movs	r3, #1
-	ldr	r0, .L2177+24
+	ldr	r0, .L2178+24
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
@@ -14815,59 +14829,59 @@ FtlMapWritePage:
 	uxth	r3, r3
 	adds	r1, r2, #1
 	strh	r3, [r4, #2]	@ movhi
-	bne	.L2159
+	bne	.L2160
 	ldr	r1, [r5, #4]
 	adds	r6, r6, #1
-	ldr	r0, .L2177+40
+	ldr	r0, .L2178+40
 	uxth	r6, r6
 	bl	printf
 	ldrh	r3, [r4, #2]
 	cmp	r3, #2
 	itttt	ls
-	ldrls	r3, .L2177+44
+	ldrls	r3, .L2178+44
 	ldrhls	r3, [r3]
 	addls	r3, r3, #-1
 	strhls	r3, [r4, #2]	@ movhi
 	cmp	r6, #3
-	bls	.L2152
+	bls	.L2153
 	mov	r2, r6
 	ldr	r1, [fp, #4]
-	ldr	r0, .L2177+48
+	ldr	r0, .L2178+48
 	bl	printf
 	ldr	r2, [sp, #8]
 	movs	r3, #1
 	str	r3, [r2]
-.L2172:
+.L2173:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2159:
-	cbz	r2, .L2162
+.L2160:
+	cbz	r2, .L2163
 	cmp	r3, #1
 	strh	r7, [r4, #40]	@ movhi
-	bne	.L2163
-.L2164:
+	bne	.L2164
+.L2165:
 	movs	r3, #0
 	str	r3, [r4, #36]
-	b	.L2152
-.L2163:
+	b	.L2153
+.L2164:
 	cmp	r2, #256
-.L2176:
-	beq	.L2164
+.L2177:
+	beq	.L2165
 	ldr	r3, [r4, #36]
 	cmp	r3, #0
-	bne	.L2164
+	bne	.L2165
 	ldr	r2, [fp, #4]
 	ldr	r3, [r4, #24]
 	str	r2, [r3, r8, lsl #2]
-	b	.L2172
-.L2162:
+	b	.L2173
+.L2163:
 	cmp	r3, #1
-	b	.L2176
-.L2178:
+	b	.L2177
+.L2179:
 	.align	2
-.L2177:
+.L2178:
 	.word	.LANCHOR165
 	.word	.LANCHOR76
 	.word	.LANCHOR215
@@ -14895,9 +14909,9 @@ flush_l2p_region:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #12
-	ldr	r5, .L2180
+	ldr	r5, .L2181
 	muls	r4, r0, r4
-	ldr	r0, .L2180+4
+	ldr	r0, .L2181+4
 	ldr	r3, [r5]
 	adds	r2, r3, r4
 	ldrh	r1, [r3, r4]
@@ -14910,9 +14924,9 @@ flush_l2p_region:
 	bic	r3, r3, #-2147483648
 	str	r3, [r4, #4]
 	pop	{r3, r4, r5, pc}
-.L2181:
+.L2182:
 	.align	2
-.L2180:
+.L2181:
 	.word	.LANCHOR96
 	.word	.LANCHOR127
 	.size	flush_l2p_region, .-flush_l2p_region
@@ -14929,30 +14943,30 @@ l2p_flush:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
 	movs	r4, #0
-	ldr	r5, .L2186
-	ldr	r6, .L2186+4
-.L2183:
+	ldr	r5, .L2187
+	ldr	r6, .L2187+4
+.L2184:
 	ldrh	r3, [r5]
 	uxth	r0, r4
 	cmp	r3, r0
-	bhi	.L2185
+	bhi	.L2186
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L2185:
+.L2186:
 	ldr	r2, [r6]
 	uxth	r3, r4
 	movs	r1, #12
 	mla	r3, r1, r3, r2
 	ldr	r3, [r3, #4]
 	cmp	r3, #0
-	bge	.L2184
+	bge	.L2185
 	bl	flush_l2p_region
-.L2184:
+.L2185:
 	adds	r4, r4, #1
-	b	.L2183
-.L2187:
+	b	.L2184
+.L2188:
 	.align	2
-.L2186:
+.L2187:
 	.word	.LANCHOR67
 	.word	.LANCHOR96
 	.size	l2p_flush, .-l2p_flush
@@ -14967,7 +14981,7 @@ l2p_flush:
 FtlVendorPartWrite:
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2200
+	ldr	r3, .L2201
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #56
 	str	r2, [sp]
@@ -14976,26 +14990,26 @@ FtlVendorPartWrite:
 	mov	r5, r1
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L2196
-	ldr	r3, .L2200+4
+	bhi	.L2197
+	ldr	r3, .L2201+4
 	mov	r8, #0
 	ldrh	r6, [r3]
 	lsr	r6, r0, r6
 	lsl	fp, r6, #2
-.L2190:
-	cbnz	r5, .L2195
-.L2188:
+.L2191:
+	cbnz	r5, .L2196
+.L2189:
 	mov	r0, r8
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2195:
-	ldr	r3, .L2200+8
+.L2196:
+	ldr	r3, .L2201+8
 	mov	r0, r7
-	ldr	r10, .L2200+24
+	ldr	r10, .L2201+24
 	ldr	r3, [r3]
 	ldr	r2, [r3, fp]
-	ldr	r3, .L2200+12
+	ldr	r3, .L2201+12
 	str	r2, [sp, #12]
 	ldrh	r3, [r3]
 	mov	r1, r3
@@ -15009,9 +15023,9 @@ FtlVendorPartWrite:
 	cmp	r5, r4
 	it	cc
 	uxthcc	r4, r5
-	cbz	r2, .L2192
+	cbz	r2, .L2193
 	cmp	r4, r3
-	beq	.L2192
+	beq	.L2193
 	ldr	r3, [r10]
 	add	r0, sp, #20
 	str	r2, [sp, #24]
@@ -15021,7 +15035,7 @@ FtlVendorPartWrite:
 	movs	r3, #0
 	str	r3, [sp, #32]
 	bl	FlashReadPages
-.L2193:
+.L2194:
 	lsls	r3, r4, #9
 	ldr	r0, [r10]
 	subs	r5, r5, r4
@@ -15034,7 +15048,7 @@ FtlVendorPartWrite:
 	bl	ftl_memcpy
 	ldr	r2, [r10]
 	mov	r1, r6
-	ldr	r0, .L2200+16
+	ldr	r0, .L2201+16
 	adds	r6, r6, #1
 	bl	FtlMapWritePage
 	ldr	r3, [sp]
@@ -15045,20 +15059,20 @@ FtlVendorPartWrite:
 	ldr	r3, [sp, #8]
 	add	r2, r2, r3
 	str	r2, [sp]
-	b	.L2190
-.L2192:
-	ldr	r3, .L2200+20
+	b	.L2191
+.L2193:
+	ldr	r3, .L2201+20
 	movs	r1, #0
 	ldr	r0, [r10]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-	b	.L2193
-.L2196:
+	b	.L2194
+.L2197:
 	mov	r8, #-1
-	b	.L2188
-.L2201:
+	b	.L2189
+.L2202:
 	.align	2
-.L2200:
+.L2201:
 	.word	.LANCHOR50
 	.word	.LANCHOR56
 	.word	.LANCHOR194
@@ -15079,66 +15093,66 @@ Ftl_save_ext_data:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L2204
-	ldr	r3, .L2204+4
+	ldr	r2, .L2205
+	ldr	r3, .L2205+4
 	ldr	r1, [r2]
 	cmp	r1, r3
-	bne	.L2202
-	ldr	r3, .L2204+8
+	bne	.L2203
+	ldr	r3, .L2205+8
 	movs	r1, #1
 	movs	r0, #0
 	str	r3, [r2, #4]
-	ldr	r3, .L2204+12
+	ldr	r3, .L2205+12
 	ldr	r3, [r3]
 	str	r3, [r2, #88]
-	ldr	r3, .L2204+16
+	ldr	r3, .L2205+16
 	ldr	r3, [r3]
 	str	r3, [r2, #92]
-	ldr	r3, .L2204+20
+	ldr	r3, .L2205+20
 	ldr	r3, [r3]
 	str	r3, [r2, #8]
-	ldr	r3, .L2204+24
+	ldr	r3, .L2205+24
 	ldr	r3, [r3]
 	str	r3, [r2, #12]
-	ldr	r3, .L2204+28
+	ldr	r3, .L2205+28
 	ldr	r3, [r3]
 	str	r3, [r2, #16]
-	ldr	r3, .L2204+32
+	ldr	r3, .L2205+32
 	ldr	r3, [r3]
 	str	r3, [r2, #20]
-	ldr	r3, .L2204+36
+	ldr	r3, .L2205+36
 	ldr	r3, [r3]
 	str	r3, [r2, #28]
-	ldr	r3, .L2204+40
+	ldr	r3, .L2205+40
 	ldr	r3, [r3]
 	str	r3, [r2, #32]
-	ldr	r3, .L2204+44
+	ldr	r3, .L2205+44
 	ldr	r3, [r3]
 	str	r3, [r2, #36]
-	ldr	r3, .L2204+48
+	ldr	r3, .L2205+48
 	ldr	r3, [r3]
 	str	r3, [r2, #40]
-	ldr	r3, .L2204+52
+	ldr	r3, .L2205+52
 	ldr	r3, [r3]
 	str	r3, [r2, #44]
-	ldr	r3, .L2204+56
+	ldr	r3, .L2205+56
 	ldr	r3, [r3]
 	str	r3, [r2, #48]
-	ldr	r3, .L2204+60
+	ldr	r3, .L2205+60
 	ldr	r3, [r3]
 	str	r3, [r2, #60]
-	ldr	r3, .L2204+64
+	ldr	r3, .L2205+64
 	ldr	r3, [r3]
 	str	r3, [r2, #64]
 	b	FtlVendorPartWrite
-.L2202:
+.L2203:
 	bx	lr
-.L2205:
+.L2206:
 	.align	2
-.L2204:
+.L2205:
 	.word	.LANCHOR138
 	.word	1179929683
-	.word	1342177366
+	.word	1342177367
 	.word	.LANCHOR217
 	.word	.LANCHOR218
 	.word	.LANCHOR161
@@ -15166,40 +15180,40 @@ FtlEctTblFlush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L2213
+	ldr	r3, .L2214
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L2211
-	ldr	r3, .L2213+4
+	beq	.L2212
+	ldr	r3, .L2214+4
 	ldr	r3, [r3]
 	cmp	r3, #39
 	ite	hi
 	movhi	r3, #32
 	movls	r3, #4
-.L2207:
-	ldr	r1, .L2213+8
+.L2208:
+	ldr	r1, .L2214+8
 	ldrh	r2, [r1]
 	cmp	r2, #31
 	ittt	ls
 	addls	r2, r2, #1
 	movls	r3, #1
 	strhls	r2, [r1]	@ movhi
-	ldr	r2, .L2213+12
-	cbnz	r0, .L2209
+	ldr	r2, .L2214+12
+	cbnz	r0, .L2210
 	ldr	r1, [r2]
 	ldr	r0, [r1, #20]
 	ldr	r1, [r1, #16]
 	add	r3, r3, r0
 	cmp	r1, r3
-	bcc	.L2210
-.L2209:
+	bcc	.L2211
+.L2210:
 	ldr	r2, [r2]
 	movs	r0, #64
 	ldr	r3, [r2, #16]
 	str	r3, [r2, #20]
-	ldr	r3, .L2213+16
+	ldr	r3, .L2214+16
 	str	r3, [r2]
-	ldr	r3, .L2213+20
+	ldr	r3, .L2214+20
 	ldrh	r1, [r3]
 	lsls	r3, r1, #9
 	str	r3, [r2, #12]
@@ -15210,15 +15224,15 @@ FtlEctTblFlush:
 	str	r3, [r2, #4]
 	bl	FtlVendorPartWrite
 	bl	Ftl_save_ext_data
-.L2210:
+.L2211:
 	movs	r0, #0
 	pop	{r3, pc}
-.L2211:
+.L2212:
 	movs	r3, #32
-	b	.L2207
-.L2214:
+	b	.L2208
+.L2215:
 	.align	2
-.L2213:
+.L2214:
 	.word	.LANCHOR28
 	.word	.LANCHOR170
 	.word	.LANCHOR219
@@ -15237,108 +15251,108 @@ FtlEctTblFlush:
 allocate_new_data_superblock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2242
+	ldr	r3, .L2243
 	push	{r4, r5, r6, lr}
 	mov	r4, r0
 	ldrh	r5, [r0]
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	bcs	.L2216
-	ldr	r1, .L2242+4
-	movw	r2, #3290
-	ldr	r0, .L2242+8
+	bcs	.L2217
+	ldr	r1, .L2243+4
+	movw	r2, #3289
+	ldr	r0, .L2243+8
 	bl	printf
-	ldr	r1, .L2242+12
-	ldr	r0, .L2242+16
+	ldr	r1, .L2243+12
+	ldr	r0, .L2243+16
 	bl	printf
-.L2216:
-	ldr	r3, .L2242+20
+.L2217:
+	ldr	r3, .L2243+20
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L2217
+	bne	.L2218
 	movw	r3, #65535
 	cmp	r5, r3
-	beq	.L2218
-	ldr	r3, .L2242+24
+	beq	.L2219
+	ldr	r3, .L2243+24
 	mov	r0, r5
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r5, lsl #1]
-	cbz	r3, .L2219
+	cbz	r3, .L2220
 	bl	INSERT_DATA_LIST
-.L2218:
+.L2219:
 	movs	r3, #0
 	strb	r3, [r4, #8]
-	ldr	r3, .L2242+28
+	ldr	r3, .L2243+28
 	cmp	r4, r3
-	beq	.L2220
-	ldr	r3, .L2242+32
+	beq	.L2221
+	ldr	r3, .L2243+32
 	ldrh	r2, [r3]
 	cmp	r2, #1
-	beq	.L2220
-	ldr	r3, .L2242+36
+	beq	.L2221
+	ldr	r3, .L2243+36
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2221
-.L2220:
+	cbz	r3, .L2222
+.L2221:
 	movs	r3, #1
 	strb	r3, [r4, #8]
-.L2222:
-	ldr	r6, .L2242+40
+.L2223:
+	ldr	r6, .L2243+40
 	movw	r2, #65535
 	ldrh	r0, [r6]
 	cmp	r0, r2
-	beq	.L2227
+	beq	.L2228
 	cmp	r5, r0
-	bne	.L2228
-	ldr	r3, .L2242+24
+	bne	.L2229
+	ldr	r3, .L2243+24
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L2229
-.L2228:
-	bl	update_vpc_list
+	cbz	r3, .L2230
 .L2229:
+	bl	update_vpc_list
+.L2230:
 	movw	r3, #65535
 	strh	r3, [r6]	@ movhi
-.L2227:
+.L2228:
 	mov	r0, r4
 	bl	allocate_data_superblock
 	bl	l2p_flush
 	movs	r0, #0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L2217:
+.L2218:
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L2219:
+.L2220:
 	bl	INSERT_FREE_LIST
-	b	.L2218
-.L2221:
-	ldr	r3, .L2242+44
+	b	.L2219
+.L2222:
+	ldr	r3, .L2243+44
 	cmp	r4, r3
-	bne	.L2222
+	bne	.L2223
 	cmp	r2, #3
-	beq	.L2224
-	ldr	r2, .L2242+48
+	beq	.L2225
+	ldr	r2, .L2243+48
 	ldr	r2, [r2]
 	cmp	r2, #1
-	bne	.L2225
-.L2224:
+	bne	.L2226
+.L2225:
 	movs	r2, #1
 	strb	r2, [r3, #8]
-.L2225:
-	ldr	r2, .L2242+52
+.L2226:
+	ldr	r2, .L2243+52
 	ldr	r2, [r2]
 	cmp	r2, #0
-	beq	.L2222
-	ldr	r2, .L2242+56
+	beq	.L2223
+	ldr	r2, .L2243+56
 	ldr	r2, [r2]
 	cmp	r2, #39
 	itt	ls
 	movls	r2, #1
 	strbls	r2, [r3, #8]
-	b	.L2222
-.L2243:
+	b	.L2223
+.L2244:
 	.align	2
-.L2242:
+.L2243:
 	.word	.LANCHOR40
 	.word	.LANCHOR220
 	.word	.LC5
@@ -15366,7 +15380,7 @@ allocate_new_data_superblock:
 FtlVendorPartRead:
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2254
+	ldr	r3, .L2255
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, r2
 	adds	r2, r0, r1
@@ -15375,28 +15389,28 @@ FtlVendorPartRead:
 	mov	r6, r1
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L2253
-	ldr	r3, .L2254+4
+	bhi	.L2254
+	ldr	r3, .L2255+4
 	mov	r8, #0
-	ldr	fp, .L2254+28
+	ldr	fp, .L2255+28
 	ldrh	r5, [r3]
 	lsr	r5, r0, r5
 	lsls	r3, r5, #2
 	str	r3, [sp]
-.L2246:
-	cbnz	r6, .L2252
-.L2244:
+.L2247:
+	cbnz	r6, .L2253
+.L2245:
 	mov	r0, r8
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2252:
-	ldr	r3, .L2254+8
+.L2253:
+	ldr	r3, .L2255+8
 	mov	r0, r7
 	ldr	r2, [sp]
 	ldr	r3, [r3]
 	ldr	r3, [r3, r2]
-	ldr	r2, .L2254+12
+	ldr	r2, .L2255+12
 	str	r3, [sp, #8]
 	ldrh	r4, [r2]
 	mov	r1, r4
@@ -15411,7 +15425,7 @@ FtlVendorPartRead:
 	lsls	r2, r4, #9
 	str	r2, [sp, #8]
 	cmp	r3, #0
-	beq	.L2248
+	beq	.L2249
 	ldr	r2, [fp]
 	add	r0, sp, #20
 	str	r3, [sp, #24]
@@ -15425,28 +15439,28 @@ FtlVendorPartRead:
 	ldr	r2, [sp, #20]
 	ldr	r3, [sp, #12]
 	adds	r2, r2, #1
-	ldr	r2, .L2254+16
+	ldr	r2, .L2255+16
 	it	eq
 	moveq	r8, #-1
 	ldr	r2, [r2]
 	cmp	r2, #256
-	bne	.L2250
+	bne	.L2251
 	mov	r2, r3
 	mov	r1, r5
-	ldr	r0, .L2254+20
+	ldr	r0, .L2255+20
 	bl	printf
 	ldr	r2, [fp]
 	mov	r1, r5
-	ldr	r0, .L2254+24
+	ldr	r0, .L2255+24
 	bl	FtlMapWritePage
-.L2250:
+.L2251:
 	ldr	r1, [fp]
 	lsls	r2, r4, #9
 	ldr	r3, [sp, #4]
 	mov	r0, r10
 	add	r1, r1, r3, lsl #9
 	bl	ftl_memcpy
-.L2251:
+.L2252:
 	ldr	r3, [sp, #8]
 	adds	r5, r5, #1
 	subs	r6, r6, r4
@@ -15455,19 +15469,19 @@ FtlVendorPartRead:
 	ldr	r3, [sp]
 	adds	r3, r3, #4
 	str	r3, [sp]
-	b	.L2246
-.L2248:
+	b	.L2247
+.L2249:
 	lsls	r2, r4, #9
 	mov	r1, r3
 	mov	r0, r10
 	bl	ftl_memset
-	b	.L2251
-.L2253:
+	b	.L2252
+.L2254:
 	mov	r8, #-1
-	b	.L2244
-.L2255:
+	b	.L2245
+.L2256:
 	.align	2
-.L2254:
+.L2255:
 	.word	.LANCHOR50
 	.word	.LANCHOR56
 	.word	.LANCHOR194
@@ -15490,30 +15504,30 @@ FtlLoadEctTbl:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r0, #64
-	ldr	r4, .L2258
-	ldr	r5, .L2258+4
+	ldr	r4, .L2259
+	ldr	r5, .L2259+4
 	ldr	r2, [r4]
 	ldrh	r1, [r5]
 	bl	FtlVendorPartRead
 	ldr	r3, [r4]
 	ldr	r2, [r3]
-	ldr	r3, .L2258+8
+	ldr	r3, .L2259+8
 	cmp	r2, r3
-	beq	.L2257
-	ldr	r1, .L2258+12
-	ldr	r0, .L2258+16
+	beq	.L2258
+	ldr	r1, .L2259+12
+	ldr	r0, .L2259+16
 	bl	printf
 	ldrh	r2, [r5]
 	movs	r1, #0
 	ldr	r0, [r4]
 	lsls	r2, r2, #9
 	bl	ftl_memset
-.L2257:
+.L2258:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L2259:
+.L2260:
 	.align	2
-.L2258:
+.L2259:
 	.word	.LANCHOR191
 	.word	.LANCHOR190
 	.word	1112818501
@@ -15533,92 +15547,92 @@ Ftl_load_ext_data:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r1, #1
-	ldr	r4, .L2264
+	ldr	r4, .L2265
 	movs	r0, #0
-	ldr	r5, .L2264+4
+	ldr	r5, .L2265+4
 	mov	r2, r4
 	bl	FtlVendorPartRead
 	ldr	r3, [r4]
 	cmp	r3, r5
-	beq	.L2261
+	beq	.L2262
 	mov	r2, #512
 	movs	r1, #0
 	mov	r0, r4
 	bl	ftl_memset
 	str	r5, [r4]
-.L2261:
+.L2262:
 	ldr	r3, [r4]
 	cmp	r3, r5
-	ldr	r5, .L2264+8
-	bne	.L2262
+	ldr	r5, .L2265+8
+	bne	.L2263
 	ldr	r2, [r4, #88]
-	ldr	r3, .L2264+12
+	ldr	r3, .L2265+12
 	str	r2, [r3]
 	ldr	r2, [r4, #92]
-	ldr	r3, .L2264+16
+	ldr	r3, .L2265+16
 	str	r2, [r3]
 	ldr	r2, [r4, #8]
-	ldr	r3, .L2264+20
+	ldr	r3, .L2265+20
 	str	r2, [r3]
 	ldr	r2, [r4, #12]
-	ldr	r3, .L2264+24
+	ldr	r3, .L2265+24
 	str	r2, [r3]
 	ldr	r2, [r4, #16]
-	ldr	r3, .L2264+28
+	ldr	r3, .L2265+28
 	str	r2, [r3]
 	ldr	r2, [r4, #20]
-	ldr	r3, .L2264+32
+	ldr	r3, .L2265+32
 	str	r2, [r3]
 	ldr	r3, [r4, #28]
 	ldr	r2, [r4, #32]
 	str	r3, [r5]
-	ldr	r3, .L2264+36
+	ldr	r3, .L2265+36
 	str	r2, [r3]
 	ldr	r2, [r4, #36]
-	ldr	r3, .L2264+40
+	ldr	r3, .L2265+40
 	str	r2, [r3]
 	ldr	r2, [r4, #40]
-	ldr	r3, .L2264+44
+	ldr	r3, .L2265+44
 	str	r2, [r3]
 	ldr	r2, [r4, #44]
-	ldr	r3, .L2264+48
+	ldr	r3, .L2265+48
 	str	r2, [r3]
 	ldr	r2, [r4, #48]
-	ldr	r3, .L2264+52
+	ldr	r3, .L2265+52
 	str	r2, [r3]
 	ldr	r2, [r4, #60]
-	ldr	r3, .L2264+56
+	ldr	r3, .L2265+56
 	str	r2, [r3]
-.L2262:
-	ldr	r3, .L2264+60
+.L2263:
+	ldr	r3, .L2265+60
 	movs	r2, #0
 	str	r2, [r3]
 	ldr	r2, [r4, #68]
-	ldr	r3, .L2264+64
+	ldr	r3, .L2265+64
 	cmp	r2, r3
-	bne	.L2263
-	ldr	r3, .L2264+68
+	bne	.L2264
+	ldr	r3, .L2265+68
 	movs	r2, #1
-	ldr	r1, .L2264+72
-	ldr	r0, .L2264+76
+	ldr	r1, .L2265+72
+	ldr	r0, .L2265+76
 	str	r2, [r3]
 	bl	printf
-.L2263:
-	ldr	r3, .L2264+80
-	ldr	r1, .L2264+84
+.L2264:
+	ldr	r3, .L2265+80
+	ldr	r1, .L2265+84
 	ldrh	r2, [r3]
-	ldr	r3, .L2264+88
+	ldr	r3, .L2265+88
 	ldrh	r1, [r1]
 	ldr	r0, [r3]
 	ldr	r3, [r5]
 	mla	r0, r0, r2, r3
 	bl	__aeabi_uidiv
-	ldr	r3, .L2264+92
+	ldr	r3, .L2265+92
 	str	r0, [r3]
 	pop	{r3, r4, r5, pc}
-.L2265:
+.L2266:
 	.align	2
-.L2264:
+.L2265:
 	.word	.LANCHOR138
 	.word	1179929683
 	.word	.LANCHOR168
@@ -15689,34 +15703,34 @@ FtlMapBlkWriteDumpData:
 	mov	r4, r0
 	ldr	r3, [r0, #36]
 	cmp	r3, #0
-	beq	.L2268
+	beq	.L2269
 	movs	r3, #0
 	ldrh	r6, [r0, #6]
 	str	r3, [r0, #36]
-	ldr	r3, .L2282
+	ldr	r3, .L2283
 	ldr	r10, [r0, #24]
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L2268
-	ldr	r3, .L2282+4
-	ldr	r5, .L2282+8
+	bne	.L2269
+	ldr	r3, .L2283+4
+	ldr	r5, .L2283+8
 	ldr	r3, [r3]
 	mov	r7, r5
 	str	r3, [r5, #8]
-	ldr	r3, .L2282+12
+	ldr	r3, .L2283+12
 	ldr	r8, [r3]
 	ldrh	r3, [r0, #2]
 	str	r8, [r5, #12]
-	cbz	r3, .L2272
-	ldr	r2, .L2282+16
+	cbz	r3, .L2273
+	ldr	r2, .L2283+16
 	ldrh	r2, [r2]
 	subs	r2, r2, #1
 	cmp	r3, r2
-	bge	.L2272
+	bge	.L2273
 	ldrh	r2, [r0]
 	movw	r1, #65535
 	cmp	r2, r1
-	beq	.L2272
+	beq	.L2273
 	ldr	r1, [r0, #12]
 	subs	r3, r3, #1
 	mov	r0, r5
@@ -15728,44 +15742,44 @@ FtlMapBlkWriteDumpData:
 	bl	FlashReadPages
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L2272
+	beq	.L2273
 	ldr	r3, [r4, #24]
 	ldrh	r1, [r8, #8]
 	ldr	r2, [r3, r1, lsl #2]
 	ldr	r3, [r5, #4]
 	cmp	r2, r3
-	bne	.L2272
+	bne	.L2273
 	ldr	r2, [r5, #8]
-.L2281:
+.L2282:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
 	b	FtlMapWritePage
-.L2272:
+.L2273:
 	subs	r6, r6, #1
 	uxth	r6, r6
 	ldr	r3, [r10, r6, lsl #2]
 	str	r3, [r7, #4]
-	cbz	r3, .L2273
+	cbz	r3, .L2274
 	movs	r2, #1
-	ldr	r0, .L2282+8
+	ldr	r0, .L2283+8
 	mov	r1, r2
 	bl	FlashReadPages
-.L2274:
+.L2275:
 	ldr	r2, [r7, #8]
 	mov	r1, r6
-	b	.L2281
-.L2273:
-	ldr	r3, .L2282+20
+	b	.L2282
+.L2274:
+	ldr	r3, .L2283+20
 	movs	r1, #255
 	ldr	r0, [r7, #8]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-	b	.L2274
-.L2268:
+	b	.L2275
+.L2269:
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L2283:
+.L2284:
 	.align	2
-.L2282:
+.L2283:
 	.word	.LANCHOR76
 	.word	.LANCHOR184
 	.word	.LANCHOR203
@@ -15786,69 +15800,69 @@ FtlScanSysBlk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r5, .L2366
+	ldr	r5, .L2367
 	sub	sp, sp, #32
 	mov	r1, r4
-	ldr	r3, .L2366+4
+	ldr	r3, .L2367+4
 	ldr	r2, [r5]
-	ldr	r6, .L2366+8
+	ldr	r6, .L2367+8
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L2366+12
+	ldr	r3, .L2367+12
 	lsls	r2, r2, #2
 	strh	r4, [r6]	@ movhi
-	ldr	r7, .L2366+16
+	ldr	r7, .L2367+16
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldr	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L2366+20
+	ldr	r3, .L2367+20
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r7]
 	mov	r1, r4
-	ldr	r3, .L2366+24
+	ldr	r3, .L2367+24
 	lsls	r2, r2, #2
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r7]
 	mov	r1, r4
-	ldr	r3, .L2366+28
+	ldr	r3, .L2367+28
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	movs	r2, #16
 	movs	r1, #255
-	ldr	r0, .L2366+32
+	ldr	r0, .L2367+32
 	bl	ftl_memset
-	ldr	r3, .L2366+36
+	ldr	r3, .L2367+36
 	str	r6, [sp, #12]
 	str	r5, [sp, #16]
 	ldrh	r3, [r3]
 	str	r3, [sp, #4]
-.L2285:
-	ldr	r3, .L2366+40
+.L2286:
+	ldr	r3, .L2367+40
 	ldr	r2, [sp, #4]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bls	.L2327
-	ldr	r3, .L2366+44
+	bls	.L2328
+	ldr	r3, .L2367+44
 	movs	r5, #0
-	ldr	r1, .L2366+48
+	ldr	r1, .L2367+48
 	mov	fp, r5
 	movs	r7, #36
 	ldrh	r8, [r3]
-	ldr	r3, .L2366+52
+	ldr	r3, .L2367+52
 	ldr	r2, [r1]
-	ldr	r1, .L2366+56
+	ldr	r1, .L2367+56
 	ldr	r6, [r3]
-	ldr	r3, .L2366+60
+	ldr	r3, .L2367+60
 	str	r2, [sp, #8]
 	ldrh	r10, [r1]
 	ldr	r3, [r3]
-	ldr	r2, .L2366+64
-	b	.L2328
-.L2287:
+	ldr	r2, .L2367+64
+	b	.L2329
+.L2288:
 	ldrb	r0, [r2, r5]	@ zero_extendqisi2
 	ldr	r1, [sp, #4]
 	str	r3, [sp, #28]
@@ -15858,7 +15872,7 @@ FtlScanSysBlk:
 	bl	FtlBbmIsBadBlock
 	ldr	r2, [sp, #24]
 	ldr	r3, [sp, #28]
-	cbnz	r0, .L2286
+	cbnz	r0, .L2287
 	ldr	r1, [sp, #20]
 	mla	r0, r7, fp, r6
 	ldr	r4, [sp, #8]
@@ -15871,31 +15885,31 @@ FtlScanSysBlk:
 	str	r1, [r0, #12]
 	add	r1, fp, #1
 	uxth	fp, r1
-.L2286:
+.L2287:
 	adds	r5, r5, #1
-.L2328:
+.L2329:
 	uxth	r1, r5
 	cmp	r8, r1
-	bhi	.L2287
+	bhi	.L2288
 	cmp	fp, #0
-	bne	.L2288
-.L2326:
+	bne	.L2289
+.L2327:
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	str	r3, [sp, #4]
-	b	.L2285
-.L2288:
+	b	.L2286
+.L2289:
 	movs	r7, #0
 	movs	r2, #1
 	mov	r1, fp
 	mov	r0, r6
 	bl	FlashReadPages
-.L2289:
+.L2290:
 	uxth	r3, r7
 	cmp	fp, r3
-	bls	.L2326
-	ldr	r3, .L2366+52
+	bls	.L2327
+	ldr	r3, .L2367+52
 	mov	r8, #36
 	mul	r8, r8, r7
 	ldr	r3, [r3]
@@ -15905,10 +15919,10 @@ FtlScanSysBlk:
 	ldr	r6, [r2, #12]
 	adds	r3, r3, #1
 	ubfx	r5, r5, #10, #16
-	bne	.L2292
+	bne	.L2293
 	mov	r10, #16
-.L2294:
-	ldr	r3, .L2366+52
+.L2295:
+	ldr	r3, .L2367+52
 	movs	r2, #1
 	mov	r1, r2
 	ldr	r0, [r3]
@@ -15920,88 +15934,88 @@ FtlScanSysBlk:
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	ldr	r3, .L2366+52
+	ldr	r3, .L2367+52
 	ldr	r3, [r3]
-	bne	.L2291
+	bne	.L2292
 	mov	r2, #-1
 	str	r2, [r3, r8]
-	ldr	r3, .L2366+52
+	ldr	r3, .L2367+52
 	ldr	r3, [r3]
 	ldr	r3, [r3, r8]
 	cmp	r3, r2
-	beq	.L2293
-.L2292:
-	ldr	r3, .L2366+68
+	beq	.L2294
+.L2293:
+	ldr	r3, .L2367+68
 	ldr	r2, [r3]
 	ldr	r3, [r6, #4]
 	adds	r1, r2, #1
-	beq	.L2295
+	beq	.L2296
 	cmp	r2, r3
-	bhi	.L2296
-.L2295:
+	bhi	.L2297
+.L2296:
 	adds	r2, r3, #1
 	ittt	ne
-	ldrne	r1, .L2366+68
+	ldrne	r1, .L2367+68
 	addne	r2, r3, #1
 	strne	r2, [r1]
-.L2296:
+.L2297:
 	ldrh	r2, [r6]
 	movw	r1, #61604
 	cmp	r2, r1
-	beq	.L2298
-	bhi	.L2299
+	beq	.L2299
+	bhi	.L2300
 	movw	r3, #61574
 	cmp	r2, r3
-	beq	.L2300
-.L2297:
+	beq	.L2301
+.L2298:
 	adds	r7, r7, #1
-	b	.L2289
-.L2291:
+	b	.L2290
+.L2292:
 	ldr	r3, [r3, r8]
 	adds	r3, r3, #1
-	bne	.L2292
+	bne	.L2293
 	add	r10, r10, #-1
 	uxth	r10, r10
 	cmp	r10, #0
-	bne	.L2294
-.L2293:
-	ldr	r3, .L2366+72
+	bne	.L2295
+.L2294:
+	ldr	r3, .L2367+72
 	ldrb	r1, [r3]	@ zero_extendqisi2
-	cbnz	r1, .L2365
-.L2324:
+	cbnz	r1, .L2366
+.L2325:
 	mov	r0, r5
 	bl	FtlFreeSysBlkQueueIn
-	b	.L2297
-.L2299:
+	b	.L2298
+.L2300:
 	movw	r3, #61634
 	cmp	r2, r3
-	beq	.L2301
+	beq	.L2302
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L2297
-.L2365:
+	bne	.L2298
+.L2366:
 	movs	r1, #0
-	b	.L2324
-.L2301:
-	ldr	r3, .L2366+8
+	b	.L2325
+.L2302:
+	ldr	r3, .L2367+8
 	ldrh	r2, [r3]
-	ldr	r3, .L2366
+	ldr	r3, .L2367
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bls	.L2303
-	ldr	r1, .L2366+76
+	bls	.L2304
+	ldr	r1, .L2367+76
 	movw	r2, #1307
-	ldr	r0, .L2366+80
+	ldr	r0, .L2367+80
 	bl	printf
-	ldr	r1, .L2366+84
-	ldr	r0, .L2366+88
+	ldr	r1, .L2367+84
+	ldr	r0, .L2367+88
 	bl	printf
-.L2303:
+.L2304:
 	ldr	r3, [sp, #16]
 	ldr	r2, [sp, #12]
 	ldr	r1, [r3]
 	ldrh	r0, [r2]
-	ldr	r2, .L2366+12
+	ldr	r2, .L2367+12
 	uxth	r10, r1
 	ldr	ip, [r2]
 	add	r3, r10, #-1
@@ -16009,61 +16023,61 @@ FtlScanSysBlk:
 	add	r10, r10, #-1
 	sxth	r3, r3
 	sxth	r10, r10
-.L2304:
+.L2305:
 	cmp	r3, r10
-	bgt	.L2310
+	bgt	.L2311
 	cmp	r3, #0
-	bge	.L2343
-	b	.L2297
-.L2310:
+	bge	.L2344
+	b	.L2298
+.L2311:
 	ldr	r2, [ip, r3, lsl #2]
 	add	r8, ip, r3, lsl #2
 	ldr	r4, [r6, #4]
 	cmp	r4, r2
-	bls	.L2305
+	bls	.L2306
 	ldr	r2, [ip]
-	cbnz	r2, .L2306
+	cbnz	r2, .L2307
 	cmp	r1, r0
 	ittt	ne
-	ldrne	r2, .L2366+8
+	ldrne	r2, .L2367+8
 	addne	r0, r0, #1
 	strhne	r0, [r2]	@ movhi
-.L2306:
-	ldr	r2, .L2366+20
+.L2307:
+	ldr	r2, .L2367+20
 	uxth	r10, r3
 	ldr	r0, [r2]
 	movs	r2, #0
-.L2307:
+.L2308:
 	uxth	lr, r2
 	sxth	r1, r2
 	cmp	r10, lr
-	bhi	.L2308
+	bhi	.L2309
 	ldr	r2, [r6, #4]
 	cmp	r3, #0
 	str	r2, [r8]
 	strh	r5, [r0, r3, lsl #1]	@ movhi
-	blt	.L2297
-	ldr	r2, .L2366+8
+	blt	.L2298
+	ldr	r2, .L2367+8
 	ldrh	r0, [r2]
-	ldr	r2, .L2366
+	ldr	r2, .L2367
 	ldr	r2, [r2]
 	subs	r2, r2, r0
 	subs	r2, r2, #1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L2297
-.L2343:
-	ldr	r2, .L2366+8
+	bgt	.L2298
+.L2344:
+	ldr	r2, .L2367+8
 	adds	r0, r0, #1
 	strh	r0, [r2]	@ movhi
 	ldr	r2, [r6, #4]
 	str	r2, [ip, r3, lsl #2]
-	ldr	r2, .L2366+20
-.L2363:
+	ldr	r2, .L2367+20
+.L2364:
 	ldr	r2, [r2]
 	strh	r5, [r2, r3, lsl #1]	@ movhi
-	b	.L2297
-.L2308:
+	b	.L2298
+.L2309:
 	add	lr, ip, r1, lsl #2
 	adds	r2, r2, #1
 	ldr	r4, [lr, #4]
@@ -16071,14 +16085,14 @@ FtlScanSysBlk:
 	ldrh	lr, [lr, #2]
 	str	r4, [ip, r1, lsl #2]
 	strh	lr, [r0, r1, lsl #1]	@ movhi
-	b	.L2307
-.L2305:
+	b	.L2308
+.L2306:
 	subs	r3, r3, #1
 	sxth	r3, r3
-	b	.L2304
-.L2367:
+	b	.L2305
+.L2368:
 	.align	2
-.L2366:
+.L2367:
 	.word	.LANCHOR64
 	.word	.LANCHOR70
 	.word	.LANCHOR128
@@ -16102,75 +16116,75 @@ FtlScanSysBlk:
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-.L2300:
-	ldr	r8, .L2368+20
-	ldr	r10, .L2368+28
+.L2301:
+	ldr	r8, .L2369+20
+	ldr	r10, .L2369+28
 	ldrh	r2, [r8]
 	ldrh	r3, [r10]
 	cmp	r2, r3
-	bls	.L2313
-	ldr	r1, .L2368
+	bls	.L2314
+	ldr	r1, .L2369
 	movw	r2, #1354
-	ldr	r0, .L2368+4
+	ldr	r0, .L2369+4
 	bl	printf
-	ldr	r1, .L2368+8
-	ldr	r0, .L2368+12
+	ldr	r1, .L2369+8
+	ldr	r0, .L2369+12
 	bl	printf
-.L2313:
-	ldr	r2, .L2368+16
+.L2314:
+	ldr	r2, .L2369+16
 	ldrh	lr, [r10]
 	ldrh	ip, [r8]
 	ldr	r0, [r2]
 	add	r10, lr, #-1
 	sxth	r3, r10
 	sub	r10, r10, ip
-.L2314:
+.L2315:
 	cmp	r3, r10
-	ble	.L2319
+	ble	.L2320
 	ldr	r1, [r6, #4]
 	add	r8, r0, r3, lsl #2
 	ldr	r2, [r0, r3, lsl #2]
 	cmp	r1, r2
-	bls	.L2315
+	bls	.L2316
 	ldr	r2, [r0]
-	cbnz	r2, .L2316
+	cbnz	r2, .L2317
 	cmp	lr, ip
 	ittt	ne
-	ldrne	r2, .L2368+20
+	ldrne	r2, .L2369+20
 	addne	ip, ip, #1
 	strhne	ip, [r2]	@ movhi
-.L2316:
-	ldr	r2, .L2368+24
+.L2317:
+	ldr	r2, .L2369+24
 	uxth	r10, r3
 	ldr	ip, [r2]
 	movs	r2, #0
-.L2317:
+.L2318:
 	uxth	lr, r2
 	sxth	r1, r2
 	cmp	r10, lr
-	bhi	.L2318
+	bhi	.L2319
 	ldr	r2, [r6, #4]
 	str	r2, [r8]
 	strh	r5, [ip, r3, lsl #1]	@ movhi
-.L2319:
+.L2320:
 	cmp	r3, #0
-	blt	.L2297
-	ldr	r2, .L2368+28
-	ldr	ip, .L2368+20
+	blt	.L2298
+	ldr	r2, .L2369+28
+	ldr	ip, .L2369+20
 	ldrh	r2, [r2]
 	ldrh	r1, [ip]
 	subs	r2, r2, #1
 	subs	r2, r2, r1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L2297
+	bgt	.L2298
 	ldr	r2, [r6, #4]
 	adds	r1, r1, #1
 	strh	r1, [ip]	@ movhi
 	str	r2, [r0, r3, lsl #2]
-	ldr	r2, .L2368+24
-	b	.L2363
-.L2318:
+	ldr	r2, .L2369+24
+	b	.L2364
+.L2319:
 	add	lr, r0, r1, lsl #2
 	adds	r2, r2, #1
 	ldr	r4, [lr, #4]
@@ -16178,91 +16192,91 @@ FtlScanSysBlk:
 	ldrh	lr, [lr, #2]
 	str	r4, [r0, r1, lsl #2]
 	strh	lr, [ip, r1, lsl #1]	@ movhi
-	b	.L2317
-.L2315:
+	b	.L2318
+.L2316:
 	subs	r3, r3, #1
 	sxth	r3, r3
-	b	.L2314
-.L2298:
-	ldr	r8, .L2368+48
+	b	.L2315
+.L2299:
+	ldr	r8, .L2369+48
 	movw	r2, #65535
 	ldrh	r1, [r8]
 	cmp	r1, r2
-	bne	.L2321
-.L2364:
+	bne	.L2322
+.L2365:
 	strh	r5, [r8]	@ movhi
 	str	r3, [r8, #8]
-	b	.L2297
-.L2321:
+	b	.L2298
+.L2322:
 	ldrh	r0, [r8, #4]
 	cmp	r0, r2
-	beq	.L2322
+	beq	.L2323
 	movs	r1, #1
 	bl	FtlFreeSysBlkQueueIn
-.L2322:
+.L2323:
 	ldr	r3, [r6, #4]
 	ldr	r2, [r8, #8]
 	cmp	r2, r3
-	bcs	.L2323
+	bcs	.L2324
 	ldrh	r2, [r8]
 	strh	r2, [r8, #4]	@ movhi
-	b	.L2364
-.L2323:
+	b	.L2365
+.L2324:
 	strh	r5, [r8, #4]	@ movhi
-	b	.L2297
-.L2327:
-	ldr	r3, .L2368+32
+	b	.L2298
+.L2328:
+	ldr	r3, .L2369+32
 	ldr	r2, [r3]
 	ldrh	r3, [r2]
-	cbz	r3, .L2329
-.L2332:
-	ldr	r3, .L2368+24
+	cbz	r3, .L2330
+.L2333:
+	ldr	r3, .L2369+24
 	ldr	r4, [r3]
 	ldrh	r2, [r4]
 	cmp	r2, #0
-	beq	.L2330
-.L2331:
-	ldr	r3, .L2368+36
+	beq	.L2331
+.L2332:
+	ldr	r3, .L2369+36
 	ldrh	r2, [r3]
-	ldr	r3, .L2368+40
+	ldr	r3, .L2369+40
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bls	.L2362
-	ldr	r1, .L2368
+	bls	.L2363
+	ldr	r1, .L2369
 	mov	r2, #1488
-	ldr	r0, .L2368+4
+	ldr	r0, .L2369+4
 	bl	printf
-	ldr	r1, .L2368+8
-	ldr	r0, .L2368+12
+	ldr	r1, .L2369+8
+	ldr	r0, .L2369+12
 	bl	printf
-.L2362:
+.L2363:
 	movs	r0, #0
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2329:
-	ldr	r1, .L2368+36
+.L2330:
+	ldr	r1, .L2369+36
 	ldrh	r1, [r1]
 	cmp	r1, #0
-	beq	.L2332
-	ldr	r5, .L2368+40
+	beq	.L2333
+	ldr	r5, .L2369+40
 	ldr	r0, [r5]
-.L2333:
+.L2334:
 	sxth	r1, r3
 	cmp	r1, r0
-	bcs	.L2332
+	bcs	.L2333
 	ldrh	r4, [r2, r1, lsl #1]
 	adds	r3, r3, #1
 	cmp	r4, #0
-	beq	.L2333
-	ldr	r3, .L2368+44
+	beq	.L2334
+	ldr	r3, .L2369+44
 	movs	r6, #0
 	ldr	r0, [r3]
 	mov	r3, r1
-.L2334:
+.L2335:
 	ldr	r4, [r5]
 	cmp	r3, r4
-	bcs	.L2332
+	bcs	.L2333
 	ldrh	r7, [r2, r3, lsl #1]
 	subs	r4, r3, r1
 	strh	r7, [r2, r4, lsl #1]	@ movhi
@@ -16271,30 +16285,30 @@ FtlScanSysBlk:
 	strh	r6, [r2, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	sxth	r3, r3
-	b	.L2334
-.L2330:
-	ldr	r3, .L2368+20
+	b	.L2335
+.L2331:
+	ldr	r3, .L2369+20
 	ldrh	r3, [r3]
 	cmp	r3, #0
-	beq	.L2331
-	ldr	r5, .L2368+28
+	beq	.L2332
+	ldr	r5, .L2369+28
 	ldrh	r1, [r5]
-.L2339:
+.L2340:
 	sxth	r3, r2
 	cmp	r3, r1
 	mov	r6, r3
-	bge	.L2331
+	bge	.L2332
 	ldrh	r0, [r4, r3, lsl #1]
 	adds	r2, r2, #1
 	cmp	r0, #0
-	beq	.L2339
-	ldr	r2, .L2368+16
+	beq	.L2340
+	ldr	r2, .L2369+16
 	movs	r0, #0
 	ldr	r2, [r2]
-.L2340:
+.L2341:
 	ldrh	r1, [r5]
 	cmp	r3, r1
-	bge	.L2331
+	bge	.L2332
 	ldrh	r7, [r4, r3, lsl #1]
 	subs	r1, r3, r6
 	strh	r7, [r4, r1, lsl #1]	@ movhi
@@ -16303,10 +16317,10 @@ FtlScanSysBlk:
 	adds	r1, r3, #1
 	strh	r0, [r4, r3, lsl #1]	@ movhi
 	sxth	r3, r1
-	b	.L2340
-.L2369:
+	b	.L2341
+.L2370:
 	.align	2
-.L2368:
+.L2369:
 	.word	.LANCHOR221
 	.word	.LC5
 	.word	.LC6
@@ -16330,125 +16344,167 @@ FtlScanSysBlk:
 	.fpu softvfp
 	.type	FtlLoadSysInfo, %function
 FtlLoadSysInfo:
-	@ args = 0, pretend = 0, frame = 8
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r1, #0
-	ldr	r8, .L2404+164
-	ldr	r6, .L2404
-	ldr	r3, [r8]
-	ldr	r4, .L2404+4
-	ldr	r10, .L2404+168
+	ldr	r7, .L2405
+	sub	sp, sp, #40
+	ldr	r6, .L2405+4
+	ldr	r3, [r7]
+	ldr	r4, .L2405+8
+	ldr	r8, .L2405+52
 	ldrh	r2, [r6]
-	ldr	r5, .L2404+8
+	ldr	r5, .L2405+12
 	str	r3, [r4, #8]
-	ldr	r7, .L2404+12
-	ldr	r3, [r10]
+	ldr	r3, [r8]
 	lsls	r2, r2, #1
 	ldr	r0, [r5]
 	str	r3, [r4, #12]
 	bl	ftl_memset
-	ldrh	r0, [r7]
-	movw	r3, #65535
-	str	r5, [sp]
-	cmp	r0, r3
-	bne	.L2371
-.L2383:
+	ldr	r3, .L2405+16
+	movw	r2, #65535
+	str	r8, [sp, #24]
+	str	r5, [sp, #28]
+	ldrh	r0, [r3]
+	mov	fp, r3
+	cmp	r0, r2
+	bne	.L2372
+.L2384:
 	mov	r0, #-1
-.L2370:
-	add	sp, sp, #8
+.L2371:
+	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2371:
+.L2372:
 	movs	r1, #1
 	bl	FtlGetLastWrittenPage
-	ldrsh	fp, [r7]
+	ldrsh	r10, [fp]
 	sxth	r5, r0
 	adds	r0, r0, #1
-	strh	r0, [r7, #2]	@ movhi
-.L2373:
+	strh	r0, [fp, #2]	@ movhi
+.L2374:
 	cmp	r5, #0
-	bge	.L2379
+	bge	.L2380
 	movw	r2, #1557
-	ldr	r1, .L2404+16
-	ldr	r0, .L2404+20
+	ldr	r1, .L2405+20
+	ldr	r0, .L2405+24
 	bl	printf
-	ldr	r1, .L2404+24
-	ldr	r0, .L2404+28
+	ldr	r1, .L2405+28
+	ldr	r0, .L2405+32
 	bl	printf
-	b	.L2378
-.L2379:
-	orr	r2, r5, fp, lsl #10
-	ldr	r0, .L2404+4
-	str	r2, [r4, #4]
-	ldr	r2, [r8]
-	str	r2, [r4, #8]
+	b	.L2379
+.L2380:
+	orr	r3, r5, r10, lsl #10
 	movs	r2, #1
 	mov	r1, r2
+	ldr	r0, .L2405+8
+	str	r3, [r4, #4]
+	ldr	r3, [r7]
+	str	r3, [r4, #8]
 	bl	FlashReadPages
-	ldr	r2, .L2404+32
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbz	r2, .L2374
-	ldr	r2, [r4, #12]
-	ldr	r2, [r2, #12]
-	str	r2, [sp, #4]
-	cbz	r2, .L2374
-	ldr	r1, .L2404+36
-	ldr	r0, [r4, #8]
+	ldr	r3, .L2405+36
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L2375
+	ldr	r8, [r4, #12]
+	ldr	r3, [r8, #12]
+	str	r3, [sp, #36]
+	cmp	r3, #0
+	beq	.L2375
+	ldr	r2, [r4, #8]
+	ldr	r1, .L2405+40
+	mov	r0, r2
+	str	r2, [sp, #32]
 	ldrh	r1, [r1]
 	bl	js_hash
-	ldr	r2, [sp, #4]
-	cmp	r2, r0
-	beq	.L2374
-	cbnz	r5, .L2375
-	ldrh	r2, [r7, #4]
-	cmp	fp, r2
+	ldr	r3, [sp, #36]
+	cmp	r3, r0
 	beq	.L2375
-	sxth	fp, r2
-	ldr	r2, .L2404+40
-	ldrh	r5, [r2]
-.L2377:
+	cmp	r5, #0
+	bne	.L2376
+	ldr	r2, .L2405+16
+	ldrh	r1, [r2, #4]
+	cmp	r10, r1
+	beq	.L2376
+	ldrh	r1, [r2]
+	ldr	r2, [sp, #32]
+	ldr	r0, .L2405+44
+	ldr	r2, [r2]
+	str	r3, [sp, #12]
+	str	r2, [sp, #16]
+	ldr	r3, [r8, #8]
+	str	r3, [sp, #8]
+	ldr	r3, [r8, #4]
+	str	r3, [sp, #4]
+	ldr	r3, [r8]
+	str	r3, [sp]
+	ldm	r4, {r2, r3}
+	bl	printf
+	ldr	r3, .L2405+16
+	ldrsh	r10, [r3, #4]
+	ldr	r3, .L2405+48
+	ldrh	r5, [r3]
+.L2378:
 	subs	r5, r5, #1
 	sxth	r5, r5
-	b	.L2373
+	b	.L2374
+.L2406:
+	.align	2
+.L2405:
+	.word	.LANCHOR183
+	.word	.LANCHOR40
+	.word	.LANCHOR203
+	.word	.LANCHOR83
+	.word	.LANCHOR210
+	.word	.LANCHOR222
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LANCHOR2
+	.word	.LANCHOR57
+	.word	.LC45
+	.word	.LANCHOR53
+	.word	.LANCHOR188
+.L2376:
+	mov	r3, #-1
+	str	r3, [r4]
 .L2375:
-	mov	r2, #-1
-	str	r2, [r4]
-.L2374:
-	ldr	r2, [r4]
-	adds	r2, r2, #1
-	beq	.L2377
-	ldr	r2, [r8]
-	ldr	r3, .L2404+44
-	ldr	r2, [r2]
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	beq	.L2378
+	ldr	r3, [r7]
+	ldr	r2, .L2407
+	ldr	r3, [r3]
+	cmp	r3, r2
+	bne	.L2378
+	ldr	r3, [sp, #24]
+	ldr	r3, [r3]
+	ldrh	r2, [r3]
+	movw	r3, #61604
 	cmp	r2, r3
-	bne	.L2377
-	ldr	r2, [r10]
-	ldrh	r1, [r2]
-	movw	r2, #61604
-	cmp	r1, r2
-	bne	.L2377
-.L2378:
-	ldr	r2, .L2404+36
+	bne	.L2378
+.L2379:
+	ldr	r2, .L2407+4
 	ldrh	r3, [r6]
 	ldrh	r2, [r2]
 	adds	r3, r3, #24
 	cmp	r2, r3, lsl #1
-	bcs	.L2381
-	ldr	r1, .L2404+16
+	bcs	.L2382
+	ldr	r1, .L2407+8
 	movw	r2, #1559
-	ldr	r0, .L2404+20
+	ldr	r0, .L2407+12
 	bl	printf
-	ldr	r1, .L2404+24
-	ldr	r0, .L2404+28
+	ldr	r1, .L2407+16
+	ldr	r0, .L2407+20
 	bl	printf
-.L2381:
+.L2382:
 	movs	r2, #48
 	ldr	r1, [r4, #8]
-	ldr	r0, .L2404+48
+	ldr	r0, .L2407+24
 	bl	ftl_memcpy
 	ldrh	r2, [r6]
-	ldr	r3, [sp]
+	ldr	r3, [sp, #28]
 	ldr	r1, [r4, #8]
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
@@ -16462,14 +16518,14 @@ FtlLoadSysInfo:
 	adds	r2, r2, #4
 	bic	r1, r1, #3
 	add	r1, r1, r3
-	ldr	r3, .L2404+52
+	ldr	r3, .L2407+28
 	ldr	r0, [r3]
 	bl	ftl_memcpy
-	ldr	r3, .L2404+56
+	ldr	r3, .L2407+32
 	ldrh	r3, [r3]
-	cbz	r3, .L2382
+	cbz	r3, .L2383
 	ldrh	r1, [r6]
-	ldr	r3, .L2404+60
+	ldr	r3, .L2407+36
 	ldrh	r2, [r3]
 	lsrs	r3, r1, #3
 	add	r3, r3, r1, lsl #1
@@ -16478,65 +16534,65 @@ FtlLoadSysInfo:
 	lsls	r2, r2, #2
 	ubfx	r3, r3, #2, #14
 	add	r1, r1, r3, lsl #2
-	ldr	r3, .L2404+64
+	ldr	r3, .L2407+40
 	ldr	r0, [r3]
 	bl	ftl_memcpy
-.L2382:
-	ldr	r4, .L2404+48
-	ldr	r3, .L2404+44
+.L2383:
+	ldr	r4, .L2407+24
+	ldr	r3, .L2407
 	ldr	r2, [r4]
 	cmp	r2, r3
-	bne	.L2383
-	ldr	r3, .L2404+68
+	bne	.L2384
+	ldr	r3, .L2407+44
 	ldrb	r2, [r4, #10]	@ zero_extendqisi2
 	ldrh	r5, [r4, #8]
 	ldrh	r3, [r3]
-	strh	r5, [r7, #6]	@ movhi
+	strh	r5, [fp, #6]	@ movhi
 	cmp	r2, r3
-	bne	.L2383
-	ldr	r3, .L2404+72
-	ldr	r2, .L2404+76
+	bne	.L2384
+	ldr	r3, .L2407+48
+	ldr	r2, .L2407+52
 	str	r5, [r3]
-	ldr	r3, .L2404+80
+	ldr	r3, .L2407+56
 	ldrh	r3, [r3]
 	muls	r3, r5, r3
 	str	r3, [r2]
-	ldr	r2, .L2404+84
+	ldr	r2, .L2407+60
 	ldrh	r2, [r2]
 	muls	r3, r2, r3
-	ldr	r2, .L2404+88
+	ldr	r2, .L2407+64
 	str	r3, [r2]
-	ldr	r3, .L2404+92
+	ldr	r3, .L2407+68
 	ldr	r6, [r3]
-	ldr	r3, .L2404+96
+	ldr	r3, .L2407+72
 	ldrh	r0, [r3, #6]
-	ldr	r3, .L2404+100
+	ldr	r3, .L2407+76
 	subs	r0, r6, r0
 	ldrh	r1, [r3]
 	subs	r0, r0, r5
 	bl	__aeabi_uidiv
-	ldr	r3, .L2404+104
+	ldr	r3, .L2407+80
 	cmp	r5, r6
 	strh	r0, [r3]	@ movhi
-	bls	.L2384
-	ldr	r1, .L2404+16
+	bls	.L2385
+	ldr	r1, .L2407+8
 	movw	r2, #1586
-	ldr	r0, .L2404+20
+	ldr	r0, .L2407+12
 	bl	printf
-	ldr	r1, .L2404+24
-	ldr	r0, .L2404+28
+	ldr	r1, .L2407+16
+	ldr	r0, .L2407+20
 	bl	printf
-.L2384:
+.L2385:
 	ldrh	r2, [r4, #16]
-	ldr	r3, .L2404+108
+	ldr	r3, .L2407+84
 	ldrh	ip, [r4, #14]
-	ldr	r7, .L2404+112
+	ldr	r7, .L2407+88
 	lsrs	r1, r2, #6
 	and	r2, r2, #63
 	strb	r2, [r3, #6]
 	ldrb	r2, [r4, #11]	@ zero_extendqisi2
 	strh	r1, [r3, #2]	@ movhi
-	ldr	r1, .L2404+116
+	ldr	r1, .L2407+92
 	strb	r2, [r3, #8]
 	ldrh	r2, [r4, #18]
 	strh	ip, [r3]	@ movhi
@@ -16555,7 +16611,7 @@ FtlLoadSysInfo:
 	strh	r5, [r1, #2]	@ movhi
 	ldrh	r5, [r4, #22]
 	strb	r2, [r1, #8]
-	ldr	r2, .L2404+120
+	ldr	r2, .L2407+96
 	strh	r5, [r2]	@ movhi
 	ldrh	r5, [r4, #24]
 	lsrs	r6, r5, #6
@@ -16565,31 +16621,31 @@ FtlLoadSysInfo:
 	strh	r6, [r2, #2]	@ movhi
 	ldr	r6, [r4, #32]
 	strb	r5, [r2, #8]
-	ldr	r5, .L2404+124
+	ldr	r5, .L2407+100
 	str	r3, [r5]
-	ldr	r5, .L2404+128
+	ldr	r5, .L2407+104
 	str	r3, [r5]
-	ldr	r5, .L2404+132
+	ldr	r5, .L2407+108
 	str	r3, [r5]
-	ldr	r5, .L2404+136
+	ldr	r5, .L2407+112
 	str	r3, [r5]
-	ldr	r5, .L2404+140
+	ldr	r5, .L2407+116
 	str	r6, [r5]
 	mov	r6, r1
-	ldr	r5, .L2404+144
+	ldr	r5, .L2407+120
 	str	r3, [r5]
-	ldr	r5, .L2404+148
+	ldr	r5, .L2407+124
 	str	r3, [r5]
-	ldr	r5, .L2404+152
+	ldr	r5, .L2407+128
 	ldr	lr, [r4, #40]
 	str	r3, [r5]
-	ldr	r3, .L2404+156
+	ldr	r3, .L2407+132
 	ldr	r5, [r3]
 	cmp	lr, r5
 	mov	r5, r2
 	it	hi
 	strhi	lr, [r3]
-	ldr	r3, .L2404+160
+	ldr	r3, .L2407+136
 	ldr	r2, [r4, #36]
 	ldr	r1, [r3]
 	cmp	r2, r1
@@ -16597,48 +16653,42 @@ FtlLoadSysInfo:
 	strhi	r2, [r3]
 	movw	r3, #65535
 	cmp	ip, r3
-	beq	.L2387
-	ldr	r0, .L2404+108
-	bl	make_superblock
-.L2387:
-	ldrh	r2, [r6]
-	movw	r3, #65535
-	cmp	r2, r3
 	beq	.L2388
-	ldr	r0, .L2404+116
+	ldr	r0, .L2407+84
 	bl	make_superblock
 .L2388:
-	ldrh	r2, [r5]
+	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
 	beq	.L2389
-	ldr	r0, .L2404+120
+	ldr	r0, .L2407+92
 	bl	make_superblock
 .L2389:
-	ldrh	r2, [r7]
+	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
 	beq	.L2390
-	ldr	r0, .L2404+112
+	ldr	r0, .L2407+96
 	bl	make_superblock
 .L2390:
+	ldrh	r2, [r7]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L2391
+	ldr	r0, .L2407+88
+	bl	make_superblock
+.L2391:
 	movs	r0, #0
-	b	.L2370
-.L2405:
+	b	.L2371
+.L2408:
 	.align	2
-.L2404:
-	.word	.LANCHOR40
-	.word	.LANCHOR203
-	.word	.LANCHOR83
-	.word	.LANCHOR210
+.L2407:
+	.word	1179929683
+	.word	.LANCHOR57
 	.word	.LANCHOR222
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LANCHOR2
-	.word	.LANCHOR57
-	.word	.LANCHOR53
-	.word	1179929683
 	.word	.LANCHOR80
 	.word	.LANCHOR1
 	.word	.LANCHOR69
@@ -16668,8 +16718,6 @@ FtlLoadSysInfo:
 	.word	.LANCHOR164
 	.word	.LANCHOR159
 	.word	.LANCHOR160
-	.word	.LANCHOR183
-	.word	.LANCHOR188
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
 	.section	.text.FtlDumpBlockInfo,"ax",%progbits
 	.align	1
@@ -16684,97 +16732,97 @@ FtlDumpBlockInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	ubfx	r0, r0, #10, #16
-	ldr	r4, .L2418
+	ldr	r4, .L2421
 	sub	sp, sp, #88
 	mov	r8, r1
 	ldrh	r3, [r4]
 	str	r3, [sp, #24]
 	bl	P2V_block_in_plane
-	ldr	r1, .L2418+4
+	ldr	r1, .L2421+4
 	mov	r6, r0
-	ldr	r0, .L2418+8
+	ldr	r0, .L2421+8
 	bl	printf
-	ldr	r3, .L2418+12
+	ldr	r3, .L2421+12
 	mov	r1, r6
-	ldr	r0, .L2418+16
+	ldr	r0, .L2421+16
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r6, lsl #1]
 	bl	printf
 	add	r0, sp, #88
 	strh	r6, [r0, #-48]!	@ movhi
 	bl	make_superblock
-	ldr	r3, .L2418+20
+	ldr	r3, .L2421+20
 	ldrb	r5, [r3]	@ zero_extendqisi2
-	cbz	r5, .L2407
+	cbz	r5, .L2410
 	cmp	r8, #0
-	bne	.L2416
+	bne	.L2419
 	mov	r0, r6
 	bl	ftl_get_blk_mode
 	cmp	r0, #1
 	mov	r5, r0
-	bne	.L2407
-	ldr	r3, .L2418+24
+	bne	.L2410
+	ldr	r3, .L2421+24
 	ldrh	r3, [r3]
 	str	r3, [sp, #24]
-.L2407:
+.L2410:
 	movs	r6, #0
 	ldrh	r3, [r4]
 	ldr	r2, [sp, #24]
 	mov	r1, r5
-	ldr	r0, .L2418+28
+	ldr	r0, .L2421+28
 	bl	printf
-.L2408:
-	ldr	r3, .L2418+32
+.L2411:
+	ldr	r3, .L2421+32
 	movs	r2, #0
 	add	ip, sp, #54
 	mov	r4, r2
 	movw	r10, #65535
 	mov	fp, #36
 	ldrh	lr, [r3]
-	ldr	r3, .L2418+36
+	ldr	r3, .L2421+36
 	ldr	r0, [r3]
-	ldr	r3, .L2418+40
+	ldr	r3, .L2421+40
 	ldr	r3, [r3]
 	str	r3, [sp, #28]
-	ldr	r3, .L2418+44
+	ldr	r3, .L2421+44
 	ldrh	r3, [r3]
 	str	r3, [sp, #32]
-	ldr	r3, .L2418+48
+	ldr	r3, .L2421+48
 	ldr	r3, [r3]
 	str	r3, [sp, #36]
-	ldr	r3, .L2418+52
+	ldr	r3, .L2421+52
 	ldrh	r8, [r3]
-.L2409:
+.L2412:
 	uxth	r3, r2
 	cmp	lr, r3
-	bhi	.L2411
-	ldr	fp, .L2418+56
+	bhi	.L2414
+	ldr	fp, .L2421+56
 	mov	r8, #0
 	mov	r10, #36
 	mov	r2, r5
 	mov	r1, r4
 	bl	FlashReadPages
-.L2412:
+.L2415:
 	uxth	r3, r8
 	cmp	r4, r3
-	bhi	.L2413
+	bhi	.L2416
 	adds	r6, r6, #1
 	ldr	r3, [sp, #24]
 	uxth	r6, r6
 	cmp	r3, r6
-	bne	.L2408
-.L2414:
+	bne	.L2411
+.L2417:
 	movs	r0, #0
 	add	sp, sp, #88
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2416:
+.L2419:
 	movs	r5, #0
-	b	.L2407
-.L2411:
+	b	.L2410
+.L2414:
 	ldrh	r3, [ip, #2]!
 	cmp	r3, r10
-	beq	.L2410
+	beq	.L2413
 	mla	r1, fp, r4, r0
 	ldr	r7, [sp, #28]
 	orr	r3, r6, r3, lsl #10
@@ -16791,11 +16839,11 @@ FtlDumpBlockInfo:
 	bic	r3, r3, #3
 	add	r3, r3, r7
 	str	r3, [r1, #12]
-.L2410:
-	adds	r2, r2, #1
-	b	.L2409
 .L2413:
-	ldr	r3, .L2418+36
+	adds	r2, r2, #1
+	b	.L2412
+.L2416:
+	ldr	r3, .L2421+36
 	mul	r0, r10, r8
 	ldrh	r1, [sp, #40]
 	add	r8, r8, #1
@@ -16819,25 +16867,25 @@ FtlDumpBlockInfo:
 	ldr	r2, [ip, r0]
 	mov	r0, fp
 	bl	printf
-	b	.L2412
-.L2419:
+	b	.L2415
+.L2422:
 	.align	2
-.L2418:
+.L2421:
 	.word	.LANCHOR52
 	.word	.LANCHOR225
-	.word	.LC45
-	.word	.LANCHOR83
 	.word	.LC46
+	.word	.LANCHOR83
+	.word	.LC47
 	.word	.LANCHOR15
 	.word	.LANCHOR53
-	.word	.LC47
+	.word	.LC48
 	.word	.LANCHOR38
 	.word	.LANCHOR180
 	.word	.LANCHOR104
 	.word	.LANCHOR57
 	.word	.LANCHOR105
 	.word	.LANCHOR58
-	.word	.LC48
+	.word	.LC49
 	.size	FtlDumpBlockInfo, .-FtlDumpBlockInfo
 	.section	.text.FtlScanAllBlock,"ax",%progbits
 	.align	1
@@ -16852,86 +16900,86 @@ FtlScanAllBlock:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #88
-	ldr	r6, .L2430
-	ldr	r1, .L2430+4
-	ldr	r0, .L2430+8
+	ldr	r6, .L2433
+	ldr	r1, .L2433+4
+	ldr	r0, .L2433+8
 	bl	printf
 	movs	r3, #0
 	str	r3, [sp, #28]
-.L2421:
-	ldr	r3, .L2430+12
+.L2424:
+	ldr	r3, .L2433+12
 	ldrh	r0, [sp, #28]
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bhi	.L2429
+	bhi	.L2432
 	movs	r0, #0
 	add	sp, sp, #88
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2429:
+.L2432:
 	add	r4, sp, #88
 	add	r7, sp, #54
 	strh	r0, [r4, #-48]!	@ movhi
 	movw	r10, #65535
 	bl	ftl_get_blk_mode
-	ldr	r3, .L2430+16
+	ldr	r3, .L2433+16
 	mov	fp, #36
 	ldrh	r1, [sp, #28]
 	ldr	r2, [r3]
 	mov	r3, r0
-	ldr	r0, .L2430+20
+	ldr	r0, .L2433+20
 	ldrh	r2, [r2, r1, lsl #1]
 	bl	printf
 	mov	r0, r4
 	bl	make_superblock
-	ldr	r3, .L2430+24
+	ldr	r3, .L2433+24
 	movs	r2, #0
 	ldr	r0, [r6]
 	mov	r4, r2
 	ldrh	lr, [r3]
-	ldr	r3, .L2430+28
+	ldr	r3, .L2433+28
 	ldr	r3, [r3]
 	str	r3, [sp, #32]
-	ldr	r3, .L2430+32
+	ldr	r3, .L2433+32
 	ldrh	ip, [r3]
-	ldr	r3, .L2430+36
+	ldr	r3, .L2433+36
 	ldr	r3, [r3]
 	str	r3, [sp, #36]
-	ldr	r3, .L2430+40
+	ldr	r3, .L2433+40
 	ldrh	r8, [r3]
-.L2422:
+.L2425:
 	uxth	r3, r2
 	cmp	lr, r3
-	bhi	.L2424
-	ldr	r10, .L2430+44
+	bhi	.L2427
+	ldr	r10, .L2433+44
 	movs	r7, #0
 	mov	r8, #36
 	movs	r2, #0
 	mov	r1, r4
 	bl	FlashReadPages
-.L2425:
+.L2428:
 	uxth	r3, r7
 	cmp	r4, r3
-	bhi	.L2426
-	ldr	r10, .L2430+48
+	bhi	.L2429
+	ldr	r10, .L2433+48
 	movs	r7, #0
 	mov	r8, #36
 	movs	r2, #1
 	mov	r1, r4
 	ldr	r0, [r6]
 	bl	FlashReadPages
-.L2427:
+.L2430:
 	uxth	r3, r7
 	cmp	r4, r3
-	bhi	.L2428
+	bhi	.L2431
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
 	str	r3, [sp, #28]
-	b	.L2421
-.L2424:
+	b	.L2424
+.L2427:
 	ldrh	r3, [r7, #2]!
 	cmp	r3, r10
-	beq	.L2423
+	beq	.L2426
 	mla	r1, fp, r4, r0
 	ldr	r5, [sp, #32]
 	lsls	r3, r3, #10
@@ -16947,10 +16995,10 @@ FtlScanAllBlock:
 	bic	r3, r3, #3
 	add	r3, r3, r5
 	str	r3, [r1, #12]
-.L2423:
-	adds	r2, r2, #1
-	b	.L2422
 .L2426:
+	adds	r2, r2, #1
+	b	.L2425
+.L2429:
 	mul	r2, r8, r7
 	ldr	r0, [r6]
 	ldrh	r1, [sp, #40]
@@ -16974,8 +17022,8 @@ FtlScanAllBlock:
 	mov	r0, r10
 	ldr	r3, [lr, #4]
 	bl	printf
-	b	.L2425
-.L2428:
+	b	.L2428
+.L2431:
 	mul	r2, r8, r7
 	ldr	r0, [r6]
 	ldrh	r1, [sp, #40]
@@ -16999,23 +17047,23 @@ FtlScanAllBlock:
 	mov	r0, r10
 	ldr	r3, [lr, #4]
 	bl	printf
-	b	.L2427
-.L2431:
+	b	.L2430
+.L2434:
 	.align	2
-.L2430:
+.L2433:
 	.word	.LANCHOR180
 	.word	.LANCHOR226
-	.word	.LC45
+	.word	.LC46
 	.word	.LANCHOR41
 	.word	.LANCHOR83
-	.word	.LC49
+	.word	.LC50
 	.word	.LANCHOR38
 	.word	.LANCHOR104
 	.word	.LANCHOR57
 	.word	.LANCHOR105
 	.word	.LANCHOR58
-	.word	.LC50
 	.word	.LC51
+	.word	.LC52
 	.size	FtlScanAllBlock, .-FtlScanAllBlock
 	.section	.text.FtlMapTblRecovery,"ax",%progbits
 	.align	1
@@ -17044,15 +17092,15 @@ FtlMapTblRecovery:
 	ldr	r0, [sp]
 	str	r3, [sp, #4]
 	bl	ftl_memset
-	ldr	r2, .L2473
-	ldr	r3, .L2473+4
+	ldr	r2, .L2476
+	ldr	r3, .L2476+4
 	str	r6, [r4, #32]
 	ldr	r1, [r2]
 	mov	fp, r3
 	str	r6, [r4, #28]
 	str	r2, [sp, #8]
 	str	r1, [r3, #8]
-	ldr	r1, .L2473+8
+	ldr	r1, .L2476+8
 	ldr	r5, [r1]
 	movw	r1, #65535
 	str	r5, [r3, #12]
@@ -17060,16 +17108,16 @@ FtlMapTblRecovery:
 	strh	r1, [r4, #2]	@ movhi
 	movs	r1, #1
 	str	r1, [r4, #36]
-.L2433:
+.L2436:
 	ldr	r2, [sp, #4]
 	sxth	r3, r6
 	cmp	r3, r2
-	bge	.L2452
+	bge	.L2455
 	ldr	r2, [sp, #4]
 	lsl	r8, r3, #1
 	subs	r2, r2, #1
 	cmp	r3, r2
-	bne	.L2434
+	bne	.L2437
 	ldrh	r0, [r10, r3, lsl #1]
 	movs	r1, #1
 	str	r3, [sp, #4]
@@ -17079,28 +17127,28 @@ FtlMapTblRecovery:
 	add	r8, r8, r10
 	strh	r6, [r4]	@ movhi
 	sxth	r10, r0
-	ldr	r6, .L2473+4
+	ldr	r6, .L2476+4
 	adds	r0, r0, #1
 	mov	r2, r3
 	ldr	r3, [sp, #4]
 	strh	r0, [r4, #2]	@ movhi
 	ldr	r3, [r2, r3, lsl #2]
 	str	r3, [r4, #28]
-.L2435:
+.L2438:
 	sxth	r2, fp
 	cmp	r2, r10
-	ble	.L2438
-.L2452:
+	ble	.L2441
+.L2455:
 	mov	r0, r4
 	bl	ftl_free_no_use_map_blk
-	ldr	r3, .L2473+12
+	ldr	r3, .L2476+12
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L2440
+	bne	.L2443
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L2440:
+.L2443:
 	mov	r0, r4
 	bl	ftl_map_blk_gc
 	mov	r0, r4
@@ -17109,22 +17157,22 @@ FtlMapTblRecovery:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2438:
+.L2441:
 	ldrh	r1, [r8]
-	ldr	r0, .L2473+4
+	ldr	r0, .L2476+4
 	orr	r2, r2, r1, lsl #10
 	str	r2, [r6, #4]
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-	ldr	r3, .L2473+16
+	ldr	r3, .L2476+16
 	ldrb	r2, [r3]	@ zero_extendqisi2
-	cbz	r2, .L2436
+	cbz	r2, .L2439
 	ldr	r2, [r6, #12]
 	ldr	r2, [r2, #12]
 	str	r2, [sp, #4]
-	cbz	r2, .L2436
-	ldr	r1, .L2473+20
+	cbz	r2, .L2439
+	ldr	r1, .L2476+20
 	ldr	r0, [r6, #8]
 	ldrh	r1, [r1]
 	bl	js_hash
@@ -17133,13 +17181,13 @@ FtlMapTblRecovery:
 	itt	ne
 	movne	r2, #-1
 	strne	r2, [r6]
-.L2436:
+.L2439:
 	ldr	r2, [r6]
 	adds	r2, r2, #1
-	beq	.L2437
+	beq	.L2440
 	ldrh	r2, [r5, #8]
 	cmp	r7, r2
-	bls	.L2437
+	bls	.L2440
 	ldrh	r1, [r4, #4]
 	ldrh	r0, [r5]
 	cmp	r0, r1
@@ -17147,16 +17195,16 @@ FtlMapTblRecovery:
 	ldreq	r1, [r6, #4]
 	ldreq	r3, [sp]
 	streq	r1, [r3, r2, lsl #2]
-.L2437:
+.L2440:
 	add	fp, fp, #1
-	b	.L2435
-.L2434:
+	b	.L2438
+.L2437:
 	ldr	r2, [sp, #8]
-	ldr	r0, .L2473+4
+	ldr	r0, .L2476+4
 	ldr	r2, [r2]
 	str	r2, [fp, #8]
 	add	r2, r10, r8
-	ldr	r8, .L2473+12
+	ldr	r8, .L2476+12
 	str	r2, [sp, #16]
 	ldrh	r2, [r10, r3, lsl #1]
 	ldrh	r3, [r8]
@@ -17168,39 +17216,39 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	r3, [fp]
 	adds	r3, r3, #1
-	beq	.L2454
+	beq	.L2457
 	ldrh	r2, [r5]
 	ldrh	r3, [r4, #4]
 	cmp	r2, r3
-	bne	.L2454
+	bne	.L2457
 	ldrh	r2, [r5, #8]
 	movw	r3, #64245
 	cmp	r2, r3
-	beq	.L2442
-.L2454:
+	beq	.L2445
+.L2457:
 	mov	r8, #0
-.L2443:
-	ldr	r2, .L2473+12
+.L2446:
+	ldr	r2, .L2476+12
 	sxth	r3, r8
 	ldrh	r2, [r2]
 	cmp	r3, r2
-	bge	.L2450
+	bge	.L2453
 	ldr	r2, [sp, #16]
-	ldr	r0, .L2473+4
+	ldr	r0, .L2476+4
 	ldrh	r2, [r2]
 	orr	r3, r3, r2, lsl #10
 	movs	r2, #1
 	mov	r1, r2
 	str	r3, [fp, #4]
 	bl	FlashReadPages
-	ldr	r3, .L2473+16
+	ldr	r3, .L2476+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2447
+	cbz	r3, .L2450
 	ldr	r3, [fp, #12]
 	ldr	r3, [r3, #12]
 	str	r3, [sp, #20]
-	cbz	r3, .L2447
-	ldr	r2, .L2473+20
+	cbz	r3, .L2450
+	ldr	r2, .L2476+20
 	ldr	r0, [fp, #8]
 	ldrh	r1, [r2]
 	bl	js_hash
@@ -17209,13 +17257,13 @@ FtlMapTblRecovery:
 	itt	ne
 	movne	r3, #-1
 	strne	r3, [fp]
-.L2447:
+.L2450:
 	ldr	r3, [fp]
 	adds	r3, r3, #1
-	beq	.L2448
+	beq	.L2451
 	ldrh	r3, [r5, #8]
 	cmp	r7, r3
-	bls	.L2448
+	bls	.L2451
 	ldrh	r1, [r5]
 	ldrh	r2, [r4, #4]
 	cmp	r1, r2
@@ -17223,23 +17271,23 @@ FtlMapTblRecovery:
 	ldreq	r2, [fp, #4]
 	ldreq	r1, [sp]
 	streq	r2, [r1, r3, lsl #2]
-.L2448:
+.L2451:
 	add	r8, r8, #1
-	b	.L2443
-.L2442:
+	b	.L2446
+.L2445:
 	ldr	r3, [sp, #8]
 	movs	r1, #0
 	ldrh	r2, [r8]
 	ldr	ip, [r3]
 	subs	r2, r2, #1
-.L2444:
+.L2447:
 	sxth	r3, r1
 	cmp	r3, r2
-	blt	.L2446
-.L2450:
+	blt	.L2449
+.L2453:
 	adds	r6, r6, #1
-	b	.L2433
-.L2446:
+	b	.L2436
+.L2449:
 	lsls	r0, r3, #3
 	ldr	r3, [ip, r3, lsl #3]
 	adds	r1, r1, #1
@@ -17250,10 +17298,10 @@ FtlMapTblRecovery:
 	ldrhi	r3, [sp]
 	ldrhi	r0, [r0, #4]
 	strhi	r0, [r3, lr, lsl #2]
-	b	.L2444
-.L2474:
+	b	.L2447
+.L2477:
 	.align	2
-.L2473:
+.L2476:
 	.word	.LANCHOR183
 	.word	.LANCHOR203
 	.word	.LANCHOR188
@@ -17273,36 +17321,36 @@ FtlLoadVonderInfo:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L2476
-	ldr	r0, .L2476+4
+	ldr	r3, .L2479
+	ldr	r0, .L2479+4
 	ldrh	r3, [r3]
 	strh	r3, [r0, #10]	@ movhi
 	movw	r3, #61574
 	strh	r3, [r0, #4]	@ movhi
-	ldr	r3, .L2476+8
+	ldr	r3, .L2479+8
 	ldrh	r3, [r3]
 	strh	r3, [r0, #8]	@ movhi
-	ldr	r3, .L2476+12
+	ldr	r3, .L2479+12
 	ldrh	r3, [r3]
 	strh	r3, [r0, #6]	@ movhi
-	ldr	r3, .L2476+16
+	ldr	r3, .L2479+16
 	ldr	r3, [r3]
 	str	r3, [r0, #12]
-	ldr	r3, .L2476+20
+	ldr	r3, .L2479+20
 	ldr	r3, [r3]
 	str	r3, [r0, #16]
-	ldr	r3, .L2476+24
+	ldr	r3, .L2479+24
 	ldr	r3, [r3]
 	str	r3, [r0, #20]
-	ldr	r3, .L2476+28
+	ldr	r3, .L2479+28
 	ldr	r3, [r3]
 	str	r3, [r0, #24]
 	bl	FtlMapTblRecovery
 	movs	r0, #0
 	pop	{r3, pc}
-.L2477:
+.L2480:
 	.align	2
-.L2476:
+.L2479:
 	.word	.LANCHOR61
 	.word	.LANCHOR216
 	.word	.LANCHOR70
@@ -17325,13 +17373,13 @@ FtlLoadMapInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	FtlL2PDataInit
-	ldr	r0, .L2479
+	ldr	r0, .L2482
 	bl	FtlMapTblRecovery
 	movs	r0, #0
 	pop	{r3, pc}
-.L2480:
+.L2483:
 	.align	2
-.L2479:
+.L2482:
 	.word	.LANCHOR127
 	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
 	.section	.text.ftl_scan_all_ppa,"ax",%progbits
@@ -17347,24 +17395,24 @@ ftl_scan_all_ppa:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r6, #0
-	ldr	r4, .L2486
+	ldr	r4, .L2489
 	sub	sp, sp, #24
-	ldr	r7, .L2486+4
+	ldr	r7, .L2489+4
 	ldrh	r1, [r4]
 	mov	r8, r4
-	ldr	r4, .L2486+8
+	ldr	r4, .L2489+8
 	ldrh	r2, [r7]
-	ldr	r0, .L2486+12
+	ldr	r0, .L2489+12
 	bl	printf
-.L2482:
+.L2485:
 	ldrh	r3, [r8]
 	cmp	r6, r3
-	bcs	.L2484
+	bcs	.L2487
 	lsl	fp, r6, #10
 	movs	r5, #0
-	ldr	r10, .L2486+32
-	b	.L2485
-.L2483:
+	ldr	r10, .L2489+32
+	b	.L2488
+.L2486:
 	add	r3, r5, fp
 	movs	r2, #0
 	str	r3, [r4, #4]
@@ -17374,13 +17422,13 @@ ftl_scan_all_ppa:
 	str	r2, [r4]
 	adds	r5, r5, #1
 	str	r3, [r4, #8]
-	ldr	r3, .L2486+16
+	ldr	r3, .L2489+16
 	ldr	r3, [r3]
 	str	r3, [r4, #12]
 	bl	FlashReadPages
 	ldr	r2, [r4, #8]
 	ldr	r3, [r4, #12]
-	ldr	r0, .L2486+20
+	ldr	r0, .L2489+20
 	ldr	r1, [r2, #4]
 	str	r1, [sp, #16]
 	ldr	r2, [r2]
@@ -17395,30 +17443,30 @@ ftl_scan_all_ppa:
 	ldr	r2, [r4]
 	ldr	r1, [r4, #4]
 	bl	printf
-.L2485:
+.L2488:
 	ldrh	r3, [r7]
 	cmp	r5, r3
-	bcc	.L2483
+	bcc	.L2486
 	adds	r6, r6, #1
-	b	.L2482
-.L2484:
-	ldr	r1, .L2486+24
-	ldr	r0, .L2486+28
+	b	.L2485
+.L2487:
+	ldr	r1, .L2489+24
+	ldr	r0, .L2489+28
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
 	b	printf
-.L2487:
+.L2490:
 	.align	2
-.L2486:
+.L2489:
 	.word	.LANCHOR51
 	.word	.LANCHOR52
 	.word	.LANCHOR203
-	.word	.LC52
-	.word	.LANCHOR188
 	.word	.LC53
-	.word	.LANCHOR227
+	.word	.LANCHOR188
 	.word	.LC54
+	.word	.LANCHOR227
+	.word	.LC55
 	.word	.LANCHOR183
 	.size	ftl_scan_all_ppa, .-ftl_scan_all_ppa
 	.section	.text.FlashReadFacBbtData,"ax",%progbits
@@ -17434,18 +17482,18 @@ FlashReadFacBbtData:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	fp, r2
-	ldr	r2, .L2501
+	ldr	r2, .L2504
 	sub	sp, sp, #48
 	mov	r6, r1
 	mov	r4, r0
-	ldr	r7, .L2501+4
+	ldr	r7, .L2504+4
 	ldrh	r3, [r2, #14]
 	ldrh	r2, [r2, #12]
 	smulbb	r3, r3, r2
 	ldr	r2, [r7]
 	uxth	r3, r3
 	str	r2, [sp, #20]
-	ldr	r2, .L2501+8
+	ldr	r2, .L2504+8
 	subs	r5, r3, #1
 	mul	r10, r6, r3
 	uxth	r5, r5
@@ -17453,12 +17501,12 @@ FlashReadFacBbtData:
 	ldr	r1, [r2]
 	mov	r8, r2
 	str	r1, [sp, #24]
-.L2489:
+.L2492:
 	cmp	r3, r5
-	ble	.L2496
+	ble	.L2499
 	mov	r0, #-1
-	b	.L2488
-.L2496:
+	b	.L2491
+.L2499:
 	add	r2, r5, r10
 	add	r0, sp, #12
 	lsls	r2, r2, #10
@@ -17470,60 +17518,60 @@ FlashReadFacBbtData:
 	ldr	r2, [sp, #12]
 	ldr	r3, [sp, #4]
 	adds	r2, r2, #1
-	beq	.L2490
+	beq	.L2493
 	ldr	r2, [r8]
 	ldrh	r1, [r2]
 	movw	r2, #61664
 	cmp	r1, r2
-	bne	.L2490
-	cbz	r4, .L2497
-	cbz	r6, .L2492
-.L2495:
+	bne	.L2493
+	cbz	r4, .L2500
+	cbz	r6, .L2495
+.L2498:
 	mov	r2, fp
 	ldr	r1, [r7]
 	mov	r0, r4
 	bl	ftl_memcpy
 	movs	r3, #4
-	ldr	r0, .L2501+12
+	ldr	r0, .L2504+12
 	mov	r2, r3
 	mov	r1, r4
 	bl	rknand_print_hex
 	movs	r0, #0
-.L2488:
+.L2491:
 	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2492:
+.L2495:
 	ldr	r1, [r7]
 	mov	ip, #1
-	ldr	r5, .L2501+16
-.L2493:
+	ldr	r5, .L2504+16
+.L2496:
 	ldr	r0, [r5]
 	uxth	r3, r6
 	adds	r6, r6, #1
 	cmp	r3, r0
-	bcs	.L2495
+	bcs	.L2498
 	lsrs	r0, r3, #5
 	and	r3, r3, #31
 	lsl	r3, ip, r3
 	ldr	r2, [r1, r0, lsl #2]
 	orrs	r3, r3, r2
 	str	r3, [r1, r0, lsl #2]
-	b	.L2493
-.L2490:
+	b	.L2496
+.L2493:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L2489
-.L2497:
+	b	.L2492
+.L2500:
 	mov	r0, r4
-	b	.L2488
-.L2502:
+	b	.L2491
+.L2505:
 	.align	2
-.L2501:
+.L2504:
 	.word	.LANCHOR14
 	.word	.LANCHOR147
 	.word	.LANCHOR197
-	.word	.LC55
+	.word	.LC56
 	.word	.LANCHOR149
 	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
 	.section	.text.FlashGetBadBlockList,"ax",%progbits
@@ -17539,8 +17587,8 @@ FlashGetBadBlockList:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r5, r0
-	ldr	r3, .L2513
-	ldr	r6, .L2513+4
+	ldr	r3, .L2516
+	ldr	r6, .L2516+4
 	ldr	r3, [r3]
 	ldr	r0, [r6]
 	ldrb	r4, [r3, #13]	@ zero_extendqisi2
@@ -17551,25 +17599,25 @@ FlashGetBadBlockList:
 	asrs	r2, r2, #3
 	bl	FlashReadFacBbtData
 	adds	r0, r0, #1
-	bne	.L2504
-.L2508:
+	bne	.L2507
+.L2511:
 	movs	r3, #0
-.L2505:
+.L2508:
 	movw	r2, #65535
 	movs	r0, #0
 	strh	r2, [r5, r3, lsl #1]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.L2504:
+.L2507:
 	ldr	r7, [r6]
 	movs	r2, #0
 	lsr	ip, r4, #4
 	mov	r3, r2
 	subs	r4, r4, #1
 	mov	lr, #1
-.L2506:
+.L2509:
 	uxth	r1, r2
 	cmp	r1, r4
-	bge	.L2505
+	bge	.L2508
 	lsrs	r6, r1, #5
 	and	r0, r1, #31
 	lsl	r0, lr, r0
@@ -17581,11 +17629,11 @@ FlashGetBadBlockList:
 	strhne	r1, [r5, r3, lsl #1]	@ movhi
 	uxthne	r3, r0
 	cmp	r3, ip
-	bcc	.L2506
-	b	.L2508
-.L2514:
+	bcc	.L2509
+	b	.L2511
+.L2517:
 	.align	2
-.L2513:
+.L2516:
 	.word	.LANCHOR18
 	.word	.LANCHOR153
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
@@ -17600,66 +17648,66 @@ FlashGetBadBlockList:
 FtlMakeBbt:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2535
+	ldr	r3, .L2538
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	ldr	r7, [r3]
 	cmp	r7, #0
-	bne	.L2516
-	ldr	r8, .L2535+40
-	ldr	r4, .L2535+4
+	bne	.L2519
+	ldr	r8, .L2538+40
+	ldr	r4, .L2538+4
 	bl	FtlBbtMemInit
 	sub	r10, r8, #18
 	bl	FtlLoadFactoryBbt
-.L2517:
-	ldr	r3, .L2535+8
+.L2520:
+	ldr	r3, .L2538+8
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	bcc	.L2523
-	ldr	r5, .L2535+12
+	bcc	.L2526
+	ldr	r5, .L2538+12
 	movs	r4, #0
-.L2524:
+.L2527:
 	ldrh	r3, [r5]
 	uxth	r0, r4
 	adds	r4, r4, #1
 	cmp	r3, r0
-	bhi	.L2525
-	ldr	r4, .L2535+16
+	bhi	.L2528
+	ldr	r4, .L2538+16
 	movw	r6, #65535
 	ldrh	r5, [r4, #12]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L2526:
+.L2529:
 	ldrh	r3, [r4, #12]
 	subs	r3, r3, #47
 	cmp	r3, r5
-	bgt	.L2530
+	bgt	.L2533
 	mov	r0, r5
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L2527
+	beq	.L2530
 	mov	r0, r5
 	bl	FlashTestBlk
 	cmp	r0, #0
-	beq	.L2528
+	beq	.L2531
 	mov	r0, r5
 	bl	FtlBbmMapBadBlock
-.L2527:
+.L2530:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L2526
-.L2523:
-	ldr	r3, .L2535+20
+	b	.L2529
+.L2526:
+	ldr	r3, .L2538+20
 	movw	r1, #65535
 	ldrh	r2, [r10, #2]!
 	ldr	r0, [r3]
-	ldr	r3, .L2535+24
+	ldr	r3, .L2538+24
 	cmp	r2, r1
 	str	r0, [r4, #8]
 	ldr	fp, [r3]
 	str	r3, [sp, #4]
-	ldr	r3, .L2535+28
+	ldr	r3, .L2538+28
 	str	fp, [r4, #12]
-	beq	.L2518
+	beq	.L2521
 	ldrh	r6, [r3]
 	mov	r0, r4
 	str	r3, [sp]
@@ -17676,13 +17724,13 @@ FtlMakeBbt:
 	adds	r2, r2, #7
 	asrs	r2, r2, #3
 	bl	ftl_memcpy
-.L2519:
+.L2522:
 	uxth	r0, r6
 	adds	r7, r7, #1
 	add	r8, r8, #4
 	bl	FtlBbmMapBadBlock
-	b	.L2517
-.L2518:
+	b	.L2520
+.L2521:
 	mov	r1, r7
 	str	r3, [sp]
 	bl	FlashGetBadBlockList
@@ -17691,17 +17739,17 @@ FtlMakeBbt:
 	bl	FtlBbt2Bitmap
 	ldr	r3, [sp]
 	ldrh	r5, [r3]
-.L2521:
+.L2524:
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L2520:
+.L2523:
 	ldr	r3, [sp]
 	ldrh	r0, [r3]
 	smlabb	r0, r0, r7, r5
 	uxth	r0, r0
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L2521
+	beq	.L2524
 	ldr	r3, [sp, #4]
 	movs	r2, #16
 	movs	r1, #0
@@ -17721,7 +17769,7 @@ FtlMakeBbt:
 	mla	r6, r7, r6, r3
 	lsls	r3, r6, #10
 	str	r3, [r4, #4]
-	ldr	r3, .L2535+32
+	ldr	r3, .L2538+32
 	ldrh	r2, [r3]
 	lsls	r2, r2, #2
 	bl	ftl_memcpy
@@ -17736,23 +17784,23 @@ FtlMakeBbt:
 	bl	FlashProgPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	bne	.L2519
+	bne	.L2522
 	uxth	r0, r6
 	bl	FtlBbmMapBadBlock
-	b	.L2520
-.L2525:
-	bl	FtlBbmMapBadBlock
-	b	.L2524
+	b	.L2523
 .L2528:
+	bl	FtlBbmMapBadBlock
+	b	.L2527
+.L2531:
 	ldrh	r3, [r4]
 	cmp	r3, r6
-	bne	.L2529
+	bne	.L2532
 	strh	r5, [r4]	@ movhi
-	b	.L2527
-.L2529:
+	b	.L2530
+.L2532:
 	strh	r5, [r4, #4]	@ movhi
-.L2530:
-	ldr	r3, .L2535+36
+.L2533:
+	ldr	r3, .L2538+36
 	movs	r5, #0
 	str	r5, [r4, #8]
 	movs	r2, #2
@@ -17780,14 +17828,14 @@ FtlMakeBbt:
 	strh	r2, [r4]	@ movhi
 	strh	r3, [r4, #4]	@ movhi
 	bl	FtlBbmTblFlush
-.L2516:
+.L2519:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2536:
+.L2539:
 	.align	2
-.L2535:
+.L2538:
 	.word	.LANCHOR76
 	.word	.LANCHOR203
 	.word	.LANCHOR45
@@ -17813,40 +17861,40 @@ log2phys:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #24
-	ldr	r4, .L2555
+	ldr	r4, .L2558
 	mov	fp, r0
 	str	r2, [sp, #16]
 	ldr	r2, [r4]
-	ldr	r3, .L2555+4
+	ldr	r3, .L2558+4
 	str	r1, [sp, #4]
 	cmp	r0, r2
 	ldrh	r5, [r3]
-	bcc	.L2538
-	ldr	r1, .L2555+8
+	bcc	.L2541
+	ldr	r1, .L2558+8
 	mov	r2, #884
-	ldr	r0, .L2555+12
+	ldr	r0, .L2558+12
 	bl	printf
-	ldr	r1, .L2555+16
-	ldr	r0, .L2555+20
+	ldr	r1, .L2558+16
+	ldr	r0, .L2558+20
 	bl	printf
-.L2538:
+.L2541:
 	ldr	r3, [r4]
 	cmp	fp, r3
-	bcs	.L2539
+	bcs	.L2542
 	adds	r3, r5, #7
-	ldr	r5, .L2555+24
+	ldr	r5, .L2558+24
 	lsr	r7, fp, r3
 	str	r3, [sp, #8]
-	ldr	r3, .L2555+28
+	ldr	r3, .L2558+28
 	movs	r4, #12
 	ldr	r1, [r5]
 	uxth	r6, r7
 	ldrh	r2, [r3]
 	movs	r3, #0
-.L2540:
+.L2543:
 	uxth	r10, r3
 	cmp	r10, r2
-	bcc	.L2545
+	bcc	.L2548
 	bl	select_l2p_ram_region
 	muls	r4, r0, r4
 	ldr	r3, [r5]
@@ -17855,35 +17903,35 @@ log2phys:
 	adds	r2, r3, r4
 	movw	r3, #65535
 	cmp	r1, r3
-	beq	.L2546
+	beq	.L2549
 	ldr	r3, [r2, #4]
 	cmp	r3, #0
-	bge	.L2546
+	bge	.L2549
 	bl	flush_l2p_region
-.L2546:
-	ldr	r3, .L2555+32
+.L2549:
+	ldr	r3, .L2558+32
 	ldrh	r3, [r3]
 	cmp	r3, r6
-	bcs	.L2547
-	ldr	r1, .L2555+36
+	bcs	.L2550
+	ldr	r1, .L2558+36
 	movw	r2, #526
-	ldr	r0, .L2555+12
+	ldr	r0, .L2558+12
 	bl	printf
-	ldr	r1, .L2555+16
-	ldr	r0, .L2555+20
+	ldr	r1, .L2558+16
+	ldr	r0, .L2558+20
 	bl	printf
-.L2547:
-	ldr	r3, .L2555+40
+.L2550:
+	ldr	r3, .L2558+40
 	uxth	r7, r7
 	ldr	r3, [r3]
 	ldr	r3, [r3, r7, lsl #2]
 	cmp	r3, #0
-	bne	.L2548
+	bne	.L2551
 	ldr	r2, [r5]
 	movs	r1, #255
 	str	r3, [sp, #12]
 	adds	r0, r2, r4
-	ldr	r2, .L2555+44
+	ldr	r2, .L2558+44
 	ldr	r0, [r0, #8]
 	ldrh	r2, [r2]
 	bl	ftl_memset
@@ -17892,53 +17940,53 @@ log2phys:
 	adds	r1, r2, r4
 	strh	r6, [r2, r4]	@ movhi
 	str	r3, [r1, #4]
-	b	.L2542
-.L2539:
+	b	.L2545
+.L2542:
 	ldr	r3, [sp, #16]
 	mov	r0, #-1
-	cbnz	r3, .L2537
+	cbnz	r3, .L2540
 	ldr	r3, [sp, #4]
 	str	r0, [r3]
-.L2537:
+.L2540:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2545:
+.L2548:
 	adds	r3, r3, #1
 	mla	r0, r4, r3, r1
 	ldrh	r0, [r0, #-12]
 	cmp	r0, r6
-	bne	.L2540
-.L2542:
+	bne	.L2543
+.L2545:
 	ldr	r2, [sp, #8]
 	movs	r3, #1
 	ldr	r0, [sp, #16]
-	ldr	r1, .L2555+24
+	ldr	r1, .L2558+24
 	lsls	r3, r3, r2
 	movs	r2, #12
 	subs	r3, r3, #1
 	and	r3, r3, fp
 	uxth	r3, r3
-	cbnz	r0, .L2543
+	cbnz	r0, .L2546
 	ldr	r0, [r1]
 	mla	r2, r2, r10, r0
 	ldr	r2, [r2, #8]
 	ldr	r3, [r2, r3, lsl #2]
 	ldr	r2, [sp, #4]
 	str	r3, [r2]
-.L2544:
+.L2547:
 	ldr	r2, [r1]
 	movs	r3, #12
 	mla	r10, r3, r10, r2
 	ldr	r3, [r10, #4]
 	adds	r2, r3, #1
-	beq	.L2553
+	beq	.L2556
 	adds	r3, r3, #1
 	str	r3, [r10, #4]
-.L2553:
+.L2556:
 	movs	r0, #0
-	b	.L2537
-.L2543:
+	b	.L2540
+.L2546:
 	ldr	r0, [r1]
 	mla	r2, r2, r10, r0
 	ldr	r0, [sp, #4]
@@ -17948,19 +17996,19 @@ log2phys:
 	ldr	r3, [r2, #4]
 	orr	r3, r3, #-2147483648
 	str	r3, [r2, #4]
-	ldr	r3, .L2555+48
+	ldr	r3, .L2558+48
 	strh	r6, [r3]	@ movhi
-	b	.L2544
-.L2548:
+	b	.L2547
+.L2551:
 	ldr	r2, [r5]
-	ldr	r8, .L2555+80
+	ldr	r8, .L2558+80
 	str	r3, [sp, #20]
 	add	r2, r2, r4
 	ldr	r2, [r2, #8]
 	mov	r0, r8
 	str	r3, [r8, #4]
 	str	r2, [r8, #8]
-	ldr	r2, .L2555+52
+	ldr	r2, .L2558+52
 	ldr	r2, [r2]
 	str	r2, [r8, #12]
 	movs	r2, #1
@@ -17971,64 +18019,64 @@ log2phys:
 	str	r3, [sp, #12]
 	ldr	r3, [sp, #20]
 	cmp	r2, r6
-	beq	.L2549
+	beq	.L2552
 	mov	r2, r3
 	mov	r1, r7
-	ldr	r0, .L2555+56
+	ldr	r0, .L2558+56
 	bl	printf
 	movs	r3, #4
 	ldr	r1, [r8, #12]
 	mov	r2, r3
-	ldr	r0, .L2555+60
+	ldr	r0, .L2558+60
 	bl	rknand_print_hex
-	ldr	r3, .L2555+32
+	ldr	r3, .L2558+32
 	movs	r2, #4
-	ldr	r1, .L2555+40
-	ldr	r0, .L2555+64
+	ldr	r1, .L2558+40
+	ldr	r0, .L2558+64
 	ldrh	r3, [r3]
 	ldr	r1, [r1]
 	bl	rknand_print_hex
-	ldr	r3, .L2555+68
+	ldr	r3, .L2558+68
 	movs	r2, #1
 	str	r2, [r3]
-.L2550:
+.L2553:
 	ldr	r3, [sp, #12]
 	ldrh	r3, [r3, #8]
 	cmp	r3, r6
-	beq	.L2551
-	ldr	r1, .L2555+36
+	beq	.L2554
+	ldr	r1, .L2558+36
 	mov	r2, #552
-	ldr	r0, .L2555+12
+	ldr	r0, .L2558+12
 	bl	printf
-	ldr	r1, .L2555+16
-	ldr	r0, .L2555+20
+	ldr	r1, .L2558+16
+	ldr	r0, .L2558+20
 	bl	printf
-.L2551:
-	ldr	r3, .L2555+24
+.L2554:
+	ldr	r3, .L2558+24
 	movs	r1, #0
 	ldr	r3, [r3]
 	adds	r2, r3, r4
 	str	r1, [r2, #4]
 	strh	r6, [r3, r4]	@ movhi
-	b	.L2542
-.L2549:
+	b	.L2545
+.L2552:
 	ldr	r2, [r8]
 	cmp	r2, #256
-	bne	.L2550
+	bne	.L2553
 	mov	r2, r3
 	mov	r1, r7
-	ldr	r0, .L2555+72
+	ldr	r0, .L2558+72
 	bl	printf
 	ldr	r3, [r5]
 	mov	r1, r7
-	ldr	r0, .L2555+76
+	ldr	r0, .L2558+76
 	add	r3, r3, r4
 	ldr	r2, [r3, #8]
 	bl	FtlMapWritePage
-	b	.L2550
-.L2556:
+	b	.L2553
+.L2559:
 	.align	2
-.L2555:
+.L2558:
 	.word	.LANCHOR72
 	.word	.LANCHOR56
 	.word	.LANCHOR228
@@ -18043,11 +18091,11 @@ log2phys:
 	.word	.LANCHOR57
 	.word	.LANCHOR97
 	.word	.LANCHOR188
-	.word	.LC56
-	.word	.LC27
 	.word	.LC57
-	.word	.LANCHOR76
+	.word	.LC27
 	.word	.LC58
+	.word	.LANCHOR76
+	.word	.LC59
 	.word	.LANCHOR127
 	.word	.LANCHOR203
 	.size	log2phys, .-log2phys
@@ -18064,73 +18112,73 @@ FtlProgPages:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r3
-	ldr	r3, .L2577
+	ldr	r3, .L2580
 	mov	r5, r0
 	mov	r10, r1
 	ldr	r7, [r3]
 	mov	r8, r3
-	cbnz	r7, .L2557
-	ldr	r3, .L2577+4
+	cbnz	r7, .L2560
+	ldr	r3, .L2580+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2572
+	cbz	r3, .L2575
 	ldrb	r6, [r4, #8]	@ zero_extendqisi2
 	subs	r3, r6, #1
 	rsbs	r6, r3, #0
 	adcs	r6, r6, r3
-.L2559:
-	ldr	fp, .L2577+40
+.L2562:
+	ldr	fp, .L2580+40
 	mov	r2, r6
 	ldrb	r3, [r4, #9]	@ zero_extendqisi2
 	mov	r1, r10
 	mov	r0, r5
 	bl	FlashProgPages
-.L2560:
+.L2563:
 	cmp	r7, r10
-	bne	.L2570
-	ldr	r3, .L2577+8
+	bne	.L2573
+	ldr	r3, .L2580+8
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L2557
-	ldr	r1, .L2577+12
+	bcc	.L2560
+	ldr	r1, .L2580+12
 	movw	r2, #1605
-	ldr	r0, .L2577+16
+	ldr	r0, .L2580+16
 	bl	printf
-	ldr	r1, .L2577+20
-	ldr	r0, .L2577+24
+	ldr	r1, .L2580+20
+	ldr	r0, .L2580+24
 	bl	printf
-.L2557:
+.L2560:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2572:
+.L2575:
 	mov	r6, r7
-	b	.L2559
-.L2563:
+	b	.L2562
+.L2566:
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r4]
 	cmp	r3, r0
-	bne	.L2561
+	bne	.L2564
 	ldr	r1, [fp]
 	ldrh	r0, [r4, #4]
 	ldrh	r2, [r1, r3, lsl #1]
 	subs	r2, r2, r0
 	strh	r2, [r1, r3, lsl #1]	@ movhi
-	ldr	r3, .L2577+28
+	ldr	r3, .L2580+28
 	ldrh	r3, [r3]
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [r4, #6]
 	strh	r3, [r4, #4]	@ movhi
-.L2561:
+.L2564:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L2562
+	cbnz	r3, .L2565
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-.L2562:
-	ldr	r2, .L2577+32
+.L2565:
+	ldr	r2, .L2580+32
 	ldr	r3, [r2, #96]
 	adds	r3, r3, #1
 	str	r3, [r2, #96]
@@ -18148,27 +18196,27 @@ FtlProgPages:
 	bl	FlashProgPages
 	ldr	r3, [r8]
 	cmp	r3, #0
-	bne	.L2557
-.L2570:
+	bne	.L2560
+.L2573:
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L2563
-	ldr	r3, .L2577+8
+	beq	.L2566
+	ldr	r3, .L2580+8
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L2564
-	ldr	r1, .L2577+12
+	bcc	.L2567
+	ldr	r1, .L2580+12
 	movw	r2, #1588
-	ldr	r0, .L2577+16
+	ldr	r0, .L2580+16
 	bl	printf
-	ldr	r1, .L2577+20
-	ldr	r0, .L2577+24
+	ldr	r1, .L2580+20
+	ldr	r0, .L2580+24
 	bl	printf
-.L2564:
+.L2567:
 	ldr	r3, [r5, #4]
-	cbnz	r6, .L2565
-.L2576:
+	cbnz	r6, .L2568
+.L2579:
 	movs	r2, #1
 	add	r1, sp, #12
 	ldr	r0, [r5, #16]
@@ -18182,28 +18230,28 @@ FtlProgPages:
 	ldr	r2, [sp, #4]
 	mov	r3, r0
 	adds	r2, r2, #1
-	beq	.L2567
+	beq	.L2570
 	ldr	r2, [fp]
 	ldrh	r2, [r2, r0, lsl #1]
-	cbnz	r2, .L2568
+	cbnz	r2, .L2571
 	mov	r1, r0
 	str	r0, [sp, #4]
-	ldr	r0, .L2577+36
+	ldr	r0, .L2580+36
 	bl	printf
 	ldr	r3, [sp, #4]
-.L2568:
+.L2571:
 	mov	r0, r3
 	bl	decrement_vpc_count
-.L2567:
+.L2570:
 	adds	r7, r7, #1
 	adds	r5, r5, #36
-	b	.L2560
-.L2565:
+	b	.L2563
+.L2568:
 	orr	r3, r3, #-2147483648
-	b	.L2576
-.L2578:
+	b	.L2579
+.L2581:
 	.align	2
-.L2577:
+.L2580:
 	.word	.LANCHOR76
 	.word	.LANCHOR15
 	.word	.LANCHOR38
@@ -18213,7 +18261,7 @@ FtlProgPages:
 	.word	.LC7
 	.word	.LANCHOR52
 	.word	.LANCHOR138
-	.word	.LC59
+	.word	.LC60
 	.word	.LANCHOR83
 	.size	FtlProgPages, .-FtlProgPages
 	.section	.text.FtlCacheWriteBack,"ax",%progbits
@@ -18228,24 +18276,24 @@ FtlCacheWriteBack:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	ldr	r3, .L2584
+	ldr	r3, .L2587
 	ldr	r4, [r3]
-	cbnz	r4, .L2580
-	ldr	r5, .L2584+4
+	cbnz	r4, .L2583
+	ldr	r5, .L2587+4
 	ldr	r0, [r5]
-	cbz	r0, .L2580
-	ldr	r3, .L2584+8
+	cbz	r0, .L2583
+	ldr	r3, .L2587+8
 	mov	r2, r4
 	movs	r1, #1
 	ldr	r3, [r3]
 	bl	FtlProgPages
 	str	r4, [r5]
-.L2580:
+.L2583:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L2585:
+.L2588:
 	.align	2
-.L2584:
+.L2587:
 	.word	.LANCHOR76
 	.word	.LANCHOR132
 	.word	.LANCHOR231
@@ -18262,20 +18310,20 @@ FtlSysFlush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L2588
+	ldr	r3, .L2591
 	ldr	r3, [r3]
-	cbnz	r3, .L2587
+	cbnz	r3, .L2590
 	bl	FtlCacheWriteBack
 	bl	l2p_flush
 	movs	r0, #1
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L2587:
+.L2590:
 	movs	r0, #0
 	pop	{r3, pc}
-.L2589:
+.L2592:
 	.align	2
-.L2588:
+.L2591:
 	.word	.LANCHOR76
 	.size	FtlSysFlush, .-FtlSysFlush
 	.section	.text.FtlDeInit,"ax",%progbits
@@ -18290,17 +18338,17 @@ FtlDeInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L2592
+	ldr	r3, .L2595
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L2591
+	bne	.L2594
 	bl	FtlSysFlush
-.L2591:
+.L2594:
 	movs	r0, #0
 	pop	{r3, pc}
-.L2593:
+.L2596:
 	.align	2
-.L2592:
+.L2595:
 	.word	.LANCHOR232
 	.size	FtlDeInit, .-FtlDeInit
 	.section	.text.rk_ftl_de_init,"ax",%progbits
@@ -18331,28 +18379,28 @@ rk_ftl_de_init:
 ftl_discard:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2610
+	ldr	r3, .L2613
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r5, r2
 	adds	r2, r1, r2
 	mov	r6, r1
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L2603
+	bhi	.L2606
 	cmp	r5, #31
-	bhi	.L2597
-.L2598:
+	bhi	.L2600
+.L2601:
 	movs	r0, #0
-.L2595:
+.L2598:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L2597:
-	ldr	r3, .L2610+4
+.L2600:
+	ldr	r3, .L2613+4
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L2598
-	ldr	r8, .L2610+16
+	bne	.L2601
+	ldr	r8, .L2613+16
 	bl	FtlCacheWriteBack
 	mov	r0, r6
 	ldrh	r4, [r8]
@@ -18362,7 +18410,7 @@ ftl_discard:
 	mov	r7, r0
 	subs	r6, r6, r3
 	uxth	r6, r6
-	cbz	r6, .L2599
+	cbz	r6, .L2602
 	subs	r4, r4, r6
 	adds	r7, r7, #1
 	cmp	r4, r5
@@ -18370,32 +18418,32 @@ ftl_discard:
 	movcs	r4, r5
 	uxth	r4, r4
 	subs	r5, r5, r4
-.L2599:
-	ldr	r4, .L2610+8
+.L2602:
+	ldr	r4, .L2613+8
 	mov	r3, #-1
-	ldr	r6, .L2610+12
+	ldr	r6, .L2613+12
 	str	r3, [sp, #4]
-.L2600:
+.L2603:
 	ldrh	r3, [r8]
 	cmp	r5, r3
-	bcs	.L2602
-	ldr	r3, .L2610+8
+	bcs	.L2605
+	ldr	r3, .L2613+8
 	ldr	r2, [r3]
 	cmp	r2, #32
-	bls	.L2598
+	bls	.L2601
 	movs	r4, #0
 	str	r4, [r3]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L2598
-.L2602:
+	b	.L2601
+.L2605:
 	movs	r2, #0
 	mov	r1, sp
 	mov	r0, r7
 	bl	log2phys
 	ldr	r3, [sp]
 	adds	r3, r3, #1
-	beq	.L2601
+	beq	.L2604
 	ldr	r3, [r4]
 	movs	r2, #1
 	add	r1, sp, #4
@@ -18410,17 +18458,17 @@ ftl_discard:
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L2601:
+.L2604:
 	ldrh	r3, [r8]
 	adds	r7, r7, #1
 	subs	r5, r5, r3
-	b	.L2600
-.L2603:
+	b	.L2603
+.L2606:
 	mov	r0, #-1
-	b	.L2595
-.L2611:
+	b	.L2598
+.L2614:
 	.align	2
-.L2610:
+.L2613:
 	.word	.LANCHOR68
 	.word	.LANCHOR76
 	.word	.LANCHOR233
@@ -18440,56 +18488,56 @@ FtlCheckVpc:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r6, .L2636
-	ldr	r5, .L2636+4
-	ldr	r1, .L2636+8
-	ldr	r0, .L2636+12
+	ldr	r6, .L2639
+	ldr	r5, .L2639+4
+	ldr	r1, .L2639+8
+	ldr	r0, .L2639+12
 	bl	printf
 	mov	r2, #8192
 	movs	r1, #0
-	ldr	r0, .L2636+4
+	ldr	r0, .L2639+4
 	bl	memset
-.L2613:
+.L2616:
 	ldr	r3, [r6]
 	cmp	r4, r3
-	bcc	.L2615
-	ldr	r10, .L2636+56
+	bcc	.L2618
+	ldr	r10, .L2639+56
 	movs	r4, #0
-	ldr	r7, .L2636+16
+	ldr	r7, .L2639+16
 	mov	r6, r4
-.L2616:
+.L2619:
 	ldrh	r2, [r10]
 	uxth	r3, r4
 	cmp	r2, r3
-	bhi	.L2618
-	ldr	r3, .L2636+20
+	bhi	.L2621
+	ldr	r3, .L2639+20
 	ldr	r4, [r3]
-	cbz	r4, .L2619
-	ldr	r3, .L2636+24
+	cbz	r4, .L2622
+	ldr	r3, .L2639+24
 	mov	r8, #0
-	ldr	r5, .L2636+28
-	ldr	r10, .L2636+16
+	ldr	r5, .L2639+28
+	ldr	r10, .L2639+16
 	ldrh	r7, [r3]
 	ldr	r3, [r5]
-	ldr	fp, .L2636+4
+	ldr	fp, .L2639+4
 	subs	r4, r4, r3
-	ldr	r3, .L2636+32
+	ldr	r3, .L2639+32
 	asrs	r4, r4, #1
 	muls	r4, r3, r4
 	uxth	r4, r4
-.L2620:
+.L2623:
 	uxth	r3, r8
 	cmp	r7, r3
-	bls	.L2619
+	bls	.L2622
 	ldr	r3, [r10]
 	ldrh	r2, [r3, r4, lsl #1]
-	cbz	r2, .L2621
+	cbz	r2, .L2624
 	movs	r6, #1
 	ldrh	r3, [fp, r4, lsl #1]
 	mov	r1, r4
-	ldr	r0, .L2636+36
+	ldr	r0, .L2639+36
 	bl	printf
-.L2621:
+.L2624:
 	movs	r3, #6
 	ldr	r2, [r5]
 	muls	r4, r3, r4
@@ -18497,76 +18545,76 @@ FtlCheckVpc:
 	add	r8, r8, #1
 	ldrh	r4, [r2, r4]
 	cmp	r4, r3
-	bne	.L2620
-.L2619:
-	cbz	r6, .L2612
-	ldr	r1, .L2636+8
+	bne	.L2623
+.L2622:
+	cbz	r6, .L2615
+	ldr	r1, .L2639+8
 	mov	r2, #1688
-	ldr	r0, .L2636+40
+	ldr	r0, .L2639+40
 	bl	printf
-	ldr	r1, .L2636+44
-	ldr	r0, .L2636+48
+	ldr	r1, .L2639+44
+	ldr	r0, .L2639+48
 	bl	printf
-.L2612:
+.L2615:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2615:
+.L2618:
 	movs	r2, #0
 	add	r1, sp, #4
 	mov	r0, r4
 	bl	log2phys
 	ldr	r0, [sp, #4]
 	adds	r3, r0, #1
-	beq	.L2614
+	beq	.L2617
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r5, r0, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r5, r0, lsl #1]	@ movhi
-.L2614:
+.L2617:
 	adds	r4, r4, #1
-	b	.L2613
-.L2618:
+	b	.L2616
+.L2621:
 	ldr	r3, [r7]
 	uxth	r5, r4
-	ldr	r8, .L2636+4
+	ldr	r8, .L2639+4
 	ldrh	r2, [r3, r5, lsl #1]
 	ldrh	r3, [r8, r5, lsl #1]
 	cmp	r2, r3
-	beq	.L2617
+	beq	.L2620
 	mov	r1, r5
-	ldr	r0, .L2636+52
+	ldr	r0, .L2639+52
 	bl	printf
 	ldr	r3, [r7]
 	movw	r2, #65535
 	ldrh	r3, [r3, r5, lsl #1]
 	cmp	r3, r2
-	beq	.L2617
+	beq	.L2620
 	ldrh	r2, [r8, r5, lsl #1]
 	cmp	r2, r3
 	it	hi
 	movhi	r6, #1
-.L2617:
+.L2620:
 	adds	r4, r4, #1
-	b	.L2616
-.L2637:
+	b	.L2619
+.L2640:
 	.align	2
-.L2636:
+.L2639:
 	.word	.LANCHOR72
 	.word	check_valid_page_count_table
 	.word	.LANCHOR234
-	.word	.LC45
+	.word	.LC46
 	.word	.LANCHOR83
 	.word	.LANCHOR87
 	.word	.LANCHOR88
 	.word	.LANCHOR81
 	.word	-1431655765
-	.word	.LC61
+	.word	.LC62
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC60
+	.word	.LC61
 	.word	.LANCHOR40
 	.size	FtlCheckVpc, .-FtlCheckVpc
 	.section	.text.Ftlscanalldata,"ax",%progbits
@@ -18582,60 +18630,60 @@ Ftlscanalldata:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r5, #0
-	ldr	r7, .L2652
+	ldr	r7, .L2655
 	sub	sp, sp, #32
 	movs	r1, #0
-	ldr	r8, .L2652+24
-	ldr	r0, .L2652+4
+	ldr	r8, .L2655+24
+	ldr	r0, .L2655+4
 	bl	printf
-.L2639:
+.L2642:
 	ldr	r3, [r7]
 	cmp	r5, r3
-	bcc	.L2645
+	bcc	.L2648
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L2645:
+.L2648:
 	movs	r2, #0
 	add	r1, sp, #28
 	mov	r0, r5
 	bl	log2phys
 	ubfx	r3, r5, #0, #11
-	cbnz	r3, .L2640
+	cbnz	r3, .L2643
 	ldr	r2, [sp, #28]
 	mov	r1, r5
 	mov	r0, r8
 	bl	printf
-.L2640:
+.L2643:
 	ldr	r3, [sp, #28]
 	adds	r2, r3, #1
-	beq	.L2642
-	ldr	r4, .L2652+8
+	beq	.L2645
+	ldr	r4, .L2655+8
 	movs	r2, #0
 	movs	r1, #1
 	str	r3, [r4, #4]
 	mov	r0, r4
-	ldr	r3, .L2652+12
+	ldr	r3, .L2655+12
 	str	r5, [r4, #16]
 	str	r2, [r4]
 	ldr	r3, [r3]
 	str	r3, [r4, #8]
-	ldr	r3, .L2652+16
+	ldr	r3, .L2655+16
 	ldr	r6, [r3]
 	str	r6, [r4, #12]
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	cmp	r3, #256
-	beq	.L2643
+	beq	.L2646
 	adds	r3, r3, #1
-	beq	.L2643
+	beq	.L2646
 	ldr	r3, [r6, #8]
 	cmp	r5, r3
-	beq	.L2642
-.L2643:
+	beq	.L2645
+.L2646:
 	ldr	r2, [r4, #8]
 	ldr	r3, [r4, #12]
-	ldr	r0, .L2652+20
+	ldr	r0, .L2655+20
 	ldr	r1, [r2, #4]
 	str	r1, [sp, #16]
 	mov	r1, r5
@@ -18650,19 +18698,19 @@ Ftlscanalldata:
 	ldr	r2, [r4, #4]
 	ldr	r3, [r3]
 	bl	printf
-.L2642:
+.L2645:
 	adds	r5, r5, #1
-	b	.L2639
-.L2653:
+	b	.L2642
+.L2656:
 	.align	2
-.L2652:
+.L2655:
 	.word	.LANCHOR72
-	.word	.LC62
+	.word	.LC63
 	.word	.LANCHOR203
 	.word	.LANCHOR183
 	.word	.LANCHOR188
+	.word	.LC65
 	.word	.LC64
-	.word	.LC63
 	.size	Ftlscanalldata, .-Ftlscanalldata
 	.section	.text.FtlReUsePrevPpa,"ax",%progbits
 	.align	1
@@ -18677,7 +18725,7 @@ FtlReUsePrevPpa:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r6, r0
-	ldr	r5, .L2664
+	ldr	r5, .L2667
 	ubfx	r0, r1, #10, #16
 	str	r1, [sp, #4]
 	bl	P2V_block_in_plane
@@ -18685,15 +18733,15 @@ FtlReUsePrevPpa:
 	mov	r7, r0
 	ldrh	r3, [r2, r0, lsl #1]
 	cmp	r3, #0
-	bne	.L2655
-	ldr	r2, .L2664+4
+	bne	.L2658
+	ldr	r2, .L2667+4
 	ldr	r4, [r2]
 	cmp	r4, #0
-	beq	.L2656
-	ldr	r2, .L2664+8
+	beq	.L2659
+	ldr	r2, .L2667+8
 	movw	lr, #65535
-	ldr	ip, .L2664+32
-	ldr	r0, .L2664+12
+	ldr	ip, .L2667+32
+	ldr	r0, .L2667+12
 	ldr	r2, [r2]
 	ldrh	r1, [r0]
 	mov	r8, r0
@@ -18702,25 +18750,25 @@ FtlReUsePrevPpa:
 	mul	r4, ip, r4
 	mov	ip, #6
 	uxth	r4, r4
-.L2657:
+.L2660:
 	uxth	r0, r3
 	cmp	r1, r0
-	bls	.L2656
+	bls	.L2659
 	cmp	r4, r7
-	bne	.L2658
+	bne	.L2661
 	mov	r1, r4
-	ldr	r0, .L2664+4
+	ldr	r0, .L2667+4
 	bl	List_remove_node
 	ldrh	r3, [r8]
-	cbnz	r3, .L2659
-	ldr	r1, .L2664+16
+	cbnz	r3, .L2662
+	ldr	r1, .L2667+16
 	movw	r2, #2099
-	ldr	r0, .L2664+20
+	ldr	r0, .L2667+20
 	bl	printf
-	ldr	r1, .L2664+24
-	ldr	r0, .L2664+28
+	ldr	r1, .L2667+24
+	ldr	r0, .L2667+28
 	bl	printf
-.L2659:
+.L2662:
 	ldrh	r3, [r8]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -18728,17 +18776,17 @@ FtlReUsePrevPpa:
 	bl	INSERT_DATA_LIST
 	ldr	r2, [r5]
 	ldrh	r3, [r2, r7, lsl #1]
-.L2655:
+.L2658:
 	adds	r3, r3, #1
 	strh	r3, [r2, r7, lsl #1]	@ movhi
-	b	.L2656
-.L2658:
+	b	.L2659
+.L2661:
 	mul	r4, ip, r4
 	adds	r3, r3, #1
 	ldrh	r4, [r2, r4]
 	cmp	r4, lr
-	bne	.L2657
-.L2656:
+	bne	.L2660
+.L2659:
 	movs	r2, #1
 	add	r1, sp, #4
 	mov	r0, r6
@@ -18746,9 +18794,9 @@ FtlReUsePrevPpa:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L2665:
+.L2668:
 	.align	2
-.L2664:
+.L2667:
 	.word	.LANCHOR83
 	.word	.LANCHOR87
 	.word	.LANCHOR81
@@ -18776,181 +18824,181 @@ FtlRecoverySuperblock:
 	mov	r10, r0
 	sub	sp, sp, #56
 	cmp	r3, r2
-	beq	.L2827
+	beq	.L2833
 	ldrh	r3, [r0, #2]
 	str	r3, [sp, #12]
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	ldr	r1, [sp, #12]
 	str	r3, [sp, #28]
-	ldr	r3, .L2836
+	ldr	r3, .L2842
 	ldrh	r3, [r3]
 	cmp	r3, r1
 	mov	r3, #0
-	bne	.L2669
+	bne	.L2672
 	strh	r3, [r0, #4]	@ movhi
-.L2834:
+.L2840:
 	strb	r3, [r10, #6]
-.L2827:
+.L2833:
 	movs	r0, #0
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2669:
+.L2672:
 	ldrh	r0, [r0, #16]
-.L2670:
+.L2673:
 	cmp	r0, r2
 	uxth	r5, r3
 	add	r3, r3, #1
-	beq	.L2671
+	beq	.L2674
 	ldrb	r1, [r10, #8]	@ zero_extendqisi2
 	cmp	r1, #1
-	bne	.L2672
+	bne	.L2675
 	bl	FtlGetLastWrittenPage
 	adds	r6, r0, #1
 	mov	r4, r0
-	beq	.L2673
-	ldr	r3, .L2836+4
+	beq	.L2676
+	ldr	r3, .L2842+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L2751
-	ldr	r3, .L2836+8
+	bne	.L2754
+	ldr	r3, .L2842+8
 	ldrh	r5, [r3, r0, lsl #1]
-.L2674:
-	ldr	r3, .L2836+12
+.L2677:
+	ldr	r3, .L2842+12
 	movw	r8, #65535
 	mov	fp, #36
 	ldrh	ip, [r3]
-	ldr	r3, .L2836+16
+	ldr	r3, .L2842+16
 	ldr	r0, [r3]
-	ldr	r3, .L2836+20
+	ldr	r3, .L2842+20
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
-	ldr	r3, .L2836+24
+	ldr	r3, .L2842+24
 	ldrh	lr, [r3]
 	add	r3, r10, #16
 	str	r3, [sp, #20]
 	str	r3, [sp, #4]
 	movs	r3, #0
 	mov	r6, r3
-.L2675:
+.L2678:
 	uxth	r2, r3
 	cmp	ip, r2
-	bhi	.L2679
+	bhi	.L2682
 	ldrb	r3, [r10, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L2752
-	ldr	r3, .L2836+4
+	bne	.L2755
+	ldr	r3, .L2842+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	adds	r3, r3, #0
 	it	ne
 	movne	r3, #1
-.L2828:
+.L2834:
 	str	r3, [sp, #36]
 	mov	r1, r6
 	ldr	r2, [sp, #36]
 	movs	r7, #0
 	bl	FlashReadPages
-	ldr	r3, .L2836+28
+	ldr	r3, .L2842+28
 	movw	fp, #65535
-	ldr	r8, .L2836+16
+	ldr	r8, .L2842+16
 	ldr	r3, [r3]
 	subs	r3, r3, #1
 	str	r3, [sp, #4]
-.L2681:
+.L2684:
 	uxth	r3, r7
 	cmp	r6, r3
-	bhi	.L2686
-	bne	.L2684
+	bhi	.L2689
+	bne	.L2687
 	adds	r4, r4, #1
 	uxth	r3, r4
 	str	r3, [sp, #8]
 	ldr	r3, [r8]
 	ldr	r0, [r3, #4]
-.L2829:
+.L2835:
 	ubfx	r0, r0, #10, #16
 	bl	P2V_plane
 	ldrb	r3, [r10, #8]	@ zero_extendqisi2
 	str	r0, [sp, #16]
 	cmp	r3, #1
-	bne	.L2688
-	ldr	r2, .L2836+4
+	bne	.L2691
+	ldr	r2, .L2842+4
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbnz	r2, .L2688
+	cbnz	r2, .L2691
 	ldr	r1, [sp, #8]
-	ldr	r2, .L2836+8
+	ldr	r2, .L2842+8
 	ldrh	r2, [r2, r1, lsl #1]
 	str	r2, [sp, #8]
-.L2688:
-	ldr	r2, .L2836
+.L2691:
+	ldr	r2, .L2842
 	ldr	r1, [sp, #8]
 	ldrh	r2, [r2]
 	cmp	r2, r1
-	bne	.L2689
+	bne	.L2692
 	ldrh	r2, [sp, #8]
 	strh	r2, [r10, #2]	@ movhi
 	movs	r2, #0
 	strb	r2, [r10, #6]
 	strh	r2, [r10, #4]	@ movhi
-.L2689:
+.L2692:
 	ldr	r2, [sp, #8]
 	ldr	r1, [sp, #12]
 	cmp	r2, r1
-	bne	.L2690
+	bne	.L2693
 	ldr	r2, [sp, #16]
 	ldr	r1, [sp, #28]
 	cmp	r2, r1
-	bne	.L2690
-.L2835:
+	bne	.L2693
+.L2841:
 	ldr	r1, [sp, #8]
 	mov	r0, r10
 	bl	ftl_sb_update_avl_pages
-	b	.L2827
-.L2671:
+	b	.L2833
+.L2674:
 	uxth	r1, r3
 	adds	r1, r1, #8
 	ldrh	r0, [r10, r1, lsl #1]
-	b	.L2670
-.L2672:
+	b	.L2673
+.L2675:
 	movs	r1, #0
 	bl	FtlGetLastWrittenPage
 	mov	r4, r0
 	adds	r0, r0, #1
-	beq	.L2673
-.L2751:
+	beq	.L2676
+.L2754:
 	mov	r5, r4
-	b	.L2674
-.L2673:
+	b	.L2677
+.L2676:
 	ldr	r3, [sp, #12]
-	cbz	r3, .L2676
-	ldr	r1, .L2836+32
+	cbz	r3, .L2679
+	ldr	r1, .L2842+32
 	movw	r2, #2170
-	ldr	r0, .L2836+36
+	ldr	r0, .L2842+36
 	bl	printf
-	ldr	r1, .L2836+40
-	ldr	r0, .L2836+44
+	ldr	r1, .L2842+40
+	ldr	r0, .L2842+44
 	bl	printf
-.L2676:
+.L2679:
 	ldr	r3, [sp, #28]
-	cbz	r3, .L2677
+	cbz	r3, .L2680
 	cmp	r5, r3
-	beq	.L2677
-	ldr	r1, .L2836+32
+	beq	.L2680
+	ldr	r1, .L2842+32
 	movw	r2, #2171
-	ldr	r0, .L2836+36
+	ldr	r0, .L2842+36
 	bl	printf
-	ldr	r1, .L2836+40
-	ldr	r0, .L2836+44
+	ldr	r1, .L2842+40
+	ldr	r0, .L2842+44
 	bl	printf
-.L2677:
+.L2680:
 	movs	r3, #0
 	strh	r3, [r10, #2]	@ movhi
-	b	.L2834
-.L2679:
+	b	.L2840
+.L2682:
 	ldr	r1, [sp, #4]
 	ldrh	r2, [r1], #2
 	cmp	r2, r8
 	str	r1, [sp, #4]
-	beq	.L2678
+	beq	.L2681
 	mla	r1, fp, r6, r0
 	orr	r2, r5, r2, lsl #10
 	str	r2, [r1, #4]
@@ -18964,36 +19012,36 @@ FtlRecoverySuperblock:
 	ldr	r2, [sp, #8]
 	add	r7, r7, r2
 	str	r7, [r1, #12]
-.L2678:
+.L2681:
 	adds	r3, r3, #1
-	b	.L2675
-.L2752:
+	b	.L2678
+.L2755:
 	movs	r3, #0
-	b	.L2828
-.L2686:
+	b	.L2834
+.L2689:
 	movs	r3, #36
 	ldr	r1, [r8]
 	muls	r3, r7, r3
 	adds	r2, r1, r3
 	ldr	r3, [r1, r3]
-	cbnz	r3, .L2682
+	cbnz	r3, .L2685
 	ldr	r2, [r2, #12]
 	ldr	r3, [r2, #4]
 	adds	r1, r3, #1
-	beq	.L2683
-	ldr	r1, .L2836+28
+	beq	.L2686
+	ldr	r1, .L2842+28
 	mov	r0, r3
 	ldr	r1, [r1]
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L2683
-	ldr	r1, .L2836+28
+	cbz	r0, .L2686
+	ldr	r1, .L2842+28
 	adds	r3, r3, #1
 	str	r3, [r1]
-.L2683:
+.L2686:
 	ldr	r3, [r2]
 	adds	r3, r3, #1
-	bne	.L2685
-.L2684:
+	bne	.L2688
+.L2687:
 	uxth	r3, r4
 	uxth	r7, r7
 	str	r3, [sp, #8]
@@ -19001,26 +19049,26 @@ FtlRecoverySuperblock:
 	ldr	r3, [r8]
 	mla	r7, r2, r7, r3
 	ldr	r0, [r7, #4]
-	b	.L2829
-.L2682:
+	b	.L2835
+.L2685:
 	ldr	r1, [r2, #4]
 	uxth	fp, r5
-	ldr	r0, .L2836+48
+	ldr	r0, .L2842+48
 	bl	printf
 	ldrh	r2, [r10]
-	ldr	r3, .L2836+52
+	ldr	r3, .L2842+52
 	strh	r2, [r3]	@ movhi
-.L2685:
+.L2688:
 	adds	r7, r7, #1
-	b	.L2681
-.L2690:
+	b	.L2684
+.L2693:
 	movw	r2, #65535
 	cmp	fp, r2
-	bne	.L2691
+	bne	.L2694
 	cmp	r3, #0
-	bne	.L2692
-.L2691:
-	ldr	r3, .L2836+56
+	bne	.L2695
+.L2694:
+	ldr	r3, .L2842+56
 	uxth	fp, r5
 	uxth	r5, r5
 	mov	r7, #-1
@@ -19039,63 +19087,63 @@ FtlRecoverySuperblock:
 	subgt	r4, fp, #7
 	ldrle	r4, [sp, #12]
 	uxthgt	r4, r4
-.L2695:
+.L2698:
 	cmp	r4, fp
-	bhi	.L2710
-	ldr	r3, .L2836+12
+	bhi	.L2713
+	ldr	r3, .L2842+12
 	movw	lr, #65535
 	mov	ip, #36
 	ldrh	r8, [r3]
-	ldr	r3, .L2836+16
+	ldr	r3, .L2842+16
 	ldr	r0, [r3]
 	ldr	r3, [sp, #20]
 	str	r3, [sp, #32]
 	movs	r3, #0
 	mov	r5, r3
-	b	.L2711
-.L2697:
+	b	.L2714
+.L2700:
 	ldr	r1, [sp, #32]
 	ldrh	r2, [r1], #2
 	cmp	r2, lr
 	str	r1, [sp, #32]
-	beq	.L2696
+	beq	.L2699
 	mla	r1, ip, r5, r0
 	adds	r5, r5, #1
 	orr	r2, r4, r2, lsl #10
 	uxth	r5, r5
 	str	r2, [r1, #4]
-.L2696:
+.L2699:
 	adds	r3, r3, #1
-.L2711:
+.L2714:
 	uxth	r2, r3
 	cmp	r8, r2
-	bhi	.L2697
+	bhi	.L2700
 	mov	r1, r5
 	ldr	r2, [sp, #36]
 	bl	FlashReadPages
-	ldr	r2, .L2836+4
+	ldr	r2, .L2842+4
 	movs	r1, #36
-	ldr	r3, .L2836+56
+	ldr	r3, .L2842+56
 	movs	r0, #0
 	movw	ip, #65535
 	ldrb	lr, [r2]	@ zero_extendqisi2
-	ldr	r2, .L2836+16
+	ldr	r2, .L2842+16
 	ldr	r3, [r3]
 	ldr	r2, [r2]
 	mla	r5, r1, r5, r2
-.L2698:
+.L2701:
 	cmp	r5, r2
-	bne	.L2708
-	cbz	r0, .L2709
-	ldr	r2, .L2836+56
+	bne	.L2711
+	cbz	r0, .L2712
+	ldr	r2, .L2842+56
 	str	r3, [r2]
-.L2709:
+.L2712:
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L2695
-.L2837:
+	b	.L2698
+.L2843:
 	.align	2
-.L2836:
+.L2842:
 	.word	.LANCHOR52
 	.word	.LANCHOR15
 	.word	.LANCHOR16
@@ -19108,124 +19156,124 @@ FtlRecoverySuperblock:
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC65
+	.word	.LC66
 	.word	.LANCHOR237
 	.word	.LANCHOR136
-.L2708:
+.L2711:
 	ldr	r1, [r2]
-	cbnz	r1, .L2699
+	cbnz	r1, .L2702
 	ldr	r1, [r2, #12]
 	ldrh	r8, [r1]
 	cmp	r8, ip
-	beq	.L2755
+	beq	.L2758
 	ldr	r1, [r1, #4]
 	cmp	r1, #-1
-	beq	.L2755
+	beq	.L2758
 	adds	r0, r7, #1
-	bne	.L2757
-	ldr	r0, .L2838
+	bne	.L2760
+	ldr	r0, .L2844
 	ldrh	r0, [r0, r4, lsl #1]
 	cmp	r0, ip
-	bne	.L2701
+	bne	.L2704
 	cmp	lr, #0
-	beq	.L2757
-.L2701:
+	beq	.L2760
+.L2704:
 	ldr	r0, [sp, #4]
 	cmp	r0, r3
 	it	ne
 	movne	r7, r3
-.L2757:
+.L2760:
 	movs	r0, #1
-	b	.L2700
-.L2699:
-	cbz	r0, .L2702
-	ldr	r2, .L2838+4
-	str	r3, [r2]
+	b	.L2703
 .L2702:
-	ldr	r3, .L2838+8
+	cbz	r0, .L2705
+	ldr	r2, .L2844+4
+	str	r3, [r2]
+.L2705:
+	ldr	r3, .L2844+8
 	ldrh	r2, [r10]
 	strh	r2, [r3]	@ movhi
 	ldrb	r3, [r10, #8]	@ zero_extendqisi2
-	cbnz	r3, .L2692
-	ldr	r3, .L2838
+	cbnz	r3, .L2695
+	ldr	r3, .L2844
 	ldrh	r2, [r3, r4, lsl #1]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L2704
+	bne	.L2707
 	adds	r1, r7, #1
-	ldr	r3, .L2838+4
-	beq	.L2705
+	ldr	r3, .L2844+4
+	beq	.L2708
 	str	r7, [r3]
-.L2692:
+.L2695:
 	ldr	fp, [sp, #12]
 	movs	r2, #1
-	ldr	r6, .L2838+12
-	ldr	r3, .L2838+16
+	ldr	r6, .L2844+12
+	ldr	r3, .L2844+16
 	strh	r2, [r3]	@ movhi
-.L2712:
-	ldr	r3, .L2838+20
+.L2715:
+	ldr	r3, .L2844+20
 	movw	ip, #65535
 	ldr	r0, [r6]
 	mov	lr, #36
 	ldr	r1, [sp, #20]
 	movs	r2, #0
 	ldrh	r5, [r3]
-	ldr	r3, .L2838+24
+	ldr	r3, .L2844+24
 	str	r2, [sp, #24]
 	ldrb	r7, [r3]	@ zero_extendqisi2
-.L2713:
+.L2716:
 	uxth	r3, r2
 	cmp	r3, r5
-	bcc	.L2716
+	bcc	.L2719
 	ldr	r2, [sp, #36]
 	ldr	r1, [sp, #24]
 	bl	FlashReadPages
 	movs	r3, #0
-.L2833:
+.L2839:
 	str	r3, [sp, #32]
 	ldr	r2, [sp, #24]
 	ldrh	r3, [sp, #32]
 	cmp	r2, r3
-	bhi	.L2745
+	bhi	.L2748
 	ldrb	r3, [r10, #8]	@ zero_extendqisi2
 	add	fp, fp, #1
 	uxth	fp, fp
 	cmp	r3, #1
-	bne	.L2746
-	ldr	r3, .L2838+24
+	bne	.L2749
+	ldr	r3, .L2844+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2746
-	ldr	r3, .L2838+28
+	cbz	r3, .L2749
+	ldr	r3, .L2844+28
 	ldrh	r3, [r3]
 	cmp	r3, fp
-	bne	.L2746
+	bne	.L2749
 	ldr	r3, [sp, #8]
 	cmp	r3, fp
-	beq	.L2721
-.L2746:
-	ldr	r3, .L2838+32
+	beq	.L2724
+.L2749:
+	ldr	r3, .L2844+32
 	ldrh	r3, [r3]
 	cmp	r3, fp
-	bne	.L2712
-	ldr	r2, .L2838+20
+	bne	.L2715
+	ldr	r2, .L2844+20
 	movw	r0, #65535
 	movs	r3, #0
 	strh	fp, [r10, #2]	@ movhi
 	strh	r3, [r10, #4]	@ movhi
 	ldrh	r2, [r2]
-.L2747:
+.L2750:
 	uxth	r1, r3
 	cmp	r1, r2
-	bcs	.L2827
+	bcs	.L2833
 	ldr	r1, [sp, #20]
 	ldrh	r4, [r1], #2
 	cmp	r4, r0
 	str	r1, [sp, #20]
 	add	r1, r3, #1
-	bne	.L2834
+	bne	.L2840
 	mov	r3, r1
-	b	.L2747
-.L2705:
+	b	.L2750
+.L2708:
 	ldr	r2, [sp, #4]
 	ldr	r1, [sp, #24]
 	cmp	r2, r1
@@ -19233,62 +19281,62 @@ FtlRecoverySuperblock:
 	ldreq	r2, [r3]
 	movne	r2, r1
 	addeq	r2, r2, #-1
-.L2830:
+.L2836:
 	str	r2, [r3]
-	b	.L2692
-.L2704:
+	b	.L2695
+.L2707:
 	ldr	r3, [sp, #4]
 	cmp	r6, r3
-	beq	.L2707
+	beq	.L2710
 	adds	r2, r6, #1
-	beq	.L2692
-	ldr	r3, .L2838+4
+	beq	.L2695
+	ldr	r3, .L2844+4
 	str	r6, [r3]
-	b	.L2692
-.L2707:
-	ldr	r2, .L2838+4
+	b	.L2695
+.L2710:
+	ldr	r2, .L2844+4
 	ldr	r1, [sp, #4]
 	ldr	r3, [r2]
 	cmp	r1, r3
-	beq	.L2692
+	beq	.L2695
 	subs	r3, r3, #1
 	str	r3, [r2]
-	b	.L2692
-.L2755:
+	b	.L2695
+.L2758:
 	mov	r1, r3
 	mov	r3, r6
-.L2700:
+.L2703:
 	mov	r6, r3
 	adds	r2, r2, #36
 	mov	r3, r1
-	b	.L2698
-.L2710:
+	b	.L2701
+.L2713:
 	mov	r2, #-1
-	ldr	r3, .L2838+4
-	b	.L2830
-.L2716:
+	ldr	r3, .L2844+4
+	b	.L2836
+.L2719:
 	ldrh	r3, [r1], #2
 	cmp	r3, ip
-	beq	.L2714
+	beq	.L2717
 	ldr	r4, [sp, #24]
 	orr	r3, fp, r3, lsl #10
 	mla	r4, lr, r4, r0
 	str	r3, [r4, #4]
 	ldrb	r8, [r10, #8]	@ zero_extendqisi2
 	cmp	r8, #1
-	bne	.L2715
-	cbz	r7, .L2715
+	bne	.L2718
+	cbz	r7, .L2718
 	orr	r3, r3, #-2147483648
 	str	r3, [r4, #4]
-.L2715:
+.L2718:
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	str	r3, [sp, #24]
-.L2714:
+.L2717:
 	adds	r2, r2, #1
-	b	.L2713
-.L2745:
+	b	.L2716
+.L2748:
 	ldr	r3, [sp, #32]
 	movs	r5, #36
 	ldr	r8, [r6]
@@ -19300,45 +19348,45 @@ FtlRecoverySuperblock:
 	bl	P2V_plane
 	ldr	r3, [sp, #12]
 	cmp	fp, r3
-	bcc	.L2718
-	bne	.L2719
+	bcc	.L2721
+	bne	.L2722
 	ldr	r3, [sp, #28]
 	cmp	r3, r0
-	bhi	.L2718
-.L2719:
+	bhi	.L2721
+.L2722:
 	ldr	r3, [sp, #8]
 	cmp	fp, r3
-	bne	.L2720
+	bne	.L2723
 	ldr	r3, [sp, #16]
 	cmp	r3, r0
-	beq	.L2721
-.L2720:
+	beq	.L2724
+.L2723:
 	ldr	r3, [r8, r5]
 	adds	r3, r3, #1
-	beq	.L2722
+	beq	.L2725
 	ldr	r3, [r7, #12]
 	movw	r2, #61589
 	ldrh	r1, [r3]
 	cmp	r1, r2
-	beq	.L2723
+	beq	.L2726
 	ldrh	r0, [r10]
-.L2831:
+.L2837:
 	bl	decrement_vpc_count
-	b	.L2718
-.L2723:
+	b	.L2721
+.L2726:
 	ldr	r2, [r3, #4]
 	str	r2, [sp, #4]
 	adds	r2, r2, #1
-	beq	.L2724
-	ldr	r2, .L2838+36
+	beq	.L2727
+	ldr	r2, .L2844+36
 	ldr	r0, [sp, #4]
 	ldr	r1, [r2]
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L2724
+	cbz	r0, .L2727
 	ldr	r1, [sp, #4]
 	adds	r1, r1, #1
 	str	r1, [r2]
-.L2724:
+.L2727:
 	ldr	r4, [r3, #8]
 	add	r1, sp, #48
 	ldr	r3, [r3, #12]
@@ -19346,17 +19394,17 @@ FtlRecoverySuperblock:
 	mov	r0, r4
 	str	r3, [sp, #44]
 	bl	log2phys
-	ldr	r3, .L2838+4
+	ldr	r3, .L2844+4
 	ldr	r1, [r3]
 	adds	r3, r1, #1
-	beq	.L2725
+	beq	.L2728
 	ldr	r0, [sp, #4]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L2725
+	beq	.L2728
 	ldr	r3, [sp, #44]
 	adds	r7, r3, #1
-	beq	.L2726
+	beq	.L2729
 	ldr	r0, [r6]
 	movs	r2, #0
 	movs	r1, #1
@@ -19368,73 +19416,73 @@ FtlRecoverySuperblock:
 	ldr	r1, [r2, r5]
 	adds	r3, r2, r5
 	adds	r1, r1, #1
-	bne	.L2727
-.L2728:
+	bne	.L2730
+.L2731:
 	mov	r3, #-1
 	str	r3, [sp, #44]
-.L2735:
+.L2738:
 	ldr	r7, [sp, #44]
 	adds	r0, r7, #1
-	beq	.L2718
-.L2750:
+	beq	.L2721
+.L2753:
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L2838+40
+	ldr	r3, .L2844+40
 	mov	r4, r0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bhi	.L2741
-	ldr	r1, .L2838+44
-	movw	r2, #2458
-	ldr	r0, .L2838+48
+	bhi	.L2744
+	ldr	r1, .L2844+44
+	movw	r2, #2457
+	ldr	r0, .L2844+48
 	bl	printf
-	ldr	r1, .L2838+52
-	ldr	r0, .L2838+56
+	ldr	r1, .L2844+52
+	ldr	r0, .L2844+56
 	bl	printf
-.L2741:
-	ldr	r3, .L2838+60
+.L2744:
+	ldr	r3, .L2844+60
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
 	cmp	r3, #0
-	beq	.L2742
+	beq	.L2745
 	mov	r0, r4
-	b	.L2831
-.L2726:
+	b	.L2837
+.L2729:
 	ldr	r3, [sp, #52]
 	ldr	r2, [sp, #48]
 	cmp	r2, r3
-	bne	.L2718
+	bne	.L2721
 	movs	r2, #1
 	add	r1, sp, #44
 	mov	r0, r4
 	bl	log2phys
-.L2718:
+.L2721:
 	ldr	r3, [sp, #32]
 	adds	r3, r3, #1
-	b	.L2833
-.L2727:
+	b	.L2839
+.L2730:
 	ldr	r1, [r7, #8]
 	cmp	r4, r1
-	bne	.L2728
+	bne	.L2731
 	ldr	r8, [r7, #4]
-	ldr	r0, .L2838+4
+	ldr	r0, .L2844+4
 	mov	r1, r8
 	ldr	r0, [r0]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L2728
+	beq	.L2731
 	ldr	r1, [sp, #48]
 	ldr	r0, [sp, #52]
 	cmp	r1, r0
-	bne	.L2730
-.L2733:
+	bne	.L2733
+.L2736:
 	ldr	r1, [sp, #44]
 	mov	r0, r4
 	bl	FtlReUsePrevPpa
-	b	.L2728
-.L2839:
+	b	.L2731
+.L2845:
 	.align	2
-.L2838:
+.L2844:
 	.word	.LANCHOR120
 	.word	.LANCHOR136
 	.word	.LANCHOR237
@@ -19451,77 +19499,78 @@ FtlRecoverySuperblock:
 	.word	.LC6
 	.word	.LC7
 	.word	.LANCHOR83
-.L2730:
+.L2733:
 	ldr	r0, [sp, #44]
 	cmp	r1, r0
-	beq	.L2728
-	adds	r0, r1, #1
 	beq	.L2731
+	adds	r0, r1, #1
+	beq	.L2734
 	str	r1, [r3, #4]
 	movs	r2, #0
 	movs	r1, #1
 	mov	r0, r3
 	ldr	r7, [r3, #12]
 	bl	FlashReadPages
-.L2732:
+.L2735:
 	ldr	r3, [r6]
 	ldr	r3, [r3, r5]
 	adds	r3, r3, #1
-	beq	.L2733
+	beq	.L2736
 	ldr	r3, [r7, #4]
-	ldr	r2, .L2840
+	ldr	r2, .L2846
 	mov	r1, r3
 	ldr	r0, [r2]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L2733
+	beq	.L2736
 	mov	r1, r3
 	mov	r0, r8
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L2728
-	b	.L2733
-.L2731:
+	beq	.L2731
+	b	.L2736
+.L2734:
 	str	r1, [r2, r5]
-	b	.L2732
-.L2725:
+	b	.L2735
+.L2728:
 	ldr	r3, [sp, #52]
 	ldr	r2, [sp, #48]
 	cmp	r2, r3
-	beq	.L2735
-	ldr	r2, .L2840+4
+	beq	.L2738
 	ldr	r3, [sp, #44]
+	adds	r7, r3, #1
+	beq	.L2740
+	ldr	r2, .L2846+4
+	ubfx	r3, r3, #10, #21
 	ldr	r2, [r2]
-	cmp	r2, r3, lsr #10
-	bhi	.L2737
-	adds	r3, r3, #1
-	bne	.L2718
-.L2737:
+	cmp	r3, r2
+	bcs	.L2721
+.L2740:
 	movs	r2, #1
 	add	r1, sp, #52
 	mov	r0, r4
 	bl	log2phys
 	ldr	r7, [sp, #48]
 	adds	r5, r7, #1
-	beq	.L2735
+	beq	.L2738
 	ldr	r3, [sp, #44]
 	cmp	r7, r3
-	beq	.L2750
+	beq	.L2753
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L2840+8
+	ldr	r3, .L2846+8
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L2740
-	ldr	r3, .L2840+12
+	beq	.L2743
+	ldr	r3, .L2846+12
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L2740
-	ldr	r3, .L2840+16
+	beq	.L2743
+	ldr	r3, .L2846+16
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L2735
-.L2740:
+	bne	.L2738
+.L2743:
 	ldr	r0, [r6]
 	movs	r2, #0
 	movs	r1, #1
@@ -19531,74 +19580,74 @@ FtlRecoverySuperblock:
 	ldr	r3, [r6]
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L2735
+	beq	.L2738
 	ldr	r1, [r5, #4]
 	ldr	r0, [sp, #4]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	bne	.L2735
+	bne	.L2738
 	movs	r2, #1
 	add	r1, sp, #48
 	mov	r0, r4
 	bl	log2phys
-	b	.L2735
-.L2742:
+	b	.L2738
+.L2745:
 	mov	r1, r4
-	ldr	r0, .L2840+20
+	ldr	r0, .L2846+20
 	bl	printf
-	b	.L2718
-.L2722:
+	b	.L2721
+.L2725:
 	ldrh	r3, [r10]
 	mov	r1, r4
-	ldr	r2, .L2840+24
-	ldr	r0, .L2840+28
+	ldr	r2, .L2846+24
+	ldr	r0, .L2846+28
 	strh	r3, [r2]	@ movhi
 	ldr	r2, [sp, #4]
 	bl	printf
-	ldr	r2, .L2840+32
+	ldr	r2, .L2846+32
 	ldr	r3, [r2]
 	cmp	r3, #31
-	bhi	.L2743
+	bhi	.L2746
 	ldr	r0, [sp, #52]
-	ldr	r1, .L2840+36
+	ldr	r1, .L2846+36
 	str	r0, [r1, r3, lsl #2]
 	adds	r3, r3, #1
 	str	r3, [r2]
-.L2743:
+.L2746:
 	ldrh	r0, [r10]
 	bl	decrement_vpc_count
-	ldr	r3, .L2840
+	ldr	r3, .L2846
 	ldr	r2, [r3]
 	adds	r1, r2, #1
-	bne	.L2744
+	bne	.L2747
 	ldr	r2, [sp, #4]
-.L2832:
+.L2838:
 	str	r2, [r3]
-	b	.L2718
-.L2744:
+	b	.L2721
+.L2747:
 	ldr	r1, [sp, #4]
 	cmp	r1, r2
-	bcs	.L2718
+	bcs	.L2721
 	mov	r2, r1
-	b	.L2832
-.L2721:
+	b	.L2838
+.L2724:
 	ldrb	r3, [sp, #16]	@ zero_extendqisi2
 	ldr	r2, [sp, #16]
 	strb	r3, [r10, #6]
 	ldrh	r3, [sp, #8]
 	strh	r3, [r10, #2]	@ movhi
-	b	.L2835
-.L2841:
+	b	.L2841
+.L2847:
 	.align	2
-.L2840:
+.L2846:
 	.word	.LANCHOR136
 	.word	.LANCHOR43
 	.word	.LANCHOR91
 	.word	.LANCHOR92
 	.word	.LANCHOR93
-	.word	.LC66
-	.word	.LANCHOR237
 	.word	.LC67
+	.word	.LANCHOR237
+	.word	.LC68
 	.word	.LANCHOR239
 	.word	.LANCHOR240
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
@@ -19613,77 +19662,77 @@ FtlRecoverySuperblock:
 FtlGcScanTempBlk:
 	@ args = 0, pretend = 0, frame = 64
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2881
+	ldr	r3, .L2887
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	sub	sp, sp, #64
 	ldrh	r5, [r3]
 	movw	r3, #65535
 	cmp	r5, r3
-	beq	.L2868
-	cbnz	r5, .L2843
-.L2844:
+	beq	.L2874
+	cbnz	r5, .L2849
+.L2850:
 	bl	FtlGcPageVarInit
-	b	.L2845
-.L2868:
+	b	.L2851
+.L2874:
 	movs	r5, #0
-.L2843:
-	ldr	r3, .L2881+4
+.L2849:
+	ldr	r3, .L2887+4
 	ldrh	r3, [r3]
 	cmp	r3, r1
-	beq	.L2844
-.L2845:
-	ldr	r8, .L2881+76
+	beq	.L2850
+.L2851:
+	ldr	r8, .L2887+76
 	mov	r3, #-1
 	str	r3, [sp, #8]
-.L2846:
+.L2852:
 	ldrh	r2, [r4]
 	movs	r3, #0
 	strb	r3, [r4, #8]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2847
-.L2867:
-	ldr	r3, .L2881+8
+	beq	.L2853
+.L2873:
+	ldr	r3, .L2887+8
 	movs	r2, #0
 	ldr	r0, [r8]
 	mov	fp, r2
 	movw	ip, #65535
 	mov	lr, #36
 	ldrh	r10, [r3]
-	ldr	r3, .L2881+12
+	ldr	r3, .L2887+12
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L2881+16
+	ldr	r3, .L2887+16
 	ldrh	r3, [r3]
 	str	r3, [sp, #16]
-	ldr	r3, .L2881+20
+	ldr	r3, .L2887+20
 	ldr	r3, [r3]
 	str	r3, [sp, #20]
-	ldr	r3, .L2881+24
+	ldr	r3, .L2887+24
 	ldrh	r7, [r3]
 	add	r3, r4, #16
 	str	r3, [sp, #4]
-.L2848:
+.L2854:
 	uxth	r3, r2
 	cmp	r10, r3
-	bhi	.L2850
+	bhi	.L2856
 	mov	r10, #0
 	movs	r2, #0
 	mov	r1, fp
 	bl	FlashReadPages
-.L2851:
+.L2857:
 	uxth	r3, r10
 	cmp	fp, r3
-	bhi	.L2866
-	ldr	r3, .L2881+4
+	bhi	.L2872
+	ldr	r3, .L2887+4
 	adds	r5, r5, #1
 	uxth	r5, r5
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	bhi	.L2867
-.L2847:
-	ldr	r3, .L2881
+	bhi	.L2873
+.L2853:
+	ldr	r3, .L2887
 	movw	r2, #65535
 	mov	r0, r4
 	strh	r5, [r4, #2]	@ movhi
@@ -19696,12 +19745,12 @@ FtlGcScanTempBlk:
 	add	sp, sp, #64
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2850:
+.L2856:
 	ldr	r1, [sp, #4]
 	ldrh	r3, [r1], #2
 	cmp	r3, ip
 	str	r1, [sp, #4]
-	beq	.L2849
+	beq	.L2855
 	mla	r1, lr, fp, r0
 	ldr	r6, [sp, #12]
 	orr	r3, r5, r3, lsl #10
@@ -19718,10 +19767,10 @@ FtlGcScanTempBlk:
 	str	r3, [r1, #12]
 	add	r3, fp, #1
 	uxth	fp, r3
-.L2849:
+.L2855:
 	adds	r2, r2, #1
-	b	.L2848
-.L2866:
+	b	.L2854
+.L2872:
 	movs	r7, #36
 	ldr	r2, [r8]
 	mul	r7, r7, r10
@@ -19731,44 +19780,44 @@ FtlGcScanTempBlk:
 	ldr	r3, [r3, #12]
 	str	r1, [sp, #4]
 	cmp	r6, #0
-	bne	.L2852
+	bne	.L2858
 	ldrh	r1, [r3]
 	movw	r2, #65535
 	cmp	r1, r2
-	beq	.L2880
-	ldr	r2, .L2881+28
+	beq	.L2886
+	ldr	r2, .L2887+28
 	ldr	r0, [r3, #8]
 	ldr	r2, [r2]
 	cmp	r0, r2
-	bls	.L2854
-.L2880:
-	ldr	r3, .L2881+32
+	bls	.L2860
+.L2886:
+	ldr	r3, .L2887+32
 	movs	r1, #0
 	ldrh	r2, [r4]
 	ldr	r3, [r3]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
 	ldrh	r0, [r4]
 	bl	INSERT_FREE_LIST
-	ldr	r2, .L2881+36
+	ldr	r2, .L2887+36
 	movw	r3, #65535
 	strh	r3, [r4]	@ movhi
 	strh	r3, [r2]	@ movhi
-.L2879:
+.L2885:
 	bl	FtlGcPageVarInit
 	movs	r5, #0
-	b	.L2846
-.L2854:
-	ldr	r2, .L2881+40
+	b	.L2852
+.L2860:
+	ldr	r2, .L2887+40
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbnz	r2, .L2856
-.L2857:
+	cbnz	r2, .L2862
+.L2863:
 	ldr	r2, [r3, #8]
 	add	r10, r10, #1
 	ldr	r1, [sp, #4]
 	ldr	r0, [r3, #12]
 	bl	FtlGcUpdatePage
-	b	.L2851
-.L2856:
+	b	.L2857
+.L2862:
 	mov	r2, r6
 	add	r1, sp, #24
 	str	r3, [sp, #12]
@@ -19777,73 +19826,73 @@ FtlGcScanTempBlk:
 	ldr	r1, [sp, #24]
 	ldr	r2, [r3, #12]
 	cmp	r2, r1
-	bne	.L2857
+	bne	.L2863
 	adds	r1, r2, #1
-	beq	.L2857
+	beq	.L2863
 	str	r2, [sp, #32]
 	movs	r1, #1
-	ldr	r2, .L2881+44
+	ldr	r2, .L2887+44
 	add	r0, sp, #28
 	ldr	r2, [r2]
 	str	r2, [sp, #36]
-	ldr	r2, .L2881+48
+	ldr	r2, .L2887+48
 	ldr	r2, [r2]
 	str	r2, [sp, #40]
 	mov	r2, r6
 	bl	FlashReadPages
-	ldr	r2, .L2881+52
+	ldr	r2, .L2887+52
 	ldr	r1, [r8]
 	ldr	r0, [sp, #36]
 	ldrh	r2, [r2]
 	ldr	r3, [sp, #12]
 	add	r7, r7, r1
 	lsl	ip, r2, #7
-.L2858:
+.L2864:
 	cmp	r6, ip
-	beq	.L2857
+	beq	.L2863
 	ldr	r1, [r7, #8]
 	ldr	r2, [r0, r6, lsl #2]
 	ldr	r1, [r1, r6, lsl #2]
 	cmp	r1, r2
-	beq	.L2859
+	beq	.L2865
 	ldr	r2, [sp, #32]
 	ldrh	r1, [r4]
-	ldr	r0, .L2881+56
+	ldr	r0, .L2887+56
 	bl	printf
-	b	.L2880
-.L2859:
+	b	.L2886
+.L2865:
 	adds	r6, r6, #1
-	b	.L2858
-.L2852:
+	b	.L2864
+.L2858:
 	ldr	r2, [sp, #4]
 	ldrh	r1, [r4]
-	ldr	r0, .L2881+60
+	ldr	r0, .L2887+60
 	bl	printf
-	ldr	r3, .L2881+64
+	ldr	r3, .L2887+64
 	ldrh	r2, [r4]
 	ldr	r3, [r3]
-	cbnz	r3, .L2862
-	ldr	r3, .L2881+68
+	cbnz	r3, .L2868
+	ldr	r3, .L2887+68
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2863
-.L2862:
-	ldr	r3, .L2881+72
+	cbz	r3, .L2869
+.L2868:
+	ldr	r3, .L2887+72
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r2, lsl #1]
 	cmp	r3, #159
-	bls	.L2864
-.L2863:
+	bls	.L2870
+.L2869:
 	ldr	r3, [r8]
 	ldr	r3, [r3, r7]
 	adds	r3, r3, #1
-	bne	.L2865
-.L2864:
+	bne	.L2871
+.L2870:
 	ldr	r3, [r8]
 	add	r7, r7, r3
 	ldr	r3, [r7, #4]
 	str	r3, [sp, #8]
-.L2865:
-	ldr	r3, .L2881+32
+.L2871:
+	ldr	r3, .L2887+32
 	movs	r1, #0
 	ldr	r3, [r3]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
@@ -19851,10 +19900,10 @@ FtlGcScanTempBlk:
 	bl	INSERT_FREE_LIST
 	movw	r3, #65535
 	strh	r3, [r4]	@ movhi
-	b	.L2879
-.L2882:
+	b	.L2885
+.L2888:
 	.align	2
-.L2881:
+.L2887:
 	.word	.LANCHOR241
 	.word	.LANCHOR52
 	.word	.LANCHOR38
@@ -19869,8 +19918,8 @@ FtlGcScanTempBlk:
 	.word	.LANCHOR187
 	.word	.LANCHOR189
 	.word	.LANCHOR55
-	.word	.LC68
 	.word	.LC69
+	.word	.LC70
 	.word	.LANCHOR28
 	.word	.LANCHOR15
 	.word	.LANCHOR78
@@ -19888,42 +19937,42 @@ FtlGcFreeTempBlock:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L2907
+	ldr	r3, .L2913
 	ldr	r3, [r3]
-	cbz	r3, .L2884
-.L2889:
+	cbz	r3, .L2890
+.L2895:
 	movs	r0, #0
-.L2883:
+.L2889:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2884:
-	ldr	r0, .L2907+4
+.L2890:
+	ldr	r0, .L2913+4
 	movw	r3, #65535
-	ldr	r5, .L2907+8
+	ldr	r5, .L2913+8
 	ldrh	r6, [r0]
 	mov	r4, r0
 	cmp	r6, r3
-	beq	.L2886
-	ldr	r3, .L2907+12
+	beq	.L2892
+	ldr	r3, .L2913+12
 	ldrh	r1, [r3]
 	bl	FtlGcScanTempBlk
 	str	r0, [sp, #12]
 	adds	r0, r0, #1
-	beq	.L2886
-	ldr	r3, .L2907+16
+	beq	.L2892
+	ldr	r3, .L2913+16
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r6, lsl #1]
 	cmp	r3, #4
-	bls	.L2887
+	bls	.L2893
 	subs	r3, r3, #5
 	movs	r0, #1
 	strh	r3, [r2, r6, lsl #1]	@ movhi
 	bl	FtlEctTblFlush
-.L2887:
+.L2893:
 	ldr	r3, [r5]
-	cbnz	r3, .L2888
-	ldr	r2, .L2907+20
+	cbnz	r3, .L2894
+	ldr	r2, .L2913+20
 	ldr	r0, [sp, #12]
 	ldr	r3, [r2, #96]
 	ubfx	r0, r0, #10, #16
@@ -19931,72 +19980,72 @@ FtlGcFreeTempBlock:
 	str	r3, [r2, #96]
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
-.L2888:
+.L2894:
 	movs	r3, #0
 	movs	r0, #1
 	str	r3, [r5]
-	b	.L2883
-.L2886:
+	b	.L2889
+.L2892:
 	ldrh	r2, [r4]
 	movs	r3, #0
 	str	r3, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2889
-	ldr	r6, .L2907+12
+	beq	.L2895
+	ldr	r6, .L2913+12
 	bl	FtlCacheWriteBack
 	ldrb	r0, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r6]
-	ldr	r5, .L2907+24
+	ldr	r5, .L2913+24
 	muls	r2, r0, r2
 	ldrh	r1, [r5]
 	cmp	r1, r2
-	beq	.L2890
-	ldr	r1, .L2907+28
+	beq	.L2896
+	ldr	r1, .L2913+28
 	movs	r2, #163
-	ldr	r0, .L2907+32
+	ldr	r0, .L2913+32
 	bl	printf
-	ldr	r1, .L2907+36
-	ldr	r0, .L2907+40
+	ldr	r1, .L2913+36
+	ldr	r0, .L2913+40
 	bl	printf
-.L2890:
+.L2896:
 	ldrh	r6, [r6]
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	ldr	r2, .L2907+44
+	ldr	r2, .L2913+44
 	ldrh	r0, [r4]
-	ldr	fp, .L2907+84
+	ldr	fp, .L2913+84
 	smulbb	r3, r3, r6
 	ldr	r1, [r2]
 	movs	r6, #0
 	mov	r10, r2
 	strh	r3, [r1, r0, lsl #1]	@ movhi
-	ldr	r1, .L2907+48
+	ldr	r1, .L2913+48
 	ldrh	r3, [r5]
 	ldr	r0, [r1]
 	add	r3, r3, r0
 	str	r3, [r1]
-.L2891:
+.L2897:
 	ldrh	r2, [r5]
 	uxth	r3, r6
 	cmp	r2, r3
-	bhi	.L2895
+	bhi	.L2901
 	movw	r0, #65535
 	bl	decrement_vpc_count
-	ldr	r3, .L2907+52
+	ldr	r3, .L2913+52
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2896
+	cbz	r3, .L2902
 	ldrh	r1, [r4]
-	ldr	r0, .L2907+56
+	ldr	r0, .L2913+56
 	bl	printf
-.L2896:
+.L2902:
 	ldrh	r0, [r4]
 	ldr	r3, [r10]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	beq	.L2897
+	beq	.L2903
 	bl	INSERT_DATA_LIST
-.L2898:
-	ldr	r3, .L2907+60
+.L2904:
+	ldr	r3, .L2913+60
 	movw	r6, #65535
 	strh	r6, [r4]	@ movhi
 	movs	r4, #0
@@ -20004,35 +20053,35 @@ FtlGcFreeTempBlock:
 	strh	r4, [r3]	@ movhi
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	ldr	r3, .L2907+64
+	ldr	r3, .L2913+64
 	strh	r6, [r3]	@ movhi
-	ldr	r3, .L2907+68
+	ldr	r3, .L2913+68
 	ldrh	r2, [r3]
-	ldr	r3, .L2907+72
+	ldr	r3, .L2913+72
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, asr #2
-	ble	.L2889
-	ldr	r3, .L2907+76
+	ble	.L2895
+	ldr	r3, .L2913+76
 	movs	r2, #20
 	mov	r0, r4
 	strh	r2, [r3]	@ movhi
-	b	.L2883
-.L2895:
+	b	.L2889
+.L2901:
 	uxth	r3, r6
 	mov	r8, #12
 	ldr	r2, [fp]
 	mul	r8, r8, r3
-	ldr	r3, .L2907+80
+	ldr	r3, .L2913+80
 	ldr	r3, [r3]
 	add	r7, r3, r8
 	ldr	r0, [r7, #8]
 	cmp	r0, r2
-	bcc	.L2892
-.L2905:
+	bcc	.L2898
+.L2911:
 	ldrh	r0, [r4]
-	b	.L2906
-.L2892:
+	b	.L2912
+.L2898:
 	movs	r2, #0
 	add	r1, sp, #12
 	str	r3, [sp, #4]
@@ -20041,7 +20090,7 @@ FtlGcFreeTempBlock:
 	ldr	r2, [sp, #12]
 	ldr	r0, [r3, r8]
 	cmp	r0, r2
-	bne	.L2894
+	bne	.L2900
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	movs	r2, #1
@@ -20050,22 +20099,22 @@ FtlGcFreeTempBlock:
 	ldr	r0, [r7, #8]
 	bl	log2phys
 	mov	r0, r8
-.L2906:
+.L2912:
 	bl	decrement_vpc_count
-	b	.L2893
-.L2894:
+	b	.L2899
+.L2900:
 	ldr	r3, [r7, #4]
 	cmp	r2, r3
-	bne	.L2905
-.L2893:
+	bne	.L2911
+.L2899:
 	adds	r6, r6, #1
-	b	.L2891
-.L2897:
+	b	.L2897
+.L2903:
 	bl	INSERT_FREE_LIST
-	b	.L2898
-.L2908:
+	b	.L2904
+.L2914:
 	.align	2
-.L2907:
+.L2913:
 	.word	.LANCHOR76
 	.word	.LANCHOR93
 	.word	.LANCHOR135
@@ -20080,7 +20129,7 @@ FtlGcFreeTempBlock:
 	.word	.LANCHOR83
 	.word	.LANCHOR161
 	.word	.LANCHOR15
-	.word	.LC70
+	.word	.LC71
 	.word	.LANCHOR109
 	.word	.LANCHOR205
 	.word	.LANCHOR88
@@ -20102,35 +20151,35 @@ Ftl_get_new_temp_ppa:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movw	r3, #65535
-	ldr	r4, .L2912
+	ldr	r4, .L2918
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	beq	.L2910
+	beq	.L2916
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L2911
-.L2910:
+	cbnz	r3, .L2917
+.L2916:
 	bl	FtlCacheWriteBack
 	movs	r0, #0
 	movs	r5, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r0, .L2912
+	ldr	r0, .L2918
 	strb	r5, [r4, #8]
 	bl	allocate_data_superblock
-	ldr	r3, .L2912+4
+	ldr	r3, .L2918+4
 	strh	r5, [r3]	@ movhi
-	ldr	r3, .L2912+8
+	ldr	r3, .L2918+8
 	strh	r5, [r3]	@ movhi
 	bl	l2p_flush
 	mov	r0, r5
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L2911:
-	ldr	r0, .L2912
+.L2917:
+	ldr	r0, .L2918
 	pop	{r3, r4, r5, lr}
 	b	get_new_active_ppa
-.L2913:
+.L2919:
 	.align	2
-.L2912:
+.L2918:
 	.word	.LANCHOR93
 	.word	.LANCHOR109
 	.word	.LANCHOR110
@@ -20147,26 +20196,26 @@ Ftl_gc_temp_data_write_back:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
-	ldr	r3, .L2929
+	ldr	r3, .L2935
 	ldr	r3, [r3]
-	cbz	r3, .L2915
-.L2918:
+	cbz	r3, .L2921
+.L2924:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L2915:
-	ldr	r3, .L2929+4
-	ldr	r5, .L2929+8
+.L2921:
+	ldr	r3, .L2935+4
+	ldr	r5, .L2935+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2917
+	cbz	r3, .L2923
 	ldr	r3, [r5]
 	lsls	r2, r3, #31
-	bpl	.L2917
-	ldr	r3, .L2929+12
+	bpl	.L2923
+	ldr	r3, .L2935+12
 	ldrh	r3, [r3, #4]
 	cmp	r3, #0
-	bne	.L2918
-.L2917:
-	ldr	r4, .L2929+16
+	bne	.L2924
+.L2923:
+	ldr	r4, .L2935+16
 	movs	r3, #0
 	movs	r6, #0
 	movs	r7, #36
@@ -20174,23 +20223,23 @@ Ftl_gc_temp_data_write_back:
 	ldr	r1, [r5]
 	ldr	r0, [r4]
 	bl	FlashProgPages
-.L2919:
+.L2925:
 	ldr	r1, [r5]
 	uxth	r3, r6
 	cmp	r3, r1
-	bcc	.L2921
+	bcc	.L2927
 	ldr	r0, [r4]
 	bl	FtlGcBufFree
 	movs	r3, #0
 	str	r3, [r5]
-	ldr	r3, .L2929+12
+	ldr	r3, .L2935+12
 	ldrh	r3, [r3, #4]
 	cmp	r3, #0
-	bne	.L2918
+	bne	.L2924
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
-	b	.L2928
-.L2921:
+	b	.L2934
+.L2927:
 	muls	r3, r7, r3
 	ldr	r2, [r4]
 	adds	r6, r6, #1
@@ -20198,15 +20247,15 @@ Ftl_gc_temp_data_write_back:
 	ldr	r2, [r2, r3]
 	ldr	r0, [r1, #12]
 	adds	r3, r2, #1
-	bne	.L2920
-	ldr	r3, .L2929+12
+	bne	.L2926
+	ldr	r3, .L2935+12
 	movs	r5, #0
-	ldr	r0, .L2929+20
+	ldr	r0, .L2935+20
 	ldrh	r4, [r3]
 	ldr	r0, [r0]
 	strh	r5, [r0, r4, lsl #1]	@ movhi
 	strh	r2, [r3]	@ movhi
-	ldr	r2, .L2929+24
+	ldr	r2, .L2935+24
 	ldr	r0, [r1, #4]
 	ldr	r3, [r2, #96]
 	ubfx	r0, r0, #10, #16
@@ -20215,18 +20264,18 @@ Ftl_gc_temp_data_write_back:
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
 	bl	FtlGcPageVarInit
-.L2928:
+.L2934:
 	movs	r0, #1
 	pop	{r3, r4, r5, r6, r7, pc}
-.L2920:
+.L2926:
 	ldr	r2, [r0, #8]
 	ldr	r1, [r1, #4]
 	ldr	r0, [r0, #12]
 	bl	FtlGcUpdatePage
-	b	.L2919
-.L2930:
+	b	.L2925
+.L2936:
 	.align	2
-.L2929:
+.L2935:
 	.word	.LANCHOR76
 	.word	.LANCHOR15
 	.word	.LANCHOR102
@@ -20247,27 +20296,27 @@ FtlGcPageRecovery:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	ldr	r4, .L2933
-	ldr	r5, .L2933+4
+	ldr	r4, .L2939
+	ldr	r5, .L2939+4
 	ldrh	r1, [r4]
 	mov	r0, r5
 	bl	FtlGcScanTempBlk
 	ldrh	r2, [r5, #2]
 	ldrh	r3, [r4]
 	cmp	r2, r3
-	bcc	.L2931
-	ldr	r0, .L2933+8
+	bcc	.L2937
+	ldr	r0, .L2939+8
 	bl	FtlMapBlkWriteDumpData
 	movs	r0, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r3, .L2933+12
+	ldr	r3, .L2939+12
 	movs	r2, #0
 	str	r2, [r3]
-.L2931:
+.L2937:
 	pop	{r3, r4, r5, pc}
-.L2934:
+.L2940:
 	.align	2
-.L2933:
+.L2939:
 	.word	.LANCHOR52
 	.word	.LANCHOR93
 	.word	.LANCHOR127
@@ -20286,13 +20335,13 @@ FtlPowerLostRecovery:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #0
-	ldr	r5, .L2936
-	ldr	r3, .L2936+4
+	ldr	r5, .L2942
+	ldr	r3, .L2942+4
 	mov	r0, r5
 	str	r4, [r3]
 	bl	FtlRecoverySuperblock
 	mov	r0, r5
-	ldr	r5, .L2936+8
+	ldr	r5, .L2942+8
 	bl	FtlSlcSuperblockCheck
 	mov	r0, r5
 	bl	FtlRecoverySuperblock
@@ -20303,9 +20352,9 @@ FtlPowerLostRecovery:
 	bl	decrement_vpc_count
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L2937:
+.L2943:
 	.align	2
-.L2936:
+.L2942:
 	.word	.LANCHOR91
 	.word	.LANCHOR239
 	.word	.LANCHOR92
@@ -20323,30 +20372,30 @@ FtlSysBlkInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r3, #0
-	ldr	r4, .L2951
+	ldr	r4, .L2957
 	movw	r5, #65535
 	strh	r3, [r4]	@ movhi
-	ldr	r3, .L2951+4
+	ldr	r3, .L2957+4
 	strh	r5, [r3]	@ movhi
-	ldr	r3, .L2951+8
+	ldr	r3, .L2957+8
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlScanSysBlk
-	ldr	r3, .L2951+12
+	ldr	r3, .L2957+12
 	ldrh	r3, [r3]
 	cmp	r3, r5
 	mov	r5, r4
-	bne	.L2939
-.L2941:
+	bne	.L2945
+.L2947:
 	mov	r4, #-1
-.L2938:
+.L2944:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, pc}
-.L2939:
+.L2945:
 	bl	FtlLoadSysInfo
 	mov	r4, r0
 	cmp	r0, #0
-	bne	.L2941
+	bne	.L2947
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -20356,42 +20405,42 @@ FtlSysBlkInit:
 	bl	FtlPowerLostRecovery
 	movs	r0, #1
 	bl	FtlUpdateVaildLpn
-	ldr	r3, .L2951+16
+	ldr	r3, .L2957+16
 	movs	r0, #12
 	ldrh	r1, [r3]
-	ldr	r3, .L2951+20
+	ldr	r3, .L2957+20
 	ldr	r2, [r3]
 	mov	r3, r4
-.L2942:
+.L2948:
 	cmp	r3, r1
-	bge	.L2947
+	bge	.L2953
 	mla	r6, r0, r3, r2
 	ldr	r6, [r6, #4]
 	cmp	r6, #0
-	bge	.L2943
-.L2947:
-	ldr	r0, .L2951+24
+	bge	.L2949
+.L2953:
+	ldr	r0, .L2957+24
 	cmp	r3, r1
 	ldr	r2, [r0]
 	add	r2, r2, #32
 	str	r2, [r0]
-	bge	.L2949
-.L2944:
-	ldr	r3, .L2951+28
+	bge	.L2955
+.L2950:
+	ldr	r3, .L2957+28
 	ldr	r1, [r3]
-	ldr	r3, .L2951+32
+	ldr	r3, .L2957+32
 	ldrh	r0, [r3]
 	ldrh	r5, [r3, #4]
 	ldrh	r2, [r1, r0, lsl #1]
 	subs	r2, r2, r5
-	ldr	r5, .L2951+36
+	ldr	r5, .L2957+36
 	strh	r2, [r1, r0, lsl #1]	@ movhi
 	ldrh	r2, [r5]
 	strh	r2, [r3, #2]	@ movhi
 	movs	r2, #0
 	strh	r2, [r3, #4]	@ movhi
 	strb	r2, [r3, #6]
-	ldr	r3, .L2951+40
+	ldr	r3, .L2957+40
 	ldrh	r6, [r3]
 	ldrh	r7, [r3, #4]
 	ldrh	r0, [r1, r6, lsl #1]
@@ -20400,28 +20449,28 @@ FtlSysBlkInit:
 	strb	r2, [r3, #6]
 	ldrh	r1, [r5]
 	strh	r2, [r3, #4]	@ movhi
-	ldr	r2, .L2951+44
+	ldr	r2, .L2957+44
 	strh	r1, [r3, #2]	@ movhi
 	ldrh	r3, [r2, #30]
 	adds	r3, r3, #1
 	strh	r3, [r2, #30]	@ movhi
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L2950:
+.L2956:
 	bl	FtlVpcTblFlush
-	b	.L2938
-.L2943:
-	adds	r3, r3, #1
-	b	.L2942
+	b	.L2944
 .L2949:
+	adds	r3, r3, #1
+	b	.L2948
+.L2955:
 	ldrh	r3, [r5]
 	cmp	r3, #0
-	bne	.L2944
+	bne	.L2950
 	bl	l2p_flush
-	b	.L2950
-.L2952:
+	b	.L2956
+.L2958:
 	.align	2
-.L2951:
+.L2957:
 	.word	.LANCHOR238
 	.word	.LANCHOR237
 	.word	.LANCHOR39
@@ -20446,87 +20495,87 @@ FtlSysBlkInit:
 FtlLowFormat:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2984
+	ldr	r3, .L2990
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #24
 	ldr	r4, [r3]
 	cmp	r4, #0
-	bne	.L2955
-	ldr	r5, .L2984+4
+	bne	.L2961
+	ldr	r5, .L2990+4
 	mov	r1, r4
-	ldr	r3, .L2984+8
-	ldr	r6, .L2984+12
+	ldr	r3, .L2990+8
+	ldr	r6, .L2990+12
 	ldrh	r2, [r5]
 	ldr	r0, [r3]
 	lsls	r2, r2, #2
 	bl	ftl_memset
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L2984+16
-	ldr	r5, .L2984+20
+	ldr	r3, .L2990+16
+	ldr	r5, .L2990+20
 	lsls	r2, r2, #2
 	ldr	r0, [r3]
 	bl	ftl_memset
-	ldr	r3, .L2984+24
+	ldr	r3, .L2990+24
 	ldrh	r0, [r6]
 	str	r4, [r5]
 	str	r4, [r3]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	r0, .L2956
+	cbz	r0, .L2962
 	bl	FtlMakeBbt
-.L2956:
-	ldr	r3, .L2984+28
-	ldr	r2, .L2984+32
-	ldr	ip, .L2984+112
+.L2962:
+	ldr	r3, .L2990+28
+	ldr	r2, .L2990+32
+	ldr	ip, .L2990+112
 	ldrh	r1, [r3]
 	ldr	r4, [r2]
-	ldr	r2, .L2984+36
+	ldr	r2, .L2990+36
 	str	r3, [sp, #12]
 	lsls	r1, r1, #7
 	ldr	r7, [r2]
 	movs	r2, #0
-.L2957:
+.L2963:
 	uxth	r3, r2
 	adds	r2, r2, #1
 	cmp	r3, r1
-	blt	.L2958
-	ldr	r3, .L2984+40
+	blt	.L2964
+	ldr	r3, .L2990+40
 	movs	r7, #0
-	ldr	fp, .L2984+116
+	ldr	fp, .L2990+116
 	ldrh	r4, [r3]
 	mov	r8, r3
 	mov	r10, fp
-.L2959:
+.L2965:
 	ldrh	r3, [fp]
 	cmp	r3, r4
-	bhi	.L2960
-	ldr	r4, .L2984+44
+	bhi	.L2966
+	ldr	r4, .L2990+44
 	subs	r3, r7, #2
 	ldrh	r1, [r4]
 	cmp	r3, r1, lsl #1
-	bgt	.L2961
-.L2965:
+	bgt	.L2967
+.L2971:
 	movs	r7, #0
 	mov	r6, r7
-.L2962:
+.L2968:
 	ldrh	r3, [r8]
 	uxth	r0, r7
 	adds	r7, r7, #1
 	cmp	r3, r0
-	bhi	.L2966
+	bhi	.L2972
 	ldrh	r2, [r10]
-	ldr	r3, .L2984+48
+	ldr	r3, .L2990+48
 	ldrh	r4, [r4]
-	ldr	r7, .L2984+52
+	ldr	r7, .L2990+52
 	str	r2, [r3]
-	ldr	r3, .L2984+56
+	ldr	r3, .L2990+56
 	mov	r1, r4
 	ldr	r3, [r3]
 	mov	r0, r3
 	str	r3, [sp, #16]
 	bl	__aeabi_uidiv
-	ldr	r1, .L2984+60
+	ldr	r1, .L2990+60
 	ubfx	r3, r0, #5, #16
 	add	r2, r3, #36
 	mov	fp, r0
@@ -20537,7 +20586,7 @@ FtlLowFormat:
 	str	r3, [sp, #4]
 	str	r1, [sp, #8]
 	cmp	r6, r2
-	ble	.L2967
+	ble	.L2973
 	ldr	r3, [sp, #16]
 	mov	r1, r4
 	subs	r0, r3, r6
@@ -20547,12 +20596,12 @@ FtlLowFormat:
 	lsrs	r0, r0, #5
 	adds	r0, r0, #24
 	strh	r0, [r3]	@ movhi
-.L2967:
-	ldr	r3, .L2984+64
+.L2973:
+	ldr	r3, .L2990+64
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L2968
-	ldr	r2, .L2984+60
+	bne	.L2974
+	ldr	r2, .L2990+60
 	mov	r1, r4
 	mov	r0, r6
 	ldrh	r3, [r2]
@@ -20564,11 +20613,11 @@ FtlLowFormat:
 	uxtah	r0, r3, r0
 	add	r3, r3, r0, asr #2
 	strh	r3, [r2]	@ movhi
-.L2968:
-	ldr	r3, .L2984+68
+.L2974:
+	ldr	r3, .L2990+68
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2969
-	ldr	r2, .L2984+60
+	cbz	r3, .L2975
+	ldr	r2, .L2990+60
 	mov	r1, r4
 	mov	r0, r6
 	ldrh	r3, [r2]
@@ -20580,55 +20629,55 @@ FtlLowFormat:
 	uxtah	r0, r3, r0
 	add	r3, r3, r0, asr #2
 	strh	r3, [r2]	@ movhi
-.L2969:
-	ldr	r3, .L2984+72
+.L2975:
+	ldr	r3, .L2990+72
 	ldrh	r3, [r3]
-	cbz	r3, .L2971
-	ldr	r2, .L2984+60
+	cbz	r3, .L2977
+	ldr	r2, .L2990+60
 	ldrh	r1, [r2]
 	add	r1, r1, r3, lsr #1
 	strh	r1, [r2]	@ movhi
 	mul	r1, r4, r3
 	cmp	r6, r1
-	bge	.L2971
+	bge	.L2977
 	ldr	r1, [sp, #4]
 	adds	r3, r3, #32
 	str	fp, [r7]
 	add	r1, r1, r3
 	strh	r1, [r2]	@ movhi
-.L2971:
+.L2977:
 	ldr	r3, [sp, #8]
-	ldr	r6, .L2984+76
+	ldr	r6, .L2990+76
 	ldrh	r2, [r3]
 	ldr	r3, [r7]
 	subs	r3, r3, r2
 	muls	r4, r3, r4
-	ldr	r3, .L2984+80
+	ldr	r3, .L2990+80
 	ldrh	r3, [r3]
 	str	r4, [r6]
 	muls	r4, r3, r4
 	ldr	r3, [sp, #12]
 	ldrh	r3, [r3]
 	str	r4, [r7]
-	ldr	r7, .L2984+84
+	ldr	r7, .L2990+84
 	muls	r4, r3, r4
-	ldr	r3, .L2984+88
+	ldr	r3, .L2990+88
 	str	r4, [r3]
 	movw	r4, #65535
 	bl	FtlBbmTblFlush
 	ldrh	r2, [r10]
 	movs	r1, #0
-	ldr	r10, .L2984+120
+	ldr	r10, .L2990+120
 	lsls	r2, r2, #1
 	ldr	r0, [r10]
 	bl	ftl_memset
-	ldr	r2, .L2984+92
+	ldr	r2, .L2990+92
 	movs	r3, #0
 	strh	r3, [r7, #2]	@ movhi
 	movs	r1, #255
 	strb	r3, [r7, #6]
 	str	r3, [r2]
-	ldr	r2, .L2984+96
+	ldr	r2, .L2990+96
 	strh	r3, [r7]	@ movhi
 	strh	r3, [r2, #2]	@ movhi
 	strb	r3, [r2, #6]
@@ -20639,30 +20688,30 @@ FtlLowFormat:
 	mov	r8, r10
 	strb	r3, [r7, #8]
 	mov	r10, r7
-	ldr	r3, .L2984+100
+	ldr	r3, .L2990+100
 	lsrs	r2, r2, #3
 	ldr	r0, [r3]
 	bl	ftl_memset
-.L2973:
+.L2979:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r7, #7]	@ zero_extendqisi2
 	ldrh	r2, [r7]
 	cmp	r3, #0
-	bne	.L2974
+	bne	.L2980
 	ldr	r3, [r8]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r7]
 	adds	r3, r3, #1
 	strh	r3, [r7]	@ movhi
-	b	.L2973
-.L2958:
+	b	.L2979
+.L2964:
 	mvns	r0, r3
 	orr	r0, r3, r0, lsl #16
 	str	r0, [r4, r3, lsl #2]
 	str	ip, [r7, r3, lsl #2]
-	b	.L2957
-.L2960:
+	b	.L2963
+.L2966:
 	mov	r0, r4
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
@@ -20670,11 +20719,11 @@ FtlLowFormat:
 	add	r7, r7, r0
 	uxth	r7, r7
 	uxth	r4, r4
-	b	.L2959
-.L2961:
+	b	.L2965
+.L2967:
 	mov	r0, r7
 	bl	__aeabi_uidiv
-	ldr	r3, .L2984+104
+	ldr	r3, .L2990+104
 	ldr	r3, [r3]
 	add	r0, r0, r3
 	uxth	r0, r0
@@ -20682,26 +20731,26 @@ FtlLowFormat:
 	ldrh	r0, [r6]
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	r6, [r8]
-.L2963:
+.L2969:
 	ldrh	r3, [r10]
 	cmp	r3, r6
-	bls	.L2965
+	bls	.L2971
 	mov	r0, r6
 	movs	r1, #1
 	adds	r6, r6, #1
 	bl	FtlLowFormatEraseBlock
 	uxth	r6, r6
-	b	.L2963
-.L2966:
+	b	.L2969
+.L2972:
 	movs	r1, #0
 	bl	FtlLowFormatEraseBlock
 	add	r6, r6, r0
 	uxth	r6, r6
-	b	.L2962
-.L2974:
+	b	.L2968
+.L2980:
 	ldr	r3, [r5]
 	ldrh	r1, [r7, #4]
-	ldr	r4, .L2984+108
+	ldr	r4, .L2990+108
 	str	r3, [r7, #12]
 	adds	r3, r3, #1
 	str	r3, [r5]
@@ -20717,22 +20766,22 @@ FtlLowFormat:
 	strh	r3, [r4]	@ movhi
 	movs	r3, #1
 	strb	r3, [r4, #8]
-.L2975:
+.L2981:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r4]
 	cmp	r3, #0
-	bne	.L2976
+	bne	.L2982
 	ldr	r3, [r8]
 	strh	r7, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	b	.L2975
-.L2985:
+	b	.L2981
+.L2991:
 	.align	2
-.L2984:
+.L2990:
 	.word	.LANCHOR76
 	.word	.LANCHOR66
 	.word	.LANCHOR195
@@ -20764,7 +20813,7 @@ FtlLowFormat:
 	.word	168778952
 	.word	.LANCHOR41
 	.word	.LANCHOR83
-.L2976:
+.L2982:
 	ldr	r3, [r5]
 	ldrh	r1, [r4, #4]
 	str	r3, [r4, #12]
@@ -20773,10 +20822,10 @@ FtlLowFormat:
 	movw	r4, #65535
 	ldr	r3, [r8]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L2986
+	ldr	r3, .L2992
 	strh	r4, [r3]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L2986+4
+	ldr	r3, .L2992+4
 	movs	r2, #0
 	strh	r2, [r3, #2]	@ movhi
 	ldr	r2, [r6]
@@ -20789,18 +20838,18 @@ FtlLowFormat:
 	str	r2, [r5]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	r0, .L2955
-	ldr	r3, .L2986+8
+	cbnz	r0, .L2961
+	ldr	r3, .L2992+8
 	movs	r2, #1
 	str	r2, [r3]
-.L2955:
+.L2961:
 	movs	r0, #0
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2987:
+.L2993:
 	.align	2
-.L2986:
+.L2992:
 	.word	.LANCHOR93
 	.word	.LANCHOR210
 	.word	.LANCHOR232
@@ -20816,34 +20865,34 @@ FtlLowFormat:
 rk_ftl_garbage_collect:
 	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L3087
+	ldr	r3, .L3093
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #32
 	ldr	r2, [r3]
 	cmp	r2, #0
-	bne	.L3047
-	ldr	r3, .L3087+4
+	bne	.L3053
+	ldr	r3, .L3093+4
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L3047
-	ldr	r2, .L3087+8
+	bne	.L3053
+	ldr	r2, .L3093+8
 	ldrh	r2, [r2]
 	cmp	r2, #47
-	bls	.L3049
-	ldr	r5, .L3087+12
+	bls	.L3055
+	ldr	r5, .L3093+12
 	movw	r2, #65535
 	ldrh	ip, [r5]
 	cmp	ip, r2
-	beq	.L2990
-	ldr	r7, .L3087+16
+	beq	.L2996
+	ldr	r7, .L3093+16
 	ldrh	r3, [r7]
 	cmp	r3, r2
-	bne	.L2990
-	ldr	r1, .L3087+20
+	bne	.L2996
+	ldr	r1, .L3093+20
 	ldrh	r6, [r1]
 	cmp	r6, r3
-	beq	.L2990
-	ldr	r2, .L3087+24
+	beq	.L2996
+	ldr	r2, .L3093+24
 	ldrh	r4, [r2]
 	cmp	r4, r3
 	itttt	ne
@@ -20851,172 +20900,172 @@ rk_ftl_garbage_collect:
 	strhne	r6, [r5]	@ movhi
 	strhne	r4, [r1]	@ movhi
 	strhne	r3, [r2]	@ movhi
-.L2990:
+.L2996:
 	cmp	r0, #0
-	bne	.L3050
-	ldr	r3, .L3087+28
+	bne	.L3056
+	ldr	r3, .L3093+28
 	ldrh	r3, [r3]
 	cmp	r3, #24
-	bhi	.L3051
-	ldr	r2, .L3087+32
+	bhi	.L3057
+	ldr	r2, .L3093+32
 	cmp	r3, #16
 	ldrh	r4, [r2]
-	bls	.L2993
+	bls	.L2999
 	lsrs	r4, r4, #5
-.L2992:
-	ldr	r2, .L3087+36
+.L2998:
+	ldr	r2, .L3093+36
 	ldrh	r1, [r2]
 	cmp	r1, r3
 	mov	r1, r2
-	bcs	.L2996
-	ldr	r3, .L3087+40
+	bcs	.L3002
+	ldr	r3, .L3093+40
 	movw	r0, #65535
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L2997
-	ldr	r0, .L3087+16
+	bne	.L3003
+	ldr	r0, .L3093+16
 	ldrh	r0, [r0]
 	cmp	r0, r3
-	bne	.L2997
-	ldr	r3, .L3087+44
+	bne	.L3003
+	ldr	r3, .L3093+44
 	ldrh	r0, [r3]
-	cbnz	r0, .L2998
-	ldr	r3, .L3087+48
-	ldr	r4, .L3087+52
+	cbnz	r0, .L3004
+	ldr	r3, .L3093+48
+	ldr	r4, .L3093+52
 	ldr	r3, [r3]
 	ldr	r4, [r4]
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, lsr #2
-	bcs	.L2999
-.L2998:
-	ldr	r3, .L3087+56
+	bcs	.L3005
+.L3004:
+	ldr	r3, .L3093+56
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r1]	@ movhi
-.L3000:
-	ldr	r3, .L3087+60
+.L3006:
+	ldr	r3, .L3093+60
 	movs	r2, #0
 	str	r2, [r3]
-.L2988:
+.L2994:
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2993:
+.L2999:
 	cmp	r3, #12
-	bls	.L2994
+	bls	.L3000
 	lsrs	r4, r4, #4
-	b	.L2992
-.L2994:
+	b	.L2998
+.L3000:
 	cmp	r3, #8
-	bls	.L2992
+	bls	.L2998
 	lsrs	r4, r4, #2
-	b	.L2992
-.L3051:
+	b	.L2998
+.L3057:
 	movs	r4, #1
-	b	.L2992
-.L2999:
+	b	.L2998
+.L3005:
 	movs	r3, #18
 	strh	r3, [r2]	@ movhi
-	b	.L3000
-.L2997:
-	ldr	r3, .L3087+56
+	b	.L3006
+.L3003:
+	ldr	r3, .L3093+56
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r1]	@ movhi
-.L2996:
-	ldr	r3, .L3087+64
+.L3002:
+	ldr	r3, .L3093+64
 	ldrh	r3, [r3]
-	cbz	r3, .L2991
+	cbz	r3, .L2997
 	adds	r4, r4, #32
 	uxth	r4, r4
-.L2991:
-	ldr	r5, .L3087+68
+.L2997:
+	ldr	r5, .L3093+68
 	movw	r3, #65535
 	ldrh	r2, [r5]
 	cmp	r2, r3
-	bne	.L3003
-	ldr	r3, .L3087+16
+	bne	.L3009
+	ldr	r3, .L3093+16
 	ldrh	r1, [r3]
 	cmp	r1, r2
-	beq	.L3004
-	ldr	r0, .L3087+72
+	beq	.L3010
+	ldr	r0, .L3093+72
 	ldr	r0, [r0]
 	ldrh	r1, [r0, r1, lsl #1]
-	cbnz	r1, .L3005
+	cbnz	r1, .L3011
 	strh	r2, [r3]	@ movhi
-.L3005:
+.L3011:
 	ldrh	r2, [r3]
 	strh	r2, [r5]	@ movhi
 	movw	r2, #65535
 	strh	r2, [r3]	@ movhi
-.L3004:
+.L3010:
 	ldrh	r0, [r5]
 	movw	r6, #65535
 	movs	r3, #0
 	strb	r3, [r5, #8]
 	cmp	r0, r6
-	beq	.L3003
+	beq	.L3009
 	bl	IsBlkInGcList
-	cbz	r0, .L3007
+	cbz	r0, .L3013
 	strh	r6, [r5]	@ movhi
-.L3007:
-	ldr	r3, .L3087+76
+.L3013:
+	ldr	r3, .L3093+76
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L3008
+	cbz	r3, .L3014
 	ldrh	r0, [r5]
 	bl	ftl_get_blk_mode
 	strb	r0, [r5, #8]
-.L3008:
+.L3014:
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L3003
-	ldr	r0, .L3087+68
+	beq	.L3009
+	ldr	r0, .L3093+68
 	bl	make_superblock
-	ldr	r2, .L3087+80
+	ldr	r2, .L3093+80
 	movs	r3, #0
 	strh	r3, [r5, #2]	@ movhi
 	strb	r3, [r5, #6]
 	strh	r3, [r2]	@ movhi
-	ldr	r3, .L3087+72
+	ldr	r3, .L3093+72
 	ldrh	r2, [r5]
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r2, lsl #1]
-	ldr	r3, .L3087+84
+	ldr	r3, .L3093+84
 	strh	r2, [r3]	@ movhi
-.L3003:
-	ldr	r2, .L3087+88
+.L3009:
+	ldr	r2, .L3093+88
 	ldrh	r3, [r5]
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L3009
-	ldr	r2, .L3087+92
+	beq	.L3015
+	ldr	r2, .L3093+92
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L3009
-	ldr	r2, .L3087+40
+	beq	.L3015
+	ldr	r2, .L3093+40
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bne	.L3010
-.L3009:
+	bne	.L3016
+.L3015:
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.L3010:
-	ldr	r5, .L3087+68
+.L3016:
+	ldr	r5, .L3093+68
 	mov	r6, r5
-.L3046:
+.L3052:
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L3011
-	ldr	r10, .L3087+100
+	bne	.L3017
+	ldr	r10, .L3093+100
 	movs	r2, #0
-	ldr	r3, .L3087+60
+	ldr	r3, .L3093+60
 	mov	r7, r10
 	str	r2, [r3]
-.L3012:
+.L3018:
 	ldrh	r8, [r10]
 	mov	r0, r8
 	bl	List_get_gc_head_node
@@ -21024,29 +21073,29 @@ rk_ftl_garbage_collect:
 	movw	r3, #65535
 	cmp	fp, r3
 	strh	fp, [r6]	@ movhi
-	bne	.L3013
+	bne	.L3019
 	movs	r3, #0
 	movs	r0, #8
 	strh	r3, [r10]	@ movhi
-	b	.L2988
-.L3050:
+	b	.L2994
+.L3056:
 	movs	r4, #1
-	b	.L2991
-.L3013:
+	b	.L2997
+.L3019:
 	str	r0, [sp]
 	mov	r0, fp
 	bl	IsBlkInGcList
 	add	r3, r8, #1
 	ldr	r2, [sp]
-	cbz	r0, .L3014
+	cbz	r0, .L3020
 	strh	r3, [r10]	@ movhi
-	b	.L3012
-.L3014:
-	ldr	r1, .L3087+32
+	b	.L3018
+.L3020:
+	ldr	r1, .L3093+32
 	uxth	r3, r3
-	ldr	lr, .L3087+104
+	ldr	lr, .L3093+104
 	uxth	r2, r2
-	ldr	r8, .L3087+72
+	ldr	r8, .L3093+72
 	ldrh	r1, [r1]
 	ldrh	lr, [lr]
 	ldr	r0, [r8]
@@ -21054,45 +21103,45 @@ rk_ftl_garbage_collect:
 	mul	r1, lr, r1
 	ldrh	ip, [r0, r2, lsl #1]
 	cmp	ip, r1, asr #1
-	bgt	.L3016
+	bgt	.L3022
 	cmp	r3, #48
-	bls	.L3017
+	bls	.L3023
 	cmp	ip, #8
-	bls	.L3017
-	ldr	r3, .L3087+96
+	bls	.L3023
+	ldr	r3, .L3093+96
 	ldrh	r3, [r3]
 	cmp	r3, #35
-	bhi	.L3017
-.L3016:
+	bhi	.L3023
+.L3022:
 	movs	r3, #0
 	strh	r3, [r7]	@ movhi
-.L3017:
+.L3023:
 	ldrh	r3, [r0, r2, lsl #1]
 	cmp	r1, r3
-	bgt	.L3018
+	bgt	.L3024
 	ldrh	r2, [r7]
 	cmp	r2, #3
-	bhi	.L3018
+	bhi	.L3024
 	movw	r3, #65535
 	strh	r3, [r6]	@ movhi
 	movs	r3, #0
 	strh	r3, [r7]	@ movhi
-.L3086:
-	ldr	r3, .L3087+44
+.L3092:
+	ldr	r3, .L3093+44
 	ldrh	r0, [r3]
-	b	.L2988
-.L3018:
+	b	.L2994
+.L3024:
 	cmp	r3, #0
-	bne	.L3019
+	bne	.L3025
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	ldrh	r3, [r7]
 	adds	r3, r3, #1
 	strh	r3, [r7]	@ movhi
-	b	.L3012
-.L3088:
+	b	.L3018
+.L3094:
 	.align	2
-.L3087:
+.L3093:
 	.word	.LANCHOR76
 	.word	.LANCHOR171
 	.word	.LANCHOR85
@@ -21120,86 +21169,86 @@ rk_ftl_garbage_collect:
 	.word	.LANCHOR109
 	.word	.LANCHOR178
 	.word	.LANCHOR38
-.L3019:
+.L3025:
 	movs	r3, #0
 	strb	r3, [r6, #8]
-	ldr	r3, .L3089
+	ldr	r3, .L3095
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L3020
+	cbz	r3, .L3026
 	mov	r0, fp
 	bl	ftl_get_blk_mode
 	strb	r0, [r6, #8]
-.L3020:
-	ldr	r3, .L3089+4
+.L3026:
+	ldr	r3, .L3095+4
 	ldrh	r3, [r3]
 	cmp	r3, fp
-	bne	.L3021
-	ldr	r1, .L3089+8
+	bne	.L3027
+	ldr	r1, .L3095+8
 	movw	r2, #902
-	ldr	r0, .L3089+12
+	ldr	r0, .L3095+12
 	bl	printf
-	ldr	r1, .L3089+16
-	ldr	r0, .L3089+20
+	ldr	r1, .L3095+16
+	ldr	r0, .L3095+20
 	bl	printf
-.L3021:
-	ldr	r3, .L3089+24
+.L3027:
+	ldr	r3, .L3095+24
 	ldrh	r2, [r6]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L3022
-	ldr	r1, .L3089+8
+	bne	.L3028
+	ldr	r1, .L3095+8
 	movw	r2, #903
-	ldr	r0, .L3089+12
+	ldr	r0, .L3095+12
 	bl	printf
-	ldr	r1, .L3089+16
-	ldr	r0, .L3089+20
+	ldr	r1, .L3095+16
+	ldr	r0, .L3095+20
 	bl	printf
-.L3022:
-	ldr	r3, .L3089+28
+.L3028:
+	ldr	r3, .L3095+28
 	ldrh	r2, [r6]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L3023
-	ldr	r1, .L3089+8
+	bne	.L3029
+	ldr	r1, .L3095+8
 	mov	r2, #904
-	ldr	r0, .L3089+12
+	ldr	r0, .L3095+12
 	bl	printf
-	ldr	r1, .L3089+16
-	ldr	r0, .L3089+20
+	ldr	r1, .L3095+16
+	ldr	r0, .L3095+20
 	bl	printf
-.L3023:
+.L3029:
 	mov	r0, r5
 	bl	make_superblock
-	ldr	r2, .L3089+32
+	ldr	r2, .L3095+32
 	movs	r3, #0
 	ldrh	r1, [r6]
 	strh	r3, [r2]	@ movhi
 	ldr	r2, [r8]
 	ldrh	r1, [r2, r1, lsl #1]
-	ldr	r2, .L3089+36
+	ldr	r2, .L3095+36
 	strh	r3, [r6, #2]	@ movhi
 	strb	r3, [r6, #6]
 	strh	r1, [r2]	@ movhi
-.L3011:
-	ldr	r3, .L3089+40
+.L3017:
+	ldr	r3, .L3095+40
 	movs	r2, #1
 	str	r2, [r3]
-	ldr	r3, .L3089+44
+	ldr	r3, .L3095+44
 	ldrh	r3, [r3]
 	str	r3, [sp, #4]
-	ldr	r3, .L3089
+	ldr	r3, .L3095
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L3024
+	cbz	r3, .L3030
 	ldrb	r3, [r6, #8]	@ zero_extendqisi2
 	cmp	r3, r2
 	ittt	eq
-	ldreq	r3, .L3089+48
+	ldreq	r3, .L3095+48
 	ldrheq	r3, [r3]
 	streq	r3, [sp, #4]
-.L3024:
+.L3030:
 	ldrh	r3, [r6, #2]
 	ldr	r1, [sp, #4]
-	ldr	fp, .L3089+76
+	ldr	fp, .L3095+76
 	adds	r2, r3, r4
 	cmp	r2, r1
 	itt	gt
@@ -21209,11 +21258,11 @@ rk_ftl_garbage_collect:
 	it	gt
 	uxthgt	r4, r4
 	str	r3, [sp, #12]
-.L3026:
+.L3032:
 	ldrh	r3, [sp, #12]
 	cmp	r4, r3
-	bls	.L3034
-	ldr	r3, .L3089+52
+	bls	.L3040
+	ldr	r3, .L3095+52
 	movw	r8, #65535
 	ldrh	lr, [r5, #2]
 	mov	r10, #36
@@ -21221,17 +21270,17 @@ rk_ftl_garbage_collect:
 	ldrh	r7, [r3]
 	ldr	r3, [sp, #12]
 	add	lr, lr, r3
-	ldr	r3, .L3089+56
+	ldr	r3, .L3095+56
 	str	r3, [sp, #8]
 	movs	r3, #0
 	str	r3, [sp]
-	b	.L3035
-.L3028:
+	b	.L3041
+.L3034:
 	ldr	r1, [sp, #8]
 	ldrh	r2, [r1, #2]!
 	cmp	r2, r8
 	str	r1, [sp, #8]
-	beq	.L3027
+	beq	.L3033
 	ldr	r1, [sp]
 	orr	r2, lr, r2, lsl #10
 	mla	ip, r10, r1, r0
@@ -21240,27 +21289,27 @@ rk_ftl_garbage_collect:
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r2, [sp]
-.L3027:
+.L3033:
 	adds	r3, r3, #1
-.L3035:
+.L3041:
 	uxth	r2, r3
 	cmp	r7, r2
-	bhi	.L3028
+	bhi	.L3034
 	ldrb	r2, [r5, #8]	@ zero_extendqisi2
 	ldr	r1, [sp]
 	bl	FlashReadPages
 	movs	r3, #0
-.L3085:
+.L3091:
 	str	r3, [sp, #8]
 	ldr	r2, [sp]
 	ldrh	r3, [sp, #8]
 	cmp	r2, r3
-	bhi	.L3033
+	bhi	.L3039
 	ldr	r3, [sp, #12]
 	adds	r3, r3, #1
 	str	r3, [sp, #12]
-	b	.L3026
-.L3033:
+	b	.L3032
+.L3039:
 	ldr	r3, [sp, #8]
 	movs	r7, #36
 	muls	r7, r3, r7
@@ -21268,23 +21317,23 @@ rk_ftl_garbage_collect:
 	adds	r2, r3, r7
 	ldr	r3, [r3, r7]
 	adds	r3, r3, #1
-	beq	.L3030
+	beq	.L3036
 	ldr	r8, [r2, #12]
 	movw	r3, #61589
 	ldrh	r2, [r8]
 	cmp	r2, r3
-	bne	.L3030
+	bne	.L3036
 	ldr	r10, [r8, #8]
 	cmp	r10, #-1
-	bne	.L3031
-	ldr	r1, .L3089+8
+	bne	.L3037
+	ldr	r1, .L3095+8
 	movw	r2, #943
-	ldr	r0, .L3089+12
+	ldr	r0, .L3095+12
 	bl	printf
-	ldr	r1, .L3089+16
-	ldr	r0, .L3089+20
+	ldr	r1, .L3095+16
+	ldr	r0, .L3095+20
 	bl	printf
-.L3031:
+.L3037:
 	movs	r2, #0
 	add	r1, sp, #24
 	mov	r0, r10
@@ -21295,10 +21344,10 @@ rk_ftl_garbage_collect:
 	ldr	r2, [r0, #4]
 	bic	r3, r3, #-2147483648
 	cmp	r3, r2
-	bne	.L3030
-	ldr	r2, .L3089+32
-	ldr	r1, .L3089+60
-	ldr	r10, .L3089+72
+	bne	.L3036
+	ldr	r2, .L3095+32
+	ldr	r1, .L3095+60
+	ldr	r10, .L3095+72
 	ldrh	r3, [r2]
 	str	r1, [sp, #20]
 	adds	r3, r3, #1
@@ -21320,7 +21369,7 @@ rk_ftl_garbage_collect:
 	ldr	r0, [fp]
 	mla	r2, r1, r3, r2
 	add	r0, r0, r7
-	ldr	r7, .L3089+28
+	ldr	r7, .L3095+28
 	ldr	r1, [r0, #8]
 	adds	r3, r3, #1
 	str	r1, [r2, #8]
@@ -21331,55 +21380,55 @@ rk_ftl_garbage_collect:
 	str	r2, [r8, #12]
 	ldrh	r2, [r7]
 	strh	r2, [r8, #2]	@ movhi
-	ldr	r2, .L3089+64
+	ldr	r2, .L3095+64
 	str	r3, [r10]
 	ldr	r2, [r2]
 	str	r2, [r8, #4]
 	bl	FtlGcBufAlloc
-	ldr	r3, .L3089
+	ldr	r3, .L3095
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L3032
+	cbnz	r3, .L3038
 	ldrb	r2, [r7, #7]	@ zero_extendqisi2
 	ldr	r3, [r10]
 	cmp	r2, r3
-	beq	.L3032
+	beq	.L3038
 	ldrh	r3, [r7, #4]
-	cbnz	r3, .L3030
-.L3032:
+	cbnz	r3, .L3036
+.L3038:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	r0, .L3030
-	ldr	r3, .L3089+40
+	cbz	r0, .L3036
+	ldr	r3, .L3095+40
 	movs	r2, #0
 	movw	r1, #65535
 	str	r2, [r3]
-	ldr	r3, .L3089+68
+	ldr	r3, .L3095+68
 	strh	r1, [r3]	@ movhi
 	strh	r2, [r3, #2]	@ movhi
-	b	.L3086
-.L3030:
+	b	.L3092
+.L3036:
 	ldr	r3, [sp, #8]
 	adds	r3, r3, #1
-	b	.L3085
-.L3034:
+	b	.L3091
+.L3040:
 	ldrh	r3, [r5, #2]
 	add	r4, r4, r3
 	ldr	r3, [sp, #4]
 	uxth	r4, r4
 	cmp	r3, r4
 	strh	r4, [r5, #2]	@ movhi
-	bhi	.L3036
-	ldr	r3, .L3089+72
+	bhi	.L3042
+	ldr	r3, .L3095+72
 	ldr	r3, [r3]
-	cbz	r3, .L3037
+	cbz	r3, .L3043
 	bl	Ftl_gc_temp_data_write_back
-	cbz	r0, .L3037
-	ldr	r3, .L3089+40
+	cbz	r0, .L3043
+	ldr	r3, .L3095+40
 	movs	r2, #0
 	str	r2, [r3]
-	b	.L3086
-.L3090:
+	b	.L3092
+.L3096:
 	.align	2
-.L3089:
+.L3095:
 	.word	.LANCHOR15
 	.word	.LANCHOR91
 	.word	.LANCHOR246
@@ -21400,36 +21449,36 @@ rk_ftl_garbage_collect:
 	.word	.LANCHOR205
 	.word	.LANCHOR102
 	.word	.LANCHOR106
-.L3037:
-	ldr	r3, .L3091
+.L3043:
+	ldr	r3, .L3097
 	ldrh	r7, [r3]
-	cbnz	r7, .L3038
-	ldr	r8, .L3091+20
+	cbnz	r7, .L3044
+	ldr	r8, .L3097+20
 	ldrh	r2, [r5]
 	ldr	r3, [r8]
 	ldrh	r3, [r3, r2, lsl #1]
-	cbz	r3, .L3038
-	ldr	r4, .L3091+4
-.L3039:
+	cbz	r3, .L3044
+	ldr	r4, .L3097+4
+.L3045:
 	ldr	r3, [r4]
 	cmp	r7, r3
-	bcs	.L3044
+	bcs	.L3050
 	movs	r2, #0
 	add	r1, sp, #28
 	mov	r0, r7
 	bl	log2phys
 	ldr	r0, [sp, #28]
 	adds	r3, r0, #1
-	beq	.L3040
+	beq	.L3046
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r5]
 	cmp	r3, r0
-	bne	.L3040
-.L3044:
+	bne	.L3046
+.L3050:
 	ldr	r3, [r4]
 	cmp	r7, r3
-	bcc	.L3038
+	bcc	.L3044
 	ldrh	r2, [r5]
 	movs	r1, #0
 	ldr	r3, [r8]
@@ -21439,35 +21488,35 @@ rk_ftl_garbage_collect:
 	bl	FtlCacheWriteBack
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L3038:
+.L3044:
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.L3036:
-	ldr	r3, .L3091+8
+.L3042:
+	ldr	r3, .L3097+8
 	ldrh	r0, [r3]
 	cmp	r0, #2
-	bhi	.L3045
-	ldr	r3, .L3091+12
+	bhi	.L3051
+	ldr	r3, .L3097+12
 	ldrh	r4, [r3]
-	b	.L3046
-.L3040:
+	b	.L3052
+.L3046:
 	adds	r7, r7, #1
-	b	.L3039
-.L3045:
-	ldr	r3, .L3091+16
+	b	.L3045
+.L3051:
+	ldr	r3, .L3097+16
 	movs	r2, #0
 	adds	r0, r0, #1
 	str	r2, [r3]
-	b	.L2988
-.L3047:
+	b	.L2994
+.L3053:
 	movs	r0, #0
-	b	.L2988
-.L3049:
+	b	.L2994
+.L3055:
 	mov	r0, r3
-	b	.L2988
-.L3092:
+	b	.L2994
+.L3098:
 	.align	2
-.L3091:
+.L3097:
 	.word	.LANCHOR244
 	.word	.LANCHOR72
 	.word	.LANCHOR88
@@ -21488,86 +21537,86 @@ FtlInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	mov	r3, #-1
-	ldr	r5, .L3103
+	ldr	r5, .L3109
 	mov	r4, r0
-	ldr	r2, .L3103+4
+	ldr	r2, .L3109+4
 	str	r3, [r5]
 	movs	r3, #0
-	ldr	r1, .L3103+8
+	ldr	r1, .L3109+8
 	str	r3, [r2]
-	ldr	r2, .L3103+12
-	ldr	r0, .L3103+16
+	ldr	r2, .L3109+12
+	ldr	r0, .L3109+16
 	str	r3, [r2]
 	bl	printf
 	mov	r0, r4
 	bl	FtlConstantsInit
 	bl	FtlMemInit
 	bl	FtlVariablesInit
-	ldr	r3, .L3103+20
+	ldr	r3, .L3109+20
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	r0, .L3094
-	ldr	r1, .L3103+24
-	ldr	r0, .L3103+28
-.L3102:
+	cbz	r0, .L3100
+	ldr	r1, .L3109+24
+	ldr	r0, .L3109+28
+.L3108:
 	bl	printf
-.L3095:
+.L3101:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, pc}
-.L3094:
+.L3100:
 	bl	FtlSysBlkInit
 	mov	r4, r0
-	cbz	r0, .L3096
-	ldr	r1, .L3103+24
-	ldr	r0, .L3103+32
-	b	.L3102
-.L3096:
+	cbz	r0, .L3102
+	ldr	r1, .L3109+24
+	ldr	r0, .L3109+32
+	b	.L3108
+.L3102:
 	movs	r1, #1
 	str	r1, [r5]
-	ldr	r5, .L3103+36
+	ldr	r5, .L3109+36
 	bl	rk_ftl_garbage_collect
 	ldrh	r6, [r5]
 	cmp	r6, #15
-	bhi	.L3095
-	ldr	r7, .L3103+40
-	ldr	r8, .L3103+44
-.L3100:
+	bhi	.L3101
+	ldr	r7, .L3109+40
+	ldr	r8, .L3109+44
+.L3106:
 	ldrh	r3, [r7]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L3098
+	bne	.L3104
 	ldrh	r2, [r8]
 	cmp	r2, r3
-	bne	.L3098
+	bne	.L3104
 	and	r0, r4, #7
 	bl	List_get_gc_head_node
 	uxth	r0, r0
 	bl	FtlGcRefreshBlock
-.L3098:
+.L3104:
 	movs	r1, #1
 	mov	r0, r1
 	bl	rk_ftl_garbage_collect
 	ldrh	r2, [r5]
 	adds	r3, r6, #2
 	cmp	r2, r3
-	bhi	.L3095
+	bhi	.L3101
 	adds	r4, r4, #1
 	cmp	r4, #1024
-	bne	.L3100
-	b	.L3095
-.L3104:
+	bne	.L3106
+	b	.L3101
+.L3110:
 	.align	2
-.L3103:
+.L3109:
 	.word	.LANCHOR232
 	.word	.LANCHOR247
-	.word	.LC71
+	.word	.LC72
 	.word	.LANCHOR76
 	.word	.LC7
 	.word	.LANCHOR39
 	.word	.LANCHOR248
-	.word	.LC72
 	.word	.LC73
+	.word	.LC74
 	.word	.LANCHOR88
 	.word	.LANCHOR205
 	.word	.LANCHOR112
@@ -21586,21 +21635,21 @@ rk_ftl_init:
 	push	{r4, lr}
 	bl	FlashInit
 	mov	r4, r0
-	cbnz	r0, .L3106
-	ldr	r0, .L3107
+	cbnz	r0, .L3112
+	ldr	r0, .L3113
 	bl	FtlInit
-.L3106:
+.L3112:
 	bl	idb_init
 	mov	r1, r4
-	ldr	r0, .L3107+4
+	ldr	r0, .L3113+4
 	bl	printf
 	mov	r0, r4
 	pop	{r4, pc}
-.L3108:
+.L3114:
 	.align	2
-.L3107:
+.L3113:
 	.word	.LANCHOR14
-	.word	.LC74
+	.word	.LC75
 	.size	rk_ftl_init, .-rk_ftl_init
 	.section	.text.ftl_fix_nand_power_lost_error,"ax",%progbits
 	.align	1
@@ -21613,20 +21662,20 @@ rk_ftl_init:
 ftl_fix_nand_power_lost_error:
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L3123
+	ldr	r3, .L3129
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #56
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L3109
-	ldr	r7, .L3123+4
-	ldr	r6, .L3123+8
-	ldr	r10, .L3123+32
+	beq	.L3115
+	ldr	r7, .L3129+4
+	ldr	r6, .L3129+8
+	ldr	r10, .L3129+32
 	ldrh	r5, [r7]
 	ldr	r3, [r6]
-	ldr	r4, .L3123+12
+	ldr	r4, .L3129+12
 	mov	r1, r5
-	ldr	r0, .L3123+16
+	ldr	r0, .L3129+16
 	ldrh	r2, [r3, r5, lsl #1]
 	lsl	r8, r5, #1
 	bl	printf
@@ -21640,44 +21689,44 @@ ftl_fix_nand_power_lost_error:
 	movw	r4, #4097
 	bl	allocate_new_data_superblock
 	str	r7, [sp, #4]
-.L3111:
+.L3117:
 	subs	r4, r4, #1
-	beq	.L3115
+	beq	.L3121
 	movs	r1, #1
 	mov	r0, r1
 	bl	rk_ftl_garbage_collect
 	ldr	r3, [r6]
 	ldrh	r3, [r3, r8]
 	cmp	r3, #0
-	bne	.L3111
-.L3115:
+	bne	.L3117
+.L3121:
 	ldr	r3, [r6]
 	mov	r1, r5
-	ldr	r0, .L3123+16
+	ldr	r0, .L3129+16
 	ldrh	r2, [r3, r5, lsl #1]
 	bl	printf
 	ldr	r3, [r6]
 	ldrh	r4, [r3, r5, lsl #1]
-	cbnz	r4, .L3113
+	cbnz	r4, .L3119
 	add	r0, sp, #56
-	ldr	r7, .L3123+20
+	ldr	r7, .L3129+20
 	strh	r5, [r0, #-48]!	@ movhi
 	movw	r10, #65535
 	bl	make_superblock
-	ldr	r3, .L3123+24
+	ldr	r3, .L3129+24
 	add	r0, sp, #22
 	ldr	r8, [r7]
 	mov	r2, r4
 	mov	fp, #36
 	mov	ip, r4
 	ldrh	lr, [r3]
-.L3116:
+.L3122:
 	uxth	r3, r2
 	cmp	lr, r3
-	bhi	.L3118
+	bhi	.L3124
 	ldr	r3, [r6]
 	mov	r1, r5
-	ldr	r0, .L3123+28
+	ldr	r0, .L3129+28
 	ldrh	r2, [r3, r5, lsl #1]
 	bl	printf
 	mov	r2, r4
@@ -21688,18 +21737,18 @@ ftl_fix_nand_power_lost_error:
 	movs	r1, #1
 	ldr	r0, [r7]
 	bl	FlashEraseBlocks
-.L3113:
+.L3119:
 	ldr	r2, [sp, #4]
 	movw	r3, #65535
 	strh	r3, [r2]	@ movhi
-.L3109:
+.L3115:
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3118:
+.L3124:
 	ldrh	r3, [r0, #2]!
 	cmp	r3, r10
-	beq	.L3117
+	beq	.L3123
 	mla	r1, fp, r4, r8
 	adds	r4, r4, #1
 	lsls	r3, r3, #10
@@ -21707,20 +21756,20 @@ ftl_fix_nand_power_lost_error:
 	str	r3, [r1, #4]
 	str	ip, [r1, #8]
 	str	ip, [r1, #12]
-.L3117:
+.L3123:
 	adds	r2, r2, #1
-	b	.L3116
-.L3124:
+	b	.L3122
+.L3130:
 	.align	2
-.L3123:
+.L3129:
 	.word	.LANCHOR15
 	.word	.LANCHOR237
 	.word	.LANCHOR83
 	.word	.LANCHOR92
-	.word	.LC75
+	.word	.LC76
 	.word	.LANCHOR77
 	.word	.LANCHOR38
-	.word	.LC76
+	.word	.LC77
 	.word	.LANCHOR91
 	.size	ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error
 	.section	.text.ftl_read,"ax",%progbits
@@ -21740,34 +21789,34 @@ ftl_read:
 	mov	r6, r1
 	mov	r7, r3
 	str	r2, [sp, #52]
-	bne	.L3126
+	bne	.L3132
 	mov	r2, r3
 	ldr	r1, [sp, #52]
 	add	r0, r6, #256
 	bl	FtlVendorPartRead
 	str	r0, [sp, #32]
-.L3125:
+.L3131:
 	ldr	r0, [sp, #32]
 	add	sp, sp, #88
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3126:
+.L3132:
 	ldr	r3, [sp, #52]
 	adds	r3, r1, r3
 	str	r3, [sp, #36]
-	ldr	r3, .L3164
+	ldr	r3, .L3170
 	ldr	r2, [sp, #36]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L3149
-	ldr	r3, .L3164+4
+	bhi	.L3155
+	ldr	r3, .L3170+4
 	ldr	r3, [r3]
 	adds	r4, r3, #1
-	beq	.L3150
+	beq	.L3156
 	bl	FtlCacheWriteBack
-	ldr	r3, .L3164+8
+	ldr	r3, .L3170+8
 	mov	r0, r6
-	ldr	r10, .L3164+52
+	ldr	r10, .L3170+52
 	ldrh	r4, [r3]
 	mov	r1, r4
 	bl	__aeabi_uidiv
@@ -21777,7 +21826,7 @@ ftl_read:
 	subs	r0, r3, #1
 	bl	__aeabi_uidiv
 	ldr	r3, [sp, #40]
-	ldr	r2, .L3164+12
+	ldr	r2, .L3170+12
 	ldr	r4, [sp, #40]
 	rsb	r3, r3, #1
 	str	r0, [sp, #44]
@@ -21792,44 +21841,44 @@ ftl_read:
 	str	r3, [sp, #24]
 	str	r3, [sp, #48]
 	str	r3, [sp, #32]
-.L3128:
+.L3134:
 	ldr	r3, [sp, #28]
-	cbnz	r3, .L3148
-	ldr	r3, .L3164+16
+	cbnz	r3, .L3154
+	ldr	r3, .L3170+16
 	ldrh	r3, [r3]
 	cmp	r3, #0
-	beq	.L3125
+	beq	.L3131
 	movs	r1, #1
 	ldr	r0, [sp, #28]
 	bl	rk_ftl_garbage_collect
-	b	.L3125
-.L3148:
+	b	.L3131
+.L3154:
 	movs	r2, #0
 	add	r1, sp, #84
 	mov	r0, r4
 	bl	log2phys
 	ldr	r3, [sp, #84]
 	adds	r0, r3, #1
-	bne	.L3129
-	ldr	fp, .L3164+8
+	bne	.L3135
+	ldr	fp, .L3170+8
 	mov	r8, #0
-.L3130:
+.L3136:
 	ldrh	r0, [fp]
 	cmp	r8, r0
-	bcc	.L3132
-.L3133:
+	bcc	.L3138
+.L3139:
 	ldr	r3, [sp, #28]
 	adds	r4, r4, #1
 	subs	r3, r3, #1
 	str	r3, [sp, #28]
-	beq	.L3137
-	ldr	r3, .L3164+20
+	beq	.L3143
+	ldr	r3, .L3170+20
 	ldrh	r3, [r3]
 	cmp	r5, r3, lsl #2
-	bne	.L3128
-.L3137:
+	bne	.L3134
+.L3143:
 	cmp	r5, #0
-	beq	.L3128
+	beq	.L3134
 	movs	r2, #0
 	mov	r1, r5
 	ldr	r0, [r10]
@@ -21844,7 +21893,7 @@ ftl_read:
 	ldr	r3, [sp, #48]
 	lsls	r3, r3, #9
 	str	r3, [sp, #64]
-.L3147:
+.L3153:
 	mov	r8, #36
 	ldr	r3, [r10]
 	mul	r8, r8, fp
@@ -21852,27 +21901,27 @@ ftl_read:
 	add	r3, r3, r8
 	ldr	r2, [r3, #16]
 	cmp	r1, r2
-	bne	.L3139
+	bne	.L3145
 	ldr	r1, [r3, #8]
-	ldr	r3, .L3164+24
+	ldr	r3, .L3170+24
 	ldr	r3, [r3]
 	cmp	r1, r3
-	bne	.L3140
+	bne	.L3146
 	ldr	r3, [sp, #60]
 	mov	r0, r7
 	ldr	r2, [sp, #64]
 	add	r1, r1, r3
-.L3163:
+.L3169:
 	bl	ftl_memcpy
-.L3140:
+.L3146:
 	ldr	r2, [r10]
 	add	r2, r2, r8
 	ldr	r3, [r2, #12]
 	ldr	lr, [r2, #16]
 	ldr	r0, [r3, #8]
 	cmp	lr, r0
-	beq	.L3141
-	ldr	ip, .L3164+32
+	beq	.L3147
+	ldr	ip, .L3170+32
 	ldr	r0, [ip, #72]
 	adds	r0, r0, #1
 	str	r0, [ip, #72]
@@ -21888,52 +21937,52 @@ ftl_read:
 	str	r0, [sp, #4]
 	ldr	r0, [r3, #4]
 	str	r0, [sp]
-	ldr	r0, .L3164+28
+	ldr	r0, .L3170+28
 	ldr	r3, [r3]
 	ldr	r2, [r2, #4]
 	bl	printf
-.L3141:
+.L3147:
 	ldr	r3, [r10]
 	add	r2, r3, r8
 	ldr	r3, [r3, r8]
 	adds	r1, r3, #1
-	bne	.L3142
-	ldr	r1, .L3164+32
+	bne	.L3148
+	ldr	r1, .L3170+32
 	str	r3, [sp, #32]
 	ldr	r2, [r1, #72]
 	adds	r2, r2, #1
 	str	r2, [r1, #72]
-.L3143:
+.L3149:
 	add	fp, fp, #1
 	cmp	r5, fp
-	bne	.L3147
+	bne	.L3153
 	movs	r5, #0
-	b	.L3128
-.L3132:
+	b	.L3134
+.L3138:
 	mla	r0, r0, r4, r8
 	cmp	r6, r0
-	bhi	.L3131
+	bhi	.L3137
 	ldr	r3, [sp, #36]
 	cmp	r3, r0
-	bls	.L3131
+	bls	.L3137
 	subs	r0, r0, r6
 	mov	r2, #512
 	movs	r1, #0
 	add	r0, r7, r0, lsl #9
 	bl	ftl_memset
-.L3131:
+.L3137:
 	add	r8, r8, #1
-	b	.L3130
-.L3129:
+	b	.L3136
+.L3135:
 	ldr	r2, [r10]
 	mov	r8, #36
 	mla	r8, r8, r5, r2
 	str	r3, [r8, #4]
 	ldr	r3, [sp, #40]
 	cmp	r4, r3
-	ldr	r3, .L3164+8
-	bne	.L3134
-	ldr	r2, .L3164+24
+	ldr	r3, .L3170+8
+	bne	.L3140
+	ldr	r2, .L3170+24
 	mov	r0, r6
 	ldrh	fp, [r3]
 	ldr	r2, [r2]
@@ -21948,11 +21997,11 @@ ftl_read:
 	movcs	r3, r2
 	cmp	fp, r3
 	str	r3, [sp, #48]
-	bne	.L3135
+	bne	.L3141
 	str	r7, [r8, #8]
-.L3135:
-	ldr	r3, .L3164+36
-	ldr	r2, .L3164+40
+.L3141:
+	ldr	r3, .L3170+36
+	ldr	r2, .L3170+40
 	str	r4, [r8, #16]
 	ldrh	r3, [r3]
 	ldr	r2, [r2]
@@ -21961,12 +22010,12 @@ ftl_read:
 	bic	r3, r3, #3
 	add	r3, r3, r2
 	str	r3, [r8, #12]
-	b	.L3133
-.L3134:
+	b	.L3139
+.L3140:
 	ldr	r2, [sp, #44]
 	cmp	r4, r2
-	bne	.L3136
-	ldr	r2, .L3164+44
+	bne	.L3142
+	ldr	r2, .L3170+44
 	ldr	r1, [sp, #36]
 	ldr	r2, [r2]
 	str	r2, [r8, #8]
@@ -21975,50 +22024,50 @@ ftl_read:
 	subs	r1, r1, r3
 	cmp	r2, r1
 	str	r1, [sp, #24]
-	bne	.L3135
-.L3162:
+	bne	.L3141
+.L3168:
 	subs	r3, r3, r6
 	add	r3, r7, r3, lsl #9
 	str	r3, [r8, #8]
-	b	.L3135
-.L3136:
+	b	.L3141
+.L3142:
 	ldrh	r3, [r3]
 	muls	r3, r4, r3
-	b	.L3162
-.L3139:
+	b	.L3168
+.L3145:
 	ldr	r1, [sp, #44]
 	cmp	r1, r2
-	bne	.L3140
+	bne	.L3146
 	ldr	r1, [r3, #8]
-	ldr	r3, .L3164+44
+	ldr	r3, .L3170+44
 	ldr	r3, [r3]
 	cmp	r1, r3
-	bne	.L3140
-	ldr	r3, .L3164+8
+	bne	.L3146
+	ldr	r3, .L3170+8
 	ldr	r2, [sp, #68]
 	ldrh	r0, [r3]
 	ldr	r3, [sp, #44]
 	muls	r0, r3, r0
 	subs	r0, r0, r6
 	add	r0, r7, r0, lsl #9
-	b	.L3163
-.L3142:
+	b	.L3169
+.L3148:
 	cmp	r3, #256
-	bne	.L3143
+	bne	.L3149
 	ldr	r0, [r2, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	mov	r8, r0
 	bl	FtlGcRefreshBlock
-	ldr	r2, .L3164+48
+	ldr	r2, .L3170+48
 	movw	r3, #2049
-.L3145:
+.L3151:
 	subs	r3, r3, #1
-	bne	.L3144
-.L3146:
+	bne	.L3150
+.L3152:
 	bl	FtlSysFlush
-	b	.L3143
-.L3144:
+	b	.L3149
+.L3150:
 	movs	r1, #1
 	str	r2, [sp, #76]
 	mov	r0, r1
@@ -22028,16 +22077,16 @@ ftl_read:
 	ldr	r3, [sp, #72]
 	ldrh	r1, [r2]
 	cmp	r1, r8
-	beq	.L3145
-	b	.L3146
-.L3149:
+	beq	.L3151
+	b	.L3152
+.L3155:
 	mov	r3, #-1
-.L3150:
+.L3156:
 	str	r3, [sp, #32]
-	b	.L3125
-.L3165:
+	b	.L3131
+.L3171:
 	.align	2
-.L3164:
+.L3170:
 	.word	.LANCHOR68
 	.word	.LANCHOR232
 	.word	.LANCHOR55
@@ -22045,7 +22094,7 @@ ftl_read:
 	.word	.LANCHOR116
 	.word	.LANCHOR38
 	.word	.LANCHOR186
-	.word	.LC64
+	.word	.LC65
 	.word	.LANCHOR138
 	.word	.LANCHOR58
 	.word	.LANCHOR189
@@ -22066,39 +22115,39 @@ FtlWrite:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, r3
-	ldr	r3, .L3214
+	ldr	r3, .L3220
 	sub	sp, sp, #80
 	mov	r6, r1
 	str	r2, [sp, #12]
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L3199
+	bne	.L3205
 	cmp	r0, #16
-	bne	.L3168
+	bne	.L3174
 	mov	r2, r10
 	ldr	r1, [sp, #12]
 	add	r0, r6, #256
 	bl	FtlVendorPartWrite
-.L3166:
+.L3172:
 	add	sp, sp, #80
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3168:
+.L3174:
 	ldr	r3, [sp, #12]
 	adds	r5, r1, r3
-	ldr	r3, .L3214+4
+	ldr	r3, .L3220+4
 	ldr	r3, [r3]
 	cmp	r5, r3
-	bhi	.L3200
-	ldr	r3, .L3214+8
+	bhi	.L3206
+	ldr	r3, .L3220+8
 	ldr	r0, [r3]
 	adds	r4, r0, #1
-	beq	.L3166
-	ldr	r3, .L3214+12
+	beq	.L3172
+	ldr	r3, .L3220+12
 	mov	r2, #2048
 	mov	r0, r6
 	str	r2, [r3]
-	ldr	r3, .L3214+16
+	ldr	r3, .L3220+16
 	ldrh	r4, [r3]
 	mov	r1, r4
 	bl	__aeabi_uidiv
@@ -22106,7 +22155,7 @@ FtlWrite:
 	mov	r8, r0
 	subs	r0, r5, #1
 	bl	__aeabi_uidiv
-	ldr	r2, .L3214+20
+	ldr	r2, .L3220+20
 	sub	r5, r0, r8
 	adds	r3, r5, #1
 	adds	r1, r5, #1
@@ -22115,29 +22164,29 @@ FtlWrite:
 	str	r0, [sp, #16]
 	add	r3, r3, r1
 	str	r3, [r2]
-	ldr	r3, .L3214+24
+	ldr	r3, .L3220+24
 	ldr	fp, [r3]
 	cmp	fp, #0
-	beq	.L3170
+	beq	.L3176
 	ldr	r3, [fp, #16]
 	cmp	r8, r3
-	beq	.L3171
+	beq	.L3177
 	bl	FtlCacheWriteBack
-.L3170:
-	ldr	r7, .L3214+28
+.L3176:
+	ldr	r7, .L3220+28
 	mov	r4, r8
-.L3172:
+.L3178:
 	ldr	r3, [sp, #4]
-	cbnz	r3, .L3198
+	cbnz	r3, .L3204
 	ldr	r3, [sp, #16]
 	ldr	r0, [sp, #4]
 	sub	r1, r3, r8
 	bl	rk_ftl_garbage_collect
-.L3199:
+.L3205:
 	movs	r0, #0
-	b	.L3166
-.L3171:
-	ldr	r2, .L3214+32
+	b	.L3172
+.L3177:
+	ldr	r2, .L3220+32
 	mov	r1, r4
 	mov	r0, r6
 	ldr	r3, [r2]
@@ -22157,7 +22206,7 @@ FtlWrite:
 	mov	r2, r7
 	bl	ftl_memcpy
 	cmp	r5, #0
-	beq	.L3199
+	beq	.L3205
 	ldr	r3, [sp, #12]
 	add	r6, r6, r4
 	add	r10, r10, r7
@@ -22166,27 +22215,27 @@ FtlWrite:
 	str	r3, [sp, #12]
 	bl	FtlCacheWriteBack
 	str	r5, [sp, #4]
-	b	.L3170
-.L3198:
-	ldr	r5, .L3214+36
+	b	.L3176
+.L3204:
+	ldr	r5, .L3220+36
 	ldrb	r2, [r7, #6]	@ zero_extendqisi2
 	ldrh	r3, [r5]
 	cmp	r2, r3
-	bcc	.L3173
-	ldr	r1, .L3214+40
+	bcc	.L3179
+	ldr	r1, .L3220+40
 	movw	r2, #1673
-	ldr	r0, .L3214+44
+	ldr	r0, .L3220+44
 	bl	printf
-	ldr	r1, .L3214+48
-	ldr	r0, .L3214+52
+	ldr	r1, .L3220+48
+	ldr	r0, .L3220+52
 	bl	printf
-.L3173:
+.L3179:
 	ldrh	r3, [r7, #4]
-	cbnz	r3, .L3174
+	cbnz	r3, .L3180
 	bl	FtlCacheWriteBack
 	mov	r0, r7
 	bl	allocate_new_data_superblock
-.L3174:
+.L3180:
 	ldrb	r3, [r7, #7]	@ zero_extendqisi2
 	ldrh	r2, [r7, #4]
 	lsls	r3, r3, #2
@@ -22201,24 +22250,24 @@ FtlWrite:
 	str	r3, [sp, #36]
 	ldrh	r3, [r5]
 	cmp	r2, r3
-	bcc	.L3175
-	ldr	r1, .L3214+40
+	bcc	.L3181
+	ldr	r1, .L3220+40
 	movw	r2, #1706
-	ldr	r0, .L3214+44
+	ldr	r0, .L3220+44
 	bl	printf
-	ldr	r1, .L3214+48
-	ldr	r0, .L3214+52
+	ldr	r1, .L3220+48
+	ldr	r0, .L3220+52
 	bl	printf
-.L3175:
+.L3181:
 	movs	r3, #0
-.L3213:
+.L3219:
 	str	r3, [sp, #8]
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #36]
 	cmp	r3, r2
-	bne	.L3196
-.L3177:
-	ldr	r0, .L3214+56
+	bne	.L3202
+.L3183:
+	ldr	r0, .L3220+56
 	mov	r3, r7
 	movs	r2, #0
 	ldr	r1, [sp, #8]
@@ -22227,24 +22276,24 @@ FtlWrite:
 	ldr	r3, [sp, #4]
 	ldr	r2, [sp, #8]
 	cmp	r3, r2
-	bcs	.L3197
-	ldr	r1, .L3214+40
+	bcs	.L3203
+	ldr	r1, .L3220+40
 	movw	r2, #1795
-	ldr	r0, .L3214+44
+	ldr	r0, .L3220+44
 	bl	printf
-	ldr	r1, .L3214+48
-	ldr	r0, .L3214+52
+	ldr	r1, .L3220+48
+	ldr	r0, .L3220+52
 	bl	printf
-.L3197:
+.L3203:
 	ldr	r3, [sp, #4]
 	ldr	r2, [sp, #8]
 	subs	r3, r3, r2
 	str	r3, [sp, #4]
-	b	.L3172
-.L3196:
+	b	.L3178
+.L3202:
 	ldrh	r3, [r7, #4]
 	cmp	r3, #0
-	beq	.L3177
+	beq	.L3183
 	movs	r2, #0
 	add	r1, sp, #40
 	mov	r0, r4
@@ -22253,9 +22302,9 @@ FtlWrite:
 	mov	r0, r7
 	bl	get_new_active_ppa
 	ldr	r3, [sp, #8]
-	ldr	r2, .L3214+60
+	ldr	r2, .L3220+60
 	muls	r5, r3, r5
-	ldr	r3, .L3214+56
+	ldr	r3, .L3220+56
 	ldrh	r2, [r2]
 	ldr	r1, [r3]
 	str	r3, [sp, #20]
@@ -22265,7 +22314,7 @@ FtlWrite:
 	str	r4, [r1, #16]
 	mul	r0, r2, r3
 	bic	r3, r0, #3
-	ldr	r0, .L3214+64
+	ldr	r0, .L3220+64
 	str	r3, [sp, #28]
 	ldr	r3, [r0]
 	ldr	r0, [sp, #28]
@@ -22276,12 +22325,12 @@ FtlWrite:
 	movs	r1, #0
 	bl	ftl_memset
 	cmp	r4, r8
-	ldr	r1, .L3214+16
-	beq	.L3178
+	ldr	r1, .L3220+16
+	beq	.L3184
 	ldr	r3, [sp, #16]
 	cmp	r3, r4
 	ldr	r3, [sp, #20]
-	bne	.L3209
+	bne	.L3215
 	ldr	r3, [sp, #12]
 	adds	r2, r6, r3
 	ldrh	r3, [r1]
@@ -22292,8 +22341,8 @@ FtlWrite:
 	str	r3, [sp, #20]
 	movs	r3, #0
 	str	r3, [sp, #24]
-	b	.L3181
-.L3178:
+	b	.L3187
+.L3184:
 	ldrh	r2, [r1]
 	mov	r0, r6
 	mov	r1, r2
@@ -22308,14 +22357,14 @@ FtlWrite:
 	it	cs
 	movcs	r3, r1
 	str	r3, [sp, #20]
-.L3181:
-	ldr	r3, .L3214+16
+.L3187:
+	ldr	r3, .L3220+16
 	ldr	r2, [sp, #20]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	ldr	r3, .L3214+56
+	ldr	r3, .L3220+56
 	ldr	r3, [r3]
-	bne	.L3182
+	bne	.L3188
 	cmp	r4, r8
 	add	r5, r5, r3
 	itett	ne
@@ -22326,25 +22375,25 @@ FtlWrite:
 	itt	ne
 	addne	r2, r10, r2, lsl #9
 	strne	r2, [r5, #8]
-.L3184:
-	ldr	r3, .L3214+36
+.L3190:
+	ldr	r3, .L3220+36
 	ldrb	r2, [r7, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L3193
-	ldr	r1, .L3214+40
+	bcc	.L3199
+	ldr	r1, .L3220+40
 	movw	r2, #1780
-	ldr	r0, .L3214+44
+	ldr	r0, .L3220+44
 	bl	printf
-	ldr	r1, .L3214+48
-	ldr	r0, .L3214+52
+	ldr	r1, .L3220+48
+	ldr	r0, .L3220+52
 	bl	printf
-.L3193:
+.L3199:
 	ldr	r2, [sp, #32]
 	movw	r3, #61589
 	ldr	r1, [sp, #28]
 	strh	r3, [r2, r1]	@ movhi
-	ldr	r2, .L3214+68
+	ldr	r2, .L3220+68
 	str	r4, [fp, #8]
 	adds	r4, r4, #1
 	ldr	r3, [r2]
@@ -22360,10 +22409,10 @@ FtlWrite:
 	strh	r3, [fp, #2]	@ movhi
 	ldr	r3, [sp, #8]
 	adds	r3, r3, #1
-	b	.L3213
-.L3215:
+	b	.L3219
+.L3221:
 	.align	2
-.L3214:
+.L3220:
 	.word	.LANCHOR76
 	.word	.LANCHOR68
 	.word	.LANCHOR232
@@ -22382,18 +22431,18 @@ FtlWrite:
 	.word	.LANCHOR58
 	.word	.LANCHOR189
 	.word	.LANCHOR160
-.L3182:
+.L3188:
 	cmp	r4, r8
 	add	r3, r3, r5
 	ite	eq
-	ldreq	r2, .L3216
-	ldrne	r2, .L3216+4
+	ldreq	r2, .L3222
+	ldrne	r2, .L3222+4
 	ldr	r2, [r2]
 	str	r2, [r3, #8]
 	ldr	r2, [sp, #40]
-	ldr	r3, .L3216+8
+	ldr	r3, .L3222+8
 	adds	r0, r2, #1
-	beq	.L3187
+	beq	.L3193
 	ldr	r3, [r3]
 	movs	r1, #1
 	str	r2, [sp, #48]
@@ -22408,60 +22457,60 @@ FtlWrite:
 	bl	FlashReadPages
 	ldr	r3, [sp, #44]
 	adds	r3, r3, #1
-	bne	.L3188
-	ldr	r2, .L3216+12
+	bne	.L3194
+	ldr	r2, .L3222+12
 	ldr	r3, [r2, #72]
 	adds	r3, r3, #1
 	str	r3, [r2, #72]
-.L3191:
+.L3197:
 	ldr	r2, [sp, #20]
 	cmp	r4, r8
-	ldr	r3, .L3216+8
+	ldr	r3, .L3222+8
 	lsl	r2, r2, #9
-	bne	.L3192
+	bne	.L3198
 	ldr	r3, [r3]
 	mov	r1, r10
 	add	r5, r5, r3
 	ldr	r3, [sp, #24]
 	ldr	r0, [r5, #8]
 	add	r0, r0, r3, lsl #9
-.L3211:
+.L3217:
 	bl	ftl_memcpy
-	b	.L3184
-.L3188:
+	b	.L3190
+.L3194:
 	ldr	r1, [fp, #8]
 	cmp	r4, r1
-	beq	.L3190
-	ldr	r2, .L3216+12
-	ldr	r0, .L3216+16
+	beq	.L3196
+	ldr	r2, .L3222+12
+	ldr	r0, .L3222+16
 	ldr	r3, [r2, #72]
 	adds	r3, r3, #1
 	str	r3, [r2, #72]
 	mov	r2, r4
 	bl	printf
-.L3190:
+.L3196:
 	ldr	r3, [fp, #8]
 	cmp	r4, r3
-	beq	.L3191
+	beq	.L3197
 	movw	r2, #1759
-	ldr	r1, .L3216+20
-	ldr	r0, .L3216+24
+	ldr	r1, .L3222+20
+	ldr	r0, .L3222+24
 	bl	printf
-	ldr	r1, .L3216+28
-	ldr	r0, .L3216+32
+	ldr	r1, .L3222+28
+	ldr	r0, .L3222+32
 	bl	printf
-	b	.L3191
-.L3187:
+	b	.L3197
+.L3193:
 	ldr	r3, [r3]
 	movs	r1, #0
-	ldr	r2, .L3216+36
+	ldr	r2, .L3222+36
 	add	r3, r3, r5
 	ldrh	r2, [r2]
 	ldr	r0, [r3, #8]
 	bl	ftl_memset
-	b	.L3191
-.L3192:
-	ldr	r1, .L3216+40
+	b	.L3197
+.L3198:
+	ldr	r1, .L3222+40
 	ldr	r3, [r3]
 	ldrh	r1, [r1]
 	add	r5, r5, r3
@@ -22469,8 +22518,8 @@ FtlWrite:
 	muls	r1, r4, r1
 	subs	r1, r1, r6
 	add	r1, r10, r1, lsl #9
-	b	.L3211
-.L3209:
+	b	.L3217
+.L3215:
 	ldr	r3, [r3]
 	add	r5, r5, r3
 	ldrh	r3, [r1]
@@ -22478,18 +22527,18 @@ FtlWrite:
 	subs	r3, r3, r6
 	add	r3, r10, r3, lsl #9
 	str	r3, [r5, #8]
-	b	.L3184
-.L3200:
+	b	.L3190
+.L3206:
 	mov	r0, #-1
-	b	.L3166
-.L3217:
+	b	.L3172
+.L3223:
 	.align	2
-.L3216:
+.L3222:
 	.word	.LANCHOR186
 	.word	.LANCHOR187
 	.word	.LANCHOR182
 	.word	.LANCHOR138
-	.word	.LC77
+	.word	.LC78
 	.word	.LANCHOR250
 	.word	.LC5
 	.word	.LC6
@@ -22585,11 +22634,11 @@ ftl_write:
 	mov	r4, r2
 	mov	r5, r3
 	mov	r6, r0
-	cbnz	r0, .L3223
+	cbnz	r0, .L3229
 	mov	r3, r2
 	mov	r2, r5
 	bl	idb_write_data
-.L3223:
+.L3229:
 	mov	r3, r5
 	mov	r2, r4
 	mov	r1, r7
@@ -22610,27 +22659,27 @@ FtlDumpSysBlock:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	lsl	r10, r0, #10
-	ldr	r5, .L3231
+	ldr	r5, .L3237
 	sub	sp, sp, #24
 	mov	r7, r0
 	movs	r6, #0
-	ldr	r4, .L3231+4
+	ldr	r4, .L3237+4
 	ldr	r3, [r5]
-	ldr	r8, .L3231+20
+	ldr	r8, .L3237+20
 	mov	fp, r4
 	str	r3, [r4, #8]
-	ldr	r3, .L3231+8
+	ldr	r3, .L3237+8
 	ldr	r3, [r3]
 	str	r3, [r4, #12]
-.L3225:
+.L3231:
 	ldrh	r2, [r8]
 	sxth	r3, r6
 	cmp	r3, r2
-	blt	.L3227
+	blt	.L3233
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3227:
+.L3233:
 	movs	r2, #1
 	orr	r3, r3, r10
 	mov	r1, r2
@@ -22640,7 +22689,7 @@ FtlDumpSysBlock:
 	ldr	r2, [r4, #8]
 	mov	r1, r7
 	ldr	r3, [r4, #12]
-	ldr	r0, .L3231+12
+	ldr	r0, .L3237+12
 	ldr	r2, [r2]
 	str	r2, [sp, #16]
 	ldr	r2, [r3, #12]
@@ -22656,23 +22705,23 @@ FtlDumpSysBlock:
 	ldr	r3, [r4, #12]
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L3226
+	beq	.L3232
 	mov	r3, #768
 	movs	r2, #4
 	ldr	r1, [r5]
-	ldr	r0, .L3231+16
+	ldr	r0, .L3237+16
 	bl	rknand_print_hex
-.L3226:
-	adds	r6, r6, #1
-	b	.L3225
 .L3232:
+	adds	r6, r6, #1
+	b	.L3231
+.L3238:
 	.align	2
-.L3231:
+.L3237:
 	.word	.LANCHOR183
 	.word	.LANCHOR203
 	.word	.LANCHOR188
-	.word	.LC78
 	.word	.LC79
+	.word	.LC80
 	.word	.LANCHOR53
 	.size	FtlDumpSysBlock, .-FtlDumpSysBlock
 	.section	.text.dump_map_info,"ax",%progbits
@@ -22686,32 +22735,32 @@ FtlDumpSysBlock:
 dump_map_info:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L3247
+	ldr	r3, .L3253
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #40
-	ldr	r8, .L3247+72
+	ldr	r8, .L3253+72
 	ldrh	r5, [r3]
-.L3234:
-	ldr	r3, .L3247+4
+.L3240:
+	ldr	r3, .L3253+4
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	bhi	.L3241
-	ldr	r4, .L3247+8
+	bhi	.L3247
+	ldr	r4, .L3253+8
 	movs	r7, #0
-.L3242:
-	ldr	r3, .L3247+12
+.L3248:
+	ldr	r3, .L3253+12
 	sxth	r5, r7
 	ldrh	r3, [r3]
 	cmp	r5, r3
-	bge	.L3245
+	bge	.L3251
 	lsls	r5, r5, #1
 	movs	r6, #0
-	ldr	r8, .L3247+76
-	b	.L3246
-.L3236:
+	ldr	r8, .L3253+76
+	b	.L3252
+.L3242:
 	str	r3, [sp, #36]
 	mov	r1, r5
-	ldr	r3, .L3247+16
+	ldr	r3, .L3253+16
 	str	r2, [sp, #32]
 	ldrb	r0, [r3, r6]	@ zero_extendqisi2
 	bl	V2P_block
@@ -22719,7 +22768,7 @@ dump_map_info:
 	bl	FtlBbmIsBadBlock
 	ldr	r2, [sp, #32]
 	ldr	r3, [sp, #36]
-	cbnz	r0, .L3235
+	cbnz	r0, .L3241
 	ldr	r1, [sp, #28]
 	mla	r0, fp, r4, r7
 	lsls	r1, r1, #10
@@ -22732,29 +22781,29 @@ dump_map_info:
 	ldr	r1, [sp, #24]
 	add	r1, r1, ip
 	str	r1, [r0, #12]
-.L3235:
+.L3241:
 	adds	r6, r6, #1
-.L3243:
+.L3249:
 	uxth	r1, r6
 	cmp	r2, r1
-	bhi	.L3236
-	cbnz	r4, .L3237
-.L3240:
+	bhi	.L3242
+	cbnz	r4, .L3243
+.L3246:
 	adds	r5, r5, #1
 	uxth	r5, r5
-	b	.L3234
-.L3237:
-	ldr	r10, .L3247+80
+	b	.L3240
+.L3243:
+	ldr	r10, .L3253+80
 	mov	r0, r7
 	movs	r6, #0
 	movs	r7, #36
 	movs	r2, #1
 	mov	r1, r4
 	bl	FlashReadPages
-.L3238:
+.L3244:
 	uxth	r3, r6
 	cmp	r4, r3
-	bls	.L3240
+	bls	.L3246
 	ldr	r3, [r8]
 	mla	r3, r7, r6, r3
 	adds	r6, r6, #1
@@ -22775,24 +22824,24 @@ dump_map_info:
 	ldr	r3, [r1]
 	ubfx	r1, r2, #10, #16
 	bl	printf
-	b	.L3238
-.L3241:
-	ldr	r1, .L3247+20
+	b	.L3244
+.L3247:
+	ldr	r1, .L3253+20
 	movs	r6, #0
-	ldr	r3, .L3247+24
+	ldr	r3, .L3253+24
 	mov	r4, r6
 	ldr	r7, [r8]
 	mov	fp, #36
 	ldr	r1, [r1]
 	ldrh	r2, [r3]
-	ldr	r3, .L3247+28
+	ldr	r3, .L3253+28
 	str	r1, [sp, #24]
-	ldr	r1, .L3247+32
+	ldr	r1, .L3253+32
 	ldr	r3, [r3]
 	ldrh	r10, [r1]
-	b	.L3243
-.L3244:
-	ldr	r10, .L3247+44
+	b	.L3249
+.L3250:
+	ldr	r10, .L3253+44
 	mov	r0, r4
 	ldr	r2, [r10]
 	ldrh	r2, [r2, r5]
@@ -22808,7 +22857,7 @@ dump_map_info:
 	ldrh	r1, [r1, r5]
 	str	r0, [sp, #20]
 	ldr	r2, [r2]
-	ldr	r0, .L3247+36
+	ldr	r0, .L3253+36
 	str	r2, [sp, #16]
 	ldr	r2, [r3, #12]
 	str	r2, [sp, #12]
@@ -22820,41 +22869,41 @@ dump_map_info:
 	str	r3, [sp]
 	ldm	r4, {r2, r3}
 	bl	printf
-.L3246:
+.L3252:
 	ldrh	r2, [r8]
 	sxth	r3, r6
 	adds	r6, r6, #1
 	cmp	r3, r2
-	blt	.L3244
+	blt	.L3250
 	adds	r7, r7, #1
-	b	.L3242
-.L3245:
-	ldr	r3, .L3247+40
+	b	.L3248
+.L3251:
+	ldr	r3, .L3253+40
 	movs	r2, #2
-	ldr	r1, .L3247+44
-	ldr	r0, .L3247+48
+	ldr	r1, .L3253+44
+	ldr	r0, .L3253+48
 	ldr	r3, [r3]
 	ldr	r1, [r1]
 	bl	rknand_print_hex
-	ldr	r4, .L3247+52
+	ldr	r4, .L3253+52
 	movs	r2, #4
-	ldr	r1, .L3247+56
-	ldr	r0, .L3247+60
+	ldr	r1, .L3253+56
+	ldr	r0, .L3253+60
 	ldrh	r3, [r4]
 	ldr	r1, [r1]
 	bl	rknand_print_hex
-	ldr	r1, .L3247+64
+	ldr	r1, .L3253+64
 	movs	r2, #4
 	ldrh	r3, [r4]
-	ldr	r0, .L3247+68
+	ldr	r0, .L3253+68
 	ldr	r1, [r1]
 	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
 	b	rknand_print_hex
-.L3248:
+.L3254:
 	.align	2
-.L3247:
+.L3253:
 	.word	.LANCHOR40
 	.word	.LANCHOR41
 	.word	.LANCHOR203
@@ -22864,18 +22913,18 @@ dump_map_info:
 	.word	.LANCHOR38
 	.word	.LANCHOR104
 	.word	.LANCHOR58
-	.word	.LC48
+	.word	.LC49
 	.word	.LANCHOR64
 	.word	.LANCHOR129
-	.word	.LC81
+	.word	.LC82
 	.word	.LANCHOR66
 	.word	.LANCHOR131
-	.word	.LC82
-	.word	.LANCHOR195
 	.word	.LC83
+	.word	.LANCHOR195
+	.word	.LC84
 	.word	.LANCHOR180
 	.word	.LANCHOR53
-	.word	.LC80
+	.word	.LC81
 	.size	dump_map_info, .-dump_map_info
 	.global	FtlMallocOffset
 	.global	FtlMallocBuffer
@@ -27301,7 +27350,7 @@ refValueDefault:
 .LC32:
 	.ascii	"prog read d error: = %x %x %x\012\000"
 	.section	.rodata.FlashReadFacBbtData.str1.1,"aMS",%progbits,1
-.LC55:
+.LC56:
 	.ascii	"BBT:\000"
 	.section	.rodata.FlashReadIdbDataRaw.str1.1,"aMS",%progbits,1
 .LC14:
@@ -27331,25 +27380,25 @@ refValueDefault:
 .LC35:
 	.ascii	"FtlBbmTblFlush error = %x error count = %d\012\000"
 	.section	.rodata.FtlCheckVpc.str1.1,"aMS",%progbits,1
-.LC60:
-	.ascii	"FtlCheckVpc2 %x = %x  %x\012\000"
 .LC61:
+	.ascii	"FtlCheckVpc2 %x = %x  %x\012\000"
+.LC62:
 	.ascii	"free blk vpc error %x = %x  %x\012\000"
 	.section	.rodata.FtlDumpBlockInfo.str1.1,"aMS",%progbits,1
-.LC45:
-	.ascii	"...%s enter...\012\000"
 .LC46:
-	.ascii	"superBlkID = %x vpc=%x\012\000"
+	.ascii	"...%s enter...\012\000"
 .LC47:
-	.ascii	"flashmode = %x pagenum = %x %x\012\000"
+	.ascii	"superBlkID = %x vpc=%x\012\000"
 .LC48:
+	.ascii	"flashmode = %x pagenum = %x %x\012\000"
+.LC49:
 	.ascii	"id = %x,%x addr= %x,spare= %x %x %x %x data=%x %x\012"
 	.ascii	"\000"
 	.section	.rodata.FtlDumpSysBlock.str1.1,"aMS",%progbits,1
-.LC78:
+.LC79:
 	.ascii	"id = %x,%x addr= %x,spare= %x %x %x %x data = %x\012"
 	.ascii	"\000"
-.LC79:
+.LC80:
 	.ascii	":\000"
 	.section	.rodata.FtlFreeSysBlkQueueOut.str1.1,"aMS",%progbits,1
 .LC3:
@@ -27358,46 +27407,50 @@ refValueDefault:
 	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\012"
 	.ascii	"\000"
 	.section	.rodata.FtlGcFreeTempBlock.str1.1,"aMS",%progbits,1
-.LC70:
+.LC71:
 	.ascii	"GC des block %x done\012\000"
 	.section	.rodata.FtlGcScanTempBlk.str1.1,"aMS",%progbits,1
-.LC68:
-	.ascii	"FtlGcScanTempBlk Error ID %x %x!!!!!!! \012\000"
 .LC69:
+	.ascii	"FtlGcScanTempBlk Error ID %x %x!!!!!!! \012\000"
+.LC70:
 	.ascii	"FtlGcScanTempBlkError ID %x %x!!!!!!!\012\000"
 	.section	.rodata.FtlInit.str1.1,"aMS",%progbits,1
-.LC71:
-	.ascii	"FTL version: 5.0.56 20190508\000"
 .LC72:
+	.ascii	"FTL version: 5.0.57 20190828\000"
+.LC73:
 	.ascii	"...%s: no bad block mapping table, format device\012"
 	.ascii	"\000"
-.LC73:
+.LC74:
 	.ascii	"...%s FtlSysBlkInit error ,format device!\012\000"
 	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",%progbits,1
 .LC43:
 	.ascii	"no ect\000"
+	.section	.rodata.FtlLoadSysInfo.str1.1,"aMS",%progbits,1
+.LC45:
+	.ascii	"id = %x,%x addr= %x,spare= %x %x %x %x data= %x\012"
+	.ascii	"\000"
 	.section	.rodata.FtlMapWritePage.str1.1,"aMS",%progbits,1
 .LC40:
 	.ascii	"FtlMapWritePage error = %x\012\000"
 .LC41:
 	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
 	.section	.rodata.FtlProgPages.str1.1,"aMS",%progbits,1
-.LC59:
+.LC60:
 	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
 	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",%progbits,1
-.LC65:
-	.ascii	"RSB refresh addr %x\012\000"
 .LC66:
-	.ascii	"spuer block %x vpn is 0\012 \000"
+	.ascii	"RSB refresh addr %x\012\000"
 .LC67:
+	.ascii	"spuer block %x vpn is 0\012 \000"
+.LC68:
 	.ascii	"g_recovery_ppa %x ver %x\012 \000"
 	.section	.rodata.FtlScanAllBlock.str1.1,"aMS",%progbits,1
-.LC49:
-	.ascii	"blk = %x vpc=%x mode = %x\012\000"
 .LC50:
+	.ascii	"blk = %x vpc=%x mode = %x\012\000"
+.LC51:
 	.ascii	"mlc id = %x,%x addr= %x,spare= %x %x %x %x data=%x "
 	.ascii	"%x\012\000"
-.LC51:
+.LC52:
 	.ascii	"slc id = %x,%x addr= %x,spare= %x %x %x %x data=%x "
 	.ascii	"%x\012\000"
 	.section	.rodata.FtlVendorPartRead.str1.1,"aMS",%progbits,1
@@ -27407,17 +27460,17 @@ refValueDefault:
 .LC38:
 	.ascii	"FtlVpcTblFlush error = %x error count = %d\012\000"
 	.section	.rodata.FtlWrite.str1.1,"aMS",%progbits,1
-.LC77:
+.LC78:
 	.ascii	"FtlWrite: lpa error:%x %x\012\000"
 	.section	.rodata.Ftl_load_ext_data.str1.1,"aMS",%progbits,1
 .LC44:
 	.ascii	"slc mode\000"
 	.section	.rodata.Ftlscanalldata.str1.1,"aMS",%progbits,1
-.LC62:
-	.ascii	"Ftlscanalldata = %x\012\000"
 .LC63:
-	.ascii	"scan lpa = %x ppa= %x\012\000"
+	.ascii	"Ftlscanalldata = %x\012\000"
 .LC64:
+	.ascii	"scan lpa = %x ppa= %x\012\000"
+.LC65:
 	.ascii	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\012"
 	.ascii	"\000"
 	.section	.rodata.HynixGetReadRetryDefault.str1.1,"aMS",%progbits,1
@@ -27435,209 +27488,209 @@ refValueDefault:
 	.section	.rodata.MicronReadRetrial.str1.1,"aMS",%progbits,1
 .LC13:
 	.ascii	"micron RR %d row=%x,count %d,status=%d\012\000"
-	.section	.rodata.__func__.10524,"a",%progbits
+	.section	.rodata.__func__.10478,"a",%progbits
 	.set	.LANCHOR248,. + 0
-	.type	__func__.10524, %object
-	.size	__func__.10524, 8
-__func__.10524:
+	.type	__func__.10478, %object
+	.size	__func__.10478, 8
+__func__.10478:
 	.ascii	"FtlInit\000"
-	.section	.rodata.__func__.10585,"a",%progbits
+	.section	.rodata.__func__.10539,"a",%progbits
 	.set	.LANCHOR230,. + 0
-	.type	__func__.10585, %object
-	.size	__func__.10585, 13
-__func__.10585:
+	.type	__func__.10539, %object
+	.size	__func__.10539, 13
+__func__.10539:
 	.ascii	"FtlProgPages\000"
-	.section	.rodata.__func__.10611,"a",%progbits
+	.section	.rodata.__func__.10565,"a",%progbits
 	.set	.LANCHOR250,. + 0
-	.type	__func__.10611, %object
-	.size	__func__.10611, 9
-__func__.10611:
+	.type	__func__.10565, %object
+	.size	__func__.10565, 9
+__func__.10565:
 	.ascii	"FtlWrite\000"
-	.section	.rodata.__func__.10694,"a",%progbits
+	.section	.rodata.__func__.10648,"a",%progbits
 	.set	.LANCHOR124,. + 0
-	.type	__func__.10694, %object
-	.size	__func__.10694, 14
-__func__.10694:
+	.type	__func__.10648, %object
+	.size	__func__.10648, 14
+__func__.10648:
 	.ascii	"FtlBbt2Bitmap\000"
-	.section	.rodata.__func__.10740,"a",%progbits
+	.section	.rodata.__func__.10694,"a",%progbits
 	.set	.LANCHOR212,. + 0
-	.type	__func__.10740, %object
-	.size	__func__.10740, 11
-__func__.10740:
+	.type	__func__.10694, %object
+	.size	__func__.10694, 11
+__func__.10694:
 	.ascii	"FtlLoadBbt\000"
-	.section	.rodata.__func__.10833,"a",%progbits
+	.section	.rodata.__func__.10787,"a",%progbits
 	.set	.LANCHOR89,. + 0
-	.type	__func__.10833, %object
-	.size	__func__.10833, 17
-__func__.10833:
+	.type	__func__.10787, %object
+	.size	__func__.10787, 17
+__func__.10787:
 	.ascii	"INSERT_FREE_LIST\000"
-	.section	.rodata.__func__.10837,"a",%progbits
+	.section	.rodata.__func__.10791,"a",%progbits
 	.set	.LANCHOR86,. + 0
-	.type	__func__.10837, %object
-	.size	__func__.10837, 17
-__func__.10837:
+	.type	__func__.10791, %object
+	.size	__func__.10791, 17
+__func__.10791:
 	.ascii	"INSERT_DATA_LIST\000"
-	.section	.rodata.__func__.10874,"a",%progbits
+	.section	.rodata.__func__.10828,"a",%progbits
 	.set	.LANCHOR90,. + 0
-	.type	__func__.10874, %object
-	.size	__func__.10874, 17
-__func__.10874:
+	.type	__func__.10828, %object
+	.size	__func__.10828, 17
+__func__.10828:
 	.ascii	"List_remove_node\000"
-	.section	.rodata.__func__.10904,"a",%progbits
+	.section	.rodata.__func__.10858,"a",%progbits
 	.set	.LANCHOR94,. + 0
-	.type	__func__.10904, %object
-	.size	__func__.10904, 22
-__func__.10904:
+	.type	__func__.10858, %object
+	.size	__func__.10858, 22
+__func__.10858:
 	.ascii	"List_update_data_list\000"
-	.section	.rodata.__func__.10911,"a",%progbits
+	.section	.rodata.__func__.10865,"a",%progbits
 	.set	.LANCHOR229,. + 0
-	.type	__func__.10911, %object
-	.size	__func__.10911, 20
-__func__.10911:
+	.type	__func__.10865, %object
+	.size	__func__.10865, 20
+__func__.10865:
 	.ascii	"ftl_load_l2p_region\000"
-	.section	.rodata.__func__.10942,"a",%progbits
+	.section	.rodata.__func__.10896,"a",%progbits
 	.set	.LANCHOR95,. + 0
-	.type	__func__.10942, %object
-	.size	__func__.10942, 26
-__func__.10942:
+	.type	__func__.10896, %object
+	.size	__func__.10896, 26
+__func__.10896:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.section	.rodata.__func__.10952,"a",%progbits
+	.section	.rodata.__func__.10906,"a",%progbits
 	.set	.LANCHOR213,. + 0
-	.type	__func__.10952, %object
-	.size	__func__.10952, 15
-__func__.10952:
+	.type	__func__.10906, %object
+	.size	__func__.10906, 15
+__func__.10906:
 	.ascii	"ftl_map_blk_gc\000"
-	.section	.rodata.__func__.10965,"a",%progbits
+	.section	.rodata.__func__.10919,"a",%progbits
 	.set	.LANCHOR214,. + 0
-	.type	__func__.10965, %object
-	.size	__func__.10965, 31
-__func__.10965:
+	.type	__func__.10919, %object
+	.size	__func__.10919, 31
+__func__.10919:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.section	.rodata.__func__.10978,"a",%progbits
+	.section	.rodata.__func__.10932,"a",%progbits
 	.set	.LANCHOR215,. + 0
-	.type	__func__.10978, %object
-	.size	__func__.10978, 16
-__func__.10978:
+	.type	__func__.10932, %object
+	.size	__func__.10932, 16
+__func__.10932:
 	.ascii	"FtlMapWritePage\000"
-	.section	.rodata.__func__.10998,"a",%progbits
+	.section	.rodata.__func__.10952,"a",%progbits
 	.set	.LANCHOR98,. + 0
-	.type	__func__.10998, %object
-	.size	__func__.10998, 22
-__func__.10998:
+	.type	__func__.10952, %object
+	.size	__func__.10952, 22
+__func__.10952:
 	.ascii	"select_l2p_ram_region\000"
-	.section	.rodata.__func__.11014,"a",%progbits
+	.section	.rodata.__func__.10968,"a",%progbits
 	.set	.LANCHOR228,. + 0
-	.type	__func__.11014, %object
-	.size	__func__.11014, 9
-__func__.11014:
+	.type	__func__.10968, %object
+	.size	__func__.10968, 9
+__func__.10968:
 	.ascii	"log2phys\000"
-	.section	.rodata.__func__.11076,"a",%progbits
+	.section	.rodata.__func__.11030,"a",%progbits
 	.set	.LANCHOR211,. + 0
-	.type	__func__.11076, %object
-	.size	__func__.11076, 15
-__func__.11076:
+	.type	__func__.11030, %object
+	.size	__func__.11030, 15
+__func__.11030:
 	.ascii	"FtlVpcTblFlush\000"
-	.section	.rodata.__func__.11095,"a",%progbits
+	.section	.rodata.__func__.11049,"a",%progbits
 	.set	.LANCHOR221,. + 0
-	.type	__func__.11095, %object
-	.size	__func__.11095, 14
-__func__.11095:
+	.type	__func__.11049, %object
+	.size	__func__.11049, 14
+__func__.11049:
 	.ascii	"FtlScanSysBlk\000"
-	.section	.rodata.__func__.11150,"a",%progbits
+	.section	.rodata.__func__.11104,"a",%progbits
 	.set	.LANCHOR222,. + 0
-	.type	__func__.11150, %object
-	.size	__func__.11150, 15
-__func__.11150:
+	.type	__func__.11104, %object
+	.size	__func__.11104, 15
+__func__.11104:
 	.ascii	"FtlLoadSysInfo\000"
-	.section	.rodata.__func__.11161,"a",%progbits
+	.section	.rodata.__func__.11115,"a",%progbits
 	.set	.LANCHOR234,. + 0
-	.type	__func__.11161, %object
-	.size	__func__.11161, 12
-__func__.11161:
+	.type	__func__.11115, %object
+	.size	__func__.11115, 12
+__func__.11115:
 	.ascii	"FtlCheckVpc\000"
-	.section	.rodata.__func__.11193,"a",%progbits
+	.section	.rodata.__func__.11147,"a",%progbits
 	.set	.LANCHOR225,. + 0
-	.type	__func__.11193, %object
-	.size	__func__.11193, 17
-__func__.11193:
+	.type	__func__.11147, %object
+	.size	__func__.11147, 17
+__func__.11147:
 	.ascii	"FtlDumpBlockInfo\000"
-	.section	.rodata.__func__.11212,"a",%progbits
+	.section	.rodata.__func__.11166,"a",%progbits
 	.set	.LANCHOR226,. + 0
-	.type	__func__.11212, %object
-	.size	__func__.11212, 16
-__func__.11212:
+	.type	__func__.11166, %object
+	.size	__func__.11166, 16
+__func__.11166:
 	.ascii	"FtlScanAllBlock\000"
-	.section	.rodata.__func__.11317,"a",%progbits
+	.section	.rodata.__func__.11271,"a",%progbits
 	.set	.LANCHOR235,. + 0
-	.type	__func__.11317, %object
-	.size	__func__.11317, 16
-__func__.11317:
+	.type	__func__.11271, %object
+	.size	__func__.11271, 16
+__func__.11271:
 	.ascii	"FtlReUsePrevPpa\000"
-	.section	.rodata.__func__.11350,"a",%progbits
+	.section	.rodata.__func__.11304,"a",%progbits
 	.set	.LANCHOR236,. + 0
-	.type	__func__.11350, %object
-	.size	__func__.11350, 22
-__func__.11350:
+	.type	__func__.11304, %object
+	.size	__func__.11304, 22
+__func__.11304:
 	.ascii	"FtlRecoverySuperblock\000"
-	.section	.rodata.__func__.11404,"a",%progbits
+	.section	.rodata.__func__.11358,"a",%progbits
 	.set	.LANCHOR101,. + 0
-	.type	__func__.11404, %object
-	.size	__func__.11404, 16
-__func__.11404:
+	.type	__func__.11358, %object
+	.size	__func__.11358, 16
+__func__.11358:
 	.ascii	"make_superblock\000"
-	.section	.rodata.__func__.11424,"a",%progbits
+	.section	.rodata.__func__.11378,"a",%progbits
 	.set	.LANCHOR140,. + 0
-	.type	__func__.11424, %object
-	.size	__func__.11424, 18
-__func__.11424:
+	.type	__func__.11378, %object
+	.size	__func__.11378, 18
+__func__.11378:
 	.ascii	"SupperBlkListInit\000"
-	.section	.rodata.__func__.11468,"a",%progbits
+	.section	.rodata.__func__.11422,"a",%progbits
 	.set	.LANCHOR227,. + 0
-	.type	__func__.11468, %object
-	.size	__func__.11468, 17
-__func__.11468:
+	.type	__func__.11422, %object
+	.size	__func__.11422, 17
+__func__.11422:
 	.ascii	"ftl_scan_all_ppa\000"
-	.section	.rodata.__func__.11513,"a",%progbits
+	.section	.rodata.__func__.11467,"a",%progbits
 	.set	.LANCHOR204,. + 0
-	.type	__func__.11513, %object
-	.size	__func__.11513, 25
-__func__.11513:
+	.type	__func__.11467, %object
+	.size	__func__.11467, 25
+__func__.11467:
 	.ascii	"allocate_data_superblock\000"
-	.section	.rodata.__func__.11527,"a",%progbits
+	.section	.rodata.__func__.11481,"a",%progbits
 	.set	.LANCHOR220,. + 0
-	.type	__func__.11527, %object
-	.size	__func__.11527, 29
-__func__.11527:
+	.type	__func__.11481, %object
+	.size	__func__.11481, 29
+__func__.11481:
 	.ascii	"allocate_new_data_superblock\000"
-	.section	.rodata.__func__.11533,"a",%progbits
+	.section	.rodata.__func__.11487,"a",%progbits
 	.set	.LANCHOR209,. + 0
-	.type	__func__.11533, %object
-	.size	__func__.11533, 19
-__func__.11533:
+	.type	__func__.11487, %object
+	.size	__func__.11487, 19
+__func__.11487:
 	.ascii	"get_new_active_ppa\000"
-	.section	.rodata.__func__.11544,"a",%progbits
+	.section	.rodata.__func__.11498,"a",%progbits
 	.set	.LANCHOR207,. + 0
-	.type	__func__.11544, %object
-	.size	__func__.11544, 16
-__func__.11544:
+	.type	__func__.11498, %object
+	.size	__func__.11498, 16
+__func__.11498:
 	.ascii	"update_vpc_list\000"
-	.section	.rodata.__func__.11549,"a",%progbits
+	.section	.rodata.__func__.11503,"a",%progbits
 	.set	.LANCHOR208,. + 0
-	.type	__func__.11549, %object
-	.size	__func__.11549, 20
-__func__.11549:
+	.type	__func__.11503, %object
+	.size	__func__.11503, 20
+__func__.11503:
 	.ascii	"decrement_vpc_count\000"
-	.section	.rodata.__func__.11617,"a",%progbits
+	.section	.rodata.__func__.11571,"a",%progbits
 	.set	.LANCHOR242,. + 0
-	.type	__func__.11617, %object
-	.size	__func__.11617, 19
-__func__.11617:
+	.type	__func__.11571, %object
+	.size	__func__.11571, 19
+__func__.11571:
 	.ascii	"FtlGcFreeTempBlock\000"
-	.section	.rodata.__func__.11717,"a",%progbits
+	.section	.rodata.__func__.11671,"a",%progbits
 	.set	.LANCHOR246,. + 0
-	.type	__func__.11717, %object
-	.size	__func__.11717, 23
-__func__.11717:
+	.type	__func__.11671, %object
+	.size	__func__.11671, 23
+__func__.11671:
 	.ascii	"rk_ftl_garbage_collect\000"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",%progbits,1
 .LC36:
@@ -27645,19 +27698,19 @@ __func__.11717:
 .LC37:
 	.ascii	"decrement_vpc_count %x = %d in free list\012\000"
 	.section	.rodata.dump_map_info.str1.1,"aMS",%progbits,1
-.LC80:
+.LC81:
 	.ascii	"phyBlk = %x,addr= %x,spare= %x %x %x %x data=%x %x\012"
 	.ascii	"\000"
-.LC81:
-	.ascii	"Mblk:\000"
 .LC82:
-	.ascii	"L2P:\000"
+	.ascii	"Mblk:\000"
 .LC83:
+	.ascii	"L2P:\000"
+.LC84:
 	.ascii	"L2PC:\000"
 	.section	.rodata.ftl_fix_nand_power_lost_error.str1.1,"aMS",%progbits,1
-.LC75:
-	.ascii	"fix power lost blk = %x vpc=%x\012\000"
 .LC76:
+	.ascii	"fix power lost blk = %x vpc=%x\012\000"
+.LC77:
 	.ascii	"erase power lost blk = %x vpc=%x\012\000"
 	.section	.rodata.ftl_map_blk_alloc_new_blk.str1.1,"aMS",%progbits,1
 .LC8:
@@ -27666,12 +27719,12 @@ __func__.11717:
 .LC39:
 	.ascii	"page map lost: %x %x\012\000"
 	.section	.rodata.ftl_scan_all_ppa.str1.1,"aMS",%progbits,1
-.LC52:
-	.ascii	"ftl_scan_all_ppa blk %x page %x\012\000"
 .LC53:
+	.ascii	"ftl_scan_all_ppa blk %x page %x\012\000"
+.LC54:
 	.ascii	"addr= %x, status= %d,spare= %x %x %x %x data=%x %x\012"
 	.ascii	"\000"
-.LC54:
+.LC55:
 	.ascii	"%s finished\012\000"
 	.section	.rodata.idb_write_data.str1.1,"aMS",%progbits,1
 .LC15:
@@ -27681,14 +27734,14 @@ __func__.11717:
 .LC17:
 	.ascii	"write_idblock fail! %x\012\000"
 	.section	.rodata.log2phys.str1.1,"aMS",%progbits,1
-.LC56:
-	.ascii	"region_id = %x phyAddr = %x\012\000"
 .LC57:
-	.ascii	"map_ppn:\000"
+	.ascii	"region_id = %x phyAddr = %x\012\000"
 .LC58:
+	.ascii	"map_ppn:\000"
+.LC59:
 	.ascii	"load_l2p_region refresh = %x phyAddr = %x\012\000"
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",%progbits,1
-.LC74:
+.LC75:
 	.ascii	"FtlInit %x\012\000"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",%progbits,1
 .LC18:
diff --git a/drivers/rknand/rk_ftl_arm_v8.S b/drivers/rknand/rk_ftl_arm_v8.S
index 4b2ecaf29d..37fa168782 100644
--- a/drivers/rknand/rk_ftl_arm_v8.S
+++ b/drivers/rknand/rk_ftl_arm_v8.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2019-05-08
+ * date: 2019-08-28
  */
 	.arch armv8-a
 	.file	"rk_ftl_arm_v8.S"
@@ -3748,7 +3748,7 @@ make_superblock:
 	ldrh	w0, [x0, #:lo12:.LANCHOR40]
 	cmp	w1, w0
 	bcc	.L536
-	mov	w2, 2577
+	mov	w2, 2576
 	adrp	x1, .LANCHOR101
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR101
@@ -5266,7 +5266,7 @@ SupperBlkListInit:
 	strh	w21, [x22, #:lo12:.LANCHOR88]
 	cmp	w0, w20
 	bge	.L758
-	mov	w2, 2647
+	mov	w2, 2646
 	adrp	x1, .LANCHOR140
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR140
@@ -8827,22 +8827,22 @@ FlashInit:
 	stp	x21, x22, [sp, 32]
 	mov	w0, 32768
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR2
+	adrp	x20, .LANCHOR30
 	stp	x25, x26, [sp, 64]
 	adrp	x25, .LANCHOR3
 	stp	x27, x28, [sp, 80]
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR147
 	adrp	x26, .LANCHOR200
-	adrp	x23, .LANCHOR30
-	adrp	x24, .LANCHOR152
+	adrp	x21, .LANCHOR2
+	adrp	x22, .LANCHOR152
 	str	x0, [x1, #:lo12:.LANCHOR147]
 	mov	w0, 32768
 	bl	ftl_malloc
-	adrp	x20, .LC23
+	adrp	x24, .LANCHOR0
 	adrp	x1, .LANCHOR153
-	adrp	x21, .LANCHOR22
-	mov	w28, 0
+	add	x24, x24, :lo12:.LANCHOR0
+	mov	w23, 0
 	str	x0, [x1, #:lo12:.LANCHOR153]
 	mov	w0, 4096
 	bl	ftl_malloc
@@ -8854,10 +8854,10 @@ FlashInit:
 	str	x0, [x1, #:lo12:.LANCHOR198]
 	mov	w0, 4096
 	bl	ftl_malloc
-	strb	wzr, [x23, #:lo12:.LANCHOR30]
-	adrp	x1, .LANCHOR199
-	strb	wzr, [x22, #:lo12:.LANCHOR2]
 	strb	wzr, [x26, #:lo12:.LANCHOR200]
+	adrp	x1, .LANCHOR199
+	strb	wzr, [x20, #:lo12:.LANCHOR30]
+	strb	wzr, [x21, #:lo12:.LANCHOR2]
 	str	x0, [x1, #:lo12:.LANCHOR199]
 	adrp	x1, .LANCHOR150
 	mov	w0, 50
@@ -8871,210 +8871,221 @@ FlashInit:
 	adrp	x0, .LANCHOR144
 	str	wzr, [x0, #:lo12:.LANCHOR144]
 	mov	w0, 60
-	strb	w0, [x24, #:lo12:.LANCHOR152]
+	strb	w0, [x22, #:lo12:.LANCHOR152]
 	mov	x0, x19
-	add	x19, x21, :lo12:.LANCHOR22
+	adrp	x19, .LANCHOR22
 	bl	NandcInit
-	add	x0, x20, :lo12:.LC23
-	adrp	x10, .LANCHOR0
-	mov	x20, x19
-	add	x27, x10, :lo12:.LANCHOR0
-	stp	x0, x26, [x29, 112]
-.L1256:
-	ldrb	w3, [x27, 8]
-	and	w2, w28, 255
-	ldr	x1, [x27]
-	mov	w26, w2
-	mov	w0, w2
-	str	x1, [x29, 96]
-	str	w3, [x29, 104]
+	add	x28, x19, :lo12:.LANCHOR22
+	str	x26, [x29, 120]
+	adrp	x26, .LC23
+	add	x0, x26, :lo12:.LC23
+	str	x0, [x29, 112]
+.L1257:
+	ldrb	w2, [x24, 8]
+	and	w27, w23, 255
+	str	w2, [x29, 108]
+	mov	w0, w27
+	ldr	x26, [x24]
 	bl	FlashReset
-	mov	w0, w26
+	mov	w0, w27
 	bl	NandcFlashCs
-	ldr	w3, [x29, 104]
+	ldr	w2, [x29, 108]
 	mov	w0, 144
-	ldr	x1, [x29, 96]
-	ubfiz	x3, x3, 8, 8
-	add	x1, x1, x3
-	str	x1, [x29, 104]
-	str	w0, [x1, 2056]
+	ubfiz	x2, x2, 8, 8
+	add	x26, x26, x2
+	str	w0, [x26, 2056]
 	mov	x0, 200
-	str	wzr, [x1, 2052]
+	str	wzr, [x26, 2052]
 	bl	udelay
-	ldr	x1, [x29, 104]
-	ldr	w0, [x1, 2048]
-	strb	w0, [x19]
-	ldr	w0, [x1, 2048]
-	strb	w0, [x19, 1]
-	ldr	w0, [x1, 2048]
-	strb	w0, [x19, 2]
-	ldr	w0, [x1, 2048]
-	strb	w0, [x19, 3]
-	ldr	w0, [x1, 2048]
-	strb	w0, [x19, 4]
-	ldr	w0, [x1, 2048]
-	strb	w0, [x19, 5]
-	mov	w0, w26
+	ldr	w0, [x26, 2048]
+	and	w0, w0, 255
+	strb	w0, [x28]
+	cmp	w0, 44
+	ldr	w2, [x26, 2048]
+	strb	w2, [x28, 1]
+	ldr	w2, [x26, 2048]
+	strb	w2, [x28, 2]
+	ldr	w2, [x26, 2048]
+	strb	w2, [x28, 3]
+	ldr	w2, [x26, 2048]
+	strb	w2, [x28, 4]
+	ldr	w2, [x26, 2048]
+	strb	w2, [x28, 5]
+	bne	.L1252
+	mov	w0, 239
+	str	w0, [x26, 2056]
+	mov	w0, 1
+	str	w0, [x26, 2052]
+	mov	x0, 200
+	bl	udelay
+	mov	w0, 4
+	str	w0, [x26, 2048]
+	str	wzr, [x26, 2048]
+	str	wzr, [x26, 2048]
+	str	wzr, [x26, 2048]
+.L1252:
+	mov	w0, w27
 	bl	NandcFlashDeCs
-	ldrb	w2, [x19]
+	ldrb	w2, [x28]
 	sub	w0, w2, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bhi	.L1252
-	ldrb	w7, [x19, 5]
-	add	w1, w28, 1
-	ldrb	w6, [x19, 4]
-	ldrb	w5, [x19, 3]
-	ldrb	w4, [x19, 2]
-	ldrb	w3, [x19, 1]
+	bhi	.L1253
+	ldrb	w7, [x28, 5]
+	add	w1, w23, 1
+	ldrb	w6, [x28, 4]
+	ldrb	w5, [x28, 3]
+	ldrb	w4, [x28, 2]
+	ldrb	w3, [x28, 1]
 	ldr	x0, [x29, 112]
 	bl	printf
-.L1252:
-	cbnz	w28, .L1253
-	ldrb	w0, [x20]
+.L1253:
+	cbnz	w23, .L1254
+	ldrb	w0, [x19, #:lo12:.LANCHOR22]
+	add	x1, x19, :lo12:.LANCHOR22
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bhi	.L1300
-	ldrb	w0, [x20, 1]
+	bhi	.L1301
+	ldrb	w0, [x1, 1]
 	cmp	w0, 255
-	beq	.L1300
-.L1253:
-	ldrb	w0, [x19]
+	beq	.L1301
+.L1254:
+	ldrb	w0, [x28]
 	cmp	w0, 181
-	bne	.L1255
-	mov	w0, 44
-	strb	w0, [x19]
-.L1255:
-	add	w28, w28, 1
-	add	x27, x27, 16
-	add	x19, x19, 8
-	cmp	w28, 4
 	bne	.L1256
-	ldrb	w0, [x21, #:lo12:.LANCHOR22]
+	mov	w0, 44
+	strb	w0, [x28]
+.L1256:
+	add	w23, w23, 1
+	add	x24, x24, 16
+	add	x28, x28, 8
+	cmp	w23, 4
+	bne	.L1257
+	ldrb	w0, [x19, #:lo12:.LANCHOR22]
 	cmp	w0, 173
-	beq	.L1257
+	beq	.L1258
 	adrp	x0, .LANCHOR155
 	ldr	w0, [x0, #:lo12:.LANCHOR155]
 	bl	NandcSetDdrMode
-.L1257:
-	adrp	x20, .LANCHOR18
-	adrp	x28, .LANCHOR6
-	adrp	x27, .LANCHOR119
-	adrp	x19, .LANCHOR20
+.L1258:
+	adrp	x24, .LANCHOR18
+	adrp	x27, .LANCHOR6
+	adrp	x26, .LANCHOR119
+	adrp	x23, .LANCHOR20
 	mov	w2, 852
 	mov	w1, 0
-	add	x0, x19, :lo12:.LANCHOR20
+	add	x0, x23, :lo12:.LANCHOR20
 	bl	ftl_memset
-	adrp	x4, .LANCHOR31
-	ldr	w5, [x27, #:lo12:.LANCHOR119]
-	add	x0, x4, :lo12:.LANCHOR31
-	strb	wzr, [x28, #:lo12:.LANCHOR6]
-	str	x0, [x20, #:lo12:.LANCHOR18]
+	adrp	x3, .LANCHOR31
+	ldr	w4, [x26, #:lo12:.LANCHOR119]
+	add	x0, x3, :lo12:.LANCHOR31
+	strb	wzr, [x27, #:lo12:.LANCHOR6]
+	str	x0, [x24, #:lo12:.LANCHOR18]
 	mov	w0, 12336
 	movk	w0, 0x5638, lsl 16
-	cmp	w5, w0
-	bne	.L1258
+	cmp	w4, w0
+	bne	.L1259
 	adrp	x0, .LANCHOR29
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR29]
-.L1258:
-	add	x0, x21, :lo12:.LANCHOR22
+.L1259:
+	add	x0, x19, :lo12:.LANCHOR22
 	ldrb	w2, [x0, 1]
 	add	w0, w2, 95
 	and	w1, w0, 255
 	mov	x0, 1
 	cmp	w1, 57
-	bhi	.L1259
+	bhi	.L1260
 	movk	x0, 0x205, lsl 48
 	lsr	x0, x0, x1
 	mvn	x0, x0
-.L1259:
+.L1260:
 	cmp	w2, 241
 	and	w0, w0, 1
 	cset	w1, eq
 	eor	w0, w0, 1
 	orr	w0, w1, w0
-	cbnz	w0, .L1260
+	cbnz	w0, .L1261
 	cmp	w2, 220
-	bne	.L1261
-	add	x0, x21, :lo12:.LANCHOR22
+	bne	.L1262
+	add	x0, x19, :lo12:.LANCHOR22
 	ldrb	w0, [x0, 3]
 	cmp	w0, 149
-	bne	.L1261
-.L1260:
-	adrp	x3, .LANCHOR201
-	add	x6, x3, :lo12:.LANCHOR201
+	bne	.L1262
+.L1261:
+	adrp	x28, .LANCHOR201
+	add	x5, x28, :lo12:.LANCHOR201
 	mov	w1, 16
 	strb	w1, [x25, #:lo12:.LANCHOR3]
-	strb	w1, [x24, #:lo12:.LANCHOR152]
+	strb	w1, [x22, #:lo12:.LANCHOR152]
 	mov	w0, 1
-	ldrb	w1, [x21, #:lo12:.LANCHOR22]
-	add	x7, x21, :lo12:.LANCHOR22
-	strb	w0, [x22, #:lo12:.LANCHOR2]
-	strb	w1, [x6, 1]
+	ldrb	w1, [x19, #:lo12:.LANCHOR22]
+	add	x6, x19, :lo12:.LANCHOR22
+	strb	w0, [x21, #:lo12:.LANCHOR2]
+	strb	w1, [x5, 1]
 	cmp	w1, 152
-	strb	w2, [x6, 2]
-	bne	.L1263
-	ldrsb	w1, [x7, 4]
-	tbnz	w1, #31, .L1264
+	strb	w2, [x5, 2]
+	bne	.L1264
+	ldrsb	w1, [x6, 4]
+	tbnz	w1, #31, .L1265
 	mov	w0, 24
-	strb	w0, [x24, #:lo12:.LANCHOR152]
-.L1263:
-	cmp	w5, 2049
+	strb	w0, [x22, #:lo12:.LANCHOR152]
+.L1264:
+	cmp	w4, 2049
 	mov	w0, 12336
 	movk	w0, 0x5638, lsl 16
-	ccmp	w5, w0, 4, ne
-	bne	.L1266
+	ccmp	w4, w0, 4, ne
+	bne	.L1267
 	mov	w0, 16
-	strb	w0, [x24, #:lo12:.LANCHOR152]
-.L1266:
+	strb	w0, [x22, #:lo12:.LANCHOR152]
+.L1267:
 	cmp	w2, 218
-	bne	.L1267
-	add	x0, x3, :lo12:.LANCHOR201
+	bne	.L1268
+	add	x0, x28, :lo12:.LANCHOR201
 	mov	w1, 2048
 	strh	w1, [x0, 14]
 	mov	w1, -38
-.L1334:
+.L1335:
 	strb	w1, [x0, 2]
-.L1268:
+.L1269:
 	adrp	x1, .LANCHOR143
 	add	x1, x1, :lo12:.LANCHOR143
 	mov	w2, 32
 	add	x1, x1, 32
-	stp	x3, x4, [x29, 112]
+	str	x3, [x29, 120]
 	adrp	x0, .LANCHOR7
 	add	x0, x0, :lo12:.LANCHOR7
 	bl	ftl_memcpy
-	ldp	x3, x4, [x29, 112]
+	ldr	x3, [x29, 120]
 	mov	w2, 32
-	add	x1, x3, :lo12:.LANCHOR201
-	add	x0, x4, :lo12:.LANCHOR31
+	add	x1, x28, :lo12:.LANCHOR201
+	add	x0, x3, :lo12:.LANCHOR31
 	bl	ftl_memcpy
-.L1261:
-	ldrb	w0, [x22, #:lo12:.LANCHOR2]
-	adrp	x24, .LANCHOR15
-	cbnz	w0, .L1271
+.L1262:
+	ldrb	w0, [x21, #:lo12:.LANCHOR2]
+	adrp	x22, .LANCHOR15
+	cbnz	w0, .L1272
 	bl	FlashLoadPhyInfoInRam
-	cbnz	w0, .L1273
-	ldr	x0, [x20, #:lo12:.LANCHOR18]
-	adrp	x26, .LANCHOR24
+	cbnz	w0, .L1274
+	ldr	x0, [x24, #:lo12:.LANCHOR18]
+	adrp	x28, .LANCHOR24
 	ldrb	w1, [x0, 17]
 	and	w0, w1, 7
-	strb	w0, [x26, #:lo12:.LANCHOR24]
-	tbnz	x1, 0, .L1273
+	strb	w0, [x28, #:lo12:.LANCHOR24]
+	tbnz	x1, 0, .L1274
 	mov	w1, 1
-	strb	w1, [x23, #:lo12:.LANCHOR30]
+	strb	w1, [x20, #:lo12:.LANCHOR30]
 	bl	FlashSetInterfaceMode
-	ldrb	w0, [x26, #:lo12:.LANCHOR24]
+	ldrb	w0, [x28, #:lo12:.LANCHOR24]
 	bl	NandcSetMode
-.L1273:
-	ldr	x0, [x20, #:lo12:.LANCHOR18]
+.L1274:
+	ldr	x0, [x24, #:lo12:.LANCHOR18]
 	ldrb	w0, [x0, 26]
-	strb	w0, [x24, #:lo12:.LANCHOR15]
+	strb	w0, [x22, #:lo12:.LANCHOR15]
 	bl	FlashLoadPhyInfo
-	cbz	w0, .L1271
-	ldr	x0, [x20, #:lo12:.LANCHOR18]
+	cbz	w0, .L1272
+	ldr	x0, [x24, #:lo12:.LANCHOR18]
 	ldrh	w1, [x0, 14]
 	adrp	x0, .LC24
 	add	x0, x0, :lo12:.LC24
@@ -9083,64 +9094,64 @@ FlashInit:
 	cmn	w0, #1
 	beq	.L1251
 	bl	FlashDieInfoInit
-	ldr	x0, [x20, #:lo12:.LANCHOR18]
+	ldr	x0, [x24, #:lo12:.LANCHOR18]
 	ldrb	w0, [x0, 19]
 	bl	FlashGetReadRetryDefault
-	ldr	x0, [x20, #:lo12:.LANCHOR18]
+	ldr	x0, [x24, #:lo12:.LANCHOR18]
 	adrp	x1, .LANCHOR122
 	ldrh	w1, [x1, #:lo12:.LANCHOR122]
 	ldrb	w2, [x0, 9]
 	add	w1, w1, 4095
 	cmp	w2, w1, lsr 12
-	blt	.L1276
+	blt	.L1277
 	ldrh	w1, [x0, 14]
 	add	w1, w1, 255
 	cmp	w2, w1, lsr 8
-	bge	.L1277
-.L1276:
+	bge	.L1278
+.L1277:
 	ldrh	w1, [x0, 14]
 	and	w1, w1, -256
 	strh	w1, [x0, 14]
-.L1277:
+.L1278:
 	adrp	x0, .LANCHOR24
 	ldrb	w0, [x0, #:lo12:.LANCHOR24]
 	tst	w0, 6
-	beq	.L1278
+	beq	.L1279
 	bl	FlashSavePhyInfo
 	adrp	x0, .LANCHOR148
 	ldr	w1, [x0, #:lo12:.LANCHOR148]
 	mov	w0, 0
 	bl	FlashDdrParaScan
-.L1278:
+.L1279:
 	bl	FlashSavePhyInfo
-.L1271:
-	ldr	x2, [x20, #:lo12:.LANCHOR18]
-	adrp	x26, .LANCHOR24
+.L1272:
+	ldr	x2, [x24, #:lo12:.LANCHOR18]
+	adrp	x28, .LANCHOR145
+	str	xzr, [x28, #:lo12:.LANCHOR145]
 	ldrb	w0, [x2, 26]
-	strb	w0, [x24, #:lo12:.LANCHOR15]
+	strb	w0, [x22, #:lo12:.LANCHOR15]
 	ldrh	w0, [x2, 16]
 	ubfx	x1, x0, 7, 1
-	strb	w1, [x28, #:lo12:.LANCHOR6]
+	strb	w1, [x27, #:lo12:.LANCHOR6]
 	adrp	x1, .LANCHOR202
 	ubfx	x3, x0, 3, 1
-	adrp	x28, .LANCHOR145
+	adrp	x27, .LANCHOR24
 	strb	w3, [x1, #:lo12:.LANCHOR202]
 	adrp	x1, .LANCHOR27
 	ubfx	x3, x0, 4, 1
 	ubfx	x0, x0, 8, 3
 	strb	w3, [x1, #:lo12:.LANCHOR27]
-	strb	w0, [x26, #:lo12:.LANCHOR24]
+	strb	w0, [x27, #:lo12:.LANCHOR24]
 	ldrh	w1, [x2, 10]
 	ldrb	w0, [x2, 12]
-	str	xzr, [x28, #:lo12:.LANCHOR145]
 	sdiv	w1, w1, w0
 	ldrb	w0, [x2, 18]
 	bl	BuildFlashLsbPageTable
 	bl	FlashDieInfoInit
-	ldr	x0, [x20, #:lo12:.LANCHOR18]
+	ldr	x0, [x24, #:lo12:.LANCHOR18]
 	ldrh	w1, [x0, 16]
-	tbz	x1, 6, .L1280
-	add	x3, x19, :lo12:.LANCHOR20
+	tbz	x1, 6, .L1281
+	add	x3, x23, :lo12:.LANCHOR20
 	adrp	x1, .LANCHOR10
 	ldrb	w0, [x0, 19]
 	adrp	x2, .LANCHOR12
@@ -9154,7 +9165,7 @@ FlashInit:
 	sub	w3, w0, #1
 	and	w3, w3, 255
 	cmp	w3, 7
-	bhi	.L1281
+	bhi	.L1282
 	adrp	x1, HynixReadRetrial
 	add	x1, x1, :lo12:HynixReadRetrial
 	str	x1, [x28, #:lo12:.LANCHOR145]
@@ -9162,61 +9173,61 @@ FlashInit:
 	and	w1, w1, 255
 	cmp	w1, 1
 	ccmp	w0, 8, 4, hi
-	bne	.L1282
+	bne	.L1283
 	adrp	x1, .LANCHOR36
 	mov	w2, 1
 	str	w2, [x1, #:lo12:.LANCHOR36]
-.L1282:
-	add	x19, x19, :lo12:.LANCHOR20
+.L1283:
+	add	x23, x23, :lo12:.LANCHOR20
 	cmp	w0, 7
-	beq	.L1335
+	beq	.L1336
 	cmp	w0, 8
-	bne	.L1303
-.L1335:
-	add	x19, x19, 28
-.L1283:
+	bne	.L1304
+.L1336:
+	add	x23, x23, 28
+.L1284:
 	mov	x1, 0
 	mov	w2, 0
-.L1285:
-	ldrsb	w3, [x19, x1]
+.L1286:
+	ldrsb	w3, [x23, x1]
 	add	x1, x1, 1
 	cmp	w3, 0
 	cinc	w2, w2, eq
 	cmp	x1, 32
-	bne	.L1285
+	bne	.L1286
 	cmp	w2, 27
-	bls	.L1280
+	bls	.L1281
 	bl	FlashGetReadRetryDefault
 	bl	FlashSavePhyInfo
-.L1280:
-	ldr	w1, [x27, #:lo12:.LANCHOR119]
+.L1281:
+	ldr	w1, [x26, #:lo12:.LANCHOR119]
 	mov	w0, 12336
 	movk	w0, 0x5638, lsl 16
 	cmp	w1, w0
-	bne	.L1294
-	ldrb	w0, [x24, #:lo12:.LANCHOR15]
-	cbz	w0, .L1294
-	ldr	x0, [x20, #:lo12:.LANCHOR18]
-	strb	wzr, [x0, 18]
-.L1294:
-	ldrb	w0, [x21, #:lo12:.LANCHOR22]
-	cmp	w0, 44
 	bne	.L1295
-	ldrb	w0, [x23, #:lo12:.LANCHOR30]
+	ldrb	w0, [x22, #:lo12:.LANCHOR15]
 	cbz	w0, .L1295
-	strb	wzr, [x23, #:lo12:.LANCHOR30]
+	ldr	x0, [x24, #:lo12:.LANCHOR18]
+	strb	wzr, [x0, 18]
+.L1295:
+	ldrb	w0, [x19, #:lo12:.LANCHOR22]
+	cmp	w0, 44
+	bne	.L1296
+	ldrb	w0, [x20, #:lo12:.LANCHOR30]
+	cbz	w0, .L1296
+	strb	wzr, [x20, #:lo12:.LANCHOR30]
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
 	bl	NandcSetMode
-.L1295:
-	ldrb	w0, [x26, #:lo12:.LANCHOR24]
+.L1296:
+	ldrb	w0, [x27, #:lo12:.LANCHOR24]
 	tst	w0, 6
-	beq	.L1296
-	ldrb	w1, [x23, #:lo12:.LANCHOR30]
-	cbnz	w1, .L1297
-	tbnz	x0, 0, .L1296
-.L1297:
+	beq	.L1297
+	ldrb	w1, [x20, #:lo12:.LANCHOR30]
+	cbnz	w1, .L1298
+	tbnz	x0, 0, .L1297
+.L1298:
 	mov	w0, 0
 	bl	flash_enter_slc_mode
 	adrp	x0, .LANCHOR148
@@ -9225,14 +9236,14 @@ FlashInit:
 	bl	FlashDdrParaScan
 	mov	w0, 0
 	bl	flash_exit_slc_mode
-.L1296:
-	ldr	x0, [x20, #:lo12:.LANCHOR18]
+.L1297:
+	ldr	x0, [x24, #:lo12:.LANCHOR18]
 	ldrb	w0, [x0, 20]
 	bl	FlashBchSel
 	adrp	x0, .LANCHOR141
 	add	x0, x0, :lo12:.LANCHOR141
 	bl	FlashReadIdbDataRaw
-	ldr	x2, [x20, #:lo12:.LANCHOR18]
+	ldr	x2, [x24, #:lo12:.LANCHOR18]
 	mov	w0, 16
 	adrp	x1, .LANCHOR14
 	strb	w0, [x25, #:lo12:.LANCHOR3]
@@ -9241,7 +9252,7 @@ FlashInit:
 	strh	w3, [x0, 8]
 	ldrb	w4, [x2, 7]
 	str	w4, [x0, 4]
-	ldr	w4, [x21, #:lo12:.LANCHOR22]
+	ldr	w4, [x19, #:lo12:.LANCHOR22]
 	str	w4, [x1, #:lo12:.LANCHOR14]
 	adrp	x1, .LANCHOR25
 	ldrh	w4, [x2, 14]
@@ -9264,9 +9275,9 @@ FlashInit:
 	and	w1, w1, 65535
 	strh	w5, [x0, 26]
 	strh	w1, [x0, 22]
-	ldrb	w5, [x22, #:lo12:.LANCHOR2]
+	ldrb	w5, [x21, #:lo12:.LANCHOR2]
 	cmp	w5, 1
-	bne	.L1298
+	bne	.L1299
 	ubfiz	w1, w1, 1, 15
 	lsr	w4, w4, 1
 	ubfiz	w3, w3, 1, 15
@@ -9275,7 +9286,7 @@ FlashInit:
 	mov	w1, 8
 	strh	w3, [x0, 20]
 	strh	w1, [x0, 26]
-.L1298:
+.L1299:
 	ldrb	w0, [x2, 20]
 	bl	FlashBchSel
 	mov	w0, 0
@@ -9287,100 +9298,100 @@ FlashInit:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1267:
+.L1268:
 	cmp	w2, 220
-	bne	.L1269
-	add	x0, x3, :lo12:.LANCHOR201
+	bne	.L1270
+	add	x0, x28, :lo12:.LANCHOR201
 	mov	w1, 4096
 	strh	w1, [x0, 14]
 	mov	w1, -36
-	b	.L1334
-.L1269:
+	b	.L1335
+.L1270:
 	cmp	w2, 211
-	bne	.L1268
-	add	x0, x3, :lo12:.LANCHOR201
+	bne	.L1269
+	add	x0, x28, :lo12:.LANCHOR201
 	mov	w1, 4096
 	strh	w1, [x0, 14]
 	mov	w1, 2
 	strb	w1, [x0, 13]
-	b	.L1268
-.L1303:
-	add	x19, x19, 20
-	b	.L1283
-.L1281:
+	b	.L1269
+.L1304:
+	add	x23, x23, 20
+	b	.L1284
+.L1282:
 	sub	w3, w0, #17
 	and	w3, w3, 255
 	cmp	w3, 2
-	bhi	.L1287
+	bhi	.L1288
 	adrp	x2, MicronReadRetrial
 	add	x2, x2, :lo12:MicronReadRetrial
 	str	x2, [x28, #:lo12:.LANCHOR145]
 	cmp	w0, 19
-	beq	.L1288
-.L1339:
+	beq	.L1289
+.L1340:
 	mov	w0, 7
-	b	.L1337
-.L1288:
+	b	.L1338
+.L1289:
 	mov	w0, 15
-.L1337:
+.L1338:
 	strb	w0, [x1, #:lo12:.LANCHOR151]
-	b	.L1280
-.L1287:
+	b	.L1281
+.L1288:
 	sub	w3, w0, #65
 	cmp	w0, 33
 	and	w3, w3, 255
 	ccmp	w3, 1, 0, ne
-	bhi	.L1289
+	bhi	.L1290
 	adrp	x0, ToshibaReadRetrial
 	add	x0, x0, :lo12:ToshibaReadRetrial
 	str	x0, [x28, #:lo12:.LANCHOR145]
 	mov	w0, 4
 	strb	w0, [x2, #:lo12:.LANCHOR12]
-	b	.L1339
-.L1289:
+	b	.L1340
+.L1290:
 	sub	w3, w0, #34
 	sub	w2, w0, #67
 	and	w3, w3, 255
 	and	w2, w2, 255
 	cmp	w3, 1
 	ccmp	w2, 1, 0, hi
-	bhi	.L1290
+	bhi	.L1291
 	adrp	x3, ToshibaReadRetrial
 	add	x3, x3, :lo12:ToshibaReadRetrial
 	str	x3, [x28, #:lo12:.LANCHOR145]
 	cmp	w0, 35
 	mov	w3, 68
 	ccmp	w0, w3, 4, ne
-	beq	.L1291
+	beq	.L1292
 	mov	w0, 7
-.L1336:
+.L1337:
 	strb	w0, [x1, #:lo12:.LANCHOR151]
 	cmp	w2, 1
-	bhi	.L1293
+	bhi	.L1294
 	mov	w0, 4
-.L1338:
+.L1339:
 	strb	w0, [x4, #:lo12:.LANCHOR12]
-	b	.L1280
-.L1291:
+	b	.L1281
+.L1292:
 	mov	w0, 17
-	b	.L1336
-.L1293:
+	b	.L1337
+.L1294:
 	mov	w0, 5
-	b	.L1338
-.L1290:
+	b	.L1339
+.L1291:
 	cmp	w0, 49
-	bne	.L1280
+	bne	.L1281
 	adrp	x0, SamsungReadRetrial
 	add	x0, x0, :lo12:SamsungReadRetrial
 	str	x0, [x28, #:lo12:.LANCHOR145]
-	b	.L1280
-.L1300:
+	b	.L1281
+.L1301:
 	mov	w0, -2
 	b	.L1251
-.L1264:
+.L1265:
 	ldr	x1, [x29, 120]
 	strb	w0, [x1, #:lo12:.LANCHOR200]
-	b	.L1263
+	b	.L1264
 	.size	FlashInit, .-FlashInit
 	.section	.text.FlashReadSlc2KPages,"ax",@progbits
 	.align	2
@@ -9406,10 +9417,10 @@ FlashReadSlc2KPages:
 	add	x0, x26, :lo12:.LANCHOR200
 	stp	x27, x28, [sp, 80]
 	str	x0, [x29, 104]
-.L1341:
+.L1342:
 	ldr	x0, [x29, 120]
 	cmp	x19, x0
-	bne	.L1361
+	bne	.L1362
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -9418,7 +9429,7 @@ FlashReadSlc2KPages:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1361:
+.L1362:
 	ldr	w1, [x29, 116]
 	mov	w4, w21
 	add	x3, x29, 136
@@ -9429,15 +9440,15 @@ FlashReadSlc2KPages:
 	ldr	w1, [x29, 136]
 	ldrb	w0, [x0, #:lo12:.LANCHOR25]
 	cmp	w0, w1
-	bhi	.L1342
+	bhi	.L1343
 	mov	w0, -1
 	str	w0, [x19]
-.L1343:
+.L1344:
 	sub	w21, w21, #1
 	add	x19, x19, 56
 	and	w21, w21, 255
-	b	.L1341
-.L1342:
+	b	.L1342
+.L1343:
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	add	x23, x26, :lo12:.LANCHOR200
@@ -9448,7 +9459,7 @@ FlashReadSlc2KPages:
 	bl	NandcWaitFlashReady
 	mov	w0, w20
 	bl	NandcFlashCs
-.L1344:
+.L1345:
 	ldr	w1, [x29, 140]
 	mov	w0, w20
 	bl	FlashReadCmd
@@ -9461,25 +9472,25 @@ FlashReadSlc2KPages:
 	bl	NandcXferData
 	mov	w28, w0
 	ldrb	w0, [x23]
-	cbz	w0, .L1345
+	cbz	w0, .L1346
 	mov	w0, w20
 	bl	flash_read_ecc
 	cmp	w0, 5
 	csel	w28, w28, w24, ls
-.L1345:
+.L1346:
 	cmp	w22, 9
 	ccmn	w28, #1, 0, ls
-	bne	.L1346
+	bne	.L1347
 	add	w22, w22, 1
-	b	.L1344
-.L1346:
+	b	.L1345
+.L1347:
 	cmp	w22, 0
 	mov	w23, 256
 	adrp	x24, .LANCHOR4
 	csel	w28, w28, w23, eq
 	add	x24, x24, :lo12:.LANCHOR4
 	mov	w22, 0
-.L1348:
+.L1349:
 	ldr	w0, [x24]
 	ldr	w1, [x29, 140]
 	add	w1, w1, w0
@@ -9502,18 +9513,18 @@ FlashReadSlc2KPages:
 	mov	w27, w0
 	ldr	x0, [x29, 104]
 	ldrb	w0, [x0]
-	cbz	w0, .L1351
+	cbz	w0, .L1352
 	mov	w0, w20
 	bl	flash_read_ecc
 	cmp	w0, 5
 	csel	w27, w27, w23, ls
-.L1351:
+.L1352:
 	cmp	w22, 9
 	ccmn	w27, #1, 0, ls
-	bne	.L1352
+	bne	.L1353
 	add	w22, w22, 1
-	b	.L1348
-.L1352:
+	b	.L1349
+.L1353:
 	cmp	w22, 0
 	mov	w3, 256
 	mov	w0, w20
@@ -9525,50 +9536,50 @@ FlashReadSlc2KPages:
 	ldrb	w2, [x0, #:lo12:.LANCHOR33]
 	add	w0, w2, w2, lsl 1
 	cmp	w5, w0, lsr 2
-	bls	.L1354
+	bls	.L1355
 	cmn	w5, #1
 	csel	w5, w5, w3, eq
-.L1354:
+.L1355:
 	cmp	w5, 256
 	ldr	x0, [x19, 16]
 	ccmn	w5, #1, 4, ne
 	csel	w5, w5, wzr, eq
 	str	w5, [x19]
-	cbz	x0, .L1357
+	cbz	x0, .L1358
 	ldr	w1, [x0, 12]
 	cmn	w1, #1
-	bne	.L1357
+	bne	.L1358
 	ldr	w1, [x0, 8]
 	cmn	w1, #1
-	bne	.L1357
+	bne	.L1358
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L1357
+	beq	.L1358
 	str	w1, [x19]
-.L1357:
+.L1358:
 	ldr	w3, [x19]
 	cmn	w3, #1
-	bne	.L1343
+	bne	.L1344
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC25
 	add	x0, x0, :lo12:.LC25
 	bl	printf
 	ldr	x1, [x19, 8]
-	cbz	x1, .L1359
+	cbz	x1, .L1360
 	adrp	x0, .LC26
 	mov	w3, 8
 	mov	w2, 4
 	add	x0, x0, :lo12:.LC26
 	bl	rknand_print_hex
-.L1359:
+.L1360:
 	ldr	x1, [x19, 16]
-	cbz	x1, .L1343
+	cbz	x1, .L1344
 	mov	w3, 4
 	adrp	x0, .LC27
 	mov	w2, w3
 	add	x0, x0, :lo12:.LC27
 	bl	rknand_print_hex
-	b	.L1343
+	b	.L1344
 	.size	FlashReadSlc2KPages, .-FlashReadSlc2KPages
 	.section	.text.FlashReadPages,"ax",@progbits
 	.align	2
@@ -9585,7 +9596,7 @@ FlashReadPages:
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	stp	w2, w1, [x29, 148]
-	cbnz	w3, .L1390
+	cbnz	w3, .L1391
 	mov	x25, x0
 	adrp	x0, .LANCHOR31+9
 	adrp	x27, .LANCHOR20
@@ -9601,15 +9612,15 @@ FlashReadPages:
 	str	x0, [x29, 104]
 	add	x0, x0, 4
 	str	x0, [x29, 96]
-.L1391:
+.L1392:
 	ldr	w0, [x29, 152]
 	cmp	w22, w0
-	bcc	.L1425
+	bcc	.L1426
 	mov	w0, 0
-	b	.L1389
-.L1390:
+	b	.L1390
+.L1391:
 	bl	FlashReadSlc2KPages
-.L1389:
+.L1390:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9617,7 +9628,7 @@ FlashReadPages:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1425:
+.L1426:
 	mov	w26, 56
 	add	x3, x29, 168
 	ldp	w1, w0, [x29, 148]
@@ -9633,13 +9644,13 @@ FlashReadPages:
 	ldr	w1, [x29, 168]
 	ldrb	w0, [x0, #:lo12:.LANCHOR25]
 	cmp	w0, w1
-	bhi	.L1393
+	bhi	.L1394
 	mov	w0, -1
 	str	w0, [x25, x26]
-.L1394:
+.L1395:
 	add	w22, w22, 1
-	b	.L1391
-.L1393:
+	b	.L1392
+.L1394:
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w19, [x0, w1, uxtw]
@@ -9656,7 +9667,7 @@ FlashReadPages:
 	sub	w0, w1, #1
 	and	w0, w0, 255
 	cmp	w0, 7
-	bhi	.L1396
+	bhi	.L1397
 	add	x0, x27, :lo12:.LANCHOR20
 	sxtw	x2, w19
 	add	x0, x0, x2
@@ -9664,59 +9675,59 @@ FlashReadPages:
 	and	w1, w1, 255
 	cmp	w1, 1
 	ldrb	w3, [x0, 12]
-	bhi	.L1397
+	bhi	.L1398
 	ldrb	w3, [x0, 20]
-.L1397:
+.L1398:
 	adrp	x0, .LANCHOR21
 	add	x0, x0, :lo12:.LANCHOR21
 	ldrb	w0, [x0, x2]
 	cmp	w0, w3
-	beq	.L1396
+	beq	.L1397
 	ldp	x2, x0, [x29, 96]
 	ldrb	w1, [x0, 1]
 	mov	w0, w19
 	bl	HynixSetRRPara
-.L1396:
+.L1397:
 	mov	w0, w19
 	bl	NandcFlashCs
 	ldr	w0, [x29, 148]
 	cmp	w0, 1
 	cset	w0, eq
 	orr	w24, w0, w24, lsr 31
-	cbz	w24, .L1398
+	cbz	w24, .L1399
 	adrp	x0, .LANCHOR15
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L1398
+	cbz	w0, .L1399
 	mov	w0, w19
 	bl	flash_enter_slc_mode
-.L1399:
+.L1400:
 	adrp	x0, .LANCHOR4
 	add	x0, x0, :lo12:.LANCHOR4
 	str	x0, [x29, 112]
 	ldr	x0, [x29, 128]
 	add	x0, x0, :lo12:.LANCHOR6
 	str	x0, [x29, 136]
-.L1405:
+.L1406:
 	ldr	w1, [x29, 172]
 	cmn	w1, #1
-	bne	.L1400
+	bne	.L1401
 	cmp	w19, 255
-	beq	.L1427
-.L1400:
-	cbz	w20, .L1402
+	beq	.L1428
+.L1401:
+	cbz	w20, .L1403
 	ldr	x0, [x29, 112]
 	ldr	w2, [x0]
 	mov	w0, w19
 	add	w2, w1, w2
 	bl	FlashReadDpCmd
-.L1403:
+.L1404:
 	mov	w0, w19
 	bl	NandcWaitFlashReady
-	cbz	w20, .L1401
+	cbz	w20, .L1402
 	ldr	w1, [x29, 172]
 	mov	w0, w19
 	bl	FlashReadDpDataOutCmd
-.L1401:
+.L1402:
 	ldrb	w2, [x29, 156]
 	mov	w1, 0
 	ldp	x3, x4, [x21, 8]
@@ -9725,26 +9736,26 @@ FlashReadPages:
 	mov	w28, w0
 	ldr	x0, [x29, 136]
 	ldrb	w0, [x0]
-	cbz	w0, .L1404
+	cbz	w0, .L1405
 	cmn	w28, #1
-	bne	.L1404
+	bne	.L1405
 	ldr	x0, [x29, 136]
 	mov	w20, 0
 	strb	wzr, [x0]
-	b	.L1405
-.L1398:
+	b	.L1406
+.L1399:
 	mov	w0, w19
 	bl	flash_exit_slc_mode
-	b	.L1399
-.L1402:
+	b	.L1400
+.L1403:
 	mov	w0, w19
 	bl	FlashReadCmd
-	b	.L1403
-.L1427:
+	b	.L1404
+.L1428:
 	mov	w20, 0
-	b	.L1401
-.L1404:
-	cbz	w20, .L1406
+	b	.L1402
+.L1405:
+	cbz	w20, .L1407
 	adrp	x0, .LANCHOR4
 	ldr	w1, [x29, 172]
 	ldr	w0, [x0, #:lo12:.LANCHOR4]
@@ -9763,27 +9774,27 @@ FlashReadPages:
 	cmn	w0, #1
 	mov	w23, w0
 	csel	w20, w20, wzr, ne
-.L1406:
+.L1407:
 	mov	w0, w19
 	bl	NandcFlashDeCs
 	ldr	x0, [x29, 128]
 	cmn	w28, #1
 	ldrb	w1, [x29, 144]
 	strb	w1, [x0, #:lo12:.LANCHOR6]
-	bne	.L1407
+	bne	.L1408
 	adrp	x0, .LANCHOR30
 	ldrb	w0, [x0, #:lo12:.LANCHOR30]
-	cbnz	w0, .L1408
-.L1412:
+	cbnz	w0, .L1409
+.L1413:
 	adrp	x20, .LANCHOR145
 	ldr	x4, [x20, #:lo12:.LANCHOR145]
-	cbnz	x4, .L1409
+	cbnz	x4, .L1410
 	ldr	w1, [x29, 172]
 	mov	w0, w19
 	ldp	x2, x3, [x21, 8]
 	bl	FlashReadRawPage
-	b	.L1464
-.L1408:
+	b	.L1465
+.L1409:
 	adrp	x0, .LANCHOR19
 	ldr	w1, [x29, 172]
 	ldp	x2, x3, [x21, 8]
@@ -9794,36 +9805,36 @@ FlashReadPages:
 	bl	FlashDdrTunningRead
 	mov	w28, w0
 	cmn	w0, #1
-	beq	.L1411
+	beq	.L1412
 	adrp	x0, .LANCHOR33
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	cmp	w28, w0, lsr 1
-	bls	.L1428
-.L1411:
+	bls	.L1429
+.L1412:
 	lsr	w0, w20, 8
 	bl	NandcSetDdrPara
 	cmn	w28, #1
-	beq	.L1412
-.L1428:
+	beq	.L1413
+.L1429:
 	mov	w20, 0
-.L1407:
+.L1408:
 	adrp	x0, .LANCHOR33
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bls	.L1413
+	bls	.L1414
 	adrp	x0, .LANCHOR145
 	ldr	x0, [x0, #:lo12:.LANCHOR145]
 	cmp	x0, 0
 	mov	w0, 256
 	csel	w28, w28, w0, ne
-.L1413:
+.L1414:
 	cmp	w28, 256
 	ccmn	w28, #1, 4, ne
 	csel	w3, w28, wzr, eq
 	str	w3, [x25, x26]
 	cmn	w3, #1
-	bne	.L1420
+	bne	.L1421
 	adrp	x0, .LANCHOR33
 	ldr	w1, [x21, 4]
 	ldrb	w2, [x0, #:lo12:.LANCHOR33]
@@ -9831,25 +9842,25 @@ FlashReadPages:
 	add	x0, x0, :lo12:.LC25
 	bl	printf
 	ldr	x1, [x21, 16]
-	cbz	x1, .L1420
+	cbz	x1, .L1421
 	mov	w3, 4
 	adrp	x0, .LC27
 	mov	w2, w3
 	add	x0, x0, :lo12:.LC27
 	bl	rknand_print_hex
-.L1420:
-	cbz	w20, .L1422
+.L1421:
+	cbz	w20, .L1423
 	adrp	x0, .LANCHOR33
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w23, w0, lsr 2
-	bls	.L1423
+	bls	.L1424
 	adrp	x0, .LANCHOR145
 	ldr	x0, [x0, #:lo12:.LANCHOR145]
 	cmp	x0, 0
 	mov	w0, 256
 	csel	w23, w23, w0, ne
-.L1423:
+.L1424:
 	add	w0, w22, 1
 	mov	w1, 56
 	cmp	w23, 256
@@ -9857,37 +9868,37 @@ FlashReadPages:
 	umull	x0, w0, w1
 	csel	w1, w23, wzr, eq
 	str	w1, [x25, x0]
-.L1422:
+.L1423:
 	add	w22, w22, w20
-	cbz	w24, .L1394
+	cbz	w24, .L1395
 	adrp	x0, .LANCHOR15
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L1394
+	cbz	w0, .L1395
 	mov	w0, w19
 	bl	flash_exit_slc_mode
-	b	.L1394
-.L1409:
+	b	.L1395
+.L1410:
 	ldr	w1, [x29, 172]
 	mov	w0, w19
 	ldp	x2, x3, [x21, 8]
 	blr	x4
 	mov	w28, w0
 	cmn	w0, #1
-	bne	.L1431
+	bne	.L1432
 	ldr	x0, [x29, 120]
 	ldr	x0, [x0, #:lo12:.LANCHOR18]
 	ldrb	w0, [x0, 19]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 7
-	bhi	.L1414
+	bhi	.L1415
 	add	x0, x27, :lo12:.LANCHOR20
 	mov	w3, 0
 	add	x2, x0, 4
 	ldrb	w1, [x0, 1]
 	mov	w0, w19
 	bl	HynixSetRRPara
-.L1414:
+.L1415:
 	ldp	x2, x3, [x21, 8]
 	mov	w0, w19
 	ldr	w1, [x29, 172]
@@ -9901,27 +9912,27 @@ FlashReadPages:
 	add	x0, x0, :lo12:.LC28
 	bl	printf
 	cmn	w28, #1
-	bne	.L1431
+	bne	.L1432
 	adrp	x0, .LANCHOR15
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L1431
+	cbz	w0, .L1432
 	mov	w0, w19
-	cbz	w24, .L1415
+	cbz	w24, .L1416
 	bl	flash_enter_slc_mode
-.L1416:
+.L1417:
 	ldr	x4, [x20, #:lo12:.LANCHOR145]
 	mov	w0, w19
 	ldr	w1, [x29, 172]
 	ldp	x2, x3, [x21, 8]
 	blr	x4
-.L1464:
+.L1465:
 	mov	w28, w0
-.L1431:
+.L1432:
 	mov	w20, 0
-	b	.L1413
-.L1415:
+	b	.L1414
+.L1416:
 	bl	flash_exit_slc_mode
-	b	.L1416
+	b	.L1417
 	.size	FlashReadPages, .-FlashReadPages
 	.section	.text.FlashProgSlc2KPages,"ax",@progbits
 	.align	2
@@ -9948,12 +9959,12 @@ FlashProgSlc2KPages:
 	mov	x20, x0
 	add	x28, x26, :lo12:.LANCHOR4
 	str	w3, [x29, 108]
-.L1466:
+.L1467:
 	cmp	x20, x23
-	bne	.L1472
+	bne	.L1473
 	ldr	w0, [x29, 108]
-	cbnz	w0, .L1473
-.L1492:
+	cbnz	w0, .L1474
+.L1493:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -9962,7 +9973,7 @@ FlashProgSlc2KPages:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1472:
+.L1473:
 	mov	w1, w24
 	mov	w4, w22
 	add	x3, x29, 116
@@ -9973,15 +9984,15 @@ FlashProgSlc2KPages:
 	ldr	w1, [x29, 116]
 	ldrb	w0, [x0, #:lo12:.LANCHOR25]
 	cmp	w0, w1
-	bhi	.L1467
+	bhi	.L1468
 	mov	w0, -1
 	str	w0, [x20]
-.L1468:
+.L1469:
 	sub	w22, w22, #1
 	add	x20, x20, 56
 	and	w22, w22, 255
-	b	.L1466
-.L1467:
+	b	.L1467
+.L1468:
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w19, [x0, w1, uxtw]
@@ -10034,30 +10045,30 @@ FlashProgSlc2KPages:
 	ldr	w1, [x29, 112]
 	mov	w0, w19
 	bl	FlashReadStatus
-	tbz	x0, 0, .L1471
+	tbz	x0, 0, .L1472
 	mov	w0, -1
 	str	w0, [x20]
-.L1471:
+.L1472:
 	mov	w0, w19
 	bl	NandcFlashDeCs
-	b	.L1468
-.L1479:
+	b	.L1469
+.L1480:
 	ldr	w0, [x27]
 	cmn	w0, #1
-	bne	.L1474
+	bne	.L1475
 	ldr	w1, [x27, 4]
 	adrp	x0, .LC29
 	add	x0, x0, :lo12:.LC29
 	bl	printf
-.L1475:
+.L1476:
 	sub	w21, w21, #1
 	add	x27, x27, 56
 	and	w21, w21, 255
-.L1493:
+.L1494:
 	cmp	x27, x20
-	bne	.L1479
-	b	.L1492
-.L1474:
+	bne	.L1480
+	b	.L1493
+.L1475:
 	adrp	x19, .LANCHOR199
 	mov	w4, w21
 	add	x3, x29, 116
@@ -10080,45 +10091,45 @@ FlashProgSlc2KPages:
 	bl	FlashReadPages
 	ldr	w25, [x29, 120]
 	cmn	w25, #1
-	bne	.L1476
+	bne	.L1477
 	ldr	w1, [x27, 4]
 	adrp	x0, .LC30
 	add	x0, x0, :lo12:.LC30
 	bl	printf
 	str	w25, [x27]
-.L1476:
+.L1477:
 	ldr	x0, [x27, 16]
-	cbz	x0, .L1477
+	cbz	x0, .L1478
 	ldr	w2, [x0]
 	ldr	x0, [x19, #:lo12:.LANCHOR199]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1477
+	beq	.L1478
 	ldr	w1, [x27, 4]
 	adrp	x0, .LC31
 	add	x0, x0, :lo12:.LC31
 	bl	printf
 	mov	w0, -1
 	str	w0, [x27]
-.L1477:
+.L1478:
 	ldr	x0, [x27, 8]
-	cbz	x0, .L1475
+	cbz	x0, .L1476
 	ldr	w2, [x0]
 	ldr	x0, [x23, #:lo12:.LANCHOR198]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1475
+	beq	.L1476
 	ldr	w1, [x27, 4]
 	adrp	x0, .LC32
 	add	x0, x0, :lo12:.LC32
 	bl	printf
 	mov	w0, -1
 	str	w0, [x27]
-	b	.L1475
-.L1473:
+	b	.L1476
+.L1474:
 	adrp	x22, .LANCHOR198
 	mov	x23, x22
-	b	.L1493
+	b	.L1494
 	.size	FlashProgSlc2KPages, .-FlashProgSlc2KPages
 	.section	.text.FlashProgPages,"ax",@progbits
 	.align	2
@@ -10138,7 +10149,7 @@ FlashProgPages:
 	stp	w3, w4, [x29, 100]
 	adrp	x4, .LANCHOR2
 	ldrb	w4, [x4, #:lo12:.LANCHOR2]
-	cbnz	w4, .L1496
+	cbnz	w4, .L1497
 	mov	x19, x0
 	adrp	x0, .LANCHOR31+9
 	adrp	x27, .LANCHOR23
@@ -10148,28 +10159,28 @@ FlashProgPages:
 	add	x28, x27, :lo12:.LANCHOR23
 	mov	w21, 0
 	str	w0, [x29, 108]
-.L1497:
+.L1498:
 	cmp	w21, w24
 	adrp	x26, .LANCHOR25
-	bcc	.L1510
+	bcc	.L1511
 	adrp	x21, .LANCHOR15
 	adrp	x23, .LANCHOR23
 	add	x25, x26, :lo12:.LANCHOR25
 	add	x21, x21, :lo12:.LANCHOR15
 	add	x23, x23, :lo12:.LANCHOR23
 	mov	x20, 0
-.L1511:
+.L1512:
 	ldrb	w0, [x25]
 	cmp	w0, w20
-	bhi	.L1513
+	bhi	.L1514
 	ldr	w0, [x29, 100]
-	cbnz	w0, .L1514
-.L1522:
+	cbnz	w0, .L1515
+.L1523:
 	mov	w0, 0
-	b	.L1495
-.L1496:
+	b	.L1496
+.L1497:
 	bl	FlashProgSlc2KPages
-.L1495:
+.L1496:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -10177,7 +10188,7 @@ FlashProgPages:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1510:
+.L1511:
 	mov	w12, 56
 	mov	w1, w22
 	sub	w4, w24, w21
@@ -10191,13 +10202,13 @@ FlashProgPages:
 	ldrb	w1, [x26, #:lo12:.LANCHOR25]
 	ldr	w0, [x29, 116]
 	cmp	w1, w0
-	bhi	.L1499
+	bhi	.L1500
 	mov	w0, -1
 	str	w0, [x19, x12]
-.L1500:
+.L1501:
 	add	w21, w21, 1
-	b	.L1497
-.L1499:
+	b	.L1498
+.L1500:
 	adrp	x1, .LANCHOR27
 	add	x2, x27, :lo12:.LANCHOR23
 	mov	x3, 24
@@ -10207,20 +10218,20 @@ FlashProgPages:
 	csel	w23, w23, wzr, ne
 	madd	x1, x1, x3, x2
 	ldr	x1, [x1, 8]
-	cbz	x1, .L1502
+	cbz	x1, .L1503
 	bl	FlashWaitCmdDone
-.L1502:
+.L1503:
 	ldp	w2, w1, [x29, 112]
 	mov	x0, 24
 	madd	x0, x1, x0, x28
 	str	w2, [x0, 4]
 	stp	x25, xzr, [x0, 8]
-	cbz	w23, .L1503
+	cbz	w23, .L1504
 	add	w2, w21, 1
 	mov	w3, 56
 	umaddl	x2, w2, w3, x19
 	str	x2, [x0, 16]
-.L1503:
+.L1504:
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w20, [x0, x1]
@@ -10230,17 +10241,17 @@ FlashProgPages:
 	cmp	w0, 1
 	mov	w0, w20
 	strb	w20, [x28, x1]
-	bne	.L1504
+	bne	.L1505
 	bl	NandcWaitFlashReady
-.L1505:
+.L1506:
 	ldr	w0, [x29, 104]
 	sub	w0, w0, #1
 	cmp	w0, 7
-	bhi	.L1506
+	bhi	.L1507
 	adrp	x0, .LANCHOR21
 	add	x0, x0, :lo12:.LANCHOR21
 	ldrb	w0, [x0, w20, sxtw]
-	cbz	w0, .L1506
+	cbz	w0, .L1507
 	adrp	x0, .LANCHOR20
 	add	x0, x0, :lo12:.LANCHOR20
 	add	x2, x0, 4
@@ -10248,17 +10259,17 @@ FlashProgPages:
 	ldrb	w1, [x0, 1]
 	mov	w0, w20
 	bl	HynixSetRRPara
-.L1506:
+.L1507:
 	mov	w0, w20
 	bl	NandcFlashCs
 	cmp	w22, 1
-	bne	.L1507
+	bne	.L1508
 	adrp	x0, .LANCHOR15
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L1507
+	cbz	w0, .L1508
 	mov	w0, w20
 	bl	flash_enter_slc_mode
-.L1508:
+.L1509:
 	ldr	w1, [x29, 112]
 	mov	w0, w20
 	bl	FlashProgFirstCmd
@@ -10267,7 +10278,7 @@ FlashProgPages:
 	ldp	x3, x4, [x25, 8]
 	mov	w0, w20
 	bl	NandcXferData
-	cbz	w23, .L1509
+	cbz	w23, .L1510
 	ldr	w1, [x29, 112]
 	mov	w0, w20
 	bl	FlashProgDpFirstCmd
@@ -10295,15 +10306,15 @@ FlashProgPages:
 	ldp	x3, x4, [x0, 8]
 	mov	w0, w20
 	bl	NandcXferData
-.L1509:
+.L1510:
 	ldr	w1, [x29, 112]
 	mov	w0, w20
 	add	w21, w21, w23
 	bl	FlashProgSecondCmd
 	mov	w0, w20
 	bl	NandcFlashDeCs
-	b	.L1500
-.L1504:
+	b	.L1501
+.L1505:
 	bl	NandcFlashCs
 	ldr	w1, [x29, 116]
 	adrp	x0, .LANCHOR17
@@ -10316,47 +10327,47 @@ FlashProgPages:
 	bl	FlashWaitReadyEN
 	mov	w0, w20
 	bl	NandcFlashDeCs
-	b	.L1505
-.L1507:
+	b	.L1506
+.L1508:
 	mov	w0, w20
 	bl	flash_exit_slc_mode
-	b	.L1508
-.L1513:
+	b	.L1509
+.L1514:
 	mov	w0, w20
 	bl	FlashWaitCmdDone
 	cmp	w22, 1
-	bne	.L1512
+	bne	.L1513
 	ldrb	w0, [x21]
-	cbz	w0, .L1512
+	cbz	w0, .L1513
 	mov	x0, 24
 	mul	x0, x20, x0
 	ldrb	w0, [x0, x23]
 	bl	flash_exit_slc_mode
-.L1512:
+.L1513:
 	add	x20, x20, 1
-	b	.L1511
-.L1514:
+	b	.L1512
+.L1515:
 	mov	w0, 56
 	and	w20, w24, 255
 	adrp	x23, .LANCHOR198
 	mov	x25, x23
 	umaddl	x24, w24, w0, x19
-.L1515:
+.L1516:
 	cmp	x24, x19
-	beq	.L1522
+	beq	.L1523
 	ldr	w0, [x19]
 	cmn	w0, #1
-	bne	.L1516
+	bne	.L1517
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC29
 	add	x0, x0, :lo12:.LC29
 	bl	printf
-.L1517:
+.L1518:
 	sub	w20, w20, #1
 	add	x19, x19, 56
 	and	w20, w20, 255
-	b	.L1515
-.L1516:
+	b	.L1516
+.L1517:
 	adrp	x21, .LANCHOR199
 	mov	w4, w20
 	add	x3, x29, 116
@@ -10379,41 +10390,41 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	w26, [x29, 120]
 	cmn	w26, #1
-	bne	.L1518
+	bne	.L1519
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC30
 	add	x0, x0, :lo12:.LC30
 	bl	printf
 	str	w26, [x19]
-.L1518:
+.L1519:
 	ldr	x0, [x19, 16]
-	cbz	x0, .L1519
+	cbz	x0, .L1520
 	ldr	w2, [x0]
 	ldr	x0, [x21, #:lo12:.LANCHOR199]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1519
+	beq	.L1520
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC31
 	add	x0, x0, :lo12:.LC31
 	bl	printf
 	mov	w0, -1
 	str	w0, [x19]
-.L1519:
+.L1520:
 	ldr	x0, [x19, 8]
-	cbz	x0, .L1517
+	cbz	x0, .L1518
 	ldr	w2, [x0]
 	ldr	x0, [x25, #:lo12:.LANCHOR198]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1517
+	beq	.L1518
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC32
 	add	x0, x0, :lo12:.LC32
 	bl	printf
 	mov	w0, -1
 	str	w0, [x19]
-	b	.L1517
+	b	.L1518
 	.size	FlashProgPages, .-FlashProgPages
 	.section	.text.FlashTestBlk,"ax",@progbits
 	.align	2
@@ -10427,7 +10438,7 @@ FlashTestBlk:
 	adrp	x0, .LANCHOR149
 	ldr	w0, [x0, #:lo12:.LANCHOR149]
 	cmp	w19, w0
-	bcc	.L1550
+	bcc	.L1551
 	adrp	x20, .LANCHOR153
 	mov	w2, 32
 	mov	w1, 165
@@ -10458,14 +10469,14 @@ FlashTestBlk:
 	add	x0, x29, 40
 	csetm	w19, ne
 	bl	FlashEraseBlocks
-.L1548:
+.L1549:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 160
 	ret
-.L1550:
+.L1551:
 	mov	w19, 0
-	b	.L1548
+	b	.L1549
 	.size	FlashTestBlk, .-FlashTestBlk
 	.section	.text.FtlLowFormatEraseBlock,"ax",@progbits
 	.align	2
@@ -10482,7 +10493,7 @@ FtlLowFormatEraseBlock:
 	ldr	w0, [x0, #:lo12:.LANCHOR76]
 	stp	x23, x24, [sp, 48]
 	stp	x27, x28, [sp, 80]
-	cbnz	w0, .L1575
+	cbnz	w0, .L1576
 	adrp	x23, .LANCHOR27
 	and	w25, w1, 255
 	adrp	x20, .LANCHOR15
@@ -10508,10 +10519,10 @@ FtlLowFormatEraseBlock:
 	mov	w19, 0
 	str	x1, [x29, 128]
 	str	x0, [x29, 120]
-.L1554:
+.L1555:
 	cmp	w11, w5, uxth
-	bhi	.L1558
-	cbz	w24, .L1552
+	bhi	.L1559
+	cbz	w24, .L1553
 	cmp	w10, 0
 	mov	w2, w24
 	cset	w22, ne
@@ -10524,31 +10535,31 @@ FtlLowFormatEraseBlock:
 	strb	w0, [x23, #:lo12:.LANCHOR27]
 	mov	w0, 56
 	umull	x24, w24, w0
-.L1561:
+.L1562:
 	ldr	x0, [x21, #:lo12:.LANCHOR77]
 	add	x1, x0, x27
 	ldr	w0, [x0, x27]
 	cmn	w0, #1
-	bne	.L1560
+	bne	.L1561
 	ldr	w0, [x1, 4]
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.L1560:
+.L1561:
 	add	x27, x27, 56
 	cmp	x27, x24
-	bne	.L1561
-	cbnz	w25, .L1562
+	bne	.L1562
+	cbnz	w25, .L1563
 	and	w22, w22, 65535
 	mov	w28, 6
 	mov	w27, 1
-.L1563:
+.L1564:
 	adrp	x0, .LANCHOR47
 	mov	w24, 0
 	add	x0, x0, :lo12:.LANCHOR47
 	str	x0, [x29, 112]
-.L1571:
+.L1572:
 	ldr	x0, [x29, 128]
 	mov	x5, 0
 	ldr	x6, [x21, #:lo12:.LANCHOR77]
@@ -10561,10 +10572,10 @@ FtlLowFormatEraseBlock:
 	ldr	x10, [x0, #:lo12:.LANCHOR187]
 	ldr	x0, [x29, 120]
 	ldrh	w11, [x0, #:lo12:.LANCHOR58]
-.L1564:
+.L1565:
 	cmp	w7, w5, uxth
-	bhi	.L1567
-	cbz	w20, .L1552
+	bhi	.L1568
+	cbz	w20, .L1553
 	mov	w2, w22
 	mov	w1, w20
 	strb	wzr, [x23, #:lo12:.LANCHOR27]
@@ -10576,11 +10587,11 @@ FtlLowFormatEraseBlock:
 	strb	w0, [x23, #:lo12:.LANCHOR27]
 	mov	x2, 0
 	umull	x1, w20, w1
-.L1570:
+.L1571:
 	ldr	x0, [x21, #:lo12:.LANCHOR77]
 	add	x3, x0, x2
 	ldr	w0, [x0, x2]
-	cbz	w0, .L1569
+	cbz	w0, .L1570
 	ldr	w0, [x3, 4]
 	add	w19, w19, 1
 	stp	x2, x1, [x29, 96]
@@ -10588,39 +10599,39 @@ FtlLowFormatEraseBlock:
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
 	ldp	x2, x1, [x29, 96]
-.L1569:
+.L1570:
 	add	x2, x2, 56
 	cmp	x1, x2
-	bne	.L1570
+	bne	.L1571
 	add	w24, w24, w28
 	and	w24, w24, 65535
 	cmp	w27, w24
-	bhi	.L1571
+	bhi	.L1572
 	mov	x23, 0
-.L1573:
-	cbz	w25, .L1572
+.L1574:
+	cbz	w25, .L1573
 	ldr	x0, [x21, #:lo12:.LANCHOR77]
 	add	x1, x0, x23
 	ldr	w0, [x0, x23]
-	cbnz	w0, .L1572
+	cbnz	w0, .L1573
 	ldr	w0, [x1, 4]
 	mov	w1, 1
 	str	x2, [x29, 136]
 	lsr	w0, w0, 10
 	bl	FtlFreeSysBlkQueueIn
 	ldr	x2, [x29, 136]
-.L1572:
+.L1573:
 	add	x23, x23, 56
 	cmp	x23, x2
-	bne	.L1573
+	bne	.L1574
 	cmp	w26, 63
 	ccmp	w25, 0, 0, hi
-	beq	.L1552
+	beq	.L1553
 	ldr	x0, [x21, #:lo12:.LANCHOR77]
 	mov	w2, w20
 	mov	w1, w22
 	bl	FlashEraseBlocks
-.L1552:
+.L1553:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10629,7 +10640,7 @@ FtlLowFormatEraseBlock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1558:
+.L1559:
 	mul	x0, x5, x8
 	mov	w1, w26
 	str	wzr, [x6, x0]
@@ -10637,13 +10648,13 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	and	w15, w0, 65535
 	mov	w22, w15
-	cbz	w25, .L1555
+	cbz	w25, .L1556
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L1556
-.L1555:
+	cbnz	w0, .L1557
+.L1556:
 	mov	w0, w22
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L1557
+	cbnz	w0, .L1558
 	umaddl	x1, w24, w14, x6
 	lsl	w15, w15, 10
 	mul	w0, w24, w13
@@ -10653,26 +10664,26 @@ FtlLowFormatEraseBlock:
 	str	w15, [x1, 4]
 	add	x0, x12, x0, sxtw 2
 	stp	xzr, x0, [x1, 8]
-.L1556:
-	add	x5, x5, 1
-	b	.L1554
 .L1557:
+	add	x5, x5, 1
+	b	.L1555
+.L1558:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1556
-.L1562:
+	b	.L1557
+.L1563:
 	adrp	x0, .LANCHOR53
 	ldrh	w27, [x0, #:lo12:.LANCHOR53]
 	ldrb	w0, [x20, #:lo12:.LANCHOR15]
-	cbnz	w0, .L1576
+	cbnz	w0, .L1577
 	lsr	w28, w27, 2
 	mov	w22, 1
-	b	.L1563
-.L1576:
+	b	.L1564
+.L1577:
 	mov	w22, 1
 	mov	w28, w22
-	b	.L1563
-.L1567:
+	b	.L1564
+.L1568:
 	mov	x0, 56
 	mov	w1, w26
 	mul	x0, x5, x0
@@ -10682,13 +10693,13 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	and	w13, w0, 65535
 	mov	w14, w13
-	cbz	w25, .L1565
+	cbz	w25, .L1566
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L1566
-.L1565:
+	cbnz	w0, .L1567
+.L1566:
 	mov	w0, w14
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L1566
+	cbnz	w0, .L1567
 	umaddl	x1, w20, w12, x6
 	add	w13, w24, w13, lsl 10
 	mul	w0, w20, w11
@@ -10698,12 +10709,12 @@ FtlLowFormatEraseBlock:
 	str	w13, [x1, 4]
 	add	x0, x10, x0, sxtw 2
 	stp	x8, x0, [x1, 8]
-.L1566:
+.L1567:
 	add	x5, x5, 1
-	b	.L1564
-.L1575:
+	b	.L1565
+.L1576:
 	mov	w19, 0
-	b	.L1552
+	b	.L1553
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
 	.section	.text.FtlBbmTblFlush,"ax",@progbits
 	.align	2
@@ -10719,7 +10730,7 @@ FtlBbmTblFlush:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w0, .L1599
+	cbnz	w0, .L1600
 	adrp	x24, .LANCHOR188
 	adrp	x23, .LANCHOR183
 	adrp	x20, .LANCHOR203
@@ -10739,10 +10750,10 @@ FtlBbmTblFlush:
 	add	x28, x28, :lo12:.LANCHOR123
 	mov	w1, 0
 	bl	ftl_memset
-.L1600:
+.L1601:
 	ldrh	w0, [x27]
 	cmp	w25, w0
-	blt	.L1601
+	blt	.L1602
 	add	x20, x20, :lo12:.LANCHOR203
 	add	x19, x21, :lo12:.LANCHOR74
 	mov	w2, 16
@@ -10769,7 +10780,7 @@ FtlBbmTblFlush:
 	adrp	x0, .LANCHOR37
 	ldr	w0, [x0, #:lo12:.LANCHOR37]
 	strh	w0, [x28, 12]
-.L1602:
+.L1603:
 	ldrh	w1, [x19]
 	ldrh	w4, [x28, 10]
 	ldrh	w2, [x19, 2]
@@ -10787,7 +10798,7 @@ FtlBbmTblFlush:
 	ldrh	w1, [x19, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L1603
+	blt	.L1604
 	ldr	w0, [x19, 8]
 	mov	w2, 1
 	ldrh	w1, [x19, 4]
@@ -10806,7 +10817,7 @@ FtlBbmTblFlush:
 	str	w1, [x0, 4]
 	mov	w1, w2
 	bl	FlashEraseBlocks
-.L1603:
+.L1604:
 	mov	w3, 1
 	mov	x0, x20
 	mov	w2, w3
@@ -10817,7 +10828,7 @@ FtlBbmTblFlush:
 	strh	w0, [x19, 2]
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L1604
+	bne	.L1605
 	ldr	w1, [x20, 4]
 	add	w21, w21, 1
 	adrp	x0, .LC34
@@ -10825,7 +10836,7 @@ FtlBbmTblFlush:
 	add	x0, x0, :lo12:.LC34
 	bl	printf
 	cmp	w21, 3
-	bls	.L1602
+	bls	.L1603
 	ldr	w1, [x20, 4]
 	mov	w2, w21
 	adrp	x0, .LC35
@@ -10833,7 +10844,7 @@ FtlBbmTblFlush:
 	bl	printf
 	mov	w0, 1
 	str	w0, [x22, #:lo12:.LANCHOR76]
-.L1599:
+.L1600:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10842,7 +10853,7 @@ FtlBbmTblFlush:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1601:
+.L1602:
 	ldrh	w2, [x28]
 	ldr	x1, [x26], 8
 	ldr	x0, [x19, 8]
@@ -10851,14 +10862,14 @@ FtlBbmTblFlush:
 	add	w25, w25, 1
 	add	x0, x0, x3, sxtw 2
 	bl	ftl_memcpy
-	b	.L1600
-.L1604:
+	b	.L1601
+.L1605:
 	add	w25, w25, 1
 	cmp	w25, 1
-	beq	.L1602
+	beq	.L1603
 	cmp	w0, 256
-	beq	.L1602
-	b	.L1599
+	beq	.L1603
+	b	.L1600
 	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
 	.section	.text.allocate_data_superblock,"ax",@progbits
 	.align	2
@@ -10867,7 +10878,7 @@ FtlBbmTblFlush:
 allocate_data_superblock:
 	adrp	x1, .LANCHOR76
 	ldr	w1, [x1, #:lo12:.LANCHOR76]
-	cbnz	w1, .L1678
+	cbnz	w1, .L1679
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
@@ -10881,7 +10892,7 @@ allocate_data_superblock:
 	add	x23, x0, :lo12:.LANCHOR88
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
-.L1669:
+.L1670:
 	ldr	x1, [x29, 120]
 	adrp	x0, .LANCHOR88
 	adrp	x24, .LANCHOR40
@@ -10890,8 +10901,8 @@ allocate_data_superblock:
 	add	w0, w0, w1
 	ldrh	w1, [x24, #:lo12:.LANCHOR40]
 	cmp	w0, w1
-	ble	.L1617
-	mov	w2, 3165
+	ble	.L1618
+	mov	w2, 3164
 	adrp	x1, .LANCHOR204
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR204
@@ -10902,11 +10913,11 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1617:
+.L1618:
 	adrp	x0, .LANCHOR93
 	add	x0, x0, :lo12:.LANCHOR93
 	cmp	x19, x0
-	bne	.L1618
+	bne	.L1619
 	adrp	x1, .LANCHOR172
 	ldrh	w2, [x23]
 	ldr	w3, [x1, #:lo12:.LANCHOR172]
@@ -10917,54 +10928,54 @@ allocate_data_superblock:
 	adrp	x4, .LANCHOR28
 	and	w1, w1, 65535
 	ldr	w4, [x4, #:lo12:.LANCHOR28]
-	cbz	w4, .L1619
+	cbz	w4, .L1620
 	adrp	x4, .LANCHOR170
 	ldr	w4, [x4, #:lo12:.LANCHOR170]
 	cmp	w4, 39
-	bhi	.L1619
+	bhi	.L1620
 	cmp	w4, 2
-	bls	.L1653
-	tbz	x2, 0, .L1649
-	cbz	w3, .L1653
-.L1649:
+	bls	.L1654
+	tbz	x2, 0, .L1650
+	cbz	w3, .L1654
+.L1650:
 	mov	w1, w0
-	b	.L1619
-.L1618:
+	b	.L1620
+.L1619:
 	ldrb	w0, [x19, 8]
 	cmp	w0, 1
-	bne	.L1653
+	bne	.L1654
 	adrp	x0, .LANCHOR44
 	ldrh	w0, [x0, #:lo12:.LANCHOR44]
 	cmp	w0, 1
-	beq	.L1653
+	beq	.L1654
 	adrp	x0, .LANCHOR15
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbnz	w0, .L1653
+	cbnz	w0, .L1654
 	adrp	x2, .LANCHOR28
 	ldrh	w0, [x23]
 	ldr	w2, [x2, #:lo12:.LANCHOR28]
 	lsr	w1, w0, 3
-	cbz	w2, .L1619
+	cbz	w2, .L1620
 	adrp	x2, .LANCHOR170
 	ldr	w2, [x2, #:lo12:.LANCHOR170]
 	cmp	w2, 1
-	bhi	.L1619
+	bhi	.L1620
 	mov	w1, 7
 	mul	w1, w0, w1
 	lsr	w1, w1, 3
-.L1619:
-	cbz	w1, .L1620
+.L1620:
+	cbz	w1, .L1621
 	sub	w1, w1, #1
 	and	w1, w1, 65535
-.L1620:
+.L1621:
 	ldrb	w2, [x19, 8]
 	adrp	x0, .LANCHOR87
 	add	x0, x0, :lo12:.LANCHOR87
 	bl	List_pop_index_node
 	and	w22, w0, 65535
 	ldrh	w0, [x23]
-	cbnz	w0, .L1621
-	mov	w2, 3185
+	cbnz	w0, .L1622
+	mov	w2, 3184
 	adrp	x1, .LANCHOR204
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR204
@@ -10975,23 +10986,23 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1621:
+.L1622:
 	ldrh	w0, [x23]
 	sub	w0, w0, #1
 	strh	w0, [x23]
 	ldrh	w0, [x24, #:lo12:.LANCHOR40]
 	cmp	w0, w22
-	bls	.L1669
+	bls	.L1670
 	adrp	x25, .LANCHOR83
 	ubfiz	x21, x22, 1, 16
 	ldr	x0, [x25, #:lo12:.LANCHOR83]
 	ldrh	w20, [x0, x21]
-	cbnz	w20, .L1669
+	cbnz	w20, .L1670
 	strh	w22, [x19]
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L1623
+	cbnz	w0, .L1624
 	ldr	x0, [x25, #:lo12:.LANCHOR83]
 	mov	w1, -1
 	strh	w1, [x0, x21]
@@ -11000,8 +11011,8 @@ allocate_data_superblock:
 	add	w0, w0, w1
 	ldrh	w1, [x24, #:lo12:.LANCHOR40]
 	cmp	w0, w1
-	ble	.L1669
-	mov	w2, 3201
+	ble	.L1670
+	mov	w2, 3200
 	adrp	x1, .LANCHOR204
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR204
@@ -11012,18 +11023,18 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-	b	.L1669
-.L1653:
+	b	.L1670
+.L1654:
 	mov	w1, 0
-	b	.L1620
-.L1623:
+	b	.L1621
+.L1624:
 	ldrh	w1, [x27, #:lo12:.LANCHOR85]
 	ldrh	w0, [x23]
 	add	w0, w0, w1
 	ldrh	w1, [x24, #:lo12:.LANCHOR40]
 	cmp	w0, w1
-	ble	.L1625
-	mov	w2, 3204
+	ble	.L1626
+	mov	w2, 3203
 	adrp	x1, .LANCHOR204
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR204
@@ -11034,7 +11045,7 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1625:
+.L1626:
 	adrp	x1, .LANCHOR38
 	adrp	x25, .LANCHOR77
 	mov	w2, 56
@@ -11047,11 +11058,11 @@ allocate_data_superblock:
 	add	x0, x4, 8
 	umaddl	x1, w2, w1, x3
 	add	x1, x4, x1
-.L1626:
+.L1627:
 	cmp	x1, x0
-	bne	.L1628
-	cbnz	w20, .L1629
-	mov	w2, 3216
+	bne	.L1629
+	cbnz	w20, .L1630
+	mov	w2, 3215
 	adrp	x1, .LANCHOR204
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR204
@@ -11062,26 +11073,26 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1629:
+.L1630:
 	adrp	x0, .LANCHOR28
 	adrp	x28, .LANCHOR78
 	ldr	w0, [x0, #:lo12:.LANCHOR28]
-	cbz	w0, .L1630
+	cbz	w0, .L1631
 	adrp	x0, .LANCHOR91
 	add	x0, x0, :lo12:.LANCHOR91
 	cmp	x19, x0
-	bne	.L1630
+	bne	.L1631
 	ldr	x0, [x28, #:lo12:.LANCHOR78]
 	ldrh	w0, [x0, x21]
 	cmp	w0, 40
-	bls	.L1630
+	bls	.L1631
 	strb	wzr, [x19, 8]
-.L1630:
+.L1631:
 	adrp	x0, .LANCHOR205
 	ldrh	w0, [x0, #:lo12:.LANCHOR205]
 	cmp	w0, w22
-	bne	.L1631
-	mov	w2, 3223
+	bne	.L1632
+	mov	w2, 3222
 	adrp	x1, .LANCHOR204
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR204
@@ -11092,18 +11103,18 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1631:
+.L1632:
 	ldrb	w0, [x19, 8]
 	adrp	x6, .LANCHOR48
 	adrp	x5, .LANCHOR167
 	adrp	x4, .LANCHOR168
 	ldr	x1, [x28, #:lo12:.LANCHOR78]
-	cbnz	w0, .L1632
+	cbnz	w0, .L1633
 	ldrh	w0, [x1, x21]
-	cbz	w0, .L1633
+	cbz	w0, .L1634
 	ldrh	w2, [x6, #:lo12:.LANCHOR48]
 	add	w0, w0, w2
-.L1681:
+.L1682:
 	strh	w0, [x1, x21]
 	mov	w1, 0
 	ldr	w0, [x5, #:lo12:.LANCHOR167]
@@ -11111,15 +11122,15 @@ allocate_data_superblock:
 	str	w0, [x5, #:lo12:.LANCHOR167]
 	mov	w0, w22
 	bl	ftl_set_blk_mode
-.L1635:
+.L1636:
 	ldr	x0, [x28, #:lo12:.LANCHOR78]
 	ldrh	w1, [x0, x21]
 	adrp	x0, .LANCHOR169
 	ldr	w2, [x0, #:lo12:.LANCHOR169]
 	cmp	w1, w2
-	bls	.L1636
+	bls	.L1637
 	str	w1, [x0, #:lo12:.LANCHOR169]
-.L1636:
+.L1637:
 	ldr	w2, [x5, #:lo12:.LANCHOR167]
 	mov	x3, 4
 	ldr	w1, [x4, #:lo12:.LANCHOR168]
@@ -11140,20 +11151,20 @@ allocate_data_superblock:
 	umaddl	x1, w1, w20, x3
 	add	x2, x0, 4
 	add	x1, x0, x1
-.L1637:
+.L1638:
 	cmp	x1, x2
-	bne	.L1638
+	bne	.L1639
 	adrp	x1, .LANCHOR15
 	ldrb	w1, [x1, #:lo12:.LANCHOR15]
-	cbz	w1, .L1639
+	cbz	w1, .L1640
 	ldrb	w1, [x19, 8]
 	mov	w2, w20
 	cmp	w1, 1
-	bne	.L1640
+	bne	.L1641
 	mov	w1, 0
-.L1682:
+.L1683:
 	bl	FlashEraseBlocks
-.L1639:
+.L1640:
 	ldrb	w1, [x19, 8]
 	mov	w2, w20
 	ldr	x0, [x25, #:lo12:.LANCHOR77]
@@ -11161,39 +11172,39 @@ allocate_data_superblock:
 	bl	FlashEraseBlocks
 	mov	w1, 0
 	mov	x3, 56
-.L1641:
+.L1642:
 	cmp	w20, w24, uxth
-	bhi	.L1643
-	cbz	w1, .L1644
+	bhi	.L1644
+	cbz	w1, .L1645
 	mov	w0, w22
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L1644:
+.L1645:
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L1645
+	cbnz	w0, .L1646
 	adrp	x0, .LANCHOR83
 	mov	w1, -1
 	ldr	x0, [x0, #:lo12:.LANCHOR83]
 	strh	w1, [x0, x21]
-	b	.L1669
-.L1628:
+	b	.L1670
+.L1629:
 	ldrh	w3, [x5]
 	stp	xzr, xzr, [x0]
 	cmp	w3, w6
-	beq	.L1627
+	beq	.L1628
 	umaddl	x7, w20, w2, x4
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	lsl	w3, w3, 10
 	str	w3, [x7, 4]
-.L1627:
+.L1628:
 	add	x0, x0, 56
 	add	x5, x5, 2
-	b	.L1626
-.L1633:
+	b	.L1627
+.L1634:
 	mov	w0, 2
-	b	.L1681
-.L1632:
+	b	.L1682
+.L1633:
 	ldrh	w0, [x1, x21]
 	add	w0, w0, 1
 	strh	w0, [x1, x21]
@@ -11202,22 +11213,22 @@ allocate_data_superblock:
 	str	w0, [x4, #:lo12:.LANCHOR168]
 	mov	w0, w22
 	bl	ftl_set_blk_mode.part.10
-	b	.L1635
-.L1638:
+	b	.L1636
+.L1639:
 	ldr	w3, [x2]
 	and	w3, w3, -1024
 	str	w3, [x2], 56
-	b	.L1637
-.L1640:
+	b	.L1638
+.L1641:
 	mov	w1, 1
-	b	.L1682
-.L1643:
+	b	.L1683
+.L1644:
 	mul	x0, x24, x3
 	ldr	x2, [x25, #:lo12:.LANCHOR77]
 	add	x4, x2, x0
 	ldr	w2, [x2, x0]
 	cmn	w2, #1
-	bne	.L1642
+	bne	.L1643
 	add	w1, w1, 1
 	ldr	w0, [x4, 4]
 	str	x3, [x29, 104]
@@ -11230,11 +11241,11 @@ allocate_data_superblock:
 	ldrb	w0, [x19, 7]
 	sub	w0, w0, #1
 	strb	w0, [x19, 7]
-.L1642:
+.L1643:
 	add	x24, x24, 1
 	add	x26, x26, 2
-	b	.L1641
-.L1645:
+	b	.L1642
+.L1646:
 	adrp	x1, .LANCHOR52
 	adrp	x2, .LANCHOR159
 	strh	wzr, [x19, 2]
@@ -11252,11 +11263,11 @@ allocate_data_superblock:
 	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	strh	w0, [x1, x21]
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1646
+	cbz	w0, .L1647
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L1616
-.L1646:
-	mov	w2, 3282
+	cbnz	w0, .L1617
+.L1647:
+	mov	w2, 3281
 	adrp	x1, .LANCHOR204
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR204
@@ -11267,7 +11278,7 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1616:
+.L1617:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -11276,7 +11287,7 @@ allocate_data_superblock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1678:
+.L1679:
 	mov	w0, 0
 	ret
 	.size	allocate_data_superblock, .-allocate_data_superblock
@@ -11295,17 +11306,17 @@ FtlGcFreeBadSuperBlk:
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	str	x27, [sp, 80]
-	cbz	w0, .L1684
+	cbz	w0, .L1685
 	adrp	x23, .LANCHOR117
 	add	x24, x23, :lo12:.LANCHOR117
 	mov	w19, 0
-.L1685:
+.L1686:
 	adrp	x0, .LANCHOR38
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w0, w19
-	bhi	.L1691
+	bhi	.L1692
 	bl	FtlGcReFreshBadBlk
-.L1684:
+.L1685:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -11314,7 +11325,7 @@ FtlGcFreeBadSuperBlk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1691:
+.L1692:
 	adrp	x0, .LANCHOR47
 	add	x0, x0, :lo12:.LANCHOR47
 	mov	w1, w25
@@ -11323,19 +11334,19 @@ FtlGcFreeBadSuperBlk:
 	ldrb	w0, [x0, w19, sxtw]
 	bl	V2P_block
 	and	w26, w0, 65535
-.L1686:
+.L1687:
 	ldrh	w0, [x22]
 	cmp	w0, w20
-	bhi	.L1690
+	bhi	.L1691
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1685
-.L1690:
+	b	.L1686
+.L1691:
 	add	x0, x23, :lo12:.LANCHOR117
 	add	w27, w20, 1
 	ldrh	w0, [x0, w20, sxtw 1]
 	cmp	w0, w26
-	bne	.L1687
+	bne	.L1688
 	mov	w0, w26
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
@@ -11343,22 +11354,22 @@ FtlGcFreeBadSuperBlk:
 	sxtw	x3, w27
 	and	x4, x20, 65535
 	mov	x0, 0
-.L1688:
+.L1689:
 	add	w2, w20, w0
 	cmp	w1, w2, uxth
-	bhi	.L1689
+	bhi	.L1690
 	sub	w1, w1, #1
 	strh	w1, [x22]
-.L1687:
+.L1688:
 	and	w20, w27, 65535
-	b	.L1686
-.L1689:
+	b	.L1687
+.L1690:
 	add	x2, x3, x0
 	ldrh	w5, [x24, x2, lsl 1]
 	add	x2, x4, x0
 	add	x0, x0, 1
 	strh	w5, [x24, x2, lsl 1]
-	b	.L1688
+	b	.L1689
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
 	.section	.text.update_vpc_list,"ax",@progbits
 	.align	2
@@ -11373,22 +11384,22 @@ update_vpc_list:
 	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	ubfiz	x0, x19, 1, 16
 	ldrh	w0, [x1, x0]
-	cbnz	w0, .L1697
+	cbnz	w0, .L1698
 	adrp	x0, .LANCHOR205
 	ldrh	w1, [x0, #:lo12:.LANCHOR205]
 	cmp	w1, w19
-	bne	.L1698
+	bne	.L1699
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR205]
-.L1699:
+.L1700:
 	adrp	x20, .LANCHOR85
 	mov	w1, w19
 	adrp	x0, .LANCHOR82
 	add	x0, x0, :lo12:.LANCHOR82
 	bl	List_remove_node
 	ldrh	w0, [x20, #:lo12:.LANCHOR85]
-	cbnz	w0, .L1701
-	mov	w2, 3393
+	cbnz	w0, .L1702
+	mov	w2, 3392
 	adrp	x1, .LANCHOR207
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR207
@@ -11399,7 +11410,7 @@ update_vpc_list:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1701:
+.L1702:
 	ldrh	w0, [x20, #:lo12:.LANCHOR85]
 	sub	w0, w0, #1
 	strh	w0, [x20, #:lo12:.LANCHOR85]
@@ -11414,8 +11425,8 @@ update_vpc_list:
 	adrp	x1, .LANCHOR40
 	ldrh	w1, [x1, #:lo12:.LANCHOR40]
 	cmp	w0, w1
-	ble	.L1705
-	mov	w2, 3396
+	ble	.L1706
+	mov	w2, 3395
 	adrp	x1, .LANCHOR207
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR207
@@ -11426,32 +11437,32 @@ update_vpc_list:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1705:
+.L1706:
 	mov	w0, 1
-	b	.L1696
-.L1698:
+	b	.L1697
+.L1699:
 	adrp	x0, .LANCHOR91
 	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	cmp	w0, w19
-	beq	.L1704
+	beq	.L1705
 	adrp	x0, .LANCHOR92
 	ldrh	w0, [x0, #:lo12:.LANCHOR92]
 	cmp	w0, w19
-	beq	.L1704
+	beq	.L1705
 	adrp	x0, .LANCHOR93
 	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w0, w19
-	bne	.L1699
-.L1704:
+	bne	.L1700
+.L1705:
 	mov	w0, 0
-.L1696:
+.L1697:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1697:
+.L1698:
 	mov	w0, w19
 	bl	List_update_data_list
-	b	.L1704
+	b	.L1705
 	.size	update_vpc_list, .-update_vpc_list
 	.section	.text.decrement_vpc_count,"ax",@progbits
 	.align	2
@@ -11465,12 +11476,12 @@ decrement_vpc_count:
 	stp	x21, x22, [sp, 32]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1708
+	beq	.L1709
 	adrp	x20, .LANCHOR83
 	ubfiz	x21, x19, 1, 16
 	ldr	x1, [x20, #:lo12:.LANCHOR83]
 	ldrh	w0, [x1, x21]
-	cbnz	w0, .L1709
+	cbnz	w0, .L1710
 	mov	w2, 0
 	mov	w1, w19
 	adrp	x0, .LC36
@@ -11478,8 +11489,8 @@ decrement_vpc_count:
 	bl	printf
 	ldr	x0, [x20, #:lo12:.LANCHOR83]
 	ldrh	w0, [x0, x21]
-	cbnz	w0, .L1710
-	mov	w2, 3411
+	cbnz	w0, .L1711
+	mov	w2, 3410
 	adrp	x1, .LANCHOR208
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR208
@@ -11490,7 +11501,7 @@ decrement_vpc_count:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1710:
+.L1711:
 	ldr	x0, [x20, #:lo12:.LANCHOR83]
 	adrp	x6, .LANCHOR87
 	add	x6, x6, :lo12:.LANCHOR87
@@ -11499,14 +11510,14 @@ decrement_vpc_count:
 	mov	w1, w19
 	mov	x0, x6
 	bl	test_node_in_list
-	cbz	w0, .L1711
+	cbz	w0, .L1712
 	adrp	x22, .LANCHOR88
 	mov	w1, w19
 	mov	x0, x6
 	bl	List_remove_node
 	ldrh	w0, [x22, #:lo12:.LANCHOR88]
-	cbnz	w0, .L1712
-	mov	w2, 3415
+	cbnz	w0, .L1713
+	mov	w2, 3414
 	adrp	x1, .LANCHOR208
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR208
@@ -11517,7 +11528,7 @@ decrement_vpc_count:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1712:
+.L1713:
 	ldrh	w0, [x22, #:lo12:.LANCHOR88]
 	sub	w0, w0, #1
 	strh	w0, [x22, #:lo12:.LANCHOR88]
@@ -11529,26 +11540,26 @@ decrement_vpc_count:
 	adrp	x0, .LC37
 	add	x0, x0, :lo12:.LC37
 	bl	printf
-.L1711:
+.L1712:
 	mov	w0, w19
 	bl	FtlGcRefreshBlock
-.L1715:
+.L1716:
 	mov	w20, 0
-	b	.L1707
-.L1709:
+	b	.L1708
+.L1710:
 	sub	w0, w0, #1
 	strh	w0, [x1, x21]
-.L1708:
+.L1709:
 	adrp	x21, .LANCHOR133
 	mov	w1, 65535
 	ldrh	w0, [x21, #:lo12:.LANCHOR133]
 	cmp	w0, w1
-	bne	.L1714
+	bne	.L1715
 	strh	w19, [x21, #:lo12:.LANCHOR133]
-	b	.L1715
-.L1714:
+	b	.L1716
+.L1715:
 	cmp	w19, w0
-	beq	.L1715
+	beq	.L1716
 	bl	update_vpc_list
 	cmp	w0, 0
 	adrp	x1, .LANCHOR81
@@ -11566,10 +11577,10 @@ decrement_vpc_count:
 	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	and	x2, x0, 65535
 	ldrh	w1, [x1, x2, lsl 1]
-	cbnz	w1, .L1707
+	cbnz	w1, .L1708
 	cmp	w19, w0, uxth
-	beq	.L1707
-	mov	w2, 3436
+	beq	.L1708
+	mov	w2, 3435
 	adrp	x1, .LANCHOR208
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR208
@@ -11580,7 +11591,7 @@ decrement_vpc_count:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1707:
+.L1708:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11593,7 +11604,7 @@ decrement_vpc_count:
 	.type	FtlSlcSuperblockCheck, %function
 FtlSlcSuperblockCheck:
 	ldrh	w1, [x0, 4]
-	cbz	w1, .L1732
+	cbz	w1, .L1733
 	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
@@ -11602,7 +11613,7 @@ FtlSlcSuperblockCheck:
 	stp	x21, x22, [sp, 32]
 	str	x23, [sp, 48]
 	cmp	w1, w20
-	beq	.L1720
+	beq	.L1721
 	mov	x19, x0
 	ldrb	w0, [x0, 6]
 	adrp	x22, .LANCHOR15
@@ -11611,37 +11622,37 @@ FtlSlcSuperblockCheck:
 	add	x23, x22, :lo12:.LANCHOR15
 	add	x21, x21, :lo12:.LANCHOR120
 	ldrh	w0, [x19, x0, lsl 1]
-.L1724:
+.L1725:
 	cmp	w0, w20
-	beq	.L1726
+	beq	.L1727
 	ldrb	w0, [x19, 8]
 	cmp	w0, 1
-	bne	.L1727
+	bne	.L1728
 	ldrb	w1, [x23]
-	cbnz	w1, .L1727
+	cbnz	w1, .L1728
 	ldrh	w1, [x19, 2]
 	ldrh	w1, [x21, x1, lsl 1]
 	cmp	w1, w20
-	bne	.L1727
+	bne	.L1728
 	ldrh	w0, [x19, 4]
 	sub	w0, w0, #1
 	strh	w0, [x19, 4]
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1726
+	cbnz	w0, .L1727
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
-.L1735:
+.L1736:
 	strh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
-.L1720:
+.L1721:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1726:
+.L1727:
 	ldrb	w0, [x19, 6]
 	adrp	x1, .LANCHOR38
 	add	w0, w0, 1
@@ -11649,26 +11660,26 @@ FtlSlcSuperblockCheck:
 	and	w0, w0, 255
 	strb	w0, [x19, 6]
 	cmp	w1, w0
-	bne	.L1725
+	bne	.L1726
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L1725:
+.L1726:
 	ldrb	w0, [x19, 6]
 	add	x0, x0, 8
 	ldrh	w0, [x19, x0, lsl 1]
-	b	.L1724
-.L1727:
+	b	.L1725
+.L1728:
 	ldrb	w1, [x22, #:lo12:.LANCHOR15]
-	cbz	w1, .L1720
+	cbz	w1, .L1721
 	cmp	w0, 1
-	bne	.L1720
+	bne	.L1721
 	adrp	x0, .LANCHOR53
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bcc	.L1720
+	bcc	.L1721
 	ldrh	w0, [x19]
 	adrp	x1, .LANCHOR83
 	ldrh	w3, [x19, 4]
@@ -11680,8 +11691,8 @@ FtlSlcSuperblockCheck:
 	adrp	x0, .LANCHOR52
 	strh	wzr, [x19, 4]
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
-	b	.L1735
-.L1732:
+	b	.L1736
+.L1733:
 	ret
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
 	.section	.text.get_new_active_ppa,"ax",@progbits
@@ -11699,8 +11710,8 @@ get_new_active_ppa:
 	stp	x23, x24, [sp, 48]
 	cmp	w1, w0
 	str	x25, [sp, 64]
-	bne	.L1737
-	mov	w2, 3333
+	bne	.L1738
+	mov	w2, 3332
 	adrp	x1, .LANCHOR209
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR209
@@ -11711,13 +11722,13 @@ get_new_active_ppa:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1737:
+.L1738:
 	adrp	x20, .LANCHOR52
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bne	.L1738
-	mov	w2, 3334
+	bne	.L1739
+	mov	w2, 3333
 	adrp	x1, .LANCHOR209
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR209
@@ -11728,10 +11739,10 @@ get_new_active_ppa:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1738:
+.L1739:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1739
-	mov	w2, 3335
+	cbnz	w0, .L1740
+	mov	w2, 3334
 	adrp	x1, .LANCHOR209
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR209
@@ -11742,7 +11753,7 @@ get_new_active_ppa:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1739:
+.L1740:
 	ldrb	w0, [x19, 6]
 	adrp	x21, .LANCHOR38
 	strb	wzr, [x19, 10]
@@ -11753,42 +11764,42 @@ get_new_active_ppa:
 	add	x24, x24, :lo12:.LANCHOR120
 	add	x25, x21, :lo12:.LANCHOR38
 	ldrh	w22, [x19, x0, lsl 1]
-.L1740:
+.L1741:
 	mov	w2, 65535
 	cmp	w22, w2
-	beq	.L1741
+	beq	.L1742
 	ldrb	w0, [x19, 8]
 	ldrh	w1, [x19, 4]
 	cmp	w0, 1
 	ldrh	w0, [x19, 2]
-	bne	.L1743
+	bne	.L1744
 	ldrb	w3, [x23]
-	cbnz	w3, .L1743
+	cbnz	w3, .L1744
 	ldrh	w3, [x24, w0, sxtw 1]
 	cmp	w3, w2
-	bne	.L1743
+	bne	.L1744
 	ldrh	w0, [x19]
 	sub	w1, w1, #1
 	strh	w1, [x19, 4]
 	bl	decrement_vpc_count
-.L1741:
+.L1742:
 	ldrb	w0, [x19, 6]
 	ldrh	w1, [x25]
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x19, 6]
 	cmp	w1, w0
-	bne	.L1742
+	bne	.L1743
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L1742:
+.L1743:
 	ldrb	w0, [x19, 6]
 	add	x0, x0, 8
 	ldrh	w22, [x19, x0, lsl 1]
-	b	.L1740
-.L1743:
+	b	.L1741
+.L1744:
 	adrp	x23, .LANCHOR15
 	adrp	x24, .LANCHOR120
 	orr	w22, w0, w22, lsl 10
@@ -11796,46 +11807,46 @@ get_new_active_ppa:
 	add	x24, x24, :lo12:.LANCHOR120
 	sub	w1, w1, #1
 	strh	w1, [x19, 4]
-.L1744:
+.L1745:
 	ldrb	w0, [x19, 6]
 	mov	w1, 65535
 	ldrh	w3, [x21, #:lo12:.LANCHOR38]
-.L1746:
+.L1747:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	cmp	w0, w3
-	bne	.L1745
+	bne	.L1746
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
 	mov	w0, 0
-.L1745:
+.L1746:
 	add	x2, x19, x0, sxtw 1
 	ldrh	w2, [x2, 16]
 	cmp	w2, w1
-	beq	.L1746
+	beq	.L1747
 	strb	w0, [x19, 6]
 	ldrb	w0, [x19, 8]
 	cmp	w0, 1
-	bne	.L1747
+	bne	.L1748
 	ldrb	w2, [x23]
 	ldrh	w0, [x19, 2]
-	cbnz	w2, .L1748
+	cbnz	w2, .L1749
 	ldrh	w0, [x24, w0, sxtw 1]
 	cmp	w0, w1
-	bne	.L1747
+	bne	.L1748
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1747
+	cbz	w0, .L1748
 	sub	w0, w0, #1
 	strh	w0, [x19, 4]
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-	b	.L1744
-.L1748:
+	b	.L1745
+.L1749:
 	adrp	x1, .LANCHOR53
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	cmp	w0, w1
-	bcc	.L1747
+	bcc	.L1748
 	ldrh	w0, [x19]
 	adrp	x1, .LANCHOR83
 	ldrh	w3, [x19, 4]
@@ -11848,14 +11859,14 @@ get_new_active_ppa:
 	ldrh	w0, [x20, #:lo12:.LANCHOR52]
 	strh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
-.L1747:
+.L1748:
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bne	.L1736
+	bne	.L1737
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1736
-	mov	w2, 3379
+	cbz	w0, .L1737
+	mov	w2, 3378
 	adrp	x1, .LANCHOR209
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR209
@@ -11866,7 +11877,7 @@ get_new_active_ppa:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1736:
+.L1737:
 	mov	w0, w22
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -11890,7 +11901,7 @@ FtlVpcTblFlush:
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	str	x0, [x29, 112]
-	cbnz	w1, .L1761
+	cbnz	w1, .L1762
 	adrp	x25, .LANCHOR188
 	adrp	x27, .LANCHOR210
 	adrp	x23, .LANCHOR183
@@ -11915,7 +11926,7 @@ FtlVpcTblFlush:
 	add	x21, x2, :lo12:.LANCHOR80
 	str	wzr, [x19, 12]
 	str	w3, [x2, #:lo12:.LANCHOR80]
-	mov	w2, 86
+	mov	w2, 87
 	movk	w2, 0x5000, lsl 16
 	strh	w1, [x21, 8]
 	adrp	x1, .LANCHOR45
@@ -11995,7 +12006,7 @@ FtlVpcTblFlush:
 	adrp	x0, .LANCHOR69
 	str	x26, [x29, 104]
 	ldrh	w0, [x0, #:lo12:.LANCHOR69]
-	cbz	w0, .L1762
+	cbz	w0, .L1763
 	ldrh	w0, [x21, #:lo12:.LANCHOR40]
 	adrp	x1, .LANCHOR66
 	ldr	x3, [x22, 8]
@@ -12009,7 +12020,7 @@ FtlVpcTblFlush:
 	and	x0, x0, 65532
 	add	x0, x3, x0
 	bl	ftl_memcpy
-.L1762:
+.L1763:
 	mov	w0, 0
 	bl	FtlUpdateVaildLpn
 	adrp	x0, .LANCHOR2
@@ -12022,7 +12033,7 @@ FtlVpcTblFlush:
 	add	x0, x27, :lo12:.LANCHOR53
 	mov	w26, 65535
 	str	x0, [x29, 96]
-.L1763:
+.L1764:
 	ldrh	w2, [x28, 2]
 	ldrh	w1, [x28]
 	ldr	x0, [x23, #:lo12:.LANCHOR183]
@@ -12034,7 +12045,7 @@ FtlVpcTblFlush:
 	ldrh	w0, [x27, #:lo12:.LANCHOR53]
 	sub	w0, w0, #1
 	cmp	w2, w0
-	blt	.L1764
+	blt	.L1765
 	ldrh	w26, [x28, 4]
 	strh	wzr, [x28, 2]
 	strh	w1, [x28, 4]
@@ -12048,16 +12059,16 @@ FtlVpcTblFlush:
 	strh	w0, [x28]
 	strh	w0, [x19, 2]
 	str	w1, [x19, 4]
-.L1764:
+.L1765:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
-	cbz	w0, .L1765
+	cbz	w0, .L1766
 	ldr	x0, [x29, 104]
 	ldrh	w1, [x0, #:lo12:.LANCHOR57]
 	ldr	x0, [x23, #:lo12:.LANCHOR183]
 	bl	js_hash
 	str	w0, [x19, 12]
-.L1765:
+.L1766:
 	mov	w3, 1
 	mov	x0, x22
 	mov	w1, w3
@@ -12069,9 +12080,9 @@ FtlVpcTblFlush:
 	and	w0, w0, 65535
 	strh	w0, [x28, 2]
 	cmn	w1, #1
-	bne	.L1766
-	cmp	w0, 1
 	bne	.L1767
+	cmp	w0, 1
+	bne	.L1768
 	mov	w2, 1219
 	adrp	x1, .LANCHOR211
 	adrp	x0, .LC5
@@ -12083,19 +12094,19 @@ FtlVpcTblFlush:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1767:
+.L1768:
 	ldrh	w0, [x28, 2]
 	cmp	w0, 1
-	bne	.L1768
+	bne	.L1769
 	ldr	x0, [x29, 96]
 	ldrh	w0, [x0]
 	sub	w0, w0, #1
 	strh	w0, [x28, 2]
-.L1768:
+.L1769:
 	add	w21, w21, 1
 	and	w21, w21, 65535
 	cmp	w21, 3
-	bls	.L1763
+	bls	.L1764
 	add	x20, x20, :lo12:.LANCHOR203
 	mov	w2, w21
 	adrp	x0, .LC38
@@ -12105,7 +12116,7 @@ FtlVpcTblFlush:
 	ldr	x1, [x29, 112]
 	mov	w0, 1
 	str	w0, [x1, #:lo12:.LANCHOR76]
-.L1761:
+.L1762:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -12114,18 +12125,18 @@ FtlVpcTblFlush:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1766:
+.L1767:
 	cmp	w0, 1
-	beq	.L1763
+	beq	.L1764
 	cmp	w1, 256
-	beq	.L1763
+	beq	.L1764
 	mov	w0, 65535
 	cmp	w26, w0
-	beq	.L1761
+	beq	.L1762
 	mov	w1, 1
 	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-	b	.L1761
+	b	.L1762
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
 	.section	.text.FtlSuperblockPowerLostFix,"ax",@progbits
 	.align	2
@@ -12139,16 +12150,16 @@ FtlSuperblockPowerLostFix:
 	ldr	w23, [x1, #:lo12:.LANCHOR76]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	cbnz	w23, .L1784
+	cbnz	w23, .L1785
 	adrp	x1, .LANCHOR15
 	ldrb	w1, [x1, #:lo12:.LANCHOR15]
-	cbz	w1, .L1795
+	cbz	w1, .L1796
 	ldrb	w1, [x0, 8]
 	cmp	w1, 1
-	bne	.L1795
+	bne	.L1796
 	ldrh	w21, [x0, 4]
 	mov	w23, w1
-.L1786:
+.L1787:
 	adrp	x1, .LANCHOR188
 	mov	x19, x0
 	mov	w0, -1
@@ -12172,13 +12183,13 @@ FtlSuperblockPowerLostFix:
 	mov	w1, 22136
 	movk	w1, 0x1234, lsl 16
 	str	w1, [x0, 4]
-.L1787:
+.L1788:
 	sub	w21, w21, #1
 	cmn	w21, #1
-	beq	.L1790
+	beq	.L1791
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1788
-.L1790:
+	cbnz	w0, .L1789
+.L1791:
 	ldrh	w0, [x19]
 	adrp	x1, .LANCHOR83
 	ldrh	w3, [x19, 4]
@@ -12192,21 +12203,21 @@ FtlSuperblockPowerLostFix:
 	strh	wzr, [x19, 4]
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	strh	w0, [x19, 2]
-.L1784:
+.L1785:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1795:
+.L1796:
 	mov	w21, 12
-	b	.L1786
-.L1788:
+	b	.L1787
+.L1789:
 	mov	x0, x19
 	bl	get_new_active_ppa
 	str	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L1790
+	beq	.L1791
 	ldr	w0, [x22]
 	mov	w3, 0
 	str	w0, [x20, 4]
@@ -12220,7 +12231,7 @@ FtlSuperblockPowerLostFix:
 	bl	FlashProgPages
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-	b	.L1787
+	b	.L1788
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
 	.section	.text.FtlLoadFactoryBbt,"ax",@progbits
 	.align	2
@@ -12252,10 +12263,10 @@ FtlLoadFactoryBbt:
 	mov	w21, 0
 	mov	w27, -1
 	str	x25, [x1, 16]
-.L1801:
+.L1802:
 	ldrh	w0, [x23]
 	cmp	w21, w0
-	bcc	.L1806
+	bcc	.L1807
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -12264,18 +12275,18 @@ FtlLoadFactoryBbt:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1806:
+.L1807:
 	ldrh	w19, [x26, #:lo12:.LANCHOR51]
 	add	x24, x22, :lo12:.LANCHOR203
 	strh	w27, [x20]
 	mov	w3, 61664
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L1802:
+.L1803:
 	ldrh	w0, [x28]
 	sub	w1, w0, #15
 	cmp	w1, w19
-	bgt	.L1804
+	bgt	.L1805
 	madd	w0, w0, w21, w19
 	mov	w2, 1
 	str	w3, [x29, 108]
@@ -12287,19 +12298,19 @@ FtlLoadFactoryBbt:
 	ldr	w0, [x24]
 	ldr	w3, [x29, 108]
 	cmn	w0, #1
-	beq	.L1803
+	beq	.L1804
 	ldrh	w0, [x25]
 	cmp	w0, w3
-	bne	.L1803
+	bne	.L1804
 	strh	w19, [x20]
-.L1804:
+.L1805:
 	add	w21, w21, 1
 	add	x20, x20, 2
-	b	.L1801
-.L1803:
+	b	.L1802
+.L1804:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L1802
+	b	.L1803
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
 	.section	.text.FtlGetLastWrittenPage,"ax",@progbits
 	.align	2
@@ -12313,10 +12324,10 @@ FtlGetLastWrittenPage:
 	mov	w23, w1
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	bne	.L1812
+	bne	.L1813
 	adrp	x1, .LANCHOR53
 	ldrh	w19, [x1, #:lo12:.LANCHOR53]
-.L1813:
+.L1814:
 	sub	w19, w19, #1
 	lsl	w21, w0, 10
 	sxth	w19, w19
@@ -12330,24 +12341,24 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 128]
 	cmn	w0, #1
-	bne	.L1814
+	bne	.L1815
 	mov	w22, 0
 	mov	w24, 2
-.L1815:
+.L1816:
 	cmp	w22, w19
-	ble	.L1818
-.L1814:
+	ble	.L1819
+.L1815:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 192
 	ret
-.L1812:
+.L1813:
 	adrp	x1, .LANCHOR52
 	ldrh	w19, [x1, #:lo12:.LANCHOR52]
-	b	.L1813
-.L1818:
+	b	.L1814
+.L1819:
 	add	w20, w22, w19
 	mov	w2, w23
 	mov	w1, 1
@@ -12359,20 +12370,20 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 128]
 	cmn	w0, #1
-	bne	.L1816
+	bne	.L1817
 	ldr	w0, [x29, 132]
 	cmn	w0, #1
-	bne	.L1816
+	bne	.L1817
 	ldr	w0, [x29, 72]
 	cmn	w0, #1
-	beq	.L1816
+	beq	.L1817
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L1815
-.L1816:
+	b	.L1816
+.L1817:
 	add	w20, w20, 1
 	sxth	w22, w20
-	b	.L1815
+	b	.L1816
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
 	.section	.text.FtlLoadBbt,"ax",@progbits
 	.align	2
@@ -12400,11 +12411,11 @@ FtlLoadBbt:
 	add	x24, x24, :lo12:.LANCHOR51
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L1824:
+.L1825:
 	ldrh	w0, [x24]
 	sub	w0, w0, #47
 	cmp	w0, w19
-	bgt	.L1827
+	bgt	.L1828
 	lsl	w0, w19, 10
 	mov	w2, 1
 	str	w0, [x20, 4]
@@ -12413,7 +12424,7 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L1825
+	bne	.L1826
 	ldr	w0, [x20, 4]
 	mov	w2, 1
 	mov	w1, w2
@@ -12421,13 +12432,13 @@ FtlLoadBbt:
 	str	w0, [x20, 4]
 	mov	x0, x20
 	bl	FlashReadPages
-.L1825:
+.L1826:
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L1826
+	beq	.L1827
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	bne	.L1826
+	bne	.L1827
 	adrp	x1, .LANCHOR74
 	add	x0, x1, :lo12:.LANCHOR74
 	strh	w19, [x1, #:lo12:.LANCHOR74]
@@ -12435,16 +12446,16 @@ FtlLoadBbt:
 	str	w1, [x0, 8]
 	ldrh	w1, [x21, 8]
 	strh	w1, [x0, 4]
-.L1827:
+.L1828:
 	adrp	x19, .LANCHOR74
 	mov	w0, 65535
 	add	x20, x19, :lo12:.LANCHOR74
 	ldrh	w1, [x19, #:lo12:.LANCHOR74]
 	cmp	w1, w0
-	beq	.L1841
+	beq	.L1842
 	ldrh	w1, [x20, 4]
 	cmp	w1, w0
-	beq	.L1831
+	beq	.L1832
 	add	x0, x22, :lo12:.LANCHOR203
 	lsl	w1, w1, 10
 	mov	w2, 1
@@ -12453,21 +12464,21 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x22, #:lo12:.LANCHOR203]
 	cmn	w0, #1
-	beq	.L1831
+	beq	.L1832
 	ldrh	w1, [x21]
 	mov	w0, 61649
 	cmp	w1, w0
-	bne	.L1831
+	bne	.L1832
 	ldr	w1, [x20, 8]
 	ldr	w0, [x21, 4]
 	cmp	w0, w1
-	bls	.L1831
+	bls	.L1832
 	ldrh	w1, [x20, 4]
 	str	w0, [x20, 8]
 	ldrh	w0, [x21, 8]
 	strh	w1, [x19, #:lo12:.LANCHOR74]
 	strh	w0, [x20, 4]
-.L1831:
+.L1832:
 	ldrh	w0, [x19, #:lo12:.LANCHOR74]
 	add	x24, x19, :lo12:.LANCHOR74
 	mov	w1, 1
@@ -12477,8 +12488,8 @@ FtlLoadBbt:
 	add	w0, w0, 1
 	strh	w0, [x24, 2]
 	add	x24, x22, :lo12:.LANCHOR203
-.L1833:
-	tbz	w20, #31, .L1836
+.L1834:
+	tbz	w20, #31, .L1837
 	mov	w2, 334
 	adrp	x1, .LANCHOR212
 	adrp	x0, .LC5
@@ -12490,27 +12501,27 @@ FtlLoadBbt:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1835:
+.L1836:
 	add	x0, x19, :lo12:.LANCHOR74
 	ldrh	w1, [x21, 10]
 	strh	w1, [x0, 6]
 	mov	w1, 65535
 	ldrh	w0, [x21, 12]
 	cmp	w0, w1
-	beq	.L1838
+	beq	.L1839
 	adrp	x1, .LANCHOR37
 	ldr	w2, [x1, #:lo12:.LANCHOR37]
 	cmp	w0, w2
-	beq	.L1838
+	beq	.L1839
 	adrp	x1, .LANCHOR41
 	ldrh	w1, [x1, #:lo12:.LANCHOR41]
 	lsr	w1, w1, 2
 	cmp	w2, w1
-	bcs	.L1838
+	bcs	.L1839
 	cmp	w0, w1
-	bcs	.L1838
+	bcs	.L1839
 	bl	FtlSysBlkNumInit
-.L1838:
+.L1839:
 	add	x19, x19, :lo12:.LANCHOR74
 	adrp	x21, .LANCHOR45
 	adrp	x23, .LANCHOR123
@@ -12519,23 +12530,23 @@ FtlLoadBbt:
 	add	x23, x23, :lo12:.LANCHOR123
 	add	x22, x22, :lo12:.LANCHOR203
 	mov	w20, 0
-.L1839:
+.L1840:
 	ldrh	w0, [x21]
 	cmp	w20, w0
-	bcc	.L1840
+	bcc	.L1841
 	mov	w0, 0
-.L1823:
+.L1824:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1826:
+.L1827:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L1824
-.L1836:
+	b	.L1825
+.L1837:
 	ldrh	w0, [x19, #:lo12:.LANCHOR74]
 	mov	w2, 1
 	mov	w1, w2
@@ -12547,15 +12558,15 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x24]
 	cmn	w0, #1
-	beq	.L1834
+	beq	.L1835
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	beq	.L1835
-.L1834:
+	beq	.L1836
+.L1835:
 	sub	w20, w20, #1
 	sxth	w20, w20
-	b	.L1833
-.L1840:
+	b	.L1834
+.L1841:
 	ldrh	w2, [x23]
 	ldr	x0, [x22, 8]
 	mul	w1, w2, w20
@@ -12564,10 +12575,10 @@ FtlLoadBbt:
 	add	x1, x0, x1, lsl 2
 	ldr	x0, [x19], 8
 	bl	ftl_memcpy
-	b	.L1839
-.L1841:
+	b	.L1840
+.L1842:
 	mov	w0, -1
-	b	.L1823
+	b	.L1824
 	.size	FtlLoadBbt, .-FtlLoadBbt
 	.section	.text.ftl_map_blk_gc,"ax",@progbits
 	.align	2
@@ -12590,12 +12601,12 @@ ftl_map_blk_gc:
 	ldrh	w2, [x19, 8]
 	sub	w1, w1, #4
 	cmp	w2, w1
-	blt	.L1854
+	blt	.L1855
 	ubfiz	x0, x0, 1, 16
 	ldrh	w21, [x20, x0]
-	cbz	w21, .L1854
+	cbz	w21, .L1855
 	ldr	w1, [x19, 52]
-	cbnz	w1, .L1854
+	cbnz	w1, .L1855
 	mov	w1, 1
 	str	w1, [x19, 52]
 	strh	wzr, [x20, x0]
@@ -12605,39 +12616,39 @@ ftl_map_blk_gc:
 	strh	w0, [x19, 8]
 	ldrh	w0, [x25, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bcc	.L1855
+	bcc	.L1856
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L1855:
+.L1856:
 	adrp	x22, .LANCHOR203
 	adrp	x24, .LANCHOR213
 	mov	x23, x22
 	add	x27, x22, :lo12:.LANCHOR203
 	add	x24, x24, :lo12:.LANCHOR213
 	mov	w20, 0
-.L1856:
+.L1857:
 	ldrh	w0, [x19, 6]
 	cmp	w0, w20
-	bhi	.L1862
+	bhi	.L1863
 	mov	w1, 1
 	mov	w0, w21
 	bl	FtlFreeSysBlkQueueIn
 	str	wzr, [x19, 52]
-.L1854:
+.L1855:
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x25, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bcc	.L1860
+	bcc	.L1861
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-	b	.L1860
-.L1862:
+	b	.L1861
+.L1863:
 	ubfiz	x0, x20, 2, 16
 	add	x1, x26, x0
 	str	x1, [x29, 104]
 	ldr	w1, [x26, x0]
 	cmp	w21, w1, lsr 10
-	bne	.L1857
+	bne	.L1858
 	adrp	x2, .LANCHOR184
 	add	x0, x22, :lo12:.LANCHOR203
 	ldr	x2, [x2, #:lo12:.LANCHOR184]
@@ -12651,7 +12662,7 @@ ftl_map_blk_gc:
 	bl	FlashReadPages
 	ldrh	w0, [x28, 8]
 	cmp	w0, w20
-	beq	.L1858
+	beq	.L1859
 	mov	w2, 661
 	mov	x1, x24
 	adrp	x0, .LC5
@@ -12662,12 +12673,12 @@ ftl_map_blk_gc:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1858:
+.L1859:
 	ldr	w0, [x27]
 	ldrh	w2, [x28, 8]
 	cmn	w0, #1
-	bne	.L1859
-.L1861:
+	bne	.L1860
+.L1862:
 	ldr	x0, [x29, 104]
 	add	x23, x23, :lo12:.LANCHOR203
 	str	wzr, [x0]
@@ -12678,7 +12689,7 @@ ftl_map_blk_gc:
 	adrp	x0, .LANCHOR76
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR76]
-.L1860:
+.L1861:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -12687,21 +12698,21 @@ ftl_map_blk_gc:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1859:
+.L1860:
 	cmp	w2, w20
-	bne	.L1861
+	bne	.L1862
 	ldrh	w1, [x28]
 	ldrh	w0, [x19, 4]
 	cmp	w1, w0
-	bne	.L1861
+	bne	.L1862
 	ldr	x2, [x27, 8]
 	mov	w1, w20
 	mov	x0, x19
 	bl	FtlMapWritePage
-.L1857:
+.L1858:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L1856
+	b	.L1857
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
 	.section	.text.Ftl_write_map_blk_to_last_page,"ax",@progbits
 	.align	2
@@ -12710,7 +12721,7 @@ ftl_map_blk_gc:
 Ftl_write_map_blk_to_last_page:
 	adrp	x1, .LANCHOR76
 	ldr	w1, [x1, #:lo12:.LANCHOR76]
-	cbnz	w1, .L1882
+	cbnz	w1, .L1883
 	stp	x29, x30, [sp, -64]!
 	mov	w1, 65535
 	add	x29, sp, 0
@@ -12721,9 +12732,9 @@ Ftl_write_map_blk_to_last_page:
 	stp	x23, x24, [sp, 48]
 	cmp	w0, w1
 	ldr	x20, [x19, 16]
-	bne	.L1869
+	bne	.L1870
 	ldrh	w0, [x19, 8]
-	cbz	w0, .L1870
+	cbz	w0, .L1871
 	mov	w2, 697
 	adrp	x1, .LANCHOR214
 	adrp	x0, .LC5
@@ -12735,7 +12746,7 @@ Ftl_write_map_blk_to_last_page:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1870:
+.L1871:
 	ldrh	w0, [x19, 8]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
@@ -12746,14 +12757,14 @@ Ftl_write_map_blk_to_last_page:
 	add	w0, w0, 1
 	strh	wzr, [x19]
 	str	w0, [x19, 48]
-.L1868:
+.L1869:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1869:
+.L1870:
 	ubfiz	x0, x0, 1, 16
 	adrp	x2, .LANCHOR188
 	adrp	x21, .LANCHOR203
@@ -12784,19 +12795,19 @@ Ftl_write_map_blk_to_last_page:
 	mov	x1, 0
 	ldr	x3, [x24, #:lo12:.LANCHOR183]
 	mov	w0, 0
-.L1871:
+.L1872:
 	cmp	w4, w1, uxth
-	bhi	.L1873
+	bhi	.L1874
 	adrp	x0, .LANCHOR2
 	ldrb	w0, [x0, #:lo12:.LANCHOR2]
-	cbz	w0, .L1874
+	cbz	w0, .L1875
 	add	x0, x21, :lo12:.LANCHOR203
 	adrp	x1, .LANCHOR57
 	ldrh	w1, [x1, #:lo12:.LANCHOR57]
 	ldr	x0, [x0, 8]
 	bl	js_hash
 	str	w0, [x20, 12]
-.L1874:
+.L1875:
 	mov	w2, 1
 	mov	w3, 0
 	mov	w1, w2
@@ -12807,11 +12818,11 @@ Ftl_write_map_blk_to_last_page:
 	strh	w0, [x19, 2]
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-	b	.L1868
-.L1873:
+	b	.L1869
+.L1874:
 	ldr	w2, [x23, x1, lsl 2]
 	cmp	w22, w2, lsr 10
-	bne	.L1872
+	bne	.L1873
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	ubfiz	x2, x0, 1, 16
@@ -12819,10 +12830,10 @@ Ftl_write_map_blk_to_last_page:
 	add	x2, x2, 1
 	ldr	w5, [x23, x1, lsl 2]
 	str	w5, [x3, x2, lsl 2]
-.L1872:
+.L1873:
 	add	x1, x1, 1
-	b	.L1871
-.L1882:
+	b	.L1872
+.L1883:
 	mov	w0, 0
 	ret
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
@@ -12847,7 +12858,7 @@ FtlMapWritePage:
 	add	x23, x22, :lo12:.LANCHOR203
 	add	x28, x26, :lo12:.LANCHOR53
 	str	x2, [x29, 104]
-.L1886:
+.L1887:
 	adrp	x1, .LANCHOR165
 	ldr	w0, [x1, #:lo12:.LANCHOR165]
 	add	w0, w0, 1
@@ -12856,22 +12867,22 @@ FtlMapWritePage:
 	ldrh	w1, [x27, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	bge	.L1887
+	bge	.L1888
 	ldrh	w1, [x27]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1888
-.L1887:
+	bne	.L1889
+.L1888:
 	mov	x0, x27
 	bl	Ftl_write_map_blk_to_last_page
-.L1888:
+.L1889:
 	adrp	x21, .LANCHOR76
 	ldr	w0, [x21, #:lo12:.LANCHOR76]
-	cbnz	w0, .L1903
+	cbnz	w0, .L1904
 	ldrh	w1, [x27]
 	ldr	x0, [x27, 16]
 	ldrh	w0, [x0, x1, lsl 1]
-	cbnz	w0, .L1890
+	cbnz	w0, .L1891
 	mov	w2, 759
 	adrp	x1, .LANCHOR215
 	adrp	x0, .LC5
@@ -12883,11 +12894,11 @@ FtlMapWritePage:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1890:
+.L1891:
 	ldrh	w1, [x27]
 	ldrh	w0, [x27, 10]
 	cmp	w1, w0
-	bcc	.L1891
+	bcc	.L1892
 	mov	w2, 760
 	adrp	x1, .LANCHOR215
 	adrp	x0, .LC5
@@ -12899,7 +12910,7 @@ FtlMapWritePage:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1891:
+.L1892:
 	ldrh	w1, [x27]
 	add	x3, x22, :lo12:.LANCHOR203
 	ldr	x0, [x27, 16]
@@ -12926,13 +12937,13 @@ FtlMapWritePage:
 	strh	w25, [x6, 8]
 	strh	w24, [x6, 2]
 	ldrb	w0, [x0, #:lo12:.LANCHOR2]
-	cbz	w0, .L1892
+	cbz	w0, .L1893
 	adrp	x0, .LANCHOR57
 	ldrh	w1, [x0, #:lo12:.LANCHOR57]
 	ldr	x0, [x3, 8]
 	bl	js_hash
 	str	w0, [x6, 12]
-.L1892:
+.L1893:
 	mov	w3, 1
 	mov	x0, x23
 	mov	w1, w3
@@ -12944,7 +12955,7 @@ FtlMapWritePage:
 	and	w0, w0, 65535
 	strh	w0, [x27, 2]
 	cmn	w1, #1
-	bne	.L1893
+	bne	.L1894
 	ldr	w1, [x23, 4]
 	adrp	x0, .LC40
 	add	x0, x0, :lo12:.LC40
@@ -12953,13 +12964,13 @@ FtlMapWritePage:
 	bl	printf
 	ldrh	w0, [x27, 2]
 	cmp	w0, 2
-	bhi	.L1894
+	bhi	.L1895
 	ldrh	w0, [x28]
 	sub	w0, w0, #1
 	strh	w0, [x27, 2]
-.L1894:
+.L1895:
 	cmp	w19, 3
-	bls	.L1886
+	bls	.L1887
 	add	x20, x20, :lo12:.LANCHOR203
 	mov	w2, w19
 	adrp	x0, .LC41
@@ -12968,7 +12979,7 @@ FtlMapWritePage:
 	bl	printf
 	mov	w0, 1
 	str	w0, [x21, #:lo12:.LANCHOR76]
-.L1903:
+.L1904:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -12977,28 +12988,28 @@ FtlMapWritePage:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1893:
-	cbz	w1, .L1896
+.L1894:
+	cbz	w1, .L1897
 	strh	w24, [x27, 60]
 	cmp	w0, 1
-	bne	.L1897
-.L1898:
+	bne	.L1898
+.L1899:
 	str	wzr, [x27, 56]
-	b	.L1886
-.L1897:
+	b	.L1887
+.L1898:
 	cmp	w1, 256
-.L1911:
-	beq	.L1898
+.L1912:
+	beq	.L1899
 	ldr	w0, [x27, 56]
-	cbnz	w0, .L1898
+	cbnz	w0, .L1899
 	add	x20, x20, :lo12:.LANCHOR203
 	ldr	x0, [x27, 40]
 	ldr	w1, [x20, 4]
 	str	w1, [x0, w25, uxtw 2]
-	b	.L1903
-.L1896:
+	b	.L1904
+.L1897:
 	cmp	w0, 1
-	b	.L1911
+	b	.L1912
 	.size	FtlMapWritePage, .-FtlMapWritePage
 	.section	.text.flush_l2p_region,"ax",@progbits
 	.align	2
@@ -13040,27 +13051,27 @@ l2p_flush:
 	str	x21, [sp, 32]
 	mov	w19, 0
 	adrp	x21, .LANCHOR96
-.L1915:
+.L1916:
 	ldrh	w0, [x20]
 	cmp	w0, w19
-	bhi	.L1917
+	bhi	.L1918
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1917:
+.L1918:
 	ldr	x1, [x21, #:lo12:.LANCHOR96]
 	ubfiz	x0, x19, 4, 16
 	add	x0, x1, x0
 	ldr	w0, [x0, 4]
-	tbz	w0, #31, .L1916
+	tbz	w0, #31, .L1917
 	mov	w0, w19
 	bl	flush_l2p_region
-.L1916:
+.L1917:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1915
+	b	.L1916
 	.size	l2p_flush, .-l2p_flush
 	.section	.text.FtlVendorPartWrite,"ax",@progbits
 	.align	2
@@ -13080,7 +13091,7 @@ FtlVendorPartWrite:
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	cmp	w1, w0
-	bhi	.L1927
+	bhi	.L1928
 	adrp	x0, .LANCHOR56
 	adrp	x26, .LANCHOR55
 	adrp	x27, .LANCHOR57
@@ -13090,9 +13101,9 @@ FtlVendorPartWrite:
 	add	x27, x27, :lo12:.LANCHOR57
 	mov	w24, 0
 	lsr	w21, w22, w21
-.L1921:
-	cbnz	w20, .L1926
-.L1919:
+.L1922:
+	cbnz	w20, .L1927
+.L1920:
 	mov	w0, w24
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -13101,7 +13112,7 @@ FtlVendorPartWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1926:
+.L1927:
 	ldrh	w1, [x26]
 	adrp	x0, .LANCHOR194
 	adrp	x28, .LANCHOR185
@@ -13114,9 +13125,9 @@ FtlVendorPartWrite:
 	and	w19, w19, 65535
 	cmp	w20, w19
 	csel	w19, w0, w19, cc
-	cbz	w2, .L1923
+	cbz	w2, .L1924
 	cmp	w19, w1
-	beq	.L1923
+	beq	.L1924
 	ldr	x0, [x28, #:lo12:.LANCHOR185]
 	str	w2, [x29, 124]
 	mov	w2, 1
@@ -13124,7 +13135,7 @@ FtlVendorPartWrite:
 	mov	w1, w2
 	add	x0, x29, 120
 	bl	FlashReadPages
-.L1924:
+.L1925:
 	lsl	w3, w19, 9
 	ldr	x0, [x28, #:lo12:.LANCHOR185]
 	lsl	w23, w23, 7
@@ -13145,16 +13156,16 @@ FtlVendorPartWrite:
 	ldr	w3, [x29, 108]
 	csinv	w24, w24, wzr, ne
 	add	x25, x25, x3, sxtw
-	b	.L1921
-.L1923:
+	b	.L1922
+.L1924:
 	ldrh	w2, [x27]
 	mov	w1, 0
 	ldr	x0, [x28, #:lo12:.LANCHOR185]
 	bl	ftl_memset
-	b	.L1924
-.L1927:
+	b	.L1925
+.L1928:
 	mov	w24, -1
-	b	.L1919
+	b	.L1920
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.section	.text.Ftl_save_ext_data,"ax",@progbits
 	.align	2
@@ -13167,8 +13178,8 @@ Ftl_save_ext_data:
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1932
-	mov	w0, 86
+	bne	.L1933
+	mov	w0, 87
 	mov	w1, 1
 	movk	w0, 0x5000, lsl 16
 	str	w0, [x2, 4]
@@ -13216,7 +13227,7 @@ Ftl_save_ext_data:
 	str	w0, [x2, 64]
 	mov	w0, 0
 	b	FtlVendorPartWrite
-.L1932:
+.L1933:
 	ret
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
 	.section	.text.FtlEctTblFlush,"ax",@progbits
@@ -13226,31 +13237,31 @@ Ftl_save_ext_data:
 FtlEctTblFlush:
 	adrp	x1, .LANCHOR28
 	ldr	w1, [x1, #:lo12:.LANCHOR28]
-	cbz	w1, .L1939
+	cbz	w1, .L1940
 	adrp	x1, .LANCHOR170
 	mov	w2, 4
 	ldr	w1, [x1, #:lo12:.LANCHOR170]
 	cmp	w1, 39
 	mov	w1, 32
 	csel	w1, w1, w2, hi
-.L1935:
+.L1936:
 	adrp	x3, .LANCHOR219
 	ldrh	w2, [x3, #:lo12:.LANCHOR219]
 	cmp	w2, 31
-	bhi	.L1936
+	bhi	.L1937
 	add	w2, w2, 1
 	mov	w1, 1
 	strh	w2, [x3, #:lo12:.LANCHOR219]
-.L1936:
+.L1937:
 	adrp	x2, .LANCHOR191
-	cbnz	w0, .L1937
+	cbnz	w0, .L1938
 	ldr	x0, [x2, #:lo12:.LANCHOR191]
 	ldr	w3, [x0, 20]
 	ldr	w0, [x0, 16]
 	add	w1, w1, w3
 	cmp	w0, w1
-	bcc	.L1942
-.L1937:
+	bcc	.L1943
+.L1938:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	ldr	x2, [x2, #:lo12:.LANCHOR191]
@@ -13273,10 +13284,10 @@ FtlEctTblFlush:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1939:
+.L1940:
 	mov	w1, 32
-	b	.L1935
-.L1942:
+	b	.L1936
+.L1943:
 	mov	w0, 0
 	ret
 	.size	FtlEctTblFlush, .-FtlEctTblFlush
@@ -13294,8 +13305,8 @@ allocate_new_data_superblock:
 	str	x21, [sp, 32]
 	ldrh	w0, [x0, #:lo12:.LANCHOR40]
 	cmp	w0, w20
-	bcs	.L1945
-	mov	w2, 3290
+	bcs	.L1946
+	mov	w2, 3289
 	adrp	x1, .LANCHOR220
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR220
@@ -13306,99 +13317,99 @@ allocate_new_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1945:
+.L1946:
 	adrp	x0, .LANCHOR76
 	ldr	w0, [x0, #:lo12:.LANCHOR76]
-	cbnz	w0, .L1946
+	cbnz	w0, .L1947
 	mov	w0, 65535
 	cmp	w20, w0
-	beq	.L1947
+	beq	.L1948
 	adrp	x1, .LANCHOR83
 	ubfiz	x0, x20, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1948
+	cbz	w0, .L1949
 	mov	w0, w20
 	bl	INSERT_DATA_LIST
-.L1947:
+.L1948:
 	strb	wzr, [x19, 8]
 	adrp	x0, .LANCHOR92
 	add	x0, x0, :lo12:.LANCHOR92
 	cmp	x19, x0
-	beq	.L1949
+	beq	.L1950
 	adrp	x0, .LANCHOR44
 	ldrh	w1, [x0, #:lo12:.LANCHOR44]
 	cmp	w1, 1
-	beq	.L1949
+	beq	.L1950
 	adrp	x0, .LANCHOR15
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L1950
-.L1949:
+	cbz	w0, .L1951
+.L1950:
 	mov	w0, 1
 	strb	w0, [x19, 8]
-.L1951:
+.L1952:
 	adrp	x1, .LANCHOR133
 	mov	w2, 65535
 	mov	x21, x1
 	ldrh	w0, [x1, #:lo12:.LANCHOR133]
 	cmp	w0, w2
-	beq	.L1956
+	beq	.L1957
 	cmp	w20, w0
-	bne	.L1957
+	bne	.L1958
 	adrp	x2, .LANCHOR83
 	ubfiz	x1, x0, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR83]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1958
-.L1957:
-	bl	update_vpc_list
+	cbz	w1, .L1959
 .L1958:
+	bl	update_vpc_list
+.L1959:
 	mov	w0, -1
 	strh	w0, [x21, #:lo12:.LANCHOR133]
-.L1956:
+.L1957:
 	mov	x0, x19
 	bl	allocate_data_superblock
 	bl	l2p_flush
 	mov	w0, 0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1946:
+.L1947:
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1948:
+.L1949:
 	mov	w0, w20
 	bl	INSERT_FREE_LIST
-	b	.L1947
-.L1950:
+	b	.L1948
+.L1951:
 	adrp	x0, .LANCHOR91
 	add	x2, x0, :lo12:.LANCHOR91
 	cmp	x19, x2
-	bne	.L1951
+	bne	.L1952
 	cmp	w1, 3
-	beq	.L1953
+	beq	.L1954
 	adrp	x1, .LANCHOR158
 	ldr	w1, [x1, #:lo12:.LANCHOR158]
 	cmp	w1, 1
-	bne	.L1954
-.L1953:
+	bne	.L1955
+.L1954:
 	add	x1, x0, :lo12:.LANCHOR91
 	mov	w2, 1
 	strb	w2, [x1, 8]
-.L1954:
+.L1955:
 	adrp	x1, .LANCHOR28
 	ldr	w1, [x1, #:lo12:.LANCHOR28]
-	cbz	w1, .L1951
+	cbz	w1, .L1952
 	adrp	x1, .LANCHOR170
 	ldr	w1, [x1, #:lo12:.LANCHOR170]
 	cmp	w1, 39
-	bhi	.L1951
+	bhi	.L1952
 	add	x0, x0, :lo12:.LANCHOR91
 	mov	w1, 1
 	strb	w1, [x0, 8]
-	b	.L1951
+	b	.L1952
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
 	.section	.text.FtlVendorPartRead,"ax",@progbits
 	.align	2
@@ -13418,7 +13429,7 @@ FtlVendorPartRead:
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	cmp	w1, w0
-	bhi	.L1981
+	bhi	.L1982
 	adrp	x0, .LANCHOR56
 	adrp	x26, .LANCHOR185
 	mov	x25, x2
@@ -13429,9 +13440,9 @@ FtlVendorPartRead:
 	add	x0, x0, :lo12:.LANCHOR55
 	str	x0, [x29, 104]
 	lsr	w20, w22, w20
-.L1974:
-	cbnz	w21, .L1980
-.L1972:
+.L1975:
+	cbnz	w21, .L1981
+.L1973:
 	mov	w0, w24
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -13440,7 +13451,7 @@ FtlVendorPartRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1980:
+.L1981:
 	adrp	x0, .LANCHOR194
 	ldr	x0, [x0, #:lo12:.LANCHOR194]
 	ldr	w3, [x0, w20, uxtw 2]
@@ -13454,7 +13465,7 @@ FtlVendorPartRead:
 	cmp	w21, w19
 	csel	w19, w0, w19, cc
 	lsl	w27, w19, 9
-	cbz	w3, .L1976
+	cbz	w3, .L1977
 	ldr	x0, [x26, #:lo12:.LANCHOR185]
 	mov	w2, 1
 	str	w3, [x29, 100]
@@ -13470,7 +13481,7 @@ FtlVendorPartRead:
 	csinv	w24, w24, wzr, ne
 	ldr	w0, [x0, #:lo12:.LANCHOR203]
 	cmp	w0, 256
-	bne	.L1978
+	bne	.L1979
 	mov	w2, w3
 	mov	w1, w20
 	adrp	x0, .LC42
@@ -13481,28 +13492,28 @@ FtlVendorPartRead:
 	mov	w1, w20
 	add	x0, x0, :lo12:.LANCHOR216
 	bl	FtlMapWritePage
-.L1978:
+.L1979:
 	ldr	x1, [x28, #:lo12:.LANCHOR185]
 	lsl	w23, w23, 7
 	mov	w2, w27
 	mov	x0, x25
 	add	x1, x1, x23, sxtw 2
 	bl	ftl_memcpy
-.L1979:
+.L1980:
 	add	w20, w20, 1
 	sub	w21, w21, w19
 	add	w22, w22, w19
 	add	x25, x25, x27, sxtw
-	b	.L1974
-.L1976:
+	b	.L1975
+.L1977:
 	mov	w2, w27
 	mov	w1, 0
 	mov	x0, x25
 	bl	ftl_memset
-	b	.L1979
-.L1981:
+	b	.L1980
+.L1982:
 	mov	w24, -1
-	b	.L1972
+	b	.L1973
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
 	.section	.text.FtlLoadEctTbl,"ax",@progbits
 	.align	2
@@ -13523,7 +13534,7 @@ FtlLoadEctTbl:
 	mov	w0, 17221
 	movk	w0, 0x4254, lsl 16
 	cmp	w1, w0
-	beq	.L1984
+	beq	.L1985
 	adrp	x1, .LC43
 	adrp	x0, .LC7
 	add	x1, x1, :lo12:.LC43
@@ -13534,7 +13545,7 @@ FtlLoadEctTbl:
 	ldrh	w2, [x20, #:lo12:.LANCHOR190]
 	lsl	w2, w2, 9
 	bl	ftl_memset
-.L1984:
+.L1985:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -13559,18 +13570,18 @@ Ftl_load_ext_data:
 	mov	w20, 19539
 	movk	w20, 0x4654, lsl 16
 	cmp	w0, w20
-	beq	.L1987
+	beq	.L1988
 	mov	w2, 512
 	mov	w1, 0
 	mov	x0, x21
 	bl	ftl_memset
 	str	w20, [x19, #:lo12:.LANCHOR138]
-.L1987:
+.L1988:
 	ldr	w1, [x19, #:lo12:.LANCHOR138]
 	add	x0, x19, :lo12:.LANCHOR138
 	cmp	w1, w20
 	adrp	x20, .LANCHOR168
-	bne	.L1988
+	bne	.L1989
 	adrp	x1, .LANCHOR217
 	ldr	w2, [x0, 88]
 	str	w2, [x1, #:lo12:.LANCHOR217]
@@ -13608,7 +13619,7 @@ Ftl_load_ext_data:
 	ldr	w1, [x0, 60]
 	adrp	x0, .LANCHOR158
 	str	w1, [x0, #:lo12:.LANCHOR158]
-.L1988:
+.L1989:
 	add	x19, x19, :lo12:.LANCHOR138
 	adrp	x0, .LANCHOR157
 	str	wzr, [x0, #:lo12:.LANCHOR157]
@@ -13616,7 +13627,7 @@ Ftl_load_ext_data:
 	ldr	w1, [x19, 68]
 	movk	w0, 0x1234, lsl 16
 	cmp	w1, w0
-	bne	.L1989
+	bne	.L1990
 	adrp	x0, .LANCHOR28
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR28]
@@ -13625,7 +13636,7 @@ Ftl_load_ext_data:
 	add	x1, x1, :lo12:.LC44
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1989:
+.L1990:
 	adrp	x1, .LANCHOR167
 	adrp	x0, .LANCHOR48
 	ldr	x21, [sp, 32]
@@ -13664,7 +13675,7 @@ ftl_sys_read:
 	.type	FtlMapBlkWriteDumpData, %function
 FtlMapBlkWriteDumpData:
 	ldr	w1, [x0, 56]
-	cbz	w1, .L2007
+	cbz	w1, .L2008
 	stp	x29, x30, [sp, -80]!
 	adrp	x1, .LANCHOR76
 	add	x29, sp, 0
@@ -13676,7 +13687,7 @@ FtlMapBlkWriteDumpData:
 	str	x25, [sp, 64]
 	str	wzr, [x0, 56]
 	ldr	x25, [x0, 40]
-	cbnz	w1, .L1993
+	cbnz	w1, .L1994
 	mov	x19, x0
 	adrp	x0, .LANCHOR184
 	adrp	x23, .LANCHOR203
@@ -13688,16 +13699,16 @@ FtlMapBlkWriteDumpData:
 	ldr	x24, [x0, #:lo12:.LANCHOR188]
 	ldrh	w0, [x19, 2]
 	str	x24, [x21, 16]
-	cbz	w0, .L1997
+	cbz	w0, .L1998
 	adrp	x1, .LANCHOR53
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	sub	w1, w1, #1
 	cmp	w0, w1
-	bge	.L1997
+	bge	.L1998
 	ldrh	w1, [x19]
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L1997
+	beq	.L1998
 	ldr	x2, [x19, 16]
 	ubfiz	x1, x1, 1, 16
 	sub	w0, w0, #1
@@ -13710,16 +13721,16 @@ FtlMapBlkWriteDumpData:
 	bl	FlashReadPages
 	ldr	w0, [x23, #:lo12:.LANCHOR203]
 	cmn	w0, #1
-	beq	.L1997
+	beq	.L1998
 	ldrh	w1, [x24, 8]
 	ldr	x2, [x19, 40]
 	ubfiz	x0, x1, 2, 16
 	ldr	w2, [x2, x0]
 	ldr	w0, [x21, 4]
 	cmp	w2, w0
-	bne	.L1997
+	bne	.L1998
 	ldr	x2, [x21, 8]
-.L2010:
+.L2011:
 	mov	x0, x19
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -13727,37 +13738,37 @@ FtlMapBlkWriteDumpData:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	b	FtlMapWritePage
-.L1997:
+.L1998:
 	sub	w20, w20, #1
 	and	w20, w20, 65535
 	ubfiz	x0, x20, 2, 16
 	ldr	w1, [x25, x0]
 	add	x0, x22, :lo12:.LANCHOR203
 	str	w1, [x0, 4]
-	cbz	w1, .L1998
+	cbz	w1, .L1999
 	mov	w2, 1
 	mov	w1, w2
 	bl	FlashReadPages
-.L1999:
+.L2000:
 	add	x22, x22, :lo12:.LANCHOR203
 	mov	w1, w20
 	ldr	x2, [x22, 8]
-	b	.L2010
-.L1998:
+	b	.L2011
+.L1999:
 	adrp	x1, .LANCHOR57
 	ldr	x0, [x0, 8]
 	ldrh	w2, [x1, #:lo12:.LANCHOR57]
 	mov	w1, 255
 	bl	ftl_memset
-	b	.L1999
-.L1993:
+	b	.L2000
+.L1994:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2007:
+.L2008:
 	ret
 	.size	FtlMapBlkWriteDumpData, .-FtlMapBlkWriteDumpData
 	.section	.text.FtlScanSysBlk,"ax",@progbits
@@ -13818,12 +13829,12 @@ FtlScanSysBlk:
 	adrp	x0, .LANCHOR159
 	add	x0, x0, :lo12:.LANCHOR159
 	str	x0, [x29, 112]
-.L2012:
+.L2013:
 	ldr	x0, [x29, 120]
 	ldr	w1, [x29, 172]
 	ldrh	w0, [x0]
 	cmp	w0, w1
-	bls	.L2053
+	bls	.L2054
 	adrp	x0, .LANCHOR38
 	adrp	x25, .LANCHOR180
 	adrp	x6, .LANCHOR47
@@ -13839,14 +13850,14 @@ FtlScanSysBlk:
 	ldr	x11, [x0, #:lo12:.LANCHOR105]
 	adrp	x0, .LANCHOR58
 	ldrh	w10, [x0, #:lo12:.LANCHOR58]
-	b	.L2054
-.L2014:
+	b	.L2055
+.L2015:
 	ldrh	w1, [x29, 172]
 	ldrb	w0, [x6, x5]
 	bl	V2P_block
 	and	w4, w0, 65535
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L2013
+	cbnz	w0, .L2014
 	umaddl	x1, w22, w8, x7
 	lsl	w4, w4, 10
 	mul	w0, w22, w10
@@ -13856,19 +13867,19 @@ FtlScanSysBlk:
 	str	w4, [x1, 4]
 	add	x0, x11, x0, sxtw 2
 	stp	x12, x0, [x1, 8]
-.L2013:
+.L2014:
 	add	x5, x5, 1
-.L2054:
+.L2055:
 	cmp	w13, w5, uxth
-	bhi	.L2014
-	cbnz	w22, .L2015
-.L2052:
+	bhi	.L2015
+	cbnz	w22, .L2016
+.L2053:
 	ldr	w0, [x29, 172]
 	add	w26, w0, 1
 	and	w0, w26, 65535
 	str	w0, [x29, 172]
-	b	.L2012
-.L2015:
+	b	.L2013
+.L2016:
 	mov	w1, w22
 	mov	w2, 1
 	mov	x0, x7
@@ -13880,7 +13891,7 @@ FtlScanSysBlk:
 	adrp	x0, .LANCHOR221
 	add	x0, x0, :lo12:.LANCHOR221
 	str	x0, [x29, 136]
-.L2051:
+.L2052:
 	ldr	x0, [x25, #:lo12:.LANCHOR180]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
@@ -13888,10 +13899,10 @@ FtlScanSysBlk:
 	cmn	w0, #1
 	ldr	x27, [x1, 16]
 	ubfx	x26, x3, 10, 16
-	bne	.L2018
+	bne	.L2019
 	mov	w5, 16
 	mov	w7, 65535
-.L2020:
+.L2021:
 	ldr	x0, [x25, #:lo12:.LANCHOR180]
 	add	x6, x25, :lo12:.LANCHOR180
 	mov	w2, 1
@@ -13909,69 +13920,69 @@ FtlScanSysBlk:
 	ldr	w5, [x29, 168]
 	cmp	w0, w7
 	ldr	x6, [x29, 104]
-	bne	.L2017
+	bne	.L2018
 	ldr	x0, [x6]
 	mov	w1, -1
 	str	w1, [x0, x22]
 	ldr	x0, [x6]
 	ldr	w0, [x0, x22]
 	cmp	w0, w1
-	beq	.L2090
-.L2018:
+	beq	.L2091
+.L2019:
 	adrp	x0, .LANCHOR159
 	ldr	w1, [x0, #:lo12:.LANCHOR159]
 	ldr	w0, [x27, 4]
 	cmn	w1, #1
-	beq	.L2021
+	beq	.L2022
 	cmp	w1, w0
-	bhi	.L2022
-.L2021:
+	bhi	.L2023
+.L2022:
 	cmn	w0, #1
-	beq	.L2022
+	beq	.L2023
 	ldr	x2, [x29, 112]
 	add	w1, w0, 1
 	str	w1, [x2]
-.L2022:
+.L2023:
 	ldrh	w1, [x27]
 	mov	w2, 61604
 	cmp	w1, w2
-	beq	.L2024
-	bhi	.L2025
+	beq	.L2025
+	bhi	.L2026
 	mov	w0, 61574
 	cmp	w1, w0
-	beq	.L2026
-.L2023:
+	beq	.L2027
+.L2024:
 	ldr	x0, [x29, 128]
 	add	x22, x22, 56
 	cmp	x0, x22
-	bne	.L2051
-	b	.L2052
-.L2017:
+	bne	.L2052
+	b	.L2053
+.L2018:
 	ldr	x0, [x25, #:lo12:.LANCHOR180]
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	bne	.L2018
+	bne	.L2019
 	sub	w5, w5, #1
 	ands	w5, w5, 65535
-	bne	.L2020
-.L2090:
+	bne	.L2021
+.L2091:
 	mov	w1, 0
 	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-	b	.L2023
-.L2025:
+	b	.L2024
+.L2026:
 	mov	w0, 61634
 	cmp	w1, w0
-	beq	.L2027
+	beq	.L2028
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L2090
-	b	.L2023
-.L2027:
+	beq	.L2091
+	b	.L2024
+.L2028:
 	ldrh	w1, [x20, #:lo12:.LANCHOR128]
 	ldr	w0, [x21, #:lo12:.LANCHOR64]
 	cmp	w1, w0
-	bls	.L2029
+	bls	.L2030
 	ldr	x1, [x29, 136]
 	mov	w2, 1307
 	adrp	x0, .LC5
@@ -13982,7 +13993,7 @@ FtlScanSysBlk:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2029:
+.L2030:
 	ldr	w6, [x21, #:lo12:.LANCHOR64]
 	ldr	x3, [x29, 152]
 	ldrh	w1, [x20, #:lo12:.LANCHOR128]
@@ -13993,53 +14004,53 @@ FtlScanSysBlk:
 	sub	w2, w2, #1
 	ldr	x5, [x3, #:lo12:.LANCHOR130]
 	sxth	w2, w2
-.L2030:
+.L2031:
 	cmp	w0, w2
-	bgt	.L2036
-	tbz	w0, #31, .L2071
-	b	.L2023
-.L2036:
+	bgt	.L2037
+	tbz	w0, #31, .L2072
+	b	.L2024
+.L2037:
 	sxtw	x8, w0
 	ldr	w11, [x27, 4]
 	lsl	x7, x8, 2
 	add	x10, x5, x7
 	ldr	w7, [x5, x7]
 	cmp	w11, w7
-	bls	.L2031
+	bls	.L2032
 	ldr	w2, [x5]
-	cbnz	w2, .L2032
+	cbnz	w2, .L2033
 	cmp	w6, w1
-	beq	.L2032
+	beq	.L2033
 	add	w1, w1, 1
 	strh	w1, [x20, #:lo12:.LANCHOR128]
-.L2032:
+.L2033:
 	ldr	x1, [x29, 160]
 	ldr	x6, [x1, #:lo12:.LANCHOR129]
 	mov	w1, 0
-.L2033:
+.L2034:
 	cmp	w1, w0
-	bne	.L2034
+	bne	.L2035
 	ldr	w1, [x27, 4]
 	str	w1, [x10]
 	strh	w26, [x6, x8, lsl 1]
-	tbnz	w0, #31, .L2023
+	tbnz	w0, #31, .L2024
 	ldrh	w1, [x20, #:lo12:.LANCHOR128]
 	ldr	w2, [x21, #:lo12:.LANCHOR64]
 	sub	w2, w2, w1
 	sub	w2, w2, #1
 	cmp	w0, w2, sxth
-	bgt	.L2023
-.L2071:
+	bgt	.L2024
+.L2072:
 	add	w1, w1, 1
 	strh	w1, [x20, #:lo12:.LANCHOR128]
 	ldr	w1, [x27, 4]
 	str	w1, [x5, x0, lsl 2]
 	ldr	x1, [x29, 160]
 	ldr	x1, [x1, #:lo12:.LANCHOR129]
-.L2089:
+.L2090:
 	strh	w26, [x1, x0, lsl 1]
-	b	.L2023
-.L2034:
+	b	.L2024
+.L2035:
 	sxtw	x2, w1
 	add	w1, w1, 1
 	lsl	x7, x2, 2
@@ -14051,16 +14062,16 @@ FtlScanSysBlk:
 	add	x7, x6, x2
 	ldrh	w7, [x7, 2]
 	strh	w7, [x6, x2]
-	b	.L2033
-.L2031:
+	b	.L2034
+.L2032:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L2030
-.L2026:
+	b	.L2031
+.L2027:
 	ldrh	w1, [x23, #:lo12:.LANCHOR70]
 	ldrh	w0, [x19, #:lo12:.LANCHOR61]
 	cmp	w1, w0
-	bls	.L2039
+	bls	.L2040
 	ldr	x1, [x29, 136]
 	mov	w2, 1354
 	adrp	x0, .LC5
@@ -14071,7 +14082,7 @@ FtlScanSysBlk:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2039:
+.L2040:
 	ldrh	w6, [x19, #:lo12:.LANCHOR61]
 	ldrh	w2, [x23, #:lo12:.LANCHOR70]
 	sub	w1, w6, #1
@@ -14079,46 +14090,46 @@ FtlScanSysBlk:
 	sub	w5, w1, w2
 	ldr	x1, [x29, 144]
 	ldr	x1, [x1, #:lo12:.LANCHOR193]
-.L2040:
+.L2041:
 	cmp	w0, w5
-	ble	.L2045
+	ble	.L2046
 	sxtw	x7, w0
 	ldr	w11, [x27, 4]
 	lsl	x8, x7, 2
 	add	x10, x1, x8
 	ldr	w8, [x1, x8]
 	cmp	w11, w8
-	bls	.L2041
+	bls	.L2042
 	ldr	w5, [x1]
-	cbnz	w5, .L2042
+	cbnz	w5, .L2043
 	cmp	w6, w2
-	beq	.L2042
+	beq	.L2043
 	add	w2, w2, 1
 	strh	w2, [x23, #:lo12:.LANCHOR70]
-.L2042:
+.L2043:
 	ldr	x6, [x28, #:lo12:.LANCHOR71]
 	mov	w2, 0
-.L2043:
+.L2044:
 	cmp	w2, w0
-	bne	.L2044
+	bne	.L2045
 	ldr	w2, [x27, 4]
 	str	w2, [x10]
 	strh	w26, [x6, x7, lsl 1]
-.L2045:
-	tbnz	w0, #31, .L2023
+.L2046:
+	tbnz	w0, #31, .L2024
 	ldrh	w2, [x19, #:lo12:.LANCHOR61]
 	ldrh	w5, [x23, #:lo12:.LANCHOR70]
 	sub	w2, w2, #1
 	sub	w2, w2, w5
 	cmp	w0, w2, sxth
-	bgt	.L2023
+	bgt	.L2024
 	add	w5, w5, 1
 	ldr	w2, [x27, 4]
 	strh	w5, [x23, #:lo12:.LANCHOR70]
 	str	w2, [x1, x0, lsl 2]
 	ldr	x1, [x28, #:lo12:.LANCHOR71]
-	b	.L2089
-.L2044:
+	b	.L2090
+.L2045:
 	sxtw	x5, w2
 	add	w2, w2, 1
 	lsl	x8, x5, 2
@@ -14130,54 +14141,54 @@ FtlScanSysBlk:
 	add	x8, x6, x5
 	ldrh	w8, [x8, 2]
 	strh	w8, [x6, x5]
-	b	.L2043
-.L2041:
+	b	.L2044
+.L2042:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L2040
-.L2024:
+	b	.L2041
+.L2025:
 	ldrh	w5, [x24, #:lo12:.LANCHOR210]
 	mov	w1, 65535
 	add	x2, x24, :lo12:.LANCHOR210
 	cmp	w5, w1
-	bne	.L2047
+	bne	.L2048
 	strh	w26, [x24, #:lo12:.LANCHOR210]
 	str	w0, [x2, 8]
-	b	.L2023
-.L2047:
+	b	.L2024
+.L2048:
 	ldrh	w0, [x2, 4]
 	cmp	w0, w1
-	beq	.L2048
+	beq	.L2049
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.L2048:
+.L2049:
 	add	x0, x24, :lo12:.LANCHOR210
 	ldr	w1, [x27, 4]
 	ldr	w2, [x0, 8]
 	cmp	w2, w1
-	bcs	.L2049
+	bcs	.L2050
 	ldrh	w2, [x24, #:lo12:.LANCHOR210]
 	strh	w2, [x0, 4]
 	strh	w26, [x24, #:lo12:.LANCHOR210]
 	str	w1, [x0, 8]
-	b	.L2023
-.L2049:
+	b	.L2024
+.L2050:
 	strh	w26, [x0, 4]
-	b	.L2023
-.L2053:
+	b	.L2024
+.L2054:
 	ldr	x0, [x29, 160]
 	ldr	x2, [x0, #:lo12:.LANCHOR129]
 	ldrh	w0, [x2]
-	cbz	w0, .L2055
-.L2058:
+	cbz	w0, .L2056
+.L2059:
 	ldr	x1, [x28, #:lo12:.LANCHOR71]
 	ldrh	w0, [x1]
-	cbz	w0, .L2056
-.L2057:
+	cbz	w0, .L2057
+.L2058:
 	ldrh	w1, [x20, #:lo12:.LANCHOR128]
 	ldr	w0, [x21, #:lo12:.LANCHOR64]
 	cmp	w1, w0
-	bls	.L2087
+	bls	.L2088
 	mov	w2, 1488
 	adrp	x1, .LANCHOR221
 	adrp	x0, .LC5
@@ -14189,7 +14200,7 @@ FtlScanSysBlk:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2087:
+.L2088:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -14198,24 +14209,24 @@ FtlScanSysBlk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L2055:
+.L2056:
 	ldrh	w0, [x20, #:lo12:.LANCHOR128]
-	cbz	w0, .L2058
+	cbz	w0, .L2059
 	ldr	w1, [x21, #:lo12:.LANCHOR64]
 	mov	w0, 0
-.L2059:
+.L2060:
 	cmp	w0, w1
-	bcs	.L2058
+	bcs	.L2059
 	ldrh	w3, [x2, w0, sxtw 1]
-	cbz	w3, .L2060
+	cbz	w3, .L2061
 	ldr	x1, [x29, 152]
 	add	x7, x21, :lo12:.LANCHOR64
 	ldr	x4, [x1, #:lo12:.LANCHOR130]
 	mov	w1, w0
-.L2061:
+.L2062:
 	ldr	w3, [x7]
 	cmp	w1, w3
-	bcs	.L2058
+	bcs	.L2059
 	sxtw	x6, w1
 	sub	w3, w1, w0
 	lsl	x5, x6, 1
@@ -14227,29 +14238,29 @@ FtlScanSysBlk:
 	strh	w8, [x2, x3, lsl 1]
 	str	w6, [x4, x3, lsl 2]
 	strh	wzr, [x2, x5]
-	b	.L2061
-.L2060:
+	b	.L2062
+.L2061:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L2059
-.L2056:
+	b	.L2060
+.L2057:
 	ldrh	w0, [x23, #:lo12:.LANCHOR70]
-	cbz	w0, .L2057
+	cbz	w0, .L2058
 	ldrh	w2, [x19, #:lo12:.LANCHOR61]
 	mov	w0, 0
-.L2066:
+.L2067:
 	mov	w6, w0
 	cmp	w0, w2
-	bge	.L2057
+	bge	.L2058
 	ldrh	w3, [x1, w0, sxtw 1]
-	cbz	w3, .L2067
+	cbz	w3, .L2068
 	ldr	x2, [x29, 144]
 	add	x19, x19, :lo12:.LANCHOR61
 	ldr	x3, [x2, #:lo12:.LANCHOR193]
-.L2068:
+.L2069:
 	ldrh	w2, [x19]
 	cmp	w0, w2
-	bge	.L2057
+	bge	.L2058
 	sxtw	x5, w0
 	sub	w2, w0, w6
 	lsl	x4, x5, 1
@@ -14261,28 +14272,29 @@ FtlScanSysBlk:
 	strh	w7, [x1, x2, lsl 1]
 	str	w5, [x3, x2, lsl 2]
 	strh	wzr, [x1, x4]
-	b	.L2068
-.L2067:
+	b	.L2069
+.L2068:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L2066
+	b	.L2067
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
 	.section	.text.FtlLoadSysInfo,"ax",@progbits
 	.align	2
 	.global	FtlLoadSysInfo
 	.type	FtlLoadSysInfo, %function
 FtlLoadSysInfo:
-	stp	x29, x30, [sp, -112]!
-	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
+	sub	sp, sp, #128
+	stp	x29, x30, [sp, 16]
+	add	x29, sp, 16
+	stp	x23, x24, [sp, 64]
 	adrp	x23, .LANCHOR183
-	stp	x19, x20, [sp, 16]
+	stp	x19, x20, [sp, 32]
 	adrp	x19, .LANCHOR203
 	add	x0, x19, :lo12:.LANCHOR203
-	stp	x25, x26, [sp, 64]
+	stp	x25, x26, [sp, 80]
 	adrp	x25, .LANCHOR188
-	stp	x21, x22, [sp, 32]
-	stp	x27, x28, [sp, 80]
+	stp	x21, x22, [sp, 48]
+	stp	x27, x28, [sp, 96]
 	adrp	x24, .LANCHOR83
 	ldr	x1, [x23, #:lo12:.LANCHOR183]
 	adrp	x22, .LANCHOR40
@@ -14298,18 +14310,19 @@ FtlLoadSysInfo:
 	ldrh	w0, [x21, #:lo12:.LANCHOR210]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L2092
-.L2104:
+	bne	.L2093
+.L2105:
 	mov	w0, -1
-.L2091:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 112
-	ret
 .L2092:
+	ldp	x19, x20, [sp, 32]
+	ldp	x21, x22, [sp, 48]
+	ldp	x23, x24, [sp, 64]
+	ldp	x25, x26, [sp, 80]
+	ldp	x27, x28, [sp, 96]
+	ldp	x29, x30, [sp, 16]
+	add	sp, sp, 128
+	ret
+.L2093:
 	add	x26, x21, :lo12:.LANCHOR210
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
@@ -14320,9 +14333,10 @@ FtlLoadSysInfo:
 	add	x27, x27, :lo12:.LANCHOR57
 	strh	w0, [x26, 2]
 	adrp	x26, .LANCHOR2
-	add	x26, x26, :lo12:.LANCHOR2
-.L2094:
-	tbz	w20, #31, .L2100
+	add	x0, x26, :lo12:.LANCHOR2
+	str	x0, [x29, 104]
+.L2095:
+	tbz	w20, #31, .L2101
 	mov	w2, 1557
 	adrp	x1, .LANCHOR222
 	adrp	x0, .LC5
@@ -14334,66 +14348,78 @@ FtlLoadSysInfo:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-	b	.L2099
-.L2100:
-	add	x3, x19, :lo12:.LANCHOR203
+	b	.L2100
+.L2101:
+	add	x26, x19, :lo12:.LANCHOR203
 	orr	w0, w20, w28, lsl 10
 	mov	w2, 1
-	str	x3, [x29, 104]
 	mov	w1, w2
-	str	w0, [x3, 4]
+	str	w0, [x26, 4]
 	ldr	x0, [x23, #:lo12:.LANCHOR183]
-	str	x0, [x3, 8]
-	mov	x0, x3
+	str	x0, [x26, 8]
+	mov	x0, x26
 	bl	FlashReadPages
-	ldrb	w0, [x26]
-	cbz	w0, .L2095
-	ldr	x3, [x29, 104]
-	ldr	x0, [x3, 16]
-	ldr	w6, [x0, 12]
-	cbz	w6, .L2095
+	ldr	x0, [x29, 104]
+	ldrb	w0, [x0]
+	cbz	w0, .L2096
+	ldr	x8, [x26, 16]
+	ldr	w7, [x8, 12]
+	cbz	w7, .L2096
+	ldr	x6, [x26, 8]
 	ldrh	w1, [x27]
-	ldr	x0, [x3, 8]
+	mov	x0, x6
 	bl	js_hash
-	cmp	w6, w0
-	beq	.L2095
-	cbnz	w20, .L2096
-	add	x0, x21, :lo12:.LANCHOR210
-	ldrh	w0, [x0, 4]
-	cmp	w28, w0
+	cmp	w7, w0
 	beq	.L2096
-	sxth	w28, w0
+	cbnz	w20, .L2097
+	add	x10, x21, :lo12:.LANCHOR210
+	str	x10, [x29, 96]
+	ldrh	w0, [x10, 4]
+	cmp	w28, w0
+	beq	.L2097
+	ldr	w0, [x6]
+	str	w0, [sp]
+	ldrh	w1, [x21, #:lo12:.LANCHOR210]
+	adrp	x0, .LC45
+	ldr	w2, [x19, #:lo12:.LANCHOR203]
+	add	x0, x0, :lo12:.LC45
+	ldp	w4, w5, [x8]
+	ldr	w6, [x8, 8]
+	ldr	w3, [x26, 4]
+	bl	printf
+	ldr	x10, [x29, 96]
 	adrp	x0, .LANCHOR53
 	ldrh	w20, [x0, #:lo12:.LANCHOR53]
-.L2098:
+	ldrsh	w28, [x10, 4]
+.L2099:
 	sub	w20, w20, #1
 	sxth	w20, w20
-	b	.L2094
-.L2096:
+	b	.L2095
+.L2097:
 	mov	w0, -1
 	str	w0, [x19, #:lo12:.LANCHOR203]
-.L2095:
+.L2096:
 	ldr	w0, [x19, #:lo12:.LANCHOR203]
 	cmn	w0, #1
-	beq	.L2098
+	beq	.L2099
 	ldr	x0, [x23, #:lo12:.LANCHOR183]
 	mov	w1, 19539
 	movk	w1, 0x4654, lsl 16
 	ldr	w0, [x0]
 	cmp	w0, w1
-	bne	.L2098
+	bne	.L2099
 	ldr	x0, [x25, #:lo12:.LANCHOR188]
 	ldrh	w1, [x0]
 	mov	w0, 61604
 	cmp	w1, w0
-	bne	.L2098
-.L2099:
+	bne	.L2099
+.L2100:
 	adrp	x1, .LANCHOR57
 	ldrh	w0, [x22, #:lo12:.LANCHOR40]
 	ldrh	w1, [x1, #:lo12:.LANCHOR57]
 	add	x0, x0, 24
 	cmp	x1, x0, lsl 1
-	bcs	.L2102
+	bcs	.L2103
 	mov	w2, 1559
 	adrp	x1, .LANCHOR222
 	adrp	x0, .LC5
@@ -14405,7 +14431,7 @@ FtlLoadSysInfo:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2102:
+.L2103:
 	add	x19, x19, :lo12:.LANCHOR203
 	mov	w2, 48
 	adrp	x20, .LANCHOR80
@@ -14431,7 +14457,7 @@ FtlLoadSysInfo:
 	bl	ftl_memcpy
 	adrp	x0, .LANCHOR69
 	ldrh	w0, [x0, #:lo12:.LANCHOR69]
-	cbz	w0, .L2103
+	cbz	w0, .L2104
 	ldrh	w1, [x22, #:lo12:.LANCHOR40]
 	adrp	x0, .LANCHOR66
 	ldrh	w2, [x0, #:lo12:.LANCHOR66]
@@ -14445,13 +14471,13 @@ FtlLoadSysInfo:
 	adrp	x0, .LANCHOR195
 	ldr	x0, [x0, #:lo12:.LANCHOR195]
 	bl	ftl_memcpy
-.L2103:
+.L2104:
 	ldr	w2, [x20, #:lo12:.LANCHOR80]
 	mov	w1, 19539
 	movk	w1, 0x4654, lsl 16
 	add	x0, x20, :lo12:.LANCHOR80
 	cmp	w2, w1
-	bne	.L2104
+	bne	.L2105
 	add	x21, x21, :lo12:.LANCHOR210
 	ldrh	w1, [x0, 8]
 	ldrb	w2, [x0, 10]
@@ -14459,7 +14485,7 @@ FtlLoadSysInfo:
 	strh	w1, [x21, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR45]
 	cmp	w2, w0
-	bne	.L2104
+	bne	.L2105
 	adrp	x0, .LANCHOR223
 	adrp	x2, .LANCHOR72
 	adrp	x3, .LANCHOR38
@@ -14484,7 +14510,7 @@ FtlLoadSysInfo:
 	udiv	w0, w0, w3
 	adrp	x3, .LANCHOR224
 	strh	w0, [x3, #:lo12:.LANCHOR224]
-	bls	.L2105
+	bls	.L2106
 	mov	w2, 1586
 	adrp	x1, .LANCHOR222
 	adrp	x0, .LC5
@@ -14496,7 +14522,7 @@ FtlLoadSysInfo:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2105:
+.L2106:
 	add	x4, x20, :lo12:.LANCHOR80
 	adrp	x0, .LANCHOR91
 	add	x2, x0, :lo12:.LANCHOR91
@@ -14561,46 +14587,46 @@ FtlLoadSysInfo:
 	adrp	x1, .LANCHOR159
 	ldr	w4, [x1, #:lo12:.LANCHOR159]
 	cmp	w3, w4
-	bls	.L2106
+	bls	.L2107
 	str	w3, [x1, #:lo12:.LANCHOR159]
-.L2106:
+.L2107:
 	add	x20, x20, :lo12:.LANCHOR80
 	adrp	x1, .LANCHOR160
 	ldr	w3, [x1, #:lo12:.LANCHOR160]
 	ldr	w2, [x20, 36]
 	cmp	w2, w3
-	bls	.L2107
+	bls	.L2108
 	str	w2, [x1, #:lo12:.LANCHOR160]
-.L2107:
+.L2108:
 	mov	w1, 65535
 	cmp	w6, w1
-	beq	.L2108
+	beq	.L2109
 	add	x0, x0, :lo12:.LANCHOR91
 	bl	make_superblock
-.L2108:
+.L2109:
 	ldrh	w2, [x19, #:lo12:.LANCHOR92]
 	mov	w1, 65535
 	add	x0, x19, :lo12:.LANCHOR92
 	cmp	w2, w1
-	beq	.L2109
+	beq	.L2110
 	bl	make_superblock
-.L2109:
+.L2110:
 	ldrh	w2, [x21, #:lo12:.LANCHOR93]
 	mov	w1, 65535
 	add	x0, x21, :lo12:.LANCHOR93
 	cmp	w2, w1
-	beq	.L2110
+	beq	.L2111
 	bl	make_superblock
-.L2110:
+.L2111:
 	ldrh	w2, [x22, #:lo12:.LANCHOR205]
 	mov	w1, 65535
 	add	x0, x22, :lo12:.LANCHOR205
 	cmp	w2, w1
-	beq	.L2111
+	beq	.L2112
 	bl	make_superblock
-.L2111:
+.L2112:
 	mov	w0, 0
-	b	.L2091
+	b	.L2092
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
 	.section	.text.FtlDumpBlockInfo,"ax",@progbits
 	.align	2
@@ -14623,44 +14649,44 @@ FtlDumpBlockInfo:
 	ldrh	w25, [x19, #:lo12:.LANCHOR52]
 	and	w21, w0, 65535
 	adrp	x1, .LANCHOR225
-	adrp	x0, .LC45
+	adrp	x0, .LC46
 	add	x1, x1, :lo12:.LANCHOR225
-	add	x0, x0, :lo12:.LC45
+	add	x0, x0, :lo12:.LC46
 	bl	printf
 	adrp	x1, .LANCHOR83
 	ubfiz	x0, x21, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	ldrh	w2, [x1, x0]
 	mov	w1, w21
-	adrp	x0, .LC46
-	add	x0, x0, :lo12:.LC46
+	adrp	x0, .LC47
+	add	x0, x0, :lo12:.LC47
 	bl	printf
 	strh	w21, [x23, -48]!
 	mov	x0, x23
 	bl	make_superblock
 	adrp	x0, .LANCHOR15
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L2136
-	cbnz	w22, .L2136
+	cbz	w0, .L2137
+	cbnz	w22, .L2137
 	mov	w0, w21
 	bl	ftl_get_blk_mode
 	mov	w21, w0
 	cmp	w0, 1
-	bne	.L2127
+	bne	.L2128
 	adrp	x0, .LANCHOR53
 	ldrh	w25, [x0, #:lo12:.LANCHOR53]
-.L2127:
+.L2128:
 	ldrh	w3, [x19, #:lo12:.LANCHOR52]
-	adrp	x26, .LC48
-	add	x26, x26, :lo12:.LC48
+	adrp	x26, .LC49
+	add	x26, x26, :lo12:.LC49
 	mov	w20, 0
 	mov	w27, 56
 	mov	w2, w25
 	mov	w1, w21
-	adrp	x0, .LC47
-	add	x0, x0, :lo12:.LC47
+	adrp	x0, .LC48
+	add	x0, x0, :lo12:.LC48
 	bl	printf
-.L2128:
+.L2129:
 	adrp	x1, .LANCHOR104
 	adrp	x0, .LANCHOR38
 	adrp	x24, .LANCHOR180
@@ -14677,22 +14703,22 @@ FtlDumpBlockInfo:
 	adrp	x1, .LANCHOR58
 	ldrh	w10, [x1, #:lo12:.LANCHOR58]
 	mov	w1, 0
-.L2129:
+.L2130:
 	cmp	w1, w5
-	bne	.L2131
+	bne	.L2132
 	mov	w1, w19
 	umull	x19, w19, w27
 	mov	x22, 0
 	mov	w2, w21
 	bl	FlashReadPages
-.L2132:
+.L2133:
 	cmp	x22, x19
-	bne	.L2133
+	bne	.L2134
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	cmp	w25, w20
-	bne	.L2128
-.L2134:
+	bne	.L2129
+.L2135:
 	ldp	x19, x20, [sp, 32]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 48]
@@ -14702,13 +14728,13 @@ FtlDumpBlockInfo:
 	ldr	x27, [sp, 96]
 	add	sp, sp, 160
 	ret
-.L2136:
+.L2137:
 	mov	w21, 0
-	b	.L2127
-.L2131:
+	b	.L2128
+.L2132:
 	ldrh	w2, [x3]
 	cmp	w2, w11
-	beq	.L2130
+	beq	.L2131
 	umaddl	x4, w19, w27, x0
 	orr	w2, w20, w2, lsl 10
 	str	w2, [x4, 4]
@@ -14722,12 +14748,12 @@ FtlDumpBlockInfo:
 	asr	w2, w2, 2
 	add	x2, x8, x2, sxtw 2
 	str	x2, [x4, 16]
-.L2130:
+.L2131:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	and	w1, w1, 65535
-	b	.L2129
-.L2133:
+	b	.L2130
+.L2134:
 	ldr	x8, [x24, #:lo12:.LANCHOR180]
 	ldrh	w1, [x29, 96]
 	add	x2, x8, x22
@@ -14743,7 +14769,7 @@ FtlDumpBlockInfo:
 	ldr	w2, [x8, x22]
 	add	x22, x22, 56
 	bl	printf
-	b	.L2132
+	b	.L2133
 	.size	FtlDumpBlockInfo, .-FtlDumpBlockInfo
 	.section	.text.FtlScanAllBlock,"ax",@progbits
 	.align	2
@@ -14752,25 +14778,25 @@ FtlDumpBlockInfo:
 FtlScanAllBlock:
 	sub	sp, sp, #144
 	adrp	x1, .LANCHOR226
-	adrp	x0, .LC45
+	adrp	x0, .LC46
 	add	x1, x1, :lo12:.LANCHOR226
-	add	x0, x0, :lo12:.LC45
+	add	x0, x0, :lo12:.LC46
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x23, x24, [sp, 64]
 	adrp	x23, .LANCHOR41
 	stp	x19, x20, [sp, 32]
-	adrp	x24, .LC50
+	adrp	x24, .LC51
 	stp	x21, x22, [sp, 48]
 	mov	w20, 0
 	add	x23, x23, :lo12:.LANCHOR41
-	add	x24, x24, :lo12:.LC50
+	add	x24, x24, :lo12:.LC51
 	str	x25, [sp, 80]
 	bl	printf
-.L2140:
+.L2141:
 	ldrh	w0, [x23]
 	cmp	w0, w20
-	bhi	.L2148
+	bhi	.L2149
 	ldp	x19, x20, [sp, 32]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 48]
@@ -14779,15 +14805,15 @@ FtlScanAllBlock:
 	ldr	x25, [sp, 80]
 	add	sp, sp, 144
 	ret
-.L2148:
+.L2149:
 	strh	w20, [x29, 80]
 	mov	w0, w20
 	bl	ftl_get_blk_mode
 	mov	w3, w0
 	adrp	x2, .LANCHOR83
 	ubfiz	x1, x20, 1, 16
-	adrp	x0, .LC49
-	add	x0, x0, :lo12:.LC49
+	adrp	x0, .LC50
+	add	x0, x0, :lo12:.LC50
 	ldr	x2, [x2, #:lo12:.LANCHOR83]
 	adrp	x22, .LANCHOR180
 	mov	w19, 0
@@ -14811,35 +14837,35 @@ FtlScanAllBlock:
 	adrp	x1, .LANCHOR58
 	ldrh	w10, [x1, #:lo12:.LANCHOR58]
 	mov	w1, 0
-.L2141:
+.L2142:
 	cmp	w1, w5
-	bne	.L2143
+	bne	.L2144
 	mov	w25, 56
 	mov	x21, 0
 	mov	w2, 0
 	mov	w1, w19
 	umull	x25, w19, w25
 	bl	FlashReadPages
-.L2144:
+.L2145:
 	cmp	x21, x25
-	bne	.L2145
+	bne	.L2146
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
-	adrp	x25, .LC51
-	add	x25, x25, :lo12:.LC51
+	adrp	x25, .LC52
+	add	x25, x25, :lo12:.LC52
 	mov	w1, w19
 	mov	x19, 0
 	mov	w2, 1
 	bl	FlashReadPages
-.L2146:
+.L2147:
 	cmp	x21, x19
-	bne	.L2147
+	bne	.L2148
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2140
-.L2143:
+	b	.L2141
+.L2144:
 	ldrh	w2, [x3]
 	cmp	w2, w11
-	beq	.L2142
+	beq	.L2143
 	umaddl	x4, w19, w12, x0
 	lsl	w2, w2, 10
 	str	w2, [x4, 4]
@@ -14853,12 +14879,12 @@ FtlScanAllBlock:
 	asr	w2, w2, 2
 	add	x2, x8, x2, sxtw 2
 	str	x2, [x4, 16]
-.L2142:
+.L2143:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	and	w1, w1, 65535
-	b	.L2141
-.L2145:
+	b	.L2142
+.L2146:
 	ldr	x8, [x22, #:lo12:.LANCHOR180]
 	ldrh	w1, [x29, 80]
 	add	x2, x8, x21
@@ -14874,8 +14900,8 @@ FtlScanAllBlock:
 	ldr	w2, [x8, x21]
 	add	x21, x21, 56
 	bl	printf
-	b	.L2144
-.L2147:
+	b	.L2145
+.L2148:
 	ldr	x8, [x22, #:lo12:.LANCHOR180]
 	ldrh	w1, [x29, 80]
 	add	x2, x8, x19
@@ -14891,7 +14917,7 @@ FtlScanAllBlock:
 	ldr	w2, [x8, x19]
 	add	x19, x19, 56
 	bl	printf
-	b	.L2146
+	b	.L2147
 	.size	FtlScanAllBlock, .-FtlScanAllBlock
 	.section	.text.FtlMapTblRecovery,"ax",@progbits
 	.align	2
@@ -14940,14 +14966,14 @@ FtlMapTblRecovery:
 	add	x0, x25, :lo12:.LANCHOR53
 	str	w1, [x28, 56]
 	str	x0, [x29, 104]
-.L2151:
+.L2152:
 	ldr	w0, [x29, 156]
 	cmp	w19, w0
-	bge	.L2170
+	bge	.L2171
 	ldr	w0, [x29, 116]
 	sxtw	x26, w19
 	cmp	w19, w0
-	bne	.L2152
+	bne	.L2153
 	lsl	x0, x26, 1
 	mov	w1, 1
 	add	x21, x23, x0
@@ -14967,20 +14993,20 @@ FtlMapTblRecovery:
 	add	x26, x26, :lo12:.LANCHOR2
 	ldr	x0, [x29, 128]
 	add	x19, x0, :lo12:.LANCHOR203
-.L2153:
+.L2154:
 	cmp	w25, w23
-	ble	.L2156
-.L2170:
+	ble	.L2157
+.L2171:
 	mov	x0, x28
 	bl	ftl_free_no_use_map_blk
 	adrp	x0, .LANCHOR53
 	ldrh	w1, [x28, 2]
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L2158
+	bne	.L2159
 	mov	x0, x28
 	bl	ftl_map_blk_alloc_new_blk
-.L2158:
+.L2159:
 	mov	x0, x28
 	bl	ftl_map_blk_gc
 	mov	x0, x28
@@ -14993,7 +15019,7 @@ FtlMapTblRecovery:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L2156:
+.L2157:
 	ldrh	w0, [x21]
 	mov	w2, 1
 	mov	w1, w2
@@ -15002,39 +15028,39 @@ FtlMapTblRecovery:
 	mov	x0, x19
 	bl	FlashReadPages
 	ldrb	w0, [x26]
-	cbz	w0, .L2154
+	cbz	w0, .L2155
 	ldr	x0, [x19, 16]
 	ldr	w0, [x0, 12]
 	str	w0, [x29, 156]
 	uxtw	x0, w0
-	cbz	w0, .L2154
+	cbz	w0, .L2155
 	ldrh	w1, [x27]
 	ldr	x0, [x19, 8]
 	bl	js_hash
 	ldr	w1, [x29, 156]
 	cmp	w1, w0
-	beq	.L2154
+	beq	.L2155
 	mov	w0, -1
 	str	w0, [x19]
-.L2154:
+.L2155:
 	ldr	w0, [x19]
 	cmn	w0, #1
-	beq	.L2155
+	beq	.L2156
 	ldrh	w0, [x20, 8]
 	cmp	w24, w0
-	bls	.L2155
+	bls	.L2156
 	ldrh	w2, [x20]
 	ldrh	w1, [x28, 4]
 	cmp	w2, w1
-	bne	.L2155
+	bne	.L2156
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x19, 4]
 	str	w1, [x22, x0]
-.L2155:
+.L2156:
 	add	w25, w25, 1
 	sxth	w25, w25
-	b	.L2153
-.L2152:
+	b	.L2154
+.L2153:
 	lsl	x26, x26, 1
 	ldr	x0, [x21, #:lo12:.LANCHOR183]
 	str	x0, [x27, 8]
@@ -15051,27 +15077,27 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	w0, [x27]
 	cmn	w0, #1
-	beq	.L2172
+	beq	.L2173
 	ldrh	w1, [x20]
 	ldrh	w0, [x28, 4]
 	cmp	w1, w0
-	bne	.L2172
+	bne	.L2173
 	ldrh	w1, [x20, 8]
 	mov	w0, 64245
 	cmp	w1, w0
-	beq	.L2160
-.L2172:
+	beq	.L2161
+.L2173:
 	adrp	x26, .LANCHOR57
 	add	x26, x26, :lo12:.LANCHOR57
 	adrp	x0, .LANCHOR2
 	mov	w5, 0
 	add	x0, x0, :lo12:.LANCHOR2
 	str	x0, [x29, 120]
-.L2161:
+.L2162:
 	ldr	x0, [x29, 104]
 	ldrh	w0, [x0]
 	cmp	w5, w0
-	bge	.L2168
+	bge	.L2169
 	ldr	x0, [x29, 136]
 	mov	w2, 1
 	str	w5, [x29, 152]
@@ -15084,12 +15110,12 @@ FtlMapTblRecovery:
 	ldr	x0, [x29, 120]
 	ldr	w5, [x29, 152]
 	ldrb	w0, [x0]
-	cbz	w0, .L2165
+	cbz	w0, .L2166
 	ldr	x0, [x27, 16]
 	ldr	w0, [x0, 12]
 	str	w0, [x29, 152]
 	uxtw	x0, w0
-	cbz	w0, .L2165
+	cbz	w0, .L2166
 	ldrh	w1, [x26]
 	ldr	x0, [x27, 8]
 	str	w5, [x29, 112]
@@ -15097,54 +15123,54 @@ FtlMapTblRecovery:
 	ldr	w1, [x29, 152]
 	ldr	w5, [x29, 112]
 	cmp	w1, w0
-	beq	.L2165
+	beq	.L2166
 	mov	w0, -1
 	str	w0, [x27]
-.L2165:
+.L2166:
 	ldr	w0, [x27]
 	cmn	w0, #1
-	beq	.L2166
+	beq	.L2167
 	ldrh	w0, [x20, 8]
 	cmp	w24, w0
-	bls	.L2166
+	bls	.L2167
 	ldrh	w2, [x20]
 	ldrh	w1, [x28, 4]
 	cmp	w2, w1
-	bne	.L2166
+	bne	.L2167
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x27, 4]
 	str	w1, [x22, x0]
-.L2166:
+.L2167:
 	add	w5, w5, 1
 	sxth	w5, w5
-	b	.L2161
-.L2160:
+	b	.L2162
+.L2161:
 	ldrh	w5, [x25, #:lo12:.LANCHOR53]
 	mov	w0, 0
 	ldr	x6, [x21, #:lo12:.LANCHOR183]
 	sub	w5, w5, #1
-.L2162:
+.L2163:
 	cmp	w0, w5
-	blt	.L2164
-.L2168:
+	blt	.L2165
+.L2169:
 	add	w19, w19, 1
 	sxth	w19, w19
-	b	.L2151
-.L2164:
+	b	.L2152
+.L2165:
 	lsl	w2, w0, 1
 	sxtw	x2, w2
 	lsl	x1, x2, 2
 	ldrh	w1, [x6, x1]
 	cmp	w24, w1
-	bls	.L2163
+	bls	.L2164
 	add	x2, x2, 1
 	ubfiz	x1, x1, 2, 16
 	ldr	w2, [x6, x2, lsl 2]
 	str	w2, [x22, x1]
-.L2163:
+.L2164:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L2162
+	b	.L2163
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
 	.section	.text.FtlLoadVonderInfo,"ax",@progbits
 	.align	2
@@ -15204,8 +15230,8 @@ FtlLoadMapInfo:
 	.type	ftl_scan_all_ppa, %function
 ftl_scan_all_ppa:
 	sub	sp, sp, #96
-	adrp	x0, .LC52
-	add	x0, x0, :lo12:.LC52
+	adrp	x0, .LC53
+	add	x0, x0, :lo12:.LC53
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x21, x22, [sp, 48]
@@ -15213,24 +15239,24 @@ ftl_scan_all_ppa:
 	adrp	x21, .LANCHOR51
 	stp	x23, x24, [sp, 64]
 	ldrh	w2, [x22, #:lo12:.LANCHOR52]
-	adrp	x24, .LC53
+	adrp	x24, .LC54
 	ldrh	w1, [x21, #:lo12:.LANCHOR51]
-	add	x24, x24, :lo12:.LC53
+	add	x24, x24, :lo12:.LC54
 	stp	x19, x20, [sp, 32]
 	adrp	x19, .LANCHOR203
 	add	x19, x19, :lo12:.LANCHOR203
 	mov	w23, 0
 	stp	x25, x26, [sp, 80]
 	bl	printf
-.L2197:
+.L2198:
 	ldrh	w0, [x21, #:lo12:.LANCHOR51]
 	cmp	w23, w0
-	bcs	.L2199
+	bcs	.L2200
 	lsl	w26, w23, 10
 	mov	w20, 0
 	add	x25, x22, :lo12:.LANCHOR52
-	b	.L2200
-.L2198:
+	b	.L2201
+.L2199:
 	add	w0, w20, w26
 	stp	wzr, w0, [x19]
 	adrp	x0, .LANCHOR183
@@ -15253,21 +15279,21 @@ ftl_scan_all_ppa:
 	ldr	w7, [x1]
 	ldp	w2, w1, [x19]
 	bl	printf
-.L2200:
+.L2201:
 	ldrh	w0, [x25]
 	cmp	w20, w0
-	bcc	.L2198
+	bcc	.L2199
 	add	w23, w23, 1
-	b	.L2197
-.L2199:
+	b	.L2198
+.L2200:
 	ldp	x19, x20, [sp, 32]
 	adrp	x1, .LANCHOR227
 	ldp	x21, x22, [sp, 48]
 	add	x1, x1, :lo12:.LANCHOR227
 	ldp	x23, x24, [sp, 64]
-	adrp	x0, .LC54
+	adrp	x0, .LC55
 	ldp	x25, x26, [sp, 80]
-	add	x0, x0, :lo12:.LC54
+	add	x0, x0, :lo12:.LC55
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 96
 	b	printf
@@ -15305,11 +15331,11 @@ FlashReadFacBbtData:
 	mul	w26, w0, w25
 	mov	x22, x1
 	str	x2, [x29, 120]
-.L2203:
+.L2204:
 	cmp	w19, w20
-	ble	.L2210
+	ble	.L2211
 	mov	w0, -1
-.L2202:
+.L2203:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -15317,7 +15343,7 @@ FlashReadFacBbtData:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L2210:
+.L2211:
 	add	w0, w20, w26
 	mov	w2, 1
 	lsl	w0, w0, 10
@@ -15327,37 +15353,37 @@ FlashReadFacBbtData:
 	bl	FlashReadPages
 	ldr	w0, [x29, 104]
 	cmn	w0, #1
-	beq	.L2204
+	beq	.L2205
 	ldr	x0, [x22, #:lo12:.LANCHOR197]
 	ldrh	w0, [x0]
 	cmp	w0, w27
-	bne	.L2204
-	cbz	x23, .L2211
-	cbz	w25, .L2206
-.L2209:
+	bne	.L2205
+	cbz	x23, .L2212
+	cbz	w25, .L2207
+.L2210:
 	ldr	x1, [x21, #:lo12:.LANCHOR147]
 	mov	w2, w24
 	mov	x0, x23
 	bl	ftl_memcpy
 	mov	w3, 4
-	adrp	x0, .LC55
+	adrp	x0, .LC56
 	mov	w2, w3
 	mov	x1, x23
-	add	x0, x0, :lo12:.LC55
+	add	x0, x0, :lo12:.LC56
 	bl	rknand_print_hex
-.L2211:
+.L2212:
 	mov	w0, 0
-	b	.L2202
-.L2206:
+	b	.L2203
+.L2207:
 	ldr	x5, [x21, #:lo12:.LANCHOR147]
 	adrp	x2, .LANCHOR149
 	add	x2, x2, :lo12:.LANCHOR149
 	mov	w0, 0
 	mov	w6, 1
-.L2207:
+.L2208:
 	ldr	w1, [x2]
 	cmp	w0, w1
-	bcs	.L2209
+	bcs	.L2210
 	ubfx	x1, x0, 5, 11
 	and	w3, w0, 31
 	lsl	x1, x1, 2
@@ -15367,11 +15393,11 @@ FlashReadFacBbtData:
 	ldr	w3, [x5, x1]
 	orr	w3, w3, w4
 	str	w3, [x5, x1]
-	b	.L2207
-.L2204:
+	b	.L2208
+.L2205:
 	sub	w20, w20, #1
 	and	w20, w20, 65535
-	b	.L2203
+	b	.L2204
 	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
 	.section	.text.FlashGetBadBlockList,"ax",@progbits
 	.align	2
@@ -15395,10 +15421,10 @@ FlashGetBadBlockList:
 	lsr	w2, w2, 3
 	bl	FlashReadFacBbtData
 	cmn	w0, #1
-	bne	.L2217
-.L2221:
+	bne	.L2218
+.L2222:
 	mov	w0, 0
-.L2218:
+.L2219:
 	ubfiz	x0, x0, 1, 16
 	mov	w1, -1
 	ldr	x21, [sp, 32]
@@ -15407,32 +15433,32 @@ FlashGetBadBlockList:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L2217:
+.L2218:
 	ldr	x4, [x21, #:lo12:.LANCHOR153]
 	lsr	w5, w19, 4
 	sub	w19, w19, #1
 	mov	w1, 0
 	mov	w0, 0
 	mov	w6, 1
-.L2219:
+.L2220:
 	cmp	w1, w19
-	bge	.L2218
+	bge	.L2219
 	ubfx	x3, x1, 5, 11
 	and	w2, w1, 31
 	lsl	w2, w6, w2
 	ldr	w3, [x4, x3, lsl 2]
 	tst	w2, w3
-	beq	.L2220
+	beq	.L2221
 	add	w2, w0, 1
 	ubfiz	x0, x0, 1, 16
 	strh	w1, [x20, x0]
 	and	w0, w2, 65535
-.L2220:
+.L2221:
 	cmp	w0, w5
-	bcs	.L2221
+	bcs	.L2222
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L2219
+	b	.L2220
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
 	.section	.text.FtlMakeBbt,"ax",@progbits
 	.align	2
@@ -15448,54 +15474,54 @@ FtlMakeBbt:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w21, .L2228
-	bl	FtlBbtMemInit
+	cbnz	w21, .L2229
 	adrp	x20, .LANCHOR74
 	add	x22, x20, :lo12:.LANCHOR74
-	bl	FtlLoadFactoryBbt
+	bl	FtlBbtMemInit
 	add	x24, x22, 32
+	bl	FtlLoadFactoryBbt
 	adrp	x28, .LANCHOR203
 	add	x22, x22, 12
 	add	x25, x28, :lo12:.LANCHOR203
 	adrp	x0, .LANCHOR45
 	add	x0, x0, :lo12:.LANCHOR45
 	str	x0, [x29, 120]
-.L2229:
+.L2230:
 	ldr	x0, [x29, 120]
 	ldrh	w0, [x0]
 	cmp	w21, w0
-	bcc	.L2235
+	bcc	.L2236
 	adrp	x21, .LANCHOR59
 	add	x21, x21, :lo12:.LANCHOR59
 	mov	w19, 0
-.L2236:
+.L2237:
 	ldrh	w0, [x21]
 	cmp	w0, w19
-	bhi	.L2237
+	bhi	.L2238
 	add	x21, x20, :lo12:.LANCHOR74
 	mov	w22, 65535
 	ldrh	w19, [x21, 12]
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L2238:
+.L2239:
 	ldrh	w0, [x21, 12]
 	sub	w0, w0, #47
 	cmp	w0, w19
-	bgt	.L2242
+	bgt	.L2243
 	mov	w0, w19
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L2239
+	beq	.L2240
 	mov	w0, w19
 	bl	FlashTestBlk
-	cbz	w0, .L2240
+	cbz	w0, .L2241
 	mov	w0, w19
 	bl	FtlBbmMapBadBlock
-.L2239:
+.L2240:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L2238
-.L2235:
+	b	.L2239
+.L2236:
 	adrp	x2, .LANCHOR188
 	adrp	x0, .LANCHOR183
 	add	x19, x28, :lo12:.LANCHOR203
@@ -15507,7 +15533,7 @@ FtlMakeBbt:
 	stp	x0, x26, [x19, 8]
 	adrp	x23, .LANCHOR51
 	str	x2, [x29, 112]
-	beq	.L2230
+	beq	.L2231
 	ldrh	w4, [x23, #:lo12:.LANCHOR51]
 	mov	w2, 1
 	madd	w27, w4, w21, w1
@@ -15522,14 +15548,14 @@ FtlMakeBbt:
 	add	w2, w2, 7
 	lsr	w2, w2, 3
 	bl	ftl_memcpy
-.L2231:
+.L2232:
 	mov	w0, w27
 	add	w21, w21, 1
 	bl	FtlBbmMapBadBlock
 	add	x24, x24, 8
 	add	x22, x22, 2
-	b	.L2229
-.L2230:
+	b	.L2230
+.L2231:
 	mov	w1, w21
 	bl	FlashGetBadBlockList
 	ldr	x0, [x19, 8]
@@ -15542,12 +15568,12 @@ FtlMakeBbt:
 	sub	w19, w19, #1
 	str	x0, [x29, 104]
 	and	w19, w19, 65535
-.L2232:
+.L2233:
 	ldrh	w0, [x23]
 	madd	w0, w21, w0, w19
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L2233
+	beq	.L2234
 	ldr	x0, [x29, 112]
 	mov	w2, 16
 	strh	w19, [x22]
@@ -15580,29 +15606,29 @@ FtlMakeBbt:
 	bl	FlashProgPages
 	ldr	w0, [x25]
 	cmn	w0, #1
-	bne	.L2231
+	bne	.L2232
 	mov	w0, w27
 	bl	FtlBbmMapBadBlock
-	b	.L2232
-.L2233:
+	b	.L2233
+.L2234:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L2232
-.L2237:
+	b	.L2233
+.L2238:
 	mov	w0, w19
 	add	w19, w19, 1
 	bl	FtlBbmMapBadBlock
 	and	w19, w19, 65535
-	b	.L2236
-.L2240:
+	b	.L2237
+.L2241:
 	ldrh	w0, [x21]
 	cmp	w0, w22
-	bne	.L2241
+	bne	.L2242
 	strh	w19, [x21]
-	b	.L2239
-.L2241:
-	strh	w19, [x21, 4]
+	b	.L2240
 .L2242:
+	strh	w19, [x21, 4]
+.L2243:
 	adrp	x0, .LANCHOR77
 	add	x19, x20, :lo12:.LANCHOR74
 	ldrh	w1, [x20, #:lo12:.LANCHOR74]
@@ -15631,7 +15657,7 @@ FtlMakeBbt:
 	strh	w0, [x19, 4]
 	strh	w1, [x20, #:lo12:.LANCHOR74]
 	bl	FtlBbmTblFlush
-.L2228:
+.L2229:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -15662,7 +15688,7 @@ log2phys:
 	stp	x27, x28, [sp, 80]
 	str	w2, [x29, 116]
 	cmp	w25, w1
-	bcc	.L2249
+	bcc	.L2250
 	mov	w2, 884
 	adrp	x1, .LANCHOR228
 	adrp	x0, .LC5
@@ -15674,10 +15700,10 @@ log2phys:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2249:
+.L2250:
 	ldr	w0, [x19, #:lo12:.LANCHOR72]
 	cmp	w25, w0
-	bcs	.L2250
+	bcs	.L2251
 	adrp	x19, .LANCHOR96
 	add	w24, w24, 7
 	adrp	x0, .LANCHOR67
@@ -15686,10 +15712,10 @@ log2phys:
 	and	w22, w23, 65535
 	ldrh	w1, [x0, #:lo12:.LANCHOR67]
 	mov	x0, 0
-.L2251:
+.L2252:
 	and	x20, x0, 65535
 	cmp	w20, w1
-	bcc	.L2256
+	bcc	.L2257
 	bl	select_l2p_ram_region
 	and	x20, x0, 65535
 	ldr	x1, [x19, #:lo12:.LANCHOR96]
@@ -15698,16 +15724,16 @@ log2phys:
 	ldrh	w3, [x1, x21]
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L2257
+	beq	.L2258
 	ldr	w1, [x2, 4]
-	tbz	w1, #31, .L2257
+	tbz	w1, #31, .L2258
 	bl	flush_l2p_region
-.L2257:
+.L2258:
 	adrp	x0, .LANCHOR66
 	str	x0, [x29, 104]
 	ldrh	w1, [x0, #:lo12:.LANCHOR66]
 	cmp	w1, w22
-	bcs	.L2258
+	bcs	.L2259
 	mov	w2, 526
 	adrp	x1, .LANCHOR229
 	adrp	x0, .LC5
@@ -15719,12 +15745,12 @@ log2phys:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2258:
+.L2259:
 	adrp	x27, .LANCHOR131
 	ubfiz	x0, x22, 2, 16
 	ldr	x1, [x27, #:lo12:.LANCHOR131]
 	ldr	w3, [x1, x0]
-	cbnz	w3, .L2259
+	cbnz	w3, .L2260
 	ldr	x0, [x19, #:lo12:.LANCHOR96]
 	adrp	x1, .LANCHOR57
 	add	x0, x0, x21
@@ -15736,13 +15762,13 @@ log2phys:
 	add	x1, x0, x21
 	strh	w22, [x0, x21]
 	str	wzr, [x1, 4]
-	b	.L2253
-.L2250:
+	b	.L2254
+.L2251:
 	ldr	w1, [x29, 116]
 	mov	w0, -1
-	cbnz	w1, .L2248
+	cbnz	w1, .L2249
 	str	w0, [x26]
-.L2248:
+.L2249:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -15750,37 +15776,37 @@ log2phys:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2256:
+.L2257:
 	add	x0, x0, 1
 	add	x3, x2, x0, lsl 4
 	ldrh	w3, [x3, -16]
 	cmp	w3, w22
-	bne	.L2251
-.L2253:
+	bne	.L2252
+.L2254:
 	mov	x0, 1
 	lsl	x24, x0, x24
 	ldr	w0, [x29, 116]
 	sub	w24, w24, #1
 	and	w25, w24, w25
 	and	x25, x25, 65535
-	cbnz	w0, .L2254
+	cbnz	w0, .L2255
 	ldr	x0, [x19, #:lo12:.LANCHOR96]
 	add	x0, x0, x20, lsl 4
 	ldr	x0, [x0, 8]
 	ldr	w0, [x0, x25, lsl 2]
 	str	w0, [x26]
-.L2255:
+.L2256:
 	ldr	x0, [x19, #:lo12:.LANCHOR96]
 	add	x20, x0, x20, lsl 4
 	ldr	w0, [x20, 4]
 	cmn	w0, #1
-	beq	.L2264
+	beq	.L2265
 	add	w0, w0, 1
 	str	w0, [x20, 4]
-.L2264:
+.L2265:
 	mov	w0, 0
-	b	.L2248
-.L2254:
+	b	.L2249
+.L2255:
 	ldr	x0, [x19, #:lo12:.LANCHOR96]
 	ldr	w2, [x26]
 	add	x0, x0, x20, lsl 4
@@ -15791,8 +15817,8 @@ log2phys:
 	str	w1, [x0, 4]
 	adrp	x0, .LANCHOR97
 	strh	w22, [x0, #:lo12:.LANCHOR97]
-	b	.L2255
-.L2259:
+	b	.L2256
+.L2260:
 	ldr	x0, [x19, #:lo12:.LANCHOR96]
 	adrp	x5, .LANCHOR203
 	add	x28, x5, :lo12:.LANCHOR203
@@ -15815,11 +15841,11 @@ log2phys:
 	ldr	x5, [x29, 96]
 	ldrh	w0, [x0, 8]
 	cmp	w0, w22
-	beq	.L2260
+	beq	.L2261
 	mov	w2, w3
 	and	w1, w23, 65535
-	adrp	x0, .LC56
-	add	x0, x0, :lo12:.LC56
+	adrp	x0, .LC57
+	add	x0, x0, :lo12:.LC57
 	bl	printf
 	ldr	x1, [x28, 16]
 	mov	w3, 4
@@ -15831,17 +15857,17 @@ log2phys:
 	mov	w2, 4
 	ldr	x1, [x27, #:lo12:.LANCHOR131]
 	ldrh	w3, [x0, #:lo12:.LANCHOR66]
-	adrp	x0, .LC57
-	add	x0, x0, :lo12:.LC57
+	adrp	x0, .LC58
+	add	x0, x0, :lo12:.LC58
 	bl	rknand_print_hex
 	adrp	x0, .LANCHOR76
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR76]
-.L2261:
+.L2262:
 	ldr	x0, [x29, 120]
 	ldrh	w0, [x0, 8]
 	cmp	w0, w22
-	beq	.L2262
+	beq	.L2263
 	mov	w2, 552
 	adrp	x1, .LANCHOR229
 	adrp	x0, .LC5
@@ -15853,21 +15879,21 @@ log2phys:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2262:
+.L2263:
 	ldr	x0, [x19, #:lo12:.LANCHOR96]
 	add	x1, x0, x21
 	str	wzr, [x1, 4]
 	strh	w22, [x0, x21]
-	b	.L2253
-.L2260:
+	b	.L2254
+.L2261:
 	ldr	w0, [x5, #:lo12:.LANCHOR203]
 	cmp	w0, 256
-	bne	.L2261
+	bne	.L2262
 	and	w23, w23, 65535
 	mov	w2, w3
 	mov	w1, w23
-	adrp	x0, .LC58
-	add	x0, x0, :lo12:.LC58
+	adrp	x0, .LC59
+	add	x0, x0, :lo12:.LC59
 	bl	printf
 	ldr	x0, [x19, #:lo12:.LANCHOR96]
 	mov	w1, w23
@@ -15876,7 +15902,7 @@ log2phys:
 	adrp	x0, .LANCHOR127
 	add	x0, x0, :lo12:.LANCHOR127
 	bl	FtlMapWritePage
-	b	.L2261
+	b	.L2262
 	.size	log2phys, .-log2phys
 	.section	.text.FtlProgPages,"ax",@progbits
 	.align	2
@@ -15891,14 +15917,14 @@ FtlProgPages:
 	ldr	w2, [x23, #:lo12:.LANCHOR76]
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
-	cbnz	w2, .L2267
+	cbnz	w2, .L2268
 	adrp	x2, .LANCHOR15
 	ldrb	w2, [x2, #:lo12:.LANCHOR15]
-	cbz	w2, .L2282
+	cbz	w2, .L2283
 	ldrb	w2, [x3, 8]
 	cmp	w2, 1
 	cset	w22, eq
-.L2269:
+.L2270:
 	mov	x20, x3
 	ldrb	w3, [x3, 9]
 	mov	w21, w1
@@ -15911,21 +15937,21 @@ FtlProgPages:
 	add	x24, x24, :lo12:.LANCHOR138
 	mov	w1, 56
 	umaddl	x21, w21, w1, x19
-.L2270:
+.L2271:
 	cmp	x19, x21
-	beq	.L2279
+	beq	.L2280
 	adrp	x26, .LANCHOR83
-	b	.L2280
-.L2282:
+	b	.L2281
+.L2283:
 	mov	w22, 0
-	b	.L2269
-.L2273:
+	b	.L2270
+.L2274:
 	ldr	w0, [x19, 4]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	ldrh	w1, [x20]
 	cmp	w1, w0, uxth
-	bne	.L2271
+	bne	.L2272
 	ldr	x2, [x26, #:lo12:.LANCHOR83]
 	ubfiz	x1, x1, 1, 16
 	ldrh	w3, [x20, 4]
@@ -15936,12 +15962,12 @@ FtlProgPages:
 	ldrh	w0, [x25]
 	strh	w0, [x20, 2]
 	strh	wzr, [x20, 4]
-.L2271:
+.L2272:
 	ldrh	w0, [x20, 4]
-	cbnz	w0, .L2272
+	cbnz	w0, .L2273
 	mov	x0, x20
 	bl	allocate_new_data_superblock
-.L2272:
+.L2273:
 	ldr	w0, [x24, 96]
 	add	w0, w0, 1
 	str	w0, [x24, 96]
@@ -15958,16 +15984,16 @@ FtlProgPages:
 	mov	x0, x19
 	bl	FlashProgPages
 	ldr	w0, [x23, #:lo12:.LANCHOR76]
-	cbnz	w0, .L2267
-.L2280:
+	cbnz	w0, .L2268
+.L2281:
 	ldr	w0, [x19]
 	cmn	w0, #1
-	beq	.L2273
+	beq	.L2274
 	adrp	x0, .LANCHOR38
 	ldrb	w1, [x20, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w1, w0
-	bcc	.L2274
+	bcc	.L2275
 	mov	w2, 1588
 	adrp	x1, .LANCHOR230
 	adrp	x0, .LC5
@@ -15979,10 +16005,10 @@ FtlProgPages:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2274:
+.L2275:
 	ldr	w0, [x19, 4]
-	cbnz	w22, .L2275
-.L2287:
+	cbnz	w22, .L2276
+.L2288:
 	str	w0, [x29, 92]
 	add	x1, x29, 92
 	ldr	w0, [x19, 24]
@@ -15995,31 +16021,31 @@ FtlProgPages:
 	and	w1, w0, 65535
 	mov	w26, w1
 	cmn	w3, #1
-	beq	.L2277
+	beq	.L2278
 	adrp	x2, .LANCHOR83
 	ubfiz	x0, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR83]
 	ldrh	w0, [x2, x0]
-	cbnz	w0, .L2278
-	adrp	x0, .LC59
+	cbnz	w0, .L2279
+	adrp	x0, .LC60
 	mov	w2, 0
-	add	x0, x0, :lo12:.LC59
+	add	x0, x0, :lo12:.LC60
 	bl	printf
-.L2278:
+.L2279:
 	mov	w0, w26
 	bl	decrement_vpc_count
-.L2277:
+.L2278:
 	add	x19, x19, 56
-	b	.L2270
-.L2275:
+	b	.L2271
+.L2276:
 	orr	w0, w0, -2147483648
-	b	.L2287
-.L2279:
+	b	.L2288
+.L2280:
 	adrp	x0, .LANCHOR38
 	ldrb	w1, [x20, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w1, w0
-	bcc	.L2267
+	bcc	.L2268
 	mov	w2, 1605
 	adrp	x1, .LANCHOR230
 	adrp	x0, .LC5
@@ -16031,7 +16057,7 @@ FtlProgPages:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2267:
+.L2268:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -16046,25 +16072,25 @@ FtlProgPages:
 FtlCacheWriteBack:
 	adrp	x0, .LANCHOR76
 	ldr	w0, [x0, #:lo12:.LANCHOR76]
-	cbnz	w0, .L2294
+	cbnz	w0, .L2295
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	adrp	x19, .LANCHOR132
 	ldr	x0, [x19, #:lo12:.LANCHOR132]
-	cbz	x0, .L2289
+	cbz	x0, .L2290
 	adrp	x1, .LANCHOR231
 	mov	w2, 0
 	ldr	x3, [x1, #:lo12:.LANCHOR231]
 	mov	w1, 1
 	bl	FtlProgPages
 	str	xzr, [x19, #:lo12:.LANCHOR132]
-.L2289:
+.L2290:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2294:
+.L2295:
 	mov	w0, 0
 	ret
 	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
@@ -16075,7 +16101,7 @@ FtlCacheWriteBack:
 FtlSysFlush:
 	adrp	x0, .LANCHOR76
 	ldr	w0, [x0, #:lo12:.LANCHOR76]
-	cbnz	w0, .L2300
+	cbnz	w0, .L2301
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	FtlCacheWriteBack
@@ -16086,7 +16112,7 @@ FtlSysFlush:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L2300:
+.L2301:
 	mov	w0, 0
 	ret
 	.size	FtlSysFlush, .-FtlSysFlush
@@ -16098,14 +16124,14 @@ FtlDeInit:
 	adrp	x0, .LANCHOR232
 	ldr	w0, [x0, #:lo12:.LANCHOR232]
 	cmp	w0, 1
-	bne	.L2306
+	bne	.L2307
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	FtlSysFlush
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L2306:
+.L2307:
 	mov	w0, 0
 	ret
 	.size	FtlDeInit, .-FtlDeInit
@@ -16136,61 +16162,61 @@ ftl_discard:
 	stp	x21, x22, [sp, 32]
 	str	x23, [sp, 48]
 	cmp	w1, w0
-	bhi	.L2319
+	bhi	.L2320
 	mov	w19, w2
 	cmp	w2, 31
-	bhi	.L2313
-.L2327:
+	bhi	.L2314
+.L2328:
 	mov	w0, 0
-.L2311:
+.L2312:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2313:
+.L2314:
 	adrp	x0, .LANCHOR76
 	ldr	w0, [x0, #:lo12:.LANCHOR76]
-	cbnz	w0, .L2327
+	cbnz	w0, .L2328
 	adrp	x22, .LANCHOR55
 	bl	FtlCacheWriteBack
 	ldrh	w0, [x22, #:lo12:.LANCHOR55]
 	udiv	w21, w20, w0
 	msub	w20, w0, w21, w20
 	ands	w20, w20, 65535
-	beq	.L2315
+	beq	.L2316
 	sub	w0, w0, w20
 	add	w21, w21, 1
 	cmp	w0, w19
 	csel	w0, w0, w19, ls
 	sub	w19, w19, w0, uxth
-.L2315:
+.L2316:
 	adrp	x20, .LANCHOR233
 	adrp	x23, .LANCHOR163
 	add	x20, x20, :lo12:.LANCHOR233
 	add	x23, x23, :lo12:.LANCHOR163
 	mov	w0, -1
 	str	w0, [x29, 76]
-.L2316:
+.L2317:
 	ldrh	w0, [x22, #:lo12:.LANCHOR55]
 	cmp	w19, w0
-	bcs	.L2318
+	bcs	.L2319
 	adrp	x0, .LANCHOR233
 	ldr	w1, [x0, #:lo12:.LANCHOR233]
 	cmp	w1, 32
-	bls	.L2327
+	bls	.L2328
 	str	wzr, [x0, #:lo12:.LANCHOR233]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L2327
-.L2318:
+	b	.L2328
+.L2319:
 	mov	w2, 0
 	add	x1, x29, 72
 	mov	w0, w21
 	bl	log2phys
 	ldr	w0, [x29, 72]
 	cmn	w0, #1
-	beq	.L2317
+	beq	.L2318
 	ldr	w0, [x20]
 	mov	w2, 1
 	add	x1, x29, 76
@@ -16205,14 +16231,14 @@ ftl_discard:
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L2317:
+.L2318:
 	ldrh	w0, [x22, #:lo12:.LANCHOR55]
 	add	w21, w21, 1
 	sub	w19, w19, w0
-	b	.L2316
-.L2319:
+	b	.L2317
+.L2320:
 	mov	w0, -1
-	b	.L2311
+	b	.L2312
 	.size	ftl_discard, .-ftl_discard
 	.section	.text.FtlCheckVpc,"ax",@progbits
 	.align	2
@@ -16220,8 +16246,8 @@ ftl_discard:
 	.type	FtlCheckVpc, %function
 FtlCheckVpc:
 	stp	x29, x30, [sp, -112]!
-	adrp	x0, .LC45
-	add	x0, x0, :lo12:.LC45
+	adrp	x0, .LC46
+	add	x0, x0, :lo12:.LC46
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	adrp	x23, .LANCHOR72
@@ -16240,29 +16266,29 @@ FtlCheckVpc:
 	mov	w1, 0
 	mov	x0, x19
 	bl	memset
-.L2329:
+.L2330:
 	ldr	w0, [x23]
 	cmp	w22, w0
-	bcc	.L2331
+	bcc	.L2332
 	adrp	x22, .LANCHOR40
-	adrp	x24, .LC60
+	adrp	x24, .LC61
 	add	x22, x22, :lo12:.LANCHOR40
 	add	x26, x20, :lo12:check_valid_page_count_table
-	add	x24, x24, :lo12:.LC60
+	add	x24, x24, :lo12:.LC61
 	mov	w23, 0
 	mov	w19, 0
 	adrp	x25, .LANCHOR83
-.L2332:
+.L2333:
 	ldrh	w0, [x22]
 	cmp	w0, w19
-	bhi	.L2334
+	bhi	.L2335
 	adrp	x0, .LANCHOR87
 	ldr	x19, [x0, #:lo12:.LANCHOR87]
-	cbz	x19, .L2335
+	cbz	x19, .L2336
 	adrp	x0, .LANCHOR88
-	adrp	x25, .LC61
+	adrp	x25, .LC62
 	add	x20, x20, :lo12:check_valid_page_count_table
-	add	x25, x25, :lo12:.LC61
+	add	x25, x25, :lo12:.LC62
 	ldrh	w26, [x0, #:lo12:.LANCHOR88]
 	adrp	x0, .LANCHOR81
 	mov	x24, x0
@@ -16276,11 +16302,11 @@ FtlCheckVpc:
 	movk	x1, 0xaaab, lsl 0
 	mul	x19, x19, x1
 	and	w19, w19, 65535
-.L2336:
+.L2337:
 	cmp	w22, w26
-	bne	.L2338
-.L2335:
-	cbz	w23, .L2328
+	bne	.L2339
+.L2336:
+	cbz	w23, .L2329
 	mov	w2, 1688
 	add	x1, x21, :lo12:.LANCHOR234
 	adrp	x0, .LC5
@@ -16291,7 +16317,7 @@ FtlCheckVpc:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2328:
+.L2329:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -16299,31 +16325,31 @@ FtlCheckVpc:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2331:
+.L2332:
 	mov	w2, 0
 	add	x1, x29, 108
 	mov	w0, w22
 	bl	log2phys
 	ldr	w0, [x29, 108]
 	cmn	w0, #1
-	beq	.L2330
+	beq	.L2331
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	and	x0, x0, 65535
 	ldrh	w1, [x19, x0, lsl 1]
 	add	w1, w1, 1
 	strh	w1, [x19, x0, lsl 1]
-.L2330:
+.L2331:
 	add	w22, w22, 1
-	b	.L2329
-.L2334:
+	b	.L2330
+.L2335:
 	ldr	x0, [x25, #:lo12:.LANCHOR83]
 	ubfiz	x28, x19, 1, 16
 	sxtw	x27, w19
 	ldrh	w2, [x0, x28]
 	ldrh	w3, [x26, x27, lsl 1]
 	cmp	w2, w3
-	beq	.L2333
+	beq	.L2334
 	mov	w1, w19
 	mov	x0, x24
 	bl	printf
@@ -16331,34 +16357,34 @@ FtlCheckVpc:
 	mov	w1, 65535
 	ldrh	w0, [x0, x28]
 	cmp	w0, w1
-	beq	.L2333
+	beq	.L2334
 	ldrh	w1, [x26, x27, lsl 1]
 	cmp	w1, w0
 	csinc	w23, w23, wzr, ls
-.L2333:
+.L2334:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L2332
-.L2338:
+	b	.L2333
+.L2339:
 	ldr	x1, [x27, #:lo12:.LANCHOR83]
 	ubfiz	x0, x19, 1, 16
 	ldrh	w2, [x1, x0]
-	cbz	w2, .L2337
+	cbz	w2, .L2338
 	ldrh	w3, [x20, w19, sxtw 1]
 	mov	w23, 1
 	mov	w1, w19
 	mov	x0, x25
 	bl	printf
-.L2337:
+.L2338:
 	ldr	x0, [x24, #:lo12:.LANCHOR81]
 	umull	x19, w19, w28
 	ldrh	w19, [x0, x19]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L2335
+	beq	.L2336
 	add	w22, w22, 1
 	and	w22, w22, 65535
-	b	.L2336
+	b	.L2337
 	.size	FtlCheckVpc, .-FtlCheckVpc
 	.section	.text.Ftlscanalldata,"ax",@progbits
 	.align	2
@@ -16366,9 +16392,9 @@ FtlCheckVpc:
 	.type	Ftlscanalldata, %function
 Ftlscanalldata:
 	sub	sp, sp, #96
-	adrp	x0, .LC62
+	adrp	x0, .LC63
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC62
+	add	x0, x0, :lo12:.LC63
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x19, x20, [sp, 32]
@@ -16380,32 +16406,32 @@ Ftlscanalldata:
 	add	x21, x21, :lo12:.LANCHOR72
 	str	x23, [sp, 64]
 	bl	printf
-.L2354:
+.L2355:
 	ldr	w0, [x21]
 	cmp	w19, w0
-	bcc	.L2360
+	bcc	.L2361
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x29, x30, [sp, 16]
 	ldr	x23, [sp, 64]
 	add	sp, sp, 96
 	ret
-.L2360:
+.L2361:
 	mov	w2, 0
 	add	x1, x29, 76
 	mov	w0, w19
 	bl	log2phys
 	tst	x19, 2047
-	bne	.L2355
+	bne	.L2356
 	ldr	w2, [x29, 76]
-	adrp	x0, .LC63
+	adrp	x0, .LC64
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC63
+	add	x0, x0, :lo12:.LC64
 	bl	printf
-.L2355:
+.L2356:
 	ldr	w1, [x29, 76]
 	cmn	w1, #1
-	beq	.L2357
+	beq	.L2358
 	add	x0, x20, :lo12:.LANCHOR203
 	str	wzr, [x20, #:lo12:.LANCHOR203]
 	mov	w2, 0
@@ -16422,25 +16448,25 @@ Ftlscanalldata:
 	ldr	w0, [x20, #:lo12:.LANCHOR203]
 	cmp	w0, 256
 	ccmn	w0, #1, 4, ne
-	beq	.L2358
+	beq	.L2359
 	ldr	w0, [x23, 8]
 	cmp	w19, w0
-	beq	.L2357
-.L2358:
+	beq	.L2358
+.L2359:
 	ldp	x1, x0, [x22, 8]
 	ldr	w2, [x1, 4]
 	str	w2, [sp]
 	ldr	w2, [x22, 4]
 	ldp	w3, w4, [x0]
 	ldp	w5, w6, [x0, 8]
-	adrp	x0, .LC64
+	adrp	x0, .LC65
 	ldr	w7, [x1]
-	add	x0, x0, :lo12:.LC64
+	add	x0, x0, :lo12:.LC65
 	mov	w1, w19
 	bl	printf
-.L2357:
+.L2358:
 	add	w19, w19, 1
-	b	.L2354
+	b	.L2355
 	.size	Ftlscanalldata, .-Ftlscanalldata
 	.section	.text.FtlReUsePrevPpa,"ax",@progbits
 	.align	2
@@ -16461,10 +16487,10 @@ FtlReUsePrevPpa:
 	and	w3, w0, 65535
 	ubfiz	x20, x3, 1, 16
 	ldrh	w1, [x2, x20]
-	cbnz	w1, .L2363
+	cbnz	w1, .L2364
 	adrp	x0, .LANCHOR87
 	ldr	x19, [x0, #:lo12:.LANCHOR87]
-	cbz	x19, .L2364
+	cbz	x19, .L2365
 	adrp	x2, .LANCHOR81
 	mov	x5, -6148914691236517206
 	movk	x5, 0xaaab, lsl 0
@@ -16477,16 +16503,16 @@ FtlReUsePrevPpa:
 	mul	x19, x19, x5
 	mov	w5, 6
 	and	w19, w19, 65535
-.L2365:
+.L2366:
 	cmp	w1, w4
-	beq	.L2364
+	beq	.L2365
 	cmp	w19, w3
-	bne	.L2366
+	bne	.L2367
 	mov	w1, w19
 	add	x0, x0, :lo12:.LANCHOR87
 	bl	List_remove_node
 	ldrh	w0, [x23, #:lo12:.LANCHOR88]
-	cbnz	w0, .L2367
+	cbnz	w0, .L2368
 	mov	w2, 2099
 	adrp	x1, .LANCHOR235
 	adrp	x0, .LC5
@@ -16498,7 +16524,7 @@ FtlReUsePrevPpa:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2367:
+.L2368:
 	ldrh	w0, [x23, #:lo12:.LANCHOR88]
 	sub	w0, w0, #1
 	strh	w0, [x23, #:lo12:.LANCHOR88]
@@ -16508,7 +16534,7 @@ FtlReUsePrevPpa:
 	ldrh	w0, [x1, x20]
 	add	w0, w0, 1
 	strh	w0, [x1, x20]
-.L2364:
+.L2365:
 	add	x1, x29, 76
 	mov	w2, 1
 	mov	w0, w21
@@ -16518,18 +16544,18 @@ FtlReUsePrevPpa:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2366:
+.L2367:
 	umull	x19, w19, w5
 	ldrh	w19, [x2, x19]
 	cmp	w19, w6
-	beq	.L2364
+	beq	.L2365
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L2365
-.L2363:
+	b	.L2366
+.L2364:
 	add	w1, w1, 1
 	strh	w1, [x2, x20]
-	b	.L2364
+	b	.L2365
 	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
 	.section	.text.FtlRecoverySuperblock,"ax",@progbits
 	.align	2
@@ -16547,7 +16573,7 @@ FtlRecoverySuperblock:
 	stp	x25, x26, [sp, 64]
 	cmp	w0, w1
 	stp	x27, x28, [sp, 80]
-	beq	.L2532
+	beq	.L2536
 	ldrb	w0, [x19, 6]
 	str	w0, [x29, 180]
 	adrp	x0, .LANCHOR52
@@ -16555,11 +16581,11 @@ FtlRecoverySuperblock:
 	str	x0, [x29, 144]
 	ldrh	w2, [x0, #:lo12:.LANCHOR52]
 	cmp	w2, w26
-	bne	.L2376
+	bne	.L2377
 	strh	wzr, [x19, 4]
-.L2539:
+.L2543:
 	strb	wzr, [x19, 6]
-.L2532:
+.L2536:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -16568,26 +16594,26 @@ FtlRecoverySuperblock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 208
 	ret
-.L2376:
+.L2377:
 	ldrh	w0, [x19, 16]
 	mov	w21, 0
-.L2377:
+.L2378:
 	cmp	w0, w1
-	beq	.L2378
+	beq	.L2379
 	ldrb	w1, [x19, 8]
 	cmp	w1, 1
-	bne	.L2379
+	bne	.L2380
 	bl	FtlGetLastWrittenPage
 	mov	w20, w0
 	cmn	w0, #1
-	beq	.L2380
+	beq	.L2381
 	adrp	x0, .LANCHOR15
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbnz	w0, .L2457
+	cbnz	w0, .L2458
 	adrp	x0, .LANCHOR16
 	add	x0, x0, :lo12:.LANCHOR16
 	ldrh	w23, [x0, w20, sxtw 1]
-.L2381:
+.L2382:
 	adrp	x1, .LANCHOR105
 	adrp	x2, .LANCHOR38
 	adrp	x22, .LANCHOR180
@@ -16605,23 +16631,23 @@ FtlRecoverySuperblock:
 	str	x2, [x29, 160]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.L2382:
+.L2383:
 	cmp	x1, x4
-	bne	.L2386
+	bne	.L2387
 	ldrb	w1, [x19, 8]
 	cmp	w1, 1
-	bne	.L2458
+	bne	.L2459
 	adrp	x1, .LANCHOR15
 	ldrb	w1, [x1, #:lo12:.LANCHOR15]
 	cmp	w1, 0
 	cset	w1, ne
 	str	w1, [x29, 176]
-.L2387:
+.L2388:
 	ldr	w2, [x29, 176]
 	mov	w1, w27
-	adrp	x24, .LC65
+	adrp	x24, .LC66
 	adrp	x25, .LANCHOR237
-	add	x24, x24, :lo12:.LC65
+	add	x24, x24, :lo12:.LC66
 	add	x25, x25, :lo12:.LANCHOR237
 	mov	x28, 0
 	bl	FlashReadPages
@@ -16630,67 +16656,67 @@ FtlRecoverySuperblock:
 	str	x0, [x29, 168]
 	ldr	w21, [x0, #:lo12:.LANCHOR160]
 	sub	w21, w21, #1
-.L2388:
+.L2389:
 	and	w0, w28, 65535
 	cmp	w27, w0
-	bhi	.L2393
-	bne	.L2391
+	bhi	.L2394
+	bne	.L2392
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	ldr	w0, [x0, 4]
-.L2534:
+.L2538:
 	lsr	w0, w0, 10
 	bl	P2V_plane
 	ldrb	w1, [x19, 8]
 	and	w27, w0, 65535
 	cmp	w1, 1
-	bne	.L2395
+	bne	.L2396
 	adrp	x0, .LANCHOR15
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbnz	w0, .L2395
+	cbnz	w0, .L2396
 	adrp	x0, .LANCHOR16
 	add	x0, x0, :lo12:.LANCHOR16
 	ldrh	w20, [x0, w20, sxtw 1]
-.L2395:
+.L2396:
 	ldr	x0, [x29, 144]
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w20
-	bne	.L2396
+	bne	.L2397
 	strh	w20, [x19, 2]
 	strb	wzr, [x19, 6]
 	strh	wzr, [x19, 4]
-.L2396:
+.L2397:
 	ldr	w0, [x29, 180]
 	cmp	w20, w26
 	cset	w2, eq
 	cmp	w27, w0
 	cset	w0, eq
 	tst	w2, w0
-	beq	.L2397
-.L2540:
+	beq	.L2398
+.L2544:
 	mov	w2, w27
 	mov	w1, w20
 	mov	x0, x19
 	bl	ftl_sb_update_avl_pages
-	b	.L2532
-.L2378:
+	b	.L2536
+.L2379:
 	add	w21, w21, 1
 	and	w21, w21, 65535
 	add	x0, x19, x21, sxtw 1
 	ldrh	w0, [x0, 16]
-	b	.L2377
-.L2379:
+	b	.L2378
+.L2380:
 	mov	w1, 0
 	bl	FtlGetLastWrittenPage
 	mov	w20, w0
 	cmn	w0, #1
-	beq	.L2380
-.L2457:
+	beq	.L2381
+.L2458:
 	mov	w23, w20
-	b	.L2381
-.L2380:
-	cbz	w26, .L2383
+	b	.L2382
+.L2381:
+	cbz	w26, .L2384
 	mov	w2, 2170
 	adrp	x1, .LANCHOR236
 	adrp	x0, .LC5
@@ -16702,11 +16728,11 @@ FtlRecoverySuperblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2383:
+.L2384:
 	ldr	w0, [x29, 180]
 	cmp	w0, 0
 	ccmp	w21, w0, 4, ne
-	beq	.L2384
+	beq	.L2385
 	mov	w2, 2171
 	adrp	x1, .LANCHOR236
 	adrp	x0, .LC5
@@ -16718,13 +16744,13 @@ FtlRecoverySuperblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2384:
+.L2385:
 	strh	wzr, [x19, 2]
-	b	.L2539
-.L2386:
+	b	.L2543
+.L2387:
 	ldrh	w2, [x4]
 	cmp	w2, w8
-	beq	.L2385
+	beq	.L2386
 	umaddl	x5, w27, w10, x0
 	orr	w2, w23, w2, lsl 10
 	add	w3, w27, 1
@@ -16735,81 +16761,81 @@ FtlRecoverySuperblock:
 	asr	w2, w2, 2
 	add	x2, x6, x2, sxtw 2
 	str	x2, [x5, 16]
-.L2385:
+.L2386:
 	add	x4, x4, 2
-	b	.L2382
-.L2458:
+	b	.L2383
+.L2459:
 	str	wzr, [x29, 176]
-	b	.L2387
-.L2393:
+	b	.L2388
+.L2394:
 	mov	x0, 56
 	ldr	x2, [x22, #:lo12:.LANCHOR180]
 	mul	x0, x28, x0
 	add	x1, x2, x0
 	ldr	w0, [x2, x0]
-	cbnz	w0, .L2389
+	cbnz	w0, .L2390
 	ldr	x6, [x1, 16]
 	ldr	w4, [x6, 4]
 	cmn	w4, #1
-	beq	.L2390
+	beq	.L2391
 	ldr	x0, [x29, 168]
 	ldr	w1, [x0, #:lo12:.LANCHOR160]
 	mov	w0, w4
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2390
+	cbz	w0, .L2391
 	ldr	x0, [x29, 168]
 	add	w4, w4, 1
 	str	w4, [x0, #:lo12:.LANCHOR160]
-.L2390:
+.L2391:
 	ldr	w0, [x6]
 	cmn	w0, #1
-	bne	.L2392
-.L2391:
+	bne	.L2393
+.L2392:
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	and	x28, x28, 65535
 	mov	x1, 56
 	and	w20, w20, 65535
 	madd	x28, x28, x1, x0
 	ldr	w0, [x28, 4]
-	b	.L2534
-.L2389:
+	b	.L2538
+.L2390:
 	ldr	w1, [x1, 4]
 	mov	x0, x24
 	bl	printf
 	ldrh	w0, [x19]
 	and	w5, w23, 65535
 	strh	w0, [x25]
-.L2392:
+.L2393:
 	add	x28, x28, 1
-	b	.L2388
-.L2397:
+	b	.L2389
+.L2398:
 	mov	w0, 65535
 	cmp	w5, w0
-	bne	.L2398
-	cbnz	w1, .L2399
-.L2398:
+	bne	.L2399
+	cbnz	w1, .L2400
+.L2399:
 	adrp	x24, .LANCHOR136
 	and	w6, w23, 65535
 	ldr	w0, [x24, #:lo12:.LANCHOR136]
 	cmn	w0, #1
-	bne	.L2400
+	bne	.L2401
 	str	w21, [x24, #:lo12:.LANCHOR136]
-.L2400:
+.L2401:
 	add	w0, w26, 7
 	ldr	w7, [x24, #:lo12:.LANCHOR136]
 	cmp	w0, w23, uxth
-	bge	.L2459
+	bge	.L2460
 	sub	w23, w6, #7
 	and	w23, w23, 65535
-.L2401:
+.L2402:
 	mov	w3, -1
 	adrp	x5, .LANCHOR120
 	mov	w28, w3
 	add	x5, x5, :lo12:.LANCHOR120
 	mov	w4, 65535
-.L2402:
+.L2403:
 	cmp	w23, w6
-	bhi	.L2417
+	bhi	.L2418
 	ldr	x1, [x29, 160]
 	mov	w25, 0
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
@@ -16818,24 +16844,24 @@ FtlRecoverySuperblock:
 	ldrh	w1, [x1, #:lo12:.LANCHOR38]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-	b	.L2418
-.L2459:
+	b	.L2419
+.L2460:
 	mov	w23, w26
-	b	.L2401
-.L2404:
+	b	.L2402
+.L2405:
 	ldrh	w8, [x2]
 	cmp	w8, w4
-	beq	.L2403
+	beq	.L2404
 	umaddl	x11, w25, w10, x0
 	add	w25, w25, 1
 	and	w25, w25, 65535
 	orr	w8, w23, w8, lsl 10
 	str	w8, [x11, 4]
-.L2403:
+.L2404:
 	add	x2, x2, 2
-.L2418:
+.L2419:
 	cmp	x2, x1
-	bne	.L2404
+	bne	.L2405
 	ldr	w2, [x29, 176]
 	mov	w1, w25
 	str	x5, [x29, 112]
@@ -16859,59 +16885,59 @@ FtlRecoverySuperblock:
 	umaddl	x25, w25, w2, x1
 	ldr	x5, [x29, 112]
 	mov	w2, 0
-.L2405:
+.L2406:
 	cmp	x25, x1
-	bne	.L2415
-	cbz	w2, .L2416
+	bne	.L2416
+	cbz	w2, .L2417
 	str	w0, [x24, #:lo12:.LANCHOR136]
-.L2416:
+.L2417:
 	add	w23, w23, 1
 	and	w23, w23, 65535
-	b	.L2402
-.L2415:
+	b	.L2403
+.L2416:
 	ldr	w8, [x1]
-	cbnz	w8, .L2406
+	cbnz	w8, .L2407
 	ldr	x8, [x1, 16]
 	ldrh	w13, [x8]
 	cmp	w13, w4
-	beq	.L2461
+	beq	.L2462
 	ldr	w8, [x8, 4]
 	cmn	w8, #1
-	beq	.L2461
+	beq	.L2462
 	cmn	w3, #1
-	bne	.L2463
+	bne	.L2464
 	ldrh	w2, [x5, x12, lsl 1]
 	cmp	w2, w4
-	bne	.L2408
-	cbz	w10, .L2463
-.L2408:
+	bne	.L2409
+	cbz	w10, .L2464
+.L2409:
 	cmp	w21, w0
 	mov	w2, w11
 	csel	w3, w3, w0, eq
-.L2407:
+.L2408:
 	mov	w28, w0
 	add	x1, x1, 56
 	mov	w0, w8
-	b	.L2405
-.L2406:
-	cbz	w2, .L2409
+	b	.L2406
+.L2407:
+	cbz	w2, .L2410
 	str	w0, [x24, #:lo12:.LANCHOR136]
-.L2409:
+.L2410:
 	adrp	x0, .LANCHOR237
 	ldrh	w1, [x19]
 	strh	w1, [x0, #:lo12:.LANCHOR237]
 	ldrb	w0, [x19, 8]
-	cbnz	w0, .L2399
+	cbnz	w0, .L2400
 	adrp	x0, .LANCHOR120
 	add	x0, x0, :lo12:.LANCHOR120
 	ldrh	w1, [x0, w23, sxtw 1]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2411
+	bne	.L2412
 	cmn	w3, #1
-	beq	.L2412
+	beq	.L2413
 	str	w3, [x24, #:lo12:.LANCHOR136]
-.L2399:
+.L2400:
 	adrp	x0, .LANCHOR238
 	mov	w23, w26
 	mov	w1, 1
@@ -16919,7 +16945,7 @@ FtlRecoverySuperblock:
 	strh	w1, [x0, #:lo12:.LANCHOR238]
 	add	x0, x28, :lo12:.LANCHOR136
 	str	x0, [x29, 112]
-.L2419:
+.L2420:
 	ldr	x2, [x29, 160]
 	adrp	x1, .LANCHOR15
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
@@ -16931,9 +16957,9 @@ FtlRecoverySuperblock:
 	str	x1, [x29, 128]
 	add	x2, x2, 8
 	add	x2, x19, x2, lsl 1
-.L2420:
+.L2421:
 	cmp	x2, x3
-	bne	.L2423
+	bne	.L2424
 	ldr	w2, [x29, 176]
 	mov	w1, w24
 	mov	x25, 0
@@ -16944,100 +16970,100 @@ FtlRecoverySuperblock:
 	adrp	x0, .LANCHOR237
 	add	x0, x0, :lo12:.LANCHOR237
 	str	x0, [x29, 120]
-.L2424:
+.L2425:
 	ldr	x0, [x29, 136]
 	cmp	x25, x0
-	bne	.L2450
+	bne	.L2451
 	ldrb	w0, [x19, 8]
 	add	w23, w23, 1
 	and	w23, w23, 65535
 	cmp	w0, 1
-	bne	.L2451
+	bne	.L2452
 	ldr	x0, [x29, 128]
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L2451
+	cbz	w0, .L2452
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w23
-	bne	.L2451
+	bne	.L2452
 	cmp	w20, w23
-	beq	.L2426
-.L2451:
+	beq	.L2427
+.L2452:
 	ldr	x0, [x29, 144]
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w23
-	bne	.L2419
+	bne	.L2420
 	ldr	x0, [x29, 160]
 	mov	w2, 65535
 	strh	w23, [x19, 2]
 	strh	wzr, [x19, 4]
 	ldrh	w1, [x0, #:lo12:.LANCHOR38]
 	mov	w0, 0
-.L2452:
+.L2453:
 	cmp	w0, w1
-	beq	.L2532
+	beq	.L2536
 	ldr	x4, [x29, 184]
 	ldrh	w3, [x4], 2
 	str	x4, [x29, 184]
 	cmp	w3, w2
-	beq	.L2453
+	beq	.L2454
 	strb	w0, [x19, 6]
-	b	.L2532
-.L2412:
+	b	.L2536
+.L2413:
 	cmp	w21, w7
-	beq	.L2413
+	beq	.L2414
 	str	w7, [x24, #:lo12:.LANCHOR136]
-	b	.L2399
-.L2413:
+	b	.L2400
+.L2414:
 	ldr	w0, [x24, #:lo12:.LANCHOR136]
-.L2541:
+.L2545:
 	sub	w0, w0, #1
-.L2535:
+.L2539:
 	str	w0, [x24, #:lo12:.LANCHOR136]
-	b	.L2399
-.L2411:
+	b	.L2400
+.L2412:
 	cmp	w28, w21
-	beq	.L2414
+	beq	.L2415
 	cmn	w28, #1
-	beq	.L2399
+	beq	.L2400
 	str	w28, [x24, #:lo12:.LANCHOR136]
-	b	.L2399
-.L2414:
+	b	.L2400
+.L2415:
 	ldr	w0, [x24, #:lo12:.LANCHOR136]
 	cmp	w21, w0
-	bne	.L2541
-	b	.L2399
-.L2461:
+	bne	.L2545
+	b	.L2400
+.L2462:
 	mov	w8, w0
 	mov	w0, w28
-	b	.L2407
-.L2463:
+	b	.L2408
+.L2464:
 	mov	w2, 1
-	b	.L2407
-.L2417:
+	b	.L2408
+.L2418:
 	mov	w0, -1
-	b	.L2535
-.L2423:
+	b	.L2539
+.L2424:
 	ldrh	w1, [x3]
 	cmp	w1, w6
-	beq	.L2421
+	beq	.L2422
 	mov	w4, 56
 	orr	w1, w23, w1, lsl 10
 	umaddl	x4, w24, w4, x0
 	str	w1, [x4, 4]
 	ldrb	w7, [x19, 8]
 	cmp	w7, 1
-	bne	.L2422
-	cbz	w5, .L2422
+	bne	.L2423
+	cbz	w5, .L2423
 	orr	w1, w1, -2147483648
 	str	w1, [x4, 4]
-.L2422:
+.L2423:
 	add	w24, w24, 1
 	and	w24, w24, 65535
-.L2421:
+.L2422:
 	add	x3, x3, 2
-	b	.L2420
-.L2450:
+	b	.L2421
+.L2451:
 	ldr	x4, [x22, #:lo12:.LANCHOR180]
 	add	x4, x4, x25
 	ldr	w5, [x4, 4]
@@ -17046,38 +17072,38 @@ FtlRecoverySuperblock:
 	bl	P2V_plane
 	and	w0, w0, 65535
 	cmp	w23, w26
-	bcc	.L2425
+	bcc	.L2426
 	ldr	w1, [x29, 180]
 	ccmp	w1, w0, 0, eq
-	bhi	.L2425
+	bhi	.L2426
 	cmp	w23, w20
 	ccmp	w27, w0, 0, eq
-	beq	.L2426
+	beq	.L2427
 	ldr	w0, [x4]
 	cmn	w0, #1
-	beq	.L2427
+	beq	.L2428
 	ldr	x3, [x4, 16]
 	mov	w0, 61589
 	ldrh	w1, [x3]
 	cmp	w1, w0
-	beq	.L2428
+	beq	.L2429
 	ldrh	w0, [x19]
-.L2537:
+.L2541:
 	bl	decrement_vpc_count
-	b	.L2425
-.L2428:
+	b	.L2426
+.L2429:
 	ldr	w21, [x3, 4]
 	cmn	w21, #1
-	beq	.L2429
+	beq	.L2430
 	ldr	x0, [x29, 168]
 	ldr	w1, [x0, #:lo12:.LANCHOR160]
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2429
+	cbz	w0, .L2430
 	ldr	x1, [x29, 168]
 	add	w0, w21, 1
 	str	w0, [x1, #:lo12:.LANCHOR160]
-.L2429:
+.L2430:
 	ldp	w24, w0, [x3, 8]
 	add	x1, x29, 200
 	str	w0, [x29, 196]
@@ -17087,12 +17113,12 @@ FtlRecoverySuperblock:
 	ldr	w1, [x28, #:lo12:.LANCHOR136]
 	ldr	w3, [x29, 196]
 	cmn	w1, #1
-	beq	.L2430
+	beq	.L2431
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2430
+	cbz	w0, .L2431
 	cmn	w3, #1
-	beq	.L2431
+	beq	.L2432
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	mov	w2, 0
 	mov	w1, 1
@@ -17106,15 +17132,15 @@ FtlRecoverySuperblock:
 	add	x3, x0, x25
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	bne	.L2432
-.L2433:
+	bne	.L2433
+.L2434:
 	mov	w0, -1
 	str	w0, [x29, 196]
-.L2440:
+.L2441:
 	ldr	w3, [x29, 196]
 	cmn	w3, #1
-	beq	.L2425
-.L2456:
+	beq	.L2426
+.L2457:
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
 	and	w24, w0, 65535
@@ -17122,8 +17148,8 @@ FtlRecoverySuperblock:
 	mov	w3, w24
 	ldrh	w0, [x0, #:lo12:.LANCHOR40]
 	cmp	w0, w24
-	bhi	.L2446
-	mov	w2, 2458
+	bhi	.L2447
+	mov	w2, 2457
 	adrp	x1, .LANCHOR236
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR236
@@ -17136,50 +17162,50 @@ FtlRecoverySuperblock:
 	add	x0, x0, :lo12:.LC7
 	bl	printf
 	ldr	w3, [x29, 152]
-.L2446:
+.L2447:
 	adrp	x1, .LANCHOR83
 	ubfiz	x0, x24, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L2447
+	cbz	w0, .L2448
 	mov	w0, w3
-	b	.L2537
-.L2431:
+	b	.L2541
+.L2432:
 	ldp	w1, w0, [x29, 200]
 	cmp	w1, w0
-	bne	.L2425
+	bne	.L2426
 	mov	w2, 1
 	add	x1, x29, 196
 	mov	w0, w24
 	bl	log2phys
-.L2425:
+.L2426:
 	add	x25, x25, 56
-	b	.L2424
-.L2432:
+	b	.L2425
+.L2433:
 	ldr	w0, [x4, 8]
 	cmp	w24, w0
-	bne	.L2433
+	bne	.L2434
 	ldr	w0, [x4, 4]
 	str	w0, [x29, 152]
 	str	x4, [x29, 104]
 	uxtw	x1, w0
 	ldr	w0, [x28, #:lo12:.LANCHOR136]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2433
+	cbz	w0, .L2434
 	ldp	w0, w1, [x29, 200]
 	ldr	x4, [x29, 104]
 	cmp	w0, w1
 	ldr	w1, [x29, 196]
-	bne	.L2435
-.L2536:
+	bne	.L2436
+.L2540:
 	mov	w0, w24
 	bl	FtlReUsePrevPpa
-	b	.L2433
-.L2435:
+	b	.L2434
+.L2436:
 	cmp	w0, w1
-	beq	.L2433
+	beq	.L2434
 	cmn	w0, #1
-	beq	.L2436
+	beq	.L2437
 	ldr	x4, [x3, 16]
 	mov	w2, 0
 	str	w0, [x3, 4]
@@ -17188,64 +17214,65 @@ FtlRecoverySuperblock:
 	mov	x0, x3
 	bl	FlashReadPages
 	ldr	x4, [x29, 104]
-.L2437:
+.L2438:
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	beq	.L2438
+	beq	.L2439
 	ldr	x0, [x29, 112]
 	ldr	w3, [x4, 4]
 	mov	w1, w3
 	ldr	w0, [x0]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2438
+	cbz	w0, .L2439
 	ldr	w0, [x29, 152]
 	mov	w1, w3
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2433
-.L2438:
+	cbz	w0, .L2434
+.L2439:
 	ldr	w1, [x29, 196]
-	b	.L2536
-.L2436:
+	b	.L2540
+.L2437:
 	str	w0, [x3]
-	b	.L2437
-.L2430:
+	b	.L2438
+.L2431:
 	ldp	w1, w0, [x29, 200]
 	cmp	w1, w0
-	beq	.L2440
+	beq	.L2441
+	cmn	w3, #1
+	beq	.L2443
 	adrp	x0, .LANCHOR43
+	ubfx	x3, x3, 10, 21
 	ldr	w0, [x0, #:lo12:.LANCHOR43]
-	cmp	w0, w3, lsr 10
-	bhi	.L2442
-	cmn	w3, #1
-	bne	.L2425
-.L2442:
+	cmp	w3, w0
+	bcs	.L2426
+.L2443:
 	mov	w2, 1
 	add	x1, x29, 204
 	mov	w0, w24
 	bl	log2phys
 	ldr	w3, [x29, 200]
 	cmn	w3, #1
-	beq	.L2440
+	beq	.L2441
 	ldr	w0, [x29, 196]
 	cmp	w3, w0
-	beq	.L2456
+	beq	.L2457
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
 	adrp	x1, .LANCHOR91
 	and	w0, w0, 65535
 	ldrh	w1, [x1, #:lo12:.LANCHOR91]
 	cmp	w1, w0
-	beq	.L2445
+	beq	.L2446
 	adrp	x1, .LANCHOR92
 	ldrh	w1, [x1, #:lo12:.LANCHOR92]
 	cmp	w1, w0
-	beq	.L2445
+	beq	.L2446
 	adrp	x1, .LANCHOR93
 	ldrh	w1, [x1, #:lo12:.LANCHOR93]
 	cmp	w1, w0
-	bne	.L2440
-.L2445:
+	bne	.L2441
+.L2446:
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	mov	w2, 0
 	mov	w1, 1
@@ -17256,63 +17283,63 @@ FtlRecoverySuperblock:
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L2440
+	beq	.L2441
 	ldr	x4, [x29, 152]
 	mov	w0, w21
 	ldr	w1, [x4, 4]
 	bl	ftl_cmp_data_ver
-	cbnz	w0, .L2440
+	cbnz	w0, .L2441
 	mov	w2, 1
 	add	x1, x29, 200
 	mov	w0, w24
 	bl	log2phys
-	b	.L2440
-.L2447:
+	b	.L2441
+.L2448:
 	mov	w1, w24
-	adrp	x0, .LC66
-	add	x0, x0, :lo12:.LC66
+	adrp	x0, .LC67
+	add	x0, x0, :lo12:.LC67
 	bl	printf
-	b	.L2425
-.L2427:
+	b	.L2426
+.L2428:
 	ldr	x1, [x29, 120]
 	mov	w2, w21
 	ldrh	w0, [x19]
 	strh	w0, [x1]
 	mov	w1, w5
-	adrp	x0, .LC67
-	add	x0, x0, :lo12:.LC67
+	adrp	x0, .LC68
+	add	x0, x0, :lo12:.LC68
 	bl	printf
 	adrp	x2, .LANCHOR239
 	ldr	w0, [x2, #:lo12:.LANCHOR239]
 	cmp	w0, 31
-	bhi	.L2448
+	bhi	.L2449
 	adrp	x1, .LANCHOR240
 	add	x1, x1, :lo12:.LANCHOR240
 	ldr	w3, [x29, 204]
 	str	w3, [x1, w0, uxtw 2]
 	add	w0, w0, 1
 	str	w0, [x2, #:lo12:.LANCHOR239]
-.L2448:
+.L2449:
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
 	ldr	w0, [x28, #:lo12:.LANCHOR136]
 	cmn	w0, #1
-	bne	.L2449
-.L2538:
+	bne	.L2450
+.L2542:
 	str	w21, [x28, #:lo12:.LANCHOR136]
-	b	.L2425
-.L2449:
+	b	.L2426
+.L2450:
 	cmp	w21, w0
-	bcs	.L2425
-	b	.L2538
-.L2453:
+	bcs	.L2426
+	b	.L2542
+.L2454:
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L2452
-.L2426:
+	b	.L2453
+.L2427:
 	strb	w27, [x19, 6]
 	strh	w20, [x19, 2]
-	b	.L2540
+	b	.L2544
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
 	.section	.text.FtlGcScanTempBlk,"ax",@progbits
 	.align	2
@@ -17331,30 +17358,30 @@ FtlGcScanTempBlk:
 	stp	x25, x26, [sp, 64]
 	cmp	w20, w0
 	stp	x27, x28, [sp, 80]
-	beq	.L2567
-	cbnz	w20, .L2543
-.L2544:
+	beq	.L2571
+	cbnz	w20, .L2547
+.L2548:
 	bl	FtlGcPageVarInit
-	b	.L2545
-.L2567:
+	b	.L2549
+.L2571:
 	mov	w20, 0
-.L2543:
+.L2547:
 	adrp	x0, .LANCHOR52
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w1
-	beq	.L2544
-.L2545:
+	beq	.L2548
+.L2549:
 	adrp	x24, .LANCHOR72
 	add	x24, x24, :lo12:.LANCHOR72
 	mov	w26, -1
-.L2546:
+.L2550:
 	ldrh	w1, [x19]
 	mov	w0, 65535
 	strb	wzr, [x19, 8]
 	cmp	w1, w0
-	beq	.L2547
+	beq	.L2551
 	mov	w27, 56
-.L2566:
+.L2570:
 	adrp	x1, .LANCHOR104
 	adrp	x22, .LANCHOR180
 	add	x3, x19, 16
@@ -17372,9 +17399,9 @@ FtlGcScanTempBlk:
 	ldrh	w1, [x1, #:lo12:.LANCHOR38]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.L2548:
+.L2552:
 	cmp	x3, x1
-	bne	.L2550
+	bne	.L2554
 	mov	w1, w21
 	mov	w2, 0
 	bl	FlashReadPages
@@ -17384,17 +17411,17 @@ FtlGcScanTempBlk:
 	str	x0, [x29, 104]
 	add	x0, x25, :lo12:.LANCHOR2
 	str	x0, [x29, 96]
-.L2551:
+.L2555:
 	ldr	x0, [x29, 104]
 	cmp	x0, x21
-	bne	.L2565
+	bne	.L2569
 	adrp	x0, .LANCHOR52
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w20
-	bhi	.L2566
-.L2547:
+	bhi	.L2570
+.L2551:
 	strh	w20, [x19, 2]
 	mov	w0, -1
 	strb	wzr, [x19, 6]
@@ -17411,10 +17438,10 @@ FtlGcScanTempBlk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L2550:
+.L2554:
 	ldrh	w2, [x3]
 	cmp	w2, w10
-	beq	.L2549
+	beq	.L2553
 	umaddl	x4, w21, w27, x0
 	orr	w2, w20, w2, lsl 10
 	str	w2, [x4, 4]
@@ -17428,25 +17455,25 @@ FtlGcScanTempBlk:
 	asr	w2, w2, 2
 	add	x2, x7, x2, sxtw 2
 	str	x2, [x4, 16]
-.L2549:
+.L2553:
 	add	x3, x3, 2
-	b	.L2548
-.L2565:
+	b	.L2552
+.L2569:
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	add	x1, x0, x21
 	ldr	w0, [x0, x21]
 	ldr	w28, [x1, 4]
 	ldr	x25, [x1, 16]
-	cbnz	w0, .L2552
+	cbnz	w0, .L2556
 	ldrh	w1, [x25]
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L2581
+	beq	.L2585
 	ldr	w1, [x24]
 	ldr	w0, [x25, 8]
 	cmp	w0, w1
-	bls	.L2554
-.L2581:
+	bls	.L2558
+.L2585:
 	adrp	x0, .LANCHOR83
 	ldrh	w1, [x19]
 	ldr	x0, [x0, #:lo12:.LANCHOR83]
@@ -17457,30 +17484,30 @@ FtlGcScanTempBlk:
 	mov	w0, -1
 	strh	w0, [x19]
 	strh	w0, [x1, #:lo12:.LANCHOR205]
-.L2580:
+.L2584:
 	bl	FtlGcPageVarInit
 	mov	w20, 0
-	b	.L2546
-.L2554:
+	b	.L2550
+.L2558:
 	ldr	x1, [x29, 96]
 	ldrb	w1, [x1]
-	cbnz	w1, .L2556
-.L2557:
+	cbnz	w1, .L2560
+.L2561:
 	ldp	w2, w0, [x25, 8]
 	mov	w1, w28
 	add	x21, x21, 56
 	bl	FtlGcUpdatePage
-	b	.L2551
-.L2556:
+	b	.L2555
+.L2560:
 	add	x1, x29, 116
 	mov	w2, 0
 	bl	log2phys
 	ldr	w0, [x25, 12]
 	ldr	w1, [x29, 116]
 	cmp	w0, w1
-	bne	.L2557
+	bne	.L2561
 	cmn	w0, #1
-	beq	.L2557
+	beq	.L2561
 	str	w0, [x29, 124]
 	adrp	x0, .LANCHOR187
 	mov	w2, 0
@@ -17499,52 +17526,52 @@ FtlGcScanTempBlk:
 	add	x2, x2, x21
 	mov	x0, 0
 	ubfiz	x1, x1, 9, 16
-.L2558:
+.L2562:
 	cmp	x0, x1
-	beq	.L2557
+	beq	.L2561
 	ldr	x6, [x2, 8]
 	ldr	w7, [x6, x0]
 	add	x0, x0, 4
 	add	x6, x5, x0
 	ldr	w6, [x6, -4]
 	cmp	w7, w6
-	beq	.L2558
+	beq	.L2562
 	ldrh	w1, [x19]
-	adrp	x0, .LC68
+	adrp	x0, .LC69
 	ldr	w2, [x29, 124]
-	add	x0, x0, :lo12:.LC68
+	add	x0, x0, :lo12:.LC69
 	bl	printf
-	b	.L2581
-.L2552:
+	b	.L2585
+.L2556:
 	ldrh	w1, [x19]
 	mov	w2, w28
-	adrp	x0, .LC69
-	add	x0, x0, :lo12:.LC69
+	adrp	x0, .LC70
+	add	x0, x0, :lo12:.LC70
 	bl	printf
 	adrp	x0, .LANCHOR28
 	ldr	w1, [x0, #:lo12:.LANCHOR28]
 	ldrh	w0, [x19]
-	cbnz	w1, .L2561
+	cbnz	w1, .L2565
 	adrp	x1, .LANCHOR15
 	ldrb	w1, [x1, #:lo12:.LANCHOR15]
-	cbz	w1, .L2562
-.L2561:
+	cbz	w1, .L2566
+.L2565:
 	adrp	x2, .LANCHOR78
 	ubfiz	x1, x0, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR78]
 	ldrh	w1, [x2, x1]
 	cmp	w1, 159
-	bls	.L2563
-.L2562:
+	bls	.L2567
+.L2566:
 	ldr	x1, [x22, #:lo12:.LANCHOR180]
 	ldr	w1, [x1, x21]
 	cmn	w1, #1
-	bne	.L2564
-.L2563:
+	bne	.L2568
+.L2567:
 	ldr	x1, [x22, #:lo12:.LANCHOR180]
 	add	x3, x1, x21
 	ldr	w26, [x3, 4]
-.L2564:
+.L2568:
 	adrp	x1, .LANCHOR83
 	ubfiz	x0, x0, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR83]
@@ -17553,7 +17580,7 @@ FtlGcScanTempBlk:
 	bl	INSERT_FREE_LIST
 	mov	w0, -1
 	strh	w0, [x19]
-	b	.L2580
+	b	.L2584
 	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
 	.section	.text.FtlGcFreeTempBlock,"ax",@progbits
 	.align	2
@@ -17562,10 +17589,10 @@ FtlGcScanTempBlk:
 FtlGcFreeTempBlock:
 	adrp	x0, .LANCHOR76
 	ldr	w0, [x0, #:lo12:.LANCHOR76]
-	cbz	w0, .L2583
+	cbz	w0, .L2587
 	mov	w0, 0
 	ret
-.L2583:
+.L2587:
 	stp	x29, x30, [sp, -112]!
 	mov	w1, 65535
 	add	x29, sp, 0
@@ -17579,26 +17606,26 @@ FtlGcFreeTempBlock:
 	stp	x25, x26, [sp, 64]
 	cmp	w20, w1
 	stp	x27, x28, [sp, 80]
-	beq	.L2585
+	beq	.L2589
 	adrp	x1, .LANCHOR52
 	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	bl	FtlGcScanTempBlk
 	str	w0, [x29, 108]
 	cmn	w0, #1
-	beq	.L2585
+	beq	.L2589
 	adrp	x0, .LANCHOR78
 	ubfiz	x20, x20, 1, 16
 	ldr	x1, [x0, #:lo12:.LANCHOR78]
 	ldrh	w0, [x1, x20]
 	cmp	w0, 4
-	bls	.L2586
+	bls	.L2590
 	sub	w0, w0, #5
 	strh	w0, [x1, x20]
 	mov	w0, 1
 	bl	FtlEctTblFlush
-.L2586:
+.L2590:
 	ldr	w0, [x21, #:lo12:.LANCHOR135]
-	cbnz	w0, .L2587
+	cbnz	w0, .L2591
 	adrp	x0, .LANCHOR138
 	add	x0, x0, :lo12:.LANCHOR138
 	ldr	w1, [x0, 96]
@@ -17608,10 +17635,10 @@ FtlGcFreeTempBlock:
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
-.L2587:
+.L2591:
 	str	wzr, [x21, #:lo12:.LANCHOR135]
 	mov	w0, 1
-.L2582:
+.L2586:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -17619,13 +17646,13 @@ FtlGcFreeTempBlock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2585:
+.L2589:
 	str	wzr, [x21, #:lo12:.LANCHOR135]
 	mov	w0, 65535
 	ldrh	w1, [x19, #:lo12:.LANCHOR93]
 	add	x21, x19, :lo12:.LANCHOR93
 	cmp	w1, w0
-	beq	.L2609
+	beq	.L2613
 	bl	FtlCacheWriteBack
 	adrp	x20, .LANCHOR110
 	adrp	x0, .LANCHOR52
@@ -17635,7 +17662,7 @@ FtlGcFreeTempBlock:
 	ldrh	w3, [x0, #:lo12:.LANCHOR52]
 	mul	w1, w1, w3
 	cmp	w2, w1
-	beq	.L2589
+	beq	.L2593
 	mov	w2, 163
 	adrp	x1, .LANCHOR242
 	adrp	x0, .LC5
@@ -17647,7 +17674,7 @@ FtlGcFreeTempBlock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2589:
+.L2593:
 	add	x0, x19, :lo12:.LANCHOR93
 	adrp	x22, .LANCHOR83
 	ldrh	w3, [x21, #:lo12:.LANCHOR52]
@@ -17666,27 +17693,27 @@ FtlGcFreeTempBlock:
 	ldr	w2, [x1, #:lo12:.LANCHOR161]
 	add	w0, w0, w2
 	str	w0, [x1, #:lo12:.LANCHOR161]
-.L2590:
+.L2594:
 	ldrh	w0, [x26]
 	cmp	w0, w21
-	bhi	.L2594
+	bhi	.L2598
 	mov	w0, -1
 	bl	decrement_vpc_count
 	adrp	x0, .LANCHOR15
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L2595
+	cbz	w0, .L2599
 	ldrh	w1, [x19, #:lo12:.LANCHOR93]
-	adrp	x0, .LC70
-	add	x0, x0, :lo12:.LC70
+	adrp	x0, .LC71
+	add	x0, x0, :lo12:.LC71
 	bl	printf
-.L2595:
+.L2599:
 	ldrh	w0, [x19, #:lo12:.LANCHOR93]
 	ldr	x2, [x22, #:lo12:.LANCHOR83]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L2596
+	cbz	w1, .L2600
 	bl	INSERT_DATA_LIST
-.L2597:
+.L2601:
 	adrp	x0, .LANCHOR108
 	mov	w21, -1
 	strh	wzr, [x20, #:lo12:.LANCHOR110]
@@ -17702,14 +17729,14 @@ FtlGcFreeTempBlock:
 	ldrh	w0, [x0, #:lo12:.LANCHOR224]
 	add	w0, w0, w0, lsl 1
 	cmp	w1, w0, lsr 2
-	ble	.L2609
+	ble	.L2613
 	adrp	x0, .LANCHOR176
 	mov	w1, 20
 	strh	w1, [x0, #:lo12:.LANCHOR176]
-.L2609:
+.L2613:
 	mov	w0, 0
-	b	.L2582
-.L2594:
+	b	.L2586
+.L2598:
 	mov	w24, 12
 	ldr	x28, [x27, #:lo12:.LANCHOR111]
 	ldr	w1, [x25]
@@ -17717,18 +17744,18 @@ FtlGcFreeTempBlock:
 	add	x23, x28, x24
 	ldr	w0, [x23, 8]
 	cmp	w0, w1
-	bcc	.L2591
-.L2607:
+	bcc	.L2595
+.L2611:
 	ldrh	w0, [x19, #:lo12:.LANCHOR93]
-	b	.L2608
-.L2591:
+	b	.L2612
+.L2595:
 	add	x1, x29, 108
 	mov	w2, 0
 	bl	log2phys
 	ldr	w0, [x28, x24]
 	ldr	w1, [x29, 108]
 	cmp	w0, w1
-	bne	.L2593
+	bne	.L2597
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	mov	w24, w0
@@ -17737,20 +17764,20 @@ FtlGcFreeTempBlock:
 	add	x1, x23, 4
 	bl	log2phys
 	mov	w0, w24
-.L2608:
+.L2612:
 	bl	decrement_vpc_count
-	b	.L2592
-.L2593:
+	b	.L2596
+.L2597:
 	ldr	w0, [x23, 4]
 	cmp	w1, w0
-	bne	.L2607
-.L2592:
+	bne	.L2611
+.L2596:
 	add	w21, w21, 1
 	and	w21, w21, 65535
-	b	.L2590
-.L2596:
+	b	.L2594
+.L2600:
 	bl	INSERT_FREE_LIST
-	b	.L2597
+	b	.L2601
 	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
 	.section	.text.Ftl_get_new_temp_ppa,"ax",@progbits
 	.align	2
@@ -17765,11 +17792,11 @@ Ftl_get_new_temp_ppa:
 	mov	x19, x0
 	ldrh	w3, [x0, #:lo12:.LANCHOR93]
 	cmp	w3, w2
-	beq	.L2611
+	beq	.L2615
 	add	x1, x0, :lo12:.LANCHOR93
 	ldrh	w0, [x1, 4]
-	cbnz	w0, .L2612
-.L2611:
+	cbnz	w0, .L2616
+.L2615:
 	bl	FtlCacheWriteBack
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
@@ -17784,7 +17811,7 @@ Ftl_get_new_temp_ppa:
 	mov	w0, 0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L2612:
+.L2616:
 	add	x0, x19, :lo12:.LANCHOR93
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -17797,29 +17824,29 @@ Ftl_get_new_temp_ppa:
 Ftl_gc_temp_data_write_back:
 	adrp	x0, .LANCHOR76
 	ldr	w0, [x0, #:lo12:.LANCHOR76]
-	cbz	w0, .L2615
+	cbz	w0, .L2619
 	mov	w0, 0
 	ret
-.L2618:
+.L2622:
 	mov	w0, 0
-.L2614:
+.L2618:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2615:
+.L2619:
 	stp	x29, x30, [sp, -32]!
 	adrp	x0, .LANCHOR15
 	add	x29, sp, 0
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR102
-	cbz	w0, .L2617
+	cbz	w0, .L2621
 	ldr	w0, [x19, #:lo12:.LANCHOR102]
-	tbz	x0, 0, .L2617
+	tbz	x0, 0, .L2621
 	adrp	x0, .LANCHOR93+4
 	ldrh	w0, [x0, #:lo12:.LANCHOR93+4]
-	cbnz	w0, .L2618
-.L2617:
+	cbnz	w0, .L2622
+.L2621:
 	adrp	x20, .LANCHOR181
 	ldr	w1, [x19, #:lo12:.LANCHOR102]
 	mov	w3, 0
@@ -17829,27 +17856,27 @@ Ftl_gc_temp_data_write_back:
 	bl	FlashProgPages
 	mov	w11, 0
 	mov	w12, 56
-.L2619:
+.L2623:
 	ldr	w1, [x19]
 	cmp	w11, w1
-	bcc	.L2621
+	bcc	.L2625
 	ldr	x0, [x20, #:lo12:.LANCHOR181]
 	bl	FtlGcBufFree
 	str	wzr, [x19]
 	adrp	x0, .LANCHOR93+4
 	ldrh	w0, [x0, #:lo12:.LANCHOR93+4]
-	cbnz	w0, .L2618
+	cbnz	w0, .L2622
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
-	b	.L2631
-.L2621:
+	b	.L2635
+.L2625:
 	umull	x0, w11, w12
 	ldr	x2, [x20, #:lo12:.LANCHOR181]
 	add	x1, x2, x0
 	ldr	w2, [x2, x0]
 	ldr	x3, [x1, 16]
 	cmn	w2, #1
-	bne	.L2620
+	bne	.L2624
 	adrp	x0, .LANCHOR93
 	adrp	x3, .LANCHOR83
 	ldrh	w4, [x0, #:lo12:.LANCHOR93]
@@ -17866,16 +17893,16 @@ Ftl_gc_temp_data_write_back:
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
 	bl	FtlGcPageVarInit
-.L2631:
+.L2635:
 	mov	w0, 1
-	b	.L2614
-.L2620:
+	b	.L2618
+.L2624:
 	ldr	w1, [x1, 4]
 	ldp	w2, w0, [x3, 8]
 	bl	FtlGcUpdatePage
 	add	w11, w11, 1
 	and	w11, w11, 65535
-	b	.L2619
+	b	.L2623
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
 	.section	.text.FtlGcPageRecovery,"ax",@progbits
 	.align	2
@@ -17894,7 +17921,7 @@ FtlGcPageRecovery:
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bcc	.L2632
+	bcc	.L2636
 	adrp	x0, .LANCHOR127
 	add	x0, x0, :lo12:.LANCHOR127
 	bl	FtlMapBlkWriteDumpData
@@ -17902,7 +17929,7 @@ FtlGcPageRecovery:
 	bl	FtlGcFreeTempBlock
 	adrp	x0, .LANCHOR135
 	str	wzr, [x0, #:lo12:.LANCHOR135]
-.L2632:
+.L2636:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -17958,18 +17985,18 @@ FtlSysBlkInit:
 	ldrh	w1, [x0, #:lo12:.LANCHOR210]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2638
-.L2640:
+	bne	.L2642
+.L2644:
 	mov	w19, -1
-.L2637:
+.L2641:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2638:
+.L2642:
 	bl	FtlLoadSysInfo
 	mov	w19, w0
-	cbnz	w0, .L2640
+	cbnz	w0, .L2644
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -17985,19 +18012,19 @@ FtlSysBlkInit:
 	ldr	x1, [x0, #:lo12:.LANCHOR96]
 	mov	w0, 0
 	add	x1, x1, 4
-.L2641:
+.L2645:
 	cmp	w0, w2
-	bge	.L2646
+	bge	.L2650
 	ldr	w3, [x1], 16
-	tbz	w3, #31, .L2642
-.L2646:
+	tbz	w3, #31, .L2646
+.L2650:
 	adrp	x3, .LANCHOR160
 	cmp	w0, w2
 	ldr	w1, [x3, #:lo12:.LANCHOR160]
 	add	w1, w1, 32
 	str	w1, [x3, #:lo12:.LANCHOR160]
-	bge	.L2648
-.L2643:
+	bge	.L2652
+.L2647:
 	adrp	x0, .LANCHOR83
 	adrp	x1, .LANCHOR91
 	ldr	x2, [x0, #:lo12:.LANCHOR83]
@@ -18032,17 +18059,17 @@ FtlSysBlkInit:
 	strh	w1, [x0, 30]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L2650:
+.L2654:
 	bl	FtlVpcTblFlush
-	b	.L2637
-.L2642:
-	add	w0, w0, 1
 	b	.L2641
-.L2648:
+.L2646:
+	add	w0, w0, 1
+	b	.L2645
+.L2652:
 	ldrh	w0, [x20, #:lo12:.LANCHOR238]
-	cbnz	w0, .L2643
+	cbnz	w0, .L2647
 	bl	l2p_flush
-	b	.L2650
+	b	.L2654
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.section	.text.FtlLowFormat,"ax",@progbits
 	.align	2
@@ -18051,7 +18078,7 @@ FtlSysBlkInit:
 FtlLowFormat:
 	adrp	x0, .LANCHOR76
 	ldr	w0, [x0, #:lo12:.LANCHOR76]
-	cbnz	w0, .L2683
+	cbnz	w0, .L2687
 	stp	x29, x30, [sp, -80]!
 	adrp	x0, .LANCHOR195
 	mov	w1, 0
@@ -18079,9 +18106,9 @@ FtlLowFormat:
 	ldrh	w0, [x25, #:lo12:.LANCHOR39]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	w0, .L2654
+	cbz	w0, .L2658
 	bl	FtlMakeBbt
-.L2654:
+.L2658:
 	adrp	x22, .LANCHOR55
 	adrp	x0, .LANCHOR186
 	mov	w6, 23752
@@ -18092,31 +18119,31 @@ FtlLowFormat:
 	lsl	w1, w1, 7
 	ldr	x5, [x0, #:lo12:.LANCHOR187]
 	mov	w0, 0
-.L2655:
+.L2659:
 	cmp	w0, w1
-	blt	.L2656
+	blt	.L2660
 	adrp	x21, .LANCHOR40
 	adrp	x19, .LANCHOR41
 	add	x26, x19, :lo12:.LANCHOR41
 	mov	w23, 0
 	ldrh	w24, [x21, #:lo12:.LANCHOR40]
-.L2657:
+.L2661:
 	ldrh	w0, [x26]
 	cmp	w0, w24
-	bhi	.L2658
+	bhi	.L2662
 	adrp	x24, .LANCHOR38
 	sub	w1, w23, #2
 	ldrh	w0, [x24, #:lo12:.LANCHOR38]
 	cmp	w1, w0, lsl 1
-	bgt	.L2659
-.L2663:
+	bgt	.L2663
+.L2667:
 	add	x26, x21, :lo12:.LANCHOR40
 	mov	w23, 0
 	mov	w25, 0
-.L2660:
+.L2664:
 	ldrh	w0, [x26]
 	cmp	w0, w25
-	bhi	.L2664
+	bhi	.L2668
 	adrp	x0, .LANCHOR73
 	ldrh	w1, [x19, #:lo12:.LANCHOR41]
 	ldrh	w3, [x24, #:lo12:.LANCHOR38]
@@ -18133,47 +18160,47 @@ FtlLowFormat:
 	mov	w4, 24
 	mul	w4, w3, w4
 	cmp	w23, w4
-	ble	.L2665
+	ble	.L2669
 	sub	w2, w2, w23
 	udiv	w2, w2, w3
 	str	w2, [x0, #:lo12:.LANCHOR72]
 	lsr	w2, w2, 5
 	add	w2, w2, 24
 	strh	w2, [x1, #:lo12:.LANCHOR224]
-.L2665:
+.L2669:
 	adrp	x2, .LANCHOR28
 	ldr	w2, [x2, #:lo12:.LANCHOR28]
 	cmp	w2, 1
-	bne	.L2666
+	bne	.L2670
 	udiv	w4, w23, w3
 	ldrh	w2, [x1, #:lo12:.LANCHOR224]
 	add	w4, w4, w2
 	add	w4, w2, w4, asr 2
 	strh	w4, [x1, #:lo12:.LANCHOR224]
-.L2666:
+.L2670:
 	adrp	x2, .LANCHOR15
 	ldrb	w2, [x2, #:lo12:.LANCHOR15]
-	cbz	w2, .L2667
+	cbz	w2, .L2671
 	udiv	w4, w23, w3
 	ldrh	w2, [x1, #:lo12:.LANCHOR224]
 	add	w4, w4, w2
 	add	w4, w2, w4, asr 2
 	strh	w4, [x1, #:lo12:.LANCHOR224]
-.L2667:
+.L2671:
 	adrp	x2, .LANCHOR49
 	ldrh	w2, [x2, #:lo12:.LANCHOR49]
-	cbz	w2, .L2669
+	cbz	w2, .L2673
 	ldrh	w4, [x1, #:lo12:.LANCHOR224]
 	add	w4, w4, w2, lsr 1
 	strh	w4, [x1, #:lo12:.LANCHOR224]
 	mul	w4, w2, w3
 	cmp	w23, w4
-	bge	.L2669
+	bge	.L2673
 	add	w2, w2, 32
 	str	w6, [x0, #:lo12:.LANCHOR72]
 	add	w2, w5, w2
 	strh	w2, [x1, #:lo12:.LANCHOR224]
-.L2669:
+.L2673:
 	ldrh	w2, [x1, #:lo12:.LANCHOR224]
 	adrp	x25, .LANCHOR223
 	ldr	w1, [x0, #:lo12:.LANCHOR72]
@@ -18217,20 +18244,20 @@ FtlLowFormat:
 	ldr	x0, [x0, #:lo12:.LANCHOR1]
 	strb	wzr, [x19, 6]
 	bl	ftl_memset
-.L2671:
+.L2675:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L2672
+	cbnz	w1, .L2676
 	ldr	x1, [x24, #:lo12:.LANCHOR83]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L2671
-.L2656:
+	b	.L2675
+.L2660:
 	ubfiz	x3, x0, 2, 16
 	mvn	w2, w0
 	orr	w2, w0, w2, lsl 16
@@ -18238,8 +18265,8 @@ FtlLowFormat:
 	and	w0, w0, 65535
 	str	w2, [x4, x3]
 	str	w6, [x5, x3]
-	b	.L2655
-.L2658:
+	b	.L2659
+.L2662:
 	mov	w0, w24
 	mov	w1, 1
 	add	w24, w24, 1
@@ -18247,8 +18274,8 @@ FtlLowFormat:
 	add	w23, w23, w0
 	and	w24, w24, 65535
 	and	w23, w23, 65535
-	b	.L2657
-.L2659:
+	b	.L2661
+.L2663:
 	udiv	w0, w23, w0
 	adrp	x1, .LANCHOR65
 	ldr	w23, [x1, #:lo12:.LANCHOR65]
@@ -18258,17 +18285,17 @@ FtlLowFormat:
 	add	x25, x19, :lo12:.LANCHOR41
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	w23, [x21, #:lo12:.LANCHOR40]
-.L2661:
+.L2665:
 	ldrh	w0, [x25]
 	cmp	w0, w23
-	bls	.L2663
+	bls	.L2667
 	mov	w0, w23
 	add	w23, w23, 1
 	mov	w1, 1
 	and	w23, w23, 65535
 	bl	FtlLowFormatEraseBlock
-	b	.L2661
-.L2664:
+	b	.L2665
+.L2668:
 	mov	w0, w25
 	mov	w1, 0
 	add	w25, w25, 1
@@ -18276,8 +18303,8 @@ FtlLowFormat:
 	add	w23, w23, w0
 	and	w25, w25, 65535
 	and	w23, w23, 65535
-	b	.L2660
-.L2672:
+	b	.L2664
+.L2676:
 	ldr	w1, [x20, #:lo12:.LANCHOR159]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
@@ -18297,20 +18324,20 @@ FtlLowFormat:
 	mov	w1, 1
 	strb	wzr, [x0, 6]
 	strb	w1, [x0, 8]
-.L2673:
+.L2677:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L2674
+	cbnz	w1, .L2678
 	ldr	x1, [x24, #:lo12:.LANCHOR83]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L2673
-.L2674:
+	b	.L2677
+.L2678:
 	ldr	w1, [x20, #:lo12:.LANCHOR159]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
@@ -18336,11 +18363,11 @@ FtlLowFormat:
 	str	w0, [x20, #:lo12:.LANCHOR159]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	w0, .L2653
+	cbnz	w0, .L2657
 	adrp	x0, .LANCHOR232
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR232]
-.L2653:
+.L2657:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -18348,7 +18375,7 @@ FtlLowFormat:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2683:
+.L2687:
 	mov	w0, 0
 	ret
 	.size	FtlLowFormat, .-FtlLowFormat
@@ -18359,7 +18386,7 @@ FtlLowFormat:
 rk_ftl_garbage_collect:
 	adrp	x1, .LANCHOR76
 	ldr	w1, [x1, #:lo12:.LANCHOR76]
-	cbnz	w1, .L2745
+	cbnz	w1, .L2749
 	stp	x29, x30, [sp, -176]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
@@ -18369,79 +18396,79 @@ rk_ftl_garbage_collect:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w1, .L2747
+	cbnz	w1, .L2751
 	adrp	x1, .LANCHOR85
 	ldrh	w1, [x1, #:lo12:.LANCHOR85]
 	cmp	w1, 47
-	bls	.L2747
+	bls	.L2751
 	adrp	x5, .LANCHOR113
 	mov	w2, 65535
 	ldrh	w8, [x5, #:lo12:.LANCHOR113]
 	cmp	w8, w2
-	beq	.L2688
+	beq	.L2692
 	adrp	x7, .LANCHOR112
 	ldrh	w1, [x7, #:lo12:.LANCHOR112]
 	cmp	w1, w2
-	bne	.L2688
+	bne	.L2692
 	adrp	x3, .LANCHOR114
 	ldrh	w6, [x3, #:lo12:.LANCHOR114]
 	cmp	w6, w1
-	beq	.L2688
+	beq	.L2692
 	adrp	x2, .LANCHOR115
 	ldrh	w4, [x2, #:lo12:.LANCHOR115]
 	cmp	w4, w1
-	beq	.L2688
+	beq	.L2692
 	mov	w1, -1
 	strh	w8, [x7, #:lo12:.LANCHOR112]
 	strh	w6, [x5, #:lo12:.LANCHOR113]
 	strh	w4, [x3, #:lo12:.LANCHOR114]
 	strh	w1, [x2, #:lo12:.LANCHOR115]
-.L2688:
-	cbnz	w0, .L2748
+.L2692:
+	cbnz	w0, .L2752
 	adrp	x0, .LANCHOR88
 	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w0, 24
-	bhi	.L2749
+	bhi	.L2753
 	adrp	x1, .LANCHOR52
 	cmp	w0, 16
 	ldrh	w20, [x1, #:lo12:.LANCHOR52]
-	bls	.L2691
+	bls	.L2695
 	lsr	w20, w20, 5
-.L2690:
+.L2694:
 	adrp	x2, .LANCHOR176
 	mov	x3, x2
 	ldrh	w1, [x2, #:lo12:.LANCHOR176]
 	cmp	w1, w0
-	bcs	.L2694
+	bcs	.L2698
 	adrp	x0, .LANCHOR93
 	mov	w1, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w0, w1
-	bne	.L2695
+	bne	.L2699
 	adrp	x1, .LANCHOR112
 	ldrh	w1, [x1, #:lo12:.LANCHOR112]
 	cmp	w1, w0
-	bne	.L2695
+	bne	.L2699
 	adrp	x0, .LANCHOR243
 	ldrh	w0, [x0, #:lo12:.LANCHOR243]
-	cbnz	w0, .L2696
+	cbnz	w0, .L2700
 	adrp	x1, .LANCHOR72
 	adrp	x4, .LANCHOR100
 	ldr	w1, [x1, #:lo12:.LANCHOR72]
 	ldr	w4, [x4, #:lo12:.LANCHOR100]
 	add	w1, w1, w1, lsl 1
 	cmp	w4, w1, lsr 2
-	bcs	.L2697
-.L2696:
+	bcs	.L2701
+.L2700:
 	adrp	x1, .LANCHOR224
 	ldrh	w1, [x1, #:lo12:.LANCHOR224]
 	add	w1, w1, w1, lsl 1
 	asr	w1, w1, 2
 	strh	w1, [x3, #:lo12:.LANCHOR176]
-.L2698:
+.L2702:
 	adrp	x1, .LANCHOR172
 	str	wzr, [x1, #:lo12:.LANCHOR172]
-.L2686:
+.L2690:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -18449,82 +18476,82 @@ rk_ftl_garbage_collect:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L2691:
+.L2695:
 	cmp	w0, 12
-	bls	.L2692
+	bls	.L2696
 	lsr	w20, w20, 4
-	b	.L2690
-.L2692:
+	b	.L2694
+.L2696:
 	cmp	w0, 8
-	bls	.L2690
+	bls	.L2694
 	lsr	w20, w20, 2
-	b	.L2690
-.L2749:
+	b	.L2694
+.L2753:
 	mov	w20, 1
-	b	.L2690
-.L2697:
+	b	.L2694
+.L2701:
 	mov	w1, 18
 	strh	w1, [x2, #:lo12:.LANCHOR176]
-	b	.L2698
-.L2695:
+	b	.L2702
+.L2699:
 	adrp	x0, .LANCHOR224
 	ldrh	w0, [x0, #:lo12:.LANCHOR224]
 	add	w0, w0, w0, lsl 1
 	asr	w0, w0, 2
 	strh	w0, [x3, #:lo12:.LANCHOR176]
-.L2694:
+.L2698:
 	adrp	x0, .LANCHOR116
 	ldrh	w0, [x0, #:lo12:.LANCHOR116]
-	cbz	w0, .L2689
+	cbz	w0, .L2693
 	add	w20, w20, 32
 	and	w20, w20, 65535
-.L2689:
+.L2693:
 	adrp	x19, .LANCHOR205
 	mov	w0, 65535
 	ldrh	w2, [x19, #:lo12:.LANCHOR205]
 	cmp	w2, w0
-	bne	.L2701
+	bne	.L2705
 	adrp	x0, .LANCHOR112
 	ldrh	w1, [x0, #:lo12:.LANCHOR112]
 	cmp	w1, w2
-	beq	.L2702
+	beq	.L2706
 	adrp	x2, .LANCHOR83
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR83]
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L2703
+	cbnz	w1, .L2707
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR112]
-.L2703:
+.L2707:
 	ldrh	w1, [x0, #:lo12:.LANCHOR112]
 	strh	w1, [x19, #:lo12:.LANCHOR205]
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR112]
-.L2702:
+.L2706:
 	add	x0, x19, :lo12:.LANCHOR205
 	mov	w1, 65535
 	strb	wzr, [x0, 8]
 	ldrh	w0, [x19, #:lo12:.LANCHOR205]
 	cmp	w0, w1
-	beq	.L2701
+	beq	.L2705
 	bl	IsBlkInGcList
-	cbz	w0, .L2705
+	cbz	w0, .L2709
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR205]
-.L2705:
+.L2709:
 	adrp	x0, .LANCHOR15
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L2706
+	cbz	w0, .L2710
 	ldrh	w0, [x19, #:lo12:.LANCHOR205]
 	add	x3, x19, :lo12:.LANCHOR205
 	bl	ftl_get_blk_mode
 	strb	w0, [x3, 8]
-.L2706:
+.L2710:
 	ldrh	w1, [x19, #:lo12:.LANCHOR205]
 	mov	w0, 65535
 	add	x22, x19, :lo12:.LANCHOR205
 	cmp	w1, w0
-	beq	.L2701
+	beq	.L2705
 	mov	x0, x22
 	bl	make_superblock
 	adrp	x0, .LANCHOR244
@@ -18537,37 +18564,37 @@ rk_ftl_garbage_collect:
 	ldrh	w1, [x0, x1, lsl 1]
 	adrp	x0, .LANCHOR245
 	strh	w1, [x0, #:lo12:.LANCHOR245]
-.L2701:
+.L2705:
 	adrp	x1, .LANCHOR91
 	ldrh	w0, [x19, #:lo12:.LANCHOR205]
 	str	x1, [x29, 128]
 	ldrh	w2, [x1, #:lo12:.LANCHOR91]
 	cmp	w2, w0
-	beq	.L2707
+	beq	.L2711
 	adrp	x1, .LANCHOR92
 	ldrh	w1, [x1, #:lo12:.LANCHOR92]
 	cmp	w1, w0
-	beq	.L2707
+	beq	.L2711
 	adrp	x1, .LANCHOR93
 	ldrh	w1, [x1, #:lo12:.LANCHOR93]
 	cmp	w1, w0
-	bne	.L2708
-.L2707:
+	bne	.L2712
+.L2711:
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR205]
-.L2708:
+.L2712:
 	adrp	x25, .LANCHOR178
 	add	x26, x25, :lo12:.LANCHOR178
-.L2744:
+.L2748:
 	ldrh	w1, [x19, #:lo12:.LANCHOR205]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2709
+	bne	.L2713
 	adrp	x0, .LANCHOR172
 	adrp	x22, .LANCHOR52
 	add	x22, x22, :lo12:.LANCHOR52
 	str	wzr, [x0, #:lo12:.LANCHOR172]
-.L2710:
+.L2714:
 	ldrh	w5, [x25, #:lo12:.LANCHOR178]
 	add	x7, x25, :lo12:.LANCHOR178
 	mov	w0, w5
@@ -18576,21 +18603,21 @@ rk_ftl_garbage_collect:
 	strh	w6, [x19, #:lo12:.LANCHOR205]
 	mov	w0, 65535
 	cmp	w6, w0
-	bne	.L2711
+	bne	.L2715
 	strh	wzr, [x7]
 	mov	w0, 8
-	b	.L2686
-.L2748:
+	b	.L2690
+.L2752:
 	mov	w20, 1
-	b	.L2689
-.L2711:
+	b	.L2693
+.L2715:
 	mov	w0, w6
 	bl	IsBlkInGcList
 	add	w5, w5, 1
-	cbz	w0, .L2712
+	cbz	w0, .L2716
 	strh	w5, [x25, #:lo12:.LANCHOR178]
-	b	.L2710
-.L2712:
+	b	.L2714
+.L2716:
 	adrp	x23, .LANCHOR83
 	adrp	x4, .LANCHOR38
 	ldrh	w0, [x22]
@@ -18602,53 +18629,53 @@ rk_ftl_garbage_collect:
 	ldrh	w3, [x2, x1]
 	mul	w0, w0, w4
 	cmp	w3, w0, asr 1
-	bgt	.L2714
+	bgt	.L2718
 	cmp	w5, 48
-	bls	.L2715
+	bls	.L2719
 	cmp	w3, 8
-	bls	.L2715
+	bls	.L2719
 	adrp	x3, .LANCHOR108
 	ldrh	w3, [x3, #:lo12:.LANCHOR108]
 	cmp	w3, 35
-	bhi	.L2715
-.L2714:
+	bhi	.L2719
+.L2718:
 	strh	wzr, [x26]
-.L2715:
+.L2719:
 	ldrh	w1, [x2, x1]
 	cmp	w0, w1
-	bgt	.L2716
+	bgt	.L2720
 	ldrh	w0, [x26]
 	cmp	w0, 3
-	bhi	.L2716
+	bhi	.L2720
 	mov	w0, -1
 	strh	wzr, [x26]
 	strh	w0, [x19, #:lo12:.LANCHOR205]
-.L2787:
+.L2791:
 	adrp	x0, .LANCHOR243
 	ldrh	w0, [x0, #:lo12:.LANCHOR243]
-	b	.L2686
-.L2716:
-	cbnz	w1, .L2717
+	b	.L2690
+.L2720:
+	cbnz	w1, .L2721
 	mov	w0, -1
 	bl	decrement_vpc_count
 	ldrh	w0, [x26]
 	add	w0, w0, 1
 	strh	w0, [x26]
-	b	.L2710
-.L2717:
+	b	.L2714
+.L2721:
 	adrp	x0, .LANCHOR15
 	add	x3, x19, :lo12:.LANCHOR205
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
 	strb	wzr, [x3, 8]
-	cbz	w0, .L2718
+	cbz	w0, .L2722
 	mov	w0, w6
 	bl	ftl_get_blk_mode
 	strb	w0, [x3, 8]
-.L2718:
+.L2722:
 	ldr	x0, [x29, 128]
 	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	cmp	w0, w6
-	bne	.L2719
+	bne	.L2723
 	mov	w2, 902
 	adrp	x1, .LANCHOR246
 	adrp	x0, .LC5
@@ -18660,12 +18687,12 @@ rk_ftl_garbage_collect:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2719:
+.L2723:
 	adrp	x0, .LANCHOR92
 	ldrh	w1, [x19, #:lo12:.LANCHOR205]
 	ldrh	w0, [x0, #:lo12:.LANCHOR92]
 	cmp	w1, w0
-	bne	.L2720
+	bne	.L2724
 	mov	w2, 903
 	adrp	x1, .LANCHOR246
 	adrp	x0, .LC5
@@ -18677,12 +18704,12 @@ rk_ftl_garbage_collect:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2720:
+.L2724:
 	adrp	x0, .LANCHOR93
 	ldrh	w1, [x19, #:lo12:.LANCHOR205]
 	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w1, w0
-	bne	.L2721
+	bne	.L2725
 	mov	w2, 904
 	adrp	x1, .LANCHOR246
 	adrp	x0, .LC5
@@ -18694,7 +18721,7 @@ rk_ftl_garbage_collect:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2721:
+.L2725:
 	add	x22, x19, :lo12:.LANCHOR205
 	mov	x0, x22
 	bl	make_superblock
@@ -18707,7 +18734,7 @@ rk_ftl_garbage_collect:
 	strh	wzr, [x22, 2]
 	strh	w1, [x0, #:lo12:.LANCHOR245]
 	strb	wzr, [x22, 6]
-.L2709:
+.L2713:
 	adrp	x1, .LANCHOR52
 	mov	w0, 1
 	str	w0, [x21, #:lo12:.LANCHOR171]
@@ -18717,31 +18744,31 @@ rk_ftl_garbage_collect:
 	str	x1, [x29, 120]
 	str	x0, [x29, 112]
 	ldrb	w2, [x0, #:lo12:.LANCHOR15]
-	cbz	w2, .L2722
+	cbz	w2, .L2726
 	add	x0, x19, :lo12:.LANCHOR205
 	ldrb	w0, [x0, 8]
 	cmp	w0, 1
-	bne	.L2722
+	bne	.L2726
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	str	w0, [x29, 156]
-.L2722:
+.L2726:
 	add	x0, x19, :lo12:.LANCHOR205
 	ldr	w2, [x29, 156]
 	ldrh	w0, [x0, 2]
 	add	w1, w0, w20
 	cmp	w1, w2
-	ble	.L2723
+	ble	.L2727
 	sub	w20, w2, w0
 	and	w20, w20, 65535
-.L2723:
+.L2727:
 	adrp	x0, .LANCHOR244
 	mov	w28, 0
 	add	x0, x0, :lo12:.LANCHOR244
 	str	x0, [x29, 144]
-.L2724:
+.L2728:
 	cmp	w20, w28, uxth
-	bls	.L2732
+	bls	.L2736
 	add	x1, x19, :lo12:.LANCHOR205
 	adrp	x0, .LANCHOR38
 	adrp	x23, .LANCHOR106
@@ -18754,23 +18781,23 @@ rk_ftl_garbage_collect:
 	mov	w6, 65535
 	add	w4, w4, w28
 	mov	w5, 56
-	b	.L2733
-.L2726:
+	b	.L2737
+.L2730:
 	ldrh	w3, [x1]
 	cmp	w3, w6
-	beq	.L2725
+	beq	.L2729
 	umaddl	x8, w22, w5, x0
 	add	w22, w22, 1
 	and	w22, w22, 65535
 	orr	w3, w4, w3, lsl 10
 	str	w3, [x8, 4]
-.L2725:
+.L2729:
 	add	w2, w2, 1
 	add	x1, x1, 2
 	and	w2, w2, 65535
-.L2733:
+.L2737:
 	cmp	w2, w7
-	bne	.L2726
+	bne	.L2730
 	add	x1, x19, :lo12:.LANCHOR205
 	adrp	x24, .LANCHOR102
 	add	x24, x24, :lo12:.LANCHOR102
@@ -18781,26 +18808,26 @@ rk_ftl_garbage_collect:
 	umull	x0, w22, w0
 	mov	x22, 0
 	str	x0, [x29, 136]
-.L2727:
+.L2731:
 	ldr	x0, [x29, 136]
 	cmp	x0, x22
-	bne	.L2731
+	bne	.L2735
 	add	w28, w28, 1
-	b	.L2724
-.L2731:
+	b	.L2728
+.L2735:
 	ldr	x0, [x23, #:lo12:.LANCHOR106]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	beq	.L2728
+	beq	.L2732
 	ldr	x27, [x1, 16]
 	mov	w0, 61589
 	ldrh	w1, [x27]
 	cmp	w1, w0
-	bne	.L2728
+	bne	.L2732
 	ldr	w4, [x27, 8]
 	cmn	w4, #1
-	bne	.L2729
+	bne	.L2733
 	mov	w2, 943
 	str	w4, [x29, 104]
 	adrp	x1, .LANCHOR246
@@ -18814,7 +18841,7 @@ rk_ftl_garbage_collect:
 	add	x0, x0, :lo12:.LC7
 	bl	printf
 	ldr	w4, [x29, 104]
-.L2729:
+.L2733:
 	mov	w2, 0
 	add	x1, x29, 168
 	mov	w0, w4
@@ -18825,7 +18852,7 @@ rk_ftl_garbage_collect:
 	and	w1, w1, 2147483647
 	ldr	w2, [x0, 4]
 	cmp	w1, w2
-	bne	.L2728
+	bne	.L2732
 	ldr	x1, [x29, 144]
 	adrp	x4, .LANCHOR181
 	ldr	x2, [x29, 144]
@@ -18869,26 +18896,26 @@ rk_ftl_garbage_collect:
 	bl	FtlGcBufAlloc
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbnz	w0, .L2730
+	cbnz	w0, .L2734
 	ldrb	w1, [x12, 7]
 	ldr	w0, [x24]
 	cmp	w1, w0
-	beq	.L2730
+	beq	.L2734
 	ldrh	w0, [x12, 4]
-	cbnz	w0, .L2728
-.L2730:
+	cbnz	w0, .L2732
+.L2734:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	w0, .L2728
+	cbz	w0, .L2732
 	add	x0, x19, :lo12:.LANCHOR205
 	mov	w1, -1
 	str	wzr, [x21, #:lo12:.LANCHOR171]
 	strh	w1, [x19, #:lo12:.LANCHOR205]
 	strh	wzr, [x0, 2]
-	b	.L2787
-.L2728:
-	add	x22, x22, 56
-	b	.L2727
+	b	.L2791
 .L2732:
+	add	x22, x22, 56
+	b	.L2731
+.L2736:
 	add	x1, x19, :lo12:.LANCHOR205
 	ldrh	w0, [x1, 2]
 	add	w20, w20, w0
@@ -18896,46 +18923,46 @@ rk_ftl_garbage_collect:
 	and	w20, w20, 65535
 	strh	w20, [x1, 2]
 	cmp	w0, w20
-	bhi	.L2734
+	bhi	.L2738
 	adrp	x0, .LANCHOR102
 	ldr	w0, [x0, #:lo12:.LANCHOR102]
-	cbz	w0, .L2735
+	cbz	w0, .L2739
 	bl	Ftl_gc_temp_data_write_back
-	cbz	w0, .L2735
+	cbz	w0, .L2739
 	str	wzr, [x21, #:lo12:.LANCHOR171]
-	b	.L2787
-.L2735:
+	b	.L2791
+.L2739:
 	adrp	x0, .LANCHOR244
 	ldrh	w0, [x0, #:lo12:.LANCHOR244]
-	cbnz	w0, .L2736
+	cbnz	w0, .L2740
 	adrp	x22, .LANCHOR83
 	ldrh	w1, [x19, #:lo12:.LANCHOR205]
 	ldr	x0, [x22, #:lo12:.LANCHOR83]
 	ldrh	w0, [x0, x1, lsl 1]
-	cbz	w0, .L2736
+	cbz	w0, .L2740
 	adrp	x23, .LANCHOR72
 	add	x24, x23, :lo12:.LANCHOR72
 	mov	w20, 0
-.L2737:
+.L2741:
 	ldr	w0, [x24]
 	cmp	w20, w0
-	bcs	.L2742
+	bcs	.L2746
 	mov	w2, 0
 	add	x1, x29, 172
 	mov	w0, w20
 	bl	log2phys
 	ldr	w0, [x29, 172]
 	cmn	w0, #1
-	beq	.L2738
+	beq	.L2742
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	ldrh	w1, [x19, #:lo12:.LANCHOR205]
 	cmp	w1, w0, uxth
-	bne	.L2738
-.L2742:
+	bne	.L2742
+.L2746:
 	ldr	w0, [x23, #:lo12:.LANCHOR72]
 	cmp	w20, w0
-	bcc	.L2736
+	bcc	.L2740
 	ldrh	w1, [x19, #:lo12:.LANCHOR205]
 	ldr	x0, [x22, #:lo12:.LANCHOR83]
 	strh	wzr, [x0, x1, lsl 1]
@@ -18944,30 +18971,30 @@ rk_ftl_garbage_collect:
 	bl	FtlCacheWriteBack
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L2736:
+.L2740:
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR205]
-.L2734:
+.L2738:
 	adrp	x0, .LANCHOR88
 	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w0, 2
-	bhi	.L2743
+	bhi	.L2747
 	ldr	x0, [x29, 120]
 	ldrh	w20, [x0, #:lo12:.LANCHOR52]
-	b	.L2744
-.L2738:
+	b	.L2748
+.L2742:
 	add	w20, w20, 1
-	b	.L2737
-.L2743:
+	b	.L2741
+.L2747:
 	str	wzr, [x21, #:lo12:.LANCHOR171]
 	add	w0, w0, 1
-	b	.L2686
-.L2745:
+	b	.L2690
+.L2749:
 	mov	w0, 0
 	ret
-.L2747:
+.L2751:
 	mov	w0, 0
-	b	.L2686
+	b	.L2690
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
 	.section	.text.FtlInit,"ax",@progbits
 	.align	2
@@ -18975,8 +19002,8 @@ rk_ftl_garbage_collect:
 	.type	FtlInit, %function
 FtlInit:
 	stp	x29, x30, [sp, -64]!
-	adrp	x1, .LC71
-	add	x1, x1, :lo12:.LC71
+	adrp	x1, .LC72
+	add	x1, x1, :lo12:.LC72
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR232
@@ -19000,29 +19027,29 @@ FtlInit:
 	ldrh	w0, [x0, #:lo12:.LANCHOR39]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	w0, .L2789
+	cbz	w0, .L2793
 	adrp	x1, .LANCHOR248
-	adrp	x0, .LC72
+	adrp	x0, .LC73
 	add	x1, x1, :lo12:.LANCHOR248
-	add	x0, x0, :lo12:.LC72
-.L2798:
+	add	x0, x0, :lo12:.LC73
+.L2802:
 	bl	printf
-.L2790:
+.L2794:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2789:
+.L2793:
 	bl	FtlSysBlkInit
-	cbz	w0, .L2791
+	cbz	w0, .L2795
 	adrp	x1, .LANCHOR248
-	adrp	x0, .LC73
+	adrp	x0, .LC74
 	add	x1, x1, :lo12:.LANCHOR248
-	add	x0, x0, :lo12:.LC73
-	b	.L2798
-.L2791:
+	add	x0, x0, :lo12:.LC74
+	b	.L2802
+.L2795:
 	mov	w1, 1
 	str	w1, [x19, #:lo12:.LANCHOR232]
 	bl	rk_ftl_garbage_collect
@@ -19030,34 +19057,34 @@ FtlInit:
 	mov	x22, x0
 	ldrh	w23, [x0, #:lo12:.LANCHOR88]
 	cmp	w23, 15
-	bhi	.L2790
+	bhi	.L2794
 	adrp	x20, .LANCHOR112
 	add	x20, x20, :lo12:.LANCHOR112
 	mov	w19, 0
 	adrp	x24, .LANCHOR205
 	mov	w21, 65535
-.L2795:
+.L2799:
 	ldrh	w0, [x24, #:lo12:.LANCHOR205]
 	cmp	w0, w21
-	bne	.L2793
+	bne	.L2797
 	ldrh	w0, [x20]
 	cmp	w0, w21
-	bne	.L2793
+	bne	.L2797
 	and	w0, w19, 7
 	bl	List_get_gc_head_node
 	bl	FtlGcRefreshBlock
-.L2793:
+.L2797:
 	mov	w1, 1
 	mov	w0, w1
 	bl	rk_ftl_garbage_collect
 	ldrh	w1, [x22, #:lo12:.LANCHOR88]
 	add	w0, w23, 2
 	cmp	w1, w0
-	bhi	.L2790
+	bhi	.L2794
 	add	w19, w19, 1
 	cmp	w19, 1024
-	bne	.L2795
-	b	.L2790
+	bne	.L2799
+	b	.L2794
 	.size	FtlInit, .-FtlInit
 	.section	.text.rk_ftl_init,"ax",@progbits
 	.align	2
@@ -19069,15 +19096,15 @@ rk_ftl_init:
 	str	x19, [sp, 16]
 	bl	FlashInit
 	mov	w19, w0
-	cbnz	w0, .L2800
+	cbnz	w0, .L2804
 	adrp	x0, .LANCHOR14
 	add	x0, x0, :lo12:.LANCHOR14
 	bl	FtlInit
-.L2800:
+.L2804:
 	bl	idb_init
 	mov	w1, w19
-	adrp	x0, .LC74
-	add	x0, x0, :lo12:.LC74
+	adrp	x0, .LC75
+	add	x0, x0, :lo12:.LC75
 	bl	printf
 	mov	w0, w19
 	ldr	x19, [sp, 16]
@@ -19091,7 +19118,7 @@ rk_ftl_init:
 ftl_fix_nand_power_lost_error:
 	adrp	x0, .LANCHOR15
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L2817
+	cbz	w0, .L2821
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
 	str	x25, [sp, 64]
@@ -19104,9 +19131,9 @@ ftl_fix_nand_power_lost_error:
 	mov	w1, w23
 	stp	x19, x20, [sp, 16]
 	ubfiz	x24, x23, 1, 16
-	adrp	x19, .LC75
+	adrp	x19, .LC76
 	ldrh	w2, [x0, x24]
-	add	x0, x19, :lo12:.LC75
+	add	x0, x19, :lo12:.LC76
 	bl	printf
 	adrp	x0, .LANCHOR91
 	add	x11, x0, :lo12:.LANCHOR91
@@ -19121,24 +19148,24 @@ ftl_fix_nand_power_lost_error:
 	mov	x0, x20
 	mov	w20, 4097
 	bl	allocate_new_data_superblock
-.L2804:
+.L2808:
 	subs	w20, w20, #1
-	beq	.L2808
+	beq	.L2812
 	mov	w1, 1
 	mov	w0, w1
 	bl	rk_ftl_garbage_collect
 	ldr	x0, [x21, #:lo12:.LANCHOR83]
 	ldrh	w0, [x0, x24]
-	cbnz	w0, .L2804
-.L2808:
+	cbnz	w0, .L2808
+.L2812:
 	ldr	x0, [x21, #:lo12:.LANCHOR83]
 	mov	w1, w23
 	ldrh	w2, [x0, x24]
-	add	x0, x19, :lo12:.LC75
+	add	x0, x19, :lo12:.LC76
 	bl	printf
 	ldr	x0, [x21, #:lo12:.LANCHOR83]
 	ldrh	w19, [x0, x24]
-	cbnz	w19, .L2806
+	cbnz	w19, .L2810
 	add	x20, x29, 128
 	adrp	x22, .LANCHOR77
 	strh	w23, [x20, -48]!
@@ -19151,14 +19178,14 @@ ftl_fix_nand_power_lost_error:
 	ldrh	w3, [x0, #:lo12:.LANCHOR38]
 	mov	w6, 56
 	mov	w0, 0
-.L2809:
+.L2813:
 	cmp	w0, w3
-	bne	.L2811
+	bne	.L2815
 	ldr	x0, [x21, #:lo12:.LANCHOR83]
 	mov	w1, w23
 	ldrh	w2, [x0, x24]
-	adrp	x0, .LC76
-	add	x0, x0, :lo12:.LC76
+	adrp	x0, .LC77
+	add	x0, x0, :lo12:.LC77
 	bl	printf
 	ldr	x0, [x22, #:lo12:.LANCHOR77]
 	mov	w2, w19
@@ -19168,7 +19195,7 @@ ftl_fix_nand_power_lost_error:
 	mov	w2, w19
 	mov	w1, 1
 	bl	FlashEraseBlocks
-.L2806:
+.L2810:
 	mov	w0, -1
 	strh	w0, [x25, #:lo12:.LANCHOR237]
 	ldp	x19, x20, [sp, 16]
@@ -19177,22 +19204,22 @@ ftl_fix_nand_power_lost_error:
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2811:
+.L2815:
 	ldrh	w1, [x20]
 	cmp	w1, w5
-	beq	.L2810
+	beq	.L2814
 	umaddl	x2, w19, w6, x4
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	lsl	w1, w1, 10
 	stp	xzr, xzr, [x2, 8]
 	str	w1, [x2, 4]
-.L2810:
+.L2814:
 	add	w0, w0, 1
 	add	x20, x20, 2
 	and	w0, w0, 65535
-	b	.L2809
-.L2817:
+	b	.L2813
+.L2821:
 	ret
 	.size	ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error
 	.section	.text.ftl_read,"ax",@progbits
@@ -19213,13 +19240,13 @@ ftl_read:
 	mov	w27, w2
 	stp	x21, x22, [sp, 48]
 	stp	x25, x26, [sp, 80]
-	bne	.L2821
+	bne	.L2825
 	mov	x2, x3
 	mov	w1, w27
 	add	w0, w19, 256
 	bl	FtlVendorPartRead
 	mov	w21, w0
-.L2820:
+.L2824:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
@@ -19229,18 +19256,18 @@ ftl_read:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 208
 	ret
-.L2821:
+.L2825:
 	add	w0, w1, w2
 	str	w0, [x29, 148]
 	adrp	x0, .LANCHOR68
 	add	w1, w1, w2
 	ldr	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w1, w0
-	bhi	.L2844
+	bhi	.L2848
 	adrp	x0, .LANCHOR232
 	ldr	w21, [x0, #:lo12:.LANCHOR232]
 	cmn	w21, #1
-	beq	.L2820
+	beq	.L2824
 	adrp	x22, .LANCHOR55
 	bl	FtlCacheWriteBack
 	adrp	x25, .LANCHOR138
@@ -19266,42 +19293,42 @@ ftl_read:
 	ldr	w2, [x29, 172]
 	add	w0, w0, w2
 	str	w0, [x1, #:lo12:.LANCHOR166]
-.L2823:
+.L2827:
 	ldr	w0, [x29, 172]
-	cbnz	w0, .L2843
+	cbnz	w0, .L2847
 	adrp	x0, .LANCHOR116
 	ldrh	w0, [x0, #:lo12:.LANCHOR116]
-	cbz	w0, .L2820
+	cbz	w0, .L2824
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-	b	.L2820
-.L2843:
+	b	.L2824
+.L2847:
 	add	x1, x29, 188
 	mov	w2, 0
 	mov	w0, w20
 	bl	log2phys
 	ldr	w1, [x29, 188]
 	cmn	w1, #1
-	bne	.L2824
+	bne	.L2828
 	add	x3, x22, :lo12:.LANCHOR55
 	mov	w28, 0
-.L2825:
+.L2829:
 	ldrh	w0, [x3]
 	cmp	w28, w0
-	bcc	.L2827
-.L2828:
+	bcc	.L2831
+.L2832:
 	ldr	w0, [x29, 172]
 	add	w20, w20, 1
 	subs	w0, w0, #1
 	str	w0, [x29, 172]
-	beq	.L2832
+	beq	.L2836
 	adrp	x0, .LANCHOR38
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w24, w0, lsl 2
-	bne	.L2823
-.L2832:
-	cbz	w24, .L2823
+	bne	.L2827
+.L2836:
+	cbz	w24, .L2827
 	ldr	x0, [x26, #:lo12:.LANCHOR180]
 	mov	w1, w24
 	mov	w2, 0
@@ -19320,35 +19347,35 @@ ftl_read:
 	umull	x0, w24, w0
 	mov	x24, 0
 	str	x0, [x29, 120]
-	adrp	x0, .LC64
-	add	x0, x0, :lo12:.LC64
+	adrp	x0, .LC65
+	add	x0, x0, :lo12:.LC65
 	str	x0, [x29, 112]
-.L2842:
+.L2846:
 	ldr	x0, [x26, #:lo12:.LANCHOR180]
 	ldr	w2, [x29, 168]
 	add	x0, x0, x24
 	ldr	w1, [x0, 24]
 	cmp	w2, w1
-	bne	.L2834
+	bne	.L2838
 	ldr	x1, [x0, 8]
 	adrp	x0, .LANCHOR186
 	ldr	x0, [x0, #:lo12:.LANCHOR186]
 	cmp	x1, x0
-	bne	.L2835
+	bne	.L2839
 	ldr	x0, [x29, 136]
 	ldr	w2, [x29, 144]
 	add	x1, x1, x0
 	mov	x0, x23
-.L2859:
+.L2863:
 	bl	ftl_memcpy
-.L2835:
+.L2839:
 	ldr	x0, [x26, #:lo12:.LANCHOR180]
 	add	x0, x0, x24
 	ldr	x2, [x0, 16]
 	ldr	w1, [x0, 24]
 	ldr	w3, [x2, 8]
 	cmp	w1, w3
-	beq	.L2836
+	beq	.L2840
 	ldr	w3, [x25, 72]
 	add	w3, w3, 1
 	str	w3, [x25, 72]
@@ -19362,30 +19389,30 @@ ftl_read:
 	ldr	w2, [x0, 4]
 	ldr	x0, [x29, 112]
 	bl	printf
-.L2836:
+.L2840:
 	ldr	x0, [x26, #:lo12:.LANCHOR180]
 	add	x1, x0, x24
 	ldr	w0, [x0, x24]
 	cmn	w0, #1
-	bne	.L2837
+	bne	.L2841
 	ldr	w1, [x25, 72]
 	mov	w21, w0
 	add	w1, w1, 1
 	str	w1, [x25, 72]
-.L2838:
+.L2842:
 	ldr	x0, [x29, 120]
 	add	x24, x24, 56
 	cmp	x0, x24
-	bne	.L2842
+	bne	.L2846
 	mov	w24, 0
-	b	.L2823
-.L2827:
+	b	.L2827
+.L2831:
 	madd	w0, w20, w0, w28
 	cmp	w19, w0
-	bhi	.L2826
+	bhi	.L2830
 	ldr	w1, [x29, 148]
 	cmp	w1, w0
-	bls	.L2826
+	bls	.L2830
 	sub	w0, w0, w19
 	str	x3, [x29, 136]
 	lsl	w0, w0, 9
@@ -19394,17 +19421,17 @@ ftl_read:
 	add	x0, x23, x0
 	bl	ftl_memset
 	ldr	x3, [x29, 136]
-.L2826:
+.L2830:
 	add	w28, w28, 1
-	b	.L2825
-.L2824:
+	b	.L2829
+.L2828:
 	ldr	x0, [x26, #:lo12:.LANCHOR180]
 	mov	w2, 56
 	umaddl	x0, w24, w2, x0
 	str	w1, [x0, 4]
 	ldr	w1, [x29, 168]
 	cmp	w20, w1
-	bne	.L2829
+	bne	.L2833
 	adrp	x1, .LANCHOR186
 	ldr	x1, [x1, #:lo12:.LANCHOR186]
 	str	x1, [x0, 8]
@@ -19417,9 +19444,9 @@ ftl_read:
 	csel	w2, w27, w2, ls
 	str	w2, [x29, 160]
 	cmp	w1, w2
-	bne	.L2830
+	bne	.L2834
 	str	x23, [x0, 8]
-.L2830:
+.L2834:
 	adrp	x1, .LANCHOR58
 	adrp	x2, .LANCHOR189
 	str	w20, [x0, 24]
@@ -19430,11 +19457,11 @@ ftl_read:
 	and	x1, x1, 4294967292
 	add	x1, x2, x1
 	str	x1, [x0, 16]
-	b	.L2828
-.L2829:
+	b	.L2832
+.L2833:
 	ldr	w1, [x29, 164]
 	cmp	w20, w1
-	bne	.L2831
+	bne	.L2835
 	ldrh	w2, [x22, #:lo12:.LANCHOR55]
 	adrp	x1, .LANCHOR187
 	ldr	w3, [x29, 148]
@@ -19444,35 +19471,35 @@ ftl_read:
 	sub	w3, w3, w1
 	str	w3, [x29, 156]
 	cmp	w2, w3
-	bne	.L2830
-.L2858:
+	bne	.L2834
+.L2862:
 	sub	w1, w1, w19
 	lsl	w1, w1, 9
 	add	x1, x23, x1
 	str	x1, [x0, 8]
-	b	.L2830
-.L2831:
+	b	.L2834
+.L2835:
 	ldrh	w1, [x22, #:lo12:.LANCHOR55]
 	mul	w1, w1, w20
-	b	.L2858
-.L2834:
+	b	.L2862
+.L2838:
 	ldr	w2, [x29, 164]
 	cmp	w2, w1
-	bne	.L2835
+	bne	.L2839
 	ldr	x1, [x0, 8]
 	ldr	x0, [x28, #:lo12:.LANCHOR187]
 	cmp	x1, x0
-	bne	.L2835
+	bne	.L2839
 	ldrh	w0, [x22, #:lo12:.LANCHOR55]
 	mul	w0, w0, w2
 	ldr	w2, [x29, 132]
 	sub	w0, w0, w19
 	lsl	w0, w0, 9
 	add	x0, x23, x0
-	b	.L2859
-.L2837:
+	b	.L2863
+.L2841:
 	cmp	w0, 256
-	bne	.L2838
+	bne	.L2842
 	ldr	w0, [x1, 4]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
@@ -19481,13 +19508,13 @@ ftl_read:
 	bl	FtlGcRefreshBlock
 	mov	w2, 2049
 	adrp	x3, .LANCHOR205
-.L2840:
+.L2844:
 	subs	w2, w2, #1
-	bne	.L2839
-.L2841:
+	bne	.L2843
+.L2845:
 	bl	FtlSysFlush
-	b	.L2838
-.L2839:
+	b	.L2842
+.L2843:
 	mov	w1, 1
 	str	x3, [x29, 96]
 	mov	w0, w1
@@ -19498,11 +19525,11 @@ ftl_read:
 	ldr	w2, [x29, 108]
 	ldrh	w0, [x3, #:lo12:.LANCHOR205]
 	cmp	w0, w1
-	beq	.L2840
-	b	.L2841
-.L2844:
+	beq	.L2844
+	b	.L2845
+.L2848:
 	mov	w21, -1
-	b	.L2820
+	b	.L2824
 	.size	ftl_read, .-ftl_read
 	.section	.text.FtlWrite,"ax",@progbits
 	.align	2
@@ -19519,17 +19546,17 @@ FtlWrite:
 	ldr	w1, [x1, #:lo12:.LANCHOR76]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w1, .L2892
+	cbnz	w1, .L2896
 	and	w0, w0, 255
 	mov	w23, w2
 	mov	x24, x3
 	cmp	w0, 16
-	bne	.L2862
+	bne	.L2866
 	mov	x2, x3
 	mov	w1, w23
 	add	w0, w21, 256
 	bl	FtlVendorPartWrite
-.L2860:
+.L2864:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -19537,16 +19564,16 @@ FtlWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 240
 	ret
-.L2862:
+.L2866:
 	adrp	x0, .LANCHOR68
 	add	w2, w21, w2
 	ldr	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w2, w0
-	bhi	.L2893
+	bhi	.L2897
 	adrp	x0, .LANCHOR232
 	ldr	w0, [x0, #:lo12:.LANCHOR232]
 	cmn	w0, #1
-	beq	.L2860
+	beq	.L2864
 	adrp	x0, .LANCHOR249
 	adrp	x26, .LANCHOR55
 	mov	w1, 2048
@@ -19565,25 +19592,25 @@ FtlWrite:
 	str	w0, [x2, #:lo12:.LANCHOR162]
 	adrp	x0, .LANCHOR132
 	ldr	x2, [x0, #:lo12:.LANCHOR132]
-	cbz	x2, .L2864
+	cbz	x2, .L2868
 	ldr	w0, [x2, 24]
 	cmp	w20, w0
-	beq	.L2865
+	beq	.L2869
 	bl	FtlCacheWriteBack
-.L2864:
+.L2868:
 	adrp	x0, .LANCHOR91
 	mov	w19, w20
 	add	x22, x0, :lo12:.LANCHOR91
-.L2866:
-	cbnz	w25, .L2891
+.L2870:
+	cbnz	w25, .L2895
 	ldr	w0, [x29, 152]
 	sub	w1, w0, w20
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-.L2892:
+.L2896:
 	mov	w0, 0
-	b	.L2860
-.L2865:
+	b	.L2864
+.L2869:
 	adrp	x3, .LANCHOR164
 	ldr	w0, [x3, #:lo12:.LANCHOR164]
 	add	w0, w0, 1
@@ -19599,15 +19626,15 @@ FtlWrite:
 	mov	x1, x24
 	mov	w2, w22
 	bl	ftl_memcpy
-	cbz	w27, .L2892
+	cbz	w27, .L2896
 	sub	w23, w23, w19
 	add	w21, w21, w19
 	add	x24, x24, x22
 	add	w20, w20, 1
 	bl	FtlCacheWriteBack
 	mov	w25, w27
-	b	.L2864
-.L2891:
+	b	.L2868
+.L2895:
 	adrp	x0, .LANCHOR91
 	add	x0, x0, :lo12:.LANCHOR91
 	adrp	x1, .LANCHOR38
@@ -19615,7 +19642,7 @@ FtlWrite:
 	ldrb	w2, [x0, 6]
 	ldrh	w0, [x1, #:lo12:.LANCHOR38]
 	cmp	w2, w0
-	bcc	.L2867
+	bcc	.L2871
 	mov	w2, 1673
 	adrp	x1, .LANCHOR250
 	adrp	x0, .LC5
@@ -19627,13 +19654,13 @@ FtlWrite:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2867:
+.L2871:
 	ldrh	w0, [x22, 4]
-	cbnz	w0, .L2868
+	cbnz	w0, .L2872
 	bl	FtlCacheWriteBack
 	mov	x0, x22
 	bl	allocate_new_data_superblock
-.L2868:
+.L2872:
 	ldrb	w0, [x22, 7]
 	ldrh	w1, [x22, 4]
 	lsl	w0, w0, 2
@@ -19646,7 +19673,7 @@ FtlWrite:
 	ldr	x0, [x29, 120]
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w1, w0
-	bcc	.L2869
+	bcc	.L2873
 	mov	w2, 1706
 	adrp	x1, .LANCHOR250
 	adrp	x0, .LC5
@@ -19658,7 +19685,7 @@ FtlWrite:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2869:
+.L2873:
 	adrp	x0, .LANCHOR58
 	add	x0, x0, :lo12:.LANCHOR58
 	str	xzr, [x29, 168]
@@ -19666,21 +19693,21 @@ FtlWrite:
 	adrp	x0, .LANCHOR57
 	add	x0, x0, :lo12:.LANCHOR57
 	str	x0, [x29, 104]
-.L2870:
+.L2874:
 	ldr	w1, [x29, 144]
 	adrp	x28, .LANCHOR182
 	ldr	w27, [x29, 168]
 	cmp	w27, w1
-	bcc	.L2889
+	bcc	.L2893
 	mov	x27, x1
-.L2871:
+.L2875:
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
 	mov	x3, x22
 	mov	w2, 0
 	mov	w1, w27
 	bl	FtlProgPages
 	cmp	w25, w27
-	bcs	.L2890
+	bcs	.L2894
 	mov	w2, 1795
 	adrp	x1, .LANCHOR250
 	adrp	x0, .LC5
@@ -19692,12 +19719,12 @@ FtlWrite:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2890:
+.L2894:
 	sub	w25, w25, w27
-	b	.L2866
-.L2889:
+	b	.L2870
+.L2893:
 	ldrh	w0, [x22, 4]
-	cbz	w0, .L2871
+	cbz	w0, .L2875
 	add	x1, x29, 180
 	mov	w2, 0
 	mov	w0, w19
@@ -19728,9 +19755,9 @@ FtlWrite:
 	ldr	w0, [x29, 152]
 	cmp	w19, w20
 	ccmp	w0, w19, 4, ne
-	bne	.L2872
+	bne	.L2876
 	cmp	w19, w20
-	bne	.L2873
+	bne	.L2877
 	ldr	x0, [x29, 160]
 	ldrh	w2, [x0, #:lo12:.LANCHOR55]
 	udiv	w0, w21, w2
@@ -19740,23 +19767,23 @@ FtlWrite:
 	cmp	w2, w23
 	csel	w0, w2, w23, ls
 	str	w0, [x29, 156]
-.L2874:
+.L2878:
 	ldr	x0, [x29, 160]
 	ldr	w1, [x29, 156]
 	ldrh	w0, [x0, #:lo12:.LANCHOR55]
 	cmp	w0, w1
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
-	bne	.L2875
+	bne	.L2879
 	add	x3, x0, x26
 	cmp	w19, w20
-	bne	.L2876
+	bne	.L2880
 	str	x24, [x3, 8]
-.L2877:
+.L2881:
 	ldr	x0, [x29, 120]
 	ldrb	w1, [x22, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w1, w0
-	bcc	.L2886
+	bcc	.L2890
 	mov	w2, 1780
 	adrp	x1, .LANCHOR250
 	adrp	x0, .LC5
@@ -19768,7 +19795,7 @@ FtlWrite:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2886:
+.L2890:
 	ldp	x1, x2, [x29, 128]
 	mov	w0, -3947
 	strh	w0, [x1, x2]
@@ -19787,8 +19814,8 @@ FtlWrite:
 	ldr	x0, [x29, 168]
 	add	x0, x0, 1
 	str	x0, [x29, 168]
-	b	.L2870
-.L2873:
+	b	.L2874
+.L2877:
 	ldr	x0, [x29, 160]
 	add	w2, w21, w23
 	str	wzr, [x29, 148]
@@ -19796,27 +19823,27 @@ FtlWrite:
 	msub	w2, w19, w0, w2
 	and	w0, w2, 65535
 	str	w0, [x29, 156]
-	b	.L2874
-.L2876:
+	b	.L2878
+.L2880:
 	ldr	w0, [x29, 156]
-.L2904:
+.L2908:
 	mul	w0, w0, w19
 	sub	w0, w0, w21
 	lsl	w0, w0, 9
 	add	x0, x24, x0
 	str	x0, [x3, 8]
-	b	.L2877
-.L2875:
+	b	.L2881
+.L2879:
 	add	x0, x0, x26
 	cmp	w19, w20
-	bne	.L2878
+	bne	.L2882
 	adrp	x1, .LANCHOR186
 	ldr	x1, [x1, #:lo12:.LANCHOR186]
-.L2903:
+.L2907:
 	str	x1, [x0, 8]
 	ldr	w0, [x29, 180]
 	cmn	w0, #1
-	beq	.L2880
+	beq	.L2884
 	str	w0, [x29, 188]
 	mov	w2, 0
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
@@ -19829,17 +19856,17 @@ FtlWrite:
 	bl	FlashReadPages
 	ldr	w0, [x29, 184]
 	cmn	w0, #1
-	bne	.L2881
+	bne	.L2885
 	adrp	x0, .LANCHOR138
 	add	x0, x0, :lo12:.LANCHOR138
 	ldr	w1, [x0, 72]
 	add	w1, w1, 1
 	str	w1, [x0, 72]
-.L2884:
+.L2888:
 	ldr	w0, [x29, 156]
 	cmp	w19, w20
 	lsl	w2, w0, 9
-	bne	.L2885
+	bne	.L2889
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
 	mov	x1, x24
 	add	x3, x0, x26
@@ -19847,30 +19874,30 @@ FtlWrite:
 	ldr	x3, [x3, 8]
 	lsl	w0, w0, 9
 	add	x0, x3, x0
-.L2905:
+.L2909:
 	bl	ftl_memcpy
-	b	.L2877
-.L2878:
+	b	.L2881
+.L2882:
 	adrp	x1, .LANCHOR187
 	ldr	x1, [x1, #:lo12:.LANCHOR187]
-	b	.L2903
-.L2881:
+	b	.L2907
+.L2885:
 	ldr	w1, [x27, 8]
 	cmp	w19, w1
-	beq	.L2883
+	beq	.L2887
 	adrp	x0, .LANCHOR138
 	add	x0, x0, :lo12:.LANCHOR138
 	ldr	w2, [x0, 72]
 	add	w2, w2, 1
 	str	w2, [x0, 72]
-	adrp	x0, .LC77
+	adrp	x0, .LC78
 	mov	w2, w19
-	add	x0, x0, :lo12:.LC77
+	add	x0, x0, :lo12:.LC78
 	bl	printf
-.L2883:
+.L2887:
 	ldr	w0, [x27, 8]
 	cmp	w19, w0
-	beq	.L2884
+	beq	.L2888
 	mov	w2, 1759
 	adrp	x1, .LANCHOR250
 	adrp	x0, .LC5
@@ -19882,8 +19909,8 @@ FtlWrite:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-	b	.L2884
-.L2880:
+	b	.L2888
+.L2884:
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
 	ldr	x1, [x29, 104]
 	add	x0, x0, x26
@@ -19891,8 +19918,8 @@ FtlWrite:
 	mov	w1, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	b	.L2884
-.L2885:
+	b	.L2888
+.L2889:
 	ldr	x0, [x29, 160]
 	ldrh	w1, [x0, #:lo12:.LANCHOR55]
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
@@ -19902,16 +19929,16 @@ FtlWrite:
 	ldr	x0, [x3, 8]
 	lsl	w1, w1, 9
 	add	x1, x24, x1
-	b	.L2905
-.L2872:
+	b	.L2909
+.L2876:
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
 	add	x3, x0, x26
 	ldr	x0, [x29, 160]
 	ldrh	w0, [x0, #:lo12:.LANCHOR55]
-	b	.L2904
-.L2893:
+	b	.L2908
+.L2897:
 	mov	w0, -1
-	b	.L2860
+	b	.L2864
 	.size	FtlWrite, .-FtlWrite
 	.section	.text.ftl_vendor_write,"ax",@progbits
 	.align	2
@@ -19970,12 +19997,12 @@ ftl_write:
 	mov	x20, x3
 	mov	w22, w1
 	ands	w21, w0, 255
-	bne	.L2911
+	bne	.L2915
 	mov	w3, w2
 	mov	w0, 0
 	mov	x2, x20
 	bl	idb_write_data
-.L2911:
+.L2915:
 	mov	x3, x20
 	mov	w2, w19
 	mov	w1, w22
@@ -20004,22 +20031,22 @@ FtlDumpSysBlock:
 	stp	x23, x24, [sp, 64]
 	lsl	w26, w25, 10
 	stp	x19, x20, [sp, 32]
-	adrp	x23, .LC78
+	adrp	x23, .LC79
 	str	x27, [sp, 96]
-	adrp	x24, .LC79
+	adrp	x24, .LC80
 	str	x2, [x1, 8]
 	adrp	x2, .LANCHOR188
 	add	x22, x22, :lo12:.LANCHOR53
-	add	x23, x23, :lo12:.LC78
+	add	x23, x23, :lo12:.LC79
 	ldr	x2, [x2, #:lo12:.LANCHOR188]
-	add	x24, x24, :lo12:.LC79
+	add	x24, x24, :lo12:.LC80
 	mov	x27, x0
 	mov	w19, 0
 	str	x2, [x1, 16]
-.L2914:
+.L2918:
 	ldrh	w0, [x22]
 	cmp	w19, w0
-	blt	.L2916
+	blt	.L2920
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -20028,7 +20055,7 @@ FtlDumpSysBlock:
 	ldr	x27, [sp, 96]
 	add	sp, sp, 112
 	ret
-.L2916:
+.L2920:
 	add	x20, x21, :lo12:.LANCHOR203
 	orr	w0, w19, w26
 	mov	w2, 1
@@ -20049,16 +20076,16 @@ FtlDumpSysBlock:
 	ldr	x0, [x20, 16]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L2915
+	beq	.L2919
 	ldr	x1, [x27, #:lo12:.LANCHOR183]
 	mov	w3, 768
 	mov	w2, 4
 	mov	x0, x24
 	bl	rknand_print_hex
-.L2915:
+.L2919:
 	add	w19, w19, 1
 	sxth	w19, w19
-	b	.L2914
+	b	.L2918
 	.size	FtlDumpSysBlock, .-FtlDumpSysBlock
 	.section	.text.dump_map_info,"ax",@progbits
 	.align	2
@@ -20079,33 +20106,33 @@ dump_map_info:
 	add	x22, x22, :lo12:.LANCHOR41
 	stp	x25, x26, [sp, 80]
 	adrp	x24, .LANCHOR38
-.L2922:
+.L2926:
 	ldrh	w0, [x22]
 	cmp	w0, w20
-	bhi	.L2928
+	bhi	.L2932
 	adrp	x25, .LANCHOR128
 	adrp	x19, .LANCHOR203
 	add	x25, x25, :lo12:.LANCHOR128
 	add	x19, x19, :lo12:.LANCHOR203
 	mov	w26, 0
-.L2929:
+.L2933:
 	ldrh	w0, [x25]
 	cmp	w26, w0
-	bge	.L2932
+	bge	.L2936
 	adrp	x21, .LANCHOR53
-	adrp	x0, .LC48
+	adrp	x0, .LC49
 	sbfiz	x23, x26, 1, 32
 	mov	w20, 0
 	add	x21, x21, :lo12:.LANCHOR53
-	add	x24, x0, :lo12:.LC48
-	b	.L2933
-.L2924:
+	add	x24, x0, :lo12:.LC49
+	b	.L2937
+.L2928:
 	ldrb	w0, [x23, x5]
 	mov	w1, w20
 	bl	V2P_block
 	and	w4, w0, 65535
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L2923
+	cbnz	w0, .L2927
 	umaddl	x1, w19, w7, x6
 	lsl	w4, w4, 10
 	mul	w0, w19, w8
@@ -20115,27 +20142,27 @@ dump_map_info:
 	str	w4, [x1, 4]
 	add	x0, x10, x0, sxtw 2
 	stp	x11, x0, [x1, 8]
-.L2923:
+.L2927:
 	add	x5, x5, 1
-.L2930:
+.L2934:
 	cmp	w12, w5, uxth
-	bhi	.L2924
-	cbnz	w19, .L2925
-.L2927:
+	bhi	.L2928
+	cbnz	w19, .L2929
+.L2931:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2922
-.L2925:
+	b	.L2926
+.L2929:
 	mov	w1, w19
 	mov	w2, 1
 	mov	x0, x6
 	bl	FlashReadPages
 	mov	w0, 56
-	adrp	x26, .LC80
-	add	x26, x26, :lo12:.LC80
+	adrp	x26, .LC81
+	add	x26, x26, :lo12:.LC81
 	mov	x25, 0
 	umull	x19, w19, w0
-.L2926:
+.L2930:
 	ldr	x0, [x21, #:lo12:.LANCHOR180]
 	add	x0, x0, x25
 	add	x25, x25, 56
@@ -20151,9 +20178,9 @@ dump_map_info:
 	ubfx	x1, x2, 10, 16
 	bl	printf
 	cmp	x25, x19
-	bne	.L2926
-	b	.L2927
-.L2928:
+	bne	.L2930
+	b	.L2931
+.L2932:
 	adrp	x0, .LANCHOR104
 	adrp	x21, .LANCHOR180
 	ldrh	w12, [x24, #:lo12:.LANCHOR38]
@@ -20166,8 +20193,8 @@ dump_map_info:
 	adrp	x0, .LANCHOR58
 	mov	w7, 56
 	ldrh	w8, [x0, #:lo12:.LANCHOR58]
-	b	.L2930
-.L2931:
+	b	.L2934
+.L2935:
 	adrp	x22, .LANCHOR129
 	mov	w2, 1
 	mov	w1, w2
@@ -20191,38 +20218,38 @@ dump_map_info:
 	mov	x0, x24
 	ldp	w2, w3, [x19]
 	bl	printf
-.L2933:
+.L2937:
 	ldrh	w0, [x21]
 	cmp	w20, w0
-	blt	.L2931
+	blt	.L2935
 	add	w0, w26, 1
 	sxth	w26, w0
-	b	.L2929
-.L2932:
+	b	.L2933
+.L2936:
 	adrp	x0, .LANCHOR64
 	mov	w2, 2
 	adrp	x19, .LANCHOR66
 	ldr	w3, [x0, #:lo12:.LANCHOR64]
 	adrp	x0, .LANCHOR129
 	ldr	x1, [x0, #:lo12:.LANCHOR129]
-	adrp	x0, .LC81
-	add	x0, x0, :lo12:.LC81
+	adrp	x0, .LC82
+	add	x0, x0, :lo12:.LC82
 	bl	rknand_print_hex
 	adrp	x0, .LANCHOR131
 	ldrh	w3, [x19, #:lo12:.LANCHOR66]
 	mov	w2, 4
 	ldr	x1, [x0, #:lo12:.LANCHOR131]
-	adrp	x0, .LC82
-	add	x0, x0, :lo12:.LC82
+	adrp	x0, .LC83
+	add	x0, x0, :lo12:.LC83
 	bl	rknand_print_hex
 	adrp	x0, .LANCHOR195
 	ldrh	w3, [x19, #:lo12:.LANCHOR66]
 	ldp	x21, x22, [sp, 48]
 	mov	w2, 4
 	ldr	x1, [x0, #:lo12:.LANCHOR195]
-	adrp	x0, .LC83
+	adrp	x0, .LC84
 	ldp	x19, x20, [sp, 32]
-	add	x0, x0, :lo12:.LC83
+	add	x0, x0, :lo12:.LC84
 	ldp	x23, x24, [sp, 64]
 	ldp	x25, x26, [sp, 80]
 	ldp	x29, x30, [sp, 16]
@@ -24663,7 +24690,7 @@ refValueDefault:
 .LC32:
 	.string	"prog read d error: = %x %x %x\n"
 	.section	.rodata.FlashReadFacBbtData.str1.1,"aMS",@progbits,1
-.LC55:
+.LC56:
 	.string	"BBT:"
 	.section	.rodata.FlashReadIdbDataRaw.str1.1,"aMS",@progbits,1
 .LC14:
@@ -24692,23 +24719,23 @@ refValueDefault:
 .LC35:
 	.string	"FtlBbmTblFlush error = %x error count = %d\n"
 	.section	.rodata.FtlCheckVpc.str1.1,"aMS",@progbits,1
-.LC60:
-	.string	"FtlCheckVpc2 %x = %x  %x\n"
 .LC61:
+	.string	"FtlCheckVpc2 %x = %x  %x\n"
+.LC62:
 	.string	"free blk vpc error %x = %x  %x\n"
 	.section	.rodata.FtlDumpBlockInfo.str1.1,"aMS",@progbits,1
-.LC45:
-	.string	"...%s enter...\n"
 .LC46:
-	.string	"superBlkID = %x vpc=%x\n"
+	.string	"...%s enter...\n"
 .LC47:
-	.string	"flashmode = %x pagenum = %x %x\n"
+	.string	"superBlkID = %x vpc=%x\n"
 .LC48:
+	.string	"flashmode = %x pagenum = %x %x\n"
+.LC49:
 	.string	"id = %x,%x addr= %x,spare= %x %x %x %x data=%x %x\n"
 	.section	.rodata.FtlDumpSysBlock.str1.1,"aMS",@progbits,1
-.LC78:
-	.string	"id = %x,%x addr= %x,spare= %x %x %x %x data = %x\n"
 .LC79:
+	.string	"id = %x,%x addr= %x,spare= %x %x %x %x data = %x\n"
+.LC80:
 	.string	":"
 	.section	.rodata.FtlFreeSysBlkQueueOut.str1.1,"aMS",@progbits,1
 .LC3:
@@ -24716,44 +24743,47 @@ refValueDefault:
 .LC4:
 	.string	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\n"
 	.section	.rodata.FtlGcFreeTempBlock.str1.1,"aMS",@progbits,1
-.LC70:
+.LC71:
 	.string	"GC des block %x done\n"
 	.section	.rodata.FtlGcScanTempBlk.str1.1,"aMS",@progbits,1
-.LC68:
-	.string	"FtlGcScanTempBlk Error ID %x %x!!!!!!! \n"
 .LC69:
+	.string	"FtlGcScanTempBlk Error ID %x %x!!!!!!! \n"
+.LC70:
 	.string	"FtlGcScanTempBlkError ID %x %x!!!!!!!\n"
 	.section	.rodata.FtlInit.str1.1,"aMS",@progbits,1
-.LC71:
-	.string	"FTL version: 5.0.56 20190508"
 .LC72:
-	.string	"...%s: no bad block mapping table, format device\n"
+	.string	"FTL version: 5.0.57 20190828"
 .LC73:
+	.string	"...%s: no bad block mapping table, format device\n"
+.LC74:
 	.string	"...%s FtlSysBlkInit error ,format device!\n"
 	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",@progbits,1
 .LC43:
 	.string	"no ect"
+	.section	.rodata.FtlLoadSysInfo.str1.1,"aMS",@progbits,1
+.LC45:
+	.string	"id = %x,%x addr= %x,spare= %x %x %x %x data= %x\n"
 	.section	.rodata.FtlMapWritePage.str1.1,"aMS",@progbits,1
 .LC40:
 	.string	"FtlMapWritePage error = %x\n"
 .LC41:
 	.string	"FtlMapWritePage error = %x error count = %d\n"
 	.section	.rodata.FtlProgPages.str1.1,"aMS",@progbits,1
-.LC59:
+.LC60:
 	.string	"Ftlwrite decrement_vpc_count %x = %d\n"
 	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",@progbits,1
-.LC65:
-	.string	"RSB refresh addr %x\n"
 .LC66:
-	.string	"spuer block %x vpn is 0\n "
+	.string	"RSB refresh addr %x\n"
 .LC67:
+	.string	"spuer block %x vpn is 0\n "
+.LC68:
 	.string	"g_recovery_ppa %x ver %x\n "
 	.section	.rodata.FtlScanAllBlock.str1.1,"aMS",@progbits,1
-.LC49:
-	.string	"blk = %x vpc=%x mode = %x\n"
 .LC50:
-	.string	"mlc id = %x,%x addr= %x,spare= %x %x %x %x data=%x %x\n"
+	.string	"blk = %x vpc=%x mode = %x\n"
 .LC51:
+	.string	"mlc id = %x,%x addr= %x,spare= %x %x %x %x data=%x %x\n"
+.LC52:
 	.string	"slc id = %x,%x addr= %x,spare= %x %x %x %x data=%x %x\n"
 	.section	.rodata.FtlVendorPartRead.str1.1,"aMS",@progbits,1
 .LC42:
@@ -24762,17 +24792,17 @@ refValueDefault:
 .LC38:
 	.string	"FtlVpcTblFlush error = %x error count = %d\n"
 	.section	.rodata.FtlWrite.str1.1,"aMS",@progbits,1
-.LC77:
+.LC78:
 	.string	"FtlWrite: lpa error:%x %x\n"
 	.section	.rodata.Ftl_load_ext_data.str1.1,"aMS",@progbits,1
 .LC44:
 	.string	"slc mode"
 	.section	.rodata.Ftlscanalldata.str1.1,"aMS",@progbits,1
-.LC62:
-	.string	"Ftlscanalldata = %x\n"
 .LC63:
-	.string	"scan lpa = %x ppa= %x\n"
+	.string	"Ftlscanalldata = %x\n"
 .LC64:
+	.string	"scan lpa = %x ppa= %x\n"
+.LC65:
 	.string	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\n"
 	.section	.rodata.HynixGetReadRetryDefault.str1.1,"aMS",@progbits,1
 .LC21:
@@ -24789,262 +24819,262 @@ refValueDefault:
 	.section	.rodata.MicronReadRetrial.str1.1,"aMS",@progbits,1
 .LC13:
 	.string	"micron RR %d row=%x,count %d,status=%d\n"
-	.section	.rodata.__func__.10012,"a",@progbits
-	.align	3
-	.set	.LANCHOR221,. + 0
-	.type	__func__.10012, %object
-	.size	__func__.10012, 14
-__func__.10012:
-	.string	"FtlScanSysBlk"
-	.section	.rodata.__func__.10067,"a",@progbits
+	.section	.rodata.__func__.10021,"a",@progbits
 	.align	3
 	.set	.LANCHOR222,. + 0
-	.type	__func__.10067, %object
-	.size	__func__.10067, 15
-__func__.10067:
+	.type	__func__.10021, %object
+	.size	__func__.10021, 15
+__func__.10021:
 	.string	"FtlLoadSysInfo"
-	.section	.rodata.__func__.10078,"a",@progbits
+	.section	.rodata.__func__.10032,"a",@progbits
 	.align	3
 	.set	.LANCHOR234,. + 0
-	.type	__func__.10078, %object
-	.size	__func__.10078, 12
-__func__.10078:
+	.type	__func__.10032, %object
+	.size	__func__.10032, 12
+__func__.10032:
 	.string	"FtlCheckVpc"
-	.section	.rodata.__func__.10110,"a",@progbits
+	.section	.rodata.__func__.10064,"a",@progbits
 	.align	3
 	.set	.LANCHOR225,. + 0
-	.type	__func__.10110, %object
-	.size	__func__.10110, 17
-__func__.10110:
+	.type	__func__.10064, %object
+	.size	__func__.10064, 17
+__func__.10064:
 	.string	"FtlDumpBlockInfo"
-	.section	.rodata.__func__.10129,"a",@progbits
+	.section	.rodata.__func__.10083,"a",@progbits
 	.align	3
 	.set	.LANCHOR226,. + 0
-	.type	__func__.10129, %object
-	.size	__func__.10129, 16
-__func__.10129:
+	.type	__func__.10083, %object
+	.size	__func__.10083, 16
+__func__.10083:
 	.string	"FtlScanAllBlock"
-	.section	.rodata.__func__.10234,"a",@progbits
+	.section	.rodata.__func__.10188,"a",@progbits
 	.align	3
 	.set	.LANCHOR235,. + 0
-	.type	__func__.10234, %object
-	.size	__func__.10234, 16
-__func__.10234:
+	.type	__func__.10188, %object
+	.size	__func__.10188, 16
+__func__.10188:
 	.string	"FtlReUsePrevPpa"
-	.section	.rodata.__func__.10267,"a",@progbits
+	.section	.rodata.__func__.10221,"a",@progbits
 	.align	3
 	.set	.LANCHOR236,. + 0
-	.type	__func__.10267, %object
-	.size	__func__.10267, 22
-__func__.10267:
+	.type	__func__.10221, %object
+	.size	__func__.10221, 22
+__func__.10221:
 	.string	"FtlRecoverySuperblock"
-	.section	.rodata.__func__.10321,"a",@progbits
+	.section	.rodata.__func__.10275,"a",@progbits
 	.align	3
 	.set	.LANCHOR101,. + 0
-	.type	__func__.10321, %object
-	.size	__func__.10321, 16
-__func__.10321:
+	.type	__func__.10275, %object
+	.size	__func__.10275, 16
+__func__.10275:
 	.string	"make_superblock"
-	.section	.rodata.__func__.10341,"a",@progbits
+	.section	.rodata.__func__.10295,"a",@progbits
 	.align	3
 	.set	.LANCHOR140,. + 0
-	.type	__func__.10341, %object
-	.size	__func__.10341, 18
-__func__.10341:
+	.type	__func__.10295, %object
+	.size	__func__.10295, 18
+__func__.10295:
 	.string	"SupperBlkListInit"
-	.section	.rodata.__func__.10385,"a",@progbits
+	.section	.rodata.__func__.10339,"a",@progbits
 	.align	3
 	.set	.LANCHOR227,. + 0
-	.type	__func__.10385, %object
-	.size	__func__.10385, 17
-__func__.10385:
+	.type	__func__.10339, %object
+	.size	__func__.10339, 17
+__func__.10339:
 	.string	"ftl_scan_all_ppa"
-	.section	.rodata.__func__.10430,"a",@progbits
+	.section	.rodata.__func__.10384,"a",@progbits
 	.align	3
 	.set	.LANCHOR204,. + 0
-	.type	__func__.10430, %object
-	.size	__func__.10430, 25
-__func__.10430:
+	.type	__func__.10384, %object
+	.size	__func__.10384, 25
+__func__.10384:
 	.string	"allocate_data_superblock"
-	.section	.rodata.__func__.10444,"a",@progbits
+	.section	.rodata.__func__.10398,"a",@progbits
 	.align	3
 	.set	.LANCHOR220,. + 0
-	.type	__func__.10444, %object
-	.size	__func__.10444, 29
-__func__.10444:
+	.type	__func__.10398, %object
+	.size	__func__.10398, 29
+__func__.10398:
 	.string	"allocate_new_data_superblock"
-	.section	.rodata.__func__.10450,"a",@progbits
+	.section	.rodata.__func__.10404,"a",@progbits
 	.align	3
 	.set	.LANCHOR209,. + 0
-	.type	__func__.10450, %object
-	.size	__func__.10450, 19
-__func__.10450:
+	.type	__func__.10404, %object
+	.size	__func__.10404, 19
+__func__.10404:
 	.string	"get_new_active_ppa"
-	.section	.rodata.__func__.10461,"a",@progbits
+	.section	.rodata.__func__.10415,"a",@progbits
 	.align	3
 	.set	.LANCHOR207,. + 0
-	.type	__func__.10461, %object
-	.size	__func__.10461, 16
-__func__.10461:
+	.type	__func__.10415, %object
+	.size	__func__.10415, 16
+__func__.10415:
 	.string	"update_vpc_list"
-	.section	.rodata.__func__.10466,"a",@progbits
+	.section	.rodata.__func__.10420,"a",@progbits
 	.align	3
 	.set	.LANCHOR208,. + 0
-	.type	__func__.10466, %object
-	.size	__func__.10466, 20
-__func__.10466:
+	.type	__func__.10420, %object
+	.size	__func__.10420, 20
+__func__.10420:
 	.string	"decrement_vpc_count"
-	.section	.rodata.__func__.10534,"a",@progbits
+	.section	.rodata.__func__.10488,"a",@progbits
 	.align	3
 	.set	.LANCHOR242,. + 0
-	.type	__func__.10534, %object
-	.size	__func__.10534, 19
-__func__.10534:
+	.type	__func__.10488, %object
+	.size	__func__.10488, 19
+__func__.10488:
 	.string	"FtlGcFreeTempBlock"
-	.section	.rodata.__func__.10634,"a",@progbits
+	.section	.rodata.__func__.10588,"a",@progbits
 	.align	3
 	.set	.LANCHOR246,. + 0
-	.type	__func__.10634, %object
-	.size	__func__.10634, 23
-__func__.10634:
+	.type	__func__.10588, %object
+	.size	__func__.10588, 23
+__func__.10588:
 	.string	"rk_ftl_garbage_collect"
-	.section	.rodata.__func__.9441,"a",@progbits
+	.section	.rodata.__func__.9395,"a",@progbits
 	.align	3
 	.set	.LANCHOR248,. + 0
-	.type	__func__.9441, %object
-	.size	__func__.9441, 8
-__func__.9441:
+	.type	__func__.9395, %object
+	.size	__func__.9395, 8
+__func__.9395:
 	.string	"FtlInit"
-	.section	.rodata.__func__.9502,"a",@progbits
+	.section	.rodata.__func__.9456,"a",@progbits
 	.align	3
 	.set	.LANCHOR230,. + 0
-	.type	__func__.9502, %object
-	.size	__func__.9502, 13
-__func__.9502:
+	.type	__func__.9456, %object
+	.size	__func__.9456, 13
+__func__.9456:
 	.string	"FtlProgPages"
-	.section	.rodata.__func__.9528,"a",@progbits
+	.section	.rodata.__func__.9482,"a",@progbits
 	.align	3
 	.set	.LANCHOR250,. + 0
-	.type	__func__.9528, %object
-	.size	__func__.9528, 9
-__func__.9528:
+	.type	__func__.9482, %object
+	.size	__func__.9482, 9
+__func__.9482:
 	.string	"FtlWrite"
-	.section	.rodata.__func__.9611,"a",@progbits
+	.section	.rodata.__func__.9565,"a",@progbits
 	.align	3
 	.set	.LANCHOR124,. + 0
-	.type	__func__.9611, %object
-	.size	__func__.9611, 14
-__func__.9611:
+	.type	__func__.9565, %object
+	.size	__func__.9565, 14
+__func__.9565:
 	.string	"FtlBbt2Bitmap"
-	.section	.rodata.__func__.9657,"a",@progbits
+	.section	.rodata.__func__.9611,"a",@progbits
 	.align	3
 	.set	.LANCHOR212,. + 0
-	.type	__func__.9657, %object
-	.size	__func__.9657, 11
-__func__.9657:
+	.type	__func__.9611, %object
+	.size	__func__.9611, 11
+__func__.9611:
 	.string	"FtlLoadBbt"
-	.section	.rodata.__func__.9750,"a",@progbits
+	.section	.rodata.__func__.9704,"a",@progbits
 	.align	3
 	.set	.LANCHOR89,. + 0
-	.type	__func__.9750, %object
-	.size	__func__.9750, 17
-__func__.9750:
+	.type	__func__.9704, %object
+	.size	__func__.9704, 17
+__func__.9704:
 	.string	"INSERT_FREE_LIST"
-	.section	.rodata.__func__.9754,"a",@progbits
+	.section	.rodata.__func__.9708,"a",@progbits
 	.align	3
 	.set	.LANCHOR86,. + 0
-	.type	__func__.9754, %object
-	.size	__func__.9754, 17
-__func__.9754:
+	.type	__func__.9708, %object
+	.size	__func__.9708, 17
+__func__.9708:
 	.string	"INSERT_DATA_LIST"
-	.section	.rodata.__func__.9791,"a",@progbits
+	.section	.rodata.__func__.9745,"a",@progbits
 	.align	3
 	.set	.LANCHOR90,. + 0
-	.type	__func__.9791, %object
-	.size	__func__.9791, 17
-__func__.9791:
+	.type	__func__.9745, %object
+	.size	__func__.9745, 17
+__func__.9745:
 	.string	"List_remove_node"
-	.section	.rodata.__func__.9821,"a",@progbits
+	.section	.rodata.__func__.9775,"a",@progbits
 	.align	3
 	.set	.LANCHOR94,. + 0
-	.type	__func__.9821, %object
-	.size	__func__.9821, 22
-__func__.9821:
+	.type	__func__.9775, %object
+	.size	__func__.9775, 22
+__func__.9775:
 	.string	"List_update_data_list"
-	.section	.rodata.__func__.9828,"a",@progbits
+	.section	.rodata.__func__.9782,"a",@progbits
 	.align	3
 	.set	.LANCHOR229,. + 0
-	.type	__func__.9828, %object
-	.size	__func__.9828, 20
-__func__.9828:
+	.type	__func__.9782, %object
+	.size	__func__.9782, 20
+__func__.9782:
 	.string	"ftl_load_l2p_region"
-	.section	.rodata.__func__.9859,"a",@progbits
+	.section	.rodata.__func__.9813,"a",@progbits
 	.align	3
 	.set	.LANCHOR95,. + 0
-	.type	__func__.9859, %object
-	.size	__func__.9859, 26
-__func__.9859:
+	.type	__func__.9813, %object
+	.size	__func__.9813, 26
+__func__.9813:
 	.string	"ftl_map_blk_alloc_new_blk"
-	.section	.rodata.__func__.9869,"a",@progbits
+	.section	.rodata.__func__.9823,"a",@progbits
 	.align	3
 	.set	.LANCHOR213,. + 0
-	.type	__func__.9869, %object
-	.size	__func__.9869, 15
-__func__.9869:
+	.type	__func__.9823, %object
+	.size	__func__.9823, 15
+__func__.9823:
 	.string	"ftl_map_blk_gc"
-	.section	.rodata.__func__.9882,"a",@progbits
+	.section	.rodata.__func__.9836,"a",@progbits
 	.align	3
 	.set	.LANCHOR214,. + 0
-	.type	__func__.9882, %object
-	.size	__func__.9882, 31
-__func__.9882:
+	.type	__func__.9836, %object
+	.size	__func__.9836, 31
+__func__.9836:
 	.string	"Ftl_write_map_blk_to_last_page"
-	.section	.rodata.__func__.9895,"a",@progbits
+	.section	.rodata.__func__.9849,"a",@progbits
 	.align	3
 	.set	.LANCHOR215,. + 0
-	.type	__func__.9895, %object
-	.size	__func__.9895, 16
-__func__.9895:
+	.type	__func__.9849, %object
+	.size	__func__.9849, 16
+__func__.9849:
 	.string	"FtlMapWritePage"
-	.section	.rodata.__func__.9915,"a",@progbits
+	.section	.rodata.__func__.9869,"a",@progbits
 	.align	3
 	.set	.LANCHOR98,. + 0
-	.type	__func__.9915, %object
-	.size	__func__.9915, 22
-__func__.9915:
+	.type	__func__.9869, %object
+	.size	__func__.9869, 22
+__func__.9869:
 	.string	"select_l2p_ram_region"
-	.section	.rodata.__func__.9931,"a",@progbits
+	.section	.rodata.__func__.9885,"a",@progbits
 	.align	3
 	.set	.LANCHOR228,. + 0
-	.type	__func__.9931, %object
-	.size	__func__.9931, 9
-__func__.9931:
+	.type	__func__.9885, %object
+	.size	__func__.9885, 9
+__func__.9885:
 	.string	"log2phys"
-	.section	.rodata.__func__.9993,"a",@progbits
+	.section	.rodata.__func__.9947,"a",@progbits
 	.align	3
 	.set	.LANCHOR211,. + 0
-	.type	__func__.9993, %object
-	.size	__func__.9993, 15
-__func__.9993:
+	.type	__func__.9947, %object
+	.size	__func__.9947, 15
+__func__.9947:
 	.string	"FtlVpcTblFlush"
+	.section	.rodata.__func__.9966,"a",@progbits
+	.align	3
+	.set	.LANCHOR221,. + 0
+	.type	__func__.9966, %object
+	.size	__func__.9966, 14
+__func__.9966:
+	.string	"FtlScanSysBlk"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",@progbits,1
 .LC36:
 	.string	"decrement_vpc_count %x = %d\n"
 .LC37:
 	.string	"decrement_vpc_count %x = %d in free list\n"
 	.section	.rodata.dump_map_info.str1.1,"aMS",@progbits,1
-.LC80:
-	.string	"phyBlk = %x,addr= %x,spare= %x %x %x %x data=%x %x\n"
 .LC81:
-	.string	"Mblk:"
+	.string	"phyBlk = %x,addr= %x,spare= %x %x %x %x data=%x %x\n"
 .LC82:
-	.string	"L2P:"
+	.string	"Mblk:"
 .LC83:
+	.string	"L2P:"
+.LC84:
 	.string	"L2PC:"
 	.section	.rodata.ftl_fix_nand_power_lost_error.str1.1,"aMS",@progbits,1
-.LC75:
-	.string	"fix power lost blk = %x vpc=%x\n"
 .LC76:
+	.string	"fix power lost blk = %x vpc=%x\n"
+.LC77:
 	.string	"erase power lost blk = %x vpc=%x\n"
 	.section	.rodata.ftl_map_blk_alloc_new_blk.str1.1,"aMS",@progbits,1
 .LC8:
@@ -25053,11 +25083,11 @@ __func__.9993:
 .LC39:
 	.string	"page map lost: %x %x\n"
 	.section	.rodata.ftl_scan_all_ppa.str1.1,"aMS",@progbits,1
-.LC52:
-	.string	"ftl_scan_all_ppa blk %x page %x\n"
 .LC53:
-	.string	"addr= %x, status= %d,spare= %x %x %x %x data=%x %x\n"
+	.string	"ftl_scan_all_ppa blk %x page %x\n"
 .LC54:
+	.string	"addr= %x, status= %d,spare= %x %x %x %x data=%x %x\n"
+.LC55:
 	.string	"%s finished\n"
 	.section	.rodata.idb_write_data.str1.1,"aMS",@progbits,1
 .LC15:
@@ -25067,14 +25097,14 @@ __func__.9993:
 .LC17:
 	.string	"write_idblock fail! %x\n"
 	.section	.rodata.log2phys.str1.1,"aMS",@progbits,1
-.LC56:
-	.string	"region_id = %x phyAddr = %x\n"
 .LC57:
-	.string	"map_ppn:"
+	.string	"region_id = %x phyAddr = %x\n"
 .LC58:
+	.string	"map_ppn:"
+.LC59:
 	.string	"load_l2p_region refresh = %x phyAddr = %x\n"
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",@progbits,1
-.LC74:
+.LC75:
 	.string	"FtlInit %x\n"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
 .LC18:
diff --git a/drivers/rknand/rk_zftl_arm_v7.S b/drivers/rknand/rk_zftl_arm_v7.S
index acf4621f3e..9aec483f1e 100644
--- a/drivers/rknand/rk_zftl_arm_v7.S
+++ b/drivers/rknand/rk_zftl_arm_v7.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2019-06-03
+ * date: 2019-09-18
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -339,12 +339,12 @@ _insert_free_list:
 	.fpu softvfp
 	.type	_insert_data_list, %function
 _insert_data_list:
-	@ args = 0, pretend = 0, frame = 32
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L67
+	ldr	r3, .L69
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	lr, r0
-	sub	sp, sp, #32
+	sub	sp, sp, #24
 	ldrh	r3, [r3]
 	cmp	r3, r1
 	bls	.L47
@@ -352,135 +352,124 @@ _insert_data_list:
 	ldr	r0, [r0]
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
-	ldr	r3, .L67+4
-	ldr	r6, [r3]
+	ldr	r3, .L69+4
+	ldr	r5, [r3]
 	movs	r3, #6
-	muls	r3, r1, r3
-	str	r3, [sp, #8]
-	adds	r7, r6, r3
-	ldr	r2, [sp, #8]
+	mul	r10, r3, r1
 	movw	r3, #65535
-	strh	r3, [r7, #2]	@ movhi
-	strh	r3, [r6, r2]	@ movhi
+	add	r6, r5, r10
+	strh	r3, [r6, #2]	@ movhi
+	strh	r3, [r5, r10]	@ movhi
 	cbnz	r0, .L50
-.L66:
-	str	r7, [lr]
+.L68:
+	str	r6, [lr]
 	b	.L47
 .L50:
-	ldr	r3, .L67+8
-	ldrh	r5, [r7, #4]
+	ldr	r3, .L69+8
+	ldrh	r7, [r6, #4]
 	ldr	r3, [r3]
 	ldrh	r4, [r3, r1, lsl #1]
-	muls	r4, r5, r4
-	str	r3, [sp, #12]
-	ldr	r3, .L67+12
-	str	r4, [sp, #4]
-	ldr	ip, [r3]
-	ldr	r3, [ip, r1, lsl #2]
+	muls	r4, r7, r4
+	str	r3, [sp, #8]
+	ldr	r3, .L69+12
+	str	r4, [sp]
+	ldr	r8, [r3]
+	ldr	r3, [r8, r1, lsl #2]
 	ubfx	r2, r3, #11, #8
-	ldr	r3, .L67+16
+	ldr	r3, .L69+16
 	ldrh	r3, [r3]
-	str	r3, [sp, #16]
-	ldrh	r3, [ip, r1, lsl #2]
+	str	r3, [sp, #12]
+	ldrh	r3, [r8, r1, lsl #2]
 	ubfx	r3, r3, #0, #11
 	beq	.L51
-	ldrh	r4, [sp, #16]
+	ldrh	r4, [sp, #12]
 	smulbb	r2, r2, r4
 	add	r3, r3, r2
-	ldr	r2, [sp, #4]
+	ldr	r2, [sp]
 	uxtah	r3, r2, r3
-	str	r3, [sp, #4]
+	str	r3, [sp]
 .L51:
-	ldr	r3, [sp, #4]
-	cmp	r5, #0
+	ldr	r3, [sp]
+	cmp	r7, #0
 	it	eq
 	moveq	r3, #-1
-	mov	r5, r0
-	mov	r8, #0
-	str	r3, [sp, #4]
-	subs	r3, r0, r6
+	movs	r7, #0
+	str	r7, [sp, #4]
+	str	r3, [sp]
+	subs	r3, r0, r5
 	asrs	r2, r3, #1
-	ldr	r3, .L67+20
+	ldr	r3, .L69+20
 	muls	r3, r2, r3
-	ldr	r2, .L67
+	ldr	r2, .L69
 	ldrh	r2, [r2]
 	uxth	r3, r3
 	str	r2, [sp, #20]
-.L58:
-	add	r2, r8, #1
-	uxth	r8, r2
-	ldr	r2, [sp, #20]
-	cmp	r8, r2
+	mov	r2, r0
+.L57:
+	ldr	r7, [sp, #4]
+	adds	r7, r7, #1
+	uxth	r7, r7
+	mov	r4, r7
+	str	r7, [sp, #4]
+	ldr	r7, [sp, #20]
+	cmp	r4, r7
 	bhi	.L47
 	cmp	r1, r3
 	beq	.L47
-	ldr	r2, [sp, #12]
-	ldrh	fp, [r5, #4]
-	ldrh	r10, [r2, r3, lsl #1]
-	ldr	r2, [ip, r3, lsl #2]
-	mov	r4, fp
-	ubfx	r2, r2, #11, #8
-	str	r2, [sp, #24]
-	ldrh	r2, [ip, r3, lsl #2]
-	ubfx	r2, r2, #0, #11
-	str	r2, [sp, #28]
-	mov	r2, r10
-	muls	r2, r4, r2
-	mov	r10, r2
-	beq	.L54
-	cmp	fp, #0
-	beq	.L62
-	ldrh	r2, [sp, #24]
-	ldrh	r4, [sp, #16]
-	smulbb	fp, r2, r4
-	ldr	r2, [sp, #28]
-	add	fp, fp, r2
-	uxtah	r10, r10, fp
-.L55:
-	ldr	r2, [sp, #4]
-	cmp	r2, r10
-	bcc	.L56
-.L60:
-	ldrh	r2, [r5]
+	ldrh	r7, [r2, #4]
+	ldr	r4, [r8, r3, lsl #2]
+	ldrh	ip, [r8, r3, lsl #2]
+	str	r7, [sp, #16]
+	ldr	r7, [sp, #8]
+	ubfx	fp, r4, #11, #8
+	ldr	r4, [sp, #16]
+	ubfx	ip, ip, #0, #11
+	ldrh	r7, [r7, r3, lsl #1]
+	muls	r7, r4, r7
+	itt	ne
+	ldrhne	r4, [sp, #12]
+	smulbbne	fp, fp, r4
+	ldr	r4, [sp, #16]
+	itt	ne
+	addne	fp, fp, ip
+	uxtahne	r7, r7, fp
+	cbz	r4, .L55
+	ldr	r4, [sp]
+	cmp	r4, r7
+	bls	.L55
+	ldrh	r7, [r2]
 	movw	r4, #65535
-	cmp	r2, r4
-	bne	.L57
-	strh	r3, [r7, #2]	@ movhi
-	strh	r1, [r5]	@ movhi
+	cmp	r7, r4
+	bne	.L56
+	strh	r3, [r6, #2]	@ movhi
+	strh	r1, [r2]	@ movhi
 .L47:
-	add	sp, sp, #32
+	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L57:
-	movs	r3, #6
-	mla	r5, r3, r2, r6
-	mov	r3, r2
-	b	.L58
 .L56:
-	ldrh	r2, [r5, #2]
-	cmp	r0, r5
-	strh	r2, [r7, #2]	@ movhi
-	ldr	r2, [sp, #8]
-	strh	r3, [r6, r2]	@ movhi
-	bne	.L59
+	movs	r3, #6
+	mla	r2, r3, r7, r5
+	mov	r3, r7
+	b	.L57
+.L55:
+	ldrh	r4, [r2, #2]
+	cmp	r0, r2
+	strh	r4, [r6, #2]	@ movhi
+	strh	r3, [r5, r10]	@ movhi
+	bne	.L58
 	strh	r1, [r0, #2]	@ movhi
-	b	.L66
-.L59:
-	ldrh	r2, [r5, #2]
+	b	.L68
+.L58:
+	ldrh	r0, [r2, #2]
 	movs	r3, #6
-	muls	r3, r2, r3
-	strh	r1, [r6, r3]	@ movhi
-	strh	r1, [r5, #2]	@ movhi
+	muls	r3, r0, r3
+	strh	r1, [r5, r3]	@ movhi
+	strh	r1, [r2, #2]	@ movhi
 	b	.L47
-.L54:
-	cmp	fp, #0
-	bne	.L60
-.L62:
-	mov	r10, #-1
-	b	.L55
-.L68:
+.L70:
 	.align	2
-.L67:
+.L69:
 	.word	.LANCHOR6
 	.word	.LANCHOR4
 	.word	.LANCHOR9
@@ -499,35 +488,35 @@ _list_get_gc_head_node.isra.2:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
-	cbz	r0, .L74
-	ldr	r3, .L76
+	cbz	r0, .L76
+	ldr	r3, .L78
 	movw	r2, #65535
 	movs	r4, #6
 	ldr	r3, [r3]
-.L71:
-	cbz	r1, .L72
+.L73:
+	cbz	r1, .L74
 	ldrh	r0, [r0]
 	cmp	r0, r2
-	bne	.L73
+	bne	.L75
 	pop	{r4, pc}
-.L73:
+.L75:
 	subs	r1, r1, #1
 	mla	r0, r4, r0, r3
 	uxth	r1, r1
-	b	.L71
-.L74:
+	b	.L73
+.L76:
 	movw	r0, #65535
 	pop	{r4, pc}
-.L72:
+.L74:
 	subs	r0, r0, r3
 	asrs	r3, r0, #1
-	ldr	r0, .L76+4
+	ldr	r0, .L78+4
 	muls	r0, r3, r0
 	uxth	r0, r0
 	pop	{r4, pc}
-.L77:
+.L79:
 	.align	2
-.L76:
+.L78:
 	.word	.LANCHOR4
 	.word	-1431655765
 	.size	_list_get_gc_head_node.isra.2, .-_list_get_gc_head_node.isra.2
@@ -541,7 +530,7 @@ _list_get_gc_head_node.isra.2:
 _list_update_data_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L88
+	ldr	r3, .L90
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r6, r2
 	mov	r7, r0
@@ -549,14 +538,14 @@ _list_update_data_list:
 	ldr	r3, [r3]
 	ldrh	r2, [r3, #16]
 	cmp	r2, r1
-	beq	.L78
+	beq	.L80
 	ldrh	r2, [r3, #48]
 	cmp	r2, r1
-	beq	.L78
+	beq	.L80
 	ldrh	r3, [r3, #80]
 	cmp	r3, r1
-	beq	.L78
-	ldr	r3, .L88+4
+	beq	.L80
+	ldr	r3, .L90+4
 	movs	r5, #6
 	muls	r5, r1, r5
 	ldr	r2, [r0]
@@ -564,48 +553,48 @@ _list_update_data_list:
 	mov	r8, r3
 	add	r10, fp, r5
 	cmp	r10, r2
-	beq	.L78
+	beq	.L80
 	ldrh	r3, [r10, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L82
+	bne	.L84
 	ldrh	r2, [fp, r5]
 	cmp	r2, r3
-	bne	.L82
+	bne	.L84
 	movs	r2, #255
-	ldr	r1, .L88+8
-	ldr	r0, .L88+12
+	ldr	r1, .L90+8
+	ldr	r0, .L90+12
 	bl	printf
-.L82:
+.L84:
 	ldrh	r3, [r10, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L83
+	bne	.L85
 	ldrh	r2, [fp, r5]
 	cmp	r2, r3
-	beq	.L78
-.L83:
-	ldr	r2, .L88+16
+	beq	.L80
+.L85:
+	ldr	r2, .L90+16
 	ldr	r0, [r2]
 	ldrh	r2, [r10, #4]
 	ldrh	r1, [r0, r4, lsl #1]
-	cbz	r2, .L86
+	cbz	r2, .L88
 	muls	r2, r1, r2
-.L84:
+.L86:
 	movs	r1, #6
 	muls	r1, r3, r1
-	ldr	r3, .L88+20
+	ldr	r3, .L90+20
 	asrs	r5, r1, #1
 	muls	r3, r5, r3
 	ldrh	r5, [r0, r3, lsl #1]
 	ldr	r0, [r8]
 	add	r1, r1, r0
 	ldrh	r3, [r1, #4]
-	cbz	r3, .L87
+	cbz	r3, .L89
 	muls	r3, r5, r3
-.L85:
+.L87:
 	cmp	r2, r3
-	bcs	.L78
+	bcs	.L80
 	mov	r2, r6
 	mov	r1, r4
 	mov	r0, r7
@@ -615,17 +604,17 @@ _list_update_data_list:
 	mov	r0, r7
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
 	b	_insert_data_list
-.L86:
+.L88:
 	mov	r2, #-1
-	b	.L84
-.L87:
+	b	.L86
+.L89:
 	mov	r3, #-1
-	b	.L85
-.L78:
+	b	.L87
+.L80:
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L89:
+.L91:
 	.align	2
-.L88:
+.L90:
 	.word	.LANCHOR10
 	.word	.LANCHOR4
 	.word	.LANCHOR11
@@ -644,38 +633,38 @@ zftl_get_gc_node.part.9:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L91
+	ldr	r3, .L93
 	mov	r1, r0
 	ldr	r0, [r3]
 	b	_list_get_gc_head_node.isra.2
-.L92:
+.L94:
 	.align	2
-.L91:
+.L93:
 	.word	.LANCHOR12
 	.size	zftl_get_gc_node.part.9, .-zftl_get_gc_node.part.9
-	.section	.text.nandc_de_cs.constprop.29,"ax",%progbits
+	.section	.text.nandc_de_cs.constprop.30,"ax",%progbits
 	.align	1
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	nandc_de_cs.constprop.29, %function
-nandc_de_cs.constprop.29:
+	.type	nandc_de_cs.constprop.30, %function
+nandc_de_cs.constprop.30:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L94
+	ldr	r3, .L96
 	ldr	r2, [r3]
 	ldr	r3, [r2]
 	bfc	r3, #0, #8
 	bfc	r3, #17, #1
 	str	r3, [r2]
 	bx	lr
-.L95:
+.L97:
 	.align	2
-.L94:
+.L96:
 	.word	.LANCHOR13
-	.size	nandc_de_cs.constprop.29, .-nandc_de_cs.constprop.29
+	.size	nandc_de_cs.constprop.30, .-nandc_de_cs.constprop.30
 	.section	.text.nand_flash_print_info,"ax",%progbits
 	.align	1
 	.global	nand_flash_print_info
@@ -689,18 +678,18 @@ nand_flash_print_info:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, lr}
 	sub	sp, sp, #20
-	ldr	r4, .L218
+	ldr	r4, .L220
 	ldr	r3, [r4]
 	lsls	r3, r3, #19
-	bpl	.L97
-	ldr	r1, .L218+4
-	ldr	r0, .L218+8
+	bpl	.L99
+	ldr	r1, .L220+4
+	ldr	r0, .L220+8
 	bl	printf
-.L97:
+.L99:
 	ldr	r3, [r4]
 	lsls	r5, r3, #19
-	bpl	.L98
-	ldr	r3, .L218+12
+	bpl	.L100
+	ldr	r3, .L220+12
 	ldr	r0, [r3]
 	ldrb	r5, [r0, #6]	@ zero_extendqisi2
 	ldrb	r3, [r0, #3]	@ zero_extendqisi2
@@ -711,271 +700,271 @@ nand_flash_print_info:
 	str	r5, [sp, #4]
 	ldrb	r0, [r0, #4]	@ zero_extendqisi2
 	str	r0, [sp]
-	ldr	r0, .L218+16
+	ldr	r0, .L220+16
 	bl	printf
-.L98:
+.L100:
 	ldr	r3, [r4]
 	lsls	r0, r3, #19
-	bpl	.L99
-	ldr	r3, .L218+12
-	ldr	r0, .L218+20
+	bpl	.L101
+	ldr	r3, .L220+12
+	ldr	r0, .L220+20
 	ldr	r3, [r3]
 	ldrb	r1, [r3, #8]	@ zero_extendqisi2
 	bl	printf
-.L99:
+.L101:
 	ldr	r3, [r4]
 	lsls	r1, r3, #19
-	bpl	.L100
-	ldr	r3, .L218+12
-	ldr	r0, .L218+24
+	bpl	.L102
+	ldr	r3, .L220+12
+	ldr	r0, .L220+24
 	ldr	r3, [r3]
 	ldrb	r1, [r3, #9]	@ zero_extendqisi2
 	bl	printf
-.L100:
+.L102:
 	ldr	r3, [r4]
 	lsls	r2, r3, #19
-	bpl	.L101
-	ldr	r3, .L218+12
-	ldr	r0, .L218+28
+	bpl	.L103
+	ldr	r3, .L220+12
+	ldr	r0, .L220+28
 	ldr	r3, [r3]
 	ldrh	r1, [r3, #10]
 	bl	printf
-.L101:
+.L103:
 	ldr	r3, [r4]
 	lsls	r3, r3, #19
-	bpl	.L102
-	ldr	r3, .L218+12
-	ldr	r0, .L218+32
+	bpl	.L104
+	ldr	r3, .L220+12
+	ldr	r0, .L220+32
 	ldr	r3, [r3]
 	ldrb	r1, [r3, #12]	@ zero_extendqisi2
 	bl	printf
-.L102:
+.L104:
 	ldr	r3, [r4]
 	lsls	r5, r3, #19
-	bpl	.L103
-	ldr	r3, .L218+12
-	ldr	r0, .L218+36
+	bpl	.L105
+	ldr	r3, .L220+12
+	ldr	r0, .L220+36
 	ldr	r3, [r3]
 	ldrb	r1, [r3, #13]	@ zero_extendqisi2
 	bl	printf
-.L103:
+.L105:
 	ldr	r3, [r4]
 	lsls	r0, r3, #19
-	bpl	.L104
-	ldr	r3, .L218+12
-	ldr	r0, .L218+40
+	bpl	.L106
+	ldr	r3, .L220+12
+	ldr	r0, .L220+40
 	ldr	r3, [r3]
 	ldrh	r1, [r3, #14]
 	bl	printf
-.L104:
+.L106:
 	ldr	r3, [r4]
 	lsls	r1, r3, #19
-	bpl	.L105
-	ldr	r3, .L218+12
-	ldr	r0, .L218+44
+	bpl	.L107
+	ldr	r3, .L220+12
+	ldr	r0, .L220+44
 	ldr	r3, [r3]
 	ldrb	r1, [r3, #23]	@ zero_extendqisi2
 	bl	printf
-.L105:
+.L107:
 	ldr	r3, [r4]
 	lsls	r2, r3, #19
-	bpl	.L106
-	ldr	r3, .L218+12
-	ldr	r0, .L218+48
+	bpl	.L108
+	ldr	r3, .L220+12
+	ldr	r0, .L220+48
 	ldr	r3, [r3]
 	ldrb	r1, [r3, #18]	@ zero_extendqisi2
 	bl	printf
-.L106:
+.L108:
 	ldr	r3, [r4]
 	lsls	r3, r3, #19
-	bpl	.L107
-	ldr	r3, .L218+12
-	ldr	r0, .L218+52
+	bpl	.L109
+	ldr	r3, .L220+12
+	ldr	r0, .L220+52
 	ldr	r3, [r3]
 	ldrb	r1, [r3, #19]	@ zero_extendqisi2
 	bl	printf
-.L107:
+.L109:
 	ldr	r3, [r4]
 	lsls	r5, r3, #19
-	bpl	.L108
-	ldr	r3, .L218+12
-	ldr	r0, .L218+56
+	bpl	.L110
+	ldr	r3, .L220+12
+	ldr	r0, .L220+56
 	ldr	r3, [r3]
 	ldrb	r1, [r3, #20]	@ zero_extendqisi2
 	bl	printf
-.L108:
+.L110:
 	ldr	r3, [r4]
 	lsls	r0, r3, #19
-	bpl	.L109
-	ldr	r3, .L218+60
-	ldr	r0, .L218+64
+	bpl	.L111
+	ldr	r3, .L220+60
+	ldr	r0, .L220+64
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	bl	printf
-.L109:
+.L111:
 	ldr	r3, [r4]
 	lsls	r1, r3, #19
-	bpl	.L110
-	ldr	r3, .L218+68
-	ldr	r0, .L218+72
+	bpl	.L112
+	ldr	r3, .L220+68
+	ldr	r0, .L220+72
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	bl	printf
-.L110:
+.L112:
 	ldr	r3, [r4]
 	lsls	r2, r3, #19
-	bpl	.L111
-	ldr	r3, .L218+12
-	ldr	r0, .L218+76
+	bpl	.L113
+	ldr	r3, .L220+12
+	ldr	r0, .L220+76
 	ldr	r3, [r3]
 	ldrb	r1, [r3, #22]	@ zero_extendqisi2
 	bl	printf
-.L111:
+.L113:
 	ldr	r3, [r4]
 	lsls	r3, r3, #19
-	bpl	.L112
-	ldr	r3, .L218+80
-	ldr	r0, .L218+84
+	bpl	.L114
+	ldr	r3, .L220+80
+	ldr	r0, .L220+84
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	bl	printf
-.L112:
+.L114:
 	ldr	r3, [r4]
 	lsls	r5, r3, #19
-	bpl	.L113
-	ldr	r3, .L218+12
-	ldr	r0, .L218+88
+	bpl	.L115
+	ldr	r3, .L220+12
+	ldr	r0, .L220+88
 	ldr	r3, [r3]
 	ldrb	r1, [r3, #16]	@ zero_extendqisi2
 	and	r1, r1, #1
 	bl	printf
-.L113:
+.L115:
 	ldr	r3, [r4]
 	lsls	r0, r3, #19
-	bpl	.L114
-	ldr	r3, .L218+12
-	ldr	r0, .L218+92
+	bpl	.L116
+	ldr	r3, .L220+12
+	ldr	r0, .L220+92
 	ldr	r3, [r3]
 	ldrh	r1, [r3, #16]
 	ubfx	r1, r1, #1, #1
 	bl	printf
-.L114:
+.L116:
 	ldr	r3, [r4]
 	lsls	r1, r3, #19
-	bpl	.L115
-	ldr	r3, .L218+12
-	ldr	r0, .L218+96
+	bpl	.L117
+	ldr	r3, .L220+12
+	ldr	r0, .L220+96
 	ldr	r3, [r3]
 	ldrh	r1, [r3, #16]
 	ubfx	r1, r1, #2, #1
 	bl	printf
-.L115:
+.L117:
 	ldr	r3, [r4]
 	lsls	r2, r3, #19
-	bpl	.L116
-	ldr	r3, .L218+12
-	ldr	r0, .L218+100
+	bpl	.L118
+	ldr	r3, .L220+12
+	ldr	r0, .L220+100
 	ldr	r3, [r3]
 	ldrh	r1, [r3, #16]
 	ubfx	r1, r1, #3, #1
 	bl	printf
-.L116:
+.L118:
 	ldr	r3, [r4]
 	lsls	r3, r3, #19
-	bpl	.L117
-	ldr	r3, .L218+12
-	ldr	r0, .L218+104
+	bpl	.L119
+	ldr	r3, .L220+12
+	ldr	r0, .L220+104
 	ldr	r3, [r3]
 	ldrh	r1, [r3, #16]
 	ubfx	r1, r1, #4, #1
 	bl	printf
-.L117:
+.L119:
 	ldr	r3, [r4]
 	lsls	r5, r3, #19
-	bpl	.L118
-	ldr	r3, .L218+12
-	ldr	r0, .L218+108
+	bpl	.L120
+	ldr	r3, .L220+12
+	ldr	r0, .L220+108
 	ldr	r3, [r3]
 	ldrh	r1, [r3, #16]
 	ubfx	r1, r1, #5, #1
 	bl	printf
-.L118:
+.L120:
 	ldr	r3, [r4]
 	lsls	r0, r3, #19
-	bpl	.L119
-	ldr	r3, .L218+12
-	ldr	r0, .L218+112
+	bpl	.L121
+	ldr	r3, .L220+12
+	ldr	r0, .L220+112
 	ldr	r3, [r3]
 	ldrh	r1, [r3, #16]
 	ubfx	r1, r1, #6, #1
 	bl	printf
-.L119:
+.L121:
 	ldr	r3, [r4]
 	lsls	r1, r3, #19
-	bpl	.L120
-	ldr	r3, .L218+12
-	ldr	r0, .L218+116
+	bpl	.L122
+	ldr	r3, .L220+12
+	ldr	r0, .L220+116
 	ldr	r3, [r3]
 	ldrh	r1, [r3, #16]
 	ubfx	r1, r1, #7, #1
 	bl	printf
-.L120:
+.L122:
 	ldr	r3, [r4]
 	lsls	r2, r3, #19
-	bpl	.L121
-	ldr	r3, .L218+12
-	ldr	r0, .L218+120
+	bpl	.L123
+	ldr	r3, .L220+12
+	ldr	r0, .L220+120
 	ldr	r3, [r3]
 	ldrh	r1, [r3, #16]
 	ubfx	r1, r1, #8, #1
 	bl	printf
-.L121:
+.L123:
 	ldr	r3, [r4]
 	lsls	r3, r3, #19
-	bpl	.L122
-	ldr	r3, .L218+12
-	ldr	r0, .L218+124
+	bpl	.L124
+	ldr	r3, .L220+12
+	ldr	r0, .L220+124
 	ldr	r3, [r3]
 	ldrh	r1, [r3, #16]
 	ubfx	r1, r1, #9, #1
 	bl	printf
-.L122:
+.L124:
 	ldr	r3, [r4]
 	lsls	r5, r3, #19
-	bpl	.L123
-	ldr	r3, .L218+12
-	ldr	r0, .L218+128
+	bpl	.L125
+	ldr	r3, .L220+12
+	ldr	r0, .L220+128
 	ldr	r3, [r3]
 	ldrh	r1, [r3, #16]
 	ubfx	r1, r1, #10, #1
 	bl	printf
-.L123:
+.L125:
 	ldr	r3, [r4]
 	lsls	r0, r3, #19
-	bpl	.L124
-	ldr	r3, .L218+132
-	ldr	r0, .L218+136
+	bpl	.L126
+	ldr	r3, .L220+132
+	ldr	r0, .L220+136
 	ldrb	r2, [r3]	@ zero_extendqisi2
-	ldr	r3, .L218+68
+	ldr	r3, .L220+68
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	bl	printf
-.L124:
+.L126:
 	ldr	r3, [r4]
 	lsls	r1, r3, #19
-	bpl	.L125
-	ldr	r3, .L218+140
-	ldr	r0, .L218+144
+	bpl	.L127
+	ldr	r3, .L220+140
+	ldr	r0, .L220+144
 	ldrb	r2, [r3, #11]	@ zero_extendqisi2
 	ldrb	r1, [r3, #10]	@ zero_extendqisi2
 	bl	printf
-.L125:
+.L127:
 	ldr	r3, [r4]
 	lsls	r2, r3, #19
-	bpl	.L126
-	ldr	r3, .L218+140
-	ldr	r0, .L218+148
+	bpl	.L128
+	ldr	r3, .L220+140
+	ldr	r0, .L220+148
 	ldrb	r2, [r3, #9]	@ zero_extendqisi2
-	b	.L219
-.L220:
+	b	.L221
+.L222:
 	.align	2
-.L218:
+.L220:
 	.word	.LANCHOR14
 	.word	.LANCHOR15
 	.word	.LC1
@@ -1014,27 +1003,27 @@ nand_flash_print_info:
 	.word	.LANCHOR20
 	.word	.LC29
 	.word	.LC30
-.L219:
+.L221:
 	ldrb	r1, [r3, #8]	@ zero_extendqisi2
 	bl	printf
-.L126:
+.L128:
 	ldr	r3, [r4]
 	lsls	r3, r3, #19
-	bpl	.L96
-	ldr	r3, .L221
-	ldr	r0, .L221+4
+	bpl	.L98
+	ldr	r3, .L223
+	ldr	r0, .L223+4
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	add	sp, sp, #20
 	@ sp needed
 	pop	{r4, r5, lr}
 	b	printf
-.L96:
+.L98:
 	add	sp, sp, #20
 	@ sp needed
 	pop	{r4, r5, pc}
-.L222:
+.L224:
 	.align	2
-.L221:
+.L223:
 	.word	.LANCHOR21
 	.word	.LC31
 	.size	nand_flash_print_info, .-nand_flash_print_info
@@ -1053,12 +1042,12 @@ timer_delay_ns:
 	lsrs	r0, r0, #4
 	sub	sp, sp, #8
 	str	r0, [sp, #4]
-.L224:
+.L226:
 	ldr	r3, [sp, #4]
 	subs	r2, r3, #1
 	str	r2, [sp, #4]
 	cmp	r3, #0
-	bne	.L224
+	bne	.L226
 	add	sp, sp, #8
 	@ sp needed
 	bx	lr
@@ -1097,48 +1086,48 @@ toshiba_set_rr_para:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	add	r6, r1, r1, lsl #2
-	ldr	r8, .L235+16
+	ldr	r8, .L237+16
 	mov	r5, r0
 	movs	r4, #0
-	ldr	r7, .L235
-.L228:
+	ldr	r7, .L237
+.L230:
 	ldrb	r3, [r8]	@ zero_extendqisi2
 	cmp	r4, r3
-	bcc	.L232
+	bcc	.L234
 	pop	{r4, r5, r6, r7, r8, pc}
-.L232:
+.L234:
 	movs	r3, #85
 	movs	r0, #200
 	str	r3, [r5, #8]
 	ldrsb	r3, [r4, r7]
 	str	r3, [r5, #4]
 	bl	timer_delay_ns
-	ldr	r3, .L235+4
+	ldr	r3, .L237+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #34
-	bne	.L229
+	bne	.L231
 	adds	r3, r4, r6
 	add	r3, r3, r7
-.L234:
+.L236:
 	ldrsb	r3, [r3, #5]
-.L233:
+.L235:
 	str	r3, [r5]
 	adds	r4, r4, #1
-	b	.L228
-.L229:
+	b	.L230
+.L231:
 	cmp	r3, #35
-	bne	.L231
-	ldr	r3, .L235+8
+	bne	.L233
+	ldr	r3, .L237+8
 	adds	r2, r4, r6
 	add	r3, r3, r2
-	b	.L234
-.L231:
-	ldr	r3, .L235+12
+	b	.L236
+.L233:
+	ldr	r3, .L237+12
 	ldrsb	r3, [r3, r1]
-	b	.L233
-.L236:
+	b	.L235
+.L238:
 	.align	2
-.L235:
+.L237:
 	.word	.LANCHOR22
 	.word	.LANCHOR23
 	.word	.LANCHOR24
@@ -1155,10 +1144,10 @@ toshiba_set_rr_para:
 hynix_set_rr_para:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L242
+	ldr	r3, .L244
 	push	{r4, r5, r6, r7, r8, lr}
 	lsls	r6, r0, #8
-	ldr	r4, .L242+4
+	ldr	r4, .L244+4
 	ldr	r3, [r3]
 	ldr	r7, [r4]
 	ldrb	r2, [r3, #113]	@ zero_extendqisi2
@@ -1180,24 +1169,24 @@ hynix_set_rr_para:
 	adds	r4, r7, r6
 	subs	r1, r1, #1
 	str	r0, [r4, #2056]
-.L240:
+.L242:
 	cmp	r5, r8
-	bne	.L241
+	bne	.L243
 	add	r6, r6, r7
 	movs	r3, #22
 	str	r3, [r6, #2056]
 	pop	{r4, r5, r6, r7, r8, pc}
-.L241:
+.L243:
 	ldrb	r3, [r5, #1]!	@ zero_extendqisi2
 	movs	r0, #120
 	str	r3, [r4, #2052]
 	bl	timer_delay_ns
 	ldrsb	r3, [r1, #1]!
 	str	r3, [r4, #2048]
-	b	.L240
-.L243:
+	b	.L242
+.L245:
 	.align	2
-.L242:
+.L244:
 	.word	.LANCHOR27
 	.word	.LANCHOR13
 	.size	hynix_set_rr_para, .-hynix_set_rr_para
@@ -1214,27 +1203,27 @@ hynix_reconfig_rr_para:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	mov	r4, r0
-	ldr	r3, .L249
+	ldr	r3, .L251
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	cmp	r3, #7
-	bhi	.L244
-	ldr	r5, .L249+4
+	bhi	.L246
+	ldr	r5, .L251+4
 	ldr	r3, [r5]
 	add	r3, r3, r0
 	ldrb	r3, [r3, #120]	@ zero_extendqisi2
-	cbz	r3, .L244
+	cbz	r3, .L246
 	movs	r1, #0
 	bl	hynix_set_rr_para
 	ldr	r0, [r5]
 	movs	r3, #0
 	add	r0, r0, r4
 	strb	r3, [r0, #120]
-.L244:
+.L246:
 	pop	{r3, r4, r5, pc}
-.L250:
+.L252:
 	.align	2
-.L249:
+.L251:
 	.word	.LANCHOR23
 	.word	.LANCHOR27
 	.size	hynix_reconfig_rr_para, .-hynix_reconfig_rr_para
@@ -1250,8 +1239,8 @@ nandc_set_ddr_para:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L254
-	ldr	r2, .L254+4
+	ldr	r3, .L256
+	ldr	r2, .L256+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	ldr	r2, [r2]
 	cmp	r3, #9
@@ -1263,9 +1252,9 @@ nandc_set_ddr_para:
 	streq	r3, [r2, #80]
 	strne	r3, [r2, #304]
 	bx	lr
-.L255:
+.L257:
 	.align	2
-.L254:
+.L256:
 	.word	.LANCHOR28
 	.word	.LANCHOR13
 	.size	nandc_set_ddr_para, .-nandc_set_ddr_para
@@ -1281,19 +1270,19 @@ nandc_get_ddr_para:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L260
+	ldr	r3, .L262
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #9
-	ldr	r3, .L260+4
+	ldr	r3, .L262+4
 	ldr	r3, [r3]
 	ite	eq
 	ldreq	r0, [r3, #80]
 	ldrne	r0, [r3, #304]
 	ubfx	r0, r0, #8, #8
 	bx	lr
-.L261:
+.L263:
 	.align	2
-.L260:
+.L262:
 	.word	.LANCHOR28
 	.word	.LANCHOR13
 	.size	nandc_get_ddr_para, .-nandc_get_ddr_para
@@ -1309,13 +1298,13 @@ nandc_set_if_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L270
+	ldr	r3, .L272
 	ands	r1, r0, #6
 	ldr	r3, [r3]
 	ldr	r2, [r3]
-	beq	.L263
+	beq	.L265
 	lsls	r1, r0, #29
-	ldr	r1, .L270+4
+	ldr	r1, .L272+4
 	orr	r2, r2, #24576
 	bfc	r2, #15, #1
 	ldrb	r1, [r1]	@ zero_extendqisi2
@@ -1323,8 +1312,8 @@ nandc_set_if_mode:
 	it	mi
 	orrmi	r2, r2, #32768
 	cmp	r1, #9
-	ldr	r1, .L270+8
-	bne	.L265
+	ldr	r1, .L272+8
+	bne	.L267
 	movw	r0, #8321
 	str	r0, [r3, #8]
 	str	r1, [r3, #80]
@@ -1332,10 +1321,10 @@ nandc_set_if_mode:
 	str	r1, [r3, #84]
 	movs	r1, #39
 	str	r1, [r3, #84]
-.L266:
+.L268:
 	str	r2, [r3]
 	bx	lr
-.L265:
+.L267:
 	movw	r0, #8322
 	str	r0, [r3, #344]
 	str	r1, [r3, #304]
@@ -1343,13 +1332,13 @@ nandc_set_if_mode:
 	str	r1, [r3, #308]
 	movs	r1, #39
 	str	r1, [r3, #308]
-	b	.L266
-.L263:
+	b	.L268
+.L265:
 	bfi	r2, r1, #13, #1
-	b	.L266
-.L271:
+	b	.L268
+.L273:
 	.align	2
-.L270:
+.L272:
 	.word	.LANCHOR13
 	.word	.LANCHOR28
 	.word	1052675
@@ -1366,7 +1355,7 @@ nandc_cs:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L273
+	ldr	r3, .L275
 	movs	r2, #1
 	lsl	r0, r2, r0
 	ldr	r1, [r3]
@@ -1374,9 +1363,9 @@ nandc_cs:
 	bfi	r3, r0, #0, #8
 	str	r3, [r1]
 	bx	lr
-.L274:
+.L276:
 	.align	2
-.L273:
+.L275:
 	.word	.LANCHOR13
 	.size	nandc_cs, .-nandc_cs
 	.section	.text.flash_wait_device_ready_raw,"ax",%progbits
@@ -1390,30 +1379,30 @@ nandc_cs:
 flash_wait_device_ready_raw:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L281
+	ldr	r3, .L283
 	push	{r4, r5, r6, r7, r8, lr}
 	mov	r4, r0
 	mov	r5, r1
 	mov	r6, r2
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r0
-	bhi	.L276
-	movw	r2, #678
-	ldr	r1, .L281+4
-	ldr	r0, .L281+8
+	bhi	.L278
+	movw	r2, #691
+	ldr	r1, .L283+4
+	ldr	r0, .L283+8
 	bl	printf
-.L276:
-	ldr	r3, .L281+12
+.L278:
+	ldr	r3, .L283+12
 	lsrs	r7, r5, #16
 	ldrb	r8, [r3, r4]	@ zero_extendqisi2
-	ldr	r3, .L281+16
+	ldr	r3, .L283+16
 	mov	r0, r8
 	ldr	r4, [r3]
 	bl	nandc_cs
 	lsrs	r1, r5, #8
 	uxtb	r5, r5
 	add	r4, r4, r8, lsl #8
-.L279:
+.L281:
 	movs	r0, #120
 	str	r0, [r4, #2056]
 	str	r5, [r4, #2052]
@@ -1423,14 +1412,14 @@ flash_wait_device_ready_raw:
 	ldr	r0, [r4, #2048]
 	uxtb	r0, r0
 	bics	r3, r6, r0
-	bne	.L279
+	bne	.L281
 	cmp	r0, #255
-	beq	.L279
-	bl	nandc_de_cs.constprop.29
+	beq	.L281
+	bl	nandc_de_cs.constprop.30
 	pop	{r4, r5, r6, r7, r8, pc}
-.L282:
+.L284:
 	.align	2
-.L281:
+.L283:
 	.word	.LANCHOR18
 	.word	.LANCHOR29
 	.word	.LC0
@@ -1448,49 +1437,60 @@ flash_wait_device_ready_raw:
 flash_wait_device_ready:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	tst	r0, #50331648
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	mov	r10, r1
-	ubfx	r4, r0, #0, #21
-	ubfx	r8, r0, #21, #3
-	bne	.L284
-	ldr	r3, .L293
-	ldr	r6, .L293+4
+	tst	r0, #50331648
+	ldr	r3, .L295
+	mov	r7, r1
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	mov	r3, #1
+	rsb	r6, r5, #24
+	lsl	r5, r3, r5
+	lsl	r4, r3, r6
+	asr	r6, r0, r6
+	add	r5, r5, #-1
+	add	r4, r4, #-1
+	and	r5, r5, r6
+	and	r4, r4, r0
+	uxtb	r5, r5
+	bne	.L286
+	ldr	r3, .L295+4
+	ldr	r10, .L295+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L285
-	ldrb	r3, [r6]	@ zero_extendqisi2
-	cbz	r3, .L284
-.L285:
-	ldr	r3, .L293+8
+	cbz	r3, .L287
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	cbz	r3, .L286
+.L287:
+	ldr	r3, .L295+8
 	mov	r0, r4
-	ldrh	r5, [r3]
-	mov	r1, r5
+	ldrh	r6, [r3]
+	mov	r1, r6
 	bl	__aeabi_uidiv
-	mov	r1, r5
-	mul	r7, r5, r0
+	mov	r1, r6
+	mul	r8, r6, r0
 	mov	r0, r4
 	bl	__aeabi_uidivmod
-	ldrb	r3, [r6]	@ zero_extendqisi2
-	cbz	r3, .L286
-	add	r4, r7, r1, lsl #1
-.L284:
-	mov	r2, r10
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	cbz	r3, .L288
+	add	r4, r8, r1, lsl #1
+.L286:
+	mov	r2, r7
 	mov	r1, r4
-	mov	r0, r8
+	mov	r0, r5
 	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
 	b	flash_wait_device_ready_raw
-.L286:
-	ldr	r3, .L293+12
+.L288:
+	ldr	r3, .L295+12
 	ldrh	r4, [r3, r1, lsl #1]
-	add	r4, r4, r7
-	b	.L284
-.L294:
+	add	r4, r4, r8
+	b	.L286
+.L296:
 	.align	2
-.L293:
+.L295:
+	.word	.LANCHOR31
 	.word	.LANCHOR0
-	.word	.LANCHOR1
 	.word	.LANCHOR2
 	.word	.LANCHOR3
+	.word	.LANCHOR1
 	.size	flash_wait_device_ready, .-flash_wait_device_ready
 	.section	.text.nandc_de_cs,"ax",%progbits
 	.align	1
@@ -1504,16 +1504,16 @@ nandc_de_cs:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L296
+	ldr	r3, .L298
 	ldr	r2, [r3]
 	ldr	r3, [r2]
 	bfc	r3, #0, #8
 	bfc	r3, #17, #1
 	str	r3, [r2]
 	bx	lr
-.L297:
+.L299:
 	.align	2
-.L296:
+.L298:
 	.word	.LANCHOR13
 	.size	nandc_de_cs, .-nandc_de_cs
 	.section	.text.nandc_wait_flash_ready_no_delay,"ax",%progbits
@@ -1528,30 +1528,30 @@ nandc_wait_flash_ready_no_delay:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, lr}
-	ldr	r1, .L303
-	ldr	r4, .L303+4
-.L300:
+	ldr	r1, .L305
+	ldr	r4, .L305+4
+.L302:
 	ldr	r3, [r4]
 	ldr	r3, [r3]
 	str	r3, [sp, #4]
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #22
-	bmi	.L301
+	bmi	.L303
 	movs	r0, #10
 	bl	timer_delay_ns
 	subs	r1, r1, #1
-	bne	.L300
+	bne	.L302
 	mov	r0, #-1
-.L298:
+.L300:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, pc}
-.L301:
+.L303:
 	movs	r0, #0
-	b	.L298
-.L304:
+	b	.L300
+.L306:
 	.align	2
-.L303:
+.L305:
 	.word	100000
 	.word	.LANCHOR13
 	.size	nandc_wait_flash_ready_no_delay, .-nandc_wait_flash_ready_no_delay
@@ -1566,37 +1566,37 @@ nandc_wait_flash_ready_no_delay:
 zftl_flash_enter_slc_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L326
+	ldr	r3, .L328
 	push	{r4, lr}
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L305
-	ldr	r2, .L326+4
+	beq	.L307
+	ldr	r2, .L328+4
 	cmp	r3, #1
 	ldr	r4, [r2]
-	bne	.L308
-.L325:
-	ldr	r3, .L326+8
+	bne	.L310
+.L327:
+	ldr	r3, .L328+8
 	ldrb	r3, [r3, #29]	@ zero_extendqisi2
-	cbz	r3, .L305
+	cbz	r3, .L307
 	add	r4, r4, r0, lsl #8
 	str	r3, [r4, #2056]
 	pop	{r4, pc}
-.L308:
+.L310:
 	cmp	r3, #2
-	bne	.L310
-	ldr	r3, .L326+12
+	bne	.L312
+	ldr	r3, .L328+12
 	ldrb	r2, [r3, r0]	@ zero_extendqisi2
-	cbz	r2, .L305
+	cbz	r2, .L307
 	movs	r2, #0
 	strb	r2, [r3, r0]
-	b	.L325
-.L310:
+	b	.L327
+.L312:
 	cmp	r3, #3
-	bne	.L305
-	ldr	r3, .L326+12
+	bne	.L307
+	ldr	r3, .L328+12
 	ldrb	r2, [r3, r0]	@ zero_extendqisi2
-	cbz	r2, .L305
+	cbz	r2, .L307
 	add	r4, r4, r0, lsl #8
 	movs	r1, #0
 	strb	r1, [r3, r0]
@@ -1620,15 +1620,15 @@ zftl_flash_enter_slc_mode:
 	bl	timer_delay_ns
 	pop	{r4, lr}
 	b	nandc_wait_flash_ready_no_delay
-.L305:
+.L307:
 	pop	{r4, pc}
-.L327:
+.L329:
 	.align	2
-.L326:
+.L328:
 	.word	.LANCHOR0
 	.word	.LANCHOR13
-	.word	.LANCHOR31
 	.word	.LANCHOR32
+	.word	.LANCHOR33
 	.size	zftl_flash_enter_slc_mode, .-zftl_flash_enter_slc_mode
 	.section	.text.zftl_flash_exit_slc_mode,"ax",%progbits
 	.align	1
@@ -1641,46 +1641,46 @@ zftl_flash_enter_slc_mode:
 zftl_flash_exit_slc_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L351
+	ldr	r3, .L353
 	mov	r1, r0
 	push	{r4, r5, r6, r7, r8, lr}
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L328
-	ldr	r2, .L351+4
+	beq	.L330
+	ldr	r2, .L353+4
 	cmp	r3, #1
 	ldr	r5, [r2]
-	bne	.L331
-	ldr	r3, .L351+8
+	bne	.L333
+	ldr	r3, .L353+8
 	ldrb	r3, [r3, #30]	@ zero_extendqisi2
-.L350:
+.L352:
 	cmp	r3, #0
-	beq	.L328
+	beq	.L330
 	add	r1, r5, r1, lsl #8
 	str	r3, [r1, #2056]
 	pop	{r4, r5, r6, r7, r8, pc}
-.L331:
+.L333:
 	cmp	r3, #2
-	bne	.L333
-	ldr	r0, .L351+12
+	bne	.L335
+	ldr	r0, .L353+12
 	ldrb	r3, [r0, r1]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L328
-	ldr	r2, .L351+8
+	bne	.L330
+	ldr	r2, .L353+8
 	ldrb	r3, [r2, #12]	@ zero_extendqisi2
 	cmp	r3, #2
 	it	ne
 	movne	r3, #4
 	strb	r3, [r0, r1]
 	ldrb	r3, [r2, #30]	@ zero_extendqisi2
-	b	.L350
-.L333:
+	b	.L352
+.L335:
 	cmp	r3, #3
-	bne	.L328
-	ldr	r6, .L351+12
+	bne	.L330
+	ldr	r6, .L353+12
 	ldrb	r3, [r6, r0]	@ zero_extendqisi2
-	cbnz	r3, .L328
-	ldr	r8, .L351+8
+	cbnz	r3, .L330
+	ldr	r8, .L353+8
 	lsls	r7, r0, #8
 	adds	r4, r5, r7
 	add	r5, r5, r7
@@ -1715,15 +1715,15 @@ zftl_flash_exit_slc_mode:
 	bl	timer_delay_ns
 	pop	{r4, r5, r6, r7, r8, lr}
 	b	nandc_wait_flash_ready_no_delay
-.L328:
+.L330:
 	pop	{r4, r5, r6, r7, r8, pc}
-.L352:
+.L354:
 	.align	2
-.L351:
+.L353:
 	.word	.LANCHOR0
 	.word	.LANCHOR13
-	.word	.LANCHOR31
 	.word	.LANCHOR32
+	.word	.LANCHOR33
 	.size	zftl_flash_exit_slc_mode, .-zftl_flash_exit_slc_mode
 	.section	.text.flash_start_page_read,"ax",%progbits
 	.align	1
@@ -1737,74 +1737,96 @@ flash_start_page_read:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	ubfx	r4, r1, #21, #3
-	ldr	r3, .L361
-	mov	r7, r0
-	ubfx	r5, r1, #0, #21
-	ubfx	r8, r1, #24, #2
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, r4
-	bhi	.L354
-	movw	r2, #846
-	ldr	r1, .L361+4
-	ldr	r0, .L361+8
+	mov	r6, r0
+	ldr	r3, .L364
+	mov	r10, r1
+	ldr	r4, .L364+4
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	movs	r3, #1
+	rsb	r7, r2, #24
+	lsls	r3, r3, r2
+	lsr	r2, r1, r7
+	subs	r3, r3, #1
+	ands	r3, r3, r2
+	ldrb	r2, [r4]	@ zero_extendqisi2
+	uxtb	r8, r3
+	cmp	r2, r8
+	bhi	.L356
+	movw	r2, #866
+	ldr	r1, .L364+8
+	ldr	r0, .L364+12
 	bl	printf
-.L354:
-	ldr	r3, .L361+12
-	ldrb	r6, [r3, r4]	@ zero_extendqisi2
-	ldr	r3, .L361+16
-	mov	r0, r6
-	ldr	r4, [r3]
-	lsl	r10, r6, #8
+.L356:
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	cmp	r3, r8
+	bls	.L355
+	ldr	r3, .L364+16
+	movs	r4, #1
+	lsls	r4, r4, r7
+	ldrb	r7, [r3, r8]	@ zero_extendqisi2
+	subs	r4, r4, #1
+	ldr	r3, .L364+20
+	and	r4, r4, r10
+	ubfx	r10, r10, #24, #2
+	mov	r0, r7
+	ldr	r5, [r3]
+	lsl	r8, r7, #8
 	bl	nandc_cs
-	cmp	r8, #0
-	bne	.L355
-	mov	r0, r5
+	cmp	r10, #0
+	bne	.L358
+	mov	r0, r4
 	bl	slc_phy_page_address_calc
-	ldr	r3, .L361+20
-	mov	r5, r0
+	ldr	r3, .L364+24
+	mov	r4, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L356
-	mov	r0, r6
+	cbz	r3, .L359
+	mov	r0, r7
 	bl	zftl_flash_enter_slc_mode
-.L356:
-	add	r3, r4, r10
+.L359:
+	add	r3, r5, r8
 	movs	r2, #0
 	str	r2, [r3, #2056]
 	str	r2, [r3, #2052]
 	str	r2, [r3, #2052]
-	uxtb	r2, r5
+	uxtb	r2, r4
 	str	r2, [r3, #2052]
-	lsrs	r2, r5, #8
-	lsrs	r5, r5, #16
+	lsrs	r2, r4, #8
+	lsrs	r4, r4, #16
 	str	r2, [r3, #2052]
-	str	r5, [r3, #2052]
-	str	r7, [r3, #2056]
+	str	r4, [r3, #2052]
+	str	r6, [r3, #2056]
 	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
-	b	nandc_de_cs.constprop.29
-.L355:
-	ldr	r3, .L361+24
+	b	nandc_de_cs.constprop.30
+.L358:
+	ldr	r3, .L364+28
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #12]	@ zero_extendqisi2
 	cmp	r3, #3
-	bne	.L357
-	add	r3, r4, r10
-	str	r8, [r3, #2056]
-	b	.L356
-.L357:
-	mov	r0, r6
+	bne	.L360
+	ldr	r3, .L364+32
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L360
+	add	r3, r5, r8
+	str	r10, [r3, #2056]
+	b	.L359
+.L360:
+	mov	r0, r7
 	bl	zftl_flash_exit_slc_mode
-	b	.L356
-.L362:
+	b	.L359
+.L355:
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L365:
 	.align	2
-.L361:
+.L364:
+	.word	.LANCHOR31
 	.word	.LANCHOR18
-	.word	.LANCHOR33
+	.word	.LANCHOR34
 	.word	.LC0
 	.word	.LANCHOR30
 	.word	.LANCHOR13
 	.word	.LANCHOR0
 	.word	.LANCHOR16
+	.word	.LANCHOR35
 	.size	flash_start_page_read, .-flash_start_page_read
 	.section	.text.nandc_wait_flash_ready,"ax",%progbits
 	.align	1
@@ -1820,30 +1842,30 @@ nandc_wait_flash_ready:
 	push	{r0, r1, r4, lr}
 	movs	r0, #150
 	bl	timer_delay_ns
-	ldr	r4, .L368
-	ldr	r1, .L368+4
-.L365:
+	ldr	r4, .L371
+	ldr	r1, .L371+4
+.L368:
 	ldr	r3, [r4]
 	ldr	r3, [r3]
 	str	r3, [sp, #4]
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #22
-	bmi	.L366
+	bmi	.L369
 	movs	r0, #10
 	bl	timer_delay_ns
 	subs	r1, r1, #1
-	bne	.L365
+	bne	.L368
 	mov	r0, #-1
-.L363:
+.L366:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, pc}
-.L366:
-	movs	r0, #0
-	b	.L363
 .L369:
+	movs	r0, #0
+	b	.L366
+.L372:
 	.align	2
-.L368:
+.L371:
 	.word	.LANCHOR13
 	.word	100000
 	.size	nandc_wait_flash_ready, .-nandc_wait_flash_ready
@@ -1866,20 +1888,20 @@ sandisk_set_rr_para:
 	str	r3, [r0, #4]
 	movs	r0, #200
 	bl	timer_delay_ns
-	ldr	r3, .L376
+	ldr	r3, .L379
 	add	r1, r1, r1, lsl #2
-	ldr	r6, .L376+4
+	ldr	r6, .L379+4
 	movs	r2, #0
-	ldr	r7, .L376+8
+	ldr	r7, .L379+8
 	ldrb	r0, [r3]	@ zero_extendqisi2
-	ldr	r3, .L376+12
+	ldr	r3, .L379+12
 	ldrb	r5, [r3]	@ zero_extendqisi2
-.L371:
+.L374:
 	cmp	r2, r0
-	bcc	.L374
+	bcc	.L377
 	pop	{r3, r4, r5, r6, r7, lr}
 	b	nandc_wait_flash_ready
-.L374:
+.L377:
 	adds	r3, r2, r1
 	cmp	r5, #67
 	ite	eq
@@ -1888,10 +1910,10 @@ sandisk_set_rr_para:
 	ldrsb	r3, [r3, #5]
 	adds	r2, r2, #1
 	str	r3, [r4]
-	b	.L371
-.L377:
+	b	.L374
+.L380:
 	.align	2
-.L376:
+.L379:
 	.word	.LANCHOR26
 	.word	.LANCHOR24
 	.word	.LANCHOR22
@@ -1918,7 +1940,7 @@ toshiba_3d_set_tlc_rr_para:
 	rsb	r1, r1, r1, lsl #3
 	str	r6, [r0, #4]
 	str	r3, [r0, #4]
-	ldr	r3, .L379
+	ldr	r3, .L382
 	adds	r5, r3, r1
 	ldrsb	r3, [r3, r1]
 	str	r3, [r0]
@@ -1942,10 +1964,10 @@ toshiba_3d_set_tlc_rr_para:
 	str	r6, [r4]
 	pop	{r3, r4, r5, r6, r7, lr}
 	b	nandc_wait_flash_ready
-.L380:
+.L383:
 	.align	2
-.L379:
-	.word	.LANCHOR34
+.L382:
+	.word	.LANCHOR36
 	.size	toshiba_3d_set_tlc_rr_para, .-toshiba_3d_set_tlc_rr_para
 	.section	.text.toshiba_3d_set_slc_rr_para,"ax",%progbits
 	.align	1
@@ -1965,7 +1987,7 @@ toshiba_3d_set_slc_rr_para:
 	movs	r3, #0
 	str	r3, [r0, #4]
 	str	r2, [r0, #4]
-	ldr	r2, .L382
+	ldr	r2, .L385
 	add	r1, r1, r2
 	ldrsb	r2, [r1, #1]
 	str	r2, [r0]
@@ -1973,10 +1995,10 @@ toshiba_3d_set_slc_rr_para:
 	str	r3, [r0]
 	str	r3, [r0]
 	b	nandc_wait_flash_ready
-.L383:
+.L386:
 	.align	2
-.L382:
-	.word	.LANCHOR35
+.L385:
+	.word	.LANCHOR37
 	.size	toshiba_3d_set_slc_rr_para, .-toshiba_3d_set_slc_rr_para
 	.section	.text.toshiba_tlc_set_rr_para,"ax",%progbits
 	.align	1
@@ -1993,11 +2015,11 @@ toshiba_tlc_set_rr_para:
 	movs	r6, #239
 	mov	r4, r0
 	str	r6, [r0, #8]
-	cbz	r2, .L385
+	cbz	r2, .L388
 	movs	r3, #18
 	rsb	r1, r1, r1, lsl #3
 	str	r3, [r0, #4]
-	ldr	r3, .L387
+	ldr	r3, .L390
 	adds	r5, r3, r1
 	ldrb	r3, [r3, r1]	@ zero_extendqisi2
 	str	r3, [r0]
@@ -2019,24 +2041,24 @@ toshiba_tlc_set_rr_para:
 	str	r3, [r4]
 	movs	r3, #0
 	str	r3, [r4]
-.L386:
+.L389:
 	pop	{r4, r5, r6, lr}
 	b	nandc_wait_flash_ready
-.L385:
+.L388:
 	movs	r3, #20
 	str	r3, [r0, #4]
-	ldr	r3, .L387+4
+	ldr	r3, .L390+4
 	ldrb	r3, [r3, r1]	@ zero_extendqisi2
 	str	r3, [r0]
 	str	r2, [r0]
 	str	r2, [r0]
 	str	r2, [r0]
-	b	.L386
-.L388:
+	b	.L389
+.L391:
 	.align	2
-.L387:
-	.word	.LANCHOR36
-	.word	.LANCHOR37
+.L390:
+	.word	.LANCHOR38
+	.word	.LANCHOR39
 	.size	toshiba_tlc_set_rr_para, .-toshiba_tlc_set_rr_para
 	.section	.text.flash_erase_duplane_block,"ax",%progbits
 	.align	1
@@ -2050,105 +2072,111 @@ flash_erase_duplane_block:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r5, r2
+	ldr	r4, .L408
+	mov	r7, r0
+	mov	r6, r1
 	mov	r8, r3
-	ldr	r3, .L403
-	mov	r4, r0
-	mov	r5, r1
-	mov	r6, r2
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, r0
-	bhi	.L390
-	movw	r2, #589
-	ldr	r1, .L403+4
-	ldr	r0, .L403+8
+	ldrb	r2, [r4]	@ zero_extendqisi2
+	cmp	r2, r0
+	bhi	.L393
+	movw	r2, #598
+	ldr	r1, .L408+4
+	ldr	r0, .L408+8
 	bl	printf
-.L390:
-	ldr	r3, .L403+12
-	ldrb	r4, [r3, r4]	@ zero_extendqisi2
-	ldr	r3, .L403+16
+.L393:
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	cmp	r3, r7
+	bls	.L400
+	ldr	r3, .L408+12
+	ldrb	r4, [r3, r7]	@ zero_extendqisi2
+	ldr	r3, .L408+16
 	add	r7, r4, #8
 	ldr	r10, [r3]
-	ldr	r3, .L403+20
+	ldr	r3, .L408+20
 	ldr	r3, [r3]
 	add	r7, r10, r7, lsl #8
 	lsls	r3, r3, #27
-	bpl	.L391
+	bpl	.L395
 	mov	r3, r8
-	mov	r2, r6
+	mov	r2, r5
 	mov	r1, r4
-	ldr	r0, .L403+24
+	ldr	r0, .L408+24
 	bl	printf
-.L391:
+.L395:
 	bl	nandc_wait_flash_ready
 	mov	r0, r4
 	bl	nandc_cs
 	mov	r0, r4
-	cmp	r5, #0
-	bne	.L392
+	cmp	r6, #0
+	bne	.L396
 	bl	zftl_flash_enter_slc_mode
-.L393:
+.L397:
 	lsls	r4, r4, #8
 	movs	r3, #96
-	add	r5, r10, r4
-	str	r3, [r5, #2056]
-	uxtb	r3, r6
-	str	r3, [r5, #2052]
-	lsrs	r3, r6, #8
-	str	r3, [r5, #2052]
-	lsrs	r3, r6, #16
-	str	r3, [r5, #2052]
-	ldr	r3, .L403+28
+	add	r6, r10, r4
+	str	r3, [r6, #2056]
+	uxtb	r3, r5
+	str	r3, [r6, #2052]
+	lsrs	r3, r5, #8
+	str	r3, [r6, #2052]
+	lsrs	r3, r5, #16
+	str	r3, [r6, #2052]
+	ldr	r3, .L408+28
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L396
+	cbnz	r3, .L401
 	movs	r3, #208
-	str	r3, [r5, #2056]
+	str	r3, [r6, #2056]
 	bl	nandc_wait_flash_ready
 	mov	r0, r7
 	bl	flash_read_status
 	and	fp, r0, #5
-.L394:
-	add	r1, r10, r4
+.L398:
+	add	r0, r10, r4
 	movs	r3, #96
-	str	r3, [r1, #2056]
+	str	r3, [r0, #2056]
 	uxtb	r3, r8
-	str	r3, [r5, #2052]
+	lsr	r2, r8, #16
+	str	r3, [r6, #2052]
 	lsr	r3, r8, #8
-	str	r3, [r5, #2052]
-	lsr	r3, r8, #16
-	str	r3, [r5, #2052]
+	str	r3, [r6, #2052]
 	movs	r3, #208
-	str	r3, [r1, #2056]
+	str	r2, [r6, #2052]
+	str	r3, [r0, #2056]
 	bl	nandc_wait_flash_ready
 	mov	r0, r7
 	bl	flash_read_status
-	bl	nandc_de_cs.constprop.29
+	bl	nandc_de_cs.constprop.30
 	and	r3, r0, #5
 	orrs	fp, r3, fp
-	beq	.L395
+	beq	.L399
 	mov	r2, r0
-	mov	r1, r6
-	ldr	r0, .L403+32
+	mov	r1, r5
+	ldr	r0, .L408+32
 	bl	printf
-.L395:
+.L399:
 	mov	r0, fp
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L392:
-	bl	zftl_flash_exit_slc_mode
-	b	.L393
 .L396:
+	bl	zftl_flash_exit_slc_mode
+	b	.L397
+.L401:
 	mov	fp, #0
-	b	.L394
-.L404:
+	b	.L398
+.L400:
+	mov	r0, #-1
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L409:
 	.align	2
-.L403:
+.L408:
 	.word	.LANCHOR18
-	.word	.LANCHOR38
+	.word	.LANCHOR40
 	.word	.LC0
 	.word	.LANCHOR30
 	.word	.LANCHOR13
 	.word	.LANCHOR14
 	.word	.LC32
-	.word	.LANCHOR39
+	.word	.LANCHOR41
 	.word	.LC33
 	.size	flash_erase_duplane_block, .-flash_erase_duplane_block
 	.section	.text.flash_erase_block_en,"ax",%progbits
@@ -2162,81 +2190,94 @@ flash_erase_duplane_block:
 flash_erase_block_en:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L417
+	ldr	r3, .L424
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r7, r0
+	mov	r7, r2
+	ldr	r5, .L424+4
+	mov	r6, r0
 	mov	fp, r1
-	mov	r6, r2
-	ubfx	r8, r2, #0, #21
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, r0
-	bhi	.L406
-	movw	r2, #634
-	ldr	r1, .L417+4
-	ldr	r0, .L417+8
-	bl	printf
-.L406:
-	ldr	r3, .L417+12
-	ldrb	r5, [r3, r7]	@ zero_extendqisi2
-	ldr	r3, .L417+16
-	add	r10, r5, #8
-	ldr	r4, [r3]
-	ldr	r3, .L417+20
+	ldrb	r4, [r3]	@ zero_extendqisi2
+	rsb	r3, r4, #24
+	movs	r4, #1
+	lsls	r4, r4, r3
+	subs	r4, r4, #1
+	ands	r4, r4, r2
+	ldrb	r2, [r5]	@ zero_extendqisi2
+	cmp	r2, r0
+	bhi	.L411
+	movw	r2, #645
+	ldr	r1, .L424+8
+	ldr	r0, .L424+12
+	bl	printf
+.L411:
+	ldrb	r3, [r5]	@ zero_extendqisi2
+	cmp	r3, r6
+	bls	.L417
+	ldr	r3, .L424+16
+	ldrb	r8, [r3, r6]	@ zero_extendqisi2
+	ldr	r3, .L424+20
+	add	r10, r8, #8
+	ldr	r5, [r3]
+	ldr	r3, .L424+24
 	ldr	r3, [r3]
-	add	r10, r4, r10, lsl #8
+	add	r10, r5, r10, lsl #8
 	lsls	r3, r3, #27
-	bpl	.L407
+	bpl	.L413
 	mov	r3, fp
-	mov	r2, r6
-	mov	r1, r5
-	ldr	r0, .L417+24
+	mov	r2, r7
+	mov	r1, r8
+	ldr	r0, .L424+28
 	bl	printf
-.L407:
+.L413:
 	bl	nandc_wait_flash_ready
-	mov	r0, r5
+	mov	r0, r8
 	bl	nandc_cs
-	mov	r0, r5
+	mov	r0, r8
 	cmp	fp, #0
-	bne	.L408
+	bne	.L414
 	bl	zftl_flash_enter_slc_mode
-.L409:
-	add	r0, r4, r5, lsl #8
+.L415:
+	add	r0, r5, r8, lsl #8
 	movs	r3, #96
 	str	r3, [r0, #2056]
-	uxtb	r3, r6
-	str	r3, [r0, #2052]
-	lsr	r3, r8, #8
+	uxtb	r3, r4
 	str	r3, [r0, #2052]
-	lsr	r3, r8, #16
+	lsrs	r3, r4, #8
+	lsrs	r4, r4, #16
 	str	r3, [r0, #2052]
 	movs	r3, #208
+	str	r4, [r0, #2052]
 	str	r3, [r0, #2056]
 	bl	nandc_wait_flash_ready
 	mov	r0, r10
 	bl	flash_read_status
-	bl	nandc_de_cs.constprop.29
+	bl	nandc_de_cs.constprop.30
 	ands	r4, r0, #5
-	beq	.L410
-	ldr	r3, .L417+28
-	mov	r0, r6
+	beq	.L416
+	ldr	r3, .L424+32
+	mov	r0, r7
 	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
 	mov	r3, r4
 	mov	r2, r0
-	mov	r1, r7
-	ldr	r0, .L417+32
+	mov	r1, r6
+	ldr	r0, .L424+36
 	bl	printf
-.L410:
+.L416:
 	mov	r0, r4
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L408:
+.L414:
 	bl	zftl_flash_exit_slc_mode
-	b	.L409
-.L418:
-	.align	2
+	b	.L415
 .L417:
-	.word	.LANCHOR18
-	.word	.LANCHOR40
+	mov	r0, #-1
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L425:
+	.align	2
+.L424:
+	.word	.LANCHOR31
+	.word	.LANCHOR18
+	.word	.LANCHOR42
 	.word	.LC0
 	.word	.LANCHOR30
 	.word	.LANCHOR13
@@ -2272,46 +2313,46 @@ flash_erase_block:
 flash_erase_all:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L425
+	ldr	r3, .L432
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r5, #0
-	ldr	r7, .L425+4
+	ldr	r7, .L432+4
 	ldrb	r4, [r3, #13]	@ zero_extendqisi2
 	ldrh	r3, [r3, #14]
 	smulbb	r4, r4, r3
 	uxth	r4, r4
-.L421:
-	ldr	r3, .L425+8
+.L428:
+	ldr	r3, .L432+8
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	uxth	r3, r5
 	cmp	r2, r3
-	bhi	.L424
+	bhi	.L431
 	movs	r1, #0
-	ldr	r0, .L425+12
+	ldr	r0, .L432+12
 	pop	{r4, r5, r6, r7, r8, lr}
 	b	printf
-.L424:
-	ldr	r2, .L425+16
+.L431:
+	ldr	r2, .L432+16
 	uxth	r3, r5
 	movs	r6, #0
 	ldrb	r8, [r2, r3]	@ zero_extendqisi2
-.L422:
+.L429:
 	uxth	r3, r6
 	cmp	r4, r3
-	bhi	.L423
+	bhi	.L430
 	adds	r5, r5, #1
-	b	.L421
-.L423:
+	b	.L428
+.L430:
 	ldrh	r1, [r7]
 	mov	r0, r8
 	muls	r1, r6, r1
 	adds	r6, r6, #1
 	bl	flash_erase_block
-	b	.L422
-.L426:
+	b	.L429
+.L433:
 	.align	2
-.L425:
-	.word	.LANCHOR31
+.L432:
+	.word	.LANCHOR32
 	.word	.LANCHOR2
 	.word	.LANCHOR18
 	.word	.LC36
@@ -2328,98 +2369,111 @@ flash_erase_all:
 flash_start_plane_read:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L446
+	ldr	r3, .L453
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	ubfx	r4, r0, #21, #3
-	ubfx	r6, r0, #0, #21
-	ubfx	r5, r1, #0, #21
 	ubfx	r7, r0, #24, #2
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	movs	r3, #1
+	rsb	r2, r5, #24
+	lsl	r4, r3, r2
+	lsl	r5, r3, r5
+	ldr	r3, .L453+4
+	lsr	r2, r0, r2
+	subs	r5, r5, #1
+	ands	r5, r5, r2
+	subs	r4, r4, #1
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, r4
-	bhi	.L428
-	movw	r2, #941
-	ldr	r1, .L446+4
-	ldr	r0, .L446+8
+	uxtb	r5, r5
+	and	r6, r4, r0
+	ands	r4, r4, r1
+	cmp	r3, r5
+	bhi	.L435
+	movw	r2, #965
+	ldr	r1, .L453+8
+	ldr	r0, .L453+12
 	bl	printf
-.L428:
-	ldr	r3, .L446+12
-	ldr	fp, .L446+28
-	ldrb	r4, [r3, r4]	@ zero_extendqisi2
-	ldr	r3, .L446+16
-	mov	r0, r4
+.L435:
+	ldr	r3, .L453+16
+	ldr	fp, .L453+36
+	ldrb	r5, [r3, r5]	@ zero_extendqisi2
+	ldr	r3, .L453+20
+	mov	r0, r5
 	ldr	r8, [r3]
-	lsl	r10, r4, #8
+	lsl	r10, r5, #8
 	bl	nandc_cs
 	cmp	r7, #0
-	bne	.L429
+	bne	.L436
 	mov	r0, r6
 	bl	slc_phy_page_address_calc
 	mov	r6, r0
-	mov	r0, r5
+	mov	r0, r4
 	bl	slc_phy_page_address_calc
-	ldr	r3, .L446+20
-	mov	r5, r0
+	ldr	r3, .L453+24
+	mov	r4, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L430
-	mov	r0, r4
+	cbz	r3, .L437
+	mov	r0, r5
 	bl	zftl_flash_enter_slc_mode
-.L430:
-	ldr	r3, .L446+24
+.L437:
+	ldr	r3, .L453+28
 	ldrb	r2, [r3, #16]	@ zero_extendqisi2
 	mov	r0, r3
 	ldrb	r1, [r3, #8]	@ zero_extendqisi2
 	cmp	r2, #1
 	uxtb	r2, r6
-	bne	.L432
-	add	r4, r8, r10
+	bne	.L439
+	add	r5, r8, r10
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
-	str	r1, [r4, #2056]
+	str	r1, [r5, #2056]
 	movs	r1, #0
-	str	r1, [r4, #2052]
-	str	r1, [r4, #2052]
-	str	r2, [r4, #2052]
+	str	r1, [r5, #2052]
+	str	r1, [r5, #2052]
+	str	r2, [r5, #2052]
 	lsrs	r2, r6, #8
 	lsrs	r6, r6, #16
-	str	r2, [r4, #2052]
-	str	r6, [r4, #2052]
-	str	r3, [r4, #2056]
+	str	r2, [r5, #2052]
+	str	r6, [r5, #2052]
+	str	r3, [r5, #2056]
 	bl	nandc_wait_flash_ready
 	ldr	r3, [fp]
 	ldrb	r3, [r3, #12]	@ zero_extendqisi2
 	cmp	r3, #3
-	bne	.L433
-	cbz	r7, .L433
-	str	r7, [r4, #2056]
-.L433:
+	bne	.L440
+	cbz	r7, .L440
+	str	r7, [r5, #2056]
+.L440:
 	movs	r3, #0
 	add	r8, r8, r10
 	str	r3, [r8, #2056]
-	str	r3, [r4, #2052]
-	str	r3, [r4, #2052]
-	uxtb	r3, r5
-	str	r3, [r4, #2052]
-	lsrs	r3, r5, #8
-	lsrs	r5, r5, #16
-	str	r3, [r4, #2052]
-	str	r5, [r4, #2052]
-.L445:
+	str	r3, [r5, #2052]
+	str	r3, [r5, #2052]
+	uxtb	r3, r4
+	str	r3, [r5, #2052]
+	lsrs	r3, r4, #8
+	lsrs	r4, r4, #16
+	str	r3, [r5, #2052]
+	str	r4, [r5, #2052]
+.L452:
 	movs	r3, #48
 	str	r3, [r8, #2056]
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
-	b	nandc_de_cs.constprop.29
-.L429:
+	b	nandc_de_cs.constprop.30
+.L436:
 	ldr	r3, [fp]
 	ldrb	r3, [r3, #12]	@ zero_extendqisi2
 	cmp	r3, #3
-	bne	.L431
+	bne	.L438
+	ldr	r3, .L453+32
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L438
 	add	r3, r8, r10
 	str	r7, [r3, #2056]
-	b	.L430
-.L431:
-	mov	r0, r4
+	b	.L437
+.L438:
+	mov	r0, r5
 	bl	zftl_flash_exit_slc_mode
-	b	.L430
-.L432:
+	b	.L437
+.L439:
 	add	r3, r8, r10
 	str	r1, [r3, #2056]
 	str	r2, [r3, #2052]
@@ -2430,30 +2484,32 @@ flash_start_plane_read:
 	str	r6, [r3, #2052]
 	ldrb	r2, [r2, #12]	@ zero_extendqisi2
 	cmp	r2, #3
-	bne	.L435
-	cbz	r7, .L435
+	bne	.L442
+	cbz	r7, .L442
 	str	r7, [r3, #2056]
-.L435:
+.L442:
 	ldrb	r2, [r0, #9]	@ zero_extendqisi2
 	add	r8, r8, r10
 	str	r2, [r8, #2056]
-	uxtb	r2, r5
+	uxtb	r2, r4
 	str	r2, [r3, #2052]
-	lsrs	r2, r5, #8
-	lsrs	r5, r5, #16
+	lsrs	r2, r4, #8
+	lsrs	r4, r4, #16
 	str	r2, [r3, #2052]
-	str	r5, [r3, #2052]
-	b	.L445
-.L447:
+	str	r4, [r3, #2052]
+	b	.L452
+.L454:
 	.align	2
-.L446:
+.L453:
+	.word	.LANCHOR31
 	.word	.LANCHOR18
-	.word	.LANCHOR41
+	.word	.LANCHOR43
 	.word	.LC0
 	.word	.LANCHOR30
 	.word	.LANCHOR13
 	.word	.LANCHOR0
 	.word	.LANCHOR20
+	.word	.LANCHOR35
 	.word	.LANCHOR16
 	.size	flash_start_plane_read, .-flash_start_plane_read
 	.section	.text.flash_set_interface_mode,"ax",%progbits
@@ -2469,67 +2525,67 @@ flash_set_interface_mode:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
 	mov	r6, r0
-	ldr	r7, .L491
+	ldr	r7, .L498
 	mov	r10, #0
-	ldr	r8, .L491+24
-.L462:
+	ldr	r8, .L498+24
+.L469:
 	ldrb	r5, [r7, r10, lsl #3]	@ zero_extendqisi2
 	cmp	r5, #69
-	beq	.L449
+	beq	.L456
 	cmp	r5, #44
-	beq	.L449
+	beq	.L456
 	add	r3, r5, #119
 	uxtb	r3, r3
 	cmp	r3, #18
-	bhi	.L450
-	ldr	r2, .L491+4
+	bhi	.L457
+	ldr	r2, .L498+4
 	lsr	r3, r2, r3
 	lsls	r2, r3, #31
-	bpl	.L450
-.L449:
-	ldr	r3, .L491+8
+	bpl	.L457
+.L456:
+	ldr	r3, .L498+8
 	cmp	r6, #1
 	ldr	r4, [r8]
 	ldrb	r1, [r3]	@ zero_extendqisi2
-	bne	.L451
+	bne	.L458
 	lsls	r3, r1, #31
-	bpl	.L450
-	ldr	r3, .L491+12
+	bpl	.L457
+	ldr	r3, .L498+12
 	ldr	r3, [r3]
 	lsls	r0, r3, #19
-	bpl	.L452
-	ldr	r0, .L491+16
+	bpl	.L459
+	ldr	r0, .L498+16
 	bl	printf
-.L452:
+.L459:
 	lsl	r3, r10, #8
 	cmp	r5, #44
 	mov	r1, #239
 	add	r2, r4, r3
 	str	r1, [r2, #2056]
-	beq	.L453
+	beq	.L460
 	cmp	r5, #137
-	bne	.L454
-.L453:
+	bne	.L461
+.L460:
 	movs	r1, #1
 	adds	r2, r4, r3
 	str	r1, [r2, #2052]
 	movs	r1, #5
-.L488:
+.L495:
 	add	r4, r4, r3
 	str	r1, [r2, #2048]
-.L490:
+.L497:
 	movs	r3, #0
 	str	r3, [r4, #2048]
 	str	r3, [r4, #2048]
 	str	r3, [r4, #2048]
-.L450:
+.L457:
 	add	r10, r10, #1
 	cmp	r10, #4
-	bne	.L462
+	bne	.L469
 	bl	nandc_wait_flash_ready
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L454:
+.L461:
 	cmp	r5, #155
 	itett	eq
 	moveq	r1, #1
@@ -2539,35 +2595,35 @@ flash_set_interface_mode:
 	itt	ne
 	strne	r1, [r2, #2052]
 	movne	r1, #1
-	b	.L488
-.L451:
+	b	.L495
+.L458:
 	lsls	r2, r1, #29
-	bpl	.L450
-	ldr	r3, .L491+12
+	bpl	.L457
+	ldr	r3, .L498+12
 	ldr	r3, [r3]
 	lsls	r3, r3, #19
-	bpl	.L457
-	ldr	r0, .L491+20
+	bpl	.L464
+	ldr	r0, .L498+20
 	bl	printf
-.L457:
+.L464:
 	lsl	r2, r10, #8
 	cmp	r5, #44
 	mov	r1, #239
 	add	r3, r4, r2
 	str	r1, [r3, #2056]
-	beq	.L458
+	beq	.L465
 	cmp	r5, #137
-	bne	.L459
-.L458:
+	bne	.L466
+.L465:
 	movs	r1, #1
 	adds	r3, r4, r2
 	str	r1, [r3, #2052]
 	movs	r1, #35
-.L489:
+.L496:
 	str	r1, [r3, #2048]
 	add	r4, r4, r2
-	b	.L490
-.L459:
+	b	.L497
+.L466:
 	cmp	r5, #155
 	itett	eq
 	moveq	r1, #1
@@ -2577,18 +2633,52 @@ flash_set_interface_mode:
 	itt	ne
 	strne	r1, [r3, #2052]
 	movne	r1, #0
-	b	.L489
-.L492:
+	b	.L496
+.L499:
 	.align	2
-.L491:
-	.word	.LANCHOR42
+.L498:
+	.word	.LANCHOR44
 	.word	294913
-	.word	.LANCHOR43
+	.word	.LANCHOR45
 	.word	.LANCHOR14
 	.word	.LC37
 	.word	.LC38
 	.word	.LANCHOR13
 	.size	flash_set_interface_mode, .-flash_set_interface_mode
+	.section	.text.mt_auto_read_calibration_config,"ax",%progbits
+	.align	1
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	mt_auto_read_calibration_config, %function
+mt_auto_read_calibration_config:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	mov	r5, r1
+	mov	r6, r0
+	bl	nandc_wait_flash_ready
+	ldr	r3, .L501
+	movs	r0, #200
+	ldr	r4, [r3]
+	movs	r3, #239
+	add	r4, r4, r6, lsl #8
+	str	r3, [r4, #2056]
+	movs	r3, #150
+	str	r3, [r4, #2052]
+	bl	timer_delay_ns
+	movs	r3, #0
+	str	r5, [r4, #2048]
+	str	r3, [r4, #2048]
+	str	r3, [r4, #2048]
+	str	r3, [r4, #2048]
+	pop	{r4, r5, r6, pc}
+.L502:
+	.align	2
+.L501:
+	.word	.LANCHOR13
+	.size	mt_auto_read_calibration_config, .-mt_auto_read_calibration_config
 	.section	.text.flash_reset,"ax",%progbits
 	.align	1
 	.global	flash_reset
@@ -2601,15 +2691,15 @@ flash_reset:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L494
+	ldr	r3, .L504
 	ldr	r3, [r3]
 	add	r0, r3, r0, lsl #8
 	movs	r3, #255
 	str	r3, [r0, #2056]
 	b	nandc_wait_flash_ready
-.L495:
+.L505:
 	.align	2
-.L494:
+.L504:
 	.word	.LANCHOR13
 	.size	flash_reset, .-flash_reset
 	.section	.text.flash_read_id,"ax",%progbits
@@ -2625,7 +2715,7 @@ flash_read_id:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, lr}
 	mov	r5, r0
-	ldr	r3, .L498
+	ldr	r3, .L508
 	mov	r4, r1
 	ldr	r6, [r3]
 	bl	flash_reset
@@ -2654,15 +2744,15 @@ flash_read_id:
 	strb	r3, [r4, #6]
 	ldr	r3, [r6, #2048]
 	strb	r3, [r4, #7]
-	bl	nandc_de_cs.constprop.29
+	bl	nandc_de_cs.constprop.30
 	ldrb	r2, [r4]	@ zero_extendqisi2
 	subs	r3, r2, #1
 	uxtb	r3, r3
 	cmp	r3, #253
-	bhi	.L496
+	bhi	.L506
 	ldrb	r1, [r4, #5]	@ zero_extendqisi2
 	ldrb	r3, [r4, #1]	@ zero_extendqisi2
-	ldr	r0, .L498+4
+	ldr	r0, .L508+4
 	str	r1, [sp, #12]
 	ldrb	r1, [r4, #4]	@ zero_extendqisi2
 	str	r1, [sp, #8]
@@ -2672,13 +2762,13 @@ flash_read_id:
 	str	r1, [sp]
 	adds	r1, r5, #1
 	bl	printf
-.L496:
+.L506:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, pc}
-.L499:
+.L509:
 	.align	2
-.L498:
+.L508:
 	.word	.LANCHOR13
 	.word	.LC39
 	.size	flash_read_id, .-flash_read_id
@@ -2695,8 +2785,8 @@ flash_read_spare:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	mov	r5, r2
-	ldr	r3, .L501
-	ldr	r2, .L501+4
+	ldr	r3, .L511
+	ldr	r2, .L511+4
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
 	ldr	r4, [r2]
 	movs	r2, #0
@@ -2718,10 +2808,10 @@ flash_read_spare:
 	ldr	r3, [r4, #2048]
 	strb	r3, [r5]
 	pop	{r3, r4, r5, pc}
-.L502:
+.L512:
 	.align	2
-.L501:
-	.word	.LANCHOR31
+.L511:
+	.word	.LANCHOR32
 	.word	.LANCHOR13
 	.size	flash_read_spare, .-flash_read_spare
 	.section	.text.flash_read_otp_data,"ax",%progbits
@@ -2735,7 +2825,7 @@ flash_read_spare:
 flash_read_otp_data:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L506
+	ldr	r3, .L516
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r8, r0
 	lsl	r8, r8, #8
@@ -2758,7 +2848,7 @@ flash_read_otp_data:
 	str	r10, [r4, #2048]
 	bl	nandc_wait_flash_ready
 	movs	r3, #238
-	ldr	r0, .L506+4
+	ldr	r0, .L516+4
 	str	r3, [r4, #2056]
 	str	fp, [r4, #2052]
 	ldr	r2, [r4, #2048]
@@ -2782,11 +2872,11 @@ flash_read_otp_data:
 	bl	nandc_wait_flash_ready
 	add	r3, r5, #16384
 	mov	r2, r5
-.L504:
+.L514:
 	ldr	r1, [r4, #2048]
 	strb	r1, [r2], #1
 	cmp	r2, r3
-	bne	.L504
+	bne	.L514
 	add	r7, r7, r8
 	movs	r3, #239
 	str	r3, [r7, #2056]
@@ -2802,10 +2892,10 @@ flash_read_otp_data:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
-	b	nandc_de_cs.constprop.29
-.L507:
+	b	nandc_de_cs.constprop.30
+.L517:
 	.align	2
-.L506:
+.L516:
 	.word	.LANCHOR13
 	.word	.LC40
 	.size	flash_read_otp_data, .-flash_read_otp_data
@@ -2822,15 +2912,15 @@ sandisk_prog_test_bad_block:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	lsls	r0, r0, #8
-	ldr	r3, .L518
+	ldr	r3, .L528
 	mov	r5, r1
 	ldr	r4, [r3]
-	ldr	r3, .L518+4
+	ldr	r3, .L528+4
 	ldrb	r3, [r3, #29]	@ zero_extendqisi2
-	cbz	r3, .L509
+	cbz	r3, .L519
 	adds	r2, r4, r0
 	str	r3, [r2, #2056]
-.L510:
+.L520:
 	add	r4, r4, r0
 	movs	r3, #128
 	str	r3, [r4, #2056]
@@ -2852,27 +2942,27 @@ sandisk_prog_test_bad_block:
 	bl	timer_delay_ns
 	ldr	r2, [r4, #2048]
 	ands	r4, r2, #5
-	beq	.L508
-	ldr	r3, .L518+8
+	beq	.L518
+	ldr	r3, .L528+8
 	ldr	r3, [r3]
 	lsls	r3, r3, #19
-	bpl	.L508
+	bpl	.L518
 	mov	r1, r5
-	ldr	r0, .L518+12
+	ldr	r0, .L528+12
 	bl	printf
-.L508:
+.L518:
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L509:
+.L519:
 	adds	r3, r4, r0
 	movs	r2, #162
 	str	r2, [r3, #2056]
-	b	.L510
-.L519:
+	b	.L520
+.L529:
 	.align	2
-.L518:
+.L528:
 	.word	.LANCHOR13
-	.word	.LANCHOR31
+	.word	.LANCHOR32
 	.word	.LANCHOR14
 	.word	.LC41
 	.size	sandisk_prog_test_bad_block, .-sandisk_prog_test_bad_block
@@ -2888,7 +2978,7 @@ nandc_rdy_status:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L521
+	ldr	r3, .L531
 	sub	sp, sp, #8
 	ldr	r3, [r3]
 	ldr	r3, [r3]
@@ -2898,9 +2988,9 @@ nandc_rdy_status:
 	add	sp, sp, #8
 	@ sp needed
 	bx	lr
-.L522:
+.L532:
 	.align	2
-.L521:
+.L531:
 	.word	.LANCHOR13
 	.size	nandc_rdy_status, .-nandc_rdy_status
 	.section	.text.nandc_bch_sel,"ax",%progbits
@@ -2912,65 +3002,96 @@ nandc_rdy_status:
 	.fpu softvfp
 	.type	nandc_bch_sel, %function
 nandc_bch_sel:
-	@ args = 0, pretend = 0, frame = 0
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r1, .L537
-	movs	r2, #0
-	push	{r4, lr}
-	movs	r3, #1
-	strb	r0, [r1]
-	ldr	r1, .L537+4
-	ldrb	r1, [r1]	@ zero_extendqisi2
-	cmp	r1, #9
-	ldr	r1, .L537+8
-	ldr	r1, [r1]
-	bne	.L524
+	movs	r3, #0
+	push	{r0, r1, r4, lr}
+	str	r3, [sp, #4]
+	ldr	r2, [sp, #4]
+	orr	r2, r2, #1
+	str	r2, [sp, #4]
+	ldr	r2, .L544
+	strb	r0, [r2]
+	ldr	r2, .L544+4
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r2, #9
+	ldr	r2, .L544+8
+	bne	.L534
+	ldr	r2, [r2]
 	cmp	r0, #70
-	str	r3, [r1, #16]
-	beq	.L525
+	ldr	r1, [sp, #4]
+	str	r1, [r2, #16]
+	beq	.L535
 	cmp	r0, #60
-	beq	.L532
+	beq	.L541
 	cmp	r0, #40
 	ite	eq
-	moveq	r2, #2
-	movne	r2, r3
-.L525:
-	lsls	r3, r2, #25
+	moveq	r3, #2
+	movne	r3, #1
+.L535:
+	movs	r1, #0
+	str	r1, [sp]
+	ldr	r1, [sp]
+	bfi	r1, r3, #25, #3
+	str	r1, [sp]
+	ldr	r3, [sp]
 	orr	r3, r3, #1
-	str	r3, [r1, #32]
+	str	r3, [sp]
+	ldr	r3, [sp]
+	str	r3, [r2, #32]
+.L533:
+	add	sp, sp, #8
+	@ sp needed
 	pop	{r4, pc}
-.L532:
-	movs	r2, #3
-	b	.L525
-.L524:
+.L541:
+	movs	r3, #3
+	b	.L535
+.L534:
+	ldr	r1, [r2]
 	movs	r4, #16
-	str	r3, [r1, #8]
+	ldr	r2, [sp, #4]
 	cmp	r0, r4
-	mov	r3, r2
-	bfi	r3, r4, #8, #8
-	bfi	r3, r2, #18, #1
-	bne	.L527
-.L530:
-	bfc	r3, #4, #1
-.L528:
-	orr	r3, r3, #1
-	str	r3, [r1, #12]
-	pop	{r4, pc}
-.L527:
+	str	r2, [r1, #8]
+	str	r3, [sp]
+	ldr	r2, [sp]
+	bfi	r2, r4, #8, #8
+	str	r2, [sp]
+	ldr	r2, [sp]
+	bfi	r2, r3, #18, #1
+	str	r2, [sp]
+	bne	.L537
+.L543:
+	ldr	r2, [sp]
+	bfi	r2, r3, #4, #1
+	str	r2, [sp]
+	b	.L538
+.L537:
 	cmp	r0, #24
-	bne	.L529
-	orr	r3, r3, #16
-	b	.L528
-.L529:
-	cmp	r0, #40
-	orr	r3, r3, #262144
+	bne	.L539
+	ldr	r3, [sp]
 	orr	r3, r3, #16
-	bne	.L528
-	b	.L530
+	str	r3, [sp]
 .L538:
+	ldr	r3, [sp]
+	orr	r3, r3, #1
+	str	r3, [sp]
+	ldr	r3, [sp]
+	str	r3, [r1, #12]
+	b	.L533
+.L539:
+	ldr	r2, [sp]
+	cmp	r0, #40
+	orr	r2, r2, #262144
+	str	r2, [sp]
+	ldr	r2, [sp]
+	orr	r2, r2, #16
+	str	r2, [sp]
+	bne	.L538
+	b	.L543
+.L545:
 	.align	2
-.L537:
-	.word	.LANCHOR44
+.L544:
+	.word	.LANCHOR46
 	.word	.LANCHOR28
 	.word	.LANCHOR13
 	.size	nandc_bch_sel, .-nandc_bch_sel
@@ -2986,16 +3107,16 @@ zftl_nandc_get_irq_status:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L542
+	ldr	r3, .L549
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #9
 	ite	eq
 	ldreq	r0, [r0, #296]
 	ldrne	r0, [r0, #372]
 	bx	lr
-.L543:
+.L550:
 	.align	2
-.L542:
+.L549:
 	.word	.LANCHOR28
 	.size	zftl_nandc_get_irq_status, .-zftl_nandc_get_irq_status
 	.section	.text.rk_nandc_flash_ready,"ax",%progbits
@@ -3052,185 +3173,261 @@ nandc_xfer_start:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r6, r0
-	ldr	r0, .L563
-	adds	r7, r1, #1
-	ldr	r5, .L563+4
+	mov	r5, r0
+	ldr	r0, .L570
+	and	lr, r5, #1
+	ldr	r4, .L570+4
 	ldrb	r0, [r0]	@ zero_extendqisi2
-	ldr	r10, .L563+24
+	ldr	r7, .L570+8
 	cmp	r0, #9
-	bne	.L548
-	movs	r4, #0
-	movs	r1, #1
-	bfi	r4, r6, #1, #1
-	asrs	r7, r7, r1
-	orr	r4, r4, #8
-	bfi	r4, r1, #5, #2
-	ldr	r1, .L563+8
-	orr	r4, r4, #536870912
-	orr	r4, r4, #1024
+	add	r0, r1, #1
+	bne	.L555
+	movs	r6, #0
+	mov	ip, #1
+	str	r6, [sp, #4]
+	ubfx	r0, r0, #1, #6
+	ldr	r1, [sp, #4]
+	bfi	r1, lr, #1, #1
+	str	r1, [sp, #4]
+	ldr	r1, [sp, #4]
+	orr	r1, r1, #8
+	str	r1, [sp, #4]
+	ldr	r1, [sp, #4]
+	bfi	r1, ip, #5, #2
+	str	r1, [sp, #4]
+	ldr	r1, [sp, #4]
+	orr	r1, r1, #536870912
+	str	r1, [sp, #4]
+	ldr	r1, [sp, #4]
+	orr	r1, r1, #1024
+	str	r1, [sp, #4]
+	ldr	r1, [sp, #4]
+	bfi	r1, r6, #4, #1
+	str	r1, [sp, #4]
+	ldr	r1, [sp, #4]
+	bfi	r1, r0, #22, #6
+	str	r1, [sp, #4]
+	ldr	r1, [sp, #4]
+	orr	r1, r1, #128
+	str	r1, [sp, #4]
+	ldr	r1, .L570+12
 	ldrb	r1, [r1]	@ zero_extendqisi2
-	bfc	r4, #4, #1
-	bfi	r4, r7, #22, #6
-	orr	r4, r4, #128
-	cbz	r1, .L549
-	ldr	r1, .L563+12
+	cbz	r1, .L556
+	ldr	r1, .L570+16
 	ldrb	r1, [r1]	@ zero_extendqisi2
-	cbz	r1, .L549
-	orr	r4, r4, #512
-.L549:
-	add	r1, r2, #63
-	and	r7, r7, #63
-	bic	r1, r1, #63
+	cbz	r1, .L556
+	ldr	r1, [sp, #4]
+	orr	r1, r1, #512
+	str	r1, [sp, #4]
+.L556:
+	ldr	r1, [sp, #4]
 	bic	r0, r2, #63
-	add	r1, r1, r7, lsl #10
-	str	r2, [r5, #4]
-	str	r3, [r5, #8]
-	clz	r6, r6
-	str	r2, [r5, #12]
-	lsrs	r6, r6, #5
-	str	r3, [r5, #16]
+	str	r3, [r4, #8]
+	clz	r5, r5
+	str	r3, [r4, #16]
+	add	r3, r2, #63
+	bic	r3, r3, #63
+	ubfx	r1, r1, #22, #6
+	add	r1, r3, r1, lsl #10
+	str	r2, [r4, #4]
+	str	r2, [r4, #12]
+	lsrs	r5, r5, #5
 	bl	flush_dcache_range
-	ldr	r0, [r5, #8]
+	ldr	r0, [r4, #8]
 	add	r1, r0, #63
 	bic	r0, r0, #63
 	bic	r1, r1, #63
 	adds	r1, r1, #64
 	bl	flush_dcache_range
 	movs	r3, #1
-	ldr	r2, [r10]
-	str	r3, [r5, #20]
+	ldr	r2, [r4, #12]
+	str	r3, [r4, #20]
 	movs	r1, #16
-	ldr	r3, [r5, #12]
-	str	r3, [r2, #52]
-	ldr	r3, [r5, #16]
-	str	r3, [r2, #56]
-	ldr	r3, [r2, #48]
-	bfi	r3, r1, #9, #5
-	movs	r1, #2
-	orr	r3, r3, #448
-	bfi	r3, r1, #3, #3
-	ldr	r1, .L563+16
-	orr	r3, r3, #4
-	bfi	r3, r6, #1, #1
-	ldrh	r1, [r1]
-	orr	r3, r3, #1
-	bfi	r3, r1, #16, #11
-	str	r3, [r2, #48]
-	str	r4, [r2, #16]
-	orr	r4, r4, #4
-	str	r4, [r2, #16]
-.L547:
+	ldr	r3, [r7]
+	str	r2, [r3, #52]
+	ldr	r2, [r4, #16]
+	str	r2, [r3, #56]
+	ldr	r2, [r3, #48]
+	str	r2, [sp, #8]
+	ldr	r2, [sp, #8]
+	bfi	r2, r1, #9, #5
+	movs	r1, #2
+	str	r2, [sp, #8]
+	ldr	r2, [sp, #8]
+	orr	r2, r2, #448
+	str	r2, [sp, #8]
+	ldr	r2, [sp, #8]
+	bfi	r2, r1, #3, #3
+	str	r2, [sp, #8]
+	ldr	r2, [sp, #8]
+	orr	r2, r2, #4
+	str	r2, [sp, #8]
+	ldr	r2, [sp, #8]
+	bfi	r2, r5, #1, #1
+	str	r2, [sp, #8]
+	ldr	r2, [sp, #8]
+	orr	r2, r2, #1
+	str	r2, [sp, #8]
+	ldr	r2, .L570+20
+	ldrh	r1, [r2]
+	ldr	r2, [sp, #8]
+	bfi	r2, r1, #16, #11
+	str	r2, [sp, #8]
+	ldr	r2, [sp, #8]
+	str	r2, [r3, #48]
+	ldr	r2, [sp, #4]
+	str	r2, [r3, #16]
+	ldr	r2, [sp, #4]
+	orr	r2, r2, #4
+	str	r2, [sp, #4]
+	ldr	r2, [sp, #4]
+	str	r2, [r3, #16]
+.L554:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L548:
-	ldr	r0, [r10]
-	movs	r4, #0
-	bfi	r4, r6, #1, #1
-	orr	r4, r4, #8
-	ldr	r8, [r0, #12]
-	movs	r0, #16
-	bfi	r8, r0, #8, #8
-	movs	r0, #1
-	bfi	r4, r0, #5, #2
-	asrs	r7, r7, r0
-	orr	r4, r4, #536870912
-	orr	r4, r4, #1024
-	bfc	r8, #3, #1
-	bfc	r4, #4, #1
-	bfc	r8, #5, #3
-	str	r7, [sp]
-	bfi	r4, r7, #22, #6
-	cmp	r6, #0
-	beq	.L551
-	ldr	r0, .L563+20
+.L555:
+	ldr	r6, [r7]
+	mov	ip, #16
+	ubfx	r0, r0, #1, #6
+	ldr	r6, [r6, #12]
+	str	r6, [sp, #12]
+	ldr	r6, [sp, #12]
+	bfi	r6, ip, #8, #8
+	str	r6, [sp, #12]
+	ldr	r6, [sp, #12]
+	bfc	r6, #3, #1
+	str	r6, [sp, #12]
+	ldr	r6, [sp, #12]
+	bfc	r6, #5, #3
+	str	r6, [sp, #12]
+	movs	r6, #0
+	str	r6, [sp, #4]
+	ldr	ip, [sp, #4]
+	bfi	ip, lr, #1, #1
+	mov	lr, #1
+	str	ip, [sp, #4]
+	ldr	ip, [sp, #4]
+	orr	ip, ip, #8
+	str	ip, [sp, #4]
+	ldr	ip, [sp, #4]
+	bfi	ip, lr, #5, #2
+	str	ip, [sp, #4]
+	ldr	ip, [sp, #4]
+	orr	ip, ip, #536870912
+	str	ip, [sp, #4]
+	ldr	ip, [sp, #4]
+	orr	ip, ip, #1024
+	str	ip, [sp, #4]
+	ldr	ip, [sp, #4]
+	bfi	ip, r6, #4, #1
+	str	ip, [sp, #4]
+	ldr	ip, [sp, #4]
+	bfi	ip, r0, #22, #6
+	str	ip, [sp, #4]
+	cmp	r5, #0
+	beq	.L558
+	ldr	r0, .L570+24
 	lsrs	r1, r1, #1
-	str	r1, [sp, #8]
+	ldr	r8, [r4]
 	ldrb	r0, [r0]	@ zero_extendqisi2
-	ldr	r1, [r5]
-	cmp	r0, #24
-	ite	hi
-	movhi	r0, #128
-	movls	r0, #64
-	str	r1, [sp, #12]
-	movs	r1, #0
-	str	r0, [sp, #4]
-	mov	r0, r1
-.L553:
-	ldr	r7, [sp, #4]
+	cmp	r0, #25
+	mov	r0, r6
+	ite	cc
+	movcc	lr, #64
+	movcs	lr, #128
+.L560:
+	cmp	r0, r1
 	add	fp, r3, r0, lsl #2
-	add	lr, r7, r1
-	ldr	r7, [sp, #8]
-	cmp	r0, r7
-	blt	.L554
-.L555:
-	ldr	r3, [r5]
-	add	r1, r2, #63
-	bic	r1, r1, #63
+	add	r10, lr, r6
+	blt	.L561
+.L562:
+	ldr	r3, [r4]
 	bic	r0, r2, #63
-	str	r2, [r5, #4]
-	clz	r6, r6
-	str	r3, [r5, #8]
-	lsrs	r6, r6, #5
-	str	r3, [r5, #16]
-	ldr	r3, [sp]
-	str	r2, [r5, #12]
-	and	r7, r3, #63
-	add	r1, r1, r7, lsl #10
+	ldr	r1, [sp, #4]
+	clz	r5, r5
+	str	r2, [r4, #4]
+	lsrs	r5, r5, #5
+	str	r3, [r4, #8]
+	str	r3, [r4, #16]
+	add	r3, r2, #63
+	bic	r3, r3, #63
+	ubfx	r1, r1, #22, #6
+	add	r1, r3, r1, lsl #10
+	str	r2, [r4, #12]
 	bl	flush_dcache_range
-	ldr	r0, [r5, #8]
-	add	r1, r0, #63
+	ldr	r0, [r4, #8]
+	ldr	r1, [sp, #4]
+	add	r3, r0, #63
 	bic	r0, r0, #63
-	bic	r1, r1, #63
-	add	r1, r1, r7, lsl #7
+	bic	r3, r3, #63
+	ubfx	r1, r1, #22, #6
+	add	r1, r3, r1, lsl #7
 	bl	flush_dcache_range
 	movs	r3, #1
-	ldr	r2, [r10]
-	str	r3, [r5, #20]
+	ldr	r2, [r4, #12]
+	str	r3, [r4, #20]
 	movs	r1, #16
-	ldr	r3, [r5, #12]
-	str	r3, [r2, #20]
-	ldr	r3, [r5, #16]
-	str	r3, [r2, #24]
-	movs	r3, #0
-	bfi	r3, r1, #9, #5
+	ldr	r3, [r7]
+	str	r2, [r3, #20]
+	ldr	r2, [r4, #16]
+	str	r2, [r3, #24]
+	movs	r2, #0
+	str	r2, [sp, #8]
+	ldr	r2, [sp, #8]
+	bfi	r2, r1, #9, #5
 	movs	r1, #2
-	orr	r3, r3, #448
-	bfi	r3, r1, #3, #3
-	orr	r3, r3, #4
-	bfi	r3, r6, #1, #1
-	orr	r3, r3, #1
-	str	r3, [r2, #16]
-	str	r8, [r2, #12]
-	str	r4, [r2, #8]
-	orr	r4, r4, #4
-	str	r4, [r2, #8]
-	b	.L547
-.L554:
+	str	r2, [sp, #8]
+	ldr	r2, [sp, #8]
+	orr	r2, r2, #448
+	str	r2, [sp, #8]
+	ldr	r2, [sp, #8]
+	bfi	r2, r1, #3, #3
+	str	r2, [sp, #8]
+	ldr	r2, [sp, #8]
+	orr	r2, r2, #4
+	str	r2, [sp, #8]
+	ldr	r2, [sp, #8]
+	bfi	r2, r5, #1, #1
+	str	r2, [sp, #8]
+	ldr	r2, [sp, #8]
+	orr	r2, r2, #1
+	str	r2, [sp, #8]
+	ldr	r2, [sp, #8]
+	str	r2, [r3, #16]
+	ldr	r2, [sp, #12]
+	str	r2, [r3, #12]
+	ldr	r2, [sp, #4]
+	str	r2, [r3, #8]
+	ldr	r2, [sp, #4]
+	orr	r2, r2, #4
+	str	r2, [sp, #4]
+	ldr	r2, [sp, #4]
+	str	r2, [r3, #8]
+	b	.L554
+.L561:
 	ldrh	ip, [r3, r0, lsl #2]
-	bic	r1, r1, #3
+	bic	r6, r6, #3
 	ldrh	fp, [fp, #2]
 	adds	r0, r0, #1
-	ldr	r7, [sp, #12]
 	orr	ip, ip, fp, lsl #16
-	str	ip, [r7, r1]
-	mov	r1, lr
-	b	.L553
-.L551:
-	ldr	r3, [r5]
-	str	r0, [r3]
-	b	.L555
-.L564:
+	str	ip, [r8, r6]
+	mov	r6, r10
+	b	.L560
+.L558:
+	ldr	r3, [r4]
+	str	lr, [r3]
+	b	.L562
+.L571:
 	.align	2
-.L563:
+.L570:
 	.word	.LANCHOR28
+	.word	.LANCHOR49
+	.word	.LANCHOR13
 	.word	.LANCHOR47
-	.word	.LANCHOR45
-	.word	.LANCHOR46
 	.word	.LANCHOR48
-	.word	.LANCHOR44
-	.word	.LANCHOR13
+	.word	.LANCHOR50
+	.word	.LANCHOR46
 	.size	nandc_xfer_start, .-nandc_xfer_start
 	.section	.text.nandc_set_seed,"ax",%progbits
 	.align	1
@@ -3244,28 +3441,28 @@ nandc_set_seed:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L572
+	ldr	r2, .L579
 	and	r0, r0, #127
-	ldr	r3, .L572+4
+	ldr	r3, .L579+4
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r2, .L566
+	cbz	r2, .L573
 	orr	r3, r3, #-1073741824
-.L566:
-	ldr	r2, .L572+8
+.L573:
+	ldr	r2, .L579+8
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, #9
-	ldr	r2, .L572+12
+	ldr	r2, .L579+12
 	ldr	r2, [r2]
 	ite	eq
 	streq	r3, [r2, #520]
 	strne	r3, [r2, #336]
 	bx	lr
-.L573:
+.L580:
 	.align	2
-.L572:
-	.word	.LANCHOR46
-	.word	.LANCHOR49
+.L579:
+	.word	.LANCHOR48
+	.word	.LANCHOR51
 	.word	.LANCHOR28
 	.word	.LANCHOR13
 	.size	nandc_set_seed, .-nandc_set_seed
@@ -3282,49 +3479,54 @@ zftl_flash_de_init:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
 	bl	nandc_wait_flash_ready
-	ldr	r3, .L590
+	ldr	r3, .L600
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L575
-	ldr	r3, .L590+4
+	cbz	r3, .L582
+	ldr	r3, .L600+4
 	ldrb	r0, [r3]	@ zero_extendqisi2
-	cbnz	r0, .L575
+	cbnz	r0, .L582
+	ldr	r3, .L600+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #9
+	beq	.L582
 	bl	zftl_flash_exit_slc_mode
-.L575:
-	ldr	r4, .L590+8
+.L582:
+	ldr	r4, .L600+12
 	movs	r0, #0
 	bl	hynix_reconfig_rr_para
 	ldrb	r3, [r4]	@ zero_extendqisi2
-	cbz	r3, .L576
-	ldr	r3, .L590+12
+	cbz	r3, .L583
+	ldr	r3, .L600+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	lsls	r3, r3, #31
-	bpl	.L576
+	bpl	.L583
 	movs	r0, #1
 	bl	flash_set_interface_mode
 	movs	r0, #1
 	bl	nandc_set_if_mode
 	movs	r3, #0
 	strb	r3, [r4]
-.L576:
-	ldr	r1, .L590+16
+.L583:
+	ldr	r1, .L600+20
 	ldrb	r3, [r1]	@ zero_extendqisi2
-	cbz	r3, .L577
+	cbz	r3, .L584
 	movs	r0, #0
 	strb	r0, [r1]
 	bl	nandc_set_seed
 	movs	r3, #1
 	strb	r3, [r1]
-.L577:
+.L584:
 	movs	r0, #0
 	pop	{r4, pc}
-.L591:
+.L601:
 	.align	2
-.L590:
+.L600:
 	.word	.LANCHOR0
 	.word	.LANCHOR19
+	.word	.LANCHOR28
 	.word	.LANCHOR21
-	.word	.LANCHOR43
-	.word	.LANCHOR46
+	.word	.LANCHOR45
+	.word	.LANCHOR48
 	.size	zftl_flash_de_init, .-zftl_flash_de_init
 	.section	.text.nandc_randomizer_enable,"ax",%progbits
 	.align	1
@@ -3338,13 +3540,13 @@ nandc_randomizer_enable:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L593
+	ldr	r3, .L603
 	strb	r0, [r3]
 	bx	lr
-.L594:
+.L604:
 	.align	2
-.L593:
-	.word	.LANCHOR46
+.L603:
+	.word	.LANCHOR48
 	.size	nandc_randomizer_enable, .-nandc_randomizer_enable
 	.section	.text.nandc_get_chip_if,"ax",%progbits
 	.align	1
@@ -3358,14 +3560,14 @@ nandc_get_chip_if:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L596
+	ldr	r3, .L606
 	adds	r0, r0, #8
 	ldr	r3, [r3]
 	add	r0, r3, r0, lsl #8
 	bx	lr
-.L597:
+.L607:
 	.align	2
-.L596:
+.L606:
 	.word	.LANCHOR13
 	.size	nandc_get_chip_if, .-nandc_get_chip_if
 	.section	.text.buf_reinit,"ax",%progbits
@@ -3379,12 +3581,12 @@ nandc_get_chip_if:
 buf_reinit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L601
+	ldr	r3, .L611
 	movs	r2, #0
 	push	{r4, r5, lr}
 	mov	r1, r2
 	mov	r4, r3
-.L599:
+.L609:
 	uxtb	r0, r2
 	adds	r2, r2, #1
 	cmp	r2, #32
@@ -3394,20 +3596,20 @@ buf_reinit:
 	strb	r5, [r3]
 	add	r3, r3, #48
 	str	r1, [r3, #-40]
-	bne	.L599
+	bne	.L609
 	movs	r3, #255
 	strb	r3, [r4, #1488]
-	ldr	r3, .L601+4
+	ldr	r3, .L611+4
 	strb	r1, [r3]
-	ldr	r3, .L601+8
+	ldr	r3, .L611+8
 	strb	r2, [r3]
 	pop	{r4, r5, pc}
-.L602:
+.L612:
 	.align	2
-.L601:
-	.word	.LANCHOR50
-	.word	.LANCHOR51
+.L611:
 	.word	.LANCHOR52
+	.word	.LANCHOR53
+	.word	.LANCHOR54
 	.size	buf_reinit, .-buf_reinit
 	.section	.text.buf_add_tail,"ax",%progbits
 	.align	1
@@ -3427,47 +3629,47 @@ buf_add_tail:
 	mov	r4, r1
 	ldrb	r3, [r0]	@ zero_extendqisi2
 	cmp	r3, #255
-	bne	.L604
+	bne	.L614
 	ldrb	r3, [r1, #1]	@ zero_extendqisi2
 	cmp	r3, #255
-	bne	.L605
+	bne	.L615
 	movs	r2, #74
-	ldr	r1, .L610
-	ldr	r0, .L610+4
+	ldr	r1, .L620
+	ldr	r0, .L620+4
 	bl	printf
-.L605:
+.L615:
 	ldrb	r3, [r4, #1]	@ zero_extendqisi2
 	strb	r3, [r5]
 	pop	{r4, r5, r6, pc}
-.L604:
-	ldr	r2, .L610+8
+.L614:
+	ldr	r2, .L620+8
 	movs	r1, #48
 	mov	r6, r2
-.L609:
+.L619:
 	mov	r5, r3
 	muls	r3, r1, r3
 	ldrb	r3, [r2, r3]	@ zero_extendqisi2
 	cmp	r3, #255
-	bne	.L609
+	bne	.L619
 	ldrb	r3, [r4, #1]	@ zero_extendqisi2
 	cmp	r3, #255
-	bne	.L607
+	bne	.L617
 	movs	r2, #81
-	ldr	r1, .L610
-	ldr	r0, .L610+4
+	ldr	r1, .L620
+	ldr	r0, .L620+4
 	bl	printf
-.L607:
+.L617:
 	movs	r3, #48
 	ldrb	r2, [r4, #1]	@ zero_extendqisi2
 	muls	r3, r5, r3
 	strb	r2, [r6, r3]
 	pop	{r4, r5, r6, pc}
-.L611:
+.L621:
 	.align	2
-.L610:
-	.word	.LANCHOR53
+.L620:
+	.word	.LANCHOR55
 	.word	.LC0
-	.word	.LANCHOR50
+	.word	.LANCHOR52
 	.size	buf_add_tail, .-buf_add_tail
 	.section	.text.queue_read_cmd,"ax",%progbits
 	.align	1
@@ -3491,23 +3693,23 @@ queue_read_cmd:
 	strb	r3, [r4, #43]
 	movs	r3, #255
 	strb	r3, [r4]
-	ldr	r0, .L613
+	ldr	r0, .L623
 	pop	{r4, lr}
 	b	buf_add_tail
-.L614:
+.L624:
 	.align	2
-.L613:
-	.word	.LANCHOR54
+.L623:
+	.word	.LANCHOR56
 	.size	queue_read_cmd, .-queue_read_cmd
-	.section	.text.buf_free,"ax",%progbits
+	.section	.text.zbuf_free,"ax",%progbits
 	.align	1
-	.global	buf_free
+	.global	zbuf_free
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	buf_free, %function
-buf_free:
+	.type	zbuf_free, %function
+zbuf_free:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
@@ -3515,31 +3717,31 @@ buf_free:
 	ldrb	r3, [r0, #2]	@ zero_extendqisi2
 	and	r3, r3, #8
 	strb	r3, [r0, #2]
-	cbz	r3, .L616
+	cbz	r3, .L626
 	ldr	r3, [r0, #20]
 	adds	r3, r3, #1
-	beq	.L616
-	ldr	r0, .L624
+	beq	.L626
+	ldr	r0, .L634
 	bl	buf_add_tail
-.L617:
-	ldr	r2, .L624+4
+.L627:
+	ldr	r2, .L634+4
 	ldrb	r3, [r2]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	strb	r3, [r2]
 	pop	{r3, pc}
-.L616:
-	ldr	r3, .L624
+.L626:
+	ldr	r3, .L634
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	strb	r2, [r1]
 	ldrb	r2, [r1, #1]	@ zero_extendqisi2
 	strb	r2, [r3]
-	b	.L617
-.L625:
+	b	.L627
+.L635:
 	.align	2
-.L624:
-	.word	.LANCHOR51
-	.word	.LANCHOR52
-	.size	buf_free, .-buf_free
+.L634:
+	.word	.LANCHOR53
+	.word	.LANCHOR54
+	.size	zbuf_free, .-zbuf_free
 	.section	.text.buf_alloc,"ax",%progbits
 	.align	1
 	.global	buf_alloc
@@ -3553,17 +3755,17 @@ buf_alloc:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r7, r0
-	ldr	r4, .L636
+	ldr	r4, .L646
 	ldrb	r3, [r4]	@ zero_extendqisi2
-	cbz	r3, .L627
-.L630:
-	ldr	r5, .L636+4
-	ldr	r2, .L636+8
+	cbz	r3, .L637
+.L640:
+	ldr	r5, .L646+4
+	ldr	r2, .L646+8
 	ldrb	r6, [r5]	@ zero_extendqisi2
 	add	r0, r6, r6, lsl #1
 	add	r0, r2, r0, lsl #4
-	cbz	r7, .L628
-.L629:
+	cbz	r7, .L638
+.L639:
 	movs	r1, #48
 	muls	r1, r6, r1
 	ldrb	r6, [r2, r1]	@ zero_extendqisi2
@@ -3584,29 +3786,29 @@ buf_alloc:
 	strb	r2, [r3, #40]
 	strb	r2, [r3, #41]
 	pop	{r3, r4, r5, r6, r7, pc}
-.L627:
+.L637:
 	movs	r2, #121
-	ldr	r1, .L636+12
-	ldr	r0, .L636+16
+	ldr	r1, .L646+12
+	ldr	r0, .L646+16
 	bl	printf
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L630
-.L632:
+	bne	.L640
+.L642:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L628:
+.L638:
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L629
-	b	.L632
-.L637:
+	bne	.L639
+	b	.L642
+.L647:
 	.align	2
-.L636:
+.L646:
+	.word	.LANCHOR54
+	.word	.LANCHOR53
 	.word	.LANCHOR52
-	.word	.LANCHOR51
-	.word	.LANCHOR50
-	.word	.LANCHOR55
+	.word	.LANCHOR57
 	.word	.LC0
 	.size	buf_alloc, .-buf_alloc
 	.section	.text.buf_remove_buf,"ax",%progbits
@@ -3624,36 +3826,36 @@ buf_remove_buf:
 	ldrb	r4, [r1, #1]	@ zero_extendqisi2
 	ldrb	r3, [r0]	@ zero_extendqisi2
 	cmp	r4, r3
-	bne	.L639
+	bne	.L649
 	ldrb	r3, [r1]	@ zero_extendqisi2
 	strb	r3, [r0]
-.L644:
+.L654:
 	movs	r0, #1
 	pop	{r4, r5, pc}
-.L642:
+.L652:
 	mov	r5, r3
 	muls	r3, r2, r3
 	ldrb	r3, [r0, r3]	@ zero_extendqisi2
 	cmp	r4, r3
-	bne	.L641
+	bne	.L651
 	muls	r2, r5, r2
 	ldrb	r3, [r1]	@ zero_extendqisi2
 	strb	r3, [r0, r2]
 	movs	r3, #255
 	strb	r3, [r1]
-	b	.L644
-.L639:
-	ldr	r0, .L645
+	b	.L654
+.L649:
+	ldr	r0, .L655
 	movs	r2, #48
-.L641:
+.L651:
 	cmp	r3, #255
-	bne	.L642
+	bne	.L652
 	movs	r0, #0
 	pop	{r4, r5, pc}
-.L646:
+.L656:
 	.align	2
-.L645:
-	.word	.LANCHOR50
+.L655:
+	.word	.LANCHOR52
 	.size	buf_remove_buf, .-buf_remove_buf
 	.section	.text.buf_remove_free,"ax",%progbits
 	.align	1
@@ -3668,36 +3870,36 @@ buf_remove_free:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	mov	r5, r0
-	ldr	r4, .L652
+	ldr	r4, .L662
 	ldrb	r3, [r4]	@ zero_extendqisi2
-	cbnz	r3, .L648
+	cbnz	r3, .L658
 	movs	r2, #172
-	ldr	r1, .L652+4
-	ldr	r0, .L652+8
+	ldr	r1, .L662+4
+	ldr	r0, .L662+8
 	bl	printf
-.L648:
+.L658:
 	ldrb	r3, [r4]	@ zero_extendqisi2
-	cbz	r3, .L647
+	cbz	r3, .L657
 	mov	r1, r5
-	ldr	r0, .L652+12
+	ldr	r0, .L662+12
 	bl	buf_remove_buf
 	cmp	r0, #1
-	bne	.L647
+	bne	.L657
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	strb	r3, [r4]
 	ldrb	r3, [r5, #2]	@ zero_extendqisi2
 	orr	r3, r3, #1
 	strb	r3, [r5, #2]
-.L647:
+.L657:
 	pop	{r3, r4, r5, pc}
-.L653:
+.L663:
 	.align	2
-.L652:
-	.word	.LANCHOR52
-	.word	.LANCHOR56
+.L662:
+	.word	.LANCHOR54
+	.word	.LANCHOR58
 	.word	.LC0
-	.word	.LANCHOR51
+	.word	.LANCHOR53
 	.size	buf_remove_free, .-buf_remove_free
 	.section	.text.flash_check_bad_block,"ax",%progbits
 	.align	1
@@ -3710,14 +3912,14 @@ buf_remove_free:
 flash_check_bad_block:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L655
+	ldr	r2, .L665
 	push	{r4, lr}
 	lsrs	r4, r1, #5
 	and	r1, r1, #31
 	ldrb	r3, [r2, #13]	@ zero_extendqisi2
 	ldrh	r2, [r2, #14]
 	smulbb	r3, r3, r2
-	ldr	r2, .L655+4
+	ldr	r2, .L665+4
 	uxth	r3, r3
 	ldr	r2, [r2]
 	adds	r3, r3, #31
@@ -3730,10 +3932,10 @@ flash_check_bad_block:
 	lsrs	r0, r0, r1
 	and	r0, r0, #1
 	pop	{r4, pc}
-.L656:
+.L666:
 	.align	2
-.L655:
-	.word	.LANCHOR31
+.L665:
+	.word	.LANCHOR32
 	.word	.LANCHOR27
 	.size	flash_check_bad_block, .-flash_check_bad_block
 	.section	.text.flash_mask_bad_block,"ax",%progbits
@@ -3747,7 +3949,7 @@ flash_check_bad_block:
 flash_mask_bad_block:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L658
+	ldr	r3, .L668
 	mov	r2, r1
 	push	{r4, r5, r6, lr}
 	mov	r5, r0
@@ -3755,11 +3957,11 @@ flash_mask_bad_block:
 	mov	r1, r0
 	ldrb	r4, [r3, #13]	@ zero_extendqisi2
 	ldrh	r3, [r3, #14]
-	ldr	r0, .L658+4
+	ldr	r0, .L668+4
 	smulbb	r4, r4, r3
 	bl	printf
 	uxth	r4, r4
-	ldr	r3, .L658+8
+	ldr	r3, .L668+8
 	add	r0, r4, #31
 	asrs	r0, r0, #5
 	ldr	r2, [r3]
@@ -3776,10 +3978,10 @@ flash_mask_bad_block:
 	orrs	r3, r3, r6
 	str	r3, [r2, r0]
 	pop	{r4, r5, r6, pc}
-.L659:
+.L669:
 	.align	2
-.L658:
-	.word	.LANCHOR31
+.L668:
+	.word	.LANCHOR32
 	.word	.LC42
 	.word	.LANCHOR27
 	.size	flash_mask_bad_block, .-flash_mask_bad_block
@@ -3799,19 +4001,19 @@ ftl_gc_write_buf:
 	ldrb	r3, [r0, #2]	@ zero_extendqisi2
 	orr	r3, r3, #2
 	strb	r3, [r0, #2]
-	ldr	r0, .L661
+	ldr	r0, .L671
 	bl	buf_add_tail
-	ldr	r3, .L661+4
+	ldr	r3, .L671+4
 	ldrb	r0, [r3]	@ zero_extendqisi2
 	adds	r0, r0, #1
 	uxtb	r0, r0
 	strb	r0, [r3]
 	pop	{r3, pc}
-.L662:
+.L672:
 	.align	2
-.L661:
-	.word	.LANCHOR57
-	.word	.LANCHOR58
+.L671:
+	.word	.LANCHOR59
+	.word	.LANCHOR60
 	.size	ftl_gc_write_buf, .-ftl_gc_write_buf
 	.section	.text.zftl_cache_flush,"ax",%progbits
 	.align	1
@@ -3839,20 +4041,20 @@ zftl_get_density:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	cbnz	r0, .L665
-	ldr	r3, .L668
+	cbnz	r0, .L675
+	ldr	r3, .L678
 	ldr	r0, [r3]
 	bx	lr
-.L665:
+.L675:
 	cmp	r0, #4
 	ite	cc
 	movcc	r0, #8192
 	movcs	r0, #0
 	bx	lr
-.L669:
+.L679:
 	.align	2
-.L668:
-	.word	.LANCHOR59
+.L678:
+	.word	.LANCHOR61
 	.size	zftl_get_density, .-zftl_get_density
 	.section	.text.gc_hook,"ax",%progbits
 	.align	1
@@ -3894,13 +4096,13 @@ FtlGetCurEraseBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L673
+	ldr	r3, .L683
 	ldrh	r0, [r3]
 	bx	lr
-.L674:
+.L684:
 	.align	2
-.L673:
-	.word	.LANCHOR60
+.L683:
+	.word	.LANCHOR62
 	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
 	.section	.text.FtlGetAllBlockNum,"ax",%progbits
 	.align	1
@@ -3914,12 +4116,12 @@ FtlGetAllBlockNum:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L676
+	ldr	r3, .L686
 	ldrh	r0, [r3]
 	bx	lr
-.L677:
+.L687:
 	.align	2
-.L676:
+.L686:
 	.word	.LANCHOR6
 	.size	FtlGetAllBlockNum, .-FtlGetAllBlockNum
 	.section	.text.FtlLowFormat,"ax",%progbits
@@ -3946,192 +4148,200 @@ FtlLowFormat:
 	.fpu softvfp
 	.type	gc_add_sblk, %function
 gc_add_sblk:
-	@ args = 0, pretend = 0, frame = 8
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L712
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r8, r2
+	ldr	r3, .L724
 	mov	r5, r0
-	sub	sp, sp, #24
 	mov	r4, r1
-	mov	r8, r2
-	ldrh	r3, [r3]
-	cmp	r3, r0
-	bhi	.L680
-	mov	r2, #338
-	ldr	r1, .L712+4
-	ldr	r0, .L712+8
-	bl	printf
-.L680:
-	ldr	r3, .L712+12
-	lsl	r10, r5, #2
-	ldr	r6, .L712+16
-	ldr	fp, .L712+44
 	ldr	r2, [r3]
-	str	r3, [sp, #20]
-	ldrh	r7, [r2, r5, lsl #1]
-	ldr	r2, [r6]
+	mov	r10, r3
 	tst	r2, #256
-	beq	.L681
-	ldr	r2, .L712+20
-	mov	r1, r5
-	ldr	r3, [fp]
-	ldr	r0, .L712+24
-	ldrh	r2, [r2]
-	add	r3, r3, r10
-	ldrb	r3, [r3, #2]	@ zero_extendqisi2
-	str	r2, [sp, #8]
-	ldr	r2, .L712+28
+	beq	.L690
+	ldr	r3, .L724+4
+	mov	r2, r1
+	mov	r1, r0
+	ldrh	r3, [r3]
+	str	r3, [sp, #12]
+	ldr	r3, .L724+8
+	ldrh	r3, [r3, #52]
+	str	r3, [sp, #8]
+	ldr	r3, .L724+12
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r0, lsl #1]
+	str	r3, [sp, #4]
+	ldr	r3, .L724+16
+	ldr	r3, [r3]
+	add	r3, r3, r0, lsl #2
+	ldr	r0, .L724+20
+	ldrb	r3, [r3, #2]	@ zero_extendqisi2
 	lsrs	r3, r3, #5
-	ldrh	r2, [r2, #52]
-	str	r7, [sp]
-	str	r2, [sp, #4]
-	mov	r2, r4
+	str	r3, [sp]
+	mov	r3, r8
 	bl	printf
-.L681:
-	ldr	r3, [fp]
-	add	r10, r10, r3
-	ldrb	r2, [r10, #2]	@ zero_extendqisi2
-	ands	r10, r2, #224
-	bne	.L682
-	cmp	r7, #0
-	beq	.L702
-	movw	r2, #343
-	ldr	r1, .L712+4
-	ldr	r0, .L712+8
+.L690:
+	ldr	r6, .L724+24
+	ldrh	r2, [r6]
+	cmp	r2, r5
+	bhi	.L691
+	mov	r2, #454
+	ldr	r1, .L724+28
+	ldr	r0, .L724+32
 	bl	printf
-.L700:
-	movs	r0, #0
-	b	.L679
-.L682:
-	ldr	r1, .L712+28
-	ldrh	r3, [r1]
+.L691:
+	ldrh	r3, [r6]
 	cmp	r3, r5
-	beq	.L700
-	ldr	r7, .L712+32
-	ldr	r3, [r7]
-	ldrh	r0, [r3, #48]
+	bhi	.L692
+	ldr	r0, [r10]
+	ands	r0, r0, #1024
+	beq	.L689
+	mov	r3, r8
+	mov	r2, r4
+	mov	r1, r5
+	ldr	r0, .L724+36
+	bl	printf
+.L712:
+	movs	r0, #0
+	b	.L689
+.L692:
+	ldr	r2, .L724+16
+	ldr	r3, .L724+12
+	ldr	r2, [r2]
+	ldr	r3, [r3]
+	add	r2, r2, r5, lsl #2
+	ldrh	r3, [r3, r5, lsl #1]
+	ldrb	r2, [r2, #2]	@ zero_extendqisi2
+	ands	r6, r2, #224
+	bne	.L694
+	cmp	r3, #0
+	beq	.L712
+	movw	r2, #461
+	ldr	r1, .L724+28
+	ldr	r0, .L724+32
+	bl	printf
+	b	.L712
+.L694:
+	ldr	r6, .L724+8
+	ldrh	r1, [r6]
+	cmp	r1, r5
+	beq	.L712
+	ldr	r7, .L724+40
+	ldr	r1, [r7]
+	ldrh	r0, [r1, #48]
 	cmp	r0, r5
-	beq	.L700
-	ldrh	r0, [r3, #16]
+	beq	.L712
+	ldrh	r0, [r1, #16]
 	cmp	r0, r5
-	beq	.L700
-	ldrh	r0, [r3, #80]
+	beq	.L712
+	ldrh	r0, [r1, #80]
 	cmp	r0, r5
-	beq	.L700
-	ldrh	ip, [r1, #52]!
+	beq	.L712
+	ldrh	ip, [r6, #52]!
 	movs	r0, #0
-.L684:
+.L695:
 	cmp	r0, ip
-	bcc	.L685
+	bcc	.L696
 	cmp	r4, #0
-	bne	.L689
-	ldr	r1, .L712+36
-	ldrh	r0, [r1]
-	cmp	r5, r0
-	beq	.L700
-	ldr	lr, .L712+48
-	mov	r1, r4
-.L688:
-	ldrh	r10, [lr, r1, lsl #1]
-	cmp	r5, r10
-	bne	.L687
-	ldr	r7, [r6]
-	ands	r7, r7, #256
-	beq	.L702
-	ldr	r3, [sp, #20]
+	bne	.L700
+	ldr	r0, .L724+44
+	ldrh	r6, [r0]
+	mov	r0, r4
+	cmp	r5, r6
+	beq	.L689
+	ldr	lr, .L724+56
+.L699:
+	ldrh	fp, [lr, r0, lsl #1]
+	cmp	r5, fp
+	bne	.L698
+	ldr	r0, [r10]
+	ands	r0, r0, #256
+	beq	.L689
+	stm	sp, {r5, r6}
 	lsrs	r2, r2, #5
 	mov	r1, r5
-	ldr	r3, [r3]
-	ldrh	r3, [r3, r5, lsl #1]
-	str	r0, [sp, #4]
-	str	r5, [sp]
-	ldr	r0, .L712+40
+	ldr	r0, .L724+48
 	bl	printf
-	b	.L700
-.L685:
-	ldrh	lr, [r1, #2]!
+	b	.L712
+.L696:
+	ldrh	lr, [r6, #2]!
 	cmp	lr, r5
-	beq	.L700
+	beq	.L712
 	adds	r0, r0, #1
-	b	.L684
-.L687:
-	adds	r1, r1, #1
-	cmp	r1, #8
-	bne	.L688
-	add	r3, r3, r8, lsl #7
-	add	r10, r3, #136
-.L690:
-	ldr	r3, [r6]
-	lsls	r3, r3, #23
-	bpl	.L691
-	ldr	r3, .L712+20
-	mov	r1, r5
-	ldr	r0, .L712+24
-	ldrh	r3, [r3]
-	str	ip, [sp, #4]
-	str	r3, [sp, #8]
-	ldr	r3, [sp, #20]
-	ldr	r3, [r3]
-	ldrh	r3, [r3, r5, lsl #1]
-	str	r3, [sp]
+	b	.L695
+.L698:
+	adds	r0, r0, #1
+	cmp	r0, #8
+	bne	.L699
+	add	r1, r1, r8, lsl #7
+	add	r6, r1, #136
+.L701:
+	ldr	r1, [r10]
+	lsls	r1, r1, #23
+	bpl	.L702
+	ldr	r1, .L724+4
+	ldr	r0, .L724+52
+	ldrh	r1, [r1]
+	stm	sp, {r3, ip}
 	lsrs	r3, r2, #5
 	mov	r2, r4
+	str	r1, [sp, #8]
+	mov	r1, r5
 	bl	printf
-.L691:
-	mov	r3, r10
-	add	r1, r10, #128
+.L702:
+	mov	r3, r6
+	add	r1, r6, #128
 	movw	r0, #65535
-.L694:
+.L705:
 	mov	r2, r3
 	adds	r3, r3, #2
 	ldrh	r6, [r2]
 	cmp	r6, r0
-	bne	.L692
+	bne	.L703
 	strh	r5, [r2]	@ movhi
-	cbz	r4, .L693
+	cbz	r4, .L704
 	ldr	r2, [r7]
 	ldrh	r3, [r2, #124]
 	adds	r3, r3, #1
 	strh	r3, [r2, #124]	@ movhi
-.L711:
+.L723:
 	movs	r0, #1
-.L679:
-	add	sp, sp, #24
+.L689:
+	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L689:
-	add	r10, r3, #392
-	b	.L690
-.L693:
+.L700:
+	add	r6, r1, #392
+	b	.L701
+.L704:
 	ldr	r3, [r7]
 	add	r8, r3, r8, lsl #1
 	ldrh	r3, [r8, #120]
 	adds	r3, r3, #1
 	strh	r3, [r8, #120]	@ movhi
-	b	.L711
-.L692:
-	cmp	r1, r3
-	bne	.L694
-	b	.L711
-.L702:
-	mov	r0, r7
-	b	.L679
-.L713:
+	b	.L723
+.L703:
+	cmp	r3, r1
+	bne	.L705
+	b	.L723
+.L725:
 	.align	2
-.L712:
-	.word	.LANCHOR6
-	.word	.LANCHOR61
-	.word	.LC0
-	.word	.LANCHOR9
+.L724:
 	.word	.LANCHOR14
-	.word	.LANCHOR62
-	.word	.LC43
 	.word	.LANCHOR63
-	.word	.LANCHOR10
 	.word	.LANCHOR64
-	.word	.LC44
+	.word	.LANCHOR9
 	.word	.LANCHOR7
+	.word	.LC43
+	.word	.LANCHOR6
 	.word	.LANCHOR65
+	.word	.LC0
+	.word	.LC44
+	.word	.LANCHOR10
+	.word	.LANCHOR66
+	.word	.LC45
+	.word	.LC46
+	.word	.LANCHOR67
 	.size	gc_add_sblk, .-gc_add_sblk
 	.section	.text.gc_mark_bad_ppa,"ax",%progbits
 	.align	1
@@ -4145,59 +4355,63 @@ gc_mark_bad_ppa:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	mov	r8, r0
-	ldr	r3, .L718
-	movs	r7, #1
-	ldr	r4, .L718+4
-	ldrh	r0, [r3]
-	ldr	r3, .L718+8
-	lsr	r6, r8, r0
-	rsb	r0, r0, #21
-	lsl	r0, r7, r0
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	uxth	r5, r6
+	mov	r7, r0
+	ldr	r3, .L730
+	movs	r6, #1
+	ldr	r2, .L730+4
+	ldrh	r3, [r3]
+	ldr	r8, .L730+16
+	lsr	r4, r0, r3
+	ldrb	r0, [r2]	@ zero_extendqisi2
+	uxth	r5, r4
+	rsb	r0, r0, #24
+	subs	r0, r0, r3
+	ldr	r3, .L730+8
+	lsl	r0, r6, r0
 	subs	r0, r0, #1
-	ands	r0, r0, r6
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	ands	r0, r0, r4
 	bl	__aeabi_uidiv
 	uxth	r10, r0
-	mov	r3, r8
+	mov	r3, r7
 	mov	r2, r5
-	ldr	r1, [r4, #324]
-	ldr	r0, .L718+12
+	ldr	r1, [r8, #580]
+	ldr	r0, .L730+12
 	bl	printf
-	mov	r1, r7
+	mov	r1, r6
 	movs	r2, #0
 	mov	r0, r10
 	bl	gc_add_sblk
-	ldr	r3, [r4, #324]
+	ldr	r3, [r8, #580]
 	movs	r1, #0
-.L715:
+.L727:
 	uxth	r2, r1
 	cmp	r3, r2
-	bhi	.L717
+	bhi	.L729
 	cmp	r3, #5
 	itttt	ls
 	addls	r2, r3, #1
-	addls	r3, r3, #164
-	strls	r2, [r4, #324]
-	strhls	r5, [r4, r3, lsl #1]	@ movhi
-	b	.L716
-.L717:
-	adds	r2, r2, #164
+	addls	r3, r3, #292
+	strls	r2, [r8, #580]
+	strhls	r5, [r8, r3, lsl #1]	@ movhi
+	b	.L728
+.L729:
+	add	r2, r2, #292
 	adds	r1, r1, #1
-	ldrh	r2, [r4, r2, lsl #1]
+	ldrh	r2, [r8, r2, lsl #1]
 	cmp	r5, r2
-	bne	.L715
-.L716:
+	bne	.L727
+.L728:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L719:
+.L731:
 	.align	2
-.L718:
-	.word	.LANCHOR66
-	.word	.LANCHOR63
-	.word	.LANCHOR67
-	.word	.LC45
+.L730:
+	.word	.LANCHOR68
+	.word	.LANCHOR31
+	.word	.LANCHOR69
+	.word	.LC47
+	.word	.LANCHOR64
 	.size	gc_mark_bad_ppa, .-gc_mark_bad_ppa
 	.section	.text.gc_get_src_ppa_from_index,"ax",%progbits
 	.align	1
@@ -4211,14 +4425,14 @@ gc_get_src_ppa_from_index:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L721
+	ldr	r3, .L733
 	ldr	r3, [r3]
 	ldr	r0, [r3, r0, lsl #2]
 	bx	lr
-.L722:
+.L734:
 	.align	2
-.L721:
-	.word	.LANCHOR68
+.L733:
+	.word	.LANCHOR70
 	.size	gc_get_src_ppa_from_index, .-gc_get_src_ppa_from_index
 	.section	.text.gc_write_completed,"ax",%progbits
 	.align	1
@@ -4232,164 +4446,171 @@ gc_write_completed:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r5, .L752
-.L724:
-	ldr	r1, .L752+4
+	ldr	r4, .L764
+.L736:
+	ldr	r1, .L764+4
 	ldrb	r7, [r1]	@ zero_extendqisi2
 	cmp	r7, #255
-	bne	.L737
+	bne	.L749
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L737:
+.L749:
 	movs	r3, #48
 	muls	r3, r7, r3
-	adds	r2, r5, r3
-	ldrb	r3, [r5, r3]	@ zero_extendqisi2
+	adds	r2, r4, r3
+	ldrb	r3, [r4, r3]	@ zero_extendqisi2
 	ldrh	r6, [r2, #32]
 	strb	r3, [r1]
 	ldr	r1, [r2, #36]
-	cbz	r1, .L725
-	ldr	r3, .L752+8
+	cbz	r1, .L737
+	ldr	r3, .L764+8
 	movs	r0, #1
 	ldr	r2, [r2, #24]
-	strh	r0, [r3, #316]	@ movhi
-	ldr	r0, .L752+12
-	str	r2, [r3, #320]
+	strh	r0, [r3, #572]	@ movhi
+	ldr	r0, .L764+12
+	str	r2, [r3, #576]
 	bl	printf
-	mov	r2, #672
-	ldr	r1, .L752+16
-	ldr	r0, .L752+20
+	mov	r2, #804
+	ldr	r1, .L764+16
+	ldr	r0, .L764+20
 	bl	printf
-.L725:
-	ldr	fp, .L752+48
+.L737:
+	ldr	fp, .L764+52
 	ldrb	r3, [fp]	@ zero_extendqisi2
 	cmp	r3, #3
-	bne	.L726
-	ldr	r3, .L752+24
+	bne	.L738
+	ldr	r3, .L764+24
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L738
+	ldr	r3, .L764+28
 	ldr	r3, [r3]
-	ldrb	r4, [r3, #89]	@ zero_extendqisi2
-	add	r4, r4, r4, lsl #1
-.L727:
-	ldr	r3, .L752+28
-	ldr	r10, .L752+52
+	ldrb	r5, [r3, #89]	@ zero_extendqisi2
+	add	r5, r5, r5, lsl #1
+.L739:
+	ldr	r3, .L764+32
+	ldr	r10, .L764+56
 	ldr	r3, [r3]
 	tst	r3, #256
-	beq	.L728
-	movs	r3, #48
+	beq	.L740
+	ldr	r1, [r10]
+	movs	r2, #48
+	mla	r2, r2, r7, r4
+	ldr	r0, .L764+36
+	ldrb	r1, [r1, r6]	@ zero_extendqisi2
+	ldrh	r3, [r2, #32]
+	ldrb	r2, [r2, #1]	@ zero_extendqisi2
+	str	r1, [sp]
 	mov	r1, r6
-	mla	r3, r3, r7, r5
-	ldr	r0, .L752+32
-	ldrb	r2, [r3, #1]	@ zero_extendqisi2
-	ldr	r3, [r10]
-	ldrb	r3, [r3, r6]	@ zero_extendqisi2
-	str	r3, [sp]
-	mov	r3, r6
 	bl	printf
-.L728:
+.L740:
 	movs	r3, #48
 	ldr	r2, [r10]
-	mla	r3, r3, r7, r5
+	mla	r3, r3, r7, r4
 	ldrb	r2, [r2, r6]	@ zero_extendqisi2
 	mov	r8, r6
 	ldrb	r3, [r3, #1]	@ zero_extendqisi2
 	cmp	r2, r3
-	beq	.L729
-	movw	r2, #681
-	ldr	r1, .L752+16
-	ldr	r0, .L752+20
+	beq	.L741
+	movw	r2, #813
+	ldr	r1, .L764+16
+	ldr	r0, .L764+20
 	bl	printf
-.L729:
+.L741:
 	movs	r3, #48
-	mla	r7, r3, r7, r5
+	mla	r7, r3, r7, r4
 	ldrb	r3, [r7, #45]	@ zero_extendqisi2
 	cmp	r3, #3
-	beq	.L730
+	beq	.L742
 	ldrb	r3, [fp]	@ zero_extendqisi2
 	cmp	r3, #3
-	bne	.L730
-	ldr	r3, .L752+36
+	bne	.L742
+	ldr	r3, .L764+40
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L730
-	ldr	r3, .L752+40
+	cbnz	r3, .L742
+	ldr	r3, .L764+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L731
-	ldr	r3, .L752+44
+	cbnz	r3, .L742
+	ldr	r3, .L764+44
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L730
-.L731:
+	cbz	r3, .L743
+	ldr	r3, .L764+48
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L742
+.L743:
 	ldr	r2, [r10]
 	movs	r3, #0
 	movs	r1, #48
 	mov	r0, r3
 	add	r6, r6, r2
-.L732:
+.L744:
 	uxth	r2, r3
-	cmp	r4, r2
-	bls	.L724
+	cmp	r5, r2
+	bls	.L736
 	ldrb	r2, [r6, r3]	@ zero_extendqisi2
 	adds	r3, r3, #1
-	mla	r2, r1, r2, r5
+	mla	r2, r1, r2, r4
 	strb	r0, [r2, #45]
-	b	.L732
-.L726:
-	ldr	r3, .L752+40
+	b	.L744
+.L738:
+	ldr	r3, .L764+44
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L739
-	ldr	r3, .L752+44
+	cbz	r3, .L750
+	ldr	r3, .L764+48
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L739
-	ldr	r3, .L752+24
-	ldr	r3, [r3]
-	ldrb	r4, [r3, #89]	@ zero_extendqisi2
-	lsls	r4, r4, #1
-	b	.L727
-.L739:
-	movs	r4, #1
-	b	.L727
-.L730:
-	ldr	r7, .L752+8
+	cmp	r3, #0
+	ite	eq
+	moveq	r5, #1
+	movne	r5, #2
+	b	.L739
+.L750:
+	movs	r5, #1
+	b	.L739
+.L742:
+	ldr	r7, .L764+8
 	mov	fp, #255
 	movs	r3, #48
-	strh	r6, [r7, #312]	@ movhi
-.L733:
+	strh	r6, [r7, #568]	@ movhi
+.L745:
 	sub	r2, r8, r6
 	uxth	r2, r2
-	cmp	r4, r2
-	bls	.L724
+	cmp	r5, r2
+	bls	.L736
 	ldr	r2, [r10]
 	movs	r1, #0
 	str	r3, [sp, #12]
 	ldrb	r0, [r2, r8]	@ zero_extendqisi2
 	strb	fp, [r2, r8]
 	add	r8, r8, #1
-	mla	r2, r3, r0, r5
+	mla	r2, r3, r0, r4
 	add	r0, r0, r0, lsl #1
 	strb	r1, [r2, #45]
-	add	r0, r5, r0, lsl #4
-	bl	buf_free
+	add	r0, r4, r0, lsl #4
+	bl	zbuf_free
 	ldrb	r2, [r7, #7]	@ zero_extendqisi2
 	ldr	r3, [sp, #12]
 	subs	r2, r2, #1
 	strb	r2, [r7, #7]
-	b	.L733
-.L753:
+	b	.L745
+.L765:
 	.align	2
-.L752:
-	.word	.LANCHOR50
-	.word	.LANCHOR69
-	.word	.LANCHOR63
-	.word	.LC46
-	.word	.LANCHOR70
+.L764:
+	.word	.LANCHOR52
+	.word	.LANCHOR71
+	.word	.LANCHOR64
+	.word	.LC48
+	.word	.LANCHOR72
 	.word	.LC0
+	.word	.LANCHOR35
 	.word	.LANCHOR10
 	.word	.LANCHOR14
-	.word	.LC47
+	.word	.LC49
+	.word	.LANCHOR77
+	.word	.LANCHOR74
 	.word	.LANCHOR75
-	.word	.LANCHOR72
 	.word	.LANCHOR73
-	.word	.LANCHOR71
-	.word	.LANCHOR74
+	.word	.LANCHOR76
 	.size	gc_write_completed, .-gc_write_completed
 	.section	.text.gc_get_src_blk,"ax",%progbits
 	.align	1
@@ -4402,54 +4623,54 @@ gc_write_completed:
 gc_get_src_blk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L763
+	ldr	r3, .L775
 	push	{r4, r5, r6, r7, lr}
 	ldr	r2, [r3]
-	ldr	r3, .L763+4
+	ldr	r3, .L775+4
 	ldrh	r4, [r2, #124]
 	ldrb	r1, [r3]	@ zero_extendqisi2
-	cbz	r4, .L755
+	cbz	r4, .L767
 	add	r3, r2, #392
 	movs	r4, #1
-.L756:
+.L768:
 	add	r6, r3, #128
 	movw	r5, #65535
-.L760:
+.L772:
 	mov	r7, r3
 	ldrh	r0, [r3], #2
 	cmp	r0, r5
-	beq	.L758
+	beq	.L770
 	strh	r5, [r7]	@ movhi
-	cbz	r4, .L759
+	cbz	r4, .L771
 	ldrh	r3, [r2, #124]
 	subs	r3, r3, #1
 	strh	r3, [r2, #124]	@ movhi
 	pop	{r4, r5, r6, r7, pc}
-.L755:
+.L767:
 	add	r3, r1, #60
 	ldrh	r3, [r2, r3, lsl #1]
-	cbz	r3, .L761
+	cbz	r3, .L773
 	add	r3, r2, r1, lsl #7
 	adds	r3, r3, #136
-	b	.L756
-.L759:
+	b	.L768
+.L771:
 	add	r2, r2, r1, lsl #1
 	ldrh	r3, [r2, #120]
 	subs	r3, r3, #1
 	strh	r3, [r2, #120]	@ movhi
 	pop	{r4, r5, r6, r7, pc}
-.L758:
+.L770:
 	cmp	r3, r6
-	bne	.L760
+	bne	.L772
 	pop	{r4, r5, r6, r7, pc}
-.L761:
+.L773:
 	movw	r0, #65535
 	pop	{r4, r5, r6, r7, pc}
-.L764:
+.L776:
 	.align	2
-.L763:
+.L775:
 	.word	.LANCHOR10
-	.word	.LANCHOR76
+	.word	.LANCHOR78
 	.size	gc_get_src_blk, .-gc_get_src_blk
 	.section	.text.gc_free_temp_buf,"ax",%progbits
 	.align	1
@@ -4463,55 +4684,55 @@ gc_free_temp_buf:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
-	ldr	r5, .L779
+	ldr	r5, .L791
 	ldrb	r0, [r5, #7]	@ zero_extendqisi2
-	cbz	r0, .L765
-	ldr	r3, .L779+4
+	cbz	r0, .L777
+	ldr	r3, .L791+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #1
-	bhi	.L772
-	ldr	r3, .L779+8
+	bhi	.L784
+	ldr	r3, .L791+8
 	movs	r7, #48
-	ldrh	r4, [r5, #312]
-	ldr	r6, .L779+12
+	ldrh	r4, [r5, #568]
+	ldr	r6, .L791+12
 	ldrh	r2, [r3]
-	ldr	r3, .L779+16
+	ldr	r3, .L791+16
 	add	r1, r4, #24
-	ldr	r0, .L779+20
+	ldr	r0, .L791+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	muls	r2, r3, r2
 	cmp	r2, r1
 	it	cs
 	movcs	r2, r1
 	ldr	r1, [r6]
-.L767:
+.L779:
 	cmp	r4, r2
-	bcc	.L770
-.L772:
+	bcc	.L782
+.L784:
 	movs	r0, #0
-.L765:
+.L777:
 	pop	{r3, r4, r5, r6, r7, pc}
-.L770:
+.L782:
 	ldrb	r3, [r1, r4]	@ zero_extendqisi2
 	cmp	r3, #255
-	beq	.L768
+	beq	.L780
 	mla	ip, r7, r3, r0
 	ldrb	ip, [ip, #45]	@ zero_extendqisi2
 	cmp	ip, #0
-	bne	.L768
+	bne	.L780
 	add	r3, r3, r3, lsl #1
 	add	r0, r0, r3, lsl #4
-	bl	buf_free
-	ldr	r3, .L779+24
+	bl	zbuf_free
+	ldr	r3, .L791+24
 	ldr	r3, [r3]
 	lsls	r3, r3, #23
-	bpl	.L769
+	bpl	.L781
 	ldr	r3, [r6]
 	mov	r1, r4
-	ldr	r0, .L779+28
+	ldr	r0, .L791+28
 	ldrb	r2, [r3, r4]	@ zero_extendqisi2
 	bl	printf
-.L769:
+.L781:
 	ldr	r3, [r6]
 	movs	r2, #255
 	movs	r0, #1
@@ -4520,20 +4741,20 @@ gc_free_temp_buf:
 	subs	r3, r3, #1
 	strb	r3, [r5, #7]
 	pop	{r3, r4, r5, r6, r7, pc}
-.L768:
-	adds	r4, r4, #1
-	b	.L767
 .L780:
+	adds	r4, r4, #1
+	b	.L779
+.L792:
 	.align	2
-.L779:
-	.word	.LANCHOR63
+.L791:
+	.word	.LANCHOR64
+	.word	.LANCHOR54
+	.word	.LANCHOR79
+	.word	.LANCHOR76
+	.word	.LANCHOR80
 	.word	.LANCHOR52
-	.word	.LANCHOR77
-	.word	.LANCHOR74
-	.word	.LANCHOR78
-	.word	.LANCHOR50
 	.word	.LANCHOR14
-	.word	.LC48
+	.word	.LC50
 	.size	gc_free_temp_buf, .-gc_free_temp_buf
 	.section	.text.print_gc_debug_info,"ax",%progbits
 	.align	1
@@ -4547,30 +4768,30 @@ print_gc_debug_info:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, lr}
-	ldr	r4, .L782
-	ldr	r0, .L782+4
+	ldr	r4, .L794
+	ldr	r0, .L794+4
 	ldrh	r4, [r4]
-	ldrh	r3, [r0, #310]
+	ldrh	r3, [r0, #566]
 	ldrh	r2, [r0, #2]
 	ldrh	r1, [r0]
 	str	r4, [sp, #8]
 	ldrb	r0, [r0, #7]	@ zero_extendqisi2
 	str	r0, [sp, #4]
-	ldr	r0, .L782+8
+	ldr	r0, .L794+8
 	ldrb	r0, [r0]	@ zero_extendqisi2
 	str	r0, [sp]
-	ldr	r0, .L782+12
+	ldr	r0, .L794+12
 	bl	printf
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, pc}
-.L783:
+.L795:
 	.align	2
-.L782:
-	.word	.LANCHOR79
-	.word	.LANCHOR63
-	.word	.LANCHOR52
-	.word	.LC49
+.L794:
+	.word	.LANCHOR81
+	.word	.LANCHOR64
+	.word	.LANCHOR54
+	.word	.LC51
 	.size	print_gc_debug_info, .-print_gc_debug_info
 	.section	.text.zftl_get_gc_node,"ax",%progbits
 	.align	1
@@ -4585,25 +4806,25 @@ zftl_get_gc_node:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	cmp	r1, #5
-	bne	.L785
-	ldr	r3, .L788
+	bne	.L797
+	ldr	r3, .L800
 	mov	r1, r0
-.L787:
+.L799:
 	ldr	r0, [r3]
 	b	_list_get_gc_head_node.isra.2
-.L785:
+.L797:
 	cmp	r1, #2
-	bne	.L786
+	bne	.L798
 	b	zftl_get_gc_node.part.9
-.L786:
+.L798:
 	mov	r1, r0
-	ldr	r3, .L788+4
-	b	.L787
-.L789:
+	ldr	r3, .L800+4
+	b	.L799
+.L801:
 	.align	2
-.L788:
-	.word	.LANCHOR80
-	.word	.LANCHOR81
+.L800:
+	.word	.LANCHOR82
+	.word	.LANCHOR83
 	.size	zftl_get_gc_node, .-zftl_get_gc_node
 	.section	.text.gc_search_src_blk,"ax",%progbits
 	.align	1
@@ -4616,7 +4837,7 @@ zftl_get_gc_node:
 gc_search_src_blk:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L889
+	ldr	r3, .L901
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #32
 	str	r2, [sp, #12]
@@ -4625,25 +4846,25 @@ gc_search_src_blk:
 	ldr	r3, [r3]
 	str	r1, [sp, #16]
 	ldrh	r5, [r3, r2, lsl #1]
-	cbz	r5, .L791
+	cbz	r5, .L803
 	mov	r0, r5
-.L790:
+.L802:
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L791:
+.L803:
 	cmp	r0, #0
-	bne	.L793
-	ldr	r10, .L889+28
+	bne	.L805
+	ldr	r10, .L901+28
 	mov	r4, r0
-	ldr	r6, .L889+4
+	ldr	r6, .L901+4
 	mov	r8, r0
 	strh	r0, [r6]	@ movhi
-.L794:
+.L806:
 	ldrh	r5, [sp, #12]
 	uxth	r3, r8
 	cmp	r3, r5
-	bcs	.L799
+	bcs	.L811
 	ldrh	r2, [r6]
 	movs	r1, #3
 	mov	r0, r2
@@ -4656,44 +4877,44 @@ gc_search_src_blk:
 	add	r2, r2, #1
 	uxth	r2, r2
 	strh	r2, [r6]	@ movhi
-	beq	.L795
-	ldr	r3, .L889+8
+	beq	.L807
+	ldr	r3, .L901+8
 	ldr	r3, [r3]
 	lsls	r3, r3, #23
-	bpl	.L796
+	bpl	.L808
 	ldr	r3, [r10]
 	mov	r1, r0
 	ldrh	r3, [r3, r0, lsl #1]
-	ldr	r0, .L889+12
+	ldr	r0, .L901+12
 	bl	printf
-.L796:
+.L808:
 	ldr	r3, [r10]
 	ldrh	r2, [r3, r7, lsl #1]
-	ldr	r3, .L889+16
+	ldr	r3, .L901+16
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcs	.L795
+	bcs	.L807
 	movs	r2, #0
 	mov	r0, r7
 	mov	r1, r2
 	bl	gc_add_sblk
 	cmp	r0, #0
-	beq	.L798
+	beq	.L810
 	adds	r4, r4, #1
 	uxth	r4, r4
 	cmp	r5, r4
-	bcs	.L798
-.L799:
+	bcs	.L810
+.L811:
 	ldr	r3, [sp, #16]
 	lsls	r0, r3, #30
-	bpl	.L801
-	ldr	r6, .L889+20
+	bpl	.L813
+	ldr	r6, .L901+20
 	mov	r8, #0
-	ldr	r7, .L889+24
-.L802:
+	ldr	r7, .L901+24
+.L814:
 	uxth	r3, r8
 	cmp	r5, r3
-	bls	.L806
+	bls	.L818
 	ldrh	r10, [r7]
 	movs	r1, #5
 	mov	r0, r10
@@ -4702,196 +4923,196 @@ gc_search_src_blk:
 	movw	r2, #65535
 	strh	r10, [r7]	@ movhi
 	cmp	r0, r2
-	beq	.L803
-	ldr	r2, .L889+28
+	beq	.L815
+	ldr	r2, .L901+28
 	ldrh	r3, [r6]
 	ldr	r2, [r2]
 	ldrh	r2, [r2, r0, lsl #1]
 	cmp	r2, r3
-	bcs	.L803
+	bcs	.L815
 	movs	r2, #0
 	mov	r1, r2
 	bl	gc_add_sblk
 	cmp	r0, #0
-	beq	.L805
+	beq	.L817
 	adds	r4, r4, #1
 	uxth	r4, r4
 	cmp	r5, r4
-	bcs	.L805
-.L806:
+	bcs	.L817
+.L818:
 	cmp	r4, r5
-	ldr	r1, .L889+32
-	bcs	.L808
-	ldr	r3, .L889+36
+	ldr	r1, .L901+32
+	bcs	.L820
+	ldr	r3, .L901+36
 	ldrh	r1, [r1]
 	ldrh	r2, [r6]
 	ldrh	r0, [r3]
-	ldr	r3, .L889+40
+	ldr	r3, .L901+40
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	muls	r3, r0, r3
 	sub	r3, r3, r1, lsr #2
 	cmp	r2, r3
-	bge	.L801
+	bge	.L813
 	add	r2, r2, r1, lsr #3
 	strh	r2, [r6]	@ movhi
-.L801:
+.L813:
 	ldr	r3, [sp, #16]
 	lsls	r1, r3, #31
-	bpl	.L809
+	bpl	.L821
 	cmp	r4, r5
-	bcs	.L809
-	ldr	r8, .L889+48
+	bcs	.L821
+	ldr	r8, .L901+48
 	movs	r6, #0
 	movw	r7, #65535
-.L814:
+.L826:
 	ldrh	r10, [r8]
 	mov	r0, r10
 	add	r10, r10, #1
 	bl	zftl_get_gc_node.part.9
 	cmp	r0, r7
 	strh	r10, [r8]	@ movhi
-	beq	.L810
+	beq	.L822
 	movs	r2, #0
 	mov	r1, r2
 	bl	gc_add_sblk
 	cmp	r0, #0
-	beq	.L811
+	beq	.L823
 	adds	r4, r4, #1
 	uxth	r4, r4
 	cmp	r5, r4
-	bhi	.L811
-.L812:
-	ldr	r3, .L889+32
-	ldr	r2, .L889+16
+	bhi	.L823
+.L824:
+	ldr	r3, .L901+32
+	ldr	r2, .L901+16
 	ldrh	r1, [r3]
 	ldrh	r3, [r2]
 	cmp	r3, r1, lsr #1
-	bls	.L809
+	bls	.L821
 	sub	r3, r3, r1, lsr #3
-	b	.L888
-.L795:
+	b	.L900
+.L807:
 	movs	r3, #0
 	strh	r3, [r6]	@ movhi
-	b	.L799
-.L798:
+	b	.L811
+.L810:
 	add	r8, r8, #1
-	b	.L794
-.L803:
+	b	.L806
+.L815:
 	movs	r3, #0
 	strh	r3, [r7]	@ movhi
-	b	.L806
-.L805:
+	b	.L818
+.L817:
 	add	r8, r8, #1
-	b	.L802
-.L808:
+	b	.L814
+.L820:
 	ldrh	r3, [r6]
 	ldrh	r2, [r1]
 	cmp	r3, r2
 	itt	hi
 	subhi	r3, r3, r2, lsr #3
 	strhhi	r3, [r6]	@ movhi
-	b	.L801
-.L810:
+	b	.L813
+.L822:
 	movs	r3, #0
 	strh	r3, [r8]	@ movhi
-.L813:
+.L825:
 	cmp	r4, r5
-	bcs	.L812
-	ldr	r2, .L889+16
-	ldr	r1, .L889+32
+	bcs	.L824
+	ldr	r2, .L901+16
+	ldr	r1, .L901+32
 	ldrh	r3, [r2]
 	ldrh	r1, [r1]
 	cmp	r3, r1
-	bcs	.L809
+	bcs	.L821
 	add	r3, r3, r1, lsr #3
-.L888:
+.L900:
 	strh	r3, [r2]	@ movhi
-.L809:
-	ldr	r3, .L889+8
+.L821:
+	ldr	r3, .L901+8
 	ldr	r3, [r3]
 	lsls	r3, r3, #23
-	bpl	.L836
+	bpl	.L848
 	ldr	r3, [sp, #12]
 	mov	r1, fp
 	ldr	r2, [sp, #16]
-	ldr	r0, .L889+44
+	ldr	r0, .L901+44
 	str	r3, [sp]
 	mov	r3, r4
 	bl	printf
-.L836:
+.L848:
 	mov	r0, r4
-	b	.L790
-.L811:
+	b	.L802
+.L823:
 	adds	r6, r6, #1
 	uxth	r3, r6
 	cmp	r5, r3
-	bhi	.L814
-	b	.L813
-.L890:
+	bhi	.L826
+	b	.L825
+.L902:
 	.align	2
-.L889:
+.L901:
 	.word	.LANCHOR10
-	.word	.LANCHOR82
-	.word	.LANCHOR14
-	.word	.LC50
-	.word	.LANCHOR62
 	.word	.LANCHOR84
-	.word	.LANCHOR83
-	.word	.LANCHOR9
-	.word	.LANCHOR85
-	.word	.LANCHOR77
-	.word	.LANCHOR78
-	.word	.LC51
+	.word	.LANCHOR14
+	.word	.LC52
+	.word	.LANCHOR63
 	.word	.LANCHOR86
-.L793:
-	ldr	r3, .L891
-	strh	r5, [r3, #314]	@ movhi
-	ldr	r3, .L891+4
+	.word	.LANCHOR85
+	.word	.LANCHOR9
+	.word	.LANCHOR87
+	.word	.LANCHOR79
+	.word	.LANCHOR80
+	.word	.LC53
+	.word	.LANCHOR88
+.L805:
+	ldr	r3, .L903
+	strh	r5, [r3, #570]	@ movhi
+	ldr	r3, .L903+4
 	strh	r5, [r3]	@ movhi
 	ldr	r3, [sp, #16]
 	ands	r3, r3, #1
 	str	r3, [sp, #20]
-	beq	.L839
-	ldr	r1, .L891+8
-	ldr	r2, .L891+12
-	ldr	r6, .L891+16
+	beq	.L851
+	ldr	r1, .L903+8
+	ldr	r2, .L903+12
+	ldr	r6, .L903+16
 	ldrh	r3, [r1]
 	mov	r10, r1
 	ldrh	r0, [r2]
 	str	r2, [sp, #24]
 	cmp	r3, r0, lsr #2
-	bcc	.L816
+	bcc	.L828
 	ldrh	r2, [r6]
 	cmp	r2, r3
-	bls	.L840
-.L816:
+	bls	.L852
+.L828:
 	ldrh	r3, [r6]
 	movs	r0, #0
-	ldr	r4, .L891+20
+	ldr	r4, .L903+20
 	lsrs	r3, r3, #2
 	strh	r3, [r4]	@ movhi
 	bl	zftl_get_gc_node.part.9
 	movw	r2, #65535
 	cmp	r0, r2
-	beq	.L841
-	ldr	r2, .L891+24
+	beq	.L853
+	ldr	r2, .L903+24
 	ldr	r1, [r2]
-	ldr	r2, .L891+28
+	ldr	r2, .L903+28
 	ldrh	r3, [r1, r0, lsl #1]
 	movs	r1, #0
 	ldrh	r2, [r2]
 	cmp	r3, r2, lsr #2
-	bcs	.L842
+	bcs	.L854
 	mov	r2, fp
 	strh	r1, [r4]	@ movhi
 	bl	gc_add_sblk
 	adds	r4, r0, #0
 	it	ne
 	movne	r4, #1
-.L818:
-	ldr	r7, .L891+20
+.L830:
+	ldr	r7, .L903+20
 	mov	r8, #64
-.L820:
+.L832:
 	ldrh	r2, [r7]
 	mov	r0, r2
 	str	r2, [sp, #28]
@@ -4901,38 +5122,38 @@ gc_search_src_blk:
 	cmp	r0, r3
 	add	r2, r2, #1
 	strh	r2, [r7]	@ movhi
-	beq	.L817
+	beq	.L829
 	mov	r2, fp
 	movs	r1, #0
 	bl	gc_add_sblk
-	cbz	r0, .L819
+	cbz	r0, .L831
 	adds	r4, r4, #1
 	ldr	r3, [sp, #12]
 	uxth	r4, r4
 	cmp	r4, r3
-	bcs	.L817
-.L819:
+	bcs	.L829
+.L831:
 	add	r3, r8, #-1
 	uxth	r8, r3
 	cmp	r8, #0
-	bne	.L820
-.L817:
+	bne	.L832
+.L829:
 	ldr	r3, [sp, #24]
 	ldrh	r2, [r10]
 	ldrh	r3, [r3]
 	cmp	r2, r3, lsr #3
-	bhi	.L837
+	bhi	.L849
 	ldrh	r3, [r6]
 	adds	r3, r3, #8
 	cmp	r2, r3
-	ble	.L815
-.L837:
-	ldr	r6, .L891+32
+	ble	.L827
+.L849:
+	ldr	r6, .L903+32
 	mov	r8, #64
 	movw	r7, #65535
 	movs	r3, #0
 	strh	r3, [r6]	@ movhi
-.L822:
+.L834:
 	ldrh	r10, [r6]
 	movs	r1, #3
 	mov	r0, r10
@@ -4940,31 +5161,31 @@ gc_search_src_blk:
 	bl	zftl_get_gc_node
 	cmp	r0, r7
 	strh	r10, [r6]	@ movhi
-	beq	.L815
+	beq	.L827
 	mov	r2, fp
 	movs	r1, #0
 	bl	gc_add_sblk
-	cbz	r0, .L821
+	cbz	r0, .L833
 	adds	r4, r4, #1
 	ldr	r3, [sp, #12]
 	uxth	r4, r4
 	cmp	r4, r3
-	bcs	.L815
-.L821:
+	bcs	.L827
+.L833:
 	add	r8, r8, #-1
 	uxth	r8, r8
 	cmp	r8, #0
-	bne	.L822
-.L815:
+	bne	.L834
+.L827:
 	ldr	r3, [sp, #16]
 	lsls	r2, r3, #30
-	bpl	.L823
-	ldr	r6, .L891+36
+	bpl	.L835
+	ldr	r6, .L903+36
 	mov	r10, #64
-	ldr	r7, .L891+40
+	ldr	r7, .L903+40
 	movs	r3, #0
 	strh	r3, [r7]	@ movhi
-.L828:
+.L840:
 	ldrh	r8, [r7]
 	movs	r1, #5
 	mov	r0, r8
@@ -4973,54 +5194,54 @@ gc_search_src_blk:
 	strh	r3, [r7]	@ movhi
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L824
+	beq	.L836
 	ldr	r3, [sp, #12]
 	cmp	r3, #1
-	bne	.L825
-	ldr	r3, .L891+44
-	ldr	r2, .L891+48
+	bne	.L837
+	ldr	r3, .L903+44
+	ldr	r2, .L903+48
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	ldrh	r2, [r2]
 	smulbb	r3, r3, r2
-	ldr	r2, .L891+28
+	ldr	r2, .L903+28
 	ldrh	r2, [r2]
 	sub	r3, r3, r2, lsr #3
 	strh	r3, [r6]	@ movhi
-.L825:
-	ldr	r3, .L891+24
+.L837:
+	ldr	r3, .L903+24
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r0, lsl #1]
 	ldrh	r3, [r6]
 	cmp	r2, r3
-	bcs	.L826
+	bcs	.L838
 	mov	r2, fp
 	movs	r1, #0
 	bl	gc_add_sblk
 	cmp	r0, #0
-	beq	.L827
+	beq	.L839
 	adds	r4, r4, #1
 	ldr	r3, [sp, #12]
 	uxth	r4, r4
 	adds	r5, r5, #1
 	uxth	r5, r5
 	cmp	r4, r3
-	bcc	.L827
-.L824:
+	bcc	.L839
+.L836:
 	ldr	r3, [sp, #12]
-	ldr	r1, .L891+28
-	ldr	r0, .L891+44
+	ldr	r1, .L903+28
+	ldr	r0, .L903+44
 	cmp	r4, r3
-	bcc	.L829
+	bcc	.L841
 	cmp	r5, #0
-	bne	.L830
-	ldr	r3, .L891+52
+	bne	.L842
+	ldr	r3, .L903+52
 	ldrh	r2, [r3]
-	ldr	r3, .L891+56
+	ldr	r3, .L903+56
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bls	.L830
-.L829:
-	ldr	r3, .L891+48
+	bls	.L842
+.L841:
+	ldr	r3, .L903+48
 	ldrh	r1, [r1]
 	ldrh	r2, [r6]
 	ldrh	r5, [r3]
@@ -5029,20 +5250,20 @@ gc_search_src_blk:
 	muls	r3, r5, r3
 	subs	r3, r3, r1
 	cmp	r2, r3
-	bge	.L823
+	bge	.L835
 	add	r2, r2, r1
 	strh	r2, [r6]	@ movhi
-.L823:
+.L835:
 	ldr	r3, [sp, #20]
 	cmp	r3, #0
-	beq	.L809
-	ldr	r5, .L891+60
+	beq	.L821
+	ldr	r5, .L903+60
 	mov	r8, #64
-	ldr	r7, .L891+24
+	ldr	r7, .L903+24
 	movs	r3, #0
-	ldr	r6, .L891+32
+	ldr	r6, .L903+32
 	strh	r3, [r6]	@ movhi
-.L834:
+.L846:
 	ldrh	r10, [r6]
 	movs	r1, #3
 	mov	r0, r10
@@ -5051,67 +5272,67 @@ gc_search_src_blk:
 	movw	r3, #65535
 	strh	r10, [r6]	@ movhi
 	cmp	r0, r3
-	beq	.L831
+	beq	.L843
 	ldr	r3, [r7]
 	ldrh	r2, [r5]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r2, r3
-	bls	.L832
+	bls	.L844
 	cmp	r3, #2
-	bls	.L832
-	ldr	r3, .L891+12
+	bls	.L844
+	ldr	r3, .L903+12
 	ldrh	r2, [r3]
-	ldr	r3, .L891+8
+	ldr	r3, .L903+8
 	ldrh	r3, [r3]
 	cmp	r3, r2, lsr #1
-	bls	.L831
-.L832:
+	bls	.L843
+.L844:
 	mov	r2, fp
 	movs	r1, #0
 	bl	gc_add_sblk
-	cbz	r0, .L833
+	cbz	r0, .L845
 	adds	r4, r4, #1
 	ldr	r3, [sp, #12]
 	uxth	r4, r4
 	cmp	r4, r3
-	bcs	.L831
-.L833:
+	bcs	.L843
+.L845:
 	add	r8, r8, #-1
 	uxth	r8, r8
 	cmp	r8, #0
-	bne	.L834
-.L831:
+	bne	.L846
+.L843:
 	ldr	r3, [sp, #12]
 	cmp	r4, r3
-	ldr	r3, .L891+28
-	bcs	.L835
+	ldr	r3, .L903+28
+	bcs	.L847
 	ldrh	r2, [r3]
 	ldrh	r3, [r5]
 	cmp	r3, r2, lsr #1
-	bls	.L809
+	bls	.L821
 	sub	r3, r3, r2, lsr #3
 	strh	r3, [r5]	@ movhi
-	b	.L809
-.L841:
+	b	.L821
+.L853:
 	movs	r4, #0
-	b	.L818
-.L842:
+	b	.L830
+.L854:
 	mov	r4, r1
-	b	.L818
-.L839:
+	b	.L830
+.L851:
 	ldr	r4, [sp, #20]
-	b	.L815
-.L826:
+	b	.L827
+.L838:
 	movs	r3, #0
 	strh	r3, [r7]	@ movhi
-	b	.L824
-.L827:
+	b	.L836
+.L839:
 	add	r10, r10, #-1
 	uxth	r10, r10
 	cmp	r10, #0
-	bne	.L828
-	b	.L824
-.L830:
+	bne	.L840
+	b	.L836
+.L842:
 	ldrh	r1, [r1]
 	ldrb	r2, [r0]	@ zero_extendqisi2
 	ldrh	r3, [r6]
@@ -5120,10 +5341,10 @@ gc_search_src_blk:
 	itt	gt
 	subgt	r3, r3, r1, lsr #3
 	strhgt	r3, [r6]	@ movhi
-	b	.L823
-.L835:
+	b	.L835
+.L847:
 	ldrh	r1, [r3]
-	ldr	r3, .L891+44
+	ldr	r3, .L903+44
 	ldrh	r2, [r5]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	muls	r3, r1, r3
@@ -5132,29 +5353,29 @@ gc_search_src_blk:
 	itt	lt
 	addlt	r2, r2, r1, lsr #3
 	strhlt	r2, [r5]	@ movhi
-	b	.L809
-.L840:
+	b	.L821
+.L852:
 	mov	r4, r5
-	b	.L817
-.L892:
+	b	.L829
+.L904:
 	.align	2
-.L891:
-	.word	.LANCHOR63
-	.word	.LANCHOR87
-	.word	.LANCHOR88
+.L903:
+	.word	.LANCHOR64
 	.word	.LANCHOR89
 	.word	.LANCHOR90
-	.word	.LANCHOR86
-	.word	.LANCHOR9
-	.word	.LANCHOR85
-	.word	.LANCHOR82
 	.word	.LANCHOR91
-	.word	.LANCHOR83
-	.word	.LANCHOR78
-	.word	.LANCHOR77
 	.word	.LANCHOR92
+	.word	.LANCHOR88
+	.word	.LANCHOR9
+	.word	.LANCHOR87
+	.word	.LANCHOR84
 	.word	.LANCHOR93
+	.word	.LANCHOR85
+	.word	.LANCHOR80
+	.word	.LANCHOR79
 	.word	.LANCHOR94
+	.word	.LANCHOR95
+	.word	.LANCHOR96
 	.size	gc_search_src_blk, .-gc_search_src_blk
 	.section	.text.zftl_insert_free_list,"ax",%progbits
 	.align	1
@@ -5168,35 +5389,35 @@ zftl_insert_free_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L897
+	ldr	r3, .L909
 	mov	r1, r0
 	ldr	r3, [r3]
 	add	r3, r3, r0, lsl #2
 	ldrb	r3, [r3, #2]	@ zero_extendqisi2
 	ands	r3, r3, #24
-	bne	.L894
-	ldr	r2, .L897+4
-	ldr	r0, .L897+8
-.L896:
+	bne	.L906
+	ldr	r2, .L909+4
+	ldr	r0, .L909+8
+.L908:
 	b	_insert_free_list
-.L894:
+.L906:
 	cmp	r3, #16
 	ittee	eq
-	ldreq	r2, .L897+12
-	ldreq	r0, .L897+16
-	ldrne	r2, .L897+20
-	ldrne	r0, .L897+24
-	b	.L896
-.L898:
-	.align	2
-.L897:
+	ldreq	r2, .L909+12
+	ldreq	r0, .L909+16
+	ldrne	r2, .L909+20
+	ldrne	r0, .L909+24
+	b	.L908
+.L910:
+	.align	2
+.L909:
 	.word	.LANCHOR7
-	.word	.LANCHOR95
-	.word	.LANCHOR96
 	.word	.LANCHOR97
 	.word	.LANCHOR98
 	.word	.LANCHOR99
 	.word	.LANCHOR100
+	.word	.LANCHOR101
+	.word	.LANCHOR102
 	.size	zftl_insert_free_list, .-zftl_insert_free_list
 	.section	.text.zftl_insert_data_list,"ax",%progbits
 	.align	1
@@ -5210,42 +5431,42 @@ zftl_insert_data_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L904
+	ldr	r3, .L916
 	mov	r1, r0
 	ldr	r3, [r3]
 	add	r3, r3, r0, lsl #2
 	ldrb	r3, [r3, #2]	@ zero_extendqisi2
 	and	r3, r3, #224
 	cmp	r3, #64
-	bne	.L900
-	ldr	r2, .L904+4
-	ldr	r0, .L904+8
-.L903:
+	bne	.L912
+	ldr	r2, .L916+4
+	ldr	r0, .L916+8
+.L915:
 	b	_insert_data_list
-.L900:
+.L912:
 	cmp	r3, #96
-	bne	.L901
-	ldr	r2, .L904+12
-	ldr	r0, .L904+16
-	b	.L903
-.L901:
+	bne	.L913
+	ldr	r2, .L916+12
+	ldr	r0, .L916+16
+	b	.L915
+.L913:
 	cmp	r3, #160
-	bne	.L899
-	ldr	r2, .L904+20
-	ldr	r0, .L904+24
-	b	.L903
-.L899:
+	bne	.L911
+	ldr	r2, .L916+20
+	ldr	r0, .L916+24
+	b	.L915
+.L911:
 	bx	lr
-.L905:
+.L917:
 	.align	2
-.L904:
+.L916:
 	.word	.LANCHOR7
-	.word	.LANCHOR90
-	.word	.LANCHOR12
-	.word	.LANCHOR88
-	.word	.LANCHOR81
 	.word	.LANCHOR92
-	.word	.LANCHOR80
+	.word	.LANCHOR12
+	.word	.LANCHOR90
+	.word	.LANCHOR83
+	.word	.LANCHOR94
+	.word	.LANCHOR82
 	.size	zftl_insert_data_list, .-zftl_insert_data_list
 	.section	.text.zftl_gc_get_free_sblk,"ax",%progbits
 	.align	1
@@ -5260,64 +5481,64 @@ zftl_gc_get_free_sblk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, lr}
 	movw	r6, #65535
-	ldr	r8, .L923+48
+	ldr	r8, .L935+48
 	mov	r5, r0
 	mov	r7, r1
 	ldr	r3, [r8]
 	ldrh	r4, [r3, #588]
 	cmp	r4, r6
-	beq	.L907
-	cbnz	r0, .L907
+	beq	.L919
+	cbnz	r0, .L919
 	mov	r1, r4
-	ldr	r0, .L923
+	ldr	r0, .L935
 	bl	printf
 	ldr	r3, [r8]
 	strh	r6, [r3, #588]	@ movhi
-.L908:
+.L920:
 	mov	r0, r4
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L907:
-	ldr	r3, .L923+4
-	ldr	r6, .L923+8
+.L919:
+	ldr	r3, .L935+4
+	ldr	r6, .L935+8
 	ldrh	r1, [r3]
 	ldrh	r3, [r6]
 	cmp	r1, r3
-	bls	.L909
+	bls	.L921
 	cmp	r5, #0
-	beq	.L915
+	beq	.L927
 	lsrs	r1, r1, #3
-.L910:
-	ldr	r2, .L923+4
-	ldr	r0, .L923+12
 .L922:
+	ldr	r2, .L935+4
+	ldr	r0, .L935+12
+.L934:
 	bl	_list_pop_index_node
 	uxth	r4, r0
 	movw	r3, #65535
 	cmp	r4, r3
-	bne	.L914
+	bne	.L926
 	ldrh	r3, [r6]
 	mov	r2, r7
 	mov	r1, r4
-	ldr	r0, .L923+16
+	ldr	r0, .L935+16
 	str	r3, [sp, #4]
-	ldr	r3, .L923+20
+	ldr	r3, .L935+20
 	ldrh	r3, [r3]
 	str	r3, [sp]
-	ldr	r3, .L923+24
+	ldr	r3, .L935+24
 	ldr	r3, [r3]
 	bl	printf
-.L914:
+.L926:
 	cmp	r5, #0
-	beq	.L908
-	ldr	r3, .L923+28
+	beq	.L920
+	ldr	r3, .L935+28
 	ldr	r3, [r3]
 	lsls	r3, r3, #23
-	bpl	.L908
-	ldr	r3, .L923+32
-	ldr	r1, .L923+36
-	ldr	r0, .L923+40
+	bpl	.L920
+	ldr	r3, .L935+32
+	ldr	r1, .L935+36
+	ldr	r0, .L935+40
 	ldr	r3, [r3]
 	ldr	r1, [r1]
 	ldrh	r1, [r1, r4, lsl #1]
@@ -5334,36 +5555,36 @@ zftl_gc_get_free_sblk:
 	ubfx	r3, r2, #3, #2
 	lsrs	r2, r2, #5
 	bl	printf
-	b	.L908
-.L915:
+	b	.L920
+.L927:
 	mov	r1, r5
-	b	.L910
-.L909:
-	cbnz	r5, .L912
-	lsrs	r1, r3, #2
-.L913:
-	ldr	r2, .L923+8
-	ldr	r0, .L923+44
 	b	.L922
-.L912:
+.L921:
+	cbnz	r5, .L924
+	lsrs	r1, r3, #2
+.L925:
+	ldr	r2, .L935+8
+	ldr	r0, .L935+44
+	b	.L934
+.L924:
 	rsb	r1, r1, r1, lsl #3
 	ubfx	r1, r1, #3, #16
-	b	.L913
-.L924:
+	b	.L925
+.L936:
 	.align	2
-.L923:
-	.word	.LC52
-	.word	.LANCHOR97
+.L935:
+	.word	.LC54
 	.word	.LANCHOR99
+	.word	.LANCHOR101
+	.word	.LANCHOR100
+	.word	.LC55
+	.word	.LANCHOR97
 	.word	.LANCHOR98
-	.word	.LC53
-	.word	.LANCHOR95
-	.word	.LANCHOR96
 	.word	.LANCHOR14
 	.word	.LANCHOR7
 	.word	.LANCHOR9
-	.word	.LC54
-	.word	.LANCHOR100
+	.word	.LC56
+	.word	.LANCHOR102
 	.word	.LANCHOR10
 	.size	zftl_gc_get_free_sblk, .-zftl_gc_get_free_sblk
 	.section	.text.zftl_get_free_sblk,"ax",%progbits
@@ -5380,105 +5601,105 @@ zftl_get_free_sblk:
 	cmp	r1, #5
 	push	{r0, r1, r2, r4, r5, r6, r7, lr}
 	mov	r5, r1
-	bne	.L926
-	ldr	r3, .L947
-	ldr	r2, .L947+4
+	bne	.L938
+	ldr	r3, .L959
+	ldr	r2, .L959+4
 	ldrh	r3, [r3]
 	ldrh	r1, [r2]
 	cmp	r3, r1
-	bcc	.L927
-	ldr	r2, .L947+8
+	bcc	.L939
+	ldr	r2, .L959+8
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bls	.L928
-	cbz	r1, .L928
-.L927:
-	ldr	r2, .L947+4
+	bls	.L940
+	cbz	r1, .L940
+.L939:
+	ldr	r2, .L959+4
 	lsrs	r1, r1, #1
-.L946:
-	ldr	r0, .L947+12
-	b	.L945
-.L928:
-	ldr	r2, .L947
+.L958:
+	ldr	r0, .L959+12
+	b	.L957
+.L940:
+	ldr	r2, .L959
 	movs	r1, #0
-	ldr	r0, .L947+16
-.L945:
+	ldr	r0, .L959+16
+.L957:
 	bl	_list_pop_index_node
 	uxth	r4, r0
 	movw	r3, #65535
 	cmp	r4, r3
-	bne	.L931
-	ldr	r3, .L947+4
+	bne	.L943
+	ldr	r3, .L959+4
 	mov	r2, r5
 	mov	r1, r4
-	ldr	r0, .L947+20
+	ldr	r0, .L959+20
 	ldrh	r3, [r3]
 	str	r3, [sp, #4]
-	ldr	r3, .L947+8
+	ldr	r3, .L959+8
 	ldrh	r3, [r3]
 	str	r3, [sp]
-	ldr	r3, .L947+24
+	ldr	r3, .L959+24
 	ldr	r3, [r3]
 	bl	printf
-	b	.L931
-.L926:
-	ldr	r7, .L947+28
+	b	.L943
+.L938:
+	ldr	r7, .L959+28
 	movw	r6, #65535
 	ldr	r3, [r7]
 	ldrh	r4, [r3, #590]
 	cmp	r4, r6
-	beq	.L930
+	beq	.L942
 	cmp	r1, #1
-	beq	.L930
+	beq	.L942
 	mov	r1, r4
-	ldr	r0, .L947+32
+	ldr	r0, .L959+32
 	bl	printf
 	ldr	r3, [r7]
 	strh	r6, [r3, #590]	@ movhi
-.L931:
+.L943:
 	mov	r0, r4
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, pc}
-.L930:
-	ldr	r3, .L947+8
-	ldr	r2, .L947+4
+.L942:
+	ldr	r3, .L959+8
+	ldr	r2, .L959+4
 	ldrh	r3, [r3]
 	ldrh	r2, [r2]
 	cmp	r3, r2
-	bcc	.L932
-	ldr	r1, .L947
+	bcc	.L944
+	ldr	r1, .L959
 	ldrh	r1, [r1]
 	cmp	r1, r3
-	bls	.L933
-	cbz	r2, .L933
-.L932:
+	bls	.L945
+	cbz	r2, .L945
+.L944:
 	cmp	r5, #1
 	it	eq
 	lsreq	r0, r2, #1
-	ldr	r2, .L947+4
+	ldr	r2, .L959+4
 	mov	r1, r0
-	b	.L946
-.L933:
+	b	.L958
+.L945:
 	cmp	r5, #1
-	ldr	r2, .L947+8
+	ldr	r2, .L959+8
 	it	eq
 	lsreq	r0, r3, #1
 	mov	r1, r0
-	ldr	r0, .L947+24
-	b	.L945
-.L948:
+	ldr	r0, .L959+24
+	b	.L957
+.L960:
 	.align	2
-.L947:
-	.word	.LANCHOR97
+.L959:
 	.word	.LANCHOR99
-	.word	.LANCHOR95
+	.word	.LANCHOR101
+	.word	.LANCHOR97
+	.word	.LANCHOR102
 	.word	.LANCHOR100
+	.word	.LC55
 	.word	.LANCHOR98
-	.word	.LC53
-	.word	.LANCHOR96
 	.word	.LANCHOR10
-	.word	.LC55
+	.word	.LC57
 	.size	zftl_get_free_sblk, .-zftl_get_free_sblk
 	.section	.text.zftl_remove_data_node,"ax",%progbits
 	.align	1
@@ -5492,42 +5713,42 @@ zftl_remove_data_node:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L954
+	ldr	r3, .L966
 	mov	r1, r0
 	ldr	r3, [r3]
 	add	r3, r3, r0, lsl #2
 	ldrb	r3, [r3, #2]	@ zero_extendqisi2
 	and	r3, r3, #224
 	cmp	r3, #64
-	bne	.L950
-	ldr	r2, .L954+4
-	ldr	r0, .L954+8
-.L953:
+	bne	.L962
+	ldr	r2, .L966+4
+	ldr	r0, .L966+8
+.L965:
 	b	_list_remove_node
-.L950:
+.L962:
 	cmp	r3, #96
-	bne	.L951
-	ldr	r2, .L954+12
-	ldr	r0, .L954+16
-	b	.L953
-.L951:
+	bne	.L963
+	ldr	r2, .L966+12
+	ldr	r0, .L966+16
+	b	.L965
+.L963:
 	cmp	r3, #160
-	bne	.L949
-	ldr	r2, .L954+20
-	ldr	r0, .L954+24
-	b	.L953
-.L949:
+	bne	.L961
+	ldr	r2, .L966+20
+	ldr	r0, .L966+24
+	b	.L965
+.L961:
 	bx	lr
-.L955:
+.L967:
 	.align	2
-.L954:
+.L966:
 	.word	.LANCHOR7
-	.word	.LANCHOR90
-	.word	.LANCHOR12
-	.word	.LANCHOR88
-	.word	.LANCHOR81
 	.word	.LANCHOR92
-	.word	.LANCHOR80
+	.word	.LANCHOR12
+	.word	.LANCHOR90
+	.word	.LANCHOR83
+	.word	.LANCHOR94
+	.word	.LANCHOR82
 	.size	zftl_remove_data_node, .-zftl_remove_data_node
 	.section	.text.zftl_remove_free_node,"ax",%progbits
 	.align	1
@@ -5541,35 +5762,35 @@ zftl_remove_free_node:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L960
+	ldr	r3, .L972
 	mov	r1, r0
 	ldr	r3, [r3]
 	add	r3, r3, r0, lsl #2
 	ldrb	r3, [r3, #2]	@ zero_extendqisi2
 	ands	r3, r3, #24
-	bne	.L957
-	ldr	r2, .L960+4
-	ldr	r0, .L960+8
-.L959:
+	bne	.L969
+	ldr	r2, .L972+4
+	ldr	r0, .L972+8
+.L971:
 	b	_list_remove_node
-.L957:
+.L969:
 	cmp	r3, #16
 	ittee	eq
-	ldreq	r2, .L960+12
-	ldreq	r0, .L960+16
-	ldrne	r2, .L960+20
-	ldrne	r0, .L960+24
-	b	.L959
-.L961:
+	ldreq	r2, .L972+12
+	ldreq	r0, .L972+16
+	ldrne	r2, .L972+20
+	ldrne	r0, .L972+24
+	b	.L971
+.L973:
 	.align	2
-.L960:
+.L972:
 	.word	.LANCHOR7
-	.word	.LANCHOR95
-	.word	.LANCHOR96
 	.word	.LANCHOR97
 	.word	.LANCHOR98
 	.word	.LANCHOR99
 	.word	.LANCHOR100
+	.word	.LANCHOR101
+	.word	.LANCHOR102
 	.size	zftl_remove_free_node, .-zftl_remove_free_node
 	.section	.text.zftl_list_update_data_list,"ax",%progbits
 	.align	1
@@ -5583,42 +5804,42 @@ zftl_list_update_data_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L967
+	ldr	r3, .L979
 	mov	r1, r0
 	ldr	r3, [r3]
 	add	r3, r3, r0, lsl #2
 	ldrb	r3, [r3, #2]	@ zero_extendqisi2
 	and	r3, r3, #224
 	cmp	r3, #64
-	bne	.L963
-	ldr	r2, .L967+4
-	ldr	r0, .L967+8
-.L966:
+	bne	.L975
+	ldr	r2, .L979+4
+	ldr	r0, .L979+8
+.L978:
 	b	_list_update_data_list
-.L963:
+.L975:
 	cmp	r3, #96
-	bne	.L964
-	ldr	r2, .L967+12
-	ldr	r0, .L967+16
-	b	.L966
-.L964:
+	bne	.L976
+	ldr	r2, .L979+12
+	ldr	r0, .L979+16
+	b	.L978
+.L976:
 	cmp	r3, #160
-	bne	.L962
-	ldr	r2, .L967+20
-	ldr	r0, .L967+24
-	b	.L966
-.L962:
+	bne	.L974
+	ldr	r2, .L979+20
+	ldr	r0, .L979+24
+	b	.L978
+.L974:
 	bx	lr
-.L968:
+.L980:
 	.align	2
-.L967:
+.L979:
 	.word	.LANCHOR7
-	.word	.LANCHOR90
-	.word	.LANCHOR12
-	.word	.LANCHOR88
-	.word	.LANCHOR81
 	.word	.LANCHOR92
-	.word	.LANCHOR80
+	.word	.LANCHOR12
+	.word	.LANCHOR90
+	.word	.LANCHOR83
+	.word	.LANCHOR94
+	.word	.LANCHOR82
 	.size	zftl_list_update_data_list, .-zftl_list_update_data_list
 	.section	.text.print_list_info,"ax",%progbits
 	.align	1
@@ -5636,18 +5857,18 @@ print_list_info:
 	ldrh	r2, [r1]
 	sub	sp, sp, #36
 	ldr	r1, [r0]
-	ldr	r0, .L973
+	ldr	r0, .L985
 	bl	printf
 	ldr	r4, [r4]
 	cmp	r4, #0
-	beq	.L969
-	ldr	r6, .L973+4
+	beq	.L981
+	ldr	r6, .L985+4
 	movs	r5, #0
-	ldr	r7, .L973+8
-.L972:
+	ldr	r7, .L985+8
+.L984:
 	ldr	r2, [r6]
-	ldr	r0, .L973+12
-	ldr	r3, .L973+16
+	ldr	r0, .L985+12
+	ldr	r3, .L985+16
 	subs	r2, r4, r2
 	asrs	r2, r2, #1
 	ldr	r0, [r0]
@@ -5662,7 +5883,7 @@ print_list_info:
 	ubfx	r0, r0, #0, #11
 	str	r0, [sp, #20]
 	ldr	r1, [r1, r2, lsl #2]
-	ldr	r0, .L973+20
+	ldr	r0, .L985+20
 	ubfx	r1, r1, #11, #8
 	str	r1, [sp, #16]
 	ldrb	r1, [ip, #2]	@ zero_extendqisi2
@@ -5680,30 +5901,30 @@ print_list_info:
 	ldrh	r4, [r4]
 	movw	r3, #65535
 	cmp	r4, r3
-	beq	.L969
+	beq	.L981
 	ldr	r3, [r6]
 	movs	r2, #6
 	adds	r5, r5, #1
 	uxth	r5, r5
 	mla	r4, r2, r4, r3
-	ldr	r3, .L973+24
+	ldr	r3, .L985+24
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	bcs	.L972
-.L969:
+	bcs	.L984
+.L981:
 	add	sp, sp, #36
 	@ sp needed
 	pop	{r4, r5, r6, r7, pc}
-.L974:
+.L986:
 	.align	2
-.L973:
-	.word	.LC56
+.L985:
+	.word	.LC58
 	.word	.LANCHOR4
 	.word	-1431655765
 	.word	.LANCHOR9
 	.word	.LANCHOR7
-	.word	.LC57
-	.word	.LANCHOR101
+	.word	.LC59
+	.word	.LANCHOR103
 	.size	print_list_info, .-print_list_info
 	.section	.text.dump_all_list_info,"ax",%progbits
 	.align	1
@@ -5717,40 +5938,40 @@ dump_all_list_info:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r1, .L976
-	ldr	r0, .L976+4
+	ldr	r1, .L988
+	ldr	r0, .L988+4
 	bl	print_list_info
-	ldr	r1, .L976+8
-	ldr	r0, .L976+12
+	ldr	r1, .L988+8
+	ldr	r0, .L988+12
 	bl	print_list_info
-	ldr	r1, .L976+16
-	ldr	r0, .L976+20
+	ldr	r1, .L988+16
+	ldr	r0, .L988+20
 	bl	print_list_info
-	ldr	r1, .L976+24
-	ldr	r0, .L976+28
+	ldr	r1, .L988+24
+	ldr	r0, .L988+28
 	bl	print_list_info
-	ldr	r1, .L976+32
-	ldr	r0, .L976+36
+	ldr	r1, .L988+32
+	ldr	r0, .L988+36
 	bl	print_list_info
-	ldr	r1, .L976+40
-	ldr	r0, .L976+44
+	ldr	r1, .L988+40
+	ldr	r0, .L988+44
 	pop	{r3, lr}
 	b	print_list_info
-.L977:
+.L989:
 	.align	2
-.L976:
-	.word	.LANCHOR95
-	.word	.LANCHOR96
+.L988:
 	.word	.LANCHOR97
 	.word	.LANCHOR98
 	.word	.LANCHOR99
 	.word	.LANCHOR100
-	.word	.LANCHOR90
-	.word	.LANCHOR12
-	.word	.LANCHOR88
-	.word	.LANCHOR81
+	.word	.LANCHOR101
+	.word	.LANCHOR102
 	.word	.LANCHOR92
-	.word	.LANCHOR80
+	.word	.LANCHOR12
+	.word	.LANCHOR90
+	.word	.LANCHOR83
+	.word	.LANCHOR94
+	.word	.LANCHOR82
 	.size	dump_all_list_info, .-dump_all_list_info
 	.section	.text.ftl_tmp_into_update,"ax",%progbits
 	.align	1
@@ -5764,49 +5985,49 @@ ftl_tmp_into_update:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L983
+	ldr	r3, .L995
 	ldr	r3, [r3]
 	ldr	r2, [r3, #16]
 	cmp	r2, #2048
-	bls	.L979
+	bls	.L991
 	ldr	r1, [r3, #20]
 	add	r1, r1, r2, lsr #11
 	ubfx	r2, r2, #0, #11
 	str	r2, [r3, #16]
 	str	r1, [r3, #20]
-.L979:
+.L991:
 	ldr	r2, [r3, #24]
 	cmp	r2, #2048
-	bls	.L980
+	bls	.L992
 	ldr	r1, [r3, #28]
 	add	r1, r1, r2, lsr #11
 	ubfx	r2, r2, #0, #11
 	str	r2, [r3, #24]
 	str	r1, [r3, #28]
-.L980:
+.L992:
 	ldr	r2, [r3, #32]
 	cmp	r2, #1024
-	bls	.L981
+	bls	.L993
 	ldr	r1, [r3, #36]
 	add	r1, r1, r2, lsr #10
 	ubfx	r2, r2, #0, #10
 	str	r2, [r3, #32]
 	str	r1, [r3, #36]
-.L981:
+.L993:
 	ldr	r2, [r3, #40]
 	cmp	r2, #1024
-	bls	.L978
+	bls	.L990
 	ldr	r1, [r3, #44]
 	add	r1, r1, r2, lsr #10
 	ubfx	r2, r2, #0, #10
 	str	r2, [r3, #40]
 	str	r1, [r3, #44]
-.L978:
+.L990:
 	bx	lr
-.L984:
+.L996:
 	.align	2
-.L983:
-	.word	.LANCHOR102
+.L995:
+	.word	.LANCHOR104
 	.size	ftl_tmp_into_update, .-ftl_tmp_into_update
 	.global	__aeabi_idiv
 	.section	.text.ftl_get_blk_list_in_sblk,"ax",%progbits
@@ -5818,52 +6039,57 @@ ftl_tmp_into_update:
 	.fpu softvfp
 	.type	ftl_get_blk_list_in_sblk, %function
 ftl_get_blk_list_in_sblk:
-	@ args = 0, pretend = 0, frame = 8
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L994
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r3, .L994+4
+	ldr	r3, .L1006
 	mov	r8, r1
 	mov	r5, r4
-	ldrb	fp, [r2]	@ zero_extendqisi2
-	ldr	r2, .L994+8
+	ldr	r2, .L1006+4
 	ldr	r3, [r3]
 	ldrb	r10, [r2]	@ zero_extendqisi2
-	ldr	r2, .L994+12
+	ldr	r2, .L1006+8
 	add	r3, r3, r0, lsl #2
-	uxth	r7, r10
 	ldrb	r3, [r3, #3]	@ zero_extendqisi2
+	uxth	r7, r10
+	ldrb	fp, [r2]	@ zero_extendqisi2
 	smulbb	r0, r0, r7
+	ldr	r2, .L1006+12
+	str	r3, [sp, #4]
 	subs	r7, r7, #1
+	ldr	r3, .L1006+16
 	sxth	r7, r7
 	uxth	r6, r0
-.L986:
-	cmp	r5, fp
-	blt	.L990
-	mov	r3, r4
-	movw	r2, #65535
-.L991:
-	cmp	r3, fp
-	blt	.L992
+	rsb	fp, fp, #24
+	ldrb	r3, [r3]	@ zero_extendqisi2
+.L998:
+	cmp	r5, r3
+	blt	.L1002
+	mov	r2, r4
+	movw	r1, #65535
+.L1003:
+	cmp	r2, r3
+	blt	.L1004
 	mov	r0, r4
-	add	sp, sp, #8
+	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L990:
-	asr	r1, r3, r5
+.L1002:
+	ldr	r1, [sp, #4]
+	asrs	r1, r1, r5
 	lsls	r1, r1, #31
-	bmi	.L987
+	bmi	.L999
 	mov	r1, r10
 	mov	r0, r5
-	str	r2, [sp, #4]
-	str	r3, [sp]
+	str	r2, [sp, #12]
+	str	r3, [sp, #8]
 	bl	__aeabi_idiv
-	ldr	r2, [sp, #4]
+	ldr	r2, [sp, #12]
 	cmp	r10, #1
-	ldr	r3, [sp]
+	ldr	r3, [sp, #8]
 	ldrh	r1, [r2]
-	rsb	r1, r1, #21
+	sub	r1, fp, r1
 	lsl	r0, r0, r1
 	it	hi
 	andhi	r1, r7, r5
@@ -5873,20 +6099,21 @@ ftl_get_blk_list_in_sblk:
 	addhi	r0, r0, r1
 	strh	r0, [r8, r4, lsl #1]	@ movhi
 	adds	r4, r4, #1
-.L987:
+.L999:
 	adds	r5, r5, #1
-	b	.L986
-.L992:
-	strh	r2, [r8, r3, lsl #1]	@ movhi
-	adds	r3, r3, #1
-	b	.L991
-.L995:
+	b	.L998
+.L1004:
+	strh	r1, [r8, r2, lsl #1]	@ movhi
+	adds	r2, r2, #1
+	b	.L1003
+.L1007:
 	.align	2
-.L994:
-	.word	.LANCHOR78
+.L1006:
 	.word	.LANCHOR7
-	.word	.LANCHOR67
-	.word	.LANCHOR66
+	.word	.LANCHOR69
+	.word	.LANCHOR31
+	.word	.LANCHOR68
+	.word	.LANCHOR80
 	.size	ftl_get_blk_list_in_sblk, .-ftl_get_blk_list_in_sblk
 	.section	.text.ftl_erase_phy_blk,"ax",%progbits
 	.align	1
@@ -5900,44 +6127,48 @@ ftl_erase_phy_blk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
-	mov	r6, r1
-	ldr	r3, .L1001
-	ldr	r7, .L1001+4
-	ldrh	r4, [r3]
-	rsb	r3, r4, #21
+	mov	r5, r1
+	ldr	r3, .L1013
+	ldr	r7, .L1013+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	rsb	r4, r3, #24
+	ldr	r3, .L1013+8
+	ldrh	r3, [r3]
+	subs	r3, r4, r3
 	movs	r4, #1
-	asr	r5, r0, r3
+	asr	r6, r0, r3
 	lsls	r4, r4, r3
-	ldr	r3, .L1001+8
+	ldr	r3, .L1013+12
 	subs	r4, r4, #1
-	uxtb	r5, r5
+	uxtb	r6, r6
 	ands	r4, r4, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	sxth	r4, r4
-	cbz	r3, .L997
-	ldr	r3, .L1001+12
+	cbz	r3, .L1009
+	ldr	r3, .L1013+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L997
+	cbnz	r3, .L1009
 	ldrh	r2, [r7]
 	clz	r1, r1
 	lsrs	r1, r1, #5
-	mov	r0, r5
+	mov	r0, r6
 	muls	r2, r4, r2
 	bl	flash_erase_block_en
-.L997:
+.L1009:
 	ldrh	r2, [r7]
-	uxtb	r1, r6
-	mov	r0, r5
+	uxtb	r1, r5
+	mov	r0, r6
 	muls	r2, r4, r2
 	pop	{r3, r4, r5, r6, r7, lr}
 	b	flash_erase_block_en
-.L1002:
+.L1014:
 	.align	2
-.L1001:
-	.word	.LANCHOR66
-	.word	.LANCHOR103
-	.word	.LANCHOR72
-	.word	.LANCHOR73
+.L1013:
+	.word	.LANCHOR31
+	.word	.LANCHOR105
+	.word	.LANCHOR68
+	.word	.LANCHOR74
+	.word	.LANCHOR75
 	.size	ftl_erase_phy_blk, .-ftl_erase_phy_blk
 	.section	.text.ftl_erase_sblk,"ax",%progbits
 	.align	1
@@ -5950,7 +6181,7 @@ ftl_erase_phy_blk:
 ftl_erase_sblk:
 	@ args = 0, pretend = 0, frame = 72
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L1027
+	ldr	r2, .L1039
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r6, r0
 	mov	r7, r1
@@ -5961,27 +6192,27 @@ ftl_erase_sblk:
 	add	r3, r3, r0, lsl #2
 	ldrb	r3, [r3, #3]	@ zero_extendqisi2
 	str	r3, [sp, #4]
-.L1004:
-	ldr	r3, .L1027+4
+.L1016:
+	ldr	r3, .L1039+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r5, r3
-	bge	.L1015
-	ldr	r3, .L1027+8
+	bge	.L1027
+	ldr	r3, .L1039+8
 	movs	r4, #0
 	ldrb	r2, [r3]	@ zero_extendqisi2
-	ldr	r3, .L1027+12
+	ldr	r3, .L1039+12
 	add	ip, r2, #-1
 	ldrh	r0, [r3]
 	mul	r10, r2, r5
 	mov	r3, r4
 	mul	lr, r2, r6
-	b	.L1016
-.L1006:
+	b	.L1028
+.L1018:
 	ldr	r1, [sp, #4]
 	add	fp, r3, r10
 	asr	r1, r1, fp
 	lsls	r1, r1, #31
-	bmi	.L1005
+	bmi	.L1017
 	add	r1, sp, #72
 	add	fp, r1, r4, lsl #2
 	and	r1, r3, ip
@@ -5989,77 +6220,77 @@ ftl_erase_sblk:
 	muls	r1, r0, r1
 	adds	r4, r4, #1
 	str	r1, [fp, #-64]
-.L1005:
+.L1017:
 	adds	r3, r3, #1
-.L1016:
+.L1028:
 	cmp	r3, r2
-	blt	.L1006
+	blt	.L1018
 	cmp	r2, #4
-	bne	.L1007
+	bne	.L1019
 	uxtb	fp, r7
 	mov	r10, #0
-.L1008:
+.L1020:
 	cmp	r10, r4
-	bne	.L1009
-.L1010:
+	bne	.L1021
+.L1022:
 	adds	r5, r5, #1
-	b	.L1004
-.L1009:
+	b	.L1016
+.L1021:
 	add	r3, sp, #8
 	mov	r1, fp
 	ldr	r2, [r3, r10, lsl #2]
 	uxtb	r0, r5
 	add	r10, r10, #1
 	bl	flash_erase_block_en
-	b	.L1008
-.L1007:
+	b	.L1020
+.L1019:
 	cmp	r4, #2
-	bne	.L1011
-	ldr	r3, .L1027+16
+	bne	.L1023
+	ldr	r3, .L1039+16
 	uxtb	r4, r5
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1012
-	ldr	r3, .L1027+20
+	cbz	r3, .L1024
+	ldr	r3, .L1039+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L1012
+	cbnz	r3, .L1024
 	clz	r1, r7
 	ldr	r3, [sp, #12]
 	ldr	r2, [sp, #8]
 	lsrs	r1, r1, #5
 	mov	r0, r4
 	bl	flash_erase_duplane_block
-.L1012:
+.L1024:
 	ldr	r3, [sp, #12]
 	uxtb	r1, r7
 	ldr	r2, [sp, #8]
 	mov	r0, r4
 	bl	flash_erase_duplane_block
-	b	.L1010
-.L1011:
+	b	.L1022
+.L1023:
 	cmp	r4, #1
-	bne	.L1010
-	ldr	r3, .L1027+16
+	bne	.L1022
+	ldr	r3, .L1039+16
 	uxtb	r4, r5
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1014
-	ldr	r3, .L1027+20
+	cbz	r3, .L1026
+	ldr	r3, .L1039+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L1014
+	cbnz	r3, .L1026
 	clz	r1, r7
 	ldr	r2, [sp, #8]
 	lsrs	r1, r1, #5
 	mov	r0, r4
 	bl	flash_erase_block_en
-.L1014:
+.L1026:
 	ldr	r2, [sp, #8]
 	uxtb	r1, r7
 	mov	r0, r4
 	bl	flash_erase_block_en
-	b	.L1010
-.L1015:
-	ldr	r1, .L1027+24
+	b	.L1022
+.L1027:
+	ldr	r1, .L1039+24
 	ldr	r0, [r8]
-	cbnz	r7, .L1017
+	cbnz	r7, .L1029
 	ldrh	r2, [r0, r6, lsl #2]
 	adds	r3, r2, #1
 	ubfx	r3, r3, #0, #11
@@ -6071,14 +6302,14 @@ ftl_erase_sblk:
 	str	r1, [r2, #84]
 	ldrh	r1, [r2, #96]
 	cmp	r1, r3
-	bge	.L1019
+	bge	.L1031
 	strh	r3, [r2, #96]	@ movhi
-.L1019:
+.L1031:
 	movs	r0, #0
 	add	sp, sp, #72
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1017:
+.L1029:
 	ldr	r2, [r0, r6, lsl #2]
 	ubfx	r3, r2, #11, #8
 	adds	r3, r3, #1
@@ -6094,17 +6325,17 @@ ftl_erase_sblk:
 	cmp	r1, r3
 	it	cc
 	strhcc	r3, [r2, #98]	@ movhi
-	b	.L1019
-.L1028:
+	b	.L1031
+.L1040:
 	.align	2
-.L1027:
+.L1039:
 	.word	.LANCHOR7
+	.word	.LANCHOR106
+	.word	.LANCHOR69
+	.word	.LANCHOR105
+	.word	.LANCHOR74
+	.word	.LANCHOR75
 	.word	.LANCHOR104
-	.word	.LANCHOR67
-	.word	.LANCHOR103
-	.word	.LANCHOR72
-	.word	.LANCHOR73
-	.word	.LANCHOR102
 	.size	ftl_erase_sblk, .-ftl_erase_sblk
 	.section	.text.ftl_alloc_sys_blk,"ax",%progbits
 	.align	1
@@ -6118,7 +6349,7 @@ ftl_alloc_sys_blk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
-	ldr	r4, .L1038
+	ldr	r4, .L1050
 	ldr	r2, [r4]
 	ldrh	r1, [r2, #136]
 	cmp	r1, #63
@@ -6126,32 +6357,32 @@ ftl_alloc_sys_blk:
 	movhi	r3, #0
 	strhhi	r3, [r2, #136]	@ movhi
 	ldrh	r3, [r2, #112]
-	cbnz	r3, .L1031
-	movw	r2, #1130
-	ldr	r1, .L1038+4
-	ldr	r0, .L1038+8
+	cbnz	r3, .L1043
+	movw	r2, #1140
+	ldr	r1, .L1050+4
+	ldr	r0, .L1050+8
 	bl	printf
-.L1031:
+.L1043:
 	ldr	r3, [r4]
 	movw	r4, #65535
 	mov	r6, r4
 	movs	r5, #0
-.L1035:
+.L1047:
 	ldrh	r2, [r3, #136]
 	add	r1, r3, r2, lsl #1
 	adds	r1, r1, #158
-.L1032:
+.L1044:
 	cmp	r2, #63
-	ble	.L1034
+	ble	.L1046
 	strh	r5, [r3, #136]	@ movhi
-	b	.L1035
-.L1034:
+	b	.L1047
+.L1046:
 	ldrh	r0, [r1, #2]!
 	cmp	r0, r4
-	bne	.L1037
+	bne	.L1049
 	adds	r2, r2, #1
-	b	.L1032
-.L1037:
+	b	.L1044
+.L1049:
 	add	r1, r2, #80
 	strh	r6, [r3, r1, lsl #1]	@ movhi
 	strh	r2, [r3, #136]	@ movhi
@@ -6159,11 +6390,11 @@ ftl_alloc_sys_blk:
 	subs	r2, r2, #1
 	strh	r2, [r3, #112]	@ movhi
 	pop	{r4, r5, r6, pc}
-.L1039:
+.L1051:
 	.align	2
-.L1038:
-	.word	.LANCHOR102
-	.word	.LANCHOR105
+.L1050:
+	.word	.LANCHOR104
+	.word	.LANCHOR107
 	.word	.LC0
 	.size	ftl_alloc_sys_blk, .-ftl_alloc_sys_blk
 	.section	.text.ftl_free_sys_blk,"ax",%progbits
@@ -6179,7 +6410,7 @@ ftl_free_sys_blk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
 	mov	r5, r0
-	ldr	r4, .L1048
+	ldr	r4, .L1060
 	ldr	r2, [r4]
 	ldrh	r1, [r2, #138]
 	cmp	r1, #63
@@ -6188,28 +6419,28 @@ ftl_free_sys_blk:
 	strhhi	r3, [r2, #138]	@ movhi
 	ldrh	r3, [r2, #112]
 	cmp	r3, #63
-	bls	.L1042
-	movw	r2, #1154
-	ldr	r1, .L1048+4
-	ldr	r0, .L1048+8
+	bls	.L1054
+	movw	r2, #1164
+	ldr	r1, .L1060+4
+	ldr	r0, .L1060+8
 	bl	printf
-.L1042:
+.L1054:
 	ldr	r3, [r4]
 	movs	r0, #0
 	movw	r4, #65535
-.L1046:
+.L1058:
 	ldrh	r2, [r3, #138]
 	add	r1, r3, r2, lsl #1
 	adds	r1, r1, #158
-.L1043:
+.L1055:
 	cmp	r2, #63
-	ble	.L1045
+	ble	.L1057
 	strh	r0, [r3, #138]	@ movhi
-	b	.L1046
-.L1045:
+	b	.L1058
+.L1057:
 	ldrh	r6, [r1, #2]!
 	cmp	r6, r4
-	bne	.L1044
+	bne	.L1056
 	add	r1, r2, #80
 	strh	r5, [r3, r1, lsl #1]	@ movhi
 	strh	r2, [r3, #138]	@ movhi
@@ -6217,14 +6448,14 @@ ftl_free_sys_blk:
 	adds	r2, r2, #1
 	strh	r2, [r3, #112]	@ movhi
 	pop	{r4, r5, r6, pc}
-.L1044:
+.L1056:
 	adds	r2, r2, #1
-	b	.L1043
-.L1049:
+	b	.L1055
+.L1061:
 	.align	2
-.L1048:
-	.word	.LANCHOR102
-	.word	.LANCHOR106
+.L1060:
+	.word	.LANCHOR104
+	.word	.LANCHOR108
 	.word	.LC0
 	.size	ftl_free_sys_blk, .-ftl_free_sys_blk
 	.section	.text.ftl_info_data_recovery,"ax",%progbits
@@ -6242,30 +6473,30 @@ ftl_info_data_recovery:
 	movw	r3, #65535
 	ldrh	r4, [r0]
 	cmp	r4, r3
-	beq	.L1050
-	ldr	r3, .L1059
+	beq	.L1062
+	ldr	r3, .L1071
 	ldr	r5, [r3]
 	add	r6, r5, r4, lsl #2
 	ldrb	r3, [r6, #2]	@ zero_extendqisi2
 	tst	r3, #224
-	bne	.L1050
+	bne	.L1062
 	ldrb	r2, [r0, #4]	@ zero_extendqisi2
 	mov	r0, r4
 	bfi	r3, r2, #5, #3
 	strb	r3, [r6, #2]
 	bl	zftl_remove_free_node
 	ldrb	r3, [r6, #2]	@ zero_extendqisi2
-	ldr	r2, .L1059+4
+	ldr	r2, .L1071+4
 	tst	r3, #8
 	ldr	r0, [r2]
-	beq	.L1054
+	beq	.L1066
 	ldrh	r1, [r0, #116]
 	subs	r1, r1, #1
 	strh	r1, [r0, #116]	@ movhi
-.L1055:
+.L1067:
 	and	r3, r3, #224
 	cmp	r3, #160
-	bne	.L1057
+	bne	.L1069
 	ldr	r3, [r5, r4, lsl #2]
 	ldr	r2, [r2]
 	ubfx	r1, r3, #11, #8
@@ -6276,7 +6507,7 @@ ftl_info_data_recovery:
 	subs	r3, r3, #1
 	strh	r3, [r2, #120]	@ movhi
 	pop	{r4, r5, r6, pc}
-.L1054:
+.L1066:
 	tst	r3, #24
 	itete	eq
 	ldrheq	r1, [r0, #114]
@@ -6286,33 +6517,33 @@ ftl_info_data_recovery:
 	ite	eq
 	strheq	r1, [r0, #114]	@ movhi
 	strhne	r1, [r0, #118]	@ movhi
-	b	.L1055
-.L1057:
+	b	.L1067
+.L1069:
 	ldrh	r1, [r5, r4, lsl #2]
 	cmp	r3, #64
 	add	r0, r1, #1
 	bfi	r1, r0, #0, #11
 	strh	r1, [r5, r4, lsl #2]	@ movhi
-	bne	.L1058
+	bne	.L1070
 	ldr	r2, [r2]
 	ldrh	r3, [r2, #122]
 	subs	r3, r3, #1
 	strh	r3, [r2, #122]	@ movhi
 	pop	{r4, r5, r6, pc}
-.L1058:
+.L1070:
 	cmp	r3, #96
 	itttt	eq
 	ldreq	r2, [r2]
 	ldrheq	r3, [r2, #124]
 	addeq	r3, r3, #-1
 	strheq	r3, [r2, #124]	@ movhi
-.L1050:
+.L1062:
 	pop	{r4, r5, r6, pc}
-.L1060:
+.L1072:
 	.align	2
-.L1059:
+.L1071:
 	.word	.LANCHOR7
-	.word	.LANCHOR102
+	.word	.LANCHOR104
 	.size	ftl_info_data_recovery, .-ftl_info_data_recovery
 	.section	.text.ftl_get_ppa_from_index,"ax",%progbits
 	.align	1
@@ -6327,11 +6558,11 @@ ftl_get_ppa_from_index:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r4, r0
-	ldr	r3, .L1065
+	ldr	r3, .L1077
 	ldr	r5, [r3]
-	ldr	r3, .L1065+4
+	ldr	r3, .L1077+4
 	ldrh	r2, [r3]
-	ldr	r3, .L1065+8
+	ldr	r3, .L1077+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	mul	r1, r3, r2
 	cmp	r0, r1
@@ -6354,25 +6585,25 @@ ftl_get_ppa_from_index:
 	adds	r4, r4, #8
 	ldrh	r4, [r5, r4, lsl #1]
 	cmp	r4, r3
-	bne	.L1064
-	movw	r2, #1593
-	ldr	r1, .L1065+12
-	ldr	r0, .L1065+16
+	bne	.L1076
+	movw	r2, #1686
+	ldr	r1, .L1077+12
+	ldr	r0, .L1077+16
 	bl	printf
-.L1064:
-	ldr	r3, .L1065+20
+.L1076:
+	ldr	r3, .L1077+20
 	ldrh	r0, [r3]
 	mla	r0, r4, r0, r7
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1066:
+.L1078:
 	.align	2
-.L1065:
+.L1077:
 	.word	.LANCHOR10
-	.word	.LANCHOR85
-	.word	.LANCHOR78
-	.word	.LANCHOR107
+	.word	.LANCHOR87
+	.word	.LANCHOR80
+	.word	.LANCHOR109
 	.word	.LC0
-	.word	.LANCHOR103
+	.word	.LANCHOR105
 	.size	ftl_get_ppa_from_index, .-ftl_get_ppa_from_index
 	.section	.text.lpa_hash_get_ppa,"ax",%progbits
 	.align	1
@@ -6386,37 +6617,37 @@ lpa_hash_get_ppa:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L1071
+	ldr	r3, .L1083
 	uxtb	r2, r0
 	push	{r4, r5}
 	ldrh	r3, [r3, r2, lsl #1]
-	ldr	r2, .L1071+4
+	ldr	r2, .L1083+4
 	ldr	r1, [r2]
-	ldr	r2, .L1071+8
+	ldr	r2, .L1083+8
 	ldr	r4, [r2]
 	movw	r2, #65535
-.L1068:
+.L1080:
 	cmp	r3, r2
-	bne	.L1070
+	bne	.L1082
 	mov	r0, #-1
 	pop	{r4, r5}
 	bx	lr
-.L1070:
+.L1082:
 	ldr	r5, [r1, r3, lsl #2]
 	cmp	r0, r5
-	bne	.L1069
+	bne	.L1081
 	mov	r0, r3
 	pop	{r4, r5}
 	b	ftl_get_ppa_from_index
-.L1069:
+.L1081:
 	ldrh	r3, [r4, r3, lsl #1]
-	b	.L1068
-.L1072:
+	b	.L1080
+.L1084:
 	.align	2
-.L1071:
-	.word	.LANCHOR108
-	.word	.LANCHOR109
+.L1083:
 	.word	.LANCHOR110
+	.word	.LANCHOR111
+	.word	.LANCHOR112
 	.size	lpa_hash_get_ppa, .-lpa_hash_get_ppa
 	.section	.text.ftl_get_new_free_page,"ax",%progbits
 	.align	1
@@ -6434,41 +6665,41 @@ ftl_get_new_free_page:
 	movw	r3, #65535
 	mov	r4, r0
 	cmp	r2, r3
-	bne	.L1074
-	movw	r2, #1716
-	ldr	r1, .L1081
-	ldr	r0, .L1081+4
+	bne	.L1086
+	movw	r2, #1809
+	ldr	r1, .L1093
+	ldr	r0, .L1093+4
 	bl	printf
-.L1074:
-	ldr	r3, .L1081+8
+.L1086:
+	ldr	r3, .L1093+8
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1075
-	movw	r2, #1717
-	ldr	r1, .L1081
-	ldr	r0, .L1081+4
+	bne	.L1087
+	movw	r2, #1810
+	ldr	r1, .L1093
+	ldr	r0, .L1093+4
 	bl	printf
-.L1075:
+.L1087:
 	ldrh	r3, [r4, #6]
-	cbnz	r3, .L1076
-	movw	r2, #1718
-	ldr	r1, .L1081
-	ldr	r0, .L1081+4
+	cbnz	r3, .L1088
+	movw	r2, #1811
+	ldr	r1, .L1093
+	ldr	r0, .L1093+4
 	bl	printf
-.L1076:
+.L1088:
 	ldrb	r3, [r4, #5]	@ zero_extendqisi2
 	movw	r2, #65535
 	movs	r1, #0
 	adds	r3, r3, #8
 	ldrh	r0, [r4, r3, lsl #1]
-	ldr	r3, .L1081+12
+	ldr	r3, .L1093+12
 	ldrb	r5, [r3]	@ zero_extendqisi2
-.L1077:
+.L1089:
 	cmp	r0, r2
 	ldrb	r3, [r4, #5]	@ zero_extendqisi2
-	beq	.L1079
-	ldr	r1, .L1081+16
+	beq	.L1091
+	ldr	r1, .L1093+16
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	ldrh	r2, [r4, #2]
@@ -6489,7 +6720,7 @@ ftl_get_new_free_page:
 	adds	r1, r1, #1
 	strh	r1, [r4, #10]	@ movhi
 	pop	{r3, r4, r5, pc}
-.L1079:
+.L1091:
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, r5
@@ -6502,15 +6733,15 @@ ftl_get_new_free_page:
 	ldrb	r3, [r4, #5]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r0, [r4, r3, lsl #1]
-	b	.L1077
-.L1082:
+	b	.L1089
+.L1094:
 	.align	2
-.L1081:
-	.word	.LANCHOR111
+.L1093:
+	.word	.LANCHOR113
 	.word	.LC0
-	.word	.LANCHOR85
-	.word	.LANCHOR78
-	.word	.LANCHOR103
+	.word	.LANCHOR87
+	.word	.LANCHOR80
+	.word	.LANCHOR105
 	.size	ftl_get_new_free_page, .-ftl_get_new_free_page
 	.section	.text.ftl_ext_alloc_new_blk,"ax",%progbits
 	.align	1
@@ -6530,13 +6761,13 @@ ftl_ext_alloc_new_blk:
 	uxth	r3, r3
 	mov	r4, r0
 	cmp	r3, r2
-	bls	.L1084
-	movw	r2, #1749
-	ldr	r1, .L1085
-	ldr	r0, .L1085+4
+	bls	.L1096
+	movw	r2, #1842
+	ldr	r1, .L1097
+	ldr	r0, .L1097+4
 	bl	printf
-.L1084:
-	ldr	r5, .L1085+8
+.L1096:
+	ldr	r5, .L1097+8
 	movs	r1, #0
 	mov	r0, r4
 	bl	ftl_erase_phy_blk
@@ -6548,12 +6779,12 @@ ftl_ext_alloc_new_blk:
 	strh	r4, [r3, #130]	@ movhi
 	strh	r0, [r3, #140]	@ movhi
 	pop	{r3, r4, r5, pc}
-.L1086:
+.L1098:
 	.align	2
-.L1085:
-	.word	.LANCHOR112
+.L1097:
+	.word	.LANCHOR114
 	.word	.LC0
-	.word	.LANCHOR102
+	.word	.LANCHOR104
 	.size	ftl_ext_alloc_new_blk, .-ftl_ext_alloc_new_blk
 	.section	.text.ftl_total_vpn_update,"ax",%progbits
 	.align	1
@@ -6566,48 +6797,48 @@ ftl_ext_alloc_new_blk:
 ftl_total_vpn_update:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L1098
+	ldr	r2, .L1110
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r1, r2
 	ldrh	r3, [r2]
 	cmp	r3, #4
-	bhi	.L1088
-	cbnz	r0, .L1088
+	bhi	.L1100
+	cbnz	r0, .L1100
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1088:
-	ldr	r2, .L1098+4
+.L1100:
+	ldr	r2, .L1110+4
 	movs	r3, #0
 	mov	r0, r3
 	movw	ip, #65535
 	strh	r3, [r1]	@ movhi
 	ldrh	r5, [r2]
-	ldr	r2, .L1098+8
+	ldr	r2, .L1110+8
 	ldr	r6, [r2]
-	ldr	r2, .L1098+12
+	ldr	r2, .L1110+12
 	ldr	r7, [r2]
 	mov	r2, r3
-.L1090:
+.L1102:
 	uxth	r1, r3
 	cmp	r5, r1
-	bhi	.L1093
-	ldr	r3, .L1098+16
+	bhi	.L1105
+	ldr	r3, .L1110+16
 	ldr	r4, [r3]
-	ldr	r3, .L1098+20
+	ldr	r3, .L1110+20
 	str	r2, [r4, #524]
 	ldr	r3, [r3]
 	str	r0, [r4, #528]
 	ldrh	r1, [r3, #120]
-	cbz	r1, .L1087
+	cbz	r1, .L1099
 	bl	__aeabi_uidiv
 	str	r0, [r4, #532]
-.L1087:
+.L1099:
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1093:
+.L1105:
 	ldrh	r1, [r6, r3, lsl #1]
 	cmp	r1, ip
-	beq	.L1091
+	beq	.L1103
 	add	r4, r7, r3, lsl #2
 	ldrb	r4, [r4, #2]	@ zero_extendqisi2
 	and	r4, r4, #224
@@ -6615,18 +6846,18 @@ ftl_total_vpn_update:
 	ite	eq
 	addeq	r0, r0, r1
 	addne	r2, r2, r1
-.L1091:
+.L1103:
 	adds	r3, r3, #1
-	b	.L1090
-.L1099:
+	b	.L1102
+.L1111:
 	.align	2
-.L1098:
-	.word	.LANCHOR113
+.L1110:
+	.word	.LANCHOR115
 	.word	.LANCHOR6
 	.word	.LANCHOR9
 	.word	.LANCHOR7
 	.word	.LANCHOR10
-	.word	.LANCHOR102
+	.word	.LANCHOR104
 	.size	ftl_total_vpn_update, .-ftl_total_vpn_update
 	.section	.text.ftl_debug_info_fill,"ax",%progbits
 	.align	1
@@ -6657,22 +6888,22 @@ ftl_vpn_update:
 	push	{r4, lr}
 	mov	r4, r0
 	bl	zftl_list_update_data_list
-	ldr	r3, .L1104
+	ldr	r3, .L1116
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
-	cbnz	r3, .L1103
-	ldr	r3, .L1104+4
+	cbnz	r3, .L1115
+	ldr	r3, .L1116+4
 	movs	r0, #1
 	str	r0, [r3]
 	pop	{r4, pc}
-.L1103:
+.L1115:
 	movs	r0, #0
 	pop	{r4, pc}
-.L1105:
+.L1117:
 	.align	2
-.L1104:
+.L1116:
 	.word	.LANCHOR9
-	.word	.LANCHOR114
+	.word	.LANCHOR116
 	.size	ftl_vpn_update, .-ftl_vpn_update
 	.section	.text.ftl_vpn_decrement,"ax",%progbits
 	.align	1
@@ -6689,40 +6920,40 @@ ftl_vpn_decrement:
 	movw	r3, #65535
 	cmp	r0, r3
 	mov	r5, r0
-	beq	.L1107
-	ldr	r3, .L1115
+	beq	.L1119
+	ldr	r3, .L1127
 	ldr	r3, [r3]
 	ldrh	r4, [r3, r0, lsl #1]
-	cbnz	r4, .L1108
-	ldr	r3, .L1115+4
+	cbnz	r4, .L1120
+	ldr	r3, .L1127+4
 	mov	r1, r0
 	mov	r2, r4
 	ldr	r3, [r3]
 	add	r3, r3, r0, lsl #2
-	ldr	r0, .L1115+8
+	ldr	r0, .L1127+8
 	ldrb	r3, [r3, #2]	@ zero_extendqisi2
 	lsrs	r3, r3, #5
 	bl	printf
-.L1113:
+.L1125:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L1108:
+.L1120:
 	subs	r4, r4, #1
 	strh	r4, [r3, r0, lsl #1]	@ movhi
-.L1107:
-	ldr	r3, .L1115+12
+.L1119:
+	ldr	r3, .L1127+12
 	ldrh	r0, [r3]
 	mov	r4, r3
 	cmp	r5, r0
-	beq	.L1113
+	beq	.L1125
 	movw	r2, #65535
 	cmp	r0, r2
-	bne	.L1110
+	bne	.L1122
 	strh	r5, [r3]	@ movhi
-	b	.L1113
-.L1110:
+	b	.L1125
+.L1122:
 	bl	ftl_vpn_update
-	ldr	r3, .L1115+16
+	ldr	r3, .L1127+16
 	adds	r0, r0, #0
 	it	ne
 	movne	r0, #1
@@ -6736,18 +6967,18 @@ ftl_vpn_decrement:
 	movhi	r2, #0
 	strh	r2, [r3]	@ movhi
 	ldrh	r2, [r3]
-	ldr	r3, .L1115+20
+	ldr	r3, .L1127+20
 	strh	r1, [r3, r2, lsl #1]	@ movhi
 	pop	{r3, r4, r5, pc}
-.L1116:
+.L1128:
 	.align	2
-.L1115:
+.L1127:
 	.word	.LANCHOR9
 	.word	.LANCHOR7
-	.word	.LC58
-	.word	.LANCHOR64
-	.word	.LANCHOR115
-	.word	.LANCHOR65
+	.word	.LC60
+	.word	.LANCHOR66
+	.word	.LANCHOR117
+	.word	.LANCHOR67
 	.size	ftl_vpn_decrement, .-ftl_vpn_decrement
 	.section	.text.lpa_hash_update_ppa,"ax",%progbits
 	.align	1
@@ -6762,21 +6993,21 @@ lpa_hash_update_ppa:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	uxtb	ip, r0
-	ldr	r4, .L1128
+	ldr	r4, .L1140
 	movw	r6, #65535
 	mov	fp, r6
-	ldr	r5, .L1128+4
+	ldr	r5, .L1140+4
 	ldr	lr, [r4]
-	ldr	r4, .L1128+8
+	ldr	r4, .L1140+8
 	ldrh	r3, [r5, ip, lsl #1]
 	ldr	r4, [r4]
-.L1118:
+.L1130:
 	cmp	r3, fp
-	beq	.L1122
+	beq	.L1134
 	ldr	r7, [lr, r3, lsl #2]
 	add	r8, lr, r3, lsl #2
 	cmp	r0, r7
-	bne	.L1119
+	bne	.L1131
 	cmp	r6, fp
 	mov	r10, #-1
 	ite	eq
@@ -6788,41 +7019,45 @@ lpa_hash_update_ppa:
 	strhne	r7, [r4, r6, lsl #1]	@ movhi
 	movw	r6, #65535
 	strh	r6, [r4, r3, lsl #1]	@ movhi
-.L1122:
+.L1134:
 	ldrh	r3, [r5, ip, lsl #1]
 	str	r0, [lr, r2, lsl #2]
 	strh	r2, [r5, ip, lsl #1]	@ movhi
 	strh	r3, [r4, r2, lsl #1]	@ movhi
 	adds	r3, r1, #1
-	beq	.L1124
-	ldr	r3, .L1128+12
-	ldrh	r0, [r3]
+	beq	.L1136
+	ldr	r3, .L1140+12
+	ldrh	r2, [r3]
+	ldr	r3, .L1140+16
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	rsb	r3, r3, #24
+	subs	r0, r3, r2
 	movs	r3, #1
-	rsb	r2, r0, #21
-	lsls	r3, r3, r2
-	ldr	r2, .L1128+16
-	lsr	r0, r1, r0
+	lsls	r3, r3, r0
+	lsr	r0, r1, r2
+	ldr	r2, .L1140+20
 	subs	r3, r3, #1
-	ldrb	r1, [r2]	@ zero_extendqisi2
 	ands	r0, r0, r3
+	ldrb	r1, [r2]	@ zero_extendqisi2
 	bl	__aeabi_uidiv
 	uxth	r0, r0
 	bl	ftl_vpn_decrement
-.L1124:
+.L1136:
 	mov	r0, #-1
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1119:
+.L1131:
 	mov	r6, r3
 	ldrh	r3, [r4, r3, lsl #1]
-	b	.L1118
-.L1129:
+	b	.L1130
+.L1141:
 	.align	2
-.L1128:
-	.word	.LANCHOR109
-	.word	.LANCHOR108
+.L1140:
+	.word	.LANCHOR111
 	.word	.LANCHOR110
-	.word	.LANCHOR66
-	.word	.LANCHOR67
+	.word	.LANCHOR112
+	.word	.LANCHOR68
+	.word	.LANCHOR31
+	.word	.LANCHOR69
 	.size	lpa_hash_update_ppa, .-lpa_hash_update_ppa
 	.section	.text.ftl_mask_bad_block,"ax",%progbits
 	.align	1
@@ -6835,28 +7070,35 @@ lpa_hash_update_ppa:
 ftl_mask_bad_block:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1137
+	ldr	r3, .L1149
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
-	ubfx	r6, r0, #21, #3
 	ldrb	r4, [r3]	@ zero_extendqisi2
-	ldr	r3, .L1137+4
-	mov	r1, r4
-	smulbb	r2, r6, r4
+	movs	r3, #1
+	rsb	r1, r4, #24
+	lsl	r4, r3, r4
+	lsr	r2, r0, r1
+	subs	r4, r4, #1
+	ands	r4, r4, r2
+	ldr	r2, .L1149+4
+	uxtb	r4, r4
+	ldrb	r5, [r2]	@ zero_extendqisi2
+	smulbb	r2, r4, r5
 	uxtb	r8, r2
-	ldrh	r2, [r3]
-	lsr	r3, r0, r2
-	rsb	r2, r2, #21
-	movs	r0, #1
-	lsls	r0, r0, r2
+	ldr	r2, .L1149+8
+	ldrh	r6, [r2]
+	lsr	r2, r0, r6
+	subs	r0, r1, r6
+	lsl	r0, r3, r0
+	mov	r1, r5
 	subs	r0, r0, #1
-	ands	r0, r0, r3
+	ands	r0, r0, r2
 	uxth	r10, r0
 	bl	__aeabi_uidiv
-	ldr	r3, .L1137+8
-	cmp	r4, #1
+	ldr	r3, .L1149+12
+	cmp	r5, #1
 	it	hi
-	addhi	r2, r4, #-1
-	mov	r5, r0
+	addhi	r2, r5, #-1
+	mov	r6, r0
 	it	hi
 	andhi	r2, r2, r10
 	uxth	r7, r0
@@ -6865,38 +7107,39 @@ ftl_mask_bad_block:
 	addhi	r2, r2, r8
 	uxtbhi	r8, r2
 	lsls	r3, r3, #17
-	bpl	.L1132
+	bpl	.L1144
 	uxth	r3, r0
 	str	r10, [sp]
 	mov	r2, r8
-	ldr	r0, .L1137+12
-	mov	r1, r6
+	ldr	r0, .L1149+16
+	mov	r1, r4
 	bl	printf
-.L1132:
-	ldr	r3, .L1137+16
+.L1144:
+	ldr	r3, .L1149+20
 	ldrh	r3, [r3]
 	cmp	r3, r7
-	bls	.L1130
-	ldr	r3, .L1137+20
-	uxth	r5, r5
+	bls	.L1142
+	ldr	r3, .L1149+24
+	uxth	r6, r6
 	movs	r2, #1
 	lsl	r8, r2, r8
 	ldr	r3, [r3]
-	add	r5, r3, r5, lsl #2
-	ldrb	r2, [r5, #3]	@ zero_extendqisi2
+	add	r6, r3, r6, lsl #2
+	ldrb	r2, [r6, #3]	@ zero_extendqisi2
 	orr	r2, r2, r8
-	strb	r2, [r5, #3]
-.L1130:
+	strb	r2, [r6, #3]
+.L1142:
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L1138:
+.L1150:
 	.align	2
-.L1137:
-	.word	.LANCHOR67
-	.word	.LANCHOR66
+.L1149:
+	.word	.LANCHOR31
+	.word	.LANCHOR69
+	.word	.LANCHOR68
 	.word	.LANCHOR14
-	.word	.LC59
+	.word	.LC61
 	.word	.LANCHOR6
 	.word	.LANCHOR7
 	.size	ftl_mask_bad_block, .-ftl_mask_bad_block
@@ -6913,34 +7156,37 @@ gc_free_bad_sblk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r8, r0
-	ldr	r4, .L1153
-	ldr	r3, [r4, #324]
-	cbz	r3, .L1151
-	ldr	r7, .L1153+4
+	ldr	r4, .L1165
+	ldr	r3, [r4, #580]
+	cbz	r3, .L1163
+	ldr	r7, .L1165+4
 	mov	r10, #0
-.L1141:
-	ldr	r3, .L1153+8
+.L1153:
+	ldr	r3, .L1165+8
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	uxth	r3, r10
 	cmp	r2, r3
-	bhi	.L1148
-.L1151:
+	bhi	.L1160
+.L1163:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1148:
-	ldr	r3, .L1153+12
+.L1160:
+	ldr	r3, .L1165+12
 	uxth	r0, r10
 	ldrb	fp, [r3]	@ zero_extendqisi2
 	mov	r1, fp
 	bl	__aeabi_idiv
-	ldrh	r5, [r7]
+	ldr	r3, .L1165+16
 	uxth	r6, fp
 	cmp	fp, #1
-	ldr	r2, .L1153+16
+	ldr	r2, .L1165+20
 	mov	fp, #0
-	rsb	r5, r5, #21
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	ldrh	r3, [r7]
+	rsb	r5, r5, #24
+	sub	r5, r5, r3
 	lsl	r0, r0, r5
 	smulbb	r5, r8, r6
 	itt	hi
@@ -6951,19 +7197,19 @@ gc_free_bad_sblk:
 	itt	hi
 	addhi	r5, r5, r6
 	uxthhi	r5, r5
-.L1143:
-	ldr	r1, [r4, #324]
+.L1155:
+	ldr	r1, [r4, #580]
 	uxth	r6, fp
 	mov	r3, r6
 	cmp	r1, r6
-	bhi	.L1147
+	bhi	.L1159
 	add	r10, r10, #1
-	b	.L1141
-.L1147:
-	adds	r3, r3, #164
+	b	.L1153
+.L1159:
+	add	r3, r3, #292
 	ldrh	r3, [r4, r3, lsl #1]
 	cmp	r3, r5
-	bne	.L1144
+	bne	.L1156
 	mov	r0, r2
 	mov	r1, r5
 	str	r2, [sp, #4]
@@ -6971,32 +7217,33 @@ gc_free_bad_sblk:
 	ldrh	r0, [r7]
 	lsl	r0, r5, r0
 	bl	ftl_mask_bad_block
-	ldr	r3, [r4, #324]
+	ldr	r3, [r4, #580]
 	ldr	r2, [sp, #4]
-.L1145:
+.L1157:
 	cmp	r6, r3
-	bcc	.L1146
+	bcc	.L1158
 	subs	r3, r3, #1
-	str	r3, [r4, #324]
-.L1144:
+	str	r3, [r4, #580]
+.L1156:
 	add	fp, fp, #1
-	b	.L1143
-.L1146:
-	add	r1, r6, #165
+	b	.L1155
+.L1158:
+	addw	r1, r6, #293
 	ldrh	r0, [r4, r1, lsl #1]
-	add	r1, r6, #164
+	add	r1, r6, #292
 	adds	r6, r6, #1
 	uxth	r6, r6
 	strh	r0, [r4, r1, lsl #1]	@ movhi
-	b	.L1145
-.L1154:
+	b	.L1157
+.L1166:
 	.align	2
-.L1153:
-	.word	.LANCHOR63
-	.word	.LANCHOR66
-	.word	.LANCHOR78
-	.word	.LANCHOR67
-	.word	.LC60
+.L1165:
+	.word	.LANCHOR64
+	.word	.LANCHOR68
+	.word	.LANCHOR80
+	.word	.LANCHOR69
+	.word	.LANCHOR31
+	.word	.LC62
 	.size	gc_free_bad_sblk, .-gc_free_bad_sblk
 	.section	.text.ftl_free_sblk,"ax",%progbits
 	.align	1
@@ -7010,209 +7257,202 @@ ftl_free_sblk:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r6, r0
-	ldr	r3, .L1175
-	ldr	r10, [r3]
+	mov	r5, r0
+	ldr	r3, .L1186
+	ldr	r8, [r3]
 	lsls	r3, r0, #2
-	add	r7, r10, r3
+	add	r7, r8, r3
 	ldrb	r4, [r7, #2]	@ zero_extendqisi2
 	lsls	r2, r4, #28
 	lsr	r3, r4, #5
 	str	r3, [sp, #4]
-	bpl	.L1157
-	ldr	r2, .L1175+4
-	ldrh	r3, [r10, r0, lsl #2]
-	ldr	r5, [r10, r0, lsl #2]
-	ldr	r2, [r2]
-	ubfx	r3, r3, #0, #11
-	str	r3, [sp, #12]
-	ubfx	r5, r5, #11, #8
-	ldrh	fp, [r2, #74]
-	ldrh	r8, [r2, #72]
-	ldr	r2, .L1175+8
-	add	fp, fp, r3
-	uxth	fp, fp
-	add	r8, r8, r5
-	ldrh	r2, [r2]
-	uxth	r8, r8
-	mov	r0, fp
-	mov	r1, r2
+	bpl	.L1169
+	ldr	r3, .L1186+4
+	ldrh	fp, [r8, r0, lsl #2]
+	ldr	r1, .L1186+8
+	ldr	r3, [r3]
+	ldr	r0, [r8, r0, lsl #2]
+	ubfx	fp, fp, #0, #11
+	ldrh	r6, [r1]
+	ldrh	r2, [r3, #74]
+	ldrh	r3, [r3, #72]
+	ubfx	r10, r0, #11, #8
+	mov	r1, r6
+	add	r2, r2, fp
+	uxth	r2, r2
+	add	r3, r3, r10
+	uxth	r3, r3
+	mov	r0, r2
 	str	r2, [sp, #8]
+	str	r3, [sp, #12]
 	bl	__aeabi_uidiv
-	ldr	r1, .L1175+12
-	uxtah	r0, r8, r0
-	ldr	r2, [sp, #8]
 	ldr	r3, [sp, #12]
+	ldr	r1, .L1186+12
+	ldr	r2, [sp, #8]
 	ldrh	r1, [r1]
+	uxtah	r0, r3, r0
 	cmp	r0, r1
-	ble	.L1158
-	ldr	r1, .L1175+16
-	ldr	ip, .L1175+52
-	ldrh	r0, [r1]
-	ldr	r1, .L1175+20
-	ldrh	ip, [ip]
-	adds	r0, r0, #7
+	ble	.L1170
+	ldr	r3, .L1186+16
+	ldr	r1, .L1186+20
+	ldrh	r2, [r3]
+	ldr	r3, .L1186+24
 	ldrh	r1, [r1]
-	add	r1, r1, ip
-	cmp	r0, r1
-	blt	.L1159
-.L1174:
-	movs	r1, #2
-	bfi	r4, r1, #3, #2
-.L1172:
+	adds	r2, r2, #7
+	ldrh	r3, [r3]
+	add	r3, r3, r1
+	cmp	r2, r3
+	blt	.L1171
+.L1176:
+	movs	r3, #2
+	bfi	r4, r3, #3, #2
+	b	.L1184
+.L1171:
+	ldr	r3, .L1186+28
+	ldr	r1, .L1186+32
+	ldrh	r2, [r3]
+	ldr	r3, .L1186+36
+	ldrh	r1, [r1]
+	adds	r2, r2, #7
+	ldrh	r3, [r3]
+	add	r3, r3, r1
+	ldr	r1, .L1186+40
+	ldrh	r1, [r1]
+	add	r3, r3, r1
+	cmp	r2, r3
+	blt	.L1176
+.L1185:
+	bfc	r4, #3, #2
+.L1184:
 	strb	r4, [r7, #2]
-.L1160:
-	ldrb	r1, [r7, #2]	@ zero_extendqisi2
-	ands	r1, r1, #24
-	bne	.L1164
-	muls	r5, r2, r5
-	ldrh	r2, [r10, r6, lsl #2]
-	add	r5, r5, r5, lsl #1
-	add	r3, r3, r5, asr #2
-	ubfx	r3, r3, #2, #9
-	bfi	r2, r3, #0, #11
-	strh	r2, [r10, r6, lsl #2]	@ movhi
-.L1157:
-	mov	r0, r6
+.L1172:
+	ldrb	r3, [r7, #2]	@ zero_extendqisi2
+	ands	r3, r3, #24
+	bne	.L1177
+	mul	r6, r6, r10
+	ldrh	r3, [r8, r5, lsl #2]
+	lsr	r10, r10, #3
+	add	r6, r6, r6, lsl #1
+	add	fp, fp, r6, asr #2
+	bfi	r3, fp, #0, #11
+	strh	r3, [r8, r5, lsl #2]	@ movhi
+	ldr	r3, [r8, r5, lsl #2]
+	bfi	r3, r10, #11, #8
+	str	r3, [r8, r5, lsl #2]
+.L1169:
+	mov	r0, r5
 	bl	zftl_remove_data_node
-	ldr	r3, .L1175
-	lsls	r2, r6, #2
+	ldr	r3, .L1186
+	lsls	r2, r5, #2
 	ldr	r3, [r3]
 	add	r3, r3, r2
 	ldrb	r2, [r3, #2]	@ zero_extendqisi2
 	bfc	r2, #5, #3
 	strb	r2, [r3, #2]
 	movs	r2, #0
-	ldr	r3, .L1175+24
+	ldr	r3, .L1186+44
 	ldr	r3, [r3]
-	strh	r2, [r3, r6, lsl #1]	@ movhi
+	strh	r2, [r3, r5, lsl #1]	@ movhi
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #6
 	and	r3, r3, #7
 	cmp	r3, #4
-	bhi	.L1166
-	mov	r0, r6
+	bhi	.L1179
+	mov	r0, r5
 	bl	gc_free_bad_sblk
-.L1166:
+.L1179:
 	ldrb	r3, [r7, #2]	@ zero_extendqisi2
 	lsls	r3, r3, #28
-	bpl	.L1167
-	ldr	r3, .L1175+28
+	bpl	.L1180
+	ldr	r3, .L1186+48
 	ldr	r3, [r3]
-	ldrh	r2, [r3, #584]
-	cmp	r2, r6
-	bne	.L1168
-	ldrh	r1, [r3, #588]
+	ldrh	r2, [r3, #586]
+	cmp	r2, r5
+	bne	.L1180
+	ldrh	r1, [r3, #590]
 	movw	r2, #65535
-	strh	r2, [r3, #584]	@ movhi
+	strh	r2, [r3, #586]	@ movhi
 	cmp	r1, r2
-	bne	.L1167
-	ldr	r0, .L1175+32
-	mov	r1, r6
-	strh	r6, [r3, #588]	@ movhi
-.L1173:
+	bne	.L1180
+	strh	r5, [r3, #590]	@ movhi
+	mov	r1, r5
+	ldr	r0, .L1186+52
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
 	b	printf
-.L1159:
-	ldr	r1, .L1175+36
-	ldr	ip, .L1175+56
-	ldrh	r0, [r1]
-	ldr	r1, .L1175+40
-	ldrh	ip, [ip]
-	adds	r0, r0, #7
-	ldrh	r1, [r1]
-	add	r1, r1, ip
-	ldr	ip, .L1175+60
-	ldrh	ip, [ip]
-	add	r1, r1, ip
-	cmp	r0, r1
-	blt	.L1174
-.L1163:
-	bfc	r4, #3, #2
-	b	.L1172
-.L1158:
-	ldr	r1, .L1175+44
-	mla	r8, r8, r2, fp
+.L1170:
+	mla	r3, r3, r6, r2
+	ldr	r2, .L1186+56
+	ldrh	r2, [r2]
+	cmp	r3, r2
+	ble	.L1172
+	ldr	r3, .L1186+28
+	ldr	r1, .L1186+32
+	ldrh	r2, [r3]
+	ldr	r3, .L1186+36
 	ldrh	r1, [r1]
-	cmp	r8, r1
-	ble	.L1160
-	ldr	r1, .L1175+36
-	ldr	ip, .L1175+56
-	ldrh	r0, [r1]
-	ldr	r1, .L1175+40
-	ldrh	ip, [ip]
-	adds	r0, r0, #7
+	ldrh	r3, [r3]
+	add	r3, r3, r1
+	ldr	r1, .L1186+40
 	ldrh	r1, [r1]
-	add	r1, r1, ip
-	ldr	ip, .L1175+60
-	ldrh	ip, [ip]
-	add	r1, r1, ip
-	cmp	r0, r1
-	bge	.L1163
-	ldr	r1, .L1175+16
-	ldr	ip, .L1175+52
+	add	r3, r3, r1
+	adds	r1, r2, #7
+	cmp	r1, r3
+	bge	.L1185
+	ldr	r1, .L1186+16
+	ldr	ip, .L1186+20
 	ldrh	r0, [r1]
-	ldr	r1, .L1175+20
+	ldr	r1, .L1186+24
 	ldrh	ip, [ip]
 	adds	r0, r0, #7
 	ldrh	r1, [r1]
 	add	r1, r1, ip
 	cmp	r0, r1
-	blt	.L1163
-	b	.L1174
-.L1164:
-	cmp	r1, #16
-	bne	.L1157
-	mov	r0, r3
-	mov	r1, r2
+	bge	.L1176
+	adds	r2, r2, #23
+	cmp	r3, r2
+	bgt	.L1176
+	b	.L1185
+.L1177:
+	cmp	r3, #16
+	bne	.L1169
+	mov	r0, fp
+	mov	r1, r6
 	bl	__aeabi_idiv
 	add	r0, r0, r0, lsl #1
-	ldr	r3, [r10, r6, lsl #2]
-	add	r5, r5, r0, asr #2
-	ubfx	r5, r5, #2, #6
-	bfi	r3, r5, #11, #8
-	str	r3, [r10, r6, lsl #2]
-	b	.L1157
-.L1168:
-	ldrh	r2, [r3, #586]
-	cmp	r2, r6
-	bne	.L1167
-	ldrh	r1, [r3, #590]
-	movw	r2, #65535
-	strh	r2, [r3, #586]	@ movhi
-	cmp	r1, r2
-	bne	.L1167
-	strh	r6, [r3, #590]	@ movhi
-	mov	r1, r6
-	ldr	r0, .L1175+48
-	b	.L1173
-.L1167:
-	mov	r0, r6
+	ldr	r3, [r8, r5, lsl #2]
+	asr	fp, fp, #5
+	add	r10, r10, r0, asr #2
+	bfi	r3, r10, #11, #8
+	str	r3, [r8, r5, lsl #2]
+	bfi	r3, fp, #0, #11
+	strh	r3, [r8, r5, lsl #2]	@ movhi
+	b	.L1169
+.L1180:
+	mov	r0, r5
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
 	b	zftl_insert_free_list
-.L1176:
+.L1187:
 	.align	2
-.L1175:
+.L1186:
 	.word	.LANCHOR7
-	.word	.LANCHOR102
+	.word	.LANCHOR104
 	.word	.LANCHOR8
-	.word	.LANCHOR116
-	.word	.LANCHOR93
+	.word	.LANCHOR118
+	.word	.LANCHOR95
+	.word	.LANCHOR99
+	.word	.LANCHOR94
+	.word	.LANCHOR119
+	.word	.LANCHOR97
 	.word	.LANCHOR92
+	.word	.LANCHOR90
 	.word	.LANCHOR9
 	.word	.LANCHOR10
-	.word	.LC61
-	.word	.LANCHOR117
-	.word	.LANCHOR90
-	.word	.LANCHOR118
-	.word	.LC62
-	.word	.LANCHOR97
-	.word	.LANCHOR95
-	.word	.LANCHOR88
+	.word	.LC63
+	.word	.LANCHOR120
 	.size	ftl_free_sblk, .-ftl_free_sblk
 	.section	.text.gc_free_src_blk,"ax",%progbits
 	.align	1
@@ -7227,128 +7467,128 @@ gc_free_src_blk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r5, #0
-	ldr	r6, .L1214
-.L1178:
+	ldr	r6, .L1225
+.L1189:
 	uxth	r2, r5
-	ldr	r3, .L1214+4
+	ldr	r3, .L1225+4
 	ldrh	r1, [r3, #52]
 	cmp	r1, r2
-	bhi	.L1192
+	bhi	.L1203
 	movs	r2, #0
 	strh	r2, [r3, #52]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1192:
+.L1203:
 	uxth	r2, r5
 	add	r3, r3, r2, lsl #1
 	ldrh	r4, [r3, #54]
 	ldr	r3, [r6]
 	ldrh	r2, [r3, r4, lsl #1]
-	cbz	r2, .L1179
+	cbz	r2, .L1190
 	mov	r1, r4
-	ldr	r0, .L1214+8
+	ldr	r0, .L1225+8
 	bl	printf
-.L1179:
+.L1190:
 	ldr	r3, [r6]
 	movs	r2, #0
 	strh	r2, [r3, r4, lsl #1]	@ movhi
-	ldr	r3, .L1214+12
+	ldr	r3, .L1225+12
 	ldr	r7, [r3]
-	ldr	r3, .L1214+16
+	ldr	r3, .L1225+16
 	ldr	r3, [r3]
 	add	r7, r7, r4, lsl #2
 	lsls	r3, r3, #23
-	bpl	.L1180
+	bpl	.L1191
 	ldrb	r2, [r7, #2]	@ zero_extendqisi2
 	mov	r1, r4
-	ldr	r0, .L1214+20
+	ldr	r0, .L1225+20
 	lsrs	r2, r2, #5
 	bl	printf
-.L1180:
+.L1191:
 	ldrb	r3, [r7, #2]	@ zero_extendqisi2
 	and	r2, r3, #224
 	cmp	r2, #224
-	beq	.L1181
+	beq	.L1192
 	tst	r3, #192
-	bne	.L1182
-.L1181:
-	movw	r2, #931
-	ldr	r1, .L1214+24
-	ldr	r0, .L1214+28
+	bne	.L1193
+.L1192:
+	movw	r2, #1114
+	ldr	r1, .L1225+24
+	ldr	r0, .L1225+28
 	bl	printf
-.L1182:
+.L1193:
 	mov	r0, r4
 	bl	ftl_free_sblk
-	ldr	r3, .L1214+32
+	ldr	r3, .L1225+32
 	ldr	r3, [r3]
 	ldrh	r1, [r3, #124]
-	cbz	r1, .L1183
+	cbz	r1, .L1194
 	add	r0, r3, #392
 	movs	r2, #0
-.L1185:
+.L1196:
 	ldrh	r7, [r0], #2
 	cmp	r4, r7
-	bne	.L1184
+	bne	.L1195
 	adds	r2, r2, #196
 	movw	r0, #65535
 	subs	r1, r1, #1
 	strh	r0, [r3, r2, lsl #1]	@ movhi
 	strh	r1, [r3, #124]	@ movhi
-.L1183:
+.L1194:
 	ldrh	r1, [r3, #120]
-	cbz	r1, .L1186
+	cbz	r1, .L1197
 	add	r0, r3, #136
 	movs	r2, #0
-.L1188:
+.L1199:
 	ldrh	r7, [r0], #2
 	cmp	r4, r7
-	bne	.L1187
+	bne	.L1198
 	adds	r2, r2, #68
 	movw	r0, #65535
 	subs	r1, r1, #1
 	strh	r0, [r3, r2, lsl #1]	@ movhi
 	strh	r1, [r3, #120]	@ movhi
-.L1186:
+.L1197:
 	ldrh	r1, [r3, #122]
-	cbz	r1, .L1189
+	cbz	r1, .L1200
 	add	r0, r3, #264
 	movs	r2, #0
-.L1191:
+.L1202:
 	ldrh	r7, [r0], #2
 	cmp	r4, r7
-	bne	.L1190
+	bne	.L1201
 	adds	r2, r2, #132
 	movw	r0, #65535
 	subs	r1, r1, #1
 	strh	r0, [r3, r2, lsl #1]	@ movhi
 	strh	r1, [r3, #122]	@ movhi
-.L1189:
+.L1200:
 	adds	r5, r5, #1
-	b	.L1178
-.L1184:
+	b	.L1189
+.L1195:
 	adds	r2, r2, #1
 	cmp	r2, #64
-	bne	.L1185
-	b	.L1183
-.L1187:
+	bne	.L1196
+	b	.L1194
+.L1198:
 	adds	r2, r2, #1
 	cmp	r2, #64
-	bne	.L1188
-	b	.L1186
-.L1190:
+	bne	.L1199
+	b	.L1197
+.L1201:
 	adds	r2, r2, #1
 	cmp	r2, #64
-	bne	.L1191
-	b	.L1189
-.L1215:
+	bne	.L1202
+	b	.L1200
+.L1226:
 	.align	2
-.L1214:
+.L1225:
 	.word	.LANCHOR9
-	.word	.LANCHOR63
-	.word	.LC63
+	.word	.LANCHOR64
+	.word	.LC64
 	.word	.LANCHOR7
 	.word	.LANCHOR14
-	.word	.LC64
-	.word	.LANCHOR119
+	.word	.LC65
+	.word	.LANCHOR121
 	.word	.LC0
 	.word	.LANCHOR10
 	.size	gc_free_src_blk, .-gc_free_src_blk
@@ -7365,13 +7605,13 @@ print_ftl_debug_info:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
 	sub	sp, sp, #32
-	ldr	r4, .L1217
-	ldr	r5, .L1217+4
-	ldr	r6, .L1217+8
+	ldr	r4, .L1228
+	ldr	r5, .L1228+4
+	ldr	r6, .L1228+8
 	ldr	r1, [r4]
 	ldr	r0, [r5]
 	ldr	r6, [r6]
-	ldr	r3, .L1217+12
+	ldr	r3, .L1228+12
 	ldrh	r2, [r1, #146]
 	ldrh	r1, [r1, #148]
 	ldrh	r3, [r3]
@@ -7380,26 +7620,26 @@ print_ftl_debug_info:
 	str	r6, [sp, #24]
 	ldr	r0, [r0, #524]
 	str	r0, [sp, #20]
-	ldr	r0, .L1217+16
+	ldr	r0, .L1228+16
 	ldrh	r0, [r0]
 	str	r0, [sp, #16]
-	ldr	r0, .L1217+20
+	ldr	r0, .L1228+20
 	ldrh	r0, [r0]
 	str	r0, [sp, #12]
-	ldr	r0, .L1217+24
+	ldr	r0, .L1228+24
 	ldrh	r0, [r0]
 	str	r0, [sp, #8]
-	ldr	r0, .L1217+28
+	ldr	r0, .L1228+28
 	ldrh	r0, [r0]
 	str	r0, [sp, #4]
-	ldr	r0, .L1217+32
+	ldr	r0, .L1228+32
 	ldrh	r0, [r0]
 	str	r0, [sp]
-	ldr	r0, .L1217+36
+	ldr	r0, .L1228+36
 	bl	printf
 	ldr	r1, [r4]
-	ldr	r3, .L1217+40
-	ldr	r0, .L1217+44
+	ldr	r3, .L1228+40
+	ldr	r0, .L1228+44
 	ldr	r2, [r1, #64]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r2, [sp, #4]
@@ -7409,7 +7649,7 @@ print_ftl_debug_info:
 	ldr	r1, [r1, #20]
 	bl	printf
 	ldr	r1, [r4]
-	ldr	r0, .L1217+48
+	ldr	r0, .L1228+48
 	ldr	r3, [r1, #16]
 	ldr	r2, [r1, #60]
 	ldr	r1, [r1, #52]
@@ -7432,58 +7672,63 @@ print_ftl_debug_info:
 	str	r0, [sp, #4]
 	ldrh	r0, [r2, #92]
 	str	r0, [sp]
-	ldr	r0, .L1217+52
+	ldr	r0, .L1228+52
 	ldr	r2, [r2, #84]
 	bl	printf
-	ldr	r0, .L1217+56
-	ldr	r3, .L1217+60
-	ldr	r2, .L1217+64
+	ldr	r0, .L1228+56
+	ldr	r3, .L1228+60
+	ldr	r2, .L1228+64
 	ldrh	r0, [r0]
-	ldr	r1, .L1217+68
+	ldr	r1, .L1228+68
 	ldrh	r3, [r3]
 	ldrh	r2, [r2]
 	ldrh	r1, [r1]
 	str	r0, [sp, #4]
-	ldr	r0, .L1217+72
+	ldr	r0, .L1228+72
 	ldrh	r0, [r0]
 	str	r0, [sp]
-	ldr	r0, .L1217+76
+	ldr	r0, .L1228+76
 	bl	printf
+	ldr	r4, [r4]
 	ldr	r0, [r5]
+	ldrh	r5, [r4, #150]
 	ldrh	r3, [r0, #588]
 	ldrh	r2, [r0, #586]
 	ldrh	r1, [r0, #584]
+	str	r5, [sp, #8]
+	ldr	r4, [r4, #156]
+	str	r4, [sp, #4]
 	ldrh	r0, [r0, #590]
 	str	r0, [sp]
-	ldr	r0, .L1217+80
+	ldr	r0, .L1228+80
 	bl	printf
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, pc}
-.L1218:
+.L1229:
 	.align	2
-.L1217:
-	.word	.LANCHOR102
+.L1228:
+	.word	.LANCHOR104
 	.word	.LANCHOR10
-	.word	.LANCHOR120
-	.word	.LANCHOR95
-	.word	.LANCHOR92
-	.word	.LANCHOR88
+	.word	.LANCHOR122
+	.word	.LANCHOR97
+	.word	.LANCHOR94
 	.word	.LANCHOR90
+	.word	.LANCHOR92
+	.word	.LANCHOR101
 	.word	.LANCHOR99
-	.word	.LANCHOR97
-	.word	.LC65
-	.word	.LANCHOR121
 	.word	.LC66
+	.word	.LANCHOR123
 	.word	.LC67
 	.word	.LC68
-	.word	.LANCHOR79
-	.word	.LANCHOR62
-	.word	.LANCHOR94
-	.word	.LANCHOR91
-	.word	.LANCHOR84
 	.word	.LC69
+	.word	.LANCHOR81
+	.word	.LANCHOR63
+	.word	.LANCHOR96
+	.word	.LANCHOR93
+	.word	.LANCHOR86
 	.word	.LC70
+	.word	.LC71
 	.size	print_ftl_debug_info, .-print_ftl_debug_info
 	.section	.text.ftl_write_buf,"ax",%progbits
 	.align	1
@@ -7498,19 +7743,19 @@ ftl_write_buf:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
 	mov	r4, r0
-	cbnz	r0, .L1220
-	mov	r2, #668
-	ldr	r1, .L1229
-	ldr	r0, .L1229+4
+	cbnz	r0, .L1231
+	mov	r2, #676
+	ldr	r1, .L1240
+	ldr	r0, .L1240+4
 	bl	printf
 	bl	print_ftl_debug_info
 	mov	r0, #-1
 	pop	{r4, r5, r6, pc}
-.L1223:
+.L1234:
 	mov	r1, r4
-	ldr	r0, .L1229+8
+	ldr	r0, .L1240+8
 	bl	buf_add_tail
-	ldr	r3, .L1229+12
+	ldr	r3, .L1240+12
 	ldrb	r1, [r4, #40]	@ zero_extendqisi2
 	ldrb	r0, [r6]	@ zero_extendqisi2
 	ldr	r3, [r3]
@@ -7524,37 +7769,37 @@ ftl_write_buf:
 	adds	r2, r2, #1
 	str	r2, [r3, #32]
 	pop	{r4, r5, r6, pc}
-.L1220:
-	ldr	r5, .L1229+16
+.L1231:
+	ldr	r5, .L1240+16
 	ldrb	r1, [r0, #40]	@ zero_extendqisi2
 	ldrb	r2, [r5]	@ zero_extendqisi2
 	cmp	r1, r2
-	bls	.L1225
-	movw	r2, #673
-	ldr	r1, .L1229
-	ldr	r0, .L1229+4
+	bls	.L1236
+	movw	r2, #681
+	ldr	r1, .L1240
+	ldr	r0, .L1240+4
 	bl	printf
-.L1225:
+.L1236:
 	ldrb	r3, [r4, #40]	@ zero_extendqisi2
-	ldr	r6, .L1229+20
-	cbz	r3, .L1222
+	ldr	r6, .L1240+20
+	cbz	r3, .L1233
 	ldrb	r2, [r5]	@ zero_extendqisi2
 	cmp	r2, r3
-	bcs	.L1223
-.L1222:
+	bcs	.L1234
+.L1233:
 	mov	r0, r4
-	bl	buf_free
+	bl	zbuf_free
 	ldrb	r0, [r6]	@ zero_extendqisi2
 	pop	{r4, r5, r6, pc}
-.L1230:
+.L1241:
 	.align	2
-.L1229:
-	.word	.LANCHOR122
+.L1240:
+	.word	.LANCHOR124
 	.word	.LC0
-	.word	.LANCHOR57
-	.word	.LANCHOR102
-	.word	.LANCHOR123
-	.word	.LANCHOR58
+	.word	.LANCHOR59
+	.word	.LANCHOR104
+	.word	.LANCHOR125
+	.word	.LANCHOR60
 	.size	ftl_write_buf, .-ftl_write_buf
 	.section	.text.ftl_write_completed,"ax",%progbits
 	.align	1
@@ -7569,14 +7814,14 @@ ftl_write_completed:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
 	mov	r8, #0
-	ldr	r7, .L1241
-.L1232:
-	ldr	r2, .L1241+4
+	ldr	r7, .L1252
+.L1243:
+	ldr	r2, .L1252+4
 	ldrb	r5, [r2]	@ zero_extendqisi2
 	cmp	r5, #255
-	bne	.L1240
+	bne	.L1251
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L1240:
+.L1251:
 	movs	r3, #48
 	add	r6, r5, r5, lsl #1
 	muls	r3, r5, r3
@@ -7586,24 +7831,27 @@ ftl_write_completed:
 	strb	r3, [r2]
 	ldr	r3, [r4, #36]
 	adds	r3, r3, #1
-	bne	.L1233
-	ldr	r3, .L1241+8
-	movs	r2, #1
+	bne	.L1244
+	ldr	r2, .L1252+8
+	ldr	r3, .L1252+12
 	ldr	r10, [r4, #24]
-	ldr	r8, .L1241+24
-	ldrh	r0, [r3]
-	rsb	r3, r0, #21
-	lsls	r2, r2, r3
-	ldr	r3, .L1241+12
-	lsr	r0, r10, r0
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	ldr	r8, .L1252+28
+	rsb	r2, r2, #24
+	subs	r0, r2, r3
+	movs	r2, #1
+	lsls	r2, r2, r0
+	lsr	r0, r10, r3
+	ldr	r3, .L1252+16
 	subs	r2, r2, #1
-	ldrb	r1, [r3]	@ zero_extendqisi2
 	ands	r0, r0, r2
+	ldrb	r1, [r3]	@ zero_extendqisi2
 	bl	__aeabi_uidiv
 	ldr	r2, [r8]
 	movw	r1, #65535
 	uxth	r4, r0
-	ldr	r0, .L1241+16
+	ldr	r0, .L1252+20
 	ldr	r3, [r2, #560]
 	cmp	r3, r1
 	mov	r3, #48
@@ -7621,55 +7869,56 @@ ftl_write_completed:
 	str	r2, [r3, #556]
 	ldrh	r2, [r3, #16]
 	cmp	r2, r4
-	bne	.L1235
+	bne	.L1246
 	movs	r2, #0
 	strh	r2, [r3, #22]	@ movhi
-.L1236:
+.L1247:
 	mov	r0, r6
 	mov	r8, #1
 	bl	ftl_write_buf
-	b	.L1232
-.L1235:
+	b	.L1243
+.L1246:
 	ldrh	r2, [r3, #48]
 	cmp	r2, r4
 	itt	eq
 	moveq	r2, #0
 	strheq	r2, [r3, #54]	@ movhi
-	b	.L1236
-.L1233:
+	b	.L1247
+.L1244:
 	cmp	r8, #0
-	beq	.L1238
+	beq	.L1249
 	ldr	r2, [r4, #24]
 	ldr	r1, [r4, #20]
-	ldr	r0, .L1241+20
+	ldr	r0, .L1252+24
 	bl	printf
 	mov	r0, r6
 	bl	ftl_write_buf
-	b	.L1232
-.L1238:
+	b	.L1243
+.L1249:
 	ldrh	r2, [r4, #32]
 	ldr	r1, [r4, #28]
 	ldr	r0, [r4, #20]
 	bl	lpa_hash_update_ppa
 	ldrb	r3, [r4, #2]	@ zero_extendqisi2
 	lsls	r2, r3, #29
-	bpl	.L1239
+	bpl	.L1250
 	bic	r3, r3, #2
 	strb	r3, [r4, #2]
-	b	.L1232
-.L1239:
+	b	.L1243
+.L1250:
 	mov	r0, r6
-	bl	buf_free
-	b	.L1232
-.L1242:
+	bl	zbuf_free
+	b	.L1243
+.L1253:
 	.align	2
-.L1241:
-	.word	.LANCHOR50
-	.word	.LANCHOR124
-	.word	.LANCHOR66
-	.word	.LANCHOR67
-	.word	.LC71
+.L1252:
+	.word	.LANCHOR52
+	.word	.LANCHOR126
+	.word	.LANCHOR31
+	.word	.LANCHOR68
+	.word	.LANCHOR69
 	.word	.LC72
+	.word	.LC73
 	.word	.LANCHOR10
 	.size	ftl_write_completed, .-ftl_write_completed
 	.section	.text.zftl_add_read_buf,"ax",%progbits
@@ -7685,40 +7934,40 @@ zftl_add_read_buf:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
 	mov	r4, r0
-	cbnz	r0, .L1244
-	mov	r2, #964
-	ldr	r1, .L1248
-	ldr	r0, .L1248+4
+	cbnz	r0, .L1255
+	mov	r2, #972
+	ldr	r1, .L1259
+	ldr	r0, .L1259+4
 	bl	printf
 	pop	{r4, lr}
 	b	print_ftl_debug_info
-.L1244:
-	ldr	r3, .L1248+8
+.L1255:
+	ldr	r3, .L1259+8
 	ldrb	r2, [r0, #40]	@ zero_extendqisi2
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r2, r3
-	bls	.L1246
-	movw	r2, #969
-	ldr	r1, .L1248
-	ldr	r0, .L1248+4
+	bls	.L1257
+	movw	r2, #977
+	ldr	r1, .L1259
+	ldr	r0, .L1259+4
 	bl	printf
-.L1246:
+.L1257:
 	mov	r1, r4
-	ldr	r0, .L1248+12
+	ldr	r0, .L1259+12
 	bl	buf_add_tail
-	ldr	r2, .L1248+16
+	ldr	r2, .L1259+16
 	ldrb	r3, [r2]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	strb	r3, [r2]
 	pop	{r4, pc}
-.L1249:
+.L1260:
 	.align	2
-.L1248:
-	.word	.LANCHOR125
-	.word	.LC0
-	.word	.LANCHOR123
-	.word	.LANCHOR126
+.L1259:
 	.word	.LANCHOR127
+	.word	.LC0
+	.word	.LANCHOR125
+	.word	.LANCHOR128
+	.word	.LANCHOR129
 	.size	zftl_add_read_buf, .-zftl_add_read_buf
 	.section	.text.ftl_alloc_sblk,"ax",%progbits
 	.align	1
@@ -7744,18 +7993,18 @@ ftl_alloc_sblk:
 	movw	r3, #65535
 	mov	r4, r0
 	cmp	r0, r3
-	beq	.L1252
-	ldr	r3, .L1259
+	beq	.L1263
+	ldr	r3, .L1270
 	ldr	r6, [r3]
 	add	r6, r6, r0, lsl #2
 	ldrb	r3, [r6, #2]	@ zero_extendqisi2
 	tst	r3, #224
-	beq	.L1253
-	movw	r2, #833
-	ldr	r1, .L1259+4
-	ldr	r0, .L1259+8
+	beq	.L1264
+	mov	r2, #836
+	ldr	r1, .L1270+4
+	ldr	r0, .L1270+8
 	bl	printf
-.L1253:
+.L1264:
 	ldrb	r3, [r6, #2]	@ zero_extendqisi2
 	bfi	r3, r5, #5, #3
 	uxtb	r3, r3
@@ -7763,14 +8012,14 @@ ftl_alloc_sblk:
 	orrs	r7, r7, r2
 	bfi	r3, r7, #3, #2
 	strb	r3, [r6, #2]
-.L1254:
+.L1265:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1252:
+.L1263:
 	bl	print_ftl_debug_info
 	mov	r2, r5
 	mov	r1, r4
-	ldr	r0, .L1259+12
+	ldr	r0, .L1270+12
 	bl	printf
 	mov	r1, r6
 	movs	r0, #0
@@ -7778,21 +8027,21 @@ ftl_alloc_sblk:
 	mov	r2, r5
 	mov	r1, r0
 	mov	r4, r0
-	ldr	r0, .L1259+12
+	ldr	r0, .L1270+12
 	bl	printf
 	bl	dump_all_list_info
-	movw	r2, #843
-	ldr	r1, .L1259+4
-	ldr	r0, .L1259+8
+	movw	r2, #846
+	ldr	r1, .L1270+4
+	ldr	r0, .L1270+8
 	bl	printf
-	b	.L1254
-.L1260:
+	b	.L1265
+.L1271:
 	.align	2
-.L1259:
+.L1270:
 	.word	.LANCHOR7
-	.word	.LANCHOR128
+	.word	.LANCHOR130
 	.word	.LC0
-	.word	.LC73
+	.word	.LC74
 	.size	ftl_alloc_sblk, .-ftl_alloc_sblk
 	.section	.text.sblk_init,"ax",%progbits
 	.align	1
@@ -7806,24 +8055,24 @@ sblk_init:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L1262
+	ldr	r2, .L1273
 	movs	r3, #255
 	movs	r0, #0
 	strb	r3, [r2]
-	ldr	r2, .L1262+4
+	ldr	r2, .L1273+4
 	strb	r3, [r2]
-	ldr	r2, .L1262+8
+	ldr	r2, .L1273+8
 	strb	r3, [r2]
-	ldr	r2, .L1262+12
+	ldr	r2, .L1273+12
 	strb	r3, [r2]
 	bx	lr
-.L1263:
+.L1274:
 	.align	2
-.L1262:
-	.word	.LANCHOR54
-	.word	.LANCHOR124
-	.word	.LANCHOR129
-	.word	.LANCHOR69
+.L1273:
+	.word	.LANCHOR56
+	.word	.LANCHOR126
+	.word	.LANCHOR131
+	.word	.LANCHOR71
 	.size	sblk_init, .-sblk_init
 	.section	.text.dump_sblk_queue,"ax",%progbits
 	.align	1
@@ -7837,18 +8086,18 @@ dump_sblk_queue:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
-	ldr	r4, .L1273
-	ldr	r0, .L1273+4
+	ldr	r4, .L1284
+	ldr	r0, .L1284+4
 	ldrb	r1, [r4]	@ zero_extendqisi2
 	bl	printf
 	ldrb	r4, [r4]	@ zero_extendqisi2
 	cmp	r4, #255
-	beq	.L1264
-	ldr	r5, .L1273+8
+	beq	.L1275
+	ldr	r5, .L1284+8
 	add	r4, r4, r4, lsl #1
-	ldr	r6, .L1273+12
+	ldr	r6, .L1284+12
 	add	r4, r5, r4, lsl #4
-.L1266:
+.L1277:
 	ldr	r3, [r4, #24]
 	mov	r0, r6
 	ldrb	r2, [r4, #42]	@ zero_extendqisi2
@@ -7856,19 +8105,19 @@ dump_sblk_queue:
 	bl	printf
 	ldrb	r4, [r4]	@ zero_extendqisi2
 	cmp	r4, #255
-	beq	.L1264
+	beq	.L1275
 	add	r4, r4, r4, lsl #1
 	add	r4, r5, r4, lsl #4
-	b	.L1266
-.L1264:
+	b	.L1277
+.L1275:
 	pop	{r4, r5, r6, pc}
-.L1274:
+.L1285:
 	.align	2
-.L1273:
-	.word	.LANCHOR54
-	.word	.LC74
-	.word	.LANCHOR50
+.L1284:
+	.word	.LANCHOR56
 	.word	.LC75
+	.word	.LANCHOR52
+	.word	.LC76
 	.size	dump_sblk_queue, .-dump_sblk_queue
 	.section	.text.queue_lun_state,"ax",%progbits
 	.align	1
@@ -7879,85 +8128,98 @@ dump_sblk_queue:
 	.fpu softvfp
 	.type	queue_lun_state, %function
 queue_lun_state:
-	@ args = 0, pretend = 0, frame = 0
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1291
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	ldrb	r5, [r3]	@ zero_extendqisi2
-	cmp	r5, #255
-	beq	.L1283
-	ldr	r3, .L1291+4
-	ubfx	r10, r0, #21, #3
-	ldr	lr, .L1291+12
-	mov	ip, #48
-	ldrh	r7, [r3]
-	movs	r3, #1
-	mov	r8, lr
-	rsb	r2, r7, #21
-	lsls	r3, r3, r2
-	ldr	r2, .L1291+8
+	ldr	r3, .L1305
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldrb	r6, [r3]	@ zero_extendqisi2
+	cmp	r6, #255
+	beq	.L1294
+	ldr	r3, .L1305+4
+	movs	r2, #1
+	ldr	r10, .L1305+16
+	mov	r8, #48
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	rsb	ip, r3, #24
+	lsl	r3, r2, r3
+	asr	r4, r0, ip
 	subs	r3, r3, #1
-	ldrb	r6, [r2]	@ zero_extendqisi2
-	asr	r2, r0, r7
 	uxth	r3, r3
-	subs	r6, r6, #1
-	uxth	r6, r6
-	ands	r2, r2, r6
-	ands	r2, r2, r3
-.L1282:
-	mla	r0, ip, r5, lr
-	ldr	r4, [r0, #24]
-	ubfx	fp, r4, #21, #3
-	cmp	r10, fp
-	bne	.L1277
-	lsrs	r4, r4, r7
-	ldrb	r0, [r0, #42]	@ zero_extendqisi2
-	ands	r4, r4, r6
 	ands	r4, r4, r3
-	cmp	r2, r4
-	bne	.L1278
+	str	r4, [sp]
+	ldr	r4, .L1305+8
+	ldrh	lr, [r4]
+	sub	r4, ip, lr
+	lsls	r2, r2, r4
+	ldr	r4, .L1305+12
+	subs	r2, r2, #1
+	ldrb	r7, [r4]	@ zero_extendqisi2
+	asr	r4, r0, lr
+	uxth	r2, r2
+	subs	r7, r7, #1
+	uxth	r7, r7
+	ands	r4, r4, r7
+	and	r0, r4, r2
+	str	r0, [sp, #4]
+.L1293:
+	mla	fp, r8, r6, r10
+	ldr	r5, [fp, #24]
+	lsr	r0, r5, ip
+	ands	r0, r0, r3
+	mov	r4, r0
+	ldr	r0, [sp]
+	cmp	r0, r4
+	bne	.L1288
+	lsr	r5, r5, lr
+	ldr	r4, [sp, #4]
+	ldrb	r0, [fp, #42]	@ zero_extendqisi2
+	ands	r5, r5, r7
+	ands	r5, r5, r2
+	cmp	r4, r5
+	bne	.L1289
 	cmp	r1, #1
-	bne	.L1275
+	bne	.L1286
+.L1291:
 	cmp	r0, #7
-	beq	.L1277
+	beq	.L1288
 	cmp	r0, #9
-	beq	.L1277
+.L1302:
+	bne	.L1286
+.L1288:
+	mul	r6, r8, r6
+	ldr	r0, .L1305+16
+	ldrb	r6, [r0, r6]	@ zero_extendqisi2
+	cmp	r6, #255
+	bne	.L1293
+.L1294:
+	movs	r0, #0
+.L1286:
+	add	sp, sp, #8
+	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1278:
+.L1289:
 	cmp	r1, #3
-	bhi	.L1277
-	tbb	[pc, r1]
-.L1279:
-	.byte	(.L1275-.L1279)/2
-	.byte	(.L1280-.L1279)/2
-	.byte	(.L1281-.L1279)/2
-	.byte	(.L1275-.L1279)/2
+	bhi	.L1288
+	adr	r5, .L1290
+	ldr	pc, [r5, r1, lsl #2]
+	.p2align 2
+.L1290:
+	.word	.L1286+1
+	.word	.L1291+1
+	.word	.L1292+1
+	.word	.L1286+1
 	.p2align 1
-.L1280:
-	cmp	r0, #7
-	beq	.L1277
-	cmp	r0, #9
-	beq	.L1277
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1281:
-	cmp	r0, #11
-	bne	.L1275
-.L1277:
-	mul	r5, ip, r5
-	ldrb	r5, [r8, r5]	@ zero_extendqisi2
-	cmp	r5, #255
-	bne	.L1282
-.L1283:
-	movs	r0, #0
-.L1275:
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
 .L1292:
+	cmp	r0, #11
+	b	.L1302
+.L1306:
 	.align	2
-.L1291:
-	.word	.LANCHOR54
-	.word	.LANCHOR66
-	.word	.LANCHOR67
-	.word	.LANCHOR50
+.L1305:
+	.word	.LANCHOR56
+	.word	.LANCHOR31
+	.word	.LANCHOR68
+	.word	.LANCHOR69
+	.word	.LANCHOR52
 	.size	queue_lun_state, .-queue_lun_state
 	.section	.text.queue_remove_completed_req,"ax",%progbits
 	.align	1
@@ -7972,93 +8234,93 @@ queue_remove_completed_req:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	ip, #0
-	ldr	r5, .L1318
+	ldr	r5, .L1332
 	movs	r4, #48
 	mov	fp, #255
-	ldr	r6, .L1318+4
+	ldr	r6, .L1332+4
 	ldrb	r3, [r5]	@ zero_extendqisi2
-	ldr	r1, .L1318+8
-	ldr	r7, .L1318+12
+	ldr	r1, .L1332+8
+	ldr	r7, .L1332+12
 	str	r3, [sp, #4]
 	ldrb	r3, [r6]	@ zero_extendqisi2
 	ldrb	r2, [r1]	@ zero_extendqisi2
 	ldrb	r10, [r7]	@ zero_extendqisi2
 	str	r3, [sp]
-	ldr	r3, .L1318+16
-.L1294:
+	ldr	r3, .L1332+16
+.L1308:
 	cmp	r2, #255
-	beq	.L1295
+	beq	.L1309
 	mul	r8, r4, r2
 	mov	r0, r2
 	add	lr, r3, r8
 	ldrb	lr, [lr, #42]	@ zero_extendqisi2
 	sub	lr, lr, #12
 	cmp	lr, #1
-	bls	.L1296
-.L1295:
+	bls	.L1310
+.L1309:
 	cmp	ip, #0
-	beq	.L1293
+	beq	.L1307
 	strb	r2, [r1]
-	b	.L1293
-.L1296:
+	b	.L1307
+.L1310:
 	mul	lr, r4, r0
 	ldrb	r2, [r3, r8]	@ zero_extendqisi2
 	add	ip, r3, lr
 	strb	fp, [r3, lr]
 	ldrb	lr, [ip, #43]	@ zero_extendqisi2
 	cmp	lr, #1
-	bne	.L1299
+	bne	.L1313
 	ldrh	ip, [ip, #34]
 	cmp	ip, #0
-	bne	.L1307
+	bne	.L1321
 	mov	ip, r10
 	mov	lr, r7
-.L1300:
+.L1314:
 	cmp	ip, #255
-	bne	.L1305
+	bne	.L1319
 	strb	r2, [r1]
 	movs	r2, #48
 	mla	r3, r2, r0, r3
 	ldrb	r3, [r3, #1]	@ zero_extendqisi2
 	strb	r3, [lr]
-.L1293:
+.L1307:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1299:
+.L1313:
 	cmp	lr, #0
-	bne	.L1301
+	bne	.L1315
 	ldr	ip, [ip, #20]
 	cmp	ip, #-1
-	beq	.L1301
+	beq	.L1315
 	ldr	ip, [sp, #4]
 	mov	lr, r5
-	b	.L1300
-.L1307:
+	b	.L1314
+.L1321:
 	ldr	ip, [sp]
 	mov	lr, r6
-	b	.L1300
-.L1305:
+	b	.L1314
+.L1319:
 	mov	lr, ip
 	mul	ip, r4, ip
 	ldrb	ip, [r3, ip]	@ zero_extendqisi2
 	cmp	ip, #255
-	bne	.L1305
+	bne	.L1319
 	mla	r0, r4, r0, r3
 	mul	lr, r4, lr
 	ldrb	r0, [r0, #1]	@ zero_extendqisi2
 	strb	r0, [r3, lr]
-.L1301:
+.L1315:
 	mov	ip, #1
-	b	.L1294
-.L1319:
+	b	.L1308
+.L1333:
 	.align	2
-.L1318:
-	.word	.LANCHOR129
-	.word	.LANCHOR69
-	.word	.LANCHOR54
-	.word	.LANCHOR124
-	.word	.LANCHOR50
+.L1332:
+	.word	.LANCHOR131
+	.word	.LANCHOR71
+	.word	.LANCHOR56
+	.word	.LANCHOR126
+	.word	.LANCHOR52
 	.size	queue_remove_completed_req, .-queue_remove_completed_req
 	.section	.text.pm_alloc_new_blk,"ax",%progbits
 	.align	1
@@ -8072,8 +8334,8 @@ pm_alloc_new_blk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r4, r5, r6, r7, lr}
-	ldr	r5, .L1336
-	ldr	r1, .L1336+4
+	ldr	r5, .L1350
+	ldr	r1, .L1350+4
 	ldr	r2, [r5]
 	ldrb	r1, [r1]	@ zero_extendqisi2
 	ldrh	r3, [r2, #690]
@@ -8081,16 +8343,16 @@ pm_alloc_new_blk:
 	uxth	r3, r3
 	cmp	r1, r3
 	strh	r3, [r2, #690]	@ movhi
-	bls	.L1321
+	bls	.L1335
 	add	r3, r3, #336
 	ldrh	r2, [r2, r3, lsl #1]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1322
-.L1321:
-	ldr	r7, .L1336+8
-	ldr	r4, .L1336+12
-.L1334:
+	bne	.L1336
+.L1335:
+	ldr	r7, .L1350+8
+	ldr	r4, .L1350+12
+.L1348:
 	movs	r0, #1
 	bl	ftl_alloc_sblk
 	movs	r1, #0
@@ -8101,7 +8363,7 @@ pm_alloc_new_blk:
 	add	r1, r1, #672
 	bl	ftl_get_blk_list_in_sblk
 	uxth	r0, r0
-	cbnz	r0, .L1323
+	cbnz	r0, .L1337
 	mov	r1, r6
 	mov	r0, r7
 	bl	printf
@@ -8110,37 +8372,37 @@ pm_alloc_new_blk:
 	ldrb	r3, [r6, #2]	@ zero_extendqisi2
 	orr	r3, r3, #224
 	strb	r3, [r6, #2]
-	b	.L1334
-.L1323:
+	b	.L1348
+.L1337:
 	ldr	r3, [r5]
 	movs	r1, #1
-	ldr	r2, .L1336+16
+	ldr	r2, .L1350+16
 	movs	r4, #0
 	strh	r4, [r3, #690]	@ movhi
 	add	r3, r3, #416
 	str	r1, [r2]
 	movw	r1, #65535
-.L1325:
+.L1339:
 	ldrh	r0, [r3], #2
 	uxth	r2, r4
 	cmp	r0, r1
-	beq	.L1324
+	beq	.L1338
 	adds	r4, r4, #1
 	cmp	r4, #128
-	bne	.L1325
-	movs	r2, #194
-	ldr	r1, .L1336+20
-	ldr	r0, .L1336+24
+	bne	.L1339
+	movs	r2, #227
+	ldr	r1, .L1350+20
+	ldr	r0, .L1350+24
 	bl	printf
 	mov	r2, r4
-.L1324:
+.L1338:
 	ldr	r3, [r5]
 	adds	r2, r2, #208
 	strh	r6, [r3, r2, lsl #1]	@ movhi
 	ldrh	r2, [r3, #688]
 	adds	r2, r2, #1
 	strh	r2, [r3, #688]	@ movhi
-.L1322:
+.L1336:
 	ldr	r2, [r5]
 	ldrh	r3, [r2, #690]
 	add	r3, r3, #336
@@ -8149,52 +8411,56 @@ pm_alloc_new_blk:
 	subs	r3, r4, #1
 	uxth	r3, r3
 	cmp	r3, r2
-	bls	.L1327
-	movs	r2, #199
-	ldr	r1, .L1336+20
-	ldr	r0, .L1336+24
+	bls	.L1341
+	movs	r2, #232
+	ldr	r1, .L1350+20
+	ldr	r0, .L1350+24
 	bl	printf
-.L1327:
+.L1341:
 	ldr	r1, [r5]
 	movs	r3, #0
 	strh	r3, [r1, #696]	@ movhi
-	ldr	r3, .L1336+28
+	ldr	r3, .L1350+28
 	strh	r4, [r1, #692]	@ movhi
-	ldrh	r2, [r3]
-	rsb	r2, r2, #21
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	ldr	r3, .L1350+32
+	rsb	r2, r2, #24
+	ldrh	r3, [r3]
+	subs	r2, r2, r3
 	asr	r3, r4, r2
 	strh	r3, [r1, #694]	@ movhi
-	ldr	r1, .L1336+32
+	ldr	r1, .L1350+36
 	ldr	r1, [r1]
 	lsls	r1, r1, #19
-	bpl	.L1331
+	bpl	.L1345
 	movs	r1, #1
 	uxth	r3, r3
 	lsl	r2, r1, r2
-	ldr	r0, .L1336+36
+	ldr	r0, .L1350+40
 	str	r3, [sp]
 	mov	r1, r4
 	mov	r3, r4
 	subs	r2, r2, #1
 	bl	printf
-.L1331:
+.L1345:
 	movs	r0, #0
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, pc}
-.L1337:
+.L1351:
 	.align	2
-.L1336:
-	.word	.LANCHOR102
-	.word	.LANCHOR78
-	.word	.LC76
+.L1350:
+	.word	.LANCHOR104
+	.word	.LANCHOR80
+	.word	.LC77
 	.word	.LANCHOR7
-	.word	.LANCHOR130
-	.word	.LANCHOR131
+	.word	.LANCHOR132
+	.word	.LANCHOR133
 	.word	.LC0
-	.word	.LANCHOR66
+	.word	.LANCHOR31
+	.word	.LANCHOR68
 	.word	.LANCHOR14
-	.word	.LC77
+	.word	.LC78
 	.size	pm_alloc_new_blk, .-pm_alloc_new_blk
 	.section	.text.pm_select_ram_region,"ax",%progbits
 	.align	1
@@ -8207,72 +8473,72 @@ pm_alloc_new_blk:
 pm_select_ram_region:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L1348
+	ldr	r2, .L1362
 	movw	r0, #65535
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r3, #0
 	mov	r1, r2
-.L1340:
+.L1354:
 	ldrh	r5, [r2, r3, lsl #3]
 	uxth	r4, r3
 	cmp	r5, r0
-	beq	.L1339
+	beq	.L1353
 	adds	r3, r3, #1
 	cmp	r3, #32
-	bne	.L1340
+	bne	.L1354
 	movs	r2, #0
 	mov	r4, r3
 	mov	r0, #32768
-.L1342:
+.L1356:
 	add	r3, r1, r2, lsl #3
 	uxth	r5, r2
 	ldrh	r3, [r3, #2]
 	lsls	r6, r3, #16
-	bmi	.L1341
+	bmi	.L1355
 	cmp	r3, r0
 	itt	cc
 	movcc	r0, r3
 	movcc	r4, r5
-.L1341:
+.L1355:
 	adds	r2, r2, #1
 	cmp	r2, #32
-	bne	.L1342
+	bne	.L1356
 	cmp	r4, #32
-	bne	.L1339
-	ldr	r3, .L1348+4
+	bne	.L1353
+	ldr	r3, .L1362+4
 	mov	r2, #-1
 	ldrb	r5, [r3]	@ zero_extendqisi2
 	movs	r3, #0
-.L1344:
+.L1358:
 	add	r0, r1, r3, lsl #3
 	uxth	r6, r3
 	ldrh	r0, [r0, #2]
 	cmp	r0, r2
-	bcs	.L1343
+	bcs	.L1357
 	ldrh	r7, [r1, r3, lsl #3]
 	cmp	r7, r5
 	itt	ne
 	movne	r2, r0
 	movne	r4, r6
-.L1343:
+.L1357:
 	adds	r3, r3, #1
 	cmp	r3, #32
-	bne	.L1344
+	bne	.L1358
 	cmp	r4, #32
-	bne	.L1339
-	movw	r2, #297
-	ldr	r1, .L1348+8
-	ldr	r0, .L1348+12
+	bne	.L1353
+	movw	r2, #331
+	ldr	r1, .L1362+8
+	ldr	r0, .L1362+12
 	bl	printf
-.L1339:
+.L1353:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1349:
+.L1363:
 	.align	2
-.L1348:
-	.word	.LANCHOR132
-	.word	.LANCHOR133
+.L1362:
 	.word	.LANCHOR134
+	.word	.LANCHOR135
+	.word	.LANCHOR136
 	.word	.LC0
 	.size	pm_select_ram_region, .-pm_select_ram_region
 	.section	.text.idb_init,"ax",%progbits
@@ -8287,20 +8553,20 @@ idb_init:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L1351
+	ldr	r3, .L1365
 	movs	r0, #0
 	str	r0, [r3]
-	ldr	r3, .L1351+4
+	ldr	r3, .L1365+4
 	str	r0, [r3]
-	ldr	r3, .L1351+8
+	ldr	r3, .L1365+8
 	str	r0, [r3]
 	bx	lr
-.L1352:
+.L1366:
 	.align	2
-.L1351:
-	.word	.LANCHOR135
-	.word	.LANCHOR136
+.L1365:
 	.word	.LANCHOR137
+	.word	.LANCHOR138
+	.word	.LANCHOR139
 	.size	idb_init, .-idb_init
 	.section	.text.ftl_memset,"ax",%progbits
 	.align	1
@@ -8328,52 +8594,52 @@ flash_lsb_page_tbl_build:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
-	ldr	r4, .L1392
-	cbnz	r0, .L1355
-.L1356:
+	ldr	r4, .L1406
+	cbnz	r0, .L1369
+.L1370:
 	strh	r0, [r4, r0, lsl #1]	@ movhi
 	adds	r0, r0, #1
 	cmp	r0, #256
-	bne	.L1356
-.L1362:
+	bne	.L1370
+.L1376:
 	movs	r1, #255
 	mov	r2, #1024
-	ldr	r0, .L1392+4
+	ldr	r0, .L1406+4
 	bl	ftl_memset
-	ldr	r1, .L1392+4
+	ldr	r1, .L1406+4
 	movs	r3, #0
-.L1357:
+.L1371:
 	ldrh	r2, [r4, r3, lsl #1]
 	adds	r3, r3, #1
 	cmp	r3, #256
 	strh	r2, [r1, r2, lsl #1]	@ movhi
-	bne	.L1357
+	bne	.L1371
 	pop	{r4, pc}
-.L1355:
+.L1369:
 	cmp	r0, #1
-	bne	.L1358
+	bne	.L1372
 	movs	r3, #0
-.L1361:
+.L1375:
 	cmp	r3, #3
 	uxth	r2, r3
-	bls	.L1359
+	bls	.L1373
 	tst	r2, #1
 	ite	ne
 	movne	r1, #3
 	moveq	r1, #2
 	rsb	r2, r1, r2, lsl #1
 	uxth	r2, r2
-.L1359:
+.L1373:
 	strh	r2, [r4, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	cmp	r3, #256
-	bne	.L1361
-	b	.L1362
-.L1358:
+	bne	.L1375
+	b	.L1376
+.L1372:
 	cmp	r0, #2
-	bne	.L1363
+	bne	.L1377
 	movs	r2, #0
-.L1365:
+.L1379:
 	uxth	r3, r2
 	cmp	r2, #1
 	ittt	hi
@@ -8383,32 +8649,32 @@ flash_lsb_page_tbl_build:
 	strh	r3, [r4, r2, lsl #1]	@ movhi
 	adds	r2, r2, #1
 	cmp	r2, #256
-	bne	.L1365
-	b	.L1362
-.L1363:
+	bne	.L1379
+	b	.L1376
+.L1377:
 	cmp	r0, #3
-	bne	.L1366
+	bne	.L1380
 	movs	r3, #0
-.L1369:
+.L1383:
 	cmp	r3, #5
 	uxth	r2, r3
-	bls	.L1367
+	bls	.L1381
 	tst	r2, #1
 	ite	ne
 	movne	r1, #5
 	moveq	r1, #4
 	rsb	r2, r1, r2, lsl #1
 	uxth	r2, r2
-.L1367:
+.L1381:
 	strh	r2, [r4, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	cmp	r3, #256
-	bne	.L1369
-	b	.L1362
-.L1366:
+	bne	.L1383
+	b	.L1376
+.L1380:
 	cmp	r0, #4
 	mov	r3, #0
-	bne	.L1370
+	bne	.L1384
 	strh	r3, [r4]	@ movhi
 	movs	r3, #1
 	strh	r3, [r4, #2]	@ movhi
@@ -8424,7 +8690,7 @@ flash_lsb_page_tbl_build:
 	movs	r3, #8
 	strh	r0, [r4, #8]	@ movhi
 	strh	r3, [r2, #14]!	@ movhi
-.L1372:
+.L1386:
 	tst	r3, #1
 	ite	ne
 	movne	r1, #7
@@ -8434,36 +8700,36 @@ flash_lsb_page_tbl_build:
 	uxth	r3, r3
 	strh	r1, [r2, #2]!	@ movhi
 	cmp	r3, #256
-	bne	.L1372
-	b	.L1362
-.L1370:
+	bne	.L1386
+	b	.L1376
+.L1384:
 	cmp	r0, #5
-	bne	.L1373
-.L1374:
+	bne	.L1387
+.L1388:
 	strh	r3, [r4, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	cmp	r3, #16
-	bne	.L1374
-	ldr	r2, .L1392+8
-.L1375:
+	bne	.L1388
+	ldr	r2, .L1406+8
+.L1389:
 	strh	r3, [r2, #2]!	@ movhi
 	adds	r3, r3, #2
 	uxth	r3, r3
 	cmp	r3, #496
-	bne	.L1375
-	b	.L1362
-.L1373:
+	bne	.L1389
+	b	.L1376
+.L1387:
 	cmp	r0, #8
-	bne	.L1376
-.L1377:
+	bne	.L1390
+.L1391:
 	strh	r3, [r4, r3]	@ movhi
 	adds	r3, r3, #2
 	cmp	r3, #512
-	bne	.L1377
-	b	.L1362
-.L1376:
+	bne	.L1391
+	b	.L1376
+.L1390:
 	cmp	r0, #9
-	bne	.L1362
+	bne	.L1376
 	strh	r3, [r4]	@ movhi
 	movs	r3, #1
 	strh	r3, [r4, #2]	@ movhi
@@ -8472,18 +8738,18 @@ flash_lsb_page_tbl_build:
 	movw	r1, #509
 	strh	r3, [r2, #4]!	@ movhi
 	movs	r3, #3
-.L1378:
+.L1392:
 	strh	r3, [r2, #2]!	@ movhi
 	adds	r3, r3, #2
 	uxth	r3, r3
 	cmp	r3, r1
-	bne	.L1378
-	b	.L1362
-.L1393:
+	bne	.L1392
+	b	.L1376
+.L1407:
 	.align	2
-.L1392:
+.L1406:
 	.word	.LANCHOR3
-	.word	.LANCHOR138
+	.word	.LANCHOR140
 	.word	.LANCHOR3+30
 	.size	flash_lsb_page_tbl_build, .-flash_lsb_page_tbl_build
 	.section	.text.flash_die_info_init,"ax",%progbits
@@ -8497,74 +8763,74 @@ flash_lsb_page_tbl_build:
 flash_die_info_init:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1411
+	ldr	r3, .L1425
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	ldr	r3, [r3]
 	lsls	r3, r3, #19
-	bpl	.L1395
-	ldr	r1, .L1411+4
-	ldr	r0, .L1411+8
+	bpl	.L1409
+	ldr	r1, .L1425+4
+	ldr	r0, .L1425+8
 	bl	printf
-.L1395:
-	ldr	r4, .L1411+12
+.L1409:
+	ldr	r4, .L1425+12
 	movs	r6, #0
-	ldr	r5, .L1411+16
-	ldr	r7, .L1411+20
+	ldr	r5, .L1425+16
+	ldr	r7, .L1425+20
 	ldrh	r3, [r4, #26]
 	ldrb	r1, [r4, #12]	@ zero_extendqisi2
 	ldrh	r0, [r4, #10]
 	strh	r3, [r7]	@ movhi
 	strb	r6, [r5]
 	bl	__aeabi_idiv
-	ldr	r10, .L1411+48
+	ldr	r10, .L1425+48
 	movs	r2, #8
-	ldr	r3, .L1411+24
+	ldr	r3, .L1425+24
 	mov	r1, r6
 	mov	r8, r10
 	strh	r0, [r3]	@ movhi
-	ldr	r0, .L1411+28
+	ldr	r0, .L1425+28
 	bl	ftl_memset
 	movs	r2, #32
 	mov	r1, r6
-	ldr	r0, .L1411+32
+	ldr	r0, .L1425+32
 	bl	ftl_memset
-.L1397:
-	ldr	r3, .L1411+36
+.L1411:
+	ldr	r3, .L1425+36
 	movs	r2, #2
 	add	r1, r10, r6, lsl #3
-	ldr	r0, .L1411+40
+	ldr	r0, .L1425+40
 	strb	r2, [r6, r3]
 	ldrb	r2, [r4]	@ zero_extendqisi2
 	bl	flash_mem_cmp8
-	cbnz	r0, .L1396
+	cbnz	r0, .L1410
 	ldrb	r3, [r5]	@ zero_extendqisi2
-	ldr	r2, .L1411+32
+	ldr	r2, .L1425+32
 	str	r0, [r2, r3, lsl #2]
 	adds	r2, r3, #1
 	strb	r2, [r5]
 	uxtb	r0, r6
-	ldr	r2, .L1411+28
+	ldr	r2, .L1425+28
 	strb	r0, [r2, r3]
 	bl	zftl_flash_enter_slc_mode
-.L1396:
+.L1410:
 	adds	r6, r6, #1
 	cmp	r6, #4
-	bne	.L1397
+	bne	.L1411
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #2
-	beq	.L1398
-.L1402:
+	beq	.L1412
+.L1416:
 	ldrb	r2, [r4, #13]	@ zero_extendqisi2
 	ldrb	r3, [r5]	@ zero_extendqisi2
 	smulbb	r3, r3, r2
 	ldrh	r2, [r4, #14]
 	smulbb	r3, r3, r2
-	ldr	r2, .L1411+44
+	ldr	r2, .L1425+44
 	strh	r3, [r2]	@ movhi
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1398:
+.L1412:
 	ldrh	r6, [r7]
 	movs	r7, #0
 	ldrb	r3, [r4, #13]	@ zero_extendqisi2
@@ -8576,18 +8842,18 @@ flash_die_info_init:
 	muls	r6, r3, r6
 	lsls	r3, r6, #1
 	str	r3, [sp]
-	ldr	r3, .L1411+28
-.L1401:
+	ldr	r3, .L1425+28
+.L1415:
 	mov	r2, r10
 	add	r1, r8, r7, lsl #3
-	ldr	r0, .L1411+40
+	ldr	r0, .L1425+40
 	str	r3, [sp, #4]
 	bl	flash_mem_cmp8
 	ldr	r3, [sp, #4]
-	cbnz	r0, .L1399
+	cbnz	r0, .L1413
 	ldr	r1, [sp]
 	ldrb	r2, [r5]	@ zero_extendqisi2
-	ldr	r0, .L1411+32
+	ldr	r0, .L1425+32
 	cmp	fp, #0
 	it	eq
 	moveq	r1, r6
@@ -8595,27 +8861,27 @@ flash_die_info_init:
 	str	r1, [r0, r2, lsl #2]
 	adds	r1, r2, #1
 	strb	r1, [r5]
-.L1399:
+.L1413:
 	adds	r7, r7, #1
 	cmp	r7, #4
-	bne	.L1401
-	b	.L1402
-.L1412:
+	bne	.L1415
+	b	.L1416
+.L1426:
 	.align	2
-.L1411:
+.L1425:
 	.word	.LANCHOR14
-	.word	.LANCHOR139
+	.word	.LANCHOR141
 	.word	.LC1
-	.word	.LANCHOR31
+	.word	.LANCHOR32
 	.word	.LANCHOR18
 	.word	.LANCHOR2
-	.word	.LANCHOR140
-	.word	.LANCHOR30
-	.word	.LANCHOR141
-	.word	.LANCHOR32
-	.word	.LANCHOR31+1
 	.word	.LANCHOR142
-	.word	.LANCHOR42
+	.word	.LANCHOR30
+	.word	.LANCHOR143
+	.word	.LANCHOR33
+	.word	.LANCHOR32+1
+	.word	.LANCHOR144
+	.word	.LANCHOR44
 	.size	flash_die_info_init, .-flash_die_info_init
 	.section	.text.lpa_hash_init,"ax",%progbits
 	.align	1
@@ -8631,26 +8897,26 @@ lpa_hash_init:
 	push	{r3, lr}
 	mov	r2, #512
 	movs	r1, #255
-	ldr	r0, .L1414
+	ldr	r0, .L1428
 	bl	ftl_memset
-	ldr	r3, .L1414+4
+	ldr	r3, .L1428+4
 	movs	r1, #255
-	ldr	r2, .L1414+8
+	ldr	r2, .L1428+8
 	ldrh	r3, [r3]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	muls	r2, r3, r2
-	ldr	r3, .L1414+12
+	ldr	r3, .L1428+12
 	ldr	r0, [r3]
 	lsls	r2, r2, #2
 	pop	{r3, lr}
 	b	ftl_memset
-.L1415:
+.L1429:
 	.align	2
-.L1414:
-	.word	.LANCHOR108
-	.word	.LANCHOR85
-	.word	.LANCHOR78
+.L1428:
 	.word	.LANCHOR110
+	.word	.LANCHOR87
+	.word	.LANCHOR80
+	.word	.LANCHOR112
 	.size	lpa_hash_init, .-lpa_hash_init
 	.section	.text.lpa_rebuild_hash,"ax",%progbits
 	.align	1
@@ -8664,45 +8930,45 @@ lpa_rebuild_hash:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
-	ldr	r3, .L1427
+	ldr	r3, .L1441
 	ldr	r3, [r3]
 	lsls	r3, r3, #19
-	bpl	.L1417
+	bpl	.L1431
 	movs	r3, #0
-	movs	r2, #224
-	ldr	r1, .L1427+4
-	ldr	r0, .L1427+8
+	movs	r2, #225
+	ldr	r1, .L1441+4
+	ldr	r0, .L1441+8
 	bl	printf
-.L1417:
-	ldr	r6, .L1427+12
+.L1431:
+	ldr	r6, .L1441+12
 	mov	r2, #512
-	ldr	r4, .L1427+16
+	ldr	r4, .L1441+16
 	movs	r1, #255
-	ldr	r0, .L1427+20
+	ldr	r0, .L1441+20
 	bl	ftl_memset
 	ldrh	r3, [r4]
 	movs	r1, #255
 	ldrb	r2, [r6]	@ zero_extendqisi2
-	ldr	r5, .L1427+24
+	ldr	r5, .L1441+24
 	muls	r2, r3, r2
 	ldr	r0, [r5]
 	lsls	r2, r2, #2
 	bl	ftl_memset
-	ldr	r3, .L1427+28
+	ldr	r3, .L1441+28
 	movs	r2, #0
 	ldrb	r6, [r6]	@ zero_extendqisi2
 	ldr	ip, [r5]
 	ldr	r7, [r3]
-	ldr	r0, .L1427+20
-.L1418:
+	ldr	r0, .L1441+20
+.L1432:
 	ldrh	r3, [r4]
 	uxth	r5, r2
 	mov	r1, r5
 	muls	r3, r6, r3
 	cmp	r5, r3, lsl #1
-	blt	.L1420
+	blt	.L1434
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1420:
+.L1434:
 	ldr	r3, [r7, r1, lsl #2]
 	adds	r2, r2, #1
 	cmp	r3, #-1
@@ -8711,18 +8977,18 @@ lpa_rebuild_hash:
 	ldrhne	lr, [r0, r3, lsl #1]
 	strhne	r5, [r0, r3, lsl #1]	@ movhi
 	strhne	lr, [ip, r1, lsl #1]	@ movhi
-	b	.L1418
-.L1428:
+	b	.L1432
+.L1442:
 	.align	2
-.L1427:
+.L1441:
 	.word	.LANCHOR14
-	.word	.LANCHOR143
-	.word	.LC78
-	.word	.LANCHOR78
-	.word	.LANCHOR85
-	.word	.LANCHOR108
+	.word	.LANCHOR145
+	.word	.LC79
+	.word	.LANCHOR80
+	.word	.LANCHOR87
 	.word	.LANCHOR110
-	.word	.LANCHOR109
+	.word	.LANCHOR112
+	.word	.LANCHOR111
 	.size	lpa_rebuild_hash, .-lpa_rebuild_hash
 	.section	.text.zftl_read_flash_info,"ax",%progbits
 	.align	1
@@ -8740,9 +9006,9 @@ zftl_read_flash_info:
 	movs	r1, #0
 	mov	r4, r0
 	bl	ftl_memset
-	ldr	r1, .L1432
+	ldr	r1, .L1446
 	movs	r2, #0
-	ldr	r3, .L1432+4
+	ldr	r3, .L1446+4
 	strb	r2, [r4, #10]
 	ldrb	r0, [r1, #9]	@ zero_extendqisi2
 	ldrh	r3, [r3]
@@ -8751,10 +9017,10 @@ zftl_read_flash_info:
 	strb	r3, [r4, #4]
 	lsrs	r3, r3, #8
 	strb	r3, [r4, #5]
-	ldr	r3, .L1432+8
+	ldr	r3, .L1446+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	strb	r3, [r4, #7]
-	ldr	r3, .L1432+12
+	ldr	r3, .L1446+12
 	ldrb	r5, [r3]	@ zero_extendqisi2
 	strb	r5, [r4]
 	ldrb	r5, [r3, #1]	@ zero_extendqisi2
@@ -8768,31 +9034,31 @@ zftl_read_flash_info:
 	movs	r3, #32
 	strb	r3, [r4, #8]
 	ldrb	r3, [r1, #7]	@ zero_extendqisi2
-	ldr	r0, .L1432+16
+	ldr	r0, .L1446+16
 	strb	r3, [r4, #9]
-	ldr	r3, .L1432+20
+	ldr	r3, .L1446+20
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	mov	r3, r2
-.L1430:
+.L1444:
 	uxtb	r2, r3
 	cmp	r1, r2
-	bhi	.L1431
+	bhi	.L1445
 	pop	{r4, r5, r6, pc}
-.L1431:
+.L1445:
 	ldrb	r2, [r3, r0]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	ldrb	r6, [r4, #10]	@ zero_extendqisi2
 	lsl	r2, r5, r2
 	orrs	r2, r2, r6
 	strb	r2, [r4, #10]
-	b	.L1430
-.L1433:
+	b	.L1444
+.L1447:
 	.align	2
-.L1432:
-	.word	.LANCHOR31
+.L1446:
+	.word	.LANCHOR32
 	.word	.LANCHOR2
-	.word	.LANCHOR44
-	.word	.LANCHOR59
+	.word	.LANCHOR46
+	.word	.LANCHOR61
 	.word	.LANCHOR30
 	.word	.LANCHOR18
 	.size	zftl_read_flash_info, .-zftl_read_flash_info
@@ -8807,30 +9073,30 @@ zftl_read_flash_info:
 gc_static_wearleveling:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r0, .L1550
+	ldr	r0, .L1565
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #40
 	ldr	r3, [r0]
 	ldr	r3, [r3, #32]
 	cmp	r3, #10240
-	bls	.L1435
+	bls	.L1449
 	bl	ftl_tmp_into_update
-.L1435:
-	ldr	r3, .L1550+4
+.L1449:
+	ldr	r3, .L1565+4
 	ldr	r3, [r3]
 	ldr	r2, [r3, #568]
 	ldr	r1, [r3, #12]
 	add	r2, r2, #860160
 	add	r2, r2, #3840
 	cmp	r1, r2
-	bhi	.L1436
+	bhi	.L1450
 	ldr	r4, [r0]
 	ldr	r2, [r3, #572]
 	ldr	r4, [r4, #36]
 	adds	r2, r2, #32
 	cmp	r4, r2
-	bls	.L1487
-.L1436:
+	bls	.L1502
+.L1450:
 	ldr	r2, [r0]
 	movs	r5, #0
 	movw	r4, #65535
@@ -8846,12 +9112,12 @@ gc_static_wearleveling:
 	str	r5, [sp, #28]
 	str	r5, [sp, #24]
 	str	r5, [sp, #16]
-.L1438:
-	ldr	r3, .L1550+8
+.L1452:
+	ldr	r3, .L1565+8
 	ldrh	r3, [r3]
 	cmp	r3, r6
-	bhi	.L1449
-	ldr	r6, .L1550+4
+	bhi	.L1463
+	ldr	r6, .L1565+4
 	movs	r3, #0
 	movs	r2, #128
 	movs	r1, #255
@@ -8861,14 +9127,14 @@ gc_static_wearleveling:
 	bl	ftl_memset
 	ldr	r3, [r6]
 	ldrh	r1, [r3, #586]
-	ldr	r3, .L1550+12
+	ldr	r3, .L1565+12
 	ldr	r2, [r3]
-	ldr	r3, .L1550+16
+	ldr	r3, .L1565+16
 	ldr	r3, [r3]
 	add	r6, r2, r1, lsl #2
 	lsls	r0, r3, #21
-	bpl	.L1450
-	ldr	r0, .L1550+20
+	bpl	.L1464
+	ldr	r0, .L1565+20
 	ldr	r3, [r2, r1, lsl #2]
 	ldrh	r2, [r2, r1, lsl #2]
 	ldr	r0, [r0]
@@ -8884,36 +9150,48 @@ gc_static_wearleveling:
 	ldrb	r0, [r6, #2]	@ zero_extendqisi2
 	ubfx	r0, r0, #3, #2
 	str	r0, [sp]
-	ldr	r0, .L1550+24
+	ldr	r0, .L1565+24
 	bl	printf
-.L1450:
+.L1464:
 	ldrb	r3, [r6, #2]	@ zero_extendqisi2
-	lsls	r2, r3, #28
-	bpl	.L1451
-	and	r2, r3, #192
-	ldr	r6, .L1550+4
-	cmp	r2, #64
-	bne	.L1452
+	and	r2, r3, #224
+	cmp	r2, #32
+	bne	.L1465
+	ldr	r1, .L1565
+	ldr	r1, [r1]
+	ldrh	r1, [r1, #688]
+	cmp	r1, #2
+	ittt	hi
+	ldrhi	r1, .L1565+28
+	movhi	r0, #1
+	strhi	r0, [r1]
+.L1465:
+	lsls	r1, r3, #28
+	bpl	.L1466
+	and	r3, r3, #192
+	ldr	r6, .L1565+4
+	cmp	r3, #64
+	bne	.L1467
 	ldr	r3, [r6]
 	movs	r2, #1
 	movs	r1, #0
 	ldrh	r0, [r3, #586]
 	bl	gc_add_sblk
-	ldr	r3, .L1550+28
+	ldr	r3, .L1565+32
 	movs	r2, #1
-	strh	r2, [r3, #314]	@ movhi
-.L1451:
-	ldr	r3, .L1550+4
+	strh	r2, [r3, #570]	@ movhi
+.L1466:
+	ldr	r3, .L1565+4
 	ldr	r3, [r3]
 	ldrh	r1, [r3, #584]
-	ldr	r3, .L1550+12
+	ldr	r3, .L1565+12
 	ldr	r2, [r3]
-	ldr	r3, .L1550+16
+	ldr	r3, .L1565+16
 	ldr	r3, [r3]
 	add	r6, r2, r1, lsl #2
 	lsls	r7, r3, #21
-	bpl	.L1453
-	ldr	r0, .L1550+20
+	bpl	.L1468
+	ldr	r0, .L1565+20
 	ldr	r3, [r2, r1, lsl #2]
 	ldrh	r2, [r2, r1, lsl #2]
 	ldr	r0, [r0]
@@ -8929,31 +9207,31 @@ gc_static_wearleveling:
 	ldrb	r0, [r6, #2]	@ zero_extendqisi2
 	ubfx	r0, r0, #3, #2
 	str	r0, [sp]
-	ldr	r0, .L1550+32
+	ldr	r0, .L1565+36
 	bl	printf
-.L1453:
+.L1468:
 	ldrb	r3, [r6, #2]	@ zero_extendqisi2
 	lsls	r0, r3, #28
-	bpl	.L1454
+	bpl	.L1469
 	and	r2, r3, #192
 	cmp	r2, #64
-	bne	.L1455
-	ldr	r3, .L1550+4
+	bne	.L1470
+	ldr	r3, .L1565+4
 	movs	r2, #1
 	movs	r1, #0
 	ldr	r3, [r3]
 	ldrh	r0, [r3, #584]
 	bl	gc_add_sblk
-	ldr	r3, .L1550+28
+	ldr	r3, .L1565+32
 	movs	r2, #1
-	strh	r2, [r3, #314]	@ movhi
-.L1454:
-	ldr	r3, .L1550+16
+	strh	r2, [r3, #570]	@ movhi
+.L1469:
+	ldr	r3, .L1565+16
 	ldr	r3, [r3]
 	lsls	r1, r3, #21
-	bpl	.L1456
-	ldr	r3, .L1550+12
-	ldr	r0, .L1550+20
+	bpl	.L1471
+	ldr	r3, .L1565+12
+	ldr	r0, .L1565+20
 	ldr	r2, [r3]
 	ldr	r0, [r0]
 	ldr	r3, [r2, r5, lsl #2]
@@ -8969,17 +9247,17 @@ gc_static_wearleveling:
 	lsrs	r0, r0, #5
 	str	r0, [sp, #4]
 	ldrb	r1, [r1, #2]	@ zero_extendqisi2
-	ldr	r0, .L1550+36
+	ldr	r0, .L1565+40
 	ubfx	r1, r1, #3, #2
 	str	r1, [sp]
 	mov	r1, r5
 	bl	printf
-.L1456:
-	ldr	r3, .L1550+16
+.L1471:
+	ldr	r3, .L1565+16
 	ldr	r3, [r3]
 	lsls	r2, r3, #21
-	bpl	.L1457
-	ldr	r3, .L1550+12
+	bpl	.L1472
+	ldr	r3, .L1565+12
 	ldr	r0, [sp, #20]
 	ldr	r5, [sp, #20]
 	ldr	r2, [r3]
@@ -8987,7 +9265,7 @@ gc_static_wearleveling:
 	add	r1, r2, r3, lsl #2
 	ldr	r3, [r2, r3, lsl #2]
 	ldrh	r2, [r2, r0, lsl #2]
-	ldr	r0, .L1550+20
+	ldr	r0, .L1565+20
 	ubfx	r3, r3, #11, #8
 	ubfx	r2, r2, #0, #11
 	ldr	r0, [r0]
@@ -8999,13 +9277,13 @@ gc_static_wearleveling:
 	lsrs	r0, r0, #5
 	str	r0, [sp, #4]
 	ldrb	r1, [r1, #2]	@ zero_extendqisi2
-	ldr	r0, .L1550+40
+	ldr	r0, .L1565+44
 	ubfx	r1, r1, #3, #2
 	str	r1, [sp]
 	mov	r1, r5
 	bl	printf
-.L1457:
-	ldr	r6, .L1550
+.L1472:
+	ldr	r6, .L1565
 	ldrh	r3, [sp, #16]
 	ldr	r1, [sp, #24]
 	ldr	r5, [r6]
@@ -9021,97 +9299,98 @@ gc_static_wearleveling:
 	ldr	r0, [sp, #36]
 	bl	__aeabi_uidiv
 	strh	r0, [r5, #90]	@ movhi
-	ldr	r5, .L1550+16
+	ldr	r5, .L1565+16
 	ldr	r3, [r5]
 	lsls	r3, r3, #21
-	bpl	.L1458
+	bpl	.L1473
 	uxth	r0, r0
 	uxth	r3, r7
 	ldr	r2, [sp, #28]
 	str	r0, [sp]
 	ldr	r1, [sp, #24]
-	ldr	r0, .L1550+44
+	ldr	r0, .L1565+48
 	bl	printf
-.L1458:
+.L1473:
 	ldr	r3, [r5]
-	ldr	r5, .L1550+48
+	ldr	r5, .L1565+52
 	tst	r3, #1024
-	beq	.L1459
+	beq	.L1474
 	ldrh	r3, [r5]
 	mov	r2, fp
 	mov	r1, r4
-	ldr	r0, .L1550+52
+	ldr	r0, .L1565+56
 	str	r3, [sp, #8]
-	ldr	r3, .L1550+56
+	ldr	r3, .L1565+60
 	ldrh	r3, [r3]
 	str	r8, [sp]
 	str	r3, [sp, #4]
 	ldr	r3, [sp, #16]
 	bl	printf
-.L1459:
+.L1474:
 	sub	r3, r8, fp
 	str	r3, [sp, #20]
 	ldr	r2, [sp, #20]
 	ldrh	r3, [r5]
 	cmp	r2, r3
-	bgt	.L1460
-	ldr	r2, .L1550+56
+	bgt	.L1475
+	ldr	r2, .L1565+60
 	ldr	r3, [sp, #16]
 	ldrh	r2, [r2]
 	subs	r3, r3, r4
 	cmp	r3, r2
-	ble	.L1488
-.L1460:
-	ldr	r3, .L1550+4
+	ble	.L1503
+.L1475:
+	ldr	r3, .L1565+4
 	mov	r8, #0
 	mov	r7, r8
 	ldr	r3, [r3]
 	ldrh	r5, [r3, #580]
 	ldr	r3, [r6]
 	ldrh	r10, [r3, #134]
-.L1462:
-	ldr	r3, .L1550+8
+.L1477:
+	ldr	r3, .L1565+8
 	ldrh	r3, [r3]
 	cmp	r10, r3
-	bcc	.L1472
-.L1471:
-	ldr	r3, .L1550+4
+	bcc	.L1487
+.L1486:
+	ldr	r3, .L1565+4
 	ldr	r3, [r3]
 	str	r5, [r3, #580]
-.L1461:
-	cmp	fp, #0
-	beq	.L1474
-	ldr	r3, .L1550
-	ldr	r1, [r3]
-	ldr	r3, .L1550+8
-	ldrh	r2, [r1, #134]
-	ldrh	r6, [r3]
-	ldr	r3, .L1550+12
-	ldr	r3, [r3]
-	add	r3, r3, r2, lsl #2
-	b	.L1551
-.L1552:
+	b	.L1566
+.L1567:
 	.align	2
-.L1550:
-	.word	.LANCHOR102
+.L1565:
+	.word	.LANCHOR104
 	.word	.LANCHOR10
 	.word	.LANCHOR6
 	.word	.LANCHOR7
 	.word	.LANCHOR14
 	.word	.LANCHOR9
-	.word	.LC80
-	.word	.LANCHOR63
 	.word	.LC81
+	.word	.LANCHOR146
+	.word	.LANCHOR64
 	.word	.LC82
 	.word	.LC83
 	.word	.LC84
-	.word	.LANCHOR144
 	.word	.LC85
-	.word	.LANCHOR145
-.L1551:
-.L1475:
+	.word	.LANCHOR147
+	.word	.LC86
+	.word	.LANCHOR148
+.L1566:
+.L1476:
+	cmp	fp, #0
+	beq	.L1489
+	ldr	r3, .L1568
+	ldr	r1, [r3]
+	ldr	r3, .L1568+4
+	ldrh	r2, [r1, #134]
+	ldrh	r6, [r3]
+	ldr	r3, .L1568+8
+	ldr	r3, [r3]
+	add	r3, r3, r2, lsl #2
+.L1490:
 	cmp	r2, r6
-	bcc	.L1477
+	bcc	.L1492
 	ldrh	r3, [r1, #72]
 	add	r3, r3, fp
 	strh	r3, [r1, #72]	@ movhi
@@ -9120,19 +9399,19 @@ gc_static_wearleveling:
 	itt	cc
 	subcc	r3, r3, fp
 	strhcc	r3, [r1, #98]	@ movhi
-.L1474:
-	cbz	r4, .L1480
-	ldr	r3, .L1553
+.L1489:
+	cbz	r4, .L1495
+	ldr	r3, .L1568
 	ldr	r1, [r3]
-	ldr	r3, .L1553+4
+	ldr	r3, .L1568+4
 	ldrh	r2, [r1, #134]
 	ldrh	ip, [r3]
-	ldr	r3, .L1553+8
+	ldr	r3, .L1568+8
 	ldr	r3, [r3]
 	add	r3, r3, r2, lsl #2
-.L1481:
+.L1496:
 	cmp	r2, ip
-	bcc	.L1483
+	bcc	.L1498
 	ldrh	r3, [r1, #74]
 	add	r3, r3, r4
 	strh	r3, [r1, #74]	@ movhi
@@ -9141,46 +9420,46 @@ gc_static_wearleveling:
 	itt	cc
 	subcc	r4, r3, r4
 	strhcc	r4, [r1, #96]	@ movhi
-.L1480:
+.L1495:
 	movs	r1, #5
 	movs	r0, #0
 	bl	zftl_get_gc_node
 	movw	r2, #65535
 	cmp	r0, r2
-	beq	.L1437
-	ldr	r2, .L1553+12
-	ldr	r3, .L1553+16
+	beq	.L1451
+	ldr	r2, .L1568+12
+	ldr	r3, .L1568+16
 	ldr	r2, [r2]
 	ldrh	r3, [r3]
 	ldrh	r2, [r2, r0, lsl #1]
 	cmp	r2, r3
-	bhi	.L1437
+	bhi	.L1451
 	adds	r7, r7, #1
 	movs	r2, #1
 	movs	r1, #0
 	bl	gc_add_sblk
-.L1437:
+.L1451:
 	add	r0, r7, r8
 	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1449:
-	ldr	r3, .L1553+8
+.L1463:
+	ldr	r3, .L1568+8
 	lsls	r1, r6, #2
 	ldr	r0, [r3]
 	add	ip, r0, r1
 	ldrb	r3, [ip, #2]	@ zero_extendqisi2
 	and	r2, r3, #224
 	cmp	r2, #224
-	beq	.L1439
+	beq	.L1453
 	ubfx	lr, r3, #3, #2
 	tst	lr, #1
-	beq	.L1440
+	beq	.L1454
 	ldrh	r3, [r0, r1]
 	ldr	r2, [r0, r1]
 	ubfx	r3, r3, #0, #11
 	ubfx	r2, r2, #11, #8
-.L1441:
+.L1455:
 	ldr	r7, [sp, #24]
 	cmp	r4, r3
 	add	r10, r7, #1
@@ -9189,12 +9468,12 @@ gc_static_wearleveling:
 	ldr	r7, [sp, #32]
 	add	r7, r7, r3
 	str	r7, [sp, #32]
-	bls	.L1486
-	ldr	r4, .L1553+20
+	bls	.L1501
+	ldr	r4, .L1568+20
 	ldr	r4, [r4]
 	strh	r6, [r4, #586]	@ movhi
 	mov	r4, r3
-.L1486:
+.L1501:
 	ldr	r7, [sp, #16]
 	movw	r10, #65535
 	cmp	r7, r3
@@ -9202,26 +9481,26 @@ gc_static_wearleveling:
 	movcc	r5, r6
 	strcc	r3, [sp, #16]
 	cmp	r2, r10
-	bne	.L1443
-.L1445:
+	bne	.L1457
+.L1459:
 	cmp	r3, #9
-	bls	.L1448
-.L1439:
+	bls	.L1462
+.L1453:
 	adds	r6, r6, #1
 	uxth	r6, r6
-	b	.L1438
-.L1440:
+	b	.L1452
+.L1454:
 	tst	r3, #24
-	bne	.L1442
+	bne	.L1456
 	ldrh	r3, [r0, r1]
 	movw	r2, #65535
 	ubfx	r3, r3, #0, #11
-	b	.L1441
-.L1442:
+	b	.L1455
+.L1456:
 	ldr	r3, [r0, r1]
 	ubfx	r2, r3, #11, #8
 	movw	r3, #65535
-.L1443:
+.L1457:
 	ldr	r7, [sp, #28]
 	cmp	fp, r2
 	it	hi
@@ -9229,7 +9508,7 @@ gc_static_wearleveling:
 	add	r10, r7, #1
 	uxth	r7, r10
 	it	hi
-	ldrhi	r10, .L1553+20
+	ldrhi	r10, .L1568+20
 	str	r7, [sp, #28]
 	it	hi
 	ldrhi	r10, [r10]
@@ -9243,17 +9522,17 @@ gc_static_wearleveling:
 	cmp	r2, #9
 	add	r7, r7, r2
 	str	r7, [sp, #36]
-	bhi	.L1445
-.L1448:
-	ldr	r3, .L1553+24
+	bhi	.L1459
+.L1462:
+	ldr	r3, .L1568+24
 	ldr	r3, [r3]
 	lsls	r7, r3, #23
-	bpl	.L1439
+	bpl	.L1453
 	ldr	r3, [r0, r1]
 	ldrh	r2, [r0, r1]
-	ldr	r1, .L1553+12
+	ldr	r1, .L1568+12
 	ubfx	r3, r3, #11, #8
-	ldr	r0, .L1553+28
+	ldr	r0, .L1568+28
 	ubfx	r2, r2, #0, #11
 	ldr	r1, [r1]
 	ldrh	r1, [r1, r6, lsl #1]
@@ -9266,101 +9545,102 @@ gc_static_wearleveling:
 	str	r1, [sp, #4]
 	mov	r1, r6
 	bl	printf
-	b	.L1439
-.L1452:
-	tst	r3, #224
-	bne	.L1451
+	b	.L1453
+.L1467:
+	cmp	r2, #0
+	bne	.L1466
 	ldr	r3, [r6]
 	movw	r2, #65535
 	ldrh	r10, [r3, #590]
 	cmp	r10, r2
-	bne	.L1451
+	bne	.L1466
 	ldrh	r0, [r3, #586]
 	ldrh	r3, [r3, #588]
 	cmp	r3, r0
-	beq	.L1451
+	beq	.L1466
 	bl	zftl_remove_free_node
 	ldr	r3, [r6]
 	ldrh	r2, [r3, #586]
 	strh	r10, [r3, #586]	@ movhi
 	strh	r2, [r3, #590]	@ movhi
-	b	.L1451
-.L1455:
-	tst	r3, #224
-	bne	.L1454
-	ldr	r10, .L1553+20
+	b	.L1466
+.L1470:
+	and	r3, r3, #248
+	cmp	r3, #16
+	bne	.L1469
+	ldr	r10, .L1568+20
 	movw	r2, #65535
 	ldr	r3, [r10]
 	ldrh	r6, [r3, #588]
 	cmp	r6, r2
-	bne	.L1454
+	bne	.L1469
 	ldrh	r0, [r3, #584]
 	ldrh	r3, [r3, #590]
 	cmp	r3, r0
-	beq	.L1454
+	beq	.L1469
 	bl	zftl_remove_free_node
 	ldr	r3, [r10]
 	ldrh	r2, [r3, #584]
 	strh	r6, [r3, #584]	@ movhi
 	strh	r2, [r3, #588]	@ movhi
-	b	.L1454
-.L1472:
+	b	.L1469
+.L1487:
 	adds	r5, r5, #1
 	uxth	r5, r5
 	cmp	r3, r5
 	it	ls
 	movls	r5, #0
-	ldr	r3, .L1553+8
+	ldr	r3, .L1568+8
 	lsls	r6, r5, #2
 	ldr	r3, [r3]
 	adds	r2, r3, r6
 	ldrb	r2, [r2, #2]	@ zero_extendqisi2
 	tst	r2, #192
-	beq	.L1464
+	beq	.L1479
 	and	r0, r2, #224
 	cmp	r0, #224
-	beq	.L1464
+	beq	.L1479
 	ubfx	r2, r2, #3, #2
 	ands	r1, r2, #1
-	beq	.L1465
+	beq	.L1480
 	cmp	r0, #160
-.L1548:
-	bne	.L1467
-	ldr	r2, .L1553+32
+.L1563:
+	bne	.L1482
+	ldr	r2, .L1568+32
 	ldr	r0, [sp, #20]
 	ldrh	r2, [r2]
 	cmp	r0, r2
-	ble	.L1468
+	ble	.L1483
 	ldr	r2, [r3, r6]
 	ubfx	r2, r2, #11, #8
 	cmp	r2, fp
-	bls	.L1469
-	cbz	r1, .L1468
+	bls	.L1484
+	cbz	r1, .L1483
 	ldrh	r2, [r3, r6]
 	ubfx	r2, r2, #0, #11
 	cmp	r2, r4
-	bgt	.L1468
-.L1469:
+	bgt	.L1483
+.L1484:
 	movs	r2, #1
 	movs	r1, #0
 	mov	r0, r5
 	str	r3, [sp, #24]
 	bl	gc_add_sblk
-	ldr	r0, .L1553+36
+	ldr	r0, .L1568+36
 	movs	r2, #1
 	add	r7, r7, r2
 	ldr	r3, [sp, #24]
-	strh	r2, [r0, #314]	@ movhi
-	ldr	r2, .L1553+24
+	strh	r2, [r0, #570]	@ movhi
+	ldr	r2, .L1568+24
 	ldr	r2, [r2]
 	tst	r2, #1024
-	beq	.L1468
-	ldr	r2, .L1553+12
+	beq	.L1483
+	ldr	r2, .L1568+12
 	ldr	r1, [r3, r6]
 	ldr	r2, [r2]
 	ubfx	r1, r1, #11, #8
 	ldrh	ip, [r2, r5, lsl #1]
-	ldr	r2, .L1553+8
+	ldr	r2, .L1568+8
 	ldr	r2, [r2]
 	add	r2, r2, r6
 	ldrb	r2, [r2, #2]	@ zero_extendqisi2
@@ -9371,77 +9651,77 @@ gc_static_wearleveling:
 	str	r1, [sp, #4]
 	mov	r1, r5
 	ldrh	r3, [r0, #52]
-	ldr	r0, .L1553+40
+	ldr	r0, .L1568+40
 	str	r3, [sp]
 	mov	r3, ip
-.L1549:
+.L1564:
 	bl	printf
-.L1468:
+.L1483:
 	cmp	r7, #4
-	bhi	.L1471
+	bhi	.L1486
 	cmp	r8, #4
-	bhi	.L1471
-.L1464:
+	bhi	.L1486
+.L1479:
 	add	r10, r10, #1
 	uxth	r10, r10
-	b	.L1462
-.L1465:
+	b	.L1477
+.L1480:
 	cmp	r2, #2
-	b	.L1548
-.L1554:
+	b	.L1563
+.L1569:
 	.align	2
-.L1553:
-	.word	.LANCHOR102
+.L1568:
+	.word	.LANCHOR104
 	.word	.LANCHOR6
 	.word	.LANCHOR7
 	.word	.LANCHOR9
-	.word	.LANCHOR85
+	.word	.LANCHOR87
 	.word	.LANCHOR10
 	.word	.LANCHOR14
-	.word	.LC79
-	.word	.LANCHOR144
-	.word	.LANCHOR63
-	.word	.LC86
-.L1467:
-	ldr	r0, .L1555
+	.word	.LC80
+	.word	.LANCHOR147
+	.word	.LANCHOR64
+	.word	.LC87
+.L1482:
+	ldr	r0, .L1570
 	ldr	r2, [sp, #16]
 	ldrh	r0, [r0]
 	subs	r2, r2, r4
 	cmp	r2, r0
-	ble	.L1468
+	ble	.L1483
 	ldrh	r2, [r3, r6]
 	add	r0, r4, #8
 	ubfx	r2, r2, #0, #11
 	cmp	r2, r0
-	ble	.L1470
+	ble	.L1485
 	cmp	r1, #0
-	beq	.L1468
+	beq	.L1483
 	ldr	r2, [r3, r6]
 	add	r1, fp, #4
 	ubfx	r2, r2, #11, #8
 	cmp	r2, r1
-	bgt	.L1468
-.L1470:
+	bgt	.L1483
+.L1485:
 	movs	r2, #1
 	movs	r1, #0
 	mov	r0, r5
 	str	r3, [sp, #24]
 	bl	gc_add_sblk
-	ldr	r0, .L1555+4
+	ldr	r0, .L1570+4
 	movs	r2, #1
 	add	r8, r8, r2
 	ldr	r3, [sp, #24]
-	strh	r2, [r0, #314]	@ movhi
-	ldr	r2, .L1555+8
+	strh	r2, [r0, #570]	@ movhi
+	ldr	r2, .L1570+8
 	ldr	r2, [r2]
 	tst	r2, #1024
-	beq	.L1468
-	ldr	r2, .L1555+12
+	beq	.L1483
+	ldr	r2, .L1570+12
 	ldr	r1, [r3, r6]
 	ldr	r2, [r2]
 	ubfx	r1, r1, #11, #8
 	ldrh	ip, [r2, r5, lsl #1]
-	ldr	r2, .L1555+16
+	ldr	r2, .L1570+16
 	ldr	r2, [r2]
 	add	r2, r2, r6
 	ldrb	r2, [r2, #2]	@ zero_extendqisi2
@@ -9452,35 +9732,35 @@ gc_static_wearleveling:
 	str	r1, [sp, #4]
 	mov	r1, r5
 	ldrh	r3, [r0, #52]
-	ldr	r0, .L1555+20
+	ldr	r0, .L1570+20
 	str	r3, [sp]
 	mov	r3, ip
-	b	.L1549
-.L1488:
+	b	.L1564
+.L1503:
 	mov	r8, #0
 	mov	r7, r8
-	b	.L1461
-.L1477:
+	b	.L1476
+.L1492:
 	ldr	r0, [r3]
 	ubfx	r5, r0, #11, #8
 	cmp	fp, r5
-	bhi	.L1476
+	bhi	.L1491
 	ldrb	ip, [r3, #2]	@ zero_extendqisi2
 	tst	ip, #24
 	ittt	ne
 	subne	r5, r5, fp
 	bfine	r0, r5, #11, #8
 	strne	r0, [r3]
-.L1476:
+.L1491:
 	adds	r2, r2, #1
 	adds	r3, r3, #4
 	uxth	r2, r2
-	b	.L1475
-.L1483:
+	b	.L1490
+.L1498:
 	ldrh	r0, [r3]
 	ubfx	r5, r0, #0, #11
 	cmp	r5, r4
-	blt	.L1482
+	blt	.L1497
 	ldrb	r6, [r3, #2]	@ zero_extendqisi2
 	and	r6, r6, #24
 	cmp	r6, #16
@@ -9488,24 +9768,24 @@ gc_static_wearleveling:
 	subne	r5, r5, r4
 	bfine	r0, r5, #0, #11
 	strhne	r0, [r3]	@ movhi
-.L1482:
+.L1497:
 	adds	r2, r2, #1
 	adds	r3, r3, #4
 	uxth	r2, r2
-	b	.L1481
-.L1487:
+	b	.L1496
+.L1502:
 	mov	r8, #0
 	mov	r7, r8
-	b	.L1437
-.L1556:
+	b	.L1451
+.L1571:
 	.align	2
-.L1555:
-	.word	.LANCHOR145
-	.word	.LANCHOR63
+.L1570:
+	.word	.LANCHOR148
+	.word	.LANCHOR64
 	.word	.LANCHOR14
 	.word	.LANCHOR9
 	.word	.LANCHOR7
-	.word	.LC87
+	.word	.LC88
 	.size	gc_static_wearleveling, .-gc_static_wearleveling
 	.section	.text.zftl_sblk_list_init,"ax",%progbits
 	.align	1
@@ -9520,69 +9800,69 @@ zftl_sblk_list_init:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r2, #6
-	ldr	r8, .L1585+76
+	ldr	r8, .L1600+76
 	sub	sp, sp, #24
 	movs	r1, #0
 	movs	r4, #0
-	ldr	fp, .L1585+80
+	ldr	fp, .L1600+80
 	ldrh	r3, [r8]
-	ldr	r5, .L1585
+	ldr	r5, .L1600
 	ldr	r0, [fp]
-	ldr	r10, .L1585+64
+	ldr	r10, .L1600+64
 	muls	r2, r3, r2
-	ldr	r7, .L1585+4
-	ldr	r6, .L1585+8
+	ldr	r7, .L1600+4
+	ldr	r6, .L1600+8
 	bl	ftl_memset
-	ldr	r3, .L1585+12
+	ldr	r3, .L1600+12
 	movs	r2, #16
-	ldr	r1, .L1585+16
+	ldr	r1, .L1600+16
 	mov	r0, #32768
 	strh	r4, [r10]	@ movhi
 	str	r4, [r3]
-	ldr	r3, .L1585+20
+	ldr	r3, .L1600+20
 	ldrh	r1, [r1]
 	strh	r4, [r7]	@ movhi
 	str	r4, [r3]
-	ldr	r3, .L1585+24
+	ldr	r3, .L1600+24
 	strh	r4, [r6]	@ movhi
 	str	r4, [r3]
-	ldr	r3, .L1585+28
+	ldr	r3, .L1600+28
 	str	r4, [r3]
-	ldr	r3, .L1585+32
+	ldr	r3, .L1600+32
 	str	r4, [r3]
-	ldr	r3, .L1585+36
+	ldr	r3, .L1600+36
 	str	r4, [r3]
-	ldr	r3, .L1585+40
+	ldr	r3, .L1600+40
 	strh	r2, [r3]	@ movhi
-	ldr	r2, .L1585+44
-	ldr	r3, .L1585+48
+	ldr	r2, .L1600+44
+	ldr	r3, .L1600+48
 	strh	r4, [r2]	@ movhi
-	ldr	r2, .L1585+52
+	ldr	r2, .L1600+52
 	strh	r4, [r3]	@ movhi
 	str	r3, [sp, #4]
 	strh	r4, [r2]	@ movhi
 	ldrb	r2, [r5]	@ zero_extendqisi2
 	muls	r1, r2, r1
 	bl	__aeabi_idiv
-	ldr	r2, .L1585+56
+	ldr	r2, .L1600+56
 	sxth	r3, r0
 	str	fp, [sp, #12]
 	mov	fp, r10
 	str	r3, [sp]
 	ldr	r1, [r2]
 	ldr	r3, [sp, #4]
-	ldr	r10, .L1585+84
+	ldr	r10, .L1600+84
 	strh	r4, [r1, #146]	@ movhi
 	ldrsh	r4, [r1, #134]
 	str	r8, [sp, #8]
 	mov	r8, r3
 	str	r2, [sp, #16]
 	str	r5, [sp, #20]
-.L1558:
+.L1573:
 	ldr	r3, [sp, #8]
 	ldrh	r3, [r3]
 	cmp	r4, r3
-	blt	.L1574
+	blt	.L1589
 	ldr	r3, [sp, #16]
 	ldrh	r2, [r8]
 	ldr	r3, [r3]
@@ -9593,40 +9873,40 @@ zftl_sblk_list_init:
 	strh	r2, [r3, #116]	@ movhi
 	ldrh	r2, [fp]
 	strh	r2, [r3, #122]	@ movhi
-	ldr	r2, .L1585+44
+	ldr	r2, .L1600+44
 	ldrh	r2, [r2]
 	strh	r2, [r3, #120]	@ movhi
-	ldr	r2, .L1585+52
+	ldr	r2, .L1600+52
 	ldrh	r2, [r2]
 	strh	r2, [r3, #124]	@ movhi
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1574:
+.L1589:
 	ldr	r5, [r10]
 	add	r5, r5, r4, lsl #2
 	ldrb	r0, [r5, #3]	@ zero_extendqisi2
 	cmp	r0, #0
-	beq	.L1575
+	beq	.L1590
 	ldr	r3, [sp, #20]
 	ldrb	lr, [r3]	@ zero_extendqisi2
-	ldr	r3, .L1585+56
+	ldr	r3, .L1600+56
 	ldr	ip, [r3]
-	ldr	r3, .L1585+16
+	ldr	r3, .L1600+16
 	ldrh	r3, [r3]
 	str	r3, [sp, #4]
 	movs	r3, #0
 	mov	r1, r3
-.L1560:
+.L1575:
 	cmp	r3, lr
-	blt	.L1563
+	blt	.L1578
 	cmp	r1, #0
-	beq	.L1564
+	beq	.L1579
 	mov	r0, #32768
 	bl	__aeabi_idiv
 	adds	r1, r0, #1
 	sxth	r1, r1
-.L1559:
+.L1574:
 	ldr	r3, [sp, #12]
 	lsls	r0, r4, #1
 	adds	r2, r0, r4
@@ -9639,32 +9919,32 @@ zftl_sblk_list_init:
 	ldrb	r1, [r5, #2]	@ zero_extendqisi2
 	and	r3, r1, #224
 	cmp	r3, #32
-	beq	.L1565
+	beq	.L1580
 	cmp	r3, #224
-	beq	.L1565
-	ldr	r2, .L1585+60
+	beq	.L1580
+	ldr	r2, .L1600+60
 	ldr	r2, [r2]
 	ldrh	ip, [r2, #16]
 	cmp	r4, ip
-	beq	.L1565
+	beq	.L1580
 	ldrh	ip, [r2, #48]
 	cmp	r4, ip
-	beq	.L1565
+	beq	.L1580
 	ldrh	r2, [r2, #80]
 	cmp	r4, r2
-	beq	.L1565
+	beq	.L1580
 	cmp	r3, #64
-	bne	.L1566
-	ldr	r2, .L1585+64
+	bne	.L1581
+	ldr	r2, .L1600+64
 	uxth	r1, r4
-	ldr	r0, .L1585+32
-.L1583:
+	ldr	r0, .L1600+32
+.L1598:
 	bl	_insert_data_list
-.L1565:
+.L1580:
 	adds	r4, r4, #1
 	sxth	r4, r4
-	b	.L1558
-.L1563:
+	b	.L1573
+.L1578:
 	asr	r2, r0, r3
 	adds	r3, r3, #1
 	lsls	r2, r2, #31
@@ -9676,42 +9956,42 @@ zftl_sblk_list_init:
 	ite	mi
 	strhmi	r2, [ip, #146]	@ movhi
 	sxthpl	r1, r1
-	b	.L1560
-.L1564:
+	b	.L1575
+.L1579:
 	ldrb	r3, [r5, #2]	@ zero_extendqisi2
 	movw	r2, #65535
 	orr	r3, r3, #224
 	strb	r3, [r5, #2]
-	ldr	r3, .L1585+68
+	ldr	r3, .L1600+68
 	ldr	r3, [r3]
 	strh	r2, [r3, r4, lsl #1]	@ movhi
-	b	.L1559
-.L1575:
+	b	.L1574
+.L1590:
 	ldr	r1, [sp]
-	b	.L1559
-.L1566:
+	b	.L1574
+.L1581:
 	cmp	r3, #96
-	bne	.L1567
-	ldr	r2, .L1585+52
+	bne	.L1582
+	ldr	r2, .L1600+52
 	uxth	r1, r4
-	ldr	r0, .L1585+28
-	b	.L1583
-.L1567:
+	ldr	r0, .L1600+28
+	b	.L1598
+.L1582:
 	cmp	r3, #160
-	bne	.L1568
-	ldr	r2, .L1585+44
+	bne	.L1583
+	ldr	r2, .L1600+44
 	uxth	r1, r4
-	ldr	r0, .L1585+36
-	b	.L1583
-.L1568:
+	ldr	r0, .L1600+36
+	b	.L1598
+.L1583:
 	cmp	r3, #0
-	bne	.L1565
-	ldr	r3, .L1585+68
+	bne	.L1580
+	ldr	r3, .L1600+68
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r0]
-	cbz	r2, .L1569
+	cbz	r2, .L1584
 	mov	r1, r4
-	ldr	r0, .L1585+72
+	ldr	r0, .L1600+72
 	bl	printf
 	ldrb	r3, [r5, #2]	@ zero_extendqisi2
 	movs	r1, #1
@@ -9724,130 +10004,50 @@ zftl_sblk_list_init:
 	movs	r2, #0
 	strb	r3, [r5, #2]
 	bl	gc_add_sblk
-	b	.L1565
-.L1569:
+	b	.L1580
+.L1584:
 	ands	r3, r1, #24
 	uxth	r1, r4
-	bne	.L1572
-	ldr	r2, .L1585+48
-	ldr	r0, .L1585+12
-.L1584:
+	bne	.L1587
+	ldr	r2, .L1600+48
+	ldr	r0, .L1600+12
+.L1599:
 	bl	_insert_free_list
-	b	.L1565
-.L1572:
+	b	.L1580
+.L1587:
 	cmp	r3, #16
 	ittee	eq
-	ldreq	r2, .L1585+4
-	ldreq	r0, .L1585+20
-	ldrne	r2, .L1585+8
-	ldrne	r0, .L1585+24
-	b	.L1584
-.L1586:
-	.align	2
-.L1585:
-	.word	.LANCHOR78
-	.word	.LANCHOR97
+	ldreq	r2, .L1600+4
+	ldreq	r0, .L1600+20
+	ldrne	r2, .L1600+8
+	ldrne	r0, .L1600+24
+	b	.L1599
+.L1601:
+	.align	2
+.L1600:
+	.word	.LANCHOR80
 	.word	.LANCHOR99
-	.word	.LANCHOR96
-	.word	.LANCHOR77
+	.word	.LANCHOR101
 	.word	.LANCHOR98
+	.word	.LANCHOR79
 	.word	.LANCHOR100
-	.word	.LANCHOR81
-	.word	.LANCHOR12
-	.word	.LANCHOR80
-	.word	.LANCHOR101
-	.word	.LANCHOR92
-	.word	.LANCHOR95
-	.word	.LANCHOR88
 	.word	.LANCHOR102
-	.word	.LANCHOR10
+	.word	.LANCHOR83
+	.word	.LANCHOR12
+	.word	.LANCHOR82
+	.word	.LANCHOR103
+	.word	.LANCHOR94
+	.word	.LANCHOR97
 	.word	.LANCHOR90
+	.word	.LANCHOR104
+	.word	.LANCHOR10
+	.word	.LANCHOR92
 	.word	.LANCHOR9
-	.word	.LC88
+	.word	.LC89
 	.word	.LANCHOR6
 	.word	.LANCHOR4
 	.word	.LANCHOR7
 	.size	zftl_sblk_list_init, .-zftl_sblk_list_init
-	.section	.text.ftl_open_sblk_init,"ax",%progbits
-	.align	1
-	.global	ftl_open_sblk_init
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_open_sblk_init, %function
-ftl_open_sblk_init:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	mov	r4, r0
-	ldr	r8, .L1593+12
-	mov	r6, r1
-	movs	r7, #0
-.L1588:
-.L1591:
-	mov	r0, r6
-	ldr	r10, .L1593+16
-	bl	ftl_alloc_sblk
-	movs	r1, #0
-	mov	r5, r0
-	bl	ftl_erase_sblk
-	add	r1, r4, #16
-	mov	r0, r5
-	bl	ftl_get_blk_list_in_sblk
-	ldr	r1, .L1593
-	cmp	r6, #2
-	ldrh	r2, [r8]
-	uxtb	r0, r0
-	strh	r5, [r4]	@ movhi
-	ite	eq
-	moveq	r3, #0
-	ldrbne	r3, [r1]	@ zero_extendqisi2
-	ldrb	r1, [r1]	@ zero_extendqisi2
-	strb	r0, [r4, #9]
-	smulbb	r0, r0, r2
-	strh	r7, [r4, #2]	@ movhi
-	it	ne
-	smulbbne	r3, r3, r2
-	strb	r7, [r4, #5]
-	mul	r2, r2, r1
-	ldr	r1, .L1593+4
-	strh	r0, [r4, #6]	@ movhi
-	it	ne
-	uxthne	r3, r3
-	strh	r7, [r4, #10]	@ movhi
-	ldr	r0, [r1]
-	movs	r1, #255
-	strh	r3, [r4, #12]	@ movhi
-	lsls	r2, r2, #2
-	strb	r6, [r4, #4]
-	add	r0, r0, r3, lsl #2
-	bl	ftl_memset
-	ldr	r3, [r10]
-	ldrh	r2, [r4, #6]
-	strh	r2, [r3, r5, lsl #1]	@ movhi
-	ldrb	r3, [r4, #9]	@ zero_extendqisi2
-	cbnz	r3, .L1587
-	mov	r1, r5
-	ldr	r0, .L1593+8
-	bl	printf
-	ldr	r3, [r10]
-	movw	r2, #65535
-	strh	r2, [r3, r5, lsl #1]	@ movhi
-	movs	r3, #7
-	strb	r3, [r4, #4]
-	b	.L1591
-.L1587:
-	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L1594:
-	.align	2
-.L1593:
-	.word	.LANCHOR78
-	.word	.LANCHOR109
-	.word	.LC76
-	.word	.LANCHOR85
-	.word	.LANCHOR9
-	.size	ftl_open_sblk_init, .-ftl_open_sblk_init
 	.section	.text.pm_free_sblk,"ax",%progbits
 	.align	1
 	.global	pm_free_sblk
@@ -9857,173 +10057,221 @@ ftl_open_sblk_init:
 	.fpu softvfp
 	.type	pm_free_sblk, %function
 pm_free_sblk:
-	@ args = 0, pretend = 0, frame = 280
+	@ args = 0, pretend = 0, frame = 272
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1613
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #288
-	ldrh	r2, [r3]
-	str	r3, [sp, #12]
+	sub	sp, sp, #280
+	ldr	r5, .L1627
+	ldrh	r2, [r5]
 	cmp	r2, #128
-	bls	.L1596
-	movs	r2, #78
-	ldr	r1, .L1613+4
-	ldr	r0, .L1613+8
+	bls	.L1603
+	movs	r2, #84
+	ldr	r1, .L1627+4
+	ldr	r0, .L1627+8
 	bl	printf
-.L1596:
+.L1603:
+	ldr	r4, .L1627+12
+	movs	r2, #0
+	ldrh	r5, [r5]
+	mov	r3, r2
+	movw	r6, #65535
+	ldr	r1, [r4]
+	ldrh	r0, [r1, #688]
+	add	r1, r1, #416
+.L1606:
+	ldrh	r7, [r1], #2
+	cmp	r7, r6
+	itt	ne
+	addne	r2, r2, #1
+	uxthne	r2, r2
+	cmp	r2, r0
+	bcs	.L1605
+	cmp	r2, r5
+	bcs	.L1605
+	adds	r3, r3, #1
+	uxth	r3, r3
+	cmp	r3, #128
+	bne	.L1606
+.L1605:
+	adds	r3, r3, #1
 	mov	r2, #256
+	uxth	r3, r3
 	movs	r1, #0
-	add	r0, sp, #32
-	movs	r4, #1
+	add	r0, sp, #24
+	cmp	r3, #129
+	mov	r5, #1
+	it	eq
+	moveq	r3, #128
+	movs	r6, #0
+	str	r3, [sp, #8]
+	add	fp, sp, #24
 	bl	ftl_memset
-	ldr	r3, .L1613+12
-	add	r10, sp, #32
-	ldr	r0, .L1613+16
-	ldr	r5, [sp, #12]
-	ldrh	r7, [r3]
-	ldr	r6, [r0]
-	mov	fp, r0
-	ldr	r1, .L1613+20
-	rsb	r3, r7, #21
-	ldrh	r5, [r5]
-	lsls	r4, r4, r3
-	ldrh	r2, [r6, #698]
-	ldrb	r3, [r1]	@ zero_extendqisi2
-	add	r8, r6, #704
-	str	r5, [sp, #16]
-	subs	r4, r4, #1
-	movs	r5, #0
-	str	r1, [sp, #20]
-.L1597:
-	uxth	r1, r5
-	cmp	r2, r1
-	bhi	.L1601
-	ldr	r3, .L1613+24
+	ldr	r2, .L1627+16
+	ldr	r7, [r4]
+	ldrh	r8, [r2]
+	ldr	r2, .L1627+20
+	add	r10, r7, #704
+	ldrh	r3, [r7, #698]
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	rsb	r2, r2, #24
+	sub	r2, r2, r8
+	lsls	r5, r5, r2
+	ldr	r2, .L1627+24
+	subs	r5, r5, #1
+	ldrb	r2, [r2]	@ zero_extendqisi2
+.L1608:
+	uxth	r1, r6
+	cmp	r3, r1
+	bhi	.L1611
+	ldr	r3, .L1627+28
 	movs	r5, #0
-	ldr	r6, .L1613+28
-	str	r5, [sp, #8]
-	ldrb	r4, [r3]	@ zero_extendqisi2
-	ldrh	r2, [r6]
-	str	r3, [sp, #16]
-	smulbb	r4, r4, r2
-	uxth	r4, r4
-.L1602:
-	ldr	r3, [sp, #12]
-	uxth	r2, r5
-	ldrh	r3, [r3]
+	ldr	r2, .L1627+32
+	movw	r10, #65535
+	mov	r8, r5
+	ldrb	r6, [r3]	@ zero_extendqisi2
+	ldrh	r2, [r2]
+	str	r3, [sp, #12]
+	smulbb	r6, r6, r2
+	uxth	r6, r6
+.L1617:
+	ldr	r2, [r4]
+	add	r7, r5, #208
+	uxth	fp, r5
+	ldrh	r3, [r2, r7, lsl #1]
+	ldrh	r0, [r2, #692]
+	str	r2, [sp, #16]
+	str	r3, [sp, #20]
+	ldr	r3, .L1627+24
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	bl	__aeabi_idiv
+	ldr	r3, [sp, #20]
+	ldr	r2, [sp, #16]
+	cmp	r0, r3
+	bne	.L1612
+	ldr	r1, [sp, #12]
+	ldr	r0, .L1627+32
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	ldrh	r0, [r0]
+	smulbb	r1, r1, r0
+	add	r0, sp, #24
+	strh	r1, [r0, r5, lsl #1]	@ movhi
+.L1612:
+	add	r1, sp, #24
+	ldrh	r1, [r1, r5, lsl #1]
+	cmp	r1, r6
+	bcs	.L1613
+	cmp	r1, #0
+	itt	ne
+	movne	r8, fp
+	movne	r6, r1
+.L1613:
+	ldrh	r0, [r2, #74]
+	cmp	r0, #2
+	bls	.L1614
+	movw	r0, #65535
+	cmp	r3, r0
+	beq	.L1614
+	ldr	r0, .L1627+36
+	ldrh	r2, [r2, #92]
+	ldr	r0, [r0]
+	adds	r2, r2, #4
+	ldrh	r0, [r0, r3, lsl #2]
+	ubfx	r0, r0, #0, #11
+	cmp	r0, r2
+	bgt	.L1614
+	mov	r10, fp
+	str	r0, [sp]
+	mov	r2, r1
+	ldr	r0, .L1627+40
+	mov	r1, r5
+	bl	printf
+.L1614:
+	add	r3, sp, #24
+	ldrh	r2, [r3, r5, lsl #1]
+	cbnz	r2, .L1615
+	ldr	r1, [r4]
+	movw	r0, #65535
+	ldrh	r3, [r1, r7, lsl #1]
+	cmp	r3, r0
+	beq	.L1615
+	ldr	r0, .L1627+44
+	ldr	r0, [r0]
+	lsls	r0, r0, #19
+	bpl	.L1616
+	ldrh	r1, [r1, #688]
+	ldr	r0, .L1627+48
+	str	r1, [sp]
+	mov	r1, r5
+	bl	printf
+.L1616:
+	ldr	r3, [r4]
+	ldrh	r0, [r3, r7, lsl #1]
+	bl	ftl_free_sblk
+	ldr	r3, [r4]
+	movw	r2, #65535
+	strh	r2, [r3, r7, lsl #1]	@ movhi
+	ldrh	r2, [r3, #688]
+	subs	r2, r2, #1
+	strh	r2, [r3, #688]	@ movhi
+.L1615:
+	adds	r5, r5, #1
+	ldr	r2, [sp, #8]
+	uxth	r3, r5
 	cmp	r3, r2
-	bhi	.L1608
-	ldr	r0, [sp, #8]
-	add	sp, sp, #288
+	bcc	.L1617
+	movw	r0, #65535
+	cmp	r10, r0
+	ite	ne
+	movne	r0, r10
+	moveq	r0, r8
+	add	sp, sp, #280
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1601:
-	ldr	r0, [r8], #4
-	mov	r1, r3
-	str	r2, [sp, #28]
-	str	r3, [sp, #24]
-	lsrs	r0, r0, r7
-	ands	r0, r0, r4
+.L1611:
+	ldr	r0, [r10], #4
+	mov	r1, r2
+	str	r3, [sp, #20]
+	str	r2, [sp, #16]
+	lsr	r0, r0, r8
+	ands	r0, r0, r5
 	bl	__aeabi_uidiv
 	uxth	r3, r0
-	ldr	r2, [sp, #28]
-	add	lr, r6, #416
-	str	r3, [sp, #8]
+	ldr	r2, [sp, #16]
+	add	lr, r7, #416
+	str	r3, [sp, #12]
 	movs	r1, #0
-	ldr	r3, [sp, #24]
-.L1598:
-	ldr	r0, [sp, #16]
-	uxth	ip, r1
-	cmp	r0, ip
-	bhi	.L1600
-	adds	r5, r5, #1
-	b	.L1597
-.L1600:
+	ldr	r3, [sp, #20]
+.L1610:
 	ldrh	ip, [lr], #2
-	ldr	r0, [sp, #8]
+	ldr	r0, [sp, #12]
 	cmp	r0, ip
+	ldr	r0, [sp, #8]
 	ittt	eq
-	ldrheq	ip, [r10, r1, lsl #1]
+	ldrheq	ip, [fp, r1, lsl #1]
 	addeq	ip, ip, #1
-	strheq	ip, [r10, r1, lsl #1]	@ movhi
+	strheq	ip, [fp, r1, lsl #1]	@ movhi
 	adds	r1, r1, #1
-	b	.L1598
-.L1608:
-	ldr	r3, [fp]
-	uxth	r7, r5
-	str	r2, [sp, #28]
-	add	r8, r7, #208
-	ldr	r2, [sp, #20]
-	ldrh	r10, [r3, r8, lsl #1]
-	ldrh	r0, [r3, #692]
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	str	r3, [sp, #24]
-	bl	__aeabi_idiv
-	cmp	r0, r10
-	ldr	r3, [sp, #24]
-	ldr	r2, [sp, #28]
-	bne	.L1603
-	ldr	r1, [sp, #16]
-	ldrh	r0, [r6]
-	ldrb	r1, [r1]	@ zero_extendqisi2
-	smulbb	r1, r1, r0
-	add	r0, sp, #32
-	strh	r1, [r0, r7, lsl #1]	@ movhi
-.L1603:
-	add	r1, sp, #32
-	ldrh	r1, [r1, r7, lsl #1]
-	cmp	r4, r1
-	bls	.L1604
-	cbnz	r1, .L1609
-.L1606:
-	movw	r2, #65535
-	cmp	r10, r2
-	beq	.L1605
-	ldr	r2, .L1613+32
-	ldr	r2, [r2]
-	lsls	r2, r2, #19
-	bpl	.L1607
-	ldrh	r3, [r3, #688]
-	movs	r2, #0
-	mov	r1, r7
-	ldr	r0, .L1613+36
-	str	r3, [sp]
-	mov	r3, r10
-	bl	printf
-.L1607:
-	ldr	r3, [fp]
-	ldrh	r0, [r3, r8, lsl #1]
-	bl	ftl_free_sblk
-	ldr	r3, [fp]
-	movw	r2, #65535
-	strh	r2, [r3, r8, lsl #1]	@ movhi
-	ldrh	r2, [r3, #688]
-	subs	r2, r2, #1
-	strh	r2, [r3, #688]	@ movhi
-	b	.L1605
-.L1604:
-	cmp	r1, #0
-	beq	.L1606
-.L1605:
-	adds	r5, r5, #1
-	b	.L1602
-.L1609:
-	str	r2, [sp, #8]
-	mov	r4, r1
-	b	.L1605
-.L1614:
+	uxth	ip, r1
+	cmp	r0, ip
+	bhi	.L1610
+	adds	r6, r6, #1
+	b	.L1608
+.L1628:
 	.align	2
-.L1613:
-	.word	.LANCHOR146
-	.word	.LANCHOR147
+.L1627:
+	.word	.LANCHOR149
+	.word	.LANCHOR150
 	.word	.LC0
-	.word	.LANCHOR66
-	.word	.LANCHOR102
-	.word	.LANCHOR67
-	.word	.LANCHOR78
-	.word	.LANCHOR85
+	.word	.LANCHOR104
+	.word	.LANCHOR68
+	.word	.LANCHOR31
+	.word	.LANCHOR69
+	.word	.LANCHOR80
+	.word	.LANCHOR87
+	.word	.LANCHOR7
+	.word	.LC90
 	.word	.LANCHOR14
-	.word	.LC89
+	.word	.LC91
 	.size	pm_free_sblk, .-pm_free_sblk
 	.section	.text.ftl_memcpy,"ax",%progbits
 	.align	1
@@ -10050,25 +10298,25 @@ ftl_memcpy:
 flash_info_data_init:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1621
+	ldr	r3, .L1635
 	push	{r4, lr}
 	ldr	r3, [r3]
 	lsls	r3, r3, #19
-	bpl	.L1617
-	ldr	r2, .L1621+4
+	bpl	.L1631
+	ldr	r2, .L1635+4
 	movs	r1, #105
-	ldr	r0, .L1621+8
+	ldr	r0, .L1635+8
 	bl	printf
-.L1617:
-	ldr	r4, .L1621+12
+.L1631:
+	ldr	r4, .L1635+12
 	mov	r2, #2048
 	movs	r1, #0
 	ldr	r0, [r4]
 	bl	ftl_memset
 	ldr	r0, [r4]
 	movs	r2, #32
-	ldr	r3, .L1621+16
-	ldr	r1, .L1621+20
+	ldr	r3, .L1635+16
+	ldr	r1, .L1635+20
 	adds	r0, r0, #80
 	str	r3, [r0, #-80]
 	mov	r3, #2032
@@ -10078,20 +10326,20 @@ flash_info_data_init:
 	bl	ftl_memcpy
 	ldr	r0, [r4]
 	movs	r2, #32
-	ldr	r1, .L1621+24
+	ldr	r1, .L1635+24
 	pop	{r4, lr}
 	adds	r0, r0, #48
 	b	ftl_memcpy
-.L1622:
+.L1636:
 	.align	2
-.L1621:
+.L1635:
 	.word	.LANCHOR14
-	.word	.LANCHOR148
-	.word	.LC90
+	.word	.LANCHOR151
+	.word	.LC92
 	.word	.LANCHOR27
 	.word	1398362953
 	.word	.LANCHOR20
-	.word	.LANCHOR31
+	.word	.LANCHOR32
 	.size	flash_info_data_init, .-flash_info_data_init
 	.section	.text.ftl_memcpy32,"ax",%progbits
 	.align	1
@@ -10106,15 +10354,15 @@ ftl_memcpy32:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	movs	r3, #0
 	push	{r4, lr}
-.L1624:
+.L1638:
 	cmp	r3, r2
-	bne	.L1625
+	bne	.L1639
 	pop	{r4, pc}
-.L1625:
+.L1639:
 	ldr	r4, [r1, r3, lsl #2]
 	str	r4, [r0, r3, lsl #2]
 	adds	r3, r3, #1
-	b	.L1624
+	b	.L1638
 	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.ftl_memcmp,"ax",%progbits
 	.align	1
@@ -10142,11 +10390,11 @@ rknand_get_clk_rate:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r0, .L1628
+	ldr	r0, .L1642
 	bx	lr
-.L1629:
+.L1643:
 	.align	2
-.L1628:
+.L1642:
 	.word	148000000
 	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
 	.section	.text.ftl_malloc,"ax",%progbits
@@ -10177,40 +10425,40 @@ nandc_init:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, lr}
 	movs	r3, #0
-	ldr	r6, .L1650
+	ldr	r6, .L1664
 	sub	sp, sp, #20
 	mov	r4, r0
 	str	r3, [sp, #12]
 	ldr	r3, [r6]
 	lsls	r0, r3, #19
-	bpl	.L1632
+	bpl	.L1646
 	mov	r2, r4
-	ldr	r1, .L1650+4
-	ldr	r0, .L1650+8
+	ldr	r1, .L1664+4
+	ldr	r0, .L1664+8
 	bl	printf
-.L1632:
+.L1646:
 	ldr	r1, [r4, #352]
 	movs	r3, #6
-	ldr	r2, .L1650+12
-	ldr	r5, .L1650+16
-	ldr	r7, .L1650+20
+	ldr	r2, .L1664+12
+	ldr	r5, .L1664+16
+	ldr	r7, .L1664+20
 	cmp	r1, r2
 	ldr	r2, [r4, #128]
 	strb	r3, [r5]
 	itt	eq
 	moveq	r3, #8
 	strbeq	r3, [r5]
-	ldr	r3, .L1650+24
+	ldr	r3, .L1664+24
 	str	r4, [r7]
 	cmp	r2, r3
-	ldr	r2, .L1650+28
+	ldr	r2, .L1664+28
 	itt	eq
 	moveq	r3, #9
 	strbeq	r3, [r5]
 	ldrb	r3, [r5]	@ zero_extendqisi2
 	cmp	r3, #9
-	ldr	r3, .L1650+32
-	bne	.L1635
+	ldr	r3, .L1664+32
+	bne	.L1649
 	movs	r1, #1
 	strb	r1, [r3]
 	movs	r1, #2
@@ -10235,36 +10483,36 @@ nandc_init:
 	str	r3, [r4, #84]
 	ldr	r3, [r6]
 	lsls	r1, r3, #19
-	bpl	.L1637
+	bpl	.L1651
 	ldr	r1, [r4]
 	ldr	r2, [r4, #8]
 	ldr	r3, [r4, #80]
 	ldr	r0, [r4, #84]
 	ldr	r4, [r4, #88]
 	stm	sp, {r0, r4}
-.L1649:
-	ldr	r0, .L1650+36
+.L1663:
+	ldr	r0, .L1664+36
 	bl	printf
-.L1637:
-	ldr	r3, .L1650+40
+.L1651:
+	ldr	r3, .L1664+40
 	movs	r2, #1
 	strb	r2, [r3]
 	movs	r3, #0
-	ldr	r2, .L1650+44
+	ldr	r2, .L1664+44
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L1650+48
+	ldr	r2, .L1664+48
 	strb	r3, [r2]
 	ldr	r3, [r6]
 	lsls	r3, r3, #19
-	bpl	.L1631
+	bpl	.L1645
 	ldrb	r1, [r5]	@ zero_extendqisi2
-	ldr	r0, .L1650+52
+	ldr	r0, .L1664+52
 	bl	printf
-.L1631:
+.L1645:
 	add	sp, sp, #20
 	@ sp needed
 	pop	{r4, r5, r6, r7, pc}
-.L1635:
+.L1649:
 	movs	r1, #0
 	movs	r0, #1
 	strb	r1, [r3]
@@ -10288,11 +10536,11 @@ nandc_init:
 	movs	r3, #39
 	str	r3, [r4, #308]
 	bl	ftl_malloc
-	ldr	r3, .L1650+56
+	ldr	r3, .L1664+56
 	str	r0, [r3]
 	ldr	r3, [r6]
 	lsls	r2, r3, #19
-	bpl	.L1637
+	bpl	.L1651
 	ldr	r0, [r7]
 	ldr	r1, [r0]
 	ldr	r2, [r0, #344]
@@ -10301,44 +10549,44 @@ nandc_init:
 	ldr	r0, [r0, #312]
 	str	r4, [sp]
 	str	r0, [sp, #4]
-	b	.L1649
-.L1651:
+	b	.L1663
+.L1665:
 	.align	2
-.L1650:
+.L1664:
 	.word	.LANCHOR14
-	.word	.LANCHOR149
-	.word	.LC91
+	.word	.LANCHOR152
+	.word	.LC93
 	.word	1446522928
 	.word	.LANCHOR28
 	.word	.LANCHOR13
 	.word	1446588464
 	.word	1052675
-	.word	.LANCHOR45
-	.word	.LC92
-	.word	.LANCHOR46
-	.word	.LANCHOR48
-	.word	.LANCHOR44
-	.word	.LC93
 	.word	.LANCHOR47
+	.word	.LC94
+	.word	.LANCHOR48
+	.word	.LANCHOR50
+	.word	.LANCHOR46
+	.word	.LC95
+	.word	.LANCHOR49
 	.size	nandc_init, .-nandc_init
-	.section	.text.buf_init,"ax",%progbits
+	.section	.text.zbuf_init,"ax",%progbits
 	.align	1
-	.global	buf_init
+	.global	zbuf_init
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	buf_init, %function
-buf_init:
+	.type	zbuf_init, %function
+zbuf_init:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r5, #0
-	ldr	r4, .L1655
+	ldr	r4, .L1669
 	mov	r6, r5
-	ldr	r8, .L1655+12
+	ldr	r8, .L1669+12
 	mov	r7, r4
-.L1653:
+.L1667:
 	ldrb	r0, [r8]	@ zero_extendqisi2
 	uxtb	r3, r5
 	strb	r6, [r4, #2]
@@ -10355,22 +10603,22 @@ buf_init:
 	bl	ftl_malloc
 	cmp	r5, #32
 	str	r0, [r4, #-36]
-	bne	.L1653
+	bne	.L1667
 	movs	r3, #255
 	strb	r3, [r7, #1488]
-	ldr	r3, .L1655+4
+	ldr	r3, .L1669+4
 	strb	r6, [r3]
-	ldr	r3, .L1655+8
+	ldr	r3, .L1669+8
 	strb	r5, [r3]
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1656:
+.L1670:
 	.align	2
-.L1655:
-	.word	.LANCHOR50
-	.word	.LANCHOR51
+.L1669:
 	.word	.LANCHOR52
-	.word	.LANCHOR123
-	.size	buf_init, .-buf_init
+	.word	.LANCHOR53
+	.word	.LANCHOR54
+	.word	.LANCHOR125
+	.size	zbuf_init, .-zbuf_init
 	.section	.text.gc_init,"ax",%progbits
 	.align	1
 	.global	gc_init
@@ -10382,114 +10630,114 @@ buf_init:
 gc_init:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1658
-	mov	r2, #340
+	ldr	r3, .L1672
+	mov	r2, #596
 	push	{r4, r5, r6, lr}
 	movs	r4, #0
-	ldr	r5, .L1658+4
+	ldr	r5, .L1672+4
 	mov	r1, r4
 	strb	r4, [r3]
-	ldr	r3, .L1658+8
+	ldr	r3, .L1672+8
 	mov	r0, r5
 	strb	r4, [r3]
-	ldr	r3, .L1658+12
+	ldr	r3, .L1672+12
 	str	r4, [r3]
-	ldr	r3, .L1658+16
+	ldr	r3, .L1672+16
 	strh	r4, [r3]	@ movhi
 	bl	ftl_memset
 	movw	r3, #65535
 	str	r4, [r5, #8]
 	strh	r3, [r5]	@ movhi
-	ldr	r3, .L1658+20
+	ldr	r3, .L1672+20
 	ldrh	r3, [r3]
 	lsrs	r2, r3, #1
 	lsrs	r1, r3, #2
 	strh	r2, [r5, #34]	@ movhi
-	ldr	r2, .L1658+24
+	ldr	r2, .L1672+24
 	strh	r1, [r5, #32]	@ movhi
-	ldr	r5, .L1658+28
+	ldr	r5, .L1672+28
 	strh	r4, [r2]	@ movhi
-	ldr	r2, .L1658+32
+	ldr	r2, .L1672+32
 	strh	r4, [r2]	@ movhi
-	ldr	r2, .L1658+36
+	ldr	r2, .L1672+36
 	strh	r4, [r2]	@ movhi
-	ldr	r4, .L1658+40
+	ldr	r4, .L1672+40
 	ldrb	r0, [r4]	@ zero_extendqisi2
 	smulbb	r2, r0, r3
 	uxth	r2, r2
 	sub	r6, r2, #32
 	strh	r6, [r5]	@ movhi
-	ldr	r5, .L1658+44
+	ldr	r5, .L1672+44
 	strh	r2, [r5]	@ movhi
-	ldr	r2, .L1658+48
-	ldr	r5, .L1658+52
+	ldr	r2, .L1672+48
+	ldr	r5, .L1672+52
 	strh	r3, [r2]	@ movhi
-	ldr	r3, .L1658+56
+	ldr	r3, .L1672+56
 	strh	r1, [r3]	@ movhi
 	ldrh	r3, [r5]
 	muls	r0, r3, r0
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L1658+60
+	ldr	r3, .L1672+60
 	str	r0, [r3]
 	ldrh	r3, [r5]
 	ldrb	r0, [r4]	@ zero_extendqisi2
 	muls	r0, r3, r0
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L1658+64
+	ldr	r3, .L1672+64
 	str	r0, [r3]
 	ldrh	r3, [r5]
 	ldrb	r0, [r4]	@ zero_extendqisi2
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L1658+68
+	ldr	r3, .L1672+68
 	str	r0, [r3]
 	ldrh	r3, [r5]
 	ldrb	r0, [r4]	@ zero_extendqisi2
 	muls	r0, r3, r0
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L1658+72
+	ldr	r3, .L1672+72
 	str	r0, [r3]
 	ldrh	r3, [r5]
 	ldrb	r0, [r4]	@ zero_extendqisi2
 	muls	r0, r3, r0
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L1658+76
-	ldr	r2, .L1658+80
+	ldr	r3, .L1672+76
+	ldr	r2, .L1672+80
 	str	r0, [r3]
-	ldr	r3, .L1658+84
+	ldr	r3, .L1672+84
 	ldrh	r3, [r3]
 	lsrs	r3, r3, #2
 	strh	r3, [r2]	@ movhi
 	pop	{r4, r5, r6, pc}
-.L1659:
+.L1673:
 	.align	2
-.L1658:
-	.word	.LANCHOR76
-	.word	.LANCHOR63
-	.word	.LANCHOR150
-	.word	.LANCHOR151
-	.word	.LANCHOR87
-	.word	.LANCHOR85
-	.word	.LANCHOR86
-	.word	.LANCHOR94
-	.word	.LANCHOR82
-	.word	.LANCHOR83
+.L1672:
 	.word	.LANCHOR78
-	.word	.LANCHOR91
-	.word	.LANCHOR84
-	.word	.LANCHOR77
-	.word	.LANCHOR62
-	.word	.LANCHOR152
+	.word	.LANCHOR64
 	.word	.LANCHOR153
-	.word	.LANCHOR74
-	.word	.LANCHOR68
 	.word	.LANCHOR154
-	.word	.LANCHOR79
 	.word	.LANCHOR89
+	.word	.LANCHOR87
+	.word	.LANCHOR88
+	.word	.LANCHOR96
+	.word	.LANCHOR84
+	.word	.LANCHOR85
+	.word	.LANCHOR80
+	.word	.LANCHOR93
+	.word	.LANCHOR86
+	.word	.LANCHOR79
+	.word	.LANCHOR63
+	.word	.LANCHOR155
+	.word	.LANCHOR156
+	.word	.LANCHOR76
+	.word	.LANCHOR70
+	.word	.LANCHOR157
+	.word	.LANCHOR81
+	.word	.LANCHOR91
 	.size	gc_init, .-gc_init
 	.section	.text.ftl_free,"ax",%progbits
 	.align	1
@@ -10516,24 +10764,24 @@ ftl_free:
 js_hash:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1664
+	ldr	r3, .L1678
 	add	r1, r1, r0
 	push	{r4, lr}
-.L1662:
+.L1676:
 	cmp	r0, r1
-	bne	.L1663
+	bne	.L1677
 	mov	r0, r3
 	pop	{r4, pc}
-.L1663:
+.L1677:
 	lsrs	r2, r3, #2
 	ldrb	r4, [r0], #1	@ zero_extendqisi2
 	add	r2, r2, r3, lsl #5
 	add	r2, r2, r4
 	eors	r3, r3, r2
-	b	.L1662
-.L1665:
+	b	.L1676
+.L1679:
 	.align	2
-.L1664:
+.L1678:
 	.word	1204201446
 	.size	js_hash, .-js_hash
 	.section	.text.timer_get_time,"ax",%progbits
@@ -10605,13 +10853,13 @@ ftl_get_capacity:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L1671
+	ldr	r3, .L1685
 	ldr	r0, [r3]
 	bx	lr
-.L1672:
+.L1686:
 	.align	2
-.L1671:
-	.word	.LANCHOR59
+.L1685:
+	.word	.LANCHOR61
 	.size	ftl_get_capacity, .-ftl_get_capacity
 	.section	.text.rknand_print_hex,"ax",%progbits
 	.align	1
@@ -10626,55 +10874,55 @@ rknand_print_hex:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r5, #0
-	ldr	r7, .L1682
+	ldr	r7, .L1696
 	mov	fp, r0
 	mov	r6, r1
 	mov	r8, r2
 	mov	r10, r3
 	mov	r4, r5
-.L1674:
+.L1688:
 	cmp	r4, r10
-	bne	.L1680
-	ldr	r1, .L1682+4
-	ldr	r0, .L1682+8
+	bne	.L1694
+	ldr	r1, .L1696+4
+	ldr	r0, .L1696+8
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
 	b	printf
-.L1680:
-	cbnz	r5, .L1675
+.L1694:
+	cbnz	r5, .L1689
 	mov	r2, r4
 	mov	r1, fp
-	ldr	r0, .L1682+12
+	ldr	r0, .L1696+12
 	bl	printf
-.L1675:
+.L1689:
 	cmp	r8, #4
-	bne	.L1676
+	bne	.L1690
 	ldr	r1, [r6, r4, lsl #2]
-.L1681:
+.L1695:
 	mov	r0, r7
 	adds	r5, r5, #1
 	bl	printf
 	cmp	r5, #15
-	bls	.L1679
+	bls	.L1693
 	movs	r5, #0
-	ldr	r1, .L1682+4
-	ldr	r0, .L1682+8
+	ldr	r1, .L1696+4
+	ldr	r0, .L1696+8
 	bl	printf
-.L1679:
+.L1693:
 	adds	r4, r4, #1
-	b	.L1674
-.L1676:
+	b	.L1688
+.L1690:
 	cmp	r8, #2
 	ite	eq
 	ldrsheq	r1, [r6, r4, lsl #1]
 	ldrbne	r1, [r6, r4]	@ zero_extendqisi2
-	b	.L1681
-.L1683:
+	b	.L1695
+.L1697:
 	.align	2
-.L1682:
-	.word	.LC95
-	.word	.LC96
+.L1696:
 	.word	.LC97
-	.word	.LC94
+	.word	.LC98
+	.word	.LC99
+	.word	.LC96
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.hynix_get_read_retry_default,"ax",%progbits
 	.align	1
@@ -10687,7 +10935,7 @@ rknand_print_hex:
 hynix_get_read_retry_default:
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1795
+	ldr	r3, .L1809
 	cmp	r0, #2
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #56
@@ -10704,50 +10952,50 @@ hynix_get_read_retry_default:
 	strb	r1, [fp, #129]
 	strb	r2, [fp, #130]
 	strb	r3, [fp, #131]
-	bne	.L1685
+	bne	.L1699
 	movs	r3, #167
 	mov	r8, #7
 	strb	r3, [fp, #128]
 	movs	r2, #247
-	ldr	r3, .L1795+4
+	ldr	r3, .L1809+4
 	strb	r2, [r3, #17]
-.L1789:
+.L1803:
 	mov	r10, #4
-	b	.L1686
-.L1685:
+	b	.L1700
+.L1699:
 	cmp	r0, #3
-	bne	.L1687
+	bne	.L1701
 	add	r2, fp, #127
 	movs	r3, #176
-.L1688:
+.L1702:
 	strb	r3, [r2, #1]!
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, #184
-	bne	.L1688
-.L1790:
+	bne	.L1702
+.L1804:
 	mov	r8, #8
 	mov	r10, r8
-.L1686:
+.L1700:
 	subs	r3, r4, #1
 	cmp	r3, #1
-	bhi	.L1694
+	bhi	.L1708
 	movs	r5, #0
-.L1695:
-	ldr	r3, .L1795+8
+.L1709:
+	ldr	r3, .L1809+8
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	uxtb	r3, r5
 	cmp	r2, r3
-	bhi	.L1700
-.L1701:
+	bhi	.L1714
+.L1715:
 	strb	r10, [fp, #113]
 	strb	r8, [fp, #114]
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1687:
+.L1701:
 	cmp	r0, #4
-	bne	.L1689
+	bne	.L1703
 	movs	r0, #204
 	strb	r1, [fp, #133]
 	strb	r0, [fp, #128]
@@ -10761,10 +11009,10 @@ hynix_get_read_retry_default:
 	strb	r0, [fp, #132]
 	strb	r2, [fp, #134]
 	strb	r3, [fp, #135]
-	b	.L1790
-.L1689:
+	b	.L1804
+.L1703:
 	cmp	r0, #5
-	bne	.L1690
+	bne	.L1704
 	movs	r3, #56
 	mov	r8, #8
 	strb	r3, [fp, #128]
@@ -10774,10 +11022,10 @@ hynix_get_read_retry_default:
 	strb	r3, [fp, #130]
 	movs	r3, #59
 	strb	r3, [fp, #131]
-	b	.L1789
-.L1690:
+	b	.L1803
+.L1704:
 	cmp	r0, #6
-	bne	.L1691
+	bne	.L1705
 	movs	r3, #14
 	mov	r8, #12
 	strb	r3, [fp, #128]
@@ -10787,29 +11035,29 @@ hynix_get_read_retry_default:
 	strb	r3, [fp, #130]
 	movs	r3, #17
 	strb	r3, [fp, #131]
-	b	.L1789
-.L1691:
+	b	.L1803
+.L1705:
 	cmp	r0, #7
-	bne	.L1692
+	bne	.L1706
 	add	r2, fp, #127
 	movs	r3, #176
-.L1693:
+.L1707:
 	strb	r3, [r2, #1]!
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, #184
-	bne	.L1693
+	bne	.L1707
 	movs	r3, #212
 	mov	r8, #12
 	strb	r3, [fp, #136]
 	movs	r3, #213
 	strb	r3, [fp, #137]
 	mov	r10, #10
-	b	.L1686
-.L1692:
+	b	.L1700
+.L1706:
 	cmp	r0, #8
 	mov	r3, #7
-	bne	.L1748
+	bne	.L1762
 	strb	r3, [fp, #129]
 	movs	r3, #9
 	movs	r2, #6
@@ -10820,18 +11068,18 @@ hynix_get_read_retry_default:
 	mov	r8, #50
 	strb	r3, [fp, #132]
 	mov	r10, #5
-	b	.L1686
-.L1748:
+	b	.L1700
+.L1762:
 	mov	r8, r3
-	b	.L1789
-.L1700:
-	ldr	r2, .L1795+12
+	b	.L1803
+.L1714:
+	ldr	r2, .L1809+12
 	movs	r1, #160
 	ldr	r0, [sp]
 	add	r7, r10, #-1
 	add	r6, fp, #127
 	ldrb	r3, [r2, r3]	@ zero_extendqisi2
-	ldr	r2, .L1795+16
+	ldr	r2, .L1809+16
 	uxtab	r7, r0, r7
 	ldr	r4, [r2]
 	mla	r1, r1, r3, fp
@@ -10839,7 +11087,7 @@ hynix_get_read_retry_default:
 	adds	r1, r1, #144
 	subs	r2, r1, #1
 	addw	r3, r4, #2056
-.L1696:
+.L1710:
 	str	r2, [sp, #8]
 	movs	r2, #55
 	str	r2, [r3]
@@ -10853,25 +11101,25 @@ hynix_get_read_retry_default:
 	ldr	r2, [sp, #8]
 	ldr	r3, [sp, #4]
 	strb	r0, [r2, #1]!
-	bne	.L1696
-	ldr	r7, .L1795+4
+	bne	.L1710
+	ldr	r7, .L1809+4
 	mov	r0, r1
 	movs	r2, #0
-.L1697:
+.L1711:
 	movs	r3, #1
 	adds	r6, r7, r2
-.L1698:
+.L1712:
 	ldrb	r4, [r6, r3, lsl #2]	@ zero_extendqisi2
 	ldrb	ip, [r0]	@ zero_extendqisi2
 	add	r4, r4, ip
 	strb	r4, [r0, r3, lsl #3]
 	adds	r3, r3, #1
 	cmp	r3, #7
-	bne	.L1698
+	bne	.L1712
 	adds	r2, r2, #1
 	adds	r0, r0, #1
 	cmp	r2, #4
-	bne	.L1697
+	bne	.L1711
 	movs	r3, #0
 	adds	r5, r5, #1
 	strb	r3, [r1, #16]
@@ -10881,11 +11129,11 @@ hynix_get_read_retry_default:
 	strb	r3, [r1, #48]
 	strb	r3, [r1, #41]
 	strb	r3, [r1, #49]
-	b	.L1695
-.L1694:
+	b	.L1709
+.L1708:
 	subs	r3, r4, #3
 	cmp	r3, #5
-	bhi	.L1701
+	bhi	.L1715
 	smulbb	r3, r8, r10
 	asrs	r2, r3, #1
 	lsls	r3, r3, #4
@@ -10896,14 +11144,14 @@ hynix_get_read_retry_default:
 	lsls	r3, r2, #1
 	str	r3, [sp, #24]
 	movs	r3, #0
-.L1794:
+.L1808:
 	str	r3, [sp, #20]
-	ldr	r3, .L1795+8
+	ldr	r3, .L1809+8
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	ldrb	r3, [sp, #20]	@ zero_extendqisi2
 	cmp	r2, r3
-	bls	.L1701
-	ldr	r2, .L1795+12
+	bls	.L1715
+	ldr	r2, .L1809+12
 	movs	r6, #255
 	ldrb	r3, [r2, r3]	@ zero_extendqisi2
 	mov	r0, r3
@@ -10915,14 +11163,14 @@ hynix_get_read_retry_default:
 	mla	r1, r1, r3, fp
 	add	r3, r1, #144
 	str	r3, [sp, #40]
-	ldr	r3, .L1795+16
+	ldr	r3, .L1809+16
 	ldr	r3, [r3]
 	str	r3, [sp, #4]
 	add	r5, r3, r2, lsl #8
 	str	r6, [r5, #2056]
 	bl	nandc_wait_flash_ready
 	cmp	r4, #8
-	bne	.L1703
+	bne	.L1717
 	add	r3, fp, #144
 	movs	r2, #23
 	str	r3, [sp, #40]
@@ -10946,7 +11194,7 @@ hynix_get_read_retry_default:
 	str	r1, [r5, #2052]
 	str	r2, [r5, #2052]
 	str	r3, [r5, #2052]
-.L1704:
+.L1718:
 	ldm	sp, {r2, r3}
 	add	r3, r3, r2, lsl #8
 	movs	r2, #48
@@ -10955,15 +11203,15 @@ hynix_get_read_retry_default:
 	subs	r3, r4, #5
 	cmp	r3, #1
 	str	r3, [sp, #28]
-	bls	.L1750
+	bls	.L1764
 	cmp	r4, #8
-	beq	.L1750
+	beq	.L1764
 	cmp	r4, #7
 	ite	ne
 	movne	r2, #2
 	moveq	r2, #32
-.L1710:
-	ldr	r3, .L1795+20
+.L1724:
+	ldr	r3, .L1809+20
 	subs	r2, r2, #1
 	ldr	r5, [sp, #4]
 	ldr	r6, [sp]
@@ -10972,65 +11220,65 @@ hynix_get_read_retry_default:
 	subs	r1, r3, #1
 	uxtab	r2, r3, r2
 	mov	r0, r1
-.L1711:
+.L1725:
 	ldr	r5, [r7, #2048]
 	strb	r5, [r0, #1]!
 	cmp	r2, r0
-	bne	.L1711
+	bne	.L1725
 	cmp	r4, #8
-	bne	.L1712
+	bne	.L1726
 	movs	r2, #0
-.L1714:
+.L1728:
 	ldrb	r0, [r3, r2, lsl #2]	@ zero_extendqisi2
 	uxtb	r1, r2
 	cmp	r0, #50
-	beq	.L1713
+	beq	.L1727
 	add	r0, r3, r2, lsl #2
 	ldrb	r0, [r0, #1]	@ zero_extendqisi2
 	cmp	r0, #5
-	beq	.L1713
+	beq	.L1727
 	adds	r2, r2, #1
 	cmp	r2, #8
-	bne	.L1714
-.L1715:
+	bne	.L1728
+.L1729:
 	movs	r1, #0
-	ldr	r0, .L1795+24
+	ldr	r0, .L1809+24
 	bl	printf
+.L1731:
+	b	.L1731
 .L1717:
-	b	.L1717
-.L1703:
 	cmp	r4, #4
 	mov	r3, #54
 	str	r3, [r5, #2056]
-	bne	.L1705
+	bne	.L1719
 	movs	r3, #64
 	str	r6, [r5, #2052]
 	str	r3, [r5, #2048]
 	movs	r3, #204
-.L1791:
+.L1805:
 	str	r3, [r5, #2052]
 	movs	r3, #77
-	b	.L1792
-.L1796:
+	b	.L1806
+.L1810:
 	.align	2
-.L1795:
+.L1809:
 	.word	.LANCHOR27
-	.word	.LANCHOR155
+	.word	.LANCHOR158
 	.word	.LANCHOR18
 	.word	.LANCHOR30
 	.word	.LANCHOR13
-	.word	.LANCHOR156
-	.word	.LC98
-.L1705:
+	.word	.LANCHOR159
+	.word	.LC100
+.L1719:
 	subs	r3, r4, #5
 	cmp	r3, #1
-	bhi	.L1707
+	bhi	.L1721
 	ldrb	r3, [fp, #128]	@ zero_extendqisi2
 	str	r3, [r5, #2052]
 	movs	r3, #82
-.L1792:
+.L1806:
 	str	r3, [r5, #2048]
-.L1706:
+.L1720:
 	ldm	sp, {r2, r3}
 	cmp	r4, #6
 	add	r3, r3, r2, lsl #8
@@ -11053,57 +11301,57 @@ hynix_get_read_retry_default:
 	str	r2, [r3, #2052]
 	movs	r2, #0
 	str	r2, [r3, #2052]
-	b	.L1704
-.L1707:
+	b	.L1718
+.L1721:
 	cmp	r4, #7
-	bne	.L1706
+	bne	.L1720
 	movs	r3, #174
 	str	r3, [r5, #2052]
 	movs	r3, #0
 	str	r3, [r5, #2048]
 	movs	r3, #176
-	b	.L1791
-.L1750:
+	b	.L1805
+.L1764:
 	movs	r2, #16
-	b	.L1710
-.L1713:
+	b	.L1724
+.L1727:
 	cmp	r1, #6
-	bhi	.L1715
-.L1716:
-	ldr	r3, .L1797
+	bhi	.L1729
+.L1730:
+	ldr	r3, .L1811
 	ldr	ip, [r3]
 	mov	r3, ip
-.L1726:
+.L1740:
 	ldr	r1, [sp, #48]
 	sub	r2, r3, ip
 	cmp	r1, r2
-	bgt	.L1727
-	ldr	r3, .L1797
+	bgt	.L1741
+	ldr	r3, .L1811
 	ldr	r1, [r3]
 	ldr	r3, [sp, #24]
 	adds	r2, r1, r3
 	movs	r3, #8
-.L1729:
+.L1743:
 	mov	r5, r2
 	movs	r0, #0
-.L1728:
+.L1742:
 	ldrh	r6, [r5]
 	adds	r0, r0, #1
 	mvns	r6, r6
 	strh	r6, [r5], #2	@ movhi
 	ldr	r6, [sp, #8]
 	cmp	r6, r0
-	bgt	.L1728
+	bgt	.L1742
 	ldr	r0, [sp, #44]
 	subs	r3, r3, #1
 	add	r2, r2, r0
-	bne	.L1729
+	bne	.L1743
 	mov	r6, r1
 	str	r3, [sp, #16]
-.L1730:
+.L1744:
 	movs	r0, #0
 	mov	r2, r0
-.L1734:
+.L1748:
 	movs	r3, #1
 	mov	lr, r6
 	lsl	r5, r3, r2
@@ -11112,7 +11360,7 @@ hynix_get_read_retry_default:
 	str	r5, [sp, #32]
 	movs	r5, #16
 	str	r5, [sp, #36]
-.L1732:
+.L1746:
 	ldrh	r3, [lr]
 	str	r3, [sp, #52]
 	ldr	r3, [sp, #32]
@@ -11128,7 +11376,7 @@ hynix_get_read_retry_default:
 	ldr	r3, [sp, #36]
 	subs	r3, r3, #1
 	str	r3, [sp, #36]
-	bne	.L1732
+	bne	.L1746
 	ldr	r3, [sp, #12]
 	adds	r2, r2, #1
 	cmp	r3, #8
@@ -11137,7 +11385,7 @@ hynix_get_read_retry_default:
 	orrhi	r0, r0, r3
 	uxthhi	r0, r0
 	cmp	r2, #16
-	bne	.L1734
+	bne	.L1748
 	ldr	r3, [sp, #16]
 	strh	r0, [r6], #2	@ movhi
 	adds	r3, r3, #1
@@ -11145,106 +11393,106 @@ hynix_get_read_retry_default:
 	ldr	r2, [sp, #16]
 	ldr	r3, [sp, #8]
 	cmp	r3, r2
-	bgt	.L1730
+	bgt	.L1744
 	subs	r2, r1, #4
 	add	r0, r1, #28
 	movs	r3, #0
-.L1737:
+.L1751:
 	ldr	r5, [r2, #4]!
-	cbnz	r5, .L1736
+	cbnz	r5, .L1750
 	adds	r3, r3, #1
-.L1736:
+.L1750:
 	cmp	r0, r2
-	bne	.L1737
+	bne	.L1751
 	cmp	r3, #7
-	ble	.L1738
-	ldr	r0, .L1797+4
+	ble	.L1752
+	ldr	r0, .L1811+4
 	mov	r3, #1024
 	movs	r2, #1
 	bl	rknand_print_hex
 	movs	r1, #0
-	ldr	r0, .L1797+8
+	ldr	r0, .L1811+8
 	bl	printf
-.L1739:
-	b	.L1739
-.L1712:
+.L1753:
+	b	.L1753
+.L1726:
 	cmp	r4, #7
-	bne	.L1718
+	bne	.L1732
 	movs	r2, #0
-.L1720:
+.L1734:
 	ldrb	r0, [r3, r2, lsl #2]	@ zero_extendqisi2
 	uxtb	r1, r2
 	cmp	r0, #12
-	beq	.L1719
+	beq	.L1733
 	add	r0, r3, r2, lsl #2
 	ldrb	r0, [r0, #1]	@ zero_extendqisi2
 	cmp	r0, #10
-	beq	.L1719
+	beq	.L1733
 	adds	r2, r2, #1
 	cmp	r2, #8
-	bne	.L1720
-.L1721:
+	bne	.L1734
+.L1735:
 	movs	r1, #0
-	ldr	r0, .L1797+8
+	ldr	r0, .L1811+8
 	bl	printf
-.L1722:
-	b	.L1722
-.L1719:
+.L1736:
+	b	.L1736
+.L1733:
 	cmp	r1, #6
-	bls	.L1716
-	b	.L1721
-.L1718:
+	bls	.L1730
+	b	.L1735
+.L1732:
 	cmp	r4, #6
-	bne	.L1716
+	bne	.L1730
 	adds	r3, r3, #7
-.L1723:
+.L1737:
 	ldrb	r2, [r1, #1]!	@ zero_extendqisi2
 	cmp	r2, #12
-	beq	.L1716
+	beq	.L1730
 	ldrb	r2, [r1, #8]	@ zero_extendqisi2
 	cmp	r2, #4
-	beq	.L1716
+	beq	.L1730
 	cmp	r3, r1
-	bne	.L1723
+	bne	.L1737
 	movs	r1, #0
-	ldr	r0, .L1797+8
+	ldr	r0, .L1811+8
 	bl	printf
-.L1725:
-	b	.L1725
-.L1727:
+.L1739:
+	b	.L1739
+.L1741:
 	ldr	r2, [r7, #2048]
 	strb	r2, [r3], #1
-	b	.L1726
-.L1738:
+	b	.L1740
+.L1752:
 	cmp	r4, #6
-	beq	.L1752
+	beq	.L1766
 	cmp	r4, #7
-	beq	.L1753
+	beq	.L1767
 	cmp	r4, #8
 	ite	ne
 	movne	r0, #8
 	moveq	r0, #5
-.L1740:
+.L1754:
 	add	r3, r10, #-1
 	ldr	r1, [sp, #40]
 	uxtb	r3, r3
 	movs	r5, #0
 	adds	r3, r3, #1
-.L1741:
+.L1755:
 	mov	lr, r1
 	mov	r2, ip
-.L1742:
+.L1756:
 	ldrb	r6, [r2], #1	@ zero_extendqisi2
 	strb	r6, [lr], #1
 	sub	r6, r2, ip
 	uxtb	r6, r6
 	cmp	r10, r6
-	bhi	.L1742
+	bhi	.L1756
 	adds	r5, r5, #1
 	add	ip, ip, r3
 	cmp	r8, r5
 	add	r1, r1, r0
-	bgt	.L1741
+	bgt	.L1755
 	ldm	sp, {r2, r3}
 	movs	r6, #255
 	add	r5, r3, r2, lsl #8
@@ -11252,7 +11500,7 @@ hynix_get_read_retry_default:
 	bl	nandc_wait_flash_ready
 	ldr	r3, [sp, #28]
 	cmp	r3, #1
-	bhi	.L1744
+	bhi	.L1758
 	movs	r3, #54
 	movs	r2, #22
 	str	r3, [r5, #2056]
@@ -11268,30 +11516,30 @@ hynix_get_read_retry_default:
 	str	r6, [r7, #2052]
 	str	r6, [r7, #2052]
 	str	r6, [r7, #2052]
-.L1793:
+.L1807:
 	str	r3, [r5, #2056]
 	bl	nandc_wait_flash_ready
 	ldr	r3, [sp, #20]
 	adds	r3, r3, #1
-	b	.L1794
-.L1752:
+	b	.L1808
+.L1766:
 	movs	r0, #4
-	b	.L1740
-.L1753:
+	b	.L1754
+.L1767:
 	movs	r0, #10
-	b	.L1740
-.L1744:
+	b	.L1754
+.L1758:
 	cmp	r4, #8
 	ite	eq
 	moveq	r3, #190
 	movne	r3, #56
-	b	.L1793
-.L1798:
+	b	.L1807
+.L1812:
 	.align	2
-.L1797:
-	.word	.LANCHOR156
-	.word	.LC99
-	.word	.LC98
+.L1811:
+	.word	.LANCHOR159
+	.word	.LC101
+	.word	.LC100
 	.size	hynix_get_read_retry_default, .-hynix_get_read_retry_default
 	.section	.text.flash_get_read_retry_tbl,"ax",%progbits
 	.align	1
@@ -11305,18 +11553,18 @@ flash_get_read_retry_tbl:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L1801
+	ldr	r3, .L1815
 	ldrb	r0, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r0, #1
 	cmp	r3, #7
-	bhi	.L1799
+	bhi	.L1813
 	b	hynix_get_read_retry_default
-.L1799:
+.L1813:
 	bx	lr
-.L1802:
+.L1816:
 	.align	2
-.L1801:
-	.word	.LANCHOR31
+.L1815:
+	.word	.LANCHOR32
 	.size	flash_get_read_retry_tbl, .-flash_get_read_retry_tbl
 	.section	.text.nandc_xfer_done,"ax",%progbits
 	.align	1
@@ -11329,34 +11577,34 @@ flash_get_read_retry_tbl:
 nandc_xfer_done:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1841
+	ldr	r3, .L1855
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
 	movs	r4, #0
-	ldr	r7, .L1841+4
+	ldr	r7, .L1855+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	ldr	r5, .L1841+8
+	ldr	r5, .L1855+8
 	strb	r4, [r7]
 	cmp	r3, #9
 	ldr	r6, [r5]
-	bne	.L1804
+	bne	.L1818
 	ldr	r3, [r6, #16]
 	str	r3, [sp]
 	ldr	r3, [r6, #48]
 	ubfx	r3, r3, #1, #1
-	cbnz	r3, .L1805
-	ldr	r7, .L1841+12
+	cbnz	r3, .L1819
+	ldr	r7, .L1855+12
 	mov	r4, r3
-	ldr	r8, .L1841+32
-.L1806:
+	ldr	r8, .L1855+32
+.L1820:
 	ldr	r3, [sp]
 	lsls	r0, r3, #11
-	bmi	.L1809
+	bmi	.L1823
 	ldr	r3, [r5]
 	adds	r4, r4, #1
 	ldr	r3, [r3, #16]
 	str	r3, [sp]
 	bics	r3, r4, #-16777216
-	bne	.L1806
+	bne	.L1820
 	ldr	r2, [sp]
 	mov	r1, r4
 	ldr	r3, [r6, #64]
@@ -11368,38 +11616,38 @@ nandc_xfer_done:
 	ldr	r1, [r5]
 	mov	r0, r8
 	bl	rknand_print_hex
-	b	.L1806
-.L1805:
-	ldr	r8, .L1841+24
-	ldr	r10, .L1841+32
-.L1807:
+	b	.L1820
+.L1819:
+	ldr	r8, .L1855+24
+	ldr	r10, .L1855+32
+.L1821:
 	ldr	r2, [r6, #64]
 	ldr	r3, [sp]
 	ubfx	r2, r2, #16, #6
 	ubfx	r3, r3, #22, #6
 	cmp	r2, r3
-	bge	.L1809
+	bge	.L1823
 	ldr	r3, [r5]
 	ldr	r3, [r3]
 	str	r3, [sp, #4]
 	ldr	r3, [sp, #4]
 	lsls	r1, r3, #18
-	bpl	.L1808
+	bpl	.L1822
 	ldr	r3, [sp, #4]
 	lsls	r2, r3, #14
-	bpl	.L1808
+	bpl	.L1822
 	ldr	r1, [sp, #4]
-	ldr	r0, .L1841+16
+	ldr	r0, .L1855+16
 	ubfx	r1, r1, #17, #1
-.L1840:
+.L1854:
 	bl	printf
-	b	.L1809
-.L1808:
+	b	.L1823
+.L1822:
 	ldr	r3, [sp]
 	adds	r4, r4, #1
 	ubfx	r3, r3, #22, #6
 	cmp	r4, r3, lsl #12
-	bne	.L1807
+	bne	.L1821
 	ldr	r2, [r6, #64]
 	mov	r1, r4
 	ldr	r3, [sp]
@@ -11414,35 +11662,35 @@ nandc_xfer_done:
 	bl	rknand_print_hex
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #18
-	bpl	.L1807
+	bpl	.L1821
 	movs	r3, #1
 	strb	r3, [r7]
-.L1809:
-	ldr	r3, .L1841+20
+.L1823:
+	ldr	r3, .L1855+20
 	movs	r2, #0
 	str	r2, [r3, #20]
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L1804:
+.L1818:
 	ldr	r3, [r6, #8]
 	str	r3, [sp]
 	ldr	r3, [r6, #16]
 	ubfx	r3, r3, #1, #1
-	cbnz	r3, .L1815
-	ldr	r7, .L1841+12
+	cbnz	r3, .L1829
+	ldr	r7, .L1855+12
 	mov	r4, r3
-	ldr	r8, .L1841+32
-.L1816:
+	ldr	r8, .L1855+32
+.L1830:
 	ldr	r3, [sp]
 	lsls	r3, r3, #11
-	bmi	.L1809
+	bmi	.L1823
 	ldr	r3, [r5]
 	adds	r4, r4, #1
 	ldr	r3, [r3, #8]
 	str	r3, [sp]
 	bics	r3, r4, #-16777216
-	bne	.L1816
+	bne	.L1830
 	ldr	r2, [sp]
 	mov	r1, r4
 	ldr	r3, [r6, #28]
@@ -11454,33 +11702,33 @@ nandc_xfer_done:
 	ldr	r1, [r5]
 	mov	r0, r8
 	bl	rknand_print_hex
-	b	.L1816
-.L1815:
-	ldr	r7, .L1841+24
-	ldr	r8, .L1841+32
-.L1817:
+	b	.L1830
+.L1829:
+	ldr	r7, .L1855+24
+	ldr	r8, .L1855+32
+.L1831:
 	ldr	r2, [r6, #28]
 	ldr	r3, [sp]
 	ubfx	r2, r2, #16, #5
 	ubfx	r3, r3, #22, #6
 	cmp	r2, r3
-	bge	.L1809
+	bge	.L1823
 	ldr	r3, [r5]
 	ldr	r3, [r3]
 	str	r3, [sp, #4]
 	ldr	r3, [sp, #4]
 	lsls	r1, r3, #18
-	bpl	.L1818
+	bpl	.L1832
 	ldr	r3, [sp, #4]
 	lsls	r2, r3, #14
-	bpl	.L1818
+	bpl	.L1832
 	ldr	r1, [sp, #4]
-	ldr	r0, .L1841+28
-	b	.L1840
-.L1818:
+	ldr	r0, .L1855+28
+	b	.L1854
+.L1832:
 	adds	r4, r4, #1
 	bics	r3, r4, #-16777216
-	bne	.L1817
+	bne	.L1831
 	ldr	r2, [r6, #28]
 	mov	r1, r4
 	ldr	r3, [sp]
@@ -11493,19 +11741,19 @@ nandc_xfer_done:
 	ldr	r1, [r5]
 	mov	r0, r8
 	bl	rknand_print_hex
-	b	.L1817
-.L1842:
+	b	.L1831
+.L1856:
 	.align	2
-.L1841:
+.L1855:
 	.word	.LANCHOR28
-	.word	.LANCHOR157
+	.word	.LANCHOR160
 	.word	.LANCHOR13
+	.word	.LC105
+	.word	.LC102
+	.word	.LANCHOR49
 	.word	.LC103
-	.word	.LC100
-	.word	.LANCHOR47
-	.word	.LC101
+	.word	.LC106
 	.word	.LC104
-	.word	.LC102
 	.size	nandc_xfer_done, .-nandc_xfer_done
 	.section	.text.nandc_xfer,"ax",%progbits
 	.align	1
@@ -11530,54 +11778,54 @@ nandc_xfer:
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
 	cmp	r8, #0
-	bne	.L1862
-	ldr	r3, .L1881
+	bne	.L1876
+	ldr	r3, .L1895
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #9
-	bne	.L1845
-	ldr	r7, .L1881+4
+	bne	.L1859
+	ldr	r7, .L1895+4
 	lsr	ip, r4, #2
 	movs	r2, #1
 	mov	r1, r8
 	mov	r0, r8
 	ldr	r4, [r7]
-.L1846:
+.L1860:
 	cmp	r1, ip
-	bcc	.L1850
+	bcc	.L1864
 	ldr	r4, [r4]
 	cmp	r2, #0
 	it	ne
 	movne	r0, #512
 	and	r3, r4, #139264
 	cmp	r3, #139264
-	bne	.L1852
+	bne	.L1866
 	mov	r1, r4
-	ldr	r0, .L1881+8
+	ldr	r0, .L1895+8
 	bl	printf
 	ldr	r3, [r7]
 	mov	r0, #-1
 	orr	r4, r4, #131072
 	str	r4, [r3]
-.L1852:
+.L1866:
 	lsls	r2, r4, #18
-	bpl	.L1853
-	ldr	r3, .L1881+12
+	bpl	.L1867
+	ldr	r3, .L1895+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1853
+	beq	.L1867
 	mov	r1, r4
-	ldr	r0, .L1881+16
+	ldr	r0, .L1895+16
 	bl	printf
 	ldr	r3, [r7]
 	movs	r2, #1
 	str	r2, [r3, #16]
-.L1880:
+.L1894:
 	mov	r0, #-1
-.L1844:
+.L1858:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1850:
+.L1864:
 	add	r3, r1, #84
 	ldr	r3, [r4, r3, lsl #2]
 	str	r3, [sp, #4]
@@ -11588,10 +11836,10 @@ nandc_xfer:
 	ands	r2, r2, r3
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #29
-	bmi	.L1864
+	bmi	.L1878
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #13
-	bmi	.L1864
+	bmi	.L1878
 	ldr	r3, [sp, #4]
 	ubfx	lr, r3, #3, #7
 	ldr	r3, [sp, #4]
@@ -11604,17 +11852,17 @@ nandc_xfer:
 	cmp	r0, r3
 	it	cc
 	movcc	r0, r3
-.L1847:
+.L1861:
 	adds	r1, r1, #1
-	b	.L1846
-.L1864:
+	b	.L1860
+.L1878:
 	mov	r0, #-1
-	b	.L1847
-.L1845:
-	ldr	r3, .L1881+20
+	b	.L1861
+.L1859:
+	ldr	r3, .L1895+20
 	mov	r1, r8
 	mov	r0, r8
-	ldr	r8, .L1881+28
+	ldr	r8, .L1895+28
 	lsrs	r7, r4, #1
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #25
@@ -11622,33 +11870,33 @@ nandc_xfer:
 	ite	cc
 	movcc	lr, #64
 	movcs	lr, #128
-.L1855:
+.L1869:
 	cmp	r0, r7
 	add	ip, lr, r1
 	add	r3, r3, #4
-	bcc	.L1856
-	ldr	r7, .L1881+4
+	bcc	.L1870
+	ldr	r7, .L1895+4
 	movs	r2, #0
 	lsrs	r4, r4, #2
 	mov	r0, r2
 	ldr	r1, [r7]
-.L1857:
+.L1871:
 	cmp	r2, r4
-	bcc	.L1861
+	bcc	.L1875
 	movs	r3, #0
 	str	r3, [r1, #16]
 	ldr	r4, [r1]
 	and	r3, r4, #139264
 	cmp	r3, #139264
-	bne	.L1853
+	bne	.L1867
 	mov	r1, r4
-	ldr	r0, .L1881+24
+	ldr	r0, .L1895+24
 	bl	printf
 	ldr	r3, [r7]
 	orr	r4, r4, #131072
 	str	r4, [r3]
-	b	.L1880
-.L1856:
+	b	.L1894
+.L1870:
 	ldr	r2, [r8]
 	bic	r1, r1, #3
 	adds	r0, r0, #1
@@ -11661,17 +11909,17 @@ nandc_xfer:
 	strb	r1, [r3, #-2]
 	mov	r1, ip
 	strb	r2, [r3, #-1]
-	b	.L1855
-.L1861:
+	b	.L1869
+.L1875:
 	add	r3, r2, #8
 	ldr	r3, [r1, r3, lsl #2]
 	str	r3, [sp, #4]
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #29
-	bmi	.L1867
+	bmi	.L1881
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #16
-	bmi	.L1867
+	bmi	.L1881
 	ldr	r3, [sp, #4]
 	ubfx	ip, r3, #3, #5
 	ldr	r3, [sp, #4]
@@ -11696,40 +11944,40 @@ nandc_xfer:
 	cmp	r0, r3
 	it	cc
 	movcc	r0, r3
-.L1858:
+.L1872:
 	adds	r2, r2, #1
-	b	.L1857
-.L1867:
+	b	.L1871
+.L1881:
 	mov	r0, #-1
-	b	.L1858
-.L1853:
+	b	.L1872
+.L1867:
 	adds	r3, r0, #1
-	beq	.L1844
+	beq	.L1858
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	bne	.L1844
+	bne	.L1858
 	ldr	r3, [r5, #4]
 	adds	r3, r3, #1
-	bne	.L1844
+	bne	.L1858
 	ldr	r3, [r6]
 	adds	r3, r3, #1
 	it	eq
 	moveq	r0, #512
-	b	.L1844
-.L1862:
+	b	.L1858
+.L1876:
 	movs	r0, #0
-	b	.L1844
-.L1882:
+	b	.L1858
+.L1896:
 	.align	2
-.L1881:
+.L1895:
 	.word	.LANCHOR28
 	.word	.LANCHOR13
-	.word	.LC105
-	.word	.LANCHOR157
-	.word	.LC106
-	.word	.LANCHOR44
 	.word	.LC107
-	.word	.LANCHOR47
+	.word	.LANCHOR160
+	.word	.LC108
+	.word	.LANCHOR46
+	.word	.LC109
+	.word	.LANCHOR49
 	.size	nandc_xfer, .-nandc_xfer
 	.section	.text.flash_read_page,"ax",%progbits
 	.align	1
@@ -11740,106 +11988,113 @@ nandc_xfer:
 	.fpu softvfp
 	.type	flash_read_page, %function
 flash_read_page:
-	@ args = 4, pretend = 0, frame = 16
+	@ args = 4, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #24
-	str	r3, [sp, #16]
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r5, r0
-	mov	r7, r1
-	ubfx	r4, r1, #0, #21
-	ldr	r3, .L1898
-	ubfx	r8, r1, #24, #2
-	str	r2, [sp, #12]
+	str	r3, [sp, #12]
+	ubfx	r7, r1, #24, #2
+	ldr	r3, .L1911
+	str	r2, [sp, #8]
 	ldr	r6, [r3]
-	ldr	r3, .L1898+4
+	ldr	r3, .L1911+4
+	ldrb	r4, [r3]	@ zero_extendqisi2
+	rsb	r3, r4, #24
+	movs	r4, #1
+	lsls	r4, r4, r3
+	ldr	r3, .L1911+8
+	subs	r4, r4, #1
 	ldr	r3, [r3]
+	ands	r4, r4, r1
 	lsls	r3, r3, #27
-	bpl	.L1884
+	bpl	.L1898
 	mov	r3, r1
-	mov	r2, r8
+	mov	r2, r7
 	mov	r1, r0
-	ldr	r0, .L1898+8
+	ldr	r0, .L1911+12
 	bl	printf
-.L1884:
+.L1898:
 	bl	nandc_wait_flash_ready
 	mov	r0, r5
-	lsl	r10, r5, #8
+	ldr	r10, .L1911+20
 	bl	nandc_cs
-	ldr	r2, .L1898+12
-	cmp	r8, #0
-	bne	.L1885
+	lsl	r8, r5, #8
+	cmp	r7, #0
+	bne	.L1899
 	mov	r0, r5
-	str	r2, [sp, #20]
 	bl	zftl_flash_enter_slc_mode
-.L1896:
-	ldr	r2, [sp, #20]
-	b	.L1886
-.L1885:
-	ldr	r3, [r2]
-	ldrb	r3, [r3, #12]	@ zero_extendqisi2
-	cmp	r3, #3
-	bne	.L1887
-	add	r3, r6, r10
-	str	r8, [r3, #2056]
-.L1886:
-	add	fp, r6, r10
-	movs	r1, #0
-	str	r1, [fp, #2056]
-	uxtb	r7, r7
-	str	r1, [fp, #2052]
-	str	r1, [fp, #2052]
-	lsrs	r1, r4, #8
-	str	r7, [fp, #2052]
-	ldr	r2, [r2]
-	str	r1, [fp, #2052]
-	lsrs	r1, r4, #16
-	str	r1, [fp, #2052]
-	movs	r1, #48
-	str	r1, [fp, #2056]
+.L1900:
+	add	fp, r6, r8
+	movs	r2, #0
+	str	r2, [fp, #2056]
+	str	r2, [fp, #2052]
+	str	r2, [fp, #2052]
+	uxtb	r2, r4
+	str	r2, [fp, #2052]
+	lsrs	r2, r4, #8
+	str	r2, [fp, #2052]
+	lsrs	r2, r4, #16
+	str	r2, [fp, #2052]
+	movs	r2, #48
+	str	r2, [fp, #2056]
+	ldr	r2, [r10]
 	ldrb	r2, [r2, #12]	@ zero_extendqisi2
 	cmp	r2, #3
-	bne	.L1888
-	cmp	r8, #0
-	beq	.L1888
+	bne	.L1902
+	cbz	r7, .L1902
+	ldr	r2, .L1911+16
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbnz	r2, .L1902
 	add	r4, r4, r4, lsl #1
 	subs	r0, r4, #1
-	add	r0, r0, r8
-.L1897:
+	add	r0, r0, r7
+.L1910:
 	bl	nandc_set_seed
-	add	r6, r6, r10
 	bl	nandc_wait_flash_ready
+	add	r6, r6, r8
 	movs	r1, #0
 	movs	r2, #5
 	movs	r3, #224
 	str	r2, [r6, #2056]
-	str	r1, [fp, #2052]
 	mov	r0, r5
 	str	r1, [fp, #2052]
+	str	r1, [fp, #2052]
 	str	r3, [r6, #2056]
-	ldr	r3, [sp, #16]
-	ldrb	r2, [sp, #56]	@ zero_extendqisi2
-	str	r3, [sp]
 	ldr	r3, [sp, #12]
+	ldrb	r2, [sp, #48]	@ zero_extendqisi2
+	str	r3, [sp]
+	ldr	r3, [sp, #8]
 	bl	nandc_xfer
-	bl	nandc_de_cs.constprop.29
-	add	sp, sp, #24
+	bl	nandc_de_cs.constprop.30
+	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1887:
+.L1899:
+	ldr	r3, [r10]
+	ldrb	r3, [r3, #12]	@ zero_extendqisi2
+	cmp	r3, #3
+	bne	.L1901
+	ldr	r3, .L1911+16
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L1901
+	add	r3, r6, r8
+	str	r7, [r3, #2056]
+	b	.L1900
+.L1901:
 	mov	r0, r5
-	str	r2, [sp, #20]
 	bl	zftl_flash_exit_slc_mode
-	b	.L1896
-.L1888:
+	b	.L1900
+.L1902:
 	mov	r0, r4
-	b	.L1897
-.L1899:
+	b	.L1910
+.L1912:
 	.align	2
-.L1898:
+.L1911:
 	.word	.LANCHOR13
+	.word	.LANCHOR31
 	.word	.LANCHOR14
-	.word	.LC108
+	.word	.LC110
+	.word	.LANCHOR35
 	.word	.LANCHOR16
 	.size	flash_read_page, .-flash_read_page
 	.section	.text.micron_read_retrial,"ax",%progbits
@@ -11854,121 +12109,147 @@ micron_read_retrial:
 	@ args = 4, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	fp, r3
-	ldr	r3, .L1917
 	sub	sp, sp, #24
-	mov	r8, r0
-	mov	r7, r1
+	str	r3, [sp, #20]
+	mov	r7, r0
+	mov	fp, r1
+	mov	r10, #0
+	ldr	r3, .L1937
 	str	r2, [sp, #16]
-	movs	r5, #0
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	mov	r4, #-1
 	add	r3, r3, r3, lsl #1
-	asr	r10, r3, #2
+	asrs	r3, r3, #2
+	str	r3, [sp, #8]
 	bl	nandc_wait_flash_ready
-	ldr	r3, .L1917+4
-	ldr	r3, [r3]
-	str	r3, [sp, #12]
-.L1901:
-	ldr	r3, .L1917+8
+	ldr	r3, .L1937+4
+	ldr	r5, [r3]
+	add	r5, r5, r7, lsl #8
+.L1914:
+	mov	r8, #0
+	mov	r4, #-1
+.L1915:
+	ldr	r3, .L1937+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r5, r3
-	bcc	.L1906
-.L1905:
-	ldr	r3, [sp, #12]
-	movs	r0, #200
-	add	r8, r3, r8, lsl #8
+	cmp	r8, r3
+	bcc	.L1920
+.L1919:
 	movs	r3, #239
-	str	r3, [r8, #2056]
+	movs	r0, #200
+	str	r3, [r5, #2056]
 	movs	r3, #137
-	str	r3, [r8, #2052]
+	str	r3, [r5, #2052]
+	movs	r6, #0
 	bl	timer_delay_ns
-	cmp	r4, r10
-	mov	r3, #0
-	str	r3, [r8, #2048]
-	str	r3, [r8, #2048]
-	str	r3, [r8, #2048]
-	str	r3, [r8, #2048]
-	bcc	.L1907
-	adds	r3, r4, #1
-	mov	r2, r7
+	ldr	r3, [sp, #8]
+	str	r6, [r5, #2048]
+	str	r6, [r5, #2048]
+	cmp	r4, r3
+	str	r6, [r5, #2048]
+	str	r6, [r5, #2048]
+	bcc	.L1921
+	adds	r1, r4, #1
+	mov	r3, r8
 	it	ne
 	movne	r4, #256
-	mov	r3, r5
+	mov	r2, fp
 	str	r4, [sp]
-	mov	r1, r5
-	ldr	r0, .L1917+12
+	mov	r1, r8
+	ldr	r0, .L1937+12
 	bl	printf
-.L1907:
-	bl	nandc_wait_flash_ready
-	mov	r0, r4
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1906:
-	ldr	r3, [sp, #12]
-	movs	r0, #200
-	add	r1, r3, r8, lsl #8
+	cmp	r10, #0
+	bne	.L1923
+	adds	r2, r4, #1
+	bne	.L1924
+	movs	r1, #3
+	mov	r0, r7
+	bl	mt_auto_read_calibration_config
+	mov	r10, #1
+	b	.L1914
+.L1920:
 	movs	r3, #239
-	str	r3, [r1, #2056]
+	movs	r0, #200
+	str	r3, [r5, #2056]
 	movs	r3, #137
-	str	r3, [r1, #2052]
+	str	r3, [r5, #2052]
 	bl	timer_delay_ns
-	adds	r3, r5, #1
+	add	r3, r8, #1
 	ldr	r2, [sp, #16]
-	str	r3, [r1, #2048]
-	mov	r0, r8
-	str	r3, [sp, #20]
+	str	r3, [r5, #2048]
+	mov	r1, fp
+	str	r3, [sp, #12]
 	movs	r3, #0
-	str	r3, [r1, #2048]
-	str	r3, [r1, #2048]
-	str	r3, [r1, #2048]
-	mov	r1, r7
+	str	r3, [r5, #2048]
+	mov	r0, r7
+	str	r3, [r5, #2048]
+	str	r3, [r5, #2048]
 	ldr	r3, [sp, #56]
 	str	r3, [sp]
-	mov	r3, fp
+	ldr	r3, [sp, #20]
 	bl	flash_read_page
-	ldr	r3, .L1917+16
+	ldr	r3, .L1937+16
 	mov	r6, r0
 	ldr	r3, [r3]
-	lsls	r1, r3, #19
-	bpl	.L1902
+	lsls	r3, r3, #19
+	bpl	.L1916
 	str	r0, [sp]
 	mov	r3, r4
-	mov	r2, r7
-	mov	r1, r5
-	ldr	r0, .L1917+20
+	mov	r2, fp
+	mov	r1, r8
+	ldr	r0, .L1937+20
 	bl	printf
-.L1902:
-	adds	r2, r6, #1
-	beq	.L1903
-	ldr	r3, .L1917+24
+.L1916:
+	adds	r0, r6, #1
+	beq	.L1917
+	ldr	r3, .L1937+24
 	cmp	r4, #-1
 	it	eq
 	moveq	r4, r6
-	cmp	r6, r10
 	ldr	r3, [r3]
 	str	r3, [sp, #16]
-	ldr	r3, .L1917+28
-	ldr	fp, [r3]
-	bcc	.L1909
-.L1903:
-	ldr	r5, [sp, #20]
-	b	.L1901
-.L1909:
+	ldr	r3, .L1937+28
+	ldr	r3, [r3]
+	str	r3, [sp, #20]
+	ldr	r3, [sp, #8]
+	cmp	r6, r3
+	bcc	.L1926
+.L1917:
+	ldr	r8, [sp, #12]
+	b	.L1915
+.L1926:
 	mov	r4, r6
-	b	.L1905
-.L1918:
+	b	.L1919
+.L1923:
+	mov	r1, r6
+	mov	r0, r7
+	bl	mt_auto_read_calibration_config
+	adds	r3, r4, #1
+	it	ne
+	movne	r4, #256
+.L1924:
+	bl	nandc_wait_flash_ready
+	mov	r0, r4
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1921:
+	cmp	r10, #0
+	beq	.L1924
+	mov	r1, r6
+	mov	r0, r7
+	bl	mt_auto_read_calibration_config
+	mov	r4, #256
+	b	.L1924
+.L1938:
 	.align	2
-.L1917:
-	.word	.LANCHOR44
+.L1937:
+	.word	.LANCHOR46
 	.word	.LANCHOR13
-	.word	.LANCHOR159
-	.word	.LC110
+	.word	.LANCHOR162
+	.word	.LC112
 	.word	.LANCHOR14
-	.word	.LC109
-	.word	.LANCHOR156
-	.word	.LANCHOR158
+	.word	.LC111
+	.word	.LANCHOR159
+	.word	.LANCHOR161
 	.size	micron_read_retrial, .-micron_read_retrial
 	.section	.text.toshiba_3d_read_retrial,"ax",%progbits
 	.align	1
@@ -11990,9 +12271,9 @@ toshiba_3d_read_retrial:
 	str	r3, [sp, #12]
 	add	r6, r7, #8
 	bl	nandc_wait_flash_ready
-	ldr	r3, .L1962
+	ldr	r3, .L1982
 	ldr	fp, [r3]
-	ldr	r3, .L1962+4
+	ldr	r3, .L1982+4
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	add	r6, fp, r6, lsl #8
 	cmp	r2, #36
@@ -12005,15 +12286,15 @@ toshiba_3d_read_retrial:
 	moveq	r2, #26
 	str	r2, [sp, #16]
 	cmp	r4, #0
-	bne	.L1921
+	bne	.L1941
 	mov	r4, #-1
 	movs	r5, #1
 	str	r3, [sp, #20]
-.L1928:
+.L1948:
 	ldr	r3, [sp, #20]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #36
-	bne	.L1922
+	bne	.L1942
 	movs	r2, #0
 	mov	r1, r5
 	mov	r0, r6
@@ -12021,7 +12302,7 @@ toshiba_3d_read_retrial:
 	add	r3, fp, r7, lsl #8
 	movs	r2, #93
 	str	r2, [r3, #2056]
-.L1923:
+.L1943:
 	ldr	r3, [sp, #56]
 	mov	r1, r8
 	ldr	r2, [sp, #8]
@@ -12029,66 +12310,66 @@ toshiba_3d_read_retrial:
 	str	r3, [sp]
 	ldr	r3, [sp, #12]
 	bl	flash_read_page
-	ldr	r3, .L1962+8
+	ldr	r3, .L1982+8
 	mov	r10, r0
 	ldr	r3, [r3]
 	lsls	r1, r3, #27
-	bpl	.L1924
+	bpl	.L1944
 	mov	r3, r0
 	mov	r2, r8
 	mov	r1, r5
-	ldr	r0, .L1962+12
+	ldr	r0, .L1982+12
 	bl	printf
-.L1924:
+.L1944:
 	cmp	r10, #-1
-	beq	.L1925
-	ldr	r3, .L1962+16
+	beq	.L1945
+	ldr	r3, .L1982+16
 	cmp	r4, #-1
 	it	eq
 	moveq	r4, r10
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
-	ldr	r3, .L1962+20
+	ldr	r3, .L1982+20
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L1962+24
+	ldr	r3, .L1982+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r10, r3, asr #2
-	bcc	.L1943
-.L1925:
+	bcc	.L1963
+.L1945:
 	ldr	r3, [sp, #16]
 	adds	r5, r5, #1
 	cmp	r3, r5
-	bne	.L1928
-.L1927:
-	ldr	r3, .L1962+4
+	bne	.L1948
+.L1947:
+	ldr	r3, .L1982+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #36
-	bne	.L1929
+	bne	.L1949
 	movs	r2, #0
-.L1961:
+.L1981:
 	movs	r1, #0
 	mov	r0, r6
 	bl	toshiba_tlc_set_rr_para
-	b	.L1930
-.L1922:
+	b	.L1950
+.L1942:
 	uxtb	r1, r5
 	mov	r0, r6
 	bl	toshiba_3d_set_slc_rr_para
-	b	.L1923
-.L1943:
+	b	.L1943
+.L1963:
 	mov	r4, r10
-	b	.L1927
-.L1929:
+	b	.L1947
+.L1949:
 	movs	r1, #0
 	mov	r0, r6
 	bl	toshiba_3d_set_slc_rr_para
-.L1930:
-	ldr	r3, .L1962+4
+.L1950:
+	ldr	r3, .L1982+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #36
-	bne	.L1939
+	bne	.L1959
 	add	r7, fp, r7, lsl #8
 	movs	r3, #85
 	str	r3, [r7, #2056]
@@ -12097,12 +12378,12 @@ toshiba_3d_read_retrial:
 	str	r3, [r7, #2048]
 	movs	r3, #255
 	str	r3, [r7, #2056]
-.L1939:
-	ldr	r3, .L1962+24
+.L1959:
+	ldr	r3, .L1982+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, asr #2
-	bcc	.L1940
+	bcc	.L1960
 	adds	r3, r4, #1
 	mov	r2, r8
 	it	ne
@@ -12110,30 +12391,30 @@ toshiba_3d_read_retrial:
 	mov	r3, r5
 	str	r4, [sp]
 	mov	r1, r5
-	ldr	r0, .L1962+28
+	ldr	r0, .L1982+28
 	bl	printf
-.L1940:
+.L1960:
 	bl	nandc_wait_flash_ready
 	mov	r0, r4
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1921:
+.L1941:
 	mov	r4, #-1
 	movs	r5, #1
 	str	r3, [sp, #16]
-.L1937:
+.L1957:
 	ldr	r3, [sp, #16]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #36
-	bne	.L1931
+	bne	.L1951
 	movs	r2, #1
 	mov	r1, r5
 	mov	r0, r6
 	bl	toshiba_tlc_set_rr_para
 	add	r3, fp, r7, lsl #8
 	movs	r2, #93
-.L1960:
+.L1980:
 	str	r2, [r3, #2056]
 	mov	r1, r8
 	ldr	r3, [sp, #56]
@@ -12142,72 +12423,72 @@ toshiba_3d_read_retrial:
 	str	r3, [sp]
 	ldr	r3, [sp, #12]
 	bl	flash_read_page
-	ldr	r3, .L1962+8
+	ldr	r3, .L1982+8
 	mov	r10, r0
 	ldr	r3, [r3]
 	lsls	r2, r3, #27
-	bpl	.L1933
+	bpl	.L1953
 	mov	r3, r0
 	mov	r2, r8
 	mov	r1, r5
-	ldr	r0, .L1962+32
+	ldr	r0, .L1982+32
 	bl	printf
-.L1933:
+.L1953:
 	cmp	r10, #-1
-	beq	.L1934
-	ldr	r3, .L1962+16
+	beq	.L1954
+	ldr	r3, .L1982+16
 	cmp	r4, #-1
 	it	eq
 	moveq	r4, r10
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
-	ldr	r3, .L1962+20
+	ldr	r3, .L1982+20
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L1962+24
+	ldr	r3, .L1982+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r10, r3, asr #2
-	bcc	.L1944
-.L1934:
+	bcc	.L1964
+.L1954:
 	ldr	r3, [sp, #20]
 	adds	r5, r5, #1
 	cmp	r3, r5
-	bne	.L1937
-.L1936:
-	ldr	r3, .L1962+4
+	bne	.L1957
+.L1956:
+	ldr	r3, .L1982+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #36
-	bne	.L1938
+	bne	.L1958
 	movs	r2, #1
-	b	.L1961
-.L1931:
+	b	.L1981
+.L1951:
 	uxtb	r1, r5
 	mov	r0, r6
 	bl	toshiba_3d_set_tlc_rr_para
 	add	r3, fp, r7, lsl #8
 	movs	r2, #38
-	b	.L1960
-.L1944:
+	b	.L1980
+.L1964:
 	mov	r4, r10
-	b	.L1936
-.L1938:
+	b	.L1956
+.L1958:
 	movs	r1, #0
 	mov	r0, r6
 	bl	toshiba_3d_set_tlc_rr_para
-	b	.L1930
-.L1963:
+	b	.L1950
+.L1983:
 	.align	2
-.L1962:
+.L1982:
 	.word	.LANCHOR13
 	.word	.LANCHOR23
 	.word	.LANCHOR14
-	.word	.LC111
-	.word	.LANCHOR156
-	.word	.LANCHOR158
-	.word	.LANCHOR44
 	.word	.LC113
-	.word	.LC112
+	.word	.LANCHOR159
+	.word	.LANCHOR161
+	.word	.LANCHOR46
+	.word	.LC115
+	.word	.LC114
 	.size	toshiba_3d_read_retrial, .-toshiba_3d_read_retrial
 	.section	.text.toshiba_read_retrial,"ax",%progbits
 	.align	1
@@ -12228,55 +12509,55 @@ toshiba_read_retrial:
 	str	r3, [sp, #16]
 	str	r1, [sp, #8]
 	bl	nandc_wait_flash_ready
-	ldr	r3, .L1991
-	ldr	r2, .L1991+4
+	ldr	r3, .L2011
+	ldr	r2, .L2011+4
 	ldr	r6, [r3]
 	ldrb	r3, [r2]	@ zero_extendqisi2
 	str	r2, [sp, #20]
 	subs	r3, r3, #67
 	add	r10, r6, r10, lsl #8
 	cmp	r3, #1
-	bls	.L1982
-	ldr	r3, .L1991+8
+	bls	.L2002
+	ldr	r3, .L2011+8
 	ldrb	r5, [r3]	@ zero_extendqisi2
-	cbz	r5, .L1966
+	cbz	r5, .L1986
 	movs	r5, #1
 	movs	r0, #1
 	bl	nandc_set_if_mode
-.L1966:
+.L1986:
 	add	r3, r6, r7, lsl #8
 	movs	r2, #92
 	str	r2, [r3, #2056]
 	movs	r2, #197
 	str	r2, [r3, #2056]
-.L1965:
+.L1985:
 	mov	r8, #1
 	mov	fp, #-1
-.L1967:
-	ldr	r3, .L1991+12
+.L1987:
+	ldr	r3, .L2011+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	cmp	r8, r3
-	bcc	.L1976
+	bcc	.L1996
 	mov	r4, fp
-.L1975:
-	ldr	r3, .L1991+4
+.L1995:
+	ldr	r3, .L2011+4
 	movs	r1, #0
 	mov	r0, r10
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	subs	r3, r3, #67
 	cmp	r3, #1
-	bhi	.L1977
+	bhi	.L1997
 	bl	sandisk_set_rr_para
-.L1978:
+.L1998:
 	add	r6, r6, r7, lsl #8
 	movs	r3, #255
 	str	r3, [r6, #2056]
-	ldr	r3, .L1991+16
+	ldr	r3, .L2011+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, asr #2
-	bcc	.L1979
+	bcc	.L1999
 	adds	r3, r4, #1
 	ldr	r2, [sp, #8]
 	it	ne
@@ -12284,36 +12565,36 @@ toshiba_read_retrial:
 	mov	r3, r8
 	str	r4, [sp]
 	mov	r1, r8
-	ldr	r0, .L1991+20
+	ldr	r0, .L2011+20
 	bl	printf
-.L1979:
+.L1999:
 	bl	nandc_wait_flash_ready
-	cbz	r5, .L1964
+	cbz	r5, .L1984
 	movs	r0, #4
 	bl	nandc_set_if_mode
-.L1964:
+.L1984:
 	mov	r0, r4
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1982:
+.L2002:
 	movs	r5, #0
-	b	.L1965
-.L1976:
+	b	.L1985
+.L1996:
 	ldr	r3, [sp, #20]
 	mov	r0, r10
 	uxtb	r1, r8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	subs	r3, r3, #67
 	cmp	r3, #1
-	bhi	.L1968
+	bhi	.L1988
 	bl	sandisk_set_rr_para
-.L1969:
-	ldr	r3, .L1991+4
+.L1989:
+	ldr	r3, .L2011+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #34
-	bne	.L1970
-	ldr	r3, .L1991+12
+	bne	.L1990
+	ldr	r3, .L2011+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	subs	r3, r3, #3
 	cmp	r8, r3
@@ -12321,7 +12602,7 @@ toshiba_read_retrial:
 	addeq	r3, r6, r7, lsl #8
 	moveq	r2, #179
 	streq	r2, [r3, #2056]
-.L1970:
+.L1990:
 	add	r3, r6, r7, lsl #8
 	movs	r2, #38
 	add	r1, sp, #8
@@ -12335,41 +12616,41 @@ toshiba_read_retrial:
 	bl	flash_read_page
 	adds	r2, r0, #1
 	mov	r4, r0
-	beq	.L1973
-	ldr	r3, .L1991+24
+	beq	.L1993
+	ldr	r3, .L2011+24
 	cmp	fp, #-1
 	it	eq
 	moveq	fp, r0
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L1991+28
+	ldr	r3, .L2011+28
 	ldr	r3, [r3]
 	str	r3, [sp, #16]
-	ldr	r3, .L1991+16
+	ldr	r3, .L2011+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r0, r3, asr #2
-	bcc	.L1975
-.L1973:
+	bcc	.L1995
+.L1993:
 	add	r8, r8, #1
-	b	.L1967
-.L1968:
+	b	.L1987
+.L1988:
 	bl	toshiba_set_rr_para
-	b	.L1969
-.L1977:
+	b	.L1989
+.L1997:
 	bl	toshiba_set_rr_para
-	b	.L1978
-.L1992:
+	b	.L1998
+.L2012:
 	.align	2
-.L1991:
+.L2011:
 	.word	.LANCHOR13
 	.word	.LANCHOR23
 	.word	.LANCHOR21
+	.word	.LANCHOR162
+	.word	.LANCHOR46
+	.word	.LC115
 	.word	.LANCHOR159
-	.word	.LANCHOR44
-	.word	.LC113
-	.word	.LANCHOR156
-	.word	.LANCHOR158
+	.word	.LANCHOR161
 	.size	toshiba_read_retrial, .-toshiba_read_retrial
 	.section	.text.hynix_read_retrial,"ax",%progbits
 	.align	1
@@ -12388,23 +12669,23 @@ hynix_read_retrial:
 	mov	r4, #-1
 	mov	r7, r0
 	mov	r8, r1
-	ldr	r3, .L2007
+	ldr	r3, .L2027
 	str	r2, [sp, #8]
 	ldr	r3, [r3]
 	add	r10, r3, r0
 	ldrb	fp, [r3, #114]	@ zero_extendqisi2
 	ldrb	r5, [r10, #120]	@ zero_extendqisi2
 	bl	nandc_wait_flash_ready
-.L1994:
+.L2014:
 	cmp	r6, fp
-	bcc	.L1999
-.L1998:
-	ldr	r3, .L2007+4
+	bcc	.L2019
+.L2018:
+	ldr	r3, .L2027+4
 	strb	r5, [r10, #120]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, asr #2
-	bcc	.L2000
+	bcc	.L2020
 	adds	r3, r4, #1
 	mov	r2, r8
 	it	ne
@@ -12412,15 +12693,15 @@ hynix_read_retrial:
 	mov	r3, r6
 	str	r4, [sp]
 	mov	r1, r6
-	ldr	r0, .L2007+8
+	ldr	r0, .L2027+8
 	bl	printf
-.L2000:
+.L2020:
 	bl	nandc_wait_flash_ready
 	mov	r0, r4
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1999:
+.L2019:
 	adds	r5, r5, #1
 	mov	r0, r7
 	uxtb	r5, r5
@@ -12437,35 +12718,35 @@ hynix_read_retrial:
 	ldr	r3, [sp, #12]
 	bl	flash_read_page
 	adds	r2, r0, #1
-	beq	.L1996
-	ldr	r3, .L2007+12
+	beq	.L2016
+	ldr	r3, .L2027+12
 	cmp	r4, #-1
 	it	eq
 	moveq	r4, r0
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
-	ldr	r3, .L2007+16
+	ldr	r3, .L2027+16
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L2007+4
+	ldr	r3, .L2027+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r0, r3, asr #2
-	bcc	.L2002
-.L1996:
+	bcc	.L2022
+.L2016:
 	adds	r6, r6, #1
-	b	.L1994
-.L2002:
+	b	.L2014
+.L2022:
 	mov	r4, r0
-	b	.L1998
-.L2008:
+	b	.L2018
+.L2028:
 	.align	2
-.L2007:
+.L2027:
 	.word	.LANCHOR27
-	.word	.LANCHOR44
-	.word	.LC114
-	.word	.LANCHOR156
-	.word	.LANCHOR158
+	.word	.LANCHOR46
+	.word	.LC116
+	.word	.LANCHOR159
+	.word	.LANCHOR161
 	.size	hynix_read_retrial, .-hynix_read_retrial
 	.section	.text.flash_ddr_tuning_read,"ax",%progbits
 	.align	1
@@ -12494,7 +12775,7 @@ flash_ddr_tuning_read:
 	str	r4, [sp, #24]
 	str	r4, [sp, #12]
 	str	r3, [sp, #8]
-.L2015:
+.L2035:
 	uxtb	r0, r7
 	bl	nandc_set_ddr_para
 	ldr	r3, [sp, #64]
@@ -12504,64 +12785,64 @@ flash_ddr_tuning_read:
 	str	r3, [sp]
 	ldr	r3, [sp, #20]
 	bl	flash_read_page
-	ldr	r3, .L2032
+	ldr	r3, .L2052
 	mov	r10, r0
 	ldr	r3, [r3]
 	lsls	r3, r3, #27
-	bpl	.L2010
+	bpl	.L2030
 	mov	r3, r0
 	mov	r2, fp
 	mov	r1, r7
-	ldr	r0, .L2032+4
+	ldr	r0, .L2052+4
 	bl	printf
-.L2010:
+.L2030:
 	adds	r3, r6, #1
 	cmp	r10, r3
-	bhi	.L2011
-	ldr	r3, .L2032+8
+	bhi	.L2031
+	ldr	r3, .L2052+8
 	ldr	r3, [r3]
 	str	r3, [sp, #16]
-	ldr	r3, .L2032+12
+	ldr	r3, .L2052+12
 	ldr	r3, [r3]
 	str	r3, [sp, #20]
-	ldr	r3, .L2032+16
+	ldr	r3, .L2052+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r10, r3, lsr #2
-	bcs	.L2021
+	bcs	.L2041
 	adds	r5, r5, #1
 	cmp	r5, #7
-	bls	.L2021
+	bls	.L2041
 	subs	r4, r7, r5
 	mov	r6, r10
 	movs	r3, #0
 	str	r3, [sp, #8]
-.L2013:
+.L2033:
 	ldr	r3, [sp, #24]
 	ldr	r2, [sp, #12]
 	cmp	r5, r2
 	it	cc
 	movcc	r4, r3
-.L2014:
+.L2034:
 	cmp	r4, #0
-	beq	.L2016
-	ldr	r3, .L2032+16
+	beq	.L2036
+	ldr	r3, .L2052+16
 	ldrb	r2, [r3]	@ zero_extendqisi2
-	ldr	r3, .L2032+20
+	ldr	r3, .L2052+20
 	umull	r2, r3, r2, r3
 	ubfx	r3, r3, #1, #8
 	cmp	r3, r6
-	bls	.L2016
+	bls	.L2036
 	mov	r1, r4
-	ldr	r0, .L2032+24
+	ldr	r0, .L2052+24
 	bl	printf
 	uxtb	r0, r4
-.L2031:
+.L2051:
 	bl	nandc_set_ddr_para
 	ldr	r3, [sp, #8]
-	cbz	r3, .L2009
+	cbz	r3, .L2029
 	mov	r1, r8
 	mov	r2, fp
-	ldr	r0, .L2032+28
+	ldr	r0, .L2052+28
 	bl	printf
 	mov	r0, r8
 	bl	flash_reset
@@ -12569,7 +12850,7 @@ flash_ddr_tuning_read:
 	bl	flash_set_interface_mode
 	movs	r0, #1
 	bl	nandc_set_if_mode
-	ldr	r3, .L2032+32
+	ldr	r3, .L2052+32
 	movs	r2, #2
 	mov	r0, r8
 	strb	r2, [r3, r8]
@@ -12585,76 +12866,76 @@ flash_ddr_tuning_read:
 	mov	r3, r0
 	mov	r6, r0
 	mov	r1, r8
-	ldr	r0, .L2032+36
+	ldr	r0, .L2052+36
 	bl	printf
-	ldr	r3, .L2032+16
+	ldr	r3, .L2052+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r6, r3
-	bhi	.L2023
-	ldr	r2, .L2032+40
+	bhi	.L2043
+	ldr	r2, .L2052+40
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	cmp	r3, #100
 	str	r3, [r2]
-	bls	.L2019
-	ldr	r3, .L2032+44
+	bls	.L2039
+	ldr	r3, .L2052+44
 	movs	r2, #0
 	strb	r2, [r3]
-.L2009:
+.L2029:
 	mov	r0, r6
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2011:
+.L2031:
 	ldr	r3, [sp, #12]
 	cmp	r5, r3
-	bls	.L2022
+	bls	.L2042
 	cmp	r5, #7
 	sub	r3, r4, r5
 	str	r3, [sp, #24]
-	bhi	.L2014
+	bhi	.L2034
 	str	r5, [sp, #12]
-.L2022:
+.L2042:
 	movs	r5, #0
-	b	.L2012
-.L2021:
+	b	.L2032
+.L2041:
 	mov	r4, r7
 	mov	r6, r10
 	movs	r3, #0
 	str	r3, [sp, #8]
-.L2012:
+.L2032:
 	adds	r7, r7, #2
 	cmp	r7, #50
-	bne	.L2015
-	b	.L2013
-.L2016:
+	bne	.L2035
+	b	.L2033
+.L2036:
 	ldrb	r0, [sp, #28]	@ zero_extendqisi2
-	b	.L2031
-.L2023:
+	b	.L2051
+.L2043:
 	ldr	r6, [sp, #8]
-.L2019:
-	ldr	r4, .L2032+48
+.L2039:
+	ldr	r4, .L2052+48
 	ldrb	r0, [r4]	@ zero_extendqisi2
 	bl	flash_set_interface_mode
 	ldrb	r0, [r4]	@ zero_extendqisi2
 	bl	nandc_set_if_mode
-	b	.L2009
-.L2033:
+	b	.L2029
+.L2053:
 	.align	2
-.L2032:
+.L2052:
 	.word	.LANCHOR14
-	.word	.LC115
-	.word	.LANCHOR156
-	.word	.LANCHOR158
-	.word	.LANCHOR44
-	.word	-1431655765
-	.word	.LC116
 	.word	.LC117
-	.word	.LANCHOR32
+	.word	.LANCHOR159
+	.word	.LANCHOR161
+	.word	.LANCHOR46
+	.word	-1431655765
 	.word	.LC118
-	.word	.LANCHOR160
+	.word	.LC119
+	.word	.LANCHOR33
+	.word	.LC120
+	.word	.LANCHOR163
 	.word	.LANCHOR21
-	.word	.LANCHOR43
+	.word	.LANCHOR45
 	.size	flash_ddr_tuning_read, .-flash_ddr_tuning_read
 	.section	.text.flash_read_page_en,"ax",%progbits
 	.align	1
@@ -12669,7 +12950,7 @@ flash_read_page_en:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r8, r3
-	ldr	r3, .L2061
+	ldr	r3, .L2081
 	mov	r7, r2
 	mov	r5, r0
 	mov	r4, r1
@@ -12677,45 +12958,45 @@ flash_read_page_en:
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	mov	fp, r3
 	cmp	r2, r0
-	bhi	.L2035
-	movw	r2, #399
-	ldr	r1, .L2061+4
-	ldr	r0, .L2061+8
+	bhi	.L2055
+	mov	r2, #404
+	ldr	r1, .L2081+4
+	ldr	r0, .L2081+8
 	bl	printf
-.L2035:
-	ldr	r3, .L2061+12
+.L2055:
+	ldr	r3, .L2081+12
 	ldrb	r6, [r3, r5]	@ zero_extendqisi2
 	ldrb	r3, [fp]	@ zero_extendqisi2
 	cmp	r3, r5
-	bcs	.L2036
-	ldr	r3, .L2061+16
+	bcs	.L2056
+	ldr	r3, .L2081+16
 	ldr	r3, [r3]
 	lsls	r0, r3, #25
-	bmi	.L2037
-.L2060:
+	bmi	.L2057
+.L2080:
 	mov	r0, #-1
-.L2034:
+.L2054:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2037:
+.L2057:
 	mov	r3, r4
 	mov	r2, r5
 	mov	r1, r6
-	ldr	r0, .L2061+20
+	ldr	r0, .L2081+20
 	bl	printf
-	b	.L2060
-.L2036:
+	b	.L2080
+.L2056:
 	tst	r4, #50331648
-	bne	.L2039
-	ldr	r3, .L2061+24
+	bne	.L2059
+	ldr	r3, .L2081+24
 	ldrb	r2, [r3]	@ zero_extendqisi2
-	ldr	r3, .L2061+28
-	cbz	r2, .L2040
+	ldr	r3, .L2081+28
+	cbz	r2, .L2060
 	ldrb	r2, [r3]	@ zero_extendqisi2
-	cbz	r2, .L2039
-.L2040:
-	ldr	r2, .L2061+32
+	cbz	r2, .L2059
+.L2060:
+	ldr	r2, .L2081+32
 	mov	r0, r4
 	str	r3, [sp, #12]
 	ldrh	r5, [r2]
@@ -12727,9 +13008,9 @@ flash_read_page_en:
 	bl	__aeabi_uidivmod
 	ldr	r3, [sp, #12]
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2041
+	cbz	r3, .L2061
 	add	r4, fp, r1, lsl #1
-.L2039:
+.L2059:
 	mov	r1, r4
 	str	r10, [sp]
 	mov	r3, r8
@@ -12737,28 +13018,28 @@ flash_read_page_en:
 	mov	r0, r6
 	bl	flash_read_page
 	adds	r1, r0, #1
-	bne	.L2034
-	ldr	r5, .L2061+36
+	bne	.L2054
+	ldr	r5, .L2081+36
 	ldrb	fp, [r5]	@ zero_extendqisi2
 	cmp	fp, #0
-	bne	.L2042
-.L2045:
-	ldr	r3, .L2061+40
+	bne	.L2062
+.L2065:
+	ldr	r3, .L2081+40
 	ldr	fp, [r3]
 	cmp	fp, #0
-	bne	.L2043
-.L2044:
+	bne	.L2063
+.L2064:
 	ldrb	r3, [r5]	@ zero_extendqisi2
 	mov	r2, r4
 	movs	r1, #0
-	ldr	r0, .L2061+44
+	ldr	r0, .L2081+44
 	str	r3, [sp]
 	mov	r3, #-1
 	bl	printf
-	ldr	r3, .L2061+48
+	ldr	r3, .L2081+48
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L2060
+	beq	.L2080
 	str	r10, [sp, #48]
 	mov	r3, r8
 	mov	r2, r7
@@ -12768,12 +13049,12 @@ flash_read_page_en:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
 	b	flash_ddr_tuning_read
-.L2041:
-	ldr	r3, .L2061+52
+.L2061:
+	ldr	r3, .L2081+52
 	ldrh	r4, [r3, r1, lsl #1]
 	add	r4, r4, fp
-	b	.L2039
-.L2042:
+	b	.L2059
+.L2062:
 	movs	r3, #0
 	mov	r2, r7
 	strb	r3, [r5]
@@ -12784,9 +13065,9 @@ flash_read_page_en:
 	bl	flash_read_page
 	adds	r2, r0, #1
 	strb	fp, [r5]
-	beq	.L2045
-	b	.L2034
-.L2043:
+	beq	.L2065
+	b	.L2054
+.L2063:
 	mov	r3, r8
 	str	r10, [sp]
 	mov	r2, r7
@@ -12794,23 +13075,23 @@ flash_read_page_en:
 	mov	r0, r6
 	blx	fp
 	adds	r3, r0, #1
-	beq	.L2044
-	b	.L2034
-.L2062:
+	beq	.L2064
+	b	.L2054
+.L2082:
 	.align	2
-.L2061:
+.L2081:
 	.word	.LANCHOR18
-	.word	.LANCHOR161
+	.word	.LANCHOR164
 	.word	.LC0
 	.word	.LANCHOR30
 	.word	.LANCHOR14
-	.word	.LC119
+	.word	.LC121
 	.word	.LANCHOR0
 	.word	.LANCHOR1
 	.word	.LANCHOR2
-	.word	.LANCHOR46
-	.word	.LANCHOR162
-	.word	.LC120
+	.word	.LANCHOR48
+	.word	.LANCHOR165
+	.word	.LC122
 	.word	.LANCHOR21
 	.word	.LANCHOR3
 	.size	flash_read_page_en, .-flash_read_page_en
@@ -12827,12 +13108,12 @@ flash_get_last_written_page:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r8, r1
-	ldr	r1, .L2073
+	ldr	r1, .L2093
 	mov	fp, r2
 	mov	r10, r3
 	str	r0, [sp, #12]
 	ldrh	r4, [r1]
-	ldr	r1, .L2073+4
+	ldr	r1, .L2093+4
 	subs	r4, r4, #1
 	ldrh	r6, [r1, #26]
 	sxth	r4, r4
@@ -12842,27 +13123,27 @@ flash_get_last_written_page:
 	adds	r1, r4, r6
 	bl	flash_read_page_en
 	cmp	r0, #512
-	bne	.L2064
+	bne	.L2084
 	movs	r7, #0
-.L2065:
+.L2085:
 	cmp	r7, r4
-	ble	.L2068
-.L2064:
-	ldr	r3, .L2073+8
+	ble	.L2088
+.L2084:
+	ldr	r3, .L2093+8
 	ldr	r3, [r3]
 	lsls	r3, r3, #19
-	bpl	.L2069
+	bpl	.L2089
 	ldr	r3, [r10]
 	mov	r2, r4
 	mov	r1, r8
-	ldr	r0, .L2073+12
+	ldr	r0, .L2093+12
 	bl	printf
-.L2069:
+.L2089:
 	mov	r0, r4
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2068:
+.L2088:
 	adds	r5, r7, r4
 	ldr	r3, [sp, #48]
 	add	r5, r5, r5, lsr #31
@@ -12879,14 +13160,14 @@ flash_get_last_written_page:
 	addne	r5, r5, #1
 	sxtheq	r4, r4
 	sxthne	r7, r5
-	b	.L2065
-.L2074:
+	b	.L2085
+.L2094:
 	.align	2
-.L2073:
-	.word	.LANCHOR140
-	.word	.LANCHOR31
+.L2093:
+	.word	.LANCHOR142
+	.word	.LANCHOR32
 	.word	.LANCHOR14
-	.word	.LC121
+	.word	.LC123
 	.size	flash_get_last_written_page, .-flash_get_last_written_page
 	.section	.text.flash_get_last_written_page_ext,"ax",%progbits
 	.align	1
@@ -12900,13 +13181,16 @@ flash_get_last_written_page_ext:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r4, r5, lr}
-	movs	r5, #1
-	ldr	r4, .L2076
-	ldrh	r4, [r4]
+	ldr	r4, .L2096
+	ldr	r5, .L2096+4
+	ldrb	r4, [r4]	@ zero_extendqisi2
+	ldrh	r5, [r5]
+	rsb	r4, r4, #24
 	str	r3, [sp]
 	mov	r3, r2
 	mov	r2, r1
-	rsb	r4, r4, #21
+	subs	r4, r4, r5
+	movs	r5, #1
 	lsls	r5, r5, r4
 	asr	r4, r0, r4
 	subs	r5, r5, #1
@@ -12916,10 +13200,11 @@ flash_get_last_written_page_ext:
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, pc}
-.L2077:
+.L2097:
 	.align	2
-.L2076:
-	.word	.LANCHOR66
+.L2096:
+	.word	.LANCHOR31
+	.word	.LANCHOR68
 	.size	flash_get_last_written_page_ext, .-flash_get_last_written_page_ext
 	.section	.text.flash_ddr_para_scan,"ax",%progbits
 	.align	1
@@ -12934,12 +13219,12 @@ flash_ddr_para_scan:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r7, r0
-	ldr	r6, .L2084
+	ldr	r6, .L2104
 	movs	r5, #1
 	mov	r8, r1
-	ldr	r4, .L2084+4
-	ldr	fp, .L2084+8
-	ldr	r10, .L2084+12
+	ldr	r4, .L2104+4
+	ldr	fp, .L2104+8
+	ldr	r10, .L2104+12
 	ldrb	r0, [r6]	@ zero_extendqisi2
 	strb	r5, [r4]
 	bl	flash_set_interface_mode
@@ -12961,32 +13246,32 @@ flash_ddr_para_scan:
 	bl	flash_read_page
 	adds	r0, r0, #1
 	mov	r3, r4
-	bne	.L2079
+	bne	.L2099
 	ldrb	r2, [r6]	@ zero_extendqisi2
 	lsls	r2, r2, #31
-	bpl	.L2079
+	bpl	.L2099
 	mov	r0, r5
 	bl	flash_set_interface_mode
 	mov	r0, r5
 	bl	nandc_set_if_mode
 	movs	r3, #0
 	strb	r3, [r4]
-.L2080:
+.L2100:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2079:
+.L2099:
 	movs	r2, #1
 	strb	r2, [r3]
-	b	.L2080
-.L2085:
+	b	.L2100
+.L2105:
 	.align	2
-.L2084:
-	.word	.LANCHOR43
+.L2104:
+	.word	.LANCHOR45
 	.word	.LANCHOR21
-	.word	.LANCHOR163
-	.word	.LANCHOR164
+	.word	.LANCHOR166
+	.word	.LANCHOR167
 	.size	flash_ddr_para_scan, .-flash_ddr_para_scan
 	.section	.text.flash_complete_plane_page_read,"ax",%progbits
 	.align	1
@@ -12999,44 +13284,60 @@ flash_ddr_para_scan:
 flash_complete_plane_page_read:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2100
+	ldr	r3, .L2122
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
-	ubfx	r4, r0, #21, #3
-	mov	r7, r1
+	movs	r5, #1
+	ldr	r6, .L2122+4
 	mov	r8, r2
-	ubfx	r10, r0, #0, #21
-	ubfx	r5, r0, #24, #2
+	mov	r10, r0
+	mov	r7, r1
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, r4
-	bhi	.L2087
-	movw	r2, #887
-	ldr	r1, .L2100+4
-	ldr	r0, .L2100+8
-	bl	printf
-.L2087:
-	ldr	r3, .L2100+12
-	ldrb	r6, [r3, r4]	@ zero_extendqisi2
-	ldr	r3, .L2100+16
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	rsb	r4, r3, #24
+	lsls	r5, r5, r3
+	lsr	r3, r0, r4
+	subs	r5, r5, #1
+	ands	r5, r5, r3
+	uxtb	r5, r5
+	cmp	r2, r5
+	bhi	.L2107
+	movw	r2, #909
+	ldr	r1, .L2122+8
+	ldr	r0, .L2122+12
+	bl	printf
+.L2107:
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	cmp	r3, r5
+	bls	.L2115
+	ldr	r3, .L2122+16
+	movs	r0, #1
+	lsl	r4, r0, r4
+	ldrb	r6, [r3, r5]	@ zero_extendqisi2
+	subs	r4, r4, #1
+	ldr	r3, .L2122+20
+	and	r4, r4, r10
+	ubfx	r10, r10, #24, #2
 	mov	r0, r6
-	ldr	r4, [r3]
+	ldr	r5, [r3]
 	bl	nandc_cs
-	cbnz	r5, .L2088
-	mov	r0, r10
+	cmp	r10, #0
+	bne	.L2109
+	mov	r0, r4
 	bl	slc_phy_page_address_calc
-	mov	r10, r0
-.L2088:
-	ldr	r3, .L2100+20
-	uxtb	ip, r10
-	lsr	r0, r10, #8
-	lsr	r2, r10, #16
-	ldr	lr, .L2100+28
+	mov	r4, r0
+.L2109:
+	ldr	r3, .L2122+24
+	uxtb	ip, r4
+	lsrs	r0, r4, #8
+	lsrs	r2, r4, #16
+	ldr	lr, .L2122+36
 	ldrb	r3, [r3, #16]	@ zero_extendqisi2
 	cmp	r3, #1
 	lsl	r3, r6, #8
-	bne	.L2089
-	add	r3, r3, r4
+	bne	.L2110
+	add	r3, r3, r5
 	movs	r1, #6
-.L2099:
+.L2121:
 	str	r1, [r3, #2056]
 	movs	r1, #0
 	str	r1, [r3, #2052]
@@ -13044,39 +13345,44 @@ flash_complete_plane_page_read:
 	str	ip, [r3, #2052]
 	str	r0, [r3, #2052]
 	str	r2, [r3, #2052]
-.L2097:
+.L2119:
 	movs	r2, #224
 	str	r2, [r3, #2056]
 	ldr	r3, [lr]
 	ldrb	r3, [r3, #12]	@ zero_extendqisi2
 	cmp	r3, #3
-	bne	.L2092
-	cbz	r5, .L2092
-	add	r10, r10, r10, lsl #1
-	subs	r5, r5, #1
-	add	r0, r10, r5
-.L2098:
+	bne	.L2113
+	cmp	r10, #0
+	beq	.L2113
+	ldr	r3, .L2122+28
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L2113
+	add	r4, r4, r4, lsl #1
+	add	r10, r10, #-1
+	add	r0, r4, r10
+.L2120:
 	bl	nandc_set_seed
-	ldr	r3, .L2100+24
+	ldr	r3, .L2122+32
 	movs	r1, #0
 	mov	r0, r6
 	ldrb	r2, [r3, #9]	@ zero_extendqisi2
 	mov	r3, r7
 	str	r8, [sp]
 	bl	nandc_xfer
-	bl	nandc_de_cs.constprop.29
+	bl	nandc_de_cs.constprop.30
+.L2106:
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L2089:
+.L2110:
 	ldr	r1, [lr]
-	add	r3, r3, r4
+	add	r3, r3, r5
 	ldrb	r1, [r1, #12]	@ zero_extendqisi2
 	cmp	r1, #3
-	bne	.L2091
+	bne	.L2112
 	movs	r1, #5
-	b	.L2099
-.L2091:
+	b	.L2121
+.L2112:
 	movs	r1, #0
 	str	r1, [r3, #2056]
 	str	r1, [r3, #2052]
@@ -13088,20 +13394,25 @@ flash_complete_plane_page_read:
 	str	r2, [r3, #2056]
 	str	r1, [r3, #2052]
 	str	r1, [r3, #2052]
-	b	.L2097
-.L2092:
-	mov	r0, r10
-	b	.L2098
-.L2101:
+	b	.L2119
+.L2113:
+	mov	r0, r4
+	b	.L2120
+.L2115:
+	mov	r0, #-1
+	b	.L2106
+.L2123:
 	.align	2
-.L2100:
+.L2122:
+	.word	.LANCHOR31
 	.word	.LANCHOR18
-	.word	.LANCHOR165
+	.word	.LANCHOR168
 	.word	.LC0
 	.word	.LANCHOR30
 	.word	.LANCHOR13
 	.word	.LANCHOR20
-	.word	.LANCHOR31
+	.word	.LANCHOR35
+	.word	.LANCHOR32
 	.word	.LANCHOR16
 	.size	flash_complete_plane_page_read, .-flash_complete_plane_page_read
 	.section	.text.flash_complete_page_read,"ax",%progbits
@@ -13116,32 +13427,42 @@ flash_complete_page_read:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ubfx	r6, r0, #21, #3
-	ldr	r3, .L2132
 	mov	r7, r0
+	ldr	r3, .L2154
 	mov	r8, r1
-	ubfx	r4, r0, #0, #21
-	str	r2, [sp, #8]
 	ubfx	r5, r0, #24, #2
+	str	r2, [sp, #8]
+	ldrb	r6, [r3]	@ zero_extendqisi2
+	movs	r3, #1
+	rsb	r2, r6, #24
+	lsl	r4, r3, r2
+	lsl	r6, r3, r6
+	ldr	r3, .L2154+4
+	lsr	r2, r0, r2
+	subs	r6, r6, #1
+	ands	r6, r6, r2
+	subs	r4, r4, #1
 	ldrb	r3, [r3]	@ zero_extendqisi2
+	uxtb	r6, r6
+	ands	r4, r4, r0
 	cmp	r3, r6
-	bhi	.L2103
-	movw	r2, #1009
-	ldr	r1, .L2132+4
-	ldr	r0, .L2132+8
+	bhi	.L2125
+	movw	r2, #1033
+	ldr	r1, .L2154+8
+	ldr	r0, .L2154+12
 	bl	printf
-.L2103:
-	ldr	r3, .L2132+12
+.L2125:
+	ldr	r3, .L2154+16
 	ldrb	r6, [r3, r6]	@ zero_extendqisi2
-	ldr	r3, .L2132+16
+	ldr	r3, .L2154+20
 	mov	r0, r6
 	ldr	fp, [r3]
 	bl	nandc_cs
-	cbnz	r5, .L2104
+	cbnz	r5, .L2126
 	mov	r0, r4
 	bl	slc_phy_page_address_calc
 	mov	r4, r0
-.L2104:
+.L2126:
 	add	r3, fp, r6, lsl #8
 	movs	r2, #5
 	str	r2, [r3, #2056]
@@ -13156,19 +13477,23 @@ flash_complete_page_read:
 	str	r2, [r3, #2052]
 	movs	r2, #224
 	str	r2, [r3, #2056]
-	ldr	r3, .L2132+20
+	ldr	r3, .L2154+24
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #12]	@ zero_extendqisi2
 	cmp	r3, #3
-	bne	.L2105
+	bne	.L2127
 	cmp	r5, #0
-	beq	.L2105
+	beq	.L2127
+	ldr	r3, .L2154+28
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L2127
 	add	r3, r4, r4, lsl #1
 	subs	r0, r5, #1
 	add	r0, r0, r3
-.L2131:
+.L2153:
 	bl	nandc_set_seed
-	ldr	r10, .L2132+48
+	ldr	r10, .L2154+56
 	movs	r1, #0
 	ldr	r3, [sp, #8]
 	mov	r0, r6
@@ -13177,12 +13502,12 @@ flash_complete_page_read:
 	mov	r3, r8
 	bl	nandc_xfer
 	adds	r1, r0, #1
-	bne	.L2107
-	ldr	fp, .L2132+36
+	bne	.L2129
+	ldr	fp, .L2154+44
 	ldrb	r3, [fp]	@ zero_extendqisi2
 	str	r3, [sp, #12]
 	cmp	r3, #0
-	beq	.L2108
+	beq	.L2130
 	movs	r3, #0
 	mov	r2, r8
 	strb	r3, [fp]
@@ -13194,51 +13519,51 @@ flash_complete_page_read:
 	bl	flash_read_page
 	ldrb	r3, [sp, #12]	@ zero_extendqisi2
 	strb	r3, [fp]
-	cbnz	r5, .L2109
-.L2114:
-	ldr	r3, .L2132+24
+	cbnz	r5, .L2131
+.L2136:
+	ldr	r3, .L2154+32
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2109
-	ldr	r3, .L2132+28
+	cbz	r3, .L2131
+	ldr	r3, .L2154+36
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r0, r3, asr #2
-	blt	.L2109
+	blt	.L2131
 	ldrb	r3, [r10, #19]	@ zero_extendqisi2
 	subs	r3, r3, #4
 	cmp	r3, #4
 	it	ls
 	movls	r0, #256
-.L2102:
+.L2124:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2105:
+.L2127:
 	mov	r0, r4
-	b	.L2131
-.L2109:
+	b	.L2153
+.L2131:
 	adds	r2, r0, #1
-	bne	.L2102
-.L2115:
-	ldr	r3, .L2132+32
+	bne	.L2124
+.L2137:
+	ldr	r3, .L2154+40
 	ldr	fp, [r3]
 	cmp	fp, #0
-	bne	.L2111
-.L2113:
-	ldr	r3, .L2132+36
+	bne	.L2133
+.L2135:
+	ldr	r3, .L2154+44
 	mov	r2, r7
 	movs	r1, #0
-	ldr	r0, .L2132+40
+	ldr	r0, .L2154+48
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r3, [sp]
 	mov	r3, #-1
 	bl	printf
-	ldr	r3, .L2132+44
+	ldr	r3, .L2154+52
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L2112
+	cbnz	r3, .L2134
 	mov	r0, #-1
-	b	.L2102
-.L2111:
+	b	.L2124
+.L2133:
 	ldrb	r3, [r10, #9]	@ zero_extendqisi2
 	mov	r2, r8
 	orr	r1, r4, r5, lsl #24
@@ -13247,9 +13572,9 @@ flash_complete_page_read:
 	ldr	r3, [sp, #8]
 	blx	fp
 	adds	r3, r0, #1
-	beq	.L2113
-	b	.L2102
-.L2112:
+	beq	.L2135
+	b	.L2124
+.L2134:
 	ldrb	r3, [r10, #9]	@ zero_extendqisi2
 	mov	r2, r8
 	orr	r1, r4, r5, lsl #24
@@ -13257,31 +13582,33 @@ flash_complete_page_read:
 	str	r3, [sp]
 	ldr	r3, [sp, #8]
 	bl	flash_ddr_tuning_read
-	b	.L2102
-.L2107:
+	b	.L2124
+.L2129:
 	cmp	r5, #0
-	beq	.L2114
-	b	.L2102
-.L2108:
+	beq	.L2136
+	b	.L2124
+.L2130:
 	cmp	r5, #0
-	bne	.L2115
-	b	.L2114
-.L2133:
+	bne	.L2137
+	b	.L2136
+.L2155:
 	.align	2
-.L2132:
+.L2154:
+	.word	.LANCHOR31
 	.word	.LANCHOR18
-	.word	.LANCHOR166
+	.word	.LANCHOR169
 	.word	.LC0
 	.word	.LANCHOR30
 	.word	.LANCHOR13
 	.word	.LANCHOR16
+	.word	.LANCHOR35
 	.word	.LANCHOR0
-	.word	.LANCHOR44
-	.word	.LANCHOR162
 	.word	.LANCHOR46
-	.word	.LC122
+	.word	.LANCHOR165
+	.word	.LANCHOR48
+	.word	.LC124
 	.word	.LANCHOR21
-	.word	.LANCHOR31
+	.word	.LANCHOR32
 	.size	flash_complete_page_read, .-flash_complete_page_read
 	.section	.text.queue_wait_first_req_completed,"ax",%progbits
 	.align	1
@@ -13294,73 +13621,73 @@ queue_wait_first_req_completed:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L2233
+	ldr	r3, .L2255
 	ldrb	r5, [r3]	@ zero_extendqisi2
 	cmp	r5, #255
-	bne	.L2135
-.L2168:
+	bne	.L2157
+.L2190:
 	movs	r6, #0
-	b	.L2134
-.L2135:
-	ldr	r4, .L2233+4
+	b	.L2156
+.L2157:
+	ldr	r4, .L2255+4
 	movs	r3, #48
 	mla	r3, r3, r5, r4
 	ldrb	r2, [r3, #42]	@ zero_extendqisi2
 	ldr	r6, [r3, #24]
 	subs	r3, r2, #1
 	cmp	r3, #10
-	bhi	.L2168
+	bhi	.L2190
 	tbh	[pc, r3, lsl #1]
-.L2138:
-	.2byte	(.L2137-.L2138)/2
-	.2byte	(.L2139-.L2138)/2
-	.2byte	(.L2140-.L2138)/2
-	.2byte	(.L2140-.L2138)/2
-	.2byte	(.L2140-.L2138)/2
-	.2byte	(.L2140-.L2138)/2
-	.2byte	(.L2141-.L2138)/2
-	.2byte	(.L2142-.L2138)/2
-	.2byte	(.L2143-.L2138)/2
-	.2byte	(.L2140-.L2138)/2
-	.2byte	(.L2143-.L2138)/2
+.L2160:
+	.2byte	(.L2159-.L2160)/2
+	.2byte	(.L2161-.L2160)/2
+	.2byte	(.L2162-.L2160)/2
+	.2byte	(.L2162-.L2160)/2
+	.2byte	(.L2162-.L2160)/2
+	.2byte	(.L2162-.L2160)/2
+	.2byte	(.L2163-.L2160)/2
+	.2byte	(.L2164-.L2160)/2
+	.2byte	(.L2165-.L2160)/2
+	.2byte	(.L2162-.L2160)/2
+	.2byte	(.L2165-.L2160)/2
 	.p2align 1
-.L2137:
+.L2159:
 	movs	r1, #64
 	mov	r0, r6
 	bl	flash_wait_device_ready
 	lsls	r0, r0, #25
-	bpl	.L2168
+	bpl	.L2190
 	movs	r3, #48
 	mla	r3, r3, r5, r4
 	ldr	r2, [r3, #8]
 	ldr	r1, [r3, #4]
-	cbz	r2, .L2145
+	cbz	r2, .L2167
 	ldrb	r0, [r3, #40]	@ zero_extendqisi2
-	ldr	r3, .L2233+8
+	ldr	r3, .L2255+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r0, r3
 	it	eq
 	moveq	r1, r2
-.L2145:
+.L2167:
 	movs	r3, #48
 	mov	r0, r6
 	mla	r4, r3, r5, r4
 	ldr	r2, [r4, #12]
 	bl	flash_complete_page_read
 	str	r0, [r4, #36]
-.L2232:
+.L2254:
 	movs	r3, #13
 	strb	r3, [r4, #42]
 	ldrb	r3, [r4, #2]	@ zero_extendqisi2
 	orr	r3, r3, #8
 	strb	r3, [r4, #2]
-	b	.L2168
-.L2139:
+	b	.L2190
+.L2161:
 	movs	r1, #64
 	mov	r0, r6
 	bl	flash_wait_device_ready
 	lsls	r1, r0, #25
-	bpl	.L2168
+	bpl	.L2190
 	movs	r3, #48
 	mul	r1, r3, r5
 	ldrb	r6, [r4, r1]	@ zero_extendqisi2
@@ -13369,25 +13696,25 @@ queue_wait_first_req_completed:
 	mla	r3, r3, r6, r4
 	ldr	r10, [r3, #4]
 	ldr	r3, [r2, #8]
-	cbz	r3, .L2146
+	cbz	r3, .L2168
 	ldrb	r1, [r2, #40]	@ zero_extendqisi2
-	ldr	r2, .L2233+8
+	ldr	r2, .L2255+8
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r1, r2
 	it	eq
 	moveq	fp, r3
-.L2146:
+.L2168:
 	movs	r3, #48
 	mla	r3, r3, r6, r4
 	ldr	r2, [r3, #8]
-	cbz	r2, .L2147
+	cbz	r2, .L2169
 	ldrb	r1, [r3, #40]	@ zero_extendqisi2
-	ldr	r3, .L2233+8
+	ldr	r3, .L2255+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r1, r3
 	it	eq
 	moveq	r10, r2
-.L2147:
+.L2169:
 	movs	r3, #48
 	mov	r1, fp
 	mla	r7, r3, r5, r4
@@ -13404,58 +13731,67 @@ queue_wait_first_req_completed:
 	bl	flash_complete_plane_page_read
 	cmp	r8, #-1
 	str	r0, [sp, #12]
-	beq	.L2148
+	beq	.L2170
 	ldr	r3, [r7, #20]
 	adds	r2, r3, #1
-	beq	.L2149
+	beq	.L2171
 	ldr	r2, [r7, #12]
 	ldr	r2, [r2, #4]
 	cmp	r3, r2
-	beq	.L2149
-.L2148:
+	beq	.L2171
+.L2170:
 	movs	r7, #48
-	ldr	r3, .L2233+8
+	ldr	r3, .L2255+12
 	mla	r7, r7, r5, r4
 	ldrb	r3, [r3]	@ zero_extendqisi2
+	movs	r0, #1
+	ldr	r1, [r7, #24]
+	rsb	r2, r3, #24
+	lsls	r0, r0, r3
+	subs	r3, r0, #1
+	lsr	r0, r1, r2
+	lsl	ip, r3, r2
 	mov	r2, fp
-	ldr	r0, [r7, #24]
+	ands	r0, r0, r3
+	ldr	r3, .L2255+8
+	bic	r1, r1, ip
+	uxtb	r0, r0
+	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r3, [sp]
 	ldr	r3, [r7, #12]
-	bic	r1, r0, #14680064
-	ubfx	r0, r0, #21, #3
 	bl	flash_read_page_en
 	ldr	r2, [r7, #20]
 	mov	r8, r0
 	adds	r3, r2, #1
-	beq	.L2150
+	beq	.L2172
 	ldr	r3, [r7, #12]
 	ldr	r1, [r3, #4]
 	cmp	r2, r1
-	beq	.L2150
-	ldr	r0, .L2233+12
+	beq	.L2172
+	ldr	r0, .L2255+16
 	ldr	r0, [r0]
 	lsls	r0, r0, #25
-	bpl	.L2150
+	bpl	.L2172
 	str	r1, [sp]
 	ldr	r1, [r7, #24]
 	ldr	r3, [r3]
-	ldr	r0, .L2233+16
+	ldr	r0, .L2255+20
 	bl	printf
-.L2150:
+.L2172:
 	movs	r3, #48
 	mla	r3, r3, r5, r4
 	ldr	r2, [r3, #20]
 	adds	r0, r2, #1
-	beq	.L2149
+	beq	.L2171
 	ldr	r3, [r3, #12]
 	ldr	r3, [r3, #4]
 	cmp	r2, r3
-	beq	.L2149
+	beq	.L2171
 	mov	r2, #360
-	ldr	r1, .L2233+20
-	ldr	r0, .L2233+24
+	ldr	r1, .L2255+24
+	ldr	r0, .L2255+28
 	bl	printf
-.L2149:
+.L2171:
 	movs	r3, #48
 	movs	r2, #13
 	mla	r5, r3, r5, r4
@@ -13466,135 +13802,154 @@ queue_wait_first_req_completed:
 	strb	r2, [r5, #2]
 	ldr	r2, [sp, #12]
 	adds	r2, r2, #1
-	beq	.L2151
+	beq	.L2173
 	mla	r3, r3, r6, r4
 	ldr	r2, [r3, #20]
 	adds	r1, r2, #1
-	beq	.L2153
+	beq	.L2175
 	ldr	r3, [r3, #12]
 	ldr	r3, [r3, #4]
 	cmp	r2, r3
-	beq	.L2153
-.L2151:
+	beq	.L2175
+.L2173:
+	ldr	r3, .L2255+12
 	movs	r5, #48
-	ldr	r3, .L2233+8
 	mla	r5, r5, r6, r4
-	ldrb	r3, [r3]	@ zero_extendqisi2
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	movs	r0, #1
+	ldr	r1, [r5, #24]
+	rsb	r3, r2, #24
+	lsls	r0, r0, r2
 	mov	r2, r10
-	ldr	r0, [r5, #24]
+	subs	r0, r0, #1
+	lsl	r7, r0, r3
+	lsr	r3, r1, r3
+	ands	r0, r0, r3
+	ldr	r3, .L2255+8
+	bic	r1, r1, r7
+	uxtb	r0, r0
+	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r3, [sp]
 	ldr	r3, [r5, #12]
-	bic	r1, r0, #14680064
-	ubfx	r0, r0, #21, #3
 	bl	flash_read_page_en
 	ldr	r2, [r5, #20]
 	adds	r3, r2, #1
-	beq	.L2155
+	beq	.L2177
 	ldr	r3, [r5, #12]
 	ldr	r1, [r3, #4]
 	cmp	r2, r1
-	beq	.L2155
-	ldr	r0, .L2233+12
+	beq	.L2177
+	ldr	r0, .L2255+16
 	ldr	r0, [r0]
 	lsls	r7, r0, #25
-	bpl	.L2155
+	bpl	.L2177
 	str	r1, [sp]
-	ldr	r0, .L2233+16
+	ldr	r0, .L2255+20
 	ldr	r3, [r3]
 	ldr	r1, [r5, #24]
 	bl	printf
-.L2155:
+.L2177:
 	movs	r3, #48
 	mla	r3, r3, r6, r4
 	ldr	r2, [r3, #20]
 	adds	r0, r2, #1
-	beq	.L2153
+	beq	.L2175
 	ldr	r3, [r3, #12]
 	ldr	r3, [r3, #4]
 	cmp	r2, r3
-	beq	.L2153
+	beq	.L2175
 	movw	r2, #375
-	ldr	r1, .L2233+20
-	ldr	r0, .L2233+24
+	ldr	r1, .L2255+24
+	ldr	r0, .L2255+28
 	bl	printf
-.L2153:
+.L2175:
 	movs	r3, #48
 	mla	r4, r3, r6, r4
 	str	r8, [r4, #36]
-	b	.L2232
-.L2140:
+	b	.L2254
+.L2162:
 	movs	r1, #64
 	mov	r0, r6
 	bl	flash_wait_device_ready
 	lsls	r1, r0, #25
 	mov	r6, r0
-	bpl	.L2168
+	bpl	.L2190
 	ands	r2, r0, #5
 	mov	r3, #48
-	beq	.L2156
+	beq	.L2178
 	mla	r4, r3, r5, r4
 	movs	r3, #12
 	mov	r2, r0
-	ldr	r0, .L2233+28
+	ldr	r0, .L2255+32
 	strb	r3, [r4, #42]
 	ldrb	r1, [r4, #1]	@ zero_extendqisi2
 	str	r3, [sp]
 	ldr	r3, [r4, #24]
 	bl	printf
-.L2231:
+.L2253:
 	mov	r3, #-1
 	str	r3, [r4, #36]
-	b	.L2134
-.L2234:
+	b	.L2156
+.L2256:
 	.align	2
-.L2233:
-	.word	.LANCHOR54
-	.word	.LANCHOR50
-	.word	.LANCHOR123
+.L2255:
+	.word	.LANCHOR56
+	.word	.LANCHOR52
+	.word	.LANCHOR125
+	.word	.LANCHOR31
 	.word	.LANCHOR14
-	.word	.LC123
-	.word	.LANCHOR167
+	.word	.LC125
+	.word	.LANCHOR170
 	.word	.LC0
-	.word	.LC124
-.L2156:
+	.word	.LC126
+.L2178:
 	mla	r6, r3, r5, r4
 	movs	r3, #13
 	strb	r3, [r6, #42]
-	ldr	r3, .L2235
+	ldr	r3, .L2257
 	str	r2, [r6, #36]
 	ldr	r3, [r3]
 	ldr	r2, [r3, #156]
-	ldr	r3, .L2235+4
+	ldr	r3, .L2257+4
 	cmp	r2, r3
-	bne	.L2168
+	bne	.L2190
 	ldrh	r3, [r6, #34]
 	cmp	r3, #0
-	bne	.L2168
-	ldr	r3, .L2235+8
-	ldr	r0, [r6, #24]
-	ldr	r7, .L2235+12
+	bne	.L2190
+	ldr	r3, .L2257+8
+	movs	r0, #1
+	ldr	r1, [r6, #24]
+	ldr	r7, .L2257+12
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	rsb	r3, r2, #24
+	lsls	r0, r0, r2
+	ldr	r2, .L2257+16
+	subs	r0, r0, #1
+	lsl	ip, r0, r3
+	lsr	r3, r1, r3
+	ands	r0, r0, r3
+	ldr	r3, .L2257+20
+	bic	r1, r1, ip
+	uxtb	r0, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	ldr	r2, .L2235+16
-	bic	r1, r0, #14680064
-	ubfx	r0, r0, #21, #3
 	str	r3, [sp]
 	ldr	r3, [r7]
 	ldr	r2, [r2]
 	bl	flash_read_page_en
 	adds	r2, r0, #1
 	mov	r3, r0
-	beq	.L2157
+	beq	.L2179
 	ldr	r1, [r6, #12]
 	ldr	r2, [r7]
 	ldr	r1, [r1]
 	ldr	r2, [r2]
 	cmp	r1, r2
-	beq	.L2168
-.L2157:
+	beq	.L2190
+.L2179:
 	movs	r2, #48
-	ldr	r0, .L2235+20
+	ldr	r0, .L2257+24
 	mla	r4, r2, r5, r4
-	ldr	r2, .L2235+24
+	ldr	r2, .L2257+28
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	ldrb	r1, [r4, #1]	@ zero_extendqisi2
 	str	r2, [sp]
@@ -13602,59 +13957,69 @@ queue_wait_first_req_completed:
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4, #36]
-	b	.L2168
-.L2143:
-	add	r3, r5, r5, lsl #1
+	b	.L2190
+.L2165:
+	ldr	r7, .L2257+8
+	movs	r3, #1
 	cmp	r2, #11
+	add	r2, r5, r5, lsl #1
 	it	eq
-	moveq	r1, #10
-	add	r3, r4, r3, lsl #4
+	moveq	r0, #10
+	ldrb	ip, [r7]	@ zero_extendqisi2
+	add	r2, r4, r2, lsl #4
+	mov	r10, r7
 	it	ne
-	movne	r1, #3
-	ubfx	r0, r6, #21, #3
+	movne	r0, #3
 	movs	r7, #48
-.L2159:
-	ldrb	r8, [r3]	@ zero_extendqisi2
+	rsb	r1, ip, #24
+	lsl	r3, r3, ip
+	lsr	ip, r6, r1
+	subs	r3, r3, #1
+	and	ip, ip, r3
+	uxth	ip, ip
+.L2181:
+	ldrb	r8, [r2]	@ zero_extendqisi2
 	cmp	r8, #255
-	bne	.L2166
+	bne	.L2188
 	mov	r6, #-1
-	b	.L2134
-.L2166:
-	mla	r2, r7, r8, r4
-	add	r3, r8, r8, lsl #1
-	ldrb	ip, [r2, #42]	@ zero_extendqisi2
-	add	r3, r4, r3, lsl #4
-	cmp	ip, r1
-	bne	.L2159
-	ldr	r2, [r2, #24]
-	ubfx	r2, r2, #21, #3
-	cmp	r0, r2
-	bne	.L2159
+	b	.L2156
+.L2188:
+	mla	lr, r7, r8, r4
+	add	r2, r8, r8, lsl #1
+	ldrb	fp, [lr, #42]	@ zero_extendqisi2
+	add	r2, r4, r2, lsl #4
+	cmp	fp, r0
+	bne	.L2181
+	ldr	lr, [lr, #24]
+	lsr	lr, lr, r1
+	and	lr, lr, r3
+	cmp	ip, lr
+	bne	.L2181
 	mov	r0, r6
 	movs	r1, #64
 	bl	flash_wait_device_ready
 	mov	r6, r0
 	lsls	r0, r6, #25
-	bmi	.L2161
-.L2230:
+	bmi	.L2183
+.L2252:
 	movs	r6, #0
-	b	.L2162
-.L2161:
-	ands	r2, r6, #15
-	mul	r3, r7, r5
-	beq	.L2163
-	adds	r7, r4, r3
+	b	.L2184
+.L2183:
+	ands	r3, r6, #15
+	mul	r7, r7, r5
+	beq	.L2185
+	add	r7, r7, r4
 	mov	r10, #12
 	ldrb	r1, [r7, #1]	@ zero_extendqisi2
 	mov	r2, r6
 	str	r10, [sp]
 	ldr	r3, [r7, #24]
-	ldr	r0, .L2235+28
+	ldr	r0, .L2257+32
 	bl	printf
 	mov	r3, #-1
 	strb	r10, [r7, #42]
 	str	r3, [r7, #36]
-.L2162:
+.L2184:
 	movs	r3, #48
 	mla	r5, r3, r5, r4
 	mla	r8, r3, r8, r4
@@ -13662,50 +14027,58 @@ queue_wait_first_req_completed:
 	ldr	r3, [r5, #36]
 	strb	r2, [r8, #42]
 	str	r3, [r8, #36]
-.L2134:
+.L2156:
 	mov	r0, r6
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2163:
-	adds	r6, r4, r3
-	movs	r3, #13
-	strb	r3, [r6, #42]
-	ldr	r3, .L2235
-	str	r2, [r6, #36]
+.L2185:
+	adds	r6, r4, r7
+	movs	r2, #13
+	str	r3, [r6, #36]
+	ldr	r3, .L2257
+	strb	r2, [r6, #42]
 	ldr	r3, [r3]
 	ldr	r2, [r3, #156]
-	ldr	r3, .L2235+4
+	ldr	r3, .L2257+4
 	cmp	r2, r3
-	bne	.L2230
+	bne	.L2252
 	ldrh	r3, [r6, #34]
 	cmp	r3, #0
-	bne	.L2230
-	ldr	r3, .L2235+8
-	ldr	r0, [r6, #24]
-	ldr	r7, .L2235+12
+	bne	.L2252
+	ldrb	r2, [r10]	@ zero_extendqisi2
+	movs	r0, #1
+	ldr	r1, [r6, #24]
+	ldr	r7, .L2257+12
+	rsb	r3, r2, #24
+	lsls	r0, r0, r2
+	ldr	r2, .L2257+16
+	subs	r0, r0, #1
+	lsl	ip, r0, r3
+	lsr	r3, r1, r3
+	ands	r0, r0, r3
+	ldr	r3, .L2257+20
+	bic	r1, r1, ip
+	uxtb	r0, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	ldr	r2, .L2235+16
-	bic	r1, r0, #14680064
-	ubfx	r0, r0, #21, #3
 	str	r3, [sp]
 	ldr	r3, [r7]
 	ldr	r2, [r2]
 	bl	flash_read_page_en
 	adds	r1, r0, #1
 	mov	r3, r0
-	beq	.L2165
+	beq	.L2187
 	ldr	r1, [r6, #12]
 	ldr	r2, [r7]
 	ldr	r1, [r1]
 	ldr	r2, [r2]
 	cmp	r1, r2
-	beq	.L2230
-.L2165:
-	ldr	r2, .L2235+24
+	beq	.L2252
+.L2187:
+	ldr	r2, .L2257+28
 	movs	r6, #48
 	mla	r6, r6, r5, r4
-	ldr	r0, .L2235+32
+	ldr	r0, .L2257+36
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	ldrb	r1, [r6, #1]	@ zero_extendqisi2
 	str	r2, [sp]
@@ -13713,50 +14086,51 @@ queue_wait_first_req_completed:
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r6, #36]
-	b	.L2230
-.L2141:
+	b	.L2252
+.L2163:
 	mov	r0, r6
 	movs	r1, #32
 	bl	flash_wait_device_ready
 	lsls	r2, r0, #26
 	mov	r6, r0
-	bpl	.L2168
+	bpl	.L2190
 	ands	r2, r0, #15
 	mov	r3, #48
 	mla	r4, r3, r5, r4
-	beq	.L2167
+	beq	.L2189
 	movs	r3, #12
 	strb	r3, [r4, #42]
-	b	.L2231
-.L2167:
+	b	.L2253
+.L2189:
 	movs	r3, #13
 	str	r2, [r4, #36]
 	strb	r3, [r4, #42]
-	b	.L2168
-.L2142:
+	b	.L2190
+.L2164:
 	movs	r1, #64
 	mov	r0, r6
 	bl	flash_wait_device_ready
 	lsls	r3, r0, #25
-	bpl	.L2168
+	bpl	.L2190
 	movs	r3, #48
 	mla	r4, r3, r5, r4
 	movs	r3, #7
 	str	r0, [r4, #36]
 	strb	r3, [r4, #42]
-	b	.L2168
-.L2236:
+	b	.L2190
+.L2258:
 	.align	2
-.L2235:
-	.word	.LANCHOR102
+.L2257:
+	.word	.LANCHOR104
 	.word	1145785929
-	.word	.LANCHOR123
-	.word	.LANCHOR163
-	.word	.LANCHOR164
-	.word	.LC125
-	.word	.LANCHOR46
-	.word	.LC126
+	.word	.LANCHOR31
+	.word	.LANCHOR166
+	.word	.LANCHOR167
+	.word	.LANCHOR125
 	.word	.LC127
+	.word	.LANCHOR48
+	.word	.LC128
+	.word	.LC129
 	.size	queue_wait_first_req_completed, .-queue_wait_first_req_completed
 	.section	.text.sblk_wait_write_queue_completed,"ax",%progbits
 	.align	1
@@ -13770,20 +14144,20 @@ sblk_wait_write_queue_completed:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
-	ldr	r4, .L2240
-.L2238:
+	ldr	r4, .L2262
+.L2260:
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	cmp	r3, #255
-	bne	.L2239
+	bne	.L2261
 	pop	{r4, pc}
-.L2239:
+.L2261:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2238
-.L2241:
+	b	.L2260
+.L2263:
 	.align	2
-.L2240:
-	.word	.LANCHOR54
+.L2262:
+	.word	.LANCHOR56
 	.size	sblk_wait_write_queue_completed, .-sblk_wait_write_queue_completed
 	.section	.text.ftl_read_page,"ax",%progbits
 	.align	1
@@ -13822,21 +14196,34 @@ ftl_read_page:
 ftl_read_ppa_page:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r4, r5, r6, r7, lr}
-	mov	r4, r0
-	mov	r5, r1
-	mov	r6, r2
-	mov	r7, r3
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
+	mov	r10, r3
+	ldr	r3, .L2266
+	mov	r6, r0
+	movs	r5, #1
+	mov	r7, r1
+	mov	r8, r2
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	rsb	r4, r0, #24
+	lsls	r5, r5, r0
+	lsr	r4, r6, r4
+	subs	r5, r5, #1
+	ands	r4, r4, r5
+	uxtb	r4, r4
 	bl	sblk_wait_write_queue_completed
-	str	r7, [sp]
-	mov	r3, r6
-	mov	r2, r5
-	mov	r1, r4
-	ubfx	r0, r4, #21, #3
+	str	r10, [sp]
+	mov	r3, r8
+	mov	r2, r7
+	mov	r1, r6
+	mov	r0, r4
 	bl	flash_read_page_en
 	add	sp, sp, #12
 	@ sp needed
-	pop	{r4, r5, r6, r7, pc}
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.L2267:
+	.align	2
+.L2266:
+	.word	.LANCHOR31
 	.size	ftl_read_ppa_page, .-ftl_read_ppa_page
 	.section	.text.sblk_read_page,"ax",%progbits
 	.align	1
@@ -13850,78 +14237,94 @@ sblk_read_page:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r8, r0
-	ldr	r7, .L2269
+	mov	r7, r0
 	sub	sp, sp, #24
 	mov	r6, r1
 	mov	r4, r0
 	mov	r5, r1
-.L2245:
-	cbnz	r5, .L2255
-.L2268:
-	ldr	r4, .L2269
-.L2256:
+.L2269:
+	cbnz	r5, .L2279
+.L2292:
+	ldr	r4, .L2293
+.L2280:
 	cmp	r6, #0
-	bne	.L2258
+	bne	.L2282
 	mov	r0, r6
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2255:
+.L2279:
 	ldr	fp, [r4, #24]
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	str	r3, [sp, #8]
-.L2246:
+.L2270:
 	movs	r1, #0
 	mov	r0, fp
 	bl	queue_lun_state
-	cbnz	r0, .L2247
+	cbnz	r0, .L2271
 	cmp	r5, #1
-	beq	.L2252
-	ldr	r3, .L2269+4
+	beq	.L2276
+	ldr	r3, .L2293+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L2249
-.L2252:
+	cbnz	r3, .L2273
+.L2276:
 	mov	r0, r4
 	bl	queue_read_cmd
-	b	.L2250
-.L2247:
+	b	.L2274
+.L2271:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2246
-.L2249:
+	b	.L2270
+.L2273:
+	ldr	r3, .L2293+8
+	movs	r2, #1
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	rsb	r3, r1, #24
+	lsls	r2, r2, r1
+	lsr	r3, fp, r3
+	subs	r2, r2, #1
+	ands	r3, r3, r2
 	ldrb	r2, [r4]	@ zero_extendqisi2
-	ubfx	r3, fp, #21, #3
+	uxth	r3, r3
 	cmp	r2, #255
-	bne	.L2251
+	bne	.L2275
 	movw	r2, #661
-	ldr	r1, .L2269+8
-	ldr	r0, .L2269+12
+	ldr	r1, .L2293+12
+	ldr	r0, .L2293+16
 	str	r3, [sp, #4]
 	bl	printf
 	ldr	r3, [sp, #4]
-.L2251:
+.L2275:
 	ldrb	r2, [r4]	@ zero_extendqisi2
+	movs	r0, #1
+	ldr	r8, .L2293
 	str	r2, [sp, #12]
 	movs	r2, #48
 	ldr	r1, [sp, #12]
 	muls	r2, r1, r2
-	add	r10, r7, r2
+	add	r10, r8, r2
 	str	r2, [sp, #4]
+	ldr	r2, .L2293+8
 	ldr	r1, [r10, #24]
-	ubfx	r2, r1, #21, #3
+	ldrb	ip, [r2]	@ zero_extendqisi2
+	rsb	r2, ip, #24
+	lsl	r0, r0, ip
+	lsr	r2, r1, r2
+	subs	r0, r0, #1
+	ands	r2, r2, r0
+	uxth	r2, r2
 	cmp	r3, r2
-	bne	.L2252
-	ldr	r3, .L2269+16
+	bne	.L2276
+	ldr	r3, .L2293+20
 	ldrh	r3, [r3]
 	add	fp, fp, r3
 	cmp	r1, fp
-	bne	.L2252
+	bne	.L2276
 	ldr	r3, [sp, #4]
 	mov	fp, #255
 	ldr	r0, [r4, #24]
 	subs	r5, r5, #1
-	ldrb	r3, [r7, r3]	@ zero_extendqisi2
+	ldrb	r3, [r8, r3]	@ zero_extendqisi2
 	str	r3, [sp, #8]
 	bl	flash_start_plane_read
 	movs	r2, #2
@@ -13929,52 +14332,54 @@ sblk_read_page:
 	strb	r2, [r4, #42]
 	mov	r1, r4
 	strb	r3, [r4, #43]
-	ldr	r0, .L2269+20
+	ldr	r0, .L2293+24
 	strb	fp, [r4]
 	str	r2, [sp, #20]
 	str	r3, [sp, #16]
 	bl	buf_add_tail
 	ldr	r3, [sp, #16]
 	ldr	r2, [sp, #20]
-	ldr	r0, .L2269+20
+	ldr	r0, .L2293+24
 	strb	r3, [r10, #43]
 	ldr	r3, [sp, #4]
 	strb	r2, [r10, #42]
-	strb	fp, [r7, r3]
+	strb	fp, [r8, r3]
 	ldr	r3, [sp, #12]
 	add	r1, r3, r3, lsl #1
-	add	r1, r7, r1, lsl #4
+	add	r1, r8, r1, lsl #4
 	bl	buf_add_tail
-.L2250:
+.L2274:
 	subs	r5, r5, #1
-	beq	.L2268
+	beq	.L2292
 	ldr	r3, [sp, #8]
 	add	r4, r3, r3, lsl #1
-	add	r4, r7, r4, lsl #4
-	b	.L2245
-.L2258:
-	ldrb	r3, [r8, #42]	@ zero_extendqisi2
+	ldr	r3, .L2293
+	add	r4, r3, r4, lsl #4
+	b	.L2269
+.L2282:
+	ldrb	r3, [r7, #42]	@ zero_extendqisi2
 	cmp	r3, #13
-	bne	.L2257
-	ldrb	r3, [r8]	@ zero_extendqisi2
+	bne	.L2281
+	ldrb	r3, [r7]	@ zero_extendqisi2
 	subs	r6, r6, #1
 	cmp	r3, #255
 	itt	ne
 	addne	r3, r3, r3, lsl #1
-	addne	r8, r4, r3, lsl #4
-.L2257:
+	addne	r7, r4, r3, lsl #4
+.L2281:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2256
-.L2270:
+	b	.L2280
+.L2294:
 	.align	2
-.L2269:
-	.word	.LANCHOR50
-	.word	.LANCHOR168
-	.word	.LANCHOR169
+.L2293:
+	.word	.LANCHOR52
+	.word	.LANCHOR171
+	.word	.LANCHOR31
+	.word	.LANCHOR172
 	.word	.LC0
-	.word	.LANCHOR103
-	.word	.LANCHOR54
+	.word	.LANCHOR105
+	.word	.LANCHOR56
 	.size	sblk_read_page, .-sblk_read_page
 	.section	.text.flash_prog_page,"ax",%progbits
 	.align	1
@@ -13989,84 +14394,93 @@ flash_prog_page:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	fp, r3
-	ldr	r3, .L2282
-	mov	r5, r0
-	mov	r6, r1
+	ldr	r3, .L2306
+	mov	r6, r0
+	mov	r7, r1
 	mov	r10, r2
-	ubfx	r7, r1, #0, #21
 	ubfx	r8, r1, #24, #2
 	ldr	r4, [r3]
 	add	r3, r0, #8
 	add	r3, r4, r3, lsl #8
 	str	r3, [sp, #4]
-	ldr	r3, .L2282+4
+	ldr	r3, .L2306+4
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	rsb	r3, r5, #24
+	movs	r5, #1
+	lsls	r5, r5, r3
+	ldr	r3, .L2306+8
+	subs	r5, r5, #1
 	ldr	r3, [r3]
+	ands	r5, r5, r1
 	lsls	r3, r3, #27
-	bpl	.L2272
+	bpl	.L2296
 	ldr	r3, [sp, #40]
 	mov	r2, r8
-	ldr	r0, .L2282+8
+	ldr	r0, .L2306+12
 	bl	printf
-.L2272:
+.L2296:
 	bl	nandc_wait_flash_ready
-	mov	r0, r5
+	mov	r0, r6
 	bl	hynix_reconfig_rr_para
-	mov	r0, r5
+	mov	r0, r6
 	bl	nandc_cs
-	mov	r0, r5
+	mov	r0, r6
 	cmp	r8, #0
-	bne	.L2273
+	bne	.L2297
 	bl	zftl_flash_enter_slc_mode
-.L2274:
-	add	r4, r4, r5, lsl #8
+.L2298:
+	add	r4, r4, r6, lsl #8
 	movs	r3, #128
-	mov	r0, r7
+	mov	r0, r5
 	str	r3, [r4, #2056]
 	movs	r3, #0
 	str	r3, [r4, #2052]
 	str	r3, [r4, #2052]
-	uxtb	r3, r6
+	uxtb	r3, r5
 	str	r3, [r4, #2052]
-	lsrs	r3, r7, #8
+	lsrs	r3, r5, #8
 	str	r3, [r4, #2052]
-	lsrs	r3, r7, #16
+	lsrs	r3, r5, #16
 	str	r3, [r4, #2052]
 	bl	nandc_set_seed
-	ldr	r1, .L2282+12
+	ldr	r1, .L2306+16
 	mov	r2, r10
 	mov	r3, fp
 	movs	r0, #1
 	ldrb	r1, [r1, #9]	@ zero_extendqisi2
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
+	movs	r0, #200
+	bl	udelay
 	movs	r3, #16
 	str	r3, [r4, #2056]
 	bl	nandc_wait_flash_ready
 	ldr	r0, [sp, #4]
 	bl	flash_read_status
-	bl	nandc_de_cs.constprop.29
+	bl	nandc_de_cs.constprop.30
 	ands	r4, r0, #4
-	beq	.L2271
+	beq	.L2295
 	mov	r2, r4
-	mov	r1, r6
-	ldr	r0, .L2282+16
+	mov	r1, r7
+	ldr	r0, .L2306+20
 	bl	printf
-.L2271:
+.L2295:
 	mov	r0, r4
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2273:
+.L2297:
 	bl	zftl_flash_exit_slc_mode
-	b	.L2274
-.L2283:
+	b	.L2298
+.L2307:
 	.align	2
-.L2282:
+.L2306:
 	.word	.LANCHOR13
-	.word	.LANCHOR14
-	.word	.LC128
 	.word	.LANCHOR31
-	.word	.LC129
+	.word	.LANCHOR14
+	.word	.LC130
+	.word	.LANCHOR32
+	.word	.LC131
 	.size	flash_prog_page, .-flash_prog_page
 	.section	.text.flash_test_blk,"ax",%progbits
 	.align	1
@@ -14081,28 +14495,28 @@ flash_test_blk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	movs	r2, #32
-	ldr	r7, .L2294
+	ldr	r7, .L2318
 	mov	r6, r0
 	mov	r4, r1
 	movs	r1, #165
-	ldr	r5, .L2294+4
+	ldr	r5, .L2318+4
 	ldr	r0, [r7]
 	bl	ftl_memset
 	movs	r2, #8
 	movs	r1, #90
 	ldr	r0, [r5]
 	bl	ftl_memset
-	ldr	r3, .L2294+8
+	ldr	r3, .L2318+8
 	mov	r0, r6
 	ldrh	r3, [r3]
 	muls	r4, r3, r4
 	mov	r1, r4
 	bl	flash_erase_block
 	adds	r0, r0, #1
-	bne	.L2285
-.L2287:
+	bne	.L2309
+.L2311:
 	mov	r5, #-1
-.L2286:
+.L2310:
 	mov	r1, r4
 	mov	r0, r6
 	bl	flash_erase_block
@@ -14110,8 +14524,8 @@ flash_test_blk:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L2285:
-	ldr	r8, .L2294+12
+.L2309:
+	ldr	r8, .L2318+12
 	mov	r1, r4
 	mov	r0, r6
 	ldrb	r3, [r8, #9]	@ zero_extendqisi2
@@ -14120,7 +14534,7 @@ flash_test_blk:
 	ldr	r3, [r5]
 	bl	flash_prog_page
 	adds	r0, r0, #1
-	beq	.L2287
+	beq	.L2311
 	ldrb	r3, [r8, #9]	@ zero_extendqisi2
 	mov	r1, r4
 	mov	r0, r6
@@ -14129,24 +14543,24 @@ flash_test_blk:
 	ldr	r3, [r5]
 	bl	flash_read_page
 	adds	r0, r0, #1
-	beq	.L2287
+	beq	.L2311
 	ldr	r3, [r7]
 	ldr	r3, [r3]
 	cmp	r3, #-1515870811
-	bne	.L2287
+	bne	.L2311
 	ldr	r3, [r5]
 	ldr	r5, [r3]
 	subs	r5, r5, #1515870810
 	it	ne
 	movne	r5, #-1
-	b	.L2286
-.L2295:
+	b	.L2310
+.L2319:
 	.align	2
-.L2294:
-	.word	.LANCHOR156
-	.word	.LANCHOR158
+.L2318:
+	.word	.LANCHOR159
+	.word	.LANCHOR161
 	.word	.LANCHOR2
-	.word	.LANCHOR31
+	.word	.LANCHOR32
 	.size	flash_test_blk, .-flash_test_blk
 	.section	.text.id_block_prog_msb_ff_data,"ax",%progbits
 	.align	1
@@ -14159,32 +14573,32 @@ flash_test_blk:
 id_block_prog_msb_ff_data:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2303
+	ldr	r3, .L2327
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
 	mov	r6, r0
 	mov	r7, r1
 	mov	r4, r2
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L2296
-	ldr	r5, .L2303+4
+	cbnz	r3, .L2320
+	ldr	r5, .L2327+4
 	ldrb	r2, [r5, #19]	@ zero_extendqisi2
 	subs	r3, r2, #5
 	uxtb	r3, r3
 	cmp	r3, #30
-	bhi	.L2298
-	ldr	r2, .L2303+8
+	bhi	.L2322
+	ldr	r2, .L2327+8
 	lsr	r3, r2, r3
 	lsls	r3, r3, #31
-	bmi	.L2300
-.L2296:
+	bmi	.L2324
+.L2320:
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L2301:
+.L2325:
 	ldrh	r2, [r10, r4, lsl #1]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L2296
+	bne	.L2320
 	mov	r2, #16384
 	movs	r1, #255
 	ldr	r0, [r8]
@@ -14198,26 +14612,26 @@ id_block_prog_msb_ff_data:
 	ldr	r3, [r8]
 	mov	r2, r3
 	bl	flash_prog_page
-.L2302:
+.L2326:
 	ldrh	r3, [r5, #10]
 	cmp	r3, r4
-	bhi	.L2301
-	b	.L2296
-.L2298:
+	bhi	.L2325
+	b	.L2320
+.L2322:
 	cmp	r2, #68
-	bne	.L2296
-.L2300:
-	ldr	r10, .L2303+12
-	ldr	r8, .L2303+16
-	b	.L2302
-.L2304:
-	.align	2
-.L2303:
+	bne	.L2320
+.L2324:
+	ldr	r10, .L2327+12
+	ldr	r8, .L2327+16
+	b	.L2326
+.L2328:
+	.align	2
+.L2327:
 	.word	.LANCHOR19
-	.word	.LANCHOR31
+	.word	.LANCHOR32
 	.word	1073758215
-	.word	.LANCHOR138
-	.word	.LANCHOR156
+	.word	.LANCHOR140
+	.word	.LANCHOR159
 	.size	id_block_prog_msb_ff_data, .-id_block_prog_msb_ff_data
 	.section	.text.flash_dual_page_prog,"ax",%progbits
 	.align	1
@@ -14232,43 +14646,49 @@ flash_dual_page_prog:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	fp, r3
-	ldr	r3, .L2319
+	ldr	r3, .L2343
 	mov	r4, r0
-	mov	r6, r1
-	ubfx	r5, r1, #0, #21
-	str	r2, [sp, #8]
+	mov	r7, r1
 	ubfx	r8, r1, #24, #2
-	ldr	r7, [r3]
+	str	r2, [sp, #8]
+	ldr	r6, [r3]
 	add	r3, r0, #8
-	add	r3, r7, r3, lsl #8
+	add	r3, r6, r3, lsl #8
 	str	r3, [sp, #4]
-	ldr	r3, .L2319+4
+	ldr	r3, .L2343+4
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	ldr	r3, .L2343+8
+	rsb	r0, r5, #24
+	movs	r5, #1
 	ldr	r2, [r3]
+	lsls	r5, r5, r0
 	str	r3, [sp, #12]
+	subs	r5, r5, #1
 	tst	r2, #16
-	beq	.L2306
+	and	r5, r5, r1
+	beq	.L2330
 	ldr	r3, [sp, #56]
 	mov	r2, r8
-	ldr	r0, .L2319+8
+	ldr	r0, .L2343+12
 	bl	printf
-.L2306:
+.L2330:
 	bl	nandc_wait_flash_ready
 	mov	r0, r4
 	bl	nandc_cs
 	mov	r0, r4
 	cmp	r8, #0
-	bne	.L2307
+	bne	.L2331
 	bl	zftl_flash_enter_slc_mode
-.L2308:
-	add	r4, r7, r4, lsl #8
-	uxtb	r3, r6
-	ldr	r8, .L2319+16
-	movs	r7, #0
+.L2332:
+	add	r4, r6, r4, lsl #8
+	uxtb	r3, r5
+	ldr	r8, .L2343+20
+	movs	r6, #0
 	mov	r10, #128
 	str	r10, [r4, #2056]
 	mov	r0, r5
-	str	r7, [r4, #2052]
-	str	r7, [r4, #2052]
+	str	r6, [r4, #2052]
+	str	r6, [r4, #2052]
 	str	r3, [r4, #2052]
 	lsrs	r3, r5, #8
 	str	r3, [r4, #2052]
@@ -14279,16 +14699,16 @@ flash_dual_page_prog:
 	ldr	r2, [sp, #8]
 	ldrb	r1, [r8, #9]	@ zero_extendqisi2
 	movs	r0, #1
-	mov	fp, #16
 	bl	nandc_xfer_start
+	mov	fp, #16
 	bl	nandc_xfer_done
 	str	fp, [r4, #2056]
 	bl	nandc_wait_flash_ready
 	adds	r0, r5, #1
 	str	r10, [r4, #2056]
 	uxtb	r3, r0
-	str	r7, [r4, #2052]
-	str	r7, [r4, #2052]
+	str	r6, [r4, #2052]
+	str	r6, [r4, #2052]
 	str	r3, [r4, #2052]
 	lsrs	r3, r0, #8
 	str	r3, [r4, #2052]
@@ -14305,60 +14725,61 @@ flash_dual_page_prog:
 	bl	nandc_wait_flash_ready
 	ldr	r0, [sp, #4]
 	bl	flash_read_status
-	bl	nandc_de_cs.constprop.29
+	bl	nandc_de_cs.constprop.30
 	ands	r4, r0, #4
-	beq	.L2305
+	beq	.L2329
 	ldr	r3, [sp, #12]
 	ldr	r3, [r3]
 	lsls	r3, r3, #19
-	bpl	.L2305
+	bpl	.L2329
 	mov	r2, r4
-	mov	r1, r6
-	ldr	r0, .L2319+12
+	mov	r1, r7
+	ldr	r0, .L2343+16
 	bl	printf
-.L2305:
+.L2329:
 	mov	r0, r4
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2307:
+.L2331:
 	bl	zftl_flash_exit_slc_mode
-	b	.L2308
-.L2320:
+	b	.L2332
+.L2344:
 	.align	2
-.L2319:
+.L2343:
 	.word	.LANCHOR13
-	.word	.LANCHOR14
-	.word	.LC128
-	.word	.LC129
 	.word	.LANCHOR31
+	.word	.LANCHOR14
+	.word	.LC130
+	.word	.LC131
+	.word	.LANCHOR32
 	.size	flash_dual_page_prog, .-flash_dual_page_prog
-	.section	.text.fw_flash_page_prog.constprop.26,"ax",%progbits
+	.section	.text.fw_flash_page_prog.constprop.27,"ax",%progbits
 	.align	1
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	fw_flash_page_prog.constprop.26, %function
-fw_flash_page_prog.constprop.26:
+	.type	fw_flash_page_prog.constprop.27, %function
+fw_flash_page_prog.constprop.27:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, lr}
 	mov	r5, r1
-	ldr	r7, .L2325
+	ldr	r7, .L2349
 	mov	r6, r2
 	ldrb	r1, [r7, #9]	@ zero_extendqisi2
 	bl	__aeabi_uidiv
-	ldr	r3, .L2325+4
+	ldr	r3, .L2349+4
 	mov	r4, r0
 	ldrb	r8, [r3]	@ zero_extendqisi2
-	ldr	r3, .L2325+8
+	ldr	r3, .L2349+8
 	ldrb	r0, [r3]	@ zero_extendqisi2
 	bl	nandc_bch_sel
 	ldrb	r3, [r7, #7]	@ zero_extendqisi2
 	cmp	r3, #9
-	bne	.L2322
-	ldr	r7, .L2325+12
+	bne	.L2346
+	ldr	r7, .L2349+12
 	mov	r2, #16384
 	movs	r1, #255
 	ldr	r0, [r7]
@@ -14373,7 +14794,7 @@ fw_flash_page_prog.constprop.26:
 	str	r3, [sp]
 	mov	r3, r6
 	bl	flash_dual_page_prog
-.L2324:
+.L2348:
 	mov	r4, r0
 	mov	r0, r8
 	bl	nandc_bch_sel
@@ -14381,7 +14802,7 @@ fw_flash_page_prog.constprop.26:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L2322:
+.L2346:
 	movs	r3, #4
 	mov	r2, r5
 	str	r3, [sp]
@@ -14389,15 +14810,15 @@ fw_flash_page_prog.constprop.26:
 	mov	r3, r6
 	movs	r0, #0
 	bl	flash_prog_page
-	b	.L2324
-.L2326:
+	b	.L2348
+.L2350:
 	.align	2
-.L2325:
-	.word	.LANCHOR31
-	.word	.LANCHOR44
+.L2349:
+	.word	.LANCHOR32
+	.word	.LANCHOR46
 	.word	.LANCHOR17
-	.word	.LANCHOR156
-	.size	fw_flash_page_prog.constprop.26, .-fw_flash_page_prog.constprop.26
+	.word	.LANCHOR159
+	.size	fw_flash_page_prog.constprop.27, .-fw_flash_page_prog.constprop.27
 	.section	.text.idb_write_data,"ax",%progbits
 	.align	1
 	.global	idb_write_data
@@ -14407,63 +14828,63 @@ fw_flash_page_prog.constprop.26:
 	.fpu softvfp
 	.type	idb_write_data, %function
 idb_write_data:
-	@ args = 0, pretend = 0, frame = 136
+	@ args = 0, pretend = 0, frame = 144
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r8, r3
-	ldr	r5, .L2444
+	ldr	r5, .L2473
 	adds	r3, r1, r3
 	cmp	r3, #63
-	sub	sp, sp, #144
+	sub	sp, sp, #152
 	mov	r4, r1
 	mov	r7, r2
 	ldr	r6, [r5]
-	bls	.L2328
+	bls	.L2352
 	cmp	r1, #576
-	bcs	.L2329
-	cbnz	r6, .L2330
+	bcs	.L2353
+	cbnz	r6, .L2354
 	mov	r0, #262144
 	bl	ftl_malloc
 	str	r0, [r5]
-	cbnz	r0, .L2331
-.L2336:
+	cbnz	r0, .L2355
+.L2360:
 	mov	r0, #-1
-.L2327:
-	add	sp, sp, #144
+.L2351:
+	add	sp, sp, #152
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2331:
+.L2355:
 	mov	r2, #262144
 	mov	r1, r6
 	bl	ftl_memset
-.L2330:
-	ldr	r6, .L2444+4
+.L2354:
+	ldr	r6, .L2473+4
 	ldr	r3, [r6]
-	cbz	r3, .L2333
-.L2337:
-	ldr	r3, .L2444+8
+	cbz	r3, .L2357
+.L2361:
+	ldr	r3, .L2473+8
 	cmp	r4, #64
 	mov	r2, #1
 	ldr	r0, [r5]
 	str	r2, [r3]
-	bhi	.L2438
+	bhi	.L2467
 	rsb	r1, r4, #64
 	sub	r2, r8, r1
 	add	r1, r7, r1, lsl #9
 	lsls	r2, r2, #9
-.L2443:
+.L2472:
 	bl	ftl_memcpy
-.L2338:
+.L2362:
 	movs	r0, #0
-	b	.L2327
-.L2333:
+	b	.L2351
+.L2357:
 	mov	r0, #262144
 	bl	ftl_malloc
 	str	r0, [r6]
 	cmp	r0, #0
-	bne	.L2337
-	b	.L2336
-.L2438:
+	bne	.L2361
+	b	.L2360
+.L2467:
 	rsb	r2, r4, #576
 	subs	r4, r4, #64
 	cmp	r2, r8
@@ -14472,40 +14893,45 @@ idb_write_data:
 	movcs	r2, r8
 	add	r0, r0, r4, lsl #9
 	lsls	r2, r2, #9
-	b	.L2443
-.L2328:
+	b	.L2472
+.L2352:
 	cmp	r1, #576
-	bcc	.L2338
-.L2329:
-	ldr	r3, .L2444+8
+	bcc	.L2362
+.L2353:
+	ldr	r3, .L2473+8
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L2338
-	ldr	r7, .L2444+12
-	ldr	r2, .L2444+16
-	ldr	r10, .L2444+32
-	ldrb	r3, [r7]	@ zero_extendqisi2
-	ldrb	r4, [r2, #9]	@ zero_extendqisi2
+	beq	.L2362
+	ldr	r2, .L2473+12
+	ldr	r7, .L2473+16
+	ldrb	r3, [r2]	@ zero_extendqisi2
 	mov	r8, r2
-	ldrh	r5, [r2, #26]
-	str	r3, [sp, #20]
+	ldrb	r4, [r7, #9]	@ zero_extendqisi2
+	ldrh	r5, [r7, #26]
+	str	r3, [sp, #24]
+	ldr	r3, .L2473+20
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	mov	r10, r3
+	ldr	r3, [sp, #24]
+	str	r1, [sp, #32]
 	cmp	r3, #0
-	beq	.L2390
-	ldrb	r3, [r10]	@ zero_extendqisi2
-	clz	r3, r3
+	beq	.L2363
+	ldrh	r3, [sp, #24]
+	str	r3, [sp, #44]
+	clz	r3, r1
 	lsrs	r3, r3, #5
-.L2440:
+.L2469:
 	movs	r0, #0
-	str	r3, [sp, #28]
+	str	r3, [sp, #12]
 	bl	zftl_flash_exit_slc_mode
 	ldrb	r3, [r10]	@ zero_extendqisi2
-	strb	r3, [r7]
-	ldr	r3, .L2444+20
+	strb	r3, [r8]
+	ldr	r3, .L2473+24
 	ldr	r2, [r6]
 	cmp	r2, r3
-	bne	.L2341
-	ldrh	r0, [r8, #10]
-	ldrb	r1, [r8, #12]	@ zero_extendqisi2
+	bne	.L2366
+	ldrh	r0, [r7, #10]
+	ldrb	r1, [r7, #12]	@ zero_extendqisi2
 	lsls	r0, r0, #2
 	bl	__aeabi_idiv
 	cmp	r0, #512
@@ -14513,12 +14939,12 @@ idb_write_data:
 	it	ge
 	movge	r3, #512
 	add	r1, r6, #260096
-	str	r3, [sp, #32]
+	str	r3, [sp, #36]
 	movw	r2, #65023
 	movs	r3, #0
-.L2345:
+.L2370:
 	ldr	r0, [r1, #-4]!
-	cbnz	r0, .L2343
+	cbnz	r0, .L2368
 	ldr	r0, [r6, r3, lsl #2]
 	adds	r3, r3, #1
 	cmp	r3, #4096
@@ -14527,56 +14953,57 @@ idb_write_data:
 	movhi	r3, #0
 	cmp	r2, #4096
 	str	r0, [r1, #2048]
-	bne	.L2345
-.L2343:
+	bne	.L2370
+.L2368:
 	smulbb	r4, r4, r5
-	ldr	r3, [sp, #32]
+	ldr	r3, [sp, #36]
 	ldr	r1, [r6, r2, lsl #2]
-	ldr	r0, .L2444+24
+	ldr	r0, .L2473+28
 	bl	printf
 	uxth	r3, r4
-	str	r3, [sp, #68]
+	str	r3, [sp, #76]
 	movs	r3, #0
-	str	r3, [sp, #12]
-	str	r3, [sp, #24]
-.L2386:
-	ldr	r3, .L2444+4
+	str	r3, [sp, #16]
+	str	r3, [sp, #28]
+.L2411:
+	ldr	r3, .L2473+4
 	mov	r2, #512
 	movs	r1, #0
 	ldr	r0, [r3]
 	bl	ftl_memset
-	ldr	r3, .L2444+28
-	ldr	r2, [sp, #24]
+	ldr	r3, .L2473+32
+	ldr	r2, [sp, #28]
 	ldr	r3, [r3]
 	add	r3, r3, r2
 	ldrb	r3, [r3, #32]	@ zero_extendqisi2
 	cmp	r3, #255
-	beq	.L2346
-	ldr	r2, [sp, #68]
+	beq	.L2371
+	ldr	r2, [sp, #76]
 	mul	r10, r2, r3
+	ldr	r3, [sp, #12]
+	cbz	r3, .L2372
 	ldr	r3, [sp, #28]
-	cbz	r3, .L2347
-	ldr	r3, [sp, #24]
-	ldr	r5, .L2444+12
-	ldr	r4, .L2444+32
+	ldr	r5, .L2473+12
+	ldr	r4, .L2473+20
+	bic	r3, r3, #2
 	cmp	r3, #1
-	bne	.L2348
-	ldrb	r3, [sp, #20]	@ zero_extendqisi2
-.L2441:
+	bne	.L2373
+	ldrb	r3, [sp, #44]	@ zero_extendqisi2
+.L2470:
 	strb	r3, [r5]
 	strb	r3, [r4]
-.L2347:
-	ldr	r8, .L2444+16
+.L2372:
+	ldr	r8, .L2473+16
 	movs	r5, #0
-	ldr	r3, .L2444+36
+	ldr	r3, .L2473+36
 	mov	r0, r10
 	ldrb	r7, [r8, #9]	@ zero_extendqisi2
 	ldrh	r4, [r8, #26]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	mov	r1, r7
-	str	r3, [sp, #72]
+	str	r3, [sp, #80]
 	smulbb	r4, r4, r7
-	ldr	r3, .L2444+36
+	ldr	r3, .L2473+36
 	uxth	r4, r4
 	strb	r5, [r3]
 	bl	__aeabi_uidiv
@@ -14588,39 +15015,39 @@ idb_write_data:
 	bl	__aeabi_uidivmod
 	ldrh	r0, [r8, #10]
 	sub	r3, r10, r1
-	str	r1, [sp, #40]
+	str	r1, [sp, #48]
 	ldrb	r1, [r8, #12]	@ zero_extendqisi2
-	str	r3, [sp, #36]
+	str	r3, [sp, #40]
 	lsls	r0, r0, #2
 	bl	__aeabi_idiv
-	ldr	r3, [sp, #36]
-	str	r0, [sp, #44]
+	ldr	r3, [sp, #40]
+	str	r0, [sp, #52]
 	cmp	r10, r3
-	bne	.L2393
-	ldr	r3, .L2444+40
+	bne	.L2419
+	ldr	r3, .L2473+40
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #9
-	bne	.L2393
-	ldr	r3, .L2444+4
+	bne	.L2419
+	ldr	r3, .L2473+4
 	mov	r2, #1024
 	mov	r1, r5
 	ldr	r4, [r3]
 	mov	r0, r4
 	bl	ftl_memset
-	ldr	r2, .L2444+44
+	ldr	r2, .L2473+44
 	movs	r3, #12
 	str	r5, [r4, #12]
 	strb	r5, [r4, #16]
 	stm	r4, {r2, r3}
-	ldr	r3, .L2444+32
+	ldr	r3, .L2473+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2350
+	cbz	r3, .L2375
 	ldrb	r3, [r8, #29]	@ zero_extendqisi2
 	strb	r3, [r4, #16]
-.L2350:
+.L2375:
 	movs	r3, #4
 	strb	r3, [r4, #17]
-	ldr	r3, .L2444+16
+	ldr	r3, .L2473+16
 	ldrb	r1, [r3, #12]	@ zero_extendqisi2
 	ldrh	r0, [r3, #10]
 	bl	__aeabi_idiv
@@ -14636,401 +15063,415 @@ idb_write_data:
 	strh	r3, [r4, #22]	@ movhi
 	strb	r2, [r4, #21]
 	bl	js_hash
-	ldr	r3, [sp, #32]
+	ldr	r3, [sp, #36]
 	str	r0, [r4, #8]
 	subs	r3, r3, #4
-	str	r3, [sp, #16]
-.L2349:
+	str	r3, [sp, #20]
+.L2374:
 	mov	r8, r6
 	mov	fp, #0
-.L2352:
-	ldr	r3, [sp, #44]
+.L2377:
+	ldr	r3, [sp, #52]
 	cmp	r3, fp
-	bhi	.L2363
-	ldr	r3, .L2444+4
+	bhi	.L2388
+	ldr	r3, .L2473+4
 	movs	r4, #0
 	mov	r0, r10
 	movs	r7, #4
 	ldr	r5, [r3]
-	ldr	r3, .L2444+16
+	ldr	r3, .L2473+16
 	ldrb	r2, [r3, #9]	@ zero_extendqisi2
 	ldrh	r1, [r3, #26]
-	str	r2, [sp, #60]
-	ldrh	r3, [sp, #60]
+	str	r2, [sp, #68]
+	ldrh	r3, [sp, #68]
 	smulbb	r1, r1, r3
-	ldr	r3, .L2444+36
+	ldr	r3, .L2473+36
 	uxth	r1, r1
 	strb	r4, [r3]
 	bl	__aeabi_uidivmod
 	sub	r3, r10, r1
-	str	r1, [sp, #36]
-	str	r3, [sp, #64]
+	str	r1, [sp, #40]
+	str	r3, [sp, #72]
 	and	r3, r1, #3
-	str	r3, [sp, #40]
-	ldr	r3, [sp, #16]
-	str	r4, [sp, #48]
-	str	r3, [sp, #52]
-.L2364:
-	ldr	r3, [sp, #52]
+	str	r3, [sp, #48]
+	ldr	r3, [sp, #20]
+	str	r4, [sp, #56]
+	str	r3, [sp, #60]
+.L2389:
+	ldr	r3, [sp, #60]
 	cmp	r4, r3
-	bcc	.L2380
-	ldr	r3, .L2444+36
-	ldrb	r2, [sp, #72]	@ zero_extendqisi2
+	bcc	.L2405
+	ldr	r3, .L2473+36
+	ldrb	r2, [sp, #80]	@ zero_extendqisi2
 	strb	r2, [r3]
-	ldr	r3, [sp, #28]
-	cbz	r3, .L2381
+	ldr	r3, [sp, #12]
+	cbz	r3, .L2406
 	movs	r0, #0
 	bl	zftl_flash_exit_slc_mode
-	ldr	r2, .L2444+12
+	ldr	r2, .L2473+12
 	movs	r3, #0
 	strb	r3, [r2]
-	ldr	r2, .L2444+32
+	ldr	r2, .L2473+20
 	strb	r3, [r2]
-.L2381:
-	ldr	r3, [sp, #16]
+.L2406:
+	ldr	r3, [sp, #20]
 	movs	r4, #0
 	lsls	r1, r3, #7
-	ldr	r3, .L2444+4
+	ldr	r3, .L2473+4
 	ldr	r0, [r3]
-.L2382:
+.L2407:
 	cmp	r4, r1
-	bne	.L2384
-	ldr	r3, [sp, #12]
+	bne	.L2409
+	ldr	r3, [sp, #16]
 	adds	r3, r3, #1
 	cmp	r3, #5
-	str	r3, [sp, #12]
-	bls	.L2346
-	b	.L2389
-.L2390:
-	ldr	r3, [sp, #20]
-	b	.L2440
-.L2348:
+	str	r3, [sp, #16]
+	bls	.L2371
+	b	.L2415
+.L2363:
+	ldr	r3, [sp, #32]
+	cmp	r3, #3
+	iteet	ne
+	ldrne	r3, [sp, #24]
+	streq	r3, [sp, #44]
+	moveq	r3, #2
+	strne	r3, [sp, #44]
+	b	.L2469
+.L2373:
 	movs	r0, #0
 	bl	zftl_flash_exit_slc_mode
 	movs	r3, #0
-	b	.L2441
-.L2393:
-	ldr	r3, [sp, #32]
-	mov	r4, r5
-	str	r3, [sp, #16]
-	b	.L2349
-.L2445:
+	b	.L2470
+.L2474:
 	.align	2
-.L2444:
-	.word	.LANCHOR135
+.L2473:
 	.word	.LANCHOR137
-	.word	.LANCHOR136
+	.word	.LANCHOR139
+	.word	.LANCHOR138
 	.word	.LANCHOR0
-	.word	.LANCHOR31
+	.word	.LANCHOR32
+	.word	.LANCHOR19
 	.word	-52655045
-	.word	.LC130
+	.word	.LC132
 	.word	.LANCHOR27
-	.word	.LANCHOR19
-	.word	.LANCHOR46
+	.word	.LANCHOR48
 	.word	.LANCHOR28
 	.word	1179535694
-.L2363:
-	ldr	r3, [sp, #40]
+.L2419:
+	ldr	r3, [sp, #36]
+	mov	r4, r5
+	str	r3, [sp, #20]
+	b	.L2374
+.L2388:
+	ldr	r3, [sp, #48]
 	add	r5, r3, fp
-	ldr	r3, .L2446
+	ldr	r3, .L2475
 	lsrs	r5, r5, #2
 	adds	r2, r5, #1
 	ldrh	r0, [r3, r2, lsl #1]
-	ldr	r3, .L2446+4
+	ldr	r3, .L2475+4
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	cmp	r1, #0
-	bne	.L2353
+	bne	.L2378
 	mov	r2, r0
-.L2354:
-	ldr	r0, .L2446+8
-	ldr	r3, .L2446
+.L2379:
+	ldr	r0, .L2475+8
+	ldr	r3, .L2475
 	ldrb	r0, [r0]	@ zero_extendqisi2
 	cmp	r0, #9
 	itt	ne
 	addne	r2, r2, #-1
 	lslne	r2, r2, #2
-	str	r2, [sp, #80]
+	str	r2, [sp, #88]
 	movw	r2, #61424
-	str	r2, [sp, #84]
+	str	r2, [sp, #92]
 	ldrh	r2, [r3, r5, lsl #1]
-	cbnz	r1, .L2358
+	cbnz	r1, .L2383
 	mov	r5, r2
-.L2359:
+.L2384:
 	mul	r0, r5, r7
-	add	r2, sp, #80
-	cbnz	r4, .L2360
-	ldr	r3, [sp, #36]
+	add	r2, sp, #88
+	cbnz	r4, .L2385
+	ldr	r3, [sp, #40]
 	mov	r1, r8
 	add	r0, r0, r3
-	bl	fw_flash_page_prog.constprop.26
-	ldr	r3, .L2446+4
+	bl	fw_flash_page_prog.constprop.27
+	ldr	r3, .L2475+4
 	ldrb	r2, [r3]	@ zero_extendqisi2
-	cbnz	r2, .L2361
+	cbnz	r2, .L2386
 	adds	r5, r5, #1
 	mov	r1, r7
 	uxth	r5, r5
-	ldr	r0, [sp, #36]
+	ldr	r0, [sp, #40]
 	bl	__aeabi_uidiv
 	mov	r2, r5
 	mov	r1, r0
 	mov	r0, r4
 	bl	id_block_prog_msb_ff_data
-.L2361:
-	ldr	r3, [sp, #16]
+.L2386:
+	ldr	r3, [sp, #20]
 	add	r8, r8, #2048
 	add	r2, r3, #16
 	cmp	fp, r2
-	bcc	.L2362
+	bcc	.L2387
 	add	r2, r3, #20
 	cmp	fp, r2
-	bcs	.L2362
+	bcs	.L2387
 	add	r8, r6, #2048
-.L2362:
+.L2387:
 	add	r3, fp, #4
 	movs	r4, #0
 	uxth	fp, r3
-	b	.L2352
-.L2353:
-	ldr	r0, .L2446+12
+	b	.L2377
+.L2378:
+	ldr	r0, .L2475+12
 	ldrb	r0, [r0]	@ zero_extendqisi2
 	cmp	r0, #0
-	beq	.L2354
+	beq	.L2379
 	lsls	r2, r2, #1
-	b	.L2354
-.L2358:
-	ldr	r2, .L2446+12
+	b	.L2379
+.L2383:
+	ldr	r2, .L2475+12
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, #0
-	beq	.L2359
+	beq	.L2384
 	lsls	r5, r5, #1
-	b	.L2359
-.L2360:
-	ldr	r3, [sp, #36]
+	b	.L2384
+.L2385:
+	ldr	r3, [sp, #40]
 	mov	r1, r4
 	add	r0, r0, r3
-	bl	fw_flash_page_prog.constprop.26
-	b	.L2362
-.L2380:
-	ldr	r3, [sp, #40]
+	bl	fw_flash_page_prog.constprop.27
+	b	.L2387
+.L2405:
+	ldr	r3, [sp, #48]
 	mov	r1, r7
 	subs	r3, r7, r3
 	uxth	r3, r3
-	str	r3, [sp, #44]
-	ldr	r3, [sp, #36]
+	str	r3, [sp, #52]
+	ldr	r3, [sp, #40]
 	adds	r0, r3, r4
 	bl	__aeabi_uidiv
-	ldr	r2, .L2446+4
+	ldr	r2, .L2475+4
 	uxth	r0, r0
-	ldr	r3, .L2446
+	ldr	r3, .L2475
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r2, #0
-	bne	.L2365
+	bne	.L2390
 	mov	r0, r3
-.L2366:
-	ldr	r3, .L2446+16
-	ldr	r2, [sp, #64]
+.L2391:
+	ldr	r3, .L2475+16
+	ldr	r2, [sp, #72]
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	str	r3, [sp, #56]
-	ldr	r3, [sp, #40]
+	str	r3, [sp, #64]
+	ldr	r3, [sp, #48]
 	add	r3, r3, r2
-	ldr	r2, .L2446+20
+	ldr	r2, .L2475+20
 	ldrb	r1, [r2, #9]	@ zero_extendqisi2
-	ldr	r2, [sp, #60]
+	ldr	r2, [sp, #68]
 	mla	r0, r0, r2, r3
 	bl	__aeabi_uidiv
-	ldr	r3, .L2446+24
+	ldr	r3, .L2475+24
 	mov	r8, r0
-	ldr	r0, [sp, #56]
+	ldr	r0, [sp, #64]
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	str	r3, [sp, #76]
+	str	r3, [sp, #84]
 	bl	nandc_bch_sel
-.L2367:
+.L2392:
 	str	r7, [sp]
-	add	r3, sp, #80
+	add	r3, sp, #88
 	mov	r2, r5
 	mov	r1, r8
 	movs	r0, #0
 	bl	flash_read_page
 	adds	r0, r0, #1
-	bne	.L2368
-	ldr	r3, .L2446+28
+	bne	.L2393
+	ldr	r3, .L2475+28
 	ldrb	fp, [r3]	@ zero_extendqisi2
 	cmp	fp, #0
-	bne	.L2369
-.L2372:
-	ldr	r3, .L2446+32
+	bne	.L2394
+.L2397:
+	ldr	r3, .L2475+32
 	ldr	fp, [r3]
 	cmp	fp, #0
-	bne	.L2370
-.L2371:
-	ldr	r3, .L2446+36
+	bne	.L2395
+.L2396:
+	ldr	r3, .L2475+36
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2374
+	cbz	r3, .L2399
 	str	r7, [sp]
-	add	r3, sp, #80
+	add	r3, sp, #88
 	mov	r2, r5
 	mov	r1, r8
 	movs	r0, #0
 	bl	flash_ddr_tuning_read
 	adds	r0, r0, #1
-	bne	.L2368
-.L2374:
-	ldr	r3, [sp, #56]
+	bne	.L2393
+.L2399:
+	ldr	r3, [sp, #64]
 	cmp	r3, #16
-	bne	.L2375
+	bne	.L2400
 	mov	r8, #-1
-.L2376:
-	ldr	r0, [sp, #76]
+.L2401:
+	ldr	r0, [sp, #84]
 	bl	nandc_bch_sel
-	ldr	r3, [sp, #48]
+	ldr	r3, [sp, #56]
 	cmp	r8, #0
 	it	ne
 	movne	r3, #-1
-	str	r3, [sp, #48]
-	ldr	r3, [sp, #64]
+	str	r3, [sp, #56]
+	ldr	r3, [sp, #72]
 	cmp	r10, r3
-	bne	.L2378
+	bne	.L2403
 	cmp	r4, #0
-	bne	.L2378
-	ldr	r3, [sp, #48]
+	bne	.L2403
+	ldr	r3, [sp, #56]
 	cmp	r3, #0
-	bne	.L2378
+	bne	.L2403
 	ldr	r2, [r5]
-	ldr	r3, .L2446+40
+	ldr	r3, .L2475+40
 	cmp	r2, r3
-	bne	.L2378
-	ldr	r3, [sp, #52]
-	ldr	r2, [sp, #44]
+	bne	.L2403
+	ldr	r3, [sp, #60]
+	ldr	r2, [sp, #52]
 	ldrb	r7, [r5, #17]	@ zero_extendqisi2
 	add	r3, r3, r2
-	str	r3, [sp, #52]
-.L2379:
-	ldr	r3, [sp, #44]
+	str	r3, [sp, #60]
+.L2404:
+	ldr	r3, [sp, #52]
 	add	r3, r3, r4
 	uxth	r4, r3
-	b	.L2364
-.L2365:
-	ldr	r3, .L2446+12
+	b	.L2389
+.L2390:
+	ldr	r3, .L2475+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L2366
+	beq	.L2391
 	lsls	r0, r0, #1
-	b	.L2366
-.L2369:
-	ldr	r3, .L2446+28
+	b	.L2391
+.L2394:
+	ldr	r3, .L2475+28
 	movs	r0, #0
 	mov	r2, r5
 	mov	r1, r8
 	strb	r0, [r3]
-	add	r3, sp, #80
+	add	r3, sp, #88
 	str	r7, [sp]
 	bl	flash_read_page
-	ldr	r3, .L2446+28
+	ldr	r3, .L2475+28
 	adds	r0, r0, #1
 	strb	fp, [r3]
-	beq	.L2372
-.L2368:
+	beq	.L2397
+.L2393:
 	mov	r8, #0
-	b	.L2376
-.L2370:
+	b	.L2401
+.L2395:
 	str	r7, [sp]
-	add	r3, sp, #80
+	add	r3, sp, #88
 	mov	r2, r5
 	mov	r1, r8
 	movs	r0, #0
 	blx	fp
 	adds	r0, r0, #1
-	beq	.L2371
-	b	.L2368
-.L2375:
+	beq	.L2396
+	b	.L2393
+.L2400:
 	movs	r0, #16
 	bl	nandc_bch_sel
 	movs	r3, #16
-	str	r3, [sp, #56]
-	b	.L2367
-.L2378:
-	ldr	r3, [sp, #44]
+	str	r3, [sp, #64]
+	b	.L2392
+.L2403:
+	ldr	r3, [sp, #52]
 	add	r5, r5, r3, lsl #9
 	movs	r3, #0
-	str	r3, [sp, #40]
-	b	.L2379
-.L2384:
+	str	r3, [sp, #48]
+	b	.L2404
+.L2409:
 	ldr	r2, [r0, r4, lsl #2]
 	ldr	r3, [r6, r4, lsl #2]
 	cmp	r2, r3
-	beq	.L2383
+	beq	.L2408
 	mov	r2, #512
 	movs	r1, #0
 	bl	ftl_memset
 	mov	r1, r4
-	ldr	r0, .L2446+44
+	ldr	r0, .L2475+44
 	bl	printf
 	mov	r1, r10
 	movs	r0, #0
 	bl	flash_erase_block
-.L2346:
-	ldr	r3, [sp, #24]
+.L2371:
+	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
 	cmp	r3, #4
-	str	r3, [sp, #24]
-	bne	.L2386
-.L2389:
-	ldrb	r2, [sp, #20]	@ zero_extendqisi2
+	str	r3, [sp, #28]
+	bne	.L2411
+.L2415:
 	movs	r0, #0
-	ldr	r3, .L2446+48
+	bl	zftl_flash_exit_slc_mode
+	ldr	r3, .L2475+48
+	ldrb	r2, [sp, #24]	@ zero_extendqisi2
+	strb	r2, [r3]
+	ldr	r3, [sp, #12]
+	cbz	r3, .L2412
+	ldr	r3, .L2475+4
+	ldrb	r2, [sp, #32]	@ zero_extendqisi2
 	strb	r2, [r3]
+.L2412:
+	ldr	r3, .L2475+52
 	movs	r2, #2
-	ldr	r3, .L2446+52
+	movs	r0, #0
 	strb	r2, [r3]
 	bl	zftl_flash_enter_slc_mode
-	ldr	r3, [sp, #12]
-	cbnz	r3, .L2341
+	ldr	r3, [sp, #16]
+	cbnz	r3, .L2366
 	mov	r1, r3
-	ldr	r0, .L2446+56
+	ldr	r0, .L2475+56
 	bl	printf
-.L2341:
-	ldr	r4, .L2446+60
+.L2366:
+	ldr	r4, .L2475+60
 	movs	r5, #0
-	ldr	r3, .L2446+64
+	ldr	r3, .L2475+64
 	ldr	r0, [r4]
 	str	r5, [r3]
-	cbz	r0, .L2388
+	cbz	r0, .L2414
 	bl	free
 	str	r5, [r4]
-.L2388:
-	ldr	r4, .L2446+68
+.L2414:
+	ldr	r4, .L2475+68
 	ldr	r0, [r4]
 	cmp	r0, #0
-	beq	.L2338
+	beq	.L2362
 	bl	free
 	movs	r0, #0
 	str	r0, [r4]
-	b	.L2327
-.L2383:
+	b	.L2351
+.L2408:
 	adds	r4, r4, #1
-	b	.L2382
-.L2447:
+	b	.L2407
+.L2476:
 	.align	2
-.L2446:
+.L2475:
 	.word	.LANCHOR3
 	.word	.LANCHOR19
 	.word	.LANCHOR28
 	.word	.LANCHOR1
 	.word	.LANCHOR17
-	.word	.LANCHOR31
-	.word	.LANCHOR44
+	.word	.LANCHOR32
 	.word	.LANCHOR46
-	.word	.LANCHOR162
+	.word	.LANCHOR48
+	.word	.LANCHOR165
 	.word	.LANCHOR21
 	.word	1179535694
-	.word	.LC131
+	.word	.LC133
 	.word	.LANCHOR0
-	.word	.LANCHOR32
-	.word	.LC132
-	.word	.LANCHOR135
-	.word	.LANCHOR136
+	.word	.LANCHOR33
+	.word	.LC134
 	.word	.LANCHOR137
+	.word	.LANCHOR138
+	.word	.LANCHOR139
 	.size	idb_write_data, .-idb_write_data
 	.section	.text.flash_start_tlc_page_prog,"ax",%progbits
 	.align	1
@@ -15045,33 +15486,39 @@ flash_start_tlc_page_prog:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	fp, r3
-	ldr	r3, .L2454
-	add	r5, sp, #40
+	mov	r7, r2
+	ldr	r3, [sp, #44]
 	mov	r4, r0
 	mov	r6, r1
-	mov	r7, r2
-	ldm	r5, {r5, r8, r10}
-	ldrb	r3, [r3]	@ zero_extendqisi2
+	ldr	r2, .L2484
+	str	r3, [sp]
+	ldr	r5, [sp, #40]
+	ldrb	r3, [r2]	@ zero_extendqisi2
+	mov	r8, r2
+	ldr	r10, [sp, #48]
 	cmp	r3, fp
-	bhi	.L2449
-	movw	r2, #727
-	ldr	r1, .L2454+4
-	ldr	r0, .L2454+8
+	bhi	.L2478
+	mov	r2, #740
+	ldr	r1, .L2484+4
+	ldr	r0, .L2484+8
 	bl	printf
-.L2449:
-	ldr	r3, .L2454+12
+.L2478:
+	ldrb	r3, [r8]	@ zero_extendqisi2
+	cmp	r3, fp
+	bls	.L2477
+	ldr	r3, .L2484+12
 	ldrb	fp, [r3, fp]	@ zero_extendqisi2
-	ldr	r3, .L2454+16
+	ldr	r3, .L2484+16
 	mov	r0, fp
 	ldr	r3, [r3]
 	lsl	fp, fp, #8
 	str	r3, [sp, #4]
 	bl	nandc_cs
 	ldr	r3, [sp, #4]
-	cbz	r4, .L2450
+	cbz	r4, .L2480
 	add	r2, r3, fp
 	str	r4, [r2, #2056]
-.L2450:
+.L2480:
 	add	fp, fp, r3
 	movs	r3, #128
 	str	r6, [fp, #2056]
@@ -15089,9 +15536,9 @@ flash_start_tlc_page_prog:
 	subs	r0, r5, #1
 	add	r0, r0, r6
 	bl	nandc_set_seed
-	ldr	r1, .L2454+20
+	ldr	r1, .L2484+20
 	mov	r3, r10
-	mov	r2, r8
+	ldr	r2, [sp]
 	movs	r0, #1
 	ldrb	r1, [r1, #9]	@ zero_extendqisi2
 	bl	nandc_xfer_start
@@ -15100,16 +15547,20 @@ flash_start_tlc_page_prog:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
-	b	nandc_de_cs.constprop.29
-.L2455:
+	b	nandc_de_cs.constprop.30
+.L2477:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2485:
 	.align	2
-.L2454:
+.L2484:
 	.word	.LANCHOR18
-	.word	.LANCHOR170
+	.word	.LANCHOR173
 	.word	.LC0
 	.word	.LANCHOR30
 	.word	.LANCHOR13
-	.word	.LANCHOR31
+	.word	.LANCHOR32
 	.size	flash_start_tlc_page_prog, .-flash_start_tlc_page_prog
 	.section	.text.queue_tlc_prog_cmd,"ax",%progbits
 	.align	1
@@ -15121,63 +15572,74 @@ flash_start_tlc_page_prog:
 queue_tlc_prog_cmd:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, lr}
-	mov	r4, r0
-	ldr	r3, [r0]
-	movs	r1, #1
-	ldr	r2, [r3, #12]
-	ldr	r5, [r3, #24]
-	ldrb	r0, [r3, #44]	@ zero_extendqisi2
-	str	r2, [sp, #8]
+	ldr	r3, .L2487
+	push	{r4, r5, r6, r7, lr}
+	mov	r6, r0
+	ldr	r2, [r0]
+	movs	r7, #1
+	sub	sp, sp, #20
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	ldr	r1, [r2, #24]
+	rsb	r0, r3, #24
+	lsl	r5, r7, r0
+	lsl	r4, r7, r3
+	ldr	r3, [r2, #12]
+	subs	r5, r5, #1
+	subs	r4, r4, #1
+	ands	r5, r5, r1
+	lsrs	r1, r1, r0
+	ldrb	r0, [r2, #44]	@ zero_extendqisi2
+	ands	r4, r4, r1
+	str	r3, [sp, #8]
+	ldr	r3, [r2, #4]
+	uxtb	r4, r4
+	mov	r1, r7
+	str	r5, [sp]
 	movs	r2, #26
-	ldr	r3, [r3, #4]
-	ubfx	r6, r5, #0, #21
-	ubfx	r5, r5, #21, #3
-	str	r6, [sp]
 	str	r3, [sp, #4]
-	mov	r3, r5
+	mov	r3, r4
 	bl	flash_start_tlc_page_prog
 	bl	nandc_wait_flash_ready
-	ldm	r4, {r2, r3}
+	ldm	r6, {r2, r3}
 	movs	r1, #2
 	ldrb	r0, [r2, #44]	@ zero_extendqisi2
 	ldr	r2, [r3, #12]
 	str	r2, [sp, #8]
 	movs	r2, #26
 	ldr	r3, [r3, #4]
-	str	r6, [sp]
+	str	r5, [sp]
 	str	r3, [sp, #4]
-	mov	r3, r5
+	mov	r3, r4
 	bl	flash_start_tlc_page_prog
 	bl	nandc_wait_flash_ready
-	ldr	r3, [r4, #8]
+	ldr	r3, [r6, #8]
 	movs	r1, #3
-	ldr	r2, [r4]
+	ldr	r2, [r6]
 	ldrb	r0, [r2, #44]	@ zero_extendqisi2
 	ldr	r2, [r3, #12]
 	str	r2, [sp, #8]
 	movs	r2, #16
 	ldr	r3, [r3, #4]
-	str	r6, [sp]
+	str	r5, [sp]
 	str	r3, [sp, #4]
-	mov	r3, r5
+	mov	r3, r4
 	bl	flash_start_tlc_page_prog
-	ldr	r1, [r4]
+	ldr	r1, [r6]
 	movs	r3, #4
-	ldr	r0, .L2457
+	ldr	r0, .L2487+4
 	strb	r3, [r1, #42]
-	movs	r3, #1
-	strb	r3, [r1, #43]
 	movs	r3, #255
+	strb	r7, [r1, #43]
 	strb	r3, [r1]
-	add	sp, sp, #16
+	add	sp, sp, #20
 	@ sp needed
-	pop	{r4, r5, r6, lr}
+	pop	{r4, r5, r6, r7, lr}
 	b	buf_add_tail
-.L2458:
+.L2488:
 	.align	2
-.L2457:
-	.word	.LANCHOR54
+.L2487:
+	.word	.LANCHOR31
+	.word	.LANCHOR56
 	.size	queue_tlc_prog_cmd, .-queue_tlc_prog_cmd
 	.section	.text.sblk_tlc_prog_one_page,"ax",%progbits
 	.align	1
@@ -15194,20 +15656,20 @@ sblk_tlc_prog_one_page:
 	push	{r4, r5, r6, lr}
 	mov	r5, r0
 	ldr	r6, [r3, #24]
-.L2460:
+.L2490:
 	movs	r1, #1
 	mov	r0, r6
 	bl	queue_lun_state
 	mov	r4, r0
-	cbnz	r0, .L2461
+	cbnz	r0, .L2491
 	mov	r0, r5
 	bl	queue_tlc_prog_cmd
 	mov	r0, r4
 	pop	{r4, r5, r6, pc}
-.L2461:
+.L2491:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2460
+	b	.L2490
 	.size	sblk_tlc_prog_one_page, .-sblk_tlc_prog_one_page
 	.section	.text.sblk_xlc_prog_pages,"ax",%progbits
 	.align	1
@@ -15220,42 +15682,51 @@ sblk_tlc_prog_one_page:
 sblk_xlc_prog_pages:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r5, r0
 	ldr	r3, [r0]
-	push	{r4, r5, r6, r7, r8, r10, lr}
-	mov	r4, r0
-	sub	sp, sp, #20
-	mov	r7, r1
-	mov	r10, r2
-	ldr	r5, [r3, #24]
-.L2463:
+	mov	r8, r1
+	mov	fp, r2
+	ldr	r4, [r3, #24]
+.L2493:
 	movs	r1, #1
-	mov	r0, r5
+	mov	r0, r4
 	bl	queue_lun_state
 	cmp	r0, #0
-	bne	.L2464
-	cmp	r10, #2
-	bne	.L2465
-	ldr	r2, [r7]
-	movs	r1, #1
-	ldr	r3, [r4]
-	ldr	r6, [r2, #24]
-	ldr	r2, [r3, #12]
-	ldr	r5, [r3, #24]
-	ldrb	r0, [r3, #44]	@ zero_extendqisi2
-	ubfx	r6, r6, #0, #21
-	str	r2, [sp, #8]
+	bne	.L2494
+	cmp	fp, #2
+	bne	.L2495
+	ldr	r3, .L2497
+	movs	r7, #1
+	ldr	r2, [r5]
+	ldr	r0, [r8]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	ldr	r1, [r2, #24]
+	ldr	r0, [r0, #24]
+	rsb	ip, r3, #24
+	lsl	r6, r7, ip
+	lsl	r4, r7, r3
+	ldr	r3, [r2, #12]
+	subs	r6, r6, #1
+	subs	r4, r4, #1
+	and	r10, r1, r6
+	lsr	r1, r1, ip
+	ands	r6, r6, r0
+	ldrb	r0, [r2, #44]	@ zero_extendqisi2
+	ands	r4, r4, r1
+	str	r3, [sp, #8]
+	ldr	r3, [r2, #4]
+	uxtb	r4, r4
 	movs	r2, #17
-	ldr	r3, [r3, #4]
-	ubfx	r8, r5, #0, #21
-	ubfx	r5, r5, #21, #3
-	str	r8, [sp]
+	str	r10, [sp]
+	mov	r1, r7
 	str	r3, [sp, #4]
-	mov	r3, r5
+	mov	r3, r4
 	bl	flash_start_tlc_page_prog
 	bl	nandc_wait_flash_ready
-	ldr	r3, [r7]
-	movs	r1, #1
-	ldr	r2, [r4]
+	ldr	r3, [r8]
+	mov	r1, r7
+	ldr	r2, [r5]
 	ldrb	r0, [r2, #44]	@ zero_extendqisi2
 	ldr	r2, [r3, #12]
 	str	r2, [sp, #8]
@@ -15263,24 +15734,24 @@ sblk_xlc_prog_pages:
 	ldr	r3, [r3, #4]
 	str	r6, [sp]
 	str	r3, [sp, #4]
-	mov	r3, r5
+	mov	r3, r4
 	bl	flash_start_tlc_page_prog
 	bl	nandc_wait_flash_ready
-	ldm	r4, {r2, r3}
-	mov	r1, r10
+	ldm	r5, {r2, r3}
+	mov	r1, fp
 	ldrb	r0, [r2, #44]	@ zero_extendqisi2
 	ldr	r2, [r3, #12]
 	str	r2, [sp, #8]
 	movs	r2, #17
 	ldr	r3, [r3, #4]
-	str	r8, [sp]
+	str	r10, [sp]
 	str	r3, [sp, #4]
-	mov	r3, r5
+	mov	r3, r4
 	bl	flash_start_tlc_page_prog
 	bl	nandc_wait_flash_ready
-	ldr	r3, [r7, #4]
-	mov	r1, r10
-	ldr	r2, [r4]
+	ldr	r3, [r8, #4]
+	mov	r1, fp
+	ldr	r2, [r5]
 	ldrb	r0, [r2, #44]	@ zero_extendqisi2
 	ldr	r2, [r3, #12]
 	str	r2, [sp, #8]
@@ -15288,25 +15759,25 @@ sblk_xlc_prog_pages:
 	ldr	r3, [r3, #4]
 	str	r6, [sp]
 	str	r3, [sp, #4]
-	mov	r3, r5
+	mov	r3, r4
 	bl	flash_start_tlc_page_prog
 	bl	nandc_wait_flash_ready
-	ldr	r3, [r4, #8]
+	ldr	r3, [r5, #8]
 	movs	r1, #3
-	ldr	r2, [r4]
+	ldr	r2, [r5]
 	ldrb	r0, [r2, #44]	@ zero_extendqisi2
 	ldr	r2, [r3, #12]
 	str	r2, [sp, #8]
 	movs	r2, #17
 	ldr	r3, [r3, #4]
-	str	r8, [sp]
+	str	r10, [sp]
 	str	r3, [sp, #4]
-	mov	r3, r5
+	mov	r3, r4
 	bl	flash_start_tlc_page_prog
 	bl	nandc_wait_flash_ready
-	ldr	r3, [r7, #8]
+	ldr	r3, [r8, #8]
 	movs	r1, #3
-	ldr	r2, [r4]
+	ldr	r2, [r5]
 	ldrb	r0, [r2, #44]	@ zero_extendqisi2
 	ldr	r2, [r3, #12]
 	str	r2, [sp, #8]
@@ -15314,34 +15785,34 @@ sblk_xlc_prog_pages:
 	ldr	r3, [r3, #4]
 	str	r6, [sp]
 	str	r3, [sp, #4]
-	mov	r3, r5
+	mov	r3, r4
 	bl	flash_start_tlc_page_prog
-	ldr	r1, [r4]
+	ldr	r1, [r5]
 	movs	r3, #5
-	ldr	r0, .L2467
+	ldr	r0, .L2497+4
 	strb	r3, [r1, #42]
-	movs	r3, #1
-	strb	r3, [r1, #43]
 	movs	r3, #255
+	strb	r7, [r1, #43]
 	strb	r3, [r1]
 	bl	buf_add_tail
-.L2466:
+.L2496:
 	movs	r0, #0
-	add	sp, sp, #20
+	add	sp, sp, #16
 	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L2464:
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2494:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2463
-.L2465:
-	mov	r0, r4
+	b	.L2493
+.L2495:
+	mov	r0, r5
 	bl	queue_tlc_prog_cmd
-	b	.L2466
-.L2468:
+	b	.L2496
+.L2498:
 	.align	2
-.L2467:
-	.word	.LANCHOR54
+.L2497:
+	.word	.LANCHOR31
+	.word	.LANCHOR56
 	.size	sblk_xlc_prog_pages, .-sblk_xlc_prog_pages
 	.section	.text.sblk_3d_tlc_dump_prog,"ax",%progbits
 	.align	1
@@ -15354,58 +15825,70 @@ sblk_xlc_prog_pages:
 sblk_3d_tlc_dump_prog:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, lr}
-	mov	r4, r0
+	ldr	r2, .L2500
+	push	{r4, r5, r6, r7, lr}
+	movs	r7, #1
 	ldr	r3, [r0, #24]
-	ldr	r0, .L2470
-	ubfx	r5, r3, #0, #21
+	sub	sp, sp, #20
+	mov	r5, r0
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	ldr	r0, .L2500+4
+	rsb	r1, r2, #24
+	lsl	r6, r7, r1
+	lsl	r4, r7, r2
+	lsr	r1, r3, r1
+	subs	r6, r6, #1
+	ands	r6, r6, r3
+	subs	r4, r4, #1
 	mov	r2, r3
-	mov	r1, r5
-	ubfx	r6, r3, #21, #3
+	ands	r4, r4, r1
+	mov	r1, r6
+	uxtb	r4, r4
 	bl	printf
-	ldr	r3, [r4, #12]
+	ldr	r3, [r5, #12]
+	mov	r1, r7
 	movs	r2, #26
-	movs	r1, #1
-	str	r5, [sp]
+	str	r6, [sp]
 	movs	r0, #0
 	str	r3, [sp, #8]
-	ldr	r3, [r4, #4]
+	ldr	r3, [r5, #4]
 	str	r3, [sp, #4]
-	mov	r3, r6
+	mov	r3, r4
 	bl	flash_start_tlc_page_prog
 	bl	nandc_wait_flash_ready
-	ldr	r3, [r4, #12]
+	ldr	r3, [r5, #12]
 	movs	r2, #26
 	movs	r1, #2
-	str	r5, [sp]
+	str	r6, [sp]
 	movs	r0, #0
 	str	r3, [sp, #8]
-	ldr	r3, [r4, #4]
+	ldr	r3, [r5, #4]
 	str	r3, [sp, #4]
-	mov	r3, r6
+	mov	r3, r4
 	bl	flash_start_tlc_page_prog
 	bl	nandc_wait_flash_ready
-	ldr	r3, [r4, #12]
+	ldr	r3, [r5, #12]
 	movs	r2, #16
 	movs	r1, #3
-	str	r5, [sp]
+	str	r6, [sp]
 	movs	r0, #0
 	str	r3, [sp, #8]
-	ldr	r3, [r4, #4]
+	ldr	r3, [r5, #4]
 	str	r3, [sp, #4]
-	mov	r3, r6
+	mov	r3, r4
 	bl	flash_start_tlc_page_prog
 	bl	nandc_wait_flash_ready
 	movs	r1, #64
-	ldr	r0, [r4, #24]
-	add	sp, sp, #16
+	ldr	r0, [r5, #24]
+	add	sp, sp, #20
 	@ sp needed
-	pop	{r4, r5, r6, lr}
+	pop	{r4, r5, r6, r7, lr}
 	b	flash_wait_device_ready
-.L2471:
+.L2501:
 	.align	2
-.L2470:
-	.word	.LC133
+.L2500:
+	.word	.LANCHOR31
+	.word	.LC135
 	.size	sblk_3d_tlc_dump_prog, .-sblk_3d_tlc_dump_prog
 	.section	.text.flash_start_3d_mlc_page_prog,"ax",%progbits
 	.align	1
@@ -15419,28 +15902,31 @@ flash_start_3d_mlc_page_prog:
 	@ args = 4, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
-	mov	r7, r3
-	ldr	r3, .L2474
-	mov	r6, r0
-	mov	r4, r1
 	mov	r5, r2
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, r1
-	bhi	.L2473
-	movw	r2, #757
-	ldr	r1, .L2474+4
-	ldr	r0, .L2474+8
+	ldr	r4, .L2505
+	mov	r7, r0
+	mov	r6, r1
+	mov	r8, r3
+	ldrb	r2, [r4]	@ zero_extendqisi2
+	cmp	r2, r1
+	bhi	.L2503
+	mov	r2, #772
+	ldr	r1, .L2505+4
+	ldr	r0, .L2505+8
 	bl	printf
-.L2473:
-	ldr	r3, .L2474+12
-	ldrb	r4, [r3, r4]	@ zero_extendqisi2
-	ldr	r3, .L2474+16
+.L2503:
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	cmp	r3, r6
+	bls	.L2502
+	ldr	r3, .L2505+12
+	ldrb	r4, [r3, r6]	@ zero_extendqisi2
+	ldr	r3, .L2505+16
 	mov	r0, r4
-	ldr	r8, [r3]
+	ldr	r6, [r3]
 	bl	nandc_cs
 	movs	r3, #128
 	mov	r0, r5
-	add	r4, r8, r4, lsl #8
+	add	r4, r6, r4, lsl #8
 	str	r3, [r4, #2056]
 	movs	r3, #0
 	str	r3, [r4, #2052]
@@ -15452,24 +15938,25 @@ flash_start_3d_mlc_page_prog:
 	lsrs	r3, r5, #16
 	str	r3, [r4, #2052]
 	bl	nandc_set_seed
-	ldr	r1, .L2474+20
-	mov	r2, r7
+	ldr	r1, .L2505+20
+	mov	r2, r8
 	ldr	r3, [sp, #24]
 	movs	r0, #1
 	ldrb	r1, [r1, #9]	@ zero_extendqisi2
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
-	str	r6, [r4, #2056]
+	str	r7, [r4, #2056]
+.L2502:
 	pop	{r4, r5, r6, r7, r8, pc}
-.L2475:
+.L2506:
 	.align	2
-.L2474:
+.L2505:
 	.word	.LANCHOR18
-	.word	.LANCHOR171
+	.word	.LANCHOR174
 	.word	.LC0
 	.word	.LANCHOR30
 	.word	.LANCHOR13
-	.word	.LANCHOR31
+	.word	.LANCHOR32
 	.size	flash_start_3d_mlc_page_prog, .-flash_start_3d_mlc_page_prog
 	.section	.text.sblk_3d_mlc_prog_pages,"ax",%progbits
 	.align	1
@@ -15482,61 +15969,79 @@ flash_start_3d_mlc_page_prog:
 sblk_3d_mlc_prog_pages:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, [r0]
-	push	{r0, r1, r2, r4, r5, r6, r7, lr}
-	mov	r5, r0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r7, r1
+	ldr	r10, .L2512
+	add	r5, r0, #8
+	ldr	fp, .L2512+4
+.L2508:
+	cbnz	r7, .L2511
+	mov	r0, r7
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2511:
+	ldr	r3, [r5, #-8]
 	ldr	r4, [r3, #24]
-.L2477:
+.L2509:
 	movs	r1, #1
 	mov	r0, r4
 	bl	queue_lun_state
-	mov	r6, r0
-	cbnz	r0, .L2478
-	ldr	r3, [r5]
-	ldr	r4, [r3, #24]
-	ubfx	r7, r4, #0, #21
-	ubfx	r4, r4, #21, #3
-	mov	r0, r4
-	bl	zftl_flash_exit_slc_mode
-	ldr	r3, [r5]
-	mov	r1, r4
-	movs	r0, #16
-	ldr	r2, [r3, #12]
-	str	r2, [sp]
-	mov	r2, r7
+	cmp	r0, #0
+	bne	.L2510
+	ldr	r3, [r5, #-8]
+	mov	r8, #1
+	subs	r7, r7, #1
+	adds	r5, r5, #8
+	ldr	r2, [r3, #24]
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	rsb	r1, r3, #24
+	lsl	r6, r8, r1
+	lsl	r4, r8, r3
+	subs	r6, r6, #1
+	subs	r4, r4, #1
+	ands	r6, r6, r2
+	lsrs	r2, r2, r1
+	ands	r4, r4, r2
+	uxtb	r4, r4
+	mov	r0, r4
+	bl	zftl_flash_exit_slc_mode
+	ldr	r3, [r5, #-16]
+	mov	r1, r4
+	movs	r0, #16
+	ldr	r2, [r3, #12]
+	str	r2, [sp]
+	mov	r2, r6
 	ldr	r3, [r3, #4]
 	bl	flash_start_3d_mlc_page_prog
 	bl	nandc_wait_flash_ready
-	ldr	r3, [r5, #4]
+	ldr	r3, [r5, #-12]
 	mov	r1, r4
 	movs	r0, #16
 	ldr	r2, [r3, #12]
 	str	r2, [sp]
-	adds	r2, r7, #1
+	add	r2, r6, r8
 	ldr	r3, [r3, #4]
 	bl	flash_start_3d_mlc_page_prog
-	bl	nandc_de_cs.constprop.29
-	ldr	r1, [r5]
+	bl	nandc_de_cs.constprop.30
+	ldr	r1, [r5, #-16]
 	movs	r3, #4
-	ldr	r0, .L2479
+	mov	r0, fp
 	strb	r3, [r1, #42]
-	movs	r3, #1
-	strb	r3, [r1, #43]
 	movs	r3, #255
+	strb	r8, [r1, #43]
 	strb	r3, [r1]
 	bl	buf_add_tail
-	mov	r0, r6
-	add	sp, sp, #12
-	@ sp needed
-	pop	{r4, r5, r6, r7, pc}
-.L2478:
+	b	.L2508
+.L2510:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2477
-.L2480:
+	b	.L2509
+.L2513:
 	.align	2
-.L2479:
-	.word	.LANCHOR54
+.L2512:
+	.word	.LANCHOR31
+	.word	.LANCHOR56
 	.size	sblk_3d_mlc_prog_pages, .-sblk_3d_mlc_prog_pages
 	.section	.text.sblk_mlc_dump_prog,"ax",%progbits
 	.align	1
@@ -15549,45 +16054,56 @@ sblk_3d_mlc_prog_pages:
 sblk_mlc_dump_prog:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2515
 	push	{r0, r1, r4, r5, r6, lr}
-	mov	r4, r0
-	ldr	r5, [r0, #24]
-	ubfx	r6, r5, #0, #21
-	ubfx	r5, r5, #21, #3
-	mov	r0, r5
+	mov	r5, r0
+	ldr	r2, [r0, #24]
+	ldrb	r4, [r3]	@ zero_extendqisi2
+	movs	r3, #1
+	rsb	r1, r4, #24
+	lsl	r6, r3, r1
+	lsl	r4, r3, r4
+	subs	r6, r6, #1
+	subs	r4, r4, #1
+	ands	r6, r6, r2
+	lsrs	r2, r2, r1
+	ands	r4, r4, r2
+	uxtb	r4, r4
+	mov	r0, r4
 	bl	zftl_flash_exit_slc_mode
-	ldr	r2, [r4, #24]
+	ldr	r2, [r5, #24]
 	mov	r1, r6
-	ldr	r0, .L2482
+	ldr	r0, .L2515+4
 	adds	r3, r2, #1
 	bl	printf
-	ldr	r3, [r4, #12]
+	ldr	r3, [r5, #12]
 	mov	r2, r6
-	mov	r1, r5
+	mov	r1, r4
 	movs	r0, #16
 	str	r3, [sp]
-	ldr	r3, [r4, #4]
+	ldr	r3, [r5, #4]
 	bl	flash_start_3d_mlc_page_prog
 	bl	nandc_wait_flash_ready
-	ldr	r3, [r4, #12]
+	ldr	r3, [r5, #12]
 	adds	r2, r6, #1
-	mov	r1, r5
+	mov	r1, r4
 	movs	r0, #16
 	str	r3, [sp]
-	ldr	r3, [r4, #4]
+	ldr	r3, [r5, #4]
 	bl	flash_start_3d_mlc_page_prog
 	bl	nandc_wait_flash_ready
 	movs	r1, #64
-	ldr	r0, [r4, #24]
+	ldr	r0, [r5, #24]
 	bl	flash_wait_device_ready
-	bl	nandc_de_cs.constprop.29
+	bl	nandc_de_cs.constprop.30
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, pc}
-.L2483:
+.L2516:
 	.align	2
-.L2482:
-	.word	.LC134
+.L2515:
+	.word	.LANCHOR31
+	.word	.LC136
 	.size	sblk_mlc_dump_prog, .-sblk_mlc_dump_prog
 	.section	.text.flash_start_page_prog,"ax",%progbits
 	.align	1
@@ -15602,95 +16118,114 @@ flash_start_page_prog:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	fp, r2
-	ldr	r2, .L2493
-	ubfx	r7, r1, #21, #3
-	mov	r10, r3
-	ubfx	r5, r1, #0, #21
-	ubfx	r3, r1, #24, #2
-	str	r0, [sp, #4]
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	mov	r8, r2
-	str	r3, [sp]
-	cmp	r1, r7
-	bhi	.L2485
-	mov	r2, #804
-	ldr	r1, .L2493+4
-	ldr	r0, .L2493+8
+	str	r3, [sp, #4]
+	mov	r8, r1
+	ldr	r3, .L2527
+	ldr	r7, .L2527+4
+	str	r0, [sp]
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	movs	r3, #1
+	rsb	r4, r2, #24
+	lsls	r3, r3, r2
+	lsr	r2, r1, r4
+	subs	r3, r3, #1
+	ands	r3, r3, r2
+	ldrb	r2, [r7]	@ zero_extendqisi2
+	uxtb	r10, r3
+	cmp	r2, r10
+	bhi	.L2518
+	movw	r2, #821
+	ldr	r1, .L2527+8
+	ldr	r0, .L2527+12
 	bl	printf
-.L2485:
-	ldr	r2, .L2493+12
-	ldrb	r6, [r2, r7]	@ zero_extendqisi2
-	ldr	r2, .L2493+16
-	ldr	r4, [r2]
+.L2518:
+	ldrb	r2, [r7]	@ zero_extendqisi2
+	cmp	r2, r10
+	bls	.L2517
+	movs	r2, #1
+	lsl	r4, r2, r4
+	ldr	r2, .L2527+16
+	subs	r4, r4, #1
+	ldrb	r6, [r2, r10]	@ zero_extendqisi2
+	and	r4, r4, r8
+	ldr	r2, .L2527+20
+	ldr	r5, [r2]
 	bl	nandc_rdy_status
-	cbnz	r0, .L2486
-	ldrb	r2, [r8]	@ zero_extendqisi2
+	cbnz	r0, .L2520
+	ldrb	r2, [r7]	@ zero_extendqisi2
 	cmp	r2, #1
-	bne	.L2487
+	bne	.L2521
 	bl	nandc_wait_flash_ready
-.L2486:
+.L2520:
 	mov	r0, r6
 	bl	hynix_reconfig_rr_para
 	mov	r0, r6
 	bl	nandc_cs
-	ldr	r3, [sp]
-	cbnz	r3, .L2488
-	mov	r0, r5
+	tst	r8, #50331648
+	bne	.L2522
+	mov	r0, r4
 	bl	slc_phy_page_address_calc
-	ldr	r3, .L2493+20
-	mov	r5, r0
+	ldr	r3, .L2527+24
+	mov	r4, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2489
+	cbz	r3, .L2523
 	mov	r0, r6
 	bl	zftl_flash_enter_slc_mode
-.L2489:
-	add	r4, r4, r6, lsl #8
+.L2523:
+	add	r5, r5, r6, lsl #8
 	movs	r3, #128
-	mov	r0, r5
-	str	r3, [r4, #2056]
+	mov	r0, r4
+	str	r3, [r5, #2056]
 	movs	r3, #0
-	str	r3, [r4, #2052]
-	str	r3, [r4, #2052]
-	uxtb	r3, r5
-	str	r3, [r4, #2052]
-	lsrs	r3, r5, #8
-	str	r3, [r4, #2052]
-	lsrs	r3, r5, #16
-	str	r3, [r4, #2052]
+	str	r3, [r5, #2052]
+	str	r3, [r5, #2052]
+	uxtb	r3, r4
+	str	r3, [r5, #2052]
+	lsrs	r3, r4, #8
+	str	r3, [r5, #2052]
+	lsrs	r3, r4, #16
+	str	r3, [r5, #2052]
 	bl	nandc_set_seed
-	ldr	r1, .L2493+24
-	mov	r3, r10
+	ldr	r1, .L2527+28
 	mov	r2, fp
+	ldr	r3, [sp, #4]
 	movs	r0, #1
 	ldrb	r1, [r1, #9]	@ zero_extendqisi2
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
-	ldr	r3, [sp, #4]
-	str	r3, [r4, #2056]
+	movs	r0, #200
+	bl	udelay
+	ldr	r3, [sp]
+	str	r3, [r5, #2056]
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
-	b	nandc_de_cs.constprop.29
-.L2487:
+	b	nandc_de_cs.constprop.30
+.L2521:
 	movs	r2, #64
-	mov	r1, r5
-	mov	r0, r7
+	mov	r1, r4
+	mov	r0, r10
 	bl	flash_wait_device_ready_raw
-	b	.L2486
-.L2488:
+	b	.L2520
+.L2522:
 	mov	r0, r6
 	bl	zftl_flash_exit_slc_mode
-	b	.L2489
-.L2494:
+	b	.L2523
+.L2517:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2528:
 	.align	2
-.L2493:
+.L2527:
+	.word	.LANCHOR31
 	.word	.LANCHOR18
-	.word	.LANCHOR172
+	.word	.LANCHOR175
 	.word	.LC0
 	.word	.LANCHOR30
 	.word	.LANCHOR13
 	.word	.LANCHOR0
-	.word	.LANCHOR31
+	.word	.LANCHOR32
 	.size	flash_start_page_prog, .-flash_start_page_prog
 	.section	.text.queue_prog_cmd,"ax",%progbits
 	.align	1
@@ -15709,28 +16244,37 @@ queue_prog_cmd:
 	ldr	r1, [r0, #24]
 	movs	r0, #16
 	bl	flash_start_page_prog
-	ldr	r3, .L2503
+	ldr	r3, .L2537
 	ldr	r2, [r4, #24]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #255
-	beq	.L2496
-	ldr	r6, .L2503+4
-	ubfx	r2, r2, #21, #3
-	movs	r5, #48
-	mov	r7, r6
-.L2498:
-	mla	r1, r5, r3, r6
-	ldr	r0, [r1, #24]
-	ubfx	r0, r0, #21, #3
-	cmp	r2, r0
-	bne	.L2497
-	add	r0, r1, #42
-	ldrb	r1, [r1, #42]	@ zero_extendqisi2
-	cmp	r1, #7
-	bne	.L2497
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	cmp	r0, #255
+	beq	.L2530
+	ldr	r3, .L2537+4
+	movs	r7, #48
+	ldr	ip, .L2537+8
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	movs	r3, #1
+	mov	lr, ip
+	rsb	r6, r1, #24
+	lsls	r3, r3, r1
+	asrs	r2, r2, r6
+	subs	r3, r3, #1
+	uxth	r3, r3
+	ands	r2, r2, r3
+.L2532:
+	mla	r5, r7, r0, ip
+	ldr	r1, [r5, #24]
+	lsrs	r1, r1, r6
+	ands	r1, r1, r3
+	cmp	r2, r1
+	bne	.L2531
+	add	r1, r5, #42
+	ldrb	r5, [r5, #42]	@ zero_extendqisi2
+	cmp	r5, #7
+	bne	.L2531
 	movs	r3, #3
-	strb	r3, [r0]
-.L2496:
+	strb	r3, [r1]
+.L2530:
 	movs	r3, #3
 	mov	r1, r4
 	strb	r3, [r4, #42]
@@ -15738,20 +16282,21 @@ queue_prog_cmd:
 	strb	r3, [r4, #43]
 	movs	r3, #255
 	strb	r3, [r4]
-	ldr	r0, .L2503
+	ldr	r0, .L2537
 	pop	{r3, r4, r5, r6, r7, lr}
 	b	buf_add_tail
-.L2497:
-	muls	r3, r5, r3
-	ldrb	r3, [r7, r3]	@ zero_extendqisi2
-	cmp	r3, #255
-	bne	.L2498
-	b	.L2496
-.L2504:
+.L2531:
+	muls	r0, r7, r0
+	ldrb	r0, [lr, r0]	@ zero_extendqisi2
+	cmp	r0, #255
+	bne	.L2532
+	b	.L2530
+.L2538:
 	.align	2
-.L2503:
-	.word	.LANCHOR54
-	.word	.LANCHOR50
+.L2537:
+	.word	.LANCHOR56
+	.word	.LANCHOR31
+	.word	.LANCHOR52
 	.size	queue_prog_cmd, .-queue_prog_cmd
 	.section	.text.sblk_prog_page,"ax",%progbits
 	.align	1
@@ -15762,98 +16307,117 @@ queue_prog_cmd:
 	.fpu softvfp
 	.type	sblk_prog_page, %function
 sblk_prog_page:
-	@ args = 0, pretend = 0, frame = 0
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	ldrh	r3, [r0, #34]
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	mov	r5, r1
-	cbz	r3, .L2506
-	ldr	r3, .L2532
+	cbz	r3, .L2540
+	ldr	r3, .L2566
 	ldr	r3, [r3]
 	lsls	r3, r3, #23
-	bpl	.L2506
+	bpl	.L2540
 	mov	r2, r1
 	ldr	r1, [r0, #24]
-	ldr	r0, .L2532+4
+	ldr	r0, .L2566+4
 	bl	printf
-.L2506:
-	ldr	fp, .L2532+32
+.L2540:
+	ldr	fp, .L2566+36
 	movs	r7, #0
-.L2507:
-	cbnz	r5, .L2518
-.L2531:
+.L2541:
+	cbnz	r5, .L2552
+.L2565:
 	movs	r0, #0
+	add	sp, sp, #8
+	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2518:
+.L2552:
 	ldrb	r8, [r4]	@ zero_extendqisi2
 	ldr	r6, [r4, #24]
-.L2508:
+.L2542:
 	movs	r1, #1
 	mov	r0, r6
 	bl	queue_lun_state
-	cbnz	r0, .L2509
+	cbnz	r0, .L2543
 	cmp	r5, #1
-	beq	.L2510
-	ldr	r3, .L2532+8
+	beq	.L2544
+	ldr	r3, .L2566+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L2511
-.L2510:
+	cbnz	r3, .L2545
+.L2544:
 	mov	r0, r4
 	bl	queue_prog_cmd
-.L2512:
+.L2546:
 	subs	r5, r5, #1
-	beq	.L2531
+	beq	.L2565
+	ldr	r4, .L2566+12
 	add	r8, r8, r8, lsl #1
-	add	r4, fp, r8, lsl #4
-	b	.L2507
-.L2509:
+	add	r4, r4, r8, lsl #4
+	b	.L2541
+.L2543:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2508
-.L2511:
+	b	.L2542
+.L2545:
+	ldrb	r1, [fp]	@ zero_extendqisi2
+	movs	r2, #1
+	rsb	r3, r1, #24
+	lsls	r2, r2, r1
+	lsr	r3, r6, r3
+	subs	r2, r2, #1
+	ands	r3, r3, r2
+	uxth	r3, r3
+	str	r3, [sp, #4]
 	ldrb	r3, [r4]	@ zero_extendqisi2
-	ubfx	r10, r6, #21, #3
 	cmp	r3, #255
-	bne	.L2513
+	bne	.L2547
 	movw	r2, #583
-	ldr	r1, .L2532+12
-	ldr	r0, .L2532+16
+	ldr	r1, .L2566+16
+	ldr	r0, .L2566+20
 	bl	printf
-.L2513:
+.L2547:
+	ldr	r2, .L2566+12
+	movs	r1, #48
 	ldrb	r3, [r4]	@ zero_extendqisi2
-	movs	r2, #48
-	mla	r3, r2, r3, fp
-	ldr	ip, [r3, #24]
-	ubfx	r3, ip, #21, #3
-	cmp	r10, r3
-	bne	.L2514
-	ldr	r3, .L2532+20
 	mov	r10, #1
-	ldrh	r1, [r3]
-	ldr	r3, .L2532+24
-	lsl	r2, r10, r1
-	ldrb	r0, [r3]	@ zero_extendqisi2
-	rsb	r3, r1, #21
+	mla	r3, r1, r3, r2
+	ldr	r1, [r3, #24]
+	ldrb	r3, [fp]	@ zero_extendqisi2
+	rsb	r2, r3, #24
 	lsl	r3, r10, r3
-	subs	r2, r2, #1
-	uxth	r2, r2
-	subs	r0, r0, #1
+	lsr	r0, r1, r2
 	subs	r3, r3, #1
 	ands	r3, r3, r0
-	and	lr, r2, r6
+	ldr	r0, [sp, #4]
+	uxth	r3, r3
+	cmp	r0, r3
+	bne	.L2548
+	ldr	r3, .L2566+24
+	ldrh	r0, [r3]
+	ldr	r3, .L2566+28
+	ldrb	ip, [r3]	@ zero_extendqisi2
+	subs	r3, r2, r0
+	lsl	r2, r10, r0
+	lsl	r3, r10, r3
+	subs	r2, r2, #1
+	subs	r3, r3, #1
+	uxth	r2, r2
+	add	ip, ip, #-1
+	and	r3, r3, ip
 	uxth	r3, r3
-	lsrs	r6, r6, r1
-	lsr	r1, ip, r1
+	and	lr, r2, r6
+	ands	r2, r2, r1
+	lsrs	r6, r6, r0
+	lsrs	r1, r1, r0
 	ands	r6, r6, r3
 	ands	r1, r1, r3
-	and	r2, r2, ip
 	cmp	r6, r1
-	beq	.L2514
+	beq	.L2548
 	cmp	lr, r2
-	bne	.L2514
-	cmp	r7, r0
-	beq	.L2514
+	bne	.L2548
+	cmp	r7, ip
+	beq	.L2548
 	ldr	r3, [r4, #12]
 	movs	r0, #17
 	ldr	r2, [r4, #4]
@@ -15866,26 +16430,27 @@ sblk_prog_page:
 	movs	r3, #255
 	strb	r3, [r4]
 	mov	r1, r4
-	ldr	r0, .L2532+28
+	ldr	r0, .L2566+32
 	bl	buf_add_tail
-	b	.L2512
-.L2514:
+	b	.L2546
+.L2548:
 	mov	r0, r4
 	movs	r7, #0
 	bl	queue_prog_cmd
-	b	.L2512
-.L2533:
+	b	.L2546
+.L2567:
 	.align	2
-.L2532:
+.L2566:
 	.word	.LANCHOR14
-	.word	.LC135
-	.word	.LANCHOR39
-	.word	.LANCHOR173
+	.word	.LC137
+	.word	.LANCHOR41
+	.word	.LANCHOR52
+	.word	.LANCHOR176
 	.word	.LC0
-	.word	.LANCHOR66
-	.word	.LANCHOR67
-	.word	.LANCHOR54
-	.word	.LANCHOR50
+	.word	.LANCHOR68
+	.word	.LANCHOR69
+	.word	.LANCHOR56
+	.word	.LANCHOR31
 	.size	sblk_prog_page, .-sblk_prog_page
 	.section	.text.ftl_flush,"ax",%progbits
 	.align	1
@@ -15899,16 +16464,16 @@ ftl_flush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	ldr	r4, .L2539
-	ldr	r5, .L2539+4
+	ldr	r4, .L2573
+	ldr	r5, .L2573+4
 	ldrb	r1, [r4]	@ zero_extendqisi2
-	cbz	r1, .L2535
+	cbz	r1, .L2569
 	ldrb	r0, [r5]	@ zero_extendqisi2
-	ldr	r3, .L2539+8
+	ldr	r3, .L2573+8
 	add	r0, r0, r0, lsl #1
 	add	r0, r3, r0, lsl #4
 	bl	sblk_prog_page
-.L2535:
+.L2569:
 	movs	r3, #255
 	strb	r3, [r5]
 	movs	r3, #0
@@ -15918,12 +16483,12 @@ ftl_flush:
 	movw	r0, #65535
 	pop	{r3, r4, r5, lr}
 	b	ftl_vpn_decrement
-.L2540:
+.L2574:
 	.align	2
-.L2539:
-	.word	.LANCHOR121
-	.word	.LANCHOR174
-	.word	.LANCHOR50
+.L2573:
+	.word	.LANCHOR123
+	.word	.LANCHOR177
+	.word	.LANCHOR52
 	.size	ftl_flush, .-ftl_flush
 	.section	.text.flash_prog_page_en,"ax",%progbits
 	.align	1
@@ -15937,166 +16502,170 @@ flash_prog_page_en:
 	@ args = 8, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r8, r2
+	ldr	r7, .L2610
 	sub	sp, sp, #24
-	mov	r7, r3
+	mov	fp, r3
+	mov	r6, r0
 	ldrb	r3, [sp, #60]	@ zero_extendqisi2
-	mov	fp, r0
 	mov	r4, r1
-	mov	r8, r2
+	ldrb	r2, [r7]	@ zero_extendqisi2
 	ubfx	r5, r1, #24, #2
 	str	r3, [sp, #20]
-	ldr	r3, .L2574
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, r0
-	bhi	.L2542
-	movw	r2, #547
-	ldr	r1, .L2574+4
-	ldr	r0, .L2574+8
+	cmp	r2, r0
+	bhi	.L2576
+	movw	r2, #554
+	ldr	r1, .L2610+4
+	ldr	r0, .L2610+8
 	bl	printf
-.L2542:
-	ldr	r3, .L2574+12
-	ldrb	r3, [r3, fp]	@ zero_extendqisi2
+.L2576:
+	ldrb	r3, [r7]	@ zero_extendqisi2
+	cmp	r3, r6
+	bls	.L2587
+	ldr	r3, .L2610+12
+	ldrb	r3, [r3, r6]	@ zero_extendqisi2
 	str	r3, [sp, #12]
 	cmp	r5, #0
-	bne	.L2553
-	ldr	r3, .L2574+16
-	ldr	r10, .L2574+64
+	bne	.L2589
+	ldr	r3, .L2610+16
+	ldr	r10, .L2610+64
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2544
+	cbz	r3, .L2579
 	ldrb	r3, [r10]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L2553
-.L2544:
-	ldr	r3, .L2574+20
+	beq	.L2589
+.L2579:
+	ldr	r3, .L2610+20
 	mov	r0, r4
-	ldrh	r6, [r3]
-	mov	r1, r6
+	ldrh	r7, [r3]
+	mov	r1, r7
 	bl	__aeabi_uidiv
-	mov	r1, r6
-	mul	r5, r6, r0
+	mov	r1, r7
+	mul	r5, r7, r0
 	mov	r0, r4
 	bl	__aeabi_uidivmod
 	ldrb	r3, [r10]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L2545
+	beq	.L2580
 	add	r5, r5, r1, lsl #1
-.L2549:
-	ldr	r3, .L2574+24
+.L2584:
+	ldr	r3, .L2610+24
 	ldr	r3, [r3]
 	lsls	r1, r3, #27
-	bpl	.L2546
+	bpl	.L2581
 	mov	r3, r5
 	mov	r2, r4
 	ldr	r1, [sp, #12]
-	ldr	r0, .L2574+28
+	ldr	r0, .L2610+28
 	bl	printf
-.L2546:
+.L2581:
 	ldr	r3, [sp, #56]
 	mov	r2, r8
 	mov	r1, r5
 	ldr	r0, [sp, #12]
 	str	r3, [sp]
-	mov	r3, r7
+	mov	r3, fp
 	bl	flash_prog_page
 	ldr	r3, [sp, #20]
 	str	r0, [sp, #16]
 	cmp	r3, #0
-	beq	.L2547
+	beq	.L2582
 	ldr	r3, [sp, #56]
 	mov	r1, r4
-	ldr	r10, .L2574+44
-	mov	r0, fp
-	ldr	r2, .L2574+32
+	ldr	r10, .L2610+44
+	mov	r0, r6
+	ldr	r2, .L2610+32
 	str	r3, [sp]
 	ldr	r3, [r10]
 	ldr	r2, [r2]
 	bl	flash_read_page_en
 	adds	r2, r0, #1
-	mov	r6, r0
-	beq	.L2548
+	mov	r7, r0
+	beq	.L2583
 	cmp	r0, #512
-	beq	.L2548
-	ldr	r3, .L2574+32
+	beq	.L2583
+	ldr	r3, .L2610+32
 	ldr	r2, [r8]
 	ldr	r3, [r3]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bne	.L2548
+	bne	.L2583
 	ldr	r3, [r10]
-	ldr	r2, [r7]
+	ldr	r2, [fp]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L2547
-.L2548:
+	beq	.L2582
+.L2583:
 	movs	r3, #4
 	mov	r1, r8
 	mov	r2, r3
-	ldr	r0, .L2574+36
+	ldr	r0, .L2610+36
 	bl	rknand_print_hex
 	movs	r3, #4
-	mov	r1, r7
+	mov	r1, fp
 	mov	r2, r3
-	ldr	r0, .L2574+40
+	ldr	r0, .L2610+40
 	bl	rknand_print_hex
-	ldr	r1, .L2574+44
+	ldr	r1, .L2610+44
 	movs	r3, #4
 	mov	r2, r3
-	ldr	r0, .L2574+48
+	ldr	r0, .L2610+48
 	ldr	r1, [r1]
 	bl	rknand_print_hex
-	ldr	r1, .L2574+32
+	ldr	r1, .L2610+32
 	movs	r3, #4
 	mov	r2, r3
-	ldr	r0, .L2574+52
+	ldr	r0, .L2610+52
 	ldr	r1, [r1]
 	bl	rknand_print_hex
-	cmp	r6, #512
-	beq	.L2549
-.L2551:
+	cmp	r7, #512
+	beq	.L2584
+.L2586:
 	mov	r1, r4
-	ldr	r0, .L2574+56
+	ldr	r0, .L2610+56
 	bl	printf
-	movw	r2, #578
-	ldr	r1, .L2574+4
-	ldr	r0, .L2574+8
+	movw	r2, #587
+	ldr	r1, .L2610+4
+	ldr	r0, .L2610+8
 	bl	printf
+.L2587:
 	mov	r0, #-1
-.L2550:
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2545:
-	ldr	r3, .L2574+60
+	b	.L2575
+.L2580:
+	ldr	r3, .L2610+60
 	ldrh	r1, [r3, r1, lsl #1]
 	add	r5, r5, r1
-	b	.L2549
-.L2553:
-.L2543:
+	b	.L2584
+.L2589:
+.L2578:
 	mov	r5, r4
-	b	.L2549
-.L2547:
+	b	.L2584
+.L2582:
 	ldr	r0, [sp, #16]
 	adds	r3, r0, #1
-	bne	.L2550
-	b	.L2551
+	beq	.L2586
 .L2575:
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2611:
 	.align	2
-.L2574:
+.L2610:
 	.word	.LANCHOR18
-	.word	.LANCHOR175
+	.word	.LANCHOR178
 	.word	.LC0
 	.word	.LANCHOR30
 	.word	.LANCHOR0
 	.word	.LANCHOR2
 	.word	.LANCHOR14
-	.word	.LC136
-	.word	.LANCHOR164
-	.word	.LC137
 	.word	.LC138
-	.word	.LANCHOR163
+	.word	.LANCHOR167
 	.word	.LC139
 	.word	.LC140
+	.word	.LANCHOR166
 	.word	.LC141
+	.word	.LC142
+	.word	.LC143
 	.word	.LANCHOR3
 	.word	.LANCHOR1
 	.size	flash_prog_page_en, .-flash_prog_page_en
@@ -16113,133 +16682,133 @@ ftl_test_block:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r5, #0
-	ldr	r3, .L2603
+	ldr	r3, .L2639
 	mov	r10, r0
 	mov	r8, r5
 	str	r5, [r3]
-	ldr	r3, .L2603+4
+	ldr	r3, .L2639+4
 	str	r5, [r3]
-.L2577:
+.L2613:
 	uxth	r3, r5
 	str	r3, [sp, #12]
-	ldr	r3, .L2603+8
+	ldr	r3, .L2639+8
 	ldr	r2, [sp, #12]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r2
-	bls	.L2587
+	bls	.L2623
 	mov	fp, #0
-	b	.L2588
-.L2586:
-	ldr	r3, .L2603+12
+	b	.L2624
+.L2622:
+	ldr	r3, .L2639+12
 	ldr	r3, [r3]
 	lsls	r3, r3, #19
-	bpl	.L2578
+	bpl	.L2614
 	mov	r1, r10
-	ldr	r0, .L2603+16
+	ldr	r0, .L2639+16
 	bl	printf
-.L2578:
-	ldr	r3, .L2603+20
+.L2614:
+	ldr	r3, .L2639+20
 	ldrb	r4, [r3]	@ zero_extendqisi2
 	ldr	r3, [sp, #12]
 	smulbb	r4, r4, r10
 	add	r4, r4, r6
 	uxth	r4, r4
-	cbnz	r3, .L2579
-	ldr	r3, .L2603+24
+	cbnz	r3, .L2615
+	ldr	r3, .L2639+24
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #47]	@ zero_extendqisi2
 	cmp	r3, r4
-	bcs	.L2580
-.L2579:
+	bcs	.L2616
+.L2615:
 	uxtb	r6, r5
 	mov	r1, r4
 	mov	r0, r6
 	bl	flash_check_bad_block
-	cbnz	r0, .L2580
-	ldr	r3, .L2603+28
+	cbnz	r0, .L2616
+	ldr	r3, .L2639+28
 	mov	r1, r8
 	mov	r0, r6
 	ldrh	r7, [r3]
 	muls	r7, r4, r7
 	mov	r2, r7
 	bl	flash_erase_block_en
-	cbz	r0, .L2581
-	ldr	r3, .L2603+32
+	cbz	r0, .L2617
+	ldr	r3, .L2639+32
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #2
-	bne	.L2602
-	ldr	r3, .L2603+36
+	bne	.L2638
+	ldr	r3, .L2639+36
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2602
+	cbz	r3, .L2638
 	mov	r2, r7
 	movs	r1, #1
 	mov	r0, r6
 	bl	flash_erase_block_en
-	cbnz	r0, .L2602
-.L2585:
-	ldr	r3, .L2603+32
+	cbnz	r0, .L2638
+.L2621:
+	ldr	r3, .L2639+32
 	mov	r8, #1
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r7, r7, r3, lsl #24
-.L2584:
+.L2620:
 	movs	r3, #1
-	ldr	r2, .L2603
+	ldr	r2, .L2639
 	str	r3, [sp, #4]
 	mov	r1, r7
-	ldr	r3, .L2603+40
+	ldr	r3, .L2639+40
 	mov	r0, r6
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r3, [sp]
-	ldr	r3, .L2603+4
+	ldr	r3, .L2639+4
 	bl	flash_prog_page_en
-	cbz	r0, .L2580
-.L2602:
+	cbz	r0, .L2616
+.L2638:
 	mov	r1, r4
 	mov	r0, r6
 	bl	flash_mask_bad_block
-.L2580:
+.L2616:
 	add	fp, fp, #1
-.L2588:
-	ldr	r3, .L2603+20
+.L2624:
+	ldr	r3, .L2639+20
 	uxth	r6, fp
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r6
-	bhi	.L2586
+	bhi	.L2622
 	adds	r5, r5, #1
-	b	.L2577
-.L2581:
+	b	.L2613
+.L2617:
 	cmp	r8, #0
-	beq	.L2584
-	b	.L2585
-.L2587:
+	beq	.L2620
+	b	.L2621
+.L2623:
 	cmp	r8, #0
-	beq	.L2589
-	ldr	r3, .L2603+44
+	beq	.L2625
+	ldr	r3, .L2639+44
 	movs	r2, #2
 	ldr	r3, [r3]
 	add	r10, r3, r10, lsl #2
 	ldrb	r3, [r10, #2]	@ zero_extendqisi2
 	bfi	r3, r2, #3, #2
 	strb	r3, [r10, #2]
-.L2589:
+.L2625:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2604:
+.L2640:
 	.align	2
-.L2603:
+.L2639:
 	.word	ftl_tmp_buffer
-	.word	.LANCHOR176
-	.word	.LANCHOR104
+	.word	.LANCHOR179
+	.word	.LANCHOR106
 	.word	.LANCHOR14
-	.word	.LC142
-	.word	.LANCHOR67
+	.word	.LC144
+	.word	.LANCHOR69
 	.word	.LANCHOR27
-	.word	.LANCHOR103
-	.word	.LANCHOR71
+	.word	.LANCHOR105
+	.word	.LANCHOR73
 	.word	.LANCHOR0
-	.word	.LANCHOR123
+	.word	.LANCHOR125
 	.word	.LANCHOR7
 	.size	ftl_test_block, .-ftl_test_block
 	.section	.text.ftl_prog_page,"ax",%progbits
@@ -16270,25 +16839,25 @@ ftl_prog_page:
 	bl	flash_prog_page_en
 	adds	r3, r0, #1
 	mov	r4, r0
-	bne	.L2605
-	ldr	r1, .L2607
-	movw	r2, #2231
-	ldr	r0, .L2607+4
+	bne	.L2641
+	ldr	r1, .L2643
+	movw	r2, #2324
+	ldr	r0, .L2643+4
 	bl	printf
 	mov	r1, r5
-	ldr	r0, .L2607+8
+	ldr	r0, .L2643+8
 	bl	printf
-.L2605:
+.L2641:
 	mov	r0, r4
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, pc}
-.L2608:
+.L2644:
 	.align	2
-.L2607:
-	.word	.LANCHOR177
+.L2643:
+	.word	.LANCHOR180
 	.word	.LC0
-	.word	.LC141
+	.word	.LC143
 	.size	ftl_prog_page, .-ftl_prog_page
 	.section	.text.ftl_info_flush,"ax",%progbits
 	.align	1
@@ -16299,192 +16868,202 @@ ftl_prog_page:
 	.fpu softvfp
 	.type	ftl_info_flush, %function
 ftl_info_flush:
-	@ args = 0, pretend = 0, frame = 8
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r10, #0
-	ldr	r6, .L2642
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #24
+	ldr	r4, .L2682
 	movs	r1, #0
-	ldr	r7, .L2642+4
-	ldrb	r2, [r6]	@ zero_extendqisi2
-	str	r0, [sp, #12]
-	mov	r5, r7
-	ldr	r0, .L2642+8
+	ldr	r5, .L2682+4
+	ldrb	r2, [r4]	@ zero_extendqisi2
+	str	r0, [sp, #20]
+	ldr	r0, .L2682+8
 	lsls	r2, r2, #1
 	bl	ftl_memset
-.L2610:
-	ldr	r8, .L2642+48
-	ldr	r1, [sp, #12]
-	ldrb	fp, [r7]	@ zero_extendqisi2
-	ldrh	r3, [r8]
-	ldrh	r4, [r7, #2]
-	str	r3, [sp, #8]
-	ldr	r3, .L2642+12
-	ldr	r2, [r3]
+	ldr	r3, [r5]
+	str	r4, [sp, #12]
+	ldrh	r2, [r3, #74]
+	cbz	r2, .L2646
+	movs	r2, #0
+	strh	r2, [r3, #150]	@ movhi
+.L2646:
+	ldr	r6, .L2682+12
+	mov	r8, #0
+	mov	r4, r6
+.L2656:
+	ldr	r7, .L2682+16
+	ldr	r2, [r5]
+	ldr	r1, [sp, #20]
+	ldrh	r3, [r7]
+	ldrb	fp, [r6]	@ zero_extendqisi2
+	ldrh	r10, [r6, #2]
+	str	r3, [sp, #16]
 	ldr	r3, [r2, #4]
 	adds	r3, r3, #1
 	str	r3, [r2, #4]
-	ldr	r2, .L2642+8
+	ldr	r2, .L2682+8
 	stm	r2, {r1, r3}
-	ldr	r2, .L2642+16
+	ldr	r2, .L2682+20
 	ldr	r2, [r2]
 	lsls	r2, r2, #19
-	bpl	.L2611
-	mov	r2, r4
+	bpl	.L2647
+	mov	r2, r10
 	mov	r1, fp
-	ldr	r0, .L2642+20
+	ldr	r0, .L2682+24
 	bl	printf
-.L2611:
-	ldr	r3, .L2642+24
-	ldrh	r0, [r5, #2]
+.L2647:
+	ldr	r3, .L2682+28
+	ldrh	r0, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bhi	.L2612
-	ldr	r4, .L2642+28
-	ldr	fp, .L2642+44
-.L2616:
-	ldrb	r3, [r5, #1]	@ zero_extendqisi2
+	bhi	.L2648
+	ldr	r10, .L2682+48
+	ldr	fp, .L2682+44
+.L2652:
+	ldrb	r3, [r4, #1]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, #7
-	strb	r3, [r5, #1]
-	bls	.L2613
-	ldr	r2, [r4]
+	strb	r3, [r4, #1]
+	bls	.L2649
+	ldr	r2, [r10]
 	movs	r3, #0
 	adds	r2, r2, #40
-.L2628:
+.L2665:
 	ldrb	r1, [r2], #1	@ zero_extendqisi2
-	uxth	r10, r3
+	uxth	r8, r3
 	cmp	r1, #128
-	bls	.L2614
+	bls	.L2650
 	cmp	r1, #255
-	beq	.L2615
-	mov	r2, #748
+	beq	.L2651
+	movw	r2, #751
 	mov	r1, fp
-	ldr	r0, .L2642+32
+	ldr	r0, .L2682+32
 	bl	printf
-.L2614:
-	strb	r10, [r5, #1]
-	mov	r10, #1
-.L2613:
-	ldr	r3, [r4]
-	ldrb	r2, [r5, #1]	@ zero_extendqisi2
+.L2650:
+	strb	r8, [r4, #1]
+	mov	r8, #1
+.L2649:
+	ldr	r3, [r10]
+	ldrb	r2, [r4, #1]	@ zero_extendqisi2
 	add	r3, r3, r2
 	ldrb	r3, [r3, #40]	@ zero_extendqisi2
 	cmp	r3, #255
-	strb	r3, [r5]
-	beq	.L2616
-	ldrh	r4, [r8]
+	strb	r3, [r4]
+	beq	.L2652
+	ldrh	r10, [r7]
 	movs	r0, #0
-	muls	r4, r3, r4
-	mov	r1, r4
+	mul	r10, r3, r10
+	mov	r1, r10
 	bl	flash_erase_block
-	ldrb	r3, [r6]	@ zero_extendqisi2
-	mov	r1, r4
-	ldr	r2, .L2642+36
+	ldr	r3, [sp, #12]
+	mov	r1, r10
+	ldr	r2, .L2682+36
 	movs	r0, #0
+	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r3, [sp]
-	ldr	r3, .L2642+8
+	ldr	r3, .L2682+8
 	bl	ftl_prog_page
 	movs	r3, #1
-	add	r4, r4, r3
-	strh	r3, [r5, #2]	@ movhi
-.L2617:
-	ldrb	r3, [r6]	@ zero_extendqisi2
-	mov	r1, r4
-	ldr	r2, .L2642+36
+	add	r10, r10, r3
+	strh	r3, [r4, #2]	@ movhi
+.L2653:
+	ldr	r3, [sp, #12]
+	mov	r1, r10
+	ldr	r2, .L2682+36
 	movs	r0, #0
+	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r3, [sp]
-	ldr	r3, .L2642+8
+	ldr	r3, .L2682+8
 	bl	ftl_prog_page
-	ldrh	r3, [r5, #2]
+	ldrh	r3, [r4, #2]
 	adds	r0, r0, #1
 	add	r3, r3, #1
-	strh	r3, [r5, #2]	@ movhi
-	ldr	r3, .L2642+40
-	beq	.L2618
+	strh	r3, [r4, #2]	@ movhi
+	ldr	r3, .L2682+40
+	beq	.L2654
 	ldrb	r2, [r3]	@ zero_extendqisi2
-	cbz	r2, .L2619
-.L2618:
+	cbz	r2, .L2655
+.L2654:
 	movs	r2, #0
 	strb	r2, [r3]
-	b	.L2610
-.L2612:
-	ldr	r3, [sp, #8]
-	mla	r4, fp, r3, r4
+	b	.L2656
+.L2648:
+	ldr	r3, [sp, #16]
+	mla	r10, fp, r3, r10
 	cmp	r0, #0
-	bne	.L2617
-	mov	r1, r4
+	bne	.L2653
+	mov	r1, r10
 	bl	flash_erase_block
-	b	.L2617
-.L2619:
-	cmp	r10, #0
-	bne	.L2620
-.L2627:
-	ldrb	r3, [r5]	@ zero_extendqisi2
+	b	.L2653
+.L2655:
+	cmp	r8, #0
+	bne	.L2657
+.L2664:
+	ldrb	r3, [r4]	@ zero_extendqisi2
 	cmp	r3, #255
-	bne	.L2641
-	mov	r2, #784
-	ldr	r1, .L2642+44
-	ldr	r0, .L2642+32
+	bne	.L2681
+	movw	r2, #787
+	ldr	r1, .L2682+44
+	ldr	r0, .L2682+32
 	bl	printf
-.L2641:
+.L2681:
 	movs	r0, #0
-	add	sp, sp, #16
+	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2620:
-	ldrb	r4, [r5, #1]	@ zero_extendqisi2
-	ldr	r6, .L2642+28
-	ldr	r7, .L2642+44
-	adds	r4, r4, #1
-.L2623:
-	cmp	r4, #7
-	bhi	.L2627
+.L2657:
+	ldrb	r5, [r4, #1]	@ zero_extendqisi2
+	ldr	r6, .L2682+48
+	ldr	r7, .L2682+44
+	adds	r5, r5, #1
+.L2660:
+	cmp	r5, #7
+	bhi	.L2664
 	ldr	r3, [r6]
-	add	r3, r3, r4
+	add	r3, r3, r5
 	ldrb	r8, [r3, #40]	@ zero_extendqisi2
 	uxth	r3, r8
 	cmp	r3, #128
-	bls	.L2624
+	bls	.L2661
 	cmp	r3, #255
-	beq	.L2625
-	movw	r2, #777
+	beq	.L2662
+	mov	r2, #780
 	mov	r1, r7
-	ldr	r0, .L2642+32
+	ldr	r0, .L2682+32
 	bl	printf
-.L2624:
-	ldr	r3, .L2642+48
+.L2661:
+	ldr	r3, .L2682+16
 	movs	r0, #0
 	ldrh	r1, [r3]
 	mul	r1, r8, r1
 	bl	flash_erase_block
-.L2625:
-	adds	r4, r4, #1
-	uxth	r4, r4
-	b	.L2623
-.L2615:
+.L2662:
+	adds	r5, r5, #1
+	uxth	r5, r5
+	b	.L2660
+.L2651:
 	adds	r3, r3, #1
 	cmp	r3, #8
-	bne	.L2628
-	mov	r10, r3
-	b	.L2614
-.L2643:
+	bne	.L2665
+	mov	r8, r3
+	b	.L2650
+.L2683:
 	.align	2
-.L2642:
-	.word	.LANCHOR123
-	.word	.LANCHOR179
-	.word	.LANCHOR178
-	.word	.LANCHOR102
+.L2682:
+	.word	.LANCHOR125
+	.word	.LANCHOR104
+	.word	.LANCHOR181
+	.word	.LANCHOR182
+	.word	.LANCHOR105
 	.word	.LANCHOR14
-	.word	.LC143
-	.word	.LANCHOR85
-	.word	.LANCHOR27
+	.word	.LC145
+	.word	.LANCHOR87
 	.word	.LC0
 	.word	ftl_info_data_buffer
-	.word	.LANCHOR181
-	.word	.LANCHOR180
-	.word	.LANCHOR103
+	.word	.LANCHOR184
+	.word	.LANCHOR183
+	.word	.LANCHOR27
 	.size	ftl_info_flush, .-ftl_info_flush
 	.section	.text.ftl_info_blk_init,"ax",%progbits
 	.align	1
@@ -16499,127 +17078,127 @@ ftl_info_blk_init:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r3, .L2672
+	ldr	r3, .L2712
 	mov	r1, r4
-	ldr	r2, .L2672+4
+	ldr	r2, .L2712+4
 	strb	r4, [r3]
 	movs	r3, #1
-	ldr	r0, .L2672+8
+	ldr	r0, .L2712+8
 	strb	r3, [r2]
-	ldr	r2, .L2672+12
-	ldr	r5, .L2672+16
-	ldr	r6, .L2672+20
+	ldr	r2, .L2712+12
+	ldr	r5, .L2712+16
+	ldr	r6, .L2712+20
 	strb	r3, [r2]
 	mov	r2, #16384
-	ldr	r3, .L2672+24
+	ldr	r3, .L2712+24
 	str	r0, [r3]
-	ldr	r3, .L2672+28
+	ldr	r3, .L2712+28
 	ldrh	r3, [r3]
 	add	r3, r0, r3, lsl #2
 	str	r3, [r5]
 	bl	ftl_memset
 	mov	r2, #16384
 	mov	r1, r4
-	ldr	r0, .L2672+32
+	ldr	r0, .L2712+32
 	bl	ftl_memset
 	ldr	r2, [r6]
-	ldr	r3, .L2672+36
+	ldr	r3, .L2712+36
 	ldrb	r2, [r2, #40]	@ zero_extendqisi2
 	strb	r4, [r3, #1]
 	strh	r4, [r3, #2]	@ movhi
 	movs	r4, #7
 	strb	r2, [r3]
 	str	r3, [sp, #12]
-.L2646:
+.L2686:
 	ldr	r3, [r6]
 	sxth	r8, r4
 	add	r3, r3, r4
 	ldrb	r7, [r3, #40]	@ zero_extendqisi2
 	cmp	r7, #255
-	bne	.L2645
-.L2650:
+	bne	.L2685
+.L2690:
 	adds	r4, r4, #-1
-	bcs	.L2646
+	bcs	.L2686
 	mov	r8, #0
-.L2647:
-	ldr	r3, .L2672+40
+.L2687:
+	ldr	r3, .L2712+40
 	ldr	r2, [r3]
 	mov	r10, r3
 	tst	r2, #4096
-	beq	.L2651
+	beq	.L2691
 	ldr	r3, [r5]
 	mov	r2, #4800
 	mov	r1, r4
-	ldr	r0, .L2672+44
+	ldr	r0, .L2712+44
 	ldr	r3, [r3]
 	bl	printf
-.L2651:
+.L2691:
 	adds	r2, r4, #1
-	bne	.L2652
+	bne	.L2692
 	mov	r2, #16384
 	movs	r1, #0
-	ldr	r0, .L2672+8
+	ldr	r0, .L2712+8
 	bl	ftl_memset
 	ldr	r3, [r5]
-	ldr	r2, .L2672+48
+	ldr	r2, .L2712+48
 	str	r2, [r3]
-	ldr	r2, .L2672+52
+	ldr	r2, .L2712+52
 	str	r2, [r3, #12]
-.L2644:
+.L2684:
 	mov	r0, r4
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2645:
-	ldr	r3, .L2672+56
+.L2685:
+	ldr	r3, .L2712+56
 	movs	r0, #0
-	ldr	fp, .L2672+68
-	ldr	r2, .L2672+8
+	ldr	fp, .L2712+68
+	ldr	r2, .L2712+8
 	ldrh	r3, [r3]
 	muls	r7, r3, r7
 	ldrb	r3, [fp]	@ zero_extendqisi2
 	str	r3, [sp]
 	mov	r1, r7
-	ldr	r3, .L2672+60
+	ldr	r3, .L2712+60
 	bl	ftl_read_page
 	cmp	r0, #-1
 	mov	r10, r0
-	bne	.L2648
+	bne	.L2688
 	ldrb	r3, [fp]	@ zero_extendqisi2
 	adds	r1, r7, #1
-	ldr	r2, .L2672+8
+	ldr	r2, .L2712+8
 	movs	r0, #0
 	str	r3, [sp]
-	ldr	r3, .L2672+60
+	ldr	r3, .L2712+60
 	bl	ftl_read_page
 	mov	r10, r0
-.L2648:
-	ldr	r3, .L2672+40
+.L2688:
+	ldr	r3, .L2712+40
 	ldr	r3, [r3]
 	lsls	r1, r3, #19
-	bpl	.L2649
+	bpl	.L2689
 	ldr	r3, [r5]
 	mov	r2, r10
 	mov	r1, r4
-	ldr	r0, .L2672+64
+	ldr	r0, .L2712+64
 	ldr	r3, [r3]
 	str	r3, [sp]
 	mov	r3, #672
 	bl	printf
-.L2649:
+.L2689:
 	cmp	r10, #-1
-	beq	.L2650
+	beq	.L2690
 	ldr	r3, [r5]
-	ldr	r2, .L2672+48
+	ldr	r2, .L2712+48
 	ldr	r3, [r3]
 	cmp	r3, r2
-	bne	.L2650
+	bne	.L2690
 	mov	r4, r8
-	b	.L2647
-.L2652:
+	b	.L2687
+.L2692:
 	ldr	r3, [r6]
 	movs	r0, #0
-	ldr	r2, .L2672+8
+	ldr	r2, .L2712+8
 	movs	r4, #0
 	add	r3, r3, r8
 	ldrb	r1, [r3, #40]	@ zero_extendqisi2
@@ -16628,7 +17207,7 @@ ftl_info_blk_init:
 	strb	r1, [r3]
 	movs	r3, #4
 	str	r3, [sp]
-	ldr	r3, .L2672+60
+	ldr	r3, .L2712+60
 	bl	flash_get_last_written_page
 	uxth	r6, r0
 	mov	r7, r0
@@ -16636,30 +17215,30 @@ ftl_info_blk_init:
 	uxth	r8, r3
 	ldr	r3, [sp, #12]
 	ldrb	fp, [r3]	@ zero_extendqisi2
-	ldr	r3, .L2672+56
+	ldr	r3, .L2712+56
 	ldrh	r3, [r3]
 	mul	fp, r3, fp
-.L2654:
+.L2694:
 	subs	r3, r6, r4
 	lsls	r3, r3, #16
-	bmi	.L2658
-	ldr	r3, .L2672+68
+	bmi	.L2698
+	ldr	r3, .L2712+68
 	add	r1, r7, fp
-	ldr	r2, .L2672+8
+	ldr	r2, .L2712+8
 	subs	r1, r1, r4
 	movs	r0, #0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r3, [sp]
-	ldr	r3, .L2672+60
+	ldr	r3, .L2712+60
 	bl	ftl_read_page
 	adds	r0, r0, #1
-	beq	.L2655
+	beq	.L2695
 	ldr	r3, [r5]
-	ldr	r2, .L2672+48
+	ldr	r2, .L2712+48
 	ldr	r3, [r3]
 	cmp	r3, r2
-	bne	.L2655
-.L2658:
+	bne	.L2695
+.L2698:
 	ldr	r3, [sp, #12]
 	strh	r8, [r3, #2]	@ movhi
 	bl	ftl_tmp_into_update
@@ -16673,38 +17252,38 @@ ftl_info_blk_init:
 	bl	ftl_info_flush
 	ldr	r4, [r10]
 	ands	r4, r4, #16384
-	beq	.L2644
+	beq	.L2684
 	ldr	r3, [r5]
 	movs	r4, #0
-	ldr	r0, .L2672+72
+	ldr	r0, .L2712+72
 	ldr	r1, [r3, #156]
 	bl	printf
-	b	.L2644
-.L2655:
+	b	.L2684
+.L2695:
 	adds	r4, r4, #1
-	b	.L2654
-.L2673:
+	b	.L2694
+.L2713:
 	.align	2
-.L2672:
-	.word	.LANCHOR182
-	.word	.LANCHOR181
+.L2712:
+	.word	.LANCHOR185
+	.word	.LANCHOR184
 	.word	ftl_info_data_buffer
-	.word	.LANCHOR183
-	.word	.LANCHOR102
+	.word	.LANCHOR186
+	.word	.LANCHOR104
 	.word	.LANCHOR27
 	.word	.LANCHOR7
 	.word	.LANCHOR6
 	.word	ftl_ext_info_data_buffer
-	.word	.LANCHOR179
+	.word	.LANCHOR182
 	.word	.LANCHOR14
-	.word	.LC145
+	.word	.LC147
 	.word	1229739078
-	.word	393238
-	.word	.LANCHOR103
-	.word	.LANCHOR178
-	.word	.LC144
-	.word	.LANCHOR123
+	.word	393240
+	.word	.LANCHOR105
+	.word	.LANCHOR181
 	.word	.LC146
+	.word	.LANCHOR125
+	.word	.LC148
 	.size	ftl_info_blk_init, .-ftl_info_blk_init
 	.section	.text.ftl_ext_info_flush,"ax",%progbits
 	.align	1
@@ -16717,109 +17296,113 @@ ftl_info_blk_init:
 ftl_ext_info_flush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2690
+	ldr	r3, .L2730
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
 	ldr	r3, [r3]
 	ldr	r2, [r3, #520]
-	cbz	r2, .L2675
+	cbz	r2, .L2715
 	movs	r2, #0
 	str	r2, [r3, #520]
-.L2675:
-	ldr	r5, .L2690+4
+.L2715:
+	ldr	r6, .L2730+4
 	movs	r0, #0
 	bl	ftl_total_vpn_update
-	mov	r4, r5
-.L2679:
-	ldr	r3, [r5]
+	mov	r5, r6
+.L2719:
+	ldr	r3, [r6]
 	ldr	r2, [r3, #56]
 	adds	r2, r2, #1
 	str	r2, [r3, #56]
 	ldrh	r2, [r3, #140]
-	ldr	r3, .L2690+8
+	ldr	r3, .L2730+8
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L2677
+	bcc	.L2717
 	bl	ftl_ext_alloc_new_blk
-.L2677:
-	ldr	r3, [r4]
+.L2717:
+	ldr	r3, [r5]
 	ldrh	r2, [r3, #130]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L2678
-	movw	r2, #1819
-	ldr	r1, .L2690+12
-	ldr	r0, .L2690+16
+	bne	.L2718
+	mov	r2, #1912
+	ldr	r1, .L2730+12
+	ldr	r0, .L2730+16
 	bl	printf
-.L2678:
-	ldr	r1, [r4]
-	ldr	r3, .L2690+20
-	ldr	r10, .L2690+36
-	ldrh	r0, [r1, #130]
-	ldrh	r3, [r3]
-	ldr	r8, .L2690+40
-	rsb	r2, r3, #21
-	movs	r3, #1
-	asr	r6, r0, r2
-	lsls	r3, r3, r2
-	ldr	r2, .L2690+24
-	subs	r3, r3, #1
-	ands	r3, r3, r0
+.L2718:
+	ldr	r3, .L2730+20
+	ldr	r2, [r5]
+	ldr	r10, .L2730+40
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	ldrh	r1, [r2, #130]
+	ldr	r8, .L2730+44
+	rsb	r4, r3, #24
+	ldr	r3, .L2730+24
 	mov	r0, r8
-	ldrh	r7, [r2]
-	ldrh	r2, [r1, #140]
-	movs	r1, #0
-	smlabb	r3, r7, r3, r2
+	ldrh	r3, [r3]
+	subs	r3, r4, r3
+	movs	r4, #1
+	asr	r7, r1, r3
+	lsls	r4, r4, r3
+	ldr	r3, .L2730+28
+	subs	r4, r4, #1
+	ands	r4, r4, r1
+	ldrh	r1, [r3]
+	sxth	r4, r4
+	ldrh	r3, [r2, #140]
 	ldrb	r2, [r10]	@ zero_extendqisi2
-	uxth	r7, r3
+	mla	r4, r1, r4, r3
 	lsls	r2, r2, #1
+	movs	r1, #0
 	bl	ftl_memset
 	movs	r3, #0
-	ldr	r2, .L2690+28
+	ldr	r2, .L2730+32
 	str	r3, [r8]
-	mov	r1, r7
-	ldr	r3, [r4]
-	uxtb	r0, r6
+	mov	r1, r4
+	ldr	r3, [r5]
+	uxtb	r0, r7
 	ldr	r3, [r3, #56]
 	str	r3, [r8, #4]
 	ldrb	r3, [r10]	@ zero_extendqisi2
 	str	r3, [sp]
 	mov	r3, r8
 	bl	ftl_prog_page
-	ldr	r2, [r4]
+	ldr	r2, [r5]
 	ldrh	r3, [r2, #140]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	cmp	r3, #1
 	strh	r3, [r2, #140]	@ movhi
-	beq	.L2679
+	beq	.L2719
 	adds	r0, r0, #1
-	ldr	r3, .L2690+32
-	beq	.L2680
+	ldr	r3, .L2730+36
+	beq	.L2720
 	ldrb	r0, [r3]	@ zero_extendqisi2
-	cbz	r0, .L2681
-.L2680:
-.L2676:
+	cbz	r0, .L2721
+.L2720:
+.L2716:
 	movs	r2, #0
 	strb	r2, [r3]
-	b	.L2679
-.L2681:
+	b	.L2719
+.L2721:
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L2691:
+.L2731:
 	.align	2
-.L2690:
+.L2730:
 	.word	.LANCHOR10
-	.word	.LANCHOR102
-	.word	.LANCHOR85
-	.word	.LANCHOR184
+	.word	.LANCHOR104
+	.word	.LANCHOR87
+	.word	.LANCHOR187
 	.word	.LC0
-	.word	.LANCHOR66
-	.word	.LANCHOR103
+	.word	.LANCHOR31
+	.word	.LANCHOR68
+	.word	.LANCHOR105
 	.word	ftl_ext_info_data_buffer
-	.word	.LANCHOR183
-	.word	.LANCHOR123
-	.word	.LANCHOR178
+	.word	.LANCHOR186
+	.word	.LANCHOR125
+	.word	.LANCHOR181
 	.size	ftl_ext_info_flush, .-ftl_ext_info_flush
 	.section	.text.ftl_ext_info_init,"ax",%progbits
 	.align	1
@@ -16834,1680 +17417,2076 @@ ftl_ext_info_init:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r2, #0
-	ldr	r3, .L2709
-	ldr	r5, .L2709+4
+	ldr	r3, .L2753
+	ldr	r5, .L2753+4
 	strh	r2, [r3]	@ movhi
+	ldr	r1, .L2753+8
 	ldr	r3, [r5]
+	ldrh	r4, [r1]
 	ldrh	r2, [r3, #130]
-	ldr	r3, .L2709+8
-	ldrh	r4, [r3]
-	rsb	r3, r4, #21
+	ldr	r3, .L2753+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	rsb	r3, r3, #24
+	subs	r3, r3, r4
 	movs	r4, #1
 	asr	r6, r2, r3
 	lsls	r4, r4, r3
 	uxtb	r10, r6
 	subs	r4, r4, #1
 	ands	r4, r4, r2
-	ldr	r2, .L2709+12
+	ldr	r2, .L2753+16
 	movs	r3, #4
 	mov	r1, r4
 	str	r3, [sp]
 	mov	r0, r10
-	ldr	r3, .L2709+16
+	ldr	r3, .L2753+20
 	bl	flash_get_last_written_page
-	ldr	r3, .L2709+20
+	ldr	r3, .L2753+24
 	mov	r7, r0
-	ldr	r3, [r3]
-	lsls	r1, r3, #19
-	bpl	.L2693
+	ldr	r2, [r3]
+	mov	fp, r3
+	tst	r2, #4096
+	beq	.L2733
 	ldr	r3, [r5]
 	uxth	r6, r6
-	movw	r2, #1863
-	ldr	r1, .L2709+24
+	movw	r2, #1956
+	ldr	r1, .L2753+28
 	ldrh	r3, [r3, #130]
 	str	r6, [sp]
 	str	r3, [sp, #4]
 	mov	r3, r0
-	ldr	r0, .L2709+28
+	ldr	r0, .L2753+32
 	bl	printf
-.L2693:
-	ldr	fp, .L2709+48
+.L2733:
 	mov	r8, #0
-.L2694:
+.L2734:
 	uxth	r6, r7
 	sub	r3, r6, r8
-	lsls	r3, r3, #16
-	bmi	.L2699
-	ldr	r3, .L2709+32
+	lsls	r0, r3, #16
+	bmi	.L2739
+	ldr	r3, .L2753+36
 	sub	r1, r7, r8
-	ldr	r2, .L2709+12
+	ldr	r2, .L2753+16
 	ldrh	r0, [r3]
-	ldr	r3, .L2709+36
+	ldr	r3, .L2753+40
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	mla	r1, r4, r0, r1
 	mov	r0, r10
 	str	r3, [sp]
-	ldr	r3, .L2709+16
+	ldr	r3, .L2753+20
 	bl	flash_read_page_en
-	adds	r2, r0, #1
-	beq	.L2695
+	adds	r3, r0, #1
+	beq	.L2735
 	cmp	r0, #512
-	beq	.L2695
-	ldr	r3, .L2709+40
+	beq	.L2735
+	ldr	r3, .L2753+44
+	ldr	r2, .L2753+48
 	ldr	r3, [r3]
 	ldr	r3, [r3]
-	cmp	r3, fp
-	bne	.L2695
-.L2699:
+	cmp	r3, r2
+	bne	.L2735
+.L2739:
 	bl	zftl_sblk_list_init
 	ldr	r3, [r5]
 	ldrh	r2, [r3, #140]
 	cmp	r2, r7
-	bgt	.L2697
+	bgt	.L2737
 	adds	r6, r6, #1
 	strh	r6, [r3, #140]	@ movhi
 	bl	ftl_ext_info_flush
-.L2697:
-	ldr	r3, .L2709+40
+.L2737:
+	ldr	r3, .L2753+44
+	movw	r1, #65535
+	movs	r2, #0
+	ldr	r3, [r3]
+	strh	r1, [r3, #584]	@ movhi
+	strh	r1, [r3, #586]	@ movhi
+	strh	r1, [r3, #588]	@ movhi
+	strh	r1, [r3, #590]	@ movhi
+	str	r1, [r3, #560]
+	mov	r1, #-1
+	str	r1, [r3, #564]
+	ldr	r1, [fp]
+	str	r2, [r3, #520]
+	str	r2, [r3, #604]
+	lsls	r1, r1, #19
+	str	r2, [r3, #608]
+	bpl	.L2740
+	str	r2, [sp]
+	ldr	r1, .L2753+28
+	ldr	r3, [r3, #12]
+	ldr	r0, .L2753+52
+	bl	printf
+.L2740:
+	ldr	r3, .L2753+56
 	movw	r2, #65535
 	movs	r0, #0
-	ldr	r3, [r3]
-	strh	r2, [r3, #584]	@ movhi
-	strh	r2, [r3, #586]	@ movhi
-	strh	r2, [r3, #588]	@ movhi
-	strh	r2, [r3, #590]	@ movhi
-	str	r2, [r3, #560]
-	mov	r2, #-1
-	str	r0, [r3, #520]
-	str	r0, [r3, #604]
-	str	r0, [r3, #608]
-	str	r2, [r3, #564]
-	ldr	r3, .L2709+44
 	strh	r2, [r3]	@ movhi
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2695:
+.L2735:
 	add	r8, r8, #1
-	b	.L2694
-.L2710:
+	b	.L2734
+.L2754:
 	.align	2
-.L2709:
-	.word	.LANCHOR113
-	.word	.LANCHOR102
-	.word	.LANCHOR66
+.L2753:
+	.word	.LANCHOR115
+	.word	.LANCHOR104
+	.word	.LANCHOR68
+	.word	.LANCHOR31
 	.word	ftl_ext_info_data_buffer
-	.word	.LANCHOR178
+	.word	.LANCHOR181
 	.word	.LANCHOR14
-	.word	.LANCHOR185
-	.word	.LC147
-	.word	.LANCHOR103
-	.word	.LANCHOR123
+	.word	.LANCHOR188
+	.word	.LC149
+	.word	.LANCHOR105
+	.word	.LANCHOR125
 	.word	.LANCHOR10
-	.word	.LANCHOR64
 	.word	1162432070
+	.word	.LC150
+	.word	.LANCHOR66
 	.size	ftl_ext_info_init, .-ftl_ext_info_init
-	.section	.text.ftl_low_format_data_init,"ax",%progbits
+	.section	.text.ftl_prog_ppa_page,"ax",%progbits
 	.align	1
-	.global	ftl_low_format_data_init
+	.global	ftl_prog_ppa_page
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_low_format_data_init, %function
-ftl_low_format_data_init:
+	.type	ftl_prog_ppa_page, %function
+ftl_prog_ppa_page:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r4, r5, r6, r7, lr}
+	ldr	r4, .L2756
+	ldrb	r7, [r4]	@ zero_extendqisi2
+	movs	r4, #1
+	str	r3, [sp]
+	mov	r3, r2
+	mov	r2, r1
+	rsb	r5, r7, #24
+	lsl	r6, r4, r5
+	lsls	r4, r4, r7
+	lsr	r5, r0, r5
+	subs	r4, r4, #1
+	subs	r6, r6, #1
+	ands	r4, r4, r5
+	and	r1, r6, r0
+	uxtb	r0, r4
+	bl	ftl_prog_page
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, r6, r7, pc}
+.L2757:
+	.align	2
+.L2756:
+	.word	.LANCHOR31
+	.size	ftl_prog_ppa_page, .-ftl_prog_ppa_page
+	.section	.text.ftl_write_last_log_page,"ax",%progbits
+	.align	1
+	.global	ftl_write_last_log_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_write_last_log_page, %function
+ftl_write_last_log_page:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
-	mov	r2, #16384
-	movs	r1, #0
-	ldr	r5, .L2713
-	ldr	r0, .L2713+4
-	bl	ftl_memset
-	bl	zftl_sblk_list_init
-	movs	r0, #1
-	bl	ftl_alloc_sblk
-	movs	r1, #0
-	mov	r6, r0
-	bl	ftl_erase_sblk
-	ldr	r1, [r5]
+	mov	r4, r0
+	ldrh	r3, [r0, #6]
+	cmp	r3, #1
+	bne	.L2760
+	ldr	r3, .L2762
+	ldrh	r5, [r0, #12]
+	ldr	r6, [r3]
+	bl	ftl_get_new_free_page
+	adds	r3, r0, #1
+	mov	r7, r0
+	beq	.L2761
+	ldrh	r0, [r4]
+	add	r6, r6, r5, lsl #2
+	ldr	r5, .L2762+4
+	movs	r4, #0
+	bl	ftl_vpn_decrement
+	ldr	r3, .L2762+8
 	mov	r0, r6
-	add	r1, r1, #672
-	bl	ftl_get_blk_list_in_sblk
+	ldr	r2, .L2762+12
+	str	r3, [r5]
+	ldr	r3, .L2762+16
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	muls	r1, r3, r1
+	lsls	r1, r1, #2
+	bl	js_hash
+	ldr	r3, .L2762+20
+	mov	r2, r5
+	str	r0, [r5, #4]
+	mov	r1, r6
+	mov	r0, r7
+	str	r4, [r5, #8]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r4, [r5, #12]
+	bl	ftl_prog_ppa_page
+.L2761:
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, pc}
+.L2760:
+	mov	r0, #-1
+	pop	{r3, r4, r5, r6, r7, pc}
+.L2763:
+	.align	2
+.L2762:
+	.word	.LANCHOR111
+	.word	.LANCHOR179
+	.word	-178307901
+	.word	.LANCHOR80
+	.word	.LANCHOR87
+	.word	.LANCHOR125
+	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
+	.section	.text.ftl_open_sblk_recovery,"ax",%progbits
+	.align	1
+	.global	ftl_open_sblk_recovery
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_open_sblk_recovery, %function
+ftl_open_sblk_recovery:
+	@ args = 0, pretend = 0, frame = 216
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #224
+	ldr	r5, .L2891
+	mov	r4, r0
+	str	r1, [sp, #20]
 	ldr	r3, [r5]
-	movs	r2, #0
-	ldrh	r7, [r3, #672]
-	strh	r2, [r3, #690]	@ movhi
-	movw	r2, #65533
-	subs	r3, r7, #1
-	uxth	r3, r3
-	cmp	r3, r2
-	bls	.L2712
-	movw	r2, #2053
-	ldr	r1, .L2713+8
-	ldr	r0, .L2713+12
+	lsls	r3, r3, #19
+	bpl	.L2765
+	ldrh	r1, [r0, #2]
+	ldr	r0, .L2891+4
 	bl	printf
-.L2712:
-	ldr	r0, [r5]
-	movs	r4, #0
-	mov	r2, #256
-	movs	r1, #255
-	strh	r4, [r0, #696]	@ movhi
-	add	r0, r0, #416
-	bl	ftl_memset
-	ldr	r0, [r5]
-	mov	r1, r4
-	mov	r2, #4096
-	add	r0, r0, #704
-	bl	ftl_memset
-	ldr	r2, .L2713+16
+.L2765:
 	ldr	r3, [r5]
-	ldrh	r2, [r2]
-	strh	r7, [r3, #692]	@ movhi
-	strh	r6, [r3, #416]	@ movhi
-	rsb	r2, r2, #21
-	asr	r2, r7, r2
-	ldr	r7, .L2713+20
-	strh	r2, [r3, #694]	@ movhi
-	movs	r2, #1
-	strh	r2, [r3, #688]	@ movhi
-	ldr	r2, .L2713+24
-	ldrh	r2, [r2]
-	strh	r2, [r3, #698]	@ movhi
-	ldr	r2, .L2713+28
-	ldr	r3, [r7]
-	str	r2, [r3]
-	bl	ftl_alloc_sys_blk
-	mov	r1, r4
-	mov	r6, r0
-	bl	ftl_erase_phy_blk
+	lsls	r7, r3, #19
+	bpl	.L2766
+	ldrb	r1, [r4, #5]	@ zero_extendqisi2
+	ldr	r0, .L2891+8
+	bl	printf
+.L2766:
 	ldr	r3, [r5]
-	movs	r1, #2
-	ldr	r0, [r7]
-	strh	r6, [r3, #130]	@ movhi
-	movw	r6, #65535
-	strh	r4, [r3, #140]	@ movhi
-	adds	r0, r0, #16
-	strh	r6, [r0, #568]	@ movhi
-	strh	r6, [r0, #570]	@ movhi
-	strh	r6, [r0, #572]	@ movhi
-	strh	r6, [r0, #574]	@ movhi
-	bl	ftl_open_sblk_init
-	ldr	r0, [r7]
-	movs	r1, #3
-	adds	r0, r0, #48
-	bl	ftl_open_sblk_init
+	lsls	r6, r3, #19
+	bpl	.L2767
+	ldrh	r1, [r4]
+	ldr	r0, .L2891+12
+	bl	printf
+.L2767:
+	ldr	r3, [r5]
+	lsls	r0, r3, #19
+	bpl	.L2768
+	ldrh	r2, [r4, #18]
+	ldrh	r1, [r4, #16]
+	ldr	r0, .L2891+16
+	bl	printf
+.L2768:
 	ldr	r3, [r5]
+	lsls	r1, r3, #19
+	bpl	.L2769
+	ldrb	r1, [r4, #9]	@ zero_extendqisi2
+	ldr	r0, .L2891+20
+	bl	printf
+.L2769:
+	ldrh	r3, [r4, #10]
+	ldrh	r2, [r4]
+	strh	r3, [r4, #14]	@ movhi
+	ldr	r3, .L2891+24
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcs	.L2764
+	movs	r0, #1
+	bl	buf_alloc
+	movs	r2, #64
 	movs	r1, #255
-	ldr	r0, [r7]
-	ldrh	r2, [r3, #134]
-	adds	r0, r0, #136
-	strh	r4, [r0, #-12]	@ movhi
-	strh	r4, [r0, #-16]	@ movhi
-	strh	r2, [r0, #-10]	@ movhi
-	mov	r2, #-1
-	strh	r4, [r0, #-14]	@ movhi
-	strh	r6, [r0, #-56]	@ movhi
-	strh	r6, [r0, #-6]	@ movhi
-	str	r2, [r0, #408]
-	strh	r2, [r3, #126]	@ movhi
-	mov	r2, #256
-	str	r4, [r0, #384]
-	str	r4, [r0, #388]
-	str	r4, [r0, #392]
+	mov	r5, r0
+	add	r0, sp, #32
 	bl	ftl_memset
-	ldr	r0, [r7]
-	movs	r2, #128
+	movs	r2, #64
 	movs	r1, #255
-	add	r0, r0, #392
-	bl	ftl_memset
-	bl	ftl_ext_info_flush
-	mov	r0, r4
-	bl	ftl_info_flush
-	bl	ftl_info_blk_init
-	mov	r0, r4
-	pop	{r3, r4, r5, r6, r7, pc}
-.L2714:
-	.align	2
-.L2713:
-	.word	.LANCHOR102
-	.word	ftl_ext_info_data_buffer
-	.word	.LANCHOR186
-	.word	.LC0
-	.word	.LANCHOR66
-	.word	.LANCHOR10
-	.word	.LANCHOR187
-	.word	1162432070
-	.size	ftl_low_format_data_init, .-ftl_low_format_data_init
-	.section	.text.ftl_low_format,"ax",%progbits
-	.align	1
-	.global	ftl_low_format
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_low_format, %function
-ftl_low_format:
-	@ args = 0, pretend = 0, frame = 32
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r4, #8
-	ldr	r6, .L2752
-	sub	sp, sp, #40
-	movs	r1, #0
-	ldr	r0, .L2752+4
-	bl	printf
-.L2718:
-	ldr	r3, [r6]
-	add	r3, r3, r4
-	ldrb	r5, [r3, #32]	@ zero_extendqisi2
-	cmp	r5, #128
-	ble	.L2716
-	cmp	r5, #255
-	beq	.L2717
-	movw	r2, #2107
-	ldr	r1, .L2752+8
-	ldr	r0, .L2752+12
-	bl	printf
-.L2716:
-	ldr	r3, .L2752+16
-	movs	r0, #0
-	ldrh	r1, [r3]
-	muls	r1, r5, r1
-	bl	flash_erase_block
-.L2717:
-	adds	r4, r4, #1
-	cmp	r4, #16
-	bne	.L2718
-	bl	sblk_init
-	bl	ftl_info_blk_init
-	mov	r2, #16384
-	movs	r1, #0
-	ldr	r0, .L2752+20
+	add	r0, sp, #96
 	bl	ftl_memset
-	ldr	r2, .L2752+24
-	movs	r0, #1
-	ldr	r1, .L2752+28
-	ldr	r3, [r2]
-	ldrh	r1, [r1]
-	str	r2, [sp, #24]
-	add	r1, r3, r1, lsl #2
-.L2719:
-	cmp	r3, r1
-	bne	.L2720
-	ldr	r7, .L2752+32
-	movs	r4, #0
-	ldr	r2, .L2752+36
-	ldr	r3, [r7]
-	str	r2, [r3]
-	strh	r4, [r3, #148]	@ movhi
-.L2721:
-	ldr	r3, .L2752+28
-	uxth	r0, r4
-	ldrh	r3, [r3]
-	cmp	r3, r0
-	bhi	.L2729
-	ldr	r3, .L2752+40
-	mov	fp, #15
-	ldrb	r5, [r3]	@ zero_extendqisi2
-	ldr	r3, .L2752
-	mov	r1, r5
-	ldr	r3, [r3]
-	ldrb	r0, [r3, #47]	@ zero_extendqisi2
-	bl	__aeabi_uidiv
-	ldr	r3, .L2752+24
-	uxtb	r0, r0
-	cmp	r5, #1
-	uxth	lr, r5
-	add	r4, r0, #1
-	ldr	r10, [r3]
-	it	eq
-	moveq	r8, #1
-	ldr	r3, .L2752+32
-	it	ne
-	movne	r8, #3
-	movs	r2, #0
-	ldr	r6, [r3]
-	ldrh	r3, [r6, #148]
-.L2732:
-	add	r1, r10, r2, lsl #2
-	cmp	r5, #4
-	add	r2, r2, #1
-	ldrb	ip, [r1, #2]	@ zero_extendqisi2
-	ite	ne
-	strbne	r8, [r1, #3]
-	strbeq	fp, [r1, #3]
-	orr	ip, ip, #224
-	strb	ip, [r1, #2]
-	uxth	r1, r2
-	cmp	r4, r1
-	bhi	.L2732
-	smulbb	r0, r0, lr
-	add	r3, r3, lr
-	mov	r1, r5
-	uxtah	r0, r0, r3
-	strh	r0, [r6, #148]	@ movhi
-	movs	r0, #16
-	bl	__aeabi_idiv
-	ldr	r3, .L2752+44
-	add	r0, r0, r4
-	uxth	r0, r0
-	ldr	r3, [r3]
-	strh	r0, [r6, #134]	@ movhi
-	lsls	r3, r3, #19
-	bpl	.L2733
-	str	r0, [sp]
-	mov	r3, r4
-	movs	r2, #128
-	movw	r1, #2154
-	ldr	r0, .L2752+48
-	bl	printf
-.L2733:
-	ldr	r0, [r7]
-	movs	r2, #128
+	movs	r2, #64
 	movs	r1, #255
-	movs	r5, #0
-	adds	r0, r0, #160
+	add	r0, sp, #160
 	bl	ftl_memset
-	ldr	r3, [sp, #24]
-	ldr	r1, [r7]
-	ldr	r3, [r3]
-	ldrh	fp, [r1, #134]
-	str	r3, [sp, #24]
-	ldr	r3, .L2752+52
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	str	r3, [sp, #28]
-	ldr	r3, .L2752+40
-	ldrb	r3, [r3]	@ zero_extendqisi2
+	ldrb	r6, [r4, #5]	@ zero_extendqisi2
+	movs	r3, #2
+	ldrh	r7, [r4, #2]
+	str	r3, [sp, #8]
+	movs	r3, #0
 	str	r3, [sp, #12]
-	ldr	r3, .L2752+56
-	ldrh	r7, [sp, #12]
+.L2771:
+	ldr	r3, .L2891+28
 	ldrh	r3, [r3]
-	smulbb	r2, r4, r7
-	rsb	r0, r3, #21
-	movs	r3, #1
-	lsls	r3, r3, r0
-	uxth	r2, r2
-	uxth	r3, r3
+	cmp	r3, r7
+	bhi	.L2784
+.L2774:
+	ldrh	r3, [r4, #10]
+	ldr	r1, .L2891+28
+	ldrh	r2, [r4, #6]
+	ldrb	r0, [r4, #9]	@ zero_extendqisi2
+	strh	r7, [r4, #2]	@ movhi
+	add	r2, r2, r3
+	ldrh	r3, [r1]
+	strb	r6, [r4, #5]
+	str	r1, [sp, #16]
+	muls	r3, r0, r3
+	cmp	r2, r3
+	beq	.L2785
+	movw	r2, #1569
+	ldr	r1, .L2891+32
+	ldr	r0, .L2891+36
+	bl	printf
+.L2785:
+	ldr	r3, .L2891+40
+	movs	r6, #0
+	ldrh	r0, [r4, #10]
+	mov	r2, r6
+	ldr	r7, [r3]
 	str	r3, [sp, #20]
-.L2734:
-	cmp	r4, fp
-	bcc	.L2740
-	ldr	r3, .L2752+28
-	movs	r4, #0
-	strh	r5, [r1, #112]	@ movhi
-	strh	r4, [r1, #114]	@ movhi
-	ldrh	r3, [r3]
-	strh	r4, [r1, #118]	@ movhi
-	strh	fp, [r1, #132]	@ movhi
-	sub	r3, r3, fp
-	strh	r3, [r1, #116]	@ movhi
-	bl	ftl_low_format_data_init
-	mov	r0, r4
-	add	sp, sp, #40
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2720:
-	ldrb	r2, [r3, #2]	@ zero_extendqisi2
-	adds	r3, r3, #4
-	and	r2, r2, #31
-	bfi	r2, r0, #3, #2
-	strb	r2, [r3, #-2]
-	b	.L2719
-.L2729:
-	ldr	r3, .L2752+60
-	strh	r0, [r3]	@ movhi
-	ldr	r3, .L2752+64
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L2722
-	bl	ftl_test_block
-.L2722:
-	ldr	r3, .L2752+52
-	uxth	r1, r4
-	ldr	r0, .L2752+24
+.L2786:
+	cmp	r2, r0
+	bcc	.L2788
+	ldr	r2, [sp, #16]
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	ldr	r7, .L2891
+	ldrh	r2, [r2]
+	ldr	r8, .L2891+60
+	smulbb	r3, r3, r2
+	subs	r3, r3, r0
+	add	r6, r6, r3
+	ldr	r3, [r7]
+	uxth	r6, r6
+	tst	r3, #4096
+	beq	.L2789
+	ldrh	r1, [r4]
+	mov	r2, r6
+	ldr	r3, [r8]
+	ldr	r0, .L2891+44
+	ldrh	r3, [r3, r1, lsl #1]
+	bl	printf
+.L2789:
+	ldr	r3, [r8]
+	ldrh	r2, [r4]
+	strh	r6, [r3, r2, lsl #1]	@ movhi
+	ldr	r3, [r7]
+	lsls	r7, r3, #17
+	bpl	.L2790
+	ldr	r3, [sp, #44]
+	add	r1, sp, #32
+	ldr	r0, .L2891+48
+	str	r3, [sp]
+	ldm	r1, {r1, r2, r3}
+	bl	printf
+.L2790:
+	ldr	r6, .L2891+52
+	movs	r7, #0
+	ldr	fp, .L2891+56
+	movs	r1, #0
+	ldr	r0, [r5, #4]
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	lsls	r2, r2, #9
+	bl	ftl_memset
+	str	r6, [sp, #24]
+.L2791:
+	ldrb	r3, [fp]	@ zero_extendqisi2
+	ldr	r2, [sp, #8]
+	muls	r3, r2, r3
+	cmp	r7, r3
+	bcc	.L2803
+	ldr	r8, .L2891+52
 	movs	r6, #0
-	mov	fp, r6
-	mov	r8, r6
+.L2804:
+	ldr	r3, .L2891+56
+	ldr	r2, [sp, #8]
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	ldr	r5, [r0]
+	muls	r3, r2, r3
+	cmp	r6, r3
+	bcc	.L2811
+	mov	r0, r5
+	bl	zbuf_free
+	ldr	r3, [sp, #16]
+	ldrh	r2, [r4, #12]
+	ldrb	r1, [r4, #9]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	mla	r3, r1, r3, r2
+	ldr	r2, [sp, #20]
+	ldr	r2, [r2]
+	add	r3, r3, #1073741824
+	subs	r3, r3, #1
+	ldr	r3, [r2, r3, lsl #2]
+	adds	r3, r3, #1
+	beq	.L2812
+	movw	r2, #1660
+	ldr	r1, .L2891+32
+	ldr	r0, .L2891+36
+	bl	printf
+.L2812:
+	ldrh	r3, [r4, #6]
+	cmp	r3, #1
+	bne	.L2764
+	mov	r0, r4
+	bl	ftl_write_last_log_page
+.L2764:
+	add	sp, sp, #224
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2784:
+	ldrb	r6, [r4, #5]	@ zero_extendqisi2
+.L2772:
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	cmp	r3, r6
+	bhi	.L2783
+	movs	r3, #0
+	adds	r7, r7, #1
+	strb	r3, [r4, #5]
+	uxth	r7, r7
+	b	.L2771
+.L2892:
+	.align	2
+.L2891:
+	.word	.LANCHOR14
+	.word	.LC151
+	.word	.LC152
+	.word	.LC153
+	.word	.LC154
+	.word	.LC155
+	.word	.LANCHOR6
+	.word	.LANCHOR87
+	.word	.LANCHOR189
+	.word	.LC0
+	.word	.LANCHOR111
+	.word	.LC156
+	.word	.LC157
+	.word	.LANCHOR125
+	.word	.LANCHOR80
+	.word	.LANCHOR9
+.L2783:
+	add	r3, r6, #8
+	movw	r2, #65535
+	ldrh	r3, [r4, r3, lsl #1]
+	cmp	r3, r2
+	beq	.L2773
+	ldr	r2, .L2893
+	ldr	r1, [r5, #4]
+	ldrh	r2, [r2]
+	mla	r3, r3, r2, r7
+	ldr	r2, [r5, #12]
 	str	r3, [sp, #16]
-	ldr	r3, .L2752+40
-	add	r5, r5, r1, lsl #2
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	uxth	r2, r3
-	str	r2, [sp, #20]
-	mul	r2, r3, r1
-	ldr	r1, .L2752+32
-	ldr	r1, [r1]
-	str	r1, [sp, #12]
-.L2723:
+	ldr	r3, .L2893+4
 	ldr	r0, [sp, #16]
-	uxth	r1, fp
-	cmp	r0, r1
-	bhi	.L2741
-	cmp	r8, #0
-	bne	.L2728
-	ldrb	r3, [r5, #2]	@ zero_extendqisi2
-	orr	r3, r3, #224
-	strb	r3, [r5, #2]
-.L2728:
-	adds	r4, r4, #1
-	b	.L2721
-.L2726:
-	add	r1, r10, r2
-	ldr	r0, [sp, #28]
-	str	r3, [sp, #36]
-	str	r2, [sp, #32]
-	bl	flash_check_bad_block
-	ldr	r2, [sp, #32]
-	ldr	r3, [sp, #36]
-	cbz	r0, .L2724
-	ldrb	r0, [r5, #3]	@ zero_extendqisi2
-	movs	r1, #1
-	lsl	r1, r1, r10
-	orrs	r1, r1, r0
-	ldr	r0, [sp, #12]
-	strb	r1, [r5, #3]
-	ldr	r1, [sp, #12]
-	ldrh	r1, [r1, #148]
-	adds	r1, r1, #1
-	strh	r1, [r0, #148]	@ movhi
-.L2725:
-	add	r10, r10, #1
-.L2727:
-	sub	r1, r10, r6
-	ldr	r0, [sp, #20]
-	uxth	r1, r1
-	cmp	r0, r1
-	bhi	.L2726
-	add	fp, fp, #1
-	add	r6, r6, r3
-	subs	r2, r2, r3
-	b	.L2723
-.L2724:
-	add	r8, r8, #1
-	uxth	r8, r8
-	b	.L2725
-.L2741:
-	uxtb	r1, fp
-	mov	r10, r6
-	str	r1, [sp, #28]
-	b	.L2727
-.L2740:
-	ldr	r3, [sp, #24]
-	movs	r0, #0
-	mov	lr, r0
-	mov	ip, r0
-	add	r8, r3, r4, lsl #2
-	ldrb	r3, [r8, #2]	@ zero_extendqisi2
-	orr	r3, r3, #224
-	strb	r3, [r8, #2]
-.L2735:
-	ldr	r6, [sp, #28]
-	uxth	r3, ip
-	cmp	r3, r6
-	bcc	.L2743
-	adds	r4, r4, #1
-	add	r2, r2, r7
-	uxth	r4, r4
-	uxth	r2, r2
-	b	.L2734
-.L2738:
-	ldrb	r10, [r8, #3]	@ zero_extendqisi2
-	add	r3, lr, r6
-	asr	r10, r10, r3
-	tst	r10, #1
-	bne	.L2736
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	bl	ftl_read_ppa_page
+	cmp	r0, #512
+	mov	r8, r0
+	beq	.L2774
+	cmp	r0, #-1
+	beq	.L2775
+	ldr	r3, [r5, #12]
+	ldr	r2, [r3]
+	adds	r2, r2, #1
+	bne	.L2775
+	ldr	r3, [r3, #4]
+	adds	r3, r3, #1
+	bne	.L2775
+	ldr	r3, [r5, #4]
+	ldr	r3, [r3]
+	adds	r3, r3, #1
+	beq	.L2774
+.L2775:
+	ldr	r3, .L2893+8
+	movs	r2, #1
+	strb	r2, [r3]
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	ldrh	r2, [r4, #10]
+	mla	r3, r7, r3, r6
+	cmp	r2, r3
+	beq	.L2776
+	mov	r2, #1488
+	ldr	r1, .L2893+12
+	ldr	r0, .L2893+16
+	bl	printf
+.L2776:
+	ldrh	r3, [r4, #10]
+	ldrh	r2, [r4, #6]
+	add	r2, r2, r3
+	ldr	r3, .L2893+20
+	ldrh	r1, [r3]
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	muls	r3, r1, r3
+	cmp	r2, r3
+	beq	.L2777
+	movw	r2, #1489
+	ldr	r1, .L2893+12
+	ldr	r0, .L2893+16
+	bl	printf
+.L2777:
+	cmp	r8, #-1
+	beq	.L2779
+	ldr	r3, [r5, #12]
+	ldr	r0, [r3, #4]
+	adds	r2, r0, #1
+	beq	.L2779
+	bl	lpa_hash_get_ppa
+	ldr	r3, [sp, #20]
+	mov	r8, r0
+	cmp	r3, #0
+	beq	.L2781
+	ldr	r10, [r5, #12]
+	ldr	r3, [r10, #8]
+	cmp	r0, r3
+	beq	.L2781
+	cmp	r0, #-1
+	beq	.L2781
+	ldr	r3, .L2893+24
+	mov	fp, #1
+	ldr	r2, .L2893+28
+	ldrh	r0, [r3]
+	ldr	r3, .L2893+32
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	rsb	r3, r3, #24
+	subs	r3, r3, r0
+	lsr	r0, r8, r0
+	lsl	r3, fp, r3
+	subs	r3, r3, #1
+	ands	r0, r0, r3
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #20]
+	uxth	r0, r0
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bne	.L2781
+	ldr	r3, [r10]
+	mov	r0, r8
+	ldr	r10, .L2893+52
+	ldr	r1, [r5, #4]
+	str	r3, [sp, #8]
+	ldr	r3, .L2893+4
+	mov	r2, r10
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	bl	ftl_read_ppa_page
+	ldr	r3, [r10]
+	ldr	r2, [sp, #8]
+	cmp	r2, r3
+	bhi	.L2781
+	ldr	r3, [r5, #12]
+	ldr	r0, [r3, #8]
+	adds	r3, r0, #1
+	beq	.L2779
+	ldr	r3, .L2893+24
+	ldrh	r2, [r3]
+	ldr	r3, .L2893+32
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	lsrs	r0, r0, r2
+	rsb	r3, r3, #24
+	subs	r3, r3, r2
+	ldr	r2, .L2893+28
+	lsl	r3, fp, r3
+	subs	r3, r3, #1
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	ands	r0, r0, r3
+	bl	__aeabi_uidiv
+	uxth	r0, r0
+	bl	ftl_vpn_decrement
+.L2779:
+	ldrh	r3, [r4, #6]
+	subs	r3, r3, #1
+	strh	r3, [r4, #6]	@ movhi
+	ldrh	r3, [r4, #10]
+	adds	r3, r3, #1
+	strh	r3, [r4, #10]	@ movhi
+	movs	r3, #4
+	str	r3, [sp, #8]
+	movs	r3, #1
+	str	r3, [sp, #12]
+.L2773:
+	adds	r6, r6, #1
+	uxth	r6, r6
+	b	.L2772
+.L2788:
+	ldrh	r1, [r4, #12]
+	add	r1, r1, r2
+	adds	r2, r2, #1
+	ldr	r3, [r7, r1, lsl #2]
+	adds	r3, r3, #1
+	itt	ne
+	addne	r6, r6, #1
+	uxthne	r6, r6
+	b	.L2786
+.L2803:
+	add	r10, sp, #32
+	ldr	r0, [r10, r7, lsl #2]
+	adds	r6, r0, #1
+	bne	.L2792
+.L2796:
+	ldr	r2, .L2893+36
+	mov	r6, #-1
+	ldr	r3, [r5, #12]
+	ldr	r2, [r2]
+	ldr	r2, [r2, #8]
+	str	r6, [r3, #4]
+	str	r6, [r3, #8]
+	str	r2, [r3]
+	movs	r2, #0
+	str	r2, [r3, #12]
+	ldr	r3, [r5, #4]
+	str	r2, [r3]
+.L2793:
 	ldr	r3, [sp, #12]
-	add	r10, r5, #80
-	adds	r5, r5, #1
-	uxth	r5, r5
+	cmp	r3, #0
+	beq	.L2798
+	ldrh	r3, [r4, #6]
 	cmp	r3, #1
-	itett	hi
-	ldrhi	r3, [sp, #16]
-	movls	r3, r2
-	andhi	r3, r3, #1
-	addhi	r3, r3, r2
-	it	hi
-	uxthhi	r3, r3
-	add	r3, r3, r0
-	strh	r3, [r1, r10, lsl #1]	@ movhi
-.L2736:
-	adds	r6, r6, #1
-.L2739:
-	uxth	r3, r6
-	cmp	r3, r7
-	str	r3, [sp, #16]
-	bcc	.L2738
-	ldr	r3, [sp, #12]
-	add	ip, ip, #1
-	add	lr, lr, r3
-	ldr	r3, [sp, #20]
-	add	r0, r0, r3
-	uxth	r0, r0
-	b	.L2735
-.L2743:
-	movs	r6, #0
-	b	.L2739
-.L2753:
+	bls	.L2798
+	ldr	r10, .L2893+44
+.L2864:
+	mov	r0, r4
+	bl	ftl_get_new_free_page
+	ldr	r3, [r10]
+	mov	r8, r0
+	lsls	r3, r3, #17
+	bpl	.L2800
+	ldrh	r2, [r4, #12]
+	mov	r1, r0
+	ldrh	r3, [r4, #10]
+	ldr	r0, .L2893+40
+	add	r3, r3, r2
+	ldr	r2, [r5, #12]
+	subs	r3, r3, #1
+	ldr	r2, [r2, #4]
+	bl	printf
+.L2800:
+	ldrb	r3, [fp]	@ zero_extendqisi2
+	ldr	r1, [sp, #8]
+	ldrh	r2, [r4, #6]
+	muls	r3, r1, r3
+	adds	r3, r3, #1
+	subs	r3, r3, r7
+	cmp	r2, r3
+	bls	.L2798
+	ldr	r3, .L2893+4
+	mov	r0, r8
+	ldr	r2, [r5, #12]
+	ldr	r1, [r5, #4]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	bl	ftl_prog_ppa_page
+	str	r0, [sp, #28]
+	ldrh	r0, [r4]
+	bl	ftl_vpn_decrement
+	adds	r0, r6, #1
+	beq	.L2801
+	ldr	r3, [sp, #28]
+	adds	r3, r3, #1
+	beq	.L2801
+	add	r3, sp, #96
+	ldrh	r2, [r4, #12]
+	str	r8, [r3, r7, lsl #2]
+	ldrh	r3, [r4, #10]
+	add	r3, r3, r2
+	add	r2, sp, #160
+	subs	r3, r3, #1
+	str	r3, [r2, r7, lsl #2]
+.L2798:
+	adds	r7, r7, #1
+	b	.L2791
+.L2792:
+	ldr	r3, [sp, #24]
+	ldr	r1, [r5, #4]
+	ldr	r2, [r5, #12]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	bl	ftl_read_ppa_page
+	ldr	r3, [r5, #12]
+	mov	r6, r0
+	ldr	r0, [r3, #4]
+	bl	lpa_hash_get_ppa
+	ldr	r3, .L2893+44
+	mov	r8, r0
+	ldr	r3, [r3]
+	lsls	r1, r3, #17
+	bpl	.L2794
+	ldr	r3, [r5, #12]
+	mov	r1, r0
+	ldr	r2, [r10, r7, lsl #2]
+	ldr	r0, .L2893+48
+	ldr	r3, [r3, #4]
+	bl	printf
+.L2794:
+	add	r3, sp, #32
+	movs	r2, #1
+	ldr	r3, [r3, r7, lsl #2]
+	cmp	r8, r3
+	it	ne
+	movne	r6, #-1
+	ldr	r3, [r5, #12]
+	str	r2, [r3, #12]
+	adds	r2, r6, #1
+	str	r8, [r3, #8]
+	bne	.L2793
+	b	.L2796
+.L2801:
+	ldrh	r3, [r4, #6]
+	cmp	r3, #1
+	bls	.L2798
+	adds	r1, r6, #1
+	bne	.L2864
+	b	.L2798
+.L2894:
 	.align	2
-.L2752:
-	.word	.LANCHOR27
-	.word	.LC148
-	.word	.LANCHOR188
+.L2893:
+	.word	.LANCHOR105
+	.word	.LANCHOR125
+	.word	.LANCHOR185
+	.word	.LANCHOR189
 	.word	.LC0
-	.word	.LANCHOR103
-	.word	ftl_info_data_buffer
-	.word	.LANCHOR7
-	.word	.LANCHOR6
-	.word	.LANCHOR102
-	.word	1229739078
-	.word	.LANCHOR67
-	.word	.LANCHOR14
-	.word	.LC149
+	.word	.LANCHOR87
+	.word	.LANCHOR68
+	.word	.LANCHOR69
+	.word	.LANCHOR31
 	.word	.LANCHOR104
-	.word	.LANCHOR66
-	.word	.LANCHOR60
-	.word	.LANCHOR73
-	.size	ftl_low_format, .-ftl_low_format
-	.section	.text.ftl_re_low_format,"ax",%progbits
-	.align	1
-	.global	ftl_re_low_format
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_re_low_format, %function
-ftl_re_low_format:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	movs	r1, #1
-	ldr	r0, .L2760
+	.word	.LC159
+	.word	.LANCHOR14
+	.word	.LC158
+	.word	.LANCHOR181
+.L2811:
+	add	r10, sp, #96
+	ldr	r3, [r10, r6, lsl #2]
+	adds	r3, r3, #1
+	beq	.L2806
+	add	r7, sp, #32
+	ldr	r2, [r5, #12]
+	ldrb	r3, [r8]	@ zero_extendqisi2
+	ldr	r1, [r5, #4]
+	ldr	r0, [r7, r6, lsl #2]
+	bl	ftl_read_ppa_page
+	adds	r2, r0, #1
+	beq	.L2807
+	cmp	r0, #256
+	bne	.L2806
+.L2807:
+	ldr	r0, [r10, r6, lsl #2]
+	ldr	r10, .L2895+20
+	ldrb	r3, [r8]	@ zero_extendqisi2
+	ldr	r2, [r5, #12]
+	ldr	r1, [r5, #4]
+	bl	ftl_read_ppa_page
+	ldr	r3, [r10]
+	mov	fp, r0
+	lsls	r3, r3, #17
+	bpl	.L2809
+	ldr	r2, [r5, #12]
+	mov	r1, r0
+	ldr	r3, [r7, r6, lsl #2]
+	ldr	r0, .L2895
+	ldr	r2, [r2, #8]
 	bl	printf
-	bl	sblk_init
-	bl	ftl_info_blk_init
-	bl	ftl_ext_info_init
-	ldr	r2, .L2760+4
-	ldr	r3, .L2760+8
-	ldrh	r7, [r2]
-	ldr	r3, [r3]
-	ldr	r2, .L2760+12
-	ldrh	r1, [r3, #134]
-	ldr	r0, [r2]
-	movs	r2, #0
-	mov	r5, r2
-	mov	r6, r2
-	add	r0, r0, r1, lsl #2
-.L2755:
-	cmp	r1, r7
-	bcc	.L2759
-	movs	r4, #0
-	strh	r6, [r3, #114]	@ movhi
-	strh	r5, [r3, #118]	@ movhi
-	strh	r2, [r3, #116]	@ movhi
-	strh	r4, [r3, #122]	@ movhi
-	strh	r4, [r3, #120]	@ movhi
-	strh	r4, [r3, #124]	@ movhi
-	bl	ftl_low_format_data_init
-	mov	r0, r4
-	pop	{r3, r4, r5, r6, r7, pc}
-.L2759:
-	ldrb	r4, [r0, #2]	@ zero_extendqisi2
-	bfc	r4, #5, #3
-	strb	r4, [r0, #2]
-	ands	r4, r4, #24
-	bne	.L2756
+.L2809:
+	cmp	fp, #-1
+	beq	.L2806
+	ldr	r1, [r5, #12]
+	ldr	r2, [r7, r6, lsl #2]
+	ldr	r3, [r1, #8]
+	cmp	r2, r3
+	bne	.L2806
+	ldr	r3, [r10]
+	add	r7, sp, #160
+	tst	r3, #16384
+	beq	.L2810
+	ldr	r3, [r7, r6, lsl #2]
+	ldr	r1, [r1, #4]
+	ldr	r0, .L2895+4
+	bl	printf
+.L2810:
+	ldr	r3, [r5, #12]
+	ldrh	r2, [r7, r6, lsl #2]
+	ldr	r1, [r3, #8]
+	ldr	r0, [r3, #4]
+	bl	lpa_hash_update_ppa
+.L2806:
 	adds	r6, r6, #1
-	uxth	r6, r6
-.L2757:
-	adds	r1, r1, #1
-	uxth	r1, r1
-	adds	r0, r0, #4
-	b	.L2755
-.L2756:
-	cmp	r4, #16
-	itete	eq
-	addeq	r5, r5, #1
-	addne	r2, r2, #1
-	uxtheq	r5, r5
-	uxthne	r2, r2
-	b	.L2757
-.L2761:
-	.align	2
-.L2760:
-	.word	.LC150
-	.word	.LANCHOR6
-	.word	.LANCHOR102
-	.word	.LANCHOR7
-	.size	ftl_re_low_format, .-ftl_re_low_format
-	.section	.text.ftl_prog_ppa_page,"ax",%progbits
-	.align	1
-	.global	ftl_prog_ppa_page
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_prog_ppa_page, %function
-ftl_prog_ppa_page:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, lr}
-	str	r3, [sp]
-	mov	r3, r2
-	mov	r2, r1
-	ubfx	r1, r0, #0, #21
-	ubfx	r0, r0, #21, #3
-	bl	ftl_prog_page
-	add	sp, sp, #12
-	@ sp needed
-	ldr	pc, [sp], #4
-	.size	ftl_prog_ppa_page, .-ftl_prog_ppa_page
-	.section	.text.ftl_write_last_log_page,"ax",%progbits
+	b	.L2804
+.L2781:
+	ldr	r0, [r5, #12]
+	ldr	r3, .L2895+8
+	ldr	r2, [r0, #4]
+	ldr	r3, [r3]
+	cmp	r2, r3
+	bcs	.L2779
+	ldr	r3, .L2895+12
+	ldrb	r1, [r4, #9]	@ zero_extendqisi2
+	ldrh	ip, [r4, #10]
+	ldrh	r3, [r3]
+	muls	r3, r1, r3
+	subs	r3, r3, #1
+	cmp	ip, r3
+	bge	.L2779
+	ldr	r3, .L2895+16
+	ldr	r1, [r0]
+	ldr	r3, [r3]
+	ldr	r2, [r3, #8]
+	cmp	r1, r2
+	it	hi
+	strhi	r1, [r3, #8]
+	ldrh	r3, [r4, #12]
+	ldr	r1, [r0, #8]
+	ldr	r0, [r0, #4]
+	add	r2, ip, r3
+	uxth	r2, r2
+	bl	lpa_hash_update_ppa
+	ldr	r3, [sp, #36]
+	str	r3, [sp, #32]
+	ldr	r3, [sp, #40]
+	str	r3, [sp, #36]
+	ldr	r3, [sp, #44]
+	str	r3, [sp, #40]
+	ldr	r3, [sp, #16]
+	str	r3, [sp, #44]
+	b	.L2779
+.L2896:
+	.align	2
+.L2895:
+	.word	.LC159
+	.word	.LC160
+	.word	.LANCHOR122
+	.word	.LANCHOR87
+	.word	.LANCHOR104
+	.word	.LANCHOR14
+	.size	ftl_open_sblk_recovery, .-ftl_open_sblk_recovery
+	.section	.text.pm_write_page,"ax",%progbits
 	.align	1
-	.global	ftl_write_last_log_page
+	.global	pm_write_page
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_write_last_log_page, %function
-ftl_write_last_log_page:
+	.type	pm_write_page, %function
+pm_write_page:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
 	mov	r4, r0
-	ldrh	r3, [r0, #6]
+	ldr	r7, .L2910
+	mov	r8, r1
+	mov	r6, r7
+.L2898:
+	ldr	r3, [r7]
+	ldr	r2, [r3, #48]
+	ldrh	r1, [r3, #696]
+	adds	r2, r2, #1
+	str	r2, [r3, #48]
+	ldr	r2, .L2910+4
+	ldrh	r2, [r2]
+	cmp	r1, r2
+	bcs	.L2899
+	ldrh	r2, [r3, #692]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L2900
+.L2899:
+	bl	pm_alloc_new_blk
+	movs	r0, #0
+	bl	ftl_info_flush
+.L2900:
+	ldr	r3, [r6]
+	ldrh	r2, [r3, #692]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L2901
+	movw	r2, #263
+	ldr	r1, .L2910+8
+	ldr	r0, .L2910+12
+	bl	printf
+.L2901:
+	ldr	r3, [r6]
+	movs	r1, #0
+	ldr	r2, .L2910+16
+	ldr	r10, .L2910+32
+	ldrh	r5, [r3, #692]
+	ldrh	r2, [r2]
+	ldrh	r3, [r3, #696]
+	ldr	r0, [r10]
+	mla	r5, r2, r5, r3
+	movs	r2, #64
+	bl	ftl_memset
+	ldr	r2, [r6]
+	ldr	r3, [r10]
+	ldrb	r0, [r2, #694]	@ zero_extendqisi2
+	str	r4, [r3]
+	ldr	r1, [r2, #48]
+	ldr	r2, .L2910+20
+	str	r1, [r3, #4]
+	mov	r1, r5
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	str	r2, [sp]
+	mov	r2, r8
+	bl	ftl_prog_page
+	ldr	r2, [r6]
+	ldrh	r3, [r2, #696]
+	adds	r3, r3, #1
+	uxth	r3, r3
 	cmp	r3, #1
-	bne	.L2765
-	ldr	r3, .L2767
-	ldrh	r5, [r0, #12]
-	ldr	r6, [r3]
-	bl	ftl_get_new_free_page
-	adds	r3, r0, #1
-	mov	r7, r0
-	beq	.L2766
-	ldrh	r0, [r4]
-	add	r6, r6, r5, lsl #2
-	ldr	r5, .L2767+4
-	movs	r4, #0
-	bl	ftl_vpn_decrement
-	ldr	r3, .L2767+8
-	mov	r0, r6
-	ldr	r2, .L2767+12
-	str	r3, [r5]
-	ldr	r3, .L2767+16
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	ldrh	r3, [r3]
-	muls	r1, r3, r1
-	lsls	r1, r1, #2
-	bl	js_hash
-	ldr	r3, .L2767+20
-	mov	r2, r5
-	str	r0, [r5, #4]
-	mov	r1, r6
-	mov	r0, r7
-	str	r4, [r5, #8]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	str	r4, [r5, #12]
-	bl	ftl_prog_ppa_page
-.L2766:
+	strh	r3, [r2, #696]	@ movhi
+	ldr	r3, .L2910+24
+	beq	.L2902
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	cbz	r1, .L2903
+.L2902:
+	movs	r2, #0
+	strb	r2, [r3]
+	b	.L2898
+.L2903:
+	adds	r0, r0, #1
+	bne	.L2905
+	mov	r1, r5
+	ldr	r0, .L2910+28
+	bl	printf
+	b	.L2898
+.L2905:
+	ldrh	r3, [r2, #698]
 	movs	r0, #0
-	pop	{r3, r4, r5, r6, r7, pc}
-.L2765:
-	mov	r0, #-1
-	pop	{r3, r4, r5, r6, r7, pc}
-.L2768:
+	cmp	r4, r3
+	itt	cc
+	addcc	r4, r4, #176
+	strcc	r5, [r2, r4, lsl #2]
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.L2911:
 	.align	2
-.L2767:
-	.word	.LANCHOR109
-	.word	.LANCHOR176
-	.word	-178307901
-	.word	.LANCHOR78
-	.word	.LANCHOR85
-	.word	.LANCHOR123
-	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
-	.section	.text.ftl_open_sblk_recovery,"ax",%progbits
+.L2910:
+	.word	.LANCHOR104
+	.word	.LANCHOR87
+	.word	.LANCHOR190
+	.word	.LC0
+	.word	.LANCHOR105
+	.word	.LANCHOR125
+	.word	.LANCHOR192
+	.word	.LC161
+	.word	.LANCHOR191
+	.size	pm_write_page, .-pm_write_page
+	.section	.text.ftl_dump_write_open_sblk,"ax",%progbits
 	.align	1
-	.global	ftl_open_sblk_recovery
+	.global	ftl_dump_write_open_sblk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_open_sblk_recovery, %function
-ftl_open_sblk_recovery:
-	@ args = 0, pretend = 0, frame = 88
+	.type	ftl_dump_write_open_sblk, %function
+ftl_dump_write_open_sblk:
+	@ args = 0, pretend = 0, frame = 64
 	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2941
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #96
-	ldr	r5, .L2876
-	mov	r4, r0
-	str	r1, [sp, #24]
-	ldr	r3, [r5]
-	lsls	r7, r3, #19
-	bpl	.L2770
-	ldrh	r1, [r0, #2]
-	ldr	r0, .L2876+4
-	bl	printf
-.L2770:
-	ldr	r3, [r5]
-	lsls	r6, r3, #19
-	bpl	.L2771
-	ldrb	r1, [r4, #5]	@ zero_extendqisi2
-	ldr	r0, .L2876+8
-	bl	printf
-.L2771:
-	ldr	r3, [r5]
-	lsls	r0, r3, #19
-	bpl	.L2772
-	ldrh	r1, [r4]
-	ldr	r0, .L2876+12
-	bl	printf
-.L2772:
-	ldr	r3, [r5]
-	lsls	r1, r3, #19
-	bpl	.L2773
-	ldrh	r2, [r4, #18]
-	ldrh	r1, [r4, #16]
-	ldr	r0, .L2876+16
-	bl	printf
-.L2773:
-	ldrh	r3, [r4, #10]
-	ldrh	r2, [r4]
-	strh	r3, [r4, #14]	@ movhi
-	ldr	r3, .L2876+20
-	ldrh	r3, [r3]
-	cmp	r2, r3
-	bcs	.L2769
-	movs	r0, #1
-	bl	buf_alloc
-	movs	r2, #64
 	mov	r5, r0
-	movs	r1, #255
-	add	r0, sp, #32
-	bl	ftl_memset
-	ldrb	r6, [r4, #5]	@ zero_extendqisi2
-	movs	r3, #2
-	ldrh	r7, [r4, #2]
-	str	r3, [sp, #12]
-	movs	r3, #0
-	str	r3, [sp, #16]
-.L2775:
-	ldr	r3, .L2876+24
+	sub	sp, sp, #104
 	ldrh	r3, [r3]
-	cmp	r3, r7
-	bhi	.L2788
-.L2778:
-	ldrh	r3, [r4, #10]
-	ldr	r1, .L2876+24
-	ldrh	r2, [r4, #6]
-	ldrb	r0, [r4, #9]	@ zero_extendqisi2
-	strh	r7, [r4, #2]	@ movhi
-	add	r2, r2, r3
-	ldrh	r3, [r1]
-	strb	r6, [r4, #5]
-	str	r1, [sp, #20]
-	muls	r3, r0, r3
-	cmp	r2, r3
-	beq	.L2789
-	movw	r2, #1493
-	ldr	r1, .L2876+28
-	ldr	r0, .L2876+32
-	bl	printf
-.L2789:
-	ldr	r3, .L2876+36
+	cmp	r3, r0
+	bls	.L2912
+	ldr	r3, .L2941+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L2914
+	ldr	r3, .L2941+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L2912
+.L2914:
+	ldr	r7, .L2941+12
+	lsls	r4, r5, #2
+	add	r1, sp, #88
+	strh	r5, [sp, #72]	@ movhi
+	mov	r0, r5
 	movs	r6, #0
-	ldrh	r0, [r4, #10]
-	mov	r2, r6
-	ldr	r7, [r3]
-	str	r3, [sp, #28]
-.L2790:
-	cmp	r2, r0
-	bcc	.L2792
-	ldr	r2, [sp, #20]
-	ldrb	r3, [r4, #9]	@ zero_extendqisi2
-	ldr	r7, .L2876
-	ldrh	r2, [r2]
-	ldr	r8, .L2876+56
-	smulbb	r3, r3, r2
-	subs	r3, r3, r0
-	add	r6, r6, r3
 	ldr	r3, [r7]
-	uxth	r6, r6
-	tst	r3, #4096
-	beq	.L2793
-	ldrh	r1, [r4]
-	mov	r2, r6
-	ldr	r3, [r8]
-	ldr	r0, .L2876+40
-	ldrh	r3, [r3, r1, lsl #1]
-	bl	printf
-.L2793:
-	ldr	r3, [r8]
-	ldrh	r2, [r4]
-	strh	r6, [r3, r2, lsl #1]	@ movhi
+	add	r3, r3, r4
+	ldrb	r3, [r3, #2]	@ zero_extendqisi2
+	and	r3, r3, #224
+	cmp	r3, #160
+	itet	eq
+	ldreq	r3, .L2941+16
+	movne	r8, #1
+	ldrbeq	r8, [r3]	@ zero_extendqisi2
+	bl	ftl_get_blk_list_in_sblk
+	ldr	r3, .L2941+20
+	uxtb	r0, r0
+	strb	r6, [sp, #77]
+	strb	r0, [sp, #81]
+	ldrh	r3, [r3]
+	strh	r6, [sp, #74]	@ movhi
+	strh	r6, [sp, #82]	@ movhi
+	smulbb	r0, r3, r0
 	ldr	r3, [r7]
-	lsls	r0, r3, #17
-	bpl	.L2794
-	ldr	r3, [sp, #44]
-	add	r1, sp, #32
-	ldr	r0, .L2876+44
+	mov	r7, r6
+	ldr	r1, [r3, r5, lsl #2]
+	add	r4, r4, r3
+	ldrb	r2, [r4, #2]	@ zero_extendqisi2
+	strh	r0, [sp, #78]	@ movhi
+	ubfx	r1, r1, #11, #8
+	ldr	r0, .L2941+24
+	str	r1, [sp, #4]
+	mov	r1, r5
+	ldrh	r3, [r3, r5, lsl #2]
+	ubfx	r3, r3, #0, #11
 	str	r3, [sp]
-	ldm	r1, {r1, r2, r3}
+	ubfx	r3, r2, #3, #2
+	lsrs	r2, r2, #5
 	bl	printf
-.L2794:
-	ldr	r6, .L2876+48
-	movs	r7, #0
-	ldr	r8, .L2876
-	movs	r1, #0
-	ldr	r0, [r5, #4]
-	ldrb	r2, [r6]	@ zero_extendqisi2
-	lsls	r2, r2, #9
-	bl	ftl_memset
-	str	r6, [sp, #24]
-.L2795:
-	ldr	r3, .L2876+52
-	ldr	r2, [sp, #12]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	muls	r3, r2, r3
-	cmp	r7, r3
-	bcc	.L2808
-	mov	r0, r5
-	bl	buf_free
-	ldr	r3, [sp, #20]
-	ldrh	r2, [r4, #12]
-	ldrb	r1, [r4, #9]	@ zero_extendqisi2
+	movs	r0, #1
+	bl	buf_alloc
+	mov	r4, r0
+	str	r6, [sp, #44]
+.L2916:
+	ldr	r3, .L2941+20
+	uxth	r10, r6
 	ldrh	r3, [r3]
-	mla	r3, r1, r3, r2
-	ldr	r2, [sp, #28]
-	ldr	r2, [r2]
-	add	r3, r3, #1073741824
+	cmp	r3, r10
+	bls	.L2922
+	mov	r3, r10
+	str	r10, [sp, #52]
+	lsls	r3, r3, #1
+	mov	fp, #0
 	subs	r3, r3, #1
-	ldr	r3, [r2, r3, lsl #2]
-	adds	r3, r3, #1
-	beq	.L2809
-	movw	r2, #1567
-	ldr	r1, .L2876+28
-	ldr	r0, .L2876+32
-	bl	printf
-.L2809:
-	ldrh	r3, [r4, #6]
-	cmp	r3, #1
-	bne	.L2769
-	mov	r0, r4
-	bl	ftl_write_last_log_page
-.L2769:
-	add	sp, sp, #96
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2788:
-	ldrb	r6, [r4, #5]	@ zero_extendqisi2
-.L2776:
-	ldrb	r3, [r4, #9]	@ zero_extendqisi2
-	cmp	r3, r6
-	bhi	.L2787
-	movs	r3, #0
+	str	r3, [sp, #60]
+	b	.L2926
+.L2924:
+	ldr	r3, [sp, #64]
+	add	r2, sp, #104
+	add	r3, r2, r3, lsl #1
+	ldrh	r3, [r3, #-32]
+	str	r3, [sp, #48]
+	movw	r3, #65535
+	ldr	r2, [sp, #48]
+	cmp	r2, r3
+	bne	.L2917
+.L2923:
 	adds	r7, r7, #1
-	strb	r3, [r4, #5]
 	uxth	r7, r7
-	b	.L2775
-.L2877:
-	.align	2
-.L2876:
-	.word	.LANCHOR14
-	.word	.LC151
-	.word	.LC152
-	.word	.LC153
-	.word	.LC154
-	.word	.LANCHOR6
-	.word	.LANCHOR85
-	.word	.LANCHOR189
-	.word	.LC0
-	.word	.LANCHOR109
-	.word	.LC155
-	.word	.LC156
-	.word	.LANCHOR123
-	.word	.LANCHOR78
-	.word	.LANCHOR9
-.L2787:
-	add	r3, r6, #8
-	movw	r2, #65535
-	ldrh	r3, [r4, r3, lsl #1]
+.L2918:
+	cmp	r8, r7
+	bcs	.L2924
+	add	fp, fp, #1
+.L2926:
+	uxth	r3, fp
+	str	r3, [sp, #44]
+	ldr	r2, [sp, #44]
+	ldrb	r3, [sp, #81]	@ zero_extendqisi2
 	cmp	r3, r2
-	beq	.L2777
-	ldr	r2, .L2878
-	ldr	r1, [r5, #4]
-	ldrh	r2, [r2]
-	mla	r3, r3, r2, r7
-	ldr	r2, [r5, #12]
-	str	r3, [sp, #20]
-	ldr	r3, .L2878+4
-	ldr	r0, [sp, #20]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	bl	ftl_read_ppa_page
-	cmp	r0, #512
-	mov	r8, r0
-	beq	.L2778
-	cmp	r0, #-1
-	beq	.L2779
-	ldr	r3, [r5, #12]
-	ldr	r2, [r3]
-	adds	r2, r2, #1
-	bne	.L2779
-	ldr	r3, [r3, #4]
-	adds	r3, r3, #1
-	bne	.L2779
-	ldr	r3, [r5, #4]
-	ldr	r3, [r3]
-	adds	r3, r3, #1
-	beq	.L2778
-.L2779:
-	ldr	r3, .L2878+8
-	movs	r2, #1
-	strb	r2, [r3]
-	ldrb	r3, [r4, #9]	@ zero_extendqisi2
-	ldrh	r2, [r4, #10]
-	mla	r3, r7, r3, r6
-	cmp	r2, r3
-	beq	.L2780
-	movw	r2, #1412
-	ldr	r1, .L2878+12
-	ldr	r0, .L2878+16
+	bls	.L2925
+	mov	r3, r2
+	movs	r7, #1
+	adds	r3, r3, #8
+	str	r3, [sp, #64]
+	b	.L2918
+.L2917:
+	ldr	r3, .L2941+28
+	cmp	r8, #3
+	ldr	r2, [sp, #48]
+	ldrh	r3, [r3]
+	mul	r3, r2, r3
+	bne	.L2919
+	uxtah	r3, r3, r6
+	orr	r3, r3, r7, lsl #24
+.L2920:
+	str	r3, [r4, #24]
+	movs	r1, #1
+	mov	r0, r4
+	str	r3, [sp, #68]
+	bl	sblk_read_page
+	ldr	r1, [r4, #12]
+	ldr	r2, [r4, #4]
+	ldr	r3, [r4, #36]
+	ldr	r0, [r1, #12]
+	str	r3, [sp, #56]
+	str	r0, [sp, #32]
+	ldr	r0, [r1, #8]
+	str	r0, [sp, #28]
+	ldr	r0, [r1, #4]
+	str	r0, [sp, #24]
+	ldr	r1, [r1]
+	ldr	r0, .L2941+32
+	str	r1, [sp, #20]
+	ldr	r1, [r2, #12]
+	str	r1, [sp, #16]
+	ldr	r1, [r2, #8]
+	str	r1, [sp, #12]
+	ldr	r1, [r2, #4]
+	str	r1, [sp, #8]
+	ldr	r2, [r2]
+	ldr	r1, [sp, #48]
+	str	r3, [sp]
+	str	r2, [sp, #4]
+	ldr	r3, [sp, #68]
+	ldr	r2, [sp, #52]
 	bl	printf
-.L2780:
-	ldrh	r3, [r4, #10]
-	ldrh	r2, [r4, #6]
-	add	r2, r2, r3
-	ldr	r3, .L2878+20
-	ldrh	r1, [r3]
-	ldrb	r3, [r4, #9]	@ zero_extendqisi2
-	muls	r3, r1, r3
-	cmp	r2, r3
-	beq	.L2781
-	movw	r2, #1413
-	ldr	r1, .L2878+12
-	ldr	r0, .L2878+16
+	ldr	r3, [sp, #56]
+	cmp	r3, #512
+	bne	.L2923
+.L2922:
+	uxth	r2, r6
+	ldr	r6, .L2941+36
+	ldr	r3, [sp, #44]
+	mov	r1, r5
+	str	r7, [sp]
+	ldr	r0, .L2941+40
 	bl	printf
-.L2781:
-	cmp	r8, #-1
-	beq	.L2783
-	ldr	r3, [r5, #12]
-	ldr	r0, [r3, #4]
-	adds	r2, r0, #1
-	beq	.L2783
-	bl	lpa_hash_get_ppa
-	ldr	r3, [sp, #24]
-	mov	r8, r0
-	cmp	r3, #0
-	beq	.L2785
-	ldr	r10, [r5, #12]
-	ldr	r3, [r10, #8]
-	cmp	r0, r3
-	beq	.L2785
-	cmp	r0, #-1
-	beq	.L2785
-	ldr	r3, .L2878+24
-	mov	fp, #1
-	ldr	r2, .L2878+28
-	ldrh	r0, [r3]
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	rsb	r3, r0, #21
-	lsl	r3, fp, r3
-	lsr	r0, r8, r0
-	subs	r3, r3, #1
-	ands	r0, r0, r3
-	bl	__aeabi_uidiv
-	ldr	r3, [sp, #24]
-	uxth	r0, r0
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	movs	r1, #0
+	ldr	r0, [r4, #4]
+	ldr	fp, .L2941+4
+	lsls	r2, r2, #9
+	bl	ftl_memset
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	movs	r1, #0
+	ldr	r0, [r4, #12]
+	lsls	r2, r2, #1
+	bl	ftl_memset
+.L2927:
+	ldr	r3, .L2941+20
 	ldrh	r3, [r3]
-	cmp	r3, r0
-	bne	.L2785
-	ldr	r3, [r10]
-	mov	r0, r8
-	ldr	r10, .L2878+48
-	ldr	r1, [r5, #4]
-	str	r3, [sp, #12]
-	ldr	r3, .L2878+4
-	mov	r2, r10
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	bl	ftl_read_ppa_page
-	ldr	r3, [r10]
-	ldr	r2, [sp, #12]
-	cmp	r2, r3
-	bhi	.L2785
-	ldr	r3, [r5, #12]
-	ldr	r0, [r3, #8]
-	adds	r3, r0, #1
-	beq	.L2783
-	ldr	r3, .L2878+24
-	ldrh	r2, [r3]
-	rsb	r3, r2, #21
-	lsrs	r0, r0, r2
-	lsl	r3, fp, r3
-	ldr	r2, .L2878+28
-	subs	r3, r3, #1
-	ands	r0, r0, r3
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	bl	__aeabi_uidiv
-	uxth	r0, r0
-	bl	ftl_vpn_decrement
-.L2783:
-	ldrh	r3, [r4, #6]
-	subs	r3, r3, #1
-	strh	r3, [r4, #6]	@ movhi
-	ldrh	r3, [r4, #10]
-	adds	r3, r3, #1
-	strh	r3, [r4, #10]	@ movhi
-	movs	r3, #4
-	str	r3, [sp, #12]
-	movs	r3, #1
-	str	r3, [sp, #16]
-.L2777:
+	cmp	r3, r10
+	bls	.L2932
+	lsl	r3, r10, #1
+	movs	r7, #0
+	str	r3, [sp, #44]
+	b	.L2933
+.L2919:
+	cmp	r8, #2
+	itett	eq
+	ldreq	r2, [sp, #60]
+	uxtahne	r3, r3, r6
+	addeq	r3, r3, r2
+	ldreq	r2, .L2941+16
+	ittt	eq
+	addeq	r3, r3, r7
+	ldrbeq	r2, [r2]	@ zero_extendqisi2
+	orreq	r3, r3, r2, lsl #24
+	b	.L2920
+.L2925:
 	adds	r6, r6, #1
-	uxth	r6, r6
-	b	.L2776
-.L2792:
-	ldrh	r1, [r4, #12]
-	add	r1, r1, r2
-	adds	r2, r2, #1
-	ldr	r3, [r7, r1, lsl #2]
-	adds	r3, r3, #1
-	itt	ne
-	addne	r6, r6, #1
-	uxthne	r6, r6
-	b	.L2790
-.L2808:
-	add	fp, sp, #32
-	ldr	r0, [fp, r7, lsl #2]
-	adds	r1, r0, #1
-	bne	.L2796
-.L2800:
-	ldr	r2, .L2878+32
-	mov	r6, #-1
-	ldr	r3, [r5, #12]
-	ldr	r2, [r2]
-	ldr	r2, [r2, #8]
-	str	r6, [r3, #4]
-	str	r6, [r3, #8]
-	str	r2, [r3]
-	movs	r2, #0
-	str	r2, [r3, #12]
-	ldr	r3, [r5, #4]
-	str	r2, [r3]
-.L2797:
-	ldr	r3, [sp, #16]
-	cmp	r3, #0
-	beq	.L2802
-	ldrh	r3, [r4, #6]
-	cmp	r3, #1
-	bls	.L2802
-	ldr	fp, .L2878+52
-.L2853:
-	mov	r0, r4
-	bl	ftl_get_new_free_page
-	ldr	r3, [r8]
-	mov	r10, r0
-	lsls	r0, r3, #17
-	bpl	.L2804
-	ldr	r3, [r5, #12]
+	b	.L2916
+.L2931:
+	uxth	r8, r7
 	mov	r1, r10
-	mov	r0, fp
-	ldr	r2, [r3, #4]
+	ldr	r0, .L2941+44
+	mov	r2, r8
 	bl	printf
-.L2804:
-	ldr	r3, .L2878+36
-	ldr	r1, [sp, #12]
-	ldrh	r2, [r4, #6]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	muls	r3, r1, r3
-	adds	r3, r3, #1
-	subs	r3, r3, r7
+	ldrb	ip, [fp]	@ zero_extendqisi2
+	add	r2, r8, #8
+	ldr	r0, .L2941+28
+	cmp	ip, #0
+	beq	.L2928
+	add	r3, sp, #104
+	add	r2, r3, r2, lsl #1
+	ldrh	r3, [r0]
+	mov	r0, r4
+	ldrh	r2, [r2, #-32]
+	muls	r3, r2, r3
+	orr	r3, r3, r10
+	str	r3, [r4, #24]
+	bl	sblk_3d_tlc_dump_prog
+.L2929:
+	adds	r7, r7, #1
+.L2933:
+	ldrb	r2, [sp, #81]	@ zero_extendqisi2
+	uxth	r3, r7
 	cmp	r2, r3
-	bls	.L2802
-	ldr	r3, [sp, #24]
-	mov	r0, r10
-	ldr	r1, [r5, #4]
-	ldr	r2, [r5, #12]
+	bhi	.L2931
+	add	r3, r10, #1
+	uxth	r10, r3
+	b	.L2927
+.L2928:
+	ldr	r3, .L2941+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	bl	ftl_prog_ppa_page
-	mov	r10, r0
-	ldrh	r0, [r4]
-	bl	ftl_vpn_decrement
-	adds	r1, r6, #1
-	beq	.L2805
-	cmp	r10, #-1
-	beq	.L2805
-	ldr	r3, [r8]
-	lsls	r2, r3, #17
-	bpl	.L2806
-	ldrh	r2, [r4, #12]
-	ldrh	r3, [r4, #10]
-	ldr	r1, [r5, #12]
-	ldr	r0, .L2878+40
-	add	r3, r3, r2
-	subs	r3, r3, #1
-	ldr	r2, [r1, #8]
-	ldr	r1, [r1, #4]
-	bl	printf
-.L2806:
-	ldrh	r1, [r4, #12]
-	ldrh	r2, [r4, #10]
-	ldr	r3, [r5, #12]
-	add	r2, r2, r1
-	subs	r2, r2, #1
-	ldr	r1, [r3, #8]
-	uxth	r2, r2
-	ldr	r0, [r3, #4]
-	bl	lpa_hash_update_ppa
-.L2802:
-	adds	r7, r7, #1
-	b	.L2795
-.L2796:
-	ldr	r3, [sp, #24]
-	ldr	r2, [r5, #12]
-	ldr	r1, [r5, #4]
+	cmp	r3, #2
+	add	r3, sp, #104
+	add	r2, r3, r2, lsl #1
+	bne	.L2930
+	ldrh	r2, [r2, #-32]
+	ldrh	r3, [r0]
+	mov	r0, r4
+	muls	r3, r2, r3
+	ldr	r2, [sp, #44]
+	orrs	r3, r3, r2
+	orr	r3, r3, #33554432
+	str	r3, [r4, #24]
+	bl	sblk_mlc_dump_prog
+	b	.L2929
+.L2930:
+	ldrh	r3, [r2, #-32]
+	ldrh	r1, [r0]
+	movs	r0, #1
+	muls	r1, r3, r1
+	ldr	r3, .L2941+48
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	bl	ftl_read_ppa_page
-	ldr	r3, [r5, #12]
-	mov	r6, r0
-	ldr	r0, [r3, #4]
-	bl	lpa_hash_get_ppa
-	ldr	r3, [r8]
-	mov	r10, r0
-	lsls	r2, r3, #17
-	bpl	.L2798
-	ldr	r3, [r5, #12]
-	mov	r1, r0
-	ldr	r2, [fp, r7, lsl #2]
-	ldr	r0, .L2878+44
-	ldr	r3, [r3, #4]
+	orr	r1, r1, r10
+	str	r1, [r4, #24]
+	rsb	r2, r3, #24
+	str	ip, [sp, #4]
+	lsls	r0, r0, r3
+	subs	r3, r0, #1
+	lsr	r0, r1, r2
+	lsl	lr, r3, r2
+	ands	r0, r0, r3
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	bic	r1, r1, lr
+	uxtb	r0, r0
+	str	r3, [sp]
+	ldr	r3, [r4, #12]
+	ldr	r2, [r4, #4]
+	bl	flash_prog_page_en
+	b	.L2929
+.L2932:
+	mov	r0, r4
+	bl	zbuf_free
+	mov	r1, r5
+	ldr	r0, .L2941+52
 	bl	printf
-.L2798:
-	ldr	r2, .L2878+32
-	add	r3, sp, #32
-	ldr	r3, [r3, r7, lsl #2]
-	ldr	r1, [r2]
-	cmp	r10, r3
-	it	ne
-	movne	r6, #-1
-	ldr	r3, [r5, #12]
-	ldr	r2, [r1, #8]
-	adds	r0, r2, #1
-	str	r0, [r1, #8]
-	str	r2, [r3]
-	movs	r2, #1
-	str	r10, [r3, #8]
-	str	r2, [r3, #12]
-	adds	r3, r6, #1
-	bne	.L2797
-	b	.L2800
-.L2805:
-	ldrh	r3, [r4, #6]
-	cmp	r3, #1
-	bls	.L2802
-	adds	r3, r6, #1
-	bne	.L2853
-	b	.L2802
-.L2879:
+.L2912:
+	add	sp, sp, #104
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2942:
 	.align	2
-.L2878:
-	.word	.LANCHOR103
-	.word	.LANCHOR123
-	.word	.LANCHOR182
-	.word	.LANCHOR189
-	.word	.LC0
-	.word	.LANCHOR85
-	.word	.LANCHOR66
-	.word	.LANCHOR67
-	.word	.LANCHOR102
-	.word	.LANCHOR78
-	.word	.LC159
-	.word	.LC157
-	.word	.LANCHOR178
-	.word	.LC158
-.L2785:
-	ldr	r0, [r5, #12]
-	ldr	r3, .L2880
-	ldr	r2, [r0, #4]
+.L2941:
+	.word	.LANCHOR6
+	.word	.LANCHOR77
+	.word	.LANCHOR74
+	.word	.LANCHOR7
+	.word	.LANCHOR73
+	.word	.LANCHOR87
+	.word	.LC162
+	.word	.LANCHOR105
+	.word	.LC163
+	.word	.LANCHOR125
+	.word	.LC164
+	.word	.LC165
+	.word	.LANCHOR31
+	.word	.LC166
+	.size	ftl_dump_write_open_sblk, .-ftl_dump_write_open_sblk
+	.section	.text.ftl_ink_check_sblk,"ax",%progbits
+	.align	1
+	.global	ftl_ink_check_sblk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_ink_check_sblk, %function
+ftl_ink_check_sblk:
+	@ args = 0, pretend = 0, frame = 40
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r1, r0
+	ldr	r5, .L2961
+	sub	sp, sp, #48
+	mov	r4, r0
+	ldr	r2, [r5]
+	ldr	r3, [r2, r0, lsl #2]
+	ldrh	r2, [r2, r0, lsl #2]
+	ldr	r0, .L2961+4
+	ubfx	r3, r3, #11, #8
+	ubfx	r2, r2, #0, #11
+	bl	printf
+	movw	r3, #65535
+	str	r5, [sp, #8]
+	cmp	r4, r3
+	beq	.L2943
+	ldr	r3, .L2961+8
+	ldrh	r3, [r3]
+	cmp	r3, r4
+	bls	.L2943
+	movs	r1, #0
+	mov	r0, r4
+	bl	ftl_erase_sblk
+	add	r1, sp, #32
+	mov	r0, r4
+	strh	r4, [sp, #16]	@ movhi
+	movs	r6, #0
+	bl	ftl_get_blk_list_in_sblk
+	strb	r0, [sp, #25]
+	movs	r0, #1
+	bl	buf_alloc
+	ldr	r3, [sp, #8]
+	mov	r5, r0
+	ldr	r7, .L2961+12
+	ldr	r0, [r0, #4]
 	ldr	r3, [r3]
+	ldrb	r2, [r7]	@ zero_extendqisi2
+	ldrh	r3, [r3, r4, lsl #2]
+	lsls	r2, r2, #9
+	ubfx	r3, r3, #0, #11
+	cmp	r3, #1
+	ite	le
+	movle	r1, #85
+	movgt	r1, #170
+	bl	ftl_memset
+	bl	sblk_wait_write_queue_completed
+.L2947:
+	ldr	r3, .L2961+16
+	uxth	r2, r6
+	mov	r8, #0
+	ldrh	r1, [r3]
+	str	r3, [sp, #12]
+	cmp	r1, r2
+	bhi	.L2951
+.L2952:
+	ldr	r3, [sp, #12]
+	ldrh	r1, [r3]
+	uxth	r3, r8
+	cmp	r1, r3
+	bls	.L2957
+	mov	fp, #0
+	movw	r10, #65535
+	b	.L2958
+.L2949:
+	uxth	r3, r8
+	add	r2, sp, #48
+	add	r3, r2, r3, lsl #1
+	movw	r2, #65535
+	ldrh	r3, [r3, #-16]
+	cmp	r3, r2
+	beq	.L2948
+	ldr	r2, .L2961+20
+	uxth	r1, r6
+	ldr	r0, .L2961+24
+	mov	r10, #0
+	ldrh	r2, [r2]
+	mla	r1, r3, r2, r1
+	ldr	r2, [r5, #4]
+	ldr	r3, .L2961+28
+	str	r3, [r2, #4]
+	ldr	r3, [r5, #12]
+	str	r1, [r2]
+	str	r10, [r3]
+	ldrb	ip, [r0]	@ zero_extendqisi2
+	movs	r0, #1
+	str	r10, [sp, #4]
+	rsb	fp, ip, #24
+	lsl	r0, r0, ip
+	add	ip, r0, #-1
+	lsr	r0, r1, fp
+	lsl	lr, ip, fp
+	and	r0, r0, ip
+	ldrb	ip, [r7]	@ zero_extendqisi2
+	bic	r1, r1, lr
+	uxtb	r0, r0
+	str	ip, [sp]
+	bl	flash_prog_page_en
+.L2948:
+	add	r8, r8, #1
+.L2951:
+	ldrb	r2, [sp, #25]	@ zero_extendqisi2
+	uxth	r3, r8
 	cmp	r2, r3
-	bcs	.L2783
-	ldr	r3, .L2880+4
-	ldrb	r1, [r4, #9]	@ zero_extendqisi2
-	ldrh	ip, [r4, #10]
-	ldrh	r3, [r3]
-	muls	r3, r1, r3
-	subs	r3, r3, #1
-	cmp	ip, r3
-	bge	.L2783
-	ldr	r3, .L2880+8
-	ldr	r1, [r0]
-	ldr	r3, [r3]
-	ldr	r2, [r3, #8]
-	cmp	r1, r2
-	it	hi
-	strhi	r1, [r3, #8]
-	ldrh	r3, [r4, #12]
-	ldr	r1, [r0, #8]
-	ldr	r0, [r0, #4]
-	add	r2, ip, r3
-	uxth	r2, r2
-	bl	lpa_hash_update_ppa
-	ldr	r3, [sp, #36]
-	str	r3, [sp, #32]
-	ldr	r3, [sp, #40]
-	str	r3, [sp, #36]
-	ldr	r3, [sp, #44]
-	str	r3, [sp, #40]
-	ldr	r3, [sp, #20]
-	str	r3, [sp, #44]
-	b	.L2783
-.L2881:
+	bhi	.L2949
+	adds	r6, r6, #1
+	b	.L2947
+.L2956:
+	uxth	r6, fp
+	add	r3, sp, #48
+	adds	r6, r6, #8
+	add	r6, r3, r6, lsl #1
+	ldrh	r1, [r6, #-32]
+	cmp	r1, r10
+	beq	.L2954
+	ldr	r3, .L2961+20
+	uxth	r0, r8
+	ldrh	r7, [r3]
+	mla	r7, r1, r7, r0
+	movs	r1, #1
+	mov	r0, r5
+	str	r7, [r5, #24]
+	bl	sblk_read_page
+	ldr	r1, [r5, #4]
+	ldr	r1, [r1]
+	cmp	r7, r1
+	beq	.L2954
+	mov	r0, r7
+	bl	ftl_mask_bad_block
+	strh	r10, [r6, #-32]	@ movhi
+.L2954:
+	add	fp, fp, #1
+.L2958:
+	ldrb	r0, [sp, #25]	@ zero_extendqisi2
+	uxth	r1, fp
+	cmp	r0, r1
+	bhi	.L2956
+	add	r8, r8, #1
+	b	.L2952
+.L2957:
+	mov	r0, r5
+	bl	zbuf_free
+	ldr	r3, [sp, #8]
+	mov	r1, r4
+	ldr	r0, .L2961+32
+	ldr	r2, [r3]
+	ldr	r3, [r2, r4, lsl #2]
+	ldrh	r2, [r2, r4, lsl #2]
+	ubfx	r3, r3, #11, #8
+	ubfx	r2, r2, #0, #11
+	bl	printf
+.L2943:
+	add	sp, sp, #48
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2962:
 	.align	2
-.L2880:
-	.word	.LANCHOR120
-	.word	.LANCHOR85
-	.word	.LANCHOR102
-	.size	ftl_open_sblk_recovery, .-ftl_open_sblk_recovery
-	.section	.text.pm_write_page,"ax",%progbits
+.L2961:
+	.word	.LANCHOR7
+	.word	.LC167
+	.word	.LANCHOR6
+	.word	.LANCHOR125
+	.word	.LANCHOR87
+	.word	.LANCHOR105
+	.word	.LANCHOR31
+	.word	1437269760
+	.word	.LC168
+	.size	ftl_ink_check_sblk, .-ftl_ink_check_sblk
+	.section	.text.ftl_open_sblk_init,"ax",%progbits
 	.align	1
-	.global	pm_write_page
+	.global	ftl_open_sblk_init
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	pm_write_page, %function
-pm_write_page:
+	.type	ftl_open_sblk_init, %function
+ftl_open_sblk_init:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
 	mov	r4, r0
-	ldr	r7, .L2895
-	mov	r8, r1
-	mov	r6, r7
-.L2883:
+	ldr	r7, .L2973
+	mov	r6, r1
+	ldr	r8, .L2973+20
+.L2964:
+.L2968:
+	mov	r0, r6
+	bl	ftl_alloc_sblk
 	ldr	r3, [r7]
-	ldr	r2, [r3, #48]
-	ldrh	r1, [r3, #696]
-	adds	r2, r2, #1
-	str	r2, [r3, #48]
-	ldr	r2, .L2895+4
+	mov	r5, r0
+	ldrh	r3, [r3, #150]
+	cbz	r3, .L2965
+	ldr	r3, [r8]
+	ldrh	r3, [r3, r0, lsl #2]
+	ubfx	r3, r3, #0, #11
+	cmp	r3, #2
+	bgt	.L2965
+	bl	ftl_ink_check_sblk
+.L2965:
+	movs	r1, #0
+	mov	r0, r5
+	bl	ftl_erase_sblk
+	add	r1, r4, #16
+	mov	r0, r5
+	bl	ftl_get_blk_list_in_sblk
+	ldr	r2, .L2973+4
+	uxtb	r3, r0
+	cmp	r6, #2
+	strh	r5, [r4]	@ movhi
+	strb	r3, [r4, #9]
+	mov	r0, #0
 	ldrh	r2, [r2]
-	cmp	r1, r2
-	bcs	.L2884
-	ldrh	r2, [r3, #692]
-	movw	r3, #65535
-	cmp	r2, r3
-	bne	.L2885
-.L2884:
-	bl	pm_alloc_new_blk
-	movs	r0, #0
-	bl	ftl_info_flush
-.L2885:
-	ldr	r3, [r6]
-	ldrh	r2, [r3, #692]
-	movw	r3, #65535
-	cmp	r2, r3
-	bne	.L2886
-	movs	r2, #230
-	ldr	r1, .L2895+8
-	ldr	r0, .L2895+12
+	mov	r1, #255
+	strh	r0, [r4, #2]	@ movhi
+	strb	r0, [r4, #5]
+	strh	r0, [r4, #10]	@ movhi
+	smulbb	r3, r3, r2
+	ldr	r10, .L2973+24
+	strb	r6, [r4, #4]
+	strh	r3, [r4, #6]	@ movhi
+	ldr	r3, .L2973+8
+	it	ne
+	ldrbne	r0, [r3]	@ zero_extendqisi2
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	it	ne
+	smulbbne	r0, r0, r2
+	mul	r2, r2, r3
+	ldr	r3, .L2973+12
+	it	ne
+	uxthne	r0, r0
+	ldr	r3, [r3]
+	strh	r0, [r4, #12]	@ movhi
+	lsls	r2, r2, #2
+	add	r0, r3, r0, lsl #2
+	bl	ftl_memset
+	ldr	r3, [r10]
+	ldrh	r2, [r4, #6]
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	cbnz	r3, .L2963
+	mov	r1, r5
+	ldr	r0, .L2973+16
 	bl	printf
-.L2886:
-	ldr	r3, [r6]
+	ldr	r3, [r10]
+	movw	r2, #65535
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	movs	r3, #7
+	strb	r3, [r4, #4]
+	b	.L2968
+.L2963:
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L2974:
+	.align	2
+.L2973:
+	.word	.LANCHOR104
+	.word	.LANCHOR87
+	.word	.LANCHOR80
+	.word	.LANCHOR111
+	.word	.LC77
+	.word	.LANCHOR7
+	.word	.LANCHOR9
+	.size	ftl_open_sblk_init, .-ftl_open_sblk_init
+	.section	.text.ftl_low_format_data_init,"ax",%progbits
+	.align	1
+	.global	ftl_low_format_data_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_low_format_data_init, %function
+ftl_low_format_data_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r2, #16384
 	movs	r1, #0
-	ldr	r2, .L2895+16
-	ldr	r10, .L2895+32
-	ldrh	r5, [r3, #692]
-	ldrh	r2, [r2]
-	ldrh	r3, [r3, #696]
-	ldr	r0, [r10]
-	mla	r5, r2, r5, r3
-	movs	r2, #64
+	ldr	r0, .L2977
+	bl	ftl_memset
+	ldr	r5, .L2977+4
+	bl	zftl_sblk_list_init
+	movs	r0, #1
+	bl	ftl_alloc_sblk
+	movs	r1, #0
+	mov	r6, r0
+	bl	ftl_erase_sblk
+	ldr	r1, [r5]
+	mov	r0, r6
+	add	r1, r1, #672
+	bl	ftl_get_blk_list_in_sblk
+	ldr	r3, [r5]
+	movs	r2, #0
+	ldrh	r7, [r3, #672]
+	strh	r2, [r3, #690]	@ movhi
+	movw	r2, #65533
+	subs	r3, r7, #1
+	uxth	r3, r3
+	cmp	r3, r2
+	bls	.L2976
+	movw	r2, #2146
+	ldr	r1, .L2977+8
+	ldr	r0, .L2977+12
+	bl	printf
+.L2976:
+	ldr	r0, [r5]
+	movs	r4, #0
+	mov	r2, #256
+	movs	r1, #255
+	strh	r4, [r0, #696]	@ movhi
+	add	r0, r0, #416
+	bl	ftl_memset
+	ldr	r0, [r5]
+	mov	r1, r4
+	mov	r2, #4096
+	add	r0, r0, #704
+	bl	ftl_memset
+	ldr	r3, .L2977+16
+	ldr	r1, .L2977+20
+	ldr	r2, [r5]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	ldrh	r1, [r1]
+	strh	r7, [r2, #692]	@ movhi
+	rsb	r3, r3, #24
+	strh	r6, [r2, #416]	@ movhi
+	subs	r3, r3, r1
+	asr	r3, r7, r3
+	ldr	r7, .L2977+24
+	strh	r3, [r2, #694]	@ movhi
+	movs	r3, #1
+	strh	r3, [r2, #688]	@ movhi
+	ldr	r3, .L2977+28
+	ldrh	r3, [r3]
+	strh	r3, [r2, #698]	@ movhi
+	ldr	r2, .L2977+32
+	ldr	r3, [r7]
+	str	r2, [r3]
+	bl	ftl_alloc_sys_blk
+	mov	r1, r4
+	mov	r6, r0
+	bl	ftl_erase_phy_blk
+	ldr	r3, [r5]
+	movs	r1, #2
+	ldr	r0, [r7]
+	strh	r6, [r3, #130]	@ movhi
+	movw	r6, #65535
+	strh	r4, [r3, #140]	@ movhi
+	adds	r0, r0, #16
+	strh	r6, [r0, #568]	@ movhi
+	strh	r6, [r0, #570]	@ movhi
+	strh	r6, [r0, #572]	@ movhi
+	strh	r6, [r0, #574]	@ movhi
+	bl	ftl_open_sblk_init
+	ldr	r0, [r7]
+	movs	r1, #3
+	adds	r0, r0, #48
+	bl	ftl_open_sblk_init
+	ldr	r3, [r5]
+	movs	r1, #255
+	ldr	r0, [r7]
+	ldrh	r2, [r3, #134]
+	adds	r0, r0, #136
+	strh	r4, [r0, #-12]	@ movhi
+	strh	r4, [r0, #-16]	@ movhi
+	strh	r2, [r0, #-10]	@ movhi
+	mov	r2, #-1
+	strh	r4, [r0, #-14]	@ movhi
+	strh	r6, [r0, #-56]	@ movhi
+	strh	r6, [r0, #-6]	@ movhi
+	str	r2, [r0, #408]
+	strh	r2, [r3, #126]	@ movhi
+	mov	r2, #256
+	str	r4, [r0, #384]
+	str	r4, [r0, #388]
+	str	r4, [r0, #392]
 	bl	ftl_memset
-	ldr	r2, [r6]
-	ldr	r3, [r10]
-	ldrb	r0, [r2, #694]	@ zero_extendqisi2
-	str	r4, [r3]
-	ldr	r1, [r2, #48]
-	ldr	r2, .L2895+20
-	str	r1, [r3, #4]
-	mov	r1, r5
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	str	r2, [sp]
-	mov	r2, r8
-	bl	ftl_prog_page
-	ldr	r2, [r6]
-	ldrh	r3, [r2, #696]
-	adds	r3, r3, #1
-	uxth	r3, r3
-	cmp	r3, #1
-	strh	r3, [r2, #696]	@ movhi
-	ldr	r3, .L2895+24
-	beq	.L2887
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	cbz	r1, .L2888
-.L2887:
-	movs	r2, #0
-	strb	r2, [r3]
-	b	.L2883
-.L2888:
-	adds	r0, r0, #1
-	bne	.L2890
-	mov	r1, r5
-	ldr	r0, .L2895+28
-	bl	printf
-	b	.L2883
-.L2890:
-	ldrh	r3, [r2, #698]
-	movs	r0, #0
-	cmp	r4, r3
-	itt	cc
-	addcc	r4, r4, #176
-	strcc	r5, [r2, r4, lsl #2]
-	add	sp, sp, #12
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L2896:
+	ldr	r0, [r7]
+	movs	r2, #128
+	movs	r1, #255
+	add	r0, r0, #392
+	bl	ftl_memset
+	bl	ftl_ext_info_flush
+	mov	r0, r4
+	bl	ftl_info_flush
+	bl	ftl_info_blk_init
+	mov	r0, r4
+	pop	{r3, r4, r5, r6, r7, pc}
+.L2978:
 	.align	2
-.L2895:
-	.word	.LANCHOR102
-	.word	.LANCHOR85
-	.word	.LANCHOR190
+.L2977:
+	.word	ftl_ext_info_data_buffer
+	.word	.LANCHOR104
+	.word	.LANCHOR193
 	.word	.LC0
-	.word	.LANCHOR103
-	.word	.LANCHOR123
-	.word	.LANCHOR192
-	.word	.LC160
-	.word	.LANCHOR191
-	.size	pm_write_page, .-pm_write_page
-	.section	.text.ftl_dump_write_open_sblk,"ax",%progbits
+	.word	.LANCHOR31
+	.word	.LANCHOR68
+	.word	.LANCHOR10
+	.word	.LANCHOR194
+	.word	1162432070
+	.size	ftl_low_format_data_init, .-ftl_low_format_data_init
+	.section	.text.ftl_low_format,"ax",%progbits
 	.align	1
-	.global	ftl_dump_write_open_sblk
+	.global	ftl_low_format
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_dump_write_open_sblk, %function
-ftl_dump_write_open_sblk:
-	@ args = 0, pretend = 0, frame = 64
+	.type	ftl_low_format, %function
+ftl_low_format:
+	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2926
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r5, r0
-	sub	sp, sp, #104
-	ldrh	r3, [r3]
-	cmp	r3, r0
-	bls	.L2897
-	ldr	r3, .L2926+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L2899
-	ldr	r3, .L2926+8
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #0
-	beq	.L2897
-.L2899:
-	ldr	r7, .L2926+12
-	lsls	r4, r5, #2
-	add	r1, sp, #88
-	strh	r5, [sp, #72]	@ movhi
-	mov	r0, r5
-	movs	r6, #0
-	ldr	r3, [r7]
+	movs	r4, #8
+	ldr	r6, .L3016
+	sub	sp, sp, #40
+	movs	r1, #0
+	ldr	r0, .L3016+4
+	bl	printf
+.L2982:
+	ldr	r3, [r6]
 	add	r3, r3, r4
-	ldrb	r3, [r3, #2]	@ zero_extendqisi2
-	and	r3, r3, #224
-	cmp	r3, #160
-	itet	eq
-	ldreq	r3, .L2926+16
-	movne	r8, #1
-	ldrbeq	r8, [r3]	@ zero_extendqisi2
-	bl	ftl_get_blk_list_in_sblk
-	ldr	r3, .L2926+20
-	uxtb	r0, r0
-	strb	r6, [sp, #77]
-	strb	r0, [sp, #81]
-	ldrh	r3, [r3]
-	strh	r6, [sp, #74]	@ movhi
-	strh	r6, [sp, #82]	@ movhi
-	smulbb	r0, r3, r0
-	ldr	r3, [r7]
-	mov	r7, r6
-	ldr	r1, [r3, r5, lsl #2]
-	add	r4, r4, r3
-	ldrb	r2, [r4, #2]	@ zero_extendqisi2
-	strh	r0, [sp, #78]	@ movhi
-	ubfx	r1, r1, #11, #8
-	ldr	r0, .L2926+24
-	str	r1, [sp, #4]
-	mov	r1, r5
-	ldrh	r3, [r3, r5, lsl #2]
-	ubfx	r3, r3, #0, #11
-	str	r3, [sp]
-	ubfx	r3, r2, #3, #2
-	lsrs	r2, r2, #5
+	ldrb	r5, [r3, #32]	@ zero_extendqisi2
+	cmp	r5, #128
+	ble	.L2980
+	cmp	r5, #255
+	beq	.L2981
+	movw	r2, #2200
+	ldr	r1, .L3016+8
+	ldr	r0, .L3016+12
 	bl	printf
+.L2980:
+	ldr	r3, .L3016+16
+	movs	r0, #0
+	ldrh	r1, [r3]
+	muls	r1, r5, r1
+	bl	flash_erase_block
+.L2981:
+	adds	r4, r4, #1
+	cmp	r4, #16
+	bne	.L2982
+	bl	sblk_init
+	bl	ftl_info_blk_init
+	mov	r2, #16384
+	movs	r1, #0
+	ldr	r0, .L3016+20
+	bl	ftl_memset
+	ldr	r2, .L3016+24
 	movs	r0, #1
-	bl	buf_alloc
-	mov	r4, r0
-	str	r6, [sp, #44]
-.L2901:
-	ldr	r3, .L2926+20
-	uxth	r10, r6
-	ldrh	r3, [r3]
-	cmp	r3, r10
-	bls	.L2907
-	mov	r3, r10
-	str	r10, [sp, #52]
-	lsls	r3, r3, #1
-	mov	fp, #0
-	subs	r3, r3, #1
-	str	r3, [sp, #60]
-	b	.L2911
-.L2909:
-	ldr	r3, [sp, #64]
-	add	r2, sp, #104
-	add	r3, r2, r3, lsl #1
-	ldrh	r3, [r3, #-32]
-	str	r3, [sp, #48]
-	movw	r3, #65535
-	ldr	r2, [sp, #48]
-	cmp	r2, r3
-	bne	.L2902
-.L2908:
-	adds	r7, r7, #1
-	uxth	r7, r7
-.L2903:
-	cmp	r8, r7
-	bcs	.L2909
-	add	fp, fp, #1
-.L2911:
-	uxth	r3, fp
-	str	r3, [sp, #44]
-	ldr	r2, [sp, #44]
-	ldrb	r3, [sp, #81]	@ zero_extendqisi2
-	cmp	r3, r2
-	bls	.L2910
-	mov	r3, r2
-	movs	r7, #1
-	adds	r3, r3, #8
-	str	r3, [sp, #64]
-	b	.L2903
-.L2902:
-	ldr	r3, .L2926+28
-	cmp	r8, #3
-	ldr	r2, [sp, #48]
+	ldr	r1, .L3016+28
+	ldr	r3, [r2]
+	ldrh	r1, [r1]
+	str	r2, [sp, #24]
+	add	r1, r3, r1, lsl #2
+.L2983:
+	cmp	r3, r1
+	bne	.L2984
+	ldr	r7, .L3016+32
+	movs	r4, #0
+	ldr	r2, .L3016+36
+	ldr	r3, [r7]
+	str	r2, [r3]
+	strh	r4, [r3, #148]	@ movhi
+.L2985:
+	ldr	r3, .L3016+28
+	uxth	r0, r4
 	ldrh	r3, [r3]
-	mul	r3, r2, r3
-	bne	.L2904
-	uxtah	r3, r3, r6
-	orr	r3, r3, r7, lsl #24
-.L2905:
-	str	r3, [r4, #24]
-	movs	r1, #1
-	mov	r0, r4
-	str	r3, [sp, #68]
-	bl	sblk_read_page
-	ldr	r1, [r4, #12]
-	ldr	r2, [r4, #4]
-	ldr	r3, [r4, #36]
-	ldr	r0, [r1, #12]
-	str	r3, [sp, #56]
-	str	r0, [sp, #32]
-	ldr	r0, [r1, #8]
-	str	r0, [sp, #28]
-	ldr	r0, [r1, #4]
-	str	r0, [sp, #24]
-	ldr	r1, [r1]
-	ldr	r0, .L2926+32
-	str	r1, [sp, #20]
-	ldr	r1, [r2, #12]
-	str	r1, [sp, #16]
-	ldr	r1, [r2, #8]
-	str	r1, [sp, #12]
-	ldr	r1, [r2, #4]
-	str	r1, [sp, #8]
-	ldr	r2, [r2]
-	ldr	r1, [sp, #48]
-	str	r3, [sp]
-	str	r2, [sp, #4]
-	ldr	r3, [sp, #68]
-	ldr	r2, [sp, #52]
-	bl	printf
-	ldr	r3, [sp, #56]
-	cmp	r3, #512
-	bne	.L2908
-.L2907:
-	uxth	r2, r6
-	ldr	r6, .L2926+36
-	ldr	r3, [sp, #44]
+	cmp	r3, r0
+	bhi	.L2993
+	ldr	r3, .L3016+40
+	mov	fp, #15
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	ldr	r3, .L3016
+	mov	r1, r5
+	ldr	r3, [r3]
+	ldrb	r0, [r3, #47]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	ldr	r3, .L3016+24
+	uxtb	r0, r0
+	cmp	r5, #1
+	uxth	lr, r5
+	add	r4, r0, #1
+	ldr	r10, [r3]
+	it	eq
+	moveq	r8, #1
+	ldr	r3, .L3016+32
+	it	ne
+	movne	r8, #3
+	movs	r2, #0
+	ldr	r6, [r3]
+	ldrh	r3, [r6, #148]
+.L2996:
+	add	r1, r10, r2, lsl #2
+	cmp	r5, #4
+	add	r2, r2, #1
+	ldrb	ip, [r1, #2]	@ zero_extendqisi2
+	ite	ne
+	strbne	r8, [r1, #3]
+	strbeq	fp, [r1, #3]
+	orr	ip, ip, #224
+	strb	ip, [r1, #2]
+	uxth	r1, r2
+	cmp	r4, r1
+	bhi	.L2996
+	smulbb	r0, r0, lr
+	add	r3, r3, lr
 	mov	r1, r5
-	str	r7, [sp]
-	ldr	r0, .L2926+40
+	uxtah	r0, r0, r3
+	strh	r0, [r6, #148]	@ movhi
+	movs	r0, #16
+	bl	__aeabi_idiv
+	ldr	r3, .L3016+44
+	add	r0, r0, r4
+	uxth	r0, r0
+	ldr	r3, [r3]
+	strh	r0, [r6, #134]	@ movhi
+	lsls	r3, r3, #19
+	bpl	.L2997
+	str	r0, [sp]
+	mov	r3, r4
+	movs	r2, #128
+	movw	r1, #2247
+	ldr	r0, .L3016+48
 	bl	printf
-	ldrb	r2, [r6]	@ zero_extendqisi2
-	movs	r1, #0
-	ldr	r0, [r4, #4]
-	ldr	fp, .L2926+4
-	lsls	r2, r2, #9
-	bl	ftl_memset
-	ldrb	r2, [r6]	@ zero_extendqisi2
-	movs	r1, #0
-	ldr	r0, [r4, #12]
-	lsls	r2, r2, #1
+.L2997:
+	ldr	r0, [r7]
+	movs	r2, #128
+	movs	r1, #255
+	movs	r5, #0
+	adds	r0, r0, #160
 	bl	ftl_memset
-.L2912:
-	ldr	r3, .L2926+20
+	ldr	r3, [sp, #24]
+	ldr	r0, .L3016+52
+	ldr	r1, [r7]
+	ldr	r3, [r3]
+	ldrh	r0, [r0]
+	ldrh	fp, [r1, #134]
+	str	r3, [sp, #24]
+	ldr	r3, .L3016+56
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r3, [sp, #28]
+	ldr	r3, .L3016+40
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r3, [sp, #12]
+	ldr	r3, .L3016+60
+	ldrh	r7, [sp, #12]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	smulbb	r2, r4, r7
+	rsb	r3, r3, #24
+	subs	r3, r3, r0
+	movs	r0, #1
+	lsl	r3, r0, r3
+	uxth	r2, r2
+	uxth	r3, r3
+	str	r3, [sp, #20]
+.L2998:
+	cmp	r4, fp
+	bcc	.L3004
+	ldr	r3, .L3016+28
+	movs	r4, #0
+	strh	r5, [r1, #112]	@ movhi
+	strh	r4, [r1, #114]	@ movhi
 	ldrh	r3, [r3]
-	cmp	r3, r10
-	bls	.L2917
-	lsl	r3, r10, #1
-	movs	r7, #0
-	str	r3, [sp, #44]
-	b	.L2918
-.L2904:
-	cmp	r8, #2
-	itett	eq
-	ldreq	r2, [sp, #60]
-	uxtahne	r3, r3, r6
-	addeq	r3, r3, r2
-	ldreq	r2, .L2926+16
-	ittt	eq
-	addeq	r3, r3, r7
-	ldrbeq	r2, [r2]	@ zero_extendqisi2
-	orreq	r3, r3, r2, lsl #24
-	b	.L2905
-.L2910:
-	adds	r6, r6, #1
-	b	.L2901
-.L2916:
-	uxth	r8, r7
-	mov	r1, r10
-	ldr	r0, .L2926+44
-	mov	r2, r8
-	bl	printf
-	ldrb	ip, [fp]	@ zero_extendqisi2
-	add	r2, r8, #8
-	ldr	r1, .L2926+28
-	cmp	ip, #0
-	beq	.L2913
-	add	r3, sp, #104
+	strh	r4, [r1, #118]	@ movhi
+	strh	fp, [r1, #132]	@ movhi
+	sub	r3, r3, fp
+	strh	r3, [r1, #116]	@ movhi
+	bl	ftl_low_format_data_init
 	mov	r0, r4
-	add	r2, r3, r2, lsl #1
-	ldrh	r3, [r1]
-	ldrh	r2, [r2, #-32]
-	muls	r3, r2, r3
-	orr	r3, r3, r10
-	str	r3, [r4, #24]
-	bl	sblk_3d_tlc_dump_prog
-.L2914:
-	adds	r7, r7, #1
-.L2918:
-	ldrb	r2, [sp, #81]	@ zero_extendqisi2
-	uxth	r3, r7
-	cmp	r2, r3
-	bhi	.L2916
-	add	r3, r10, #1
-	uxth	r10, r3
-	b	.L2912
-.L2913:
-	ldr	r3, .L2926+16
+	add	sp, sp, #40
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2984:
+	ldrb	r2, [r3, #2]	@ zero_extendqisi2
+	adds	r3, r3, #4
+	and	r2, r2, #31
+	bfi	r2, r0, #3, #2
+	strb	r2, [r3, #-2]
+	b	.L2983
+.L2993:
+	ldr	r3, .L3016+64
+	strh	r0, [r3]	@ movhi
+	ldr	r3, .L3016+68
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #2
-	add	r3, sp, #104
-	add	r2, r3, r2, lsl #1
-	bne	.L2915
-	ldrh	r2, [r2, #-32]
-	mov	r0, r4
-	ldrh	r3, [r1]
-	muls	r3, r2, r3
-	ldr	r2, [sp, #44]
-	orrs	r3, r3, r2
-	orr	r3, r3, #33554432
-	str	r3, [r4, #24]
-	bl	sblk_mlc_dump_prog
-	b	.L2914
-.L2915:
-	ldrh	r3, [r2, #-32]
-	ldrh	r0, [r1]
-	muls	r0, r3, r0
-	orr	r0, r0, r10
-	str	r0, [r4, #24]
-	bic	r1, r0, #14680064
-	str	ip, [sp, #4]
-	ubfx	r0, r0, #21, #3
-	ldrb	r3, [r6]	@ zero_extendqisi2
-	str	r3, [sp]
-	ldr	r3, [r4, #12]
-	ldr	r2, [r4, #4]
-	bl	flash_prog_page_en
-	b	.L2914
-.L2917:
-	mov	r0, r4
-	bl	buf_free
-	mov	r1, r5
-	ldr	r0, .L2926+48
+	cbnz	r3, .L2986
+	bl	ftl_test_block
+.L2986:
+	ldr	r3, .L3016+56
+	uxth	r1, r4
+	ldr	r0, .L3016+24
+	movs	r6, #0
+	mov	fp, r6
+	mov	r8, r6
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	ldr	r5, [r0]
+	str	r3, [sp, #16]
+	ldr	r3, .L3016+40
+	add	r5, r5, r1, lsl #2
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	uxth	r2, r3
+	str	r2, [sp, #20]
+	mul	r2, r3, r1
+	ldr	r1, .L3016+32
+	ldr	r1, [r1]
+	str	r1, [sp, #12]
+.L2987:
+	ldr	r0, [sp, #16]
+	uxth	r1, fp
+	cmp	r0, r1
+	bhi	.L3005
+	cmp	r8, #0
+	bne	.L2992
+	ldrb	r3, [r5, #2]	@ zero_extendqisi2
+	orr	r3, r3, #224
+	strb	r3, [r5, #2]
+.L2992:
+	adds	r4, r4, #1
+	b	.L2985
+.L2990:
+	add	r1, r10, r2
+	ldr	r0, [sp, #28]
+	str	r3, [sp, #36]
+	str	r2, [sp, #32]
+	bl	flash_check_bad_block
+	ldr	r2, [sp, #32]
+	ldr	r3, [sp, #36]
+	cbz	r0, .L2988
+	ldrb	r0, [r5, #3]	@ zero_extendqisi2
+	movs	r1, #1
+	lsl	r1, r1, r10
+	orrs	r1, r1, r0
+	ldr	r0, [sp, #12]
+	strb	r1, [r5, #3]
+	ldr	r1, [sp, #12]
+	ldrh	r1, [r1, #148]
+	adds	r1, r1, #1
+	strh	r1, [r0, #148]	@ movhi
+.L2989:
+	add	r10, r10, #1
+.L2991:
+	sub	r1, r10, r6
+	ldr	r0, [sp, #20]
+	uxth	r1, r1
+	cmp	r0, r1
+	bhi	.L2990
+	add	fp, fp, #1
+	add	r6, r6, r3
+	subs	r2, r2, r3
+	b	.L2987
+.L2988:
+	add	r8, r8, #1
+	uxth	r8, r8
+	b	.L2989
+.L3005:
+	uxtb	r1, fp
+	mov	r10, r6
+	str	r1, [sp, #28]
+	b	.L2991
+.L3004:
+	ldr	r3, [sp, #24]
+	movs	r0, #0
+	mov	lr, r0
+	mov	ip, r0
+	add	r8, r3, r4, lsl #2
+	ldrb	r3, [r8, #2]	@ zero_extendqisi2
+	orr	r3, r3, #224
+	strb	r3, [r8, #2]
+.L2999:
+	ldr	r6, [sp, #28]
+	uxth	r3, ip
+	cmp	r3, r6
+	bcc	.L3007
+	adds	r4, r4, #1
+	add	r2, r2, r7
+	uxth	r4, r4
+	uxth	r2, r2
+	b	.L2998
+.L3002:
+	ldrb	r10, [r8, #3]	@ zero_extendqisi2
+	add	r3, lr, r6
+	asr	r10, r10, r3
+	tst	r10, #1
+	bne	.L3000
+	ldr	r3, [sp, #12]
+	add	r10, r5, #80
+	adds	r5, r5, #1
+	uxth	r5, r5
+	cmp	r3, #1
+	itett	hi
+	ldrhi	r3, [sp, #16]
+	movls	r3, r2
+	andhi	r3, r3, #1
+	addhi	r3, r3, r2
+	it	hi
+	uxthhi	r3, r3
+	add	r3, r3, r0
+	strh	r3, [r1, r10, lsl #1]	@ movhi
+.L3000:
+	adds	r6, r6, #1
+.L3003:
+	uxth	r3, r6
+	cmp	r3, r7
+	str	r3, [sp, #16]
+	bcc	.L3002
+	ldr	r3, [sp, #12]
+	add	ip, ip, #1
+	add	lr, lr, r3
+	ldr	r3, [sp, #20]
+	add	r0, r0, r3
+	uxth	r0, r0
+	b	.L2999
+.L3007:
+	movs	r6, #0
+	b	.L3003
+.L3017:
+	.align	2
+.L3016:
+	.word	.LANCHOR27
+	.word	.LC169
+	.word	.LANCHOR195
+	.word	.LC0
+	.word	.LANCHOR105
+	.word	ftl_info_data_buffer
+	.word	.LANCHOR7
+	.word	.LANCHOR6
+	.word	.LANCHOR104
+	.word	1229739078
+	.word	.LANCHOR69
+	.word	.LANCHOR14
+	.word	.LC170
+	.word	.LANCHOR68
+	.word	.LANCHOR106
+	.word	.LANCHOR31
+	.word	.LANCHOR62
+	.word	.LANCHOR75
+	.size	ftl_low_format, .-ftl_low_format
+	.section	.text.ftl_re_low_format,"ax",%progbits
+	.align	1
+	.global	ftl_re_low_format
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_re_low_format, %function
+ftl_re_low_format:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	movs	r1, #1
+	ldr	r0, .L3024
 	bl	printf
-.L2897:
-	add	sp, sp, #104
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2927:
+	bl	sblk_init
+	bl	ftl_info_blk_init
+	bl	ftl_ext_info_init
+	ldr	r2, .L3024+4
+	ldr	r3, .L3024+8
+	ldrh	r7, [r2]
+	ldr	r3, [r3]
+	ldr	r2, .L3024+12
+	ldrh	r1, [r3, #134]
+	ldr	r0, [r2]
+	movs	r2, #0
+	mov	r5, r2
+	mov	r6, r2
+	add	r0, r0, r1, lsl #2
+.L3019:
+	cmp	r1, r7
+	bcc	.L3023
+	movs	r4, #0
+	strh	r6, [r3, #114]	@ movhi
+	strh	r5, [r3, #118]	@ movhi
+	strh	r2, [r3, #116]	@ movhi
+	strh	r4, [r3, #122]	@ movhi
+	strh	r4, [r3, #120]	@ movhi
+	strh	r4, [r3, #124]	@ movhi
+	bl	ftl_low_format_data_init
+	mov	r0, r4
+	pop	{r3, r4, r5, r6, r7, pc}
+.L3023:
+	ldrb	r4, [r0, #2]	@ zero_extendqisi2
+	bfc	r4, #5, #3
+	strb	r4, [r0, #2]
+	ands	r4, r4, #24
+	bne	.L3020
+	adds	r6, r6, #1
+	uxth	r6, r6
+.L3021:
+	adds	r1, r1, #1
+	uxth	r1, r1
+	adds	r0, r0, #4
+	b	.L3019
+.L3020:
+	cmp	r4, #16
+	itete	eq
+	addeq	r5, r5, #1
+	addne	r2, r2, #1
+	uxtheq	r5, r5
+	uxthne	r2, r2
+	b	.L3021
+.L3025:
 	.align	2
-.L2926:
+.L3024:
+	.word	.LC171
 	.word	.LANCHOR6
-	.word	.LANCHOR75
-	.word	.LANCHOR72
+	.word	.LANCHOR104
 	.word	.LANCHOR7
-	.word	.LANCHOR71
-	.word	.LANCHOR85
-	.word	.LC161
-	.word	.LANCHOR103
-	.word	.LC162
-	.word	.LANCHOR123
-	.word	.LC163
-	.word	.LC164
-	.word	.LC165
-	.size	ftl_dump_write_open_sblk, .-ftl_dump_write_open_sblk
+	.size	ftl_re_low_format, .-ftl_re_low_format
 	.section	.text.flash_info_flush,"ax",%progbits
 	.align	1
 	.global	flash_info_flush
@@ -18520,18 +19499,18 @@ flash_info_flush:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L2940
+	ldr	r3, .L3038
 	ldr	r3, [r3]
 	lsls	r3, r3, #19
-	bpl	.L2929
-	ldr	r2, .L2940+4
+	bpl	.L3027
+	ldr	r2, .L3038+4
 	mov	r1, #324
-	ldr	r0, .L2940+8
+	ldr	r0, .L3038+8
 	bl	printf
-.L2929:
-	ldr	r5, .L2940+12
+.L3027:
+	ldr	r5, .L3038+12
 	movs	r2, #64
-	ldr	r6, .L2940+16
+	ldr	r6, .L3038+16
 	movs	r1, #0
 	movs	r7, #0
 	ldr	r0, [r5]
@@ -18539,33 +19518,33 @@ flash_info_flush:
 	movs	r3, #16
 	movs	r2, #4
 	ldr	r1, [r6]
-	ldr	r0, .L2940+20
+	ldr	r0, .L3038+20
 	bl	rknand_print_hex
 	ldr	r4, [r6]
 	ldr	r1, [r4, #8]
 	add	r0, r4, #16
 	bl	js_hash
 	str	r5, [sp, #8]
-	ldr	r5, .L2940+24
+	ldr	r5, .L3038+24
 	str	r0, [r4, #12]
 	mov	r8, r5
-.L2930:
-	ldr	fp, .L2940+44
+.L3028:
+	ldr	fp, .L3038+44
 	ldrb	r10, [r5]	@ zero_extendqisi2
 	ldrh	r4, [r5, #2]
 	ldrh	r3, [fp]
 	mov	r1, r10
-	ldr	r0, .L2940+28
+	ldr	r0, .L3038+28
 	mov	r2, r4
 	str	r3, [sp, #12]
 	bl	printf
-	ldr	r2, .L2940+32
+	ldr	r2, .L3038+32
 	ldrh	r0, [r5, #2]
 	ldr	r3, [sp, #12]
 	ldrh	r2, [r2]
 	subs	r2, r2, #1
 	cmp	r0, r2
-	blt	.L2931
+	blt	.L3029
 	ldr	r4, [r6]
 	mov	r10, #0
 	ldrb	r2, [r5]	@ zero_extendqisi2
@@ -18589,9 +19568,9 @@ flash_info_flush:
 	ldrh	r4, [fp]
 	muls	r4, r3, r4
 	mov	r1, r4
-.L2939:
+.L3037:
 	bl	flash_erase_block
-.L2932:
+.L3030:
 	ldr	r2, [r6]
 	mov	r10, #1
 	ldr	r3, [sp, #8]
@@ -18599,7 +19578,7 @@ flash_info_flush:
 	ldr	r1, [r2, #4]
 	ldr	r3, [r3]
 	str	r1, [r3]
-	ldr	r1, .L2940+36
+	ldr	r1, .L3038+36
 	str	r1, [r3, #4]
 	movs	r1, #4
 	stm	sp, {r1, r10}
@@ -18609,41 +19588,41 @@ flash_info_flush:
 	adds	r0, r0, #1
 	add	r3, r3, r10
 	strh	r3, [r8, #2]	@ movhi
-	bne	.L2933
+	bne	.L3031
 	mov	r1, r4
-	ldr	r0, .L2940+40
+	ldr	r0, .L3038+40
 	bl	printf
-	b	.L2930
-.L2935:
+	b	.L3028
+.L3033:
 	mov	r7, r10
-	b	.L2930
-.L2931:
+	b	.L3028
+.L3029:
 	mla	r4, r10, r3, r4
 	cmp	r0, #0
-	bne	.L2932
+	bne	.L3030
 	mov	r1, r4
-	b	.L2939
-.L2933:
+	b	.L3037
+.L3031:
 	cmp	r7, #0
-	beq	.L2935
+	beq	.L3033
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2941:
+.L3039:
 	.align	2
-.L2940:
+.L3038:
 	.word	.LANCHOR14
-	.word	.LANCHOR193
-	.word	.LC90
-	.word	.LANCHOR194
+	.word	.LANCHOR196
+	.word	.LC92
+	.word	.LANCHOR197
 	.word	.LANCHOR27
-	.word	.LC166
-	.word	.LANCHOR195
-	.word	.LC167
-	.word	.LANCHOR140
+	.word	.LC172
+	.word	.LANCHOR198
+	.word	.LC173
+	.word	.LANCHOR142
 	.word	1398362953
-	.word	.LC168
+	.word	.LC174
 	.word	.LANCHOR2
 	.size	flash_info_flush, .-flash_info_flush
 	.section	.text.flash_info_blk_init,"ax",%progbits
@@ -18658,25 +19637,25 @@ flash_info_blk_init:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L2971
-	ldr	r4, .L2971+4
+	ldr	r3, .L3069
+	ldr	r4, .L3069+4
 	ldr	r3, [r3]
 	tst	r3, #4096
-	beq	.L2943
+	beq	.L3041
 	ldr	r3, [r4]
 	movs	r1, #50
-	ldr	r2, .L2971+8
-	ldr	r0, .L2971+12
+	ldr	r2, .L3069+8
+	ldr	r0, .L3069+12
 	str	r3, [sp]
 	mov	r3, #2048
 	bl	printf
-.L2943:
-	ldr	r7, .L2971+16
+.L3041:
+	ldr	r7, .L3069+16
 	movs	r6, #4
-.L2946:
-	ldr	r10, .L2971+32
+.L3044:
+	ldr	r10, .L3069+32
 	mov	r8, #4
-	ldr	r5, .L2971+20
+	ldr	r5, .L3069+20
 	movs	r0, #0
 	ldr	r2, [r4]
 	ldrh	r1, [r10]
@@ -18685,28 +19664,28 @@ flash_info_blk_init:
 	muls	r1, r6, r1
 	bl	flash_read_page_en
 	adds	r0, r0, #1
-	beq	.L2944
+	beq	.L3042
 	ldr	r2, [r4]
 	ldr	r3, [r2]
 	cmp	r3, r7
-	beq	.L2945
-.L2944:
+	beq	.L3043
+.L3042:
 	adds	r6, r6, #1
 	cmp	r6, #16
-	bne	.L2946
-.L2970:
+	bne	.L3044
+.L3068:
 	mov	r0, #-1
-.L2942:
+.L3040:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2954:
+.L3052:
 	ldr	r3, [r4]
 	ldr	r2, [r3]
 	cmp	r2, r7
-	bne	.L2955
+	bne	.L3053
 	ldr	r8, [r3, #4]
-.L2948:
+.L3046:
 	ldrh	r0, [r10]
 	movs	r3, #4
 	ldrb	r1, [r6, #1]	@ zero_extendqisi2
@@ -18717,11 +19696,11 @@ flash_info_blk_init:
 	movs	r0, #0
 	bl	flash_read_page_en
 	adds	r0, r0, #1
-	beq	.L2949
+	beq	.L3047
 	ldr	r3, [r4]
 	ldr	r2, [r3]
 	cmp	r2, r7
-	bne	.L2949
+	bne	.L3047
 	ldr	r2, [r3, #4]
 	cmp	r8, r2
 	itttt	cc
@@ -18729,7 +19708,7 @@ flash_info_blk_init:
 	ldrbcc	r3, [r3, #36]	@ zero_extendqisi2
 	strbcc	r2, [r6]
 	strbcc	r3, [r6, #1]
-.L2949:
+.L3047:
 	mov	r8, #4
 	ldrb	r1, [r6]	@ zero_extendqisi2
 	ldr	r3, [r5]
@@ -18744,20 +19723,20 @@ flash_info_blk_init:
 	ldrb	r3, [r6]	@ zero_extendqisi2
 	movs	r6, #0
 	mla	r10, r10, r3, r0
-.L2950:
+.L3048:
 	sub	r0, fp, r6
 	sxth	r3, r0
 	cmp	r3, #0
-	bge	.L2953
+	bge	.L3051
 	adds	r2, r3, #1
-	bne	.L2952
+	bne	.L3050
 	ldr	r2, [r4]
-	ldr	r0, .L2971+24
+	ldr	r0, .L3069+24
 	str	r3, [sp, #12]
 	ldr	r1, [r2]
 	bl	printf
-	b	.L2970
-.L2953:
+	b	.L3068
+.L3051:
 	str	r8, [sp]
 	sub	r1, r10, r6
 	ldr	r3, [r5]
@@ -18765,26 +19744,26 @@ flash_info_blk_init:
 	ldr	r2, [r4]
 	bl	flash_read_page_en
 	adds	r0, r0, #1
-	beq	.L2951
+	beq	.L3049
 	ldr	r3, [r4]
 	ldr	r3, [r3]
 	cmp	r3, r7
-	beq	.L2952
-.L2951:
+	beq	.L3050
+.L3049:
 	adds	r6, r6, #1
-	b	.L2950
-.L2952:
+	b	.L3048
+.L3050:
 	cmp	r6, #1
-	bls	.L2956
+	bls	.L3054
 	bl	flash_info_flush
-.L2956:
+.L3054:
 	movs	r0, #0
-	b	.L2942
-.L2945:
+	b	.L3040
+.L3043:
 	ldrb	r1, [r2, #36]	@ zero_extendqisi2
 	ldrh	r0, [r10]
 	ldrb	r3, [r2, #37]	@ zero_extendqisi2
-	ldr	r6, .L2971+28
+	ldr	r6, .L3069+28
 	strb	r1, [r6]
 	muls	r1, r0, r1
 	strb	r3, [r6, #1]
@@ -18793,21 +19772,21 @@ flash_info_blk_init:
 	ldr	r3, [r5]
 	bl	flash_read_page_en
 	adds	r0, r0, #1
-	bne	.L2954
-.L2955:
+	bne	.L3052
+.L3053:
 	mov	r8, #0
-	b	.L2948
-.L2972:
+	b	.L3046
+.L3070:
 	.align	2
-.L2971:
+.L3069:
 	.word	.LANCHOR14
 	.word	.LANCHOR27
-	.word	.LANCHOR196
-	.word	.LC169
+	.word	.LANCHOR199
+	.word	.LC175
 	.word	1398362953
-	.word	.LANCHOR194
-	.word	.LC170
-	.word	.LANCHOR195
+	.word	.LANCHOR197
+	.word	.LC176
+	.word	.LANCHOR198
 	.word	.LANCHOR2
 	.size	flash_info_blk_init, .-flash_info_blk_init
 	.section	.text.nand_flash_init,"ax",%progbits
@@ -18823,422 +19802,457 @@ nand_flash_init:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-	ldr	r6, .L3055
-	ldr	r3, [r6]
-	lsls	r7, r3, #19
-	bpl	.L2974
-	ldr	r2, .L3055+4
-	movw	r1, #2491
-	ldr	r0, .L3055+8
+	ldr	r5, .L3155
+	ldr	r3, [r5]
+	lsls	r0, r3, #19
+	bpl	.L3072
+	ldr	r2, .L3155+4
+	movw	r1, #2578
+	ldr	r0, .L3155+8
 	bl	printf
-.L2974:
-	ldr	r3, .L3055+12
+.L3072:
+	ldr	r3, .L3155+12
+	movs	r7, #0
 	mov	r0, r4
-	ldr	r7, .L3055+16
-	movs	r5, #0
-	ldr	r4, .L3055+20
-	str	r5, [r3]
-	mov	r8, r7
+	ldr	r8, .L3155+168
+	ldr	r6, .L3155+16
+	str	r7, [r3]
 	bl	nandc_init
-	ldr	r3, .L3055+24
+	ldr	r3, .L3155+20
 	movs	r2, #1
-	str	r4, [r7]
-	mov	r1, r5
-	ldr	r7, .L3055+28
+	ldr	r4, .L3155+24
+	mov	r1, r7
+	ldr	r0, .L3155+28
 	strb	r2, [r3]
+	movs	r3, #3
 	movs	r2, #8
-	ldr	r0, .L3055+32
-	mov	r10, r7
+	strb	r3, [r8]
+	str	r4, [r6]
 	bl	ftl_memset
 	movs	r2, #32
-	mov	r1, r5
-	ldr	r0, .L3055+36
+	mov	r1, r7
+	ldr	r0, .L3155+32
 	bl	ftl_memset
-.L2980:
-	lsl	fp, r5, #3
-	uxtb	r0, r5
-	add	r1, r7, fp
+	str	r8, [sp]
+	ldr	r8, .L3155+36
+	mov	r10, r8
+.L3078:
+	lsl	fp, r7, #3
+	uxtb	r0, r7
+	add	r1, r8, fp
 	bl	flash_read_id
-	cbnz	r5, .L2975
-	ldrb	r3, [r7]	@ zero_extendqisi2
+	cbnz	r7, .L3073
+	ldrb	r3, [r8]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, #253
-	bls	.L2976
-.L2978:
-	mvn	r10, #1
-.L2973:
-	mov	r0, r10
+	bls	.L3074
+.L3076:
+	mvn	fp, #1
+.L3071:
+	mov	r0, fp
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2976:
-	ldrb	r3, [r7, #1]	@ zero_extendqisi2
+.L3074:
+	ldrb	r3, [r8, #1]	@ zero_extendqisi2
 	cmp	r3, #255
-	beq	.L2978
-.L2975:
+	beq	.L3076
+.L3073:
 	ldrb	r3, [r10, fp]	@ zero_extendqisi2
-	adds	r5, r5, #1
+	adds	r7, r7, #1
 	cmp	r3, #181
 	itt	eq
 	moveq	r3, #44
 	strbeq	r3, [r10, fp]
-	cmp	r5, #4
-	bne	.L2980
-	ldr	r7, .L3055+40
-	movs	r5, #0
-	ldr	r3, .L3055+28
-.L2983:
+	cmp	r7, #4
+	bne	.L3078
+	ldr	r8, .L3155+172
+	movs	r7, #0
+	ldr	r3, .L3155+36
+.L3081:
 	mov	r1, r3
-	ldrb	r2, [r7, #-1]	@ zero_extendqisi2
-	mov	r0, r7
+	ldrb	r2, [r8, #-1]	@ zero_extendqisi2
+	mov	r0, r8
 	str	r3, [sp, #4]
-	lsl	fp, r5, #5
+	lsl	fp, r7, #5
 	bl	flash_mem_cmp8
 	ldr	r3, [sp, #4]
 	cmp	r0, #0
-	bne	.L2981
-	ldr	r5, .L3055+44
-	ldr	r3, .L3055+48
-	add	r5, r5, fp
-	ldrb	r2, [r5, #22]	@ zero_extendqisi2
+	bne	.L3079
+	ldr	r7, .L3155+40
+	ldr	r3, .L3155+44
+	add	r7, r7, fp
+	ldrb	r2, [r7, #22]	@ zero_extendqisi2
 	mov	r1, r3
-.L2982:
-	lsls	r7, r0, #5
-	ldrb	r7, [r7, r3]	@ zero_extendqisi2
-	cmp	r7, r2
-	beq	.L2984
+.L3080:
+	lsl	ip, r0, #5
+	ldrb	ip, [ip, r3]	@ zero_extendqisi2
+	cmp	ip, r2
+	beq	.L3082
 	adds	r0, r0, #1
 	cmp	r0, #4
-	bne	.L2982
-.L2984:
+	bne	.L3080
+.L3082:
 	add	r1, r1, r0, lsl #5
 	movs	r2, #32
-	ldr	r0, .L3055+52
+	ldr	r0, .L3155+48
 	bl	ftl_memcpy
 	movs	r2, #32
-	mov	r1, r5
-	ldr	r0, .L3055+20
+	mov	r1, r7
+	ldr	r0, .L3155+24
 	bl	ftl_memcpy
-	ldr	r2, .L3055+56
-	ldrb	r3, [r2]	@ zero_extendqisi2
-	mov	fp, r2
-	cmp	r3, #8
-	bhi	.L2985
-	ldrb	r2, [r4, #20]	@ zero_extendqisi2
-	cmp	r2, #60
-	bls	.L2986
-	movs	r2, #60
-	strb	r2, [r4, #20]
-.L2986:
-	cmp	r3, #8
-	bne	.L2985
-	ldrb	r3, [r10]	@ zero_extendqisi2
-	cmp	r3, #44
-	beq	.L2987
-	cmp	r3, #137
-	bne	.L2985
-.L2987:
-	ldrb	r3, [r4, #28]	@ zero_extendqisi2
-	cmp	r3, #3
-	itt	eq
-	moveq	r3, #0
-	strbeq	r3, [r4, #28]
-.L2985:
-	ldr	r3, [r6]
-	lsls	r5, r3, #19
-	bpl	.L2988
-	ldr	r2, .L3055+4
-	movw	r1, #2516
-	ldr	r0, .L3055+8
+	ldr	r3, .L3155+52
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	mov	fp, r3
+	cmp	r2, #8
+	bhi	.L3083
+	ldrb	r3, [r4, #20]	@ zero_extendqisi2
+	cmp	r3, #60
+	bls	.L3083
+	movs	r3, #60
+	strb	r3, [r4, #20]
+.L3083:
+	ldr	r3, [r5]
+	lsls	r3, r3, #19
+	bpl	.L3114
+	ldr	r2, .L3155+4
+	movw	r1, #2600
+	ldr	r0, .L3155+8
 	bl	printf
-.L2988:
+.L3114:
+	ldr	r3, [r6]
 	mov	r0, #16384
-	ldr	r7, .L3055+60
+	ldr	r7, .L3155+56
+	mov	r8, #0
+	ldrh	r3, [r3, #10]
+	cmp	r3, #2304
+	ittt	eq
+	ldreq	r2, [sp]
+	moveq	r3, #2
+	strbeq	r3, [r2]
 	bl	ftl_malloc
-	ldr	r3, .L3055+64
-	mov	r10, #0
+	ldr	r3, .L3155+60
 	str	r0, [r3]
 	mov	r0, #16384
 	bl	ftl_malloc
-	ldr	r3, .L3055+68
+	ldr	r3, .L3155+64
 	str	r0, [r3]
 	mov	r0, #2048
 	bl	ftl_malloc
 	str	r0, [r7]
 	movs	r0, #64
 	bl	ftl_malloc
-	ldr	r3, .L3055+72
+	ldr	r3, .L3155+68
 	str	r0, [r3]
 	movs	r0, #64
 	bl	ftl_malloc
-	ldr	r3, .L3055+76
+	ldr	r3, .L3155+72
 	str	r0, [r3]
 	movs	r0, #64
 	bl	ftl_malloc
-	ldr	r3, .L3055+80
+	ldr	r3, .L3155+76
 	str	r0, [r3]
-	ldr	r3, .L3055+84
-	strb	r10, [r3]
+	ldr	r3, .L3155+80
+	strb	r8, [r3]
 	bl	flash_die_info_init
 	ldrb	r0, [r4, #18]	@ zero_extendqisi2
 	bl	flash_lsb_page_tbl_build
 	ldrb	r0, [r4, #20]	@ zero_extendqisi2
 	bl	nandc_bch_sel
-	ldr	r2, [r8]
-	ldr	r1, .L3055+88
-	ldrh	r3, [r2, #16]
-	ldrb	r2, [r2, #28]	@ zero_extendqisi2
-	mov	r8, r1
-	ubfx	r0, r3, #8, #3
-	ubfx	r5, r3, #3, #1
-	strb	r0, [r1]
-	ldr	r0, .L3055+92
-	strb	r5, [r0]
-	ubfx	r5, r3, #4, #1
-	ldr	r0, .L3055+96
-	strb	r5, [r0]
-	ubfx	r5, r3, #12, #1
-	ldr	r0, .L3055+100
-	strb	r5, [r0]
-	ubfx	r5, r3, #13, #1
-	ldr	r0, .L3055+104
-	strb	r5, [r0]
-	ubfx	r5, r3, #14, #1
-	ldr	r0, .L3055+108
+	ldr	r1, [r6]
+	ldr	r0, .L3155+84
+	ldrh	r3, [r1, #16]
+	ubfx	r2, r3, #8, #3
+	ubfx	r6, r3, #3, #1
+	strb	r2, [r0]
+	ldr	r2, .L3155+88
+	strb	r6, [r2]
+	ubfx	r6, r3, #4, #1
+	ldr	r2, .L3155+92
+	strb	r6, [r2]
+	ubfx	r6, r3, #12, #1
+	ldr	r2, .L3155+96
+	strb	r6, [r2]
+	ubfx	r6, r3, #13, #1
+	ldr	r2, .L3155+100
+	strb	r6, [r2]
+	ubfx	r6, r3, #11, #1
+	ldr	r2, .L3155+104
+	strb	r6, [r2]
+	ldrb	r2, [r1, #31]	@ zero_extendqisi2
+	ldr	r6, .L3155+108
+	ldrb	r1, [r1, #28]	@ zero_extendqisi2
+	ubfx	ip, r2, #1, #1
+	ubfx	r2, r2, #2, #1
+	strb	ip, [r6]
+	ldr	r6, .L3155+112
+	strb	r2, [r6]
+	ubfx	r6, r3, #14, #1
+	ldr	r2, .L3155+116
 	lsrs	r3, r3, #15
-	strb	r5, [r0]
-	ldr	r0, .L3055+112
-	ldr	r5, .L3055+116
-	strb	r3, [r0]
-	movs	r0, #60
-	ldr	r3, .L3055+120
-	str	r10, [r5]
+	strb	r6, [r2]
+	ldr	r2, .L3155+120
+	ldr	r6, .L3155+124
+	strb	r3, [r2]
+	movs	r2, #60
+	ldr	r3, .L3155+128
+	str	r8, [r6]
+	mov	r8, r0
+	strb	r1, [r3]
+	ldr	r3, .L3155+132
 	strb	r2, [r3]
-	ldr	r3, .L3055+124
-	strb	r0, [r3]
-	ldrb	r0, [fp]	@ zero_extendqisi2
-	cmp	r0, #9
+	ldrb	r2, [fp]	@ zero_extendqisi2
+	cmp	r2, #9
+	itt	eq
+	moveq	r0, #70
+	strbeq	r0, [r3]
+	ldr	r3, .L3155+136
+	strb	r1, [r3]
+	ldrb	r1, [r4, #7]	@ zero_extendqisi2
+	cmp	r1, #9
 	itt	eq
-	moveq	r1, #70
+	moveq	r1, #0
 	strbeq	r1, [r3]
-	ldr	r3, .L3055+128
-	ldrh	r1, [r4, #16]
-	strb	r2, [r3]
-	ldrb	r2, [r4, #7]	@ zero_extendqisi2
-	cmp	r2, #9
+	ldrb	r1, [r4, #31]	@ zero_extendqisi2
+	lsls	r1, r1, #31
+	itt	mi
+	movmi	r1, #3
+	strbmi	r1, [r3]
+	cmp	r2, #8
+	bne	.L3088
+	ldrb	r2, [r10]	@ zero_extendqisi2
+	cmp	r2, #44
+	beq	.L3089
+	cmp	r2, #137
+	bne	.L3088
+.L3089:
+	ldrb	r2, [r4, #28]	@ zero_extendqisi2
+	cmp	r2, #3
 	itt	eq
 	moveq	r2, #0
 	strbeq	r2, [r3]
-	tst	r1, #64
+.L3088:
+	ldrh	r1, [r4, #16]
 	ldrb	r3, [r4, #19]	@ zero_extendqisi2
-	ldr	r2, .L3055+132
+	ldr	r2, .L3155+140
+	tst	r1, #64
 	strb	r3, [r2]
 	mov	r4, r2
-	beq	.L2992
+	beq	.L3091
 	sub	r2, r3, #17
 	cmp	r2, #2
-	bls	.L2993
+	bls	.L3092
 	cmp	r3, #21
-	bne	.L2994
-.L2993:
-	ldr	r2, .L3055+136
+	bne	.L3093
+.L3092:
+	ldr	r2, .L3155+144
 	cmp	r3, #21
-	ldr	r3, .L3055+140
-	str	r2, [r5]
-	beq	.L3054
+	ldr	r3, .L3155+148
+	str	r2, [r6]
+	beq	.L3154
 	movs	r2, #15
-.L3052:
+.L3152:
 	strb	r2, [r3]
-.L2992:
-	ldr	r3, [r6]
-	lsls	r0, r3, #19
-	bpl	.L3004
-	ldr	r2, .L3055+4
-	movw	r1, #2574
-	ldr	r0, .L3055+8
+.L3091:
+	ldr	r3, [r5]
+	lsls	r3, r3, #19
+	bpl	.L3103
+	ldr	r2, .L3155+4
+	movw	r1, #2671
+	ldr	r0, .L3155+8
 	bl	printf
-.L3004:
-	ldr	r3, .L3055+144
+.L3103:
+	ldr	r3, .L3155+152
 	movs	r2, #0
 	movs	r0, #4
 	strb	r2, [r3]
-	mov	fp, r3
+	mov	r10, r3
 	ldrb	r2, [r8]	@ zero_extendqisi2
 	tst	r2, #1
-	beq	.L3005
+	beq	.L3104
 	bl	nandc_set_if_mode
 	movs	r0, #1
 	bl	flash_set_interface_mode
 	movs	r0, #1
-.L3005:
+.L3104:
 	bl	nandc_set_if_mode
 	bl	flash_info_blk_init
-	cmp	r0, #-1
-	mov	r10, r0
-	bne	.L3007
-	ldr	r3, [r6]
-	lsls	r1, r3, #19
-	bpl	.L3008
-	ldr	r2, .L3055+4
-	movw	r1, #2606
-	ldr	r0, .L3055+8
+	cmp	r0, #-1
+	mov	fp, r0
+	bne	.L3106
+	ldr	r3, [r5]
+	lsls	r0, r3, #19
+	bpl	.L3107
+	ldr	r2, .L3155+4
+	mov	r1, #2688
+	ldr	r0, .L3155+8
 	bl	printf
-.L3008:
+.L3107:
 	ldr	r3, [r7]
 	movs	r2, #17
 	movs	r0, #0
 	strb	r2, [r3, #32]
+	ldr	r3, .L3155+156
+	strb	r0, [r3]
 	bl	zftl_flash_exit_slc_mode
-	b	.L2973
-.L2981:
-	adds	r5, r5, #1
-	adds	r7, r7, #32
-	cmp	r5, #39
-	bne	.L2983
-	b	.L2978
-.L2994:
+	b	.L3071
+.L3079:
+	adds	r7, r7, #1
+	add	r8, r8, #32
+	cmp	r7, #44
+	bne	.L3081
+	b	.L3076
+.L3093:
 	cmp	r3, #33
-	beq	.L2997
+	beq	.L3096
 	sub	r2, r3, #65
 	cmp	r2, #1
-	bhi	.L2998
-.L2997:
-	ldr	r3, .L3055+148
+	bhi	.L3097
+.L3096:
+	ldr	r3, .L3155+160
 	movs	r2, #4
-	str	r3, [r5]
-	ldr	r3, .L3055+152
+	str	r3, [r6]
+	ldr	r3, .L3155+164
 	strb	r2, [r3]
-.L3053:
+.L3153:
 	movs	r2, #7
-	ldr	r3, .L3055+140
-	b	.L3052
-.L2998:
-	sub	r2, r3, #67
-	uxtb	r2, r2
-	cmp	r2, #1
-	bls	.L2999
-	sub	r1, r3, #34
-	cmp	r1, #1
-	bhi	.L3000
-.L2999:
-	ldr	r1, .L3055+148
-	cmp	r3, #35
-	str	r1, [r5]
-	ldr	r1, .L3055+140
-	beq	.L3001
-	cmp	r3, #68
-	beq	.L3001
-	movs	r3, #7
-.L3051:
-	cmp	r2, #1
-	strb	r3, [r1]
-	ldr	r3, .L3055+152
-	bhi	.L3003
-.L3054:
-	movs	r2, #4
-	b	.L3052
-.L3001:
-	movs	r3, #17
-	b	.L3051
-.L3003:
-	movs	r2, #5
-	b	.L3052
-.L3000:
-	subs	r3, r3, #36
-	cmp	r3, #1
-	bhi	.L2992
-	ldr	r3, .L3055+156
-	str	r3, [r5]
-	b	.L3053
-.L3056:
+	ldr	r3, .L3155+148
+	b	.L3152
+.L3156:
 	.align	2
-.L3055:
+.L3155:
 	.word	.LANCHOR14
-	.word	.LANCHOR197
-	.word	.LC90
-	.word	.LANCHOR160
+	.word	.LANCHOR200
+	.word	.LC92
+	.word	.LANCHOR163
 	.word	.LANCHOR16
-	.word	.LANCHOR31
 	.word	.LANCHOR18
-	.word	.LANCHOR42
+	.word	.LANCHOR32
 	.word	.LANCHOR30
-	.word	.LANCHOR141
-	.word	.LANCHOR198+1
-	.word	.LANCHOR198
-	.word	.LANCHOR199
+	.word	.LANCHOR143
+	.word	.LANCHOR44
+	.word	.LANCHOR201
+	.word	.LANCHOR202
 	.word	.LANCHOR20
 	.word	.LANCHOR28
 	.word	.LANCHOR27
-	.word	.LANCHOR164
-	.word	.LANCHOR156
-	.word	.LANCHOR163
-	.word	.LANCHOR158
-	.word	.LANCHOR194
-	.word	.LANCHOR200
-	.word	.LANCHOR43
-	.word	.LANCHOR168
-	.word	.LANCHOR39
-	.word	.LANCHOR75
-	.word	.LANCHOR72
+	.word	.LANCHOR167
+	.word	.LANCHOR159
+	.word	.LANCHOR166
+	.word	.LANCHOR161
+	.word	.LANCHOR197
+	.word	.LANCHOR203
+	.word	.LANCHOR45
+	.word	.LANCHOR171
+	.word	.LANCHOR41
+	.word	.LANCHOR77
+	.word	.LANCHOR74
+	.word	.LANCHOR35
+	.word	.LANCHOR204
+	.word	.LANCHOR205
 	.word	.LANCHOR1
-	.word	.LANCHOR73
-	.word	.LANCHOR162
+	.word	.LANCHOR75
+	.word	.LANCHOR165
 	.word	.LANCHOR0
 	.word	.LANCHOR17
 	.word	.LANCHOR19
 	.word	.LANCHOR23
 	.word	micron_read_retrial
-	.word	.LANCHOR159
+	.word	.LANCHOR162
 	.word	.LANCHOR21
+	.word	.LANCHOR33
 	.word	toshiba_read_retrial
 	.word	.LANCHOR26
-	.word	toshiba_3d_read_retrial
-.L3007:
+	.word	.LANCHOR31
+	.word	.LANCHOR201+1
+.L3097:
+	sub	r2, r3, #67
+	uxtb	r2, r2
+	cmp	r2, #1
+	bls	.L3098
+	sub	r1, r3, #34
+	cmp	r1, #1
+	bhi	.L3099
+.L3098:
+	ldr	r1, .L3157
+	cmp	r3, #35
+	str	r1, [r6]
+	ldr	r1, .L3157+4
+	beq	.L3100
+	cmp	r3, #68
+	beq	.L3100
+	movs	r3, #7
+.L3151:
+	cmp	r2, #1
+	strb	r3, [r1]
+	ldr	r3, .L3157+8
+	bhi	.L3102
+.L3154:
+	movs	r2, #4
+	b	.L3152
+.L3100:
+	movs	r3, #17
+	b	.L3151
+.L3102:
+	movs	r2, #5
+	b	.L3152
+.L3099:
+	subs	r3, r3, #36
+	cmp	r3, #1
+	bhi	.L3091
+	ldr	r3, .L3157+12
+	str	r3, [r6]
+	b	.L3153
+.L3106:
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	cmp	r3, #7
 	itt	ls
-	ldrls	r3, .L3057
-	strls	r3, [r5]
+	ldrls	r3, .L3157+16
+	strls	r3, [r6]
 	ldrb	r3, [r8]	@ zero_extendqisi2
-	lsls	r2, r3, #29
-	bpl	.L3011
+	lsls	r1, r3, #29
+	bpl	.L3110
 	ldr	r3, [r7]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
-	cbz	r3, .L3011
-	ldr	r2, .L3057+4
+	cbz	r3, .L3110
+	ldr	r2, .L3157+20
 	movs	r0, #0
-	ldr	r3, .L3057+8
+	ldr	r3, .L3157+24
 	ldrh	r1, [r2]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	muls	r1, r3, r1
 	bl	flash_ddr_para_scan
-	ldrb	r3, [fp]	@ zero_extendqisi2
-	cbnz	r3, .L3011
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	cbnz	r3, .L3110
 	ldr	r2, [r7]
 	strb	r3, [r2, #19]
 	bl	flash_info_flush
-.L3011:
-	ldr	r3, [r6]
-	lsls	r3, r3, #19
-	bpl	.L3013
-	ldr	r2, .L3057+12
-	mov	r1, #2672
-	ldr	r0, .L3057+16
+.L3110:
+	ldr	r3, [r5]
+	lsls	r2, r3, #19
+	bpl	.L3112
+	ldr	r2, .L3157+28
+	movw	r1, #2740
+	ldr	r0, .L3157+32
 	bl	printf
-.L3013:
+.L3112:
 	bl	nand_flash_print_info
-	mov	r10, #0
-	b	.L2973
-.L3058:
+	mov	fp, #0
+	b	.L3071
+.L3158:
 	.align	2
-.L3057:
+.L3157:
+	.word	toshiba_read_retrial
+	.word	.LANCHOR162
+	.word	.LANCHOR26
+	.word	toshiba_3d_read_retrial
 	.word	hynix_read_retrial
 	.word	.LANCHOR2
-	.word	.LANCHOR195
-	.word	.LANCHOR197
-	.word	.LC90
+	.word	.LANCHOR198
+	.word	.LANCHOR200
+	.word	.LC92
 	.size	nand_flash_init, .-nand_flash_init
 	.section	.text.ftl_sysblk_dump,"ax",%progbits
 	.align	1
@@ -19261,37 +20275,37 @@ ftl_sysblk_dump:
 	mov	r4, r0
 	mov	r5, r6
 	str	r3, [sp, #44]
-.L3060:
-	ldr	r3, .L3069
+.L3160:
+	ldr	r3, .L3169
 	ldrh	r2, [r3]
 	uxth	r3, r6
 	cmp	r2, r3
-	bhi	.L3062
+	bhi	.L3162
 	ldr	r1, [sp, #44]
 	movs	r3, #32
-	ldr	r0, .L3069+4
+	ldr	r0, .L3169+4
 	movs	r2, #4
 	add	r1, r1, #704
 	bl	rknand_print_hex
 	mov	r0, r4
-	bl	buf_free
-	cbz	r5, .L3063
-	movw	r2, #1351
-	ldr	r1, .L3069+8
-	ldr	r0, .L3069+12
+	bl	zbuf_free
+	cbz	r5, .L3163
+	movw	r2, #1422
+	ldr	r1, .L3169+8
+	ldr	r0, .L3169+12
 	bl	printf
-.L3063:
+.L3163:
 	mov	r0, r5
 	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3062:
-	ldr	r3, .L3069+16
+.L3162:
+	ldr	r3, .L3169+16
 	uxth	r7, r6
 	ldr	r2, [r4, #12]
 	ldr	r1, [r4, #4]
 	ldrh	r8, [r3]
-	ldr	r3, .L3069+20
+	ldr	r3, .L3169+20
 	mla	r8, fp, r8, r7
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	mov	r0, r8
@@ -19317,31 +20331,31 @@ ftl_sysblk_dump:
 	mov	r2, r7
 	ldr	r3, [r3]
 	str	r0, [sp]
-	ldr	r0, .L3069+24
+	ldr	r0, .L3169+24
 	str	r3, [sp, #4]
 	mov	r3, r8
 	bl	printf
 	cmp	r10, #-1
-	beq	.L3064
+	beq	.L3164
 	cmp	r10, #512
 	it	eq
 	moveq	r5, #1
-.L3061:
+.L3161:
 	adds	r6, r6, #1
-	b	.L3060
-.L3064:
+	b	.L3160
+.L3164:
 	movs	r5, #1
-	b	.L3061
-.L3070:
+	b	.L3161
+.L3170:
 	.align	2
-.L3069:
-	.word	.LANCHOR85
-	.word	.LC171
-	.word	.LANCHOR201
+.L3169:
+	.word	.LANCHOR87
+	.word	.LC177
+	.word	.LANCHOR206
 	.word	.LC0
-	.word	.LANCHOR103
-	.word	.LANCHOR123
-	.word	.LC162
+	.word	.LANCHOR105
+	.word	.LANCHOR125
+	.word	.LC163
 	.size	ftl_sysblk_dump, .-ftl_sysblk_dump
 	.section	.text.dump_ftl_info,"ax",%progbits
 	.align	1
@@ -19354,26 +20368,26 @@ ftl_sysblk_dump:
 dump_ftl_info:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L3072
+	ldr	r3, .L3172
 	push	{r0, r1, r2, r4, r5, r6, r7, lr}
-	ldr	r0, .L3072+4
+	ldr	r0, .L3172+4
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	bl	printf
-	ldr	r1, .L3072+8
-	ldr	r5, .L3072+12
-	ldr	r0, .L3072+16
+	ldr	r1, .L3172+8
+	ldr	r5, .L3172+12
+	ldr	r0, .L3172+16
 	ldrh	r3, [r1, #2]
 	ldrb	r2, [r1, #1]	@ zero_extendqisi2
 	ldrb	r1, [r1]	@ zero_extendqisi2
 	bl	printf
 	ldr	r3, [r5]
-	ldr	r4, .L3072+20
-	ldr	r0, .L3072+24
+	ldr	r4, .L3172+20
+	ldr	r0, .L3172+24
 	ldrh	r2, [r3, #140]
 	ldrh	r1, [r3, #130]
 	bl	printf
 	ldr	r0, [r4]
-	ldr	r7, .L3072+28
+	ldr	r7, .L3172+28
 	ldrh	r6, [r0, #26]
 	ldrb	r3, [r0, #21]	@ zero_extendqisi2
 	ldrh	r2, [r0, #18]
@@ -19381,7 +20395,7 @@ dump_ftl_info:
 	str	r6, [sp, #4]
 	ldrh	r0, [r0, #22]
 	str	r0, [sp]
-	ldr	r0, .L3072+32
+	ldr	r0, .L3172+32
 	bl	printf
 	ldr	r0, [r4]
 	ldrh	r6, [r0, #58]
@@ -19390,9 +20404,9 @@ dump_ftl_info:
 	ldrh	r1, [r0, #48]
 	str	r6, [sp, #4]
 	ldrh	r0, [r0, #54]
-	ldr	r6, .L3072+36
+	ldr	r6, .L3172+36
 	str	r0, [sp]
-	ldr	r0, .L3072+40
+	ldr	r0, .L3172+40
 	bl	printf
 	ldr	r0, [r4]
 	ldrh	r4, [r0, #90]
@@ -19401,46 +20415,46 @@ dump_ftl_info:
 	ldrh	r1, [r0, #80]
 	str	r4, [sp, #4]
 	ldrh	r0, [r0, #86]
-	ldr	r4, .L3072+44
+	ldr	r4, .L3172+44
 	str	r0, [sp]
-	ldr	r0, .L3072+48
+	ldr	r0, .L3172+48
 	bl	printf
 	ldrh	r2, [r6]
 	ldrb	r3, [r4]	@ zero_extendqisi2
-	ldr	r1, .L3072+52
-	ldr	r0, .L3072+56
+	ldr	r1, .L3172+52
+	ldr	r0, .L3172+56
 	muls	r3, r2, r3
 	ldr	r1, [r1]
 	movs	r2, #4
 	lsls	r3, r3, #1
 	bl	rknand_print_hex
-	ldr	r1, .L3072+60
+	ldr	r1, .L3172+60
 	movs	r2, #2
 	ldrh	r3, [r7]
-	ldr	r0, .L3072+64
+	ldr	r0, .L3172+64
 	ldr	r1, [r1]
 	bl	rknand_print_hex
 	ldr	r1, [r5]
 	movs	r2, #4
-	ldr	r0, .L3072+68
+	ldr	r0, .L3172+68
 	ldrh	r3, [r1, #698]
 	add	r1, r1, #704
 	bl	rknand_print_hex
-	ldr	r1, .L3072+72
+	ldr	r1, .L3172+72
 	movs	r2, #4
 	ldrh	r3, [r7]
-	ldr	r0, .L3072+76
+	ldr	r0, .L3172+76
 	ldr	r1, [r1]
 	bl	rknand_print_hex
 	mov	r3, #256
 	movs	r2, #2
-	ldr	r1, .L3072+80
-	ldr	r0, .L3072+84
+	ldr	r1, .L3172+80
+	ldr	r0, .L3172+84
 	bl	rknand_print_hex
 	ldrh	r2, [r6]
 	ldrb	r3, [r4]	@ zero_extendqisi2
-	ldr	r1, .L3072+88
-	ldr	r0, .L3072+92
+	ldr	r1, .L3172+88
+	ldr	r0, .L3172+92
 	muls	r3, r2, r3
 	ldr	r1, [r1]
 	movs	r2, #2
@@ -19449,33 +20463,33 @@ dump_ftl_info:
 	@ sp needed
 	pop	{r4, r5, r6, r7, lr}
 	b	rknand_print_hex
-.L3073:
+.L3173:
 	.align	2
-.L3072:
-	.word	.LANCHOR52
-	.word	.LC172
-	.word	.LANCHOR179
-	.word	.LANCHOR102
-	.word	.LC173
-	.word	.LANCHOR10
-	.word	.LC174
-	.word	.LANCHOR6
-	.word	.LC175
-	.word	.LANCHOR85
-	.word	.LC176
-	.word	.LANCHOR78
-	.word	.LC177
-	.word	.LANCHOR109
+.L3172:
+	.word	.LANCHOR54
 	.word	.LC178
-	.word	.LANCHOR9
+	.word	.LANCHOR182
+	.word	.LANCHOR104
 	.word	.LC179
-	.word	.LC171
-	.word	.LANCHOR7
+	.word	.LANCHOR10
 	.word	.LC180
-	.word	.LANCHOR108
+	.word	.LANCHOR6
 	.word	.LC181
-	.word	.LANCHOR110
+	.word	.LANCHOR87
 	.word	.LC182
+	.word	.LANCHOR80
+	.word	.LC183
+	.word	.LANCHOR111
+	.word	.LC184
+	.word	.LANCHOR9
+	.word	.LC185
+	.word	.LC177
+	.word	.LANCHOR7
+	.word	.LC186
+	.word	.LANCHOR110
+	.word	.LC187
+	.word	.LANCHOR112
+	.word	.LC188
 	.size	dump_ftl_info, .-dump_ftl_info
 	.section	.text.pm_ppa_update_check,"ax",%progbits
 	.align	1
@@ -19489,49 +20503,53 @@ pm_ppa_update_check:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
+	mov	r7, r2
+	ldr	r2, .L3181
 	mov	r5, r0
-	ldr	r3, .L3081
-	movs	r4, #1
 	mov	r6, r1
-	mov	r7, r2
-	ldrh	r0, [r3]
-	rsb	r3, r0, #21
-	lsls	r4, r4, r3
-	ldr	r3, .L3081+4
-	lsr	r0, r2, r0
+	ldr	r3, .L3181+4
+	ldrb	r4, [r2]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	rsb	r4, r4, #24
+	subs	r0, r4, r3
+	movs	r4, #1
+	lsls	r4, r4, r0
+	lsr	r0, r7, r3
+	ldr	r3, .L3181+8
 	subs	r4, r4, #1
-	ldrb	r1, [r3]	@ zero_extendqisi2
 	ands	r0, r0, r4
+	ldrb	r1, [r3]	@ zero_extendqisi2
 	bl	__aeabi_uidiv
-	ldr	r3, .L3081+8
+	ldr	r3, .L3181+12
 	uxth	r0, r0
 	ldr	r3, [r3]
 	add	r0, r3, r0, lsl #2
-	ldrb	r1, [r0, #2]	@ zero_extendqisi2
-	lsrs	r1, r1, #5
-	cmp	r1, #1
-	beq	.L3075
-	cmp	r1, #7
-	bne	.L3077
-.L3075:
+	ldrb	r3, [r0, #2]	@ zero_extendqisi2
+	lsrs	r3, r3, #5
+	cmp	r3, #1
+	beq	.L3175
+	cmp	r3, #7
+	bne	.L3177
+.L3175:
 	mov	r3, r7
 	mov	r2, r6
 	mov	r1, r5
-	ldr	r0, .L3081+12
+	ldr	r0, .L3181+16
 	bl	printf
 	bl	dump_ftl_info
 	mov	r0, #-1
 	pop	{r3, r4, r5, r6, r7, pc}
-.L3077:
+.L3177:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L3082:
+.L3182:
 	.align	2
-.L3081:
-	.word	.LANCHOR66
-	.word	.LANCHOR67
+.L3181:
+	.word	.LANCHOR31
+	.word	.LANCHOR68
+	.word	.LANCHOR69
 	.word	.LANCHOR7
-	.word	.LC183
+	.word	.LC189
 	.size	pm_ppa_update_check, .-pm_ppa_update_check
 	.section	.text.load_l2p_region,"ax",%progbits
 	.align	1
@@ -19541,122 +20559,152 @@ pm_ppa_update_check:
 	.fpu softvfp
 	.type	load_l2p_region, %function
 load_l2p_region:
-	@ args = 0, pretend = 0, frame = 0
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	cmp	r1, #31
-	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
-	mov	r4, r0
-	mov	r5, r1
-	bls	.L3084
-	movs	r2, #31
-	ldr	r1, .L3092
-	ldr	r0, .L3092+4
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r5, r0
+	mov	r7, r1
+	bls	.L3184
+	movs	r2, #32
+	ldr	r1, .L3204
+	ldr	r0, .L3204+4
 	bl	printf
-.L3084:
-	ldr	r8, .L3092+44
-	ldr	r3, [r8]
+.L3184:
+	ldr	r6, .L3204+8
+	ldr	r3, [r6]
+	mov	fp, r6
 	ldrh	r2, [r3, #698]
-	cmp	r2, r4
-	bcs	.L3085
-	mov	r1, r4
-	ldr	r0, .L3092+8
-	bl	printf
-	ldr	r3, .L3092+12
-	movs	r1, #255
-	ldrh	r2, [r3]
-	movs	r3, #0
-	ldr	r0, [r3, #4]
-	bl	ftl_memset
-	ldr	r3, [r8]
-	ldrh	r3, [r3, #698]
-	cmp	r3, r4
-	bcs	.L3087
-	movs	r2, #35
-.L3091:
-	ldr	r1, .L3092
-	ldr	r0, .L3092+4
-	bl	printf
-	b	.L3087
-.L3085:
-	add	r2, r4, #176
-	ldr	r7, [r3, r2, lsl #2]
-	ldr	r3, .L3092+16
-	strh	r4, [r3, r5, lsl #3]	@ movhi
-	add	r5, r3, r5, lsl #3
-	movs	r3, #0
-	strh	r3, [r5, #2]	@ movhi
-	cbnz	r7, .L3088
-	mov	r2, r7
-	mov	r1, r4
-	ldr	r0, .L3092+20
+	cmp	r2, r5
+	bcs	.L3185
+	mov	r1, r5
+	ldr	r0, .L3204+12
 	bl	printf
-	ldr	r3, .L3092+12
+	ldr	r3, .L3204+16
+	movs	r4, #0
 	movs	r1, #255
-	ldr	r0, [r5, #4]
+	ldr	r0, [r4, #4]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-.L3087:
+	ldr	r3, [r6]
+	ldrh	r3, [r3, #698]
+	cmp	r3, r5
+	bcc	.L3186
+.L3202:
 	movs	r0, #0
-	add	sp, sp, #12
+.L3183:
+	add	sp, sp, #16
 	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L3088:
-	ldr	r6, .L3092+24
-	mov	r0, r7
-	ldr	r10, .L3092+48
-	ldr	r1, [r5, #4]
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3186:
+	movs	r2, #36
+.L3203:
+	ldr	r1, .L3204
+	ldr	r0, .L3204+4
+	bl	printf
+	b	.L3202
+.L3185:
+	add	r2, r5, #176
+	ldr	r4, [r3, r2, lsl #2]
+	movs	r2, #0
+	ldr	r3, .L3204+20
+	strh	r5, [r3, r7, lsl #3]	@ movhi
+	lsls	r7, r7, #3
+	str	r3, [sp, #12]
+	add	r10, r3, r7
+	strh	r2, [r10, #2]	@ movhi
+	cbnz	r4, .L3188
+	mov	r2, r4
+	mov	r1, r5
+	ldr	r0, .L3204+24
+	bl	printf
+	ldr	r3, .L3204+16
+	movs	r1, #255
+	ldr	r0, [r10, #4]
+	ldrh	r2, [r3]
+	bl	ftl_memset
+	b	.L3202
+.L3188:
+	ldr	r6, .L3204+28
+	mov	r0, r4
+	ldr	r8, .L3204+48
+	ldr	r1, [r10, #4]
 	ldr	r2, [r6]
-	ldrb	r3, [r10]	@ zero_extendqisi2
+	ldrb	r3, [r8]	@ zero_extendqisi2
 	bl	ftl_read_ppa_page
 	ldr	r2, [r6]
 	mov	r3, r0
 	ldr	r2, [r2]
-	cmp	r2, r4
-	beq	.L3089
-	mov	r1, r4
-	str	r7, [sp]
-	ldr	r0, .L3092+28
+	cmp	r2, r5
+	bne	.L3189
+	adds	r1, r0, #1
+	beq	.L3189
+	cmp	r0, #512
+	beq	.L3189
+.L3192:
+	ldr	r3, [r6]
+	ldr	r3, [r3]
+	cmp	r5, r3
+	beq	.L3202
+	movs	r2, #63
+	b	.L3203
+.L3189:
+	mov	r1, r5
+	str	r4, [sp]
+	ldr	r0, .L3204+32
 	bl	printf
-	ldr	r1, [r8]
+	ldr	r1, [fp]
 	movs	r2, #4
-	ldr	r0, .L3092+32
+	ldr	r0, .L3204+36
 	ldrh	r3, [r1, #698]
 	add	r1, r1, #704
 	bl	rknand_print_hex
-	ldrb	r3, [r10]	@ zero_extendqisi2
+	ldr	r2, [sp, #12]
+	ldrb	r3, [r8]	@ zero_extendqisi2
+	ldr	r0, .L3204+40
+	add	r2, r2, r7
+	mov	r7, r2
 	movs	r2, #4
-	ldr	r1, [r5, #4]
-	ldr	r0, .L3092+36
 	lsls	r3, r3, #7
+	ldr	r1, [r7, #4]
 	bl	rknand_print_hex
 	movs	r3, #16
 	movs	r2, #4
 	ldr	r1, [r6]
-	ldr	r0, .L3092+40
+	ldr	r0, .L3204+44
 	bl	rknand_print_hex
-.L3089:
+	ldrb	r3, [r8]	@ zero_extendqisi2
+	mov	r0, r4
+	ldr	r2, [r6]
+	ldr	r1, [r7, #4]
+	bl	ftl_read_ppa_page
 	ldr	r3, [r6]
 	ldr	r3, [r3]
-	cmp	r4, r3
-	beq	.L3087
-	movs	r2, #59
-	b	.L3091
-.L3093:
+	cmp	r5, r3
+	bne	.L3195
+	adds	r3, r0, #1
+	beq	.L3183
+	cmp	r0, #512
+	bne	.L3192
+.L3195:
+	mov	r0, #-1
+	b	.L3183
+.L3205:
 	.align	2
-.L3092:
-	.word	.LANCHOR202
+.L3204:
+	.word	.LANCHOR207
 	.word	.LC0
-	.word	.LC184
-	.word	.LANCHOR203
-	.word	.LANCHOR132
-	.word	.LC185
+	.word	.LANCHOR104
+	.word	.LC190
+	.word	.LANCHOR208
+	.word	.LANCHOR134
+	.word	.LC191
 	.word	.LANCHOR191
-	.word	.LC186
-	.word	.LC187
-	.word	.LC188
-	.word	.LC189
-	.word	.LANCHOR102
-	.word	.LANCHOR123
+	.word	.LC192
+	.word	.LC193
+	.word	.LC194
+	.word	.LC195
+	.word	.LANCHOR125
 	.size	load_l2p_region, .-load_l2p_region
 	.section	.text.pm_gc,"ax",%progbits
 	.align	1
@@ -19670,106 +20718,126 @@ pm_gc:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r4, .L3106
-	ldr	r5, .L3106+4
+	ldr	r4, .L3223
+	ldr	r5, .L3223+4
 	ldr	r3, [r4]
-	ldrh	r2, [r3, #688]
-	ldrh	r3, [r5]
-	subs	r3, r3, #1
-	cmp	r2, r3
-	blt	.L3096
+	ldr	r6, .L3223+8
+	ldrh	r2, [r5]
+	ldrh	r1, [r3, #688]
+	subs	r2, r2, #1
+	cmp	r1, r2
+	bge	.L3207
+	ldr	r3, [r6]
+	cmp	r3, #0
+	beq	.L3208
+.L3207:
 	bl	pm_free_sblk
 	ldr	r2, [r4]
 	ldrh	r3, [r5]
 	ldrh	r1, [r2, #688]
 	subs	r3, r3, #1
 	cmp	r1, r3
-	blt	.L3096
+	bge	.L3209
+	ldr	r3, [r6]
+	cmp	r3, #0
+	beq	.L3208
+.L3209:
 	uxth	r0, r0
-	movw	r3, #65535
+	movw	r5, #65535
+	movs	r3, #0
 	adds	r0, r0, #208
-	ldrh	r7, [r2, r0, lsl #1]
-	cmp	r7, r3
-	bne	.L3098
-	movs	r2, #131
-	ldr	r1, .L3106+8
-	ldr	r0, .L3106+12
+	str	r3, [r6]
+	ldrh	r8, [r2, r0, lsl #1]
+	cmp	r8, r5
+	bne	.L3211
+	movs	r2, #162
+	ldr	r1, .L3223+12
+	ldr	r0, .L3223+16
 	bl	printf
 	bl	pm_free_sblk
 	ldr	r3, [r4]
 	uxth	r0, r0
 	adds	r0, r0, #208
-	ldrh	r7, [r3, r0, lsl #1]
-.L3098:
-	ldr	r5, .L3106+16
+	ldrh	r8, [r3, r0, lsl #1]
+	cmp	r8, r5
+	beq	.L3208
+.L3211:
+	ldr	r5, .L3223+20
 	bl	pm_select_ram_region
 	mov	r6, r0
 	movw	r3, #65535
 	ldrh	r0, [r5, r0, lsl #3]
 	cmp	r0, r3
-	beq	.L3099
-	add	r8, r5, r6, lsl #3
-	ldr	r1, [r8, #4]
-	cbz	r1, .L3099
-	ldrsh	r3, [r8, #2]
+	beq	.L3212
+	add	r7, r5, r6, lsl #3
+	ldr	r1, [r7, #4]
+	cbz	r1, .L3212
+	ldrsh	r3, [r7, #2]
 	cmp	r3, #0
-	bge	.L3099
+	bge	.L3212
 	bl	pm_write_page
-	ldrh	r3, [r8, #2]
+	ldrh	r3, [r7, #2]
 	ubfx	r3, r3, #0, #15
-	strh	r3, [r8, #2]	@ movhi
-.L3099:
-	mov	fp, #0
-.L3100:
+	strh	r3, [r7, #2]	@ movhi
+.L3212:
+	movs	r7, #0
+.L3213:
 	ldr	r1, [r4]
-	uxth	r10, fp
-	ldrh	r0, [r1, #698]
-	cmp	r0, r10
-	bhi	.L3102
+	uxth	fp, r7
+	ldrh	r3, [r1, #698]
+	cmp	r3, fp
+	bhi	.L3216
 	bl	pm_free_sblk
-.L3096:
+.L3208:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3102:
-	ldr	r3, .L3106+20
-	uxth	r8, fp
-	add	ip, r8, #176
+.L3216:
+	ldr	r3, .L3223+24
+	uxth	r10, r7
+	mov	ip, #1
 	ldrh	r0, [r3]
+	ldr	r3, .L3223+28
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	rsb	r3, r3, #24
+	subs	r3, r3, r0
+	lsl	r3, ip, r3
+	add	ip, r10, #176
 	ldr	r1, [r1, ip, lsl #2]
-	ldr	r3, .L3106+24
-	lsr	ip, r1, r0
-	rsb	r1, r0, #21
-	movs	r0, #1
-	lsls	r0, r0, r1
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	subs	r0, r0, #1
-	and	r0, ip, r0
+	subs	r3, r3, #1
+	lsr	r0, r1, r0
+	ldr	r1, .L3223+32
+	ands	r0, r0, r3
+	ldrb	r1, [r1]	@ zero_extendqisi2
 	bl	__aeabi_uidiv
 	uxth	r0, r0
-	cmp	r0, r7
-	bne	.L3101
+	cmp	r8, r0
+	bne	.L3214
 	mov	r1, r6
-	mov	r0, r10
+	mov	r0, fp
 	bl	load_l2p_region
-	add	r2, r5, r6, lsl #3
-	mov	r0, r8
-	ldr	r1, [r2, #4]
+	cbnz	r0, .L3215
+	add	r3, r5, r6, lsl #3
+	mov	r0, r10
+	ldr	r1, [r3, #4]
 	bl	pm_write_page
-	movw	r2, #65535
-	strh	r2, [r5, r6, lsl #3]	@ movhi
-.L3101:
-	add	fp, fp, #1
-	b	.L3100
-.L3107:
+.L3215:
+	movw	r3, #65535
+	strh	r3, [r5, r6, lsl #3]	@ movhi
+.L3214:
+	adds	r7, r7, #1
+	b	.L3213
+.L3224:
 	.align	2
-.L3106:
-	.word	.LANCHOR102
+.L3223:
+	.word	.LANCHOR104
+	.word	.LANCHOR149
 	.word	.LANCHOR146
-	.word	.LANCHOR204
+	.word	.LANCHOR209
 	.word	.LC0
-	.word	.LANCHOR132
-	.word	.LANCHOR66
-	.word	.LANCHOR67
+	.word	.LANCHOR134
+	.word	.LANCHOR68
+	.word	.LANCHOR31
+	.word	.LANCHOR69
 	.size	pm_gc, .-pm_gc
 	.section	.text.pm_flush_id,"ax",%progbits
 	.align	1
@@ -19782,7 +20850,7 @@ pm_gc:
 pm_flush_id:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L3113
+	ldr	r3, .L3230
 	push	{r4, lr}
 	add	r4, r3, r0, lsl #3
 	ldrh	r0, [r3, r0, lsl #3]
@@ -19791,20 +20859,20 @@ pm_flush_id:
 	ldrh	r3, [r4, #2]
 	ubfx	r3, r3, #0, #15
 	strh	r3, [r4, #2]	@ movhi
-	ldr	r4, .L3113+4
+	ldr	r4, .L3230+4
 	ldr	r3, [r4]
-	cbz	r3, .L3109
+	cbz	r3, .L3226
 	bl	pm_gc
 	movs	r3, #0
 	str	r3, [r4]
-.L3109:
+.L3226:
 	movs	r0, #0
 	pop	{r4, pc}
-.L3114:
+.L3231:
 	.align	2
-.L3113:
+.L3230:
+	.word	.LANCHOR134
 	.word	.LANCHOR132
-	.word	.LANCHOR130
 	.size	pm_flush_id, .-pm_flush_id
 	.section	.text.pm_flush,"ax",%progbits
 	.align	1
@@ -19819,24 +20887,24 @@ pm_flush:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #0
-	ldr	r5, .L3119
-.L3117:
+	ldr	r5, .L3236
+.L3234:
 	add	r3, r5, r4, lsl #3
 	uxth	r0, r4
 	ldrsh	r3, [r3, #2]
 	cmp	r3, #0
-	bge	.L3116
+	bge	.L3233
 	bl	pm_flush_id
-.L3116:
+.L3233:
 	adds	r4, r4, #1
 	cmp	r4, #32
-	bne	.L3117
+	bne	.L3234
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L3120:
+.L3237:
 	.align	2
-.L3119:
-	.word	.LANCHOR132
+.L3236:
+	.word	.LANCHOR134
 	.size	pm_flush, .-pm_flush
 	.section	.text.flt_sys_flush,"ax",%progbits
 	.align	1
@@ -19901,39 +20969,41 @@ pm_init:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r3, .L3141
+	ldr	r3, .L3262
 	movs	r2, #1
-	mov	r10, r0
+	mov	r8, r0
 	movs	r0, #64
-	ldr	r5, .L3141+4
+	ldr	r6, .L3262+4
+	str	r4, [r3]
+	ldr	r3, .L3262+8
+	mov	r5, r6
 	str	r4, [r3]
-	ldr	r3, .L3141+8
-	mov	r7, r5
+	ldr	r3, .L3262+12
 	strb	r2, [r3]
 	bl	ftl_malloc
-	ldr	r3, .L3141+12
-	mov	r8, r3
+	ldr	r3, .L3262+16
+	mov	r10, r3
 	str	r0, [r3]
-.L3126:
+.L3243:
 	movw	r3, #65535
-	adds	r6, r5, r4
-	strh	r3, [r4, r5]	@ movhi
+	adds	r7, r6, r4
+	strh	r3, [r4, r6]	@ movhi
 	movs	r3, #0
-	strh	r3, [r6, #2]	@ movhi
-	cmp	r10, #0
-	beq	.L3125
-	ldr	r3, .L3141+16
+	strh	r3, [r7, #2]	@ movhi
+	cmp	r8, #0
+	beq	.L3242
+	ldr	r3, .L3262+20
 	ldrb	r0, [r3]	@ zero_extendqisi2
 	lsls	r0, r0, #9
 	bl	ftl_malloc
-	str	r0, [r6, #4]
-.L3125:
+	str	r0, [r7, #4]
+.L3242:
 	adds	r4, r4, #8
 	cmp	r4, #256
-	bne	.L3126
-	ldr	r3, [r7, #4]
-	ldr	r4, .L3141+20
-	ldr	r10, [r8]
+	bne	.L3243
+	ldr	r3, [r5, #4]
+	ldr	r4, .L3262+24
+	ldr	r10, [r10]
 	str	r3, [sp, #12]
 	ldr	r3, [r4]
 	ldr	r2, [sp, #12]
@@ -19944,53 +21014,62 @@ pm_init:
 	mov	r3, r10
 	bl	flash_get_last_written_page
 	ldr	r1, [r4]
-	mov	r5, r0
+	mov	r6, r0
 	ldrh	r2, [r1, #696]
 	cmp	r2, r0
-	bgt	.L3127
+	bgt	.L3244
 	mov	r3, r0
 	ldrh	r1, [r1, #692]
-	ldr	r0, .L3141+24
+	ldr	r0, .L3262+28
 	bl	printf
 	ldr	r3, [r4]
-	ldrsh	r6, [r3, #696]
-.L3128:
-	cmp	r6, r5
-	ble	.L3130
-	ldr	r3, .L3141+28
+	ldrsh	r7, [r3, #696]
+.L3245:
+	cmp	r7, r6
+	ble	.L3247
+	ldr	r3, .L3262+32
 	movs	r2, #1
-	add	r5, r5, r2
+	add	r6, r6, r2
 	strb	r2, [r3]
 	ldr	r3, [r4]
-	strh	r5, [r3, #696]	@ movhi
+	strh	r6, [r3, #696]	@ movhi
 	bl	pm_free_sblk
-.L3127:
-	ldr	r1, [r7, #4]
+.L3244:
+	ldr	r3, .L3262+36
+	movs	r1, #255
+	ldr	r0, [r5, #4]
+	ldrh	r2, [r3]
+	bl	ftl_memset
+	ldr	r1, [r5, #4]
 	mov	r0, #-1
 	bl	pm_write_page
-	ldr	r1, [r7, #4]
+	ldr	r3, .L3262+32
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L3248
+	ldr	r1, [r5, #4]
 	mov	r0, #-1
 	bl	pm_write_page
-	ldr	r1, [r7, #4]
+	ldr	r1, [r5, #4]
 	mov	r0, #-1
 	bl	pm_write_page
-	ldr	r1, [r7, #4]
+	ldr	r1, [r5, #4]
 	mov	r0, #-1
 	bl	pm_write_page
+.L3248:
 	bl	pm_free_sblk
 	bl	pm_gc
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3130:
+.L3247:
 	ldr	r3, [r4]
-	ldr	r2, .L3141+32
+	ldr	r2, .L3262+40
 	ldrh	r8, [r3, #692]
 	ldrh	r2, [r2]
 	ldrb	r0, [r3, #694]	@ zero_extendqisi2
-	ldr	r3, .L3141+16
-	mla	r8, r2, r8, r6
+	ldr	r3, .L3262+20
+	mla	r8, r2, r8, r7
 	ldr	r2, [sp, #12]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	mov	r1, r8
@@ -19999,7 +21078,7 @@ pm_init:
 	bl	flash_read_page_en
 	ldr	r3, [r4]
 	mov	fp, r0
-	ldr	r0, .L3141+36
+	ldr	r0, .L3262+44
 	ldr	r2, [r3, #48]
 	adds	r2, r2, #1
 	str	r2, [r3, #48]
@@ -20008,9 +21087,9 @@ pm_init:
 	ldr	r1, [r10]
 	bl	printf
 	cmp	fp, #-1
-	beq	.L3129
+	beq	.L3246
 	cmp	fp, #512
-	beq	.L3129
+	beq	.L3246
 	ldr	r2, [r4]
 	ldr	r3, [r10]
 	ldrh	r1, [r2, #698]
@@ -20018,23 +21097,25 @@ pm_init:
 	itt	cc
 	addcc	r3, r3, #176
 	strcc	r8, [r2, r3, lsl #2]
-.L3129:
-	adds	r6, r6, #1
-	sxth	r6, r6
-	b	.L3128
-.L3142:
+.L3246:
+	adds	r7, r7, #1
+	sxth	r7, r7
+	b	.L3245
+.L3263:
 	.align	2
-.L3141:
-	.word	.LANCHOR130
+.L3262:
+	.word	.LANCHOR146
+	.word	.LANCHOR134
 	.word	.LANCHOR132
 	.word	.LANCHOR192
 	.word	.LANCHOR191
-	.word	.LANCHOR123
-	.word	.LANCHOR102
-	.word	.LC190
-	.word	.LANCHOR182
-	.word	.LANCHOR103
-	.word	.LC191
+	.word	.LANCHOR125
+	.word	.LANCHOR104
+	.word	.LC196
+	.word	.LANCHOR185
+	.word	.LANCHOR208
+	.word	.LANCHOR105
+	.word	.LC197
 	.size	pm_init, .-pm_init
 	.section	.text.pm_log2phys,"ax",%progbits
 	.align	1
@@ -20047,110 +21128,127 @@ pm_init:
 pm_log2phys:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L3158
+	ldr	r3, .L3279
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	fp, r0
 	str	r2, [sp, #4]
-	mov	r7, r1
+	mov	r6, r1
 	ldr	r2, [r3]
 	cmp	r0, r2
-	bcc	.L3144
+	bcc	.L3265
 	mov	r1, r0
-	ldr	r0, .L3158+4
+	ldr	r0, .L3279+4
 	bl	printf
 	ldr	r3, [sp, #4]
 	mov	r0, #-1
-	cbnz	r3, .L3143
-	str	r0, [r7]
-.L3143:
+	cbnz	r3, .L3264
+	str	r0, [r6]
+.L3264:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3144:
-	ldr	r3, .L3158+8
+.L3265:
+	ldr	r3, .L3279+8
 	ldrb	r5, [r3]	@ zero_extendqisi2
 	lsls	r1, r5, #7
 	bl	__aeabi_uidiv
-	ldr	r1, .L3158+12
-	uxth	r6, r0
+	ldr	r1, .L3279+12
+	uxth	r7, r0
 	mov	r10, r0
 	movs	r2, #0
 	mov	r8, r1
-.L3150:
+.L3271:
 	add	r0, r1, r2, lsl #3
 	uxth	r4, r2
 	ldr	r0, [r0, #4]
-	cbz	r0, .L3146
+	cmp	r0, #0
+	beq	.L3267
 	ldrh	r0, [r1, r2, lsl #3]
-	cmp	r0, r6
-	bne	.L3146
-.L3147:
+	cmp	r0, r7
+	bne	.L3267
+.L3268:
 	lsls	r5, r5, #7
 	ldr	r3, [sp, #4]
 	lsls	r4, r4, #3
-	smulbb	r5, r5, r6
+	smulbb	r5, r5, r7
 	sub	r5, fp, r5
 	uxth	r5, r5
-	cbnz	r3, .L3148
+	cbnz	r3, .L3269
 	add	r2, r8, r4
+	ldr	r1, .L3279+16
 	ldr	r2, [r2, #4]
 	ldr	r2, [r2, r5, lsl #2]
-	str	r2, [r7]
-.L3149:
+	str	r2, [r6]
+	ldrb	r0, [r1]	@ zero_extendqisi2
+	rsb	r1, r0, #24
+	lsrs	r2, r2, r1
+	movs	r1, #1
+	lsls	r1, r1, r0
+	subs	r1, r1, #1
+	ands	r2, r2, r1
+	ldr	r1, .L3279+20
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	cmp	r2, r1
+	bcc	.L3270
+	mov	r2, #-1
+	str	r2, [r6]
+.L3270:
 	add	r4, r4, r8
 	movw	r2, #32767
 	ldrh	r3, [r4, #2]
 	ubfx	r1, r3, #0, #15
 	cmp	r1, r2
-	beq	.L3153
+	beq	.L3274
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
-.L3153:
+.L3274:
 	movs	r0, #0
-	b	.L3143
-.L3148:
+	b	.L3264
+.L3269:
 	add	r1, r8, r4
-	ldr	r0, [r7]
+	ldr	r0, [r6]
 	ldr	r2, [r1, #4]
 	str	r0, [r2, r5, lsl #2]
 	ldrh	r2, [r1, #2]
 	mvn	r2, r2, lsl #17
 	mvn	r2, r2, lsr #17
 	strh	r2, [r1, #2]	@ movhi
-	ldr	r2, .L3158+16
+	ldr	r2, .L3279+24
 	strb	r10, [r2]
-	b	.L3149
-.L3146:
+	b	.L3270
+.L3267:
 	adds	r2, r2, #1
 	cmp	r2, #32
-	bne	.L3150
+	bne	.L3271
 	bl	pm_select_ram_region
 	ldrh	r1, [r8, r0, lsl #3]
 	movw	r2, #65535
 	mov	r4, r0
 	cmp	r1, r2
-	beq	.L3151
+	beq	.L3272
 	add	r2, r8, r0, lsl #3
 	ldrsh	r2, [r2, #2]
 	cmp	r2, #0
-	bge	.L3151
+	bge	.L3272
 	bl	pm_flush_id
-.L3151:
-	ldr	r2, .L3158+20
-	mov	r1, r4
-	mov	r0, r6
-	strb	r4, [r2]
-	bl	load_l2p_region
-	b	.L3147
-.L3159:
-	.align	2
-.L3158:
-	.word	.LANCHOR120
-	.word	.LC192
-	.word	.LANCHOR123
-	.word	.LANCHOR132
-	.word	.LANCHOR133
-	.word	.LANCHOR205
+.L3272:
+	ldr	r2, .L3279+28
+	mov	r1, r4
+	mov	r0, r7
+	strb	r4, [r2]
+	bl	load_l2p_region
+	b	.L3268
+.L3280:
+	.align	2
+.L3279:
+	.word	.LANCHOR122
+	.word	.LC198
+	.word	.LANCHOR125
+	.word	.LANCHOR134
+	.word	.LANCHOR31
+	.word	.LANCHOR106
+	.word	.LANCHOR135
+	.word	.LANCHOR210
 	.size	pm_log2phys, .-pm_log2phys
 	.section	.text.gc_recovery,"ax",%progbits
 	.align	1
@@ -20163,61 +21261,68 @@ pm_log2phys:
 gc_recovery:
 	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r2, .L3368
+	ldr	r3, .L3368+4
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r7, .L3216
+	ldr	r5, [r2]
 	sub	sp, sp, #64
-	ldr	r3, .L3216+4
-	ldr	r5, [r7]
+	mov	r8, r2
 	strb	r4, [r3]
-	ldr	r3, .L3216+8
+	ldr	r3, .L3368+8
 	ldrh	r6, [r5, #80]
 	strb	r4, [r3]
 	movw	r3, #65535
 	cmp	r6, r3
-	beq	.L3161
+	beq	.L3282
 	strh	r3, [r5, #130]	@ movhi
 	movs	r0, #1
 	bl	buf_alloc
 	ldrb	r3, [r5, #89]	@ zero_extendqisi2
-	mov	r4, r0
-	ldr	r6, .L3216+12
+	mov	r6, r0
+	ldr	r2, .L3368+12
+	ldr	r7, .L3368+16
 	add	r3, r5, r3, lsl #1
-	ldrh	r2, [r3, #94]
-	ldr	r3, .L3216+16
-	ldrh	r3, [r3]
-	muls	r3, r2, r3
-	ldrb	r2, [r6]	@ zero_extendqisi2
-	cmp	r2, #3
-	str	r3, [sp, #56]
-	bne	.L3162
-	ldr	r2, .L3216+20
 	ldrh	r2, [r2]
-	subs	r2, r2, #1
+	ldrb	r1, [r7]	@ zero_extendqisi2
+	ldrh	r3, [r3, #94]
+	cmp	r1, #2
+	mul	r2, r2, r3
+	str	r2, [sp, #56]
+	beq	.L3283
+	ldr	r3, .L3368+20
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L3284
+.L3283:
+	ldr	r3, .L3368+24
+	ldrh	r3, [r3]
+	subs	r3, r3, #1
 	add	r3, r3, r2
-	orr	r3, r3, #50331648
-.L3211:
-	str	r3, [r4, #24]
-.L3163:
+	orr	r3, r3, r1, lsl #24
+.L3366:
+	str	r3, [r6, #24]
+.L3285:
 	movs	r1, #1
-	mov	r0, r4
+	mov	r0, r6
 	bl	sblk_read_page
-	ldr	r3, [r4, #36]
+	ldr	r3, [r6, #36]
 	adds	r2, r3, #1
-	beq	.L3164
+	beq	.L3286
 	cmp	r3, #512
-	beq	.L3164
-	ldr	r3, [r4, #12]
+	beq	.L3286
+	ldr	r3, [r6, #12]
 	ldr	r2, [r3]
-	ldr	r3, .L3216+24
+	ldr	r3, .L3368+28
 	cmp	r2, r3
-	beq	.L3165
-.L3164:
-	mov	r0, r4
-	bl	buf_free
-	ldr	r2, [r4, #12]
-	ldr	r3, [r4, #4]
-	ldr	r0, .L3216+28
+	beq	.L3287
+.L3286:
+	mov	r0, r6
+	movs	r4, #0
+	bl	zbuf_free
+	ldr	r2, [r6, #12]
+	ldr	r3, [r6, #4]
+	ldr	r0, .L3368+32
 	ldr	r1, [r2, #12]
 	str	r1, [sp, #24]
 	ldr	r1, [r2, #8]
@@ -20232,39 +21337,43 @@ gc_recovery:
 	str	r2, [sp, #4]
 	ldr	r2, [r3, #4]
 	str	r2, [sp]
-	ldr	r2, [r4, #36]
 	ldr	r3, [r3]
-	ldr	r1, [r4, #24]
-	movs	r4, #0
+	ldr	r2, [r6, #36]
+	ldr	r1, [r6, #24]
 	bl	printf
-	ldr	r3, .L3216+32
+	ldr	r3, .L3368+36
 	ldrh	r2, [r5, #80]
 	ldr	r3, [r3]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, [r7]
-.L3215:
+	ldr	r3, [r8]
+.L3367:
 	ldrh	r2, [r5, #80]
 	strh	r2, [r3, #130]	@ movhi
-.L3166:
+.L3288:
+	ldr	r3, .L3368+36
 	ldrh	r0, [r5, #80]
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r0, lsl #1]
+	cbnz	r3, .L3323
 	bl	ftl_dump_write_open_sblk
+.L3323:
 	mov	r2, r4
 	ldrh	r1, [r5, #80]
 	movw	r4, #65535
-	ldr	r0, .L3216+36
+	ldr	r0, .L3368+40
 	bl	printf
 	strh	r4, [r5, #80]	@ movhi
 	bl	pm_flush
 	bl	ftl_ext_info_flush
-	ldr	r3, .L3216
+	ldr	r3, .L3368
 	ldr	r2, [r3]
 	ldrh	r0, [r2, #130]
 	cmp	r0, r4
 	mov	r4, r3
-	beq	.L3193
+	beq	.L3324
 	bl	ftl_free_sblk
-.L3193:
-	ldr	r3, .L3216+40
+.L3324:
+	ldr	r3, .L3368+44
 	movs	r0, #0
 	ldr	r2, [r3]
 	movw	r3, #65535
@@ -20272,340 +21381,414 @@ gc_recovery:
 	ldr	r2, [r4]
 	strh	r3, [r2, #130]	@ movhi
 	bl	ftl_info_flush
-.L3160:
+.L3281:
 	add	sp, sp, #64
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3162:
-	cmp	r2, #2
-	bne	.L3163
-	ldr	r2, .L3216+20
-	ldrh	r2, [r2]
-	add	r3, r3, r2, lsl #1
+.L3284:
+	cmp	r1, #3
+	bne	.L3285
+	ldr	r3, .L3368+48
+	ldrh	r3, [r3]
 	subs	r3, r3, #1
-	orr	r3, r3, #33554432
-	b	.L3211
-.L3165:
-	ldr	r8, .L3216+60
-	ldr	r7, .L3216+44
-	ldr	r1, [r4, #4]
-	ldrh	r3, [r8]
-	ldrb	r2, [r7]	@ zero_extendqisi2
+	add	r3, r3, r2
+	orr	r3, r3, #50331648
+	b	.L3366
+.L3287:
+	ldr	fp, .L3368+24
+	ldr	r10, .L3368+72
+	ldr	r1, [r6, #4]
+	ldrh	r3, [fp]
+	ldrb	r2, [r10]	@ zero_extendqisi2
+	ldr	r8, .L3368+64
 	muls	r2, r3, r2
-	ldr	r3, .L3216+48
+	ldr	r3, .L3368+52
 	ldr	r0, [r3]
 	lsls	r2, r2, #2
 	bl	ftl_memcpy
-	ldrh	r3, [r8]
-	ldrb	r2, [r7]	@ zero_extendqisi2
-	ldr	r1, [r4, #4]
-	muls	r2, r3, r2
-	ldr	r3, .L3216+52
-	ldr	r0, [r3]
-	lsls	r2, r2, #2
-	add	r1, r1, r2
+	ldrh	r3, [fp]
+	ldrb	r4, [r10]	@ zero_extendqisi2
+	muls	r4, r3, r4
+	ldr	r3, .L3368+56
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	lsls	r2, r4, #2
+	cmp	r3, r4, asr #6
+	bge	.L3289
+	movs	r1, #0
+	ldr	r0, [r8]
+	rsb	r4, r4, r3, lsl #7
+	bl	ftl_memset
+	ldrh	r1, [fp]
+	lsls	r4, r4, #2
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	mov	r2, r4
+	ldr	r0, [r8]
+	muls	r3, r1, r3
+	ldr	r1, [r6, #4]
+	add	r1, r1, r3, lsl #2
 	bl	ftl_memcpy
-	ldr	r3, .L3216+20
-	ldrh	fp, [r3]
-	ldrb	r3, [r6]	@ zero_extendqisi2
-	cmp	r3, #2
-	itt	eq
-	moveq	r3, #1
-	lsleq	fp, fp, #1
+	movs	r3, #1
+	str	r3, [sp, #44]
+.L3290:
+	ldr	r3, .L3368+48
+	ldrh	r3, [r3]
 	str	r3, [sp, #36]
-	movs	r3, #0
-	mov	r10, r3
+	ldrb	r3, [r7]	@ zero_extendqisi2
+	cmp	r3, #2
 	str	r3, [sp, #32]
-.L3169:
+	bne	.L3291
+	ldr	r3, .L3368+60
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L3292
+.L3291:
+	ldr	r3, .L3368+20
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L3293
+.L3292:
 	ldr	r3, [sp, #32]
-	cmp	r3, fp
-	beq	.L3178
-	mov	r8, #0
-	b	.L3179
-.L3175:
-	ldr	r3, [sp, #40]
+	ldr	r2, [sp, #36]
+	muls	r3, r2, r3
+	str	r3, [sp, #36]
+	movs	r3, #1
+	str	r3, [sp, #32]
+.L3293:
+	movs	r7, #0
+	str	r7, [sp, #40]
+.L3294:
+	ldr	r3, [sp, #36]
+	cmp	r3, r7
+	bls	.L3306
+	mov	fp, #0
+	b	.L3307
+.L3289:
+	ldr	r1, [r6, #4]
+	ldr	r0, [r8]
+	add	r1, r1, r2
+	bl	ftl_memcpy
+	movs	r3, #0
+	str	r3, [sp, #44]
+	mov	r4, r3
+	b	.L3290
+.L3302:
+	ldr	r3, [sp, #48]
 	ldrh	r2, [r3, #96]
-	ldr	r3, .L3216+16
+	ldr	r3, .L3368+12
 	ldrh	r3, [r3]
 	muls	r3, r2, r3
-	ldr	r2, .L3216+12
-	ldrb	r2, [r2]	@ zero_extendqisi2
+	ldr	r2, .L3368+16
+	ldrb	r1, [r2]	@ zero_extendqisi2
 	str	r3, [sp, #56]
-	cmp	r2, #3
-	bne	.L3170
-	ldr	r2, [sp, #32]
+	cmp	r1, #2
+	beq	.L3295
+	ldr	r2, .L3368+20
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r2, #0
+	beq	.L3296
+.L3295:
+	subs	r2, r7, #1
 	add	r3, r3, r2
-	orr	r3, r3, r7, lsl #24
-.L3213:
-	str	r3, [r4, #24]
+	add	r3, r3, r10
+	orr	r3, r3, r1, lsl #24
+.L3298:
+	str	r3, [r6, #24]
 	movs	r1, #1
-	mov	r0, r4
+	mov	r0, r6
 	bl	sblk_read_page
-	ldr	r3, .L3216+48
-	ldr	r2, [r4, #12]
+	ldr	r3, [sp, #44]
+	cbz	r3, .L3299
+	ldr	r3, .L3368+64
+	ldr	r3, [r3]
+	ldr	r2, [r3, r8]
+	cbnz	r2, .L3299
+	ldr	r2, [r6, #12]
+	ldr	r2, [r2, #8]
+	str	r2, [r3, r8]
+.L3299:
+	ldr	r3, .L3368+52
+	ldr	r2, [r6, #12]
 	ldr	r3, [r3]
 	ldr	r1, [r2, #4]
-	ldr	r3, [r3, r6]
+	ldr	r3, [r3, r8]
 	cmp	r3, r1
-	bne	.L3173
-	ldr	r0, .L3216+52
+	bne	.L3300
+	ldr	r0, .L3368+64
 	ldr	r0, [r0]
-	ldr	ip, [r0, r6]
+	ldr	ip, [r0, r8]
 	ldr	r0, [r2, #8]
 	cmp	ip, r0
-	beq	.L3174
-.L3173:
+	beq	.L3301
+.L3300:
 	ldr	r0, [r2, #12]
 	str	r0, [sp, #16]
 	ldr	r0, [r2, #8]
 	str	r1, [sp, #8]
 	str	r0, [sp, #12]
 	ldr	r2, [r2]
-	ldr	r0, .L3216+56
+	ldr	r0, .L3368+68
 	str	r2, [sp, #4]
-	ldr	r2, .L3216+52
+	ldr	r2, .L3368+64
 	ldr	r2, [r2]
-	ldr	r2, [r2, r6]
+	ldr	r2, [r2, r8]
 	str	r2, [sp]
-	ldr	r2, [r4, #36]
-	ldr	r1, [r4, #24]
+	ldr	r2, [r6, #36]
+	ldr	r1, [r6, #24]
 	bl	printf
-	ldr	r3, .L3216+48
+	ldr	r3, .L3368+52
 	ldr	r3, [r3]
-	ldr	r3, [r3, r6]
+	ldr	r3, [r3, r8]
 	adds	r3, r3, #1
-	beq	.L3174
-	mov	r0, r4
-	movs	r4, #0
-	bl	buf_free
-	ldr	r3, .L3216+32
+	beq	.L3301
+	mov	r0, r6
+	bl	zbuf_free
+	ldr	r3, .L3368+36
+	movs	r1, #0
 	ldrh	r2, [r5, #80]
 	ldr	r3, [r3]
-	strh	r4, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L3216
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	ldr	r3, .L3368
 	ldr	r3, [r3]
-	b	.L3215
-.L3170:
-	cmp	r2, #2
-	ldr	r2, [sp, #32]
-	itett	eq
-	addeq	r2, r2, #-1
-	addne	r3, r3, r2
-	addeq	r3, r3, r2
-	addeq	r3, r3, r7
+	b	.L3367
+.L3296:
+	cmp	r1, #3
+	add	r3, r3, r7
 	it	eq
-	orreq	r3, r3, #33554432
-	b	.L3213
-.L3174:
+	orreq	r3, r3, r10, lsl #24
+	b	.L3298
+.L3369:
+	.align	2
+.L3368:
+	.word	.LANCHOR10
+	.word	.LANCHOR78
+	.word	.LANCHOR153
+	.word	.LANCHOR105
+	.word	.LANCHOR73
+	.word	.LANCHOR35
+	.word	.LANCHOR79
+	.word	-178307901
+	.word	.LC199
+	.word	.LANCHOR9
+	.word	.LC201
+	.word	.LANCHOR104
+	.word	.LANCHOR87
+	.word	.LANCHOR155
+	.word	.LANCHOR125
+	.word	.LANCHOR74
+	.word	.LANCHOR156
+	.word	.LC200
+	.word	.LANCHOR80
+.L3301:
+	ldr	r3, [sp, #40]
 	add	r10, r10, #1
-	adds	r7, r7, #1
-	adds	r6, r6, #4
-.L3177:
-	ldr	r3, [sp, #36]
-	cmp	r3, r7
-	bcs	.L3175
-	add	r8, r8, #1
-.L3179:
-	ldrb	r3, [r5, #89]	@ zero_extendqisi2
-	cmp	r8, r3
-	bge	.L3176
-	add	r3, r5, r8, lsl #1
-	lsl	r6, r10, #2
+	add	r8, r8, #4
+	adds	r3, r3, #1
 	str	r3, [sp, #40]
-	movs	r7, #1
-	b	.L3177
-.L3176:
+.L3304:
 	ldr	r3, [sp, #32]
-	adds	r3, r3, #1
-	str	r3, [sp, #32]
-	b	.L3169
-.L3178:
-	mov	r0, r4
+	cmp	r3, r10
+	bcs	.L3302
+	add	fp, fp, #1
+.L3307:
+	ldrb	r3, [r5, #89]	@ zero_extendqisi2
+	cmp	fp, r3
+	bge	.L3303
+	ldr	r3, [sp, #40]
+	mov	r10, #1
+	lsl	r8, r3, #2
+	add	r3, r5, fp, lsl #1
+	str	r3, [sp, #48]
+	b	.L3304
+.L3303:
+	ldr	r3, .L3370
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L3305
+	adds	r7, r7, #1
+.L3305:
+	adds	r7, r7, #1
+	b	.L3294
+.L3306:
+	mov	r0, r6
 	movs	r4, #0
-	bl	buf_free
-	ldr	r3, .L3216+32
-	mov	r6, r4
-	ldr	r0, .L3216+60
+	bl	zbuf_free
+	ldr	r3, .L3370+4
 	mov	fp, r4
+	ldr	r0, .L3370+8
+	mov	r10, r4
 	ldrh	r1, [r5, #80]
 	ldr	r2, [r3]
 	ldrh	r0, [r0]
 	ldrb	r3, [r5, #89]	@ zero_extendqisi2
 	smulbb	r3, r3, r0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
-.L3180:
-	ldr	r3, [sp, #32]
-	cmp	r3, r6
-	beq	.L3191
-	mov	r10, #0
-	b	.L3192
-.L3217:
-	.align	2
-.L3216:
-	.word	.LANCHOR10
-	.word	.LANCHOR76
-	.word	.LANCHOR150
-	.word	.LANCHOR71
-	.word	.LANCHOR103
-	.word	.LANCHOR85
-	.word	-178307901
-	.word	.LC193
-	.word	.LANCHOR9
-	.word	.LC195
-	.word	.LANCHOR102
-	.word	.LANCHOR78
-	.word	.LANCHOR152
-	.word	.LANCHOR153
-	.word	.LC194
-	.word	.LANCHOR77
-.L3188:
-	ldr	r3, .L3218
-	ldr	r3, [r3]
-	ldr	r7, [r3, fp, lsl #2]
-	adds	r3, r7, #1
-	beq	.L3181
-	ldr	r3, .L3218+4
-	mov	r0, r7
-	ldr	r3, [r3]
-	ldr	r3, [r3, fp, lsl #2]
+.L3308:
+	ldr	r3, [sp, #36]
+	cmp	r3, fp
+	bls	.L3321
+	mov	r8, #0
+	b	.L3322
+.L3317:
+	ldr	r3, .L3370+12
+	ldr	r2, [r3]
+	ldr	r3, [r2, r10, lsl #2]
 	str	r3, [sp, #40]
+	adds	r3, r3, #1
+	beq	.L3309
+	ldr	r3, .L3370+16
+	ldr	r0, [sp, #40]
+	ldr	r2, [r3]
+	ldr	r3, [r2, r10, lsl #2]
+	str	r3, [sp, #44]
 	bl	lpa_hash_get_ppa
 	str	r0, [sp, #60]
 	adds	r0, r0, #1
-	bne	.L3182
+	bne	.L3310
 	movs	r2, #0
 	add	r1, sp, #60
-	mov	r0, r7
+	ldr	r0, [sp, #40]
 	bl	pm_log2phys
-.L3182:
+.L3310:
 	ldr	r3, [sp, #48]
+	ldr	r1, .L3370+20
 	ldrh	r2, [r3, #96]
-	ldr	r3, .L3218+8
-	ldrh	r3, [r3]
-	muls	r3, r2, r3
-	ldr	r2, .L3218+12
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cmp	r2, #3
-	bne	.L3183
-	add	r3, r3, r6
-	orr	r3, r3, r8, lsl #24
-.L3214:
-	str	r3, [sp, #56]
+	ldrh	r1, [r1]
+	muls	r2, r1, r2
+	ldr	r1, .L3370+24
+	ldrb	r0, [r1]	@ zero_extendqisi2
+	cmp	r0, #2
+	beq	.L3311
+	ldr	r1, .L3370+28
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	cmp	r1, #0
+	beq	.L3312
+.L3311:
+	add	r1, fp, #-1
+	add	r2, r2, r1
+	add	r2, r2, r7
+	orr	r2, r2, r0, lsl #24
+.L3314:
+	str	r2, [sp, #56]
+	ldr	r2, .L3370+32
+	ldr	r3, [sp, #44]
+	ldr	r1, .L3370+36
+	ldrh	r0, [r2]
+	ldr	r2, .L3370+40
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	ldrb	r6, [r2]	@ zero_extendqisi2
 	movs	r2, #1
-	ldr	r3, .L3218+16
 	str	r2, [sp, #52]
-	ldr	r1, .L3218+20
-	ldrh	r0, [r3]
-	ldrb	r1, [r1]	@ zero_extendqisi2
-	rsb	r3, r0, #21
-	lsl	r3, r2, r3
-	ldr	r2, [sp, #40]
-	subs	r3, r3, #1
-	lsr	r0, r2, r0
-	ands	r0, r0, r3
+	rsb	r6, r6, #24
+	subs	r6, r6, r0
+	lsr	r0, r3, r0
+	lsl	r6, r2, r6
+	subs	r6, r6, #1
+	ands	r0, r0, r6
 	bl	__aeabi_uidiv
-	ldr	r2, [sp, #40]
-	ldr	r3, [sp, #60]
-	str	r0, [sp, #44]
-	cmp	r2, r3
+	ldr	r1, [sp, #60]
+	mov	r6, r0
+	ldr	r3, [sp, #44]
 	ldr	r2, [sp, #52]
-	bne	.L3186
+	cmp	r3, r1
+	bne	.L3315
 	add	r1, sp, #56
-	mov	r0, r7
+	ldr	r0, [sp, #40]
 	bl	pm_log2phys
-	ldrh	r0, [sp, #44]
+	uxth	r0, r6
 	adds	r4, r4, #1
 	bl	ftl_vpn_decrement
-.L3187:
-	ldr	r3, .L3218+24
-	add	fp, fp, #1
-	ldrh	r7, [sp, #44]
-	ldr	r3, [r3]
-	add	r3, r3, r7, lsl #2
-	ldrb	r3, [r3, #2]	@ zero_extendqisi2
-	ands	r3, r3, #224
-	bne	.L3181
-	ldr	r2, .L3218+28
+.L3316:
+	ldr	r2, .L3370+44
+	uxth	r6, r6
+	add	r10, r10, #1
 	ldr	r2, [r2]
-	ldrh	r1, [r2, r7, lsl #1]
-	cbz	r1, .L3181
-	strh	r3, [r2, r7, lsl #1]	@ movhi
-.L3181:
+	add	r2, r2, r6, lsl #2
+	ldrb	r2, [r2, #2]	@ zero_extendqisi2
+	ands	r2, r2, #224
+	bne	.L3309
+	ldr	r1, .L3370+4
+	ldr	r1, [r1]
+	ldrh	r0, [r1, r6, lsl #1]
+	cbz	r0, .L3309
+	strh	r2, [r1, r6, lsl #1]	@ movhi
+.L3309:
+	adds	r7, r7, #1
+.L3319:
+	ldr	r3, [sp, #32]
+	cmp	r3, r7
+	bcs	.L3317
 	add	r8, r8, #1
-.L3190:
-	ldr	r3, [sp, #36]
-	cmp	r3, r8
-	bcs	.L3188
-	add	r10, r10, #1
-.L3192:
-	ldrb	r3, [r5, #89]	@ zero_extendqisi2
-	cmp	r10, r3
-	bge	.L3189
-	add	r3, r5, r10, lsl #1
-	mov	r8, #1
+.L3322:
+	ldrb	r2, [r5, #89]	@ zero_extendqisi2
+	cmp	r8, r2
+	bge	.L3318
+	add	r3, r5, r8, lsl #1
+	movs	r7, #1
 	str	r3, [sp, #48]
-	b	.L3190
-.L3183:
-	cmp	r2, #2
-	itett	eq
-	addeq	r2, r6, #-1
-	addne	r3, r3, r6
-	addeq	r3, r3, r2
-	addeq	r3, r3, r8
+	b	.L3319
+.L3312:
+	cmp	r0, #3
+	add	r2, r2, fp
 	it	eq
-	orreq	r3, r3, #33554432
-	b	.L3214
-.L3186:
+	orreq	r2, r2, r7, lsl #24
+	b	.L3314
+.L3315:
 	ldr	r2, [sp, #56]
-	cmp	r3, r2
+	cmp	r1, r2
 	it	eq
 	addeq	r4, r4, #1
-	b	.L3187
-.L3189:
-	adds	r6, r6, #1
-	b	.L3180
-.L3191:
-	ldr	r3, .L3218+28
+	b	.L3316
+.L3318:
+	ldr	r2, .L3370
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbz	r2, .L3320
+	add	fp, fp, #1
+.L3320:
+	add	fp, fp, #1
+	b	.L3308
+.L3321:
+	ldr	r3, .L3370+4
 	ldrh	r2, [r5, #80]
 	ldr	r3, [r3]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
 	ldrh	r0, [r5, #80]
 	bl	zftl_insert_data_list
-	b	.L3166
-.L3161:
+	b	.L3288
+.L3282:
 	ldrh	r3, [r5, #130]
 	cmp	r3, r6
-	beq	.L3160
-	ldr	r5, .L3218+32
+	beq	.L3281
+	ldr	r5, .L3370+48
 	ldr	r2, [r5]
 	ldrh	r2, [r2, #126]
 	cmp	r2, r3
-	bne	.L3195
+	bne	.L3326
 	bl	pm_flush
-	ldr	r3, [r7]
+	ldr	r3, [r8]
 	ldrh	r0, [r3, #130]
 	bl	ftl_free_sblk
 	ldr	r3, [r5]
 	mov	r0, r4
 	strh	r6, [r3, #126]	@ movhi
 	bl	ftl_info_flush
-.L3195:
-	ldr	r3, [r7]
+.L3326:
+	ldr	r3, [r8]
 	movw	r2, #65535
 	strh	r2, [r3, #130]	@ movhi
-	b	.L3160
-.L3219:
+	b	.L3281
+.L3371:
 	.align	2
-.L3218:
-	.word	.LANCHOR152
-	.word	.LANCHOR153
-	.word	.LANCHOR103
-	.word	.LANCHOR71
-	.word	.LANCHOR66
-	.word	.LANCHOR67
-	.word	.LANCHOR7
+.L3370:
+	.word	.LANCHOR74
 	.word	.LANCHOR9
-	.word	.LANCHOR102
+	.word	.LANCHOR79
+	.word	.LANCHOR155
+	.word	.LANCHOR156
+	.word	.LANCHOR105
+	.word	.LANCHOR73
+	.word	.LANCHOR35
+	.word	.LANCHOR68
+	.word	.LANCHOR69
+	.word	.LANCHOR31
+	.word	.LANCHOR7
+	.word	.LANCHOR104
 	.size	gc_recovery, .-gc_recovery
 	.section	.text.zftl_init,"ax",%progbits
 	.align	1
@@ -20616,453 +21799,470 @@ gc_recovery:
 	.fpu softvfp
 	.type	zftl_init, %function
 zftl_init:
-	@ args = 0, pretend = 0, frame = 24
+	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L3285
+	ldr	r2, .L3442
 	movs	r3, #255
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r5, #0
-	ldr	r6, .L3285+4
-	sub	sp, sp, #24
+	movs	r4, #0
+	ldr	r10, .L3442+204
+	sub	sp, sp, #32
 	strb	r3, [r2]
-	ldr	r2, .L3285+8
-	ldr	r1, .L3285+12
-	ldr	r0, .L3285+16
-	strb	r5, [r2]
-	ldr	r2, .L3285+20
+	ldr	r2, .L3442+4
+	ldr	r1, .L3442+8
+	ldr	r0, .L3442+12
+	strb	r4, [r2]
+	ldr	r2, .L3442+16
+	ldr	r7, .L3442+20
 	strb	r3, [r2]
-	ldr	r2, .L3285+24
-	strb	r5, [r2]
-	ldr	r2, .L3285+28
+	ldr	r2, .L3442+24
+	strb	r4, [r2]
+	ldr	r2, .L3442+28
 	strb	r3, [r2]
 	mov	r2, #-1
-	ldr	r3, .L3285+32
-	strb	r5, [r3]
-	ldr	r3, .L3285+36
+	ldr	r3, .L3442+32
+	strb	r4, [r3]
+	ldr	r3, .L3442+36
 	str	r2, [r3]
 	bl	printf
-	ldrb	r3, [r6, #12]	@ zero_extendqisi2
-	ldrb	r8, [r6, #9]	@ zero_extendqisi2
-	ldrh	r10, [r6, #10]
-	str	r3, [sp]
-	ldr	r3, .L3285+40
-	ldrb	r2, [sp]	@ zero_extendqisi2
-	mov	r0, r10
-	ldr	r1, [sp]
+	ldrb	r3, [r10, #12]	@ zero_extendqisi2
+	ldrb	r6, [r10, #9]	@ zero_extendqisi2
+	ldrh	r5, [r10, #10]
+	str	r3, [sp, #4]
+	ldr	r3, .L3442+40
+	ldrb	r2, [sp, #4]	@ zero_extendqisi2
+	mov	r0, r5
+	ldr	r1, [sp, #4]
+	lsl	fp, r6, #9
 	strb	r2, [r3]
-	ldr	r3, .L3285+44
-	strb	r8, [r3]
-	ldr	r3, .L3285+48
-	strh	r10, [r3]	@ movhi
+	uxth	fp, fp
+	ldr	r3, .L3442+44
+	strb	r6, [r3]
+	ldr	r3, .L3442+48
+	strh	r5, [r3]	@ movhi
 	bl	__aeabi_idiv
-	ldr	r3, .L3285+52
-	mov	r7, r0
-	ldrb	r1, [r6, #13]	@ zero_extendqisi2
-	ldrh	fp, [r6, #14]
-	lsl	r6, r8, #9
-	ldrb	r4, [r3]	@ zero_extendqisi2
-	ldr	r3, .L3285+56
-	uxth	r6, r6
-	ldr	ip, .L3285+216
-	ldr	r0, .L3285+60
-	strb	r4, [r3]
-	smulbb	r4, r4, r1
-	ldr	r3, .L3285+64
-	ldr	r2, .L3285+68
-	uxtb	r4, r4
-	strh	r7, [r0]	@ movhi
-	strb	r1, [r3]
-	ldr	r3, .L3285+72
-	ldr	r1, .L3285+76
+	ldr	r2, .L3442+52
+	mov	r3, r0
+	ldrb	r1, [r10, #13]	@ zero_extendqisi2
+	ldr	ip, .L3442+208
+	ldrb	r8, [r2]	@ zero_extendqisi2
+	ldr	r2, .L3442+56
+	strh	r0, [r7]	@ movhi
+	ldrh	r10, [r10, #14]
+	strb	r8, [r2]
+	smulbb	r8, r8, r1
+	ldr	r2, .L3442+60
+	ldr	r0, .L3442+64
+	uxtb	r8, r8
+	str	r7, [sp, #12]
+	strb	r1, [r2]
+	ldr	r2, .L3442+68
+	ldr	r1, .L3442+72
+	strb	r8, [r0]
 	strh	fp, [r2]	@ movhi
-	strh	r6, [r3]	@ movhi
-	ldr	r3, .L3285+80
-	strb	r4, [r1]
-	str	r0, [sp, #4]
-	ldrh	r3, [r3]
-	str	r1, [sp, #8]
-	str	r2, [sp, #12]
-	strh	r3, [ip]	@ movhi
+	ldr	r2, .L3442+76
+	strh	r10, [r1]	@ movhi
+	str	r0, [sp, #16]
+	ldrh	r2, [r2]
+	str	r1, [sp, #20]
+	strh	r2, [ip]	@ movhi
 	mov	ip, #1
-.L3221:
-	cmp	r3, ip
-	uxth	r2, r5
+.L3373:
+	cmp	r2, ip
+	uxth	r1, r4
+	add	r4, r4, #1
+	bcs	.L3374
+	subs	r2, r1, #1
+	ldr	r1, .L3442+80
+	movs	r4, #1
+	strh	r2, [r1]	@ movhi
+	mul	r2, r5, r6
+	movs	r5, #0
+	mul	r0, r10, r2
+	lsrs	r7, r0, #21
+.L3375:
+	cmp	r7, r4
+	uxth	r1, r5
 	add	r5, r5, #1
-	bcs	.L3222
-	mul	r10, r10, r8
-	subs	r3, r2, #1
-	ldr	r2, .L3285+84
-	movs	r0, #0
-	movs	r1, #1
-	strh	r3, [r2]	@ movhi
-	mul	r2, fp, r10
-	lsrs	r5, r2, #21
-.L3223:
-	cmp	r5, r1
-	uxth	r3, r0
-	add	r0, r0, #1
-	bcs	.L3224
-	mov	r5, #1892352
-	subs	r3, r3, #1
-	mul	r1, r5, r4
-	uxth	r3, r3
-	muls	r2, r4, r2
-	lsl	r5, r1, r3
-	ldr	r3, .L3285+88
-	mov	r1, r8
-	ldr	r8, .L3285+220
-	str	r5, [r3]
-	ldr	r3, .L3285+92
-	str	r2, [r3]
-	add	r2, r5, #24576
-	str	r3, [sp, #20]
-	mov	r0, r2
-	ldr	r3, .L3285+96
-	str	r2, [sp, #16]
-	str	r2, [r3]
-	bl	__aeabi_uidiv
-	ldr	r3, .L3285+100
-	add	ip, r6, #-1
+	bcs	.L3376
+	mov	r4, #1892352
+	subs	r1, r1, #1
+	mul	r4, r4, r8
+	uxth	r1, r1
+	str	r3, [sp, #24]
+	mul	r0, r8, r0
+	ldr	r7, .L3442+84
+	ldr	r5, .L3442+88
+	lsl	r3, r4, r1
+	ldr	r1, .L3442+92
+	str	r2, [sp, #28]
+	add	r4, r3, #24576
+	str	r0, [r7]
+	str	r3, [r1]
 	mov	r1, r6
-	ldr	r6, .L3285+104
-	str	r0, [r3]
+	ldr	r6, .L3442+96
+	mov	r0, r4
+	str	r4, [r5]
+	str	r3, [sp, #8]
+	bl	__aeabi_uidiv
+	add	ip, fp, #-1
+	mov	r1, fp
+	str	r0, [r6]
 	add	r0, ip, r0, lsl #2
+	ldr	fp, .L3442+156
 	bl	__aeabi_uidiv
-	strh	r0, [r6]	@ movhi
+	ldr	r3, [sp, #24]
+	strh	r0, [fp]	@ movhi
 	uxth	r0, r0
-	mul	r1, r4, r7
-	ldr	r7, .L3285+108
 	lsls	r0, r0, #4
+	mul	r1, r8, r3
 	bl	__aeabi_idiv
-	mul	r1, r4, r10
-	ldr	r2, [sp, #16]
-	strh	r0, [r8]	@ movhi
-	mov	r4, #256
-	ldr	r10, .L3285+100
-	mov	r0, r2
+	ldr	r2, [sp, #28]
+	ldr	r3, .L3442+100
+	mul	r1, r8, r2
+	strh	r0, [r3]	@ movhi
+	mov	r0, r4
 	subs	r1, r1, #1
 	bl	__aeabi_uidiv
-	add	r2, fp, fp, lsl #1
-	ldr	r1, .L3285+112
-	lsr	fp, fp, #4
+	ldr	r3, .L3442+104
 	adds	r0, r0, #8
-	asrs	r2, r2, #2
-	strh	r0, [r7]	@ movhi
-	cmp	fp, #79
-	ldr	r0, .L3285+116
-	strh	r2, [r1]	@ movhi
+	ldr	r2, .L3442+108
+	movs	r1, #48
+	ldr	ip, .L3442+212
+	strh	r0, [r3]	@ movhi
+	add	r3, r10, r10, lsl #1
+	lsr	r10, r10, #4
+	ldr	r0, .L3442+112
+	asrs	r3, r3, #2
+	ldr	r4, [sp, #4]
+	cmp	r10, #79
+	ldr	lr, .L3442+128
+	strh	r3, [r2]	@ movhi
 	it	ls
-	movls	r1, #80
-	ldr	r2, .L3285+120
-	mov	ip, #32
-	ldr	r3, [sp, #20]
-	strh	fp, [r2]	@ movhi
+	movls	r2, #80
+	ldr	r3, .L3442+116
+	str	fp, [sp, #24]
+	strh	r10, [r3]	@ movhi
+	mov	r10, r0
 	it	ls
-	strhls	r1, [r2]	@ movhi
-	mov	r1, #2000
-	ldr	r2, .L3285+124
-	ldr	fp, .L3285+96
-	strh	r1, [r2]	@ movhi
-	movs	r1, #50
-	strh	r1, [r0]	@ movhi
-	ldr	r1, .L3285+128
-	strh	r4, [r1]	@ movhi
-	movs	r4, #48
-	ldr	r1, .L3285+132
-	strh	r4, [r1]	@ movhi
-	ldr	r4, .L3285+136
-	strh	ip, [r4]	@ movhi
-	ldr	r4, [sp]
+	strhls	r2, [r3]	@ movhi
+	mov	r3, #2000
+	strh	r3, [ip]	@ movhi
+	movs	r3, #50
+	strh	r3, [r0]	@ movhi
+	mov	r2, #256
+	ldr	r3, .L3442+120
 	cmp	r4, #2
-	beq	.L3226
-	ldr	r4, .L3285+140
-	ldrb	r4, [r4]	@ zero_extendqisi2
-	cbz	r4, .L3227
-.L3226:
-	movs	r4, #150
-	strh	r4, [r0]	@ movhi
-	movs	r0, #64
-	strh	r0, [r1]	@ movhi
-	movs	r0, #12
-	ldr	r1, .L3285+136
-	strh	r0, [r1]	@ movhi
-	ldr	r0, .L3285+144
-	ldrb	r0, [r0]	@ zero_extendqisi2
-	cbnz	r0, .L3227
-	movs	r0, #4
-	strh	r0, [r1]	@ movhi
-	mov	r1, #600
+	strh	r2, [r3]	@ movhi
+	ldr	r2, .L3442+124
 	strh	r1, [r2]	@ movhi
-	movs	r1, #128
-	ldr	r2, .L3285+128
+	mov	r1, #32
+	strh	r1, [lr]	@ movhi
+	mov	r8, r2
+	mov	lr, ip
+	beq	.L3378
+	ldr	fp, .L3442+216
+	ldrb	fp, [fp]	@ zero_extendqisi2
+	cmp	fp, #0
+	beq	.L3379
+.L3378:
+	movs	r2, #150
+	movs	r1, #12
+	strh	r2, [r10]	@ movhi
+	movs	r2, #64
+	strh	r2, [r8]	@ movhi
+	ldr	r2, .L3442+128
 	strh	r1, [r2]	@ movhi
-.L3227:
-	ldr	r4, .L3285+148
-	ldr	r2, [r4]
-	lsls	r1, r2, #19
-	bpl	.L3229
-	mov	r1, r5
-	ldr	r0, .L3285+152
-	str	r3, [sp]
+	ldr	r1, .L3442+132
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	cbnz	r1, .L3381
+	movs	r1, #4
+	strh	r1, [r2]	@ movhi
+	mov	r2, #600
+	strh	r2, [lr]	@ movhi
+	movs	r2, #128
+	strh	r2, [r3]	@ movhi
+.L3381:
+	ldr	r3, .L3442+136
+	ldr	r2, [r3]
+	mov	r8, r3
+	tst	r2, #4096
+	beq	.L3383
+	ldr	r1, [sp, #8]
+	ldr	r0, .L3442+140
 	bl	printf
-	ldr	r3, [sp]
-.L3229:
-	ldr	r2, [r4]
-	lsls	r2, r2, #19
-	bpl	.L3230
-	ldr	r1, [r3]
-	ldr	r0, .L3285+156
+.L3383:
+	ldr	r3, [r8]
+	lsls	r0, r3, #19
+	bpl	.L3384
+	ldr	r1, [r7]
+	ldr	r0, .L3442+144
 	bl	printf
-.L3230:
-	ldr	r3, [r4]
-	lsls	r3, r3, #19
-	bpl	.L3231
-	ldr	r1, [r10]
-	ldr	r0, .L3285+160
+.L3384:
+	ldr	r3, [r8]
+	lsls	r1, r3, #19
+	bpl	.L3385
+	ldr	r1, [r6]
+	ldr	r0, .L3442+148
 	bl	printf
-.L3231:
-	ldr	r3, [r4]
-	lsls	r5, r3, #19
-	bpl	.L3232
-	ldr	r1, [fp]
-	ldr	r0, .L3285+164
+.L3385:
+	ldr	r3, [r8]
+	lsls	r2, r3, #19
+	bpl	.L3386
+	ldr	r1, [r5]
+	ldr	r0, .L3442+152
 	bl	printf
-.L3232:
-	ldr	r3, [r4]
-	lsls	r0, r3, #19
-	bpl	.L3233
-	ldrh	r1, [r6]
-	ldr	r0, .L3285+168
+.L3386:
+	ldr	r3, [r8]
+	lsls	r3, r3, #19
+	bpl	.L3387
+	ldr	r3, .L3442+156
+	ldr	r0, .L3442+160
+	ldrh	r1, [r3]
 	bl	printf
-.L3233:
-	ldr	r3, [r4]
-	ldr	r5, .L3285+72
+.L3387:
+	ldr	r3, [r8]
+	ldr	r6, .L3442+68
 	tst	r3, #4096
-	beq	.L3234
-	ldrh	r1, [r5]
-	ldr	r0, .L3285+172
+	beq	.L3388
+	ldrh	r1, [r6]
+	ldr	r0, .L3442+164
 	bl	printf
-.L3234:
-	ldr	r3, [r4]
-	lsls	r1, r3, #19
-	bpl	.L3235
-	ldrh	r1, [r8]
-	ldr	r0, .L3285+176
+.L3388:
+	ldr	r3, [r8]
+	lsls	r7, r3, #19
+	bpl	.L3389
+	ldr	r3, .L3442+100
+	ldr	r0, .L3442+168
+	ldrh	r1, [r3]
 	bl	printf
-.L3235:
-	ldr	r3, [r4]
-	lsls	r2, r3, #19
-	bpl	.L3236
-	ldr	r3, .L3285+120
-	ldr	r0, .L3285+180
+.L3389:
+	ldr	r3, [r8]
+	lsls	r5, r3, #19
+	bpl	.L3390
+	ldr	r3, .L3442+116
+	ldr	r0, .L3442+172
 	ldrh	r1, [r3]
 	bl	printf
-.L3236:
-	ldr	r3, [r4]
-	lsls	r3, r3, #19
-	bpl	.L3237
-	ldrh	r1, [r7]
-	ldr	r0, .L3285+184
+.L3390:
+	ldr	r3, [r8]
+	lsls	r4, r3, #19
+	bpl	.L3391
+	ldr	r3, .L3442+104
+	ldr	r0, .L3442+176
+	ldrh	r1, [r3]
 	bl	printf
-.L3237:
-	bl	buf_init
-	ldr	r3, [sp, #12]
+.L3391:
+	bl	zbuf_init
+	ldr	r3, [sp, #20]
 	movs	r0, #6
-	ldr	r7, .L3285+188
+	ldr	r5, .L3442+180
 	ldrh	r3, [r3]
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L3285+192
-	ldr	r2, [sp, #8]
+	ldr	r3, .L3442+184
+	ldr	r2, [sp, #16]
 	str	r0, [r3]
-	ldr	r3, [sp, #4]
+	ldr	r3, [sp, #12]
 	ldrb	r0, [r2]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	muls	r0, r3, r0
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L3285+196
-	ldr	r2, .L3285+200
+	ldr	r3, .L3442+188
+	ldr	r2, .L3442+192
 	str	r0, [r3]
-	ldr	r3, .L3285+204
+	ldr	r3, .L3442+196
 	str	r2, [r3]
-	ldr	r3, [sp, #4]
+	ldr	r3, [sp, #12]
 	ldrh	r0, [r3]
-	ldr	r3, [sp, #8]
+	ldr	r3, [sp, #16]
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	muls	r0, r1, r0
-	ldr	r1, .L3285+208
+	ldr	r1, .L3442+200
 	add	r3, r2, r0, lsl #3
 	str	r3, [r1]
-	ldr	r1, [sp, #12]
+	ldr	r1, [sp, #20]
 	ldrh	r1, [r1]
 	lsrs	r1, r1, #1
 	add	r1, r1, r0, lsl #1
-	ldr	r0, [r4]
+	ldr	r0, [r8]
 	add	r1, r2, r1, lsl #2
 	lsls	r0, r0, #19
-	str	r1, [r7]
-	bpl	.L3238
-	ldr	r0, .L3285+212
-	bl	printf
-	b	.L3286
-.L3287:
+	str	r1, [r5]
+	bpl	.L3392
+	b	.L3443
+.L3444:
 	.align	2
-.L3285:
-	.word	.LANCHOR57
-	.word	.LANCHOR31
-	.word	.LANCHOR58
-	.word	.LC196
-	.word	.LC97
-	.word	.LANCHOR126
-	.word	.LANCHOR127
-	.word	.LANCHOR174
-	.word	.LANCHOR121
-	.word	.LANCHOR206
-	.word	.LANCHOR71
+.L3442:
+	.word	.LANCHOR59
+	.word	.LANCHOR60
+	.word	.LC202
+	.word	.LC99
+	.word	.LANCHOR128
+	.word	.LANCHOR87
+	.word	.LANCHOR129
+	.word	.LANCHOR177
 	.word	.LANCHOR123
-	.word	.LANCHOR77
+	.word	.LANCHOR211
+	.word	.LANCHOR73
+	.word	.LANCHOR125
+	.word	.LANCHOR79
 	.word	.LANCHOR18
-	.word	.LANCHOR104
-	.word	.LANCHOR85
-	.word	.LANCHOR67
+	.word	.LANCHOR106
+	.word	.LANCHOR69
+	.word	.LANCHOR80
+	.word	.LANCHOR208
 	.word	.LANCHOR6
-	.word	.LANCHOR203
-	.word	.LANCHOR78
 	.word	.LANCHOR2
-	.word	.LANCHOR66
-	.word	.LANCHOR59
-	.word	.LANCHOR207
-	.word	.LANCHOR208
-	.word	.LANCHOR120
-	.word	.LANCHOR187
-	.word	.LANCHOR93
-	.word	.LANCHOR117
-	.word	.LANCHOR116
-	.word	.LANCHOR89
+	.word	.LANCHOR68
+	.word	.LANCHOR212
+	.word	.LANCHOR213
+	.word	.LANCHOR61
+	.word	.LANCHOR122
+	.word	.LANCHOR149
+	.word	.LANCHOR95
+	.word	.LANCHOR119
 	.word	.LANCHOR118
-	.word	.LANCHOR145
-	.word	.LANCHOR144
+	.word	.LANCHOR91
+	.word	.LANCHOR148
+	.word	.LANCHOR147
 	.word	.LANCHOR8
-	.word	.LANCHOR75
 	.word	.LANCHOR0
 	.word	.LANCHOR14
-	.word	.LC197
-	.word	.LC198
-	.word	.LC199
-	.word	.LC200
-	.word	.LC201
-	.word	.LC202
 	.word	.LC203
 	.word	.LC204
 	.word	.LC205
+	.word	.LC206
+	.word	.LANCHOR194
+	.word	.LC207
+	.word	.LC208
+	.word	.LC209
+	.word	.LC210
+	.word	.LC211
 	.word	.LANCHOR10
 	.word	.LANCHOR4
-	.word	.LANCHOR110
+	.word	.LANCHOR112
 	.word	ftl_ext_info_data_buffer
-	.word	.LANCHOR109
+	.word	.LANCHOR111
 	.word	.LANCHOR9
-	.word	.LC206
-	.word	.LANCHOR103
-	.word	.LANCHOR146
-.L3286:
-.L3238:
-	ldr	r2, [sp, #4]
-	ldr	r1, [sp, #8]
-	ldr	r3, [sp, #12]
+	.word	.LANCHOR32
+	.word	.LANCHOR105
+	.word	.LANCHOR120
+	.word	.LANCHOR77
+.L3443:
+	ldr	r0, .L3445
+	bl	printf
+.L3392:
+	ldr	r2, [sp, #12]
+	ldr	r1, [sp, #16]
+	ldr	r3, [sp, #20]
 	ldrh	r2, [r2]
-	ldrb	r8, [r1]	@ zero_extendqisi2
+	ldrb	r7, [r1]	@ zero_extendqisi2
 	ldrh	r3, [r3]
-	mul	r8, r8, r2
-	ldrh	r2, [r6]
-	lsls	r6, r3, #2
-	add	r8, r3, r8, lsl #2
-	ldr	r3, [r4]
-	add	r6, r6, r2, lsl #2
-	lsl	r8, r8, #1
+	muls	r7, r2, r7
+	ldr	r2, [sp, #24]
+	lsls	r4, r3, #2
+	ldrh	r2, [r2]
+	add	r7, r3, r7, lsl #2
+	ldr	r3, [r8]
+	lsls	r7, r7, #1
+	add	r4, r4, r2, lsl #2
 	lsls	r2, r3, #19
-	add	r8, r8, #632
-	add	r6, r6, #704
-	bpl	.L3239
-	ldrh	r3, [r5]
-	mov	r2, r6
-	mov	r1, r8
-	ldr	r0, .L3288
+	add	r7, r7, #632
+	add	r4, r4, #704
+	bpl	.L3393
+	ldrh	r3, [r6]
+	mov	r2, r4
+	mov	r1, r7
+	ldr	r0, .L3445+4
 	bl	printf
-.L3239:
-	ldrh	r3, [r5]
-	cmp	r8, r3
-	bhi	.L3240
-	cmp	r6, r3
-	bls	.L3241
-.L3240:
-.L3284:
-	b	.L3284
-.L3222:
+.L3393:
+	ldrh	r3, [r6]
+	cmp	r7, r3
+	bhi	.L3394
+	cmp	r4, r3
+	bls	.L3395
+.L3394:
+.L3441:
+	b	.L3441
+.L3374:
 	lsl	ip, ip, #1
-	b	.L3221
-.L3224:
-	lsls	r1, r1, #1
-	b	.L3223
-.L3241:
+	b	.L3373
+.L3376:
+	lsls	r4, r4, #1
+	b	.L3375
+.L3379:
+	ldr	r3, .L3445+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L3381
+	mov	r3, #1200
+	strh	r1, [r0]	@ movhi
+	strh	r3, [ip]	@ movhi
+	strh	r1, [r2]	@ movhi
+	b	.L3381
+.L3395:
 	bl	sblk_init
 	bl	ftl_info_blk_init
 	adds	r3, r0, #1
-	beq	.L3220
+	beq	.L3372
 	bl	ftl_ext_info_init
 	bl	gc_init
 	movs	r0, #1
-	ldr	r4, .L3288+4
+	ldr	r4, .L3445+12
 	bl	pm_init
 	bl	lpa_rebuild_hash
-	ldr	r0, [r7]
+	ldr	r0, [r5]
 	movs	r1, #0
 	adds	r0, r0, #16
 	bl	ftl_open_sblk_recovery
-	ldr	r0, [r7]
+	ldr	r0, [r5]
 	add	r1, r0, #16
 	adds	r0, r0, #48
 	bl	ftl_open_sblk_recovery
 	ldr	r2, [r4]
-	ldr	r0, [r7]
+	ldr	r0, [r5]
 	ldr	r3, [r2, #8]
 	adds	r0, r0, #16
 	adds	r3, r3, #16
 	str	r3, [r2, #8]
 	bl	ftl_info_data_recovery
-	ldr	r0, [r7]
+	ldr	r0, [r5]
 	adds	r0, r0, #48
 	bl	ftl_info_data_recovery
-	ldr	r0, [r7]
+	ldr	r0, [r5]
 	adds	r0, r0, #80
 	bl	ftl_info_data_recovery
 	bl	gc_recovery
 	bl	pm_flush
 	movs	r0, #1
 	bl	ftl_total_vpn_update
-	ldr	r3, .L3288+8
+	ldr	r3, .L3445+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L3243
+	cbz	r3, .L3397
 	ldr	r2, [r4]
 	ldr	r3, [r2, #68]
 	adds	r3, r3, #1
 	str	r3, [r2, #68]
-.L3243:
+.L3397:
 	bl	ftl_ext_info_flush
 	movs	r0, #0
 	bl	ftl_info_flush
 	bl	print_ftl_debug_info
 	movs	r0, #0
-.L3220:
-	add	sp, sp, #24
+.L3372:
+	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3289:
+.L3446:
 	.align	2
-.L3288:
-	.word	.LC207
-	.word	.LANCHOR102
-	.word	.LANCHOR182
+.L3445:
+	.word	.LC212
+	.word	.LC213
+	.word	.LANCHOR35
+	.word	.LANCHOR104
+	.word	.LANCHOR185
 	.size	zftl_init, .-zftl_init
 	.section	.text.rk_ftl_init,"ax",%progbits
 	.align	1
@@ -21078,20 +22278,20 @@ rk_ftl_init:
 	push	{r4, lr}
 	bl	nand_flash_init
 	mov	r4, r0
-	cbnz	r0, .L3291
+	cbnz	r0, .L3448
 	bl	zftl_init
 	mov	r4, r0
-.L3291:
+.L3448:
 	bl	idb_init
 	mov	r1, r4
-	ldr	r0, .L3292
+	ldr	r0, .L3449
 	bl	printf
 	mov	r0, r4
 	pop	{r4, pc}
-.L3293:
+.L3450:
 	.align	2
-.L3292:
-	.word	.LC208
+.L3449:
+	.word	.LC214
 	.size	rk_ftl_init, .-rk_ftl_init
 	.section	.text.gc_update_l2p_map_new,"ax",%progbits
 	.align	1
@@ -21104,25 +22304,25 @@ rk_ftl_init:
 gc_update_l2p_map_new:
 	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L3328
+	ldr	r3, .L3485
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #32
-	ldr	r2, .L3328+4
+	ldr	r2, .L3485+4
 	ldr	r4, [r3]
 	ldrh	r2, [r2]
-	ldr	r7, .L3328+8
+	ldr	r7, .L3485+8
 	ldrb	r1, [r4, #89]	@ zero_extendqisi2
 	str	r3, [sp, #20]
 	muls	r2, r1, r2
 	str	r2, [sp, #4]
 	ldr	r2, [r7]
 	tst	r2, #256
-	beq	.L3295
+	beq	.L3452
 	ldrh	r1, [r4, #80]
-	ldr	r0, .L3328+12
+	ldr	r0, .L3485+12
 	bl	printf
-.L3295:
-	ldr	r3, .L3328+16
+.L3452:
+	ldr	r3, .L3485+16
 	movs	r6, #0
 	ldr	r1, [sp, #4]
 	mov	r5, r6
@@ -21130,14 +22330,14 @@ gc_update_l2p_map_new:
 	ldr	r3, [r3]
 	subs	r1, r1, #1
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-.L3296:
+.L3453:
 	ldr	r3, [sp, #4]
 	cmp	r5, r3
-	bne	.L3305
+	bne	.L3462
 	ldr	r3, [r7]
-	ldr	r5, .L3328+16
+	ldr	r5, .L3485+16
 	tst	r3, #256
-	beq	.L3306
+	beq	.L3463
 	ldr	r3, [sp, #20]
 	ldrh	r0, [r4, #80]
 	ldr	r2, [r5]
@@ -21145,19 +22345,19 @@ gc_update_l2p_map_new:
 	mov	r3, r6
 	ldrh	r2, [r2, r0, lsl #1]
 	ldrh	r1, [r1, #80]
-	ldr	r0, .L3328+20
+	ldr	r0, .L3485+20
 	bl	printf
-.L3306:
+.L3463:
 	ldrh	r2, [r4, #80]
 	ldr	r3, [r5]
 	ldrh	r3, [r3, r2, lsl #1]
 	cmp	r6, r3
-	beq	.L3307
-	mov	r2, #616
-	ldr	r1, .L3328+24
-	ldr	r0, .L3328+28
+	beq	.L3464
+	mov	r2, #748
+	ldr	r1, .L3485+24
+	ldr	r0, .L3485+28
 	bl	printf
-.L3307:
+.L3464:
 	ldrh	r2, [r4, #80]
 	ldr	r3, [r5]
 	strh	r6, [r3, r2, lsl #1]	@ movhi
@@ -21166,14 +22366,14 @@ gc_update_l2p_map_new:
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3305:
-	ldr	r3, .L3328+32
+.L3462:
+	ldr	r3, .L3485+32
 	lsl	r8, r5, #2
 	ldr	r3, [r3]
 	ldr	r10, [r3, r5, lsl #2]
 	cmp	r10, #-1
-	beq	.L3297
-	ldr	r3, .L3328+36
+	beq	.L3454
+	ldr	r3, .L3485+36
 	mov	r0, r10
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	lsls	r1, r1, #7
@@ -21182,21 +22382,21 @@ gc_update_l2p_map_new:
 	str	r3, [sp, #16]
 	ldr	r3, [r7]
 	lsls	r1, r3, #23
-	bpl	.L3298
+	bpl	.L3455
 	mov	r3, r5
 	mov	r2, r10
 	ldr	r1, [sp, #16]
-	ldr	r0, .L3328+40
+	ldr	r0, .L3485+40
 	bl	printf
-.L3298:
-	ldr	fp, .L3328+32
+.L3455:
+	ldr	fp, .L3485+32
 	str	r5, [sp, #12]
-.L3304:
+.L3461:
 	ldr	r3, [fp]
 	ldr	r10, [r3, r8]
 	cmp	r10, #-1
-	beq	.L3299
-	ldr	r3, .L3328+36
+	beq	.L3456
+	ldr	r3, .L3485+36
 	mov	r0, r10
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	lsls	r1, r1, #7
@@ -21204,8 +22404,8 @@ gc_update_l2p_map_new:
 	ldr	r3, [sp, #16]
 	uxth	r0, r0
 	cmp	r3, r0
-	bne	.L3299
-	ldr	r3, .L3328+44
+	bne	.L3456
+	ldr	r3, .L3485+44
 	mov	r0, r10
 	ldr	r3, [r3]
 	ldr	r3, [r3, r8]
@@ -21213,17 +22413,17 @@ gc_update_l2p_map_new:
 	bl	lpa_hash_get_ppa
 	str	r0, [sp, #28]
 	adds	r0, r0, #1
-	bne	.L3300
+	bne	.L3457
 	movs	r2, #0
 	add	r1, sp, #28
 	mov	r0, r10
 	bl	pm_log2phys
-.L3300:
+.L3457:
 	ldr	r3, [sp, #28]
 	ldr	r2, [sp, #8]
 	cmp	r2, r3
-	bne	.L3301
-	ldr	r3, .L3328+48
+	bne	.L3458
+	ldr	r3, .L3485+48
 	add	r1, sp, #32
 	movs	r2, #1
 	mov	r0, r10
@@ -21232,26 +22432,28 @@ gc_update_l2p_map_new:
 	ldr	r3, [r3, r8]
 	str	r3, [r1, #-8]!
 	bl	pm_log2phys
-	ldr	r3, .L3328+52
-	ldrh	r0, [r3]
+	ldr	r3, .L3485+52
+	ldrh	r2, [r3]
+	ldr	r3, .L3485+56
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	rsb	r3, r3, #24
+	subs	r0, r3, r2
 	movs	r3, #1
-	rsb	r2, r0, #21
-	lsls	r3, r3, r2
-	ldr	r2, [sp, #8]
+	lsls	r3, r3, r0
+	ldr	r0, [sp, #8]
 	subs	r3, r3, #1
-	lsrs	r2, r2, r0
-	mov	r0, r2
-	ldr	r2, .L3328+56
+	lsrs	r0, r0, r2
+	ldr	r2, .L3485+60
 	ands	r0, r0, r3
 	ldrb	r1, [r2]	@ zero_extendqisi2
 	bl	__aeabi_uidiv
 	uxth	r0, r0
-.L3327:
+.L3484:
 	bl	ftl_vpn_decrement
 	ldr	r3, [fp]
 	mov	r2, #-1
 	str	r2, [r3, r8]
-.L3299:
+.L3456:
 	ldr	r3, [sp, #12]
 	add	r8, r8, #4
 	adds	r3, r3, #1
@@ -21259,40 +22461,41 @@ gc_update_l2p_map_new:
 	ldr	r2, [sp, #12]
 	ldr	r3, [sp, #4]
 	cmp	r3, r2
-	bne	.L3304
-.L3297:
+	bne	.L3461
+.L3454:
 	adds	r5, r5, #1
-	b	.L3296
-.L3301:
+	b	.L3453
+.L3458:
 	ldr	r2, [r7]
 	lsls	r2, r2, #23
-	bpl	.L3303
+	bpl	.L3460
 	ldr	r2, [sp, #8]
 	mov	r1, r10
-	ldr	r0, .L3328+60
+	ldr	r0, .L3485+64
 	bl	printf
-.L3303:
+.L3460:
 	ldrh	r0, [r4, #80]
-	b	.L3327
-.L3329:
+	b	.L3484
+.L3486:
 	.align	2
-.L3328:
+.L3485:
 	.word	.LANCHOR10
-	.word	.LANCHOR77
+	.word	.LANCHOR79
 	.word	.LANCHOR14
-	.word	.LC209
+	.word	.LC215
 	.word	.LANCHOR9
-	.word	.LC212
-	.word	.LANCHOR209
+	.word	.LC218
+	.word	.LANCHOR214
 	.word	.LC0
-	.word	.LANCHOR152
-	.word	.LANCHOR123
-	.word	.LC210
-	.word	.LANCHOR153
-	.word	.LANCHOR154
-	.word	.LANCHOR66
-	.word	.LANCHOR67
-	.word	.LC211
+	.word	.LANCHOR155
+	.word	.LANCHOR125
+	.word	.LC216
+	.word	.LANCHOR156
+	.word	.LANCHOR157
+	.word	.LANCHOR68
+	.word	.LANCHOR31
+	.word	.LANCHOR69
+	.word	.LC217
 	.size	gc_update_l2p_map_new, .-gc_update_l2p_map_new
 	.section	.text.gc_scan_src_blk_one_page,"ax",%progbits
 	.align	1
@@ -21307,53 +22510,53 @@ gc_scan_src_blk_one_page:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r1, #0
-	ldr	r4, .L3356
+	ldr	r4, .L3517
 	mov	r0, r1
 	movw	r5, #65535
-	ldr	r6, .L3356+4
+	ldr	r6, .L3517+4
 	ldrb	r3, [r4, #4]	@ zero_extendqisi2
 	ldrb	ip, [r6]	@ zero_extendqisi2
 	add	r2, r4, r3, lsl #1
 	ldrh	r7, [r2, #36]
 	ldrh	r2, [r4, #2]
-.L3331:
+.L3488:
 	cmp	r7, r5
-	beq	.L3333
-	cbz	r0, .L3334
+	beq	.L3490
+	cbz	r0, .L3491
 	strh	r2, [r4, #2]	@ movhi
-.L3334:
-	cbz	r1, .L3335
+.L3491:
+	cbz	r1, .L3492
 	strb	r3, [r4, #4]
-.L3335:
-	ldr	r8, .L3356+16
+.L3492:
+	ldr	r8, .L3517+20
 	movs	r0, #1
-	ldr	r10, .L3356+20
+	ldr	r10, .L3517+24
 	mov	fp, #1
 	bl	buf_alloc
 	mov	r5, r0
-.L3336:
+.L3493:
 	ldrb	r1, [r4, #6]	@ zero_extendqisi2
 	cmp	fp, r1
-	ble	.L3344
+	ble	.L3502
 	mov	r0, r5
-	bl	buf_free
+	bl	zbuf_free
 	ldrb	r3, [r4, #4]	@ zero_extendqisi2
 	ldrb	r2, [r6]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r2, r3
 	strb	r3, [r4, #4]
-	bne	.L3330
+	bne	.L3487
 	ldrh	r3, [r4, #2]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [r4, #4]
-.L3330:
+.L3487:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3333:
+.L3490:
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, ip
@@ -21367,25 +22570,35 @@ gc_scan_src_blk_one_page:
 	it	eq
 	moveq	r0, #1
 	movs	r1, #1
-	b	.L3331
-.L3344:
+	b	.L3488
+.L3502:
 	ldrh	r3, [r8]
+	cmp	r1, #2
+	mul	r2, r7, r3
+	beq	.L3494
 	cmp	r1, #3
-	ldrh	r2, [r4, #2]
-	mul	r3, r7, r3
-	bne	.L3337
-	add	r3, r3, r2
-	orr	r3, r3, fp, lsl #24
-.L3355:
+	bne	.L3495
+	ldr	r3, .L3517+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L3496
+.L3494:
+	ldrh	r3, [r4, #2]
+	add	r3, r2, r3, lsl #1
+	ldrb	r2, [r10]	@ zero_extendqisi2
+	subs	r3, r3, #1
+	add	r3, r3, fp
+	orr	r3, r3, r2, lsl #24
+.L3516:
 	str	r3, [r5, #24]
 	movs	r1, #1
 	mov	r0, r5
 	bl	sblk_read_page
 	ldr	r3, [r5, #36]
 	adds	r2, r3, #1
-	beq	.L3341
+	beq	.L3499
 	cmp	r3, #512
-	beq	.L3341
+	beq	.L3499
 	ldr	r3, [r5, #12]
 	ldr	r3, [r3, #4]
 	mov	r0, r3
@@ -21394,52 +22607,51 @@ gc_scan_src_blk_one_page:
 	str	r0, [sp, #12]
 	adds	r0, r0, #1
 	ldr	r3, [sp, #4]
-	bne	.L3343
-	ldr	r2, .L3356+8
+	bne	.L3501
+	ldr	r2, .L3517+12
 	ldr	r2, [r2]
 	cmp	r3, r2
-	bcs	.L3343
+	bcs	.L3501
 	movs	r2, #0
 	add	r1, sp, #12
 	mov	r0, r3
 	bl	pm_log2phys
-.L3343:
+.L3501:
 	ldr	r2, [r5, #24]
 	ldr	r3, [sp, #12]
 	cmp	r2, r3
-	bne	.L3341
-	ldr	r1, .L3356+12
+	bne	.L3499
+	ldr	r1, .L3517+16
 	ldrh	r3, [r4, #20]
 	ldr	r1, [r1]
 	str	r2, [r1, r3, lsl #2]
 	adds	r3, r3, #1
 	strh	r3, [r4, #20]	@ movhi
-.L3341:
+.L3499:
 	ldrh	r3, [r4, #22]
 	add	fp, fp, #1
 	adds	r3, r3, #1
 	strh	r3, [r4, #22]	@ movhi
-	b	.L3336
-.L3337:
-	cmp	r1, #2
-	ittet	eq
-	addeq	r3, r3, r2, lsl #1
-	ldrbeq	r2, [r10]	@ zero_extendqisi2
-	addne	r3, r3, r2
-	addeq	r3, r3, #-1
-	itt	eq
-	addeq	r3, r3, fp
-	orreq	r3, r3, r2, lsl #24
-	b	.L3355
-.L3357:
+	b	.L3493
+.L3496:
+	ldrh	r3, [r4, #2]
+	add	r3, r3, r2
+	orr	r3, r3, fp, lsl #24
+	b	.L3516
+.L3495:
+	ldrh	r3, [r4, #2]
+	add	r3, r3, r2
+	b	.L3516
+.L3518:
 	.align	2
-.L3356:
-	.word	.LANCHOR63
-	.word	.LANCHOR78
-	.word	.LANCHOR120
-	.word	.LANCHOR68
-	.word	.LANCHOR103
-	.word	.LANCHOR71
+.L3517:
+	.word	.LANCHOR64
+	.word	.LANCHOR80
+	.word	.LANCHOR35
+	.word	.LANCHOR122
+	.word	.LANCHOR70
+	.word	.LANCHOR105
+	.word	.LANCHOR73
 	.size	gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page
 	.section	.text.gc_scan_src_blk,"ax",%progbits
 	.align	1
@@ -21454,101 +22666,101 @@ gc_scan_src_blk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movw	r3, #65535
-	ldr	r4, .L3399
+	ldr	r4, .L3563
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	bne	.L3359
-	movw	r2, #1051
-	ldr	r1, .L3399+4
-	ldr	r0, .L3399+8
+	bne	.L3520
+	movw	r2, #1235
+	ldr	r1, .L3563+4
+	ldr	r0, .L3563+8
 	bl	printf
-.L3359:
+.L3520:
 	ldrh	r1, [r4]
 	movw	r3, #65535
 	cmp	r1, r3
-	beq	.L3380
-	ldr	r3, .L3399+12
+	beq	.L3541
+	ldr	r3, .L3563+12
 	ldr	r3, [r3]
 	lsls	r0, r3, #23
-	bpl	.L3361
-	ldr	r3, .L3399+16
-	ldr	r0, .L3399+20
+	bpl	.L3522
+	ldr	r3, .L3563+16
+	ldr	r0, .L3563+20
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r1, lsl #1]
 	bl	printf
-.L3361:
-	ldr	r1, .L3399+24
+.L3522:
+	ldr	r1, .L3563+24
 	ldrh	r0, [r4]
 	bl	ftl_get_blk_list_in_sblk
 	uxtb	r0, r0
 	strb	r0, [r4, #5]
-	cbnz	r0, .L3362
+	cbnz	r0, .L3523
 	movw	r3, #65535
 	strh	r3, [r4]	@ movhi
-.L3358:
+.L3519:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3362:
-	ldr	r5, .L3399+28
+.L3523:
+	ldr	r5, .L3563+28
 	ldrh	r3, [r4]
 	ldr	r2, [r5]
 	add	r2, r2, r3, lsl #2
 	ldrb	r2, [r2, #2]	@ zero_extendqisi2
 	and	r2, r2, #224
 	cmp	r2, #32
-	beq	.L3363
+	beq	.L3524
 	cmp	r2, #224
-	beq	.L3363
-	cbz	r2, .L3364
-	ldr	r2, .L3399+32
+	beq	.L3524
+	cbz	r2, .L3525
+	ldr	r2, .L3563+32
 	ldr	r2, [r2]
 	ldrh	r1, [r2, #16]
 	cmp	r1, r3
-	beq	.L3363
+	beq	.L3524
 	ldrh	r1, [r2, #48]
 	cmp	r1, r3
-	beq	.L3363
+	beq	.L3524
 	ldrh	r2, [r2, #80]
 	cmp	r2, r3
-	bne	.L3397
-.L3363:
+	bne	.L3561
+.L3524:
 	movw	r3, #65535
 	movs	r0, #0
 	strh	r3, [r4]	@ movhi
 	strh	r0, [r4, #20]	@ movhi
-	b	.L3358
-.L3364:
-	ldr	r5, .L3399+16
+	b	.L3519
+.L3525:
+	ldr	r5, .L3563+16
 	ldr	r1, [r5]
 	ldrh	r3, [r1, r3, lsl #1]
-	cbz	r3, .L3366
-	movw	r2, #1071
-	ldr	r1, .L3399+4
-	ldr	r0, .L3399+8
+	cbz	r3, .L3527
+	movw	r2, #1255
+	ldr	r1, .L3563+4
+	ldr	r0, .L3563+8
 	bl	printf
-.L3366:
+.L3527:
 	ldrh	r2, [r4]
 	movs	r1, #0
 	ldr	r3, [r5]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	b	.L3363
-.L3397:
+	b	.L3524
+.L3561:
 	add	r0, r4, r0, lsl #1
 	movw	r3, #65535
 	ldrh	r6, [r0, #34]
 	cmp	r6, r3
-	bne	.L3367
-	movw	r2, #1079
-	ldr	r1, .L3399+4
-	ldr	r0, .L3399+8
+	bne	.L3528
+	movw	r2, #1263
+	ldr	r1, .L3563+4
+	ldr	r0, .L3563+8
 	bl	printf
-.L3367:
-	ldr	r2, .L3399+36
+.L3528:
+	ldr	r2, .L3563+36
 	ldrh	r0, [r4]
-	ldr	r1, .L3399+40
+	ldr	r1, .L3563+40
 	ldrh	r2, [r2]
-	ldr	r8, .L3399+64
+	ldr	r8, .L3563+72
 	ldrh	r3, [r1]
 	mov	r10, r1
 	muls	r6, r2, r6
@@ -21559,18 +22771,24 @@ gc_scan_src_blk:
 	ldrb	r2, [r2, #2]	@ zero_extendqisi2
 	and	r2, r2, #224
 	cmp	r2, #160
-	bne	.L3381
-	ldr	r2, .L3399+44
-	ldrb	r7, [r2]	@ zero_extendqisi2
-	cmp	r7, #2
+	bne	.L3542
+	ldr	r2, .L3563+44
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r2, #2
+	uxth	r7, r2
+	orr	r6, r6, r2, lsl #24
+	ldr	r2, .L3563+48
 	it	eq
 	ldrheq	r3, [r8]
-	orr	r6, r6, r7, lsl #24
-	itee	ne
-	uxthne	r7, r7
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	itt	eq
 	addeq	r3, r3, #-1
 	uxtheq	r3, r3
-.L3368:
+	cbz	r2, .L3529
+	ldrh	r3, [r8]
+	subs	r3, r3, #1
+	uxth	r3, r3
+.L3529:
 	orrs	r6, r6, r3
 	strb	r7, [r4, #6]
 	movs	r5, #0
@@ -21582,13 +22800,13 @@ gc_scan_src_blk:
 	bl	buf_alloc
 	str	r6, [r0, #24]
 	movs	r1, #1
-	ldr	r6, .L3399+48
+	ldr	r6, .L3563+52
 	mov	fp, r0
 	bl	sblk_read_page
 	ldrh	r3, [r8]
 	movs	r1, #255
 	ldrb	r2, [r6]	@ zero_extendqisi2
-	ldr	r8, .L3399+68
+	ldr	r8, .L3563+76
 	muls	r2, r3, r2
 	ldr	r0, [r8]
 	lsls	r2, r2, #2
@@ -21596,52 +22814,52 @@ gc_scan_src_blk:
 	ldr	r3, [fp, #36]
 	strh	r5, [r4, #20]	@ movhi
 	adds	r2, r3, #1
-	beq	.L3398
+	beq	.L3562
 	cmp	r3, #512
-	bne	.L3371
-.L3398:
+	bne	.L3532
+.L3562:
 	mov	r0, fp
-	bl	buf_free
+	bl	zbuf_free
 	mov	r0, #-1
-	b	.L3358
-.L3381:
+	b	.L3519
+.L3542:
 	movs	r7, #1
-	b	.L3368
-.L3371:
+	b	.L3529
+.L3532:
 	ldr	r3, [fp, #12]
 	ldr	r2, [r3]
-	ldr	r3, .L3399+52
+	ldr	r3, .L3563+56
 	cmp	r2, r3
-	beq	.L3372
-	mov	r2, #1112
-	ldr	r1, .L3399+4
-	ldr	r0, .L3399+8
+	beq	.L3533
+	movw	r2, #1298
+	ldr	r1, .L3563+4
+	ldr	r0, .L3563+8
 	bl	printf
-	b	.L3398
-.L3372:
+	b	.L3562
+.L3533:
 	ldrh	r3, [r10]
 	ldrb	r6, [r6]	@ zero_extendqisi2
-	ldr	r10, .L3399+72
+	ldr	r10, .L3563+80
 	smulbb	r6, r6, r3
 	smulbb	r6, r6, r7
 	ldr	r7, [fp, #4]
 	uxth	r6, r6
 	subs	r7, r7, #4
-.L3373:
+.L3534:
 	cmp	r5, r6
-	blt	.L3378
-	ldr	r5, .L3399+16
+	blt	.L3539
+	ldr	r5, .L3563+16
 	mov	r0, fp
-	bl	buf_free
+	bl	zbuf_free
 	ldrh	r1, [r4]
 	ldr	r3, [r5]
 	ldrh	r2, [r3, r1, lsl #1]
 	ldrh	r3, [r4, #20]
 	cmp	r2, r3
-	beq	.L3379
-	ldr	r0, .L3399+56
+	beq	.L3540
+	ldr	r0, .L3563+60
 	bl	printf
-.L3379:
+.L3540:
 	ldr	r3, [r5]
 	ldrh	r1, [r4, #20]
 	ldrh	r2, [r4]
@@ -21649,69 +22867,74 @@ gc_scan_src_blk:
 	movs	r3, #0
 	strh	r3, [r4, #24]	@ movhi
 	ldrh	r0, [r4, #20]
-	b	.L3358
-.L3378:
+	b	.L3519
+.L3539:
 	ldr	r0, [r7, #4]!
 	adds	r3, r0, #1
-	beq	.L3375
+	beq	.L3536
 	bl	lpa_hash_get_ppa
 	str	r0, [sp, #12]
 	adds	r0, r0, #1
-	bne	.L3376
+	bne	.L3537
 	movs	r2, #0
 	add	r1, sp, #12
 	ldr	r0, [r7]
 	bl	pm_log2phys
-.L3376:
-	ldr	r3, [sp, #12]
-	movs	r2, #1
+.L3537:
+	ldr	r2, .L3563+64
+	movs	r1, #1
 	ldrh	r0, [r10]
+	ldr	r3, [sp, #12]
+	ldrb	r2, [r2]	@ zero_extendqisi2
 	str	r3, [sp, #4]
-	rsb	r1, r0, #21
-	lsls	r2, r2, r1
+	rsb	r2, r2, #24
+	subs	r2, r2, r0
 	lsr	r0, r3, r0
-	ldr	r3, .L3399+60
+	lsl	r2, r1, r2
+	ldr	r1, .L3563+68
 	subs	r2, r2, #1
 	ands	r0, r0, r2
-	ldrb	r1, [r3]	@ zero_extendqisi2
+	ldrb	r1, [r1]	@ zero_extendqisi2
 	bl	__aeabi_uidiv
 	ldrh	r2, [r4]
 	ldr	r3, [sp, #4]
 	cmp	r0, r2
-	bne	.L3375
+	bne	.L3536
 	ldrh	r2, [r4, #20]
 	ldr	r1, [r8]
 	str	r3, [r1, r2, lsl #2]
 	adds	r2, r2, #1
 	strh	r2, [r4, #20]	@ movhi
-.L3375:
+.L3536:
 	adds	r5, r5, #1
-	b	.L3373
-.L3380:
+	b	.L3534
+.L3541:
 	movs	r0, #0
-	b	.L3358
-.L3400:
+	b	.L3519
+.L3564:
 	.align	2
-.L3399:
-	.word	.LANCHOR63
-	.word	.LANCHOR210
+.L3563:
+	.word	.LANCHOR64
+	.word	.LANCHOR215
 	.word	.LC0
 	.word	.LANCHOR14
 	.word	.LANCHOR9
-	.word	.LC213
-	.word	.LANCHOR63+36
+	.word	.LC219
+	.word	.LANCHOR64+36
 	.word	.LANCHOR7
 	.word	.LANCHOR10
-	.word	.LANCHOR103
-	.word	.LANCHOR85
-	.word	.LANCHOR71
-	.word	.LANCHOR78
+	.word	.LANCHOR105
+	.word	.LANCHOR87
+	.word	.LANCHOR73
+	.word	.LANCHOR35
+	.word	.LANCHOR80
 	.word	-178307901
-	.word	.LC214
-	.word	.LANCHOR67
-	.word	.LANCHOR77
+	.word	.LC220
+	.word	.LANCHOR31
+	.word	.LANCHOR69
+	.word	.LANCHOR79
+	.word	.LANCHOR70
 	.word	.LANCHOR68
-	.word	.LANCHOR66
 	.size	gc_scan_src_blk, .-gc_scan_src_blk
 	.section	.text.gc_scan_static_data,"ax",%progbits
 	.align	1
@@ -21725,15 +22948,15 @@ gc_scan_static_data:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
-	ldr	r4, .L3417
+	ldr	r4, .L3581
 	ldr	r3, [r4]
 	ldr	r2, [r3, #544]
 	adds	r2, r2, #1
-	beq	.L3402
-	ldr	r6, .L3417+4
+	beq	.L3566
+	ldr	r7, .L3581+4
 	movs	r5, #11
-	ldr	r7, .L3417+8
-.L3410:
+	ldr	r8, .L3581+28
+.L3574:
 	ldr	r3, [r4]
 	movs	r2, #0
 	add	r1, sp, #4
@@ -21741,56 +22964,59 @@ gc_scan_static_data:
 	bl	pm_log2phys
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
-	beq	.L3403
+	beq	.L3567
 	movs	r0, #1
 	bl	buf_alloc
 	ldr	r3, [sp, #4]
-	mov	r8, r0
+	mov	r6, r0
 	movs	r1, #1
 	str	r3, [r0, #24]
 	bl	sblk_read_page
-	ldr	r3, [r8, #36]
+	ldr	r3, [r6, #36]
 	cmp	r3, #256
-	bne	.L3404
-	ldr	r3, .L3417+12
+	bne	.L3568
+	ldr	r3, .L3581+8
 	mov	r10, #1
 	ldr	r0, [sp, #4]
 	ldrh	r2, [r3]
-	rsb	r3, r2, #21
+	ldr	r3, .L3581+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
 	lsrs	r0, r0, r2
+	rsb	r3, r3, #24
+	subs	r3, r3, r2
+	ldr	r2, .L3581+16
 	lsl	r3, r10, r3
-	ldr	r2, .L3417+16
 	subs	r3, r3, #1
-	ands	r0, r0, r3
 	ldrb	r1, [r2]	@ zero_extendqisi2
+	ands	r0, r0, r3
 	bl	__aeabi_uidiv
 	movs	r2, #0
 	mov	r1, r10
 	uxth	r0, r0
 	bl	gc_add_sblk
-.L3404:
-	ldr	r2, [r8, #12]
+.L3568:
+	ldr	r2, [r6, #12]
 	ldr	r3, [r4]
 	ldr	r2, [r2, #4]
 	ldr	r3, [r3, #544]
 	cmp	r2, r3
-	beq	.L3405
-	movw	r2, #1551
-	mov	r1, r6
-	mov	r0, r7
-	bl	printf
-.L3405:
+	beq	.L3569
+	movw	r2, #1737
+	mov	r1, r7
 	mov	r0, r8
-	bl	buf_free
-.L3403:
+	bl	printf
+.L3569:
+	mov	r0, r6
+	bl	zbuf_free
+.L3567:
 	ldr	r3, [r4]
-	ldr	r1, .L3417+20
+	ldr	r1, .L3581+20
 	ldr	r2, [r3, #544]
 	ldr	r1, [r1]
 	adds	r2, r2, #1
 	cmp	r2, r1
 	str	r2, [r3, #544]
-	bcc	.L3406
+	bcc	.L3570
 	mov	r2, #-1
 	str	r2, [r3, #544]
 	ldr	r2, [r3, #548]
@@ -21801,52 +23027,53 @@ gc_scan_static_data:
 	bl	ftl_ext_info_flush
 	movs	r0, #0
 	bl	ftl_info_flush
-.L3401:
+.L3565:
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L3406:
+.L3570:
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
-	bne	.L3401
+	bne	.L3565
 	subs	r5, r5, #1
 	uxth	r5, r5
 	cmp	r5, #0
-	bne	.L3410
-	b	.L3401
-.L3402:
+	bne	.L3574
+	b	.L3565
+.L3566:
 	ldr	r2, [r3, #536]
 	ldr	r1, [r3, #12]
-	ldr	r0, .L3417+24
+	ldr	r0, .L3581+24
 	add	r2, r2, #12910592
 	add	r2, r2, #49408
 	cmp	r1, r2
-	bhi	.L3412
+	bhi	.L3576
 	ldr	r4, [r0]
 	ldr	r2, [r3, #540]
 	ldr	r4, [r4, #44]
 	add	r2, r2, #4992
 	adds	r2, r2, #8
 	cmp	r4, r2
-	bls	.L3401
-.L3412:
+	bls	.L3565
+.L3576:
 	ldr	r2, [r0]
 	ldr	r2, [r2, #44]
 	str	r1, [r3, #536]
 	str	r2, [r3, #540]
 	movs	r2, #0
 	str	r2, [r3, #544]
-	b	.L3401
-.L3418:
+	b	.L3565
+.L3582:
 	.align	2
-.L3417:
+.L3581:
 	.word	.LANCHOR10
-	.word	.LANCHOR211
+	.word	.LANCHOR216
+	.word	.LANCHOR68
+	.word	.LANCHOR31
+	.word	.LANCHOR69
+	.word	.LANCHOR122
+	.word	.LANCHOR104
 	.word	.LC0
-	.word	.LANCHOR66
-	.word	.LANCHOR67
-	.word	.LANCHOR120
-	.word	.LANCHOR102
 	.size	gc_scan_static_data, .-gc_scan_static_data
 	.section	.text.ftl_sblk_dump,"ax",%progbits
 	.align	1
@@ -21857,17 +23084,17 @@ gc_scan_static_data:
 	.fpu softvfp
 	.type	ftl_sblk_dump, %function
 ftl_sblk_dump:
-	@ args = 0, pretend = 0, frame = 80
+	@ args = 0, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	lsls	r3, r0, #2
-	ldr	r4, .L3458
-	sub	sp, sp, #120
+	ldr	r4, .L3624
+	sub	sp, sp, #128
 	lsls	r2, r0, #2
 	mov	r6, r0
-	str	r3, [sp, #68]
+	str	r3, [sp, #72]
 	ldr	r3, [r4]
-	str	r1, [sp, #60]
+	str	r1, [sp, #68]
 	ldr	r1, [r3, r0, lsl #2]
 	adds	r2, r3, r2
 	ldrb	r2, [r2, #2]	@ zero_extendqisi2
@@ -21875,7 +23102,7 @@ ftl_sblk_dump:
 	str	r1, [sp, #4]
 	mov	r1, r0
 	ldrh	r3, [r3, r0, lsl #2]
-	ldr	r0, .L3458+4
+	ldr	r0, .L3624+4
 	ubfx	r3, r3, #0, #11
 	str	r3, [sp]
 	ubfx	r3, r2, #3, #2
@@ -21883,15 +23110,15 @@ ftl_sblk_dump:
 	bl	printf
 	movw	r3, #65535
 	cmp	r6, r3
-	beq	.L3440
-	ldr	r3, .L3458+8
+	beq	.L3605
+	ldr	r3, .L3624+8
 	ldrh	r3, [r3]
 	cmp	r3, r6
-	bls	.L3440
+	bls	.L3605
 	ldr	r3, [r4]
 	lsls	r2, r6, #2
-	add	r1, sp, #104
-	strh	r6, [sp, #88]	@ movhi
+	add	r1, sp, #112
+	strh	r6, [sp, #96]	@ movhi
 	mov	r0, r6
 	movs	r5, #0
 	add	r3, r3, r2
@@ -21900,74 +23127,89 @@ ftl_sblk_dump:
 	and	r3, r3, #224
 	cmp	r3, #160
 	itet	eq
-	ldreq	r3, .L3458+12
+	ldreq	r3, .L3624+12
 	movne	fp, #1
 	ldrbeq	fp, [r3]	@ zero_extendqisi2
 	bl	ftl_get_blk_list_in_sblk
-	ldr	r3, .L3458+16
+	ldr	r3, .L3624+16
 	uxtb	r0, r0
 	lsls	r2, r6, #2
-	strb	r5, [sp, #93]
-	strb	r0, [sp, #97]
+	strb	r5, [sp, #101]
+	strb	r0, [sp, #105]
 	mov	r1, r6
 	ldrh	r3, [r3]
-	strh	r5, [sp, #90]	@ movhi
 	strh	r5, [sp, #98]	@ movhi
+	strh	r5, [sp, #106]	@ movhi
 	smulbb	r3, r3, r0
-	strh	r3, [sp, #94]	@ movhi
+	strh	r3, [sp, #102]	@ movhi
 	ldr	r3, [r4]
 	add	r3, r3, r2
 	ldrb	r2, [r3, #2]	@ zero_extendqisi2
 	mov	r3, fp
 	str	r0, [sp]
-	ldr	r0, .L3458+20
+	ldr	r0, .L3624+20
 	lsrs	r2, r2, #5
 	bl	printf
 	movs	r0, #1
 	bl	buf_alloc
 	mov	r7, r0
+	str	r5, [sp, #48]
 	str	r5, [sp, #44]
-	str	r5, [sp, #40]
-.L3422:
-	ldr	r3, .L3458+16
+.L3586:
+	ldr	r3, .L3624+16
 	ldrh	r2, [r3]
 	uxth	r3, r5
 	cmp	r2, r3
-	bls	.L3437
-	str	r3, [sp, #64]
+	bls	.L3602
+	str	r3, [sp, #60]
 	lsls	r3, r3, #1
+	subs	r2, r3, #1
+	str	r2, [sp, #76]
+	ldr	r2, [sp, #60]
+	add	r3, r3, r2
 	subs	r3, r3, #1
-	str	r3, [sp, #72]
+	str	r3, [sp, #80]
 	movs	r3, #0
-	b	.L3457
-.L3434:
-	ldr	r3, [sp, #76]
-	add	r2, sp, #120
+	b	.L3623
+.L3599:
+	ldr	r3, [sp, #84]
+	add	r2, sp, #128
 	add	r3, r2, r3, lsl #1
 	ldrh	r3, [r3, #-32]
-	str	r3, [sp, #52]
+	str	r3, [sp, #56]
 	movw	r3, #65535
-	ldr	r2, [sp, #52]
+	ldr	r2, [sp, #56]
 	cmp	r2, r3
-	beq	.L3423
-	ldr	r3, .L3458+24
+	beq	.L3587
+	ldr	r3, .L3624+24
 	cmp	fp, #3
 	ldrh	r4, [r3]
-	mov	r3, r2
 	mul	r4, r2, r4
-	bne	.L3424
+	bne	.L3588
+	ldr	r3, .L3624+28
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L3589
+	ldr	r3, [sp, #80]
+.L3621:
+	add	r4, r4, r3
+	ldr	r3, .L3624+12
+	add	r4, r4, r8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	orr	r4, r4, r3, lsl #24
+	b	.L3590
+.L3589:
 	uxtah	r4, r4, r5
 	orr	r4, r4, r8, lsl #24
-.L3425:
+.L3590:
 	movs	r1, #1
 	str	r4, [r7, #24]
 	mov	r0, r7
 	bl	sblk_read_page
 	ldr	r2, [r7, #12]
 	ldr	r3, [r7, #36]
-	ldr	r0, .L3458+28
+	ldr	r0, .L3624+32
 	ldr	r1, [r2, #12]
-	str	r3, [sp, #56]
+	str	r3, [sp, #64]
 	ldr	r3, [r7, #4]
 	str	r1, [sp, #32]
 	ldr	r1, [r2, #8]
@@ -21975,7 +23217,7 @@ ftl_sblk_dump:
 	ldr	r1, [r2, #4]
 	str	r1, [sp, #24]
 	ldr	r2, [r2]
-	ldr	r1, [sp, #52]
+	ldr	r1, [sp, #56]
 	str	r2, [sp, #20]
 	ldr	r2, [r3, #12]
 	str	r2, [sp, #16]
@@ -21984,157 +23226,154 @@ ftl_sblk_dump:
 	ldr	r2, [r3, #4]
 	str	r2, [sp, #8]
 	ldr	r3, [r3]
-	ldr	r2, [sp, #64]
+	ldr	r2, [sp, #60]
 	str	r3, [sp, #4]
-	ldr	r3, [sp, #56]
+	ldr	r3, [sp, #64]
 	str	r3, [sp]
 	mov	r3, r4
 	bl	printf
-	ldr	r3, [sp, #56]
+	ldr	r3, [sp, #64]
 	adds	r2, r3, #1
-	beq	.L3442
+	beq	.L3607
 	cmp	r3, #512
-	ldr	r3, [sp, #40]
+	ldr	r3, [sp, #44]
 	it	eq
 	moveq	r3, #1
-.L3456:
-	str	r3, [sp, #40]
-	ldr	r3, .L3458
-	ldr	r2, [sp, #68]
+.L3622:
+	str	r3, [sp, #44]
+	ldr	r3, .L3624
+	ldr	r2, [sp, #72]
 	ldr	r3, [r3]
 	add	r3, r3, r2
 	ldrb	r3, [r3, #2]	@ zero_extendqisi2
 	and	r3, r3, #224
 	cmp	r3, #224
-	beq	.L3423
+	beq	.L3587
 	cmp	r3, #32
-	beq	.L3423
+	beq	.L3587
 	ldr	r3, [r7, #12]
 	ldr	r0, [r3, #4]
 	bl	lpa_hash_get_ppa
-	str	r0, [sp, #84]
+	str	r0, [sp, #92]
 	adds	r0, r0, #1
-	bne	.L3428
+	bne	.L3593
 	ldr	r3, [r7, #12]
 	movs	r2, #0
-	add	r1, sp, #84
+	add	r1, sp, #92
 	ldr	r0, [r3, #4]
 	bl	pm_log2phys
-.L3428:
-	ldr	r3, [sp, #84]
+.L3593:
+	ldr	r3, [sp, #92]
 	cmp	r4, r3
-	bne	.L3429
-	ldr	r3, [sp, #44]
+	bne	.L3594
+	ldr	r3, [sp, #48]
 	mov	r1, r4
 	ldr	r2, [r7, #12]
-	ldr	r0, .L3458+32
+	ldr	r0, .L3624+36
 	adds	r3, r3, #1
 	ldr	r2, [r2, #4]
-	str	r3, [sp, #44]
+	str	r3, [sp, #48]
 	bl	printf
-.L3429:
-	ldr	r3, [sp, #60]
-	cbz	r3, .L3431
+.L3594:
+	ldr	r3, [sp, #68]
+	cbz	r3, .L3596
 	ldr	r2, [r3, r10, lsl #2]
 	lsl	r4, r10, #2
 	ldr	r3, [r7, #12]
 	ldr	r3, [r3, #4]
 	cmp	r3, r2
-	beq	.L3432
-	ldr	r3, .L3458+36
+	beq	.L3597
+	ldr	r3, .L3624+40
 	ldr	r3, [r3]
 	lsls	r3, r3, #19
-	bpl	.L3432
+	bpl	.L3597
 	mov	r1, r10
-	ldr	r0, .L3458+40
+	ldr	r0, .L3624+44
 	bl	printf
-.L3432:
-	ldr	r3, [sp, #60]
+.L3597:
+	ldr	r3, [sp, #68]
 	ldr	r2, [r7, #12]
 	ldr	r3, [r3, r4]
 	ldr	r2, [r2, #4]
 	cmp	r2, r3
-	beq	.L3431
+	beq	.L3596
 	adds	r3, r3, #1
-	beq	.L3431
-	mov	r2, #1312
-	ldr	r1, .L3458+44
-	ldr	r0, .L3458+48
+	beq	.L3596
+	movw	r2, #1383
+	ldr	r1, .L3624+48
+	ldr	r0, .L3624+52
 	bl	printf
-.L3431:
+.L3596:
 	add	r10, r10, #1
-.L3423:
+.L3587:
 	add	r8, r8, #1
 	uxth	r8, r8
-.L3436:
+.L3601:
 	cmp	fp, r8
-	bcs	.L3434
-	ldr	r3, [sp, #48]
+	bcs	.L3599
+	ldr	r3, [sp, #52]
 	adds	r3, r3, #1
-.L3457:
-	str	r3, [sp, #48]
-	ldrb	r2, [sp, #97]	@ zero_extendqisi2
-	ldrh	r3, [sp, #48]
+.L3623:
+	str	r3, [sp, #52]
+	ldrb	r2, [sp, #105]	@ zero_extendqisi2
+	ldrh	r3, [sp, #52]
 	cmp	r2, r3
-	bls	.L3435
+	bls	.L3600
 	adds	r3, r3, #8
 	mov	r8, #1
-	str	r3, [sp, #76]
-	b	.L3436
-.L3424:
+	str	r3, [sp, #84]
+	b	.L3601
+.L3588:
 	cmp	fp, #2
-	itett	eq
-	ldreq	r3, [sp, #72]
-	uxtahne	r4, r4, r5
-	addeq	r4, r4, r3
-	ldreq	r3, .L3458+12
-	ittt	eq
-	addeq	r4, r4, r8
-	ldrbeq	r3, [r3]	@ zero_extendqisi2
-	orreq	r4, r4, r3, lsl #24
-	b	.L3425
-.L3442:
+	bne	.L3591
+	ldr	r3, [sp, #76]
+	b	.L3621
+.L3591:
+	uxtah	r4, r4, r5
+	b	.L3590
+.L3607:
 	movs	r3, #1
-	b	.L3456
-.L3435:
+	b	.L3622
+.L3600:
 	adds	r5, r5, #1
-	b	.L3422
-.L3437:
+	b	.L3586
+.L3602:
 	mov	r0, r7
-	bl	buf_free
-	ldr	r3, .L3458+52
+	bl	zbuf_free
+	ldr	r3, .L3624+56
 	mov	r1, r6
-	ldr	r0, .L3458+56
+	ldr	r0, .L3624+60
 	ldr	r2, [r3]
-	ldr	r3, [sp, #44]
+	ldr	r3, [sp, #48]
 	ldrh	r2, [r2, r6, lsl #1]
 	bl	printf
-	ldr	r0, [sp, #40]
-.L3419:
-	add	sp, sp, #120
+	ldr	r0, [sp, #44]
+.L3583:
+	add	sp, sp, #128
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3440:
+.L3605:
 	movs	r0, #0
-	b	.L3419
-.L3459:
+	b	.L3583
+.L3625:
 	.align	2
-.L3458:
+.L3624:
 	.word	.LANCHOR7
-	.word	.LC215
+	.word	.LC221
 	.word	.LANCHOR6
-	.word	.LANCHOR71
-	.word	.LANCHOR85
-	.word	.LC216
-	.word	.LANCHOR103
-	.word	.LC162
-	.word	.LC217
+	.word	.LANCHOR73
+	.word	.LANCHOR87
+	.word	.LC222
+	.word	.LANCHOR105
+	.word	.LANCHOR35
+	.word	.LC163
+	.word	.LC223
 	.word	.LANCHOR14
-	.word	.LC218
-	.word	.LANCHOR212
+	.word	.LC224
+	.word	.LANCHOR217
 	.word	.LC0
 	.word	.LANCHOR9
-	.word	.LC219
+	.word	.LC225
 	.size	ftl_sblk_dump, .-ftl_sblk_dump
 	.section	.text.zftl_read,"ax",%progbits
 	.align	1
@@ -22149,39 +23388,39 @@ zftl_read:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r5, r3
-	ldr	r3, .L3507
+	ldr	r3, .L3673
 	mov	r4, r0
 	sub	sp, sp, #72
 	mov	r6, r1
 	mov	fp, r2
 	ldr	r3, [r3]
 	lsls	r0, r3, #19
-	bpl	.L3461
+	bpl	.L3627
 	mov	r3, r2
-	ldr	r0, .L3507+4
+	ldr	r0, .L3673+4
 	mov	r2, r1
 	mov	r1, r4
 	bl	printf
-.L3461:
+.L3627:
 	cmp	r4, #0
-	bne	.L3462
-	ldr	r3, .L3507+8
+	bne	.L3628
+	ldr	r3, .L3673+8
 	mov	r4, #24576
 	ldr	r3, [r3]
-.L3463:
+.L3629:
 	add	r2, r6, fp
 	cmp	r3, r2
-	bcc	.L3492
+	bcc	.L3658
 	adds	r3, r4, r6
-	ldr	r6, .L3507+12
+	ldr	r6, .L3673+12
 	str	r3, [sp, #28]
-	ldr	r3, .L3507+16
+	ldr	r3, .L3673+16
 	ldr	r0, [sp, #28]
 	ldr	r2, [r3]
 	ldr	r3, [r2, #24]
 	add	r3, r3, fp
 	str	r3, [r2, #24]
-	ldr	r3, .L3507+20
+	ldr	r3, .L3673+20
 	ldrb	r4, [r3]	@ zero_extendqisi2
 	mov	r1, r4
 	bl	__aeabi_uidiv
@@ -22200,45 +23439,45 @@ zftl_read:
 	str	r3, [sp, #32]
 	movs	r3, #0
 	str	r3, [sp, #40]
-.L3465:
+.L3631:
 	ldr	r3, [sp, #32]
-	cbnz	r3, .L3490
+	cbnz	r3, .L3656
 	ldr	r0, [sp, #40]
-.L3460:
+.L3626:
 	add	sp, sp, #72
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3462:
+.L3628:
 	cmp	r4, #3
-	bhi	.L3492
+	bhi	.L3658
 	lsls	r4, r4, #13
 	mov	r3, #8192
-	b	.L3463
-.L3490:
-	ldr	r3, .L3507+20
+	b	.L3629
+.L3656:
+	ldr	r3, .L3673+20
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	ldr	r3, [sp, #36]
 	cmp	r4, r3
 	uxth	r7, r1
-	bne	.L3466
+	bne	.L3632
 	ldr	r0, [sp, #28]
 	bl	__aeabi_uidivmod
 	uxth	r8, r1
 	sub	r7, r7, r8
 	uxth	r7, r7
 	cmp	fp, r7
-	bcs	.L3467
+	bcs	.L3633
 	uxth	r7, fp
-.L3467:
-	ldr	r2, .L3507+12
+.L3633:
+	ldr	r2, .L3673+12
 	movs	r3, #0
-.L3470:
+.L3636:
 	ldr	r1, [r2, #20]
 	cmp	r4, r1
-	bne	.L3468
+	bne	.L3634
 	ldrb	r1, [r2, #2]	@ zero_extendqisi2
 	lsls	r1, r1, #28
-	bpl	.L3468
+	bpl	.L3634
 	movs	r2, #48
 	lsls	r7, r7, #9
 	mov	r0, r5
@@ -22248,40 +23487,40 @@ zftl_read:
 	ldr	r1, [r3, #4]
 	add	r1, r1, r8, lsl #9
 	bl	ftl_memcpy
-.L3469:
+.L3635:
 	ldr	r3, [sp, #32]
 	adds	r4, r4, #1
 	subs	r3, r3, #1
 	str	r3, [sp, #32]
-.L3476:
-	ldr	r3, .L3507+24
+.L3642:
+	ldr	r3, .L3673+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #2
-	bls	.L3477
+	bls	.L3643
 	ldr	r3, [sp, #32]
 	cmp	r3, #0
-	bne	.L3465
-.L3477:
-	ldr	r3, .L3507+28
+	bne	.L3631
+.L3643:
+	ldr	r3, .L3673+28
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	cmp	r1, #0
-	beq	.L3465
-	ldr	r3, .L3507+32
+	beq	.L3631
+	ldr	r3, .L3673+32
 	ldrb	r0, [r3]	@ zero_extendqisi2
 	add	r0, r0, r0, lsl #1
 	add	r0, r6, r0, lsl #4
 	bl	sblk_read_page
-.L3479:
-	ldr	r3, .L3507+28
-	ldr	r8, .L3507+32
+.L3645:
+	ldr	r3, .L3673+28
+	ldr	r8, .L3673+32
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	cmp	r2, #0
-	bne	.L3489
+	bne	.L3655
 	movs	r1, #255
 	strb	r2, [r3]
 	strb	r1, [r8]
-	b	.L3465
-.L3466:
+	b	.L3631
+.L3632:
 	ldr	r3, [sp, #48]
 	mov	r8, #0
 	cmp	r4, r3
@@ -22290,52 +23529,52 @@ zftl_read:
 	addeq	r7, r3, fp
 	mlseq	r1, r4, r1, r7
 	uxtbeq	r7, r1
-	b	.L3467
-.L3468:
+	b	.L3633
+.L3634:
 	adds	r3, r3, #1
 	adds	r2, r2, #48
 	cmp	r3, #32
-	bne	.L3470
+	bne	.L3636
 	mov	r0, r4
 	bl	lpa_hash_get_ppa
 	str	r0, [sp, #68]
 	adds	r0, r0, #1
-	bne	.L3471
+	bne	.L3637
 	movs	r2, #0
 	add	r1, sp, #68
 	mov	r0, r4
 	bl	pm_log2phys
-.L3471:
+.L3637:
 	ldr	r3, [sp, #68]
 	adds	r3, r3, #1
-	bne	.L3472
-	ldr	r8, .L3507+20
+	bne	.L3638
+	ldr	r8, .L3673+20
 	movs	r7, #0
-.L3473:
+.L3639:
 	ldrb	r3, [r8]	@ zero_extendqisi2
 	cmp	r7, r3
-	bcs	.L3469
+	bcs	.L3635
 	mla	r3, r3, r4, r7
 	ldr	r2, [sp, #28]
 	cmp	r2, r3
-	bhi	.L3474
+	bhi	.L3640
 	ldr	r2, [sp, #44]
 	cmp	r2, r3
-	bls	.L3474
+	bls	.L3640
 	mov	r0, r5
 	add	r5, r5, #512
 	mov	r2, #512
 	movs	r1, #0
 	bl	ftl_memset
-.L3474:
+.L3640:
 	adds	r7, r7, #1
-	b	.L3473
-.L3472:
+	b	.L3639
+.L3638:
 	movs	r0, #0
 	bl	buf_alloc
 	cmp	r0, #0
-	beq	.L3476
-	ldr	r2, .L3507+16
+	beq	.L3642
+	ldr	r2, .L3673+16
 	ldr	r1, [r2]
 	ldr	r2, [r1, #40]
 	adds	r2, r2, #1
@@ -22349,28 +23588,28 @@ zftl_read:
 	strb	r7, [r0, #40]
 	strb	r8, [r0, #41]
 	bl	zftl_add_read_buf
-	b	.L3469
-.L3508:
+	b	.L3635
+.L3674:
 	.align	2
-.L3507:
+.L3673:
 	.word	.LANCHOR14
-	.word	.LC220
-	.word	.LANCHOR59
-	.word	.LANCHOR50
-	.word	.LANCHOR102
-	.word	.LANCHOR123
+	.word	.LC226
+	.word	.LANCHOR61
 	.word	.LANCHOR52
-	.word	.LANCHOR127
-	.word	.LANCHOR126
-.L3489:
+	.word	.LANCHOR104
+	.word	.LANCHOR125
+	.word	.LANCHOR54
+	.word	.LANCHOR129
+	.word	.LANCHOR128
+.L3655:
 	ldrb	r3, [r8]	@ zero_extendqisi2
 	cmp	r3, #255
-	bne	.L3480
-	mov	r2, #1080
-	ldr	r1, .L3509
-	ldr	r0, .L3509+4
+	bne	.L3646
+	mov	r2, #1088
+	ldr	r1, .L3675
+	ldr	r0, .L3675+4
 	bl	printf
-.L3480:
+.L3646:
 	ldrb	r7, [r8]	@ zero_extendqisi2
 	add	r3, r7, r7, lsl #1
 	add	r3, r6, r3, lsl #4
@@ -22382,25 +23621,25 @@ zftl_read:
 	strb	r3, [r8]
 	ldr	r8, [r2, #36]
 	cmp	r8, #-1
-	bne	.L3481
-	ldr	r3, .L3509+8
+	bne	.L3647
+	ldr	r3, .L3675+8
 	str	r8, [sp, #40]
 	ldr	r2, [r3]
 	ldr	r3, [r2, #552]
 	adds	r3, r3, #1
 	str	r3, [r2, #552]
-.L3482:
+.L3648:
 	movs	r3, #48
 	mla	r3, r3, r7, r6
 	ldr	r2, [r3, #12]
 	ldr	r3, [r3, #20]
 	ldr	r1, [r2, #4]
 	cmp	r1, r3
-	bne	.L3483
+	bne	.L3649
 	cmp	r8, #-1
-	bne	.L3484
-.L3483:
-	ldr	r1, .L3509+8
+	bne	.L3650
+.L3649:
+	ldr	r1, .L3675+8
 	mov	r10, #48
 	mla	r10, r10, r7, r6
 	ldr	r0, [r1]
@@ -22415,80 +23654,86 @@ zftl_read:
 	ldr	r0, [r2, #4]
 	str	r0, [sp, #8]
 	ldr	r2, [r2]
-	ldr	r0, .L3509+12
+	ldr	r0, .L3675+12
 	str	r2, [sp, #4]
 	ldr	r2, [r10, #24]
 	str	r2, [sp]
 	mov	r2, r8
 	bl	printf
-	ldr	r3, .L3509+16
+	ldr	r3, .L3675+16
 	ldrh	r2, [r3]
+	ldr	r3, .L3675+20
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	rsb	r3, r3, #24
+	subs	r0, r3, r2
 	movs	r3, #1
-	rsb	r0, r2, #21
 	lsls	r3, r3, r0
 	ldr	r0, [r10, #24]
 	subs	r3, r3, #1
 	lsrs	r0, r0, r2
-	ldr	r2, .L3509+20
+	ldr	r2, .L3675+24
 	ands	r0, r0, r3
 	ldrb	r1, [r2]	@ zero_extendqisi2
 	bl	__aeabi_uidiv
 	movs	r1, #0
 	uxth	r0, r0
 	bl	ftl_sblk_dump
-.L3484:
+.L3650:
 	movs	r3, #48
 	mla	r3, r3, r7, r6
 	ldr	r2, [r3, #12]
 	ldr	r3, [r3, #20]
 	ldr	r2, [r2, #4]
 	cmp	r2, r3
-	bne	.L3485
+	bne	.L3651
 	cmp	r8, #-1
-	bne	.L3486
-.L3485:
-	movw	r2, #1101
-	ldr	r1, .L3509
-	ldr	r0, .L3509+4
+	bne	.L3652
+.L3651:
+	movw	r2, #1109
+	ldr	r1, .L3675
+	ldr	r0, .L3675+4
 	bl	printf
-.L3486:
+.L3652:
 	movs	r3, #48
 	mla	r7, r3, r7, r6
-	ldr	r3, .L3509+24
+	ldr	r3, .L3675+28
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	ldrb	r2, [r7, #40]	@ zero_extendqisi2
 	cmp	r3, r2
-	bls	.L3487
+	bls	.L3653
 	ldrb	r1, [r7, #41]	@ zero_extendqisi2
 	lsls	r2, r2, #9
 	ldr	r3, [r7, #4]
 	ldr	r0, [r7, #8]
 	add	r1, r3, r1, lsl #9
 	bl	ftl_memcpy
-.L3488:
+.L3654:
 	ldr	r1, [sp, #52]
-	ldr	r0, .L3509+28
+	ldr	r0, .L3675+32
 	bl	buf_remove_buf
 	ldr	r0, [sp, #52]
-	bl	buf_free
-	ldr	r2, .L3509+32
+	bl	zbuf_free
+	ldr	r2, .L3675+36
 	ldrb	r3, [r2]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	strb	r3, [r2]
-	b	.L3479
-.L3481:
+	b	.L3645
+.L3647:
 	cmp	r8, #256
-	bne	.L3482
-	ldr	r1, .L3509+16
+	bne	.L3648
+	ldr	r1, .L3675+16
 	ldr	r3, [r2, #24]
 	str	r2, [sp, #60]
 	movs	r2, #1
 	ldrh	r0, [r1]
-	ldr	r1, .L3509+20
+	ldr	r1, .L3675+20
 	str	r3, [sp, #56]
-	rsb	ip, r0, #21
-	lsl	ip, r2, ip
+	ldrb	ip, [r1]	@ zero_extendqisi2
+	ldr	r1, .L3675+24
+	rsb	ip, ip, #24
+	sub	ip, ip, r0
 	lsr	r0, r3, r0
+	lsl	ip, r2, ip
 	ldrb	r1, [r1]	@ zero_extendqisi2
 	add	ip, ip, #-1
 	and	r0, ip, r0
@@ -22497,35 +23742,36 @@ zftl_read:
 	mov	r10, r0
 	uxth	r1, r0
 	ldr	r3, [sp, #56]
-	ldr	r0, .L3509+36
+	ldr	r0, .L3675+40
 	ldr	r2, [r2, #20]
 	bl	printf
 	movs	r2, #0
 	movs	r1, #1
 	uxth	r0, r10
 	bl	gc_add_sblk
-	b	.L3482
-.L3487:
+	b	.L3648
+.L3653:
 	ldrb	r3, [r7, #2]	@ zero_extendqisi2
 	bic	r3, r3, #8
 	strb	r3, [r7, #2]
-	b	.L3488
-.L3492:
+	b	.L3654
+.L3658:
 	mov	r0, #-1
-	b	.L3460
-.L3510:
+	b	.L3626
+.L3676:
 	.align	2
-.L3509:
-	.word	.LANCHOR213
+.L3675:
+	.word	.LANCHOR218
 	.word	.LC0
 	.word	.LANCHOR10
-	.word	.LC222
-	.word	.LANCHOR66
-	.word	.LANCHOR67
-	.word	.LANCHOR123
+	.word	.LC228
+	.word	.LANCHOR68
+	.word	.LANCHOR31
+	.word	.LANCHOR69
+	.word	.LANCHOR125
+	.word	.LANCHOR131
 	.word	.LANCHOR129
-	.word	.LANCHOR127
-	.word	.LC221
+	.word	.LC227
 	.size	zftl_read, .-zftl_read
 	.section	.text.ftl_vendor_read,"ax",%progbits
 	.align	1
@@ -22633,92 +23879,99 @@ gc_check_data_one_wl:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #32
-	ldr	r4, .L3541
-	ldr	r3, .L3541+4
+	ldr	r4, .L3711
+	ldr	r3, .L3711+4
 	ldr	r2, [r4, #8]
 	ldr	r7, [r3]
 	mov	r8, r3
-	cbnz	r2, .L3517
+	cbnz	r2, .L3683
 	movs	r0, #1
 	bl	buf_alloc
 	str	r0, [r4, #8]
-.L3517:
+.L3683:
 	ldr	r5, [r4, #8]
-	cbnz	r5, .L3518
-	mov	r2, #494
-	ldr	r1, .L3541+8
-	ldr	r0, .L3541+12
+	cbnz	r5, .L3684
+	mov	r2, #612
+	ldr	r1, .L3711+8
+	ldr	r0, .L3711+12
 	bl	printf
-.L3518:
+.L3684:
 	add	r3, r7, #96
 	mov	r10, #0
-.L3519:
+.L3685:
 	ldrb	r1, [r7, #89]	@ zero_extendqisi2
 	cmp	r10, r1
-	bge	.L3528
+	bge	.L3695
 	movs	r6, #1
-	b	.L3529
-.L3527:
-	ldr	r2, .L3541+16
-	ldrh	r0, [r3]
-	ldrh	r1, [r2]
-	ldr	r2, .L3541+20
-	ldrb	ip, [r2]	@ zero_extendqisi2
-	muls	r0, r1, r0
+	b	.L3696
+.L3694:
+	ldr	r2, .L3711+16
+	ldrh	r1, [r3]
+	ldrh	ip, [r2]
+	ldr	r2, .L3711+20
+	ldrb	r0, [r2]	@ zero_extendqisi2
+	mul	ip, ip, r1
+	cmp	r0, #2
+	beq	.L3686
+	ldr	r1, .L3711+24
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	cmp	r1, #0
+	beq	.L3687
+.L3686:
 	ldrh	r1, [r4, #12]
-	cmp	ip, #3
-	bne	.L3520
-	add	r1, r1, r0
-	orr	r1, r1, r6, lsl #24
-.L3540:
+	subs	r1, r1, #1
+	add	r1, r1, ip
+	add	r1, r1, r6
+	orr	r1, r1, r0, lsl #24
+.L3689:
 	str	r1, [r5, #24]
 	mov	r0, r5
 	movs	r1, #1
 	str	r3, [sp, #28]
 	bl	sblk_read_page
 	ldr	r1, [r5, #36]
-	ldr	fp, .L3541+56
+	ldr	fp, .L3711+68
 	ldr	r3, [sp, #28]
 	adds	r1, r1, #1
-	beq	.L3523
+	beq	.L3690
 	ldr	r0, [fp]
 	ldrh	ip, [r4, #18]
 	ldr	r1, [r5, #12]
 	ldr	r2, [r0, ip, lsl #2]
 	ldr	r0, [r1, #4]
 	cmp	r2, r0
-	bne	.L3523
-	ldr	r0, .L3541+24
+	bne	.L3690
+	ldr	r0, .L3711+28
 	ldr	r1, [r1, #8]
 	ldr	r0, [r0]
 	ldr	r0, [r0, ip, lsl #2]
 	cmp	r0, r1
-	beq	.L3524
-.L3523:
+	beq	.L3691
+.L3690:
 	ldr	r1, [fp]
 	ldrh	r0, [r4, #18]
 	ldr	r0, [r1, r0, lsl #2]
 	adds	r0, r0, #1
-	beq	.L3524
-	ldr	r6, .L3541+28
+	beq	.L3691
+	ldr	r6, .L3711+32
 	ldrb	r3, [r7, #89]	@ zero_extendqisi2
-	ldr	r0, .L3541+32
+	ldr	r0, .L3711+36
 	ldrh	r2, [r6]
 	muls	r3, r2, r3
 	movs	r2, #4
 	bl	rknand_print_hex
 	ldrh	r2, [r6]
 	ldrb	r3, [r7, #89]	@ zero_extendqisi2
-	ldr	r6, .L3541+24
-	ldr	r0, .L3541+36
+	ldr	r6, .L3711+28
+	ldr	r0, .L3711+40
 	muls	r3, r2, r3
 	ldr	r1, [r6]
 	movs	r2, #4
 	bl	rknand_print_hex
-	ldr	r3, .L3541+40
+	ldr	r3, .L3711+44
 	ldr	r3, [r3]
 	lsls	r3, r3, #21
-	bpl	.L3525
+	bpl	.L3692
 	ldr	r3, [r5, #12]
 	ldrh	r2, [r4, #18]
 	ldr	r1, [fp]
@@ -22729,7 +23982,7 @@ gc_check_data_one_wl:
 	ldr	r0, [r3, #4]
 	str	r0, [sp, #8]
 	ldr	r3, [r3]
-	ldr	r0, .L3541+44
+	ldr	r0, .L3711+48
 	str	r3, [sp, #4]
 	ldr	r3, [r6]
 	ldr	r3, [r3, r2, lsl #2]
@@ -22738,74 +23991,86 @@ gc_check_data_one_wl:
 	ldr	r2, [r5, #36]
 	ldr	r1, [r5, #24]
 	bl	printf
-.L3525:
+.L3692:
 	ldr	r3, [r8]
 	movs	r1, #0
 	ldrh	r0, [r3, #80]
 	bl	ftl_sblk_dump
-	ldr	r3, .L3541+48
-	mov	r0, #-1
-	ldrh	r2, [r7, #80]
+	ldr	r3, .L3711+52
 	movs	r1, #0
+	ldrh	r2, [r7, #80]
 	ldr	r3, [r3]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-.L3526:
-.L3516:
-	add	sp, sp, #32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3520:
-	cmp	ip, #2
-	itett	eq
-	addeq	r1, r1, #-1
-	addne	r1, r1, r0
-	addeq	r1, r1, r0
-	addeq	r1, r1, r6
+	ldr	r2, [r8]
+	ldr	r3, [r2, #556]
+	adds	r3, r3, #1
+	str	r3, [r2, #556]
+	ldr	r3, .L3711+56
+	ldr	r3, [r3]
+	ldr	r2, [r3, #156]
+	ldr	r3, .L3711+60
+	cmp	r2, r3
+	bne	.L3697
+	ldr	r0, [r5, #24]
+	bl	ftl_mask_bad_block
+.L3697:
+	mov	r0, #-1
+	b	.L3682
+.L3687:
+	ldrh	r1, [r4, #12]
+	cmp	r0, #3
+	add	r1, r1, ip
 	it	eq
-	orreq	r1, r1, #33554432
-	b	.L3540
-.L3524:
+	orreq	r1, r1, r6, lsl #24
+	b	.L3689
+.L3691:
 	ldrh	r1, [r4, #18]
 	adds	r6, r6, #1
 	adds	r1, r1, #1
 	strh	r1, [r4, #18]	@ movhi
-.L3529:
+.L3696:
 	ldrh	r1, [r4, #16]
 	cmp	r6, r1
-	ble	.L3527
+	ble	.L3694
 	add	r10, r10, #1
 	adds	r3, r3, #2
-	b	.L3519
-.L3528:
+	b	.L3685
+.L3695:
 	ldrh	r3, [r4, #12]
 	adds	r2, r3, #1
 	strh	r2, [r4, #12]	@ movhi
-	ldr	r2, .L3541+52
+	ldr	r2, .L3711+64
 	ldrb	r0, [r2]	@ zero_extendqisi2
-	cmp	r0, #0
-	beq	.L3516
-	adds	r3, r3, #2
+	cbz	r0, .L3682
 	movs	r0, #0
+	adds	r3, r3, #2
 	strh	r3, [r4, #12]	@ movhi
-	b	.L3516
-.L3542:
+.L3693:
+.L3682:
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3712:
 	.align	2
-.L3541:
-	.word	.LANCHOR63
+.L3711:
+	.word	.LANCHOR64
 	.word	.LANCHOR10
-	.word	.LANCHOR214
+	.word	.LANCHOR219
 	.word	.LC0
-	.word	.LANCHOR103
-	.word	.LANCHOR71
-	.word	.LANCHOR153
-	.word	.LANCHOR77
-	.word	.LC223
-	.word	.LC224
+	.word	.LANCHOR105
+	.word	.LANCHOR73
+	.word	.LANCHOR35
+	.word	.LANCHOR156
+	.word	.LANCHOR79
+	.word	.LC229
+	.word	.LC230
 	.word	.LANCHOR14
-	.word	.LC225
+	.word	.LC231
 	.word	.LANCHOR9
-	.word	.LANCHOR72
-	.word	.LANCHOR152
+	.word	.LANCHOR104
+	.word	1145785929
+	.word	.LANCHOR74
+	.word	.LANCHOR155
 	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
 	.global	__aeabi_idivmod
 	.section	.text.ftl_update_l2p_map,"ax",%progbits
@@ -22819,13 +24084,13 @@ gc_check_data_one_wl:
 ftl_update_l2p_map:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L3572
+	ldr	r3, .L3742
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #24
 	ldrb	r7, [r0, #9]	@ zero_extendqisi2
 	mov	r6, r0
 	ldrh	r3, [r3]
-	ldr	r2, .L3572+4
+	ldr	r2, .L3742+4
 	muls	r7, r3, r7
 	ldr	r4, [r2]
 	ldrh	r3, [r0, #12]
@@ -22835,77 +24100,77 @@ ftl_update_l2p_map:
 	subs	r3, r3, #1
 	ldr	r3, [r4, r3, lsl #2]
 	adds	r3, r3, #1
-	beq	.L3544
-	mov	r2, #1640
-	ldr	r1, .L3572+8
-	ldr	r0, .L3572+12
+	beq	.L3714
+	movw	r2, #1733
+	ldr	r1, .L3742+8
+	ldr	r0, .L3742+12
 	bl	printf
-.L3544:
+.L3714:
 	movs	r5, #0
 	subs	r4, r4, #4
 	mov	r10, r5
-.L3545:
+.L3715:
 	cmp	r10, r7
-	bne	.L3551
-	ldr	r3, .L3572+16
-	ldr	r4, .L3572+20
+	bne	.L3721
+	ldr	r3, .L3742+16
+	ldr	r4, .L3742+20
 	ldr	r3, [r3]
 	tst	r3, #4096
-	beq	.L3552
+	beq	.L3722
 	ldrh	r1, [r6]
 	mov	r2, r5
 	ldr	r3, [r4]
-	ldr	r0, .L3572+24
+	ldr	r0, .L3742+24
 	ldrh	r3, [r3, r1, lsl #1]
 	bl	printf
-.L3552:
+.L3722:
 	ldrh	r2, [r6]
 	ldr	r3, [r4]
 	strh	r5, [r3, r2, lsl #1]	@ movhi
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3551:
+.L3721:
 	ldr	r8, [r4, #4]!
 	cmp	r8, #-1
-	beq	.L3546
-	ldr	r3, .L3572+28
+	beq	.L3716
+	ldr	r3, .L3742+28
 	mov	r0, r8
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	lsls	r1, r1, #7
 	bl	__aeabi_uidiv
 	uxth	r3, r0
 	str	r3, [sp]
-	ldr	r3, .L3572+16
+	ldr	r3, .L3742+16
 	ldr	r3, [r3]
 	lsls	r2, r3, #19
-	bpl	.L3547
+	bpl	.L3717
 	mov	r3, r10
 	mov	r2, r8
 	ldr	r1, [sp]
-	ldr	r0, .L3572+32
+	ldr	r0, .L3742+32
 	bl	printf
-.L3547:
+.L3717:
 	mov	r8, r4
 	mov	fp, r10
-.L3550:
+.L3720:
 	ldr	r0, [r8]
 	adds	r3, r0, #1
-	beq	.L3548
-	ldr	r3, .L3572+28
+	beq	.L3718
+	ldr	r3, .L3742+28
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	lsls	r1, r1, #7
 	bl	__aeabi_uidiv
 	ldr	r3, [sp]
 	uxth	r0, r0
 	cmp	r3, r0
-	bne	.L3548
+	bne	.L3718
 	ldrb	r3, [r6, #9]	@ zero_extendqisi2
 	mov	r0, fp
 	mov	r1, r3
 	str	r3, [sp, #12]
 	bl	__aeabi_idivmod
-	ldr	r3, .L3572+36
+	ldr	r3, .L3742+36
 	adds	r1, r1, #8
 	ldrh	r0, [r6, r1, lsl #1]
 	ldrh	r2, [r3]
@@ -22917,18 +24182,18 @@ ftl_update_l2p_map:
 	bl	__aeabi_idiv
 	ldr	r2, [sp, #8]
 	add	r2, r2, r0
-	ldr	r0, .L3572+40
+	ldr	r0, .L3742+40
 	str	r2, [sp, #20]
 	ldr	r1, [r8]
 	bl	pm_ppa_update_check
-	cbz	r0, .L3549
+	cbz	r0, .L3719
 	ldr	r1, [sp, #4]
 	mov	r3, r7
 	movs	r2, #4
-	ldr	r0, .L3572+44
+	ldr	r0, .L3742+44
 	ldr	r1, [r1]
 	bl	rknand_print_hex
-.L3549:
+.L3719:
 	adds	r5, r5, #1
 	movs	r2, #1
 	uxth	r5, r5
@@ -22937,29 +24202,29 @@ ftl_update_l2p_map:
 	bl	pm_log2phys
 	mov	r3, #-1
 	str	r3, [r8]
-.L3548:
+.L3718:
 	add	fp, fp, #1
 	add	r8, r8, #4
 	cmp	r7, fp
-	bne	.L3550
-.L3546:
+	bne	.L3720
+.L3716:
 	add	r10, r10, #1
-	b	.L3545
-.L3573:
+	b	.L3715
+.L3743:
 	.align	2
-.L3572:
-	.word	.LANCHOR85
-	.word	.LANCHOR109
-	.word	.LANCHOR215
+.L3742:
+	.word	.LANCHOR87
+	.word	.LANCHOR111
+	.word	.LANCHOR220
 	.word	.LC0
 	.word	.LANCHOR14
 	.word	.LANCHOR9
-	.word	.LC229
-	.word	.LANCHOR123
-	.word	.LC226
-	.word	.LANCHOR103
-	.word	.LC227
-	.word	.LC228
+	.word	.LC235
+	.word	.LANCHOR125
+	.word	.LC232
+	.word	.LANCHOR105
+	.word	.LC233
+	.word	.LC234
 	.size	ftl_update_l2p_map, .-ftl_update_l2p_map
 	.section	.text.ftl_alloc_new_data_sblk,"ax",%progbits
 	.align	1
@@ -22980,10 +24245,10 @@ ftl_alloc_new_data_sblk:
 	ldrh	r0, [r5]
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L3575
+	beq	.L3745
 	bl	zftl_insert_data_list
-.L3575:
-	ldr	r4, .L3579
+.L3745:
+	ldr	r4, .L3749
 	mov	r0, r5
 	ldr	r1, [r4]
 	adds	r1, r1, #16
@@ -22995,12 +24260,12 @@ ftl_alloc_new_data_sblk:
 	ldr	r3, [r4]
 	ldr	r3, [r3, #560]
 	cmp	r3, r6
-	bne	.L3577
+	bne	.L3747
 	movw	r5, #65535
 	cmp	r6, r5
-	beq	.L3577
+	beq	.L3747
 	mov	r1, r6
-	ldr	r0, .L3579+4
+	ldr	r0, .L3749+4
 	bl	printf
 	ldr	r3, [r4]
 	ldr	r0, [r3, #564]
@@ -23009,18 +24274,18 @@ ftl_alloc_new_data_sblk:
 	mov	r2, #-1
 	str	r5, [r3, #560]
 	str	r2, [r3, #564]
-.L3577:
+.L3747:
 	bl	ftl_ext_info_flush
 	movs	r0, #0
 	bl	ftl_info_flush
 	bl	lpa_rebuild_hash
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L3580:
+.L3750:
 	.align	2
-.L3579:
+.L3749:
 	.word	.LANCHOR10
-	.word	.LC230
+	.word	.LC236
 	.size	ftl_alloc_new_data_sblk, .-ftl_alloc_new_data_sblk
 	.section	.text.ftl_write_commit,"ax",%progbits
 	.align	1
@@ -23035,13 +24300,13 @@ ftl_write_commit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #32
-	ldr	r7, .L3641
-.L3582:
-	ldr	r1, .L3641+4
+	ldr	r7, .L3811
+.L3752:
+	ldr	r1, .L3811+4
 	ldrb	r3, [r1]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L3584
-	ldr	r0, .L3641+8
+	beq	.L3754
+	ldr	r0, .L3811+8
 	subs	r3, r3, #1
 	strb	r3, [r1]
 	ldrb	r2, [r0]	@ zero_extendqisi2
@@ -23052,54 +24317,54 @@ ftl_write_commit:
 	str	r2, [sp, #20]
 	movs	r2, #48
 	muls	r2, r4, r2
-	ldr	r4, .L3641+12
+	ldr	r4, .L3811+12
 	ldr	r3, [r4]
 	adds	r5, r7, r2
 	ldrb	r2, [r7, r2]	@ zero_extendqisi2
 	strb	r2, [r0]
 	ldr	r2, [r5, #20]
 	cmp	r2, r3
-	bcc	.L3586
-	mov	r2, #502
-	ldr	r1, .L3641+16
-	ldr	r0, .L3641+20
+	bcc	.L3756
+	mov	r2, #510
+	ldr	r1, .L3811+16
+	ldr	r0, .L3811+20
 	bl	printf
-.L3586:
+.L3756:
 	ldr	r2, [sp, #8]
 	movs	r3, #48
 	mla	r3, r3, r2, r7
 	ldr	r2, [r4]
 	ldr	r8, [r3, #20]
 	cmp	r8, r2
-	bcc	.L3587
+	bcc	.L3757
 	ldr	r0, [sp, #20]
-	bl	buf_free
+	bl	zbuf_free
 	mov	r0, #-1
-.L3581:
+.L3751:
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3587:
+.L3757:
 	ldr	r2, [r3, #12]
 	ldr	fp, [r3, #4]
 	ldrb	r4, [r3, #41]	@ zero_extendqisi2
 	ldrb	r3, [r3, #40]	@ zero_extendqisi2
 	str	r2, [sp, #12]
 	str	r3, [sp, #16]
-	ldr	r3, .L3641+24
+	ldr	r3, .L3811+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L3589
-	ldr	r3, .L3641+28
+	cbz	r3, .L3759
+	ldr	r3, .L3811+28
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	add	r3, r7, r3, lsl #4
-.L3590:
+.L3760:
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	cmp	r2, #255
-	bne	.L3591
+	bne	.L3761
 	ldr	r2, [r3, #20]
 	cmp	r8, r2
-	bne	.L3589
+	bne	.L3759
 	ldr	r0, [r3, #4]
 	lsls	r4, r4, #9
 	ldr	r3, [sp, #16]
@@ -23108,35 +24373,35 @@ ftl_write_commit:
 	lsls	r2, r3, #9
 	bl	ftl_memcpy
 	ldr	r0, [sp, #20]
-	bl	buf_free
-	b	.L3582
-.L3591:
+	bl	zbuf_free
+	b	.L3752
+.L3761:
 	add	r2, r2, r2, lsl #1
 	add	r3, r7, r2, lsl #4
-	b	.L3590
-.L3589:
+	b	.L3760
+.L3759:
 	mov	r0, r8
 	bl	lpa_hash_get_ppa
 	str	r0, [sp, #28]
 	adds	r0, r0, #1
-	bne	.L3593
+	bne	.L3763
 	movs	r2, #0
 	add	r1, sp, #28
 	mov	r0, r8
 	bl	pm_log2phys
-.L3593:
-	ldr	r3, .L3641+32
-	ldr	r2, .L3641
+.L3763:
+	ldr	r3, .L3811+32
+	ldr	r2, .L3811
 	ldr	r6, [r3]
 	movs	r3, #0
 	adds	r6, r6, #16
-.L3596:
+.L3766:
 	ldr	r1, [r2, #20]
 	cmp	r8, r1
-	bne	.L3594
+	bne	.L3764
 	ldrb	r1, [r2, #2]	@ zero_extendqisi2
 	lsls	r0, r1, #28
-	bpl	.L3594
+	bpl	.L3764
 	movs	r2, #48
 	bic	r1, r1, #8
 	mla	r3, r2, r3, r7
@@ -23144,65 +24409,65 @@ ftl_write_commit:
 	ldr	r5, [r3, #4]
 	ldr	r3, [r3, #24]
 	str	r3, [sp, #28]
-.L3595:
-	ldr	r10, .L3641+36
+.L3765:
+	ldr	r10, .L3811+36
 	ldr	r2, [sp, #16]
 	ldrb	r3, [r10]	@ zero_extendqisi2
 	cmp	r2, r3
-	bcs	.L3620
-	cbz	r5, .L3598
-	cbz	r4, .L3599
+	bcs	.L3790
+	cbz	r5, .L3768
+	cbz	r4, .L3769
 	lsls	r2, r4, #9
 	mov	r1, r5
 	mov	r0, fp
 	bl	ftl_memcpy
-	ldr	r3, .L3641+32
+	ldr	r3, .L3811+32
 	ldr	r6, [r3]
 	adds	r6, r6, #48
-.L3599:
+.L3769:
 	ldr	r3, [sp, #16]
 	ldrb	r2, [r10]	@ zero_extendqisi2
 	add	r4, r4, r3
 	cmp	r4, r2
-	bcc	.L3600
-	ldr	r3, .L3641+32
+	bcc	.L3770
+	ldr	r3, .L3811+32
 	ldr	r6, [r3]
 	adds	r6, r6, #16
-.L3620:
+.L3790:
 	mov	r10, #0
-	b	.L3597
-.L3594:
+	b	.L3767
+.L3764:
 	adds	r3, r3, #1
 	adds	r2, r2, #48
 	cmp	r3, #32
-	bne	.L3596
+	bne	.L3766
 	movs	r5, #0
-	b	.L3595
-.L3600:
+	b	.L3765
+.L3770:
 	lsls	r0, r4, #9
 	subs	r2, r2, r4
 	lsls	r2, r2, #9
 	adds	r1, r5, r0
 	add	r0, r0, fp
 	bl	ftl_memcpy
-	b	.L3620
-.L3642:
+	b	.L3790
+.L3812:
 	.align	2
-.L3641:
-	.word	.LANCHOR50
-	.word	.LANCHOR58
-	.word	.LANCHOR57
-	.word	.LANCHOR120
-	.word	.LANCHOR216
+.L3811:
+	.word	.LANCHOR52
+	.word	.LANCHOR60
+	.word	.LANCHOR59
+	.word	.LANCHOR122
+	.word	.LANCHOR221
 	.word	.LC0
-	.word	.LANCHOR121
-	.word	.LANCHOR174
-	.word	.LANCHOR10
 	.word	.LANCHOR123
-.L3598:
+	.word	.LANCHOR177
+	.word	.LANCHOR10
+	.word	.LANCHOR125
+.L3768:
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
-	beq	.L3601
+	beq	.L3771
 	movs	r0, #1
 	bl	buf_alloc
 	ldr	r3, [sp, #28]
@@ -23216,13 +24481,13 @@ ftl_write_commit:
 	ldr	r3, [r3, #4]
 	add	r10, r2, #1
 	cmp	r8, r3
-	bne	.L3602
+	bne	.L3772
 	ldr	r3, [r5, #36]
 	adds	r3, r3, #1
-	bne	.L3603
-.L3602:
-	ldr	r3, .L3643
-	ldr	r0, .L3643+4
+	bne	.L3773
+.L3772:
+	ldr	r3, .L3813
+	ldr	r0, .L3813+4
 	ldr	r2, [r3]
 	ldr	r3, [r2, #552]
 	adds	r3, r3, #1
@@ -23236,62 +24501,62 @@ ftl_write_commit:
 	movs	r3, #4
 	ldr	r1, [r5, #12]
 	mov	r2, r3
-	ldr	r0, .L3643+8
+	ldr	r0, .L3813+8
 	bl	rknand_print_hex
-.L3603:
+.L3773:
 	ldr	r3, [r5, #12]
 	ldr	r3, [r3, #4]
 	cmp	r8, r3
-	bne	.L3604
+	bne	.L3774
 	ldr	r3, [r5, #36]
 	adds	r3, r3, #1
-	bne	.L3605
-.L3604:
-	movw	r2, #573
-	ldr	r1, .L3643+12
-	ldr	r0, .L3643+16
+	bne	.L3775
+.L3774:
+	movw	r2, #581
+	ldr	r1, .L3813+12
+	ldr	r0, .L3813+16
 	bl	printf
-.L3605:
-	cbz	r4, .L3606
+.L3775:
+	cbz	r4, .L3776
 	ldr	r3, [sp, #28]
 	lsls	r2, r4, #9
 	adds	r3, r3, #1
-	beq	.L3607
+	beq	.L3777
 	ldr	r1, [r5, #4]
 	mov	r0, fp
 	bl	ftl_memcpy
-.L3608:
-	ldr	r3, .L3643
+.L3778:
+	ldr	r3, .L3813
 	ldr	r6, [r3]
 	adds	r6, r6, #48
-.L3606:
+.L3776:
 	ldr	r3, [sp, #16]
 	add	r4, r4, r3
-	ldr	r3, .L3643+20
+	ldr	r3, .L3813+20
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	cmp	r4, r2
-	bcc	.L3609
-	bls	.L3610
-	ldr	r3, .L3643
+	bcc	.L3779
+	bls	.L3780
+	ldr	r3, .L3813
 	ldr	r6, [r3]
 	adds	r6, r6, #16
-.L3610:
-	cbz	r5, .L3597
+.L3780:
+	cbz	r5, .L3767
 	ldrb	r3, [r5, #2]	@ zero_extendqisi2
 	mov	r1, r5
-	ldr	r0, .L3643+24
+	ldr	r0, .L3813+24
 	bic	r3, r3, #8
 	strb	r3, [r5, #2]
 	bl	buf_remove_buf
 	mov	r0, r5
-	bl	buf_free
-.L3597:
+	bl	zbuf_free
+.L3767:
 	ldrh	r3, [r6, #6]
-	cbnz	r3, .L3612
+	cbnz	r3, .L3782
 	bl	ftl_flush
 	mov	r0, r6
 	bl	ftl_alloc_new_data_sblk
-.L3612:
+.L3782:
 	mov	r0, r6
 	bl	ftl_get_new_free_page
 	ldr	r2, [sp, #8]
@@ -23312,7 +24577,7 @@ ftl_write_commit:
 	ldrh	r1, [r6, #12]
 	str	r0, [r2, #24]
 	orr	r3, r3, #10
-	ldr	r0, .L3643+28
+	ldr	r0, .L3813+28
 	strb	r3, [r2, #2]
 	ldrh	r3, [r6, #10]
 	add	r3, r3, r1
@@ -23320,21 +24585,21 @@ ftl_write_commit:
 	subs	r3, r3, #1
 	strh	r3, [r2, #32]	@ movhi
 	bl	buf_add_tail
-	ldr	r2, .L3643+32
+	ldr	r2, .L3813+32
 	movs	r1, #0
 	ldrb	r3, [r2]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	strb	r3, [r2]
 	cmp	r3, #2
-	ldr	r2, .L3643+36
+	ldr	r2, .L3813+36
 	str	r1, [r2]
 	ldrh	r2, [r6, #6]
-	bhi	.L3613
+	bhi	.L3783
 	cmp	r2, #1
-	bne	.L3585
-.L3613:
-	ldr	r5, .L3643+28
+	bne	.L3755
+.L3783:
+	ldr	r5, .L3813+28
 	mov	ip, #48
 	ldrb	r1, [r6, #5]	@ zero_extendqisi2
 	ldrb	r0, [r5]	@ zero_extendqisi2
@@ -23347,12 +24612,12 @@ ftl_write_commit:
 	it	eq
 	moveq	r4, r3
 	mov	r2, r0
-.L3617:
+.L3787:
 	cmp	r1, r4
-	bne	.L3618
+	bne	.L3788
 	strb	r2, [r5]
 	uxtb	r1, r1
-	ldr	r2, .L3643+32
+	ldr	r2, .L3813+32
 	add	r0, r0, r0, lsl #1
 	subs	r3, r3, r1
 	add	r0, r7, r0, lsl #4
@@ -23360,72 +24625,72 @@ ftl_write_commit:
 	bl	sblk_prog_page
 	ldrh	r3, [r6, #6]
 	cmp	r3, #1
-	bne	.L3585
+	bne	.L3755
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	mov	r0, r6
 	bl	ftl_write_last_log_page
 	mov	r0, r6
 	bl	ftl_alloc_new_data_sblk
-.L3585:
-	ldr	r3, .L3643+40
+.L3755:
+	ldr	r3, .L3813+40
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L3582
-.L3584:
+	bne	.L3752
+.L3754:
 	bl	ftl_write_completed
 	movs	r0, #0
-	b	.L3581
-.L3609:
+	b	.L3751
+.L3779:
 	ldr	r3, [sp, #28]
 	subs	r2, r2, r4
 	lsls	r2, r2, #9
 	lsls	r0, r4, #9
 	adds	r3, r3, #1
-	beq	.L3611
+	beq	.L3781
 	ldr	r1, [r5, #4]
 	add	r1, r1, r0
 	add	r0, r0, fp
 	bl	ftl_memcpy
-	b	.L3610
-.L3611:
+	b	.L3780
+.L3781:
 	movs	r1, #0
 	add	r0, r0, fp
 	bl	ftl_memset
-	b	.L3610
-.L3618:
+	b	.L3780
+.L3788:
 	mul	r2, ip, r2
 	adds	r1, r1, #1
 	ldrb	r2, [r7, r2]	@ zero_extendqisi2
-	b	.L3617
-.L3619:
+	b	.L3787
+.L3789:
 	lsls	r2, r4, #9
 	mov	r10, r5
-.L3607:
+.L3777:
 	movs	r1, #0
 	mov	r0, fp
 	bl	ftl_memset
-	b	.L3608
-.L3601:
+	b	.L3778
+.L3771:
 	cmp	r4, #0
-	bne	.L3619
+	bne	.L3789
 	mov	r10, r4
 	mov	r5, r4
-	b	.L3606
-.L3644:
+	b	.L3776
+.L3814:
 	.align	2
-.L3643:
+.L3813:
 	.word	.LANCHOR10
-	.word	.LC231
-	.word	.LC189
-	.word	.LANCHOR216
+	.word	.LC237
+	.word	.LC195
+	.word	.LANCHOR221
 	.word	.LC0
+	.word	.LANCHOR125
+	.word	.LANCHOR131
+	.word	.LANCHOR177
 	.word	.LANCHOR123
-	.word	.LANCHOR129
-	.word	.LANCHOR174
-	.word	.LANCHOR121
-	.word	.LANCHOR217
-	.word	.LANCHOR58
+	.word	.LANCHOR222
+	.word	.LANCHOR60
 	.size	ftl_write_commit, .-ftl_write_commit
 	.section	.text.gc_do_copy_back,"ax",%progbits
 	.align	1
@@ -23436,19 +24701,19 @@ ftl_write_commit:
 	.fpu softvfp
 	.type	gc_do_copy_back, %function
 gc_do_copy_back:
-	@ args = 0, pretend = 0, frame = 48
+	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L3742
+	ldr	r3, .L3959
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #72
+	sub	sp, sp, #88
 	ldrb	r0, [r3]	@ zero_extendqisi2
 	cmp	r0, #0
-	bne	.L3646
+	bne	.L3816
 	bl	buf_alloc
 	mov	r4, r0
 	cmp	r0, #0
-	beq	.L3645
-	ldr	r6, .L3742+4
+	beq	.L3815
+	ldr	r6, .L3959+4
 	ldrh	r2, [r6, #22]
 	mov	r0, r2
 	bl	gc_get_src_ppa_from_index
@@ -23461,63 +24726,63 @@ gc_do_copy_back:
 	bl	sblk_read_page
 	ldr	r3, [r4, #36]
 	adds	r1, r3, #1
-	beq	.L3648
+	beq	.L3818
 	cmp	r3, #512
-	bne	.L3649
-.L3648:
-	movw	r2, #731
-	ldr	r1, .L3742+8
-	ldr	r0, .L3742+12
+	bne	.L3819
+.L3818:
+	movw	r2, #863
+	ldr	r1, .L3959+8
+	ldr	r0, .L3959+12
 	bl	printf
-.L3649:
+.L3819:
 	ldr	r3, [r4, #12]
 	ldr	r5, [r3, #4]
 	mov	r0, r5
 	bl	lpa_hash_get_ppa
-	str	r0, [sp, #48]
+	str	r0, [sp, #64]
 	adds	r0, r0, #1
-	bne	.L3650
+	bne	.L3820
 	movs	r2, #0
-	add	r1, sp, #48
+	add	r1, sp, #64
 	mov	r0, r5
 	bl	pm_log2phys
-.L3650:
-	ldr	r8, [sp, #48]
+.L3820:
+	ldr	r8, [sp, #64]
 	cmp	r7, r8
-	bne	.L3651
-	ldr	r0, .L3742+16
+	bne	.L3821
+	ldr	r0, .L3959+16
 	movs	r3, #0
-.L3654:
+.L3824:
 	adds	r2, r0, r3
 	ldr	r1, [r2, #20]
 	cmp	r5, r1
-	bne	.L3652
+	bne	.L3822
 	ldrb	r2, [r2, #2]	@ zero_extendqisi2
 	lsls	r2, r2, #30
-	bpl	.L3652
+	bpl	.L3822
 	mov	r0, r4
-	bl	buf_free
-	ldr	r3, .L3742+20
+	bl	zbuf_free
+	ldr	r3, .L3959+20
 	ldr	r3, [r3]
 	lsls	r1, r3, #23
-	bpl	.L3645
+	bpl	.L3815
 	ldrh	r3, [r6, #22]
 	mov	r2, r7
 	mov	r1, r5
-	ldr	r0, .L3742+24
+	ldr	r0, .L3959+24
 	bl	printf
-.L3645:
-	add	sp, sp, #72
+.L3815:
+	add	sp, sp, #88
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3652:
+.L3822:
 	adds	r3, r3, #48
 	cmp	r3, #1536
-	bne	.L3654
+	bne	.L3824
 	movs	r3, #0
 	str	r5, [r4, #20]
 	strb	r3, [r4, #41]
-	ldr	r3, .L3742+28
+	ldr	r3, .L3959+28
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	strb	r3, [r4, #40]
 	ldrb	r3, [r4, #2]	@ zero_extendqisi2
@@ -23526,10 +24791,10 @@ gc_do_copy_back:
 	ldr	r3, [r4, #12]
 	ldr	r3, [r3]
 	str	r3, [r4, #16]
-	ldr	r3, .L3742+20
+	ldr	r3, .L3959+20
 	ldr	r3, [r3]
 	lsls	r2, r3, #23
-	bpl	.L3655
+	bpl	.L3825
 	mov	r0, r5
 	bl	lpa_hash_get_ppa
 	ldrh	r3, [r6, #22]
@@ -23538,13 +24803,13 @@ gc_do_copy_back:
 	mov	r1, r5
 	str	r3, [sp, #4]
 	mov	r3, r0
-	ldr	r0, .L3742+32
+	ldr	r0, .L3959+32
 	bl	printf
-.L3655:
+.L3825:
 	mov	r0, r4
 	bl	ftl_gc_write_buf
 	bl	ftl_write_commit
-	ldr	r3, .L3742+36
+	ldr	r3, .L3959+36
 	ldr	r2, [r3]
 	ldr	r3, [r2, #60]
 	adds	r3, r3, #1
@@ -23552,12 +24817,12 @@ gc_do_copy_back:
 	ldrh	r3, [r6, #24]
 	adds	r3, r3, #1
 	strh	r3, [r6, #24]	@ movhi
-	b	.L3645
-.L3651:
-	ldr	r3, .L3742+20
+	b	.L3815
+.L3821:
+	ldr	r3, .L3959+20
 	ldr	r3, [r3]
 	lsls	r3, r3, #23
-	bpl	.L3656
+	bpl	.L3826
 	mov	r0, r5
 	bl	lpa_hash_get_ppa
 	ldrh	r3, [r6, #22]
@@ -23566,572 +24831,824 @@ gc_do_copy_back:
 	mov	r1, r5
 	str	r3, [sp, #4]
 	mov	r3, r0
-	ldr	r0, .L3742+32
+	ldr	r0, .L3959+32
 	bl	printf
-.L3656:
+.L3826:
 	mov	r0, r4
-	bl	buf_free
-	b	.L3645
-.L3646:
-	ldr	r3, .L3742+40
-	ldr	r5, .L3742+4
+	bl	zbuf_free
+	b	.L3815
+.L3816:
+	ldr	r3, .L3959+40
+	ldr	r7, .L3959+4
 	ldr	r3, [r3]
-	str	r3, [sp, #28]
-	ldr	r3, .L3742+44
-	ldrb	r8, [r3]	@ zero_extendqisi2
-	ldr	r3, [sp, #28]
-	cmp	r8, #3
-	ldrb	r7, [r3, #89]	@ zero_extendqisi2
-	bne	.L3657
-	ldr	r3, .L3742+48
-	ldrh	r4, [r5, #310]
+	str	r3, [sp, #40]
+	ldr	r3, .L3959+44
+	ldrb	fp, [r3]	@ zero_extendqisi2
+	ldr	r3, [sp, #40]
+	cmp	fp, #3
+	ldrb	r10, [r3, #89]	@ zero_extendqisi2
+	bne	.L3827
+	ldr	r3, .L3959+48
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L3658
-	add	r1, r7, r7, lsl #1
-	mov	r0, r4
+	cmp	r3, #0
+	beq	.L3828
+	ldrh	r5, [r7, #566]
+	mov	r1, r10
+	mov	r0, r5
 	bl	__aeabi_idiv
-	uxth	r10, r0
-	sub	r0, r7, r7, lsl #2
-	str	r8, [sp, #32]
-	smulbb	r0, r0, r10
-	add	r0, r0, r4
-	uxth	fp, r0
-.L3659:
-	ldr	r3, [sp, #32]
-	muls	r3, r7, r3
+	ldr	r3, .L3959+52
+	uxth	r4, r0
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L3829
+	ldr	r3, .L3959+56
+	ldrh	r3, [r3, r0, lsl #1]
+	cmp	r3, #0
+	ite	eq
+	moveq	fp, #1
+	movne	fp, #2
+.L3830:
+	smulbb	r0, r10, r4
+	subs	r0, r5, r0
+.L3954:
+	uxth	r3, r0
+	str	r3, [sp, #32]
+.L3831:
+	mul	r3, r10, fp
+	str	r3, [sp, #44]
+	ldr	r3, .L3959+60
+	ldrh	r3, [r3]
+	mul	r10, r10, r3
+	add	r3, r10, #-1
+	ldr	r10, .L3959+56
+	str	r3, [sp, #48]
+	ldr	r3, .L3959+52
+	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r3, [sp, #36]
-	ldr	r3, .L3742+52
-	ldrh	r1, [r3]
-	ldr	r3, .L3742+56
+	ldr	r3, .L3959+64
 	ldr	r8, [r3]
-	muls	r1, r7, r1
-	ldrh	r3, [r5, #20]
+	ldrh	r3, [r7, #20]
 	movs	r7, #0
-	str	r3, [sp, #40]
-	subs	r1, r1, #1
-	ldr	r3, .L3742+4
-.L3662:
-	ldr	r0, [sp, #36]
-	uxth	r2, r7
-	cmp	r2, r0
-	blt	.L3664
-.L3696:
-	movs	r6, #1
-	b	.L3660
-.L3658:
+	str	r3, [sp, #52]
+	ldr	r3, .L3959+4
+.L3835:
+	ldr	r1, [sp, #44]
+	uxth	lr, r7
+	mov	r2, lr
+	cmp	lr, r1
+	blt	.L3839
+.L3888:
+	mov	r8, #1
+	b	.L3833
+.L3829:
+	ldr	r3, .L3959+68
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L3882
+	sub	r3, r4, #62
+	cmp	r3, #2160
+	bcs	.L3883
+	mov	r1, fp
 	mov	r0, r4
-	mov	r1, r7
+	bl	__aeabi_uidivmod
+	uxth	r1, r1
+	cmp	r1, #0
+	ite	ne
+	movne	fp, #1
+	moveq	fp, #2
+	b	.L3830
+.L3882:
+	mov	fp, #1
+	b	.L3830
+.L3883:
+	mov	fp, #2
+	b	.L3830
+.L3828:
+	ldr	r3, .L3959+72
+	ldrh	r5, [r7, #566]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L3832
+	add	r1, r10, r10, lsl #1
+	mov	r0, r5
 	bl	__aeabi_idiv
-	ldr	r3, .L3742+60
-	str	r8, [sp, #32]
-	ldrh	r6, [r3, r0, lsl #1]
-	smulbb	r0, r0, r7
-	subs	r0, r4, r0
-	lsr	r10, r6, #3
-	uxth	fp, r0
-	mla	r4, r7, r10, fp
-	and	r6, r6, #7
-	cmp	r6, #1
-	add	r4, r4, r4, lsl #1
-	uxth	r4, r4
-	beq	.L3659
-.L3660:
-	ldr	r3, .L3742+20
+	uxth	r4, r0
+	sub	r0, r10, r10, lsl #2
+	smulbb	r0, r0, r4
+	add	r0, r0, r5
+	b	.L3954
+.L3960:
+	.align	2
+.L3959:
+	.word	.LANCHOR78
+	.word	.LANCHOR64
+	.word	.LANCHOR223
+	.word	.LC0
+	.word	.LANCHOR52
+	.word	.LANCHOR14
+	.word	.LC238
+	.word	.LANCHOR125
+	.word	.LC239
+	.word	.LANCHOR104
+	.word	.LANCHOR10
+	.word	.LANCHOR73
+	.word	.LANCHOR35
+	.word	.LANCHOR204
+	.word	.LANCHOR224
+	.word	.LANCHOR79
+	.word	.LANCHOR156
+	.word	.LANCHOR205
+	.word	.LANCHOR77
+.L3832:
+	mov	r0, r5
+	mov	r1, r10
+	bl	__aeabi_idiv
+	ldr	r3, .L3961
+	ldrh	r8, [r3, r0, lsl #1]
+	smulbb	r0, r0, r10
+	subs	r5, r5, r0
+	lsr	r4, r8, #3
+	uxth	r3, r5
+	mla	r5, r10, r4, r3
+	str	r3, [sp, #32]
+	and	r8, r8, #7
+	cmp	r8, #1
+	add	r5, r5, r5, lsl #1
+	uxth	r5, r5
+	beq	.L3831
+.L3833:
+	ldr	r3, .L3961+4
 	ldr	r3, [r3]
 	lsls	r0, r3, #23
-	bpl	.L3665
-	ldr	r3, .L3742+56
-	mov	r2, r6
-	str	r4, [sp, #8]
-	mov	r1, r10
-	ldr	r0, .L3742+64
+	bpl	.L3840
+	ldr	r3, .L3961+8
+	mov	r1, r4
+	ldr	r2, .L3961+12
+	ldr	r0, .L3961+16
 	ldr	r3, [r3]
-	ldr	r3, [r3, r4, lsl #2]
+	ldrh	r2, [r2, r4, lsl #1]
+	str	r5, [sp, #12]
+	str	r2, [sp, #16]
+	add	r2, r3, r5, lsl #2
+	ldr	r2, [r2, #4]
+	str	r2, [sp, #8]
+	mov	r2, r8
+	ldr	r3, [r3, r5, lsl #2]
 	str	r3, [sp, #4]
-	ldrh	r3, [r5, #310]
+	ldr	r3, .L3961+20
+	ldrh	r3, [r3, #566]
 	str	r3, [sp]
-	mov	r3, fp
+	ldr	r3, [sp, #32]
 	bl	printf
-.L3665:
+.L3840:
 	movs	r3, #0
-.L3740:
-	str	r3, [sp, #40]
-	ldrh	r3, [sp, #40]
-	mov	r8, r3
+.L3956:
+	str	r3, [sp, #48]
+	ldrh	r3, [sp, #48]
+	str	r3, [sp, #44]
 	str	r3, [sp, #36]
-	ldr	r3, [sp, #28]
-	ldrb	r1, [r3, #89]	@ zero_extendqisi2
-	ldr	r3, [sp, #32]
-	mul	r0, r1, r3
-	cmp	r8, r0
-	blt	.L3681
-	ldr	r3, .L3742+44
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #3
-	bne	.L3682
-	ldr	r3, .L3742+48
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	ldr	r3, [sp, #48]
-	cmp	r2, #0
-	beq	.L3683
-	movs	r2, #0
-.L3686:
-	strb	r2, [r3, #44]
-	add	r0, sp, #48
-	mov	r2, r1
-	add	r1, sp, #60
-	bl	sblk_xlc_prog_pages
-.L3687:
-	ldr	r3, [sp, #28]
-	ldr	r1, .L3742+48
+	ldr	r3, [sp, #40]
+	ldr	r1, [sp, #44]
 	ldrb	r2, [r3, #89]	@ zero_extendqisi2
+	mul	r3, r2, fp
+	cmp	r1, r3
+	blt	.L3862
+	ldr	r1, .L3961+24
 	ldrb	r1, [r1]	@ zero_extendqisi2
-	uxth	r3, r2
-	cmp	r1, #0
-	beq	.L3692
-	add	r3, r3, r3, lsl #1
-.L3693:
-	ldr	r1, .L3742+36
-	ldr	r0, [r1]
-	ldr	r1, [r0, #52]
-	add	r1, r1, r3
-	str	r1, [r0, #52]
-	ldr	r1, .L3742+4
-	ldrh	r0, [r1, #310]
-	add	r3, r3, r0
-	uxth	r3, r3
-	strh	r3, [r1, #310]	@ movhi
-	ldr	r1, .L3742+52
-	ldrh	r1, [r1]
-	muls	r2, r1, r2
-	cmp	r3, r2
-	itttt	ge
-	ldrge	r3, .L3742+40
-	movge	r2, #0
-	ldrge	r3, [r3]
-	strhge	r2, [r3, #86]	@ movhi
-	bl	gc_write_completed
-	b	.L3645
-.L3657:
-	ldr	r3, .L3742+68
-	mov	r1, r7
-	ldrh	r4, [r5, #310]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	mov	r0, r4
-	cbnz	r3, .L3661
-	bl	__aeabi_idiv
-	uxth	r10, r0
-	movs	r3, #1
-	smulbb	r0, r7, r10
-	subs	r0, r4, r0
-	uxth	fp, r0
-.L3738:
-	str	r3, [sp, #32]
-	b	.L3659
-.L3661:
-	bl	__aeabi_idiv
-	uxth	r10, r0
-	movs	r3, #2
-	smulbb	r0, r7, r10
-	subs	r0, r4, r0
-	uxth	fp, r0
-	b	.L3738
-.L3743:
-	.align	2
-.L3742:
-	.word	.LANCHOR76
-	.word	.LANCHOR63
-	.word	.LANCHOR218
-	.word	.LC0
-	.word	.LANCHOR50
-	.word	.LANCHOR14
-	.word	.LC232
-	.word	.LANCHOR123
-	.word	.LC233
-	.word	.LANCHOR102
-	.word	.LANCHOR10
-	.word	.LANCHOR71
-	.word	.LANCHOR75
-	.word	.LANCHOR77
-	.word	.LANCHOR153
-	.word	.LANCHOR219
-	.word	.LC234
-	.word	.LANCHOR72
-.L3664:
-	add	r2, r2, r4
+	cmp	r1, #3
+	bne	.L3863
+	ldr	r1, .L3961+28
+	ldrb	r0, [r1]	@ zero_extendqisi2
+	cmp	r0, #0
+	beq	.L3864
+	movs	r0, #0
+	subs	r3, r3, #1
+.L3865:
+	uxth	r1, r0
+	adds	r0, r0, #1
+	cmp	r1, r3
+	blt	.L3866
+.L3957:
+	add	r1, sp, #88
+	add	r3, r1, r3, lsl #2
+	movs	r1, #255
+	ldr	r3, [r3, #-24]
+	strb	r1, [r3]
+	smulbb	r1, fp, r2
+	ldr	r0, [sp, #64]
+	uxtb	r1, r1
+	bl	sblk_prog_page
+	b	.L3867
+.L3827:
+	ldr	r3, .L3961+32
+	mov	r1, r10
+	ldrh	r5, [r7, #566]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	mov	r0, r5
+	cbnz	r3, .L3834
+	bl	__aeabi_idiv
+	uxth	r4, r0
+	mov	fp, #1
+	smulbb	r0, r10, r4
+	subs	r0, r5, r0
+	uxth	r3, r0
+	str	r3, [sp, #32]
+	b	.L3831
+.L3834:
+	bl	__aeabi_idiv
+	uxth	r4, r0
+	mov	fp, #2
+	smulbb	r0, r10, r4
+	subs	r0, r5, r0
+	uxth	r3, r0
+	str	r3, [sp, #32]
+	b	.L3831
+.L3839:
+	ldr	r1, [sp, #48]
+	add	r2, r2, r5
 	cmp	r2, r1
-	beq	.L3696
-	ldr	r0, [r8, r2, lsl #2]
-	adds	r0, r0, #1
-	bne	.L3663
-	ldrh	r6, [r3, #22]
-	str	r3, [sp, #44]
-	ldr	r3, [sp, #40]
-	cmp	r6, r3
-	bcs	.L3645
-	mov	r0, r6
-	adds	r6, r6, #1
+	bne	.L3836
+	ldr	r1, [sp, #36]
+	cmp	r1, #0
+	beq	.L3888
+	ldrh	r1, [r10, r4, lsl #1]
+	cmp	r1, r4
+	bcs	.L3888
+	tst	lr, #1
+	beq	.L3888
+.L3836:
+	ldr	r1, [r8, r2, lsl #2]
+	adds	r1, r1, #1
+	bne	.L3837
+	ldrh	r1, [r3, #22]
+	ldr	r0, [sp, #52]
+	cmp	r1, r0
+	bcs	.L3815
+	ldr	r0, [sp, #36]
+	cbz	r0, .L3838
+	ldrh	ip, [r10, r4, lsl #1]
+	cmp	ip, r4
+	bcs	.L3838
+	tst	lr, #1
+	beq	.L3838
+	ldr	r1, [r8, ip, lsl #2]
+	str	r1, [r8, r2, lsl #2]
+.L3837:
+	adds	r7, r7, #1
+	b	.L3835
+.L3838:
+	mov	r0, r1
+	str	r3, [sp, #56]
 	bl	gc_get_src_ppa_from_index
-	ldr	r3, [sp, #44]
-	strh	r6, [r3, #22]	@ movhi
+	ldr	r3, [sp, #56]
+	adds	r1, r1, #1
+	strh	r1, [r3, #22]	@ movhi
 	str	r0, [r8, r2, lsl #2]
-.L3663:
-	adds	r7, r7, #1
-	b	.L3662
-.L3681:
-	ldr	r3, .L3744
-	add	r7, r4, r8
+	b	.L3837
+.L3962:
+	.align	2
+.L3961:
+	.word	.LANCHOR225
+	.word	.LANCHOR14
+	.word	.LANCHOR156
+	.word	.LANCHOR224
+	.word	.LC240
+	.word	.LANCHOR64
+	.word	.LANCHOR73
+	.word	.LANCHOR35
+	.word	.LANCHOR74
+.L3862:
+	ldr	r3, [sp, #44]
+	adds	r7, r5, r3
+	ldr	r3, .L3963
 	ldr	r3, [r3]
 	ldrb	r3, [r3, r7]	@ zero_extendqisi2
 	cmp	r3, #255
-	bne	.L3667
+	bne	.L3842
 	movs	r0, #0
 	bl	buf_alloc
-	mov	r5, r0
-	cbnz	r0, .L3668
+	mov	r6, r0
+	cbnz	r0, .L3843
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	bl	gc_write_completed
 	bl	gc_free_temp_buf
-	mov	r0, r5
+	mov	r0, r6
 	bl	buf_alloc
-	mov	r5, r0
+	mov	r6, r0
 	cmp	r0, #0
-	beq	.L3645
-.L3668:
-	ldr	r3, .L3744
-	ldrb	r2, [r5, #1]	@ zero_extendqisi2
+	beq	.L3815
+.L3843:
+	ldr	r3, .L3963
+	ldrb	r2, [r6, #1]	@ zero_extendqisi2
 	ldr	r3, [r3]
 	strb	r2, [r3, r7]
-	ldr	r2, .L3744+4
-	strb	r6, [r5, #45]
+	ldr	r2, .L3963+4
+	strb	r8, [r6, #45]
 	ldrb	r3, [r2, #7]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	strb	r3, [r2, #7]
 	ldr	r3, [sp, #36]
-	add	r3, r3, r4
-	strh	r3, [r5, #32]	@ movhi
-	ldr	r3, .L3744+8
+	add	r3, r3, r5
+	strh	r3, [r6, #32]	@ movhi
+	ldr	r3, .L3963+8
 	ldrh	r2, [r3]
-	ldr	r3, [sp, #28]
+	ldr	r3, [sp, #40]
 	ldrb	r3, [r3, #89]	@ zero_extendqisi2
 	muls	r3, r2, r3
 	subs	r3, r3, #1
 	cmp	r7, r3
-	bne	.L3669
-	ldr	r3, .L3744+12
-	ldr	r0, [r5, #4]
+	bne	.L3844
+	ldr	r3, .L3963+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L3845
+	ldr	r3, .L3963+16
+	ldrh	r3, [r3, r4, lsl #1]
+	cmp	r3, r4
+	bcs	.L3845
+	ldr	r3, [sp, #36]
+	lsls	r1, r3, #31
+	bmi	.L3844
+.L3845:
+	ldr	r3, .L3963+20
+	ldr	r10, .L3963+40
+	ldr	r0, [r6, #4]
 	ldr	r1, [r3]
 	mov	r3, #-1
 	str	r3, [r1, r7, lsl #2]
-	ldr	r3, .L3744+16
-	ldrb	r3, [r3]	@ zero_extendqisi2
+	ldrb	r3, [r10]	@ zero_extendqisi2
 	muls	r2, r3, r2
 	lsls	r2, r2, #2
 	bl	ftl_memcpy
-	ldr	r3, .L3744+8
-	ldr	r2, .L3744+16
-	ldr	r0, [r5, #4]
+	ldr	r3, .L3963+8
+	ldrb	r2, [r10]	@ zero_extendqisi2
 	ldrh	r3, [r3]
-	ldrb	r2, [r2]	@ zero_extendqisi2
 	muls	r2, r3, r2
-	ldr	r3, .L3744+20
-	ldr	r1, [r3]
+	ldr	r3, .L3963+24
+	ldrb	r3, [r3]	@ zero_extendqisi2
 	lsls	r2, r2, #2
-	add	r0, r0, r2
+	mov	r0, r2
+	cbz	r3, .L3846
+	ldr	r3, .L3963+28
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	rsb	r2, r2, r3, lsl #9
+.L3846:
+	ldr	r3, [r6, #4]
+	ldr	r1, .L3963+32
+	add	r0, r0, r3
+	ldr	r1, [r1]
 	bl	ftl_memcpy
-	ldr	r3, .L3744+24
+	ldr	r3, .L3963+28
 	movs	r1, #0
-	ldr	r0, [r5, #12]
+	ldr	r0, [r6, #12]
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	lsls	r2, r2, #1
 	bl	ftl_memset
-	ldr	r3, [r5, #12]
-	ldr	r2, .L3744+28
-	ldr	r0, [r5, #4]
-	str	r3, [sp, #44]
-	str	r2, [r3]
-	ldr	r3, .L3744+8
-	ldrh	r2, [r3]
-	ldr	r3, .L3744+16
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	muls	r1, r2, r1
+	ldr	r10, [r6, #12]
+	ldr	r3, .L3963+36
+	ldr	r2, .L3963+40
+	ldr	r0, [r6, #4]
+	str	r3, [r10]
+	ldr	r3, .L3963+8
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	muls	r1, r3, r1
 	lsls	r1, r1, #2
 	bl	js_hash
-	ldr	r2, .L3744+32
+	ldr	r3, .L3963+44
+	str	r0, [r10, #4]
+	ldr	r3, [r3]
+	ldr	r3, [r3, #132]
+	str	r3, [r10, #8]
+.L3842:
+	ldr	r3, .L3963
+	add	r1, sp, #88
+	mov	ip, #48
+	ldr	r2, [r3]
 	ldr	r3, [sp, #44]
-	ldr	r2, [r2]
-	str	r0, [r3, #4]
-	ldr	r2, [r2, #132]
-.L3739:
-	str	r2, [r3, #8]
-.L3667:
-	ldr	r3, .L3744
-	ldr	r2, .L3744+36
-	ldr	ip, [r3]
-	add	r3, sp, #72
-	add	r1, r3, r8, lsl #2
-	ldrb	r5, [ip, r7]	@ zero_extendqisi2
-	add	r3, r5, r5, lsl #1
-	add	r3, r2, r3, lsl #4
-	str	r3, [r1, #-24]
-	movs	r3, #48
-	mla	r2, r3, r5, r2
+	ldrb	r10, [r2, r7]	@ zero_extendqisi2
+	add	r0, r1, r3, lsl #2
+	ldr	r1, .L3963+48
+	add	r3, r10, r10, lsl #1
+	mla	ip, ip, r10, r1
+	add	r3, r1, r3, lsl #4
+	str	r3, [r0, #-24]
 	movs	r3, #2
-	strh	r3, [r2, #34]	@ movhi
-	ldr	r3, .L3744+40
-	strb	r6, [r2, #45]
+	strh	r3, [ip, #34]	@ movhi
+	ldr	r3, .L3963+52
+	strb	r8, [ip, #45]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #3
-	bne	.L3676
-	ldr	r3, [sp, #36]
-	ldr	r0, .L3744+44
-	umull	r0, r1, r3, r0
-	ldr	r0, [sp, #28]
-	lsrs	r3, r1, #1
-	uxtah	r1, fp, r3
-	add	r3, r3, r3, lsl #1
-	add	r1, r0, r1, lsl #1
-	ldrh	r0, [r1, #96]
-	ldr	r1, .L3744+48
-	ldrh	r1, [r1]
-	muls	r1, r0, r1
-	ldrh	r0, [r2, #32]
-	orr	r1, r1, r10
-	str	r1, [r2, #24]
-	ldr	r2, .L3744+52
-	ldr	lr, [r2]
-	ldr	r2, [sp, #36]
-	subs	r3, r2, r3
-	lsls	r3, r3, #24
-	add	r3, r3, #16777216
-	orrs	r1, r1, r3
-	str	r1, [lr, r0, lsl #2]
-.L3677:
-	ldr	r3, .L3744+56
-	ldr	r3, [r3]
-	lsls	r3, r3, #23
-	bpl	.L3680
-	ldr	r3, .L3744+4
-	movs	r2, #48
-	ldr	r0, .L3744+60
-	ldrb	r1, [r3, #6]	@ zero_extendqisi2
-	ldr	r3, .L3744+36
-	mla	r5, r2, r5, r3
-	ldr	r2, .L3744+44
-	ldr	r3, [r5, #12]
-	ldr	r3, [r3, #4]
-	str	r3, [sp, #20]
+	bne	.L3853
+	ldr	r3, .L3963+56
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L3854
+	ldr	r1, .L3963+12
 	ldr	r3, [sp, #36]
-	umull	r2, r3, r3, r2
-	mov	r2, r6
-	ubfx	r3, r3, #1, #16
-	add	r3, r3, fp
-	str	r3, [sp, #16]
-	ldrb	r3, [r5, #1]	@ zero_extendqisi2
-	str	r3, [sp, #12]
-	ldrh	r3, [r5, #32]
-	str	r3, [sp, #8]
-	ldr	r3, [r5, #24]
-	str	r3, [sp, #4]
-	ldrb	r3, [ip, r7]	@ zero_extendqisi2
-	str	r3, [sp]
-	mov	r3, r1
-	mov	r1, r8
-	bl	printf
-.L3680:
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	and	r0, r3, #1
+	adds	r3, r0, r4
+	cbz	r1, .L3855
+	ldr	r1, .L3963+16
+	ldrh	r1, [r1, r4, lsl #1]
+	cmp	r1, r4
+	bcs	.L3855
+	cmp	r0, #0
+	it	ne
+	movne	r3, r1
+.L3855:
+	ldr	r1, .L3963+48
+	movs	r0, #48
+	str	r3, [sp, #56]
+	str	r2, [sp, #60]
+	mla	r3, r0, r10, r1
+	ldr	r0, [sp, #36]
+	mov	r1, fp
+	str	r3, [sp, #52]
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #32]
+	ldr	r2, [sp, #52]
+	uxtah	r0, r3, r0
 	ldr	r3, [sp, #40]
-	adds	r3, r3, #1
-	b	.L3740
-.L3669:
-	ldr	r3, .L3744+20
+	add	r0, r3, r0, lsl #1
+	ldr	r3, [sp, #56]
+	ldrh	r1, [r0, #96]
+	ldr	r0, .L3963+60
+	ldrh	r0, [r0]
+	mla	r3, r0, r1, r3
+	orr	r3, r3, #50331648
+	str	r3, [r2, #24]
+	ldr	r2, [sp, #60]
+.L3859:
+	ldr	r1, .L3963+48
+	movs	r3, #48
+	mla	r3, r3, r10, r1
+	ldr	r0, [r3, #24]
+	ldrh	r1, [r3, #32]
+	ldr	r3, .L3963+64
+	ldr	r3, [r3]
+	str	r0, [r3, r1, lsl #2]
+	b	.L3857
+.L3844:
+	ldr	r3, .L3963+32
 	movs	r1, #1
-	mov	r0, r5
+	mov	r0, r6
 	ldr	r3, [r3]
 	ldr	r3, [r3, r7, lsl #2]
-	str	r3, [r5, #24]
+	str	r3, [r6, #24]
 	bl	sblk_read_page
-	ldr	r3, [r5, #36]
-	adds	r1, r3, #1
-	beq	.L3670
+	ldr	r3, [r6, #36]
+	adds	r2, r3, #1
+	beq	.L3847
 	cmp	r3, #512
-	bne	.L3674
-.L3670:
-	ldr	r3, .L3744+64
+	bne	.L3851
+.L3847:
+	ldr	r3, .L3963+68
 	ldrh	r2, [r3]
+	ldr	r3, .L3963+72
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	rsb	r3, r3, #24
+	subs	r0, r3, r2
 	movs	r3, #1
-	rsb	r0, r2, #21
 	lsls	r3, r3, r0
-	ldr	r0, [r5, #24]
+	ldr	r0, [r6, #24]
 	subs	r3, r3, #1
 	lsrs	r0, r0, r2
-	ldr	r2, .L3744+68
+	ldr	r2, .L3963+76
 	ands	r0, r0, r3
 	ldrb	r1, [r2]	@ zero_extendqisi2
 	bl	__aeabi_uidiv
 	movs	r1, #0
 	uxth	r0, r0
 	bl	ftl_sblk_dump
-	ldr	r3, [r5, #36]
-	adds	r2, r3, #1
-	beq	.L3672
+	ldr	r3, [r6, #36]
+	adds	r0, r3, #1
+	beq	.L3849
 	cmp	r3, #512
-	bne	.L3674
-.L3672:
-	ldr	r3, [r5, #12]
+	bne	.L3851
+.L3849:
+	ldr	r3, [r6, #12]
 	mov	r2, #-1
 	str	r2, [r3, #4]
-	ldr	r3, [r5, #36]
+	ldr	r3, [r6, #36]
 	cmp	r3, r2
-	beq	.L3673
+	beq	.L3850
 	cmp	r3, #512
-	bne	.L3674
-.L3673:
-	movw	r2, #846
-	ldr	r1, .L3744+72
-	ldr	r0, .L3744+76
-	bl	printf
-.L3674:
-	ldr	r3, [r5, #12]
-	ldr	r2, .L3744+80
+	bne	.L3851
+.L3850:
+	movw	r2, #1002
+	ldr	r1, .L3963+80
+	ldr	r0, .L3963+84
+	bl	printf
+.L3851:
+	ldr	r3, [r6, #12]
+	ldr	r2, .L3963+88
 	ldr	r1, [r3, #4]
 	ldr	r2, [r2]
 	cmp	r1, r2
 	itt	cs
 	movcs	r2, #-1
 	strcs	r2, [r3, #4]
-	ldr	r2, .L3744+12
+	ldr	r2, .L3963+20
 	ldr	r1, [r3, #4]
 	ldr	r2, [r2]
-	str	r1, [r2, r7, lsl #2]
-	ldr	r2, [r5, #24]
-	b	.L3739
-.L3676:
+	str	r1, [r2, r7, lsl #2]
+	ldr	r2, [r6, #24]
+	str	r2, [r3, #8]
+	b	.L3842
+.L3964:
+	.align	2
+.L3963:
+	.word	.LANCHOR76
+	.word	.LANCHOR64
+	.word	.LANCHOR79
+	.word	.LANCHOR204
+	.word	.LANCHOR224
+	.word	.LANCHOR155
+	.word	.LANCHOR205
+	.word	.LANCHOR125
+	.word	.LANCHOR156
+	.word	-178307901
+	.word	.LANCHOR80
+	.word	.LANCHOR10
+	.word	.LANCHOR52
+	.word	.LANCHOR73
+	.word	.LANCHOR35
+	.word	.LANCHOR105
+	.word	.LANCHOR157
+	.word	.LANCHOR68
+	.word	.LANCHOR31
+	.word	.LANCHOR69
+	.word	.LANCHOR223
+	.word	.LC0
+	.word	.LANCHOR122
+.L3854:
+	ldr	r3, [sp, #36]
+	ldr	r0, .L3965
+	umull	r0, r1, r3, r0
+	ldr	r0, [sp, #40]
+	lsrs	r3, r1, #1
+	ldr	r1, [sp, #32]
+	uxtah	r1, r1, r3
+	add	r3, r3, r3, lsl #1
+	add	r1, r0, r1, lsl #1
+	ldrh	r0, [r1, #96]
+	ldr	r1, .L3965+4
+	ldrh	r1, [r1]
+	muls	r1, r0, r1
+	ldr	r0, .L3965+8
+	ldr	lr, [r0]
+	ldr	r0, [sp, #36]
+	orrs	r1, r1, r4
+	str	r1, [ip, #24]
+	ldrh	ip, [ip, #32]
+	subs	r3, r0, r3
+	lsls	r3, r3, #24
+	add	r3, r3, #16777216
+	orrs	r1, r1, r3
+	str	r1, [lr, ip, lsl #2]
+.L3857:
+	ldr	r3, .L3965+12
+	ldr	r3, [r3]
+	lsls	r1, r3, #23
+	bpl	.L3860
+	ldr	r1, [r6, #12]
+	movs	r0, #48
+	ldr	r3, .L3965+16
+	ldr	r1, [r1]
+	ldrb	r3, [r3, #6]	@ zero_extendqisi2
+	str	r1, [sp, #24]
+	ldr	r1, .L3965+20
+	mla	r10, r0, r10, r1
+	ldr	r0, .L3965
+	ldr	r1, [r10, #12]
+	ldr	r1, [r1, #4]
+	str	r1, [sp, #20]
+	ldr	r1, [sp, #36]
+	umull	r0, r1, r1, r0
+	ldr	r0, [sp, #32]
+	ubfx	r1, r1, #1, #16
+	add	r1, r1, r0
+	ldr	r0, .L3965+24
+	str	r1, [sp, #16]
+	ldrb	r1, [r10, #1]	@ zero_extendqisi2
+	str	r1, [sp, #12]
+	ldrh	r1, [r10, #32]
+	str	r1, [sp, #8]
+	ldr	r1, [r10, #24]
+	str	r1, [sp, #4]
+	ldrb	r2, [r2, r7]	@ zero_extendqisi2
+	ldr	r1, [sp, #44]
+	str	r2, [sp]
+	mov	r2, r8
+	bl	printf
+.L3860:
+	ldr	r3, .L3965+28
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L3861
+	ldr	r3, .L3965+32
+	ldrh	r3, [r3, r4, lsl #1]
+	cmp	r3, r4
+	bcs	.L3861
+	ldr	r3, [sp, #36]
+	lsls	r3, r3, #31
+	bpl	.L3861
+	ldr	r3, .L3965+36
+	movs	r2, #255
+	ldr	r3, [r3]
+	strb	r2, [r3, r7]
+	add	r2, sp, #88
+	ldr	r3, [sp, #44]
+	add	r3, r2, r3, lsl #2
+	ldr	r2, [r3, #-24]
+	ldr	r3, [sp, #40]
+	ldrb	r1, [r2, #1]	@ zero_extendqisi2
+	ldrb	r3, [r3, #89]	@ zero_extendqisi2
+	lsls	r3, r3, #1
+	mls	r3, r3, fp, r5
+	uxth	r3, r3
+	strh	r3, [r2, #32]	@ movhi
+	ldr	r2, .L3965+36
+	ldr	r2, [r2]
+	strb	r1, [r2, r3]
+	mov	r2, #-1
+	ldr	r3, .L3965+40
+	ldr	r3, [r3]
+	str	r2, [r3, r7, lsl #2]
+.L3861:
+	ldr	r3, [sp, #48]
+	adds	r3, r3, #1
+	b	.L3956
+.L3853:
 	cmp	r3, #2
-	bne	.L3678
-	ldr	r3, .L3744+84
+	bne	.L3859
+	ldr	r3, .L3965+44
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L3679
-	ldr	r1, [sp, #28]
-	add	r3, r8, fp
+	cbnz	r3, .L3858
+	ldr	r1, [sp, #32]
+	ldr	r3, [sp, #44]
+	add	r3, r3, r1
+	ldr	r1, [sp, #40]
 	add	r3, r1, r3, lsl #1
-	ldr	r1, .L3744+48
+	ldr	r1, .L3965+4
 	ldrh	r3, [r3, #96]
 	ldrh	r1, [r1]
-	mla	r3, r1, r3, r10
-.L3741:
+	mla	r3, r1, r3, r4
+.L3955:
 	orr	r3, r3, #33554432
-	str	r3, [r2, #24]
-.L3678:
-	ldr	r2, .L3744+36
-	movs	r3, #48
-	mla	r3, r3, r5, r2
-	ldr	r1, [r3, #24]
-	ldrh	r2, [r3, #32]
-	ldr	r3, .L3744+52
-	ldr	r3, [r3]
-	str	r1, [r3, r2, lsl #2]
-	b	.L3677
-.L3679:
-	ldr	r3, [sp, #36]
-	ldr	r1, [sp, #28]
-	add	r3, fp, r3, lsr #1
+	str	r3, [ip, #24]
+	b	.L3859
+.L3858:
+	ldr	r1, [sp, #36]
+	ldr	r3, [sp, #32]
+	add	r3, r3, r1, lsr #1
+	ldr	r1, [sp, #40]
 	add	r3, r1, r3, lsl #1
-	ldr	r1, .L3744+48
+	ldr	r1, .L3965+4
 	ldrh	r3, [r3, #96]
 	ldrh	r1, [r1]
-	mla	r3, r1, r3, r10
+	mla	r3, r1, r3, r4
 	ldr	r1, [sp, #36]
 	and	r1, r1, #1
 	add	r3, r3, r1
-	b	.L3741
-.L3683:
-	cmp	r6, #1
-	bne	.L3685
-	movs	r2, #9
-	b	.L3686
-.L3685:
-	cmp	r6, #2
+	b	.L3955
+.L3866:
+	add	r5, sp, #88
+	add	r6, sp, #88
+	add	r5, r5, r1, lsl #2
+	add	r1, r6, r1, lsl #2
+	ldr	r1, [r1, #-20]
+	ldr	r5, [r5, #-24]
+	ldrb	r1, [r1, #1]	@ zero_extendqisi2
+	strb	r1, [r5]
+	b	.L3865
+.L3864:
+	ldr	r3, .L3965+48
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	ldr	r3, [sp, #64]
+	cmp	r1, #0
+	beq	.L3868
+	strb	r0, [r3, #44]
+.L3958:
+	add	r1, sp, #76
+	add	r0, sp, #64
+	bl	sblk_xlc_prog_pages
+.L3867:
+	ldr	r3, .L3965+48
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	ldr	r3, [sp, #40]
+	ldrb	r3, [r3, #89]	@ zero_extendqisi2
+	cmp	r2, #0
+	beq	.L3876
+	add	r3, r3, r3, lsl #1
+.L3877:
+	ldr	r2, .L3965+52
+	ldr	r1, [r2]
+	ldr	r2, [r1, #52]
+	add	r2, r2, r3
+	str	r2, [r1, #52]
+	ldr	r2, .L3965+16
+	ldrh	r1, [r2, #566]
+	add	r3, r3, r1
+	uxth	r3, r3
+	strh	r3, [r2, #566]	@ movhi
+	ldr	r2, .L3965+56
+	ldrh	r1, [r2]
+	ldr	r2, [sp, #40]
+	ldrb	r2, [r2, #89]	@ zero_extendqisi2
+	muls	r2, r1, r2
+	cmp	r3, r2
+	itttt	ge
+	ldrge	r3, .L3965+60
+	movge	r2, #0
+	ldrge	r3, [r3]
+	strhge	r2, [r3, #86]	@ movhi
+	bl	gc_write_completed
+	b	.L3815
+.L3868:
+	cmp	r8, #1
+	bne	.L3869
+	movs	r1, #9
+.L3871:
+	strb	r1, [r3, #44]
+	b	.L3958
+.L3869:
+	cmp	r8, #2
 	it	eq
-	moveq	r2, #13
-	b	.L3686
-.L3745:
-	.align	2
-.L3744:
-	.word	.LANCHOR74
-	.word	.LANCHOR63
-	.word	.LANCHOR77
-	.word	.LANCHOR152
-	.word	.LANCHOR78
-	.word	.LANCHOR153
-	.word	.LANCHOR123
-	.word	-178307901
-	.word	.LANCHOR10
-	.word	.LANCHOR50
-	.word	.LANCHOR71
-	.word	-1431655765
-	.word	.LANCHOR103
-	.word	.LANCHOR154
-	.word	.LANCHOR14
-	.word	.LC235
-	.word	.LANCHOR66
-	.word	.LANCHOR67
-	.word	.LANCHOR218
-	.word	.LC0
-	.word	.LANCHOR120
-	.word	.LANCHOR72
-.L3682:
-	ldr	r3, .L3746
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L3688
-	ldr	r3, .L3746+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L3689
-.L3688:
-	subs	r0, r0, #1
-.L3690:
-	uxth	r2, r3
-	adds	r3, r3, #1
-	cmp	r2, r0
-	blt	.L3691
-	add	r3, sp, #72
-	movs	r2, #255
-	add	r0, r3, r0, lsl #2
-	ldr	r3, [r0, #-24]
-	strb	r2, [r3]
-	ldrh	r3, [sp, #32]
-	ldr	r0, [sp, #48]
-	smulbb	r1, r3, r1
-	uxtb	r1, r1
-	bl	sblk_prog_page
-	b	.L3687
-.L3689:
-	add	r0, sp, #48
+	moveq	r1, #13
+	b	.L3871
+.L3863:
+	ldr	r1, .L3965+44
+	ldrb	r0, [r1]	@ zero_extendqisi2
+	cbz	r0, .L3872
+	ldr	r1, .L3965+64
+	ldrb	r0, [r1]	@ zero_extendqisi2
+	cbnz	r0, .L3873
+.L3872:
+	subs	r3, r3, #1
+.L3874:
+	uxth	r1, r0
+	adds	r0, r0, #1
+	cmp	r1, r3
+	bge	.L3957
+	add	r5, sp, #88
+	add	r6, sp, #88
+	add	r5, r5, r1, lsl #2
+	add	r1, r6, r1, lsl #2
+	ldr	r1, [r1, #-20]
+	ldr	r5, [r5, #-24]
+	ldrb	r1, [r1, #1]	@ zero_extendqisi2
+	strb	r1, [r5]
+	b	.L3874
+.L3873:
+	mov	r1, r2
+	add	r0, sp, #64
 	bl	sblk_3d_mlc_prog_pages
-	b	.L3687
-.L3691:
-	add	r4, sp, #72
-	add	r5, sp, #72
-	add	r4, r4, r2, lsl #2
-	add	r2, r5, r2, lsl #2
-	ldr	r2, [r2, #-20]
-	ldr	r4, [r4, #-24]
-	ldrb	r2, [r2, #1]	@ zero_extendqisi2
-	strb	r2, [r4]
-	b	.L3690
-.L3692:
-	ldr	r1, .L3746
+	b	.L3867
+.L3876:
+	ldr	r2, .L3965+44
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbz	r2, .L3878
+	lsls	r3, r3, #1
+	b	.L3877
+.L3878:
+	ldr	r2, .L3965+68
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbz	r2, .L3879
+	ldr	r1, .L3965+28
+	uxth	r2, r3
+	mul	r3, r2, fp
 	ldrb	r1, [r1]	@ zero_extendqisi2
 	cmp	r1, #0
-	beq	.L3693
-	lsls	r3, r3, #1
+	beq	.L3877
+	ldr	r1, .L3965+32
+	ldrh	r1, [r1, r4, lsl #1]
+	cmp	r1, r4
+	it	cc
+	movcc	r3, r2
+	b	.L3877
+.L3879:
 	uxth	r3, r3
-	b	.L3693
-.L3747:
+	b	.L3877
+.L3966:
 	.align	2
-.L3746:
-	.word	.LANCHOR72
-	.word	.LANCHOR73
+.L3965:
+	.word	-1431655765
+	.word	.LANCHOR105
+	.word	.LANCHOR157
+	.word	.LANCHOR14
+	.word	.LANCHOR64
+	.word	.LANCHOR52
+	.word	.LC241
+	.word	.LANCHOR204
+	.word	.LANCHOR224
+	.word	.LANCHOR76
+	.word	.LANCHOR156
+	.word	.LANCHOR74
+	.word	.LANCHOR77
+	.word	.LANCHOR104
+	.word	.LANCHOR79
+	.word	.LANCHOR10
+	.word	.LANCHOR75
+	.word	.LANCHOR35
 	.size	gc_do_copy_back, .-gc_do_copy_back
 	.section	.text.zftl_do_gc,"ax",%progbits
 	.align	1
@@ -24144,13 +25661,13 @@ gc_do_copy_back:
 zftl_do_gc:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L3924
+	ldr	r3, .L4148
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #48
-	ldr	r4, .L3924+4
+	ldr	r4, .L4148+4
 	ldrh	r7, [r3]
-	ldr	r3, .L3924+8
-	ldr	r2, .L3924+12
+	ldr	r3, .L4148+8
+	ldr	r2, .L4148+12
 	str	r0, [sp, #32]
 	ldrh	r6, [r3]
 	ldrb	r3, [r4]	@ zero_extendqisi2
@@ -24159,31 +25676,31 @@ zftl_do_gc:
 	add	r6, r6, r7
 	uxth	r6, r6
 	cmp	r3, #6
-	bhi	.L3856
+	bhi	.L4077
 	tbh	[pc, r3, lsl #1]
-.L3751:
-	.2byte	(.L3750-.L3751)/2
-	.2byte	(.L3752-.L3751)/2
-	.2byte	(.L3753-.L3751)/2
-	.2byte	(.L3754-.L3751)/2
-	.2byte	(.L3755-.L3751)/2
-	.2byte	(.L3756-.L3751)/2
-	.2byte	(.L3757-.L3751)/2
+.L3970:
+	.2byte	(.L3969-.L3970)/2
+	.2byte	(.L3971-.L3970)/2
+	.2byte	(.L3972-.L3970)/2
+	.2byte	(.L3973-.L3970)/2
+	.2byte	(.L3974-.L3970)/2
+	.2byte	(.L3975-.L3970)/2
+	.2byte	(.L3976-.L3970)/2
 	.p2align 1
-.L3756:
-	ldr	r5, .L3924+16
+.L3975:
+	ldr	r5, .L4148+16
 	movs	r7, #0
-.L3758:
+.L3977:
 	bl	gc_check_data_one_wl
 	mov	r10, r0
 	cmp	r0, #0
-	beq	.L3852
+	beq	.L4073
 	ldr	r3, [r8]
 	movs	r6, #0
 	strh	r6, [r5, #52]	@ movhi
 	ldrh	r0, [r3, #80]
 	bl	ftl_free_sblk
-	ldr	r1, .L3924+20
+	ldr	r1, .L4148+20
 	movw	r3, #65535
 	ldr	r2, [r8]
 	ldr	r0, [r5, #8]
@@ -24191,14 +25708,14 @@ zftl_do_gc:
 	strh	r3, [r2, #80]	@ movhi
 	strh	r3, [r1, #126]	@ movhi
 	strh	r3, [r2, #130]	@ movhi
-	bl	buf_free
+	bl	zbuf_free
 	str	r6, [r5, #8]
 	strb	r6, [r4]
-	b	.L3921
-.L3750:
-	ldr	r3, .L3924+24
-	ldr	r1, .L3924+28
-	ldr	r2, .L3924+32
+	b	.L4145
+.L3969:
+	ldr	r3, .L4148+24
+	ldr	r1, .L4148+28
+	ldr	r2, .L4148+32
 	ldrh	r3, [r3]
 	str	r1, [sp, #36]
 	ldrh	r0, [r2]
@@ -24212,20 +25729,20 @@ zftl_do_gc:
 	str	r3, [sp, #28]
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L3759
+	beq	.L3978
 	ldr	r3, [sp, #32]
-	cbnz	r3, .L3760
-	ldr	r3, .L3924+36
+	cbnz	r3, .L3979
+	ldr	r3, .L4148+36
 	ldrh	r3, [r3]
 	cmp	r6, r3, lsl #1
-	blt	.L3760
-.L3856:
+	blt	.L3979
+.L4077:
 	movs	r5, #16
-	b	.L3748
-.L3760:
-	ldr	r10, .L3924+84
+	b	.L3967
+.L3979:
+	ldr	r10, .L4148+84
 	movs	r1, #5
-	ldr	fp, .L3924+72
+	ldr	fp, .L4148+72
 	ldrh	r0, [r10]
 	adds	r0, r0, #1
 	uxth	r0, r0
@@ -24234,10 +25751,10 @@ zftl_do_gc:
 	movw	r3, #65535
 	mov	ip, r10
 	cmp	r0, r3
-	beq	.L3761
-	ldr	r1, .L3924+40
-	ldr	lr, .L3924+80
-	ldr	r2, .L3924+44
+	beq	.L3980
+	ldr	r1, .L4148+40
+	ldr	lr, .L4148+80
+	ldr	r2, .L4148+44
 	ldr	r1, [r1]
 	ldrh	lr, [lr]
 	ldr	r3, [r2]
@@ -24246,94 +25763,94 @@ zftl_do_gc:
 	adds	r3, r3, #1
 	cmp	lr, r1
 	str	r3, [r2]
-	bcs	.L3762
-	ldr	r2, .L3924+48
+	bcs	.L3981
+	ldr	r2, .L4148+48
 	ldrh	r2, [r2]
 	cmp	r3, r2, lsr #4
-	bls	.L3761
-	ldr	r3, .L3924+52
+	bls	.L3980
+	ldr	r3, .L4148+52
 	ldrh	r3, [r3]
 	cmp	r3, r1
-	bls	.L3761
-.L3762:
+	bls	.L3980
+.L3981:
 	ldrb	r2, [fp]	@ zero_extendqisi2
 	movs	r1, #0
 	bl	gc_add_sblk
-	cbz	r0, .L3763
+	cbz	r0, .L3982
 	movs	r3, #1
 	strb	r3, [r4]
 	movs	r3, #0
 	str	r3, [r10]
-	b	.L3856
-.L3761:
+	b	.L4077
+.L3980:
 	movs	r3, #0
 	strh	r3, [ip]	@ movhi
-.L3763:
+.L3982:
 	cmp	r7, #15
-	bls	.L3858
-	ldr	r3, .L3924+56
+	bls	.L4079
+	ldr	r3, .L4148+56
 	ldrh	r2, [r3]
-	ldr	r3, .L3924+60
+	ldr	r3, .L4148+60
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L3858
+	bhi	.L4079
 	ldr	r3, [sp, #28]
 	cmp	r3, #0
 	ite	eq
 	moveq	r10, #2
 	movne	r10, #1
-.L3764:
-	ldr	r3, .L3924+64
+.L3983:
+	ldr	r3, .L4148+64
 	ldr	r3, [r3]
 	lsls	r3, r3, #23
-	bpl	.L3765
+	bpl	.L3984
 	ldr	r3, [r8]
 	ldrh	r1, [r5, #80]
 	ldrb	r2, [fp]	@ zero_extendqisi2
-	ldr	r0, .L3924+68
+	ldr	r0, .L4148+68
 	str	r1, [sp, #16]
 	ldrh	r1, [r3, #122]
 	str	r1, [sp, #12]
 	ldrh	r1, [r3, #120]
 	str	r1, [sp, #8]
-	movw	r1, #1982
+	movw	r1, #2170
 	ldrh	r3, [r3, #124]
 	str	r7, [sp]
 	str	r3, [sp, #4]
 	mov	r3, r6
 	bl	printf
-.L3765:
+.L3984:
 	movs	r2, #1
 	mov	r1, r10
 	ldrb	r0, [fp]	@ zero_extendqisi2
 	bl	gc_search_src_blk
 	cmp	r0, #0
-	ble	.L3766
-.L3767:
+	ble	.L3985
+.L3986:
 	movs	r3, #1
-.L3922:
+.L4146:
 	strb	r3, [r4]
-	b	.L3856
-.L3858:
+	b	.L4077
+.L4079:
 	mov	r10, #2
-	b	.L3764
-.L3766:
+	b	.L3983
+.L3985:
 	movs	r2, #1
 	movs	r1, #3
 	ldrb	r0, [fp]	@ zero_extendqisi2
 	bl	gc_search_src_blk
 	cmp	r0, #0
-	bgt	.L3767
-	b	.L3856
-.L3759:
-	ldr	r3, .L3924+64
+	bgt	.L3986
+	b	.L4077
+.L3978:
+	ldr	r3, .L4148+64
 	ldr	r2, [r3]
 	str	r3, [sp, #44]
 	tst	r2, #256
-	beq	.L3769
-	ldr	r3, .L3924+72
-	movw	r1, #1994
-	ldr	r0, .L3924+68
+	beq	.L3988
+	ldr	r3, .L4148+72
+	movw	r1, #2182
+	ldr	r0, .L4148+68
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	ldr	r3, [sp, #32]
 	str	r3, [sp, #16]
@@ -24346,216 +25863,216 @@ zftl_do_gc:
 	str	r3, [sp, #4]
 	mov	r3, r6
 	bl	printf
-.L3769:
+.L3988:
 	ldr	r3, [sp, #32]
 	cmp	r3, #1
-	bne	.L3770
+	bne	.L3989
 	bl	gc_scan_static_data
 	ldr	r3, [r8]
-	ldr	fp, .L3924+72
+	ldr	fp, .L4148+72
 	ldrh	r3, [r3, #122]
-	cbz	r3, .L3771
-.L3772:
+	cbz	r3, .L3990
+.L3991:
 	movs	r3, #1
 	strb	r3, [fp]
-	b	.L3922
-.L3771:
+	b	.L4146
+.L3990:
 	bl	gc_static_wearleveling
 	mov	r5, r0
 	cmp	r0, #0
-	bne	.L3772
+	bne	.L3991
 	cmp	r7, #0
-	bne	.L3773
-.L3777:
+	bne	.L3992
+.L3996:
 	movs	r5, #16
-.L3774:
+.L3993:
 	ldr	r0, [r8]
 	movs	r1, #1
-	ldr	r3, .L3924+72
+	ldr	r3, .L4148+72
 	ldrh	fp, [r0, #124]
 	strb	r1, [r3]
 	mov	r8, r3
 	cmp	fp, #0
-	beq	.L3782
+	beq	.L4001
 	movs	r2, #0
 	strb	r1, [r4]
 	strb	r2, [r3]
 	ldr	r3, [sp, #44]
 	ldr	r3, [r3]
 	lsls	r4, r3, #23
-	bpl	.L3748
+	bpl	.L3967
 	ldrh	r3, [r0, #122]
-	movw	r1, #2084
+	mov	r1, #2272
 	str	r3, [sp, #12]
 	ldrh	r3, [r0, #120]
 	stm	sp, {r7, fp}
-	ldr	r0, .L3924+76
+	ldr	r0, .L4148+76
 	str	r3, [sp, #8]
 	mov	r3, r6
 	bl	printf
-.L3748:
+.L3967:
 	mov	r0, r5
 	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3925:
+.L4149:
 	.align	2
-.L3924:
-	.word	.LANCHOR99
-	.word	.LANCHOR150
-	.word	.LANCHOR95
-	.word	.LANCHOR10
-	.word	.LANCHOR63
-	.word	.LANCHOR102
+.L4148:
+	.word	.LANCHOR101
+	.word	.LANCHOR153
 	.word	.LANCHOR97
+	.word	.LANCHOR10
+	.word	.LANCHOR64
+	.word	.LANCHOR104
+	.word	.LANCHOR99
+	.word	.LANCHOR92
 	.word	.LANCHOR90
-	.word	.LANCHOR88
-	.word	.LANCHOR79
+	.word	.LANCHOR81
 	.word	.LANCHOR9
-	.word	.LANCHOR151
+	.word	.LANCHOR154
 	.word	.LANCHOR6
-	.word	.LANCHOR91
-	.word	.LANCHOR92
 	.word	.LANCHOR93
+	.word	.LANCHOR94
+	.word	.LANCHOR95
 	.word	.LANCHOR14
-	.word	.LC236
-	.word	.LANCHOR76
-	.word	.LC237
-	.word	.LANCHOR85
+	.word	.LC242
+	.word	.LANCHOR78
+	.word	.LC243
 	.word	.LANCHOR87
-.L3773:
+	.word	.LANCHOR89
+.L3992:
 	ldr	r3, [sp, #28]
-	ldr	r2, .L3926
+	ldr	r2, .L4150
 	cmp	r6, r3
-	bcs	.L3775
+	bcs	.L3994
 	ldrh	r3, [r2]
 	cmp	r3, r6
-	bhi	.L3776
-.L3775:
+	bhi	.L3995
+.L3994:
 	ldr	r3, [sp, #28]
 	ldrh	r2, [r2]
 	adds	r3, r6, r3
 	cmp	r3, r2
-	blt	.L3776
-	ldr	r3, .L3926+4
+	blt	.L3995
+	ldr	r3, .L4150+4
 	ldrh	r2, [r3]
-	ldr	r3, .L3926+8
+	ldr	r3, .L4150+8
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L3777
-.L3776:
+	bcc	.L3996
+.L3995:
 	mov	r10, #1
-	ldr	r2, .L3926+12
+	ldr	r2, .L4150+12
 	strb	r10, [fp]
-	ldr	fp, .L3926+32
+	ldr	fp, .L4150+32
 	ldrh	r2, [r2]
 	ldr	r3, [fp]
 	add	r3, r3, r10
 	cmp	r3, r2, lsr #5
 	str	r3, [fp]
-	ldr	r3, .L3926+4
-	bls	.L3778
+	ldr	r3, .L4150+4
+	bls	.L3997
 	ldrh	r2, [r3]
 	cmp	r2, r7
-	bls	.L3778
+	bls	.L3997
 	movs	r1, #5
 	movs	r0, #0
 	bl	zftl_get_gc_node
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L3777
-	ldr	r3, .L3926+16
+	beq	.L3996
+	ldr	r3, .L4150+16
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r0, lsl #1]
-	ldr	r3, .L3926+20
+	ldr	r3, .L4150+20
 	ldrh	r1, [r3]
-	ldr	r3, .L3926+24
+	ldr	r3, .L4150+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	muls	r3, r1, r3
 	cmp	r2, r3
-	bgt	.L3777
+	bgt	.L3996
 	movs	r2, #4
 	movs	r1, #2
 	mov	r0, r10
 	movs	r3, #0
 	str	r3, [fp]
-.L3912:
+.L4136:
 	bl	gc_search_src_blk
 	uxth	r0, r0
 	cmp	r0, #0
-	beq	.L3777
-	b	.L3767
-.L3778:
+	beq	.L3996
+	b	.L3986
+.L3997:
 	ldrh	r2, [r3]
-	ldr	r3, .L3926+8
+	ldr	r3, .L4150+8
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L3780
+	bcc	.L3999
 	movs	r2, #1
 	movs	r1, #2
 	mov	r0, r2
-	b	.L3912
-.L3780:
+	b	.L4136
+.L3999:
 	ldr	r3, [sp, #36]
 	ldrh	r3, [r3]
-	cbnz	r3, .L3781
+	cbnz	r3, .L4000
 	ldr	r3, [sp, #40]
 	ldrh	r3, [r3]
 	cmp	r3, #8
-	bls	.L3774
-.L3781:
+	bls	.L3993
+.L4000:
 	movs	r1, #1
 	movs	r2, #4
 	mov	r0, r1
-	b	.L3912
-.L3770:
-	ldr	r3, .L3926+28
+	b	.L4136
+.L3989:
+	ldr	r3, .L4150+28
 	ldrh	r3, [r3]
 	cmp	r3, r6
-	bcc	.L3856
-	b	.L3777
-.L3782:
-	ldr	r2, .L3926+28
+	bcc	.L4077
+	b	.L3996
+.L4001:
+	ldr	r2, .L4150+28
 	ldrh	ip, [r2]
 	mov	r10, r2
 	cmp	r6, ip
-	bcs	.L3783
+	bcs	.L4002
 	cmp	r7, #0
-	beq	.L3784
+	beq	.L4003
 	cmp	r7, #16
-	bls	.L3785
-	ldr	r2, .L3926+4
+	bls	.L4004
+	ldr	r2, .L4150+4
 	ldrh	r0, [r2]
-	ldr	r2, .L3926+8
+	ldr	r2, .L4150+8
 	ldrh	r2, [r2]
 	cmp	r0, r2
-	bhi	.L3785
+	bhi	.L4004
 	movs	r2, #4
 	mov	r0, r1
 	str	r3, [sp, #28]
 	bl	gc_search_src_blk
 	uxth	r0, r0
 	ldr	r3, [sp, #28]
-	cbnz	r0, .L3786
+	cbnz	r0, .L4005
 	ldrb	r0, [r3]	@ zero_extendqisi2
 	movs	r2, #4
 	movs	r1, #3
-.L3914:
+.L4142:
 	bl	gc_search_src_blk
 	uxth	r0, r0
-.L3787:
-	cbnz	r0, .L3789
-	b	.L3748
-.L3786:
+.L4006:
+	cbnz	r0, .L4008
+	b	.L3967
+.L4005:
 	movs	r1, #5
 	mov	r0, fp
 	bl	zftl_get_gc_node
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L3789
-	ldr	r1, .L3926+16
-	ldr	r6, .L3926+20
-	ldr	r2, .L3926+32
+	beq	.L4008
+	ldr	r1, .L4150+16
+	ldr	r6, .L4150+20
+	ldr	r2, .L4150+32
 	ldr	r1, [r1]
 	ldrh	r6, [r6]
 	ldr	r3, [r2]
@@ -24564,338 +26081,348 @@ zftl_do_gc:
 	cmp	r6, r1
 	str	r3, [r2]
 	mov	r6, r2
-	bcs	.L3790
-	ldr	r2, .L3926+12
+	bcs	.L4009
+	ldr	r2, .L4150+12
 	ldrh	r2, [r2]
 	cmp	r3, r2, lsr #4
-	bls	.L3789
-	ldr	r3, .L3926+36
+	bls	.L4008
+	ldr	r3, .L4150+36
 	ldrh	r3, [r3]
 	cmp	r3, r1
-	bls	.L3789
-.L3790:
+	bls	.L4008
+.L4009:
 	ldrb	r2, [r8]	@ zero_extendqisi2
 	movs	r1, #0
 	bl	gc_add_sblk
-	ldr	r3, .L3926+40
+	ldr	r3, .L4150+40
 	movs	r2, #1
 	str	r2, [r3]
 	movs	r3, #0
 	str	r3, [r6]
-.L3789:
+.L4008:
 	movs	r3, #1
 	strb	r3, [r4]
-	b	.L3748
-.L3785:
+	b	.L3967
+.L4004:
 	movs	r2, #1
 	movs	r1, #2
 	mov	r0, r2
-.L3920:
+.L4144:
 	bl	gc_search_src_blk
 	uxth	r0, r0
 	cmp	r0, #0
-	bne	.L3789
+	bne	.L4008
 	movs	r2, #2
-.L3917:
-	movs	r1, #3
-	ldrb	r0, [r8]	@ zero_extendqisi2
-	b	.L3914
-.L3784:
+	b	.L4138
+.L4003:
 	strb	r7, [r3]
 	ldr	r3, [sp, #44]
 	ldr	r3, [r3]
 	lsls	r1, r3, #23
-	bpl	.L3792
+	bpl	.L4011
 	ldrh	r3, [r0, #122]
 	mov	r2, r7
-	movw	r1, #2114
+	movw	r1, #2302
 	str	r3, [sp, #12]
 	ldrh	r3, [r0, #120]
 	str	r7, [sp, #4]
 	str	r7, [sp]
 	str	r3, [sp, #8]
 	mov	r3, r6
-	ldr	r0, .L3926+44
+	ldr	r0, .L4150+44
 	bl	printf
-.L3792:
+.L4011:
 	cmp	r6, #16
-	bls	.L3793
+	bls	.L4012
 	movs	r2, #4
-	b	.L3917
-.L3793:
+.L4138:
+	movs	r1, #3
+	ldrb	r0, [r8]	@ zero_extendqisi2
+	b	.L4142
+.L4012:
 	movs	r2, #1
 	ldrb	r0, [r8]	@ zero_extendqisi2
 	mov	r1, r2
-	b	.L3920
-.L3783:
+	b	.L4144
+.L4002:
 	ldr	r3, [sp, #32]
 	cmp	r3, #1
-	bne	.L3748
+	bne	.L3967
 	cmp	r6, ip, lsl #1
-	bge	.L3794
+	bge	.L4013
 	ldr	r3, [sp, #28]
 	cmp	r3, r7, lsr #1
-	bcs	.L3795
-	ldr	r3, .L3926+4
+	bcs	.L4014
+	ldr	r3, .L4150+4
 	ldrh	r1, [r3]
-	ldr	r3, .L3926+8
+	ldr	r3, .L4150+8
 	ldrh	r3, [r3]
 	cmp	r1, r3
-	bcs	.L3795
-	ldr	r3, .L3926
+	bcs	.L4014
+	ldr	r3, .L4150
 	ldrh	r3, [r3]
 	lsrs	r3, r3, #2
 	strh	r3, [r2]	@ movhi
-	b	.L3748
-.L3795:
+	b	.L3967
+.L4014:
 	movs	r1, #5
 	movs	r0, #0
 	bl	zftl_get_gc_node
 	movw	r3, #65535
 	mov	fp, r0
 	cmp	r0, r3
-	bne	.L3796
-.L3801:
+	bne	.L4015
+.L4020:
 	cmp	r7, #1
-	bhi	.L3797
-.L3798:
+	bhi	.L4016
+.L4017:
 	ldr	r3, [sp, #28]
 	cmp	r6, r3
-	ldr	r6, .L3926
-	bcs	.L3805
+	ldr	r6, .L4150
+	bcs	.L4024
 	movs	r7, #0
 	movs	r0, #4
 	strb	r7, [r8]
 	bl	zftl_get_gc_node.part.9
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L3805
-	ldr	r3, .L3926+16
+	beq	.L4024
+	ldr	r3, .L4150+16
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r0, lsl #1]
-	ldr	r3, .L3926+20
+	ldr	r3, .L4150+20
 	ldrh	r1, [r3]
-	ldr	r3, .L3926+24
+	ldr	r3, .L4150+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	muls	r3, r1, r3
 	cmp	r2, r3, asr #1
-	ble	.L3807
-.L3805:
+	ble	.L4026
+.L4024:
 	ldrh	r3, [r6]
 	lsrs	r3, r3, #2
 	strh	r3, [r10]	@ movhi
-	b	.L3748
-.L3796:
-	ldr	r2, .L3926+32
-	ldr	r1, .L3926+12
+	b	.L3967
+.L4015:
+	ldr	r2, .L4150+32
+	ldr	r1, .L4150+12
 	ldr	r3, [r2]
 	ldrh	r1, [r1]
 	adds	r3, r3, #1
 	str	r3, [r2]
 	cmp	r3, r1, lsr #4
-	ldr	r3, .L3926+16
-	bls	.L3799
+	ldr	r3, .L4150+16
+	bls	.L4018
 	movs	r1, #0
 	str	r1, [r2]
 	ldr	r2, [r3]
 	ldrh	ip, [r2, r0, lsl #1]
-	ldr	r2, .L3926+36
+	ldr	r2, .L4150+36
 	ldrh	r2, [r2]
 	cmp	ip, r2
-	bcs	.L3799
+	bcs	.L4018
 	movs	r2, #1
 	str	r3, [sp, #32]
 	bl	gc_add_sblk
 	ldr	r3, [sp, #32]
 	cmp	r0, #0
-	bne	.L3789
-.L3799:
+	bne	.L4008
+.L4018:
 	ldr	r3, [r3]
 	ldrh	r2, [r3, fp, lsl #1]
-	ldr	r3, .L3926+20
+	ldr	r3, .L4150+20
 	ldrh	r3, [r3]
 	cmp	r2, r3, lsr #1
-	bhi	.L3800
+	bhi	.L4019
 	movs	r2, #0
 	movs	r1, #1
 	mov	r0, fp
 	bl	gc_add_sblk
-	b	.L3789
-.L3800:
+	b	.L4008
+.L4019:
 	ldr	r3, [sp, #36]
 	ldr	r1, [sp, #40]
 	ldrh	r3, [r3]
 	ldrh	r1, [r1]
 	add	r3, r3, r1
-	ldr	r1, .L3926
+	ldr	r1, .L4150
 	ldrh	r1, [r1]
 	cmp	r3, r1, lsl #1
-	ble	.L3801
-	ldr	r3, .L3926+36
+	ble	.L4020
+	ldr	r3, .L4150+36
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bcc	.L3798
-	b	.L3801
-.L3927:
+	bcc	.L4017
+	b	.L4020
+.L4151:
 	.align	2
-.L3926:
-	.word	.LANCHOR89
-	.word	.LANCHOR92
-	.word	.LANCHOR93
+.L4150:
+	.word	.LANCHOR91
+	.word	.LANCHOR94
+	.word	.LANCHOR95
 	.word	.LANCHOR6
 	.word	.LANCHOR9
-	.word	.LANCHOR85
-	.word	.LANCHOR78
-	.word	.LANCHOR79
-	.word	.LANCHOR151
-	.word	.LANCHOR91
-	.word	.LANCHOR114
-	.word	.LC237
-.L3797:
+	.word	.LANCHOR87
+	.word	.LANCHOR80
+	.word	.LANCHOR81
+	.word	.LANCHOR154
+	.word	.LANCHOR93
+	.word	.LANCHOR116
+	.word	.LC243
+.L4016:
 	cmp	r7, #16
 	mov	r1, #1
 	strb	r1, [r8]
-	bls	.L3802
-	ldr	r3, .L3928
+	bls	.L4021
+	ldr	r3, .L4152
 	ldrh	r2, [r3]
-	ldr	r3, .L3928+4
+	ldr	r3, .L4152+4
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L3802
+	bhi	.L4021
 	movs	r2, #4
 	mov	r0, r1
 	bl	gc_search_src_blk
 	uxth	r0, r0
-	cbnz	r0, .L3803
+	cbnz	r0, .L4022
 	movs	r2, #4
-.L3913:
+.L4137:
 	movs	r1, #3
 	ldrb	r0, [r8]	@ zero_extendqisi2
 	bl	gc_search_src_blk
 	uxth	r0, r0
-.L3803:
+.L4022:
 	ldr	r3, [sp, #28]
 	cmp	r6, r3, lsr #1
-	ldr	r3, .L3928+8
+	ldr	r3, .L4152+8
 	ldrh	r3, [r3]
-	bls	.L3915
+	bls	.L4140
 	lsrs	r3, r3, #2
-.L3916:
+.L4141:
 	strh	r3, [r10]	@ movhi
-	b	.L3787
-.L3802:
+	b	.L4006
+.L4021:
 	movs	r2, #1
 	movs	r1, #2
 	mov	r0, r2
 	bl	gc_search_src_blk
 	uxth	r0, r0
 	cmp	r0, #0
-	bne	.L3803
+	bne	.L4022
 	movs	r2, #2
-	b	.L3913
-.L3807:
+	b	.L4137
+.L4026:
 	movs	r2, #4
 	movs	r1, #3
 	mov	r0, r7
 	bl	gc_search_src_blk
 	ldrh	r3, [r6]
 	uxth	r0, r0
-.L3915:
+.L4140:
 	lsrs	r3, r3, #1
-	b	.L3916
-.L3794:
-	ldr	r3, .L3928+8
+	b	.L4141
+.L4013:
+	ldr	r3, .L4152+8
 	mov	r5, fp
 	ldrh	r3, [r3]
 	lsrs	r3, r3, #2
 	strh	r3, [r2]	@ movhi
-	b	.L3748
-.L3752:
-	ldr	r5, .L3928+12
+	b	.L3967
+.L3971:
+	ldr	r5, .L4152+12
 	movw	r3, #65535
 	ldrh	r2, [r5]
 	cmp	r2, r3
-	bne	.L3808
+	bne	.L4027
 	bl	gc_get_src_blk
 	strh	r0, [r5]	@ movhi
-.L3808:
-	ldrh	r1, [r5]
+.L4027:
+	ldrh	r2, [r5]
 	movw	r3, #65535
-	cmp	r1, r3
-	beq	.L3923
-	ldr	r3, .L3928+16
-	ldrh	r0, [r5, #52]
+	cmp	r2, r3
+	beq	.L4028
+	ldr	r1, .L4152+16
+	ldrh	r1, [r1]
+	cmp	r1, r2
+	it	ls
+	strhls	r3, [r5]	@ movhi
+.L4028:
+	ldrh	r6, [r5]
+	movw	r3, #65535
+	cmp	r6, r3
+	beq	.L4147
+	ldr	r3, .L4152+20
+	ldrh	r1, [r5, #52]
 	ldr	r3, [r3]
-	add	r3, r3, r1, lsl #2
-	cbz	r0, .L3810
-	ldr	r5, .L3928+20
+	add	r3, r3, r6, lsl #2
+	cbz	r1, .L4030
+	ldr	r0, .L4152+24
 	movs	r2, #0
-.L3811:
-	uxth	r6, r2
-	cmp	r0, r6
-	bhi	.L3812
-.L3810:
+.L4031:
+	uxth	r5, r2
+	cmp	r1, r5
+	bhi	.L4032
+.L4030:
 	ldrb	r3, [r3, #2]	@ zero_extendqisi2
 	and	r2, r3, #224
 	cmp	r2, #224
-	beq	.L3813
+	beq	.L4033
 	tst	r3, #192
-	bne	.L3814
-.L3813:
-	ldr	r3, .L3928+24
+	bne	.L4034
+.L4033:
+	ldr	r3, .L4152+28
 	ldr	r3, [r3]
-	ldrh	r3, [r3, r1, lsl #1]
-	cbz	r3, .L3816
-	movw	r2, #2347
-	ldr	r1, .L3928+28
-	ldr	r0, .L3928+32
-	bl	printf
-	b	.L3816
-.L3812:
-	ldrh	r6, [r5, #2]!
+	ldrh	r3, [r3, r6, lsl #1]
+	cbz	r3, .L4036
+	movw	r2, #2537
+	ldr	r1, .L4152+32
+	ldr	r0, .L4152+36
+	bl	printf
+	b	.L4036
+.L4032:
+	ldrh	r5, [r0, #2]!
 	adds	r2, r2, #1
-	cmp	r6, r1
-	bne	.L3811
-.L3816:
-	ldr	r3, .L3928+12
+	cmp	r5, r6
+	bne	.L4031
+.L4036:
+	ldr	r3, .L4152+12
 	movw	r2, #65535
 	strh	r2, [r3]	@ movhi
-	b	.L3856
-.L3814:
+	b	.L4077
+.L4034:
 	movs	r3, #2
-	b	.L3922
-.L3753:
+	b	.L4146
+.L3972:
 	bl	gc_scan_src_blk
 	adds	r0, r0, #1
-	bne	.L3817
+	bne	.L4037
 	movs	r3, #3
-	b	.L3922
-.L3817:
-	ldr	r3, .L3928+12
+	b	.L4146
+.L4037:
+	ldr	r3, .L4152+12
 	movw	r1, #65535
 	ldrh	r2, [r3]
 	mov	r5, r3
 	cmp	r2, r1
-	beq	.L3767
+	beq	.L3986
 	ldrh	r1, [r3, #20]
-	cbz	r1, .L3818
+	cbz	r1, .L4038
 	movs	r2, #4
 	strb	r2, [r4]
 	movs	r2, #0
 	strh	r2, [r3, #22]	@ movhi
-	b	.L3856
-.L3818:
+	b	.L4077
+.L4038:
 	movs	r3, #1
 	strb	r3, [r4]
-	ldr	r4, .L3928+24
+	ldr	r4, .L4152+28
 	ldr	r1, [r4]
 	ldrh	r2, [r1, r2, lsl #1]
-	cbz	r2, .L3819
-	movw	r2, #2375
-	ldr	r1, .L3928+28
-	ldr	r0, .L3928+32
+	cbz	r2, .L4039
+	movw	r2, #2565
+	ldr	r1, .L4152+32
+	ldr	r0, .L4152+36
 	bl	printf
-.L3819:
+.L4039:
 	ldrh	r0, [r5]
 	bl	ftl_free_sblk
 	ldr	r3, [r4]
@@ -24906,66 +26433,66 @@ zftl_do_gc:
 	adds	r3, r3, #1
 	uxth	r3, r3
 	cmp	r3, #8
-	bhi	.L3820
+	bhi	.L4040
 	strh	r3, [r5, #26]	@ movhi
-	b	.L3816
-.L3820:
+	b	.L4036
+.L4040:
 	strh	r4, [r5, #26]	@ movhi
 	bl	ftl_flush
 	bl	pm_flush
 	bl	ftl_ext_info_flush
 	mov	r0, r4
 	bl	ftl_info_flush
-	b	.L3816
-.L3754:
-	ldr	r7, .L3928+12
+	b	.L4036
+.L3973:
+	ldr	r7, .L4152+12
 	mov	r5, r7
-.L3893:
+.L4116:
 	bl	gc_scan_src_blk_one_page
-	ldr	r3, .L3928+36
+	ldr	r3, .L4152+40
 	ldrh	r2, [r7, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcs	.L3822
+	bcs	.L4042
 	cmp	r6, #7
-	bls	.L3893
-	b	.L3856
-.L3822:
+	bls	.L4116
+	b	.L4077
+.L4042:
 	ldrh	r3, [r7, #20]
-	ldr	r2, .L3928+40
-	cbz	r3, .L3823
+	ldr	r2, .L4152+44
+	cbz	r3, .L4043
 	ldr	r2, [r2]
 	movs	r1, #4
 	strb	r1, [r4]
 	movs	r1, #0
 	strh	r1, [r7, #22]	@ movhi
 	tst	r2, #256
-	ldr	r4, .L3928+24
-	beq	.L3824
+	ldr	r4, .L4152+28
+	beq	.L4044
 	ldrh	r1, [r7]
 	ldr	r2, [r4]
-	ldr	r0, .L3928+44
+	ldr	r0, .L4152+48
 	ldrh	r2, [r2, r1, lsl #1]
 	bl	printf
-.L3824:
+.L4044:
 	ldr	r3, [r4]
 	ldrh	r2, [r5]
 	ldrh	r2, [r3, r2, lsl #1]
 	ldrh	r3, [r5, #20]
 	cmp	r2, r3
-	beq	.L3825
-	movw	r2, #2409
-	ldr	r1, .L3928+28
-	ldr	r0, .L3928+32
+	beq	.L4045
+	movw	r2, #2599
+	ldr	r1, .L4152+32
+	ldr	r0, .L4152+36
 	bl	printf
-.L3825:
+.L4045:
 	ldrh	r1, [r5, #20]
 	ldrh	r2, [r5]
 	ldr	r3, [r4]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	b	.L3856
-.L3823:
-	ldr	r3, .L3928+16
+	b	.L4077
+.L4043:
+	ldr	r3, .L4152+20
 	ldrh	r1, [r7]
 	ldr	r6, [r3]
 	movs	r3, #1
@@ -24973,24 +26500,24 @@ zftl_do_gc:
 	ldr	r3, [r2]
 	add	r6, r6, r1, lsl #2
 	lsls	r2, r3, #23
-	bpl	.L3826
+	bpl	.L4046
 	ldrb	r2, [r6, #2]	@ zero_extendqisi2
-	ldr	r0, .L3928+48
+	ldr	r0, .L4152+52
 	lsrs	r2, r2, #5
 	bl	printf
-.L3826:
+.L4046:
 	ldrb	r3, [r6, #2]	@ zero_extendqisi2
 	and	r2, r3, #224
 	cmp	r2, #224
-	beq	.L3827
+	beq	.L4047
 	tst	r3, #192
-	bne	.L3828
-.L3827:
-	movw	r2, #2419
-	ldr	r1, .L3928+28
-	ldr	r0, .L3928+32
+	bne	.L4048
+.L4047:
+	movw	r2, #2609
+	ldr	r1, .L4152+32
+	ldr	r0, .L4152+36
 	bl	printf
-.L3828:
+.L4048:
 	ldrh	r0, [r5]
 	bl	ftl_free_sblk
 	movw	r3, #65535
@@ -24999,68 +26526,69 @@ zftl_do_gc:
 	adds	r3, r3, #1
 	uxth	r3, r3
 	cmp	r3, #8
-	bhi	.L3829
+	bhi	.L4049
 	strh	r3, [r5, #26]	@ movhi
-	b	.L3856
-.L3829:
+	b	.L4077
+.L4049:
 	movs	r3, #0
 	strh	r3, [r5, #26]	@ movhi
-.L3921:
+.L4145:
 	bl	flt_sys_flush
-	b	.L3856
-.L3929:
+	b	.L4077
+.L4153:
 	.align	2
-.L3928:
-	.word	.LANCHOR92
-	.word	.LANCHOR93
-	.word	.LANCHOR89
-	.word	.LANCHOR63
+.L4152:
+	.word	.LANCHOR94
+	.word	.LANCHOR95
+	.word	.LANCHOR91
+	.word	.LANCHOR64
+	.word	.LANCHOR6
 	.word	.LANCHOR7
-	.word	.LANCHOR63+52
+	.word	.LANCHOR64+52
 	.word	.LANCHOR9
-	.word	.LANCHOR220
+	.word	.LANCHOR226
 	.word	.LC0
-	.word	.LANCHOR85
+	.word	.LANCHOR87
 	.word	.LANCHOR14
-	.word	.LC238
-	.word	.LC239
-.L3755:
+	.word	.LC244
+	.word	.LC245
+.L3974:
 	ldrh	r2, [r5, #80]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L3830
-	ldr	r3, .L3930
+	bne	.L4050
+	ldr	r3, .L4154
 	ldrb	r7, [r3]	@ zero_extendqisi2
 	cmp	r7, #1
-	bne	.L3830
-	ldr	r6, .L3930+4
+	bne	.L4050
+	ldr	r6, .L4154+4
 	bl	ftl_flush
 	movs	r1, #5
-	ldrh	r0, [r6, #314]
-	cbz	r0, .L3831
+	ldrh	r0, [r6, #570]
+	cbz	r0, .L4051
 	mov	r0, r7
-.L3831:
+.L4051:
 	bl	zftl_gc_get_free_sblk
 	movw	r3, #65535
 	mov	r4, r0
 	cmp	r0, r3
-	beq	.L3833
-	ldr	r3, .L3930+8
+	beq	.L4053
+	ldr	r3, .L4154+8
 	ldr	r7, [r3]
 	add	r7, r7, r0, lsl #2
 	ldrb	r3, [r7, #2]	@ zero_extendqisi2
 	tst	r3, #224
-	beq	.L3834
-	mov	r2, #2448
-	ldr	r1, .L3930+12
-	ldr	r0, .L3930+16
+	beq	.L4054
+	movw	r2, #2638
+	ldr	r1, .L4154+12
+	ldr	r0, .L4154+16
 	bl	printf
-.L3834:
+.L4054:
 	ldrb	r3, [r7, #2]	@ zero_extendqisi2
 	and	r3, r3, #15
 	orr	r3, r3, #176
 	strb	r3, [r7, #2]
-.L3855:
+.L4076:
 	movs	r1, #1
 	mov	r0, r4
 	bl	ftl_erase_sblk
@@ -25069,10 +26597,10 @@ zftl_do_gc:
 	strb	r3, [r5, #84]
 	mov	r0, r4
 	bl	ftl_get_blk_list_in_sblk
-	ldr	r3, .L3930+20
+	ldr	r3, .L4154+20
 	uxtb	r0, r0
 	movs	r7, #0
-	ldr	r10, .L3930+60
+	ldr	r10, .L4154+60
 	strb	r0, [r5, #89]
 	movs	r1, #255
 	ldrh	r3, [r3]
@@ -25083,10 +26611,10 @@ zftl_do_gc:
 	strh	r7, [r5, #90]	@ movhi
 	ldrh	r3, [r10]
 	strh	r0, [r5, #86]	@ movhi
-	ldr	r5, .L3930+24
+	ldr	r5, .L4154+24
 	ldrb	r2, [r5]	@ zero_extendqisi2
 	muls	r2, r3, r2
-	ldr	r3, .L3930+28
+	ldr	r3, .L4154+28
 	ldr	r0, [r3]
 	lsls	r2, r2, #2
 	bl	ftl_memset
@@ -25094,7 +26622,7 @@ zftl_do_gc:
 	movs	r1, #255
 	ldrb	r2, [r5]	@ zero_extendqisi2
 	muls	r2, r3, r2
-	ldr	r3, .L3930+32
+	ldr	r3, .L4154+32
 	ldr	r0, [r3]
 	lsls	r2, r2, #2
 	bl	ftl_memset
@@ -25102,7 +26630,7 @@ zftl_do_gc:
 	movs	r1, #255
 	ldrb	r2, [r5]	@ zero_extendqisi2
 	muls	r2, r3, r2
-	ldr	r3, .L3930+36
+	ldr	r3, .L4154+36
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldr	r3, [r8]
@@ -25112,90 +26640,90 @@ zftl_do_gc:
 	str	r4, [r3, #132]
 	bl	pm_flush
 	bl	ftl_ext_info_flush
-	ldr	r3, .L3930+40
+	ldr	r3, .L4154+40
 	mov	r0, r7
 	strh	r7, [r6, #52]	@ movhi
 	ldr	r3, [r3]
 	strh	r4, [r3, #126]	@ movhi
 	mov	r3, #-1
-	strh	r7, [r6, #310]	@ movhi
-	strh	r7, [r6, #312]	@ movhi
-	strh	r7, [r6, #316]	@ movhi
-	str	r3, [r6, #320]
+	strh	r7, [r6, #566]	@ movhi
+	strh	r7, [r6, #568]	@ movhi
+	strh	r7, [r6, #572]	@ movhi
+	str	r3, [r6, #576]
 	bl	ftl_info_flush
-	b	.L3856
-.L3830:
+	b	.L4077
+.L4050:
 	ldr	r3, [sp, #32]
-	ldr	r10, .L3930
+	ldr	r7, .L4154
 	cmp	r3, #1
 	ite	ne
-	movne	r7, #1
-	moveq	r7, #4
+	movne	r10, #1
+	moveq	r10, #4
 	cmp	r6, #15
-	ldr	r6, .L3930+4
+	ldr	r6, .L4154+4
 	it	ls
-	addls	r7, r7, #4
-.L3837:
-	subs	r7, r7, #1
-	uxtb	r7, r7
-	cmp	r7, #255
-	beq	.L3856
+	addls	r10, r10, #4
+.L4057:
+	add	r10, r10, #-1
+	uxtb	r10, r10
+	cmp	r10, #255
+	beq	.L4077
 	bl	gc_do_copy_back
-	ldrb	r3, [r10]	@ zero_extendqisi2
-	cbnz	r3, .L3838
-	ldr	r3, .L3930+44
+	ldrb	r3, [r7]	@ zero_extendqisi2
+	cbnz	r3, .L4058
+	ldr	r3, .L4154+44
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #3
-	bhi	.L3839
+	bhi	.L4059
 	bl	ftl_write_commit
-.L3839:
+.L4059:
 	ldrh	r2, [r6, #22]
 	ldrh	r3, [r6, #20]
 	cmp	r2, r3
-	bcc	.L3837
+	bcc	.L4057
 	movs	r3, #1
 	strb	r3, [r4]
-	ldr	r4, .L3930+48
+	ldr	r4, .L4154+48
 	bl	ftl_write_commit
 	bl	ftl_flush
 	ldrh	r1, [r6]
 	ldr	r2, [r4]
 	ldrh	r2, [r2, r1, lsl #1]
-	cbz	r2, .L3841
-	movw	r2, #2523
-	ldr	r1, .L3930+12
-	ldr	r0, .L3930+16
+	cbz	r2, .L4061
+	movw	r2, #2713
+	ldr	r1, .L4154+12
+	ldr	r0, .L4154+16
 	bl	printf
-.L3841:
+.L4061:
 	ldrh	r0, [r6]
 	ldr	r3, [r4]
 	ldrh	r3, [r3, r0, lsl #1]
-	cbnz	r3, .L3842
+	cbnz	r3, .L4062
 	bl	ftl_free_sblk
-	b	.L3816
-.L3842:
+	b	.L4036
+.L4062:
 	movs	r2, #1
 	movs	r1, #0
 	bl	gc_add_sblk
-	b	.L3816
-.L3838:
-	ldrh	r3, [r6, #316]
-	cbz	r3, .L3843
+	b	.L4036
+.L4058:
+	ldrh	r3, [r6, #572]
+	cbz	r3, .L4063
 	movs	r5, #0
-	strh	r5, [r6, #316]	@ movhi
+	strh	r5, [r6, #572]	@ movhi
 	bl	sblk_wait_write_queue_completed
 	bl	gc_write_completed
-	ldr	r0, [r6, #320]
+	ldr	r0, [r6, #576]
 	adds	r3, r0, #1
-	beq	.L3844
+	beq	.L4064
 	bl	ftl_mask_bad_block
-.L3844:
+.L4064:
 	ldr	r3, [r8]
-	str	r5, [r6, #320]
+	str	r5, [r6, #576]
 	strh	r5, [r6, #52]	@ movhi
 	ldrh	r0, [r3, #80]
 	bl	ftl_free_sblk
-	ldr	r1, .L3930+40
+	ldr	r1, .L4154+40
 	movw	r3, #65535
 	ldr	r0, [r6, #8]
 	ldr	r2, [r8]
@@ -25203,26 +26731,26 @@ zftl_do_gc:
 	strh	r3, [r2, #80]	@ movhi
 	strh	r3, [r1, #126]	@ movhi
 	strh	r3, [r2, #130]	@ movhi
-	cbz	r0, .L3845
-	bl	buf_free
-.L3845:
+	cbz	r0, .L4065
+	bl	zbuf_free
+.L4065:
 	movs	r5, #0
 	str	r5, [r6, #8]
 	bl	flt_sys_flush
-	movw	r2, #2561
-	ldr	r1, .L3930+12
-	ldr	r0, .L3930+16
+	movw	r2, #2751
+	ldr	r1, .L4154+12
+	ldr	r0, .L4154+16
 	strb	r5, [r4]
 	bl	printf
-	b	.L3856
-.L3843:
+	b	.L4077
+.L4063:
 	ldrh	r3, [r5, #86]
 	ldrh	r2, [r6, #22]
 	cmp	r3, #1
 	ldrh	r3, [r6, #20]
-	bls	.L3846
+	bls	.L4066
 	cmp	r2, r3
-	bcc	.L3837
+	bcc	.L4057
 	movs	r3, #1
 	strb	r3, [r4]
 	ldrh	r3, [r6, #52]
@@ -25233,12 +26761,12 @@ zftl_do_gc:
 	strh	r2, [r3, #54]	@ movhi
 	movw	r3, #65535
 	strh	r3, [r6]	@ movhi
-	b	.L3856
-.L3846:
+	b	.L4077
+.L4066:
 	cmp	r2, r3
 	mov	r1, #5
 	strb	r1, [r4]
-	bcc	.L3847
+	bcc	.L4067
 	ldrh	r3, [r6, #52]
 	adds	r2, r3, #1
 	strh	r2, [r6, #52]	@ movhi
@@ -25247,7 +26775,7 @@ zftl_do_gc:
 	strh	r2, [r3, #54]	@ movhi
 	movw	r3, #65535
 	strh	r3, [r6]	@ movhi
-.L3847:
+.L4067:
 	bl	ftl_flush
 	bl	sblk_wait_write_queue_completed
 	bl	gc_write_completed
@@ -25256,90 +26784,107 @@ zftl_do_gc:
 	strh	r2, [r3, #128]	@ movhi
 	bl	pm_flush
 	bl	ftl_ext_info_flush
-	ldr	r2, .L3930+52
 	movs	r3, #0
+	ldr	r2, .L4154+52
 	strh	r3, [r6, #12]	@ movhi
-	ldr	r3, .L3930+20
+	ldr	r3, .L4154+20
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	ldrh	r3, [r3]
-	cmp	r2, #2
-	strh	r2, [r6, #16]	@ movhi
 	strh	r3, [r6, #14]	@ movhi
-	bne	.L3849
+	ldr	r3, .L4154+56
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	strh	r3, [r6, #16]	@ movhi
+	cbz	r2, .L4068
+	ldr	r2, .L4154+60
+	ldrh	r2, [r2]
+	strh	r2, [r6, #14]	@ movhi
+	movs	r2, #1
+	strh	r2, [r6, #16]	@ movhi
+.L4068:
+	cmp	r3, #2
+	bne	.L4070
+	ldrh	r3, [r6, #14]
 	lsls	r3, r3, #1
 	strh	r3, [r6, #14]	@ movhi
-	ldr	r3, .L3930+56
+	ldr	r3, .L4154+64
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L3849
+	cbnz	r3, .L4070
 	movs	r3, #1
 	strh	r3, [r6, #16]	@ movhi
-.L3849:
+.L4070:
 	movs	r3, #0
 	strh	r3, [r6, #18]	@ movhi
-	b	.L3856
-.L3852:
+	b	.L4077
+.L4073:
 	ldrh	r2, [r5, #12]
 	ldrh	r3, [r5, #14]
 	cmp	r2, r3
-	bcc	.L3853
+	bcc	.L4074
 	movs	r3, #6
 	ldr	r0, [r5, #8]
 	strb	r3, [r4]
-	bl	buf_free
+	bl	zbuf_free
 	str	r10, [r5, #8]
-	b	.L3856
-.L3853:
+	b	.L4077
+.L4074:
 	cmp	r6, #15
-	bls	.L3758
+	bls	.L3977
 	ldr	r3, [sp, #32]
 	cmp	r3, #1
-	bne	.L3856
+	bne	.L4077
 	adds	r7, r7, #1
 	uxtb	r7, r7
 	cmp	r7, #4
-	bls	.L3758
-	b	.L3856
-.L3757:
-	movw	r6, #65535
+	bls	.L3977
+	b	.L4077
+.L4155:
+	.align	2
+.L4154:
+	.word	.LANCHOR78
+	.word	.LANCHOR64
+	.word	.LANCHOR7
+	.word	.LANCHOR226
+	.word	.LC0
+	.word	.LANCHOR87
+	.word	.LANCHOR80
+	.word	.LANCHOR155
+	.word	.LANCHOR156
+	.word	.LANCHOR76
+	.word	.LANCHOR104
+	.word	.LANCHOR54
+	.word	.LANCHOR9
+	.word	.LANCHOR35
+	.word	.LANCHOR73
+	.word	.LANCHOR79
+	.word	.LANCHOR74
+.L3976:
 	bl	gc_update_l2p_map_new
 	bl	gc_free_src_blk
 	bl	ftl_flush
+	movw	r6, #65535
 	bl	pm_flush
 	strh	r6, [r5, #80]	@ movhi
 	bl	ftl_ext_info_flush
-	ldr	r3, .L3930+40
+	ldr	r3, .L4156
 	movs	r0, #0
 	ldr	r3, [r3]
 	strh	r6, [r3, #126]	@ movhi
 	bl	ftl_info_flush
-.L3923:
+.L4147:
 	movs	r3, #0
-	b	.L3922
-.L3833:
-	movw	r2, #2454
-	ldr	r1, .L3930+12
-	ldr	r0, .L3930+16
+	b	.L4146
+.L4053:
+	movw	r2, #2644
+	ldr	r1, .L4156+4
+	ldr	r0, .L4156+8
 	bl	printf
-	b	.L3855
-.L3931:
+	b	.L4076
+.L4157:
 	.align	2
-.L3930:
-	.word	.LANCHOR76
-	.word	.LANCHOR63
-	.word	.LANCHOR7
-	.word	.LANCHOR220
+.L4156:
+	.word	.LANCHOR104
+	.word	.LANCHOR226
 	.word	.LC0
-	.word	.LANCHOR85
-	.word	.LANCHOR78
-	.word	.LANCHOR152
-	.word	.LANCHOR153
-	.word	.LANCHOR74
-	.word	.LANCHOR102
-	.word	.LANCHOR52
-	.word	.LANCHOR9
-	.word	.LANCHOR71
-	.word	.LANCHOR72
-	.word	.LANCHOR77
 	.size	zftl_do_gc, .-zftl_do_gc
 	.section	.text.zftl_write,"ax",%progbits
 	.align	1
@@ -25354,31 +26899,31 @@ zftl_write:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r8, r3
-	ldr	r3, .L3952
+	ldr	r3, .L4178
 	sub	sp, sp, #24
 	mov	r4, r0
 	mov	r5, r1
 	mov	r7, r2
 	ldr	r3, [r3]
 	lsls	r3, r3, #19
-	bpl	.L3933
+	bpl	.L4159
 	ldr	r3, [r8]
 	str	r3, [sp]
 	mov	r3, r2
 	mov	r2, r1
 	mov	r1, r0
-	ldr	r0, .L3952+4
+	ldr	r0, .L4178+4
 	bl	printf
-.L3933:
-	cbnz	r4, .L3934
-	ldr	r3, .L3952+8
+.L4159:
+	cbnz	r4, .L4160
+	ldr	r3, .L4178+8
 	mov	r4, #24576
 	ldr	r3, [r3]
-.L3935:
+.L4161:
 	adds	r2, r5, r7
 	cmp	r3, r2
-	bcc	.L3948
-	ldr	fp, .L3952+24
+	bcc	.L4174
+	ldr	fp, .L4178+24
 	add	r4, r4, r5
 	mov	r0, r4
 	ldrb	r5, [fp]	@ zero_extendqisi2
@@ -25394,47 +26939,47 @@ zftl_write:
 	adds	r5, r5, #1
 	str	r0, [sp, #12]
 	str	fp, [sp, #16]
-.L3937:
-	cbnz	r5, .L3944
+.L4163:
+	cbnz	r5, .L4170
 	bl	ftl_write_commit
-	ldr	r4, .L3952+12
 	bl	ftl_flush
+	ldr	r4, .L4178+12
 	mov	r0, r5
-	ldr	r5, .L3952+16
+	ldr	r5, .L4178+16
 	movs	r1, #1
 	bl	zftl_do_gc
-.L3945:
+.L4171:
 	ldrh	r3, [r5]
 	ldrh	r2, [r4]
 	add	r3, r3, r2
 	cmp	r3, #7
-	ble	.L3946
+	ble	.L4172
 	movs	r0, #0
-.L3932:
+.L4158:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3934:
+.L4160:
 	cmp	r4, #3
-	bhi	.L3948
+	bhi	.L4174
 	lsls	r4, r4, #13
 	mov	r3, #8192
-	b	.L3935
-.L3944:
+	b	.L4161
+.L4170:
 	movs	r0, #0
 	bl	buf_alloc
 	mov	fp, r0
-	cbnz	r0, .L3938
+	cbnz	r0, .L4164
 	bl	ftl_write_commit
-	b	.L3937
-.L3938:
+	b	.L4163
+.L4164:
 	mov	r3, #0
 	cmp	r6, r10
 	strb	r3, [r0, #41]
 	ldr	r3, [sp, #16]
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	strb	r2, [r0, #40]
-	bne	.L3940
+	bne	.L4166
 	mov	r1, r2
 	mov	r0, r4
 	str	r2, [sp, #20]
@@ -25448,7 +26993,7 @@ zftl_write:
 	ite	cs
 	strbcs	r1, [fp, #40]
 	strbcc	r7, [fp, #40]
-.L3942:
+.L4168:
 	ldrb	ip, [fp, #41]	@ zero_extendqisi2
 	mov	r1, r8
 	ldrb	r2, [fp, #40]	@ zero_extendqisi2
@@ -25457,7 +27002,7 @@ zftl_write:
 	lsls	r2, r2, #9
 	add	r0, r0, ip, lsl #9
 	bl	ftl_memcpy
-	ldr	r3, .L3952+20
+	ldr	r3, .L4178+20
 	str	r6, [fp, #20]
 	adds	r6, r6, #1
 	ldr	r1, [r3]
@@ -25469,8 +27014,8 @@ zftl_write:
 	bl	ftl_write_buf
 	ldrb	r3, [fp, #40]	@ zero_extendqisi2
 	add	r8, r8, r3, lsl #9
-	b	.L3937
-.L3940:
+	b	.L4163
+.L4166:
 	ldr	r3, [sp, #12]
 	cmp	r6, r3
 	itttt	eq
@@ -25478,25 +27023,25 @@ zftl_write:
 	addeq	r1, r4, r7
 	subeq	r2, r1, r2
 	strbeq	r2, [r0, #40]
-	b	.L3942
-.L3946:
+	b	.L4168
+.L4172:
 	movs	r1, #1
 	movs	r0, #0
 	bl	zftl_do_gc
-	b	.L3945
-.L3948:
+	b	.L4171
+.L4174:
 	mov	r0, #-1
-	b	.L3932
-.L3953:
+	b	.L4158
+.L4179:
 	.align	2
-.L3952:
+.L4178:
 	.word	.LANCHOR14
-	.word	.LC240
-	.word	.LANCHOR59
-	.word	.LANCHOR99
-	.word	.LANCHOR95
-	.word	.LANCHOR102
-	.word	.LANCHOR123
+	.word	.LC246
+	.word	.LANCHOR61
+	.word	.LANCHOR101
+	.word	.LANCHOR97
+	.word	.LANCHOR104
+	.word	.LANCHOR125
 	.size	zftl_write, .-zftl_write
 	.section	.text.ftl_vendor_write,"ax",%progbits
 	.align	1
@@ -25586,11 +27131,11 @@ ftl_write:
 	mov	r4, r2
 	mov	r5, r3
 	mov	r6, r0
-	cbnz	r0, .L3959
+	cbnz	r0, .L4185
 	mov	r3, r2
 	mov	r2, r5
 	bl	idb_write_data
-.L3959:
+.L4185:
 	mov	r3, r5
 	mov	r2, r4
 	mov	r1, r7
@@ -25609,17 +27154,17 @@ ftl_write:
 zftl_discard:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L4008
+	ldr	r2, .L4234
 	adds	r3, r0, r1
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r1
 	sub	sp, sp, #32
 	ldr	r2, [r2]
 	cmp	r2, r3
-	bcc	.L3981
-	ldr	r2, .L4008+4
+	bcc	.L4207
+	ldr	r2, .L4234+4
 	add	r7, r0, #24576
-	ldr	r3, .L4008+8
+	ldr	r3, .L4234+8
 	ldr	r0, [r2]
 	ldr	r1, [r3]
 	str	r3, [sp, #12]
@@ -25627,16 +27172,16 @@ zftl_discard:
 	str	r2, [sp, #16]
 	add	r1, r1, r4
 	str	r1, [r3]
-	beq	.L3962
+	beq	.L4188
 	movs	r3, #0
 	mov	r2, r7
 	str	r3, [sp]
 	mov	r3, r4
-	ldr	r0, .L4008+12
+	ldr	r0, .L4234+12
 	bl	printf
-.L3962:
-	ldr	r8, .L4008+32
-	ldr	r10, .L4008+36
+.L4188:
+	ldr	r8, .L4234+36
+	ldr	r10, .L4234+40
 	ldr	r3, [r8]
 	ldr	r2, [r3, #8]
 	str	r2, [sp, #8]
@@ -25654,7 +27199,7 @@ zftl_discard:
 	bl	__aeabi_uidivmod
 	mov	fp, r1
 	cmp	r1, #0
-	beq	.L3963
+	beq	.L4189
 	subs	r6, r6, r1
 	mov	r0, r5
 	cmp	r6, r4
@@ -25663,19 +27208,19 @@ zftl_discard:
 	bl	lpa_hash_get_ppa
 	str	r0, [sp, #24]
 	adds	r0, r0, #1
-	bne	.L3964
+	bne	.L4190
 	movs	r2, #0
 	add	r1, sp, #24
 	mov	r0, r5
 	bl	pm_log2phys
-.L3964:
+.L4190:
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	beq	.L3966
+	beq	.L4192
 	movs	r0, #0
 	bl	buf_alloc
 	mov	r3, r0
-	cbz	r0, .L3966
+	cbz	r0, .L4192
 	ldr	r2, [sp, #8]
 	movs	r1, #0
 	str	r5, [r0, #20]
@@ -25696,41 +27241,41 @@ zftl_discard:
 	ldr	r3, [r2, #76]
 	adds	r3, r3, #1
 	str	r3, [r2, #76]
-.L3966:
+.L4192:
 	uxth	r6, r6
 	adds	r5, r5, #1
 	subs	r4, r4, r6
-.L3963:
-	cbz	r4, .L3968
+.L4189:
+	cbz	r4, .L4194
 	bl	ftl_flush
-.L3968:
-	ldr	fp, .L4008+40
+.L4194:
+	ldr	fp, .L4234+44
 	mov	r3, #-1
-	ldr	r6, .L4008+16
+	ldr	r6, .L4234+16
 	str	r3, [sp, #28]
-.L3969:
+.L4195:
 	ldrb	r3, [r10]	@ zero_extendqisi2
 	cmp	r4, r3
-	bcs	.L3974
+	bcs	.L4200
 	cmp	r4, #0
-	beq	.L3976
+	beq	.L4202
 	mov	r0, r5
 	bl	lpa_hash_get_ppa
 	str	r0, [sp, #24]
 	adds	r0, r0, #1
-	bne	.L3977
+	bne	.L4203
 	movs	r2, #0
 	add	r1, sp, #24
 	mov	r0, r5
 	bl	pm_log2phys
-.L3977:
+.L4203:
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	beq	.L3976
+	beq	.L4202
 	movs	r0, #0
 	bl	buf_alloc
 	mov	r6, r0
-	cbz	r0, .L3976
+	cbz	r0, .L4202
 	movs	r3, #0
 	str	r5, [r0, #20]
 	strb	r3, [r0, #41]
@@ -25739,12 +27284,12 @@ zftl_discard:
 	str	r3, [r0, #16]
 	ldrb	r3, [r10]	@ zero_extendqisi2
 	cmp	r4, r3
-	bcc	.L3979
-	movw	r2, #1251
-	ldr	r1, .L4008+20
-	ldr	r0, .L4008+24
+	bcc	.L4205
+	movw	r2, #1259
+	ldr	r1, .L4234+20
+	ldr	r0, .L4234+24
 	bl	printf
-.L3979:
+.L4205:
 	lsls	r2, r4, #9
 	movs	r1, #0
 	ldr	r0, [r6, #4]
@@ -25756,42 +27301,42 @@ zftl_discard:
 	ldr	r3, [r2, #76]
 	adds	r3, r3, #1
 	str	r3, [r2, #76]
-.L3976:
+.L4202:
 	ldr	r3, [sp, #12]
 	ldr	r1, [r3]
 	cmp	r1, #8192
-	bls	.L3982
+	bls	.L4208
 	ldr	r3, [sp, #16]
 	ldr	r3, [r3]
 	lsls	r3, r3, #19
-	bpl	.L3980
+	bpl	.L4206
 	movs	r3, #0
 	mov	r2, r7
 	str	r3, [sp]
 	mov	r3, r4
-	ldr	r0, .L4008+12
+	ldr	r0, .L4234+12
 	bl	printf
-.L3980:
+.L4206:
 	ldr	r3, [sp, #12]
 	movs	r4, #0
 	str	r4, [r3]
 	bl	flt_sys_flush
-	ldr	r3, .L4008+28
+	ldr	r3, .L4234+28
 	movs	r2, #1
 	str	r2, [r3]
-.L3982:
+.L4208:
 	movs	r0, #0
-	b	.L3960
-.L3974:
+	b	.L4186
+.L4200:
 	mov	r0, r5
 	bl	lpa_hash_get_ppa
 	str	r0, [sp, #24]
 	adds	r0, r0, #1
-	beq	.L3970
+	beq	.L4196
 	movs	r0, #0
 	bl	buf_alloc
 	mov	r3, r0
-	cbz	r0, .L3972
+	cbz	r0, .L4198
 	ldrb	r2, [r10]	@ zero_extendqisi2
 	movs	r1, #0
 	strb	r1, [r0, #41]
@@ -25807,61 +27352,65 @@ zftl_discard:
 	mov	r0, r3
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-.L4007:
+.L4233:
 	ldr	r2, [r8]
 	ldr	r3, [r2, #76]
 	adds	r3, r3, #1
 	str	r3, [r2, #76]
-.L3972:
+.L4198:
 	ldrb	r3, [r10]	@ zero_extendqisi2
 	adds	r5, r5, #1
 	subs	r4, r4, r3
-	b	.L3969
-.L3970:
+	b	.L4195
+.L4196:
 	movs	r2, #0
 	add	r1, sp, #24
 	mov	r0, r5
 	bl	pm_log2phys
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	beq	.L3972
+	beq	.L4198
 	add	r1, sp, #28
 	movs	r2, #1
 	mov	r0, r5
 	bl	pm_log2phys
+	ldrb	r3, [r6]	@ zero_extendqisi2
 	ldrh	r2, [fp]
+	rsb	r3, r3, #24
+	subs	r0, r3, r2
 	movs	r3, #1
-	ldrb	r1, [r6]	@ zero_extendqisi2
-	rsb	r0, r2, #21
 	lsls	r3, r3, r0
 	ldr	r0, [sp, #24]
 	subs	r3, r3, #1
 	lsrs	r0, r0, r2
+	ldr	r2, .L4234+32
 	ands	r0, r0, r3
+	ldrb	r1, [r2]	@ zero_extendqisi2
 	bl	__aeabi_uidiv
 	uxth	r0, r0
 	bl	ftl_vpn_decrement
-	b	.L4007
-.L3981:
+	b	.L4233
+.L4207:
 	mov	r0, #-1
-.L3960:
+.L4186:
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L4009:
+.L4235:
 	.align	2
-.L4008:
-	.word	.LANCHOR59
+.L4234:
+	.word	.LANCHOR61
 	.word	.LANCHOR14
-	.word	.LANCHOR221
-	.word	.LC241
-	.word	.LANCHOR67
-	.word	.LANCHOR222
+	.word	.LANCHOR227
+	.word	.LC247
+	.word	.LANCHOR31
+	.word	.LANCHOR228
 	.word	.LC0
-	.word	.LANCHOR114
-	.word	.LANCHOR102
-	.word	.LANCHOR123
-	.word	.LANCHOR66
+	.word	.LANCHOR116
+	.word	.LANCHOR69
+	.word	.LANCHOR104
+	.word	.LANCHOR125
+	.word	.LANCHOR68
 	.size	zftl_discard, .-zftl_discard
 	.section	.text.ftl_discard,"ax",%progbits
 	.align	1
@@ -25879,8 +27428,63 @@ ftl_discard:
 	mov	r1, r2
 	b	zftl_discard
 	.size	ftl_discard, .-ftl_discard
+	.section	.text.dump_pm_blk,"ax",%progbits
+	.align	1
+	.global	dump_pm_blk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	dump_pm_blk, %function
+dump_pm_blk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	movs	r2, #4
+	ldr	r4, .L4241
+	movs	r5, #0
+	movw	r7, #65535
+	ldr	r0, .L4241+4
+	ldr	r1, [r4]
+	ldr	r6, .L4241+8
+	ldrh	r3, [r1, #698]
+	add	r1, r1, #704
+	bl	rknand_print_hex
+	ldr	r1, [r4]
+	movs	r2, #2
+	ldrh	r3, [r6]
+	ldr	r0, .L4241+12
+	add	r1, r1, #416
+	bl	rknand_print_hex
+.L4238:
+	ldrh	r2, [r6]
+	uxth	r3, r5
+	cmp	r2, r3
+	bhi	.L4240
+	pop	{r3, r4, r5, r6, r7, pc}
+.L4240:
+	ldr	r2, [r4]
+	uxth	r3, r5
+	adds	r3, r3, #208
+	ldrh	r0, [r2, r3, lsl #1]
+	cmp	r0, r7
+	beq	.L4239
+	movs	r1, #0
+	bl	ftl_sblk_dump
+.L4239:
+	adds	r5, r5, #1
+	b	.L4238
+.L4242:
+	.align	2
+.L4241:
+	.word	.LANCHOR104
+	.word	.LC248
+	.word	.LANCHOR149
+	.word	.LC249
+	.size	dump_pm_blk, .-dump_pm_blk
 	.global	g_pm_spare
 	.global	pm_first_write
+	.global	pm_force_gc
 	.global	pm_gc_enable
 	.global	pm_last_load_ram_id
 	.global	pm_last_update_ram_id
@@ -25922,6 +27526,7 @@ ftl_discard:
 	.global	ftl_info_data_buffer
 	.global	ftl_tmp_buffer
 	.global	g_ftl_info_blk
+	.global	tlc_b05a_prog_tbl
 	.global	tlc_prog_order
 	.global	gc_des_ppa_tbl
 	.global	gc_valid_page_ppa
@@ -26008,10 +27613,14 @@ ftl_discard:
 	.global	g_die_cs_idx
 	.global	IDByte
 	.global	flash_read_retry
+	.global	_c_ftl_cs_bits
 	.global	g_maxRetryCount
 	.global	g_maxRegNum
 	.global	g_retryMode
 	.global	g_flash_toggle_mode_en
+	.global	g_flash_micron_3d_tlc_b16a
+	.global	g_flash_micron_3d_tlc_b05a
+	.global	g_flash_micron_3d_tlc_flag
 	.global	g_flash_3d_mlc_flag
 	.global	g_flash_3d_tlc_flag
 	.global	g_flash_multi_page_prog_en
@@ -26036,7 +27645,7 @@ ftl_discard:
 	.global	g_flash_page_buffer
 	.section	.bss.IDByte,"aw",%nobits
 	.align	2
-	.set	.LANCHOR42,. + 0
+	.set	.LANCHOR44,. + 0
 	.type	IDByte, %object
 	.size	IDByte, 32
 IDByte:
@@ -26050,25 +27659,31 @@ _c_ftl_blk_pre_plane:
 	.space	2
 	.section	.bss._c_ftl_block_addr_log2,"aw",%nobits
 	.align	1
-	.set	.LANCHOR66,. + 0
+	.set	.LANCHOR68,. + 0
 	.type	_c_ftl_block_addr_log2, %object
 	.size	_c_ftl_block_addr_log2, 2
 _c_ftl_block_addr_log2:
 	.space	2
 	.section	.bss._c_ftl_block_align_addr,"aw",%nobits
 	.align	1
-	.set	.LANCHOR103,. + 0
+	.set	.LANCHOR105,. + 0
 	.type	_c_ftl_block_align_addr, %object
 	.size	_c_ftl_block_align_addr, 2
 _c_ftl_block_align_addr:
 	.space	2
 	.section	.bss._c_ftl_byte_pre_page,"aw",%nobits
 	.align	1
-	.set	.LANCHOR203,. + 0
+	.set	.LANCHOR208,. + 0
 	.type	_c_ftl_byte_pre_page, %object
 	.size	_c_ftl_byte_pre_page, 2
 _c_ftl_byte_pre_page:
 	.space	2
+	.section	.bss._c_ftl_cs_bits,"aw",%nobits
+	.set	.LANCHOR31,. + 0
+	.type	_c_ftl_cs_bits, %object
+	.size	_c_ftl_cs_bits, 1
+_c_ftl_cs_bits:
+	.space	1
 	.section	.bss._c_ftl_nand_blks_per_die,"aw",%nobits
 	.align	1
 	.type	_c_ftl_nand_blks_per_die, %object
@@ -26076,73 +27691,73 @@ _c_ftl_byte_pre_page:
 _c_ftl_nand_blks_per_die:
 	.space	2
 	.section	.bss._c_ftl_nand_die_num,"aw",%nobits
-	.set	.LANCHOR104,. + 0
+	.set	.LANCHOR106,. + 0
 	.type	_c_ftl_nand_die_num, %object
 	.size	_c_ftl_nand_die_num, 1
 _c_ftl_nand_die_num:
 	.space	1
 	.section	.bss._c_ftl_nand_planes_num,"aw",%nobits
-	.set	.LANCHOR78,. + 0
+	.set	.LANCHOR80,. + 0
 	.type	_c_ftl_nand_planes_num, %object
 	.size	_c_ftl_nand_planes_num, 1
 _c_ftl_nand_planes_num:
 	.space	1
 	.section	.bss._c_ftl_nand_type,"aw",%nobits
-	.set	.LANCHOR71,. + 0
+	.set	.LANCHOR73,. + 0
 	.type	_c_ftl_nand_type, %object
 	.size	_c_ftl_nand_type, 1
 _c_ftl_nand_type:
 	.space	1
 	.section	.bss._c_ftl_page_pre_blk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR77,. + 0
+	.set	.LANCHOR79,. + 0
 	.type	_c_ftl_page_pre_blk, %object
 	.size	_c_ftl_page_pre_blk, 2
 _c_ftl_page_pre_blk:
 	.space	2
 	.section	.bss._c_ftl_page_pre_slc_blk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR85,. + 0
+	.set	.LANCHOR87,. + 0
 	.type	_c_ftl_page_pre_slc_blk, %object
 	.size	_c_ftl_page_pre_slc_blk, 2
 _c_ftl_page_pre_slc_blk:
 	.space	2
 	.section	.bss._c_ftl_planes_per_die,"aw",%nobits
-	.set	.LANCHOR67,. + 0
+	.set	.LANCHOR69,. + 0
 	.type	_c_ftl_planes_per_die, %object
 	.size	_c_ftl_planes_per_die, 1
 _c_ftl_planes_per_die:
 	.space	1
 	.section	.bss._c_ftl_pm_page_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR187,. + 0
+	.set	.LANCHOR194,. + 0
 	.type	_c_ftl_pm_page_num, %object
 	.size	_c_ftl_pm_page_num, 2
 _c_ftl_pm_page_num:
 	.space	2
 	.section	.bss._c_ftl_sec_per_page,"aw",%nobits
-	.set	.LANCHOR123,. + 0
+	.set	.LANCHOR125,. + 0
 	.type	_c_ftl_sec_per_page, %object
 	.size	_c_ftl_sec_per_page, 1
 _c_ftl_sec_per_page:
 	.space	1
 	.section	.bss._c_max_pm_sblk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR146,. + 0
+	.set	.LANCHOR149,. + 0
 	.type	_c_max_pm_sblk, %object
 	.size	_c_max_pm_sblk, 2
 _c_max_pm_sblk:
 	.space	2
 	.section	.bss._c_mix_max_slc_ec_count,"aw",%nobits
 	.align	1
-	.set	.LANCHOR118,. + 0
+	.set	.LANCHOR120,. + 0
 	.type	_c_mix_max_slc_ec_count, %object
 	.size	_c_mix_max_slc_ec_count, 2
 _c_mix_max_slc_ec_count:
 	.space	2
 	.section	.bss._c_mix_max_xlc_ec_count,"aw",%nobits
 	.align	1
-	.set	.LANCHOR116,. + 0
+	.set	.LANCHOR118,. + 0
 	.type	_c_mix_max_xlc_ec_count, %object
 	.size	_c_mix_max_xlc_ec_count, 2
 _c_mix_max_xlc_ec_count:
@@ -26156,49 +27771,49 @@ _c_slc_to_xlc_ec_ratio:
 	.space	2
 	.section	.bss._c_swl_slc_gc_th,"aw",%nobits
 	.align	1
-	.set	.LANCHOR145,. + 0
+	.set	.LANCHOR148,. + 0
 	.type	_c_swl_slc_gc_th, %object
 	.size	_c_swl_slc_gc_th, 2
 _c_swl_slc_gc_th:
 	.space	2
 	.section	.bss._c_swl_xlc_gc_th,"aw",%nobits
 	.align	1
-	.set	.LANCHOR144,. + 0
+	.set	.LANCHOR147,. + 0
 	.type	_c_swl_xlc_gc_th, %object
 	.size	_c_swl_xlc_gc_th, 2
 _c_swl_xlc_gc_th:
 	.space	2
 	.section	.bss._c_totle_data_density,"aw",%nobits
 	.align	2
-	.set	.LANCHOR208,. + 0
+	.set	.LANCHOR213,. + 0
 	.type	_c_totle_data_density, %object
 	.size	_c_totle_data_density, 4
 _c_totle_data_density:
 	.space	4
 	.section	.bss._c_totle_log_page,"aw",%nobits
 	.align	2
-	.set	.LANCHOR120,. + 0
+	.set	.LANCHOR122,. + 0
 	.type	_c_totle_log_page, %object
 	.size	_c_totle_log_page, 4
 _c_totle_log_page:
 	.space	4
 	.section	.bss._c_totle_phy_density,"aw",%nobits
 	.align	2
-	.set	.LANCHOR207,. + 0
+	.set	.LANCHOR212,. + 0
 	.type	_c_totle_phy_density, %object
 	.size	_c_totle_phy_density, 4
 _c_totle_phy_density:
 	.space	4
 	.section	.bss._c_user_data_density,"aw",%nobits
 	.align	2
-	.set	.LANCHOR59,. + 0
+	.set	.LANCHOR61,. + 0
 	.type	_c_user_data_density, %object
 	.size	_c_user_data_density, 4
 _c_user_data_density:
 	.space	4
 	.section	.bss._gc_after_discard_en,"aw",%nobits
 	.align	2
-	.set	.LANCHOR114,. + 0
+	.set	.LANCHOR116,. + 0
 	.type	_gc_after_discard_en, %object
 	.size	_gc_after_discard_en, 4
 _gc_after_discard_en:
@@ -26217,76 +27832,76 @@ _last_write_time:
 	.space	4
 	.section	.bss._max_slc_super_block,"aw",%nobits
 	.align	1
-	.set	.LANCHOR117,. + 0
+	.set	.LANCHOR119,. + 0
 	.type	_max_slc_super_block, %object
 	.size	_max_slc_super_block, 2
 _max_slc_super_block:
 	.space	2
 	.section	.bss._max_xlc_super_block,"aw",%nobits
 	.align	1
-	.set	.LANCHOR93,. + 0
+	.set	.LANCHOR95,. + 0
 	.type	_max_xlc_super_block, %object
 	.size	_max_xlc_super_block, 2
 _max_xlc_super_block:
 	.space	2
 	.section	.bss._min_slc_super_block,"aw",%nobits
 	.align	1
-	.set	.LANCHOR89,. + 0
+	.set	.LANCHOR91,. + 0
 	.type	_min_slc_super_block, %object
 	.size	_min_slc_super_block, 2
 _min_slc_super_block:
 	.space	2
 	.section	.bss.discard_sector_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR221,. + 0
+	.set	.LANCHOR227,. + 0
 	.type	discard_sector_count, %object
 	.size	discard_sector_count, 4
 discard_sector_count:
 	.space	4
 	.section	.bss.fill_spare_size,"aw",%nobits
 	.align	1
-	.set	.LANCHOR48,. + 0
+	.set	.LANCHOR50,. + 0
 	.type	fill_spare_size, %object
 	.size	fill_spare_size, 2
 fill_spare_size:
 	.space	2
 	.section	.bss.flash_ddr_tuning_sdr_read_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR160,. + 0
+	.set	.LANCHOR163,. + 0
 	.type	flash_ddr_tuning_sdr_read_count, %object
 	.size	flash_ddr_tuning_sdr_read_count, 4
 flash_ddr_tuning_sdr_read_count:
 	.space	4
 	.section	.bss.flash_read_retry,"aw",%nobits
 	.align	2
-	.set	.LANCHOR162,. + 0
+	.set	.LANCHOR165,. + 0
 	.type	flash_read_retry, %object
 	.size	flash_read_retry, 4
 flash_read_retry:
 	.space	4
 	.section	.bss.free_buf_count,"aw",%nobits
-	.set	.LANCHOR52,. + 0
+	.set	.LANCHOR54,. + 0
 	.type	free_buf_count, %object
 	.size	free_buf_count, 1
 free_buf_count:
 	.space	1
 	.section	.bss.free_mix_sblk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR99,. + 0
+	.set	.LANCHOR101,. + 0
 	.type	free_mix_sblk, %object
 	.size	free_mix_sblk, 2
 free_mix_sblk:
 	.space	2
 	.section	.bss.free_slc_sblk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR95,. + 0
+	.set	.LANCHOR97,. + 0
 	.type	free_slc_sblk, %object
 	.size	free_slc_sblk, 2
 free_slc_sblk:
 	.space	2
 	.section	.bss.free_xlc_sblk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR97,. + 0
+	.set	.LANCHOR99,. + 0
 	.type	free_xlc_sblk, %object
 	.size	free_xlc_sblk, 2
 free_xlc_sblk:
@@ -26298,14 +27913,14 @@ free_xlc_sblk:
 ftl_ext_info_data_buffer:
 	.space	16384
 	.section	.bss.ftl_ext_info_first_write,"aw",%nobits
-	.set	.LANCHOR183,. + 0
+	.set	.LANCHOR186,. + 0
 	.type	ftl_ext_info_first_write, %object
 	.size	ftl_ext_info_first_write, 1
 ftl_ext_info_first_write:
 	.space	1
 	.section	.bss.ftl_flush_jiffies,"aw",%nobits
 	.align	2
-	.set	.LANCHOR217,. + 0
+	.set	.LANCHOR222,. + 0
 	.type	ftl_flush_jiffies, %object
 	.size	ftl_flush_jiffies, 4
 ftl_flush_jiffies:
@@ -26318,41 +27933,41 @@ ftl_info_data_buffer:
 	.space	16384
 	.section	.bss.ftl_info_spare,"aw",%nobits
 	.align	6
-	.set	.LANCHOR178,. + 0
+	.set	.LANCHOR181,. + 0
 	.type	ftl_info_spare, %object
 	.size	ftl_info_spare, 256
 ftl_info_spare:
 	.space	256
 	.section	.bss.ftl_low_format_cur_blk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR60,. + 0
+	.set	.LANCHOR62,. + 0
 	.type	ftl_low_format_cur_blk, %object
 	.size	ftl_low_format_cur_blk, 2
 ftl_low_format_cur_blk:
 	.space	2
 	.section	.bss.ftl_power_lost_flag,"aw",%nobits
-	.set	.LANCHOR182,. + 0
+	.set	.LANCHOR185,. + 0
 	.type	ftl_power_lost_flag, %object
 	.size	ftl_power_lost_flag, 1
 ftl_power_lost_flag:
 	.space	1
 	.section	.bss.ftl_sblk_lpa_tbl,"aw",%nobits
 	.align	2
-	.set	.LANCHOR109,. + 0
+	.set	.LANCHOR111,. + 0
 	.type	ftl_sblk_lpa_tbl, %object
 	.size	ftl_sblk_lpa_tbl, 4
 ftl_sblk_lpa_tbl:
 	.space	4
 	.section	.bss.ftl_sblk_update_list,"aw",%nobits
 	.align	1
-	.set	.LANCHOR65,. + 0
+	.set	.LANCHOR67,. + 0
 	.type	ftl_sblk_update_list, %object
 	.size	ftl_sblk_update_list, 16
 ftl_sblk_update_list:
 	.space	16
 	.section	.bss.ftl_sblk_update_list_offset,"aw",%nobits
 	.align	1
-	.set	.LANCHOR115,. + 0
+	.set	.LANCHOR117,. + 0
 	.type	ftl_sblk_update_list_offset, %object
 	.size	ftl_sblk_update_list_offset, 2
 ftl_sblk_update_list_offset:
@@ -26366,13 +27981,13 @@ ftl_sblk_vpn:
 	.space	4
 	.section	.bss.ftl_sblk_vpn_update_id,"aw",%nobits
 	.align	1
-	.set	.LANCHOR64,. + 0
+	.set	.LANCHOR66,. + 0
 	.type	ftl_sblk_vpn_update_id, %object
 	.size	ftl_sblk_vpn_update_id, 2
 ftl_sblk_vpn_update_id:
 	.space	2
 	.section	.bss.ftl_sys_info_first_write,"aw",%nobits
-	.set	.LANCHOR181,. + 0
+	.set	.LANCHOR184,. + 0
 	.type	ftl_sys_info_first_write, %object
 	.size	ftl_sys_info_first_write, 1
 ftl_sys_info_first_write:
@@ -26385,14 +28000,14 @@ ftl_tmp_buffer:
 	.space	16384
 	.section	.bss.ftl_tmp_spare,"aw",%nobits
 	.align	6
-	.set	.LANCHOR176,. + 0
+	.set	.LANCHOR179,. + 0
 	.type	ftl_tmp_spare, %object
 	.size	ftl_tmp_spare, 256
 ftl_tmp_spare:
 	.space	256
 	.section	.bss.ftl_vpn_update_count,"aw",%nobits
 	.align	1
-	.set	.LANCHOR113,. + 0
+	.set	.LANCHOR115,. + 0
 	.type	ftl_vpn_update_count, %object
 	.size	ftl_vpn_update_count, 2
 ftl_vpn_update_count:
@@ -26406,14 +28021,14 @@ g_block_align_addr:
 	.space	2
 	.section	.bss.g_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR50,. + 0
+	.set	.LANCHOR52,. + 0
 	.type	g_buf, %object
 	.size	g_buf, 1536
 g_buf:
 	.space	1536
 	.section	.bss.g_die_addr,"aw",%nobits
 	.align	2
-	.set	.LANCHOR141,. + 0
+	.set	.LANCHOR143,. + 0
 	.type	g_die_addr, %object
 	.size	g_die_addr, 32
 g_die_addr:
@@ -26426,57 +28041,75 @@ g_die_addr:
 g_die_cs_idx:
 	.space	8
 	.section	.bss.g_flash_3d_mlc_flag,"aw",%nobits
-	.set	.LANCHOR72,. + 0
+	.set	.LANCHOR74,. + 0
 	.type	g_flash_3d_mlc_flag, %object
 	.size	g_flash_3d_mlc_flag, 1
 g_flash_3d_mlc_flag:
 	.space	1
 	.section	.bss.g_flash_3d_tlc_flag,"aw",%nobits
-	.set	.LANCHOR75,. + 0
+	.set	.LANCHOR77,. + 0
 	.type	g_flash_3d_tlc_flag, %object
 	.size	g_flash_3d_tlc_flag, 1
 g_flash_3d_tlc_flag:
 	.space	1
 	.section	.bss.g_flash_blk_info,"aw",%nobits
 	.align	1
-	.set	.LANCHOR195,. + 0
+	.set	.LANCHOR198,. + 0
 	.type	g_flash_blk_info, %object
 	.size	g_flash_blk_info, 4
 g_flash_blk_info:
 	.space	4
 	.section	.bss.g_flash_cur_mode,"aw",%nobits
-	.set	.LANCHOR32,. + 0
+	.set	.LANCHOR33,. + 0
 	.type	g_flash_cur_mode, %object
 	.size	g_flash_cur_mode, 4
 g_flash_cur_mode:
 	.space	4
 	.section	.bss.g_flash_interface_mode,"aw",%nobits
-	.set	.LANCHOR43,. + 0
+	.set	.LANCHOR45,. + 0
 	.type	g_flash_interface_mode, %object
 	.size	g_flash_interface_mode, 1
 g_flash_interface_mode:
+	.space	1
+	.section	.bss.g_flash_micron_3d_tlc_b05a,"aw",%nobits
+	.set	.LANCHOR204,. + 0
+	.type	g_flash_micron_3d_tlc_b05a, %object
+	.size	g_flash_micron_3d_tlc_b05a, 1
+g_flash_micron_3d_tlc_b05a:
+	.space	1
+	.section	.bss.g_flash_micron_3d_tlc_b16a,"aw",%nobits
+	.set	.LANCHOR205,. + 0
+	.type	g_flash_micron_3d_tlc_b16a, %object
+	.size	g_flash_micron_3d_tlc_b16a, 1
+g_flash_micron_3d_tlc_b16a:
+	.space	1
+	.section	.bss.g_flash_micron_3d_tlc_flag,"aw",%nobits
+	.set	.LANCHOR35,. + 0
+	.type	g_flash_micron_3d_tlc_flag, %object
+	.size	g_flash_micron_3d_tlc_flag, 1
+g_flash_micron_3d_tlc_flag:
 	.space	1
 	.section	.bss.g_flash_multi_page_prog_en,"aw",%nobits
-	.set	.LANCHOR39,. + 0
+	.set	.LANCHOR41,. + 0
 	.type	g_flash_multi_page_prog_en, %object
 	.size	g_flash_multi_page_prog_en, 1
 g_flash_multi_page_prog_en:
 	.space	1
 	.section	.bss.g_flash_multi_page_read_en,"aw",%nobits
-	.set	.LANCHOR168,. + 0
+	.set	.LANCHOR171,. + 0
 	.type	g_flash_multi_page_read_en, %object
 	.size	g_flash_multi_page_read_en, 1
 g_flash_multi_page_read_en:
 	.space	1
 	.section	.bss.g_flash_page_buffer,"aw",%nobits
 	.align	2
-	.set	.LANCHOR164,. + 0
+	.set	.LANCHOR167,. + 0
 	.type	g_flash_page_buffer, %object
 	.size	g_flash_page_buffer, 4
 g_flash_page_buffer:
 	.space	4
 	.section	.bss.g_flash_reversd_blks,"aw",%nobits
-	.set	.LANCHOR200,. + 0
+	.set	.LANCHOR203,. + 0
 	.type	g_flash_reversd_blks, %object
 	.size	g_flash_reversd_blks, 1
 g_flash_reversd_blks:
@@ -26489,28 +28122,28 @@ g_flash_slc_mode:
 	.space	1
 	.section	.bss.g_flash_spare_buffer,"aw",%nobits
 	.align	2
-	.set	.LANCHOR163,. + 0
+	.set	.LANCHOR166,. + 0
 	.type	g_flash_spare_buffer, %object
 	.size	g_flash_spare_buffer, 4
 g_flash_spare_buffer:
 	.space	4
 	.section	.bss.g_flash_sys_spare_buffer,"aw",%nobits
 	.align	2
-	.set	.LANCHOR194,. + 0
+	.set	.LANCHOR197,. + 0
 	.type	g_flash_sys_spare_buffer, %object
 	.size	g_flash_sys_spare_buffer, 4
 g_flash_sys_spare_buffer:
 	.space	4
 	.section	.bss.g_flash_tmp_page_buffer,"aw",%nobits
 	.align	2
-	.set	.LANCHOR156,. + 0
+	.set	.LANCHOR159,. + 0
 	.type	g_flash_tmp_page_buffer, %object
 	.size	g_flash_tmp_page_buffer, 4
 g_flash_tmp_page_buffer:
 	.space	4
 	.section	.bss.g_flash_tmp_spare_buffer,"aw",%nobits
 	.align	2
-	.set	.LANCHOR158,. + 0
+	.set	.LANCHOR161,. + 0
 	.type	g_flash_tmp_spare_buffer, %object
 	.size	g_flash_tmp_spare_buffer, 4
 g_flash_tmp_spare_buffer:
@@ -26523,18 +28156,18 @@ g_flash_toggle_mode_en:
 	.space	1
 	.section	.bss.g_ftl_info_blk,"aw",%nobits
 	.align	6
-	.set	.LANCHOR179,. + 0
+	.set	.LANCHOR182,. + 0
 	.type	g_ftl_info_blk, %object
 	.size	g_ftl_info_blk, 4
 g_ftl_info_blk:
 	.space	4
 	.section	.bss.g_gc_info,"aw",%nobits
 	.align	2
-	.set	.LANCHOR63,. + 0
+	.set	.LANCHOR64,. + 0
 	.type	g_gc_info, %object
-	.size	g_gc_info, 340
+	.size	g_gc_info, 596
 g_gc_info:
-	.space	340
+	.space	596
 	.section	.bss.g_idb_ecc_bits,"aw",%nobits
 	.set	.LANCHOR17,. + 0
 	.type	g_idb_ecc_bits, %object
@@ -26561,14 +28194,14 @@ g_lsb_page_tbl:
 g_maxRegNum:
 	.space	1
 	.section	.bss.g_maxRetryCount,"aw",%nobits
-	.set	.LANCHOR159,. + 0
+	.set	.LANCHOR162,. + 0
 	.type	g_maxRetryCount, %object
 	.size	g_maxRetryCount, 1
 g_maxRetryCount:
 	.space	1
 	.section	.bss.g_msb_page_tbl,"aw",%nobits
 	.align	2
-	.set	.LANCHOR138,. + 0
+	.set	.LANCHOR140,. + 0
 	.type	g_msb_page_tbl, %object
 	.size	g_msb_page_tbl, 1024
 g_msb_page_tbl:
@@ -26586,20 +28219,20 @@ g_nand_max_die:
 g_nand_opt_para:
 	.space	32
 	.section	.bss.g_nandc_ecc_bits,"aw",%nobits
-	.set	.LANCHOR44,. + 0
+	.set	.LANCHOR46,. + 0
 	.type	g_nandc_ecc_bits, %object
 	.size	g_nandc_ecc_bits, 1
 g_nandc_ecc_bits:
 	.space	1
 	.section	.bss.g_nandc_tran_timeout,"aw",%nobits
-	.set	.LANCHOR157,. + 0
+	.set	.LANCHOR160,. + 0
 	.type	g_nandc_tran_timeout, %object
 	.size	g_nandc_tran_timeout, 1
 g_nandc_tran_timeout:
 	.space	1
 	.section	.bss.g_nandc_v6_master_info,"aw",%nobits
 	.align	2
-	.set	.LANCHOR47,. + 0
+	.set	.LANCHOR49,. + 0
 	.type	g_nandc_v6_master_info, %object
 	.size	g_nandc_v6_master_info, 28
 g_nandc_v6_master_info:
@@ -26611,7 +28244,7 @@ g_nandc_v6_master_info:
 g_nandc_ver:
 	.space	1
 	.section	.bss.g_one_pass_program,"aw",%nobits
-	.set	.LANCHOR73,. + 0
+	.set	.LANCHOR75,. + 0
 	.type	g_one_pass_program, %object
 	.size	g_one_pass_program, 1
 g_one_pass_program:
@@ -26642,131 +28275,131 @@ g_slc_mode_enable:
 	.space	1
 	.section	.bss.g_slc_page_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR140,. + 0
+	.set	.LANCHOR142,. + 0
 	.type	g_slc_page_num, %object
 	.size	g_slc_page_num, 2
 g_slc_page_num:
 	.space	2
 	.section	.bss.g_totle_phy_block,"aw",%nobits
 	.align	1
-	.set	.LANCHOR142,. + 0
+	.set	.LANCHOR144,. + 0
 	.type	g_totle_phy_block, %object
 	.size	g_totle_phy_block, 2
 g_totle_phy_block:
 	.space	2
 	.section	.bss.gc_des_ppa_tbl,"aw",%nobits
 	.align	2
-	.set	.LANCHOR154,. + 0
+	.set	.LANCHOR157,. + 0
 	.type	gc_des_ppa_tbl, %object
 	.size	gc_des_ppa_tbl, 4
 gc_des_ppa_tbl:
 	.space	4
 	.section	.bss.gc_free_slc_sblk_th,"aw",%nobits
 	.align	1
-	.set	.LANCHOR79,. + 0
+	.set	.LANCHOR81,. + 0
 	.type	gc_free_slc_sblk_th, %object
 	.size	gc_free_slc_sblk_th, 2
 gc_free_slc_sblk_th:
 	.space	2
 	.section	.bss.gc_lpa_tbl,"aw",%nobits
 	.align	2
-	.set	.LANCHOR152,. + 0
+	.set	.LANCHOR155,. + 0
 	.type	gc_lpa_tbl, %object
 	.size	gc_lpa_tbl, 4
 gc_lpa_tbl:
 	.space	4
 	.section	.bss.gc_mode,"aw",%nobits
-	.set	.LANCHOR76,. + 0
+	.set	.LANCHOR78,. + 0
 	.type	gc_mode, %object
 	.size	gc_mode, 1
 gc_mode:
 	.space	1
 	.section	.bss.gc_page_buf_id,"aw",%nobits
 	.align	2
-	.set	.LANCHOR74,. + 0
+	.set	.LANCHOR76,. + 0
 	.type	gc_page_buf_id, %object
 	.size	gc_page_buf_id, 4
 gc_page_buf_id:
 	.space	4
 	.section	.bss.gc_pre_ppa_tbl,"aw",%nobits
 	.align	2
-	.set	.LANCHOR153,. + 0
+	.set	.LANCHOR156,. + 0
 	.type	gc_pre_ppa_tbl, %object
 	.size	gc_pre_ppa_tbl, 4
 gc_pre_ppa_tbl:
 	.space	4
 	.section	.bss.gc_search_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR151,. + 0
+	.set	.LANCHOR154,. + 0
 	.type	gc_search_count, %object
 	.size	gc_search_count, 4
 gc_search_count:
 	.space	4
 	.section	.bss.gc_slc_cache_index,"aw",%nobits
 	.align	1
-	.set	.LANCHOR82,. + 0
+	.set	.LANCHOR84,. + 0
 	.type	gc_slc_cache_index, %object
 	.size	gc_slc_cache_index, 2
 gc_slc_cache_index:
 	.space	2
 	.section	.bss.gc_slc_data_index,"aw",%nobits
 	.align	1
-	.set	.LANCHOR86,. + 0
+	.set	.LANCHOR88,. + 0
 	.type	gc_slc_data_index, %object
 	.size	gc_slc_data_index, 2
 gc_slc_data_index:
 	.space	2
 	.section	.bss.gc_slc_mode_tlc_vpn_th,"aw",%nobits
 	.align	1
-	.set	.LANCHOR84,. + 0
+	.set	.LANCHOR86,. + 0
 	.type	gc_slc_mode_tlc_vpn_th, %object
 	.size	gc_slc_mode_tlc_vpn_th, 2
 gc_slc_mode_tlc_vpn_th:
 	.space	2
 	.section	.bss.gc_slc_mode_vpn_th,"aw",%nobits
 	.align	1
-	.set	.LANCHOR62,. + 0
+	.set	.LANCHOR63,. + 0
 	.type	gc_slc_mode_vpn_th, %object
 	.size	gc_slc_mode_vpn_th, 2
 gc_slc_mode_vpn_th:
 	.space	2
 	.section	.bss.gc_state,"aw",%nobits
-	.set	.LANCHOR150,. + 0
+	.set	.LANCHOR153,. + 0
 	.type	gc_state, %object
 	.size	gc_state, 1
 gc_state:
 	.space	1
 	.section	.bss.gc_tlc_mode_slc_vpn_th,"aw",%nobits
 	.align	1
-	.set	.LANCHOR94,. + 0
+	.set	.LANCHOR96,. + 0
 	.type	gc_tlc_mode_slc_vpn_th, %object
 	.size	gc_tlc_mode_slc_vpn_th, 2
 gc_tlc_mode_slc_vpn_th:
 	.space	2
 	.section	.bss.gc_tlc_mode_tlc_vpn_th,"aw",%nobits
 	.align	1
-	.set	.LANCHOR91,. + 0
+	.set	.LANCHOR93,. + 0
 	.type	gc_tlc_mode_tlc_vpn_th, %object
 	.size	gc_tlc_mode_tlc_vpn_th, 2
 gc_tlc_mode_tlc_vpn_th:
 	.space	2
 	.section	.bss.gc_valid_page_ppa,"aw",%nobits
 	.align	2
-	.set	.LANCHOR68,. + 0
+	.set	.LANCHOR70,. + 0
 	.type	gc_valid_page_ppa, %object
 	.size	gc_valid_page_ppa, 4
 gc_valid_page_ppa:
 	.space	4
 	.section	.bss.gc_xlc_data_index,"aw",%nobits
 	.align	1
-	.set	.LANCHOR83,. + 0
+	.set	.LANCHOR85,. + 0
 	.type	gc_xlc_data_index, %object
 	.size	gc_xlc_data_index, 2
 gc_xlc_data_index:
 	.space	2
 	.section	.bss.gc_xlc_search_index,"aw",%nobits
 	.align	1
-	.set	.LANCHOR87,. + 0
+	.set	.LANCHOR89,. + 0
 	.type	gc_xlc_search_index, %object
 	.size	gc_xlc_search_index, 2
 gc_xlc_search_index:
@@ -26780,7 +28413,7 @@ gp_blk_info:
 	.space	4
 	.section	.bss.gp_data_slc_cache_head,"aw",%nobits
 	.align	2
-	.set	.LANCHOR81,. + 0
+	.set	.LANCHOR83,. + 0
 	.type	gp_data_slc_cache_head, %object
 	.size	gp_data_slc_cache_head, 4
 gp_data_slc_cache_head:
@@ -26794,14 +28427,14 @@ gp_data_slc_data_head:
 	.space	4
 	.section	.bss.gp_data_xlc_data_head,"aw",%nobits
 	.align	2
-	.set	.LANCHOR80,. + 0
+	.set	.LANCHOR82,. + 0
 	.type	gp_data_xlc_data_head, %object
 	.size	gp_data_xlc_data_head, 4
 gp_data_xlc_data_head:
 	.space	4
 	.section	.bss.gp_flash_check_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR137,. + 0
+	.set	.LANCHOR139,. + 0
 	.type	gp_flash_check_buf, %object
 	.size	gp_flash_check_buf, 4
 gp_flash_check_buf:
@@ -26815,21 +28448,21 @@ gp_flash_info:
 	.space	4
 	.section	.bss.gp_free_mix_head,"aw",%nobits
 	.align	2
-	.set	.LANCHOR100,. + 0
+	.set	.LANCHOR102,. + 0
 	.type	gp_free_mix_head, %object
 	.size	gp_free_mix_head, 4
 gp_free_mix_head:
 	.space	4
 	.section	.bss.gp_free_slc_head,"aw",%nobits
 	.align	2
-	.set	.LANCHOR96,. + 0
+	.set	.LANCHOR98,. + 0
 	.type	gp_free_slc_head, %object
 	.size	gp_free_slc_head, 4
 gp_free_slc_head:
 	.space	4
 	.section	.bss.gp_free_xlc_head,"aw",%nobits
 	.align	2
-	.set	.LANCHOR98,. + 0
+	.set	.LANCHOR100,. + 0
 	.type	gp_free_xlc_head, %object
 	.size	gp_free_xlc_head, 4
 gp_free_xlc_head:
@@ -26843,7 +28476,7 @@ gp_ftl_ext_info:
 	.space	4
 	.section	.bss.gp_ftl_info,"aw",%nobits
 	.align	2
-	.set	.LANCHOR102,. + 0
+	.set	.LANCHOR104,. + 0
 	.type	gp_ftl_info, %object
 	.size	gp_ftl_info, 4
 gp_ftl_info:
@@ -26871,28 +28504,28 @@ gp_sblk_list_tbl:
 	.space	4
 	.section	.bss.idb_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR135,. + 0
+	.set	.LANCHOR137,. + 0
 	.type	idb_buf, %object
 	.size	idb_buf, 4
 idb_buf:
 	.space	4
 	.section	.bss.idb_need_write_back,"aw",%nobits
 	.align	2
-	.set	.LANCHOR136,. + 0
+	.set	.LANCHOR138,. + 0
 	.type	idb_need_write_back, %object
 	.size	idb_need_write_back, 4
 idb_need_write_back:
 	.space	4
 	.section	.bss.lpa_hash,"aw",%nobits
 	.align	1
-	.set	.LANCHOR108,. + 0
+	.set	.LANCHOR110,. + 0
 	.type	lpa_hash, %object
 	.size	lpa_hash, 512
 lpa_hash:
 	.space	512
 	.section	.bss.lpa_hash_index,"aw",%nobits
 	.align	2
-	.set	.LANCHOR110,. + 0
+	.set	.LANCHOR112,. + 0
 	.type	lpa_hash_index, %object
 	.size	lpa_hash_index, 4
 lpa_hash_index:
@@ -26903,19 +28536,19 @@ lpa_hash_index:
 nandc_ecc_sts:
 	.space	16
 	.section	.bss.nandc_hw_seed,"aw",%nobits
-	.set	.LANCHOR45,. + 0
+	.set	.LANCHOR47,. + 0
 	.type	nandc_hw_seed, %object
 	.size	nandc_hw_seed, 1
 nandc_hw_seed:
 	.space	1
 	.section	.bss.nandc_randomizer_en,"aw",%nobits
-	.set	.LANCHOR46,. + 0
+	.set	.LANCHOR48,. + 0
 	.type	nandc_randomizer_en, %object
 	.size	nandc_randomizer_en, 1
 nandc_randomizer_en:
 	.space	1
 	.section	.bss.p_free_buf_head,"aw",%nobits
-	.set	.LANCHOR51,. + 0
+	.set	.LANCHOR53,. + 0
 	.type	p_free_buf_head, %object
 	.size	p_free_buf_head, 1
 p_free_buf_head:
@@ -26932,130 +28565,137 @@ p_read_ahead_ext_buf:
 	.size	pm_first_write, 1
 pm_first_write:
 	.space	1
+	.section	.bss.pm_force_gc,"aw",%nobits
+	.align	2
+	.set	.LANCHOR146,. + 0
+	.type	pm_force_gc, %object
+	.size	pm_force_gc, 4
+pm_force_gc:
+	.space	4
 	.section	.bss.pm_gc_enable,"aw",%nobits
 	.align	2
-	.set	.LANCHOR130,. + 0
+	.set	.LANCHOR132,. + 0
 	.type	pm_gc_enable, %object
 	.size	pm_gc_enable, 4
 pm_gc_enable:
 	.space	4
 	.section	.bss.pm_last_load_ram_id,"aw",%nobits
-	.set	.LANCHOR205,. + 0
+	.set	.LANCHOR210,. + 0
 	.type	pm_last_load_ram_id, %object
 	.size	pm_last_load_ram_id, 1
 pm_last_load_ram_id:
 	.space	1
 	.section	.bss.pm_last_update_ram_id,"aw",%nobits
-	.set	.LANCHOR133,. + 0
+	.set	.LANCHOR135,. + 0
 	.type	pm_last_update_ram_id, %object
 	.size	pm_last_update_ram_id, 1
 pm_last_update_ram_id:
 	.space	1
 	.section	.bss.pm_ram_info,"aw",%nobits
 	.align	2
-	.set	.LANCHOR132,. + 0
+	.set	.LANCHOR134,. + 0
 	.type	pm_ram_info, %object
 	.size	pm_ram_info, 256
 pm_ram_info:
 	.space	256
 	.section	.bss.read_ahead_lpa,"aw",%nobits
 	.align	2
-	.set	.LANCHOR206,. + 0
+	.set	.LANCHOR211,. + 0
 	.type	read_ahead_lpa, %object
 	.size	read_ahead_lpa, 4
 read_ahead_lpa:
 	.space	4
 	.section	.bss.read_buf_count,"aw",%nobits
-	.set	.LANCHOR127,. + 0
+	.set	.LANCHOR129,. + 0
 	.type	read_buf_count, %object
 	.size	read_buf_count, 1
 read_buf_count:
 	.space	1
 	.section	.bss.read_buf_head,"aw",%nobits
-	.set	.LANCHOR126,. + 0
+	.set	.LANCHOR128,. + 0
 	.type	read_buf_head, %object
 	.size	read_buf_head, 1
 read_buf_head:
 	.space	1
 	.section	.bss.sblk_gc_write_completed_queue_head,"aw",%nobits
-	.set	.LANCHOR69,. + 0
+	.set	.LANCHOR71,. + 0
 	.type	sblk_gc_write_completed_queue_head, %object
 	.size	sblk_gc_write_completed_queue_head, 1
 sblk_gc_write_completed_queue_head:
 	.space	1
 	.section	.bss.sblk_queue_head,"aw",%nobits
-	.set	.LANCHOR54,. + 0
+	.set	.LANCHOR56,. + 0
 	.type	sblk_queue_head, %object
 	.size	sblk_queue_head, 1
 sblk_queue_head:
 	.space	1
 	.section	.bss.sblk_read_completed_queue_head,"aw",%nobits
-	.set	.LANCHOR129,. + 0
+	.set	.LANCHOR131,. + 0
 	.type	sblk_read_completed_queue_head, %object
 	.size	sblk_read_completed_queue_head, 1
 sblk_read_completed_queue_head:
 	.space	1
 	.section	.bss.sblk_write_completed_queue_head,"aw",%nobits
-	.set	.LANCHOR124,. + 0
+	.set	.LANCHOR126,. + 0
 	.type	sblk_write_completed_queue_head, %object
 	.size	sblk_write_completed_queue_head, 1
 sblk_write_completed_queue_head:
 	.space	1
 	.section	.bss.slc_cache_sblk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR88,. + 0
+	.set	.LANCHOR90,. + 0
 	.type	slc_cache_sblk, %object
 	.size	slc_cache_sblk, 2
 slc_cache_sblk:
 	.space	2
 	.section	.bss.slc_data_sblk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR90,. + 0
+	.set	.LANCHOR92,. + 0
 	.type	slc_data_sblk, %object
 	.size	slc_data_sblk, 2
 slc_data_sblk:
 	.space	2
 	.section	.bss.write_buf_count,"aw",%nobits
-	.set	.LANCHOR58,. + 0
+	.set	.LANCHOR60,. + 0
 	.type	write_buf_count, %object
 	.size	write_buf_count, 1
 write_buf_count:
 	.space	1
 	.section	.bss.write_buf_head,"aw",%nobits
-	.set	.LANCHOR57,. + 0
+	.set	.LANCHOR59,. + 0
 	.type	write_buf_head, %object
 	.size	write_buf_head, 1
 write_buf_head:
 	.space	1
 	.section	.bss.write_commit_count,"aw",%nobits
-	.set	.LANCHOR121,. + 0
+	.set	.LANCHOR123,. + 0
 	.type	write_commit_count, %object
 	.size	write_commit_count, 1
 write_commit_count:
 	.space	1
 	.section	.bss.write_commit_head,"aw",%nobits
-	.set	.LANCHOR174,. + 0
+	.set	.LANCHOR177,. + 0
 	.type	write_commit_head, %object
 	.size	write_commit_head, 1
 write_commit_head:
 	.space	1
 	.section	.bss.xlc_data_sblk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR92,. + 0
+	.set	.LANCHOR94,. + 0
 	.type	xlc_data_sblk, %object
 	.size	xlc_data_sblk, 2
 xlc_data_sblk:
 	.space	2
 	.section	.bss.zftl_print_list_count,"aw",%nobits
 	.align	1
-	.set	.LANCHOR101,. + 0
+	.set	.LANCHOR103,. + 0
 	.type	zftl_print_list_count, %object
 	.size	zftl_print_list_count, 2
 zftl_print_list_count:
 	.space	2
 	.section	.data.g_nand_para_info,"aw",%progbits
 	.align	1
-	.set	.LANCHOR31,. + 0
+	.set	.LANCHOR32,. + 0
 	.type	g_nand_para_info, %object
 	.size	g_nand_para_info, 32
 g_nand_para_info:
@@ -27088,7 +28728,7 @@ g_nand_para_info:
 	.byte	0
 	.byte	0
 	.section	.data.hy_f26_ref_value,"aw",%progbits
-	.set	.LANCHOR155,. + 0
+	.set	.LANCHOR158,. + 0
 	.type	hy_f26_ref_value, %object
 	.size	hy_f26_ref_value, 28
 hy_f26_ref_value:
@@ -27121,7 +28761,7 @@ hy_f26_ref_value:
 	.byte	-32
 	.byte	-37
 	.section	.data.nand_opt_para,"aw",%progbits
-	.set	.LANCHOR199,. + 0
+	.set	.LANCHOR202,. + 0
 	.type	nand_opt_para, %object
 	.size	nand_opt_para, 128
 nand_opt_para:
@@ -27202,7 +28842,7 @@ nand_opt_para:
 	.byte	0
 	.space	14
 	.section	.data.sd15_slc_rr,"aw",%progbits
-	.set	.LANCHOR37,. + 0
+	.set	.LANCHOR39,. + 0
 	.type	sd15_slc_rr, %object
 	.size	sd15_slc_rr, 25
 sd15_slc_rr:
@@ -27232,7 +28872,7 @@ sd15_slc_rr:
 	.byte	104
 	.byte	112
 	.section	.data.sd15_tlc_rr,"aw",%progbits
-	.set	.LANCHOR36,. + 0
+	.set	.LANCHOR38,. + 0
 	.type	sd15_tlc_rr, %object
 	.size	sd15_tlc_rr, 329
 sd15_tlc_rr:
@@ -27565,9 +29205,783 @@ sd15_tlc_rr:
 	.byte	0
 	.byte	-32
 	.byte	0
+	.section	.data.tlc_b05a_prog_tbl,"aw",%progbits
+	.align	1
+	.set	.LANCHOR224,. + 0
+	.type	tlc_b05a_prog_tbl, %object
+	.size	tlc_b05a_prog_tbl, 1536
+tlc_b05a_prog_tbl:
+	.short	0
+	.short	0
+	.short	0
+	.short	0
+	.short	0
+	.short	0
+	.short	0
+	.short	0
+	.short	9
+	.short	0
+	.short	11
+	.short	0
+	.short	13
+	.short	0
+	.short	15
+	.short	0
+	.short	17
+	.short	0
+	.short	19
+	.short	0
+	.short	21
+	.short	0
+	.short	23
+	.short	0
+	.short	25
+	.short	0
+	.short	27
+	.short	0
+	.short	29
+	.short	0
+	.short	31
+	.short	0
+	.short	33
+	.short	0
+	.short	35
+	.short	0
+	.short	37
+	.short	0
+	.short	39
+	.short	0
+	.short	41
+	.short	0
+	.short	43
+	.short	0
+	.short	45
+	.short	0
+	.short	47
+	.short	0
+	.short	49
+	.short	0
+	.short	51
+	.short	0
+	.short	53
+	.short	0
+	.short	55
+	.short	0
+	.short	25
+	.short	58
+	.short	0
+	.short	27
+	.short	61
+	.short	0
+	.short	29
+	.short	64
+	.short	0
+	.short	31
+	.short	67
+	.short	0
+	.short	33
+	.short	70
+	.short	0
+	.short	35
+	.short	73
+	.short	0
+	.short	37
+	.short	76
+	.short	0
+	.short	39
+	.short	79
+	.short	0
+	.short	41
+	.short	82
+	.short	0
+	.short	43
+	.short	85
+	.short	0
+	.short	45
+	.short	88
+	.short	0
+	.short	47
+	.short	91
+	.short	0
+	.short	49
+	.short	94
+	.short	0
+	.short	51
+	.short	97
+	.short	0
+	.short	53
+	.short	100
+	.short	0
+	.short	55
+	.short	103
+	.short	0
+	.short	58
+	.short	106
+	.short	0
+	.short	61
+	.short	109
+	.short	0
+	.short	64
+	.short	112
+	.short	0
+	.short	67
+	.short	115
+	.short	0
+	.short	70
+	.short	118
+	.short	0
+	.short	73
+	.short	121
+	.short	0
+	.short	76
+	.short	124
+	.short	0
+	.short	79
+	.short	127
+	.short	0
+	.short	82
+	.short	130
+	.short	0
+	.short	85
+	.short	133
+	.short	0
+	.short	88
+	.short	136
+	.short	0
+	.short	91
+	.short	139
+	.short	0
+	.short	94
+	.short	142
+	.short	0
+	.short	97
+	.short	145
+	.short	0
+	.short	100
+	.short	148
+	.short	0
+	.short	103
+	.short	151
+	.short	0
+	.short	106
+	.short	154
+	.short	0
+	.short	109
+	.short	157
+	.short	0
+	.short	112
+	.short	160
+	.short	0
+	.short	115
+	.short	163
+	.short	0
+	.short	118
+	.short	166
+	.short	0
+	.short	121
+	.short	169
+	.short	0
+	.short	124
+	.short	172
+	.short	0
+	.short	127
+	.short	175
+	.short	0
+	.short	130
+	.short	178
+	.short	0
+	.short	133
+	.short	181
+	.short	0
+	.short	136
+	.short	184
+	.short	0
+	.short	139
+	.short	187
+	.short	0
+	.short	142
+	.short	190
+	.short	0
+	.short	145
+	.short	193
+	.short	0
+	.short	148
+	.short	196
+	.short	0
+	.short	151
+	.short	199
+	.short	0
+	.short	154
+	.short	202
+	.short	0
+	.short	157
+	.short	205
+	.short	0
+	.short	160
+	.short	208
+	.short	0
+	.short	163
+	.short	211
+	.short	0
+	.short	166
+	.short	214
+	.short	0
+	.short	169
+	.short	217
+	.short	0
+	.short	172
+	.short	220
+	.short	0
+	.short	175
+	.short	223
+	.short	0
+	.short	178
+	.short	226
+	.short	0
+	.short	181
+	.short	229
+	.short	0
+	.short	184
+	.short	232
+	.short	0
+	.short	187
+	.short	235
+	.short	0
+	.short	190
+	.short	238
+	.short	0
+	.short	193
+	.short	241
+	.short	0
+	.short	196
+	.short	244
+	.short	0
+	.short	199
+	.short	247
+	.short	0
+	.short	202
+	.short	250
+	.short	0
+	.short	205
+	.short	253
+	.short	0
+	.short	208
+	.short	256
+	.short	0
+	.short	211
+	.short	259
+	.short	0
+	.short	214
+	.short	262
+	.short	0
+	.short	217
+	.short	265
+	.short	0
+	.short	220
+	.short	268
+	.short	0
+	.short	223
+	.short	271
+	.short	0
+	.short	226
+	.short	274
+	.short	0
+	.short	229
+	.short	277
+	.short	0
+	.short	232
+	.short	280
+	.short	0
+	.short	235
+	.short	283
+	.short	0
+	.short	238
+	.short	286
+	.short	0
+	.short	241
+	.short	289
+	.short	0
+	.short	244
+	.short	292
+	.short	0
+	.short	247
+	.short	295
+	.short	0
+	.short	250
+	.short	298
+	.short	0
+	.short	253
+	.short	301
+	.short	0
+	.short	256
+	.short	304
+	.short	0
+	.short	259
+	.short	307
+	.short	0
+	.short	262
+	.short	310
+	.short	0
+	.short	265
+	.short	313
+	.short	0
+	.short	268
+	.short	316
+	.short	0
+	.short	271
+	.short	319
+	.short	0
+	.short	274
+	.short	322
+	.short	0
+	.short	277
+	.short	325
+	.short	0
+	.short	280
+	.short	328
+	.short	0
+	.short	283
+	.short	331
+	.short	0
+	.short	286
+	.short	334
+	.short	0
+	.short	289
+	.short	337
+	.short	0
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+	.short	340
+	.short	0
+	.short	295
+	.short	343
+	.short	0
+	.short	298
+	.short	346
+	.short	0
+	.short	301
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+	.short	0
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+	.short	352
+	.short	0
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+	.short	355
+	.short	0
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+	.short	358
+	.short	0
+	.short	313
+	.short	361
+	.short	0
+	.short	316
+	.short	364
+	.short	0
+	.short	319
+	.short	367
+	.short	0
+	.short	322
+	.short	370
+	.short	0
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+	.short	373
+	.short	0
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+	.short	376
+	.short	0
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+	.short	379
+	.short	0
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+	.short	0
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+	.short	385
+	.short	0
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+	.short	0
+	.short	346
+	.short	394
+	.short	0
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+	.short	397
+	.short	0
+	.short	352
+	.short	400
+	.short	0
+	.short	355
+	.short	403
+	.short	0
+	.short	358
+	.short	406
+	.short	0
+	.short	361
+	.short	409
+	.short	0
+	.short	364
+	.short	412
+	.short	0
+	.short	367
+	.short	415
+	.short	0
+	.short	370
+	.short	418
+	.short	0
+	.short	373
+	.short	421
+	.short	0
+	.short	376
+	.short	424
+	.short	0
+	.short	379
+	.short	427
+	.short	0
+	.short	382
+	.short	430
+	.short	0
+	.short	385
+	.short	433
+	.short	0
+	.short	388
+	.short	436
+	.short	0
+	.short	391
+	.short	439
+	.short	0
+	.short	394
+	.short	442
+	.short	0
+	.short	397
+	.short	445
+	.short	0
+	.short	400
+	.short	448
+	.short	0
+	.short	403
+	.short	451
+	.short	0
+	.short	406
+	.short	454
+	.short	0
+	.short	409
+	.short	457
+	.short	0
+	.short	412
+	.short	460
+	.short	0
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+	.short	463
+	.short	0
+	.short	418
+	.short	466
+	.short	0
+	.short	421
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+	.short	0
+	.short	424
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+	.short	0
+	.short	427
+	.short	475
+	.short	0
+	.short	430
+	.short	478
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+	.short	433
+	.short	481
+	.short	0
+	.short	436
+	.short	484
+	.short	0
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+	.short	487
+	.short	0
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+	.short	490
+	.short	0
+	.short	445
+	.short	493
+	.short	0
+	.short	448
+	.short	496
+	.short	0
+	.short	451
+	.short	499
+	.short	0
+	.short	454
+	.short	502
+	.short	0
+	.short	457
+	.short	505
+	.short	0
+	.short	460
+	.short	508
+	.short	0
+	.short	463
+	.short	511
+	.short	0
+	.short	466
+	.short	514
+	.short	0
+	.short	469
+	.short	517
+	.short	0
+	.short	472
+	.short	520
+	.short	0
+	.short	475
+	.short	523
+	.short	0
+	.short	478
+	.short	526
+	.short	0
+	.short	481
+	.short	529
+	.short	0
+	.short	484
+	.short	532
+	.short	0
+	.short	487
+	.short	535
+	.short	0
+	.short	490
+	.short	538
+	.short	0
+	.short	493
+	.short	541
+	.short	0
+	.short	496
+	.short	544
+	.short	0
+	.short	499
+	.short	547
+	.short	0
+	.short	502
+	.short	550
+	.short	0
+	.short	505
+	.short	553
+	.short	0
+	.short	508
+	.short	556
+	.short	0
+	.short	511
+	.short	559
+	.short	0
+	.short	514
+	.short	562
+	.short	0
+	.short	517
+	.short	565
+	.short	0
+	.short	520
+	.short	568
+	.short	0
+	.short	523
+	.short	571
+	.short	0
+	.short	526
+	.short	574
+	.short	0
+	.short	529
+	.short	577
+	.short	0
+	.short	532
+	.short	580
+	.short	0
+	.short	535
+	.short	583
+	.short	0
+	.short	538
+	.short	586
+	.short	0
+	.short	541
+	.short	589
+	.short	0
+	.short	544
+	.short	592
+	.short	0
+	.short	547
+	.short	595
+	.short	0
+	.short	550
+	.short	598
+	.short	0
+	.short	553
+	.short	601
+	.short	0
+	.short	556
+	.short	604
+	.short	0
+	.short	559
+	.short	607
+	.short	0
+	.short	562
+	.short	610
+	.short	0
+	.short	565
+	.short	613
+	.short	0
+	.short	568
+	.short	616
+	.short	0
+	.short	571
+	.short	619
+	.short	0
+	.short	574
+	.short	622
+	.short	0
+	.short	577
+	.short	625
+	.short	0
+	.short	580
+	.short	628
+	.short	0
+	.short	583
+	.short	631
+	.short	0
+	.short	586
+	.short	634
+	.short	0
+	.short	589
+	.short	637
+	.short	0
+	.short	592
+	.short	640
+	.short	0
+	.short	595
+	.short	643
+	.short	0
+	.short	598
+	.short	646
+	.short	0
+	.short	601
+	.short	649
+	.short	0
+	.short	604
+	.short	652
+	.short	0
+	.short	607
+	.short	655
+	.short	0
+	.short	610
+	.short	658
+	.short	0
+	.short	613
+	.short	661
+	.short	0
+	.short	616
+	.short	664
+	.short	0
+	.short	619
+	.short	667
+	.short	0
+	.short	622
+	.short	670
+	.short	0
+	.short	625
+	.short	673
+	.short	0
+	.short	628
+	.short	676
+	.short	0
+	.short	631
+	.short	679
+	.short	0
+	.short	634
+	.short	682
+	.short	0
+	.short	637
+	.short	685
+	.short	0
+	.short	640
+	.short	688
+	.short	0
+	.short	643
+	.short	691
+	.short	0
+	.short	646
+	.short	694
+	.short	0
+	.short	649
+	.short	697
+	.short	0
+	.short	652
+	.short	700
+	.short	0
+	.short	655
+	.short	703
+	.short	0
+	.short	658
+	.short	706
+	.short	0
+	.short	661
+	.short	709
+	.short	0
+	.short	664
+	.short	712
+	.short	0
+	.short	667
+	.short	715
+	.short	0
+	.short	670
+	.short	718
+	.short	0
+	.short	673
+	.short	721
+	.short	0
+	.short	676
+	.short	724
+	.short	0
+	.short	679
+	.short	727
+	.short	0
+	.short	682
+	.short	730
+	.short	0
+	.short	685
+	.short	733
+	.short	0
+	.short	688
+	.short	736
+	.short	0
+	.short	691
+	.short	739
+	.short	0
+	.short	694
+	.short	742
+	.short	0
+	.short	697
+	.short	745
+	.short	0
+	.short	700
+	.short	748
+	.short	0
+	.short	703
+	.short	751
+	.short	0
+	.short	706
+	.short	0
+	.short	709
+	.short	0
+	.short	712
+	.short	0
+	.short	715
+	.short	0
+	.short	718
+	.short	0
+	.short	721
+	.short	0
+	.short	724
+	.short	0
+	.short	727
+	.short	0
 	.section	.data.tlc_prog_order,"aw",%progbits
 	.align	1
-	.set	.LANCHOR219,. + 0
+	.set	.LANCHOR225,. + 0
 	.type	tlc_prog_order, %object
 	.size	tlc_prog_order, 768
 tlc_prog_order:
@@ -27964,9 +30378,9 @@ zftl_debug:
 	.word	17476
 	.section	.data.zftl_nand_flash_para_tbl,"aw",%progbits
 	.align	1
-	.set	.LANCHOR198,. + 0
+	.set	.LANCHOR201,. + 0
 	.type	zftl_nand_flash_para_tbl, %object
-	.size	zftl_nand_flash_para_tbl, 1248
+	.size	zftl_nand_flash_para_tbl, 1408
 zftl_nand_flash_para_tbl:
 	.byte	6
 	.byte	-104
@@ -28807,7 +31221,63 @@ zftl_nand_flash_para_tbl:
 	.byte	0
 	.byte	0
 	.byte	0
+	.byte	1
+	.byte	5
+	.byte	44
+	.byte	-124
+	.byte	88
+	.byte	50
+	.byte	-95
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	32
+	.short	768
+	.byte	3
+	.byte	1
+	.short	1440
+	.short	3527
+	.byte	0
+	.byte	19
+	.byte	70
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.short	1024
+	.byte	3
+	.byte	0
+	.byte	0
+	.byte	2
+	.byte	6
+	.byte	44
+	.byte	-92
+	.byte	8
+	.byte	50
+	.byte	-95
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	32
+	.short	2304
+	.byte	3
+	.byte	1
+	.short	1008
+	.short	3521
+	.byte	0
+	.byte	19
+	.byte	70
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.short	4096
+	.byte	3
+	.byte	0
 	.byte	0
+	.byte	4
 	.byte	6
 	.byte	-83
 	.byte	-34
@@ -28944,9 +31414,9 @@ zftl_nand_flash_para_tbl:
 	.byte	3
 	.byte	0
 	.short	256
-	.byte	2
-	.byte	-65
-	.byte	-66
+	.byte	0
+	.byte	0
+	.byte	0
 	.byte	0
 	.byte	6
 	.byte	-83
@@ -29011,7 +31481,7 @@ zftl_nand_flash_para_tbl:
 	.byte	60
 	.byte	-95
 	.byte	0
-	.byte	4
+	.byte	7
 	.byte	1
 	.byte	32
 	.short	512
@@ -29039,7 +31509,7 @@ zftl_nand_flash_para_tbl:
 	.byte	60
 	.byte	-91
 	.byte	0
-	.byte	4
+	.byte	7
 	.byte	1
 	.byte	32
 	.short	512
@@ -29055,157 +31525,241 @@ zftl_nand_flash_para_tbl:
 	.byte	0
 	.byte	1
 	.byte	0
-	.short	512
+	.short	512
+	.byte	3
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	6
+	.byte	-119
+	.byte	100
+	.byte	68
+	.byte	75
+	.byte	-87
+	.byte	0
+	.byte	7
+	.byte	1
+	.byte	16
+	.short	256
+	.byte	2
+	.byte	4
+	.short	1024
+	.short	449
+	.byte	3
+	.byte	17
+	.byte	40
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.short	256
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	6
+	.byte	-119
+	.byte	-120
+	.byte	36
+	.byte	75
+	.byte	-87
+	.byte	-124
+	.byte	7
+	.byte	1
+	.byte	16
+	.short	256
+	.byte	2
+	.byte	4
+	.short	1024
+	.short	449
+	.byte	3
+	.byte	17
+	.byte	40
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.short	256
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	6
+	.byte	-119
+	.byte	-92
+	.byte	8
+	.byte	50
+	.byte	-95
+	.byte	0
+	.byte	7
+	.byte	1
+	.byte	32
+	.short	2304
+	.byte	3
+	.byte	1
+	.short	1008
+	.short	3521
+	.byte	0
+	.byte	19
+	.byte	70
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.short	4096
 	.byte	3
 	.byte	0
 	.byte	0
-	.byte	0
-	.section	.rodata.__func__.10151,"a",%progbits
-	.set	.LANCHOR139,. + 0
-	.type	__func__.10151, %object
-	.size	__func__.10151, 20
-__func__.10151:
+	.byte	4
+	.section	.rodata.__func__.10144,"a",%progbits
+	.set	.LANCHOR141,. + 0
+	.type	__func__.10144, %object
+	.size	__func__.10144, 20
+__func__.10144:
 	.ascii	"flash_die_info_init\000"
-	.section	.rodata.__func__.10161,"a",%progbits
+	.section	.rodata.__func__.10154,"a",%progbits
 	.set	.LANCHOR15,. + 0
-	.type	__func__.10161, %object
-	.size	__func__.10161, 22
-__func__.10161:
+	.type	__func__.10154, %object
+	.size	__func__.10154, 22
+__func__.10154:
 	.ascii	"nand_flash_print_info\000"
-	.section	.rodata.__func__.10206,"a",%progbits
-	.set	.LANCHOR197,. + 0
-	.type	__func__.10206, %object
-	.size	__func__.10206, 16
-__func__.10206:
+	.section	.rodata.__func__.10199,"a",%progbits
+	.set	.LANCHOR200,. + 0
+	.type	__func__.10199, %object
+	.size	__func__.10199, 16
+__func__.10199:
 	.ascii	"nand_flash_init\000"
-	.section	.rodata.__func__.10229,"a",%progbits
-	.set	.LANCHOR149,. + 0
-	.type	__func__.10229, %object
-	.size	__func__.10229, 11
-__func__.10229:
+	.section	.rodata.__func__.10222,"a",%progbits
+	.set	.LANCHOR152,. + 0
+	.type	__func__.10222, %object
+	.size	__func__.10222, 11
+__func__.10222:
 	.ascii	"nandc_init\000"
-	.section	.rodata.__func__.10398,"a",%progbits
-	.set	.LANCHOR53,. + 0
-	.type	__func__.10398, %object
-	.size	__func__.10398, 13
-__func__.10398:
-	.ascii	"buf_add_tail\000"
-	.section	.rodata.__func__.10411,"a",%progbits
+	.section	.rodata.__func__.10391,"a",%progbits
 	.set	.LANCHOR55,. + 0
-	.type	__func__.10411, %object
-	.size	__func__.10411, 10
-__func__.10411:
+	.type	__func__.10391, %object
+	.size	__func__.10391, 13
+__func__.10391:
+	.ascii	"buf_add_tail\000"
+	.section	.rodata.__func__.10404,"a",%progbits
+	.set	.LANCHOR57,. + 0
+	.type	__func__.10404, %object
+	.size	__func__.10404, 10
+__func__.10404:
 	.ascii	"buf_alloc\000"
-	.section	.rodata.__func__.10425,"a",%progbits
-	.set	.LANCHOR56,. + 0
-	.type	__func__.10425, %object
-	.size	__func__.10425, 16
-__func__.10425:
+	.section	.rodata.__func__.10418,"a",%progbits
+	.set	.LANCHOR58,. + 0
+	.type	__func__.10418, %object
+	.size	__func__.10418, 16
+__func__.10418:
 	.ascii	"buf_remove_free\000"
-	.section	.rodata.__func__.10438,"a",%progbits
-	.set	.LANCHOR196,. + 0
-	.type	__func__.10438, %object
-	.size	__func__.10438, 20
-__func__.10438:
+	.section	.rodata.__func__.10431,"a",%progbits
+	.set	.LANCHOR199,. + 0
+	.type	__func__.10431, %object
+	.size	__func__.10431, 20
+__func__.10431:
 	.ascii	"flash_info_blk_init\000"
-	.section	.rodata.__func__.10449,"a",%progbits
-	.set	.LANCHOR148,. + 0
-	.type	__func__.10449, %object
-	.size	__func__.10449, 21
-__func__.10449:
+	.section	.rodata.__func__.10442,"a",%progbits
+	.set	.LANCHOR151,. + 0
+	.type	__func__.10442, %object
+	.size	__func__.10442, 21
+__func__.10442:
 	.ascii	"flash_info_data_init\000"
-	.section	.rodata.__func__.10471,"a",%progbits
-	.set	.LANCHOR193,. + 0
-	.type	__func__.10471, %object
-	.size	__func__.10471, 17
-__func__.10471:
+	.section	.rodata.__func__.10464,"a",%progbits
+	.set	.LANCHOR196,. + 0
+	.type	__func__.10464, %object
+	.size	__func__.10464, 17
+__func__.10464:
 	.ascii	"flash_info_flush\000"
-	.section	.rodata.__func__.10547,"a",%progbits
-	.set	.LANCHOR143,. + 0
-	.type	__func__.10547, %object
-	.size	__func__.10547, 17
-__func__.10547:
+	.section	.rodata.__func__.10540,"a",%progbits
+	.set	.LANCHOR145,. + 0
+	.type	__func__.10540, %object
+	.size	__func__.10540, 17
+__func__.10540:
 	.ascii	"lpa_rebuild_hash\000"
-	.section	.rodata.__func__.10594,"a",%progbits
-	.set	.LANCHOR216,. + 0
-	.type	__func__.10594, %object
-	.size	__func__.10594, 17
-__func__.10594:
+	.section	.rodata.__func__.10587,"a",%progbits
+	.set	.LANCHOR221,. + 0
+	.type	__func__.10587, %object
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-.LC174:
+.LC180:
 	.ascii	"ftl_ext_info_blk blk:0x%x, page:0x%x\012\000"
-.LC175:
+.LC181:
 	.ascii	"ac_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page"
 	.ascii	"_index:0x%x\012\000"
-.LC176:
+.LC182:
 	.ascii	"tmp_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, pag"
 	.ascii	"e_index:0x%x\012\000"
-.LC177:
+.LC183:
 	.ascii	"gc_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page"
 	.ascii	"_index:0x%x\012\000"
-.LC178:
+.LC184:
 	.ascii	"lpa:\000"
-.LC179:
+.LC185:
 	.ascii	"vpn:\000"
-.LC180:
+.LC186:
 	.ascii	"sblk:\000"
-.LC181:
+.LC187:
 	.ascii	"lpa_hash:\000"
-.LC182:
+.LC188:
 	.ascii	"lpa_hash_index:\000"
+	.section	.rodata.dump_pm_blk.str1.1,"aMS",%progbits,1
+.LC248:
+	.ascii	"pm l2p:\000"
+.LC249:
+	.ascii	"pm blk:\000"
 	.section	.rodata.dump_sblk_queue.str1.1,"aMS",%progbits,1
-.LC74:
-	.ascii	"dump_sblk_queue: %d\012\000"
 .LC75:
+	.ascii	"dump_sblk_queue: %d\012\000"
+.LC76:
 	.ascii	"buf id= %d state = %d ppa = %x\012\000"
 	.section	.rodata.flash_complete_page_read.str1.1,"aMS",%progbits,1
-.LC122:
+.LC124:
 	.ascii	"flash_complete_page_read %x %x error_ecc %d %d\012\000"
 	.section	.rodata.flash_ddr_tuning_read.str1.1,"aMS",%progbits,1
-.LC115:
+.LC117:
 	.ascii	"%d flash_ddr_tuning_read %x ecc=%d\012\000"
-.LC116:
+.LC118:
 	.ascii	"sync para %d\012\000"
-.LC117:
+.LC119:
 	.ascii	"DDR mode Read error %x %x\012\000"
-.LC118:
+.LC120:
 	.ascii	"SDR mode Read %x %x ecc:%x\012\000"
 	.section	.rodata.flash_erase_all.str1.1,"aMS",%progbits,1
 .LC36:
@@ -29505,43 +32064,43 @@ __func__.9819:
 	.ascii	"flash_erase_duplane_block pageadd = %x status = %x\012"
 	.ascii	"\000"
 	.section	.rodata.flash_get_last_written_page.str1.1,"aMS",%progbits,1
-.LC121:
+.LC123:
 	.ascii	"flash_get_last_written_page: %x %x %x\012\000"
 	.section	.rodata.flash_info_blk_init.str1.1,"aMS",%progbits,1
-.LC169:
+.LC175:
 	.ascii	"...%d @ %s %d %p\012\000"
-.LC170:
+.LC176:
 	.ascii	"no sys info %x\012\000"
 	.section	.rodata.flash_info_data_init.str1.1,"aMS",%progbits,1
-.LC90:
+.LC92:
 	.ascii	"...%d @ %s\012\000"
 	.section	.rodata.flash_info_flush.str1.1,"aMS",%progbits,1
-.LC166:
+.LC172:
 	.ascii	"finfo:\000"
-.LC167:
+.LC173:
 	.ascii	"flash_info_flush id = %x, page = %x\012\000"
-.LC168:
+.LC174:
 	.ascii	"sys_info_flush error:%x\012\000"
 	.section	.rodata.flash_mask_bad_block.str1.1,"aMS",%progbits,1
 .LC42:
 	.ascii	"flash_mask_bad_block %d %d\012\000"
 	.section	.rodata.flash_prog_page.str1.1,"aMS",%progbits,1
-.LC128:
+.LC130:
 	.ascii	"flash_prog_page %x %x %x\012\000"
-.LC129:
+.LC131:
 	.ascii	"flash_prog_page page_addr = %x status = %x\012\000"
 	.section	.rodata.flash_prog_page_en.str1.1,"aMS",%progbits,1
-.LC136:
+.LC138:
 	.ascii	"flash_prog_page_en:%x %x %x\012\000"
-.LC137:
+.LC139:
 	.ascii	"w d:\000"
-.LC138:
+.LC140:
 	.ascii	"w s:\000"
-.LC139:
+.LC141:
 	.ascii	"spare\000"
-.LC140:
+.LC142:
 	.ascii	"data\000"
-.LC141:
+.LC143:
 	.ascii	"write error: %x\012\000"
 	.section	.rodata.flash_read_id.str1.1,"aMS",%progbits,1
 .LC39:
@@ -29550,12 +32109,12 @@ __func__.9819:
 .LC40:
 	.ascii	"otp:%x %x %x %x\012\000"
 	.section	.rodata.flash_read_page.str1.1,"aMS",%progbits,1
-.LC108:
+.LC110:
 	.ascii	"flash_read_page %x %x %x\012\000"
 	.section	.rodata.flash_read_page_en.str1.1,"aMS",%progbits,1
-.LC119:
+.LC121:
 	.ascii	"flash_read_page_en %x %x %x\012\000"
-.LC120:
+.LC122:
 	.ascii	"flash_read_page_en %x %x error_ecc %d %d\012\000"
 	.section	.rodata.flash_set_interface_mode.str1.1,"aMS",%progbits,1
 .LC37:
@@ -29563,49 +32122,54 @@ __func__.9819:
 .LC38:
 	.ascii	"nand ddr mode %x\012\000"
 	.section	.rodata.ftl_alloc_new_data_sblk.str1.1,"aMS",%progbits,1
-.LC230:
+.LC236:
 	.ascii	"error gc_add_sblk: %x\012\000"
 	.section	.rodata.ftl_alloc_sblk.str1.1,"aMS",%progbits,1
-.LC73:
+.LC74:
 	.ascii	"alloc sblk %x %d\012\000"
 	.section	.rodata.ftl_dump_write_open_sblk.str1.1,"aMS",%progbits,1
-.LC161:
-	.ascii	"ftl_sblk_dump_write = %x %d %d %d %d\012\000"
 .LC162:
+	.ascii	"ftl_sblk_dump_write = %x %d %d %d %d\012\000"
+.LC163:
 	.ascii	"blk= %x, page=%x, ppa = %x, status = %x, data:%x %x"
 	.ascii	" %x %x, spare: %x %x %x %x\012\000"
-.LC163:
-	.ascii	"ftl_sblk_dump_write2 = %x %d %d %d\012\000"
 .LC164:
-	.ascii	"ftl_sblk_dump_write = %x %x\012\000"
+	.ascii	"ftl_sblk_dump_write2 = %x %d %d %d\012\000"
 .LC165:
+	.ascii	"ftl_sblk_dump_write = %x %x\012\000"
+.LC166:
 	.ascii	"ftl_sblk_dump_write done = %x\012\000"
 	.section	.rodata.ftl_ext_info_init.str1.1,"aMS",%progbits,1
-.LC147:
+.LC149:
 	.ascii	"%s %d %d %x %x\012\000"
+.LC150:
+	.ascii	"%s %x %x %x\012\000"
 	.section	.rodata.ftl_free_sblk.str1.1,"aMS",%progbits,1
-.LC61:
-	.ascii	"swl_tlc_free_mini_ec_blk sblk %x\012\000"
-.LC62:
+.LC63:
 	.ascii	"swl_slc_free_mini_ec_blk sblk %x\012\000"
 	.section	.rodata.ftl_info_blk_init.str1.1,"aMS",%progbits,1
-.LC144:
+.LC146:
 	.ascii	"%d %x @%d %x\012\000"
-.LC145:
+.LC147:
 	.ascii	"ftl_info_blk_init %d %d %x\012\000"
-.LC146:
+.LC148:
 	.ascii	"ink flag: %x\012\000"
 	.section	.rodata.ftl_info_flush.str1.1,"aMS",%progbits,1
-.LC143:
+.LC145:
 	.ascii	"g_ftl_info_blk blk = %x, page = %x version = %d\012"
 	.ascii	"\000"
+	.section	.rodata.ftl_ink_check_sblk.str1.1,"aMS",%progbits,1
+.LC167:
+	.ascii	"ftl_ink_check_sblk = %x %d %d\012\000"
+.LC168:
+	.ascii	"ftl_ink_check_sblk = %x %d %d end\012\000"
 	.section	.rodata.ftl_low_format.str1.1,"aMS",%progbits,1
-.LC148:
+.LC169:
 	.ascii	"ftl_low_format %d\012\000"
-.LC149:
+.LC170:
 	.ascii	"low format %d %d %d %d\012\000"
 	.section	.rodata.ftl_mask_bad_block.str1.1,"aMS",%progbits,1
-.LC59:
+.LC61:
 	.ascii	"mask bad block:cs %x %x block: %x %x\012\000"
 	.section	.rodata.ftl_open_sblk_recovery.str1.1,"aMS",%progbits,1
 .LC151:
@@ -29617,193 +32181,200 @@ __func__.9819:
 .LC154:
 	.ascii	"phy_blk = %x %x\012\000"
 .LC155:
-	.ascii	"sblk = %x, vpn0 = %d, vpn1 = %d\012\000"
+	.ascii	"num_planes = %x\012\000"
 .LC156:
-	.ascii	"dump_write_lpa = %x %x %x %x\012\000"
+	.ascii	"sblk = %x, vpn0 = %d, vpn1 = %d\012\000"
 .LC157:
+	.ascii	"dump_write_lpa = %x %x %x %x\012\000"
+.LC158:
 	.ascii	"dump write new ppa = %x, last ppa = %x lpa = %x\012"
 	.ascii	"\000"
-.LC158:
-	.ascii	"dump write = %x %x\012\000"
 .LC159:
+	.ascii	"dump write = %x %x %x\012\000"
+.LC160:
 	.ascii	"dump write hash update = %x %x %x\012\000"
 	.section	.rodata.ftl_re_low_format.str1.1,"aMS",%progbits,1
-.LC150:
+.LC171:
 	.ascii	"re low format %d\012\000"
 	.section	.rodata.ftl_sblk_dump.str1.1,"aMS",%progbits,1
-.LC215:
+.LC221:
 	.ascii	"ftl_sblk_dump = %x %d %d %d %d\012\000"
-.LC216:
+.LC222:
 	.ascii	"ftl_sblk_dump = %x %x %x %x\012\000"
-.LC217:
+.LC223:
 	.ascii	"page_addr = %x, lpa=%x vpn = %d\012\000"
-.LC218:
+.LC224:
 	.ascii	"index= %x, lpa=%x\012\000"
-.LC219:
+.LC225:
 	.ascii	"block = %x, vpn=%x check vpn = %d\012\000"
 	.section	.rodata.ftl_sysblk_dump.str1.1,"aMS",%progbits,1
-.LC171:
+.LC177:
 	.ascii	"l2p:\000"
 	.section	.rodata.ftl_test_block.str1.1,"aMS",%progbits,1
-.LC142:
+.LC144:
 	.ascii	"low format %d\012\000"
 	.section	.rodata.ftl_update_l2p_map.str1.1,"aMS",%progbits,1
-.LC226:
+.LC232:
 	.ascii	"ftl_update_l2p_map: %x %x %x\012\000"
-.LC227:
+.LC233:
 	.ascii	"ftl_update_l2p_map\000"
-.LC228:
+.LC234:
 	.ascii	"lpa_tbl:\000"
-.LC229:
+.LC235:
 	.ascii	"sblk %x vpn: %d %d\012\000"
 	.section	.rodata.ftl_vpn_decrement.str1.1,"aMS",%progbits,1
-.LC58:
+.LC60:
 	.ascii	"ftl_vpn_decrement %x = %d, %d\012\000"
 	.section	.rodata.ftl_write_commit.str1.1,"aMS",%progbits,1
-.LC231:
+.LC237:
 	.ascii	"%d read error: ppa:%x, lpa:%x, status:%x\012\000"
 	.section	.rodata.ftl_write_completed.str1.1,"aMS",%progbits,1
-.LC71:
-	.ascii	"ftl prog error =%x, lpa = %x, ppa= %x\012\000"
 .LC72:
+	.ascii	"ftl prog error =%x, lpa = %x, ppa= %x\012\000"
+.LC73:
 	.ascii	"ftl re prog: lpa = %x, ppa= %x\012\000"
 	.section	.rodata.gc_add_sblk.str1.1,"aMS",%progbits,1
 .LC43:
-	.ascii	"gc_add_sblk = %d, %d, %d, %d, %d, %d\012\000"
+	.ascii	"gc_add_sblk = %d, %d, %d, %d, %d, %d, %d\012\000"
 .LC44:
+	.ascii	"gc_add_sblk = %d, %d, %d\012\000"
+.LC45:
 	.ascii	"gc_add_sblk = %d, %d, %d,last update:%d, %d\012\000"
+.LC46:
+	.ascii	"gc_add_sblk = %d, %d, %d, %d, %d, %d\012\000"
 	.section	.rodata.gc_check_data_one_wl.str1.1,"aMS",%progbits,1
-.LC223:
+.LC229:
 	.ascii	"gc_lpa:\000"
-.LC224:
+.LC230:
 	.ascii	"gc_ppa:\000"
-.LC225:
+.LC231:
 	.ascii	"err: ppa = %x, status = %x, %x %x spare: %x %x %x %"
 	.ascii	"x\012\000"
 	.section	.rodata.gc_do_copy_back.str1.1,"aMS",%progbits,1
-.LC232:
+.LC238:
 	.ascii	"gc page in buf: lpa %x ppa = %x pageindex= %x\012\000"
-.LC233:
+.LC239:
 	.ascii	"gc_do_copy_back: lpa %x des_ppa = %x %x gc_ppa= %x "
 	.ascii	"page_index= %d\012\000"
-.LC234:
-	.ascii	"gc_do_copy_back: %x %x %x %x gc_ppa:%x %x\012\000"
-.LC235:
-	.ascii	"%d prog_step: %x %x buf id= %x ppa = %x hash=%x id "
-	.ascii	"= %x plane = %x lpa=%x\012\000"
+.LC240:
+	.ascii	"gc_do_copy_back: %x %x %x %x gc_ppa:%x %x %x %d\012"
+	.ascii	"\000"
+.LC241:
+	.ascii	"%d prog_step: %x %x buf id= %x ppa = %x hash=%d id "
+	.ascii	"= %x plane = %x lpa=%x %x\012\000"
 	.section	.rodata.gc_free_bad_sblk.str1.1,"aMS",%progbits,1
-.LC60:
+.LC62:
 	.ascii	"gc_free_bad_sblk 0x%x\012\000"
 	.section	.rodata.gc_free_src_blk.str1.1,"aMS",%progbits,1
-.LC63:
-	.ascii	"gc_free_src_blk = %x, vpn = %d\012\000"
 .LC64:
+	.ascii	"gc_free_src_blk = %x, vpn = %d\012\000"
+.LC65:
 	.ascii	"gc_free_src_blk %x, %d\012\000"
 	.section	.rodata.gc_free_temp_buf.str1.1,"aMS",%progbits,1
-.LC48:
+.LC50:
 	.ascii	"%d gc_free_temp_buf buf id= %x\012\000"
 	.section	.rodata.gc_mark_bad_ppa.str1.1,"aMS",%progbits,1
-.LC45:
+.LC47:
 	.ascii	"gc_mark_bad_ppa %d %x %x\012\000"
 	.section	.rodata.gc_recovery.str1.1,"aMS",%progbits,1
-.LC193:
+.LC199:
 	.ascii	"ppa = %x, status = %x, data:%x %x %x %x, spare: %x "
 	.ascii	"%x %x %x\012\000"
-.LC194:
+.LC200:
 	.ascii	"ppa = %x, status = %x, %x %x spare: %x %x %x %x\012"
 	.ascii	"\000"
-.LC195:
+.LC201:
 	.ascii	"gc_recovery: %x vpn = %x\012\000"
 	.section	.rodata.gc_scan_src_blk.str1.1,"aMS",%progbits,1
-.LC213:
+.LC219:
 	.ascii	"gc_scan_src_blk = %x, vpn = %d\012\000"
-.LC214:
+.LC220:
 	.ascii	"gc_scan_src_blk = %x, s vpn0 = %d, c vpn1 = %d\012\000"
 	.section	.rodata.gc_search_src_blk.str1.1,"aMS",%progbits,1
-.LC50:
+.LC52:
 	.ascii	"zftl_get_gc_node cache = %x index = %d vpn = %x\012"
 	.ascii	"\000"
-.LC51:
+.LC53:
 	.ascii	"gc_search_src_blk mode = %x, src mode = %x, count= "
 	.ascii	"%d %d\012\000"
 	.section	.rodata.gc_static_wearleveling.str1.1,"aMS",%progbits,1
-.LC79:
+.LC80:
 	.ascii	"gc_static_wearleveling: min blk: %x,sec=%d,xec = %d"
 	.ascii	" ,mode=%d, func=%x, bbt=%x vpn = %d\012\000"
-.LC80:
+.LC81:
 	.ascii	"gc_static_wearleveling: min slc blk: %x,sec=%d,xec "
 	.ascii	"= %d ,mode=%d, func=%x, bbt=%x vpn = %d\012\000"
-.LC81:
+.LC82:
 	.ascii	"gc_static_wearleveling: min tlc blk: %x,sec=%d,xec "
 	.ascii	"= %d ,mode=%d, func=%x, bbt=%x vpn = %d\012\000"
-.LC82:
+.LC83:
 	.ascii	"gc_static_wearleveling: max slc blk: %x,sec=%d,xec "
 	.ascii	"= %d ,mode=%d, func=%x, bbt=%x vpn = %d\012\000"
-.LC83:
+.LC84:
 	.ascii	"gc_static_wearleveling: max xlc blk: %x,sec=%d,xec "
 	.ascii	"= %d ,mode=%d, func=%x, bbt=%x vpn = %d\012\000"
-.LC84:
+.LC85:
 	.ascii	"gc_static_wearleveling: slc blk: %x, tlc blk: %d av"
 	.ascii	"g slc ec: %d, avg tlc ec: %d \012\000"
-.LC85:
+.LC86:
 	.ascii	"gc_static_wearleveling: min slc ec: %x, min tlc ec:"
 	.ascii	" %d max slc ec: %d, max tlc ec: %d; %d %d\012\000"
-.LC86:
-	.ascii	"swl add tlc gc = %x, %d, %d, %d, %d, %d\012\000"
 .LC87:
+	.ascii	"swl add tlc gc = %x, %d, %d, %d, %d, %d\012\000"
+.LC88:
 	.ascii	"swl add slc gc  = %x, %d, %d, %d, %d, %d\012\000"
 	.section	.rodata.gc_update_l2p_map_new.str1.1,"aMS",%progbits,1
-.LC209:
+.LC215:
 	.ascii	"gc_update_l2p_map_new sblk %x\012\000"
-.LC210:
+.LC216:
 	.ascii	"gc_update_l2p_map_new: %x %x %x\012\000"
-.LC211:
+.LC217:
 	.ascii	"lpa: %x %x %x\012\000"
-.LC212:
+.LC218:
 	.ascii	"gc_update_l2p_map_new: %x vpn = %x vpn1 = %x done\012"
 	.ascii	"\000"
 	.section	.rodata.gc_write_completed.str1.1,"aMS",%progbits,1
-.LC46:
+.LC48:
 	.ascii	"status: %x, ppa: %x\012\000"
-.LC47:
-	.ascii	"gc_write_completed: %x  %x  %x %x\012\000"
+.LC49:
+	.ascii	"gc_write_completed: %x  %x  %d %x\012\000"
 	.section	.rodata.hynix_get_read_retry_default.str1.1,"aMS",%progbits,1
-.LC98:
+.LC100:
 	.ascii	"otp error! %d\000"
-.LC99:
+.LC101:
 	.ascii	"rr\000"
 	.section	.rodata.hynix_read_retrial.str1.1,"aMS",%progbits,1
-.LC114:
+.LC116:
 	.ascii	"hynix RR %d row=%x, count %d, status=%d\012\000"
 	.section	.rodata.idb_write_data.str1.1,"aMS",%progbits,1
-.LC130:
+.LC132:
 	.ascii	"1 write_idblock fix data %x %x %x\012\000"
-.LC131:
+.LC133:
 	.ascii	"write_idblock check fail! %x\012\000"
-.LC132:
+.LC134:
 	.ascii	"write_idblock fail! %x\012\000"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",%progbits,1
-.LC184:
+.LC190:
 	.ascii	"region_id = %d, pm_max_region = %d\012\000"
-.LC185:
+.LC191:
 	.ascii	"load_l2p_region no ppa = %x , %x, all setting 0xff."
 	.ascii	"...\012\000"
-.LC186:
+.LC192:
 	.ascii	"load_l2p_region = %x,%x,%x, %x\012\000"
-.LC187:
+.LC193:
 	.ascii	"pm_ppa:\000"
-.LC188:
+.LC194:
 	.ascii	"data:\000"
-.LC189:
+.LC195:
 	.ascii	"spare:\000"
 	.section	.rodata.lpa_rebuild_hash.str1.1,"aMS",%progbits,1
-.LC78:
+.LC79:
 	.ascii	"%s %d %d\012\000"
 	.section	.rodata.micron_read_retrial.str1.1,"aMS",%progbits,1
-.LC109:
-	.ascii	"micron %d row=%x,last status %d,status = %d\012\000"
-.LC110:
-	.ascii	"micron RR %d row=%x,count %d,status=%d\012\000"
+.LC111:
+	.ascii	"MT %d row=%x,last status %d,status = %d\012\000"
+.LC112:
+	.ascii	"MT RR %d row=%x,count %d,status=%d\012\000"
 	.section	.rodata.nand_flash_print_info.str1.1,"aMS",%progbits,1
 .LC1:
 	.ascii	"...%s enter...\012\000"
@@ -29868,92 +32439,94 @@ __func__.9819:
 .LC31:
 	.ascii	"g_flash_toggle_mode_en: %x\012\000"
 	.section	.rodata.nandc_init.str1.1,"aMS",%progbits,1
-.LC91:
+.LC93:
 	.ascii	"...%s enter... %p\012\000"
-.LC92:
+.LC94:
 	.ascii	"0:%x %x %x %x %x\012\000"
-.LC93:
+.LC95:
 	.ascii	"g_nandc_ver...%d\012\000"
 	.section	.rodata.nandc_xfer.str1.1,"aMS",%progbits,1
-.LC105:
+.LC107:
 	.ascii	"dqs data abort %x\012\000"
-.LC106:
+.LC108:
 	.ascii	"dqs data timeout %x\012\000"
-.LC107:
+.LC109:
 	.ascii	"xfer error %x\012\000"
 	.section	.rodata.nandc_xfer_done.str1.1,"aMS",%progbits,1
-.LC100:
+.LC102:
 	.ascii	"flash_abort_clear = %d\012\000"
-.LC101:
+.LC103:
 	.ascii	"%d mtrans_cnt = %d page_num = %d\012\000"
-.LC102:
+.LC104:
 	.ascii	"nandc:\000"
-.LC103:
+.LC105:
 	.ascii	"%d flReg.d32=%x %x\012\000"
-.LC104:
+.LC106:
 	.ascii	"nandc_xfer_done read error %x\012\000"
 	.section	.rodata.pm_alloc_new_blk.str1.1,"aMS",%progbits,1
-.LC76:
-	.ascii	"blk %x is bad block\012\000"
 .LC77:
+	.ascii	"blk %x is bad block\012\000"
+.LC78:
 	.ascii	"pm_alloc_new_blk: %x %x %x %x\012\000"
 	.section	.rodata.pm_free_sblk.str1.1,"aMS",%progbits,1
-.LC89:
+.LC90:
+	.ascii	"GC PM block %x %x %x %d\012\000"
+.LC91:
 	.ascii	"ftl_free_no_use_map_blk %x %x %x %d\012\000"
 	.section	.rodata.pm_init.str1.1,"aMS",%progbits,1
-.LC190:
+.LC196:
 	.ascii	"pm_init posr %x %x %x\012\000"
-.LC191:
+.LC197:
 	.ascii	"pm_init recovery %x %x %x\012\000"
 	.section	.rodata.pm_log2phys.str1.1,"aMS",%progbits,1
-.LC192:
+.LC198:
 	.ascii	"pm_log2phys  lpn = %d, max lpn = %d\012\000"
 	.section	.rodata.pm_ppa_update_check.str1.1,"aMS",%progbits,1
-.LC183:
+.LC189:
 	.ascii	"%s w error lpn = %x, max ppa = %d\012\000"
 	.section	.rodata.pm_write_page.str1.1,"aMS",%progbits,1
-.LC160:
+.LC161:
 	.ascii	"pm_write_page write error: %x\012\000"
 	.section	.rodata.print_ftl_debug_info.str1.1,"aMS",%progbits,1
-.LC65:
+.LC66:
 	.ascii	"bad blk = %x, %x free blk: s:%x,t:%x,m:%x, data blk"
 	.ascii	":s:%x,%x,t%x vpn: s:%x t:%x, max_vpn: %x\012\000"
-.LC66:
-	.ascii	"totle w: %d MB,r: %d MB %d dv:0x%X,poc:%d\012\000"
 .LC67:
-	.ascii	"gc xlc page: %d,gc slc page: %d, tmp w: %d MB\012\000"
+	.ascii	"totle w: %d MB,r: %d MB %d dv:0x%X,poc:%d\012\000"
 .LC68:
-	.ascii	"slc ec: %d,%d,%d,%d,%d,tlc ec: %d,%d,%d,%d,%d\012\000"
+	.ascii	"gc xlc page: %d,gc slc page: %d, tmp w: %d MB\012\000"
 .LC69:
+	.ascii	"slc ec: %d,%d,%d,%d,%d,tlc ec: %d,%d,%d,%d,%d\012\000"
+.LC70:
 	.ascii	"gc th: tlc_tlc: %d tlc_slc: %d slc_slc: %d slc_tlc:"
 	.ascii	"%d free_th: %d\012\000"
-.LC70:
-	.ascii	"swl : %x %x %x %x\012\000"
+.LC71:
+	.ascii	"swl : %x %x %x %x %x %x\012\000"
 	.section	.rodata.print_gc_debug_info.str1.1,"aMS",%progbits,1
-.LC49:
+.LC51:
 	.ascii	"gc: b:%x,p:%x,i:%x; free buf=%d %d free slc th: %d\012"
 	.ascii	"\000"
 	.section	.rodata.print_list_info.str1.1,"aMS",%progbits,1
-.LC56:
+.LC58:
 	.ascii	"list count:%p %d\012\000"
-.LC57:
+.LC59:
 	.ascii	"%d: node:%x %x %x %x, %d %d %d %d %d\012\000"
 	.section	.rodata.queue_wait_first_req_completed.str1.1,"aMS",%progbits,1
-.LC123:
+.LC125:
 	.ascii	"read: %x %x %x %x\012\000"
-.LC124:
+.LC126:
 	.ascii	"0set buf %d,status = %x, ppa = %x lun state = %d\012"
 	.ascii	"\000"
-.LC125:
+.LC127:
 	.ascii	"prog end %x %x error_ecc %d %d\012\000"
-.LC126:
+.LC128:
 	.ascii	"1set buf %d,status = %x, ppa = %x lun state = %d\012"
 	.ascii	"\000"
-.LC127:
+.LC129:
 	.ascii	"dp prog end %x %x error_ecc %d %d\012\000"
 	.section	.rodata.random_seed,"a",%progbits
 	.align	1
-	.set	.LANCHOR49,. + 0
+	.set	.LANCHOR51,. + 0
 	.type	random_seed, %object
 	.size	random_seed, 256
 random_seed:
@@ -30086,30 +32659,30 @@ random_seed:
 	.short	17598
 	.short	28087
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",%progbits,1
-.LC208:
+.LC214:
 	.ascii	"zftl_init %x\012\000"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",%progbits,1
-.LC94:
+.LC96:
 	.ascii	"%s 0x%x:\000"
-.LC95:
+.LC97:
 	.ascii	"%x \000"
-.LC96:
+.LC98:
 	.ascii	"\000"
-.LC97:
+.LC99:
 	.ascii	"%s\012\000"
 	.section	.rodata.sandisk_prog_test_bad_block.str1.1,"aMS",%progbits,1
 .LC41:
 	.ascii	"bad block test:%x %x\012\000"
 	.section	.rodata.sblk_3d_tlc_dump_prog.str1.1,"aMS",%progbits,1
-.LC133:
+.LC135:
 	.ascii	"sblk_3d_tlc_dump_prog wl_addr= %x ppa = %x ppa = %x"
 	.ascii	"\012\000"
 	.section	.rodata.sblk_mlc_dump_prog.str1.1,"aMS",%progbits,1
-.LC134:
+.LC136:
 	.ascii	"sblk_mlc_dump_prog wl_addr= %x ppa = %x ppa = %x\012"
 	.ascii	"\000"
 	.section	.rodata.sblk_prog_page.str1.1,"aMS",%progbits,1
-.LC135:
+.LC137:
 	.ascii	"sblk_prog_page ppa = %x, count = %d\012\000"
 	.section	.rodata.toshiba_15ref_value,"a",%progbits
 	.set	.LANCHOR24,. + 0
@@ -30212,7 +32785,7 @@ toshiba_15ref_value:
 	.byte	114
 	.byte	0
 	.section	.rodata.toshiba_3D_slc_value,"a",%progbits
-	.set	.LANCHOR35,. + 0
+	.set	.LANCHOR37,. + 0
 	.type	toshiba_3D_slc_value, %object
 	.size	toshiba_3D_slc_value, 11
 toshiba_3D_slc_value:
@@ -30228,7 +32801,7 @@ toshiba_3D_slc_value:
 	.byte	-56
 	.byte	56
 	.section	.rodata.toshiba_3D_tlc_value,"a",%progbits
-	.set	.LANCHOR34,. + 0
+	.set	.LANCHOR36,. + 0
 	.type	toshiba_3D_tlc_value, %object
 	.size	toshiba_3D_tlc_value, 399
 toshiba_3D_tlc_value:
@@ -30632,11 +33205,11 @@ toshiba_3D_tlc_value:
 	.byte	12
 	.byte	14
 	.section	.rodata.toshiba_3d_read_retrial.str1.1,"aMS",%progbits,1
-.LC111:
+.LC113:
 	.ascii	"toshiba SRR %d row=%x, status=%d\012\000"
-.LC112:
+.LC114:
 	.ascii	"toshiba TRR %d row=%x, status=%d\012\000"
-.LC113:
+.LC115:
 	.ascii	"toshiba RR %d row=%x,count %d,status=%d\012\000"
 	.section	.rodata.toshiba_A19ref_value,"a",%progbits
 	.set	.LANCHOR22,. + 0
@@ -30702,65 +33275,65 @@ toshiba_ref_value:
 	.byte	12
 	.byte	112
 	.section	.rodata.zftl_discard.str1.1,"aMS",%progbits,1
-.LC241:
+.LC247:
 	.ascii	"ftl_discard:(%x, %x, %x, %x)\012\000"
 	.section	.rodata.zftl_do_gc.str1.1,"aMS",%progbits,1
-.LC236:
+.LC242:
 	.ascii	"gc %d: %d %d %d %d %d %d %d\012\000"
-.LC237:
+.LC243:
 	.ascii	"gc %d: %d %d %d %d %d %d\012\000"
-.LC238:
+.LC244:
 	.ascii	"GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\012"
 	.ascii	"\000"
-.LC239:
+.LC245:
 	.ascii	"gc free %x, %d\012\000"
 	.section	.rodata.zftl_gc_get_free_sblk.str1.1,"aMS",%progbits,1
-.LC52:
+.LC54:
 	.ascii	"swl_tlc_free_mini_ec_blk alloc sblk %x\012\000"
-.LC53:
+.LC55:
 	.ascii	"zftl_get_free_sblk %x %d, %p %d %d\012\000"
-.LC54:
+.LC56:
 	.ascii	"zftl_gc_get_free_sblk %x %x %x, %d %d %d\012\000"
 	.section	.rodata.zftl_get_free_sblk.str1.1,"aMS",%progbits,1
-.LC55:
+.LC57:
 	.ascii	"swl_slc_free_mini_ec_blk alloc sblk %x\012\000"
 	.section	.rodata.zftl_init.str1.1,"aMS",%progbits,1
-.LC196:
-	.ascii	"FTL version: 6.0.16 20190603\000"
-.LC197:
+.LC202:
+	.ascii	"FTL version: 6.0.18 20190918\000"
+.LC203:
 	.ascii	"_c_user_data_density := %d\012\000"
-.LC198:
+.LC204:
 	.ascii	"_c_totle_phy_density := %d\012\000"
-.LC199:
+.LC205:
 	.ascii	"_c_totle_log_page := %d\012\000"
-.LC200:
+.LC206:
 	.ascii	"_c_totle_data_density := %d\012\000"
-.LC201:
+.LC207:
 	.ascii	"_c_ftl_pm_page_num := %d\012\000"
-.LC202:
+.LC208:
 	.ascii	"_c_ftl_byte_pre_page := %d\012\000"
-.LC203:
+.LC209:
 	.ascii	"_c_max_pm_sblk := %d\012\000"
-.LC204:
+.LC210:
 	.ascii	"_min_slc_super_block := %d\012\000"
-.LC205:
+.LC211:
 	.ascii	"_max_xlc_super_block := %d\012\000"
-.LC206:
+.LC212:
 	.ascii	"gp_ftl_ext_info %p %p %p\012\000"
-.LC207:
+.LC213:
 	.ascii	"flash info size: %d %d %d\012\000"
 	.section	.rodata.zftl_read.str1.1,"aMS",%progbits,1
-.LC220:
+.LC226:
 	.ascii	"ftl_read %x %x %x\012\000"
-.LC221:
+.LC227:
 	.ascii	"ftl_read refresh =%x, lpa = %x, ppa= %x\012\000"
-.LC222:
+.LC228:
 	.ascii	"id=%d, status = %x, lpa = %x, ppa = %x spare = %x %"
 	.ascii	"x %x %x\012\000"
 	.section	.rodata.zftl_sblk_list_init.str1.1,"aMS",%progbits,1
-.LC88:
+.LC89:
 	.ascii	"free blk vpn error: %x %x\012\000"
 	.section	.rodata.zftl_write.str1.1,"aMS",%progbits,1
-.LC240:
+.LC246:
 	.ascii	"ftlwrite %x %x %x %x\012\000"
 	.hidden	free
diff --git a/drivers/rknand/rk_zftl_arm_v8.S b/drivers/rknand/rk_zftl_arm_v8.S
index ad5090cdd5..f1b34d6a34 100644
--- a/drivers/rknand/rk_zftl_arm_v8.S
+++ b/drivers/rknand/rk_zftl_arm_v8.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2019-06-03
+ * date: 2019-09-18
  */
 	.arch armv8-a
 	.file	"rk_zftl_arm_v8.S"
@@ -284,118 +284,112 @@ _insert_data_list:
 	and	w1, w1, 65535
 	ldrh	w4, [x3, #:lo12:.LANCHOR6]
 	cmp	w4, w1
-	bls	.L61
+	bls	.L63
 	mov	x5, x3
 	ldrh	w3, [x2]
-	mov	w12, 6
-	ldr	x11, [x0]
+	mov	w13, 6
+	ldr	x12, [x0]
 	add	w3, w3, 1
 	strh	w3, [x2]
 	adrp	x2, .LANCHOR4
-	umull	x12, w1, w12
-	ldr	x8, [x2, #:lo12:.LANCHOR4]
+	umull	x13, w1, w13
+	ldr	x10, [x2, #:lo12:.LANCHOR4]
 	mov	w2, -1
-	add	x10, x8, x12
-	strh	w2, [x10, 2]
-	strh	w2, [x8, x12]
-	cbnz	x11, .L44
-	str	x10, [x0]
+	add	x11, x10, x13
+	strh	w2, [x11, 2]
+	strh	w2, [x10, x13]
+	cbnz	x12, .L44
+	str	x11, [x0]
 	ret
 .L44:
 	stp	x29, x30, [sp, -32]!
 	adrp	x2, .LANCHOR9
 	uxtw	x3, w1
-	adrp	x7, .LANCHOR8
+	adrp	x6, .LANCHOR8
 	add	x29, sp, 0
 	ldr	x15, [x2, #:lo12:.LANCHOR9]
 	adrp	x2, .LANCHOR7
-	ldrh	w4, [x10, 4]
-	ldr	x13, [x2, #:lo12:.LANCHOR7]
+	ldrh	w4, [x11, 4]
+	ldr	x14, [x2, #:lo12:.LANCHOR7]
 	stp	x19, x20, [sp, 16]
-	ldrh	w6, [x15, x3, lsl 1]
+	ldrh	w8, [x15, x3, lsl 1]
 	lsl	x3, x3, 2
-	ldrh	w16, [x7, #:lo12:.LANCHOR8]
-	ldr	w2, [x13, x3]
-	mul	w6, w6, w4
-	ldrh	w3, [x13, x3]
+	ldrh	w16, [x6, #:lo12:.LANCHOR8]
+	ldr	w2, [x14, x3]
+	mul	w8, w8, w4
+	ldrh	w3, [x14, x3]
 	ubfx	x2, x2, 11, 8
 	and	w3, w3, 2047
-	cbz	w6, .L45
+	cbz	w8, .L45
 	madd	w2, w16, w2, w3
-	add	w6, w6, w2, uxth
+	add	w8, w8, w2, uxth
 .L45:
-	sub	x2, x11, x8
+	sub	x2, x12, x10
 	mov	x3, -6148914691236517206
 	asr	x2, x2, 1
 	movk	x3, 0xaaab, lsl 0
 	cmp	w4, 0
-	ldrh	w30, [x5, #:lo12:.LANCHOR6]
-	csinv	w6, w6, wzr, ne
-	mov	x7, x11
+	ldrh	w19, [x5, #:lo12:.LANCHOR6]
+	csinv	w8, w8, wzr, ne
+	mov	x7, x12
 	mul	x2, x2, x3
 	mov	w4, 0
-	mov	w19, 65535
-	mov	w20, 6
+	mov	w20, 65535
+	mov	w30, 6
 	and	w2, w2, 65535
-.L52:
+.L51:
 	add	w4, w4, 1
 	and	w4, w4, 65535
-	cmp	w4, w30
+	cmp	w4, w19
 	bhi	.L41
 	cmp	w1, w2
 	beq	.L41
-	uxtw	x5, w2
+	uxtw	x6, w2
 	ldrh	w17, [x7, 4]
-	ldrh	w3, [x15, x5, lsl 1]
-	lsl	x5, x5, 2
-	mul	w14, w3, w17
-	ldr	w3, [x13, x5]
-	ldrh	w5, [x13, x5]
-	ubfx	x3, x3, 11, 8
-	and	w5, w5, 2047
-	cbz	w14, .L48
-	cbz	w17, .L56
-	madd	w3, w16, w3, w5
-	add	w3, w14, w3, uxth
-.L49:
-	cmp	w6, w3
-	bcc	.L50
-.L54:
+	ldrh	w3, [x15, x6, lsl 1]
+	lsl	x6, x6, 2
+	ldr	w5, [x14, x6]
+	mul	w3, w3, w17
+	ldrh	w6, [x14, x6]
+	ubfx	x5, x5, 11, 8
+	and	w6, w6, 2047
+	cbz	w3, .L48
+	madd	w5, w16, w5, w6
+	add	w3, w3, w5, uxth
+.L48:
+	cbz	w17, .L49
+	cmp	w8, w3
+	bls	.L49
 	ldrh	w3, [x7]
-	cmp	w3, w19
-	bne	.L51
-	strh	w2, [x10, 2]
+	cmp	w3, w20
+	bne	.L50
+	strh	w2, [x11, 2]
 	strh	w1, [x7]
 .L41:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L51:
-	umaddl	x7, w3, w20, x8
-	mov	w2, w3
-	b	.L52
 .L50:
+	umaddl	x7, w3, w30, x10
+	mov	w2, w3
+	b	.L51
+.L49:
 	ldrh	w3, [x7, 2]
-	cmp	x11, x7
-	strh	w3, [x10, 2]
-	strh	w2, [x8, x12]
-	bne	.L53
-	strh	w1, [x11, 2]
-	str	x10, [x0]
+	cmp	x12, x7
+	strh	w3, [x11, 2]
+	strh	w2, [x10, x13]
+	bne	.L52
+	strh	w1, [x12, 2]
+	str	x11, [x0]
 	b	.L41
-.L53:
+.L52:
 	ldrh	w0, [x7, 2]
 	mov	w2, 6
 	umull	x0, w0, w2
-	strh	w1, [x8, x0]
+	strh	w1, [x10, x0]
 	strh	w1, [x7, 2]
 	b	.L41
-.L48:
-	cbnz	w17, .L54
-.L56:
-	mov	w3, -1
-	b	.L49
-.L61:
+.L63:
 	ret
 	.size	_insert_data_list, .-_insert_data_list
 	.section	.text._list_get_gc_head_node.isra.2,"ax",@progbits
@@ -403,26 +397,26 @@ _insert_data_list:
 	.type	_list_get_gc_head_node.isra.2, %function
 _list_get_gc_head_node.isra.2:
 	and	w1, w1, 65535
-	cbz	x0, .L68
+	cbz	x0, .L70
 	adrp	x2, .LANCHOR4
 	mov	w3, 65535
 	mov	w4, 6
 	ldr	x2, [x2, #:lo12:.LANCHOR4]
-.L65:
-	cbz	w1, .L66
+.L67:
+	cbz	w1, .L68
 	ldrh	w0, [x0]
 	cmp	w0, w3
-	bne	.L67
+	bne	.L69
 	ret
-.L67:
+.L69:
 	sub	w1, w1, #1
 	umaddl	x0, w0, w4, x2
 	and	w1, w1, 65535
-	b	.L65
-.L68:
+	b	.L67
+.L70:
 	mov	w0, 65535
 	ret
-.L66:
+.L68:
 	sub	x0, x0, x2
 	mov	x1, -6148914691236517206
 	asr	x0, x0, 1
@@ -446,13 +440,13 @@ _list_update_data_list:
 	ldrh	w3, [x1, 16]
 	str	x25, [sp, 64]
 	cmp	w3, w19
-	beq	.L70
+	beq	.L72
 	ldrh	w3, [x1, 48]
 	cmp	w3, w19
-	beq	.L70
+	beq	.L72
 	ldrh	w1, [x1, 80]
 	cmp	w1, w19
-	beq	.L70
+	beq	.L72
 	adrp	x1, .LANCHOR4
 	mov	w22, 6
 	ldr	x3, [x0]
@@ -461,31 +455,31 @@ _list_update_data_list:
 	ldr	x24, [x1, #:lo12:.LANCHOR4]
 	add	x23, x24, x22
 	cmp	x23, x3
-	beq	.L70
+	beq	.L72
 	mov	x20, x0
 	ldrh	w0, [x23, 2]
 	mov	w1, 65535
 	mov	x21, x2
 	cmp	w0, w1
-	bne	.L74
+	bne	.L76
 	ldrh	w1, [x24, x22]
 	cmp	w1, w0
-	bne	.L74
+	bne	.L76
 	adrp	x1, .LANCHOR11
 	adrp	x0, .LC0
 	mov	w2, 255
 	add	x1, x1, :lo12:.LANCHOR11
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L74:
+.L76:
 	ldrh	w1, [x23, 2]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L75
+	bne	.L77
 	ldrh	w0, [x24, x22]
 	cmp	w0, w1
-	beq	.L70
-.L75:
+	beq	.L72
+.L77:
 	adrp	x0, .LANCHOR9
 	ubfiz	x2, x19, 1, 16
 	mov	x5, -6148914691236517206
@@ -509,7 +503,7 @@ _list_update_data_list:
 	mul	w0, w0, w1
 	csel	w0, w0, w4, ne
 	cmp	w3, w0
-	bcs	.L70
+	bcs	.L72
 	mov	x2, x21
 	mov	w1, w19
 	mov	x0, x20
@@ -523,7 +517,7 @@ _list_update_data_list:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	b	_insert_data_list
-.L70:
+.L72:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -540,10 +534,10 @@ zftl_get_gc_node.part.9:
 	ldr	x0, [x0, #:lo12:.LANCHOR12]
 	b	_list_get_gc_head_node.isra.2
 	.size	zftl_get_gc_node.part.9, .-zftl_get_gc_node.part.9
-	.section	.text.nandc_de_cs.constprop.29,"ax",@progbits
+	.section	.text.nandc_de_cs.constprop.30,"ax",@progbits
 	.align	2
-	.type	nandc_de_cs.constprop.29, %function
-nandc_de_cs.constprop.29:
+	.type	nandc_de_cs.constprop.30, %function
+nandc_de_cs.constprop.30:
 	adrp	x0, .LANCHOR13
 	ldr	x1, [x0, #:lo12:.LANCHOR13]
 	ldr	w0, [x1]
@@ -551,7 +545,7 @@ nandc_de_cs.constprop.29:
 	and	w0, w0, -131073
 	str	w0, [x1]
 	ret
-	.size	nandc_de_cs.constprop.29, .-nandc_de_cs.constprop.29
+	.size	nandc_de_cs.constprop.30, .-nandc_de_cs.constprop.30
 	.section	.text.nand_flash_print_info,"ax",@progbits
 	.align	2
 	.global	nand_flash_print_info
@@ -562,15 +556,15 @@ nand_flash_print_info:
 	str	x19, [sp, 16]
 	adrp	x19, .LANCHOR14
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L84
+	tbz	x0, 12, .L86
 	adrp	x1, .LANCHOR15
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR15
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L84:
+.L86:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L85
+	tbz	x0, 12, .L87
 	adrp	x0, .LANCHOR16
 	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w6, [x0, 6]
@@ -582,132 +576,132 @@ nand_flash_print_info:
 	adrp	x0, .LC2
 	add	x0, x0, :lo12:.LC2
 	bl	printf
-.L85:
+.L87:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L86
+	tbz	x0, 12, .L88
 	adrp	x0, .LANCHOR16
 	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w1, [x0, 8]
 	adrp	x0, .LC3
 	add	x0, x0, :lo12:.LC3
 	bl	printf
-.L86:
+.L88:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L87
+	tbz	x0, 12, .L89
 	adrp	x0, .LANCHOR16
 	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w1, [x0, 9]
 	adrp	x0, .LC4
 	add	x0, x0, :lo12:.LC4
 	bl	printf
-.L87:
+.L89:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L88
+	tbz	x0, 12, .L90
 	adrp	x0, .LANCHOR16
 	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrh	w1, [x0, 10]
 	adrp	x0, .LC5
 	add	x0, x0, :lo12:.LC5
 	bl	printf
-.L88:
+.L90:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L89
+	tbz	x0, 12, .L91
 	adrp	x0, .LANCHOR16
 	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w1, [x0, 12]
 	adrp	x0, .LC6
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L89:
+.L91:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L90
+	tbz	x0, 12, .L92
 	adrp	x0, .LANCHOR16
 	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w1, [x0, 13]
 	adrp	x0, .LC7
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L90:
+.L92:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L91
+	tbz	x0, 12, .L93
 	adrp	x0, .LANCHOR16
 	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrh	w1, [x0, 14]
 	adrp	x0, .LC8
 	add	x0, x0, :lo12:.LC8
 	bl	printf
-.L91:
+.L93:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L92
+	tbz	x0, 12, .L94
 	adrp	x0, .LANCHOR16
 	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w1, [x0, 23]
 	adrp	x0, .LC9
 	add	x0, x0, :lo12:.LC9
 	bl	printf
-.L92:
+.L94:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L93
+	tbz	x0, 12, .L95
 	adrp	x0, .LANCHOR16
 	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w1, [x0, 18]
 	adrp	x0, .LC10
 	add	x0, x0, :lo12:.LC10
 	bl	printf
-.L93:
+.L95:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L94
+	tbz	x0, 12, .L96
 	adrp	x0, .LANCHOR16
 	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w1, [x0, 19]
 	adrp	x0, .LC11
 	add	x0, x0, :lo12:.LC11
 	bl	printf
-.L94:
+.L96:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L95
+	tbz	x0, 12, .L97
 	adrp	x0, .LANCHOR16
 	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w1, [x0, 20]
 	adrp	x0, .LC12
 	add	x0, x0, :lo12:.LC12
 	bl	printf
-.L95:
+.L97:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L96
+	tbz	x0, 12, .L98
 	adrp	x0, .LANCHOR17
 	ldrb	w1, [x0, #:lo12:.LANCHOR17]
 	adrp	x0, .LC13
 	add	x0, x0, :lo12:.LC13
 	bl	printf
-.L96:
+.L98:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L97
+	tbz	x0, 12, .L99
 	adrp	x0, .LANCHOR0
 	ldrb	w1, [x0, #:lo12:.LANCHOR0]
 	adrp	x0, .LC14
 	add	x0, x0, :lo12:.LC14
 	bl	printf
-.L97:
+.L99:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L98
+	tbz	x0, 12, .L100
 	adrp	x0, .LANCHOR16
 	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w1, [x0, 22]
 	adrp	x0, .LC15
 	add	x0, x0, :lo12:.LC15
 	bl	printf
-.L98:
+.L100:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L99
+	tbz	x0, 12, .L101
 	adrp	x0, .LANCHOR18
 	ldrb	w1, [x0, #:lo12:.LANCHOR18]
 	adrp	x0, .LC16
 	add	x0, x0, :lo12:.LC16
 	bl	printf
-.L99:
+.L101:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L100
+	tbz	x0, 12, .L102
 	adrp	x0, .LANCHOR16
 	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w1, [x0, 16]
@@ -715,9 +709,9 @@ nand_flash_print_info:
 	add	x0, x0, :lo12:.LC17
 	and	w1, w1, 1
 	bl	printf
-.L100:
+.L102:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L101
+	tbz	x0, 12, .L103
 	adrp	x0, .LANCHOR16
 	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrh	w1, [x0, 16]
@@ -725,9 +719,9 @@ nand_flash_print_info:
 	add	x0, x0, :lo12:.LC18
 	ubfx	x1, x1, 1, 1
 	bl	printf
-.L101:
+.L103:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L102
+	tbz	x0, 12, .L104
 	adrp	x0, .LANCHOR16
 	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrh	w1, [x0, 16]
@@ -735,9 +729,9 @@ nand_flash_print_info:
 	add	x0, x0, :lo12:.LC19
 	ubfx	x1, x1, 2, 1
 	bl	printf
-.L102:
+.L104:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L103
+	tbz	x0, 12, .L105
 	adrp	x0, .LANCHOR16
 	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrh	w1, [x0, 16]
@@ -745,9 +739,9 @@ nand_flash_print_info:
 	add	x0, x0, :lo12:.LC20
 	ubfx	x1, x1, 3, 1
 	bl	printf
-.L103:
+.L105:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L104
+	tbz	x0, 12, .L106
 	adrp	x0, .LANCHOR16
 	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrh	w1, [x0, 16]
@@ -755,9 +749,9 @@ nand_flash_print_info:
 	add	x0, x0, :lo12:.LC21
 	ubfx	x1, x1, 4, 1
 	bl	printf
-.L104:
+.L106:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L105
+	tbz	x0, 12, .L107
 	adrp	x0, .LANCHOR16
 	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrh	w1, [x0, 16]
@@ -765,9 +759,9 @@ nand_flash_print_info:
 	add	x0, x0, :lo12:.LC22
 	ubfx	x1, x1, 5, 1
 	bl	printf
-.L105:
+.L107:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L106
+	tbz	x0, 12, .L108
 	adrp	x0, .LANCHOR16
 	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrh	w1, [x0, 16]
@@ -775,9 +769,9 @@ nand_flash_print_info:
 	add	x0, x0, :lo12:.LC23
 	ubfx	x1, x1, 6, 1
 	bl	printf
-.L106:
+.L108:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L107
+	tbz	x0, 12, .L109
 	adrp	x0, .LANCHOR16
 	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrh	w1, [x0, 16]
@@ -785,9 +779,9 @@ nand_flash_print_info:
 	add	x0, x0, :lo12:.LC24
 	ubfx	x1, x1, 7, 1
 	bl	printf
-.L107:
+.L109:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L108
+	tbz	x0, 12, .L110
 	adrp	x0, .LANCHOR16
 	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w1, [x0, 17]
@@ -795,9 +789,9 @@ nand_flash_print_info:
 	add	x0, x0, :lo12:.LC25
 	and	w1, w1, 1
 	bl	printf
-.L108:
+.L110:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L109
+	tbz	x0, 12, .L111
 	adrp	x0, .LANCHOR16
 	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrh	w1, [x0, 16]
@@ -805,9 +799,9 @@ nand_flash_print_info:
 	add	x0, x0, :lo12:.LC26
 	ubfx	x1, x1, 9, 1
 	bl	printf
-.L109:
+.L111:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L110
+	tbz	x0, 12, .L112
 	adrp	x0, .LANCHOR16
 	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrh	w1, [x0, 16]
@@ -815,9 +809,9 @@ nand_flash_print_info:
 	add	x0, x0, :lo12:.LC27
 	ubfx	x1, x1, 10, 1
 	bl	printf
-.L110:
+.L112:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L111
+	tbz	x0, 12, .L113
 	adrp	x0, .LANCHOR19
 	ldrb	w2, [x0, #:lo12:.LANCHOR19]
 	adrp	x0, .LANCHOR0
@@ -825,9 +819,9 @@ nand_flash_print_info:
 	adrp	x0, .LC28
 	add	x0, x0, :lo12:.LC28
 	bl	printf
-.L111:
+.L113:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L112
+	tbz	x0, 12, .L114
 	adrp	x0, .LANCHOR20
 	add	x0, x0, :lo12:.LANCHOR20
 	ldrb	w2, [x0, 11]
@@ -835,9 +829,9 @@ nand_flash_print_info:
 	adrp	x0, .LC29
 	add	x0, x0, :lo12:.LC29
 	bl	printf
-.L112:
+.L114:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L113
+	tbz	x0, 12, .L115
 	adrp	x0, .LANCHOR20
 	add	x0, x0, :lo12:.LANCHOR20
 	ldrb	w2, [x0, 9]
@@ -845,9 +839,9 @@ nand_flash_print_info:
 	adrp	x0, .LC30
 	add	x0, x0, :lo12:.LC30
 	bl	printf
-.L113:
+.L115:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L83
+	tbz	x0, 12, .L85
 	adrp	x0, .LANCHOR21
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -855,7 +849,7 @@ nand_flash_print_info:
 	adrp	x0, .LC31
 	add	x0, x0, :lo12:.LC31
 	b	printf
-.L83:
+.L85:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -868,11 +862,11 @@ timer_delay_ns:
 	sub	sp, sp, #16
 	lsr	w0, w0, 4
 	str	w0, [sp, 12]
-.L207:
+.L209:
 	ldr	w0, [sp, 12]
 	sub	w1, w0, #1
 	str	w1, [sp, 12]
-	cbnz	w0, .L207
+	cbnz	w0, .L209
 	add	sp, sp, 16
 	ret
 	.size	timer_delay_ns, .-timer_delay_ns
@@ -919,20 +913,20 @@ toshiba_set_rr_para:
 	add	x8, x8, :lo12:.LANCHOR24
 	add	x10, x10, :lo12:.LANCHOR25
 	cmp	w0, w2
-	bhi	.L220
+	bhi	.L222
 	ret
-.L214:
+.L216:
 	cmp	w0, 35
-	bne	.L216
+	bne	.L218
 	ldrsb	w0, [x3, x2]
-	b	.L221
-.L216:
+	b	.L223
+.L218:
 	ldrsb	w0, [x10, w11, sxtw]
-	b	.L221
-.L220:
+	b	.L223
+.L222:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
-.L217:
+.L219:
 	mov	w0, 85
 	str	w0, [x4, 8]
 	add	x0, x5, :lo12:.LANCHOR23
@@ -942,14 +936,14 @@ toshiba_set_rr_para:
 	bl	timer_delay_ns
 	ldrb	w0, [x8]
 	cmp	w0, 34
-	bne	.L214
+	bne	.L216
 	ldrsb	w0, [x7, x2]
-.L221:
+.L223:
 	str	w0, [x4]
 	add	x2, x2, 1
 	ldrb	w0, [x6]
 	cmp	w0, w2
-	bhi	.L217
+	bhi	.L219
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	toshiba_set_rr_para, .-toshiba_set_rr_para
@@ -970,10 +964,10 @@ hynix_set_rr_para:
 	cmp	w3, 8
 	mov	x3, 32
 	umaddl	x1, w1, w5, x3
-	beq	.L223
+	beq	.L225
 	mov	w3, 160
 	umaddl	x1, w3, w0, x1
-.L223:
+.L225:
 	ubfiz	x0, x0, 8, 8
 	mov	x3, 0
 	add	x2, x2, x0
@@ -981,14 +975,14 @@ hynix_set_rr_para:
 	add	x4, x4, x1
 	cmp	w5, w3, uxtb
 	str	w0, [x2, 2056]
-	bhi	.L230
+	bhi	.L232
 	mov	w0, 22
 	str	w0, [x2, 2056]
 	ret
-.L230:
+.L232:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
-.L226:
+.L228:
 	ldrb	w0, [x6, x3]
 	str	w0, [x2, 2052]
 	mov	w0, 120
@@ -997,7 +991,7 @@ hynix_set_rr_para:
 	str	w0, [x2, 2048]
 	add	x3, x3, 1
 	cmp	w5, w3, uxtb
-	bhi	.L226
+	bhi	.L228
 	mov	w0, 22
 	str	w0, [x2, 2056]
 	ldp	x29, x30, [sp], 16
@@ -1013,14 +1007,14 @@ hynix_reconfig_rr_para:
 	sub	w1, w1, #1
 	and	w1, w1, 255
 	cmp	w1, 7
-	bhi	.L237
+	bhi	.L239
 	adrp	x8, .LANCHOR27
 	and	w0, w0, 255
 	sxtw	x7, w0
 	ldr	x1, [x8, #:lo12:.LANCHOR27]
 	add	x1, x1, x7
 	ldrb	w1, [x1, 120]
-	cbz	w1, .L237
+	cbz	w1, .L239
 	stp	x29, x30, [sp, -16]!
 	mov	w1, 0
 	add	x29, sp, 0
@@ -1030,7 +1024,7 @@ hynix_reconfig_rr_para:
 	strb	wzr, [x0, 120]
 	ldp	x29, x30, [sp], 16
 	ret
-.L237:
+.L239:
 	ret
 	.size	hynix_reconfig_rr_para, .-hynix_reconfig_rr_para
 	.section	.text.nandc_set_ddr_para,"ax",@progbits
@@ -1048,10 +1042,10 @@ nandc_set_ddr_para:
 	lsl	w0, w0, 8
 	orr	w1, w1, w0
 	orr	w1, w1, 3
-	bne	.L241
+	bne	.L243
 	str	w1, [x2, 80]
 	ret
-.L241:
+.L243:
 	str	w1, [x2, 304]
 	ret
 	.size	nandc_set_ddr_para, .-nandc_set_ddr_para
@@ -1065,14 +1059,14 @@ nandc_get_ddr_para:
 	cmp	w0, 9
 	adrp	x0, .LANCHOR13
 	ldr	x0, [x0, #:lo12:.LANCHOR13]
-	bne	.L244
+	bne	.L246
 	ldr	w0, [x0, 80]
-.L246:
+.L248:
 	ubfx	x0, x0, 8, 8
 	ret
-.L244:
+.L246:
 	ldr	w0, [x0, 304]
-	b	.L246
+	b	.L248
 	.size	nandc_get_ddr_para, .-nandc_get_ddr_para
 	.section	.text.nandc_set_if_mode,"ax",@progbits
 	.align	2
@@ -1084,7 +1078,7 @@ nandc_set_if_mode:
 	tst	w0, 6
 	ldr	x2, [x1, #:lo12:.LANCHOR13]
 	ldr	w1, [x2]
-	beq	.L248
+	beq	.L250
 	tst	x0, 4
 	orr	w1, w1, 24576
 	adrp	x0, .LANCHOR28
@@ -1096,7 +1090,7 @@ nandc_set_if_mode:
 	cmp	w0, 9
 	mov	w0, 4099
 	movk	w0, 0x10, lsl 16
-	bne	.L250
+	bne	.L252
 	mov	w3, 8321
 	str	w3, [x2, 8]
 	str	w0, [x2, 80]
@@ -1104,10 +1098,10 @@ nandc_set_if_mode:
 	str	w0, [x2, 84]
 	mov	w0, 39
 	str	w0, [x2, 84]
-.L251:
+.L253:
 	str	w1, [x2]
 	ret
-.L250:
+.L252:
 	mov	w3, 8322
 	str	w3, [x2, 344]
 	str	w0, [x2, 304]
@@ -1115,10 +1109,10 @@ nandc_set_if_mode:
 	str	w0, [x2, 308]
 	mov	w0, 39
 	str	w0, [x2, 308]
-	b	.L251
-.L248:
+	b	.L253
+.L250:
 	and	w1, w1, -8193
-	b	.L251
+	b	.L253
 	.size	nandc_set_if_mode, .-nandc_set_if_mode
 	.section	.text.nandc_cs,"ax",@progbits
 	.align	2
@@ -1149,14 +1143,14 @@ flash_wait_device_ready_raw:
 	mov	w20, w2
 	ldrb	w0, [x0, #:lo12:.LANCHOR18]
 	cmp	w0, w21
-	bhi	.L256
+	bhi	.L258
 	adrp	x1, .LANCHOR29
 	adrp	x0, .LC0
-	mov	w2, 678
+	mov	w2, 691
 	add	x1, x1, :lo12:.LANCHOR29
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L256:
+.L258:
 	adrp	x0, .LANCHOR30
 	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w5, [x0, w21, sxtw]
@@ -1170,7 +1164,7 @@ flash_wait_device_ready_raw:
 	and	w19, w19, 255
 	add	x2, x4, x2
 	mov	w4, 120
-.L259:
+.L261:
 	str	w4, [x2, 2056]
 	mov	w0, 120
 	str	w19, [x2, 2052]
@@ -1180,10 +1174,10 @@ flash_wait_device_ready_raw:
 	ldr	w3, [x2, 2048]
 	and	w3, w3, 255
 	bics	wzr, w20, w3
-	bne	.L259
+	bne	.L261
 	cmp	w3, 255
-	beq	.L259
-	bl	nandc_de_cs.constprop.29
+	beq	.L261
+	bl	nandc_de_cs.constprop.30
 	ldr	x21, [sp, 32]
 	mov	w0, w3
 	ldp	x19, x20, [sp, 16]
@@ -1196,34 +1190,45 @@ flash_wait_device_ready_raw:
 	.type	flash_wait_device_ready, %function
 flash_wait_device_ready:
 	mov	w2, w1
-	ubfx	x6, x0, 21, 3
-	and	w1, w0, 2097151
+	adrp	x1, .LANCHOR31
+	mov	w5, 24
+	mov	w4, 1
+	ldrb	w6, [x1, #:lo12:.LANCHOR31]
 	tst	x0, 50331648
-	bne	.L263
+	sub	w5, w5, w6
+	lsl	w3, w4, w5
+	sub	w3, w3, #1
+	lsl	w4, w4, w6
+	sub	w4, w4, #1
+	asr	w5, w0, w5
+	and	w4, w4, w5
+	and	w1, w3, w0
+	and	w4, w4, 255
+	bne	.L265
 	adrp	x0, .LANCHOR0
 	adrp	x5, .LANCHOR1
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L264
+	cbz	w0, .L266
 	ldrb	w0, [x5, #:lo12:.LANCHOR1]
-	cbz	w0, .L263
-.L264:
+	cbz	w0, .L265
+.L266:
 	adrp	x0, .LANCHOR2
 	ldrh	w3, [x0, #:lo12:.LANCHOR2]
-	ldrb	w0, [x5, #:lo12:.LANCHOR1]
-	udiv	w4, w1, w3
-	mul	w4, w4, w3
-	sub	w3, w1, w4
-	cbz	w0, .L265
-	add	w1, w4, w3, lsl 1
-.L263:
-	mov	w0, w6
-	b	flash_wait_device_ready_raw
+	udiv	w0, w1, w3
+	mul	w0, w0, w3
+	sub	w3, w1, w0
+	ldrb	w1, [x5, #:lo12:.LANCHOR1]
+	cbz	w1, .L267
+	add	w1, w0, w3, lsl 1
 .L265:
+	mov	w0, w4
+	b	flash_wait_device_ready_raw
+.L267:
 	adrp	x5, .LANCHOR3
 	add	x5, x5, :lo12:.LANCHOR3
 	ldrh	w3, [x5, w3, uxtw 1]
-	add	w1, w3, w4
-	b	.L263
+	add	w1, w3, w0
+	b	.L265
 	.size	flash_wait_device_ready, .-flash_wait_device_ready
 	.section	.text.nandc_de_cs,"ax",@progbits
 	.align	2
@@ -1248,23 +1253,23 @@ nandc_wait_flash_ready_no_delay:
 	movk	w2, 0x1, lsl 16
 	adrp	x3, .LANCHOR13
 	add	x29, sp, 0
-.L275:
+.L277:
 	ldr	x0, [x3, #:lo12:.LANCHOR13]
 	ldr	w0, [x0]
 	str	w0, [x29, 24]
 	ldr	w0, [x29, 24]
-	tbnz	x0, 9, .L276
+	tbnz	x0, 9, .L278
 	mov	w0, 10
 	bl	timer_delay_ns
 	subs	w2, w2, #1
-	bne	.L275
+	bne	.L277
 	mov	w0, -1
-.L273:
+.L275:
 	ldp	x29, x30, [sp], 32
 	ret
-.L276:
+.L278:
 	mov	w0, 0
-	b	.L273
+	b	.L275
 	.size	nandc_wait_flash_ready_no_delay, .-nandc_wait_flash_ready_no_delay
 	.section	.text.zftl_flash_enter_slc_mode,"ax",@progbits
 	.align	2
@@ -1273,37 +1278,37 @@ nandc_wait_flash_ready_no_delay:
 zftl_flash_enter_slc_mode:
 	adrp	x1, .LANCHOR0
 	ldrb	w1, [x1, #:lo12:.LANCHOR0]
-	cbz	w1, .L279
+	cbz	w1, .L281
 	adrp	x2, .LANCHOR13
 	and	x0, x0, 255
 	cmp	w1, 1
 	ldr	x4, [x2, #:lo12:.LANCHOR13]
-	bne	.L282
-.L302:
-	adrp	x1, .LANCHOR31+29
-	ldrb	w1, [x1, #:lo12:.LANCHOR31+29]
-	cbz	w1, .L279
+	bne	.L284
+.L304:
+	adrp	x1, .LANCHOR32+29
+	ldrb	w1, [x1, #:lo12:.LANCHOR32+29]
+	cbz	w1, .L281
 	add	x0, x0, 8
 	add	x0, x4, x0, lsl 8
 	str	w1, [x0, 8]
 	ret
-.L282:
+.L284:
 	cmp	w1, 2
-	bne	.L284
-	adrp	x1, .LANCHOR32
-	add	x1, x1, :lo12:.LANCHOR32
+	bne	.L286
+	adrp	x1, .LANCHOR33
+	add	x1, x1, :lo12:.LANCHOR33
 	ldrb	w2, [x1, x0]
-	cbz	w2, .L279
+	cbz	w2, .L281
 	strb	wzr, [x1, x0]
-	b	.L302
-.L284:
+	b	.L304
+.L286:
 	cmp	w1, 3
-	bne	.L279
-	adrp	x1, .LANCHOR32
+	bne	.L281
+	adrp	x1, .LANCHOR33
 	sxtw	x2, w0
-	add	x1, x1, :lo12:.LANCHOR32
+	add	x1, x1, :lo12:.LANCHOR33
 	ldrb	w3, [x1, x2]
-	cbz	w3, .L279
+	cbz	w3, .L281
 	ubfiz	x0, x0, 8, 8
 	stp	x29, x30, [sp, -16]!
 	add	x4, x4, x0
@@ -1329,7 +1334,7 @@ zftl_flash_enter_slc_mode:
 	bl	timer_delay_ns
 	ldp	x29, x30, [sp], 16
 	b	nandc_wait_flash_ready_no_delay
-.L279:
+.L281:
 	ret
 	.size	zftl_flash_enter_slc_mode, .-zftl_flash_enter_slc_mode
 	.section	.text.zftl_flash_exit_slc_mode,"ax",@progbits
@@ -1339,46 +1344,46 @@ zftl_flash_enter_slc_mode:
 zftl_flash_exit_slc_mode:
 	adrp	x1, .LANCHOR0
 	ldrb	w1, [x1, #:lo12:.LANCHOR0]
-	cbz	w1, .L303
+	cbz	w1, .L305
 	adrp	x2, .LANCHOR13
 	and	x0, x0, 255
 	cmp	w1, 1
 	ldr	x4, [x2, #:lo12:.LANCHOR13]
-	bne	.L306
-	adrp	x1, .LANCHOR31+30
-	ldrb	w1, [x1, #:lo12:.LANCHOR31+30]
-.L328:
-	cbz	w1, .L303
+	bne	.L308
+	adrp	x1, .LANCHOR32+30
+	ldrb	w1, [x1, #:lo12:.LANCHOR32+30]
+.L330:
+	cbz	w1, .L305
 	add	x0, x0, 8
 	add	x0, x4, x0, lsl 8
 	str	w1, [x0, 8]
 	ret
-.L306:
+.L308:
 	cmp	w1, 2
-	bne	.L308
-	adrp	x2, .LANCHOR32
-	add	x2, x2, :lo12:.LANCHOR32
+	bne	.L310
+	adrp	x2, .LANCHOR33
+	add	x2, x2, :lo12:.LANCHOR33
 	ldrb	w1, [x2, x0]
-	cbnz	w1, .L303
-	adrp	x1, .LANCHOR31
-	add	x1, x1, :lo12:.LANCHOR31
+	cbnz	w1, .L305
+	adrp	x1, .LANCHOR32
+	add	x1, x1, :lo12:.LANCHOR32
 	mov	w5, 4
 	ldrb	w3, [x1, 12]
 	ldrb	w1, [x1, 30]
 	cmp	w3, 2
 	csel	w3, w3, w5, eq
 	strb	w3, [x2, x0]
-	b	.L328
-.L308:
+	b	.L330
+.L310:
 	cmp	w1, 3
-	bne	.L303
-	adrp	x2, .LANCHOR32
+	bne	.L305
+	adrp	x2, .LANCHOR33
 	sxtw	x5, w0
-	add	x2, x2, :lo12:.LANCHOR32
+	add	x2, x2, :lo12:.LANCHOR33
 	ldrb	w1, [x2, x5]
-	cbnz	w1, .L303
-	adrp	x3, .LANCHOR31
-	add	x3, x3, :lo12:.LANCHOR31
+	cbnz	w1, .L305
+	adrp	x3, .LANCHOR32
+	add	x3, x3, :lo12:.LANCHOR32
 	stp	x29, x30, [sp, -16]!
 	ubfiz	x0, x0, 8, 8
 	add	x4, x4, x0
@@ -1397,9 +1402,9 @@ zftl_flash_exit_slc_mode:
 	ldrb	w0, [x3, 7]
 	cmp	w0, 9
 	mov	w0, 1
-	bne	.L311
+	bne	.L313
 	str	w0, [x4, 2048]
-.L312:
+.L314:
 	str	w0, [x4, 2048]
 	mov	w0, 150
 	str	wzr, [x4, 2048]
@@ -1412,11 +1417,11 @@ zftl_flash_exit_slc_mode:
 	bl	timer_delay_ns
 	ldp	x29, x30, [sp], 16
 	b	nandc_wait_flash_ready_no_delay
-.L311:
+.L313:
 	ldrb	w1, [x2, x5]
 	str	w1, [x4, 2048]
-	b	.L312
-.L303:
+	b	.L314
+.L305:
 	ret
 	.size	zftl_flash_exit_slc_mode, .-zftl_flash_exit_slc_mode
 	.section	.text.flash_start_page_read,"ax",@progbits
@@ -1424,73 +1429,101 @@ zftl_flash_exit_slc_mode:
 	.global	flash_start_page_read
 	.type	flash_start_page_read, %function
 flash_start_page_read:
-	stp	x29, x30, [sp, -48]!
+	stp	x29, x30, [sp, -64]!
+	mov	w7, 24
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 255
-	adrp	x0, .LANCHOR18
+	adrp	x0, .LANCHOR31
 	stp	x21, x22, [sp, 32]
-	ubfx	x22, x1, 21, 3
-	and	w19, w1, 2097151
-	ldrb	w0, [x0, #:lo12:.LANCHOR18]
-	ubfx	x21, x1, 24, 2
-	cmp	w0, w22
-	bhi	.L330
-	adrp	x1, .LANCHOR33
+	mov	w19, 1
+	mov	w21, w1
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	str	x23, [sp, 48]
+	sub	w22, w7, w0
+	lsl	w19, w19, w0
+	sub	w19, w19, #1
+	lsr	w0, w1, w22
+	and	w19, w19, w0
+	adrp	x0, .LANCHOR18
+	and	w19, w19, 255
+	mov	x23, x0
+	ldrb	w1, [x0, #:lo12:.LANCHOR18]
+	cmp	w1, w19
+	bhi	.L332
+	adrp	x1, .LANCHOR34
 	adrp	x0, .LC0
-	mov	w2, 846
-	add	x1, x1, :lo12:.LANCHOR33
+	mov	w2, 866
+	add	x1, x1, :lo12:.LANCHOR34
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L330:
+.L332:
+	ldrb	w0, [x23, #:lo12:.LANCHOR18]
+	cmp	w0, w19
+	bls	.L331
 	adrp	x0, .LANCHOR30
 	add	x0, x0, :lo12:.LANCHOR30
-	ldrb	w8, [x0, w22, sxtw]
+	mov	w7, 1
+	lsl	w7, w7, w22
+	sub	w7, w7, #1
+	ldrb	w10, [x0, w19, sxtw]
 	adrp	x0, .LANCHOR13
-	ldr	x7, [x0, #:lo12:.LANCHOR13]
-	mov	w0, w8
+	and	w7, w7, w21
+	ubfx	x21, x21, 24, 2
+	ldr	x8, [x0, #:lo12:.LANCHOR13]
+	mov	w0, w10
 	bl	nandc_cs
-	cbnz	w21, .L331
-	mov	w0, w19
+	cbnz	w21, .L334
+	mov	w0, w7
 	bl	slc_phy_page_address_calc
-	mov	w19, w0
+	mov	w7, w0
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L332
-	mov	w0, w8
+	cbz	w0, .L335
+	mov	w0, w10
 	bl	zftl_flash_enter_slc_mode
-.L332:
-	ubfiz	x1, x8, 8, 8
-	and	w0, w19, 255
-	add	x1, x7, x1
+.L335:
+	ubfiz	x0, x10, 8, 8
+	ldr	x23, [sp, 48]
+	add	x0, x8, x0
+	and	w1, w7, 255
 	ldp	x21, x22, [sp, 32]
-	str	wzr, [x1, 2056]
-	str	wzr, [x1, 2052]
-	str	wzr, [x1, 2052]
-	str	w0, [x1, 2052]
-	lsr	w0, w19, 8
-	str	w0, [x1, 2052]
-	lsr	w19, w19, 16
-	str	w19, [x1, 2052]
-	str	w20, [x1, 2056]
+	str	wzr, [x0, 2056]
+	str	wzr, [x0, 2052]
+	str	wzr, [x0, 2052]
+	str	w1, [x0, 2052]
+	lsr	w1, w7, 8
+	str	w1, [x0, 2052]
+	lsr	w7, w7, 16
+	str	w7, [x0, 2052]
+	str	w20, [x0, 2056]
 	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
-	b	nandc_de_cs.constprop.29
-.L331:
+	ldp	x29, x30, [sp], 64
+	b	nandc_de_cs.constprop.30
+.L334:
 	adrp	x0, .LANCHOR16
 	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L333
-	sxtw	x0, w8
+	bne	.L336
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbnz	w0, .L336
+	sxtw	x0, w10
 	add	x0, x0, 8
-	add	x0, x7, x0, lsl 8
+	add	x0, x8, x0, lsl 8
 	str	w21, [x0, 8]
-	b	.L332
-.L333:
-	mov	w0, w8
+	b	.L335
+.L336:
+	mov	w0, w10
 	bl	zftl_flash_exit_slc_mode
-	b	.L332
+	b	.L335
+.L331:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	ret
 	.size	flash_start_page_read, .-flash_start_page_read
 	.section	.text.nandc_wait_flash_ready,"ax",@progbits
 	.align	2
@@ -1504,23 +1537,23 @@ nandc_wait_flash_ready:
 	mov	w2, 34464
 	adrp	x3, .LANCHOR13
 	movk	w2, 0x1, lsl 16
-.L340:
+.L343:
 	ldr	x0, [x3, #:lo12:.LANCHOR13]
 	ldr	w0, [x0]
 	str	w0, [x29, 24]
 	ldr	w0, [x29, 24]
-	tbnz	x0, 9, .L341
+	tbnz	x0, 9, .L344
 	mov	w0, 10
 	bl	timer_delay_ns
 	subs	w2, w2, #1
-	bne	.L340
+	bne	.L343
 	mov	w0, -1
-.L338:
+.L341:
 	ldp	x29, x30, [sp], 32
 	ret
-.L341:
+.L344:
 	mov	w0, 0
-	b	.L338
+	b	.L341
 	.size	nandc_wait_flash_ready, .-nandc_wait_flash_ready
 	.section	.text.sandisk_set_rr_para,"ax",@progbits
 	.align	2
@@ -1551,22 +1584,22 @@ sandisk_set_rr_para:
 	add	x2, x2, x1
 	add	x1, x0, x1
 	mov	x0, 0
-.L345:
+.L348:
 	cmp	w4, w0
-	bhi	.L348
+	bhi	.L351
 	ldp	x29, x30, [sp], 16
 	b	nandc_wait_flash_ready
-.L348:
+.L351:
 	cmp	w5, 67
-	bne	.L346
+	bne	.L349
 	ldrsb	w6, [x1, x0]
-.L350:
+.L353:
 	add	x0, x0, 1
 	str	w6, [x3]
-	b	.L345
-.L346:
+	b	.L348
+.L349:
 	ldrsb	w6, [x2, x0]
-	b	.L350
+	b	.L353
 	.size	sandisk_set_rr_para, .-sandisk_set_rr_para
 	.section	.text.toshiba_3d_set_tlc_rr_para,"ax",@progbits
 	.align	2
@@ -1585,8 +1618,8 @@ toshiba_3d_set_tlc_rr_para:
 	madd	x1, x2, x1, x1
 	mov	w0, -119
 	str	w0, [x4, 4]
-	adrp	x0, .LANCHOR34
-	add	x0, x0, :lo12:.LANCHOR34
+	adrp	x0, .LANCHOR36
+	add	x0, x0, :lo12:.LANCHOR36
 	add	x5, x0, x1
 	ldrsb	w0, [x0, x1]
 	str	w0, [x4]
@@ -1621,8 +1654,8 @@ toshiba_3d_set_slc_rr_para:
 	str	wzr, [x0, 4]
 	mov	w2, -117
 	str	w2, [x0, 4]
-	adrp	x2, .LANCHOR35
-	add	x2, x2, :lo12:.LANCHOR35
+	adrp	x2, .LANCHOR37
+	add	x2, x2, :lo12:.LANCHOR37
 	add	x1, x2, x1, uxtb
 	ldrsb	w1, [x1, 1]
 	str	w1, [x0]
@@ -1638,7 +1671,7 @@ toshiba_3d_set_slc_rr_para:
 toshiba_tlc_set_rr_para:
 	mov	w6, 239
 	uxtw	x1, w1
-	cbz	w2, .L355
+	cbz	w2, .L358
 	stp	x29, x30, [sp, -16]!
 	mov	x4, x0
 	mov	x2, 7
@@ -1647,8 +1680,8 @@ toshiba_tlc_set_rr_para:
 	str	w6, [x4, 8]
 	mul	x1, x1, x2
 	str	w0, [x4, 4]
-	adrp	x0, .LANCHOR36
-	add	x0, x0, :lo12:.LANCHOR36
+	adrp	x0, .LANCHOR38
+	add	x0, x0, :lo12:.LANCHOR38
 	add	x5, x0, x1
 	ldrb	w0, [x0, x1]
 	str	w0, [x4]
@@ -1670,20 +1703,20 @@ toshiba_tlc_set_rr_para:
 	str	w0, [x4]
 	str	wzr, [x4]
 	ldp	x29, x30, [sp], 16
-.L358:
+.L361:
 	b	nandc_wait_flash_ready
-.L355:
+.L358:
 	str	w6, [x0, 8]
 	mov	w2, 20
 	str	w2, [x0, 4]
-	adrp	x2, .LANCHOR37
-	add	x2, x2, :lo12:.LANCHOR37
+	adrp	x2, .LANCHOR39
+	add	x2, x2, :lo12:.LANCHOR39
 	ldrb	w1, [x2, x1]
 	str	w1, [x0]
 	str	wzr, [x0]
 	str	wzr, [x0]
 	str	wzr, [x0]
-	b	.L358
+	b	.L361
 	.size	toshiba_tlc_set_rr_para, .-toshiba_tlc_set_rr_para
 	.section	.text.flash_erase_duplane_block,"ax",@progbits
 	.align	2
@@ -1692,107 +1725,115 @@ toshiba_tlc_set_rr_para:
 flash_erase_duplane_block:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	and	w19, w0, 255
-	adrp	x0, .LANCHOR18
 	stp	x21, x22, [sp, 32]
+	and	w22, w0, 255
+	adrp	x0, .LANCHOR18
+	stp	x19, x20, [sp, 16]
+	stp	x23, x24, [sp, 48]
+	and	w24, w1, 255
 	str	x25, [sp, 64]
 	mov	w21, w2
-	ldrb	w0, [x0, #:lo12:.LANCHOR18]
+	ldrb	w1, [x0, #:lo12:.LANCHOR18]
 	mov	w20, w3
-	stp	x23, x24, [sp, 48]
-	and	w25, w1, 255
-	cmp	w0, w19
-	bhi	.L362
-	adrp	x1, .LANCHOR38
+	mov	x19, x0
+	cmp	w1, w22
+	bhi	.L365
+	adrp	x1, .LANCHOR40
 	adrp	x0, .LC0
-	mov	w2, 589
-	add	x1, x1, :lo12:.LANCHOR38
+	mov	w2, 598
+	add	x1, x1, :lo12:.LANCHOR40
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L362:
+.L365:
+	ldrb	w0, [x19, #:lo12:.LANCHOR18]
+	cmp	w0, w22
+	bls	.L372
 	adrp	x0, .LANCHOR30
 	add	x0, x0, :lo12:.LANCHOR30
-	ldrb	w22, [x0, w19, sxtw]
+	ldrb	w22, [x0, w22, sxtw]
 	adrp	x0, .LANCHOR13
-	ldr	x24, [x0, #:lo12:.LANCHOR13]
+	ldr	x25, [x0, #:lo12:.LANCHOR13]
 	adrp	x0, .LANCHOR14
 	and	x19, x22, 255
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	add	x23, x19, 8
-	add	x23, x24, x23, lsl 8
-	tbz	x0, 4, .L363
+	add	x23, x25, x23, lsl 8
+	tbz	x0, 4, .L367
 	adrp	x0, .LC32
 	mov	w3, w20
 	mov	w2, w21
 	mov	w1, w22
 	add	x0, x0, :lo12:.LC32
 	bl	printf
-.L363:
+.L367:
 	bl	nandc_wait_flash_ready
 	mov	w0, w22
 	bl	nandc_cs
 	mov	w0, w22
-	cbnz	w25, .L364
+	cbnz	w24, .L368
 	bl	zftl_flash_enter_slc_mode
-.L365:
-	add	x24, x24, x19, lsl 8
+.L369:
+	add	x25, x25, x19, lsl 8
 	mov	w0, 96
-	str	w0, [x24, 2056]
+	str	w0, [x25, 2056]
 	and	w0, w21, 255
-	str	w0, [x24, 2052]
+	str	w0, [x25, 2052]
 	lsr	w0, w21, 8
-	str	w0, [x24, 2052]
+	str	w0, [x25, 2052]
 	lsr	w0, w21, 16
-	str	w0, [x24, 2052]
-	adrp	x0, .LANCHOR39
-	ldrb	w0, [x0, #:lo12:.LANCHOR39]
-	cbnz	w0, .L368
+	str	w0, [x25, 2052]
+	adrp	x0, .LANCHOR41
+	ldrb	w0, [x0, #:lo12:.LANCHOR41]
+	cbnz	w0, .L373
 	mov	w0, 208
-	str	w0, [x24, 2056]
+	str	w0, [x25, 2056]
 	mov	w19, 5
 	bl	nandc_wait_flash_ready
 	mov	x0, x23
 	bl	flash_read_status
 	and	w5, w0, w19
-.L366:
+.L370:
 	mov	w0, 96
-	str	w0, [x24, 2056]
+	str	w0, [x25, 2056]
 	and	w0, w20, 255
-	str	w0, [x24, 2052]
+	str	w0, [x25, 2052]
 	lsr	w0, w20, 8
-	str	w0, [x24, 2052]
+	str	w0, [x25, 2052]
 	lsr	w20, w20, 16
-	str	w20, [x24, 2052]
+	str	w20, [x25, 2052]
 	mov	w0, 208
-	str	w0, [x24, 2056]
+	str	w0, [x25, 2056]
 	mov	w19, 5
 	bl	nandc_wait_flash_ready
 	mov	x0, x23
 	bl	flash_read_status
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.29
+	bl	nandc_de_cs.constprop.30
 	and	w19, w2, w19
 	orr	w19, w19, w5
-	cbz	w19, .L367
+	cbz	w19, .L371
 	adrp	x0, .LC33
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC33
 	bl	printf
-.L367:
+.L371:
 	mov	w0, w19
-	ldr	x25, [sp, 64]
+.L364:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L364:
-	bl	zftl_flash_exit_slc_mode
-	b	.L365
 .L368:
+	bl	zftl_flash_exit_slc_mode
+	b	.L369
+.L373:
 	mov	w5, 0
-	b	.L366
+	b	.L370
+.L372:
+	mov	w0, -1
+	b	.L364
 	.size	flash_erase_duplane_block, .-flash_erase_duplane_block
 	.section	.text.flash_erase_block_en,"ax",@progbits
 	.align	2
@@ -1801,88 +1842,103 @@ flash_erase_duplane_block:
 flash_erase_block_en:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	and	w23, w0, 255
-	adrp	x0, .LANCHOR18
 	stp	x21, x22, [sp, 32]
-	stp	x25, x26, [sp, 64]
-	mov	w21, w2
-	ldrb	w0, [x0, #:lo12:.LANCHOR18]
-	and	w26, w1, 255
+	and	w22, w0, 255
+	adrp	x0, .LANCHOR31
 	stp	x19, x20, [sp, 16]
-	and	w22, w2, 2097151
-	cmp	w0, w23
-	bhi	.L377
-	adrp	x1, .LANCHOR40
+	mov	w19, 24
+	stp	x23, x24, [sp, 48]
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	and	w24, w1, 255
+	stp	x25, x26, [sp, 64]
+	mov	w23, w2
+	sub	w0, w19, w0
+	mov	w19, 1
+	lsl	w19, w19, w0
+	adrp	x0, .LANCHOR18
+	sub	w19, w19, #1
+	mov	x20, x0
+	ldrb	w1, [x0, #:lo12:.LANCHOR18]
+	and	w19, w19, w2
+	cmp	w1, w22
+	bhi	.L382
+	adrp	x1, .LANCHOR42
 	adrp	x0, .LC0
-	mov	w2, 634
-	add	x1, x1, :lo12:.LANCHOR40
+	mov	w2, 645
+	add	x1, x1, :lo12:.LANCHOR42
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L377:
+.L382:
+	ldrb	w0, [x20, #:lo12:.LANCHOR18]
+	cmp	w0, w22
+	bls	.L388
 	adrp	x0, .LANCHOR30
 	add	x0, x0, :lo12:.LANCHOR30
-	ldrb	w20, [x0, w23, sxtw]
+	ldrb	w21, [x0, w22, sxtw]
 	adrp	x0, .LANCHOR13
-	ldr	x25, [x0, #:lo12:.LANCHOR13]
+	ldr	x26, [x0, #:lo12:.LANCHOR13]
 	adrp	x0, .LANCHOR14
-	and	x19, x20, 255
+	and	x20, x21, 255
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	add	x24, x19, 8
-	add	x24, x25, x24, lsl 8
-	tbz	x0, 4, .L378
+	add	x25, x20, 8
+	add	x25, x26, x25, lsl 8
+	tbz	x0, 4, .L384
 	adrp	x0, .LC34
-	mov	w3, w26
-	mov	w2, w21
-	mov	w1, w20
+	mov	w3, w24
+	mov	w2, w23
+	mov	w1, w21
 	add	x0, x0, :lo12:.LC34
 	bl	printf
-.L378:
+.L384:
 	bl	nandc_wait_flash_ready
-	mov	w0, w20
+	mov	w0, w21
 	bl	nandc_cs
-	mov	w0, w20
-	cbnz	w26, .L379
+	mov	w0, w21
+	cbnz	w24, .L385
 	bl	zftl_flash_enter_slc_mode
-.L380:
-	add	x0, x25, x19, lsl 8
+.L386:
+	add	x0, x26, x20, lsl 8
 	mov	w1, 96
 	str	w1, [x0, 2056]
-	and	w1, w21, 255
+	and	w1, w19, 255
 	str	w1, [x0, 2052]
-	lsr	w1, w22, 8
+	lsr	w1, w19, 8
 	str	w1, [x0, 2052]
-	lsr	w22, w22, 16
-	str	w22, [x0, 2052]
+	lsr	w19, w19, 16
+	str	w19, [x0, 2052]
 	mov	w1, 208
 	str	w1, [x0, 2056]
 	bl	nandc_wait_flash_ready
-	mov	x0, x24
+	mov	x0, x25
 	bl	flash_read_status
 	mov	w19, w0
-	bl	nandc_de_cs.constprop.29
+	bl	nandc_de_cs.constprop.30
 	mov	w0, 5
 	ands	w19, w19, w0
-	beq	.L381
+	beq	.L387
 	adrp	x0, .LANCHOR2
 	mov	w3, w19
-	mov	w1, w23
+	mov	w1, w22
 	ldrh	w2, [x0, #:lo12:.LANCHOR2]
 	adrp	x0, .LC35
 	add	x0, x0, :lo12:.LC35
-	udiv	w2, w21, w2
+	udiv	w2, w23, w2
 	bl	printf
-.L381:
+.L387:
 	mov	w0, w19
+.L381:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L379:
+.L385:
 	bl	zftl_flash_exit_slc_mode
-	b	.L380
+	b	.L386
+.L388:
+	mov	w0, -1
+	b	.L381
 	.size	flash_erase_block_en, .-flash_erase_block_en
 	.section	.text.flash_erase_block,"ax",@progbits
 	.align	2
@@ -1899,8 +1955,8 @@ flash_erase_block:
 	.type	flash_erase_all, %function
 flash_erase_all:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR31
-	add	x0, x0, :lo12:.LANCHOR31
+	adrp	x0, .LANCHOR32
+	add	x0, x0, :lo12:.LANCHOR32
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w19, 0
@@ -1916,10 +1972,10 @@ flash_erase_all:
 	ldrb	w1, [x0, 13]
 	mul	w20, w20, w1
 	and	w20, w20, 65535
-.L391:
+.L398:
 	ldrb	w0, [x22]
 	cmp	w0, w19
-	bhi	.L394
+	bhi	.L401
 	ldp	x19, x20, [sp, 16]
 	mov	w1, 0
 	ldp	x21, x22, [sp, 32]
@@ -1929,23 +1985,23 @@ flash_erase_all:
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	b	printf
-.L394:
+.L401:
 	add	x0, x24, :lo12:.LANCHOR30
 	mov	w21, 0
 	ldrb	w25, [x0, w19, sxtw]
-.L392:
+.L399:
 	cmp	w20, w21, uxth
-	bhi	.L393
+	bhi	.L400
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L391
-.L393:
+	b	.L398
+.L400:
 	ldrh	w1, [x23]
 	mov	w0, w25
 	mul	w1, w1, w21
 	add	w21, w21, 1
 	bl	flash_erase_block
-	b	.L392
+	b	.L399
 	.size	flash_erase_all, .-flash_erase_all
 	.section	.text.flash_start_plane_read,"ax",@progbits
 	.align	2
@@ -1953,117 +2009,131 @@ flash_erase_all:
 	.type	flash_start_plane_read, %function
 flash_start_plane_read:
 	stp	x29, x30, [sp, -48]!
+	adrp	x2, .LANCHOR31
+	mov	w3, 24
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	ubfx	x19, x0, 24, 2
+	ldrb	w20, [x2, #:lo12:.LANCHOR31]
+	mov	w2, 1
 	stp	x21, x22, [sp, 32]
-	ubfx	x22, x0, 21, 3
-	and	w21, w0, 2097151
+	ubfx	x21, x0, 24, 2
+	sub	w3, w3, w20
+	lsl	w20, w2, w20
+	sub	w20, w20, #1
+	lsl	w19, w2, w3
+	sub	w19, w19, #1
+	and	w22, w19, w0
+	lsr	w3, w0, w3
 	adrp	x0, .LANCHOR18
-	and	w20, w1, 2097151
+	and	w20, w20, w3
+	and	w20, w20, 255
+	and	w19, w19, w1
 	ldrb	w0, [x0, #:lo12:.LANCHOR18]
-	cmp	w0, w22
-	bhi	.L397
-	adrp	x1, .LANCHOR41
+	cmp	w0, w20
+	bhi	.L404
+	adrp	x1, .LANCHOR43
 	adrp	x0, .LC0
-	mov	w2, 941
-	add	x1, x1, :lo12:.LANCHOR41
+	mov	w2, 965
+	add	x1, x1, :lo12:.LANCHOR43
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L397:
+.L404:
 	adrp	x0, .LANCHOR30
 	add	x0, x0, :lo12:.LANCHOR30
-	ldrb	w7, [x0, w22, sxtw]
+	ldrb	w7, [x0, w20, sxtw]
 	adrp	x0, .LANCHOR13
 	ldr	x10, [x0, #:lo12:.LANCHOR13]
 	mov	w0, w7
 	bl	nandc_cs
 	adrp	x8, .LANCHOR16
-	cbnz	w19, .L398
-	mov	w0, w21
+	cbnz	w21, .L405
+	mov	w0, w22
 	bl	slc_phy_page_address_calc
-	mov	w21, w0
-	mov	w0, w20
+	mov	w22, w0
+	mov	w0, w19
 	bl	slc_phy_page_address_calc
-	mov	w20, w0
+	mov	w19, w0
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L399
+	cbz	w0, .L406
 	mov	w0, w7
 	bl	zftl_flash_enter_slc_mode
-.L399:
+.L406:
 	adrp	x0, .LANCHOR20
 	and	x4, x7, 255
 	add	x1, x0, :lo12:.LANCHOR20
 	add	x4, x10, x4, lsl 8
-	and	w3, w21, 255
-	and	w6, w20, 255
-	lsr	w5, w20, 8
-	lsr	w20, w20, 16
+	and	w3, w22, 255
+	and	w6, w19, 255
+	lsr	w5, w19, 8
+	lsr	w19, w19, 16
 	ldrb	w11, [x1, 8]
 	ldrb	w2, [x1, 16]
 	str	w11, [x4, 2056]
 	cmp	w2, 1
-	lsr	w2, w21, 8
-	lsr	w21, w21, 16
-	bne	.L401
+	lsr	w2, w22, 8
+	lsr	w22, w22, 16
+	bne	.L408
 	str	wzr, [x4, 2052]
 	str	wzr, [x4, 2052]
 	str	w3, [x4, 2052]
 	str	w2, [x4, 2052]
 	ldrb	w0, [x1, 9]
-	str	w21, [x4, 2052]
+	str	w22, [x4, 2052]
 	str	w0, [x4, 2056]
 	bl	nandc_wait_flash_ready
 	ldr	x0, [x8, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L402
-	cbz	w19, .L402
-	str	w19, [x4, 2056]
-.L402:
+	bne	.L409
+	cbz	w21, .L409
+	str	w21, [x4, 2056]
+.L409:
 	str	wzr, [x4, 2056]
 	str	wzr, [x4, 2052]
 	str	wzr, [x4, 2052]
-.L415:
+.L422:
 	ldp	x21, x22, [sp, 32]
 	str	w6, [x4, 2052]
 	str	w5, [x4, 2052]
 	mov	w0, 48
-	str	w20, [x4, 2052]
+	str	w19, [x4, 2052]
 	str	w0, [x4, 2056]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
-	b	nandc_de_cs.constprop.29
-.L398:
+	b	nandc_de_cs.constprop.30
+.L405:
 	ldr	x0, [x8, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L400
+	bne	.L407
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbnz	w0, .L407
 	sxtw	x0, w7
 	add	x0, x0, 8
 	add	x0, x10, x0, lsl 8
-	str	w19, [x0, 8]
-	b	.L399
-.L400:
+	str	w21, [x0, 8]
+	b	.L406
+.L407:
 	mov	w0, w7
 	bl	zftl_flash_exit_slc_mode
-	b	.L399
-.L401:
+	b	.L406
+.L408:
 	str	w3, [x4, 2052]
 	ldr	x1, [x8, #:lo12:.LANCHOR16]
 	str	w2, [x4, 2052]
-	str	w21, [x4, 2052]
+	str	w22, [x4, 2052]
 	ldrb	w1, [x1, 12]
 	cmp	w1, 3
-	bne	.L404
-	cbz	w19, .L404
-	str	w19, [x4, 2056]
-.L404:
+	bne	.L411
+	cbz	w21, .L411
+	str	w21, [x4, 2056]
+.L411:
 	add	x0, x0, :lo12:.LANCHOR20
 	ldrb	w0, [x0, 9]
 	str	w0, [x4, 2056]
-	b	.L415
+	b	.L422
 	.size	flash_start_plane_read, .-flash_start_plane_read
 	.section	.text.flash_set_interface_mode,"ax",@progbits
 	.align	2
@@ -2073,50 +2143,50 @@ flash_set_interface_mode:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR42
+	adrp	x22, .LANCHOR44
 	stp	x19, x20, [sp, 16]
 	adrp	x21, .LANCHOR14
 	stp	x23, x24, [sp, 48]
-	adrp	x20, .LANCHOR43
+	adrp	x20, .LANCHOR45
 	mov	w23, w0
-	add	x22, x22, :lo12:.LANCHOR42
-	add	x20, x20, :lo12:.LANCHOR43
+	add	x22, x22, :lo12:.LANCHOR44
+	add	x20, x20, :lo12:.LANCHOR45
 	add	x21, x21, :lo12:.LANCHOR14
 	str	x25, [sp, 64]
 	mov	x25, 0
-.L429:
+.L436:
 	adrp	x0, .LANCHOR13
 	ldr	x19, [x0, #:lo12:.LANCHOR13]
 	lsl	x0, x25, 3
 	ldrb	w24, [x0, x22]
 	cmp	w24, 69
-	beq	.L417
+	beq	.L424
 	add	w0, w24, 119
 	cmp	w24, 44
 	and	w1, w0, 255
 	cset	w2, eq
 	cmp	w1, 18
-	bhi	.L430
+	bhi	.L437
 	mov	x0, 32769
 	movk	x0, 0x4, lsl 16
 	lsr	x0, x0, x1
 	mvn	x0, x0
-.L418:
+.L425:
 	and	w0, w0, 1
 	eor	w0, w0, 1
 	orr	w0, w2, w0
-	cbz	w0, .L419
-.L417:
+	cbz	w0, .L426
+.L424:
 	ldrb	w1, [x20]
 	cmp	w23, 1
-	bne	.L420
-	tbz	x1, 0, .L419
+	bne	.L427
+	tbz	x1, 0, .L426
 	ldr	w0, [x21]
-	tbz	x0, 12, .L421
+	tbz	x0, 12, .L428
 	adrp	x0, .LC37
 	add	x0, x0, :lo12:.LC37
 	bl	printf
-.L421:
+.L428:
 	add	x0, x19, x25, lsl 8
 	mov	w1, 239
 	cmp	w24, 44
@@ -2124,19 +2194,19 @@ flash_set_interface_mode:
 	mov	w1, 137
 	ccmp	w24, w1, 4, ne
 	mov	w1, 1
-	bne	.L422
+	bne	.L429
 	str	w1, [x0, 2052]
 	mov	w1, 5
-.L452:
+.L459:
 	str	w1, [x0, 2048]
-.L427:
+.L434:
 	str	wzr, [x0, 2048]
 	str	wzr, [x0, 2048]
 	str	wzr, [x0, 2048]
-.L419:
+.L426:
 	add	x25, x25, 1
 	cmp	x25, 4
-	bne	.L429
+	bne	.L436
 	bl	nandc_wait_flash_ready
 	ldr	x25, [sp, 64]
 	mov	w0, 0
@@ -2145,51 +2215,77 @@ flash_set_interface_mode:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L430:
+.L437:
 	mov	x0, 1
-	b	.L418
-.L422:
+	b	.L425
+.L429:
 	cmp	w24, 155
-	bne	.L424
+	bne	.L431
 	str	w1, [x0, 2052]
 	mov	w1, 3
-	b	.L452
-.L424:
+	b	.L459
+.L431:
 	mov	w2, 128
 	str	w2, [x0, 2052]
-	b	.L452
-.L420:
-	tbz	x1, 2, .L419
+	b	.L459
+.L427:
+	tbz	x1, 2, .L426
 	ldr	w0, [x21]
-	tbz	x0, 12, .L425
+	tbz	x0, 12, .L432
 	adrp	x0, .LC38
 	add	x0, x0, :lo12:.LC38
 	bl	printf
-.L425:
+.L432:
 	add	x0, x19, x25, lsl 8
 	mov	w1, 239
 	cmp	w24, 44
 	str	w1, [x0, 2056]
 	mov	w1, 137
 	ccmp	w24, w1, 4, ne
-	bne	.L426
+	bne	.L433
 	mov	w1, 1
 	str	w1, [x0, 2052]
 	mov	w1, 35
-	b	.L452
-.L426:
+	b	.L459
+.L433:
 	cmp	w24, 155
-	bne	.L428
+	bne	.L435
 	mov	w1, 1
 	str	w1, [x0, 2052]
 	mov	w1, 37
-	b	.L452
-.L428:
+	b	.L459
+.L435:
 	mov	w1, 128
 	str	w1, [x0, 2052]
 	str	wzr, [x0, 2048]
-	b	.L427
+	b	.L434
 	.size	flash_set_interface_mode, .-flash_set_interface_mode
+	.section	.text.mt_auto_read_calibration_config,"ax",@progbits
+	.align	2
+	.type	mt_auto_read_calibration_config, %function
+mt_auto_read_calibration_config:
+	mov	w5, w1
+	and	w4, w0, 255
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	bl	nandc_wait_flash_ready
+	ubfiz	x4, x4, 8, 8
+	adrp	x0, .LANCHOR13
+	ldr	x2, [x0, #:lo12:.LANCHOR13]
+	mov	w0, 239
+	add	x2, x2, x4
+	str	w0, [x2, 2056]
+	mov	w0, 150
+	str	w0, [x2, 2052]
+	mov	w0, 200
+	bl	timer_delay_ns
+	str	w5, [x2, 2048]
+	str	wzr, [x2, 2048]
+	str	wzr, [x2, 2048]
+	str	wzr, [x2, 2048]
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	mt_auto_read_calibration_config, .-mt_auto_read_calibration_config
 	.section	.text.flash_reset,"ax",@progbits
 	.align	2
 	.global	flash_reset
@@ -2242,12 +2338,12 @@ flash_read_id:
 	strb	w0, [x8, 6]
 	ldr	w0, [x2, 2048]
 	strb	w0, [x8, 7]
-	bl	nandc_de_cs.constprop.29
+	bl	nandc_de_cs.constprop.30
 	ldrb	w2, [x8]
 	sub	w0, w2, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bhi	.L454
+	bhi	.L463
 	ldrb	w7, [x8, 5]
 	add	w1, w10, 1
 	ldrb	w6, [x8, 4]
@@ -2258,7 +2354,7 @@ flash_read_id:
 	ldrb	w3, [x8, 1]
 	ldp	x29, x30, [sp], 16
 	b	printf
-.L454:
+.L463:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	flash_read_id, .-flash_read_id
@@ -2269,10 +2365,10 @@ flash_read_id:
 flash_read_spare:
 	stp	x29, x30, [sp, -16]!
 	mov	x5, x2
-	adrp	x2, .LANCHOR31+9
+	adrp	x2, .LANCHOR32+9
 	ubfiz	x0, x0, 8, 8
 	add	x29, sp, 0
-	ldrb	w3, [x2, #:lo12:.LANCHOR31+9]
+	ldrb	w3, [x2, #:lo12:.LANCHOR32+9]
 	adrp	x2, .LANCHOR13
 	ldr	x4, [x2, #:lo12:.LANCHOR13]
 	lsl	w3, w3, 9
@@ -2349,12 +2445,12 @@ flash_read_otp_data:
 	str	w0, [x19, 2056]
 	bl	nandc_wait_flash_ready
 	mov	x0, 0
-.L460:
+.L469:
 	ldr	w1, [x19, 2048]
 	strb	w1, [x21, x0]
 	add	x0, x0, 1
 	cmp	x0, 16384
-	bne	.L460
+	bne	.L469
 	mov	w0, 239
 	str	w0, [x19, 2056]
 	mov	w0, 144
@@ -2368,7 +2464,7 @@ flash_read_otp_data:
 	str	wzr, [x19, 2048]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
-	b	nandc_de_cs.constprop.29
+	b	nandc_de_cs.constprop.30
 	.size	flash_read_otp_data, .-flash_read_otp_data
 	.section	.text.sandisk_prog_test_bad_block,"ax",@progbits
 	.align	2
@@ -2381,14 +2477,14 @@ sandisk_prog_test_bad_block:
 	and	x2, x0, 255
 	add	x29, sp, 0
 	ldr	x4, [x1, #:lo12:.LANCHOR13]
-	adrp	x1, .LANCHOR31+29
+	adrp	x1, .LANCHOR32+29
 	str	x19, [sp, 16]
 	mov	x0, x2
-	ldrb	w1, [x1, #:lo12:.LANCHOR31+29]
+	ldrb	w1, [x1, #:lo12:.LANCHOR32+29]
 	add	x2, x2, 8
 	add	x2, x4, x2, lsl 8
-	cbz	w1, .L464
-.L474:
+	cbz	w1, .L473
+.L483:
 	ubfiz	x0, x0, 8, 8
 	str	w1, [x2, 8]
 	add	x4, x4, x0
@@ -2412,22 +2508,22 @@ sandisk_prog_test_bad_block:
 	ldr	w2, [x4, 2048]
 	mov	w0, 5
 	ands	w19, w2, w0
-	beq	.L463
+	beq	.L472
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L463
+	tbz	x0, 12, .L472
 	adrp	x0, .LC41
 	mov	w1, w5
 	add	x0, x0, :lo12:.LC41
 	bl	printf
-.L463:
+.L472:
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L464:
+.L473:
 	mov	w1, 162
-	b	.L474
+	b	.L483
 	.size	sandisk_prog_test_bad_block, .-sandisk_prog_test_bad_block
 	.section	.text.nandc_rdy_status,"ax",@progbits
 	.align	2
@@ -2449,56 +2545,89 @@ nandc_rdy_status:
 	.global	nandc_bch_sel
 	.type	nandc_bch_sel, %function
 nandc_bch_sel:
-	adrp	x2, .LANCHOR44
-	mov	w1, 1
-	strb	w0, [x2, #:lo12:.LANCHOR44]
-	adrp	x2, .LANCHOR28
-	ldrb	w2, [x2, #:lo12:.LANCHOR28]
-	cmp	w2, 9
-	adrp	x2, .LANCHOR13
-	ldr	x2, [x2, #:lo12:.LANCHOR13]
-	bne	.L478
-	str	w1, [x2, 16]
+	sub	sp, sp, #16
+	str	wzr, [sp, 8]
+	ldr	w1, [sp, 8]
+	orr	w1, w1, 1
+	str	w1, [sp, 8]
+	adrp	x1, .LANCHOR46
+	strb	w0, [x1, #:lo12:.LANCHOR46]
+	adrp	x1, .LANCHOR28
+	ldrb	w1, [x1, #:lo12:.LANCHOR28]
+	cmp	w1, 9
+	adrp	x1, .LANCHOR13
+	bne	.L487
+	ldr	x1, [x1, #:lo12:.LANCHOR13]
 	cmp	w0, 70
-	beq	.L485
+	ldr	w2, [sp, 8]
+	str	w2, [x1, 16]
+	beq	.L493
 	cmp	w0, 60
-	beq	.L486
+	beq	.L494
 	cmp	w0, 40
-	cset	w1, eq
-	add	w1, w1, 1
-.L479:
-	lsl	w1, w1, 25
-	orr	w1, w1, 1
-	str	w1, [x2, 32]
-	ret
-.L485:
-	mov	w1, 0
-	b	.L479
+	cset	w0, eq
+	add	w0, w0, 1
+.L488:
+	str	wzr, [sp]
+	ldr	w2, [sp]
+	bfi	w2, w0, 25, 3
+	str	w2, [sp]
+	ldr	w0, [sp]
+	orr	w0, w0, 1
+	str	w0, [sp]
+	ldr	w0, [sp]
+	str	w0, [x1, 32]
 .L486:
-	mov	w1, 3
-	b	.L479
-.L478:
-	str	w1, [x2, 8]
-	cmp	w0, 16
-	mov	w1, 4096
-	bne	.L481
-.L484:
-	and	w1, w1, -17
-.L482:
-	orr	w1, w1, 1
-	str	w1, [x2, 12]
+	add	sp, sp, 16
 	ret
-.L481:
+.L493:
+	mov	w0, 0
+	b	.L488
+.L494:
+	mov	w0, 3
+	b	.L488
+.L487:
+	ldr	x2, [x1, #:lo12:.LANCHOR13]
+	mov	w3, 16
+	ldr	w1, [sp, 8]
+	cmp	w0, w3
+	str	w1, [x2, 8]
+	str	wzr, [sp]
+	ldr	w1, [sp]
+	bfi	w1, w3, 8, 8
+	str	w1, [sp]
+	ldr	w1, [sp]
+	and	w1, w1, -262145
+	str	w1, [sp]
+	bne	.L490
+.L497:
+	ldr	w0, [sp]
+	and	w0, w0, -17
+	b	.L498
+.L490:
 	cmp	w0, 24
-	bne	.L483
-	orr	w1, w1, 16
-	b	.L482
-.L483:
-	orr	w1, w1, 262144
+	bne	.L492
+	ldr	w0, [sp]
+	orr	w0, w0, 16
+.L498:
+	str	w0, [sp]
+	b	.L491
+.L492:
+	ldr	w1, [sp]
 	cmp	w0, 40
+	orr	w1, w1, 262144
+	str	w1, [sp]
+	ldr	w1, [sp]
 	orr	w1, w1, 16
-	bne	.L482
-	b	.L484
+	str	w1, [sp]
+	beq	.L497
+.L491:
+	ldr	w0, [sp]
+	orr	w0, w0, 1
+	str	w0, [sp]
+	ldr	w0, [sp]
+	str	w0, [x2, 12]
+	b	.L486
 	.size	nandc_bch_sel, .-nandc_bch_sel
 	.section	.text.zftl_nandc_get_irq_status,"ax",@progbits
 	.align	2
@@ -2508,10 +2637,10 @@ zftl_nandc_get_irq_status:
 	adrp	x1, .LANCHOR28
 	ldrb	w1, [x1, #:lo12:.LANCHOR28]
 	cmp	w1, 9
-	bne	.L492
+	bne	.L500
 	ldr	w0, [x0, 296]
 	ret
-.L492:
+.L500:
 	ldr	w0, [x0, 372]
 	ret
 	.size	zftl_nandc_get_irq_status, .-zftl_nandc_get_irq_status
@@ -2541,154 +2670,242 @@ rk_nandc_flash_xfer_completed:
 	.global	nandc_xfer_start
 	.type	nandc_xfer_start, %function
 nandc_xfer_start:
-	stp	x29, x30, [sp, -64]!
+	stp	x29, x30, [sp, -80]!
 	and	w1, w1, 255
-	adrp	x4, .LANCHOR47
+	adrp	x4, .LANCHOR49
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	and	w23, w0, 255
-	adrp	x0, .LANCHOR28
 	stp	x19, x20, [sp, 16]
-	stp	x21, x22, [sp, 32]
-	add	w20, w1, 1
+	and	w20, w0, 255
+	adrp	x0, .LANCHOR28
+	str	x21, [sp, 32]
+	and	w6, w20, 1
+	adrp	x21, .LANCHOR13
 	ldrb	w0, [x0, #:lo12:.LANCHOR28]
-	adrp	x24, .LANCHOR13
 	cmp	w0, 9
-	bne	.L498
-	ubfiz	w19, w23, 1, 1
-	mov	w0, 1
-	orr	w19, w19, 8
-	asr	w20, w20, 1
-	bfi	w19, w0, 5, 2
-	adrp	x0, .LANCHOR45
-	orr	w19, w19, 536870912
-	orr	w19, w19, 1024
-	ldrb	w0, [x0, #:lo12:.LANCHOR45]
-	and	w19, w19, -17
-	bfi	w19, w20, 22, 6
-	orr	w19, w19, 128
-	cbz	w0, .L499
-	adrp	x0, .LANCHOR46
-	ldrb	w1, [x0, #:lo12:.LANCHOR46]
-	orr	w0, w19, 512
-	cmp	w1, 0
-	csel	w19, w0, w19, ne
-.L499:
-	add	x21, x4, :lo12:.LANCHOR47
+	add	w0, w1, 1
+	bne	.L506
+	str	wzr, [x29, 56]
+	mov	w5, 1
+	ubfx	x0, x0, 1, 6
+	ldr	w1, [x29, 56]
+	bfi	w1, w6, 1, 1
+	str	w1, [x29, 56]
+	ldr	w1, [x29, 56]
+	orr	w1, w1, 8
+	str	w1, [x29, 56]
+	ldr	w1, [x29, 56]
+	bfi	w1, w5, 5, 2
+	str	w1, [x29, 56]
+	ldr	w1, [x29, 56]
+	orr	w1, w1, 536870912
+	str	w1, [x29, 56]
+	ldr	w1, [x29, 56]
+	orr	w1, w1, 1024
+	str	w1, [x29, 56]
+	ldr	w1, [x29, 56]
+	and	w1, w1, -17
+	str	w1, [x29, 56]
+	ldr	w1, [x29, 56]
+	bfi	w1, w0, 22, 6
+	str	w1, [x29, 56]
+	ldr	w0, [x29, 56]
+	orr	w0, w0, 128
+	str	w0, [x29, 56]
+	adrp	x0, .LANCHOR47
+	ldrb	w0, [x0, #:lo12:.LANCHOR47]
+	cbz	w0, .L507
+	adrp	x0, .LANCHOR48
+	ldrb	w0, [x0, #:lo12:.LANCHOR48]
+	cbz	w0, .L507
+	ldr	w0, [x29, 56]
+	orr	w0, w0, 512
+	str	w0, [x29, 56]
+.L507:
+	ldr	w0, [x29, 56]
+	add	x19, x4, :lo12:.LANCHOR49
 	add	x1, x2, 63
 	and	x1, x1, -64
-	ubfiz	x20, x20, 10, 6
+	ubfx	x0, x0, 22, 6
+	stp	x2, x3, [x19, 8]
+	ubfiz	x0, x0, 10, 6
+	stp	w2, w3, [x19, 24]
+	add	x1, x1, x0
 	and	x0, x2, -64
-	add	x1, x1, x20
-	stp	x2, x3, [x21, 8]
-	stp	w2, w3, [x21, 24]
 	bl	flush_dcache_range
-	ldr	x0, [x21, 16]
+	ldr	x0, [x19, 16]
 	add	x1, x0, 63
 	and	x0, x0, -64
 	and	x1, x1, -64
 	add	x1, x1, 64
 	bl	flush_dcache_range
-	ldr	x1, [x24, #:lo12:.LANCHOR13]
 	mov	w0, 1
-	str	w0, [x21, 32]
+	str	w0, [x19, 32]
+	ldr	x0, [x21, #:lo12:.LANCHOR13]
 	mov	w2, 16
-	ldr	w0, [x21, 24]
-	cmp	w23, 0
-	str	w0, [x1, 52]
-	ldr	w0, [x21, 28]
-	str	w0, [x1, 56]
-	ldr	w0, [x1, 48]
-	bfi	w0, w2, 9, 5
+	ldr	w1, [x19, 24]
+	cmp	w20, 0
+	str	w1, [x0, 52]
+	ldr	w1, [x19, 28]
+	str	w1, [x0, 56]
+	ldr	w1, [x0, 48]
+	str	w1, [x29, 64]
+	ldr	w1, [x29, 64]
+	bfi	w1, w2, 9, 5
+	str	w1, [x29, 64]
 	mov	w2, 2
-	orr	w0, w0, 448
-	bfi	w0, w2, 3, 3
+	ldr	w1, [x29, 64]
+	orr	w1, w1, 448
+	str	w1, [x29, 64]
+	ldr	w1, [x29, 64]
+	bfi	w1, w2, 3, 3
+	str	w1, [x29, 64]
 	cset	w2, eq
-	orr	w0, w0, 4
-	bfi	w0, w2, 1, 1
-	adrp	x2, .LANCHOR48
-	orr	w0, w0, 1
-	ldrh	w2, [x2, #:lo12:.LANCHOR48]
-	bfi	w0, w2, 16, 11
-	str	w0, [x1, 48]
-	str	w19, [x1, 16]
-	orr	w19, w19, 4
-	str	w19, [x1, 16]
-.L497:
+	ldr	w1, [x29, 64]
+	orr	w1, w1, 4
+	str	w1, [x29, 64]
+	ldr	w1, [x29, 64]
+	bfi	w1, w2, 1, 1
+	str	w1, [x29, 64]
+	ldr	w1, [x29, 64]
+	orr	w1, w1, 1
+	str	w1, [x29, 64]
+	adrp	x1, .LANCHOR50
+	ldrh	w2, [x1, #:lo12:.LANCHOR50]
+	ldr	w1, [x29, 64]
+	bfi	w1, w2, 16, 11
+	str	w1, [x29, 64]
+	ldr	w1, [x29, 64]
+	str	w1, [x0, 48]
+	ldr	w1, [x29, 56]
+	str	w1, [x0, 16]
+	ldr	w1, [x29, 56]
+	orr	w1, w1, 4
+	str	w1, [x29, 56]
+	ldr	w1, [x29, 56]
+	str	w1, [x0, 16]
+.L505:
 	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 64
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 80
 	ret
-.L498:
-	ldr	x0, [x24, #:lo12:.LANCHOR13]
-	ubfiz	w19, w23, 1, 1
-	orr	w19, w19, 8
-	asr	w20, w20, 1
-	ldr	w22, [x0, 12]
-	mov	w0, 16
-	bfi	w22, w0, 8, 8
-	mov	w0, 1
-	bfi	w19, w0, 5, 2
-	and	w22, w22, -9
-	orr	w19, w19, 536870912
-	and	w22, w22, -225
-	orr	w19, w19, 1024
-	and	w19, w19, -17
-	bfi	w19, w20, 22, 6
-	cbz	w23, .L501
-	adrp	x0, .LANCHOR44
+.L506:
+	ldr	x5, [x21, #:lo12:.LANCHOR13]
+	mov	w7, 16
+	ubfx	x0, x0, 1, 6
+	ldr	w5, [x5, 12]
+	str	w5, [x29, 72]
+	ldr	w5, [x29, 72]
+	bfi	w5, w7, 8, 8
+	str	w5, [x29, 72]
+	ldr	w5, [x29, 72]
+	and	w5, w5, -9
+	str	w5, [x29, 72]
+	ldr	w5, [x29, 72]
+	and	w5, w5, -225
+	str	w5, [x29, 72]
+	str	wzr, [x29, 56]
+	ldr	w5, [x29, 56]
+	bfi	w5, w6, 1, 1
+	str	w5, [x29, 56]
+	mov	w6, 1
+	ldr	w5, [x29, 56]
+	orr	w5, w5, 8
+	str	w5, [x29, 56]
+	ldr	w5, [x29, 56]
+	bfi	w5, w6, 5, 2
+	str	w5, [x29, 56]
+	ldr	w5, [x29, 56]
+	orr	w5, w5, 536870912
+	str	w5, [x29, 56]
+	ldr	w5, [x29, 56]
+	orr	w5, w5, 1024
+	str	w5, [x29, 56]
+	ldr	w5, [x29, 56]
+	and	w5, w5, -17
+	str	w5, [x29, 56]
+	ldr	w5, [x29, 56]
+	bfi	w5, w0, 22, 6
+	str	w5, [x29, 56]
+	cbz	w20, .L509
+	adrp	x0, .LANCHOR46
 	ubfx	x1, x1, 1, 7
-	ldr	x8, [x4, #:lo12:.LANCHOR47]
+	ldr	x8, [x4, #:lo12:.LANCHOR49]
 	add	x1, x3, x1, lsl 2
-	ldrb	w0, [x0, #:lo12:.LANCHOR44]
-	mov	w5, 128
-	cmp	w0, 24
-	mov	w0, 64
-	csel	w5, w5, w0, hi
+	ldrb	w0, [x0, #:lo12:.LANCHOR46]
+	mov	w5, 64
+	cmp	w0, 25
+	mov	w0, 128
+	csel	w5, w5, w0, cc
 	mov	w0, 0
-.L503:
+.L511:
 	add	w7, w5, w0
 	cmp	x3, x1
-	bne	.L504
-.L505:
-	add	x21, x4, :lo12:.LANCHOR47
-	ldr	x0, [x4, #:lo12:.LANCHOR47]
-	and	w20, w20, 63
-	ubfiz	x1, x20, 10, 6
-	ubfiz	x20, x20, 7, 6
-	stp	x2, x0, [x21, 8]
-	stp	w2, w0, [x21, 24]
-	add	x0, x2, 63
-	and	x0, x0, -64
-	add	x1, x0, x1
+	bne	.L512
+.L513:
+	add	x19, x4, :lo12:.LANCHOR49
+	ldr	x0, [x4, #:lo12:.LANCHOR49]
+	add	x1, x2, 63
+	and	x1, x1, -64
+	stp	x2, x0, [x19, 8]
+	stp	w2, w0, [x19, 24]
+	ldr	w0, [x29, 56]
+	ubfx	x0, x0, 22, 6
+	ubfiz	x0, x0, 10, 6
+	add	x1, x1, x0
 	and	x0, x2, -64
 	bl	flush_dcache_range
-	ldr	x0, [x21, 16]
-	add	x1, x0, 63
+	ldr	x0, [x19, 16]
+	ldr	w1, [x29, 56]
+	add	x2, x0, 63
 	and	x0, x0, -64
-	and	x1, x1, -64
-	add	x1, x1, x20
+	and	x2, x2, -64
+	ubfx	x1, x1, 22, 6
+	ubfiz	x1, x1, 7, 6
+	add	x1, x2, x1
 	bl	flush_dcache_range
-	ldr	x1, [x24, #:lo12:.LANCHOR13]
 	mov	w0, 1
-	str	w0, [x21, 32]
-	cmp	w23, 0
-	ldr	w0, [x21, 24]
+	str	w0, [x19, 32]
+	ldr	x0, [x21, #:lo12:.LANCHOR13]
+	mov	w2, 16
+	ldr	w1, [x19, 24]
+	cmp	w20, 0
+	str	w1, [x0, 20]
+	ldr	w1, [x19, 28]
+	str	w1, [x0, 24]
+	str	wzr, [x29, 64]
+	ldr	w1, [x29, 64]
+	bfi	w1, w2, 9, 5
+	str	w1, [x29, 64]
+	mov	w2, 2
+	ldr	w1, [x29, 64]
+	orr	w1, w1, 448
+	str	w1, [x29, 64]
+	ldr	w1, [x29, 64]
+	bfi	w1, w2, 3, 3
+	str	w1, [x29, 64]
 	cset	w2, eq
-	str	w0, [x1, 20]
-	ldr	w0, [x21, 28]
-	str	w0, [x1, 24]
-	mov	w0, 8660
-	bfi	w0, w2, 1, 1
-	orr	w0, w0, 1
-	str	w0, [x1, 16]
-	str	w22, [x1, 12]
-	str	w19, [x1, 8]
-	orr	w19, w19, 4
-	str	w19, [x1, 8]
-	b	.L497
-.L504:
+	ldr	w1, [x29, 64]
+	orr	w1, w1, 4
+	str	w1, [x29, 64]
+	ldr	w1, [x29, 64]
+	bfi	w1, w2, 1, 1
+	str	w1, [x29, 64]
+	ldr	w1, [x29, 64]
+	orr	w1, w1, 1
+	str	w1, [x29, 64]
+	ldr	w1, [x29, 64]
+	str	w1, [x0, 16]
+	ldr	w1, [x29, 72]
+	str	w1, [x0, 12]
+	ldr	w1, [x29, 56]
+	str	w1, [x0, 8]
+	ldr	w1, [x29, 56]
+	orr	w1, w1, 4
+	str	w1, [x29, 56]
+	ldr	w1, [x29, 56]
+	str	w1, [x0, 8]
+	b	.L505
+.L512:
 	ldrh	w10, [x3]
 	and	x0, x0, 4294967292
 	ldrh	w6, [x3, 2]
@@ -2696,11 +2913,11 @@ nandc_xfer_start:
 	orr	x6, x10, x6, lsl 16
 	str	w6, [x8, x0]
 	mov	w0, w7
-	b	.L503
-.L501:
-	ldr	x1, [x4, #:lo12:.LANCHOR47]
-	str	w0, [x1]
-	b	.L505
+	b	.L511
+.L509:
+	ldr	x0, [x4, #:lo12:.LANCHOR49]
+	str	w6, [x0]
+	b	.L513
 	.size	nandc_xfer_start, .-nandc_xfer_start
 	.section	.text.nandc_set_seed,"ax",@progbits
 	.align	2
@@ -2708,11 +2925,11 @@ nandc_xfer_start:
 	.type	nandc_set_seed, %function
 nandc_set_seed:
 	and	x0, x0, 127
-	adrp	x1, .LANCHOR49
-	add	x1, x1, :lo12:.LANCHOR49
+	adrp	x1, .LANCHOR51
+	add	x1, x1, :lo12:.LANCHOR51
 	ldrh	w0, [x1, x0, lsl 1]
-	adrp	x1, .LANCHOR46
-	ldrb	w2, [x1, #:lo12:.LANCHOR46]
+	adrp	x1, .LANCHOR48
+	ldrb	w2, [x1, #:lo12:.LANCHOR48]
 	orr	w1, w0, -1073741824
 	cmp	w2, 0
 	csel	w0, w1, w0, ne
@@ -2721,10 +2938,10 @@ nandc_set_seed:
 	cmp	w1, 9
 	adrp	x1, .LANCHOR13
 	ldr	x1, [x1, #:lo12:.LANCHOR13]
-	bne	.L515
+	bne	.L524
 	str	w0, [x1, 520]
 	ret
-.L515:
+.L524:
 	str	w0, [x1, 336]
 	ret
 	.size	nandc_set_seed, .-nandc_set_seed
@@ -2739,35 +2956,40 @@ zftl_flash_de_init:
 	bl	nandc_wait_flash_ready
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L520
+	cbz	w0, .L529
 	adrp	x0, .LANCHOR19
 	ldrb	w0, [x0, #:lo12:.LANCHOR19]
-	cbnz	w0, .L520
+	cbnz	w0, .L529
+	adrp	x0, .LANCHOR28
+	ldrb	w0, [x0, #:lo12:.LANCHOR28]
+	cmp	w0, 9
+	beq	.L529
+	mov	w0, 0
 	bl	zftl_flash_exit_slc_mode
-.L520:
+.L529:
 	adrp	x19, .LANCHOR21
 	mov	w0, 0
 	bl	hynix_reconfig_rr_para
 	ldrb	w0, [x19, #:lo12:.LANCHOR21]
-	cbz	w0, .L521
-	adrp	x0, .LANCHOR43
-	ldrb	w0, [x0, #:lo12:.LANCHOR43]
-	tbz	x0, 0, .L521
+	cbz	w0, .L530
+	adrp	x0, .LANCHOR45
+	ldrb	w0, [x0, #:lo12:.LANCHOR45]
+	tbz	x0, 0, .L530
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
 	bl	nandc_set_if_mode
 	strb	wzr, [x19, #:lo12:.LANCHOR21]
-.L521:
-	adrp	x3, .LANCHOR46
-	ldrb	w0, [x3, #:lo12:.LANCHOR46]
-	cbz	w0, .L522
+.L530:
+	adrp	x3, .LANCHOR48
+	ldrb	w0, [x3, #:lo12:.LANCHOR48]
+	cbz	w0, .L531
 	mov	w0, 0
-	strb	wzr, [x3, #:lo12:.LANCHOR46]
+	strb	wzr, [x3, #:lo12:.LANCHOR48]
 	bl	nandc_set_seed
 	mov	w0, 1
-	strb	w0, [x3, #:lo12:.LANCHOR46]
-.L522:
+	strb	w0, [x3, #:lo12:.LANCHOR48]
+.L531:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -2778,8 +3000,8 @@ zftl_flash_de_init:
 	.global	nandc_randomizer_enable
 	.type	nandc_randomizer_enable, %function
 nandc_randomizer_enable:
-	adrp	x1, .LANCHOR46
-	strb	w0, [x1, #:lo12:.LANCHOR46]
+	adrp	x1, .LANCHOR48
+	strb	w0, [x1, #:lo12:.LANCHOR48]
 	ret
 	.size	nandc_randomizer_enable, .-nandc_randomizer_enable
 	.section	.text.nandc_get_chip_if,"ax",@progbits
@@ -2799,10 +3021,10 @@ nandc_get_chip_if:
 	.global	buf_reinit
 	.type	buf_reinit, %function
 buf_reinit:
-	adrp	x0, .LANCHOR50
-	add	x1, x0, :lo12:.LANCHOR50
+	adrp	x0, .LANCHOR52
+	add	x1, x0, :lo12:.LANCHOR52
 	mov	w2, 0
-.L539:
+.L551:
 	and	w3, w2, 255
 	strb	wzr, [x1, 2]
 	add	w4, w3, 1
@@ -2812,14 +3034,14 @@ buf_reinit:
 	str	xzr, [x1, 16]
 	cmp	w2, 32
 	add	x1, x1, 64
-	bne	.L539
-	add	x0, x0, :lo12:.LANCHOR50
+	bne	.L551
+	add	x0, x0, :lo12:.LANCHOR52
 	mov	w1, -1
 	strb	w1, [x0, 1984]
-	adrp	x0, .LANCHOR51
-	strb	wzr, [x0, #:lo12:.LANCHOR51]
-	adrp	x0, .LANCHOR52
-	strb	w2, [x0, #:lo12:.LANCHOR52]
+	adrp	x0, .LANCHOR53
+	strb	wzr, [x0, #:lo12:.LANCHOR53]
+	adrp	x0, .LANCHOR54
+	strb	w2, [x0, #:lo12:.LANCHOR54]
 	ret
 	.size	buf_reinit, .-buf_reinit
 	.section	.text.buf_add_tail,"ax",@progbits
@@ -2837,49 +3059,49 @@ buf_add_tail:
 	mov	x20, x1
 	ldrb	w1, [x19]
 	cmp	w1, 255
-	bne	.L547
+	bne	.L559
 	ldrb	w0, [x20, 1]
 	cmp	w0, 255
-	bne	.L543
-	adrp	x1, .LANCHOR53
+	bne	.L555
+	adrp	x1, .LANCHOR55
 	adrp	x0, .LC0
 	mov	w2, 74
-	add	x1, x1, :lo12:.LANCHOR53
+	add	x1, x1, :lo12:.LANCHOR55
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L543:
+.L555:
 	ldrb	w0, [x20, 1]
 	strb	w0, [x19]
-.L541:
+.L553:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L547:
-	adrp	x0, .LANCHOR50
-	add	x2, x0, :lo12:.LANCHOR50
+.L559:
+	adrp	x0, .LANCHOR52
+	add	x2, x0, :lo12:.LANCHOR52
 	mov	x19, x0
-.L548:
+.L560:
 	sbfiz	x0, x1, 6, 32
 	mov	w21, w1
 	ldrb	w1, [x2, x0]
 	cmp	w1, 255
-	bne	.L548
+	bne	.L560
 	ldrb	w0, [x20, 1]
 	cmp	w0, 255
-	bne	.L545
-	adrp	x1, .LANCHOR53
+	bne	.L557
+	adrp	x1, .LANCHOR55
 	adrp	x0, .LC0
 	mov	w2, 81
-	add	x1, x1, :lo12:.LANCHOR53
+	add	x1, x1, :lo12:.LANCHOR55
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L545:
-	add	x0, x19, :lo12:.LANCHOR50
+.L557:
+	add	x0, x19, :lo12:.LANCHOR52
 	sbfiz	x21, x21, 6, 32
 	ldrb	w1, [x20, 1]
 	strb	w1, [x0, x21]
-	b	.L541
+	b	.L553
 	.size	buf_add_tail, .-buf_add_tail
 	.section	.text.queue_read_cmd,"ax",@progbits
 	.align	2
@@ -2898,47 +3120,47 @@ queue_read_cmd:
 	mov	w0, -1
 	strb	w0, [x19]
 	mov	x1, x19
-	adrp	x0, .LANCHOR54
+	adrp	x0, .LANCHOR56
 	ldr	x19, [sp, 16]
-	add	x0, x0, :lo12:.LANCHOR54
+	add	x0, x0, :lo12:.LANCHOR56
 	ldp	x29, x30, [sp], 32
 	b	buf_add_tail
 	.size	queue_read_cmd, .-queue_read_cmd
-	.section	.text.buf_free,"ax",@progbits
+	.section	.text.zbuf_free,"ax",@progbits
 	.align	2
-	.global	buf_free
-	.type	buf_free, %function
-buf_free:
+	.global	zbuf_free
+	.type	zbuf_free, %function
+zbuf_free:
 	ldrb	w1, [x0, 2]
-	adrp	x2, .LANCHOR51
+	adrp	x2, .LANCHOR53
 	and	w1, w1, 8
 	strb	w1, [x0, 2]
-	cbz	w1, .L553
+	cbz	w1, .L565
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L553
+	beq	.L565
 	stp	x29, x30, [sp, -16]!
 	mov	x1, x0
-	add	x0, x2, :lo12:.LANCHOR51
+	add	x0, x2, :lo12:.LANCHOR53
 	add	x29, sp, 0
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR52
+	adrp	x1, .LANCHOR54
 	ldp	x29, x30, [sp], 16
-	ldrb	w0, [x1, #:lo12:.LANCHOR52]
+	ldrb	w0, [x1, #:lo12:.LANCHOR54]
 	add	w0, w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR52]
+	strb	w0, [x1, #:lo12:.LANCHOR54]
 	ret
-.L553:
-	ldrb	w1, [x2, #:lo12:.LANCHOR51]
+.L565:
+	ldrb	w1, [x2, #:lo12:.LANCHOR53]
 	strb	w1, [x0]
-	adrp	x1, .LANCHOR52
+	adrp	x1, .LANCHOR54
 	ldrb	w0, [x0, 1]
-	strb	w0, [x2, #:lo12:.LANCHOR51]
-	ldrb	w0, [x1, #:lo12:.LANCHOR52]
+	strb	w0, [x2, #:lo12:.LANCHOR53]
+	ldrb	w0, [x1, #:lo12:.LANCHOR54]
 	add	w0, w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR52]
+	strb	w0, [x1, #:lo12:.LANCHOR54]
 	ret
-	.size	buf_free, .-buf_free
+	.size	zbuf_free, .-zbuf_free
 	.section	.text.buf_alloc,"ax",@progbits
 	.align	2
 	.global	buf_alloc
@@ -2947,29 +3169,29 @@ buf_alloc:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR52
+	adrp	x19, .LANCHOR54
 	and	w20, w0, 255
-	ldrb	w0, [x19, #:lo12:.LANCHOR52]
-	cbz	w0, .L566
-.L569:
-	adrp	x2, .LANCHOR51
-	adrp	x1, .LANCHOR50
-	add	x0, x1, :lo12:.LANCHOR50
-	ldrb	w3, [x2, #:lo12:.LANCHOR51]
+	ldrb	w0, [x19, #:lo12:.LANCHOR54]
+	cbz	w0, .L578
+.L581:
+	adrp	x2, .LANCHOR53
+	adrp	x1, .LANCHOR52
+	add	x0, x1, :lo12:.LANCHOR52
+	ldrb	w3, [x2, #:lo12:.LANCHOR53]
 	ubfiz	x4, x3, 6, 8
 	add	x0, x0, x4
 	mov	x4, x2
-	cbz	w20, .L567
-.L568:
-	add	x1, x1, :lo12:.LANCHOR50
+	cbz	w20, .L579
+.L580:
+	add	x1, x1, :lo12:.LANCHOR52
 	sbfiz	x3, x3, 6, 32
 	add	x2, x1, x3
 	ldrb	w5, [x1, x3]
-	strb	w5, [x4, #:lo12:.LANCHOR51]
-	ldrb	w4, [x19, #:lo12:.LANCHOR52]
+	strb	w5, [x4, #:lo12:.LANCHOR53]
+	ldrb	w4, [x19, #:lo12:.LANCHOR54]
 	strh	wzr, [x2, 50]
 	sub	w4, w4, #1
-	strb	w4, [x19, #:lo12:.LANCHOR52]
+	strb	w4, [x19, #:lo12:.LANCHOR54]
 	mov	w4, 1
 	strb	wzr, [x2, 56]
 	strb	w4, [x2, 2]
@@ -2979,27 +3201,27 @@ buf_alloc:
 	mov	w1, -1
 	str	xzr, [x2, 16]
 	str	w1, [x2, 36]
-	b	.L565
-.L566:
+	b	.L577
+.L578:
 	mov	w2, 121
-	adrp	x1, .LANCHOR55
+	adrp	x1, .LANCHOR57
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR55
+	add	x1, x1, :lo12:.LANCHOR57
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	ldrb	w0, [x19, #:lo12:.LANCHOR52]
-	cbnz	w0, .L569
-.L571:
+	ldrb	w0, [x19, #:lo12:.LANCHOR54]
+	cbnz	w0, .L581
+.L583:
 	mov	x0, 0
-.L565:
+.L577:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L567:
-	ldrb	w2, [x19, #:lo12:.LANCHOR52]
+.L579:
+	ldrb	w2, [x19, #:lo12:.LANCHOR54]
 	cmp	w2, 1
-	bne	.L568
-	b	.L571
+	bne	.L580
+	b	.L583
 	.size	buf_alloc, .-buf_alloc
 	.section	.text.buf_remove_buf,"ax",@progbits
 	.align	2
@@ -3009,30 +3231,30 @@ buf_remove_buf:
 	ldrb	w4, [x1, 1]
 	ldrb	w2, [x0]
 	cmp	w4, w2
-	bne	.L579
+	bne	.L591
 	ldrb	w1, [x1]
 	strb	w1, [x0]
-.L583:
+.L595:
 	mov	w0, 1
 	ret
-.L580:
+.L592:
 	mov	w3, w2
 	sbfiz	x2, x2, 6, 32
 	ldrb	w2, [x0, x2]
 	cmp	w4, w2
-	bne	.L581
+	bne	.L593
 	sbfiz	x3, x3, 6, 32
 	ldrb	w2, [x1]
 	strb	w2, [x0, x3]
 	mov	w0, -1
 	strb	w0, [x1]
-	b	.L583
-.L579:
-	adrp	x0, .LANCHOR50
-	add	x0, x0, :lo12:.LANCHOR50
-.L581:
+	b	.L595
+.L591:
+	adrp	x0, .LANCHOR52
+	add	x0, x0, :lo12:.LANCHOR52
+.L593:
 	cmp	w2, 255
-	bne	.L580
+	bne	.L592
 	mov	w0, 0
 	ret
 	.size	buf_remove_buf, .-buf_remove_buf
@@ -3044,32 +3266,32 @@ buf_remove_free:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR52
+	adrp	x19, .LANCHOR54
 	mov	x20, x0
-	ldrb	w0, [x19, #:lo12:.LANCHOR52]
-	cbnz	w0, .L585
-	adrp	x1, .LANCHOR56
+	ldrb	w0, [x19, #:lo12:.LANCHOR54]
+	cbnz	w0, .L597
+	adrp	x1, .LANCHOR58
 	adrp	x0, .LC0
 	mov	w2, 172
-	add	x1, x1, :lo12:.LANCHOR56
+	add	x1, x1, :lo12:.LANCHOR58
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L585:
-	ldrb	w0, [x19, #:lo12:.LANCHOR52]
-	cbz	w0, .L584
+.L597:
+	ldrb	w0, [x19, #:lo12:.LANCHOR54]
+	cbz	w0, .L596
 	mov	x1, x20
-	adrp	x0, .LANCHOR51
-	add	x0, x0, :lo12:.LANCHOR51
+	adrp	x0, .LANCHOR53
+	add	x0, x0, :lo12:.LANCHOR53
 	bl	buf_remove_buf
 	cmp	w0, 1
-	bne	.L584
-	ldrb	w0, [x19, #:lo12:.LANCHOR52]
+	bne	.L596
+	ldrb	w0, [x19, #:lo12:.LANCHOR54]
 	sub	w0, w0, #1
-	strb	w0, [x19, #:lo12:.LANCHOR52]
+	strb	w0, [x19, #:lo12:.LANCHOR54]
 	ldrb	w0, [x20, 2]
 	orr	w0, w0, 1
 	strb	w0, [x20, 2]
-.L584:
+.L596:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -3079,8 +3301,8 @@ buf_remove_free:
 	.global	flash_check_bad_block
 	.type	flash_check_bad_block, %function
 flash_check_bad_block:
-	adrp	x3, .LANCHOR31
-	add	x3, x3, :lo12:.LANCHOR31
+	adrp	x3, .LANCHOR32
+	add	x3, x3, :lo12:.LANCHOR32
 	and	w5, w0, 255
 	lsr	w4, w1, 5
 	and	w1, w1, 31
@@ -3111,8 +3333,8 @@ flash_mask_bad_block:
 	add	x29, sp, 0
 	str	x21, [sp, 32]
 	and	w21, w0, 255
-	adrp	x0, .LANCHOR31
-	add	x0, x0, :lo12:.LANCHOR31
+	adrp	x0, .LANCHOR32
+	add	x0, x0, :lo12:.LANCHOR32
 	stp	x19, x20, [sp, 16]
 	mov	w20, w1
 	ldrh	w19, [x0, 14]
@@ -3154,15 +3376,15 @@ ftl_gc_write_buf:
 	orr	w1, w1, 2
 	strb	w1, [x0, 2]
 	mov	x1, x0
-	adrp	x0, .LANCHOR57
-	add	x0, x0, :lo12:.LANCHOR57
+	adrp	x0, .LANCHOR59
+	add	x0, x0, :lo12:.LANCHOR59
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR58
+	adrp	x1, .LANCHOR60
 	ldp	x29, x30, [sp], 16
-	ldrb	w0, [x1, #:lo12:.LANCHOR58]
+	ldrb	w0, [x1, #:lo12:.LANCHOR60]
 	add	w0, w0, 1
 	and	w0, w0, 255
-	strb	w0, [x1, #:lo12:.LANCHOR58]
+	strb	w0, [x1, #:lo12:.LANCHOR60]
 	ret
 	.size	ftl_gc_write_buf, .-ftl_gc_write_buf
 	.section	.text.zftl_cache_flush,"ax",@progbits
@@ -3177,11 +3399,11 @@ zftl_cache_flush:
 	.global	zftl_get_density
 	.type	zftl_get_density, %function
 zftl_get_density:
-	cbnz	w0, .L597
-	adrp	x0, .LANCHOR59
-	ldr	w0, [x0, #:lo12:.LANCHOR59]
+	cbnz	w0, .L609
+	adrp	x0, .LANCHOR61
+	ldr	w0, [x0, #:lo12:.LANCHOR61]
 	ret
-.L597:
+.L609:
 	cmp	w0, 4
 	cset	w0, cc
 	lsl	w0, w0, 13
@@ -3206,8 +3428,8 @@ vpn_check:
 	.global	FtlGetCurEraseBlock
 	.type	FtlGetCurEraseBlock, %function
 FtlGetCurEraseBlock:
-	adrp	x0, .LANCHOR60
-	ldrh	w0, [x0, #:lo12:.LANCHOR60]
+	adrp	x0, .LANCHOR62
+	ldrh	w0, [x0, #:lo12:.LANCHOR62]
 	ret
 	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
 	.section	.text.FtlGetAllBlockNum,"ax",@progbits
@@ -3232,178 +3454,189 @@ FtlLowFormat:
 	.global	gc_add_sblk
 	.type	gc_add_sblk, %function
 gc_add_sblk:
-	stp	x29, x30, [sp, -96]!
+	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR14
 	stp	x19, x20, [sp, 16]
-	and	w20, w0, 65535
-	adrp	x0, .LANCHOR6
+	and	w19, w0, 65535
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	and	w22, w1, 65535
 	stp	x23, x24, [sp, 48]
-	stp	x25, x26, [sp, 64]
-	and	w24, w1, 65535
-	ldrh	w0, [x0, #:lo12:.LANCHOR6]
-	and	w25, w2, 65535
-	stp	x21, x22, [sp, 32]
-	str	x27, [sp, 80]
-	cmp	w0, w20
-	bhi	.L606
-	adrp	x1, .LANCHOR61
+	and	w23, w2, 65535
+	tbz	x0, 8, .L618
+	adrp	x1, .LANCHOR9
+	uxtw	x0, w19
+	mov	w3, w23
+	ldr	x2, [x1, #:lo12:.LANCHOR9]
+	adrp	x1, .LANCHOR7
+	ldr	x1, [x1, #:lo12:.LANCHOR7]
+	ldrh	w5, [x2, x0, lsl 1]
+	mov	w2, w22
+	add	x1, x1, x0, lsl 2
+	adrp	x0, .LC43
+	add	x0, x0, :lo12:.LC43
+	ldrb	w4, [x1, 2]
+	adrp	x1, .LANCHOR63
+	ldrh	w7, [x1, #:lo12:.LANCHOR63]
+	adrp	x1, .LANCHOR64+56
+	ubfx	x4, x4, 5, 3
+	ldrh	w6, [x1, #:lo12:.LANCHOR64+56]
+	mov	w1, w19
+	bl	printf
+.L618:
+	adrp	x0, .LANCHOR6
+	mov	x20, x0
+	ldrh	w1, [x0, #:lo12:.LANCHOR6]
+	cmp	w1, w19
+	bhi	.L619
+	adrp	x1, .LANCHOR65
 	adrp	x0, .LC0
-	mov	w2, 338
-	add	x1, x1, :lo12:.LANCHOR61
+	mov	w2, 454
+	add	x1, x1, :lo12:.LANCHOR65
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L606:
-	adrp	x22, .LANCHOR9
-	uxtw	x19, w20
-	lsl	x26, x19, 1
-	adrp	x23, .LANCHOR14
-	ldr	x0, [x22, #:lo12:.LANCHOR9]
-	adrp	x27, .LANCHOR7
-	ldrh	w21, [x0, x26]
-	ldr	w0, [x23, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L607
-	ldr	x0, [x27, #:lo12:.LANCHOR7]
-	mov	w4, w21
-	mov	w2, w24
-	mov	w1, w20
-	add	x0, x0, x19, lsl 2
-	ldrb	w3, [x0, 2]
-	adrp	x0, .LANCHOR62
-	ldrh	w6, [x0, #:lo12:.LANCHOR62]
-	adrp	x0, .LANCHOR63+56
-	ubfx	x3, x3, 5, 3
-	ldrh	w5, [x0, #:lo12:.LANCHOR63+56]
-	adrp	x0, .LC43
-	add	x0, x0, :lo12:.LC43
+.L619:
+	ldrh	w0, [x20, #:lo12:.LANCHOR6]
+	cmp	w0, w19
+	bhi	.L620
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 10, .L642
+	adrp	x0, .LC44
+	mov	w3, w23
+	mov	w2, w22
+	mov	w1, w19
+	add	x0, x0, :lo12:.LC44
 	bl	printf
-.L607:
-	ldr	x0, [x27, #:lo12:.LANCHOR7]
-	add	x19, x0, x19, lsl 2
-	ldrb	w2, [x19, 2]
+.L642:
+	mov	w0, 0
+	b	.L617
+.L620:
+	adrp	x1, .LANCHOR9
+	uxtw	x0, w19
+	ldr	x1, [x1, #:lo12:.LANCHOR9]
+	ldrh	w3, [x1, x0, lsl 1]
+	adrp	x1, .LANCHOR7
+	ldr	x1, [x1, #:lo12:.LANCHOR7]
+	add	x0, x1, x0, lsl 2
+	ldrb	w2, [x0, 2]
 	tst	w2, 224
-	bne	.L608
-	cbz	w21, .L628
-	adrp	x1, .LANCHOR61
+	bne	.L622
+	cbz	w3, .L642
+	mov	w2, 461
+	adrp	x1, .LANCHOR65
 	adrp	x0, .LC0
-	mov	w2, 343
-	add	x1, x1, :lo12:.LANCHOR61
+	add	x1, x1, :lo12:.LANCHOR65
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L628:
-	mov	w0, 0
-	b	.L605
-.L608:
-	adrp	x0, .LANCHOR63
-	add	x1, x0, :lo12:.LANCHOR63
-	ldrh	w0, [x0, #:lo12:.LANCHOR63]
-	cmp	w0, w20
-	beq	.L628
-	adrp	x21, .LANCHOR10
-	ldr	x0, [x21, #:lo12:.LANCHOR10]
-	ldrh	w3, [x0, 48]
-	cmp	w3, w20
-	beq	.L628
-	ldrh	w3, [x0, 16]
-	cmp	w3, w20
-	beq	.L628
-	ldrh	w3, [x0, 80]
-	cmp	w3, w20
-	beq	.L628
-	ldrh	w4, [x1, 56]
+	b	.L642
+.L622:
+	adrp	x0, .LANCHOR64
+	add	x1, x0, :lo12:.LANCHOR64
+	ldrh	w0, [x0, #:lo12:.LANCHOR64]
+	cmp	w0, w19
+	beq	.L642
+	adrp	x24, .LANCHOR10
+	ldr	x0, [x24, #:lo12:.LANCHOR10]
+	ldrh	w4, [x0, 48]
+	cmp	w4, w19
+	beq	.L642
+	ldrh	w4, [x0, 16]
+	cmp	w4, w19
+	beq	.L642
+	ldrh	w4, [x0, 80]
+	cmp	w4, w19
+	beq	.L642
+	ldrh	w5, [x1, 56]
 	add	x1, x1, 58
-	mov	w3, 0
-.L610:
-	cmp	w3, w4
-	bcc	.L611
-	cbnz	w24, .L615
-	adrp	x1, .LANCHOR64
-	ldrh	w5, [x1, #:lo12:.LANCHOR64]
-	cmp	w20, w5
-	beq	.L628
-	adrp	x3, .LANCHOR65
-	add	x3, x3, :lo12:.LANCHOR65
+	mov	w4, 0
+.L623:
+	cmp	w4, w5
+	bcc	.L624
+	cbnz	w22, .L628
+	adrp	x1, .LANCHOR66
+	ldrh	w6, [x1, #:lo12:.LANCHOR66]
+	cmp	w19, w6
+	beq	.L642
+	adrp	x4, .LANCHOR67
+	add	x4, x4, :lo12:.LANCHOR67
 	mov	x1, 0
-.L614:
-	ldrh	w6, [x1, x3]
-	cmp	w20, w6
-	bne	.L613
-	ldr	w0, [x23, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L628
-	ldr	x0, [x22, #:lo12:.LANCHOR9]
-	mov	w4, w20
+.L627:
+	ldrh	w7, [x1, x4]
+	cmp	w19, w7
+	bne	.L626
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L642
+	mov	w5, w6
+	mov	w4, w19
 	ubfx	x2, x2, 5, 3
-	mov	w1, w20
-	ldrh	w3, [x0, x26]
-	adrp	x0, .LC44
-	add	x0, x0, :lo12:.LC44
+	mov	w1, w19
+	adrp	x0, .LC45
+	add	x0, x0, :lo12:.LC45
 	bl	printf
-	b	.L628
-.L611:
-	ldrh	w5, [x1], 2
-	cmp	w5, w20
-	beq	.L628
-	add	w3, w3, 1
-	b	.L610
-.L613:
+	b	.L642
+.L624:
+	ldrh	w6, [x1], 2
+	cmp	w6, w19
+	beq	.L642
+	add	w4, w4, 1
+	b	.L623
+.L626:
 	add	x1, x1, 2
 	cmp	x1, 16
-	bne	.L614
-	ubfiz	x19, x25, 7, 16
-	add	x19, x19, 136
-	add	x19, x0, x19
-.L616:
-	ldr	w0, [x23, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L617
-	ldr	x0, [x22, #:lo12:.LANCHOR9]
-	adrp	x1, .LANCHOR62
-	mov	w5, w4
+	bne	.L627
+	ubfiz	x20, x23, 7, 16
+	add	x20, x20, 136
+	add	x20, x0, x20
+.L629:
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L630
+	adrp	x0, .LANCHOR63
+	mov	w4, w3
+	mov	w1, w19
 	ubfx	x3, x2, 5, 3
-	ldrh	w6, [x1, #:lo12:.LANCHOR62]
-	mov	w2, w24
-	mov	w1, w20
-	ldrh	w4, [x0, x26]
-	adrp	x0, .LC43
-	add	x0, x0, :lo12:.LC43
+	ldrh	w6, [x0, #:lo12:.LANCHOR63]
+	mov	w2, w22
+	adrp	x0, .LC46
+	add	x0, x0, :lo12:.LC46
 	bl	printf
-.L617:
-	mov	x0, x19
-	add	x1, x19, 128
+.L630:
+	mov	x0, x20
+	add	x1, x20, 128
 	mov	w2, 65535
-.L620:
+.L633:
 	ldrh	w3, [x0]
 	cmp	w3, w2
-	bne	.L618
-	strh	w20, [x0]
-	cbz	w24, .L619
-	ldr	x1, [x21, #:lo12:.LANCHOR10]
+	bne	.L631
+	strh	w19, [x0]
+	cbz	w22, .L632
+	ldr	x1, [x24, #:lo12:.LANCHOR10]
 	ldrh	w0, [x1, 124]
 	add	w0, w0, 1
 	strh	w0, [x1, 124]
-.L638:
+.L652:
 	mov	w0, 1
-.L605:
+.L617:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldr	x27, [sp, 80]
-	ldp	x29, x30, [sp], 96
+	ldp	x29, x30, [sp], 64
 	ret
-.L615:
-	add	x19, x0, 392
-	b	.L616
-.L619:
-	ldr	x0, [x21, #:lo12:.LANCHOR10]
-	add	x25, x0, x25, uxth 1
-	ldrh	w0, [x25, 120]
+.L628:
+	add	x20, x0, 392
+	b	.L629
+.L632:
+	ldr	x0, [x24, #:lo12:.LANCHOR10]
+	add	x23, x0, x23, uxth 1
+	ldrh	w0, [x23, 120]
 	add	w0, w0, 1
-	strh	w0, [x25, 120]
-	b	.L638
-.L618:
+	strh	w0, [x23, 120]
+	b	.L652
+.L631:
 	add	x0, x0, 2
 	cmp	x1, x0
-	bne	.L620
-	b	.L638
+	bne	.L633
+	b	.L652
 	.size	gc_add_sblk, .-gc_add_sblk
 	.section	.text.gc_mark_bad_ppa,"ax",@progbits
 	.align	2
@@ -3411,72 +3644,75 @@ gc_add_sblk:
 	.type	gc_mark_bad_ppa, %function
 gc_mark_bad_ppa:
 	stp	x29, x30, [sp, -64]!
-	adrp	x1, .LANCHOR66
-	mov	w3, w0
+	adrp	x1, .LANCHOR68
+	adrp	x3, .LANCHOR31
 	add	x29, sp, 0
-	ldrh	w1, [x1, #:lo12:.LANCHOR66]
+	ldrh	w1, [x1, #:lo12:.LANCHOR68]
+	ldrb	w3, [x3, #:lo12:.LANCHOR31]
 	stp	x19, x20, [sp, 16]
-	mov	w19, 21
+	mov	w19, 24
+	sub	w19, w19, w3
+	lsr	w2, w0, w1
 	sub	w19, w19, w1
+	adrp	x1, .LANCHOR69
 	str	x23, [sp, 48]
-	lsr	w2, w0, w1
-	adrp	x1, .LANCHOR67
 	mov	w23, 1
-	stp	x21, x22, [sp, 32]
-	ldrb	w1, [x1, #:lo12:.LANCHOR67]
+	ldrb	w1, [x1, #:lo12:.LANCHOR69]
 	lsl	w19, w23, w19
 	sub	w19, w19, #1
-	adrp	x20, .LANCHOR63
+	stp	x21, x22, [sp, 32]
 	and	w19, w19, w2
-	add	x21, x20, :lo12:.LANCHOR63
+	adrp	x20, .LANCHOR64
+	add	x21, x20, :lo12:.LANCHOR64
+	mov	w3, w0
 	and	w22, w2, 65535
-	adrp	x0, .LC45
-	mov	w2, w22
-	add	x0, x0, :lo12:.LC45
+	adrp	x0, .LC47
 	udiv	w19, w19, w1
-	ldr	w1, [x21, 328]
+	mov	w2, w22
+	ldr	w1, [x21, 584]
+	add	x0, x0, :lo12:.LC47
 	and	w19, w19, 65535
 	bl	printf
 	mov	w1, w23
 	mov	w2, 0
 	mov	w0, w19
 	bl	gc_add_sblk
-	ldr	w0, [x21, 328]
+	ldr	w0, [x21, 584]
 	mov	w1, 0
-.L640:
+.L654:
 	cmp	w1, w0
-	bcc	.L642
+	bcc	.L656
 	cmp	w0, 5
-	bhi	.L641
-	add	x20, x20, :lo12:.LANCHOR63
+	bhi	.L655
+	add	x20, x20, :lo12:.LANCHOR64
 	add	w1, w0, 1
-	str	w1, [x20, 328]
+	str	w1, [x20, 584]
 	add	x20, x20, x0, uxtw 1
-	strh	w22, [x20, 332]
-.L641:
+	strh	w22, [x20, 588]
+.L655:
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L642:
+.L656:
 	add	x2, x21, x1, sxtw 1
-	ldrh	w2, [x2, 332]
+	ldrh	w2, [x2, 588]
 	cmp	w2, w22
-	beq	.L641
+	beq	.L655
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L640
+	b	.L654
 	.size	gc_mark_bad_ppa, .-gc_mark_bad_ppa
 	.section	.text.gc_get_src_ppa_from_index,"ax",@progbits
 	.align	2
 	.global	gc_get_src_ppa_from_index
 	.type	gc_get_src_ppa_from_index, %function
 gc_get_src_ppa_from_index:
-	adrp	x1, .LANCHOR68
+	adrp	x1, .LANCHOR70
 	ubfiz	x0, x0, 2, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR68]
+	ldr	x1, [x1, #:lo12:.LANCHOR70]
 	ldr	w0, [x1, x0]
 	ret
 	.size	gc_get_src_ppa_from_index, .-gc_get_src_ppa_from_index
@@ -3487,19 +3723,19 @@ gc_get_src_ppa_from_index:
 gc_write_completed:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR69
 	stp	x23, x24, [sp, 48]
-	add	x22, x22, :lo12:.LANCHOR69
-	adrp	x23, .LANCHOR50
-	add	x21, x23, :lo12:.LANCHOR50
+	adrp	x23, .LANCHOR71
+	stp	x21, x22, [sp, 32]
+	adrp	x24, .LANCHOR52
+	add	x23, x23, :lo12:.LANCHOR71
+	add	x22, x24, :lo12:.LANCHOR52
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-.L646:
-	ldrb	w0, [x22]
-	cmp	w0, 255
-	bne	.L659
+.L660:
+	ldrb	w20, [x23]
+	cmp	w20, 255
+	bne	.L673
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -3507,138 +3743,140 @@ gc_write_completed:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L659:
-	sxtw	x26, w0
-	add	x1, x23, :lo12:.LANCHOR50
-	lsl	x3, x26, 6
-	add	x2, x1, x3
-	ldrb	w0, [x1, x3]
+.L673:
+	lsl	x1, x20, 6
+	add	x0, x24, :lo12:.LANCHOR52
+	add	x2, x0, x1
+	ldrb	w0, [x0, x1]
 	ldr	w1, [x2, 52]
-	strb	w0, [x22]
-	ldrh	w24, [x2, 48]
-	cbz	w1, .L647
+	strb	w0, [x23]
+	ldrh	w25, [x2, 48]
+	cbz	w1, .L661
 	ldr	w2, [x2, 40]
-	adrp	x0, .LANCHOR63
-	add	x0, x0, :lo12:.LANCHOR63
+	adrp	x0, .LANCHOR64
+	add	x0, x0, :lo12:.LANCHOR64
 	mov	w3, 1
-	str	w2, [x0, 324]
-	strh	w3, [x0, 320]
-	adrp	x0, .LC46
-	add	x0, x0, :lo12:.LC46
+	str	w2, [x0, 580]
+	strh	w3, [x0, 576]
+	adrp	x0, .LC48
+	add	x0, x0, :lo12:.LC48
 	bl	printf
-	adrp	x1, .LANCHOR70
+	adrp	x1, .LANCHOR72
 	adrp	x0, .LC0
-	mov	w2, 672
-	add	x1, x1, :lo12:.LANCHOR70
+	mov	w2, 804
+	add	x1, x1, :lo12:.LANCHOR72
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L647:
-	adrp	x25, .LANCHOR71
-	ldrb	w0, [x25, #:lo12:.LANCHOR71]
+.L661:
+	adrp	x27, .LANCHOR73
+	ldrb	w0, [x27, #:lo12:.LANCHOR73]
 	cmp	w0, 3
-	bne	.L648
+	bne	.L662
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbnz	w0, .L662
 	adrp	x0, .LANCHOR10
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldrb	w19, [x0, 89]
 	add	w19, w19, w19, lsl 1
 	and	w19, w19, 1023
-.L649:
+.L663:
 	adrp	x0, .LANCHOR14
-	adrp	x28, .LANCHOR74
-	and	x20, x24, 65535
+	adrp	x28, .LANCHOR76
+	and	x21, x25, 65535
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L650
-	ldr	x1, [x28, #:lo12:.LANCHOR74]
-	add	x0, x21, x26, lsl 6
-	mov	w3, w24
+	tbz	x0, 8, .L664
+	ldr	x1, [x28, #:lo12:.LANCHOR76]
+	add	x0, x22, x20, lsl 6
+	ldrh	w3, [x0, 48]
+	ldrb	w4, [x1, x21]
+	mov	w1, w25
 	ldrb	w2, [x0, 1]
-	adrp	x0, .LC47
-	ldrb	w4, [x1, x20]
-	add	x0, x0, :lo12:.LC47
-	mov	w1, w24
+	adrp	x0, .LC49
+	add	x0, x0, :lo12:.LC49
 	bl	printf
-.L650:
-	ldr	x1, [x28, #:lo12:.LANCHOR74]
-	add	x0, x21, x26, lsl 6
-	mov	x27, x20
+.L664:
+	ldr	x1, [x28, #:lo12:.LANCHOR76]
+	add	x0, x22, x20, lsl 6
+	mov	x26, x21
 	ldrb	w0, [x0, 1]
-	ldrb	w1, [x1, x20]
+	ldrb	w1, [x1, x21]
 	cmp	w1, w0
-	beq	.L651
-	adrp	x1, .LANCHOR70
+	beq	.L665
+	adrp	x1, .LANCHOR72
 	adrp	x0, .LC0
-	mov	w2, 681
-	add	x1, x1, :lo12:.LANCHOR70
+	mov	w2, 813
+	add	x1, x1, :lo12:.LANCHOR72
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L651:
-	add	x0, x21, x26, lsl 6
-	ldrb	w0, [x0, 61]
+.L665:
+	add	x20, x22, x20, lsl 6
+	ldrb	w0, [x20, 61]
 	cmp	w0, 3
-	beq	.L652
-	ldrb	w0, [x25, #:lo12:.LANCHOR71]
+	beq	.L666
+	ldrb	w0, [x27, #:lo12:.LANCHOR73]
 	cmp	w0, 3
-	bne	.L652
+	bne	.L666
+	adrp	x0, .LANCHOR77
+	ldrb	w0, [x0, #:lo12:.LANCHOR77]
+	cbnz	w0, .L666
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbnz	w0, .L666
+	adrp	x0, .LANCHOR74
+	ldrb	w0, [x0, #:lo12:.LANCHOR74]
+	cbz	w0, .L667
 	adrp	x0, .LANCHOR75
 	ldrb	w0, [x0, #:lo12:.LANCHOR75]
-	cbnz	w0, .L652
-	adrp	x0, .LANCHOR72
-	ldrb	w0, [x0, #:lo12:.LANCHOR72]
-	cbz	w0, .L653
-	adrp	x0, .LANCHOR73
-	ldrb	w0, [x0, #:lo12:.LANCHOR73]
-	cbnz	w0, .L652
-.L653:
-	ldr	x1, [x28, #:lo12:.LANCHOR74]
+	cbnz	w0, .L666
+.L667:
+	ldr	x1, [x28, #:lo12:.LANCHOR76]
 	mov	x0, 0
-	add	x20, x1, x20
-.L654:
+	add	x21, x1, x21
+.L668:
 	cmp	w19, w0, uxth
-	bls	.L646
-	ldrb	w1, [x20, x0]
+	bls	.L660
+	ldrb	w1, [x21, x0]
 	add	x0, x0, 1
-	add	x1, x21, x1, lsl 6
+	add	x1, x22, x1, lsl 6
 	strb	wzr, [x1, 61]
-	b	.L654
-.L648:
-	adrp	x0, .LANCHOR72
-	ldrb	w0, [x0, #:lo12:.LANCHOR72]
-	cbz	w0, .L661
-	adrp	x0, .LANCHOR73
-	ldrb	w0, [x0, #:lo12:.LANCHOR73]
-	cbz	w0, .L661
-	adrp	x0, .LANCHOR10
-	ldr	x0, [x0, #:lo12:.LANCHOR10]
-	ldrb	w19, [x0, 89]
-	ubfiz	w19, w19, 1, 8
-	b	.L649
-.L661:
+	b	.L668
+.L662:
+	adrp	x0, .LANCHOR74
+	ldrb	w0, [x0, #:lo12:.LANCHOR74]
+	cbz	w0, .L674
+	adrp	x0, .LANCHOR75
+	ldrb	w0, [x0, #:lo12:.LANCHOR75]
+	cmp	w0, 0
+	cset	w19, ne
+	add	w19, w19, 1
+	b	.L663
+.L674:
 	mov	w19, 1
-	b	.L649
-.L652:
-	adrp	x0, .LANCHOR63
-	add	x0, x0, :lo12:.LANCHOR63
-	add	x19, x20, x19, uxth
-	mov	x20, x0
-	strh	w24, [x0, 316]
-	mov	w24, -1
-.L655:
-	cmp	x19, x27
-	beq	.L646
-	ldr	x1, [x28, #:lo12:.LANCHOR74]
-	ldrb	w0, [x1, x27]
-	strb	w24, [x1, x27]
-	add	x27, x27, 1
+	b	.L663
+.L666:
+	adrp	x20, .LANCHOR64
+	add	x20, x20, :lo12:.LANCHOR64
+	add	x19, x21, x19, uxth
+	mov	w21, -1
+	strh	w25, [x20, 572]
+.L669:
+	cmp	x19, x26
+	beq	.L660
+	ldr	x1, [x28, #:lo12:.LANCHOR76]
+	ldrb	w0, [x1, x26]
+	strb	w21, [x1, x26]
+	add	x26, x26, 1
 	sbfiz	x1, x0, 6, 32
 	ubfiz	x0, x0, 6, 8
-	add	x1, x21, x1
-	add	x0, x21, x0
+	add	x1, x22, x1
+	add	x0, x22, x0
 	strb	wzr, [x1, 61]
-	bl	buf_free
+	bl	zbuf_free
 	ldrb	w0, [x20, 7]
 	sub	w0, w0, #1
 	strb	w0, [x20, 7]
-	b	.L655
+	b	.L669
 	.size	gc_write_completed, .-gc_write_completed
 	.section	.text.gc_get_src_blk,"ax",@progbits
 	.align	2
@@ -3647,47 +3885,47 @@ gc_write_completed:
 gc_get_src_blk:
 	adrp	x0, .LANCHOR10
 	ldr	x2, [x0, #:lo12:.LANCHOR10]
-	adrp	x0, .LANCHOR76
-	ldrb	w3, [x0, #:lo12:.LANCHOR76]
+	adrp	x0, .LANCHOR78
+	ldrb	w3, [x0, #:lo12:.LANCHOR78]
 	ldrh	w0, [x2, 124]
-	cbz	w0, .L676
+	cbz	w0, .L690
 	add	x1, x2, 392
 	mov	w4, 1
-.L677:
+.L691:
 	add	x5, x1, 128
 	mov	w6, 65535
-.L681:
+.L695:
 	ldrh	w0, [x1]
 	cmp	w0, w6
-	beq	.L679
+	beq	.L693
 	mov	w5, -1
 	strh	w5, [x1]
-	cbz	w4, .L680
+	cbz	w4, .L694
 	ldrh	w1, [x2, 124]
 	sub	w1, w1, #1
 	strh	w1, [x2, 124]
 	ret
-.L676:
+.L690:
 	add	x0, x2, x3, sxtw 1
 	ldrh	w0, [x0, 120]
-	cbz	w0, .L682
+	cbz	w0, .L696
 	ubfiz	x1, x3, 7, 8
 	mov	w4, 0
 	add	x1, x1, 136
 	add	x1, x2, x1
-	b	.L677
-.L680:
+	b	.L691
+.L694:
 	add	x2, x2, x3, uxtb 1
 	ldrh	w1, [x2, 120]
 	sub	w1, w1, #1
 	strh	w1, [x2, 120]
 	ret
-.L679:
+.L693:
 	add	x1, x1, 2
 	cmp	x1, x5
-	bne	.L681
+	bne	.L695
 	ret
-.L682:
+.L696:
 	mov	w0, 65535
 	ret
 	.size	gc_get_src_blk, .-gc_get_src_blk
@@ -3699,90 +3937,90 @@ gc_free_temp_buf:
 	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR63
-	add	x0, x20, :lo12:.LANCHOR63
+	adrp	x20, .LANCHOR64
+	add	x0, x20, :lo12:.LANCHOR64
 	stp	x21, x22, [sp, 32]
 	ldrb	w1, [x0, 7]
-	cbz	w1, .L691
-	adrp	x1, .LANCHOR52
-	ldrb	w1, [x1, #:lo12:.LANCHOR52]
+	cbz	w1, .L705
+	adrp	x1, .LANCHOR54
+	ldrb	w1, [x1, #:lo12:.LANCHOR54]
 	cmp	w1, 1
-	bhi	.L691
-	ldrh	w19, [x0, 316]
-	adrp	x2, .LANCHOR78
-	adrp	x0, .LANCHOR77
-	adrp	x21, .LANCHOR74
-	ldrb	w2, [x2, #:lo12:.LANCHOR78]
+	bhi	.L705
+	ldrh	w19, [x0, 572]
+	adrp	x2, .LANCHOR80
+	adrp	x0, .LANCHOR79
+	adrp	x21, .LANCHOR76
+	ldrb	w2, [x2, #:lo12:.LANCHOR80]
 	add	w1, w19, 24
-	ldrh	w0, [x0, #:lo12:.LANCHOR77]
-	ldr	x4, [x21, #:lo12:.LANCHOR74]
+	ldrh	w0, [x0, #:lo12:.LANCHOR79]
+	ldr	x4, [x21, #:lo12:.LANCHOR76]
 	mul	w0, w0, w2
 	cmp	w0, w1
 	csel	w1, w0, w1, ls
-	adrp	x0, .LANCHOR50
-	add	x0, x0, :lo12:.LANCHOR50
-.L686:
+	adrp	x0, .LANCHOR52
+	add	x0, x0, :lo12:.LANCHOR52
+.L700:
 	cmp	w19, w1
-	bcc	.L689
-.L691:
+	bcc	.L703
+.L705:
 	mov	w0, 0
-	b	.L684
-.L689:
+	b	.L698
+.L703:
 	uxtw	x22, w19
 	ldrb	w2, [x4, x22]
 	cmp	w2, 255
-	beq	.L687
+	beq	.L701
 	sbfiz	x3, x2, 6, 32
 	add	x3, x0, x3
 	ldrb	w3, [x3, 61]
-	cbnz	w3, .L687
+	cbnz	w3, .L701
 	ubfiz	x2, x2, 6, 8
 	add	x0, x0, x2
-	bl	buf_free
+	bl	zbuf_free
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L688
-	ldr	x0, [x21, #:lo12:.LANCHOR74]
+	tbz	x0, 8, .L702
+	ldr	x0, [x21, #:lo12:.LANCHOR76]
 	mov	w1, w19
 	ldrb	w2, [x0, x22]
-	adrp	x0, .LC48
-	add	x0, x0, :lo12:.LC48
+	adrp	x0, .LC50
+	add	x0, x0, :lo12:.LC50
 	bl	printf
-.L688:
-	ldr	x0, [x21, #:lo12:.LANCHOR74]
-	add	x20, x20, :lo12:.LANCHOR63
+.L702:
+	ldr	x0, [x21, #:lo12:.LANCHOR76]
+	add	x20, x20, :lo12:.LANCHOR64
 	mov	w1, -1
 	strb	w1, [x0, x22]
 	ldrb	w0, [x20, 7]
 	sub	w0, w0, #1
 	strb	w0, [x20, 7]
 	mov	w0, 1
-.L684:
+.L698:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L687:
+.L701:
 	add	w19, w19, 1
-	b	.L686
+	b	.L700
 	.size	gc_free_temp_buf, .-gc_free_temp_buf
 	.section	.text.print_gc_debug_info,"ax",@progbits
 	.align	2
 	.global	print_gc_debug_info
 	.type	print_gc_debug_info, %function
 print_gc_debug_info:
-	adrp	x2, .LANCHOR79
-	adrp	x1, .LANCHOR63
-	add	x0, x1, :lo12:.LANCHOR63
-	ldrh	w6, [x2, #:lo12:.LANCHOR79]
-	adrp	x2, .LANCHOR52
-	ldrh	w1, [x1, #:lo12:.LANCHOR63]
+	adrp	x2, .LANCHOR81
+	adrp	x1, .LANCHOR64
+	add	x0, x1, :lo12:.LANCHOR64
+	ldrh	w6, [x2, #:lo12:.LANCHOR81]
+	adrp	x2, .LANCHOR54
+	ldrh	w1, [x1, #:lo12:.LANCHOR64]
 	ldrb	w5, [x0, 7]
-	ldrb	w4, [x2, #:lo12:.LANCHOR52]
-	ldrh	w3, [x0, 314]
+	ldrb	w4, [x2, #:lo12:.LANCHOR54]
+	ldrh	w3, [x0, 570]
 	ldrh	w2, [x0, 2]
-	adrp	x0, .LC49
-	add	x0, x0, :lo12:.LC49
+	adrp	x0, .LC51
+	add	x0, x0, :lo12:.LC51
 	b	printf
 	.size	print_gc_debug_info, .-print_gc_debug_info
 	.section	.text.zftl_get_gc_node,"ax",@progbits
@@ -3793,21 +4031,21 @@ zftl_get_gc_node:
 	and	w1, w1, 65535
 	and	w0, w0, 65535
 	cmp	w1, 5
-	bne	.L701
+	bne	.L715
 	mov	w1, w0
-	adrp	x0, .LANCHOR80
-	ldr	x0, [x0, #:lo12:.LANCHOR80]
-.L703:
+	adrp	x0, .LANCHOR82
+	ldr	x0, [x0, #:lo12:.LANCHOR82]
+.L717:
 	b	_list_get_gc_head_node.isra.2
-.L701:
+.L715:
 	cmp	w1, 2
-	bne	.L702
+	bne	.L716
 	b	zftl_get_gc_node.part.9
-.L702:
+.L716:
 	mov	w1, w0
-	adrp	x0, .LANCHOR81
-	ldr	x0, [x0, #:lo12:.LANCHOR81]
-	b	.L703
+	adrp	x0, .LANCHOR83
+	ldr	x0, [x0, #:lo12:.LANCHOR83]
+	b	.L717
 	.size	zftl_get_gc_node, .-zftl_get_gc_node
 	.section	.text.gc_search_src_blk,"ax",@progbits
 	.align	2
@@ -3828,9 +4066,9 @@ gc_search_src_blk:
 	stp	x27, x28, [sp, 80]
 	add	x0, x0, x21, sxtw 1
 	ldrh	w19, [x0, 120]
-	cbz	w19, .L705
+	cbz	w19, .L719
 	mov	w0, w19
-.L704:
+.L718:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -3838,72 +4076,72 @@ gc_search_src_blk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L705:
+.L719:
 	and	w20, w2, 255
-	cbnz	w21, .L707
-	adrp	x24, .LANCHOR82
+	cbnz	w21, .L721
+	adrp	x24, .LANCHOR84
 	adrp	x26, .LANCHOR14
-	adrp	x27, .LC50
+	adrp	x27, .LC52
 	and	w22, w20, 65535
 	add	x26, x26, :lo12:.LANCHOR14
-	add	x27, x27, :lo12:.LC50
-	strh	wzr, [x24, #:lo12:.LANCHOR82]
+	add	x27, x27, :lo12:.LC52
+	strh	wzr, [x24, #:lo12:.LANCHOR84]
 	mov	w23, 0
 	mov	w25, 0
-.L708:
+.L722:
 	cmp	w25, w22
-	bcs	.L713
-	ldrh	w6, [x24, #:lo12:.LANCHOR82]
-	add	x7, x24, :lo12:.LANCHOR82
+	bcs	.L727
+	ldrh	w6, [x24, #:lo12:.LANCHOR84]
+	add	x7, x24, :lo12:.LANCHOR84
 	mov	w1, 3
 	mov	w0, w6
 	bl	zftl_get_gc_node
 	add	w2, w6, 1
 	and	w2, w2, 65535
-	strh	w2, [x24, #:lo12:.LANCHOR82]
+	strh	w2, [x24, #:lo12:.LANCHOR84]
 	and	w1, w0, 65535
 	mov	w0, 65535
 	mov	w28, w1
 	cmp	w1, w0
-	beq	.L709
+	beq	.L723
 	ldr	w0, [x26]
 	adrp	x6, .LANCHOR9
 	uxtw	x4, w1
-	tbz	x0, 8, .L710
+	tbz	x0, 8, .L724
 	ldr	x0, [x6, #:lo12:.LANCHOR9]
 	stp	x6, x4, [x29, 96]
 	ldrh	w3, [x0, x4, lsl 1]
 	mov	x0, x27
 	bl	printf
 	ldp	x6, x4, [x29, 96]
-.L710:
+.L724:
 	ldr	x0, [x6, #:lo12:.LANCHOR9]
 	ldrh	w1, [x0, x4, lsl 1]
-	adrp	x0, .LANCHOR62
-	ldrh	w0, [x0, #:lo12:.LANCHOR62]
+	adrp	x0, .LANCHOR63
+	ldrh	w0, [x0, #:lo12:.LANCHOR63]
 	cmp	w1, w0
-	bcs	.L711
+	bcs	.L725
 	mov	w2, 0
 	mov	w1, 0
 	mov	w0, w28
 	bl	gc_add_sblk
-	cbz	w0, .L712
+	cbz	w0, .L726
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w22, w23
-	bcs	.L712
-.L713:
+	bcs	.L726
+.L727:
 	ldr	x0, [x29, 112]
-	tbz	x0, 1, .L715
-	adrp	x25, .LANCHOR84
-	adrp	x24, .LANCHOR83
-	add	x27, x25, :lo12:.LANCHOR84
-	add	x24, x24, :lo12:.LANCHOR83
+	tbz	x0, 1, .L729
+	adrp	x25, .LANCHOR86
+	adrp	x24, .LANCHOR85
+	add	x27, x25, :lo12:.LANCHOR86
+	add	x24, x24, :lo12:.LANCHOR85
 	mov	w28, 0
 	mov	w26, 65535
-.L716:
+.L730:
 	cmp	w28, w22
-	beq	.L720
+	beq	.L734
 	ldrh	w6, [x24]
 	mov	w1, 5
 	mov	w0, w6
@@ -3912,219 +4150,219 @@ gc_search_src_blk:
 	strh	w6, [x24]
 	and	w1, w0, 65535
 	cmp	w1, w26
-	beq	.L717
+	beq	.L731
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x1]
 	ldrh	w1, [x27]
 	cmp	w2, w1
-	bcs	.L717
+	bcs	.L731
 	mov	w2, 0
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L719
+	cbz	w0, .L733
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w22, w23
-	bcs	.L719
-.L720:
+	bcs	.L733
+.L734:
 	cmp	w23, w22
-	adrp	x0, .LANCHOR85
-	bcs	.L722
-	ldrh	w1, [x0, #:lo12:.LANCHOR85]
-	adrp	x3, .LANCHOR78
-	adrp	x0, .LANCHOR77
-	ldrh	w2, [x25, #:lo12:.LANCHOR84]
-	ldrb	w3, [x3, #:lo12:.LANCHOR78]
-	ldrh	w0, [x0, #:lo12:.LANCHOR77]
+	adrp	x0, .LANCHOR87
+	bcs	.L736
+	ldrh	w1, [x0, #:lo12:.LANCHOR87]
+	adrp	x3, .LANCHOR80
+	adrp	x0, .LANCHOR79
+	ldrh	w2, [x25, #:lo12:.LANCHOR86]
+	ldrb	w3, [x3, #:lo12:.LANCHOR80]
+	ldrh	w0, [x0, #:lo12:.LANCHOR79]
 	mul	w0, w0, w3
 	sub	w0, w0, w1, lsr 2
 	cmp	w2, w0
-	bge	.L715
+	bge	.L729
 	add	w1, w2, w1, lsr 3
-	strh	w1, [x25, #:lo12:.LANCHOR84]
-.L715:
+	strh	w1, [x25, #:lo12:.LANCHOR86]
+.L729:
 	ldr	x0, [x29, 112]
-	tbz	x0, 0, .L723
+	tbz	x0, 0, .L737
 	cmp	w23, w22
-	bcs	.L723
-	adrp	x24, .LANCHOR86
-	add	x24, x24, :lo12:.LANCHOR86
+	bcs	.L737
+	adrp	x24, .LANCHOR88
+	add	x24, x24, :lo12:.LANCHOR88
 	mov	w25, 65535
-.L728:
+.L742:
 	ldrh	w6, [x24]
 	mov	w0, w6
 	bl	zftl_get_gc_node.part.9
 	add	w6, w6, 1
 	strh	w6, [x24]
 	cmp	w25, w0, uxth
-	beq	.L724
+	beq	.L738
 	mov	w2, 0
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L725
+	cbz	w0, .L739
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w22, w23
-	bhi	.L725
-.L726:
-	adrp	x0, .LANCHOR85
-	adrp	x1, .LANCHOR62
-	ldrh	w0, [x0, #:lo12:.LANCHOR85]
-	ldrh	w2, [x1, #:lo12:.LANCHOR62]
+	bhi	.L739
+.L740:
+	adrp	x0, .LANCHOR87
+	adrp	x1, .LANCHOR63
+	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	ldrh	w2, [x1, #:lo12:.LANCHOR63]
 	cmp	w2, w0, lsr 1
-	bls	.L723
+	bls	.L737
 	sub	w0, w2, w0, lsr 3
-	b	.L803
-.L711:
-	strh	wzr, [x24, #:lo12:.LANCHOR82]
-	b	.L713
-.L709:
+	b	.L817
+.L725:
+	strh	wzr, [x24, #:lo12:.LANCHOR84]
+	b	.L727
+.L723:
 	strh	wzr, [x7]
-	b	.L713
-.L712:
+	b	.L727
+.L726:
 	add	w25, w25, 1
 	and	w25, w25, 65535
-	b	.L708
-.L717:
+	b	.L722
+.L731:
 	strh	wzr, [x24]
-	b	.L720
-.L719:
+	b	.L734
+.L733:
 	add	w28, w28, 1
 	and	w28, w28, 65535
-	b	.L716
-.L722:
-	ldrh	w1, [x25, #:lo12:.LANCHOR84]
-	ldrh	w0, [x0, #:lo12:.LANCHOR85]
+	b	.L730
+.L736:
+	ldrh	w1, [x25, #:lo12:.LANCHOR86]
+	ldrh	w0, [x0, #:lo12:.LANCHOR87]
 	cmp	w1, w0
-	bls	.L715
+	bls	.L729
 	sub	w0, w1, w0, lsr 3
-	strh	w0, [x25, #:lo12:.LANCHOR84]
-	b	.L715
-.L724:
+	strh	w0, [x25, #:lo12:.LANCHOR86]
+	b	.L729
+.L738:
 	strh	wzr, [x24]
-.L727:
+.L741:
 	cmp	w23, w22
-	bcs	.L726
-	adrp	x1, .LANCHOR62
-	adrp	x0, .LANCHOR85
-	ldrh	w2, [x1, #:lo12:.LANCHOR62]
-	ldrh	w0, [x0, #:lo12:.LANCHOR85]
+	bcs	.L740
+	adrp	x1, .LANCHOR63
+	adrp	x0, .LANCHOR87
+	ldrh	w2, [x1, #:lo12:.LANCHOR63]
+	ldrh	w0, [x0, #:lo12:.LANCHOR87]
 	cmp	w2, w0
-	bcs	.L723
+	bcs	.L737
 	add	w0, w2, w0, lsr 3
-.L803:
-	strh	w0, [x1, #:lo12:.LANCHOR62]
-.L723:
+.L817:
+	strh	w0, [x1, #:lo12:.LANCHOR63]
+.L737:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L750
+	tbz	x0, 8, .L764
 	ldr	w2, [x29, 112]
-	adrp	x0, .LC51
+	adrp	x0, .LC53
 	mov	w4, w20
 	mov	w3, w23
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC51
+	add	x0, x0, :lo12:.LC53
 	bl	printf
-.L750:
+.L764:
 	mov	w0, w23
-	b	.L704
-.L725:
+	b	.L718
+.L739:
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	cmp	w22, w19
-	bne	.L728
-	b	.L727
-.L707:
-	adrp	x0, .LANCHOR63+318
-	strh	wzr, [x0, #:lo12:.LANCHOR63+318]
-	adrp	x0, .LANCHOR87
-	strh	wzr, [x0, #:lo12:.LANCHOR87]
+	bne	.L742
+	b	.L741
+.L721:
+	adrp	x0, .LANCHOR64+574
+	strh	wzr, [x0, #:lo12:.LANCHOR64+574]
+	adrp	x0, .LANCHOR89
+	strh	wzr, [x0, #:lo12:.LANCHOR89]
 	ldr	w0, [x29, 112]
 	and	w0, w0, 1
 	str	w0, [x29, 104]
 	ldr	x0, [x29, 112]
-	tbz	x0, 0, .L753
-	adrp	x1, .LANCHOR89
-	adrp	x25, .LANCHOR88
+	tbz	x0, 0, .L767
+	adrp	x1, .LANCHOR91
+	adrp	x25, .LANCHOR90
 	str	x1, [x29, 96]
-	adrp	x26, .LANCHOR90
-	ldrh	w0, [x25, #:lo12:.LANCHOR88]
-	ldrh	w2, [x1, #:lo12:.LANCHOR89]
+	adrp	x26, .LANCHOR92
+	ldrh	w0, [x25, #:lo12:.LANCHOR90]
+	ldrh	w2, [x1, #:lo12:.LANCHOR91]
 	cmp	w0, w2, lsr 2
-	bcc	.L730
-	ldrh	w1, [x26, #:lo12:.LANCHOR90]
+	bcc	.L744
+	ldrh	w1, [x26, #:lo12:.LANCHOR92]
 	cmp	w1, w0
-	bls	.L754
-.L730:
-	ldrh	w0, [x26, #:lo12:.LANCHOR90]
-	adrp	x22, .LANCHOR86
+	bls	.L768
+.L744:
+	ldrh	w0, [x26, #:lo12:.LANCHOR92]
+	adrp	x22, .LANCHOR88
 	lsr	w0, w0, 2
-	strh	w0, [x22, #:lo12:.LANCHOR86]
+	strh	w0, [x22, #:lo12:.LANCHOR88]
 	mov	w0, 0
 	bl	zftl_get_gc_node.part.9
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L756
+	beq	.L770
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x3, [x2, #:lo12:.LANCHOR9]
-	adrp	x2, .LANCHOR85
-	ldrh	w2, [x2, #:lo12:.LANCHOR85]
+	adrp	x2, .LANCHOR87
+	ldrh	w2, [x2, #:lo12:.LANCHOR87]
 	ldrh	w1, [x3, x1]
 	cmp	w1, w2, lsr 2
-	bcs	.L756
-	strh	wzr, [x22, #:lo12:.LANCHOR86]
+	bcs	.L770
+	strh	wzr, [x22, #:lo12:.LANCHOR88]
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
 	cmp	w0, 0
 	cset	w23, ne
-.L732:
-	add	x22, x22, :lo12:.LANCHOR86
+.L746:
+	add	x22, x22, :lo12:.LANCHOR88
 	and	w28, w20, 65535
 	mov	w24, 64
 	mov	w27, 65535
-.L734:
+.L748:
 	ldrh	w6, [x22]
 	mov	w0, w6
 	bl	zftl_get_gc_node.part.9
 	add	w6, w6, 1
 	strh	w6, [x22]
 	cmp	w27, w0, uxth
-	beq	.L731
+	beq	.L745
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L733
+	cbz	w0, .L747
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w23, w28
-	bcs	.L731
-.L733:
+	bcs	.L745
+.L747:
 	sub	w24, w24, #1
 	ands	w24, w24, 65535
-	bne	.L734
-.L731:
+	bne	.L748
+.L745:
 	ldr	x0, [x29, 96]
-	ldrh	w1, [x25, #:lo12:.LANCHOR88]
-	ldrh	w0, [x0, #:lo12:.LANCHOR89]
+	ldrh	w1, [x25, #:lo12:.LANCHOR90]
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	cmp	w1, w0, lsr 3
-	bhi	.L751
-	ldrh	w0, [x26, #:lo12:.LANCHOR90]
+	bhi	.L765
+	ldrh	w0, [x26, #:lo12:.LANCHOR92]
 	add	w0, w0, 8
 	cmp	w1, w0
-	ble	.L729
-.L751:
-	adrp	x24, .LANCHOR82
+	ble	.L743
+.L765:
+	adrp	x24, .LANCHOR84
 	and	w26, w20, 65535
 	mov	w22, 64
 	mov	w25, 65535
-	strh	wzr, [x24, #:lo12:.LANCHOR82]
-	add	x24, x24, :lo12:.LANCHOR82
-.L736:
+	strh	wzr, [x24, #:lo12:.LANCHOR84]
+	add	x24, x24, :lo12:.LANCHOR84
+.L750:
 	ldrh	w6, [x24]
 	mov	w1, 3
 	mov	w0, w6
@@ -4132,31 +4370,31 @@ gc_search_src_blk:
 	add	w6, w6, 1
 	strh	w6, [x24]
 	cmp	w25, w0, uxth
-	beq	.L729
+	beq	.L743
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L735
+	cbz	w0, .L749
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w23, w26
-	bcs	.L729
-.L735:
+	bcs	.L743
+.L749:
 	sub	w22, w22, #1
 	ands	w22, w22, 65535
-	bne	.L736
-.L729:
+	bne	.L750
+.L743:
 	ldr	x0, [x29, 112]
-	tbz	x0, 1, .L737
-	adrp	x24, .LANCHOR83
-	adrp	x28, .LANCHOR91
-	adrp	x25, .LANCHOR78
-	add	x26, x24, :lo12:.LANCHOR83
-	add	x27, x28, :lo12:.LANCHOR91
-	add	x25, x25, :lo12:.LANCHOR78
-	strh	wzr, [x24, #:lo12:.LANCHOR83]
+	tbz	x0, 1, .L751
+	adrp	x24, .LANCHOR85
+	adrp	x28, .LANCHOR93
+	adrp	x25, .LANCHOR80
+	add	x26, x24, :lo12:.LANCHOR85
+	add	x27, x28, :lo12:.LANCHOR93
+	add	x25, x25, :lo12:.LANCHOR80
+	strh	wzr, [x24, #:lo12:.LANCHOR85]
 	mov	w22, 64
-.L742:
+.L756:
 	ldrh	w6, [x26]
 	mov	w1, 5
 	mov	w0, w6
@@ -4166,159 +4404,159 @@ gc_search_src_blk:
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L738
+	beq	.L752
 	cmp	w20, 1
-	bne	.L739
-	adrp	x3, .LANCHOR77
+	bne	.L753
+	adrp	x3, .LANCHOR79
 	ldrb	w2, [x25]
-	ldrh	w3, [x3, #:lo12:.LANCHOR77]
+	ldrh	w3, [x3, #:lo12:.LANCHOR79]
 	mul	w3, w2, w3
-	adrp	x2, .LANCHOR85
-	ldrh	w2, [x2, #:lo12:.LANCHOR85]
+	adrp	x2, .LANCHOR87
+	ldrh	w2, [x2, #:lo12:.LANCHOR87]
 	sub	w2, w3, w2, lsr 3
 	strh	w2, [x27]
-.L739:
+.L753:
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x1]
 	ldrh	w1, [x27]
 	cmp	w2, w1
-	bcs	.L740
+	bcs	.L754
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L741
+	cbz	w0, .L755
 	add	w5, w23, 1
 	add	w19, w19, 1
 	and	w23, w5, 65535
 	and	w19, w19, 65535
 	cmp	w23, w20
-	bcc	.L741
-.L738:
+	bcc	.L755
+.L752:
 	cmp	w23, w20
-	adrp	x0, .LANCHOR85
-	adrp	x3, .LANCHOR78
-	bcc	.L743
-	cbnz	w19, .L744
-	adrp	x1, .LANCHOR92
-	ldrh	w2, [x1, #:lo12:.LANCHOR92]
-	adrp	x1, .LANCHOR93
-	ldrh	w1, [x1, #:lo12:.LANCHOR93]
+	adrp	x0, .LANCHOR87
+	adrp	x3, .LANCHOR80
+	bcc	.L757
+	cbnz	w19, .L758
+	adrp	x1, .LANCHOR94
+	ldrh	w2, [x1, #:lo12:.LANCHOR94]
+	adrp	x1, .LANCHOR95
+	ldrh	w1, [x1, #:lo12:.LANCHOR95]
 	cmp	w2, w1
-	bls	.L744
-.L743:
-	ldrh	w2, [x0, #:lo12:.LANCHOR85]
-	adrp	x0, .LANCHOR77
-	ldrb	w3, [x3, #:lo12:.LANCHOR78]
-	ldrh	w0, [x0, #:lo12:.LANCHOR77]
-	ldrh	w1, [x28, #:lo12:.LANCHOR91]
+	bls	.L758
+.L757:
+	ldrh	w2, [x0, #:lo12:.LANCHOR87]
+	adrp	x0, .LANCHOR79
+	ldrb	w3, [x3, #:lo12:.LANCHOR80]
+	ldrh	w0, [x0, #:lo12:.LANCHOR79]
+	ldrh	w1, [x28, #:lo12:.LANCHOR93]
 	lsr	w2, w2, 3
 	mul	w0, w0, w3
 	sub	w0, w0, w2
 	cmp	w1, w0
-	bge	.L737
+	bge	.L751
 	add	w1, w1, w2
-	strh	w1, [x28, #:lo12:.LANCHOR91]
-.L737:
+	strh	w1, [x28, #:lo12:.LANCHOR93]
+.L751:
 	ldr	w0, [x29, 104]
-	cbz	w0, .L723
-	adrp	x25, .LANCHOR82
-	adrp	x22, .LANCHOR94
-	adrp	x26, .LANCHOR89
-	adrp	x27, .LANCHOR88
-	add	x28, x22, :lo12:.LANCHOR94
-	add	x26, x26, :lo12:.LANCHOR89
-	add	x27, x27, :lo12:.LANCHOR88
-	strh	wzr, [x25, #:lo12:.LANCHOR82]
+	cbz	w0, .L737
+	adrp	x25, .LANCHOR84
+	adrp	x22, .LANCHOR96
+	adrp	x26, .LANCHOR91
+	adrp	x27, .LANCHOR90
+	add	x28, x22, :lo12:.LANCHOR96
+	add	x26, x26, :lo12:.LANCHOR91
+	add	x27, x27, :lo12:.LANCHOR90
+	strh	wzr, [x25, #:lo12:.LANCHOR84]
 	mov	w24, 64
-.L748:
-	ldrh	w6, [x25, #:lo12:.LANCHOR82]
+.L762:
+	ldrh	w6, [x25, #:lo12:.LANCHOR84]
 	mov	w1, 3
 	mov	w0, w6
 	bl	zftl_get_gc_node
 	add	w6, w6, 1
-	strh	w6, [x25, #:lo12:.LANCHOR82]
+	strh	w6, [x25, #:lo12:.LANCHOR84]
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L745
+	beq	.L759
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w1, [x2, x1]
 	ldrh	w2, [x28]
 	cmp	w2, w1
-	bls	.L746
+	bls	.L760
 	cmp	w1, 2
-	bls	.L746
+	bls	.L760
 	ldrh	w2, [x26]
 	ldrh	w1, [x27]
 	cmp	w1, w2, lsr 1
-	bls	.L745
-.L746:
+	bls	.L759
+.L760:
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L747
+	cbz	w0, .L761
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w23, w20
-	bcs	.L745
-.L747:
+	bcs	.L759
+.L761:
 	sub	w24, w24, #1
 	ands	w24, w24, 65535
-	bne	.L748
-.L745:
+	bne	.L762
+.L759:
 	cmp	w23, w20
-	adrp	x0, .LANCHOR85
-	bcs	.L749
-	ldrh	w0, [x0, #:lo12:.LANCHOR85]
-	ldrh	w1, [x22, #:lo12:.LANCHOR94]
+	adrp	x0, .LANCHOR87
+	bcs	.L763
+	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	ldrh	w1, [x22, #:lo12:.LANCHOR96]
 	cmp	w1, w0, lsr 1
-	bls	.L723
+	bls	.L737
 	sub	w0, w1, w0, lsr 3
-	strh	w0, [x22, #:lo12:.LANCHOR94]
-	b	.L723
-.L756:
+	strh	w0, [x22, #:lo12:.LANCHOR96]
+	b	.L737
+.L770:
 	mov	w23, 0
-	b	.L732
-.L753:
+	b	.L746
+.L767:
 	mov	w23, 0
-	b	.L729
-.L740:
-	strh	wzr, [x24, #:lo12:.LANCHOR83]
-	b	.L738
-.L741:
+	b	.L743
+.L754:
+	strh	wzr, [x24, #:lo12:.LANCHOR85]
+	b	.L752
+.L755:
 	sub	w22, w22, #1
 	ands	w22, w22, 65535
-	bne	.L742
-	b	.L738
-.L744:
-	ldrh	w0, [x0, #:lo12:.LANCHOR85]
-	ldrb	w1, [x3, #:lo12:.LANCHOR78]
-	ldrh	w2, [x28, #:lo12:.LANCHOR91]
+	bne	.L756
+	b	.L752
+.L758:
+	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	ldrb	w1, [x3, #:lo12:.LANCHOR80]
+	ldrh	w2, [x28, #:lo12:.LANCHOR93]
 	mul	w1, w1, w0
 	cmp	w2, w1
-	ble	.L737
+	ble	.L751
 	sub	w0, w2, w0, lsr 3
-	strh	w0, [x28, #:lo12:.LANCHOR91]
-	b	.L737
-.L749:
-	ldrh	w1, [x0, #:lo12:.LANCHOR85]
-	adrp	x0, .LANCHOR78
-	ldrh	w2, [x22, #:lo12:.LANCHOR94]
-	ldrb	w0, [x0, #:lo12:.LANCHOR78]
+	strh	w0, [x28, #:lo12:.LANCHOR93]
+	b	.L751
+.L763:
+	ldrh	w1, [x0, #:lo12:.LANCHOR87]
+	adrp	x0, .LANCHOR80
+	ldrh	w2, [x22, #:lo12:.LANCHOR96]
+	ldrb	w0, [x0, #:lo12:.LANCHOR80]
 	mul	w0, w0, w1
 	sub	w0, w0, #32
 	cmp	w2, w0
-	bge	.L723
+	bge	.L737
 	add	w1, w2, w1, lsr 3
-	strh	w1, [x22, #:lo12:.LANCHOR94]
-	b	.L723
-.L754:
+	strh	w1, [x22, #:lo12:.LANCHOR96]
+	b	.L737
+.L768:
 	mov	w23, 0
-	b	.L731
+	b	.L745
 	.size	gc_search_src_blk, .-gc_search_src_blk
 	.section	.text.zftl_insert_free_list,"ax",@progbits
 	.align	2
@@ -4331,27 +4569,27 @@ zftl_insert_free_list:
 	add	x0, x0, x1, uxth 2
 	ldrb	w0, [x0, 2]
 	ands	w0, w0, 24
-	bne	.L805
-	adrp	x2, .LANCHOR95
-	adrp	x0, .LANCHOR96
-	add	x2, x2, :lo12:.LANCHOR95
-	add	x0, x0, :lo12:.LANCHOR96
-.L807:
-	b	_insert_free_list
-.L805:
-	cmp	w0, 16
-	bne	.L806
+	bne	.L819
 	adrp	x2, .LANCHOR97
 	adrp	x0, .LANCHOR98
 	add	x2, x2, :lo12:.LANCHOR97
 	add	x0, x0, :lo12:.LANCHOR98
-	b	.L807
-.L806:
+.L821:
+	b	_insert_free_list
+.L819:
+	cmp	w0, 16
+	bne	.L820
 	adrp	x2, .LANCHOR99
 	adrp	x0, .LANCHOR100
 	add	x2, x2, :lo12:.LANCHOR99
 	add	x0, x0, :lo12:.LANCHOR100
-	b	.L807
+	b	.L821
+.L820:
+	adrp	x2, .LANCHOR101
+	adrp	x0, .LANCHOR102
+	add	x2, x2, :lo12:.LANCHOR101
+	add	x0, x0, :lo12:.LANCHOR102
+	b	.L821
 	.size	zftl_insert_free_list, .-zftl_insert_free_list
 	.section	.text.zftl_insert_data_list,"ax",@progbits
 	.align	2
@@ -4365,30 +4603,30 @@ zftl_insert_data_list:
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L809
-	adrp	x2, .LANCHOR90
+	bne	.L823
+	adrp	x2, .LANCHOR92
 	adrp	x0, .LANCHOR12
-	add	x2, x2, :lo12:.LANCHOR90
+	add	x2, x2, :lo12:.LANCHOR92
 	add	x0, x0, :lo12:.LANCHOR12
-.L812:
+.L826:
 	b	_insert_data_list
-.L809:
+.L823:
 	cmp	w2, 96
-	bne	.L810
-	adrp	x2, .LANCHOR88
-	adrp	x0, .LANCHOR81
-	add	x2, x2, :lo12:.LANCHOR88
-	add	x0, x0, :lo12:.LANCHOR81
-	b	.L812
-.L810:
+	bne	.L824
+	adrp	x2, .LANCHOR90
+	adrp	x0, .LANCHOR83
+	add	x2, x2, :lo12:.LANCHOR90
+	add	x0, x0, :lo12:.LANCHOR83
+	b	.L826
+.L824:
 	cmp	w2, 160
-	bne	.L808
-	adrp	x2, .LANCHOR92
-	adrp	x0, .LANCHOR80
-	add	x2, x2, :lo12:.LANCHOR92
-	add	x0, x0, :lo12:.LANCHOR80
-	b	.L812
-.L808:
+	bne	.L822
+	adrp	x2, .LANCHOR94
+	adrp	x0, .LANCHOR82
+	add	x2, x2, :lo12:.LANCHOR94
+	add	x0, x0, :lo12:.LANCHOR82
+	b	.L826
+.L822:
 	ret
 	.size	zftl_insert_data_list, .-zftl_insert_data_list
 	.section	.text.zftl_gc_get_free_sblk,"ax",@progbits
@@ -4407,55 +4645,55 @@ zftl_gc_get_free_sblk:
 	ldrh	w19, [x0, 588]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L814
-	cbnz	w21, .L814
+	beq	.L828
+	cbnz	w21, .L828
 	mov	w1, w19
-	adrp	x0, .LC52
-	add	x0, x0, :lo12:.LC52
+	adrp	x0, .LC54
+	add	x0, x0, :lo12:.LC54
 	bl	printf
 	ldr	x0, [x20, #:lo12:.LANCHOR10]
 	mov	w1, -1
 	strh	w1, [x0, 588]
-.L815:
+.L829:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L814:
-	adrp	x2, .LANCHOR97
-	adrp	x20, .LANCHOR99
-	ldrh	w0, [x2, #:lo12:.LANCHOR97]
-	ldrh	w1, [x20, #:lo12:.LANCHOR99]
+.L828:
+	adrp	x2, .LANCHOR99
+	adrp	x20, .LANCHOR101
+	ldrh	w0, [x2, #:lo12:.LANCHOR99]
+	ldrh	w1, [x20, #:lo12:.LANCHOR101]
 	cmp	w0, w1
-	bls	.L816
+	bls	.L830
 	lsr	w1, w0, 3
 	cmp	w21, 0
-	adrp	x0, .LANCHOR98
+	adrp	x0, .LANCHOR100
 	csel	w1, w1, wzr, ne
-	add	x2, x2, :lo12:.LANCHOR97
-	add	x0, x0, :lo12:.LANCHOR98
-.L830:
+	add	x2, x2, :lo12:.LANCHOR99
+	add	x0, x0, :lo12:.LANCHOR100
+.L844:
 	bl	_list_pop_index_node
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	bne	.L821
-	adrp	x0, .LANCHOR95
-	ldrh	w5, [x20, #:lo12:.LANCHOR99]
+	bne	.L835
+	adrp	x0, .LANCHOR97
+	ldrh	w5, [x20, #:lo12:.LANCHOR101]
 	mov	w2, w22
 	mov	w1, w19
-	ldrh	w4, [x0, #:lo12:.LANCHOR95]
-	adrp	x0, .LANCHOR96
-	ldr	x3, [x0, #:lo12:.LANCHOR96]
-	adrp	x0, .LC53
-	add	x0, x0, :lo12:.LC53
+	ldrh	w4, [x0, #:lo12:.LANCHOR97]
+	adrp	x0, .LANCHOR98
+	ldr	x3, [x0, #:lo12:.LANCHOR98]
+	adrp	x0, .LC55
+	add	x0, x0, :lo12:.LC55
 	bl	printf
-.L821:
-	cbz	w21, .L815
+.L835:
+	cbz	w21, .L829
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L815
+	tbz	x0, 8, .L829
 	adrp	x4, .LANCHOR9
 	adrp	x1, .LANCHOR7
 	uxtw	x3, w19
@@ -4469,26 +4707,26 @@ zftl_gc_get_free_sblk:
 	ldrh	w5, [x1, x0]
 	ubfx	x4, x4, 11, 8
 	mov	w1, w19
-	adrp	x0, .LC54
+	adrp	x0, .LC56
 	ubfx	x3, x2, 3, 2
 	and	w5, w5, 2047
 	ubfx	x2, x2, 5, 3
-	add	x0, x0, :lo12:.LC54
+	add	x0, x0, :lo12:.LC56
 	bl	printf
-	b	.L815
-.L816:
-	cbnz	w21, .L819
+	b	.L829
+.L830:
+	cbnz	w21, .L833
 	lsr	w1, w1, 2
-.L820:
-	adrp	x0, .LANCHOR100
-	add	x2, x20, :lo12:.LANCHOR99
-	add	x0, x0, :lo12:.LANCHOR100
-	b	.L830
-.L819:
+.L834:
+	adrp	x0, .LANCHOR102
+	add	x2, x20, :lo12:.LANCHOR101
+	add	x0, x0, :lo12:.LANCHOR102
+	b	.L844
+.L833:
 	mov	w1, 7
 	mul	w1, w0, w1
 	lsr	w1, w1, 3
-	b	.L820
+	b	.L834
 	.size	zftl_gc_get_free_sblk, .-zftl_gc_get_free_sblk
 	.section	.text.zftl_get_free_sblk,"ax",@progbits
 	.align	2
@@ -4501,99 +4739,99 @@ zftl_get_free_sblk:
 	and	w20, w1, 65535
 	str	x21, [sp, 32]
 	cmp	w20, 5
-	bne	.L832
-	adrp	x2, .LANCHOR97
-	adrp	x0, .LANCHOR99
-	ldrh	w3, [x2, #:lo12:.LANCHOR97]
-	ldrh	w1, [x0, #:lo12:.LANCHOR99]
+	bne	.L846
+	adrp	x2, .LANCHOR99
+	adrp	x0, .LANCHOR101
+	ldrh	w3, [x2, #:lo12:.LANCHOR99]
+	ldrh	w1, [x0, #:lo12:.LANCHOR101]
 	cmp	w3, w1
-	bcc	.L833
-	adrp	x4, .LANCHOR95
-	ldrh	w4, [x4, #:lo12:.LANCHOR95]
+	bcc	.L847
+	adrp	x4, .LANCHOR97
+	ldrh	w4, [x4, #:lo12:.LANCHOR97]
 	cmp	w4, w3
-	bls	.L834
-	cbz	w1, .L834
-.L833:
-	add	x2, x0, :lo12:.LANCHOR99
+	bls	.L848
+	cbz	w1, .L848
+.L847:
+	add	x2, x0, :lo12:.LANCHOR101
 	lsr	w1, w1, 1
-.L853:
+.L867:
+	adrp	x0, .LANCHOR102
+	add	x0, x0, :lo12:.LANCHOR102
+	b	.L866
+.L848:
 	adrp	x0, .LANCHOR100
+	add	x2, x2, :lo12:.LANCHOR99
 	add	x0, x0, :lo12:.LANCHOR100
-	b	.L852
-.L834:
-	adrp	x0, .LANCHOR98
-	add	x2, x2, :lo12:.LANCHOR97
-	add	x0, x0, :lo12:.LANCHOR98
 	mov	w1, 0
-.L852:
+.L866:
 	bl	_list_pop_index_node
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	bne	.L837
-	adrp	x0, .LANCHOR99
+	bne	.L851
+	adrp	x0, .LANCHOR101
 	mov	w2, w20
 	mov	w1, w19
-	ldrh	w5, [x0, #:lo12:.LANCHOR99]
-	adrp	x0, .LANCHOR95
-	ldrh	w4, [x0, #:lo12:.LANCHOR95]
-	adrp	x0, .LANCHOR96
-	ldr	x3, [x0, #:lo12:.LANCHOR96]
-	adrp	x0, .LC53
-	add	x0, x0, :lo12:.LC53
+	ldrh	w5, [x0, #:lo12:.LANCHOR101]
+	adrp	x0, .LANCHOR97
+	ldrh	w4, [x0, #:lo12:.LANCHOR97]
+	adrp	x0, .LANCHOR98
+	ldr	x3, [x0, #:lo12:.LANCHOR98]
+	adrp	x0, .LC55
+	add	x0, x0, :lo12:.LC55
 	bl	printf
-	b	.L837
-.L832:
+	b	.L851
+.L846:
 	adrp	x21, .LANCHOR10
 	and	w0, w0, 65535
 	ldr	x1, [x21, #:lo12:.LANCHOR10]
 	ldrh	w19, [x1, 590]
 	mov	w1, 65535
 	cmp	w19, w1
-	beq	.L836
+	beq	.L850
 	cmp	w20, 1
-	beq	.L836
+	beq	.L850
 	mov	w1, w19
-	adrp	x0, .LC55
-	add	x0, x0, :lo12:.LC55
+	adrp	x0, .LC57
+	add	x0, x0, :lo12:.LC57
 	bl	printf
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	mov	w1, -1
 	strh	w1, [x0, 590]
-.L837:
+.L851:
 	mov	w0, w19
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L836:
-	adrp	x2, .LANCHOR95
-	adrp	x4, .LANCHOR99
-	ldrh	w1, [x2, #:lo12:.LANCHOR95]
-	ldrh	w3, [x4, #:lo12:.LANCHOR99]
+.L850:
+	adrp	x2, .LANCHOR97
+	adrp	x4, .LANCHOR101
+	ldrh	w1, [x2, #:lo12:.LANCHOR97]
+	ldrh	w3, [x4, #:lo12:.LANCHOR101]
 	cmp	w1, w3
-	bcc	.L838
-	adrp	x5, .LANCHOR97
-	ldrh	w5, [x5, #:lo12:.LANCHOR97]
+	bcc	.L852
+	adrp	x5, .LANCHOR99
+	ldrh	w5, [x5, #:lo12:.LANCHOR99]
 	cmp	w5, w1
-	bls	.L839
-	cbz	w3, .L839
-.L838:
+	bls	.L853
+	cbz	w3, .L853
+.L852:
 	cmp	w20, 1
 	lsr	w3, w3, 1
 	csel	w0, w3, w0, eq
-	add	x2, x4, :lo12:.LANCHOR99
+	add	x2, x4, :lo12:.LANCHOR101
 	mov	w1, w0
-	b	.L853
-.L839:
+	b	.L867
+.L853:
 	lsr	w1, w1, 1
 	cmp	w20, 1
 	csel	w0, w1, w0, eq
-	add	x2, x2, :lo12:.LANCHOR95
+	add	x2, x2, :lo12:.LANCHOR97
 	mov	w1, w0
-	adrp	x0, .LANCHOR96
-	add	x0, x0, :lo12:.LANCHOR96
-	b	.L852
+	adrp	x0, .LANCHOR98
+	add	x0, x0, :lo12:.LANCHOR98
+	b	.L866
 	.size	zftl_get_free_sblk, .-zftl_get_free_sblk
 	.section	.text.zftl_remove_data_node,"ax",@progbits
 	.align	2
@@ -4607,30 +4845,30 @@ zftl_remove_data_node:
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L855
-	adrp	x2, .LANCHOR90
+	bne	.L869
+	adrp	x2, .LANCHOR92
 	adrp	x0, .LANCHOR12
-	add	x2, x2, :lo12:.LANCHOR90
+	add	x2, x2, :lo12:.LANCHOR92
 	add	x0, x0, :lo12:.LANCHOR12
-.L858:
+.L872:
 	b	_list_remove_node
-.L855:
+.L869:
 	cmp	w2, 96
-	bne	.L856
-	adrp	x2, .LANCHOR88
-	adrp	x0, .LANCHOR81
-	add	x2, x2, :lo12:.LANCHOR88
-	add	x0, x0, :lo12:.LANCHOR81
-	b	.L858
-.L856:
+	bne	.L870
+	adrp	x2, .LANCHOR90
+	adrp	x0, .LANCHOR83
+	add	x2, x2, :lo12:.LANCHOR90
+	add	x0, x0, :lo12:.LANCHOR83
+	b	.L872
+.L870:
 	cmp	w2, 160
-	bne	.L854
-	adrp	x2, .LANCHOR92
-	adrp	x0, .LANCHOR80
-	add	x2, x2, :lo12:.LANCHOR92
-	add	x0, x0, :lo12:.LANCHOR80
-	b	.L858
-.L854:
+	bne	.L868
+	adrp	x2, .LANCHOR94
+	adrp	x0, .LANCHOR82
+	add	x2, x2, :lo12:.LANCHOR94
+	add	x0, x0, :lo12:.LANCHOR82
+	b	.L872
+.L868:
 	ret
 	.size	zftl_remove_data_node, .-zftl_remove_data_node
 	.section	.text.zftl_remove_free_node,"ax",@progbits
@@ -4644,27 +4882,27 @@ zftl_remove_free_node:
 	add	x0, x0, x1, uxth 2
 	ldrb	w0, [x0, 2]
 	ands	w0, w0, 24
-	bne	.L860
-	adrp	x2, .LANCHOR95
-	adrp	x0, .LANCHOR96
-	add	x2, x2, :lo12:.LANCHOR95
-	add	x0, x0, :lo12:.LANCHOR96
-.L862:
-	b	_list_remove_node
-.L860:
-	cmp	w0, 16
-	bne	.L861
+	bne	.L874
 	adrp	x2, .LANCHOR97
 	adrp	x0, .LANCHOR98
 	add	x2, x2, :lo12:.LANCHOR97
 	add	x0, x0, :lo12:.LANCHOR98
-	b	.L862
-.L861:
+.L876:
+	b	_list_remove_node
+.L874:
+	cmp	w0, 16
+	bne	.L875
 	adrp	x2, .LANCHOR99
 	adrp	x0, .LANCHOR100
 	add	x2, x2, :lo12:.LANCHOR99
 	add	x0, x0, :lo12:.LANCHOR100
-	b	.L862
+	b	.L876
+.L875:
+	adrp	x2, .LANCHOR101
+	adrp	x0, .LANCHOR102
+	add	x2, x2, :lo12:.LANCHOR101
+	add	x0, x0, :lo12:.LANCHOR102
+	b	.L876
 	.size	zftl_remove_free_node, .-zftl_remove_free_node
 	.section	.text.zftl_list_update_data_list,"ax",@progbits
 	.align	2
@@ -4678,30 +4916,30 @@ zftl_list_update_data_list:
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L864
-	adrp	x2, .LANCHOR90
+	bne	.L878
+	adrp	x2, .LANCHOR92
 	adrp	x0, .LANCHOR12
-	add	x2, x2, :lo12:.LANCHOR90
+	add	x2, x2, :lo12:.LANCHOR92
 	add	x0, x0, :lo12:.LANCHOR12
-.L867:
+.L881:
 	b	_list_update_data_list
-.L864:
+.L878:
 	cmp	w2, 96
-	bne	.L865
-	adrp	x2, .LANCHOR88
-	adrp	x0, .LANCHOR81
-	add	x2, x2, :lo12:.LANCHOR88
-	add	x0, x0, :lo12:.LANCHOR81
-	b	.L867
-.L865:
+	bne	.L879
+	adrp	x2, .LANCHOR90
+	adrp	x0, .LANCHOR83
+	add	x2, x2, :lo12:.LANCHOR90
+	add	x0, x0, :lo12:.LANCHOR83
+	b	.L881
+.L879:
 	cmp	w2, 160
-	bne	.L863
-	adrp	x2, .LANCHOR92
-	adrp	x0, .LANCHOR80
-	add	x2, x2, :lo12:.LANCHOR92
-	add	x0, x0, :lo12:.LANCHOR80
-	b	.L867
-.L863:
+	bne	.L877
+	adrp	x2, .LANCHOR94
+	adrp	x0, .LANCHOR82
+	add	x2, x2, :lo12:.LANCHOR94
+	add	x0, x0, :lo12:.LANCHOR82
+	b	.L881
+.L877:
 	ret
 	.size	zftl_list_update_data_list, .-zftl_list_update_data_list
 	.section	.text.print_list_info,"ax",@progbits
@@ -4717,21 +4955,21 @@ print_list_info:
 	stp	x19, x20, [sp, 48]
 	mov	x19, x0
 	stp	x21, x22, [sp, 64]
-	adrp	x0, .LC56
+	adrp	x0, .LC58
 	stp	x23, x24, [sp, 80]
-	add	x0, x0, :lo12:.LC56
+	add	x0, x0, :lo12:.LC58
 	bl	printf
 	ldr	x19, [x19]
-	cbz	x19, .L868
+	cbz	x19, .L882
 	mov	x24, -6148914691236517206
-	adrp	x22, .LC57
-	adrp	x21, .LANCHOR101
-	add	x22, x22, :lo12:.LC57
-	add	x21, x21, :lo12:.LANCHOR101
+	adrp	x22, .LC59
+	adrp	x21, .LANCHOR103
+	add	x22, x22, :lo12:.LC59
+	add	x21, x21, :lo12:.LANCHOR103
 	mov	w20, 0
 	adrp	x23, .LANCHOR4
 	movk	x24, 0xaaab, lsl 0
-.L872:
+.L886:
 	ldr	x2, [x23, #:lo12:.LANCHOR4]
 	adrp	x1, .LANCHOR7
 	adrp	x8, .LANCHOR9
@@ -4764,7 +5002,7 @@ print_list_info:
 	ldrh	w19, [x19]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L868
+	beq	.L882
 	ldr	x0, [x23, #:lo12:.LANCHOR4]
 	mov	w1, 6
 	add	w20, w20, 1
@@ -4772,8 +5010,8 @@ print_list_info:
 	umaddl	x19, w19, w1, x0
 	ldrh	w0, [x21]
 	cmp	w0, w20
-	bcs	.L872
-.L868:
+	bcs	.L886
+.L882:
 	ldp	x19, x20, [sp, 48]
 	ldp	x21, x22, [sp, 64]
 	ldp	x23, x24, [sp, 80]
@@ -4787,15 +5025,10 @@ print_list_info:
 	.type	dump_all_list_info, %function
 dump_all_list_info:
 	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR95
-	adrp	x0, .LANCHOR96
-	add	x1, x1, :lo12:.LANCHOR95
-	add	x29, sp, 0
-	add	x0, x0, :lo12:.LANCHOR96
-	bl	print_list_info
 	adrp	x1, .LANCHOR97
 	adrp	x0, .LANCHOR98
 	add	x1, x1, :lo12:.LANCHOR97
+	add	x29, sp, 0
 	add	x0, x0, :lo12:.LANCHOR98
 	bl	print_list_info
 	adrp	x1, .LANCHOR99
@@ -4803,21 +5036,26 @@ dump_all_list_info:
 	add	x1, x1, :lo12:.LANCHOR99
 	add	x0, x0, :lo12:.LANCHOR100
 	bl	print_list_info
-	adrp	x1, .LANCHOR90
+	adrp	x1, .LANCHOR101
+	adrp	x0, .LANCHOR102
+	add	x1, x1, :lo12:.LANCHOR101
+	add	x0, x0, :lo12:.LANCHOR102
+	bl	print_list_info
+	adrp	x1, .LANCHOR92
 	adrp	x0, .LANCHOR12
-	add	x1, x1, :lo12:.LANCHOR90
+	add	x1, x1, :lo12:.LANCHOR92
 	add	x0, x0, :lo12:.LANCHOR12
 	bl	print_list_info
-	adrp	x1, .LANCHOR88
-	adrp	x0, .LANCHOR81
-	add	x1, x1, :lo12:.LANCHOR88
-	add	x0, x0, :lo12:.LANCHOR81
+	adrp	x1, .LANCHOR90
+	adrp	x0, .LANCHOR83
+	add	x1, x1, :lo12:.LANCHOR90
+	add	x0, x0, :lo12:.LANCHOR83
 	bl	print_list_info
 	ldp	x29, x30, [sp], 16
-	adrp	x1, .LANCHOR92
-	adrp	x0, .LANCHOR80
-	add	x1, x1, :lo12:.LANCHOR92
-	add	x0, x0, :lo12:.LANCHOR80
+	adrp	x1, .LANCHOR94
+	adrp	x0, .LANCHOR82
+	add	x1, x1, :lo12:.LANCHOR94
+	add	x0, x0, :lo12:.LANCHOR82
 	b	print_list_info
 	.size	dump_all_list_info, .-dump_all_list_info
 	.section	.text.ftl_tmp_into_update,"ax",@progbits
@@ -4825,40 +5063,40 @@ dump_all_list_info:
 	.global	ftl_tmp_into_update
 	.type	ftl_tmp_into_update, %function
 ftl_tmp_into_update:
-	adrp	x0, .LANCHOR102
-	ldr	x0, [x0, #:lo12:.LANCHOR102]
+	adrp	x0, .LANCHOR104
+	ldr	x0, [x0, #:lo12:.LANCHOR104]
 	ldr	w1, [x0, 16]
 	cmp	w1, 2048
-	bls	.L877
+	bls	.L891
 	ldr	w2, [x0, 20]
 	add	w2, w2, w1, lsr 11
 	and	w1, w1, 2047
 	stp	w1, w2, [x0, 16]
-.L877:
+.L891:
 	ldr	w1, [x0, 24]
 	cmp	w1, 2048
-	bls	.L878
+	bls	.L892
 	ldr	w2, [x0, 28]
 	add	w2, w2, w1, lsr 11
 	and	w1, w1, 2047
 	stp	w1, w2, [x0, 24]
-.L878:
+.L892:
 	ldr	w1, [x0, 32]
 	cmp	w1, 1024
-	bls	.L879
+	bls	.L893
 	ldr	w2, [x0, 36]
 	add	w2, w2, w1, lsr 10
 	and	w1, w1, 1023
 	stp	w1, w2, [x0, 32]
-.L879:
+.L893:
 	ldr	w1, [x0, 40]
 	cmp	w1, 1024
-	bls	.L876
+	bls	.L890
 	ldr	w2, [x0, 44]
 	add	w2, w2, w1, lsr 10
 	and	w1, w1, 1023
 	stp	w1, w2, [x0, 40]
-.L876:
+.L890:
 	ret
 	.size	ftl_tmp_into_update, .-ftl_tmp_into_update
 	.section	.text.ftl_get_blk_list_in_sblk,"ax",@progbits
@@ -4868,58 +5106,61 @@ ftl_tmp_into_update:
 ftl_get_blk_list_in_sblk:
 	adrp	x2, .LANCHOR7
 	and	w0, w0, 65535
-	adrp	x7, .LANCHOR66
-	add	x7, x7, :lo12:.LANCHOR66
+	mov	w7, 24
+	adrp	x8, .LANCHOR68
 	ldr	x2, [x2, #:lo12:.LANCHOR7]
+	add	x8, x8, :lo12:.LANCHOR68
 	mov	w3, 0
-	mov	w13, 21
 	add	x2, x2, x0, uxth 2
-	ldrb	w12, [x2, 3]
-	adrp	x2, .LANCHOR78
-	ldrb	w10, [x2, #:lo12:.LANCHOR78]
-	adrp	x2, .LANCHOR67
-	ldrb	w6, [x2, #:lo12:.LANCHOR67]
+	ldrb	w13, [x2, 3]
+	adrp	x2, .LANCHOR80
+	ldrb	w11, [x2, #:lo12:.LANCHOR80]
+	adrp	x2, .LANCHOR69
+	ldrb	w6, [x2, #:lo12:.LANCHOR69]
+	adrp	x2, .LANCHOR31
+	ldrb	w2, [x2, #:lo12:.LANCHOR31]
+	sub	w7, w7, w2
 	and	w2, w6, 65535
 	mul	w0, w0, w2
 	sub	w2, w2, #1
 	sxth	w5, w2
 	and	w4, w0, 65535
 	mov	w0, 0
-.L882:
-	cmp	w3, w10
-	blt	.L886
+.L896:
+	cmp	w3, w11
+	blt	.L900
 	sxtw	x2, w0
 	mov	w3, -1
-.L887:
-	cmp	w10, w2
-	bgt	.L888
+.L901:
+	cmp	w11, w2
+	bgt	.L902
 	ret
-.L886:
-	asr	w2, w12, w3
-	tbnz	x2, 0, .L883
+.L900:
+	asr	w2, w13, w3
+	tbnz	x2, 0, .L897
 	sdiv	w2, w3, w6
-	ldrh	w8, [x7]
-	sbfiz	x11, x0, 1, 32
+	ldrh	w10, [x8]
+	sbfiz	x12, x0, 1, 32
 	cmp	w6, 1
-	sub	w8, w13, w8
-	lsl	w2, w2, w8
+	sub	w10, w7, w10
+	lsl	w2, w2, w10
 	add	w2, w4, w2
 	and	w2, w2, 65535
-	bhi	.L884
-.L889:
+	bhi	.L898
+.L903:
 	add	w0, w0, 1
-	strh	w2, [x1, x11]
-.L883:
+	strh	w2, [x1, x12]
+.L897:
 	add	w3, w3, 1
-	b	.L882
-.L884:
-	and	w8, w5, w3
-	add	w2, w2, w8
-	b	.L889
-.L888:
+	b	.L896
+.L898:
+	and	w10, w5, w3
+	add	w2, w2, w10
+	b	.L903
+.L902:
 	strh	w3, [x1, x2, lsl 1]
 	add	x2, x2, 1
-	b	.L887
+	b	.L901
 	.size	ftl_get_blk_list_in_sblk, .-ftl_get_blk_list_in_sblk
 	.section	.text.ftl_erase_phy_blk,"ax",@progbits
 	.align	2
@@ -4931,32 +5172,35 @@ ftl_erase_phy_blk:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	mov	w21, w1
-	adrp	x1, .LANCHOR66
+	adrp	x1, .LANCHOR31
 	stp	x19, x20, [sp, 16]
-	mov	w19, 21
-	adrp	x22, .LANCHOR103
-	ldrh	w1, [x1, #:lo12:.LANCHOR66]
+	adrp	x22, .LANCHOR105
+	ldrb	w19, [x1, #:lo12:.LANCHOR31]
+	mov	w1, 24
+	sub	w19, w1, w19
+	adrp	x1, .LANCHOR68
+	ldrh	w1, [x1, #:lo12:.LANCHOR68]
 	sub	w1, w19, w1
 	mov	w19, 1
 	lsl	w19, w19, w1
 	sub	w19, w19, #1
 	and	w19, w19, w0
 	asr	w20, w0, w1
-	adrp	x0, .LANCHOR72
+	adrp	x0, .LANCHOR74
 	sxth	w19, w19
-	ldrb	w0, [x0, #:lo12:.LANCHOR72]
-	cbz	w0, .L891
-	adrp	x0, .LANCHOR73
-	ldrb	w0, [x0, #:lo12:.LANCHOR73]
-	cbnz	w0, .L891
-	ldrh	w2, [x22, #:lo12:.LANCHOR103]
+	ldrb	w0, [x0, #:lo12:.LANCHOR74]
+	cbz	w0, .L905
+	adrp	x0, .LANCHOR75
+	ldrb	w0, [x0, #:lo12:.LANCHOR75]
+	cbnz	w0, .L905
+	ldrh	w2, [x22, #:lo12:.LANCHOR105]
 	cmp	w21, 0
 	cset	w1, eq
 	mov	w0, w20
 	mul	w2, w2, w19
 	bl	flash_erase_block_en
-.L891:
-	ldrh	w2, [x22, #:lo12:.LANCHOR103]
+.L905:
+	ldrh	w2, [x22, #:lo12:.LANCHOR105]
 	mov	w1, w21
 	mov	w0, w20
 	ldp	x21, x22, [sp, 32]
@@ -4977,56 +5221,56 @@ ftl_erase_sblk:
 	stp	x25, x26, [sp, 64]
 	and	w26, w0, 65535
 	ldr	x0, [x23, #:lo12:.LANCHOR7]
-	adrp	x25, .LANCHOR104
+	adrp	x25, .LANCHOR106
 	stp	x21, x22, [sp, 32]
 	ubfiz	x22, x26, 2, 16
 	add	x0, x0, x22
 	stp	x27, x28, [sp, 80]
 	stp	x19, x20, [sp, 16]
-	adrp	x24, .LANCHOR67
+	adrp	x24, .LANCHOR69
 	mov	w20, w1
-	add	x25, x25, :lo12:.LANCHOR104
+	add	x25, x25, :lo12:.LANCHOR106
 	ldrb	w28, [x0, 3]
-	add	x24, x24, :lo12:.LANCHOR67
+	add	x24, x24, :lo12:.LANCHOR69
 	add	x27, x29, 112
 	mov	w19, 0
-.L897:
+.L911:
 	ldrb	w0, [x25]
 	cmp	w19, w0
-	bge	.L908
+	bge	.L922
 	ldrb	w1, [x24]
-	adrp	x0, .LANCHOR103
+	adrp	x0, .LANCHOR105
 	mov	w21, 0
-	ldrh	w3, [x0, #:lo12:.LANCHOR103]
+	ldrh	w3, [x0, #:lo12:.LANCHOR105]
 	sub	w4, w1, #1
 	mov	w0, 0
 	mul	w6, w19, w1
 	mul	w5, w26, w1
-	b	.L909
-.L899:
+	b	.L923
+.L913:
 	add	w2, w0, w6
 	asr	w2, w28, w2
-	tbnz	x2, 0, .L898
+	tbnz	x2, 0, .L912
 	and	w2, w0, w4
 	add	w2, w2, w5
 	mul	w2, w2, w3
 	str	w2, [x27, w21, sxtw 2]
 	add	w21, w21, 1
-.L898:
+.L912:
 	add	w0, w0, 1
-.L909:
+.L923:
 	cmp	w0, w1
-	blt	.L899
+	blt	.L913
 	cmp	w1, 4
-	bne	.L900
+	bne	.L914
 	mov	x3, 0
-.L901:
+.L915:
 	cmp	w21, w3
-	bgt	.L902
-.L903:
+	bgt	.L916
+.L917:
 	add	w19, w19, 1
-	b	.L897
-.L902:
+	b	.L911
+.L916:
 	ldr	w2, [x27, x3, lsl 2]
 	mov	w1, w20
 	str	x3, [x29, 104]
@@ -5034,65 +5278,65 @@ ftl_erase_sblk:
 	bl	flash_erase_block_en
 	ldr	x3, [x29, 104]
 	add	x3, x3, 1
-	b	.L901
-.L900:
+	b	.L915
+.L914:
 	cmp	w21, 2
-	bne	.L904
-	adrp	x0, .LANCHOR72
-	ldrb	w0, [x0, #:lo12:.LANCHOR72]
-	cbz	w0, .L905
-	adrp	x0, .LANCHOR73
-	ldrb	w0, [x0, #:lo12:.LANCHOR73]
-	cbnz	w0, .L905
+	bne	.L918
+	adrp	x0, .LANCHOR74
+	ldrb	w0, [x0, #:lo12:.LANCHOR74]
+	cbz	w0, .L919
+	adrp	x0, .LANCHOR75
+	ldrb	w0, [x0, #:lo12:.LANCHOR75]
+	cbnz	w0, .L919
 	ldp	w2, w3, [x29, 112]
 	cmp	w20, 0
 	cset	w1, eq
 	mov	w0, w19
 	bl	flash_erase_duplane_block
-.L905:
+.L919:
 	ldp	w2, w3, [x29, 112]
 	mov	w1, w20
 	mov	w0, w19
 	bl	flash_erase_duplane_block
-	b	.L903
-.L904:
+	b	.L917
+.L918:
 	cmp	w21, 1
-	bne	.L903
-	adrp	x0, .LANCHOR72
-	ldrb	w0, [x0, #:lo12:.LANCHOR72]
-	cbz	w0, .L907
-	adrp	x0, .LANCHOR73
-	ldrb	w0, [x0, #:lo12:.LANCHOR73]
-	cbnz	w0, .L907
+	bne	.L917
+	adrp	x0, .LANCHOR74
+	ldrb	w0, [x0, #:lo12:.LANCHOR74]
+	cbz	w0, .L921
+	adrp	x0, .LANCHOR75
+	ldrb	w0, [x0, #:lo12:.LANCHOR75]
+	cbnz	w0, .L921
 	ldr	w2, [x29, 112]
 	cmp	w20, 0
 	cset	w1, eq
 	mov	w0, w19
 	bl	flash_erase_block_en
-.L907:
+.L921:
 	ldr	w2, [x29, 112]
 	mov	w1, w20
 	mov	w0, w19
 	bl	flash_erase_block_en
-	b	.L903
-.L908:
-	adrp	x2, .LANCHOR102
+	b	.L917
+.L922:
+	adrp	x2, .LANCHOR104
 	ldr	x3, [x23, #:lo12:.LANCHOR7]
-	cbnz	w20, .L910
+	cbnz	w20, .L924
 	ldrh	w1, [x3, x22]
 	add	w0, w1, 1
 	and	w0, w0, 2047
 	bfi	w1, w0, 0, 11
 	strh	w1, [x3, x22]
-	ldr	x1, [x2, #:lo12:.LANCHOR102]
+	ldr	x1, [x2, #:lo12:.LANCHOR104]
 	ldr	w2, [x1, 84]
 	add	w2, w2, 1
 	str	w2, [x1, 84]
 	ldrh	w2, [x1, 96]
 	cmp	w2, w0
-	bge	.L912
+	bge	.L926
 	strh	w0, [x1, 96]
-.L912:
+.L926:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -5101,7 +5345,7 @@ ftl_erase_sblk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L910:
+.L924:
 	ldr	w1, [x3, x22]
 	ubfx	x0, x1, 11, 8
 	add	w0, w0, 1
@@ -5109,15 +5353,15 @@ ftl_erase_sblk:
 	bfi	w1, w0, 11, 8
 	str	w1, [x3, x22]
 	and	w0, w0, 65535
-	ldr	x1, [x2, #:lo12:.LANCHOR102]
+	ldr	x1, [x2, #:lo12:.LANCHOR104]
 	ldr	w2, [x1, 80]
 	add	w2, w2, 1
 	str	w2, [x1, 80]
 	ldrh	w2, [x1, 98]
 	cmp	w2, w0
-	bcs	.L912
+	bcs	.L926
 	strh	w0, [x1, 98]
-	b	.L912
+	b	.L926
 	.size	ftl_erase_sblk, .-ftl_erase_sblk
 	.section	.text.ftl_alloc_sys_blk,"ax",@progbits
 	.align	2
@@ -5125,44 +5369,44 @@ ftl_erase_sblk:
 	.type	ftl_alloc_sys_blk, %function
 ftl_alloc_sys_blk:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR102
+	adrp	x0, .LANCHOR104
 	add	x29, sp, 0
-	ldr	x1, [x0, #:lo12:.LANCHOR102]
+	ldr	x1, [x0, #:lo12:.LANCHOR104]
 	ldrh	w2, [x1, 136]
 	str	x19, [sp, 16]
 	mov	x19, x0
 	cmp	w2, 63
-	bls	.L922
+	bls	.L936
 	strh	wzr, [x1, 136]
-.L922:
+.L936:
 	ldrh	w0, [x1, 112]
-	cbnz	w0, .L923
-	adrp	x1, .LANCHOR105
+	cbnz	w0, .L937
+	adrp	x1, .LANCHOR107
 	adrp	x0, .LC0
-	mov	w2, 1130
-	add	x1, x1, :lo12:.LANCHOR105
+	mov	w2, 1140
+	add	x1, x1, :lo12:.LANCHOR107
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L923:
-	ldr	x1, [x19, #:lo12:.LANCHOR102]
+.L937:
+	ldr	x1, [x19, #:lo12:.LANCHOR104]
 	mov	w5, 65535
-.L926:
+.L940:
 	ldrh	w2, [x1, 136]
-.L924:
+.L938:
 	mov	w3, w2
 	cmp	w2, 63
-	ble	.L925
+	ble	.L939
 	strh	wzr, [x1, 136]
-	b	.L926
-.L925:
+	b	.L940
+.L939:
 	add	x4, x2, 1
 	add	x0, x1, x4, lsl 1
 	ldrh	w0, [x0, 158]
 	cmp	w0, w5
-	bne	.L929
+	bne	.L943
 	mov	x2, x4
-	b	.L924
-.L929:
+	b	.L938
+.L943:
 	add	x3, x1, x3, sxtw 1
 	mov	w4, -1
 	ldr	x19, [sp, 16]
@@ -5183,40 +5427,40 @@ ftl_free_sys_blk:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 65535
-	adrp	x0, .LANCHOR102
+	adrp	x0, .LANCHOR104
 	mov	x19, x0
-	ldr	x1, [x0, #:lo12:.LANCHOR102]
+	ldr	x1, [x0, #:lo12:.LANCHOR104]
 	ldrh	w2, [x1, 138]
 	cmp	w2, 63
-	bls	.L932
+	bls	.L946
 	strh	wzr, [x1, 138]
-.L932:
+.L946:
 	ldrh	w0, [x1, 112]
 	cmp	w0, 63
-	bls	.L933
-	adrp	x1, .LANCHOR106
+	bls	.L947
+	adrp	x1, .LANCHOR108
 	adrp	x0, .LC0
-	mov	w2, 1154
-	add	x1, x1, :lo12:.LANCHOR106
+	mov	w2, 1164
+	add	x1, x1, :lo12:.LANCHOR108
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L933:
-	ldr	x0, [x19, #:lo12:.LANCHOR102]
+.L947:
+	ldr	x0, [x19, #:lo12:.LANCHOR104]
 	mov	w4, 65535
-.L936:
+.L950:
 	ldrh	w1, [x0, 138]
-.L934:
+.L948:
 	mov	w2, w1
 	cmp	w1, 63
-	ble	.L935
+	ble	.L949
 	strh	wzr, [x0, 138]
-	b	.L936
-.L935:
+	b	.L950
+.L949:
 	add	x3, x1, 1
 	add	x5, x0, x3, lsl 1
 	ldrh	w5, [x5, 158]
 	cmp	w5, w4
-	bne	.L937
+	bne	.L951
 	add	x2, x0, x2, sxtw 1
 	strh	w20, [x2, 160]
 	strh	w1, [x0, 138]
@@ -5226,9 +5470,9 @@ ftl_free_sys_blk:
 	strh	w1, [x0, 112]
 	ldp	x29, x30, [sp], 32
 	ret
-.L937:
+.L951:
 	mov	x1, x3
-	b	.L934
+	b	.L948
 	.size	ftl_free_sys_blk, .-ftl_free_sys_blk
 	.section	.text.ftl_info_data_recovery,"ax",@progbits
 	.align	2
@@ -5238,7 +5482,7 @@ ftl_info_data_recovery:
 	ldrh	w2, [x0]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L950
+	beq	.L964
 	stp	x29, x30, [sp, -48]!
 	adrp	x1, .LANCHOR7
 	add	x29, sp, 0
@@ -5249,25 +5493,25 @@ ftl_info_data_recovery:
 	add	x21, x20, x19
 	ldrb	w1, [x21, 2]
 	tst	w1, 224
-	bne	.L940
+	bne	.L954
 	ldrb	w0, [x0, 4]
 	bfi	w1, w0, 5, 3
 	strb	w1, [x21, 2]
 	mov	w0, w2
 	bl	zftl_remove_free_node
 	ldrb	w0, [x21, 2]
-	adrp	x1, .LANCHOR102
-	ldr	x3, [x1, #:lo12:.LANCHOR102]
-	tbz	x0, 3, .L944
+	adrp	x1, .LANCHOR104
+	ldr	x3, [x1, #:lo12:.LANCHOR104]
+	tbz	x0, 3, .L958
 	ldrh	w2, [x3, 116]
 	sub	w2, w2, #1
 	strh	w2, [x3, 116]
-.L945:
+.L959:
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L947
+	bne	.L961
 	ldr	w0, [x20, x19]
-	ldr	x1, [x1, #:lo12:.LANCHOR102]
+	ldr	x1, [x1, #:lo12:.LANCHOR104]
 	ubfx	x2, x0, 11, 8
 	add	w2, w2, 1
 	bfi	w0, w2, 11, 8
@@ -5275,44 +5519,44 @@ ftl_info_data_recovery:
 	ldrh	w0, [x1, 120]
 	sub	w0, w0, #1
 	strh	w0, [x1, 120]
-.L940:
+.L954:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L944:
+.L958:
 	tst	w0, 24
-	bne	.L946
+	bne	.L960
 	ldrh	w2, [x3, 114]
 	sub	w2, w2, #1
 	strh	w2, [x3, 114]
-	b	.L945
-.L946:
-	ldrh	w2, [x3, 118]
+	b	.L959
+.L960:
+	ldrh	w2, [x3, 118]
 	sub	w2, w2, #1
 	strh	w2, [x3, 118]
-	b	.L945
-.L947:
+	b	.L959
+.L961:
 	ldrh	w2, [x20, x19]
 	cmp	w0, 64
 	add	w3, w2, 1
 	bfi	w2, w3, 0, 11
 	strh	w2, [x20, x19]
-	bne	.L948
-	ldr	x1, [x1, #:lo12:.LANCHOR102]
+	bne	.L962
+	ldr	x1, [x1, #:lo12:.LANCHOR104]
 	ldrh	w0, [x1, 122]
 	sub	w0, w0, #1
 	strh	w0, [x1, 122]
-	b	.L940
-.L948:
+	b	.L954
+.L962:
 	cmp	w0, 96
-	bne	.L940
-	ldr	x1, [x1, #:lo12:.LANCHOR102]
+	bne	.L954
+	ldr	x1, [x1, #:lo12:.LANCHOR104]
 	ldrh	w0, [x1, 124]
 	sub	w0, w0, #1
 	strh	w0, [x1, 124]
-	b	.L940
-.L950:
+	b	.L954
+.L964:
 	ret
 	.size	ftl_info_data_recovery, .-ftl_info_data_recovery
 	.section	.text.ftl_get_ppa_from_index,"ax",@progbits
@@ -5322,19 +5566,19 @@ ftl_info_data_recovery:
 ftl_get_ppa_from_index:
 	stp	x29, x30, [sp, -32]!
 	adrp	x1, .LANCHOR10
-	adrp	x3, .LANCHOR78
+	adrp	x3, .LANCHOR80
 	and	w0, w0, 65535
 	add	x29, sp, 0
 	ldr	x2, [x1, #:lo12:.LANCHOR10]
-	adrp	x1, .LANCHOR85
-	ldrb	w3, [x3, #:lo12:.LANCHOR78]
-	ldrh	w1, [x1, #:lo12:.LANCHOR85]
+	adrp	x1, .LANCHOR87
+	ldrb	w3, [x3, #:lo12:.LANCHOR80]
+	ldrh	w1, [x1, #:lo12:.LANCHOR87]
 	stp	x19, x20, [sp, 16]
 	mul	w1, w1, w3
 	cmp	w0, w1
-	bge	.L954
+	bge	.L968
 	add	x2, x2, 16
-.L955:
+.L969:
 	ldrb	w1, [x2, 9]
 	sdiv	w19, w0, w1
 	msub	w0, w19, w1, w0
@@ -5342,25 +5586,25 @@ ftl_get_ppa_from_index:
 	ldrh	w20, [x0, 16]
 	mov	w0, 65535
 	cmp	w20, w0
-	bne	.L956
-	adrp	x1, .LANCHOR107
+	bne	.L970
+	adrp	x1, .LANCHOR109
 	adrp	x0, .LC0
-	mov	w2, 1593
-	add	x1, x1, :lo12:.LANCHOR107
+	mov	w2, 1686
+	add	x1, x1, :lo12:.LANCHOR109
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L956:
-	adrp	x0, .LANCHOR103
-	ldrh	w0, [x0, #:lo12:.LANCHOR103]
+.L970:
+	adrp	x0, .LANCHOR105
+	ldrh	w0, [x0, #:lo12:.LANCHOR105]
 	madd	w0, w0, w20, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L954:
+.L968:
 	sub	w0, w0, w1
 	add	x2, x2, 48
 	and	w0, w0, 65535
-	b	.L955
+	b	.L969
 	.size	ftl_get_ppa_from_index, .-ftl_get_ppa_from_index
 	.section	.text.lpa_hash_get_ppa,"ax",@progbits
 	.align	2
@@ -5368,29 +5612,29 @@ ftl_get_ppa_from_index:
 	.type	lpa_hash_get_ppa, %function
 lpa_hash_get_ppa:
 	and	x2, x0, 255
-	adrp	x1, .LANCHOR108
-	add	x1, x1, :lo12:.LANCHOR108
+	adrp	x1, .LANCHOR110
+	add	x1, x1, :lo12:.LANCHOR110
 	mov	w3, 65535
 	ldrh	w1, [x1, x2, lsl 1]
-	adrp	x2, .LANCHOR109
-	ldr	x4, [x2, #:lo12:.LANCHOR109]
-	adrp	x2, .LANCHOR110
-	ldr	x5, [x2, #:lo12:.LANCHOR110]
-.L959:
+	adrp	x2, .LANCHOR111
+	ldr	x4, [x2, #:lo12:.LANCHOR111]
+	adrp	x2, .LANCHOR112
+	ldr	x5, [x2, #:lo12:.LANCHOR112]
+.L973:
 	cmp	w1, w3
-	bne	.L961
+	bne	.L975
 	mov	w0, -1
 	ret
-.L961:
+.L975:
 	uxtw	x2, w1
 	ldr	w6, [x4, x2, lsl 2]
 	cmp	w0, w6
-	bne	.L960
+	bne	.L974
 	mov	w0, w1
 	b	ftl_get_ppa_from_index
-.L960:
+.L974:
 	ldrh	w1, [x5, x2, lsl 1]
-	b	.L959
+	b	.L973
 	.size	lpa_hash_get_ppa, .-lpa_hash_get_ppa
 	.section	.text.ftl_get_new_free_page,"ax",@progbits
 	.align	2
@@ -5404,50 +5648,50 @@ ftl_get_new_free_page:
 	mov	x19, x0
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L963
-	adrp	x1, .LANCHOR111
+	bne	.L977
+	adrp	x1, .LANCHOR113
 	adrp	x0, .LC0
-	mov	w2, 1716
-	add	x1, x1, :lo12:.LANCHOR111
+	mov	w2, 1809
+	add	x1, x1, :lo12:.LANCHOR113
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L963:
-	adrp	x0, .LANCHOR85
+.L977:
+	adrp	x0, .LANCHOR87
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x0, #:lo12:.LANCHOR85]
+	ldrh	w0, [x0, #:lo12:.LANCHOR87]
 	cmp	w1, w0
-	bne	.L964
-	adrp	x1, .LANCHOR111
+	bne	.L978
+	adrp	x1, .LANCHOR113
 	adrp	x0, .LC0
-	mov	w2, 1717
-	add	x1, x1, :lo12:.LANCHOR111
+	mov	w2, 1810
+	add	x1, x1, :lo12:.LANCHOR113
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L964:
+.L978:
 	ldrh	w0, [x19, 6]
-	cbnz	w0, .L965
-	adrp	x1, .LANCHOR111
+	cbnz	w0, .L979
+	adrp	x1, .LANCHOR113
 	adrp	x0, .LC0
-	mov	w2, 1718
-	add	x1, x1, :lo12:.LANCHOR111
+	mov	w2, 1811
+	add	x1, x1, :lo12:.LANCHOR113
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L965:
+.L979:
 	ldrb	w0, [x19, 5]
 	mov	w2, 65535
 	add	x0, x0, 8
 	ldrh	w3, [x19, x0, lsl 1]
-	adrp	x0, .LANCHOR78
-	ldrb	w4, [x0, #:lo12:.LANCHOR78]
-.L966:
+	adrp	x0, .LANCHOR80
+	ldrb	w4, [x0, #:lo12:.LANCHOR80]
+.L980:
 	cmp	w3, w2
 	ldrb	w1, [x19, 5]
-	beq	.L968
-	adrp	x0, .LANCHOR103
+	beq	.L982
+	adrp	x0, .LANCHOR105
 	add	w1, w1, 1
 	and	w1, w1, 255
 	ldrh	w2, [x19, 2]
-	ldrh	w0, [x0, #:lo12:.LANCHOR103]
+	ldrh	w0, [x0, #:lo12:.LANCHOR105]
 	cmp	w4, w1
 	strb	w1, [x19, 5]
 	mul	w0, w0, w3
@@ -5458,29 +5702,29 @@ ftl_get_new_free_page:
 	orr	w0, w0, w2
 	add	w3, w3, 1
 	strh	w3, [x19, 10]
-	bne	.L962
+	bne	.L976
 	add	w2, w2, 1
 	strb	wzr, [x19, 5]
 	strh	w2, [x19, 2]
-.L962:
+.L976:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L968:
+.L982:
 	add	w1, w1, 1
 	and	w1, w1, 255
 	strb	w1, [x19, 5]
 	cmp	w1, w4
-	bne	.L967
+	bne	.L981
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 5]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L967:
+.L981:
 	ldrb	w0, [x19, 5]
 	add	x0, x0, 8
 	ldrh	w3, [x19, x0, lsl 1]
-	b	.L966
+	b	.L980
 	.size	ftl_get_new_free_page, .-ftl_get_new_free_page
 	.section	.text.ftl_ext_alloc_new_blk,"ax",@progbits
 	.align	2
@@ -5496,22 +5740,22 @@ ftl_ext_alloc_new_blk:
 	mov	w19, w0
 	sub	w0, w0, #1
 	cmp	w1, w0, uxth
-	bcs	.L972
-	adrp	x1, .LANCHOR112
+	bcs	.L986
+	adrp	x1, .LANCHOR114
 	adrp	x0, .LC0
-	mov	w2, 1749
-	add	x1, x1, :lo12:.LANCHOR112
+	mov	w2, 1842
+	add	x1, x1, :lo12:.LANCHOR114
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L972:
-	adrp	x20, .LANCHOR102
+.L986:
+	adrp	x20, .LANCHOR104
 	mov	w1, 0
 	mov	w0, w19
 	bl	ftl_erase_phy_blk
-	ldr	x0, [x20, #:lo12:.LANCHOR102]
+	ldr	x0, [x20, #:lo12:.LANCHOR104]
 	ldrh	w0, [x0, 130]
 	bl	ftl_free_sys_blk
-	ldr	x0, [x20, #:lo12:.LANCHOR102]
+	ldr	x0, [x20, #:lo12:.LANCHOR104]
 	strh	w19, [x0, 130]
 	strh	wzr, [x0, 140]
 	mov	w0, 0
@@ -5524,18 +5768,18 @@ ftl_ext_alloc_new_blk:
 	.global	ftl_total_vpn_update
 	.type	ftl_total_vpn_update, %function
 ftl_total_vpn_update:
-	adrp	x2, .LANCHOR113
+	adrp	x2, .LANCHOR115
 	mov	x3, x2
-	ldrh	w1, [x2, #:lo12:.LANCHOR113]
+	ldrh	w1, [x2, #:lo12:.LANCHOR115]
 	cmp	w1, 4
-	bhi	.L975
-	cbnz	w0, .L975
+	bhi	.L989
+	cbnz	w0, .L989
 	add	w1, w1, 1
-	strh	w1, [x2, #:lo12:.LANCHOR113]
+	strh	w1, [x2, #:lo12:.LANCHOR115]
 	ret
-.L975:
+.L989:
 	adrp	x0, .LANCHOR6
-	strh	wzr, [x3, #:lo12:.LANCHOR113]
+	strh	wzr, [x3, #:lo12:.LANCHOR115]
 	mov	x1, 0
 	mov	w2, 0
 	ldrh	w5, [x0, #:lo12:.LANCHOR6]
@@ -5545,37 +5789,37 @@ ftl_total_vpn_update:
 	adrp	x0, .LANCHOR7
 	ldr	x7, [x0, #:lo12:.LANCHOR7]
 	mov	w0, 0
-.L977:
+.L991:
 	cmp	w5, w1, uxth
-	bhi	.L980
+	bhi	.L994
 	adrp	x1, .LANCHOR10
 	ldr	x1, [x1, #:lo12:.LANCHOR10]
 	str	w2, [x1, 524]
-	adrp	x2, .LANCHOR102
+	adrp	x2, .LANCHOR104
 	str	w0, [x1, 528]
-	ldr	x2, [x2, #:lo12:.LANCHOR102]
+	ldr	x2, [x2, #:lo12:.LANCHOR104]
 	ldrh	w2, [x2, 120]
-	cbz	w2, .L974
+	cbz	w2, .L988
 	udiv	w0, w0, w2
 	str	w0, [x1, 532]
-.L974:
+.L988:
 	ret
-.L980:
+.L994:
 	ldrh	w3, [x6, x1, lsl 1]
 	cmp	w3, w8
-	beq	.L978
+	beq	.L992
 	add	x4, x7, x1, lsl 2
 	ldrb	w4, [x4, 2]
 	and	w4, w4, 224
 	cmp	w4, 160
-	bne	.L979
+	bne	.L993
 	add	w0, w0, w3
-.L978:
+.L992:
 	add	x1, x1, 1
-	b	.L977
-.L979:
+	b	.L991
+.L993:
 	add	w2, w2, w3
-	b	.L978
+	b	.L992
 	.size	ftl_total_vpn_update, .-ftl_total_vpn_update
 	.section	.text.ftl_debug_info_fill,"ax",@progbits
 	.align	2
@@ -5600,17 +5844,17 @@ ftl_vpn_update:
 	ubfiz	x19, x19, 1, 16
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, x19]
-	cbnz	w0, .L988
-	adrp	x1, .LANCHOR114
+	cbnz	w0, .L1002
+	adrp	x1, .LANCHOR116
 	mov	w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR114]
-.L986:
+	str	w0, [x1, #:lo12:.LANCHOR116]
+.L1000:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L988:
+.L1002:
 	mov	w0, 0
-	b	.L986
+	b	.L1000
 	.size	ftl_vpn_update, .-ftl_vpn_update
 	.section	.text.ftl_vpn_decrement,"ax",@progbits
 	.align	2
@@ -5623,57 +5867,57 @@ ftl_vpn_decrement:
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L991
+	beq	.L1005
 	adrp	x0, .LANCHOR9
 	uxtw	x1, w19
 	lsl	x2, x1, 1
 	ldr	x3, [x0, #:lo12:.LANCHOR9]
 	ldrh	w0, [x3, x2]
-	cbnz	w0, .L992
+	cbnz	w0, .L1006
 	adrp	x0, .LANCHOR7
 	mov	w2, 0
 	ldr	x0, [x0, #:lo12:.LANCHOR7]
 	add	x1, x0, x1, lsl 2
-	adrp	x0, .LC58
-	add	x0, x0, :lo12:.LC58
+	adrp	x0, .LC60
+	add	x0, x0, :lo12:.LC60
 	ldrb	w3, [x1, 2]
 	mov	w1, w19
 	ubfx	x3, x3, 5, 3
 	bl	printf
-.L997:
+.L1011:
 	mov	w0, 0
-	b	.L990
-.L992:
+	b	.L1004
+.L1006:
 	sub	w0, w0, #1
 	strh	w0, [x3, x2]
-.L991:
-	adrp	x20, .LANCHOR64
-	ldrh	w0, [x20, #:lo12:.LANCHOR64]
+.L1005:
+	adrp	x20, .LANCHOR66
+	ldrh	w0, [x20, #:lo12:.LANCHOR66]
 	cmp	w19, w0
-	beq	.L997
+	beq	.L1011
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L994
-	strh	w19, [x20, #:lo12:.LANCHOR64]
-	b	.L997
-.L994:
+	bne	.L1008
+	strh	w19, [x20, #:lo12:.LANCHOR66]
+	b	.L1011
+.L1008:
 	bl	ftl_vpn_update
 	cmp	w0, 0
-	adrp	x1, .LANCHOR115
+	adrp	x1, .LANCHOR117
 	cset	w0, ne
-	ldrh	w3, [x20, #:lo12:.LANCHOR64]
-	ldrh	w2, [x1, #:lo12:.LANCHOR115]
-	strh	w19, [x20, #:lo12:.LANCHOR64]
+	ldrh	w3, [x20, #:lo12:.LANCHOR66]
+	ldrh	w2, [x1, #:lo12:.LANCHOR117]
+	strh	w19, [x20, #:lo12:.LANCHOR66]
 	add	w2, w2, 1
 	and	w2, w2, 65535
 	cmp	w2, 7
 	csel	w2, w2, wzr, ls
-	strh	w2, [x1, #:lo12:.LANCHOR115]
+	strh	w2, [x1, #:lo12:.LANCHOR117]
 	and	x2, x2, 65535
-	adrp	x1, .LANCHOR65
-	add	x1, x1, :lo12:.LANCHOR65
+	adrp	x1, .LANCHOR67
+	add	x1, x1, :lo12:.LANCHOR67
 	strh	w3, [x1, x2, lsl 1]
-.L990:
+.L1004:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -5683,73 +5927,76 @@ ftl_vpn_decrement:
 	.global	lpa_hash_update_ppa
 	.type	lpa_hash_update_ppa, %function
 lpa_hash_update_ppa:
-	adrp	x3, .LANCHOR108
+	adrp	x3, .LANCHOR110
 	and	x5, x0, 255
-	add	x4, x3, :lo12:.LANCHOR108
+	add	x4, x3, :lo12:.LANCHOR110
 	mov	w7, 65535
 	and	w2, w2, 65535
 	mov	w12, w7
 	ldrh	w6, [x4, x5, lsl 1]
-	adrp	x4, .LANCHOR109
-	ldr	x8, [x4, #:lo12:.LANCHOR109]
-	adrp	x4, .LANCHOR110
-	ldr	x4, [x4, #:lo12:.LANCHOR110]
-.L1000:
+	adrp	x4, .LANCHOR111
+	ldr	x8, [x4, #:lo12:.LANCHOR111]
+	adrp	x4, .LANCHOR112
+	ldr	x4, [x4, #:lo12:.LANCHOR112]
+.L1014:
 	cmp	w6, w12
-	beq	.L1004
+	beq	.L1018
 	uxtw	x11, w6
 	lsl	x10, x11, 2
 	add	x13, x8, x10
 	ldr	w10, [x8, x10]
 	cmp	w0, w10
 	lsl	x10, x11, 1
-	bne	.L1001
+	bne	.L1015
 	mov	w6, -1
 	str	w6, [x13]
 	cmp	w7, w12
-	bne	.L1002
-	add	x6, x3, :lo12:.LANCHOR108
+	bne	.L1016
+	add	x6, x3, :lo12:.LANCHOR110
 	ldrh	w7, [x4, x10]
 	strh	w7, [x6, x5, lsl 1]
-.L1003:
+.L1017:
 	mov	w6, -1
 	strh	w6, [x4, x11, lsl 1]
-.L1004:
+.L1018:
 	uxtw	x6, w2
-	add	x3, x3, :lo12:.LANCHOR108
+	add	x3, x3, :lo12:.LANCHOR110
 	cmn	w1, #1
 	str	w0, [x8, x6, lsl 2]
 	ldrh	w0, [x3, x5, lsl 1]
 	strh	w2, [x3, x5, lsl 1]
 	strh	w0, [x4, x6, lsl 1]
-	beq	.L1011
+	beq	.L1025
 	stp	x29, x30, [sp, -16]!
-	adrp	x0, .LANCHOR66
+	adrp	x0, .LANCHOR68
 	add	x29, sp, 0
-	ldrh	w3, [x0, #:lo12:.LANCHOR66]
-	mov	w0, 21
+	ldrh	w3, [x0, #:lo12:.LANCHOR68]
+	adrp	x0, .LANCHOR31
+	ldrb	w2, [x0, #:lo12:.LANCHOR31]
+	mov	w0, 24
+	lsr	w1, w1, w3
+	sub	w0, w0, w2
 	sub	w2, w0, w3
 	mov	w0, 1
-	lsr	w1, w1, w3
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
 	and	w1, w0, w1
-	adrp	x0, .LANCHOR67
-	ldrb	w0, [x0, #:lo12:.LANCHOR67]
+	adrp	x0, .LANCHOR69
+	ldrb	w0, [x0, #:lo12:.LANCHOR69]
 	udiv	w0, w1, w0
 	bl	ftl_vpn_decrement
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
-.L1002:
+.L1016:
 	ldrh	w6, [x4, x10]
 	strh	w6, [x4, w7, uxtw 1]
-	b	.L1003
-.L1001:
+	b	.L1017
+.L1015:
 	mov	w7, w6
 	ldrh	w6, [x4, x10]
-	b	.L1000
-.L1011:
+	b	.L1014
+.L1025:
 	mov	w0, -1
 	ret
 	.size	lpa_hash_update_ppa, .-lpa_hash_update_ppa
@@ -5759,45 +6006,52 @@ lpa_hash_update_ppa:
 	.type	ftl_mask_bad_block, %function
 ftl_mask_bad_block:
 	stp	x29, x30, [sp, -32]!
-	adrp	x2, .LANCHOR67
-	ubfx	x1, x0, 21, 3
-	mov	w3, 21
+	adrp	x1, .LANCHOR31
+	mov	w6, 24
+	mov	w4, 1
 	add	x29, sp, 0
-	ldrb	w5, [x2, #:lo12:.LANCHOR67]
+	ldrb	w1, [x1, #:lo12:.LANCHOR31]
 	stp	x19, x20, [sp, 16]
+	sub	w6, w6, w1
+	lsl	w1, w4, w1
+	sub	w1, w1, #1
+	lsr	w2, w0, w6
+	and	w1, w1, w2
+	adrp	x2, .LANCHOR69
+	and	w1, w1, 255
+	ldrb	w5, [x2, #:lo12:.LANCHOR69]
 	cmp	w5, 1
 	mul	w2, w1, w5
 	and	w19, w2, 255
-	adrp	x2, .LANCHOR66
-	ldrh	w2, [x2, #:lo12:.LANCHOR66]
-	lsr	w0, w0, w2
-	sub	w2, w3, w2
-	mov	w3, 1
-	lsl	w3, w3, w2
+	adrp	x2, .LANCHOR68
+	ldrh	w3, [x2, #:lo12:.LANCHOR68]
+	lsr	w0, w0, w3
+	sub	w3, w6, w3
+	lsl	w3, w4, w3
 	sub	w3, w3, #1
 	and	w3, w3, w0
 	and	w4, w3, 65535
 	udiv	w3, w3, w5
 	and	w20, w3, 65535
-	bls	.L1015
+	bls	.L1029
 	sub	w2, w5, #1
 	and	w2, w2, w4
 	add	w2, w19, w2
 	and	w19, w2, 255
-.L1015:
+.L1029:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 14, .L1016
-	adrp	x0, .LC59
+	tbz	x0, 14, .L1030
+	adrp	x0, .LC61
 	and	w3, w3, 65535
 	mov	w2, w19
-	add	x0, x0, :lo12:.LC59
+	add	x0, x0, :lo12:.LC61
 	bl	printf
-.L1016:
+.L1030:
 	adrp	x0, .LANCHOR6
 	ldrh	w0, [x0, #:lo12:.LANCHOR6]
 	cmp	w0, w20
-	bls	.L1014
+	bls	.L1028
 	adrp	x0, .LANCHOR7
 	mov	w2, 1
 	lsl	w2, w2, w19
@@ -5806,7 +6060,7 @@ ftl_mask_bad_block:
 	ldrb	w19, [x20, 3]
 	orr	w2, w2, w19
 	strb	w2, [x20, 3]
-.L1014:
+.L1028:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -5819,25 +6073,25 @@ gc_free_bad_sblk:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR63
+	adrp	x24, .LANCHOR64
 	stp	x27, x28, [sp, 80]
-	and	w28, w0, 65535
-	add	x0, x24, :lo12:.LANCHOR63
+	and	w27, w0, 65535
+	add	x0, x24, :lo12:.LANCHOR64
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
-	ldr	w0, [x0, 328]
-	cbz	w0, .L1033
-	adrp	x25, .LANCHOR78
-	adrp	x27, .LANCHOR66
-	add	x25, x25, :lo12:.LANCHOR78
-	add	x22, x27, :lo12:.LANCHOR66
+	ldr	w0, [x0, 584]
+	cbz	w0, .L1047
+	adrp	x25, .LANCHOR80
+	adrp	x26, .LANCHOR68
+	add	x25, x25, :lo12:.LANCHOR80
+	add	x22, x26, :lo12:.LANCHOR68
 	mov	w23, 0
-.L1024:
+.L1038:
 	ldrb	w0, [x25]
 	cmp	w0, w23
-	bhi	.L1031
-.L1033:
+	bhi	.L1045
+.L1047:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -5846,65 +6100,68 @@ gc_free_bad_sblk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1031:
-	adrp	x0, .LANCHOR67
-	ldrh	w3, [x27, #:lo12:.LANCHOR66]
-	mov	w2, 21
-	ldrb	w1, [x0, #:lo12:.LANCHOR67]
-	sub	w2, w2, w3
-	and	w0, w1, 65535
-	cmp	w1, 1
-	sdiv	w19, w23, w1
-	lsl	w19, w19, w2
-	madd	w19, w28, w0, w19
+.L1045:
+	adrp	x0, .LANCHOR69
+	adrp	x1, .LANCHOR31
+	ldrb	w2, [x0, #:lo12:.LANCHOR69]
+	ldrb	w3, [x1, #:lo12:.LANCHOR31]
+	mov	w1, 24
+	and	w0, w2, 65535
+	cmp	w2, 1
+	sub	w1, w1, w3
+	ldrh	w3, [x26, #:lo12:.LANCHOR68]
+	sdiv	w19, w23, w2
+	sub	w1, w1, w3
+	lsl	w19, w19, w1
+	madd	w19, w27, w0, w19
 	and	w19, w19, 65535
-	bls	.L1025
+	bls	.L1039
 	sub	w0, w0, #1
 	and	w0, w0, w23
 	add	w19, w19, w0
 	and	w19, w19, 65535
-.L1025:
-	adrp	x26, .LC60
-	add	x21, x24, :lo12:.LANCHOR63
-	add	x26, x26, :lo12:.LC60
+.L1039:
+	adrp	x28, .LC62
+	add	x21, x24, :lo12:.LANCHOR64
+	add	x28, x28, :lo12:.LC62
 	mov	w20, 0
-.L1026:
-	ldr	w0, [x21, 328]
+.L1040:
+	ldr	w0, [x21, 584]
 	cmp	w20, w0
-	bcc	.L1030
+	bcc	.L1044
 	add	w23, w23, 1
 	and	w23, w23, 65535
-	b	.L1024
-.L1030:
+	b	.L1038
+.L1044:
 	add	x0, x21, x20, sxtw 1
-	ldrh	w0, [x0, 332]
+	ldrh	w0, [x0, 588]
 	cmp	w0, w19
-	bne	.L1027
+	bne	.L1041
 	mov	w1, w19
-	mov	x0, x26
+	mov	x0, x28
 	bl	printf
 	ldrh	w0, [x22]
 	lsl	w0, w19, w0
 	bl	ftl_mask_bad_block
-	ldr	w1, [x21, 328]
+	ldr	w1, [x21, 584]
 	mov	w0, w20
-.L1028:
+.L1042:
 	cmp	w0, w1
-	bcc	.L1029
+	bcc	.L1043
 	sub	w1, w1, #1
-	str	w1, [x21, 328]
-.L1027:
+	str	w1, [x21, 584]
+.L1041:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L1026
-.L1029:
+	b	.L1040
+.L1043:
 	add	w2, w0, 1
 	add	x0, x21, x0, sxtw 1
 	add	x3, x21, x2, sxtw 1
-	ldrh	w3, [x3, 332]
-	strh	w3, [x0, 332]
+	ldrh	w3, [x3, 588]
+	strh	w3, [x0, 588]
 	and	w0, w2, 65535
-	b	.L1028
+	b	.L1042
 	.size	gc_free_bad_sblk, .-gc_free_bad_sblk
 	.section	.text.ftl_free_sblk,"ax",@progbits
 	.align	2
@@ -5916,179 +6173,171 @@ ftl_free_sblk:
 	stp	x23, x24, [sp, 48]
 	adrp	x23, .LANCHOR7
 	and	x24, x0, 65535
-	stp	x21, x22, [sp, 32]
-	ldr	x4, [x23, #:lo12:.LANCHOR7]
-	lsl	x21, x24, 2
 	stp	x19, x20, [sp, 16]
-	mov	x19, x24
-	add	x20, x4, x21
+	ldr	x4, [x23, #:lo12:.LANCHOR7]
+	lsl	x19, x24, 2
+	stp	x21, x22, [sp, 32]
+	mov	x21, x24
+	add	x20, x4, x19
 	ldrb	w0, [x20, 2]
 	ubfx	x22, x0, 5, 3
-	tbz	x0, 3, .L1039
-	adrp	x1, .LANCHOR102
-	ldrh	w2, [x4, x21]
-	adrp	x8, .LANCHOR116
-	ldr	x7, [x1, #:lo12:.LANCHOR102]
-	and	w3, w2, 2047
-	ldr	w2, [x4, x21]
-	ldrh	w8, [x8, #:lo12:.LANCHOR116]
-	ldrh	w1, [x7, 74]
-	ubfx	x6, x2, 11, 8
+	tbz	x0, 3, .L1053
+	adrp	x1, .LANCHOR104
+	ldrh	w2, [x4, x19]
+	adrp	x8, .LANCHOR118
+	ldr	x7, [x1, #:lo12:.LANCHOR104]
+	and	w5, w2, 2047
+	ldr	w2, [x4, x19]
+	ldrh	w8, [x8, #:lo12:.LANCHOR118]
+	ldrh	w3, [x7, 74]
+	ubfx	x1, x2, 11, 8
 	adrp	x2, .LANCHOR8
-	add	w1, w3, w1
+	add	w3, w5, w3
 	ldrh	w2, [x2, #:lo12:.LANCHOR8]
-	and	w5, w1, 65535
-	ldrh	w1, [x7, 72]
-	add	w1, w6, w1
-	udiv	w7, w5, w2
-	and	w1, w1, 65535
-	add	w7, w7, w1
+	and	w6, w3, 65535
+	ldrh	w3, [x7, 72]
+	add	w3, w1, w3
+	udiv	w7, w6, w2
+	and	w3, w3, 65535
+	add	w7, w7, w3
 	cmp	w7, w8
-	ble	.L1040
-	adrp	x1, .LANCHOR93
+	ble	.L1054
+	adrp	x3, .LANCHOR95
+	adrp	x7, .LANCHOR99
+	ldrh	w6, [x3, #:lo12:.LANCHOR95]
+	adrp	x3, .LANCHOR94
+	ldrh	w7, [x7, #:lo12:.LANCHOR99]
+	ldrh	w3, [x3, #:lo12:.LANCHOR94]
+	add	w6, w6, 7
+	add	w3, w3, w7
+	cmp	w6, w3
+	blt	.L1055
+.L1060:
+	mov	w3, 2
+	bfi	w0, w3, 3, 2
+	b	.L1069
+.L1055:
+	adrp	x3, .LANCHOR119
 	adrp	x7, .LANCHOR97
-	ldrh	w5, [x1, #:lo12:.LANCHOR93]
-	adrp	x1, .LANCHOR92
+	ldrh	w6, [x3, #:lo12:.LANCHOR119]
+	adrp	x3, .LANCHOR92
 	ldrh	w7, [x7, #:lo12:.LANCHOR97]
-	ldrh	w1, [x1, #:lo12:.LANCHOR92]
-	add	w5, w5, 7
-	add	w1, w1, w7
-	cmp	w5, w1
-	blt	.L1041
-.L1057:
-	mov	w1, 2
-	bfi	w0, w1, 3, 2
-.L1055:
+	ldrh	w3, [x3, #:lo12:.LANCHOR92]
+	add	w6, w6, 7
+	add	w3, w3, w7
+	adrp	x7, .LANCHOR90
+	ldrh	w7, [x7, #:lo12:.LANCHOR90]
+	add	w3, w3, w7
+	cmp	w6, w3
+	blt	.L1060
+.L1070:
+	and	w0, w0, -25
+.L1069:
 	strb	w0, [x20, 2]
-.L1042:
+.L1056:
 	ldrb	w0, [x20, 2]
 	ands	w0, w0, 24
-	bne	.L1046
-	mul	w2, w6, w2
-	ldrh	w0, [x4, x21]
-	add	w2, w2, w2, lsl 1
-	add	w2, w3, w2, lsr 2
-	ubfx	x2, x2, 2, 9
-	bfi	w0, w2, 0, 11
-	strh	w0, [x4, x21]
-.L1039:
-	mov	w0, w19
+	bne	.L1061
+	mul	w0, w1, w2
+	ldrh	w2, [x4, x19]
+	add	w0, w0, w0, lsl 1
+	add	w0, w5, w0, lsr 2
+	bfi	w2, w0, 0, 11
+	strh	w2, [x4, x19]
+	lsr	w2, w1, 3
+	ldr	w0, [x4, x19]
+	bfi	w0, w2, 11, 8
+	str	w0, [x4, x19]
+.L1053:
+	mov	w0, w21
 	bl	zftl_remove_data_node
 	ldr	x0, [x23, #:lo12:.LANCHOR7]
 	add	w22, w22, 6
 	and	w22, w22, 7
-	add	x21, x0, x21
+	add	x19, x0, x19
 	cmp	w22, 4
-	ldrb	w0, [x21, 2]
+	ldrb	w0, [x19, 2]
 	and	w0, w0, 31
-	strb	w0, [x21, 2]
+	strb	w0, [x19, 2]
 	adrp	x0, .LANCHOR9
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x24, lsl 1]
-	bhi	.L1048
-	mov	w0, w19
+	bhi	.L1063
+	mov	w0, w21
 	bl	gc_free_bad_sblk
-.L1048:
+.L1063:
 	ldrb	w0, [x20, 2]
-	tbz	x0, 3, .L1049
+	tbz	x0, 3, .L1064
 	adrp	x0, .LANCHOR10
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
-	ldrh	w1, [x0, 584]
-	cmp	w1, w19
-	bne	.L1050
+	ldrh	w1, [x0, 586]
+	cmp	w1, w21
+	bne	.L1064
 	mov	w1, -1
-	ldrh	w2, [x0, 588]
-	strh	w1, [x0, 584]
+	ldrh	w2, [x0, 590]
+	strh	w1, [x0, 586]
 	mov	w1, 65535
 	cmp	w2, w1
-	bne	.L1049
-	strh	w19, [x0, 588]
-	mov	w1, w19
-	adrp	x0, .LC61
-	add	x0, x0, :lo12:.LC61
-.L1056:
+	bne	.L1064
+	strh	w21, [x0, 590]
+	mov	w1, w21
 	ldp	x19, x20, [sp, 16]
+	adrp	x0, .LC63
 	ldp	x21, x22, [sp, 32]
+	add	x0, x0, :lo12:.LC63
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	b	printf
-.L1041:
-	adrp	x1, .LANCHOR117
-	adrp	x7, .LANCHOR95
-	ldrh	w5, [x1, #:lo12:.LANCHOR117]
-	adrp	x1, .LANCHOR90
-	ldrh	w7, [x7, #:lo12:.LANCHOR95]
-	ldrh	w1, [x1, #:lo12:.LANCHOR90]
-	add	w5, w5, 7
-	add	w1, w1, w7
-	adrp	x7, .LANCHOR88
-	ldrh	w7, [x7, #:lo12:.LANCHOR88]
-	add	w1, w1, w7
-	cmp	w5, w1
-	blt	.L1057
-.L1045:
-	and	w0, w0, -25
-	b	.L1055
-.L1040:
-	madd	w1, w2, w1, w5
-	adrp	x5, .LANCHOR118
-	ldrh	w5, [x5, #:lo12:.LANCHOR118]
-	cmp	w1, w5
-	ble	.L1042
-	adrp	x1, .LANCHOR117
-	adrp	x7, .LANCHOR95
-	ldrh	w5, [x1, #:lo12:.LANCHOR117]
-	adrp	x1, .LANCHOR90
-	ldrh	w7, [x7, #:lo12:.LANCHOR95]
-	ldrh	w1, [x1, #:lo12:.LANCHOR90]
-	add	w5, w5, 7
-	add	w1, w1, w7
-	adrp	x7, .LANCHOR88
-	ldrh	w7, [x7, #:lo12:.LANCHOR88]
-	add	w1, w1, w7
-	cmp	w5, w1
-	bge	.L1045
-	adrp	x1, .LANCHOR93
+.L1054:
+	madd	w3, w2, w3, w6
+	adrp	x6, .LANCHOR120
+	ldrh	w6, [x6, #:lo12:.LANCHOR120]
+	cmp	w3, w6
+	ble	.L1056
+	adrp	x3, .LANCHOR119
 	adrp	x7, .LANCHOR97
-	ldrh	w5, [x1, #:lo12:.LANCHOR93]
-	adrp	x1, .LANCHOR92
+	ldrh	w6, [x3, #:lo12:.LANCHOR119]
+	adrp	x3, .LANCHOR92
 	ldrh	w7, [x7, #:lo12:.LANCHOR97]
-	ldrh	w1, [x1, #:lo12:.LANCHOR92]
-	add	w5, w5, 7
-	add	w1, w1, w7
-	cmp	w5, w1
-	blt	.L1045
-	b	.L1057
-.L1046:
+	ldrh	w3, [x3, #:lo12:.LANCHOR92]
+	add	w3, w3, w7
+	adrp	x7, .LANCHOR90
+	ldrh	w7, [x7, #:lo12:.LANCHOR90]
+	add	w3, w3, w7
+	add	w7, w6, 7
+	cmp	w7, w3
+	bge	.L1070
+	adrp	x7, .LANCHOR95
+	adrp	x10, .LANCHOR99
+	ldrh	w8, [x7, #:lo12:.LANCHOR95]
+	adrp	x7, .LANCHOR94
+	ldrh	w10, [x10, #:lo12:.LANCHOR99]
+	ldrh	w7, [x7, #:lo12:.LANCHOR94]
+	add	w8, w8, 7
+	add	w7, w7, w10
+	cmp	w8, w7
+	bge	.L1060
+	add	w6, w6, 23
+	cmp	w3, w6
+	bgt	.L1060
+	b	.L1070
+.L1061:
 	cmp	w0, 16
-	bne	.L1039
-	sdiv	w2, w3, w2
-	ldr	w0, [x4, x21]
+	bne	.L1053
+	sdiv	w2, w5, w2
+	ldr	w0, [x4, x19]
 	add	w2, w2, w2, lsl 1
-	add	w2, w6, w2, lsr 2
-	ubfx	x2, x2, 2, 6
+	add	w2, w1, w2, lsr 2
 	bfi	w0, w2, 11, 8
-	str	w0, [x4, x21]
-	b	.L1039
-.L1050:
-	ldrh	w1, [x0, 586]
-	cmp	w1, w19
-	bne	.L1049
-	mov	w1, -1
-	ldrh	w2, [x0, 590]
-	strh	w1, [x0, 586]
-	mov	w1, 65535
-	cmp	w2, w1
-	bne	.L1049
-	strh	w19, [x0, 590]
-	mov	w1, w19
-	adrp	x0, .LC62
-	add	x0, x0, :lo12:.LC62
-	b	.L1056
-.L1049:
-	mov	w0, w19
-	ldp	x21, x22, [sp, 32]
+	asr	w2, w5, 5
+	str	w0, [x4, x19]
+	bfi	w0, w2, 0, 11
+	strh	w0, [x4, x19]
+	b	.L1053
+.L1064:
+	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	b	zftl_insert_free_list
@@ -6101,20 +6350,20 @@ gc_free_src_blk:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR63
+	adrp	x21, .LANCHOR64
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LC63
+	adrp	x22, .LC64
 	adrp	x23, .LANCHOR9
-	add	x21, x21, :lo12:.LANCHOR63
+	add	x21, x21, :lo12:.LANCHOR64
 	mov	x24, x23
-	add	x22, x22, :lo12:.LC63
+	add	x22, x22, :lo12:.LC64
 	stp	x19, x20, [sp, 16]
 	mov	w20, 0
 	stp	x25, x26, [sp, 64]
-.L1059:
+.L1072:
 	ldrh	w0, [x21, 56]
 	cmp	w0, w20
-	bhi	.L1073
+	bhi	.L1086
 	strh	wzr, [x21, 56]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6122,18 +6371,18 @@ gc_free_src_blk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1073:
+.L1086:
 	add	x0, x21, x20, sxtw 1
 	ldrh	w25, [x0, 58]
 	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	mov	x19, x25
 	lsl	x26, x25, 1
 	ldrh	w2, [x0, x26]
-	cbz	w2, .L1060
+	cbz	w2, .L1073
 	mov	w1, w25
 	mov	x0, x22
 	bl	printf
-.L1060:
+.L1073:
 	ldr	x0, [x24, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x26]
 	adrp	x0, .LANCHOR7
@@ -6141,95 +6390,95 @@ gc_free_src_blk:
 	add	x25, x0, x25, lsl 2
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L1061
+	tbz	x0, 8, .L1074
 	ldrb	w2, [x25, 2]
-	adrp	x0, .LC64
+	adrp	x0, .LC65
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC64
+	add	x0, x0, :lo12:.LC65
 	ubfx	x2, x2, 5, 3
 	bl	printf
-.L1061:
+.L1074:
 	ldrb	w0, [x25, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L1062
+	beq	.L1075
 	tst	w0, 192
-	bne	.L1063
-.L1062:
-	adrp	x1, .LANCHOR119
+	bne	.L1076
+.L1075:
+	adrp	x1, .LANCHOR121
 	adrp	x0, .LC0
-	mov	w2, 931
-	add	x1, x1, :lo12:.LANCHOR119
+	mov	w2, 1114
+	add	x1, x1, :lo12:.LANCHOR121
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1063:
+.L1076:
 	mov	w0, w19
 	bl	ftl_free_sblk
 	adrp	x0, .LANCHOR10
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldrh	w2, [x0, 124]
-	cbz	w2, .L1064
+	cbz	w2, .L1077
 	add	x3, x0, 392
 	mov	w1, 0
-.L1066:
+.L1079:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L1065
+	bne	.L1078
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 392]
 	strh	w2, [x0, 124]
-.L1064:
+.L1077:
 	ldrh	w2, [x0, 120]
-	cbz	w2, .L1067
+	cbz	w2, .L1080
 	add	x3, x0, 136
 	mov	w1, 0
-.L1069:
+.L1082:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L1068
+	bne	.L1081
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 136]
 	strh	w2, [x0, 120]
-.L1067:
+.L1080:
 	ldrh	w2, [x0, 122]
-	cbz	w2, .L1070
+	cbz	w2, .L1083
 	add	x3, x0, 264
 	mov	w1, 0
-.L1072:
+.L1085:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L1071
+	bne	.L1084
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 264]
 	strh	w2, [x0, 122]
-.L1070:
+.L1083:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L1059
-.L1065:
+	b	.L1072
+.L1078:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L1066
-	b	.L1064
-.L1068:
+	bne	.L1079
+	b	.L1077
+.L1081:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L1069
-	b	.L1067
-.L1071:
+	bne	.L1082
+	b	.L1080
+.L1084:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L1072
-	b	.L1070
+	bne	.L1085
+	b	.L1083
 	.size	gc_free_src_blk, .-gc_free_src_blk
 	.section	.text.print_ftl_debug_info,"ax",@progbits
 	.align	2
@@ -6237,25 +6486,25 @@ gc_free_src_blk:
 	.type	print_ftl_debug_info, %function
 print_ftl_debug_info:
 	sub	sp, sp, #64
-	adrp	x2, .LANCHOR88
-	adrp	x8, .LANCHOR120
+	adrp	x2, .LANCHOR90
+	adrp	x8, .LANCHOR122
 	stp	x29, x30, [sp, 32]
 	add	x29, sp, 32
-	ldrh	w7, [x2, #:lo12:.LANCHOR88]
-	adrp	x2, .LANCHOR90
+	ldrh	w7, [x2, #:lo12:.LANCHOR90]
+	adrp	x2, .LANCHOR92
 	stp	x19, x20, [sp, 48]
-	adrp	x19, .LANCHOR102
+	adrp	x19, .LANCHOR104
 	adrp	x20, .LANCHOR10
-	ldrh	w6, [x2, #:lo12:.LANCHOR90]
+	ldrh	w6, [x2, #:lo12:.LANCHOR92]
+	adrp	x2, .LANCHOR101
+	ldr	x1, [x19, #:lo12:.LANCHOR104]
+	ldrh	w5, [x2, #:lo12:.LANCHOR101]
 	adrp	x2, .LANCHOR99
-	ldr	x1, [x19, #:lo12:.LANCHOR102]
-	ldrh	w5, [x2, #:lo12:.LANCHOR99]
-	adrp	x2, .LANCHOR97
 	ldr	x0, [x20, #:lo12:.LANCHOR10]
-	ldrh	w4, [x2, #:lo12:.LANCHOR97]
-	adrp	x2, .LANCHOR95
-	ldr	w8, [x8, #:lo12:.LANCHOR120]
-	ldrh	w3, [x2, #:lo12:.LANCHOR95]
+	ldrh	w4, [x2, #:lo12:.LANCHOR99]
+	adrp	x2, .LANCHOR97
+	ldr	w8, [x8, #:lo12:.LANCHOR122]
+	ldrh	w3, [x2, #:lo12:.LANCHOR97]
 	ldrh	w2, [x1, 146]
 	ldrh	w1, [x1, 148]
 	str	w8, [sp, 24]
@@ -6263,31 +6512,31 @@ print_ftl_debug_info:
 	str	w8, [sp, 16]
 	ldr	w0, [x0, 524]
 	str	w0, [sp, 8]
-	adrp	x0, .LANCHOR92
-	ldrh	w0, [x0, #:lo12:.LANCHOR92]
+	adrp	x0, .LANCHOR94
+	ldrh	w0, [x0, #:lo12:.LANCHOR94]
 	str	w0, [sp]
-	adrp	x0, .LC65
-	add	x0, x0, :lo12:.LC65
+	adrp	x0, .LC66
+	add	x0, x0, :lo12:.LC66
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR102]
-	adrp	x1, .LANCHOR121
-	ldrb	w3, [x1, #:lo12:.LANCHOR121]
+	ldr	x0, [x19, #:lo12:.LANCHOR104]
+	adrp	x1, .LANCHOR123
+	ldrb	w3, [x1, #:lo12:.LANCHOR123]
 	ldr	w4, [x0, 8]
 	ldr	w5, [x0, 64]
 	ldr	w1, [x0, 20]
 	ldr	w2, [x0, 28]
-	adrp	x0, .LC66
-	add	x0, x0, :lo12:.LC66
+	adrp	x0, .LC67
+	add	x0, x0, :lo12:.LC67
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR102]
+	ldr	x0, [x19, #:lo12:.LANCHOR104]
 	ldr	w1, [x0, 52]
 	ldr	w2, [x0, 60]
 	ldr	w3, [x0, 16]
-	adrp	x0, .LC67
-	add	x0, x0, :lo12:.LC67
+	adrp	x0, .LC68
+	add	x0, x0, :lo12:.LC68
 	lsr	w3, w3, 11
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR102]
+	ldr	x0, [x19, #:lo12:.LANCHOR104]
 	ldrh	w2, [x0, 98]
 	ldrh	w6, [x0, 72]
 	ldrh	w5, [x0, 96]
@@ -6300,32 +6549,35 @@ print_ftl_debug_info:
 	ldrh	w2, [x0, 90]
 	str	w2, [sp]
 	ldp	w7, w2, [x0, 80]
-	adrp	x0, .LC68
-	add	x0, x0, :lo12:.LC68
-	bl	printf
-	adrp	x0, .LANCHOR79
-	ldrh	w5, [x0, #:lo12:.LANCHOR79]
-	adrp	x0, .LANCHOR84
-	ldrh	w4, [x0, #:lo12:.LANCHOR84]
-	adrp	x0, .LANCHOR62
-	ldrh	w3, [x0, #:lo12:.LANCHOR62]
-	adrp	x0, .LANCHOR94
-	ldrh	w2, [x0, #:lo12:.LANCHOR94]
-	adrp	x0, .LANCHOR91
-	ldrh	w1, [x0, #:lo12:.LANCHOR91]
 	adrp	x0, .LC69
 	add	x0, x0, :lo12:.LC69
 	bl	printf
-	ldr	x0, [x20, #:lo12:.LANCHOR10]
+	adrp	x0, .LANCHOR81
+	ldrh	w5, [x0, #:lo12:.LANCHOR81]
+	adrp	x0, .LANCHOR86
+	ldrh	w4, [x0, #:lo12:.LANCHOR86]
+	adrp	x0, .LANCHOR63
+	ldrh	w3, [x0, #:lo12:.LANCHOR63]
+	adrp	x0, .LANCHOR96
+	ldrh	w2, [x0, #:lo12:.LANCHOR96]
+	adrp	x0, .LANCHOR93
+	ldrh	w1, [x0, #:lo12:.LANCHOR93]
+	adrp	x0, .LC70
+	add	x0, x0, :lo12:.LC70
+	bl	printf
+	ldr	x0, [x20, #:lo12:.LANCHOR10]
+	ldr	x1, [x19, #:lo12:.LANCHOR104]
 	ldp	x29, x30, [sp, 32]
-	ldp	x19, x20, [sp, 48]
-	add	sp, sp, 64
 	ldrh	w4, [x0, 590]
+	ldrh	w6, [x1, 150]
 	ldrh	w3, [x0, 588]
 	ldrh	w2, [x0, 586]
+	ldp	x19, x20, [sp, 48]
+	add	sp, sp, 64
+	ldr	w5, [x1, 156]
 	ldrh	w1, [x0, 584]
-	adrp	x0, .LC70
-	add	x0, x0, :lo12:.LC70
+	adrp	x0, .LC71
+	add	x0, x0, :lo12:.LC71
 	b	printf
 	.size	print_ftl_debug_info, .-print_ftl_debug_info
 	.section	.text.ftl_write_buf,"ax",@progbits
@@ -6337,65 +6589,65 @@ ftl_write_buf:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	str	x21, [sp, 32]
-	cbnz	x0, .L1099
-	adrp	x1, .LANCHOR122
-	add	x1, x1, :lo12:.LANCHOR122
-	mov	w2, 668
+	cbnz	x0, .L1112
+	adrp	x1, .LANCHOR124
+	add	x1, x1, :lo12:.LANCHOR124
+	mov	w2, 676
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	bl	print_ftl_debug_info
 	mov	w0, -1
-.L1098:
+.L1111:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1102:
+.L1115:
 	mov	x1, x19
-	adrp	x0, .LANCHOR57
-	add	x0, x0, :lo12:.LANCHOR57
+	adrp	x0, .LANCHOR59
+	add	x0, x0, :lo12:.LANCHOR59
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR102
+	adrp	x1, .LANCHOR104
 	ldrb	w3, [x19, 56]
-	ldrb	w0, [x21, #:lo12:.LANCHOR58]
-	ldr	x1, [x1, #:lo12:.LANCHOR102]
+	ldrb	w0, [x21, #:lo12:.LANCHOR60]
+	ldr	x1, [x1, #:lo12:.LANCHOR104]
 	add	w0, w0, 1
 	and	w0, w0, 255
-	strb	w0, [x21, #:lo12:.LANCHOR58]
+	strb	w0, [x21, #:lo12:.LANCHOR60]
 	ldr	w2, [x1, 16]
 	add	w2, w2, w3
 	str	w2, [x1, 16]
 	ldr	w2, [x1, 32]
 	add	w2, w2, 1
 	str	w2, [x1, 32]
-	b	.L1098
-.L1099:
+	b	.L1111
+.L1112:
 	mov	x19, x0
-	adrp	x0, .LANCHOR123
+	adrp	x0, .LANCHOR125
 	mov	x20, x0
-	ldrb	w1, [x0, #:lo12:.LANCHOR123]
+	ldrb	w1, [x0, #:lo12:.LANCHOR125]
 	ldrb	w2, [x19, 56]
 	cmp	w2, w1
-	bls	.L1104
-	adrp	x1, .LANCHOR122
+	bls	.L1117
+	adrp	x1, .LANCHOR124
 	adrp	x0, .LC0
-	mov	w2, 673
-	add	x1, x1, :lo12:.LANCHOR122
+	mov	w2, 681
+	add	x1, x1, :lo12:.LANCHOR124
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1104:
+.L1117:
 	ldrb	w0, [x19, 56]
-	adrp	x21, .LANCHOR58
-	cbz	w0, .L1101
-	ldrb	w1, [x20, #:lo12:.LANCHOR123]
+	adrp	x21, .LANCHOR60
+	cbz	w0, .L1114
+	ldrb	w1, [x20, #:lo12:.LANCHOR125]
 	cmp	w1, w0
-	bcs	.L1102
-.L1101:
+	bcs	.L1115
+.L1114:
 	mov	x0, x19
-	bl	buf_free
-	ldrb	w0, [x21, #:lo12:.LANCHOR58]
-	b	.L1098
+	bl	zbuf_free
+	ldrb	w0, [x21, #:lo12:.LANCHOR60]
+	b	.L1111
 	.size	ftl_write_buf, .-ftl_write_buf
 	.section	.text.ftl_write_completed,"ax",@progbits
 	.align	2
@@ -6405,24 +6657,24 @@ ftl_write_completed:
 	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR50
-	add	x19, x19, :lo12:.LANCHOR50
+	adrp	x19, .LANCHOR52
+	add	x19, x19, :lo12:.LANCHOR52
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR124
+	adrp	x21, .LANCHOR126
 	mov	x22, x19
-	add	x21, x21, :lo12:.LANCHOR124
+	add	x21, x21, :lo12:.LANCHOR126
 	stp	x23, x24, [sp, 48]
 	mov	w24, 0
-.L1110:
+.L1123:
 	ldrb	w0, [x21]
 	cmp	w0, 255
-	bne	.L1118
+	bne	.L1131
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1118:
+.L1131:
 	lsl	x1, x0, 6
 	ubfiz	x20, x0, 6, 8
 	add	x23, x19, x1
@@ -6431,20 +6683,23 @@ ftl_write_completed:
 	strb	w1, [x21]
 	ldr	w1, [x23, 52]
 	cmn	w1, #1
-	bne	.L1111
-	adrp	x1, .LANCHOR66
+	bne	.L1124
+	adrp	x1, .LANCHOR68
+	mov	w2, 24
 	ldr	w3, [x23, 40]
 	mov	w5, 65535
-	ldrh	w2, [x1, #:lo12:.LANCHOR66]
-	mov	w1, 21
-	sub	w4, w1, w2
+	ldrh	w4, [x1, #:lo12:.LANCHOR68]
+	adrp	x1, .LANCHOR31
+	ldrb	w1, [x1, #:lo12:.LANCHOR31]
+	sub	w1, w2, w1
+	sub	w2, w1, w4
 	mov	w1, 1
-	lsr	w2, w3, w2
-	lsl	w1, w1, w4
+	lsr	w4, w3, w4
+	lsl	w1, w1, w2
+	adrp	x2, .LANCHOR69
 	sub	w1, w1, #1
-	and	w1, w1, w2
-	adrp	x2, .LANCHOR67
-	ldrb	w2, [x2, #:lo12:.LANCHOR67]
+	ldrb	w2, [x2, #:lo12:.LANCHOR69]
+	and	w1, w1, w4
 	udiv	w1, w1, w2
 	adrp	x2, .LANCHOR10
 	mov	x23, x2
@@ -6453,14 +6708,14 @@ ftl_write_completed:
 	and	w1, w1, w5
 	ldr	w6, [x4, 560]
 	cmp	w6, w5
-	bne	.L1112
+	bne	.L1125
 	str	w1, [x4, 560]
 	str	w3, [x4, 564]
-.L1112:
+.L1125:
 	add	x0, x22, x0, lsl 6
 	ldr	w2, [x0, 36]
-	adrp	x0, .LC71
-	add	x0, x0, :lo12:.LC71
+	adrp	x0, .LC72
+	add	x0, x0, :lo12:.LC72
 	bl	printf
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	ldr	w1, [x0, 556]
@@ -6468,42 +6723,42 @@ ftl_write_completed:
 	str	w1, [x0, 556]
 	ldrh	w1, [x0, 16]
 	cmp	w1, w24
-	bne	.L1113
+	bne	.L1126
 	strh	wzr, [x0, 22]
-.L1114:
+.L1127:
 	mov	x0, x20
 	mov	w24, 1
 	bl	ftl_write_buf
-	b	.L1110
-.L1113:
+	b	.L1123
+.L1126:
 	ldrh	w1, [x0, 48]
 	cmp	w1, w24
-	bne	.L1114
+	bne	.L1127
 	strh	wzr, [x0, 54]
-	b	.L1114
-.L1111:
-	cbz	w24, .L1116
+	b	.L1127
+.L1124:
+	cbz	w24, .L1129
 	ldp	w1, w2, [x23, 36]
-	adrp	x0, .LC72
-	add	x0, x0, :lo12:.LC72
+	adrp	x0, .LC73
+	add	x0, x0, :lo12:.LC73
 	bl	printf
 	mov	x0, x20
 	bl	ftl_write_buf
-	b	.L1110
-.L1116:
+	b	.L1123
+.L1129:
 	ldrh	w2, [x23, 48]
 	ldr	w0, [x23, 36]
 	ldr	w1, [x23, 44]
 	bl	lpa_hash_update_ppa
 	ldrb	w0, [x23, 2]
-	tbz	x0, 2, .L1117
+	tbz	x0, 2, .L1130
 	and	w0, w0, -3
 	strb	w0, [x23, 2]
-	b	.L1110
-.L1117:
+	b	.L1123
+.L1130:
 	mov	x0, x20
-	bl	buf_free
-	b	.L1110
+	bl	zbuf_free
+	b	.L1123
 	.size	ftl_write_completed, .-ftl_write_completed
 	.section	.text.zftl_add_read_buf,"ax",@progbits
 	.align	2
@@ -6513,40 +6768,40 @@ zftl_add_read_buf:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	str	x19, [sp, 16]
-	cbnz	x0, .L1121
-	mov	w2, 964
-	adrp	x1, .LANCHOR125
+	cbnz	x0, .L1134
+	mov	w2, 972
+	adrp	x1, .LANCHOR127
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR125
+	add	x1, x1, :lo12:.LANCHOR127
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	print_ftl_debug_info
-.L1121:
+.L1134:
 	ldrb	w1, [x0, 56]
 	mov	x19, x0
-	adrp	x0, .LANCHOR123
-	ldrb	w0, [x0, #:lo12:.LANCHOR123]
+	adrp	x0, .LANCHOR125
+	ldrb	w0, [x0, #:lo12:.LANCHOR125]
 	cmp	w1, w0
-	bls	.L1123
-	adrp	x1, .LANCHOR125
+	bls	.L1136
+	adrp	x1, .LANCHOR127
 	adrp	x0, .LC0
-	mov	w2, 969
-	add	x1, x1, :lo12:.LANCHOR125
+	mov	w2, 977
+	add	x1, x1, :lo12:.LANCHOR127
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1123:
+.L1136:
 	mov	x1, x19
-	adrp	x0, .LANCHOR126
-	add	x0, x0, :lo12:.LANCHOR126
+	adrp	x0, .LANCHOR128
+	add	x0, x0, :lo12:.LANCHOR128
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR127
+	adrp	x1, .LANCHOR129
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	ldrb	w0, [x1, #:lo12:.LANCHOR127]
+	ldrb	w0, [x1, #:lo12:.LANCHOR129]
 	add	w0, w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR127]
+	strb	w0, [x1, #:lo12:.LANCHOR129]
 	ret
 	.size	zftl_add_read_buf, .-zftl_add_read_buf
 	.section	.text.ftl_alloc_sblk,"ax",@progbits
@@ -6569,39 +6824,39 @@ ftl_alloc_sblk:
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1128
+	beq	.L1141
 	adrp	x0, .LANCHOR7
 	lsl	w22, w22, 1
 	ldr	x21, [x0, #:lo12:.LANCHOR7]
 	add	x21, x21, x19, uxth 2
 	ldrb	w0, [x21, 2]
 	tst	w0, 224
-	beq	.L1129
-	adrp	x1, .LANCHOR128
+	beq	.L1142
+	adrp	x1, .LANCHOR130
 	adrp	x0, .LC0
-	mov	w2, 833
-	add	x1, x1, :lo12:.LANCHOR128
+	mov	w2, 836
+	add	x1, x1, :lo12:.LANCHOR130
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1129:
+.L1142:
 	ldrb	w0, [x21, 2]
 	bfi	w0, w20, 5, 3
 	ubfx	x1, x0, 3, 2
 	orr	w22, w22, w1
 	bfi	w0, w22, 3, 2
 	strb	w0, [x21, 2]
-.L1130:
+.L1143:
 	mov	w0, w19
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1128:
+.L1141:
 	bl	print_ftl_debug_info
-	adrp	x21, .LC73
+	adrp	x21, .LC74
 	mov	w2, w20
-	add	x21, x21, :lo12:.LC73
+	add	x21, x21, :lo12:.LC74
 	mov	w1, w19
 	mov	x0, x21
 	bl	printf
@@ -6614,28 +6869,28 @@ ftl_alloc_sblk:
 	mov	x0, x21
 	bl	printf
 	bl	dump_all_list_info
-	mov	w2, 843
-	adrp	x1, .LANCHOR128
+	mov	w2, 846
+	adrp	x1, .LANCHOR130
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR128
+	add	x1, x1, :lo12:.LANCHOR130
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L1130
+	b	.L1143
 	.size	ftl_alloc_sblk, .-ftl_alloc_sblk
 	.section	.text.sblk_init,"ax",@progbits
 	.align	2
 	.global	sblk_init
 	.type	sblk_init, %function
 sblk_init:
-	adrp	x1, .LANCHOR54
+	adrp	x1, .LANCHOR56
 	mov	w0, -1
-	strb	w0, [x1, #:lo12:.LANCHOR54]
-	adrp	x1, .LANCHOR124
-	strb	w0, [x1, #:lo12:.LANCHOR124]
-	adrp	x1, .LANCHOR129
-	strb	w0, [x1, #:lo12:.LANCHOR129]
-	adrp	x1, .LANCHOR69
-	strb	w0, [x1, #:lo12:.LANCHOR69]
+	strb	w0, [x1, #:lo12:.LANCHOR56]
+	adrp	x1, .LANCHOR126
+	strb	w0, [x1, #:lo12:.LANCHOR126]
+	adrp	x1, .LANCHOR131
+	strb	w0, [x1, #:lo12:.LANCHOR131]
+	adrp	x1, .LANCHOR71
+	strb	w0, [x1, #:lo12:.LANCHOR71]
 	mov	w0, 0
 	ret
 	.size	sblk_init, .-sblk_init
@@ -6645,25 +6900,25 @@ sblk_init:
 	.type	dump_sblk_queue, %function
 dump_sblk_queue:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LC74
-	add	x0, x0, :lo12:.LC74
+	adrp	x0, .LC75
+	add	x0, x0, :lo12:.LC75
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR54
+	adrp	x19, .LANCHOR56
 	str	x21, [sp, 32]
-	ldrb	w1, [x19, #:lo12:.LANCHOR54]
+	ldrb	w1, [x19, #:lo12:.LANCHOR56]
 	bl	printf
-	ldrb	w19, [x19, #:lo12:.LANCHOR54]
+	ldrb	w19, [x19, #:lo12:.LANCHOR56]
 	cmp	w19, 255
-	beq	.L1137
-	adrp	x1, .LANCHOR50
+	beq	.L1150
+	adrp	x1, .LANCHOR52
 	ubfiz	x19, x19, 6, 8
-	add	x1, x1, :lo12:.LANCHOR50
-	adrp	x21, .LC75
+	add	x1, x1, :lo12:.LANCHOR52
+	adrp	x21, .LC76
 	add	x19, x1, x19
-	add	x21, x21, :lo12:.LC75
+	add	x21, x21, :lo12:.LC76
 	mov	x20, x1
-.L1139:
+.L1152:
 	ldrb	w2, [x19, 58]
 	mov	x0, x21
 	ldrb	w1, [x19, 1]
@@ -6671,11 +6926,11 @@ dump_sblk_queue:
 	bl	printf
 	ldrb	w19, [x19]
 	cmp	w19, 255
-	beq	.L1137
+	beq	.L1150
 	ubfiz	x19, x19, 6, 8
 	add	x19, x20, x19
-	b	.L1139
-.L1137:
+	b	.L1152
+.L1150:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -6686,82 +6941,90 @@ dump_sblk_queue:
 	.global	queue_lun_state
 	.type	queue_lun_state, %function
 queue_lun_state:
-	adrp	x2, .LANCHOR54
-	ldrb	w2, [x2, #:lo12:.LANCHOR54]
+	adrp	x2, .LANCHOR56
+	ldrb	w2, [x2, #:lo12:.LANCHOR56]
 	cmp	w2, 255
-	beq	.L1155
-	adrp	x3, .LANCHOR66
-	adrp	x7, .LANCHOR50
-	add	x7, x7, :lo12:.LANCHOR50
-	adrp	x10, .L1151
-	ldrh	w8, [x3, #:lo12:.LANCHOR66]
-	mov	w3, 21
-	ubfx	x11, x0, 21, 3
-	add	x10, x10, :lo12:.L1151
-	sub	w4, w3, w8
+	beq	.L1168
+	adrp	x3, .LANCHOR31
+	mov	w8, 24
+	adrp	x10, .LANCHOR52
+	add	x10, x10, :lo12:.LANCHOR52
+	ldrb	w4, [x3, #:lo12:.LANCHOR31]
 	mov	w3, 1
-	mov	x12, x7
+	adrp	x13, .L1164
+	mov	x15, x10
+	sub	w8, w8, w4
+	add	x13, x13, :lo12:.L1164
+	lsl	w4, w3, w4
+	sub	w4, w4, #1
+	and	w6, w4, 65535
+	adrp	x4, .LANCHOR68
+	asr	w11, w0, w8
+	and	w11, w11, w6
+	ldrh	w12, [x4, #:lo12:.LANCHOR68]
+	sub	w4, w8, w12
 	lsl	w3, w3, w4
-	adrp	x4, .LANCHOR67
 	sub	w3, w3, #1
-	ldrb	w6, [x4, #:lo12:.LANCHOR67]
-	and	w3, w3, 65535
-	asr	w4, w0, w8
-	sub	w6, w6, #1
-	and	w6, w6, 65535
-	and	w4, w4, w6
-	and	w4, w4, w3
-.L1154:
-	add	x0, x7, x2, lsl 6
-	ldr	w5, [x0, 40]
-	ubfx	x13, x5, 21, 3
-	cmp	w11, w13
-	bne	.L1149
-	lsr	w5, w5, w8
-	and	w5, w6, w5
-	and	w5, w3, w5
-	ldrb	w0, [x0, 58]
-	cmp	w4, w5
-	bne	.L1150
+	and	w7, w3, 65535
+	adrp	x3, .LANCHOR69
+	ldrb	w5, [x3, #:lo12:.LANCHOR69]
+	asr	w3, w0, w12
+	sub	w5, w5, #1
+	and	w5, w5, 65535
+	and	w3, w3, w5
+	and	w3, w3, w7
+.L1167:
+	add	x14, x10, x2, lsl 6
+	ldr	w4, [x14, 40]
+	lsr	w0, w4, w8
+	and	w0, w6, w0
+	cmp	w11, w0
+	bne	.L1162
+	lsr	w4, w4, w12
+	and	w4, w5, w4
+	and	w4, w7, w4
+	ldrb	w0, [x14, 58]
+	cmp	w3, w4
+	bne	.L1163
 	cmp	w1, 1
-	bne	.L1147
+	bne	.L1160
 	cmp	w0, 7
 	ccmp	w0, 9, 4, ne
-	beq	.L1149
+	beq	.L1162
 	ret
-.L1150:
+.L1163:
 	cmp	w1, 3
-	bhi	.L1149
-	ldrb	w5, [x10,w1,uxtw]
-	adr	x13, .Lrtx1151
-	add	x5, x13, w5, sxtb #2
-	br	x5
-.Lrtx1151:
+	bhi	.L1162
+	ldrb	w4, [x13,w1,uxtw]
+	adr	x14, .Lrtx1164
+	add	x4, x14, w4, sxtb #2
+	br	x4
+.Lrtx1164:
 	.section	.rodata.queue_lun_state,"a",@progbits
 	.align	0
 	.align	2
-.L1151:
-	.byte	(.L1147 - .Lrtx1151) / 4
-	.byte	(.L1152 - .Lrtx1151) / 4
-	.byte	(.L1153 - .Lrtx1151) / 4
-	.byte	(.L1147 - .Lrtx1151) / 4
+.L1164:
+	.byte	(.L1160 - .Lrtx1164) / 4
+	.byte	(.L1165 - .Lrtx1164) / 4
+	.byte	(.L1166 - .Lrtx1164) / 4
+	.byte	(.L1160 - .Lrtx1164) / 4
 	.section	.text.queue_lun_state
-.L1152:
+.L1165:
 	cmp	w0, 7
 	ccmp	w0, 9, 4, ne
-	beq	.L1149
+	beq	.L1162
 	ret
-.L1153:
+.L1166:
 	cmp	w0, 11
-	bne	.L1147
-.L1149:
+	bne	.L1160
+.L1162:
 	lsl	x2, x2, 6
-	ldrb	w2, [x12, x2]
+	ldrb	w2, [x15, x2]
 	cmp	w2, 255
-	bne	.L1154
-.L1155:
+	bne	.L1167
+.L1168:
 	mov	w0, 0
-.L1147:
+.L1160:
 	ret
 	.size	queue_lun_state, .-queue_lun_state
 	.section	.text.queue_remove_completed_req,"ax",@progbits
@@ -6769,25 +7032,25 @@ queue_lun_state:
 	.global	queue_remove_completed_req
 	.type	queue_remove_completed_req, %function
 queue_remove_completed_req:
-	adrp	x4, .LANCHOR124
-	adrp	x8, .LANCHOR69
-	adrp	x1, .LANCHOR54
-	adrp	x7, .LANCHOR129
-	adrp	x3, .LANCHOR50
-	ldrb	w14, [x4, #:lo12:.LANCHOR124]
-	add	x5, x3, :lo12:.LANCHOR50
-	ldrb	w2, [x1, #:lo12:.LANCHOR54]
-	ldrb	w12, [x8, #:lo12:.LANCHOR69]
+	adrp	x4, .LANCHOR126
+	adrp	x8, .LANCHOR71
+	adrp	x1, .LANCHOR56
+	adrp	x7, .LANCHOR131
+	adrp	x3, .LANCHOR52
+	ldrb	w14, [x4, #:lo12:.LANCHOR126]
+	add	x5, x3, :lo12:.LANCHOR52
+	ldrb	w2, [x1, #:lo12:.LANCHOR56]
+	ldrb	w12, [x8, #:lo12:.LANCHOR71]
 	mov	x11, x5
-	ldrb	w13, [x7, #:lo12:.LANCHOR129]
-	add	x16, x8, :lo12:.LANCHOR69
-	add	x7, x7, :lo12:.LANCHOR129
-	add	x10, x4, :lo12:.LANCHOR124
+	ldrb	w13, [x7, #:lo12:.LANCHOR131]
+	add	x16, x8, :lo12:.LANCHOR71
+	add	x7, x7, :lo12:.LANCHOR131
+	add	x10, x4, :lo12:.LANCHOR126
 	mov	w6, 0
 	mov	w15, -1
-.L1158:
+.L1171:
 	cmp	w2, 255
-	beq	.L1159
+	beq	.L1172
 	sbfiz	x8, x2, 6, 32
 	sxtw	x0, w2
 	add	x4, x5, x8
@@ -6795,61 +7058,61 @@ queue_remove_completed_req:
 	sub	w4, w4, #12
 	and	w4, w4, 255
 	cmp	w4, 1
-	bls	.L1160
-	cbz	w6, .L1157
-	strb	w2, [x1, #:lo12:.LANCHOR54]
+	bls	.L1173
+	cbz	w6, .L1170
+	strb	w2, [x1, #:lo12:.LANCHOR56]
 	ret
-.L1160:
+.L1173:
 	lsl	x6, x0, 6
 	ldrb	w2, [x5, x8]
 	add	x4, x5, x6
 	strb	w15, [x5, x6]
 	ldrb	w6, [x4, 59]
 	cmp	w6, 1
-	bne	.L1163
+	bne	.L1176
 	ldrh	w4, [x4, 50]
-	cbnz	w4, .L1171
+	cbnz	w4, .L1184
 	mov	w4, w14
 	mov	x6, x10
-.L1164:
+.L1177:
 	cmp	w4, 255
-	bne	.L1169
-	add	x3, x3, :lo12:.LANCHOR50
-	strb	w2, [x1, #:lo12:.LANCHOR54]
+	bne	.L1182
+	add	x3, x3, :lo12:.LANCHOR52
+	strb	w2, [x1, #:lo12:.LANCHOR56]
 	add	x0, x3, x0, lsl 6
 	ldrb	w0, [x0, 1]
 	strb	w0, [x6]
 	ret
-.L1163:
-	cbnz	w6, .L1165
+.L1176:
+	cbnz	w6, .L1178
 	ldr	w4, [x4, 36]
 	cmn	w4, #1
-	beq	.L1165
+	beq	.L1178
 	mov	w4, w13
 	mov	x6, x7
-	b	.L1164
-.L1171:
+	b	.L1177
+.L1184:
 	mov	w4, w12
 	mov	x6, x16
-	b	.L1164
-.L1169:
+	b	.L1177
+.L1182:
 	mov	w6, w4
 	sbfiz	x4, x4, 6, 32
 	ldrb	w4, [x11, x4]
 	cmp	w4, 255
-	bne	.L1169
+	bne	.L1182
 	add	x0, x11, x0, lsl 6
 	sbfiz	x6, x6, 6, 32
 	ldrb	w0, [x0, 1]
 	strb	w0, [x11, x6]
-.L1165:
+.L1178:
 	mov	w6, 1
-	b	.L1158
-.L1159:
-	cbz	w6, .L1157
+	b	.L1171
+.L1172:
+	cbz	w6, .L1170
 	mov	w0, -1
-	strb	w0, [x1, #:lo12:.LANCHOR54]
-.L1157:
+	strb	w0, [x1, #:lo12:.LANCHOR56]
+.L1170:
 	ret
 	.size	queue_remove_completed_req, .-queue_remove_completed_req
 	.section	.text.pm_alloc_new_blk,"ax",@progbits
@@ -6858,42 +7121,42 @@ queue_remove_completed_req:
 	.type	pm_alloc_new_blk, %function
 pm_alloc_new_blk:
 	stp	x29, x30, [sp, -64]!
-	adrp	x2, .LANCHOR78
+	adrp	x2, .LANCHOR80
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR102
+	adrp	x20, .LANCHOR104
 	stp	x21, x22, [sp, 32]
-	ldr	x1, [x20, #:lo12:.LANCHOR102]
-	ldrb	w2, [x2, #:lo12:.LANCHOR78]
+	ldr	x1, [x20, #:lo12:.LANCHOR104]
+	ldrb	w2, [x2, #:lo12:.LANCHOR80]
 	ldrh	w0, [x1, 690]
 	str	x23, [sp, 48]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	strh	w0, [x1, 690]
 	cmp	w2, w0
-	bls	.L1182
+	bls	.L1195
 	add	x0, x1, x0, sxtw 1
 	ldrh	w1, [x0, 672]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1183
-.L1182:
-	adrp	x19, .LC76
-	add	x19, x19, :lo12:.LC76
-	adrp	x23, .LANCHOR7
+	bne	.L1196
 .L1195:
+	adrp	x19, .LC77
+	add	x19, x19, :lo12:.LC77
+	adrp	x23, .LANCHOR7
+.L1208:
 	mov	w0, 1
 	bl	ftl_alloc_sblk
 	mov	w1, 0
 	and	w21, w0, 65535
 	bl	ftl_erase_sblk
-	add	x14, x20, :lo12:.LANCHOR102
-	ldr	x1, [x20, #:lo12:.LANCHOR102]
+	add	x14, x20, :lo12:.LANCHOR104
+	ldr	x1, [x20, #:lo12:.LANCHOR104]
 	mov	w0, w21
 	add	x1, x1, 672
 	bl	ftl_get_blk_list_in_sblk
 	tst	w0, 65535
-	bne	.L1184
+	bne	.L1197
 	mov	w1, w21
 	mov	x0, x19
 	bl	printf
@@ -6902,76 +7165,79 @@ pm_alloc_new_blk:
 	ldrb	w0, [x1, 2]
 	orr	w0, w0, -32
 	strb	w0, [x1, 2]
-	b	.L1195
-.L1184:
+	b	.L1208
+.L1197:
 	ldr	x0, [x14]
-	adrp	x1, .LANCHOR130
+	adrp	x1, .LANCHOR132
 	mov	w2, 1
 	mov	w19, 0
 	add	x0, x0, 416
-	str	w2, [x1, #:lo12:.LANCHOR130]
+	str	w2, [x1, #:lo12:.LANCHOR132]
 	mov	w1, 65535
 	strh	wzr, [x0, 274]
-.L1186:
+.L1199:
 	ldrh	w2, [x0]
 	cmp	w2, w1
-	beq	.L1185
+	beq	.L1198
 	add	w19, w19, 1
 	add	x0, x0, 2
 	and	w19, w19, 65535
 	cmp	w19, 128
-	bne	.L1186
-	adrp	x1, .LANCHOR131
+	bne	.L1199
+	adrp	x1, .LANCHOR133
 	adrp	x0, .LC0
-	mov	w2, 194
-	add	x1, x1, :lo12:.LANCHOR131
+	mov	w2, 227
+	add	x1, x1, :lo12:.LANCHOR133
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1185:
-	ldr	x0, [x20, #:lo12:.LANCHOR102]
+.L1198:
+	ldr	x0, [x20, #:lo12:.LANCHOR104]
 	add	x19, x0, x19, sxtw 1
 	ldrh	w1, [x0, 688]
 	strh	w21, [x19, 416]
 	add	w1, w1, 1
 	strh	w1, [x0, 688]
-.L1183:
-	ldr	x1, [x20, #:lo12:.LANCHOR102]
+.L1196:
+	ldr	x1, [x20, #:lo12:.LANCHOR104]
 	ldrh	w0, [x1, 690]
 	add	x0, x0, 336
 	ldrh	w19, [x1, x0, lsl 1]
 	mov	w0, 65533
 	sub	w1, w19, #1
 	cmp	w0, w1, uxth
-	bcs	.L1188
-	adrp	x1, .LANCHOR131
+	bcs	.L1201
+	adrp	x1, .LANCHOR133
 	adrp	x0, .LC0
-	mov	w2, 199
-	add	x1, x1, :lo12:.LANCHOR131
+	mov	w2, 232
+	add	x1, x1, :lo12:.LANCHOR133
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1188:
-	adrp	x1, .LANCHOR66
-	ldr	x0, [x20, #:lo12:.LANCHOR102]
-	mov	w2, 21
-	ldrh	w1, [x1, #:lo12:.LANCHOR66]
+.L1201:
+	adrp	x1, .LANCHOR31
+	mov	w2, 24
+	ldr	x0, [x20, #:lo12:.LANCHOR104]
+	ldrb	w1, [x1, #:lo12:.LANCHOR31]
 	sub	w2, w2, w1
+	adrp	x1, .LANCHOR68
 	strh	wzr, [x0, 696]
+	ldrh	w1, [x1, #:lo12:.LANCHOR68]
 	strh	w19, [x0, 692]
+	sub	w2, w2, w1
 	asr	w4, w19, w2
 	strh	w4, [x0, 694]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1191
+	tbz	x0, 12, .L1204
 	mov	w0, 1
 	and	w4, w4, 65535
 	lsl	w2, w0, w2
 	mov	w3, w19
-	adrp	x0, .LC77
+	adrp	x0, .LC78
 	sub	w2, w2, #1
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC77
+	add	x0, x0, :lo12:.LC78
 	bl	printf
-.L1191:
+.L1204:
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -6985,68 +7251,68 @@ pm_alloc_new_blk:
 	.type	pm_select_ram_region, %function
 pm_select_ram_region:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR132
-	add	x0, x0, :lo12:.LANCHOR132
+	adrp	x0, .LANCHOR134
+	add	x0, x0, :lo12:.LANCHOR134
 	mov	x1, 0
 	add	x29, sp, 0
 	mov	w2, 65535
 	str	x19, [sp, 16]
-.L1200:
+.L1213:
 	lsl	x3, x1, 4
 	and	w19, w1, 65535
 	ldrh	w3, [x3, x0]
 	cmp	w3, w2
-	beq	.L1199
+	beq	.L1212
 	add	x1, x1, 1
 	cmp	x1, 32
-	bne	.L1200
+	bne	.L1213
 	add	x0, x0, 2
 	mov	w19, w1
 	mov	x2, x0
 	mov	w4, 32768
 	mov	w1, 0
-.L1202:
+.L1215:
 	ldrh	w3, [x2]
-	tbnz	x3, 15, .L1201
+	tbnz	x3, 15, .L1214
 	cmp	w3, w4
-	bcs	.L1201
+	bcs	.L1214
 	mov	w4, w3
 	mov	w19, w1
-.L1201:
+.L1214:
 	add	w1, w1, 1
 	add	x2, x2, 16
 	and	w1, w1, 65535
 	cmp	w1, 32
-	bne	.L1202
+	bne	.L1215
 	cmp	w19, 32
-	bne	.L1199
-	adrp	x1, .LANCHOR133
+	bne	.L1212
+	adrp	x1, .LANCHOR135
 	mov	w2, -1
-	ldrb	w3, [x1, #:lo12:.LANCHOR133]
+	ldrb	w3, [x1, #:lo12:.LANCHOR135]
 	mov	w1, 0
-.L1204:
+.L1217:
 	ldrh	w5, [x0]
 	cmp	w5, w2
-	bcs	.L1203
+	bcs	.L1216
 	ldrh	w4, [x0, -2]
 	cmp	w4, w3
 	csel	w2, w2, w5, eq
 	csel	w19, w19, w1, eq
-.L1203:
+.L1216:
 	add	w1, w1, 1
 	add	x0, x0, 16
 	and	w1, w1, 65535
 	cmp	w1, 32
-	bne	.L1204
+	bne	.L1217
 	cmp	w19, 32
-	bne	.L1199
-	adrp	x1, .LANCHOR134
+	bne	.L1212
+	adrp	x1, .LANCHOR136
 	adrp	x0, .LC0
-	mov	w2, 297
-	add	x1, x1, :lo12:.LANCHOR134
+	mov	w2, 331
+	add	x1, x1, :lo12:.LANCHOR136
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1199:
+.L1212:
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -7057,12 +7323,12 @@ pm_select_ram_region:
 	.global	idb_init
 	.type	idb_init, %function
 idb_init:
-	adrp	x0, .LANCHOR135
-	str	xzr, [x0, #:lo12:.LANCHOR135]
-	adrp	x0, .LANCHOR136
-	str	wzr, [x0, #:lo12:.LANCHOR136]
 	adrp	x0, .LANCHOR137
 	str	xzr, [x0, #:lo12:.LANCHOR137]
+	adrp	x0, .LANCHOR138
+	str	wzr, [x0, #:lo12:.LANCHOR138]
+	adrp	x0, .LANCHOR139
+	str	xzr, [x0, #:lo12:.LANCHOR139]
 	mov	w0, 0
 	ret
 	.size	idb_init, .-idb_init
@@ -7083,59 +7349,59 @@ flash_lsb_page_tbl_build:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR3
-	cbnz	w0, .L1212
+	cbnz	w0, .L1225
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1213:
+.L1226:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 256
-	bne	.L1213
-.L1219:
-	adrp	x20, .LANCHOR138
-	add	x20, x20, :lo12:.LANCHOR138
+	bne	.L1226
+.L1232:
+	adrp	x20, .LANCHOR140
+	add	x20, x20, :lo12:.LANCHOR140
 	mov	w2, 1024
 	mov	w1, 255
 	mov	x0, x20
 	add	x19, x19, :lo12:.LANCHOR3
 	bl	ftl_memset
 	mov	x0, 0
-.L1214:
+.L1227:
 	ldrh	w1, [x0, x19]
 	add	x0, x0, 2
 	cmp	x0, 512
 	strh	w1, [x20, w1, sxtw 1]
-	bne	.L1214
+	bne	.L1227
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1212:
+.L1225:
 	cmp	w0, 1
-	bne	.L1215
+	bne	.L1228
 	add	x3, x19, :lo12:.LANCHOR3
 	mov	x1, 0
-.L1218:
+.L1231:
 	and	w0, w1, 65535
 	cmp	x1, 3
-	bls	.L1216
+	bls	.L1229
 	ubfiz	w2, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 2
 	sub	w0, w2, w0
 	and	w0, w0, 65535
-.L1216:
+.L1229:
 	strh	w0, [x3, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L1218
-	b	.L1219
-.L1215:
+	bne	.L1231
+	b	.L1232
+.L1228:
 	cmp	w0, 2
-	bne	.L1220
+	bne	.L1233
 	add	x3, x19, :lo12:.LANCHOR3
 	mov	w1, 65535
 	mov	x0, 0
-.L1222:
+.L1235:
 	cmp	x0, 2
 	and	w2, w0, 65535
 	csel	w2, w2, w1, cc
@@ -7144,31 +7410,31 @@ flash_lsb_page_tbl_build:
 	add	x0, x0, 1
 	and	w1, w1, 65535
 	cmp	x0, 256
-	bne	.L1222
-	b	.L1219
-.L1220:
+	bne	.L1235
+	b	.L1232
+.L1233:
 	cmp	w0, 3
-	bne	.L1223
+	bne	.L1236
 	add	x3, x19, :lo12:.LANCHOR3
 	mov	x1, 0
-.L1226:
+.L1239:
 	and	w0, w1, 65535
 	cmp	x1, 5
-	bls	.L1224
+	bls	.L1237
 	ubfiz	w2, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 4
 	sub	w0, w2, w0
 	and	w0, w0, 65535
-.L1224:
+.L1237:
 	strh	w0, [x3, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L1226
-	b	.L1219
-.L1223:
+	bne	.L1239
+	b	.L1232
+.L1236:
 	cmp	w0, 4
-	bne	.L1227
+	bne	.L1240
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	w2, 1
 	add	x1, x1, 16
@@ -7186,7 +7452,7 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1, -10]
 	strh	w0, [x1, -2]
 	mov	w0, 8
-.L1229:
+.L1242:
 	and	w3, w0, 1
 	ubfiz	w2, w0, 1, 15
 	add	w3, w3, 6
@@ -7195,40 +7461,40 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1], 2
 	and	w0, w0, 65535
 	cmp	w0, 256
-	bne	.L1229
-	b	.L1219
-.L1227:
+	bne	.L1242
+	b	.L1232
+.L1240:
 	cmp	w0, 5
-	bne	.L1230
+	bne	.L1243
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1231:
+.L1244:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 16
-	bne	.L1231
+	bne	.L1244
 	add	x1, x1, 32
-.L1232:
+.L1245:
 	strh	w0, [x1], 2
 	add	w0, w0, 2
 	and	w0, w0, 65535
 	cmp	w0, 496
-	bne	.L1232
-	b	.L1219
-.L1230:
+	bne	.L1245
+	b	.L1232
+.L1243:
 	cmp	w0, 8
-	bne	.L1233
+	bne	.L1246
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1234:
+.L1247:
 	strh	w0, [x0, x1]
 	add	x0, x0, 2
 	cmp	x0, 512
-	bne	.L1234
-	b	.L1219
-.L1233:
+	bne	.L1247
+	b	.L1232
+.L1246:
 	cmp	w0, 9
-	bne	.L1219
+	bne	.L1232
 	add	x0, x19, :lo12:.LANCHOR3
 	mov	w1, 1
 	add	x0, x0, 6
@@ -7237,13 +7503,13 @@ flash_lsb_page_tbl_build:
 	mov	w1, 2
 	strh	w1, [x0, -2]
 	mov	w1, 3
-.L1235:
+.L1248:
 	strh	w1, [x0], 2
 	add	w1, w1, 2
 	and	w1, w1, 65535
 	cmp	w1, 509
-	bne	.L1235
-	b	.L1219
+	bne	.L1248
+	b	.L1232
 	.size	flash_lsb_page_tbl_build, .-flash_lsb_page_tbl_build
 	.section	.text.flash_die_info_init,"ax",@progbits
 	.align	2
@@ -7257,54 +7523,54 @@ flash_die_info_init:
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	tbz	x0, 12, .L1252
-	adrp	x1, .LANCHOR139
+	tbz	x0, 12, .L1265
+	adrp	x1, .LANCHOR141
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR139
+	add	x1, x1, :lo12:.LANCHOR141
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1252:
-	adrp	x22, .LANCHOR31
-	add	x19, x22, :lo12:.LANCHOR31
+.L1265:
+	adrp	x22, .LANCHOR32
+	add	x19, x22, :lo12:.LANCHOR32
 	adrp	x23, .LANCHOR2
 	adrp	x24, .LANCHOR18
 	adrp	x21, .LANCHOR30
 	mov	w2, 8
 	ldrh	w0, [x19, 26]
-	adrp	x20, .LANCHOR141
+	adrp	x20, .LANCHOR143
 	ldrb	w1, [x19, 12]
 	strh	w0, [x23, #:lo12:.LANCHOR2]
 	ldrh	w0, [x19, 10]
 	strb	wzr, [x24, #:lo12:.LANCHOR18]
 	sdiv	w0, w0, w1
-	adrp	x1, .LANCHOR140
-	strh	w0, [x1, #:lo12:.LANCHOR140]
+	adrp	x1, .LANCHOR142
+	strh	w0, [x1, #:lo12:.LANCHOR142]
 	mov	w1, 0
 	add	x0, x21, :lo12:.LANCHOR30
 	bl	ftl_memset
-	add	x0, x20, :lo12:.LANCHOR141
+	add	x0, x20, :lo12:.LANCHOR143
 	mov	w2, 32
 	mov	w1, 0
 	bl	ftl_memset
 	mov	x15, x21
 	mov	x11, x20
-	adrp	x12, .LANCHOR32
-	adrp	x14, .LANCHOR42
+	adrp	x12, .LANCHOR33
+	adrp	x14, .LANCHOR44
 	mov	x7, x22
-	add	x12, x12, :lo12:.LANCHOR32
-	add	x20, x14, :lo12:.LANCHOR42
+	add	x12, x12, :lo12:.LANCHOR33
+	add	x20, x14, :lo12:.LANCHOR44
 	add	x21, x19, 1
 	mov	x10, 0
-.L1254:
+.L1267:
 	ldrb	w2, [x19]
 	mov	w0, 2
 	strb	w0, [x10, x12]
 	add	x1, x20, x10, lsl 3
 	mov	x0, x21
 	bl	flash_mem_cmp8
-	cbnz	w0, .L1253
+	cbnz	w0, .L1266
 	ldrb	w2, [x24, #:lo12:.LANCHOR18]
-	add	x1, x11, :lo12:.LANCHOR141
+	add	x1, x11, :lo12:.LANCHOR143
 	add	w0, w2, 1
 	strb	w0, [x24, #:lo12:.LANCHOR18]
 	and	w0, w10, 255
@@ -7312,16 +7578,16 @@ flash_die_info_init:
 	add	x1, x15, :lo12:.LANCHOR30
 	strb	w0, [x1, x2]
 	bl	zftl_flash_enter_slc_mode
-.L1253:
+.L1266:
 	add	x10, x10, 1
 	cmp	x10, 4
-	bne	.L1254
-	add	x0, x7, :lo12:.LANCHOR31
+	bne	.L1267
+	add	x0, x7, :lo12:.LANCHOR32
 	ldrb	w1, [x0, 8]
 	cmp	w1, 2
-	beq	.L1255
-.L1259:
-	add	x7, x7, :lo12:.LANCHOR31
+	beq	.L1268
+.L1272:
+	add	x7, x7, :lo12:.LANCHOR32
 	ldrb	w0, [x24, #:lo12:.LANCHOR18]
 	ldp	x19, x20, [sp, 16]
 	ldrb	w1, [x7, 13]
@@ -7331,18 +7597,18 @@ flash_die_info_init:
 	ldrh	w1, [x7, 14]
 	ldp	x29, x30, [sp], 64
 	mul	w0, w0, w1
-	adrp	x1, .LANCHOR142
-	strh	w0, [x1, #:lo12:.LANCHOR142]
+	adrp	x1, .LANCHOR144
+	strh	w0, [x1, #:lo12:.LANCHOR144]
 	ret
-.L1255:
+.L1268:
 	ldrh	w1, [x23, #:lo12:.LANCHOR2]
-	add	x14, x14, :lo12:.LANCHOR42
+	add	x14, x14, :lo12:.LANCHOR44
 	ldrb	w12, [x0, 13]
 	add	x10, x0, 1
-	ldrb	w20, [x7, #:lo12:.LANCHOR31]
+	ldrb	w20, [x7, #:lo12:.LANCHOR32]
 	add	x19, x24, :lo12:.LANCHOR18
 	ldrb	w21, [x0, 23]
-	add	x11, x11, :lo12:.LANCHOR141
+	add	x11, x11, :lo12:.LANCHOR143
 	add	x15, x15, :lo12:.LANCHOR30
 	mov	x13, 0
 	mul	w12, w12, w1
@@ -7350,12 +7616,12 @@ flash_die_info_init:
 	and	w1, w1, 65280
 	mul	w12, w12, w1
 	lsl	w22, w12, 1
-.L1258:
+.L1271:
 	mov	w2, w20
 	add	x1, x14, x13, lsl 3
 	mov	x0, x10
 	bl	flash_mem_cmp8
-	cbnz	w0, .L1256
+	cbnz	w0, .L1269
 	ldrb	w1, [x19]
 	cmp	w21, 0
 	csel	w2, w12, w22, eq
@@ -7363,11 +7629,11 @@ flash_die_info_init:
 	strb	w0, [x19]
 	str	w2, [x11, x1, lsl 2]
 	strb	w13, [x15, x1]
-.L1256:
+.L1269:
 	add	x13, x13, 1
 	cmp	x13, 4
-	bne	.L1258
-	b	.L1259
+	bne	.L1271
+	b	.L1272
 	.size	flash_die_info_init, .-flash_die_info_init
 	.section	.text.lpa_hash_init,"ax",@progbits
 	.align	2
@@ -7377,19 +7643,19 @@ lpa_hash_init:
 	stp	x29, x30, [sp, -16]!
 	mov	w2, 512
 	mov	w1, 255
-	adrp	x0, .LANCHOR108
+	adrp	x0, .LANCHOR110
 	add	x29, sp, 0
-	add	x0, x0, :lo12:.LANCHOR108
+	add	x0, x0, :lo12:.LANCHOR110
 	bl	ftl_memset
-	adrp	x0, .LANCHOR85
+	adrp	x0, .LANCHOR87
 	mov	w1, 255
 	ldp	x29, x30, [sp], 16
-	ldrh	w2, [x0, #:lo12:.LANCHOR85]
-	adrp	x0, .LANCHOR78
-	ldrb	w0, [x0, #:lo12:.LANCHOR78]
+	ldrh	w2, [x0, #:lo12:.LANCHOR87]
+	adrp	x0, .LANCHOR80
+	ldrb	w0, [x0, #:lo12:.LANCHOR80]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR110
-	ldr	x0, [x0, #:lo12:.LANCHOR110]
+	adrp	x0, .LANCHOR112
+	ldr	x0, [x0, #:lo12:.LANCHOR112]
 	lsl	w2, w2, 2
 	b	ftl_memset
 	.size	lpa_hash_init, .-lpa_hash_init
@@ -7404,59 +7670,59 @@ lpa_rebuild_hash:
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	tbz	x0, 12, .L1272
-	adrp	x1, .LANCHOR143
-	adrp	x0, .LC78
+	tbz	x0, 12, .L1285
+	adrp	x1, .LANCHOR145
+	adrp	x0, .LC79
 	mov	w3, 0
-	mov	w2, 224
-	add	x1, x1, :lo12:.LANCHOR143
-	add	x0, x0, :lo12:.LC78
+	mov	w2, 225
+	add	x1, x1, :lo12:.LANCHOR145
+	add	x0, x0, :lo12:.LC79
 	bl	printf
-.L1272:
-	adrp	x20, .LANCHOR85
-	adrp	x22, .LANCHOR78
-	adrp	x19, .LANCHOR108
-	add	x19, x19, :lo12:.LANCHOR108
+.L1285:
+	adrp	x20, .LANCHOR87
+	adrp	x22, .LANCHOR80
+	adrp	x19, .LANCHOR110
+	add	x19, x19, :lo12:.LANCHOR110
 	mov	w2, 512
 	mov	w1, 255
 	mov	x0, x19
 	bl	ftl_memset
-	ldrh	w2, [x20, #:lo12:.LANCHOR85]
-	adrp	x21, .LANCHOR110
-	ldrb	w0, [x22, #:lo12:.LANCHOR78]
+	ldrh	w2, [x20, #:lo12:.LANCHOR87]
+	adrp	x21, .LANCHOR112
+	ldrb	w0, [x22, #:lo12:.LANCHOR80]
 	mov	w1, 255
-	add	x20, x20, :lo12:.LANCHOR85
+	add	x20, x20, :lo12:.LANCHOR87
 	mul	w2, w2, w0
-	ldr	x0, [x21, #:lo12:.LANCHOR110]
+	ldr	x0, [x21, #:lo12:.LANCHOR112]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	adrp	x0, .LANCHOR109
-	ldrb	w3, [x22, #:lo12:.LANCHOR78]
-	ldr	x5, [x21, #:lo12:.LANCHOR110]
+	adrp	x0, .LANCHOR111
+	ldrb	w3, [x22, #:lo12:.LANCHOR80]
+	ldr	x5, [x21, #:lo12:.LANCHOR112]
 	mov	w1, 0
-	ldr	x4, [x0, #:lo12:.LANCHOR109]
-.L1273:
+	ldr	x4, [x0, #:lo12:.LANCHOR111]
+.L1286:
 	ldrh	w0, [x20]
 	mul	w0, w0, w3
 	cmp	w1, w0, lsl 1
-	blt	.L1275
+	blt	.L1288
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1275:
+.L1288:
 	uxtw	x2, w1
 	ldr	w0, [x4, x2, lsl 2]
 	cmn	w0, #1
-	beq	.L1274
+	beq	.L1287
 	and	x0, x0, 255
 	ldrh	w6, [x19, x0, lsl 1]
 	strh	w1, [x19, x0, lsl 1]
 	strh	w6, [x5, x2, lsl 1]
-.L1274:
+.L1287:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L1273
+	b	.L1286
 	.size	lpa_rebuild_hash, .-lpa_rebuild_hash
 	.section	.text.zftl_read_flash_info,"ax",@progbits
 	.align	2
@@ -7470,10 +7736,10 @@ zftl_read_flash_info:
 	str	x19, [sp, 16]
 	mov	x19, x0
 	bl	ftl_memset
-	adrp	x1, .LANCHOR31
-	add	x1, x1, :lo12:.LANCHOR31
+	adrp	x1, .LANCHOR32
+	add	x1, x1, :lo12:.LANCHOR32
 	adrp	x0, .LANCHOR2
-	adrp	x3, .LANCHOR59
+	adrp	x3, .LANCHOR61
 	strb	wzr, [x19, 10]
 	mov	w4, 1
 	ldrb	w2, [x1, 9]
@@ -7482,11 +7748,11 @@ zftl_read_flash_info:
 	strb	w0, [x19, 4]
 	ubfx	x0, x0, 8, 8
 	strb	w0, [x19, 5]
-	adrp	x0, .LANCHOR44
-	ldrb	w0, [x0, #:lo12:.LANCHOR44]
+	adrp	x0, .LANCHOR46
+	ldrb	w0, [x0, #:lo12:.LANCHOR46]
 	strb	w0, [x19, 7]
-	add	x0, x3, :lo12:.LANCHOR59
-	ldrb	w3, [x3, #:lo12:.LANCHOR59]
+	add	x0, x3, :lo12:.LANCHOR61
+	ldrb	w3, [x3, #:lo12:.LANCHOR61]
 	strb	w3, [x19]
 	ldrb	w3, [x0, 1]
 	strb	w3, [x19, 1]
@@ -7504,20 +7770,20 @@ zftl_read_flash_info:
 	strb	w0, [x19, 9]
 	adrp	x0, .LANCHOR18
 	ldrb	w3, [x0, #:lo12:.LANCHOR18]
-.L1284:
+.L1297:
 	cmp	w3, w1, uxtb
-	bhi	.L1285
+	bhi	.L1298
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1285:
+.L1298:
 	ldrb	w0, [x1, x2]
 	add	x1, x1, 1
 	ldrb	w5, [x19, 10]
 	lsl	w0, w4, w0
 	orr	w0, w0, w5
 	strb	w0, [x19, 10]
-	b	.L1284
+	b	.L1297
 	.size	zftl_read_flash_info, .-zftl_read_flash_info
 	.section	.text.gc_static_wearleveling,"ax",@progbits
 	.align	2
@@ -7526,19 +7792,19 @@ zftl_read_flash_info:
 gc_static_wearleveling:
 	stp	x29, x30, [sp, -160]!
 	add	x29, sp, 0
-	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR102
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR104
 	stp	x19, x20, [sp, 16]
-	ldr	x0, [x25, #:lo12:.LANCHOR102]
+	ldr	x0, [x23, #:lo12:.LANCHOR104]
 	stp	x21, x22, [sp, 32]
-	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	ldr	w1, [x0, 32]
 	mov	w0, 10240
 	cmp	w1, w0
-	bls	.L1288
+	bls	.L1301
 	bl	ftl_tmp_into_update
-.L1288:
+.L1301:
 	adrp	x19, .LANCHOR10
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldr	w1, [x0, 568]
@@ -7546,15 +7812,15 @@ gc_static_wearleveling:
 	add	w1, w1, 860160
 	add	w1, w1, 3840
 	cmp	w2, w1
-	bhi	.L1289
-	ldr	x3, [x25, #:lo12:.LANCHOR102]
+	bhi	.L1302
+	ldr	x3, [x23, #:lo12:.LANCHOR104]
 	ldr	w1, [x0, 572]
 	add	w1, w1, 32
 	ldr	w3, [x3, 36]
 	cmp	w3, w1
-	bls	.L1338
-.L1289:
-	ldr	x1, [x25, #:lo12:.LANCHOR102]
+	bls	.L1352
+.L1302:
+	ldr	x1, [x23, #:lo12:.LANCHOR104]
 	mov	w20, 65535
 	adrp	x8, .LANCHOR14
 	mov	w21, w20
@@ -7563,8 +7829,8 @@ gc_static_wearleveling:
 	mov	w27, 0
 	mov	w22, 0
 	ldr	w3, [x1, 36]
-	adrp	x23, .LANCHOR7
-	ldrh	w24, [x1, 134]
+	adrp	x24, .LANCHOR7
+	ldrh	w25, [x1, 134]
 	str	w2, [x0, 568]
 	str	w3, [x0, 572]
 	adrp	x0, .LANCHOR6
@@ -7573,32 +7839,32 @@ gc_static_wearleveling:
 	str	wzr, [x29, 136]
 	stp	wzr, wzr, [x29, 148]
 	str	wzr, [x29, 156]
-.L1291:
+.L1304:
 	ldrh	w0, [x10]
-	cmp	w0, w24
-	bhi	.L1300
+	cmp	w0, w25
+	bhi	.L1313
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w2, 128
 	mov	w1, 255
-	adrp	x24, .LANCHOR14
+	adrp	x25, .LANCHOR14
 	add	x0, x0, 264
 	strh	wzr, [x0, -142]
 	bl	ftl_memset
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
-	ldr	w3, [x24, #:lo12:.LANCHOR14]
-	ldr	x2, [x23, #:lo12:.LANCHOR7]
+	ldr	w3, [x25, #:lo12:.LANCHOR14]
+	ldr	x2, [x24, #:lo12:.LANCHOR7]
 	ldrh	w5, [x0, 586]
 	mov	x1, x5
 	lsl	x0, x5, 2
 	add	x26, x2, x0
-	tbz	x3, 10, .L1301
+	tbz	x3, 10, .L1314
 	adrp	x3, .LANCHOR9
 	ldrb	w4, [x26, 2]
 	ldr	x6, [x3, #:lo12:.LANCHOR9]
 	ldr	w3, [x2, x0]
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC80
-	add	x0, x0, :lo12:.LC80
+	adrp	x0, .LC81
+	add	x0, x0, :lo12:.LC81
 	ldrh	w7, [x6, x5, lsl 1]
 	ubfx	x3, x3, 11, 8
 	ldrb	w6, [x26, 3]
@@ -7606,37 +7872,48 @@ gc_static_wearleveling:
 	and	w2, w2, 2047
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1301:
+.L1314:
 	ldrb	w0, [x26, 2]
-	tbz	x0, 3, .L1302
-	ldrb	w0, [x26, 2]
-	and	w1, w0, 192
-	cmp	w1, 64
-	bne	.L1303
+	and	w1, w0, 224
+	cmp	w1, 32
+	bne	.L1315
+	ldr	x2, [x23, #:lo12:.LANCHOR104]
+	ldrh	w2, [x2, 688]
+	cmp	w2, 2
+	bls	.L1315
+	adrp	x2, .LANCHOR146
+	mov	w3, 1
+	str	w3, [x2, #:lo12:.LANCHOR146]
+.L1315:
+	ldrb	w2, [x26, 2]
+	tbz	x2, 3, .L1316
+	and	w0, w0, 192
+	cmp	w0, 64
+	bne	.L1317
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w1, 0
 	mov	w2, 1
 	ldrh	w0, [x0, 586]
 	bl	gc_add_sblk
-	adrp	x0, .LANCHOR63+318
+	adrp	x0, .LANCHOR64+574
 	mov	w1, 1
-	strh	w1, [x0, #:lo12:.LANCHOR63+318]
-.L1302:
+	strh	w1, [x0, #:lo12:.LANCHOR64+574]
+.L1316:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
-	ldr	w3, [x24, #:lo12:.LANCHOR14]
-	ldr	x2, [x23, #:lo12:.LANCHOR7]
+	ldr	w3, [x25, #:lo12:.LANCHOR14]
+	ldr	x2, [x24, #:lo12:.LANCHOR7]
 	ldrh	w5, [x0, 584]
 	mov	x1, x5
 	lsl	x0, x5, 2
 	add	x26, x2, x0
-	tbz	x3, 10, .L1304
+	tbz	x3, 10, .L1318
 	adrp	x3, .LANCHOR9
 	ldrb	w4, [x26, 2]
 	ldr	x6, [x3, #:lo12:.LANCHOR9]
 	ldr	w3, [x2, x0]
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC81
-	add	x0, x0, :lo12:.LC81
+	adrp	x0, .LC82
+	add	x0, x0, :lo12:.LC82
 	ldrh	w7, [x6, x5, lsl 1]
 	ubfx	x3, x3, 11, 8
 	ldrb	w6, [x26, 3]
@@ -7644,35 +7921,35 @@ gc_static_wearleveling:
 	and	w2, w2, 2047
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1304:
+.L1318:
 	ldrb	w0, [x26, 2]
-	tbz	x0, 3, .L1305
+	tbz	x0, 3, .L1319
 	ldrb	w0, [x26, 2]
 	and	w1, w0, 192
 	cmp	w1, 64
-	bne	.L1306
+	bne	.L1320
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w1, 0
 	mov	w2, 1
 	ldrh	w0, [x0, 584]
 	bl	gc_add_sblk
-	adrp	x0, .LANCHOR63+318
+	adrp	x0, .LANCHOR64+574
 	mov	w1, 1
-	strh	w1, [x0, #:lo12:.LANCHOR63+318]
-.L1305:
-	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1307
+	strh	w1, [x0, #:lo12:.LANCHOR64+574]
+.L1319:
+	ldr	w0, [x25, #:lo12:.LANCHOR14]
+	tbz	x0, 10, .L1321
 	ldr	w6, [x29, 128]
 	adrp	x2, .LANCHOR9
-	ldr	x1, [x23, #:lo12:.LANCHOR7]
+	ldr	x1, [x24, #:lo12:.LANCHOR7]
 	ldr	x7, [x2, #:lo12:.LANCHOR9]
 	lsl	x0, x6, 2
 	add	x5, x1, x0
 	ldr	w3, [x1, x0]
 	ldrh	w2, [x1, x0]
-	adrp	x0, .LC82
+	adrp	x0, .LC83
 	ldrh	w7, [x7, x6, lsl 1]
-	add	x0, x0, :lo12:.LC82
+	add	x0, x0, :lo12:.LC83
 	ldrb	w6, [x5, 3]
 	ubfx	x3, x3, 11, 8
 	ldr	w1, [x29, 128]
@@ -7681,20 +7958,20 @@ gc_static_wearleveling:
 	ubfx	x5, x4, 5, 3
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1307:
-	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1308
+.L1321:
+	ldr	w0, [x25, #:lo12:.LANCHOR14]
+	tbz	x0, 10, .L1322
 	ldr	w6, [x29, 136]
 	adrp	x2, .LANCHOR9
-	ldr	x1, [x23, #:lo12:.LANCHOR7]
+	ldr	x1, [x24, #:lo12:.LANCHOR7]
 	ldr	x7, [x2, #:lo12:.LANCHOR9]
 	lsl	x0, x6, 2
 	add	x5, x1, x0
 	ldr	w3, [x1, x0]
 	ldrh	w2, [x1, x0]
-	adrp	x0, .LC83
+	adrp	x0, .LC84
 	ldrh	w7, [x7, x6, lsl 1]
-	add	x0, x0, :lo12:.LC83
+	add	x0, x0, :lo12:.LC84
 	ldrb	w6, [x5, 3]
 	ubfx	x3, x3, 11, 8
 	ldr	w1, [x29, 136]
@@ -7703,8 +7980,8 @@ gc_static_wearleveling:
 	ubfx	x5, x4, 5, 3
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1308:
-	ldr	x0, [x25, #:lo12:.LANCHOR102]
+.L1322:
+	ldr	x0, [x23, #:lo12:.LANCHOR104]
 	ldrh	w1, [x29, 156]
 	strh	w1, [x0, 96]
 	ldr	w1, [x29, 148]
@@ -7716,127 +7993,127 @@ gc_static_wearleveling:
 	udiv	w4, w1, w28
 	strh	w3, [x0, 88]
 	strh	w4, [x0, 90]
-	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1309
-	adrp	x0, .LC84
+	ldr	w0, [x25, #:lo12:.LANCHOR14]
+	tbz	x0, 10, .L1323
+	adrp	x0, .LC85
 	and	w4, w4, 65535
 	and	w3, w3, 65535
 	mov	w2, w28
 	mov	w1, w27
-	add	x0, x0, :lo12:.LC84
+	add	x0, x0, :lo12:.LC85
 	bl	printf
-.L1309:
-	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1310
-	adrp	x0, .LANCHOR144
+.L1323:
+	ldr	w0, [x25, #:lo12:.LANCHOR14]
+	tbz	x0, 10, .L1324
+	adrp	x0, .LANCHOR147
 	ldr	w3, [x29, 156]
 	mov	w4, w22
 	mov	w2, w21
-	ldrh	w6, [x0, #:lo12:.LANCHOR144]
-	adrp	x0, .LANCHOR145
+	ldrh	w6, [x0, #:lo12:.LANCHOR147]
+	adrp	x0, .LANCHOR148
 	mov	w1, w20
-	ldrh	w5, [x0, #:lo12:.LANCHOR145]
-	adrp	x0, .LC85
-	add	x0, x0, :lo12:.LC85
+	ldrh	w5, [x0, #:lo12:.LANCHOR148]
+	adrp	x0, .LC86
+	add	x0, x0, :lo12:.LC86
 	bl	printf
-.L1310:
+.L1324:
 	sub	w0, w22, w21
 	str	w0, [x29, 148]
-	adrp	x0, .LANCHOR144
+	adrp	x0, .LANCHOR147
 	ldr	w1, [x29, 148]
-	ldrh	w0, [x0, #:lo12:.LANCHOR144]
+	ldrh	w0, [x0, #:lo12:.LANCHOR147]
 	cmp	w1, w0
-	bgt	.L1311
-	adrp	x1, .LANCHOR145
+	bgt	.L1325
+	adrp	x1, .LANCHOR148
 	ldr	w0, [x29, 156]
-	ldrh	w1, [x1, #:lo12:.LANCHOR145]
+	ldrh	w1, [x1, #:lo12:.LANCHOR148]
 	sub	w0, w0, w20
 	cmp	w0, w1
-	ble	.L1339
-.L1311:
+	ble	.L1353
+.L1325:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
-	adrp	x28, .LANCHOR63
-	add	x28, x28, :lo12:.LANCHOR63
+	adrp	x28, .LANCHOR64
+	add	x28, x28, :lo12:.LANCHOR64
 	mov	w27, 0
 	mov	w22, 0
 	ldrh	w26, [x0, 580]
-	ldr	x0, [x25, #:lo12:.LANCHOR102]
+	ldr	x0, [x23, #:lo12:.LANCHOR104]
 	ldrh	w0, [x0, 134]
 	str	w0, [x29, 152]
 	adrp	x0, .LANCHOR6
 	add	x0, x0, :lo12:.LANCHOR6
 	str	x0, [x29, 136]
-	adrp	x0, .LANCHOR145
-	add	x0, x0, :lo12:.LANCHOR145
+	adrp	x0, .LANCHOR148
+	add	x0, x0, :lo12:.LANCHOR148
 	str	x0, [x29, 128]
-.L1313:
+.L1327:
 	ldr	x0, [x29, 136]
 	ldr	w1, [x29, 152]
 	ldrh	w0, [x0]
 	cmp	w1, w0
-	bcc	.L1323
-.L1322:
+	bcc	.L1337
+.L1336:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	str	w26, [x0, 580]
-.L1312:
-	cbz	w21, .L1325
-	ldr	x2, [x25, #:lo12:.LANCHOR102]
+.L1326:
+	cbz	w21, .L1339
+	ldr	x2, [x23, #:lo12:.LANCHOR104]
 	adrp	x0, .LANCHOR6
 	ldrh	w5, [x0, #:lo12:.LANCHOR6]
-	ldr	x0, [x23, #:lo12:.LANCHOR7]
+	ldr	x0, [x24, #:lo12:.LANCHOR7]
 	ldrh	w1, [x2, 134]
 	add	x0, x0, x1, uxth 2
-.L1326:
+.L1340:
 	cmp	w1, w5
-	bcc	.L1328
+	bcc	.L1342
 	ldrh	w0, [x2, 72]
 	add	w0, w21, w0
 	strh	w0, [x2, 72]
 	ldrh	w0, [x2, 98]
 	cmp	w21, w0
-	bcs	.L1325
+	bcs	.L1339
 	sub	w21, w0, w21
 	strh	w21, [x2, 98]
-.L1325:
-	cbz	w20, .L1331
-	ldr	x2, [x25, #:lo12:.LANCHOR102]
+.L1339:
+	cbz	w20, .L1345
+	ldr	x2, [x23, #:lo12:.LANCHOR104]
 	adrp	x0, .LANCHOR6
 	ldrh	w6, [x0, #:lo12:.LANCHOR6]
-	ldr	x0, [x23, #:lo12:.LANCHOR7]
+	ldr	x0, [x24, #:lo12:.LANCHOR7]
 	ldrh	w1, [x2, 134]
 	add	x0, x0, x1, uxth 2
-.L1332:
+.L1346:
 	cmp	w1, w6
-	bcc	.L1334
+	bcc	.L1348
 	ldrh	w0, [x2, 74]
 	add	w0, w20, w0
 	strh	w0, [x2, 74]
 	ldrh	w0, [x2, 96]
 	cmp	w20, w0
-	bcs	.L1331
+	bcs	.L1345
 	sub	w20, w0, w20
 	strh	w20, [x2, 96]
-.L1331:
+.L1345:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L1290
+	beq	.L1303
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x1]
-	adrp	x1, .LANCHOR85
-	ldrh	w1, [x1, #:lo12:.LANCHOR85]
+	adrp	x1, .LANCHOR87
+	ldrh	w1, [x1, #:lo12:.LANCHOR87]
 	cmp	w2, w1
-	bhi	.L1290
+	bhi	.L1303
 	add	w22, w22, 1
 	mov	w2, 1
 	mov	w1, 0
 	bl	gc_add_sblk
-.L1290:
+.L1303:
 	add	w0, w22, w27
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -7845,52 +8122,52 @@ gc_static_wearleveling:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L1300:
-	uxtw	x7, w24
-	ldr	x6, [x23, #:lo12:.LANCHOR7]
+.L1313:
+	uxtw	x7, w25
+	ldr	x6, [x24, #:lo12:.LANCHOR7]
 	lsl	x2, x7, 2
 	add	x11, x6, x2
 	ldrb	w0, [x11, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L1292
+	beq	.L1305
 	ubfx	x4, x0, 3, 2
-	tbz	x4, 0, .L1293
+	tbz	x4, 0, .L1306
 	ldr	w0, [x6, x2]
 	ldrh	w1, [x6, x2]
 	ubfx	x0, x0, 11, 8
 	and	w1, w1, 2047
-.L1294:
+.L1307:
 	ldr	w3, [x29, 148]
 	add	w27, w27, 1
 	and	w27, w27, 65535
 	cmp	w20, w1
 	add	w3, w3, w1
 	str	w3, [x29, 148]
-	bls	.L1337
+	bls	.L1351
 	ldr	x3, [x19, #:lo12:.LANCHOR10]
 	mov	w20, w1
-	strh	w24, [x3, 586]
-.L1337:
+	strh	w25, [x3, 586]
+.L1351:
 	ldr	w3, [x29, 156]
 	cmp	w3, w1
-	bcs	.L1297
-	str	w24, [x29, 128]
+	bcs	.L1310
+	str	w25, [x29, 128]
 	str	w1, [x29, 156]
-.L1297:
+.L1310:
 	mov	w3, 65535
 	cmp	w0, w3
-	bne	.L1296
-.L1298:
+	bne	.L1309
+.L1311:
 	cmp	w0, 9
 	ccmp	w1, 9, 0, hi
-	bhi	.L1292
+	bhi	.L1305
 	ldr	w0, [x8]
-	tbz	x0, 8, .L1292
+	tbz	x0, 8, .L1305
 	adrp	x0, .LANCHOR9
 	ldr	w3, [x6, x2]
 	ldrh	w2, [x6, x2]
-	mov	w1, w24
+	mov	w1, w25
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrb	w6, [x11, 3]
 	ubfx	x3, x3, 11, 8
@@ -7898,84 +8175,84 @@ gc_static_wearleveling:
 	and	w2, w2, 2047
 	stp	x8, x10, [x29, 112]
 	ldrh	w7, [x0, x7, lsl 1]
-	adrp	x0, .LC79
+	adrp	x0, .LC80
 	ubfx	x5, x5, 5, 3
-	add	x0, x0, :lo12:.LC79
+	add	x0, x0, :lo12:.LC80
 	bl	printf
 	ldp	x8, x10, [x29, 112]
-.L1292:
-	add	w24, w24, 1
-	and	w24, w24, 65535
-	b	.L1291
-.L1293:
+.L1305:
+	add	w25, w25, 1
+	and	w25, w25, 65535
+	b	.L1304
+.L1306:
 	tst	w0, 24
-	bne	.L1295
+	bne	.L1308
 	ldrh	w1, [x6, x2]
 	mov	w0, 65535
 	and	w1, w1, 2047
-	b	.L1294
-.L1295:
+	b	.L1307
+.L1308:
 	ldr	w0, [x6, x2]
 	mov	w1, 65535
 	ubfx	x0, x0, 11, 8
-.L1296:
+.L1309:
 	ldr	w3, [x29, 152]
 	add	w28, w28, 1
 	and	w28, w28, 65535
 	cmp	w21, w0
 	add	w3, w3, w0
 	str	w3, [x29, 152]
-	bls	.L1299
+	bls	.L1312
 	ldr	x3, [x19, #:lo12:.LANCHOR10]
 	mov	w21, w0
-	strh	w24, [x3, 584]
-.L1299:
+	strh	w25, [x3, 584]
+.L1312:
 	cmp	w22, w0
-	bcs	.L1298
+	bcs	.L1311
 	mov	w22, w0
-	str	w24, [x29, 136]
-	b	.L1298
-.L1303:
-	tst	w0, 224
-	bne	.L1302
+	str	w25, [x29, 136]
+	b	.L1311
+.L1317:
+	cbnz	w1, .L1316
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
 	mov	w0, 65535
 	ldrh	w2, [x1, 590]
 	cmp	w2, w0
-	bne	.L1302
+	bne	.L1316
 	ldrh	w0, [x1, 586]
 	ldrh	w1, [x1, 588]
 	cmp	w1, w0
-	beq	.L1302
+	beq	.L1316
 	bl	zftl_remove_free_node
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldrh	w1, [x0, 586]
 	strh	w1, [x0, 590]
 	mov	w1, -1
 	strh	w1, [x0, 586]
-	b	.L1302
-.L1306:
-	tst	w0, 224
-	bne	.L1305
+	b	.L1316
+.L1320:
+	and	w0, w0, 248
+	cmp	w0, 16
+	bne	.L1319
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
 	mov	w0, 65535
 	ldrh	w2, [x1, 588]
 	cmp	w2, w0
-	bne	.L1305
+	bne	.L1319
 	ldrh	w0, [x1, 584]
 	ldrh	w1, [x1, 590]
 	cmp	w1, w0
-	beq	.L1305
+	beq	.L1319
 	bl	zftl_remove_free_node
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldrh	w1, [x0, 584]
 	strh	w1, [x0, 588]
 	mov	w1, -1
 	strh	w1, [x0, 584]
-	b	.L1305
-.L1323:
+	b	.L1319
+.L1337:
 	add	w7, w26, 1
-	ldr	x4, [x23, #:lo12:.LANCHOR7]
+	ldr	x4, [x24, #:lo12:.LANCHOR7]
 	and	w26, w7, 65535
 	cmp	w0, w26
 	csel	w26, w26, wzr, hi
@@ -7984,31 +8261,31 @@ gc_static_wearleveling:
 	add	x0, x4, x3
 	ldrb	w0, [x0, 2]
 	tst	w0, 192
-	beq	.L1315
+	beq	.L1329
 	and	w2, w0, 224
 	cmp	w2, 224
-	beq	.L1315
+	beq	.L1329
 	ubfx	x0, x0, 3, 2
 	and	w1, w0, 1
-	tbz	x0, 0, .L1316
+	tbz	x0, 0, .L1330
 	cmp	w2, 160
-.L1403:
-	bne	.L1318
-	adrp	x0, .LANCHOR144
+.L1417:
+	bne	.L1332
+	adrp	x0, .LANCHOR147
 	ldr	w2, [x29, 148]
-	ldrh	w0, [x0, #:lo12:.LANCHOR144]
+	ldrh	w0, [x0, #:lo12:.LANCHOR147]
 	cmp	w2, w0
-	ble	.L1319
+	ble	.L1333
 	ldr	w0, [x4, x3]
 	ubfx	x0, x0, 11, 8
 	cmp	w0, w21
-	bls	.L1320
-	cbz	w1, .L1319
+	bls	.L1334
+	cbz	w1, .L1333
 	ldrh	w0, [x4, x3]
 	and	w0, w0, 2047
 	cmp	w0, w20
-	bgt	.L1319
-.L1320:
+	bgt	.L1333
+.L1334:
 	stp	x4, x8, [x29, 104]
 	mov	w2, 1
 	str	x3, [x29, 120]
@@ -8016,61 +8293,61 @@ gc_static_wearleveling:
 	mov	w0, w26
 	bl	gc_add_sblk
 	mov	w0, 1
-	strh	w0, [x28, 318]
-	ldr	w0, [x24, #:lo12:.LANCHOR14]
+	strh	w0, [x28, 574]
+	ldr	w0, [x25, #:lo12:.LANCHOR14]
 	add	w22, w22, 1
 	ldp	x4, x8, [x29, 104]
 	ldr	x3, [x29, 120]
-	tbz	x0, 10, .L1319
+	tbz	x0, 10, .L1333
 	adrp	x0, .LANCHOR9
 	ldr	w6, [x4, x3]
 	ldrh	w5, [x4, x3]
 	ldr	x1, [x0, #:lo12:.LANCHOR9]
-	ldr	x0, [x23, #:lo12:.LANCHOR7]
+	ldr	x0, [x24, #:lo12:.LANCHOR7]
 	ubfx	x6, x6, 11, 8
 	ldrh	w4, [x28, 56]
 	and	w5, w5, 2047
 	add	x3, x0, x3
-	adrp	x0, .LC86
-	add	x0, x0, :lo12:.LC86
+	adrp	x0, .LC87
+	add	x0, x0, :lo12:.LC87
 	ldrb	w2, [x3, 2]
 	ldrh	w3, [x1, x8, lsl 1]
 	mov	w1, w26
 	ubfx	x2, x2, 5, 3
-.L1404:
+.L1418:
 	bl	printf
-.L1319:
+.L1333:
 	cmp	w22, 4
 	ccmp	w27, 4, 2, ls
-	bhi	.L1322
-.L1315:
+	bhi	.L1336
+.L1329:
 	ldr	w0, [x29, 152]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	str	w0, [x29, 152]
-	b	.L1313
-.L1316:
+	b	.L1327
+.L1330:
 	cmp	w0, 2
-	b	.L1403
-.L1318:
+	b	.L1417
+.L1332:
 	ldr	x2, [x29, 128]
 	ldr	w0, [x29, 156]
 	sub	w0, w0, w20
 	ldrh	w2, [x2]
 	cmp	w0, w2
-	ble	.L1319
+	ble	.L1333
 	ldrh	w0, [x4, x3]
 	add	w2, w20, 8
 	and	w0, w0, 2047
 	cmp	w0, w2
-	ble	.L1321
-	cbz	w1, .L1319
+	ble	.L1335
+	cbz	w1, .L1333
 	ldr	w0, [x4, x3]
 	add	w1, w21, 4
 	ubfx	x0, x0, 11, 8
 	cmp	w0, w1
-	bgt	.L1319
-.L1321:
+	bgt	.L1333
+.L1335:
 	stp	x4, x8, [x29, 104]
 	mov	w2, 1
 	str	x3, [x29, 120]
@@ -8078,69 +8355,69 @@ gc_static_wearleveling:
 	mov	w0, w26
 	bl	gc_add_sblk
 	mov	w0, 1
-	strh	w0, [x28, 318]
-	ldr	w0, [x24, #:lo12:.LANCHOR14]
+	strh	w0, [x28, 574]
+	ldr	w0, [x25, #:lo12:.LANCHOR14]
 	add	w27, w27, 1
 	ldp	x4, x8, [x29, 104]
 	ldr	x3, [x29, 120]
-	tbz	x0, 10, .L1319
+	tbz	x0, 10, .L1333
 	adrp	x0, .LANCHOR9
 	ldr	w6, [x4, x3]
 	ldrh	w5, [x4, x3]
 	ldr	x1, [x0, #:lo12:.LANCHOR9]
-	ldr	x0, [x23, #:lo12:.LANCHOR7]
+	ldr	x0, [x24, #:lo12:.LANCHOR7]
 	ubfx	x6, x6, 11, 8
 	and	w5, w5, 2047
 	ldrh	w4, [x28, 56]
 	add	x3, x0, x3
-	adrp	x0, .LC87
-	add	x0, x0, :lo12:.LC87
+	adrp	x0, .LC88
+	add	x0, x0, :lo12:.LC88
 	ldrb	w2, [x3, 2]
 	ldrh	w3, [x1, x8, lsl 1]
 	mov	w1, w26
 	ubfx	x2, x2, 5, 3
-	b	.L1404
-.L1339:
+	b	.L1418
+.L1353:
 	mov	w27, 0
 	mov	w22, 0
-	b	.L1312
-.L1328:
+	b	.L1326
+.L1342:
 	ldr	w3, [x0]
 	ubfx	x4, x3, 11, 8
 	cmp	w21, w4
-	bhi	.L1327
+	bhi	.L1341
 	ldrb	w6, [x0, 2]
 	tst	w6, 24
-	beq	.L1327
+	beq	.L1341
 	sub	w4, w4, w21
 	bfi	w3, w4, 11, 8
 	str	w3, [x0]
-.L1327:
+.L1341:
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 65535
-	b	.L1326
-.L1334:
+	b	.L1340
+.L1348:
 	ldrh	w3, [x0]
 	and	w4, w3, 2047
 	cmp	w4, w20
-	blt	.L1333
+	blt	.L1347
 	ldrb	w5, [x0, 2]
 	and	w5, w5, 24
 	cmp	w5, 16
-	beq	.L1333
+	beq	.L1347
 	sub	w4, w4, w20
 	bfi	w3, w4, 0, 11
 	strh	w3, [x0]
-.L1333:
+.L1347:
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 65535
-	b	.L1332
-.L1338:
+	b	.L1346
+.L1352:
 	mov	w27, 0
 	mov	w22, 0
-	b	.L1290
+	b	.L1303
 	.size	gc_static_wearleveling, .-gc_static_wearleveling
 	.section	.text.zftl_sblk_list_init,"ax",@progbits
 	.align	2
@@ -8156,80 +8433,80 @@ zftl_sblk_list_init:
 	adrp	x28, .LANCHOR4
 	stp	x19, x20, [sp, 16]
 	ldrh	w2, [x27, #:lo12:.LANCHOR6]
-	adrp	x20, .LANCHOR92
+	adrp	x20, .LANCHOR94
 	stp	x21, x22, [sp, 32]
-	adrp	x19, .LANCHOR88
+	adrp	x19, .LANCHOR90
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR99
+	adrp	x22, .LANCHOR101
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR102
+	adrp	x25, .LANCHOR104
 	mul	w2, w2, w0
 	ldr	x0, [x28, #:lo12:.LANCHOR4]
-	adrp	x24, .LANCHOR95
-	adrp	x23, .LANCHOR97
-	adrp	x21, .LANCHOR90
+	adrp	x24, .LANCHOR97
+	adrp	x23, .LANCHOR99
+	adrp	x21, .LANCHOR92
 	bl	ftl_memset
 	str	x28, [x29, 168]
-	adrp	x0, .LANCHOR101
-	adrp	x2, .LANCHOR78
-	adrp	x3, .LANCHOR77
+	adrp	x0, .LANCHOR103
+	adrp	x2, .LANCHOR80
+	adrp	x3, .LANCHOR79
 	mov	w1, 16
-	strh	w1, [x0, #:lo12:.LANCHOR101]
-	adrp	x10, .LANCHOR96
-	ldrb	w0, [x2, #:lo12:.LANCHOR78]
-	adrp	x8, .LANCHOR98
-	ldrh	w1, [x3, #:lo12:.LANCHOR77]
-	adrp	x7, .LANCHOR100
-	adrp	x6, .LANCHOR81
+	strh	w1, [x0, #:lo12:.LANCHOR103]
+	adrp	x10, .LANCHOR98
+	ldrb	w0, [x2, #:lo12:.LANCHOR80]
+	adrp	x8, .LANCHOR100
+	ldrh	w1, [x3, #:lo12:.LANCHOR79]
+	adrp	x7, .LANCHOR102
+	adrp	x6, .LANCHOR83
 	adrp	x5, .LANCHOR12
-	adrp	x4, .LANCHOR80
-	str	xzr, [x10, #:lo12:.LANCHOR96]
-	str	xzr, [x8, #:lo12:.LANCHOR98]
+	adrp	x4, .LANCHOR82
+	str	xzr, [x10, #:lo12:.LANCHOR98]
+	str	xzr, [x8, #:lo12:.LANCHOR100]
 	adrp	x28, .LANCHOR7
 	mul	w1, w0, w1
 	mov	w0, 32768
-	str	xzr, [x7, #:lo12:.LANCHOR100]
-	str	xzr, [x6, #:lo12:.LANCHOR81]
+	str	xzr, [x7, #:lo12:.LANCHOR102]
+	str	xzr, [x6, #:lo12:.LANCHOR83]
 	str	xzr, [x5, #:lo12:.LANCHOR12]
 	sdiv	w0, w0, w1
-	str	xzr, [x4, #:lo12:.LANCHOR80]
-	strh	wzr, [x24, #:lo12:.LANCHOR95]
-	strh	wzr, [x23, #:lo12:.LANCHOR97]
-	strh	wzr, [x22, #:lo12:.LANCHOR99]
+	str	xzr, [x4, #:lo12:.LANCHOR82]
+	strh	wzr, [x24, #:lo12:.LANCHOR97]
+	strh	wzr, [x23, #:lo12:.LANCHOR99]
+	strh	wzr, [x22, #:lo12:.LANCHOR101]
 	sxth	w0, w0
 	str	w0, [x29, 188]
-	ldr	x0, [x25, #:lo12:.LANCHOR102]
-	strh	wzr, [x21, #:lo12:.LANCHOR90]
-	strh	wzr, [x20, #:lo12:.LANCHOR92]
-	strh	wzr, [x19, #:lo12:.LANCHOR88]
+	ldr	x0, [x25, #:lo12:.LANCHOR104]
+	strh	wzr, [x21, #:lo12:.LANCHOR92]
+	strh	wzr, [x20, #:lo12:.LANCHOR94]
+	strh	wzr, [x19, #:lo12:.LANCHOR90]
 	strh	wzr, [x0, 146]
 	ldrsh	w26, [x0, 134]
 	add	x0, x27, :lo12:.LANCHOR6
-	adrp	x27, .LC88
-	add	x27, x27, :lo12:.LC88
+	adrp	x27, .LC89
+	add	x27, x27, :lo12:.LC89
 	stp	x3, x2, [x29, 104]
 	stp	x4, x5, [x29, 120]
 	stp	x6, x7, [x29, 136]
 	stp	x8, x10, [x29, 152]
 	str	x0, [x29, 176]
-.L1406:
+.L1420:
 	ldr	x0, [x29, 176]
 	ldrh	w0, [x0]
 	cmp	w26, w0
-	blt	.L1422
-	ldr	x0, [x25, #:lo12:.LANCHOR102]
-	ldrh	w1, [x24, #:lo12:.LANCHOR95]
+	blt	.L1436
+	ldr	x0, [x25, #:lo12:.LANCHOR104]
+	ldrh	w1, [x24, #:lo12:.LANCHOR97]
 	ldp	x25, x26, [sp, 64]
 	strh	w1, [x0, 114]
-	ldrh	w1, [x23, #:lo12:.LANCHOR97]
+	ldrh	w1, [x23, #:lo12:.LANCHOR99]
 	strh	w1, [x0, 118]
-	ldrh	w1, [x22, #:lo12:.LANCHOR99]
+	ldrh	w1, [x22, #:lo12:.LANCHOR101]
 	strh	w1, [x0, 116]
-	ldrh	w1, [x21, #:lo12:.LANCHOR90]
+	ldrh	w1, [x21, #:lo12:.LANCHOR92]
 	strh	w1, [x0, 122]
-	ldrh	w1, [x20, #:lo12:.LANCHOR92]
+	ldrh	w1, [x20, #:lo12:.LANCHOR94]
 	strh	w1, [x0, 120]
-	ldrh	w1, [x19, #:lo12:.LANCHOR88]
+	ldrh	w1, [x19, #:lo12:.LANCHOR90]
 	strh	w1, [x0, 124]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -8237,28 +8514,28 @@ zftl_sblk_list_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L1422:
+.L1436:
 	ldr	x4, [x28, #:lo12:.LANCHOR7]
 	sxtw	x2, w26
 	add	x4, x4, x2, lsl 2
 	ldrb	w6, [x4, 3]
-	cbz	w6, .L1423
+	cbz	w6, .L1437
 	ldr	x0, [x29, 112]
 	mov	w1, 0
-	ldr	x7, [x25, #:lo12:.LANCHOR102]
-	ldrb	w8, [x0, #:lo12:.LANCHOR78]
+	ldr	x7, [x25, #:lo12:.LANCHOR104]
+	ldrb	w8, [x0, #:lo12:.LANCHOR80]
 	ldr	x0, [x29, 104]
-	ldrh	w10, [x0, #:lo12:.LANCHOR77]
+	ldrh	w10, [x0, #:lo12:.LANCHOR79]
 	mov	w0, 0
-.L1408:
+.L1422:
 	cmp	w1, w8
-	blt	.L1411
-	cbz	w0, .L1412
+	blt	.L1425
+	cbz	w0, .L1426
 	mov	w1, 32768
 	sdiv	w0, w1, w0
 	add	w0, w0, 1
 	sxth	w0, w0
-.L1407:
+.L1421:
 	ldr	x3, [x29, 168]
 	mov	w1, 6
 	smull	x1, w26, w1
@@ -8273,44 +8550,44 @@ zftl_sblk_list_init:
 	and	w0, w1, 224
 	cmp	w0, 32
 	ccmp	w0, w5, 4, ne
-	beq	.L1413
+	beq	.L1427
 	adrp	x5, .LANCHOR10
 	ldr	x5, [x5, #:lo12:.LANCHOR10]
 	ldrh	w6, [x5, 16]
 	cmp	w26, w6
-	beq	.L1413
+	beq	.L1427
 	ldrh	w6, [x5, 48]
 	cmp	w26, w6
-	beq	.L1413
+	beq	.L1427
 	ldrh	w5, [x5, 80]
 	cmp	w26, w5
-	beq	.L1413
+	beq	.L1427
 	cmp	w0, 64
-	bne	.L1414
+	bne	.L1428
 	ldr	x0, [x29, 128]
-	add	x2, x21, :lo12:.LANCHOR90
+	add	x2, x21, :lo12:.LANCHOR92
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR12
-.L1426:
+.L1440:
 	bl	_insert_data_list
-.L1413:
+.L1427:
 	add	w3, w26, 1
 	sxth	w26, w3
-	b	.L1406
-.L1411:
+	b	.L1420
+.L1425:
 	asr	w5, w6, w1
-	tbnz	x5, 0, .L1409
+	tbnz	x5, 0, .L1423
 	add	w0, w10, w0
 	sxth	w0, w0
-.L1410:
+.L1424:
 	add	w1, w1, 1
-	b	.L1408
-.L1409:
+	b	.L1422
+.L1423:
 	ldrh	w5, [x7, 146]
 	add	w5, w5, 1
 	strh	w5, [x7, 146]
-	b	.L1410
-.L1412:
+	b	.L1424
+.L1426:
 	ldrb	w1, [x4, 2]
 	mov	w5, -1
 	orr	w1, w1, -32
@@ -8318,309 +8595,292 @@ zftl_sblk_list_init:
 	adrp	x1, .LANCHOR9
 	ldr	x1, [x1, #:lo12:.LANCHOR9]
 	strh	w5, [x1, x2, lsl 1]
-	b	.L1407
-.L1423:
+	b	.L1421
+.L1437:
 	ldr	w0, [x29, 188]
-	b	.L1407
-.L1414:
+	b	.L1421
+.L1428:
 	cmp	w0, 96
-	bne	.L1415
+	bne	.L1429
 	ldr	x0, [x29, 136]
-	add	x2, x19, :lo12:.LANCHOR88
+	add	x2, x19, :lo12:.LANCHOR90
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR81
-	b	.L1426
-.L1415:
+	add	x0, x0, :lo12:.LANCHOR83
+	b	.L1440
+.L1429:
 	cmp	w0, 160
-	bne	.L1416
+	bne	.L1430
 	ldr	x0, [x29, 120]
-	add	x2, x20, :lo12:.LANCHOR92
+	add	x2, x20, :lo12:.LANCHOR94
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR80
-	b	.L1426
-.L1416:
-	cbnz	w0, .L1413
+	add	x0, x0, :lo12:.LANCHOR82
+	b	.L1440
+.L1430:
+	cbnz	w0, .L1427
 	adrp	x0, .LANCHOR9
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w2, [x0, x2, lsl 1]
-	cbz	w2, .L1417
+	cbz	w2, .L1431
 	str	x4, [x29, 96]
 	mov	w1, w26
 	mov	x0, x27
 	bl	printf
 	ldr	x4, [x29, 96]
 	ldrb	w0, [x4, 2]
-	tbz	x0, 4, .L1418
+	tbz	x0, 4, .L1432
 	mov	w1, 5
-.L1425:
+.L1439:
 	bfi	w0, w1, 5, 3
 	strb	w0, [x4, 2]
 	mov	w2, 0
 	mov	w1, 1
 	mov	w0, w26
 	bl	gc_add_sblk
-	b	.L1413
-.L1418:
+	b	.L1427
+.L1432:
 	mov	w1, 2
-	b	.L1425
-.L1417:
+	b	.L1439
+.L1431:
 	ands	w1, w1, 24
-	bne	.L1420
+	bne	.L1434
 	ldr	x0, [x29, 160]
-	add	x2, x24, :lo12:.LANCHOR95
+	add	x2, x24, :lo12:.LANCHOR97
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR96
-.L1427:
+	add	x0, x0, :lo12:.LANCHOR98
+.L1441:
 	bl	_insert_free_list
-	b	.L1413
-.L1420:
+	b	.L1427
+.L1434:
 	cmp	w1, 16
-	bne	.L1421
+	bne	.L1435
 	ldr	x0, [x29, 152]
-	add	x2, x23, :lo12:.LANCHOR97
+	add	x2, x23, :lo12:.LANCHOR99
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR98
-	b	.L1427
-.L1421:
+	add	x0, x0, :lo12:.LANCHOR100
+	b	.L1441
+.L1435:
 	ldr	x0, [x29, 144]
-	add	x2, x22, :lo12:.LANCHOR99
+	add	x2, x22, :lo12:.LANCHOR101
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR100
-	b	.L1427
+	add	x0, x0, :lo12:.LANCHOR102
+	b	.L1441
 	.size	zftl_sblk_list_init, .-zftl_sblk_list_init
-	.section	.text.ftl_open_sblk_init,"ax",@progbits
-	.align	2
-	.global	ftl_open_sblk_init
-	.type	ftl_open_sblk_init, %function
-ftl_open_sblk_init:
-	stp	x29, x30, [sp, -80]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR78
-	stp	x21, x22, [sp, 32]
-	mov	x19, x0
-	stp	x23, x24, [sp, 48]
-	adrp	x21, .LC76
-	adrp	x23, .LANCHOR85
-	mov	w22, w1
-	add	x23, x23, :lo12:.LANCHOR85
-	add	x20, x20, :lo12:.LANCHOR78
-	add	x21, x21, :lo12:.LC76
-	stp	x25, x26, [sp, 64]
-.L1429:
-.L1432:
-	mov	w0, w22
-	bl	ftl_alloc_sblk
-	mov	w1, 0
-	and	w24, w0, 65535
-	bl	ftl_erase_sblk
-	add	x1, x19, 16
-	mov	w0, w24
-	bl	ftl_get_blk_list_in_sblk
-	and	w0, w0, 255
-	ldrh	w1, [x23]
-	cmp	w22, 2
-	strb	w0, [x19, 9]
-	strh	w24, [x19]
-	strh	wzr, [x19, 2]
-	mul	w0, w1, w0
-	strb	wzr, [x19, 5]
-	strh	w0, [x19, 6]
-	strh	wzr, [x19, 10]
-	strb	w22, [x19, 4]
-	beq	.L1433
-	ldrb	w0, [x20]
-	mul	w0, w1, w0
-	and	w0, w0, 65535
-.L1430:
-	ldrb	w2, [x20]
-	adrp	x26, .LANCHOR9
-	strh	w0, [x19, 12]
-	ubfiz	x25, x24, 1, 16
-	mul	w2, w2, w1
-	adrp	x1, .LANCHOR109
-	ldr	x3, [x1, #:lo12:.LANCHOR109]
-	mov	w1, 255
-	lsl	w2, w2, 2
-	add	x0, x3, x0, uxth 2
-	bl	ftl_memset
-	ldr	x0, [x26, #:lo12:.LANCHOR9]
-	ldrh	w1, [x19, 6]
-	strh	w1, [x0, x25]
-	ldrb	w0, [x19, 9]
-	cbnz	w0, .L1428
-	mov	w1, w24
-	mov	x0, x21
-	bl	printf
-	ldr	x0, [x26, #:lo12:.LANCHOR9]
-	mov	w1, -1
-	strh	w1, [x0, x25]
-	mov	w0, 7
-	strb	w0, [x19, 4]
-	b	.L1432
-.L1433:
-	mov	w0, 0
-	b	.L1430
-.L1428:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
-	ret
-	.size	ftl_open_sblk_init, .-ftl_open_sblk_init
 	.section	.text.pm_free_sblk,"ax",@progbits
 	.align	2
 	.global	pm_free_sblk
 	.type	pm_free_sblk, %function
 pm_free_sblk:
-	stp	x29, x30, [sp, -368]!
+	stp	x29, x30, [sp, -384]!
+	adrp	x0, .LANCHOR149
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR146
+	mov	x19, x0
+	ldrh	w1, [x0, #:lo12:.LANCHOR149]
 	stp	x21, x22, [sp, 32]
-	ldrh	w0, [x20, #:lo12:.LANCHOR146]
 	stp	x23, x24, [sp, 48]
+	cmp	w1, 128
 	stp	x25, x26, [sp, 64]
-	cmp	w0, 128
 	stp	x27, x28, [sp, 80]
-	bls	.L1436
-	adrp	x1, .LANCHOR147
+	bls	.L1443
+	adrp	x1, .LANCHOR150
 	adrp	x0, .LC0
-	mov	w2, 78
-	add	x1, x1, :lo12:.LANCHOR147
+	mov	w2, 84
+	add	x1, x1, :lo12:.LANCHOR150
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1436:
-	add	x28, x29, 112
+.L1443:
+	adrp	x5, .LANCHOR104
+	mov	x26, x5
+	ldrh	w3, [x19, #:lo12:.LANCHOR149]
+	mov	w1, 0
+	ldr	x0, [x5, #:lo12:.LANCHOR104]
+	mov	w19, 0
+	mov	w4, 65535
+	add	x0, x0, 416
+	ldrh	w2, [x0, 272]
+.L1446:
+	ldrh	w6, [x0]
+	cmp	w6, w4
+	beq	.L1444
+	add	w1, w1, 1
+	and	w1, w1, 65535
+.L1444:
+	cmp	w1, w2
+	bcs	.L1445
+	cmp	w1, w3
+	bcs	.L1445
+	add	w19, w19, 1
+	add	x0, x0, 2
+	and	w19, w19, 65535
+	cmp	w19, 128
+	bne	.L1446
+.L1445:
+	add	w19, w19, 1
+	mov	w0, 128
+	and	w19, w19, 65535
+	add	x22, x29, 128
+	cmp	w19, 129
 	mov	w2, 256
+	csel	w19, w19, w0, ne
 	mov	w1, 0
-	mov	x0, x28
+	mov	x0, x22
+	adrp	x23, .LANCHOR69
 	bl	ftl_memset
-	adrp	x23, .LANCHOR67
-	adrp	x5, .LANCHOR102
-	adrp	x0, .LANCHOR66
-	mov	w2, 21
-	ldrb	w12, [x23, #:lo12:.LANCHOR67]
-	ldr	x7, [x5, #:lo12:.LANCHOR102]
-	ldrh	w11, [x0, #:lo12:.LANCHOR66]
-	ldrh	w13, [x20, #:lo12:.LANCHOR146]
-	add	x4, x7, 704
-	sub	w0, w2, w11
+	adrp	x0, .LANCHOR68
+	ldr	x6, [x26, #:lo12:.LANCHOR104]
+	mov	w2, 24
+	ldrb	w11, [x23, #:lo12:.LANCHOR69]
+	ldrh	w10, [x0, #:lo12:.LANCHOR68]
+	adrp	x0, .LANCHOR31
+	add	x4, x6, 704
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	ldrh	w1, [x6, 698]
+	sub	w2, w2, w0
+	sub	w0, w2, w10
+	add	x1, x1, 176
 	mov	w2, 1
-	ldrh	w1, [x7, 698]
+	add	x1, x6, x1, lsl 2
 	lsl	w2, w2, w0
 	sub	w2, w2, #1
-	add	x1, x1, 176
-	add	x1, x7, x1, lsl 2
-.L1437:
-	cmp	x4, x1
-	bne	.L1441
-	adrp	x24, .LANCHOR78
-	adrp	x25, .LANCHOR85
-	adrp	x26, .LANCHOR14
-	adrp	x27, .LC89
-	ldrb	w22, [x24, #:lo12:.LANCHOR78]
-	add	x20, x20, :lo12:.LANCHOR146
-	ldrh	w0, [x25, #:lo12:.LANCHOR85]
-	add	x26, x26, :lo12:.LANCHOR14
-	add	x27, x27, :lo12:.LC89
-	mov	w19, 0
-	str	wzr, [x29, 108]
-	mul	w22, w22, w0
-	and	w22, w22, 65535
-.L1442:
-	ldrh	w0, [x20]
-	cmp	w0, w19
-	bhi	.L1448
-	ldr	w0, [x29, 108]
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 368
-	ret
-.L1441:
-	ldr	w0, [x4]
-	add	x8, x7, 416
-	mov	x3, 0
-	lsr	w0, w0, w11
-	and	w0, w0, w2
-	udiv	w0, w0, w12
-	and	w0, w0, 65535
-.L1438:
-	cmp	w13, w3, uxth
-	bhi	.L1440
-	add	x4, x4, 4
-	b	.L1437
-.L1440:
-	ldrh	w10, [x8]
-	cmp	w10, w0
-	bne	.L1439
-	ldrh	w10, [x28, x3, lsl 1]
-	add	w10, w10, 1
-	strh	w10, [x28, x3, lsl 1]
-.L1439:
-	add	x3, x3, 1
-	add	x8, x8, 2
-	b	.L1438
 .L1448:
-	ldr	x1, [x5, #:lo12:.LANCHOR102]
-	sxtw	x21, w19
-	add	x0, x21, 208
-	ldrb	w2, [x23, #:lo12:.LANCHOR67]
-	ldrh	w3, [x1, x0, lsl 1]
-	ldrh	w0, [x1, 692]
-	sdiv	w0, w0, w2
-	cmp	w0, w3
-	bne	.L1443
-	ldrb	w0, [x24, #:lo12:.LANCHOR78]
-	ldrh	w2, [x25, #:lo12:.LANCHOR85]
-	mul	w0, w0, w2
-	strh	w0, [x28, x21, lsl 1]
-.L1443:
-	ldrh	w0, [x28, x21, lsl 1]
-	cmp	w22, w0
-	bls	.L1444
-	cbnz	w0, .L1449
-.L1446:
-	mov	w0, 65535
-	cmp	w3, w0
-	beq	.L1445
-	ldr	w0, [x26]
-	tbz	x0, 12, .L1447
-	ldrh	w4, [x1, 688]
-	mov	w2, 0
-	str	x5, [x29, 96]
-	mov	w1, w19
+	cmp	x1, x4
+	bne	.L1451
+	adrp	x24, .LANCHOR80
+	adrp	x25, .LANCHOR87
+	adrp	x27, .LC90
+	adrp	x28, .LANCHOR14
+	ldrb	w21, [x24, #:lo12:.LANCHOR80]
+	add	x23, x23, :lo12:.LANCHOR69
+	ldrh	w0, [x25, #:lo12:.LANCHOR87]
+	add	x27, x27, :lo12:.LC90
+	add	x28, x28, :lo12:.LANCHOR14
+	mov	x20, 0
+	mov	w7, 65535
+	str	wzr, [x29, 124]
+	mul	w21, w21, w0
+	and	w21, w21, 65535
+.L1457:
+	ldr	x0, [x26, #:lo12:.LANCHOR104]
+	and	w6, w20, 65535
+	ldrb	w2, [x23]
+	mov	w8, w20
+	add	x1, x0, x20, sxtw 1
+	ldrh	w3, [x1, 416]
+	ldrh	w1, [x0, 692]
+	sdiv	w1, w1, w2
+	cmp	w1, w3
+	bne	.L1452
+	ldrb	w1, [x24, #:lo12:.LANCHOR80]
+	ldrh	w2, [x25, #:lo12:.LANCHOR87]
+	mul	w1, w1, w2
+	strh	w1, [x22, x20, lsl 1]
+.L1452:
+	ldrh	w2, [x22, x20, lsl 1]
+	cmp	w2, w21
+	bcs	.L1453
+	cmp	w2, 0
+	ldr	w1, [x29, 124]
+	csel	w21, w21, w2, eq
+	csel	w1, w1, w6, eq
+	str	w1, [x29, 124]
+.L1453:
+	ldrh	w1, [x0, 74]
+	cmp	w1, 2
+	bls	.L1454
+	mov	w1, 65535
+	cmp	w3, w1
+	beq	.L1454
+	adrp	x4, .LANCHOR7
+	ubfiz	x1, x3, 2, 16
+	ldrh	w0, [x0, 92]
+	ldr	x4, [x4, #:lo12:.LANCHOR7]
+	add	w0, w0, 4
+	ldrh	w4, [x4, x1]
+	and	w4, w4, 2047
+	cmp	w4, w0
+	bgt	.L1454
+	mov	w1, w8
+	str	w6, [x29, 104]
+	str	w8, [x29, 112]
 	mov	x0, x27
 	bl	printf
-	ldr	x5, [x29, 96]
-.L1447:
-	ldr	x0, [x5, #:lo12:.LANCHOR102]
-	add	x21, x21, 208
-	str	x5, [x29, 96]
-	ldrh	w0, [x0, x21, lsl 1]
+	ldr	w6, [x29, 104]
+	ldr	w8, [x29, 112]
+	mov	w7, w6
+.L1454:
+	ldrh	w0, [x22, x20, lsl 1]
+	cbnz	w0, .L1455
+	ldr	x0, [x26, #:lo12:.LANCHOR104]
+	sxtw	x6, w8
+	add	x1, x6, 208
+	ldrh	w3, [x0, x1, lsl 1]
+	mov	w1, 65535
+	cmp	w3, w1
+	beq	.L1455
+	ldr	w1, [x28]
+	tbz	x1, 12, .L1456
+	ldrh	w4, [x0, 688]
+	mov	w2, 0
+	str	x6, [x29, 104]
+	mov	w1, w8
+	str	w7, [x29, 112]
+	adrp	x0, .LC91
+	add	x0, x0, :lo12:.LC91
+	bl	printf
+	ldr	w7, [x29, 112]
+	ldr	x6, [x29, 104]
+.L1456:
+	ldr	x0, [x26, #:lo12:.LANCHOR104]
+	add	x6, x6, 208
+	str	w7, [x29, 104]
+	str	x6, [x29, 112]
+	ldrh	w0, [x0, x6, lsl 1]
 	bl	ftl_free_sblk
-	ldr	x5, [x29, 96]
+	ldr	x0, [x26, #:lo12:.LANCHOR104]
 	mov	w1, -1
-	ldr	x0, [x5, #:lo12:.LANCHOR102]
-	strh	w1, [x0, x21, lsl 1]
+	ldr	x6, [x29, 112]
+	ldr	w7, [x29, 104]
+	strh	w1, [x0, x6, lsl 1]
 	ldrh	w1, [x0, 688]
 	sub	w1, w1, #1
 	strh	w1, [x0, 688]
-	b	.L1445
-.L1444:
-	cbz	w0, .L1446
-.L1445:
-	add	w19, w19, 1
-	and	w19, w19, 65535
-	b	.L1442
+.L1455:
+	add	x20, x20, 1
+	cmp	w19, w20, uxth
+	bhi	.L1457
+	mov	w0, 65535
+	cmp	w7, w0
+	ldr	w0, [x29, 124]
+	ldp	x19, x20, [sp, 16]
+	csel	w0, w0, w7, eq
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 384
+	ret
+.L1451:
+	ldr	w0, [x4]
+	add	x7, x6, 416
+	mov	x3, 0
+	lsr	w0, w0, w10
+	and	w0, w0, w2
+	udiv	w0, w0, w11
+	and	w0, w0, 65535
+.L1450:
+	ldrh	w8, [x7]
+	cmp	w8, w0
+	bne	.L1449
+	ldrh	w8, [x22, x3, lsl 1]
+	add	w8, w8, 1
+	strh	w8, [x22, x3, lsl 1]
 .L1449:
-	mov	w22, w0
-	str	w19, [x29, 108]
-	b	.L1445
+	add	x3, x3, 1
+	add	x7, x7, 2
+	cmp	w19, w3, uxth
+	bhi	.L1450
+	add	x4, x4, 4
+	b	.L1448
 	.size	pm_free_sblk, .-pm_free_sblk
 	.section	.text.ftl_memcpy,"ax",@progbits
 	.align	2
@@ -8640,14 +8900,14 @@ flash_info_data_init:
 	add	x29, sp, 0
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	str	x19, [sp, 16]
-	tbz	x0, 12, .L1456
-	adrp	x2, .LANCHOR148
-	adrp	x0, .LC90
-	add	x2, x2, :lo12:.LANCHOR148
+	tbz	x0, 12, .L1470
+	adrp	x2, .LANCHOR151
+	adrp	x0, .LC92
+	add	x2, x2, :lo12:.LANCHOR151
 	mov	w1, 105
-	add	x0, x0, :lo12:.LC90
+	add	x0, x0, :lo12:.LC92
 	bl	printf
-.L1456:
+.L1470:
 	adrp	x19, .LANCHOR27
 	mov	w2, 2048
 	mov	w1, 0
@@ -8669,9 +8929,9 @@ flash_info_data_init:
 	ldr	x0, [x19, #:lo12:.LANCHOR27]
 	mov	w2, 32
 	ldr	x19, [sp, 16]
-	adrp	x1, .LANCHOR31
+	adrp	x1, .LANCHOR32
 	ldp	x29, x30, [sp], 32
-	add	x1, x1, :lo12:.LANCHOR31
+	add	x1, x1, :lo12:.LANCHOR32
 	add	x0, x0, 48
 	b	ftl_memcpy
 	.size	flash_info_data_init, .-flash_info_data_init
@@ -8681,15 +8941,15 @@ flash_info_data_init:
 	.type	ftl_memcpy32, %function
 ftl_memcpy32:
 	mov	x3, 0
-.L1462:
+.L1476:
 	cmp	w2, w3
-	bhi	.L1463
+	bhi	.L1477
 	ret
-.L1463:
+.L1477:
 	ldr	w4, [x1, x3, lsl 2]
 	str	w4, [x0, x3, lsl 2]
 	add	x3, x3, 1
-	b	.L1462
+	b	.L1476
 	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.ftl_memcmp,"ax",@progbits
 	.align	2
@@ -8730,14 +8990,14 @@ nandc_init:
 	mov	x19, x0
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
 	str	wzr, [x29, 56]
-	tbz	x0, 12, .L1468
-	adrp	x1, .LANCHOR149
-	adrp	x0, .LC91
+	tbz	x0, 12, .L1482
+	adrp	x1, .LANCHOR152
+	adrp	x0, .LC93
 	mov	x2, x19
-	add	x1, x1, :lo12:.LANCHOR149
-	add	x0, x0, :lo12:.LC91
+	add	x1, x1, :lo12:.LANCHOR152
+	add	x0, x0, :lo12:.LC93
 	bl	printf
-.L1468:
+.L1482:
 	adrp	x20, .LANCHOR28
 	mov	w0, 6
 	ldr	w2, [x19, 352]
@@ -8748,24 +9008,24 @@ nandc_init:
 	mov	x22, x0
 	str	x19, [x0, #:lo12:.LANCHOR13]
 	cmp	w2, w1
-	bne	.L1469
+	bne	.L1483
 	mov	w0, 8
 	strb	w0, [x20, #:lo12:.LANCHOR28]
-.L1469:
+.L1483:
 	ldr	w1, [x19, 128]
 	mov	w0, 12336
 	movk	w0, 0x5639, lsl 16
 	cmp	w1, w0
-	bne	.L1470
+	bne	.L1484
 	mov	w0, 9
 	strb	w0, [x20, #:lo12:.LANCHOR28]
-.L1470:
+.L1484:
 	ldrb	w0, [x20, #:lo12:.LANCHOR28]
 	cmp	w0, 9
-	adrp	x0, .LANCHOR45
-	bne	.L1471
+	adrp	x0, .LANCHOR47
+	bne	.L1485
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR45]
+	strb	w1, [x0, #:lo12:.LANCHOR47]
 	ldr	w0, [x29, 56]
 	mov	w1, 2
 	orr	w0, w0, 256
@@ -8788,37 +9048,37 @@ nandc_init:
 	mov	w0, 39
 	str	w0, [x19, 84]
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1473
+	tbz	x0, 12, .L1487
 	ldr	w1, [x19]
 	ldr	w2, [x19, 8]
 	ldr	w3, [x19, 80]
 	ldr	w4, [x19, 84]
 	ldr	w5, [x19, 88]
-.L1486:
-	adrp	x0, .LC92
-	add	x0, x0, :lo12:.LC92
+.L1500:
+	adrp	x0, .LC94
+	add	x0, x0, :lo12:.LC94
 	bl	printf
-.L1473:
-	adrp	x0, .LANCHOR46
-	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR46]
+.L1487:
 	adrp	x0, .LANCHOR48
-	strh	wzr, [x0, #:lo12:.LANCHOR48]
-	adrp	x0, .LANCHOR44
-	strb	wzr, [x0, #:lo12:.LANCHOR44]
+	mov	w1, 1
+	strb	w1, [x0, #:lo12:.LANCHOR48]
+	adrp	x0, .LANCHOR50
+	strh	wzr, [x0, #:lo12:.LANCHOR50]
+	adrp	x0, .LANCHOR46
+	strb	wzr, [x0, #:lo12:.LANCHOR46]
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1467
+	tbz	x0, 12, .L1481
 	ldrb	w1, [x20, #:lo12:.LANCHOR28]
-	adrp	x0, .LC93
-	add	x0, x0, :lo12:.LC93
+	adrp	x0, .LC95
+	add	x0, x0, :lo12:.LC95
 	bl	printf
-.L1467:
+.L1481:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1471:
-	strb	wzr, [x0, #:lo12:.LANCHOR45]
+.L1485:
+	strb	wzr, [x0, #:lo12:.LANCHOR47]
 	mov	w1, 1
 	ldr	w0, [x29, 56]
 	orr	w0, w0, 256
@@ -8842,34 +9102,34 @@ nandc_init:
 	str	w0, [x19, 308]
 	mov	w0, 2048
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR47
-	str	x0, [x1, #:lo12:.LANCHOR47]
+	adrp	x1, .LANCHOR49
+	str	x0, [x1, #:lo12:.LANCHOR49]
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1473
+	tbz	x0, 12, .L1487
 	ldr	x0, [x22, #:lo12:.LANCHOR13]
 	ldr	w1, [x0]
 	ldr	w2, [x0, 344]
 	ldr	w3, [x0, 304]
 	ldr	w4, [x0, 308]
 	ldr	w5, [x0, 312]
-	b	.L1486
+	b	.L1500
 	.size	nandc_init, .-nandc_init
-	.section	.text.buf_init,"ax",@progbits
+	.section	.text.zbuf_init,"ax",@progbits
 	.align	2
-	.global	buf_init
-	.type	buf_init, %function
-buf_init:
+	.global	zbuf_init
+	.type	zbuf_init, %function
+zbuf_init:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LANCHOR50
+	adrp	x0, .LANCHOR52
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	add	x19, x0, :lo12:.LANCHOR50
+	add	x19, x0, :lo12:.LANCHOR52
 	stp	x21, x22, [sp, 32]
 	mov	x20, x0
-	adrp	x22, .LANCHOR123
-	add	x22, x22, :lo12:.LANCHOR123
+	adrp	x22, .LANCHOR125
+	add	x22, x22, :lo12:.LANCHOR125
 	mov	w21, 0
-.L1488:
+.L1502:
 	and	w0, w21, 255
 	strb	w0, [x19, 1]
 	add	w1, w0, 1
@@ -8886,110 +9146,110 @@ buf_init:
 	bl	ftl_malloc
 	str	x0, [x19, -40]
 	cmp	w21, 32
-	bne	.L1488
-	add	x0, x20, :lo12:.LANCHOR50
+	bne	.L1502
+	add	x0, x20, :lo12:.LANCHOR52
 	mov	w1, -1
 	strb	w1, [x0, 1984]
-	adrp	x0, .LANCHOR51
-	strb	wzr, [x0, #:lo12:.LANCHOR51]
-	adrp	x0, .LANCHOR52
+	adrp	x0, .LANCHOR53
+	strb	wzr, [x0, #:lo12:.LANCHOR53]
+	adrp	x0, .LANCHOR54
 	ldp	x19, x20, [sp, 16]
-	strb	w21, [x0, #:lo12:.LANCHOR52]
+	strb	w21, [x0, #:lo12:.LANCHOR54]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-	.size	buf_init, .-buf_init
+	.size	zbuf_init, .-zbuf_init
 	.section	.text.gc_init,"ax",@progbits
 	.align	2
 	.global	gc_init
 	.type	gc_init, %function
 gc_init:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR76
-	mov	w2, 344
+	adrp	x0, .LANCHOR78
+	mov	w2, 600
 	mov	w1, 0
 	add	x29, sp, 0
-	strb	wzr, [x0, #:lo12:.LANCHOR76]
-	adrp	x0, .LANCHOR150
+	strb	wzr, [x0, #:lo12:.LANCHOR78]
+	adrp	x0, .LANCHOR153
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR63
-	strb	wzr, [x0, #:lo12:.LANCHOR150]
-	adrp	x0, .LANCHOR151
-	add	x19, x20, :lo12:.LANCHOR63
-	str	wzr, [x0, #:lo12:.LANCHOR151]
-	adrp	x0, .LANCHOR87
-	strh	wzr, [x0, #:lo12:.LANCHOR87]
+	adrp	x20, .LANCHOR64
+	strb	wzr, [x0, #:lo12:.LANCHOR153]
+	adrp	x0, .LANCHOR154
+	add	x19, x20, :lo12:.LANCHOR64
+	str	wzr, [x0, #:lo12:.LANCHOR154]
+	adrp	x0, .LANCHOR89
+	strh	wzr, [x0, #:lo12:.LANCHOR89]
 	mov	x0, x19
 	bl	ftl_memset
 	str	xzr, [x19, 8]
 	mov	w0, -1
-	strh	w0, [x20, #:lo12:.LANCHOR63]
-	adrp	x0, .LANCHOR85
-	adrp	x4, .LANCHOR94
-	adrp	x20, .LANCHOR77
-	ldrh	w1, [x0, #:lo12:.LANCHOR85]
+	strh	w0, [x20, #:lo12:.LANCHOR64]
+	adrp	x0, .LANCHOR87
+	adrp	x4, .LANCHOR96
+	adrp	x20, .LANCHOR79
+	ldrh	w1, [x0, #:lo12:.LANCHOR87]
 	lsr	w2, w1, 1
 	lsr	w0, w1, 2
 	strh	w2, [x19, 38]
-	adrp	x2, .LANCHOR86
+	adrp	x2, .LANCHOR88
 	strh	w0, [x19, 36]
-	adrp	x19, .LANCHOR78
-	strh	wzr, [x2, #:lo12:.LANCHOR86]
-	adrp	x2, .LANCHOR82
-	ldrb	w3, [x19, #:lo12:.LANCHOR78]
-	strh	wzr, [x2, #:lo12:.LANCHOR82]
-	adrp	x2, .LANCHOR83
-	strh	wzr, [x2, #:lo12:.LANCHOR83]
+	adrp	x19, .LANCHOR80
+	strh	wzr, [x2, #:lo12:.LANCHOR88]
+	adrp	x2, .LANCHOR84
+	ldrb	w3, [x19, #:lo12:.LANCHOR80]
+	strh	wzr, [x2, #:lo12:.LANCHOR84]
+	adrp	x2, .LANCHOR85
+	strh	wzr, [x2, #:lo12:.LANCHOR85]
 	mul	w2, w1, w3
 	and	w2, w2, 65535
 	sub	w5, w2, #32
-	strh	w5, [x4, #:lo12:.LANCHOR94]
-	adrp	x4, .LANCHOR91
-	strh	w2, [x4, #:lo12:.LANCHOR91]
-	adrp	x2, .LANCHOR84
-	strh	w1, [x2, #:lo12:.LANCHOR84]
-	adrp	x1, .LANCHOR62
-	strh	w0, [x1, #:lo12:.LANCHOR62]
-	ldrh	w0, [x20, #:lo12:.LANCHOR77]
+	strh	w5, [x4, #:lo12:.LANCHOR96]
+	adrp	x4, .LANCHOR93
+	strh	w2, [x4, #:lo12:.LANCHOR93]
+	adrp	x2, .LANCHOR86
+	strh	w1, [x2, #:lo12:.LANCHOR86]
+	adrp	x1, .LANCHOR63
+	strh	w0, [x1, #:lo12:.LANCHOR63]
+	ldrh	w0, [x20, #:lo12:.LANCHOR79]
 	mul	w0, w0, w3
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR152
-	str	x0, [x1, #:lo12:.LANCHOR152]
-	ldrb	w1, [x19, #:lo12:.LANCHOR78]
-	ldrh	w0, [x20, #:lo12:.LANCHOR77]
+	adrp	x1, .LANCHOR155
+	str	x0, [x1, #:lo12:.LANCHOR155]
+	ldrb	w1, [x19, #:lo12:.LANCHOR80]
+	ldrh	w0, [x20, #:lo12:.LANCHOR79]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR153
-	str	x0, [x1, #:lo12:.LANCHOR153]
-	ldrh	w1, [x20, #:lo12:.LANCHOR77]
-	ldrb	w0, [x19, #:lo12:.LANCHOR78]
+	adrp	x1, .LANCHOR156
+	str	x0, [x1, #:lo12:.LANCHOR156]
+	ldrh	w1, [x20, #:lo12:.LANCHOR79]
+	ldrb	w0, [x19, #:lo12:.LANCHOR80]
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR74
-	str	x0, [x1, #:lo12:.LANCHOR74]
-	ldrb	w1, [x19, #:lo12:.LANCHOR78]
-	ldrh	w0, [x20, #:lo12:.LANCHOR77]
+	adrp	x1, .LANCHOR76
+	str	x0, [x1, #:lo12:.LANCHOR76]
+	ldrb	w1, [x19, #:lo12:.LANCHOR80]
+	ldrh	w0, [x20, #:lo12:.LANCHOR79]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR68
-	str	x0, [x1, #:lo12:.LANCHOR68]
-	ldrb	w1, [x19, #:lo12:.LANCHOR78]
-	ldrh	w0, [x20, #:lo12:.LANCHOR77]
+	adrp	x1, .LANCHOR70
+	str	x0, [x1, #:lo12:.LANCHOR70]
+	ldrb	w1, [x19, #:lo12:.LANCHOR80]
+	ldrh	w0, [x20, #:lo12:.LANCHOR79]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR154
+	adrp	x1, .LANCHOR157
 	ldp	x19, x20, [sp, 16]
-	str	x0, [x1, #:lo12:.LANCHOR154]
-	adrp	x0, .LANCHOR89
-	adrp	x1, .LANCHOR79
+	str	x0, [x1, #:lo12:.LANCHOR157]
+	adrp	x0, .LANCHOR91
+	adrp	x1, .LANCHOR81
 	ldp	x29, x30, [sp], 32
-	ldrh	w0, [x0, #:lo12:.LANCHOR89]
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	lsr	w0, w0, 2
-	strh	w0, [x1, #:lo12:.LANCHOR79]
+	strh	w0, [x1, #:lo12:.LANCHOR81]
 	ret
 	.size	gc_init, .-gc_init
 	.section	.text.ftl_free,"ax",@progbits
@@ -9008,18 +9268,18 @@ js_hash:
 	mov	w0, 42982
 	mov	x3, 0
 	movk	w0, 0x47c6, lsl 16
-.L1495:
+.L1509:
 	cmp	w1, w3
-	bhi	.L1496
+	bhi	.L1510
 	ret
-.L1496:
+.L1510:
 	lsr	w2, w0, 2
 	ldrb	w5, [x4, x3]
 	add	w2, w2, w0, lsl 5
 	add	x3, x3, 1
 	add	w2, w2, w5
 	eor	w0, w0, w2
-	b	.L1495
+	b	.L1509
 	.size	js_hash, .-js_hash
 	.section	.text.timer_get_time,"ax",@progbits
 	.align	2
@@ -9056,8 +9316,8 @@ ftl_get_density:
 	.global	ftl_get_capacity
 	.type	ftl_get_capacity, %function
 ftl_get_capacity:
-	adrp	x0, .LANCHOR59
-	ldr	w0, [x0, #:lo12:.LANCHOR59]
+	adrp	x0, .LANCHOR61
+	ldr	w0, [x0, #:lo12:.LANCHOR61]
 	ret
 	.size	ftl_get_capacity, .-ftl_get_capacity
 	.section	.text.rknand_print_hex,"ax",@progbits
@@ -9068,67 +9328,67 @@ rknand_print_hex:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LC95
+	adrp	x21, .LC97
 	stp	x23, x24, [sp, 48]
 	mov	x22, x1
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LC94
+	adrp	x23, .LC96
 	mov	x26, x0
 	mov	w24, w2
 	uxtw	x25, w3
-	add	x23, x23, :lo12:.LC94
-	add	x21, x21, :lo12:.LC95
+	add	x23, x23, :lo12:.LC96
+	add	x21, x21, :lo12:.LC97
 	stp	x19, x20, [sp, 16]
 	str	x27, [sp, 80]
 	mov	x19, 0
 	mov	w20, 0
-	adrp	x27, .LC96
-.L1503:
+	adrp	x27, .LC98
+.L1517:
 	cmp	x25, x19
-	bne	.L1509
+	bne	.L1523
 	ldp	x19, x20, [sp, 16]
-	adrp	x1, .LC96
+	adrp	x1, .LC98
 	ldp	x21, x22, [sp, 32]
-	add	x1, x1, :lo12:.LC96
+	add	x1, x1, :lo12:.LC98
 	ldp	x23, x24, [sp, 48]
-	adrp	x0, .LC97
+	adrp	x0, .LC99
 	ldp	x25, x26, [sp, 64]
-	add	x0, x0, :lo12:.LC97
+	add	x0, x0, :lo12:.LC99
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	printf
-.L1509:
-	cbnz	w20, .L1504
+.L1523:
+	cbnz	w20, .L1518
 	mov	w2, w19
 	mov	x1, x26
 	mov	x0, x23
 	bl	printf
-.L1504:
+.L1518:
 	cmp	w24, 4
-	bne	.L1505
+	bne	.L1519
 	ldr	w1, [x22, x19, lsl 2]
-.L1511:
+.L1525:
 	mov	x0, x21
 	add	w20, w20, 1
 	bl	printf
 	cmp	w20, 15
-	bls	.L1508
+	bls	.L1522
 	mov	w20, 0
-	add	x1, x27, :lo12:.LC96
-	adrp	x0, .LC97
-	add	x0, x0, :lo12:.LC97
+	add	x1, x27, :lo12:.LC98
+	adrp	x0, .LC99
+	add	x0, x0, :lo12:.LC99
 	bl	printf
-.L1508:
+.L1522:
 	add	x19, x19, 1
-	b	.L1503
-.L1505:
+	b	.L1517
+.L1519:
 	cmp	w24, 2
-	bne	.L1507
+	bne	.L1521
 	ldrsh	w1, [x22, x19, lsl 1]
-	b	.L1511
-.L1507:
+	b	.L1525
+.L1521:
 	ldrb	w1, [x22, x19]
-	b	.L1511
+	b	.L1525
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.hynix_get_read_retry_default,"ax",@progbits
 	.align	2
@@ -9157,41 +9417,41 @@ hynix_get_read_retry_default:
 	strb	w2, [x7, 129]
 	strb	w1, [x7, 130]
 	strb	w0, [x7, 131]
-	bne	.L1513
+	bne	.L1527
 	mov	w0, -89
 	strb	w0, [x12, 16]
-	adrp	x0, .LANCHOR155+17
+	adrp	x0, .LANCHOR158+17
 	mov	w1, -9
-	strb	w1, [x0, #:lo12:.LANCHOR155+17]
-.L1577:
+	strb	w1, [x0, #:lo12:.LANCHOR158+17]
+.L1591:
 	mov	w23, 7
-	b	.L1620
-.L1513:
+	b	.L1634
+.L1527:
 	cmp	w8, 3
-	bne	.L1515
+	bne	.L1529
 	mov	x10, 0
-.L1516:
+.L1530:
 	sub	w0, w10, #80
 	strb	w0, [x6, x10]
 	add	x10, x10, 1
 	cmp	x10, 8
-	bne	.L1516
+	bne	.L1530
 	mov	w23, w10
-.L1514:
+.L1528:
 	sub	w0, w8, #1
 	cmp	w0, 1
-	bhi	.L1522
+	bhi	.L1536
 	adrp	x7, .LANCHOR18
 	adrp	x8, .LANCHOR30
 	add	x7, x7, :lo12:.LANCHOR18
 	add	x8, x8, :lo12:.LANCHOR30
 	mov	w5, 0
 	mov	w11, 55
-.L1523:
+.L1537:
 	ldrb	w0, [x7]
 	cmp	w0, w5
-	bhi	.L1529
-.L1530:
+	bhi	.L1543
+.L1544:
 	strb	w10, [x12, 1]
 	strb	w23, [x12, 2]
 	ldp	x19, x20, [sp, 16]
@@ -9201,9 +9461,9 @@ hynix_get_read_retry_default:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1515:
+.L1529:
 	cmp	w8, 4
-	bne	.L1517
+	bne	.L1531
 	mov	w3, -52
 	strb	w3, [x7, 128]
 	mov	w3, -65
@@ -9219,10 +9479,10 @@ hynix_get_read_retry_default:
 	strb	w3, [x7, 132]
 	strb	w1, [x7, 134]
 	strb	w0, [x7, 135]
-	b	.L1514
-.L1517:
+	b	.L1528
+.L1531:
 	cmp	w8, 5
-	bne	.L1518
+	bne	.L1532
 	mov	w0, 56
 	strb	w0, [x7, 128]
 	mov	w0, 57
@@ -9232,12 +9492,12 @@ hynix_get_read_retry_default:
 	strb	w0, [x7, 130]
 	mov	w0, 59
 	strb	w0, [x7, 131]
-.L1620:
+.L1634:
 	mov	w10, 4
-	b	.L1514
-.L1518:
+	b	.L1528
+.L1532:
 	cmp	w8, 6
-	bne	.L1519
+	bne	.L1533
 	mov	w0, 14
 	strb	w0, [x7, 128]
 	mov	w0, 15
@@ -9247,27 +9507,27 @@ hynix_get_read_retry_default:
 	strb	w0, [x7, 130]
 	mov	w0, 17
 	strb	w0, [x7, 131]
-	b	.L1620
-.L1519:
+	b	.L1634
+.L1533:
 	cmp	w8, 7
-	bne	.L1520
+	bne	.L1534
 	mov	x0, 0
-.L1521:
+.L1535:
 	sub	w1, w0, #80
 	strb	w1, [x6, x0]
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L1521
+	bne	.L1535
 	mov	w0, -44
 	mov	w23, 12
 	strb	w0, [x7, 136]
 	mov	w10, 10
 	mov	w0, -43
 	strb	w0, [x7, 137]
-	b	.L1514
-.L1520:
+	b	.L1528
+.L1534:
 	cmp	w8, 8
-	bne	.L1577
+	bne	.L1591
 	mov	w0, 6
 	strb	w0, [x7, 128]
 	mov	w0, 7
@@ -9279,8 +9539,8 @@ hynix_get_read_retry_default:
 	mov	w0, 10
 	mov	w10, 5
 	strb	w0, [x7, 132]
-	b	.L1514
-.L1529:
+	b	.L1528
+.L1543:
 	ldrb	w0, [x8, w5, sxtw]
 	mov	x1, 32
 	mov	w2, 160
@@ -9291,7 +9551,7 @@ hynix_get_read_retry_default:
 	ldr	x4, [x1, #:lo12:.LANCHOR13]
 	add	x2, x12, x2
 	add	x4, x4, x0
-.L1524:
+.L1538:
 	str	w11, [x4, 2056]
 	ldrb	w0, [x6, x3]
 	str	w0, [x4, 2052]
@@ -9301,15 +9561,15 @@ hynix_get_read_retry_default:
 	strb	w0, [x2, x3]
 	add	x3, x3, 1
 	cmp	w10, w3, uxtb
-	bhi	.L1524
-	adrp	x3, .LANCHOR155
-	add	x3, x3, :lo12:.LANCHOR155
+	bhi	.L1538
+	adrp	x3, .LANCHOR158
+	add	x3, x3, :lo12:.LANCHOR158
 	mov	x0, 0
-.L1527:
+.L1541:
 	add	x14, x2, x0
 	add	x13, x3, x0
 	mov	x1, 1
-.L1526:
+.L1540:
 	lsl	x4, x1, 2
 	lsl	x15, x1, 3
 	ldrb	w16, [x2, x0]
@@ -9318,10 +9578,10 @@ hynix_get_read_retry_default:
 	ldrb	w4, [x13, x4]
 	add	w4, w4, w16
 	strb	w4, [x14, x15]
-	bne	.L1526
+	bne	.L1540
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L1527
+	bne	.L1541
 	add	w5, w5, 1
 	strb	wzr, [x2, 16]
 	strb	wzr, [x2, 24]
@@ -9331,11 +9591,11 @@ hynix_get_read_retry_default:
 	strb	wzr, [x2, 48]
 	strb	wzr, [x2, 41]
 	strb	wzr, [x2, 49]
-	b	.L1523
-.L1522:
+	b	.L1537
+.L1536:
 	sub	w0, w8, #3
 	cmp	w0, 5
-	bhi	.L1530
+	bhi	.L1544
 	mul	w15, w23, w10
 	sub	w13, w10, #1
 	and	x13, x13, 255
@@ -9348,10 +9608,10 @@ hynix_get_read_retry_default:
 	lsl	w22, w14, 1
 	sbfiz	x21, x14, 1, 32
 	mov	w11, 0
-.L1531:
+.L1545:
 	ldrb	w0, [x19]
 	cmp	w0, w11
-	bls	.L1530
+	bls	.L1544
 	adrp	x0, .LANCHOR30
 	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w24, [x0, w11, sxtw]
@@ -9370,7 +9630,7 @@ hynix_get_read_retry_default:
 	str	w6, [x4, 2056]
 	bl	nandc_wait_flash_ready
 	cmp	w8, 8
-	bne	.L1532
+	bne	.L1546
 	mov	w0, 120
 	str	w0, [x4, 2056]
 	str	wzr, [x4, 2052]
@@ -9390,7 +9650,7 @@ hynix_get_read_retry_default:
 	str	wzr, [x4, 2052]
 	str	wzr, [x4, 2052]
 	str	w1, [x4, 2052]
-.L1623:
+.L1637:
 	str	w0, [x4, 2052]
 	mov	w0, 48
 	str	wzr, [x4, 2052]
@@ -9398,65 +9658,65 @@ hynix_get_read_retry_default:
 	bl	nandc_wait_flash_ready
 	cmp	w20, 1
 	ccmp	w8, 8, 4, hi
-	beq	.L1578
+	beq	.L1592
 	cmp	w8, 7
 	mov	w0, 32
 	mov	w1, 2
 	csel	w1, w1, w0, ne
-.L1539:
-	adrp	x6, .LANCHOR156
+.L1553:
+	adrp	x6, .LANCHOR159
 	mov	x2, 0
-	ldr	x0, [x6, #:lo12:.LANCHOR156]
-.L1540:
+	ldr	x0, [x6, #:lo12:.LANCHOR159]
+.L1554:
 	ldr	w3, [x4, 2048]
 	strb	w3, [x0, x2]
 	add	x2, x2, 1
 	cmp	w1, w2, uxtb
-	bhi	.L1540
+	bhi	.L1554
 	cmp	w8, 8
-	bne	.L1541
+	bne	.L1555
 	mov	w1, 0
-.L1543:
+.L1557:
 	ldrb	w2, [x0]
 	cmp	w2, 50
-	beq	.L1542
+	beq	.L1556
 	ldrb	w2, [x0, 1]
 	cmp	w2, 5
-	beq	.L1542
+	beq	.L1556
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 255
 	cmp	w1, 8
-	bne	.L1543
-.L1544:
-	adrp	x0, .LC98
+	bne	.L1557
+.L1558:
+	adrp	x0, .LC100
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC98
+	add	x0, x0, :lo12:.LC100
 	bl	printf
+.L1560:
+	b	.L1560
 .L1546:
-	b	.L1546
-.L1532:
 	mov	w0, 54
 	str	w0, [x4, 2056]
 	cmp	w8, 4
-	bne	.L1534
+	bne	.L1548
 	mov	w0, 64
 	str	w6, [x4, 2052]
 	str	w0, [x4, 2048]
 	mov	w0, 204
-.L1621:
+.L1635:
 	str	w0, [x4, 2052]
 	mov	w0, 77
-	b	.L1622
-.L1534:
+	b	.L1636
+.L1548:
 	cmp	w20, 1
-	bhi	.L1536
+	bhi	.L1550
 	ldrb	w0, [x7, 128]
 	str	w0, [x4, 2052]
 	mov	w0, 82
-.L1622:
+.L1636:
 	str	w0, [x4, 2048]
-.L1535:
+.L1549:
 	mov	w0, 22
 	str	w0, [x4, 2056]
 	mov	w0, 23
@@ -9469,185 +9729,185 @@ hynix_get_read_retry_default:
 	cmp	w8, 6
 	str	wzr, [x4, 2052]
 	str	wzr, [x4, 2052]
-	bne	.L1537
+	bne	.L1551
 	mov	w0, 31
 	str	w0, [x4, 2052]
-.L1538:
+.L1552:
 	mov	w0, 2
-	b	.L1623
-.L1536:
+	b	.L1637
+.L1550:
 	cmp	w8, 7
-	bne	.L1535
+	bne	.L1549
 	mov	w0, 174
 	str	w0, [x4, 2052]
 	str	wzr, [x4, 2048]
 	mov	w0, 176
-	b	.L1621
-.L1537:
+	b	.L1635
+.L1551:
 	str	wzr, [x4, 2052]
-	b	.L1538
-.L1578:
+	b	.L1552
+.L1592:
 	mov	w1, 16
-	b	.L1539
-.L1542:
+	b	.L1553
+.L1556:
 	cmp	w1, 6
-	bhi	.L1544
-.L1545:
-	ldr	x3, [x6, #:lo12:.LANCHOR156]
+	bhi	.L1558
+.L1559:
+	ldr	x3, [x6, #:lo12:.LANCHOR159]
 	mov	x0, 0
-.L1555:
+.L1569:
 	cmp	w15, w0
-	bgt	.L1556
-	ldr	x1, [x6, #:lo12:.LANCHOR156]
+	bgt	.L1570
+	ldr	x1, [x6, #:lo12:.LANCHOR159]
 	mov	w6, 8
 	add	x2, x1, x21
-.L1558:
+.L1572:
 	mov	x0, 0
-.L1557:
+.L1571:
 	ldrh	w16, [x2, x0, lsl 1]
 	mvn	w16, w16
 	strh	w16, [x2, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	w14, w0
-	bgt	.L1557
+	bgt	.L1571
 	add	x2, x2, x22, uxtw 1
 	subs	w6, w6, #1
-	bne	.L1558
+	bne	.L1572
 	mov	x6, x1
 	mov	w16, 0
 	mov	w26, 1
-.L1559:
+.L1573:
 	mov	w0, 0
 	mov	w2, 0
-.L1563:
+.L1577:
 	mov	x30, x6
 	lsl	w25, w26, w2
 	mov	w24, 16
 	mov	w17, 0
-.L1561:
+.L1575:
 	ldrh	w27, [x30]
 	add	x30, x30, x21
 	bics	wzr, w25, w27
 	cinc	w17, w17, eq
 	subs	w24, w24, #1
-	bne	.L1561
+	bne	.L1575
 	cmp	w17, 8
-	bls	.L1562
+	bls	.L1576
 	orr	w0, w0, w25
 	and	w0, w0, 65535
-.L1562:
+.L1576:
 	add	w2, w2, 1
 	cmp	w2, 16
-	bne	.L1563
+	bne	.L1577
 	strh	w0, [x6], 2
 	add	w16, w16, 1
 	cmp	w14, w16
-	bgt	.L1559
+	bgt	.L1573
 	mov	x0, 0
 	mov	w2, 0
-.L1566:
+.L1580:
 	ldr	w6, [x1, x0]
 	add	x0, x0, 4
 	cmp	w6, 0
 	cinc	w2, w2, eq
 	cmp	x0, 32
-	bne	.L1566
+	bne	.L1580
 	cmp	w2, 7
-	ble	.L1567
+	ble	.L1581
 	mov	w3, 1024
 	mov	w2, 1
-	adrp	x0, .LC99
-	add	x0, x0, :lo12:.LC99
+	adrp	x0, .LC101
+	add	x0, x0, :lo12:.LC101
 	bl	rknand_print_hex
-	adrp	x0, .LC98
+	adrp	x0, .LC100
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC98
+	add	x0, x0, :lo12:.LC100
 	bl	printf
-.L1568:
-	b	.L1568
-.L1541:
+.L1582:
+	b	.L1582
+.L1555:
 	cmp	w8, 7
-	bne	.L1547
+	bne	.L1561
 	mov	w1, 0
-.L1549:
+.L1563:
 	ldrb	w2, [x0]
 	cmp	w2, 12
-	beq	.L1548
+	beq	.L1562
 	ldrb	w2, [x0, 1]
 	cmp	w2, 10
-	beq	.L1548
+	beq	.L1562
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 255
 	cmp	w1, 8
-	bne	.L1549
-.L1550:
-	adrp	x0, .LC98
+	bne	.L1563
+.L1564:
+	adrp	x0, .LC100
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC98
+	add	x0, x0, :lo12:.LC100
 	bl	printf
-.L1551:
-	b	.L1551
-.L1548:
+.L1565:
+	b	.L1565
+.L1562:
 	cmp	w1, 6
-	bls	.L1545
-	b	.L1550
-.L1547:
+	bls	.L1559
+	b	.L1564
+.L1561:
 	cmp	w8, 6
-	bne	.L1545
+	bne	.L1559
 	mov	x1, 0
-.L1552:
+.L1566:
 	ldrb	w2, [x0, x1]
 	cmp	w2, 12
-	beq	.L1545
+	beq	.L1559
 	add	x2, x0, x1
 	ldrb	w2, [x2, 8]
 	cmp	w2, 4
-	beq	.L1545
+	beq	.L1559
 	add	x1, x1, 1
 	cmp	x1, 8
-	bne	.L1552
-	adrp	x0, .LC98
+	bne	.L1566
+	adrp	x0, .LC100
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC98
+	add	x0, x0, :lo12:.LC100
 	bl	printf
-.L1554:
-	b	.L1554
-.L1556:
+.L1568:
+	b	.L1568
+.L1570:
 	ldr	w1, [x4, 2048]
 	strb	w1, [x3, x0]
 	add	x0, x0, 1
-	b	.L1555
-.L1567:
+	b	.L1569
+.L1581:
 	cmp	w8, 6
-	beq	.L1580
+	beq	.L1594
 	cmp	w8, 7
-	beq	.L1581
+	beq	.L1595
 	cmp	w8, 8
 	mov	x1, 5
 	mov	x0, 8
 	csel	x0, x0, x1, ne
-.L1569:
+.L1583:
 	mov	x1, x5
 	mov	w5, 0
-.L1570:
+.L1584:
 	mov	x2, 0
-.L1571:
+.L1585:
 	ldrb	w6, [x3, x2]
 	strb	w6, [x1, x2]
 	add	x2, x2, 1
 	cmp	w10, w2, uxtb
-	bhi	.L1571
+	bhi	.L1585
 	add	w5, w5, 1
 	add	x3, x3, x13
 	add	x1, x1, x0
 	cmp	w23, w5
-	bgt	.L1570
+	bgt	.L1584
 	mov	w5, 255
 	str	w5, [x4, 2056]
 	bl	nandc_wait_flash_ready
 	cmp	w20, 1
-	bhi	.L1573
+	bhi	.L1587
 	mov	w0, 54
 	str	w0, [x4, 2056]
 	ldrb	w0, [x7, 128]
@@ -9662,40 +9922,40 @@ hynix_get_read_retry_default:
 	str	w5, [x4, 2052]
 	str	w5, [x4, 2052]
 	str	w5, [x4, 2052]
-.L1624:
+.L1638:
 	str	w0, [x4, 2056]
 	bl	nandc_wait_flash_ready
 	add	w11, w11, 1
 	and	w11, w11, 255
-	b	.L1531
-.L1580:
+	b	.L1545
+.L1594:
 	mov	x0, 4
-	b	.L1569
-.L1581:
+	b	.L1583
+.L1595:
 	mov	x0, 10
-	b	.L1569
-.L1573:
+	b	.L1583
+.L1587:
 	cmp	w8, 8
-	bne	.L1575
+	bne	.L1589
 	mov	w0, 190
-	b	.L1624
-.L1575:
+	b	.L1638
+.L1589:
 	mov	w0, 56
-	b	.L1624
+	b	.L1638
 	.size	hynix_get_read_retry_default, .-hynix_get_read_retry_default
 	.section	.text.flash_get_read_retry_tbl,"ax",@progbits
 	.align	2
 	.global	flash_get_read_retry_tbl
 	.type	flash_get_read_retry_tbl, %function
 flash_get_read_retry_tbl:
-	adrp	x0, .LANCHOR31+19
-	ldrb	w0, [x0, #:lo12:.LANCHOR31+19]
+	adrp	x0, .LANCHOR32+19
+	ldrb	w0, [x0, #:lo12:.LANCHOR32+19]
 	sub	w1, w0, #1
 	and	w1, w1, 255
 	cmp	w1, 7
-	bhi	.L1625
+	bhi	.L1639
 	b	hynix_get_read_retry_default
-.L1625:
+.L1639:
 	ret
 	.size	flash_get_read_retry_tbl, .-flash_get_read_retry_tbl
 	.section	.text.nandc_xfer_done,"ax",@progbits
@@ -9704,7 +9964,7 @@ flash_get_read_retry_tbl:
 	.type	nandc_xfer_done, %function
 nandc_xfer_done:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR157
+	adrp	x0, .LANCHOR160
 	adrp	x1, .LANCHOR28
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
@@ -9713,28 +9973,28 @@ nandc_xfer_done:
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	cmp	w1, 9
-	strb	wzr, [x0, #:lo12:.LANCHOR157]
-	bne	.L1628
+	strb	wzr, [x0, #:lo12:.LANCHOR160]
+	bne	.L1642
 	ldr	x20, [x19, #:lo12:.LANCHOR13]
 	mov	x24, x0
 	mov	w21, 0
 	ldr	w0, [x20, 16]
 	str	w0, [x29, 64]
 	ldr	w0, [x20, 48]
-	tbnz	x0, 1, .L1629
-	adrp	x22, .LC103
-	adrp	x23, .LC102
-	add	x22, x22, :lo12:.LC103
-	add	x23, x23, :lo12:.LC102
-.L1630:
+	tbnz	x0, 1, .L1643
+	adrp	x22, .LC105
+	adrp	x23, .LC104
+	add	x22, x22, :lo12:.LC105
+	add	x23, x23, :lo12:.LC104
+.L1644:
 	ldr	w0, [x29, 64]
-	tbnz	x0, 20, .L1633
+	tbnz	x0, 20, .L1647
 	ldr	x0, [x19, #:lo12:.LANCHOR13]
 	add	w21, w21, 1
 	tst	x21, 16777215
 	ldr	w0, [x0, 16]
 	str	w0, [x29, 64]
-	bne	.L1630
+	bne	.L1644
 	ldr	w2, [x29, 64]
 	mov	w1, w21
 	ldr	w3, [x20, 64]
@@ -9746,39 +10006,39 @@ nandc_xfer_done:
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1630
-.L1629:
-	adrp	x22, .LC101
-	adrp	x23, .LC102
-	add	x22, x22, :lo12:.LC101
-	add	x23, x23, :lo12:.LC102
-.L1631:
+	b	.L1644
+.L1643:
+	adrp	x22, .LC103
+	adrp	x23, .LC104
+	add	x22, x22, :lo12:.LC103
+	add	x23, x23, :lo12:.LC104
+.L1645:
 	ldr	w1, [x20, 64]
 	ldr	w0, [x29, 64]
 	ubfx	x1, x1, 16, 6
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0
-	bge	.L1633
+	bge	.L1647
 	ldr	x0, [x19, #:lo12:.LANCHOR13]
 	ldr	w0, [x0]
 	str	w0, [x29, 72]
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1632
+	tbz	x0, 13, .L1646
 	ldr	w0, [x29, 72]
-	tbz	x0, 17, .L1632
+	tbz	x0, 17, .L1646
 	ldr	w1, [x29, 72]
-	adrp	x0, .LC100
-	add	x0, x0, :lo12:.LC100
+	adrp	x0, .LC102
+	add	x0, x0, :lo12:.LC102
 	ubfx	x1, x1, 17, 1
-.L1665:
+.L1679:
 	bl	printf
-	b	.L1633
-.L1632:
+	b	.L1647
+.L1646:
 	ldr	w0, [x29, 64]
 	add	w21, w21, 1
 	ubfx	x0, x0, 22, 6
 	cmp	w21, w0, lsl 12
-	bne	.L1631
+	bne	.L1645
 	ldr	w2, [x20, 64]
 	mov	w1, w21
 	ldr	w3, [x29, 64]
@@ -9792,37 +10052,37 @@ nandc_xfer_done:
 	mov	w2, 4
 	bl	rknand_print_hex
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1631
+	tbz	x0, 13, .L1645
 	mov	w0, 1
-	strb	w0, [x24, #:lo12:.LANCHOR157]
-.L1633:
-	adrp	x0, .LANCHOR47+32
+	strb	w0, [x24, #:lo12:.LANCHOR160]
+.L1647:
+	adrp	x0, .LANCHOR49+32
 	ldp	x19, x20, [sp, 16]
-	str	wzr, [x0, #:lo12:.LANCHOR47+32]
+	str	wzr, [x0, #:lo12:.LANCHOR49+32]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1628:
+.L1642:
 	ldr	x20, [x19, #:lo12:.LANCHOR13]
 	mov	w21, 0
 	ldr	w0, [x20, 8]
 	str	w0, [x29, 64]
 	ldr	w0, [x20, 16]
-	tbnz	x0, 1, .L1639
-	adrp	x22, .LC103
-	adrp	x23, .LC102
-	add	x22, x22, :lo12:.LC103
-	add	x23, x23, :lo12:.LC102
-.L1640:
+	tbnz	x0, 1, .L1653
+	adrp	x22, .LC105
+	adrp	x23, .LC104
+	add	x22, x22, :lo12:.LC105
+	add	x23, x23, :lo12:.LC104
+.L1654:
 	ldr	w0, [x29, 64]
-	tbnz	x0, 20, .L1633
+	tbnz	x0, 20, .L1647
 	ldr	x0, [x19, #:lo12:.LANCHOR13]
 	add	w21, w21, 1
 	tst	x21, 16777215
 	ldr	w0, [x0, 8]
 	str	w0, [x29, 64]
-	bne	.L1640
+	bne	.L1654
 	ldr	w2, [x29, 64]
 	mov	w1, w21
 	ldr	w3, [x20, 28]
@@ -9834,34 +10094,34 @@ nandc_xfer_done:
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1640
-.L1639:
-	adrp	x22, .LC101
-	adrp	x23, .LC102
-	add	x22, x22, :lo12:.LC101
-	add	x23, x23, :lo12:.LC102
-.L1641:
+	b	.L1654
+.L1653:
+	adrp	x22, .LC103
+	adrp	x23, .LC104
+	add	x22, x22, :lo12:.LC103
+	add	x23, x23, :lo12:.LC104
+.L1655:
 	ldr	w1, [x20, 28]
 	ldr	w0, [x29, 64]
 	ubfx	x1, x1, 16, 5
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0
-	bge	.L1633
+	bge	.L1647
 	ldr	x0, [x19, #:lo12:.LANCHOR13]
 	ldr	w0, [x0]
 	str	w0, [x29, 72]
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1642
+	tbz	x0, 13, .L1656
 	ldr	w0, [x29, 72]
-	tbz	x0, 17, .L1642
-	adrp	x0, .LC104
+	tbz	x0, 17, .L1656
+	adrp	x0, .LC106
 	ldr	w1, [x29, 72]
-	add	x0, x0, :lo12:.LC104
-	b	.L1665
-.L1642:
+	add	x0, x0, :lo12:.LC106
+	b	.L1679
+.L1656:
 	add	w21, w21, 1
 	tst	x21, 16777215
-	bne	.L1641
+	bne	.L1655
 	ldr	w2, [x20, 28]
 	mov	w1, w21
 	ldr	w3, [x29, 64]
@@ -9874,7 +10134,7 @@ nandc_xfer_done:
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1641
+	b	.L1655
 	.size	nandc_xfer_done, .-nandc_xfer_done
 	.section	.text.nandc_xfer,"ax",@progbits
 	.align	2
@@ -9895,20 +10155,20 @@ nandc_xfer:
 	mov	x21, x4
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
-	cbnz	w22, .L1685
+	cbnz	w22, .L1699
 	adrp	x0, .LANCHOR28
 	ldrb	w0, [x0, #:lo12:.LANCHOR28]
 	cmp	w0, 9
-	bne	.L1668
+	bne	.L1682
 	adrp	x22, .LANCHOR13
 	lsr	w19, w19, 2
 	mov	w3, 1
 	mov	w2, 0
 	ldr	x5, [x22, #:lo12:.LANCHOR13]
 	mov	w0, 0
-.L1669:
+.L1683:
 	cmp	w2, w19
-	bcc	.L1673
+	bcc	.L1687
 	ldr	w19, [x5]
 	cmp	w3, 0
 	mov	w1, 512
@@ -9917,35 +10177,35 @@ nandc_xfer:
 	movk	w1, 0x2, lsl 16
 	and	w1, w19, w1
 	cmp	w1, 139264
-	bne	.L1675
+	bne	.L1689
 	mov	w1, w19
-	adrp	x0, .LC105
-	add	x0, x0, :lo12:.LC105
+	adrp	x0, .LC107
+	add	x0, x0, :lo12:.LC107
 	bl	printf
 	ldr	x0, [x22, #:lo12:.LANCHOR13]
 	orr	w19, w19, 131072
 	str	w19, [x0]
 	mov	w0, -1
-.L1675:
-	tbz	x19, 13, .L1676
-	adrp	x1, .LANCHOR157
-	ldrb	w1, [x1, #:lo12:.LANCHOR157]
-	cbz	w1, .L1676
+.L1689:
+	tbz	x19, 13, .L1690
+	adrp	x1, .LANCHOR160
+	ldrb	w1, [x1, #:lo12:.LANCHOR160]
+	cbz	w1, .L1690
 	mov	w1, w19
-	adrp	x0, .LC106
-	add	x0, x0, :lo12:.LC106
+	adrp	x0, .LC108
+	add	x0, x0, :lo12:.LC108
 	bl	printf
 	ldr	x0, [x22, #:lo12:.LANCHOR13]
 	mov	w1, 1
 	str	w1, [x0, 16]
-.L1704:
+.L1718:
 	mov	w0, -1
-.L1667:
+.L1681:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1673:
+.L1687:
 	uxtw	x1, w2
 	add	x1, x1, 84
 	ldr	w1, [x5, x1, lsl 2]
@@ -9956,70 +10216,70 @@ nandc_xfer:
 	and	w1, w4, w1, lsr 10
 	and	w3, w3, w1
 	ldr	w1, [x29, 56]
-	tbnz	x1, 2, .L1687
+	tbnz	x1, 2, .L1701
 	ldr	w1, [x29, 56]
-	tbnz	x1, 18, .L1687
+	tbnz	x1, 18, .L1701
 	ldr	w4, [x29, 56]
 	ldr	w1, [x29, 56]
 	ubfx	x4, x4, 3, 7
 	ubfx	x1, x1, 19, 7
 	cmp	w4, w1
 	ldr	w1, [x29, 56]
-	ble	.L1671
+	ble	.L1685
 	ubfx	x1, x1, 3, 7
-.L1672:
+.L1686:
 	cmp	w0, w1
 	csel	w0, w0, w1, cs
-.L1670:
+.L1684:
 	add	w2, w2, 1
-	b	.L1669
-.L1671:
+	b	.L1683
+.L1685:
 	ubfx	x1, x1, 19, 7
-	b	.L1672
-.L1687:
+	b	.L1686
+.L1701:
 	mov	w0, -1
-	b	.L1670
-.L1668:
-	adrp	x0, .LANCHOR44
+	b	.L1684
+.L1682:
+	adrp	x0, .LANCHOR46
 	lsr	w4, w19, 1
 	mov	w3, 64
 	mov	w1, 1
-	ldrb	w0, [x0, #:lo12:.LANCHOR44]
+	ldrb	w0, [x0, #:lo12:.LANCHOR46]
 	mov	w2, 0
-	adrp	x6, .LANCHOR47
+	adrp	x6, .LANCHOR49
 	cmp	w0, 25
 	mov	w0, 128
 	csel	w3, w3, w0, cc
 	mov	w0, 0
-.L1678:
+.L1692:
 	add	w5, w3, w0
 	cmp	w2, w4
-	bcc	.L1679
+	bcc	.L1693
 	adrp	x22, .LANCHOR13
 	lsr	w19, w19, 2
 	mov	w3, 0
 	mov	w0, 0
 	ldr	x4, [x22, #:lo12:.LANCHOR13]
-.L1680:
+.L1694:
 	cmp	w3, w19
-	bcc	.L1684
+	bcc	.L1698
 	str	wzr, [x4, 16]
 	mov	w1, 8192
 	movk	w1, 0x2, lsl 16
 	ldr	w19, [x4]
 	and	w1, w19, w1
 	cmp	w1, 139264
-	bne	.L1676
+	bne	.L1690
 	mov	w1, w19
-	adrp	x0, .LC107
-	add	x0, x0, :lo12:.LC107
+	adrp	x0, .LC109
+	add	x0, x0, :lo12:.LC109
 	bl	printf
 	ldr	x0, [x22, #:lo12:.LANCHOR13]
 	orr	w19, w19, 131072
 	str	w19, [x0]
-	b	.L1704
-.L1679:
-	ldr	x7, [x6, #:lo12:.LANCHOR47]
+	b	.L1718
+.L1693:
+	ldr	x7, [x6, #:lo12:.LANCHOR49]
 	and	x0, x0, 4294967292
 	ldr	w0, [x7, x0]
 	lsl	w7, w2, 2
@@ -10035,16 +10295,16 @@ nandc_xfer:
 	add	w1, w1, 4
 	strb	w0, [x21, x7]
 	mov	w0, w5
-	b	.L1678
-.L1684:
+	b	.L1692
+.L1698:
 	uxtw	x1, w3
 	add	x1, x1, 8
 	ldr	w1, [x4, x1, lsl 2]
 	str	w1, [x29, 56]
 	ldr	w1, [x29, 56]
-	tbnz	x1, 2, .L1690
+	tbnz	x1, 2, .L1704
 	ldr	w1, [x29, 56]
-	tbnz	x1, 15, .L1690
+	tbnz	x1, 15, .L1704
 	ldr	w2, [x29, 56]
 	ubfx	x6, x2, 3, 5
 	ldr	w2, [x29, 56]
@@ -10057,42 +10317,42 @@ nandc_xfer:
 	orr	w1, w5, w1, lsl 5
 	cmp	w2, w1
 	ldr	w1, [x29, 56]
-	bls	.L1682
+	bls	.L1696
 	ubfx	x2, x1, 3, 5
 	ldr	w1, [x29, 56]
 	ubfx	x1, x1, 27, 1
-.L1703:
+.L1717:
 	orr	w1, w2, w1, lsl 5
 	cmp	w0, w1
 	csel	w0, w0, w1, cs
-.L1681:
+.L1695:
 	add	w3, w3, 1
-	b	.L1680
-.L1682:
+	b	.L1694
+.L1696:
 	ubfx	x2, x1, 16, 5
 	ldr	w1, [x29, 56]
 	ubfx	x1, x1, 29, 1
-	b	.L1703
-.L1690:
+	b	.L1717
+.L1704:
 	mov	w0, -1
-	b	.L1681
-.L1676:
+	b	.L1695
+.L1690:
 	cmn	w0, #1
-	beq	.L1667
+	beq	.L1681
 	ldr	w1, [x21]
 	cmn	w1, #1
-	bne	.L1667
+	bne	.L1681
 	ldr	w1, [x21, 4]
 	cmn	w1, #1
-	bne	.L1667
+	bne	.L1681
 	ldr	w1, [x20]
 	cmn	w1, #1
 	mov	w1, 512
 	csel	w0, w0, w1, ne
-	b	.L1667
-.L1685:
+	b	.L1681
+.L1699:
 	mov	w0, 0
-	b	.L1667
+	b	.L1681
 	.size	nandc_xfer, .-nandc_xfer
 	.section	.text.flash_read_page,"ax",@progbits
 	.align	2
@@ -10105,55 +10365,64 @@ flash_read_page:
 	and	w21, w0, 255
 	adrp	x0, .LANCHOR13
 	stp	x19, x20, [sp, 16]
+	mov	w19, 24
 	stp	x23, x24, [sp, 48]
-	mov	w22, w1
-	ldr	x19, [x0, #:lo12:.LANCHOR13]
+	ldr	x20, [x0, #:lo12:.LANCHOR13]
+	adrp	x0, .LANCHOR31
+	str	x25, [sp, 64]
+	mov	x24, x2
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	mov	w23, w4
+	ubfx	x22, x1, 24, 2
+	mov	x25, x3
+	sub	w0, w19, w0
+	mov	w19, 1
+	lsl	w19, w19, w0
 	adrp	x0, .LANCHOR14
-	stp	x25, x26, [sp, 64]
-	mov	w24, w4
+	sub	w19, w19, #1
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	mov	x25, x2
-	mov	x26, x3
-	and	w20, w1, 2097151
-	ubfx	x23, x22, 24, 2
-	tbz	x0, 4, .L1706
+	and	w19, w19, w1
+	tbz	x0, 4, .L1720
 	mov	w3, w1
-	adrp	x0, .LC108
-	mov	w2, w23
+	adrp	x0, .LC110
+	mov	w2, w22
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC108
+	add	x0, x0, :lo12:.LC110
 	bl	printf
-.L1706:
+.L1720:
 	bl	nandc_wait_flash_ready
 	mov	w0, w21
 	bl	nandc_cs
 	adrp	x7, .LANCHOR16
-	cbnz	w23, .L1707
+	cbnz	w22, .L1721
 	mov	w0, w21
 	bl	zftl_flash_enter_slc_mode
-.L1708:
+.L1722:
 	ubfiz	x4, x21, 8, 8
-	lsr	w0, w20, 8
-	add	x4, x19, x4
-	and	w22, w22, 255
+	and	w0, w19, 255
+	add	x4, x20, x4
 	str	wzr, [x4, 2056]
 	str	wzr, [x4, 2052]
 	str	wzr, [x4, 2052]
-	str	w22, [x4, 2052]
 	str	w0, [x4, 2052]
-	lsr	w0, w20, 16
+	lsr	w0, w19, 8
+	str	w0, [x4, 2052]
+	lsr	w0, w19, 16
 	str	w0, [x4, 2052]
 	mov	w0, 48
 	str	w0, [x4, 2056]
 	ldr	x0, [x7, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1710
-	cbz	w23, .L1710
-	add	w20, w20, w20, lsl 1
-	sub	w0, w20, #1
-	add	w0, w0, w23
-.L1719:
+	bne	.L1724
+	cbz	w22, .L1724
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbnz	w0, .L1724
+	add	w19, w19, w19, lsl 1
+	sub	w0, w19, #1
+	add	w0, w0, w22
+.L1733:
 	bl	nandc_set_seed
 	bl	nandc_wait_flash_ready
 	mov	w0, 5
@@ -10161,39 +10430,42 @@ flash_read_page:
 	str	wzr, [x4, 2052]
 	mov	w0, 224
 	str	wzr, [x4, 2052]
-	mov	w2, w24
+	mov	w2, w23
 	str	w0, [x4, 2056]
-	mov	x3, x25
-	mov	x4, x26
+	mov	x3, x24
+	mov	x4, x25
 	mov	w1, 0
 	mov	w0, w21
 	bl	nandc_xfer
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.29
+	bl	nandc_de_cs.constprop.30
+	ldr	x25, [sp, 64]
 	mov	w0, w2
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1707:
+.L1721:
 	ldr	x0, [x7, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1709
+	bne	.L1723
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbnz	w0, .L1723
 	sxtw	x0, w21
 	add	x0, x0, 8
-	add	x0, x19, x0, lsl 8
-	str	w23, [x0, 8]
-	b	.L1708
-.L1709:
+	add	x0, x20, x0, lsl 8
+	str	w22, [x0, 8]
+	b	.L1722
+.L1723:
 	mov	w0, w21
 	bl	zftl_flash_exit_slc_mode
-	b	.L1708
-.L1710:
-	mov	w0, w20
-	b	.L1719
+	b	.L1722
+.L1724:
+	mov	w0, w19
+	b	.L1733
 	.size	flash_read_page, .-flash_read_page
 	.section	.text.micron_read_retrial,"ax",@progbits
 	.align	2
@@ -10202,127 +10474,150 @@ flash_read_page:
 micron_read_retrial:
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	and	w24, w0, 255
-	adrp	x0, .LANCHOR44
 	stp	x19, x20, [sp, 16]
-	stp	x21, x22, [sp, 32]
-	mov	w22, w1
+	and	w20, w0, 255
+	adrp	x0, .LANCHOR46
 	stp	x25, x26, [sp, 64]
-	mov	x25, x2
-	stp	x27, x28, [sp, 80]
+	stp	x21, x22, [sp, 32]
 	mov	x26, x3
-	ldrb	w20, [x0, #:lo12:.LANCHOR44]
-	and	x19, x24, 255
+	stp	x23, x24, [sp, 48]
+	mov	w23, w1
+	ldrb	w19, [x0, #:lo12:.LANCHOR46]
+	mov	w22, 0
+	stp	x27, x28, [sp, 80]
 	str	w4, [x29, 116]
+	str	x2, [x29, 120]
 	bl	nandc_wait_flash_ready
 	adrp	x0, .LANCHOR13
+	add	w19, w19, w19, lsl 1
+	asr	w19, w19, 2
+	ldr	x6, [x0, #:lo12:.LANCHOR13]
+	adrp	x0, .LANCHOR162
+	add	x0, x0, :lo12:.LANCHOR162
+	str	x0, [x29, 104]
+	ubfiz	x0, x20, 8, 8
+	add	x25, x6, x0
+.L1735:
+	adrp	x24, .LANCHOR14
+	add	x24, x24, :lo12:.LANCHOR14
 	mov	w21, 0
-	add	w20, w20, w20, lsl 1
 	mov	w28, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR13]
-	asr	w20, w20, 2
-	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR159
-	add	x0, x0, :lo12:.LANCHOR159
-	str	x0, [x29, 104]
-	ldr	x0, [x29, 120]
-	add	x23, x0, x19, lsl 8
-	adrp	x0, .LANCHOR14
-	add	x0, x0, :lo12:.LANCHOR14
-	str	x0, [x29, 96]
-.L1721:
+.L1736:
 	ldr	x0, [x29, 104]
 	ldrb	w0, [x0]
 	cmp	w21, w0
-	bcc	.L1726
-.L1725:
-	ldr	x0, [x29, 120]
-	add	x19, x0, x19, lsl 8
+	bcc	.L1741
+.L1740:
 	mov	w0, 239
-	str	w0, [x19, 2056]
+	str	w0, [x25, 2056]
 	mov	w0, 137
-	str	w0, [x19, 2052]
+	str	w0, [x25, 2052]
 	mov	w0, 200
 	bl	timer_delay_ns
-	str	wzr, [x19, 2048]
-	str	wzr, [x19, 2048]
-	cmp	w28, w20
-	str	wzr, [x19, 2048]
-	str	wzr, [x19, 2048]
-	bcc	.L1727
+	str	wzr, [x25, 2048]
+	str	wzr, [x25, 2048]
+	cmp	w28, w19
+	str	wzr, [x25, 2048]
+	str	wzr, [x25, 2048]
+	bcc	.L1742
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L1727:
+.L1742:
+	cmn	w28, #1
+	cset	w24, eq
 	cmp	w28, 256
-	ccmn	w28, #1, 4, ne
-	bne	.L1728
-	adrp	x0, .LC110
+	cset	w0, eq
+	orr	w0, w24, w0
+	cbz	w0, .L1743
 	mov	w4, w28
 	mov	w3, w21
-	mov	w2, w22
+	mov	w2, w23
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC110
+	adrp	x0, .LC112
+	add	x0, x0, :lo12:.LC112
 	bl	printf
-.L1728:
-	bl	nandc_wait_flash_ready
-	mov	w0, w28
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 128
-	ret
-.L1726:
+	eor	w0, w22, 1
+	tst	w24, w0
+	beq	.L1744
+	mov	w1, 3
+	mov	w0, w20
+	mov	w22, 1
+	bl	mt_auto_read_calibration_config
+	b	.L1735
+.L1741:
 	mov	w0, 239
-	str	w0, [x23, 2056]
+	str	w0, [x25, 2056]
 	mov	w0, 137
-	str	w0, [x23, 2052]
+	str	w0, [x25, 2052]
 	add	w27, w21, 1
 	mov	w0, 200
 	bl	timer_delay_ns
-	str	w27, [x23, 2048]
-	str	wzr, [x23, 2048]
+	str	w27, [x25, 2048]
+	str	wzr, [x25, 2048]
 	mov	x3, x26
 	ldr	w4, [x29, 116]
-	mov	x2, x25
-	str	wzr, [x23, 2048]
-	mov	w1, w22
-	str	wzr, [x23, 2048]
-	mov	w0, w24
+	mov	w1, w23
+	ldr	x2, [x29, 120]
+	mov	w0, w20
+	str	wzr, [x25, 2048]
+	str	wzr, [x25, 2048]
 	bl	flash_read_page
 	mov	w7, w0
-	ldr	x0, [x29, 96]
-	ldr	w0, [x0]
-	tbz	x0, 12, .L1722
+	ldr	w0, [x24]
+	tbz	x0, 12, .L1737
 	mov	w4, w7
 	str	w7, [x29, 112]
 	mov	w3, w28
-	mov	w2, w22
+	mov	w2, w23
 	mov	w1, w21
-	adrp	x0, .LC109
-	add	x0, x0, :lo12:.LC109
+	adrp	x0, .LC111
+	add	x0, x0, :lo12:.LC111
 	bl	printf
 	ldr	w7, [x29, 112]
-.L1722:
+.L1737:
 	cmn	w7, #1
-	beq	.L1723
-	adrp	x0, .LANCHOR156
+	beq	.L1738
+	adrp	x0, .LANCHOR159
 	cmn	w28, #1
 	csel	w28, w28, w7, ne
-	cmp	w7, w20
-	ldr	x25, [x0, #:lo12:.LANCHOR156]
-	adrp	x0, .LANCHOR158
-	ldr	x26, [x0, #:lo12:.LANCHOR158]
-	bcc	.L1729
-.L1723:
+	cmp	w7, w19
+	ldr	x0, [x0, #:lo12:.LANCHOR159]
+	str	x0, [x29, 120]
+	adrp	x0, .LANCHOR161
+	ldr	x26, [x0, #:lo12:.LANCHOR161]
+	bcc	.L1747
+.L1738:
 	mov	w21, w27
-	b	.L1721
-.L1729:
+	b	.L1736
+.L1747:
 	mov	w28, w7
-	b	.L1725
+	b	.L1740
+.L1744:
+	cbz	w22, .L1745
+	mov	w0, w20
+	mov	w1, 0
+	bl	mt_auto_read_calibration_config
+	cmn	w28, #1
+	mov	w0, 256
+	csel	w28, w28, w0, eq
+.L1745:
+	bl	nandc_wait_flash_ready
+	mov	w0, w28
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+.L1743:
+	cbz	w22, .L1745
+	mov	w1, 0
+	mov	w0, w20
+	mov	w28, 256
+	bl	mt_auto_read_calibration_config
+	b	.L1745
 	.size	micron_read_retrial, .-micron_read_retrial
 	.section	.text.toshiba_3d_read_retrial,"ax",@progbits
 	.align	2
@@ -10363,17 +10658,17 @@ toshiba_3d_read_retrial:
 	csel	w0, w1, w0, ne
 	str	w0, [x29, 136]
 	add	x0, x22, :lo12:.LANCHOR24
-	cbnz	w4, .L1744
+	cbnz	w4, .L1765
 	str	x0, [x29, 120]
 	sxtw	x0, w24
 	add	x0, x0, 8
 	add	x0, x25, x0, lsl 8
 	str	x0, [x29, 112]
-.L1751:
+.L1772:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, 36
-	bne	.L1745
+	bne	.L1766
 	mov	w1, w20
 	mov	x0, x21
 	mov	w2, 0
@@ -10381,7 +10676,7 @@ toshiba_3d_read_retrial:
 	ldr	x1, [x29, 112]
 	mov	w0, 93
 	str	w0, [x1, 8]
-.L1746:
+.L1767:
 	mov	w4, w28
 	mov	x3, x27
 	mov	x2, x26
@@ -10391,60 +10686,60 @@ toshiba_3d_read_retrial:
 	mov	w4, w0
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 4, .L1747
+	tbz	x0, 4, .L1768
 	mov	w3, w4
 	str	w4, [x29, 108]
 	mov	w2, w23
 	mov	w1, w20
-	adrp	x0, .LC111
-	add	x0, x0, :lo12:.LC111
+	adrp	x0, .LC113
+	add	x0, x0, :lo12:.LC113
 	bl	printf
 	ldr	w4, [x29, 108]
-.L1747:
+.L1768:
 	cmn	w4, #1
-	beq	.L1748
-	adrp	x0, .LANCHOR156
+	beq	.L1769
+	adrp	x0, .LANCHOR159
 	cmn	w19, #1
 	csel	w19, w19, w4, ne
-	ldr	x26, [x0, #:lo12:.LANCHOR156]
-	adrp	x0, .LANCHOR158
-	ldr	x27, [x0, #:lo12:.LANCHOR158]
-	adrp	x0, .LANCHOR44
-	ldrb	w0, [x0, #:lo12:.LANCHOR44]
+	ldr	x26, [x0, #:lo12:.LANCHOR159]
+	adrp	x0, .LANCHOR161
+	ldr	x27, [x0, #:lo12:.LANCHOR161]
+	adrp	x0, .LANCHOR46
+	ldrb	w0, [x0, #:lo12:.LANCHOR46]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1766
-.L1748:
+	bcc	.L1787
+.L1769:
 	ldr	w0, [x29, 136]
 	add	w20, w20, 1
 	cmp	w0, w20
-	bne	.L1751
-.L1750:
+	bne	.L1772
+.L1771:
 	ldrb	w0, [x22, #:lo12:.LANCHOR24]
 	cmp	w0, 36
-	bne	.L1752
+	bne	.L1773
 	mov	w2, 0
-.L1789:
+.L1810:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_tlc_set_rr_para
-	b	.L1753
-.L1745:
+	b	.L1774
+.L1766:
 	mov	w1, w20
 	mov	x0, x21
 	bl	toshiba_3d_set_slc_rr_para
-	b	.L1746
-.L1766:
+	b	.L1767
+.L1787:
 	mov	w19, w4
-	b	.L1750
-.L1752:
+	b	.L1771
+.L1773:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_3d_set_slc_rr_para
-.L1753:
+.L1774:
 	ldrb	w0, [x22, #:lo12:.LANCHOR24]
 	cmp	w0, 36
-	bne	.L1762
+	bne	.L1783
 	ldr	x0, [x29, 128]
 	add	x25, x25, x0, lsl 8
 	mov	w0, 85
@@ -10453,27 +10748,27 @@ toshiba_3d_read_retrial:
 	str	wzr, [x25, 2052]
 	str	wzr, [x25, 2048]
 	str	w0, [x25, 2056]
-.L1762:
-	adrp	x0, .LANCHOR44
-	ldrb	w0, [x0, #:lo12:.LANCHOR44]
+.L1783:
+	adrp	x0, .LANCHOR46
+	ldrb	w0, [x0, #:lo12:.LANCHOR46]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L1763
+	bcc	.L1784
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L1763:
+.L1784:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L1764
-	adrp	x0, .LC113
+	bne	.L1785
+	adrp	x0, .LC115
 	mov	w4, w19
 	mov	w3, w20
 	mov	w2, w23
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC113
+	add	x0, x0, :lo12:.LC115
 	bl	printf
-.L1764:
+.L1785:
 	bl	nandc_wait_flash_ready
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
@@ -10483,23 +10778,23 @@ toshiba_3d_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1744:
+.L1765:
 	str	x0, [x29, 112]
 	sxtw	x0, w24
 	add	x0, x0, 8
 	add	x0, x25, x0, lsl 8
 	str	x0, [x29, 136]
-.L1760:
+.L1781:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
 	cmp	w0, 36
-	bne	.L1754
+	bne	.L1775
 	mov	x0, x21
 	mov	w2, 1
 	mov	w1, w20
 	bl	toshiba_tlc_set_rr_para
 	mov	w0, 93
-.L1788:
+.L1809:
 	ldr	x1, [x29, 136]
 	mov	w4, w28
 	mov	x3, x27
@@ -10511,54 +10806,54 @@ toshiba_3d_read_retrial:
 	mov	w4, w0
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 4, .L1756
+	tbz	x0, 4, .L1777
 	mov	w3, w4
 	str	w4, [x29, 108]
 	mov	w2, w23
 	mov	w1, w20
-	adrp	x0, .LC112
-	add	x0, x0, :lo12:.LC112
+	adrp	x0, .LC114
+	add	x0, x0, :lo12:.LC114
 	bl	printf
 	ldr	w4, [x29, 108]
-.L1756:
+.L1777:
 	cmn	w4, #1
-	beq	.L1757
-	adrp	x0, .LANCHOR156
+	beq	.L1778
+	adrp	x0, .LANCHOR159
 	cmn	w19, #1
 	csel	w19, w19, w4, ne
-	ldr	x26, [x0, #:lo12:.LANCHOR156]
-	adrp	x0, .LANCHOR158
-	ldr	x27, [x0, #:lo12:.LANCHOR158]
-	adrp	x0, .LANCHOR44
-	ldrb	w0, [x0, #:lo12:.LANCHOR44]
+	ldr	x26, [x0, #:lo12:.LANCHOR159]
+	adrp	x0, .LANCHOR161
+	ldr	x27, [x0, #:lo12:.LANCHOR161]
+	adrp	x0, .LANCHOR46
+	ldrb	w0, [x0, #:lo12:.LANCHOR46]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1767
-.L1757:
+	bcc	.L1788
+.L1778:
 	ldr	w0, [x29, 120]
 	add	w20, w20, 1
 	cmp	w0, w20
-	bne	.L1760
-.L1759:
+	bne	.L1781
+.L1780:
 	ldrb	w0, [x22, #:lo12:.LANCHOR24]
 	cmp	w0, 36
-	bne	.L1761
+	bne	.L1782
 	mov	w2, 1
-	b	.L1789
-.L1754:
+	b	.L1810
+.L1775:
 	mov	x0, x21
 	mov	w1, w20
 	bl	toshiba_3d_set_tlc_rr_para
 	mov	w0, 38
-	b	.L1788
-.L1767:
+	b	.L1809
+.L1788:
 	mov	w19, w4
-	b	.L1759
-.L1761:
+	b	.L1780
+.L1782:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_3d_set_tlc_rr_para
-	b	.L1753
+	b	.L1774
 	.size	toshiba_3d_read_retrial, .-toshiba_3d_read_retrial
 	.section	.text.toshiba_read_retrial,"ax",@progbits
 	.align	2
@@ -10590,35 +10885,35 @@ toshiba_read_retrial:
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
-	bls	.L1808
+	bls	.L1829
 	adrp	x0, .LANCHOR21
 	ldrb	w0, [x0, #:lo12:.LANCHOR21]
-	cbz	w0, .L1809
+	cbz	w0, .L1830
 	mov	w23, 1
 	mov	w0, 1
 	bl	nandc_set_if_mode
-.L1792:
+.L1813:
 	and	x0, x19, 255
 	mov	w1, 92
 	add	x0, x22, x0, lsl 8
 	str	w1, [x0, 2056]
 	mov	w1, 197
 	str	w1, [x0, 2056]
-.L1791:
+.L1812:
 	sxtw	x0, w19
 	mov	w20, 1
 	add	x0, x0, 8
 	mov	w24, -1
 	add	x0, x22, x0, lsl 8
 	str	x0, [x29, 96]
-.L1793:
-	adrp	x0, .LANCHOR159
-	ldrb	w0, [x0, #:lo12:.LANCHOR159]
+.L1814:
+	adrp	x0, .LANCHOR162
+	ldrb	w0, [x0, #:lo12:.LANCHOR162]
 	add	w0, w0, 1
 	cmp	w20, w0
-	bcc	.L1802
+	bcc	.L1823
 	mov	w28, w24
-.L1801:
+.L1822:
 	ldr	x0, [x29, 120]
 	mov	w1, 0
 	ldrb	w0, [x0, #:lo12:.LANCHOR24]
@@ -10626,39 +10921,39 @@ toshiba_read_retrial:
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x21
-	bhi	.L1803
+	bhi	.L1824
 	bl	sandisk_set_rr_para
-.L1804:
+.L1825:
 	sxtw	x19, w19
 	mov	w0, 255
 	add	x19, x19, 8
 	add	x22, x22, x19, lsl 8
 	str	w0, [x22, 8]
-	adrp	x0, .LANCHOR44
-	ldrb	w0, [x0, #:lo12:.LANCHOR44]
+	adrp	x0, .LANCHOR46
+	ldrb	w0, [x0, #:lo12:.LANCHOR46]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L1805
+	bcc	.L1826
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L1805:
+.L1826:
 	cmp	w28, 256
 	ccmn	w28, #1, 4, ne
-	bne	.L1806
-	adrp	x0, .LC113
+	bne	.L1827
+	adrp	x0, .LC115
 	mov	w4, w28
 	mov	w3, w20
 	mov	w2, w25
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC113
+	add	x0, x0, :lo12:.LC115
 	bl	printf
-.L1806:
+.L1827:
 	bl	nandc_wait_flash_ready
-	cbz	w23, .L1790
+	cbz	w23, .L1811
 	mov	w0, 4
 	bl	nandc_set_if_mode
-.L1790:
+.L1811:
 	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10667,13 +10962,13 @@ toshiba_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1809:
+.L1830:
 	mov	w23, 0
-	b	.L1792
-.L1808:
+	b	.L1813
+.L1829:
 	mov	w23, 0
-	b	.L1791
-.L1802:
+	b	.L1812
+.L1823:
 	ldr	x0, [x29, 120]
 	mov	w1, w20
 	ldrb	w0, [x0, #:lo12:.LANCHOR24]
@@ -10681,22 +10976,22 @@ toshiba_read_retrial:
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x21
-	bhi	.L1794
+	bhi	.L1815
 	bl	sandisk_set_rr_para
-.L1795:
+.L1816:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0, #:lo12:.LANCHOR24]
 	cmp	w0, 34
-	bne	.L1796
-	adrp	x0, .LANCHOR159
-	ldrb	w0, [x0, #:lo12:.LANCHOR159]
+	bne	.L1817
+	adrp	x0, .LANCHOR162
+	ldrb	w0, [x0, #:lo12:.LANCHOR162]
 	sub	w0, w0, #3
 	cmp	w20, w0
-	bne	.L1796
+	bne	.L1817
 	ldr	x1, [x29, 96]
 	mov	w0, 179
 	str	w0, [x1, 8]
-.L1796:
+.L1817:
 	ldr	x0, [x29, 104]
 	mov	w1, 38
 	ldr	w4, [x29, 116]
@@ -10711,27 +11006,27 @@ toshiba_read_retrial:
 	bl	flash_read_page
 	mov	w28, w0
 	cmn	w0, #1
-	beq	.L1799
+	beq	.L1820
 	cmn	w24, #1
 	csel	w24, w24, w0, ne
-	adrp	x0, .LANCHOR156
-	ldr	x26, [x0, #:lo12:.LANCHOR156]
-	adrp	x0, .LANCHOR158
-	ldr	x27, [x0, #:lo12:.LANCHOR158]
-	adrp	x0, .LANCHOR44
-	ldrb	w0, [x0, #:lo12:.LANCHOR44]
+	adrp	x0, .LANCHOR159
+	ldr	x26, [x0, #:lo12:.LANCHOR159]
+	adrp	x0, .LANCHOR161
+	ldr	x27, [x0, #:lo12:.LANCHOR161]
+	adrp	x0, .LANCHOR46
+	ldrb	w0, [x0, #:lo12:.LANCHOR46]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L1801
-.L1799:
+	bcc	.L1822
+.L1820:
 	add	w20, w20, 1
-	b	.L1793
-.L1794:
+	b	.L1814
+.L1815:
 	bl	toshiba_set_rr_para
-	b	.L1795
-.L1803:
+	b	.L1816
+.L1824:
 	bl	toshiba_set_rr_para
-	b	.L1804
+	b	.L1825
 	.size	toshiba_read_retrial, .-toshiba_read_retrial
 	.section	.text.hynix_read_retrial,"ax",@progbits
 	.align	2
@@ -10759,37 +11054,37 @@ hynix_read_retrial:
 	ldrb	w24, [x28, 2]
 	ldrb	w20, [x0, 8]
 	bl	nandc_wait_flash_ready
-	adrp	x6, .LANCHOR44
-	add	x6, x6, :lo12:.LANCHOR44
+	adrp	x6, .LANCHOR46
+	add	x6, x6, :lo12:.LANCHOR46
 	mov	w5, 0
-	adrp	x7, .LANCHOR156
-	adrp	x8, .LANCHOR158
-.L1823:
+	adrp	x7, .LANCHOR159
+	adrp	x8, .LANCHOR161
+.L1844:
 	cmp	w5, w24
-	bcc	.L1828
-.L1827:
-	adrp	x0, .LANCHOR44
+	bcc	.L1849
+.L1848:
+	adrp	x0, .LANCHOR46
 	add	x23, x28, x23
-	ldrb	w0, [x0, #:lo12:.LANCHOR44]
+	ldrb	w0, [x0, #:lo12:.LANCHOR46]
 	strb	w20, [x23, 8]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L1829
+	bcc	.L1850
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L1829:
+.L1850:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L1830
-	adrp	x0, .LC114
+	bne	.L1851
+	adrp	x0, .LC116
 	mov	w4, w19
 	mov	w3, w5
 	mov	w2, w22
 	mov	w1, w5
-	add	x0, x0, :lo12:.LC114
+	add	x0, x0, :lo12:.LC116
 	bl	printf
-.L1830:
+.L1851:
 	bl	nandc_wait_flash_ready
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
@@ -10799,7 +11094,7 @@ hynix_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1828:
+.L1849:
 	add	w20, w20, 1
 	stp	x6, x8, [x29, 96]
 	and	w20, w20, 255
@@ -10820,21 +11115,21 @@ hynix_read_retrial:
 	cmn	w0, #1
 	ldp	x6, x8, [x29, 96]
 	ldr	x7, [x29, 112]
-	beq	.L1825
+	beq	.L1846
 	ldrb	w1, [x6]
 	cmn	w19, #1
 	csel	w19, w19, w0, ne
-	ldr	x25, [x7, #:lo12:.LANCHOR156]
-	ldr	x26, [x8, #:lo12:.LANCHOR158]
+	ldr	x25, [x7, #:lo12:.LANCHOR159]
+	ldr	x26, [x8, #:lo12:.LANCHOR161]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L1831
-.L1825:
+	bcc	.L1852
+.L1846:
 	add	w5, w5, 1
-	b	.L1823
-.L1831:
+	b	.L1844
+.L1852:
 	mov	w19, w0
-	b	.L1827
+	b	.L1848
 	.size	hynix_read_retrial, .-hynix_read_retrial
 	.section	.text.flash_ddr_tuning_read,"ax",@progbits
 	.align	2
@@ -10852,25 +11147,25 @@ flash_ddr_tuning_read:
 	stp	x25, x26, [sp, 64]
 	mov	x24, x3
 	stp	x27, x28, [sp, 80]
-	adrp	x25, .LANCHOR44
+	adrp	x25, .LANCHOR46
 	str	w4, [x29, 136]
 	bl	nandc_get_ddr_para
-	add	x25, x25, :lo12:.LANCHOR44
+	add	x25, x25, :lo12:.LANCHOR46
 	str	w0, [x29, 132]
 	adrp	x0, .LANCHOR14
 	add	x0, x0, :lo12:.LANCHOR14
 	mov	w28, 0
 	str	x0, [x29, 120]
 	mov	w26, 0
-	adrp	x0, .LC115
+	adrp	x0, .LC117
 	mov	w27, 0
-	add	x0, x0, :lo12:.LC115
+	add	x0, x0, :lo12:.LC117
 	mov	w19, 1024
 	mov	w21, -1
 	mov	w7, 6
 	str	wzr, [x29, 140]
 	str	x0, [x29, 112]
-.L1847:
+.L1868:
 	mov	w0, w7
 	str	w7, [x29, 128]
 	bl	nandc_set_ddr_para
@@ -10884,7 +11179,7 @@ flash_ddr_tuning_read:
 	ldr	x0, [x29, 120]
 	ldr	w7, [x29, 128]
 	ldr	w0, [x0]
-	tbz	x0, 4, .L1842
+	tbz	x0, 4, .L1863
 	ldr	x0, [x29, 112]
 	mov	w3, w4
 	mov	w1, w7
@@ -10894,47 +11189,47 @@ flash_ddr_tuning_read:
 	bl	printf
 	ldr	w4, [x29, 108]
 	ldr	w7, [x29, 128]
-.L1842:
+.L1863:
 	add	w0, w19, 1
 	cmp	w4, w0
-	bhi	.L1843
-	adrp	x0, .LANCHOR156
-	ldr	x23, [x0, #:lo12:.LANCHOR156]
-	adrp	x0, .LANCHOR158
-	ldr	x24, [x0, #:lo12:.LANCHOR158]
+	bhi	.L1864
+	adrp	x0, .LANCHOR159
+	ldr	x23, [x0, #:lo12:.LANCHOR159]
+	adrp	x0, .LANCHOR161
+	ldr	x24, [x0, #:lo12:.LANCHOR161]
 	ldrb	w0, [x25]
 	cmp	w4, w0, lsr 2
-	bcs	.L1853
+	bcs	.L1874
 	add	w27, w27, 1
 	cmp	w27, 7
-	bls	.L1853
+	bls	.L1874
 	sub	w28, w7, w27
 	mov	w19, w4
 	mov	w21, 0
-.L1845:
+.L1866:
 	ldr	w0, [x29, 140]
 	cmp	w27, w26
 	csel	w28, w28, w0, cs
-.L1846:
-	cbz	w28, .L1848
-	adrp	x0, .LANCHOR44
+.L1867:
+	cbz	w28, .L1869
+	adrp	x0, .LANCHOR46
 	mov	w1, 3
-	ldrb	w0, [x0, #:lo12:.LANCHOR44]
+	ldrb	w0, [x0, #:lo12:.LANCHOR46]
 	udiv	w0, w0, w1
 	cmp	w0, w19
-	bls	.L1848
+	bls	.L1869
 	mov	w1, w28
-	adrp	x0, .LC116
-	add	x0, x0, :lo12:.LC116
+	adrp	x0, .LC118
+	add	x0, x0, :lo12:.LC118
 	bl	printf
 	mov	w0, w28
-.L1864:
+.L1885:
 	bl	nandc_set_ddr_para
-	cbz	w21, .L1841
+	cbz	w21, .L1862
 	mov	w2, w22
 	mov	w1, w20
-	adrp	x0, .LC117
-	add	x0, x0, :lo12:.LC117
+	adrp	x0, .LC119
+	add	x0, x0, :lo12:.LC119
 	bl	printf
 	mov	w0, w20
 	bl	flash_reset
@@ -10942,8 +11237,8 @@ flash_ddr_tuning_read:
 	bl	flash_set_interface_mode
 	mov	w0, 1
 	bl	nandc_set_if_mode
-	adrp	x0, .LANCHOR32
-	add	x0, x0, :lo12:.LANCHOR32
+	adrp	x0, .LANCHOR33
+	add	x0, x0, :lo12:.LANCHOR33
 	mov	w1, 2
 	strb	w1, [x0, w20, sxtw]
 	mov	w0, w20
@@ -10958,22 +11253,22 @@ flash_ddr_tuning_read:
 	mov	w3, w0
 	mov	w2, w22
 	mov	w1, w20
-	adrp	x0, .LC118
-	add	x0, x0, :lo12:.LC118
+	adrp	x0, .LC120
+	add	x0, x0, :lo12:.LC120
 	bl	printf
-	adrp	x0, .LANCHOR44
-	ldrb	w0, [x0, #:lo12:.LANCHOR44]
+	adrp	x0, .LANCHOR46
+	ldrb	w0, [x0, #:lo12:.LANCHOR46]
 	cmp	w19, w0
-	bhi	.L1855
-	adrp	x1, .LANCHOR160
-	ldr	w0, [x1, #:lo12:.LANCHOR160]
+	bhi	.L1876
+	adrp	x1, .LANCHOR163
+	ldr	w0, [x1, #:lo12:.LANCHOR163]
 	add	w0, w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR160]
+	str	w0, [x1, #:lo12:.LANCHOR163]
 	cmp	w0, 100
-	bls	.L1851
+	bls	.L1872
 	adrp	x0, .LANCHOR21
 	strb	wzr, [x0, #:lo12:.LANCHOR21]
-.L1841:
+.L1862:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10982,38 +11277,38 @@ flash_ddr_tuning_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1843:
+.L1864:
 	cmp	w27, w26
-	bls	.L1854
+	bls	.L1875
 	sub	w0, w28, w27
 	str	w0, [x29, 140]
 	cmp	w27, 7
-	bhi	.L1846
+	bhi	.L1867
 	mov	w26, w27
-.L1854:
+.L1875:
 	mov	w27, 0
-	b	.L1844
-.L1853:
+	b	.L1865
+.L1874:
 	mov	w28, w7
 	mov	w19, w4
 	mov	w21, 0
-.L1844:
+.L1865:
 	add	w7, w7, 2
 	cmp	w7, 50
-	bne	.L1847
-	b	.L1845
-.L1848:
+	bne	.L1868
+	b	.L1866
+.L1869:
 	ldrb	w0, [x29, 132]
-	b	.L1864
-.L1855:
+	b	.L1885
+.L1876:
 	mov	w19, w21
-.L1851:
-	adrp	x20, .LANCHOR43
-	ldrb	w0, [x20, #:lo12:.LANCHOR43]
+.L1872:
+	adrp	x20, .LANCHOR45
+	ldrb	w0, [x20, #:lo12:.LANCHOR45]
 	bl	flash_set_interface_mode
-	ldrb	w0, [x20, #:lo12:.LANCHOR43]
+	ldrb	w0, [x20, #:lo12:.LANCHOR45]
 	bl	nandc_set_if_mode
-	b	.L1841
+	b	.L1862
 	.size	flash_ddr_tuning_read, .-flash_ddr_tuning_read
 	.section	.text.flash_read_page_en,"ax",@progbits
 	.align	2
@@ -11035,59 +11330,59 @@ flash_read_page_en:
 	mov	w24, w4
 	mov	x25, x0
 	cmp	w1, w20
-	bhi	.L1866
-	adrp	x1, .LANCHOR161
+	bhi	.L1887
+	adrp	x1, .LANCHOR164
 	adrp	x0, .LC0
-	mov	w2, 399
-	add	x1, x1, :lo12:.LANCHOR161
+	mov	w2, 404
+	add	x1, x1, :lo12:.LANCHOR164
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1866:
+.L1887:
 	adrp	x0, .LANCHOR30
 	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w21, [x0, w20, sxtw]
 	ldrb	w0, [x25, #:lo12:.LANCHOR18]
 	cmp	w0, w20
-	bcs	.L1867
+	bcs	.L1888
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbnz	x0, 6, .L1868
-.L1892:
+	tbnz	x0, 6, .L1889
+.L1913:
 	mov	w0, -1
-.L1865:
+.L1886:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1868:
+.L1889:
 	mov	w3, w19
 	mov	w2, w20
 	mov	w1, w21
-	adrp	x0, .LC119
-	add	x0, x0, :lo12:.LC119
+	adrp	x0, .LC121
+	add	x0, x0, :lo12:.LC121
 	bl	printf
-	b	.L1892
-.L1867:
+	b	.L1913
+.L1888:
 	tst	x19, 50331648
-	bne	.L1870
+	bne	.L1891
 	adrp	x0, .LANCHOR0
 	adrp	x1, .LANCHOR1
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L1871
+	cbz	w0, .L1892
 	ldrb	w0, [x1, #:lo12:.LANCHOR1]
-	cbz	w0, .L1870
-.L1871:
+	cbz	w0, .L1891
+.L1892:
 	adrp	x0, .LANCHOR2
 	ldrb	w1, [x1, #:lo12:.LANCHOR1]
 	ldrh	w2, [x0, #:lo12:.LANCHOR2]
 	udiv	w0, w19, w2
 	mul	w0, w0, w2
 	sub	w19, w19, w0
-	cbz	w1, .L1872
+	cbz	w1, .L1893
 	add	w19, w0, w19, lsl 1
-.L1870:
+.L1891:
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -11095,25 +11390,25 @@ flash_read_page_en:
 	mov	w0, w21
 	bl	flash_read_page
 	cmn	w0, #1
-	bne	.L1865
-	adrp	x20, .LANCHOR46
-	ldrb	w25, [x20, #:lo12:.LANCHOR46]
-	cbnz	w25, .L1873
-.L1876:
-	adrp	x0, .LANCHOR162
-	ldr	x5, [x0, #:lo12:.LANCHOR162]
-	cbnz	x5, .L1874
-.L1875:
-	ldrb	w4, [x20, #:lo12:.LANCHOR46]
+	bne	.L1886
+	adrp	x20, .LANCHOR48
+	ldrb	w25, [x20, #:lo12:.LANCHOR48]
+	cbnz	w25, .L1894
+.L1897:
+	adrp	x0, .LANCHOR165
+	ldr	x5, [x0, #:lo12:.LANCHOR165]
+	cbnz	x5, .L1895
+.L1896:
+	ldrb	w4, [x20, #:lo12:.LANCHOR48]
 	mov	w3, -1
 	mov	w2, w19
 	mov	w1, 0
-	adrp	x0, .LC120
-	add	x0, x0, :lo12:.LC120
+	adrp	x0, .LC122
+	add	x0, x0, :lo12:.LC122
 	bl	printf
 	adrp	x0, .LANCHOR21
 	ldrb	w0, [x0, #:lo12:.LANCHOR21]
-	cbz	w0, .L1892
+	cbz	w0, .L1913
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -11125,25 +11420,25 @@ flash_read_page_en:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	b	flash_ddr_tuning_read
-.L1872:
+.L1893:
 	adrp	x1, .LANCHOR3
 	add	x1, x1, :lo12:.LANCHOR3
 	ldrh	w19, [x1, w19, uxtw 1]
 	add	w19, w19, w0
-	b	.L1870
-.L1873:
-	strb	wzr, [x20, #:lo12:.LANCHOR46]
+	b	.L1891
+.L1894:
+	strb	wzr, [x20, #:lo12:.LANCHOR48]
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
 	mov	w1, w19
 	mov	w0, w21
 	bl	flash_read_page
-	strb	w25, [x20, #:lo12:.LANCHOR46]
+	strb	w25, [x20, #:lo12:.LANCHOR48]
 	cmn	w0, #1
-	beq	.L1876
-	b	.L1865
-.L1874:
+	beq	.L1897
+	b	.L1886
+.L1895:
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -11151,8 +11446,8 @@ flash_read_page_en:
 	mov	w0, w21
 	blr	x5
 	cmn	w0, #1
-	beq	.L1875
-	b	.L1865
+	beq	.L1896
+	b	.L1886
 	.size	flash_read_page_en, .-flash_read_page_en
 	.section	.text.flash_get_last_written_page,"ax",@progbits
 	.align	2
@@ -11163,15 +11458,15 @@ flash_get_last_written_page:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	w23, w0, 255
-	adrp	x0, .LANCHOR140
+	adrp	x0, .LANCHOR142
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
 	mov	x24, x2
-	ldrh	w19, [x0, #:lo12:.LANCHOR140]
-	adrp	x0, .LANCHOR31+26
+	ldrh	w19, [x0, #:lo12:.LANCHOR142]
+	adrp	x0, .LANCHOR32+26
 	stp	x21, x22, [sp, 32]
 	and	w21, w1, 65535
-	ldrh	w26, [x0, #:lo12:.LANCHOR31+26]
+	ldrh	w26, [x0, #:lo12:.LANCHOR32+26]
 	sub	w19, w19, #1
 	sxth	w19, w19
 	stp	x27, x28, [sp, 80]
@@ -11182,23 +11477,23 @@ flash_get_last_written_page:
 	add	w1, w19, w26
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L1894
+	bne	.L1915
 	mov	w27, 0
 	mov	w28, 2
-.L1895:
+.L1916:
 	cmp	w27, w19
-	ble	.L1898
-.L1894:
+	ble	.L1919
+.L1915:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1899
+	tbz	x0, 12, .L1920
 	ldr	w3, [x22]
-	adrp	x0, .LC121
+	adrp	x0, .LC123
 	mov	w2, w19
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC121
+	add	x0, x0, :lo12:.LC123
 	bl	printf
-.L1899:
+.L1920:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11207,7 +11502,7 @@ flash_get_last_written_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1898:
+.L1919:
 	add	w20, w27, w19
 	mov	w4, w25
 	mov	x3, x22
@@ -11217,33 +11512,36 @@ flash_get_last_written_page:
 	add	w1, w26, w20, sxth
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L1896
+	bne	.L1917
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L1895
-.L1896:
+	b	.L1916
+.L1917:
 	add	w20, w20, 1
 	sxth	w27, w20
-	b	.L1895
+	b	.L1916
 	.size	flash_get_last_written_page, .-flash_get_last_written_page
 	.section	.text.flash_get_last_written_page_ext,"ax",@progbits
 	.align	2
 	.global	flash_get_last_written_page_ext
 	.type	flash_get_last_written_page_ext, %function
 flash_get_last_written_page_ext:
-	adrp	x4, .LANCHOR66
-	mov	w6, 21
+	adrp	x4, .LANCHOR31
+	mov	w5, 24
 	and	w0, w0, 65535
-	mov	w5, 1
-	ldrh	w4, [x4, #:lo12:.LANCHOR66]
-	sub	w6, w6, w4
+	mov	w6, 1
+	ldrb	w4, [x4, #:lo12:.LANCHOR31]
+	sub	w5, w5, w4
+	adrp	x4, .LANCHOR68
+	ldrh	w4, [x4, #:lo12:.LANCHOR68]
+	sub	w5, w5, w4
 	mov	w4, w3
 	mov	x3, x2
 	mov	x2, x1
-	lsl	w5, w5, w6
-	sub	w5, w5, #1
-	and	w1, w5, w0
-	asr	w0, w0, w6
+	lsl	w6, w6, w5
+	sub	w6, w6, #1
+	and	w1, w6, w0
+	asr	w0, w0, w5
 	b	flash_get_last_written_page
 	.size	flash_get_last_written_page_ext, .-flash_get_last_written_page_ext
 	.section	.text.flash_ddr_para_scan,"ax",@progbits
@@ -11254,44 +11552,44 @@ flash_ddr_para_scan:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR43
+	adrp	x20, .LANCHOR45
 	stp	x21, x22, [sp, 32]
 	and	w22, w0, 255
-	ldrb	w0, [x20, #:lo12:.LANCHOR43]
+	ldrb	w0, [x20, #:lo12:.LANCHOR45]
 	adrp	x19, .LANCHOR21
 	stp	x23, x24, [sp, 48]
 	mov	w21, 1
 	mov	w23, w1
 	str	x25, [sp, 64]
 	strb	w21, [x19, #:lo12:.LANCHOR21]
-	adrp	x24, .LANCHOR164
+	adrp	x24, .LANCHOR167
 	bl	flash_set_interface_mode
-	adrp	x25, .LANCHOR163
-	ldrb	w0, [x20, #:lo12:.LANCHOR43]
+	adrp	x25, .LANCHOR166
+	ldrb	w0, [x20, #:lo12:.LANCHOR45]
 	bl	nandc_set_if_mode
-	ldr	x3, [x25, #:lo12:.LANCHOR163]
+	ldr	x3, [x25, #:lo12:.LANCHOR166]
 	mov	w4, 4
-	ldr	x2, [x24, #:lo12:.LANCHOR164]
+	ldr	x2, [x24, #:lo12:.LANCHOR167]
 	mov	w1, w23
 	mov	w0, w22
 	bl	flash_ddr_tuning_read
-	ldr	x3, [x25, #:lo12:.LANCHOR163]
+	ldr	x3, [x25, #:lo12:.LANCHOR166]
 	mov	w4, 4
-	ldr	x2, [x24, #:lo12:.LANCHOR164]
+	ldr	x2, [x24, #:lo12:.LANCHOR167]
 	mov	w1, w23
 	mov	w0, w22
 	bl	flash_read_page
 	cmn	w0, #1
 	mov	x0, x19
-	bne	.L1906
-	ldrb	w1, [x20, #:lo12:.LANCHOR43]
-	tbz	x1, 0, .L1906
+	bne	.L1927
+	ldrb	w1, [x20, #:lo12:.LANCHOR45]
+	tbz	x1, 0, .L1927
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, w21
 	bl	nandc_set_if_mode
 	strb	wzr, [x19, #:lo12:.LANCHOR21]
-.L1907:
+.L1928:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -11299,10 +11597,10 @@ flash_ddr_para_scan:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1906:
+.L1927:
 	mov	w1, 1
 	strb	w1, [x0, #:lo12:.LANCHOR21]
-	b	.L1907
+	b	.L1928
 	.size	flash_ddr_para_scan, .-flash_ddr_para_scan
 	.section	.text.flash_complete_plane_page_read,"ax",@progbits
 	.align	2
@@ -11310,107 +11608,131 @@ flash_ddr_para_scan:
 	.type	flash_complete_plane_page_read, %function
 flash_complete_plane_page_read:
 	stp	x29, x30, [sp, -64]!
+	mov	w4, 24
 	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	mov	w24, w0
+	adrp	x0, .LANCHOR31
+	stp	x21, x22, [sp, 32]
 	stp	x19, x20, [sp, 16]
-	and	w19, w0, 2097151
-	ubfx	x20, x0, 24, 2
-	str	x23, [sp, 48]
-	ubfx	x23, x0, 21, 3
+	mov	w19, 1
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	mov	x20, x1
+	mov	x21, x2
+	sub	w22, w4, w0
+	lsl	w19, w19, w0
+	sub	w19, w19, #1
+	lsr	w0, w24, w22
+	and	w19, w19, w0
 	adrp	x0, .LANCHOR18
-	stp	x21, x22, [sp, 32]
-	mov	x21, x1
-	ldrb	w0, [x0, #:lo12:.LANCHOR18]
-	mov	x22, x2
-	cmp	w0, w23
-	bhi	.L1913
-	adrp	x1, .LANCHOR165
+	and	w19, w19, 255
+	mov	x23, x0
+	ldrb	w1, [x0, #:lo12:.LANCHOR18]
+	cmp	w1, w19
+	bhi	.L1934
+	adrp	x1, .LANCHOR168
 	adrp	x0, .LC0
-	mov	w2, 887
-	add	x1, x1, :lo12:.LANCHOR165
+	mov	w2, 909
+	add	x1, x1, :lo12:.LANCHOR168
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1913:
-	adrp	x0, .LANCHOR30
-	add	x0, x0, :lo12:.LANCHOR30
-	ldrb	w6, [x0, w23, sxtw]
+.L1934:
+	ldrb	w0, [x23, #:lo12:.LANCHOR18]
+	cmp	w0, w19
+	bls	.L1942
+	adrp	x2, .LANCHOR30
+	add	x2, x2, :lo12:.LANCHOR30
 	adrp	x0, .LANCHOR13
-	ldr	x4, [x0, #:lo12:.LANCHOR13]
-	mov	w0, w6
+	mov	w4, 1
+	lsl	w4, w4, w22
+	sub	w4, w4, #1
+	ldrb	w7, [x2, w19, sxtw]
+	and	w4, w4, w24
+	ldr	x6, [x0, #:lo12:.LANCHOR13]
+	ubfx	x24, x24, 24, 2
+	mov	w0, w7
 	bl	nandc_cs
-	cbnz	w20, .L1914
-	mov	w0, w19
+	cbnz	w24, .L1936
+	mov	w0, w4
 	bl	slc_phy_page_address_calc
-	mov	w19, w0
-.L1914:
+	mov	w4, w0
+.L1936:
 	adrp	x0, .LANCHOR20+16
-	and	x1, x6, 255
-	and	w3, w19, 255
-	lsr	w2, w19, 8
+	and	x1, x7, 255
+	and	w5, w4, 255
+	lsr	w3, w4, 8
 	ldrb	w0, [x0, #:lo12:.LANCHOR20+16]
-	adrp	x5, .LANCHOR16
+	lsr	w2, w4, 16
 	cmp	w0, 1
-	lsr	w0, w19, 16
-	bne	.L1915
-	add	x1, x4, x1, lsl 8
-	mov	w4, 6
-.L1926:
-	str	w4, [x1, 2056]
+	adrp	x0, .LANCHOR16
+	bne	.L1937
+	add	x1, x6, x1, lsl 8
+	mov	w6, 6
+.L1949:
+	str	w6, [x1, 2056]
 	str	wzr, [x1, 2052]
 	str	wzr, [x1, 2052]
+	str	w5, [x1, 2052]
 	str	w3, [x1, 2052]
 	str	w2, [x1, 2052]
-	str	w0, [x1, 2052]
-.L1924:
-	mov	w0, 224
-	str	w0, [x1, 2056]
-	ldr	x0, [x5, #:lo12:.LANCHOR16]
+.L1947:
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
+	mov	w2, 224
+	str	w2, [x1, 2056]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1918
-	cbz	w20, .L1918
-	add	w19, w19, w19, lsl 1
-	sub	w20, w20, #1
-	add	w0, w19, w20
-.L1925:
+	bne	.L1940
+	cbz	w24, .L1940
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbnz	w0, .L1940
+	add	w4, w4, w4, lsl 1
+	sub	w0, w24, #1
+	add	w0, w4, w0
+.L1948:
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR31+9
-	mov	x4, x22
-	mov	x3, x21
+	adrp	x0, .LANCHOR32+9
+	mov	x4, x21
+	mov	x3, x20
 	mov	w1, 0
-	ldrb	w2, [x0, #:lo12:.LANCHOR31+9]
-	mov	w0, w6
+	ldrb	w2, [x0, #:lo12:.LANCHOR32+9]
+	mov	w0, w7
 	bl	nandc_xfer
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.29
-	ldr	x23, [sp, 48]
+	bl	nandc_de_cs.constprop.30
 	mov	w0, w2
+.L1933:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1915:
-	ldr	x7, [x5, #:lo12:.LANCHOR16]
-	add	x1, x4, x1, lsl 8
-	ldrb	w7, [x7, 12]
-	cmp	w7, 3
-	bne	.L1917
-	mov	w4, 5
-	b	.L1926
-.L1917:
+.L1937:
+	ldr	x8, [x0, #:lo12:.LANCHOR16]
+	add	x1, x6, x1, lsl 8
+	ldrb	w8, [x8, 12]
+	cmp	w8, 3
+	bne	.L1939
+	mov	w6, 5
+	b	.L1949
+.L1939:
 	str	wzr, [x1, 2056]
 	str	wzr, [x1, 2052]
 	str	wzr, [x1, 2052]
+	str	w5, [x1, 2052]
 	str	w3, [x1, 2052]
 	str	w2, [x1, 2052]
-	str	w0, [x1, 2052]
-	mov	w0, 5
-	str	w0, [x1, 2056]
+	mov	w2, 5
+	str	w2, [x1, 2056]
 	str	wzr, [x1, 2052]
 	str	wzr, [x1, 2052]
-	b	.L1924
-.L1918:
-	mov	w0, w19
-	b	.L1925
+	b	.L1947
+.L1940:
+	mov	w0, w4
+	b	.L1948
+.L1942:
+	mov	w0, -1
+	b	.L1933
 	.size	flash_complete_plane_page_read, .-flash_complete_plane_page_read
 	.section	.text.flash_complete_page_read,"ax",@progbits
 	.align	2
@@ -11419,41 +11741,52 @@ flash_complete_plane_page_read:
 flash_complete_page_read:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	mov	w21, w0
+	adrp	x0, .LANCHOR31
 	stp	x19, x20, [sp, 16]
-	and	w19, w0, 2097151
+	mov	x22, x1
+	mov	w1, 24
+	ldrb	w20, [x0, #:lo12:.LANCHOR31]
+	mov	w0, 1
 	stp	x23, x24, [sp, 48]
-	mov	w23, w0
-	adrp	x0, .LANCHOR18
-	stp	x21, x22, [sp, 32]
+	mov	x23, x2
+	sub	w1, w1, w20
 	stp	x25, x26, [sp, 64]
-	ubfx	x20, x23, 21, 3
-	ldrb	w0, [x0, #:lo12:.LANCHOR18]
-	mov	x24, x1
+	lsl	w20, w0, w20
+	sub	w20, w20, #1
+	lsl	w19, w0, w1
+	adrp	x0, .LANCHOR18
+	lsr	w1, w21, w1
 	stp	x27, x28, [sp, 80]
-	mov	x25, x2
-	ubfx	x21, x23, 24, 2
+	and	w20, w20, w1
+	ldrb	w0, [x0, #:lo12:.LANCHOR18]
+	sub	w19, w19, #1
+	and	w20, w20, 255
+	and	w19, w19, w21
+	ubfx	x24, x21, 24, 2
 	cmp	w0, w20
-	bhi	.L1928
-	adrp	x1, .LANCHOR166
+	bhi	.L1951
+	adrp	x1, .LANCHOR169
 	adrp	x0, .LC0
-	mov	w2, 1009
-	add	x1, x1, :lo12:.LANCHOR166
+	mov	w2, 1033
+	add	x1, x1, :lo12:.LANCHOR169
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1928:
+.L1951:
 	adrp	x0, .LANCHOR30
 	add	x0, x0, :lo12:.LANCHOR30
-	ldrb	w22, [x0, w20, sxtw]
+	ldrb	w25, [x0, w20, sxtw]
 	adrp	x0, .LANCHOR13
 	ldr	x4, [x0, #:lo12:.LANCHOR13]
-	mov	w0, w22
+	mov	w0, w25
 	bl	nandc_cs
-	cbnz	w21, .L1929
+	cbnz	w24, .L1952
 	mov	w0, w19
 	bl	slc_phy_page_address_calc
 	mov	w19, w0
-.L1929:
-	ubfiz	x0, x22, 8, 8
+.L1952:
+	ubfiz	x0, x25, 8, 8
 	mov	w1, 5
 	add	x0, x4, x0
 	str	w1, [x0, 2056]
@@ -11471,52 +11804,55 @@ flash_complete_page_read:
 	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1930
-	cbz	w21, .L1930
-	sub	w0, w21, #1
+	bne	.L1953
+	cbz	w24, .L1953
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbnz	w0, .L1953
+	sub	w0, w24, #1
 	add	w1, w19, w19, lsl 1
 	add	w0, w0, w1
-.L1957:
-	adrp	x20, .LANCHOR31
-	add	x28, x20, :lo12:.LANCHOR31
+.L1980:
+	adrp	x20, .LANCHOR32
+	add	x28, x20, :lo12:.LANCHOR32
 	bl	nandc_set_seed
-	mov	x4, x25
-	mov	x3, x24
+	mov	x4, x23
+	mov	x3, x22
 	ldrb	w2, [x28, 9]
 	mov	w1, 0
-	mov	w0, w22
+	mov	w0, w25
 	bl	nandc_xfer
 	cmn	w0, #1
-	bne	.L1932
-	adrp	x26, .LANCHOR46
-	ldrb	w27, [x26, #:lo12:.LANCHOR46]
-	cbz	w27, .L1933
+	bne	.L1955
+	adrp	x26, .LANCHOR48
+	ldrb	w27, [x26, #:lo12:.LANCHOR48]
+	cbz	w27, .L1956
 	ldrb	w4, [x28, 9]
-	mov	x3, x25
-	strb	wzr, [x26, #:lo12:.LANCHOR46]
-	mov	x2, x24
-	orr	w1, w19, w21, lsl 24
-	mov	w0, w22
+	mov	x3, x23
+	strb	wzr, [x26, #:lo12:.LANCHOR48]
+	mov	x2, x22
+	orr	w1, w19, w24, lsl 24
+	mov	w0, w25
 	bl	flash_read_page
-	strb	w27, [x26, #:lo12:.LANCHOR46]
-	cbnz	w21, .L1934
-.L1939:
+	strb	w27, [x26, #:lo12:.LANCHOR48]
+	cbnz	w24, .L1957
+.L1962:
 	adrp	x1, .LANCHOR0
 	ldrb	w1, [x1, #:lo12:.LANCHOR0]
-	cbz	w1, .L1934
-	adrp	x1, .LANCHOR44
-	ldrb	w1, [x1, #:lo12:.LANCHOR44]
+	cbz	w1, .L1957
+	adrp	x1, .LANCHOR46
+	ldrb	w1, [x1, #:lo12:.LANCHOR46]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	blt	.L1934
-	add	x20, x20, :lo12:.LANCHOR31
+	blt	.L1957
+	add	x20, x20, :lo12:.LANCHOR32
 	ldrb	w1, [x20, 19]
 	sub	w1, w1, #4
 	and	w1, w1, 255
 	cmp	w1, 4
 	mov	w1, 256
 	csel	w0, w0, w1, hi
-.L1927:
+.L1950:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -11524,47 +11860,47 @@ flash_complete_page_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1930:
+.L1953:
 	mov	w0, w19
-	b	.L1957
-.L1934:
+	b	.L1980
+.L1957:
 	cmn	w0, #1
-	bne	.L1927
-.L1940:
-	adrp	x0, .LANCHOR162
-	ldr	x5, [x0, #:lo12:.LANCHOR162]
-	cbnz	x5, .L1936
-.L1938:
-	adrp	x0, .LANCHOR46
+	bne	.L1950
+.L1963:
+	adrp	x0, .LANCHOR165
+	ldr	x5, [x0, #:lo12:.LANCHOR165]
+	cbnz	x5, .L1959
+.L1961:
+	adrp	x0, .LANCHOR48
 	mov	w3, -1
-	mov	w2, w23
+	mov	w2, w21
 	mov	w1, 0
-	ldrb	w4, [x0, #:lo12:.LANCHOR46]
-	adrp	x0, .LC122
-	add	x0, x0, :lo12:.LC122
+	ldrb	w4, [x0, #:lo12:.LANCHOR48]
+	adrp	x0, .LC124
+	add	x0, x0, :lo12:.LC124
 	bl	printf
 	adrp	x0, .LANCHOR21
 	ldrb	w0, [x0, #:lo12:.LANCHOR21]
-	cbnz	w0, .L1937
+	cbnz	w0, .L1960
 	mov	w0, -1
-	b	.L1927
-.L1936:
-	add	x0, x20, :lo12:.LANCHOR31
-	mov	x3, x25
-	mov	x2, x24
-	orr	w1, w19, w21, lsl 24
+	b	.L1950
+.L1959:
+	add	x0, x20, :lo12:.LANCHOR32
+	mov	x3, x23
+	mov	x2, x22
+	orr	w1, w19, w24, lsl 24
 	ldrb	w4, [x0, 9]
-	mov	w0, w22
+	mov	w0, w25
 	blr	x5
 	cmn	w0, #1
-	beq	.L1938
-	b	.L1927
-.L1937:
-	add	x20, x20, :lo12:.LANCHOR31
-	orr	w1, w19, w21, lsl 24
-	mov	x3, x25
-	mov	x2, x24
-	mov	w0, w22
+	beq	.L1961
+	b	.L1950
+.L1960:
+	add	x20, x20, :lo12:.LANCHOR32
+	orr	w1, w19, w24, lsl 24
+	mov	x3, x23
+	mov	x2, x22
+	mov	w0, w25
 	ldrb	w4, [x20, 9]
 	ldp	x21, x22, [sp, 32]
 	ldp	x19, x20, [sp, 16]
@@ -11573,80 +11909,80 @@ flash_complete_page_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	flash_ddr_tuning_read
-.L1932:
-	cbz	w21, .L1939
-	b	.L1927
-.L1933:
-	cbnz	w21, .L1940
-	b	.L1939
+.L1955:
+	cbz	w24, .L1962
+	b	.L1950
+.L1956:
+	cbnz	w24, .L1963
+	b	.L1962
 	.size	flash_complete_page_read, .-flash_complete_page_read
 	.section	.text.queue_wait_first_req_completed,"ax",@progbits
 	.align	2
 	.type	queue_wait_first_req_completed, %function
 queue_wait_first_req_completed:
 	stp	x29, x30, [sp, -96]!
-	adrp	x0, .LANCHOR54
+	adrp	x0, .LANCHOR56
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	ldrb	w0, [x0, #:lo12:.LANCHOR54]
+	ldrb	w0, [x0, #:lo12:.LANCHOR56]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	cmp	w0, 255
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	bne	.L1959
-.L1992:
+	bne	.L1982
+.L2015:
 	mov	w21, 0
-	b	.L1958
-.L1959:
-	adrp	x19, .LANCHOR50
+	b	.L1981
+.L1982:
+	adrp	x19, .LANCHOR52
 	sxtw	x20, w0
-	add	x1, x19, :lo12:.LANCHOR50
+	add	x1, x19, :lo12:.LANCHOR52
 	add	x1, x1, x20, lsl 6
 	ldrb	w2, [x1, 58]
 	ldr	w21, [x1, 40]
 	sub	w3, w2, #1
 	cmp	w3, 10
-	bhi	.L1992
-	adrp	x1, .L1962
-	add	x1, x1, :lo12:.L1962
+	bhi	.L2015
+	adrp	x1, .L1985
+	add	x1, x1, :lo12:.L1985
 	ldrh	w1, [x1,w3,uxtw #1]
-	adr	x3, .Lrtx1962
+	adr	x3, .Lrtx1985
 	add	x1, x3, w1, sxth #2
 	br	x1
-.Lrtx1962:
+.Lrtx1985:
 	.section	.rodata.queue_wait_first_req_completed,"a",@progbits
 	.align	0
 	.align	2
-.L1962:
-	.2byte	(.L1961 - .Lrtx1962) / 4
-	.2byte	(.L1963 - .Lrtx1962) / 4
-	.2byte	(.L1964 - .Lrtx1962) / 4
-	.2byte	(.L1964 - .Lrtx1962) / 4
-	.2byte	(.L1964 - .Lrtx1962) / 4
-	.2byte	(.L1964 - .Lrtx1962) / 4
-	.2byte	(.L1965 - .Lrtx1962) / 4
-	.2byte	(.L1966 - .Lrtx1962) / 4
-	.2byte	(.L1967 - .Lrtx1962) / 4
-	.2byte	(.L1964 - .Lrtx1962) / 4
-	.2byte	(.L1967 - .Lrtx1962) / 4
+.L1985:
+	.2byte	(.L1984 - .Lrtx1985) / 4
+	.2byte	(.L1986 - .Lrtx1985) / 4
+	.2byte	(.L1987 - .Lrtx1985) / 4
+	.2byte	(.L1987 - .Lrtx1985) / 4
+	.2byte	(.L1987 - .Lrtx1985) / 4
+	.2byte	(.L1987 - .Lrtx1985) / 4
+	.2byte	(.L1988 - .Lrtx1985) / 4
+	.2byte	(.L1989 - .Lrtx1985) / 4
+	.2byte	(.L1990 - .Lrtx1985) / 4
+	.2byte	(.L1987 - .Lrtx1985) / 4
+	.2byte	(.L1990 - .Lrtx1985) / 4
 	.section	.text.queue_wait_first_req_completed
-.L1961:
+.L1984:
 	mov	w1, 64
 	mov	w0, w21
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1992
-	add	x0, x19, :lo12:.LANCHOR50
+	tbz	x0, 6, .L2015
+	add	x0, x19, :lo12:.LANCHOR52
 	add	x0, x0, x20, lsl 6
 	ldp	x1, x2, [x0, 8]
-	cbz	x2, .L1969
+	cbz	x2, .L1992
 	ldrb	w3, [x0, 56]
-	adrp	x0, .LANCHOR123
-	ldrb	w0, [x0, #:lo12:.LANCHOR123]
+	adrp	x0, .LANCHOR125
+	ldrb	w0, [x0, #:lo12:.LANCHOR125]
 	cmp	w3, w0
 	csel	x1, x1, x2, ne
-.L1969:
-	add	x19, x19, :lo12:.LANCHOR50
+.L1992:
+	add	x19, x19, :lo12:.LANCHOR52
 	mov	w0, w21
 	add	x20, x19, x20, lsl 6
 	ldr	x2, [x20, 24]
@@ -11657,37 +11993,37 @@ queue_wait_first_req_completed:
 	ldrb	w0, [x20, 2]
 	orr	w0, w0, 8
 	strb	w0, [x20, 2]
-	b	.L1992
-.L1963:
+	b	.L2015
+.L1986:
 	mov	w1, 64
 	mov	w0, w21
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1992
-	add	x0, x19, :lo12:.LANCHOR50
+	tbz	x0, 6, .L2015
+	add	x0, x19, :lo12:.LANCHOR52
 	lsl	x2, x20, 6
 	add	x1, x0, x2
 	ldrb	w21, [x0, x2]
 	add	x0, x0, x21, lsl 6
 	ldr	x24, [x0, 8]
 	ldp	x26, x0, [x1, 8]
-	cbz	x0, .L1970
+	cbz	x0, .L1993
 	ldrb	w2, [x1, 56]
-	adrp	x1, .LANCHOR123
-	ldrb	w1, [x1, #:lo12:.LANCHOR123]
+	adrp	x1, .LANCHOR125
+	ldrb	w1, [x1, #:lo12:.LANCHOR125]
 	cmp	w2, w1
 	csel	x26, x26, x0, ne
-.L1970:
-	add	x0, x19, :lo12:.LANCHOR50
+.L1993:
+	add	x0, x19, :lo12:.LANCHOR52
 	add	x0, x0, x21, lsl 6
 	ldr	x1, [x0, 16]
-	cbz	x1, .L1971
+	cbz	x1, .L1994
 	ldrb	w2, [x0, 56]
-	adrp	x0, .LANCHOR123
-	ldrb	w0, [x0, #:lo12:.LANCHOR123]
+	adrp	x0, .LANCHOR125
+	ldrb	w0, [x0, #:lo12:.LANCHOR125]
 	cmp	w2, w0
 	csel	x24, x24, x1, ne
-.L1971:
-	add	x22, x19, :lo12:.LANCHOR50
+.L1994:
+	add	x22, x19, :lo12:.LANCHOR52
 	mov	x1, x26
 	add	x27, x22, x20, lsl 6
 	add	x22, x22, x21, lsl 6
@@ -11701,59 +12037,68 @@ queue_wait_first_req_completed:
 	bl	flash_complete_plane_page_read
 	mov	w25, w0
 	cmn	w23, #1
-	beq	.L1972
+	beq	.L1995
 	ldr	w0, [x27, 36]
 	cmn	w0, #1
-	beq	.L1973
+	beq	.L1996
 	ldr	x1, [x27, 24]
 	ldr	w1, [x1, 4]
 	cmp	w0, w1
-	beq	.L1973
-.L1972:
-	add	x22, x19, :lo12:.LANCHOR50
-	adrp	x2, .LANCHOR123
+	beq	.L1996
+.L1995:
+	adrp	x0, .LANCHOR31
+	add	x22, x19, :lo12:.LANCHOR52
 	add	x22, x22, x20, lsl 6
-	ldrb	w4, [x2, #:lo12:.LANCHOR123]
-	mov	x2, x26
+	mov	w5, 1
+	ldrb	w2, [x0, #:lo12:.LANCHOR31]
+	mov	w0, 24
+	sub	w0, w0, w2
 	ldr	x3, [x22, 24]
+	lsl	w5, w5, w2
+	adrp	x2, .LANCHOR125
+	sub	w5, w5, #1
 	ldr	w1, [x22, 40]
-	ubfx	x0, x1, 21, 3
-	and	w1, w1, -14680065
+	ldrb	w4, [x2, #:lo12:.LANCHOR125]
+	mov	x2, x26
+	lsl	w6, w5, w0
+	lsr	w0, w1, w0
+	bic	w1, w1, w6
+	and	w0, w0, w5
 	bl	flash_read_page_en
 	mov	w23, w0
 	ldr	w2, [x22, 36]
 	cmn	w2, #1
-	beq	.L1974
+	beq	.L1997
 	ldr	x0, [x22, 24]
 	ldr	w4, [x0, 4]
 	cmp	w2, w4
-	beq	.L1974
+	beq	.L1997
 	adrp	x1, .LANCHOR14
 	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 6, .L1974
+	tbz	x1, 6, .L1997
 	ldr	w3, [x0]
-	adrp	x0, .LC123
+	adrp	x0, .LC125
 	ldr	w1, [x22, 40]
-	add	x0, x0, :lo12:.LC123
+	add	x0, x0, :lo12:.LC125
 	bl	printf
-.L1974:
-	add	x0, x19, :lo12:.LANCHOR50
+.L1997:
+	add	x0, x19, :lo12:.LANCHOR52
 	add	x0, x0, x20, lsl 6
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L1973
+	beq	.L1996
 	ldr	x0, [x0, 24]
 	ldr	w0, [x0, 4]
 	cmp	w1, w0
-	beq	.L1973
-	adrp	x1, .LANCHOR167
+	beq	.L1996
+	adrp	x1, .LANCHOR170
 	adrp	x0, .LC0
 	mov	w2, 360
-	add	x1, x1, :lo12:.LANCHOR167
+	add	x1, x1, :lo12:.LANCHOR170
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1973:
-	add	x0, x19, :lo12:.LANCHOR50
+.L1996:
+	add	x0, x19, :lo12:.LANCHOR52
 	mov	w1, 13
 	add	x20, x0, x20, lsl 6
 	cmn	w25, #1
@@ -11762,59 +12107,68 @@ queue_wait_first_req_completed:
 	str	w23, [x20, 52]
 	orr	w1, w1, 8
 	strb	w1, [x20, 2]
-	beq	.L1975
+	beq	.L1998
 	add	x0, x0, x21, lsl 6
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L1977
+	beq	.L2000
 	ldr	x0, [x0, 24]
 	ldr	w0, [x0, 4]
 	cmp	w1, w0
-	beq	.L1977
-.L1975:
-	add	x20, x19, :lo12:.LANCHOR50
-	adrp	x2, .LANCHOR123
+	beq	.L2000
+.L1998:
+	adrp	x0, .LANCHOR31
+	add	x20, x19, :lo12:.LANCHOR52
 	add	x20, x20, x21, lsl 6
-	ldrb	w4, [x2, #:lo12:.LANCHOR123]
-	mov	x2, x24
+	mov	w5, 1
+	ldrb	w2, [x0, #:lo12:.LANCHOR31]
+	mov	w0, 24
+	sub	w0, w0, w2
 	ldr	x3, [x20, 24]
+	lsl	w5, w5, w2
+	adrp	x2, .LANCHOR125
+	sub	w5, w5, #1
 	ldr	w1, [x20, 40]
-	ubfx	x0, x1, 21, 3
-	and	w1, w1, -14680065
+	ldrb	w4, [x2, #:lo12:.LANCHOR125]
+	mov	x2, x24
+	lsl	w6, w5, w0
+	lsr	w0, w1, w0
+	bic	w1, w1, w6
+	and	w0, w0, w5
 	bl	flash_read_page_en
 	ldr	w2, [x20, 36]
 	cmn	w2, #1
-	beq	.L1979
+	beq	.L2002
 	ldr	x0, [x20, 24]
 	ldr	w4, [x0, 4]
 	cmp	w2, w4
-	beq	.L1979
+	beq	.L2002
 	adrp	x1, .LANCHOR14
 	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 6, .L1979
+	tbz	x1, 6, .L2002
 	ldr	w3, [x0]
-	adrp	x0, .LC123
+	adrp	x0, .LC125
 	ldr	w1, [x20, 40]
-	add	x0, x0, :lo12:.LC123
+	add	x0, x0, :lo12:.LC125
 	bl	printf
-.L1979:
-	add	x0, x19, :lo12:.LANCHOR50
+.L2002:
+	add	x0, x19, :lo12:.LANCHOR52
 	add	x0, x0, x21, lsl 6
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L1977
+	beq	.L2000
 	ldr	x0, [x0, 24]
 	ldr	w0, [x0, 4]
 	cmp	w1, w0
-	beq	.L1977
-	adrp	x1, .LANCHOR167
+	beq	.L2000
+	adrp	x1, .LANCHOR170
 	adrp	x0, .LC0
 	mov	w2, 375
-	add	x1, x1, :lo12:.LANCHOR167
+	add	x1, x1, :lo12:.LANCHOR170
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1977:
-	add	x19, x19, :lo12:.LANCHOR50
+.L2000:
+	add	x19, x19, :lo12:.LANCHOR52
 	mov	w0, 13
 	add	x21, x19, x21, lsl 6
 	strb	w0, [x21, 58]
@@ -11822,17 +12176,17 @@ queue_wait_first_req_completed:
 	str	w23, [x21, 52]
 	orr	w0, w0, 8
 	strb	w0, [x21, 2]
-	b	.L1992
-.L1964:
+	b	.L2015
+.L1987:
 	mov	w0, w21
 	mov	w1, 64
 	bl	flash_wait_device_ready
 	mov	w21, w0
-	tbz	x21, 6, .L1992
+	tbz	x21, 6, .L2015
 	mov	w0, 5
 	tst	w21, w0
-	beq	.L1980
-	add	x19, x19, :lo12:.LANCHOR50
+	beq	.L2003
+	add	x19, x19, :lo12:.LANCHOR52
 	mov	w0, 12
 	add	x20, x19, x20, lsl 6
 	mov	w4, 12
@@ -11840,103 +12194,123 @@ queue_wait_first_req_completed:
 	ldrb	w1, [x20, 1]
 	ldr	w3, [x20, 40]
 	strb	w0, [x20, 58]
-	adrp	x0, .LC124
-	add	x0, x0, :lo12:.LC124
+	adrp	x0, .LC126
+	add	x0, x0, :lo12:.LC126
 	bl	printf
-.L2056:
+.L2079:
 	mov	w0, -1
 	str	w0, [x20, 52]
-	b	.L1958
-.L1980:
-	add	x21, x19, :lo12:.LANCHOR50
+	b	.L1981
+.L2003:
+	add	x21, x19, :lo12:.LANCHOR52
 	mov	w0, 13
 	add	x21, x21, x20, lsl 6
 	strb	w0, [x21, 58]
-	adrp	x0, .LANCHOR102
-	ldr	x0, [x0, #:lo12:.LANCHOR102]
+	adrp	x0, .LANCHOR104
+	ldr	x0, [x0, #:lo12:.LANCHOR104]
 	ldr	w1, [x0, 156]
 	mov	w0, 20041
 	str	wzr, [x21, 52]
 	movk	w0, 0x444b, lsl 16
 	cmp	w1, w0
-	bne	.L1992
+	bne	.L2015
 	ldrh	w0, [x21, 50]
-	cbnz	w0, .L1992
-	adrp	x2, .LANCHOR123
-	adrp	x22, .LANCHOR163
+	cbnz	w0, .L2015
+	adrp	x0, .LANCHOR31
+	mov	w5, 1
+	adrp	x22, .LANCHOR166
 	ldr	w1, [x21, 40]
-	ldrb	w4, [x2, #:lo12:.LANCHOR123]
-	adrp	x2, .LANCHOR164
-	ldr	x3, [x22, #:lo12:.LANCHOR163]
-	ldr	x2, [x2, #:lo12:.LANCHOR164]
-	ubfx	x0, x1, 21, 3
-	and	w1, w1, -14680065
+	ldrb	w2, [x0, #:lo12:.LANCHOR31]
+	mov	w0, 24
+	ldr	x3, [x22, #:lo12:.LANCHOR166]
+	sub	w0, w0, w2
+	lsl	w5, w5, w2
+	adrp	x2, .LANCHOR125
+	sub	w5, w5, #1
+	ldrb	w4, [x2, #:lo12:.LANCHOR125]
+	adrp	x2, .LANCHOR167
+	lsl	w6, w5, w0
+	ldr	x2, [x2, #:lo12:.LANCHOR167]
+	lsr	w0, w1, w0
+	bic	w1, w1, w6
+	and	w0, w0, w5
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L1981
-	ldr	x1, [x22, #:lo12:.LANCHOR163]
+	beq	.L2004
+	ldr	x1, [x22, #:lo12:.LANCHOR166]
 	ldr	x2, [x21, 24]
 	ldr	w1, [x1]
 	ldr	w2, [x2]
 	cmp	w2, w1
-	beq	.L1992
-.L1981:
-	add	x19, x19, :lo12:.LANCHOR50
-	adrp	x1, .LANCHOR46
+	beq	.L2015
+.L2004:
+	add	x19, x19, :lo12:.LANCHOR52
+	adrp	x1, .LANCHOR48
 	add	x20, x19, x20, lsl 6
 	mov	w3, w0
-	ldrb	w4, [x1, #:lo12:.LANCHOR46]
-	adrp	x0, .LC125
-	add	x0, x0, :lo12:.LC125
+	ldrb	w4, [x1, #:lo12:.LANCHOR48]
+	adrp	x0, .LC127
+	add	x0, x0, :lo12:.LC127
 	ldrb	w1, [x20, 1]
 	ldr	w2, [x20, 40]
 	bl	printf
 	mov	w0, -1
 	str	w0, [x20, 52]
-	b	.L1992
-.L1967:
+	b	.L2015
+.L1990:
 	cmp	w2, 11
-	add	x22, x19, :lo12:.LANCHOR50
-	ubfiz	x0, x0, 6, 8
 	mov	w1, 3
-	mov	w2, 10
+	mov	w5, 10
+	csel	w5, w5, w1, eq
+	adrp	x1, .LANCHOR31
+	mov	w4, 24
+	mov	w2, 1
+	add	x22, x19, :lo12:.LANCHOR52
+	ldrb	w3, [x1, #:lo12:.LANCHOR31]
+	ubfiz	x0, x0, 6, 8
 	add	x0, x22, x0
-	csel	w2, w2, w1, eq
-	ubfx	x3, x21, 21, 3
-.L1983:
+	mov	x24, x1
+	sub	w4, w4, w3
+	lsl	w2, w2, w3
+	sub	w2, w2, #1
+	lsr	w3, w21, w4
+	and	w3, w3, w2
+	and	w3, w3, 65535
+.L2006:
 	ldrb	w1, [x0]
 	cmp	w1, 255
-	bne	.L1990
+	bne	.L2013
 	mov	w21, -1
-	b	.L1958
-.L1990:
+	b	.L1981
+.L2013:
 	sxtw	x23, w1
 	ubfiz	x0, x1, 6, 8
 	add	x1, x22, x23, lsl 6
 	add	x0, x22, x0
-	ldrb	w4, [x1, 58]
-	cmp	w4, w2
-	bne	.L1983
+	ldrb	w6, [x1, 58]
+	cmp	w6, w5
+	bne	.L2006
 	ldr	w1, [x1, 40]
-	ubfx	x1, x1, 21, 3
+	lsr	w1, w1, w4
+	and	w1, w1, w2
 	cmp	w3, w1
-	bne	.L1983
+	bne	.L2006
 	mov	w0, w21
 	mov	w1, 64
 	bl	flash_wait_device_ready
 	mov	w21, w0
-	tbnz	x21, 6, .L1985
-.L2055:
+	tbnz	x21, 6, .L2008
+.L2078:
 	mov	w21, 0
-	b	.L1986
-.L1985:
+	b	.L2009
+.L2008:
 	tst	x21, 15
-	beq	.L1987
+	beq	.L2010
 	add	x22, x22, x20, lsl 6
 	mov	w2, w0
 	mov	w4, 12
-	adrp	x0, .LC126
-	add	x0, x0, :lo12:.LC126
+	adrp	x0, .LC128
+	add	x0, x0, :lo12:.LC128
 	ldrb	w1, [x22, 1]
 	ldr	w3, [x22, 40]
 	bl	printf
@@ -11944,15 +12318,15 @@ queue_wait_first_req_completed:
 	strb	w0, [x22, 58]
 	mov	w0, -1
 	str	w0, [x22, 52]
-.L1986:
-	add	x1, x19, :lo12:.LANCHOR50
+.L2009:
+	add	x1, x19, :lo12:.LANCHOR52
 	add	x20, x1, x20, lsl 6
 	add	x1, x1, x23, lsl 6
 	ldrb	w0, [x20, 58]
 	strb	w0, [x1, 58]
 	ldr	w0, [x20, 52]
 	str	w0, [x1, 52]
-.L1958:
+.L1981:
 	mov	w0, w21
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -11961,81 +12335,89 @@ queue_wait_first_req_completed:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1987:
+.L2010:
 	add	x21, x22, x20, lsl 6
 	mov	w0, 13
 	strb	w0, [x21, 58]
-	adrp	x0, .LANCHOR102
-	ldr	x0, [x0, #:lo12:.LANCHOR102]
+	adrp	x0, .LANCHOR104
+	ldr	x0, [x0, #:lo12:.LANCHOR104]
 	ldr	w1, [x0, 156]
 	mov	w0, 20041
 	str	wzr, [x21, 52]
 	movk	w0, 0x444b, lsl 16
 	cmp	w1, w0
-	bne	.L2055
+	bne	.L2078
 	ldrh	w0, [x21, 50]
-	cbnz	w0, .L2055
-	adrp	x2, .LANCHOR123
-	adrp	x22, .LANCHOR163
+	cbnz	w0, .L2078
+	ldrb	w2, [x24, #:lo12:.LANCHOR31]
+	mov	w5, 1
+	mov	w0, 24
+	adrp	x22, .LANCHOR166
+	sub	w0, w0, w2
 	ldr	w1, [x21, 40]
-	ldrb	w4, [x2, #:lo12:.LANCHOR123]
-	adrp	x2, .LANCHOR164
-	ldr	x3, [x22, #:lo12:.LANCHOR163]
-	ldr	x2, [x2, #:lo12:.LANCHOR164]
-	ubfx	x0, x1, 21, 3
-	and	w1, w1, -14680065
+	lsl	w5, w5, w2
+	adrp	x2, .LANCHOR125
+	sub	w5, w5, #1
+	ldr	x3, [x22, #:lo12:.LANCHOR166]
+	ldrb	w4, [x2, #:lo12:.LANCHOR125]
+	adrp	x2, .LANCHOR167
+	lsl	w6, w5, w0
+	ldr	x2, [x2, #:lo12:.LANCHOR167]
+	lsr	w0, w1, w0
+	bic	w1, w1, w6
+	and	w0, w0, w5
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L1989
-	ldr	x1, [x22, #:lo12:.LANCHOR163]
+	beq	.L2012
+	ldr	x1, [x22, #:lo12:.LANCHOR166]
 	ldr	x2, [x21, 24]
 	ldr	w1, [x1]
 	ldr	w2, [x2]
 	cmp	w2, w1
-	beq	.L2055
-.L1989:
-	add	x21, x19, :lo12:.LANCHOR50
-	adrp	x1, .LANCHOR46
+	beq	.L2078
+.L2012:
+	add	x21, x19, :lo12:.LANCHOR52
+	adrp	x1, .LANCHOR48
 	add	x21, x21, x20, lsl 6
 	mov	w3, w0
-	ldrb	w4, [x1, #:lo12:.LANCHOR46]
-	adrp	x0, .LC127
-	add	x0, x0, :lo12:.LC127
+	ldrb	w4, [x1, #:lo12:.LANCHOR48]
+	adrp	x0, .LC129
+	add	x0, x0, :lo12:.LC129
 	ldrb	w1, [x21, 1]
 	ldr	w2, [x21, 40]
 	bl	printf
 	mov	w0, -1
 	str	w0, [x21, 52]
-	b	.L2055
-.L1965:
+	b	.L2078
+.L1988:
 	mov	w0, w21
 	mov	w1, 32
 	bl	flash_wait_device_ready
 	mov	w21, w0
-	tbz	x21, 5, .L1992
-	add	x19, x19, :lo12:.LANCHOR50
+	tbz	x21, 5, .L2015
+	add	x19, x19, :lo12:.LANCHOR52
 	tst	x21, 15
 	add	x20, x19, x20, lsl 6
-	beq	.L1991
+	beq	.L2014
 	mov	w0, 12
 	strb	w0, [x20, 58]
-	b	.L2056
-.L1991:
+	b	.L2079
+.L2014:
 	mov	w0, 13
 	str	wzr, [x20, 52]
 	strb	w0, [x20, 58]
-	b	.L1992
-.L1966:
+	b	.L2015
+.L1989:
 	mov	w1, 64
 	mov	w0, w21
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1992
-	add	x19, x19, :lo12:.LANCHOR50
+	tbz	x0, 6, .L2015
+	add	x19, x19, :lo12:.LANCHOR52
 	add	x19, x19, x20, lsl 6
 	str	w0, [x19, 52]
 	mov	w0, 7
 	strb	w0, [x19, 58]
-	b	.L1992
+	b	.L2015
 	.size	queue_wait_first_req_completed, .-queue_wait_first_req_completed
 	.section	.text.sblk_wait_write_queue_completed,"ax",@progbits
 	.align	2
@@ -12045,19 +12427,19 @@ sblk_wait_write_queue_completed:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR54
-	add	x19, x19, :lo12:.LANCHOR54
-.L2058:
+	adrp	x19, .LANCHOR56
+	add	x19, x19, :lo12:.LANCHOR56
+.L2081:
 	ldrb	w0, [x19]
 	cmp	w0, 255
-	bne	.L2059
+	bne	.L2082
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2059:
+.L2082:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2058
+	b	.L2081
 	.size	sblk_wait_write_queue_completed, .-sblk_wait_write_queue_completed
 	.section	.text.ftl_read_page,"ax",@progbits
 	.align	2
@@ -12091,23 +12473,35 @@ ftl_read_page:
 	.global	ftl_read_ppa_page
 	.type	ftl_read_ppa_page, %function
 ftl_read_ppa_page:
-	stp	x29, x30, [sp, -48]!
+	stp	x29, x30, [sp, -64]!
+	mov	w5, 1
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	mov	w19, w0
+	mov	w20, w0
+	adrp	x0, .LANCHOR31
+	mov	w19, 24
 	stp	x21, x22, [sp, 32]
-	mov	x20, x1
-	mov	x21, x2
-	mov	w22, w3
+	mov	x21, x1
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	mov	x22, x2
+	str	x23, [sp, 48]
+	mov	w23, w3
+	sub	w19, w19, w0
+	lsl	w5, w5, w0
+	sub	w5, w5, #1
+	lsr	w19, w20, w19
+	and	w19, w19, w5
+	and	w19, w19, 255
 	bl	sblk_wait_write_queue_completed
-	ubfx	x0, x19, 21, 3
-	mov	w4, w22
-	mov	x3, x21
-	mov	x2, x20
-	mov	w1, w19
-	ldp	x21, x22, [sp, 32]
+	mov	w4, w23
+	mov	x3, x22
+	mov	x2, x21
+	mov	w1, w20
+	mov	w0, w19
+	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
 	b	flash_read_page_en
 	.size	ftl_read_ppa_page, .-ftl_read_ppa_page
 	.section	.text.sblk_read_page,"ax",@progbits
@@ -12119,25 +12513,24 @@ sblk_read_page:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	and	w22, w1, 255
+	stp	x27, x28, [sp, 80]
+	mov	w21, w22
 	stp	x19, x20, [sp, 16]
-	adrp	x21, .LANCHOR50
+	adrp	x27, .LANCHOR31
 	stp	x23, x24, [sp, 48]
 	mov	x19, x0
 	stp	x25, x26, [sp, 64]
 	mov	x23, x0
-	adrp	x26, .LANCHOR168
-	mov	w20, w22
-	add	x26, x26, :lo12:.LANCHOR168
-	add	x21, x21, :lo12:.LANCHOR50
-	stp	x27, x28, [sp, 80]
-	adrp	x27, .LANCHOR103
-.L2066:
-	cbnz	w20, .L2076
+	adrp	x25, .LANCHOR171
+	add	x28, x27, :lo12:.LANCHOR31
+	add	x25, x25, :lo12:.LANCHOR171
 .L2089:
-	adrp	x19, .LANCHOR50
-	add	x19, x19, :lo12:.LANCHOR50
-.L2077:
-	cbnz	w22, .L2079
+	cbnz	w21, .L2099
+.L2112:
+	adrp	x19, .LANCHOR52
+	add	x19, x19, :lo12:.LANCHOR52
+.L2100:
+	cbnz	w22, .L2102
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -12146,96 +12539,117 @@ sblk_read_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2076:
+.L2099:
 	ldrb	w24, [x19]
-	ldr	w25, [x19, 40]
-.L2067:
+	ldr	w26, [x19, 40]
+.L2090:
 	mov	w1, 0
-	mov	w0, w25
+	mov	w0, w26
 	bl	queue_lun_state
-	cbnz	w0, .L2068
-	cmp	w20, 1
-	beq	.L2073
-	ldrb	w0, [x26]
-	cbnz	w0, .L2070
-.L2073:
+	cbnz	w0, .L2091
+	cmp	w21, 1
+	beq	.L2096
+	ldrb	w0, [x25]
+	cbnz	w0, .L2093
+.L2096:
 	mov	x0, x19
 	bl	queue_read_cmd
-	b	.L2071
-.L2068:
+	b	.L2094
+.L2091:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2067
-.L2070:
+	b	.L2090
+.L2093:
+	ldrb	w1, [x27, #:lo12:.LANCHOR31]
+	mov	w20, 24
+	mov	w0, 1
+	sub	w20, w20, w1
+	lsl	w0, w0, w1
+	sub	w0, w0, #1
+	lsr	w20, w26, w20
+	and	w20, w20, w0
 	ldrb	w0, [x19]
-	ubfx	x4, x25, 21, 3
+	and	w20, w20, 65535
 	cmp	w0, 255
-	bne	.L2072
-	str	w4, [x29, 124]
-	mov	w2, 661
-	adrp	x1, .LANCHOR169
+	bne	.L2095
+	adrp	x1, .LANCHOR172
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR169
+	mov	w2, 661
+	add	x1, x1, :lo12:.LANCHOR172
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	ldr	w4, [x29, 124]
-.L2072:
-	ldrb	w28, [x19]
-	sbfiz	x2, x28, 6, 32
-	add	x3, x21, x2
-	ldr	w1, [x3, 40]
-	ubfx	x0, x1, 21, 3
-	cmp	w4, w0
-	bne	.L2073
-	ldrh	w0, [x27, #:lo12:.LANCHOR103]
-	add	w25, w0, w25
-	cmp	w1, w25
-	bne	.L2073
+.L2095:
+	ldrb	w4, [x19]
+	adrp	x2, .LANCHOR52
+	add	x2, x2, :lo12:.LANCHOR52
+	ldrb	w7, [x28]
+	mov	w0, 24
+	mov	w3, 1
+	sbfiz	x5, x4, 6, 32
+	sub	w0, w0, w7
+	add	x6, x2, x5
+	lsl	w3, w3, w7
+	sub	w3, w3, #1
+	ldr	w1, [x6, 40]
+	lsr	w0, w1, w0
+	and	w0, w0, w3
+	cmp	w20, w0, uxth
+	bne	.L2096
+	adrp	x0, .LANCHOR105
+	ldrh	w0, [x0, #:lo12:.LANCHOR105]
+	add	w26, w0, w26
+	cmp	w1, w26
+	bne	.L2096
 	ldr	w0, [x19, 40]
-	adrp	x25, .LANCHOR54
-	ldrb	w24, [x21, x2]
-	add	x25, x25, :lo12:.LANCHOR54
-	stp	x3, x2, [x29, 104]
-	sub	w20, w20, #1
+	mov	w26, -1
+	ldrb	w24, [x2, x5]
+	adrp	x20, .LANCHOR56
+	stp	x6, x5, [x29, 96]
+	add	x20, x20, :lo12:.LANCHOR56
+	str	x2, [x29, 112]
+	sub	w21, w21, #1
+	str	w4, [x29, 120]
 	bl	flash_start_plane_read
+	mov	w3, 2
 	strb	wzr, [x19, 59]
-	mov	w5, 2
-	mov	w4, -1
-	strb	w5, [x19, 58]
+	strb	w3, [x19, 58]
 	mov	x1, x19
-	strb	w4, [x19]
-	mov	x0, x25
-	stp	w5, w4, [x29, 120]
+	strb	w26, [x19]
+	mov	x0, x20
+	str	w3, [x29, 124]
 	bl	buf_add_tail
-	ldp	x3, x2, [x29, 104]
-	strb	wzr, [x3, 59]
-	ldp	w5, w4, [x29, 120]
-	strb	w5, [x3, 58]
-	ubfiz	x1, x28, 6, 8
-	mov	x0, x25
-	add	x1, x21, x1
-	strb	w4, [x21, x2]
+	ldp	x6, x5, [x29, 96]
+	strb	wzr, [x6, 59]
+	ldr	x2, [x29, 112]
+	mov	x0, x20
+	ldp	w4, w3, [x29, 120]
+	strb	w3, [x6, 58]
+	strb	w26, [x2, x5]
+	ubfiz	x1, x4, 6, 8
+	add	x1, x2, x1
 	bl	buf_add_tail
-.L2071:
-	subs	w20, w20, #1
-	beq	.L2089
-	ubfiz	x19, x24, 6, 8
-	add	x19, x21, x19
-	b	.L2066
-.L2079:
+.L2094:
+	subs	w21, w21, #1
+	beq	.L2112
+	ubfiz	x24, x24, 6, 8
+	adrp	x19, .LANCHOR52
+	add	x19, x19, :lo12:.LANCHOR52
+	add	x19, x19, x24
+	b	.L2089
+.L2102:
 	ldrb	w0, [x23, 58]
 	cmp	w0, 13
-	bne	.L2078
+	bne	.L2101
 	ldrb	w0, [x23]
 	sub	w22, w22, #1
 	cmp	w0, 255
-	beq	.L2078
+	beq	.L2101
 	ubfiz	x23, x0, 6, 8
 	add	x23, x19, x23
-.L2078:
+.L2101:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2077
+	b	.L2100
 	.size	sblk_read_page, .-sblk_read_page
 	.section	.text.flash_prog_page,"ax",@progbits
 	.align	2
@@ -12244,75 +12658,84 @@ sblk_read_page:
 flash_prog_page:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	and	w20, w0, 255
+	stp	x21, x22, [sp, 32]
+	and	w21, w0, 255
 	adrp	x0, .LANCHOR13
+	stp	x25, x26, [sp, 64]
+	stp	x19, x20, [sp, 16]
+	mov	w20, 24
+	ldr	x26, [x0, #:lo12:.LANCHOR13]
+	adrp	x0, .LANCHOR31
 	stp	x23, x24, [sp, 48]
-	stp	x21, x22, [sp, 32]
-	and	x19, x20, 255
-	ldr	x24, [x0, #:lo12:.LANCHOR13]
+	mov	w22, w1
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	and	x19, x21, 255
+	str	x27, [sp, 80]
+	add	x23, x19, 8
+	sub	w0, w20, w0
+	mov	w20, 1
+	mov	x24, x2
+	mov	x25, x3
+	lsl	w20, w20, w0
 	adrp	x0, .LANCHOR14
-	stp	x25, x26, [sp, 64]
-	mov	w21, w1
+	sub	w20, w20, #1
+	add	x23, x26, x23, lsl 8
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	add	x22, x19, 8
-	str	x27, [sp, 80]
-	mov	x26, x2
-	add	x22, x24, x22, lsl 8
-	and	w23, w1, 2097151
-	ubfx	x25, x21, 24, 2
-	mov	x27, x3
-	tbz	x0, 4, .L2092
-	adrp	x0, .LC128
+	and	w20, w20, w1
+	ubfx	x27, x22, 24, 2
+	tbz	x0, 4, .L2115
+	adrp	x0, .LC130
 	mov	w3, w4
-	mov	w2, w25
-	add	x0, x0, :lo12:.LC128
+	mov	w2, w27
+	add	x0, x0, :lo12:.LC130
 	bl	printf
-.L2092:
+.L2115:
 	bl	nandc_wait_flash_ready
-	mov	w0, w20
+	mov	w0, w21
 	bl	hynix_reconfig_rr_para
-	mov	w0, w20
+	mov	w0, w21
 	bl	nandc_cs
-	mov	w0, w20
-	cbnz	w25, .L2093
+	mov	w0, w21
+	cbnz	w27, .L2116
 	bl	zftl_flash_enter_slc_mode
-.L2094:
-	add	x19, x24, x19, lsl 8
+.L2117:
+	add	x19, x26, x19, lsl 8
 	mov	w0, 128
 	str	w0, [x19, 2056]
-	and	w0, w21, 255
+	and	w0, w20, 255
 	str	wzr, [x19, 2052]
 	str	wzr, [x19, 2052]
 	str	w0, [x19, 2052]
-	lsr	w0, w23, 8
+	lsr	w0, w20, 8
 	str	w0, [x19, 2052]
-	lsr	w0, w23, 16
+	lsr	w0, w20, 16
 	str	w0, [x19, 2052]
-	mov	w0, w23
+	mov	w0, w20
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR31+9
-	mov	x3, x27
-	mov	x2, x26
-	ldrb	w1, [x0, #:lo12:.LANCHOR31+9]
+	adrp	x0, .LANCHOR32+9
+	mov	x3, x25
+	mov	x2, x24
+	ldrb	w1, [x0, #:lo12:.LANCHOR32+9]
 	mov	w0, 1
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
+	mov	x0, 200
+	bl	udelay
 	mov	w0, 16
 	str	w0, [x19, 2056]
 	bl	nandc_wait_flash_ready
-	mov	x0, x22
+	mov	x0, x23
 	bl	flash_read_status
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.29
+	bl	nandc_de_cs.constprop.30
 	and	w19, w2, 4
-	tbz	x2, 2, .L2091
-	adrp	x0, .LC129
+	tbz	x2, 2, .L2114
+	adrp	x0, .LC131
 	mov	w2, w19
-	mov	w1, w21
-	add	x0, x0, :lo12:.LC129
+	mov	w1, w22
+	add	x0, x0, :lo12:.LC131
 	bl	printf
-.L2091:
+.L2114:
 	mov	w0, w19
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -12321,9 +12744,9 @@ flash_prog_page:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2093:
+.L2116:
 	bl	zftl_flash_exit_slc_mode
-	b	.L2094
+	b	.L2117
 	.size	flash_prog_page, .-flash_prog_page
 	.section	.text.flash_test_blk,"ax",@progbits
 	.align	2
@@ -12334,16 +12757,16 @@ flash_test_blk:
 	mov	w2, 32
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR156
+	adrp	x22, .LANCHOR159
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 255
-	ldr	x0, [x22, #:lo12:.LANCHOR156]
-	adrp	x21, .LANCHOR158
+	ldr	x0, [x22, #:lo12:.LANCHOR159]
+	adrp	x21, .LANCHOR161
 	and	w19, w1, 65535
 	str	x23, [sp, 48]
 	mov	w1, 165
 	bl	ftl_memset
-	ldr	x0, [x21, #:lo12:.LANCHOR158]
+	ldr	x0, [x21, #:lo12:.LANCHOR161]
 	mov	w2, 8
 	mov	w1, 90
 	bl	ftl_memset
@@ -12354,10 +12777,10 @@ flash_test_blk:
 	mov	w1, w19
 	bl	flash_erase_block
 	cmn	w0, #1
-	bne	.L2104
-.L2106:
+	bne	.L2127
+.L2129:
 	mov	w21, -1
-.L2105:
+.L2128:
 	mov	w1, w19
 	mov	w0, w20
 	bl	flash_erase_block
@@ -12367,38 +12790,38 @@ flash_test_blk:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2104:
-	adrp	x23, .LANCHOR31
-	add	x23, x23, :lo12:.LANCHOR31
-	ldr	x3, [x21, #:lo12:.LANCHOR158]
+.L2127:
+	adrp	x23, .LANCHOR32
+	add	x23, x23, :lo12:.LANCHOR32
+	ldr	x3, [x21, #:lo12:.LANCHOR161]
 	mov	w1, w19
-	ldr	x2, [x22, #:lo12:.LANCHOR156]
+	ldr	x2, [x22, #:lo12:.LANCHOR159]
 	mov	w0, w20
 	ldrb	w4, [x23, 9]
 	bl	flash_prog_page
 	cmn	w0, #1
-	beq	.L2106
+	beq	.L2129
 	ldrb	w4, [x23, 9]
 	mov	w1, w19
-	ldr	x3, [x21, #:lo12:.LANCHOR158]
+	ldr	x3, [x21, #:lo12:.LANCHOR161]
 	mov	w0, w20
-	ldr	x2, [x22, #:lo12:.LANCHOR156]
+	ldr	x2, [x22, #:lo12:.LANCHOR159]
 	bl	flash_read_page
 	cmn	w0, #1
-	beq	.L2106
-	ldr	x0, [x22, #:lo12:.LANCHOR156]
+	beq	.L2129
+	ldr	x0, [x22, #:lo12:.LANCHOR159]
 	ldr	w1, [x0]
 	mov	w0, 42405
 	movk	w0, 0xa5a5, lsl 16
 	cmp	w1, w0
-	bne	.L2106
-	ldr	x0, [x21, #:lo12:.LANCHOR158]
+	bne	.L2129
+	ldr	x0, [x21, #:lo12:.LANCHOR161]
 	ldr	w1, [x0]
 	mov	w0, 23130
 	movk	w0, 0x5a5a, lsl 16
 	cmp	w1, w0
 	csetm	w21, ne
-	b	.L2105
+	b	.L2128
 	.size	flash_test_blk, .-flash_test_blk
 	.section	.text.id_block_prog_msb_ff_data,"ax",@progbits
 	.align	2
@@ -12414,45 +12837,45 @@ id_block_prog_msb_ff_data:
 	stp	x23, x24, [sp, 48]
 	ldrb	w0, [x0, #:lo12:.LANCHOR19]
 	str	x25, [sp, 64]
-	cbnz	w0, .L2114
-	adrp	x20, .LANCHOR31
-	add	x20, x20, :lo12:.LANCHOR31
+	cbnz	w0, .L2137
+	adrp	x20, .LANCHOR32
+	add	x20, x20, :lo12:.LANCHOR32
 	ldrb	w0, [x20, 19]
 	sub	w0, w0, #5
 	and	w3, w0, 255
 	cmp	w3, 63
-	bhi	.L2114
+	bhi	.L2137
 	and	w19, w2, 65535
 	mov	x2, 16391
 	movk	x2, 0x4000, lsl 16
 	movk	x2, 0x8000, lsl 48
 	lsr	x0, x2, x3
-	tbz	x0, 0, .L2114
-	adrp	x21, .LANCHOR138
+	tbz	x0, 0, .L2137
+	adrp	x21, .LANCHOR140
 	mov	w23, w1
-	add	x21, x21, :lo12:.LANCHOR138
+	add	x21, x21, :lo12:.LANCHOR140
 	mov	w25, 65535
-	adrp	x24, .LANCHOR156
-.L2116:
+	adrp	x24, .LANCHOR159
+.L2139:
 	ldrh	w0, [x20, 10]
 	cmp	w0, w19
-	bhi	.L2117
-.L2114:
+	bhi	.L2140
+.L2137:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2117:
+.L2140:
 	ldrh	w0, [x21, w19, sxtw 1]
 	cmp	w0, w25
-	bne	.L2114
-	ldr	x0, [x24, #:lo12:.LANCHOR156]
+	bne	.L2137
+	ldr	x0, [x24, #:lo12:.LANCHOR159]
 	mov	w2, 16384
 	mov	w1, 255
 	bl	ftl_memset
-	ldr	x3, [x24, #:lo12:.LANCHOR156]
+	ldr	x3, [x24, #:lo12:.LANCHOR159]
 	add	w1, w19, w23
 	ldrb	w4, [x20, 9]
 	add	w19, w19, 1
@@ -12460,7 +12883,7 @@ id_block_prog_msb_ff_data:
 	mov	w0, w22
 	and	w19, w19, 65535
 	bl	flash_prog_page
-	b	.L2116
+	b	.L2139
 	.size	id_block_prog_msb_ff_data, .-id_block_prog_msb_ff_data
 	.section	.text.flash_dual_page_prog,"ax",@progbits
 	.align	2
@@ -12470,46 +12893,53 @@ flash_dual_page_prog:
 	stp	x29, x30, [sp, -112]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	and	w22, w0, 255
+	and	w21, w0, 255
 	adrp	x0, .LANCHOR13
 	stp	x23, x24, [sp, 48]
 	stp	x19, x20, [sp, 16]
-	and	x19, x22, 255
+	and	x19, x21, 255
 	ldr	x23, [x0, #:lo12:.LANCHOR13]
 	add	x0, x19, 8
+	mov	w20, 24
 	stp	x27, x28, [sp, 80]
 	mov	x27, x2
 	stp	x25, x26, [sp, 64]
-	mov	w21, w1
 	add	x0, x23, x0, lsl 8
 	str	x0, [x29, 104]
-	adrp	x0, .LANCHOR14
-	str	x0, [x29, 96]
+	adrp	x0, .LANCHOR31
+	mov	w22, w1
 	mov	x28, x3
 	mov	x25, x4
-	ldr	w2, [x0, #:lo12:.LANCHOR14]
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
 	mov	x26, x5
-	and	w20, w1, 2097151
-	ubfx	x24, x21, 24, 2
-	tbz	x2, 4, .L2120
-	adrp	x0, .LC128
-	mov	w3, w6
-	mov	w2, w24
-	add	x0, x0, :lo12:.LC128
-	bl	printf
-.L2120:
-	bl	nandc_wait_flash_ready
-	mov	w0, w22
+	ubfx	x24, x22, 24, 2
+	sub	w0, w20, w0
+	mov	w20, 1
+	lsl	w20, w20, w0
+	adrp	x0, .LANCHOR14
+	str	x0, [x29, 96]
+	sub	w20, w20, #1
+	ldr	w2, [x0, #:lo12:.LANCHOR14]
+	and	w20, w20, w1
+	tbz	x2, 4, .L2143
+	adrp	x0, .LC130
+	mov	w3, w6
+	mov	w2, w24
+	add	x0, x0, :lo12:.LC130
+	bl	printf
+.L2143:
+	bl	nandc_wait_flash_ready
+	mov	w0, w21
 	bl	nandc_cs
-	mov	w0, w22
-	cbnz	w24, .L2121
+	mov	w0, w21
+	cbnz	w24, .L2144
 	bl	zftl_flash_enter_slc_mode
-.L2122:
+.L2145:
 	add	x19, x23, x19, lsl 8
 	mov	w24, 128
-	and	w0, w21, 255
-	adrp	x22, .LANCHOR31
-	add	x22, x22, :lo12:.LANCHOR31
+	and	w0, w20, 255
+	adrp	x21, .LANCHOR32
+	add	x21, x21, :lo12:.LANCHOR32
 	mov	w23, 16
 	str	w24, [x19, 2056]
 	str	wzr, [x19, 2052]
@@ -12521,7 +12951,7 @@ flash_dual_page_prog:
 	str	w0, [x19, 2052]
 	mov	w0, w20
 	bl	nandc_set_seed
-	ldrb	w1, [x22, 9]
+	ldrb	w1, [x21, 9]
 	mov	x3, x28
 	mov	x2, x27
 	mov	w0, 1
@@ -12540,7 +12970,7 @@ flash_dual_page_prog:
 	lsr	w1, w0, 16
 	str	w1, [x19, 2052]
 	bl	nandc_set_seed
-	ldrb	w1, [x22, 9]
+	ldrb	w1, [x21, 9]
 	mov	x3, x26
 	mov	x2, x25
 	mov	w0, 1
@@ -12551,18 +12981,18 @@ flash_dual_page_prog:
 	ldr	x0, [x29, 104]
 	bl	flash_read_status
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.29
+	bl	nandc_de_cs.constprop.30
 	and	w19, w2, 4
-	tbz	x2, 2, .L2119
+	tbz	x2, 2, .L2142
 	ldr	x0, [x29, 96]
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2119
-	adrp	x0, .LC129
+	tbz	x0, 12, .L2142
+	adrp	x0, .LC131
 	mov	w2, w19
-	mov	w1, w21
-	add	x0, x0, :lo12:.LC129
+	mov	w1, w22
+	add	x0, x0, :lo12:.LC131
 	bl	printf
-.L2119:
+.L2142:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -12571,17 +13001,17 @@ flash_dual_page_prog:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2121:
+.L2144:
 	bl	zftl_flash_exit_slc_mode
-	b	.L2122
+	b	.L2145
 	.size	flash_dual_page_prog, .-flash_dual_page_prog
-	.section	.text.fw_flash_page_prog.constprop.26,"ax",@progbits
+	.section	.text.fw_flash_page_prog.constprop.27,"ax",@progbits
 	.align	2
-	.type	fw_flash_page_prog.constprop.26, %function
-fw_flash_page_prog.constprop.26:
+	.type	fw_flash_page_prog.constprop.27, %function
+fw_flash_page_prog.constprop.27:
 	stp	x29, x30, [sp, -64]!
-	adrp	x4, .LANCHOR31
-	add	x4, x4, :lo12:.LANCHOR31
+	adrp	x4, .LANCHOR32
+	add	x4, x4, :lo12:.LANCHOR32
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x20, x1
@@ -12590,20 +13020,20 @@ fw_flash_page_prog.constprop.26:
 	str	x23, [sp, 48]
 	ldrb	w19, [x4, 9]
 	udiv	w19, w0, w19
-	adrp	x0, .LANCHOR44
-	ldrb	w23, [x0, #:lo12:.LANCHOR44]
+	adrp	x0, .LANCHOR46
+	ldrb	w23, [x0, #:lo12:.LANCHOR46]
 	adrp	x0, .LANCHOR17
 	ldrb	w0, [x0, #:lo12:.LANCHOR17]
 	bl	nandc_bch_sel
 	ldrb	w0, [x4, 7]
 	cmp	w0, 9
-	bne	.L2135
-	adrp	x22, .LANCHOR156
+	bne	.L2158
+	adrp	x22, .LANCHOR159
 	mov	w2, 16384
 	mov	w1, 255
-	ldr	x0, [x22, #:lo12:.LANCHOR156]
+	ldr	x0, [x22, #:lo12:.LANCHOR159]
 	bl	ftl_memset
-	ldr	x5, [x22, #:lo12:.LANCHOR156]
+	ldr	x5, [x22, #:lo12:.LANCHOR159]
 	mov	w6, 4
 	mov	x3, x21
 	mov	x2, x20
@@ -12611,25 +13041,25 @@ fw_flash_page_prog.constprop.26:
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_dual_page_prog
-.L2138:
-	mov	w3, w0
+.L2161:
+	mov	w4, w0
 	mov	w0, w23
 	bl	nandc_bch_sel
 	ldr	x23, [sp, 48]
-	mov	w0, w3
+	mov	w0, w4
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2135:
+.L2158:
 	mov	w4, 4
 	mov	x3, x21
 	mov	x2, x20
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_prog_page
-	b	.L2138
-	.size	fw_flash_page_prog.constprop.26, .-fw_flash_page_prog.constprop.26
+	b	.L2161
+	.size	fw_flash_page_prog.constprop.27, .-fw_flash_page_prog.constprop.27
 	.section	.text.idb_write_data,"ax",@progbits
 	.align	2
 	.global	idb_write_data
@@ -12642,24 +13072,24 @@ idb_write_data:
 	stp	x19, x20, [sp, 16]
 	mov	w19, w1
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR135
-	stp	x27, x28, [sp, 80]
 	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR137
 	stp	x25, x26, [sp, 64]
-	ldr	x27, [x22, #:lo12:.LANCHOR135]
-	bls	.L2140
+	stp	x27, x28, [sp, 80]
+	ldr	x21, [x23, #:lo12:.LANCHOR137]
+	bls	.L2163
 	cmp	w1, 575
-	bhi	.L2141
-	mov	x21, x2
+	bhi	.L2164
+	mov	x22, x2
 	mov	w20, w3
-	cbnz	x27, .L2142
+	cbnz	x21, .L2165
 	mov	w0, 262144
 	bl	ftl_malloc
-	str	x0, [x22, #:lo12:.LANCHOR135]
-	cbnz	x0, .L2143
-.L2148:
+	str	x0, [x23, #:lo12:.LANCHOR137]
+	cbnz	x0, .L2166
+.L2171:
 	mov	w0, -1
-.L2139:
+.L2162:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -12667,39 +13097,39 @@ idb_write_data:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 272
 	ret
-.L2143:
+.L2166:
 	mov	w2, 262144
 	mov	w1, 0
 	bl	ftl_memset
-.L2142:
-	adrp	x23, .LANCHOR137
-	ldr	x0, [x23, #:lo12:.LANCHOR137]
-	cbz	x0, .L2145
-.L2149:
-	adrp	x1, .LANCHOR136
+.L2165:
+	adrp	x21, .LANCHOR139
+	ldr	x0, [x21, #:lo12:.LANCHOR139]
+	cbz	x0, .L2168
+.L2172:
+	adrp	x1, .LANCHOR138
 	mov	w2, 1
-	ldr	x0, [x22, #:lo12:.LANCHOR135]
+	ldr	x0, [x23, #:lo12:.LANCHOR137]
 	cmp	w19, 64
-	str	w2, [x1, #:lo12:.LANCHOR136]
-	bhi	.L2246
+	str	w2, [x1, #:lo12:.LANCHOR138]
+	bhi	.L2274
 	mov	w1, 64
 	sub	w19, w1, w19
 	sub	w2, w20, w19
 	ubfiz	x19, x19, 9, 25
 	lsl	w2, w2, 9
-	add	x1, x21, x19
-.L2252:
+	add	x1, x22, x19
+.L2281:
 	bl	ftl_memcpy
-.L2251:
+.L2280:
 	mov	w0, 0
-	b	.L2139
-.L2145:
+	b	.L2162
+.L2168:
 	mov	w0, 262144
 	bl	ftl_malloc
-	str	x0, [x23, #:lo12:.LANCHOR137]
-	cbnz	x0, .L2149
-	b	.L2148
-.L2246:
+	str	x0, [x21, #:lo12:.LANCHOR139]
+	cbnz	x0, .L2172
+	b	.L2171
+.L2274:
 	mov	w2, 576
 	sub	w2, w2, w19
 	cmp	w20, w2
@@ -12707,60 +13137,65 @@ idb_write_data:
 	csel	w2, w20, w2, ls
 	ubfiz	x19, x19, 9, 25
 	lsl	w2, w2, 9
-	mov	x1, x21
+	mov	x1, x22
 	add	x0, x0, x19
-	b	.L2252
-.L2140:
+	b	.L2281
+.L2163:
 	cmp	w1, 575
-	bls	.L2251
-.L2141:
-	adrp	x0, .LANCHOR136
-	ldr	w0, [x0, #:lo12:.LANCHOR136]
-	cbz	w0, .L2251
-	adrp	x1, .LANCHOR31
-	add	x0, x1, :lo12:.LANCHOR31
-	str	x1, [x29, 152]
-	adrp	x8, .LANCHOR19
-	ldrb	w20, [x0, 9]
+	bls	.L2280
+.L2164:
+	adrp	x0, .LANCHOR138
+	ldr	w0, [x0, #:lo12:.LANCHOR138]
+	cbz	w0, .L2280
+	adrp	x2, .LANCHOR32
+	add	x0, x2, :lo12:.LANCHOR32
+	str	x2, [x29, 144]
+	ldrb	w22, [x0, 9]
 	ldrh	w19, [x0, 26]
 	adrp	x0, .LANCHOR0
 	mov	x7, x0
-	ldrb	w2, [x0, #:lo12:.LANCHOR0]
-	str	w2, [x29, 188]
-	uxtw	x0, w2
-	cbz	w0, .L2199
-	ldrb	w0, [x8, #:lo12:.LANCHOR19]
+	ldrb	w1, [x0, #:lo12:.LANCHOR0]
+	str	w1, [x29, 180]
+	adrp	x1, .LANCHOR19
+	mov	x8, x1
+	ldr	w0, [x29, 180]
+	ldrb	w3, [x1, #:lo12:.LANCHOR19]
+	str	w3, [x29, 192]
+	cbz	w0, .L2174
+	ldrh	w0, [x29, 180]
+	str	w0, [x29, 168]
+	uxtw	x0, w3
 	cmp	w0, 0
 	cset	w0, eq
-	str	w0, [x29, 176]
-.L2151:
+.L2277:
+	str	w0, [x29, 188]
 	mov	w0, 0
 	bl	zftl_flash_exit_slc_mode
 	ldrb	w0, [x8, #:lo12:.LANCHOR19]
 	strb	w0, [x7, #:lo12:.LANCHOR0]
 	mov	w0, 35899
-	ldr	w1, [x27]
+	ldr	w1, [x21]
 	movk	w0, 0xfcdc, lsl 16
 	cmp	w1, w0
-	bne	.L2153
-	ldr	x0, [x29, 152]
+	bne	.L2177
+	ldr	x0, [x29, 144]
+	add	x1, x21, 258048
+	add	x1, x1, 2044
 	mov	w2, 65023
+	add	x0, x0, :lo12:.LANCHOR32
 	mov	w3, 4097
-	add	x1, x0, :lo12:.LANCHOR31
-	ldrh	w0, [x1, 10]
-	ldrb	w1, [x1, 12]
-	lsl	w0, w0, 2
-	sdiv	w26, w0, w1
-	add	x1, x27, 258048
+	ldrh	w20, [x0, 10]
+	ldrb	w0, [x0, 12]
+	lsl	w20, w20, 2
+	sdiv	w20, w20, w0
 	mov	w0, 512
-	add	x1, x1, 2044
-	cmp	w26, 512
-	csel	w26, w26, w0, lt
+	cmp	w20, 512
+	csel	w20, w20, w0, lt
 	mov	w0, 0
-.L2157:
+.L2181:
 	ldr	w4, [x1]
-	cbnz	w4, .L2155
-	ldr	w4, [x27, w0, uxtw 2]
+	cbnz	w4, .L2179
+	ldr	w4, [x21, w0, uxtw 2]
 	add	w0, w0, 1
 	str	w4, [x1, 2048]
 	cmp	w0, w3
@@ -12768,463 +13203,480 @@ idb_write_data:
 	csel	w0, w0, wzr, cc
 	sub	x1, x1, #4
 	cmp	w2, 4096
-	bne	.L2157
-.L2155:
-	ldr	w1, [x27, w2, uxtw 2]
-	mul	w19, w19, w20
-	mov	w3, w26
-	adrp	x0, .LC130
-	add	x0, x0, :lo12:.LC130
+	bne	.L2181
+.L2179:
+	ldr	w1, [x21, w2, uxtw 2]
+	mul	w19, w19, w22
+	mov	w3, w20
+	adrp	x0, .LC132
+	add	x0, x0, :lo12:.LC132
 	bl	printf
 	str	wzr, [x29, 184]
 	and	w0, w19, 65535
-	str	wzr, [x29, 200]
-	str	w0, [x29, 140]
-	adrp	x0, .LANCHOR46
-	add	x0, x0, :lo12:.LANCHOR46
-	str	x0, [x29, 192]
-.L2195:
-	adrp	x20, .LANCHOR137
+	str	wzr, [x29, 196]
+	str	w0, [x29, 132]
+	adrp	x0, .LANCHOR48
+	add	x0, x0, :lo12:.LANCHOR48
+	str	x0, [x29, 200]
+.L2219:
+	adrp	x23, .LANCHOR139
 	mov	w1, 0
 	mov	w2, 512
-	ldr	x0, [x20, #:lo12:.LANCHOR137]
+	ldr	x0, [x23, #:lo12:.LANCHOR139]
 	bl	ftl_memset
 	adrp	x0, .LANCHOR27
-	ldr	w1, [x29, 200]
+	ldr	w1, [x29, 196]
 	ldr	x0, [x0, #:lo12:.LANCHOR27]
 	add	x0, x0, x1, uxtw
 	ldrb	w19, [x0, 32]
 	cmp	w19, 255
-	beq	.L2158
-	ldr	w0, [x29, 140]
+	beq	.L2182
+	ldr	w0, [x29, 132]
 	mul	w19, w19, w0
-	ldr	w0, [x29, 176]
-	cbz	w0, .L2159
-	cmp	w1, 1
+	ldr	w0, [x29, 188]
+	cbz	w0, .L2183
+	and	w0, w1, -3
 	adrp	x8, .LANCHOR0
+	cmp	w0, 1
 	adrp	x7, .LANCHOR19
-	bne	.L2160
-	ldrb	w0, [x29, 188]
+	bne	.L2184
+	ldrb	w0, [x29, 168]
 	strb	w0, [x8, #:lo12:.LANCHOR0]
 	strb	w0, [x7, #:lo12:.LANCHOR19]
-.L2159:
-	ldr	x0, [x29, 152]
-	add	x25, x0, :lo12:.LANCHOR31
-	ldr	x0, [x29, 192]
-	ldrb	w22, [x25, 9]
-	ldrh	w23, [x25, 26]
+.L2183:
+	ldr	x0, [x29, 144]
+	add	x27, x0, :lo12:.LANCHOR32
+	ldr	x0, [x29, 200]
+	ldrb	w24, [x27, 9]
+	ldrh	w25, [x27, 26]
 	ldrb	w0, [x0]
-	str	w0, [x29, 136]
-	udiv	w1, w19, w22
-	ldr	x0, [x29, 192]
-	mul	w23, w22, w23
-	and	w21, w23, 65535
+	str	w0, [x29, 128]
+	udiv	w1, w19, w24
+	ldr	x0, [x29, 200]
+	mul	w25, w24, w25
+	and	w22, w25, 65535
 	strb	wzr, [x0]
 	mov	w0, 0
 	bl	flash_erase_block
-	udiv	w23, w19, w21
-	ldrb	w0, [x25, 12]
-	msub	w23, w23, w21, w19
-	ldrh	w21, [x25, 10]
-	sub	w24, w19, w23
-	lsl	w21, w21, 2
-	cmp	w19, w24
-	sdiv	w0, w21, w0
-	str	w0, [x29, 180]
-	bne	.L2202
+	udiv	w25, w19, w22
+	ldrb	w1, [x27, 12]
+	msub	w0, w25, w22, w19
+	str	w0, [x29, 176]
+	sub	w26, w19, w0
+	ldrh	w0, [x27, 10]
+	cmp	w19, w26
+	lsl	w0, w0, 2
+	sdiv	w0, w0, w1
+	str	w0, [x29, 172]
+	bne	.L2227
 	adrp	x0, .LANCHOR28
 	ldrb	w0, [x0, #:lo12:.LANCHOR28]
 	cmp	w0, 9
-	bne	.L2202
-	ldr	x21, [x20, #:lo12:.LANCHOR137]
+	bne	.L2227
+	ldr	x28, [x23, #:lo12:.LANCHOR139]
 	mov	w2, 1024
 	mov	w1, 0
-	mov	x0, x21
+	mov	x0, x28
 	bl	ftl_memset
 	mov	w0, 18766
 	movk	w0, 0x464e, lsl 16
-	str	w0, [x21]
+	str	w0, [x28]
 	mov	w0, 12
-	str	w0, [x21, 4]
+	str	w0, [x28, 4]
 	adrp	x0, .LANCHOR19
-	strb	wzr, [x21, 16]
-	str	wzr, [x21, 12]
+	strb	wzr, [x28, 16]
+	str	wzr, [x28, 12]
 	ldrb	w0, [x0, #:lo12:.LANCHOR19]
-	cbz	w0, .L2162
-	ldrb	w0, [x25, 29]
-	strb	w0, [x21, 16]
-.L2162:
+	cbz	w0, .L2186
+	ldrb	w0, [x27, 29]
+	strb	w0, [x28, 16]
+.L2186:
 	mov	w0, 4
-	strb	w0, [x21, 17]
-	adrp	x0, .LANCHOR31
-	add	x0, x0, :lo12:.LANCHOR31
-	cmp	w22, 8
-	strb	wzr, [x21, 20]
-	strh	wzr, [x21, 22]
+	strb	w0, [x28, 17]
+	adrp	x0, .LANCHOR32
+	add	x0, x0, :lo12:.LANCHOR32
+	cmp	w24, 8
+	strb	wzr, [x28, 20]
+	strh	wzr, [x28, 22]
+	sub	w22, w20, #4
 	ldrh	w1, [x0, 10]
 	ldrb	w0, [x0, 12]
 	sdiv	w0, w1, w0
 	mov	w1, 16
-	strh	w0, [x21, 18]
+	strh	w0, [x28, 18]
 	mov	w0, 70
 	csel	w0, w0, w1, hi
-	strb	w0, [x21, 21]
+	strb	w0, [x28, 21]
 	mov	w1, 12
-	add	x0, x21, 12
+	add	x0, x28, 12
 	bl	js_hash
-	str	w0, [x21, 8]
-	sub	w0, w26, #4
-	str	w0, [x29, 204]
-.L2161:
+	str	w0, [x28, 8]
+.L2185:
 	adrp	x0, .LANCHOR19
-	mov	x25, x27
+	mov	x25, x21
 	add	x0, x0, :lo12:.LANCHOR19
-	mov	w28, 0
-	str	x0, [x29, 168]
+	mov	w27, 0
+	str	x0, [x29, 160]
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
-	str	x0, [x29, 160]
-.L2164:
-	ldr	w0, [x29, 180]
-	cmp	w0, w28
-	bhi	.L2175
-	ldr	x0, [x29, 152]
-	mov	w22, 4
-	ldr	x21, [x20, #:lo12:.LANCHOR137]
-	mov	w23, 0
-	add	x0, x0, :lo12:.LANCHOR31
-	str	wzr, [x29, 168]
+	str	x0, [x29, 152]
+.L2188:
+	ldr	w0, [x29, 172]
+	cmp	w0, w27
+	bhi	.L2199
+	ldr	x0, [x29, 144]
+	mov	w25, 4
+	ldr	x24, [x23, #:lo12:.LANCHOR139]
+	mov	w26, 0
+	add	x0, x0, :lo12:.LANCHOR32
+	str	w22, [x29, 152]
+	str	wzr, [x29, 160]
 	ldrb	w1, [x0, 9]
-	ldrh	w28, [x0, 26]
-	uxtw	x0, w1
-	mul	w28, w0, w28
-	adrp	x0, .LANCHOR46
-	and	w28, w28, 65535
-	strb	wzr, [x0, #:lo12:.LANCHOR46]
-	udiv	w0, w19, w28
-	msub	w28, w0, w28, w19
-	sub	w0, w19, w28
-	stp	w0, w1, [x29, 144]
-	and	w0, w28, 3
-	str	w0, [x29, 180]
-	ldr	w0, [x29, 204]
-	str	w0, [x29, 160]
+	ldrh	w0, [x0, 26]
+	str	w1, [x29, 140]
+	mul	w0, w1, w0
+	adrp	x1, .LANCHOR48
+	and	w0, w0, 65535
+	strb	wzr, [x1, #:lo12:.LANCHOR48]
+	udiv	w1, w19, w0
+	msub	w0, w1, w0, w19
+	str	w0, [x29, 176]
+	sub	w0, w19, w0
+	str	w0, [x29, 136]
+	ldr	w0, [x29, 176]
+	and	w0, w0, 3
+	str	w0, [x29, 172]
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
-	str	x0, [x29, 112]
-.L2176:
-	ldr	w0, [x29, 160]
-	cmp	w23, w0
-	bcc	.L2190
-	ldr	x0, [x29, 192]
-	ldrb	w1, [x29, 136]
+	str	x0, [x29, 104]
+.L2200:
+	ldr	w0, [x29, 152]
+	cmp	w26, w0
+	bcc	.L2214
+	ldr	x0, [x29, 200]
+	ldrb	w1, [x29, 128]
 	strb	w1, [x0]
-	ldr	w0, [x29, 176]
-	cbz	w0, .L2191
+	ldr	w0, [x29, 188]
+	cbz	w0, .L2215
 	mov	w0, 0
 	bl	zftl_flash_exit_slc_mode
 	adrp	x0, .LANCHOR0
 	strb	wzr, [x0, #:lo12:.LANCHOR0]
 	adrp	x0, .LANCHOR19
 	strb	wzr, [x0, #:lo12:.LANCHOR19]
-.L2191:
-	ldr	w0, [x29, 204]
-	mov	x2, 0
-	lsl	w1, w0, 7
-	adrp	x0, .LANCHOR137
-	ldr	x0, [x0, #:lo12:.LANCHOR137]
-.L2192:
-	mov	w20, w2
-	cmp	w2, w1
-	bcc	.L2193
+.L2215:
+	adrp	x0, .LANCHOR139
+	lsl	w22, w22, 7
+	mov	x1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR139]
+.L2216:
+	mov	w23, w1
+	cmp	w1, w22
+	bcc	.L2217
 	ldr	w0, [x29, 184]
 	add	w0, w0, 1
 	str	w0, [x29, 184]
 	cmp	w0, 5
-	bls	.L2158
-	b	.L2198
-.L2199:
-	str	wzr, [x29, 176]
-	b	.L2151
-.L2160:
+	bls	.L2182
+	b	.L2223
+.L2174:
+	ldr	w0, [x29, 192]
+	cmp	w0, 3
+	mov	w0, 3
+	csel	w0, wzr, w0, ne
+	str	w0, [x29, 168]
+	ldr	w0, [x29, 192]
+	cmp	w0, 3
+	mov	w0, 2
+	csel	w0, wzr, w0, ne
+	b	.L2277
+.L2184:
 	mov	w0, 0
 	bl	zftl_flash_exit_slc_mode
 	strb	wzr, [x8, #:lo12:.LANCHOR0]
 	strb	wzr, [x7, #:lo12:.LANCHOR19]
-	b	.L2159
-.L2202:
-	mov	x21, 0
-	str	w26, [x29, 204]
-	b	.L2161
-.L2175:
-	ldr	x2, [x29, 168]
-	add	w4, w23, w28
-	lsr	w4, w4, 2
+	b	.L2183
+.L2227:
+	mov	w22, w20
+	mov	x28, 0
+	b	.L2185
+.L2199:
+	ldr	x2, [x29, 160]
+	ldr	w0, [x29, 176]
+	add	w4, w0, w27
 	adrp	x0, .LANCHOR3
+	lsr	w4, w4, 2
+	ldrb	w2, [x2]
 	add	w1, w4, 1
 	add	x0, x0, :lo12:.LANCHOR3
-	ldrb	w2, [x2]
 	ldrh	w0, [x0, w1, sxtw 1]
-	cbz	w2, .L2166
+	cbz	w2, .L2190
 	adrp	x0, .LANCHOR1
 	ldrb	w7, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w1, 1
 	cmp	w7, 0
 	csel	w0, w0, w1, ne
-.L2166:
+.L2190:
 	adrp	x1, .LANCHOR28
 	ldrb	w1, [x1, #:lo12:.LANCHOR28]
 	cmp	w1, 9
-	bne	.L2168
-.L2249:
+	bne	.L2192
+.L2278:
 	str	w0, [x29, 208]
 	mov	w0, 61424
 	str	w0, [x29, 212]
-	ldr	x0, [x29, 160]
+	ldr	x0, [x29, 152]
 	ldrh	w0, [x0, w4, sxtw 1]
-	cbnz	w2, .L2170
+	cbnz	w2, .L2194
 	mov	w4, w0
-.L2171:
-	mul	w0, w22, w4
-	cbnz	x21, .L2172
-	str	w4, [x29, 148]
+.L2195:
+	mul	w0, w24, w4
+	cbnz	x28, .L2196
+	str	w4, [x29, 140]
 	add	x2, x29, 208
 	mov	x1, x25
-	add	w0, w0, w24
-	bl	fw_flash_page_prog.constprop.26
+	add	w0, w0, w26
+	bl	fw_flash_page_prog.constprop.27
 	adrp	x0, .LANCHOR19
-	ldr	w4, [x29, 148]
+	ldr	w4, [x29, 140]
 	ldrb	w0, [x0, #:lo12:.LANCHOR19]
-	cbnz	w0, .L2173
-	udiv	w1, w24, w22
+	cbnz	w0, .L2197
+	udiv	w1, w26, w24
 	add	w2, w4, 1
 	bl	id_block_prog_msb_ff_data
-.L2173:
-	ldr	w0, [x29, 204]
+.L2197:
+	add	w0, w22, 16
 	add	x25, x25, 2048
-	add	w0, w0, 16
-	cmp	w28, w0
-	bcc	.L2174
-	ldr	w0, [x29, 204]
-	add	w1, w0, 20
-	add	x0, x27, 2048
-	cmp	w28, w1
+	cmp	w27, w0
+	bcc	.L2198
+	add	w1, w22, 20
+	add	x0, x21, 2048
+	cmp	w27, w1
 	csel	x25, x0, x25, cc
-.L2174:
-	add	w5, w28, 4
-	mov	x21, 0
-	and	w28, w5, 65535
-	b	.L2164
-.L2168:
+.L2198:
+	add	w5, w27, 4
+	mov	x28, 0
+	and	w27, w5, 65535
+	b	.L2188
+.L2192:
 	sub	w0, w0, #1
 	lsl	w0, w0, 2
-	b	.L2249
-.L2170:
+	b	.L2278
+.L2194:
 	adrp	x0, .LANCHOR1
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w4, 1
 	cmp	w1, 0
 	csel	w4, w0, w4, ne
-	b	.L2171
-.L2172:
+	b	.L2195
+.L2196:
 	add	x2, x29, 208
-	mov	x1, x21
-	add	w0, w0, w24
-	bl	fw_flash_page_prog.constprop.26
-	b	.L2174
-.L2190:
-	add	w20, w28, w23
-	ldr	w0, [x29, 180]
+	mov	x1, x28
+	add	w0, w0, w26
+	bl	fw_flash_page_prog.constprop.27
+	b	.L2198
+.L2214:
+	ldr	w0, [x29, 172]
 	adrp	x1, .LANCHOR19
-	sub	w25, w22, w0
-	ldr	x0, [x29, 112]
-	udiv	w20, w20, w22
+	sub	w28, w25, w0
+	ldr	w0, [x29, 176]
 	ldrb	w1, [x1, #:lo12:.LANCHOR19]
-	and	w25, w25, 65535
-	and	w20, w20, 65535
-	ldrh	w0, [x0, w20, sxtw 1]
-	cbnz	w1, .L2177
-	mov	w20, w0
-.L2178:
+	and	w28, w28, 65535
+	add	w23, w0, w26
+	ldr	x0, [x29, 104]
+	udiv	w23, w23, w25
+	and	w23, w23, 65535
+	ldrh	w0, [x0, w23, sxtw 1]
+	cbnz	w1, .L2201
+	mov	w23, w0
+.L2202:
 	adrp	x0, .LANCHOR17
-	ldr	w1, [x29, 144]
-	ldrb	w24, [x0, #:lo12:.LANCHOR17]
-	ldr	w0, [x29, 180]
+	ldr	w1, [x29, 136]
+	ldrb	w27, [x0, #:lo12:.LANCHOR17]
+	ldr	w0, [x29, 172]
 	add	w0, w0, w1
-	ldr	w1, [x29, 148]
-	madd	w20, w1, w20, w0
-	adrp	x0, .LANCHOR31+9
-	ldrb	w0, [x0, #:lo12:.LANCHOR31+9]
-	udiv	w20, w20, w0
-	adrp	x0, .LANCHOR44
-	ldrb	w0, [x0, #:lo12:.LANCHOR44]
-	str	w0, [x29, 132]
-	mov	w0, w24
+	ldr	w1, [x29, 140]
+	madd	w23, w1, w23, w0
+	adrp	x0, .LANCHOR32+9
+	ldrb	w0, [x0, #:lo12:.LANCHOR32+9]
+	udiv	w23, w23, w0
+	adrp	x0, .LANCHOR46
+	ldrb	w0, [x0, #:lo12:.LANCHOR46]
+	str	w0, [x29, 124]
+	mov	w0, w27
 	bl	nandc_bch_sel
 	adrp	x0, .LANCHOR21
 	add	x0, x0, :lo12:.LANCHOR21
-	str	x0, [x29, 120]
-.L2179:
-	mov	w4, w22
+	str	x0, [x29, 112]
+.L2203:
+	mov	w4, w25
 	add	x3, x29, 208
-	mov	x2, x21
-	mov	w1, w20
+	mov	x2, x24
+	mov	w1, w23
 	mov	w0, 0
 	bl	flash_read_page
 	mov	w5, w0
 	cmn	w0, #1
-	bne	.L2180
-	ldr	x0, [x29, 192]
+	bne	.L2204
+	ldr	x0, [x29, 200]
 	ldrb	w6, [x0]
-	cbnz	w6, .L2181
-.L2184:
-	adrp	x0, .LANCHOR162
-	ldr	x6, [x0, #:lo12:.LANCHOR162]
-	cbnz	x6, .L2182
-.L2183:
-	ldr	x0, [x29, 120]
+	cbnz	w6, .L2205
+.L2208:
+	adrp	x0, .LANCHOR165
+	ldr	x6, [x0, #:lo12:.LANCHOR165]
+	cbnz	x6, .L2206
+.L2207:
+	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
-	cbz	w0, .L2180
-	mov	w4, w22
+	cbz	w0, .L2204
+	mov	w4, w25
 	add	x3, x29, 208
-	mov	x2, x21
-	mov	w1, w20
+	mov	x2, x24
+	mov	w1, w23
 	mov	w0, 0
 	bl	flash_ddr_tuning_read
-	b	.L2250
-.L2177:
+	b	.L2279
+.L2201:
 	adrp	x0, .LANCHOR1
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
-	lsl	w0, w20, 1
+	lsl	w0, w23, 1
 	cmp	w1, 0
-	csel	w20, w0, w20, ne
-	b	.L2178
-.L2181:
-	ldr	x0, [x29, 192]
-	mov	w1, w20
-	str	w6, [x29, 108]
-	mov	w4, w22
-	str	w5, [x29, 128]
+	csel	w23, w0, w23, ne
+	b	.L2202
+.L2205:
+	ldr	x0, [x29, 200]
+	mov	w1, w23
+	str	w6, [x29, 100]
+	mov	w4, w25
+	str	w5, [x29, 120]
 	add	x3, x29, 208
-	mov	x2, x21
+	mov	x2, x24
 	strb	wzr, [x0]
 	mov	w0, 0
 	bl	flash_read_page
 	cmn	w0, #1
-	ldr	x1, [x29, 192]
-	ldr	w6, [x29, 108]
-	ldr	w5, [x29, 128]
+	ldr	x1, [x29, 200]
+	ldr	w6, [x29, 100]
+	ldr	w5, [x29, 120]
 	strb	w6, [x1]
-	beq	.L2184
-.L2250:
+	beq	.L2208
+.L2279:
 	mov	w5, w0
-.L2180:
+.L2204:
 	cmn	w5, #1
-	cset	w3, eq
-	cmp	w24, 16
+	cset	w4, eq
+	cmp	w27, 16
 	cset	w0, ne
-	tst	w3, w0
-	beq	.L2186
+	tst	w4, w0
+	beq	.L2210
 	mov	w0, 16
-	mov	w24, 16
+	mov	w27, 16
 	bl	nandc_bch_sel
-	b	.L2179
-.L2182:
-	str	w5, [x29, 128]
-	mov	w4, w22
+	b	.L2203
+.L2206:
+	str	w5, [x29, 120]
+	mov	w4, w25
 	add	x3, x29, 208
-	mov	x2, x21
-	mov	w1, w20
+	mov	x2, x24
+	mov	w1, w23
 	mov	w0, 0
 	blr	x6
 	cmn	w0, #1
-	ldr	w5, [x29, 128]
-	beq	.L2183
-	b	.L2250
-.L2186:
-	ldr	w0, [x29, 132]
+	ldr	w5, [x29, 120]
+	beq	.L2207
+	b	.L2279
+.L2210:
+	ldr	w0, [x29, 124]
 	bl	nandc_bch_sel
-	cmp	w3, 0
-	ldr	w0, [x29, 168]
+	cmp	w4, 0
+	ldr	w0, [x29, 160]
 	csinv	w0, w0, wzr, eq
-	str	w0, [x29, 168]
-	ldr	w0, [x29, 144]
-	cmp	w23, 0
+	str	w0, [x29, 160]
+	ldr	w0, [x29, 136]
+	cmp	w26, 0
 	ccmp	w19, w0, 0, eq
-	bne	.L2188
-	ldr	w0, [x29, 168]
-	cbnz	w0, .L2188
-	ldr	w1, [x21]
+	bne	.L2212
+	ldr	w0, [x29, 160]
+	cbnz	w0, .L2212
+	ldr	w1, [x24]
 	mov	w0, 18766
 	movk	w0, 0x464e, lsl 16
 	cmp	w1, w0
-	bne	.L2188
-	ldr	w0, [x29, 160]
-	ldrb	w22, [x21, 17]
-	add	w0, w0, w25
-	str	w0, [x29, 160]
-.L2189:
-	add	w23, w25, w23
-	and	w23, w23, 65535
-	b	.L2176
-.L2188:
-	ubfiz	x0, x25, 9, 16
-	str	wzr, [x29, 180]
-	add	x21, x21, x0
-	b	.L2189
-.L2193:
-	ldr	w4, [x0, x2, lsl 2]
-	add	x2, x2, 1
-	add	x3, x27, x2, lsl 2
-	ldr	w3, [x3, -4]
-	cmp	w4, w3
-	beq	.L2192
+	bne	.L2212
+	ldr	w0, [x29, 152]
+	ldrb	w25, [x24, 17]
+	add	w0, w0, w28
+	str	w0, [x29, 152]
+.L2213:
+	add	w26, w28, w26
+	and	w26, w26, 65535
+	b	.L2200
+.L2212:
+	ubfiz	x0, x28, 9, 16
+	str	wzr, [x29, 172]
+	add	x24, x24, x0
+	b	.L2213
+.L2217:
+	ldr	w3, [x0, x1, lsl 2]
+	add	x1, x1, 1
+	add	x2, x21, x1, lsl 2
+	ldr	w2, [x2, -4]
+	cmp	w3, w2
+	beq	.L2216
 	mov	w2, 512
 	mov	w1, 0
 	bl	ftl_memset
-	mov	w1, w20
-	adrp	x0, .LC131
-	add	x0, x0, :lo12:.LC131
+	mov	w1, w23
+	adrp	x0, .LC133
+	add	x0, x0, :lo12:.LC133
 	bl	printf
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_erase_block
-.L2158:
-	ldr	w0, [x29, 200]
+.L2182:
+	ldr	w0, [x29, 196]
 	add	w0, w0, 1
-	str	w0, [x29, 200]
+	str	w0, [x29, 196]
 	cmp	w0, 4
-	bne	.L2195
-.L2198:
-	ldrb	w1, [x29, 188]
+	bne	.L2219
+.L2223:
+	mov	w0, 0
+	bl	zftl_flash_exit_slc_mode
 	adrp	x0, .LANCHOR0
+	ldrb	w1, [x29, 180]
 	strb	w1, [x0, #:lo12:.LANCHOR0]
+	ldr	w0, [x29, 188]
+	cbz	w0, .L2220
+	adrp	x0, .LANCHOR19
+	ldrb	w1, [x29, 192]
+	strb	w1, [x0, #:lo12:.LANCHOR19]
+.L2220:
 	mov	w1, 2
-	adrp	x0, .LANCHOR32
-	strb	w1, [x0, #:lo12:.LANCHOR32]
+	adrp	x0, .LANCHOR33
+	strb	w1, [x0, #:lo12:.LANCHOR33]
 	mov	w0, 0
 	bl	zftl_flash_enter_slc_mode
 	ldr	w0, [x29, 184]
-	cbnz	w0, .L2153
-	adrp	x0, .LC132
+	cbnz	w0, .L2177
+	adrp	x0, .LC134
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC132
+	add	x0, x0, :lo12:.LC134
 	bl	printf
-.L2153:
-	adrp	x0, .LANCHOR136
-	adrp	x19, .LANCHOR135
-	str	wzr, [x0, #:lo12:.LANCHOR136]
-	ldr	x0, [x19, #:lo12:.LANCHOR135]
-	cbz	x0, .L2197
-	bl	free
-	str	xzr, [x19, #:lo12:.LANCHOR135]
-.L2197:
+.L2177:
+	adrp	x0, .LANCHOR138
 	adrp	x19, .LANCHOR137
+	str	wzr, [x0, #:lo12:.LANCHOR138]
 	ldr	x0, [x19, #:lo12:.LANCHOR137]
-	cbz	x0, .L2251
+	cbz	x0, .L2222
 	bl	free
 	str	xzr, [x19, #:lo12:.LANCHOR137]
-	b	.L2251
+.L2222:
+	adrp	x19, .LANCHOR139
+	ldr	x0, [x19, #:lo12:.LANCHOR139]
+	cbz	x0, .L2280
+	bl	free
+	str	xzr, [x19, #:lo12:.LANCHOR139]
+	b	.L2280
 	.size	idb_write_data, .-idb_write_data
 	.section	.text.flash_start_tlc_page_prog,"ax",@progbits
 	.align	2
@@ -13233,41 +13685,45 @@ idb_write_data:
 flash_start_tlc_page_prog:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
-	str	x25, [sp, 64]
+	stp	x25, x26, [sp, 64]
 	and	w25, w0, 255
 	adrp	x0, .LANCHOR18
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	and	w19, w3, 255
-	stp	x23, x24, [sp, 48]
 	and	w21, w1, 255
-	ldrb	w0, [x0, #:lo12:.LANCHOR18]
+	stp	x23, x24, [sp, 48]
+	and	w26, w3, 255
+	ldrb	w1, [x0, #:lo12:.LANCHOR18]
 	and	w22, w2, 255
 	mov	w20, w4
 	mov	x23, x5
 	mov	x24, x6
-	cmp	w0, w19
-	bhi	.L2254
-	adrp	x1, .LANCHOR170
+	cmp	w1, w26
+	mov	x19, x0
+	bhi	.L2283
+	adrp	x1, .LANCHOR173
 	adrp	x0, .LC0
-	mov	w2, 727
-	add	x1, x1, :lo12:.LANCHOR170
+	mov	w2, 740
+	add	x1, x1, :lo12:.LANCHOR173
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2254:
+.L2283:
+	ldrb	w0, [x19, #:lo12:.LANCHOR18]
+	cmp	w0, w26
+	bls	.L2282
 	adrp	x0, .LANCHOR30
 	add	x0, x0, :lo12:.LANCHOR30
-	ldrb	w4, [x0, w19, sxtw]
+	ldrb	w4, [x0, w26, sxtw]
 	adrp	x0, .LANCHOR13
 	ldr	x19, [x0, #:lo12:.LANCHOR13]
 	mov	w0, w4
 	bl	nandc_cs
-	cbz	w25, .L2255
+	cbz	w25, .L2285
 	sxtw	x0, w4
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 8
 	str	w25, [x0, 8]
-.L2255:
+.L2285:
 	ubfiz	x4, x4, 8, 8
 	mov	w0, 128
 	add	x19, x19, x4
@@ -13285,46 +13741,64 @@ flash_start_tlc_page_prog:
 	sub	w0, w20, #1
 	add	w0, w0, w21
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR31+9
+	adrp	x0, .LANCHOR32+9
 	mov	x3, x24
 	mov	x2, x23
-	ldrb	w1, [x0, #:lo12:.LANCHOR31+9]
+	ldrb	w1, [x0, #:lo12:.LANCHOR32+9]
 	mov	w0, 1
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
-	ldr	x25, [sp, 64]
 	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
 	str	w22, [x19, 2056]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 80
-	b	nandc_de_cs.constprop.29
+	b	nandc_de_cs.constprop.30
+.L2282:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
 	.size	flash_start_tlc_page_prog, .-flash_start_tlc_page_prog
 	.section	.text.queue_tlc_prog_cmd,"ax",@progbits
 	.align	2
 	.type	queue_tlc_prog_cmd, %function
 queue_tlc_prog_cmd:
 	stp	x29, x30, [sp, -48]!
-	mov	w2, 26
-	mov	w1, 1
+	mov	w2, 24
 	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	mov	x21, x0
+	adrp	x0, .LANCHOR31
+	mov	w22, 1
 	stp	x19, x20, [sp, 16]
-	mov	x19, x0
-	ldr	x0, [x0]
-	ldr	w20, [x0, 40]
-	ldr	x5, [x0, 8]
-	ldr	x6, [x0, 24]
-	str	x21, [sp, 32]
-	and	w21, w20, 2097151
-	ubfx	x20, x20, 21, 3
-	mov	w4, w21
-	ldrb	w0, [x0, 60]
-	mov	w3, w20
+	ldr	x7, [x21]
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	sub	w2, w2, w0
+	ldr	w1, [x7, 40]
+	lsl	w19, w22, w0
+	lsl	w20, w22, w2
+	sub	w19, w19, #1
+	sub	w20, w20, #1
+	ldr	x5, [x7, 8]
+	and	w20, w20, w1
+	lsr	w1, w1, w2
+	and	w19, w19, w1
+	ldr	x6, [x7, 24]
+	and	w19, w19, 255
+	ldrb	w0, [x7, 60]
+	mov	w4, w20
+	mov	w3, w19
+	mov	w1, w22
+	mov	w2, 26
 	bl	flash_start_tlc_page_prog
 	bl	nandc_wait_flash_ready
-	ldp	x7, x0, [x19]
-	mov	w4, w21
-	mov	w3, w20
+	ldp	x7, x0, [x21]
+	mov	w4, w20
+	mov	w3, w19
 	mov	w2, 26
 	mov	w1, 2
 	ldr	x5, [x0, 8]
@@ -13332,27 +13806,26 @@ queue_tlc_prog_cmd:
 	ldrb	w0, [x7, 60]
 	bl	flash_start_tlc_page_prog
 	bl	nandc_wait_flash_ready
-	ldr	x0, [x19, 16]
-	mov	w4, w21
-	ldr	x7, [x19]
-	mov	w3, w20
+	ldr	x0, [x21, 16]
+	mov	w4, w20
+	ldr	x7, [x21]
+	mov	w3, w19
 	mov	w2, 16
 	mov	w1, 3
 	ldr	x5, [x0, 8]
 	ldr	x6, [x0, 24]
 	ldrb	w0, [x7, 60]
 	bl	flash_start_tlc_page_prog
-	ldr	x1, [x19]
+	ldr	x1, [x21]
 	mov	w0, 4
+	strb	w22, [x1, 59]
 	strb	w0, [x1, 58]
-	mov	w0, 1
-	strb	w0, [x1, 59]
 	mov	w0, -1
 	strb	w0, [x1]
-	adrp	x0, .LANCHOR54
-	add	x0, x0, :lo12:.LANCHOR54
+	adrp	x0, .LANCHOR56
+	add	x0, x0, :lo12:.LANCHOR56
 	ldp	x19, x20, [sp, 16]
-	ldr	x21, [sp, 32]
+	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	b	buf_add_tail
 	.size	queue_tlc_prog_cmd, .-queue_tlc_prog_cmd
@@ -13367,74 +13840,86 @@ sblk_tlc_prog_one_page:
 	mov	x19, x0
 	ldr	x0, [x0]
 	ldr	w20, [x0, 40]
-.L2263:
+.L2293:
 	mov	w1, 1
 	mov	w0, w20
 	bl	queue_lun_state
-	cbnz	w0, .L2264
+	cbnz	w0, .L2294
 	mov	x0, x19
 	bl	queue_tlc_prog_cmd
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2264:
+.L2294:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2263
+	b	.L2293
 	.size	sblk_tlc_prog_one_page, .-sblk_tlc_prog_one_page
 	.section	.text.sblk_xlc_prog_pages,"ax",@progbits
 	.align	2
 	.global	sblk_xlc_prog_pages
 	.type	sblk_xlc_prog_pages, %function
 sblk_xlc_prog_pages:
-	stp	x29, x30, [sp, -64]!
+	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	mov	x19, x0
+	mov	x20, x0
 	ldr	x0, [x0]
-	stp	x21, x22, [sp, 32]
-	mov	x22, x1
 	stp	x23, x24, [sp, 48]
+	mov	x23, x1
 	mov	w24, w2
-	ldr	w20, [x0, 40]
-.L2267:
+	stp	x21, x22, [sp, 32]
+	ldr	w19, [x0, 40]
+	str	x25, [sp, 64]
+.L2297:
 	mov	w1, 1
-	mov	w0, w20
+	mov	w0, w19
 	bl	queue_lun_state
-	cbnz	w0, .L2268
+	cbnz	w0, .L2298
 	cmp	w24, 2
-	bne	.L2269
-	ldr	x0, [x19]
+	bne	.L2299
+	ldr	x7, [x20]
+	adrp	x0, .LANCHOR31
+	ldr	x3, [x23]
+	mov	w2, 24
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	mov	w22, 1
+	ldr	w1, [x7, 40]
+	sub	w2, w2, w0
+	lsl	w19, w22, w0
+	sub	w19, w19, #1
+	lsl	w21, w22, w2
+	sub	w21, w21, #1
+	and	w25, w1, w21
+	ldr	w3, [x3, 40]
+	lsr	w1, w1, w2
+	and	w19, w19, w1
+	and	w19, w19, 255
+	ldr	x5, [x7, 8]
+	ldr	x6, [x7, 24]
+	and	w21, w21, w3
+	ldrb	w0, [x7, 60]
+	mov	w4, w25
+	mov	w1, w22
+	mov	w3, w19
 	mov	w2, 17
-	ldr	x1, [x22]
-	ldr	w20, [x0, 40]
-	ldr	x5, [x0, 8]
-	ldr	x6, [x0, 24]
-	and	w23, w20, 2097151
-	ldrb	w0, [x0, 60]
-	ubfx	x20, x20, 21, 3
-	mov	w4, w23
-	mov	w3, w20
-	ldr	w21, [x1, 40]
-	mov	w1, 1
 	bl	flash_start_tlc_page_prog
-	and	w21, w21, 2097151
 	bl	nandc_wait_flash_ready
-	ldr	x7, [x19]
+	ldr	x7, [x20]
 	mov	w4, w21
-	ldr	x0, [x22]
-	mov	w3, w20
+	ldr	x0, [x23]
+	mov	w3, w19
+	mov	w1, w22
 	mov	w2, 26
-	mov	w1, 1
 	ldr	x5, [x0, 8]
 	ldr	x6, [x0, 24]
 	ldrb	w0, [x7, 60]
 	bl	flash_start_tlc_page_prog
 	bl	nandc_wait_flash_ready
-	ldp	x7, x0, [x19]
-	mov	w4, w23
-	mov	w3, w20
+	ldp	x7, x0, [x20]
+	mov	w4, w25
+	mov	w3, w19
 	mov	w1, w24
 	mov	w2, 17
 	ldr	x5, [x0, 8]
@@ -13442,10 +13927,10 @@ sblk_xlc_prog_pages:
 	ldrb	w0, [x7, 60]
 	bl	flash_start_tlc_page_prog
 	bl	nandc_wait_flash_ready
-	ldr	x7, [x19]
+	ldr	x7, [x20]
 	mov	w4, w21
-	ldr	x0, [x22, 8]
-	mov	w3, w20
+	ldr	x0, [x23, 8]
+	mov	w3, w19
 	mov	w1, w24
 	mov	w2, 26
 	ldr	x5, [x0, 8]
@@ -13453,10 +13938,10 @@ sblk_xlc_prog_pages:
 	ldrb	w0, [x7, 60]
 	bl	flash_start_tlc_page_prog
 	bl	nandc_wait_flash_ready
-	ldr	x7, [x19]
-	mov	w4, w23
-	ldr	x0, [x19, 16]
-	mov	w3, w20
+	ldr	x7, [x20]
+	mov	w4, w25
+	ldr	x0, [x20, 16]
+	mov	w3, w19
 	mov	w2, 17
 	mov	w1, 3
 	ldr	x5, [x0, 8]
@@ -13464,41 +13949,41 @@ sblk_xlc_prog_pages:
 	ldrb	w0, [x7, 60]
 	bl	flash_start_tlc_page_prog
 	bl	nandc_wait_flash_ready
-	ldr	x0, [x22, 16]
+	ldr	x0, [x23, 16]
 	mov	w1, 3
-	ldr	x7, [x19]
+	ldr	x7, [x20]
 	mov	w4, w21
-	mov	w3, w20
+	mov	w3, w19
 	mov	w2, 16
 	ldr	x5, [x0, 8]
 	ldr	x6, [x0, 24]
 	ldrb	w0, [x7, 60]
 	bl	flash_start_tlc_page_prog
-	ldr	x1, [x19]
+	ldr	x1, [x20]
 	mov	w0, 5
+	strb	w22, [x1, 59]
 	strb	w0, [x1, 58]
-	mov	w0, 1
-	strb	w0, [x1, 59]
 	mov	w0, -1
 	strb	w0, [x1]
-	adrp	x0, .LANCHOR54
-	add	x0, x0, :lo12:.LANCHOR54
+	adrp	x0, .LANCHOR56
+	add	x0, x0, :lo12:.LANCHOR56
 	bl	buf_add_tail
-.L2270:
+.L2300:
 	mov	w0, 0
+	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 64
+	ldp	x29, x30, [sp], 80
 	ret
-.L2268:
+.L2298:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2267
-.L2269:
-	mov	x0, x19
+	b	.L2297
+.L2299:
+	mov	x0, x20
 	bl	queue_tlc_prog_cmd
-	b	.L2270
+	b	.L2300
 	.size	sblk_xlc_prog_pages, .-sblk_xlc_prog_pages
 	.section	.text.sblk_3d_tlc_dump_prog,"ax",@progbits
 	.align	2
@@ -13506,48 +13991,59 @@ sblk_xlc_prog_pages:
 	.type	sblk_3d_tlc_dump_prog, %function
 sblk_3d_tlc_dump_prog:
 	stp	x29, x30, [sp, -48]!
+	mov	w1, 24
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	mov	x19, x0
-	adrp	x0, .LC133
-	add	x0, x0, :lo12:.LC133
-	ldr	w3, [x19, 40]
-	str	x21, [sp, 32]
-	and	w20, w3, 2097151
+	mov	x20, x0
+	adrp	x0, .LANCHOR31
+	stp	x21, x22, [sp, 32]
+	mov	w22, 1
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	ldr	w3, [x20, 40]
+	sub	w1, w1, w0
+	lsl	w19, w22, w0
+	sub	w19, w19, #1
+	lsl	w21, w22, w1
+	sub	w21, w21, #1
+	and	w21, w21, w3
+	lsr	w1, w3, w1
 	mov	w2, w3
-	ubfx	x21, x3, 21, 3
-	mov	w1, w20
+	and	w19, w19, w1
+	adrp	x0, .LC135
+	mov	w1, w21
+	add	x0, x0, :lo12:.LC135
 	bl	printf
-	ldr	x5, [x19, 8]
-	mov	w4, w20
-	ldr	x6, [x19, 24]
-	mov	w3, w21
+	and	w19, w19, 255
+	ldr	x5, [x20, 8]
+	ldr	x6, [x20, 24]
+	mov	w4, w21
+	mov	w3, w19
+	mov	w1, w22
 	mov	w2, 26
-	mov	w1, 1
 	mov	w0, 0
 	bl	flash_start_tlc_page_prog
 	bl	nandc_wait_flash_ready
-	ldr	x5, [x19, 8]
-	mov	w4, w20
-	ldr	x6, [x19, 24]
-	mov	w3, w21
+	ldr	x5, [x20, 8]
+	mov	w4, w21
+	ldr	x6, [x20, 24]
+	mov	w3, w19
 	mov	w2, 26
 	mov	w1, 2
 	mov	w0, 0
 	bl	flash_start_tlc_page_prog
 	bl	nandc_wait_flash_ready
-	ldr	x5, [x19, 8]
-	mov	w4, w20
-	ldr	x6, [x19, 24]
-	mov	w3, w21
+	ldr	x5, [x20, 8]
+	mov	w4, w21
+	ldr	x6, [x20, 24]
+	mov	w3, w19
 	mov	w2, 16
 	mov	w1, 3
 	mov	w0, 0
 	bl	flash_start_tlc_page_prog
 	bl	nandc_wait_flash_ready
-	ldr	x21, [sp, 32]
-	ldr	w0, [x19, 40]
+	ldr	w0, [x20, 40]
 	mov	w1, 64
+	ldp	x21, x22, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	b	flash_wait_device_ready
@@ -13563,24 +14059,28 @@ flash_start_3d_mlc_page_prog:
 	and	w21, w0, 255
 	adrp	x0, .LANCHOR18
 	stp	x19, x20, [sp, 16]
-	str	x23, [sp, 48]
-	and	w19, w1, 255
-	ldrb	w0, [x0, #:lo12:.LANCHOR18]
+	stp	x23, x24, [sp, 48]
+	and	w24, w1, 255
+	ldrb	w1, [x0, #:lo12:.LANCHOR18]
 	mov	w20, w2
 	mov	x22, x3
 	mov	x23, x4
-	cmp	w0, w19
-	bhi	.L2275
-	adrp	x1, .LANCHOR171
+	cmp	w1, w24
+	mov	x19, x0
+	bhi	.L2305
+	adrp	x1, .LANCHOR174
 	adrp	x0, .LC0
-	mov	w2, 757
-	add	x1, x1, :lo12:.LANCHOR171
+	mov	w2, 772
+	add	x1, x1, :lo12:.LANCHOR174
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2275:
+.L2305:
+	ldrb	w0, [x19, #:lo12:.LANCHOR18]
+	cmp	w0, w24
+	bls	.L2304
 	adrp	x0, .LANCHOR30
 	add	x0, x0, :lo12:.LANCHOR30
-	ldrb	w4, [x0, w19, sxtw]
+	ldrb	w4, [x0, w24, sxtw]
 	adrp	x0, .LANCHOR13
 	ldr	x19, [x0, #:lo12:.LANCHOR13]
 	mov	w0, w4
@@ -13599,17 +14099,18 @@ flash_start_3d_mlc_page_prog:
 	str	w0, [x19, 2052]
 	mov	w0, w20
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR31+9
+	adrp	x0, .LANCHOR32+9
 	mov	x3, x23
 	mov	x2, x22
-	ldrb	w1, [x0, #:lo12:.LANCHOR31+9]
+	ldrb	w1, [x0, #:lo12:.LANCHOR32+9]
 	mov	w0, 1
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
-	ldr	x23, [sp, 48]
 	str	w21, [x19, 2056]
+.L2304:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
 	.size	flash_start_3d_mlc_page_prog, .-flash_start_3d_mlc_page_prog
@@ -13618,59 +14119,84 @@ flash_start_3d_mlc_page_prog:
 	.global	sblk_3d_mlc_prog_pages
 	.type	sblk_3d_mlc_prog_pages, %function
 sblk_3d_mlc_prog_pages:
-	stp	x29, x30, [sp, -48]!
+	stp	x29, x30, [sp, -80]!
+	ubfiz	x1, x1, 4, 32
+	add	x1, x1, 8
 	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	add	x21, x0, x1
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR31
+	adrp	x24, .LANCHOR56
+	str	x25, [sp, 64]
+	add	x23, x23, :lo12:.LANCHOR31
+	add	x24, x24, :lo12:.LANCHOR56
+	add	x25, x0, 8
 	stp	x19, x20, [sp, 16]
-	mov	x20, x0
-	ldr	x0, [x0]
+	mov	w22, 1
+.L2309:
+	cmp	x21, x25
+	bne	.L2312
+	mov	w0, 0
+	ldr	x25, [sp, 64]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	ret
+.L2312:
+	ldr	x0, [x25, -8]
 	ldr	w19, [x0, 40]
-	str	x21, [sp, 32]
-.L2278:
+.L2310:
 	mov	w1, 1
 	mov	w0, w19
 	bl	queue_lun_state
-	cbnz	w0, .L2279
-	ldr	x0, [x20]
-	ldr	w19, [x0, 40]
-	and	w21, w19, 2097151
-	ubfx	x19, x19, 21, 3
+	cbnz	w0, .L2311
+	ldr	x0, [x25, -8]
+	mov	w2, 24
+	ldrb	w1, [x23]
+	add	x25, x25, 16
+	sub	w2, w2, w1
+	ldr	w0, [x0, 40]
+	lsl	w19, w22, w1
+	lsl	w20, w22, w2
+	sub	w19, w19, #1
+	sub	w20, w20, #1
+	and	w20, w20, w0
+	lsr	w0, w0, w2
+	and	w19, w19, w0
+	and	w19, w19, 255
 	mov	w0, w19
 	bl	zftl_flash_exit_slc_mode
-	ldr	x0, [x20]
-	mov	w2, w21
+	ldr	x0, [x25, -24]
+	mov	w2, w20
 	mov	w1, w19
 	ldr	x3, [x0, 8]
 	ldr	x4, [x0, 24]
 	mov	w0, 16
 	bl	flash_start_3d_mlc_page_prog
 	bl	nandc_wait_flash_ready
-	ldr	x0, [x20, 8]
-	add	w2, w21, 1
+	ldr	x0, [x25, -16]
+	add	w2, w20, 1
 	mov	w1, w19
 	ldr	x3, [x0, 8]
 	ldr	x4, [x0, 24]
 	mov	w0, 16
 	bl	flash_start_3d_mlc_page_prog
-	bl	nandc_de_cs.constprop.29
-	ldr	x1, [x20]
+	bl	nandc_de_cs.constprop.30
+	ldr	x1, [x25, -24]
 	mov	w0, 4
+	strb	w22, [x1, 59]
 	strb	w0, [x1, 58]
-	mov	w0, 1
-	strb	w0, [x1, 59]
 	mov	w0, -1
 	strb	w0, [x1]
-	adrp	x0, .LANCHOR54
-	add	x0, x0, :lo12:.LANCHOR54
+	mov	x0, x24
 	bl	buf_add_tail
-	ldr	x21, [sp, 32]
-	mov	w0, 0
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
-	ret
-.L2279:
+	b	.L2309
+.L2311:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2278
+	b	.L2310
 	.size	sblk_3d_mlc_prog_pages, .-sblk_3d_mlc_prog_pages
 	.section	.text.sblk_mlc_dump_prog,"ax",@progbits
 	.align	2
@@ -13678,40 +14204,51 @@ sblk_3d_mlc_prog_pages:
 	.type	sblk_mlc_dump_prog, %function
 sblk_mlc_dump_prog:
 	stp	x29, x30, [sp, -48]!
+	mov	w2, 24
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	mov	x19, x0
-	ldr	w20, [x0, 40]
+	mov	x20, x0
+	adrp	x0, .LANCHOR31
+	ldrb	w19, [x0, #:lo12:.LANCHOR31]
+	mov	w0, 1
+	ldr	w1, [x20, 40]
+	sub	w2, w2, w19
 	str	x21, [sp, 32]
-	and	w21, w20, 2097151
-	ubfx	x20, x20, 21, 3
-	mov	w0, w20
+	lsl	w19, w0, w19
+	sub	w19, w19, #1
+	lsl	w21, w0, w2
+	sub	w21, w21, #1
+	and	w21, w21, w1
+	lsr	w1, w1, w2
+	and	w19, w19, w1
+	and	w19, w19, 255
+	mov	w0, w19
 	bl	zftl_flash_exit_slc_mode
-	ldr	w2, [x19, 40]
+	ldr	w2, [x20, 40]
 	mov	w1, w21
-	adrp	x0, .LC134
-	add	x0, x0, :lo12:.LC134
+	adrp	x0, .LC136
+	add	x0, x0, :lo12:.LC136
 	add	w3, w2, 1
 	bl	printf
-	ldr	x3, [x19, 8]
+	ldr	x3, [x20, 8]
 	mov	w2, w21
-	ldr	x4, [x19, 24]
-	mov	w1, w20
+	ldr	x4, [x20, 24]
+	mov	w1, w19
 	mov	w0, 16
 	bl	flash_start_3d_mlc_page_prog
 	bl	nandc_wait_flash_ready
-	ldr	x3, [x19, 8]
+	ldr	x3, [x20, 8]
 	add	w2, w21, 1
-	ldr	x4, [x19, 24]
-	mov	w1, w20
+	ldr	x4, [x20, 24]
+	mov	w1, w19
 	mov	w0, 16
 	bl	flash_start_3d_mlc_page_prog
 	bl	nandc_wait_flash_ready
-	ldr	w0, [x19, 40]
+	ldr	w0, [x20, 40]
 	mov	w1, 64
 	bl	flash_wait_device_ready
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.29
+	bl	nandc_de_cs.constprop.30
 	ldr	x21, [sp, 32]
 	mov	w0, w2
 	ldp	x19, x20, [sp, 16]
@@ -13725,93 +14262,119 @@ sblk_mlc_dump_prog:
 flash_start_page_prog:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR18
-	stp	x25, x26, [sp, 64]
-	and	w24, w0, 255
-	stp	x19, x20, [sp, 16]
-	mov	x25, x2
 	stp	x21, x22, [sp, 32]
-	mov	x26, x3
-	ldrb	w0, [x23, #:lo12:.LANCHOR18]
-	and	w20, w1, 2097151
+	and	w21, w0, 255
+	adrp	x0, .LANCHOR31
+	stp	x19, x20, [sp, 16]
+	stp	x25, x26, [sp, 64]
+	mov	w19, 24
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	mov	w20, 1
 	str	x27, [sp, 80]
-	ubfx	x27, x1, 21, 3
-	ubfx	x22, x1, 24, 2
-	cmp	w0, w27
-	bhi	.L2284
-	adrp	x1, .LANCHOR172
+	adrp	x27, .LANCHOR18
+	sub	w25, w19, w0
+	stp	x23, x24, [sp, 48]
+	lsl	w20, w20, w0
+	sub	w20, w20, #1
+	lsr	w0, w1, w25
+	and	w20, w20, w0
+	ldrb	w0, [x27, #:lo12:.LANCHOR18]
+	and	w20, w20, 255
+	mov	w24, w1
+	mov	x22, x2
+	mov	x23, x3
+	cmp	w0, w20
+	bhi	.L2317
+	adrp	x1, .LANCHOR175
 	adrp	x0, .LC0
-	mov	w2, 804
-	add	x1, x1, :lo12:.LANCHOR172
+	mov	w2, 821
+	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2284:
+.L2317:
+	ldrb	w0, [x27, #:lo12:.LANCHOR18]
+	cmp	w0, w20
+	bls	.L2316
 	adrp	x0, .LANCHOR30
 	add	x0, x0, :lo12:.LANCHOR30
-	ldrb	w21, [x0, w27, sxtw]
+	mov	w19, 1
+	lsl	w19, w19, w25
+	sub	w19, w19, #1
+	ldrb	w26, [x0, w20, sxtw]
 	adrp	x0, .LANCHOR13
-	ldr	x19, [x0, #:lo12:.LANCHOR13]
+	and	w19, w19, w24
+	ldr	x25, [x0, #:lo12:.LANCHOR13]
 	bl	nandc_rdy_status
-	cbnz	w0, .L2285
-	ldrb	w0, [x23, #:lo12:.LANCHOR18]
+	cbnz	w0, .L2319
+	ldrb	w0, [x27, #:lo12:.LANCHOR18]
 	cmp	w0, 1
-	bne	.L2286
+	bne	.L2320
 	bl	nandc_wait_flash_ready
-.L2285:
-	mov	w0, w21
+.L2319:
+	mov	w0, w26
 	bl	hynix_reconfig_rr_para
-	mov	w0, w21
+	mov	w0, w26
 	bl	nandc_cs
-	cbnz	w22, .L2287
-	mov	w0, w20
+	tst	x24, 50331648
+	bne	.L2321
+	mov	w0, w19
 	bl	slc_phy_page_address_calc
-	mov	w20, w0
+	mov	w19, w0
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L2288
-	mov	w0, w21
+	cbz	w0, .L2322
+	mov	w0, w26
 	bl	zftl_flash_enter_slc_mode
-.L2288:
-	ubfiz	x21, x21, 8, 8
+.L2322:
+	ubfiz	x20, x26, 8, 8
 	mov	w0, 128
-	add	x19, x19, x21
-	str	w0, [x19, 2056]
-	and	w0, w20, 255
-	str	wzr, [x19, 2052]
-	str	wzr, [x19, 2052]
-	str	w0, [x19, 2052]
-	lsr	w0, w20, 8
-	str	w0, [x19, 2052]
-	lsr	w0, w20, 16
-	str	w0, [x19, 2052]
-	mov	w0, w20
+	add	x20, x25, x20
+	str	w0, [x20, 2056]
+	and	w0, w19, 255
+	str	wzr, [x20, 2052]
+	str	wzr, [x20, 2052]
+	str	w0, [x20, 2052]
+	lsr	w0, w19, 8
+	str	w0, [x20, 2052]
+	lsr	w0, w19, 16
+	str	w0, [x20, 2052]
+	mov	w0, w19
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR31+9
-	mov	x3, x26
-	mov	x2, x25
-	ldrb	w1, [x0, #:lo12:.LANCHOR31+9]
+	adrp	x0, .LANCHOR32+9
+	mov	x3, x23
+	mov	x2, x22
+	ldrb	w1, [x0, #:lo12:.LANCHOR32+9]
 	mov	w0, 1
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
-	ldr	x27, [sp, 80]
-	ldp	x21, x22, [sp, 32]
+	mov	x0, 200
+	bl	udelay
+	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	str	w24, [x19, 2056]
+	ldr	x27, [sp, 80]
+	str	w21, [x20, 2056]
 	ldp	x19, x20, [sp, 16]
-	ldp	x23, x24, [sp, 48]
+	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 96
-	b	nandc_de_cs.constprop.29
-.L2286:
+	b	nandc_de_cs.constprop.30
+.L2320:
 	mov	w2, 64
-	mov	w1, w20
-	mov	w0, w27
+	mov	w1, w19
+	mov	w0, w20
 	bl	flash_wait_device_ready_raw
-	b	.L2285
-.L2287:
-	mov	w0, w21
+	b	.L2319
+.L2321:
+	mov	w0, w26
 	bl	zftl_flash_exit_slc_mode
-	b	.L2288
+	b	.L2322
+.L2316:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	ret
 	.size	flash_start_page_prog, .-flash_start_page_prog
 	.section	.text.queue_prog_cmd,"ax",@progbits
 	.align	2
@@ -13826,27 +14389,37 @@ queue_prog_cmd:
 	mov	x19, x0
 	mov	w0, 16
 	bl	flash_start_page_prog
-	adrp	x0, .LANCHOR54
+	adrp	x0, .LANCHOR56
 	ldr	w3, [x19, 40]
-	ldrb	w1, [x0, #:lo12:.LANCHOR54]
+	ldrb	w1, [x0, #:lo12:.LANCHOR56]
 	cmp	w1, 255
-	beq	.L2294
-	adrp	x2, .LANCHOR50
-	add	x2, x2, :lo12:.LANCHOR50
-	ubfx	x3, x3, 21, 3
-	mov	x6, x2
-.L2296:
-	add	x4, x2, x1, lsl 6
-	ldr	w5, [x4, 40]
-	ubfx	x5, x5, 21, 3
-	cmp	w3, w5
-	bne	.L2295
-	ldrb	w5, [x4, 58]
-	cmp	w5, 7
-	bne	.L2295
+	beq	.L2328
+	adrp	x2, .LANCHOR31
+	mov	w5, 24
+	adrp	x6, .LANCHOR52
+	add	x6, x6, :lo12:.LANCHOR52
+	ldrb	w4, [x2, #:lo12:.LANCHOR31]
+	mov	w2, 1
+	mov	x8, x6
+	sub	w5, w5, w4
+	lsl	w2, w2, w4
+	sub	w2, w2, #1
+	and	w2, w2, 65535
+	asr	w3, w3, w5
+	and	w3, w3, w2
+.L2330:
+	add	x7, x6, x1, lsl 6
+	ldr	w4, [x7, 40]
+	lsr	w4, w4, w5
+	and	w4, w2, w4
+	cmp	w3, w4
+	bne	.L2329
+	ldrb	w4, [x7, 58]
+	cmp	w4, 7
+	bne	.L2329
 	mov	w1, 3
-	strb	w1, [x4, 58]
-.L2294:
+	strb	w1, [x7, 58]
+.L2328:
 	mov	w1, 3
 	strb	w1, [x19, 58]
 	mov	w1, 1
@@ -13854,16 +14427,16 @@ queue_prog_cmd:
 	mov	w1, -1
 	strb	w1, [x19]
 	mov	x1, x19
-	add	x0, x0, :lo12:.LANCHOR54
+	add	x0, x0, :lo12:.LANCHOR56
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	buf_add_tail
-.L2295:
+.L2329:
 	lsl	x1, x1, 6
-	ldrb	w1, [x6, x1]
+	ldrb	w1, [x8, x1]
 	cmp	w1, 255
-	bne	.L2296
-	b	.L2294
+	bne	.L2330
+	b	.L2328
 	.size	queue_prog_cmd, .-queue_prog_cmd
 	.section	.text.sblk_prog_page,"ax",@progbits
 	.align	2
@@ -13879,123 +14452,140 @@ sblk_prog_page:
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	str	x27, [sp, 80]
-	cbz	w0, .L2303
+	stp	x27, x28, [sp, 80]
+	cbz	w0, .L2337
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2303
+	tbz	x0, 8, .L2337
 	ldr	w1, [x19, 40]
-	adrp	x0, .LC135
+	adrp	x0, .LC137
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC135
+	add	x0, x0, :lo12:.LC137
 	bl	printf
-.L2303:
-	adrp	x25, .LANCHOR39
-	adrp	x23, .LANCHOR50
-	add	x25, x25, :lo12:.LANCHOR39
-	add	x23, x23, :lo12:.LANCHOR50
+.L2337:
+	adrp	x23, .LANCHOR41
+	adrp	x25, .LANCHOR31
+	add	x23, x23, :lo12:.LANCHOR41
+	add	x26, x25, :lo12:.LANCHOR31
 	mov	w21, 0
-	mov	w24, 1
-.L2304:
-	cbnz	w20, .L2315
-.L2328:
+.L2338:
+	cbnz	w20, .L2349
+.L2362:
 	mov	w0, 0
-	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2315:
-	ldrb	w26, [x19]
+.L2349:
+	ldrb	w24, [x19]
 	ldr	w22, [x19, 40]
-.L2305:
+.L2339:
 	mov	w1, 1
 	mov	w0, w22
 	bl	queue_lun_state
-	cbnz	w0, .L2306
+	cbnz	w0, .L2340
 	cmp	w20, 1
-	beq	.L2307
-	ldrb	w0, [x25]
-	cbnz	w0, .L2308
-.L2307:
+	beq	.L2341
+	ldrb	w0, [x23]
+	cbnz	w0, .L2342
+.L2341:
 	mov	x0, x19
 	bl	queue_prog_cmd
-.L2309:
+.L2343:
 	subs	w20, w20, #1
-	beq	.L2328
-	ubfiz	x19, x26, 6, 8
-	add	x19, x23, x19
-	b	.L2304
-.L2306:
+	beq	.L2362
+	ubfiz	x24, x24, 6, 8
+	adrp	x19, .LANCHOR52
+	add	x19, x19, :lo12:.LANCHOR52
+	add	x19, x19, x24
+	b	.L2338
+.L2340:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2305
-.L2308:
+	b	.L2339
+.L2342:
+	ldrb	w1, [x25, #:lo12:.LANCHOR31]
+	mov	w27, 24
+	mov	w0, 1
+	sub	w27, w27, w1
+	lsl	w0, w0, w1
+	sub	w0, w0, #1
+	lsr	w27, w22, w27
+	and	w27, w27, w0
 	ldrb	w0, [x19]
-	ubfx	x27, x22, 21, 3
+	and	w27, w27, 65535
 	cmp	w0, 255
-	bne	.L2310
-	adrp	x1, .LANCHOR173
+	bne	.L2344
+	adrp	x1, .LANCHOR176
 	adrp	x0, .LC0
 	mov	w2, 583
-	add	x1, x1, :lo12:.LANCHOR173
+	add	x1, x1, :lo12:.LANCHOR176
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2310:
+.L2344:
 	ldrb	w0, [x19]
-	add	x0, x23, x0, lsl 6
-	ldr	w5, [x0, 40]
-	ubfx	x0, x5, 21, 3
-	cmp	w27, w0
-	bne	.L2311
-	adrp	x0, .LANCHOR66
-	ldrh	w2, [x0, #:lo12:.LANCHOR66]
-	adrp	x0, .LANCHOR67
-	ldrb	w3, [x0, #:lo12:.LANCHOR67]
-	mov	w0, 21
-	sub	w0, w0, w2
-	lsl	w1, w24, w2
-	sub	w3, w3, #1
-	sub	w1, w1, #1
-	lsl	w0, w24, w0
+	adrp	x1, .LANCHOR52
+	add	x1, x1, :lo12:.LANCHOR52
+	mov	w3, 24
+	mov	w28, 1
+	add	x0, x1, x0, lsl 6
+	ldr	w4, [x0, 40]
+	ldrb	w0, [x26]
+	sub	w3, w3, w0
+	lsl	w0, w28, w0
+	sub	w0, w0, #1
+	lsr	w1, w4, w3
+	and	w0, w0, w1
+	cmp	w27, w0, uxth
+	bne	.L2345
+	adrp	x0, .LANCHOR68
+	ldrh	w2, [x0, #:lo12:.LANCHOR68]
+	adrp	x0, .LANCHOR69
+	ldrb	w1, [x0, #:lo12:.LANCHOR69]
+	sub	w0, w3, w2
+	lsr	w5, w22, w2
+	sub	w3, w1, #1
+	lsl	w0, w28, w0
 	sub	w0, w0, #1
+	lsl	w1, w28, w2
 	and	w0, w0, w3
-	lsr	w4, w22, w2
+	sub	w1, w1, #1
 	and	w0, w0, 65535
 	and	w1, w1, 65535
-	and	w4, w0, w4
-	lsr	w2, w5, w2
+	and	w5, w0, w5
+	lsr	w2, w4, w2
 	and	w0, w0, w2
 	and	w22, w1, w22
-	cmp	w4, w0
-	and	w1, w1, w5
+	cmp	w5, w0
+	and	w1, w1, w4
 	ccmp	w22, w1, 0, ne
-	bne	.L2311
+	bne	.L2345
 	cmp	w21, w3
-	beq	.L2311
+	beq	.L2345
 	ldr	w1, [x19, 40]
 	mov	w0, 17
 	ldr	x2, [x19, 8]
-	add	w21, w21, 1
+	add	w21, w21, w28
 	ldr	x3, [x19, 24]
 	bl	flash_start_page_prog
-	strb	w24, [x19, 59]
+	strb	w28, [x19, 59]
 	mov	w0, 9
 	strb	w0, [x19, 58]
 	mov	w0, -1
 	strb	w0, [x19]
 	mov	x1, x19
-	adrp	x0, .LANCHOR54
-	add	x0, x0, :lo12:.LANCHOR54
+	adrp	x0, .LANCHOR56
+	add	x0, x0, :lo12:.LANCHOR56
 	bl	buf_add_tail
-	b	.L2309
-.L2311:
+	b	.L2343
+.L2345:
 	mov	x0, x19
 	mov	w21, 0
 	bl	queue_prog_cmd
-	b	.L2309
+	b	.L2343
 	.size	sblk_prog_page, .-sblk_prog_page
 	.section	.text.ftl_flush,"ax",@progbits
 	.align	2
@@ -14003,22 +14593,22 @@ sblk_prog_page:
 	.type	ftl_flush, %function
 ftl_flush:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR121
+	adrp	x0, .LANCHOR123
 	add	x29, sp, 0
-	ldrb	w1, [x0, #:lo12:.LANCHOR121]
+	ldrb	w1, [x0, #:lo12:.LANCHOR123]
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	adrp	x20, .LANCHOR174
-	cbz	w1, .L2331
-	ldrb	w2, [x20, #:lo12:.LANCHOR174]
-	adrp	x0, .LANCHOR50
-	add	x0, x0, :lo12:.LANCHOR50
+	adrp	x20, .LANCHOR177
+	cbz	w1, .L2365
+	ldrb	w2, [x20, #:lo12:.LANCHOR177]
+	adrp	x0, .LANCHOR52
+	add	x0, x0, :lo12:.LANCHOR52
 	add	x0, x0, x2, lsl 6
 	bl	sblk_prog_page
-.L2331:
+.L2365:
 	mov	w0, -1
-	strb	wzr, [x19, #:lo12:.LANCHOR121]
-	strb	w0, [x20, #:lo12:.LANCHOR174]
+	strb	wzr, [x19, #:lo12:.LANCHOR123]
+	strb	w0, [x20, #:lo12:.LANCHOR177]
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	ldp	x19, x20, [sp, 16]
@@ -14033,80 +14623,84 @@ ftl_flush:
 flash_prog_page_en:
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	and	w23, w0, 255
+	stp	x21, x22, [sp, 32]
+	and	w21, w0, 255
 	and	w0, w5, 255
 	stp	x19, x20, [sp, 16]
 	str	w0, [x29, 124]
 	adrp	x0, .LANCHOR18
-	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
 	mov	w20, w1
 	stp	x27, x28, [sp, 80]
-	mov	x22, x2
-	ldrb	w0, [x0, #:lo12:.LANCHOR18]
-	mov	x21, x3
+	mov	x23, x2
+	ldrb	w1, [x0, #:lo12:.LANCHOR18]
+	mov	x22, x3
 	stp	x25, x26, [sp, 64]
 	mov	w28, w4
-	ubfx	x19, x20, 24, 2
-	cmp	w0, w23
-	bhi	.L2337
-	adrp	x1, .LANCHOR175
+	ubfx	x24, x20, 24, 2
+	cmp	w1, w21
+	mov	x19, x0
+	bhi	.L2371
+	adrp	x1, .LANCHOR178
 	adrp	x0, .LC0
-	mov	w2, 547
-	add	x1, x1, :lo12:.LANCHOR175
+	mov	w2, 554
+	add	x1, x1, :lo12:.LANCHOR178
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2337:
+.L2371:
+	ldrb	w0, [x19, #:lo12:.LANCHOR18]
+	cmp	w0, w21
+	bls	.L2382
 	adrp	x0, .LANCHOR30
 	add	x0, x0, :lo12:.LANCHOR30
-	ldrb	w27, [x0, w23, sxtw]
-	cbnz	w19, .L2348
+	ldrb	w27, [x0, w21, sxtw]
+	cbnz	w24, .L2384
 	adrp	x0, .LANCHOR0
 	ldrb	w1, [x0, #:lo12:.LANCHOR0]
 	adrp	x0, .LANCHOR1
-	cbz	w1, .L2339
+	cbz	w1, .L2374
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
-	cbz	w1, .L2348
-.L2339:
+	cbz	w1, .L2384
+.L2374:
 	adrp	x1, .LANCHOR2
 	ldrb	w0, [x0, #:lo12:.LANCHOR1]
 	ldrh	w1, [x1, #:lo12:.LANCHOR2]
 	udiv	w19, w20, w1
 	mul	w19, w19, w1
 	sub	w1, w20, w19
-	cbz	w0, .L2340
+	cbz	w0, .L2375
 	add	w19, w19, w1, lsl 1
-.L2338:
+.L2373:
 	adrp	x24, .LANCHOR14
-	adrp	x25, .LC136
+	adrp	x25, .LC138
 	add	x24, x24, :lo12:.LANCHOR14
-	add	x25, x25, :lo12:.LC136
-	adrp	x26, .LANCHOR163
-.L2344:
+	add	x25, x25, :lo12:.LC138
+	adrp	x26, .LANCHOR166
+.L2379:
 	ldr	w0, [x24]
-	tbz	x0, 4, .L2341
+	tbz	x0, 4, .L2376
 	mov	w3, w19
 	mov	w2, w20
 	mov	w1, w27
 	mov	x0, x25
 	bl	printf
-.L2341:
+.L2376:
 	mov	w4, w28
-	mov	x3, x21
-	mov	x2, x22
+	mov	x3, x22
+	mov	x2, x23
 	mov	w1, w19
 	mov	w0, w27
 	bl	flash_prog_page
 	mov	w5, w0
 	ldr	w0, [x29, 124]
-	cbz	w0, .L2342
-	adrp	x6, .LANCHOR164
-	ldr	x3, [x26, #:lo12:.LANCHOR163]
+	cbz	w0, .L2377
+	adrp	x6, .LANCHOR167
+	ldr	x3, [x26, #:lo12:.LANCHOR166]
 	mov	w4, w28
 	str	x6, [x29, 112]
-	ldr	x2, [x6, #:lo12:.LANCHOR164]
+	ldr	x2, [x6, #:lo12:.LANCHOR167]
 	mov	w1, w20
-	mov	w0, w23
+	mov	w0, w21
 	str	w5, [x29, 104]
 	bl	flash_read_page_en
 	cmp	w0, 512
@@ -14114,84 +14708,85 @@ flash_prog_page_en:
 	mov	w4, w0
 	ccmn	w0, #1, 4, ne
 	mov	x7, x6
-	beq	.L2343
-	ldr	x0, [x6, #:lo12:.LANCHOR164]
-	ldr	w1, [x22]
+	beq	.L2378
+	ldr	x0, [x6, #:lo12:.LANCHOR167]
+	ldr	w1, [x23]
 	ldr	w5, [x29, 104]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	bne	.L2343
-	ldr	x0, [x26, #:lo12:.LANCHOR163]
-	ldr	w1, [x21]
+	bne	.L2378
+	ldr	x0, [x26, #:lo12:.LANCHOR166]
+	ldr	w1, [x22]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	beq	.L2342
-.L2343:
+	beq	.L2377
+.L2378:
 	str	w4, [x29, 112]
 	mov	w3, 4
 	str	x7, [x29, 104]
 	mov	w2, w3
-	mov	x1, x22
-	adrp	x0, .LC137
-	add	x0, x0, :lo12:.LC137
+	mov	x1, x23
+	adrp	x0, .LC139
+	add	x0, x0, :lo12:.LC139
 	bl	rknand_print_hex
 	mov	w3, 4
-	mov	x1, x21
+	mov	x1, x22
 	mov	w2, w3
-	adrp	x0, .LC138
-	add	x0, x0, :lo12:.LC138
+	adrp	x0, .LC140
+	add	x0, x0, :lo12:.LC140
 	bl	rknand_print_hex
-	adrp	x0, .LANCHOR163
+	adrp	x0, .LANCHOR166
 	mov	w3, 4
 	mov	w2, w3
-	ldr	x1, [x0, #:lo12:.LANCHOR163]
-	adrp	x0, .LC139
-	add	x0, x0, :lo12:.LC139
+	ldr	x1, [x0, #:lo12:.LANCHOR166]
+	adrp	x0, .LC141
+	add	x0, x0, :lo12:.LC141
 	bl	rknand_print_hex
 	ldr	x7, [x29, 104]
 	mov	w3, 4
-	adrp	x0, .LC140
+	adrp	x0, .LC142
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC140
-	ldr	x1, [x7, #:lo12:.LANCHOR164]
+	add	x0, x0, :lo12:.LC142
+	ldr	x1, [x7, #:lo12:.LANCHOR167]
 	bl	rknand_print_hex
 	ldr	w4, [x29, 112]
 	cmp	w4, 512
-	beq	.L2344
-.L2346:
+	beq	.L2379
+.L2381:
 	mov	w1, w20
-	adrp	x0, .LC141
-	add	x0, x0, :lo12:.LC141
+	adrp	x0, .LC143
+	add	x0, x0, :lo12:.LC143
 	bl	printf
-	mov	w2, 578
-	adrp	x1, .LANCHOR175
+	adrp	x1, .LANCHOR178
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR175
+	mov	w2, 587
+	add	x1, x1, :lo12:.LANCHOR178
 	add	x0, x0, :lo12:.LC0
 	bl	printf
+.L2382:
 	mov	w0, -1
-.L2345:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 128
-	ret
-.L2340:
+	b	.L2370
+.L2375:
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
 	ldrh	w0, [x0, w1, uxtw 1]
 	add	w19, w0, w19
-	b	.L2338
-.L2348:
+	b	.L2373
+.L2384:
 	mov	w19, w20
-	b	.L2338
-.L2342:
+	b	.L2373
+.L2377:
 	mov	w0, w5
 	cmn	w5, #1
-	bne	.L2345
-	b	.L2346
+	beq	.L2381
+.L2370:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
 	.size	flash_prog_page_en, .-flash_prog_page_en
 	.section	.text.ftl_test_block,"ax",@progbits
 	.align	2
@@ -14203,113 +14798,113 @@ ftl_test_block:
 	stp	x23, x24, [sp, 48]
 	adrp	x24, ftl_tmp_buffer
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR176
+	adrp	x25, .LANCHOR179
 	stp	x21, x22, [sp, 32]
-	adrp	x26, .LANCHOR104
+	adrp	x26, .LANCHOR106
 	and	w21, w0, 65535
-	add	x0, x26, :lo12:.LANCHOR104
+	add	x0, x26, :lo12:.LANCHOR106
 	stp	x19, x20, [sp, 16]
 	mov	w23, 0
 	stp	x27, x28, [sp, 80]
 	mov	w20, 0
-	adrp	x27, .LANCHOR67
+	adrp	x27, .LANCHOR69
 	str	x0, [x29, 112]
 	str	wzr, [x24, #:lo12:ftl_tmp_buffer]
-	add	x0, x27, :lo12:.LANCHOR67
-	str	wzr, [x25, #:lo12:.LANCHOR176]
+	add	x0, x27, :lo12:.LANCHOR69
+	str	wzr, [x25, #:lo12:.LANCHOR179]
 	str	x0, [x29, 96]
-.L2365:
+.L2401:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
 	cmp	w0, w20
-	bls	.L2375
-	add	x0, x27, :lo12:.LANCHOR67
+	bls	.L2411
+	add	x0, x27, :lo12:.LANCHOR69
 	mov	w22, 0
 	str	x0, [x29, 120]
 	adrp	x0, .LANCHOR14
 	add	x0, x0, :lo12:.LANCHOR14
 	str	x0, [x29, 104]
-	b	.L2376
-.L2374:
+	b	.L2412
+.L2410:
 	ldr	x0, [x29, 104]
 	ldr	w0, [x0]
-	tbz	x0, 12, .L2366
-	adrp	x0, .LC142
+	tbz	x0, 12, .L2402
+	adrp	x0, .LC144
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC142
+	add	x0, x0, :lo12:.LC144
 	bl	printf
-.L2366:
+.L2402:
 	ldr	x0, [x29, 96]
 	ldrb	w19, [x0]
 	madd	w19, w21, w19, w22
 	and	w19, w19, 65535
-	cbnz	w20, .L2367
+	cbnz	w20, .L2403
 	adrp	x0, .LANCHOR27
 	ldr	x0, [x0, #:lo12:.LANCHOR27]
 	ldrb	w0, [x0, 47]
 	cmp	w0, w19
-	bcs	.L2368
-.L2367:
+	bcs	.L2404
+.L2403:
 	and	w28, w20, 255
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_check_bad_block
-	cbnz	w0, .L2368
-	adrp	x0, .LANCHOR103
+	cbnz	w0, .L2404
+	adrp	x0, .LANCHOR105
 	mov	w1, w23
-	ldrh	w7, [x0, #:lo12:.LANCHOR103]
+	ldrh	w7, [x0, #:lo12:.LANCHOR105]
 	mov	w0, w28
 	mul	w26, w7, w19
 	mov	w2, w26
 	bl	flash_erase_block_en
-	cbz	w0, .L2369
-	adrp	x0, .LANCHOR71
-	ldrb	w0, [x0, #:lo12:.LANCHOR71]
+	cbz	w0, .L2405
+	adrp	x0, .LANCHOR73
+	ldrb	w0, [x0, #:lo12:.LANCHOR73]
 	cmp	w0, 2
-	bne	.L2391
+	bne	.L2427
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L2391
+	cbz	w0, .L2427
 	mov	w2, w26
 	mov	w1, 1
 	mov	w0, w28
 	bl	flash_erase_block_en
-	cbnz	w0, .L2391
-.L2373:
-	adrp	x0, .LANCHOR71
+	cbnz	w0, .L2427
+.L2409:
+	adrp	x0, .LANCHOR73
 	mov	w23, 1
-	ldrb	w0, [x0, #:lo12:.LANCHOR71]
+	ldrb	w0, [x0, #:lo12:.LANCHOR73]
 	add	w26, w26, w0, lsl 24
-.L2372:
-	adrp	x0, .LANCHOR123
+.L2408:
+	adrp	x0, .LANCHOR125
 	mov	w5, 1
-	add	x3, x25, :lo12:.LANCHOR176
+	add	x3, x25, :lo12:.LANCHOR179
 	add	x2, x24, :lo12:ftl_tmp_buffer
-	ldrb	w4, [x0, #:lo12:.LANCHOR123]
+	ldrb	w4, [x0, #:lo12:.LANCHOR125]
 	mov	w1, w26
 	mov	w0, w28
 	bl	flash_prog_page_en
-	cbz	w0, .L2368
-.L2391:
+	cbz	w0, .L2404
+.L2427:
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_mask_bad_block
-.L2368:
+.L2404:
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L2376:
+.L2412:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, w22
-	bhi	.L2374
+	bhi	.L2410
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2365
-.L2369:
-	cbz	w23, .L2372
-	b	.L2373
-.L2375:
-	cbz	w23, .L2377
+	b	.L2401
+.L2405:
+	cbz	w23, .L2408
+	b	.L2409
+.L2411:
+	cbz	w23, .L2413
 	adrp	x0, .LANCHOR7
 	mov	w1, 2
 	ldr	x0, [x0, #:lo12:.LANCHOR7]
@@ -14317,7 +14912,7 @@ ftl_test_block:
 	ldrb	w0, [x21, 2]
 	bfi	w0, w1, 3, 2
 	strb	w0, [x21, 2]
-.L2377:
+.L2413:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -14352,18 +14947,18 @@ ftl_prog_page:
 	bl	flash_prog_page_en
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L2392
-	mov	w2, 2231
-	adrp	x1, .LANCHOR177
+	bne	.L2428
+	mov	w2, 2324
+	adrp	x1, .LANCHOR180
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR177
+	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	adrp	x0, .LC141
+	adrp	x0, .LC143
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC141
+	add	x0, x0, :lo12:.LC143
 	bl	printf
-.L2392:
+.L2428:
 	mov	w0, w19
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -14376,73 +14971,77 @@ ftl_prog_page:
 	.global	ftl_info_flush
 	.type	ftl_info_flush, %function
 ftl_info_flush:
-	stp	x29, x30, [sp, -112]!
+	stp	x29, x30, [sp, -128]!
 	mov	w1, 0
 	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR125
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR123
-	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR179
-	stp	x25, x26, [sp, 64]
-	adrp	x23, .LANCHOR103
+	adrp	x22, .LANCHOR104
+	ldrb	w2, [x20, #:lo12:.LANCHOR125]
+	adrp	x19, .LANCHOR181
 	stp	x27, x28, [sp, 80]
-	mov	x26, x23
-	ldrb	w2, [x21, #:lo12:.LANCHOR123]
-	add	x25, x22, :lo12:.LANCHOR179
-	add	x28, x23, :lo12:.LANCHOR103
-	mov	w24, 0
-	stp	x19, x20, [sp, 16]
 	mov	w27, w0
-	adrp	x20, .LANCHOR178
+	stp	x23, x24, [sp, 48]
+	add	x0, x19, :lo12:.LANCHOR181
+	stp	x25, x26, [sp, 64]
 	lsl	w2, w2, 1
-	add	x0, x20, :lo12:.LANCHOR178
 	bl	ftl_memset
-.L2396:
-	add	x0, x22, :lo12:.LANCHOR179
-	ldrb	w6, [x22, #:lo12:.LANCHOR179]
-	ldrh	w19, [x23, #:lo12:.LANCHOR103]
+	ldr	x0, [x22, #:lo12:.LANCHOR104]
+	ldrh	w1, [x0, 74]
+	cbz	w1, .L2432
+	strh	wzr, [x0, 150]
+.L2432:
+	adrp	x21, .LANCHOR182
+	adrp	x23, .LANCHOR105
+	add	x25, x21, :lo12:.LANCHOR182
+	add	x28, x23, :lo12:.LANCHOR105
+	mov	w24, 0
+.L2445:
+	add	x0, x21, :lo12:.LANCHOR182
+	ldrb	w7, [x21, #:lo12:.LANCHOR182]
+	ldrh	w5, [x23, #:lo12:.LANCHOR105]
 	ldrh	w4, [x0, 2]
-	adrp	x0, .LANCHOR102
-	ldr	x0, [x0, #:lo12:.LANCHOR102]
+	ldr	x0, [x22, #:lo12:.LANCHOR104]
 	ldr	w3, [x0, 4]
 	add	w3, w3, 1
 	str	w3, [x0, 4]
-	add	x0, x20, :lo12:.LANCHOR178
-	str	w27, [x20, #:lo12:.LANCHOR178]
+	add	x0, x19, :lo12:.LANCHOR181
+	str	w27, [x19, #:lo12:.LANCHOR181]
 	str	w3, [x0, 4]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2397
+	tbz	x0, 12, .L2433
 	mov	w2, w4
-	mov	w1, w6
-	str	w4, [x29, 96]
-	adrp	x0, .LC143
-	str	w6, [x29, 104]
-	add	x0, x0, :lo12:.LC143
+	mov	w1, w7
+	stp	w5, w4, [x29, 108]
+	adrp	x0, .LC145
+	str	w7, [x29, 120]
+	add	x0, x0, :lo12:.LC145
 	bl	printf
-	ldr	w4, [x29, 96]
-	ldr	w6, [x29, 104]
-.L2397:
-	adrp	x1, .LANCHOR85
+	ldp	w5, w4, [x29, 108]
+	ldr	w7, [x29, 120]
+.L2433:
+	adrp	x1, .LANCHOR87
 	ldrh	w0, [x25, 2]
-	ldrh	w1, [x1, #:lo12:.LANCHOR85]
+	ldrh	w1, [x1, #:lo12:.LANCHOR87]
 	cmp	w1, w0
-	bhi	.L2398
-	adrp	x19, .LANCHOR180
-	adrp	x3, .LC0
-	add	x19, x19, :lo12:.LANCHOR180
-	add	x3, x3, :lo12:.LC0
-.L2405:
+	bhi	.L2434
+	adrp	x3, .LANCHOR183
+	adrp	x4, .LC0
+	add	x3, x3, :lo12:.LANCHOR183
+	add	x4, x4, :lo12:.LC0
+.L2441:
 	ldrb	w0, [x25, 1]
-	adrp	x4, .LANCHOR27
+	adrp	x26, .LANCHOR27
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x25, 1]
 	cmp	w0, 7
-	bls	.L2399
+	bls	.L2435
 	mov	x0, 0
-.L2404:
-	ldr	x2, [x4, #:lo12:.LANCHOR27]
+.L2440:
+	ldr	x2, [x26, #:lo12:.LANCHOR27]
 	add	w1, w0, 8
 	and	w24, w0, 65535
 	add	x1, x2, x1, sxtw
@@ -14450,105 +15049,107 @@ ftl_info_flush:
 	add	w1, w2, 127
 	and	w1, w1, 255
 	cmp	w1, 125
-	bhi	.L2400
-	mov	x0, x3
-	stp	x4, x3, [x29, 96]
-	mov	w2, 748
-	mov	x1, x19
+	bhi	.L2436
+	mov	x1, x3
+	mov	x0, x4
+	stp	x3, x4, [x29, 112]
+	mov	w2, 751
 	bl	printf
-	ldp	x4, x3, [x29, 96]
-.L2403:
+	ldp	x3, x4, [x29, 112]
+.L2439:
 	strb	w24, [x25, 1]
 	mov	w24, 1
-.L2399:
-	ldr	x0, [x4, #:lo12:.LANCHOR27]
+.L2435:
+	ldr	x0, [x26, #:lo12:.LANCHOR27]
 	ldrb	w1, [x25, 1]
 	add	x0, x0, x1
 	ldrb	w0, [x0, 40]
 	strb	w0, [x25]
 	cmp	w0, 255
-	beq	.L2405
-	ldrh	w19, [x28]
-	mul	w19, w19, w0
+	beq	.L2441
+	ldrh	w5, [x28]
+	mul	w26, w5, w0
 	mov	w0, 0
-	mov	w1, w19
+	mov	w1, w26
 	bl	flash_erase_block
-	ldrb	w4, [x21, #:lo12:.LANCHOR123]
-	mov	w1, w19
-	add	x3, x20, :lo12:.LANCHOR178
+	ldrb	w4, [x20, #:lo12:.LANCHOR125]
+	add	x3, x19, :lo12:.LANCHOR181
 	adrp	x2, ftl_info_data_buffer
-	mov	w0, 0
+	mov	w1, w26
 	add	x2, x2, :lo12:ftl_info_data_buffer
-	add	w19, w19, 1
+	mov	w0, 0
 	bl	ftl_prog_page
+	add	w5, w26, 1
 	mov	w0, 1
 	strh	w0, [x25, 2]
-.L2406:
-	ldrb	w4, [x21, #:lo12:.LANCHOR123]
-	mov	w1, w19
-	add	x3, x20, :lo12:.LANCHOR178
+.L2442:
+	ldrb	w4, [x20, #:lo12:.LANCHOR125]
+	mov	w1, w5
+	add	x3, x19, :lo12:.LANCHOR181
 	adrp	x2, ftl_info_data_buffer
 	mov	w0, 0
 	add	x2, x2, :lo12:ftl_info_data_buffer
 	bl	ftl_prog_page
 	cmn	w0, #1
 	ldrh	w1, [x25, 2]
-	adrp	x0, .LANCHOR181
+	adrp	x0, .LANCHOR184
 	add	w1, w1, 1
 	strh	w1, [x25, 2]
-	beq	.L2407
-	ldrb	w1, [x0, #:lo12:.LANCHOR181]
-	cbz	w1, .L2408
-.L2407:
-	strb	wzr, [x0, #:lo12:.LANCHOR181]
-	b	.L2396
-.L2400:
+	beq	.L2443
+	ldrb	w1, [x0, #:lo12:.LANCHOR184]
+	cbz	w1, .L2444
+.L2443:
+	strb	wzr, [x0, #:lo12:.LANCHOR184]
+	b	.L2445
+.L2436:
 	cmp	w2, 255
-	bne	.L2403
+	bne	.L2439
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L2404
+	bne	.L2440
 	mov	w24, w0
-	b	.L2403
-.L2398:
-	madd	w19, w19, w6, w4
-	cbnz	w0, .L2406
-	mov	w1, w19
+	b	.L2439
+.L2434:
+	madd	w5, w5, w7, w4
+	cbnz	w0, .L2442
+	mov	w1, w5
+	str	w5, [x29, 120]
 	bl	flash_erase_block
-	b	.L2406
-.L2408:
-	cbnz	w24, .L2409
-.L2417:
-	adrp	x0, .LANCHOR179
-	ldrb	w0, [x0, #:lo12:.LANCHOR179]
+	ldr	w5, [x29, 120]
+	b	.L2442
+.L2444:
+	cbnz	w24, .L2446
+.L2454:
+	adrp	x0, .LANCHOR182
+	ldrb	w0, [x0, #:lo12:.LANCHOR182]
 	cmp	w0, 255
-	bne	.L2411
-	adrp	x1, .LANCHOR180
+	bne	.L2448
+	adrp	x1, .LANCHOR183
 	adrp	x0, .LC0
-	mov	w2, 784
-	add	x1, x1, :lo12:.LANCHOR180
+	mov	w2, 787
+	add	x1, x1, :lo12:.LANCHOR183
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2411:
+.L2448:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 112
+	ldp	x29, x30, [sp], 128
 	ret
-.L2409:
+.L2446:
 	ldrb	w19, [x25, 1]
-	adrp	x20, .LANCHOR180
+	adrp	x20, .LANCHOR183
 	adrp	x21, .LC0
-	add	x20, x20, :lo12:.LANCHOR180
+	add	x20, x20, :lo12:.LANCHOR183
 	add	w19, w19, 1
 	add	x21, x21, :lo12:.LC0
 	adrp	x22, .LANCHOR27
-.L2412:
+.L2449:
 	cmp	w19, 7
-	bhi	.L2417
+	bhi	.L2454
 	ldr	x1, [x22, #:lo12:.LANCHOR27]
 	add	w0, w19, 8
 	add	x0, x1, x0, sxtw
@@ -14556,24 +15157,25 @@ ftl_info_flush:
 	add	w0, w23, 127
 	and	w0, w0, 255
 	cmp	w0, 125
-	bhi	.L2413
-	mov	w2, 777
+	bhi	.L2450
+	mov	w2, 780
 	mov	x1, x20
 	mov	x0, x21
 	bl	printf
-.L2414:
-	ldrh	w1, [x26, #:lo12:.LANCHOR103]
+.L2451:
+	adrp	x0, .LANCHOR105
+	ldrh	w1, [x0, #:lo12:.LANCHOR105]
 	mov	w0, 0
 	mul	w1, w1, w23
 	bl	flash_erase_block
-	b	.L2415
-.L2413:
+	b	.L2452
+.L2450:
 	cmp	w23, 255
-	bne	.L2414
-.L2415:
+	bne	.L2451
+.L2452:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L2412
+	b	.L2449
 	.size	ftl_info_flush, .-ftl_info_flush
 	.section	.text.ftl_info_blk_init,"ax",@progbits
 	.align	2
@@ -14581,32 +15183,32 @@ ftl_info_flush:
 	.type	ftl_info_blk_init, %function
 ftl_info_blk_init:
 	stp	x29, x30, [sp, -128]!
-	adrp	x0, .LANCHOR182
-	adrp	x1, .LANCHOR181
+	adrp	x0, .LANCHOR185
+	adrp	x1, .LANCHOR184
 	mov	w2, 16384
 	add	x29, sp, 0
-	strb	wzr, [x0, #:lo12:.LANCHOR182]
+	strb	wzr, [x0, #:lo12:.LANCHOR185]
 	mov	w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR181]
-	adrp	x1, .LANCHOR183
+	strb	w0, [x1, #:lo12:.LANCHOR184]
+	adrp	x1, .LANCHOR186
 	stp	x19, x20, [sp, 16]
 	adrp	x20, ftl_info_data_buffer
-	strb	w0, [x1, #:lo12:.LANCHOR183]
+	strb	w0, [x1, #:lo12:.LANCHOR186]
 	adrp	x1, .LANCHOR7
 	add	x0, x20, :lo12:ftl_info_data_buffer
 	stp	x21, x22, [sp, 32]
 	str	x0, [x1, #:lo12:.LANCHOR7]
 	adrp	x1, .LANCHOR6
-	adrp	x21, .LANCHOR102
+	adrp	x21, .LANCHOR104
 	stp	x23, x24, [sp, 48]
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	adrp	x24, .LANCHOR27
 	stp	x25, x26, [sp, 64]
-	adrp	x22, .LANCHOR179
+	adrp	x22, .LANCHOR182
 	stp	x27, x28, [sp, 80]
-	adrp	x26, .LANCHOR103
+	adrp	x26, .LANCHOR105
 	add	x1, x0, x1, lsl 2
-	str	x1, [x21, #:lo12:.LANCHOR102]
+	str	x1, [x21, #:lo12:.LANCHOR104]
 	mov	w1, 0
 	bl	ftl_memset
 	mov	w1, 0
@@ -14614,19 +15216,19 @@ ftl_info_blk_init:
 	adrp	x0, ftl_ext_info_data_buffer
 	add	x0, x0, :lo12:ftl_ext_info_data_buffer
 	bl	ftl_memset
-	adrp	x23, .LANCHOR123
+	adrp	x23, .LANCHOR125
 	ldr	x1, [x24, #:lo12:.LANCHOR27]
-	add	x0, x22, :lo12:.LANCHOR179
+	add	x0, x22, :lo12:.LANCHOR182
 	mov	w27, 21574
-	add	x26, x26, :lo12:.LANCHOR103
-	add	x23, x23, :lo12:.LANCHOR123
+	add	x26, x26, :lo12:.LANCHOR105
+	add	x23, x23, :lo12:.LANCHOR125
 	mov	x19, 7
 	strb	wzr, [x0, 1]
 	movk	w27, 0x494c, lsl 16
 	ldrb	w1, [x1, 40]
-	strb	w1, [x22, #:lo12:.LANCHOR179]
+	strb	w1, [x22, #:lo12:.LANCHOR182]
 	strh	wzr, [x0, 2]
-.L2433:
+.L2473:
 	ldr	x1, [x24, #:lo12:.LANCHOR27]
 	add	w0, w19, 8
 	sxth	w25, w19
@@ -14634,39 +15236,39 @@ ftl_info_blk_init:
 	add	x0, x1, x0, sxtw
 	ldrb	w0, [x0, 32]
 	cmp	w0, 255
-	bne	.L2432
-.L2437:
+	bne	.L2472
+.L2477:
 	sub	x19, x19, #1
 	cmn	x19, #1
-	bne	.L2433
+	bne	.L2473
 	mov	w25, 0
-.L2434:
+.L2474:
 	adrp	x23, .LANCHOR14
 	ldr	w0, [x23, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2438
-	ldr	x0, [x21, #:lo12:.LANCHOR102]
+	tbz	x0, 12, .L2478
+	ldr	x0, [x21, #:lo12:.LANCHOR104]
 	mov	w2, 4800
 	mov	w1, w19
 	ldr	w3, [x0]
-	adrp	x0, .LC145
-	add	x0, x0, :lo12:.LC145
+	adrp	x0, .LC147
+	add	x0, x0, :lo12:.LC147
 	bl	printf
-.L2438:
+.L2478:
 	cmn	w19, #1
-	bne	.L2439
+	bne	.L2479
 	mov	w1, 0
 	mov	w2, 16384
 	add	x0, x20, :lo12:ftl_info_data_buffer
 	bl	ftl_memset
-	ldr	x0, [x21, #:lo12:.LANCHOR102]
+	ldr	x0, [x21, #:lo12:.LANCHOR104]
 	mov	w1, 21574
 	movk	w1, 0x494c, lsl 16
 	str	w1, [x0]
-	mov	w1, 22
+	mov	w1, 24
 	movk	w1, 0x6, lsl 16
 	str	w1, [x0, 12]
 	mov	w0, w19
-.L2431:
+.L2471:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -14674,12 +15276,12 @@ ftl_info_blk_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2432:
+.L2472:
 	ldrh	w6, [x26]
 	add	x8, x20, :lo12:ftl_info_data_buffer
 	ldrb	w4, [x23]
-	adrp	x7, .LANCHOR178
-	add	x7, x7, :lo12:.LANCHOR178
+	adrp	x7, .LANCHOR181
+	add	x7, x7, :lo12:.LANCHOR181
 	mov	x2, x8
 	mov	x3, x7
 	stp	x7, x8, [x29, 104]
@@ -14692,7 +15294,7 @@ ftl_info_blk_init:
 	cmn	w0, #1
 	ldr	w6, [x29, 124]
 	ldp	x7, x8, [x29, 104]
-	bne	.L2435
+	bne	.L2475
 	ldrb	w4, [x23]
 	mov	x3, x7
 	mov	x2, x8
@@ -14700,58 +15302,58 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_read_page
 	mov	w5, w0
-.L2435:
+.L2475:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2436
-	ldr	x0, [x21, #:lo12:.LANCHOR102]
+	tbz	x0, 12, .L2476
+	ldr	x0, [x21, #:lo12:.LANCHOR104]
 	mov	w2, w5
 	str	w5, [x29, 124]
 	mov	w3, 672
 	mov	w1, w28
 	ldr	w4, [x0]
-	adrp	x0, .LC144
-	add	x0, x0, :lo12:.LC144
+	adrp	x0, .LC146
+	add	x0, x0, :lo12:.LC146
 	bl	printf
 	ldr	w5, [x29, 124]
-.L2436:
+.L2476:
 	cmn	w5, #1
-	beq	.L2437
-	ldr	x0, [x21, #:lo12:.LANCHOR102]
+	beq	.L2477
+	ldr	x0, [x21, #:lo12:.LANCHOR104]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L2437
+	bne	.L2477
 	mov	w19, w25
-	b	.L2434
-.L2439:
+	b	.L2474
+.L2479:
 	ldr	x1, [x24, #:lo12:.LANCHOR27]
 	add	w0, w25, 8
 	add	x20, x20, :lo12:ftl_info_data_buffer
 	mov	w4, 4
 	mov	x2, x20
-	adrp	x27, .LANCHOR123
+	adrp	x27, .LANCHOR125
 	add	x0, x1, x0, sxtw
 	mov	w28, 21574
-	add	x27, x27, :lo12:.LANCHOR123
+	add	x27, x27, :lo12:.LANCHOR125
 	movk	w28, 0x494c, lsl 16
 	ldrb	w1, [x0, 32]
-	add	x0, x22, :lo12:.LANCHOR179
-	strb	w1, [x22, #:lo12:.LANCHOR179]
+	add	x0, x22, :lo12:.LANCHOR182
+	strb	w1, [x22, #:lo12:.LANCHOR182]
 	strb	w25, [x0, 1]
-	adrp	x25, .LANCHOR178
-	add	x25, x25, :lo12:.LANCHOR178
+	adrp	x25, .LANCHOR181
+	add	x25, x25, :lo12:.LANCHOR181
 	mov	w0, 0
 	mov	x3, x25
 	bl	flash_get_last_written_page
 	sxth	w24, w0
 	add	w0, w0, 1
 	and	w19, w0, 65535
-	adrp	x0, .LANCHOR103
-	ldrb	w26, [x22, #:lo12:.LANCHOR179]
-	ldrh	w0, [x0, #:lo12:.LANCHOR103]
+	adrp	x0, .LANCHOR105
+	ldrb	w26, [x22, #:lo12:.LANCHOR182]
+	ldrh	w0, [x0, #:lo12:.LANCHOR105]
 	madd	w26, w26, w0, w24
-.L2441:
-	tbnz	w24, #31, .L2445
+.L2481:
+	tbnz	w24, #31, .L2485
 	ldrb	w4, [x27]
 	mov	x3, x25
 	mov	x2, x20
@@ -14759,16 +15361,16 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_read_page
 	cmn	w0, #1
-	beq	.L2442
-	ldr	x0, [x21, #:lo12:.LANCHOR102]
+	beq	.L2482
+	ldr	x0, [x21, #:lo12:.LANCHOR104]
 	ldr	w0, [x0]
 	cmp	w0, w28
-	bne	.L2442
-.L2445:
-	add	x22, x22, :lo12:.LANCHOR179
+	bne	.L2482
+.L2485:
+	add	x22, x22, :lo12:.LANCHOR182
 	strh	w19, [x22, 2]
 	bl	ftl_tmp_into_update
-	ldr	x1, [x21, #:lo12:.LANCHOR102]
+	ldr	x1, [x21, #:lo12:.LANCHOR104]
 	ldr	w0, [x1, 64]
 	add	w0, w0, 1
 	str	w0, [x1, 64]
@@ -14777,22 +15379,22 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_info_flush
 	ldr	w0, [x23, #:lo12:.LANCHOR14]
-	tbnz	x0, 14, .L2443
-.L2460:
+	tbnz	x0, 14, .L2483
+.L2500:
 	mov	w0, 0
-	b	.L2431
-.L2442:
+	b	.L2471
+.L2482:
 	sub	w24, w24, #1
 	sub	w26, w26, #1
 	sxth	w24, w24
-	b	.L2441
-.L2443:
-	ldr	x0, [x21, #:lo12:.LANCHOR102]
+	b	.L2481
+.L2483:
+	ldr	x0, [x21, #:lo12:.LANCHOR104]
 	ldr	w1, [x0, 156]
-	adrp	x0, .LC146
-	add	x0, x0, :lo12:.LC146
+	adrp	x0, .LC148
+	add	x0, x0, :lo12:.LC148
 	bl	printf
-	b	.L2460
+	b	.L2500
 	.size	ftl_info_blk_init, .-ftl_info_blk_init
 	.section	.text.ftl_ext_info_flush,"ax",@progbits
 	.align	2
@@ -14809,92 +15411,95 @@ ftl_ext_info_flush:
 	ldr	w1, [x0, 520]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbz	w1, .L2462
+	cbz	w1, .L2502
 	str	wzr, [x0, 520]
-.L2462:
-	adrp	x20, .LANCHOR85
-	adrp	x22, .LANCHOR184
-	adrp	x21, .LANCHOR66
-	add	x20, x20, :lo12:.LANCHOR85
-	add	x22, x22, :lo12:.LANCHOR184
-	add	x21, x21, :lo12:.LANCHOR66
+.L2502:
+	adrp	x20, .LANCHOR87
+	adrp	x22, .LANCHOR187
+	adrp	x21, .LANCHOR31
+	add	x20, x20, :lo12:.LANCHOR87
+	add	x22, x22, :lo12:.LANCHOR187
+	add	x21, x21, :lo12:.LANCHOR31
 	mov	w0, 0
 	bl	ftl_total_vpn_update
-.L2463:
-	adrp	x23, .LANCHOR102
+.L2503:
+	adrp	x23, .LANCHOR104
 	mov	x24, x23
-.L2466:
-	ldr	x0, [x23, #:lo12:.LANCHOR102]
+.L2506:
+	ldr	x0, [x23, #:lo12:.LANCHOR104]
 	ldr	w1, [x0, 56]
 	add	w1, w1, 1
 	str	w1, [x0, 56]
 	ldrh	w1, [x0, 140]
 	ldrh	w0, [x20]
 	cmp	w1, w0
-	bcc	.L2464
+	bcc	.L2504
 	bl	ftl_ext_alloc_new_blk
-.L2464:
-	ldr	x0, [x24, #:lo12:.LANCHOR102]
+.L2504:
+	ldr	x0, [x24, #:lo12:.LANCHOR104]
 	ldrh	w1, [x0, 130]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2465
+	bne	.L2505
 	adrp	x0, .LC0
-	mov	w2, 1819
+	mov	w2, 1912
 	mov	x1, x22
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2465:
-	ldr	x1, [x24, #:lo12:.LANCHOR102]
-	mov	w19, 21
-	ldrh	w0, [x21]
-	adrp	x26, .LANCHOR123
-	adrp	x27, .LANCHOR178
-	add	x25, x27, :lo12:.LANCHOR178
+.L2505:
+	ldrb	w19, [x21]
+	mov	w0, 24
+	ldr	x1, [x24, #:lo12:.LANCHOR104]
+	adrp	x26, .LANCHOR125
+	sub	w19, w0, w19
+	adrp	x0, .LANCHOR68
+	adrp	x27, .LANCHOR181
+	add	x25, x27, :lo12:.LANCHOR181
+	ldrh	w0, [x0, #:lo12:.LANCHOR68]
+	ldrh	w2, [x1, 130]
 	sub	w0, w19, w0
 	mov	w19, 1
-	ldrh	w2, [x1, 130]
+	asr	w28, w2, w0
 	lsl	w19, w19, w0
+	adrp	x0, .LANCHOR105
 	sub	w19, w19, #1
 	and	w19, w19, w2
-	asr	w28, w2, w0
-	adrp	x0, .LANCHOR103
-	ldrh	w2, [x0, #:lo12:.LANCHOR103]
+	ldrh	w2, [x0, #:lo12:.LANCHOR105]
 	ldrh	w0, [x1, 140]
+	sxth	w19, w19
 	mov	w1, 0
 	madd	w19, w19, w2, w0
-	ldrb	w2, [x26, #:lo12:.LANCHOR123]
+	ldrb	w2, [x26, #:lo12:.LANCHOR125]
 	mov	x0, x25
-	and	w19, w19, 65535
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	ldr	x0, [x24, #:lo12:.LANCHOR102]
+	ldr	x0, [x24, #:lo12:.LANCHOR104]
 	mov	w1, w19
-	ldrb	w4, [x26, #:lo12:.LANCHOR123]
+	ldrb	w4, [x26, #:lo12:.LANCHOR125]
 	mov	x3, x25
-	str	wzr, [x27, #:lo12:.LANCHOR178]
+	str	wzr, [x27, #:lo12:.LANCHOR181]
 	adrp	x2, ftl_ext_info_data_buffer
 	add	x2, x2, :lo12:ftl_ext_info_data_buffer
 	ldr	w0, [x0, 56]
 	str	w0, [x25, 4]
 	mov	w0, w28
 	bl	ftl_prog_page
-	ldr	x2, [x24, #:lo12:.LANCHOR102]
+	ldr	x2, [x24, #:lo12:.LANCHOR104]
 	ldrh	w1, [x2, 140]
 	add	w1, w1, 1
 	and	w1, w1, 65535
 	strh	w1, [x2, 140]
 	cmp	w1, 1
-	beq	.L2466
+	beq	.L2506
 	cmn	w0, #1
-	adrp	x0, .LANCHOR183
-	beq	.L2467
-	ldrb	w1, [x0, #:lo12:.LANCHOR183]
-	cbz	w1, .L2468
-.L2467:
-	strb	wzr, [x0, #:lo12:.LANCHOR183]
-	b	.L2463
-.L2468:
+	adrp	x0, .LANCHOR186
+	beq	.L2507
+	ldrb	w1, [x0, #:lo12:.LANCHOR186]
+	cbz	w1, .L2508
+.L2507:
+	strb	wzr, [x0, #:lo12:.LANCHOR186]
+	b	.L2503
+.L2508:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -14910,1071 +15515,673 @@ ftl_ext_info_flush:
 	.type	ftl_ext_info_init, %function
 ftl_ext_info_init:
 	stp	x29, x30, [sp, -112]!
-	adrp	x0, .LANCHOR113
+	adrp	x0, .LANCHOR115
+	adrp	x2, .LANCHOR68
 	mov	w4, 4
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR102
-	strh	wzr, [x0, #:lo12:.LANCHOR113]
-	mov	w19, 21
-	ldr	x0, [x20, #:lo12:.LANCHOR102]
+	adrp	x20, .LANCHOR104
+	strh	wzr, [x0, #:lo12:.LANCHOR115]
+	ldr	x0, [x20, #:lo12:.LANCHOR104]
 	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR14
 	stp	x27, x28, [sp, 80]
-	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR178
-	ldrh	w1, [x0, 130]
-	adrp	x0, .LANCHOR66
 	stp	x25, x26, [sp, 64]
-	add	x3, x24, :lo12:.LANCHOR178
-	ldrh	w0, [x0, #:lo12:.LANCHOR66]
-	adrp	x25, ftl_ext_info_data_buffer
-	add	x2, x25, :lo12:ftl_ext_info_data_buffer
-	sub	w0, w19, w0
+	adrp	x25, .LANCHOR181
+	ldrh	w1, [x0, 130]
+	adrp	x0, .LANCHOR31
+	stp	x23, x24, [sp, 48]
+	adrp	x26, ftl_ext_info_data_buffer
+	ldrb	w19, [x0, #:lo12:.LANCHOR31]
+	mov	w0, 24
+	add	x3, x25, :lo12:.LANCHOR181
+	sub	w0, w0, w19
+	ldrh	w19, [x2, #:lo12:.LANCHOR68]
+	add	x2, x26, :lo12:ftl_ext_info_data_buffer
+	sub	w0, w0, w19
 	mov	w19, 1
 	lsl	w19, w19, w0
 	sub	w19, w19, #1
-	asr	w21, w1, w0
+	asr	w22, w1, w0
 	and	w19, w19, w1
-	and	w27, w21, 255
+	and	w28, w22, 255
 	mov	w1, w19
-	mov	w0, w27
+	mov	w0, w28
 	bl	flash_get_last_written_page
-	sxth	w22, w0
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2479
-	ldr	x0, [x20, #:lo12:.LANCHOR102]
-	adrp	x1, .LANCHOR185
-	and	w4, w21, 65535
-	mov	w3, w22
-	mov	w2, 1863
-	add	x1, x1, :lo12:.LANCHOR185
+	sxth	w23, w0
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2519
+	ldr	x0, [x20, #:lo12:.LANCHOR104]
+	adrp	x1, .LANCHOR188
+	and	w4, w22, 65535
+	mov	w3, w23
+	mov	w2, 1956
+	add	x1, x1, :lo12:.LANCHOR188
 	ldrh	w5, [x0, 130]
-	adrp	x0, .LC147
-	add	x0, x0, :lo12:.LC147
+	adrp	x0, .LC149
+	add	x0, x0, :lo12:.LC149
 	bl	printf
-.L2479:
-	adrp	x26, .LANCHOR123
-	adrp	x28, .LANCHOR103
-	mov	w5, 20038
-	add	x26, x26, :lo12:.LANCHOR123
-	add	x28, x28, :lo12:.LANCHOR103
-	mov	w23, 0
-	movk	w5, 0x4549, lsl 16
-.L2480:
-	and	w21, w22, 65535
-	sub	w0, w21, w23
-	tbnz	x0, 15, .L2485
-	ldrh	w0, [x28]
-	sub	w1, w22, w23
-	ldrb	w4, [x26]
-	add	x3, x24, :lo12:.LANCHOR178
-	str	w5, [x29, 108]
-	add	x2, x25, :lo12:ftl_ext_info_data_buffer
+.L2519:
+	adrp	x27, .LANCHOR125
+	adrp	x5, .LANCHOR105
+	mov	w6, 20038
+	add	x27, x27, :lo12:.LANCHOR125
+	add	x5, x5, :lo12:.LANCHOR105
+	mov	w24, 0
+	movk	w6, 0x4549, lsl 16
+.L2520:
+	and	w22, w23, 65535
+	sub	w0, w22, w24
+	tbnz	x0, 15, .L2525
+	ldrh	w0, [x5]
+	sub	w1, w23, w24
+	ldrb	w4, [x27]
+	add	x3, x25, :lo12:.LANCHOR181
+	str	w6, [x29, 100]
+	add	x2, x26, :lo12:ftl_ext_info_data_buffer
+	str	x5, [x29, 104]
 	madd	w1, w0, w19, w1
-	mov	w0, w27
+	mov	w0, w28
 	bl	flash_read_page_en
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	ldr	w5, [x29, 108]
-	beq	.L2481
+	ldr	w6, [x29, 100]
+	ldr	x5, [x29, 104]
+	beq	.L2521
 	adrp	x0, .LANCHOR10
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x0]
-	cmp	w0, w5
-	bne	.L2481
-.L2485:
+	cmp	w0, w6
+	bne	.L2521
+.L2525:
 	bl	zftl_sblk_list_init
-	ldr	x0, [x20, #:lo12:.LANCHOR102]
+	ldr	x0, [x20, #:lo12:.LANCHOR104]
 	ldrh	w1, [x0, 140]
-	cmp	w1, w22
-	bgt	.L2483
-	add	w21, w21, 1
-	strh	w21, [x0, 140]
+	cmp	w1, w23
+	bgt	.L2523
+	add	w22, w22, 1
+	strh	w22, [x0, 140]
 	bl	ftl_ext_info_flush
-.L2483:
+.L2523:
 	adrp	x0, .LANCHOR10
 	mov	w1, -1
-	ldp	x19, x20, [sp, 16]
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
 	strh	w1, [x0, 584]
 	strh	w1, [x0, 586]
 	strh	w1, [x0, 588]
 	strh	w1, [x0, 590]
 	mov	w1, 65535
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
 	str	w1, [x0, 560]
-	str	wzr, [x0, 520]
 	mov	w1, -1
+	str	w1, [x0, 564]
+	ldr	w1, [x21, #:lo12:.LANCHOR14]
+	str	wzr, [x0, 520]
 	str	wzr, [x0, 604]
 	str	wzr, [x0, 608]
-	str	w1, [x0, 564]
-	adrp	x0, .LANCHOR64
-	strh	w1, [x0, #:lo12:.LANCHOR64]
+	tbz	x1, 12, .L2526
+	ldr	w3, [x0, 12]
+	adrp	x1, .LANCHOR188
+	adrp	x0, .LC150
+	mov	w4, 0
+	mov	w2, 0
+	add	x1, x1, :lo12:.LANCHOR188
+	add	x0, x0, :lo12:.LC150
+	bl	printf
+.L2526:
+	adrp	x0, .LANCHOR66
+	mov	w1, -1
+	ldp	x19, x20, [sp, 16]
+	strh	w1, [x0, #:lo12:.LANCHOR66]
+	ldp	x21, x22, [sp, 32]
 	mov	w0, 0
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2481:
-	add	w23, w23, 1
-	b	.L2480
+.L2521:
+	add	w24, w24, 1
+	b	.L2520
 	.size	ftl_ext_info_init, .-ftl_ext_info_init
-	.section	.text.ftl_low_format_data_init,"ax",@progbits
+	.section	.text.ftl_prog_ppa_page,"ax",@progbits
 	.align	2
-	.global	ftl_low_format_data_init
-	.type	ftl_low_format_data_init, %function
-ftl_low_format_data_init:
-	stp	x29, x30, [sp, -48]!
-	mov	w2, 16384
-	mov	w1, 0
-	adrp	x0, ftl_ext_info_data_buffer
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	add	x0, x0, :lo12:ftl_ext_info_data_buffer
-	str	x21, [sp, 32]
-	bl	ftl_memset
-	bl	zftl_sblk_list_init
-	adrp	x19, .LANCHOR102
-	mov	w0, 1
-	bl	ftl_alloc_sblk
-	mov	w1, 0
+	.global	ftl_prog_ppa_page
+	.type	ftl_prog_ppa_page, %function
+ftl_prog_ppa_page:
+	adrp	x4, .LANCHOR31
+	mov	w5, 1
+	ldrb	w6, [x4, #:lo12:.LANCHOR31]
+	mov	w4, 24
+	sub	w4, w4, w6
+	lsl	w7, w5, w4
+	sub	w7, w7, #1
+	lsl	w5, w5, w6
+	sub	w6, w5, #1
+	lsr	w5, w0, w4
+	mov	w4, w3
+	mov	x3, x2
+	mov	x2, x1
+	and	w1, w7, w0
+	and	w0, w6, w5
+	b	ftl_prog_page
+	.size	ftl_prog_ppa_page, .-ftl_prog_ppa_page
+	.section	.text.ftl_write_last_log_page,"ax",@progbits
+	.align	2
+	.global	ftl_write_last_log_page
+	.type	ftl_write_last_log_page, %function
+ftl_write_last_log_page:
+	ldrh	w1, [x0, 6]
+	cmp	w1, 1
+	bne	.L2540
+	stp	x29, x30, [sp, -48]!
+	adrp	x1, .LANCHOR111
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	stp	x21, x22, [sp, 32]
+	ldr	x20, [x1, #:lo12:.LANCHOR111]
+	ldrh	w22, [x0, 12]
+	bl	ftl_get_new_free_page
 	mov	w21, w0
-	bl	ftl_erase_sblk
-	ldr	x1, [x19, #:lo12:.LANCHOR102]
+	cmn	w0, #1
+	beq	.L2541
+	ldrh	w0, [x19]
+	add	x20, x20, x22, uxth 2
+	bl	ftl_vpn_decrement
+	adrp	x0, .LANCHOR179
+	mov	w1, 15555
+	add	x6, x0, :lo12:.LANCHOR179
+	movk	w1, 0xf55f, lsl 16
+	str	w1, [x0, #:lo12:.LANCHOR179]
+	adrp	x0, .LANCHOR87
+	ldrh	w1, [x0, #:lo12:.LANCHOR87]
+	adrp	x0, .LANCHOR80
+	ldrb	w0, [x0, #:lo12:.LANCHOR80]
+	mul	w1, w1, w0
+	mov	x0, x20
+	lsl	w1, w1, 2
+	bl	js_hash
+	stp	w0, wzr, [x6, 4]
+	adrp	x0, .LANCHOR125
+	mov	x2, x6
+	mov	x1, x20
+	ldrb	w3, [x0, #:lo12:.LANCHOR125]
 	mov	w0, w21
-	add	x1, x1, 672
-	bl	ftl_get_blk_list_in_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR102]
-	ldrh	w20, [x0, 672]
-	strh	wzr, [x0, 690]
-	mov	w0, 65533
-	sub	w1, w20, #1
-	cmp	w0, w1, uxth
-	bcs	.L2494
-	adrp	x1, .LANCHOR186
-	adrp	x0, .LC0
-	mov	w2, 2053
-	add	x1, x1, :lo12:.LANCHOR186
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2494:
-	ldr	x0, [x19, #:lo12:.LANCHOR102]
-	mov	w2, 256
-	mov	w1, 255
-	add	x0, x0, 416
-	strh	wzr, [x0, 280]
-	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR102]
-	mov	w2, 4096
-	mov	w1, 0
-	add	x0, x0, 704
-	bl	ftl_memset
-	adrp	x1, .LANCHOR66
-	ldr	x0, [x19, #:lo12:.LANCHOR102]
-	ldrh	w2, [x1, #:lo12:.LANCHOR66]
-	mov	w1, 21
-	sub	w1, w1, w2
-	strh	w21, [x0, 416]
-	adrp	x21, .LANCHOR10
-	strh	w20, [x0, 692]
-	asr	w1, w20, w1
-	strh	w1, [x0, 694]
-	mov	w1, 1
-	strh	w1, [x0, 688]
-	adrp	x1, .LANCHOR187
-	ldrh	w1, [x1, #:lo12:.LANCHOR187]
-	strh	w1, [x0, 698]
-	ldr	x0, [x21, #:lo12:.LANCHOR10]
-	mov	w1, 20038
-	movk	w1, 0x4549, lsl 16
-	str	w1, [x0]
-	bl	ftl_alloc_sys_blk
-	mov	w20, w0
-	mov	w1, 0
-	bl	ftl_erase_phy_blk
-	ldr	x0, [x19, #:lo12:.LANCHOR102]
-	mov	w1, 2
-	strh	w20, [x0, 130]
-	mov	w20, -1
-	strh	wzr, [x0, 140]
-	ldr	x0, [x21, #:lo12:.LANCHOR10]
-	add	x0, x0, 16
-	strh	w20, [x0, 568]
-	strh	w20, [x0, 570]
-	strh	w20, [x0, 572]
-	strh	w20, [x0, 574]
-	bl	ftl_open_sblk_init
-	ldr	x0, [x21, #:lo12:.LANCHOR10]
-	mov	w1, 3
-	add	x0, x0, 48
-	bl	ftl_open_sblk_init
-	ldr	x1, [x19, #:lo12:.LANCHOR102]
-	ldr	x0, [x21, #:lo12:.LANCHOR10]
-	add	x0, x0, 136
-	ldrh	w2, [x1, 134]
-	strh	w2, [x0, -10]
-	strh	w20, [x0, -56]
-	mov	w2, -1
-	strh	w20, [x0, -6]
-	str	w2, [x0, 408]
-	strh	wzr, [x0, -12]
-	strh	wzr, [x0, -16]
-	strh	wzr, [x0, -14]
-	strh	w2, [x1, 126]
-	mov	w2, 256
-	str	wzr, [x0, 384]
-	mov	w1, 255
-	str	wzr, [x0, 388]
-	str	wzr, [x0, 392]
-	bl	ftl_memset
-	ldr	x0, [x21, #:lo12:.LANCHOR10]
-	mov	w2, 128
-	mov	w1, 255
-	add	x0, x0, 392
-	bl	ftl_memset
-	bl	ftl_ext_info_flush
-	mov	w0, 0
-	bl	ftl_info_flush
-	bl	ftl_info_blk_init
-	ldr	x21, [sp, 32]
+	str	wzr, [x6, 12]
+	bl	ftl_prog_ppa_page
+.L2541:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-	.size	ftl_low_format_data_init, .-ftl_low_format_data_init
-	.section	.text.ftl_low_format,"ax",@progbits
+.L2540:
+	mov	w0, -1
+	ret
+	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
+	.section	.text.ftl_open_sblk_recovery,"ax",@progbits
 	.align	2
-	.global	ftl_low_format
-	.type	ftl_low_format, %function
-ftl_low_format:
-	stp	x29, x30, [sp, -80]!
-	mov	w1, 0
-	adrp	x0, .LC148
-	add	x0, x0, :lo12:.LC148
+	.global	ftl_open_sblk_recovery
+	.type	ftl_open_sblk_recovery, %function
+ftl_open_sblk_recovery:
+	stp	x29, x30, [sp, -368]!
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR188
 	stp	x21, x22, [sp, 32]
-	add	x20, x20, :lo12:.LANCHOR188
-	stp	x25, x26, [sp, 64]
-	adrp	x22, .LANCHOR27
-	mov	x25, x22
+	adrp	x21, .LANCHOR14
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
 	stp	x23, x24, [sp, 48]
-	mov	w19, 8
-	adrp	x23, .LC0
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	str	x1, [x29, 144]
+	tbz	x0, 12, .L2547
+	ldrh	w1, [x19, 2]
+	adrp	x0, .LC151
+	add	x0, x0, :lo12:.LC151
 	bl	printf
-.L2499:
-	ldr	x0, [x22, #:lo12:.LANCHOR27]
-	add	x0, x0, x19, sxtw
-	ldrb	w21, [x0, 32]
-	add	w0, w21, 127
-	and	w0, w0, 255
-	cmp	w0, 125
-	bhi	.L2497
-	mov	w2, 2107
-	mov	x1, x20
-	add	x0, x23, :lo12:.LC0
+.L2547:
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2548
+	ldrb	w1, [x19, 5]
+	adrp	x0, .LC152
+	add	x0, x0, :lo12:.LC152
 	bl	printf
-.L2497:
-	cmp	w21, 255
-	beq	.L2498
-	adrp	x0, .LANCHOR103
-	ldrh	w1, [x0, #:lo12:.LANCHOR103]
+.L2548:
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2549
+	ldrh	w1, [x19]
+	adrp	x0, .LC153
+	add	x0, x0, :lo12:.LC153
+	bl	printf
+.L2549:
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2550
+	ldrh	w2, [x19, 18]
+	adrp	x0, .LC154
+	ldrh	w1, [x19, 16]
+	add	x0, x0, :lo12:.LC154
+	bl	printf
+.L2550:
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2551
+	ldrb	w1, [x19, 9]
+	adrp	x0, .LC155
+	add	x0, x0, :lo12:.LC155
+	bl	printf
+.L2551:
+	ldrh	w0, [x19, 10]
+	strh	w0, [x19, 14]
+	adrp	x0, .LANCHOR6
+	ldrh	w1, [x19]
+	ldrh	w0, [x0, #:lo12:.LANCHOR6]
+	cmp	w1, w0
+	bcs	.L2546
+	mov	w0, 1
+	add	x23, x29, 176
+	bl	buf_alloc
+	add	x26, x29, 240
+	mov	w2, 64
+	mov	w1, 255
+	mov	x20, x0
+	mov	x0, x23
+	bl	ftl_memset
+	add	x27, x29, 304
+	mov	w2, 64
+	mov	w1, 255
+	mov	x0, x26
+	bl	ftl_memset
+	mov	w2, 64
+	mov	w1, 255
+	mov	x0, x27
+	bl	ftl_memset
+	ldrb	w22, [x19, 5]
+	mov	w0, 2
+	ldrh	w24, [x19, 2]
+	adrp	x25, .LANCHOR87
+	str	w0, [x29, 168]
+	adrp	x0, .LANCHOR125
+	str	wzr, [x29, 160]
+	add	x0, x0, :lo12:.LANCHOR125
+	str	x0, [x29, 128]
+.L2553:
+	ldrh	w0, [x25, #:lo12:.LANCHOR87]
+	cmp	w0, w24
+	bhi	.L2566
+.L2556:
+	ldrh	w0, [x19, 10]
+	ldrh	w1, [x19, 6]
+	ldrh	w2, [x25, #:lo12:.LANCHOR87]
+	add	w1, w1, w0
+	ldrb	w0, [x19, 9]
+	strh	w24, [x19, 2]
+	strb	w22, [x19, 5]
+	mul	w0, w0, w2
+	cmp	w1, w0
+	beq	.L2567
+	adrp	x1, .LANCHOR189
+	adrp	x0, .LC0
+	mov	w2, 1569
+	add	x1, x1, :lo12:.LANCHOR189
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2567:
+	adrp	x2, .LANCHOR111
+	ldrh	w3, [x19, 10]
 	mov	w0, 0
-	mul	w1, w1, w21
-	bl	flash_erase_block
-.L2498:
-	add	w19, w19, 1
-	cmp	w19, 16
-	bne	.L2499
-	bl	sblk_init
-	adrp	x22, .LANCHOR7
-	bl	ftl_info_blk_init
-	adrp	x19, .LANCHOR6
-	mov	w2, 16384
 	mov	w1, 0
-	adrp	x0, ftl_info_data_buffer
-	add	x0, x0, :lo12:ftl_info_data_buffer
-	bl	ftl_memset
-	ldr	x0, [x22, #:lo12:.LANCHOR7]
-	mov	w3, 1
-	ldrh	w2, [x19, #:lo12:.LANCHOR6]
-	add	x2, x0, x2, lsl 2
-.L2500:
-	cmp	x0, x2
-	bne	.L2501
-	adrp	x21, .LANCHOR102
-	mov	w1, 21574
-	adrp	x24, .LANCHOR60
-	add	x24, x24, :lo12:.LANCHOR60
-	ldr	x0, [x21, #:lo12:.LANCHOR102]
-	movk	w1, 0x494c, lsl 16
-	mov	w20, 0
-	mov	w26, 1
-	strh	wzr, [x0, 148]
-	str	w1, [x0]
-.L2502:
-	ldrh	w0, [x19, #:lo12:.LANCHOR6]
-	adrp	x23, .LANCHOR67
-	cmp	w0, w20
-	bhi	.L2511
-	ldr	x0, [x25, #:lo12:.LANCHOR27]
-	mov	w4, 3
-	ldrb	w2, [x23, #:lo12:.LANCHOR67]
-	mov	w10, 15
-	ldr	x6, [x21, #:lo12:.LANCHOR102]
-	cmp	w2, 1
-	ldr	x1, [x22, #:lo12:.LANCHOR7]
-	ldrb	w0, [x0, 47]
-	csinc	w4, w4, wzr, ne
-	and	w4, w4, 255
-	and	w8, w2, 65535
-	ldrh	w3, [x6, 148]
-	udiv	w0, w0, w2
-	and	w5, w0, 65535
-	ubfiz	x0, x0, 2, 8
-	add	x0, x0, 4
-	add	w20, w5, 1
-	add	x0, x1, x0
-.L2514:
-	cmp	w2, 4
-	add	x1, x1, 4
-	csel	w7, w10, w4, eq
-	strb	w7, [x1, -1]
-	ldrb	w7, [x1, -2]
-	orr	w7, w7, -32
-	strb	w7, [x1, -2]
-	cmp	x1, x0
-	bne	.L2514
-	mul	w5, w5, w8
-	mov	w4, 16
-	add	w0, w8, w3
-	sdiv	w4, w4, w2
-	add	w0, w5, w0, uxth
-	strh	w0, [x6, 148]
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	add	w4, w20, w4
-	and	w4, w4, 65535
-	strh	w4, [x6, 134]
-	tbz	x0, 12, .L2515
-	adrp	x0, .LC149
-	mov	w3, w20
-	mov	w2, 128
-	mov	w1, 2154
-	add	x0, x0, :lo12:.LC149
+	ldr	x4, [x2, #:lo12:.LANCHOR111]
+	str	x2, [x29, 136]
+.L2568:
+	cmp	w1, w3
+	bcc	.L2570
+	ldrb	w22, [x19, 9]
+	adrp	x24, .LANCHOR9
+	ldrh	w1, [x25, #:lo12:.LANCHOR87]
+	madd	w22, w22, w1, w0
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	sub	w22, w22, w3
+	and	w22, w22, 65535
+	tbz	x0, 12, .L2571
+	ldrh	w1, [x19]
+	ldr	x2, [x24, #:lo12:.LANCHOR9]
+	ubfiz	x0, x1, 1, 16
+	ldrh	w3, [x2, x0]
+	adrp	x0, .LC156
+	mov	w2, w22
+	add	x0, x0, :lo12:.LC156
 	bl	printf
-.L2515:
-	ldr	x0, [x21, #:lo12:.LANCHOR102]
-	mov	w2, 128
-	mov	w1, 255
-	add	x0, x0, 160
+.L2571:
+	ldr	x0, [x24, #:lo12:.LANCHOR9]
+	ldrh	w1, [x19]
+	strh	w22, [x0, x1, lsl 1]
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 14, .L2572
+	ldp	w1, w2, [x29, 176]
+	adrp	x0, .LC157
+	ldp	w3, w4, [x29, 184]
+	add	x0, x0, :lo12:.LC157
+	bl	printf
+.L2572:
+	adrp	x24, .LANCHOR125
+	ldr	x0, [x20, 8]
+	mov	w1, 0
+	mov	x28, 0
+	ldrb	w2, [x24, #:lo12:.LANCHOR125]
+	lsl	w2, w2, 9
 	bl	ftl_memset
-	adrp	x0, .LANCHOR104
-	ldrb	w13, [x23, #:lo12:.LANCHOR67]
-	ldr	x2, [x21, #:lo12:.LANCHOR102]
-	mov	w4, 21
-	ldrb	w15, [x0, #:lo12:.LANCHOR104]
-	adrp	x0, .LANCHOR66
-	and	w16, w13, 65535
-	ldr	x14, [x22, #:lo12:.LANCHOR7]
-	ldrh	w0, [x0, #:lo12:.LANCHOR66]
-	mov	w3, 0
-	ldrh	w12, [x2, 134]
-	sub	w0, w4, w0
-	mul	w1, w20, w16
-	mov	w4, 1
-	lsl	w4, w4, w0
-	and	w1, w1, 65535
-	and	w4, w4, 65535
-.L2516:
-	cmp	w20, w12
-	bcc	.L2522
-	ldrh	w0, [x19, #:lo12:.LANCHOR6]
-	strh	w3, [x2, 112]
-	sub	w0, w0, w12
-	strh	wzr, [x2, 114]
-	strh	w0, [x2, 116]
-	strh	wzr, [x2, 118]
-	strh	w12, [x2, 132]
-	bl	ftl_low_format_data_init
-	mov	w0, 0
+	adrp	x0, .LC159
+	add	x0, x0, :lo12:.LC159
+	str	x0, [x29, 120]
+	adrp	x0, .LANCHOR80
+	add	x0, x0, :lo12:.LANCHOR80
+	str	x0, [x29, 112]
+.L2573:
+	adrp	x0, .LANCHOR80
+	ldr	w2, [x29, 168]
+	add	x1, x0, :lo12:.LANCHOR80
+	str	w28, [x29, 152]
+	ldrb	w0, [x0, #:lo12:.LANCHOR80]
+	mul	w0, w0, w2
+	cmp	w28, w0
+	bcc	.L2585
+	adrp	x0, .LC160
+	add	x0, x0, :lo12:.LC160
+	stp	x0, x1, [x29, 152]
+	adrp	x0, .LC159
+	add	x28, x0, :lo12:.LC159
+	mov	x22, 0
+.L2586:
+	ldr	x0, [x29, 160]
+	ldr	w1, [x29, 168]
+	ldrb	w0, [x0]
+	mul	w0, w0, w1
+	cmp	w0, w22
+	bhi	.L2592
+	mov	x0, x20
+	bl	zbuf_free
+	ldrh	w1, [x19, 12]
+	ldrh	w0, [x25, #:lo12:.LANCHOR87]
+	ldrb	w2, [x19, 9]
+	madd	w0, w0, w2, w1
+	mov	x1, -4
+	add	x0, x1, x0, sxtw 2
+	ldr	x1, [x29, 136]
+	ldr	x1, [x1, #:lo12:.LANCHOR111]
+	ldr	w0, [x1, x0]
+	cmn	w0, #1
+	beq	.L2593
+	adrp	x1, .LANCHOR189
+	adrp	x0, .LC0
+	mov	w2, 1660
+	add	x1, x1, :lo12:.LANCHOR189
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2593:
+	ldrh	w0, [x19, 6]
+	cmp	w0, 1
+	bne	.L2546
+	mov	x0, x19
+	bl	ftl_write_last_log_page
+.L2546:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 368
 	ret
-.L2501:
-	ldrb	w1, [x0, 2]
-	add	x0, x0, 4
-	and	w1, w1, 31
-	bfi	w1, w3, 3, 2
-	strb	w1, [x0, -2]
-	b	.L2500
-.L2511:
-	adrp	x0, .LANCHOR73
-	strh	w20, [x24]
-	ldrb	w0, [x0, #:lo12:.LANCHOR73]
-	cbnz	w0, .L2503
-	mov	w0, w20
-	bl	ftl_test_block
-.L2503:
-	ldrb	w11, [x23, #:lo12:.LANCHOR67]
-	adrp	x0, .LANCHOR104
-	ldr	x6, [x22, #:lo12:.LANCHOR7]
-	mov	w7, 0
-	ldrb	w14, [x0, #:lo12:.LANCHOR104]
-	mov	w10, 0
-	ldr	x13, [x21, #:lo12:.LANCHOR102]
-	mov	w8, 0
-	mul	w12, w20, w11
-	add	x6, x6, x20, uxth 2
-.L2504:
-	cmp	w8, w14
-	bcs	.L2508
-	add	w15, w11, w7
-	b	.L2509
-.L2507:
-	add	w1, w7, w12
-	mov	w0, w8
-	bl	flash_check_bad_block
-	cbz	w0, .L2505
-	ldrb	w1, [x6, 3]
-	lsl	w0, w26, w7
-	orr	w0, w0, w1
-	strb	w0, [x6, 3]
-	ldrh	w0, [x13, 148]
-	add	w0, w0, 1
-	strh	w0, [x13, 148]
-.L2506:
-	add	w7, w7, 1
-.L2509:
-	cmp	w7, w15
-	bne	.L2507
-	add	w8, w8, 1
-	sub	w12, w12, w11
-	and	w8, w8, 65535
-	b	.L2504
-.L2505:
-	add	w10, w10, 1
-	and	w10, w10, 65535
-	b	.L2506
-.L2508:
-	cbnz	w10, .L2510
-	ldrb	w0, [x6, 2]
-	orr	w0, w0, -32
-	strb	w0, [x6, 2]
-.L2510:
-	add	w20, w20, 1
-	and	w20, w20, 65535
-	b	.L2502
-.L2522:
-	add	x10, x14, x20, uxth 2
-	mov	w6, 0
-	mov	w8, 0
-	mov	w5, 0
-	ldrb	w0, [x10, 2]
-	orr	w0, w0, -32
-	strb	w0, [x10, 2]
-.L2517:
-	cmp	w5, w15
-	bcc	.L2524
-	add	w20, w20, 1
-	add	w1, w1, w16
-	and	w20, w20, 65535
-	and	w1, w1, 65535
-	b	.L2516
-.L2520:
-	ldrb	w11, [x10, 3]
-	add	w17, w8, w7
-	asr	w11, w11, w17
-	tbnz	x11, 0, .L2518
-	cmp	w13, 1
-	bls	.L2523
-	and	w0, w0, 1
-	add	w0, w1, w0
-	and	w0, w0, 65535
-.L2519:
-	add	x11, x2, x3, sxtw 1
-	add	w3, w3, 1
-	and	w3, w3, 65535
-	add	w0, w0, w6
-	strh	w0, [x11, 160]
-.L2518:
-	add	x7, x7, 1
-.L2521:
-	and	w0, w7, 65535
-	cmp	w0, w16
-	bcc	.L2520
-	add	w5, w5, 1
-	add	w6, w4, w6
-	and	w5, w5, 65535
-	add	w8, w8, w13
-	and	w6, w6, 65535
-	b	.L2517
-.L2523:
-	mov	w0, w1
-	b	.L2519
-.L2524:
-	mov	x7, 0
-	b	.L2521
-	.size	ftl_low_format, .-ftl_low_format
-	.section	.text.ftl_re_low_format,"ax",@progbits
-	.align	2
-	.global	ftl_re_low_format
-	.type	ftl_re_low_format, %function
-ftl_re_low_format:
-	stp	x29, x30, [sp, -16]!
+.L2566:
+	ldrb	w22, [x19, 5]
+	adrp	x0, .LANCHOR105
+	add	x0, x0, :lo12:.LANCHOR105
+	str	x0, [x29, 136]
+.L2554:
+	ldrb	w0, [x19, 9]
+	cmp	w0, w22
+	bhi	.L2565
+	add	w24, w24, 1
+	strb	wzr, [x19, 5]
+	and	w24, w24, 65535
+	b	.L2553
+.L2565:
+	add	x0, x19, x22, sxtw 1
+	mov	w1, 65535
+	ldrh	w0, [x0, 16]
+	cmp	w0, w1
+	beq	.L2555
+	ldr	x1, [x29, 136]
+	ldr	x2, [x20, 24]
+	ldrh	w1, [x1]
+	madd	w0, w1, w0, w24
+	ldr	x1, [x20, 8]
+	str	w0, [x29, 152]
+	adrp	x0, .LANCHOR125
+	ldrb	w3, [x0, #:lo12:.LANCHOR125]
+	ldr	w0, [x29, 152]
+	bl	ftl_read_ppa_page
+	mov	w28, w0
+	cmp	w0, 512
+	beq	.L2556
+	cmn	w0, #1
+	beq	.L2557
+	ldr	x0, [x20, 24]
+	ldr	w1, [x0]
+	cmn	w1, #1
+	bne	.L2557
+	ldr	w0, [x0, 4]
+	cmn	w0, #1
+	bne	.L2557
+	ldr	x0, [x20, 8]
+	ldr	w0, [x0]
+	cmn	w0, #1
+	beq	.L2556
+.L2557:
+	adrp	x0, .LANCHOR185
 	mov	w1, 1
-	adrp	x0, .LC150
-	add	x0, x0, :lo12:.LC150
-	add	x29, sp, 0
+	strb	w1, [x0, #:lo12:.LANCHOR185]
+	ldrb	w0, [x19, 9]
+	ldrh	w1, [x19, 10]
+	madd	w0, w0, w24, w22
+	cmp	w1, w0
+	beq	.L2558
+	adrp	x1, .LANCHOR189
+	adrp	x0, .LC0
+	mov	w2, 1488
+	add	x1, x1, :lo12:.LANCHOR189
+	add	x0, x0, :lo12:.LC0
 	bl	printf
-	bl	sblk_init
-	bl	ftl_info_blk_init
-	bl	ftl_ext_info_init
-	adrp	x0, .LANCHOR102
-	adrp	x2, .LANCHOR6
-	mov	w3, 0
-	mov	w4, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR102]
-	mov	w5, 0
-	ldrh	w7, [x2, #:lo12:.LANCHOR6]
-	adrp	x2, .LANCHOR7
-	ldr	x2, [x2, #:lo12:.LANCHOR7]
-	ldrh	w1, [x0, 134]
-	add	x2, x2, x1, uxth 2
-.L2535:
-	cmp	w1, w7
-	bcc	.L2539
-	strh	w5, [x0, 114]
-	strh	w4, [x0, 118]
-	strh	w3, [x0, 116]
-	strh	wzr, [x0, 122]
-	strh	wzr, [x0, 120]
-	strh	wzr, [x0, 124]
-	bl	ftl_low_format_data_init
-	mov	w0, 0
-	ldp	x29, x30, [sp], 16
-	ret
-.L2539:
-	ldrb	w6, [x2, 2]
-	and	w8, w6, 31
-	strb	w8, [x2, 2]
-	ands	w6, w6, 24
-	bne	.L2536
-	add	w5, w5, 1
-	and	w5, w5, 65535
-.L2537:
-	add	w1, w1, 1
-	add	x2, x2, 4
-	and	w1, w1, 65535
-	b	.L2535
-.L2536:
-	cmp	w6, 16
-	bne	.L2538
-	add	w4, w4, 1
-	and	w4, w4, 65535
-	b	.L2537
-.L2538:
-	add	w3, w3, 1
-	and	w3, w3, 65535
-	b	.L2537
-	.size	ftl_re_low_format, .-ftl_re_low_format
-	.section	.text.ftl_prog_ppa_page,"ax",@progbits
-	.align	2
-	.global	ftl_prog_ppa_page
-	.type	ftl_prog_ppa_page, %function
-ftl_prog_ppa_page:
-	ubfx	x5, x0, 21, 3
-	mov	w4, w3
-	mov	x3, x2
-	mov	x2, x1
-	and	w1, w0, 2097151
-	mov	w0, w5
-	b	ftl_prog_page
-	.size	ftl_prog_ppa_page, .-ftl_prog_ppa_page
-	.section	.text.ftl_write_last_log_page,"ax",@progbits
-	.align	2
-	.global	ftl_write_last_log_page
-	.type	ftl_write_last_log_page, %function
-ftl_write_last_log_page:
-	ldrh	w1, [x0, 6]
-	cmp	w1, 1
-	bne	.L2544
-	stp	x29, x30, [sp, -48]!
-	adrp	x1, .LANCHOR109
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	x19, x0
-	stp	x21, x22, [sp, 32]
-	ldr	x20, [x1, #:lo12:.LANCHOR109]
-	ldrh	w22, [x0, 12]
-	bl	ftl_get_new_free_page
-	mov	w21, w0
-	cmn	w0, #1
-	beq	.L2545
-	ldrh	w0, [x19]
-	add	x20, x20, x22, uxth 2
-	bl	ftl_vpn_decrement
-	adrp	x0, .LANCHOR176
-	mov	w1, 15555
-	add	x6, x0, :lo12:.LANCHOR176
-	movk	w1, 0xf55f, lsl 16
-	str	w1, [x0, #:lo12:.LANCHOR176]
-	adrp	x0, .LANCHOR85
-	ldrh	w1, [x0, #:lo12:.LANCHOR85]
-	adrp	x0, .LANCHOR78
-	ldrb	w0, [x0, #:lo12:.LANCHOR78]
-	mul	w1, w1, w0
-	mov	x0, x20
-	lsl	w1, w1, 2
-	bl	js_hash
-	stp	w0, wzr, [x6, 4]
-	adrp	x0, .LANCHOR123
-	mov	x2, x6
-	mov	x1, x20
-	ldrb	w3, [x0, #:lo12:.LANCHOR123]
-	mov	w0, w21
-	str	wzr, [x6, 12]
-	bl	ftl_prog_ppa_page
-.L2545:
-	mov	w0, 0
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 48
-	ret
-.L2544:
-	mov	w0, -1
-	ret
-	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
-	.section	.text.ftl_open_sblk_recovery,"ax",@progbits
-	.align	2
-	.global	ftl_open_sblk_recovery
-	.type	ftl_open_sblk_recovery, %function
-ftl_open_sblk_recovery:
-	stp	x29, x30, [sp, -224]!
-	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR14
-	stp	x19, x20, [sp, 16]
-	mov	x19, x0
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	stp	x25, x26, [sp, 64]
-	mov	x25, x1
-	stp	x23, x24, [sp, 48]
-	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2551
-	ldrh	w1, [x19, 2]
-	adrp	x0, .LC151
-	add	x0, x0, :lo12:.LC151
-	bl	printf
-.L2551:
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2552
-	ldrb	w1, [x19, 5]
-	adrp	x0, .LC152
-	add	x0, x0, :lo12:.LC152
-	bl	printf
-.L2552:
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2553
-	ldrh	w1, [x19]
-	adrp	x0, .LC153
-	add	x0, x0, :lo12:.LC153
-	bl	printf
-.L2553:
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2554
-	ldrh	w2, [x19, 18]
-	adrp	x0, .LC154
-	ldrh	w1, [x19, 16]
-	add	x0, x0, :lo12:.LC154
-	bl	printf
-.L2554:
-	ldrh	w0, [x19, 10]
-	strh	w0, [x19, 14]
-	adrp	x0, .LANCHOR6
-	ldrh	w1, [x19]
-	ldrh	w0, [x0, #:lo12:.LANCHOR6]
-	cmp	w1, w0
-	bcs	.L2550
-	mov	w0, 1
-	add	x26, x29, 160
-	bl	buf_alloc
-	mov	x20, x0
-	mov	w2, 64
-	mov	w1, 255
-	mov	x0, x26
-	bl	ftl_memset
-	ldrb	w22, [x19, 5]
-	adrp	x0, .LANCHOR123
-	ldrh	w23, [x19, 2]
-	add	x0, x0, :lo12:.LANCHOR123
-	mov	w27, 2
-	adrp	x24, .LANCHOR85
-	str	x0, [x29, 128]
-	str	wzr, [x29, 152]
-.L2556:
-	ldrh	w0, [x24, #:lo12:.LANCHOR85]
-	cmp	w0, w23
-	bhi	.L2569
-.L2559:
+.L2558:
 	ldrh	w0, [x19, 10]
 	ldrh	w1, [x19, 6]
-	ldrh	w2, [x24, #:lo12:.LANCHOR85]
+	ldrb	w2, [x19, 9]
 	add	w1, w1, w0
-	ldrb	w0, [x19, 9]
-	strh	w23, [x19, 2]
-	strb	w22, [x19, 5]
+	ldrh	w0, [x25, #:lo12:.LANCHOR87]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L2570
-	adrp	x1, .LANCHOR189
-	adrp	x0, .LC0
-	mov	w2, 1493
-	add	x1, x1, :lo12:.LANCHOR189
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2570:
-	adrp	x2, .LANCHOR109
-	ldrh	w3, [x19, 10]
-	mov	w0, 0
-	mov	w1, 0
-	ldr	x4, [x2, #:lo12:.LANCHOR109]
-	str	x2, [x29, 136]
-.L2571:
-	cmp	w1, w3
-	bcc	.L2573
-	ldrb	w22, [x19, 9]
-	adrp	x23, .LANCHOR9
-	ldrh	w1, [x24, #:lo12:.LANCHOR85]
-	madd	w22, w22, w1, w0
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	sub	w22, w22, w3
-	and	w22, w22, 65535
-	tbz	x0, 12, .L2574
-	ldrh	w1, [x19]
-	ldr	x2, [x23, #:lo12:.LANCHOR9]
-	ubfiz	x0, x1, 1, 16
-	ldrh	w3, [x2, x0]
-	adrp	x0, .LC155
-	mov	w2, w22
-	add	x0, x0, :lo12:.LC155
-	bl	printf
-.L2574:
-	ldr	x0, [x23, #:lo12:.LANCHOR9]
-	ldrh	w1, [x19]
-	strh	w22, [x0, x1, lsl 1]
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 14, .L2575
-	ldp	w1, w2, [x29, 160]
-	adrp	x0, .LC156
-	ldp	w3, w4, [x29, 168]
-	add	x0, x0, :lo12:.LC156
-	bl	printf
-.L2575:
-	adrp	x25, .LANCHOR123
-	ldr	x0, [x20, 8]
-	mov	w1, 0
-	mov	x23, 0
-	ldrb	w2, [x25, #:lo12:.LANCHOR123]
-	lsl	w2, w2, 9
-	bl	ftl_memset
-	adrp	x0, .LC158
-	add	x0, x0, :lo12:.LC158
-	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR78
-	add	x0, x0, :lo12:.LANCHOR78
-	str	x0, [x29, 112]
-.L2576:
-	adrp	x0, .LANCHOR78
-	str	w23, [x29, 148]
-	ldrb	w0, [x0, #:lo12:.LANCHOR78]
-	mul	w0, w0, w27
-	cmp	w23, w0
-	bcc	.L2589
-	mov	x0, x20
-	bl	buf_free
-	ldrh	w1, [x19, 12]
-	ldrh	w0, [x24, #:lo12:.LANCHOR85]
-	ldrb	w2, [x19, 9]
-	madd	w0, w0, w2, w1
-	mov	x1, -4
-	add	x0, x1, x0, sxtw 2
-	ldr	x1, [x29, 136]
-	ldr	x1, [x1, #:lo12:.LANCHOR109]
-	ldr	w0, [x1, x0]
-	cmn	w0, #1
-	beq	.L2590
+	beq	.L2559
 	adrp	x1, .LANCHOR189
 	adrp	x0, .LC0
-	mov	w2, 1567
+	mov	w2, 1489
 	add	x1, x1, :lo12:.LANCHOR189
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2590:
-	ldrh	w0, [x19, 6]
-	cmp	w0, 1
-	bne	.L2550
-	mov	x0, x19
-	bl	ftl_write_last_log_page
-.L2550:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 224
-	ret
-.L2569:
-	ldrb	w22, [x19, 5]
-	adrp	x0, .LANCHOR103
-	add	x0, x0, :lo12:.LANCHOR103
-	str	x0, [x29, 136]
-.L2557:
-	ldrb	w0, [x19, 9]
-	cmp	w0, w22
-	bhi	.L2568
-	add	w23, w23, 1
-	strb	wzr, [x19, 5]
-	and	w23, w23, 65535
-	b	.L2556
-.L2568:
-	add	x0, x19, x22, sxtw 1
-	mov	w1, 65535
-	ldrh	w0, [x0, 16]
-	cmp	w0, w1
-	beq	.L2558
-	ldr	x1, [x29, 136]
-	ldr	x2, [x20, 24]
-	ldrh	w1, [x1]
-	madd	w0, w1, w0, w23
-	ldr	x1, [x20, 8]
-	str	w0, [x29, 148]
-	adrp	x0, .LANCHOR123
-	ldrb	w3, [x0, #:lo12:.LANCHOR123]
-	ldr	w0, [x29, 148]
-	bl	ftl_read_ppa_page
-	mov	w28, w0
-	cmp	w0, 512
-	beq	.L2559
-	cmn	w0, #1
-	beq	.L2560
+.L2559:
+	cmn	w28, #1
+	beq	.L2561
 	ldr	x0, [x20, 24]
-	ldr	w1, [x0]
-	cmn	w1, #1
-	bne	.L2560
 	ldr	w0, [x0, 4]
 	cmn	w0, #1
-	bne	.L2560
-	ldr	x0, [x20, 8]
-	ldr	w0, [x0]
-	cmn	w0, #1
-	beq	.L2559
-.L2560:
-	adrp	x0, .LANCHOR182
-	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR182]
-	ldrb	w0, [x19, 9]
-	ldrh	w1, [x19, 10]
-	madd	w0, w0, w23, w22
-	cmp	w1, w0
 	beq	.L2561
-	adrp	x1, .LANCHOR189
-	adrp	x0, .LC0
-	mov	w2, 1412
-	add	x1, x1, :lo12:.LANCHOR189
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2561:
-	ldrh	w0, [x19, 10]
-	ldrh	w1, [x19, 6]
-	ldrb	w2, [x19, 9]
-	add	w1, w1, w0
-	ldrh	w0, [x24, #:lo12:.LANCHOR85]
-	mul	w0, w0, w2
-	cmp	w1, w0
-	beq	.L2562
-	adrp	x1, .LANCHOR189
-	adrp	x0, .LC0
-	mov	w2, 1413
-	add	x1, x1, :lo12:.LANCHOR189
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2562:
-	cmn	w28, #1
-	beq	.L2564
-	ldr	x0, [x20, 24]
-	ldr	w0, [x0, 4]
-	cmn	w0, #1
-	beq	.L2564
 	bl	lpa_hash_get_ppa
-	cbz	x25, .L2566
+	ldr	x1, [x29, 144]
+	cbz	x1, .L2563
 	ldr	x3, [x20, 24]
 	ldr	w1, [x3, 8]
 	cmp	w0, w1
-	beq	.L2566
+	beq	.L2563
 	cmn	w0, #1
-	beq	.L2566
-	adrp	x4, .LANCHOR66
-	mov	w28, 21
-	mov	w27, 1
-	ldrh	w5, [x4, #:lo12:.LANCHOR66]
-	sub	w1, w28, w5
-	lsr	w2, w0, w5
-	adrp	x5, .LANCHOR67
-	lsl	w1, w27, w1
+	beq	.L2563
+	adrp	x5, .LANCHOR31
+	adrp	x6, .LANCHOR68
+	mov	w4, 24
+	mov	w28, 1
+	ldrb	w1, [x5, #:lo12:.LANCHOR31]
+	ldrh	w7, [x6, #:lo12:.LANCHOR68]
+	sub	w1, w4, w1
+	sub	w1, w1, w7
+	lsr	w2, w0, w7
+	adrp	x7, .LANCHOR69
+	lsl	w1, w28, w1
 	sub	w1, w1, #1
 	and	w1, w1, w2
-	ldrb	w2, [x5, #:lo12:.LANCHOR67]
+	ldrb	w2, [x7, #:lo12:.LANCHOR69]
 	udiv	w1, w1, w2
-	ldrh	w2, [x25]
+	ldr	x2, [x29, 144]
+	ldrh	w2, [x2]
 	cmp	w2, w1, uxth
-	bne	.L2566
+	bne	.L2563
 	ldr	x1, [x29, 128]
-	adrp	x6, .LANCHOR178
-	ldr	w7, [x3]
-	add	x2, x6, :lo12:.LANCHOR178
-	str	w7, [x29, 120]
-	str	x6, [x29, 152]
+	adrp	x8, .LANCHOR181
+	ldr	w10, [x3]
+	add	x2, x8, :lo12:.LANCHOR181
+	str	w10, [x29, 160]
+	str	x8, [x29, 168]
 	ldrb	w3, [x1]
 	ldr	x1, [x20, 8]
-	stp	x5, x4, [x29, 104]
+	str	x7, [x29, 96]
+	str	w4, [x29, 108]
+	stp	x5, x6, [x29, 112]
 	bl	ftl_read_ppa_page
-	ldr	x6, [x29, 152]
-	ldr	w7, [x29, 120]
-	ldr	w0, [x6, #:lo12:.LANCHOR178]
-	cmp	w7, w0
-	bhi	.L2566
+	ldr	x8, [x29, 168]
+	ldr	w10, [x29, 160]
+	ldr	w0, [x8, #:lo12:.LANCHOR181]
+	cmp	w10, w0
+	bhi	.L2563
 	ldr	x0, [x20, 24]
-	ldr	w0, [x0, 8]
-	cmn	w0, #1
-	beq	.L2564
-	ldp	x5, x4, [x29, 104]
-	ldrh	w1, [x4, #:lo12:.LANCHOR66]
-	sub	w28, w28, w1
-	lsr	w0, w0, w1
-	lsl	w27, w27, w28
-	sub	w27, w27, #1
-	and	w27, w27, w0
-	ldrb	w0, [x5, #:lo12:.LANCHOR67]
-	udiv	w0, w27, w0
+	ldr	w3, [x0, 8]
+	cmn	w3, #1
+	beq	.L2561
+	ldp	x5, x6, [x29, 112]
+	ldr	w4, [x29, 108]
+	ldr	x7, [x29, 96]
+	ldrb	w2, [x5, #:lo12:.LANCHOR31]
+	ldrh	w1, [x6, #:lo12:.LANCHOR68]
+	sub	w4, w4, w2
+	sub	w4, w4, w1
+	lsr	w0, w3, w1
+	lsl	w28, w28, w4
+	sub	w28, w28, #1
+	and	w28, w28, w0
+	ldrb	w0, [x7, #:lo12:.LANCHOR69]
+	udiv	w0, w28, w0
 	bl	ftl_vpn_decrement
-.L2564:
+.L2561:
 	ldrh	w0, [x19, 6]
-	mov	w27, 4
 	sub	w0, w0, #1
 	strh	w0, [x19, 6]
 	ldrh	w0, [x19, 10]
 	add	w0, w0, 1
 	strh	w0, [x19, 10]
+	mov	w0, 4
+	str	w0, [x29, 168]
 	mov	w0, 1
-	str	w0, [x29, 152]
-.L2558:
+	str	w0, [x29, 160]
+.L2555:
 	add	w22, w22, 1
 	and	w22, w22, 65535
-	b	.L2557
-.L2573:
+	b	.L2554
+.L2570:
 	ldrh	w2, [x19, 12]
 	add	w2, w2, w1
 	ldr	w2, [x4, x2, lsl 2]
 	cmn	w2, #1
-	beq	.L2572
+	beq	.L2569
 	add	w22, w0, 1
 	and	w0, w22, 65535
-.L2572:
+.L2569:
 	add	w1, w1, 1
-	b	.L2571
-.L2589:
-	ldr	w0, [x26, x23, lsl 2]
-	adrp	x28, .LANCHOR102
+	b	.L2568
+.L2585:
+	ldr	w0, [x23, x28, lsl 2]
 	cmn	w0, #1
-	bne	.L2577
-.L2581:
-	ldr	x1, [x28, #:lo12:.LANCHOR102]
-	mov	w22, -1
+	bne	.L2574
+.L2578:
+	adrp	x1, .LANCHOR104
 	ldr	x0, [x20, 24]
+	mov	w22, -1
+	ldr	x1, [x1, #:lo12:.LANCHOR104]
 	ldr	w1, [x1, 8]
 	stp	w1, w22, [x0]
 	stp	w22, wzr, [x0, 8]
 	ldr	x0, [x20, 8]
 	str	wzr, [x0]
-.L2578:
-	ldr	w0, [x29, 152]
-	cbz	w0, .L2583
+.L2575:
+	ldr	w0, [x29, 160]
+	cbz	w0, .L2580
 	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bls	.L2583
+	bls	.L2580
 	add	x0, x21, :lo12:.LANCHOR14
-	mov	x28, x0
-	add	x0, x25, :lo12:.LANCHOR123
+	str	x0, [x29, 144]
+	add	x0, x24, :lo12:.LANCHOR125
 	str	x0, [x29, 128]
-.L2630:
+.L2641:
 	mov	x0, x19
 	bl	ftl_get_new_free_page
-	mov	w4, w0
-	ldr	w0, [x28]
-	tbz	x0, 14, .L2585
+	mov	w5, w0
+	ldr	x0, [x29, 144]
+	ldr	w0, [x0]
+	tbz	x0, 14, .L2582
+	ldrh	w0, [x19, 12]
+	mov	w1, w5
+	ldrh	w3, [x19, 10]
+	str	w5, [x29, 108]
+	add	w3, w3, w0
 	ldr	x0, [x20, 24]
-	mov	w1, w4
-	str	w4, [x29, 104]
+	sub	w3, w3, #1
 	ldr	w2, [x0, 4]
 	ldr	x0, [x29, 120]
 	bl	printf
-	ldr	w4, [x29, 104]
-.L2585:
+	ldr	w5, [x29, 108]
+.L2582:
 	ldr	x0, [x29, 112]
-	ldr	w2, [x29, 148]
+	ldr	w2, [x29, 168]
 	ldrh	w1, [x19, 6]
 	ldrb	w0, [x0]
-	mul	w0, w0, w27
+	mul	w0, w0, w2
+	ldr	w2, [x29, 152]
 	add	w0, w0, 1
 	sub	w0, w0, w2
 	cmp	w1, w0
-	bls	.L2583
+	bls	.L2580
 	ldr	x0, [x29, 128]
 	ldr	x1, [x20, 8]
 	ldr	x2, [x20, 24]
+	str	w5, [x29, 96]
 	ldrb	w3, [x0]
-	mov	w0, w4
+	mov	w0, w5
 	bl	ftl_prog_ppa_page
 	mov	w1, w0
 	ldrh	w0, [x19]
-	str	w1, [x29, 104]
+	str	w1, [x29, 108]
 	bl	ftl_vpn_decrement
-	ldr	w1, [x29, 104]
+	ldr	w1, [x29, 108]
 	cmn	w22, #1
+	ldr	w5, [x29, 96]
 	ccmn	w1, #1, 4, ne
-	beq	.L2586
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 14, .L2587
-	ldr	x0, [x20, 24]
-	ldrh	w1, [x19, 12]
-	ldrh	w3, [x19, 10]
-	add	w3, w3, w1
-	ldp	w1, w2, [x0, 4]
-	sub	w3, w3, #1
-	adrp	x0, .LC159
-	add	x0, x0, :lo12:.LC159
-	bl	printf
-.L2587:
-	ldr	x0, [x20, 24]
+	beq	.L2583
+	ldrh	w0, [x19, 10]
 	ldrh	w1, [x19, 12]
-	ldrh	w2, [x19, 10]
-	add	w2, w2, w1
-	ldr	w1, [x0, 8]
-	ldr	w0, [x0, 4]
-	sub	w2, w2, #1
-	bl	lpa_hash_update_ppa
-.L2583:
-	add	x23, x23, 1
-	b	.L2576
-.L2577:
-	ldrb	w3, [x25, #:lo12:.LANCHOR123]
+	str	w5, [x26, x28, lsl 2]
+	add	w0, w0, w1
+	sub	w0, w0, #1
+	str	w0, [x27, x28, lsl 2]
+.L2580:
+	add	x28, x28, 1
+	b	.L2573
+.L2574:
+	ldrb	w3, [x24, #:lo12:.LANCHOR125]
 	ldr	x1, [x20, 8]
 	ldr	x2, [x20, 24]
 	bl	ftl_read_ppa_page
@@ -15982,76 +16189,122 @@ ftl_open_sblk_recovery:
 	ldr	x0, [x20, 24]
 	ldr	w0, [x0, 4]
 	bl	lpa_hash_get_ppa
-	mov	w4, w0
+	mov	w5, w0
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 14, .L2579
+	tbz	x0, 14, .L2576
 	ldr	x0, [x20, 24]
-	mov	w1, w4
-	ldr	w2, [x26, x23, lsl 2]
-	str	w4, [x29, 128]
+	mov	w1, w5
+	ldr	w2, [x23, x28, lsl 2]
+	str	w5, [x29, 144]
 	ldr	w3, [x0, 4]
-	adrp	x0, .LC157
-	add	x0, x0, :lo12:.LC157
+	adrp	x0, .LC158
+	add	x0, x0, :lo12:.LC158
 	bl	printf
-	ldr	w4, [x29, 128]
-.L2579:
-	ldr	x2, [x28, #:lo12:.LANCHOR102]
-	ldr	w0, [x26, x23, lsl 2]
-	cmp	w4, w0
+	ldr	w5, [x29, 144]
+.L2576:
+	ldr	w0, [x23, x28, lsl 2]
+	mov	w1, 1
+	cmp	w5, w0
 	ldr	x0, [x20, 24]
-	ldr	w1, [x2, 8]
 	csinv	w22, w22, wzr, eq
 	cmn	w22, #1
-	add	w3, w1, 1
-	str	w3, [x2, 8]
-	str	w1, [x0]
-	mov	w1, 1
-	str	w4, [x0, 8]
-	str	w1, [x0, 12]
-	bne	.L2578
-	b	.L2581
-.L2586:
+	stp	w5, w1, [x0, 8]
+	bne	.L2575
+	b	.L2578
+.L2583:
 	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bls	.L2583
+	bls	.L2580
 	cmn	w22, #1
-	bne	.L2630
-	b	.L2583
-.L2566:
+	bne	.L2641
+	b	.L2580
+.L2592:
+	ldr	w0, [x26, x22, lsl 2]
+	cmn	w0, #1
+	beq	.L2588
+	ldrb	w3, [x24, #:lo12:.LANCHOR125]
+	ldr	w0, [x23, x22, lsl 2]
+	ldr	x1, [x20, 8]
+	ldr	x2, [x20, 24]
+	bl	ftl_read_ppa_page
+	cmp	w0, 256
+	ccmn	w0, #1, 4, ne
+	bne	.L2588
+	ldrb	w3, [x24, #:lo12:.LANCHOR125]
+	ldr	w0, [x26, x22, lsl 2]
+	ldr	x1, [x20, 8]
+	ldr	x2, [x20, 24]
+	bl	ftl_read_ppa_page
+	mov	w5, w0
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 14, .L2590
+	ldr	x0, [x20, 24]
+	mov	w1, w5
+	ldr	w3, [x23, x22, lsl 2]
+	str	w5, [x29, 144]
+	ldr	w2, [x0, 8]
+	mov	x0, x28
+	bl	printf
+	ldr	w5, [x29, 144]
+.L2590:
+	cmn	w5, #1
+	beq	.L2588
+	ldr	x0, [x20, 24]
+	ldr	w2, [x23, x22, lsl 2]
+	ldr	w1, [x0, 8]
+	cmp	w2, w1
+	bne	.L2588
+	ldr	w1, [x21, #:lo12:.LANCHOR14]
+	tbz	x1, 14, .L2591
+	ldr	w1, [x0, 4]
+	ldr	w3, [x27, x22, lsl 2]
+	ldr	x0, [x29, 152]
+	bl	printf
+.L2591:
+	ldr	x0, [x20, 24]
+	lsl	x1, x22, 2
+	ldrh	w2, [x27, x1]
+	ldr	w1, [x0, 8]
+	ldr	w0, [x0, 4]
+	bl	lpa_hash_update_ppa
+.L2588:
+	add	x22, x22, 1
+	b	.L2586
+.L2563:
 	ldr	x3, [x20, 24]
-	adrp	x0, .LANCHOR120
-	ldr	w0, [x0, #:lo12:.LANCHOR120]
+	adrp	x0, .LANCHOR122
+	ldr	w0, [x0, #:lo12:.LANCHOR122]
 	ldr	w1, [x3, 4]
 	cmp	w1, w0
-	bcs	.L2564
+	bcs	.L2561
 	ldrb	w0, [x19, 9]
-	ldrh	w1, [x24, #:lo12:.LANCHOR85]
+	ldrh	w1, [x25, #:lo12:.LANCHOR87]
 	ldrh	w2, [x19, 10]
 	mul	w0, w0, w1
 	sub	w0, w0, #1
 	cmp	w2, w0
-	bge	.L2564
-	adrp	x0, .LANCHOR102
+	bge	.L2561
+	adrp	x0, .LANCHOR104
 	ldr	w1, [x3]
-	ldr	x0, [x0, #:lo12:.LANCHOR102]
+	ldr	x0, [x0, #:lo12:.LANCHOR104]
 	ldr	w4, [x0, 8]
 	cmp	w1, w4
-	bls	.L2567
+	bls	.L2564
 	str	w1, [x0, 8]
-.L2567:
+.L2564:
 	ldrh	w0, [x19, 12]
 	add	w2, w2, w0
 	ldp	w0, w1, [x3, 4]
 	bl	lpa_hash_update_ppa
-	ldr	w0, [x29, 164]
-	str	w0, [x29, 160]
-	ldr	w0, [x29, 168]
-	str	w0, [x29, 164]
-	ldr	w0, [x29, 172]
-	str	w0, [x29, 168]
-	ldr	w0, [x29, 148]
-	str	w0, [x29, 172]
-	b	.L2564
+	ldr	w0, [x29, 180]
+	str	w0, [x29, 176]
+	ldr	w0, [x29, 184]
+	str	w0, [x29, 180]
+	ldr	w0, [x29, 188]
+	str	w0, [x29, 184]
+	ldr	w0, [x29, 152]
+	str	w0, [x29, 188]
+	b	.L2561
 	.size	ftl_open_sblk_recovery, .-ftl_open_sblk_recovery
 	.section	.text.pm_write_page,"ax",@progbits
 	.align	2
@@ -16063,46 +16316,46 @@ pm_write_page:
 	stp	x19, x20, [sp, 16]
 	mov	w19, w0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR85
+	adrp	x21, .LANCHOR87
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR103
+	adrp	x22, .LANCHOR105
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LANCHOR102
+	adrp	x23, .LANCHOR104
 	mov	x25, x1
-	add	x21, x21, :lo12:.LANCHOR85
+	add	x21, x21, :lo12:.LANCHOR87
 	mov	x20, x23
-	add	x22, x22, :lo12:.LANCHOR103
+	add	x22, x22, :lo12:.LANCHOR105
 	mov	w24, 65535
 	str	x27, [sp, 80]
-.L2653:
-	ldr	x0, [x23, #:lo12:.LANCHOR102]
+.L2668:
+	ldr	x0, [x23, #:lo12:.LANCHOR104]
 	ldr	w1, [x0, 48]
 	ldrh	w2, [x0, 696]
 	add	w1, w1, 1
 	str	w1, [x0, 48]
 	ldrh	w1, [x21]
 	cmp	w2, w1
-	bcs	.L2654
+	bcs	.L2669
 	ldrh	w0, [x0, 692]
 	cmp	w0, w24
-	bne	.L2655
-.L2654:
+	bne	.L2670
+.L2669:
 	bl	pm_alloc_new_blk
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2655:
-	ldr	x0, [x20, #:lo12:.LANCHOR102]
+.L2670:
+	ldr	x0, [x20, #:lo12:.LANCHOR104]
 	ldrh	w0, [x0, 692]
 	cmp	w0, w24
-	bne	.L2656
+	bne	.L2671
 	adrp	x1, .LANCHOR190
 	adrp	x0, .LC0
-	mov	w2, 230
+	mov	w2, 263
 	add	x1, x1, :lo12:.LANCHOR190
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2656:
-	ldr	x0, [x20, #:lo12:.LANCHOR102]
+.L2671:
+	ldr	x0, [x20, #:lo12:.LANCHOR104]
 	adrp	x27, .LANCHOR191
 	ldrh	w1, [x22]
 	mov	w2, 64
@@ -16114,43 +16367,43 @@ pm_write_page:
 	bl	ftl_memset
 	ldr	x3, [x27, #:lo12:.LANCHOR191]
 	mov	x2, x25
-	ldr	x0, [x20, #:lo12:.LANCHOR102]
+	ldr	x0, [x20, #:lo12:.LANCHOR104]
 	str	w19, [x3]
 	ldr	w1, [x0, 48]
 	ldrb	w0, [x0, 694]
 	str	w1, [x3, 4]
-	adrp	x1, .LANCHOR123
-	ldrb	w4, [x1, #:lo12:.LANCHOR123]
+	adrp	x1, .LANCHOR125
+	ldrb	w4, [x1, #:lo12:.LANCHOR125]
 	mov	w1, w26
 	bl	ftl_prog_page
-	ldr	x2, [x20, #:lo12:.LANCHOR102]
+	ldr	x2, [x20, #:lo12:.LANCHOR104]
 	ldrh	w1, [x2, 696]
 	add	w1, w1, 1
 	and	w1, w1, 65535
 	strh	w1, [x2, 696]
 	cmp	w1, 1
 	adrp	x1, .LANCHOR192
-	beq	.L2657
+	beq	.L2672
 	ldrb	w3, [x1, #:lo12:.LANCHOR192]
-	cbz	w3, .L2658
-.L2657:
+	cbz	w3, .L2673
+.L2672:
 	strb	wzr, [x1, #:lo12:.LANCHOR192]
-	b	.L2653
-.L2658:
+	b	.L2668
+.L2673:
 	cmn	w0, #1
-	bne	.L2660
+	bne	.L2675
 	mov	w1, w26
-	adrp	x0, .LC160
-	add	x0, x0, :lo12:.LC160
+	adrp	x0, .LC161
+	add	x0, x0, :lo12:.LC161
 	bl	printf
-	b	.L2653
-.L2660:
+	b	.L2668
+.L2675:
 	ldrh	w0, [x2, 698]
 	cmp	w19, w0
-	bcs	.L2661
+	bcs	.L2676
 	add	x19, x2, x19, uxtw 2
 	str	w26, [x19, 704]
-.L2661:
+.L2676:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -16177,15 +16430,15 @@ ftl_dump_write_open_sblk:
 	stp	x25, x26, [sp, 112]
 	stp	x27, x28, [sp, 128]
 	cmp	w0, w20
-	bls	.L2666
-	adrp	x25, .LANCHOR75
+	bls	.L2681
+	adrp	x25, .LANCHOR77
 	str	x25, [x29, 136]
-	ldrb	w0, [x25, #:lo12:.LANCHOR75]
-	cbnz	w0, .L2668
-	adrp	x0, .LANCHOR72
-	ldrb	w0, [x0, #:lo12:.LANCHOR72]
-	cbz	w0, .L2666
-.L2668:
+	ldrb	w0, [x25, #:lo12:.LANCHOR77]
+	cbnz	w0, .L2683
+	adrp	x0, .LANCHOR74
+	ldrb	w0, [x0, #:lo12:.LANCHOR74]
+	cbz	w0, .L2681
+.L2683:
 	adrp	x0, .LANCHOR7
 	ubfiz	x14, x20, 2, 16
 	mov	x15, x0
@@ -16194,12 +16447,12 @@ ftl_dump_write_open_sblk:
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 160
-	bne	.L2688
-	adrp	x0, .LANCHOR71
-	ldrb	w10, [x0, #:lo12:.LANCHOR71]
-.L2669:
+	bne	.L2703
+	adrp	x0, .LANCHOR73
+	ldrb	w10, [x0, #:lo12:.LANCHOR73]
+.L2684:
 	add	x22, x29, 176
-	adrp	x23, .LANCHOR85
+	adrp	x23, .LANCHOR87
 	str	w10, [x29, 128]
 	mov	w0, w20
 	mov	w24, 0
@@ -16208,7 +16461,7 @@ ftl_dump_write_open_sblk:
 	mov	w27, 0
 	add	x1, x22, 16
 	bl	ftl_get_blk_list_in_sblk
-	ldrh	w1, [x23, #:lo12:.LANCHOR85]
+	ldrh	w1, [x23, #:lo12:.LANCHOR87]
 	and	w0, w0, 255
 	strb	w0, [x29, 153]
 	strb	wzr, [x29, 149]
@@ -16222,9 +16475,9 @@ ftl_dump_write_open_sblk:
 	ldrb	w2, [x1, 2]
 	mov	w1, w20
 	ldrh	w4, [x0, x14]
-	adrp	x0, .LC161
+	adrp	x0, .LC162
 	ubfx	x5, x5, 11, 8
-	add	x0, x0, :lo12:.LC161
+	add	x0, x0, :lo12:.LC162
 	ubfx	x3, x2, 3, 2
 	and	w4, w4, 2047
 	ubfx	x2, x2, 5, 3
@@ -16233,52 +16486,52 @@ ftl_dump_write_open_sblk:
 	bl	buf_alloc
 	mov	x19, x0
 	ldr	w10, [x29, 128]
-	adrp	x12, .LANCHOR103
-	add	x14, x23, :lo12:.LANCHOR85
-	add	x12, x12, :lo12:.LANCHOR103
-.L2670:
+	adrp	x12, .LANCHOR105
+	add	x14, x23, :lo12:.LANCHOR87
+	add	x12, x12, :lo12:.LANCHOR105
+.L2685:
 	ldrh	w0, [x14]
 	cmp	w0, w25
-	bls	.L2676
+	bls	.L2691
 	lsl	w11, w25, 1
-	adrp	x26, .LC162
+	adrp	x26, .LC163
 	sub	w11, w11, #1
 	mov	w27, 0
-	add	x26, x26, :lo12:.LC162
-	b	.L2680
-.L2688:
+	add	x26, x26, :lo12:.LC163
+	b	.L2695
+.L2703:
 	mov	w10, 1
-	b	.L2669
-.L2678:
+	b	.L2684
+.L2693:
 	ldrh	w13, [x22, x28]
 	mov	w0, 65535
 	cmp	w13, w0
-	bne	.L2671
-.L2677:
+	bne	.L2686
+.L2692:
 	add	w24, w24, 1
 	and	w24, w24, 65535
-.L2672:
+.L2687:
 	cmp	w10, w24
-	bcs	.L2678
+	bcs	.L2693
 	add	w27, w27, 1
 	and	w27, w27, 65535
-.L2680:
+.L2695:
 	ldrb	w0, [x29, 153]
 	cmp	w0, w27
-	bls	.L2679
+	bls	.L2694
 	sxtw	x28, w27
 	mov	w24, 1
 	add	x28, x28, 8
 	lsl	x28, x28, 1
-	b	.L2672
-.L2671:
+	b	.L2687
+.L2686:
 	ldrh	w21, [x12]
 	cmp	w10, 3
 	mul	w21, w21, w13
-	bne	.L2673
+	bne	.L2688
 	add	w21, w25, w21
 	orr	w21, w21, w24, lsl 24
-.L2674:
+.L2689:
 	str	w21, [x19, 40]
 	mov	w1, 1
 	stp	x12, x14, [x29, 96]
@@ -16313,120 +16566,129 @@ ftl_dump_write_open_sblk:
 	ldp	w11, w10, [x29, 116]
 	cmp	w15, 512
 	ldp	x12, x14, [x29, 96]
-	bne	.L2677
-.L2676:
+	bne	.L2692
+.L2691:
 	mov	w4, w24
 	mov	w3, w27
 	mov	w2, w25
 	mov	w1, w20
-	adrp	x24, .LANCHOR123
-	adrp	x0, .LC163
-	add	x0, x0, :lo12:.LC163
+	adrp	x24, .LANCHOR125
+	adrp	x0, .LC164
+	add	x0, x0, :lo12:.LC164
 	bl	printf
 	ldr	x0, [x19, 8]
 	mov	w1, 0
-	ldrb	w2, [x24, #:lo12:.LANCHOR123]
-	adrp	x26, .LC164
-	adrp	x27, .LANCHOR71
-	add	x26, x26, :lo12:.LC164
-	add	x27, x27, :lo12:.LANCHOR71
+	ldrb	w2, [x24, #:lo12:.LANCHOR125]
+	adrp	x26, .LC165
+	adrp	x27, .LANCHOR73
+	add	x26, x26, :lo12:.LC165
+	add	x27, x27, :lo12:.LANCHOR73
 	lsl	w2, w2, 9
 	bl	ftl_memset
 	ldr	x0, [x19, 24]
 	mov	w1, 0
-	ldrb	w2, [x24, #:lo12:.LANCHOR123]
+	ldrb	w2, [x24, #:lo12:.LANCHOR125]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.L2681:
-	ldrh	w0, [x23, #:lo12:.LANCHOR85]
+.L2696:
+	ldrh	w0, [x23, #:lo12:.LANCHOR87]
 	cmp	w0, w25
-	bls	.L2686
+	bls	.L2701
 	ldr	x0, [x29, 136]
 	lsl	w28, w25, 1
 	mov	w21, 0
-	add	x0, x0, :lo12:.LANCHOR75
+	add	x0, x0, :lo12:.LANCHOR77
 	str	x0, [x29, 128]
-	b	.L2687
-.L2673:
+	b	.L2702
+.L2688:
 	cmp	w10, 2
-	bne	.L2675
-	adrp	x0, .LANCHOR71
+	bne	.L2690
+	adrp	x0, .LANCHOR73
 	add	w21, w21, w11
 	add	w21, w21, w24
-	ldrb	w3, [x0, #:lo12:.LANCHOR71]
+	ldrb	w3, [x0, #:lo12:.LANCHOR73]
 	orr	w21, w21, w3, lsl 24
-	b	.L2674
-.L2675:
+	b	.L2689
+.L2690:
 	add	w21, w25, w21
-	b	.L2674
-.L2679:
+	b	.L2689
+.L2694:
 	add	w8, w25, 1
 	and	w25, w8, 65535
-	b	.L2670
-.L2685:
+	b	.L2685
+.L2700:
 	mov	w2, w21
 	mov	w1, w25
 	mov	x0, x26
 	bl	printf
 	ldr	x0, [x29, 128]
-	adrp	x2, .LANCHOR103
+	adrp	x2, .LANCHOR105
 	ldrb	w1, [x0]
 	sxtw	x0, w21
-	cbz	w1, .L2682
+	cbz	w1, .L2697
 	add	x0, x0, 8
-	ldrh	w1, [x2, #:lo12:.LANCHOR103]
+	ldrh	w1, [x2, #:lo12:.LANCHOR105]
 	ldrh	w0, [x22, x0, lsl 1]
 	mul	w0, w0, w1
 	orr	w0, w0, w25
 	str	w0, [x19, 40]
 	mov	x0, x19
 	bl	sblk_3d_tlc_dump_prog
-.L2683:
+.L2698:
 	add	w21, w21, 1
 	and	w21, w21, 65535
-.L2687:
+.L2702:
 	ldrb	w0, [x29, 153]
 	cmp	w0, w21
-	bhi	.L2685
+	bhi	.L2700
 	add	w8, w25, 1
 	and	w25, w8, 65535
-	b	.L2681
-.L2682:
+	b	.L2696
+.L2697:
 	ldrb	w1, [x27]
 	add	x0, x0, 8
 	cmp	w1, 2
-	bne	.L2684
+	bne	.L2699
 	ldrh	w0, [x22, x0, lsl 1]
-	ldrh	w1, [x2, #:lo12:.LANCHOR103]
+	ldrh	w1, [x2, #:lo12:.LANCHOR105]
 	mul	w0, w0, w1
 	orr	w0, w0, w28
 	orr	w0, w0, 33554432
 	str	w0, [x19, 40]
 	mov	x0, x19
 	bl	sblk_mlc_dump_prog
-	b	.L2683
-.L2684:
+	b	.L2698
+.L2699:
 	ldrh	w1, [x22, x0, lsl 1]
+	mov	w6, 1
+	ldrh	w0, [x2, #:lo12:.LANCHOR105]
 	mov	w5, 0
-	ldrh	w0, [x2, #:lo12:.LANCHOR103]
-	ldrb	w4, [x24, #:lo12:.LANCHOR123]
-	ldr	x2, [x19, 8]
+	ldrb	w4, [x24, #:lo12:.LANCHOR125]
 	ldr	x3, [x19, 24]
 	mul	w1, w1, w0
+	adrp	x0, .LANCHOR31
+	ldrb	w2, [x0, #:lo12:.LANCHOR31]
+	mov	w0, 24
 	orr	w1, w1, w25
 	str	w1, [x19, 40]
-	ubfx	x0, x1, 21, 3
-	and	w1, w1, -14680065
+	sub	w0, w0, w2
+	lsl	w6, w6, w2
+	ldr	x2, [x19, 8]
+	sub	w6, w6, #1
+	lsl	w7, w6, w0
+	lsr	w0, w1, w0
+	bic	w1, w1, w7
+	and	w0, w0, w6
 	bl	flash_prog_page_en
-	b	.L2683
-.L2686:
+	b	.L2698
+.L2701:
 	mov	x0, x19
-	bl	buf_free
-	adrp	x0, .LC165
+	bl	zbuf_free
+	adrp	x0, .LC166
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC165
+	add	x0, x0, :lo12:.LC166
 	bl	printf
-.L2666:
+.L2681:
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
 	ldp	x23, x24, [sp, 96]
@@ -16435,7 +16697,748 @@ ftl_dump_write_open_sblk:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 224
 	ret
-	.size	ftl_dump_write_open_sblk, .-ftl_dump_write_open_sblk
+	.size	ftl_dump_write_open_sblk, .-ftl_dump_write_open_sblk
+	.section	.text.ftl_ink_check_sblk,"ax",@progbits
+	.align	2
+	.global	ftl_ink_check_sblk
+	.type	ftl_ink_check_sblk, %function
+ftl_ink_check_sblk:
+	stp	x29, x30, [sp, -144]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x24, .LANCHOR7
+	stp	x19, x20, [sp, 16]
+	and	w19, w0, 65535
+	ldr	x0, [x24, #:lo12:.LANCHOR7]
+	ubfiz	x23, x19, 2, 16
+	stp	x21, x22, [sp, 32]
+	mov	w1, w19
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	ldr	w3, [x0, x23]
+	ldrh	w2, [x0, x23]
+	adrp	x0, .LC167
+	add	x0, x0, :lo12:.LC167
+	ubfx	x3, x3, 11, 8
+	and	w2, w2, 2047
+	bl	printf
+	mov	w0, 65535
+	cmp	w19, w0
+	beq	.L2711
+	adrp	x0, .LANCHOR6
+	ldrh	w0, [x0, #:lo12:.LANCHOR6]
+	cmp	w0, w19
+	bls	.L2711
+	add	x21, x29, 144
+	mov	w1, 0
+	mov	w0, w19
+	bl	ftl_erase_sblk
+	mov	w0, w19
+	adrp	x27, .LANCHOR125
+	strh	w19, [x21, -32]!
+	add	x1, x21, 16
+	bl	ftl_get_blk_list_in_sblk
+	strb	w0, [x29, 121]
+	mov	w0, 1
+	bl	buf_alloc
+	mov	x20, x0
+	ldr	x0, [x24, #:lo12:.LANCHOR7]
+	ldrb	w2, [x27, #:lo12:.LANCHOR125]
+	ldrh	w0, [x0, x23]
+	lsl	w2, w2, 9
+	and	w0, w0, 2047
+	cmp	w0, 1
+	bgt	.L2713
+	mov	w1, 85
+.L2729:
+	ldr	x0, [x20, 8]
+	adrp	x28, .LANCHOR105
+	add	x28, x28, :lo12:.LANCHOR105
+	mov	w26, 0
+	bl	ftl_memset
+	bl	sblk_wait_write_queue_completed
+	mov	w7, 65280
+	movk	w7, 0x55aa, lsl 16
+.L2715:
+	adrp	x25, .LANCHOR87
+	ldrh	w0, [x25, #:lo12:.LANCHOR87]
+	cmp	w0, w26
+	bls	.L2718
+	adrp	x25, .LANCHOR31
+	mov	w22, 0
+	add	x25, x25, :lo12:.LANCHOR31
+	b	.L2719
+.L2713:
+	mov	w1, 170
+	b	.L2729
+.L2717:
+	add	x0, x21, x22, sxtw 1
+	mov	w1, 65535
+	ldrh	w0, [x0, 16]
+	cmp	w0, w1
+	beq	.L2716
+	ldrh	w1, [x28]
+	mov	w6, 1
+	ldr	x2, [x20, 8]
+	mov	w5, 0
+	ldr	x3, [x20, 24]
+	str	w7, [x29, 108]
+	madd	w1, w1, w0, w26
+	mov	w0, 24
+	stp	w1, w7, [x2]
+	str	wzr, [x3]
+	ldrb	w4, [x25]
+	sub	w0, w0, w4
+	lsl	w6, w6, w4
+	ldrb	w4, [x27, #:lo12:.LANCHOR125]
+	sub	w6, w6, #1
+	lsl	w8, w6, w0
+	lsr	w0, w1, w0
+	bic	w1, w1, w8
+	and	w0, w0, w6
+	bl	flash_prog_page_en
+	ldr	w7, [x29, 108]
+.L2716:
+	add	w22, w22, 1
+	and	w22, w22, 65535
+.L2719:
+	ldrb	w0, [x29, 121]
+	cmp	w0, w22
+	bhi	.L2717
+	add	w26, w26, 1
+	and	w26, w26, 65535
+	b	.L2715
+.L2718:
+	adrp	x26, .LANCHOR105
+	add	x26, x26, :lo12:.LANCHOR105
+	mov	w28, 0
+.L2720:
+	ldrh	w0, [x25, #:lo12:.LANCHOR87]
+	cmp	w0, w28
+	bls	.L2725
+	mov	w27, 0
+	b	.L2726
+.L2724:
+	sxtw	x22, w27
+	mov	w1, 65535
+	add	x22, x22, 8
+	lsl	x22, x22, 1
+	ldrh	w0, [x21, x22]
+	cmp	w0, w1
+	beq	.L2722
+	ldrh	w4, [x26]
+	mov	w1, 1
+	madd	w4, w4, w0, w28
+	mov	x0, x20
+	str	w4, [x20, 40]
+	str	w4, [x29, 108]
+	bl	sblk_read_page
+	ldr	x0, [x20, 8]
+	ldr	w4, [x29, 108]
+	ldr	w0, [x0]
+	cmp	w4, w0
+	beq	.L2722
+	mov	w0, w4
+	bl	ftl_mask_bad_block
+	mov	w0, -1
+	strh	w0, [x21, x22]
+.L2722:
+	add	w2, w27, 1
+	and	w27, w2, 65535
+.L2726:
+	ldrb	w0, [x29, 121]
+	cmp	w0, w27
+	bhi	.L2724
+	add	w3, w28, 1
+	and	w28, w3, 65535
+	b	.L2720
+.L2725:
+	mov	x0, x20
+	bl	zbuf_free
+	ldr	x0, [x24, #:lo12:.LANCHOR7]
+	mov	w1, w19
+	ldr	w3, [x0, x23]
+	ldrh	w2, [x0, x23]
+	adrp	x0, .LC168
+	add	x0, x0, :lo12:.LC168
+	ubfx	x3, x3, 11, 8
+	and	w2, w2, 2047
+	bl	printf
+.L2711:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 144
+	ret
+	.size	ftl_ink_check_sblk, .-ftl_ink_check_sblk
+	.section	.text.ftl_open_sblk_init,"ax",@progbits
+	.align	2
+	.global	ftl_open_sblk_init
+	.type	ftl_open_sblk_init, %function
+ftl_open_sblk_init:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR80
+	stp	x23, x24, [sp, 48]
+	adrp	x22, .LC77
+	stp	x19, x20, [sp, 16]
+	adrp	x24, .LANCHOR87
+	mov	x19, x0
+	mov	w23, w1
+	add	x24, x24, :lo12:.LANCHOR87
+	add	x21, x21, :lo12:.LANCHOR80
+	add	x22, x22, :lo12:.LC77
+	stp	x25, x26, [sp, 64]
+.L2731:
+.L2735:
+	mov	w0, w23
+	bl	ftl_alloc_sblk
+	adrp	x1, .LANCHOR104
+	and	w25, w0, 65535
+	mov	w26, w25
+	uxtw	x20, w25
+	ldr	x1, [x1, #:lo12:.LANCHOR104]
+	ldrh	w1, [x1, 150]
+	cbz	w1, .L2732
+	adrp	x2, .LANCHOR7
+	lsl	x1, x20, 2
+	ldr	x2, [x2, #:lo12:.LANCHOR7]
+	ldrh	w1, [x2, x1]
+	and	w1, w1, 2047
+	cmp	w1, 2
+	bgt	.L2732
+	bl	ftl_ink_check_sblk
+.L2732:
+	mov	w1, 0
+	mov	w0, w26
+	bl	ftl_erase_sblk
+	add	x1, x19, 16
+	mov	w0, w26
+	bl	ftl_get_blk_list_in_sblk
+	and	w0, w0, 255
+	ldrh	w1, [x24]
+	cmp	w23, 2
+	strb	w0, [x19, 9]
+	strh	w26, [x19]
+	strh	wzr, [x19, 2]
+	mul	w0, w1, w0
+	strb	wzr, [x19, 5]
+	strh	w0, [x19, 6]
+	strh	wzr, [x19, 10]
+	strb	w23, [x19, 4]
+	beq	.L2736
+	ldrb	w0, [x21]
+	mul	w0, w1, w0
+	and	w0, w0, 65535
+.L2733:
+	ldrb	w2, [x21]
+	adrp	x26, .LANCHOR9
+	strh	w0, [x19, 12]
+	lsl	x20, x20, 1
+	mul	w2, w2, w1
+	adrp	x1, .LANCHOR111
+	ldr	x3, [x1, #:lo12:.LANCHOR111]
+	mov	w1, 255
+	lsl	w2, w2, 2
+	add	x0, x3, x0, uxth 2
+	bl	ftl_memset
+	ldr	x0, [x26, #:lo12:.LANCHOR9]
+	ldrh	w1, [x19, 6]
+	strh	w1, [x0, x20]
+	ldrb	w0, [x19, 9]
+	cbnz	w0, .L2730
+	mov	w1, w25
+	mov	x0, x22
+	bl	printf
+	ldr	x0, [x26, #:lo12:.LANCHOR9]
+	mov	w1, -1
+	strh	w1, [x0, x20]
+	mov	w0, 7
+	strb	w0, [x19, 4]
+	b	.L2735
+.L2736:
+	mov	w0, 0
+	b	.L2733
+.L2730:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+	.size	ftl_open_sblk_init, .-ftl_open_sblk_init
+	.section	.text.ftl_low_format_data_init,"ax",@progbits
+	.align	2
+	.global	ftl_low_format_data_init
+	.type	ftl_low_format_data_init, %function
+ftl_low_format_data_init:
+	stp	x29, x30, [sp, -48]!
+	mov	w2, 16384
+	mov	w1, 0
+	adrp	x0, ftl_ext_info_data_buffer
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	add	x0, x0, :lo12:ftl_ext_info_data_buffer
+	str	x21, [sp, 32]
+	bl	ftl_memset
+	bl	zftl_sblk_list_init
+	adrp	x19, .LANCHOR104
+	mov	w0, 1
+	bl	ftl_alloc_sblk
+	mov	w1, 0
+	mov	w21, w0
+	bl	ftl_erase_sblk
+	ldr	x1, [x19, #:lo12:.LANCHOR104]
+	mov	w0, w21
+	add	x1, x1, 672
+	bl	ftl_get_blk_list_in_sblk
+	ldr	x0, [x19, #:lo12:.LANCHOR104]
+	ldrh	w20, [x0, 672]
+	strh	wzr, [x0, 690]
+	mov	w0, 65533
+	sub	w1, w20, #1
+	cmp	w0, w1, uxth
+	bcs	.L2742
+	adrp	x1, .LANCHOR193
+	adrp	x0, .LC0
+	mov	w2, 2146
+	add	x1, x1, :lo12:.LANCHOR193
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2742:
+	ldr	x0, [x19, #:lo12:.LANCHOR104]
+	mov	w2, 256
+	mov	w1, 255
+	add	x0, x0, 416
+	strh	wzr, [x0, 280]
+	bl	ftl_memset
+	ldr	x0, [x19, #:lo12:.LANCHOR104]
+	mov	w2, 4096
+	mov	w1, 0
+	add	x0, x0, 704
+	bl	ftl_memset
+	adrp	x0, .LANCHOR31
+	ldr	x1, [x19, #:lo12:.LANCHOR104]
+	ldrb	w2, [x0, #:lo12:.LANCHOR31]
+	mov	w0, 24
+	sub	w0, w0, w2
+	adrp	x2, .LANCHOR68
+	strh	w21, [x1, 416]
+	adrp	x21, .LANCHOR10
+	ldrh	w2, [x2, #:lo12:.LANCHOR68]
+	strh	w20, [x1, 692]
+	sub	w0, w0, w2
+	asr	w0, w20, w0
+	strh	w0, [x1, 694]
+	mov	w0, 1
+	strh	w0, [x1, 688]
+	adrp	x0, .LANCHOR194
+	ldrh	w0, [x0, #:lo12:.LANCHOR194]
+	strh	w0, [x1, 698]
+	mov	w1, 20038
+	ldr	x0, [x21, #:lo12:.LANCHOR10]
+	movk	w1, 0x4549, lsl 16
+	str	w1, [x0]
+	bl	ftl_alloc_sys_blk
+	mov	w20, w0
+	mov	w1, 0
+	bl	ftl_erase_phy_blk
+	ldr	x0, [x19, #:lo12:.LANCHOR104]
+	mov	w1, 2
+	strh	w20, [x0, 130]
+	mov	w20, -1
+	strh	wzr, [x0, 140]
+	ldr	x0, [x21, #:lo12:.LANCHOR10]
+	add	x0, x0, 16
+	strh	w20, [x0, 568]
+	strh	w20, [x0, 570]
+	strh	w20, [x0, 572]
+	strh	w20, [x0, 574]
+	bl	ftl_open_sblk_init
+	ldr	x0, [x21, #:lo12:.LANCHOR10]
+	mov	w1, 3
+	add	x0, x0, 48
+	bl	ftl_open_sblk_init
+	ldr	x1, [x19, #:lo12:.LANCHOR104]
+	ldr	x0, [x21, #:lo12:.LANCHOR10]
+	add	x0, x0, 136
+	ldrh	w2, [x1, 134]
+	strh	w2, [x0, -10]
+	strh	w20, [x0, -56]
+	mov	w2, -1
+	strh	w20, [x0, -6]
+	str	w2, [x0, 408]
+	strh	wzr, [x0, -12]
+	strh	wzr, [x0, -16]
+	strh	wzr, [x0, -14]
+	strh	w2, [x1, 126]
+	mov	w2, 256
+	str	wzr, [x0, 384]
+	mov	w1, 255
+	str	wzr, [x0, 388]
+	str	wzr, [x0, 392]
+	bl	ftl_memset
+	mov	w2, 128
+	mov	w1, 255
+	ldr	x0, [x21, #:lo12:.LANCHOR10]
+	add	x0, x0, 392
+	bl	ftl_memset
+	bl	ftl_ext_info_flush
+	mov	w0, 0
+	bl	ftl_info_flush
+	bl	ftl_info_blk_init
+	ldr	x21, [sp, 32]
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+	.size	ftl_low_format_data_init, .-ftl_low_format_data_init
+	.section	.text.ftl_low_format,"ax",@progbits
+	.align	2
+	.global	ftl_low_format
+	.type	ftl_low_format, %function
+ftl_low_format:
+	stp	x29, x30, [sp, -80]!
+	mov	w1, 0
+	adrp	x0, .LC169
+	add	x0, x0, :lo12:.LC169
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR195
+	stp	x21, x22, [sp, 32]
+	add	x20, x20, :lo12:.LANCHOR195
+	stp	x25, x26, [sp, 64]
+	adrp	x22, .LANCHOR27
+	mov	x25, x22
+	stp	x23, x24, [sp, 48]
+	mov	w19, 8
+	adrp	x23, .LC0
+	bl	printf
+.L2747:
+	ldr	x0, [x22, #:lo12:.LANCHOR27]
+	add	x0, x0, x19, sxtw
+	ldrb	w21, [x0, 32]
+	add	w0, w21, 127
+	and	w0, w0, 255
+	cmp	w0, 125
+	bhi	.L2745
+	mov	w2, 2200
+	mov	x1, x20
+	add	x0, x23, :lo12:.LC0
+	bl	printf
+.L2745:
+	cmp	w21, 255
+	beq	.L2746
+	adrp	x0, .LANCHOR105
+	ldrh	w1, [x0, #:lo12:.LANCHOR105]
+	mov	w0, 0
+	mul	w1, w1, w21
+	bl	flash_erase_block
+.L2746:
+	add	w19, w19, 1
+	cmp	w19, 16
+	bne	.L2747
+	bl	sblk_init
+	adrp	x22, .LANCHOR7
+	bl	ftl_info_blk_init
+	adrp	x19, .LANCHOR6
+	mov	w2, 16384
+	mov	w1, 0
+	adrp	x0, ftl_info_data_buffer
+	add	x0, x0, :lo12:ftl_info_data_buffer
+	bl	ftl_memset
+	ldr	x0, [x22, #:lo12:.LANCHOR7]
+	mov	w3, 1
+	ldrh	w2, [x19, #:lo12:.LANCHOR6]
+	add	x2, x0, x2, lsl 2
+.L2748:
+	cmp	x0, x2
+	bne	.L2749
+	adrp	x21, .LANCHOR104
+	mov	w1, 21574
+	adrp	x24, .LANCHOR62
+	add	x24, x24, :lo12:.LANCHOR62
+	ldr	x0, [x21, #:lo12:.LANCHOR104]
+	movk	w1, 0x494c, lsl 16
+	mov	w20, 0
+	mov	w26, 1
+	strh	wzr, [x0, 148]
+	str	w1, [x0]
+.L2750:
+	ldrh	w0, [x19, #:lo12:.LANCHOR6]
+	adrp	x23, .LANCHOR69
+	cmp	w0, w20
+	bhi	.L2759
+	ldr	x0, [x25, #:lo12:.LANCHOR27]
+	mov	w4, 3
+	ldrb	w2, [x23, #:lo12:.LANCHOR69]
+	mov	w10, 15
+	ldr	x6, [x21, #:lo12:.LANCHOR104]
+	cmp	w2, 1
+	ldr	x1, [x22, #:lo12:.LANCHOR7]
+	ldrb	w0, [x0, 47]
+	csinc	w4, w4, wzr, ne
+	and	w4, w4, 255
+	and	w8, w2, 65535
+	ldrh	w3, [x6, 148]
+	udiv	w0, w0, w2
+	and	w5, w0, 65535
+	ubfiz	x0, x0, 2, 8
+	add	x0, x0, 4
+	add	w20, w5, 1
+	add	x0, x1, x0
+.L2762:
+	cmp	w2, 4
+	add	x1, x1, 4
+	csel	w7, w10, w4, eq
+	strb	w7, [x1, -1]
+	ldrb	w7, [x1, -2]
+	orr	w7, w7, -32
+	strb	w7, [x1, -2]
+	cmp	x1, x0
+	bne	.L2762
+	mul	w5, w5, w8
+	mov	w4, 16
+	add	w0, w8, w3
+	sdiv	w4, w4, w2
+	add	w0, w5, w0, uxth
+	strh	w0, [x6, 148]
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	add	w4, w20, w4
+	and	w4, w4, 65535
+	strh	w4, [x6, 134]
+	tbz	x0, 12, .L2763
+	adrp	x0, .LC170
+	mov	w3, w20
+	mov	w2, 128
+	mov	w1, 2247
+	add	x0, x0, :lo12:.LC170
+	bl	printf
+.L2763:
+	ldr	x0, [x21, #:lo12:.LANCHOR104]
+	mov	w2, 128
+	mov	w1, 255
+	add	x0, x0, 160
+	bl	ftl_memset
+	adrp	x0, .LANCHOR106
+	ldrb	w10, [x23, #:lo12:.LANCHOR69]
+	adrp	x3, .LANCHOR68
+	ldr	x2, [x21, #:lo12:.LANCHOR104]
+	ldrb	w16, [x0, #:lo12:.LANCHOR106]
+	adrp	x0, .LANCHOR31
+	and	w11, w10, 65535
+	ldr	x15, [x22, #:lo12:.LANCHOR7]
+	ldrb	w4, [x0, #:lo12:.LANCHOR31]
+	mov	w0, 24
+	ldrh	w8, [x2, 134]
+	sub	w0, w0, w4
+	ldrh	w4, [x3, #:lo12:.LANCHOR68]
+	mul	w1, w20, w11
+	mov	w3, 0
+	sub	w0, w0, w4
+	mov	w4, 1
+	and	w1, w1, 65535
+	lsl	w4, w4, w0
+	and	w4, w4, 65535
+.L2764:
+	cmp	w20, w8
+	bcc	.L2770
+	ldrh	w0, [x19, #:lo12:.LANCHOR6]
+	strh	w3, [x2, 112]
+	sub	w0, w0, w8
+	strh	wzr, [x2, 114]
+	strh	w0, [x2, 116]
+	strh	wzr, [x2, 118]
+	strh	w8, [x2, 132]
+	bl	ftl_low_format_data_init
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L2749:
+	ldrb	w1, [x0, 2]
+	add	x0, x0, 4
+	and	w1, w1, 31
+	bfi	w1, w3, 3, 2
+	strb	w1, [x0, -2]
+	b	.L2748
+.L2759:
+	adrp	x0, .LANCHOR75
+	strh	w20, [x24]
+	ldrb	w0, [x0, #:lo12:.LANCHOR75]
+	cbnz	w0, .L2751
+	mov	w0, w20
+	bl	ftl_test_block
+.L2751:
+	ldrb	w11, [x23, #:lo12:.LANCHOR69]
+	adrp	x0, .LANCHOR106
+	ldr	x6, [x22, #:lo12:.LANCHOR7]
+	mov	w7, 0
+	ldrb	w14, [x0, #:lo12:.LANCHOR106]
+	mov	w10, 0
+	ldr	x13, [x21, #:lo12:.LANCHOR104]
+	mov	w8, 0
+	mul	w12, w20, w11
+	add	x6, x6, x20, uxth 2
+.L2752:
+	cmp	w8, w14
+	bcs	.L2756
+	add	w15, w11, w7
+	b	.L2757
+.L2755:
+	add	w1, w7, w12
+	mov	w0, w8
+	bl	flash_check_bad_block
+	cbz	w0, .L2753
+	ldrb	w1, [x6, 3]
+	lsl	w0, w26, w7
+	orr	w0, w0, w1
+	strb	w0, [x6, 3]
+	ldrh	w0, [x13, 148]
+	add	w0, w0, 1
+	strh	w0, [x13, 148]
+.L2754:
+	add	w7, w7, 1
+.L2757:
+	cmp	w7, w15
+	bne	.L2755
+	add	w8, w8, 1
+	sub	w12, w12, w11
+	and	w8, w8, 65535
+	b	.L2752
+.L2753:
+	add	w10, w10, 1
+	and	w10, w10, 65535
+	b	.L2754
+.L2756:
+	cbnz	w10, .L2758
+	ldrb	w0, [x6, 2]
+	orr	w0, w0, -32
+	strb	w0, [x6, 2]
+.L2758:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L2750
+.L2770:
+	add	x13, x15, x20, uxth 2
+	mov	w6, 0
+	mov	w12, 0
+	mov	w5, 0
+	ldrb	w0, [x13, 2]
+	orr	w0, w0, -32
+	strb	w0, [x13, 2]
+.L2765:
+	cmp	w5, w16
+	bcc	.L2772
+	add	w20, w20, 1
+	add	w1, w1, w11
+	and	w20, w20, 65535
+	and	w1, w1, 65535
+	b	.L2764
+.L2768:
+	ldrb	w14, [x13, 3]
+	add	w17, w12, w7
+	asr	w14, w14, w17
+	tbnz	x14, 0, .L2766
+	cmp	w10, 1
+	bls	.L2771
+	and	w0, w0, 1
+	add	w0, w1, w0
+	and	w0, w0, 65535
+.L2767:
+	add	x14, x2, x3, sxtw 1
+	add	w3, w3, 1
+	and	w3, w3, 65535
+	add	w0, w0, w6
+	strh	w0, [x14, 160]
+.L2766:
+	add	x7, x7, 1
+.L2769:
+	and	w0, w7, 65535
+	cmp	w0, w11
+	bcc	.L2768
+	add	w5, w5, 1
+	add	w6, w4, w6
+	and	w5, w5, 65535
+	add	w12, w12, w10
+	and	w6, w6, 65535
+	b	.L2765
+.L2771:
+	mov	w0, w1
+	b	.L2767
+.L2772:
+	mov	x7, 0
+	b	.L2769
+	.size	ftl_low_format, .-ftl_low_format
+	.section	.text.ftl_re_low_format,"ax",@progbits
+	.align	2
+	.global	ftl_re_low_format
+	.type	ftl_re_low_format, %function
+ftl_re_low_format:
+	stp	x29, x30, [sp, -16]!
+	mov	w1, 1
+	adrp	x0, .LC171
+	add	x0, x0, :lo12:.LC171
+	add	x29, sp, 0
+	bl	printf
+	bl	sblk_init
+	bl	ftl_info_blk_init
+	bl	ftl_ext_info_init
+	adrp	x0, .LANCHOR104
+	adrp	x2, .LANCHOR6
+	mov	w3, 0
+	mov	w4, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR104]
+	mov	w5, 0
+	ldrh	w7, [x2, #:lo12:.LANCHOR6]
+	adrp	x2, .LANCHOR7
+	ldr	x2, [x2, #:lo12:.LANCHOR7]
+	ldrh	w1, [x0, 134]
+	add	x2, x2, x1, uxth 2
+.L2783:
+	cmp	w1, w7
+	bcc	.L2787
+	strh	w5, [x0, 114]
+	strh	w4, [x0, 118]
+	strh	w3, [x0, 116]
+	strh	wzr, [x0, 122]
+	strh	wzr, [x0, 120]
+	strh	wzr, [x0, 124]
+	bl	ftl_low_format_data_init
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+.L2787:
+	ldrb	w6, [x2, 2]
+	and	w8, w6, 31
+	strb	w8, [x2, 2]
+	ands	w6, w6, 24
+	bne	.L2784
+	add	w5, w5, 1
+	and	w5, w5, 65535
+.L2785:
+	add	w1, w1, 1
+	add	x2, x2, 4
+	and	w1, w1, 65535
+	b	.L2783
+.L2784:
+	cmp	w6, 16
+	bne	.L2786
+	add	w4, w4, 1
+	and	w4, w4, 65535
+	b	.L2785
+.L2786:
+	add	w3, w3, 1
+	and	w3, w3, 65535
+	b	.L2785
+	.size	ftl_re_low_format, .-ftl_re_low_format
 	.section	.text.flash_info_flush,"ax",@progbits
 	.align	2
 	.global	flash_info_flush
@@ -16450,33 +17453,33 @@ flash_info_flush:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2697
-	adrp	x2, .LANCHOR193
-	adrp	x0, .LC90
-	add	x2, x2, :lo12:.LANCHOR193
+	tbz	x0, 12, .L2790
+	adrp	x2, .LANCHOR196
+	adrp	x0, .LC92
+	add	x2, x2, :lo12:.LANCHOR196
 	mov	w1, 324
-	add	x0, x0, :lo12:.LC90
+	add	x0, x0, :lo12:.LC92
 	bl	printf
-.L2697:
-	adrp	x23, .LANCHOR194
+.L2790:
+	adrp	x23, .LANCHOR197
 	adrp	x20, .LANCHOR27
 	mov	w2, 64
 	mov	w1, 0
-	ldr	x0, [x23, #:lo12:.LANCHOR194]
-	adrp	x21, .LANCHOR195
+	ldr	x0, [x23, #:lo12:.LANCHOR197]
+	adrp	x21, .LANCHOR198
 	adrp	x22, .LANCHOR2
-	adrp	x24, .LC167
-	adrp	x25, .LANCHOR140
+	adrp	x24, .LC173
+	adrp	x25, .LANCHOR142
 	add	x22, x22, :lo12:.LANCHOR2
-	add	x24, x24, :lo12:.LC167
-	add	x25, x25, :lo12:.LANCHOR140
+	add	x24, x24, :lo12:.LC173
+	add	x25, x25, :lo12:.LANCHOR142
 	bl	ftl_memset
-	add	x27, x21, :lo12:.LANCHOR195
+	add	x27, x21, :lo12:.LANCHOR198
 	ldr	x1, [x20, #:lo12:.LANCHOR27]
 	mov	w3, 16
 	mov	w2, 4
-	adrp	x0, .LC166
-	add	x0, x0, :lo12:.LC166
+	adrp	x0, .LC172
+	add	x0, x0, :lo12:.LC172
 	mov	w26, 0
 	bl	rknand_print_hex
 	ldr	x6, [x20, #:lo12:.LANCHOR27]
@@ -16484,9 +17487,9 @@ flash_info_flush:
 	ldr	w1, [x6, 8]
 	bl	js_hash
 	str	w0, [x6, 12]
-.L2698:
-	add	x28, x21, :lo12:.LANCHOR195
-	ldrb	w4, [x21, #:lo12:.LANCHOR195]
+.L2791:
+	add	x28, x21, :lo12:.LANCHOR198
+	ldrb	w4, [x21, #:lo12:.LANCHOR198]
 	ldrh	w19, [x22]
 	mov	x0, x24
 	mov	w1, w4
@@ -16499,7 +17502,7 @@ flash_info_flush:
 	sub	w0, w0, #1
 	cmp	w1, w0
 	ldp	w3, w4, [x29, 104]
-	blt	.L2699
+	blt	.L2792
 	ldr	x6, [x20, #:lo12:.LANCHOR27]
 	ldrb	w7, [x28, 1]
 	strh	wzr, [x28, 2]
@@ -16507,32 +17510,32 @@ flash_info_flush:
 	ldrh	w1, [x6, 16]
 	add	w0, w0, 1
 	str	w0, [x6, 4]
-	ldrb	w0, [x21, #:lo12:.LANCHOR195]
+	ldrb	w0, [x21, #:lo12:.LANCHOR198]
 	add	w1, w1, 1
 	strb	w0, [x28, 1]
 	mov	x0, x6
-	strb	w7, [x21, #:lo12:.LANCHOR195]
+	strb	w7, [x21, #:lo12:.LANCHOR198]
 	strh	w1, [x0, 16]!
 	ldr	w1, [x6, 8]
 	bl	js_hash
 	ldrh	w19, [x22]
 	str	w0, [x6, 12]
 	mul	w19, w19, w7
-.L2708:
+.L2801:
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_erase_block
-	b	.L2700
-.L2703:
+	b	.L2793
+.L2796:
 	mov	w26, 1
-	b	.L2698
-.L2699:
+	b	.L2791
+.L2792:
 	madd	w19, w19, w4, w3
-	cbz	w1, .L2708
-.L2700:
+	cbz	w1, .L2801
+.L2793:
 	ldr	x2, [x20, #:lo12:.LANCHOR27]
 	mov	w1, w19
-	ldr	x3, [x23, #:lo12:.LANCHOR194]
+	ldr	x3, [x23, #:lo12:.LANCHOR197]
 	mov	w5, 1
 	mov	w4, 4
 	ldr	w0, [x2, 4]
@@ -16546,14 +17549,14 @@ flash_info_flush:
 	ldrh	w1, [x27, 2]
 	add	w1, w1, 1
 	strh	w1, [x27, 2]
-	bne	.L2701
+	bne	.L2794
 	mov	w1, w19
-	adrp	x0, .LC168
-	add	x0, x0, :lo12:.LC168
+	adrp	x0, .LC174
+	add	x0, x0, :lo12:.LC174
 	bl	printf
-	b	.L2698
-.L2701:
-	cbz	w26, .L2703
+	b	.L2791
+.L2794:
+	cbz	w26, .L2796
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -16578,46 +17581,46 @@ flash_info_blk_init:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	tbz	x0, 12, .L2710
+	tbz	x0, 12, .L2803
 	ldr	x4, [x20, #:lo12:.LANCHOR27]
-	adrp	x2, .LANCHOR196
-	adrp	x0, .LC169
+	adrp	x2, .LANCHOR199
+	adrp	x0, .LC175
 	mov	w3, 2048
-	add	x2, x2, :lo12:.LANCHOR196
+	add	x2, x2, :lo12:.LANCHOR199
 	mov	w1, 50
-	add	x0, x0, :lo12:.LC169
+	add	x0, x0, :lo12:.LC175
 	bl	printf
-.L2710:
-	adrp	x21, .LANCHOR194
+.L2803:
+	adrp	x21, .LANCHOR197
 	adrp	x24, .LANCHOR2
 	mov	w22, 21321
 	add	x26, x24, :lo12:.LANCHOR2
 	mov	x23, x21
 	mov	w19, 4
 	movk	w22, 0x5359, lsl 16
-.L2713:
+.L2806:
 	ldrh	w1, [x26]
 	mov	w4, 4
-	ldr	x3, [x21, #:lo12:.LANCHOR194]
+	ldr	x3, [x21, #:lo12:.LANCHOR197]
 	mov	w0, 0
 	ldr	x2, [x20, #:lo12:.LANCHOR27]
-	add	x27, x21, :lo12:.LANCHOR194
+	add	x27, x21, :lo12:.LANCHOR197
 	add	x25, x20, :lo12:.LANCHOR27
 	mul	w1, w1, w19
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L2711
+	beq	.L2804
 	ldr	x2, [x20, #:lo12:.LANCHOR27]
 	ldr	w0, [x2]
 	cmp	w0, w22
-	beq	.L2712
-.L2711:
+	beq	.L2805
+.L2804:
 	add	w19, w19, 1
 	cmp	w19, 16
-	bne	.L2713
-.L2738:
+	bne	.L2806
+.L2831:
 	mov	w0, -1
-.L2709:
+.L2802:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -16625,16 +17628,16 @@ flash_info_blk_init:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2721:
+.L2814:
 	ldr	x0, [x25]
 	ldr	w1, [x0]
 	cmp	w1, w22
-	bne	.L2722
+	bne	.L2815
 	ldr	w21, [x0, 4]
-.L2715:
-	add	x22, x19, :lo12:.LANCHOR195
+.L2808:
+	add	x22, x19, :lo12:.LANCHOR198
 	ldrh	w0, [x24, #:lo12:.LANCHOR2]
-	ldr	x3, [x23, #:lo12:.LANCHOR194]
+	ldr	x3, [x23, #:lo12:.LANCHOR197]
 	mov	w4, 4
 	ldr	x2, [x20, #:lo12:.LANCHOR27]
 	ldrb	w1, [x22, 1]
@@ -16642,31 +17645,31 @@ flash_info_blk_init:
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L2716
+	beq	.L2809
 	ldr	x0, [x20, #:lo12:.LANCHOR27]
 	mov	w1, 21321
 	movk	w1, 0x5359, lsl 16
 	ldr	w2, [x0]
 	cmp	w2, w1
-	bne	.L2716
+	bne	.L2809
 	ldr	w1, [x0, 4]
 	cmp	w21, w1
-	bcs	.L2716
+	bcs	.L2809
 	ldrb	w1, [x0, 37]
 	ldrb	w0, [x0, 36]
-	strb	w1, [x19, #:lo12:.LANCHOR195]
+	strb	w1, [x19, #:lo12:.LANCHOR198]
 	strb	w0, [x22, 1]
-.L2716:
-	ldrb	w1, [x19, #:lo12:.LANCHOR195]
-	add	x21, x19, :lo12:.LANCHOR195
-	ldr	x3, [x23, #:lo12:.LANCHOR194]
+.L2809:
+	ldrb	w1, [x19, #:lo12:.LANCHOR198]
+	add	x21, x19, :lo12:.LANCHOR198
+	ldr	x3, [x23, #:lo12:.LANCHOR197]
 	mov	w4, 4
 	ldr	x2, [x20, #:lo12:.LANCHOR27]
 	mov	w0, 0
 	bl	flash_get_last_written_page
 	and	w25, w0, 65535
 	add	w1, w25, 1
-	ldrb	w22, [x19, #:lo12:.LANCHOR195]
+	ldrb	w22, [x19, #:lo12:.LANCHOR198]
 	strh	w1, [x21, 2]
 	mov	w21, 0
 	ldrh	w1, [x24, #:lo12:.LANCHOR2]
@@ -16674,66 +17677,66 @@ flash_info_blk_init:
 	movk	w24, 0x5359, lsl 16
 	mul	w22, w22, w1
 	add	w22, w22, w0, sxth
-.L2717:
+.L2810:
 	sub	w0, w25, w21
 	sxth	w19, w0
-	tbz	w19, #31, .L2720
+	tbz	w19, #31, .L2813
 	cmn	w19, #1
-	bne	.L2719
+	bne	.L2812
 	ldr	x0, [x20, #:lo12:.LANCHOR27]
 	ldr	w1, [x0]
-	adrp	x0, .LC170
-	add	x0, x0, :lo12:.LC170
+	adrp	x0, .LC176
+	add	x0, x0, :lo12:.LC176
 	bl	printf
-	b	.L2738
-.L2720:
-	ldr	x3, [x23, #:lo12:.LANCHOR194]
+	b	.L2831
+.L2813:
+	ldr	x3, [x23, #:lo12:.LANCHOR197]
 	mov	w4, 4
 	ldr	x2, [x20, #:lo12:.LANCHOR27]
 	sub	w1, w22, w21
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L2718
+	beq	.L2811
 	ldr	x0, [x20, #:lo12:.LANCHOR27]
 	ldr	w0, [x0]
 	cmp	w0, w24
-	beq	.L2719
-.L2718:
+	beq	.L2812
+.L2811:
 	add	w21, w21, 1
-	b	.L2717
-.L2719:
+	b	.L2810
+.L2812:
 	cmp	w21, 1
-	bls	.L2723
+	bls	.L2816
 	bl	flash_info_flush
-.L2723:
+.L2816:
 	mov	w0, 0
-	b	.L2709
-.L2712:
-	adrp	x19, .LANCHOR195
-	add	x1, x19, :lo12:.LANCHOR195
+	b	.L2802
+.L2805:
+	adrp	x19, .LANCHOR198
+	add	x1, x19, :lo12:.LANCHOR198
 	ldrb	w3, [x2, 37]
 	mov	w4, 4
 	ldrb	w0, [x2, 36]
 	strb	w3, [x1, 1]
 	ldrh	w1, [x26]
 	ldr	x3, [x27]
-	strb	w0, [x19, #:lo12:.LANCHOR195]
+	strb	w0, [x19, #:lo12:.LANCHOR198]
 	mul	w1, w1, w0
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	bne	.L2721
-.L2722:
+	bne	.L2814
+.L2815:
 	mov	w21, 0
-	b	.L2715
+	b	.L2808
 	.size	flash_info_blk_init, .-flash_info_blk_init
 	.section	.text.nand_flash_init,"ax",@progbits
 	.align	2
 	.global	nand_flash_init
 	.type	nand_flash_init, %function
 nand_flash_init:
-	stp	x29, x30, [sp, -80]!
+	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x20, .LANCHOR14
@@ -16742,398 +17745,428 @@ nand_flash_init:
 	ldr	w0, [x20, #:lo12:.LANCHOR14]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	tbz	x0, 12, .L2740
-	adrp	x2, .LANCHOR197
-	adrp	x0, .LC90
-	add	x2, x2, :lo12:.LANCHOR197
-	mov	w1, 2491
-	add	x0, x0, :lo12:.LC90
-	bl	printf
-.L2740:
-	adrp	x0, .LANCHOR160
+	str	x27, [sp, 80]
+	tbz	x0, 12, .L2833
+	adrp	x2, .LANCHOR200
+	adrp	x0, .LC92
+	add	x2, x2, :lo12:.LANCHOR200
+	mov	w1, 2578
+	add	x0, x0, :lo12:.LC92
+	bl	printf
+.L2833:
+	adrp	x0, .LANCHOR163
 	adrp	x23, .LANCHOR16
-	adrp	x22, .LANCHOR42
-	add	x24, x22, :lo12:.LANCHOR42
-	str	wzr, [x0, #:lo12:.LANCHOR160]
+	adrp	x22, .LANCHOR44
+	add	x25, x22, :lo12:.LANCHOR44
+	str	wzr, [x0, #:lo12:.LANCHOR163]
 	mov	x0, x19
 	bl	nandc_init
-	adrp	x19, .LANCHOR31
-	add	x0, x19, :lo12:.LANCHOR31
-	mov	x25, x24
+	adrp	x19, .LANCHOR32
+	add	x0, x19, :lo12:.LANCHOR32
 	str	x0, [x23, #:lo12:.LANCHOR16]
 	adrp	x0, .LANCHOR18
+	adrp	x24, .LANCHOR31
+	mov	x26, x25
 	mov	w1, 1
 	mov	w21, 0
-	mov	w26, 44
 	strb	w1, [x0, #:lo12:.LANCHOR18]
+	mov	w27, 44
+	mov	w0, 3
 	mov	w2, 8
+	strb	w0, [x24, #:lo12:.LANCHOR31]
 	mov	w1, 0
 	adrp	x0, .LANCHOR30
 	add	x0, x0, :lo12:.LANCHOR30
 	bl	ftl_memset
 	mov	w2, 32
 	mov	w1, 0
-	adrp	x0, .LANCHOR141
-	add	x0, x0, :lo12:.LANCHOR141
+	adrp	x0, .LANCHOR143
+	add	x0, x0, :lo12:.LANCHOR143
 	bl	ftl_memset
-.L2746:
-	mov	x1, x24
+.L2839:
+	mov	x1, x25
 	mov	w0, w21
 	bl	flash_read_id
-	cbnz	w21, .L2741
-	ldrb	w0, [x25]
+	cbnz	w21, .L2834
+	ldrb	w0, [x26]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bls	.L2742
-.L2744:
+	bls	.L2835
+.L2837:
 	mov	w19, -2
-.L2739:
+.L2832:
 	mov	w0, w19
+	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
+	ldp	x29, x30, [sp], 96
 	ret
-.L2742:
-	ldrb	w0, [x25, 1]
+.L2835:
+	ldrb	w0, [x26, 1]
 	cmp	w0, 255
-	beq	.L2744
-.L2741:
-	ldrb	w0, [x24]
+	beq	.L2837
+.L2834:
+	ldrb	w0, [x25]
 	cmp	w0, 181
-	bne	.L2745
-	strb	w26, [x24]
-.L2745:
+	bne	.L2838
+	strb	w27, [x25]
+.L2838:
 	add	w21, w21, 1
-	add	x24, x24, 8
+	add	x25, x25, 8
 	and	w21, w21, 255
 	cmp	w21, 4
-	bne	.L2746
-	adrp	x0, .LANCHOR198
-	add	x8, x0, :lo12:.LANCHOR198
+	bne	.L2839
+	adrp	x0, .LANCHOR201
+	add	x8, x0, :lo12:.LANCHOR201
 	add	x8, x8, 1
 	mov	x7, x0
-	add	x12, x22, :lo12:.LANCHOR42
+	add	x12, x22, :lo12:.LANCHOR44
 	mov	x10, 0
-.L2749:
+.L2842:
 	ldrb	w2, [x8, -1]
 	mov	w11, w10
-	lsl	x24, x10, 5
+	lsl	x25, x10, 5
 	mov	x1, x12
 	mov	x0, x8
 	bl	flash_mem_cmp8
-	cbnz	w0, .L2747
-	add	x0, x7, :lo12:.LANCHOR198
+	cbnz	w0, .L2840
+	add	x0, x7, :lo12:.LANCHOR201
 	ubfiz	x11, x11, 5, 32
-	add	x24, x0, x24
+	add	x25, x0, x25
 	add	x0, x0, x11
-	adrp	x1, .LANCHOR199
-	add	x4, x1, :lo12:.LANCHOR199
+	adrp	x1, .LANCHOR202
+	add	x4, x1, :lo12:.LANCHOR202
 	ldrb	w3, [x0, 22]
 	mov	x0, 0
-.L2748:
+.L2841:
 	lsl	x5, x0, 5
 	mov	w2, w0
 	ldrb	w5, [x5, x4]
 	cmp	w5, w3
-	beq	.L2750
+	beq	.L2843
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L2748
+	bne	.L2841
 	mov	w2, w0
-.L2750:
+.L2843:
 	ubfiz	x0, x2, 5, 32
-	add	x1, x1, :lo12:.LANCHOR199
+	add	x1, x1, :lo12:.LANCHOR202
 	add	x1, x1, x0
 	mov	w2, 32
 	adrp	x0, .LANCHOR20
 	add	x0, x0, :lo12:.LANCHOR20
 	bl	ftl_memcpy
-	add	x21, x19, :lo12:.LANCHOR31
-	mov	x1, x24
-	adrp	x24, .LANCHOR28
+	add	x21, x19, :lo12:.LANCHOR32
+	mov	x1, x25
+	adrp	x25, .LANCHOR28
 	mov	w2, 32
 	mov	x0, x21
 	bl	ftl_memcpy
-	ldrb	w0, [x24, #:lo12:.LANCHOR28]
-	cmp	w0, 8
-	bhi	.L2751
-	ldrb	w1, [x21, 20]
-	cmp	w1, 60
-	bls	.L2752
-	mov	w1, 60
-	strb	w1, [x21, 20]
-.L2752:
+	ldrb	w0, [x25, #:lo12:.LANCHOR28]
 	cmp	w0, 8
-	bne	.L2751
-	ldrb	w0, [x22, #:lo12:.LANCHOR42]
-	mov	w1, 137
-	cmp	w0, 44
-	ccmp	w0, w1, 4, ne
-	bne	.L2751
-	add	x0, x19, :lo12:.LANCHOR31
-	ldrb	w1, [x0, 28]
-	cmp	w1, 3
-	bne	.L2751
-	strb	wzr, [x0, 28]
-.L2751:
+	bhi	.L2844
+	ldrb	w0, [x21, 20]
+	cmp	w0, 60
+	bls	.L2844
+	mov	w0, 60
+	strb	w0, [x21, 20]
+.L2844:
 	ldr	w0, [x20, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2753
-	adrp	x2, .LANCHOR197
-	adrp	x0, .LC90
-	add	x2, x2, :lo12:.LANCHOR197
-	mov	w1, 2516
-	add	x0, x0, :lo12:.LC90
+	tbz	x0, 12, .L2871
+	adrp	x2, .LANCHOR200
+	adrp	x0, .LC92
+	add	x2, x2, :lo12:.LANCHOR200
+	mov	w1, 2600
+	add	x0, x0, :lo12:.LC92
 	bl	printf
-.L2753:
+.L2871:
+	ldr	x0, [x23, #:lo12:.LANCHOR16]
+	ldrh	w0, [x0, 10]
+	cmp	w0, 2304
+	bne	.L2845
+	mov	w0, 2
+	strb	w0, [x24, #:lo12:.LANCHOR31]
+.L2845:
 	mov	w0, 16384
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR164
-	adrp	x22, .LANCHOR27
-	add	x21, x19, :lo12:.LANCHOR31
-	str	x0, [x1, #:lo12:.LANCHOR164]
+	adrp	x1, .LANCHOR167
+	adrp	x26, .LANCHOR27
+	add	x21, x19, :lo12:.LANCHOR32
+	adrp	x24, .LANCHOR45
+	str	x0, [x1, #:lo12:.LANCHOR167]
 	mov	w0, 16384
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR156
-	str	x0, [x1, #:lo12:.LANCHOR156]
+	adrp	x1, .LANCHOR159
+	str	x0, [x1, #:lo12:.LANCHOR159]
 	mov	w0, 2048
 	bl	ftl_malloc
-	str	x0, [x22, #:lo12:.LANCHOR27]
+	str	x0, [x26, #:lo12:.LANCHOR27]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR163
-	str	x0, [x1, #:lo12:.LANCHOR163]
+	adrp	x1, .LANCHOR166
+	str	x0, [x1, #:lo12:.LANCHOR166]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR158
-	str	x0, [x1, #:lo12:.LANCHOR158]
+	adrp	x1, .LANCHOR161
+	str	x0, [x1, #:lo12:.LANCHOR161]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR194
-	str	x0, [x1, #:lo12:.LANCHOR194]
-	adrp	x0, .LANCHOR200
-	strb	wzr, [x0, #:lo12:.LANCHOR200]
+	adrp	x1, .LANCHOR197
+	str	x0, [x1, #:lo12:.LANCHOR197]
+	adrp	x0, .LANCHOR203
+	strb	wzr, [x0, #:lo12:.LANCHOR203]
 	bl	flash_die_info_init
 	ldrb	w0, [x21, 18]
 	bl	flash_lsb_page_tbl_build
 	ldrb	w0, [x21, 20]
-	adrp	x21, .LANCHOR162
+	adrp	x21, .LANCHOR165
 	bl	nandc_bch_sel
-	str	xzr, [x21, #:lo12:.LANCHOR162]
-	ldr	x1, [x23, #:lo12:.LANCHOR16]
-	adrp	x23, .LANCHOR43
-	ldrh	w0, [x1, 16]
-	ldrb	w1, [x1, 28]
-	ubfx	x2, x0, 8, 3
-	strb	w2, [x23, #:lo12:.LANCHOR43]
-	adrp	x2, .LANCHOR168
+	str	xzr, [x21, #:lo12:.LANCHOR165]
+	ldr	x2, [x23, #:lo12:.LANCHOR16]
+	ldrh	w0, [x2, 16]
+	ubfx	x1, x0, 8, 3
+	strb	w1, [x24, #:lo12:.LANCHOR45]
+	adrp	x1, .LANCHOR171
 	ubfx	x3, x0, 3, 1
-	strb	w3, [x2, #:lo12:.LANCHOR168]
-	adrp	x2, .LANCHOR39
+	strb	w3, [x1, #:lo12:.LANCHOR171]
+	adrp	x1, .LANCHOR41
 	ubfx	x3, x0, 4, 1
-	strb	w3, [x2, #:lo12:.LANCHOR39]
-	adrp	x2, .LANCHOR75
+	strb	w3, [x1, #:lo12:.LANCHOR41]
+	adrp	x1, .LANCHOR77
 	ubfx	x3, x0, 12, 1
-	strb	w3, [x2, #:lo12:.LANCHOR75]
-	adrp	x2, .LANCHOR72
+	strb	w3, [x1, #:lo12:.LANCHOR77]
+	adrp	x1, .LANCHOR74
 	ubfx	x3, x0, 13, 1
-	strb	w3, [x2, #:lo12:.LANCHOR72]
-	adrp	x2, .LANCHOR1
+	strb	w3, [x1, #:lo12:.LANCHOR74]
+	adrp	x1, .LANCHOR35
+	ubfx	x3, x0, 11, 1
+	strb	w3, [x1, #:lo12:.LANCHOR35]
+	adrp	x3, .LANCHOR204
+	ldrb	w1, [x2, 31]
+	ldrb	w2, [x2, 28]
+	ubfx	x4, x1, 1, 1
+	strb	w4, [x3, #:lo12:.LANCHOR204]
+	adrp	x3, .LANCHOR205
+	ubfx	x1, x1, 2, 1
+	strb	w1, [x3, #:lo12:.LANCHOR205]
+	adrp	x1, .LANCHOR1
 	ubfx	x3, x0, 14, 1
 	lsr	w0, w0, 15
-	strb	w3, [x2, #:lo12:.LANCHOR1]
-	adrp	x2, .LANCHOR73
-	strb	w0, [x2, #:lo12:.LANCHOR73]
+	strb	w3, [x1, #:lo12:.LANCHOR1]
+	adrp	x1, .LANCHOR75
+	strb	w0, [x1, #:lo12:.LANCHOR75]
 	adrp	x0, .LANCHOR0
-	mov	w2, 60
-	strb	w1, [x0, #:lo12:.LANCHOR0]
+	mov	w1, 60
+	strb	w2, [x0, #:lo12:.LANCHOR0]
 	adrp	x0, .LANCHOR17
-	strb	w2, [x0, #:lo12:.LANCHOR17]
-	ldrb	w2, [x24, #:lo12:.LANCHOR28]
-	cmp	w2, 9
-	bne	.L2754
-	mov	w2, 70
-	strb	w2, [x0, #:lo12:.LANCHOR17]
-.L2754:
-	adrp	x0, .LANCHOR19
-	strb	w1, [x0, #:lo12:.LANCHOR19]
-	add	x1, x19, :lo12:.LANCHOR31
-	ldrb	w1, [x1, 7]
+	strb	w1, [x0, #:lo12:.LANCHOR17]
+	ldrb	w1, [x25, #:lo12:.LANCHOR28]
 	cmp	w1, 9
-	bne	.L2755
+	bne	.L2846
+	mov	w3, 70
+	strb	w3, [x0, #:lo12:.LANCHOR17]
+.L2846:
+	adrp	x0, .LANCHOR19
+	strb	w2, [x0, #:lo12:.LANCHOR19]
+	add	x2, x19, :lo12:.LANCHOR32
+	ldrb	w2, [x2, 7]
+	cmp	w2, 9
+	bne	.L2847
 	strb	wzr, [x0, #:lo12:.LANCHOR19]
-.L2755:
-	add	x19, x19, :lo12:.LANCHOR31
+.L2847:
+	add	x2, x19, :lo12:.LANCHOR32
+	ldrb	w2, [x2, 31]
+	tbz	x2, 0, .L2848
+	mov	w2, 3
+	strb	w2, [x0, #:lo12:.LANCHOR19]
+.L2848:
+	cmp	w1, 8
+	bne	.L2849
+	ldrb	w1, [x22, #:lo12:.LANCHOR44]
+	mov	w2, 137
+	cmp	w1, 44
+	ccmp	w1, w2, 4, ne
+	bne	.L2849
+	add	x1, x19, :lo12:.LANCHOR32
+	ldrb	w1, [x1, 28]
+	cmp	w1, 3
+	bne	.L2849
+	strb	wzr, [x0, #:lo12:.LANCHOR19]
+.L2849:
+	add	x19, x19, :lo12:.LANCHOR32
 	adrp	x25, .LANCHOR24
 	ldrh	w1, [x19, 16]
 	ldrb	w0, [x19, 19]
 	strb	w0, [x25, #:lo12:.LANCHOR24]
-	tbz	x1, 6, .L2757
+	tbz	x1, 6, .L2851
 	sub	w1, w0, #17
 	and	w1, w1, 255
 	cmp	w1, 2
 	ccmp	w0, 21, 4, hi
-	bne	.L2758
+	bne	.L2852
 	adrp	x1, micron_read_retrial
 	add	x1, x1, :lo12:micron_read_retrial
-	str	x1, [x21, #:lo12:.LANCHOR162]
+	str	x1, [x21, #:lo12:.LANCHOR165]
 	cmp	w0, 21
-	adrp	x0, .LANCHOR159
-	beq	.L2759
+	adrp	x0, .LANCHOR162
+	beq	.L2853
 	mov	w1, 15
-.L2806:
-	strb	w1, [x0, #:lo12:.LANCHOR159]
-	b	.L2757
-.L2747:
+.L2901:
+	strb	w1, [x0, #:lo12:.LANCHOR162]
+	b	.L2851
+.L2840:
 	add	x10, x10, 1
 	add	x8, x8, 32
-	cmp	x10, 39
-	bne	.L2749
-	b	.L2744
-.L2759:
+	cmp	x10, 44
+	bne	.L2842
+	b	.L2837
+.L2853:
 	mov	w1, 4
-	b	.L2806
-.L2758:
+	b	.L2901
+.L2852:
 	sub	w1, w0, #65
 	cmp	w0, 33
 	and	w1, w1, 255
 	ccmp	w1, 1, 0, ne
-	bhi	.L2761
+	bhi	.L2855
 	adrp	x0, toshiba_read_retrial
 	add	x0, x0, :lo12:toshiba_read_retrial
-	str	x0, [x21, #:lo12:.LANCHOR162]
+	str	x0, [x21, #:lo12:.LANCHOR165]
 	adrp	x0, .LANCHOR26
 	mov	w1, 4
 	strb	w1, [x0, #:lo12:.LANCHOR26]
-.L2808:
+.L2903:
 	mov	w1, 7
-	adrp	x0, .LANCHOR159
-	b	.L2806
-.L2761:
+	adrp	x0, .LANCHOR162
+	b	.L2901
+.L2855:
 	sub	w2, w0, #34
 	sub	w1, w0, #67
 	and	w2, w2, 255
 	and	w1, w1, 255
 	cmp	w2, 1
 	ccmp	w1, 1, 0, hi
-	bhi	.L2762
+	bhi	.L2856
 	adrp	x2, toshiba_read_retrial
 	add	x2, x2, :lo12:toshiba_read_retrial
-	str	x2, [x21, #:lo12:.LANCHOR162]
+	str	x2, [x21, #:lo12:.LANCHOR165]
 	cmp	w0, 35
 	mov	w2, 68
 	ccmp	w0, w2, 4, ne
-	adrp	x0, .LANCHOR159
-	beq	.L2763
+	adrp	x0, .LANCHOR162
+	beq	.L2857
 	mov	w2, 7
-.L2805:
-	strb	w2, [x0, #:lo12:.LANCHOR159]
+.L2900:
+	strb	w2, [x0, #:lo12:.LANCHOR162]
 	cmp	w1, 1
 	adrp	x0, .LANCHOR26
-	bhi	.L2765
+	bhi	.L2859
 	mov	w1, 4
-.L2807:
+.L2902:
 	strb	w1, [x0, #:lo12:.LANCHOR26]
-.L2757:
+.L2851:
 	ldr	w0, [x20, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2766
-	adrp	x2, .LANCHOR197
-	adrp	x0, .LC90
-	add	x2, x2, :lo12:.LANCHOR197
-	mov	w1, 2574
-	add	x0, x0, :lo12:.LC90
+	tbz	x0, 12, .L2860
+	adrp	x2, .LANCHOR200
+	adrp	x0, .LC92
+	add	x2, x2, :lo12:.LANCHOR200
+	mov	w1, 2671
+	add	x0, x0, :lo12:.LC92
 	bl	printf
-.L2766:
-	adrp	x24, .LANCHOR21
-	ldrb	w0, [x23, #:lo12:.LANCHOR43]
-	strb	wzr, [x24, #:lo12:.LANCHOR21]
-	tbz	x0, 0, .L2767
+.L2860:
+	adrp	x22, .LANCHOR21
+	ldrb	w0, [x24, #:lo12:.LANCHOR45]
+	strb	wzr, [x22, #:lo12:.LANCHOR21]
+	tbz	x0, 0, .L2861
 	mov	w0, 4
 	bl	nandc_set_if_mode
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
-.L2809:
+.L2904:
 	bl	nandc_set_if_mode
 	bl	flash_info_blk_init
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L2769
+	bne	.L2863
 	ldr	w0, [x20, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2770
-	adrp	x2, .LANCHOR197
-	adrp	x0, .LC90
-	add	x2, x2, :lo12:.LANCHOR197
-	mov	w1, 2606
-	add	x0, x0, :lo12:.LC90
+	tbz	x0, 12, .L2864
+	adrp	x2, .LANCHOR200
+	adrp	x0, .LC92
+	add	x2, x2, :lo12:.LANCHOR200
+	mov	w1, 2688
+	add	x0, x0, :lo12:.LC92
 	bl	printf
-.L2770:
-	ldr	x0, [x22, #:lo12:.LANCHOR27]
+.L2864:
+	ldr	x0, [x26, #:lo12:.LANCHOR27]
 	mov	w1, 17
 	strb	w1, [x0, 32]
+	adrp	x0, .LANCHOR33
+	strb	wzr, [x0, #:lo12:.LANCHOR33]
 	mov	w0, 0
 	bl	zftl_flash_exit_slc_mode
-	b	.L2739
-.L2763:
+	b	.L2832
+.L2857:
 	mov	w2, 17
-	b	.L2805
-.L2765:
+	b	.L2900
+.L2859:
 	mov	w1, 5
-	b	.L2807
-.L2762:
+	b	.L2902
+.L2856:
 	sub	w0, w0, #36
 	and	w0, w0, 255
 	cmp	w0, 1
-	bhi	.L2757
+	bhi	.L2851
 	adrp	x0, toshiba_3d_read_retrial
 	add	x0, x0, :lo12:toshiba_3d_read_retrial
-	str	x0, [x21, #:lo12:.LANCHOR162]
-	b	.L2808
-.L2767:
+	str	x0, [x21, #:lo12:.LANCHOR165]
+	b	.L2903
+.L2861:
 	mov	w0, 4
-	b	.L2809
-.L2769:
+	b	.L2904
+.L2863:
 	ldrb	w0, [x25, #:lo12:.LANCHOR24]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 7
-	bhi	.L2771
+	bhi	.L2865
 	adrp	x0, hynix_read_retrial
 	add	x0, x0, :lo12:hynix_read_retrial
-	str	x0, [x21, #:lo12:.LANCHOR162]
-.L2771:
-	ldrb	w0, [x23, #:lo12:.LANCHOR43]
-	tbz	x0, 2, .L2773
-	ldr	x0, [x22, #:lo12:.LANCHOR27]
+	str	x0, [x21, #:lo12:.LANCHOR165]
+.L2865:
+	ldrb	w0, [x24, #:lo12:.LANCHOR45]
+	tbz	x0, 2, .L2867
+	ldr	x0, [x26, #:lo12:.LANCHOR27]
 	ldrb	w0, [x0, 19]
-	cbz	w0, .L2773
-	adrp	x0, .LANCHOR195
-	ldrb	w1, [x0, #:lo12:.LANCHOR195]
+	cbz	w0, .L2867
+	adrp	x0, .LANCHOR198
+	ldrb	w1, [x0, #:lo12:.LANCHOR198]
 	adrp	x0, .LANCHOR2
 	ldrh	w0, [x0, #:lo12:.LANCHOR2]
 	mul	w1, w1, w0
 	mov	w0, 0
 	bl	flash_ddr_para_scan
-	ldrb	w0, [x24, #:lo12:.LANCHOR21]
-	cbnz	w0, .L2773
-	ldr	x0, [x22, #:lo12:.LANCHOR27]
+	ldrb	w0, [x22, #:lo12:.LANCHOR21]
+	cbnz	w0, .L2867
+	ldr	x0, [x26, #:lo12:.LANCHOR27]
 	strb	wzr, [x0, 19]
 	bl	flash_info_flush
-.L2773:
+.L2867:
 	ldr	w0, [x20, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2775
-	adrp	x2, .LANCHOR197
-	adrp	x0, .LC90
-	add	x2, x2, :lo12:.LANCHOR197
-	mov	w1, 2672
-	add	x0, x0, :lo12:.LC90
-	bl	printf
-.L2775:
+	tbz	x0, 12, .L2869
+	adrp	x2, .LANCHOR200
+	adrp	x0, .LC92
+	add	x2, x2, :lo12:.LANCHOR200
+	mov	w1, 2740
+	add	x0, x0, :lo12:.LC92
+	bl	printf
+.L2869:
 	bl	nand_flash_print_info
 	mov	w19, 0
-	b	.L2739
+	b	.L2832
 	.size	nand_flash_init, .-nand_flash_init
 	.section	.text.ftl_sysblk_dump,"ax",@progbits
 	.align	2
@@ -17150,37 +18183,37 @@ ftl_sysblk_dump:
 	stp	x25, x26, [sp, 112]
 	mov	w0, 1
 	stp	x27, x28, [sp, 128]
-	adrp	x25, .LANCHOR85
+	adrp	x25, .LANCHOR87
 	stp	x21, x22, [sp, 80]
 	bl	buf_alloc
 	ldr	x28, [x0, 8]
-	adrp	x26, .LANCHOR103
-	adrp	x27, .LANCHOR123
+	adrp	x26, .LANCHOR105
+	adrp	x27, .LANCHOR125
 	mov	x24, x0
-	add	x25, x25, :lo12:.LANCHOR85
-	add	x26, x26, :lo12:.LANCHOR103
-	add	x27, x27, :lo12:.LANCHOR123
+	add	x25, x25, :lo12:.LANCHOR87
+	add	x26, x26, :lo12:.LANCHOR105
+	add	x27, x27, :lo12:.LANCHOR125
 	mov	w19, 0
-.L2811:
+.L2906:
 	ldrh	w0, [x25]
 	cmp	w0, w19
-	bhi	.L2813
+	bhi	.L2908
 	add	x1, x28, 704
 	mov	w3, 32
 	mov	w2, 4
-	adrp	x0, .LC171
-	add	x0, x0, :lo12:.LC171
+	adrp	x0, .LC177
+	add	x0, x0, :lo12:.LC177
 	bl	rknand_print_hex
 	mov	x0, x24
-	bl	buf_free
-	cbz	w20, .L2814
-	adrp	x1, .LANCHOR201
+	bl	zbuf_free
+	cbz	w20, .L2909
+	adrp	x1, .LANCHOR206
 	adrp	x0, .LC0
-	mov	w2, 1351
-	add	x1, x1, :lo12:.LANCHOR201
+	mov	w2, 1422
+	add	x1, x1, :lo12:.LANCHOR206
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2814:
+.L2909:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
@@ -17190,7 +18223,7 @@ ftl_sysblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 144
 	ret
-.L2813:
+.L2908:
 	ldrh	w21, [x26]
 	ldrb	w3, [x27]
 	ldr	x1, [x24, 8]
@@ -17219,13 +18252,13 @@ ftl_sysblk_dump:
 	mov	w1, w23
 	ldp	w5, w6, [x0]
 	ldr	w7, [x0, 8]
-	adrp	x0, .LC162
-	add	x0, x0, :lo12:.LC162
+	adrp	x0, .LC163
+	add	x0, x0, :lo12:.LC163
 	bl	printf
 	cmp	w22, 512
 	ccmn	w22, #1, 4, ne
 	csinc	w20, w20, wzr, ne
-	b	.L2811
+	b	.L2906
 	.size	ftl_sysblk_dump, .-ftl_sysblk_dump
 	.section	.text.dump_ftl_info,"ax",@progbits
 	.align	2
@@ -17233,35 +18266,35 @@ ftl_sysblk_dump:
 	.type	dump_ftl_info, %function
 dump_ftl_info:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LANCHOR52
+	adrp	x0, .LANCHOR54
 	add	x29, sp, 0
-	ldrb	w1, [x0, #:lo12:.LANCHOR52]
-	adrp	x0, .LC172
+	ldrb	w1, [x0, #:lo12:.LANCHOR54]
+	adrp	x0, .LC178
 	stp	x19, x20, [sp, 16]
-	add	x0, x0, :lo12:.LC172
+	add	x0, x0, :lo12:.LC178
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR102
+	adrp	x22, .LANCHOR104
 	adrp	x19, .LANCHOR10
-	adrp	x20, .LANCHOR85
+	adrp	x20, .LANCHOR87
 	bl	printf
 	adrp	x21, .LANCHOR6
-	adrp	x0, .LANCHOR179
-	add	x1, x0, :lo12:.LANCHOR179
+	adrp	x0, .LANCHOR182
+	add	x1, x0, :lo12:.LANCHOR182
 	ldrh	w3, [x1, 2]
 	ldrb	w2, [x1, 1]
-	ldrb	w1, [x0, #:lo12:.LANCHOR179]
-	adrp	x0, .LC173
-	add	x0, x0, :lo12:.LC173
+	ldrb	w1, [x0, #:lo12:.LANCHOR182]
+	adrp	x0, .LC179
+	add	x0, x0, :lo12:.LC179
 	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR102]
+	ldr	x0, [x22, #:lo12:.LANCHOR104]
 	ldrh	w2, [x0, 140]
 	ldrh	w1, [x0, 130]
-	adrp	x0, .LC174
-	add	x0, x0, :lo12:.LC174
+	adrp	x0, .LC180
+	add	x0, x0, :lo12:.LC180
 	bl	printf
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
-	adrp	x0, .LC175
-	add	x0, x0, :lo12:.LC175
+	adrp	x0, .LC181
+	add	x0, x0, :lo12:.LC181
 	ldrh	w5, [x1, 26]
 	ldrh	w4, [x1, 22]
 	ldrb	w3, [x1, 21]
@@ -17269,8 +18302,8 @@ dump_ftl_info:
 	ldrh	w1, [x1, 16]
 	bl	printf
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
-	adrp	x0, .LC176
-	add	x0, x0, :lo12:.LC176
+	adrp	x0, .LC182
+	add	x0, x0, :lo12:.LC182
 	ldrh	w5, [x1, 58]
 	ldrh	w4, [x1, 54]
 	ldrb	w3, [x1, 53]
@@ -17278,36 +18311,36 @@ dump_ftl_info:
 	ldrh	w1, [x1, 48]
 	bl	printf
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
-	adrp	x19, .LANCHOR78
-	adrp	x0, .LC177
-	add	x0, x0, :lo12:.LC177
+	adrp	x19, .LANCHOR80
+	adrp	x0, .LC183
+	add	x0, x0, :lo12:.LC183
 	ldrh	w5, [x1, 90]
 	ldrh	w4, [x1, 86]
 	ldrb	w3, [x1, 85]
 	ldrh	w2, [x1, 82]
 	ldrh	w1, [x1, 80]
 	bl	printf
-	ldrb	w0, [x19, #:lo12:.LANCHOR78]
+	ldrb	w0, [x19, #:lo12:.LANCHOR80]
 	mov	w2, 4
-	ldrh	w3, [x20, #:lo12:.LANCHOR85]
+	ldrh	w3, [x20, #:lo12:.LANCHOR87]
 	mul	w3, w3, w0
-	adrp	x0, .LANCHOR109
-	ldr	x1, [x0, #:lo12:.LANCHOR109]
-	adrp	x0, .LC178
+	adrp	x0, .LANCHOR111
+	ldr	x1, [x0, #:lo12:.LANCHOR111]
+	adrp	x0, .LC184
 	lsl	w3, w3, 1
-	add	x0, x0, :lo12:.LC178
+	add	x0, x0, :lo12:.LC184
 	bl	rknand_print_hex
 	adrp	x0, .LANCHOR9
 	ldrh	w3, [x21, #:lo12:.LANCHOR6]
 	mov	w2, 2
 	ldr	x1, [x0, #:lo12:.LANCHOR9]
-	adrp	x0, .LC179
-	add	x0, x0, :lo12:.LC179
+	adrp	x0, .LC185
+	add	x0, x0, :lo12:.LC185
 	bl	rknand_print_hex
-	ldr	x1, [x22, #:lo12:.LANCHOR102]
+	ldr	x1, [x22, #:lo12:.LANCHOR104]
 	mov	w2, 4
-	adrp	x0, .LC171
-	add	x0, x0, :lo12:.LC171
+	adrp	x0, .LC177
+	add	x0, x0, :lo12:.LC177
 	add	x1, x1, 704
 	ldrh	w3, [x1, -6]
 	bl	rknand_print_hex
@@ -17315,28 +18348,28 @@ dump_ftl_info:
 	ldrh	w3, [x21, #:lo12:.LANCHOR6]
 	mov	w2, 4
 	ldr	x1, [x0, #:lo12:.LANCHOR7]
-	adrp	x0, .LC180
-	add	x0, x0, :lo12:.LC180
+	adrp	x0, .LC186
+	add	x0, x0, :lo12:.LC186
 	bl	rknand_print_hex
 	mov	w3, 256
 	mov	w2, 2
-	adrp	x1, .LANCHOR108
-	adrp	x0, .LC181
-	add	x1, x1, :lo12:.LANCHOR108
-	add	x0, x0, :lo12:.LC181
+	adrp	x1, .LANCHOR110
+	adrp	x0, .LC187
+	add	x1, x1, :lo12:.LANCHOR110
+	add	x0, x0, :lo12:.LC187
 	bl	rknand_print_hex
-	ldrb	w0, [x19, #:lo12:.LANCHOR78]
+	ldrb	w0, [x19, #:lo12:.LANCHOR80]
 	mov	w2, 2
-	ldrh	w3, [x20, #:lo12:.LANCHOR85]
+	ldrh	w3, [x20, #:lo12:.LANCHOR87]
 	ldp	x21, x22, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	mul	w3, w3, w0
-	adrp	x0, .LANCHOR110
+	adrp	x0, .LANCHOR112
 	ldp	x29, x30, [sp], 48
 	lsl	w3, w3, 1
-	ldr	x1, [x0, #:lo12:.LANCHOR110]
-	adrp	x0, .LC182
-	add	x0, x0, :lo12:.LC182
+	ldr	x1, [x0, #:lo12:.LANCHOR112]
+	adrp	x0, .LC188
+	add	x0, x0, :lo12:.LC188
 	b	rknand_print_hex
 	.size	dump_ftl_info, .-dump_ftl_info
 	.section	.text.pm_ppa_update_check,"ax",@progbits
@@ -17344,17 +18377,20 @@ dump_ftl_info:
 	.global	pm_ppa_update_check
 	.type	pm_ppa_update_check, %function
 pm_ppa_update_check:
-	adrp	x3, .LANCHOR66
-	mov	w4, 21
-	ldrh	w3, [x3, #:lo12:.LANCHOR66]
+	adrp	x4, .LANCHOR31
+	adrp	x3, .LANCHOR68
+	mov	w5, 24
+	ldrb	w4, [x4, #:lo12:.LANCHOR31]
+	ldrh	w3, [x3, #:lo12:.LANCHOR68]
+	sub	w4, w5, w4
 	sub	w5, w4, w3
 	mov	w4, 1
 	lsr	w3, w2, w3
 	lsl	w4, w4, w5
 	sub	w4, w4, #1
 	and	w4, w4, w3
-	adrp	x3, .LANCHOR67
-	ldrb	w3, [x3, #:lo12:.LANCHOR67]
+	adrp	x3, .LANCHOR69
+	ldrb	w3, [x3, #:lo12:.LANCHOR69]
 	udiv	w4, w4, w3
 	adrp	x3, .LANCHOR7
 	ldr	x3, [x3, #:lo12:.LANCHOR7]
@@ -17363,20 +18399,20 @@ pm_ppa_update_check:
 	ubfx	x3, x3, 5, 3
 	cmp	w3, 1
 	ccmp	w3, 7, 4, ne
-	bne	.L2825
-	stp	x29, x30, [sp, -16]!
+	bne	.L2920
 	mov	w3, w2
 	mov	w2, w1
 	mov	x1, x0
+	stp	x29, x30, [sp, -16]!
+	adrp	x0, .LC189
+	add	x0, x0, :lo12:.LC189
 	add	x29, sp, 0
-	adrp	x0, .LC183
-	add	x0, x0, :lo12:.LC183
 	bl	printf
 	bl	dump_ftl_info
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
-.L2825:
+.L2920:
 	mov	w0, 0
 	ret
 	.size	pm_ppa_update_check, .-pm_ppa_update_check
@@ -17384,232 +18420,279 @@ pm_ppa_update_check:
 	.align	2
 	.type	load_l2p_region, %function
 load_l2p_region:
-	stp	x29, x30, [sp, -64]!
+	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	and	w20, w1, 65535
-	stp	x21, x22, [sp, 32]
 	and	w19, w0, 65535
+	stp	x21, x22, [sp, 32]
+	and	x21, x1, 65535
 	stp	x23, x24, [sp, 48]
-	cmp	w20, 31
-	bls	.L2831
-	adrp	x1, .LANCHOR202
+	cmp	w21, 31
+	stp	x25, x26, [sp, 64]
+	bls	.L2926
+	adrp	x1, .LANCHOR207
 	adrp	x0, .LC0
-	mov	w2, 31
-	add	x1, x1, :lo12:.LANCHOR202
+	mov	w2, 32
+	add	x1, x1, :lo12:.LANCHOR207
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2831:
-	adrp	x22, .LANCHOR102
-	ldr	x0, [x22, #:lo12:.LANCHOR102]
+.L2926:
+	adrp	x20, .LANCHOR104
+	mov	x25, x20
+	ldr	x0, [x20, #:lo12:.LANCHOR104]
 	ldrh	w2, [x0, 698]
 	cmp	w2, w19
-	bcs	.L2832
+	bcs	.L2927
 	mov	w1, w19
-	adrp	x0, .LC184
-	add	x0, x0, :lo12:.LC184
+	adrp	x0, .LC190
+	add	x0, x0, :lo12:.LC190
 	bl	printf
-	adrp	x0, .LANCHOR203
+	adrp	x0, .LANCHOR208
 	mov	w1, 255
-	ldrh	w2, [x0, #:lo12:.LANCHOR203]
+	ldrh	w2, [x0, #:lo12:.LANCHOR208]
 	mov	x0, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	ldr	x0, [x22, #:lo12:.LANCHOR102]
+	ldr	x0, [x20, #:lo12:.LANCHOR104]
 	ldrh	w0, [x0, 698]
 	cmp	w0, w19
-	bcs	.L2834
-	mov	w2, 35
-.L2839:
-	adrp	x1, .LANCHOR202
+	bcc	.L2928
+.L2938:
+	mov	w0, 0
+.L2925:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L2928:
+	mov	w2, 36
+.L2939:
+	adrp	x1, .LANCHOR207
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR202
+	add	x1, x1, :lo12:.LANCHOR207
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L2834
-.L2832:
+	b	.L2938
+.L2927:
 	add	x0, x0, x19, sxtw 2
-	sbfiz	x20, x20, 4, 32
-	ldr	w21, [x0, 704]
-	adrp	x0, .LANCHOR132
-	add	x0, x0, :lo12:.LANCHOR132
-	add	x23, x0, x20
-	strh	w19, [x0, x20]
-	strh	wzr, [x23, 2]
-	cbnz	w21, .L2835
-	mov	w2, 0
+	adrp	x22, .LANCHOR134
+	add	x1, x22, :lo12:.LANCHOR134
+	ldr	w23, [x0, 704]
+	lsl	x0, x21, 4
+	add	x26, x1, x0
+	strh	w19, [x1, x0]
+	strh	wzr, [x26, 2]
+	cbnz	w23, .L2930
 	mov	w1, w19
-	adrp	x0, .LC185
-	add	x0, x0, :lo12:.LC185
+	mov	w2, 0
+	adrp	x0, .LC191
+	add	x0, x0, :lo12:.LC191
 	bl	printf
-	adrp	x0, .LANCHOR203
+	adrp	x0, .LANCHOR208
 	mov	w1, 255
-	ldrh	w2, [x0, #:lo12:.LANCHOR203]
-	ldr	x0, [x23, 8]
+	ldrh	w2, [x0, #:lo12:.LANCHOR208]
+	ldr	x0, [x26, 8]
 	bl	ftl_memset
-.L2834:
-	mov	w0, 0
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 64
-	ret
-.L2835:
+	b	.L2938
+.L2930:
 	adrp	x20, .LANCHOR191
-	adrp	x24, .LANCHOR123
-	ldr	x1, [x23, 8]
-	mov	w0, w21
+	adrp	x24, .LANCHOR125
+	ldr	x1, [x26, 8]
+	mov	w0, w23
 	ldr	x2, [x20, #:lo12:.LANCHOR191]
-	ldrb	w3, [x24, #:lo12:.LANCHOR123]
+	ldrb	w3, [x24, #:lo12:.LANCHOR125]
 	bl	ftl_read_ppa_page
 	ldr	x1, [x20, #:lo12:.LANCHOR191]
 	ldr	w2, [x1]
 	cmp	w2, w19
-	beq	.L2836
-	mov	w4, w21
+	bne	.L2931
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	beq	.L2931
+.L2934:
+	ldr	x0, [x20, #:lo12:.LANCHOR191]
+	ldr	w0, [x0]
+	cmp	w19, w0
+	beq	.L2938
+	mov	w2, 63
+	b	.L2939
+.L2931:
+	mov	w4, w23
 	mov	w3, w0
 	mov	w1, w19
-	adrp	x0, .LC186
-	add	x0, x0, :lo12:.LC186
+	adrp	x0, .LC192
+	add	x0, x0, :lo12:.LC192
 	bl	printf
-	ldr	x1, [x22, #:lo12:.LANCHOR102]
+	ldr	x1, [x25, #:lo12:.LANCHOR104]
+	add	x22, x22, :lo12:.LANCHOR134
+	add	x21, x22, x21, lsl 4
 	mov	w2, 4
-	adrp	x0, .LC187
-	add	x0, x0, :lo12:.LC187
 	add	x1, x1, 704
+	adrp	x0, .LC193
+	add	x0, x0, :lo12:.LC193
 	ldrh	w3, [x1, -6]
 	bl	rknand_print_hex
-	ldr	x1, [x23, 8]
+	ldr	x1, [x21, 8]
 	mov	w2, 4
-	ldrb	w3, [x24, #:lo12:.LANCHOR123]
-	adrp	x0, .LC188
-	add	x0, x0, :lo12:.LC188
+	ldrb	w3, [x24, #:lo12:.LANCHOR125]
+	adrp	x0, .LC194
+	add	x0, x0, :lo12:.LC194
 	lsl	w3, w3, 7
 	bl	rknand_print_hex
 	ldr	x1, [x20, #:lo12:.LANCHOR191]
-	adrp	x0, .LC189
 	mov	w3, 16
 	mov	w2, 4
-	add	x0, x0, :lo12:.LC189
+	adrp	x0, .LC195
+	add	x0, x0, :lo12:.LC195
 	bl	rknand_print_hex
-.L2836:
-	ldr	x0, [x20, #:lo12:.LANCHOR191]
-	ldr	w0, [x0]
-	cmp	w19, w0
-	beq	.L2834
-	mov	w2, 59
-	b	.L2839
+	ldr	x1, [x21, 8]
+	mov	w0, w23
+	ldrb	w3, [x24, #:lo12:.LANCHOR125]
+	ldr	x2, [x20, #:lo12:.LANCHOR191]
+	bl	ftl_read_ppa_page
+	ldr	x1, [x20, #:lo12:.LANCHOR191]
+	ldr	w1, [x1]
+	cmp	w19, w1
+	bne	.L2936
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	bne	.L2934
+.L2936:
+	mov	w0, -1
+	b	.L2925
 	.size	load_l2p_region, .-load_l2p_region
 	.section	.text.pm_gc,"ax",@progbits
 	.align	2
 	.global	pm_gc
 	.type	pm_gc, %function
 pm_gc:
-	stp	x29, x30, [sp, -80]!
+	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR102
-	adrp	x19, .LANCHOR146
+	adrp	x19, .LANCHOR104
 	stp	x21, x22, [sp, 32]
-	ldr	x0, [x20, #:lo12:.LANCHOR102]
+	adrp	x21, .LANCHOR146
+	ldr	x0, [x19, #:lo12:.LANCHOR104]
 	stp	x23, x24, [sp, 48]
-	ldrh	w1, [x0, 688]
-	ldrh	w0, [x19, #:lo12:.LANCHOR146]
-	str	x25, [sp, 64]
-	sub	w0, w0, #1
-	cmp	w1, w0
-	blt	.L2842
+	stp	x25, x26, [sp, 64]
+	ldrh	w2, [x0, 688]
+	adrp	x0, .LANCHOR149
+	str	x27, [sp, 80]
+	mov	x20, x0
+	ldrh	w1, [x0, #:lo12:.LANCHOR149]
+	sub	w1, w1, #1
+	cmp	w2, w1
+	bge	.L2941
+	ldr	w0, [x21, #:lo12:.LANCHOR146]
+	cbz	w0, .L2942
+.L2941:
 	bl	pm_free_sblk
-	ldr	x2, [x20, #:lo12:.LANCHOR102]
-	ldrh	w1, [x19, #:lo12:.LANCHOR146]
+	ldr	x2, [x19, #:lo12:.LANCHOR104]
+	ldrh	w1, [x20, #:lo12:.LANCHOR149]
 	sub	w1, w1, #1
 	ldrh	w3, [x2, 688]
 	cmp	w3, w1
-	blt	.L2842
+	bge	.L2943
+	ldr	w1, [x21, #:lo12:.LANCHOR146]
+	cbz	w1, .L2942
+.L2943:
 	add	x0, x2, x0, uxth 1
+	str	wzr, [x21, #:lo12:.LANCHOR146]
+	mov	w20, 65535
 	ldrh	w21, [x0, 416]
-	mov	w0, 65535
-	cmp	w21, w0
-	bne	.L2844
-	adrp	x1, .LANCHOR204
-	add	x1, x1, :lo12:.LANCHOR204
-	mov	w2, 131
+	cmp	w21, w20
+	bne	.L2945
+	adrp	x1, .LANCHOR209
+	add	x1, x1, :lo12:.LANCHOR209
+	mov	w2, 162
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	bl	pm_free_sblk
-	ldr	x1, [x20, #:lo12:.LANCHOR102]
+	ldr	x1, [x19, #:lo12:.LANCHOR104]
 	add	x0, x1, x0, uxth 1
 	ldrh	w21, [x0, 416]
-.L2844:
+	cmp	w21, w20
+	beq	.L2942
+.L2945:
 	bl	pm_select_ram_region
-	and	x24, x0, 65535
-	adrp	x1, .LANCHOR132
-	lsl	x0, x24, 4
-	add	x2, x1, :lo12:.LANCHOR132
-	mov	x22, x24
-	add	x19, x2, x0
-	mov	x23, x1
-	ldrh	w0, [x2, x0]
-	mov	w2, 65535
-	cmp	w0, w2
-	beq	.L2845
-	ldr	x1, [x19, 8]
-	cbz	x1, .L2845
-	ldrsh	w2, [x19, 2]
-	tbz	w2, #31, .L2845
+	and	x22, x0, 65535
+	lsl	x0, x22, 4
+	adrp	x20, .LANCHOR134
+	add	x1, x20, :lo12:.LANCHOR134
+	mov	x25, x22
+	add	x23, x1, x0
+	ldrh	w0, [x1, x0]
+	mov	w1, 65535
+	cmp	w0, w1
+	beq	.L2946
+	ldr	x1, [x23, 8]
+	cbz	x1, .L2946
+	ldrsh	w2, [x23, 2]
+	tbz	w2, #31, .L2946
 	bl	pm_write_page
-	ldrh	w0, [x19, 2]
+	ldrh	w0, [x23, 2]
 	and	w0, w0, 32767
-	strh	w0, [x19, 2]
-.L2845:
-	add	x1, x23, :lo12:.LANCHOR132
-	adrp	x25, .LANCHOR66
-	add	x24, x1, x24, lsl 4
-	add	x25, x25, :lo12:.LANCHOR66
-	mov	w19, 0
-.L2846:
-	ldr	x1, [x20, #:lo12:.LANCHOR102]
-	ldrh	w0, [x1, 698]
-	cmp	w0, w19
-	bhi	.L2848
+	strh	w0, [x23, 2]
+.L2946:
+	adrp	x23, .LANCHOR68
+	adrp	x24, .LANCHOR31
+	add	x23, x23, :lo12:.LANCHOR68
+	add	x24, x24, :lo12:.LANCHOR31
+	mov	w27, 0
+	mov	w26, 24
+.L2947:
+	ldr	x2, [x19, #:lo12:.LANCHOR104]
+	ldrh	w0, [x2, 698]
+	cmp	w0, w27
+	bhi	.L2950
 	bl	pm_free_sblk
-.L2842:
+.L2942:
 	mov	w0, 0
-	ldr	x25, [sp, 64]
+	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 80
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
 	ret
-.L2848:
-	add	x1, x1, x19, sxtw 2
-	ldrh	w3, [x25]
-	mov	w0, 21
-	sub	w2, w0, w3
+.L2950:
+	ldrb	w0, [x24]
+	add	x2, x2, x27, sxtw 2
+	ldrh	w3, [x23]
+	sub	w0, w26, w0
+	sub	w1, w0, w3
 	mov	w0, 1
-	ldr	w1, [x1, 704]
-	lsl	w0, w0, w2
+	lsl	w0, w0, w1
+	ldr	w1, [x2, 704]
 	sub	w0, w0, #1
 	lsr	w1, w1, w3
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR67
-	ldrb	w1, [x1, #:lo12:.LANCHOR67]
+	adrp	x1, .LANCHOR69
+	ldrb	w1, [x1, #:lo12:.LANCHOR69]
 	udiv	w0, w0, w1
 	cmp	w21, w0, uxth
-	bne	.L2847
-	mov	w1, w22
-	mov	w0, w19
+	bne	.L2948
+	mov	w1, w25
+	mov	w0, w27
 	bl	load_l2p_region
-	ldr	x1, [x24, 8]
-	mov	w0, w19
+	cbnz	w0, .L2949
+	add	x0, x20, :lo12:.LANCHOR134
+	add	x0, x0, x22, lsl 4
+	ldr	x1, [x0, 8]
+	mov	w0, w27
 	bl	pm_write_page
-	mov	w0, -1
-	strh	w0, [x24]
-.L2847:
-	add	w19, w19, 1
-	and	w19, w19, 65535
-	b	.L2846
+.L2949:
+	add	x1, x20, :lo12:.LANCHOR134
+	lsl	x0, x22, 4
+	mov	w2, -1
+	strh	w2, [x1, x0]
+.L2948:
+	add	w27, w27, 1
+	and	w27, w27, 65535
+	b	.L2947
 	.size	pm_gc, .-pm_gc
 	.section	.text.pm_flush_id,"ax",@progbits
 	.align	2
@@ -17618,8 +18701,8 @@ pm_gc:
 pm_flush_id:
 	stp	x29, x30, [sp, -32]!
 	ubfiz	x0, x0, 4, 16
-	adrp	x2, .LANCHOR132
-	add	x2, x2, :lo12:.LANCHOR132
+	adrp	x2, .LANCHOR134
+	add	x2, x2, :lo12:.LANCHOR134
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	add	x19, x2, x0
@@ -17629,12 +18712,12 @@ pm_flush_id:
 	ldrh	w0, [x19, 2]
 	and	w0, w0, 32767
 	strh	w0, [x19, 2]
-	adrp	x19, .LANCHOR130
-	ldr	w0, [x19, #:lo12:.LANCHOR130]
-	cbz	w0, .L2854
+	adrp	x19, .LANCHOR132
+	ldr	w0, [x19, #:lo12:.LANCHOR132]
+	cbz	w0, .L2959
 	bl	pm_gc
-	str	wzr, [x19, #:lo12:.LANCHOR130]
-.L2854:
+	str	wzr, [x19, #:lo12:.LANCHOR132]
+.L2959:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -17648,21 +18731,21 @@ pm_flush:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR132
-	add	x19, x19, :lo12:.LANCHOR132
+	adrp	x19, .LANCHOR134
+	add	x19, x19, :lo12:.LANCHOR134
 	mov	w20, 0
 	add	x19, x19, 2
-.L2861:
+.L2966:
 	ldrsh	w0, [x19]
-	tbz	w0, #31, .L2860
+	tbz	w0, #31, .L2965
 	mov	w0, w20
 	bl	pm_flush_id
-.L2860:
+.L2965:
 	add	w20, w20, 1
 	add	x19, x19, 16
 	and	w20, w20, 65535
 	cmp	w20, 32
-	bne	.L2861
+	bne	.L2966
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -17711,81 +18794,91 @@ pm_init:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	mov	w24, w0
-	adrp	x0, .LANCHOR130
+	adrp	x0, .LANCHOR146
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	adrp	x19, .LANCHOR132
-	str	wzr, [x0, #:lo12:.LANCHOR130]
-	adrp	x0, .LANCHOR192
+	adrp	x19, .LANCHOR134
+	str	wzr, [x0, #:lo12:.LANCHOR146]
+	adrp	x0, .LANCHOR132
 	stp	x25, x26, [sp, 64]
-	add	x21, x19, :lo12:.LANCHOR132
+	add	x21, x19, :lo12:.LANCHOR134
+	str	wzr, [x0, #:lo12:.LANCHOR132]
+	adrp	x0, .LANCHOR192
+	stp	x27, x28, [sp, 80]
+	mov	x20, x19
 	strb	w1, [x0, #:lo12:.LANCHOR192]
 	mov	w0, 64
-	stp	x27, x28, [sp, 80]
 	bl	ftl_malloc
+	adrp	x19, .LANCHOR125
 	adrp	x1, .LANCHOR191
-	mov	x20, x19
 	add	x23, x21, 512
-	adrp	x19, .LANCHOR123
 	mov	x22, x1
-	add	x19, x19, :lo12:.LANCHOR123
+	add	x19, x19, :lo12:.LANCHOR125
 	str	x0, [x1, #:lo12:.LANCHOR191]
 	mov	w25, -1
-.L2871:
+.L2976:
 	strh	w25, [x21]
 	strh	wzr, [x21, 2]
-	cbz	w24, .L2870
+	cbz	w24, .L2975
 	ldrb	w0, [x19]
 	lsl	w0, w0, 9
 	bl	ftl_malloc
 	str	x0, [x21, 8]
-.L2870:
+.L2975:
 	add	x21, x21, 16
 	cmp	x21, x23
-	bne	.L2871
-	add	x0, x20, :lo12:.LANCHOR132
-	adrp	x19, .LANCHOR102
+	bne	.L2976
+	add	x0, x20, :lo12:.LANCHOR134
+	adrp	x19, .LANCHOR104
 	ldr	x24, [x22, #:lo12:.LANCHOR191]
 	mov	w4, 4
 	ldr	x25, [x0, 8]
 	mov	x3, x24
-	ldr	x0, [x19, #:lo12:.LANCHOR102]
+	ldr	x0, [x19, #:lo12:.LANCHOR104]
 	mov	x2, x25
 	ldrh	w1, [x0, 692]
 	ldrb	w0, [x0, 694]
 	bl	flash_get_last_written_page
 	sxth	w26, w0
-	ldr	x0, [x19, #:lo12:.LANCHOR102]
+	ldr	x0, [x19, #:lo12:.LANCHOR104]
 	mov	w23, w26
 	ldrh	w2, [x0, 696]
 	cmp	w2, w26
-	bgt	.L2872
+	bgt	.L2977
 	ldrh	w1, [x0, 692]
 	mov	w3, w26
-	adrp	x0, .LC190
-	add	x0, x0, :lo12:.LC190
-	adrp	x27, .LANCHOR103
-	adrp	x28, .LANCHOR123
-	add	x27, x27, :lo12:.LANCHOR103
-	add	x28, x28, :lo12:.LANCHOR123
-	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR102]
+	adrp	x0, .LC196
+	add	x0, x0, :lo12:.LC196
+	adrp	x27, .LANCHOR105
+	adrp	x28, .LANCHOR125
+	add	x27, x27, :lo12:.LANCHOR105
+	add	x28, x28, :lo12:.LANCHOR125
+	bl	printf
+	ldr	x0, [x19, #:lo12:.LANCHOR104]
 	ldrsh	w21, [x0, 696]
-.L2873:
+.L2978:
 	cmp	w21, w26
-	ble	.L2875
-	adrp	x0, .LANCHOR182
+	ble	.L2980
+	adrp	x0, .LANCHOR185
 	mov	w1, 1
 	add	w23, w23, 1
-	strb	w1, [x0, #:lo12:.LANCHOR182]
-	ldr	x0, [x19, #:lo12:.LANCHOR102]
+	strb	w1, [x0, #:lo12:.LANCHOR185]
+	ldr	x0, [x19, #:lo12:.LANCHOR104]
 	strh	w23, [x0, 696]
 	bl	pm_free_sblk
-.L2872:
-	add	x20, x20, :lo12:.LANCHOR132
-	mov	w0, -1
+.L2977:
+	add	x20, x20, :lo12:.LANCHOR134
+	adrp	x0, .LANCHOR208
+	mov	w1, 255
+	ldrh	w2, [x0, #:lo12:.LANCHOR208]
+	ldr	x0, [x20, 8]
+	bl	ftl_memset
 	ldr	x1, [x20, 8]
+	mov	w0, -1
 	bl	pm_write_page
+	adrp	x0, .LANCHOR185
+	ldrb	w0, [x0, #:lo12:.LANCHOR185]
+	cbz	w0, .L2981
 	ldr	x1, [x20, 8]
 	mov	w0, -1
 	bl	pm_write_page
@@ -17795,6 +18888,7 @@ pm_init:
 	ldr	x1, [x20, 8]
 	mov	w0, -1
 	bl	pm_write_page
+.L2981:
 	bl	pm_free_sblk
 	bl	pm_gc
 	mov	w0, 0
@@ -17805,8 +18899,8 @@ pm_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2875:
-	ldr	x0, [x19, #:lo12:.LANCHOR102]
+.L2980:
+	ldr	x0, [x19, #:lo12:.LANCHOR104]
 	mov	x3, x24
 	ldrh	w1, [x27]
 	mov	x2, x25
@@ -17817,32 +18911,32 @@ pm_init:
 	mov	w1, w22
 	bl	flash_read_page_en
 	mov	w4, w0
-	ldr	x0, [x19, #:lo12:.LANCHOR102]
+	ldr	x0, [x19, #:lo12:.LANCHOR104]
 	str	w4, [x29, 108]
 	mov	w2, w22
 	ldr	w1, [x0, 48]
 	ldrh	w3, [x0, 694]
 	add	w1, w1, 1
 	str	w1, [x0, 48]
-	adrp	x0, .LC191
-	add	x0, x0, :lo12:.LC191
+	adrp	x0, .LC197
+	add	x0, x0, :lo12:.LC197
 	ldr	w1, [x24]
 	bl	printf
 	ldr	w4, [x29, 108]
 	cmp	w4, 512
 	ccmn	w4, #1, 4, ne
-	beq	.L2874
-	ldr	x1, [x19, #:lo12:.LANCHOR102]
+	beq	.L2979
+	ldr	x1, [x19, #:lo12:.LANCHOR104]
 	ldr	w0, [x24]
 	ldrh	w2, [x1, 698]
 	cmp	w0, w2
-	bcs	.L2874
+	bcs	.L2979
 	add	x0, x1, x0, uxtw 2
 	str	w22, [x0, 704]
-.L2874:
+.L2979:
 	add	w21, w21, 1
 	sxth	w21, w21
-	b	.L2873
+	b	.L2978
 	.size	pm_init, .-pm_init
 	.section	.text.pm_log2phys,"ax",@progbits
 	.align	2
@@ -17853,24 +18947,24 @@ pm_log2phys:
 	add	x29, sp, 0
 	stp	x25, x26, [sp, 64]
 	mov	w25, w0
-	adrp	x0, .LANCHOR120
+	adrp	x0, .LANCHOR122
 	stp	x23, x24, [sp, 48]
 	stp	x19, x20, [sp, 16]
 	mov	w24, w2
 	stp	x21, x22, [sp, 32]
 	mov	x23, x1
-	ldr	w2, [x0, #:lo12:.LANCHOR120]
+	ldr	w2, [x0, #:lo12:.LANCHOR122]
 	str	x27, [sp, 80]
 	cmp	w25, w2
-	bcc	.L2885
+	bcc	.L2994
 	mov	w1, w25
-	adrp	x0, .LC192
-	add	x0, x0, :lo12:.LC192
+	adrp	x0, .LC198
+	add	x0, x0, :lo12:.LC198
 	bl	printf
 	mov	w0, -1
-	cbnz	w24, .L2884
+	cbnz	w24, .L2993
 	str	w0, [x23]
-.L2884:
+.L2993:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -17878,46 +18972,61 @@ pm_log2phys:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2885:
-	adrp	x0, .LANCHOR123
-	adrp	x21, .LANCHOR132
+.L2994:
+	adrp	x0, .LANCHOR125
+	adrp	x21, .LANCHOR134
 	mov	x19, 0
-	ldrb	w20, [x0, #:lo12:.LANCHOR123]
-	add	x0, x21, :lo12:.LANCHOR132
+	ldrb	w20, [x0, #:lo12:.LANCHOR125]
+	add	x0, x21, :lo12:.LANCHOR134
 	add	x0, x0, 8
 	lsl	w22, w20, 7
 	udiv	w22, w25, w22
 	and	w26, w22, 65535
-.L2891:
+.L3000:
 	ldr	x1, [x0]
-	cbz	x1, .L2887
+	cbz	x1, .L2996
 	ldrh	w1, [x0, -8]
 	cmp	w1, w26
-	bne	.L2887
-.L2888:
+	bne	.L2996
+.L2997:
 	ubfiz	w20, w20, 7, 9
 	msub	w25, w26, w20, w25
 	and	x25, x25, 65535
-	cbnz	w24, .L2889
-	add	x0, x21, :lo12:.LANCHOR132
+	cbnz	w24, .L2998
+	add	x0, x21, :lo12:.LANCHOR134
+	adrp	x1, .LANCHOR31
 	add	x0, x0, x19, lsl 4
+	mov	w2, 24
 	ldr	x0, [x0, 8]
 	ldr	w0, [x0, x25, lsl 2]
 	str	w0, [x23]
-.L2890:
-	add	x21, x21, :lo12:.LANCHOR132
+	ldrb	w3, [x1, #:lo12:.LANCHOR31]
+	mov	w1, 1
+	sub	w2, w2, w3
+	lsl	w1, w1, w3
+	sub	w1, w1, #1
+	lsr	w0, w0, w2
+	and	w0, w0, w1
+	adrp	x1, .LANCHOR106
+	ldrb	w1, [x1, #:lo12:.LANCHOR106]
+	cmp	w0, w1
+	bcc	.L2999
+	mov	w0, -1
+	str	w0, [x23]
+.L2999:
+	add	x21, x21, :lo12:.LANCHOR134
 	add	x19, x21, x19, lsl 4
 	ldrh	w0, [x19, 2]
 	mvn	x1, x0
 	tst	x1, 32767
-	beq	.L2894
+	beq	.L3003
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L2894:
+.L3003:
 	mov	w0, 0
-	b	.L2884
-.L2889:
-	add	x0, x21, :lo12:.LANCHOR132
+	b	.L2993
+.L2998:
+	add	x0, x21, :lo12:.LANCHOR134
 	ldr	w2, [x23]
 	add	x0, x0, x19, lsl 4
 	ldr	x1, [x0, 8]
@@ -17925,35 +19034,35 @@ pm_log2phys:
 	ldrh	w1, [x0, 2]
 	orr	w1, w1, -32768
 	strh	w1, [x0, 2]
-	adrp	x0, .LANCHOR133
-	strb	w22, [x0, #:lo12:.LANCHOR133]
-	b	.L2890
-.L2887:
+	adrp	x0, .LANCHOR135
+	strb	w22, [x0, #:lo12:.LANCHOR135]
+	b	.L2999
+.L2996:
 	add	w19, w19, 1
 	add	x0, x0, 16
 	and	x19, x19, 65535
 	cmp	w19, 32
-	bne	.L2891
+	bne	.L3000
 	bl	pm_select_ram_region
 	and	x19, x0, 65535
 	sbfiz	x1, x19, 4, 32
-	add	x2, x21, :lo12:.LANCHOR132
+	add	x2, x21, :lo12:.LANCHOR134
 	add	x3, x2, x1
 	mov	w27, w0
 	ldrh	w2, [x2, x1]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L2892
+	beq	.L3001
 	ldrsh	w1, [x3, 2]
-	tbz	w1, #31, .L2892
+	tbz	w1, #31, .L3001
 	bl	pm_flush_id
-.L2892:
-	adrp	x0, .LANCHOR205
+.L3001:
+	adrp	x0, .LANCHOR210
 	mov	w1, w27
-	strb	w19, [x0, #:lo12:.LANCHOR205]
+	strb	w19, [x0, #:lo12:.LANCHOR210]
 	mov	w0, w26
 	bl	load_l2p_region
-	b	.L2888
+	b	.L2997
 	.size	pm_log2phys, .-pm_log2phys
 	.section	.text.gc_recovery,"ax",@progbits
 	.align	2
@@ -17961,71 +19070,76 @@ pm_log2phys:
 	.type	gc_recovery, %function
 gc_recovery:
 	sub	sp, sp, #240
-	adrp	x0, .LANCHOR76
+	adrp	x0, .LANCHOR10
+	adrp	x1, .LANCHOR78
+	mov	w2, 65535
 	stp	x29, x30, [sp, 32]
 	add	x29, sp, 32
-	stp	x21, x22, [sp, 64]
-	adrp	x21, .LANCHOR10
 	stp	x19, x20, [sp, 48]
-	ldr	x20, [x21, #:lo12:.LANCHOR10]
-	strb	wzr, [x0, #:lo12:.LANCHOR76]
-	adrp	x0, .LANCHOR150
+	ldr	x20, [x0, #:lo12:.LANCHOR10]
+	strb	wzr, [x1, #:lo12:.LANCHOR78]
+	adrp	x1, .LANCHOR153
+	stp	x27, x28, [sp, 112]
+	mov	x27, x0
+	strb	wzr, [x1, #:lo12:.LANCHOR153]
+	add	x1, x20, 80
+	stp	x21, x22, [sp, 64]
+	str	x1, [x29, 168]
 	stp	x23, x24, [sp, 80]
-	strb	wzr, [x0, #:lo12:.LANCHOR150]
-	add	x0, x20, 80
 	ldrh	w1, [x20, 80]
-	str	x0, [x29, 176]
-	mov	w0, 65535
 	stp	x25, x26, [sp, 96]
-	cmp	w1, w0
-	stp	x27, x28, [sp, 112]
-	beq	.L2901
+	cmp	w1, w2
+	beq	.L3010
 	mov	w0, -1
 	strh	w0, [x20, 130]
 	mov	w0, 1
 	bl	buf_alloc
-	mov	x26, x0
+	mov	x28, x0
 	ldrb	w0, [x20, 89]
 	add	x1, x20, 80
-	adrp	x3, .LANCHOR103
-	adrp	x2, .LANCHOR71
+	adrp	x3, .LANCHOR105
+	str	x3, [x29, 144]
 	sub	w0, w0, #1
-	str	x3, [x29, 152]
 	add	x0, x1, x0, sxtw 1
-	ldrh	w1, [x3, #:lo12:.LANCHOR103]
-	str	x2, [x29, 168]
+	ldrh	w1, [x3, #:lo12:.LANCHOR105]
 	ldrh	w0, [x0, 16]
 	mul	w1, w0, w1
-	ldrb	w0, [x2, #:lo12:.LANCHOR71]
+	adrp	x0, .LANCHOR73
 	str	w1, [x29, 200]
-	cmp	w0, 3
-	bne	.L2902
-	adrp	x0, .LANCHOR85
-	ldrh	w0, [x0, #:lo12:.LANCHOR85]
+	ldrb	w2, [x0, #:lo12:.LANCHOR73]
+	str	x0, [x29, 160]
+	cmp	w2, 2
+	beq	.L3011
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbz	w0, .L3012
+.L3011:
+	adrp	x0, .LANCHOR79
+	ldrh	w0, [x0, #:lo12:.LANCHOR79]
 	sub	w0, w0, #1
 	add	w0, w0, w1
-	orr	w0, w0, 50331648
-.L2946:
-	str	w0, [x26, 40]
-.L2903:
+	orr	w2, w0, w2, lsl 24
+	str	w2, [x28, 40]
+.L3013:
 	mov	w1, 1
-	mov	x0, x26
+	mov	x0, x28
 	bl	sblk_read_page
-	ldr	w0, [x26, 52]
+	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2904
-	ldr	x0, [x26, 24]
+	beq	.L3014
+	ldr	x0, [x28, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L2905
-.L2904:
-	mov	x0, x26
-	bl	buf_free
-	ldr	x1, [x26, 24]
-	ldr	x0, [x26, 8]
+	beq	.L3015
+.L3014:
+	mov	x0, x28
+	bl	zbuf_free
+	ldr	x1, [x28, 24]
+	mov	w26, 0
+	ldr	x0, [x28, 8]
 	ldr	w2, [x1, 12]
 	str	w2, [sp, 16]
 	ldr	w2, [x1, 8]
@@ -18034,49 +19148,53 @@ gc_recovery:
 	str	w2, [sp]
 	ldp	w3, w4, [x0]
 	ldp	w5, w6, [x0, 8]
-	adrp	x0, .LC193
+	adrp	x0, .LC199
 	ldr	w7, [x1]
-	add	x0, x0, :lo12:.LC193
-	ldr	w1, [x26, 40]
-	ldr	w2, [x26, 52]
+	add	x0, x0, :lo12:.LC199
+	ldr	w1, [x28, 40]
+	ldr	w2, [x28, 52]
 	bl	printf
-.L2950:
 	adrp	x0, .LANCHOR9
 	ldrh	w1, [x20, 80]
-	mov	w22, 0
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x1, lsl 1]
-	ldr	x0, [x21, #:lo12:.LANCHOR10]
+	ldr	x0, [x27, #:lo12:.LANCHOR10]
 	ldrh	w1, [x20, 80]
 	strh	w1, [x0, 130]
-.L2906:
+.L3016:
 	ldrh	w0, [x20, 80]
+	adrp	x2, .LANCHOR9
+	ldr	x2, [x2, #:lo12:.LANCHOR9]
+	ubfiz	x1, x0, 1, 16
+	ldrh	w1, [x2, x1]
+	cbnz	w1, .L3051
 	bl	ftl_dump_write_open_sblk
+.L3051:
 	ldrh	w1, [x20, 80]
-	mov	w2, w22
-	adrp	x0, .LC195
-	add	x0, x0, :lo12:.LC195
+	mov	w2, w26
+	adrp	x0, .LC201
+	add	x0, x0, :lo12:.LC201
 	bl	printf
 	mov	w0, -1
 	strh	w0, [x20, 80]
 	bl	pm_flush
 	bl	ftl_ext_info_flush
-	ldr	x0, [x21, #:lo12:.LANCHOR10]
+	ldr	x0, [x27, #:lo12:.LANCHOR10]
 	mov	w1, 65535
 	ldrh	w0, [x0, 130]
 	cmp	w0, w1
-	beq	.L2933
+	beq	.L3052
 	bl	ftl_free_sblk
-.L2933:
-	adrp	x0, .LANCHOR102
-	ldr	x1, [x0, #:lo12:.LANCHOR102]
+.L3052:
+	adrp	x0, .LANCHOR104
+	ldr	x1, [x0, #:lo12:.LANCHOR104]
 	mov	w0, -1
 	strh	w0, [x1, 126]
-	ldr	x1, [x21, #:lo12:.LANCHOR10]
+	ldr	x1, [x27, #:lo12:.LANCHOR10]
 	strh	w0, [x1, 130]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2900:
+.L3009:
 	ldp	x19, x20, [sp, 48]
 	ldp	x21, x22, [sp, 64]
 	ldp	x23, x24, [sp, 80]
@@ -18085,321 +19203,383 @@ gc_recovery:
 	ldp	x29, x30, [sp, 32]
 	add	sp, sp, 240
 	ret
-.L2902:
-	cmp	w0, 2
-	bne	.L2903
-	adrp	x0, .LANCHOR85
-	ldrh	w0, [x0, #:lo12:.LANCHOR85]
-	add	w0, w1, w0, lsl 1
+.L3012:
+	cmp	w2, 3
+	bne	.L3013
+	adrp	x0, .LANCHOR87
+	ldrh	w0, [x0, #:lo12:.LANCHOR87]
 	sub	w0, w0, #1
-	orr	w0, w0, 33554432
-	b	.L2946
-.L2905:
-	adrp	x28, .LANCHOR77
-	adrp	x22, .LANCHOR78
-	adrp	x27, .LANCHOR152
-	ldr	x1, [x26, 8]
-	ldrb	w0, [x22, #:lo12:.LANCHOR78]
-	adrp	x24, .LANCHOR153
-	ldrh	w2, [x28, #:lo12:.LANCHOR77]
+	add	w0, w0, w1
+	orr	w0, w0, 50331648
+	str	w0, [x28, 40]
+	b	.L3013
+.L3015:
+	adrp	x22, .LANCHOR79
+	adrp	x19, .LANCHOR80
+	adrp	x23, .LANCHOR155
+	ldr	x1, [x28, 8]
+	ldrb	w0, [x19, #:lo12:.LANCHOR80]
+	adrp	x25, .LANCHOR156
+	ldrh	w2, [x22, #:lo12:.LANCHOR79]
 	mul	w2, w2, w0
-	ldr	x0, [x27, #:lo12:.LANCHOR152]
+	ldr	x0, [x23, #:lo12:.LANCHOR155]
 	lsl	w2, w2, 2
 	bl	ftl_memcpy
-	ldrb	w1, [x22, #:lo12:.LANCHOR78]
-	ldrh	w0, [x28, #:lo12:.LANCHOR77]
+	str	x22, [x29, 152]
+	ldrb	w1, [x19, #:lo12:.LANCHOR80]
+	ldrh	w0, [x22, #:lo12:.LANCHOR79]
 	mul	w0, w0, w1
-	ldr	x1, [x26, 8]
+	adrp	x1, .LANCHOR125
+	ldrb	w1, [x1, #:lo12:.LANCHOR125]
 	lsl	w2, w0, 2
+	cmp	w1, w0, lsr 6
+	bge	.L3017
+	lsl	w1, w1, 7
+	sub	w0, w1, w0
+	mov	w1, 0
+	lsl	w26, w0, 2
+	ldr	x0, [x25, #:lo12:.LANCHOR156]
+	bl	ftl_memset
+	ldr	x0, [x29, 152]
+	mov	w2, w26
+	ldrb	w1, [x19, #:lo12:.LANCHOR80]
+	ldrh	w0, [x0, #:lo12:.LANCHOR79]
+	mul	w0, w0, w1
+	ldr	x1, [x28, 8]
 	add	x1, x1, x0, sxtw 2
-	ldr	x0, [x24, #:lo12:.LANCHOR153]
+	ldr	x0, [x25, #:lo12:.LANCHOR156]
 	bl	ftl_memcpy
-	str	x28, [x29, 144]
-	adrp	x0, .LANCHOR85
-	ldrh	w14, [x0, #:lo12:.LANCHOR85]
-	ldr	x0, [x29, 168]
-	ldrb	w0, [x0, #:lo12:.LANCHOR71]
-	cmp	w0, 2
-	beq	.L2907
-.L2947:
+	mov	w0, 1
+	str	w0, [x29, 180]
+.L3018:
+	adrp	x0, .LANCHOR87
+	ldrh	w0, [x0, #:lo12:.LANCHOR87]
 	str	w0, [x29, 184]
-	adrp	x25, .LC194
-	ldr	x0, [x29, 152]
-	mov	w23, 0
-	mov	w22, 0
-	add	x0, x0, :lo12:.LANCHOR103
-	str	x0, [x29, 128]
-	add	x0, x25, :lo12:.LC194
-	str	x0, [x29, 120]
-.L2909:
-	sub	w0, w23, #1
+	ldr	x0, [x29, 160]
+	ldrb	w0, [x0, #:lo12:.LANCHOR73]
 	str	w0, [x29, 188]
-	cmp	w23, w14
-	beq	.L2918
-	mov	x19, 0
-	b	.L2919
-.L2907:
-	lsl	w14, w14, 1
+	cmp	w0, 2
+	bne	.L3019
+	adrp	x0, .LANCHOR74
+	ldrb	w0, [x0, #:lo12:.LANCHOR74]
+	cbz	w0, .L3020
+.L3019:
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbz	w0, .L3021
+.L3020:
+	ldp	w0, w1, [x29, 184]
+	mul	w0, w0, w1
+	str	w0, [x29, 184]
 	mov	w0, 1
-	b	.L2947
-.L2915:
-	ldr	x1, [x29, 128]
-	ldr	x0, [x29, 160]
-	ldrh	w1, [x1]
+	str	w0, [x29, 188]
+.L3021:
+	adrp	x24, .LC200
+	mov	w22, 0
+	add	x0, x24, :lo12:.LC200
+	mov	w19, 0
+	str	x0, [x29, 104]
+.L3022:
+	sub	w0, w22, #1
+	str	w0, [x29, 136]
+	ldr	w0, [x29, 184]
+	cmp	w0, w22
+	bls	.L3034
+	adrp	x0, .LANCHOR35
+	mov	x21, 0
+	add	x0, x0, :lo12:.LANCHOR35
+	str	x0, [x29, 112]
+	b	.L3035
+.L3017:
+	ldr	x1, [x28, 8]
+	mov	w26, 0
+	add	x1, x1, x0, sxtw 2
+	ldr	x0, [x25, #:lo12:.LANCHOR156]
+	bl	ftl_memcpy
+	str	wzr, [x29, 180]
+	b	.L3018
+.L3030:
+	ldp	x1, x0, [x29, 120]
 	ldrh	w0, [x0, 96]
+	ldrh	w1, [x1]
 	mul	w0, w0, w1
-	ldr	x1, [x29, 136]
+	ldr	x1, [x29, 160]
 	str	w0, [x29, 200]
-	ldrb	w1, [x1]
-	cmp	w1, 3
-	bne	.L2910
-	add	w0, w23, w0
-	orr	w0, w0, w25, lsl 24
-.L2948:
-	str	w0, [x26, 40]
+	ldrb	w1, [x1, #:lo12:.LANCHOR73]
+	cmp	w1, 2
+	beq	.L3023
+	ldr	x2, [x29, 112]
+	ldrb	w2, [x2]
+	cbz	w2, .L3024
+.L3023:
+	ldr	w2, [x29, 136]
+	add	w0, w2, w0
+	add	w0, w0, w24
+	orr	w0, w0, w1, lsl 24
+.L3026:
+	str	w0, [x28, 40]
 	mov	w1, 1
-	str	w14, [x29, 112]
-	mov	x0, x26
+	str	x8, [x29, 96]
+	mov	x0, x28
 	bl	sblk_read_page
-	ldr	x0, [x27, #:lo12:.LANCHOR152]
-	ldr	w14, [x29, 112]
-	ldr	w3, [x0, x28]
-	ldr	x0, [x26, 24]
+	ldr	w1, [x29, 180]
+	ldr	x0, [x28, 24]
+	ldr	x8, [x29, 96]
+	cbz	w1, .L3027
+	ldr	x1, [x25, #:lo12:.LANCHOR156]
+	ldr	w2, [x1, x8]
+	cbnz	w2, .L3027
+	ldr	w2, [x0, 8]
+	str	w2, [x1, x8]
+.L3027:
+	ldr	x1, [x23, #:lo12:.LANCHOR155]
 	ldr	w6, [x0, 4]
+	ldr	w3, [x1, x8]
 	cmp	w3, w6
-	bne	.L2913
-	ldr	x1, [x24, #:lo12:.LANCHOR153]
-	ldr	w2, [x1, x28]
+	bne	.L3028
+	ldr	x1, [x25, #:lo12:.LANCHOR156]
+	ldr	w2, [x1, x8]
 	ldr	w1, [x0, 8]
 	cmp	w2, w1
-	beq	.L2914
-.L2913:
-	ldr	x1, [x24, #:lo12:.LANCHOR153]
+	beq	.L3029
+.L3028:
+	ldr	x1, [x25, #:lo12:.LANCHOR156]
 	ldr	w2, [x0, 12]
 	str	w2, [sp]
-	str	w14, [x29, 112]
-	ldr	w4, [x1, x28]
+	str	x8, [x29, 96]
+	ldr	w4, [x1, x8]
 	ldr	w5, [x0]
 	ldr	w7, [x0, 8]
-	ldr	w1, [x26, 40]
-	ldr	w2, [x26, 52]
-	ldr	x0, [x29, 120]
+	ldr	w1, [x28, 40]
+	ldr	w2, [x28, 52]
+	ldr	x0, [x29, 104]
 	bl	printf
-	ldr	x0, [x27, #:lo12:.LANCHOR152]
-	ldr	w14, [x29, 112]
-	ldr	w0, [x0, x28]
+	ldr	x0, [x23, #:lo12:.LANCHOR155]
+	ldr	x8, [x29, 96]
+	ldr	w0, [x0, x8]
 	cmn	w0, #1
-	beq	.L2914
-	mov	x0, x26
-	bl	buf_free
-	b	.L2950
-.L2910:
-	cmp	w1, 2
-	bne	.L2912
-	ldr	w1, [x29, 188]
-	add	w0, w0, w1
-	add	w0, w0, w25
-	orr	w0, w0, 33554432
-	b	.L2948
-.L2912:
-	add	w0, w23, w0
-	b	.L2948
-.L2914:
-	add	w22, w22, 1
-	add	w25, w25, 1
-	add	x28, x28, 4
-.L2917:
-	ldr	w0, [x29, 184]
-	cmp	w0, w25
-	bcs	.L2915
-	add	x19, x19, 1
-.L2919:
-	ldr	x0, [x29, 176]
+	beq	.L3029
+	mov	x0, x28
+	bl	zbuf_free
+	adrp	x0, .LANCHOR9
+	ldrh	w1, [x20, 80]
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	strh	wzr, [x0, x1, lsl 1]
+	ldr	x0, [x27, #:lo12:.LANCHOR10]
+	ldrh	w1, [x20, 80]
+	strh	w1, [x0, 130]
+	b	.L3016
+.L3024:
+	cmp	w1, 3
+	add	w0, w22, w0
+	bne	.L3026
+	orr	w0, w0, w24, lsl 24
+	b	.L3026
+.L3029:
+	add	w19, w19, 1
+	add	w24, w24, 1
+	add	x8, x8, 4
+.L3032:
+	ldr	w0, [x29, 188]
+	cmp	w0, w24
+	bcs	.L3030
+	add	x21, x21, 1
+.L3035:
+	ldr	x0, [x29, 168]
 	ldrb	w0, [x0, 9]
-	cmp	w0, w19
-	ble	.L2916
-	add	x0, x20, x19, lsl 1
-	str	x0, [x29, 160]
+	cmp	w0, w21
+	ble	.L3031
+	add	x0, x20, x21, lsl 1
+	str	x0, [x29, 128]
+	ldr	x0, [x29, 144]
+	sbfiz	x8, x19, 2, 32
+	mov	w24, 1
+	add	x0, x0, :lo12:.LANCHOR105
+	str	x0, [x29, 120]
+	b	.L3032
+.L3031:
+	adrp	x0, .LANCHOR74
+	ldrb	w0, [x0, #:lo12:.LANCHOR74]
+	cmp	w0, 0
+	cinc	w22, w22, ne
+	add	w22, w22, 1
+	b	.L3022
+.L3034:
+	mov	x0, x28
+	bl	zbuf_free
+	ldr	x3, [x29, 152]
+	adrp	x21, .LANCHOR9
 	ldr	x0, [x29, 168]
-	sbfiz	x28, x22, 2, 32
-	mov	w25, 1
-	add	x0, x0, :lo12:.LANCHOR71
-	str	x0, [x29, 136]
-	b	.L2917
-.L2916:
-	add	w23, w23, 1
-	b	.L2909
-.L2918:
-	mov	x0, x26
-	bl	buf_free
-	ldr	x3, [x29, 144]
-	adrp	x25, .LANCHOR9
-	ldr	x0, [x29, 176]
-	mov	w22, 0
+	adrp	x24, .LANCHOR68
 	ldrh	w2, [x20, 80]
+	mov	w26, 0
+	ldr	x1, [x21, #:lo12:.LANCHOR9]
 	mov	w28, 0
-	ldr	x1, [x25, #:lo12:.LANCHOR9]
-	ldrh	w3, [x3, #:lo12:.LANCHOR77]
+	ldrh	w3, [x3, #:lo12:.LANCHOR79]
 	ldrb	w0, [x0, 9]
-	str	x25, [x29, 144]
-	str	wzr, [x29, 188]
+	str	x21, [x29, 136]
+	str	wzr, [x29, 180]
 	mul	w0, w0, w3
 	strh	w0, [x1, x2, lsl 1]
-	adrp	x0, .LANCHOR66
-	add	x0, x0, :lo12:.LANCHOR66
-	str	x0, [x29, 112]
-.L2920:
+	add	x0, x24, :lo12:.LANCHOR68
+	str	x0, [x29, 104]
+.L3036:
 	sub	w0, w28, #1
-	str	w0, [x29, 136]
-	cmp	w23, w28
-	beq	.L2931
-	mov	x26, 0
-	b	.L2932
-.L2928:
-	ldr	w0, [x29, 188]
-	ldr	x1, [x27, #:lo12:.LANCHOR152]
+	str	w0, [x29, 128]
+	ldr	w0, [x29, 184]
+	cmp	w0, w28
+	bls	.L3049
+	mov	x22, 0
+	b	.L3050
+.L3045:
+	ldr	w0, [x29, 180]
+	ldr	x1, [x23, #:lo12:.LANCHOR155]
 	sbfiz	x0, x0, 2, 32
-	ldr	w5, [x1, x0]
-	cmn	w5, #1
-	beq	.L2921
-	ldr	x1, [x24, #:lo12:.LANCHOR153]
-	str	w5, [x29, 108]
+	ldr	w21, [x1, x0]
+	cmn	w21, #1
+	beq	.L3037
+	ldr	x1, [x25, #:lo12:.LANCHOR156]
 	ldr	w0, [x1, x0]
-	str	w0, [x29, 160]
-	mov	w0, w5
+	str	w0, [x29, 152]
+	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 204]
 	cmn	w0, #1
-	ldr	w5, [x29, 108]
-	bne	.L2922
-	mov	w0, w5
-	str	w5, [x29, 108]
+	bne	.L3038
 	mov	w2, 0
 	add	x1, x29, 204
+	mov	w0, w21
 	bl	pm_log2phys
-	ldr	w5, [x29, 108]
-.L2922:
-	ldr	x0, [x29, 128]
-	ldr	x1, [x29, 152]
+.L3038:
+	ldr	x0, [x29, 120]
+	ldr	x1, [x29, 144]
 	ldrh	w0, [x0, 96]
-	ldrh	w1, [x1, #:lo12:.LANCHOR103]
+	ldrh	w1, [x1, #:lo12:.LANCHOR105]
 	mul	w0, w0, w1
-	ldr	x1, [x29, 168]
-	ldrb	w1, [x1, #:lo12:.LANCHOR71]
-	cmp	w1, 3
-	bne	.L2923
-	add	w0, w28, w0
-	orr	w0, w0, w25, lsl 24
-.L2949:
+	ldr	x1, [x29, 160]
+	ldrb	w1, [x1, #:lo12:.LANCHOR73]
+	cmp	w1, 2
+	beq	.L3039
+	adrp	x2, .LANCHOR35
+	ldrb	w2, [x2, #:lo12:.LANCHOR35]
+	cbz	w2, .L3040
+.L3039:
+	ldr	w2, [x29, 128]
+	add	w0, w0, w2
+	add	w0, w0, w24
+	orr	w0, w0, w1, lsl 24
+.L3042:
+	ldr	x1, [x29, 112]
+	mov	w19, 24
 	str	w0, [x29, 200]
-	mov	w19, 21
-	ldr	x0, [x29, 112]
 	mov	w2, 1
-	ldr	w1, [x29, 160]
+	ldr	x0, [x29, 104]
+	ldrb	w1, [x1]
 	ldrh	w0, [x0]
+	sub	w19, w19, w1
+	ldr	w1, [x29, 152]
 	sub	w19, w19, w0
 	lsr	w0, w1, w0
 	lsl	w19, w2, w19
 	sub	w19, w19, #1
 	and	w19, w19, w0
-	ldr	x0, [x29, 120]
-	ldrb	w0, [x0]
+	adrp	x0, .LANCHOR69
+	ldrb	w0, [x0, #:lo12:.LANCHOR69]
 	udiv	w19, w19, w0
 	ldr	w0, [x29, 204]
 	cmp	w1, w0
 	and	x19, x19, 65535
-	bne	.L2926
+	bne	.L3043
 	add	x1, x29, 200
-	mov	w0, w5
+	mov	w0, w21
 	bl	pm_log2phys
-	add	w22, w22, 1
+	add	w26, w26, 1
 	mov	w0, w19
 	bl	ftl_vpn_decrement
-.L2927:
-	ldr	w0, [x29, 188]
+.L3044:
+	ldr	w0, [x29, 180]
 	add	w0, w0, 1
-	str	w0, [x29, 188]
+	str	w0, [x29, 180]
 	adrp	x0, .LANCHOR7
 	ldr	x0, [x0, #:lo12:.LANCHOR7]
 	add	x0, x0, x19, lsl 2
 	ldrb	w0, [x0, 2]
 	tst	w0, 224
-	bne	.L2921
-	ldr	x0, [x29, 144]
+	bne	.L3037
+	ldr	x0, [x29, 136]
 	lsl	x19, x19, 1
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x0, x19]
-	cbz	w1, .L2921
+	cbz	w1, .L3037
 	strh	wzr, [x0, x19]
-.L2921:
-	add	w25, w25, 1
-.L2930:
-	ldr	w0, [x29, 184]
-	cmp	w0, w25
-	bcs	.L2928
-	add	x26, x26, 1
-.L2932:
-	ldr	x0, [x29, 176]
+.L3037:
+	add	w24, w24, 1
+.L3047:
+	ldr	w0, [x29, 188]
+	cmp	w0, w24
+	bcs	.L3045
+	add	x22, x22, 1
+.L3050:
+	ldr	x0, [x29, 168]
 	ldrb	w0, [x0, 9]
-	cmp	w0, w26
-	ble	.L2929
-	add	x0, x20, x26, lsl 1
-	mov	w25, 1
-	str	x0, [x29, 128]
-	adrp	x0, .LANCHOR67
-	add	x0, x0, :lo12:.LANCHOR67
+	cmp	w0, w22
+	ble	.L3046
+	add	x0, x20, x22, lsl 1
+	mov	w24, 1
 	str	x0, [x29, 120]
-	b	.L2930
-.L2923:
-	cmp	w1, 2
-	bne	.L2925
-	ldr	w1, [x29, 136]
-	add	w0, w0, w1
-	add	w0, w0, w25
-	orr	w0, w0, 33554432
-	b	.L2949
-.L2925:
+	adrp	x0, .LANCHOR31
+	add	x0, x0, :lo12:.LANCHOR31
+	str	x0, [x29, 112]
+	b	.L3047
+.L3040:
+	cmp	w1, 3
 	add	w0, w28, w0
-	b	.L2949
-.L2926:
+	bne	.L3042
+	orr	w0, w0, w24, lsl 24
+	b	.L3042
+.L3043:
 	ldr	w1, [x29, 200]
 	cmp	w0, w1
-	cinc	w22, w22, eq
-	b	.L2927
-.L2929:
+	cinc	w26, w26, eq
+	b	.L3044
+.L3046:
+	adrp	x0, .LANCHOR74
+	ldrb	w0, [x0, #:lo12:.LANCHOR74]
+	cmp	w0, 0
+	cinc	w28, w28, ne
 	add	w28, w28, 1
-	b	.L2920
-.L2931:
-	ldr	x0, [x29, 144]
+	b	.L3036
+.L3049:
+	ldr	x0, [x29, 136]
 	ldrh	w1, [x20, 80]
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
-	strh	w22, [x0, x1, lsl 1]
+	strh	w26, [x0, x1, lsl 1]
 	ldrh	w0, [x20, 80]
 	bl	zftl_insert_data_list
-	b	.L2906
-.L2901:
+	b	.L3016
+.L3010:
 	ldrh	w0, [x20, 130]
 	cmp	w0, w1
-	beq	.L2900
-	adrp	x19, .LANCHOR102
-	ldr	x1, [x19, #:lo12:.LANCHOR102]
+	beq	.L3009
+	adrp	x19, .LANCHOR104
+	ldr	x1, [x19, #:lo12:.LANCHOR104]
 	ldrh	w1, [x1, 126]
 	cmp	w1, w0
-	bne	.L2935
+	bne	.L3054
 	bl	pm_flush
-	ldr	x0, [x21, #:lo12:.LANCHOR10]
+	ldr	x0, [x27, #:lo12:.LANCHOR10]
 	ldrh	w0, [x0, 130]
 	bl	ftl_free_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR102]
+	ldr	x0, [x19, #:lo12:.LANCHOR104]
 	mov	w1, -1
 	strh	w1, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2935:
-	ldr	x0, [x21, #:lo12:.LANCHOR10]
+.L3054:
+	ldr	x0, [x27, #:lo12:.LANCHOR10]
 	mov	w1, -1
 	strh	w1, [x0, 130]
-	b	.L2900
+	b	.L3009
 	.size	gc_recovery, .-gc_recovery
 	.section	.text.zftl_init,"ax",@progbits
 	.align	2
@@ -18407,233 +19587,236 @@ gc_recovery:
 	.type	zftl_init, %function
 zftl_init:
 	stp	x29, x30, [sp, -112]!
-	adrp	x1, .LANCHOR57
+	adrp	x1, .LANCHOR59
 	mov	w0, -1
 	add	x29, sp, 0
-	strb	w0, [x1, #:lo12:.LANCHOR57]
-	adrp	x1, .LANCHOR58
+	strb	w0, [x1, #:lo12:.LANCHOR59]
+	adrp	x1, .LANCHOR60
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR85
-	strb	wzr, [x1, #:lo12:.LANCHOR58]
-	adrp	x1, .LANCHOR126
+	adrp	x22, .LANCHOR87
+	strb	wzr, [x1, #:lo12:.LANCHOR60]
+	adrp	x1, .LANCHOR128
 	stp	x19, x20, [sp, 16]
-	adrp	x21, .LANCHOR78
-	strb	w0, [x1, #:lo12:.LANCHOR126]
-	adrp	x1, .LANCHOR127
+	adrp	x21, .LANCHOR80
+	strb	w0, [x1, #:lo12:.LANCHOR128]
+	adrp	x1, .LANCHOR129
 	stp	x23, x24, [sp, 48]
-	adrp	x20, .LANCHOR203
-	strb	wzr, [x1, #:lo12:.LANCHOR127]
-	adrp	x1, .LANCHOR174
+	adrp	x20, .LANCHOR208
+	strb	wzr, [x1, #:lo12:.LANCHOR129]
+	adrp	x1, .LANCHOR177
 	stp	x25, x26, [sp, 64]
 	adrp	x23, .LANCHOR6
-	strb	w0, [x1, #:lo12:.LANCHOR174]
-	adrp	x0, .LANCHOR121
+	strb	w0, [x1, #:lo12:.LANCHOR177]
+	adrp	x0, .LANCHOR123
 	mov	w1, -1
 	stp	x27, x28, [sp, 80]
-	strb	wzr, [x0, #:lo12:.LANCHOR121]
-	adrp	x0, .LANCHOR206
-	str	w1, [x0, #:lo12:.LANCHOR206]
-	adrp	x1, .LC196
-	adrp	x0, .LC97
-	add	x1, x1, :lo12:.LC196
-	add	x0, x0, :lo12:.LC97
+	strb	wzr, [x0, #:lo12:.LANCHOR123]
+	adrp	x0, .LANCHOR211
+	str	w1, [x0, #:lo12:.LANCHOR211]
+	adrp	x1, .LC202
+	adrp	x0, .LC99
+	add	x1, x1, :lo12:.LC202
+	add	x0, x0, :lo12:.LC99
 	bl	printf
-	adrp	x1, .LANCHOR31
-	add	x1, x1, :lo12:.LANCHOR31
-	adrp	x0, .LANCHOR71
-	adrp	x2, .LANCHOR123
-	adrp	x3, .LANCHOR77
-	adrp	x4, .LANCHOR67
+	adrp	x1, .LANCHOR32
+	add	x1, x1, :lo12:.LANCHOR32
+	adrp	x0, .LANCHOR73
+	adrp	x2, .LANCHOR125
+	adrp	x3, .LANCHOR79
+	adrp	x4, .LANCHOR69
 	ldrb	w5, [x1, 12]
-	strb	w5, [x0, #:lo12:.LANCHOR71]
+	strb	w5, [x0, #:lo12:.LANCHOR73]
 	ldrb	w0, [x1, 9]
-	strb	w0, [x2, #:lo12:.LANCHOR123]
+	strb	w0, [x2, #:lo12:.LANCHOR125]
 	ldrh	w2, [x1, 10]
-	strh	w2, [x3, #:lo12:.LANCHOR77]
+	strh	w2, [x3, #:lo12:.LANCHOR79]
 	adrp	x3, .LANCHOR18
 	ldrh	w7, [x1, 14]
 	ubfiz	w10, w0, 9, 7
 	ldrb	w6, [x3, #:lo12:.LANCHOR18]
-	adrp	x3, .LANCHOR104
+	adrp	x3, .LANCHOR106
 	sdiv	w8, w2, w5
 	strh	w7, [x23, #:lo12:.LANCHOR6]
-	strb	w6, [x3, #:lo12:.LANCHOR104]
+	strb	w6, [x3, #:lo12:.LANCHOR106]
 	ldrb	w3, [x1, 13]
 	adrp	x1, .LANCHOR2
-	strb	w3, [x4, #:lo12:.LANCHOR67]
+	strb	w3, [x4, #:lo12:.LANCHOR69]
 	ldrh	w4, [x1, #:lo12:.LANCHOR2]
-	adrp	x1, .LANCHOR103
-	strh	w8, [x22, #:lo12:.LANCHOR85]
+	adrp	x1, .LANCHOR105
+	strh	w8, [x22, #:lo12:.LANCHOR87]
 	mul	w6, w6, w3
-	strh	w4, [x1, #:lo12:.LANCHOR103]
-	strh	w10, [x20, #:lo12:.LANCHOR203]
+	strh	w4, [x1, #:lo12:.LANCHOR105]
+	strh	w10, [x20, #:lo12:.LANCHOR208]
 	mov	w3, 1
 	and	w6, w6, 255
 	mov	w1, 0
-	strb	w6, [x21, #:lo12:.LANCHOR78]
-.L2952:
+	strb	w6, [x21, #:lo12:.LANCHOR80]
+.L3088:
 	cmp	w4, w3
-	bcs	.L2953
+	bcs	.L3089
 	mul	w2, w0, w2
-	adrp	x3, .LANCHOR66
+	adrp	x3, .LANCHOR68
 	sub	w1, w1, #1
 	mov	w4, 0
-	strh	w1, [x3, #:lo12:.LANCHOR66]
+	strh	w1, [x3, #:lo12:.LANCHOR68]
 	mov	w1, 1
 	mul	w3, w2, w7
 	lsr	w11, w3, 21
-.L2954:
+.L3090:
 	cmp	w11, w1
-	bcs	.L2955
+	bcs	.L3091
 	mov	w1, 57344
 	sub	w4, w4, #1
 	movk	w1, 0x1c, lsl 16
 	mul	w3, w3, w6
-	adrp	x28, .LANCHOR120
+	adrp	x28, .LANCHOR122
 	sub	w11, w10, #1
 	mul	w1, w6, w1
-	adrp	x24, .LANCHOR187
+	adrp	x24, .LANCHOR194
 	mul	w8, w8, w6
-	adrp	x27, .LANCHOR208
+	adrp	x27, .LANCHOR213
 	mul	w2, w2, w6
-	adrp	x26, .LANCHOR146
+	adrp	x26, .LANCHOR149
 	lsl	w1, w1, w4
-	adrp	x4, .LANCHOR59
+	adrp	x4, .LANCHOR61
 	sub	w2, w2, #1
-	adrp	x25, .LANCHOR89
-	str	w1, [x4, #:lo12:.LANCHOR59]
-	adrp	x4, .LANCHOR207
-	str	w3, [x4, #:lo12:.LANCHOR207]
+	adrp	x25, .LANCHOR91
+	str	w1, [x4, #:lo12:.LANCHOR61]
+	adrp	x4, .LANCHOR212
+	str	w3, [x4, #:lo12:.LANCHOR212]
 	add	w3, w1, 24576
-	str	w3, [x27, #:lo12:.LANCHOR208]
+	str	w3, [x27, #:lo12:.LANCHOR213]
 	udiv	w0, w3, w0
 	udiv	w3, w3, w2
-	adrp	x2, .LANCHOR117
-	str	w0, [x28, #:lo12:.LANCHOR120]
+	adrp	x2, .LANCHOR119
+	str	w0, [x28, #:lo12:.LANCHOR122]
 	add	w0, w11, w0, lsl 2
 	add	w3, w3, 8
 	udiv	w0, w0, w10
-	strh	w0, [x24, #:lo12:.LANCHOR187]
+	strh	w0, [x24, #:lo12:.LANCHOR194]
 	ubfiz	w0, w0, 4, 16
 	sdiv	w0, w0, w8
-	adrp	x8, .LANCHOR93
+	adrp	x8, .LANCHOR95
 	str	x8, [x29, 104]
-	strh	w3, [x8, #:lo12:.LANCHOR93]
-	strh	w0, [x26, #:lo12:.LANCHOR146]
+	strh	w3, [x8, #:lo12:.LANCHOR95]
+	strh	w0, [x26, #:lo12:.LANCHOR149]
 	add	w0, w7, w7, lsl 1
 	asr	w0, w0, 2
-	strh	w0, [x2, #:lo12:.LANCHOR117]
+	strh	w0, [x2, #:lo12:.LANCHOR119]
 	lsr	w0, w7, 4
-	strh	w0, [x25, #:lo12:.LANCHOR89]
+	strh	w0, [x25, #:lo12:.LANCHOR91]
 	cmp	w0, 79
-	bhi	.L2956
+	bhi	.L3092
 	mov	w0, 80
-	strh	w0, [x25, #:lo12:.LANCHOR89]
-.L2956:
-	adrp	x7, .LANCHOR118
+	strh	w0, [x25, #:lo12:.LANCHOR91]
+.L3092:
+	adrp	x7, .LANCHOR120
 	mov	w0, 2000
-	adrp	x3, .LANCHOR116
-	adrp	x6, .LANCHOR145
-	strh	w0, [x7, #:lo12:.LANCHOR118]
+	adrp	x6, .LANCHOR118
+	adrp	x8, .LANCHOR148
+	strh	w0, [x7, #:lo12:.LANCHOR120]
 	mov	w0, 50
-	adrp	x2, .LANCHOR144
-	strh	w0, [x3, #:lo12:.LANCHOR116]
+	adrp	x2, .LANCHOR147
+	strh	w0, [x6, #:lo12:.LANCHOR118]
 	mov	w0, 256
-	strh	w0, [x6, #:lo12:.LANCHOR145]
+	strh	w0, [x8, #:lo12:.LANCHOR148]
 	mov	w0, 48
-	strh	w0, [x2, #:lo12:.LANCHOR144]
+	strh	w0, [x2, #:lo12:.LANCHOR147]
 	adrp	x0, .LANCHOR8
-	mov	w8, 32
+	mov	w3, 32
 	cmp	w5, 2
-	strh	w8, [x0, #:lo12:.LANCHOR8]
-	beq	.L2957
-	adrp	x5, .LANCHOR75
-	ldrb	w5, [x5, #:lo12:.LANCHOR75]
-	cbz	w5, .L2958
-.L2957:
-	mov	w5, 150
-	strh	w5, [x3, #:lo12:.LANCHOR116]
-	mov	w3, 64
-	strh	w3, [x2, #:lo12:.LANCHOR144]
+	mov	x11, x6
+	strh	w3, [x0, #:lo12:.LANCHOR8]
+	mov	x5, x7
+	mov	x10, x2
+	beq	.L3093
+	adrp	x12, .LANCHOR77
+	ldrb	w12, [x12, #:lo12:.LANCHOR77]
+	cbz	w12, .L3094
+.L3093:
+	mov	w2, 150
+	strh	w2, [x11, #:lo12:.LANCHOR118]
+	mov	w2, 64
+	strh	w2, [x10, #:lo12:.LANCHOR147]
 	mov	w2, 12
 	strh	w2, [x0, #:lo12:.LANCHOR8]
 	adrp	x2, .LANCHOR0
 	ldrb	w2, [x2, #:lo12:.LANCHOR0]
-	cbnz	w2, .L2958
+	cbnz	w2, .L3096
 	mov	w2, 4
 	strh	w2, [x0, #:lo12:.LANCHOR8]
 	mov	w0, 600
-	strh	w0, [x7, #:lo12:.LANCHOR118]
+	strh	w0, [x5, #:lo12:.LANCHOR120]
 	mov	w0, 128
-	strh	w0, [x6, #:lo12:.LANCHOR145]
-.L2958:
+	strh	w0, [x8, #:lo12:.LANCHOR148]
+.L3096:
 	adrp	x19, .LANCHOR14
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2960
+	tbz	x0, 12, .L3098
 	str	x4, [x29, 96]
-	adrp	x0, .LC197
-	add	x0, x0, :lo12:.LC197
+	adrp	x0, .LC203
+	add	x0, x0, :lo12:.LC203
 	bl	printf
 	ldr	x4, [x29, 96]
-.L2960:
+.L3098:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2961
-	ldr	w1, [x4, #:lo12:.LANCHOR207]
-	adrp	x0, .LC198
-	add	x0, x0, :lo12:.LC198
+	tbz	x0, 12, .L3099
+	ldr	w1, [x4, #:lo12:.LANCHOR212]
+	adrp	x0, .LC204
+	add	x0, x0, :lo12:.LC204
 	bl	printf
-.L2961:
+.L3099:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2962
-	ldr	w1, [x28, #:lo12:.LANCHOR120]
-	adrp	x0, .LC199
-	add	x0, x0, :lo12:.LC199
+	tbz	x0, 12, .L3100
+	ldr	w1, [x28, #:lo12:.LANCHOR122]
+	adrp	x0, .LC205
+	add	x0, x0, :lo12:.LC205
 	bl	printf
-.L2962:
+.L3100:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2963
-	ldr	w1, [x27, #:lo12:.LANCHOR208]
-	adrp	x0, .LC200
-	add	x0, x0, :lo12:.LC200
+	tbz	x0, 12, .L3101
+	ldr	w1, [x27, #:lo12:.LANCHOR213]
+	adrp	x0, .LC206
+	add	x0, x0, :lo12:.LC206
 	bl	printf
-.L2963:
+.L3101:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2964
-	ldrh	w1, [x24, #:lo12:.LANCHOR187]
-	adrp	x0, .LC201
-	add	x0, x0, :lo12:.LC201
+	tbz	x0, 12, .L3102
+	ldrh	w1, [x24, #:lo12:.LANCHOR194]
+	adrp	x0, .LC207
+	add	x0, x0, :lo12:.LC207
 	bl	printf
-.L2964:
+.L3102:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2965
-	ldrh	w1, [x20, #:lo12:.LANCHOR203]
-	adrp	x0, .LC202
-	add	x0, x0, :lo12:.LC202
+	tbz	x0, 12, .L3103
+	ldrh	w1, [x20, #:lo12:.LANCHOR208]
+	adrp	x0, .LC208
+	add	x0, x0, :lo12:.LC208
 	bl	printf
-.L2965:
+.L3103:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2966
-	ldrh	w1, [x26, #:lo12:.LANCHOR146]
-	adrp	x0, .LC203
-	add	x0, x0, :lo12:.LC203
+	tbz	x0, 12, .L3104
+	ldrh	w1, [x26, #:lo12:.LANCHOR149]
+	adrp	x0, .LC209
+	add	x0, x0, :lo12:.LC209
 	bl	printf
-.L2966:
+.L3104:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2967
-	ldrh	w1, [x25, #:lo12:.LANCHOR89]
-	adrp	x0, .LC204
-	add	x0, x0, :lo12:.LC204
+	tbz	x0, 12, .L3105
+	ldrh	w1, [x25, #:lo12:.LANCHOR91]
+	adrp	x0, .LC210
+	add	x0, x0, :lo12:.LC210
 	bl	printf
-.L2967:
+.L3105:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2968
+	tbz	x0, 12, .L3106
 	ldr	x0, [x29, 104]
-	ldrh	w1, [x0, #:lo12:.LANCHOR93]
-	adrp	x0, .LC205
-	add	x0, x0, :lo12:.LC205
+	ldrh	w1, [x0, #:lo12:.LANCHOR95]
+	adrp	x0, .LC211
+	add	x0, x0, :lo12:.LC211
 	bl	printf
-.L2968:
-	bl	buf_init
+.L3106:
+	bl	zbuf_init
 	adrp	x25, .LANCHOR10
 	ldrh	w1, [x23, #:lo12:.LANCHOR6]
 	mov	w0, 6
@@ -18641,19 +19824,19 @@ zftl_init:
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR4
 	str	x0, [x1, #:lo12:.LANCHOR4]
-	ldrb	w1, [x21, #:lo12:.LANCHOR78]
-	ldrh	w0, [x22, #:lo12:.LANCHOR85]
+	ldrb	w1, [x21, #:lo12:.LANCHOR80]
+	ldrh	w0, [x22, #:lo12:.LANCHOR87]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR110
+	adrp	x1, .LANCHOR112
 	adrp	x2, ftl_ext_info_data_buffer
 	add	x2, x2, :lo12:ftl_ext_info_data_buffer
-	str	x0, [x1, #:lo12:.LANCHOR110]
-	adrp	x0, .LANCHOR109
-	ldrh	w1, [x22, #:lo12:.LANCHOR85]
-	str	x2, [x0, #:lo12:.LANCHOR109]
-	ldrb	w0, [x21, #:lo12:.LANCHOR78]
+	str	x0, [x1, #:lo12:.LANCHOR112]
+	adrp	x0, .LANCHOR111
+	ldrh	w1, [x22, #:lo12:.LANCHOR87]
+	str	x2, [x0, #:lo12:.LANCHOR111]
+	ldrb	w0, [x21, #:lo12:.LANCHOR80]
 	mul	w1, w1, w0
 	lsl	w0, w1, 1
 	adrp	x1, .LANCHOR9
@@ -18664,15 +19847,15 @@ zftl_init:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	add	x1, x2, x1, sxtw 2
 	str	x1, [x25, #:lo12:.LANCHOR10]
-	tbz	x0, 12, .L2969
-	adrp	x0, .LC206
-	add	x0, x0, :lo12:.LC206
+	tbz	x0, 12, .L3107
+	adrp	x0, .LC212
+	add	x0, x0, :lo12:.LC212
 	bl	printf
-.L2969:
-	ldrh	w0, [x22, #:lo12:.LANCHOR85]
-	ldrb	w21, [x21, #:lo12:.LANCHOR78]
+.L3107:
+	ldrh	w0, [x22, #:lo12:.LANCHOR87]
+	ldrb	w21, [x21, #:lo12:.LANCHOR80]
 	ldrh	w1, [x23, #:lo12:.LANCHOR6]
-	ldrh	w22, [x24, #:lo12:.LANCHOR187]
+	ldrh	w22, [x24, #:lo12:.LANCHOR194]
 	mul	w21, w0, w21
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	add	w21, w1, w21, lsl 2
@@ -18681,39 +19864,48 @@ zftl_init:
 	add	w22, w1, w22, lsl 2
 	add	w21, w21, 632
 	add	w22, w22, 704
-	tbz	x0, 12, .L2970
-	ldrh	w3, [x20, #:lo12:.LANCHOR203]
-	adrp	x0, .LC207
+	tbz	x0, 12, .L3108
+	ldrh	w3, [x20, #:lo12:.LANCHOR208]
+	adrp	x0, .LC213
 	mov	w2, w22
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC207
+	add	x0, x0, :lo12:.LC213
 	bl	printf
-.L2970:
-	ldrh	w0, [x20, #:lo12:.LANCHOR203]
+.L3108:
+	ldrh	w0, [x20, #:lo12:.LANCHOR208]
 	cmp	w21, w0
-	bhi	.L2971
+	bhi	.L3109
 	cmp	w22, w0
-	bls	.L2972
-.L2971:
-.L3015:
-	b	.L3015
-.L2953:
+	bls	.L3110
+.L3109:
+.L3156:
+	b	.L3156
+.L3089:
 	add	w1, w1, 1
 	lsl	w3, w3, 1
 	and	w1, w1, 65535
-	b	.L2952
-.L2955:
+	b	.L3088
+.L3091:
 	add	w4, w4, 1
 	lsl	w1, w1, 1
 	and	w4, w4, 65535
-	b	.L2954
-.L2972:
+	b	.L3090
+.L3094:
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbz	w0, .L3096
+	mov	w0, 1200
+	strh	w3, [x6, #:lo12:.LANCHOR118]
+	strh	w0, [x7, #:lo12:.LANCHOR120]
+	strh	w3, [x2, #:lo12:.LANCHOR147]
+	b	.L3096
+.L3110:
 	bl	sblk_init
 	bl	ftl_info_blk_init
 	cmn	w0, #1
-	beq	.L2951
+	beq	.L3087
 	bl	ftl_ext_info_init
-	adrp	x19, .LANCHOR102
+	adrp	x19, .LANCHOR104
 	bl	gc_init
 	mov	w0, 1
 	bl	pm_init
@@ -18726,7 +19918,7 @@ zftl_init:
 	add	x1, x0, 16
 	add	x0, x0, 48
 	bl	ftl_open_sblk_recovery
-	ldr	x1, [x19, #:lo12:.LANCHOR102]
+	ldr	x1, [x19, #:lo12:.LANCHOR104]
 	ldr	w0, [x1, 8]
 	add	w0, w0, 16
 	str	w0, [x1, 8]
@@ -18743,20 +19935,20 @@ zftl_init:
 	bl	pm_flush
 	mov	w0, 1
 	bl	ftl_total_vpn_update
-	adrp	x0, .LANCHOR182
-	ldrb	w0, [x0, #:lo12:.LANCHOR182]
-	cbz	w0, .L2974
-	ldr	x1, [x19, #:lo12:.LANCHOR102]
+	adrp	x0, .LANCHOR185
+	ldrb	w0, [x0, #:lo12:.LANCHOR185]
+	cbz	w0, .L3112
+	ldr	x1, [x19, #:lo12:.LANCHOR104]
 	ldr	w0, [x1, 68]
 	add	w0, w0, 1
 	str	w0, [x1, 68]
-.L2974:
+.L3112:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
 	bl	print_ftl_debug_info
 	mov	w0, 0
-.L2951:
+.L3087:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -18774,14 +19966,14 @@ rk_ftl_init:
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	bl	nand_flash_init
-	cbnz	w0, .L3019
+	cbnz	w0, .L3160
 	bl	zftl_init
-.L3019:
+.L3160:
 	mov	w19, w0
 	bl	idb_init
 	mov	w1, w19
-	adrp	x0, .LC208
-	add	x0, x0, :lo12:.LC208
+	adrp	x0, .LC214
+	add	x0, x0, :lo12:.LC214
 	bl	printf
 	mov	w0, w19
 	ldr	x19, [sp, 16]
@@ -18795,12 +19987,12 @@ rk_ftl_init:
 gc_update_l2p_map_new:
 	stp	x29, x30, [sp, -176]!
 	adrp	x0, .LANCHOR10
-	adrp	x1, .LANCHOR77
+	adrp	x1, .LANCHOR79
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	ldr	x21, [x0, #:lo12:.LANCHOR10]
 	stp	x25, x26, [sp, 64]
-	ldrh	w26, [x1, #:lo12:.LANCHOR77]
+	ldrh	w26, [x1, #:lo12:.LANCHOR79]
 	add	x1, x21, 80
 	stp	x23, x24, [sp, 48]
 	adrp	x24, .LANCHOR14
@@ -18810,12 +20002,12 @@ gc_update_l2p_map_new:
 	ldrb	w1, [x1, 9]
 	mul	w26, w26, w1
 	ldr	w1, [x24, #:lo12:.LANCHOR14]
-	tbz	x1, 8, .L3022
+	tbz	x1, 8, .L3163
 	ldrh	w1, [x21, 80]
-	adrp	x0, .LC209
-	add	x0, x0, :lo12:.LC209
+	adrp	x0, .LC215
+	add	x0, x0, :lo12:.LC215
 	bl	printf
-.L3022:
+.L3163:
 	adrp	x23, .LANCHOR9
 	ldrh	w1, [x21, 80]
 	sub	w2, w26, #1
@@ -18823,15 +20015,15 @@ gc_update_l2p_map_new:
 	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	mov	w25, 0
 	strh	w2, [x0, x1, lsl 1]
-	adrp	x0, .LANCHOR123
-	add	x0, x0, :lo12:.LANCHOR123
+	adrp	x0, .LANCHOR125
+	add	x0, x0, :lo12:.LANCHOR125
 	str	x0, [x29, 104]
-.L3023:
+.L3164:
 	mov	w28, w22
 	cmp	w26, w22
-	bhi	.L3033
+	bhi	.L3174
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3034
+	tbz	x0, 8, .L3175
 	ldr	x0, [x29, 128]
 	mov	w3, w25
 	ldr	x1, [x23, #:lo12:.LANCHOR9]
@@ -18839,22 +20031,22 @@ gc_update_l2p_map_new:
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldrh	w2, [x1, x2, lsl 1]
 	ldrh	w1, [x0, 80]
-	adrp	x0, .LC212
-	add	x0, x0, :lo12:.LC212
+	adrp	x0, .LC218
+	add	x0, x0, :lo12:.LC218
 	bl	printf
-.L3034:
+.L3175:
 	ldrh	w1, [x21, 80]
 	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, x1, lsl 1]
 	cmp	w25, w0
-	beq	.L3035
-	adrp	x1, .LANCHOR209
+	beq	.L3176
+	adrp	x1, .LANCHOR214
 	adrp	x0, .LC0
-	mov	w2, 616
-	add	x1, x1, :lo12:.LANCHOR209
+	mov	w2, 748
+	add	x1, x1, :lo12:.LANCHOR214
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3035:
+.L3176:
 	ldrh	w1, [x21, 80]
 	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	strh	w25, [x0, x1, lsl 1]
@@ -18867,112 +20059,115 @@ gc_update_l2p_map_new:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L3033:
-	adrp	x27, .LANCHOR152
+.L3174:
+	adrp	x27, .LANCHOR155
 	lsl	x19, x22, 2
-	ldr	x0, [x27, #:lo12:.LANCHOR152]
+	ldr	x0, [x27, #:lo12:.LANCHOR155]
 	ldr	w2, [x0, x19]
 	cmn	w2, #1
-	beq	.L3024
-	adrp	x0, .LANCHOR123
-	ldrb	w20, [x0, #:lo12:.LANCHOR123]
+	beq	.L3165
+	adrp	x0, .LANCHOR125
+	ldrb	w20, [x0, #:lo12:.LANCHOR125]
 	lsl	w20, w20, 7
 	udiv	w20, w2, w20
 	and	w0, w20, 65535
 	str	w0, [x29, 156]
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3025
+	tbz	x0, 8, .L3166
 	ldr	w1, [x29, 156]
-	adrp	x0, .LC210
+	adrp	x0, .LC216
 	mov	w3, w22
-	add	x0, x0, :lo12:.LC210
+	add	x0, x0, :lo12:.LC216
 	bl	printf
-.L3025:
+.L3166:
 	sub	w28, w26, w28
 	add	x28, x28, x22
 	lsl	x0, x28, 2
 	str	x0, [x29, 144]
-	adrp	x0, .LC211
-	add	x0, x0, :lo12:.LC211
+	adrp	x0, .LC217
+	add	x0, x0, :lo12:.LC217
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR66
-	add	x0, x0, :lo12:.LANCHOR66
+	adrp	x0, .LANCHOR68
+	add	x0, x0, :lo12:.LANCHOR68
 	str	x0, [x29, 112]
-.L3026:
+.L3167:
 	ldr	x0, [x29, 144]
 	cmp	x0, x19
-	bne	.L3032
-.L3024:
+	bne	.L3173
+.L3165:
 	add	x22, x22, 1
-	b	.L3023
-.L3032:
-	ldr	x0, [x27, #:lo12:.LANCHOR152]
+	b	.L3164
+.L3173:
+	ldr	x0, [x27, #:lo12:.LANCHOR155]
 	ldr	w20, [x0, x19]
 	cmn	w20, #1
-	beq	.L3027
+	beq	.L3168
 	ldr	x0, [x29, 104]
 	ldr	w1, [x29, 156]
 	ldrb	w0, [x0]
 	lsl	w0, w0, 7
 	udiv	w0, w20, w0
 	cmp	w1, w0, uxth
-	bne	.L3027
-	adrp	x0, .LANCHOR153
-	ldr	x0, [x0, #:lo12:.LANCHOR153]
+	bne	.L3168
+	adrp	x0, .LANCHOR156
+	ldr	x0, [x0, #:lo12:.LANCHOR156]
 	ldr	w28, [x0, x19]
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 172]
 	cmn	w0, #1
-	bne	.L3028
+	bne	.L3169
 	mov	w2, 0
 	add	x1, x29, 172
 	mov	w0, w20
 	bl	pm_log2phys
-.L3028:
+.L3169:
 	ldr	w3, [x29, 172]
 	cmp	w28, w3
-	bne	.L3029
-	adrp	x0, .LANCHOR154
+	bne	.L3170
+	adrp	x0, .LANCHOR157
 	mov	w2, 1
 	add	x1, x29, 168
 	add	w25, w25, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR154]
+	ldr	x0, [x0, #:lo12:.LANCHOR157]
 	ldr	w0, [x0, x19]
 	str	w0, [x29, 168]
 	mov	w0, w20
 	bl	pm_log2phys
 	ldr	x0, [x29, 112]
-	ldrh	w1, [x0]
-	mov	w0, 21
-	sub	w2, w0, w1
+	ldrh	w2, [x0]
+	adrp	x0, .LANCHOR31
+	ldrb	w1, [x0, #:lo12:.LANCHOR31]
+	mov	w0, 24
+	lsr	w28, w28, w2
+	sub	w0, w0, w1
+	sub	w1, w0, w2
 	mov	w0, 1
-	lsr	w28, w28, w1
-	lsl	w0, w0, w2
+	lsl	w0, w0, w1
 	sub	w0, w0, #1
 	and	w28, w0, w28
-	adrp	x0, .LANCHOR67
-	ldrb	w0, [x0, #:lo12:.LANCHOR67]
+	adrp	x0, .LANCHOR69
+	ldrb	w0, [x0, #:lo12:.LANCHOR69]
 	udiv	w0, w28, w0
-.L3055:
+.L3196:
 	bl	ftl_vpn_decrement
-	ldr	x0, [x27, #:lo12:.LANCHOR152]
+	ldr	x0, [x27, #:lo12:.LANCHOR155]
 	mov	w1, -1
 	str	w1, [x0, x19]
-.L3027:
+.L3168:
 	add	x19, x19, 4
-	b	.L3026
-.L3029:
+	b	.L3167
+.L3170:
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3031
+	tbz	x0, 8, .L3172
 	ldr	x0, [x29, 120]
 	mov	w2, w28
 	mov	w1, w20
 	bl	printf
-.L3031:
+.L3172:
 	ldr	x0, [x29, 136]
 	ldrh	w0, [x0]
-	b	.L3055
+	b	.L3196
 	.size	gc_update_l2p_map_new, .-gc_update_l2p_map_new
 	.section	.text.gc_scan_src_blk_one_page,"ax",@progbits
 	.align	2
@@ -18985,140 +20180,147 @@ gc_scan_src_blk_one_page:
 	mov	w5, 65535
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR63
-	add	x1, x19, :lo12:.LANCHOR63
+	adrp	x19, .LANCHOR64
+	add	x1, x19, :lo12:.LANCHOR64
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	adrp	x20, .LANCHOR78
+	adrp	x22, .LANCHOR80
 	stp	x25, x26, [sp, 64]
-	ldrb	w6, [x20, #:lo12:.LANCHOR78]
+	ldrb	w6, [x22, #:lo12:.LANCHOR80]
 	ldrb	w0, [x1, 4]
 	add	x2, x1, x0, sxtw 1
-	ldrh	w21, [x2, 40]
+	ldrh	w23, [x2, 40]
 	ldrh	w2, [x1, 2]
-.L3057:
-	cmp	w21, w5
-	beq	.L3059
-	cbz	w4, .L3060
-	add	x1, x19, :lo12:.LANCHOR63
+.L3198:
+	cmp	w23, w5
+	beq	.L3200
+	cbz	w4, .L3201
+	add	x1, x19, :lo12:.LANCHOR64
 	strh	w2, [x1, 2]
-.L3060:
-	cbz	w3, .L3061
-	add	x1, x19, :lo12:.LANCHOR63
+.L3201:
+	cbz	w3, .L3202
+	add	x1, x19, :lo12:.LANCHOR64
 	strb	w0, [x1, 4]
-.L3061:
+.L3202:
 	mov	w0, 1
-	adrp	x22, .LANCHOR103
+	adrp	x24, .LANCHOR105
 	bl	buf_alloc
-	adrp	x23, .LANCHOR71
-	mov	x24, x0
-	add	x22, x22, :lo12:.LANCHOR103
-	add	x23, x23, :lo12:.LANCHOR71
+	adrp	x25, .LANCHOR73
+	mov	x21, x0
+	add	x24, x24, :lo12:.LANCHOR105
+	add	x25, x25, :lo12:.LANCHOR73
 	mov	w26, 1
-.L3062:
-	add	x25, x19, :lo12:.LANCHOR63
-	ldrb	w1, [x25, 6]
+.L3203:
+	add	x20, x19, :lo12:.LANCHOR64
+	ldrb	w1, [x20, 6]
 	cmp	w26, w1
-	ble	.L3070
-	mov	x0, x24
-	bl	buf_free
-	ldrb	w0, [x25, 4]
-	ldrb	w1, [x20, #:lo12:.LANCHOR78]
+	ble	.L3212
+	mov	x0, x21
+	bl	zbuf_free
+	ldrb	w0, [x20, 4]
+	ldrb	w1, [x22, #:lo12:.LANCHOR80]
 	add	w0, w0, 1
 	and	w0, w0, 255
-	strb	w0, [x25, 4]
+	strb	w0, [x20, 4]
 	cmp	w1, w0
-	bne	.L3056
-	ldrh	w0, [x25, 2]
-	strb	wzr, [x25, 4]
+	bne	.L3197
+	ldrh	w0, [x20, 2]
+	strb	wzr, [x20, 4]
 	add	w0, w0, 1
-	strh	w0, [x25, 2]
-.L3056:
+	strh	w0, [x20, 2]
+.L3197:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L3059:
+.L3200:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	cmp	w0, w6
-	bne	.L3058
+	bne	.L3199
 	add	w2, w2, 1
 	mov	w0, 0
 	and	w2, w2, 65535
 	mov	w4, 1
-.L3058:
+.L3199:
 	add	x3, x1, x0, sxtw 1
-	ldrh	w21, [x3, 40]
+	ldrh	w23, [x3, 40]
 	mov	w3, 1
-	b	.L3057
-.L3070:
-	ldrh	w0, [x22]
+	b	.L3198
+.L3212:
+	ldrh	w0, [x24]
+	cmp	w1, 2
+	mul	w0, w0, w23
+	beq	.L3204
 	cmp	w1, 3
-	mul	w2, w0, w21
-	ldrh	w0, [x25, 2]
-	bne	.L3063
-	add	w0, w0, w2
-	orr	w0, w0, w26, lsl 24
-.L3079:
-	str	w0, [x24, 40]
+	bne	.L3205
+	adrp	x1, .LANCHOR35
+	ldrb	w1, [x1, #:lo12:.LANCHOR35]
+	cbz	w1, .L3206
+.L3204:
+	add	x1, x19, :lo12:.LANCHOR64
+	add	w0, w26, w0
+	ldrh	w1, [x1, 2]
+	lsl	w1, w1, 1
+	sub	w1, w1, #1
+	add	w0, w1, w0
+	ldrb	w1, [x25]
+	orr	w0, w0, w1, lsl 24
+.L3224:
+	str	w0, [x21, 40]
 	mov	w1, 1
-	mov	x0, x24
+	mov	x0, x21
 	bl	sblk_read_page
-	ldr	w0, [x24, 52]
+	ldr	w0, [x21, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L3067
-	ldr	x0, [x24, 24]
-	ldr	w25, [x0, 4]
-	mov	w0, w25
+	beq	.L3209
+	ldr	x0, [x21, 24]
+	ldr	w20, [x0, 4]
+	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 92]
 	cmn	w0, #1
-	bne	.L3068
-	adrp	x0, .LANCHOR120
-	ldr	w0, [x0, #:lo12:.LANCHOR120]
-	cmp	w25, w0
-	bcs	.L3068
+	bne	.L3210
+	adrp	x0, .LANCHOR122
+	ldr	w0, [x0, #:lo12:.LANCHOR122]
+	cmp	w20, w0
+	bcs	.L3210
 	mov	w2, 0
 	add	x1, x29, 92
-	mov	w0, w25
+	mov	w0, w20
 	bl	pm_log2phys
-.L3068:
-	ldr	w2, [x24, 40]
+.L3210:
+	ldr	w2, [x21, 40]
 	ldr	w0, [x29, 92]
 	cmp	w2, w0
-	bne	.L3067
-	add	x1, x19, :lo12:.LANCHOR63
-	adrp	x4, .LANCHOR68
-	ldr	x4, [x4, #:lo12:.LANCHOR68]
+	bne	.L3209
+	add	x1, x19, :lo12:.LANCHOR64
+	adrp	x4, .LANCHOR70
+	ldr	x4, [x4, #:lo12:.LANCHOR70]
 	ldrh	w0, [x1, 24]
 	ubfiz	x3, x0, 2, 16
 	add	w0, w0, 1
 	str	w2, [x4, x3]
 	strh	w0, [x1, 24]
-.L3067:
-	add	x1, x19, :lo12:.LANCHOR63
+.L3209:
+	add	x1, x19, :lo12:.LANCHOR64
 	add	w26, w26, 1
 	ldrh	w0, [x1, 26]
 	add	w0, w0, 1
 	strh	w0, [x1, 26]
-	b	.L3062
-.L3063:
-	cmp	w1, 2
-	bne	.L3065
-	lsl	w0, w0, 1
-	sub	w1, w0, #1
-	add	w0, w26, w2
+	b	.L3203
+.L3206:
+	ldrh	w1, [x20, 2]
 	add	w0, w1, w0
-	ldrb	w1, [x23]
-	orr	w0, w0, w1, lsl 24
-	b	.L3079
-.L3065:
-	add	w0, w0, w2
-	b	.L3079
+	orr	w0, w0, w26, lsl 24
+	b	.L3224
+.L3205:
+	ldrh	w1, [x20, 2]
+	add	w0, w1, w0
+	b	.L3224
 	.size	gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page
 	.section	.text.gc_scan_src_blk,"ax",@progbits
 	.align	2
@@ -19129,50 +20331,50 @@ gc_scan_src_blk:
 	mov	w0, 65535
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR63
+	adrp	x19, .LANCHOR64
 	stp	x21, x22, [sp, 32]
-	ldrh	w1, [x19, #:lo12:.LANCHOR63]
+	ldrh	w1, [x19, #:lo12:.LANCHOR64]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w1, w0
-	bne	.L3081
-	adrp	x1, .LANCHOR210
+	bne	.L3226
+	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
-	mov	w2, 1051
-	add	x1, x1, :lo12:.LANCHOR210
+	mov	w2, 1235
+	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3081:
-	ldrh	w1, [x19, #:lo12:.LANCHOR63]
+.L3226:
+	ldrh	w1, [x19, #:lo12:.LANCHOR64]
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L3101
+	beq	.L3246
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3083
+	tbz	x0, 8, .L3228
 	adrp	x2, .LANCHOR9
 	ubfiz	x0, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC213
-	add	x0, x0, :lo12:.LC213
+	adrp	x0, .LC219
+	add	x0, x0, :lo12:.LC219
 	bl	printf
-.L3083:
-	ldrh	w0, [x19, #:lo12:.LANCHOR63]
-	add	x14, x19, :lo12:.LANCHOR63
+.L3228:
+	ldrh	w0, [x19, #:lo12:.LANCHOR64]
+	add	x14, x19, :lo12:.LANCHOR64
 	add	x1, x14, 40
 	bl	ftl_get_blk_list_in_sblk
 	and	w1, w0, 255
 	strb	w1, [x14, 5]
-	cbnz	w1, .L3084
+	cbnz	w1, .L3229
 	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR63]
-.L3101:
+	strh	w0, [x19, #:lo12:.LANCHOR64]
+.L3246:
 	mov	w0, 0
-	b	.L3080
-.L3084:
+	b	.L3225
+.L3229:
 	adrp	x4, .LANCHOR7
-	ldrh	w3, [x19, #:lo12:.LANCHOR63]
+	ldrh	w3, [x19, #:lo12:.LANCHOR64]
 	mov	x22, x4
 	ldr	x1, [x4, #:lo12:.LANCHOR7]
 	mov	x2, x3
@@ -19180,218 +20382,226 @@ gc_scan_src_blk:
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 32
-	beq	.L3085
+	beq	.L3230
 	cmp	w1, 224
-	beq	.L3085
-	cbz	w1, .L3086
+	beq	.L3230
+	cbz	w1, .L3231
 	adrp	x1, .LANCHOR10
 	ldr	x1, [x1, #:lo12:.LANCHOR10]
 	ldrh	w3, [x1, 16]
 	cmp	w3, w2
-	beq	.L3085
+	beq	.L3230
 	ldrh	w3, [x1, 48]
 	cmp	w3, w2
-	beq	.L3085
+	beq	.L3230
 	ldrh	w1, [x1, 80]
 	cmp	w1, w2
-	bne	.L3115
-.L3085:
-	add	x0, x19, :lo12:.LANCHOR63
+	bne	.L3263
+.L3230:
+	add	x0, x19, :lo12:.LANCHOR64
 	mov	w1, -1
-	strh	w1, [x19, #:lo12:.LANCHOR63]
+	strh	w1, [x19, #:lo12:.LANCHOR64]
 	strh	wzr, [x0, 24]
-	b	.L3101
-.L3086:
+	b	.L3246
+.L3231:
 	adrp	x0, .LANCHOR9
 	mov	x20, x0
 	ldr	x1, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x1, x3, lsl 1]
-	cbz	w1, .L3088
-	adrp	x1, .LANCHOR210
+	cbz	w1, .L3233
+	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
-	mov	w2, 1071
-	add	x1, x1, :lo12:.LANCHOR210
+	mov	w2, 1255
+	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3088:
-	ldrh	w1, [x19, #:lo12:.LANCHOR63]
+.L3233:
+	ldrh	w1, [x19, #:lo12:.LANCHOR64]
 	ldr	x0, [x20, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x1, lsl 1]
-	b	.L3085
-.L3115:
+	b	.L3230
+.L3263:
 	and	w0, w0, 255
 	sub	w0, w0, #1
 	add	x0, x14, x0, sxtw 1
 	ldrh	w21, [x0, 40]
 	mov	w0, 65535
 	cmp	w21, w0
-	bne	.L3089
-	adrp	x1, .LANCHOR210
+	bne	.L3234
+	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
-	mov	w2, 1079
-	add	x1, x1, :lo12:.LANCHOR210
+	mov	w2, 1263
+	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3089:
-	adrp	x1, .LANCHOR103
+.L3234:
+	adrp	x1, .LANCHOR105
 	ldr	x3, [x22, #:lo12:.LANCHOR7]
-	adrp	x2, .LANCHOR85
-	adrp	x23, .LANCHOR77
-	ldrh	w20, [x1, #:lo12:.LANCHOR103]
+	adrp	x2, .LANCHOR87
 	mov	x24, x2
-	ldrh	w1, [x19, #:lo12:.LANCHOR63]
-	ldrh	w0, [x2, #:lo12:.LANCHOR85]
+	ldrh	w20, [x1, #:lo12:.LANCHOR105]
+	ldrh	w1, [x19, #:lo12:.LANCHOR64]
+	ldrh	w0, [x2, #:lo12:.LANCHOR87]
 	add	x1, x3, x1, lsl 2
 	sub	w0, w0, #1
-	and	w0, w0, 65535
 	mul	w20, w20, w21
+	and	w0, w0, 65535
+	adrp	x21, .LANCHOR79
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 160
-	bne	.L3102
-	adrp	x1, .LANCHOR71
-	ldrb	w21, [x1, #:lo12:.LANCHOR71]
-	cmp	w21, 2
-	orr	w20, w20, w21, lsl 24
-	beq	.L3091
-	and	w21, w21, 65535
-.L3090:
-	add	x22, x19, :lo12:.LANCHOR63
+	bne	.L3247
+	adrp	x1, .LANCHOR73
+	ldrb	w1, [x1, #:lo12:.LANCHOR73]
+	and	w23, w1, 65535
+	cmp	w1, 2
+	orr	w20, w20, w1, lsl 24
+	bne	.L3236
+	ldrh	w0, [x21, #:lo12:.LANCHOR79]
+	sub	w0, w0, #1
+	and	w0, w0, 65535
+.L3236:
+	adrp	x1, .LANCHOR35
+	ldrb	w1, [x1, #:lo12:.LANCHOR35]
+	cbz	w1, .L3235
+	ldrh	w0, [x21, #:lo12:.LANCHOR79]
+	sub	w0, w0, #1
+	and	w0, w0, 65535
+.L3235:
+	add	x22, x19, :lo12:.LANCHOR64
 	orr	w20, w0, w20
 	mov	w0, 1
-	strb	w21, [x22, 6]
+	strb	w23, [x22, 6]
 	strh	wzr, [x22, 2]
 	strb	wzr, [x22, 4]
 	strh	wzr, [x22, 26]
 	strh	wzr, [x22, 28]
 	bl	buf_alloc
 	str	w20, [x0, 40]
+	adrp	x20, .LANCHOR80
 	mov	x25, x0
 	mov	w1, 1
-	adrp	x20, .LANCHOR68
 	bl	sblk_read_page
-	ldrh	w2, [x23, #:lo12:.LANCHOR77]
-	adrp	x23, .LANCHOR78
+	ldrh	w2, [x21, #:lo12:.LANCHOR79]
+	adrp	x21, .LANCHOR70
+	ldrb	w0, [x20, #:lo12:.LANCHOR80]
 	mov	w1, 255
-	ldrb	w0, [x23, #:lo12:.LANCHOR78]
 	mul	w2, w2, w0
-	ldr	x0, [x20, #:lo12:.LANCHOR68]
+	ldr	x0, [x21, #:lo12:.LANCHOR70]
 	lsl	w2, w2, 2
 	bl	ftl_memset
 	strh	wzr, [x22, 24]
 	ldr	w0, [x25, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3092
-.L3117:
+	bne	.L3237
+.L3265:
 	mov	x0, x25
-	bl	buf_free
+	bl	zbuf_free
 	mov	w0, -1
-.L3080:
+.L3225:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L3091:
-	ldrh	w0, [x23, #:lo12:.LANCHOR77]
-	sub	w0, w0, #1
-	and	w0, w0, 65535
-	b	.L3090
-.L3102:
-	mov	w21, 1
-	b	.L3090
-.L3092:
+.L3247:
+	mov	w23, 1
+	b	.L3235
+.L3237:
 	ldr	x0, [x25, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L3093
-	mov	w2, 1112
-	adrp	x1, .LANCHOR210
+	beq	.L3238
+	mov	w2, 1298
+	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR210
+	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3117
-.L3093:
-	ldrb	w0, [x23, #:lo12:.LANCHOR78]
-	adrp	x22, .LANCHOR66
-	ldrh	w1, [x24, #:lo12:.LANCHOR85]
-	adrp	x23, .LANCHOR67
+	b	.L3265
+.L3238:
+	ldrh	w0, [x24, #:lo12:.LANCHOR87]
+	adrp	x22, .LANCHOR68
+	ldrb	w20, [x20, #:lo12:.LANCHOR80]
+	add	x22, x22, :lo12:.LANCHOR68
 	ldr	x24, [x25, 8]
-	add	x22, x22, :lo12:.LANCHOR66
-	add	x23, x23, :lo12:.LANCHOR67
 	mov	x26, 0
-	mul	w0, w0, w1
-	mul	w21, w21, w0
-	and	w21, w21, 65535
-.L3094:
-	cmp	w21, w26
-	bgt	.L3099
+	mul	w20, w20, w0
+	mul	w20, w23, w20
+	adrp	x23, .LANCHOR31
+	add	x23, x23, :lo12:.LANCHOR31
+	and	w20, w20, 65535
+.L3239:
+	cmp	w20, w26
+	bgt	.L3244
 	mov	x0, x25
-	bl	buf_free
+	bl	zbuf_free
 	adrp	x0, .LANCHOR9
-	ldrh	w1, [x19, #:lo12:.LANCHOR63]
-	add	x3, x19, :lo12:.LANCHOR63
+	ldrh	w1, [x19, #:lo12:.LANCHOR64]
+	add	x3, x19, :lo12:.LANCHOR64
 	mov	x20, x0
 	ldr	x4, [x0, #:lo12:.LANCHOR9]
 	ubfiz	x2, x1, 1, 16
 	ldrh	w3, [x3, 24]
 	ldrh	w2, [x4, x2]
 	cmp	w2, w3
-	beq	.L3100
-	adrp	x0, .LC214
-	add	x0, x0, :lo12:.LC214
+	beq	.L3245
+	adrp	x0, .LC220
+	add	x0, x0, :lo12:.LC220
 	bl	printf
-.L3100:
-	add	x0, x19, :lo12:.LANCHOR63
-	ldrh	w2, [x19, #:lo12:.LANCHOR63]
+.L3245:
+	add	x0, x19, :lo12:.LANCHOR64
+	ldrh	w2, [x19, #:lo12:.LANCHOR64]
 	ldr	x1, [x20, #:lo12:.LANCHOR9]
 	ldrh	w3, [x0, 24]
 	strh	w3, [x1, x2, lsl 1]
 	strh	wzr, [x0, 28]
 	ldrh	w0, [x0, 24]
-	b	.L3080
-.L3099:
+	b	.L3225
+.L3244:
 	ldr	w0, [x24, x26, lsl 2]
 	cmn	w0, #1
-	beq	.L3096
+	beq	.L3241
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 92]
 	cmn	w0, #1
-	bne	.L3097
+	bne	.L3242
 	ldr	w0, [x24, x26, lsl 2]
 	mov	w2, 0
 	add	x1, x29, 92
 	bl	pm_log2phys
-.L3097:
-	ldrh	w1, [x22]
-	mov	w0, 21
+.L3242:
+	ldrb	w0, [x23]
+	mov	w1, 24
+	ldrh	w2, [x22]
+	sub	w0, w1, w0
 	ldr	w3, [x29, 92]
-	sub	w2, w0, w1
+	sub	w1, w0, w2
 	mov	w0, 1
-	lsl	w0, w0, w2
+	lsl	w0, w0, w1
+	adrp	x1, .LANCHOR69
 	sub	w0, w0, #1
-	lsr	w1, w3, w1
-	and	w0, w0, w1
-	ldrb	w1, [x23]
-	ldrh	w2, [x19, #:lo12:.LANCHOR63]
+	lsr	w2, w3, w2
+	ldrb	w1, [x1, #:lo12:.LANCHOR69]
+	and	w0, w0, w2
+	ldrh	w2, [x19, #:lo12:.LANCHOR64]
 	udiv	w0, w0, w1
-	add	x1, x19, :lo12:.LANCHOR63
+	add	x1, x19, :lo12:.LANCHOR64
 	cmp	w0, w2
-	bne	.L3096
+	bne	.L3241
 	ldrh	w0, [x1, 24]
-	ldr	x4, [x20, #:lo12:.LANCHOR68]
+	ldr	x4, [x21, #:lo12:.LANCHOR70]
 	ubfiz	x2, x0, 2, 16
 	add	w0, w0, 1
 	str	w3, [x4, x2]
 	strh	w0, [x1, 24]
-.L3096:
+.L3241:
 	add	x26, x26, 1
-	b	.L3094
+	b	.L3239
 	.size	gc_scan_src_blk, .-gc_scan_src_blk
 	.section	.text.gc_scan_static_data,"ax",@progbits
 	.align	2
@@ -19407,13 +20617,13 @@ gc_scan_static_data:
 	ldr	w1, [x0, 544]
 	str	x23, [sp, 48]
 	cmn	w1, #1
-	beq	.L3119
-	adrp	x21, .LANCHOR211
+	beq	.L3267
+	adrp	x21, .LANCHOR216
 	adrp	x22, .LC0
-	add	x21, x21, :lo12:.LANCHOR211
+	add	x21, x21, :lo12:.LANCHOR216
 	add	x22, x22, :lo12:.LC0
 	mov	w20, 11
-.L3127:
+.L3275:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w2, 0
 	add	x1, x29, 76
@@ -19421,7 +20631,7 @@ gc_scan_static_data:
 	bl	pm_log2phys
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L3120
+	beq	.L3268
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 76]
@@ -19431,45 +20641,48 @@ gc_scan_static_data:
 	bl	sblk_read_page
 	ldr	w0, [x23, 52]
 	cmp	w0, 256
-	bne	.L3121
-	adrp	x0, .LANCHOR66
+	bne	.L3269
+	adrp	x0, .LANCHOR68
 	ldr	w2, [x29, 76]
+	ldrh	w3, [x0, #:lo12:.LANCHOR68]
+	adrp	x0, .LANCHOR31
+	ldrb	w1, [x0, #:lo12:.LANCHOR31]
+	mov	w0, 24
+	lsr	w2, w2, w3
+	sub	w0, w0, w1
 	mov	w1, 1
-	ldrh	w3, [x0, #:lo12:.LANCHOR66]
-	mov	w0, 21
 	sub	w0, w0, w3
-	lsr	w2, w2, w3
 	lsl	w0, w1, w0
 	sub	w0, w0, #1
 	and	w0, w0, w2
-	adrp	x2, .LANCHOR67
-	ldrb	w3, [x2, #:lo12:.LANCHOR67]
+	adrp	x2, .LANCHOR69
+	ldrb	w3, [x2, #:lo12:.LANCHOR69]
 	mov	w2, 0
 	udiv	w0, w0, w3
 	bl	gc_add_sblk
-.L3121:
+.L3269:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldr	x1, [x23, 24]
 	ldr	w0, [x0, 544]
 	ldr	w1, [x1, 4]
 	cmp	w1, w0
-	beq	.L3122
-	mov	w2, 1551
+	beq	.L3270
+	mov	w2, 1737
 	mov	x1, x21
 	mov	x0, x22
 	bl	printf
-.L3122:
+.L3270:
 	mov	x0, x23
-	bl	buf_free
-.L3120:
+	bl	zbuf_free
+.L3268:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
-	adrp	x2, .LANCHOR120
-	ldr	w2, [x2, #:lo12:.LANCHOR120]
+	adrp	x2, .LANCHOR122
+	ldr	w2, [x2, #:lo12:.LANCHOR122]
 	ldr	w1, [x0, 544]
 	add	w1, w1, 1
 	str	w1, [x0, 544]
 	cmp	w1, w2
-	bcc	.L3123
+	bcc	.L3271
 	mov	w1, -1
 	str	w1, [x0, 544]
 	ldr	w1, [x0, 548]
@@ -19480,317 +20693,332 @@ gc_scan_static_data:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-.L3118:
+.L3266:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L3123:
+.L3271:
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	bne	.L3118
+	bne	.L3266
 	sub	w20, w20, #1
 	ands	w20, w20, 65535
-	bne	.L3127
-	b	.L3118
-.L3119:
+	bne	.L3275
+	b	.L3266
+.L3267:
 	ldr	w1, [x0, 536]
-	adrp	x3, .LANCHOR102
+	adrp	x3, .LANCHOR104
 	ldr	w2, [x0, 12]
 	add	w1, w1, 12959744
 	add	w1, w1, 256
 	cmp	w2, w1
-	bhi	.L3129
-	ldr	x4, [x3, #:lo12:.LANCHOR102]
+	bhi	.L3277
+	ldr	x4, [x3, #:lo12:.LANCHOR104]
 	mov	w5, 5000
 	ldr	w1, [x0, 540]
 	add	w1, w1, w5
 	ldr	w4, [x4, 44]
 	cmp	w4, w1
-	bls	.L3118
-.L3129:
-	ldr	x1, [x3, #:lo12:.LANCHOR102]
+	bls	.L3266
+.L3277:
+	ldr	x1, [x3, #:lo12:.LANCHOR104]
 	ldr	w1, [x1, 44]
 	str	w1, [x0, 540]
 	str	w2, [x0, 536]
 	str	wzr, [x0, 544]
-	b	.L3118
+	b	.L3266
 	.size	gc_scan_static_data, .-gc_scan_static_data
 	.section	.text.ftl_sblk_dump,"ax",@progbits
 	.align	2
 	.global	ftl_sblk_dump
 	.type	ftl_sblk_dump, %function
 ftl_sblk_dump:
-	sub	sp, sp, #272
+	sub	sp, sp, #288
 	and	x0, x0, 65535
 	stp	x29, x30, [sp, 48]
 	add	x29, sp, 48
 	stp	x23, x24, [sp, 96]
 	adrp	x24, .LANCHOR7
 	lsl	x23, x0, 2
-	stp	x0, x1, [x29, 144]
-	stp	x21, x22, [sp, 80]
-	mov	x21, x0
-	ldr	x0, [x24, #:lo12:.LANCHOR7]
 	stp	x19, x20, [sp, 64]
+	str	x0, [x29, 144]
+	mov	x20, x0
+	ldr	x0, [x24, #:lo12:.LANCHOR7]
+	str	x1, [x29, 160]
 	add	x1, x0, x23
+	stp	x21, x22, [sp, 80]
 	stp	x25, x26, [sp, 112]
-	stp	x27, x28, [sp, 128]
 	ldr	w5, [x0, x23]
 	ldrb	w2, [x1, 2]
-	mov	w1, w21
+	mov	w1, w20
 	ldrh	w4, [x0, x23]
-	adrp	x0, .LC215
+	adrp	x0, .LC221
+	stp	x27, x28, [sp, 128]
 	ubfx	x5, x5, 11, 8
-	add	x0, x0, :lo12:.LC215
 	ubfx	x3, x2, 3, 2
 	and	w4, w4, 2047
 	ubfx	x2, x2, 5, 3
+	add	x0, x0, :lo12:.LC221
 	bl	printf
 	mov	w0, 65535
-	cmp	w21, w0
-	beq	.L3156
+	cmp	w20, w0
+	beq	.L3305
 	adrp	x0, .LANCHOR6
 	ldrh	w0, [x0, #:lo12:.LANCHOR6]
-	cmp	w0, w21
-	bls	.L3156
+	cmp	w0, w20
+	bls	.L3305
 	ldr	x0, [x24, #:lo12:.LANCHOR7]
 	add	x0, x0, x23
 	ldrb	w0, [x0, 2]
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L3157
-	adrp	x0, .LANCHOR71
-	ldrb	w25, [x0, #:lo12:.LANCHOR71]
-.L3137:
-	add	x28, x29, 224
-	adrp	x19, .LANCHOR85
-	mov	w0, w21
-	mov	w27, 0
-	mov	w20, 0
-	strh	w21, [x28, -32]!
+	bne	.L3306
+	adrp	x0, .LANCHOR73
+	ldrb	w25, [x0, #:lo12:.LANCHOR73]
+.L3285:
+	add	x28, x29, 240
+	adrp	x21, .LANCHOR87
+	mov	w0, w20
+	mov	w19, 0
+	strh	w20, [x28, -32]!
 	add	x1, x28, 16
 	bl	ftl_get_blk_list_in_sblk
-	ldrh	w2, [x19, #:lo12:.LANCHOR85]
+	ldrh	w2, [x21, #:lo12:.LANCHOR87]
 	and	w1, w0, 255
-	strb	w1, [x29, 201]
+	strb	w1, [x29, 217]
 	and	w4, w0, 255
-	strb	wzr, [x29, 197]
+	strb	wzr, [x29, 213]
 	mov	w3, w25
-	strh	wzr, [x29, 194]
-	adrp	x0, .LC216
+	strh	wzr, [x29, 210]
+	adrp	x0, .LC222
 	mul	w1, w1, w2
-	strh	wzr, [x29, 202]
-	strh	w1, [x29, 198]
-	add	x0, x0, :lo12:.LC216
+	strh	wzr, [x29, 218]
+	strh	w1, [x29, 214]
+	add	x0, x0, :lo12:.LC222
 	ldr	x1, [x24, #:lo12:.LANCHOR7]
 	add	x1, x1, x23
 	ldrb	w2, [x1, 2]
-	mov	w1, w21
+	mov	w1, w20
 	ubfx	x2, x2, 5, 3
 	bl	printf
 	mov	w0, 1
 	bl	buf_alloc
-	str	x19, [x29, 136]
+	str	x21, [x29, 136]
 	mov	x26, x0
-	stp	wzr, wzr, [x29, 164]
-	adrp	x0, .LANCHOR103
-	add	x0, x0, :lo12:.LANCHOR103
+	stp	wzr, wzr, [x29, 168]
+	adrp	x0, .LANCHOR105
+	str	wzr, [x29, 176]
+	add	x0, x0, :lo12:.LANCHOR105
 	str	x0, [x29, 112]
-.L3138:
+.L3286:
 	ldr	x0, [x29, 136]
-	ldrh	w0, [x0, #:lo12:.LANCHOR85]
-	cmp	w0, w20
-	bls	.L3153
-	lsl	w0, w20, 1
-	str	wzr, [x29, 172]
+	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	cmp	w0, w19
+	bls	.L3302
+	lsl	w0, w19, 1
+	mov	w22, 0
+	sub	w1, w0, #1
+	add	w0, w0, w19
 	sub	w0, w0, #1
-	str	w0, [x29, 160]
-	adrp	x0, .LC162
-	add	x0, x0, :lo12:.LC162
+	stp	w0, w1, [x29, 152]
+	adrp	x0, .LC163
+	add	x0, x0, :lo12:.LC163
 	str	x0, [x29, 120]
-	b	.L3154
-.L3157:
+	b	.L3303
+.L3306:
 	mov	w25, 1
-	b	.L3137
-.L3150:
+	b	.L3285
+.L3299:
 	ldr	x0, [x29, 128]
-	ldrh	w10, [x28, x0]
+	ldrh	w11, [x28, x0]
 	mov	w0, 65535
-	cmp	w10, w0
-	beq	.L3139
+	cmp	w11, w0
+	beq	.L3287
 	ldr	x0, [x29, 112]
 	cmp	w25, 3
-	ldrh	w19, [x0]
-	mul	w19, w19, w10
-	bne	.L3140
-	add	w19, w20, w19
-	orr	w19, w19, w22, lsl 24
-.L3141:
-	str	w19, [x26, 40]
+	ldrh	w8, [x0]
+	mul	w8, w8, w11
+	add	w0, w21, w8
+	bne	.L3288
+	adrp	x1, .LANCHOR35
+	ldrb	w1, [x1, #:lo12:.LANCHOR35]
+	cbz	w1, .L3289
+	adrp	x1, .LANCHOR73
+	ldrb	w8, [x1, #:lo12:.LANCHOR73]
+	ldr	w1, [x29, 152]
+.L3315:
+	add	w0, w0, w1
+	orr	w27, w0, w8, lsl 24
+	b	.L3290
+.L3289:
+	add	w8, w19, w8
+	orr	w27, w8, w21, lsl 24
+.L3290:
+	str	w27, [x26, 40]
 	mov	w1, 1
-	str	w10, [x29, 104]
+	str	w11, [x29, 100]
 	mov	x0, x26
 	bl	sblk_read_page
 	ldr	x1, [x26, 24]
-	mov	w3, w19
+	mov	w3, w27
 	ldr	x0, [x26, 8]
-	ldr	w11, [x26, 52]
-	ldr	w10, [x29, 104]
+	ldr	w12, [x26, 52]
+	ldr	w11, [x29, 100]
 	ldr	w2, [x1, 12]
-	mov	w4, w11
+	mov	w4, w12
 	str	w2, [sp, 32]
-	str	w11, [x29, 108]
+	str	w12, [x29, 104]
 	ldr	w2, [x1, 8]
 	str	w2, [sp, 24]
 	ldr	w2, [x1, 4]
 	str	w2, [sp, 16]
-	mov	w2, w20
+	mov	w2, w19
 	ldr	w1, [x1]
 	str	w1, [sp, 8]
 	ldr	w1, [x0, 12]
 	str	w1, [sp]
-	mov	w1, w10
+	mov	w1, w11
 	ldp	w5, w6, [x0]
 	ldr	w7, [x0, 8]
 	ldr	x0, [x29, 120]
 	bl	printf
-	ldr	w11, [x29, 108]
+	ldr	w12, [x29, 104]
 	mov	w1, 32
-	ldr	w0, [x29, 164]
-	cmp	w11, 512
-	ccmn	w11, #1, 4, ne
+	ldr	w0, [x29, 168]
+	cmp	w12, 512
+	ccmn	w12, #1, 4, ne
 	csinc	w0, w0, wzr, ne
-	str	w0, [x29, 164]
+	str	w0, [x29, 168]
 	ldr	x0, [x24, #:lo12:.LANCHOR7]
 	add	x0, x0, x23
 	ldrb	w0, [x0, 2]
 	and	w0, w0, 224
 	cmp	w0, 224
 	ccmp	w0, w1, 4, ne
-	beq	.L3139
+	beq	.L3287
 	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	bl	lpa_hash_get_ppa
-	str	w0, [x29, 188]
+	str	w0, [x29, 204]
 	cmn	w0, #1
-	bne	.L3144
+	bne	.L3293
 	ldr	x0, [x26, 24]
 	mov	w2, 0
-	add	x1, x29, 188
+	add	x1, x29, 204
 	ldr	w0, [x0, 4]
 	bl	pm_log2phys
-.L3144:
-	ldr	w0, [x29, 188]
-	cmp	w19, w0
-	bne	.L3145
-	ldr	w0, [x29, 168]
-	mov	w1, w19
+.L3293:
+	ldr	w0, [x29, 204]
+	cmp	w27, w0
+	bne	.L3294
+	ldr	w0, [x29, 172]
+	mov	w1, w27
 	add	w0, w0, 1
-	str	w0, [x29, 168]
+	str	w0, [x29, 172]
 	ldr	x0, [x26, 24]
-	ldr	w3, [x29, 168]
+	ldr	w3, [x29, 172]
 	ldr	w2, [x0, 4]
-	adrp	x0, .LC217
-	add	x0, x0, :lo12:.LC217
+	adrp	x0, .LC223
+	add	x0, x0, :lo12:.LC223
 	bl	printf
-.L3145:
-	ldr	x0, [x29, 152]
-	cbz	x0, .L3147
-	ubfiz	x19, x27, 2, 32
-	ldr	w2, [x0, x19]
+.L3294:
+	ldr	x0, [x29, 160]
+	cbz	x0, .L3296
+	ldr	x0, [x29, 176]
+	ubfiz	x3, x0, 2, 32
+	ldr	x0, [x29, 160]
+	ldr	w2, [x0, x3]
 	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	cmp	w0, w2
-	beq	.L3148
+	beq	.L3297
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3148
-	adrp	x0, .LC218
-	mov	w1, w27
-	add	x0, x0, :lo12:.LC218
+	tbz	x0, 12, .L3297
+	ldr	w1, [x29, 176]
+	adrp	x0, .LC224
+	str	x3, [x29, 104]
+	add	x0, x0, :lo12:.LC224
 	bl	printf
-.L3148:
+	ldr	x3, [x29, 104]
+.L3297:
 	ldr	x1, [x26, 24]
-	ldr	x0, [x29, 152]
+	ldr	x0, [x29, 160]
 	ldr	w1, [x1, 4]
-	ldr	w0, [x0, x19]
+	ldr	w0, [x0, x3]
 	cmp	w1, w0
-	beq	.L3147
+	beq	.L3296
 	cmn	w0, #1
-	beq	.L3147
-	adrp	x1, .LANCHOR212
+	beq	.L3296
+	adrp	x1, .LANCHOR217
 	adrp	x0, .LC0
-	mov	w2, 1312
-	add	x1, x1, :lo12:.LANCHOR212
+	mov	w2, 1383
+	add	x1, x1, :lo12:.LANCHOR217
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3147:
-	add	w27, w27, 1
-.L3139:
+.L3296:
+	ldr	w0, [x29, 176]
+	add	w0, w0, 1
+	str	w0, [x29, 176]
+.L3287:
+	add	w21, w21, 1
+	and	w21, w21, 65535
+.L3301:
+	cmp	w25, w21
+	bcs	.L3299
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L3152:
-	cmp	w25, w22
-	bcs	.L3150
-	ldr	w0, [x29, 172]
-	add	w0, w0, 1
-	and	w0, w0, 65535
-	str	w0, [x29, 172]
-.L3154:
-	ldrb	w0, [x29, 201]
-	ldr	w1, [x29, 172]
-	cmp	w0, w1
-	bls	.L3151
-	ldrsw	x0, [x29, 172]
-	mov	w22, 1
+.L3303:
+	ldrb	w0, [x29, 217]
+	cmp	w0, w22
+	bls	.L3300
+	sxtw	x0, w22
+	mov	w21, 1
 	add	x0, x0, 8
 	lsl	x0, x0, 1
 	str	x0, [x29, 128]
-	b	.L3152
-.L3140:
+	b	.L3301
+.L3288:
 	cmp	w25, 2
-	bne	.L3142
-	ldr	w0, [x29, 160]
-	add	w19, w19, w0
-	adrp	x0, .LANCHOR71
-	add	w19, w19, w22
-	ldrb	w0, [x0, #:lo12:.LANCHOR71]
-	orr	w19, w19, w0, lsl 24
-	b	.L3141
-.L3142:
-	add	w19, w20, w19
-	b	.L3141
-.L3151:
-	add	w20, w20, 1
-	and	w20, w20, 65535
-	b	.L3138
-.L3153:
+	bne	.L3291
+	adrp	x1, .LANCHOR73
+	ldrb	w8, [x1, #:lo12:.LANCHOR73]
+	ldr	w1, [x29, 156]
+	b	.L3315
+.L3291:
+	add	w27, w19, w8
+	b	.L3290
+.L3300:
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L3286
+.L3302:
 	mov	x0, x26
-	bl	buf_free
+	bl	zbuf_free
 	adrp	x0, .LANCHOR9
 	ldr	x1, [x29, 144]
-	ldr	w3, [x29, 168]
+	ldr	w3, [x29, 172]
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w2, [x0, x1, lsl 1]
-	mov	w1, w21
-	adrp	x0, .LC219
-	add	x0, x0, :lo12:.LC219
+	mov	w1, w20
+	adrp	x0, .LC225
+	add	x0, x0, :lo12:.LC225
 	bl	printf
-	ldr	w0, [x29, 164]
-.L3135:
+	ldr	w0, [x29, 168]
+.L3283:
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
 	ldp	x23, x24, [sp, 96]
 	ldp	x25, x26, [sp, 112]
 	ldp	x27, x28, [sp, 128]
 	ldp	x29, x30, [sp, 48]
-	add	sp, sp, 272
+	add	sp, sp, 288
 	ret
-.L3156:
+.L3305:
 	mov	w0, 0
-	b	.L3135
+	b	.L3283
 	.size	ftl_sblk_dump, .-ftl_sblk_dump
 	.section	.text.zftl_read,"ax",@progbits
 	.align	2
@@ -19811,32 +21039,32 @@ zftl_read:
 	stp	x23, x24, [sp, 64]
 	mov	x22, x3
 	stp	x27, x28, [sp, 96]
-	tbz	x0, 12, .L3168
+	tbz	x0, 12, .L3317
 	mov	w3, w2
-	adrp	x0, .LC220
+	adrp	x0, .LC226
 	mov	w2, w1
-	add	x0, x0, :lo12:.LC220
+	add	x0, x0, :lo12:.LC226
 	mov	w1, w19
 	bl	printf
-.L3168:
-	cbnz	w19, .L3169
-	adrp	x0, .LANCHOR59
+.L3317:
+	cbnz	w19, .L3318
+	adrp	x0, .LANCHOR61
 	mov	w19, 24576
-	ldr	w0, [x0, #:lo12:.LANCHOR59]
-.L3170:
+	ldr	w0, [x0, #:lo12:.LANCHOR61]
+.L3319:
 	add	w1, w20, w25
 	cmp	w0, w1
-	bcc	.L3199
-	adrp	x1, .LANCHOR102
-	adrp	x26, .LANCHOR123
+	bcc	.L3348
+	adrp	x1, .LANCHOR104
+	adrp	x26, .LANCHOR125
 	add	w19, w19, w20
 	str	x1, [x29, 120]
-	ldr	x2, [x1, #:lo12:.LANCHOR102]
+	ldr	x2, [x1, #:lo12:.LANCHOR104]
 	str	x26, [x29, 168]
 	ldr	w0, [x2, 24]
 	add	w0, w0, w25
 	str	w0, [x2, 24]
-	ldrb	w0, [x26, #:lo12:.LANCHOR123]
+	ldrb	w0, [x26, #:lo12:.LANCHOR125]
 	add	w2, w25, w19
 	stp	w2, wzr, [x29, 160]
 	sub	w2, w2, #1
@@ -19846,12 +21074,12 @@ zftl_read:
 	sub	w24, w0, w27
 	str	w0, [x29, 156]
 	add	w24, w24, 1
-	adrp	x0, .LANCHOR127
-	add	x28, x0, :lo12:.LANCHOR127
-.L3172:
-	cbnz	w24, .L3197
+	adrp	x0, .LANCHOR129
+	add	x28, x0, :lo12:.LANCHOR129
+.L3321:
+	cbnz	w24, .L3346
 	ldr	w0, [x29, 164]
-.L3167:
+.L3316:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -19860,22 +21088,22 @@ zftl_read:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 208
 	ret
-.L3169:
+.L3318:
 	cmp	w19, 3
-	bhi	.L3199
+	bhi	.L3348
 	lsl	w19, w19, 13
 	mov	w0, 8192
-	b	.L3170
-.L3197:
+	b	.L3319
+.L3346:
 	ldr	x0, [x29, 168]
 	cmp	w20, w27
-	ldrb	w1, [x0, #:lo12:.LANCHOR123]
+	ldrb	w1, [x0, #:lo12:.LANCHOR125]
 	ldr	w0, [x29, 156]
 	and	w23, w1, 65535
 	ccmp	w20, w0, 4, ne
-	bne	.L3200
+	bne	.L3349
 	cmp	w20, w27
-	bne	.L3174
+	bne	.L3323
 	udiv	w3, w19, w1
 	and	w0, w25, 65535
 	msub	w1, w3, w1, w19
@@ -19884,18 +21112,18 @@ zftl_read:
 	and	w23, w23, 65535
 	cmp	w25, w23
 	csel	w23, w0, w23, cc
-.L3173:
-	adrp	x21, .LANCHOR50
-	add	x1, x21, :lo12:.LANCHOR50
+.L3322:
+	adrp	x21, .LANCHOR52
+	add	x1, x21, :lo12:.LANCHOR52
 	add	x1, x1, 2
 	mov	w0, 0
-.L3177:
+.L3326:
 	ldr	w2, [x1, 34]
 	cmp	w20, w2
-	bne	.L3175
+	bne	.L3324
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L3175
-	add	x1, x21, :lo12:.LANCHOR50
+	tbz	x2, 3, .L3324
+	add	x1, x21, :lo12:.LANCHOR52
 	ubfiz	x0, x0, 6, 32
 	add	x0, x1, x0
 	lsl	w2, w23, 9
@@ -19906,89 +21134,89 @@ zftl_read:
 	add	x22, x22, x23
 	add	x1, x1, x26
 	bl	ftl_memcpy
-.L3176:
+.L3325:
 	add	w20, w20, 1
 	sub	w24, w24, #1
-.L3183:
-	adrp	x0, .LANCHOR52
-	ldrb	w0, [x0, #:lo12:.LANCHOR52]
+.L3332:
+	adrp	x0, .LANCHOR54
+	ldrb	w0, [x0, #:lo12:.LANCHOR54]
 	cmp	w0, 2
-	bls	.L3184
-	cbnz	w24, .L3172
-.L3184:
-	adrp	x0, .LANCHOR127
-	ldrb	w1, [x0, #:lo12:.LANCHOR127]
-	cbz	w1, .L3172
-	adrp	x23, .LANCHOR126
-	add	x0, x21, :lo12:.LANCHOR50
-	ldrb	w2, [x23, #:lo12:.LANCHOR126]
+	bls	.L3333
+	cbnz	w24, .L3321
+.L3333:
+	adrp	x0, .LANCHOR129
+	ldrb	w1, [x0, #:lo12:.LANCHOR129]
+	cbz	w1, .L3321
+	adrp	x23, .LANCHOR128
+	add	x0, x21, :lo12:.LANCHOR52
+	ldrb	w2, [x23, #:lo12:.LANCHOR128]
 	add	x0, x0, x2, lsl 6
 	bl	sblk_read_page
-	adrp	x0, .LANCHOR213
-	add	x0, x0, :lo12:.LANCHOR213
+	adrp	x0, .LANCHOR218
+	add	x0, x0, :lo12:.LANCHOR218
 	str	x0, [x29, 136]
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	str	x0, [x29, 128]
-.L3186:
+.L3335:
 	ldrb	w0, [x28]
-	cbnz	w0, .L3196
+	cbnz	w0, .L3345
 	mov	w0, -1
 	strb	wzr, [x28]
-	strb	w0, [x23, #:lo12:.LANCHOR126]
-	b	.L3172
-.L3174:
+	strb	w0, [x23, #:lo12:.LANCHOR128]
+	b	.L3321
+.L3323:
 	ldr	w0, [x29, 160]
 	msub	w23, w1, w20, w0
 	and	w23, w23, 255
-.L3200:
+.L3349:
 	mov	w26, 0
-	b	.L3173
-.L3175:
+	b	.L3322
+.L3324:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 32
-	bne	.L3177
+	bne	.L3326
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L3178
+	bne	.L3327
 	mov	w2, 0
 	add	x1, x29, 188
 	mov	w0, w20
 	bl	pm_log2phys
-.L3178:
+.L3327:
 	ldr	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L3179
+	bne	.L3328
 	ldr	x0, [x29, 168]
 	mov	w23, 0
-	add	x26, x0, :lo12:.LANCHOR123
-.L3180:
+	add	x26, x0, :lo12:.LANCHOR125
+.L3329:
 	ldrb	w0, [x26]
 	cmp	w23, w0
-	bcs	.L3176
+	bcs	.L3325
 	madd	w0, w20, w0, w23
 	cmp	w19, w0
-	bhi	.L3181
+	bhi	.L3330
 	ldr	w1, [x29, 160]
 	cmp	w1, w0
-	bls	.L3181
+	bls	.L3330
 	mov	x0, x22
 	add	x22, x22, 512
 	mov	w2, 512
 	mov	w1, 0
 	bl	ftl_memset
-.L3181:
+.L3330:
 	add	w23, w23, 1
-	b	.L3180
-.L3179:
+	b	.L3329
+.L3328:
 	mov	w0, 0
 	bl	buf_alloc
-	cbz	x0, .L3183
+	cbz	x0, .L3332
 	ldr	x2, [x29, 120]
-	ldr	x4, [x2, #:lo12:.LANCHOR102]
+	ldr	x4, [x2, #:lo12:.LANCHOR104]
 	ldr	w2, [x4, 40]
 	add	w2, w2, 1
 	str	w2, [x4, 40]
@@ -20001,46 +21229,46 @@ zftl_read:
 	stp	w20, w2, [x0, 36]
 	str	w2, [x0, 44]
 	bl	zftl_add_read_buf
-	b	.L3176
-.L3196:
-	ldrb	w0, [x23, #:lo12:.LANCHOR126]
+	b	.L3325
+.L3345:
+	ldrb	w0, [x23, #:lo12:.LANCHOR128]
 	cmp	w0, 255
-	bne	.L3187
+	bne	.L3336
 	ldp	x0, x1, [x29, 128]
-	mov	w2, 1080
-	bl	printf
-.L3187:
-	ldrb	w26, [x23, #:lo12:.LANCHOR126]
-	add	x1, x21, :lo12:.LANCHOR50
-	ubfiz	x2, x26, 6, 8
-	lsl	x0, x26, 6
-	add	x2, x1, x2
-	str	x2, [x29, 144]
-	add	x2, x1, x0
-	ldrb	w0, [x1, x0]
-	strb	w0, [x23, #:lo12:.LANCHOR126]
-	ldr	w10, [x2, 52]
+	mov	w2, 1088
+	bl	printf
+.L3336:
+	ldrb	w26, [x23, #:lo12:.LANCHOR128]
+	add	x0, x21, :lo12:.LANCHOR52
+	ubfiz	x1, x26, 6, 8
+	lsl	x2, x26, 6
+	add	x1, x0, x1
+	str	x1, [x29, 144]
+	add	x1, x0, x2
+	ldrb	w0, [x0, x2]
+	strb	w0, [x23, #:lo12:.LANCHOR128]
+	ldr	w10, [x1, 52]
 	cmn	w10, #1
-	bne	.L3188
+	bne	.L3337
 	adrp	x0, .LANCHOR10
 	str	w10, [x29, 164]
 	ldr	x1, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x1, 552]
 	add	w0, w0, 1
 	str	w0, [x1, 552]
-.L3189:
-	add	x1, x21, :lo12:.LANCHOR50
+.L3338:
+	add	x1, x21, :lo12:.LANCHOR52
 	add	x1, x1, x26, lsl 6
 	ldr	x0, [x1, 24]
 	ldr	w3, [x1, 36]
 	ldr	w1, [x0, 4]
 	cmp	w1, w3
-	bne	.L3190
+	bne	.L3339
 	cmn	w10, #1
-	bne	.L3191
-.L3190:
+	bne	.L3340
+.L3339:
 	adrp	x1, .LANCHOR10
-	add	x11, x21, :lo12:.LANCHOR50
+	add	x11, x21, :lo12:.LANCHOR52
 	add	x11, x11, x26, lsl 6
 	str	w10, [x29, 152]
 	ldr	x2, [x1, #:lo12:.LANCHOR10]
@@ -20054,86 +21282,92 @@ zftl_read:
 	mov	w2, w10
 	ldp	w5, w6, [x0]
 	ldr	w7, [x0, 8]
-	adrp	x0, .LC222
+	adrp	x0, .LC228
 	ldr	w4, [x11, 40]
-	add	x0, x0, :lo12:.LC222
+	add	x0, x0, :lo12:.LC228
 	bl	printf
+	adrp	x0, .LANCHOR68
 	ldr	x11, [x29, 112]
-	adrp	x0, .LANCHOR66
-	ldrh	w3, [x0, #:lo12:.LANCHOR66]
-	mov	w0, 21
-	ldr	w1, [x11, 40]
-	sub	w2, w0, w3
+	ldrh	w2, [x0, #:lo12:.LANCHOR68]
+	adrp	x0, .LANCHOR31
+	ldrb	w1, [x0, #:lo12:.LANCHOR31]
+	mov	w0, 24
+	sub	w0, w0, w1
+	sub	w1, w0, w2
 	mov	w0, 1
-	lsl	w0, w0, w2
+	lsl	w0, w0, w1
+	ldr	w1, [x11, 40]
 	sub	w0, w0, #1
-	lsr	w1, w1, w3
+	lsr	w1, w1, w2
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR67
-	ldrb	w2, [x1, #:lo12:.LANCHOR67]
+	adrp	x1, .LANCHOR69
+	ldrb	w2, [x1, #:lo12:.LANCHOR69]
 	mov	x1, 0
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
 	ldr	w10, [x29, 152]
-.L3191:
-	add	x0, x21, :lo12:.LANCHOR50
+.L3340:
+	add	x0, x21, :lo12:.LANCHOR52
 	add	x0, x0, x26, lsl 6
 	ldr	x1, [x0, 24]
 	ldr	w0, [x0, 36]
 	ldr	w1, [x1, 4]
 	cmp	w1, w0
-	bne	.L3192
+	bne	.L3341
 	cmn	w10, #1
-	bne	.L3193
-.L3192:
+	bne	.L3342
+.L3341:
 	ldp	x0, x1, [x29, 128]
-	mov	w2, 1101
+	mov	w2, 1109
 	bl	printf
-.L3193:
-	add	x0, x21, :lo12:.LANCHOR50
-	ldr	x1, [x29, 168]
-	add	x0, x0, x26, lsl 6
-	ldrb	w1, [x1, #:lo12:.LANCHOR123]
-	ldrb	w2, [x0, 56]
-	cmp	w1, w2
-	bls	.L3194
-	ldrb	w1, [x0, 57]
+.L3342:
+	add	x0, x21, :lo12:.LANCHOR52
+	add	x8, x0, x26, lsl 6
+	ldr	x0, [x29, 168]
+	ldrb	w2, [x8, 56]
+	ldrb	w0, [x0, #:lo12:.LANCHOR125]
+	cmp	w0, w2
+	bls	.L3343
+	ldrb	w0, [x8, 57]
 	lsl	w2, w2, 9
-	ldp	x3, x0, [x0, 8]
-	ubfiz	x1, x1, 9, 8
-	add	x1, x3, x1
+	ldr	x1, [x8, 8]
+	ubfiz	x0, x0, 9, 8
+	add	x1, x1, x0
+	ldr	x0, [x8, 16]
 	bl	ftl_memcpy
-.L3195:
+.L3344:
 	ldr	x1, [x29, 144]
-	adrp	x0, .LANCHOR129
-	add	x0, x0, :lo12:.LANCHOR129
+	adrp	x0, .LANCHOR131
+	add	x0, x0, :lo12:.LANCHOR131
 	bl	buf_remove_buf
 	ldr	x0, [x29, 144]
-	bl	buf_free
+	bl	zbuf_free
 	ldrb	w0, [x28]
 	sub	w0, w0, #1
 	strb	w0, [x28]
-	b	.L3186
-.L3188:
+	b	.L3335
+.L3337:
 	cmp	w10, 256
-	bne	.L3189
-	adrp	x0, .LANCHOR66
-	ldr	w3, [x2, 40]
-	mov	w4, 21
+	bne	.L3338
+	adrp	x2, .LANCHOR31
+	adrp	x0, .LANCHOR68
+	mov	w4, 24
 	mov	w5, 1
-	ldrh	w0, [x0, #:lo12:.LANCHOR66]
-	ldr	w2, [x2, 36]
-	sub	w4, w4, w0
+	ldrb	w2, [x2, #:lo12:.LANCHOR31]
+	ldrh	w0, [x0, #:lo12:.LANCHOR68]
+	sub	w4, w4, w2
 	stp	w10, w5, [x29, 108]
-	lsr	w0, w3, w0
+	ldp	w2, w3, [x1, 36]
+	sub	w4, w4, w0
 	lsl	w4, w5, w4
 	sub	w4, w4, #1
+	lsr	w0, w3, w0
 	and	w4, w4, w0
-	adrp	x0, .LANCHOR67
-	ldrb	w0, [x0, #:lo12:.LANCHOR67]
+	adrp	x0, .LANCHOR69
+	ldrb	w0, [x0, #:lo12:.LANCHOR69]
 	udiv	w4, w4, w0
-	adrp	x0, .LC221
-	add	x0, x0, :lo12:.LC221
+	adrp	x0, .LC227
+	add	x0, x0, :lo12:.LC227
 	and	w1, w4, 65535
 	str	w4, [x29, 152]
 	bl	printf
@@ -20144,15 +21378,15 @@ zftl_read:
 	mov	w0, w4
 	bl	gc_add_sblk
 	ldr	w10, [x29, 108]
-	b	.L3189
-.L3194:
-	ldrb	w1, [x0, 2]
-	and	w1, w1, -9
-	strb	w1, [x0, 2]
-	b	.L3195
-.L3199:
+	b	.L3338
+.L3343:
+	ldrb	w0, [x8, 2]
+	and	w0, w0, -9
+	strb	w0, [x8, 2]
+	b	.L3344
+.L3348:
 	mov	w0, -1
-	b	.L3167
+	b	.L3316
 	.size	zftl_read, .-zftl_read
 	.section	.text.ftl_vendor_read,"ax",@progbits
 	.align	2
@@ -20226,135 +21460,155 @@ gc_check_data_one_wl:
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x19, x20, [sp, 32]
-	adrp	x19, .LANCHOR63
+	adrp	x20, .LANCHOR64
+	add	x19, x20, :lo12:.LANCHOR64
 	stp	x21, x22, [sp, 48]
-	add	x22, x19, :lo12:.LANCHOR63
-	adrp	x20, .LANCHOR10
 	stp	x23, x24, [sp, 64]
+	adrp	x22, .LANCHOR10
 	stp	x25, x26, [sp, 80]
-	ldr	x0, [x22, 8]
+	ldr	x0, [x19, 8]
 	stp	x27, x28, [sp, 96]
-	ldr	x21, [x20, #:lo12:.LANCHOR10]
-	cbnz	x0, .L3222
+	ldr	x23, [x22, #:lo12:.LANCHOR10]
+	cbnz	x0, .L3371
 	mov	w0, 1
 	bl	buf_alloc
-	str	x0, [x22, 8]
-.L3222:
-	add	x0, x19, :lo12:.LANCHOR63
-	ldr	x22, [x0, 8]
-	cbnz	x22, .L3223
-	adrp	x1, .LANCHOR214
+	str	x0, [x19, 8]
+.L3371:
+	add	x0, x20, :lo12:.LANCHOR64
+	ldr	x19, [x0, 8]
+	cbnz	x19, .L3372
+	adrp	x1, .LANCHOR219
 	adrp	x0, .LC0
-	mov	w2, 494
-	add	x1, x1, :lo12:.LANCHOR214
+	mov	w2, 612
+	add	x1, x1, :lo12:.LANCHOR219
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3223:
-	adrp	x2, .LANCHOR103
-	add	x28, x21, 96
-	add	x27, x21, 80
-	add	x2, x2, :lo12:.LANCHOR103
+.L3372:
+	adrp	x4, .LANCHOR105
+	add	x28, x23, 96
+	add	x27, x23, 80
+	add	x4, x4, :lo12:.LANCHOR105
 	mov	w26, 0
-.L3224:
+.L3373:
 	ldrb	w0, [x27, 9]
 	cmp	w26, w0
-	bge	.L3233
-	adrp	x25, .LANCHOR71
+	bge	.L3383
+	adrp	x25, .LANCHOR73
 	mov	w24, 1
-	add	x23, x19, :lo12:.LANCHOR63
-	add	x25, x25, :lo12:.LANCHOR71
-	b	.L3234
-.L3232:
+	add	x21, x20, :lo12:.LANCHOR64
+	add	x25, x25, :lo12:.LANCHOR73
+	b	.L3384
+.L3382:
 	ldrh	w0, [x28]
-	ldrh	w1, [x2]
-	ldrb	w3, [x25]
-	cmp	w3, 3
+	ldrh	w1, [x4]
+	ldrb	w2, [x25]
+	cmp	w2, 2
 	mul	w1, w0, w1
-	ldrh	w0, [x23, 16]
-	bne	.L3225
-	add	w0, w0, w1
-	orr	w0, w0, w24, lsl 24
-.L3246:
-	str	w0, [x22, 40]
+	beq	.L3374
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbz	w0, .L3375
+.L3374:
+	ldrh	w0, [x21, 16]
+	sub	w3, w0, #1
+	add	w0, w24, w1
+	add	w0, w3, w0
+	orr	w2, w0, w2, lsl 24
+	str	w2, [x19, 40]
+.L3376:
 	mov	w1, 1
-	str	x2, [x29, 104]
-	mov	x0, x22
+	str	x4, [x29, 104]
+	mov	x0, x19
 	bl	sblk_read_page
-	ldr	w0, [x22, 52]
-	adrp	x1, .LANCHOR152
-	ldr	x2, [x29, 104]
+	ldr	w0, [x19, 52]
+	adrp	x1, .LANCHOR155
+	ldr	x4, [x29, 104]
 	cmn	w0, #1
-	beq	.L3228
-	ldrh	w0, [x23, 22]
-	ldr	x4, [x1, #:lo12:.LANCHOR152]
-	ldr	x3, [x22, 24]
+	beq	.L3378
+	ldrh	w0, [x21, 22]
+	ldr	x3, [x1, #:lo12:.LANCHOR155]
+	ldr	x2, [x19, 24]
 	lsl	x0, x0, 2
-	ldr	w5, [x4, x0]
-	ldr	w4, [x3, 4]
-	cmp	w5, w4
-	bne	.L3228
-	adrp	x4, .LANCHOR153
-	ldr	x4, [x4, #:lo12:.LANCHOR153]
-	ldr	w4, [x4, x0]
-	ldr	w0, [x3, 8]
-	cmp	w4, w0
-	beq	.L3229
-.L3228:
-	add	x4, x1, :lo12:.LANCHOR152
-	ldrh	w0, [x23, 22]
-	ldr	x1, [x1, #:lo12:.LANCHOR152]
+	ldr	w5, [x3, x0]
+	ldr	w3, [x2, 4]
+	cmp	w5, w3
+	bne	.L3378
+	adrp	x3, .LANCHOR156
+	ldr	x3, [x3, #:lo12:.LANCHOR156]
+	ldr	w3, [x3, x0]
+	ldr	w0, [x2, 8]
+	cmp	w3, w0
+	beq	.L3379
+.L3378:
+	add	x5, x1, :lo12:.LANCHOR155
+	ldrh	w0, [x21, 22]
+	ldr	x1, [x1, #:lo12:.LANCHOR155]
 	ldr	w0, [x1, x0, lsl 2]
 	cmn	w0, #1
-	beq	.L3229
-	adrp	x19, .LANCHOR77
+	beq	.L3379
+	adrp	x20, .LANCHOR79
 	ldrb	w3, [x27, 9]
-	str	x4, [x29, 104]
+	str	x5, [x29, 104]
 	mov	w2, 4
-	ldrh	w0, [x19, #:lo12:.LANCHOR77]
+	ldrh	w0, [x20, #:lo12:.LANCHOR79]
 	mul	w3, w3, w0
-	adrp	x0, .LC223
-	add	x0, x0, :lo12:.LC223
+	adrp	x0, .LC229
+	add	x0, x0, :lo12:.LC229
 	bl	rknand_print_hex
-	ldrh	w0, [x19, #:lo12:.LANCHOR77]
-	adrp	x19, .LANCHOR153
+	ldrh	w0, [x20, #:lo12:.LANCHOR79]
+	adrp	x20, .LANCHOR156
 	ldrb	w3, [x27, 9]
 	mov	w2, 4
-	ldr	x1, [x19, #:lo12:.LANCHOR153]
+	ldr	x1, [x20, #:lo12:.LANCHOR156]
 	mul	w3, w3, w0
-	adrp	x0, .LC224
-	add	x0, x0, :lo12:.LC224
+	adrp	x0, .LC230
+	add	x0, x0, :lo12:.LC230
 	bl	rknand_print_hex
 	adrp	x0, .LANCHOR14
-	ldr	x4, [x29, 104]
+	ldr	x5, [x29, 104]
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L3230
-	ldr	x1, [x22, 24]
-	ldrh	w0, [x23, 22]
-	ldr	x2, [x4]
-	ldr	x3, [x19, #:lo12:.LANCHOR153]
+	tbz	x0, 10, .L3380
+	ldr	x1, [x19, 24]
+	ldrh	w0, [x21, 22]
+	ldr	x2, [x5]
+	ldr	x3, [x20, #:lo12:.LANCHOR156]
 	lsl	x0, x0, 2
 	ldr	w4, [x1, 12]
 	str	w4, [sp]
 	ldr	w4, [x3, x0]
 	ldp	w5, w6, [x1]
 	ldr	w3, [x2, x0]
-	adrp	x0, .LC225
+	adrp	x0, .LC231
 	ldr	w7, [x1, 8]
-	add	x0, x0, :lo12:.LC225
-	ldr	w1, [x22, 40]
-	ldr	w2, [x22, 52]
+	add	x0, x0, :lo12:.LC231
+	ldr	w1, [x19, 40]
+	ldr	w2, [x19, 52]
 	bl	printf
-.L3230:
-	ldr	x0, [x20, #:lo12:.LANCHOR10]
+.L3380:
+	ldr	x0, [x22, #:lo12:.LANCHOR10]
 	mov	x1, 0
 	ldrh	w0, [x0, 80]
 	bl	ftl_sblk_dump
 	adrp	x0, .LANCHOR9
-	ldrh	w1, [x21, 80]
+	ldrh	w1, [x23, 80]
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x1, lsl 1]
+	ldr	x1, [x22, #:lo12:.LANCHOR10]
+	ldr	w0, [x1, 556]
+	add	w0, w0, 1
+	str	w0, [x1, 556]
+	adrp	x0, .LANCHOR104
+	ldr	x0, [x0, #:lo12:.LANCHOR104]
+	ldr	w1, [x0, 156]
+	mov	w0, 20041
+	movk	w0, 0x444b, lsl 16
+	cmp	w1, w0
+	bne	.L3385
+	ldr	w0, [x19, 40]
+	bl	ftl_mask_bad_block
+.L3385:
 	mov	w0, -1
-.L3221:
+.L3370:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -20363,43 +21617,41 @@ gc_check_data_one_wl:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 128
 	ret
-.L3225:
-	cmp	w3, 2
-	bne	.L3227
-	sub	w0, w0, #1
-	add	w1, w24, w1
-	add	w0, w0, w1
-	orr	w0, w0, 33554432
-	b	.L3246
-.L3227:
+.L3375:
+	ldrh	w0, [x21, 16]
+	cmp	w2, 3
 	add	w0, w0, w1
-	b	.L3246
-.L3229:
-	ldrh	w0, [x23, 22]
+	bne	.L3377
+	orr	w0, w0, w24, lsl 24
+.L3377:
+	str	w0, [x19, 40]
+	b	.L3376
+.L3379:
+	ldrh	w0, [x21, 22]
 	add	w24, w24, 1
 	add	w0, w0, 1
-	strh	w0, [x23, 22]
-.L3234:
-	ldrh	w0, [x23, 20]
+	strh	w0, [x21, 22]
+.L3384:
+	ldrh	w0, [x21, 20]
 	cmp	w24, w0
-	ble	.L3232
+	ble	.L3382
 	add	w26, w26, 1
 	add	x28, x28, 2
-	b	.L3224
-.L3233:
-	add	x19, x19, :lo12:.LANCHOR63
-	ldrh	w0, [x19, 16]
+	b	.L3373
+.L3383:
+	add	x20, x20, :lo12:.LANCHOR64
+	ldrh	w0, [x20, 16]
 	add	w1, w0, 1
-	strh	w1, [x19, 16]
-	adrp	x1, .LANCHOR72
-	ldrb	w1, [x1, #:lo12:.LANCHOR72]
-	cbz	w1, .L3235
+	strh	w1, [x20, 16]
+	adrp	x1, .LANCHOR74
+	ldrb	w1, [x1, #:lo12:.LANCHOR74]
+	cbz	w1, .L3386
 	add	w0, w0, 2
-	strh	w0, [x19, 16]
-.L3235:
-.L3231:
+	strh	w0, [x20, 16]
+.L3386:
+.L3381:
 	mov	w0, 0
-	b	.L3221
+	b	.L3370
 	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
 	.section	.text.ftl_update_l2p_map,"ax",@progbits
 	.align	2
@@ -20411,50 +21663,50 @@ ftl_update_l2p_map:
 	stp	x21, x22, [sp, 32]
 	mov	x22, x0
 	stp	x19, x20, [sp, 16]
-	adrp	x0, .LANCHOR85
+	adrp	x0, .LANCHOR87
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	ldrh	w23, [x0, #:lo12:.LANCHOR85]
+	ldrh	w23, [x0, #:lo12:.LANCHOR87]
 	ldrb	w0, [x22, 9]
 	ldrh	w19, [x22, 12]
 	mul	w23, w23, w0
-	adrp	x0, .LANCHOR109
+	adrp	x0, .LANCHOR111
 	str	x0, [x29, 104]
-	ldr	x1, [x0, #:lo12:.LANCHOR109]
+	ldr	x1, [x0, #:lo12:.LANCHOR111]
 	add	x19, x1, x19, lsl 2
 	add	x1, x19, x23, sxtw 2
 	ldr	w1, [x1, -4]
 	cmn	w1, #1
-	beq	.L3248
-	adrp	x1, .LANCHOR215
+	beq	.L3401
+	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
-	mov	w2, 1640
-	add	x1, x1, :lo12:.LANCHOR215
+	mov	w2, 1733
+	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3248:
-	adrp	x27, .LANCHOR123
+.L3401:
+	adrp	x27, .LANCHOR125
 	mov	x24, 0
-	add	x0, x27, :lo12:.LANCHOR123
+	add	x0, x27, :lo12:.LANCHOR125
 	mov	w21, 0
 	str	x0, [x29, 96]
-.L3249:
+.L3402:
 	cmp	w24, w23
-	blt	.L3255
+	blt	.L3408
 	adrp	x0, .LANCHOR14
 	adrp	x19, .LANCHOR9
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3256
+	tbz	x0, 12, .L3409
 	ldrh	w1, [x22]
 	ldr	x2, [x19, #:lo12:.LANCHOR9]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w3, [x2, x0]
-	adrp	x0, .LC229
+	adrp	x0, .LC235
 	mov	w2, w21
-	add	x0, x0, :lo12:.LC229
+	add	x0, x0, :lo12:.LC235
 	bl	printf
-.L3256:
+.L3409:
 	ldrh	w1, [x22]
 	ldr	x0, [x19, #:lo12:.LANCHOR9]
 	ldp	x23, x24, [sp, 48]
@@ -20465,38 +21717,38 @@ ftl_update_l2p_map:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L3255:
+.L3408:
 	ldr	w2, [x19, x24, lsl 2]
 	cmn	w2, #1
-	beq	.L3250
-	ldrb	w20, [x27, #:lo12:.LANCHOR123]
+	beq	.L3403
+	ldrb	w20, [x27, #:lo12:.LANCHOR125]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	lsl	w20, w20, 7
 	udiv	w20, w2, w20
 	and	w20, w20, 65535
-	tbz	x0, 12, .L3251
-	adrp	x0, .LC226
+	tbz	x0, 12, .L3404
+	adrp	x0, .LC232
 	mov	w3, w24
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC226
+	add	x0, x0, :lo12:.LC232
 	bl	printf
-.L3251:
-	adrp	x25, .LANCHOR103
-	adrp	x26, .LC227
+.L3404:
+	adrp	x25, .LANCHOR105
+	adrp	x26, .LC233
 	mov	x28, x24
-	add	x25, x25, :lo12:.LANCHOR103
-	add	x26, x26, :lo12:.LC227
-.L3254:
+	add	x25, x25, :lo12:.LANCHOR105
+	add	x26, x26, :lo12:.LC233
+.L3407:
 	ldr	w1, [x19, x28, lsl 2]
 	cmn	w1, #1
-	beq	.L3252
+	beq	.L3405
 	ldr	x0, [x29, 96]
 	ldrb	w2, [x0]
 	lsl	w2, w2, 7
 	udiv	w1, w1, w2
 	cmp	w20, w1, uxth
-	bne	.L3252
+	bne	.L3405
 	ldrb	w0, [x22, 9]
 	sdiv	w1, w28, w0
 	msub	w0, w1, w0, w28
@@ -20508,15 +21760,15 @@ ftl_update_l2p_map:
 	str	w2, [x29, 124]
 	ldr	w1, [x19, x28, lsl 2]
 	bl	pm_ppa_update_check
-	cbz	w0, .L3253
+	cbz	w0, .L3406
 	ldr	x0, [x29, 104]
 	mov	w3, w23
 	mov	w2, 4
-	ldr	x1, [x0, #:lo12:.LANCHOR109]
-	adrp	x0, .LC228
-	add	x0, x0, :lo12:.LC228
+	ldr	x1, [x0, #:lo12:.LANCHOR111]
+	adrp	x0, .LC234
+	add	x0, x0, :lo12:.LC234
 	bl	rknand_print_hex
-.L3253:
+.L3406:
 	ldr	w0, [x19, x28, lsl 2]
 	add	w21, w21, 1
 	mov	w2, 1
@@ -20525,13 +21777,13 @@ ftl_update_l2p_map:
 	bl	pm_log2phys
 	mov	w0, -1
 	str	w0, [x19, x28, lsl 2]
-.L3252:
+.L3405:
 	add	x28, x28, 1
 	cmp	w23, w28
-	bgt	.L3254
-.L3250:
+	bgt	.L3407
+.L3403:
 	add	x24, x24, 1
-	b	.L3249
+	b	.L3402
 	.size	ftl_update_l2p_map, .-ftl_update_l2p_map
 	.section	.text.ftl_alloc_new_data_sblk,"ax",@progbits
 	.align	2
@@ -20549,9 +21801,9 @@ ftl_alloc_new_data_sblk:
 	ldrh	w0, [x20]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3278
+	beq	.L3431
 	bl	zftl_insert_data_list
-.L3278:
+.L3431:
 	adrp	x19, .LANCHOR10
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	add	x0, x0, 16
@@ -20563,13 +21815,13 @@ ftl_alloc_new_data_sblk:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldr	w0, [x0, 560]
 	cmp	w0, w21
-	bne	.L3280
+	bne	.L3433
 	mov	w20, 65535
 	cmp	w21, w20
-	beq	.L3280
+	beq	.L3433
 	mov	w1, w21
-	adrp	x0, .LC230
-	add	x0, x0, :lo12:.LC230
+	adrp	x0, .LC236
+	add	x0, x0, :lo12:.LC236
 	bl	printf
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldr	w0, [x0, 564]
@@ -20578,7 +21830,7 @@ ftl_alloc_new_data_sblk:
 	mov	w1, -1
 	str	w20, [x0, 560]
 	str	w1, [x0, 564]
-.L3280:
+.L3433:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
@@ -20595,54 +21847,54 @@ ftl_alloc_new_data_sblk:
 	.type	ftl_write_commit, %function
 ftl_write_commit:
 	stp	x29, x30, [sp, -144]!
-	adrp	x0, .LANCHOR50
+	adrp	x0, .LANCHOR52
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	add	x23, x0, :lo12:.LANCHOR50
+	add	x23, x0, :lo12:.LANCHOR52
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-.L3284:
-	adrp	x2, .LANCHOR58
-	ldrb	w1, [x2, #:lo12:.LANCHOR58]
-	cbz	w1, .L3286
-	adrp	x3, .LANCHOR57
-	adrp	x0, .LANCHOR50
-	add	x0, x0, :lo12:.LANCHOR50
+.L3437:
+	adrp	x2, .LANCHOR60
+	ldrb	w1, [x2, #:lo12:.LANCHOR60]
+	cbz	w1, .L3439
+	adrp	x3, .LANCHOR59
+	adrp	x0, .LANCHOR52
+	add	x0, x0, :lo12:.LANCHOR52
 	sub	w1, w1, #1
-	ldrb	w4, [x3, #:lo12:.LANCHOR57]
-	strb	w1, [x2, #:lo12:.LANCHOR58]
+	ldrb	w4, [x3, #:lo12:.LANCHOR59]
+	strb	w1, [x2, #:lo12:.LANCHOR60]
 	ubfiz	x27, x4, 6, 8
 	add	x5, x0, x27
 	stp	x4, x5, [x29, 112]
 	lsl	x4, x4, 6
 	add	x5, x0, x4
 	ldrb	w0, [x0, x4]
-	strb	w0, [x3, #:lo12:.LANCHOR57]
-	adrp	x0, .LANCHOR120
+	strb	w0, [x3, #:lo12:.LANCHOR59]
+	adrp	x0, .LANCHOR122
 	ldr	w2, [x5, 36]
 	mov	x19, x0
-	ldr	w1, [x0, #:lo12:.LANCHOR120]
+	ldr	w1, [x0, #:lo12:.LANCHOR122]
 	cmp	w2, w1
-	bcc	.L3288
-	adrp	x1, .LANCHOR216
+	bcc	.L3441
+	adrp	x1, .LANCHOR221
 	adrp	x0, .LC0
-	mov	w2, 502
-	add	x1, x1, :lo12:.LANCHOR216
+	mov	w2, 510
+	add	x1, x1, :lo12:.LANCHOR221
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3288:
+.L3441:
 	ldr	x0, [x29, 112]
-	ldr	w1, [x19, #:lo12:.LANCHOR120]
+	ldr	w1, [x19, #:lo12:.LANCHOR122]
 	add	x0, x23, x0, lsl 6
 	ldr	w22, [x0, 36]
 	cmp	w22, w1
-	bcc	.L3289
+	bcc	.L3442
 	ldr	x0, [x29, 120]
-	bl	buf_free
+	bl	zbuf_free
 	mov	w0, -1
-.L3283:
+.L3436:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -20650,25 +21902,25 @@ ftl_write_commit:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L3289:
+.L3442:
 	ldrb	w21, [x0, 57]
 	ldrb	w20, [x0, 56]
 	ldr	x26, [x0, 8]
 	ldr	x28, [x0, 24]
-	adrp	x0, .LANCHOR121
+	adrp	x0, .LANCHOR123
 	str	x0, [x29, 104]
-	ldrb	w1, [x0, #:lo12:.LANCHOR121]
-	cbz	w1, .L3291
-	adrp	x0, .LANCHOR174
-	ldrb	w1, [x0, #:lo12:.LANCHOR174]
+	ldrb	w1, [x0, #:lo12:.LANCHOR123]
+	cbz	w1, .L3444
+	adrp	x0, .LANCHOR177
+	ldrb	w1, [x0, #:lo12:.LANCHOR177]
 	add	x1, x23, x1, lsl 6
-.L3292:
+.L3445:
 	ldrb	w0, [x1]
 	cmp	w0, 255
-	bne	.L3293
+	bne	.L3446
 	ldr	w0, [x1, 36]
 	cmp	w22, w0
-	bne	.L3291
+	bne	.L3444
 	ldr	x0, [x1, 8]
 	ubfiz	x21, x21, 9, 8
 	lsl	w2, w20, 9
@@ -20676,34 +21928,34 @@ ftl_write_commit:
 	add	x0, x0, x21
 	bl	ftl_memcpy
 	ldr	x0, [x29, 120]
-	bl	buf_free
-	b	.L3284
-.L3293:
+	bl	zbuf_free
+	b	.L3437
+.L3446:
 	ubfiz	x1, x0, 6, 8
 	add	x1, x23, x1
-	b	.L3292
-.L3291:
+	b	.L3445
+.L3444:
 	mov	w0, w22
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 140]
 	cmn	w0, #1
-	bne	.L3295
+	bne	.L3448
 	mov	w2, 0
 	add	x1, x29, 140
 	mov	w0, w22
 	bl	pm_log2phys
-.L3295:
+.L3448:
 	adrp	x25, .LANCHOR10
 	add	x1, x23, 2
 	mov	w0, 0
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 16
-.L3298:
+.L3451:
 	ldr	w2, [x1, 34]
 	cmp	w22, w2
-	bne	.L3296
+	bne	.L3449
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L3296
+	tbz	x2, 3, .L3449
 	ubfiz	x0, x0, 6, 32
 	and	w2, w2, -9
 	add	x0, x23, x0
@@ -20711,50 +21963,50 @@ ftl_write_commit:
 	ldr	x24, [x0, 8]
 	ldr	w0, [x0, 40]
 	str	w0, [x29, 140]
-.L3297:
-	adrp	x0, .LANCHOR123
+.L3450:
+	adrp	x0, .LANCHOR125
 	str	x0, [x29, 96]
-	ldrb	w1, [x0, #:lo12:.LANCHOR123]
+	ldrb	w1, [x0, #:lo12:.LANCHOR125]
 	cmp	w20, w1
-	bcs	.L3322
+	bcs	.L3475
 	add	w20, w21, w20
-	cbz	x24, .L3300
-	cbz	w21, .L3301
+	cbz	x24, .L3453
+	cbz	w21, .L3454
 	lsl	w2, w21, 9
 	mov	x1, x24
 	mov	x0, x26
 	bl	ftl_memcpy
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 48
-.L3301:
+.L3454:
 	ldr	x0, [x29, 96]
-	ldrb	w2, [x0, #:lo12:.LANCHOR123]
+	ldrb	w2, [x0, #:lo12:.LANCHOR125]
 	cmp	w20, w2
-	bcc	.L3302
+	bcc	.L3455
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 16
-.L3322:
+.L3475:
 	mov	w24, 0
-	b	.L3299
-.L3296:
+	b	.L3452
+.L3449:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 32
-	bne	.L3298
+	bne	.L3451
 	mov	x24, 0
-	b	.L3297
-.L3302:
+	b	.L3450
+.L3455:
 	ubfiz	x0, x20, 9, 9
 	sub	w2, w2, w20
 	add	x1, x24, x0
 	lsl	w2, w2, 9
 	add	x0, x26, x0
 	bl	ftl_memcpy
-	b	.L3322
-.L3300:
+	b	.L3475
+.L3453:
 	ldr	w0, [x29, 140]
 	cmn	w0, #1
-	beq	.L3303
+	beq	.L3456
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 140]
@@ -20767,11 +22019,11 @@ ftl_write_commit:
 	ldr	w0, [x0, 4]
 	add	w24, w24, 1
 	cmp	w22, w0
-	bne	.L3304
+	bne	.L3457
 	ldr	w0, [x27, 52]
 	cmn	w0, #1
-	bne	.L3305
-.L3304:
+	bne	.L3458
+.L3457:
 	ldr	x1, [x25, #:lo12:.LANCHOR10]
 	mov	w3, w22
 	ldr	w4, [x27, 52]
@@ -20779,73 +22031,73 @@ ftl_write_commit:
 	ldr	w0, [x1, 552]
 	add	w0, w0, 1
 	str	w0, [x1, 552]
-	adrp	x0, .LC231
-	add	x0, x0, :lo12:.LC231
+	adrp	x0, .LC237
+	add	x0, x0, :lo12:.LC237
 	ldrb	w1, [x27, 1]
 	bl	printf
 	ldr	x1, [x27, 24]
 	mov	w3, 4
-	adrp	x0, .LC189
+	adrp	x0, .LC195
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC189
+	add	x0, x0, :lo12:.LC195
 	bl	rknand_print_hex
-.L3305:
+.L3458:
 	ldr	x0, [x27, 24]
 	ldr	w0, [x0, 4]
 	cmp	w22, w0
-	bne	.L3306
+	bne	.L3459
 	ldr	w0, [x27, 52]
 	cmn	w0, #1
-	bne	.L3307
-.L3306:
-	adrp	x1, .LANCHOR216
+	bne	.L3460
+.L3459:
+	adrp	x1, .LANCHOR221
 	adrp	x0, .LC0
-	mov	w2, 573
-	add	x1, x1, :lo12:.LANCHOR216
+	mov	w2, 581
+	add	x1, x1, :lo12:.LANCHOR221
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3307:
-	cbz	w21, .L3308
+.L3460:
+	cbz	w21, .L3461
 	ldr	w0, [x29, 140]
 	lsl	w2, w21, 9
 	cmn	w0, #1
-	beq	.L3309
+	beq	.L3462
 	ldr	x1, [x27, 8]
 	mov	x0, x26
 	bl	ftl_memcpy
-.L3310:
+.L3463:
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 48
-.L3308:
+.L3461:
 	ldr	x0, [x29, 96]
-	ldrb	w2, [x0, #:lo12:.LANCHOR123]
+	ldrb	w2, [x0, #:lo12:.LANCHOR125]
 	cmp	w20, w2
-	bcc	.L3311
-	bls	.L3312
+	bcc	.L3464
+	bls	.L3465
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 16
-.L3312:
-	cbz	x27, .L3299
+.L3465:
+	cbz	x27, .L3452
 	ldrb	w0, [x27, 2]
 	mov	x1, x27
 	and	w0, w0, -9
 	strb	w0, [x27, 2]
-	adrp	x0, .LANCHOR129
-	add	x0, x0, :lo12:.LANCHOR129
+	adrp	x0, .LANCHOR131
+	add	x0, x0, :lo12:.LANCHOR131
 	bl	buf_remove_buf
 	mov	x0, x27
-	bl	buf_free
-.L3299:
+	bl	zbuf_free
+.L3452:
 	ldrh	w0, [x19, 6]
-	cbnz	w0, .L3314
+	cbnz	w0, .L3467
 	bl	ftl_flush
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L3314:
+.L3467:
 	mov	x0, x19
 	bl	ftl_get_new_free_page
 	ldr	x1, [x29, 112]
-	adrp	x20, .LANCHOR174
+	adrp	x20, .LANCHOR177
 	lsl	x2, x1, 6
 	add	x1, x23, x2
 	ldr	w3, [x1, 32]
@@ -20866,116 +22118,116 @@ ftl_write_commit:
 	sub	w0, w0, #1
 	strh	w0, [x1, 48]
 	ldr	x1, [x29, 120]
-	add	x0, x20, :lo12:.LANCHOR174
+	add	x0, x20, :lo12:.LANCHOR177
 	bl	buf_add_tail
 	ldr	x0, [x29, 104]
-	ldrb	w2, [x0, #:lo12:.LANCHOR121]
+	ldrb	w2, [x0, #:lo12:.LANCHOR123]
 	add	w2, w2, 1
 	and	w2, w2, 255
-	strb	w2, [x0, #:lo12:.LANCHOR121]
-	adrp	x0, .LANCHOR217
+	strb	w2, [x0, #:lo12:.LANCHOR123]
+	adrp	x0, .LANCHOR222
 	cmp	w2, 2
-	str	wzr, [x0, #:lo12:.LANCHOR217]
+	str	wzr, [x0, #:lo12:.LANCHOR222]
 	ldrh	w0, [x19, 6]
-	bhi	.L3315
+	bhi	.L3468
 	cmp	w0, 1
-	bne	.L3287
-.L3315:
+	bne	.L3440
+.L3468:
 	ldrb	w1, [x19, 5]
 	cmp	w1, 0
 	mov	w1, 0
 	cset	w4, ne
 	cmp	w0, 1
-	ldrb	w0, [x20, #:lo12:.LANCHOR174]
+	ldrb	w0, [x20, #:lo12:.LANCHOR177]
 	csinc	w4, w2, w4, eq
 	mov	w3, w0
-.L3319:
+.L3472:
 	cmp	w1, w4
-	bne	.L3320
-	strb	w3, [x20, #:lo12:.LANCHOR174]
+	bne	.L3473
+	strb	w3, [x20, #:lo12:.LANCHOR177]
 	and	w1, w1, 255
 	ldr	x3, [x29, 104]
 	sub	w2, w2, w1
 	ubfiz	x0, x0, 6, 8
 	add	x0, x23, x0
-	strb	w2, [x3, #:lo12:.LANCHOR121]
+	strb	w2, [x3, #:lo12:.LANCHOR123]
 	bl	sblk_prog_page
 	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bne	.L3287
+	bne	.L3440
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	mov	x0, x19
 	bl	ftl_write_last_log_page
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L3287:
-	adrp	x0, .LANCHOR58
-	ldrb	w0, [x0, #:lo12:.LANCHOR58]
-	cbnz	w0, .L3284
-.L3286:
+.L3440:
+	adrp	x0, .LANCHOR60
+	ldrb	w0, [x0, #:lo12:.LANCHOR60]
+	cbnz	w0, .L3437
+.L3439:
 	bl	ftl_write_completed
 	mov	w0, 0
-	b	.L3283
-.L3311:
+	b	.L3436
+.L3464:
 	ldr	w0, [x29, 140]
 	sub	w2, w2, w20
 	lsl	w2, w2, 9
 	cmn	w0, #1
 	ubfiz	x0, x20, 7, 9
-	beq	.L3313
+	beq	.L3466
 	ldr	x1, [x27, 8]
 	lsl	x0, x0, 2
 	add	x1, x1, x0
 	add	x0, x26, x0
 	bl	ftl_memcpy
-	b	.L3312
-.L3313:
+	b	.L3465
+.L3466:
 	mov	w1, 0
 	add	x0, x26, x0, lsl 2
 	bl	ftl_memset
-	b	.L3312
-.L3320:
+	b	.L3465
+.L3473:
 	ubfiz	x3, x3, 6, 8
 	add	w1, w1, 1
 	ldrb	w3, [x23, x3]
-	b	.L3319
-.L3321:
+	b	.L3472
+.L3474:
 	lsl	w2, w21, 9
 	mov	x27, 0
 	mov	w24, 0
-.L3309:
+.L3462:
 	mov	w1, 0
 	mov	x0, x26
 	bl	ftl_memset
-	b	.L3310
-.L3303:
-	cbnz	w21, .L3321
+	b	.L3463
+.L3456:
+	cbnz	w21, .L3474
 	mov	w24, 0
 	mov	x27, 0
-	b	.L3308
+	b	.L3461
 	.size	ftl_write_commit, .-ftl_write_commit
 	.section	.text.gc_do_copy_back,"ax",@progbits
 	.align	2
 	.global	gc_do_copy_back
 	.type	gc_do_copy_back, %function
 gc_do_copy_back:
-	sub	sp, sp, #224
-	adrp	x0, .LANCHOR76
-	stp	x29, x30, [sp, 16]
-	add	x29, sp, 16
-	ldrb	w0, [x0, #:lo12:.LANCHOR76]
-	stp	x19, x20, [sp, 32]
-	stp	x21, x22, [sp, 48]
-	stp	x23, x24, [sp, 64]
-	stp	x25, x26, [sp, 80]
-	stp	x27, x28, [sp, 96]
-	cbnz	w0, .L3345
+	sub	sp, sp, #240
+	adrp	x0, .LANCHOR78
+	stp	x29, x30, [sp, 32]
+	add	x29, sp, 32
+	ldrb	w0, [x0, #:lo12:.LANCHOR78]
+	stp	x19, x20, [sp, 48]
+	stp	x21, x22, [sp, 64]
+	stp	x23, x24, [sp, 80]
+	stp	x25, x26, [sp, 96]
+	stp	x27, x28, [sp, 112]
+	cbnz	w0, .L3498
 	bl	buf_alloc
 	mov	x19, x0
-	cbz	x0, .L3344
-	adrp	x20, .LANCHOR63
-	add	x3, x20, :lo12:.LANCHOR63
+	cbz	x0, .L3497
+	adrp	x21, .LANCHOR64
+	add	x3, x21, :lo12:.LANCHOR64
 	ldrh	w2, [x3, 26]
 	mov	w0, w2
 	bl	gc_get_src_ppa_from_index
@@ -20989,71 +22241,71 @@ gc_do_copy_back:
 	ldr	w0, [x19, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3347
-	adrp	x1, .LANCHOR218
+	bne	.L3500
+	adrp	x1, .LANCHOR223
 	adrp	x0, .LC0
-	mov	w2, 731
-	add	x1, x1, :lo12:.LANCHOR218
+	mov	w2, 863
+	add	x1, x1, :lo12:.LANCHOR223
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3347:
+.L3500:
 	ldr	x0, [x19, 24]
-	ldr	w21, [x0, 4]
-	mov	w0, w21
+	ldr	w20, [x0, 4]
+	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 160]
 	cmn	w0, #1
-	bne	.L3348
+	bne	.L3501
 	mov	w2, 0
 	add	x1, x29, 160
-	mov	w0, w21
+	mov	w0, w20
 	bl	pm_log2phys
-.L3348:
+.L3501:
 	ldr	w23, [x29, 160]
 	cmp	w22, w23
-	bne	.L3349
-	adrp	x0, .LANCHOR50
-	add	x0, x0, :lo12:.LANCHOR50
+	bne	.L3502
+	adrp	x0, .LANCHOR52
+	add	x0, x0, :lo12:.LANCHOR52
 	add	x1, x0, 2
 	add	x0, x0, 2050
-.L3352:
+.L3505:
 	ldr	w2, [x1, 34]
-	cmp	w21, w2
-	bne	.L3350
+	cmp	w20, w2
+	bne	.L3503
 	ldrb	w2, [x1]
-	tbz	x2, 1, .L3350
+	tbz	x2, 1, .L3503
 	mov	x0, x19
-	bl	buf_free
+	bl	zbuf_free
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3344
-	add	x20, x20, :lo12:.LANCHOR63
-	adrp	x0, .LC232
+	tbz	x0, 8, .L3497
+	add	x21, x21, :lo12:.LANCHOR64
+	adrp	x0, .LC238
 	mov	w2, w22
-	mov	w1, w21
-	add	x0, x0, :lo12:.LC232
-	ldrh	w3, [x20, 26]
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC238
+	ldrh	w3, [x21, 26]
 	bl	printf
-.L3344:
-	ldp	x19, x20, [sp, 32]
-	ldp	x21, x22, [sp, 48]
-	ldp	x23, x24, [sp, 64]
-	ldp	x25, x26, [sp, 80]
-	ldp	x27, x28, [sp, 96]
-	ldp	x29, x30, [sp, 16]
-	add	sp, sp, 224
+.L3497:
+	ldp	x19, x20, [sp, 48]
+	ldp	x21, x22, [sp, 64]
+	ldp	x23, x24, [sp, 80]
+	ldp	x25, x26, [sp, 96]
+	ldp	x27, x28, [sp, 112]
+	ldp	x29, x30, [sp, 32]
+	add	sp, sp, 240
 	ret
-.L3350:
+.L3503:
 	add	x1, x1, 64
 	cmp	x1, x0
-	bne	.L3352
-	adrp	x0, .LANCHOR123
+	bne	.L3505
+	adrp	x0, .LANCHOR125
 	mov	w1, 10
 	strb	wzr, [x19, 57]
-	ldrb	w0, [x0, #:lo12:.LANCHOR123]
+	ldrb	w0, [x0, #:lo12:.LANCHOR125]
 	strb	w0, [x19, 56]
 	ldrb	w0, [x19, 2]
-	str	w21, [x19, 36]
+	str	w20, [x19, 36]
 	orr	w0, w0, w1
 	strb	w0, [x19, 2]
 	ldr	x0, [x19, 24]
@@ -21061,273 +22313,371 @@ gc_do_copy_back:
 	str	w0, [x19, 32]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3353
-	mov	w0, w21
+	tbz	x0, 8, .L3506
+	mov	w0, w20
 	bl	lpa_hash_get_ppa
-	add	x1, x20, :lo12:.LANCHOR63
+	add	x1, x21, :lo12:.LANCHOR64
 	mov	w3, w0
 	mov	w4, w22
-	adrp	x0, .LC233
+	adrp	x0, .LC239
 	mov	w2, w23
-	add	x0, x0, :lo12:.LC233
+	add	x0, x0, :lo12:.LC239
 	ldrh	w5, [x1, 26]
-	mov	w1, w21
+	mov	w1, w20
 	bl	printf
-.L3353:
+.L3506:
 	mov	x0, x19
 	bl	ftl_gc_write_buf
 	bl	ftl_write_commit
-	add	x20, x20, :lo12:.LANCHOR63
-	adrp	x0, .LANCHOR102
-	ldr	x1, [x0, #:lo12:.LANCHOR102]
+	add	x21, x21, :lo12:.LANCHOR64
+	adrp	x0, .LANCHOR104
+	ldr	x1, [x0, #:lo12:.LANCHOR104]
 	ldr	w0, [x1, 60]
 	add	w0, w0, 1
 	str	w0, [x1, 60]
-	ldrh	w0, [x20, 28]
+	ldrh	w0, [x21, 28]
 	add	w0, w0, 1
-	strh	w0, [x20, 28]
-	b	.L3344
-.L3349:
+	strh	w0, [x21, 28]
+	b	.L3497
+.L3502:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3354
-	add	x20, x20, :lo12:.LANCHOR63
-	mov	w0, w21
+	tbz	x0, 8, .L3507
+	add	x21, x21, :lo12:.LANCHOR64
+	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	mov	w3, w0
 	mov	w4, w22
-	adrp	x0, .LC233
-	ldrh	w5, [x20, 26]
+	adrp	x0, .LC239
+	ldrh	w5, [x21, 26]
 	mov	w2, w23
-	mov	w1, w21
-	add	x0, x0, :lo12:.LC233
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC239
 	bl	printf
-.L3354:
+.L3507:
 	mov	x0, x19
-	bl	buf_free
-	b	.L3344
-.L3345:
+	bl	zbuf_free
+	b	.L3497
+.L3498:
 	adrp	x1, .LANCHOR10
-	adrp	x0, .LANCHOR71
+	adrp	x0, .LANCHOR73
 	stp	x0, x1, [x29, 128]
-	adrp	x24, .LANCHOR63
+	adrp	x24, .LANCHOR64
 	ldr	x22, [x1, #:lo12:.LANCHOR10]
-	ldrb	w25, [x0, #:lo12:.LANCHOR71]
+	ldrb	w19, [x0, #:lo12:.LANCHOR73]
 	add	x22, x22, 80
-	cmp	w25, 3
-	bne	.L3355
-	adrp	x0, .LANCHOR75
-	ldrb	w0, [x0, #:lo12:.LANCHOR75]
-	cbz	w0, .L3356
-	add	x0, x24, :lo12:.LANCHOR63
-	ldrb	w19, [x22, 9]
-	ldrh	w20, [x0, 314]
-	add	w21, w19, w19, lsl 1
-	sub	w19, w19, w19, lsl 2
-	sdiv	w21, w20, w21
-	madd	w19, w21, w19, w20
-	and	w19, w19, 65535
-.L3357:
-	adrp	x1, .LANCHOR77
-	ldrb	w0, [x22, 9]
-	add	x4, x24, :lo12:.LANCHOR63
-	mov	w2, 0
-	ldrh	w3, [x1, #:lo12:.LANCHOR77]
-	mul	w8, w25, w0
-	ldrh	w10, [x4, 24]
-	mul	w3, w3, w0
-	adrp	x0, .LANCHOR153
-	ldr	x7, [x0, #:lo12:.LANCHOR153]
-	sub	w3, w3, #1
-.L3360:
-	cmp	w2, w8
-	blt	.L3362
-.L3391:
-	mov	w23, 1
-	b	.L3358
-.L3356:
-	add	x0, x24, :lo12:.LANCHOR63
+	cmp	w19, 3
+	bne	.L3508
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbz	w0, .L3509
+	add	x0, x24, :lo12:.LANCHOR64
 	ldrb	w20, [x22, 9]
-	ldrh	w1, [x0, 314]
-	adrp	x0, .LANCHOR219
-	add	x0, x0, :lo12:.LANCHOR219
-	sdiv	w19, w1, w20
-	ldrh	w23, [x0, w19, sxtw 1]
-	msub	w19, w19, w20, w1
+	ldrh	w21, [x0, 570]
+	adrp	x0, .LANCHOR204
+	ldrb	w0, [x0, #:lo12:.LANCHOR204]
+	sdiv	w1, w21, w20
+	and	w27, w1, 65535
+	cbz	w0, .L3510
+	adrp	x0, .LANCHOR224
+	add	x0, x0, :lo12:.LANCHOR224
+	ldrh	w0, [x0, w1, sxtw 1]
+	cmp	w0, 0
+	cset	w19, ne
+.L3633:
+	add	w19, w19, 1
+.L3511:
+	msub	w20, w27, w20, w21
+.L3634:
+	and	w20, w20, 65535
+.L3512:
+	adrp	x0, .LANCHOR79
+	ldrb	w1, [x22, 9]
+	add	x6, x24, :lo12:.LANCHOR64
+	adrp	x11, .LANCHOR224
+	ldrh	w0, [x0, #:lo12:.LANCHOR79]
+	add	x11, x11, :lo12:.LANCHOR224
+	sxtw	x14, w27
+	mov	w3, 0
+	mul	w13, w19, w1
+	ldrh	w15, [x6, 24]
+	mul	w0, w0, w1
+	sub	w5, w0, #1
+	adrp	x0, .LANCHOR204
+	ldrb	w12, [x0, #:lo12:.LANCHOR204]
+	adrp	x0, .LANCHOR156
+	ldr	x7, [x0, #:lo12:.LANCHOR156]
+.L3516:
+	cmp	w3, w13
+	blt	.L3520
+.L3566:
+	mov	w23, 1
+	b	.L3514
+.L3510:
+	adrp	x0, .LANCHOR205
+	ldrb	w0, [x0, #:lo12:.LANCHOR205]
+	cbz	w0, .L3560
+	sub	w0, w27, #62
+	and	w0, w0, 65535
+	cmp	w0, 2159
+	bhi	.L3561
+	udiv	w19, w27, w19
+	add	w19, w19, w19, lsl 1
+	sub	w19, w27, w19
 	and	w19, w19, 65535
-	lsr	w21, w23, 3
+	cmp	w19, 0
+	cset	w19, eq
+	b	.L3633
+.L3560:
+	mov	w19, 1
+	b	.L3511
+.L3561:
+	mov	w19, 2
+	b	.L3511
+.L3509:
+	adrp	x0, .LANCHOR77
+	ldrb	w0, [x0, #:lo12:.LANCHOR77]
+	cbz	w0, .L3513
+	add	x0, x24, :lo12:.LANCHOR64
+	ldrb	w20, [x22, 9]
+	ldrh	w21, [x0, 570]
+	add	w8, w20, w20, lsl 1
+	sub	w20, w20, w20, lsl 2
+	sdiv	w27, w21, w8
+	madd	w20, w27, w20, w21
+	b	.L3634
+.L3513:
+	add	x0, x24, :lo12:.LANCHOR64
+	ldrb	w21, [x22, 9]
+	ldrh	w1, [x0, 570]
+	adrp	x0, .LANCHOR225
+	add	x0, x0, :lo12:.LANCHOR225
+	sdiv	w20, w1, w21
+	ldrh	w23, [x0, w20, sxtw 1]
+	msub	w20, w20, w21, w1
+	and	w20, w20, 65535
+	lsr	w27, w23, 3
 	and	w23, w23, 7
 	cmp	w23, 1
-	madd	w20, w21, w20, w19
-	add	w20, w20, w20, lsl 1
-	and	w20, w20, 65535
-	beq	.L3357
-.L3358:
+	madd	w21, w27, w21, w20
+	add	w21, w21, w21, lsl 1
+	and	w21, w21, 65535
+	beq	.L3512
+.L3514:
 	adrp	x0, .LANCHOR14
 	str	x0, [x29, 112]
 	ldr	w1, [x0, #:lo12:.LANCHOR14]
-	tbz	x1, 8, .L3363
-	adrp	x0, .LANCHOR153
-	ubfiz	x1, x20, 2, 16
-	mov	w6, w20
-	mov	w3, w19
-	ldr	x2, [x0, #:lo12:.LANCHOR153]
-	add	x0, x24, :lo12:.LANCHOR63
-	ldrh	w4, [x0, 314]
-	adrp	x0, .LC234
+	tbz	x1, 8, .L3521
+	adrp	x0, .LANCHOR156
+	ubfiz	x1, x21, 2, 16
+	mov	w7, w21
+	ldr	x2, [x0, #:lo12:.LANCHOR156]
+	add	x0, x24, :lo12:.LANCHOR64
+	add	x3, x2, x1
+	ldrh	w4, [x0, 570]
+	adrp	x0, .LANCHOR224
+	add	x0, x0, :lo12:.LANCHOR224
+	ldrh	w0, [x0, w27, sxtw 1]
+	str	w0, [sp]
+	adrp	x0, .LC240
+	add	x0, x0, :lo12:.LC240
 	ldr	w5, [x2, x1]
-	add	x0, x0, :lo12:.LC234
 	mov	w2, w23
-	mov	w1, w21
+	ldr	w6, [x3, 4]
+	mov	w1, w27
+	mov	w3, w20
 	bl	printf
-.L3363:
-	adrp	x0, .LANCHOR50
+.L3521:
+	adrp	x0, .LANCHOR79
 	str	wzr, [x29, 152]
-	add	x0, x0, :lo12:.LANCHOR50
+	add	x0, x0, :lo12:.LANCHOR79
 	str	x0, [x29, 120]
-.L3364:
-	ldrb	w1, [x22, 9]
+.L3522:
+	ldrb	w2, [x22, 9]
 	ldr	w0, [x29, 152]
-	ldrh	w26, [x29, 152]
+	ldrh	w25, [x29, 152]
 	and	w0, w0, 65535
 	str	w0, [x29, 156]
-	mul	w3, w25, w1
-	cmp	w0, w3
-	blt	.L3376
+	mul	w1, w19, w2
+	cmp	w0, w1
+	blt	.L3540
 	ldr	x0, [x29, 128]
-	ldrb	w0, [x0, #:lo12:.LANCHOR71]
+	ldrb	w0, [x0, #:lo12:.LANCHOR73]
 	cmp	w0, 3
 	add	x0, x29, 160
-	bne	.L3377
-	adrp	x2, .LANCHOR75
-	ldr	x3, [x29, 160]
-	ldrb	w2, [x2, #:lo12:.LANCHOR75]
-	cbz	w2, .L3378
-.L3381:
-	strb	wzr, [x3, 60]
-	b	.L3379
-.L3355:
-	adrp	x0, .LANCHOR72
-	ldrb	w0, [x0, #:lo12:.LANCHOR72]
-	cbnz	w0, .L3359
-	add	x0, x24, :lo12:.LANCHOR63
-	ldrb	w19, [x22, 9]
-	mov	w25, 1
-	ldrh	w20, [x0, 314]
-	sdiv	w21, w20, w19
-	msub	w19, w21, w19, w20
-	and	w19, w19, 65535
-	b	.L3357
-.L3359:
-	add	x0, x24, :lo12:.LANCHOR63
-	ldrb	w19, [x22, 9]
-	mov	w25, 2
-	ldrh	w20, [x0, 314]
-	sdiv	w21, w20, w19
-	msub	w19, w21, w19, w20
-	and	w19, w19, 65535
-	b	.L3357
-.L3362:
-	add	w5, w20, w2
-	cmp	w5, w3
-	beq	.L3391
-	sbfiz	x5, x5, 2, 32
-	ldr	w0, [x7, x5]
+	bne	.L3541
+	adrp	x3, .LANCHOR35
+	ldrb	w3, [x3, #:lo12:.LANCHOR35]
+	cbz	w3, .L3542
+	sub	w3, w1, #1
+	mov	w2, 0
+.L3543:
+	cmp	w2, w3
+	blt	.L3544
+.L3639:
+	ldr	x0, [x0, w3, sxtw 3]
+	mov	w2, -1
+	strb	w2, [x0]
+	ldr	x0, [x29, 160]
+	bl	sblk_prog_page
+	b	.L3545
+.L3508:
+	adrp	x0, .LANCHOR74
+	ldrb	w0, [x0, #:lo12:.LANCHOR74]
+	cbnz	w0, .L3515
+	add	x0, x24, :lo12:.LANCHOR64
+	ldrb	w20, [x22, 9]
+	mov	w19, 1
+	ldrh	w21, [x0, 570]
+	sdiv	w27, w21, w20
+	msub	w20, w27, w20, w21
+	and	w20, w20, 65535
+	b	.L3512
+.L3515:
+	add	x0, x24, :lo12:.LANCHOR64
+	ldrb	w20, [x22, 9]
+	mov	w19, 2
+	ldrh	w21, [x0, 570]
+	sdiv	w27, w21, w20
+	msub	w20, w27, w20, w21
+	and	w20, w20, 65535
+	b	.L3512
+.L3520:
+	add	w2, w21, w3
+	cmp	w2, w5
+	bne	.L3517
+	cbz	w12, .L3566
+	ldrh	w0, [x11, x14, lsl 1]
+	cmp	w0, w27
+	bcs	.L3566
+	tbz	x3, 0, .L3566
+.L3517:
+	sbfiz	x2, x2, 2, 32
+	ldr	w0, [x7, x2]
 	cmn	w0, #1
-	bne	.L3361
-	ldrh	w6, [x4, 26]
-	cmp	w6, w10
-	bcs	.L3344
-	mov	w0, w6
+	bne	.L3518
+	ldrh	w4, [x6, 26]
+	cmp	w4, w15
+	bcs	.L3497
+	cbz	w12, .L3519
+	ldrh	w0, [x11, x14, lsl 1]
+	cmp	w0, w27
+	bcs	.L3519
+	tbz	x3, 0, .L3519
+	ubfiz	x0, x0, 2, 16
+	ldr	w0, [x7, x0]
+.L3635:
+	str	w0, [x7, x2]
+.L3518:
+	add	w3, w3, 1
+	and	w3, w3, 65535
+	b	.L3516
+.L3519:
+	mov	w0, w4
 	bl	gc_get_src_ppa_from_index
-	add	w6, w6, 1
-	strh	w6, [x4, 26]
-	str	w0, [x7, x5]
-.L3361:
-	add	w2, w2, 1
-	and	w2, w2, 65535
-	b	.L3360
-.L3376:
+	add	w4, w4, 1
+	strh	w4, [x6, 26]
+	b	.L3635
+.L3540:
 	ldr	w0, [x29, 156]
-	add	w0, w20, w0
-	str	w0, [x29, 144]
-	sxtw	x27, w0
-	adrp	x0, .LANCHOR74
-	ldr	x0, [x0, #:lo12:.LANCHOR74]
-	ldrb	w0, [x0, x27]
+	add	w28, w21, w0
+	sxtw	x0, w28
+	str	x0, [x29, 144]
+	adrp	x0, .LANCHOR76
+	sxtw	x1, w28
+	ldr	x0, [x0, #:lo12:.LANCHOR76]
+	ldrb	w0, [x0, x1]
 	cmp	w0, 255
-	bne	.L3365
+	bne	.L3523
 	mov	w0, 0
 	bl	buf_alloc
-	mov	x28, x0
-	cbnz	x0, .L3366
+	mov	x26, x0
+	cbnz	x0, .L3524
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	bl	gc_write_completed
 	bl	gc_free_temp_buf
 	mov	w0, 0
 	bl	buf_alloc
-	mov	x28, x0
-	cbz	x0, .L3344
-.L3366:
-	adrp	x0, .LANCHOR74
-	ldrb	w1, [x28, 1]
-	adrp	x5, .LANCHOR77
-	adrp	x6, .LANCHOR153
-	ldr	x0, [x0, #:lo12:.LANCHOR74]
-	strb	w1, [x0, x27]
-	add	x1, x24, :lo12:.LANCHOR63
-	strb	w23, [x28, 61]
-	ldrh	w7, [x5, #:lo12:.LANCHOR77]
+	mov	x26, x0
+	cbz	x0, .L3497
+.L3524:
+	adrp	x0, .LANCHOR76
+	sxtw	x2, w28
+	ldrb	w1, [x26, 1]
+	adrp	x3, .LANCHOR156
+	ldr	x0, [x0, #:lo12:.LANCHOR76]
+	strb	w1, [x0, x2]
+	add	x1, x24, :lo12:.LANCHOR64
+	strb	w23, [x26, 61]
 	ldrb	w0, [x1, 7]
 	add	w0, w0, 1
 	strb	w0, [x1, 7]
-	add	w0, w26, w20
-	strh	w0, [x28, 48]
-	ldr	w1, [x29, 144]
+	add	w0, w25, w21
+	strh	w0, [x26, 48]
+	adrp	x0, .LANCHOR79
+	ldrh	w4, [x0, #:lo12:.LANCHOR79]
 	ldrb	w0, [x22, 9]
-	mul	w0, w0, w7
+	mul	w0, w0, w4
 	sub	w0, w0, #1
-	cmp	w1, w0
-	bne	.L3367
-	adrp	x0, .LANCHOR152
-	adrp	x4, .LANCHOR78
-	stp	x6, x5, [x29, 96]
-	ldr	x1, [x0, #:lo12:.LANCHOR152]
+	cmp	w28, w0
+	bne	.L3525
+	adrp	x0, .LANCHOR204
+	ldrb	w0, [x0, #:lo12:.LANCHOR204]
+	cbz	w0, .L3526
+	adrp	x0, .LANCHOR224
+	add	x0, x0, :lo12:.LANCHOR224
+	ldrh	w0, [x0, w27, sxtw 1]
+	cmp	w0, w27
+	bcs	.L3526
+	tbnz	x25, 0, .L3525
+.L3526:
+	adrp	x0, .LANCHOR155
+	ldr	x2, [x29, 144]
+	adrp	x5, .LANCHOR80
+	stp	x3, x5, [x29, 96]
+	ldr	x1, [x0, #:lo12:.LANCHOR155]
 	mov	w0, -1
-	str	x4, [x29, 144]
-	str	w0, [x1, x27, lsl 2]
-	ldr	x0, [x28, 8]
-	ldrb	w2, [x4, #:lo12:.LANCHOR78]
-	mul	w2, w2, w7
+	adrp	x28, .LANCHOR125
+	str	w0, [x1, x2, lsl 2]
+	ldr	x0, [x26, 8]
+	ldrb	w2, [x5, #:lo12:.LANCHOR80]
+	mul	w2, w2, w4
 	lsl	w2, w2, 2
 	bl	ftl_memcpy
-	ldp	x6, x5, [x29, 96]
-	ldr	x4, [x29, 144]
-	ldr	x7, [x28, 8]
-	ldrh	w0, [x5, #:lo12:.LANCHOR77]
-	ldrb	w1, [x4, #:lo12:.LANCHOR78]
+	ldp	x3, x5, [x29, 96]
+	ldr	x0, [x29, 120]
+	ldrb	w1, [x5, #:lo12:.LANCHOR80]
+	ldrh	w0, [x0]
 	mul	w0, w0, w1
-	ldr	x1, [x6, #:lo12:.LANCHOR153]
+	adrp	x1, .LANCHOR205
+	ldrb	w1, [x1, #:lo12:.LANCHOR205]
 	lsl	w2, w0, 2
-	add	x0, x7, x0, sxtw 2
+	cbz	w1, .L3527
+	ldrb	w1, [x28, #:lo12:.LANCHOR125]
+	lsl	w1, w1, 9
+	sub	w2, w1, w2
+.L3527:
+	ldr	x1, [x3, #:lo12:.LANCHOR156]
+	ldr	x4, [x26, 8]
+	str	x5, [x29, 104]
+	add	x0, x4, x0, sxtw 2
 	bl	ftl_memcpy
-	adrp	x0, .LANCHOR123
+	ldr	x0, [x26, 24]
 	mov	w1, 0
-	ldrb	w2, [x0, #:lo12:.LANCHOR123]
-	ldr	x0, [x28, 24]
+	ldrb	w2, [x28, #:lo12:.LANCHOR125]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	ldr	x6, [x28, 24]
+	ldr	x6, [x26, 24]
 	mov	w0, 15555
-	ldr	x5, [x29, 104]
 	movk	w0, 0xf55f, lsl 16
-	ldr	x4, [x29, 144]
-	ldrh	w1, [x5, #:lo12:.LANCHOR77]
+	ldr	x5, [x29, 104]
 	str	w0, [x6]
-	ldrb	w0, [x4, #:lo12:.LANCHOR78]
+	ldr	x0, [x29, 120]
+	ldrh	w1, [x0]
+	ldrb	w0, [x5, #:lo12:.LANCHOR80]
 	mul	w1, w1, w0
-	ldr	x0, [x28, 8]
+	ldr	x0, [x26, 8]
 	lsl	w1, w1, 2
 	bl	js_hash
 	str	w0, [x6, 4]
@@ -21335,254 +22685,347 @@ gc_do_copy_back:
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x0, 132]
 	str	w0, [x6, 8]
-.L3365:
-	adrp	x0, .LANCHOR74
-	ldr	w5, [x29, 156]
-	add	x1, x29, 160
-	ldr	x4, [x0, #:lo12:.LANCHOR74]
-	adrp	x0, .LANCHOR50
-	add	x3, x0, :lo12:.LANCHOR50
-	ldrb	w2, [x4, x27]
-	ubfiz	x0, x2, 6, 8
-	add	x0, x3, x0
-	add	x3, x3, x2, lsl 6
-	str	x0, [x1, w5, sxtw 3]
+.L3523:
+	adrp	x0, .LANCHOR76
+	ldr	w2, [x29, 156]
+	add	x28, x29, 160
+	adrp	x1, .LANCHOR52
+	ldr	x3, [x0, #:lo12:.LANCHOR76]
+	add	x5, x1, :lo12:.LANCHOR52
+	ldr	x0, [x29, 144]
+	ldrb	w0, [x3, x0]
+	ubfiz	x4, x0, 6, 8
+	add	x4, x5, x4
+	str	x4, [x28, w2, sxtw 3]
+	sxtw	x2, w0
 	mov	w0, 2
-	adrp	x5, .LANCHOR154
-	strh	w0, [x3, 50]
+	add	x5, x5, x2, lsl 6
+	strh	w0, [x5, 50]
 	ldr	x0, [x29, 128]
-	strb	w23, [x3, 61]
-	ldrb	w0, [x0, #:lo12:.LANCHOR71]
+	strb	w23, [x5, 61]
+	ldrb	w0, [x0, #:lo12:.LANCHOR73]
 	cmp	w0, 3
-	bne	.L3371
-	udiv	w0, w26, w0
-	adrp	x6, .LANCHOR103
-	ldrh	w6, [x6, #:lo12:.LANCHOR103]
-	add	w1, w0, w19
-	add	w0, w0, w0, lsl 1
-	add	x1, x22, x1, sxtw 1
-	sub	w0, w26, w0
-	and	w0, w0, 65535
-	add	w0, w0, 1
-	ldrh	w1, [x1, 16]
-	mul	w1, w1, w6
-	ldrh	w6, [x3, 48]
-	orr	w1, w1, w21
-	str	w1, [x3, 40]
-	ldr	x3, [x5, #:lo12:.LANCHOR154]
-	orr	w0, w1, w0, lsl 24
-	str	w0, [x3, x6, lsl 2]
-.L3372:
-	ldr	x0, [x29, 112]
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3375
-	ldr	x0, [x29, 120]
-	ldrb	w4, [x4, x27]
-	ldr	w1, [x29, 156]
-	add	x2, x0, x2, lsl 6
-	add	x0, x24, :lo12:.LANCHOR63
-	ldrb	w3, [x0, 6]
-	ldr	x0, [x2, 24]
-	ldrb	w7, [x2, 1]
-	ldrh	w6, [x2, 48]
-	ldr	w0, [x0, 4]
-	str	w0, [sp, 8]
-	mov	w0, 3
-	udiv	w26, w26, w0
-	adrp	x0, .LC235
-	add	x0, x0, :lo12:.LC235
-	add	w26, w26, w19
-	str	w26, [sp]
-	ldr	w5, [x2, 40]
-	mov	w2, w23
-	bl	printf
-.L3375:
-	ldr	w0, [x29, 152]
-	add	w0, w0, 1
-	str	w0, [x29, 152]
-	b	.L3364
-.L3367:
-	lsl	x0, x27, 2
-	str	x0, [x29, 144]
-	ldr	x0, [x6, #:lo12:.LANCHOR153]
-	lsl	x1, x27, 2
-	ldr	w0, [x0, x1]
+	bne	.L3531
+	adrp	x4, .LANCHOR35
+	ldrb	w4, [x4, #:lo12:.LANCHOR35]
+	cbz	w4, .L3532
+	adrp	x0, .LANCHOR204
+	and	w5, w25, 1
+	add	w6, w5, w27
+	ldrb	w0, [x0, #:lo12:.LANCHOR204]
+	cbz	w0, .L3533
+	adrp	x4, .LANCHOR224
+	add	x4, x4, :lo12:.LANCHOR224
+	ldrh	w4, [x4, w27, sxtw 1]
+	cmp	w4, w27
+	bcs	.L3533
+	cmp	w5, 0
+	csel	w6, w6, w4, eq
+.L3533:
+	udiv	w4, w25, w19
+	add	x5, x1, :lo12:.LANCHOR52
+	add	x5, x5, x2, lsl 6
+	add	w4, w4, w20
+	add	x4, x22, x4, sxtw 1
+	ldrh	w0, [x4, 16]
+	adrp	x4, .LANCHOR105
+	ldrh	w4, [x4, #:lo12:.LANCHOR105]
+	madd	w0, w0, w4, w6
+	orr	w0, w0, 50331648
+.L3636:
+	str	w0, [x5, 40]
+.L3537:
+	add	x0, x1, :lo12:.LANCHOR52
+	add	x0, x0, x2, lsl 6
+	ldrh	w4, [x0, 48]
+	ldr	w5, [x0, 40]
+	adrp	x0, .LANCHOR157
+	ldr	x0, [x0, #:lo12:.LANCHOR157]
+	str	w5, [x0, x4, lsl 2]
+	b	.L3535
+.L3525:
+	ldr	x0, [x29, 144]
 	mov	w1, 1
-	str	w0, [x28, 40]
-	mov	x0, x28
+	lsl	x28, x0, 2
+	ldr	x0, [x3, #:lo12:.LANCHOR156]
+	ldr	w0, [x0, x28]
+	str	w0, [x26, 40]
+	mov	x0, x26
 	bl	sblk_read_page
-	ldr	w0, [x28, 52]
+	ldr	w0, [x26, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3369
-	adrp	x0, .LANCHOR66
-	ldr	w1, [x28, 40]
-	ldrh	w4, [x0, #:lo12:.LANCHOR66]
-	mov	w0, 21
-	sub	w2, w0, w4
+	bne	.L3529
+	adrp	x0, .LANCHOR68
+	ldrh	w2, [x0, #:lo12:.LANCHOR68]
+	adrp	x0, .LANCHOR31
+	ldrb	w1, [x0, #:lo12:.LANCHOR31]
+	mov	w0, 24
+	sub	w0, w0, w1
+	sub	w1, w0, w2
 	mov	w0, 1
-	lsr	w1, w1, w4
-	lsl	w0, w0, w2
+	lsl	w0, w0, w1
+	ldr	w1, [x26, 40]
 	sub	w0, w0, #1
+	lsr	w1, w1, w2
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR67
-	ldrb	w2, [x1, #:lo12:.LANCHOR67]
+	adrp	x1, .LANCHOR69
+	ldrb	w2, [x1, #:lo12:.LANCHOR69]
 	mov	x1, 0
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
-	ldr	w0, [x28, 52]
+	ldr	w0, [x26, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3369
-	ldr	x0, [x28, 24]
+	bne	.L3529
+	ldr	x0, [x26, 24]
 	mov	w1, -1
 	str	w1, [x0, 4]
-	ldr	w0, [x28, 52]
+	ldr	w0, [x26, 52]
 	cmp	w0, 512
 	ccmp	w0, w1, 4, ne
-	bne	.L3369
-	adrp	x1, .LANCHOR218
+	bne	.L3529
+	adrp	x1, .LANCHOR223
 	adrp	x0, .LC0
-	mov	w2, 846
-	add	x1, x1, :lo12:.LANCHOR218
+	mov	w2, 1002
+	add	x1, x1, :lo12:.LANCHOR223
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3369:
-	ldr	x0, [x28, 24]
-	adrp	x1, .LANCHOR120
-	ldr	w1, [x1, #:lo12:.LANCHOR120]
-	ldr	w2, [x0, 4]
-	cmp	w2, w1
-	bcc	.L3370
+.L3529:
+	ldr	x0, [x26, 24]
+	adrp	x1, .LANCHOR122
+	ldr	w1, [x1, #:lo12:.LANCHOR122]
+	ldr	w2, [x0, 4]
+	cmp	w2, w1
+	bcc	.L3530
+	mov	w1, -1
+	str	w1, [x0, 4]
+.L3530:
+	adrp	x1, .LANCHOR155
+	ldr	w2, [x0, 4]
+	ldr	x1, [x1, #:lo12:.LANCHOR155]
+	str	w2, [x1, x28]
+	ldr	w1, [x26, 40]
+	str	w1, [x0, 8]
+	b	.L3523
+.L3532:
+	udiv	w0, w25, w0
+	adrp	x6, .LANCHOR105
+	ldrh	w6, [x6, #:lo12:.LANCHOR105]
+	add	w4, w0, w20
+	add	w0, w0, w0, lsl 1
+	add	x4, x22, x4, sxtw 1
+	sub	w0, w25, w0
+	and	w0, w0, 65535
+	add	w0, w0, 1
+	ldrh	w4, [x4, 16]
+	mul	w4, w4, w6
+	ldrh	w6, [x5, 48]
+	orr	w4, w4, w27
+	str	w4, [x5, 40]
+	adrp	x5, .LANCHOR157
+	orr	w0, w4, w0, lsl 24
+	ldr	x5, [x5, #:lo12:.LANCHOR157]
+	str	w0, [x5, x6, lsl 2]
+.L3535:
+	ldr	x0, [x29, 112]
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L3538
+	add	x0, x1, :lo12:.LANCHOR52
+	ldr	x1, [x29, 144]
+	add	x0, x0, x2, lsl 6
+	mov	w2, w23
+	ldrb	w4, [x3, x1]
+	add	x1, x24, :lo12:.LANCHOR64
+	ldrb	w7, [x0, 1]
+	ldrh	w6, [x0, 48]
+	ldrb	w3, [x1, 6]
+	ldr	x1, [x26, 24]
+	ldr	w1, [x1]
+	str	w1, [sp, 16]
+	ldr	x1, [x0, 24]
+	ldr	w1, [x1, 4]
+	str	w1, [sp, 8]
+	mov	w1, 3
+	udiv	w1, w25, w1
+	add	w1, w1, w20
+	str	w1, [sp]
+	ldr	w1, [x29, 156]
+	ldr	w5, [x0, 40]
+	adrp	x0, .LC241
+	add	x0, x0, :lo12:.LC241
+	bl	printf
+.L3538:
+	adrp	x0, .LANCHOR204
+	ldrb	w0, [x0, #:lo12:.LANCHOR204]
+	cbz	w0, .L3539
+	adrp	x0, .LANCHOR224
+	add	x0, x0, :lo12:.LANCHOR224
+	ldrh	w0, [x0, w27, sxtw 1]
+	cmp	w0, w27
+	bcs	.L3539
+	tbz	x25, 0, .L3539
+	adrp	x0, .LANCHOR76
+	ldr	x2, [x29, 144]
 	mov	w1, -1
-	str	w1, [x0, 4]
-.L3370:
-	adrp	x1, .LANCHOR152
-	lsl	x3, x27, 2
-	ldr	w2, [x0, 4]
-	ldr	x1, [x1, #:lo12:.LANCHOR152]
-	str	w2, [x1, x3]
-	ldr	w1, [x28, 40]
-	str	w1, [x0, 8]
-	b	.L3365
-.L3371:
+	ldr	x0, [x0, #:lo12:.LANCHOR76]
+	strb	w1, [x0, x2]
+	ldr	w0, [x29, 156]
+	ldr	x1, [x28, w0, sxtw 3]
+	ldrb	w0, [x22, 9]
+	ubfiz	w0, w0, 1, 15
+	ldrb	w2, [x1, 1]
+	msub	w0, w19, w0, w21
+	and	w0, w0, 65535
+	strh	w0, [x1, 48]
+	adrp	x1, .LANCHOR76
+	and	x0, x0, 65535
+	ldr	x1, [x1, #:lo12:.LANCHOR76]
+	strb	w2, [x1, x0]
+	adrp	x0, .LANCHOR156
+	ldr	x2, [x29, 144]
+	mov	w1, -1
+	ldr	x0, [x0, #:lo12:.LANCHOR156]
+	str	w1, [x0, x2, lsl 2]
+.L3539:
+	ldr	w0, [x29, 152]
+	add	w0, w0, 1
+	str	w0, [x29, 152]
+	b	.L3522
+.L3531:
 	cmp	w0, 2
-	bne	.L3373
-	adrp	x0, .LANCHOR72
-	adrp	x1, .LANCHOR103
-	ldrb	w0, [x0, #:lo12:.LANCHOR72]
-	cbnz	w0, .L3374
+	bne	.L3537
+	adrp	x0, .LANCHOR74
+	adrp	x4, .LANCHOR105
+	ldrb	w0, [x0, #:lo12:.LANCHOR74]
+	cbnz	w0, .L3536
 	ldr	w0, [x29, 156]
-	ldrh	w1, [x1, #:lo12:.LANCHOR103]
-	add	w0, w19, w0
+	ldrh	w4, [x4, #:lo12:.LANCHOR105]
+	add	w0, w20, w0
 	add	x0, x22, x0, sxtw 1
 	ldrh	w0, [x0, 16]
-	madd	w0, w0, w1, w21
-.L3435:
+	madd	w0, w0, w4, w27
+.L3637:
 	orr	w0, w0, 33554432
-	str	w0, [x3, 40]
-.L3373:
-	ldr	x0, [x29, 120]
-	add	x0, x0, x2, lsl 6
-	ldrh	w1, [x0, 48]
-	ldr	w3, [x0, 40]
-	ldr	x0, [x5, #:lo12:.LANCHOR154]
-	str	w3, [x0, x1, lsl 2]
-	b	.L3372
-.L3374:
-	add	w0, w19, w26, lsr 1
-	ldrh	w1, [x1, #:lo12:.LANCHOR103]
+	b	.L3636
+.L3536:
+	add	w0, w20, w25, lsr 1
+	ldrh	w4, [x4, #:lo12:.LANCHOR105]
 	add	x0, x22, x0, sxtw 1
 	ldrh	w0, [x0, 16]
-	madd	w0, w0, w1, w21
-	and	w1, w26, 1
-	add	w0, w0, w1
-	b	.L3435
-.L3378:
+	madd	w0, w0, w4, w27
+	and	w4, w25, 1
+	add	w0, w0, w4
+	b	.L3637
+.L3544:
+	ldr	x4, [x0, w2, sxtw 3]
+	add	w2, w2, 1
+	ldr	x5, [x0, w2, sxtw 3]
+	and	w2, w2, 65535
+	ldrb	w5, [x5, 1]
+	strb	w5, [x4]
+	b	.L3543
+.L3542:
+	adrp	x1, .LANCHOR77
+	ldrb	w3, [x1, #:lo12:.LANCHOR77]
+	ldr	x1, [x29, 160]
+	cbz	w3, .L3546
+.L3549:
+	strb	wzr, [x1, 60]
+	b	.L3548
+.L3546:
 	cmp	w23, 1
-	bne	.L3380
-	mov	w2, 9
-.L3434:
-	strb	w2, [x3, 60]
-.L3379:
-	mov	w2, w1
+	bne	.L3547
+	mov	w3, 9
+.L3638:
+	strb	w3, [x1, 60]
+.L3548:
 	add	x1, x0, 24
 	bl	sblk_xlc_prog_pages
-.L3382:
-	adrp	x1, .LANCHOR75
-	ldrb	w3, [x22, 9]
-	ldrb	w1, [x1, #:lo12:.LANCHOR75]
-	and	w0, w3, 65535
-	cbz	w1, .L3387
-	add	w0, w0, w0, lsl 1
-.L3388:
-	adrp	x1, .LANCHOR102
-	add	x24, x24, :lo12:.LANCHOR63
-	ldr	x1, [x1, #:lo12:.LANCHOR102]
-	ldr	w2, [x1, 52]
-	add	w2, w2, w0
-	str	w2, [x1, 52]
-	ldrh	w1, [x24, 314]
-	add	w0, w0, w1
-	adrp	x1, .LANCHOR77
-	and	w0, w0, 65535
-	strh	w0, [x24, 314]
-	ldrh	w1, [x1, #:lo12:.LANCHOR77]
-	mul	w1, w1, w3
-	cmp	w0, w1
-	blt	.L3389
+.L3545:
+	adrp	x0, .LANCHOR77
+	ldrb	w0, [x0, #:lo12:.LANCHOR77]
+	cbz	w0, .L3554
+	ldrb	w19, [x22, 9]
+	add	w19, w19, w19, lsl 1
+	and	w19, w19, 1023
+.L3555:
+	adrp	x0, .LANCHOR104
+	add	x24, x24, :lo12:.LANCHOR64
+	ldr	x1, [x0, #:lo12:.LANCHOR104]
+	ldr	w0, [x1, 52]
+	add	w0, w0, w19
+	str	w0, [x1, 52]
+	ldrh	w0, [x24, 570]
+	add	w19, w19, w0
+	adrp	x0, .LANCHOR79
+	and	w19, w19, 65535
+	strh	w19, [x24, 570]
+	ldrh	w0, [x0, #:lo12:.LANCHOR79]
+	ldrb	w1, [x22, 9]
+	mul	w0, w0, w1
+	cmp	w19, w0
+	blt	.L3558
 	ldr	x0, [x29, 136]
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	strh	wzr, [x0, 86]
-.L3389:
+.L3558:
 	bl	gc_write_completed
-	b	.L3344
-.L3380:
+	b	.L3497
+.L3547:
 	cmp	w23, 2
-	bne	.L3381
-	mov	w2, 13
-	b	.L3434
-.L3377:
-	adrp	x2, .LANCHOR72
-	ldrb	w2, [x2, #:lo12:.LANCHOR72]
-	cbz	w2, .L3392
-	adrp	x2, .LANCHOR73
-	ldrb	w2, [x2, #:lo12:.LANCHOR73]
-	cbnz	w2, .L3384
-.L3383:
-	sub	w1, w3, #1
-.L3385:
-	cmp	w2, w1
-	blt	.L3386
-	ldr	x0, [x0, w1, sxtw 3]
-	mov	w1, -1
-	strb	w1, [x0]
-	mov	w1, w3
-	ldr	x0, [x29, 160]
-	bl	sblk_prog_page
-	b	.L3382
-.L3392:
+	bne	.L3549
+	mov	w3, 13
+	b	.L3638
+.L3541:
+	adrp	x3, .LANCHOR74
+	ldrb	w3, [x3, #:lo12:.LANCHOR74]
+	cbz	w3, .L3567
+	adrp	x3, .LANCHOR75
+	ldrb	w3, [x3, #:lo12:.LANCHOR75]
+	cbnz	w3, .L3551
+.L3567:
+	sub	w3, w1, #1
 	mov	w2, 0
-	b	.L3383
-.L3384:
-	bl	sblk_3d_mlc_prog_pages
-	b	.L3382
-.L3386:
+.L3552:
+	cmp	w2, w3
+	bge	.L3639
 	ldr	x4, [x0, w2, sxtw 3]
 	add	w2, w2, 1
 	ldr	x5, [x0, w2, sxtw 3]
 	and	w2, w2, 65535
 	ldrb	w5, [x5, 1]
 	strb	w5, [x4]
-	b	.L3385
-.L3387:
-	adrp	x1, .LANCHOR72
-	ldrb	w2, [x1, #:lo12:.LANCHOR72]
-	mov	w1, w0
-	ubfiz	w0, w0, 1, 15
-	cmp	w2, 0
-	csel	w0, w0, w1, ne
-	b	.L3388
+	b	.L3552
+.L3551:
+	mov	w1, w2
+	bl	sblk_3d_mlc_prog_pages
+	b	.L3545
+.L3554:
+	adrp	x0, .LANCHOR74
+	ldrb	w0, [x0, #:lo12:.LANCHOR74]
+	cbz	w0, .L3556
+	ldrb	w19, [x22, 9]
+	ubfiz	w19, w19, 1, 8
+	b	.L3555
+.L3556:
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbz	w0, .L3557
+	adrp	x0, .LANCHOR204
+	ldrb	w1, [x22, 9]
+	ldrb	w0, [x0, #:lo12:.LANCHOR204]
+	mul	w19, w1, w19
+	cbz	w0, .L3555
+	adrp	x0, .LANCHOR224
+	add	x0, x0, :lo12:.LANCHOR224
+	ldrh	w0, [x0, w27, sxtw 1]
+	cmp	w0, w27
+	csel	w19, w19, w1, cs
+	b	.L3555
+.L3557:
+	ldrb	w19, [x22, 9]
+	b	.L3555
 	.size	gc_do_copy_back, .-gc_do_copy_back
 	.section	.text.zftl_do_gc,"ax",@progbits
 	.align	2
@@ -21590,247 +23033,247 @@ gc_do_copy_back:
 	.type	zftl_do_gc, %function
 zftl_do_gc:
 	sub	sp, sp, #128
-	adrp	x1, .LANCHOR99
+	adrp	x1, .LANCHOR101
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x19, x20, [sp, 32]
-	adrp	x19, .LANCHOR150
+	adrp	x19, .LANCHOR153
 	stp	x21, x22, [sp, 48]
-	ldrh	w22, [x1, #:lo12:.LANCHOR99]
-	adrp	x1, .LANCHOR95
+	ldrh	w22, [x1, #:lo12:.LANCHOR101]
+	adrp	x1, .LANCHOR97
 	stp	x23, x24, [sp, 64]
 	adrp	x23, .LANCHOR10
-	ldrh	w21, [x1, #:lo12:.LANCHOR95]
+	ldrh	w21, [x1, #:lo12:.LANCHOR97]
 	stp	x25, x26, [sp, 80]
-	ldrb	w1, [x19, #:lo12:.LANCHOR150]
+	ldrb	w1, [x19, #:lo12:.LANCHOR153]
 	add	w21, w22, w21
 	stp	x27, x28, [sp, 96]
 	ldr	x20, [x23, #:lo12:.LANCHOR10]
 	cmp	w1, 6
-	bhi	.L3544
+	bhi	.L3750
 	mov	w25, w0
 	and	w21, w21, 65535
-	adrp	x0, .L3439
-	add	x0, x0, :lo12:.L3439
+	adrp	x0, .L3643
+	add	x0, x0, :lo12:.L3643
 	ldrh	w0, [x0,w1,uxtw #1]
-	adr	x1, .Lrtx3439
+	adr	x1, .Lrtx3643
 	add	x0, x1, w0, sxth #2
 	br	x0
-.Lrtx3439:
+.Lrtx3643:
 	.section	.rodata.zftl_do_gc,"a",@progbits
 	.align	0
 	.align	2
-.L3439:
-	.2byte	(.L3438 - .Lrtx3439) / 4
-	.2byte	(.L3440 - .Lrtx3439) / 4
-	.2byte	(.L3441 - .Lrtx3439) / 4
-	.2byte	(.L3442 - .Lrtx3439) / 4
-	.2byte	(.L3443 - .Lrtx3439) / 4
-	.2byte	(.L3444 - .Lrtx3439) / 4
-	.2byte	(.L3445 - .Lrtx3439) / 4
+.L3643:
+	.2byte	(.L3642 - .Lrtx3643) / 4
+	.2byte	(.L3644 - .Lrtx3643) / 4
+	.2byte	(.L3645 - .Lrtx3643) / 4
+	.2byte	(.L3646 - .Lrtx3643) / 4
+	.2byte	(.L3647 - .Lrtx3643) / 4
+	.2byte	(.L3648 - .Lrtx3643) / 4
+	.2byte	(.L3649 - .Lrtx3643) / 4
 	.section	.text.zftl_do_gc
-.L3444:
-	adrp	x20, .LANCHOR63
-	add	x24, x20, :lo12:.LANCHOR63
+.L3648:
+	adrp	x20, .LANCHOR64
+	add	x24, x20, :lo12:.LANCHOR64
 	mov	w22, 0
-.L3446:
+.L3650:
 	bl	gc_check_data_one_wl
-	cbz	w0, .L3540
+	cbz	w0, .L3746
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
-	add	x20, x20, :lo12:.LANCHOR63
+	add	x20, x20, :lo12:.LANCHOR64
 	strh	wzr, [x20, 56]
 	ldrh	w0, [x0, 80]
 	bl	ftl_free_sblk
-	adrp	x2, .LANCHOR102
+	adrp	x2, .LANCHOR104
 	ldr	x1, [x23, #:lo12:.LANCHOR10]
 	mov	w0, -1
-	ldr	x2, [x2, #:lo12:.LANCHOR102]
+	ldr	x2, [x2, #:lo12:.LANCHOR104]
 	strh	w0, [x1, 80]
 	strh	w0, [x2, 126]
 	strh	w0, [x1, 130]
 	ldr	x0, [x20, 8]
-	bl	buf_free
-	strb	wzr, [x19, #:lo12:.LANCHOR150]
+	bl	zbuf_free
+	strb	wzr, [x19, #:lo12:.LANCHOR153]
 	str	xzr, [x20, 8]
-	b	.L3611
-.L3438:
-	adrp	x0, .LANCHOR97
-	adrp	x27, .LANCHOR90
+	b	.L3820
+.L3642:
+	adrp	x0, .LANCHOR99
+	adrp	x27, .LANCHOR92
 	ldrh	w2, [x20, 80]
-	ldrh	w0, [x0, #:lo12:.LANCHOR97]
-	ldrh	w24, [x27, #:lo12:.LANCHOR90]
+	ldrh	w0, [x0, #:lo12:.LANCHOR99]
+	ldrh	w24, [x27, #:lo12:.LANCHOR92]
 	add	w22, w22, w0
-	adrp	x0, .LANCHOR88
+	adrp	x0, .LANCHOR90
 	str	x0, [x29, 104]
 	and	w22, w22, 65535
-	ldrh	w1, [x0, #:lo12:.LANCHOR88]
+	ldrh	w1, [x0, #:lo12:.LANCHOR90]
 	add	w24, w24, w1
 	mov	w1, 65535
 	and	w24, w24, 65535
 	cmp	w2, w1
-	beq	.L3447
-	cbnz	w25, .L3448
-	adrp	x0, .LANCHOR79
-	ldrh	w0, [x0, #:lo12:.LANCHOR79]
+	beq	.L3651
+	cbnz	w25, .L3652
+	adrp	x0, .LANCHOR81
+	ldrh	w0, [x0, #:lo12:.LANCHOR81]
 	cmp	w21, w0, lsl 1
-	blt	.L3448
-.L3544:
+	blt	.L3652
+.L3750:
 	mov	w20, 16
-	b	.L3436
-.L3448:
-	adrp	x5, .LANCHOR87
+	b	.L3640
+.L3652:
+	adrp	x5, .LANCHOR89
 	mov	w1, 5
-	adrp	x25, .LANCHOR76
-	ldrh	w0, [x5, #:lo12:.LANCHOR87]
+	adrp	x25, .LANCHOR78
+	ldrh	w0, [x5, #:lo12:.LANCHOR89]
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	strh	w0, [x5, #:lo12:.LANCHOR87]
+	strh	w0, [x5, #:lo12:.LANCHOR89]
 	bl	zftl_get_gc_node
 	and	w3, w0, 65535
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L3449
+	beq	.L3653
 	adrp	x4, .LANCHOR9
 	ubfiz	x3, x3, 1, 16
-	adrp	x1, .LANCHOR151
+	adrp	x1, .LANCHOR154
 	mov	x26, x1
 	ldr	x4, [x4, #:lo12:.LANCHOR9]
-	ldr	w2, [x1, #:lo12:.LANCHOR151]
+	ldr	w2, [x1, #:lo12:.LANCHOR154]
 	add	w2, w2, 1
-	str	w2, [x1, #:lo12:.LANCHOR151]
+	str	w2, [x1, #:lo12:.LANCHOR154]
 	ldrh	w3, [x4, x3]
-	adrp	x4, .LANCHOR85
-	ldrh	w4, [x4, #:lo12:.LANCHOR85]
+	adrp	x4, .LANCHOR87
+	ldrh	w4, [x4, #:lo12:.LANCHOR87]
 	cmp	w4, w3
-	bcs	.L3450
+	bcs	.L3654
 	adrp	x1, .LANCHOR6
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	cmp	w2, w1, lsr 4
-	bls	.L3449
-	adrp	x1, .LANCHOR91
-	ldrh	w1, [x1, #:lo12:.LANCHOR91]
+	bls	.L3653
+	adrp	x1, .LANCHOR93
+	ldrh	w1, [x1, #:lo12:.LANCHOR93]
 	cmp	w1, w3
-	bls	.L3449
-.L3450:
-	ldrb	w2, [x25, #:lo12:.LANCHOR76]
+	bls	.L3653
+.L3654:
+	ldrb	w2, [x25, #:lo12:.LANCHOR78]
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L3451
+	cbz	w0, .L3655
 	mov	w0, 1
-	str	wzr, [x26, #:lo12:.LANCHOR151]
-	strb	w0, [x19, #:lo12:.LANCHOR150]
-	b	.L3544
-.L3449:
-	strh	wzr, [x5, #:lo12:.LANCHOR87]
-.L3451:
+	str	wzr, [x26, #:lo12:.LANCHOR154]
+	strb	w0, [x19, #:lo12:.LANCHOR153]
+	b	.L3750
+.L3653:
+	strh	wzr, [x5, #:lo12:.LANCHOR89]
+.L3655:
 	cmp	w22, 15
-	bls	.L3546
-	adrp	x0, .LANCHOR92
-	ldrh	w1, [x0, #:lo12:.LANCHOR92]
-	adrp	x0, .LANCHOR93
-	ldrh	w0, [x0, #:lo12:.LANCHOR93]
+	bls	.L3752
+	adrp	x0, .LANCHOR94
+	ldrh	w1, [x0, #:lo12:.LANCHOR94]
+	adrp	x0, .LANCHOR95
+	ldrh	w0, [x0, #:lo12:.LANCHOR95]
 	cmp	w1, w0
-	bhi	.L3546
+	bhi	.L3752
 	cmp	w24, 0
 	cset	w24, eq
 	add	w24, w24, 1
-.L3452:
+.L3656:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3453
+	tbz	x0, 8, .L3657
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	mov	w4, w22
-	ldrb	w2, [x25, #:lo12:.LANCHOR76]
+	ldrb	w2, [x25, #:lo12:.LANCHOR78]
 	mov	w3, w21
-	mov	w1, 1982
+	mov	w1, 2170
 	ldrh	w7, [x0, 122]
 	ldrh	w6, [x0, 120]
 	ldrh	w5, [x0, 124]
 	ldrh	w0, [x20, 80]
 	str	w0, [sp]
-	adrp	x0, .LC236
-	add	x0, x0, :lo12:.LC236
+	adrp	x0, .LC242
+	add	x0, x0, :lo12:.LC242
 	bl	printf
-.L3453:
-	ldrb	w0, [x25, #:lo12:.LANCHOR76]
+.L3657:
+	ldrb	w0, [x25, #:lo12:.LANCHOR78]
 	mov	w2, 1
 	mov	w1, w24
 	bl	gc_search_src_blk
 	cmp	w0, 0
-	ble	.L3454
-.L3455:
+	ble	.L3658
+.L3659:
 	mov	w0, 1
-.L3613:
-	strb	w0, [x19, #:lo12:.LANCHOR150]
-	b	.L3544
-.L3546:
+.L3822:
+	strb	w0, [x19, #:lo12:.LANCHOR153]
+	b	.L3750
+.L3752:
 	mov	w24, 2
-	b	.L3452
-.L3454:
-	ldrb	w0, [x25, #:lo12:.LANCHOR76]
+	b	.L3656
+.L3658:
+	ldrb	w0, [x25, #:lo12:.LANCHOR78]
 	mov	w2, 1
 	mov	w1, 3
 	bl	gc_search_src_blk
 	cmp	w0, 0
-	bgt	.L3455
-	b	.L3544
-.L3447:
+	bgt	.L3659
+	b	.L3750
+.L3651:
 	adrp	x28, .LANCHOR14
 	ldr	w0, [x28, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3457
-	adrp	x0, .LANCHOR76
+	tbz	x0, 8, .L3661
+	adrp	x0, .LANCHOR78
 	ldrh	w7, [x20, 122]
 	ldrh	w6, [x20, 120]
 	mov	w4, w22
 	ldrh	w5, [x20, 124]
 	mov	w3, w21
-	ldrb	w2, [x0, #:lo12:.LANCHOR76]
-	mov	w1, 1994
+	ldrb	w2, [x0, #:lo12:.LANCHOR78]
+	mov	w1, 2182
 	str	w25, [sp]
-	adrp	x0, .LC236
-	add	x0, x0, :lo12:.LC236
+	adrp	x0, .LC242
+	add	x0, x0, :lo12:.LC242
 	bl	printf
-.L3457:
+.L3661:
 	cmp	w25, 1
-	bne	.L3458
+	bne	.L3662
 	bl	gc_scan_static_data
-	adrp	x26, .LANCHOR76
+	adrp	x26, .LANCHOR78
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	ldrh	w0, [x0, 122]
-	cbz	w0, .L3459
-.L3460:
+	cbz	w0, .L3663
+.L3664:
 	mov	w0, 1
-	strb	w0, [x26, #:lo12:.LANCHOR76]
-	b	.L3613
-.L3459:
+	strb	w0, [x26, #:lo12:.LANCHOR78]
+	b	.L3822
+.L3663:
 	bl	gc_static_wearleveling
 	mov	w20, w0
-	cbnz	w0, .L3460
-	cbnz	w22, .L3461
-.L3465:
+	cbnz	w0, .L3664
+	cbnz	w22, .L3665
+.L3669:
 	mov	w20, 16
-.L3462:
+.L3666:
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
-	adrp	x3, .LANCHOR76
+	adrp	x3, .LANCHOR78
 	mov	w1, 1
 	mov	x23, x3
-	strb	w1, [x3, #:lo12:.LANCHOR76]
+	strb	w1, [x3, #:lo12:.LANCHOR78]
 	ldrh	w5, [x0, 124]
-	cbz	w5, .L3470
-	strb	w1, [x19, #:lo12:.LANCHOR150]
+	cbz	w5, .L3674
+	strb	w1, [x19, #:lo12:.LANCHOR153]
 	ldr	w1, [x28, #:lo12:.LANCHOR14]
-	strb	wzr, [x3, #:lo12:.LANCHOR76]
-	tbz	x1, 8, .L3436
+	strb	wzr, [x3, #:lo12:.LANCHOR78]
+	tbz	x1, 8, .L3640
 	ldrh	w7, [x0, 122]
 	mov	w4, w22
 	ldrh	w6, [x0, 120]
 	mov	w3, w21
-	adrp	x0, .LC237
+	adrp	x0, .LC243
 	mov	w2, 0
-	mov	w1, 2084
-	add	x0, x0, :lo12:.LC237
+	mov	w1, 2272
+	add	x0, x0, :lo12:.LC243
 	bl	printf
-.L3436:
+.L3640:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
@@ -21840,221 +23283,221 @@ zftl_do_gc:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 128
 	ret
-.L3461:
+.L3665:
 	cmp	w21, w24
-	adrp	x1, .LANCHOR92
-	adrp	x2, .LANCHOR89
-	bcs	.L3463
-	ldrh	w0, [x2, #:lo12:.LANCHOR89]
+	adrp	x1, .LANCHOR94
+	adrp	x2, .LANCHOR91
+	bcs	.L3667
+	ldrh	w0, [x2, #:lo12:.LANCHOR91]
 	cmp	w0, w21
-	bhi	.L3464
-.L3463:
-	ldrh	w2, [x2, #:lo12:.LANCHOR89]
+	bhi	.L3668
+.L3667:
+	ldrh	w2, [x2, #:lo12:.LANCHOR91]
 	add	w0, w21, w24
 	cmp	w0, w2
-	blt	.L3464
-	adrp	x0, .LANCHOR93
-	ldrh	w2, [x1, #:lo12:.LANCHOR92]
-	ldrh	w0, [x0, #:lo12:.LANCHOR93]
+	blt	.L3668
+	adrp	x0, .LANCHOR95
+	ldrh	w2, [x1, #:lo12:.LANCHOR94]
+	ldrh	w0, [x0, #:lo12:.LANCHOR95]
 	cmp	w2, w0
-	bcc	.L3465
-.L3464:
-	adrp	x5, .LANCHOR151
+	bcc	.L3669
+.L3668:
+	adrp	x5, .LANCHOR154
 	adrp	x2, .LANCHOR6
 	mov	w6, 1
-	strb	w6, [x26, #:lo12:.LANCHOR76]
-	ldr	w0, [x5, #:lo12:.LANCHOR151]
+	strb	w6, [x26, #:lo12:.LANCHOR78]
+	ldr	w0, [x5, #:lo12:.LANCHOR154]
 	ldrh	w2, [x2, #:lo12:.LANCHOR6]
 	add	w0, w0, 1
-	str	w0, [x5, #:lo12:.LANCHOR151]
+	str	w0, [x5, #:lo12:.LANCHOR154]
 	cmp	w0, w2, lsr 5
-	bls	.L3466
-	ldrh	w0, [x1, #:lo12:.LANCHOR92]
+	bls	.L3670
+	ldrh	w0, [x1, #:lo12:.LANCHOR94]
 	cmp	w0, w22
-	bls	.L3466
+	bls	.L3670
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3465
+	beq	.L3669
 	adrp	x1, .LANCHOR9
 	ubfiz	x0, x0, 1, 16
-	adrp	x2, .LANCHOR78
+	adrp	x2, .LANCHOR80
 	ldr	x1, [x1, #:lo12:.LANCHOR9]
-	ldrb	w2, [x2, #:lo12:.LANCHOR78]
+	ldrb	w2, [x2, #:lo12:.LANCHOR80]
 	ldrh	w1, [x1, x0]
-	adrp	x0, .LANCHOR85
-	ldrh	w0, [x0, #:lo12:.LANCHOR85]
+	adrp	x0, .LANCHOR87
+	ldrh	w0, [x0, #:lo12:.LANCHOR87]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	bgt	.L3465
+	bgt	.L3669
 	mov	w0, w6
-	str	wzr, [x5, #:lo12:.LANCHOR151]
+	str	wzr, [x5, #:lo12:.LANCHOR154]
 	mov	w2, 4
 	mov	w1, 2
-.L3601:
+.L3810:
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-	cbz	w0, .L3465
-	b	.L3455
-.L3466:
-	adrp	x0, .LANCHOR93
-	ldrh	w1, [x1, #:lo12:.LANCHOR92]
-	ldrh	w0, [x0, #:lo12:.LANCHOR93]
+	cbz	w0, .L3669
+	b	.L3659
+.L3670:
+	adrp	x0, .LANCHOR95
+	ldrh	w1, [x1, #:lo12:.LANCHOR94]
+	ldrh	w0, [x0, #:lo12:.LANCHOR95]
 	cmp	w1, w0
-	bcc	.L3468
+	bcc	.L3672
 	mov	w2, 1
 	mov	w1, 2
 	mov	w0, w2
-	b	.L3601
-.L3468:
-	ldrh	w0, [x27, #:lo12:.LANCHOR90]
-	cbnz	w0, .L3469
+	b	.L3810
+.L3672:
+	ldrh	w0, [x27, #:lo12:.LANCHOR92]
+	cbnz	w0, .L3673
 	ldr	x0, [x29, 104]
-	ldrh	w0, [x0, #:lo12:.LANCHOR88]
+	ldrh	w0, [x0, #:lo12:.LANCHOR90]
 	cmp	w0, 8
-	bls	.L3462
-.L3469:
+	bls	.L3666
+.L3673:
 	mov	w1, 1
 	mov	w2, 4
 	mov	w0, w1
-	b	.L3601
-.L3458:
-	adrp	x0, .LANCHOR79
-	ldrh	w0, [x0, #:lo12:.LANCHOR79]
+	b	.L3810
+.L3662:
+	adrp	x0, .LANCHOR81
+	ldrh	w0, [x0, #:lo12:.LANCHOR81]
 	cmp	w0, w21
-	bcc	.L3544
-	b	.L3465
-.L3470:
-	adrp	x2, .LANCHOR79
+	bcc	.L3750
+	b	.L3669
+.L3674:
+	adrp	x2, .LANCHOR81
 	mov	x26, x2
-	ldrh	w4, [x2, #:lo12:.LANCHOR79]
+	ldrh	w4, [x2, #:lo12:.LANCHOR81]
 	cmp	w21, w4
-	bcs	.L3471
-	cbz	w22, .L3472
+	bcs	.L3675
+	cbz	w22, .L3676
 	cmp	w22, 16
-	bls	.L3473
-	adrp	x0, .LANCHOR92
-	ldrh	w2, [x0, #:lo12:.LANCHOR92]
-	adrp	x0, .LANCHOR93
-	ldrh	w0, [x0, #:lo12:.LANCHOR93]
+	bls	.L3677
+	adrp	x0, .LANCHOR94
+	ldrh	w2, [x0, #:lo12:.LANCHOR94]
+	adrp	x0, .LANCHOR95
+	ldrh	w0, [x0, #:lo12:.LANCHOR95]
 	cmp	w2, w0
-	bhi	.L3473
+	bhi	.L3677
 	str	x3, [x29, 104]
 	mov	w2, 4
 	mov	w0, w1
 	bl	gc_search_src_blk
 	ldr	x3, [x29, 104]
 	tst	w0, 65535
-	bne	.L3474
-	ldrb	w0, [x3, #:lo12:.LANCHOR76]
+	bne	.L3678
+	ldrb	w0, [x3, #:lo12:.LANCHOR78]
 	mov	w2, 4
 	mov	w1, 3
-.L3607:
+.L3812:
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-.L3475:
-	cbnz	w0, .L3477
-	b	.L3436
-.L3474:
+.L3679:
+	cbnz	w0, .L3681
+	b	.L3640
+.L3678:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	and	w3, w0, 65535
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L3477
+	beq	.L3681
 	adrp	x4, .LANCHOR9
 	ubfiz	x3, x3, 1, 16
-	adrp	x1, .LANCHOR151
+	adrp	x1, .LANCHOR154
 	mov	x21, x1
 	ldr	x4, [x4, #:lo12:.LANCHOR9]
-	ldr	w2, [x1, #:lo12:.LANCHOR151]
+	ldr	w2, [x1, #:lo12:.LANCHOR154]
 	add	w2, w2, 1
-	str	w2, [x1, #:lo12:.LANCHOR151]
+	str	w2, [x1, #:lo12:.LANCHOR154]
 	ldrh	w3, [x4, x3]
-	adrp	x4, .LANCHOR85
-	ldrh	w4, [x4, #:lo12:.LANCHOR85]
+	adrp	x4, .LANCHOR87
+	ldrh	w4, [x4, #:lo12:.LANCHOR87]
 	cmp	w4, w3
-	bcs	.L3478
+	bcs	.L3682
 	adrp	x1, .LANCHOR6
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	cmp	w2, w1, lsr 4
-	bls	.L3477
-	adrp	x1, .LANCHOR91
-	ldrh	w1, [x1, #:lo12:.LANCHOR91]
+	bls	.L3681
+	adrp	x1, .LANCHOR93
+	ldrh	w1, [x1, #:lo12:.LANCHOR93]
 	cmp	w1, w3
-	bls	.L3477
-.L3478:
-	ldrb	w2, [x23, #:lo12:.LANCHOR76]
+	bls	.L3681
+.L3682:
+	ldrb	w2, [x23, #:lo12:.LANCHOR78]
 	mov	w1, 0
 	bl	gc_add_sblk
-	str	wzr, [x21, #:lo12:.LANCHOR151]
-	adrp	x0, .LANCHOR114
+	str	wzr, [x21, #:lo12:.LANCHOR154]
+	adrp	x0, .LANCHOR116
 	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR114]
-.L3477:
+	str	w1, [x0, #:lo12:.LANCHOR116]
+.L3681:
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR150]
-	b	.L3436
-.L3473:
+	strb	w0, [x19, #:lo12:.LANCHOR153]
+	b	.L3640
+.L3677:
 	mov	w2, 1
 	mov	w0, w2
 	mov	w1, 2
-.L3610:
+.L3819:
 	bl	gc_search_src_blk
 	tst	w0, 65535
-	bne	.L3477
+	bne	.L3681
 	mov	w2, 2
-	b	.L3603
-.L3472:
+.L3815:
+	mov	w1, 3
+	ldrb	w0, [x23, #:lo12:.LANCHOR78]
+	b	.L3812
+.L3676:
 	ldr	w1, [x28, #:lo12:.LANCHOR14]
-	strb	wzr, [x3, #:lo12:.LANCHOR76]
-	tbz	x1, 8, .L3480
+	strb	wzr, [x3, #:lo12:.LANCHOR78]
+	tbz	x1, 8, .L3684
 	ldrh	w7, [x0, 122]
 	mov	w5, 0
 	ldrh	w6, [x0, 120]
 	mov	w4, 0
-	adrp	x0, .LC237
+	adrp	x0, .LC243
 	mov	w3, w21
 	mov	w2, 0
-	mov	w1, 2114
-	add	x0, x0, :lo12:.LC237
+	mov	w1, 2302
+	add	x0, x0, :lo12:.LC243
 	bl	printf
-.L3480:
+.L3684:
 	cmp	w21, 16
-	bls	.L3481
+	bls	.L3685
 	mov	w2, 4
-.L3603:
-	mov	w1, 3
-	ldrb	w0, [x23, #:lo12:.LANCHOR76]
-	b	.L3607
-.L3481:
+	b	.L3815
+.L3685:
 	mov	w2, 1
-	ldrb	w0, [x23, #:lo12:.LANCHOR76]
+	ldrb	w0, [x23, #:lo12:.LANCHOR78]
 	mov	w1, w2
-	b	.L3610
-.L3471:
+	b	.L3819
+.L3675:
 	cmp	w25, 1
-	bne	.L3436
+	bne	.L3640
 	cmp	w21, w4, lsl 1
-	bge	.L3482
+	bge	.L3686
 	cmp	w24, w22, lsr 1
-	bcs	.L3483
-	adrp	x0, .LANCHOR92
-	ldrh	w1, [x0, #:lo12:.LANCHOR92]
-	adrp	x0, .LANCHOR93
-	ldrh	w0, [x0, #:lo12:.LANCHOR93]
+	bcs	.L3687
+	adrp	x0, .LANCHOR94
+	ldrh	w1, [x0, #:lo12:.LANCHOR94]
+	adrp	x0, .LANCHOR95
+	ldrh	w0, [x0, #:lo12:.LANCHOR95]
 	cmp	w1, w0
-	bcs	.L3483
-	adrp	x0, .LANCHOR89
-	ldrh	w0, [x0, #:lo12:.LANCHOR89]
+	bcs	.L3687
+	adrp	x0, .LANCHOR91
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	lsr	w0, w0, 2
-	strh	w0, [x2, #:lo12:.LANCHOR79]
-	b	.L3436
-.L3483:
+	strh	w0, [x2, #:lo12:.LANCHOR81]
+	b	.L3640
+.L3687:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
@@ -22062,440 +23505,451 @@ zftl_do_gc:
 	mov	w1, 65535
 	mov	w28, w25
 	cmp	w25, w1
-	bne	.L3484
-.L3489:
+	bne	.L3688
+.L3693:
 	cmp	w22, 1
-	bhi	.L3485
-.L3486:
+	bhi	.L3689
+.L3690:
 	cmp	w21, w24
-	adrp	x21, .LANCHOR89
-	bcs	.L3493
-	strb	wzr, [x23, #:lo12:.LANCHOR76]
+	adrp	x21, .LANCHOR91
+	bcs	.L3697
+	strb	wzr, [x23, #:lo12:.LANCHOR78]
 	mov	w0, 4
 	bl	zftl_get_gc_node.part.9
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3493
+	beq	.L3697
 	adrp	x1, .LANCHOR9
 	ubfiz	x0, x0, 1, 16
-	adrp	x2, .LANCHOR78
+	adrp	x2, .LANCHOR80
 	ldr	x1, [x1, #:lo12:.LANCHOR9]
-	ldrb	w2, [x2, #:lo12:.LANCHOR78]
+	ldrb	w2, [x2, #:lo12:.LANCHOR80]
 	ldrh	w1, [x1, x0]
-	adrp	x0, .LANCHOR85
-	ldrh	w0, [x0, #:lo12:.LANCHOR85]
+	adrp	x0, .LANCHOR87
+	ldrh	w0, [x0, #:lo12:.LANCHOR87]
 	mul	w0, w0, w2
 	cmp	w1, w0, lsr 1
-	ble	.L3495
-.L3493:
-	ldrh	w0, [x21, #:lo12:.LANCHOR89]
+	ble	.L3699
+.L3697:
+	ldrh	w0, [x21, #:lo12:.LANCHOR91]
 	lsr	w0, w0, 2
-	strh	w0, [x26, #:lo12:.LANCHOR79]
-	b	.L3436
-.L3484:
-	adrp	x2, .LANCHOR151
+	strh	w0, [x26, #:lo12:.LANCHOR81]
+	b	.L3640
+.L3688:
+	adrp	x2, .LANCHOR154
 	adrp	x3, .LANCHOR6
 	uxtw	x25, w25
-	ldr	w1, [x2, #:lo12:.LANCHOR151]
+	ldr	w1, [x2, #:lo12:.LANCHOR154]
 	ldrh	w3, [x3, #:lo12:.LANCHOR6]
 	add	w1, w1, 1
-	str	w1, [x2, #:lo12:.LANCHOR151]
+	str	w1, [x2, #:lo12:.LANCHOR154]
 	cmp	w1, w3, lsr 4
 	adrp	x3, .LANCHOR9
-	bls	.L3487
+	bls	.L3691
 	ldr	x1, [x3, #:lo12:.LANCHOR9]
-	str	wzr, [x2, #:lo12:.LANCHOR151]
+	str	wzr, [x2, #:lo12:.LANCHOR154]
 	ldrh	w2, [x1, x25, lsl 1]
-	adrp	x1, .LANCHOR91
-	ldrh	w1, [x1, #:lo12:.LANCHOR91]
+	adrp	x1, .LANCHOR93
+	ldrh	w1, [x1, #:lo12:.LANCHOR93]
 	cmp	w2, w1
-	bcs	.L3487
+	bcs	.L3691
 	str	x3, [x29, 96]
 	mov	w2, 1
 	mov	w1, 0
 	bl	gc_add_sblk
 	ldr	x3, [x29, 96]
-	cbnz	w0, .L3477
-.L3487:
+	cbnz	w0, .L3681
+.L3691:
 	ldr	x0, [x3, #:lo12:.LANCHOR9]
 	ldrh	w1, [x0, x25, lsl 1]
-	adrp	x0, .LANCHOR85
-	ldrh	w0, [x0, #:lo12:.LANCHOR85]
+	adrp	x0, .LANCHOR87
+	ldrh	w0, [x0, #:lo12:.LANCHOR87]
 	cmp	w1, w0, lsr 1
-	bhi	.L3488
+	bhi	.L3692
 	mov	w2, 0
 	mov	w1, 1
 	mov	w0, w28
 	bl	gc_add_sblk
-	b	.L3477
-.L3488:
+	b	.L3681
+.L3692:
 	ldr	x2, [x29, 104]
-	ldrh	w0, [x27, #:lo12:.LANCHOR90]
-	ldrh	w2, [x2, #:lo12:.LANCHOR88]
+	ldrh	w0, [x27, #:lo12:.LANCHOR92]
+	ldrh	w2, [x2, #:lo12:.LANCHOR90]
 	add	w0, w0, w2
-	adrp	x2, .LANCHOR89
-	ldrh	w2, [x2, #:lo12:.LANCHOR89]
+	adrp	x2, .LANCHOR91
+	ldrh	w2, [x2, #:lo12:.LANCHOR91]
 	cmp	w0, w2, lsl 1
-	ble	.L3489
-	adrp	x0, .LANCHOR91
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	ble	.L3693
+	adrp	x0, .LANCHOR93
+	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w0, w1
-	bcc	.L3486
-	b	.L3489
-.L3485:
+	bcc	.L3690
+	b	.L3693
+.L3689:
 	mov	w1, 1
-	strb	w1, [x23, #:lo12:.LANCHOR76]
+	strb	w1, [x23, #:lo12:.LANCHOR78]
 	cmp	w22, 16
-	bls	.L3490
-	adrp	x0, .LANCHOR92
-	ldrh	w2, [x0, #:lo12:.LANCHOR92]
-	adrp	x0, .LANCHOR93
-	ldrh	w0, [x0, #:lo12:.LANCHOR93]
+	bls	.L3694
+	adrp	x0, .LANCHOR94
+	ldrh	w2, [x0, #:lo12:.LANCHOR94]
+	adrp	x0, .LANCHOR95
+	ldrh	w0, [x0, #:lo12:.LANCHOR95]
 	cmp	w2, w0
-	bhi	.L3490
+	bhi	.L3694
 	mov	w2, 4
 	mov	w0, w1
 	bl	gc_search_src_blk
 	ands	w0, w0, 65535
-	bne	.L3491
+	bne	.L3695
 	mov	w2, 4
-.L3602:
-	ldrb	w0, [x23, #:lo12:.LANCHOR76]
+.L3811:
+	ldrb	w0, [x23, #:lo12:.LANCHOR78]
 	mov	w1, 3
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-.L3491:
-	adrp	x1, .LANCHOR89
+.L3695:
+	adrp	x1, .LANCHOR91
 	cmp	w21, w24, lsr 1
-	ldrh	w1, [x1, #:lo12:.LANCHOR89]
-	bls	.L3605
+	ldrh	w1, [x1, #:lo12:.LANCHOR91]
+	bls	.L3813
 	lsr	w1, w1, 2
-.L3606:
-	strh	w1, [x26, #:lo12:.LANCHOR79]
-	b	.L3475
-.L3490:
+.L3814:
+	strh	w1, [x26, #:lo12:.LANCHOR81]
+	b	.L3679
+.L3694:
 	mov	w2, 1
 	mov	w1, 2
 	mov	w0, w2
 	bl	gc_search_src_blk
 	ands	w0, w0, 65535
-	bne	.L3491
+	bne	.L3695
 	mov	w2, 2
-	b	.L3602
-.L3495:
+	b	.L3811
+.L3699:
 	mov	w1, 3
 	mov	w2, 4
 	mov	w0, 0
 	bl	gc_search_src_blk
-	ldrh	w1, [x21, #:lo12:.LANCHOR89]
+	ldrh	w1, [x21, #:lo12:.LANCHOR91]
 	and	w0, w0, 65535
-.L3605:
+.L3813:
 	lsr	w1, w1, 1
-	b	.L3606
-.L3482:
-	adrp	x0, .LANCHOR89
+	b	.L3814
+.L3686:
+	adrp	x0, .LANCHOR91
 	mov	w20, 0
-	ldrh	w0, [x0, #:lo12:.LANCHOR89]
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	lsr	w0, w0, 2
-	strh	w0, [x2, #:lo12:.LANCHOR79]
-	b	.L3436
-.L3440:
-	adrp	x7, .LANCHOR63
+	strh	w0, [x2, #:lo12:.LANCHOR81]
+	b	.L3640
+.L3644:
+	adrp	x7, .LANCHOR64
 	mov	w0, 65535
-	ldrh	w1, [x7, #:lo12:.LANCHOR63]
+	ldrh	w1, [x7, #:lo12:.LANCHOR64]
 	cmp	w1, w0
-	bne	.L3496
+	bne	.L3700
 	bl	gc_get_src_blk
-	strh	w0, [x7, #:lo12:.LANCHOR63]
-.L3496:
-	ldrh	w3, [x7, #:lo12:.LANCHOR63]
+	strh	w0, [x7, #:lo12:.LANCHOR64]
+.L3700:
+	ldrh	w0, [x7, #:lo12:.LANCHOR64]
+	mov	w1, 65535
+	cmp	w0, w1
+	beq	.L3701
+	adrp	x1, .LANCHOR6
+	ldrh	w1, [x1, #:lo12:.LANCHOR6]
+	cmp	w1, w0
+	bhi	.L3701
+	mov	w0, -1
+	strh	w0, [x7, #:lo12:.LANCHOR64]
+.L3701:
+	ldrh	w3, [x7, #:lo12:.LANCHOR64]
 	mov	w0, 65535
-	add	x1, x7, :lo12:.LANCHOR63
+	add	x1, x7, :lo12:.LANCHOR64
 	cmp	w3, w0
-	beq	.L3612
+	beq	.L3821
 	adrp	x0, .LANCHOR7
 	ldrh	w5, [x1, 56]
 	uxtw	x4, w3
 	ldr	x2, [x0, #:lo12:.LANCHOR7]
 	add	x2, x2, x4, lsl 2
-	cbz	w5, .L3498
+	cbz	w5, .L3703
 	add	x1, x1, 58
 	mov	w0, 0
-.L3500:
+.L3705:
 	ldrh	w6, [x1], 2
 	cmp	w6, w3
-	bne	.L3499
-.L3504:
-	adrp	x0, .LANCHOR63
+	bne	.L3704
+.L3709:
+	adrp	x0, .LANCHOR64
 	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR63]
-	b	.L3544
-.L3499:
+	strh	w1, [x0, #:lo12:.LANCHOR64]
+	b	.L3750
+.L3704:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w5, w0
-	bne	.L3500
-.L3498:
+	bne	.L3705
+.L3703:
 	ldrb	w0, [x2, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L3501
+	beq	.L3706
 	tst	w0, 192
-	bne	.L3502
-.L3501:
+	bne	.L3707
+.L3706:
 	adrp	x0, .LANCHOR9
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, x4, lsl 1]
-	cbz	w0, .L3504
-	mov	w2, 2347
-	adrp	x1, .LANCHOR220
+	cbz	w0, .L3709
+	mov	w2, 2537
+	adrp	x1, .LANCHOR226
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR220
+	add	x1, x1, :lo12:.LANCHOR226
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3504
-.L3502:
+	b	.L3709
+.L3707:
 	mov	w0, 2
-	b	.L3613
-.L3441:
+	b	.L3822
+.L3645:
 	bl	gc_scan_src_blk
 	cmn	w0, #1
-	bne	.L3505
+	bne	.L3710
 	mov	w0, 3
-	b	.L3613
-.L3505:
-	adrp	x20, .LANCHOR63
+	b	.L3822
+.L3710:
+	adrp	x20, .LANCHOR64
 	mov	w2, 65535
-	add	x0, x20, :lo12:.LANCHOR63
-	ldrh	w1, [x20, #:lo12:.LANCHOR63]
+	add	x0, x20, :lo12:.LANCHOR64
+	ldrh	w1, [x20, #:lo12:.LANCHOR64]
 	cmp	w1, w2
-	beq	.L3455
+	beq	.L3659
 	ldrh	w2, [x0, 24]
-	cbz	w2, .L3506
+	cbz	w2, .L3711
 	mov	w1, 4
 	strh	wzr, [x0, 26]
-	strb	w1, [x19, #:lo12:.LANCHOR150]
-	b	.L3544
-.L3506:
+	strb	w1, [x19, #:lo12:.LANCHOR153]
+	b	.L3750
+.L3711:
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR150]
+	strb	w0, [x19, #:lo12:.LANCHOR153]
 	adrp	x0, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	mov	x19, x0
 	ldr	x2, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L3507
-	adrp	x1, .LANCHOR220
+	cbz	w1, .L3712
+	adrp	x1, .LANCHOR226
 	adrp	x0, .LC0
-	mov	w2, 2375
-	add	x1, x1, :lo12:.LANCHOR220
+	mov	w2, 2565
+	add	x1, x1, :lo12:.LANCHOR226
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3507:
-	ldrh	w0, [x20, #:lo12:.LANCHOR63]
-	add	x21, x20, :lo12:.LANCHOR63
+.L3712:
+	ldrh	w0, [x20, #:lo12:.LANCHOR64]
+	add	x21, x20, :lo12:.LANCHOR64
 	bl	ftl_free_sblk
 	ldr	x0, [x19, #:lo12:.LANCHOR9]
-	ldrh	w1, [x20, #:lo12:.LANCHOR63]
+	ldrh	w1, [x20, #:lo12:.LANCHOR64]
 	strh	wzr, [x0, x1, lsl 1]
 	ldrh	w0, [x21, 30]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w0, 8
-	bhi	.L3508
+	bhi	.L3713
 	strh	w0, [x21, 30]
-	b	.L3504
-.L3508:
+	b	.L3709
+.L3713:
 	strh	wzr, [x21, 30]
 	bl	ftl_flush
 	bl	pm_flush
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L3504
-.L3442:
-	adrp	x20, .LANCHOR63
-	adrp	x23, .LANCHOR85
-	add	x22, x20, :lo12:.LANCHOR63
-	add	x23, x23, :lo12:.LANCHOR85
-.L3581:
+	b	.L3709
+.L3646:
+	adrp	x20, .LANCHOR64
+	adrp	x23, .LANCHOR87
+	add	x22, x20, :lo12:.LANCHOR64
+	add	x23, x23, :lo12:.LANCHOR87
+.L3789:
 	bl	gc_scan_src_blk_one_page
 	ldrh	w1, [x22, 2]
 	ldrh	w0, [x23]
 	cmp	w1, w0
-	bcs	.L3510
+	bcs	.L3715
 	cmp	w21, 7
-	bls	.L3581
-	b	.L3544
-.L3510:
+	bls	.L3789
+	b	.L3750
+.L3715:
 	ldrh	w3, [x22, 24]
 	adrp	x0, .LANCHOR14
-	cbz	w3, .L3511
+	cbz	w3, .L3716
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	mov	w1, 4
 	strh	wzr, [x22, 26]
-	strb	w1, [x19, #:lo12:.LANCHOR150]
+	strb	w1, [x19, #:lo12:.LANCHOR153]
 	adrp	x19, .LANCHOR9
-	tbz	x0, 8, .L3512
+	tbz	x0, 8, .L3717
 	ldrh	w1, [x22]
 	ldr	x2, [x19, #:lo12:.LANCHOR9]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC238
-	add	x0, x0, :lo12:.LC238
+	adrp	x0, .LC244
+	add	x0, x0, :lo12:.LC244
 	bl	printf
-.L3512:
-	ldrh	w2, [x20, #:lo12:.LANCHOR63]
-	add	x0, x20, :lo12:.LANCHOR63
+.L3717:
+	ldrh	w2, [x20, #:lo12:.LANCHOR64]
+	add	x0, x20, :lo12:.LANCHOR64
 	ldr	x1, [x19, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, 24]
 	ldrh	w1, [x1, x2, lsl 1]
 	cmp	w1, w0
-	beq	.L3513
-	adrp	x1, .LANCHOR220
+	beq	.L3718
+	adrp	x1, .LANCHOR226
 	adrp	x0, .LC0
-	mov	w2, 2409
-	add	x1, x1, :lo12:.LANCHOR220
+	mov	w2, 2599
+	add	x1, x1, :lo12:.LANCHOR226
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3513:
-	add	x0, x20, :lo12:.LANCHOR63
-	ldrh	w1, [x20, #:lo12:.LANCHOR63]
+.L3718:
+	add	x0, x20, :lo12:.LANCHOR64
+	ldrh	w1, [x20, #:lo12:.LANCHOR64]
 	ldrh	w2, [x0, 24]
 	ldr	x0, [x19, #:lo12:.LANCHOR9]
 	strh	w2, [x0, x1, lsl 1]
-	b	.L3544
-.L3511:
+	b	.L3750
+.L3716:
 	adrp	x2, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	ldrh	w1, [x22]
 	ldr	x21, [x2, #:lo12:.LANCHOR7]
 	mov	w2, 1
-	strb	w2, [x19, #:lo12:.LANCHOR150]
+	strb	w2, [x19, #:lo12:.LANCHOR153]
 	add	x21, x21, x1, uxth 2
-	tbz	x0, 8, .L3514
+	tbz	x0, 8, .L3719
 	ldrb	w2, [x21, 2]
-	adrp	x0, .LC239
-	add	x0, x0, :lo12:.LC239
+	adrp	x0, .LC245
+	add	x0, x0, :lo12:.LC245
 	ubfx	x2, x2, 5, 3
 	bl	printf
-.L3514:
+.L3719:
 	ldrb	w0, [x21, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L3515
+	beq	.L3720
 	tst	w0, 192
-	bne	.L3516
-.L3515:
-	adrp	x1, .LANCHOR220
+	bne	.L3721
+.L3720:
+	adrp	x1, .LANCHOR226
 	adrp	x0, .LC0
-	mov	w2, 2419
-	add	x1, x1, :lo12:.LANCHOR220
+	mov	w2, 2609
+	add	x1, x1, :lo12:.LANCHOR226
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3516:
-	ldrh	w0, [x20, #:lo12:.LANCHOR63]
-	add	x19, x20, :lo12:.LANCHOR63
+.L3721:
+	ldrh	w0, [x20, #:lo12:.LANCHOR64]
+	add	x19, x20, :lo12:.LANCHOR64
 	bl	ftl_free_sblk
 	mov	w0, -1
-	strh	w0, [x20, #:lo12:.LANCHOR63]
+	strh	w0, [x20, #:lo12:.LANCHOR64]
 	ldrh	w0, [x19, 30]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w0, 8
-	bhi	.L3517
+	bhi	.L3722
 	strh	w0, [x19, 30]
-	b	.L3544
-.L3517:
+	b	.L3750
+.L3722:
 	strh	wzr, [x19, 30]
-.L3611:
+.L3820:
 	bl	flt_sys_flush
-	b	.L3544
-.L3443:
+	b	.L3750
+.L3647:
 	ldrh	w1, [x20, 80]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L3518
-	adrp	x0, .LANCHOR76
-	ldrb	w22, [x0, #:lo12:.LANCHOR76]
+	bne	.L3723
+	adrp	x0, .LANCHOR78
+	ldrb	w22, [x0, #:lo12:.LANCHOR78]
 	cmp	w22, 1
-	bne	.L3518
+	bne	.L3723
 	bl	ftl_flush
-	adrp	x0, .LANCHOR63
-	add	x1, x0, :lo12:.LANCHOR63
+	adrp	x0, .LANCHOR64
+	add	x1, x0, :lo12:.LANCHOR64
 	mov	x21, x0
-	ldrh	w1, [x1, 318]
-	cbz	w1, .L3519
+	ldrh	w1, [x1, 574]
+	cbz	w1, .L3724
 	mov	w0, w22
 	mov	w1, 5
-.L3608:
+.L3817:
 	bl	zftl_gc_get_free_sblk
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L3521
+	beq	.L3726
 	adrp	x0, .LANCHOR7
 	ldr	x22, [x0, #:lo12:.LANCHOR7]
 	add	x22, x22, x19, uxth 2
 	ldrb	w0, [x22, 2]
 	tst	w0, 224
-	beq	.L3522
-	adrp	x1, .LANCHOR220
+	beq	.L3727
+	adrp	x1, .LANCHOR226
 	adrp	x0, .LC0
-	mov	w2, 2448
-	add	x1, x1, :lo12:.LANCHOR220
+	mov	w2, 2638
+	add	x1, x1, :lo12:.LANCHOR226
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3522:
+.L3727:
 	ldrb	w0, [x22, 2]
 	mov	w1, 5
 	bfi	w0, w1, 5, 3
 	orr	w0, w0, 16
 	strb	w0, [x22, 2]
-.L3543:
+.L3749:
 	mov	w1, 1
 	mov	w0, w19
 	bl	ftl_erase_sblk
-	adrp	x22, .LANCHOR77
+	adrp	x22, .LANCHOR79
 	mov	w0, 5
 	strb	w0, [x20, 84]
 	add	x1, x20, 96
 	mov	w0, w19
 	bl	ftl_get_blk_list_in_sblk
 	and	w0, w0, 255
-	adrp	x1, .LANCHOR85
+	adrp	x1, .LANCHOR87
 	strb	w0, [x20, 89]
 	strh	w19, [x20, 80]
-	ldrh	w1, [x1, #:lo12:.LANCHOR85]
+	ldrh	w1, [x1, #:lo12:.LANCHOR87]
 	strh	wzr, [x20, 82]
 	strb	wzr, [x20, 85]
 	strh	wzr, [x20, 90]
 	mul	w0, w0, w1
-	ldrh	w2, [x22, #:lo12:.LANCHOR77]
+	ldrh	w2, [x22, #:lo12:.LANCHOR79]
 	strh	w0, [x20, 86]
-	adrp	x20, .LANCHOR78
+	adrp	x20, .LANCHOR80
 	mov	w1, 255
-	ldrb	w0, [x20, #:lo12:.LANCHOR78]
+	ldrb	w0, [x20, #:lo12:.LANCHOR80]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR152
-	ldr	x0, [x0, #:lo12:.LANCHOR152]
+	adrp	x0, .LANCHOR155
+	ldr	x0, [x0, #:lo12:.LANCHOR155]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	ldrb	w0, [x20, #:lo12:.LANCHOR78]
+	ldrb	w0, [x20, #:lo12:.LANCHOR80]
 	mov	w1, 255
-	ldrh	w2, [x22, #:lo12:.LANCHOR77]
+	ldrh	w2, [x22, #:lo12:.LANCHOR79]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR153
-	ldr	x0, [x0, #:lo12:.LANCHOR153]
+	adrp	x0, .LANCHOR156
+	ldr	x0, [x0, #:lo12:.LANCHOR156]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	ldrb	w0, [x20, #:lo12:.LANCHOR78]
+	ldrb	w0, [x20, #:lo12:.LANCHOR80]
 	mov	w1, 255
-	ldrh	w2, [x22, #:lo12:.LANCHOR77]
+	ldrh	w2, [x22, #:lo12:.LANCHOR79]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR74
-	ldr	x0, [x0, #:lo12:.LANCHOR74]
+	adrp	x0, .LANCHOR76
+	ldr	x0, [x0, #:lo12:.LANCHOR76]
 	bl	ftl_memset
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	mov	w1, -1
@@ -22504,56 +23958,56 @@ zftl_do_gc:
 	strh	w1, [x0, 130]
 	bl	pm_flush
 	bl	ftl_ext_info_flush
-	adrp	x0, .LANCHOR102
+	adrp	x0, .LANCHOR104
 	mov	w1, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR102]
+	ldr	x0, [x0, #:lo12:.LANCHOR104]
 	strh	w19, [x0, 126]
-	add	x0, x21, :lo12:.LANCHOR63
-	str	w1, [x0, 324]
-	strh	wzr, [x0, 314]
+	add	x0, x21, :lo12:.LANCHOR64
+	str	w1, [x0, 580]
+	strh	wzr, [x0, 570]
 	strh	wzr, [x0, 56]
-	strh	wzr, [x0, 316]
-	strh	wzr, [x0, 320]
+	strh	wzr, [x0, 572]
+	strh	wzr, [x0, 576]
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L3544
-.L3519:
+	b	.L3750
+.L3724:
 	mov	w1, 5
 	mov	w0, 0
-	b	.L3608
-.L3518:
+	b	.L3817
+.L3723:
 	cmp	w25, 1
 	mov	w22, 4
 	csinc	w22, w22, wzr, eq
 	cmp	w21, 15
 	mov	w0, w22
 	add	w22, w22, 4
-	adrp	x25, .LANCHOR76
-	adrp	x24, .LANCHOR63
+	adrp	x25, .LANCHOR78
+	adrp	x24, .LANCHOR64
 	csel	w22, w22, w0, ls
-	add	x25, x25, :lo12:.LANCHOR76
-	add	x21, x24, :lo12:.LANCHOR63
+	add	x25, x25, :lo12:.LANCHOR78
+	add	x21, x24, :lo12:.LANCHOR64
 	add	x26, x20, 80
-.L3525:
+.L3730:
 	sub	w22, w22, #1
 	and	w22, w22, 255
 	cmp	w22, 255
-	beq	.L3544
+	beq	.L3750
 	bl	gc_do_copy_back
 	ldrb	w0, [x25]
-	cbnz	w0, .L3526
-	adrp	x0, .LANCHOR52
-	ldrb	w0, [x0, #:lo12:.LANCHOR52]
+	cbnz	w0, .L3731
+	adrp	x0, .LANCHOR54
+	ldrb	w0, [x0, #:lo12:.LANCHOR54]
 	cmp	w0, 3
-	bhi	.L3527
+	bhi	.L3732
 	bl	ftl_write_commit
-.L3527:
+.L3732:
 	ldrh	w1, [x21, 26]
 	ldrh	w0, [x21, 24]
 	cmp	w1, w0
-	bcc	.L3525
+	bcc	.L3730
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR150]
+	strb	w0, [x19, #:lo12:.LANCHOR153]
 	bl	ftl_write_commit
 	bl	ftl_flush
 	adrp	x0, .LANCHOR9
@@ -22561,75 +24015,75 @@ zftl_do_gc:
 	mov	x19, x0
 	ldr	x1, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x1, x2, lsl 1]
-	cbz	w1, .L3529
-	adrp	x1, .LANCHOR220
+	cbz	w1, .L3734
+	adrp	x1, .LANCHOR226
 	adrp	x0, .LC0
-	mov	w2, 2523
-	add	x1, x1, :lo12:.LANCHOR220
+	mov	w2, 2713
+	add	x1, x1, :lo12:.LANCHOR226
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3529:
-	ldrh	w0, [x24, #:lo12:.LANCHOR63]
+.L3734:
+	ldrh	w0, [x24, #:lo12:.LANCHOR64]
 	ldr	x2, [x19, #:lo12:.LANCHOR9]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L3530
+	cbnz	w1, .L3735
 	bl	ftl_free_sblk
-	b	.L3504
-.L3530:
+	b	.L3709
+.L3735:
 	mov	w2, 1
 	mov	w1, 0
 	bl	gc_add_sblk
-	b	.L3504
-.L3526:
-	ldrh	w0, [x21, 320]
-	cbz	w0, .L3531
-	strh	wzr, [x21, 320]
+	b	.L3709
+.L3731:
+	ldrh	w0, [x21, 576]
+	cbz	w0, .L3736
+	strh	wzr, [x21, 576]
 	bl	sblk_wait_write_queue_completed
 	bl	gc_write_completed
-	ldr	w0, [x21, 324]
+	ldr	w0, [x21, 580]
 	cmn	w0, #1
-	beq	.L3532
+	beq	.L3737
 	bl	ftl_mask_bad_block
-.L3532:
+.L3737:
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
-	add	x20, x24, :lo12:.LANCHOR63
+	add	x20, x24, :lo12:.LANCHOR64
 	strh	wzr, [x20, 56]
 	ldrh	w0, [x0, 80]
-	str	wzr, [x20, 324]
+	str	wzr, [x20, 580]
 	bl	ftl_free_sblk
-	adrp	x2, .LANCHOR102
+	adrp	x2, .LANCHOR104
 	ldr	x1, [x23, #:lo12:.LANCHOR10]
 	mov	w0, -1
-	ldr	x2, [x2, #:lo12:.LANCHOR102]
+	ldr	x2, [x2, #:lo12:.LANCHOR104]
 	strh	w0, [x1, 80]
 	strh	w0, [x2, 126]
 	strh	w0, [x1, 130]
 	ldr	x0, [x20, 8]
-	cbz	x0, .L3533
-	bl	buf_free
-.L3533:
-	add	x24, x24, :lo12:.LANCHOR63
+	cbz	x0, .L3738
+	bl	zbuf_free
+.L3738:
+	add	x24, x24, :lo12:.LANCHOR64
 	str	xzr, [x24, 8]
 	bl	flt_sys_flush
-	mov	w2, 2561
-	strb	wzr, [x19, #:lo12:.LANCHOR150]
-	adrp	x1, .LANCHOR220
+	mov	w2, 2751
+	strb	wzr, [x19, #:lo12:.LANCHOR153]
+	adrp	x1, .LANCHOR226
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR220
+	add	x1, x1, :lo12:.LANCHOR226
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3544
-.L3531:
+	b	.L3750
+.L3736:
 	ldrh	w0, [x26, 6]
 	ldrh	w1, [x21, 26]
 	cmp	w0, 1
 	ldrh	w0, [x21, 24]
-	bls	.L3534
+	bls	.L3739
 	cmp	w1, w0
-	bcc	.L3525
+	bcc	.L3730
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR150]
+	strb	w0, [x19, #:lo12:.LANCHOR153]
 	ldrh	w0, [x21, 56]
 	add	w1, w0, 1
 	strh	w1, [x21, 56]
@@ -22638,12 +24092,12 @@ zftl_do_gc:
 	strh	w1, [x0, 58]
 	mov	w0, -1
 	strh	w0, [x21]
-	b	.L3544
-.L3534:
+	b	.L3750
+.L3739:
 	mov	w2, 5
-	strb	w2, [x19, #:lo12:.LANCHOR150]
+	strb	w2, [x19, #:lo12:.LANCHOR153]
 	cmp	w1, w0
-	bcc	.L3535
+	bcc	.L3740
 	ldrh	w0, [x21, 56]
 	add	w1, w0, 1
 	strh	w1, [x21, 56]
@@ -22652,7 +24106,7 @@ zftl_do_gc:
 	strh	w1, [x0, 58]
 	mov	w0, -1
 	strh	w0, [x21]
-.L3535:
+.L3740:
 	bl	ftl_flush
 	bl	sblk_wait_write_queue_completed
 	bl	gc_write_completed
@@ -22661,49 +24115,60 @@ zftl_do_gc:
 	strh	w1, [x0, 128]
 	bl	pm_flush
 	bl	ftl_ext_info_flush
-	add	x0, x24, :lo12:.LANCHOR63
-	adrp	x1, .LANCHOR85
-	adrp	x2, .LANCHOR71
-	ldrh	w1, [x1, #:lo12:.LANCHOR85]
-	ldrb	w2, [x2, #:lo12:.LANCHOR71]
-	strh	wzr, [x0, 16]
+	adrp	x1, .LANCHOR87
+	add	x0, x24, :lo12:.LANCHOR64
+	adrp	x2, .LANCHOR35
+	ldrh	w1, [x1, #:lo12:.LANCHOR87]
 	strh	w1, [x0, 18]
-	cmp	w2, 2
+	adrp	x1, .LANCHOR73
+	ldrb	w2, [x2, #:lo12:.LANCHOR35]
+	strh	wzr, [x0, 16]
+	ldrb	w1, [x1, #:lo12:.LANCHOR73]
+	strh	w1, [x0, 20]
+	cbz	w2, .L3741
+	adrp	x2, .LANCHOR79
+	ldrh	w2, [x2, #:lo12:.LANCHOR79]
+	strh	w2, [x0, 18]
+	mov	w2, 1
 	strh	w2, [x0, 20]
-	bne	.L3537
+.L3741:
+	cmp	w1, 2
+	bne	.L3743
+	add	x0, x24, :lo12:.LANCHOR64
+	ldrh	w1, [x0, 18]
 	ubfiz	w1, w1, 1, 15
 	strh	w1, [x0, 18]
-	adrp	x1, .LANCHOR72
-	ldrb	w1, [x1, #:lo12:.LANCHOR72]
-	cbnz	w1, .L3537
+	adrp	x1, .LANCHOR74
+	ldrb	w1, [x1, #:lo12:.LANCHOR74]
+	cbnz	w1, .L3743
 	mov	w1, 1
 	strh	w1, [x0, 20]
-.L3537:
-	add	x24, x24, :lo12:.LANCHOR63
+.L3743:
+	add	x24, x24, :lo12:.LANCHOR64
 	strh	wzr, [x24, 22]
-	b	.L3544
-.L3540:
+	b	.L3750
+.L3746:
 	ldrh	w1, [x24, 16]
 	ldrh	w0, [x24, 18]
 	cmp	w1, w0
-	bcc	.L3541
+	bcc	.L3747
 	mov	w0, 6
-	strb	w0, [x19, #:lo12:.LANCHOR150]
+	strb	w0, [x19, #:lo12:.LANCHOR153]
 	ldr	x0, [x24, 8]
-	bl	buf_free
+	bl	zbuf_free
 	str	xzr, [x24, 8]
-	b	.L3544
-.L3541:
+	b	.L3750
+.L3747:
 	cmp	w21, 15
-	bls	.L3446
+	bls	.L3650
 	cmp	w25, 1
-	bne	.L3544
+	bne	.L3750
 	add	w22, w22, 1
 	and	w22, w22, 255
 	cmp	w22, 4
-	bls	.L3446
-	b	.L3544
-.L3445:
+	bls	.L3650
+	b	.L3750
+.L3649:
 	bl	gc_update_l2p_map_new
 	mov	w21, -1
 	bl	gc_free_src_blk
@@ -22711,22 +24176,22 @@ zftl_do_gc:
 	bl	pm_flush
 	strh	w21, [x20, 80]
 	bl	ftl_ext_info_flush
-	adrp	x0, .LANCHOR102
-	ldr	x0, [x0, #:lo12:.LANCHOR102]
+	adrp	x0, .LANCHOR104
+	ldr	x0, [x0, #:lo12:.LANCHOR104]
 	strh	w21, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L3612:
-	strb	wzr, [x19, #:lo12:.LANCHOR150]
-	b	.L3544
-.L3521:
-	mov	w2, 2454
-	adrp	x1, .LANCHOR220
+.L3821:
+	strb	wzr, [x19, #:lo12:.LANCHOR153]
+	b	.L3750
+.L3726:
+	mov	w2, 2644
+	adrp	x1, .LANCHOR226
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR220
+	add	x1, x1, :lo12:.LANCHOR226
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3543
+	b	.L3749
 	.size	zftl_do_gc, .-zftl_do_gc
 	.section	.text.zftl_write,"ax",@progbits
 	.align	2
@@ -22746,30 +24211,30 @@ zftl_write:
 	stp	x21, x22, [sp, 32]
 	mov	x23, x3
 	stp	x25, x26, [sp, 64]
-	tbz	x0, 12, .L3615
+	tbz	x0, 12, .L3824
 	ldr	w4, [x23]
 	mov	w3, w2
-	adrp	x0, .LC240
+	adrp	x0, .LC246
 	mov	w2, w1
-	add	x0, x0, :lo12:.LC240
+	add	x0, x0, :lo12:.LC246
 	mov	w1, w27
 	bl	printf
-.L3615:
-	cbnz	w27, .L3616
-	adrp	x0, .LANCHOR59
+.L3824:
+	cbnz	w27, .L3825
+	adrp	x0, .LANCHOR61
 	mov	w27, 24576
-	ldr	w0, [x0, #:lo12:.LANCHOR59]
-.L3617:
+	ldr	w0, [x0, #:lo12:.LANCHOR61]
+.L3826:
 	add	w1, w19, w20
 	cmp	w0, w1
-	bcc	.L3631
-	adrp	x24, .LANCHOR123
+	bcc	.L3840
+	adrp	x24, .LANCHOR125
 	add	w27, w27, w19
 	sub	w19, w20, #1
-	adrp	x25, .LANCHOR102
-	ldrb	w0, [x24, #:lo12:.LANCHOR123]
+	adrp	x25, .LANCHOR104
+	ldrb	w0, [x24, #:lo12:.LANCHOR125]
 	add	w19, w19, w27
-	add	x24, x24, :lo12:.LANCHOR123
+	add	x24, x24, :lo12:.LANCHOR125
 	udiv	w22, w27, w0
 	udiv	w19, w19, w0
 	add	w0, w27, w20
@@ -22777,25 +24242,25 @@ zftl_write:
 	mov	w26, w22
 	sub	w21, w19, w22
 	add	w21, w21, 1
-.L3619:
-	cbnz	w21, .L3627
-	adrp	x20, .LANCHOR95
-	adrp	x19, .LANCHOR99
-	add	x20, x20, :lo12:.LANCHOR95
-	add	x19, x19, :lo12:.LANCHOR99
+.L3828:
+	cbnz	w21, .L3836
+	adrp	x20, .LANCHOR97
+	adrp	x19, .LANCHOR101
+	add	x20, x20, :lo12:.LANCHOR97
+	add	x19, x19, :lo12:.LANCHOR101
 	bl	ftl_write_commit
 	bl	ftl_flush
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
-.L3628:
+.L3837:
 	ldrh	w0, [x20]
 	ldrh	w1, [x19]
 	add	w0, w0, w1
 	cmp	w0, 7
-	ble	.L3629
+	ble	.L3838
 	mov	w0, 0
-.L3614:
+.L3823:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -22803,28 +24268,28 @@ zftl_write:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L3616:
+.L3825:
 	cmp	w27, 3
-	bhi	.L3631
+	bhi	.L3840
 	lsl	w27, w27, 13
 	mov	w0, 8192
-	b	.L3617
-.L3627:
+	b	.L3826
+.L3836:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbnz	x0, .L3620
+	cbnz	x0, .L3829
 	bl	ftl_write_commit
-	b	.L3619
-.L3620:
+	b	.L3828
+.L3829:
 	ldrb	w3, [x24]
 	cmp	w26, w22
 	strb	wzr, [x0, 57]
 	ccmp	w26, w19, 4, ne
 	strb	w3, [x0, 56]
-	bne	.L3623
+	bne	.L3832
 	cmp	w26, w22
-	bne	.L3624
+	bne	.L3833
 	udiv	w0, w27, w3
 	msub	w0, w0, w3, w27
 	and	w0, w0, 255
@@ -22833,9 +24298,9 @@ zftl_write:
 	and	w3, w3, 255
 	cmp	w20, w3
 	csel	w3, w20, w3, cc
-.L3636:
+.L3845:
 	strb	w3, [x28, 56]
-.L3623:
+.L3832:
 	ldr	x3, [x28, 8]
 	mov	x1, x23
 	ldrb	w0, [x28, 57]
@@ -22845,7 +24310,7 @@ zftl_write:
 	lsl	w2, w2, 9
 	add	x0, x3, x0
 	bl	ftl_memcpy
-	ldr	x1, [x25, #:lo12:.LANCHOR102]
+	ldr	x1, [x25, #:lo12:.LANCHOR104]
 	ldr	w0, [x1, 8]
 	str	w26, [x28, 36]
 	add	w26, w26, 1
@@ -22857,19 +24322,19 @@ zftl_write:
 	ldrb	w0, [x28, 56]
 	ubfiz	x0, x0, 9, 8
 	add	x23, x23, x0
-	b	.L3619
-.L3624:
+	b	.L3828
+.L3833:
 	ldr	w0, [x29, 108]
 	msub	w3, w3, w26, w0
-	b	.L3636
-.L3629:
+	b	.L3845
+.L3838:
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
-	b	.L3628
-.L3631:
+	b	.L3837
+.L3840:
 	mov	w0, -1
-	b	.L3614
+	b	.L3823
 	.size	zftl_write, .-zftl_write
 	.section	.text.ftl_vendor_write,"ax",@progbits
 	.align	2
@@ -22928,12 +24393,12 @@ ftl_write:
 	mov	x20, x3
 	mov	w22, w1
 	ands	w21, w0, 255
-	bne	.L3642
+	bne	.L3851
 	mov	w3, w2
 	mov	w0, 0
 	mov	x2, x20
 	bl	idb_write_data
-.L3642:
+.L3851:
 	mov	x3, x20
 	mov	w2, w19
 	mov	w1, w22
@@ -22949,46 +24414,46 @@ ftl_write:
 	.type	zftl_discard, %function
 zftl_discard:
 	stp	x29, x30, [sp, -128]!
-	adrp	x2, .LANCHOR59
+	adrp	x2, .LANCHOR61
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w19, w1
-	ldr	w2, [x2, #:lo12:.LANCHOR59]
+	ldr	w2, [x2, #:lo12:.LANCHOR61]
 	add	w1, w0, w1
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	cmp	w2, w1
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	bcc	.L3665
-	adrp	x24, .LANCHOR221
+	bcc	.L3874
+	adrp	x24, .LANCHOR227
 	add	w22, w0, 24576
 	adrp	x0, .LANCHOR14
 	str	x0, [x29, 104]
-	ldr	w1, [x24, #:lo12:.LANCHOR221]
+	ldr	w1, [x24, #:lo12:.LANCHOR227]
 	ldr	w2, [x0, #:lo12:.LANCHOR14]
 	add	w1, w19, w1
-	str	w1, [x24, #:lo12:.LANCHOR221]
-	tbz	x2, 12, .L3646
-	adrp	x0, .LC241
+	str	w1, [x24, #:lo12:.LANCHOR227]
+	tbz	x2, 12, .L3855
+	adrp	x0, .LC247
 	mov	w4, 0
 	mov	w3, w19
 	mov	w2, w22
-	add	x0, x0, :lo12:.LC241
+	add	x0, x0, :lo12:.LC247
 	bl	printf
-.L3646:
-	adrp	x23, .LANCHOR102
-	adrp	x26, .LANCHOR123
-	ldr	x0, [x23, #:lo12:.LANCHOR102]
+.L3855:
+	adrp	x23, .LANCHOR104
+	adrp	x26, .LANCHOR125
+	ldr	x0, [x23, #:lo12:.LANCHOR104]
 	ldr	w27, [x0, 8]
 	add	w1, w27, 1
 	str	w1, [x0, 8]
 	bl	ftl_write_commit
 	bl	ftl_flush
-	ldrb	w21, [x26, #:lo12:.LANCHOR123]
+	ldrb	w21, [x26, #:lo12:.LANCHOR125]
 	udiv	w20, w22, w21
 	msub	w25, w20, w21, w22
-	cbz	w25, .L3647
+	cbz	w25, .L3856
 	sub	w21, w21, w25
 	mov	w0, w20
 	cmp	w21, w19
@@ -22996,20 +24461,20 @@ zftl_discard:
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	bne	.L3648
+	bne	.L3857
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
-.L3648:
+.L3857:
 	ldr	w0, [x29, 120]
 	and	w28, w21, 65535
 	cmn	w0, #1
-	beq	.L3650
+	beq	.L3859
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x3, x0
-	cbz	x0, .L3650
+	cbz	x0, .L3859
 	strb	w25, [x0, 57]
 	ubfiz	x25, x25, 9, 25
 	strb	w21, [x0, 56]
@@ -23024,57 +24489,57 @@ zftl_discard:
 	mov	x0, x3
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-	ldr	x1, [x23, #:lo12:.LANCHOR102]
+	ldr	x1, [x23, #:lo12:.LANCHOR104]
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3650:
+.L3859:
 	add	w20, w20, 1
 	sub	w19, w19, w28
-.L3647:
-	cbz	w19, .L3652
+.L3856:
+	cbz	w19, .L3861
 	bl	ftl_flush
-.L3652:
-	adrp	x25, .LANCHOR66
-	add	x21, x26, :lo12:.LANCHOR123
-	add	x25, x25, :lo12:.LANCHOR66
+.L3861:
+	adrp	x25, .LANCHOR68
+	add	x21, x26, :lo12:.LANCHOR125
+	add	x25, x25, :lo12:.LANCHOR68
 	mov	w0, -1
 	str	w0, [x29, 124]
-.L3653:
+.L3862:
 	ldrb	w0, [x21]
 	cmp	w19, w0
-	bcs	.L3658
-	cbz	w19, .L3660
+	bcs	.L3867
+	cbz	w19, .L3869
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	bne	.L3661
+	bne	.L3870
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
-.L3661:
+.L3870:
 	ldr	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3660
+	beq	.L3869
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x21, x0
-	cbz	x0, .L3660
+	cbz	x0, .L3869
 	strb	wzr, [x0, 57]
 	strb	w19, [x0, 56]
 	stp	w27, w20, [x21, 32]
-	ldrb	w0, [x26, #:lo12:.LANCHOR123]
+	ldrb	w0, [x26, #:lo12:.LANCHOR125]
 	cmp	w19, w0
-	bcc	.L3663
-	adrp	x1, .LANCHOR222
+	bcc	.L3872
+	adrp	x1, .LANCHOR228
 	adrp	x0, .LC0
-	mov	w2, 1251
-	add	x1, x1, :lo12:.LANCHOR222
+	mov	w2, 1259
+	add	x1, x1, :lo12:.LANCHOR228
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3663:
+.L3872:
 	ldr	x0, [x21, 8]
 	lsl	w2, w19, 9
 	mov	w1, 0
@@ -23082,42 +24547,42 @@ zftl_discard:
 	mov	x0, x21
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-	ldr	x1, [x23, #:lo12:.LANCHOR102]
+	ldr	x1, [x23, #:lo12:.LANCHOR104]
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3660:
-	ldr	w1, [x24, #:lo12:.LANCHOR221]
+.L3869:
+	ldr	w1, [x24, #:lo12:.LANCHOR227]
 	cmp	w1, 8192
-	bls	.L3666
+	bls	.L3875
 	ldr	x0, [x29, 104]
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3664
-	adrp	x0, .LC241
+	tbz	x0, 12, .L3873
+	adrp	x0, .LC247
 	mov	w4, 0
 	mov	w3, w19
 	mov	w2, w22
-	add	x0, x0, :lo12:.LC241
+	add	x0, x0, :lo12:.LC247
 	bl	printf
-.L3664:
-	str	wzr, [x24, #:lo12:.LANCHOR221]
+.L3873:
+	str	wzr, [x24, #:lo12:.LANCHOR227]
 	bl	flt_sys_flush
-	adrp	x0, .LANCHOR114
+	adrp	x0, .LANCHOR116
 	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR114]
-.L3666:
+	str	w1, [x0, #:lo12:.LANCHOR116]
+.L3875:
 	mov	w0, 0
-	b	.L3644
-.L3658:
+	b	.L3853
+.L3867:
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3654
+	beq	.L3863
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbz	x0, .L3656
+	cbz	x0, .L3865
 	ldrb	w2, [x21]
 	mov	w1, 0
 	strb	w2, [x0, 56]
@@ -23129,45 +24594,48 @@ zftl_discard:
 	mov	x0, x28
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-.L3692:
-	ldr	x1, [x23, #:lo12:.LANCHOR102]
+.L3901:
+	ldr	x1, [x23, #:lo12:.LANCHOR104]
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3656:
+.L3865:
 	ldrb	w0, [x21]
 	add	w20, w20, 1
 	sub	w19, w19, w0
-	b	.L3653
-.L3654:
+	b	.L3862
+.L3863:
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
 	ldr	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3656
+	beq	.L3865
 	add	x1, x29, 124
 	mov	w2, 1
 	mov	w0, w20
 	bl	pm_log2phys
-	ldrh	w3, [x25]
-	mov	w0, 21
-	ldr	w1, [x29, 120]
-	sub	w2, w0, w3
+	adrp	x0, .LANCHOR31
+	ldrh	w2, [x25]
+	ldrb	w1, [x0, #:lo12:.LANCHOR31]
+	mov	w0, 24
+	sub	w0, w0, w1
+	sub	w1, w0, w2
 	mov	w0, 1
-	lsr	w1, w1, w3
-	lsl	w0, w0, w2
+	lsl	w0, w0, w1
+	ldr	w1, [x29, 120]
 	sub	w0, w0, #1
+	lsr	w1, w1, w2
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR67
-	ldrb	w1, [x1, #:lo12:.LANCHOR67]
+	adrp	x1, .LANCHOR69
+	ldrb	w1, [x1, #:lo12:.LANCHOR69]
 	udiv	w0, w0, w1
 	bl	ftl_vpn_decrement
-	b	.L3692
-.L3665:
+	b	.L3901
+.L3874:
 	mov	w0, -1
-.L3644:
+.L3853:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -23185,8 +24653,58 @@ ftl_discard:
 	mov	w1, w2
 	b	zftl_discard
 	.size	ftl_discard, .-ftl_discard
+	.section	.text.dump_pm_blk,"ax",@progbits
+	.align	2
+	.global	dump_pm_blk
+	.type	dump_pm_blk, %function
+dump_pm_blk:
+	stp	x29, x30, [sp, -48]!
+	mov	w2, 4
+	adrp	x0, .LC248
+	add	x0, x0, :lo12:.LC248
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR104
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR149
+	ldr	x1, [x20, #:lo12:.LANCHOR104]
+	mov	w19, 0
+	mov	w22, 65535
+	add	x1, x1, 704
+	ldrh	w3, [x1, -6]
+	bl	rknand_print_hex
+	ldrh	w3, [x21, #:lo12:.LANCHOR149]
+	add	x21, x21, :lo12:.LANCHOR149
+	ldr	x1, [x20, #:lo12:.LANCHOR104]
+	mov	w2, 2
+	adrp	x0, .LC249
+	add	x0, x0, :lo12:.LC249
+	add	x1, x1, 416
+	bl	rknand_print_hex
+.L3904:
+	ldrh	w0, [x21]
+	cmp	w0, w19
+	bhi	.L3906
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
+.L3906:
+	ldr	x0, [x20, #:lo12:.LANCHOR104]
+	add	x0, x0, x19, sxtw 1
+	ldrh	w0, [x0, 416]
+	cmp	w0, w22
+	beq	.L3905
+	mov	x1, 0
+	bl	ftl_sblk_dump
+.L3905:
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L3904
+	.size	dump_pm_blk, .-dump_pm_blk
 	.global	g_pm_spare
 	.global	pm_first_write
+	.global	pm_force_gc
 	.global	pm_gc_enable
 	.global	pm_last_load_ram_id
 	.global	pm_last_update_ram_id
@@ -23228,6 +24746,7 @@ ftl_discard:
 	.global	ftl_info_data_buffer
 	.global	ftl_tmp_buffer
 	.global	g_ftl_info_blk
+	.global	tlc_b05a_prog_tbl
 	.global	tlc_prog_order
 	.global	gc_des_ppa_tbl
 	.global	gc_valid_page_ppa
@@ -23314,10 +24833,14 @@ ftl_discard:
 	.global	g_die_cs_idx
 	.global	IDByte
 	.global	flash_read_retry
+	.global	_c_ftl_cs_bits
 	.global	g_maxRetryCount
 	.global	g_maxRegNum
 	.global	g_retryMode
 	.global	g_flash_toggle_mode_en
+	.global	g_flash_micron_3d_tlc_b16a
+	.global	g_flash_micron_3d_tlc_b05a
+	.global	g_flash_micron_3d_tlc_flag
 	.global	g_flash_3d_mlc_flag
 	.global	g_flash_3d_tlc_flag
 	.global	g_flash_multi_page_prog_en
@@ -23342,7 +24865,7 @@ ftl_discard:
 	.global	g_flash_page_buffer
 	.section	.bss.IDByte,"aw",@nobits
 	.align	2
-	.set	.LANCHOR42,. + 0
+	.set	.LANCHOR44,. + 0
 	.type	IDByte, %object
 	.size	IDByte, 32
 IDByte:
@@ -23356,25 +24879,31 @@ _c_ftl_blk_pre_plane:
 	.zero	2
 	.section	.bss._c_ftl_block_addr_log2,"aw",@nobits
 	.align	1
-	.set	.LANCHOR66,. + 0
+	.set	.LANCHOR68,. + 0
 	.type	_c_ftl_block_addr_log2, %object
 	.size	_c_ftl_block_addr_log2, 2
 _c_ftl_block_addr_log2:
 	.zero	2
 	.section	.bss._c_ftl_block_align_addr,"aw",@nobits
 	.align	1
-	.set	.LANCHOR103,. + 0
+	.set	.LANCHOR105,. + 0
 	.type	_c_ftl_block_align_addr, %object
 	.size	_c_ftl_block_align_addr, 2
 _c_ftl_block_align_addr:
 	.zero	2
 	.section	.bss._c_ftl_byte_pre_page,"aw",@nobits
 	.align	1
-	.set	.LANCHOR203,. + 0
+	.set	.LANCHOR208,. + 0
 	.type	_c_ftl_byte_pre_page, %object
 	.size	_c_ftl_byte_pre_page, 2
 _c_ftl_byte_pre_page:
 	.zero	2
+	.section	.bss._c_ftl_cs_bits,"aw",@nobits
+	.set	.LANCHOR31,. + 0
+	.type	_c_ftl_cs_bits, %object
+	.size	_c_ftl_cs_bits, 1
+_c_ftl_cs_bits:
+	.zero	1
 	.section	.bss._c_ftl_nand_blks_per_die,"aw",@nobits
 	.align	1
 	.type	_c_ftl_nand_blks_per_die, %object
@@ -23382,73 +24911,73 @@ _c_ftl_byte_pre_page:
 _c_ftl_nand_blks_per_die:
 	.zero	2
 	.section	.bss._c_ftl_nand_die_num,"aw",@nobits
-	.set	.LANCHOR104,. + 0
+	.set	.LANCHOR106,. + 0
 	.type	_c_ftl_nand_die_num, %object
 	.size	_c_ftl_nand_die_num, 1
 _c_ftl_nand_die_num:
 	.zero	1
 	.section	.bss._c_ftl_nand_planes_num,"aw",@nobits
-	.set	.LANCHOR78,. + 0
+	.set	.LANCHOR80,. + 0
 	.type	_c_ftl_nand_planes_num, %object
 	.size	_c_ftl_nand_planes_num, 1
 _c_ftl_nand_planes_num:
 	.zero	1
 	.section	.bss._c_ftl_nand_type,"aw",@nobits
-	.set	.LANCHOR71,. + 0
+	.set	.LANCHOR73,. + 0
 	.type	_c_ftl_nand_type, %object
 	.size	_c_ftl_nand_type, 1
 _c_ftl_nand_type:
 	.zero	1
 	.section	.bss._c_ftl_page_pre_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR77,. + 0
+	.set	.LANCHOR79,. + 0
 	.type	_c_ftl_page_pre_blk, %object
 	.size	_c_ftl_page_pre_blk, 2
 _c_ftl_page_pre_blk:
 	.zero	2
 	.section	.bss._c_ftl_page_pre_slc_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR85,. + 0
+	.set	.LANCHOR87,. + 0
 	.type	_c_ftl_page_pre_slc_blk, %object
 	.size	_c_ftl_page_pre_slc_blk, 2
 _c_ftl_page_pre_slc_blk:
 	.zero	2
 	.section	.bss._c_ftl_planes_per_die,"aw",@nobits
-	.set	.LANCHOR67,. + 0
+	.set	.LANCHOR69,. + 0
 	.type	_c_ftl_planes_per_die, %object
 	.size	_c_ftl_planes_per_die, 1
 _c_ftl_planes_per_die:
 	.zero	1
 	.section	.bss._c_ftl_pm_page_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR187,. + 0
+	.set	.LANCHOR194,. + 0
 	.type	_c_ftl_pm_page_num, %object
 	.size	_c_ftl_pm_page_num, 2
 _c_ftl_pm_page_num:
 	.zero	2
 	.section	.bss._c_ftl_sec_per_page,"aw",@nobits
-	.set	.LANCHOR123,. + 0
+	.set	.LANCHOR125,. + 0
 	.type	_c_ftl_sec_per_page, %object
 	.size	_c_ftl_sec_per_page, 1
 _c_ftl_sec_per_page:
 	.zero	1
 	.section	.bss._c_max_pm_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR146,. + 0
+	.set	.LANCHOR149,. + 0
 	.type	_c_max_pm_sblk, %object
 	.size	_c_max_pm_sblk, 2
 _c_max_pm_sblk:
 	.zero	2
 	.section	.bss._c_mix_max_slc_ec_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR118,. + 0
+	.set	.LANCHOR120,. + 0
 	.type	_c_mix_max_slc_ec_count, %object
 	.size	_c_mix_max_slc_ec_count, 2
 _c_mix_max_slc_ec_count:
 	.zero	2
 	.section	.bss._c_mix_max_xlc_ec_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR116,. + 0
+	.set	.LANCHOR118,. + 0
 	.type	_c_mix_max_xlc_ec_count, %object
 	.size	_c_mix_max_xlc_ec_count, 2
 _c_mix_max_xlc_ec_count:
@@ -23462,49 +24991,49 @@ _c_slc_to_xlc_ec_ratio:
 	.zero	2
 	.section	.bss._c_swl_slc_gc_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR145,. + 0
+	.set	.LANCHOR148,. + 0
 	.type	_c_swl_slc_gc_th, %object
 	.size	_c_swl_slc_gc_th, 2
 _c_swl_slc_gc_th:
 	.zero	2
 	.section	.bss._c_swl_xlc_gc_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR144,. + 0
+	.set	.LANCHOR147,. + 0
 	.type	_c_swl_xlc_gc_th, %object
 	.size	_c_swl_xlc_gc_th, 2
 _c_swl_xlc_gc_th:
 	.zero	2
 	.section	.bss._c_totle_data_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR208,. + 0
+	.set	.LANCHOR213,. + 0
 	.type	_c_totle_data_density, %object
 	.size	_c_totle_data_density, 4
 _c_totle_data_density:
 	.zero	4
 	.section	.bss._c_totle_log_page,"aw",@nobits
 	.align	2
-	.set	.LANCHOR120,. + 0
+	.set	.LANCHOR122,. + 0
 	.type	_c_totle_log_page, %object
 	.size	_c_totle_log_page, 4
 _c_totle_log_page:
 	.zero	4
 	.section	.bss._c_totle_phy_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR207,. + 0
+	.set	.LANCHOR212,. + 0
 	.type	_c_totle_phy_density, %object
 	.size	_c_totle_phy_density, 4
 _c_totle_phy_density:
 	.zero	4
 	.section	.bss._c_user_data_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR59,. + 0
+	.set	.LANCHOR61,. + 0
 	.type	_c_user_data_density, %object
 	.size	_c_user_data_density, 4
 _c_user_data_density:
 	.zero	4
 	.section	.bss._gc_after_discard_en,"aw",@nobits
 	.align	2
-	.set	.LANCHOR114,. + 0
+	.set	.LANCHOR116,. + 0
 	.type	_gc_after_discard_en, %object
 	.size	_gc_after_discard_en, 4
 _gc_after_discard_en:
@@ -23523,76 +25052,76 @@ _last_write_time:
 	.zero	4
 	.section	.bss._max_slc_super_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR117,. + 0
+	.set	.LANCHOR119,. + 0
 	.type	_max_slc_super_block, %object
 	.size	_max_slc_super_block, 2
 _max_slc_super_block:
 	.zero	2
 	.section	.bss._max_xlc_super_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR93,. + 0
+	.set	.LANCHOR95,. + 0
 	.type	_max_xlc_super_block, %object
 	.size	_max_xlc_super_block, 2
 _max_xlc_super_block:
 	.zero	2
 	.section	.bss._min_slc_super_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR89,. + 0
+	.set	.LANCHOR91,. + 0
 	.type	_min_slc_super_block, %object
 	.size	_min_slc_super_block, 2
 _min_slc_super_block:
 	.zero	2
 	.section	.bss.discard_sector_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR221,. + 0
+	.set	.LANCHOR227,. + 0
 	.type	discard_sector_count, %object
 	.size	discard_sector_count, 4
 discard_sector_count:
 	.zero	4
 	.section	.bss.fill_spare_size,"aw",@nobits
 	.align	1
-	.set	.LANCHOR48,. + 0
+	.set	.LANCHOR50,. + 0
 	.type	fill_spare_size, %object
 	.size	fill_spare_size, 2
 fill_spare_size:
 	.zero	2
 	.section	.bss.flash_ddr_tuning_sdr_read_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR160,. + 0
+	.set	.LANCHOR163,. + 0
 	.type	flash_ddr_tuning_sdr_read_count, %object
 	.size	flash_ddr_tuning_sdr_read_count, 4
 flash_ddr_tuning_sdr_read_count:
 	.zero	4
 	.section	.bss.flash_read_retry,"aw",@nobits
 	.align	3
-	.set	.LANCHOR162,. + 0
+	.set	.LANCHOR165,. + 0
 	.type	flash_read_retry, %object
 	.size	flash_read_retry, 8
 flash_read_retry:
 	.zero	8
 	.section	.bss.free_buf_count,"aw",@nobits
-	.set	.LANCHOR52,. + 0
+	.set	.LANCHOR54,. + 0
 	.type	free_buf_count, %object
 	.size	free_buf_count, 1
 free_buf_count:
 	.zero	1
 	.section	.bss.free_mix_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR99,. + 0
+	.set	.LANCHOR101,. + 0
 	.type	free_mix_sblk, %object
 	.size	free_mix_sblk, 2
 free_mix_sblk:
 	.zero	2
 	.section	.bss.free_slc_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR95,. + 0
+	.set	.LANCHOR97,. + 0
 	.type	free_slc_sblk, %object
 	.size	free_slc_sblk, 2
 free_slc_sblk:
 	.zero	2
 	.section	.bss.free_xlc_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR97,. + 0
+	.set	.LANCHOR99,. + 0
 	.type	free_xlc_sblk, %object
 	.size	free_xlc_sblk, 2
 free_xlc_sblk:
@@ -23604,14 +25133,14 @@ free_xlc_sblk:
 ftl_ext_info_data_buffer:
 	.zero	16384
 	.section	.bss.ftl_ext_info_first_write,"aw",@nobits
-	.set	.LANCHOR183,. + 0
+	.set	.LANCHOR186,. + 0
 	.type	ftl_ext_info_first_write, %object
 	.size	ftl_ext_info_first_write, 1
 ftl_ext_info_first_write:
 	.zero	1
 	.section	.bss.ftl_flush_jiffies,"aw",@nobits
 	.align	2
-	.set	.LANCHOR217,. + 0
+	.set	.LANCHOR222,. + 0
 	.type	ftl_flush_jiffies, %object
 	.size	ftl_flush_jiffies, 4
 ftl_flush_jiffies:
@@ -23624,41 +25153,41 @@ ftl_info_data_buffer:
 	.zero	16384
 	.section	.bss.ftl_info_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR178,. + 0
+	.set	.LANCHOR181,. + 0
 	.type	ftl_info_spare, %object
 	.size	ftl_info_spare, 256
 ftl_info_spare:
 	.zero	256
 	.section	.bss.ftl_low_format_cur_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR60,. + 0
+	.set	.LANCHOR62,. + 0
 	.type	ftl_low_format_cur_blk, %object
 	.size	ftl_low_format_cur_blk, 2
 ftl_low_format_cur_blk:
 	.zero	2
 	.section	.bss.ftl_power_lost_flag,"aw",@nobits
-	.set	.LANCHOR182,. + 0
+	.set	.LANCHOR185,. + 0
 	.type	ftl_power_lost_flag, %object
 	.size	ftl_power_lost_flag, 1
 ftl_power_lost_flag:
 	.zero	1
 	.section	.bss.ftl_sblk_lpa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR109,. + 0
+	.set	.LANCHOR111,. + 0
 	.type	ftl_sblk_lpa_tbl, %object
 	.size	ftl_sblk_lpa_tbl, 8
 ftl_sblk_lpa_tbl:
 	.zero	8
 	.section	.bss.ftl_sblk_update_list,"aw",@nobits
 	.align	3
-	.set	.LANCHOR65,. + 0
+	.set	.LANCHOR67,. + 0
 	.type	ftl_sblk_update_list, %object
 	.size	ftl_sblk_update_list, 16
 ftl_sblk_update_list:
 	.zero	16
 	.section	.bss.ftl_sblk_update_list_offset,"aw",@nobits
 	.align	1
-	.set	.LANCHOR115,. + 0
+	.set	.LANCHOR117,. + 0
 	.type	ftl_sblk_update_list_offset, %object
 	.size	ftl_sblk_update_list_offset, 2
 ftl_sblk_update_list_offset:
@@ -23672,13 +25201,13 @@ ftl_sblk_vpn:
 	.zero	8
 	.section	.bss.ftl_sblk_vpn_update_id,"aw",@nobits
 	.align	1
-	.set	.LANCHOR64,. + 0
+	.set	.LANCHOR66,. + 0
 	.type	ftl_sblk_vpn_update_id, %object
 	.size	ftl_sblk_vpn_update_id, 2
 ftl_sblk_vpn_update_id:
 	.zero	2
 	.section	.bss.ftl_sys_info_first_write,"aw",@nobits
-	.set	.LANCHOR181,. + 0
+	.set	.LANCHOR184,. + 0
 	.type	ftl_sys_info_first_write, %object
 	.size	ftl_sys_info_first_write, 1
 ftl_sys_info_first_write:
@@ -23691,14 +25220,14 @@ ftl_tmp_buffer:
 	.zero	16384
 	.section	.bss.ftl_tmp_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR176,. + 0
+	.set	.LANCHOR179,. + 0
 	.type	ftl_tmp_spare, %object
 	.size	ftl_tmp_spare, 256
 ftl_tmp_spare:
 	.zero	256
 	.section	.bss.ftl_vpn_update_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR113,. + 0
+	.set	.LANCHOR115,. + 0
 	.type	ftl_vpn_update_count, %object
 	.size	ftl_vpn_update_count, 2
 ftl_vpn_update_count:
@@ -23712,14 +25241,14 @@ g_block_align_addr:
 	.zero	2
 	.section	.bss.g_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR50,. + 0
+	.set	.LANCHOR52,. + 0
 	.type	g_buf, %object
 	.size	g_buf, 2048
 g_buf:
 	.zero	2048
 	.section	.bss.g_die_addr,"aw",@nobits
 	.align	2
-	.set	.LANCHOR141,. + 0
+	.set	.LANCHOR143,. + 0
 	.type	g_die_addr, %object
 	.size	g_die_addr, 32
 g_die_addr:
@@ -23732,58 +25261,76 @@ g_die_addr:
 g_die_cs_idx:
 	.zero	8
 	.section	.bss.g_flash_3d_mlc_flag,"aw",@nobits
-	.set	.LANCHOR72,. + 0
+	.set	.LANCHOR74,. + 0
 	.type	g_flash_3d_mlc_flag, %object
 	.size	g_flash_3d_mlc_flag, 1
 g_flash_3d_mlc_flag:
 	.zero	1
 	.section	.bss.g_flash_3d_tlc_flag,"aw",@nobits
-	.set	.LANCHOR75,. + 0
+	.set	.LANCHOR77,. + 0
 	.type	g_flash_3d_tlc_flag, %object
 	.size	g_flash_3d_tlc_flag, 1
 g_flash_3d_tlc_flag:
 	.zero	1
 	.section	.bss.g_flash_blk_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR195,. + 0
+	.set	.LANCHOR198,. + 0
 	.type	g_flash_blk_info, %object
 	.size	g_flash_blk_info, 4
 g_flash_blk_info:
 	.zero	4
 	.section	.bss.g_flash_cur_mode,"aw",@nobits
 	.align	3
-	.set	.LANCHOR32,. + 0
+	.set	.LANCHOR33,. + 0
 	.type	g_flash_cur_mode, %object
 	.size	g_flash_cur_mode, 4
 g_flash_cur_mode:
 	.zero	4
 	.section	.bss.g_flash_interface_mode,"aw",@nobits
-	.set	.LANCHOR43,. + 0
+	.set	.LANCHOR45,. + 0
 	.type	g_flash_interface_mode, %object
 	.size	g_flash_interface_mode, 1
 g_flash_interface_mode:
+	.zero	1
+	.section	.bss.g_flash_micron_3d_tlc_b05a,"aw",@nobits
+	.set	.LANCHOR204,. + 0
+	.type	g_flash_micron_3d_tlc_b05a, %object
+	.size	g_flash_micron_3d_tlc_b05a, 1
+g_flash_micron_3d_tlc_b05a:
+	.zero	1
+	.section	.bss.g_flash_micron_3d_tlc_b16a,"aw",@nobits
+	.set	.LANCHOR205,. + 0
+	.type	g_flash_micron_3d_tlc_b16a, %object
+	.size	g_flash_micron_3d_tlc_b16a, 1
+g_flash_micron_3d_tlc_b16a:
+	.zero	1
+	.section	.bss.g_flash_micron_3d_tlc_flag,"aw",@nobits
+	.set	.LANCHOR35,. + 0
+	.type	g_flash_micron_3d_tlc_flag, %object
+	.size	g_flash_micron_3d_tlc_flag, 1
+g_flash_micron_3d_tlc_flag:
 	.zero	1
 	.section	.bss.g_flash_multi_page_prog_en,"aw",@nobits
-	.set	.LANCHOR39,. + 0
+	.set	.LANCHOR41,. + 0
 	.type	g_flash_multi_page_prog_en, %object
 	.size	g_flash_multi_page_prog_en, 1
 g_flash_multi_page_prog_en:
 	.zero	1
 	.section	.bss.g_flash_multi_page_read_en,"aw",@nobits
-	.set	.LANCHOR168,. + 0
+	.set	.LANCHOR171,. + 0
 	.type	g_flash_multi_page_read_en, %object
 	.size	g_flash_multi_page_read_en, 1
 g_flash_multi_page_read_en:
 	.zero	1
 	.section	.bss.g_flash_page_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR164,. + 0
+	.set	.LANCHOR167,. + 0
 	.type	g_flash_page_buffer, %object
 	.size	g_flash_page_buffer, 8
 g_flash_page_buffer:
 	.zero	8
 	.section	.bss.g_flash_reversd_blks,"aw",@nobits
-	.set	.LANCHOR200,. + 0
+	.set	.LANCHOR203,. + 0
 	.type	g_flash_reversd_blks, %object
 	.size	g_flash_reversd_blks, 1
 g_flash_reversd_blks:
@@ -23796,28 +25343,28 @@ g_flash_slc_mode:
 	.zero	1
 	.section	.bss.g_flash_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR163,. + 0
+	.set	.LANCHOR166,. + 0
 	.type	g_flash_spare_buffer, %object
 	.size	g_flash_spare_buffer, 8
 g_flash_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_sys_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR194,. + 0
+	.set	.LANCHOR197,. + 0
 	.type	g_flash_sys_spare_buffer, %object
 	.size	g_flash_sys_spare_buffer, 8
 g_flash_sys_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_tmp_page_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR156,. + 0
+	.set	.LANCHOR159,. + 0
 	.type	g_flash_tmp_page_buffer, %object
 	.size	g_flash_tmp_page_buffer, 8
 g_flash_tmp_page_buffer:
 	.zero	8
 	.section	.bss.g_flash_tmp_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR158,. + 0
+	.set	.LANCHOR161,. + 0
 	.type	g_flash_tmp_spare_buffer, %object
 	.size	g_flash_tmp_spare_buffer, 8
 g_flash_tmp_spare_buffer:
@@ -23830,18 +25377,18 @@ g_flash_toggle_mode_en:
 	.zero	1
 	.section	.bss.g_ftl_info_blk,"aw",@nobits
 	.align	6
-	.set	.LANCHOR179,. + 0
+	.set	.LANCHOR182,. + 0
 	.type	g_ftl_info_blk, %object
 	.size	g_ftl_info_blk, 4
 g_ftl_info_blk:
 	.zero	4
 	.section	.bss.g_gc_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR63,. + 0
+	.set	.LANCHOR64,. + 0
 	.type	g_gc_info, %object
-	.size	g_gc_info, 344
+	.size	g_gc_info, 600
 g_gc_info:
-	.zero	344
+	.zero	600
 	.section	.bss.g_idb_ecc_bits,"aw",@nobits
 	.set	.LANCHOR17,. + 0
 	.type	g_idb_ecc_bits, %object
@@ -23868,14 +25415,14 @@ g_lsb_page_tbl:
 g_maxRegNum:
 	.zero	1
 	.section	.bss.g_maxRetryCount,"aw",@nobits
-	.set	.LANCHOR159,. + 0
+	.set	.LANCHOR162,. + 0
 	.type	g_maxRetryCount, %object
 	.size	g_maxRetryCount, 1
 g_maxRetryCount:
 	.zero	1
 	.section	.bss.g_msb_page_tbl,"aw",@nobits
 	.align	2
-	.set	.LANCHOR138,. + 0
+	.set	.LANCHOR140,. + 0
 	.type	g_msb_page_tbl, %object
 	.size	g_msb_page_tbl, 1024
 g_msb_page_tbl:
@@ -23894,20 +25441,20 @@ g_nand_max_die:
 g_nand_opt_para:
 	.zero	32
 	.section	.bss.g_nandc_ecc_bits,"aw",@nobits
-	.set	.LANCHOR44,. + 0
+	.set	.LANCHOR46,. + 0
 	.type	g_nandc_ecc_bits, %object
 	.size	g_nandc_ecc_bits, 1
 g_nandc_ecc_bits:
 	.zero	1
 	.section	.bss.g_nandc_tran_timeout,"aw",@nobits
-	.set	.LANCHOR157,. + 0
+	.set	.LANCHOR160,. + 0
 	.type	g_nandc_tran_timeout, %object
 	.size	g_nandc_tran_timeout, 1
 g_nandc_tran_timeout:
 	.zero	1
 	.section	.bss.g_nandc_v6_master_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR47,. + 0
+	.set	.LANCHOR49,. + 0
 	.type	g_nandc_v6_master_info, %object
 	.size	g_nandc_v6_master_info, 40
 g_nandc_v6_master_info:
@@ -23919,7 +25466,7 @@ g_nandc_v6_master_info:
 g_nandc_ver:
 	.zero	1
 	.section	.bss.g_one_pass_program,"aw",@nobits
-	.set	.LANCHOR73,. + 0
+	.set	.LANCHOR75,. + 0
 	.type	g_one_pass_program, %object
 	.size	g_one_pass_program, 1
 g_one_pass_program:
@@ -23950,131 +25497,131 @@ g_slc_mode_enable:
 	.zero	1
 	.section	.bss.g_slc_page_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR140,. + 0
+	.set	.LANCHOR142,. + 0
 	.type	g_slc_page_num, %object
 	.size	g_slc_page_num, 2
 g_slc_page_num:
 	.zero	2
 	.section	.bss.g_totle_phy_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR142,. + 0
+	.set	.LANCHOR144,. + 0
 	.type	g_totle_phy_block, %object
 	.size	g_totle_phy_block, 2
 g_totle_phy_block:
 	.zero	2
 	.section	.bss.gc_des_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR154,. + 0
+	.set	.LANCHOR157,. + 0
 	.type	gc_des_ppa_tbl, %object
 	.size	gc_des_ppa_tbl, 8
 gc_des_ppa_tbl:
 	.zero	8
 	.section	.bss.gc_free_slc_sblk_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR79,. + 0
+	.set	.LANCHOR81,. + 0
 	.type	gc_free_slc_sblk_th, %object
 	.size	gc_free_slc_sblk_th, 2
 gc_free_slc_sblk_th:
 	.zero	2
 	.section	.bss.gc_lpa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR152,. + 0
+	.set	.LANCHOR155,. + 0
 	.type	gc_lpa_tbl, %object
 	.size	gc_lpa_tbl, 8
 gc_lpa_tbl:
 	.zero	8
 	.section	.bss.gc_mode,"aw",@nobits
-	.set	.LANCHOR76,. + 0
+	.set	.LANCHOR78,. + 0
 	.type	gc_mode, %object
 	.size	gc_mode, 1
 gc_mode:
 	.zero	1
 	.section	.bss.gc_page_buf_id,"aw",@nobits
 	.align	3
-	.set	.LANCHOR74,. + 0
+	.set	.LANCHOR76,. + 0
 	.type	gc_page_buf_id, %object
 	.size	gc_page_buf_id, 8
 gc_page_buf_id:
 	.zero	8
 	.section	.bss.gc_pre_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR153,. + 0
+	.set	.LANCHOR156,. + 0
 	.type	gc_pre_ppa_tbl, %object
 	.size	gc_pre_ppa_tbl, 8
 gc_pre_ppa_tbl:
 	.zero	8
 	.section	.bss.gc_search_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR151,. + 0
+	.set	.LANCHOR154,. + 0
 	.type	gc_search_count, %object
 	.size	gc_search_count, 4
 gc_search_count:
 	.zero	4
 	.section	.bss.gc_slc_cache_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR82,. + 0
+	.set	.LANCHOR84,. + 0
 	.type	gc_slc_cache_index, %object
 	.size	gc_slc_cache_index, 2
 gc_slc_cache_index:
 	.zero	2
 	.section	.bss.gc_slc_data_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR86,. + 0
+	.set	.LANCHOR88,. + 0
 	.type	gc_slc_data_index, %object
 	.size	gc_slc_data_index, 2
 gc_slc_data_index:
 	.zero	2
 	.section	.bss.gc_slc_mode_tlc_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR84,. + 0
+	.set	.LANCHOR86,. + 0
 	.type	gc_slc_mode_tlc_vpn_th, %object
 	.size	gc_slc_mode_tlc_vpn_th, 2
 gc_slc_mode_tlc_vpn_th:
 	.zero	2
 	.section	.bss.gc_slc_mode_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR62,. + 0
+	.set	.LANCHOR63,. + 0
 	.type	gc_slc_mode_vpn_th, %object
 	.size	gc_slc_mode_vpn_th, 2
 gc_slc_mode_vpn_th:
 	.zero	2
 	.section	.bss.gc_state,"aw",@nobits
-	.set	.LANCHOR150,. + 0
+	.set	.LANCHOR153,. + 0
 	.type	gc_state, %object
 	.size	gc_state, 1
 gc_state:
 	.zero	1
 	.section	.bss.gc_tlc_mode_slc_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR94,. + 0
+	.set	.LANCHOR96,. + 0
 	.type	gc_tlc_mode_slc_vpn_th, %object
 	.size	gc_tlc_mode_slc_vpn_th, 2
 gc_tlc_mode_slc_vpn_th:
 	.zero	2
 	.section	.bss.gc_tlc_mode_tlc_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR91,. + 0
+	.set	.LANCHOR93,. + 0
 	.type	gc_tlc_mode_tlc_vpn_th, %object
 	.size	gc_tlc_mode_tlc_vpn_th, 2
 gc_tlc_mode_tlc_vpn_th:
 	.zero	2
 	.section	.bss.gc_valid_page_ppa,"aw",@nobits
 	.align	3
-	.set	.LANCHOR68,. + 0
+	.set	.LANCHOR70,. + 0
 	.type	gc_valid_page_ppa, %object
 	.size	gc_valid_page_ppa, 8
 gc_valid_page_ppa:
 	.zero	8
 	.section	.bss.gc_xlc_data_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR83,. + 0
+	.set	.LANCHOR85,. + 0
 	.type	gc_xlc_data_index, %object
 	.size	gc_xlc_data_index, 2
 gc_xlc_data_index:
 	.zero	2
 	.section	.bss.gc_xlc_search_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR87,. + 0
+	.set	.LANCHOR89,. + 0
 	.type	gc_xlc_search_index, %object
 	.size	gc_xlc_search_index, 2
 gc_xlc_search_index:
@@ -24088,7 +25635,7 @@ gp_blk_info:
 	.zero	8
 	.section	.bss.gp_data_slc_cache_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR81,. + 0
+	.set	.LANCHOR83,. + 0
 	.type	gp_data_slc_cache_head, %object
 	.size	gp_data_slc_cache_head, 8
 gp_data_slc_cache_head:
@@ -24102,14 +25649,14 @@ gp_data_slc_data_head:
 	.zero	8
 	.section	.bss.gp_data_xlc_data_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR80,. + 0
+	.set	.LANCHOR82,. + 0
 	.type	gp_data_xlc_data_head, %object
 	.size	gp_data_xlc_data_head, 8
 gp_data_xlc_data_head:
 	.zero	8
 	.section	.bss.gp_flash_check_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR137,. + 0
+	.set	.LANCHOR139,. + 0
 	.type	gp_flash_check_buf, %object
 	.size	gp_flash_check_buf, 8
 gp_flash_check_buf:
@@ -24123,21 +25670,21 @@ gp_flash_info:
 	.zero	8
 	.section	.bss.gp_free_mix_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR100,. + 0
+	.set	.LANCHOR102,. + 0
 	.type	gp_free_mix_head, %object
 	.size	gp_free_mix_head, 8
 gp_free_mix_head:
 	.zero	8
 	.section	.bss.gp_free_slc_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR96,. + 0
+	.set	.LANCHOR98,. + 0
 	.type	gp_free_slc_head, %object
 	.size	gp_free_slc_head, 8
 gp_free_slc_head:
 	.zero	8
 	.section	.bss.gp_free_xlc_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR98,. + 0
+	.set	.LANCHOR100,. + 0
 	.type	gp_free_xlc_head, %object
 	.size	gp_free_xlc_head, 8
 gp_free_xlc_head:
@@ -24151,7 +25698,7 @@ gp_ftl_ext_info:
 	.zero	8
 	.section	.bss.gp_ftl_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR102,. + 0
+	.set	.LANCHOR104,. + 0
 	.type	gp_ftl_info, %object
 	.size	gp_ftl_info, 8
 gp_ftl_info:
@@ -24179,28 +25726,28 @@ gp_sblk_list_tbl:
 	.zero	8
 	.section	.bss.idb_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR135,. + 0
+	.set	.LANCHOR137,. + 0
 	.type	idb_buf, %object
 	.size	idb_buf, 8
 idb_buf:
 	.zero	8
 	.section	.bss.idb_need_write_back,"aw",@nobits
 	.align	2
-	.set	.LANCHOR136,. + 0
+	.set	.LANCHOR138,. + 0
 	.type	idb_need_write_back, %object
 	.size	idb_need_write_back, 4
 idb_need_write_back:
 	.zero	4
 	.section	.bss.lpa_hash,"aw",@nobits
 	.align	3
-	.set	.LANCHOR108,. + 0
+	.set	.LANCHOR110,. + 0
 	.type	lpa_hash, %object
 	.size	lpa_hash, 512
 lpa_hash:
 	.zero	512
 	.section	.bss.lpa_hash_index,"aw",@nobits
 	.align	3
-	.set	.LANCHOR110,. + 0
+	.set	.LANCHOR112,. + 0
 	.type	lpa_hash_index, %object
 	.size	lpa_hash_index, 8
 lpa_hash_index:
@@ -24212,19 +25759,19 @@ lpa_hash_index:
 nandc_ecc_sts:
 	.zero	16
 	.section	.bss.nandc_hw_seed,"aw",@nobits
-	.set	.LANCHOR45,. + 0
+	.set	.LANCHOR47,. + 0
 	.type	nandc_hw_seed, %object
 	.size	nandc_hw_seed, 1
 nandc_hw_seed:
 	.zero	1
 	.section	.bss.nandc_randomizer_en,"aw",@nobits
-	.set	.LANCHOR46,. + 0
+	.set	.LANCHOR48,. + 0
 	.type	nandc_randomizer_en, %object
 	.size	nandc_randomizer_en, 1
 nandc_randomizer_en:
 	.zero	1
 	.section	.bss.p_free_buf_head,"aw",@nobits
-	.set	.LANCHOR51,. + 0
+	.set	.LANCHOR53,. + 0
 	.type	p_free_buf_head, %object
 	.size	p_free_buf_head, 1
 p_free_buf_head:
@@ -24241,130 +25788,137 @@ p_read_ahead_ext_buf:
 	.size	pm_first_write, 1
 pm_first_write:
 	.zero	1
+	.section	.bss.pm_force_gc,"aw",@nobits
+	.align	2
+	.set	.LANCHOR146,. + 0
+	.type	pm_force_gc, %object
+	.size	pm_force_gc, 4
+pm_force_gc:
+	.zero	4
 	.section	.bss.pm_gc_enable,"aw",@nobits
 	.align	2
-	.set	.LANCHOR130,. + 0
+	.set	.LANCHOR132,. + 0
 	.type	pm_gc_enable, %object
 	.size	pm_gc_enable, 4
 pm_gc_enable:
 	.zero	4
 	.section	.bss.pm_last_load_ram_id,"aw",@nobits
-	.set	.LANCHOR205,. + 0
+	.set	.LANCHOR210,. + 0
 	.type	pm_last_load_ram_id, %object
 	.size	pm_last_load_ram_id, 1
 pm_last_load_ram_id:
 	.zero	1
 	.section	.bss.pm_last_update_ram_id,"aw",@nobits
-	.set	.LANCHOR133,. + 0
+	.set	.LANCHOR135,. + 0
 	.type	pm_last_update_ram_id, %object
 	.size	pm_last_update_ram_id, 1
 pm_last_update_ram_id:
 	.zero	1
 	.section	.bss.pm_ram_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR132,. + 0
+	.set	.LANCHOR134,. + 0
 	.type	pm_ram_info, %object
 	.size	pm_ram_info, 512
 pm_ram_info:
 	.zero	512
 	.section	.bss.read_ahead_lpa,"aw",@nobits
 	.align	2
-	.set	.LANCHOR206,. + 0
+	.set	.LANCHOR211,. + 0
 	.type	read_ahead_lpa, %object
 	.size	read_ahead_lpa, 4
 read_ahead_lpa:
 	.zero	4
 	.section	.bss.read_buf_count,"aw",@nobits
-	.set	.LANCHOR127,. + 0
+	.set	.LANCHOR129,. + 0
 	.type	read_buf_count, %object
 	.size	read_buf_count, 1
 read_buf_count:
 	.zero	1
 	.section	.bss.read_buf_head,"aw",@nobits
-	.set	.LANCHOR126,. + 0
+	.set	.LANCHOR128,. + 0
 	.type	read_buf_head, %object
 	.size	read_buf_head, 1
 read_buf_head:
 	.zero	1
 	.section	.bss.sblk_gc_write_completed_queue_head,"aw",@nobits
-	.set	.LANCHOR69,. + 0
+	.set	.LANCHOR71,. + 0
 	.type	sblk_gc_write_completed_queue_head, %object
 	.size	sblk_gc_write_completed_queue_head, 1
 sblk_gc_write_completed_queue_head:
 	.zero	1
 	.section	.bss.sblk_queue_head,"aw",@nobits
-	.set	.LANCHOR54,. + 0
+	.set	.LANCHOR56,. + 0
 	.type	sblk_queue_head, %object
 	.size	sblk_queue_head, 1
 sblk_queue_head:
 	.zero	1
 	.section	.bss.sblk_read_completed_queue_head,"aw",@nobits
-	.set	.LANCHOR129,. + 0
+	.set	.LANCHOR131,. + 0
 	.type	sblk_read_completed_queue_head, %object
 	.size	sblk_read_completed_queue_head, 1
 sblk_read_completed_queue_head:
 	.zero	1
 	.section	.bss.sblk_write_completed_queue_head,"aw",@nobits
-	.set	.LANCHOR124,. + 0
+	.set	.LANCHOR126,. + 0
 	.type	sblk_write_completed_queue_head, %object
 	.size	sblk_write_completed_queue_head, 1
 sblk_write_completed_queue_head:
 	.zero	1
 	.section	.bss.slc_cache_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR88,. + 0
+	.set	.LANCHOR90,. + 0
 	.type	slc_cache_sblk, %object
 	.size	slc_cache_sblk, 2
 slc_cache_sblk:
 	.zero	2
 	.section	.bss.slc_data_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR90,. + 0
+	.set	.LANCHOR92,. + 0
 	.type	slc_data_sblk, %object
 	.size	slc_data_sblk, 2
 slc_data_sblk:
 	.zero	2
 	.section	.bss.write_buf_count,"aw",@nobits
-	.set	.LANCHOR58,. + 0
+	.set	.LANCHOR60,. + 0
 	.type	write_buf_count, %object
 	.size	write_buf_count, 1
 write_buf_count:
 	.zero	1
 	.section	.bss.write_buf_head,"aw",@nobits
-	.set	.LANCHOR57,. + 0
+	.set	.LANCHOR59,. + 0
 	.type	write_buf_head, %object
 	.size	write_buf_head, 1
 write_buf_head:
 	.zero	1
 	.section	.bss.write_commit_count,"aw",@nobits
-	.set	.LANCHOR121,. + 0
+	.set	.LANCHOR123,. + 0
 	.type	write_commit_count, %object
 	.size	write_commit_count, 1
 write_commit_count:
 	.zero	1
 	.section	.bss.write_commit_head,"aw",@nobits
-	.set	.LANCHOR174,. + 0
+	.set	.LANCHOR177,. + 0
 	.type	write_commit_head, %object
 	.size	write_commit_head, 1
 write_commit_head:
 	.zero	1
 	.section	.bss.xlc_data_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR92,. + 0
+	.set	.LANCHOR94,. + 0
 	.type	xlc_data_sblk, %object
 	.size	xlc_data_sblk, 2
 xlc_data_sblk:
 	.zero	2
 	.section	.bss.zftl_print_list_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR101,. + 0
+	.set	.LANCHOR103,. + 0
 	.type	zftl_print_list_count, %object
 	.size	zftl_print_list_count, 2
 zftl_print_list_count:
 	.zero	2
 	.section	.data.g_nand_para_info,"aw",@progbits
 	.align	3
-	.set	.LANCHOR31,. + 0
+	.set	.LANCHOR32,. + 0
 	.type	g_nand_para_info, %object
 	.size	g_nand_para_info, 32
 g_nand_para_info:
@@ -24398,7 +25952,7 @@ g_nand_para_info:
 	.byte	0
 	.section	.data.hy_f26_ref_value,"aw",@progbits
 	.align	3
-	.set	.LANCHOR155,. + 0
+	.set	.LANCHOR158,. + 0
 	.type	hy_f26_ref_value, %object
 	.size	hy_f26_ref_value, 28
 hy_f26_ref_value:
@@ -24432,7 +25986,7 @@ hy_f26_ref_value:
 	.byte	-37
 	.section	.data.nand_opt_para,"aw",@progbits
 	.align	3
-	.set	.LANCHOR199,. + 0
+	.set	.LANCHOR202,. + 0
 	.type	nand_opt_para, %object
 	.size	nand_opt_para, 128
 nand_opt_para:
@@ -24514,7 +26068,7 @@ nand_opt_para:
 	.zero	14
 	.section	.data.sd15_slc_rr,"aw",@progbits
 	.align	3
-	.set	.LANCHOR37,. + 0
+	.set	.LANCHOR39,. + 0
 	.type	sd15_slc_rr, %object
 	.size	sd15_slc_rr, 25
 sd15_slc_rr:
@@ -24545,7 +26099,7 @@ sd15_slc_rr:
 	.byte	112
 	.section	.data.sd15_tlc_rr,"aw",@progbits
 	.align	3
-	.set	.LANCHOR36,. + 0
+	.set	.LANCHOR38,. + 0
 	.type	sd15_tlc_rr, %object
 	.size	sd15_tlc_rr, 329
 sd15_tlc_rr:
@@ -24878,9 +26432,783 @@ sd15_tlc_rr:
 	.byte	0
 	.byte	-32
 	.byte	0
+	.section	.data.tlc_b05a_prog_tbl,"aw",@progbits
+	.align	3
+	.set	.LANCHOR224,. + 0
+	.type	tlc_b05a_prog_tbl, %object
+	.size	tlc_b05a_prog_tbl, 1536
+tlc_b05a_prog_tbl:
+	.hword	0
+	.hword	0
+	.hword	0
+	.hword	0
+	.hword	0
+	.hword	0
+	.hword	0
+	.hword	0
+	.hword	9
+	.hword	0
+	.hword	11
+	.hword	0
+	.hword	13
+	.hword	0
+	.hword	15
+	.hword	0
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 	.align	3
-	.set	.LANCHOR219,. + 0
+	.set	.LANCHOR225,. + 0
 	.type	tlc_prog_order, %object
 	.size	tlc_prog_order, 768
 tlc_prog_order:
@@ -25277,9 +27605,9 @@ zftl_debug:
 	.word	17476
 	.section	.data.zftl_nand_flash_para_tbl,"aw",@progbits
 	.align	3
-	.set	.LANCHOR198,. + 0
+	.set	.LANCHOR201,. + 0
 	.type	zftl_nand_flash_para_tbl, %object
-	.size	zftl_nand_flash_para_tbl, 1248
+	.size	zftl_nand_flash_para_tbl, 1408
 zftl_nand_flash_para_tbl:
 	.byte	6
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 	.byte	0
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 	.byte	6
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 	.byte	-34
@@ -26257,9 +28641,9 @@ zftl_nand_flash_para_tbl:
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 	.byte	0
 	.hword	256
-	.byte	2
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-	.byte	-66
+	.byte	0
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 	.byte	-83
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 	.byte	-95
 	.byte	0
-	.byte	4
+	.byte	7
 	.byte	1
 	.byte	32
 	.hword	512
@@ -26352,7 +28736,7 @@ zftl_nand_flash_para_tbl:
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 	.byte	-91
 	.byte	0
-	.byte	4
+	.byte	7
 	.byte	1
 	.byte	32
 	.hword	512
@@ -26368,21 +28752,105 @@ zftl_nand_flash_para_tbl:
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+	.hword	1024
+	.hword	449
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+	.byte	0
+	.hword	4096
 	.byte	3
 	.byte	0
 	.byte	0
-	.byte	0
+	.byte	4
 	.section	.rodata.__func__.10032,"a",@progbits
 	.align	3
-	.set	.LANCHOR211,. + 0
+	.set	.LANCHOR216,. + 0
 	.type	__func__.10032, %object
 	.size	__func__.10032, 20
 __func__.10032:
 	.string	"gc_scan_static_data"
 	.section	.rodata.__func__.10099,"a",@progbits
 	.align	3
-	.set	.LANCHOR220,. + 0
+	.set	.LANCHOR226,. + 0
 	.type	__func__.10099, %object
 	.size	__func__.10099, 11
 __func__.10099:
@@ -26403,420 +28871,420 @@ __func__.10217:
 	.string	"_list_update_data_list"
 	.section	.rodata.__func__.10325,"a",@progbits
 	.align	3
-	.set	.LANCHOR180,. + 0
+	.set	.LANCHOR183,. + 0
 	.type	__func__.10325, %object
 	.size	__func__.10325, 15
 __func__.10325:
 	.string	"ftl_info_flush"
 	.section	.rodata.__func__.10357,"a",@progbits
 	.align	3
-	.set	.LANCHOR128,. + 0
+	.set	.LANCHOR130,. + 0
 	.type	__func__.10357, %object
 	.size	__func__.10357, 15
 __func__.10357:
 	.string	"ftl_alloc_sblk"
 	.section	.rodata.__func__.10399,"a",@progbits
 	.align	3
-	.set	.LANCHOR105,. + 0
+	.set	.LANCHOR107,. + 0
 	.type	__func__.10399, %object
 	.size	__func__.10399, 18
 __func__.10399:
 	.string	"ftl_alloc_sys_blk"
 	.section	.rodata.__func__.10409,"a",@progbits
 	.align	3
-	.set	.LANCHOR106,. + 0
+	.set	.LANCHOR108,. + 0
 	.type	__func__.10409, %object
 	.size	__func__.10409, 17
 __func__.10409:
 	.string	"ftl_free_sys_blk"
-	.section	.rodata.__func__.10444,"a",@progbits
+	.section	.rodata.__func__.10467,"a",@progbits
 	.align	3
-	.set	.LANCHOR212,. + 0
-	.type	__func__.10444, %object
-	.size	__func__.10444, 14
-__func__.10444:
+	.set	.LANCHOR217,. + 0
+	.type	__func__.10467, %object
+	.size	__func__.10467, 14
+__func__.10467:
 	.string	"ftl_sblk_dump"
-	.section	.rodata.__func__.10468,"a",@progbits
+	.section	.rodata.__func__.10491,"a",@progbits
 	.align	3
-	.set	.LANCHOR201,. + 0
-	.type	__func__.10468, %object
-	.size	__func__.10468, 16
-__func__.10468:
+	.set	.LANCHOR206,. + 0
+	.type	__func__.10491, %object
+	.size	__func__.10491, 16
+__func__.10491:
 	.string	"ftl_sysblk_dump"
-	.section	.rodata.__func__.10490,"a",@progbits
+	.section	.rodata.__func__.10515,"a",@progbits
 	.align	3
 	.set	.LANCHOR189,. + 0
-	.type	__func__.10490, %object
-	.size	__func__.10490, 23
-__func__.10490:
+	.type	__func__.10515, %object
+	.size	__func__.10515, 23
+__func__.10515:
 	.string	"ftl_open_sblk_recovery"
-	.section	.rodata.__func__.10520,"a",@progbits
+	.section	.rodata.__func__.10548,"a",@progbits
 	.align	3
-	.set	.LANCHOR107,. + 0
-	.type	__func__.10520, %object
-	.size	__func__.10520, 23
-__func__.10520:
+	.set	.LANCHOR109,. + 0
+	.type	__func__.10548, %object
+	.size	__func__.10548, 23
+__func__.10548:
 	.string	"ftl_get_ppa_from_index"
-	.section	.rodata.__func__.10541,"a",@progbits
+	.section	.rodata.__func__.10569,"a",@progbits
 	.align	3
-	.set	.LANCHOR215,. + 0
-	.type	__func__.10541, %object
-	.size	__func__.10541, 19
-__func__.10541:
+	.set	.LANCHOR220,. + 0
+	.type	__func__.10569, %object
+	.size	__func__.10569, 19
+__func__.10569:
 	.string	"ftl_update_l2p_map"
-	.section	.rodata.__func__.10560,"a",@progbits
+	.section	.rodata.__func__.10588,"a",@progbits
 	.align	3
-	.set	.LANCHOR111,. + 0
-	.type	__func__.10560, %object
-	.size	__func__.10560, 22
-__func__.10560:
+	.set	.LANCHOR113,. + 0
+	.type	__func__.10588, %object
+	.size	__func__.10588, 22
+__func__.10588:
 	.string	"ftl_get_new_free_page"
-	.section	.rodata.__func__.10571,"a",@progbits
+	.section	.rodata.__func__.10599,"a",@progbits
 	.align	3
-	.set	.LANCHOR112,. + 0
-	.type	__func__.10571, %object
-	.size	__func__.10571, 22
-__func__.10571:
+	.set	.LANCHOR114,. + 0
+	.type	__func__.10599, %object
+	.size	__func__.10599, 22
+__func__.10599:
 	.string	"ftl_ext_alloc_new_blk"
-	.section	.rodata.__func__.10596,"a",@progbits
+	.section	.rodata.__func__.10624,"a",@progbits
 	.align	3
-	.set	.LANCHOR184,. + 0
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+	.set	.LANCHOR187,. + 0
+	.type	__func__.10624, %object
+	.size	__func__.10624, 19
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 	.string	"ftl_ext_info_flush"
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+	.section	.rodata.__func__.10636,"a",@progbits
 	.align	3
-	.set	.LANCHOR185,. + 0
-	.type	__func__.10608, %object
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-__func__.10608:
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+	.type	__func__.10636, %object
+	.size	__func__.10636, 18
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 	.string	"ftl_ext_info_init"
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 	.align	3
-	.set	.LANCHOR186,. + 0
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+	.type	__func__.10675, %object
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 	.string	"ftl_low_format_data_init"
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 	.align	3
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+	.type	__func__.10690, %object
+	.size	__func__.10690, 15
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 	.string	"ftl_low_format"
-	.section	.rodata.__func__.10710,"a",@progbits
+	.section	.rodata.__func__.10738,"a",@progbits
 	.align	3
-	.set	.LANCHOR177,. + 0
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-__func__.10710:
+	.set	.LANCHOR180,. + 0
+	.type	__func__.10738, %object
+	.size	__func__.10738, 14
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 	.string	"ftl_prog_page"
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+	.section	.rodata.__func__.10860,"a",@progbits
 	.align	3
-	.set	.LANCHOR167,. + 0
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-__func__.10832:
+	.set	.LANCHOR170,. + 0
+	.type	__func__.10860, %object
+	.size	__func__.10860, 31
+__func__.10860:
 	.string	"queue_wait_first_req_completed"
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+	.section	.rodata.__func__.10914,"a",@progbits
 	.align	3
-	.set	.LANCHOR173,. + 0
-	.type	__func__.10886, %object
-	.size	__func__.10886, 15
-__func__.10886:
+	.set	.LANCHOR176,. + 0
+	.type	__func__.10914, %object
+	.size	__func__.10914, 15
+__func__.10914:
 	.string	"sblk_prog_page"
-	.section	.rodata.__func__.10913,"a",@progbits
+	.section	.rodata.__func__.10941,"a",@progbits
 	.align	3
-	.set	.LANCHOR169,. + 0
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-__func__.10913:
+	.set	.LANCHOR172,. + 0
+	.type	__func__.10941, %object
+	.size	__func__.10941, 15
+__func__.10941:
 	.string	"sblk_read_page"
-	.section	.rodata.__func__.10973,"a",@progbits
+	.section	.rodata.__func__.11005,"a",@progbits
 	.align	3
-	.set	.LANCHOR202,. + 0
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-__func__.10973:
+	.set	.LANCHOR207,. + 0
+	.type	__func__.11005, %object
+	.size	__func__.11005, 16
+__func__.11005:
 	.string	"load_l2p_region"
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+	.section	.rodata.__func__.11021,"a",@progbits
 	.align	3
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-__func__.10987:
+	.set	.LANCHOR150,. + 0
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+	.size	__func__.11021, 13
+__func__.11021:
 	.string	"pm_free_sblk"
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+	.section	.rodata.__func__.11045,"a",@progbits
 	.align	3
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+	.set	.LANCHOR209,. + 0
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+	.size	__func__.11045, 6
+__func__.11045:
 	.string	"pm_gc"
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 	.align	3
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+	.set	.LANCHOR133,. + 0
+	.type	__func__.11061, %object
+	.size	__func__.11061, 17
+__func__.11061:
 	.string	"pm_alloc_new_blk"
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+	.section	.rodata.__func__.11071,"a",@progbits
 	.align	3
 	.set	.LANCHOR190,. + 0
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+	.type	__func__.11071, %object
+	.size	__func__.11071, 14
+__func__.11071:
 	.string	"pm_write_page"
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+	.section	.rodata.__func__.11089,"a",@progbits
 	.align	3
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+	.size	__func__.11089, 21
+__func__.11089:
 	.string	"pm_select_ram_region"
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+	.section	.rodata.__func__.8537,"a",@progbits
 	.align	3
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+	.set	.LANCHOR164,. + 0
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+	.size	__func__.8537, 19
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 	.string	"flash_read_page_en"
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+	.section	.rodata.__func__.8579,"a",@progbits
 	.align	3
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+	.size	__func__.8579, 19
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 	.string	"flash_prog_page_en"
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 	.align	3
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+	.size	__func__.8595, 26
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 	.string	"flash_erase_duplane_block"
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 	.align	3
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 	.string	"flash_erase_block_en"
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 	.align	3
 	.set	.LANCHOR29,. + 0
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+	.type	__func__.8620, %object
+	.size	__func__.8620, 28
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 	.string	"flash_wait_device_ready_raw"
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 	.string	"flash_start_tlc_page_prog"
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 	.string	"flash_start_3d_mlc_page_prog"
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 	.align	3
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 	.string	"flash_start_page_prog"
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 	.string	"flash_start_page_read"
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 	.string	"flash_complete_plane_page_read"
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 	.string	"flash_start_plane_read"
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 	.string	"flash_complete_page_read"
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 	.string	"flash_die_info_init"
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 	.string	"nand_flash_print_info"
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 	.string	"nand_flash_init"
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+	.set	.LANCHOR58,. + 0
+	.type	__func__.9335, %object
+	.size	__func__.9335, 16
+__func__.9335:
 	.string	"buf_remove_free"
-	.section	.rodata.__func__.9355,"a",@progbits
+	.section	.rodata.__func__.9348,"a",@progbits
 	.align	3
-	.set	.LANCHOR196,. + 0
-	.type	__func__.9355, %object
-	.size	__func__.9355, 20
-__func__.9355:
+	.set	.LANCHOR199,. + 0
+	.type	__func__.9348, %object
+	.size	__func__.9348, 20
+__func__.9348:
 	.string	"flash_info_blk_init"
-	.section	.rodata.__func__.9366,"a",@progbits
+	.section	.rodata.__func__.9359,"a",@progbits
 	.align	3
-	.set	.LANCHOR148,. + 0
-	.type	__func__.9366, %object
-	.size	__func__.9366, 21
-__func__.9366:
+	.set	.LANCHOR151,. + 0
+	.type	__func__.9359, %object
+	.size	__func__.9359, 21
+__func__.9359:
 	.string	"flash_info_data_init"
-	.section	.rodata.__func__.9388,"a",@progbits
+	.section	.rodata.__func__.9381,"a",@progbits
 	.align	3
-	.set	.LANCHOR193,. + 0
-	.type	__func__.9388, %object
-	.size	__func__.9388, 17
-__func__.9388:
+	.set	.LANCHOR196,. + 0
+	.type	__func__.9381, %object
+	.size	__func__.9381, 17
+__func__.9381:
 	.string	"flash_info_flush"
-	.section	.rodata.__func__.9464,"a",@progbits
+	.section	.rodata.__func__.9457,"a",@progbits
 	.align	3
-	.set	.LANCHOR143,. + 0
-	.type	__func__.9464, %object
-	.size	__func__.9464, 17
-__func__.9464:
+	.set	.LANCHOR145,. + 0
+	.type	__func__.9457, %object
+	.size	__func__.9457, 17
+__func__.9457:
 	.string	"lpa_rebuild_hash"
-	.section	.rodata.__func__.9511,"a",@progbits
+	.section	.rodata.__func__.9504,"a",@progbits
 	.align	3
-	.set	.LANCHOR216,. + 0
-	.type	__func__.9511, %object
-	.size	__func__.9511, 17
-__func__.9511:
+	.set	.LANCHOR221,. + 0
+	.type	__func__.9504, %object
+	.size	__func__.9504, 17
+__func__.9504:
 	.string	"ftl_write_commit"
-	.section	.rodata.__func__.9529,"a",@progbits
+	.section	.rodata.__func__.9522,"a",@progbits
 	.align	3
-	.set	.LANCHOR122,. + 0
-	.type	__func__.9529, %object
-	.size	__func__.9529, 14
-__func__.9529:
+	.set	.LANCHOR124,. + 0
+	.type	__func__.9522, %object
+	.size	__func__.9522, 14
+__func__.9522:
 	.string	"ftl_write_buf"
-	.section	.rodata.__func__.9574,"a",@progbits
+	.section	.rodata.__func__.9567,"a",@progbits
 	.align	3
-	.set	.LANCHOR125,. + 0
-	.type	__func__.9574, %object
-	.size	__func__.9574, 18
-__func__.9574:
+	.set	.LANCHOR127,. + 0
+	.type	__func__.9567, %object
+	.size	__func__.9567, 18
+__func__.9567:
 	.string	"zftl_add_read_buf"
-	.section	.rodata.__func__.9607,"a",@progbits
+	.section	.rodata.__func__.9600,"a",@progbits
 	.align	3
-	.set	.LANCHOR213,. + 0
-	.type	__func__.9607, %object
-	.size	__func__.9607, 10
-__func__.9607:
+	.set	.LANCHOR218,. + 0
+	.type	__func__.9600, %object
+	.size	__func__.9600, 10
+__func__.9600:
 	.string	"zftl_read"
-	.section	.rodata.__func__.9638,"a",@progbits
+	.section	.rodata.__func__.9631,"a",@progbits
 	.align	3
-	.set	.LANCHOR222,. + 0
-	.type	__func__.9638, %object
-	.size	__func__.9638, 13
-__func__.9638:
+	.set	.LANCHOR228,. + 0
+	.type	__func__.9631, %object
+	.size	__func__.9631, 13
+__func__.9631:
 	.string	"_ftl_discard"
-	.section	.rodata.__func__.9785,"a",@progbits
+	.section	.rodata.__func__.9780,"a",@progbits
 	.align	3
-	.set	.LANCHOR61,. + 0
-	.type	__func__.9785, %object
-	.size	__func__.9785, 12
-__func__.9785:
+	.set	.LANCHOR65,. + 0
+	.type	__func__.9780, %object
+	.size	__func__.9780, 12
+__func__.9780:
 	.string	"gc_add_sblk"
-	.section	.rodata.__func__.9832,"a",@progbits
+	.section	.rodata.__func__.9827,"a",@progbits
 	.align	3
-	.set	.LANCHOR214,. + 0
-	.type	__func__.9832, %object
-	.size	__func__.9832, 21
-__func__.9832:
+	.set	.LANCHOR219,. + 0
+	.type	__func__.9827, %object
+	.size	__func__.9827, 21
+__func__.9827:
 	.string	"gc_check_data_one_wl"
-	.section	.rodata.__func__.9866,"a",@progbits
+	.section	.rodata.__func__.9861,"a",@progbits
 	.align	3
-	.set	.LANCHOR209,. + 0
-	.type	__func__.9866, %object
-	.size	__func__.9866, 22
-__func__.9866:
+	.set	.LANCHOR214,. + 0
+	.type	__func__.9861, %object
+	.size	__func__.9861, 22
+__func__.9861:
 	.string	"gc_update_l2p_map_new"
-	.section	.rodata.__func__.9879,"a",@progbits
+	.section	.rodata.__func__.9874,"a",@progbits
 	.align	3
-	.set	.LANCHOR70,. + 0
-	.type	__func__.9879, %object
-	.size	__func__.9879, 19
-__func__.9879:
+	.set	.LANCHOR72,. + 0
+	.type	__func__.9874, %object
+	.size	__func__.9874, 19
+__func__.9874:
 	.string	"gc_write_completed"
-	.section	.rodata.__func__.9908,"a",@progbits
+	.section	.rodata.__func__.9903,"a",@progbits
 	.align	3
-	.set	.LANCHOR218,. + 0
-	.type	__func__.9908, %object
-	.size	__func__.9908, 16
-__func__.9908:
+	.set	.LANCHOR223,. + 0
+	.type	__func__.9903, %object
+	.size	__func__.9903, 16
+__func__.9903:
 	.string	"gc_do_copy_back"
 	.section	.rodata.__func__.9930,"a",@progbits
 	.align	3
-	.set	.LANCHOR119,. + 0
+	.set	.LANCHOR121,. + 0
 	.type	__func__.9930, %object
 	.size	__func__.9930, 16
 __func__.9930:
 	.string	"gc_free_src_blk"
 	.section	.rodata.__func__.9974,"a",@progbits
 	.align	3
-	.set	.LANCHOR210,. + 0
+	.set	.LANCHOR215,. + 0
 	.type	__func__.9974, %object
 	.size	__func__.9974, 16
 __func__.9974:
@@ -26825,44 +29293,49 @@ __func__.9974:
 .LC0:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
 	.section	.rodata.dump_ftl_info.str1.1,"aMS",@progbits,1
-.LC172:
+.LC178:
 	.string	"free_buf_count: %d\n"
-.LC173:
+.LC179:
 	.string	"g_ftl_info_blk blk:0x%x, index:0x%x, page:0x%x\n"
-.LC174:
+.LC180:
 	.string	"ftl_ext_info_blk blk:0x%x, page:0x%x\n"
-.LC175:
+.LC181:
 	.string	"ac_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC176:
+.LC182:
 	.string	"tmp_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC177:
+.LC183:
 	.string	"gc_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC178:
+.LC184:
 	.string	"lpa:"
-.LC179:
+.LC185:
 	.string	"vpn:"
-.LC180:
+.LC186:
 	.string	"sblk:"
-.LC181:
+.LC187:
 	.string	"lpa_hash:"
-.LC182:
+.LC188:
 	.string	"lpa_hash_index:"
+	.section	.rodata.dump_pm_blk.str1.1,"aMS",@progbits,1
+.LC248:
+	.string	"pm l2p:"
+.LC249:
+	.string	"pm blk:"
 	.section	.rodata.dump_sblk_queue.str1.1,"aMS",@progbits,1
-.LC74:
-	.string	"dump_sblk_queue: %d\n"
 .LC75:
+	.string	"dump_sblk_queue: %d\n"
+.LC76:
 	.string	"buf id= %d state = %d ppa = %x\n"
 	.section	.rodata.flash_complete_page_read.str1.1,"aMS",@progbits,1
-.LC122:
+.LC124:
 	.string	"flash_complete_page_read %x %x error_ecc %d %d\n"
 	.section	.rodata.flash_ddr_tuning_read.str1.1,"aMS",@progbits,1
-.LC115:
+.LC117:
 	.string	"%d flash_ddr_tuning_read %x ecc=%d\n"
-.LC116:
+.LC118:
 	.string	"sync para %d\n"
-.LC117:
+.LC119:
 	.string	"DDR mode Read error %x %x\n"
-.LC118:
+.LC120:
 	.string	"SDR mode Read %x %x ecc:%x\n"
 	.section	.rodata.flash_erase_all.str1.1,"aMS",@progbits,1
 .LC36:
@@ -26878,43 +29351,43 @@ __func__.9974:
 .LC33:
 	.string	"flash_erase_duplane_block pageadd = %x status = %x\n"
 	.section	.rodata.flash_get_last_written_page.str1.1,"aMS",@progbits,1
-.LC121:
+.LC123:
 	.string	"flash_get_last_written_page: %x %x %x\n"
 	.section	.rodata.flash_info_blk_init.str1.1,"aMS",@progbits,1
-.LC169:
+.LC175:
 	.string	"...%d @ %s %d %p\n"
-.LC170:
+.LC176:
 	.string	"no sys info %x\n"
 	.section	.rodata.flash_info_data_init.str1.1,"aMS",@progbits,1
-.LC90:
+.LC92:
 	.string	"...%d @ %s\n"
 	.section	.rodata.flash_info_flush.str1.1,"aMS",@progbits,1
-.LC166:
+.LC172:
 	.string	"finfo:"
-.LC167:
+.LC173:
 	.string	"flash_info_flush id = %x, page = %x\n"
-.LC168:
+.LC174:
 	.string	"sys_info_flush error:%x\n"
 	.section	.rodata.flash_mask_bad_block.str1.1,"aMS",@progbits,1
 .LC42:
 	.string	"flash_mask_bad_block %d %d\n"
 	.section	.rodata.flash_prog_page.str1.1,"aMS",@progbits,1
-.LC128:
+.LC130:
 	.string	"flash_prog_page %x %x %x\n"
-.LC129:
+.LC131:
 	.string	"flash_prog_page page_addr = %x status = %x\n"
 	.section	.rodata.flash_prog_page_en.str1.1,"aMS",@progbits,1
-.LC136:
+.LC138:
 	.string	"flash_prog_page_en:%x %x %x\n"
-.LC137:
+.LC139:
 	.string	"w d:"
-.LC138:
+.LC140:
 	.string	"w s:"
-.LC139:
+.LC141:
 	.string	"spare"
-.LC140:
+.LC142:
 	.string	"data"
-.LC141:
+.LC143:
 	.string	"write error: %x\n"
 	.section	.rodata.flash_read_id.str1.1,"aMS",@progbits,1
 .LC39:
@@ -26923,12 +29396,12 @@ __func__.9974:
 .LC40:
 	.string	"otp:%x %x %x %x\n"
 	.section	.rodata.flash_read_page.str1.1,"aMS",@progbits,1
-.LC108:
+.LC110:
 	.string	"flash_read_page %x %x %x\n"
 	.section	.rodata.flash_read_page_en.str1.1,"aMS",@progbits,1
-.LC119:
+.LC121:
 	.string	"flash_read_page_en %x %x %x\n"
-.LC120:
+.LC122:
 	.string	"flash_read_page_en %x %x error_ecc %d %d\n"
 	.section	.rodata.flash_set_interface_mode.str1.1,"aMS",@progbits,1
 .LC37:
@@ -26936,47 +29409,52 @@ __func__.9974:
 .LC38:
 	.string	"nand ddr mode %x\n"
 	.section	.rodata.ftl_alloc_new_data_sblk.str1.1,"aMS",@progbits,1
-.LC230:
+.LC236:
 	.string	"error gc_add_sblk: %x\n"
 	.section	.rodata.ftl_alloc_sblk.str1.1,"aMS",@progbits,1
-.LC73:
+.LC74:
 	.string	"alloc sblk %x %d\n"
 	.section	.rodata.ftl_dump_write_open_sblk.str1.1,"aMS",@progbits,1
-.LC161:
-	.string	"ftl_sblk_dump_write = %x %d %d %d %d\n"
 .LC162:
-	.string	"blk= %x, page=%x, ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
+	.string	"ftl_sblk_dump_write = %x %d %d %d %d\n"
 .LC163:
-	.string	"ftl_sblk_dump_write2 = %x %d %d %d\n"
+	.string	"blk= %x, page=%x, ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
 .LC164:
-	.string	"ftl_sblk_dump_write = %x %x\n"
+	.string	"ftl_sblk_dump_write2 = %x %d %d %d\n"
 .LC165:
+	.string	"ftl_sblk_dump_write = %x %x\n"
+.LC166:
 	.string	"ftl_sblk_dump_write done = %x\n"
 	.section	.rodata.ftl_ext_info_init.str1.1,"aMS",@progbits,1
-.LC147:
+.LC149:
 	.string	"%s %d %d %x %x\n"
+.LC150:
+	.string	"%s %x %x %x\n"
 	.section	.rodata.ftl_free_sblk.str1.1,"aMS",@progbits,1
-.LC61:
-	.string	"swl_tlc_free_mini_ec_blk sblk %x\n"
-.LC62:
+.LC63:
 	.string	"swl_slc_free_mini_ec_blk sblk %x\n"
 	.section	.rodata.ftl_info_blk_init.str1.1,"aMS",@progbits,1
-.LC144:
+.LC146:
 	.string	"%d %x @%d %x\n"
-.LC145:
+.LC147:
 	.string	"ftl_info_blk_init %d %d %x\n"
-.LC146:
+.LC148:
 	.string	"ink flag: %x\n"
 	.section	.rodata.ftl_info_flush.str1.1,"aMS",@progbits,1
-.LC143:
+.LC145:
 	.string	"g_ftl_info_blk blk = %x, page = %x version = %d\n"
+	.section	.rodata.ftl_ink_check_sblk.str1.1,"aMS",@progbits,1
+.LC167:
+	.string	"ftl_ink_check_sblk = %x %d %d\n"
+.LC168:
+	.string	"ftl_ink_check_sblk = %x %d %d end\n"
 	.section	.rodata.ftl_low_format.str1.1,"aMS",@progbits,1
-.LC148:
+.LC169:
 	.string	"ftl_low_format %d\n"
-.LC149:
+.LC170:
 	.string	"low format %d %d %d %d\n"
 	.section	.rodata.ftl_mask_bad_block.str1.1,"aMS",@progbits,1
-.LC59:
+.LC61:
 	.string	"mask bad block:cs %x %x block: %x %x\n"
 	.section	.rodata.ftl_open_sblk_recovery.str1.1,"aMS",@progbits,1
 .LC151:
@@ -26988,176 +29466,182 @@ __func__.9974:
 .LC154:
 	.string	"phy_blk = %x %x\n"
 .LC155:
-	.string	"sblk = %x, vpn0 = %d, vpn1 = %d\n"
+	.string	"num_planes = %x\n"
 .LC156:
-	.string	"dump_write_lpa = %x %x %x %x\n"
+	.string	"sblk = %x, vpn0 = %d, vpn1 = %d\n"
 .LC157:
-	.string	"dump write new ppa = %x, last ppa = %x lpa = %x\n"
+	.string	"dump_write_lpa = %x %x %x %x\n"
 .LC158:
-	.string	"dump write = %x %x\n"
+	.string	"dump write new ppa = %x, last ppa = %x lpa = %x\n"
 .LC159:
+	.string	"dump write = %x %x %x\n"
+.LC160:
 	.string	"dump write hash update = %x %x %x\n"
 	.section	.rodata.ftl_re_low_format.str1.1,"aMS",@progbits,1
-.LC150:
+.LC171:
 	.string	"re low format %d\n"
 	.section	.rodata.ftl_sblk_dump.str1.1,"aMS",@progbits,1
-.LC215:
+.LC221:
 	.string	"ftl_sblk_dump = %x %d %d %d %d\n"
-.LC216:
+.LC222:
 	.string	"ftl_sblk_dump = %x %x %x %x\n"
-.LC217:
+.LC223:
 	.string	"page_addr = %x, lpa=%x vpn = %d\n"
-.LC218:
+.LC224:
 	.string	"index= %x, lpa=%x\n"
-.LC219:
+.LC225:
 	.string	"block = %x, vpn=%x check vpn = %d\n"
 	.section	.rodata.ftl_sysblk_dump.str1.1,"aMS",@progbits,1
-.LC171:
+.LC177:
 	.string	"l2p:"
 	.section	.rodata.ftl_test_block.str1.1,"aMS",@progbits,1
-.LC142:
+.LC144:
 	.string	"low format %d\n"
 	.section	.rodata.ftl_update_l2p_map.str1.1,"aMS",@progbits,1
-.LC226:
+.LC232:
 	.string	"ftl_update_l2p_map: %x %x %x\n"
-.LC227:
+.LC233:
 	.string	"ftl_update_l2p_map"
-.LC228:
+.LC234:
 	.string	"lpa_tbl:"
-.LC229:
+.LC235:
 	.string	"sblk %x vpn: %d %d\n"
 	.section	.rodata.ftl_vpn_decrement.str1.1,"aMS",@progbits,1
-.LC58:
+.LC60:
 	.string	"ftl_vpn_decrement %x = %d, %d\n"
 	.section	.rodata.ftl_write_commit.str1.1,"aMS",@progbits,1
-.LC231:
+.LC237:
 	.string	"%d read error: ppa:%x, lpa:%x, status:%x\n"
 	.section	.rodata.ftl_write_completed.str1.1,"aMS",@progbits,1
-.LC71:
-	.string	"ftl prog error =%x, lpa = %x, ppa= %x\n"
 .LC72:
+	.string	"ftl prog error =%x, lpa = %x, ppa= %x\n"
+.LC73:
 	.string	"ftl re prog: lpa = %x, ppa= %x\n"
 	.section	.rodata.gc_add_sblk.str1.1,"aMS",@progbits,1
 .LC43:
-	.string	"gc_add_sblk = %d, %d, %d, %d, %d, %d\n"
+	.string	"gc_add_sblk = %d, %d, %d, %d, %d, %d, %d\n"
 .LC44:
+	.string	"gc_add_sblk = %d, %d, %d\n"
+.LC45:
 	.string	"gc_add_sblk = %d, %d, %d,last update:%d, %d\n"
+.LC46:
+	.string	"gc_add_sblk = %d, %d, %d, %d, %d, %d\n"
 	.section	.rodata.gc_check_data_one_wl.str1.1,"aMS",@progbits,1
-.LC223:
+.LC229:
 	.string	"gc_lpa:"
-.LC224:
+.LC230:
 	.string	"gc_ppa:"
-.LC225:
+.LC231:
 	.string	"err: ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
 	.section	.rodata.gc_do_copy_back.str1.1,"aMS",@progbits,1
-.LC232:
+.LC238:
 	.string	"gc page in buf: lpa %x ppa = %x pageindex= %x\n"
-.LC233:
+.LC239:
 	.string	"gc_do_copy_back: lpa %x des_ppa = %x %x gc_ppa= %x page_index= %d\n"
-.LC234:
-	.string	"gc_do_copy_back: %x %x %x %x gc_ppa:%x %x\n"
-.LC235:
-	.string	"%d prog_step: %x %x buf id= %x ppa = %x hash=%x id = %x plane = %x lpa=%x\n"
+.LC240:
+	.string	"gc_do_copy_back: %x %x %x %x gc_ppa:%x %x %x %d\n"
+.LC241:
+	.string	"%d prog_step: %x %x buf id= %x ppa = %x hash=%d id = %x plane = %x lpa=%x %x\n"
 	.section	.rodata.gc_free_bad_sblk.str1.1,"aMS",@progbits,1
-.LC60:
+.LC62:
 	.string	"gc_free_bad_sblk 0x%x\n"
 	.section	.rodata.gc_free_src_blk.str1.1,"aMS",@progbits,1
-.LC63:
-	.string	"gc_free_src_blk = %x, vpn = %d\n"
 .LC64:
+	.string	"gc_free_src_blk = %x, vpn = %d\n"
+.LC65:
 	.string	"gc_free_src_blk %x, %d\n"
 	.section	.rodata.gc_free_temp_buf.str1.1,"aMS",@progbits,1
-.LC48:
+.LC50:
 	.string	"%d gc_free_temp_buf buf id= %x\n"
 	.section	.rodata.gc_mark_bad_ppa.str1.1,"aMS",@progbits,1
-.LC45:
+.LC47:
 	.string	"gc_mark_bad_ppa %d %x %x\n"
 	.section	.rodata.gc_recovery.str1.1,"aMS",@progbits,1
-.LC193:
+.LC199:
 	.string	"ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
-.LC194:
+.LC200:
 	.string	"ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
-.LC195:
+.LC201:
 	.string	"gc_recovery: %x vpn = %x\n"
 	.section	.rodata.gc_scan_src_blk.str1.1,"aMS",@progbits,1
-.LC213:
+.LC219:
 	.string	"gc_scan_src_blk = %x, vpn = %d\n"
-.LC214:
+.LC220:
 	.string	"gc_scan_src_blk = %x, s vpn0 = %d, c vpn1 = %d\n"
 	.section	.rodata.gc_search_src_blk.str1.1,"aMS",@progbits,1
-.LC50:
+.LC52:
 	.string	"zftl_get_gc_node cache = %x index = %d vpn = %x\n"
-.LC51:
+.LC53:
 	.string	"gc_search_src_blk mode = %x, src mode = %x, count= %d %d\n"
 	.section	.rodata.gc_static_wearleveling.str1.1,"aMS",@progbits,1
-.LC79:
-	.string	"gc_static_wearleveling: min blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
 .LC80:
-	.string	"gc_static_wearleveling: min slc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
+	.string	"gc_static_wearleveling: min blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
 .LC81:
-	.string	"gc_static_wearleveling: min tlc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
+	.string	"gc_static_wearleveling: min slc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
 .LC82:
-	.string	"gc_static_wearleveling: max slc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
+	.string	"gc_static_wearleveling: min tlc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
 .LC83:
-	.string	"gc_static_wearleveling: max xlc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
+	.string	"gc_static_wearleveling: max slc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
 .LC84:
-	.string	"gc_static_wearleveling: slc blk: %x, tlc blk: %d avg slc ec: %d, avg tlc ec: %d \n"
+	.string	"gc_static_wearleveling: max xlc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
 .LC85:
-	.string	"gc_static_wearleveling: min slc ec: %x, min tlc ec: %d max slc ec: %d, max tlc ec: %d; %d %d\n"
+	.string	"gc_static_wearleveling: slc blk: %x, tlc blk: %d avg slc ec: %d, avg tlc ec: %d \n"
 .LC86:
-	.string	"swl add tlc gc = %x, %d, %d, %d, %d, %d\n"
+	.string	"gc_static_wearleveling: min slc ec: %x, min tlc ec: %d max slc ec: %d, max tlc ec: %d; %d %d\n"
 .LC87:
+	.string	"swl add tlc gc = %x, %d, %d, %d, %d, %d\n"
+.LC88:
 	.string	"swl add slc gc  = %x, %d, %d, %d, %d, %d\n"
 	.section	.rodata.gc_update_l2p_map_new.str1.1,"aMS",@progbits,1
-.LC209:
+.LC215:
 	.string	"gc_update_l2p_map_new sblk %x\n"
-.LC210:
+.LC216:
 	.string	"gc_update_l2p_map_new: %x %x %x\n"
-.LC211:
+.LC217:
 	.string	"lpa: %x %x %x\n"
-.LC212:
+.LC218:
 	.string	"gc_update_l2p_map_new: %x vpn = %x vpn1 = %x done\n"
 	.section	.rodata.gc_write_completed.str1.1,"aMS",@progbits,1
-.LC46:
+.LC48:
 	.string	"status: %x, ppa: %x\n"
-.LC47:
-	.string	"gc_write_completed: %x  %x  %x %x\n"
+.LC49:
+	.string	"gc_write_completed: %x  %x  %d %x\n"
 	.section	.rodata.hynix_get_read_retry_default.str1.1,"aMS",@progbits,1
-.LC98:
+.LC100:
 	.string	"otp error! %d"
-.LC99:
+.LC101:
 	.string	"rr"
 	.section	.rodata.hynix_read_retrial.str1.1,"aMS",@progbits,1
-.LC114:
+.LC116:
 	.string	"hynix RR %d row=%x, count %d, status=%d\n"
 	.section	.rodata.idb_write_data.str1.1,"aMS",@progbits,1
-.LC130:
+.LC132:
 	.string	"1 write_idblock fix data %x %x %x\n"
-.LC131:
+.LC133:
 	.string	"write_idblock check fail! %x\n"
-.LC132:
+.LC134:
 	.string	"write_idblock fail! %x\n"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",@progbits,1
-.LC184:
+.LC190:
 	.string	"region_id = %d, pm_max_region = %d\n"
-.LC185:
+.LC191:
 	.string	"load_l2p_region no ppa = %x , %x, all setting 0xff....\n"
-.LC186:
+.LC192:
 	.string	"load_l2p_region = %x,%x,%x, %x\n"
-.LC187:
+.LC193:
 	.string	"pm_ppa:"
-.LC188:
+.LC194:
 	.string	"data:"
-.LC189:
+.LC195:
 	.string	"spare:"
 	.section	.rodata.lpa_rebuild_hash.str1.1,"aMS",@progbits,1
-.LC78:
+.LC79:
 	.string	"%s %d %d\n"
 	.section	.rodata.micron_read_retrial.str1.1,"aMS",@progbits,1
-.LC109:
-	.string	"micron %d row=%x,last status %d,status = %d\n"
-.LC110:
-	.string	"micron RR %d row=%x,count %d,status=%d\n"
+.LC111:
+	.string	"MT %d row=%x,last status %d,status = %d\n"
+.LC112:
+	.string	"MT RR %d row=%x,count %d,status=%d\n"
 	.section	.rodata.nand_flash_print_info.str1.1,"aMS",@progbits,1
 .LC1:
 	.string	"...%s enter...\n"
@@ -27222,87 +29706,89 @@ __func__.9974:
 .LC31:
 	.string	"g_flash_toggle_mode_en: %x\n"
 	.section	.rodata.nandc_init.str1.1,"aMS",@progbits,1
-.LC91:
+.LC93:
 	.string	"...%s enter... %p\n"
-.LC92:
+.LC94:
 	.string	"0:%x %x %x %x %x\n"
-.LC93:
+.LC95:
 	.string	"g_nandc_ver...%d\n"
 	.section	.rodata.nandc_xfer.str1.1,"aMS",@progbits,1
-.LC105:
+.LC107:
 	.string	"dqs data abort %x\n"
-.LC106:
+.LC108:
 	.string	"dqs data timeout %x\n"
-.LC107:
+.LC109:
 	.string	"xfer error %x\n"
 	.section	.rodata.nandc_xfer_done.str1.1,"aMS",@progbits,1
-.LC100:
+.LC102:
 	.string	"flash_abort_clear = %d\n"
-.LC101:
+.LC103:
 	.string	"%d mtrans_cnt = %d page_num = %d\n"
-.LC102:
+.LC104:
 	.string	"nandc:"
-.LC103:
+.LC105:
 	.string	"%d flReg.d32=%x %x\n"
-.LC104:
+.LC106:
 	.string	"nandc_xfer_done read error %x\n"
 	.section	.rodata.pm_alloc_new_blk.str1.1,"aMS",@progbits,1
-.LC76:
-	.string	"blk %x is bad block\n"
 .LC77:
+	.string	"blk %x is bad block\n"
+.LC78:
 	.string	"pm_alloc_new_blk: %x %x %x %x\n"
 	.section	.rodata.pm_free_sblk.str1.1,"aMS",@progbits,1
-.LC89:
+.LC90:
+	.string	"GC PM block %x %x %x %d\n"
+.LC91:
 	.string	"ftl_free_no_use_map_blk %x %x %x %d\n"
 	.section	.rodata.pm_init.str1.1,"aMS",@progbits,1
-.LC190:
+.LC196:
 	.string	"pm_init posr %x %x %x\n"
-.LC191:
+.LC197:
 	.string	"pm_init recovery %x %x %x\n"
 	.section	.rodata.pm_log2phys.str1.1,"aMS",@progbits,1
-.LC192:
+.LC198:
 	.string	"pm_log2phys  lpn = %d, max lpn = %d\n"
 	.section	.rodata.pm_ppa_update_check.str1.1,"aMS",@progbits,1
-.LC183:
+.LC189:
 	.string	"%s w error lpn = %x, max ppa = %d\n"
 	.section	.rodata.pm_write_page.str1.1,"aMS",@progbits,1
-.LC160:
+.LC161:
 	.string	"pm_write_page write error: %x\n"
 	.section	.rodata.print_ftl_debug_info.str1.1,"aMS",@progbits,1
-.LC65:
-	.string	"bad blk = %x, %x free blk: s:%x,t:%x,m:%x, data blk:s:%x,%x,t%x vpn: s:%x t:%x, max_vpn: %x\n"
 .LC66:
-	.string	"totle w: %d MB,r: %d MB %d dv:0x%X,poc:%d\n"
+	.string	"bad blk = %x, %x free blk: s:%x,t:%x,m:%x, data blk:s:%x,%x,t%x vpn: s:%x t:%x, max_vpn: %x\n"
 .LC67:
-	.string	"gc xlc page: %d,gc slc page: %d, tmp w: %d MB\n"
+	.string	"totle w: %d MB,r: %d MB %d dv:0x%X,poc:%d\n"
 .LC68:
-	.string	"slc ec: %d,%d,%d,%d,%d,tlc ec: %d,%d,%d,%d,%d\n"
+	.string	"gc xlc page: %d,gc slc page: %d, tmp w: %d MB\n"
 .LC69:
-	.string	"gc th: tlc_tlc: %d tlc_slc: %d slc_slc: %d slc_tlc:%d free_th: %d\n"
+	.string	"slc ec: %d,%d,%d,%d,%d,tlc ec: %d,%d,%d,%d,%d\n"
 .LC70:
-	.string	"swl : %x %x %x %x\n"
+	.string	"gc th: tlc_tlc: %d tlc_slc: %d slc_slc: %d slc_tlc:%d free_th: %d\n"
+.LC71:
+	.string	"swl : %x %x %x %x %x %x\n"
 	.section	.rodata.print_gc_debug_info.str1.1,"aMS",@progbits,1
-.LC49:
+.LC51:
 	.string	"gc: b:%x,p:%x,i:%x; free buf=%d %d free slc th: %d\n"
 	.section	.rodata.print_list_info.str1.1,"aMS",@progbits,1
-.LC56:
+.LC58:
 	.string	"list count:%p %d\n"
-.LC57:
+.LC59:
 	.string	"%d: node:%x %x %x %x, %d %d %d %d %d\n"
 	.section	.rodata.queue_wait_first_req_completed.str1.1,"aMS",@progbits,1
-.LC123:
+.LC125:
 	.string	"read: %x %x %x %x\n"
-.LC124:
+.LC126:
 	.string	"0set buf %d,status = %x, ppa = %x lun state = %d\n"
-.LC125:
+.LC127:
 	.string	"prog end %x %x error_ecc %d %d\n"
-.LC126:
+.LC128:
 	.string	"1set buf %d,status = %x, ppa = %x lun state = %d\n"
-.LC127:
+.LC129:
 	.string	"dp prog end %x %x error_ecc %d %d\n"
 	.section	.rodata.random_seed,"a",@progbits
 	.align	3
-	.set	.LANCHOR49,. + 0
+	.set	.LANCHOR51,. + 0
 	.type	random_seed, %object
 	.size	random_seed, 256
 random_seed:
@@ -27435,28 +29921,28 @@ random_seed:
 	.hword	17598
 	.hword	28087
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",@progbits,1
-.LC208:
+.LC214:
 	.string	"zftl_init %x\n"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
-.LC94:
+.LC96:
 	.string	"%s 0x%x:"
-.LC95:
+.LC97:
 	.string	"%x "
-.LC96:
+.LC98:
 	.string	""
-.LC97:
+.LC99:
 	.string	"%s\n"
 	.section	.rodata.sandisk_prog_test_bad_block.str1.1,"aMS",@progbits,1
 .LC41:
 	.string	"bad block test:%x %x\n"
 	.section	.rodata.sblk_3d_tlc_dump_prog.str1.1,"aMS",@progbits,1
-.LC133:
+.LC135:
 	.string	"sblk_3d_tlc_dump_prog wl_addr= %x ppa = %x ppa = %x\n"
 	.section	.rodata.sblk_mlc_dump_prog.str1.1,"aMS",@progbits,1
-.LC134:
+.LC136:
 	.string	"sblk_mlc_dump_prog wl_addr= %x ppa = %x ppa = %x\n"
 	.section	.rodata.sblk_prog_page.str1.1,"aMS",@progbits,1
-.LC135:
+.LC137:
 	.string	"sblk_prog_page ppa = %x, count = %d\n"
 	.section	.rodata.toshiba_15ref_value,"a",@progbits
 	.align	3
@@ -27561,7 +30047,7 @@ toshiba_15ref_value:
 	.byte	0
 	.section	.rodata.toshiba_3D_slc_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR35,. + 0
+	.set	.LANCHOR37,. + 0
 	.type	toshiba_3D_slc_value, %object
 	.size	toshiba_3D_slc_value, 11
 toshiba_3D_slc_value:
@@ -27578,7 +30064,7 @@ toshiba_3D_slc_value:
 	.byte	56
 	.section	.rodata.toshiba_3D_tlc_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR34,. + 0
+	.set	.LANCHOR36,. + 0
 	.type	toshiba_3D_tlc_value, %object
 	.size	toshiba_3D_tlc_value, 399
 toshiba_3D_tlc_value:
@@ -27982,11 +30468,11 @@ toshiba_3D_tlc_value:
 	.byte	12
 	.byte	14
 	.section	.rodata.toshiba_3d_read_retrial.str1.1,"aMS",@progbits,1
-.LC111:
+.LC113:
 	.string	"toshiba SRR %d row=%x, status=%d\n"
-.LC112:
+.LC114:
 	.string	"toshiba TRR %d row=%x, status=%d\n"
-.LC113:
+.LC115:
 	.string	"toshiba RR %d row=%x,count %d,status=%d\n"
 	.section	.rodata.toshiba_A19ref_value,"a",@progbits
 	.align	3
@@ -28054,63 +30540,63 @@ toshiba_ref_value:
 	.byte	12
 	.byte	112
 	.section	.rodata.zftl_discard.str1.1,"aMS",@progbits,1
-.LC241:
+.LC247:
 	.string	"ftl_discard:(%x, %x, %x, %x)\n"
 	.section	.rodata.zftl_do_gc.str1.1,"aMS",@progbits,1
-.LC236:
+.LC242:
 	.string	"gc %d: %d %d %d %d %d %d %d\n"
-.LC237:
+.LC243:
 	.string	"gc %d: %d %d %d %d %d %d\n"
-.LC238:
+.LC244:
 	.string	"GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\n"
-.LC239:
+.LC245:
 	.string	"gc free %x, %d\n"
 	.section	.rodata.zftl_gc_get_free_sblk.str1.1,"aMS",@progbits,1
-.LC52:
+.LC54:
 	.string	"swl_tlc_free_mini_ec_blk alloc sblk %x\n"
-.LC53:
+.LC55:
 	.string	"zftl_get_free_sblk %x %d, %p %d %d\n"
-.LC54:
+.LC56:
 	.string	"zftl_gc_get_free_sblk %x %x %x, %d %d %d\n"
 	.section	.rodata.zftl_get_free_sblk.str1.1,"aMS",@progbits,1
-.LC55:
+.LC57:
 	.string	"swl_slc_free_mini_ec_blk alloc sblk %x\n"
 	.section	.rodata.zftl_init.str1.1,"aMS",@progbits,1
-.LC196:
-	.string	"FTL version: 6.0.16 20190603"
-.LC197:
+.LC202:
+	.string	"FTL version: 6.0.18 20190918"
+.LC203:
 	.string	"_c_user_data_density := %d\n"
-.LC198:
+.LC204:
 	.string	"_c_totle_phy_density := %d\n"
-.LC199:
+.LC205:
 	.string	"_c_totle_log_page := %d\n"
-.LC200:
+.LC206:
 	.string	"_c_totle_data_density := %d\n"
-.LC201:
+.LC207:
 	.string	"_c_ftl_pm_page_num := %d\n"
-.LC202:
+.LC208:
 	.string	"_c_ftl_byte_pre_page := %d\n"
-.LC203:
+.LC209:
 	.string	"_c_max_pm_sblk := %d\n"
-.LC204:
+.LC210:
 	.string	"_min_slc_super_block := %d\n"
-.LC205:
+.LC211:
 	.string	"_max_xlc_super_block := %d\n"
-.LC206:
+.LC212:
 	.string	"gp_ftl_ext_info %p %p %p\n"
-.LC207:
+.LC213:
 	.string	"flash info size: %d %d %d\n"
 	.section	.rodata.zftl_read.str1.1,"aMS",@progbits,1
-.LC220:
+.LC226:
 	.string	"ftl_read %x %x %x\n"
-.LC221:
+.LC227:
 	.string	"ftl_read refresh =%x, lpa = %x, ppa= %x\n"
-.LC222:
+.LC228:
 	.string	"id=%d, status = %x, lpa = %x, ppa = %x spare = %x %x %x %x\n"
 	.section	.rodata.zftl_sblk_list_init.str1.1,"aMS",@progbits,1
-.LC88:
+.LC89:
 	.string	"free blk vpn error: %x %x\n"
 	.section	.rodata.zftl_write.str1.1,"aMS",@progbits,1
-.LC240:
+.LC246:
 	.string	"ftlwrite %x %x %x %x\n"
 	.hidden	free

commit 9c7862b8bf74438f89e41b22f18d690c1833e483
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Sep 23 17:51:10 2019 +0800

    test: storage: Fix board may not have devnum env
    
    If the board do not have the 'devnum', the env_get() returns NULL
    and strcmp will lead to "data abort".
    
    Change-Id: I329237b61fc96bc90e7a07653b665192d6a9d7b8
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/test/rockchip/test-storage.c b/test/rockchip/test-storage.c
index fc8d8a87f4..175508b70f 100644
--- a/test/rockchip/test-storage.c
+++ b/test/rockchip/test-storage.c
@@ -219,7 +219,7 @@ static int do_test_storage(cmd_tbl_t *cmdtp, int flag,
 	}
 
 	/* 7. Switch back to default system devnum */
-	if (devtype && !strcmp(devtype, "mmc") &&
+	if (devtype && !strcmp(devtype, "mmc") && env_get("devnum") &&
 	    strcmp(devnum, env_get("devnum"))) {
 		ret = run_command(cmd, 0);
 		if (ret) {

commit d0ff3d454829105c81afe7f5d8c79e0d3d18c1a2
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Sep 23 17:00:14 2019 +0800

    rockchip: test: set argc to 1 for rktest all cmd
    
    The 'rktest all v2/3' do not really pass arg to sub cmd, always set argc
    for 'rktest all *' cmd to 1 for sub commands.
    
    Change-Id: I2d69ad25aaca074f52bfd2e69be4c33bc41186df
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/test/rockchip/test-rockchip.c b/test/rockchip/test-rockchip.c
index 3e7afa9dc0..344bd57245 100644
--- a/test/rockchip/test-rockchip.c
+++ b/test/rockchip/test-rockchip.c
@@ -122,6 +122,8 @@ static int do_rockchip_test(cmd_tbl_t *cmdtp, int flag,
 			else if (!strcmp(argv[1], CMD_MODE_V3))
 				skip_mode = TEST_SKIP_NORETURN_INTERACTIVE;
 		}
+		/* rktest all has no valid parameter */
+		argc = 1;
 		goto all_test;
 	} else {
 		if (!strcmp(argv[0], "storage"))

commit 7f1fb2f87ad034585fcf0f48a8164f91318395da
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Sep 20 15:27:36 2019 +0800

    dm: i2c: add alias seq print
    
    Change-Id: Ia4a415041389388e550057e476aa30daed696c86
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/i2c/i2c-uclass.c b/drivers/i2c/i2c-uclass.c
index 206a4f6d1b..47531a8fb4 100644
--- a/drivers/i2c/i2c-uclass.c
+++ b/drivers/i2c/i2c-uclass.c
@@ -489,9 +489,15 @@ static int i2c_post_probe(struct udevice *dev)
 {
 #if CONFIG_IS_ENABLED(OF_CONTROL)
 	struct dm_i2c_bus *i2c = dev_get_uclass_priv(dev);
+	int seq;
 
 	i2c->speed_hz = dev_read_u32_default(dev, "clock-frequency", 100000);
-	printf("I2c speed: %dHz\n", i2c->speed_hz);
+
+	if (dev_read_alias_seq(dev, &seq) >= 0)
+		printf("I2c%d speed: %dHz\n", seq, i2c->speed_hz);
+	else
+		printf("I2c speed: %dHz\n", i2c->speed_hz);
+
 	return dm_i2c_set_bus_speed(dev, i2c->speed_hz);
 #else
 	return 0;

commit df57b34bfadf20f4b3f93e426b7af50f80ba1d3b
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Sep 19 15:10:47 2019 +0800

    fastboot: remove 'default y' from RK_AVB_LIBAVB_ENABLE_ATH_UNLOCK
    
    Open RK_AVB_LIBAVB_ENABLE_ATH_UNLOCK if need advanced security requirements.
    
    Change-Id: Ie01c6342d379b672fe69e367262496d97b5890e9
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/cmd/fastboot/Kconfig b/cmd/fastboot/Kconfig
index 3f2dbc4097..64ab6c6ee7 100644
--- a/cmd/fastboot/Kconfig
+++ b/cmd/fastboot/Kconfig
@@ -93,7 +93,6 @@ config FASTBOOT_OEM_UNLOCK
 config RK_AVB_LIBAVB_ENABLE_ATH_UNLOCK
 	bool "AVB Authenticated unlock function"
 	depends on ANDROID_AVB
-	default y
 	help
 	  Enabled authenticated unlock function can prevent lock state
 	  from invalid unlock cmd.

commit 69fdc5969fe4d637d490fddd72ffd26ea0d356fe
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Sep 11 21:07:30 2019 +0800

    lib: avb: update and modify the avb library
    
    The commit point is updated to google external/avb/
    which commit point is 868db2a514bbb02e166fb55b1592b27de8c9680c.
    
    Change-Id: I10f7c0ac356a7666b518b62e59ccb62277668578
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/android_avb/avb_cmdline.h b/include/android_avb/avb_cmdline.h
old mode 100755
new mode 100644
index 8e5caf61b0..6225ebb716
--- a/include/android_avb/avb_cmdline.h
+++ b/include/android_avb/avb_cmdline.h
@@ -1,94 +1,96 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/*
-#ifdef AVB_INSIDE_LIBAVB_H
-#error "You can't include avb_sha.h in the public header libavb.h."
-#endif
-*/
-
-/*
-#ifndef AVB_COMPILATION
-#error "Never include this file, it may only be used from internal avb code."
-#endif
-*/
-
-#ifndef AVB_CMDLINE_H_
-#define AVB_CMDLINE_H_
-
-#include <android_avb/avb_ops.h>
-#include <android_avb/avb_slot_verify.h>
-
-/* Maximum allow length (in bytes) of a partition name, including
- * ab_suffix.
- */
-#define AVB_PART_NAME_MAX_SIZE 32
-
-#define AVB_MAX_NUM_CMDLINE_SUBST 10
-
-/* Holds information about command-line substitutions. */
-typedef struct AvbCmdlineSubstList {
-  size_t size;
-  char* tokens[AVB_MAX_NUM_CMDLINE_SUBST];
-  char* values[AVB_MAX_NUM_CMDLINE_SUBST];
-} AvbCmdlineSubstList;
-
-/* Substitutes all variables (e.g. $(ANDROID_SYSTEM_PARTUUID)) with
- * values. Returns NULL on OOM, otherwise the cmdline with values
- * replaced.
- */
-char* avb_sub_cmdline(AvbOps* ops,
-                      const char* cmdline,
-                      const char* ab_suffix,
-                      bool using_boot_for_vbmeta,
-                      const AvbCmdlineSubstList* additional_substitutions);
-
-AvbSlotVerifyResult avb_append_options(
-    AvbOps* ops,
-    AvbSlotVerifyData* slot_data,
-    AvbVBMetaImageHeader* toplevel_vbmeta,
-    AvbAlgorithmType algorithm_type,
-    AvbHashtreeErrorMode hashtree_error_mode);
-
-/* Allocates and initializes a new command line substitution list. Free with
- * |avb_free_cmdline_subst_list|.
- */
-AvbCmdlineSubstList* avb_new_cmdline_subst_list(void);
-
-/* Use this instead of |avb_free| to deallocate a AvbCmdlineSubstList. */
-void avb_free_cmdline_subst_list(AvbCmdlineSubstList* cmdline_subst);
-
-/* Adds a hashtree root digest to be substituted in $(AVB_*_ROOT_DIGEST)
- * variables. The partition name differentiates the variable. For example, if
- * |part_name| is "foo" then $(AVB_FOO_ROOT_DIGEST) will be substituted with the
- * hex encoding of the digest. The substitution will be added to
- * |out_cmdline_subst|. Returns AVB_SLOT_VERIFY_RESULT_OK on success.
- */
-AvbSlotVerifyResult avb_add_root_digest_substitution(
-    const char* part_name,
-    const uint8_t* digest,
-    size_t digest_size,
-    AvbCmdlineSubstList* out_cmdline_subst);
-
-#endif
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#ifdef AVB_INSIDE_LIBAVB_H
+#error "You can't include avb_sha.h in the public header libavb.h."
+#endif
+*/
+
+/*
+#ifndef AVB_COMPILATION
+#error "Never include this file, it may only be used from internal avb code."
+#endif
+*/
+
+#ifndef AVB_CMDLINE_H_
+#define AVB_CMDLINE_H_
+
+#include <android_avb/avb_ops.h>
+#include <android_avb/avb_slot_verify.h>
+
+/* Maximum allow length (in bytes) of a partition name, including
+ * ab_suffix.
+ */
+#define AVB_PART_NAME_MAX_SIZE 32
+
+#define AVB_MAX_NUM_CMDLINE_SUBST 10
+
+/* Holds information about command-line substitutions. */
+typedef struct AvbCmdlineSubstList {
+  size_t size;
+  char* tokens[AVB_MAX_NUM_CMDLINE_SUBST];
+  char* values[AVB_MAX_NUM_CMDLINE_SUBST];
+} AvbCmdlineSubstList;
+
+/* Substitutes all variables (e.g. $(ANDROID_SYSTEM_PARTUUID)) with
+ * values. Returns NULL on OOM, otherwise the cmdline with values
+ * replaced.
+ */
+char* avb_sub_cmdline(AvbOps* ops,
+                      const char* cmdline,
+                      const char* ab_suffix,
+                      bool using_boot_for_vbmeta,
+                      const AvbCmdlineSubstList* additional_substitutions);
+
+AvbSlotVerifyResult avb_append_options(
+    AvbOps* ops,
+    AvbSlotVerifyFlags flags,
+    AvbSlotVerifyData* slot_data,
+    AvbVBMetaImageHeader* toplevel_vbmeta,
+    AvbAlgorithmType algorithm_type,
+    AvbHashtreeErrorMode hashtree_error_mode,
+    AvbHashtreeErrorMode resolved_hashtree_error_mode);
+
+/* Allocates and initializes a new command line substitution list. Free with
+ * |avb_free_cmdline_subst_list|.
+ */
+AvbCmdlineSubstList* avb_new_cmdline_subst_list(void);
+
+/* Use this instead of |avb_free| to deallocate a AvbCmdlineSubstList. */
+void avb_free_cmdline_subst_list(AvbCmdlineSubstList* cmdline_subst);
+
+/* Adds a hashtree root digest to be substituted in $(AVB_*_ROOT_DIGEST)
+ * variables. The partition name differentiates the variable. For example, if
+ * |part_name| is "foo" then $(AVB_FOO_ROOT_DIGEST) will be substituted with the
+ * hex encoding of the digest. The substitution will be added to
+ * |out_cmdline_subst|. Returns AVB_SLOT_VERIFY_RESULT_OK on success.
+ */
+AvbSlotVerifyResult avb_add_root_digest_substitution(
+    const char* part_name,
+    const uint8_t* digest,
+    size_t digest_size,
+    AvbCmdlineSubstList* out_cmdline_subst);
+
+#endif
diff --git a/include/android_avb/avb_ops.h b/include/android_avb/avb_ops.h
old mode 100755
new mode 100644
index f58f18cae8..f1dbefb03b
--- a/include/android_avb/avb_ops.h
+++ b/include/android_avb/avb_ops.h
@@ -1,318 +1,348 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/*
-#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
-#error "Never include this file directly, include libavb.h instead."
-#endif
-*/
-
-#ifndef AVB_OPS_H_
-#define AVB_OPS_H_
-
-#include <android_avb/avb_sysdeps.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Well-known names of named persistent values. */
-#define AVB_NPV_PERSISTENT_DIGEST_PREFIX "avb.persistent_digest."
-
-/* Return codes used for I/O operations.
- *
- * AVB_IO_RESULT_OK is returned if the requested operation was
- * successful.
- *
- * AVB_IO_RESULT_ERROR_IO is returned if the underlying hardware (disk
- * or other subsystem) encountered an I/O error.
- *
- * AVB_IO_RESULT_ERROR_OOM is returned if unable to allocate memory.
- *
- * AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION is returned if the requested
- * partition does not exist.
- *
- * AVB_IO_RESULT_ERROR_RANGE_OUTSIDE_PARTITION is returned if the
- * range of bytes requested to be read or written is outside the range
- * of the partition.
- *
- * AVB_IO_RESULT_ERROR_NO_SUCH_VALUE is returned if a named persistent value
- * does not exist.
- *
- * AVB_IO_RESULT_ERROR_INVALID_VALUE_SIZE is returned if a named persistent
- * value size is not supported or does not match the expected size.
- *
- * AVB_IO_RESULT_ERROR_INSUFFICIENT_SPACE is returned if a buffer is too small
- * for the requested operation.
- */
-typedef enum {
-  AVB_IO_RESULT_OK,
-  AVB_IO_RESULT_ERROR_OOM,
-  AVB_IO_RESULT_ERROR_IO,
-  AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION,
-  AVB_IO_RESULT_ERROR_RANGE_OUTSIDE_PARTITION,
-  AVB_IO_RESULT_ERROR_NO_SUCH_VALUE,
-  AVB_IO_RESULT_ERROR_INVALID_VALUE_SIZE,
-  AVB_IO_RESULT_ERROR_INSUFFICIENT_SPACE,
-} AvbIOResult;
-
-struct AvbOps;
-typedef struct AvbOps AvbOps;
-
-/* Forward-declaration of operations in libavb_ab. */
-struct AvbABOps;
-
-/* Forward-declaration of operations in libavb_atx. */
-struct AvbAtxOps;
-
-/* High-level operations/functions/methods that are platform
- * dependent.
- *
- * Operations may be added in the future so when implementing it
- * always make sure to zero out sizeof(AvbOps) bytes of the struct to
- * ensure that unimplemented operations are set to NULL.
- */
-struct AvbOps {
-  /* This pointer can be used by the application/bootloader using
-   * libavb and is typically used in each operation to get a pointer
-   * to platform-specific resources. It cannot be used by libraries.
-   */
-  void* user_data;
-
-  /* If libavb_ab is used, this should point to the
-   * AvbABOps. Otherwise it must be set to NULL.
-   */
-  struct AvbABOps* ab_ops;
-
-  /* If libavb_atx is used, this should point to the
-   * AvbAtxOps. Otherwise it must be set to NULL.
-   */
-  struct AvbAtxOps* atx_ops;
-
-  /* Reads |num_bytes| from offset |offset| from partition with name
-   * |partition| (NUL-terminated UTF-8 string). If |offset| is
-   * negative, its absolute value should be interpreted as the number
-   * of bytes from the end of the partition.
-   *
-   * This function returns AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION if
-   * there is no partition with the given name,
-   * AVB_IO_RESULT_ERROR_RANGE_OUTSIDE_PARTITION if the requested
-   * |offset| is outside the partition, and AVB_IO_RESULT_ERROR_IO if
-   * there was an I/O error from the underlying I/O subsystem.  If the
-   * operation succeeds as requested AVB_IO_RESULT_OK is returned and
-   * the data is available in |buffer|.
-   *
-   * The only time partial I/O may occur is if reading beyond the end
-   * of the partition. In this case the value returned in
-   * |out_num_read| may be smaller than |num_bytes|.
-   */
-  AvbIOResult (*read_from_partition)(AvbOps* ops,
-                                     const char* partition,
-                                     int64_t offset,
-                                     size_t num_bytes,
-                                     void* buffer,
-                                     size_t* out_num_read);
-
-  /* Gets the starting pointer of a partition that is pre-loaded in memory, and
-   * save it to |out_pointer|. The preloaded partition is expected to be
-   * |num_bytes|, where the actual preloaded byte count is returned in
-   * |out_num_bytes_preloaded|. |out_num_bytes_preloaded| must be no larger than
-   * |num_bytes|.
-   *
-   * This provides an alternative way to access a partition that is preloaded
-   * into memory without a full memory copy. When this function pointer is not
-   * set (has value NULL), or when the |out_pointer| is set to NULL as a result,
-   * |read_from_partition| will be used as the fallback. This function is mainly
-   * used for accessing the entire partition content to calculate its hash.
-   *
-   * Preloaded partition data must outlive the lifespan of the
-   * |AvbSlotVerifyData| structure that |avb_slot_verify| outputs.
-   */
-  AvbIOResult (*get_preloaded_partition)(AvbOps* ops,
-                                         const char* partition,
-                                         size_t num_bytes,
-                                         uint8_t** out_pointer,
-                                         size_t* out_num_bytes_preloaded);
-
-  /* Writes |num_bytes| from |bffer| at offset |offset| to partition
-   * with name |partition| (NUL-terminated UTF-8 string). If |offset|
-   * is negative, its absolute value should be interpreted as the
-   * number of bytes from the end of the partition.
-   *
-   * This function returns AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION if
-   * there is no partition with the given name,
-   * AVB_IO_RESULT_ERROR_RANGE_OUTSIDE_PARTITION if the requested
-   * byterange goes outside the partition, and AVB_IO_RESULT_ERROR_IO
-   * if there was an I/O error from the underlying I/O subsystem.  If
-   * the operation succeeds as requested AVB_IO_RESULT_OK is
-   * returned.
-   *
-   * This function never does any partial I/O, it either transfers all
-   * of the requested bytes or returns an error.
-   */
-  AvbIOResult (*write_to_partition)(AvbOps* ops,
-                                    const char* partition,
-                                    int64_t offset,
-                                    size_t num_bytes,
-                                    const void* buffer);
-
-  /* Checks if the given public key used to sign the 'vbmeta'
-   * partition is trusted. Boot loaders typically compare this with
-   * embedded key material generated with 'avbtool
-   * extract_public_key'.
-   *
-   * The public key is in the array pointed to by |public_key_data|
-   * and is of |public_key_length| bytes.
-   *
-   * If there is no public key metadata (set with the avbtool option
-   * --public_key_metadata) then |public_key_metadata| will be set to
-   * NULL. Otherwise this field points to the data which is
-   * |public_key_metadata_length| bytes long.
-   *
-   * If AVB_IO_RESULT_OK is returned then |out_is_trusted| is set -
-   * true if trusted or false if untrusted.
-   */
-  AvbIOResult (*validate_vbmeta_public_key)(AvbOps* ops,
-                                            const uint8_t* public_key_data,
-                                            size_t public_key_length,
-                                            const uint8_t* public_key_metadata,
-                                            size_t public_key_metadata_length,
-                                            bool* out_is_trusted);
-
-  /* Gets the rollback index corresponding to the location given by
-   * |rollback_index_location|. The value is returned in
-   * |out_rollback_index|. Returns AVB_IO_RESULT_OK if the rollback
-   * index was retrieved, otherwise an error code.
-   *
-   * A device may have a limited amount of rollback index locations (say,
-   * one or four) so may error out if |rollback_index_location| exceeds
-   * this number.
-   */
-  AvbIOResult (*read_rollback_index)(AvbOps* ops,
-                                     size_t rollback_index_location,
-                                     uint64_t* out_rollback_index);
-
-  /* Sets the rollback index corresponding to the location given by
-   * |rollback_index_location| to |rollback_index|. Returns
-   * AVB_IO_RESULT_OK if the rollback index was set, otherwise an
-   * error code.
-   *
-   * A device may have a limited amount of rollback index locations (say,
-   * one or four) so may error out if |rollback_index_location| exceeds
-   * this number.
-   */
-  AvbIOResult (*write_rollback_index)(AvbOps* ops,
-                                      size_t rollback_index_location,
-                                      uint64_t rollback_index);
-
-  /* Gets whether the device is unlocked. The value is returned in
-   * |out_is_unlocked| (true if unlocked, false otherwise). Returns
-   * AVB_IO_RESULT_OK if the state was retrieved, otherwise an error
-   * code.
-   */
-  AvbIOResult (*read_is_device_unlocked)(AvbOps* ops, bool* out_is_unlocked);
-
-  /* write the device lock flag. Returns
-   * AVB_IO_RESULT_OK if the state was retrieved, otherwise an error
-   * code.
-   */
-  AvbIOResult (*write_is_device_unlocked)(AvbOps* ops, bool* out_is_unlocked);
-  /* Gets the unique partition GUID for a partition with name in
-   * |partition| (NUL-terminated UTF-8 string). The GUID is copied as
-   * a string into |guid_buf| of size |guid_buf_size| and will be NUL
-   * terminated. The string must be lower-case and properly
-   * hyphenated. For example:
-   *
-   *  527c1c6d-6361-4593-8842-3c78fcd39219
-   *
-   * Returns AVB_IO_RESULT_OK on success, otherwise an error code.
-   */
-  AvbIOResult (*get_unique_guid_for_partition)(AvbOps* ops,
-                                               const char* partition,
-                                               char* guid_buf,
-                                               size_t guid_buf_size);
-
-  /* Gets the size of a partition with the name in |partition|
-   * (NUL-terminated UTF-8 string). Returns the value in
-   * |out_size_num_bytes|.
-   *
-   * Returns AVB_IO_RESULT_OK on success, otherwise an error code.
-   */
-  AvbIOResult (*get_size_of_partition)(AvbOps* ops,
-                                       const char* partition,
-                                       uint64_t* out_size_num_bytes);
-
-  /* Reads a persistent value corresponding to the given |name|. The value is
-   * returned in |out_buffer| which must point to |buffer_size| bytes. On
-   * success |out_num_bytes_read| contains the number of bytes read into
-   * |out_buffer|. If AVB_IO_RESULT_ERROR_INSUFFICIENT_SPACE is returned,
-   * |out_num_bytes_read| contains the number of bytes that would have been read
-   * which can be used to allocate a buffer.
-   *
-   * The |buffer_size| may be zero and the |out_buffer| may be NULL, but if
-   * |out_buffer| is NULL then |buffer_size| *must* be zero.
-   *
-   * Returns AVB_IO_RESULT_OK on success, otherwise an error code.
-   *
-   * If the value does not exist, is not supported, or is not populated, returns
-   * AVB_IO_RESULT_ERROR_NO_SUCH_VALUE. If |buffer_size| is smaller than the
-   * size of the stored value, returns AVB_IO_RESULT_ERROR_INSUFFICIENT_SPACE.
-   *
-   * This operation is currently only used to support persistent digests. If a
-   * device does not use persistent digests this function pointer can be set to
-   * NULL.
-   */
-  AvbIOResult (*read_persistent_value)(AvbOps* ops,
-                                       const char* name,
-                                       size_t buffer_size,
-                                       uint8_t* out_buffer,
-                                       size_t* out_num_bytes_read);
-
-  /* Writes a persistent value corresponding to the given |name|. The value is
-   * supplied in |value| which must point to |value_size| bytes. Any existing
-   * value with the same name is overwritten. If |value_size| is zero, future
-   * calls to |read_persistent_value| will return
-   * AVB_IO_RESULT_ERROR_NO_SUCH_VALUE.
-   *
-   * Returns AVB_IO_RESULT_OK on success, otherwise an error code.
-   *
-   * If the value |name| is not supported, returns
-   * AVB_IO_RESULT_ERROR_NO_SUCH_VALUE. If the |value_size| is not supported,
-   * returns AVB_IO_RESULT_ERROR_INVALID_VALUE_SIZE.
-   *
-   * This operation is currently only used to support persistent digests. If a
-   * device does not use persistent digests this function pointer can be set to
-   * NULL.
-   */
-  AvbIOResult (*write_persistent_value)(AvbOps* ops,
-                                        const char* name,
-                                        size_t value_size,
-                                        const uint8_t* value);
-};
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* AVB_OPS_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_OPS_H_
+#define AVB_OPS_H_
+
+#include <android_avb/avb_sysdeps.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Well-known names of named persistent values. */
+#define AVB_NPV_PERSISTENT_DIGEST_PREFIX "avb.persistent_digest."
+#define AVB_NPV_MANAGED_VERITY_MODE "avb.managed_verity_mode"
+
+/* Return codes used for I/O operations.
+ *
+ * AVB_IO_RESULT_OK is returned if the requested operation was
+ * successful.
+ *
+ * AVB_IO_RESULT_ERROR_IO is returned if the underlying hardware (disk
+ * or other subsystem) encountered an I/O error.
+ *
+ * AVB_IO_RESULT_ERROR_OOM is returned if unable to allocate memory.
+ *
+ * AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION is returned if the requested
+ * partition does not exist.
+ *
+ * AVB_IO_RESULT_ERROR_RANGE_OUTSIDE_PARTITION is returned if the
+ * range of bytes requested to be read or written is outside the range
+ * of the partition.
+ *
+ * AVB_IO_RESULT_ERROR_NO_SUCH_VALUE is returned if a named persistent value
+ * does not exist.
+ *
+ * AVB_IO_RESULT_ERROR_INVALID_VALUE_SIZE is returned if a named persistent
+ * value size is not supported or does not match the expected size.
+ *
+ * AVB_IO_RESULT_ERROR_INSUFFICIENT_SPACE is returned if a buffer is too small
+ * for the requested operation.
+ */
+typedef enum {
+  AVB_IO_RESULT_OK,
+  AVB_IO_RESULT_ERROR_OOM,
+  AVB_IO_RESULT_ERROR_IO,
+  AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION,
+  AVB_IO_RESULT_ERROR_RANGE_OUTSIDE_PARTITION,
+  AVB_IO_RESULT_ERROR_NO_SUCH_VALUE,
+  AVB_IO_RESULT_ERROR_INVALID_VALUE_SIZE,
+  AVB_IO_RESULT_ERROR_INSUFFICIENT_SPACE,
+} AvbIOResult;
+
+struct AvbOps;
+typedef struct AvbOps AvbOps;
+
+/* Forward-declaration of operations in libavb_ab. */
+struct AvbABOps;
+
+/* Forward-declaration of operations in libavb_atx. */
+struct AvbAtxOps;
+
+/* High-level operations/functions/methods that are platform
+ * dependent.
+ *
+ * Operations may be added in the future so when implementing it
+ * always make sure to zero out sizeof(AvbOps) bytes of the struct to
+ * ensure that unimplemented operations are set to NULL.
+ */
+struct AvbOps {
+  /* This pointer can be used by the application/bootloader using
+   * libavb and is typically used in each operation to get a pointer
+   * to platform-specific resources. It cannot be used by libraries.
+   */
+  void* user_data;
+
+  /* If libavb_ab is used, this should point to the
+   * AvbABOps. Otherwise it must be set to NULL.
+   */
+  struct AvbABOps* ab_ops;
+
+  /* If libavb_atx is used, this should point to the
+   * AvbAtxOps. Otherwise it must be set to NULL.
+   */
+  struct AvbAtxOps* atx_ops;
+
+  /* Reads |num_bytes| from offset |offset| from partition with name
+   * |partition| (NUL-terminated UTF-8 string). If |offset| is
+   * negative, its absolute value should be interpreted as the number
+   * of bytes from the end of the partition.
+   *
+   * This function returns AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION if
+   * there is no partition with the given name,
+   * AVB_IO_RESULT_ERROR_RANGE_OUTSIDE_PARTITION if the requested
+   * |offset| is outside the partition, and AVB_IO_RESULT_ERROR_IO if
+   * there was an I/O error from the underlying I/O subsystem.  If the
+   * operation succeeds as requested AVB_IO_RESULT_OK is returned and
+   * the data is available in |buffer|.
+   *
+   * The only time partial I/O may occur is if reading beyond the end
+   * of the partition. In this case the value returned in
+   * |out_num_read| may be smaller than |num_bytes|.
+   */
+  AvbIOResult (*read_from_partition)(AvbOps* ops,
+                                     const char* partition,
+                                     int64_t offset,
+                                     size_t num_bytes,
+                                     void* buffer,
+                                     size_t* out_num_read);
+
+  /* Gets the starting pointer of a partition that is pre-loaded in memory, and
+   * save it to |out_pointer|. The preloaded partition is expected to be
+   * |num_bytes|, where the actual preloaded byte count is returned in
+   * |out_num_bytes_preloaded|. |out_num_bytes_preloaded| must be no larger than
+   * |num_bytes|.
+   *
+   * This provides an alternative way to access a partition that is preloaded
+   * into memory without a full memory copy. When this function pointer is not
+   * set (has value NULL), or when the |out_pointer| is set to NULL as a result,
+   * |read_from_partition| will be used as the fallback. This function is mainly
+   * used for accessing the entire partition content to calculate its hash.
+   *
+   * Preloaded partition data must outlive the lifespan of the
+   * |AvbSlotVerifyData| structure that |avb_slot_verify| outputs.
+   */
+  AvbIOResult (*get_preloaded_partition)(AvbOps* ops,
+                                         const char* partition,
+                                         size_t num_bytes,
+                                         uint8_t** out_pointer,
+                                         size_t* out_num_bytes_preloaded);
+
+  /* Writes |num_bytes| from |bffer| at offset |offset| to partition
+   * with name |partition| (NUL-terminated UTF-8 string). If |offset|
+   * is negative, its absolute value should be interpreted as the
+   * number of bytes from the end of the partition.
+   *
+   * This function returns AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION if
+   * there is no partition with the given name,
+   * AVB_IO_RESULT_ERROR_RANGE_OUTSIDE_PARTITION if the requested
+   * byterange goes outside the partition, and AVB_IO_RESULT_ERROR_IO
+   * if there was an I/O error from the underlying I/O subsystem.  If
+   * the operation succeeds as requested AVB_IO_RESULT_OK is
+   * returned.
+   *
+   * This function never does any partial I/O, it either transfers all
+   * of the requested bytes or returns an error.
+   */
+  AvbIOResult (*write_to_partition)(AvbOps* ops,
+                                    const char* partition,
+                                    int64_t offset,
+                                    size_t num_bytes,
+                                    const void* buffer);
+
+  /* Checks if the given public key used to sign the 'vbmeta'
+   * partition is trusted. Boot loaders typically compare this with
+   * embedded key material generated with 'avbtool
+   * extract_public_key'.
+   *
+   * The public key is in the array pointed to by |public_key_data|
+   * and is of |public_key_length| bytes.
+   *
+   * If there is no public key metadata (set with the avbtool option
+   * --public_key_metadata) then |public_key_metadata| will be set to
+   * NULL. Otherwise this field points to the data which is
+   * |public_key_metadata_length| bytes long.
+   *
+   * If AVB_IO_RESULT_OK is returned then |out_is_trusted| is set -
+   * true if trusted or false if untrusted.
+   *
+   * NOTE: If AVB_SLOT_VERIFY_FLAGS_NO_VBMETA_PARTITION is passed to
+   * avb_slot_verify() then this operation is never used. Instead, the
+   * validate_public_key_for_partition() operation is used
+   */
+  AvbIOResult (*validate_vbmeta_public_key)(AvbOps* ops,
+                                            const uint8_t* public_key_data,
+                                            size_t public_key_length,
+                                            const uint8_t* public_key_metadata,
+                                            size_t public_key_metadata_length,
+                                            bool* out_is_trusted);
+
+  /* Gets the rollback index corresponding to the location given by
+   * |rollback_index_location|. The value is returned in
+   * |out_rollback_index|. Returns AVB_IO_RESULT_OK if the rollback
+   * index was retrieved, otherwise an error code.
+   *
+   * A device may have a limited amount of rollback index locations (say,
+   * one or four) so may error out if |rollback_index_location| exceeds
+   * this number.
+   */
+  AvbIOResult (*read_rollback_index)(AvbOps* ops,
+                                     size_t rollback_index_location,
+                                     uint64_t* out_rollback_index);
+
+  /* Sets the rollback index corresponding to the location given by
+   * |rollback_index_location| to |rollback_index|. Returns
+   * AVB_IO_RESULT_OK if the rollback index was set, otherwise an
+   * error code.
+   *
+   * A device may have a limited amount of rollback index locations (say,
+   * one or four) so may error out if |rollback_index_location| exceeds
+   * this number.
+   */
+  AvbIOResult (*write_rollback_index)(AvbOps* ops,
+                                      size_t rollback_index_location,
+                                      uint64_t rollback_index);
+
+  /* Gets whether the device is unlocked. The value is returned in
+   * |out_is_unlocked| (true if unlocked, false otherwise). Returns
+   * AVB_IO_RESULT_OK if the state was retrieved, otherwise an error
+   * code.
+   */
+  AvbIOResult (*read_is_device_unlocked)(AvbOps* ops, bool* out_is_unlocked);
+
+  /* write the device lock flag. Returns
+   * AVB_IO_RESULT_OK if the state was retrieved, otherwise an error
+   * code.
+   */
+  AvbIOResult (*write_is_device_unlocked)(AvbOps* ops, bool* out_is_unlocked);
+  
+  /* Gets the unique partition GUID for a partition with name in
+   * |partition| (NUL-terminated UTF-8 string). The GUID is copied as
+   * a string into |guid_buf| of size |guid_buf_size| and will be NUL
+   * terminated. The string must be lower-case and properly
+   * hyphenated. For example:
+   *
+   *  527c1c6d-6361-4593-8842-3c78fcd39219
+   *
+   * Returns AVB_IO_RESULT_OK on success, otherwise an error code.
+   */
+  AvbIOResult (*get_unique_guid_for_partition)(AvbOps* ops,
+                                               const char* partition,
+                                               char* guid_buf,
+                                               size_t guid_buf_size);
+
+  /* Gets the size of a partition with the name in |partition|
+   * (NUL-terminated UTF-8 string). Returns the value in
+   * |out_size_num_bytes|.
+   *
+   * If the partition doesn't exist the AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION
+   * error code should be returned.
+   *
+   * Returns AVB_IO_RESULT_OK on success, otherwise an error code.
+   */
+  AvbIOResult (*get_size_of_partition)(AvbOps* ops,
+                                       const char* partition,
+                                       uint64_t* out_size_num_bytes);
+
+  /* Reads a persistent value corresponding to the given |name|. The value is
+   * returned in |out_buffer| which must point to |buffer_size| bytes. On
+   * success |out_num_bytes_read| contains the number of bytes read into
+   * |out_buffer|. If AVB_IO_RESULT_ERROR_INSUFFICIENT_SPACE is returned,
+   * |out_num_bytes_read| contains the number of bytes that would have been read
+   * which can be used to allocate a buffer.
+   *
+   * The |buffer_size| may be zero and the |out_buffer| may be NULL, but if
+   * |out_buffer| is NULL then |buffer_size| *must* be zero.
+   *
+   * Returns AVB_IO_RESULT_OK on success, otherwise an error code.
+   *
+   * If the value does not exist, is not supported, or is not populated, returns
+   * AVB_IO_RESULT_ERROR_NO_SUCH_VALUE. If |buffer_size| is smaller than the
+   * size of the stored value, returns AVB_IO_RESULT_ERROR_INSUFFICIENT_SPACE.
+   *
+   * This operation is currently only used to support persistent digests or the
+   * AVB_HASHTREE_ERROR_MODE_MANAGED_RESTART_AND_EIO hashtree error mode. If a
+   * device does not use one of these features this function pointer can be set
+   * to NULL.
+   */
+  AvbIOResult (*read_persistent_value)(AvbOps* ops,
+                                       const char* name,
+                                       size_t buffer_size,
+                                       uint8_t* out_buffer,
+                                       size_t* out_num_bytes_read);
+
+  /* Writes a persistent value corresponding to the given |name|. The value is
+   * supplied in |value| which must point to |value_size| bytes. Any existing
+   * value with the same name is overwritten. If |value_size| is zero, future
+   * calls to |read_persistent_value| will return
+   * AVB_IO_RESULT_ERROR_NO_SUCH_VALUE.
+   *
+   * Returns AVB_IO_RESULT_OK on success, otherwise an error code.
+   *
+   * If the value |name| is not supported, returns
+   * AVB_IO_RESULT_ERROR_NO_SUCH_VALUE. If the |value_size| is not supported,
+   * returns AVB_IO_RESULT_ERROR_INVALID_VALUE_SIZE.
+   *
+   * This operation is currently only used to support persistent digests or the
+   * AVB_HASHTREE_ERROR_MODE_MANAGED_RESTART_AND_EIO hashtree error mode. If a
+   * device does not use one of these features this function pointer can be set
+   * to NULL.
+   */
+  AvbIOResult (*write_persistent_value)(AvbOps* ops,
+                                        const char* name,
+                                        size_t value_size,
+                                        const uint8_t* value);
+
+  /* Like validate_vbmeta_public_key() but for when the flag
+   * AVB_SLOT_VERIFY_FLAGS_NO_VBMETA_PARTITION is being used. The name of the
+   * partition to get the public key for is passed in |partition_name|.
+   *
+   * Also returns the rollback index location to use for the partition, in
+   * |out_rollback_index_location|.
+   *
+   * Returns AVB_IO_RESULT_OK on success, otherwise an error code.
+   */
+  AvbIOResult (*validate_public_key_for_partition)(
+      AvbOps* ops,
+      const char* partition,
+      const uint8_t* public_key_data,
+      size_t public_key_length,
+      const uint8_t* public_key_metadata,
+      size_t public_key_metadata_length,
+      bool* out_is_trusted,
+      uint32_t* out_rollback_index_location);
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_OPS_H_ */
diff --git a/include/android_avb/avb_sha.h b/include/android_avb/avb_sha.h
old mode 100755
new mode 100644
index c4b7c7705e..0b0db8b8d9
--- a/include/android_avb/avb_sha.h
+++ b/include/android_avb/avb_sha.h
@@ -1,92 +1,92 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/*
-#ifdef AVB_INSIDE_LIBAVB_H
-#error "You can't include avb_sha.h in the public header libavb.h."
-#endif
-
-#ifndef AVB_COMPILATION
-#error "Never include this file, it may only be used from internal avb code."
-#endif
-*/
-
-#ifndef AVB_SHA_H_
-#define AVB_SHA_H_
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include <android_avb/avb_crypto.h>
-#include <android_avb/avb_sysdeps.h>
-
-/* Block size in bytes of a SHA-256 digest. */
-#define AVB_SHA256_BLOCK_SIZE 64
-
-
-/* Block size in bytes of a SHA-512 digest. */
-#define AVB_SHA512_BLOCK_SIZE 128
-
-/* Data structure used for SHA-256. */
-typedef struct {
-  uint32_t h[8];
-  uint32_t tot_len;
-  uint32_t len;
-  uint8_t block[2 * AVB_SHA256_BLOCK_SIZE];
-  uint8_t buf[AVB_SHA256_DIGEST_SIZE]; /* Used for storing the final digest. */
-} AvbSHA256Ctx;
-
-/* Data structure used for SHA-512. */
-typedef struct {
-  uint64_t h[8];
-  uint32_t tot_len;
-  uint32_t len;
-  uint8_t block[2 * AVB_SHA512_BLOCK_SIZE];
-  uint8_t buf[AVB_SHA512_DIGEST_SIZE]; /* Used for storing the final digest. */
-} AvbSHA512Ctx;
-
-/* Initializes the SHA-256 context. */
-void avb_sha256_init(AvbSHA256Ctx* ctx);
-
-/* Updates the SHA-256 context with |len| bytes from |data|. */
-void avb_sha256_update(AvbSHA256Ctx* ctx, const uint8_t* data, uint32_t len);
-
-/* Returns the SHA-256 digest. */
-uint8_t* avb_sha256_final(AvbSHA256Ctx* ctx) AVB_ATTR_WARN_UNUSED_RESULT;
-
-/* Initializes the SHA-512 context. */
-void avb_sha512_init(AvbSHA512Ctx* ctx);
-
-/* Updates the SHA-512 context with |len| bytes from |data|. */
-void avb_sha512_update(AvbSHA512Ctx* ctx, const uint8_t* data, uint32_t len);
-
-/* Returns the SHA-512 digest. */
-uint8_t* avb_sha512_final(AvbSHA512Ctx* ctx) AVB_ATTR_WARN_UNUSED_RESULT;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* AVB_SHA_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#ifdef AVB_INSIDE_LIBAVB_H
+#error "You can't include avb_sha.h in the public header libavb.h."
+#endif
+
+#ifndef AVB_COMPILATION
+#error "Never include this file, it may only be used from internal avb code."
+#endif
+*/
+
+#ifndef AVB_SHA_H_
+#define AVB_SHA_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <android_avb/avb_crypto.h>
+#include <android_avb/avb_sysdeps.h>
+
+/* Block size in bytes of a SHA-256 digest. */
+#define AVB_SHA256_BLOCK_SIZE 64
+
+
+/* Block size in bytes of a SHA-512 digest. */
+#define AVB_SHA512_BLOCK_SIZE 128
+
+/* Data structure used for SHA-256. */
+typedef struct {
+  uint32_t h[8];
+  uint64_t tot_len;
+  size_t len;
+  uint8_t block[2 * AVB_SHA256_BLOCK_SIZE];
+  uint8_t buf[AVB_SHA256_DIGEST_SIZE]; /* Used for storing the final digest. */
+} AvbSHA256Ctx;
+
+/* Data structure used for SHA-512. */
+typedef struct {
+  uint64_t h[8];
+  uint64_t tot_len;
+  size_t len;
+  uint8_t block[2 * AVB_SHA512_BLOCK_SIZE];
+  uint8_t buf[AVB_SHA512_DIGEST_SIZE]; /* Used for storing the final digest. */
+} AvbSHA512Ctx;
+
+/* Initializes the SHA-256 context. */
+void avb_sha256_init(AvbSHA256Ctx* ctx);
+
+/* Updates the SHA-256 context with |len| bytes from |data|. */
+void avb_sha256_update(AvbSHA256Ctx* ctx, const uint8_t* data, size_t len);
+
+/* Returns the SHA-256 digest. */
+uint8_t* avb_sha256_final(AvbSHA256Ctx* ctx) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Initializes the SHA-512 context. */
+void avb_sha512_init(AvbSHA512Ctx* ctx);
+
+/* Updates the SHA-512 context with |len| bytes from |data|. */
+void avb_sha512_update(AvbSHA512Ctx* ctx, const uint8_t* data, size_t len);
+
+/* Returns the SHA-512 digest. */
+uint8_t* avb_sha512_final(AvbSHA512Ctx* ctx) AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_SHA_H_ */
diff --git a/include/android_avb/avb_slot_verify.h b/include/android_avb/avb_slot_verify.h
old mode 100755
new mode 100644
index 8b40676a6b..2ba3996b8a
--- a/include/android_avb/avb_slot_verify.h
+++ b/include/android_avb/avb_slot_verify.h
@@ -1,361 +1,402 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/*
-#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
-#error "Never include this file directly, include libavb.h instead."
-#endif
-*/
-
-#ifndef AVB_SLOT_VERIFY_H_
-#define AVB_SLOT_VERIFY_H_
-
-#include <android_avb/avb_ops.h>
-#include <android_avb/avb_vbmeta_image.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Return codes used in avb_slot_verify(), see that function for
- * documentation for each field.
- *
- * Use avb_slot_verify_result_to_string() to get a textual
- * representation usable for error/debug output.
- */
-typedef enum {
-  AVB_SLOT_VERIFY_RESULT_OK,
-  AVB_SLOT_VERIFY_RESULT_ERROR_OOM,
-  AVB_SLOT_VERIFY_RESULT_ERROR_IO,
-  AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION,
-  AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX,
-  AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED,
-  AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA,
-  AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION,
-  AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT
-} AvbSlotVerifyResult;
-
-/* Various error handling modes for when verification fails using a
- * hashtree at runtime inside the HLOS.
- *
- * AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE means that the OS
- * will invalidate the current slot and restart.
- *
- * AVB_HASHTREE_ERROR_MODE_RESTART means that the OS will restart.
- *
- * AVB_HASHTREE_ERROR_MODE_EIO means that an EIO error will be
- * returned to applications.
- *
- * AVB_HASHTREE_ERROR_MODE_LOGGING means that errors will be logged
- * and corrupt data may be returned to applications. This mode should
- * be used ONLY for diagnostics and debugging. It cannot be used
- * unless AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR is also
- * used.
- */
-typedef enum {
-  AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE,
-  AVB_HASHTREE_ERROR_MODE_RESTART,
-  AVB_HASHTREE_ERROR_MODE_EIO,
-  AVB_HASHTREE_ERROR_MODE_LOGGING
-} AvbHashtreeErrorMode;
-
-/* Flags that influence how avb_slot_verify() works.
- *
- * If AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR is NOT set then
- * avb_slot_verify() will bail out as soon as an error is encountered
- * and |out_data| is set only if AVB_SLOT_VERIFY_RESULT_OK is
- * returned.
- *
- * Otherwise if AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR is set
- * avb_slot_verify() will continue verification efforts and |out_data|
- * is also set if AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED,
- * AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION, or
- * AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX is returned. It is
- * undefined which error is returned if more than one distinct error
- * is encountered. It is guaranteed that AVB_SLOT_VERIFY_RESULT_OK is
- * returned if, and only if, there are no errors. This mode is needed
- * to boot valid but unverified slots when the device is unlocked.
- *
- * Also, if AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR is set the
- * contents loaded from |requested_partition| will be the contents of
- * the entire partition instead of just the size specified in the hash
- * descriptor.
- */
-typedef enum {
-  AVB_SLOT_VERIFY_FLAGS_NONE = 0,
-  AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR = (1 << 0)
-} AvbSlotVerifyFlags;
-
-/* Get a textual representation of |result|. */
-const char* avb_slot_verify_result_to_string(AvbSlotVerifyResult result);
-
-/* Maximum number of rollback index locations supported. */
-#define AVB_MAX_NUMBER_OF_ROLLBACK_INDEX_LOCATIONS 32
-
-/* AvbPartitionData contains data loaded from partitions when using
- * avb_slot_verify(). The |partition_name| field contains the name of
- * the partition (without A/B suffix), |data| points to the loaded
- * data which is |data_size| bytes long. If |preloaded| is set to true,
- * this structure dose not own |data|. The caller of |avb_slot_verify|
- * needs to make sure that the preloaded data outlives this
- * |AvbPartitionData| structure.
- *
- * Note that this is strictly less than the partition size - it's only
- * the image stored there, not the entire partition nor any of the
- * metadata.
- */
-typedef struct {
-  char* partition_name;
-  uint8_t* data;
-  size_t data_size;
-  bool preloaded;
-} AvbPartitionData;
-
-/* AvbVBMetaData contains a vbmeta struct loaded from a partition when
- * using avb_slot_verify(). The |partition_name| field contains the
- * name of the partition (without A/B suffix), |vbmeta_data| points to
- * the loaded data which is |vbmeta_size| bytes long.
- *
- * The |verify_result| field contains the result of
- * avb_vbmeta_image_verify() on the data. This is guaranteed to be
- * AVB_VBMETA_VERIFY_RESULT_OK for all vbmeta images if
- * avb_slot_verify() returns AVB_SLOT_VERIFY_RESULT_OK.
- *
- * You can use avb_descriptor_get_all(), avb_descriptor_foreach(), and
- * avb_vbmeta_image_header_to_host_byte_order() with this data.
- */
-typedef struct {
-  char* partition_name;
-  uint8_t* vbmeta_data;
-  size_t vbmeta_size;
-  AvbVBMetaVerifyResult verify_result;
-} AvbVBMetaData;
-
-/* AvbSlotVerifyData contains data needed to boot a particular slot
- * and is returned by avb_slot_verify() if partitions in a slot are
- * successfully verified.
- *
- * All data pointed to by this struct - including data in each item in
- * the |partitions| array - will be freed when the
- * avb_slot_verify_data_free() function is called.
- *
- * The |ab_suffix| field is the copy of the of |ab_suffix| field
- * passed to avb_slot_verify(). It is the A/B suffix of the slot. This
- * value includes the leading underscore - typical values are "" (if
- * no slots are in use), "_a" (for the first slot), and "_b" (for the
- * second slot).
- *
- * The VBMeta images that were checked are available in the
- * |vbmeta_images| field. The field |num_vbmeta_images| contains the
- * number of elements in this array. The first element -
- * vbmeta_images[0] - is guaranteed to be from the partition with the
- * top-level vbmeta struct. This is usually the "vbmeta" partition in
- * the requested slot but if there is no "vbmeta" partition it can
- * also be the "boot" partition.
- *
- * The partitions loaded and verified from from the slot are
- * accessible in the |loaded_partitions| array. The field
- * |num_loaded_partitions| contains the number of elements in this
- * array. The order of partitions in this array may not necessarily be
- * the same order as in the passed-in |requested_partitions| array.
- *
- * Rollback indexes for the verified slot are stored in the
- * |rollback_indexes| field. Note that avb_slot_verify() will NEVER
- * modify stored_rollback_index[n] locations e.g. it will never use
- * the write_rollback_index() AvbOps operation. Instead it is the job
- * of the caller of avb_slot_verify() to do this based on e.g. A/B
- * policy and other factors. See libavb_ab/avb_ab_flow.c for an
- * example of how to do this.
- *
- * The |cmdline| field is a NUL-terminated string in UTF-8 resulting
- * from concatenating all |AvbKernelCmdlineDescriptor| and then
- * performing proper substitution of the variables
- * $(ANDROID_SYSTEM_PARTUUID), $(ANDROID_BOOT_PARTUUID), and
- * $(ANDROID_VBMETA_PARTUUID) using the
- * get_unique_guid_for_partition() operation in |AvbOps|. Additionally
- * $(ANDROID_VERITY_MODE) will be replaced with the proper dm-verity
- * option depending on the value of |hashtree_error_mode|.
- *
- * Additionally, the |cmdline| field will have the following kernel
- * command-line options set (unless verification is disabled, see
- * below):
- *
- *   androidboot.veritymode: This is set to 'disabled' if the
- *   AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED flag is set in top-level
- *   vbmeta struct. Otherwise it is set to 'enforcing' if the
- *   passed-in hashtree error mode is AVB_HASHTREE_ERROR_MODE_RESTART
- *   or AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE, 'eio' if it's
- *   set to AVB_HASHTREE_ERROR_MODE_EIO, and 'logging' if it's set to
- *   AVB_HASHTREE_ERROR_MODE_LOGGING.
- *
- *   androidboot.vbmeta.invalidate_on_error: This is set to 'yes' only
- *   if hashtree validation isn't disabled and the passed-in hashtree
- *   error mode is AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE.
- *
- *   androidboot.vbmeta.device_state: set to "locked" or "unlocked"
- *   depending on the result of the result of AvbOps's
- *   read_is_unlocked() function.
- *
- *   androidboot.vbmeta.{hash_alg, size, digest}: Will be set to
- *   the digest of all images in |vbmeta_images|.
- *
- *   androidboot.vbmeta.device: This is set to the value
- *   PARTUUID=$(ANDROID_VBMETA_PARTUUID) before substitution so it
- *   will end up pointing to the vbmeta partition for the verified
- *   slot. If there is no vbmeta partition it will point to the boot
- *   partition of the verified slot.
- *
- *   androidboot.vbmeta.avb_version: This is set to the decimal value
- *   of AVB_VERSION_MAJOR followed by a dot followed by the decimal
- *   value of AVB_VERSION_MINOR, for example "1.0" or "1.4". This
- *   version number represents the vbmeta file format version
- *   supported by libavb copy used in the boot loader. This is not
- *   necessarily the same version number of the on-disk metadata for
- *   the slot that was verified.
- *
- * Note that androidboot.slot_suffix is not set in the |cmdline| field
- * in |AvbSlotVerifyData| - you will have to set this yourself.
- *
- * If the |AVB_VBMETA_IMAGE_FLAGS_VERIFICATION_DISABLED| flag is set
- * in the top-level vbmeta struct then only the top-level vbmeta
- * struct is verified and descriptors will not processed. The return
- * value will be set accordingly (if this flag is set via 'avbctl
- * disable-verification' then the return value will be
- * |AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION|) and
- * |AvbSlotVerifyData| is returned. Additionally all partitions in the
- * |requested_partitions| are loaded and the |cmdline| field is set to
- * "root=PARTUUID=$(ANDROID_SYSTEM_PARTUUID)" and the GUID for the
- * appropriate system partition is substituted in. Note that none of
- * the androidboot.* options mentioned above will be set.
- *
- * This struct may grow in the future without it being considered an
- * ABI break.
- */
-typedef struct {
-  char* ab_suffix;
-  AvbVBMetaData* vbmeta_images;
-  size_t num_vbmeta_images;
-  AvbPartitionData* loaded_partitions;
-  size_t num_loaded_partitions;
-  char* cmdline;
-  uint64_t rollback_indexes[AVB_MAX_NUMBER_OF_ROLLBACK_INDEX_LOCATIONS];
-} AvbSlotVerifyData;
-
-/* Calculates a digest of all vbmeta images in |data| using
- * the digest indicated by |digest_type|. Stores the result
- * in |out_digest| which must be large enough to hold a digest
- * of the requested type.
- */
-void avb_slot_verify_data_calculate_vbmeta_digest(AvbSlotVerifyData* data,
-                                                  AvbDigestType digest_type,
-                                                  uint8_t* out_digest);
-
-/* Frees a |AvbSlotVerifyData| including all data it points to. */
-void avb_slot_verify_data_free(AvbSlotVerifyData* data);
-
-/* Performs a full verification of the slot identified by |ab_suffix|
- * and load and verify the contents of the partitions whose name is in
- * the NULL-terminated string array |requested_partitions| (each
- * partition must use hash verification). If not using A/B, pass an
- * empty string (e.g. "", not NULL) for |ab_suffix|. This parameter
- * must include the leading underscore, for example "_a" should be
- * used to refer to the first slot.
- *
- * Typically the |requested_partitions| array only contains a single
- * item for the boot partition, 'boot'.
- *
- * Verification includes loading and verifying data from the 'vbmeta',
- * the requested hash partitions, and possibly other partitions (with
- * |ab_suffix| appended), inspecting rollback indexes, and checking if
- * the public key used to sign the data is acceptable. The functions
- * in |ops| will be used to do this.
- *
- * If |out_data| is not NULL, it will be set to a newly allocated
- * |AvbSlotVerifyData| struct containing all the data needed to
- * actually boot the slot. This data structure should be freed with
- * avb_slot_verify_data_free() when you are done with it. See below
- * for when this is returned.
- *
- * The |flags| parameter is used to influence the semantics of
- * avb_slot_verify() - for example the
- * AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR flag can be used to
- * ignore verification errors which is something needed in the
- * UNLOCKED state. See the AvbSlotVerifyFlags enumeration for details.
- *
- * The |hashtree_error_mode| parameter should be set to the desired
- * error handling mode when hashtree validation fails inside the
- * HLOS. This value isn't used by libavb per se - it is forwarded to
- * the HLOS through the androidboot.veritymode and
- * androidboot.vbmeta.invalidate_on_error cmdline parameters. See the
- * AvbHashtreeErrorMode enumeration for details.
- *
- * Also note that |out_data| is never set if
- * AVB_SLOT_VERIFY_RESULT_ERROR_OOM, AVB_SLOT_VERIFY_RESULT_ERROR_IO,
- * or AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA is returned.
- *
- * AVB_SLOT_VERIFY_RESULT_OK is returned if everything is verified
- * correctly and all public keys are accepted.
- *
- * AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED is returned if
- * everything is verified correctly out but one or more public keys
- * are not accepted. This includes the case where integrity data is
- * not signed.
- *
- * AVB_SLOT_VERIFY_RESULT_ERROR_OOM is returned if unable to
- * allocate memory.
- *
- * AVB_SLOT_VERIFY_RESULT_ERROR_IO is returned if an I/O error
- * occurred while trying to load data or get a rollback index.
- *
- * AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION is returned if the data
- * did not verify, e.g. the digest didn't match or signature checks
- * failed.
- *
- * AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX is returned if a
- * rollback index was less than its stored value.
- *
- * AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA is returned if some
- * of the metadata is invalid or inconsistent.
- *
- * AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION is returned if
- * some of the metadata requires a newer version of libavb than what
- * is in use.
- *
- * AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT is returned if the
- * caller passed invalid parameters, for example trying to use
- * AVB_HASHTREE_ERROR_MODE_LOGGING without
- * AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR.
- */
-AvbSlotVerifyResult avb_slot_verify(AvbOps* ops,
-                                    const char* const* requested_partitions,
-                                    const char* ab_suffix,
-                                    AvbSlotVerifyFlags flags,
-                                    AvbHashtreeErrorMode hashtree_error_mode,
-                                    AvbSlotVerifyData** out_data);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* AVB_SLOT_VERIFY_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_SLOT_VERIFY_H_
+#define AVB_SLOT_VERIFY_H_
+
+#include <android_avb/avb_ops.h>
+#include <android_avb/avb_vbmeta_image.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Return codes used in avb_slot_verify(), see that function for
+ * documentation for each field.
+ *
+ * Use avb_slot_verify_result_to_string() to get a textual
+ * representation usable for error/debug output.
+ */
+typedef enum {
+  AVB_SLOT_VERIFY_RESULT_OK,
+  AVB_SLOT_VERIFY_RESULT_ERROR_OOM,
+  AVB_SLOT_VERIFY_RESULT_ERROR_IO,
+  AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION,
+  AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX,
+  AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED,
+  AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA,
+  AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION,
+  AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT
+} AvbSlotVerifyResult;
+
+/* Various error handling modes for when verification fails using a
+ * hashtree at runtime inside the HLOS.
+ *
+ * AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE means that the OS
+ * will invalidate the current slot and restart.
+ *
+ * AVB_HASHTREE_ERROR_MODE_RESTART means that the OS will restart.
+ *
+ * AVB_HASHTREE_ERROR_MODE_EIO means that an EIO error will be
+ * returned to applications.
+ *
+ * AVB_HASHTREE_ERROR_MODE_LOGGING means that errors will be logged
+ * and corrupt data may be returned to applications. This mode should
+ * be used ONLY for diagnostics and debugging. It cannot be used
+ * unless AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR is also
+ * used.
+ *
+ * AVB_HASHTREE_ERROR_MODE_MANAGED_RESTART_AND_EIO means that either
+ * AVB_HASHTREE_ERROR_MODE_RESTART or AVB_HASHTREE_ERROR_MODE_EIO is used
+ * depending on state. This mode implements a state machine whereby
+ * AVB_HASHTREE_ERROR_MODE_RESTART is used by default and when
+ * AVB_SLOT_VERIFY_FLAGS_RESTART_CAUSED_BY_HASHTREE_CORRUPTION is passed the
+ * mode transitions to AVB_HASHTREE_ERROR_MODE_EIO. When a new OS has been
+ * detected the device transitions back to the AVB_HASHTREE_ERROR_MODE_RESTART
+ * mode. To do this persistent storage is needed - specifically this means that
+ * the passed in AvbOps will need to have the read_persistent_value() and
+ * write_persistent_value() operations implemented. The name of the persistent
+ * value used is "avb.managed_verity_mode" and 32 bytes of storage is needed.
+ */
+typedef enum {
+  AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE,
+  AVB_HASHTREE_ERROR_MODE_RESTART,
+  AVB_HASHTREE_ERROR_MODE_EIO,
+  AVB_HASHTREE_ERROR_MODE_LOGGING,
+  AVB_HASHTREE_ERROR_MODE_MANAGED_RESTART_AND_EIO
+} AvbHashtreeErrorMode;
+
+/* Flags that influence how avb_slot_verify() works.
+ *
+ * If AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR is NOT set then
+ * avb_slot_verify() will bail out as soon as an error is encountered
+ * and |out_data| is set only if AVB_SLOT_VERIFY_RESULT_OK is
+ * returned.
+ *
+ * Otherwise if AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR is set
+ * avb_slot_verify() will continue verification efforts and |out_data|
+ * is also set if AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED,
+ * AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION, or
+ * AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX is returned. It is
+ * undefined which error is returned if more than one distinct error
+ * is encountered. It is guaranteed that AVB_SLOT_VERIFY_RESULT_OK is
+ * returned if, and only if, there are no errors. This mode is needed
+ * to boot valid but unverified slots when the device is unlocked.
+ *
+ * Also, if AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR is set the
+ * contents loaded from |requested_partition| will be the contents of
+ * the entire partition instead of just the size specified in the hash
+ * descriptor.
+ *
+ * The AVB_SLOT_VERIFY_FLAGS_RESTART_CAUSED_BY_HASHTREE_CORRUPTION flag
+ * should be set if using AVB_HASHTREE_ERROR_MODE_MANAGED_RESTART_AND_EIO
+ * and the reason the boot loader is running is because the device
+ * was restarted by the dm-verity driver.
+ *
+ * If the AVB_SLOT_VERIFY_FLAGS_NO_VBMETA_PARTITION flag is set then
+ * data won't be loaded from the "vbmeta" partition and the
+ * |validate_vbmeta_public_key| operation is never called. Instead, the
+ * vbmeta structs in |requested_partitions| are loaded and processed and the
+ * |validate_public_key_for_partition| operation is called for each of these
+ * vbmeta structs. This flag is useful when booting into recovery on a device
+ * not using A/B - see section "Booting into recovery" in README.md for
+ * more information.
+ */
+typedef enum {
+  AVB_SLOT_VERIFY_FLAGS_NONE = 0,
+  AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR = (1 << 0),
+  AVB_SLOT_VERIFY_FLAGS_RESTART_CAUSED_BY_HASHTREE_CORRUPTION = (1 << 1),
+  AVB_SLOT_VERIFY_FLAGS_NO_VBMETA_PARTITION = (1 << 2),
+} AvbSlotVerifyFlags;
+
+/* Get a textual representation of |result|. */
+const char* avb_slot_verify_result_to_string(AvbSlotVerifyResult result);
+
+/* Maximum number of rollback index locations supported. */
+#define AVB_MAX_NUMBER_OF_ROLLBACK_INDEX_LOCATIONS 32
+
+/* AvbPartitionData contains data loaded from partitions when using
+ * avb_slot_verify(). The |partition_name| field contains the name of
+ * the partition (without A/B suffix), |data| points to the loaded
+ * data which is |data_size| bytes long. If |preloaded| is set to true,
+ * this structure dose not own |data|. The caller of |avb_slot_verify|
+ * needs to make sure that the preloaded data outlives this
+ * |AvbPartitionData| structure.
+ *
+ * Note that this is strictly less than the partition size - it's only
+ * the image stored there, not the entire partition nor any of the
+ * metadata.
+ */
+typedef struct {
+  char* partition_name;
+  uint8_t* data;
+  size_t data_size;
+  bool preloaded;
+} AvbPartitionData;
+
+/* AvbVBMetaData contains a vbmeta struct loaded from a partition when
+ * using avb_slot_verify(). The |partition_name| field contains the
+ * name of the partition (without A/B suffix), |vbmeta_data| points to
+ * the loaded data which is |vbmeta_size| bytes long.
+ *
+ * The |verify_result| field contains the result of
+ * avb_vbmeta_image_verify() on the data. This is guaranteed to be
+ * AVB_VBMETA_VERIFY_RESULT_OK for all vbmeta images if
+ * avb_slot_verify() returns AVB_SLOT_VERIFY_RESULT_OK.
+ *
+ * You can use avb_descriptor_get_all(), avb_descriptor_foreach(), and
+ * avb_vbmeta_image_header_to_host_byte_order() with this data.
+ */
+typedef struct {
+  char* partition_name;
+  uint8_t* vbmeta_data;
+  size_t vbmeta_size;
+  AvbVBMetaVerifyResult verify_result;
+} AvbVBMetaData;
+
+/* AvbSlotVerifyData contains data needed to boot a particular slot
+ * and is returned by avb_slot_verify() if partitions in a slot are
+ * successfully verified.
+ *
+ * All data pointed to by this struct - including data in each item in
+ * the |partitions| array - will be freed when the
+ * avb_slot_verify_data_free() function is called.
+ *
+ * The |ab_suffix| field is the copy of the of |ab_suffix| field
+ * passed to avb_slot_verify(). It is the A/B suffix of the slot. This
+ * value includes the leading underscore - typical values are "" (if
+ * no slots are in use), "_a" (for the first slot), and "_b" (for the
+ * second slot).
+ *
+ * The VBMeta images that were checked are available in the
+ * |vbmeta_images| field. The field |num_vbmeta_images| contains the
+ * number of elements in this array. The first element -
+ * vbmeta_images[0] - is guaranteed to be from the partition with the
+ * top-level vbmeta struct. This is usually the "vbmeta" partition in
+ * the requested slot but if there is no "vbmeta" partition it can
+ * also be the "boot" partition.
+ *
+ * The partitions loaded and verified from from the slot are
+ * accessible in the |loaded_partitions| array. The field
+ * |num_loaded_partitions| contains the number of elements in this
+ * array. The order of partitions in this array may not necessarily be
+ * the same order as in the passed-in |requested_partitions| array.
+ *
+ * Rollback indexes for the verified slot are stored in the
+ * |rollback_indexes| field. Note that avb_slot_verify() will NEVER
+ * modify stored_rollback_index[n] locations e.g. it will never use
+ * the write_rollback_index() AvbOps operation. Instead it is the job
+ * of the caller of avb_slot_verify() to do this based on e.g. A/B
+ * policy and other factors. See libavb_ab/avb_ab_flow.c for an
+ * example of how to do this.
+ *
+ * The |cmdline| field is a NUL-terminated string in UTF-8 resulting
+ * from concatenating all |AvbKernelCmdlineDescriptor| and then
+ * performing proper substitution of the variables
+ * $(ANDROID_SYSTEM_PARTUUID), $(ANDROID_BOOT_PARTUUID), and
+ * $(ANDROID_VBMETA_PARTUUID) using the
+ * get_unique_guid_for_partition() operation in |AvbOps|. Additionally
+ * $(ANDROID_VERITY_MODE) will be replaced with the proper dm-verity
+ * option depending on the value of |hashtree_error_mode|.
+ *
+ * Additionally, the |cmdline| field will have the following kernel
+ * command-line options set (unless verification is disabled, see
+ * below):
+ *
+ *   androidboot.veritymode: This is set to 'disabled' if the
+ *   AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED flag is set in top-level
+ *   vbmeta struct. Otherwise it is set to 'enforcing' if the
+ *   passed-in hashtree error mode is AVB_HASHTREE_ERROR_MODE_RESTART
+ *   or AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE, 'eio' if it's
+ *   set to AVB_HASHTREE_ERROR_MODE_EIO, and 'logging' if it's set to
+ *   AVB_HASHTREE_ERROR_MODE_LOGGING.
+ *
+ *   androidboot.veritymode.managed: This is set to 'yes' only
+ *   if hashtree validation isn't disabled and the passed-in hashtree
+ *   error mode is AVB_HASHTREE_ERROR_MODE_MANAGED_RESTART_AND_EIO.
+ *
+ *   androidboot.vbmeta.invalidate_on_error: This is set to 'yes' only
+ *   if hashtree validation isn't disabled and the passed-in hashtree
+ *   error mode is AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE.
+ *
+ *   androidboot.vbmeta.device_state: set to "locked" or "unlocked"
+ *   depending on the result of the result of AvbOps's
+ *   read_is_unlocked() function.
+ *
+ *   androidboot.vbmeta.{hash_alg, size, digest}: Will be set to
+ *   the digest of all images in |vbmeta_images|.
+ *
+ *   androidboot.vbmeta.device: This is set to the value
+ *   PARTUUID=$(ANDROID_VBMETA_PARTUUID) before substitution so it
+ *   will end up pointing to the vbmeta partition for the verified
+ *   slot. If there is no vbmeta partition it will point to the boot
+ *   partition of the verified slot. If the flag
+ *   AVB_SLOT_VERIFY_FLAGS_NO_VBMETA_PARTITION is used, this is not
+ *   set.
+ *
+ *   androidboot.vbmeta.avb_version: This is set to the decimal value
+ *   of AVB_VERSION_MAJOR followed by a dot followed by the decimal
+ *   value of AVB_VERSION_MINOR, for example "1.0" or "1.4". This
+ *   version number represents the vbmeta file format version
+ *   supported by libavb copy used in the boot loader. This is not
+ *   necessarily the same version number of the on-disk metadata for
+ *   the slot that was verified.
+ *
+ * Note that androidboot.slot_suffix is not set in the |cmdline| field
+ * in |AvbSlotVerifyData| - you will have to set this yourself.
+ *
+ * If the |AVB_VBMETA_IMAGE_FLAGS_VERIFICATION_DISABLED| flag is set
+ * in the top-level vbmeta struct then only the top-level vbmeta
+ * struct is verified and descriptors will not processed. The return
+ * value will be set accordingly (if this flag is set via 'avbctl
+ * disable-verification' then the return value will be
+ * |AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION|) and
+ * |AvbSlotVerifyData| is returned. Additionally all partitions in the
+ * |requested_partitions| are loaded and the |cmdline| field is set to
+ * "root=PARTUUID=$(ANDROID_SYSTEM_PARTUUID)" and the GUID for the
+ * appropriate system partition is substituted in. Note that none of
+ * the androidboot.* options mentioned above will be set.
+ *
+ * The |resolved_hashtree_error_mode| is the the value of the passed
+ * avb_slot_verify()'s |hashtree_error_mode| parameter except that it never has
+ * the value AVB_HASHTREE_ERROR_MODE_MANAGED_RESTART_AND_EIO. If this value was
+ * passed in, then the restart/eio state machine is used resulting in
+ * |resolved_hashtree_error_mode| being set to either
+ * AVB_HASHTREE_ERROR_MODE_RESTART or AVB_HASHTREE_ERROR_MODE_EIO.  If set to
+ * AVB_HASHTREE_ERROR_MODE_EIO the boot loader should present a RED warning
+ * screen for the user to click through before continuing to boot.
+ *
+ * This struct may grow in the future without it being considered an
+ * ABI break.
+ */
+typedef struct {
+  char* ab_suffix;
+  AvbVBMetaData* vbmeta_images;
+  size_t num_vbmeta_images;
+  AvbPartitionData* loaded_partitions;
+  size_t num_loaded_partitions;
+  char* cmdline;
+  uint64_t rollback_indexes[AVB_MAX_NUMBER_OF_ROLLBACK_INDEX_LOCATIONS];
+  AvbHashtreeErrorMode resolved_hashtree_error_mode;
+} AvbSlotVerifyData;
+
+/* Calculates a digest of all vbmeta images in |data| using
+ * the digest indicated by |digest_type|. Stores the result
+ * in |out_digest| which must be large enough to hold a digest
+ * of the requested type.
+ */
+void avb_slot_verify_data_calculate_vbmeta_digest(AvbSlotVerifyData* data,
+                                                  AvbDigestType digest_type,
+                                                  uint8_t* out_digest);
+
+/* Frees a |AvbSlotVerifyData| including all data it points to. */
+void avb_slot_verify_data_free(AvbSlotVerifyData* data);
+
+/* Performs a full verification of the slot identified by |ab_suffix|
+ * and load and verify the contents of the partitions whose name is in
+ * the NULL-terminated string array |requested_partitions| (each
+ * partition must use hash verification). If not using A/B, pass an
+ * empty string (e.g. "", not NULL) for |ab_suffix|. This parameter
+ * must include the leading underscore, for example "_a" should be
+ * used to refer to the first slot.
+ *
+ * Typically the |requested_partitions| array only contains a single
+ * item for the boot partition, 'boot'.
+ *
+ * Verification includes loading and verifying data from the 'vbmeta',
+ * the requested hash partitions, and possibly other partitions (with
+ * |ab_suffix| appended), inspecting rollback indexes, and checking if
+ * the public key used to sign the data is acceptable. The functions
+ * in |ops| will be used to do this.
+ *
+ * If |out_data| is not NULL, it will be set to a newly allocated
+ * |AvbSlotVerifyData| struct containing all the data needed to
+ * actually boot the slot. This data structure should be freed with
+ * avb_slot_verify_data_free() when you are done with it. See below
+ * for when this is returned.
+ *
+ * The |flags| parameter is used to influence the semantics of
+ * avb_slot_verify() - for example the
+ * AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR flag can be used to
+ * ignore verification errors which is something needed in the
+ * UNLOCKED state. See the AvbSlotVerifyFlags enumeration for details.
+ *
+ * The |hashtree_error_mode| parameter should be set to the desired error
+ * handling mode. See the AvbHashtreeErrorMode enumeration for details.
+ *
+ * Also note that |out_data| is never set if
+ * AVB_SLOT_VERIFY_RESULT_ERROR_OOM, AVB_SLOT_VERIFY_RESULT_ERROR_IO,
+ * or AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA is returned.
+ *
+ * AVB_SLOT_VERIFY_RESULT_OK is returned if everything is verified
+ * correctly and all public keys are accepted.
+ *
+ * AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED is returned if
+ * everything is verified correctly out but one or more public keys
+ * are not accepted. This includes the case where integrity data is
+ * not signed.
+ *
+ * AVB_SLOT_VERIFY_RESULT_ERROR_OOM is returned if unable to
+ * allocate memory.
+ *
+ * AVB_SLOT_VERIFY_RESULT_ERROR_IO is returned if an I/O error
+ * occurred while trying to load data or get a rollback index.
+ *
+ * AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION is returned if the data
+ * did not verify, e.g. the digest didn't match or signature checks
+ * failed.
+ *
+ * AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX is returned if a
+ * rollback index was less than its stored value.
+ *
+ * AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA is returned if some
+ * of the metadata is invalid or inconsistent.
+ *
+ * AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION is returned if
+ * some of the metadata requires a newer version of libavb than what
+ * is in use.
+ *
+ * AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT is returned if the
+ * caller passed invalid parameters, for example trying to use
+ * AVB_HASHTREE_ERROR_MODE_LOGGING without
+ * AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR.
+ */
+AvbSlotVerifyResult avb_slot_verify(AvbOps* ops,
+                                    const char* const* requested_partitions,
+                                    const char* ab_suffix,
+                                    AvbSlotVerifyFlags flags,
+                                    AvbHashtreeErrorMode hashtree_error_mode,
+                                    AvbSlotVerifyData** out_data);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_SLOT_VERIFY_H_ */
diff --git a/include/android_avb/avb_sysdeps.h b/include/android_avb/avb_sysdeps.h
old mode 100755
new mode 100644
index b2ba7f8321..55081aa092
--- a/include/android_avb/avb_sysdeps.h
+++ b/include/android_avb/avb_sysdeps.h
@@ -1,130 +1,138 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/*
-#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
-#error "Never include this file directly, include libavb.h instead."
-#endif
-*/
-
-#ifndef AVB_SYSDEPS_H_
-#define AVB_SYSDEPS_H_
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Change these includes to match your platform to bring in the
- * equivalent types available in a normal C runtime. At least things
- * like uint8_t, uint64_t, and bool (with |false|, |true| keywords)
- * must be present.
- */
-#include <inttypes.h>
-#include <stdbool.h>
-#include <stddef.h>
-#ifdef CONFIG_USE_STDINT
-/* Provided by gcc. */
-#include <stdint.h>
-#else
-/* Type for `void *' pointers. */
-typedef unsigned long int uintptr_t;
-#endif
-
-/* If you don't have gcc or clang, these attribute macros may need to
- * be adjusted.
- */
-#define AVB_ATTR_WARN_UNUSED_RESULT __attribute__((warn_unused_result))
-#define AVB_ATTR_PACKED __attribute__((packed))
-#define AVB_ATTR_NO_RETURN __attribute__((noreturn))
-#define AVB_ATTR_SENTINEL __attribute__((__sentinel__))
-
-/* Size in bytes used for alignment. */
-#ifdef __LP64__
-#define AVB_ALIGNMENT_SIZE 8
-#else
-#define AVB_ALIGNMENT_SIZE 4
-#endif
-
-/* Compare |n| bytes in |src1| and |src2|.
- *
- * Returns an integer less than, equal to, or greater than zero if the
- * first |n| bytes of |src1| is found, respectively, to be less than,
- * to match, or be greater than the first |n| bytes of |src2|. */
-int avb_memcmp(const void* src1,
-               const void* src2,
-               size_t n) AVB_ATTR_WARN_UNUSED_RESULT;
-
-/* Compare two strings.
- *
- * Return an integer less than, equal to, or greater than zero if |s1|
- * is found, respectively, to be less than, to match, or be greater
- * than |s2|.
- */
-int avb_strcmp(const char* s1, const char* s2);
-
-/* Copy |n| bytes from |src| to |dest|. */
-void* avb_memcpy(void* dest, const void* src, size_t n);
-
-/* Set |n| bytes starting at |s| to |c|.  Returns |dest|. */
-void* avb_memset(void* dest, const int c, size_t n);
-
-/* Prints out a message. The string passed must be a NUL-terminated
- * UTF-8 string.
- */
-void avb_print(const char* message);
-
-/* Prints out a vector of strings. Each argument must point to a
- * NUL-terminated UTF-8 string and NULL should be the last argument.
- */
-void avb_printv(const char* message, ...) AVB_ATTR_SENTINEL;
-
-/* Aborts the program or reboots the device. */
-void avb_abort(void);
-
-/* Allocates |size| bytes. Returns NULL if no memory is available,
- * otherwise a pointer to the allocated memory.
- *
- * The memory is not initialized.
- *
- * The pointer returned is guaranteed to be word-aligned.
- *
- * The memory should be freed with avb_free() when you are done with it.
- */
-void* avb_malloc_(size_t size) AVB_ATTR_WARN_UNUSED_RESULT;
-
-/* Frees memory previously allocated with avb_malloc(). */
-void avb_free(void* ptr);
-
-/* Returns the lenght of |str|, excluding the terminating NUL-byte. */
-size_t avb_strlen(const char* str) AVB_ATTR_WARN_UNUSED_RESULT;
-
-/* Divide the |dividend| by 10 and saves back to the pointer. Return the
- * remainder. */
-uint32_t avb_div_by_10(uint64_t* dividend);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* AVB_SYSDEPS_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_SYSDEPS_H_
+#define AVB_SYSDEPS_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Change these includes to match your platform to bring in the
+ * equivalent types available in a normal C runtime. At least things
+ * like uint8_t, uint64_t, and bool (with |false|, |true| keywords)
+ * must be present.
+ */
+#include <inttypes.h>
+#include <stdbool.h>
+#include <stddef.h>
+#ifdef CONFIG_USE_STDINT
+/* Provided by gcc. */
+#include <stdint.h>
+#else
+/* Type for `void *' pointers. */
+typedef unsigned long int uintptr_t;
+#endif
+
+/* If you don't have gcc or clang, these attribute macros may need to
+ * be adjusted.
+ */
+#define AVB_ATTR_WARN_UNUSED_RESULT __attribute__((warn_unused_result))
+#define AVB_ATTR_PACKED __attribute__((packed))
+#define AVB_ATTR_NO_RETURN __attribute__((noreturn))
+#define AVB_ATTR_SENTINEL __attribute__((__sentinel__))
+
+/* Size in bytes used for alignment. */
+#ifdef __LP64__
+#define AVB_ALIGNMENT_SIZE 8
+#else
+#define AVB_ALIGNMENT_SIZE 4
+#endif
+
+/* Compare |n| bytes in |src1| and |src2|.
+ *
+ * Returns an integer less than, equal to, or greater than zero if the
+ * first |n| bytes of |src1| is found, respectively, to be less than,
+ * to match, or be greater than the first |n| bytes of |src2|. */
+int avb_memcmp(const void* src1,
+               const void* src2,
+               size_t n) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Compare two strings.
+ *
+ * Return an integer less than, equal to, or greater than zero if |s1|
+ * is found, respectively, to be less than, to match, or be greater
+ * than |s2|.
+ */
+int avb_strcmp(const char* s1, const char* s2);
+
+/* Compare |n| bytes in two strings.
+ *
+ * Return an integer less than, equal to, or greater than zero if the
+ * first |n| bytes of |s1| is found, respectively, to be less than,
+ * to match, or be greater than the first |n| bytes of |s2|.
+ */
+int avb_strncmp(const char* s1, const char* s2, size_t n);
+
+/* Copy |n| bytes from |src| to |dest|. */
+void* avb_memcpy(void* dest, const void* src, size_t n);
+
+/* Set |n| bytes starting at |s| to |c|.  Returns |dest|. */
+void* avb_memset(void* dest, const int c, size_t n);
+
+/* Prints out a message. The string passed must be a NUL-terminated
+ * UTF-8 string.
+ */
+void avb_print(const char* message);
+
+/* Prints out a vector of strings. Each argument must point to a
+ * NUL-terminated UTF-8 string and NULL should be the last argument.
+ */
+void avb_printv(const char* message, ...) AVB_ATTR_SENTINEL;
+
+/* Aborts the program or reboots the device. */
+void avb_abort(void);
+
+/* Allocates |size| bytes. Returns NULL if no memory is available,
+ * otherwise a pointer to the allocated memory.
+ *
+ * The memory is not initialized.
+ *
+ * The pointer returned is guaranteed to be word-aligned.
+ *
+ * The memory should be freed with avb_free() when you are done with it.
+ */
+void* avb_malloc_(size_t size) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Frees memory previously allocated with avb_malloc(). */
+void avb_free(void* ptr);
+
+/* Returns the lenght of |str|, excluding the terminating NUL-byte. */
+size_t avb_strlen(const char* str) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Divide the |dividend| by 10 and saves back to the pointer. Return the
+ * remainder. */
+uint32_t avb_div_by_10(uint64_t* dividend);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_SYSDEPS_H_ */
diff --git a/lib/avb/libavb/avb_cmdline.c b/lib/avb/libavb/avb_cmdline.c
old mode 100755
new mode 100644
index a4bb2edc34..b59dc1d1fe
--- a/lib/avb/libavb/avb_cmdline.c
+++ b/lib/avb/libavb/avb_cmdline.c
@@ -1,440 +1,474 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include <android_avb/avb_cmdline.h>
-#include <android_avb/avb_sha.h>
-#include <android_avb/avb_util.h>
-#include <android_avb/avb_version.h>
-
-#define NUM_GUIDS 3
-
-/* Substitutes all variables (e.g. $(ANDROID_SYSTEM_PARTUUID)) with
- * values. Returns NULL on OOM, otherwise the cmdline with values
- * replaced.
- */
-char* avb_sub_cmdline(AvbOps* ops,
-                      const char* cmdline,
-                      const char* ab_suffix,
-                      bool using_boot_for_vbmeta,
-                      const AvbCmdlineSubstList* additional_substitutions) {
-  const char* part_name_str[NUM_GUIDS] = {"system", "boot", "vbmeta"};
-  const char* replace_str[NUM_GUIDS] = {"$(ANDROID_SYSTEM_PARTUUID)",
-                                        "$(ANDROID_BOOT_PARTUUID)",
-                                        "$(ANDROID_VBMETA_PARTUUID)"};
-  char* ret = NULL;
-  AvbIOResult io_ret;
-  size_t n;
-
-  /* Special-case for when the top-level vbmeta struct is in the boot
-   * partition.
-   */
-  if (using_boot_for_vbmeta) {
-    part_name_str[2] = "boot";
-  }
-
-  /* Replace unique partition GUIDs */
-  for (n = 0; n < NUM_GUIDS; n++) {
-    char part_name[AVB_PART_NAME_MAX_SIZE];
-    char guid_buf[37];
-
-    if (!avb_str_concat(part_name,
-                        sizeof part_name,
-                        part_name_str[n],
-                        avb_strlen(part_name_str[n]),
-                        ab_suffix,
-                        avb_strlen(ab_suffix))) {
-      avb_error("Partition name and suffix does not fit.\n");
-      goto fail;
-    }
-
-    io_ret = ops->get_unique_guid_for_partition(
-        ops, part_name, guid_buf, sizeof guid_buf);
-    if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-      goto fail;
-    } else if (io_ret != AVB_IO_RESULT_OK) {
-      avb_error("Error getting unique GUID for partition.\n");
-      goto fail;
-    }
-
-    if (ret == NULL) {
-      ret = avb_replace(cmdline, replace_str[n], guid_buf);
-    } else {
-      char* new_ret = avb_replace(ret, replace_str[n], guid_buf);
-      avb_free(ret);
-      ret = new_ret;
-    }
-    if (ret == NULL) {
-      goto fail;
-    }
-  }
-
-  avb_assert(ret != NULL);
-
-  /* Replace any additional substitutions. */
-  if (additional_substitutions != NULL) {
-    for (n = 0; n < additional_substitutions->size; ++n) {
-      char* new_ret = avb_replace(ret,
-                                  additional_substitutions->tokens[n],
-                                  additional_substitutions->values[n]);
-      avb_free(ret);
-      ret = new_ret;
-      if (ret == NULL) {
-        goto fail;
-      }
-    }
-  }
-
-  return ret;
-
-fail:
-  if (ret != NULL) {
-    avb_free(ret);
-  }
-  return NULL;
-}
-
-static int cmdline_append_option(AvbSlotVerifyData* slot_data,
-                                 const char* key,
-                                 const char* value) {
-  size_t offset, key_len, value_len;
-  char* new_cmdline;
-
-  key_len = avb_strlen(key);
-  value_len = avb_strlen(value);
-
-  offset = 0;
-  if (slot_data->cmdline != NULL) {
-    offset = avb_strlen(slot_data->cmdline);
-    if (offset > 0) {
-      offset += 1;
-    }
-  }
-
-  new_cmdline = avb_calloc(offset + key_len + value_len + 2);
-  if (new_cmdline == NULL) {
-    return 0;
-  }
-  if (offset > 0) {
-    avb_memcpy(new_cmdline, slot_data->cmdline, offset - 1);
-    new_cmdline[offset - 1] = ' ';
-  }
-  avb_memcpy(new_cmdline + offset, key, key_len);
-  new_cmdline[offset + key_len] = '=';
-  avb_memcpy(new_cmdline + offset + key_len + 1, value, value_len);
-  if (slot_data->cmdline != NULL) {
-    avb_free(slot_data->cmdline);
-  }
-  slot_data->cmdline = new_cmdline;
-
-  return 1;
-}
-
-#define AVB_MAX_DIGITS_UINT64 32
-
-/* Writes |value| to |digits| in base 10 followed by a NUL byte.
- * Returns number of characters written excluding the NUL byte.
- */
-static size_t uint64_to_base10(uint64_t value,
-                               char digits[AVB_MAX_DIGITS_UINT64]) {
-  char rev_digits[AVB_MAX_DIGITS_UINT64];
-  size_t n, num_digits;
-
-  for (num_digits = 0; num_digits < AVB_MAX_DIGITS_UINT64 - 1;) {
-    rev_digits[num_digits++] = avb_div_by_10(&value) + '0';
-    if (value == 0) {
-      break;
-    }
-  }
-
-  for (n = 0; n < num_digits; n++) {
-    digits[n] = rev_digits[num_digits - 1 - n];
-  }
-  digits[n] = '\0';
-  return n;
-}
-
-static int cmdline_append_version(AvbSlotVerifyData* slot_data,
-                                  const char* key,
-                                  uint64_t major_version,
-                                  uint64_t minor_version) {
-  char major_digits[AVB_MAX_DIGITS_UINT64];
-  char minor_digits[AVB_MAX_DIGITS_UINT64];
-  char combined[AVB_MAX_DIGITS_UINT64 * 2 + 1];
-  size_t num_major_digits, num_minor_digits;
-
-  num_major_digits = uint64_to_base10(major_version, major_digits);
-  num_minor_digits = uint64_to_base10(minor_version, minor_digits);
-  avb_memcpy(combined, major_digits, num_major_digits);
-  combined[num_major_digits] = '.';
-  avb_memcpy(combined + num_major_digits + 1, minor_digits, num_minor_digits);
-  combined[num_major_digits + 1 + num_minor_digits] = '\0';
-
-  return cmdline_append_option(slot_data, key, combined);
-}
-
-static int cmdline_append_uint64_base10(AvbSlotVerifyData* slot_data,
-                                        const char* key,
-                                        uint64_t value) {
-  char digits[AVB_MAX_DIGITS_UINT64];
-  uint64_to_base10(value, digits);
-  return cmdline_append_option(slot_data, key, digits);
-}
-
-static int cmdline_append_hex(AvbSlotVerifyData* slot_data,
-                              const char* key,
-                              const uint8_t* data,
-                              size_t data_len) {
-  int ret;
-  char* hex_data = avb_bin2hex(data, data_len);
-  if (hex_data == NULL) {
-    return 0;
-  }
-  ret = cmdline_append_option(slot_data, key, hex_data);
-  avb_free(hex_data);
-  return ret;
-}
-
-AvbSlotVerifyResult avb_append_options(
-    AvbOps* ops,
-    AvbSlotVerifyData* slot_data,
-    AvbVBMetaImageHeader* toplevel_vbmeta,
-    AvbAlgorithmType algorithm_type,
-    AvbHashtreeErrorMode hashtree_error_mode) {
-  AvbSlotVerifyResult ret;
-  const char* verity_mode = NULL;
-  bool is_device_unlocked;
-  AvbIOResult io_ret;
-
-  /* Add androidboot.vbmeta.device option. */
-  if (!cmdline_append_option(slot_data,
-                             "androidboot.vbmeta.device",
-                             "PARTUUID=$(ANDROID_VBMETA_PARTUUID)")) {
-    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-    goto out;
-  }
-
-  /* Add androidboot.vbmeta.avb_version option. */
-  if (!cmdline_append_version(slot_data,
-                              "androidboot.vbmeta.avb_version",
-                              AVB_VERSION_MAJOR,
-                              AVB_VERSION_MINOR)) {
-    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-    goto out;
-  }
-
-  /* Set androidboot.avb.device_state to "locked" or "unlocked". */
-  io_ret = ops->read_is_device_unlocked(ops, &is_device_unlocked);
-  if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-    goto out;
-  } else if (io_ret != AVB_IO_RESULT_OK) {
-    avb_error("Error getting device state.\n");
-    ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
-    goto out;
-  }
-  if (!cmdline_append_option(slot_data,
-                             "androidboot.vbmeta.device_state",
-                             is_device_unlocked ? "unlocked" : "locked")) {
-    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-    goto out;
-  }
-
-  /* Set androidboot.vbmeta.{hash_alg, size, digest} - use same hash
-   * function as is used to sign vbmeta.
-   */
-  switch (algorithm_type) {
-    /* Explicit fallthrough. */
-    case AVB_ALGORITHM_TYPE_NONE:
-    case AVB_ALGORITHM_TYPE_SHA256_RSA2048:
-    case AVB_ALGORITHM_TYPE_SHA256_RSA4096:
-    case AVB_ALGORITHM_TYPE_SHA256_RSA8192: {
-      size_t n, total_size = 0;
-      uint8_t vbmeta_digest[AVB_SHA256_DIGEST_SIZE];
-      avb_slot_verify_data_calculate_vbmeta_digest(
-          slot_data, AVB_DIGEST_TYPE_SHA256, vbmeta_digest);
-      for (n = 0; n < slot_data->num_vbmeta_images; n++) {
-        total_size += slot_data->vbmeta_images[n].vbmeta_size;
-      }
-      if (!cmdline_append_option(
-              slot_data, "androidboot.vbmeta.hash_alg", "sha256") ||
-          !cmdline_append_uint64_base10(
-              slot_data, "androidboot.vbmeta.size", total_size) ||
-          !cmdline_append_hex(slot_data,
-                              "androidboot.vbmeta.digest",
-                              vbmeta_digest,
-                              AVB_SHA256_DIGEST_SIZE)) {
-        ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-        goto out;
-      }
-    } break;
-    /* Explicit fallthrough. */
-    case AVB_ALGORITHM_TYPE_SHA512_RSA2048:
-    case AVB_ALGORITHM_TYPE_SHA512_RSA4096:
-    case AVB_ALGORITHM_TYPE_SHA512_RSA8192: {
-      size_t n, total_size = 0;
-      uint8_t vbmeta_digest[AVB_SHA512_DIGEST_SIZE];
-      avb_slot_verify_data_calculate_vbmeta_digest(
-          slot_data, AVB_DIGEST_TYPE_SHA512, vbmeta_digest);
-      for (n = 0; n < slot_data->num_vbmeta_images; n++) {
-        total_size += slot_data->vbmeta_images[n].vbmeta_size;
-      }
-      if (!cmdline_append_option(
-              slot_data, "androidboot.vbmeta.hash_alg", "sha512") ||
-          !cmdline_append_uint64_base10(
-              slot_data, "androidboot.vbmeta.size", total_size) ||
-          !cmdline_append_hex(slot_data,
-                              "androidboot.vbmeta.digest",
-                              vbmeta_digest,
-                              AVB_SHA512_DIGEST_SIZE)) {
-        ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-        goto out;
-      }
-    } break;
-    case _AVB_ALGORITHM_NUM_TYPES:
-      avb_assert_not_reached();
-      break;
-  }
-
-  /* Set androidboot.veritymode and androidboot.vbmeta.invalidate_on_error */
-  if (toplevel_vbmeta->flags & AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED) {
-    verity_mode = "disabled";
-  } else {
-    const char* dm_verity_mode = NULL;
-    char* new_ret;
-
-    switch (hashtree_error_mode) {
-      case AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE:
-        if (!cmdline_append_option(
-                slot_data, "androidboot.vbmeta.invalidate_on_error", "yes")) {
-          ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-          goto out;
-        }
-        verity_mode = "enforcing";
-        dm_verity_mode = "restart_on_corruption";
-        break;
-      case AVB_HASHTREE_ERROR_MODE_RESTART:
-        verity_mode = "enforcing";
-        dm_verity_mode = "restart_on_corruption";
-        break;
-      case AVB_HASHTREE_ERROR_MODE_EIO:
-        verity_mode = "eio";
-        /* For now there's no option to specify the EIO mode. So
-         * just use 'ignore_zero_blocks' since that's already set
-         * and dm-verity-target.c supports specifying this multiple
-         * times.
-         */
-        dm_verity_mode = "ignore_zero_blocks";
-        break;
-      case AVB_HASHTREE_ERROR_MODE_LOGGING:
-        verity_mode = "logging";
-        dm_verity_mode = "ignore_corruption";
-        break;
-    }
-    new_ret = avb_replace(
-        slot_data->cmdline, "$(ANDROID_VERITY_MODE)", dm_verity_mode);
-    avb_free(slot_data->cmdline);
-    slot_data->cmdline = new_ret;
-    if (slot_data->cmdline == NULL) {
-      ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-      goto out;
-    }
-  }
-  if (!cmdline_append_option(
-          slot_data, "androidboot.veritymode", verity_mode)) {
-    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-    goto out;
-  }
-
-  ret = AVB_SLOT_VERIFY_RESULT_OK;
-
-out:
-
-  return ret;
-}
-
-AvbCmdlineSubstList* avb_new_cmdline_subst_list() {
-  return (AvbCmdlineSubstList*)avb_calloc(sizeof(AvbCmdlineSubstList));
-}
-
-void avb_free_cmdline_subst_list(AvbCmdlineSubstList* cmdline_subst) {
-  size_t i;
-  for (i = 0; i < cmdline_subst->size; ++i) {
-    avb_free(cmdline_subst->tokens[i]);
-    avb_free(cmdline_subst->values[i]);
-  }
-  cmdline_subst->size = 0;
-  avb_free(cmdline_subst);
-}
-
-AvbSlotVerifyResult avb_add_root_digest_substitution(
-    const char* part_name,
-    const uint8_t* digest,
-    size_t digest_size,
-    AvbCmdlineSubstList* out_cmdline_subst) {
-  const char* kDigestSubPrefix = "$(AVB_";
-  const char* kDigestSubSuffix = "_ROOT_DIGEST)";
-  size_t part_name_len = avb_strlen(part_name);
-  size_t list_index = out_cmdline_subst->size;
-
-  avb_assert(part_name_len < AVB_PART_NAME_MAX_SIZE);
-  avb_assert(digest_size <= AVB_SHA512_DIGEST_SIZE);
-  if (part_name_len >= AVB_PART_NAME_MAX_SIZE ||
-      digest_size > AVB_SHA512_DIGEST_SIZE) {
-    return AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-  }
-
-  if (out_cmdline_subst->size >= AVB_MAX_NUM_CMDLINE_SUBST) {
-    /* The list is full. Currently dynamic growth of this list is not supported.
-     */
-    return AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-  }
-
-  /* Construct the token to replace in the command line based on the partition
-   * name. For partition 'foo', this will be '$(AVB_FOO_ROOT_DIGEST)'.
-   */
-  out_cmdline_subst->tokens[list_index] =
-      avb_strdupv(kDigestSubPrefix, part_name, kDigestSubSuffix, NULL);
-  if (out_cmdline_subst->tokens[list_index] == NULL) {
-    goto fail;
-  }
-  avb_uppercase(out_cmdline_subst->tokens[list_index]);
-
-  /* The digest value is hex encoded when inserted in the command line. */
-  out_cmdline_subst->values[list_index] = avb_bin2hex(digest, digest_size);
-  if (out_cmdline_subst->values[list_index] == NULL) {
-    goto fail;
-  }
-
-  out_cmdline_subst->size++;
-  return AVB_SLOT_VERIFY_RESULT_OK;
-
-fail:
-  if (out_cmdline_subst->tokens[list_index]) {
-    avb_free(out_cmdline_subst->tokens[list_index]);
-  }
-  if (out_cmdline_subst->values[list_index]) {
-    avb_free(out_cmdline_subst->values[list_index]);
-  }
-  return AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-}
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_cmdline.h>
+#include <android_avb/avb_sha.h>
+#include <android_avb/avb_util.h>
+#include <android_avb/avb_version.h>
+
+#define NUM_GUIDS 3
+
+/* Substitutes all variables (e.g. $(ANDROID_SYSTEM_PARTUUID)) with
+ * values. Returns NULL on OOM, otherwise the cmdline with values
+ * replaced.
+ */
+char* avb_sub_cmdline(AvbOps* ops,
+                      const char* cmdline,
+                      const char* ab_suffix,
+                      bool using_boot_for_vbmeta,
+                      const AvbCmdlineSubstList* additional_substitutions) {
+  const char* part_name_str[NUM_GUIDS] = {"system", "boot", "vbmeta"};
+  const char* replace_str[NUM_GUIDS] = {"$(ANDROID_SYSTEM_PARTUUID)",
+                                        "$(ANDROID_BOOT_PARTUUID)",
+                                        "$(ANDROID_VBMETA_PARTUUID)"};
+  char* ret = NULL;
+  AvbIOResult io_ret;
+  size_t n;
+
+  /* Special-case for when the top-level vbmeta struct is in the boot
+   * partition.
+   */
+  if (using_boot_for_vbmeta) {
+    part_name_str[2] = "boot";
+  }
+
+  /* Replace unique partition GUIDs */
+  for (n = 0; n < NUM_GUIDS; n++) {
+    char part_name[AVB_PART_NAME_MAX_SIZE];
+    char guid_buf[37];
+
+    /* Don't attempt to query the partition guid unless its search string is
+     * present in the command line. Note: the original cmdline is used here,
+     * not the replaced one. See b/116010959.
+     */
+    if (avb_strstr(cmdline, replace_str[n]) == NULL) {
+      continue;
+    }
+
+    if (!avb_str_concat(part_name,
+                        sizeof part_name,
+                        part_name_str[n],
+                        avb_strlen(part_name_str[n]),
+                        ab_suffix,
+                        avb_strlen(ab_suffix))) {
+      avb_error("Partition name and suffix does not fit.\n");
+      goto fail;
+    }
+
+    io_ret = ops->get_unique_guid_for_partition(
+        ops, part_name, guid_buf, sizeof guid_buf);
+    if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+      goto fail;
+    } else if (io_ret != AVB_IO_RESULT_OK) {
+      avb_error("Error getting unique GUID for partition.\n");
+      goto fail;
+    }
+
+    if (ret == NULL) {
+      ret = avb_replace(cmdline, replace_str[n], guid_buf);
+    } else {
+      char* new_ret = avb_replace(ret, replace_str[n], guid_buf);
+      avb_free(ret);
+      ret = new_ret;
+    }
+    if (ret == NULL) {
+      goto fail;
+    }
+  }
+
+  /* It's possible there is no _PARTUUID for replacement above.
+   * Duplicate cmdline to ret for additional substitutions below.
+   */
+  if (ret == NULL) {
+    ret = avb_strdup(cmdline);
+    if (ret == NULL) {
+      goto fail;
+    }
+  }
+
+  /* Replace any additional substitutions. */
+  if (additional_substitutions != NULL) {
+    for (n = 0; n < additional_substitutions->size; ++n) {
+      char* new_ret = avb_replace(ret,
+                                  additional_substitutions->tokens[n],
+                                  additional_substitutions->values[n]);
+      avb_free(ret);
+      ret = new_ret;
+      if (ret == NULL) {
+        goto fail;
+      }
+    }
+  }
+
+  return ret;
+
+fail:
+  if (ret != NULL) {
+    avb_free(ret);
+  }
+  return NULL;
+}
+
+static int cmdline_append_option(AvbSlotVerifyData* slot_data,
+                                 const char* key,
+                                 const char* value) {
+  size_t offset, key_len, value_len;
+  char* new_cmdline;
+
+  key_len = avb_strlen(key);
+  value_len = avb_strlen(value);
+
+  offset = 0;
+  if (slot_data->cmdline != NULL) {
+    offset = avb_strlen(slot_data->cmdline);
+    if (offset > 0) {
+      offset += 1;
+    }
+  }
+
+  new_cmdline = avb_calloc(offset + key_len + value_len + 2);
+  if (new_cmdline == NULL) {
+    return 0;
+  }
+  if (offset > 0) {
+    avb_memcpy(new_cmdline, slot_data->cmdline, offset - 1);
+    new_cmdline[offset - 1] = ' ';
+  }
+  avb_memcpy(new_cmdline + offset, key, key_len);
+  new_cmdline[offset + key_len] = '=';
+  avb_memcpy(new_cmdline + offset + key_len + 1, value, value_len);
+  if (slot_data->cmdline != NULL) {
+    avb_free(slot_data->cmdline);
+  }
+  slot_data->cmdline = new_cmdline;
+
+  return 1;
+}
+
+#define AVB_MAX_DIGITS_UINT64 32
+
+/* Writes |value| to |digits| in base 10 followed by a NUL byte.
+ * Returns number of characters written excluding the NUL byte.
+ */
+static size_t uint64_to_base10(uint64_t value,
+                               char digits[AVB_MAX_DIGITS_UINT64]) {
+  char rev_digits[AVB_MAX_DIGITS_UINT64];
+  size_t n, num_digits;
+
+  for (num_digits = 0; num_digits < AVB_MAX_DIGITS_UINT64 - 1;) {
+    rev_digits[num_digits++] = avb_div_by_10(&value) + '0';
+    if (value == 0) {
+      break;
+    }
+  }
+
+  for (n = 0; n < num_digits; n++) {
+    digits[n] = rev_digits[num_digits - 1 - n];
+  }
+  digits[n] = '\0';
+  return n;
+}
+
+static int cmdline_append_version(AvbSlotVerifyData* slot_data,
+                                  const char* key,
+                                  uint64_t major_version,
+                                  uint64_t minor_version) {
+  char major_digits[AVB_MAX_DIGITS_UINT64];
+  char minor_digits[AVB_MAX_DIGITS_UINT64];
+  char combined[AVB_MAX_DIGITS_UINT64 * 2 + 1];
+  size_t num_major_digits, num_minor_digits;
+
+  num_major_digits = uint64_to_base10(major_version, major_digits);
+  num_minor_digits = uint64_to_base10(minor_version, minor_digits);
+  avb_memcpy(combined, major_digits, num_major_digits);
+  combined[num_major_digits] = '.';
+  avb_memcpy(combined + num_major_digits + 1, minor_digits, num_minor_digits);
+  combined[num_major_digits + 1 + num_minor_digits] = '\0';
+
+  return cmdline_append_option(slot_data, key, combined);
+}
+
+static int cmdline_append_uint64_base10(AvbSlotVerifyData* slot_data,
+                                        const char* key,
+                                        uint64_t value) {
+  char digits[AVB_MAX_DIGITS_UINT64];
+  uint64_to_base10(value, digits);
+  return cmdline_append_option(slot_data, key, digits);
+}
+
+static int cmdline_append_hex(AvbSlotVerifyData* slot_data,
+                              const char* key,
+                              const uint8_t* data,
+                              size_t data_len) {
+  int ret;
+  char* hex_data = avb_bin2hex(data, data_len);
+  if (hex_data == NULL) {
+    return 0;
+  }
+  ret = cmdline_append_option(slot_data, key, hex_data);
+  avb_free(hex_data);
+  return ret;
+}
+
+AvbSlotVerifyResult avb_append_options(
+    AvbOps* ops,
+    AvbSlotVerifyFlags flags,
+    AvbSlotVerifyData* slot_data,
+    AvbVBMetaImageHeader* toplevel_vbmeta,
+    AvbAlgorithmType algorithm_type,
+    AvbHashtreeErrorMode hashtree_error_mode,
+    AvbHashtreeErrorMode resolved_hashtree_error_mode) {
+  AvbSlotVerifyResult ret;
+  const char* verity_mode = NULL;
+  bool is_device_unlocked;
+  AvbIOResult io_ret;
+
+  /* Add androidboot.vbmeta.device option... except if not using a vbmeta
+   * partition since it doesn't make sense in that case.
+   */
+  if (!(flags & AVB_SLOT_VERIFY_FLAGS_NO_VBMETA_PARTITION)) {
+    if (!cmdline_append_option(slot_data,
+                               "androidboot.vbmeta.device",
+                               "PARTUUID=$(ANDROID_VBMETA_PARTUUID)")) {
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+      goto out;
+    }
+  }
+
+  /* Add androidboot.vbmeta.avb_version option. */
+  if (!cmdline_append_version(slot_data,
+                              "androidboot.vbmeta.avb_version",
+                              AVB_VERSION_MAJOR,
+                              AVB_VERSION_MINOR)) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto out;
+  }
+
+  /* Set androidboot.avb.device_state to "locked" or "unlocked". */
+  io_ret = ops->read_is_device_unlocked(ops, &is_device_unlocked);
+  if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto out;
+  } else if (io_ret != AVB_IO_RESULT_OK) {
+    avb_error("Error getting device state.\n");
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+    goto out;
+  }
+  if (!cmdline_append_option(slot_data,
+                             "androidboot.vbmeta.device_state",
+                             is_device_unlocked ? "unlocked" : "locked")) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto out;
+  }
+
+  /* Set androidboot.vbmeta.{hash_alg, size, digest} - use same hash
+   * function as is used to sign vbmeta.
+   */
+  switch (algorithm_type) {
+    /* Explicit fallthrough. */
+    case AVB_ALGORITHM_TYPE_NONE:
+    case AVB_ALGORITHM_TYPE_SHA256_RSA2048:
+    case AVB_ALGORITHM_TYPE_SHA256_RSA4096:
+    case AVB_ALGORITHM_TYPE_SHA256_RSA8192: {
+      size_t n, total_size = 0;
+      uint8_t vbmeta_digest[AVB_SHA256_DIGEST_SIZE];
+      avb_slot_verify_data_calculate_vbmeta_digest(
+          slot_data, AVB_DIGEST_TYPE_SHA256, vbmeta_digest);
+      for (n = 0; n < slot_data->num_vbmeta_images; n++) {
+        total_size += slot_data->vbmeta_images[n].vbmeta_size;
+      }
+      if (!cmdline_append_option(
+              slot_data, "androidboot.vbmeta.hash_alg", "sha256") ||
+          !cmdline_append_uint64_base10(
+              slot_data, "androidboot.vbmeta.size", total_size) ||
+          !cmdline_append_hex(slot_data,
+                              "androidboot.vbmeta.digest",
+                              vbmeta_digest,
+                              AVB_SHA256_DIGEST_SIZE)) {
+        ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+        goto out;
+      }
+    } break;
+    /* Explicit fallthrough. */
+    case AVB_ALGORITHM_TYPE_SHA512_RSA2048:
+    case AVB_ALGORITHM_TYPE_SHA512_RSA4096:
+    case AVB_ALGORITHM_TYPE_SHA512_RSA8192: {
+      size_t n, total_size = 0;
+      uint8_t vbmeta_digest[AVB_SHA512_DIGEST_SIZE];
+      avb_slot_verify_data_calculate_vbmeta_digest(
+          slot_data, AVB_DIGEST_TYPE_SHA512, vbmeta_digest);
+      for (n = 0; n < slot_data->num_vbmeta_images; n++) {
+        total_size += slot_data->vbmeta_images[n].vbmeta_size;
+      }
+      if (!cmdline_append_option(
+              slot_data, "androidboot.vbmeta.hash_alg", "sha512") ||
+          !cmdline_append_uint64_base10(
+              slot_data, "androidboot.vbmeta.size", total_size) ||
+          !cmdline_append_hex(slot_data,
+                              "androidboot.vbmeta.digest",
+                              vbmeta_digest,
+                              AVB_SHA512_DIGEST_SIZE)) {
+        ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+        goto out;
+      }
+    } break;
+    case _AVB_ALGORITHM_NUM_TYPES:
+      avb_assert_not_reached();
+      break;
+  }
+
+  /* Set androidboot.veritymode and androidboot.vbmeta.invalidate_on_error */
+  if (toplevel_vbmeta->flags & AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED) {
+    verity_mode = "disabled";
+  } else {
+    const char* dm_verity_mode = NULL;
+    char* new_ret;
+
+    switch (resolved_hashtree_error_mode) {
+      case AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE:
+        if (!cmdline_append_option(
+                slot_data, "androidboot.vbmeta.invalidate_on_error", "yes")) {
+          ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+          goto out;
+        }
+        verity_mode = "enforcing";
+        dm_verity_mode = "restart_on_corruption";
+        break;
+      case AVB_HASHTREE_ERROR_MODE_RESTART:
+        verity_mode = "enforcing";
+        dm_verity_mode = "restart_on_corruption";
+        break;
+      case AVB_HASHTREE_ERROR_MODE_EIO:
+        verity_mode = "eio";
+        /* For now there's no option to specify the EIO mode. So
+         * just use 'ignore_zero_blocks' since that's already set
+         * and dm-verity-target.c supports specifying this multiple
+         * times.
+         */
+        dm_verity_mode = "ignore_zero_blocks";
+        break;
+      case AVB_HASHTREE_ERROR_MODE_LOGGING:
+        verity_mode = "logging";
+        dm_verity_mode = "ignore_corruption";
+        break;
+      case AVB_HASHTREE_ERROR_MODE_MANAGED_RESTART_AND_EIO:
+        // Should never get here because MANAGED_RESTART_AND_EIO is
+        // remapped by avb_manage_hashtree_error_mode().
+        avb_assert_not_reached();
+        break;
+    }
+    new_ret = avb_replace(
+        slot_data->cmdline, "$(ANDROID_VERITY_MODE)", dm_verity_mode);
+    avb_free(slot_data->cmdline);
+    slot_data->cmdline = new_ret;
+    if (slot_data->cmdline == NULL) {
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+      goto out;
+    }
+  }
+  if (!cmdline_append_option(
+          slot_data, "androidboot.veritymode", verity_mode)) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto out;
+  }
+  if (hashtree_error_mode == AVB_HASHTREE_ERROR_MODE_MANAGED_RESTART_AND_EIO) {
+    if (!cmdline_append_option(
+            slot_data, "androidboot.veritymode.managed", "yes")) {
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+      goto out;
+    }
+  }
+
+  ret = AVB_SLOT_VERIFY_RESULT_OK;
+
+out:
+
+  return ret;
+}
+
+AvbCmdlineSubstList* avb_new_cmdline_subst_list() {
+  return (AvbCmdlineSubstList*)avb_calloc(sizeof(AvbCmdlineSubstList));
+}
+
+void avb_free_cmdline_subst_list(AvbCmdlineSubstList* cmdline_subst) {
+  size_t i;
+  for (i = 0; i < cmdline_subst->size; ++i) {
+    avb_free(cmdline_subst->tokens[i]);
+    avb_free(cmdline_subst->values[i]);
+  }
+  cmdline_subst->size = 0;
+  avb_free(cmdline_subst);
+}
+
+AvbSlotVerifyResult avb_add_root_digest_substitution(
+    const char* part_name,
+    const uint8_t* digest,
+    size_t digest_size,
+    AvbCmdlineSubstList* out_cmdline_subst) {
+  const char* kDigestSubPrefix = "$(AVB_";
+  const char* kDigestSubSuffix = "_ROOT_DIGEST)";
+  size_t part_name_len = avb_strlen(part_name);
+  size_t list_index = out_cmdline_subst->size;
+
+  avb_assert(part_name_len < AVB_PART_NAME_MAX_SIZE);
+  avb_assert(digest_size <= AVB_SHA512_DIGEST_SIZE);
+  if (part_name_len >= AVB_PART_NAME_MAX_SIZE ||
+      digest_size > AVB_SHA512_DIGEST_SIZE) {
+    return AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+  }
+
+  if (out_cmdline_subst->size >= AVB_MAX_NUM_CMDLINE_SUBST) {
+    /* The list is full. Currently dynamic growth of this list is not supported.
+     */
+    return AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+  }
+
+  /* Construct the token to replace in the command line based on the partition
+   * name. For partition 'foo', this will be '$(AVB_FOO_ROOT_DIGEST)'.
+   */
+  out_cmdline_subst->tokens[list_index] =
+      avb_strdupv(kDigestSubPrefix, part_name, kDigestSubSuffix, NULL);
+  if (out_cmdline_subst->tokens[list_index] == NULL) {
+    goto fail;
+  }
+  avb_uppercase(out_cmdline_subst->tokens[list_index]);
+
+  /* The digest value is hex encoded when inserted in the command line. */
+  out_cmdline_subst->values[list_index] = avb_bin2hex(digest, digest_size);
+  if (out_cmdline_subst->values[list_index] == NULL) {
+    goto fail;
+  }
+
+  out_cmdline_subst->size++;
+  return AVB_SLOT_VERIFY_RESULT_OK;
+
+fail:
+  if (out_cmdline_subst->tokens[list_index]) {
+    avb_free(out_cmdline_subst->tokens[list_index]);
+  }
+  if (out_cmdline_subst->values[list_index]) {
+    avb_free(out_cmdline_subst->values[list_index]);
+  }
+  return AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+}
diff --git a/lib/avb/libavb/avb_descriptor.c b/lib/avb/libavb/avb_descriptor.c
old mode 100755
new mode 100644
index c90b2d94fd..906e4a0b0e
--- a/lib/avb/libavb/avb_descriptor.c
+++ b/lib/avb/libavb/avb_descriptor.c
@@ -1,160 +1,167 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include <android_avb/avb_descriptor.h>
-#include <android_avb/avb_util.h>
-#include <android_avb/avb_vbmeta_image.h>
-
-bool avb_descriptor_validate_and_byteswap(const AvbDescriptor* src,
-                                          AvbDescriptor* dest) {
-  dest->tag = avb_be64toh(src->tag);
-  dest->num_bytes_following = avb_be64toh(src->num_bytes_following);
-
-  if ((dest->num_bytes_following & 0x07) != 0) {
-    avb_error("Descriptor size is not divisible by 8.\n");
-    return false;
-  }
-  return true;
-}
-
-bool avb_descriptor_foreach(const uint8_t* image_data,
-                            size_t image_size,
-                            AvbDescriptorForeachFunc foreach_func,
-                            void* user_data) {
-  const AvbVBMetaImageHeader* header = NULL;
-  bool ret = false;
-  const uint8_t* image_end;
-  const uint8_t* desc_start;
-  const uint8_t* desc_end;
-  const uint8_t* p;
-
-  if (image_data == NULL) {
-    avb_error("image_data is NULL\n.");
-    goto out;
-  }
-
-  if (foreach_func == NULL) {
-    avb_error("foreach_func is NULL\n.");
-    goto out;
-  }
-
-  if (image_size < sizeof(AvbVBMetaImageHeader)) {
-    avb_error("Length is smaller than header.\n");
-    goto out;
-  }
-
-  /* Ensure magic is correct. */
-  if (avb_memcmp(image_data, AVB_MAGIC, AVB_MAGIC_LEN) != 0) {
-    avb_error("Magic is incorrect.\n");
-    goto out;
-  }
-
-  /* Careful, not byteswapped - also ensure it's aligned properly. */
-  avb_assert_aligned(image_data);
-  header = (const AvbVBMetaImageHeader*)image_data;
-  image_end = image_data + image_size;
-
-  desc_start = image_data + sizeof(AvbVBMetaImageHeader) +
-               avb_be64toh(header->authentication_data_block_size) +
-               avb_be64toh(header->descriptors_offset);
-
-  desc_end = desc_start + avb_be64toh(header->descriptors_size);
-
-  if (desc_start < image_data || desc_start > image_end ||
-      desc_end < image_data || desc_end > image_end || desc_end < desc_start) {
-    avb_error("Descriptors not inside passed-in data.\n");
-    goto out;
-  }
-
-  for (p = desc_start; p < desc_end;) {
-    const AvbDescriptor* dh = (const AvbDescriptor*)p;
-    avb_assert_aligned(dh);
-    uint64_t nb_following = avb_be64toh(dh->num_bytes_following);
-    uint64_t nb_total = sizeof(AvbDescriptor) + nb_following;
-
-    if ((nb_total & 7) != 0) {
-      avb_error("Invalid descriptor length.\n");
-      goto out;
-    }
-
-    if (nb_total + p < desc_start || nb_total + p > desc_end) {
-      avb_error("Invalid data in descriptors array.\n");
-      goto out;
-    }
-
-    if (foreach_func(dh, user_data) == 0) {
-      goto out;
-    }
-
-    p += nb_total;
-  }
-
-  ret = true;
-
-out:
-  return ret;
-}
-
-static bool count_descriptors(const AvbDescriptor* descriptor,
-                              void* user_data) {
-  size_t* num_descriptors = user_data;
-  *num_descriptors += 1;
-  return true;
-}
-
-typedef struct {
-  size_t descriptor_number;
-  const AvbDescriptor** descriptors;
-} SetDescriptorData;
-
-static bool set_descriptors(const AvbDescriptor* descriptor, void* user_data) {
-  SetDescriptorData* data = user_data;
-  data->descriptors[data->descriptor_number++] = descriptor;
-  return true;
-}
-
-const AvbDescriptor** avb_descriptor_get_all(const uint8_t* image_data,
-                                             size_t image_size,
-                                             size_t* out_num_descriptors) {
-  size_t num_descriptors = 0;
-  SetDescriptorData data;
-
-  avb_descriptor_foreach(
-      image_data, image_size, count_descriptors, &num_descriptors);
-
-  data.descriptor_number = 0;
-  data.descriptors =
-      avb_calloc(sizeof(const AvbDescriptor*) * (num_descriptors + 1));
-  if (data.descriptors == NULL) {
-    return NULL;
-  }
-  avb_descriptor_foreach(image_data, image_size, set_descriptors, &data);
-  avb_assert(data.descriptor_number == num_descriptors);
-
-  if (out_num_descriptors != NULL) {
-    *out_num_descriptors = num_descriptors;
-  }
-
-  return data.descriptors;
-}
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_descriptor.h>
+#include <android_avb/avb_util.h>
+#include <android_avb/avb_vbmeta_image.h>
+
+bool avb_descriptor_validate_and_byteswap(const AvbDescriptor* src,
+                                          AvbDescriptor* dest) {
+  dest->tag = avb_be64toh(src->tag);
+  dest->num_bytes_following = avb_be64toh(src->num_bytes_following);
+
+  if ((dest->num_bytes_following & 0x07) != 0) {
+    avb_error("Descriptor size is not divisible by 8.\n");
+    return false;
+  }
+  return true;
+}
+
+bool avb_descriptor_foreach(const uint8_t* image_data,
+                            size_t image_size,
+                            AvbDescriptorForeachFunc foreach_func,
+                            void* user_data) {
+  const AvbVBMetaImageHeader* header = NULL;
+  bool ret = false;
+  const uint8_t* image_end;
+  const uint8_t* desc_start;
+  const uint8_t* desc_end;
+  const uint8_t* p;
+
+  if (image_data == NULL) {
+    avb_error("image_data is NULL\n.");
+    goto out;
+  }
+
+  if (foreach_func == NULL) {
+    avb_error("foreach_func is NULL\n.");
+    goto out;
+  }
+
+  if (image_size < sizeof(AvbVBMetaImageHeader)) {
+    avb_error("Length is smaller than header.\n");
+    goto out;
+  }
+
+  /* Ensure magic is correct. */
+  if (avb_memcmp(image_data, AVB_MAGIC, AVB_MAGIC_LEN) != 0) {
+    avb_error("Magic is incorrect.\n");
+    goto out;
+  }
+
+  /* Careful, not byteswapped - also ensure it's aligned properly. */
+  avb_assert_aligned(image_data);
+  header = (const AvbVBMetaImageHeader*)image_data;
+  image_end = image_data + image_size;
+
+  desc_start = image_data + sizeof(AvbVBMetaImageHeader) +
+               avb_be64toh(header->authentication_data_block_size) +
+               avb_be64toh(header->descriptors_offset);
+
+  desc_end = desc_start + avb_be64toh(header->descriptors_size);
+
+  if (desc_start < image_data || desc_start > image_end ||
+      desc_end < image_data || desc_end > image_end || desc_end < desc_start) {
+    avb_error("Descriptors not inside passed-in data.\n");
+    goto out;
+  }
+
+  for (p = desc_start; p < desc_end;) {
+    const AvbDescriptor* dh = (const AvbDescriptor*)p;
+    avb_assert_aligned(dh);
+    uint64_t nb_following = avb_be64toh(dh->num_bytes_following);
+    uint64_t nb_total = 0;
+    if (!avb_safe_add(&nb_total, sizeof(AvbDescriptor), nb_following)) {
+      avb_error("Invalid descriptor length.\n");
+      goto out;
+    }
+
+    if ((nb_total & 7) != 0) {
+      avb_error("Invalid descriptor length.\n");
+      goto out;
+    }
+
+    if (nb_total + p < desc_start || nb_total + p > desc_end) {
+      avb_error("Invalid data in descriptors array.\n");
+      goto out;
+    }
+
+    if (foreach_func(dh, user_data) == 0) {
+      goto out;
+    }
+
+    if (!avb_safe_add_to((uint64_t*)(&p), nb_total)) {
+      avb_error("Invalid descriptor length.\n");
+      goto out;
+    }
+  }
+
+  ret = true;
+
+out:
+  return ret;
+}
+
+static bool count_descriptors(const AvbDescriptor* descriptor,
+                              void* user_data) {
+  size_t* num_descriptors = user_data;
+  *num_descriptors += 1;
+  return true;
+}
+
+typedef struct {
+  size_t descriptor_number;
+  const AvbDescriptor** descriptors;
+} SetDescriptorData;
+
+static bool set_descriptors(const AvbDescriptor* descriptor, void* user_data) {
+  SetDescriptorData* data = user_data;
+  data->descriptors[data->descriptor_number++] = descriptor;
+  return true;
+}
+
+const AvbDescriptor** avb_descriptor_get_all(const uint8_t* image_data,
+                                             size_t image_size,
+                                             size_t* out_num_descriptors) {
+  size_t num_descriptors = 0;
+  SetDescriptorData data;
+
+  avb_descriptor_foreach(
+      image_data, image_size, count_descriptors, &num_descriptors);
+
+  data.descriptor_number = 0;
+  data.descriptors =
+      avb_calloc(sizeof(const AvbDescriptor*) * (num_descriptors + 1));
+  if (data.descriptors == NULL) {
+    return NULL;
+  }
+  avb_descriptor_foreach(image_data, image_size, set_descriptors, &data);
+  avb_assert(data.descriptor_number == num_descriptors);
+
+  if (out_num_descriptors != NULL) {
+    *out_num_descriptors = num_descriptors;
+  }
+
+  return data.descriptors;
+}
diff --git a/lib/avb/libavb/avb_sha256.c b/lib/avb/libavb/avb_sha256.c
old mode 100755
new mode 100644
index b567643f9b..6e1d58fe2a
--- a/lib/avb/libavb/avb_sha256.c
+++ b/lib/avb/libavb/avb_sha256.c
@@ -1,390 +1,402 @@
-/* SHA-256 and SHA-512 implementation based on code by Oliver Gay
- * <olivier.gay@a3.epfl.ch> under a BSD-style license. See below.
- */
-
-/*
- * FIPS 180-2 SHA-224/256/384/512 implementation
- * Last update: 02/02/2007
- * Issue date:  04/30/2005
- *
- * Copyright (C) 2005, 2007 Olivier Gay <olivier.gay@a3.epfl.ch>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the project nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE PROJECT AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE PROJECT OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <android_avb/avb_sha.h>
-
-#define SHFR(x, n) (x >> n)
-#define ROTR(x, n) ((x >> n) | (x << ((sizeof(x) << 3) - n)))
-#define ROTL(x, n) ((x << n) | (x >> ((sizeof(x) << 3) - n)))
-#define CH(x, y, z) ((x & y) ^ (~x & z))
-#define MAJ(x, y, z) ((x & y) ^ (x & z) ^ (y & z))
-
-#define SHA256_F1(x) (ROTR(x, 2) ^ ROTR(x, 13) ^ ROTR(x, 22))
-#define SHA256_F2(x) (ROTR(x, 6) ^ ROTR(x, 11) ^ ROTR(x, 25))
-#define SHA256_F3(x) (ROTR(x, 7) ^ ROTR(x, 18) ^ SHFR(x, 3))
-#define SHA256_F4(x) (ROTR(x, 17) ^ ROTR(x, 19) ^ SHFR(x, 10))
-
-#define UNPACK32(x, str)                 \
-  {                                      \
-    *((str) + 3) = (uint8_t)((x));       \
-    *((str) + 2) = (uint8_t)((x) >> 8);  \
-    *((str) + 1) = (uint8_t)((x) >> 16); \
-    *((str) + 0) = (uint8_t)((x) >> 24); \
-  }
-
-#define PACK32(str, x)                                                    \
-  {                                                                       \
-    *(x) = ((uint32_t) * ((str) + 3)) | ((uint32_t) * ((str) + 2) << 8) | \
-           ((uint32_t) * ((str) + 1) << 16) |                             \
-           ((uint32_t) * ((str) + 0) << 24);                              \
-  }
-
-/* Macros used for loops unrolling */
-
-#define SHA256_SCR(i) \
-  { w[i] = SHA256_F4(w[i - 2]) + w[i - 7] + SHA256_F3(w[i - 15]) + w[i - 16]; }
-
-#define SHA256_EXP(a, b, c, d, e, f, g, h, j)                               \
-  {                                                                         \
-    t1 = wv[h] + SHA256_F2(wv[e]) + CH(wv[e], wv[f], wv[g]) + sha256_k[j] + \
-         w[j];                                                              \
-    t2 = SHA256_F1(wv[a]) + MAJ(wv[a], wv[b], wv[c]);                       \
-    wv[d] += t1;                                                            \
-    wv[h] = t1 + t2;                                                        \
-  }
-
-static const uint32_t sha256_h0[8] = {0x6a09e667,
-                                      0xbb67ae85,
-                                      0x3c6ef372,
-                                      0xa54ff53a,
-                                      0x510e527f,
-                                      0x9b05688c,
-                                      0x1f83d9ab,
-                                      0x5be0cd19};
-
-static const uint32_t sha256_k[64] = {
-    0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5, 0x3956c25b, 0x59f111f1,
-    0x923f82a4, 0xab1c5ed5, 0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3,
-    0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174, 0xe49b69c1, 0xefbe4786,
-    0x0fc19dc6, 0x240ca1cc, 0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da,
-    0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7, 0xc6e00bf3, 0xd5a79147,
-    0x06ca6351, 0x14292967, 0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13,
-    0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85, 0xa2bfe8a1, 0xa81a664b,
-    0xc24b8b70, 0xc76c51a3, 0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070,
-    0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5, 0x391c0cb3, 0x4ed8aa4a,
-    0x5b9cca4f, 0x682e6ff3, 0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208,
-    0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2};
-
-/* SHA-256 implementation */
-void avb_sha256_init(AvbSHA256Ctx* ctx) {
-#ifndef UNROLL_LOOPS
-  int i;
-  for (i = 0; i < 8; i++) {
-    ctx->h[i] = sha256_h0[i];
-  }
-#else
-  ctx->h[0] = sha256_h0[0];
-  ctx->h[1] = sha256_h0[1];
-  ctx->h[2] = sha256_h0[2];
-  ctx->h[3] = sha256_h0[3];
-  ctx->h[4] = sha256_h0[4];
-  ctx->h[5] = sha256_h0[5];
-  ctx->h[6] = sha256_h0[6];
-  ctx->h[7] = sha256_h0[7];
-#endif /* !UNROLL_LOOPS */
-
-  ctx->len = 0;
-  ctx->tot_len = 0;
-}
-
-static void SHA256_transform(AvbSHA256Ctx* ctx,
-                             const uint8_t* message,
-                             unsigned int block_nb) {
-  uint32_t w[64];
-  uint32_t wv[8];
-  uint32_t t1, t2;
-  const unsigned char* sub_block;
-  int i;
-
-#ifndef UNROLL_LOOPS
-  int j;
-#endif
-
-  for (i = 0; i < (int)block_nb; i++) {
-    sub_block = message + (i << 6);
-
-#ifndef UNROLL_LOOPS
-    for (j = 0; j < 16; j++) {
-      PACK32(&sub_block[j << 2], &w[j]);
-    }
-
-    for (j = 16; j < 64; j++) {
-      SHA256_SCR(j);
-    }
-
-    for (j = 0; j < 8; j++) {
-      wv[j] = ctx->h[j];
-    }
-
-    for (j = 0; j < 64; j++) {
-      t1 = wv[7] + SHA256_F2(wv[4]) + CH(wv[4], wv[5], wv[6]) + sha256_k[j] +
-           w[j];
-      t2 = SHA256_F1(wv[0]) + MAJ(wv[0], wv[1], wv[2]);
-      wv[7] = wv[6];
-      wv[6] = wv[5];
-      wv[5] = wv[4];
-      wv[4] = wv[3] + t1;
-      wv[3] = wv[2];
-      wv[2] = wv[1];
-      wv[1] = wv[0];
-      wv[0] = t1 + t2;
-    }
-
-    for (j = 0; j < 8; j++) {
-      ctx->h[j] += wv[j];
-    }
-#else
-    PACK32(&sub_block[0], &w[0]);
-    PACK32(&sub_block[4], &w[1]);
-    PACK32(&sub_block[8], &w[2]);
-    PACK32(&sub_block[12], &w[3]);
-    PACK32(&sub_block[16], &w[4]);
-    PACK32(&sub_block[20], &w[5]);
-    PACK32(&sub_block[24], &w[6]);
-    PACK32(&sub_block[28], &w[7]);
-    PACK32(&sub_block[32], &w[8]);
-    PACK32(&sub_block[36], &w[9]);
-    PACK32(&sub_block[40], &w[10]);
-    PACK32(&sub_block[44], &w[11]);
-    PACK32(&sub_block[48], &w[12]);
-    PACK32(&sub_block[52], &w[13]);
-    PACK32(&sub_block[56], &w[14]);
-    PACK32(&sub_block[60], &w[15]);
-
-    SHA256_SCR(16);
-    SHA256_SCR(17);
-    SHA256_SCR(18);
-    SHA256_SCR(19);
-    SHA256_SCR(20);
-    SHA256_SCR(21);
-    SHA256_SCR(22);
-    SHA256_SCR(23);
-    SHA256_SCR(24);
-    SHA256_SCR(25);
-    SHA256_SCR(26);
-    SHA256_SCR(27);
-    SHA256_SCR(28);
-    SHA256_SCR(29);
-    SHA256_SCR(30);
-    SHA256_SCR(31);
-    SHA256_SCR(32);
-    SHA256_SCR(33);
-    SHA256_SCR(34);
-    SHA256_SCR(35);
-    SHA256_SCR(36);
-    SHA256_SCR(37);
-    SHA256_SCR(38);
-    SHA256_SCR(39);
-    SHA256_SCR(40);
-    SHA256_SCR(41);
-    SHA256_SCR(42);
-    SHA256_SCR(43);
-    SHA256_SCR(44);
-    SHA256_SCR(45);
-    SHA256_SCR(46);
-    SHA256_SCR(47);
-    SHA256_SCR(48);
-    SHA256_SCR(49);
-    SHA256_SCR(50);
-    SHA256_SCR(51);
-    SHA256_SCR(52);
-    SHA256_SCR(53);
-    SHA256_SCR(54);
-    SHA256_SCR(55);
-    SHA256_SCR(56);
-    SHA256_SCR(57);
-    SHA256_SCR(58);
-    SHA256_SCR(59);
-    SHA256_SCR(60);
-    SHA256_SCR(61);
-    SHA256_SCR(62);
-    SHA256_SCR(63);
-
-    wv[0] = ctx->h[0];
-    wv[1] = ctx->h[1];
-    wv[2] = ctx->h[2];
-    wv[3] = ctx->h[3];
-    wv[4] = ctx->h[4];
-    wv[5] = ctx->h[5];
-    wv[6] = ctx->h[6];
-    wv[7] = ctx->h[7];
-
-    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 0);
-    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 1);
-    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 2);
-    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 3);
-    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 4);
-    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 5);
-    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 6);
-    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 7);
-    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 8);
-    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 9);
-    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 10);
-    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 11);
-    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 12);
-    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 13);
-    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 14);
-    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 15);
-    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 16);
-    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 17);
-    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 18);
-    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 19);
-    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 20);
-    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 21);
-    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 22);
-    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 23);
-    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 24);
-    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 25);
-    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 26);
-    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 27);
-    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 28);
-    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 29);
-    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 30);
-    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 31);
-    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 32);
-    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 33);
-    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 34);
-    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 35);
-    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 36);
-    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 37);
-    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 38);
-    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 39);
-    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 40);
-    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 41);
-    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 42);
-    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 43);
-    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 44);
-    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 45);
-    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 46);
-    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 47);
-    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 48);
-    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 49);
-    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 50);
-    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 51);
-    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 52);
-    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 53);
-    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 54);
-    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 55);
-    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 56);
-    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 57);
-    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 58);
-    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 59);
-    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 60);
-    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 61);
-    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 62);
-    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 63);
-
-    ctx->h[0] += wv[0];
-    ctx->h[1] += wv[1];
-    ctx->h[2] += wv[2];
-    ctx->h[3] += wv[3];
-    ctx->h[4] += wv[4];
-    ctx->h[5] += wv[5];
-    ctx->h[6] += wv[6];
-    ctx->h[7] += wv[7];
-#endif /* !UNROLL_LOOPS */
-  }
-}
-
-void avb_sha256_update(AvbSHA256Ctx* ctx, const uint8_t* data, uint32_t len) {
-  unsigned int block_nb;
-  unsigned int new_len, rem_len, tmp_len;
-  const uint8_t* shifted_data;
-
-  tmp_len = AVB_SHA256_BLOCK_SIZE - ctx->len;
-  rem_len = len < tmp_len ? len : tmp_len;
-
-  avb_memcpy(&ctx->block[ctx->len], data, rem_len);
-
-  if (ctx->len + len < AVB_SHA256_BLOCK_SIZE) {
-    ctx->len += len;
-    return;
-  }
-
-  new_len = len - rem_len;
-  block_nb = new_len / AVB_SHA256_BLOCK_SIZE;
-
-  shifted_data = data + rem_len;
-
-  SHA256_transform(ctx, ctx->block, 1);
-  SHA256_transform(ctx, shifted_data, block_nb);
-
-  rem_len = new_len % AVB_SHA256_BLOCK_SIZE;
-
-  avb_memcpy(ctx->block, &shifted_data[block_nb << 6], rem_len);
-
-  ctx->len = rem_len;
-  ctx->tot_len += (block_nb + 1) << 6;
-}
-
-uint8_t* avb_sha256_final(AvbSHA256Ctx* ctx) {
-  unsigned int block_nb;
-  unsigned int pm_len;
-  unsigned int len_b;
-#ifndef UNROLL_LOOPS
-  int i;
-#endif
-
-  block_nb =
-      (1 + ((AVB_SHA256_BLOCK_SIZE - 9) < (ctx->len % AVB_SHA256_BLOCK_SIZE)));
-
-  len_b = (ctx->tot_len + ctx->len) << 3;
-  pm_len = block_nb << 6;
-
-  avb_memset(ctx->block + ctx->len, 0, pm_len - ctx->len);
-  ctx->block[ctx->len] = 0x80;
-  UNPACK32(len_b, ctx->block + pm_len - 4);
-
-  SHA256_transform(ctx, ctx->block, block_nb);
-
-#ifndef UNROLL_LOOPS
-  for (i = 0; i < 8; i++) {
-    UNPACK32(ctx->h[i], &ctx->buf[i << 2]);
-  }
-#else
-  UNPACK32(ctx->h[0], &ctx->buf[0]);
-  UNPACK32(ctx->h[1], &ctx->buf[4]);
-  UNPACK32(ctx->h[2], &ctx->buf[8]);
-  UNPACK32(ctx->h[3], &ctx->buf[12]);
-  UNPACK32(ctx->h[4], &ctx->buf[16]);
-  UNPACK32(ctx->h[5], &ctx->buf[20]);
-  UNPACK32(ctx->h[6], &ctx->buf[24]);
-  UNPACK32(ctx->h[7], &ctx->buf[28]);
-#endif /* !UNROLL_LOOPS */
-
-  return ctx->buf;
-}
+/* SHA-256 and SHA-512 implementation based on code by Oliver Gay
+ * <olivier.gay@a3.epfl.ch> under a BSD-style license. See below.
+ */
+
+/*
+ * FIPS 180-2 SHA-224/256/384/512 implementation
+ * Last update: 02/02/2007
+ * Issue date:  04/30/2005
+ *
+ * Copyright (C) 2005, 2007 Olivier Gay <olivier.gay@a3.epfl.ch>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the project nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE PROJECT AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE PROJECT OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <android_avb/avb_sha.h>
+
+#define SHFR(x, n) (x >> n)
+#define ROTR(x, n) ((x >> n) | (x << ((sizeof(x) << 3) - n)))
+#define ROTL(x, n) ((x << n) | (x >> ((sizeof(x) << 3) - n)))
+#define CH(x, y, z) ((x & y) ^ (~x & z))
+#define MAJ(x, y, z) ((x & y) ^ (x & z) ^ (y & z))
+
+#define SHA256_F1(x) (ROTR(x, 2) ^ ROTR(x, 13) ^ ROTR(x, 22))
+#define SHA256_F2(x) (ROTR(x, 6) ^ ROTR(x, 11) ^ ROTR(x, 25))
+#define SHA256_F3(x) (ROTR(x, 7) ^ ROTR(x, 18) ^ SHFR(x, 3))
+#define SHA256_F4(x) (ROTR(x, 17) ^ ROTR(x, 19) ^ SHFR(x, 10))
+
+#define UNPACK32(x, str)                 \
+  {                                      \
+    *((str) + 3) = (uint8_t)((x));       \
+    *((str) + 2) = (uint8_t)((x) >> 8);  \
+    *((str) + 1) = (uint8_t)((x) >> 16); \
+    *((str) + 0) = (uint8_t)((x) >> 24); \
+  }
+
+#define UNPACK64(x, str)                         \
+  {                                              \
+    *((str) + 7) = (uint8_t)x;                   \
+    *((str) + 6) = (uint8_t)((uint64_t)x >> 8);  \
+    *((str) + 5) = (uint8_t)((uint64_t)x >> 16); \
+    *((str) + 4) = (uint8_t)((uint64_t)x >> 24); \
+    *((str) + 3) = (uint8_t)((uint64_t)x >> 32); \
+    *((str) + 2) = (uint8_t)((uint64_t)x >> 40); \
+    *((str) + 1) = (uint8_t)((uint64_t)x >> 48); \
+    *((str) + 0) = (uint8_t)((uint64_t)x >> 56); \
+  }
+
+#define PACK32(str, x)                                                    \
+  {                                                                       \
+    *(x) = ((uint32_t) * ((str) + 3)) | ((uint32_t) * ((str) + 2) << 8) | \
+           ((uint32_t) * ((str) + 1) << 16) |                             \
+           ((uint32_t) * ((str) + 0) << 24);                              \
+  }
+
+/* Macros used for loops unrolling */
+
+#define SHA256_SCR(i) \
+  { w[i] = SHA256_F4(w[i - 2]) + w[i - 7] + SHA256_F3(w[i - 15]) + w[i - 16]; }
+
+#define SHA256_EXP(a, b, c, d, e, f, g, h, j)                               \
+  {                                                                         \
+    t1 = wv[h] + SHA256_F2(wv[e]) + CH(wv[e], wv[f], wv[g]) + sha256_k[j] + \
+         w[j];                                                              \
+    t2 = SHA256_F1(wv[a]) + MAJ(wv[a], wv[b], wv[c]);                       \
+    wv[d] += t1;                                                            \
+    wv[h] = t1 + t2;                                                        \
+  }
+
+static const uint32_t sha256_h0[8] = {0x6a09e667,
+                                      0xbb67ae85,
+                                      0x3c6ef372,
+                                      0xa54ff53a,
+                                      0x510e527f,
+                                      0x9b05688c,
+                                      0x1f83d9ab,
+                                      0x5be0cd19};
+
+static const uint32_t sha256_k[64] = {
+    0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5, 0x3956c25b, 0x59f111f1,
+    0x923f82a4, 0xab1c5ed5, 0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3,
+    0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174, 0xe49b69c1, 0xefbe4786,
+    0x0fc19dc6, 0x240ca1cc, 0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da,
+    0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7, 0xc6e00bf3, 0xd5a79147,
+    0x06ca6351, 0x14292967, 0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13,
+    0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85, 0xa2bfe8a1, 0xa81a664b,
+    0xc24b8b70, 0xc76c51a3, 0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070,
+    0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5, 0x391c0cb3, 0x4ed8aa4a,
+    0x5b9cca4f, 0x682e6ff3, 0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208,
+    0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2};
+
+/* SHA-256 implementation */
+void avb_sha256_init(AvbSHA256Ctx* ctx) {
+#ifndef UNROLL_LOOPS
+  int i;
+  for (i = 0; i < 8; i++) {
+    ctx->h[i] = sha256_h0[i];
+  }
+#else
+  ctx->h[0] = sha256_h0[0];
+  ctx->h[1] = sha256_h0[1];
+  ctx->h[2] = sha256_h0[2];
+  ctx->h[3] = sha256_h0[3];
+  ctx->h[4] = sha256_h0[4];
+  ctx->h[5] = sha256_h0[5];
+  ctx->h[6] = sha256_h0[6];
+  ctx->h[7] = sha256_h0[7];
+#endif /* !UNROLL_LOOPS */
+
+  ctx->len = 0;
+  ctx->tot_len = 0;
+}
+
+static void SHA256_transform(AvbSHA256Ctx* ctx,
+                             const uint8_t* message,
+                             size_t block_nb) {
+  uint32_t w[64];
+  uint32_t wv[8];
+  uint32_t t1, t2;
+  const unsigned char* sub_block;
+  size_t i;
+
+#ifndef UNROLL_LOOPS
+  size_t j;
+#endif
+
+  for (i = 0; i < block_nb; i++) {
+    sub_block = message + (i << 6);
+
+#ifndef UNROLL_LOOPS
+    for (j = 0; j < 16; j++) {
+      PACK32(&sub_block[j << 2], &w[j]);
+    }
+
+    for (j = 16; j < 64; j++) {
+      SHA256_SCR(j);
+    }
+
+    for (j = 0; j < 8; j++) {
+      wv[j] = ctx->h[j];
+    }
+
+    for (j = 0; j < 64; j++) {
+      t1 = wv[7] + SHA256_F2(wv[4]) + CH(wv[4], wv[5], wv[6]) + sha256_k[j] +
+           w[j];
+      t2 = SHA256_F1(wv[0]) + MAJ(wv[0], wv[1], wv[2]);
+      wv[7] = wv[6];
+      wv[6] = wv[5];
+      wv[5] = wv[4];
+      wv[4] = wv[3] + t1;
+      wv[3] = wv[2];
+      wv[2] = wv[1];
+      wv[1] = wv[0];
+      wv[0] = t1 + t2;
+    }
+
+    for (j = 0; j < 8; j++) {
+      ctx->h[j] += wv[j];
+    }
+#else
+    PACK32(&sub_block[0], &w[0]);
+    PACK32(&sub_block[4], &w[1]);
+    PACK32(&sub_block[8], &w[2]);
+    PACK32(&sub_block[12], &w[3]);
+    PACK32(&sub_block[16], &w[4]);
+    PACK32(&sub_block[20], &w[5]);
+    PACK32(&sub_block[24], &w[6]);
+    PACK32(&sub_block[28], &w[7]);
+    PACK32(&sub_block[32], &w[8]);
+    PACK32(&sub_block[36], &w[9]);
+    PACK32(&sub_block[40], &w[10]);
+    PACK32(&sub_block[44], &w[11]);
+    PACK32(&sub_block[48], &w[12]);
+    PACK32(&sub_block[52], &w[13]);
+    PACK32(&sub_block[56], &w[14]);
+    PACK32(&sub_block[60], &w[15]);
+
+    SHA256_SCR(16);
+    SHA256_SCR(17);
+    SHA256_SCR(18);
+    SHA256_SCR(19);
+    SHA256_SCR(20);
+    SHA256_SCR(21);
+    SHA256_SCR(22);
+    SHA256_SCR(23);
+    SHA256_SCR(24);
+    SHA256_SCR(25);
+    SHA256_SCR(26);
+    SHA256_SCR(27);
+    SHA256_SCR(28);
+    SHA256_SCR(29);
+    SHA256_SCR(30);
+    SHA256_SCR(31);
+    SHA256_SCR(32);
+    SHA256_SCR(33);
+    SHA256_SCR(34);
+    SHA256_SCR(35);
+    SHA256_SCR(36);
+    SHA256_SCR(37);
+    SHA256_SCR(38);
+    SHA256_SCR(39);
+    SHA256_SCR(40);
+    SHA256_SCR(41);
+    SHA256_SCR(42);
+    SHA256_SCR(43);
+    SHA256_SCR(44);
+    SHA256_SCR(45);
+    SHA256_SCR(46);
+    SHA256_SCR(47);
+    SHA256_SCR(48);
+    SHA256_SCR(49);
+    SHA256_SCR(50);
+    SHA256_SCR(51);
+    SHA256_SCR(52);
+    SHA256_SCR(53);
+    SHA256_SCR(54);
+    SHA256_SCR(55);
+    SHA256_SCR(56);
+    SHA256_SCR(57);
+    SHA256_SCR(58);
+    SHA256_SCR(59);
+    SHA256_SCR(60);
+    SHA256_SCR(61);
+    SHA256_SCR(62);
+    SHA256_SCR(63);
+
+    wv[0] = ctx->h[0];
+    wv[1] = ctx->h[1];
+    wv[2] = ctx->h[2];
+    wv[3] = ctx->h[3];
+    wv[4] = ctx->h[4];
+    wv[5] = ctx->h[5];
+    wv[6] = ctx->h[6];
+    wv[7] = ctx->h[7];
+
+    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 0);
+    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 1);
+    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 2);
+    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 3);
+    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 4);
+    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 5);
+    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 6);
+    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 7);
+    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 8);
+    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 9);
+    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 10);
+    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 11);
+    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 12);
+    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 13);
+    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 14);
+    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 15);
+    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 16);
+    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 17);
+    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 18);
+    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 19);
+    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 20);
+    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 21);
+    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 22);
+    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 23);
+    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 24);
+    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 25);
+    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 26);
+    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 27);
+    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 28);
+    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 29);
+    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 30);
+    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 31);
+    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 32);
+    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 33);
+    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 34);
+    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 35);
+    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 36);
+    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 37);
+    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 38);
+    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 39);
+    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 40);
+    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 41);
+    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 42);
+    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 43);
+    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 44);
+    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 45);
+    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 46);
+    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 47);
+    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 48);
+    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 49);
+    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 50);
+    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 51);
+    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 52);
+    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 53);
+    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 54);
+    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 55);
+    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 56);
+    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 57);
+    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 58);
+    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 59);
+    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 60);
+    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 61);
+    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 62);
+    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 63);
+
+    ctx->h[0] += wv[0];
+    ctx->h[1] += wv[1];
+    ctx->h[2] += wv[2];
+    ctx->h[3] += wv[3];
+    ctx->h[4] += wv[4];
+    ctx->h[5] += wv[5];
+    ctx->h[6] += wv[6];
+    ctx->h[7] += wv[7];
+#endif /* !UNROLL_LOOPS */
+  }
+}
+
+void avb_sha256_update(AvbSHA256Ctx* ctx, const uint8_t* data, size_t len) {
+  size_t block_nb;
+  size_t new_len, rem_len, tmp_len;
+  const uint8_t* shifted_data;
+
+  tmp_len = AVB_SHA256_BLOCK_SIZE - ctx->len;
+  rem_len = len < tmp_len ? len : tmp_len;
+
+  avb_memcpy(&ctx->block[ctx->len], data, rem_len);
+
+  if (ctx->len + len < AVB_SHA256_BLOCK_SIZE) {
+    ctx->len += len;
+    return;
+  }
+
+  new_len = len - rem_len;
+  block_nb = new_len / AVB_SHA256_BLOCK_SIZE;
+
+  shifted_data = data + rem_len;
+
+  SHA256_transform(ctx, ctx->block, 1);
+  SHA256_transform(ctx, shifted_data, block_nb);
+
+  rem_len = new_len % AVB_SHA256_BLOCK_SIZE;
+
+  avb_memcpy(ctx->block, &shifted_data[block_nb << 6], rem_len);
+
+  ctx->len = rem_len;
+  ctx->tot_len += (block_nb + 1) << 6;
+}
+
+uint8_t* avb_sha256_final(AvbSHA256Ctx* ctx) {
+  size_t block_nb;
+  size_t pm_len;
+  uint64_t len_b;
+#ifndef UNROLL_LOOPS
+  size_t i;
+#endif
+
+  block_nb =
+      (1 + ((AVB_SHA256_BLOCK_SIZE - 9) < (ctx->len % AVB_SHA256_BLOCK_SIZE)));
+
+  len_b = (ctx->tot_len + ctx->len) << 3;
+  pm_len = block_nb << 6;
+
+  avb_memset(ctx->block + ctx->len, 0, pm_len - ctx->len);
+  ctx->block[ctx->len] = 0x80;
+  UNPACK64(len_b, ctx->block + pm_len - 8);
+
+  SHA256_transform(ctx, ctx->block, block_nb);
+
+#ifndef UNROLL_LOOPS
+  for (i = 0; i < 8; i++) {
+    UNPACK32(ctx->h[i], &ctx->buf[i << 2]);
+  }
+#else
+  UNPACK32(ctx->h[0], &ctx->buf[0]);
+  UNPACK32(ctx->h[1], &ctx->buf[4]);
+  UNPACK32(ctx->h[2], &ctx->buf[8]);
+  UNPACK32(ctx->h[3], &ctx->buf[12]);
+  UNPACK32(ctx->h[4], &ctx->buf[16]);
+  UNPACK32(ctx->h[5], &ctx->buf[20]);
+  UNPACK32(ctx->h[6], &ctx->buf[24]);
+  UNPACK32(ctx->h[7], &ctx->buf[28]);
+#endif /* !UNROLL_LOOPS */
+
+  return ctx->buf;
+}
diff --git a/lib/avb/libavb/avb_sha512.c b/lib/avb/libavb/avb_sha512.c
old mode 100755
new mode 100644
index 020e9c9019..724781cc7f
--- a/lib/avb/libavb/avb_sha512.c
+++ b/lib/avb/libavb/avb_sha512.c
@@ -1,388 +1,388 @@
-/* SHA-256 and SHA-512 implementation based on code by Oliver Gay
- * <olivier.gay@a3.epfl.ch> under a BSD-style license. See below.
- */
-
-/*
- * FIPS 180-2 SHA-224/256/384/512 implementation
- * Last update: 02/02/2007
- * Issue date:  04/30/2005
- *
- * Copyright (C) 2005, 2007 Olivier Gay <olivier.gay@a3.epfl.ch>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the project nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE PROJECT AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE PROJECT OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <android_avb/avb_sha.h>
-
-#define SHFR(x, n) (x >> n)
-#define ROTR(x, n) ((x >> n) | (x << ((sizeof(x) << 3) - n)))
-#define ROTL(x, n) ((x << n) | (x >> ((sizeof(x) << 3) - n)))
-#define CH(x, y, z) ((x & y) ^ (~x & z))
-#define MAJ(x, y, z) ((x & y) ^ (x & z) ^ (y & z))
-
-#define SHA512_F1(x) (ROTR(x, 28) ^ ROTR(x, 34) ^ ROTR(x, 39))
-#define SHA512_F2(x) (ROTR(x, 14) ^ ROTR(x, 18) ^ ROTR(x, 41))
-#define SHA512_F3(x) (ROTR(x, 1) ^ ROTR(x, 8) ^ SHFR(x, 7))
-#define SHA512_F4(x) (ROTR(x, 19) ^ ROTR(x, 61) ^ SHFR(x, 6))
-
-#define UNPACK32(x, str)                 \
-  {                                      \
-    *((str) + 3) = (uint8_t)((x));       \
-    *((str) + 2) = (uint8_t)((x) >> 8);  \
-    *((str) + 1) = (uint8_t)((x) >> 16); \
-    *((str) + 0) = (uint8_t)((x) >> 24); \
-  }
-
-#define UNPACK64(x, str)                         \
-  {                                              \
-    *((str) + 7) = (uint8_t)x;                   \
-    *((str) + 6) = (uint8_t)((uint64_t)x >> 8);  \
-    *((str) + 5) = (uint8_t)((uint64_t)x >> 16); \
-    *((str) + 4) = (uint8_t)((uint64_t)x >> 24); \
-    *((str) + 3) = (uint8_t)((uint64_t)x >> 32); \
-    *((str) + 2) = (uint8_t)((uint64_t)x >> 40); \
-    *((str) + 1) = (uint8_t)((uint64_t)x >> 48); \
-    *((str) + 0) = (uint8_t)((uint64_t)x >> 56); \
-  }
-
-#define PACK64(str, x)                                                        \
-  {                                                                           \
-    *(x) =                                                                    \
-        ((uint64_t) * ((str) + 7)) | ((uint64_t) * ((str) + 6) << 8) |        \
-        ((uint64_t) * ((str) + 5) << 16) | ((uint64_t) * ((str) + 4) << 24) | \
-        ((uint64_t) * ((str) + 3) << 32) | ((uint64_t) * ((str) + 2) << 40) | \
-        ((uint64_t) * ((str) + 1) << 48) | ((uint64_t) * ((str) + 0) << 56);  \
-  }
-
-/* Macros used for loops unrolling */
-
-#define SHA512_SCR(i) \
-  { w[i] = SHA512_F4(w[i - 2]) + w[i - 7] + SHA512_F3(w[i - 15]) + w[i - 16]; }
-
-#define SHA512_EXP(a, b, c, d, e, f, g, h, j)                               \
-  {                                                                         \
-    t1 = wv[h] + SHA512_F2(wv[e]) + CH(wv[e], wv[f], wv[g]) + sha512_k[j] + \
-         w[j];                                                              \
-    t2 = SHA512_F1(wv[a]) + MAJ(wv[a], wv[b], wv[c]);                       \
-    wv[d] += t1;                                                            \
-    wv[h] = t1 + t2;                                                        \
-  }
-
-static const uint64_t sha512_h0[8] = {0x6a09e667f3bcc908ULL,
-                                      0xbb67ae8584caa73bULL,
-                                      0x3c6ef372fe94f82bULL,
-                                      0xa54ff53a5f1d36f1ULL,
-                                      0x510e527fade682d1ULL,
-                                      0x9b05688c2b3e6c1fULL,
-                                      0x1f83d9abfb41bd6bULL,
-                                      0x5be0cd19137e2179ULL};
-
-static const uint64_t sha512_k[80] = {
-    0x428a2f98d728ae22ULL, 0x7137449123ef65cdULL, 0xb5c0fbcfec4d3b2fULL,
-    0xe9b5dba58189dbbcULL, 0x3956c25bf348b538ULL, 0x59f111f1b605d019ULL,
-    0x923f82a4af194f9bULL, 0xab1c5ed5da6d8118ULL, 0xd807aa98a3030242ULL,
-    0x12835b0145706fbeULL, 0x243185be4ee4b28cULL, 0x550c7dc3d5ffb4e2ULL,
-    0x72be5d74f27b896fULL, 0x80deb1fe3b1696b1ULL, 0x9bdc06a725c71235ULL,
-    0xc19bf174cf692694ULL, 0xe49b69c19ef14ad2ULL, 0xefbe4786384f25e3ULL,
-    0x0fc19dc68b8cd5b5ULL, 0x240ca1cc77ac9c65ULL, 0x2de92c6f592b0275ULL,
-    0x4a7484aa6ea6e483ULL, 0x5cb0a9dcbd41fbd4ULL, 0x76f988da831153b5ULL,
-    0x983e5152ee66dfabULL, 0xa831c66d2db43210ULL, 0xb00327c898fb213fULL,
-    0xbf597fc7beef0ee4ULL, 0xc6e00bf33da88fc2ULL, 0xd5a79147930aa725ULL,
-    0x06ca6351e003826fULL, 0x142929670a0e6e70ULL, 0x27b70a8546d22ffcULL,
-    0x2e1b21385c26c926ULL, 0x4d2c6dfc5ac42aedULL, 0x53380d139d95b3dfULL,
-    0x650a73548baf63deULL, 0x766a0abb3c77b2a8ULL, 0x81c2c92e47edaee6ULL,
-    0x92722c851482353bULL, 0xa2bfe8a14cf10364ULL, 0xa81a664bbc423001ULL,
-    0xc24b8b70d0f89791ULL, 0xc76c51a30654be30ULL, 0xd192e819d6ef5218ULL,
-    0xd69906245565a910ULL, 0xf40e35855771202aULL, 0x106aa07032bbd1b8ULL,
-    0x19a4c116b8d2d0c8ULL, 0x1e376c085141ab53ULL, 0x2748774cdf8eeb99ULL,
-    0x34b0bcb5e19b48a8ULL, 0x391c0cb3c5c95a63ULL, 0x4ed8aa4ae3418acbULL,
-    0x5b9cca4f7763e373ULL, 0x682e6ff3d6b2b8a3ULL, 0x748f82ee5defb2fcULL,
-    0x78a5636f43172f60ULL, 0x84c87814a1f0ab72ULL, 0x8cc702081a6439ecULL,
-    0x90befffa23631e28ULL, 0xa4506cebde82bde9ULL, 0xbef9a3f7b2c67915ULL,
-    0xc67178f2e372532bULL, 0xca273eceea26619cULL, 0xd186b8c721c0c207ULL,
-    0xeada7dd6cde0eb1eULL, 0xf57d4f7fee6ed178ULL, 0x06f067aa72176fbaULL,
-    0x0a637dc5a2c898a6ULL, 0x113f9804bef90daeULL, 0x1b710b35131c471bULL,
-    0x28db77f523047d84ULL, 0x32caab7b40c72493ULL, 0x3c9ebe0a15c9bebcULL,
-    0x431d67c49c100d4cULL, 0x4cc5d4becb3e42b6ULL, 0x597f299cfc657e2aULL,
-    0x5fcb6fab3ad6faecULL, 0x6c44198c4a475817ULL};
-
-/* SHA-512 implementation */
-
-void avb_sha512_init(AvbSHA512Ctx* ctx) {
-#ifdef UNROLL_LOOPS_SHA512
-  ctx->h[0] = sha512_h0[0];
-  ctx->h[1] = sha512_h0[1];
-  ctx->h[2] = sha512_h0[2];
-  ctx->h[3] = sha512_h0[3];
-  ctx->h[4] = sha512_h0[4];
-  ctx->h[5] = sha512_h0[5];
-  ctx->h[6] = sha512_h0[6];
-  ctx->h[7] = sha512_h0[7];
-#else
-  int i;
-
-  for (i = 0; i < 8; i++)
-    ctx->h[i] = sha512_h0[i];
-#endif /* UNROLL_LOOPS_SHA512 */
-
-  ctx->len = 0;
-  ctx->tot_len = 0;
-}
-
-static void SHA512_transform(AvbSHA512Ctx* ctx,
-                             const uint8_t* message,
-                             unsigned int block_nb) {
-  uint64_t w[80];
-  uint64_t wv[8];
-  uint64_t t1, t2;
-  const uint8_t* sub_block;
-  int i, j;
-
-  for (i = 0; i < (int)block_nb; i++) {
-    sub_block = message + (i << 7);
-
-#ifdef UNROLL_LOOPS_SHA512
-    PACK64(&sub_block[0], &w[0]);
-    PACK64(&sub_block[8], &w[1]);
-    PACK64(&sub_block[16], &w[2]);
-    PACK64(&sub_block[24], &w[3]);
-    PACK64(&sub_block[32], &w[4]);
-    PACK64(&sub_block[40], &w[5]);
-    PACK64(&sub_block[48], &w[6]);
-    PACK64(&sub_block[56], &w[7]);
-    PACK64(&sub_block[64], &w[8]);
-    PACK64(&sub_block[72], &w[9]);
-    PACK64(&sub_block[80], &w[10]);
-    PACK64(&sub_block[88], &w[11]);
-    PACK64(&sub_block[96], &w[12]);
-    PACK64(&sub_block[104], &w[13]);
-    PACK64(&sub_block[112], &w[14]);
-    PACK64(&sub_block[120], &w[15]);
-
-    SHA512_SCR(16);
-    SHA512_SCR(17);
-    SHA512_SCR(18);
-    SHA512_SCR(19);
-    SHA512_SCR(20);
-    SHA512_SCR(21);
-    SHA512_SCR(22);
-    SHA512_SCR(23);
-    SHA512_SCR(24);
-    SHA512_SCR(25);
-    SHA512_SCR(26);
-    SHA512_SCR(27);
-    SHA512_SCR(28);
-    SHA512_SCR(29);
-    SHA512_SCR(30);
-    SHA512_SCR(31);
-    SHA512_SCR(32);
-    SHA512_SCR(33);
-    SHA512_SCR(34);
-    SHA512_SCR(35);
-    SHA512_SCR(36);
-    SHA512_SCR(37);
-    SHA512_SCR(38);
-    SHA512_SCR(39);
-    SHA512_SCR(40);
-    SHA512_SCR(41);
-    SHA512_SCR(42);
-    SHA512_SCR(43);
-    SHA512_SCR(44);
-    SHA512_SCR(45);
-    SHA512_SCR(46);
-    SHA512_SCR(47);
-    SHA512_SCR(48);
-    SHA512_SCR(49);
-    SHA512_SCR(50);
-    SHA512_SCR(51);
-    SHA512_SCR(52);
-    SHA512_SCR(53);
-    SHA512_SCR(54);
-    SHA512_SCR(55);
-    SHA512_SCR(56);
-    SHA512_SCR(57);
-    SHA512_SCR(58);
-    SHA512_SCR(59);
-    SHA512_SCR(60);
-    SHA512_SCR(61);
-    SHA512_SCR(62);
-    SHA512_SCR(63);
-    SHA512_SCR(64);
-    SHA512_SCR(65);
-    SHA512_SCR(66);
-    SHA512_SCR(67);
-    SHA512_SCR(68);
-    SHA512_SCR(69);
-    SHA512_SCR(70);
-    SHA512_SCR(71);
-    SHA512_SCR(72);
-    SHA512_SCR(73);
-    SHA512_SCR(74);
-    SHA512_SCR(75);
-    SHA512_SCR(76);
-    SHA512_SCR(77);
-    SHA512_SCR(78);
-    SHA512_SCR(79);
-
-    wv[0] = ctx->h[0];
-    wv[1] = ctx->h[1];
-    wv[2] = ctx->h[2];
-    wv[3] = ctx->h[3];
-    wv[4] = ctx->h[4];
-    wv[5] = ctx->h[5];
-    wv[6] = ctx->h[6];
-    wv[7] = ctx->h[7];
-
-    j = 0;
-
-    do {
-      SHA512_EXP(0, 1, 2, 3, 4, 5, 6, 7, j);
-      j++;
-      SHA512_EXP(7, 0, 1, 2, 3, 4, 5, 6, j);
-      j++;
-      SHA512_EXP(6, 7, 0, 1, 2, 3, 4, 5, j);
-      j++;
-      SHA512_EXP(5, 6, 7, 0, 1, 2, 3, 4, j);
-      j++;
-      SHA512_EXP(4, 5, 6, 7, 0, 1, 2, 3, j);
-      j++;
-      SHA512_EXP(3, 4, 5, 6, 7, 0, 1, 2, j);
-      j++;
-      SHA512_EXP(2, 3, 4, 5, 6, 7, 0, 1, j);
-      j++;
-      SHA512_EXP(1, 2, 3, 4, 5, 6, 7, 0, j);
-      j++;
-    } while (j < 80);
-
-    ctx->h[0] += wv[0];
-    ctx->h[1] += wv[1];
-    ctx->h[2] += wv[2];
-    ctx->h[3] += wv[3];
-    ctx->h[4] += wv[4];
-    ctx->h[5] += wv[5];
-    ctx->h[6] += wv[6];
-    ctx->h[7] += wv[7];
-#else
-    for (j = 0; j < 16; j++) {
-      PACK64(&sub_block[j << 3], &w[j]);
-    }
-
-    for (j = 16; j < 80; j++) {
-      SHA512_SCR(j);
-    }
-
-    for (j = 0; j < 8; j++) {
-      wv[j] = ctx->h[j];
-    }
-
-    for (j = 0; j < 80; j++) {
-      t1 = wv[7] + SHA512_F2(wv[4]) + CH(wv[4], wv[5], wv[6]) + sha512_k[j] +
-           w[j];
-      t2 = SHA512_F1(wv[0]) + MAJ(wv[0], wv[1], wv[2]);
-      wv[7] = wv[6];
-      wv[6] = wv[5];
-      wv[5] = wv[4];
-      wv[4] = wv[3] + t1;
-      wv[3] = wv[2];
-      wv[2] = wv[1];
-      wv[1] = wv[0];
-      wv[0] = t1 + t2;
-    }
-
-    for (j = 0; j < 8; j++)
-      ctx->h[j] += wv[j];
-#endif /* UNROLL_LOOPS_SHA512 */
-  }
-}
-
-void avb_sha512_update(AvbSHA512Ctx* ctx, const uint8_t* data, uint32_t len) {
-  unsigned int block_nb;
-  unsigned int new_len, rem_len, tmp_len;
-  const uint8_t* shifted_data;
-
-  tmp_len = AVB_SHA512_BLOCK_SIZE - ctx->len;
-  rem_len = len < tmp_len ? len : tmp_len;
-
-  avb_memcpy(&ctx->block[ctx->len], data, rem_len);
-
-  if (ctx->len + len < AVB_SHA512_BLOCK_SIZE) {
-    ctx->len += len;
-    return;
-  }
-
-  new_len = len - rem_len;
-  block_nb = new_len / AVB_SHA512_BLOCK_SIZE;
-
-  shifted_data = data + rem_len;
-
-  SHA512_transform(ctx, ctx->block, 1);
-  SHA512_transform(ctx, shifted_data, block_nb);
-
-  rem_len = new_len % AVB_SHA512_BLOCK_SIZE;
-
-  avb_memcpy(ctx->block, &shifted_data[block_nb << 7], rem_len);
-
-  ctx->len = rem_len;
-  ctx->tot_len += (block_nb + 1) << 7;
-}
-
-uint8_t* avb_sha512_final(AvbSHA512Ctx* ctx) {
-  unsigned int block_nb;
-  unsigned int pm_len;
-  unsigned int len_b;
-
-#ifndef UNROLL_LOOPS_SHA512
-  int i;
-#endif
-
-  block_nb =
-      1 + ((AVB_SHA512_BLOCK_SIZE - 17) < (ctx->len % AVB_SHA512_BLOCK_SIZE));
-
-  len_b = (ctx->tot_len + ctx->len) << 3;
-  pm_len = block_nb << 7;
-
-  avb_memset(ctx->block + ctx->len, 0, pm_len - ctx->len);
-  ctx->block[ctx->len] = 0x80;
-  UNPACK32(len_b, ctx->block + pm_len - 4);
-
-  SHA512_transform(ctx, ctx->block, block_nb);
-
-#ifdef UNROLL_LOOPS_SHA512
-  UNPACK64(ctx->h[0], &ctx->buf[0]);
-  UNPACK64(ctx->h[1], &ctx->buf[8]);
-  UNPACK64(ctx->h[2], &ctx->buf[16]);
-  UNPACK64(ctx->h[3], &ctx->buf[24]);
-  UNPACK64(ctx->h[4], &ctx->buf[32]);
-  UNPACK64(ctx->h[5], &ctx->buf[40]);
-  UNPACK64(ctx->h[6], &ctx->buf[48]);
-  UNPACK64(ctx->h[7], &ctx->buf[56]);
-#else
-  for (i = 0; i < 8; i++)
-    UNPACK64(ctx->h[i], &ctx->buf[i << 3]);
-#endif /* UNROLL_LOOPS_SHA512 */
-
-  return ctx->buf;
-}
+/* SHA-256 and SHA-512 implementation based on code by Oliver Gay
+ * <olivier.gay@a3.epfl.ch> under a BSD-style license. See below.
+ */
+
+/*
+ * FIPS 180-2 SHA-224/256/384/512 implementation
+ * Last update: 02/02/2007
+ * Issue date:  04/30/2005
+ *
+ * Copyright (C) 2005, 2007 Olivier Gay <olivier.gay@a3.epfl.ch>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the project nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE PROJECT AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE PROJECT OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <android_avb/avb_sha.h>
+
+#define SHFR(x, n) (x >> n)
+#define ROTR(x, n) ((x >> n) | (x << ((sizeof(x) << 3) - n)))
+#define ROTL(x, n) ((x << n) | (x >> ((sizeof(x) << 3) - n)))
+#define CH(x, y, z) ((x & y) ^ (~x & z))
+#define MAJ(x, y, z) ((x & y) ^ (x & z) ^ (y & z))
+
+#define SHA512_F1(x) (ROTR(x, 28) ^ ROTR(x, 34) ^ ROTR(x, 39))
+#define SHA512_F2(x) (ROTR(x, 14) ^ ROTR(x, 18) ^ ROTR(x, 41))
+#define SHA512_F3(x) (ROTR(x, 1) ^ ROTR(x, 8) ^ SHFR(x, 7))
+#define SHA512_F4(x) (ROTR(x, 19) ^ ROTR(x, 61) ^ SHFR(x, 6))
+
+#define UNPACK32(x, str)                 \
+  {                                      \
+    *((str) + 3) = (uint8_t)((x));       \
+    *((str) + 2) = (uint8_t)((x) >> 8);  \
+    *((str) + 1) = (uint8_t)((x) >> 16); \
+    *((str) + 0) = (uint8_t)((x) >> 24); \
+  }
+
+#define UNPACK64(x, str)                         \
+  {                                              \
+    *((str) + 7) = (uint8_t)x;                   \
+    *((str) + 6) = (uint8_t)((uint64_t)x >> 8);  \
+    *((str) + 5) = (uint8_t)((uint64_t)x >> 16); \
+    *((str) + 4) = (uint8_t)((uint64_t)x >> 24); \
+    *((str) + 3) = (uint8_t)((uint64_t)x >> 32); \
+    *((str) + 2) = (uint8_t)((uint64_t)x >> 40); \
+    *((str) + 1) = (uint8_t)((uint64_t)x >> 48); \
+    *((str) + 0) = (uint8_t)((uint64_t)x >> 56); \
+  }
+
+#define PACK64(str, x)                                                        \
+  {                                                                           \
+    *(x) =                                                                    \
+        ((uint64_t) * ((str) + 7)) | ((uint64_t) * ((str) + 6) << 8) |        \
+        ((uint64_t) * ((str) + 5) << 16) | ((uint64_t) * ((str) + 4) << 24) | \
+        ((uint64_t) * ((str) + 3) << 32) | ((uint64_t) * ((str) + 2) << 40) | \
+        ((uint64_t) * ((str) + 1) << 48) | ((uint64_t) * ((str) + 0) << 56);  \
+  }
+
+/* Macros used for loops unrolling */
+
+#define SHA512_SCR(i) \
+  { w[i] = SHA512_F4(w[i - 2]) + w[i - 7] + SHA512_F3(w[i - 15]) + w[i - 16]; }
+
+#define SHA512_EXP(a, b, c, d, e, f, g, h, j)                               \
+  {                                                                         \
+    t1 = wv[h] + SHA512_F2(wv[e]) + CH(wv[e], wv[f], wv[g]) + sha512_k[j] + \
+         w[j];                                                              \
+    t2 = SHA512_F1(wv[a]) + MAJ(wv[a], wv[b], wv[c]);                       \
+    wv[d] += t1;                                                            \
+    wv[h] = t1 + t2;                                                        \
+  }
+
+static const uint64_t sha512_h0[8] = {0x6a09e667f3bcc908ULL,
+                                      0xbb67ae8584caa73bULL,
+                                      0x3c6ef372fe94f82bULL,
+                                      0xa54ff53a5f1d36f1ULL,
+                                      0x510e527fade682d1ULL,
+                                      0x9b05688c2b3e6c1fULL,
+                                      0x1f83d9abfb41bd6bULL,
+                                      0x5be0cd19137e2179ULL};
+
+static const uint64_t sha512_k[80] = {
+    0x428a2f98d728ae22ULL, 0x7137449123ef65cdULL, 0xb5c0fbcfec4d3b2fULL,
+    0xe9b5dba58189dbbcULL, 0x3956c25bf348b538ULL, 0x59f111f1b605d019ULL,
+    0x923f82a4af194f9bULL, 0xab1c5ed5da6d8118ULL, 0xd807aa98a3030242ULL,
+    0x12835b0145706fbeULL, 0x243185be4ee4b28cULL, 0x550c7dc3d5ffb4e2ULL,
+    0x72be5d74f27b896fULL, 0x80deb1fe3b1696b1ULL, 0x9bdc06a725c71235ULL,
+    0xc19bf174cf692694ULL, 0xe49b69c19ef14ad2ULL, 0xefbe4786384f25e3ULL,
+    0x0fc19dc68b8cd5b5ULL, 0x240ca1cc77ac9c65ULL, 0x2de92c6f592b0275ULL,
+    0x4a7484aa6ea6e483ULL, 0x5cb0a9dcbd41fbd4ULL, 0x76f988da831153b5ULL,
+    0x983e5152ee66dfabULL, 0xa831c66d2db43210ULL, 0xb00327c898fb213fULL,
+    0xbf597fc7beef0ee4ULL, 0xc6e00bf33da88fc2ULL, 0xd5a79147930aa725ULL,
+    0x06ca6351e003826fULL, 0x142929670a0e6e70ULL, 0x27b70a8546d22ffcULL,
+    0x2e1b21385c26c926ULL, 0x4d2c6dfc5ac42aedULL, 0x53380d139d95b3dfULL,
+    0x650a73548baf63deULL, 0x766a0abb3c77b2a8ULL, 0x81c2c92e47edaee6ULL,
+    0x92722c851482353bULL, 0xa2bfe8a14cf10364ULL, 0xa81a664bbc423001ULL,
+    0xc24b8b70d0f89791ULL, 0xc76c51a30654be30ULL, 0xd192e819d6ef5218ULL,
+    0xd69906245565a910ULL, 0xf40e35855771202aULL, 0x106aa07032bbd1b8ULL,
+    0x19a4c116b8d2d0c8ULL, 0x1e376c085141ab53ULL, 0x2748774cdf8eeb99ULL,
+    0x34b0bcb5e19b48a8ULL, 0x391c0cb3c5c95a63ULL, 0x4ed8aa4ae3418acbULL,
+    0x5b9cca4f7763e373ULL, 0x682e6ff3d6b2b8a3ULL, 0x748f82ee5defb2fcULL,
+    0x78a5636f43172f60ULL, 0x84c87814a1f0ab72ULL, 0x8cc702081a6439ecULL,
+    0x90befffa23631e28ULL, 0xa4506cebde82bde9ULL, 0xbef9a3f7b2c67915ULL,
+    0xc67178f2e372532bULL, 0xca273eceea26619cULL, 0xd186b8c721c0c207ULL,
+    0xeada7dd6cde0eb1eULL, 0xf57d4f7fee6ed178ULL, 0x06f067aa72176fbaULL,
+    0x0a637dc5a2c898a6ULL, 0x113f9804bef90daeULL, 0x1b710b35131c471bULL,
+    0x28db77f523047d84ULL, 0x32caab7b40c72493ULL, 0x3c9ebe0a15c9bebcULL,
+    0x431d67c49c100d4cULL, 0x4cc5d4becb3e42b6ULL, 0x597f299cfc657e2aULL,
+    0x5fcb6fab3ad6faecULL, 0x6c44198c4a475817ULL};
+
+/* SHA-512 implementation */
+
+void avb_sha512_init(AvbSHA512Ctx* ctx) {
+#ifdef UNROLL_LOOPS_SHA512
+  ctx->h[0] = sha512_h0[0];
+  ctx->h[1] = sha512_h0[1];
+  ctx->h[2] = sha512_h0[2];
+  ctx->h[3] = sha512_h0[3];
+  ctx->h[4] = sha512_h0[4];
+  ctx->h[5] = sha512_h0[5];
+  ctx->h[6] = sha512_h0[6];
+  ctx->h[7] = sha512_h0[7];
+#else
+  int i;
+
+  for (i = 0; i < 8; i++)
+    ctx->h[i] = sha512_h0[i];
+#endif /* UNROLL_LOOPS_SHA512 */
+
+  ctx->len = 0;
+  ctx->tot_len = 0;
+}
+
+static void SHA512_transform(AvbSHA512Ctx* ctx,
+                             const uint8_t* message,
+                             size_t block_nb) {
+  uint64_t w[80];
+  uint64_t wv[8];
+  uint64_t t1, t2;
+  const uint8_t* sub_block;
+  size_t i, j;
+
+  for (i = 0; i < block_nb; i++) {
+    sub_block = message + (i << 7);
+
+#ifdef UNROLL_LOOPS_SHA512
+    PACK64(&sub_block[0], &w[0]);
+    PACK64(&sub_block[8], &w[1]);
+    PACK64(&sub_block[16], &w[2]);
+    PACK64(&sub_block[24], &w[3]);
+    PACK64(&sub_block[32], &w[4]);
+    PACK64(&sub_block[40], &w[5]);
+    PACK64(&sub_block[48], &w[6]);
+    PACK64(&sub_block[56], &w[7]);
+    PACK64(&sub_block[64], &w[8]);
+    PACK64(&sub_block[72], &w[9]);
+    PACK64(&sub_block[80], &w[10]);
+    PACK64(&sub_block[88], &w[11]);
+    PACK64(&sub_block[96], &w[12]);
+    PACK64(&sub_block[104], &w[13]);
+    PACK64(&sub_block[112], &w[14]);
+    PACK64(&sub_block[120], &w[15]);
+
+    SHA512_SCR(16);
+    SHA512_SCR(17);
+    SHA512_SCR(18);
+    SHA512_SCR(19);
+    SHA512_SCR(20);
+    SHA512_SCR(21);
+    SHA512_SCR(22);
+    SHA512_SCR(23);
+    SHA512_SCR(24);
+    SHA512_SCR(25);
+    SHA512_SCR(26);
+    SHA512_SCR(27);
+    SHA512_SCR(28);
+    SHA512_SCR(29);
+    SHA512_SCR(30);
+    SHA512_SCR(31);
+    SHA512_SCR(32);
+    SHA512_SCR(33);
+    SHA512_SCR(34);
+    SHA512_SCR(35);
+    SHA512_SCR(36);
+    SHA512_SCR(37);
+    SHA512_SCR(38);
+    SHA512_SCR(39);
+    SHA512_SCR(40);
+    SHA512_SCR(41);
+    SHA512_SCR(42);
+    SHA512_SCR(43);
+    SHA512_SCR(44);
+    SHA512_SCR(45);
+    SHA512_SCR(46);
+    SHA512_SCR(47);
+    SHA512_SCR(48);
+    SHA512_SCR(49);
+    SHA512_SCR(50);
+    SHA512_SCR(51);
+    SHA512_SCR(52);
+    SHA512_SCR(53);
+    SHA512_SCR(54);
+    SHA512_SCR(55);
+    SHA512_SCR(56);
+    SHA512_SCR(57);
+    SHA512_SCR(58);
+    SHA512_SCR(59);
+    SHA512_SCR(60);
+    SHA512_SCR(61);
+    SHA512_SCR(62);
+    SHA512_SCR(63);
+    SHA512_SCR(64);
+    SHA512_SCR(65);
+    SHA512_SCR(66);
+    SHA512_SCR(67);
+    SHA512_SCR(68);
+    SHA512_SCR(69);
+    SHA512_SCR(70);
+    SHA512_SCR(71);
+    SHA512_SCR(72);
+    SHA512_SCR(73);
+    SHA512_SCR(74);
+    SHA512_SCR(75);
+    SHA512_SCR(76);
+    SHA512_SCR(77);
+    SHA512_SCR(78);
+    SHA512_SCR(79);
+
+    wv[0] = ctx->h[0];
+    wv[1] = ctx->h[1];
+    wv[2] = ctx->h[2];
+    wv[3] = ctx->h[3];
+    wv[4] = ctx->h[4];
+    wv[5] = ctx->h[5];
+    wv[6] = ctx->h[6];
+    wv[7] = ctx->h[7];
+
+    j = 0;
+
+    do {
+      SHA512_EXP(0, 1, 2, 3, 4, 5, 6, 7, j);
+      j++;
+      SHA512_EXP(7, 0, 1, 2, 3, 4, 5, 6, j);
+      j++;
+      SHA512_EXP(6, 7, 0, 1, 2, 3, 4, 5, j);
+      j++;
+      SHA512_EXP(5, 6, 7, 0, 1, 2, 3, 4, j);
+      j++;
+      SHA512_EXP(4, 5, 6, 7, 0, 1, 2, 3, j);
+      j++;
+      SHA512_EXP(3, 4, 5, 6, 7, 0, 1, 2, j);
+      j++;
+      SHA512_EXP(2, 3, 4, 5, 6, 7, 0, 1, j);
+      j++;
+      SHA512_EXP(1, 2, 3, 4, 5, 6, 7, 0, j);
+      j++;
+    } while (j < 80);
+
+    ctx->h[0] += wv[0];
+    ctx->h[1] += wv[1];
+    ctx->h[2] += wv[2];
+    ctx->h[3] += wv[3];
+    ctx->h[4] += wv[4];
+    ctx->h[5] += wv[5];
+    ctx->h[6] += wv[6];
+    ctx->h[7] += wv[7];
+#else
+    for (j = 0; j < 16; j++) {
+      PACK64(&sub_block[j << 3], &w[j]);
+    }
+
+    for (j = 16; j < 80; j++) {
+      SHA512_SCR(j);
+    }
+
+    for (j = 0; j < 8; j++) {
+      wv[j] = ctx->h[j];
+    }
+
+    for (j = 0; j < 80; j++) {
+      t1 = wv[7] + SHA512_F2(wv[4]) + CH(wv[4], wv[5], wv[6]) + sha512_k[j] +
+           w[j];
+      t2 = SHA512_F1(wv[0]) + MAJ(wv[0], wv[1], wv[2]);
+      wv[7] = wv[6];
+      wv[6] = wv[5];
+      wv[5] = wv[4];
+      wv[4] = wv[3] + t1;
+      wv[3] = wv[2];
+      wv[2] = wv[1];
+      wv[1] = wv[0];
+      wv[0] = t1 + t2;
+    }
+
+    for (j = 0; j < 8; j++)
+      ctx->h[j] += wv[j];
+#endif /* UNROLL_LOOPS_SHA512 */
+  }
+}
+
+void avb_sha512_update(AvbSHA512Ctx* ctx, const uint8_t* data, size_t len) {
+  size_t block_nb;
+  size_t new_len, rem_len, tmp_len;
+  const uint8_t* shifted_data;
+
+  tmp_len = AVB_SHA512_BLOCK_SIZE - ctx->len;
+  rem_len = len < tmp_len ? len : tmp_len;
+
+  avb_memcpy(&ctx->block[ctx->len], data, rem_len);
+
+  if (ctx->len + len < AVB_SHA512_BLOCK_SIZE) {
+    ctx->len += len;
+    return;
+  }
+
+  new_len = len - rem_len;
+  block_nb = new_len / AVB_SHA512_BLOCK_SIZE;
+
+  shifted_data = data + rem_len;
+
+  SHA512_transform(ctx, ctx->block, 1);
+  SHA512_transform(ctx, shifted_data, block_nb);
+
+  rem_len = new_len % AVB_SHA512_BLOCK_SIZE;
+
+  avb_memcpy(ctx->block, &shifted_data[block_nb << 7], rem_len);
+
+  ctx->len = rem_len;
+  ctx->tot_len += (block_nb + 1) << 7;
+}
+
+uint8_t* avb_sha512_final(AvbSHA512Ctx* ctx) {
+  size_t block_nb;
+  size_t pm_len;
+  uint64_t len_b;
+
+#ifndef UNROLL_LOOPS_SHA512
+  size_t i;
+#endif
+
+  block_nb =
+      1 + ((AVB_SHA512_BLOCK_SIZE - 17) < (ctx->len % AVB_SHA512_BLOCK_SIZE));
+
+  len_b = (ctx->tot_len + ctx->len) << 3;
+  pm_len = block_nb << 7;
+
+  avb_memset(ctx->block + ctx->len, 0, pm_len - ctx->len);
+  ctx->block[ctx->len] = 0x80;
+  UNPACK64(len_b, ctx->block + pm_len - 8);
+
+  SHA512_transform(ctx, ctx->block, block_nb);
+
+#ifdef UNROLL_LOOPS_SHA512
+  UNPACK64(ctx->h[0], &ctx->buf[0]);
+  UNPACK64(ctx->h[1], &ctx->buf[8]);
+  UNPACK64(ctx->h[2], &ctx->buf[16]);
+  UNPACK64(ctx->h[3], &ctx->buf[24]);
+  UNPACK64(ctx->h[4], &ctx->buf[32]);
+  UNPACK64(ctx->h[5], &ctx->buf[40]);
+  UNPACK64(ctx->h[6], &ctx->buf[48]);
+  UNPACK64(ctx->h[7], &ctx->buf[56]);
+#else
+  for (i = 0; i < 8; i++)
+    UNPACK64(ctx->h[i], &ctx->buf[i << 3]);
+#endif /* UNROLL_LOOPS_SHA512 */
+
+  return ctx->buf;
+}
diff --git a/lib/avb/libavb/avb_slot_verify.c b/lib/avb/libavb/avb_slot_verify.c
index 76abc178d4..16acace531 100644
--- a/lib/avb/libavb/avb_slot_verify.c
+++ b/lib/avb/libavb/avb_slot_verify.c
@@ -1,1386 +1,1744 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-#include <common.h>
-#include <sysmem.h>
-#include <android_avb/avb_slot_verify.h>
-#include <android_avb/avb_chain_partition_descriptor.h>
-#include <android_avb/avb_cmdline.h>
-#include <android_avb/avb_footer.h>
-#include <android_avb/avb_hash_descriptor.h>
-#include <android_avb/avb_hashtree_descriptor.h>
-#include <android_avb/avb_kernel_cmdline_descriptor.h>
-#include <android_avb/avb_sha.h>
-#include <android_avb/avb_util.h>
-#include <android_avb/avb_vbmeta_image.h>
-#include <android_avb/avb_version.h>
-
-/* Maximum number of partitions that can be loaded with avb_slot_verify(). */
-#define MAX_NUMBER_OF_LOADED_PARTITIONS 32
-
-/* Maximum number of vbmeta images that can be loaded with avb_slot_verify(). */
-#define MAX_NUMBER_OF_VBMETA_IMAGES 32
-
-/* Maximum size of a vbmeta image - 64 KiB. */
-#define VBMETA_MAX_SIZE (64 * 1024)
-
-/* Helper function to see if we should continue with verification in
- * allow_verification_error=true mode if something goes wrong. See the
- * comments for the avb_slot_verify() function for more information.
- */
-static inline bool result_should_continue(AvbSlotVerifyResult result) {
-  switch (result) {
-    case AVB_SLOT_VERIFY_RESULT_ERROR_OOM:
-    case AVB_SLOT_VERIFY_RESULT_ERROR_IO:
-    case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA:
-    case AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION:
-    case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT:
-      return false;
-
-    case AVB_SLOT_VERIFY_RESULT_OK:
-    case AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION:
-    case AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX:
-    case AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED:
-      return true;
-  }
-
-  return false;
-}
-
-static AvbSlotVerifyResult load_full_partition(AvbOps* ops,
-                                               const char* part_name,
-                                               uint64_t image_size,
-                                               uint8_t** out_image_buf,
-                                               bool* out_image_preloaded) {
-  size_t part_num_read;
-  AvbIOResult io_ret;
-
-  /* Make sure that we do not overwrite existing data. */
-  avb_assert(*out_image_buf == NULL);
-  avb_assert(!*out_image_preloaded);
-
-  /* We are going to implicitly cast image_size from uint64_t to size_t in the
-   * following code, so we need to make sure that the cast is safe. */
-  if (image_size != (size_t)(image_size)) {
-    avb_errorv(part_name, ": Partition size too large to load.\n", NULL);
-    return AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-  }
-
-  /* Try use a preloaded one. */
-  if (ops->get_preloaded_partition != NULL) {
-    io_ret = ops->get_preloaded_partition(
-        ops, part_name, image_size, out_image_buf, &part_num_read);
-    if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-      return AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-    } else if (io_ret != AVB_IO_RESULT_OK) {
-      avb_errorv(part_name, ": Error loading data from partition.\n", NULL);
-      return AVB_SLOT_VERIFY_RESULT_ERROR_IO;
-    }
-
-    if (*out_image_buf != NULL) {
-      if (part_num_read != image_size) {
-        avb_errorv(part_name, ": Read incorrect number of bytes.\n", NULL);
-        return AVB_SLOT_VERIFY_RESULT_ERROR_IO;
-      }
-      *out_image_preloaded = true;
-    }
-  }
-
-  /* Allocate and copy the partition. */
-  if (!*out_image_preloaded) {
-    *out_image_buf = sysmem_alloc(MEMBLK_ID_AVB_ANDROID, image_size);
-    if (*out_image_buf == NULL) {
-      return AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-    }
-
-    io_ret = ops->read_from_partition(ops,
-                                      part_name,
-                                      0 /* offset */,
-                                      image_size,
-                                      *out_image_buf,
-                                      &part_num_read);
-    if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-      return AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-    } else if (io_ret != AVB_IO_RESULT_OK) {
-      avb_errorv(part_name, ": Error loading data from partition.\n", NULL);
-      return AVB_SLOT_VERIFY_RESULT_ERROR_IO;
-    }
-    if (part_num_read != image_size) {
-      avb_errorv(part_name, ": Read incorrect number of bytes.\n", NULL);
-      return AVB_SLOT_VERIFY_RESULT_ERROR_IO;
-    }
-  }
-
-  return AVB_SLOT_VERIFY_RESULT_OK;
-}
-
-static AvbSlotVerifyResult read_persistent_digest(AvbOps* ops,
-                                                  const char* part_name,
-                                                  size_t expected_digest_size,
-                                                  uint8_t* out_digest) {
-  char* persistent_value_name = NULL;
-  AvbIOResult io_ret = AVB_IO_RESULT_OK;
-  size_t stored_digest_size = 0;
-
-  if (ops->read_persistent_value == NULL) {
-    avb_errorv(part_name, ": Persistent values are not implemented.\n", NULL);
-    return AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-  }
-  persistent_value_name =
-      avb_strdupv(AVB_NPV_PERSISTENT_DIGEST_PREFIX, part_name, NULL);
-  if (persistent_value_name == NULL) {
-    return AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-  }
-  io_ret = ops->read_persistent_value(ops,
-                                      persistent_value_name,
-                                      expected_digest_size,
-                                      out_digest,
-                                      &stored_digest_size);
-  avb_free(persistent_value_name);
-  if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-    return AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-  } else if (io_ret == AVB_IO_RESULT_ERROR_NO_SUCH_VALUE) {
-    avb_errorv(part_name, ": Persistent digest does not exist.\n", NULL);
-    return AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-  } else if (io_ret == AVB_IO_RESULT_ERROR_INVALID_VALUE_SIZE ||
-             io_ret == AVB_IO_RESULT_ERROR_INSUFFICIENT_SPACE ||
-             expected_digest_size != stored_digest_size) {
-    avb_errorv(
-        part_name, ": Persistent digest is not of expected size.\n", NULL);
-    return AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-  } else if (io_ret != AVB_IO_RESULT_OK) {
-    avb_errorv(part_name, ": Error reading persistent digest.\n", NULL);
-    return AVB_SLOT_VERIFY_RESULT_ERROR_IO;
-  }
-  return AVB_SLOT_VERIFY_RESULT_OK;
-}
-
-static AvbSlotVerifyResult load_and_verify_hash_partition(
-    AvbOps* ops,
-    const char* const* requested_partitions,
-    const char* ab_suffix,
-    bool allow_verification_error,
-    const AvbDescriptor* descriptor,
-    AvbSlotVerifyData* slot_data) {
-  AvbHashDescriptor hash_desc;
-  const uint8_t* desc_partition_name = NULL;
-  const uint8_t* desc_salt;
-  const uint8_t* desc_digest;
-  char part_name[AVB_PART_NAME_MAX_SIZE];
-  AvbSlotVerifyResult ret;
-  AvbIOResult io_ret;
-  uint8_t* image_buf = NULL;
-  bool image_preloaded = false;
-  uint8_t* digest;
-  size_t digest_len;
-  const char* found;
-  uint64_t image_size = 0;
-  size_t expected_digest_len = 0;
-  uint8_t expected_digest_buf[AVB_SHA512_DIGEST_SIZE];
-  const uint8_t* expected_digest = NULL;
-
-  if (!avb_hash_descriptor_validate_and_byteswap(
-          (const AvbHashDescriptor*)descriptor, &hash_desc)) {
-    ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-    goto out;
-  }
-
-  desc_partition_name =
-      ((const uint8_t*)descriptor) + sizeof(AvbHashDescriptor);
-  desc_salt = desc_partition_name + hash_desc.partition_name_len;
-  desc_digest = desc_salt + hash_desc.salt_len;
-
-  if (!avb_validate_utf8(desc_partition_name, hash_desc.partition_name_len)) {
-    avb_error("Partition name is not valid UTF-8.\n");
-    ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-    goto out;
-  }
-
-  /* Don't bother loading or validating unless the partition was
-   * requested in the first place.
-   */
-  found = avb_strv_find_str(requested_partitions,
-                            (const char*)desc_partition_name,
-                            hash_desc.partition_name_len);
-  if (found == NULL) {
-    ret = AVB_SLOT_VERIFY_RESULT_OK;
-    goto out;
-  }
-
-  if ((hash_desc.flags & AVB_HASH_DESCRIPTOR_FLAGS_DO_NOT_USE_AB) != 0) {
-    /* No ab_suffix, just copy the partition name as is. */
-    if (hash_desc.partition_name_len >= AVB_PART_NAME_MAX_SIZE) {
-      avb_error("Partition name does not fit.\n");
-      ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-      goto out;
-    }
-    avb_memcpy(part_name, desc_partition_name, hash_desc.partition_name_len);
-    part_name[hash_desc.partition_name_len] = '\0';
-  } else if (hash_desc.digest_len == 0 && avb_strlen(ab_suffix) != 0) {
-    /* No ab_suffix allowed for partitions without a digest in the descriptor
-     * because these partitions hold data unique to this device and are not
-     * updated using an A/B scheme.
-     */
-    avb_error("Cannot use A/B with a persistent digest.\n");
-    ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-    goto out;
-  } else {
-    /* Add ab_suffix to the partition name. */
-    if (!avb_str_concat(part_name,
-                        sizeof part_name,
-                        (const char*)desc_partition_name,
-                        hash_desc.partition_name_len,
-                        ab_suffix,
-                        avb_strlen(ab_suffix))) {
-      avb_error("Partition name and suffix does not fit.\n");
-      ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-      goto out;
-    }
-  }
-
-  /* If we're allowing verification errors then hash_desc.image_size
-   * may no longer match what's in the partition... so in this case
-   * just load the entire partition.
-   *
-   * For example, this can happen if a developer does 'fastboot flash
-   * boot /path/to/new/and/bigger/boot.img'. We want this to work
-   * since it's such a common workflow.
-   */
-  image_size = hash_desc.image_size;
-  if (allow_verification_error) {
-    if (ops->get_size_of_partition == NULL) {
-      avb_errorv(part_name,
-                 ": The get_size_of_partition() operation is "
-                 "not implemented so we may not load the entire partition. "
-                 "Please implement.",
-                 NULL);
-    } else {
-      io_ret = ops->get_size_of_partition(ops, part_name, &image_size);
-      if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-        ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-        goto out;
-      } else if (io_ret != AVB_IO_RESULT_OK) {
-        avb_errorv(part_name, ": Error determining partition size.\n", NULL);
-        ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
-        goto out;
-      }
-      avb_debugv(part_name, ": Loading entire partition.\n", NULL);
-    }
-  }
-
-  ret = load_full_partition(
-      ops, part_name, image_size, &image_buf, &image_preloaded);
-  if (ret != AVB_SLOT_VERIFY_RESULT_OK) {
-    goto out;
-  }
-
-  if (avb_strcmp((const char*)hash_desc.hash_algorithm, "sha256") == 0) {
-    AvbSHA256Ctx sha256_ctx;
-    avb_sha256_init(&sha256_ctx);
-    avb_sha256_update(&sha256_ctx, desc_salt, hash_desc.salt_len);
-    avb_sha256_update(&sha256_ctx, image_buf, hash_desc.image_size);
-    digest = avb_sha256_final(&sha256_ctx);
-    digest_len = AVB_SHA256_DIGEST_SIZE;
-  } else if (avb_strcmp((const char*)hash_desc.hash_algorithm, "sha512") == 0) {
-    AvbSHA512Ctx sha512_ctx;
-    avb_sha512_init(&sha512_ctx);
-    avb_sha512_update(&sha512_ctx, desc_salt, hash_desc.salt_len);
-    avb_sha512_update(&sha512_ctx, image_buf, hash_desc.image_size);
-    digest = avb_sha512_final(&sha512_ctx);
-    digest_len = AVB_SHA512_DIGEST_SIZE;
-  } else {
-    avb_errorv(part_name, ": Unsupported hash algorithm.\n", NULL);
-    ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-    goto out;
-  }
-
-  if (hash_desc.digest_len == 0) {
-    // Expect a match to a persistent digest.
-    avb_debugv(part_name, ": No digest, using persistent digest.\n", NULL);
-    expected_digest_len = digest_len;
-    expected_digest = expected_digest_buf;
-    avb_assert(expected_digest_len <= sizeof(expected_digest_buf));
-    ret =
-        read_persistent_digest(ops, part_name, digest_len, expected_digest_buf);
-    if (ret != AVB_SLOT_VERIFY_RESULT_OK) {
-      goto out;
-    }
-  } else {
-    // Expect a match to the digest in the descriptor.
-    expected_digest_len = hash_desc.digest_len;
-    expected_digest = desc_digest;
-  }
-
-  if (digest_len != expected_digest_len) {
-    avb_errorv(
-        part_name, ": Digest in descriptor not of expected size.\n", NULL);
-    ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-    goto out;
-  }
-
-  if (avb_safe_memcmp(digest, expected_digest, digest_len) != 0) {
-    avb_errorv(part_name,
-               ": Hash of data does not match digest in descriptor.\n",
-               NULL);
-    ret = AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION;
-    goto out;
-  }
-
-  ret = AVB_SLOT_VERIFY_RESULT_OK;
-
-out:
-
-  /* If it worked and something was loaded, copy to slot_data. */
-  if ((ret == AVB_SLOT_VERIFY_RESULT_OK || result_should_continue(ret)) &&
-      image_buf != NULL) {
-    AvbPartitionData* loaded_partition;
-    if (slot_data->num_loaded_partitions == MAX_NUMBER_OF_LOADED_PARTITIONS) {
-      avb_errorv(part_name, ": Too many loaded partitions.\n", NULL);
-      ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-      goto fail;
-    }
-    loaded_partition =
-        &slot_data->loaded_partitions[slot_data->num_loaded_partitions++];
-    loaded_partition->partition_name = avb_strdup(found);
-    loaded_partition->data_size = image_size;
-    loaded_partition->data = image_buf;
-    loaded_partition->preloaded = image_preloaded;
-    image_buf = NULL;
-  }
-
-fail:
-  if (image_buf != NULL && !image_preloaded) {
-    sysmem_free((phys_addr_t)image_buf);
-  }
-  return ret;
-}
-
-static AvbSlotVerifyResult load_requested_partitions(
-    AvbOps* ops,
-    const char* const* requested_partitions,
-    const char* ab_suffix,
-    AvbSlotVerifyData* slot_data) {
-  AvbSlotVerifyResult ret;
-  uint8_t* image_buf = NULL;
-  bool image_preloaded = false;
-  size_t n;
-
-  if (ops->get_size_of_partition == NULL) {
-    avb_error("get_size_of_partition() not implemented.\n");
-    ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT;
-    goto out;
-  }
-
-  for (n = 0; requested_partitions[n] != NULL; n++) {
-    char part_name[AVB_PART_NAME_MAX_SIZE];
-    AvbIOResult io_ret;
-    uint64_t image_size;
-    AvbPartitionData* loaded_partition;
-
-    if (!avb_str_concat(part_name,
-                        sizeof part_name,
-                        requested_partitions[n],
-                        avb_strlen(requested_partitions[n]),
-                        ab_suffix,
-                        avb_strlen(ab_suffix))) {
-      avb_error("Partition name and suffix does not fit.\n");
-      ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-      goto out;
-    }
-
-    io_ret = ops->get_size_of_partition(ops, part_name, &image_size);
-    if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-      ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-      goto out;
-    } else if (io_ret != AVB_IO_RESULT_OK) {
-      avb_errorv(part_name, ": Error determining partition size.\n", NULL);
-      ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
-      goto out;
-    }
-    avb_debugv(part_name, ": Loading entire partition.\n", NULL);
-
-    ret = load_full_partition(
-        ops, part_name, image_size, &image_buf, &image_preloaded);
-    if (ret != AVB_SLOT_VERIFY_RESULT_OK) {
-      goto out;
-    }
-
-    /* Move to slot_data. */
-    if (slot_data->num_loaded_partitions == MAX_NUMBER_OF_LOADED_PARTITIONS) {
-      avb_errorv(part_name, ": Too many loaded partitions.\n", NULL);
-      ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-      goto out;
-    }
-    loaded_partition =
-        &slot_data->loaded_partitions[slot_data->num_loaded_partitions++];
-    loaded_partition->partition_name = avb_strdup(requested_partitions[n]);
-    if (loaded_partition->partition_name == NULL) {
-      ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-      goto out;
-    }
-    loaded_partition->data_size = image_size;
-    loaded_partition->data = image_buf; /* Transferring the owner. */
-    loaded_partition->preloaded = image_preloaded;
-    image_buf = NULL;
-    image_preloaded = false;
-  }
-
-  ret = AVB_SLOT_VERIFY_RESULT_OK;
-
-out:
-  /* Free the current buffer if any. */
-  if (image_buf != NULL && !image_preloaded) {
-    sysmem_free((phys_addr_t)image_buf);
-  }
-  /* Buffers that are already saved in slot_data will be handled by the caller
-   * even on failure. */
-  return ret;
-}
-
-static AvbSlotVerifyResult load_and_verify_vbmeta(
-    AvbOps* ops,
-    const char* const* requested_partitions,
-    const char* ab_suffix,
-    bool allow_verification_error,
-    AvbVBMetaImageFlags toplevel_vbmeta_flags,
-    int rollback_index_location,
-    const char* partition_name,
-    size_t partition_name_len,
-    const uint8_t* expected_public_key,
-    size_t expected_public_key_length,
-    AvbSlotVerifyData* slot_data,
-    AvbAlgorithmType* out_algorithm_type,
-    AvbCmdlineSubstList* out_additional_cmdline_subst) {
-  char full_partition_name[AVB_PART_NAME_MAX_SIZE];
-  AvbSlotVerifyResult ret;
-  AvbIOResult io_ret;
-  size_t vbmeta_offset;
-  size_t vbmeta_size;
-  uint8_t* vbmeta_buf = NULL;
-  size_t vbmeta_num_read;
-  AvbVBMetaVerifyResult vbmeta_ret;
-  const uint8_t* pk_data;
-  size_t pk_len;
-  AvbVBMetaImageHeader vbmeta_header;
-  uint64_t stored_rollback_index;
-  const AvbDescriptor** descriptors = NULL;
-  size_t num_descriptors;
-  size_t n;
-  bool is_main_vbmeta;
-  bool is_vbmeta_partition;
-  AvbVBMetaData* vbmeta_image_data = NULL;
-
-  ret = AVB_SLOT_VERIFY_RESULT_OK;
-
-  avb_assert(slot_data != NULL);
-
-  /* Since we allow top-level vbmeta in 'boot', use
-   * rollback_index_location to determine whether we're the main
-   * vbmeta struct.
-   */
-  is_main_vbmeta = (rollback_index_location == 0);
-  is_vbmeta_partition = (avb_strcmp(partition_name, "vbmeta") == 0);
-
-  if (!avb_validate_utf8((const uint8_t*)partition_name, partition_name_len)) {
-    avb_error("Partition name is not valid UTF-8.\n");
-    ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-    goto out;
-  }
-
-  /* Construct full partition name. */
-  if (!avb_str_concat(full_partition_name,
-                      sizeof full_partition_name,
-                      partition_name,
-                      partition_name_len,
-                      ab_suffix,
-                      avb_strlen(ab_suffix))) {
-    avb_error("Partition name and suffix does not fit.\n");
-    ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-    goto out;
-  }
-
-  avb_debugv("Loading vbmeta struct from partition '",
-             full_partition_name,
-             "'.\n",
-             NULL);
-
-  /* If we're loading from the main vbmeta partition, the vbmeta
-   * struct is in the beginning. Otherwise we have to locate it via a
-   * footer.
-   */
-  if (is_vbmeta_partition) {
-    vbmeta_offset = 0;
-    vbmeta_size = VBMETA_MAX_SIZE;
-  } else {
-    uint8_t footer_buf[AVB_FOOTER_SIZE];
-    size_t footer_num_read;
-    AvbFooter footer;
-
-    io_ret = ops->read_from_partition(ops,
-                                      full_partition_name,
-                                      -AVB_FOOTER_SIZE,
-                                      AVB_FOOTER_SIZE,
-                                      footer_buf,
-                                      &footer_num_read);
-    if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-      ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-      goto out;
-    } else if (io_ret != AVB_IO_RESULT_OK) {
-      avb_errorv(full_partition_name, ": Error loading footer.\n", NULL);
-      ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
-      goto out;
-    }
-    avb_assert(footer_num_read == AVB_FOOTER_SIZE);
-
-    if (!avb_footer_validate_and_byteswap((const AvbFooter*)footer_buf,
-                                          &footer)) {
-      avb_errorv(full_partition_name, ": Error validating footer.\n", NULL);
-      ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-      goto out;
-    }
-
-    /* Basic footer sanity check since the data is untrusted. */
-    if (footer.vbmeta_size > VBMETA_MAX_SIZE) {
-      avb_errorv(
-          full_partition_name, ": Invalid vbmeta size in footer.\n", NULL);
-      ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-      goto out;
-    }
-
-    vbmeta_offset = footer.vbmeta_offset;
-    vbmeta_size = footer.vbmeta_size;
-  }
-
-  vbmeta_buf = avb_malloc(vbmeta_size);
-  if (vbmeta_buf == NULL) {
-    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-    goto out;
-  }
-
-  io_ret = ops->read_from_partition(ops,
-                                    full_partition_name,
-                                    vbmeta_offset,
-                                    vbmeta_size,
-                                    vbmeta_buf,
-                                    &vbmeta_num_read);
-  if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-    goto out;
-  } else if (io_ret != AVB_IO_RESULT_OK) {
-    /* If we're looking for 'vbmeta' but there is no such partition,
-     * go try to get it from the boot partition instead.
-     */
-    if (is_main_vbmeta && io_ret == AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION &&
-        is_vbmeta_partition) {
-      avb_debugv(full_partition_name,
-                 ": No such partition. Trying 'boot' instead.\n",
-                 NULL);
-      ret = load_and_verify_vbmeta(ops,
-                                   requested_partitions,
-                                   ab_suffix,
-                                   allow_verification_error,
-                                   0 /* toplevel_vbmeta_flags */,
-                                   0 /* rollback_index_location */,
-                                   "boot",
-                                   avb_strlen("boot"),
-                                   NULL /* expected_public_key */,
-                                   0 /* expected_public_key_length */,
-                                   slot_data,
-                                   out_algorithm_type,
-                                   out_additional_cmdline_subst);
-      goto out;
-    } else {
-      avb_errorv(full_partition_name, ": Error loading vbmeta data.\n", NULL);
-      ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
-      goto out;
-    }
-  }
-  avb_assert(vbmeta_num_read <= vbmeta_size);
-
-  /* Check if the image is properly signed and get the public key used
-   * to sign the image.
-   */
-  vbmeta_ret =
-      avb_vbmeta_image_verify(vbmeta_buf, vbmeta_num_read, &pk_data, &pk_len);
-  switch (vbmeta_ret) {
-    case AVB_VBMETA_VERIFY_RESULT_OK:
-      avb_assert(pk_data != NULL && pk_len > 0);
-      break;
-
-    case AVB_VBMETA_VERIFY_RESULT_OK_NOT_SIGNED:
-    case AVB_VBMETA_VERIFY_RESULT_HASH_MISMATCH:
-    case AVB_VBMETA_VERIFY_RESULT_SIGNATURE_MISMATCH:
-      ret = AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION;
-      avb_errorv(full_partition_name,
-                 ": Error verifying vbmeta image: ",
-                 avb_vbmeta_verify_result_to_string(vbmeta_ret),
-                 "\n",
-                 NULL);
-      if (!allow_verification_error) {
-        goto out;
-      }
-      break;
-
-    case AVB_VBMETA_VERIFY_RESULT_INVALID_VBMETA_HEADER:
-      /* No way to continue this case. */
-      ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-      avb_errorv(full_partition_name,
-                 ": Error verifying vbmeta image: invalid vbmeta header\n",
-                 NULL);
-      goto out;
-
-    case AVB_VBMETA_VERIFY_RESULT_UNSUPPORTED_VERSION:
-      /* No way to continue this case. */
-      ret = AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION;
-      avb_errorv(full_partition_name,
-                 ": Error verifying vbmeta image: unsupported AVB version\n",
-                 NULL);
-      goto out;
-  }
-
-  /* Byteswap the header. */
-  avb_vbmeta_image_header_to_host_byte_order((AvbVBMetaImageHeader*)vbmeta_buf,
-                                             &vbmeta_header);
-
-  /* If we're the toplevel, assign flags so they'll be passed down. */
-  if (is_main_vbmeta) {
-    toplevel_vbmeta_flags = (AvbVBMetaImageFlags)vbmeta_header.flags;
-  } else {
-    if (vbmeta_header.flags != 0) {
-      ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-      avb_errorv(full_partition_name,
-                 ": chained vbmeta image has non-zero flags\n",
-                 NULL);
-      goto out;
-    }
-  }
-
-  /* Check if key used to make signature matches what is expected. */
-  if (pk_data != NULL) {
-    if (expected_public_key != NULL) {
-      avb_assert(!is_main_vbmeta);
-      if (expected_public_key_length != pk_len ||
-          avb_safe_memcmp(expected_public_key, pk_data, pk_len) != 0) {
-        avb_errorv(full_partition_name,
-                   ": Public key used to sign data does not match key in chain "
-                   "partition descriptor.\n",
-                   NULL);
-        ret = AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED;
-        if (!allow_verification_error) {
-          goto out;
-        }
-      }
-    } else {
-      bool key_is_trusted = false;
-      const uint8_t* pk_metadata = NULL;
-      size_t pk_metadata_len = 0;
-
-      if (vbmeta_header.public_key_metadata_size > 0) {
-        pk_metadata = vbmeta_buf + sizeof(AvbVBMetaImageHeader) +
-                      vbmeta_header.authentication_data_block_size +
-                      vbmeta_header.public_key_metadata_offset;
-        pk_metadata_len = vbmeta_header.public_key_metadata_size;
-      }
-
-      avb_assert(is_main_vbmeta);
-      io_ret = ops->validate_vbmeta_public_key(
-          ops, pk_data, pk_len, pk_metadata, pk_metadata_len, &key_is_trusted);
-      if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-        ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-        goto out;
-      } else if (io_ret != AVB_IO_RESULT_OK) {
-        avb_errorv(full_partition_name,
-                   ": Error while checking public key used to sign data.\n",
-                   NULL);
-        ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
-        goto out;
-      }
-      if (!key_is_trusted) {
-        avb_errorv(full_partition_name,
-                   ": Public key used to sign data rejected.\n",
-                   NULL);
-        ret = AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED;
-        if (!allow_verification_error) {
-          goto out;
-        }
-      }
-    }
-  }
-
-  /* Check rollback index. */
-  io_ret = ops->read_rollback_index(
-      ops, rollback_index_location, &stored_rollback_index);
-  if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-    goto out;
-  } else if (io_ret != AVB_IO_RESULT_OK) {
-    avb_errorv(full_partition_name,
-               ": Error getting rollback index for location.\n",
-               NULL);
-    ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
-    goto out;
-  }
-  if (vbmeta_header.rollback_index < stored_rollback_index) {
-    avb_errorv(
-        full_partition_name,
-        ": Image rollback index is less than the stored rollback index.\n",
-        NULL);
-    ret = AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX;
-    if (!allow_verification_error) {
-      goto out;
-    }
-  }
-
-  /* Copy vbmeta to vbmeta_images before recursing. */
-  if (is_main_vbmeta) {
-    avb_assert(slot_data->num_vbmeta_images == 0);
-  } else {
-    avb_assert(slot_data->num_vbmeta_images > 0);
-  }
-  if (slot_data->num_vbmeta_images == MAX_NUMBER_OF_VBMETA_IMAGES) {
-    avb_errorv(full_partition_name, ": Too many vbmeta images.\n", NULL);
-    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-    goto out;
-  }
-  vbmeta_image_data = &slot_data->vbmeta_images[slot_data->num_vbmeta_images++];
-  vbmeta_image_data->partition_name = avb_strdup(partition_name);
-  vbmeta_image_data->vbmeta_data = vbmeta_buf;
-  /* Note that |vbmeta_buf| is actually |vbmeta_num_read| bytes long
-   * and this includes data past the end of the image. Pass the
-   * actual size of the vbmeta image. Also, no need to use
-   * avb_safe_add() since the header has already been verified.
-   */
-  vbmeta_image_data->vbmeta_size =
-      sizeof(AvbVBMetaImageHeader) +
-      vbmeta_header.authentication_data_block_size +
-      vbmeta_header.auxiliary_data_block_size;
-  vbmeta_image_data->verify_result = vbmeta_ret;
-
-  /* If verification has been disabled by setting a bit in the image,
-   * we're done... except that we need to load the entirety of the
-   * requested partitions.
-   */
-  if (vbmeta_header.flags & AVB_VBMETA_IMAGE_FLAGS_VERIFICATION_DISABLED) {
-    AvbSlotVerifyResult sub_ret;
-    avb_debugv(
-        full_partition_name, ": VERIFICATION_DISABLED bit is set.\n", NULL);
-    /* If load_requested_partitions() fail it is always a fatal
-     * failure (e.g. ERROR_INVALID_ARGUMENT, ERROR_OOM, etc.) rather
-     * than recoverable (e.g. one where result_should_continue()
-     * returns true) and we want to convey that error.
-     */
-    sub_ret = load_requested_partitions(
-        ops, requested_partitions, ab_suffix, slot_data);
-    if (sub_ret != AVB_SLOT_VERIFY_RESULT_OK) {
-      ret = sub_ret;
-    }
-    goto out;
-  }
-
-  /* Now go through all descriptors and take the appropriate action:
-   *
-   * - hash descriptor: Load data from partition, calculate hash, and
-   *   checks that it matches what's in the hash descriptor.
-   *
-   * - hashtree descriptor: Do nothing since verification happens
-   *   on-the-fly from within the OS. (Unless the descriptor uses a
-   *   persistent digest, in which case we need to find it).
-   *
-   * - chained partition descriptor: Load the footer, load the vbmeta
-   *   image, verify vbmeta image (includes rollback checks, hash
-   *   checks, bail on chained partitions).
-   */
-  descriptors =
-      avb_descriptor_get_all(vbmeta_buf, vbmeta_num_read, &num_descriptors);
-  for (n = 0; n < num_descriptors; n++) {
-    AvbDescriptor desc;
-
-    if (!avb_descriptor_validate_and_byteswap(descriptors[n], &desc)) {
-      avb_errorv(full_partition_name, ": Descriptor is invalid.\n", NULL);
-      ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-      goto out;
-    }
-
-    switch (desc.tag) {
-      case AVB_DESCRIPTOR_TAG_HASH: {
-        AvbSlotVerifyResult sub_ret;
-        sub_ret = load_and_verify_hash_partition(ops,
-                                                 requested_partitions,
-                                                 ab_suffix,
-                                                 allow_verification_error,
-                                                 descriptors[n],
-                                                 slot_data);
-        if (sub_ret != AVB_SLOT_VERIFY_RESULT_OK) {
-          ret = sub_ret;
-          if (!allow_verification_error || !result_should_continue(ret)) {
-            goto out;
-          }
-        }
-      } break;
-
-      case AVB_DESCRIPTOR_TAG_CHAIN_PARTITION: {
-        AvbSlotVerifyResult sub_ret;
-        AvbChainPartitionDescriptor chain_desc;
-        const uint8_t* chain_partition_name;
-        const uint8_t* chain_public_key;
-
-        /* Only allow CHAIN_PARTITION descriptors in the main vbmeta image. */
-        if (!is_main_vbmeta) {
-          avb_errorv(full_partition_name,
-                     ": Encountered chain descriptor not in main image.\n",
-                     NULL);
-          ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-          goto out;
-        }
-
-        if (!avb_chain_partition_descriptor_validate_and_byteswap(
-                (AvbChainPartitionDescriptor*)descriptors[n], &chain_desc)) {
-          avb_errorv(full_partition_name,
-                     ": Chain partition descriptor is invalid.\n",
-                     NULL);
-          ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-          goto out;
-        }
-
-        if (chain_desc.rollback_index_location == 0) {
-          avb_errorv(full_partition_name,
-                     ": Chain partition has invalid "
-                     "rollback_index_location field.\n",
-                     NULL);
-          ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-          goto out;
-        }
-
-        chain_partition_name = ((const uint8_t*)descriptors[n]) +
-                               sizeof(AvbChainPartitionDescriptor);
-        chain_public_key = chain_partition_name + chain_desc.partition_name_len;
-
-        sub_ret =
-            load_and_verify_vbmeta(ops,
-                                   requested_partitions,
-                                   ab_suffix,
-                                   allow_verification_error,
-                                   toplevel_vbmeta_flags,
-                                   chain_desc.rollback_index_location,
-                                   (const char*)chain_partition_name,
-                                   chain_desc.partition_name_len,
-                                   chain_public_key,
-                                   chain_desc.public_key_len,
-                                   slot_data,
-                                   NULL, /* out_algorithm_type */
-                                   NULL /* out_additional_cmdline_subst */);
-        if (sub_ret != AVB_SLOT_VERIFY_RESULT_OK) {
-          ret = sub_ret;
-          if (!result_should_continue(ret)) {
-            goto out;
-          }
-        }
-      } break;
-
-      case AVB_DESCRIPTOR_TAG_KERNEL_CMDLINE: {
-        const uint8_t* kernel_cmdline;
-        AvbKernelCmdlineDescriptor kernel_cmdline_desc;
-        bool apply_cmdline;
-
-        if (!avb_kernel_cmdline_descriptor_validate_and_byteswap(
-                (AvbKernelCmdlineDescriptor*)descriptors[n],
-                &kernel_cmdline_desc)) {
-          avb_errorv(full_partition_name,
-                     ": Kernel cmdline descriptor is invalid.\n",
-                     NULL);
-          ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-          goto out;
-        }
-
-        kernel_cmdline = ((const uint8_t*)descriptors[n]) +
-                         sizeof(AvbKernelCmdlineDescriptor);
-
-        if (!avb_validate_utf8(kernel_cmdline,
-                               kernel_cmdline_desc.kernel_cmdline_length)) {
-          avb_errorv(full_partition_name,
-                     ": Kernel cmdline is not valid UTF-8.\n",
-                     NULL);
-          ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-          goto out;
-        }
-
-        /* Compare the flags for top-level VBMeta struct with flags in
-         * the command-line descriptor so command-line snippets only
-         * intended for a certain mode (dm-verity enabled/disabled)
-         * are skipped if applicable.
-         */
-        apply_cmdline = true;
-        if (toplevel_vbmeta_flags & AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED) {
-          if (kernel_cmdline_desc.flags &
-              AVB_KERNEL_CMDLINE_FLAGS_USE_ONLY_IF_HASHTREE_NOT_DISABLED) {
-            apply_cmdline = false;
-          }
-        } else {
-          if (kernel_cmdline_desc.flags &
-              AVB_KERNEL_CMDLINE_FLAGS_USE_ONLY_IF_HASHTREE_DISABLED) {
-            apply_cmdline = false;
-          }
-        }
-
-        if (apply_cmdline) {
-          if (slot_data->cmdline == NULL) {
-            slot_data->cmdline =
-                avb_calloc(kernel_cmdline_desc.kernel_cmdline_length + 1);
-            if (slot_data->cmdline == NULL) {
-              ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-              goto out;
-            }
-            avb_memcpy(slot_data->cmdline,
-                       kernel_cmdline,
-                       kernel_cmdline_desc.kernel_cmdline_length);
-          } else {
-            /* new cmdline is: <existing_cmdline> + ' ' + <newcmdline> + '\0' */
-            size_t orig_size = avb_strlen(slot_data->cmdline);
-            size_t new_size =
-                orig_size + 1 + kernel_cmdline_desc.kernel_cmdline_length + 1;
-            char* new_cmdline = avb_calloc(new_size);
-            if (new_cmdline == NULL) {
-              ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-              goto out;
-            }
-            avb_memcpy(new_cmdline, slot_data->cmdline, orig_size);
-            new_cmdline[orig_size] = ' ';
-            avb_memcpy(new_cmdline + orig_size + 1,
-                       kernel_cmdline,
-                       kernel_cmdline_desc.kernel_cmdline_length);
-            avb_free(slot_data->cmdline);
-            slot_data->cmdline = new_cmdline;
-          }
-        }
-      } break;
-
-      case AVB_DESCRIPTOR_TAG_HASHTREE: {
-        AvbHashtreeDescriptor hashtree_desc;
-
-        if (!avb_hashtree_descriptor_validate_and_byteswap(
-                (AvbHashtreeDescriptor*)descriptors[n], &hashtree_desc)) {
-          avb_errorv(
-              full_partition_name, ": Hashtree descriptor is invalid.\n", NULL);
-          ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-          goto out;
-        }
-
-        /* We only need to continue when there is no digest in the descriptor.
-         * This is because the only processing here is to find the digest and
-         * make it available on the kernel command line.
-         */
-        if (hashtree_desc.root_digest_len == 0) {
-          char part_name[AVB_PART_NAME_MAX_SIZE];
-          size_t digest_len = 0;
-          uint8_t digest_buf[AVB_SHA512_DIGEST_SIZE];
-          const uint8_t* desc_partition_name =
-              ((const uint8_t*)descriptors[n]) + sizeof(AvbHashtreeDescriptor);
-
-          if (!avb_validate_utf8(desc_partition_name,
-                                 hashtree_desc.partition_name_len)) {
-            avb_error("Partition name is not valid UTF-8.\n");
-            ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-            goto out;
-          }
-
-          /* No ab_suffix for partitions without a digest in the descriptor
-           * because these partitions hold data unique to this device and are
-           * not updated using an A/B scheme.
-           */
-          if ((hashtree_desc.flags &
-               AVB_HASHTREE_DESCRIPTOR_FLAGS_DO_NOT_USE_AB) == 0 &&
-              avb_strlen(ab_suffix) != 0) {
-            avb_error("Cannot use A/B with a persistent root digest.\n");
-            ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-            goto out;
-          }
-          if (hashtree_desc.partition_name_len >= AVB_PART_NAME_MAX_SIZE) {
-            avb_error("Partition name does not fit.\n");
-            ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-            goto out;
-          }
-          avb_memcpy(
-              part_name, desc_partition_name, hashtree_desc.partition_name_len);
-          part_name[hashtree_desc.partition_name_len] = '\0';
-
-          /* Determine the expected digest size from the hash algorithm. */
-          if (avb_strcmp((const char*)hashtree_desc.hash_algorithm, "sha1") ==
-              0) {
-            digest_len = AVB_SHA1_DIGEST_SIZE;
-          } else if (avb_strcmp((const char*)hashtree_desc.hash_algorithm,
-                                "sha256") == 0) {
-            digest_len = AVB_SHA256_DIGEST_SIZE;
-          } else if (avb_strcmp((const char*)hashtree_desc.hash_algorithm,
-                                "sha512") == 0) {
-            digest_len = AVB_SHA512_DIGEST_SIZE;
-          } else {
-            avb_errorv(part_name, ": Unsupported hash algorithm.\n", NULL);
-            ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-            goto out;
-          }
-
-          ret = read_persistent_digest(ops, part_name, digest_len, digest_buf);
-          if (ret != AVB_SLOT_VERIFY_RESULT_OK) {
-            goto out;
-          }
-
-          if (out_additional_cmdline_subst) {
-            ret =
-                avb_add_root_digest_substitution(part_name,
-                                                 digest_buf,
-                                                 digest_len,
-                                                 out_additional_cmdline_subst);
-            if (ret != AVB_SLOT_VERIFY_RESULT_OK) {
-              goto out;
-            }
-          }
-        }
-      } break;
-
-      case AVB_DESCRIPTOR_TAG_PROPERTY:
-        /* Do nothing. */
-        break;
-    }
-  }
-
-  if (rollback_index_location >= AVB_MAX_NUMBER_OF_ROLLBACK_INDEX_LOCATIONS) {
-    avb_errorv(
-        full_partition_name, ": Invalid rollback_index_location.\n", NULL);
-    ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-    goto out;
-  }
-
-  slot_data->rollback_indexes[rollback_index_location] =
-      vbmeta_header.rollback_index;
-
-  if (out_algorithm_type != NULL) {
-    *out_algorithm_type = (AvbAlgorithmType)vbmeta_header.algorithm_type;
-  }
-
-out:
-  /* If |vbmeta_image_data| isn't NULL it means that it adopted
-   * |vbmeta_buf| so in that case don't free it here.
-   */
-  if (vbmeta_image_data == NULL) {
-    if (vbmeta_buf != NULL) {
-      avb_free(vbmeta_buf);
-    }
-  }
-  if (descriptors != NULL) {
-    avb_free(descriptors);
-  }
-  return ret;
-}
-
-AvbSlotVerifyResult avb_slot_verify(AvbOps* ops,
-                                    const char* const* requested_partitions,
-                                    const char* ab_suffix,
-                                    AvbSlotVerifyFlags flags,
-                                    AvbHashtreeErrorMode hashtree_error_mode,
-                                    AvbSlotVerifyData** out_data) {
-  AvbSlotVerifyResult ret;
-  AvbSlotVerifyData* slot_data = NULL;
-  AvbAlgorithmType algorithm_type = AVB_ALGORITHM_TYPE_NONE;
-  bool using_boot_for_vbmeta = false;
-  AvbVBMetaImageHeader toplevel_vbmeta;
-  bool allow_verification_error =
-      (flags & AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR);
-  AvbCmdlineSubstList* additional_cmdline_subst = NULL;
-
-  /* Fail early if we're missing the AvbOps needed for slot verification.
-   *
-   * For now, handle get_size_of_partition() not being implemented. In
-   * a later release we may change that.
-   */
-  avb_assert(ops->read_is_device_unlocked != NULL);
-  avb_assert(ops->read_from_partition != NULL);
-  avb_assert(ops->validate_vbmeta_public_key != NULL);
-  avb_assert(ops->read_rollback_index != NULL);
-  avb_assert(ops->get_unique_guid_for_partition != NULL);
-
-  if (out_data != NULL) {
-    *out_data = NULL;
-  }
-
-  /* Allowing dm-verity errors defeats the purpose of verified boot so
-   * only allow this if set up to allow verification errors
-   * (e.g. typically only UNLOCKED mode).
-   */
-  if (hashtree_error_mode == AVB_HASHTREE_ERROR_MODE_LOGGING &&
-      !allow_verification_error) {
-    ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT;
-    goto fail;
-  }
-
-  slot_data = avb_calloc(sizeof(AvbSlotVerifyData));
-  if (slot_data == NULL) {
-    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-    goto fail;
-  }
-  slot_data->vbmeta_images =
-      avb_calloc(sizeof(AvbVBMetaData) * MAX_NUMBER_OF_VBMETA_IMAGES);
-  if (slot_data->vbmeta_images == NULL) {
-    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-    goto fail;
-  }
-  slot_data->loaded_partitions =
-      avb_calloc(sizeof(AvbPartitionData) * MAX_NUMBER_OF_LOADED_PARTITIONS);
-  if (slot_data->loaded_partitions == NULL) {
-    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-    goto fail;
-  }
-
-  additional_cmdline_subst = avb_new_cmdline_subst_list();
-  if (additional_cmdline_subst == NULL) {
-    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-    goto fail;
-  }
-
-  ret = load_and_verify_vbmeta(ops,
-                               requested_partitions,
-                               ab_suffix,
-                               allow_verification_error,
-                               0 /* toplevel_vbmeta_flags */,
-                               0 /* rollback_index_location */,
-                               "vbmeta",
-                               avb_strlen("vbmeta"),
-                               NULL /* expected_public_key */,
-                               0 /* expected_public_key_length */,
-                               slot_data,
-                               &algorithm_type,
-                               additional_cmdline_subst);
-  if (!allow_verification_error && ret != AVB_SLOT_VERIFY_RESULT_OK) {
-    goto fail;
-  }
-
-  /* If things check out, mangle the kernel command-line as needed. */
-  if (result_should_continue(ret)) {
-    if (avb_strcmp(slot_data->vbmeta_images[0].partition_name, "vbmeta") != 0) {
-      avb_assert(
-          avb_strcmp(slot_data->vbmeta_images[0].partition_name, "boot") == 0);
-      using_boot_for_vbmeta = true;
-    }
-
-    /* Byteswap top-level vbmeta header since we'll need it below. */
-    avb_vbmeta_image_header_to_host_byte_order(
-        (const AvbVBMetaImageHeader*)slot_data->vbmeta_images[0].vbmeta_data,
-        &toplevel_vbmeta);
-
-    /* Fill in |ab_suffix| field. */
-    slot_data->ab_suffix = avb_strdup(ab_suffix);
-    if (slot_data->ab_suffix == NULL) {
-      ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-      goto fail;
-    }
-
-    /* If verification is disabled, we are done ... we specifically
-     * don't want to add any androidboot.* options since verification
-     * is disabled.
-     */
-    if (toplevel_vbmeta.flags & AVB_VBMETA_IMAGE_FLAGS_VERIFICATION_DISABLED) {
-      /* Since verification is disabled we didn't process any
-       * descriptors and thus there's no cmdline... so set root= such
-       * that the system partition is mounted.
-       */
-      avb_assert(slot_data->cmdline == NULL);
-      slot_data->cmdline =
-          avb_strdup("root=PARTUUID=$(ANDROID_SYSTEM_PARTUUID)");
-      if (slot_data->cmdline == NULL) {
-        ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-        goto fail;
-      }
-    } else {
-      /* Add options - any failure in avb_append_options() is either an
-       * I/O or OOM error.
-       */
-      AvbSlotVerifyResult sub_ret = avb_append_options(ops,
-                                                       slot_data,
-                                                       &toplevel_vbmeta,
-                                                       algorithm_type,
-                                                       hashtree_error_mode);
-      if (sub_ret != AVB_SLOT_VERIFY_RESULT_OK) {
-        ret = sub_ret;
-        goto fail;
-      }
-    }
-
-    /* Substitute $(ANDROID_SYSTEM_PARTUUID) and friends. */
-    if (slot_data->cmdline != NULL) {
-      char* new_cmdline;
-      new_cmdline = avb_sub_cmdline(ops,
-                                    slot_data->cmdline,
-                                    ab_suffix,
-                                    using_boot_for_vbmeta,
-                                    additional_cmdline_subst);
-      if (new_cmdline != slot_data->cmdline) {
-        if (new_cmdline == NULL) {
-          ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-          goto fail;
-        }
-        avb_free(slot_data->cmdline);
-        slot_data->cmdline = new_cmdline;
-      }
-    }
-
-    if (out_data != NULL) {
-      *out_data = slot_data;
-    } else {
-      avb_slot_verify_data_free(slot_data);
-    }
-  }
-
-  avb_free_cmdline_subst_list(additional_cmdline_subst);
-  additional_cmdline_subst = NULL;
-
-  if (!allow_verification_error) {
-    avb_assert(ret == AVB_SLOT_VERIFY_RESULT_OK);
-  }
-
-  return ret;
-
-fail:
-  if (slot_data != NULL) {
-    avb_slot_verify_data_free(slot_data);
-  }
-  if (additional_cmdline_subst != NULL) {
-    avb_free_cmdline_subst_list(additional_cmdline_subst);
-  }
-  return ret;
-}
-
-void avb_slot_verify_data_free(AvbSlotVerifyData* data) {
-  if (data->ab_suffix != NULL) {
-    avb_free(data->ab_suffix);
-  }
-  if (data->cmdline != NULL) {
-    avb_free(data->cmdline);
-  }
-  if (data->vbmeta_images != NULL) {
-    size_t n;
-    for (n = 0; n < data->num_vbmeta_images; n++) {
-      AvbVBMetaData* vbmeta_image = &data->vbmeta_images[n];
-      if (vbmeta_image->partition_name != NULL) {
-        avb_free(vbmeta_image->partition_name);
-      }
-      if (vbmeta_image->vbmeta_data != NULL) {
-        avb_free(vbmeta_image->vbmeta_data);
-      }
-    }
-    avb_free(data->vbmeta_images);
-  }
-  if (data->loaded_partitions != NULL) {
-    size_t n;
-    for (n = 0; n < data->num_loaded_partitions; n++) {
-      AvbPartitionData* loaded_partition = &data->loaded_partitions[n];
-      if (loaded_partition->partition_name != NULL) {
-        avb_free(loaded_partition->partition_name);
-      }
-      if (loaded_partition->data != NULL && !loaded_partition->preloaded) {
-        sysmem_free((phys_addr_t)loaded_partition->data);
-      }
-    }
-    avb_free(data->loaded_partitions);
-  }
-  avb_free(data);
-}
-
-const char* avb_slot_verify_result_to_string(AvbSlotVerifyResult result) {
-  const char* ret = NULL;
-
-  switch (result) {
-    case AVB_SLOT_VERIFY_RESULT_OK:
-      ret = "OK";
-      break;
-    case AVB_SLOT_VERIFY_RESULT_ERROR_OOM:
-      ret = "ERROR_OOM";
-      break;
-    case AVB_SLOT_VERIFY_RESULT_ERROR_IO:
-      ret = "ERROR_IO";
-      break;
-    case AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION:
-      ret = "ERROR_VERIFICATION";
-      break;
-    case AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX:
-      ret = "ERROR_ROLLBACK_INDEX";
-      break;
-    case AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED:
-      ret = "ERROR_PUBLIC_KEY_REJECTED";
-      break;
-    case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA:
-      ret = "ERROR_INVALID_METADATA";
-      break;
-    case AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION:
-      ret = "ERROR_UNSUPPORTED_VERSION";
-      break;
-    case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT:
-      ret = "ERROR_INVALID_ARGUMENT";
-      break;
-      /* Do not add a 'default:' case here because of -Wswitch. */
-  }
-
-  if (ret == NULL) {
-    avb_error("Unknown AvbSlotVerifyResult value.\n");
-    ret = "(unknown)";
-  }
-
-  return ret;
-}
-
-void avb_slot_verify_data_calculate_vbmeta_digest(AvbSlotVerifyData* data,
-                                                  AvbDigestType digest_type,
-                                                  uint8_t* out_digest) {
-  bool ret = false;
-  size_t n;
-
-  switch (digest_type) {
-    case AVB_DIGEST_TYPE_SHA256: {
-      AvbSHA256Ctx ctx;
-      avb_sha256_init(&ctx);
-      for (n = 0; n < data->num_vbmeta_images; n++) {
-        avb_sha256_update(&ctx,
-                          data->vbmeta_images[n].vbmeta_data,
-                          data->vbmeta_images[n].vbmeta_size);
-      }
-      avb_memcpy(out_digest, avb_sha256_final(&ctx), AVB_SHA256_DIGEST_SIZE);
-      ret = true;
-    } break;
-
-    case AVB_DIGEST_TYPE_SHA512: {
-      AvbSHA512Ctx ctx;
-      avb_sha512_init(&ctx);
-      for (n = 0; n < data->num_vbmeta_images; n++) {
-        avb_sha512_update(&ctx,
-                          data->vbmeta_images[n].vbmeta_data,
-                          data->vbmeta_images[n].vbmeta_size);
-      }
-      avb_memcpy(out_digest, avb_sha512_final(&ctx), AVB_SHA512_DIGEST_SIZE);
-      ret = true;
-    } break;
-
-      /* Do not add a 'default:' case here because of -Wswitch. */
-  }
-
-  if (!ret) {
-    avb_fatal("Unknown digest type");
-  }
-}
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#include <common.h>
+#include <sysmem.h>
+#include <android_avb/avb_slot_verify.h>
+#include <android_avb/avb_chain_partition_descriptor.h>
+#include <android_avb/avb_cmdline.h>
+#include <android_avb/avb_footer.h>
+#include <android_avb/avb_hash_descriptor.h>
+#include <android_avb/avb_hashtree_descriptor.h>
+#include <android_avb/avb_kernel_cmdline_descriptor.h>
+#include <android_avb/avb_sha.h>
+#include <android_avb/avb_util.h>
+#include <android_avb/avb_vbmeta_image.h>
+#include <android_avb/avb_version.h>
+
+/* Maximum number of partitions that can be loaded with avb_slot_verify(). */
+#define MAX_NUMBER_OF_LOADED_PARTITIONS 32
+
+/* Maximum number of vbmeta images that can be loaded with avb_slot_verify(). */
+#define MAX_NUMBER_OF_VBMETA_IMAGES 32
+
+/* Maximum size of a vbmeta image - 64 KiB. */
+#define VBMETA_MAX_SIZE (64 * 1024)
+
+static AvbSlotVerifyResult initialize_persistent_digest(
+    AvbOps* ops,
+    const char* part_name,
+    const char* persistent_value_name,
+    size_t digest_size,
+    const uint8_t* initial_digest,
+    uint8_t* out_digest);
+
+/* Helper function to see if we should continue with verification in
+ * allow_verification_error=true mode if something goes wrong. See the
+ * comments for the avb_slot_verify() function for more information.
+ */
+static inline bool result_should_continue(AvbSlotVerifyResult result) {
+  switch (result) {
+    case AVB_SLOT_VERIFY_RESULT_ERROR_OOM:
+    case AVB_SLOT_VERIFY_RESULT_ERROR_IO:
+    case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA:
+    case AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION:
+    case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT:
+      return false;
+
+    case AVB_SLOT_VERIFY_RESULT_OK:
+    case AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION:
+    case AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX:
+    case AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED:
+      return true;
+  }
+
+  return false;
+}
+
+static AvbSlotVerifyResult load_full_partition(AvbOps* ops,
+                                               const char* part_name,
+                                               uint64_t image_size,
+                                               uint8_t** out_image_buf,
+                                               bool* out_image_preloaded) {
+  size_t part_num_read;
+  AvbIOResult io_ret;
+
+  /* Make sure that we do not overwrite existing data. */
+  avb_assert(*out_image_buf == NULL);
+  avb_assert(!*out_image_preloaded);
+
+  /* We are going to implicitly cast image_size from uint64_t to size_t in the
+   * following code, so we need to make sure that the cast is safe. */
+  if (image_size != (size_t)(image_size)) {
+    avb_errorv(part_name, ": Partition size too large to load.\n", NULL);
+    return AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+  }
+
+  /* Try use a preloaded one. */
+  if (ops->get_preloaded_partition != NULL) {
+    io_ret = ops->get_preloaded_partition(
+        ops, part_name, image_size, out_image_buf, &part_num_read);
+    if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+      return AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    } else if (io_ret != AVB_IO_RESULT_OK) {
+      avb_errorv(part_name, ": Error loading data from partition.\n", NULL);
+      return AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+    }
+
+    if (*out_image_buf != NULL) {
+      if (part_num_read != image_size) {
+        avb_errorv(part_name, ": Read incorrect number of bytes.\n", NULL);
+        return AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+      }
+      *out_image_preloaded = true;
+    }
+  }
+
+  /* Allocate and copy the partition. */
+  if (!*out_image_preloaded) {
+    *out_image_buf = sysmem_alloc(MEMBLK_ID_AVB_ANDROID, image_size);
+    if (*out_image_buf == NULL) {
+      return AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    }
+
+    io_ret = ops->read_from_partition(ops,
+                                      part_name,
+                                      0 /* offset */,
+                                      image_size,
+                                      *out_image_buf,
+                                      &part_num_read);
+    if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+      return AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    } else if (io_ret != AVB_IO_RESULT_OK) {
+      avb_errorv(part_name, ": Error loading data from partition.\n", NULL);
+      return AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+    }
+    if (part_num_read != image_size) {
+      avb_errorv(part_name, ": Read incorrect number of bytes.\n", NULL);
+      return AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+    }
+  }
+
+  return AVB_SLOT_VERIFY_RESULT_OK;
+}
+
+/* Reads a persistent digest stored as a named persistent value corresponding to
+ * the given |part_name|. The value is returned in |out_digest| which must point
+ * to |expected_digest_size| bytes. If there is no digest stored for |part_name|
+ * it can be initialized by providing a non-NULL |initial_digest| of length
+ * |expected_digest_size|. This automatic initialization will only occur if the
+ * device is currently locked. The |initial_digest| may be NULL.
+ *
+ * Returns AVB_SLOT_VERIFY_RESULT_OK on success, otherwise returns an
+ * AVB_SLOT_VERIFY_RESULT_ERROR_* error code.
+ *
+ * If the value does not exist, is not supported, or is not populated, and
+ * |initial_digest| is NULL, returns
+ * AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA. If |expected_digest_size| does
+ * not match the stored digest size, also returns
+ * AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA.
+ */
+static AvbSlotVerifyResult read_persistent_digest(AvbOps* ops,
+                                                  const char* part_name,
+                                                  size_t expected_digest_size,
+                                                  const uint8_t* initial_digest,
+                                                  uint8_t* out_digest) {
+  char* persistent_value_name = NULL;
+  AvbIOResult io_ret = AVB_IO_RESULT_OK;
+  size_t stored_digest_size = 0;
+
+  if (ops->read_persistent_value == NULL) {
+    avb_errorv(part_name, ": Persistent values are not implemented.\n", NULL);
+    return AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+  }
+  persistent_value_name =
+      avb_strdupv(AVB_NPV_PERSISTENT_DIGEST_PREFIX, part_name, NULL);
+  if (persistent_value_name == NULL) {
+    return AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+  }
+
+  io_ret = ops->read_persistent_value(ops,
+                                      persistent_value_name,
+                                      expected_digest_size,
+                                      out_digest,
+                                      &stored_digest_size);
+
+  // If no such named persistent value exists and an initial digest value was
+  // given, initialize the named persistent value with the given digest. If
+  // initialized successfully, this will recurse into this function but with a
+  // NULL initial_digest.
+  if (io_ret == AVB_IO_RESULT_ERROR_NO_SUCH_VALUE && initial_digest) {
+    AvbSlotVerifyResult ret =
+        initialize_persistent_digest(ops,
+                                     part_name,
+                                     persistent_value_name,
+                                     expected_digest_size,
+                                     initial_digest,
+                                     out_digest);
+    avb_free(persistent_value_name);
+    return ret;
+  }
+  avb_free(persistent_value_name);
+
+  if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+    return AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+  } else if (io_ret == AVB_IO_RESULT_ERROR_NO_SUCH_VALUE) {
+    // Treat a missing persistent value as a verification error, which is
+    // ignoreable, rather than a metadata error which is not.
+    avb_errorv(part_name, ": Persistent digest does not exist.\n", NULL);
+    return AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION;
+  } else if (io_ret == AVB_IO_RESULT_ERROR_INVALID_VALUE_SIZE ||
+             io_ret == AVB_IO_RESULT_ERROR_INSUFFICIENT_SPACE) {
+    avb_errorv(
+        part_name, ": Persistent digest is not of expected size.\n", NULL);
+    return AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+  } else if (io_ret != AVB_IO_RESULT_OK) {
+    avb_errorv(part_name, ": Error reading persistent digest.\n", NULL);
+    return AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+  } else if (expected_digest_size != stored_digest_size) {
+    avb_errorv(
+        part_name, ": Persistent digest is not of expected size.\n", NULL);
+    return AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+  }
+  return AVB_SLOT_VERIFY_RESULT_OK;
+}
+
+static AvbSlotVerifyResult initialize_persistent_digest(
+    AvbOps* ops,
+    const char* part_name,
+    const char* persistent_value_name,
+    size_t digest_size,
+    const uint8_t* initial_digest,
+    uint8_t* out_digest) {
+  AvbSlotVerifyResult ret;
+  AvbIOResult io_ret = AVB_IO_RESULT_OK;
+  bool is_device_unlocked = true;
+
+  io_ret = ops->read_is_device_unlocked(ops, &is_device_unlocked);
+  if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+    return AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+  } else if (io_ret != AVB_IO_RESULT_OK) {
+    avb_error("Error getting device lock state.\n");
+    return AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+  }
+
+  if (is_device_unlocked) {
+    avb_debugv(part_name,
+               ": Digest does not exist, device unlocked so not initializing "
+               "digest.\n",
+               NULL);
+    return AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION;
+  }
+
+  // Device locked; initialize digest with given initial value.
+  avb_debugv(part_name,
+             ": Digest does not exist, initializing persistent digest.\n",
+             NULL);
+  io_ret = ops->write_persistent_value(
+      ops, persistent_value_name, digest_size, initial_digest);
+  if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+    return AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+  } else if (io_ret != AVB_IO_RESULT_OK) {
+    avb_errorv(part_name, ": Error initializing persistent digest.\n", NULL);
+    return AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+  }
+
+  // To ensure that the digest value was written successfully - and avoid a
+  // scenario where the digest is simply 'initialized' on every verify - recurse
+  // into read_persistent_digest to read back the written value. The NULL
+  // initial_digest ensures that this will not recurse again.
+  ret = read_persistent_digest(ops, part_name, digest_size, NULL, out_digest);
+  if (ret != AVB_SLOT_VERIFY_RESULT_OK) {
+    avb_errorv(part_name,
+               ": Reading back initialized persistent digest failed!\n",
+               NULL);
+  }
+  return ret;
+}
+
+static AvbSlotVerifyResult load_and_verify_hash_partition(
+    AvbOps* ops,
+    const char* const* requested_partitions,
+    const char* ab_suffix,
+    bool allow_verification_error,
+    const AvbDescriptor* descriptor,
+    AvbSlotVerifyData* slot_data) {
+  AvbHashDescriptor hash_desc;
+  const uint8_t* desc_partition_name = NULL;
+  const uint8_t* desc_salt;
+  const uint8_t* desc_digest;
+  char part_name[AVB_PART_NAME_MAX_SIZE];
+  AvbSlotVerifyResult ret;
+  AvbIOResult io_ret;
+  uint8_t* image_buf = NULL;
+  bool image_preloaded = false;
+  uint8_t* digest;
+  size_t digest_len;
+  const char* found;
+  uint64_t image_size;
+  size_t expected_digest_len = 0;
+  uint8_t expected_digest_buf[AVB_SHA512_DIGEST_SIZE];
+  const uint8_t* expected_digest = NULL;
+
+  if (!avb_hash_descriptor_validate_and_byteswap(
+          (const AvbHashDescriptor*)descriptor, &hash_desc)) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+    goto out;
+  }
+
+  desc_partition_name =
+      ((const uint8_t*)descriptor) + sizeof(AvbHashDescriptor);
+  desc_salt = desc_partition_name + hash_desc.partition_name_len;
+  desc_digest = desc_salt + hash_desc.salt_len;
+
+  if (!avb_validate_utf8(desc_partition_name, hash_desc.partition_name_len)) {
+    avb_error("Partition name is not valid UTF-8.\n");
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+    goto out;
+  }
+
+  /* Don't bother loading or validating unless the partition was
+   * requested in the first place.
+   */
+  found = avb_strv_find_str(requested_partitions,
+                            (const char*)desc_partition_name,
+                            hash_desc.partition_name_len);
+  if (found == NULL) {
+    ret = AVB_SLOT_VERIFY_RESULT_OK;
+    goto out;
+  }
+
+  if ((hash_desc.flags & AVB_HASH_DESCRIPTOR_FLAGS_DO_NOT_USE_AB) != 0) {
+    /* No ab_suffix, just copy the partition name as is. */
+    if (hash_desc.partition_name_len >= AVB_PART_NAME_MAX_SIZE) {
+      avb_error("Partition name does not fit.\n");
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+      goto out;
+    }
+    avb_memcpy(part_name, desc_partition_name, hash_desc.partition_name_len);
+    part_name[hash_desc.partition_name_len] = '\0';
+  } else if (hash_desc.digest_len == 0 && avb_strlen(ab_suffix) != 0) {
+    /* No ab_suffix allowed for partitions without a digest in the descriptor
+     * because these partitions hold data unique to this device and are not
+     * updated using an A/B scheme.
+     */
+    avb_error("Cannot use A/B with a persistent digest.\n");
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+    goto out;
+  } else {
+    /* Add ab_suffix to the partition name. */
+    if (!avb_str_concat(part_name,
+                        sizeof part_name,
+                        (const char*)desc_partition_name,
+                        hash_desc.partition_name_len,
+                        ab_suffix,
+                        avb_strlen(ab_suffix))) {
+      avb_error("Partition name and suffix does not fit.\n");
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+      goto out;
+    }
+  }
+
+  /* If we're allowing verification errors then hash_desc.image_size
+   * may no longer match what's in the partition... so in this case
+   * just load the entire partition.
+   *
+   * For example, this can happen if a developer does 'fastboot flash
+   * boot /path/to/new/and/bigger/boot.img'. We want this to work
+   * since it's such a common workflow.
+   */
+  image_size = hash_desc.image_size;
+  if (allow_verification_error) {
+    io_ret = ops->get_size_of_partition(ops, part_name, &image_size);
+    if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+      goto out;
+    } else if (io_ret != AVB_IO_RESULT_OK) {
+      avb_errorv(part_name, ": Error determining partition size.\n", NULL);
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+      goto out;
+    }
+    avb_debugv(part_name, ": Loading entire partition.\n", NULL);
+  }
+
+  ret = load_full_partition(
+      ops, part_name, image_size, &image_buf, &image_preloaded);
+  if (ret != AVB_SLOT_VERIFY_RESULT_OK) {
+    goto out;
+  }
+  // Although only one of the type might be used, we have to defined the
+  // structure here so that they would live outside the 'if/else' scope to be
+  // used later.
+  AvbSHA256Ctx sha256_ctx;
+  AvbSHA512Ctx sha512_ctx;
+  size_t image_size_to_hash = hash_desc.image_size;
+  // If we allow verification error and the whole partition is smaller than
+  // image size in hash descriptor, we just hash the whole partition.
+  if (image_size_to_hash > image_size) {
+    image_size_to_hash = image_size;
+  }
+  if (avb_strcmp((const char*)hash_desc.hash_algorithm, "sha256") == 0) {
+    avb_sha256_init(&sha256_ctx);
+    avb_sha256_update(&sha256_ctx, desc_salt, hash_desc.salt_len);
+    avb_sha256_update(&sha256_ctx, image_buf, image_size_to_hash);
+    digest = avb_sha256_final(&sha256_ctx);
+    digest_len = AVB_SHA256_DIGEST_SIZE;
+  } else if (avb_strcmp((const char*)hash_desc.hash_algorithm, "sha512") == 0) {
+    avb_sha512_init(&sha512_ctx);
+    avb_sha512_update(&sha512_ctx, desc_salt, hash_desc.salt_len);
+    avb_sha512_update(&sha512_ctx, image_buf, image_size_to_hash);
+    digest = avb_sha512_final(&sha512_ctx);
+    digest_len = AVB_SHA512_DIGEST_SIZE;
+  } else {
+    avb_errorv(part_name, ": Unsupported hash algorithm.\n", NULL);
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+    goto out;
+  }
+
+  if (hash_desc.digest_len == 0) {
+    /* Expect a match to a persistent digest. */
+    avb_debugv(part_name, ": No digest, using persistent digest.\n", NULL);
+    expected_digest_len = digest_len;
+    expected_digest = expected_digest_buf;
+    avb_assert(expected_digest_len <= sizeof(expected_digest_buf));
+    /* Pass |digest| as the |initial_digest| so devices not yet initialized get
+     * initialized to the current partition digest.
+     */
+    ret = read_persistent_digest(
+        ops, part_name, digest_len, digest, expected_digest_buf);
+    if (ret != AVB_SLOT_VERIFY_RESULT_OK) {
+      goto out;
+    }
+  } else {
+    /* Expect a match to the digest in the descriptor. */
+    expected_digest_len = hash_desc.digest_len;
+    expected_digest = desc_digest;
+  }
+
+  if (digest_len != expected_digest_len) {
+    avb_errorv(
+        part_name, ": Digest in descriptor not of expected size.\n", NULL);
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+    goto out;
+  }
+
+  if (avb_safe_memcmp(digest, expected_digest, digest_len) != 0) {
+    avb_errorv(part_name,
+               ": Hash of data does not match digest in descriptor.\n",
+               NULL);
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION;
+    goto out;
+  }
+
+  ret = AVB_SLOT_VERIFY_RESULT_OK;
+
+out:
+
+  /* If it worked and something was loaded, copy to slot_data. */
+  if ((ret == AVB_SLOT_VERIFY_RESULT_OK || result_should_continue(ret)) &&
+      image_buf != NULL) {
+    AvbPartitionData* loaded_partition;
+    if (slot_data->num_loaded_partitions == MAX_NUMBER_OF_LOADED_PARTITIONS) {
+      avb_errorv(part_name, ": Too many loaded partitions.\n", NULL);
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+      goto fail;
+    }
+    loaded_partition =
+        &slot_data->loaded_partitions[slot_data->num_loaded_partitions++];
+    loaded_partition->partition_name = avb_strdup(found);
+    loaded_partition->data_size = image_size;
+    loaded_partition->data = image_buf;
+    loaded_partition->preloaded = image_preloaded;
+    image_buf = NULL;
+  }
+
+fail:
+  if (image_buf != NULL && !image_preloaded) {
+    sysmem_free((phys_addr_t)image_buf);
+  }
+  return ret;
+}
+
+static AvbSlotVerifyResult load_requested_partitions(
+    AvbOps* ops,
+    const char* const* requested_partitions,
+    const char* ab_suffix,
+    AvbSlotVerifyData* slot_data) {
+  AvbSlotVerifyResult ret;
+  uint8_t* image_buf = NULL;
+  bool image_preloaded = false;
+  size_t n;
+
+  for (n = 0; requested_partitions[n] != NULL; n++) {
+    char part_name[AVB_PART_NAME_MAX_SIZE];
+    AvbIOResult io_ret;
+    uint64_t image_size;
+    AvbPartitionData* loaded_partition;
+
+    if (!avb_str_concat(part_name,
+                        sizeof part_name,
+                        requested_partitions[n],
+                        avb_strlen(requested_partitions[n]),
+                        ab_suffix,
+                        avb_strlen(ab_suffix))) {
+      avb_error("Partition name and suffix does not fit.\n");
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+      goto out;
+    }
+
+    io_ret = ops->get_size_of_partition(ops, part_name, &image_size);
+    if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+      goto out;
+    } else if (io_ret != AVB_IO_RESULT_OK) {
+      avb_errorv(part_name, ": Error determining partition size.\n", NULL);
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+      goto out;
+    }
+    avb_debugv(part_name, ": Loading entire partition.\n", NULL);
+
+    ret = load_full_partition(
+        ops, part_name, image_size, &image_buf, &image_preloaded);
+    if (ret != AVB_SLOT_VERIFY_RESULT_OK) {
+      goto out;
+    }
+
+    /* Move to slot_data. */
+    if (slot_data->num_loaded_partitions == MAX_NUMBER_OF_LOADED_PARTITIONS) {
+      avb_errorv(part_name, ": Too many loaded partitions.\n", NULL);
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+      goto out;
+    }
+    loaded_partition =
+        &slot_data->loaded_partitions[slot_data->num_loaded_partitions++];
+    loaded_partition->partition_name = avb_strdup(requested_partitions[n]);
+    if (loaded_partition->partition_name == NULL) {
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+      goto out;
+    }
+    loaded_partition->data_size = image_size;
+    loaded_partition->data = image_buf; /* Transferring the owner. */
+    loaded_partition->preloaded = image_preloaded;
+    image_buf = NULL;
+    image_preloaded = false;
+  }
+
+  ret = AVB_SLOT_VERIFY_RESULT_OK;
+
+out:
+  /* Free the current buffer if any. */
+  if (image_buf != NULL && !image_preloaded) {
+    sysmem_free((phys_addr_t)image_buf);
+  }
+  /* Buffers that are already saved in slot_data will be handled by the caller
+   * even on failure. */
+  return ret;
+}
+
+static AvbSlotVerifyResult load_and_verify_vbmeta(
+    AvbOps* ops,
+    const char* const* requested_partitions,
+    const char* ab_suffix,
+    AvbSlotVerifyFlags flags,
+    bool allow_verification_error,
+    AvbVBMetaImageFlags toplevel_vbmeta_flags,
+    int rollback_index_location,
+    const char* partition_name,
+    size_t partition_name_len,
+    const uint8_t* expected_public_key,
+    size_t expected_public_key_length,
+    AvbSlotVerifyData* slot_data,
+    AvbAlgorithmType* out_algorithm_type,
+    AvbCmdlineSubstList* out_additional_cmdline_subst) {
+  char full_partition_name[AVB_PART_NAME_MAX_SIZE];
+  AvbSlotVerifyResult ret;
+  AvbIOResult io_ret;
+  uint64_t vbmeta_offset;
+  size_t vbmeta_size;
+  uint8_t* vbmeta_buf = NULL;
+  size_t vbmeta_num_read;
+  AvbVBMetaVerifyResult vbmeta_ret;
+  const uint8_t* pk_data;
+  size_t pk_len;
+  AvbVBMetaImageHeader vbmeta_header;
+  uint64_t stored_rollback_index;
+  const AvbDescriptor** descriptors = NULL;
+  size_t num_descriptors;
+  size_t n;
+  bool is_main_vbmeta;
+  bool look_for_vbmeta_footer;
+  AvbVBMetaData* vbmeta_image_data = NULL;
+
+  ret = AVB_SLOT_VERIFY_RESULT_OK;
+
+  avb_assert(slot_data != NULL);
+
+  /* Since we allow top-level vbmeta in 'boot', use
+   * rollback_index_location to determine whether we're the main
+   * vbmeta struct.
+   */
+  is_main_vbmeta = false;
+  if (rollback_index_location == 0) {
+    if ((flags & AVB_SLOT_VERIFY_FLAGS_NO_VBMETA_PARTITION) == 0) {
+      is_main_vbmeta = true;
+    }
+  }
+
+  /* Don't use footers for vbmeta partitions ('vbmeta' or
+   * 'vbmeta_<partition_name>').
+   */
+  look_for_vbmeta_footer = true;
+  if (avb_strncmp(partition_name, "vbmeta", avb_strlen("vbmeta")) == 0) {
+    look_for_vbmeta_footer = false;
+  }
+
+  if (!avb_validate_utf8((const uint8_t*)partition_name, partition_name_len)) {
+    avb_error("Partition name is not valid UTF-8.\n");
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+    goto out;
+  }
+
+  /* Construct full partition name e.g. system_a. */
+  if (!avb_str_concat(full_partition_name,
+                      sizeof full_partition_name,
+                      partition_name,
+                      partition_name_len,
+                      ab_suffix,
+                      avb_strlen(ab_suffix))) {
+    avb_error("Partition name and suffix does not fit.\n");
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+    goto out;
+  }
+
+  /* If we're loading from the main vbmeta partition, the vbmeta struct is in
+   * the beginning. Otherwise we may have to locate it via a footer... if no
+   * footer is found, we look in the beginning to support e.g. vbmeta_<org>
+   * partitions holding data for e.g. super partitions (b/80195851 for
+   * rationale).
+   */
+  vbmeta_offset = 0;
+  vbmeta_size = VBMETA_MAX_SIZE;
+  if (look_for_vbmeta_footer) {
+    uint8_t footer_buf[AVB_FOOTER_SIZE];
+    size_t footer_num_read;
+    AvbFooter footer;
+
+    io_ret = ops->read_from_partition(ops,
+                                      full_partition_name,
+                                      -AVB_FOOTER_SIZE,
+                                      AVB_FOOTER_SIZE,
+                                      footer_buf,
+                                      &footer_num_read);
+    if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+      goto out;
+    } else if (io_ret != AVB_IO_RESULT_OK) {
+      avb_errorv(full_partition_name, ": Error loading footer.\n", NULL);
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+      goto out;
+    }
+    avb_assert(footer_num_read == AVB_FOOTER_SIZE);
+
+    if (!avb_footer_validate_and_byteswap((const AvbFooter*)footer_buf,
+                                          &footer)) {
+      avb_debugv(full_partition_name, ": No footer detected.\n", NULL);
+    } else {
+      /* Basic footer sanity check since the data is untrusted. */
+      if (footer.vbmeta_size > VBMETA_MAX_SIZE) {
+        avb_errorv(
+            full_partition_name, ": Invalid vbmeta size in footer.\n", NULL);
+      } else {
+        vbmeta_offset = footer.vbmeta_offset;
+        vbmeta_size = footer.vbmeta_size;
+      }
+    }
+  }
+
+  vbmeta_buf = avb_malloc(vbmeta_size);
+  if (vbmeta_buf == NULL) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto out;
+  }
+
+  if (vbmeta_offset != 0) {
+    avb_debugv("Loading vbmeta struct in footer from partition '",
+               full_partition_name,
+               "'.\n",
+               NULL);
+  } else {
+    avb_debugv("Loading vbmeta struct from partition '",
+               full_partition_name,
+               "'.\n",
+               NULL);
+  }
+
+  io_ret = ops->read_from_partition(ops,
+                                    full_partition_name,
+                                    vbmeta_offset,
+                                    vbmeta_size,
+                                    vbmeta_buf,
+                                    &vbmeta_num_read);
+  if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto out;
+  } else if (io_ret != AVB_IO_RESULT_OK) {
+    /* If we're looking for 'vbmeta' but there is no such partition,
+     * go try to get it from the boot partition instead.
+     */
+    if (is_main_vbmeta && io_ret == AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION &&
+        !look_for_vbmeta_footer) {
+      avb_debugv(full_partition_name,
+                 ": No such partition. Trying 'boot' instead.\n",
+                 NULL);
+      ret = load_and_verify_vbmeta(ops,
+                                   requested_partitions,
+                                   ab_suffix,
+                                   flags,
+                                   allow_verification_error,
+                                   0 /* toplevel_vbmeta_flags */,
+                                   0 /* rollback_index_location */,
+                                   "boot",
+                                   avb_strlen("boot"),
+                                   NULL /* expected_public_key */,
+                                   0 /* expected_public_key_length */,
+                                   slot_data,
+                                   out_algorithm_type,
+                                   out_additional_cmdline_subst);
+      goto out;
+    } else {
+      avb_errorv(full_partition_name, ": Error loading vbmeta data.\n", NULL);
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+      goto out;
+    }
+  }
+  avb_assert(vbmeta_num_read <= vbmeta_size);
+
+  /* Check if the image is properly signed and get the public key used
+   * to sign the image.
+   */
+  vbmeta_ret =
+      avb_vbmeta_image_verify(vbmeta_buf, vbmeta_num_read, &pk_data, &pk_len);
+  switch (vbmeta_ret) {
+    case AVB_VBMETA_VERIFY_RESULT_OK:
+      avb_assert(pk_data != NULL && pk_len > 0);
+      break;
+
+    case AVB_VBMETA_VERIFY_RESULT_OK_NOT_SIGNED:
+    case AVB_VBMETA_VERIFY_RESULT_HASH_MISMATCH:
+    case AVB_VBMETA_VERIFY_RESULT_SIGNATURE_MISMATCH:
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION;
+      avb_errorv(full_partition_name,
+                 ": Error verifying vbmeta image: ",
+                 avb_vbmeta_verify_result_to_string(vbmeta_ret),
+                 "\n",
+                 NULL);
+      if (!allow_verification_error) {
+        goto out;
+      }
+      break;
+
+    case AVB_VBMETA_VERIFY_RESULT_INVALID_VBMETA_HEADER:
+      /* No way to continue this case. */
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+      avb_errorv(full_partition_name,
+                 ": Error verifying vbmeta image: invalid vbmeta header\n",
+                 NULL);
+      goto out;
+
+    case AVB_VBMETA_VERIFY_RESULT_UNSUPPORTED_VERSION:
+      /* No way to continue this case. */
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION;
+      avb_errorv(full_partition_name,
+                 ": Error verifying vbmeta image: unsupported AVB version\n",
+                 NULL);
+      goto out;
+  }
+
+  /* Byteswap the header. */
+  avb_vbmeta_image_header_to_host_byte_order((AvbVBMetaImageHeader*)vbmeta_buf,
+                                             &vbmeta_header);
+
+  /* If we're the toplevel, assign flags so they'll be passed down. */
+  if (is_main_vbmeta) {
+    toplevel_vbmeta_flags = (AvbVBMetaImageFlags)vbmeta_header.flags;
+  } else {
+    if (vbmeta_header.flags != 0) {
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+      avb_errorv(full_partition_name,
+                 ": chained vbmeta image has non-zero flags\n",
+                 NULL);
+      goto out;
+    }
+  }
+
+  uint32_t rollback_index_location_to_use = rollback_index_location;
+
+  /* Check if key used to make signature matches what is expected. */
+  if (pk_data != NULL) {
+    if (expected_public_key != NULL) {
+      avb_assert(!is_main_vbmeta);
+      if (expected_public_key_length != pk_len ||
+          avb_safe_memcmp(expected_public_key, pk_data, pk_len) != 0) {
+        avb_errorv(full_partition_name,
+                   ": Public key used to sign data does not match key in chain "
+                   "partition descriptor.\n",
+                   NULL);
+        ret = AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED;
+        if (!allow_verification_error) {
+          goto out;
+        }
+      }
+    } else {
+      bool key_is_trusted = false;
+      const uint8_t* pk_metadata = NULL;
+      size_t pk_metadata_len = 0;
+
+      if (vbmeta_header.public_key_metadata_size > 0) {
+        pk_metadata = vbmeta_buf + sizeof(AvbVBMetaImageHeader) +
+                      vbmeta_header.authentication_data_block_size +
+                      vbmeta_header.public_key_metadata_offset;
+        pk_metadata_len = vbmeta_header.public_key_metadata_size;
+      }
+
+      // If we're not using a vbmeta partition, need to use another AvbOps...
+      if (flags & AVB_SLOT_VERIFY_FLAGS_NO_VBMETA_PARTITION) {
+        io_ret = ops->validate_public_key_for_partition(
+            ops,
+            full_partition_name,
+            pk_data,
+            pk_len,
+            pk_metadata,
+            pk_metadata_len,
+            &key_is_trusted,
+            &rollback_index_location_to_use);
+      } else {
+        avb_assert(is_main_vbmeta);
+        io_ret = ops->validate_vbmeta_public_key(ops,
+                                                 pk_data,
+                                                 pk_len,
+                                                 pk_metadata,
+                                                 pk_metadata_len,
+                                                 &key_is_trusted);
+      }
+
+      if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+        ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+        goto out;
+      } else if (io_ret != AVB_IO_RESULT_OK) {
+        avb_errorv(full_partition_name,
+                   ": Error while checking public key used to sign data.\n",
+                   NULL);
+        ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+        goto out;
+      }
+      if (!key_is_trusted) {
+        avb_errorv(full_partition_name,
+                   ": Public key used to sign data rejected.\n",
+                   NULL);
+        ret = AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED;
+        if (!allow_verification_error) {
+          goto out;
+        }
+      }
+    }
+  }
+
+  /* Check rollback index. */
+  io_ret = ops->read_rollback_index(
+      ops, rollback_index_location_to_use, &stored_rollback_index);
+  if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto out;
+  } else if (io_ret != AVB_IO_RESULT_OK) {
+    avb_errorv(full_partition_name,
+               ": Error getting rollback index for location.\n",
+               NULL);
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+    goto out;
+  }
+  if (vbmeta_header.rollback_index < stored_rollback_index) {
+    avb_errorv(
+        full_partition_name,
+        ": Image rollback index is less than the stored rollback index.\n",
+        NULL);
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX;
+    if (!allow_verification_error) {
+      goto out;
+    }
+  }
+
+  /* Copy vbmeta to vbmeta_images before recursing. */
+  if (is_main_vbmeta) {
+    avb_assert(slot_data->num_vbmeta_images == 0);
+  } else {
+    if (!(flags & AVB_SLOT_VERIFY_FLAGS_NO_VBMETA_PARTITION)) {
+      avb_assert(slot_data->num_vbmeta_images > 0);
+    }
+  }
+  if (slot_data->num_vbmeta_images == MAX_NUMBER_OF_VBMETA_IMAGES) {
+    avb_errorv(full_partition_name, ": Too many vbmeta images.\n", NULL);
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto out;
+  }
+  vbmeta_image_data = &slot_data->vbmeta_images[slot_data->num_vbmeta_images++];
+  vbmeta_image_data->partition_name = avb_strdup(partition_name);
+  vbmeta_image_data->vbmeta_data = vbmeta_buf;
+  /* Note that |vbmeta_buf| is actually |vbmeta_num_read| bytes long
+   * and this includes data past the end of the image. Pass the
+   * actual size of the vbmeta image. Also, no need to use
+   * avb_safe_add() since the header has already been verified.
+   */
+  vbmeta_image_data->vbmeta_size =
+      sizeof(AvbVBMetaImageHeader) +
+      vbmeta_header.authentication_data_block_size +
+      vbmeta_header.auxiliary_data_block_size;
+  vbmeta_image_data->verify_result = vbmeta_ret;
+
+  /* If verification has been disabled by setting a bit in the image,
+   * we're done... except that we need to load the entirety of the
+   * requested partitions.
+   */
+  if (vbmeta_header.flags & AVB_VBMETA_IMAGE_FLAGS_VERIFICATION_DISABLED) {
+    AvbSlotVerifyResult sub_ret;
+    avb_debugv(
+        full_partition_name, ": VERIFICATION_DISABLED bit is set.\n", NULL);
+    /* If load_requested_partitions() fail it is always a fatal
+     * failure (e.g. ERROR_INVALID_ARGUMENT, ERROR_OOM, etc.) rather
+     * than recoverable (e.g. one where result_should_continue()
+     * returns true) and we want to convey that error.
+     */
+    sub_ret = load_requested_partitions(
+        ops, requested_partitions, ab_suffix, slot_data);
+    if (sub_ret != AVB_SLOT_VERIFY_RESULT_OK) {
+      ret = sub_ret;
+    }
+    goto out;
+  }
+
+  /* Now go through all descriptors and take the appropriate action:
+   *
+   * - hash descriptor: Load data from partition, calculate hash, and
+   *   checks that it matches what's in the hash descriptor.
+   *
+   * - hashtree descriptor: Do nothing since verification happens
+   *   on-the-fly from within the OS. (Unless the descriptor uses a
+   *   persistent digest, in which case we need to find it).
+   *
+   * - chained partition descriptor: Load the footer, load the vbmeta
+   *   image, verify vbmeta image (includes rollback checks, hash
+   *   checks, bail on chained partitions).
+   */
+  descriptors =
+      avb_descriptor_get_all(vbmeta_buf, vbmeta_num_read, &num_descriptors);
+  for (n = 0; n < num_descriptors; n++) {
+    AvbDescriptor desc;
+
+    if (!avb_descriptor_validate_and_byteswap(descriptors[n], &desc)) {
+      avb_errorv(full_partition_name, ": Descriptor is invalid.\n", NULL);
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+      goto out;
+    }
+
+    switch (desc.tag) {
+      case AVB_DESCRIPTOR_TAG_HASH: {
+        AvbSlotVerifyResult sub_ret;
+        sub_ret = load_and_verify_hash_partition(ops,
+                                                 requested_partitions,
+                                                 ab_suffix,
+                                                 allow_verification_error,
+                                                 descriptors[n],
+                                                 slot_data);
+        if (sub_ret != AVB_SLOT_VERIFY_RESULT_OK) {
+          ret = sub_ret;
+          if (!allow_verification_error || !result_should_continue(ret)) {
+            goto out;
+          }
+        }
+      } break;
+
+      case AVB_DESCRIPTOR_TAG_CHAIN_PARTITION: {
+        AvbSlotVerifyResult sub_ret;
+        AvbChainPartitionDescriptor chain_desc;
+        const uint8_t* chain_partition_name;
+        const uint8_t* chain_public_key;
+
+        /* Only allow CHAIN_PARTITION descriptors in the main vbmeta image. */
+        if (!is_main_vbmeta) {
+          avb_errorv(full_partition_name,
+                     ": Encountered chain descriptor not in main image.\n",
+                     NULL);
+          ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+          goto out;
+        }
+
+        if (!avb_chain_partition_descriptor_validate_and_byteswap(
+                (AvbChainPartitionDescriptor*)descriptors[n], &chain_desc)) {
+          avb_errorv(full_partition_name,
+                     ": Chain partition descriptor is invalid.\n",
+                     NULL);
+          ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+          goto out;
+        }
+
+        if (chain_desc.rollback_index_location == 0) {
+          avb_errorv(full_partition_name,
+                     ": Chain partition has invalid "
+                     "rollback_index_location field.\n",
+                     NULL);
+          ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+          goto out;
+        }
+
+        chain_partition_name = ((const uint8_t*)descriptors[n]) +
+                               sizeof(AvbChainPartitionDescriptor);
+        chain_public_key = chain_partition_name + chain_desc.partition_name_len;
+
+        sub_ret =
+            load_and_verify_vbmeta(ops,
+                                   requested_partitions,
+                                   ab_suffix,
+                                   flags,
+                                   allow_verification_error,
+                                   toplevel_vbmeta_flags,
+                                   chain_desc.rollback_index_location,
+                                   (const char*)chain_partition_name,
+                                   chain_desc.partition_name_len,
+                                   chain_public_key,
+                                   chain_desc.public_key_len,
+                                   slot_data,
+                                   NULL, /* out_algorithm_type */
+                                   NULL /* out_additional_cmdline_subst */);
+        if (sub_ret != AVB_SLOT_VERIFY_RESULT_OK) {
+          ret = sub_ret;
+          if (!result_should_continue(ret)) {
+            goto out;
+          }
+        }
+      } break;
+
+      case AVB_DESCRIPTOR_TAG_KERNEL_CMDLINE: {
+        const uint8_t* kernel_cmdline;
+        AvbKernelCmdlineDescriptor kernel_cmdline_desc;
+        bool apply_cmdline;
+
+        if (!avb_kernel_cmdline_descriptor_validate_and_byteswap(
+                (AvbKernelCmdlineDescriptor*)descriptors[n],
+                &kernel_cmdline_desc)) {
+          avb_errorv(full_partition_name,
+                     ": Kernel cmdline descriptor is invalid.\n",
+                     NULL);
+          ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+          goto out;
+        }
+
+        kernel_cmdline = ((const uint8_t*)descriptors[n]) +
+                         sizeof(AvbKernelCmdlineDescriptor);
+
+        if (!avb_validate_utf8(kernel_cmdline,
+                               kernel_cmdline_desc.kernel_cmdline_length)) {
+          avb_errorv(full_partition_name,
+                     ": Kernel cmdline is not valid UTF-8.\n",
+                     NULL);
+          ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+          goto out;
+        }
+
+        /* Compare the flags for top-level VBMeta struct with flags in
+         * the command-line descriptor so command-line snippets only
+         * intended for a certain mode (dm-verity enabled/disabled)
+         * are skipped if applicable.
+         */
+        apply_cmdline = true;
+        if (toplevel_vbmeta_flags & AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED) {
+          if (kernel_cmdline_desc.flags &
+              AVB_KERNEL_CMDLINE_FLAGS_USE_ONLY_IF_HASHTREE_NOT_DISABLED) {
+            apply_cmdline = false;
+          }
+        } else {
+          if (kernel_cmdline_desc.flags &
+              AVB_KERNEL_CMDLINE_FLAGS_USE_ONLY_IF_HASHTREE_DISABLED) {
+            apply_cmdline = false;
+          }
+        }
+
+        if (apply_cmdline) {
+          if (slot_data->cmdline == NULL) {
+            slot_data->cmdline =
+                avb_calloc(kernel_cmdline_desc.kernel_cmdline_length + 1);
+            if (slot_data->cmdline == NULL) {
+              ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+              goto out;
+            }
+            avb_memcpy(slot_data->cmdline,
+                       kernel_cmdline,
+                       kernel_cmdline_desc.kernel_cmdline_length);
+          } else {
+            /* new cmdline is: <existing_cmdline> + ' ' + <newcmdline> + '\0' */
+            size_t orig_size = avb_strlen(slot_data->cmdline);
+            size_t new_size =
+                orig_size + 1 + kernel_cmdline_desc.kernel_cmdline_length + 1;
+            char* new_cmdline = avb_calloc(new_size);
+            if (new_cmdline == NULL) {
+              ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+              goto out;
+            }
+            avb_memcpy(new_cmdline, slot_data->cmdline, orig_size);
+            new_cmdline[orig_size] = ' ';
+            avb_memcpy(new_cmdline + orig_size + 1,
+                       kernel_cmdline,
+                       kernel_cmdline_desc.kernel_cmdline_length);
+            avb_free(slot_data->cmdline);
+            slot_data->cmdline = new_cmdline;
+          }
+        }
+      } break;
+
+      case AVB_DESCRIPTOR_TAG_HASHTREE: {
+        AvbHashtreeDescriptor hashtree_desc;
+
+        if (!avb_hashtree_descriptor_validate_and_byteswap(
+                (AvbHashtreeDescriptor*)descriptors[n], &hashtree_desc)) {
+          avb_errorv(
+              full_partition_name, ": Hashtree descriptor is invalid.\n", NULL);
+          ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+          goto out;
+        }
+
+        /* We only need to continue when there is no digest in the descriptor.
+         * This is because the only processing here is to find the digest and
+         * make it available on the kernel command line.
+         */
+        if (hashtree_desc.root_digest_len == 0) {
+          char part_name[AVB_PART_NAME_MAX_SIZE];
+          size_t digest_len = 0;
+          uint8_t digest_buf[AVB_SHA512_DIGEST_SIZE];
+          const uint8_t* desc_partition_name =
+              ((const uint8_t*)descriptors[n]) + sizeof(AvbHashtreeDescriptor);
+
+          if (!avb_validate_utf8(desc_partition_name,
+                                 hashtree_desc.partition_name_len)) {
+            avb_error("Partition name is not valid UTF-8.\n");
+            ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+            goto out;
+          }
+
+          /* No ab_suffix for partitions without a digest in the descriptor
+           * because these partitions hold data unique to this device and are
+           * not updated using an A/B scheme.
+           */
+          if ((hashtree_desc.flags &
+               AVB_HASHTREE_DESCRIPTOR_FLAGS_DO_NOT_USE_AB) == 0 &&
+              avb_strlen(ab_suffix) != 0) {
+            avb_error("Cannot use A/B with a persistent root digest.\n");
+            ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+            goto out;
+          }
+          if (hashtree_desc.partition_name_len >= AVB_PART_NAME_MAX_SIZE) {
+            avb_error("Partition name does not fit.\n");
+            ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+            goto out;
+          }
+          avb_memcpy(
+              part_name, desc_partition_name, hashtree_desc.partition_name_len);
+          part_name[hashtree_desc.partition_name_len] = '\0';
+
+          /* Determine the expected digest size from the hash algorithm. */
+          if (avb_strcmp((const char*)hashtree_desc.hash_algorithm, "sha1") ==
+              0) {
+            digest_len = AVB_SHA1_DIGEST_SIZE;
+          } else if (avb_strcmp((const char*)hashtree_desc.hash_algorithm,
+                                "sha256") == 0) {
+            digest_len = AVB_SHA256_DIGEST_SIZE;
+          } else if (avb_strcmp((const char*)hashtree_desc.hash_algorithm,
+                                "sha512") == 0) {
+            digest_len = AVB_SHA512_DIGEST_SIZE;
+          } else {
+            avb_errorv(part_name, ": Unsupported hash algorithm.\n", NULL);
+            ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+            goto out;
+          }
+
+          ret = read_persistent_digest(ops,
+                                       part_name,
+                                       digest_len,
+                                       NULL /* initial_digest */,
+                                       digest_buf);
+          if (ret != AVB_SLOT_VERIFY_RESULT_OK) {
+            goto out;
+          }
+
+          if (out_additional_cmdline_subst) {
+            ret =
+                avb_add_root_digest_substitution(part_name,
+                                                 digest_buf,
+                                                 digest_len,
+                                                 out_additional_cmdline_subst);
+            if (ret != AVB_SLOT_VERIFY_RESULT_OK) {
+              goto out;
+            }
+          }
+        }
+      } break;
+
+      case AVB_DESCRIPTOR_TAG_PROPERTY:
+        /* Do nothing. */
+        break;
+    }
+  }
+
+  if (rollback_index_location < 0 ||
+      rollback_index_location >= AVB_MAX_NUMBER_OF_ROLLBACK_INDEX_LOCATIONS) {
+    avb_errorv(
+        full_partition_name, ": Invalid rollback_index_location.\n", NULL);
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+    goto out;
+  }
+
+  slot_data->rollback_indexes[rollback_index_location] =
+      vbmeta_header.rollback_index;
+
+  if (out_algorithm_type != NULL) {
+    *out_algorithm_type = (AvbAlgorithmType)vbmeta_header.algorithm_type;
+  }
+
+out:
+  /* If |vbmeta_image_data| isn't NULL it means that it adopted
+   * |vbmeta_buf| so in that case don't free it here.
+   */
+  if (vbmeta_image_data == NULL) {
+    if (vbmeta_buf != NULL) {
+      avb_free(vbmeta_buf);
+    }
+  }
+  if (descriptors != NULL) {
+    avb_free(descriptors);
+  }
+  return ret;
+}
+
+static AvbIOResult avb_manage_hashtree_error_mode(
+    AvbOps* ops,
+    AvbSlotVerifyFlags flags,
+    AvbSlotVerifyData* data,
+    AvbHashtreeErrorMode* out_hashtree_error_mode) {
+  AvbHashtreeErrorMode ret = AVB_HASHTREE_ERROR_MODE_RESTART;
+  AvbIOResult io_ret = AVB_IO_RESULT_OK;
+  uint8_t vbmeta_digest_sha256[AVB_SHA256_DIGEST_SIZE];
+  uint8_t stored_vbmeta_digest_sha256[AVB_SHA256_DIGEST_SIZE];
+  size_t num_bytes_read;
+
+  avb_assert(out_hashtree_error_mode != NULL);
+  avb_assert(ops->read_persistent_value != NULL);
+  avb_assert(ops->write_persistent_value != NULL);
+
+  // If we're rebooting because of dm-verity corruption, make a note of
+  // the vbmeta hash so we can stay in 'eio' mode until things change.
+  if (flags & AVB_SLOT_VERIFY_FLAGS_RESTART_CAUSED_BY_HASHTREE_CORRUPTION) {
+    avb_debug(
+        "Rebooting because of dm-verity corruption - "
+        "recording OS instance and using 'eio' mode.\n");
+    avb_slot_verify_data_calculate_vbmeta_digest(
+        data, AVB_DIGEST_TYPE_SHA256, vbmeta_digest_sha256);
+    io_ret = ops->write_persistent_value(ops,
+                                         AVB_NPV_MANAGED_VERITY_MODE,
+                                         AVB_SHA256_DIGEST_SIZE,
+                                         vbmeta_digest_sha256);
+    if (io_ret != AVB_IO_RESULT_OK) {
+      avb_error("Error writing to " AVB_NPV_MANAGED_VERITY_MODE ".\n");
+      goto out;
+    }
+    ret = AVB_HASHTREE_ERROR_MODE_EIO;
+    io_ret = AVB_IO_RESULT_OK;
+    goto out;
+  }
+
+  // See if we're in 'eio' mode.
+  io_ret = ops->read_persistent_value(ops,
+                                      AVB_NPV_MANAGED_VERITY_MODE,
+                                      AVB_SHA256_DIGEST_SIZE,
+                                      stored_vbmeta_digest_sha256,
+                                      &num_bytes_read);
+  if (io_ret == AVB_IO_RESULT_ERROR_NO_SUCH_VALUE ||
+      (io_ret == AVB_IO_RESULT_OK && num_bytes_read == 0)) {
+    // This is the usual case ('eio' mode not set).
+    avb_debug("No dm-verity corruption - using in 'restart' mode.\n");
+    ret = AVB_HASHTREE_ERROR_MODE_RESTART;
+    io_ret = AVB_IO_RESULT_OK;
+    goto out;
+  } else if (io_ret != AVB_IO_RESULT_OK) {
+    avb_error("Error reading from " AVB_NPV_MANAGED_VERITY_MODE ".\n");
+    goto out;
+  }
+  if (num_bytes_read != AVB_SHA256_DIGEST_SIZE) {
+    avb_error(
+        "Unexpected number of bytes read from " AVB_NPV_MANAGED_VERITY_MODE
+        ".\n");
+    io_ret = AVB_IO_RESULT_ERROR_IO;
+    goto out;
+  }
+
+  // OK, so we're currently in 'eio' mode and the vbmeta digest of the OS
+  // that caused this is in |stored_vbmeta_digest_sha256| ... now see if
+  // the OS we're dealing with now is the same.
+  avb_slot_verify_data_calculate_vbmeta_digest(
+      data, AVB_DIGEST_TYPE_SHA256, vbmeta_digest_sha256);
+  if (avb_memcmp(vbmeta_digest_sha256,
+                 stored_vbmeta_digest_sha256,
+                 AVB_SHA256_DIGEST_SIZE) == 0) {
+    // It's the same so we're still in 'eio' mode.
+    avb_debug("Same OS instance detected - staying in 'eio' mode.\n");
+    ret = AVB_HASHTREE_ERROR_MODE_EIO;
+    io_ret = AVB_IO_RESULT_OK;
+  } else {
+    // It did change!
+    avb_debug(
+        "New OS instance detected - changing from 'eio' to 'restart' mode.\n");
+    io_ret =
+        ops->write_persistent_value(ops,
+                                    AVB_NPV_MANAGED_VERITY_MODE,
+                                    0,  // This clears the persistent property.
+                                    vbmeta_digest_sha256);
+    if (io_ret != AVB_IO_RESULT_OK) {
+      avb_error("Error clearing " AVB_NPV_MANAGED_VERITY_MODE ".\n");
+      goto out;
+    }
+    ret = AVB_HASHTREE_ERROR_MODE_RESTART;
+    io_ret = AVB_IO_RESULT_OK;
+  }
+
+out:
+  *out_hashtree_error_mode = ret;
+  return io_ret;
+}
+
+static bool has_system_partition(AvbOps* ops, const char* ab_suffix) {
+  char part_name[AVB_PART_NAME_MAX_SIZE];
+  char* system_part_name = "system";
+  char guid_buf[37];
+  AvbIOResult io_ret;
+
+  if (!avb_str_concat(part_name,
+                      sizeof part_name,
+                      system_part_name,
+                      avb_strlen(system_part_name),
+                      ab_suffix,
+                      avb_strlen(ab_suffix))) {
+    avb_error("System partition name and suffix does not fit.\n");
+    return false;
+  }
+
+  io_ret = ops->get_unique_guid_for_partition(
+      ops, part_name, guid_buf, sizeof guid_buf);
+  if (io_ret == AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION) {
+    avb_debug("No system partition.\n");
+    return false;
+  } else if (io_ret != AVB_IO_RESULT_OK) {
+    avb_error("Error getting unique GUID for system partition.\n");
+    return false;
+  }
+
+  return true;
+}
+
+AvbSlotVerifyResult avb_slot_verify(AvbOps* ops,
+                                    const char* const* requested_partitions,
+                                    const char* ab_suffix,
+                                    AvbSlotVerifyFlags flags,
+                                    AvbHashtreeErrorMode hashtree_error_mode,
+                                    AvbSlotVerifyData** out_data) {
+  AvbSlotVerifyResult ret = 0;
+  AvbSlotVerifyData* slot_data = NULL;
+  AvbAlgorithmType algorithm_type = AVB_ALGORITHM_TYPE_NONE;
+  bool using_boot_for_vbmeta = false;
+  AvbVBMetaImageHeader toplevel_vbmeta;
+  bool allow_verification_error =
+      (flags & AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR);
+  AvbCmdlineSubstList* additional_cmdline_subst = NULL;
+
+  /* Fail early if we're missing the AvbOps needed for slot verification. */
+  avb_assert(ops->read_is_device_unlocked != NULL);
+  avb_assert(ops->read_from_partition != NULL);
+  avb_assert(ops->get_size_of_partition != NULL);
+  avb_assert(ops->read_rollback_index != NULL);
+  avb_assert(ops->get_unique_guid_for_partition != NULL);
+
+  if (out_data != NULL) {
+    *out_data = NULL;
+  }
+
+  /* Allowing dm-verity errors defeats the purpose of verified boot so
+   * only allow this if set up to allow verification errors
+   * (e.g. typically only UNLOCKED mode).
+   */
+  if (hashtree_error_mode == AVB_HASHTREE_ERROR_MODE_LOGGING &&
+      !allow_verification_error) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT;
+    goto fail;
+  }
+
+  /* Make sure passed-in AvbOps support persistent values if
+   * asking for libavb to manage verity state.
+   */
+  if (hashtree_error_mode == AVB_HASHTREE_ERROR_MODE_MANAGED_RESTART_AND_EIO) {
+    if (ops->read_persistent_value == NULL ||
+        ops->write_persistent_value == NULL) {
+      avb_error(
+          "Persistent values required for "
+          "AVB_HASHTREE_ERROR_MODE_MANAGED_RESTART_AND_EIO "
+          "but are not implemented in given AvbOps.\n");
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT;
+      goto fail;
+    }
+  }
+
+  /* Make sure passed-in AvbOps support verifying public keys and getting
+   * rollback index location if not using a vbmeta partition.
+   */
+  if (flags & AVB_SLOT_VERIFY_FLAGS_NO_VBMETA_PARTITION) {
+    if (ops->validate_public_key_for_partition == NULL) {
+      avb_error(
+          "AVB_SLOT_VERIFY_FLAGS_NO_VBMETA_PARTITION was passed but the "
+          "validate_public_key_for_partition() operation isn't implemented.\n");
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT;
+      goto fail;
+    }
+  } else {
+    avb_assert(ops->validate_vbmeta_public_key != NULL);
+  }
+
+  slot_data = avb_calloc(sizeof(AvbSlotVerifyData));
+  if (slot_data == NULL) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto fail;
+  }
+  slot_data->vbmeta_images =
+      avb_calloc(sizeof(AvbVBMetaData) * MAX_NUMBER_OF_VBMETA_IMAGES);
+  if (slot_data->vbmeta_images == NULL) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto fail;
+  }
+  slot_data->loaded_partitions =
+      avb_calloc(sizeof(AvbPartitionData) * MAX_NUMBER_OF_LOADED_PARTITIONS);
+  if (slot_data->loaded_partitions == NULL) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto fail;
+  }
+
+  additional_cmdline_subst = avb_new_cmdline_subst_list();
+  if (additional_cmdline_subst == NULL) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto fail;
+  }
+
+  if (flags & AVB_SLOT_VERIFY_FLAGS_NO_VBMETA_PARTITION) {
+    if (requested_partitions == NULL || requested_partitions[0] == NULL) {
+      avb_fatal(
+          "Requested partitions cannot be empty when using "
+          "AVB_SLOT_VERIFY_FLAGS_NO_VBMETA_PARTITION");
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT;
+      goto fail;
+    }
+
+    /* No vbmeta partition, go through each of the requested partitions... */
+    for (size_t n = 0; requested_partitions[n] != NULL; n++) {
+      ret = load_and_verify_vbmeta(ops,
+                                   requested_partitions,
+                                   ab_suffix,
+                                   flags,
+                                   allow_verification_error,
+                                   0 /* toplevel_vbmeta_flags */,
+                                   0 /* rollback_index_location */,
+                                   requested_partitions[n],
+                                   avb_strlen(requested_partitions[n]),
+                                   NULL /* expected_public_key */,
+                                   0 /* expected_public_key_length */,
+                                   slot_data,
+                                   &algorithm_type,
+                                   additional_cmdline_subst);
+      if (!allow_verification_error && ret != AVB_SLOT_VERIFY_RESULT_OK) {
+        goto fail;
+      }
+    }
+
+  } else {
+    /* Usual path, load "vbmeta"... */
+    ret = load_and_verify_vbmeta(ops,
+                                 requested_partitions,
+                                 ab_suffix,
+                                 flags,
+                                 allow_verification_error,
+                                 0 /* toplevel_vbmeta_flags */,
+                                 0 /* rollback_index_location */,
+                                 "vbmeta",
+                                 avb_strlen("vbmeta"),
+                                 NULL /* expected_public_key */,
+                                 0 /* expected_public_key_length */,
+                                 slot_data,
+                                 &algorithm_type,
+                                 additional_cmdline_subst);
+    if (!allow_verification_error && ret != AVB_SLOT_VERIFY_RESULT_OK) {
+      goto fail;
+    }
+  }
+
+  if (!result_should_continue(ret)) {
+    goto fail;
+  }
+
+  /* If things check out, mangle the kernel command-line as needed. */
+  if (!(flags & AVB_SLOT_VERIFY_FLAGS_NO_VBMETA_PARTITION)) {
+    if (avb_strcmp(slot_data->vbmeta_images[0].partition_name, "vbmeta") != 0) {
+      avb_assert(
+          avb_strcmp(slot_data->vbmeta_images[0].partition_name, "boot") == 0);
+      using_boot_for_vbmeta = true;
+    }
+  }
+
+  /* Byteswap top-level vbmeta header since we'll need it below. */
+  avb_vbmeta_image_header_to_host_byte_order(
+      (const AvbVBMetaImageHeader*)slot_data->vbmeta_images[0].vbmeta_data,
+      &toplevel_vbmeta);
+
+  /* Fill in |ab_suffix| field. */
+  slot_data->ab_suffix = avb_strdup(ab_suffix);
+  if (slot_data->ab_suffix == NULL) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto fail;
+  }
+
+  /* If verification is disabled, we are done ... we specifically
+   * don't want to add any androidboot.* options since verification
+   * is disabled.
+   */
+  if (toplevel_vbmeta.flags & AVB_VBMETA_IMAGE_FLAGS_VERIFICATION_DISABLED) {
+    /* Since verification is disabled we didn't process any
+     * descriptors and thus there's no cmdline... so set root= such
+     * that the system partition is mounted.
+     */
+    avb_assert(slot_data->cmdline == NULL);
+    // Devices with dynamic partitions won't have system partition.
+    // Instead, it has a large super partition to accommodate *.img files.
+    // See b/119551429 for details.
+    if (has_system_partition(ops, ab_suffix)) {
+      slot_data->cmdline =
+          avb_strdup("root=PARTUUID=$(ANDROID_SYSTEM_PARTUUID)");
+    } else {
+      // The |cmdline| field should be a NUL-terminated string.
+      slot_data->cmdline = avb_strdup("");
+    }
+    if (slot_data->cmdline == NULL) {
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+      goto fail;
+    }
+  } else {
+    /* If requested, manage dm-verity mode... */
+    AvbHashtreeErrorMode resolved_hashtree_error_mode = hashtree_error_mode;
+    if (hashtree_error_mode ==
+        AVB_HASHTREE_ERROR_MODE_MANAGED_RESTART_AND_EIO) {
+      AvbIOResult io_ret;
+      io_ret = avb_manage_hashtree_error_mode(
+          ops, flags, slot_data, &resolved_hashtree_error_mode);
+      if (io_ret != AVB_IO_RESULT_OK) {
+        ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+        if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+          ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+        }
+        goto fail;
+      }
+    }
+    slot_data->resolved_hashtree_error_mode = resolved_hashtree_error_mode;
+
+    /* Add options... */
+    AvbSlotVerifyResult sub_ret;
+    sub_ret = avb_append_options(ops,
+                                 flags,
+                                 slot_data,
+                                 &toplevel_vbmeta,
+                                 algorithm_type,
+                                 hashtree_error_mode,
+                                 resolved_hashtree_error_mode);
+    if (sub_ret != AVB_SLOT_VERIFY_RESULT_OK) {
+      ret = sub_ret;
+      goto fail;
+    }
+  }
+
+  /* Substitute $(ANDROID_SYSTEM_PARTUUID) and friends. */
+  if (slot_data->cmdline != NULL && avb_strlen(slot_data->cmdline) != 0) {
+    char* new_cmdline;
+    new_cmdline = avb_sub_cmdline(ops,
+                                  slot_data->cmdline,
+                                  ab_suffix,
+                                  using_boot_for_vbmeta,
+                                  additional_cmdline_subst);
+    if (new_cmdline != slot_data->cmdline) {
+      if (new_cmdline == NULL) {
+        ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+        goto fail;
+      }
+      avb_free(slot_data->cmdline);
+      slot_data->cmdline = new_cmdline;
+    }
+  }
+
+  if (out_data != NULL) {
+    *out_data = slot_data;
+  } else {
+    avb_slot_verify_data_free(slot_data);
+  }
+
+  avb_free_cmdline_subst_list(additional_cmdline_subst);
+  additional_cmdline_subst = NULL;
+
+  if (!allow_verification_error) {
+    avb_assert(ret == AVB_SLOT_VERIFY_RESULT_OK);
+  }
+
+  return ret;
+
+fail:
+  if (slot_data != NULL) {
+    avb_slot_verify_data_free(slot_data);
+  }
+  if (additional_cmdline_subst != NULL) {
+    avb_free_cmdline_subst_list(additional_cmdline_subst);
+  }
+  return ret;
+}
+
+void avb_slot_verify_data_free(AvbSlotVerifyData* data) {
+  if (data->ab_suffix != NULL) {
+    avb_free(data->ab_suffix);
+  }
+  if (data->cmdline != NULL) {
+    avb_free(data->cmdline);
+  }
+  if (data->vbmeta_images != NULL) {
+    size_t n;
+    for (n = 0; n < data->num_vbmeta_images; n++) {
+      AvbVBMetaData* vbmeta_image = &data->vbmeta_images[n];
+      if (vbmeta_image->partition_name != NULL) {
+        avb_free(vbmeta_image->partition_name);
+      }
+      if (vbmeta_image->vbmeta_data != NULL) {
+        avb_free(vbmeta_image->vbmeta_data);
+      }
+    }
+    avb_free(data->vbmeta_images);
+  }
+  if (data->loaded_partitions != NULL) {
+    size_t n;
+    for (n = 0; n < data->num_loaded_partitions; n++) {
+      AvbPartitionData* loaded_partition = &data->loaded_partitions[n];
+      if (loaded_partition->partition_name != NULL) {
+        avb_free(loaded_partition->partition_name);
+      }
+      if (loaded_partition->data != NULL && !loaded_partition->preloaded) {
+        sysmem_free((phys_addr_t)loaded_partition->data);
+      }
+    }
+    avb_free(data->loaded_partitions);
+  }
+  avb_free(data);
+}
+
+const char* avb_slot_verify_result_to_string(AvbSlotVerifyResult result) {
+  const char* ret = NULL;
+
+  switch (result) {
+    case AVB_SLOT_VERIFY_RESULT_OK:
+      ret = "OK";
+      break;
+    case AVB_SLOT_VERIFY_RESULT_ERROR_OOM:
+      ret = "ERROR_OOM";
+      break;
+    case AVB_SLOT_VERIFY_RESULT_ERROR_IO:
+      ret = "ERROR_IO";
+      break;
+    case AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION:
+      ret = "ERROR_VERIFICATION";
+      break;
+    case AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX:
+      ret = "ERROR_ROLLBACK_INDEX";
+      break;
+    case AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED:
+      ret = "ERROR_PUBLIC_KEY_REJECTED";
+      break;
+    case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA:
+      ret = "ERROR_INVALID_METADATA";
+      break;
+    case AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION:
+      ret = "ERROR_UNSUPPORTED_VERSION";
+      break;
+    case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT:
+      ret = "ERROR_INVALID_ARGUMENT";
+      break;
+      /* Do not add a 'default:' case here because of -Wswitch. */
+  }
+
+  if (ret == NULL) {
+    avb_error("Unknown AvbSlotVerifyResult value.\n");
+    ret = "(unknown)";
+  }
+
+  return ret;
+}
+
+void avb_slot_verify_data_calculate_vbmeta_digest(AvbSlotVerifyData* data,
+                                                  AvbDigestType digest_type,
+                                                  uint8_t* out_digest) {
+  bool ret = false;
+  size_t n;
+
+  switch (digest_type) {
+    case AVB_DIGEST_TYPE_SHA256: {
+      AvbSHA256Ctx ctx;
+      avb_sha256_init(&ctx);
+      for (n = 0; n < data->num_vbmeta_images; n++) {
+        avb_sha256_update(&ctx,
+                          data->vbmeta_images[n].vbmeta_data,
+                          data->vbmeta_images[n].vbmeta_size);
+      }
+      avb_memcpy(out_digest, avb_sha256_final(&ctx), AVB_SHA256_DIGEST_SIZE);
+      ret = true;
+    } break;
+
+    case AVB_DIGEST_TYPE_SHA512: {
+      AvbSHA512Ctx ctx;
+      avb_sha512_init(&ctx);
+      for (n = 0; n < data->num_vbmeta_images; n++) {
+        avb_sha512_update(&ctx,
+                          data->vbmeta_images[n].vbmeta_data,
+                          data->vbmeta_images[n].vbmeta_size);
+      }
+      avb_memcpy(out_digest, avb_sha512_final(&ctx), AVB_SHA512_DIGEST_SIZE);
+      ret = true;
+    } break;
+
+      /* Do not add a 'default:' case here because of -Wswitch. */
+  }
+
+  if (!ret) {
+    avb_fatal("Unknown digest type");
+  }
+}
diff --git a/lib/avb/libavb/avb_sysdeps_posix.c b/lib/avb/libavb/avb_sysdeps_posix.c
old mode 100755
new mode 100644
index 413ac776eb..3a7d21f8d6
--- a/lib/avb/libavb/avb_sysdeps_posix.c
+++ b/lib/avb/libavb/avb_sysdeps_posix.c
@@ -52,6 +52,10 @@ int avb_strcmp(const char* s1, const char* s2) {
   return strcmp(s1, s2);
 }
 
+int avb_strncmp(const char* s1, const char* s2, size_t n) {
+  return strncmp(s1, s2, n);
+}
+
 size_t avb_strlen(const char* str) {
   return strlen(str);
 }
diff --git a/lib/avb/libavb/avb_vbmeta_image.c b/lib/avb/libavb/avb_vbmeta_image.c
old mode 100755
new mode 100644
index 3f6d33e90b..cee7db3cf8
--- a/lib/avb/libavb/avb_vbmeta_image.c
+++ b/lib/avb/libavb/avb_vbmeta_image.c
@@ -1,308 +1,309 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include <android_avb/avb_vbmeta_image.h>
-#include <android_avb/avb_crypto.h>
-#include <android_avb/avb_rsa.h>
-#include <android_avb/avb_sha.h>
-#include <android_avb/avb_util.h>
-#include <android_avb/avb_version.h>
-
-AvbVBMetaVerifyResult avb_vbmeta_image_verify(
-    const uint8_t* data,
-    size_t length,
-    const uint8_t** out_public_key_data,
-    size_t* out_public_key_length) {
-  AvbVBMetaVerifyResult ret;
-  AvbVBMetaImageHeader h;
-  uint8_t* computed_hash;
-  const AvbAlgorithmData* algorithm;
-  AvbSHA256Ctx sha256_ctx;
-  AvbSHA512Ctx sha512_ctx;
-  const uint8_t* header_block;
-  const uint8_t* authentication_block;
-  const uint8_t* auxiliary_block;
-  int verification_result;
-
-  ret = AVB_VBMETA_VERIFY_RESULT_INVALID_VBMETA_HEADER;
-
-  if (out_public_key_data != NULL) {
-    *out_public_key_data = NULL;
-  }
-  if (out_public_key_length != NULL) {
-    *out_public_key_length = 0;
-  }
-
-  /* Ensure magic is correct. */
-  if (avb_safe_memcmp(data, AVB_MAGIC, AVB_MAGIC_LEN) != 0) {
-    avb_error("Magic is incorrect.\n");
-    goto out;
-  }
-
-  /* Before we byteswap, ensure length is long enough. */
-  if (length < sizeof(AvbVBMetaImageHeader)) {
-    avb_error("Length is smaller than header.\n");
-    goto out;
-  }
-  avb_vbmeta_image_header_to_host_byte_order((const AvbVBMetaImageHeader*)data,
-                                             &h);
-
-  /* Ensure we don't attempt to access any fields if we do not meet
-   * the specified minimum version of libavb.
-   */
-  if ((h.required_libavb_version_major != AVB_VERSION_MAJOR) ||
-      (h.required_libavb_version_minor > AVB_VERSION_MINOR)) {
-    avb_error("Mismatch between image version and libavb version.\n");
-    ret = AVB_VBMETA_VERIFY_RESULT_UNSUPPORTED_VERSION;
-    goto out;
-  }
-
-  /* Ensure |release_string| ends with a NUL byte. */
-  if (h.release_string[AVB_RELEASE_STRING_SIZE - 1] != '\0') {
-    avb_error("Release string does not end with a NUL byte.\n");
-    goto out;
-  }
-
-  /* Ensure inner block sizes are multiple of 64. */
-  if ((h.authentication_data_block_size & 0x3f) != 0 ||
-      (h.auxiliary_data_block_size & 0x3f) != 0) {
-    avb_error("Block size is not a multiple of 64.\n");
-    goto out;
-  }
-
-  /* Ensure block sizes all add up to at most |length|. */
-  uint64_t block_total = sizeof(AvbVBMetaImageHeader);
-  if (!avb_safe_add_to(&block_total, h.authentication_data_block_size) ||
-      !avb_safe_add_to(&block_total, h.auxiliary_data_block_size)) {
-    avb_error("Overflow while computing size of boot image.\n");
-    goto out;
-  }
-  if (block_total > length) {
-    avb_error("Block sizes add up to more than given length.\n");
-    goto out;
-  }
-
-  uintptr_t data_ptr = (uintptr_t)data;
-  /* Ensure passed in memory doesn't wrap. */
-  if (!avb_safe_add(NULL, (uint64_t)data_ptr, length)) {
-    avb_error("Boot image location and length mismatch.\n");
-    goto out;
-  }
-
-  /* Ensure hash and signature are entirely in the Authentication data block. */
-  uint64_t hash_end;
-  if (!avb_safe_add(&hash_end, h.hash_offset, h.hash_size) ||
-      hash_end > h.authentication_data_block_size) {
-    avb_error("Hash is not entirely in its block.\n");
-    goto out;
-  }
-  uint64_t signature_end;
-  if (!avb_safe_add(&signature_end, h.signature_offset, h.signature_size) ||
-      signature_end > h.authentication_data_block_size) {
-    avb_error("Signature is not entirely in its block.\n");
-    goto out;
-  }
-
-  /* Ensure public key is entirely in the Auxiliary data block. */
-  uint64_t pubkey_end;
-  if (!avb_safe_add(&pubkey_end, h.public_key_offset, h.public_key_size) ||
-      pubkey_end > h.auxiliary_data_block_size) {
-    avb_error("Public key is not entirely in its block.\n");
-    goto out;
-  }
-
-  /* Ensure public key metadata (if set) is entirely in the Auxiliary
-   * data block. */
-  if (h.public_key_metadata_size > 0) {
-    uint64_t pubkey_md_end;
-    if (!avb_safe_add(&pubkey_md_end,
-                      h.public_key_metadata_offset,
-                      h.public_key_metadata_size) ||
-        pubkey_md_end > h.auxiliary_data_block_size) {
-      avb_error("Public key metadata is not entirely in its block.\n");
-      goto out;
-    }
-  }
-
-  /* Bail early if there's no hash or signature. */
-  if (h.algorithm_type == AVB_ALGORITHM_TYPE_NONE) {
-    ret = AVB_VBMETA_VERIFY_RESULT_OK_NOT_SIGNED;
-    goto out;
-  }
-
-  /* Ensure algorithm field is supported. */
-  algorithm = avb_get_algorithm_data(h.algorithm_type);
-  if (!algorithm) {
-    avb_error("Invalid or unknown algorithm.\n");
-    goto out;
-  }
-
-  /* Bail if the embedded hash size doesn't match the chosen algorithm. */
-  if (h.hash_size != algorithm->hash_len) {
-    avb_error("Embedded hash has wrong size.\n");
-    goto out;
-  }
-
-  /* No overflow checks needed from here-on after since all block
-   * sizes and offsets have been verified above.
-   */
-
-  header_block = data;
-  authentication_block = header_block + sizeof(AvbVBMetaImageHeader);
-  auxiliary_block = authentication_block + h.authentication_data_block_size;
-
-  switch (h.algorithm_type) {
-    /* Explicit fall-through: */
-    case AVB_ALGORITHM_TYPE_SHA256_RSA2048:
-    case AVB_ALGORITHM_TYPE_SHA256_RSA4096:
-    case AVB_ALGORITHM_TYPE_SHA256_RSA8192:
-      avb_sha256_init(&sha256_ctx);
-      avb_sha256_update(
-          &sha256_ctx, header_block, sizeof(AvbVBMetaImageHeader));
-      avb_sha256_update(
-          &sha256_ctx, auxiliary_block, h.auxiliary_data_block_size);
-      computed_hash = avb_sha256_final(&sha256_ctx);
-      break;
-    /* Explicit fall-through: */
-    case AVB_ALGORITHM_TYPE_SHA512_RSA2048:
-    case AVB_ALGORITHM_TYPE_SHA512_RSA4096:
-    case AVB_ALGORITHM_TYPE_SHA512_RSA8192:
-      avb_sha512_init(&sha512_ctx);
-      avb_sha512_update(
-          &sha512_ctx, header_block, sizeof(AvbVBMetaImageHeader));
-      avb_sha512_update(
-          &sha512_ctx, auxiliary_block, h.auxiliary_data_block_size);
-      computed_hash = avb_sha512_final(&sha512_ctx);
-      break;
-    default:
-      avb_error("Unknown algorithm.\n");
-      goto out;
-  }
-
-  if (avb_safe_memcmp(authentication_block + h.hash_offset,
-                      computed_hash,
-                      h.hash_size) != 0) {
-    avb_error("Hash does not match!\n");
-    ret = AVB_VBMETA_VERIFY_RESULT_HASH_MISMATCH;
-    goto out;
-  }
-
-  verification_result =
-      avb_rsa_verify(auxiliary_block + h.public_key_offset,
-                     h.public_key_size,
-                     authentication_block + h.signature_offset,
-                     h.signature_size,
-                     authentication_block + h.hash_offset,
-                     h.hash_size,
-                     algorithm->padding,
-                     algorithm->padding_len);
-
-  if (verification_result == 0) {
-    ret = AVB_VBMETA_VERIFY_RESULT_SIGNATURE_MISMATCH;
-    goto out;
-  }
-
-  if (h.public_key_size > 0) {
-    if (out_public_key_data != NULL) {
-      *out_public_key_data = auxiliary_block + h.public_key_offset;
-    }
-    if (out_public_key_length != NULL) {
-      *out_public_key_length = h.public_key_size;
-    }
-  }
-
-  ret = AVB_VBMETA_VERIFY_RESULT_OK;
-
-out:
-  return ret;
-}
-
-void avb_vbmeta_image_header_to_host_byte_order(const AvbVBMetaImageHeader* src,
-                                                AvbVBMetaImageHeader* dest) {
-  avb_memcpy(dest, src, sizeof(AvbVBMetaImageHeader));
-
-  dest->required_libavb_version_major =
-      avb_be32toh(dest->required_libavb_version_major);
-  dest->required_libavb_version_minor =
-      avb_be32toh(dest->required_libavb_version_minor);
-
-  dest->authentication_data_block_size =
-      avb_be64toh(dest->authentication_data_block_size);
-  dest->auxiliary_data_block_size =
-      avb_be64toh(dest->auxiliary_data_block_size);
-
-  dest->algorithm_type = avb_be32toh(dest->algorithm_type);
-
-  dest->hash_offset = avb_be64toh(dest->hash_offset);
-  dest->hash_size = avb_be64toh(dest->hash_size);
-
-  dest->signature_offset = avb_be64toh(dest->signature_offset);
-  dest->signature_size = avb_be64toh(dest->signature_size);
-
-  dest->public_key_offset = avb_be64toh(dest->public_key_offset);
-  dest->public_key_size = avb_be64toh(dest->public_key_size);
-
-  dest->public_key_metadata_offset =
-      avb_be64toh(dest->public_key_metadata_offset);
-  dest->public_key_metadata_size = avb_be64toh(dest->public_key_metadata_size);
-
-  dest->descriptors_offset = avb_be64toh(dest->descriptors_offset);
-  dest->descriptors_size = avb_be64toh(dest->descriptors_size);
-
-  dest->rollback_index = avb_be64toh(dest->rollback_index);
-  dest->flags = avb_be32toh(dest->flags);
-}
-
-const char* avb_vbmeta_verify_result_to_string(AvbVBMetaVerifyResult result) {
-  const char* ret = NULL;
-
-  switch (result) {
-    case AVB_VBMETA_VERIFY_RESULT_OK:
-      ret = "OK";
-      break;
-    case AVB_VBMETA_VERIFY_RESULT_OK_NOT_SIGNED:
-      ret = "OK_NOT_SIGNED";
-      break;
-    case AVB_VBMETA_VERIFY_RESULT_INVALID_VBMETA_HEADER:
-      ret = "INVALID_VBMETA_HEADER";
-      break;
-    case AVB_VBMETA_VERIFY_RESULT_UNSUPPORTED_VERSION:
-      ret = "UNSUPPORTED_VERSION";
-      break;
-    case AVB_VBMETA_VERIFY_RESULT_HASH_MISMATCH:
-      ret = "HASH_MISMATCH";
-      break;
-    case AVB_VBMETA_VERIFY_RESULT_SIGNATURE_MISMATCH:
-      ret = "SIGNATURE_MISMATCH";
-      break;
-      /* Do not add a 'default:' case here because of -Wswitch. */
-  }
-
-  if (ret == NULL) {
-    avb_error("Unknown AvbVBMetaVerifyResult value.\n");
-    ret = "(unknown)";
-  }
-
-  return ret;
-}
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_vbmeta_image.h>
+#include <android_avb/avb_crypto.h>
+#include <android_avb/avb_rsa.h>
+#include <android_avb/avb_sha.h>
+#include <android_avb/avb_util.h>
+#include <android_avb/avb_version.h>
+
+AvbVBMetaVerifyResult avb_vbmeta_image_verify(
+    const uint8_t* data,
+    size_t length,
+    const uint8_t** out_public_key_data,
+    size_t* out_public_key_length) {
+  AvbVBMetaVerifyResult ret;
+  AvbVBMetaImageHeader h;
+  uint8_t* computed_hash;
+  const AvbAlgorithmData* algorithm;
+  AvbSHA256Ctx sha256_ctx;
+  AvbSHA512Ctx sha512_ctx;
+  const uint8_t* header_block;
+  const uint8_t* authentication_block;
+  const uint8_t* auxiliary_block;
+  int verification_result;
+
+  ret = AVB_VBMETA_VERIFY_RESULT_INVALID_VBMETA_HEADER;
+
+  if (out_public_key_data != NULL) {
+    *out_public_key_data = NULL;
+  }
+  if (out_public_key_length != NULL) {
+    *out_public_key_length = 0;
+  }
+
+  /* Before we byteswap or compare Magic, ensure length is long enough. */
+  if (length < sizeof(AvbVBMetaImageHeader)) {
+    avb_error("Length is smaller than header.\n");
+    goto out;
+  }
+
+  /* Ensure magic is correct. */
+  if (avb_safe_memcmp(data, AVB_MAGIC, AVB_MAGIC_LEN) != 0) {
+    avb_error("Magic is incorrect.\n");
+    goto out;
+  }
+
+  avb_vbmeta_image_header_to_host_byte_order((const AvbVBMetaImageHeader*)data,
+                                             &h);
+
+  /* Ensure we don't attempt to access any fields if we do not meet
+   * the specified minimum version of libavb.
+   */
+  if ((h.required_libavb_version_major != AVB_VERSION_MAJOR) ||
+      (h.required_libavb_version_minor > AVB_VERSION_MINOR)) {
+    avb_error("Mismatch between image version and libavb version.\n");
+    ret = AVB_VBMETA_VERIFY_RESULT_UNSUPPORTED_VERSION;
+    goto out;
+  }
+
+  /* Ensure |release_string| ends with a NUL byte. */
+  if (h.release_string[AVB_RELEASE_STRING_SIZE - 1] != '\0') {
+    avb_error("Release string does not end with a NUL byte.\n");
+    goto out;
+  }
+
+  /* Ensure inner block sizes are multiple of 64. */
+  if ((h.authentication_data_block_size & 0x3f) != 0 ||
+      (h.auxiliary_data_block_size & 0x3f) != 0) {
+    avb_error("Block size is not a multiple of 64.\n");
+    goto out;
+  }
+
+  /* Ensure block sizes all add up to at most |length|. */
+  uint64_t block_total = sizeof(AvbVBMetaImageHeader);
+  if (!avb_safe_add_to(&block_total, h.authentication_data_block_size) ||
+      !avb_safe_add_to(&block_total, h.auxiliary_data_block_size)) {
+    avb_error("Overflow while computing size of boot image.\n");
+    goto out;
+  }
+  if (block_total > length) {
+    avb_error("Block sizes add up to more than given length.\n");
+    goto out;
+  }
+
+  uintptr_t data_ptr = (uintptr_t)data;
+  /* Ensure passed in memory doesn't wrap. */
+  if (!avb_safe_add(NULL, (uint64_t)data_ptr, length)) {
+    avb_error("Boot image location and length mismatch.\n");
+    goto out;
+  }
+
+  /* Ensure hash and signature are entirely in the Authentication data block. */
+  uint64_t hash_end;
+  if (!avb_safe_add(&hash_end, h.hash_offset, h.hash_size) ||
+      hash_end > h.authentication_data_block_size) {
+    avb_error("Hash is not entirely in its block.\n");
+    goto out;
+  }
+  uint64_t signature_end;
+  if (!avb_safe_add(&signature_end, h.signature_offset, h.signature_size) ||
+      signature_end > h.authentication_data_block_size) {
+    avb_error("Signature is not entirely in its block.\n");
+    goto out;
+  }
+
+  /* Ensure public key is entirely in the Auxiliary data block. */
+  uint64_t pubkey_end;
+  if (!avb_safe_add(&pubkey_end, h.public_key_offset, h.public_key_size) ||
+      pubkey_end > h.auxiliary_data_block_size) {
+    avb_error("Public key is not entirely in its block.\n");
+    goto out;
+  }
+
+  /* Ensure public key metadata (if set) is entirely in the Auxiliary
+   * data block. */
+  if (h.public_key_metadata_size > 0) {
+    uint64_t pubkey_md_end;
+    if (!avb_safe_add(&pubkey_md_end,
+                      h.public_key_metadata_offset,
+                      h.public_key_metadata_size) ||
+        pubkey_md_end > h.auxiliary_data_block_size) {
+      avb_error("Public key metadata is not entirely in its block.\n");
+      goto out;
+    }
+  }
+
+  /* Bail early if there's no hash or signature. */
+  if (h.algorithm_type == AVB_ALGORITHM_TYPE_NONE) {
+    ret = AVB_VBMETA_VERIFY_RESULT_OK_NOT_SIGNED;
+    goto out;
+  }
+
+  /* Ensure algorithm field is supported. */
+  algorithm = avb_get_algorithm_data(h.algorithm_type);
+  if (!algorithm) {
+    avb_error("Invalid or unknown algorithm.\n");
+    goto out;
+  }
+
+  /* Bail if the embedded hash size doesn't match the chosen algorithm. */
+  if (h.hash_size != algorithm->hash_len) {
+    avb_error("Embedded hash has wrong size.\n");
+    goto out;
+  }
+
+  /* No overflow checks needed from here-on after since all block
+   * sizes and offsets have been verified above.
+   */
+
+  header_block = data;
+  authentication_block = header_block + sizeof(AvbVBMetaImageHeader);
+  auxiliary_block = authentication_block + h.authentication_data_block_size;
+
+  switch (h.algorithm_type) {
+    /* Explicit fall-through: */
+    case AVB_ALGORITHM_TYPE_SHA256_RSA2048:
+    case AVB_ALGORITHM_TYPE_SHA256_RSA4096:
+    case AVB_ALGORITHM_TYPE_SHA256_RSA8192:
+      avb_sha256_init(&sha256_ctx);
+      avb_sha256_update(
+          &sha256_ctx, header_block, sizeof(AvbVBMetaImageHeader));
+      avb_sha256_update(
+          &sha256_ctx, auxiliary_block, h.auxiliary_data_block_size);
+      computed_hash = avb_sha256_final(&sha256_ctx);
+      break;
+    /* Explicit fall-through: */
+    case AVB_ALGORITHM_TYPE_SHA512_RSA2048:
+    case AVB_ALGORITHM_TYPE_SHA512_RSA4096:
+    case AVB_ALGORITHM_TYPE_SHA512_RSA8192:
+      avb_sha512_init(&sha512_ctx);
+      avb_sha512_update(
+          &sha512_ctx, header_block, sizeof(AvbVBMetaImageHeader));
+      avb_sha512_update(
+          &sha512_ctx, auxiliary_block, h.auxiliary_data_block_size);
+      computed_hash = avb_sha512_final(&sha512_ctx);
+      break;
+    default:
+      avb_error("Unknown algorithm.\n");
+      goto out;
+  }
+
+  if (avb_safe_memcmp(authentication_block + h.hash_offset,
+                      computed_hash,
+                      h.hash_size) != 0) {
+    avb_error("Hash does not match!\n");
+    ret = AVB_VBMETA_VERIFY_RESULT_HASH_MISMATCH;
+    goto out;
+  }
+
+  verification_result =
+      avb_rsa_verify(auxiliary_block + h.public_key_offset,
+                     h.public_key_size,
+                     authentication_block + h.signature_offset,
+                     h.signature_size,
+                     authentication_block + h.hash_offset,
+                     h.hash_size,
+                     algorithm->padding,
+                     algorithm->padding_len);
+
+  if (verification_result == 0) {
+    ret = AVB_VBMETA_VERIFY_RESULT_SIGNATURE_MISMATCH;
+    goto out;
+  }
+
+  if (h.public_key_size > 0) {
+    if (out_public_key_data != NULL) {
+      *out_public_key_data = auxiliary_block + h.public_key_offset;
+    }
+    if (out_public_key_length != NULL) {
+      *out_public_key_length = h.public_key_size;
+    }
+  }
+
+  ret = AVB_VBMETA_VERIFY_RESULT_OK;
+
+out:
+  return ret;
+}
+
+void avb_vbmeta_image_header_to_host_byte_order(const AvbVBMetaImageHeader* src,
+                                                AvbVBMetaImageHeader* dest) {
+  avb_memcpy(dest, src, sizeof(AvbVBMetaImageHeader));
+
+  dest->required_libavb_version_major =
+      avb_be32toh(dest->required_libavb_version_major);
+  dest->required_libavb_version_minor =
+      avb_be32toh(dest->required_libavb_version_minor);
+
+  dest->authentication_data_block_size =
+      avb_be64toh(dest->authentication_data_block_size);
+  dest->auxiliary_data_block_size =
+      avb_be64toh(dest->auxiliary_data_block_size);
+
+  dest->algorithm_type = avb_be32toh(dest->algorithm_type);
+
+  dest->hash_offset = avb_be64toh(dest->hash_offset);
+  dest->hash_size = avb_be64toh(dest->hash_size);
+
+  dest->signature_offset = avb_be64toh(dest->signature_offset);
+  dest->signature_size = avb_be64toh(dest->signature_size);
+
+  dest->public_key_offset = avb_be64toh(dest->public_key_offset);
+  dest->public_key_size = avb_be64toh(dest->public_key_size);
+
+  dest->public_key_metadata_offset =
+      avb_be64toh(dest->public_key_metadata_offset);
+  dest->public_key_metadata_size = avb_be64toh(dest->public_key_metadata_size);
+
+  dest->descriptors_offset = avb_be64toh(dest->descriptors_offset);
+  dest->descriptors_size = avb_be64toh(dest->descriptors_size);
+
+  dest->rollback_index = avb_be64toh(dest->rollback_index);
+  dest->flags = avb_be32toh(dest->flags);
+}
+
+const char* avb_vbmeta_verify_result_to_string(AvbVBMetaVerifyResult result) {
+  const char* ret = NULL;
+
+  switch (result) {
+    case AVB_VBMETA_VERIFY_RESULT_OK:
+      ret = "OK";
+      break;
+    case AVB_VBMETA_VERIFY_RESULT_OK_NOT_SIGNED:
+      ret = "OK_NOT_SIGNED";
+      break;
+    case AVB_VBMETA_VERIFY_RESULT_INVALID_VBMETA_HEADER:
+      ret = "INVALID_VBMETA_HEADER";
+      break;
+    case AVB_VBMETA_VERIFY_RESULT_UNSUPPORTED_VERSION:
+      ret = "UNSUPPORTED_VERSION";
+      break;
+    case AVB_VBMETA_VERIFY_RESULT_HASH_MISMATCH:
+      ret = "HASH_MISMATCH";
+      break;
+    case AVB_VBMETA_VERIFY_RESULT_SIGNATURE_MISMATCH:
+      ret = "SIGNATURE_MISMATCH";
+      break;
+      /* Do not add a 'default:' case here because of -Wswitch. */
+  }
+
+  if (ret == NULL) {
+    avb_error("Unknown AvbVBMetaVerifyResult value.\n");
+    ret = "(unknown)";
+  }
+
+  return ret;
+}
diff --git a/lib/avb/libavb_atx/avb_atx_validate.c b/lib/avb/libavb_atx/avb_atx_validate.c
index 3384da5e68..0bf6463f2a 100644
--- a/lib/avb/libavb_atx/avb_atx_validate.c
+++ b/lib/avb/libavb_atx/avb_atx_validate.c
@@ -38,6 +38,7 @@
 
 /* The most recent unlock challenge generated. */
 static uint8_t last_unlock_challenge[AVB_ATX_UNLOCK_CHALLENGE_SIZE];
+static bool last_unlock_challenge_set = false;
 
 /* Computes the SHA256 |hash| of |length| bytes of |data|. */
 static void sha256(const uint8_t* data,
@@ -367,6 +368,7 @@ AvbIOResult avb_atx_generate_unlock_challenge(
     avb_error("Failed to generate random challenge.\n");
     return result;
   }
+  last_unlock_challenge_set = true;
   out_unlock_challenge->version = 1;
   sha256(permanent_attributes.product_id,
          AVB_ATX_PRODUCT_ID_SIZE,
@@ -445,9 +447,16 @@ AvbIOResult avb_atx_validate_unlock_credential(
     return AVB_IO_RESULT_OK;
   }
 
+  /* Hash the most recent unlock challenge. */
+  if (!last_unlock_challenge_set) {
+    avb_error("Challenge does not exist.\n");
+    return AVB_IO_RESULT_OK;
+  }
+  sha512(last_unlock_challenge, AVB_ATX_UNLOCK_CHALLENGE_SIZE, challenge_hash);
+  last_unlock_challenge_set = false;
+
   /* Verify the challenge signature. */
   algorithm_data = avb_get_algorithm_data(AVB_ALGORITHM_TYPE_SHA512_RSA4096);
-  sha512(last_unlock_challenge, AVB_ATX_UNLOCK_CHALLENGE_SIZE, challenge_hash);
   if (!avb_rsa_verify(unlock_credential->product_unlock_key_certificate
                           .signed_data.public_key,
                       AVB_ATX_PUBLIC_KEY_SIZE,

commit eca6f1ffbfc1aba2775fc1708784eebe193dff3f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Sep 19 15:31:51 2019 +0800

    irq: gicv2: fix GIC not response to USB OTG IRQ
    
    It handles the issue when the bootflow without Miniloader,
    i.e. Maskrom => Trust(optional) => U-Boot.
    
    Change-Id: I445225d5cce9abd2117ef468f15774e3fa57e16d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/irq/irq-gic.c b/drivers/irq/irq-gic.c
index 4d8d29ddfa..43a1abcfdc 100644
--- a/drivers/irq/irq-gic.c
+++ b/drivers/irq/irq-gic.c
@@ -330,8 +330,17 @@ static int gic_irq_init(void)
 #ifdef CONFIG_GICV2
 	u32 val;
 
-	/* end of interrupt */
-	gicc_writel(PLATFORM_GIC_MAX_IRQ, GICC_EOIR);
+	/*
+	 * If system boot without Miniloader:
+	 *		"Maskrom => Trust(optional) => U-Boot"
+	 *
+	 * IRQ_USB_OTG must be acked by GICC_EIO due to maskrom jumps to the
+	 * U-Boot in its USB interrupt. Without this ack, the GICC_IAR always
+	 * return a spurious interrupt ID 1023 for USB OTG interrupt.
+	 */
+#ifdef IRQ_USB_OTG
+	gicc_writel(IRQ_USB_OTG, GICC_EOIR);
+#endif
 
 	/* disable gicc and gicd */
 	gicc_writel(0, GICC_CTLR);

commit b073251d9c2c245effca4bdbee05f75ca9db2a11
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Sep 19 15:30:13 2019 +0800

    include: irq-platform: add IRQ_USB_OTG definition
    
    Change-Id: Id2a85c67b2f29bf97d19fdb50e7a59ded47b1606
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/irq-platform.h b/include/irq-platform.h
index 5ae9e973b1..c274270526 100644
--- a/include/irq-platform.h
+++ b/include/irq-platform.h
@@ -19,6 +19,7 @@
 #define GPIO_BANK_NUM			4
 #define GPIO_BANK_PINS			32
 
+#define IRQ_USB_OTG			42
 #define IRQ_TIMER1			61
 #define IRQ_GPIO0			68
 #define IRQ_GPIO1			69
@@ -37,6 +38,7 @@
 #define GPIO_BANK_NUM			4
 #define GPIO_BANK_PINS			32
 
+#define IRQ_USB_OTG			55
 #define IRQ_TIMER1			76
 #define IRQ_PWM				82
 #define IRQ_GPIO0			83
@@ -61,6 +63,7 @@
 #define GPIO_BANK_NUM			9
 #define GPIO_BANK_PINS			32
 
+#define IRQ_USB_OTG			55
 #define IRQ_TIMER1			99
 #define IRQ_PWM				110
 #define IRQ_GPIO0			113

commit 2e7f9d3c948af0d5920058bcde61590370a012f9
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Sep 17 15:13:48 2019 +0800

    rockchip: firefly-rk3399: remove SPL legacy raw image support
    
    RK3399 SPL only supports FIT and rockchip image type.
    
    Change-Id: Ibcfc6cf5bcdb6f8da4107ac10426f83aec9c010d
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
index da68739877..75df4e314d 100644
--- a/configs/firefly-rk3399_defconfig
+++ b/configs/firefly-rk3399_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_RK3399=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x50000
 CONFIG_RKIMG_BOOTLOADER=y
@@ -11,9 +12,10 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3399-firefly"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
 CONFIG_SPL_ATF=y

commit f117ac95ecc99d37b290dfd7055c29677a307cc6
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Sep 16 14:33:36 2019 +0800

    rockchip: px30: Update CONFIG_SPL_MAX_SIZE to 0x40000
    
    We are going to update atf base to 0x40000, so that we can use space
    0~0x40000 for SPL without relocate for support ATF.
    0x40000 should be enough for SPL text, and we have separate BSS and
    STACK.
    
    Change-Id: I081d289f10a54d8a98e9f466e1730659f2c712a3
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index 2569a5cb0f..7ef6237821 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -22,7 +22,7 @@
 #define CONFIG_SYS_LOAD_ADDR		0x00800800
 #define CONFIG_SPL_STACK		0x00400000
 #define CONFIG_SPL_TEXT_BASE		0x00000000
-#define CONFIG_SPL_MAX_SIZE		0x20000
+#define CONFIG_SPL_MAX_SIZE		0x40000
 #define CONFIG_SPL_BSS_START_ADDR	0x2000000
 #define CONFIG_SPL_BSS_MAX_SIZE		0x2000
 #define CONFIG_SYS_BOOTM_LEN		(64 << 20)	/* 64M */

commit 1024781f2d7a8f22fc0fd5b1bb54540140b4edfb
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Sep 16 14:31:48 2019 +0800

    rockchip: px30: Enable SPL_SEPARATE_BSS
    
    We are using separate BSS with CONFIG_SPL_BSS_START_ADDR.
    
    Change-Id: I42f3f4a71db1460997a47491c8688fa8085bf594
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 55eae9054b..23c77021b6 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -11,6 +11,7 @@ config ROCKCHIP_PX30
 	select TPL if !ARM64_BOOT_AARCH32
 	select TPL_TINY_FRAMEWORK if TPL
 
+	imply SPL_SEPARATE_BSS
 	imply SPL_SERIAL_SUPPORT
 	imply TPL_SERIAL_SUPPORT
 	select DEBUG_UART_BOARD_INIT

commit 0c3815df140188f2c08175aa4a35e6d3151a1ba4
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Sep 16 14:29:53 2019 +0800

    rockchip: px30: add spl boot order and update to use 'dm-spl'
    
    Update for enable TPL/SPL.
    
    Change-Id: Id2b7cbe4dfb6e683eb26a6457a8371b1afb39a99
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/px30-evb.dts b/arch/arm/dts/px30-evb.dts
index 906c1f1f72..21b8f5e985 100644
--- a/arch/arm/dts/px30-evb.dts
+++ b/arch/arm/dts/px30-evb.dts
@@ -400,8 +400,6 @@
 };
 
 &emmc {
-	u-boot,dm-pre-reloc;
-	fifo-mode;
 	bus-width = <8>;
 	cap-mmc-highspeed;
 	mmc-hs200-1_8v;
diff --git a/arch/arm/dts/px30-u-boot.dtsi b/arch/arm/dts/px30-u-boot.dtsi
index fe208f29db..2508cb9dd7 100644
--- a/arch/arm/dts/px30-u-boot.dtsi
+++ b/arch/arm/dts/px30-u-boot.dtsi
@@ -11,6 +11,7 @@
 	};
 
 	chosen {
+		u-boot,spl-boot-order = &emmc, &sdmmc;
 		stdout-path = &uart2;
 	};
 };
@@ -25,16 +26,16 @@
 };
 
 &nandc0 {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 	status = "okay";
 };
 
 &sdmmc {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 };
 
 &emmc {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 };
 
 &pmugrf {
@@ -54,45 +55,45 @@
 };
 
 &saradc {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 	status = "okay";
 };
 
 &gpio0 {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 	status = "disabled";
 };
 
 &gpio1 {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 	status = "disabled";
 };
 
 &gpio2 {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 	status = "disabled";
 };
 
 &gpio3 {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 	status = "disabled";
 };
 
 &usb20_otg {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 };
 
 &usb2phy_grf {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 	status = "okay";
 };
 
 &u2phy {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 	status = "okay";
 };
 
 &u2phy_otg {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 	status = "okay";
 };

commit 7ce616e87af231c7be6a533fd512977ed4152cba
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Sep 16 11:55:45 2019 +0800

    rockchip: px30: disable ddr secure region
    
    Disable the ddr secure region so that emmc/sd controller can access
    the DRAM, this reg should be override in ATF.
    
    Change-Id: I30ed494bbe0ec93d162cc84a815ab591a00eb0e5
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c
index 61ddf63e3e..6102ffe4bc 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -19,7 +19,7 @@
 #define GRF_CPU_CON1			0xff140504
 
 #define VIDEO_PHY_BASE			0xff2e0000
-
+#define FW_DDR_CON_REG			0xff534040
 #define SERVICE_CORE_ADDR		0xff508000
 #define QOS_PRIORITY			0x08
 
@@ -56,11 +56,12 @@ int arch_cpu_init(void)
 #ifdef CONFIG_SPL_BUILD
 	/* We do some SoC one time setting here. */
 	/* Disable the ddr secure region setting to make it non-secure */
+	writel(0x0, FW_DDR_CON_REG);
 #endif
 	/* Enable PD_VO (default disable at reset) */
 	rk_clrreg(PMU_PWRDN_CON, 1 << 13);
 
-#ifdef CONFIG_TPL_BUILD
+#ifdef CONFIG_SPL_BUILD
 	/* Set cpu qos priority */
 	writel(QOS_PRIORITY_LEVEL(1, 1), SERVICE_CORE_ADDR + QOS_PRIORITY);
 #endif

commit 93db2afc1aea6e93ce3c9585dafcf3a918ec0640
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Sep 12 15:48:34 2019 +0800

    rockchip: px30: set default sdram type to ddr3
    
    Both px30 and px30mini are using ddr3, change the default
    dram type to ddr3 to adapt it.
    
    Change-Id: I177dc41cd2a5e6a1cac718c75fa5a2541050ee6d
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram_px30.c b/drivers/ram/rockchip/sdram_px30.c
index 80d5f65f8d..c3f56a18be 100644
--- a/drivers/ram/rockchip/sdram_px30.c
+++ b/drivers/ram/rockchip/sdram_px30.c
@@ -51,7 +51,7 @@ struct dram_info {
 struct dram_info dram_info;
 
 struct px30_sdram_params sdram_configs[] = {
-#include	"sdram-px30-lpddr3-detect-333.inc"
+#include	"sdram-px30-ddr3-detect-333.inc"
 };
 
 struct ddr_phy_skew skew = {

commit c2bb0fd141c9d8772212027597a3fd5ee86f88f4
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Sep 18 10:34:40 2019 +0800

    lib: avb: print the permanent attribute certificate is exist or not
    
    Change-Id: I10775dd06a6fb1bfdddcfda37fe2e1178c3fde21
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/lib/avb/rk_avb_user/rk_avb_ops_user.c b/lib/avb/rk_avb_user/rk_avb_ops_user.c
index f7b5901eab..e3a154f89e 100644
--- a/lib/avb/rk_avb_user/rk_avb_ops_user.c
+++ b/lib/avb/rk_avb_user/rk_avb_ops_user.c
@@ -42,8 +42,10 @@ int rk_avb_get_pub_key(struct rk_pub_key *pub_key)
 int rk_avb_get_perm_attr_cer(uint8_t *cer, uint32_t size)
 {
 #ifdef CONFIG_OPTEE_CLIENT
-	if (trusty_read_permanent_attributes_cer((uint8_t *)cer, size))
+	if (trusty_read_permanent_attributes_cer((uint8_t *)cer, size)) {
+		printf("AVB: perm attr cer is not exist.\n");
 		return -EIO;
+	}
 
 	return 0;
 #else

commit 35cd2352c872fd09305a9fde771c1088e61fed08
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Mon Sep 16 16:29:07 2019 +0800

    configs: rk3368: Enable rk1000
    
    Change-Id: I17347c882f04b69282f1cdf9266488ccf7662130
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>

diff --git a/configs/rk3368_defconfig b/configs/rk3368_defconfig
index d987029cea..5a4afd9880 100644
--- a/configs/rk3368_defconfig
+++ b/configs/rk3368_defconfig
@@ -97,6 +97,7 @@ CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
+CONFIG_DRM_ROCKCHIP_RK1000=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_ERRNO_STR=y

commit 9c9eff4383781163466df78b3624da411821f83d
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Mon Sep 16 10:43:41 2019 +0800

    video/drm: Support rk1000
    
    Support rk1000 cvbs.
    
    Change-Id: I9b8f2b7ebd829f6e9d1c83deb0a81e7f88808bac
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>

diff --git a/drivers/video/drm/Kconfig b/drivers/video/drm/Kconfig
index d2f5f0f998..da0b6bd689 100644
--- a/drivers/video/drm/Kconfig
+++ b/drivers/video/drm/Kconfig
@@ -104,6 +104,15 @@ config DRM_ROCKCHIP_RK618
 	  Choose this option to enable support for Rockchip RK618 display
 	  bridge chips driver. say Y to enable its driver.
 
+config DRM_ROCKCHIP_RK1000
+	bool "Rockchip RK1000 display bridge driver"
+	depends on DRM_ROCKCHIP
+	select DRM_ROCKCHIP_PANEL
+	select VIDEO_BRIDGE
+	help
+	  Choose this option to enable support for Rockchip RK1000 display
+	  bridge chips driver. say Y to enable its driver.
+
 config ROCKCHIP_DRM_TVE
 	bool "Rockchip TVE Support"
 	depends on DRM_ROCKCHIP
diff --git a/drivers/video/drm/Makefile b/drivers/video/drm/Makefile
index 46ae58c942..1ee63fe096 100644
--- a/drivers/video/drm/Makefile
+++ b/drivers/video/drm/Makefile
@@ -20,3 +20,4 @@ obj-$(CONFIG_DRM_ROCKCHIP_LVDS) += rockchip_lvds.o
 obj-$(CONFIG_DRM_ROCKCHIP_RGB) += rockchip_rgb.o
 obj-$(CONFIG_DRM_ROCKCHIP_PANEL) += rockchip_panel.o
 obj-$(CONFIG_DRM_ROCKCHIP_RK618) += rk618.o rk618_lvds.o
+obj-$(CONFIG_DRM_ROCKCHIP_RK1000) += rk1000.o rk1000_tve.o
diff --git a/drivers/video/drm/rk1000.c b/drivers/video/drm/rk1000.c
new file mode 100644
index 0000000000..030d3c8fc5
--- /dev/null
+++ b/drivers/video/drm/rk1000.c
@@ -0,0 +1,139 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <i2c.h>
+#include <dm/pinctrl.h>
+#include <dm/uclass.h>
+#include <dm/uclass-id.h>
+
+#include "rk1000.h"
+
+#define CTRL_ADC		0x00
+#define ADC_OFF			0x88
+#define CTRL_CODEC		0x01
+#define CODEC_OFF		0x0d
+#define CTRL_I2C		0x02
+#define I2C_TIMEOUT_PERIOD	0x22
+#define CTRL_TVE		0x03
+#define TVE_OFF			0x00
+
+int rk1000_ctl_i2c_write(struct rk1000_ctl *rk1000_ctl, u8 reg, u8 val)
+{
+	struct dm_i2c_chip *chip = dev_get_parent_platdata(rk1000_ctl->dev);
+	struct i2c_msg msg;
+	u8 buf[2];
+	int ret;
+
+	buf[0] = reg;
+	buf[1] = val;
+	msg.addr = chip->chip_addr;
+	msg.flags = 0;
+	msg.len = 2;
+	msg.buf = buf;
+
+	ret = dm_i2c_xfer(rk1000_ctl->dev, &msg, 1);
+	if (ret) {
+		dev_err(rk1000_ctl->dev, "rk1000 ctrl i2c write failed: %d\n",
+			ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+int rk1000_ctl_i2c_read(struct rk1000_ctl *rk1000_ctl, u8 reg, u8 *val)
+{
+	struct dm_i2c_chip *chip = dev_get_parent_platdata(rk1000_ctl->dev);
+	u8 data;
+	struct i2c_msg msg[] = {
+		{
+			.addr = chip->chip_addr,
+			.flags = 0,
+			.buf = (u8 *)&reg,
+			.len = 1,
+		}, {
+			.addr = chip->chip_addr,
+			.flags = I2C_M_RD,
+			.buf = (u8 *)&data,
+			.len = 1,
+		}
+	};
+	int ret;
+
+	ret = dm_i2c_xfer(rk1000_ctl->dev, msg, 2);
+	if (ret) {
+		dev_err(rk1000_ctl->dev, "rk1000 ctrl i2c read failed: %d\n",
+			ret);
+		return ret;
+	}
+
+	*val = data;
+
+	return 0;
+}
+
+int rk1000_ctl_write_block(struct rk1000_ctl *rk1000_ctl,
+			   u8 reg, const u8 *buf, u8 len)
+{
+	int i, ret;
+
+	for (i = 0; i < len; i++) {
+		ret = rk1000_ctl_i2c_write(rk1000_ctl, reg + i, buf[i]);
+		if (ret)
+			break;
+	}
+
+	return ret;
+}
+
+static int rk1000_ctl_probe(struct udevice *dev)
+{
+	struct rk1000_ctl *rk1000_ctl = dev_get_priv(dev);
+	int ret;
+
+	rk1000_ctl->dev = dev;
+
+	ret = gpio_request_by_name(dev, "reset-gpios", 0,
+				   &rk1000_ctl->reset_gpio, GPIOD_IS_OUT);
+	if (ret) {
+		dev_err(dev, "Cannot get reset GPIO: %d\n", ret);
+		return ret;
+	}
+
+	ret = clk_get_by_name(dev, "mclk", &rk1000_ctl->mclk);
+	if (ret < 0) {
+		dev_err(dev, "failed to get clkin: %d\n", ret);
+		return ret;
+	}
+
+	clk_enable(&rk1000_ctl->mclk);
+
+	pinctrl_select_state(rk1000_ctl->dev, "default");
+
+	dm_gpio_set_value(&rk1000_ctl->reset_gpio, 0);
+	mdelay(1);
+	dm_gpio_set_value(&rk1000_ctl->reset_gpio, 1);
+	mdelay(1);
+	dm_gpio_set_value(&rk1000_ctl->reset_gpio, 0);
+
+	return 0;
+}
+
+static const struct udevice_id rk1000_ctl_of_match[] = {
+	{ .compatible = "rockchip,rk1000-ctl" },
+	{}
+};
+
+U_BOOT_DRIVER(rk1000) = {
+	.name = "rk1000_ctl",
+	.id = UCLASS_I2C_GENERIC,
+	.of_match = rk1000_ctl_of_match,
+	.probe = rk1000_ctl_probe,
+	.bind = dm_scan_fdt_dev,
+	.priv_auto_alloc_size = sizeof(struct rk1000_ctl),
+};
diff --git a/drivers/video/drm/rk1000.h b/drivers/video/drm/rk1000.h
new file mode 100644
index 0000000000..60f67032ee
--- /dev/null
+++ b/drivers/video/drm/rk1000.h
@@ -0,0 +1,24 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _RK1000_H_
+#define _RK1000_H_
+
+#include <clk.h>
+#include <asm/gpio.h>
+#include <dm/device.h>
+#include <power/regulator.h>
+
+struct rk1000_ctl {
+	struct udevice *dev;
+	struct gpio_desc reset_gpio;
+	struct clk mclk;
+};
+
+int rk1000_ctl_i2c_read(struct rk1000_ctl *rk1000_ctl, u8 reg, u8 *val);
+int rk1000_ctl_write_block(struct rk1000_ctl *rk1000_ctl,
+			   u8 reg, const u8 *buf, u8 len);
+
+#endif
diff --git a/drivers/video/drm/rk1000_tve.c b/drivers/video/drm/rk1000_tve.c
new file mode 100644
index 0000000000..19a9163ad0
--- /dev/null
+++ b/drivers/video/drm/rk1000_tve.c
@@ -0,0 +1,316 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <boot_rkimg.h>
+#include <dm.h>
+#include <errno.h>
+#include <i2c.h>
+#include <video_bridge.h>
+#include <asm/io.h>
+#include <dm/device.h>
+#include <dm/device-internal.h>
+#include <linux/media-bus-format.h>
+
+#include "rockchip_bridge.h"
+#include "rockchip_display.h"
+#include "rockchip_panel.h"
+
+#include "rk1000.h"
+
+#define TVE_POWCR	0x03
+#define TVE_OFF		0X07
+#define TVE_ON		0x03
+
+struct rk1000_tve {
+	struct udevice *dev;
+	struct rk1000_ctl rk1000_ctl;
+};
+
+enum {
+	CVBS_NTSC = 0,
+	CVBS_PAL,
+};
+
+int rk1000_tve_i2c_write(struct rk1000_tve *rk1000_tve, u8 reg, u8 val)
+{
+	struct dm_i2c_chip *chip = dev_get_parent_platdata(rk1000_tve->dev);
+	struct i2c_msg msg;
+	u8 buf[2];
+	int ret;
+
+	buf[0] = reg;
+	buf[1] = val;
+	msg.addr = chip->chip_addr;
+	msg.flags = 0;
+	msg.len = 2;
+	msg.buf = buf;
+
+	ret = dm_i2c_xfer(rk1000_tve->dev, &msg, 1);
+	if (ret) {
+		dev_err(rk1000_tve->dev,
+			"rk1000 tve i2c write failed: %d\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+int rk1000_tve_i2c_read(struct rk1000_tve *rk1000_tve, u8 reg, u8 *val)
+{
+	struct dm_i2c_chip *chip = dev_get_parent_platdata(rk1000_tve->dev);
+	u8 data;
+	struct i2c_msg msg[] = {
+		{
+			.addr = chip->chip_addr,
+			.flags = 0,
+			.buf = (u8 *)&reg,
+			.len = 1,
+		}, {
+			.addr = chip->chip_addr,
+			.flags = I2C_M_RD,
+			.buf = (u8 *)&data,
+			.len = 1,
+		}
+	};
+	int ret;
+
+	ret = dm_i2c_xfer(rk1000_tve->dev, msg, 2);
+	if (ret) {
+		dev_err(rk1000_tve->dev,
+			"rk1000 tve i2c read failed: %d\n", ret);
+		return ret;
+	}
+
+	*val = data;
+
+	return 0;
+}
+
+static int rk1000_tv_write_block(struct rk1000_tve *rk1000_tve,
+				 u8 reg, const u8 *buf, u8 len)
+{
+	int i, ret;
+
+	for (i = 0; i < len; i++) {
+		ret = rk1000_tve_i2c_write(rk1000_tve, reg + i, buf[i]);
+		if (ret)
+			break;
+	}
+
+	return ret;
+}
+
+static int rk1000_tve_probe(struct udevice *dev)
+{
+	struct rk1000_tve *rk1000_tve = dev_get_priv(dev);
+	struct rockchip_bridge *bridge =
+		(struct rockchip_bridge *)dev_get_driver_data(dev);
+	int ret;
+
+	rk1000_tve->dev = dev;
+
+	ret = uclass_get_device_by_name(UCLASS_I2C_GENERIC,
+					"rk1000-ctl@40",
+					&rk1000_tve->rk1000_ctl.dev);
+	if (ret)
+		return ret;
+
+	bridge->dev = dev;
+
+	return 0;
+}
+
+static void rk1000_tve_bridge_enable(struct rockchip_bridge *bridge)
+{
+	u8 tv_encoder_regs_pal[] = {0x06, 0x00, 0x00, 0x03, 0x00, 0x00};
+	u8 tv_encoder_control_regs_pal[] = {0x41, 0x01};
+	u8 tv_encoder_regs_ntsc[] = {0x00, 0x00, 0x00, 0x03, 0x00, 0x00};
+	u8 tv_encoder_control_regs_ntsc[] = {0x43, 0x01};
+	char data[4] = {0x88, 0x00, 0x22, 0x00};
+	struct rk1000_tve *rk1000_tve = dev_get_priv(bridge->dev);
+	struct connector_state *conn_state = &bridge->state->conn_state;
+	struct drm_display_mode *mode = &conn_state->mode;
+	struct rk1000_ctl *rk1000_ctl = &rk1000_tve->rk1000_ctl;
+
+	rk1000_ctl_write_block(rk1000_ctl, 0, (u8 *)data, 4);
+
+	/* rk1000 power down output dac */
+	data[0] = 0x07;
+	rk1000_tv_write_block(rk1000_tve, 0x03, (u8 *)data, 1);
+
+	if (mode->vdisplay == 576) {
+		rk1000_tv_write_block(rk1000_tve, 0, tv_encoder_regs_pal,
+				      sizeof(tv_encoder_regs_pal));
+		rk1000_ctl_write_block(rk1000_ctl, 3,
+				       tv_encoder_control_regs_pal,
+				       sizeof(tv_encoder_control_regs_pal));
+	} else {
+		rk1000_tv_write_block(rk1000_tve, 0, tv_encoder_regs_ntsc,
+				      sizeof(tv_encoder_regs_ntsc));
+		rk1000_ctl_write_block(rk1000_ctl, 3,
+				       tv_encoder_control_regs_ntsc,
+				       sizeof(tv_encoder_control_regs_ntsc));
+	}
+}
+
+static void rk1000_tve_bridge_disable(struct rockchip_bridge *bridge)
+{
+	struct rk1000_tve *rk1000_tve = dev_get_priv(bridge->dev);
+	char data[1] = {0x07};
+
+	/* rk1000 power down output dac */
+	rk1000_tv_write_block(rk1000_tve, 0x03, (u8 *)data, 1);
+}
+
+static void drm_rk1000_select_output(struct overscan *overscan,
+				     struct drm_display_mode *mode)
+{
+	char baseparameter_buf[8 * RK_BLK_SIZE] __aligned(ARCH_DMA_MINALIGN);
+	struct base_screen_info *screen_info = NULL;
+	struct base_disp_info base_parameter;
+	struct blk_desc *dev_desc;
+	const struct base_overscan *scan;
+	disk_partition_t part_info;
+	int ret, i, screen_size;
+	int max_scan = 100;
+	int min_scan = 51;
+
+	overscan->left_margin = max_scan;
+	overscan->right_margin = max_scan;
+	overscan->top_margin = max_scan;
+	overscan->bottom_margin = max_scan;
+
+	mode->hdisplay = 720;
+	mode->hsync_start = 732;
+	mode->hsync_end = 738;
+	mode->htotal = 864;
+	mode->vdisplay = 576;
+	mode->vsync_start = 582;
+	mode->vsync_end = 588;
+	mode->vtotal = 625;
+	mode->clock = 27000;
+	mode->flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: Could not find device\n", __func__);
+		return;
+	}
+
+	if (part_get_info_by_name(dev_desc, "baseparameter", &part_info) < 0) {
+		printf("Could not find baseparameter partition\n");
+		return;
+	}
+
+	ret = blk_dread(dev_desc, part_info.start, 1,
+			(void *)baseparameter_buf);
+	if (ret < 0) {
+		printf("read baseparameter failed\n");
+		return;
+	}
+
+	memcpy(&base_parameter, baseparameter_buf, sizeof(base_parameter));
+	scan = &base_parameter.scan;
+
+	screen_size = sizeof(base_parameter.screen_list) /
+		sizeof(base_parameter.screen_list[0]);
+
+	for (i = 0; i < screen_size; i++) {
+		if (base_parameter.screen_list[i].type ==
+		    DRM_MODE_CONNECTOR_TV) {
+			screen_info = &base_parameter.screen_list[i];
+			break;
+		}
+	}
+
+	if (scan->leftscale < min_scan && scan->leftscale > 0)
+		overscan->left_margin = min_scan;
+	else if (scan->leftscale < max_scan)
+		overscan->left_margin = scan->leftscale;
+
+	if (scan->rightscale < min_scan && scan->rightscale > 0)
+		overscan->right_margin = min_scan;
+	else if (scan->rightscale < max_scan)
+		overscan->right_margin = scan->rightscale;
+
+	if (scan->topscale < min_scan && scan->topscale > 0)
+		overscan->top_margin = min_scan;
+	else if (scan->topscale < max_scan)
+		overscan->top_margin = scan->topscale;
+
+	if (scan->bottomscale < min_scan && scan->bottomscale > 0)
+		overscan->bottom_margin = min_scan;
+	else if (scan->bottomscale < max_scan)
+		overscan->bottom_margin = scan->bottomscale;
+
+	if (screen_info &&
+	    (screen_info->mode.hdisplay == 720 &&
+	     screen_info->mode.hsync_end == 742 &&
+	     screen_info->mode.vdisplay == 480)) {
+		mode->hdisplay = 720;
+		mode->hsync_start = 736;
+		mode->hsync_end = 742;
+		mode->htotal = 858;
+		mode->vdisplay = 480;
+		mode->vsync_start = 494;
+		mode->vsync_end = 500;
+		mode->vtotal = 525;
+		mode->clock = 27000;
+	} else {
+		mode->hdisplay = 720;
+		mode->hsync_start = 732;
+		mode->hsync_end = 738;
+		mode->htotal = 864;
+		mode->vdisplay = 576;
+		mode->vsync_start = 582;
+		mode->vsync_end = 588;
+		mode->vtotal = 625;
+		mode->clock = 27000;
+	}
+}
+
+static int rk1000_tve_get_timing(struct udevice *dev)
+{
+	struct rockchip_bridge *bridge =
+		(struct rockchip_bridge *)dev_get_driver_data(dev);
+	struct connector_state *conn_state = &bridge->state->conn_state;
+	struct drm_display_mode *mode = &conn_state->mode;
+	struct overscan *overscan = &conn_state->overscan;
+
+	drm_rk1000_select_output(overscan, mode);
+
+	return 0;
+}
+
+static const struct rockchip_bridge_funcs rk1000_tve_bridge_funcs = {
+	.enable = rk1000_tve_bridge_enable,
+	.disable = rk1000_tve_bridge_disable,
+};
+
+static struct rockchip_bridge rk1000_tve_driver_data = {
+	.funcs = &rk1000_tve_bridge_funcs,
+};
+
+struct video_bridge_ops rk1000_tve_ops = {
+	.get_timing = rk1000_tve_get_timing,
+};
+
+static const struct udevice_id rk1000_tve_ids[] = {
+	{
+		.compatible = "rockchip,rk1000-tve",
+		.data = (ulong)&rk1000_tve_driver_data,
+	},
+	{ }
+};
+
+U_BOOT_DRIVER(rk1000_tve) = {
+	.name = "rk1000_tve",
+	.id = UCLASS_VIDEO_BRIDGE,
+	.of_match = rk1000_tve_ids,
+	.ops = &rk1000_tve_ops,
+	.probe = rk1000_tve_probe,
+	.priv_auto_alloc_size = sizeof(struct rk1000_tve),
+};
diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index f6a5588845..4d8bf77ef0 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -560,7 +560,7 @@ static int display_init(struct display_state *state)
 		printf("hdmi plugin ,skip tve\n");
 		goto deinit;
 	}
-#elif defined(CONFIG_ROCKCHIP_DRM_RK1000)
+#elif defined(CONFIG_DRM_ROCKCHIP_RK1000)
 	if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_LVDS) {
 		printf("hdmi plugin ,skip tve\n");
 		goto deinit;
@@ -568,7 +568,7 @@ static int display_init(struct display_state *state)
 #endif
 	if (conn_funcs->detect) {
 		ret = conn_funcs->detect(state);
-#if defined(CONFIG_ROCKCHIP_DRM_TVE) || defined(CONFIG_ROCKCHIP_DRM_RK1000)
+#if defined(CONFIG_ROCKCHIP_DRM_TVE) || defined(CONFIG_DRM_ROCKCHIP_RK1000)
 		if (conn_state->type == DRM_MODE_CONNECTOR_HDMIA)
 			crtc->hdmi_hpd = ret;
 #endif

commit 75eb6fceb584d246c2b7cfac79b4fe43d0ec0ecd
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Mon Sep 16 10:28:58 2019 +0800

    video/drm: Add bridge get_timing interface
    
    Some bridge can't get tv edid such as rk1000 cvbs, but
    at present bridge can't provide timing without edid. So
    we add get_timing interface to provide timing.
    
    Change-Id: Id74802a3bff8140e3677f6633788aacd021afc91
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>

diff --git a/drivers/video/bridge/video-bridge-uclass.c b/drivers/video/bridge/video-bridge-uclass.c
index 29f5b7e9a4..f9ef6f9ad9 100644
--- a/drivers/video/bridge/video-bridge-uclass.c
+++ b/drivers/video/bridge/video-bridge-uclass.c
@@ -55,6 +55,15 @@ int video_bridge_read_edid(struct udevice *dev, u8 *buf, int buf_size)
 	return ops->read_edid(dev, buf, buf_size);
 }
 
+int video_bridge_get_timing(struct udevice *dev)
+{
+	struct video_bridge_ops *ops = video_bridge_get_ops(dev);
+
+	if (!ops || !ops->get_timing)
+		return -ENOSYS;
+	return ops->get_timing(dev);
+}
+
 static int video_bridge_pre_probe(struct udevice *dev)
 {
 	struct video_bridge_priv *uc_priv = dev_get_uclass_priv(dev);
diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index eadcd601ac..f6a5588845 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -586,6 +586,8 @@ static int display_init(struct display_state *state)
 						&bpc);
 			if (!ret)
 				edid_print_info((void *)&conn_state->edid);
+		} else {
+			ret = video_bridge_get_timing(conn_state->bridge->dev);
 		}
 	} else if (conn_funcs->get_timing) {
 		ret = conn_funcs->get_timing(state);
diff --git a/include/video_bridge.h b/include/video_bridge.h
index 0699a8dda8..7c86c5997c 100644
--- a/include/video_bridge.h
+++ b/include/video_bridge.h
@@ -63,6 +63,14 @@ struct video_bridge_ops {
 	 * @return number of bytes read, <=0 for error
 	 */
 	int (*read_edid)(struct udevice *dev, u8 *buf, int buf_size);
+
+	/**
+	 * get_timing() - Get timing from bridge
+	 *
+	 * @dev:	Device to get timing
+	 * @return 0 if OK, -ve on error
+	 */
+	int (*get_timing)(struct udevice *dev);
 };
 
 #define video_bridge_get_ops(dev) \
@@ -109,4 +117,11 @@ int video_bridge_check_attached(struct udevice *dev);
  */
 int video_bridge_read_edid(struct udevice *dev, u8 *buf, int buf_size);
 
+/**
+ * video_bridge_get_timing() - Get timing from bridge
+ *
+ * @dev:	Device to get timing
+ * @return 0 if OK, -ve on error
+ */
+int video_bridge_get_timing(struct udevice *dev);
 #endif

commit a0614e0a984b14712666242970f787f4c3ba713c
Author: Bian Jin chen <kenjc.bian@rock-chips.com>
Date:   Tue Sep 17 09:05:26 2019 +0800

    rockchip: resource: fix dtb addr error in hdr_v2.
    
    dtb addr should add the size of recovery_dtbo when
    recover_dtbo is included.
    
    Change-Id: I97f7bd6e248f61413b530972abe46c3236bd0b01
    Signed-off-by: Bian Jin chen <kenjc.bian@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 58bceeb6ee..59a2332472 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -311,8 +311,10 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 		rsce_base += ALIGN(andr_hdr->ramdisk_size, andr_hdr->page_size);
 
 		if (andr_hdr->header_version >= 2) {
-			dtb_offset = rsce_base + ALIGN(andr_hdr->second_size,
-						andr_hdr->page_size);
+			dtb_offset = rsce_base +
+			     ALIGN(andr_hdr->recovery_dtbo_size,
+				   andr_hdr->page_size) +
+			     ALIGN(andr_hdr->second_size, andr_hdr->page_size);
 			dtb_size = andr_hdr->dtb_size;
 		}
 

commit 3bdef7e642ae558d0e61ce26438d10b55b26ec9c
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Aug 28 16:58:09 2019 +0800

    gpt: return 1 directly when test the mbr sector
    
    In sd-update card, we use RKPARM partition in bootloader to load
    firmware, and use MS-DOS partition in recovery to update system.
    Now, we want to use gpt in bootloader and abandon the RKPARM
    partition. So in new sd-update card, we write the MS-DOS partition
    table and gpt to sd card. Then we must return 1 directly when test
    the mbr sector otherwise the gpt is unavailable.
    
    Change-Id: I994a0cb86e7829c6edadfe357cbf51ad00b65cec
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/disk/part_efi.c b/disk/part_efi.c
index 4033b3e802..dfbef58555 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -429,6 +429,7 @@ static int part_efi_repair(struct blk_desc *dev_desc, gpt_entry *gpt_pte,
 static int part_test_efi(struct blk_desc *dev_desc)
 {
 	ALLOC_CACHE_ALIGN_BUFFER_PAD(legacy_mbr, legacymbr, 1, dev_desc->blksz);
+	int ret = 0;
 
 	/* Read legacy MBR from block 0 and validate it */
 	if ((blk_dread(dev_desc, 0, 1, (ulong *)legacymbr) != 1)
@@ -460,7 +461,10 @@ static int part_test_efi(struct blk_desc *dev_desc)
 		if (part_efi_repair(dev_desc, b_gpt_pte, b_gpt_head,
 				    head_gpt_valid, backup_gpt_valid))
 			printf("Primary GPT repair fail!\n");
+	} else if (head_gpt_valid == 0 && backup_gpt_valid == 0) {
+		ret = -1;
 	}
+
 	free(h_gpt_pte);
 	h_gpt_pte = NULL;
 	free(h_gpt_head);
@@ -470,7 +474,7 @@ static int part_test_efi(struct blk_desc *dev_desc)
 	free(b_gpt_head);
 	b_gpt_head = NULL;
 #endif
-	return 0;
+	return ret;
 }
 
 /**
@@ -1044,6 +1048,17 @@ static int is_pmbr_valid(legacy_mbr * mbr)
 	if (!mbr || le16_to_cpu(mbr->signature) != MSDOS_MBR_SIGNATURE)
 		return 0;
 
+#ifdef CONFIG_ARCH_ROCKCHIP
+	/*
+	 * In sd-update card, we use RKPARM partition in bootloader to load
+	 * firmware, and use MS-DOS partition in recovery to update system.
+	 * Now, we want to use gpt in bootloader and abandon the RKPARM
+	 * partition. So in new sd-update card, we write the MS-DOS partition
+	 * table and gpt to sd card. Then we must return 1 directly when test
+	 * the mbr sector otherwise the gpt is unavailable.
+	 */
+	return 1;
+#endif
 	for (i = 0; i < 4; i++) {
 		if (pmbr_part_valid(&mbr->partition_record[i])) {
 			return 1;

commit 6383df2b7bccc9663bace7f695a4d72796081586
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Thu Sep 12 10:06:20 2019 +0800

    video/drm: rgb: set lcdc data[15:12] output
    
    lcdc data[15:12] is reuse with jtag, when use rgb output
    set as rgb output.
    
    Change-Id: Ia7f5006a0d61d94895fad519c622b6a85451cc1a
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_rgb.c b/drivers/video/drm/rockchip_rgb.c
index 02cf1ba8a0..bc4637172e 100644
--- a/drivers/video/drm/rockchip_rgb.c
+++ b/drivers/video/drm/rockchip_rgb.c
@@ -36,6 +36,9 @@
 #define RK3288_LVDS_CON_CLKINV(v)	HIWORD_UPDATE(v,  8,  8)
 #define RK3288_LVDS_CON_TTL_EN(v)	HIWORD_UPDATE(v,  6,  6)
 
+#define RK3368_GRF_SOC_CON15		0x043c
+#define RK3368_FORCE_JETAG(v)		HIWORD_UPDATE(v,  13,  13)
+
 struct rockchip_rgb;
 
 struct rockchip_rgb_funcs {
@@ -201,6 +204,20 @@ static const struct rockchip_connector rk3288_rgb_driver_data = {
 	.data = &rk3288_rgb_funcs,
 };
 
+static void rk3368_rgb_enable(struct rockchip_rgb *rgb, int pipe)
+{
+	regmap_write(rgb->grf, RK3368_GRF_SOC_CON15, RK3368_FORCE_JETAG(0));
+}
+
+static const struct rockchip_rgb_funcs rk3368_rgb_funcs = {
+	.enable = rk3368_rgb_enable,
+};
+
+static const struct rockchip_connector rk3368_rgb_driver_data = {
+	.funcs = &rockchip_rgb_connector_funcs,
+	.data = &rk3368_rgb_funcs,
+};
+
 static const struct rockchip_connector rockchip_rgb_driver_data = {
 	.funcs = &rockchip_rgb_connector_funcs,
 };
@@ -232,7 +249,7 @@ static const struct udevice_id rockchip_rgb_ids[] = {
 	},
 	{
 		.compatible = "rockchip,rk3368-rgb",
-		.data = (ulong)&rockchip_rgb_driver_data,
+		.data = (ulong)&rk3368_rgb_driver_data,
 	},
 	{
 		.compatible = "rockchip,rv1108-rgb",

commit a3ded4d4a18c6b57e194c2e94861ac819b4ca109
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Sep 11 18:14:47 2019 +0800

    rockchip: mkimage: add support for RK1808
    
    Reserve 8K sram for maskrom.
    
    Change-Id: I890d93b6c9a8f4ca50a2c0b30de9b07816e68e8f
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index 08d8a22903..27e0004eba 100644
--- a/tools/rkcommon.c
+++ b/tools/rkcommon.c
@@ -80,6 +80,7 @@ static struct spl_info spl_infos[] = {
 	{ "rk3399", "RK33", 0x30000 - 0x2000, false },
 	{ "px30", "RK33", 0x2800, false },
 	{ "rv1108", "RK11", 0x1800, false },
+	{ "rk1808", "RK18", 0x200000 - 0x2000, false},
 };
 
 static unsigned char rc4_key[16] = {

commit c9c9fba95efc531977913243054723f5f1741ddd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Sep 12 10:13:26 2019 +0800

    include: compat: remove dump_stack(...)
    
    - We have implement dump_stack() for both ARM and ARM64;
    - It was brought back by careless on commit: (28386b6 UPSTREAM: lib: Add hexdump)
    
    Change-Id: I8ebbd46862475485963d2ac835ea4031207d2153
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/linux/compat.h b/include/linux/compat.h
index 52a8d89d4e..96d2551277 100644
--- a/include/linux/compat.h
+++ b/include/linux/compat.h
@@ -194,7 +194,6 @@ typedef unsigned long blkcnt_t;
 #define init_waitqueue_head(...)	do { } while (0)
 #define wait_event_interruptible(...)	0
 #define wake_up_interruptible(...)	do { } while (0)
-#define dump_stack(...)			do { } while (0)
 
 #define task_pid_nr(x)			0
 #define set_freezable(...)		do { } while (0)

commit 01973d127ba65adc3cc02f3e193db2b5f31bcefb
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Sep 4 09:18:35 2019 +0800

    common: android: support boot-fastboot
    
    In android Q, the bootloader must implement a new Boot Control
    Block (BCB) command of boot-fastboot in order to support fastbootd.
    Then the bootloader is expected to load and boot into the recovery
    image upon seeing boot-fastboot in the BCB command. Recovery then
    parses the BCB message and switches to fastbootd mode.
    
    Change-Id: Ie868912071f6a371ec83caa8d591281fc063e6ae
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index dad9284765..9ace6cfe6a 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -184,6 +184,9 @@ static enum android_boot_mode android_bootloader_load_and_clear_mode(
 	if (!strcmp("boot-recovery", bcb.command))
 		return ANDROID_BOOT_MODE_RECOVERY;
 
+	if (!strcmp("boot-fastboot", bcb.command))
+		return ANDROID_BOOT_MODE_RECOVERY;
+
 	return ANDROID_BOOT_MODE_NORMAL;
 }
 

commit f877a23945c5e95caa84ba53f22b33b26f0ebe78
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 10 11:24:25 2019 +0800

    configs: rknpu-lion: enable CONFIG_CMD_BOOTD
    
    clean by make savedefconfig.
    
    Change-Id: Ib68c35deb8768b9ad31fd5e1fdaca683c281fcdd
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rknpu-lion_defconfig b/configs/rknpu-lion_defconfig
index bcc3cd3703..465aebb583 100644
--- a/configs/rknpu-lion_defconfig
+++ b/configs/rknpu-lion_defconfig
@@ -18,7 +18,6 @@ CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_CONSOLE is not set
-# CONFIG_CMD_BOOTD is not set
 # CONFIG_CMD_BOOTI is not set
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set

commit d9f1798458b60c71429d493b6f56a7bce9adb669
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 10 11:23:47 2019 +0800

    configs: rk3036: enable CONFIG_CMD_BOOTD
    
    clean by make savedefconfig.
    
    Change-Id: Ic8a0ed6e156e36bdad4e318c8e79971e1652591f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3036_defconfig b/configs/rk3036_defconfig
index a6eb3bebd1..455ed1d231 100644
--- a/configs/rk3036_defconfig
+++ b/configs/rk3036_defconfig
@@ -32,11 +32,9 @@ CONFIG_SPL_OPTEE_SUPPORT=y
 CONFIG_SPL_OPTEE=y
 CONFIG_TPL_TINY_FRAMEWORK=y
 CONFIG_TPL_SERIAL_SUPPORT=y
-CONFIG_FASTBOOT_BUF_ADDR=0x60800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
-# CONFIG_CMD_BOOTD is not set
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set

commit 64c205a554eaf5d7e43bbfff81d20c5b2b185cc0
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 10 11:22:52 2019 +0800

    configs: rk3399pro: enable CONFIG_CMD_BOOTD
    
    clean by make savedefconfig.
    
    Change-Id: I3408dd723824e2b7c982f81059e8012b3e635d16
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3399pro_defconfig b/configs/rk3399pro_defconfig
index 591c4c80f3..4313b0d810 100644
--- a/configs/rk3399pro_defconfig
+++ b/configs/rk3399pro_defconfig
@@ -27,7 +27,6 @@ CONFIG_FASTBOOT_BUF_ADDR=0x00800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
-# CONFIG_CMD_BOOTD is not set
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_DTIMG=y
 # CONFIG_CMD_ELF is not set
@@ -84,7 +83,6 @@ CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
 CONFIG_POWER_FG_RK817=y
-CONFIG_CHARGER_BQ25700=y
 CONFIG_IO_DOMAIN=y
 CONFIG_ROCKCHIP_IO_DOMAIN=y
 CONFIG_DM_PMIC=y
@@ -92,6 +90,7 @@ CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_REGULATOR_RK8XX=y
+CONFIG_CHARGER_BQ25700=y
 CONFIG_DM_CHARGE_DISPLAY=y
 CONFIG_CHARGE_ANIMATION=y
 CONFIG_PWM_ROCKCHIP=y
@@ -138,7 +137,6 @@ CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
-CONFIG_OF_LIBFDT_OVERLAY=y
 # CONFIG_EFI_LOADER is not set
 CONFIG_AVB_LIBAVB=y
 CONFIG_AVB_LIBAVB_AB=y

commit 25dc164ec098f8b11f883108741ee41bd16ec3bd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 10 11:21:48 2019 +0800

    configs: px30/rk3326: enable CONFIG_CMD_BOOTD
    
    enable CONFIG_CMD_BOOTD
    
    Change-Id: Ia13bc0a59939a4adc2484e44f4c3e0ee352bf0c3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 4da8f6d3a0..9eccf06d30 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -28,7 +28,6 @@ CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
-# CONFIG_CMD_BOOTD is not set
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
@@ -68,10 +67,10 @@ CONFIG_RK8XX_PWRKEY=y
 CONFIG_ADC_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
 CONFIG_DM_PMIC=y
diff --git a/configs/evb-rk3326_defconfig b/configs/evb-rk3326_defconfig
index 801f4b46bc..448e048283 100644
--- a/configs/evb-rk3326_defconfig
+++ b/configs/evb-rk3326_defconfig
@@ -29,7 +29,6 @@ CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
-# CONFIG_CMD_BOOTD is not set
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
diff --git a/configs/px30_defconfig b/configs/px30_defconfig
index 8264e501e4..8fadf326d5 100644
--- a/configs/px30_defconfig
+++ b/configs/px30_defconfig
@@ -29,7 +29,6 @@ CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
-# CONFIG_CMD_BOOTD is not set
 CONFIG_CMD_DTIMG=y
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set
@@ -134,7 +133,6 @@ CONFIG_SPL_TINY_MEMSET=y
 CONFIG_LZ4=y
 CONFIG_LZO=y
 CONFIG_ERRNO_STR=y
-CONFIG_OF_LIBFDT_OVERLAY=y
 # CONFIG_EFI_LOADER is not set
 CONFIG_AVB_LIBAVB=y
 CONFIG_AVB_LIBAVB_AB=y
diff --git a/configs/rk3326-aarch32_defconfig b/configs/rk3326-aarch32_defconfig
index f2ea3463f7..28a01788a5 100644
--- a/configs/rk3326-aarch32_defconfig
+++ b/configs/rk3326-aarch32_defconfig
@@ -23,7 +23,6 @@ CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_FASTBOOT_OEM_UNLOCK=y
-# CONFIG_CMD_BOOTD is not set
 CONFIG_CMD_DTIMG=y
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set
diff --git a/configs/rk3326_defconfig b/configs/rk3326_defconfig
index 1509d7487f..0c0a36db7c 100644
--- a/configs/rk3326_defconfig
+++ b/configs/rk3326_defconfig
@@ -33,7 +33,6 @@ CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_FASTBOOT_OEM_UNLOCK=y
-# CONFIG_CMD_BOOTD is not set
 CONFIG_CMD_DTIMG=y
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set

commit 2bdcdc9a75670fbdb052b3d1a79d7c6445d5d8ec
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 10 11:20:58 2019 +0800

    configs: rk3328: enable CONFIG_CMD_BOOTD
    
    Change-Id: Ibd90f0c4df08a2bfd52a2575b1bd14070d4a7415
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index 2353b1b9b1..3d230bda80 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -35,7 +35,6 @@ CONFIG_FASTBOOT_BUF_SIZE=0x4000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_BDI is not set
-# CONFIG_CMD_BOOTD is not set
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_DTIMG=y
 # CONFIG_CMD_ELF is not set

commit 1df55220eff829504d0cf981e11935664a80dab3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 10 11:20:20 2019 +0800

    configs: rk3288: enable CONFIG_CMD_BOOTD
    
    clean by make savedefconfig.
    
    Change-Id: I4de67445fe2071a55aae0ab09ae5fdf422d0c562
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3288_defconfig b/configs/rk3288_defconfig
index 56ec88442b..80c444a128 100644
--- a/configs/rk3288_defconfig
+++ b/configs/rk3288_defconfig
@@ -14,15 +14,13 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_ANDROID_AVB=y
-# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set                                                                                                     
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
+CONFIG_FASTBOOT_BUF_SIZE=0x4000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
-CONFIG_FASTBOOT_BUF_ADDR=0x800800
-CONFIG_FASTBOOT_BUF_SIZE=0x4000000
-# CONFIG_CMD_BOOTD is not set
 CONFIG_CMD_DTIMG=y
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set
@@ -110,7 +108,6 @@ CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_CMD_DHRYSTONE=y
 CONFIG_ERRNO_STR=y
-CONFIG_OF_LIBFDT_OVERLAY=y
 # CONFIG_EFI_LOADER is not set
 CONFIG_AVB_LIBAVB=y
 CONFIG_AVB_LIBAVB_AB=y

commit 7247a4878f1b75927b4b4daa3ca1ef2454c155c5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 10 11:20:02 2019 +0800

    configs: rk322x: enable CONFIG_CMD_BOOTD
    
    clean by make savedefconfig.
    
    Change-Id: I712d16e80d6e8324397322ce803f1d1cbb336995
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk322x_defconfig b/configs/rk322x_defconfig
index fd3f6306e0..891dc340ff 100644
--- a/configs/rk322x_defconfig
+++ b/configs/rk322x_defconfig
@@ -31,11 +31,9 @@ CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 CONFIG_SPL_OPTEE=y
 CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
-CONFIG_FASTBOOT_BUF_ADDR=0x60800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
-# CONFIG_CMD_BOOTD is not set
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set

commit 7af8cad4f5f16f6be265b3f94d081485ea4d9217
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 10 11:18:47 2019 +0800

    configs: rk3128x: enable CONFIG_CMD_BOOTD
    
    clean by make savedefconfig.
    
    Change-Id: Ib79b44cb4b281fa61eef588eb0805853432179bb
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3128x_defconfig b/configs/rk3128x_defconfig
index 922c568e96..307ff2d5a7 100644
--- a/configs/rk3128x_defconfig
+++ b/configs/rk3128x_defconfig
@@ -32,11 +32,9 @@ CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 CONFIG_SPL_OPTEE=y
 CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
-CONFIG_FASTBOOT_BUF_ADDR=0x60800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
-# CONFIG_CMD_BOOTD is not set
 CONFIG_CMD_DTIMG=y
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set
@@ -126,7 +124,6 @@ CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_TPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
-CONFIG_OF_LIBFDT_OVERLAY=y
 # CONFIG_EFI_LOADER is not set
 CONFIG_AVB_LIBAVB=y
 CONFIG_AVB_LIBAVB_AB=y

commit a2897f891f2aa40c5be80b3921ecb61d3d791c91
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 10 11:18:12 2019 +0800

    configs: rk3126: enable CONFIG_CMD_BOOTD
    
    Change-Id: I60b0753a21b377dd544513d37cb066d62c07bfac
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3126_defconfig b/configs/rk3126_defconfig
index 199ce340b2..66ca79a99a 100644
--- a/configs/rk3126_defconfig
+++ b/configs/rk3126_defconfig
@@ -17,7 +17,6 @@ CONFIG_FASTBOOT_BUF_ADDR=0x60800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
-# CONFIG_CMD_BOOTD is not set
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set

commit 41fc63d696480c7c35eb9bc8347defbdc4c32f01
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 10 11:17:11 2019 +0800

    configs: rk1808: enable CONFIG_CMD_BOOTD
    
    clean by make savedefconfig.
    
    Change-Id: I5f32b42ecebb71f209b7a25c3c69d4636f675f77
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk1808_defconfig b/configs/rk1808_defconfig
index 86937c3554..1c075e6faa 100644
--- a/configs/rk1808_defconfig
+++ b/configs/rk1808_defconfig
@@ -19,7 +19,6 @@ CONFIG_FASTBOOT_BUF_ADDR=0x00800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
-# CONFIG_CMD_BOOTD is not set
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
@@ -53,11 +52,10 @@ CONFIG_DM_KEY=y
 CONFIG_ADC_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_PHY=y
-CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
 CONFIG_DM_PMIC=y
@@ -95,8 +93,8 @@ CONFIG_G_DNL_PRODUCT_NUM=0x330d
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
-CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_INNO_MIPI_PHY=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_LCD=y
 CONFIG_LZ4=y

commit 855eeaea6bc6d64ae77808ba7607c5148127ca0b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 10 11:16:43 2019 +0800

    configs: rk3368: enable CONFIG_CMD_BOOTD
    
    Change-Id: I2d6949f1e23db21b669834a32c45cadefeefa6e0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3368_defconfig b/configs/rk3368_defconfig
index 9d18fda267..d987029cea 100644
--- a/configs/rk3368_defconfig
+++ b/configs/rk3368_defconfig
@@ -17,7 +17,6 @@ CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
-# CONFIG_CMD_BOOTD is not set
 CONFIG_CMD_DTIMG=y
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set

commit 667b42a84de10523753f6006b0b1fd2fbaf8b543
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Fri Sep 6 14:31:59 2019 +0800

    clk: rockchip: rk3368: improve DCLK signal quality
    
    Improved PLL output jitter can support more types of 4K TV.
    
    Change-Id: I40a81cc276abf6ca859ad91be6785ffd15747ee5
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c
index 54555b826f..f77fe80f5a 100644
--- a/drivers/clk/rockchip/clk_rk3368.c
+++ b/drivers/clk/rockchip/clk_rk3368.c
@@ -39,6 +39,7 @@ struct pll_div {
 #define APLL_B_HZ	(816 * 1000 * 1000)
 #define GPLL_HZ		(576 * 1000 * 1000)
 #define CPLL_HZ		(400 * 1000 * 1000)
+#define NPLL_HZ		(594 * 1000 * 1000)
 
 #define DIV_TO_RATE(input_rate, div)    ((input_rate) / ((div) + 1))
 
@@ -98,6 +99,7 @@ static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 1, 2);
 static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 1, 6);
 #endif
 #endif
+static const struct pll_div npll_init_cfg = PLL_DIVISORS(NPLL_HZ, 1, 4);
 
 static ulong rk3368_clk_get_rate(struct clk *clk);
 
@@ -228,13 +230,15 @@ static int rkclk_set_pll(struct rk3368_cru *cru, enum rk3368_pll_id pll_id,
 	 * BWADJ should be set to NF / 2 to ensure the nominal bandwidth.
 	 * Compare the RK3368 TRM, section "3.6.4 PLL Bandwidth Adjustment".
 	 */
-	clrsetbits_le32(&pll->con2, PLL_BWADJ_MASK, (div->nf >> 1) - 1);
+	if (pll_id == NPLL)
+		clrsetbits_le32(&pll->con2, PLL_BWADJ_MASK, 0);
+	else
+		clrsetbits_le32(&pll->con2, PLL_BWADJ_MASK, (div->nf >> 1) - 1);
 
 	udelay(10);
 
 	/* return from reset */
 	rk_clrreg(&pll->con3, PLL_RESET_MASK);
-	rk_clrreg(&pll->con3, 0xf << 0);
 
 	/* waiting for pll lock */
 	while (!(readl(&pll->con1) & PLL_LOCK_STA))
@@ -730,12 +734,16 @@ static ulong rk3368_vop_set_clk(struct rk3368_cru *cru, int clk_id, uint hz)
 
 	switch (clk_id) {
 	case DCLK_VOP:
-		ret = pll_para_config(hz, &npll_config, &lcdc_div);
-		if (ret)
-			return ret;
-
-		rkclk_set_pll(cru, NPLL, &npll_config);
+		if (!(NPLL_HZ % hz)) {
+			rkclk_set_pll(cru, NPLL, &npll_init_cfg);
+			lcdc_div = NPLL_HZ / hz;
+		} else {
+			ret = pll_para_config(hz, &npll_config, &lcdc_div);
+			if (ret)
+				return ret;
 
+			rkclk_set_pll(cru, NPLL, &npll_config);
+		}
 		/* vop dclk source clk: npll,dclk_div: 1 */
 		rk_clrsetreg(&cru->clksel_con[20],
 			     (DCLK_VOP_PLL_SEL_MASK << DCLK_VOP_PLL_SEL_SHIFT) |
@@ -1259,6 +1267,7 @@ static int rk3368_clk_probe(struct udevice *dev)
 #if IS_ENABLED(CONFIG_SPL_BUILD) || IS_ENABLED(CONFIG_TPL_BUILD)
 	rkclk_init(priv->cru);
 #endif
+	rkclk_set_pll(priv->cru, NPLL, &npll_init_cfg);
 	if (!priv->armlclk_init_hz)
 		priv->armlclk_init_hz = rkclk_pll_get_rate(priv->cru, APLLL);
 	if (!priv->armbclk_init_hz)

commit d901aece56174679f3acd581175e1226ea5cc847
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Sep 4 14:38:11 2019 +0800

    common: android: close optee client before jump to kernel
    
    Change-Id: Icbcf65ecbb043b9119e6c65f9016390ef8f15935
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index df844ca2e4..dad9284765 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -1205,6 +1205,10 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	ret = android_image_get_fdt((void *)load_address, &fdt_addr);
 	if (!ret)
 		env_set_hex("fdt_addr", fdt_addr);
+#endif
+#ifdef CONFIG_OPTEE_CLIENT
+	if (trusty_notify_optee_uboot_end())
+		printf("Close optee client failed!\n");
 #endif
 	android_bootloader_boot_kernel(load_address);
 

commit d0f492c85c8eac6693cfd29b899ee17e43056f19
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Sep 9 09:04:57 2019 +0800

    rockchip: resource: improve comment for init_resource_list()
    
    Change-Id: Ic6ac812976b063c6991e33d128e5abe11832c78e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 2d39e1a196..58bceeb6ee 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -195,10 +195,16 @@ static int replace_resource_entry(const char *f_name, uint32_t base,
 }
 
 /*
- * 1. Get resource file from part: boot/recovery(AOSP) > resource(RK)
- * 2. Add all file into resource file list and load them from storage
- *    when we really need it.
- * 3. Parse logo partition and add logo file int resource file list;
+ * There are: logo/battery pictures and dtb file in the resource image by default.
+ *
+ * This function does:
+ *
+ * 1. Get resource image from part: boot/recovery(AOSP) > resource(RK);
+ * 2. Add all file into resource list(We load them from storage when we need);
+ * 3. Add logo picture from logo partition into resource list(replace the
+ *    old one in resource file);
+ * 4. Add dtb file from dtb position into resource list if boot_img_hdr_v2
+ *    (replace the old one in resource file);
  */
 static int init_resource_list(struct resource_img_hdr *hdr)
 {

commit bbe32cd5bfc9843cce8bdc19c9ab261e3315d666
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 29 20:00:34 2019 +0800

    rockchip: resource: support parse dtb from dtb position of android image
    
    - the dtb position was added in boot_img_hdr_v2;
    - required for Android Q or later.
    
    Change-Id: Ia0536f0fd68a4cdfc55356c6371d1b781f655a9a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 5301979c89..2d39e1a196 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -209,8 +209,10 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 	disk_partition_t part_info;
 	int resource_found = 0;
 	void *content = NULL;
-	int offset = 0;
-	int e_num;
+	int rsce_base = 0;
+	int dtb_offset = 0;
+	int dtb_size = 0;
+	int e_num, cnt;
 	int size;
 	int ret;
 
@@ -230,12 +232,13 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 		for (e_num = 0; e_num < hdr->e_nums; e_num++) {
 			size = e_num * hdr->e_blks * dev_desc->blksz;
 			entry = (struct resource_entry *)(content + size);
-			add_file_to_list(entry, offset);
+			add_file_to_list(entry, rsce_base);
 		}
 		return 0;
 	}
 
-	hdr = memalign(ARCH_DMA_MINALIGN, dev_desc->blksz);
+	cnt = DIV_ROUND_UP(sizeof(struct andr_img_hdr), dev_desc->blksz);
+	hdr = memalign(ARCH_DMA_MINALIGN, dev_desc->blksz * cnt);
 	if (!hdr)
 		return -ENOMEM;
 
@@ -272,8 +275,8 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 
 	/* Try to find resource from android second position */
 	andr_hdr = (void *)hdr;
-	ret = blk_dread(dev_desc, part_info.start, 1, andr_hdr);
-	if (ret != 1) {
+	ret = blk_dread(dev_desc, part_info.start, cnt, andr_hdr);
+	if (ret != cnt) {
 		printf("%s: failed to read %s hdr, ret=%d\n",
 		       __func__, part_info.name, ret);
 		ret = -EIO;
@@ -285,6 +288,9 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 		u32 os_ver = andr_hdr->os_version >> 11;
 		u32 os_lvl = andr_hdr->os_version & ((1U << 11) - 1);
 
+#ifdef DEBUG
+		android_print_contents(andr_hdr);
+#endif
 		if (os_ver)
 			printf("Android %u.%u, Build %u.%u\n",
 			       (os_ver >> 14) & 0x7F, (os_ver >> 7) & 0x7F,
@@ -293,11 +299,20 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 		debug("%s: Load resource from %s second pos\n",
 		      __func__, part_info.name);
 
-		offset = part_info.start * dev_desc->blksz;
-		offset += andr_hdr->page_size;
-		offset += ALIGN(andr_hdr->kernel_size, andr_hdr->page_size);
-		offset += ALIGN(andr_hdr->ramdisk_size, andr_hdr->page_size);
-		offset = offset / dev_desc->blksz;
+		rsce_base = part_info.start * dev_desc->blksz;
+		rsce_base += andr_hdr->page_size;
+		rsce_base += ALIGN(andr_hdr->kernel_size, andr_hdr->page_size);
+		rsce_base += ALIGN(andr_hdr->ramdisk_size, andr_hdr->page_size);
+
+		if (andr_hdr->header_version >= 2) {
+			dtb_offset = rsce_base + ALIGN(andr_hdr->second_size,
+						andr_hdr->page_size);
+			dtb_size = andr_hdr->dtb_size;
+		}
+
+		rsce_base = DIV_ROUND_UP(rsce_base, dev_desc->blksz);
+		dtb_offset =
+			DIV_ROUND_UP(dtb_offset, dev_desc->blksz) - rsce_base;
 		resource_found = 1;
 	}
 parse_resource_part:
@@ -314,13 +329,13 @@ parse_resource_part:
 			       __func__, ret);
 			goto out;
 		}
-		offset = part_info.start;
+		rsce_base = part_info.start;
 	}
 
 	/*
-	 * Now, the "offset" points to the resource file sector.
+	 * Now, the "rsce_base" points to the resource file sector.
 	 */
-	ret = blk_dread(dev_desc, offset, 1, hdr);
+	ret = blk_dread(dev_desc, rsce_base, 1, hdr);
 	if (ret != 1) {
 		printf("%s: failed to read resource hdr, ret=%d\n",
 		       __func__, ret);
@@ -342,7 +357,7 @@ parse_resource_part:
 		goto out;
 	}
 
-	ret = blk_dread(dev_desc, offset + hdr->c_offset,
+	ret = blk_dread(dev_desc, rsce_base + hdr->c_offset,
 			hdr->e_blks * hdr->e_nums, content);
 	if (ret != (hdr->e_blks * hdr->e_nums)) {
 		printf("%s: failed to read resource entries, ret=%d\n",
@@ -358,7 +373,7 @@ parse_resource_part:
 	for (e_num = 0; e_num < hdr->e_nums; e_num++) {
 		size = e_num * hdr->e_blks * dev_desc->blksz;
 		entry = (struct resource_entry *)(content + size);
-		add_file_to_list(entry, offset);
+		add_file_to_list(entry, rsce_base);
 	}
 
 	ret = 0;
@@ -423,6 +438,19 @@ err2:
 		free(header);
 	}
 
+	/*
+	 * boot_img_hdr_v2 feature.
+	 *
+	 * If dtb position is present, replace the old with new one
+	 */
+	if (dtb_size) {
+		ret = replace_resource_entry(DTB_FILE, rsce_base,
+					     dtb_offset, dtb_size);
+		if (ret)
+			printf("Failed to load dtb from dtb position\n");
+		else
+			env_update("bootargs", "androidboot.dtb_idx=0");
+	}
 err:
 	if (content)
 		free(content);

commit 4ebf6738fd644d064f127861a9b4239501348b8d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 29 20:00:05 2019 +0800

    rockchip: resource: add function replace_resource_entry()
    
    Change-Id: I4c038c6812eab39fedab96942c4cf389bf9e668e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 27829bd9ff..5301979c89 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -159,6 +159,41 @@ static int add_file_to_list(struct resource_entry *entry, int rsce_base)
 	return 0;
 }
 
+static int replace_resource_entry(const char *f_name, uint32_t base,
+				  uint32_t f_offset, uint32_t f_size)
+{
+	struct resource_entry *entry;
+	struct resource_file *file;
+	struct list_head *node;
+
+	if (!f_name || !f_size)
+		return -EINVAL;
+
+	entry = malloc(sizeof(*entry));
+	if (!entry)
+		return -ENOMEM;
+
+	strcpy(entry->tag, ENTRY_TAG);
+	strcpy(entry->name, f_name);
+	entry->f_offset = f_offset;
+	entry->f_size = f_size;
+
+	/* Delete exist entry, then add this new */
+	list_for_each(node, &entrys_head) {
+		file = list_entry(node, struct resource_file, link);
+		if (!strcmp(file->name, entry->name)) {
+			list_del(&file->link);
+			free(file);
+			break;
+		}
+	}
+
+	add_file_to_list(entry, base);
+	free(entry);
+
+	return 0;
+}
+
 /*
  * 1. Get resource file from part: boot/recovery(AOSP) > resource(RK)
  * 2. Add all file into resource file list and load them from storage
@@ -362,9 +397,6 @@ parse_logo:
 	 * and update from kernel user space dynamically.
 	 */
 	if (part_get_info_by_name(dev_desc, PART_LOGO, &part_info) >= 0) {
-		struct resource_file *file;
-		struct list_head *node;
-
 		header = memalign(ARCH_DMA_MINALIGN, dev_desc->blksz);
 		if (!header) {
 			ret = -ENOMEM;
@@ -383,32 +415,10 @@ parse_logo:
 			goto err2;
 		}
 
-		entry = malloc(sizeof(*entry));
-		if (!entry) {
-			ret = -ENOMEM;
-			goto err2;
-		}
-
-		memcpy(entry->tag, ENTRY_TAG, sizeof(ENTRY_TAG));
-		memcpy(entry->name, "logo.bmp", sizeof("logo.bmp"));
-		entry->f_size = get_unaligned_le32(&header->file_size);
-		entry->f_offset = 0;
-
-		/* Delete exist "logo.bmp", then add new */
-		list_for_each(node, &entrys_head) {
-			file = list_entry(node,
-					  struct resource_file, link);
-			if (!strcmp(file->name, entry->name)) {
-				list_del(&file->link);
-				free(file);
-				break;
-			}
-		}
-
-		add_file_to_list(entry, part_info.start);
-		free(entry);
-		ret = 0;
-		printf("Load logo.bmp from logo part\n");
+		ret = replace_resource_entry("logo.bmp", part_info.start, 0,
+					     get_unaligned_le32(&header->file_size));
+		if (!ret)
+			printf("Load logo.bmp from logo part\n");
 err2:
 		free(header);
 	}

commit 4f74cb3014d486c7ce325c0ac5dfe22c073e2dec
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Sep 2 20:49:00 2019 +0800

    rockchip: resource: add comments and header check
    
    Change-Id: I49b47d8716767014987c5913826ee7217869ae99
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 4b3b57b92f..27829bd9ff 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -101,8 +101,8 @@ struct resource_entry {
 
 struct resource_file {
 	char		name[MAX_FILE_NAME_LEN];
-	uint32_t	f_offset;
-	uint32_t	f_size;
+	uint32_t	f_offset;	/* Sector addr */
+	uint32_t	f_size;		/* Bytes */
 	struct list_head link;
 	uint32_t	rsce_base;	/* Base addr of resource */
 };
@@ -849,6 +849,11 @@ int rockchip_read_dtb_file(void *fdt_addr)
 	if (size < 0)
 		return size;
 
+	if (fdt_check_header(fdt_addr)) {
+		printf("Get a bad DTB file\n");
+		return -EBADF;
+	}
+
 	/* Apply DTBO */
 #if defined(CONFIG_CMD_DTIMG) && defined(CONFIG_OF_LIBFDT_OVERLAY)
 	android_fdt_overlay_apply((void *)fdt_addr);

commit 481590e8717e5d6f031265f6e7c63622d84ab0c3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 29 20:06:39 2019 +0800

    common: android: print boot_img_hdr_v2 new members
    
    Change-Id: I0d87d0ea71c1495c90d123ceaef13aed7af11d70
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/image-android.c b/common/image-android.c
index ec14ecf95f..c12b0f92a8 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -707,5 +707,10 @@ void android_print_contents(const struct andr_img_hdr *hdr)
 		printf("%srecovery dtbo offset:  %llx\n", p, hdr->recovery_dtbo_offset);
 		printf("%sheader size:           %x\n", p, hdr->header_size);
 	}
+
+	if (header_version >= 2) {
+		printf("%sdtb size:              %x\n", p, hdr->dtb_size);
+		printf("%sdtb addr:              %llx\n", p, hdr->dtb_addr);
+	}
 }
 #endif

commit 43d520f31285d7a72aa57f21e7b33dc022ab4ed9
Author: Alex Deymo <deymo@google.com>
Date:   Mon Aug 5 22:24:45 2019 +0200

    UPSTREAM: Update include/android_image.h from AOSP
    
    This takes the latest changes from AOSP from the file
    include/bootimg/bootimg.h from the repository:
    https://android.googlesource.com/platform/system/tools/mkbootimg
    and update the U-Boot version with the latest changes.
    
    This file keeps the changes from AOSP to a minimum:
     * Comments were converted from C++ to C style.
     * Code inside __cplusplus #ifdef blocks were removed.
     * C++11 struct extensions replaced with a single struct.
    
    Change-Id: Ifdfa7cc365a28e45ab7f192c121b49f6da99af36
    Signed-off-by: Alex Deymo <deymo@google.com>
    Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    (cherry picked from commit 0b6febfdb3cf9b4a51fa65fbd94f9ab2d7738f32)

diff --git a/include/android_image.h b/include/android_image.h
index 3c3319765b..0519ece368 100644
--- a/include/android_image.h
+++ b/include/android_image.h
@@ -1,65 +1,78 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
 /*
  * This is from the Android Project,
- * Repository: https://android.googlesource.com/platform/system/core/
- * File: mkbootimg/bootimg.h
- * Commit: d162828814b08ada310846a33205befb69ef5799
+ * Repository: https://android.googlesource.com/platform/system/tools/mkbootimg
+ * File: include/bootimg/bootimg.h
+ * Commit: e55998a0f2b61b685d5eb4a486ca3a0c680b1a2f
  *
- * Copyright (C) 2008 The Android Open Source Project
- *
- * SPDX-License-Identifier: BSD-2-Clause
+ * Copyright (C) 2007 The Android Open Source Project
  */
 
 #ifndef _ANDROID_IMAGE_H_
 #define _ANDROID_IMAGE_H_
 
-typedef struct andr_img_hdr andr_img_hdr;
-
 #define ANDR_BOOT_MAGIC "ANDROID!"
 #define ANDR_BOOT_MAGIC_SIZE 8
 #define ANDR_BOOT_NAME_SIZE 16
 #define ANDR_BOOT_ARGS_SIZE 512
 #define ANDR_BOOT_EXTRA_ARGS_SIZE 1024
 
+/*
+ * It is expected that callers would explicitly specify which version of the
+ * boot image header they need to use.
+ */
+typedef struct andr_img_hdr andr_img_hdr;
+
+/* The bootloader expects the structure of andr_img_hdr with header
+ * version 0 to be as follows: */
 struct andr_img_hdr {
-	char magic[ANDR_BOOT_MAGIC_SIZE];
+    /* Must be ANDR_BOOT_MAGIC. */
+    char magic[ANDR_BOOT_MAGIC_SIZE];
+
+    u32 kernel_size; /* size in bytes */
+    u32 kernel_addr; /* physical load addr */
 
-	u32 kernel_size;	/* size in bytes */
-	u32 kernel_addr;	/* physical load addr */
+    u32 ramdisk_size; /* size in bytes */
+    u32 ramdisk_addr; /* physical load addr */
 
-	u32 ramdisk_size;	/* size in bytes */
-	u32 ramdisk_addr;	/* physical load addr */
+    u32 second_size; /* size in bytes */
+    u32 second_addr; /* physical load addr */
 
-	u32 second_size;	/* size in bytes */
-	u32 second_addr;	/* physical load addr */
+    u32 tags_addr; /* physical addr for kernel tags */
+    u32 page_size; /* flash page size we assume */
 
-	u32 tags_addr;		/* physical addr for kernel tags */
-	u32 page_size;		/* flash page size we assume */
+    /* Version of the boot image header. */
+    u32 header_version;
 
-	u32 header_version;
+    /* Operating system version and security patch level.
+     * For version "A.B.C" and patch level "Y-M-D":
+     *   (7 bits for each of A, B, C; 7 bits for (Y-2000), 4 bits for M)
+     *   os_version = A[31:25] B[24:18] C[17:11] (Y-2000)[10:4] M[3:0] */
+    u32 os_version;
 
-	/* operating system version and security patch level; for
-	 * version "A.B.C" and patch level "Y-M-D":
-	 * ver = A << 14 | B << 7 | C         (7 bits for each of A, B, C)
-	 * lvl = ((Y - 2000) & 127) << 4 | M  (7 bits for Y, 4 bits for M)
-	 * os_version = ver << 11 | lvl */
-	u32 os_version;
+    char name[ANDR_BOOT_NAME_SIZE]; /* asciiz product name */
 
-	char name[ANDR_BOOT_NAME_SIZE]; /* asciiz product name */
+    char cmdline[ANDR_BOOT_ARGS_SIZE];
 
-	char cmdline[ANDR_BOOT_ARGS_SIZE];
+    u32 id[8]; /* timestamp / checksum / sha1 / etc */
 
-	u32 id[8]; /* timestamp / checksum / sha1 / etc */
+    /* Supplemental command line data; kept here to maintain
+     * binary compatibility with older versions of mkbootimg. */
+    char extra_cmdline[ANDR_BOOT_EXTRA_ARGS_SIZE];
 
-	/* Supplemental command line data; kept here to maintain
-	 * binary compatibility with older versions of mkbootimg */
-	char extra_cmdline[ANDR_BOOT_EXTRA_ARGS_SIZE];
+    /* Fields in boot_img_hdr_v1 and newer. */
+    u32 recovery_dtbo_size;   /* size in bytes for recovery DTBO/ACPIO image */
+    u64 recovery_dtbo_offset; /* offset to recovery dtbo/acpio in boot image */
+    u32 header_size;
 
-	uint32_t recovery_dtbo_size;	/* size of recovery dtbo image */
-	uint64_t recovery_dtbo_offset;	/* offset in boot image */
-	uint32_t header_size;		/* size of boot image header in bytes */
+    /* Fields in boot_img_hdr_v2 and newer. */
+    u32 dtb_size; /* size in bytes for DTB image */
+    u64 dtb_addr; /* physical load address for DTB image */
 } __attribute__((packed));
 
-/*
+/* When a boot header is of version 0, the structure of boot image is as
+ * follows:
+ *
  * +-----------------+
  * | boot header     | 1 page
  * +-----------------+
@@ -85,4 +98,45 @@ struct andr_img_hdr {
  * 6. if second_size != 0: jump to second_addr
  *    else: jump to kernel_addr
  */
+
+/* When the boot image header has a version of 2, the structure of the boot
+ * image is as follows:
+ *
+ * +---------------------+
+ * | boot header         | 1 page
+ * +---------------------+
+ * | kernel              | n pages
+ * +---------------------+
+ * | ramdisk             | m pages
+ * +---------------------+
+ * | second stage        | o pages
+ * +---------------------+
+ * | recovery dtbo/acpio | p pages
+ * +---------------------+
+ * | dtb                 | q pages
+ * +---------------------+
+
+ * n = (kernel_size + page_size - 1) / page_size
+ * m = (ramdisk_size + page_size - 1) / page_size
+ * o = (second_size + page_size - 1) / page_size
+ * p = (recovery_dtbo_size + page_size - 1) / page_size
+ * q = (dtb_size + page_size - 1) / page_size
+ *
+ * 0. all entities are page_size aligned in flash
+ * 1. kernel, ramdisk and DTB are required (size != 0)
+ * 2. recovery_dtbo/recovery_acpio is required for recovery.img in non-A/B
+ *    devices(recovery_dtbo_size != 0)
+ * 3. second is optional (second_size == 0 -> no second)
+ * 4. load each element (kernel, ramdisk, second, dtb) at
+ *    the specified physical address (kernel_addr, etc)
+ * 5. If booting to recovery mode in a non-A/B device, extract recovery
+ *    dtbo/acpio and apply the correct set of overlays on the base device tree
+ *    depending on the hardware/product revision.
+ * 6. prepare tags at tag_addr.  kernel_args[] is
+ *    appended to the kernel commandline in the tags.
+ * 7. r0 = 0, r1 = MACHINE_TYPE, r2 = tags_addr
+ * 8. if second_size != 0: jump to second_addr
+ *    else: jump to kernel_addr
+ */
+
 #endif

commit df3ff3726e3ed065a22efbe0c405de03d66fcc01
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Aug 30 09:44:06 2019 +0800

    cmd: android: round up image header size
    
    Change-Id: I79e1b31ae2d018c0a8da030482f2ac0be44cb177
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/cmd/android.c b/cmd/android.c
index 50916b2759..721a67a0f8 100644
--- a/cmd/android.c
+++ b/cmd/android.c
@@ -37,13 +37,13 @@ static int do_android_print_hdr(cmd_tbl_t *cmdtp, int flag,
 		return -ENODEV;
 	}
 
-	hdr = memalign(ARCH_DMA_MINALIGN, sizeof(*hdr));
+	blkcnt = DIV_ROUND_UP(sizeof(*hdr), dev_desc->blksz);
+	hdr = memalign(ARCH_DMA_MINALIGN, dev_desc->blksz * blkcnt);
 	if (!hdr) {
 		printf("%s: out of memory!\n", __func__);
 		return -ENOMEM;
 	}
 
-	blkcnt = sizeof(*hdr) / dev_desc->blksz;
 	ret = blk_dread(dev_desc, part_info.start, blkcnt, hdr);
 	if (ret != blkcnt) {
 		printf("Failed to read %s sector, ret=%d\n", part_info.name, ret);

commit 888e59c91d7f6f905c339c1892002d06e056a329
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Thu Aug 29 17:36:17 2019 +0800

    drm/rockchip: hdmi: init vmode picture_aspect_ratio
    
    Change-Id: Id03a1409c5fe0d021c22e888c7d13b191dd1960e
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_dw_hdmi.c b/drivers/video/drm/rockchip_dw_hdmi.c
index 30acb21b29..80f59c7ce4 100644
--- a/drivers/video/drm/rockchip_dw_hdmi.c
+++ b/drivers/video/drm/rockchip_dw_hdmi.c
@@ -358,6 +358,7 @@ static bool drm_mode_equal(const struct base_drm_display_mode *mode1,
 	    mode1->vsync_start == mode2->vsync_start &&
 	    mode1->vsync_end == mode2->vsync_end &&
 	    mode1->vtotal == mode2->vtotal &&
+	    mode1->picture_aspect_ratio == mode2->picture_aspect_ratio &&
 	    (mode1->flags & flags_mask) == (mode2->flags & flags_mask)) {
 		return true;
 	}
@@ -708,6 +709,8 @@ void drm_rk_selete_output(struct hdmi_edid_data *edid_data,
 		if (base_parameter.screen_list[i].type ==
 		    DRM_MODE_CONNECTOR_HDMIA) {
 			screen_info = &base_parameter.screen_list[i];
+			screen_info->mode.picture_aspect_ratio =
+				(screen_info->mode.flags & DRM_MODE_FLAG_PIC_AR_MASK) >> 19;
 			break;
 		}
 	}

commit 94d85f7bddf88b037c1e529d5b15a53c8a7e55b1
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Thu Aug 29 17:38:34 2019 +0800

    drm/rockchip: add picture aspect ratio define
    
    Change-Id: Ie1d8313afe5f24596a989f7c8f290c734815f036
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index ffb0fc8753..eadcd601ac 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -1497,6 +1497,7 @@ void rockchip_display_fixup(void *blob)
 		FDT_SET_U32("video,vrefresh",
 			    drm_mode_vrefresh(&s->conn_state.mode));
 		FDT_SET_U32("video,flags", s->conn_state.mode.flags);
+		FDT_SET_U32("video,aspect_ratio", s->conn_state.mode.picture_aspect_ratio);
 		FDT_SET_U32("overscan,left_margin", s->conn_state.overscan.left_margin);
 		FDT_SET_U32("overscan,right_margin", s->conn_state.overscan.right_margin);
 		FDT_SET_U32("overscan,top_margin", s->conn_state.overscan.top_margin);
diff --git a/include/drm_modes.h b/include/drm_modes.h
index 337f59ee30..2aa5374839 100644
--- a/include/drm_modes.h
+++ b/include/drm_modes.h
@@ -36,13 +36,33 @@
 #define DRM_MODE_FLAG_PIXMUX			(1 << 11)
 #define DRM_MODE_FLAG_DBLCLK			(1 << 12)
 #define DRM_MODE_FLAG_CLKDIV2			(1 << 13)
-#define DRM_MODE_FLAG_PPIXDATA                  BIT(31)
+#define DRM_MODE_FLAG_PPIXDATA			BIT(31)
 
 /* Panel Mirror control */
 #define DRM_MODE_FLAG_XMIRROR			(1<<28)
 #define DRM_MODE_FLAG_YMIRROR			(1<<29)
 #define DRM_MODE_FLAG_XYMIRROR			(DRM_MODE_FLAG_XMIRROR | DRM_MODE_FLAG_YMIRROR)
 
+/* Picture aspect ratio options */
+#define DRM_MODE_PICTURE_ASPECT_NONE		0
+#define DRM_MODE_PICTURE_ASPECT_4_3		1
+#define DRM_MODE_PICTURE_ASPECT_16_9		2
+#define DRM_MODE_PICTURE_ASPECT_64_27		3
+#define DRM_MODE_PICTURE_ASPECT_256_135		4
+
+/* Aspect ratio flag bitmask (4 bits 22:19) */
+#define DRM_MODE_FLAG_PIC_AR_MASK		(0x0F << 19)
+#define  DRM_MODE_FLAG_PIC_AR_NONE \
+			(DRM_MODE_PICTURE_ASPECT_NONE << 19)
+#define  DRM_MODE_FLAG_PIC_AR_4_3 \
+			(DRM_MODE_PICTURE_ASPECT_4_3 << 19)
+#define  DRM_MODE_FLAG_PIC_AR_16_9 \
+			(DRM_MODE_PICTURE_ASPECT_16_9 << 19)
+#define  DRM_MODE_FLAG_PIC_AR_64_27 \
+			(DRM_MODE_PICTURE_ASPECT_64_27 << 19)
+#define  DRM_MODE_FLAG_PIC_AR_256_135 \
+			(DRM_MODE_PICTURE_ASPECT_256_135 << 19)
+
 #define DRM_MODE_CONNECTOR_Unknown	0
 #define DRM_MODE_CONNECTOR_VGA		1
 #define DRM_MODE_CONNECTOR_DVII		2

commit 7733bf1789534a270ed6ce42b17ac6d6842eeaa5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 22 12:18:37 2019 +0800

    configs: rk3066: update malloc size to 32MB
    
    Since AVB use sysmem alloc, we can decrease malloc size.
    
    Change-Id: I1c81f13946b3f8e74b2400f9d12be882e4387b38
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3066_common.h b/include/configs/rk3066_common.h
index 94d2ebb7e1..7dff0ecf56 100644
--- a/include/configs/rk3066_common.h
+++ b/include/configs/rk3066_common.h
@@ -13,7 +13,7 @@
 #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
 #define CONFIG_SYS_MAXARGS		16
 #define CONFIG_BAUDRATE			115200
-#define CONFIG_SYS_MALLOC_LEN		(64 << 20)
+#define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		256
 
 #define CONFIG_SYS_SDRAM_BASE		0x60000000

commit 90ba3aa2da8d12969a119516ba53bfa48b2cca5e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 22 12:18:14 2019 +0800

    configs: rk322x: update malloc size to 32MB
    
    Since AVB use sysmem alloc, we can decrease malloc size.
    
    Change-Id: Ie863ed0627dd8604c8dbc8b59ed8f4197c68bc93
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h
index d9935dd6c8..6c1e3e77db 100644
--- a/include/configs/rk322x_common.h
+++ b/include/configs/rk322x_common.h
@@ -10,7 +10,7 @@
 #include "rockchip-common.h"
 
 #define CONFIG_SKIP_LOWLEVEL_INIT
-#define CONFIG_SYS_MALLOC_LEN		(128 << 20)
+#define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		2048
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/*  64M */
 

commit 19821319415f9dcf371ec9b33ce816d5a98d9a0e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 22 12:17:39 2019 +0800

    configs: rk3288: update malloc size to 32MB
    
    Since AVB use sysmem alloc, we can decrease malloc size.
    
    Change-Id: Ic5a2df1fbfec0e6d94f9904042db8961aa0abf4d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index befcfc106f..210a436fb7 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -16,7 +16,7 @@
 #endif
 
 #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
-#define CONFIG_SYS_MALLOC_LEN		(192 << 20)
+#define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 
 #define CONFIG_SPL_FRAMEWORK

commit 56a40692c33f2e48301347bec651b7ff5679b4d4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 22 12:17:22 2019 +0800

    configs: rk3328: update malloc size to 32MB
    
    Since AVB use sysmem alloc, we can decrease malloc size.
    
    Change-Id: If806c7736ada2852931f8e06d137658d8cf3c0db
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index f842a63ace..6be9ad7d8b 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -9,7 +9,7 @@
 
 #include "rockchip-common.h"
 
-#define CONFIG_SYS_MALLOC_LEN		(128 << 20)
+#define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
 

commit 975da02e880870378163217fd3d03e2f58719ab2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 22 12:17:08 2019 +0800

    configs: rk3368: update malloc size to 32MB
    
    Since AVB use sysmem alloc, we can decrease malloc size.
    
    Change-Id: If88b142a81f5cd28f333b9dc901e70619b9ce12b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h
index 5ef4a3b9f2..0ce974b8e4 100644
--- a/include/configs/rk3368_common.h
+++ b/include/configs/rk3368_common.h
@@ -17,7 +17,7 @@
 #define CONFIG_SYS_SDRAM_BASE		0
 #define SDRAM_MAX_SIZE			0xfe000000
 #define CONFIG_BAUDRATE			115200
-#define CONFIG_SYS_MALLOC_LEN		(192 << 20)
+#define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
 

commit 99ae8364646762ad1a8dd17187378847f70959d1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 22 12:16:05 2019 +0800

    configs: rk3399: update malloc size to 32MB
    
    Since AVB use sysmem alloc, we can decrease malloc size.
    
    Change-Id: I627ceab0440a1655524904a8c4b11905bcdc830d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index 36820bce41..0328275f48 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -9,7 +9,7 @@
 
 #include "rockchip-common.h"
 
-#define CONFIG_SYS_MALLOC_LEN		(192 << 20)
+#define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
 #define CONFIG_SPL_FRAMEWORK

commit 0cb72e53ea2cf3e3461d7b9fcd8726b862189317
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jul 18 11:02:54 2019 +0800

    common: android: add image hash verify support
    
    - mkbootimg tool always use SHA1 for images;
    - make the the crypto higher priority;
    - AVB images does not need this verify;
    
    Change-Id: I543a3a53da61b920b83ba464a71959518437c436
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/Kconfig b/common/Kconfig
index cb0434ea4e..093a442e93 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -650,6 +650,21 @@ config ANDROID_BOOT_IMAGE_SEPARATE
 	  we can load ramdisk/fdt/kernel separate and skip ramdisk and fdt relocation
 	  safely. It saves a lot of boot time.
 
+config ANDROID_BOOT_IMAGE_HASH
+	bool "Enable support for Android image hash verify"
+	depends on ANDROID_BOOT_IMAGE
+	select SHA1
+	help
+	  This enables support for Android image hash verify, the mkbootimg always use
+	  SHA1 for images.
+
+config HASH_ROCKCHIP_LEGACY
+	bool "Image hash with Rockchip legacy mkbootimg tool pack"
+	depends on ANDROID_BOOT_IMAGE_HASH
+	help
+	  This option enables adding more android hdr variants into image hash
+	  calculation in legacy rockchip mkbootimg tool.
+
 config SKIP_RELOCATE_UBOOT
 	bool "Skip U-Boot relocation"
 	help
diff --git a/common/image-android.c b/common/image-android.c
index dddb68d3ce..ec14ecf95f 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -12,7 +12,9 @@
 #include <mapmem.h>
 #include <errno.h>
 #include <boot_rkimg.h>
+#include <crypto.h>
 #include <sysmem.h>
+#include <u-boot/sha1.h>
 #ifdef CONFIG_RKIMG_BOOTLOADER
 #include <asm/arch/resource_img.h>
 #endif
@@ -257,18 +259,129 @@ int android_image_get_fdt(const struct andr_img_hdr *hdr,
 	return 0;
 }
 
+#ifdef CONFIG_ANDROID_BOOT_IMAGE_HASH
+static void print_hash(const char *label, u8 *hash, int len)
+{
+	int i;
+
+	printf("%s:\n    0x", label ? : "Hash");
+	for (i = 0; i < len; i++)
+		printf("%02x", hash[i]);
+	printf("\n");
+}
+
+/*
+ * This is only for Non-AVB image, because AVB image is verified by AVB bootflow.
+ * The kernel/ramdisk/second address should be the real address in hdr before
+ * calling this function.
+ *
+ * mkbootimg tool always use SHA1 for images.
+ */
+static int android_image_hash_verify(struct andr_img_hdr *hdr)
+{
+	u8 hash[20];
+
+#ifdef DEBUG
+	android_print_contents(hdr);
+#endif
+
+	if (hdr->kernel_addr == ANDROID_IMAGE_DEFAULT_KERNEL_ADDR) {
+		printf("No real image address in android hdr\n");
+		return -EINVAL;
+	}
+
+#ifdef CONFIG_DM_CRYPTO
+	struct udevice *dev;
+	sha_context ctx;
+
+	dev = crypto_get_device(CRYPTO_SHA1);
+	if (!dev) {
+		printf("Can't find crypto device for SHA1 capability\n");
+		return -ENODEV;
+	}
+
+	ctx.algo = CRYPTO_SHA1;
+	ctx.length = hdr->kernel_size + sizeof(hdr->kernel_size) +
+		     hdr->ramdisk_size + sizeof(hdr->ramdisk_size) +
+		     hdr->second_size + sizeof(hdr->second_size);
+#ifdef CONFIG_HASH_ROCKCHIP_LEGACY
+	ctx.length += sizeof(hdr->tags_addr) + sizeof(hdr->page_size) +
+		      sizeof(hdr->unused) + sizeof(hdr->name) +
+		      sizeof(hdr->cmdline);
+#endif
+
+	crypto_sha_init(dev, &ctx);
+
+	crypto_sha_update(dev, (u32 *)(ulong)hdr->kernel_addr,
+			  hdr->kernel_size);
+	crypto_sha_update(dev, (u32 *)&hdr->kernel_size,
+			  sizeof(hdr->kernel_size));
+	crypto_sha_update(dev, (u32 *)(ulong)hdr->ramdisk_addr,
+			  hdr->ramdisk_size);
+	crypto_sha_update(dev, (u32 *)&hdr->ramdisk_size,
+			  sizeof(hdr->ramdisk_size));
+	crypto_sha_update(dev, (u32 *)(ulong)hdr->second_addr,
+			  hdr->second_size);
+	crypto_sha_update(dev, (u32 *)&hdr->second_size,
+			  sizeof(hdr->second_size));
+#ifdef CONFIG_HASH_ROCKCHIP_LEGACY
+	crypto_sha_update(dev, (u32 *)&hdr->tags_addr, sizeof(hdr->tags_addr));
+	crypto_sha_update(dev, (u32 *)&hdr->page_size, sizeof(hdr->page_size));
+	crypto_sha_update(dev, (u32 *)&hdr->header_version,
+			  sizeof(hdr->header_version));
+	crypto_sha_update(dev, (u32 *)&hdr->os_version, sizeof(hdr->os_version));
+	crypto_sha_update(dev, (u32 *)&hdr->name, sizeof(hdr->name));
+	crypto_sha_update(dev, (u32 *)&hdr->cmdline, sizeof(hdr->cmdline));
+#endif
+
+	crypto_sha_final(dev, &ctx, hash);
+
+#elif CONFIG_SHA1
+	sha1_context ctx;
+
+	sha1_starts(&ctx);
+	sha1_update(&ctx, (u8 *)(ulong)hdr->kernel_addr, hdr->kernel_size);
+	sha1_update(&ctx, (u8 *)&hdr->kernel_size, sizeof(hdr->kernel_size));
+	sha1_update(&ctx, (u8 *)(ulong)hdr->ramdisk_addr, hdr->ramdisk_size);
+	sha1_update(&ctx, (u8 *)&hdr->ramdisk_size, sizeof(hdr->ramdisk_size));
+	sha1_update(&ctx, (u8 *)(ulong)hdr->second_addr, hdr->second_size);
+	sha1_update(&ctx, (u8 *)&hdr->second_size, sizeof(hdr->second_size));
+#ifdef CONFIG_HASH_ROCKCHIP_LEGACY
+	sha1_update(&ctx, (u8 *)&hdr->tags_addr, sizeof(hdr->tags_addr));
+	sha1_update(&ctx, (u8 *)&hdr->page_size, sizeof(hdr->page_size));
+	sha1_update(&ctx, (u8 *)&hdr->header_version,
+		    sizeof(hdr->header_version));
+	sha1_update(&ctx, (u8 *)&hdr->os_version, sizeof(hdr->os_version));
+	sha1_update(&ctx, (u8 *)&hdr->name, sizeof(hdr->name));
+	sha1_update(&ctx, (u8 *)&hdr->cmdline, sizeof(hdr->cmdline));
+#endif
+
+	sha1_finish(&ctx, hash);
+#endif	/* CONFIG_SHA1 */
+
+	if (memcmp(hash, hdr->id, 20)) {
+		print_hash("SHA1 from image header", (u8 *)hdr->id, 20);
+		print_hash("SHA1 real", (u8 *)hash, 20);
+		return -EBADFD;
+	}
+
+	return 0;
+}
+#endif
+
 #ifdef CONFIG_ANDROID_BOOT_IMAGE_SEPARATE
 int android_image_load_separate(struct andr_img_hdr *hdr,
 				const disk_partition_t *part,
 				void *load_address, void *ram_src)
 {
 	struct blk_desc *dev_desc = rockchip_get_bootdev();
-	ulong fdt_addr_r = env_get_ulong("fdt_addr_r", 16, 0);
+	ulong ramdisk_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0);
+	ulong kernel_addr_r = env_get_ulong("kernel_addr_r", 16, 0);
 	char *fdt_high = env_get("fdt_high");
 	char *ramdisk_high = env_get("initrd_high");
 	ulong blk_start, blk_cnt, size;
+	ulong start, second_addr_r = 0;
 	int ret, blk_read = 0;
-	ulong start;
 
 	if (android_image_check_header(hdr)) {
 		printf("Bad android image header\n");
@@ -300,8 +413,6 @@ int android_image_load_separate(struct andr_img_hdr *hdr,
 	}
 
 	if (hdr->ramdisk_size) {
-		ulong ramdisk_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0);
-
 		size = hdr->page_size + ALIGN(hdr->kernel_size, hdr->page_size);
 		blk_cnt = DIV_ROUND_UP(hdr->ramdisk_size, dev_desc->blksz);
 		if (!sysmem_alloc_base(MEMBLK_ID_RAMDISK,
@@ -328,9 +439,14 @@ int android_image_load_separate(struct andr_img_hdr *hdr,
 		}
 	}
 
-	if ((gd->fdt_blob != (void *)fdt_addr_r) && hdr->second_size) {
+	/*
+	 * Load dtb file by rockchip_read_dtb_file() which support pack
+	 * dtb in second position or resource file.
+	 */
 #ifdef CONFIG_RKIMG_BOOTLOADER
-		/* Rockchip AOSP, resource.img is in second position */
+	ulong fdt_addr_r = env_get_ulong("fdt_addr_r", 16, 0);
+
+	if (hdr->second_size && (gd->fdt_blob != (void *)fdt_addr_r)) {
 		ulong fdt_size;
 
 		fdt_size = rockchip_read_dtb_file((void *)fdt_addr_r);
@@ -340,43 +456,55 @@ int android_image_load_separate(struct andr_img_hdr *hdr,
 		}
 
 		blk_read += DIV_ROUND_UP(fdt_size, dev_desc->blksz);
-#else
-		/* Standard AOSP, dtb is in second position */
+	}
+#endif
+
+#ifdef CONFIG_ANDROID_BOOT_IMAGE_HASH
+	if (hdr->second_size) {
 		ulong blk_start, blk_cnt;
 
+		/* Just for image data hash calculation */
+		second_addr_r = (ulong)malloc(hdr->second_size);
+		if (!second_addr_r)
+			return -ENOMEM;
+
 		size = hdr->page_size +
 		       ALIGN(hdr->kernel_size, hdr->page_size) +
 		       ALIGN(hdr->ramdisk_size, hdr->page_size);
 		blk_cnt = DIV_ROUND_UP(hdr->second_size, dev_desc->blksz);
-		if (!sysmem_alloc_base(MEMBLK_ID_FDT_AOSP,
-				       fdt_addr_r,
-				       blk_cnt * dev_desc->blksz +
-				       CONFIG_SYS_FDT_PAD))
-			return -ENXIO;
 
 		if (ram_src) {
 			start = (unsigned long)ram_src;
 			start += hdr->page_size;
 			start += ALIGN(hdr->kernel_size, hdr->page_size);
 			start += ALIGN(hdr->ramdisk_size, hdr->page_size);
-			memcpy((char *)fdt_addr_r,
+			memcpy((char *)second_addr_r,
 			       (char *)start, hdr->second_size);
 		} else {
 			blk_start = part->start +
 					DIV_ROUND_UP(size, dev_desc->blksz);
 			ret = blk_dread(dev_desc, blk_start, blk_cnt,
-					(void *)fdt_addr_r);
+					(void *)second_addr_r);
 			if (ret != blk_cnt) {
-				printf("%s: read dtb failed, ret=%d\n",
-				      __func__, ret);
+				printf("%s: read second pos failed, ret=%d\n",
+				       __func__, ret);
 				return -1;
 			}
 
 			blk_read += blk_cnt;
 		}
-#endif /* CONFIG_RKIMG_BOOTLOADER */
 	}
+#endif
 
+	/* Update hdr with real image address */
+	hdr->kernel_addr = kernel_addr_r;
+	hdr->second_addr = second_addr_r;
+	hdr->ramdisk_addr = ramdisk_addr_r;
+
+	/*
+	 * Since images are loaded separate, fdt/ramdisk relocation
+	 * can be disabled, it saves boot time.
+	 */
 	if (blk_read > 0 || ram_src) {
 		if (!fdt_high) {
 			env_set_hex("fdt_high", -1UL);
@@ -496,6 +624,15 @@ long android_image_load(struct blk_desc *dev_desc,
 #endif
 		}
 
+		/* Verify image hash */
+#ifdef CONFIG_ANDROID_BOOT_IMAGE_HASH
+		if (android_image_hash_verify(hdr)) {
+			printf("Image hash miss match!\n");
+			return -EBADFD;
+		}
+
+		printf("Image hash verify ok\n");
+#endif
 		/*
 		 * zImage is not need to decompress
 		 * kernel will handle decompress itself

commit 98c1299759c99eb4a5d70894aa4be1a3f32edf7d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jul 18 10:18:48 2019 +0800

    common: android: add android_image_memcpy_separate() interface
    
    This is a encapsulation of android_image_load_separate(). It is used
    for AVB boot/recovery.img which has been loaded to ram by AVB bootflow,
    and we memcpy kernel/ramdisk/dtb to where we expect.
    
    Change-Id: Iea4ea3404b84e9d3c091954ab27fb8c9d2ad84bc
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 0cca5b04a0..df844ca2e4 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -663,8 +663,7 @@ static AvbSlotVerifyResult android_slot_verify(char *boot_partname,
 		*android_load_address = load_address;
 
 #ifdef CONFIG_ANDROID_BOOT_IMAGE_SEPARATE
-		android_image_load_separate(hdr, NULL,
-					    (void *)load_address, hdr);
+		android_image_memcpy_separate(hdr, (void *)load_address);
 #else
 		memcpy((uint8_t *)load_address,
 		       slot_data[0]->loaded_partitions->data,
diff --git a/common/image-android.c b/common/image-android.c
index a00e9f6988..dddb68d3ce 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -392,6 +392,11 @@ int android_image_load_separate(struct andr_img_hdr *hdr,
 
 	return blk_read;
 }
+
+int android_image_memcpy_separate(struct andr_img_hdr *hdr, void *load_address)
+{
+	return android_image_load_separate(hdr, NULL, load_address, hdr);
+}
 #endif /* CONFIG_ANDROID_BOOT_IMAGE_SEPARATE */
 
 long android_image_load(struct blk_desc *dev_desc,
diff --git a/include/image.h b/include/image.h
index 975cc572e3..0afb2ae2cc 100644
--- a/include/image.h
+++ b/include/image.h
@@ -1274,9 +1274,9 @@ ulong android_image_get_end(const struct andr_img_hdr *hdr);
 ulong android_image_get_kload(const struct andr_img_hdr *hdr);
 void android_print_contents(const struct andr_img_hdr *hdr);
 
-/** android_image_load_separate - Load an Android Image separate from storage or ram
+/** android_image_load_separate - Load an Android Image separate from storage
  *
- * Load an Android Image based on the header size in the storage or ram.
+ * Load an Android Image based on the header size in the storage.
  *
  * @hdr:		The android image header
  * @part:		The partition where to read the image from
@@ -1288,6 +1288,16 @@ int android_image_load_separate(struct andr_img_hdr *hdr,
 				const disk_partition_t *part,
 				void *load_address, void *ram_src);
 
+/** android_image_load_separate - Memcpy an Android Image separate from ram
+ *
+ * Memcpy an Android Image based on the header size in the ram.
+ *
+ * @hdr:		The android image header and memcpy base address
+ * @load_address:	The address where the image will be loaded
+ * @return the blk count.
+ */
+int android_image_memcpy_separate(struct andr_img_hdr *hdr, void *load_address);
+
 /** android_image_load - Load an Android Image from storage.
  *
  * Load an Android Image based on the header size in the storage.

commit e6bda4b2edf3bd7df180f0c63f0e71379502051d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jul 18 20:57:59 2019 +0800

    rockchip: resource: support parse dtb from second position
    
    If the seconds position is not a resource file, maybe it's a
    dtb file.
    
    Change-Id: I819cb0ff9c702c306000bf30fb47891009e4ff32
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index d5c56ebb37..4b3b57b92f 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -115,8 +115,8 @@ static int resource_image_check_header(const struct resource_img_hdr *hdr)
 
 	ret = memcmp(RESOURCE_MAGIC, hdr->magic, RESOURCE_MAGIC_SIZE);
 	if (ret) {
-		printf("bad resource image magic: %s\n",
-		       hdr->magic ? hdr->magic : "none");
+		debug("bad resource image magic: %s\n",
+		      hdr->magic ? hdr->magic : "none");
 		ret = -EINVAL;
 	}
 
@@ -173,7 +173,7 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 	char *boot_partname = PART_BOOT;
 	disk_partition_t part_info;
 	int resource_found = 0;
-	void *content;
+	void *content = NULL;
 	int offset = 0;
 	int e_num;
 	int size;
@@ -296,7 +296,7 @@ parse_resource_part:
 	ret = resource_image_check_header(hdr);
 	if (ret < 0) {
 		ret = -EINVAL;
-		goto out;
+		goto parse_second_pos_dtb;
 	}
 
 	content = memalign(ARCH_DMA_MINALIGN,
@@ -329,6 +329,32 @@ parse_resource_part:
 	ret = 0;
 	printf("Load FDT from %s part\n", boot_partname);
 
+parse_second_pos_dtb:
+#ifdef CONFIG_ANDROID_BOOT_IMAGE
+	/*
+	 * If not find resource file on above, we try to get dtb file from
+	 * android second position.
+	 */
+	if (!content && !fdt_check_header((void *)hdr)) {
+		entry = malloc(sizeof(*entry));
+		if (!entry) {
+			ret = -ENOMEM;
+			goto parse_logo;
+		}
+
+		memcpy(entry->tag, ENTRY_TAG, sizeof(ENTRY_TAG));
+		memcpy(entry->name, DTB_FILE, sizeof(DTB_FILE));
+		entry->f_size = fdt_totalsize((void *)hdr);
+		entry->f_offset = 0;
+
+		add_file_to_list(entry, part_info.start);
+		free(entry);
+		ret = 0;
+		printf("Load FDT from %s part(second pos)\n", boot_partname);
+	}
+
+parse_logo:
+#endif
 	/*
 	 * Add logo.bmp from "logo" parititon
 	 *
@@ -388,7 +414,8 @@ err2:
 	}
 
 err:
-	free(content);
+	if (content)
+		free(content);
 out:
 	free(hdr);
 

commit 0905295234096485f0605b8c154224e914c41c0a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jul 18 09:13:39 2019 +0800

    rockchip: resource: clean up code
    
    Change-Id: If133cba598752ce1a1eeed1e6432e7dffa2c5112
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index bf413312f2..d5c56ebb37 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -5,24 +5,20 @@
  */
 #include <common.h>
 #include <adc.h>
+#include <android_bootloader.h>
+#include <android_image.h>
+#include <boot_rkimg.h>
 #include <bmp_layout.h>
-#include <asm/io.h>
 #include <fs.h>
 #include <malloc.h>
 #include <sysmem.h>
+#include <asm/io.h>
 #include <asm/unaligned.h>
-#include <linux/list.h>
-#include <asm/arch/resource_img.h>
-#include <boot_rkimg.h>
-#include <dm/ofnode.h>
-#ifdef CONFIG_ANDROID_AB
 #include <android_avb/libavb_ab.h>
 #include <android_avb/rk_avb_ops_user.h>
-#endif
-#ifdef CONFIG_ANDROID_BOOT_IMAGE
-#include <android_bootloader.h>
-#include <android_image.h>
-#endif
+#include <dm/ofnode.h>
+#include <linux/list.h>
+#include <asm/arch/resource_img.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -35,6 +31,8 @@ DECLARE_GLOBAL_DATA_PTR;
 #define ENTRY_TAG_SIZE			4
 #define MAX_FILE_NAME_LEN		256
 
+#define DTB_FILE			"rk-kernel.dtb"
+
 /*
  *         resource image structure
  * ----------------------------------------------
@@ -106,7 +104,7 @@ struct resource_file {
 	uint32_t	f_offset;
 	uint32_t	f_size;
 	struct list_head link;
-	uint32_t 	rsce_base;	/* Base addr of resource */
+	uint32_t	rsce_base;	/* Base addr of resource */
 };
 
 static LIST_HEAD(entrys_head);
@@ -121,6 +119,7 @@ static int resource_image_check_header(const struct resource_img_hdr *hdr)
 		       hdr->magic ? hdr->magic : "none");
 		ret = -EINVAL;
 	}
+
 	debug("resource image header:\n");
 	debug("magic:%s\n", hdr->magic);
 	debug("version:%d\n", hdr->version);
@@ -141,78 +140,80 @@ static int add_file_to_list(struct resource_entry *entry, int rsce_base)
 		printf("invalid entry tag\n");
 		return -ENOENT;
 	}
+
 	file = malloc(sizeof(*file));
 	if (!file) {
 		printf("out of memory\n");
 		return -ENOMEM;
 	}
+
 	strcpy(file->name, entry->name);
 	file->rsce_base = rsce_base;
 	file->f_offset = entry->f_offset;
 	file->f_size = entry->f_size;
 	list_add_tail(&file->link, &entrys_head);
+
 	debug("entry:%p  %s offset:%d size:%d\n",
 	      entry, file->name, file->f_offset, file->f_size);
 
 	return 0;
 }
 
+/*
+ * 1. Get resource file from part: boot/recovery(AOSP) > resource(RK)
+ * 2. Add all file into resource file list and load them from storage
+ *    when we really need it.
+ * 3. Parse logo partition and add logo file int resource file list;
+ */
 static int init_resource_list(struct resource_img_hdr *hdr)
 {
 	struct resource_entry *entry;
-	void *content;
-	int size;
-	int ret;
-	int e_num;
-	int offset = 0;
-	int resource_found = 0;
 	struct blk_desc *dev_desc;
 	struct bmp_header *header;
-	disk_partition_t part_info;
 	char *boot_partname = PART_BOOT;
+	disk_partition_t part_info;
+	int resource_found = 0;
+	void *content;
+	int offset = 0;
+	int e_num;
+	int size;
+	int ret;
 
-/*
- * Primary detect AOSP format image, try to get resource image from
- * boot/recovery partition. If not, it's an RK format image and try
- * to get from resource partition.
- */
-#ifdef CONFIG_ANDROID_BOOT_IMAGE
-	struct andr_img_hdr *andr_hdr;
-#endif
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -ENODEV;
+	}
 
+	/* If hdr is valid from outside, use it */
 	if (hdr) {
 		if (resource_image_check_header(hdr))
 			return -EEXIST;
 
-		content = (void *)((char *)hdr
-				   + (hdr->c_offset) * RK_BLK_SIZE);
+		content = (void *)((char *)hdr +
+				(hdr->c_offset) * dev_desc->blksz);
 		for (e_num = 0; e_num < hdr->e_nums; e_num++) {
-			size = e_num * hdr->e_blks * RK_BLK_SIZE;
+			size = e_num * hdr->e_blks * dev_desc->blksz;
 			entry = (struct resource_entry *)(content + size);
 			add_file_to_list(entry, offset);
 		}
 		return 0;
 	}
 
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: dev_desc is NULL!\n", __func__);
-		return -ENODEV;
-	}
-	hdr = memalign(ARCH_DMA_MINALIGN, RK_BLK_SIZE);
-	if (!hdr) {
-		printf("%s: out of memory!\n", __func__);
+	hdr = memalign(ARCH_DMA_MINALIGN, dev_desc->blksz);
+	if (!hdr)
 		return -ENOMEM;
-	}
 
 #ifdef CONFIG_ANDROID_BOOT_IMAGE
+	struct andr_img_hdr *andr_hdr;
+
 	/* Get boot mode from misc */
 #ifndef CONFIG_ANDROID_AB
 	if (rockchip_get_boot_mode() == BOOT_MODE_RECOVERY)
 		boot_partname = PART_RECOVERY;
 #endif
 
-	/* Read boot/recovery and chenc if this is an AOSP img */
+	/* Get slot suffix and append it for A/B system */
 #ifdef CONFIG_ANDROID_AB
 	char slot_suffix[3] = {0};
 
@@ -231,14 +232,10 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 	if (ret < 0) {
 		printf("%s: failed to get %s part, ret=%d\n",
 		       __func__, boot_partname, ret);
-		/* RKIMG can support part table without 'boot' */
-		goto next;
+		goto parse_resource_part;
 	}
 
-	/*
-	 * Only read header and check magic, is a AOSP format image?
-	 * If so, get resource image from second part.
-	 */
+	/* Try to find resource from android second position */
 	andr_hdr = (void *)hdr;
 	ret = blk_dread(dev_desc, part_info.start, 1, andr_hdr);
 	if (ret != 1) {
@@ -247,6 +244,7 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 		ret = -EIO;
 		goto out;
 	}
+
 	ret = android_image_check_header(andr_hdr);
 	if (!ret) {
 		u32 os_ver = andr_hdr->os_version >> 11;
@@ -259,24 +257,21 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 
 		debug("%s: Load resource from %s second pos\n",
 		      __func__, part_info.name);
-		/* Read resource from second offset */
-		offset = part_info.start * RK_BLK_SIZE;
+
+		offset = part_info.start * dev_desc->blksz;
 		offset += andr_hdr->page_size;
 		offset += ALIGN(andr_hdr->kernel_size, andr_hdr->page_size);
 		offset += ALIGN(andr_hdr->ramdisk_size, andr_hdr->page_size);
-		offset = offset / RK_BLK_SIZE;
-
+		offset = offset / dev_desc->blksz;
 		resource_found = 1;
 	}
-next:
-#endif
-	/*
-	 * If not found resource image in AOSP format images(boot/recovery part),
-	 * try to read RK format images(resource part).
-	 */
+parse_resource_part:
+#endif  /* CONFIG_ANDROID_BOOT_IMAGE*/
+
+	/* If not find android image, get resource file from resource part */
 	if (!resource_found) {
 		debug("%s: Load resource from resource part\n", __func__);
-		/* Read resource from Rockchip Resource partition */
+
 		boot_partname = PART_RESOURCE;
 		ret = part_get_info_by_name(dev_desc, boot_partname, &part_info);
 		if (ret < 0) {
@@ -287,7 +282,9 @@ next:
 		offset = part_info.start;
 	}
 
-	/* Only read header and check magic */
+	/*
+	 * Now, the "offset" points to the resource file sector.
+	 */
 	ret = blk_dread(dev_desc, offset, 1, hdr);
 	if (ret != 1) {
 		printf("%s: failed to read resource hdr, ret=%d\n",
@@ -303,14 +300,13 @@ next:
 	}
 
 	content = memalign(ARCH_DMA_MINALIGN,
-			   hdr->e_blks * hdr->e_nums * RK_BLK_SIZE);
+			   hdr->e_blks * hdr->e_nums * dev_desc->blksz);
 	if (!content) {
 		printf("%s: failed to alloc memory for content\n", __func__);
 		ret = -ENOMEM;
 		goto out;
 	}
 
-	/* Read all entries from resource image */
 	ret = blk_dread(dev_desc, offset + hdr->c_offset,
 			hdr->e_blks * hdr->e_nums, content);
 	if (ret != (hdr->e_blks * hdr->e_nums)) {
@@ -320,8 +316,12 @@ next:
 		goto err;
 	}
 
+	/*
+	 * Add all file into resource file list, and load what we want from
+	 * storage when we really need it.
+	 */
 	for (e_num = 0; e_num < hdr->e_nums; e_num++) {
-		size = e_num * hdr->e_blks * RK_BLK_SIZE;
+		size = e_num * hdr->e_blks * dev_desc->blksz;
 		entry = (struct resource_entry *)(content + size);
 		add_file_to_list(entry, offset);
 	}
@@ -339,7 +339,7 @@ next:
 		struct resource_file *file;
 		struct list_head *node;
 
-		header = memalign(ARCH_DMA_MINALIGN, RK_BLK_SIZE);
+		header = memalign(ARCH_DMA_MINALIGN, dev_desc->blksz);
 		if (!header) {
 			ret = -ENOMEM;
 			goto err;
@@ -381,8 +381,8 @@ next:
 
 		add_file_to_list(entry, part_info.start);
 		free(entry);
-		printf("Load \"logo.bmp\" from logo part\n");
 		ret = 0;
+		printf("Load logo.bmp from logo part\n");
 err2:
 		free(header);
 	}
@@ -448,9 +448,15 @@ int rockchip_read_resource_file(void *buf, const char *name,
 				int offset, int len)
 {
 	struct resource_file *file;
+	struct blk_desc *dev_desc;
 	int ret = 0;
 	int blks;
-	struct blk_desc *dev_desc;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -ENODEV;
+	}
 
 	file = get_file_info(NULL, name);
 	if (!file) {
@@ -460,12 +466,8 @@ int rockchip_read_resource_file(void *buf, const char *name,
 
 	if (len <= 0 || len > file->f_size)
 		len = file->f_size;
-	blks = DIV_ROUND_UP(len, RK_BLK_SIZE);
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: dev_desc is NULL!\n", __func__);
-		return -ENODEV;
-	}
+
+	blks = DIV_ROUND_UP(len, dev_desc->blksz);
 	ret = blk_dread(dev_desc, file->rsce_base + file->f_offset + offset,
 			blks, buf);
 	if (ret != blks)
@@ -480,7 +482,6 @@ int rockchip_read_resource_file(void *buf, const char *name,
 #define is_abcd(c)		((c) >= 'a' && (c) <= 'd')
 #define is_equal(c)		((c) == '=')
 
-#define DTB_FILE		"rk-kernel.dtb"
 #define KEY_WORDS_ADC_CTRL	"#_"
 #define KEY_WORDS_ADC_CH	"_ch"
 #define KEY_WORDS_GPIO		"#gpio"
@@ -511,11 +512,11 @@ static int rockchip_read_dtb_by_adc(const char *file_name)
 	int offset_ctrl = strlen(KEY_WORDS_ADC_CTRL);
 	int offset_ch = strlen(KEY_WORDS_ADC_CH);
 	int ret, channel, len = 0, found = 0, margin = 30;
-	uint32_t raw_adc;
-	unsigned long dtb_adc;
 	char *stradc, *strch, *p;
 	char adc_v_string[10];
 	char dev_name[32];
+	uint32_t raw_adc;
+	ulong dtb_adc;
 
 	debug("%s: %s\n", __func__, file_name);
 
@@ -587,12 +588,12 @@ static int rockchip_read_dtb_by_adc(const char *file_name)
 
 static int gpio_parse_base_address(fdt_addr_t *gpio_base_addr)
 {
-	static int initial;
+	static int initialized;
 	ofnode parent, node;
 	const char *name;
 	int idx, nr = 0;
 
-	if (initial)
+	if (initialized)
 		return 0;
 
 	parent = ofnode_path("/pinctrl");
@@ -624,7 +625,7 @@ static int gpio_parse_base_address(fdt_addr_t *gpio_base_addr)
 		return -EINVAL;
 	}
 
-	initial = 1;
+	initialized = 1;
 
 	return 0;
 }
@@ -773,8 +774,8 @@ int rockchip_read_dtb_file(void *fdt_addr)
 
 	if (list_empty(&entrys_head)) {
 		if (init_resource_list(NULL)) {
+			/* Load dtb from distro boot.img */
 #ifdef CONFIG_ROCKCHIP_EARLY_DISTRO_DTB
-			/* Maybe a distro boot.img with dtb ? */
 			printf("Distro DTB: %s\n",
 			       CONFIG_ROCKCHIP_EARLY_DISTRO_DTB_PATH);
 			size = rockchip_read_distro_dtb_file(fdt_addr);
@@ -789,6 +790,7 @@ int rockchip_read_dtb_file(void *fdt_addr)
 		}
 	}
 
+	/* Find dtb file according to hardware id(GPIO/ADC) */
 	list_for_each(node, &entrys_head) {
 		file = list_entry(node, struct resource_file, link);
 		if (!strstr(file->name, ".dtb"))
@@ -820,6 +822,7 @@ int rockchip_read_dtb_file(void *fdt_addr)
 	if (size < 0)
 		return size;
 
+	/* Apply DTBO */
 #if defined(CONFIG_CMD_DTIMG) && defined(CONFIG_OF_LIBFDT_OVERLAY)
 	android_fdt_overlay_apply((void *)fdt_addr);
 #endif

commit 7c3af696fdc8a9e76c24d7591b685304928375ae
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Aug 26 20:20:40 2019 +0800

    rockchip: evb-rk3128: defconfig:set MALLOC_LEN_F to 0x1000
    
    Or else system hang with:
    "Calloc ddr memory failed"
    
    Change-Id: I9e01b81a5ea6940a6bf05a58bbcbea38504ba195
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3128_defconfig b/configs/evb-rk3128_defconfig
index 207342260e..d00294df78 100644
--- a/configs/evb-rk3128_defconfig
+++ b/configs/evb-rk3128_defconfig
@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0x1000
 CONFIG_ROCKCHIP_RK3128=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3128-evb"
 CONFIG_DEBUG_UART=y

commit 7b6e8805580088d84328a8c0a9b8f1371a4168b2
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Aug 26 20:19:26 2019 +0800

    rockchip: evb-rk3128: add pmic node
    
    Add pmic node so that the fireprime can enable the current limit at
    board_early_init().
    
    Change-Id: I64b308b47b437feb19acd8521f37687a4463186c
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3128-evb.dts b/arch/arm/dts/rk3128-evb.dts
index e896b29f33..89973553c2 100644
--- a/arch/arm/dts/rk3128-evb.dts
+++ b/arch/arm/dts/rk3128-evb.dts
@@ -13,6 +13,15 @@
 	model = "Rockchip RK3128 Evaluation board";
 	compatible = "rockchip,rk3128-evb", "rockchip,rk3128";
 
+	vcc_sys: vcc-sys {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_sys";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+	};
+
 	vcc5v0_otg: vcc5v0-otg-drv {
 		compatible = "regulator-fixed";
 		regulator-name = "vcc5v0_otg";
@@ -81,7 +90,231 @@
 	status = "okay";
 };
 
+&i2c0 {
+	status = "okay";
+	clock-frequency = <400000>;
+
+	rk818: pmic@1c {
+		compatible = "rockchip,rk818";
+		status = "okay";
+		reg = <0x1c>;
+		clock-output-names = "rk818-clkout1", "wifibt_32kin";
+		interrupt-parent = <&gpio3>;
+		interrupts = <22 IRQ_TYPE_LEVEL_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pmic_int_l>;
+		rockchip,system-power-controller;
+		wakeup-source;
+		#clock-cells = <1>;
+
+		vcc1-supply = <&vcc_sys>;
+		vcc2-supply = <&vcc_sys>;
+		vcc3-supply = <&vcc_sys>;
+		vcc4-supply = <&vcc_sys>;
+		vcc6-supply = <&vcc_sys>;
+		vcc7-supply = <&vcc_sys>;
+		vcc8-supply = <&vcc_sys>;
+		vcc9-supply = <&vcc_io>;
+
+		regulators {
+			vdd_arm: DCDC_REG1 {
+				regulator-name = "vdd_arm";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <750000>;
+				regulator-max-microvolt = <1450000>;
+				regulator-ramp-delay = <6001>;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1100000>;
+				};
+			};
+
+			vdd_logic: DCDC_REG2 {
+				regulator-name = "vdd_logic";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <750000>;
+				regulator-max-microvolt = <1450000>;
+				regulator-ramp-delay = <6001>;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1100000>;
+				};
+			};
+
+			vcc_ddr: DCDC_REG3 {
+				regulator-name = "vcc_ddr";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+				};
+			};
+
+			vcc_io: DCDC_REG4 {
+				regulator-name = "vcc_io";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3300000>;
+				};
+			};
+
+			rk818_ldo1: LDO_REG1 {
+				regulator-name = "rk818_ldo1";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3300000>;
+				};
+			};
+
+			rk818_ldo2: LDO_REG2 {
+				regulator-name = "rk818_ldo2";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3000000>;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3000000>;
+				};
+			};
+
+			rk818_ldo3: LDO_REG3 {
+				regulator-name = "rk818_ldo3";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1100000>;
+				regulator-max-microvolt = <1100000>;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1100000>;
+				};
+			};
+
+			rk818_ldo4: LDO_REG4 {
+				regulator-name = "rk818_ldo4";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <2800000>;
+				regulator-max-microvolt = <2800000>;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <2800000>;
+				};
+			};
+
+			rk818_ldo5: LDO_REG5 {
+				regulator-name = "rk818_ldo5";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3000000>;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3000000>;
+				};
+			};
+
+			rk818_ldo6: LDO_REG6 {
+				regulator-name = "rk818_ldo6";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1200000>;
+				regulator-max-microvolt = <1200000>;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1200000>;
+				};
+			};
+
+			rk818_ldo7: LDO_REG7 {
+				regulator-name = "rk818_ldo7";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			rk818_ldo8: LDO_REG8 {
+				regulator-name = "rk818_ldo8";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vcc_sd: LDO_REG9 {
+				regulator-name = "vcc_sd";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3000000>;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3000000>;
+				};
+			};
+
+			rk818_ldo10: SWITCH_REG {
+				regulator-name = "rk818_ldo10";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+				};
+			};
+		};
+
+		battery {
+			compatible = "rk818-battery";
+			ocv_table = <3400 3650 3693 3707 3731 3749 3760
+				     3770 3782 3796 3812 3829 3852 3882
+				     3915 3951 3981 4047 4086 4132 4182>;
+			design_capacity = <4000>;
+			design_qmax = <4000>;
+			bat_res = <100>;
+			max_input_current = <2000>;
+			max_chrg_current = <1400>;
+			max_chrg_voltage = <4200>;
+			sleep_enter_current = <300>;
+			sleep_exit_current = <300>;
+			power_off_thresd = <3400>;
+			zero_algorithm_vol = <3850>;
+			energy_mode = <0>;
+			fb_temperature = <105>;
+			sample_res = <20>;
+			max_soc_offset = <60>;
+			monitor_sec = <5>;
+			virtual_power = <1>;
+			power_dc2otg = <0>;
+		};
+	};
+};
+
 &pinctrl {
+	pmic {
+		pmic_int_l: pmic-int-l {
+			rockchip,pins = <RK_GPIO3 22 RK_FUNC_GPIO &pcfg_pull_default>;
+		};
+	};
+
 	usb_otg {
 		otg_vbus_drv: otg-vbus-drv {
 			rockchip,pins = <0 26 RK_FUNC_GPIO &pcfg_pull_none>;

commit bbb83f5847b92d872608a2ed99e31dddc5db4643
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Aug 26 17:58:02 2019 +0800

    mtd: mtd_blk: use nand_read_skip_bad() to read in spi nand driver
    
    Since mtd_read() can not skip bad block if meet bad block, so use
    nand_read_skip_bad().
    
    Change-Id: Ic2364b7f29de193412353fad36c86dc6e289e02d
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index a1c805ae11..961b5d171a 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -99,6 +99,7 @@ ulong mtd_dread(struct udevice *udev, lbaint_t start,
 	loff_t off = (loff_t)(start * 512);
 	size_t rwsize = blkcnt * 512;
 	struct mtd_info *mtd;
+	int ret = 0;
 
 	if (!desc)
 		return 0;
@@ -112,8 +113,6 @@ ulong mtd_dread(struct udevice *udev, lbaint_t start,
 
 	if (desc->devnum == BLK_MTD_NAND) {
 #ifdef CONFIG_NAND
-		int ret = 0;
-
 		mtd = dev_get_priv(udev->parent);
 		if (!mtd)
 			return 0;
@@ -128,10 +127,10 @@ ulong mtd_dread(struct udevice *udev, lbaint_t start,
 			return 0;
 	} else if (desc->devnum == BLK_MTD_SPI_NAND) {
 #ifdef CONFIG_MTD_SPI_NAND
-		size_t retlen;
-
-		mtd_read(mtd, off, rwsize, &retlen, dst);
-		if (retlen == rwsize)
+		ret = nand_read_skip_bad(mtd, off, &rwsize,
+					 NULL, mtd->size,
+					 (u_char *)(dst));
+		if (!ret)
 			return blkcnt;
 		else
 #endif

commit 4dbf7962f3cf378f2f6ba6818eef5ea3324ece17
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Aug 26 15:34:17 2019 +0800

    rockchip: rk3308: add CONFIG_SYS_SPI_U_BOOT_OFFS
    
    Change-Id: I300eb48b224adacab50121f8b3ad8ba469fc22ee
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h
index deb8024938..d43d2cbdd1 100644
--- a/include/configs/rk3308_common.h
+++ b/include/configs/rk3308_common.h
@@ -22,6 +22,7 @@
 #define CONFIG_SPL_MAX_SIZE		0x20000
 #define CONFIG_SPL_BSS_START_ADDR	0x00400000
 #define CONFIG_SPL_BSS_MAX_SIZE		0x2000
+#define CONFIG_SYS_SPI_U_BOOT_OFFS	0x8000
 
 #define CONFIG_SYS_NS16550_MEM32
 

commit 23cf98fbdc66206761c8f8d1c5fe4ff964937e46
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Aug 26 15:04:49 2019 +0800

    spl: mtd_blk: support mtd block boot
    
    Change-Id: Iaeaff1d25cb58929a2cc487ea6f3bb2f605938c8
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/spl/Makefile b/common/spl/Makefile
index 9f07132f25..26c37ddffe 100644
--- a/common/spl/Makefile
+++ b/common/spl/Makefile
@@ -31,6 +31,7 @@ endif
 obj-$(CONFIG_$(SPL_TPL_)UBI) += spl_ubi.o
 obj-$(CONFIG_$(SPL_TPL_)NET_SUPPORT) += spl_net.o
 obj-$(CONFIG_$(SPL_TPL_)MMC_SUPPORT) += spl_mmc.o
+obj-$(CONFIG_$(SPL_TPL_)MTD_SUPPORT) += spl_mtd_blk.o
 obj-$(CONFIG_$(SPL_TPL_)ATF) += spl_atf.o
 obj-$(CONFIG_$(SPL_TPL_)OPTEE) += spl_optee.o
 obj-$(CONFIG_$(SPL_TPL_)LOAD_RKFW) += spl_rkfw.o
diff --git a/common/spl/spl_mtd_blk.c b/common/spl/spl_mtd_blk.c
new file mode 100644
index 0000000000..fadde03b65
--- /dev/null
+++ b/common/spl/spl_mtd_blk.c
@@ -0,0 +1,133 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <blk.h>
+#include <dm.h>
+#include <errno.h>
+#include <image.h>
+#include <malloc.h>
+#include <part.h>
+#include <spl.h>
+#include <spl_ab.h>
+#include <spl_rkfw.h>
+#include <asm/u-boot.h>
+#include <dm/device-internal.h>
+#include <linux/compiler.h>
+#include <linux/mtd/mtd.h>
+
+static int spl_mtd_get_device_index(u32 boot_device)
+{
+	switch (boot_device) {
+	case BOOT_DEVICE_MTD_BLK_NAND:
+		return 0;
+	case BOOT_DEVICE_MTD_BLK_SPI_NAND:
+		return 1;
+	case BOOT_DEVICE_MTD_BLK_SPI_NOR:
+		return 2;
+	}
+
+#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
+	printf("spl: unsupported mtd boot device.\n");
+#endif
+
+	return -ENODEV;
+}
+
+struct blk_desc *find_mtd_device(int dev_num)
+{
+	struct udevice *dev;
+	struct blk_desc *desc;
+	int ret;
+
+	ret = blk_find_device(IF_TYPE_MTD, dev_num, &dev);
+
+	if (ret) {
+#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
+		printf("MTD Device %d not found\n", dev_num);
+#endif
+		return NULL;
+	}
+
+	ret = device_probe(dev);
+	if (ret) {
+#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
+		printf("MTD Device %d not found\n", dev_num);
+#endif
+		return NULL;
+	}
+
+	desc = dev_get_uclass_platdata(dev);
+	if (!desc)
+		return NULL;
+
+	return desc;
+}
+
+#ifdef CONFIG_SPL_LOAD_RKFW
+static ulong mtd_spl_load_read(struct spl_load_info *load, ulong sector,
+			       ulong count, void *buf)
+{
+	struct blk_desc *desc = load->dev;
+
+	return blk_dread(desc, sector, count, buf);
+}
+
+int spl_mtd_load_rkfw(struct spl_image_info *spl_image, struct blk_desc *desc)
+{
+	int ret = -1;
+
+	u32 trust_sectors = CONFIG_RKFW_TRUST_SECTOR;
+	u32 uboot_sectors = CONFIG_RKFW_U_BOOT_SECTOR;
+	struct spl_load_info load;
+
+	load.dev = desc;
+	load.priv = NULL;
+	load.filename = NULL;
+	load.bl_len = desc->blksz;
+	load.read = mtd_spl_load_read;
+
+#ifdef CONFIG_SPL_AB
+	char trust_partition[] = "trust";
+	char uboot_partition[] = "uboot";
+
+	spl_get_partitions_sector(mmc_get_blk_desc(mmc), trust_partition,
+				  &trust_sectors);
+	spl_get_partitions_sector(mmc_get_blk_desc(mmc), uboot_partition,
+				  &uboot_sectors);
+#endif
+
+	ret = spl_load_rkfw_image(spl_image, &load,
+				  trust_sectors,
+				  uboot_sectors);
+	if (ret) {
+#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
+		puts("spl_mtd_load_rkfw: mtd block read error\n");
+#endif
+		return -1;
+	}
+
+	return ret;
+}
+#endif
+
+int spl_mtd_load_image(struct spl_image_info *spl_image,
+		       struct spl_boot_device *bootdev)
+{
+	struct blk_desc *desc;
+	int ret = 0;
+
+	desc = find_mtd_device(spl_mtd_get_device_index(bootdev->boot_device));
+	if (!desc)
+		return -ENODEV;
+#ifdef CONFIG_SPL_LOAD_RKFW
+	ret = spl_mtd_load_rkfw(spl_image, desc);
+#endif
+	return ret;
+}
+
+SPL_LOAD_IMAGE_METHOD("MTD1", 0, BOOT_DEVICE_MTD_BLK_NAND, spl_mtd_load_image);
+SPL_LOAD_IMAGE_METHOD("MTD2", 0, BOOT_DEVICE_MTD_BLK_SPI_NAND, spl_mtd_load_image);
+SPL_LOAD_IMAGE_METHOD("MTD3", 0, BOOT_DEVICE_MTD_BLK_SPI_NOR, spl_mtd_load_image);

commit ce39010b2882d24878de1e8514c993961c034ae5
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Aug 26 14:41:14 2019 +0800

    rockchip: spl-boot-order: support scan spi nand device
    
    Change-Id: Ia057a4fddd31bc57cd613d6328cfc5b26753a0c1
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/spl-boot-order.c b/arch/arm/mach-rockchip/spl-boot-order.c
index 6720ba2527..47ad07090a 100644
--- a/arch/arm/mach-rockchip/spl-boot-order.c
+++ b/arch/arm/mach-rockchip/spl-boot-order.c
@@ -34,6 +34,9 @@ static int spl_node_to_boot_device(int node)
 {
 	struct udevice *parent;
 
+	if (!uclass_get_device_by_of_offset(UCLASS_SPI, node, &parent))
+		return BOOT_DEVICE_MTD_BLK_SPI_NAND;
+
 #ifdef CONFIG_SPL_NAND_SUPPORT
 	if (!rk_nand_init())
 		return BOOT_DEVICE_NAND;

commit 3e429466a7ce98d437583044a55fe23b3bac9f48
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Aug 26 14:17:53 2019 +0800

    spl: add some BOOT_DEVICE_MTD_BLK_XXX boot mode
    
    Use the BOOT_DEVICE_MTD_BLK_XXX boot mode if the nand & spi nand & spi
    nor driver are appended to MTD device.
    
    New boot mode:
            BOOT_DEVICE_MTD_BLK_NAND
            BOOT_DEVICE_MTD_BLK_SPI_NAND
            BOOT_DEVICE_MTD_BLK_SPI_NOR
    
    Change-Id: I27a63791455073ccdcb80c16bac4dfb635da07de
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/include/asm/spl.h b/arch/arm/include/asm/spl.h
index df45511699..2fe357bcb0 100644
--- a/arch/arm/include/asm/spl.h
+++ b/arch/arm/include/asm/spl.h
@@ -31,6 +31,9 @@ enum {
 	BOOT_DEVICE_DFU,
 	BOOT_DEVICE_XIP,
 	BOOT_DEVICE_BOOTROM,
+	BOOT_DEVICE_MTD_BLK_NAND,
+	BOOT_DEVICE_MTD_BLK_SPI_NAND,
+	BOOT_DEVICE_MTD_BLK_SPI_NOR,
 	BOOT_DEVICE_NONE
 };
 #endif

commit bf767149655f4c1e45eeb2eeb227a39c0f356b91
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Aug 27 14:58:24 2019 +0800

    crypto: rockchip: support spl/tpl build
    
    Change-Id: Ib100d7d46ea212257df5262a4fa42e485708e8fb
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/crypto/rockchip/Kconfig b/drivers/crypto/rockchip/Kconfig
index 3e21935c3d..64984662d1 100644
--- a/drivers/crypto/rockchip/Kconfig
+++ b/drivers/crypto/rockchip/Kconfig
@@ -5,9 +5,38 @@ config ROCKCHIP_CRYPTO_V1
 	  This enable MD5/SHA1/SHA256/RSA512/RSA1024/RSA2048 algorithm support for
 	  rockchip crypto v1 on platforms: rk3399/rk3368/rk3328/rk3229/rk3288/rk3128.
 
+config SPL_ROCKCHIP_CRYPTO_V1
+	bool "Enable rockchip crypto v1 support in spl"
+	depends on SPL_DM_CRYPTO
+	help
+	  This enable MD5/SHA1/SHA256/RSA512/RSA1024/RSA2048 algorithm support for
+	  rockchip crypto v1 on platforms: rk3399/rk3368/rk3328/rk3229/rk3288/rk3128.
+
+config TPL_ROCKCHIP_CRYPTO_V1
+	bool "Enable rockchip crypto v1 support in tpl"
+	depends on TPL_DM_CRYPTO
+	help
+	  This enable MD5/SHA1/SHA256/RSA512/RSA1024/RSA2048 algorithm support for
+	  rockchip crypto v1 on platforms: rk3399/rk3368/rk3328/rk3229/rk3288/rk3128.
+
 config ROCKCHIP_CRYPTO_V2
 	bool "Enable rockchip crypto v2 support"
 	depends on DM_CRYPTO
 	help
 	  This enable MD5/SHA1/SHA256/RSA512/RSA1024/RSA2048 algorithm support for
 	  rockchip crypto v2 on platforms: px30/rk3326/rk1808/rk3308.
+
+config SPL_ROCKCHIP_CRYPTO_V2
+	bool "Enable rockchip crypto v2 support in spl"
+	depends on SPL_DM_CRYPTO
+	help
+	  This enable MD5/SHA1/SHA256/RSA512/RSA1024/RSA2048 algorithm support for
+	  rockchip crypto v2 on platforms: px30/rk3326/rk1808/rk3308.
+
+config TPL_ROCKCHIP_CRYPTO_V2
+	bool "Enable rockchip crypto v2 support in tpl"
+	depends on TPL_DM_CRYPTO
+	help
+	  This enable MD5/SHA1/SHA256/RSA512/RSA1024/RSA2048 algorithm support for
+	  rockchip crypto v2 on platforms: px30/rk3326/rk1808/rk3308.
+
diff --git a/drivers/crypto/rockchip/Makefile b/drivers/crypto/rockchip/Makefile
index c818d1921d..99e9c71394 100644
--- a/drivers/crypto/rockchip/Makefile
+++ b/drivers/crypto/rockchip/Makefile
@@ -4,5 +4,5 @@
 #  Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
 #
 
-obj-$(CONFIG_ROCKCHIP_CRYPTO_V1) += crypto_v1.o
-obj-$(CONFIG_ROCKCHIP_CRYPTO_V2) += crypto_v2.o crypto_v2_pka.o crypto_v2_util.o
\ No newline at end of file
+obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_CRYPTO_V1) += crypto_v1.o
+obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_CRYPTO_V2) += crypto_v2.o crypto_v2_pka.o crypto_v2_util.o

commit 638f562e2b9709c43c90f5fbaa5e5133f7cca065
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Aug 27 14:47:35 2019 +0800

    dm: crypto: support spl/tpl build
    
    Change-Id: I5af80d5de66edf7fc0c5e8449cd8b7ab9507c969
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
index 89ccc48c30..a36d853a4a 100644
--- a/drivers/crypto/Kconfig
+++ b/drivers/crypto/Kconfig
@@ -6,6 +6,18 @@ config DM_CRYPTO
 	---help---
 	This config enables the dm crypto support.
 
+config SPL_DM_CRYPTO
+	bool "Enable Driver Model for CRYPTO drivers in spl"
+	depends on SPL_DM
+	---help---
+	This config enables the dm crypto support.
+
+config TPL_DM_CRYPTO
+	bool "Enable Driver Model for CRYPTO drivers in tpl"
+	depends on TPL_DM
+	---help---
+	This config enables the dm crypto support.
+
 source drivers/crypto/fsl/Kconfig
 source drivers/crypto/rockchip/Kconfig
 
diff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile
index 3cc4106db8..e54de414ec 100644
--- a/drivers/crypto/Makefile
+++ b/drivers/crypto/Makefile
@@ -5,8 +5,8 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
 
-obj-$(CONFIG_DM_CRYPTO)		+= crypto-uclass.o
-obj-$(CONFIG_EXYNOS_ACE_SHA)	+= ace_sha.o
+obj-$(CONFIG_$(SPL_TPL_)DM_CRYPTO) += crypto-uclass.o
+obj-$(CONFIG_EXYNOS_ACE_SHA) += ace_sha.o
 obj-y += rsa_mod_exp/
 obj-y += fsl/
 obj-y += rockchip/

commit 2ec0548944a8bafe2620a4bde405670c9ca3282e
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue Aug 27 11:15:36 2019 +0800

    mtd: spinand: add support for Winbond W25N01GV
    
    Change-Id: I93371926314363014d9232d78827c42b18957424
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/winbond.c b/drivers/mtd/nand/spi/winbond.c
index eac811d97c..6ba8bc5c7b 100644
--- a/drivers/mtd/nand/spi/winbond.c
+++ b/drivers/mtd/nand/spi/winbond.c
@@ -86,6 +86,14 @@ static const struct spinand_info winbond_spinand_table[] = {
 		     0,
 		     SPINAND_ECCINFO(&w25m02gv_ooblayout, NULL),
 		     SPINAND_SELECT_TARGET(w25m02gv_select_target)),
+	SPINAND_INFO("W25N01GV", 0xAA,
+		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
+		     NAND_ECCREQ(1, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     0,
+		     SPINAND_ECCINFO(&w25m02gv_ooblayout, NULL)),
 };
 
 /**

commit b0bc5ced0d46df0e9599c5977fb038c073f52714
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue Aug 27 10:49:55 2019 +0800

    dts: rk3308: add compatible rockchip,sfc to sfc
    
    in order to support MTD SPI flash framwork
    
    Change-Id: I251fcf343be029a7f2cff8632b0e80a62972291b
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/dts/rk3308.dtsi b/arch/arm/dts/rk3308.dtsi
index 7758c3c898..05849cfdfb 100644
--- a/arch/arm/dts/rk3308.dtsi
+++ b/arch/arm/dts/rk3308.dtsi
@@ -452,7 +452,7 @@
 
 
 	sfc: sfc@ff4c0000 {
-		compatible = "rockchip,rksfc";
+		compatible = "rockchip,rksfc","rockchip,sfc";
 		reg = <0x0 0xff4c0000 0x0 0x4000>;
 		interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;

commit 38dab65807e52d801072c03759d5c0a92ebb9203
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Mon Aug 26 09:50:10 2019 +0800

    drm/rockchip: vop: fix dclk invert register define error
    
    Change-Id: Idba6590f6e3aea9893df7d7f72e2cf21fc5372e9
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index 12b7bd7b6d..f382b12d55 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -174,11 +174,11 @@ static const struct vop_line_flag rk3288_vop_line_flag = {
 };
 
 static const struct vop_grf_ctrl rk3288_vop_big_grf_ctrl = {
-	.grf_dclk_inv = VOP_REG(RK3288_GRF_SOC_CON15, 0x1, 12),
+	.grf_dclk_inv = VOP_REG(RK3288_GRF_SOC_CON15, 0x1, 13),
 };
 
 static const struct vop_grf_ctrl rk3288_vop_lit_grf_ctrl = {
-	.grf_dclk_inv = VOP_REG(RK3288_GRF_SOC_CON15, 0x1, 14),
+	.grf_dclk_inv = VOP_REG(RK3288_GRF_SOC_CON15, 0x1, 15),
 };
 
 const struct vop_data rk3288_vop_big = {

commit dba9c9e59fa1ad3cdd9b78028ad00c3d64e7b4f7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 22 11:57:04 2019 +0800

    rockchip: board: show regulator initial state by hotkey
    
    It's useful for debug.
    
    Change-Id: Idae556cea02e05f240e3c680a1b02a7506946490
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/hotkey.h b/arch/arm/include/asm/arch-rockchip/hotkey.h
index 7a6c449432..04b405675f 100644
--- a/arch/arm/include/asm/arch-rockchip/hotkey.h
+++ b/arch/arm/include/asm/arch-rockchip/hotkey.h
@@ -14,6 +14,7 @@ enum hotkey_t {
 	HK_CMDLINE,
 	HK_FASTBOOT,
 	HK_INITCALL,
+	HK_REGULATOR,
 	HK_ROCKUSB_DNL,
 	HK_SYSMEM,
 };
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 7daa7c5369..0a522cd891 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -404,7 +404,7 @@ int board_init(void)
 	 */
 	clks_probe();
 #ifdef CONFIG_DM_REGULATOR
-	if (regulators_enable_boot_on(false))
+	if (regulators_enable_boot_on(is_hotkey(HK_REGULATOR)))
 		debug("%s: Can't enable boot on regulator\n", __func__);
 #endif
 
diff --git a/arch/arm/mach-rockchip/hotkey.c b/arch/arm/mach-rockchip/hotkey.c
index af706f8a4b..835be86965 100644
--- a/arch/arm/mach-rockchip/hotkey.c
+++ b/arch/arm/mach-rockchip/hotkey.c
@@ -19,6 +19,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define CTRL_I		0x09	/* inicall debug for kernel */
 #define CTRL_M		0x0d	/* memory(sysmem/bidram) */
 #define CTRL_P		0x10	/* parameter(cmdline) dump */
+#define CTRL_R		0x12	/* regulator initial state dump */
 #define CTRL_S		0x13	/* shell(cli) on BOOTM_STATE_OS_GO */
 
 #if defined(CONFIG_CONSOLE_DISABLE_CTRLC) && \
@@ -37,6 +38,8 @@ bool is_hotkey(enum hotkey_t id)
 		return gd->console_evt == CTRL_F;
 	case HK_INITCALL:
 		return gd->console_evt == CTRL_I;
+	case HK_REGULATOR:
+		return gd->console_evt == CTRL_R;
 	case HK_ROCKUSB_DNL:
 		return gd->console_evt == CTRL_D;
 	case HK_SYSMEM:

commit 665be4b0c2d84b1dcd143322a23fba47d3d40ae9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 1 11:13:24 2019 +0800

    rockchip: hotkey: enter cli on BOOTM_STATE_OS_PREP/GO
    
    - BOOTM_STATE_OS_PREP: before fdt fixup and DM works normally;
    - BOOTM_STATE_OS_GO: before jump to linux and DM can't work normally;
    
    Change-Id: Ic377a426970acd4f600f654a4efd4bdde38c3a89
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/hotkey.h b/arch/arm/include/asm/arch-rockchip/hotkey.h
index 8d0709e290..7a6c449432 100644
--- a/arch/arm/include/asm/arch-rockchip/hotkey.h
+++ b/arch/arm/include/asm/arch-rockchip/hotkey.h
@@ -9,7 +9,8 @@
 enum hotkey_t {
 	HK_INVAL,
 	HK_BROM_DNL,
-	HK_CLI,
+	HK_CLI_OS_PRE,
+	HK_CLI_OS_GO,
 	HK_CMDLINE,
 	HK_FASTBOOT,
 	HK_INITCALL,
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 5ac587dd96..7daa7c5369 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -479,10 +479,16 @@ int board_initr_caches_fixup(void)
 }
 #endif
 
+void arch_preboot_os(uint32_t bootm_state)
+{
+	if (bootm_state & BOOTM_STATE_OS_PREP)
+		hotkey_run(HK_CLI_OS_PRE);
+}
+
 void board_quiesce_devices(void)
 {
 	hotkey_run(HK_CMDLINE);
-	hotkey_run(HK_CLI);
+	hotkey_run(HK_CLI_OS_GO);
 
 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
 	/* Destroy atags makes next warm boot safer */
diff --git a/arch/arm/mach-rockchip/hotkey.c b/arch/arm/mach-rockchip/hotkey.c
index ae078d5c02..af706f8a4b 100644
--- a/arch/arm/mach-rockchip/hotkey.c
+++ b/arch/arm/mach-rockchip/hotkey.c
@@ -12,13 +12,14 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#define CTRL_A		0x01	/* shell(cli) on BOOTM_STATE_OS_PREP */
 #define CTRL_B		0x02	/* bootrom mode */
 #define CTRL_D		0x04	/* download mde */
 #define CTRL_F		0x06	/* fastboot mode */
 #define CTRL_I		0x09	/* inicall debug for kernel */
 #define CTRL_M		0x0d	/* memory(sysmem/bidram) */
 #define CTRL_P		0x10	/* parameter(cmdline) dump */
-#define CTRL_S		0x13	/* shell(cli) */
+#define CTRL_S		0x13	/* shell(cli) on BOOTM_STATE_OS_GO */
 
 #if defined(CONFIG_CONSOLE_DISABLE_CTRLC) && \
 	defined(CONFIG_BOOTDELAY) && (CONFIG_BOOTDELAY <= 0)
@@ -64,7 +65,11 @@ void hotkey_run(enum hotkey_t id)
 		if (gd->console_evt == CTRL_I)
 			env_update("bootargs", "initcall_debug debug");
 		break;
-	case HK_CLI:
+	case HK_CLI_OS_PRE:
+		if (gd->console_evt == CTRL_A)
+			cli_loop();
+		break;
+	case HK_CLI_OS_GO:
 		if (gd->console_evt == CTRL_S)
 			cli_loop();
 		break;

commit bd700d6b801bf513b5176ca53a85590d04c44ab2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 1 11:04:35 2019 +0800

    common: bootm: add bootm state param for arch_preboot_os()
    
    - This makes arch_preboot_os() more flexsible;
    - call arch_preboot_os() when BOOTM_STATE_OS_PREP;
    
    Change-Id: Ia4ae3666b8180c993c761ef222acbcff5358ae97
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/bootm.c b/common/bootm.c
index 08bb5b7b91..564f8fe8c5 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -725,6 +725,8 @@ int do_bootm_states(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
 		if (images->os.os == IH_OS_LINUX)
 			fixup_silent_linux();
 #endif
+		arch_preboot_os(BOOTM_STATE_OS_PREP);
+
 		ret = boot_fn(BOOTM_STATE_OS_PREP, argc, argv, images);
 	}
 
diff --git a/common/bootm_os.c b/common/bootm_os.c
index 5e6b1777e4..392dd2f59f 100644
--- a/common/bootm_os.c
+++ b/common/bootm_os.c
@@ -469,7 +469,7 @@ static boot_os_fn *boot_os[] = {
 };
 
 /* Allow for arch specific config before we boot */
-__weak void arch_preboot_os(void)
+__weak void arch_preboot_os(uint32_t bootm_state)
 {
 	/* please define platform specific arch_preboot_os() */
 }
@@ -477,7 +477,7 @@ __weak void arch_preboot_os(void)
 int boot_selected_os(int argc, char * const argv[], int state,
 		     bootm_headers_t *images, boot_os_fn *boot_fn)
 {
-	arch_preboot_os();
+	arch_preboot_os(state);
 	boot_fn(state, argc, argv, images);
 
 	/* Stand-alone may return when 'autostart' is 'no' */
diff --git a/include/bootm.h b/include/bootm.h
index 49813772ce..72ed30da07 100644
--- a/include/bootm.h
+++ b/include/bootm.h
@@ -54,7 +54,7 @@ int bootm_find_images(int flag, int argc, char * const argv[]);
 int do_bootm_states(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
 		    int states, bootm_headers_t *images, int boot_progress);
 
-void arch_preboot_os(void);
+void arch_preboot_os(uint32_t bootm_state);
 
 /**
  * bootm_decomp_image() - decompress the operating system

commit 6281e7d505bed5e41c93a7944e41aa08bb6c896e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 15 11:04:52 2019 +0800

    rockchip: atags: enable atags cmd "dump_atags"
    
    Remove atags test function, we don't need it any more since
    we have applied atags to so many platforms and it works well.
    
    Change-Id: Ideecdfb34141f848b81ef5441b61be54f72708ff
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk_atags.c b/arch/arm/mach-rockchip/rk_atags.c
index 4c4d0b50eb..f7faab603f 100644
--- a/arch/arm/mach-rockchip/rk_atags.c
+++ b/arch/arm/mach-rockchip/rk_atags.c
@@ -354,12 +354,11 @@ void atags_destroy(void)
 		memset((char *)ATAGS_PHYS_BASE, 0, sizeof(struct tag));
 }
 
-#if (defined(CONFIG_DEBUG_ATAGS) || defined(DEBUG)) && \
-    !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
+#ifndef CONFIG_SPL_BUILD
 void atags_stat(void)
 {
-	u32 in_use = 0, in_available = 0;
 	u32 start = ATAGS_PHYS_BASE, end = ATAGS_PHYS_BASE + ATAGS_SIZE;
+	u32 in_use = 0, in_available = 0;
 	struct tag *t;
 
 	if (!atags_is_available())
@@ -531,77 +530,18 @@ void atags_print_all_tags(void)
 	}
 }
 
-void atags_test(void)
+static int do_dump_atags(cmd_tbl_t *cmdtp, int flag,
+			 int argc, char * const argv[])
 {
-	struct tag_serial t_serial;
-	struct tag_bootdev t_bootdev;
-	struct tag_ddr_mem t_ddr_mem;
-	struct tag_tos_mem t_tos_mem;
-	struct tag_ram_partition t_ram_param;
-	struct tag_atf_mem t_atf_mem;
-	struct tag_pub_key t_pub_key;
-	struct tag_soc_info t_soc;
-
-	memset(&t_serial,  0x1, sizeof(t_serial));
-	memset(&t_bootdev, 0x2, sizeof(t_bootdev));
-	memset(&t_ddr_mem, 0x3, sizeof(t_ddr_mem));
-	memset(&t_tos_mem, 0x4, sizeof(t_tos_mem));
-	memset(&t_ram_param, 0x0, sizeof(t_ram_param));
-	memset(&t_atf_mem, 0x5, sizeof(t_atf_mem));
-	memset(&t_pub_key, 0x6, sizeof(t_pub_key));
-	memset(&t_soc, 0x7, sizeof(t_soc));
-
-	memcpy(&t_tos_mem.tee_mem.name, "tee_mem", 8);
-	memcpy(&t_tos_mem.drm_mem.name, "drm_mem", 8);
-
-	t_ram_param.count = 4;
-	memcpy(&t_ram_param.part[0].name, "misc", 9);
-	t_ram_param.part[0].start = 0x00600000;
-	t_ram_param.part[0].size =  0x00200000;
-
-	memcpy(&t_ram_param.part[1].name, "resource", 9);
-	t_ram_param.part[1].start = 0x00800000;
-	t_ram_param.part[1].size =  0x00200000;
-
-	memcpy(&t_ram_param.part[2].name, "kernel", 7);
-	t_ram_param.part[2].start = 0x00a00000;
-	t_ram_param.part[2].size =  0x02000000;
-
-	memcpy(&t_ram_param.part[3].name, "boot", 5);
-	t_ram_param.part[3].start = 0x04000000;
-	t_ram_param.part[3].size =  0x02000000;
-
-	/* First pre-loader must call it before atags_set_tag() */
-	atags_destroy();
-
-	atags_set_tag(ATAG_SERIAL,  &t_serial);
-	atags_set_tag(ATAG_BOOTDEV, &t_bootdev);
-	atags_set_tag(ATAG_DDR_MEM, &t_ddr_mem);
-	atags_set_tag(ATAG_TOS_MEM, &t_tos_mem);
-	atags_set_tag(ATAG_RAM_PARTITION, &t_ram_param);
-	atags_set_tag(ATAG_ATF_MEM, &t_atf_mem);
-	atags_set_tag(ATAG_PUB_KEY, &t_pub_key);
-	atags_set_tag(ATAG_SOC_INFO, &t_soc);
-
 	atags_print_all_tags();
 	atags_stat();
-}
 
-static int dump_atags(cmd_tbl_t *cmdtp, int flag,
-		      int argc, char * const argv[])
-{
-	atags_print_all_tags();
 	return 0;
 }
 
 U_BOOT_CMD(
-	atags, 1, 1, dump_atags,
+	dump_atags, 1, 1, do_dump_atags,
 	"Dump the content of the atags",
 	""
 );
-#else
-void inline atags_print_tag(struct tag *t) {}
-void inline atags_print_all_tags(void) {}
-void inline atags_test(void) {}
-void atags_stat(void) {};
 #endif

commit 6c98a582036935d2258cdc126c005e8fa5046575
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Aug 21 09:31:50 2019 +0800

    dts: rk3308: add secure_otp node for secure otp
    
    Change-Id: If55ab22de9eaad19a75678a892e4ec24643af3c9
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-u-boot.dtsi b/arch/arm/dts/rk3308-u-boot.dtsi
index 22ae949a19..46f62b0c4c 100644
--- a/arch/arm/dts/rk3308-u-boot.dtsi
+++ b/arch/arm/dts/rk3308-u-boot.dtsi
@@ -53,6 +53,10 @@
 	status = "okay";
 };
 
+&secure_otp {
+	u-boot,dm-pre-reloc;
+};
+
 &uart0 {
 	u-boot,dm-pre-reloc;
 };
diff --git a/arch/arm/dts/rk3308.dtsi b/arch/arm/dts/rk3308.dtsi
index d51c69a49f..7758c3c898 100644
--- a/arch/arm/dts/rk3308.dtsi
+++ b/arch/arm/dts/rk3308.dtsi
@@ -217,6 +217,13 @@
 		status = "disabled";
 	};
 
+	secure_otp: secure_otp@0xff2a8000 {
+		compatible = "rockchip,rk3308-secure-otp";
+		reg = <0x0 0xff2a8000 0x0 0x4000>;
+		secure_conf = <0xff2b0004>;
+		mask_addr = <0xff540000>;
+	};
+
 	vop: vop@ff2e0000 {
 		compatible = "rockchip,rk3308-vop";
 		reg = <0x0 0xff2e0000 0x0 0x1fc>, <0x0 0xff2e0a00 0x0 0x400>;

commit 52ed8851b8fd90eb0b29cd18430ecd05e5f6b032
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Aug 20 20:52:53 2019 +0800

    misc: rockchip-otp: support read & write secure otp
    
    support chip: rk3308
    
    Change-Id: I7daeaab16495d17bd75994de94dc19ed18eca21e
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 99fcff3b64..a3013e4ef1 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -66,6 +66,12 @@ config ROCKCHIP_OTP
 	  This is a simple drive to dump specified values of Rockchip SoC
 	  from otp, such as cpu-leakage.
 
+config SPL_ROCKCHIP_SECURE_OTP
+	bool "Rockchip Secure OTP Support in spl"
+	depends on SPL_MISC
+	help
+	  Support read & write secure otp in spl.
+
 config CMD_CROS_EC
 	bool "Enable crosec command"
 	depends on CROS_EC
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 21386781c6..0143dae2fc 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -53,3 +53,4 @@ obj-$(CONFIG_WINBOND_W83627) += winbond_w83627.o
 obj-$(CONFIG_QFW) += qfw.o
 obj-$(CONFIG_ROCKCHIP_EFUSE) += rockchip-efuse.o
 obj-$(CONFIG_ROCKCHIP_OTP) += rockchip-otp.o
+obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_SECURE_OTP) += rockchip-secure-otp.o
diff --git a/drivers/misc/rockchip-secure-otp.S b/drivers/misc/rockchip-secure-otp.S
new file mode 100644
index 0000000000..4decc246ff
--- /dev/null
+++ b/drivers/misc/rockchip-secure-otp.S
@@ -0,0 +1,10236 @@
+	.arch armv8-a+nosimd
+	.file	"rockchip-secure-otp.c"
+	.text
+.Ltext0:
+	.cfi_sections	.debug_frame
+	.section	.text.rockchip_secure_otp_ofdata_to_platdata,"ax",@progbits
+	.align	2
+	.type	rockchip_secure_otp_ofdata_to_platdata, %function
+rockchip_secure_otp_ofdata_to_platdata:
+.LFB268:
+	.file 1 "drivers/misc/rockchip-secure-otp.c"
+	.loc 1 385 0
+	.cfi_startproc
+.LVL0:
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -16
+	.cfi_offset 20, -8
+	.loc 1 385 0
+	mov	x20, x0
+	.loc 1 386 0
+	bl	dev_get_platdata
+.LVL1:
+	mov	x19, x0
+.LVL2:
+	.loc 1 388 0
+	mov	x0, x20
+.LVL3:
+	bl	dev_read_addr_ptr
+.LVL4:
+	.loc 1 389 0
+	mov	w2, 0
+	adrp	x1, .LC0
+	.loc 1 388 0
+	str	x0, [x19]
+	.loc 1 389 0
+	add	x1, x1, :lo12:.LC0
+	mov	x0, x20
+	bl	dev_read_u32_default
+.LVL5:
+	.loc 1 390 0
+	uxtw	x0, w0
+	str	x0, [x19, 8]
+	.loc 1 391 0
+	mov	w2, 0
+	mov	x0, x20
+	adrp	x1, .LC1
+	add	x1, x1, :lo12:.LC1
+	bl	dev_read_u32_default
+.LVL6:
+	.loc 1 392 0
+	uxtw	x0, w0
+	str	x0, [x19, 16]
+	.loc 1 395 0
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+.LVL7:
+	ldp	x29, x30, [sp], 32
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE268:
+	.size	rockchip_secure_otp_ofdata_to_platdata, .-rockchip_secure_otp_ofdata_to_platdata
+	.section	.text.rockchip_secure_otp_wait_status.isra.1,"ax",@progbits
+	.align	2
+	.type	rockchip_secure_otp_wait_status.isra.1, %function
+rockchip_secure_otp_wait_status.isra.1:
+.LFB270:
+	.loc 1 47 0
+	.cfi_startproc
+.LVL8:
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	mov	w19, w1
+	str	x21, [sp, 32]
+	.cfi_offset 21, -16
+	.loc 1 47 0
+	mov	x21, x0
+	mov	w20, 10000
+.LVL9:
+.L4:
+.LBB26:
+	.loc 1 52 0
+	ldr	x0, [x21]
+	ldr	w0, [x0, 772]
+.LVL10:
+#APP
+// 52 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+.LBE26:
+	tst	w0, w19
+	beq	.L6
+.LBB27:
+	.loc 1 62 0
+	orr	w19, w19, -65536
+.LVL11:
+#APP
+// 62 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x21]
+.LVL12:
+	str	w19, [x0, 772]
+.LBE27:
+	.loc 1 64 0
+	mov	w0, 0
+	b	.L3
+.LVL13:
+.L6:
+	.loc 1 53 0
+	mov	x0, 1
+.LVL14:
+	bl	udelay
+.LVL15:
+	.loc 1 55 0
+	subs	w20, w20, #1
+.LVL16:
+	bne	.L4
+.LVL17:
+.LBB28:
+.LBB29:
+	.loc 1 56 0
+	adrp	x1, .LANCHOR0
+	adrp	x0, .LC2
+	add	x1, x1, :lo12:.LANCHOR0
+	add	x0, x0, :lo12:.LC2
+	bl	printf
+.LVL18:
+	mov	w0, -110
+.LVL19:
+.L3:
+.LBE29:
+.LBE28:
+	.loc 1 65 0
+	ldp	x19, x20, [sp, 16]
+.LVL20:
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE270:
+	.size	rockchip_secure_otp_wait_status.isra.1, .-rockchip_secure_otp_wait_status.isra.1
+	.section	.text.rockchip_secure_otp_read,"ax",@progbits
+	.align	2
+	.type	rockchip_secure_otp_read, %function
+rockchip_secure_otp_read:
+.LFB265:
+	.loc 1 135 0
+	.cfi_startproc
+.LVL21:
+	stp	x29, x30, [sp, -80]!
+	.cfi_def_cfa_offset 80
+	.cfi_offset 29, -80
+	.cfi_offset 30, -72
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -64
+	.cfi_offset 20, -56
+	mov	w20, w1
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -32
+	.cfi_offset 24, -24
+	mov	x23, x2
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 25, -16
+	.cfi_offset 26, -8
+	mov	w26, w3
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -48
+	.cfi_offset 22, -40
+	.loc 1 136 0
+	bl	dev_get_platdata
+.LVL22:
+	mov	x19, x0
+.LVL23:
+.LBB50:
+	.loc 1 143 0
+#APP
+// 143 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	mov	x22, 1044
+	mov	w0, 1048592
+.LVL24:
+	movk	x22, 0xff50, lsl 16
+	str	w0, [x22]
+.LBE50:
+	.loc 1 144 0
+	mov	x0, 10
+	bl	udelay
+.LVL25:
+.LBB51:
+	.loc 1 145 0
+#APP
+// 145 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	mov	w0, 1048576
+	str	w0, [x22]
+.LBE51:
+	.loc 1 146 0
+	mov	x0, 10
+	bl	udelay
+.LVL26:
+.LBB52:
+	.loc 1 148 0
+#APP
+// 148 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x19, 8]
+	mov	w1, 262148
+	str	w1, [x0]
+.LVL27:
+.LBE52:
+.LBB53:
+.LBB54:
+.LBB55:
+	.loc 1 116 0
+#APP
+// 116 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x19]
+	mov	w1, 512
+	movk	w1, 0xff00, lsl 16
+	str	w1, [x0, 32]
+.LVL28:
+.LBE55:
+.LBB56:
+	.loc 1 117 0
+#APP
+// 117 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x19]
+	mov	w1, -65535
+	str	w1, [x0, 36]
+.LVL29:
+.LBE56:
+.LBB57:
+	.loc 1 118 0
+#APP
+// 118 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x19]
+	mov	w1, 250
+	str	w1, [x0, 4096]
+.LVL30:
+.LBE57:
+.LBB58:
+	.loc 1 120 0
+#APP
+// 120 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x19]
+	str	wzr, [x0, 4100]
+.LVL31:
+.LBE58:
+.LBB59:
+	.loc 1 124 0
+#APP
+// 124 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x19]
+	mov	w1, 65537
+	str	w1, [x0, 32]
+.LBE59:
+	.loc 1 126 0
+	mov	w1, 2
+	mov	x0, x19
+	bl	rockchip_secure_otp_wait_status.isra.1
+.LVL32:
+	.loc 1 127 0
+	tbz	w0, #31, .L10
+	.loc 1 128 0
+	adrp	x1, .LANCHOR1
+	adrp	x0, .LC3
+.LVL33:
+	add	x1, x1, :lo12:.LANCHOR1
+	add	x0, x0, :lo12:.LC3
+	bl	printf
+.LVL34:
+.L10:
+.LBE54:
+.LBE53:
+.LBB60:
+	.loc 1 150 0
+#APP
+// 150 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x19]
+	mov	w25, 65537
+	add	w26, w26, w20
+.LVL35:
+	str	w25, [x0, 256]
+.LBE60:
+	.loc 1 151 0
+	mov	x0, 50
+	bl	udelay
+.LVL36:
+.L11:
+	.loc 1 152 0
+	cmp	w20, w26
+	bne	.L18
+	mov	w22, 0
+	b	.L15
+.L18:
+	.loc 1 154 0
+	cmp	w20, 448
+	bgt	.L19
+	.loc 1 157 0
+	sub	w1, w20, #16
+	cmp	w20, 0
+	mov	w0, w20
+	ccmp	w1, 31, 0, ne
+	bls	.L13
+.LVL37:
+	.loc 1 157 0 is_stmt 0 discriminator 1
+	sub	w1, w20, #128
+	cmp	w1, 263
+	bls	.L13
+	.loc 1 160 0 is_stmt 1
+	adrp	x0, .LC4
+.LVL38:
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+.LVL39:
+.L19:
+	.loc 1 155 0
+	mov	w22, -1
+	b	.L9
+.LVL40:
+.L13:
+.LBB61:
+	.loc 1 164 0
+	add	w20, w20, 1
+.LVL41:
+	orr	w0, w0, -65536
+.LVL42:
+#APP
+// 164 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x1, [x19]
+	str	w0, [x1, 260]
+.LVL43:
+.LBE61:
+.LBB62:
+	.loc 1 166 0
+#APP
+// 166 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x19]
+.LVL44:
+.LBE62:
+	.loc 1 168 0
+	mov	w1, 4
+.LVL45:
+.LBB63:
+	.loc 1 166 0
+	str	w25, [x0, 264]
+.LVL46:
+.LBE63:
+	.loc 1 168 0
+	mov	x0, x19
+	bl	rockchip_secure_otp_wait_status.isra.1
+.LVL47:
+	mov	w22, w0
+.LVL48:
+	.loc 1 169 0
+	tbz	w0, #31, .L14
+	.loc 1 170 0
+	adrp	x1, .LANCHOR2
+	adrp	x0, .LC5
+.LVL49:
+	add	x1, x1, :lo12:.LANCHOR2
+	add	x0, x0, :lo12:.LC5
+	bl	printf
+.LVL50:
+.L15:
+.LBB64:
+	.loc 1 187 0
+#APP
+// 187 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x19]
+	mov	w1, 65536
+	str	w1, [x0, 256]
+.LVL51:
+.LBE64:
+.LBB65:
+	.loc 1 188 0
+#APP
+// 188 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x19, 8]
+	mov	w1, 262144
+	str	w1, [x0]
+.LVL52:
+.L9:
+.LBE65:
+	.loc 1 191 0
+	mov	w0, w22
+	ldp	x19, x20, [sp, 16]
+.LVL53:
+	ldp	x21, x22, [sp, 32]
+.LVL54:
+	ldp	x23, x24, [sp, 48]
+.LVL55:
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL56:
+.L14:
+	.cfi_restore_state
+.LBB66:
+	.loc 1 174 0
+	ldr	x0, [x19]
+.LVL57:
+	ldrb	w2, [x0, 292]
+	and	w2, w2, 255
+.LVL58:
+#APP
+// 174 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+.LVL59:
+#NO_APP
+.LBE66:
+.LBB67:
+	.loc 1 175 0
+	ldr	x0, [x19]
+	ldrb	w0, [x0, 288]
+	and	w0, w0, 255
+.LVL60:
+#APP
+// 175 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+.LVL61:
+#NO_APP
+.LBE67:
+.LBB68:
+.LBB69:
+	.loc 1 35 0
+	bfi	w21, w2, 0, 8
+	.loc 1 36 0
+	bfi	w24, w0, 0, 8
+	.loc 1 37 0
+	and	w0, w21, 1
+.LVL62:
+	ubfx	x5, x21, 3, 1
+	ubfx	x3, x21, 4, 1
+	ubfx	x8, x21, 1, 1
+	eor	w1, w0, w5
+	eor	w6, w8, w5
+	eor	w0, w0, w8
+	eor	w5, w5, w3
+	ubfx	x4, x21, 6, 1
+	eor	w0, w0, w5
+	eor	w7, w3, w4
+	eor	w0, w4, w0
+	and	w3, w24, 1
+	cmp	w3, w0
+	bne	.L16
+	.loc 1 38 0
+	ubfx	x3, x21, 2, 1
+	ubfx	x0, x21, 5, 1
+	eor	w4, w4, w3
+	eor	w1, w1, w4
+	ubfx	x4, x24, 1, 1
+	eor	w1, w0, w1
+	cmp	w4, w1
+	bne	.L16
+	.loc 1 39 0
+	ubfx	x1, x21, 7, 1
+	eor	w3, w3, w1
+	eor	w0, w0, w1
+	eor	w3, w6, w3
+	ubfx	x1, x24, 2, 1
+	cmp	w1, w3
+	bne	.L16
+	.loc 1 40 0
+	ubfx	x1, x24, 3, 1
+	eor	w0, w0, w7
+	cmp	w1, w0
+	beq	.L17
+.L16:
+.LVL63:
+.LBE69:
+.LBE68:
+	.loc 1 179 0
+	adrp	x0, .LC6
+	.loc 1 180 0
+	mov	w22, -1
+	.loc 1 179 0
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.LVL64:
+	.loc 1 180 0
+	b	.L15
+.LVL65:
+.L17:
+	.loc 1 183 0
+	strb	w2, [x23], 1
+.LVL66:
+	b	.L11
+	.cfi_endproc
+.LFE265:
+	.size	rockchip_secure_otp_read, .-rockchip_secure_otp_read
+	.section	.text.rockchip_secure_otp_write,"ax",@progbits
+	.align	2
+	.type	rockchip_secure_otp_write, %function
+rockchip_secure_otp_write:
+.LFB267:
+	.loc 1 344 0
+	.cfi_startproc
+.LVL67:
+	stp	x29, x30, [sp, -128]!
+	.cfi_def_cfa_offset 128
+	.cfi_offset 29, -128
+	.cfi_offset 30, -120
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -112
+	.cfi_offset 20, -104
+	mov	w19, w1
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -96
+	.cfi_offset 22, -88
+	mov	x21, x0
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -80
+	.cfi_offset 24, -72
+	mov	w24, w3
+	stp	x27, x28, [sp, 80]
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 27, -48
+	.cfi_offset 28, -40
+	.cfi_offset 25, -64
+	.cfi_offset 26, -56
+	.loc 1 344 0
+	str	x2, [x29, 112]
+	.loc 1 345 0
+	bl	dev_get_platdata
+.LVL68:
+	mov	x27, x0
+.LVL69:
+	.loc 1 347 0
+	sxtw	x0, w24
+.LVL70:
+	bl	malloc_simple
+.LVL71:
+	.loc 1 350 0
+	cbnz	x0, .L22
+.LVL72:
+.L51:
+.LBB143:
+.LBB144:
+	.loc 1 206 0
+	mov	w26, -1
+.L21:
+.LBE144:
+.LBE143:
+	.loc 1 377 0
+	mov	w0, w26
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+.LVL73:
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+.LVL74:
+	ldp	x29, x30, [sp], 128
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+.LVL75:
+	ret
+.LVL76:
+.L22:
+	.cfi_restore_state
+	mov	x20, x0
+	.loc 1 353 0
+	mov	x2, x0
+	mov	w3, w24
+	mov	w1, w19
+	mov	x0, x21
+.LVL77:
+	bl	rockchip_secure_otp_read
+.LVL78:
+	.loc 1 354 0
+	cbnz	w0, .L51
+	mov	x0, 0
+.LVL79:
+.L26:
+	.loc 1 359 0 discriminator 1
+	cmp	w24, w0
+	bgt	.L27
+.LBB227:
+.LBB222:
+	.loc 1 308 0
+	adrp	x20, .LANCHOR3
+.LVL80:
+	add	x20, x20, :lo12:.LANCHOR3
+.LBE222:
+.LBE227:
+	.loc 1 359 0
+	mov	x23, 0
+.LVL81:
+.L28:
+	.loc 1 369 0 discriminator 1
+	cmp	w24, w23
+	bgt	.L44
+	mov	w26, 0
+	b	.L21
+.LVL82:
+.L27:
+	add	x0, x0, 1
+.LVL83:
+	.loc 1 360 0
+	add	x1, x20, x0
+	ldrb	w1, [x1, -1]
+	cbz	w1, .L26
+	.loc 1 361 0
+	adrp	x0, .LC7
+	add	x0, x0, :lo12:.LC7
+.LVL84:
+.L52:
+.LBB228:
+.LBB223:
+	.loc 1 206 0
+	bl	printf
+.LVL85:
+	b	.L51
+.LVL86:
+.L44:
+.LBE223:
+.LBE228:
+	.loc 1 370 0
+	ldr	x0, [x29, 112]
+.LBB229:
+.LBB224:
+	.loc 1 199 0
+	cmp	w19, 448
+.LBE224:
+.LBE229:
+	.loc 1 370 0
+	ldrb	w28, [x0, x23]
+.LVL87:
+.LBB230:
+.LBB225:
+	.loc 1 199 0
+	bgt	.L51
+	.loc 1 203 0
+	sub	w0, w19, #16
+	cmp	w19, 0
+	ccmp	w0, 31, 0, ne
+	bls	.L29
+	sub	w0, w19, #128
+	cmp	w0, 263
+	bls	.L29
+	.loc 1 206 0
+	adrp	x0, .LC4
+	add	x0, x0, :lo12:.LC4
+	b	.L52
+.L29:
+	.loc 1 210 0
+	cbnz	w28, .L30
+.LVL88:
+.L43:
+	add	x23, x23, 1
+	add	w19, w19, 1
+.LVL89:
+	b	.L28
+.LVL90:
+.L30:
+.LBB145:
+	.loc 1 213 0
+#APP
+// 213 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	mov	x1, 1044
+	mov	w0, 1048592
+	movk	x1, 0xff50, lsl 16
+	str	w0, [x1]
+.LBE145:
+	.loc 1 214 0
+	mov	x0, 10
+	bl	udelay
+.LVL91:
+.LBB146:
+	.loc 1 215 0
+#APP
+// 215 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	mov	x1, 1044
+	mov	w0, 1048576
+	movk	x1, 0xff50, lsl 16
+	str	w0, [x1]
+.LBE146:
+	.loc 1 216 0
+	mov	x0, 10
+	bl	udelay
+.LVL92:
+.LBB147:
+	.loc 1 218 0
+#APP
+// 218 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	mov	w0, 16
+	ldr	x1, [x27, 16]
+	sdiv	w0, w19, w0
+	lsl	w0, w0, 2
+	sxtw	x0, w0
+	str	x0, [x29, 120]
+	mov	w0, -65536
+	ldr	x2, [x29, 120]
+	str	w0, [x2, x1]
+.LVL93:
+.LBE147:
+.LBB148:
+	.loc 1 221 0
+#APP
+// 221 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x2, [x27, 8]
+	mov	w1, 262148
+	str	w1, [x2]
+.LVL94:
+.LBE148:
+.LBB149:
+	.loc 1 222 0
+#APP
+// 222 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x2, [x27]
+	str	w1, [x2, 32]
+.LVL95:
+.LBE149:
+.LBB150:
+	.loc 1 223 0
+#APP
+// 223 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x1, [x27]
+	str	w0, [x1, 40]
+.LVL96:
+.LBE150:
+.LBB151:
+	.loc 1 224 0
+#APP
+// 224 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 512
+	movk	w1, 0xff00, lsl 16
+	str	w1, [x0, 32]
+.LVL97:
+.LBE151:
+.LBB152:
+	.loc 1 225 0
+#APP
+// 225 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, -65522
+	str	w1, [x0, 36]
+.LVL98:
+.LBE152:
+.LBB153:
+	.loc 1 226 0
+#APP
+// 226 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w3, 240
+	str	w3, [x29, 108]
+.LVL99:
+	str	w3, [x0, 4096]
+.LBE153:
+.LBB154:
+	.loc 1 227 0
+#APP
+// 227 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w25, 1
+	str	w25, [x0, 4100]
+.LVL100:
+.LBE154:
+.LBB155:
+	.loc 1 228 0
+#APP
+// 228 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w21, 122
+	str	w21, [x0, 4104]
+.LVL101:
+.LBE155:
+.LBB156:
+	.loc 1 229 0
+#APP
+// 229 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 37
+	str	w1, [x0, 4108]
+.LVL102:
+.LBE156:
+.LBB157:
+	.loc 1 230 0
+#APP
+// 230 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 4
+	str	w1, [x0, 4112]
+.LVL103:
+.LBE157:
+.LBB158:
+	.loc 1 231 0
+#APP
+// 231 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	wzr, [x0, 4116]
+.LVL104:
+.LBE158:
+.LBB159:
+	.loc 1 232 0
+#APP
+// 232 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	wzr, [x0, 4120]
+.LVL105:
+.LBE159:
+.LBB160:
+	.loc 1 233 0
+#APP
+// 233 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	wzr, [x0, 4124]
+.LVL106:
+.LBE160:
+.LBB161:
+	.loc 1 234 0
+#APP
+// 234 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 11
+	str	w1, [x0, 4128]
+.LVL107:
+.LBE161:
+.LBB162:
+	.loc 1 235 0
+#APP
+// 235 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 8
+	str	w1, [x0, 4132]
+.LVL108:
+.LBE162:
+.LBB163:
+	.loc 1 236 0
+#APP
+// 236 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	wzr, [x0, 4136]
+.LVL109:
+.LBE163:
+.LBB164:
+	.loc 1 237 0
+#APP
+// 237 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	wzr, [x0, 4140]
+.LVL110:
+.LBE164:
+.LBB165:
+	.loc 1 238 0
+#APP
+// 238 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	wzr, [x0, 4144]
+.LBE165:
+.LBB166:
+	.loc 1 239 0
+	and	w0, w19, 255
+#APP
+// 239 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x1, [x27]
+	str	w0, [x1, 4148]
+.LBE166:
+.LBB167:
+	.loc 1 240 0
+	ubfx	x1, x19, 8, 8
+.LVL111:
+#APP
+// 240 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	w1, [x0, 4152]
+.LVL112:
+.LBE167:
+.LBB168:
+	.loc 1 241 0
+#APP
+// 241 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w22, 65537
+.LBE168:
+	.loc 1 242 0
+	mov	w1, 2
+.LVL113:
+.LBB169:
+	.loc 1 241 0
+	str	w22, [x0, 32]
+.LVL114:
+.LBE169:
+	.loc 1 242 0
+	mov	x0, x27
+	bl	rockchip_secure_otp_wait_status.isra.1
+.LVL115:
+	mov	w26, w0
+.LVL116:
+	.loc 1 243 0
+	ldr	w3, [x29, 108]
+	tbz	w0, #31, .L31
+	.loc 1 244 0
+	adrp	x0, .LC8
+.LVL117:
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC8
+.L50:
+	.loc 1 267 0
+	bl	printf
+.LVL118:
+.L32:
+.LBB170:
+	.loc 1 335 0
+#APP
+// 335 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, -65533
+	str	w1, [x0, 772]
+.LVL119:
+.LBE170:
+.LBB171:
+	.loc 1 336 0
+#APP
+// 336 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27, 8]
+	mov	w1, 262144
+	str	w1, [x0]
+.LVL120:
+.LBE171:
+.LBB172:
+	.loc 1 337 0
+#APP
+// 337 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27, 16]
+	mov	w1, -1
+	ldr	x2, [x29, 120]
+	str	w1, [x2, x0]
+.LVL121:
+.LBE172:
+.LBE225:
+.LBE230:
+	.loc 1 371 0
+	cbz	w26, .L43
+	b	.L21
+.LVL122:
+.L31:
+.LBB231:
+.LBB226:
+.LBB173:
+	.loc 1 248 0
+#APP
+// 248 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LVL123:
+	mov	w1, 14848
+	movk	w1, 0xff00, lsl 16
+	str	w1, [x0, 32]
+.LVL124:
+.LBE173:
+.LBB174:
+	.loc 1 249 0
+#APP
+// 249 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	w3, [x0, 4096]
+.LVL125:
+.LBE174:
+.LBB175:
+	.loc 1 250 0
+#APP
+// 250 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	w25, [x0, 4100]
+.LVL126:
+.LBE175:
+.LBB176:
+	.loc 1 251 0
+#APP
+// 251 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	w21, [x0, 4104]
+.LVL127:
+.LBE176:
+.LBB177:
+	.loc 1 252 0
+#APP
+// 252 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 21
+	str	w1, [x0, 4108]
+.LVL128:
+.LBE177:
+.LBB178:
+	.loc 1 253 0
+#APP
+// 253 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 220
+	str	w1, [x0, 4112]
+.LVL129:
+.LBE178:
+.LBB179:
+	.loc 1 254 0
+#APP
+// 254 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 146
+	str	w1, [x0, 4116]
+.LVL130:
+.LBE179:
+.LBB180:
+	.loc 1 255 0
+#APP
+// 255 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 121
+	str	w1, [x0, 4120]
+.LVL131:
+.LBE180:
+.LBB181:
+	.loc 1 256 0
+#APP
+// 256 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 129
+	str	w1, [x0, 4124]
+.LVL132:
+.LBE181:
+.LBB182:
+	.loc 1 257 0
+#APP
+// 257 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 126
+	str	w1, [x0, 4128]
+.LVL133:
+.LBE182:
+.LBB183:
+	.loc 1 258 0
+#APP
+// 258 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 33
+	str	w1, [x0, 4132]
+.LVL134:
+.LBE183:
+.LBB184:
+	.loc 1 259 0
+#APP
+// 259 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 17
+	str	w1, [x0, 4136]
+.LVL135:
+.LBE184:
+.LBB185:
+	.loc 1 260 0
+#APP
+// 260 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 157
+	str	w1, [x0, 4140]
+.LVL136:
+.LBE185:
+.LBB186:
+	.loc 1 261 0
+#APP
+// 261 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w21, 2
+	str	w21, [x0, 4144]
+.LVL137:
+.LBE186:
+.LBB187:
+	.loc 1 262 0
+#APP
+// 262 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	wzr, [x0, 4148]
+.LVL138:
+.LBE187:
+.LBB188:
+	.loc 1 263 0
+#APP
+// 263 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	wzr, [x0, 4152]
+.LVL139:
+.LBE188:
+.LBB189:
+	.loc 1 264 0
+#APP
+// 264 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LBE189:
+	.loc 1 265 0
+	mov	w1, w21
+.LBB190:
+	.loc 1 264 0
+	str	w22, [x0, 32]
+.LBE190:
+	.loc 1 265 0
+	mov	x0, x27
+	bl	rockchip_secure_otp_wait_status.isra.1
+.LVL140:
+	mov	w26, w0
+.LVL141:
+	.loc 1 266 0
+	tbz	w0, #31, .L33
+	.loc 1 267 0
+	adrp	x0, .LC9
+.LVL142:
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC9
+	b	.L50
+.LVL143:
+.L33:
+.LBB191:
+	.loc 1 271 0
+#APP
+// 271 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LVL144:
+	mov	w1, 512
+	movk	w1, 0xff00, lsl 16
+	str	w1, [x0, 32]
+.LVL145:
+.LBE191:
+.LBB192:
+	.loc 1 272 0
+#APP
+// 272 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, -65535
+	str	w1, [x0, 36]
+.LVL146:
+.LBE192:
+.LBB193:
+	.loc 1 273 0
+#APP
+// 273 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 251
+	str	w1, [x0, 4096]
+.LVL147:
+.LBE193:
+.LBB194:
+	.loc 1 274 0
+#APP
+// 274 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	wzr, [x0, 4100]
+.LVL148:
+.LBE194:
+.LBB195:
+	.loc 1 275 0
+#APP
+// 275 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LBE195:
+	.loc 1 276 0
+	mov	w1, w21
+.LBB196:
+	.loc 1 275 0
+	str	w22, [x0, 32]
+.LBE196:
+	.loc 1 276 0
+	mov	x0, x27
+	bl	rockchip_secure_otp_wait_status.isra.1
+.LVL149:
+	mov	w26, w0
+.LVL150:
+	.loc 1 277 0
+	tbz	w0, #31, .L34
+	.loc 1 278 0
+	adrp	x0, .LC10
+.LVL151:
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC10
+	b	.L50
+.LVL152:
+.L34:
+.LBB197:
+	.loc 1 282 0
+#APP
+// 282 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LVL153:
+	mov	w1, 192
+	str	w1, [x0, 4096]
+.LVL154:
+.LBE197:
+.LBB198:
+	.loc 1 283 0
+#APP
+// 283 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	w28, [x0, 4100]
+.LVL155:
+.LBE198:
+.LBB199:
+	.loc 1 284 0
+#APP
+// 284 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LBE199:
+	.loc 1 285 0
+	mov	w1, w21
+.LBB200:
+	.loc 1 284 0
+	str	w22, [x0, 32]
+.LBE200:
+	.loc 1 285 0
+	mov	x0, x27
+	bl	rockchip_secure_otp_wait_status.isra.1
+.LVL156:
+	mov	w26, w0
+.LVL157:
+	.loc 1 286 0
+	tbz	w0, #31, .L35
+	.loc 1 287 0
+	adrp	x0, .LC11
+.LVL158:
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC11
+	b	.L50
+.LVL159:
+.L35:
+.LBB201:
+	.loc 1 291 0
+#APP
+// 291 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LVL160:
+	mov	w1, 14848
+	movk	w1, 0xff00, lsl 16
+	str	w1, [x0, 32]
+.LVL161:
+.LBE201:
+.LBB202:
+	.loc 1 292 0
+#APP
+// 292 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 255
+	str	w1, [x0, 4096]
+.LVL162:
+.LBE202:
+.LBB203:
+	.loc 1 293 0
+#APP
+// 293 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 10
+	str	w1, [x0, 4100]
+.LVL163:
+.LBE203:
+.LBB204:
+	.loc 1 294 0
+#APP
+// 294 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LBE204:
+	.loc 1 295 0
+	mov	w1, w21
+.LBB205:
+	.loc 1 294 0
+	str	w22, [x0, 32]
+.LBE205:
+	.loc 1 295 0
+	mov	x0, x27
+	bl	rockchip_secure_otp_wait_status.isra.1
+.LVL164:
+	mov	w26, w0
+.LVL165:
+	.loc 1 296 0
+	tbz	w0, #31, .L36
+	.loc 1 297 0
+	adrp	x0, .LC12
+.LVL166:
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC12
+	b	.L50
+.LVL167:
+.L36:
+.LBB206:
+	.loc 1 301 0
+#APP
+// 301 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LVL168:
+	mov	w1, -65534
+	str	w1, [x0, 36]
+.LVL169:
+.LBE206:
+.LBB207:
+	.loc 1 302 0
+#APP
+// 302 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	w25, [x0, 4096]
+.LVL170:
+.LBE207:
+.LBB208:
+	.loc 1 303 0
+#APP
+// 303 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 191
+	str	w1, [x0, 4100]
+.LVL171:
+.LBE208:
+.LBB209:
+	.loc 1 304 0
+#APP
+// 304 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	str	wzr, [x0, 4104]
+.LVL172:
+.LBE209:
+.LBB210:
+	.loc 1 305 0
+#APP
+// 305 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+.LBE210:
+	.loc 1 306 0
+	mov	w1, w21
+.LBB211:
+	.loc 1 305 0
+	str	w22, [x0, 32]
+.LBE211:
+	.loc 1 306 0
+	mov	x0, x27
+	bl	rockchip_secure_otp_wait_status.isra.1
+.LVL173:
+	mov	w26, w0
+.LVL174:
+	.loc 1 307 0
+	tbnz	w0, #31, .L37
+	mov	w21, 34465
+	movk	w21, 0x1, lsl 16
+.LVL175:
+.L38:
+.LBB212:
+.LBB213:
+.LBB214:
+	.loc 1 95 0
+	ldr	x0, [x27]
+	ldr	w0, [x0, 44]
+.LVL176:
+#APP
+// 95 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+.LVL177:
+#NO_APP
+.LBE214:
+	.loc 1 96 0
+	and	w26, w0, 16
+	tbz	x0, 4, .L39
+	.loc 1 99 0
+	subs	w21, w21, #1
+.LVL178:
+	beq	.L40
+.LVL179:
+	.loc 1 105 0
+	mov	x0, 1
+.LVL180:
+	bl	udelay
+.LVL181:
+	b	.L38
+.LVL182:
+.L37:
+.LBE213:
+.LBE212:
+	.loc 1 308 0
+	adrp	x0, .LC13
+.LVL183:
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC13
+	b	.L50
+.LVL184:
+.L45:
+	.loc 1 324 0
+	mov	x1, x20
+	adrp	x0, .LC14
+.LVL185:
+	mov	w26, w21
+	add	x0, x0, :lo12:.LC14
+	bl	printf
+.LVL186:
+	b	.L32
+.LVL187:
+.L40:
+	.loc 1 314 0
+	adrp	x0, .LC15
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC15
+.L49:
+	.loc 1 330 0
+	bl	printf
+.LVL188:
+	mov	w26, -1
+	b	.L32
+.LVL189:
+.L39:
+.LBB215:
+	.loc 1 318 0
+#APP
+// 318 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, -65534
+	str	w1, [x0, 36]
+.LVL190:
+.LBE215:
+.LBB216:
+	.loc 1 319 0
+#APP
+// 319 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w1, 2
+	str	w1, [x0, 4096]
+.LVL191:
+.LBE216:
+.LBB217:
+	.loc 1 320 0
+#APP
+// 320 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w3, 191
+	str	w3, [x0, 4100]
+.LVL192:
+.LBE217:
+.LBB218:
+	.loc 1 321 0
+#APP
+// 321 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+#NO_APP
+	ldr	x0, [x27]
+	mov	w3, 65537
+	str	w3, [x0, 32]
+.LBE218:
+	.loc 1 322 0
+	mov	x0, x27
+	bl	rockchip_secure_otp_wait_status.isra.1
+.LVL193:
+	mov	w21, w0
+.LVL194:
+	.loc 1 323 0
+	tbnz	w0, #31, .L45
+	mov	w21, 20001
+.LVL195:
+.L42:
+.LBB219:
+.LBB220:
+.LBB221:
+	.loc 1 73 0
+	ldr	x0, [x27]
+	ldr	w0, [x0, 44]
+.LVL196:
+#APP
+// 73 "drivers/misc/rockchip-secure-otp.c" 1
+	dmb sy
+// 0 "" 2
+.LVL197:
+#NO_APP
+.LBE221:
+	.loc 1 74 0
+	tbnz	x0, 4, .L32
+	.loc 1 77 0
+	subs	w21, w21, #1
+.LVL198:
+	beq	.L41
+	.loc 1 82 0
+	mov	x0, 1
+.LVL199:
+	bl	udelay
+.LVL200:
+	b	.L42
+.LVL201:
+.L41:
+.LBE220:
+.LBE219:
+	.loc 1 330 0
+	adrp	x0, .LC16
+	mov	x1, x20
+	add	x0, x0, :lo12:.LC16
+	b	.L49
+.LBE226:
+.LBE231:
+	.cfi_endproc
+.LFE267:
+	.size	rockchip_secure_otp_write, .-rockchip_secure_otp_write
+	.global	_u_boot_list_2_driver_2_rockchip_secure_otp
+	.section	.rodata.__func__.7183,"a",@progbits
+	.align	3
+	.set	.LANCHOR0,. + 0
+	.type	__func__.7183, %object
+	.size	__func__.7183, 32
+__func__.7183:
+	.string	"rockchip_secure_otp_wait_status"
+	.section	.rodata.__func__.7226,"a",@progbits
+	.align	3
+	.set	.LANCHOR1,. + 0
+	.type	__func__.7226, %object
+	.size	__func__.7226, 31
+__func__.7226:
+	.string	"rockchip_secure_otp_ecc_enable"
+	.section	.rodata.__func__.7251,"a",@progbits
+	.align	3
+	.set	.LANCHOR2,. + 0
+	.type	__func__.7251, %object
+	.size	__func__.7251, 25
+__func__.7251:
+	.string	"rockchip_secure_otp_read"
+	.section	.rodata.__func__.7318,"a",@progbits
+	.align	3
+	.set	.LANCHOR3,. + 0
+	.type	__func__.7318, %object
+	.size	__func__.7318, 31
+__func__.7318:
+	.string	"rockchip_secure_otp_write_byte"
+	.section	.rodata.rockchip_otp_ids,"a",@progbits
+	.align	3
+	.type	rockchip_otp_ids, %object
+	.size	rockchip_otp_ids, 32
+rockchip_otp_ids:
+	.xword	.LC18
+	.zero	8
+	.zero	16
+	.section	.rodata.rockchip_secure_otp_ofdata_to_platdata.str1.1,"aMS",@progbits,1
+.LC0:
+	.string	"secure_conf"
+.LC1:
+	.string	"mask_addr"
+	.section	.rodata.rockchip_secure_otp_ops,"a",@progbits
+	.align	3
+	.type	rockchip_secure_otp_ops, %object
+	.size	rockchip_secure_otp_ops, 32
+rockchip_secure_otp_ops:
+	.xword	rockchip_secure_otp_read
+	.xword	rockchip_secure_otp_write
+	.zero	16
+	.section	.rodata.rockchip_secure_otp_read.str1.1,"aMS",@progbits,1
+.LC3:
+	.string	"%s timeout during ecc_enable\n"
+.LC4:
+	.string	"Please input correct addr\n"
+.LC5:
+	.string	"%s timeout during read setup\n"
+.LC6:
+	.string	"OTP ecc check error!\n"
+	.section	.rodata.rockchip_secure_otp_wait_status.isra.1.str1.1,"aMS",@progbits,1
+.LC2:
+	.string	"%s: wait init status timeout\n"
+	.section	.rodata.rockchip_secure_otp_write.str1.1,"aMS",@progbits,1
+.LC7:
+	.string	"The zone is written.\n"
+.LC8:
+	.string	"%s timeout during write setup 1\n"
+.LC9:
+	.string	"%s timeout during write setup 2\n"
+.LC10:
+	.string	"%s timeout during write setup 3\n"
+.LC11:
+	.string	"%s timeout during write setup 4\n"
+.LC12:
+	.string	"%s timeout during write setup 5\n"
+.LC13:
+	.string	"%s timeout during write setup 6\n"
+.LC14:
+	.string	"%s timeout during write setup 8\n"
+.LC15:
+	.string	"%s timeout during write setup 7\n"
+.LC16:
+	.string	"%s timeout during write setup 9\n"
+	.section	.rodata.str1.1,"aMS",@progbits,1
+.LC17:
+	.string	"rockchip_secure_otp"
+.LC18:
+	.string	"rockchip,rk3308-secure-otp"
+	.section	.u_boot_list_2_driver_2_rockchip_secure_otp,"aw",@progbits
+	.align	2
+	.type	_u_boot_list_2_driver_2_rockchip_secure_otp, %object
+	.size	_u_boot_list_2_driver_2_rockchip_secure_otp, 120
+_u_boot_list_2_driver_2_rockchip_secure_otp:
+	.8byte	.LC17
+	.word	36
+	.zero	4
+	.8byte	rockchip_otp_ids
+	.zero	32
+	.8byte	rockchip_secure_otp_ofdata_to_platdata
+	.zero	28
+	.word	24
+	.zero	8
+	.8byte	rockchip_secure_otp_ops
+	.zero	8
+	.text
+.Letext0:
+	.file 2 "include/common.h"
+	.file 3 "./arch/arm/include/asm/types.h"
+	.file 4 "include/linux/types.h"
+	.file 5 "include/errno.h"
+	.file 6 "include/linux/string.h"
+	.file 7 "include/efi.h"
+	.file 8 "include/dm/device.h"
+	.file 9 "include/ide.h"
+	.file 10 "include/linux/list.h"
+	.file 11 "include/part.h"
+	.file 12 "include/flash.h"
+	.file 13 "include/lmb.h"
+	.file 14 "include/asm-generic/u-boot.h"
+	.file 15 "./arch/arm/include/asm/u-boot-arm.h"
+	.file 16 "include/linux/libfdt_env.h"
+	.file 17 "include/linux/../../scripts/dtc/libfdt/fdt.h"
+	.file 18 "include/linux/libfdt.h"
+	.file 19 "include/image.h"
+	.file 20 "./arch/arm/include/asm/global_data.h"
+	.file 21 "include/asm-generic/global_data.h"
+	.file 22 "include/dm/of.h"
+	.file 23 "include/net.h"
+	.file 24 "include/dm/uclass-id.h"
+	.file 25 "include/dm/ofnode.h"
+	.file 26 "include/malloc.h"
+	.file 27 "include/linux/compat.h"
+	.file 28 "include/dm/uclass.h"
+	.file 29 "include/misc.h"
+	.file 30 "include/rockchip-otp.h"
+	.file 31 "include/dm/read.h"
+	.file 32 "include/linux/delay.h"
+	.file 33 "include/stdio.h"
+	.file 34 "include/log.h"
+	.section	.debug_info,"",@progbits
+.Ldebug_info0:
+	.4byte	0x2ec0
+	.2byte	0x4
+	.4byte	.Ldebug_abbrev0
+	.byte	0x8
+	.uleb128 0x1
+	.4byte	.LASF414
+	.byte	0xc
+	.4byte	.LASF415
+	.4byte	.LASF416
+	.4byte	.Ldebug_ranges0+0x1c0
+	.8byte	0
+	.4byte	.Ldebug_line0
+	.uleb128 0x2
+	.4byte	.LASF4
+	.byte	0x2
+	.byte	0xd
+	.4byte	0x34
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x8
+	.4byte	.LASF0
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF1
+	.uleb128 0x3
+	.byte	0x2
+	.byte	0x7
+	.4byte	.LASF2
+	.uleb128 0x4
+	.4byte	.LASF21
+	.byte	0x5
+	.byte	0xc
+	.4byte	0x54
+	.uleb128 0x5
+	.byte	0x4
+	.byte	0x5
+	.string	"int"
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x6
+	.4byte	.LASF3
+	.uleb128 0x2
+	.4byte	.LASF5
+	.byte	0x3
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+	.uleb128 0x3
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+	.uleb128 0x2
+	.4byte	.LASF7
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+	.4byte	.LASF8
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+	.4byte	.LASF9
+	.uleb128 0x3
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+	.4byte	.LASF10
+	.uleb128 0x6
+	.string	"u8"
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+	.byte	0x1f
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+	.uleb128 0x7
+	.4byte	0x94
+	.uleb128 0x6
+	.string	"u32"
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+	.4byte	0x7f
+	.uleb128 0x2
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+	.4byte	0x8d
+	.uleb128 0x2
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+	.4byte	0x8d
+	.uleb128 0x3
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+	.4byte	.LASF13
+	.uleb128 0x8
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+	.4byte	0xd8
+	.uleb128 0x3
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+	.4byte	.LASF14
+	.uleb128 0x7
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+	.uleb128 0x3
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+	.4byte	.LASF15
+	.uleb128 0x8
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+	.4byte	0xd1
+	.uleb128 0x2
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+	.uleb128 0xe
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+	.uleb128 0xe
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+	.uleb128 0xf
+	.string	"seq"
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+	.uleb128 0x25
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+	.uleb128 0x25
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+	.uleb128 0x25
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+	.uleb128 0x25
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+	.byte	0x3f
+	.uleb128 0x25
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+	.uleb128 0x25
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+	.uleb128 0x25
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+	.uleb128 0x25
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+	.uleb128 0x25
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+	.uleb128 0x25
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+	.uleb128 0x25
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+	.uleb128 0x25
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+	.byte	0x4f
+	.uleb128 0x25
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+	.uleb128 0x25
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+	.uleb128 0x25
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+	.uleb128 0x25
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+	.uleb128 0x25
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+	.uleb128 0x25
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+	.uleb128 0x26
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+	.sleb128 -1
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+	.4byte	0xbb4
+	.uleb128 0x25
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+	.uleb128 0xd
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+	.byte	0x14
+	.byte	0x22
+	.4byte	0x3b
+	.byte	0
+	.uleb128 0xf
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+	.4byte	0x7f
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+	.uleb128 0xf
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+	.uleb128 0xe
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+	.uleb128 0xe
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+	.uleb128 0xe
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+	.uleb128 0xe
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+	.byte	0x2b
+	.4byte	0x3b
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+	.uleb128 0xe
+	.4byte	.LASF254
+	.byte	0x14
+	.byte	0x2c
+	.4byte	0x3b
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+	.byte	0
+	.uleb128 0xd
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+	.byte	0x15
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+	.4byte	0xc69
+	.uleb128 0xe
+	.4byte	.LASF256
+	.byte	0x15
+	.byte	0x23
+	.4byte	0xa3
+	.byte	0
+	.uleb128 0xf
+	.string	"id"
+	.byte	0x15
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+	.4byte	0xa3
+	.byte	0x4
+	.uleb128 0xe
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+	.byte	0x25
+	.4byte	0xa3
+	.byte	0x8
+	.uleb128 0xe
+	.4byte	.LASF258
+	.byte	0x15
+	.byte	0x26
+	.4byte	0xf5
+	.byte	0x10
+	.byte	0
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+	.4byte	.LASF259
+	.2byte	0x190
+	.byte	0x15
+	.byte	0x29
+	.4byte	0xe46
+	.uleb128 0xf
+	.string	"bd"
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+	.byte	0x2a
+	.4byte	0x95c
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF42
+	.byte	0x15
+	.byte	0x2b
+	.4byte	0x3b
+	.byte	0x8
+	.uleb128 0xe
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+	.byte	0x15
+	.byte	0x2c
+	.4byte	0x7f
+	.byte	0x10
+	.uleb128 0xe
+	.4byte	.LASF260
+	.byte	0x15
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+	.uleb128 0xe
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+	.uleb128 0xe
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+	.uleb128 0xe
+	.4byte	.LASF264
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+	.uleb128 0xe
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+	.uleb128 0xe
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+	.uleb128 0xf
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+	.uleb128 0xe
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+	.uleb128 0x15
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+	.uleb128 0x15
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+	.uleb128 0x8
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+	.uleb128 0xd
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+	.byte	0x2c
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+	.byte	0x2d
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+	.4byte	0xedf
+	.uleb128 0x4
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+	.uleb128 0xc
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+	.uleb128 0xa
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+	.uleb128 0x25
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+	.byte	0x78
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+	.4byte	0x11ee
+	.uleb128 0xe
+	.4byte	.LASF28
+	.byte	0x8
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+	.uleb128 0x2a
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+	.uleb128 0x2c
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+	.uleb128 0x2d
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+	.byte	0x35
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+	.byte	0x8
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+	.uleb128 0xc
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+	.byte	0x1a
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+	.uleb128 0xc
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+	.byte	0x1a
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+	.4byte	0xf5
+	.uleb128 0xd
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+	.byte	0x4
+	.byte	0x1b
+	.byte	0xd
+	.4byte	0x12c1
+	.uleb128 0xf
+	.string	"pid"
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+	.byte	0xe
+	.4byte	0x54
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+	.byte	0
+	.uleb128 0x4
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+	.byte	0x1b
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+	.byte	0x8
+	.4byte	0x12a8
+	.uleb128 0x8
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+	.4byte	0x11ee
+	.uleb128 0xd
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+	.byte	0x30
+	.byte	0x1c
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+	.4byte	0x1315
+	.uleb128 0xe
+	.4byte	.LASF35
+	.byte	0x1c
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+	.uleb128 0xe
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+	.byte	0x1c
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+	.uleb128 0xe
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+	.4byte	0xcb
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+	.uleb128 0xe
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+	.uleb128 0xe
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+	.uleb128 0xe
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+	.uleb128 0xe
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+	.4byte	0x1444
+	.byte	0x48
+	.uleb128 0xe
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+	.byte	0x1c
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+	.uleb128 0xe
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+	.byte	0x68
+	.uleb128 0xf
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+	.4byte	0x14ce
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+	.uleb128 0xe
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+	.byte	0x1d
+	.byte	0x61
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+	.byte	0x10
+	.uleb128 0xe
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+	.uleb128 0x13
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+	.uleb128 0x8
+	.byte	0x8
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+	.uleb128 0xd
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+	.byte	0x1e
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+	.4byte	0x1552
+	.uleb128 0xe
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+	.uleb128 0xe
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+	.4byte	0x3b
+	.byte	0x8
+	.uleb128 0xe
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+	.4byte	0x3b
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+	.4byte	0x15cb
+	.uleb128 0x2e
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+	.byte	0x4
+	.byte	0x1
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x2e
+	.string	"b1"
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+	.byte	0x15
+	.4byte	0x7f
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1e
+	.byte	0
+	.uleb128 0x2e
+	.string	"b2"
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+	.4byte	0x7f
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1d
+	.byte	0
+	.uleb128 0x2e
+	.string	"b3"
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+	.4byte	0x7f
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x2e
+	.string	"b4"
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+	.byte	0x18
+	.4byte	0x7f
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1b
+	.byte	0
+	.uleb128 0x2e
+	.string	"b5"
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+	.byte	0x19
+	.4byte	0x7f
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1a
+	.byte	0
+	.uleb128 0x2e
+	.string	"b6"
+	.byte	0x1
+	.byte	0x1a
+	.4byte	0x7f
+	.byte	0x4
+	.byte	0x1
+	.byte	0x19
+	.byte	0
+	.uleb128 0x2e
+	.string	"b7"
+	.byte	0x1
+	.byte	0x1b
+	.4byte	0x7f
+	.byte	0x4
+	.byte	0x1
+	.byte	0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x2b
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+	.byte	0x4
+	.byte	0x1
+	.byte	0xf
+	.4byte	0x15eb
+	.uleb128 0x2c
+	.string	"d8"
+	.byte	0x1
+	.byte	0x11
+	.4byte	0x94
+	.uleb128 0x2c
+	.string	"b"
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+	.byte	0x1c
+	.4byte	0x1552
+	.byte	0
+	.uleb128 0x2f
+	.4byte	.LASF388
+	.byte	0x1
+	.2byte	0x17b
+	.4byte	0x1487
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	rockchip_secure_otp_ops
+	.uleb128 0xa
+	.4byte	0x1340
+	.4byte	0x1611
+	.uleb128 0x11
+	.4byte	0xc4
+	.byte	0x1
+	.byte	0
+	.uleb128 0x7
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+	.uleb128 0x2f
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+	.4byte	0x1611
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	rockchip_otp_ids
+	.uleb128 0x30
+	.4byte	.LASF390
+	.byte	0x1
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+	.4byte	0x1116
+	.uleb128 0x9
+	.byte	0x3
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+	.uleb128 0x31
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+	.8byte	.LFE268-.LFB268
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x1705
+	.uleb128 0x32
+	.string	"dev"
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+	.2byte	0x180
+	.4byte	0x249
+	.4byte	.LLST0
+	.uleb128 0x33
+	.string	"otp"
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+	.4byte	0x1705
+	.4byte	.LLST1
+	.uleb128 0x34
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+	.4byte	0x169c
+	.uleb128 0x35
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.sleb128 0
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+	.uleb128 0x34
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+	.4byte	0x16b4
+	.uleb128 0x35
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.sleb128 0
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+	.uleb128 0x2
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+	.uleb128 0x9
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+	.uleb128 0x1
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+	.uleb128 0x2
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+	.uleb128 0x1
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+	.uleb128 0x1
+	.byte	0x9c
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+	.uleb128 0x32
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+	.4byte	0x249
+	.4byte	.LLST28
+	.uleb128 0x37
+	.4byte	.LASF393
+	.byte	0x1
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+	.4byte	0x2e6b
+	.uleb128 0x46
+	.4byte	0x2ce7
+	.uleb128 0x46
+	.4byte	0x2cdc
+	.uleb128 0x47
+	.8byte	.LBB29
+	.8byte	.LBE29-.LBB29
+	.uleb128 0x3e
+	.4byte	0x2cf2
+	.uleb128 0x3e
+	.4byte	0x2cfd
+	.uleb128 0x36
+	.8byte	.LVL18
+	.4byte	0x2eac
+	.uleb128 0x35
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC2
+	.uleb128 0x35
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL15
+	.4byte	0x2ea1
+	.uleb128 0x35
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x61
+	.4byte	.LASF408
+	.4byte	.LASF408
+	.byte	0x8
+	.2byte	0x112
+	.uleb128 0x62
+	.4byte	.LASF409
+	.4byte	.LASF409
+	.byte	0x1f
+	.byte	0x7b
+	.uleb128 0x62
+	.4byte	.LASF410
+	.4byte	.LASF410
+	.byte	0x1f
+	.byte	0x38
+	.uleb128 0x62
+	.4byte	.LASF411
+	.4byte	.LASF411
+	.byte	0x20
+	.byte	0xb
+	.uleb128 0x62
+	.4byte	.LASF412
+	.4byte	.LASF412
+	.byte	0x21
+	.byte	0x13
+	.uleb128 0x61
+	.4byte	.LASF413
+	.4byte	.LASF413
+	.byte	0x1a
+	.2byte	0x393
+	.byte	0
+	.section	.debug_abbrev,"",@progbits
+.Ldebug_abbrev0:
+	.uleb128 0x1
+	.uleb128 0x11
+	.byte	0x1
+	.uleb128 0x25
+	.uleb128 0xe
+	.uleb128 0x13
+	.uleb128 0xb
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x1b
+	.uleb128 0xe
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x10
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x2
+	.uleb128 0x16
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x24
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3e
+	.uleb128 0xb
+	.uleb128 0x3
+	.uleb128 0xe
+	.byte	0
+	.byte	0
+	.uleb128 0x4
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.byte	0
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+	.uleb128 0x5
+	.uleb128 0x24
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3e
+	.uleb128 0xb
+	.uleb128 0x3
+	.uleb128 0x8
+	.byte	0
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+	.uleb128 0x6
+	.uleb128 0x16
+	.byte	0
+	.uleb128 0x3
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+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
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+	.uleb128 0x7
+	.uleb128 0x26
+	.byte	0
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+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x8
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+	.uleb128 0xa
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+	.uleb128 0x13
+	.uleb128 0x1
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+	.byte	0
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0x21
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0xc
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.byte	0
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+	.uleb128 0xd
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
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+	.uleb128 0xb
+	.uleb128 0x3a
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+	.uleb128 0x3b
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+	.uleb128 0x3
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+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0xb
+	.byte	0
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+	.uleb128 0xf
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+	.uleb128 0x3a
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+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0xb
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+	.uleb128 0x10
+	.uleb128 0x26
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+	.uleb128 0x11
+	.uleb128 0x21
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2f
+	.uleb128 0xb
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+	.uleb128 0x12
+	.uleb128 0x15
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+	.uleb128 0x49
+	.uleb128 0x13
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+	.uleb128 0x14
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+	.uleb128 0x15
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+	.byte	0
+	.uleb128 0x3
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+	.uleb128 0x3a
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+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0x5
+	.byte	0
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+	.uleb128 0x16
+	.uleb128 0xd
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+	.uleb128 0x8
+	.uleb128 0x3a
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+	.uleb128 0x3b
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+	.uleb128 0x49
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+	.uleb128 0x38
+	.uleb128 0x5
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+	.uleb128 0x5
+	.byte	0
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+	.uleb128 0x18
+	.uleb128 0x13
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+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3c
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+	.uleb128 0x19
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
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+	.uleb128 0x5
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x1a
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0xb
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+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x1b
+	.uleb128 0x34
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+	.uleb128 0x3
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+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
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+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.byte	0
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+	.uleb128 0x1c
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3a
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+	.uleb128 0x3b
+	.uleb128 0xb
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+	.byte	0
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+	.uleb128 0x1d
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+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
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+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x1e
+	.uleb128 0xd
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+	.uleb128 0x3
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+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0xb
+	.byte	0
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+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
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+	.uleb128 0x20
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+	.uleb128 0x3b
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+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0xb
+	.byte	0
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+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
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+	.uleb128 0x5
+	.uleb128 0x3a
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+	.uleb128 0x3b
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+	.byte	0
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+	.byte	0
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+	.uleb128 0xd
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+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x38
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x39
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x52
+	.uleb128 0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0x5
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x3a
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x3b
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x3c
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x3d
+	.uleb128 0xa
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.byte	0
+	.byte	0
+	.uleb128 0x3e
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x40
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x1c
+	.uleb128 0x6
+	.byte	0
+	.byte	0
+	.uleb128 0x41
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x1c
+	.uleb128 0xd
+	.byte	0
+	.byte	0
+	.uleb128 0x42
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x1c
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x43
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0x5
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x47
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.byte	0
+	.byte	0
+	.uleb128 0x48
+	.uleb128 0x4109
+	.byte	0
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x410a
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2111
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x4a
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x20
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x4b
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x4c
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x4d
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x4e
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x34
+	.uleb128 0x19
+	.uleb128 0x1c
+	.uleb128 0xe
+	.byte	0
+	.byte	0
+	.uleb128 0x4f
+	.uleb128 0xa
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x50
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x51
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x52
+	.uleb128 0xb
+	.byte	0x1
+	.byte	0
+	.byte	0
+	.uleb128 0x53
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x54
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x55
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x56
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x57
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x58
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x1c
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x59
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x34
+	.uleb128 0x19
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x5a
+	.uleb128 0xa
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x11
+	.uleb128 0x1
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x1c
+	.uleb128 0x6
+	.byte	0
+	.byte	0
+	.uleb128 0x5c
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x5d
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x5e
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x20
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x5f
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x60
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x61
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x62
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.byte	0
+	.section	.debug_loc,"",@progbits
+.Ldebug_loc0:
+.LLST0:
+	.8byte	.LVL0
+	.8byte	.LVL1-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1-1
+	.8byte	.LVL7
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL7
+	.8byte	.LFE268
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST1:
+	.8byte	.LVL2
+	.8byte	.LVL3
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL3
+	.8byte	.LVL7
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST28:
+	.8byte	.LVL67
+	.8byte	.LVL68-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL68-1
+	.8byte	.LVL72
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL72
+	.8byte	.LVL76
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL76
+	.8byte	.LVL81
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL81
+	.8byte	.LVL82
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL82
+	.8byte	.LVL84
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL84
+	.8byte	.LFE267
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST29:
+	.8byte	.LVL67
+	.8byte	.LVL68-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL68-1
+	.8byte	.LVL72
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL72
+	.8byte	.LVL76
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL76
+	.8byte	.LVL81
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL81
+	.8byte	.LVL82
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL82
+	.8byte	.LVL84
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL84
+	.8byte	.LFE267
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST30:
+	.8byte	.LVL67
+	.8byte	.LVL68-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL68-1
+	.8byte	.LVL75
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 224
+	.8byte	.LVL75
+	.8byte	.LVL76
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 96
+	.8byte	.LVL76
+	.8byte	.LFE267
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 224
+	.8byte	0
+	.8byte	0
+.LLST31:
+	.8byte	.LVL67
+	.8byte	.LVL68-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL68-1
+	.8byte	.LVL73
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL73
+	.8byte	.LVL76
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL76
+	.8byte	.LFE267
+	.2byte	0x1
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST32:
+	.8byte	.LVL69
+	.8byte	.LVL70
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL70
+	.8byte	.LVL74
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL76
+	.8byte	.LFE267
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	0
+	.8byte	0
+.LLST33:
+	.8byte	.LVL69
+	.8byte	.LVL75
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 224
+	.8byte	.LVL75
+	.8byte	.LVL76
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 96
+	.8byte	.LVL76
+	.8byte	.LFE267
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 224
+	.8byte	0
+	.8byte	0
+.LLST34:
+	.8byte	.LVL71
+	.8byte	.LVL72
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL76
+	.8byte	.LVL77
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL77
+	.8byte	.LVL78-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL78-1
+	.8byte	.LVL80
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL82
+	.8byte	.LVL84
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST35:
+	.8byte	.LVL79
+	.8byte	.LVL81
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL81
+	.8byte	.LVL82
+	.2byte	0x7
+	.byte	0x83
+	.sleb128 0
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	.LVL82
+	.8byte	.LVL83
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL86
+	.8byte	.LVL88
+	.2byte	0x7
+	.byte	0x83
+	.sleb128 0
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	.LVL88
+	.8byte	.LVL89
+	.2byte	0x9
+	.byte	0x83
+	.sleb128 0
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x1c
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x9f
+	.8byte	.LVL89
+	.8byte	.LFE267
+	.2byte	0x7
+	.byte	0x83
+	.sleb128 0
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST36:
+	.8byte	.LVL71
+	.8byte	.LVL72
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL76
+	.8byte	.LVL78
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL78
+	.8byte	.LVL79
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL81
+	.8byte	.LVL82
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL86
+	.8byte	.LVL88
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL90
+	.8byte	.LVL121
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL122
+	.8byte	.LFE267
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST37:
+	.8byte	.LVL87
+	.8byte	.LVL88
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL90
+	.8byte	.LVL121
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL122
+	.8byte	.LFE267
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	0
+	.8byte	0
+.LLST38:
+	.8byte	.LVL87
+	.8byte	.LVL88
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL90
+	.8byte	.LVL121
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL122
+	.8byte	.LFE267
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST39:
+	.8byte	.LVL87
+	.8byte	.LVL88
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL90
+	.8byte	.LVL121
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL122
+	.8byte	.LFE267
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	0
+	.8byte	0
+.LLST40:
+	.8byte	.LVL87
+	.8byte	.LVL88
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL90
+	.8byte	.LVL116
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL116
+	.8byte	.LVL117
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL117
+	.8byte	.LVL121
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL122
+	.8byte	.LVL123
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL123
+	.8byte	.LVL141
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL141
+	.8byte	.LVL142
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL142
+	.8byte	.LVL143
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL143
+	.8byte	.LVL144
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL144
+	.8byte	.LVL150
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL150
+	.8byte	.LVL151
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL151
+	.8byte	.LVL152
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL152
+	.8byte	.LVL153
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL153
+	.8byte	.LVL157
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL157
+	.8byte	.LVL158
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL158
+	.8byte	.LVL159
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL159
+	.8byte	.LVL160
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL160
+	.8byte	.LVL165
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL165
+	.8byte	.LVL166
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL166
+	.8byte	.LVL167
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL167
+	.8byte	.LVL168
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL168
+	.8byte	.LVL174
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL174
+	.8byte	.LVL175
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL182
+	.8byte	.LVL183
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL183
+	.8byte	.LVL184
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL184
+	.8byte	.LVL185
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL185
+	.8byte	.LVL187
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL194
+	.8byte	.LVL195
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST41:
+	.8byte	.LVL111
+	.8byte	.LVL113
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL113
+	.8byte	.LVL114
+	.2byte	0x6
+	.byte	0x8b
+	.sleb128 0
+	.byte	0x6
+	.byte	0x23
+	.uleb128 0x1038
+	.8byte	.LVL114
+	.8byte	.LVL121
+	.2byte	0x6
+	.byte	0x83
+	.sleb128 0
+	.byte	0x9
+	.byte	0xf8
+	.byte	0x24
+	.byte	0x9f
+	.8byte	.LVL122
+	.8byte	.LFE267
+	.2byte	0x6
+	.byte	0x83
+	.sleb128 0
+	.byte	0x9
+	.byte	0xf8
+	.byte	0x24
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST42:
+	.8byte	.LVL118
+	.8byte	.LVL122
+	.2byte	0x5
+	.byte	0x11
+	.sleb128 -65533
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST43:
+	.8byte	.LVL119
+	.8byte	.LVL122
+	.2byte	0x4
+	.byte	0x40
+	.byte	0x3e
+	.byte	0x24
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST44:
+	.8byte	.LVL120
+	.8byte	.LVL122
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST45:
+	.8byte	.LVL175
+	.8byte	.LVL178
+	.2byte	0x3
+	.byte	0x85
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL178
+	.8byte	.LVL179
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL179
+	.8byte	.LVL182
+	.2byte	0x3
+	.byte	0x85
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST46:
+	.8byte	.LVL177
+	.8byte	.LVL180
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST47:
+	.8byte	.LVL176
+	.8byte	.LVL180
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST48:
+	.8byte	.LVL184
+	.8byte	.LVL187
+	.2byte	0x5
+	.byte	0x11
+	.sleb128 -65534
+	.byte	0x9f
+	.8byte	.LVL189
+	.8byte	.LFE267
+	.2byte	0x5
+	.byte	0x11
+	.sleb128 -65534
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST49:
+	.8byte	.LVL184
+	.8byte	.LVL187
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL190
+	.8byte	.LFE267
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST50:
+	.8byte	.LVL184
+	.8byte	.LVL187
+	.2byte	0x3
+	.byte	0x8
+	.byte	0xbf
+	.byte	0x9f
+	.8byte	.LVL191
+	.8byte	.LFE267
+	.2byte	0x3
+	.byte	0x8
+	.byte	0xbf
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST51:
+	.8byte	.LVL184
+	.8byte	.LVL187
+	.2byte	0x6
+	.byte	0xc
+	.4byte	0x10001
+	.byte	0x9f
+	.8byte	.LVL192
+	.8byte	.LFE267
+	.2byte	0x6
+	.byte	0xc
+	.4byte	0x10001
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST52:
+	.8byte	.LVL195
+	.8byte	.LVL198
+	.2byte	0x3
+	.byte	0x85
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL198
+	.8byte	.LVL200
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL200
+	.8byte	.LVL201
+	.2byte	0x3
+	.byte	0x85
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST53:
+	.8byte	.LVL197
+	.8byte	.LVL199
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST54:
+	.8byte	.LVL196
+	.8byte	.LVL199
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST6:
+	.8byte	.LVL21
+	.8byte	.LVL22-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL22-1
+	.8byte	.LFE265
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST7:
+	.8byte	.LVL21
+	.8byte	.LVL22-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL22-1
+	.8byte	.LVL37
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL37
+	.8byte	.LVL38
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL38
+	.8byte	.LVL40
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL40
+	.8byte	.LVL41
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL41
+	.8byte	.LVL53
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL56
+	.8byte	.LFE265
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST8:
+	.8byte	.LVL21
+	.8byte	.LVL22-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL22-1
+	.8byte	.LVL36
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL36
+	.8byte	.LFE265
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST9:
+	.8byte	.LVL21
+	.8byte	.LVL22-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL22-1
+	.8byte	.LVL35
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL35
+	.8byte	.LVL36
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL36
+	.8byte	.LFE265
+	.2byte	0x6
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x31
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST10:
+	.8byte	.LVL23
+	.8byte	.LVL24
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL24
+	.8byte	.LVL53
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL56
+	.8byte	.LFE265
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST11:
+	.8byte	.LVL23
+	.8byte	.LVL55
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL56
+	.8byte	.LVL66
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL66
+	.8byte	.LFE265
+	.2byte	0x3
+	.byte	0x87
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST12:
+	.8byte	.LVL61
+	.8byte	.LVL62
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST13:
+	.8byte	.LVL59
+	.8byte	.LVL64-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL65
+	.8byte	.LFE265
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST14:
+	.8byte	.LVL23
+	.8byte	.LVL48
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL48
+	.8byte	.LVL49
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL49
+	.8byte	.LVL52
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL56
+	.8byte	.LVL57
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL57
+	.8byte	.LVL63
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST18:
+	.8byte	.LVL42
+	.8byte	.LVL44
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL44
+	.8byte	.LVL45
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 260
+	.8byte	.LVL45
+	.8byte	.LVL46
+	.2byte	0x6
+	.byte	0x83
+	.sleb128 0
+	.byte	0x6
+	.byte	0x23
+	.uleb128 0x104
+	.8byte	.LVL46
+	.8byte	.LVL50
+	.2byte	0x8
+	.byte	0x84
+	.sleb128 -1
+	.byte	0x11
+	.sleb128 -65536
+	.byte	0x21
+	.byte	0x9f
+	.8byte	.LVL56
+	.8byte	.LFE265
+	.2byte	0x8
+	.byte	0x84
+	.sleb128 -1
+	.byte	0x11
+	.sleb128 -65536
+	.byte	0x21
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST19:
+	.8byte	.LVL43
+	.8byte	.LVL50
+	.2byte	0x6
+	.byte	0xc
+	.4byte	0x10001
+	.byte	0x9f
+	.8byte	.LVL56
+	.8byte	.LFE265
+	.2byte	0x6
+	.byte	0xc
+	.4byte	0x10001
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST22:
+	.8byte	.LVL58
+	.8byte	.LVL64-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL65
+	.8byte	.LFE265
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST23:
+	.8byte	.LVL60
+	.8byte	.LVL62
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST20:
+	.8byte	.LVL50
+	.8byte	.LVL52
+	.2byte	0x4
+	.byte	0x40
+	.byte	0x3c
+	.byte	0x24
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST21:
+	.8byte	.LVL51
+	.8byte	.LVL52
+	.2byte	0x4
+	.byte	0x40
+	.byte	0x3e
+	.byte	0x24
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST15:
+	.8byte	.LVL27
+	.8byte	.LVL34
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST16:
+	.8byte	.LVL27
+	.8byte	.LVL34
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST17:
+	.8byte	.LVL27
+	.8byte	.LVL32
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL32
+	.8byte	.LVL33
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST25:
+	.8byte	.LVL61
+	.8byte	.LVL63
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST26:
+	.8byte	.LVL36
+	.8byte	.LVL54
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL56
+	.8byte	.LFE265
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST27:
+	.8byte	.LVL36
+	.8byte	.LVL55
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL56
+	.8byte	.LFE265
+	.2byte	0x1
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST2:
+	.8byte	.LVL8
+	.8byte	.LVL9
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL9
+	.8byte	.LVL11
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL11
+	.8byte	.LVL13
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL13
+	.8byte	.LVL19
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL19
+	.8byte	.LFE270
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST3:
+	.8byte	.LVL9
+	.8byte	.LVL15
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL15
+	.8byte	.LVL16
+	.2byte	0x3
+	.byte	0x84
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL16
+	.8byte	.LVL20
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST4:
+	.8byte	.LVL10
+	.8byte	.LVL12
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL13
+	.8byte	.LVL14
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST5:
+	.8byte	.LVL11
+	.8byte	.LVL13
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+	.section	.debug_aranges,"",@progbits
+	.4byte	0x5c
+	.2byte	0x2
+	.4byte	.Ldebug_info0
+	.byte	0x8
+	.byte	0
+	.2byte	0
+	.2byte	0
+	.8byte	.LFB268
+	.8byte	.LFE268-.LFB268
+	.8byte	.LFB270
+	.8byte	.LFE270-.LFB270
+	.8byte	.LFB265
+	.8byte	.LFE265-.LFB265
+	.8byte	.LFB267
+	.8byte	.LFE267-.LFB267
+	.8byte	0
+	.8byte	0
+	.section	.debug_ranges,"",@progbits
+.Ldebug_ranges0:
+	.8byte	.LBB62
+	.8byte	.LBE62
+	.8byte	.LBB63
+	.8byte	.LBE63
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB143
+	.8byte	.LBE143
+	.8byte	.LBB227
+	.8byte	.LBE227
+	.8byte	.LBB228
+	.8byte	.LBE228
+	.8byte	.LBB229
+	.8byte	.LBE229
+	.8byte	.LBB230
+	.8byte	.LBE230
+	.8byte	.LBB231
+	.8byte	.LBE231
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB168
+	.8byte	.LBE168
+	.8byte	.LBB169
+	.8byte	.LBE169
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB189
+	.8byte	.LBE189
+	.8byte	.LBB190
+	.8byte	.LBE190
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB195
+	.8byte	.LBE195
+	.8byte	.LBB196
+	.8byte	.LBE196
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB199
+	.8byte	.LBE199
+	.8byte	.LBB200
+	.8byte	.LBE200
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB204
+	.8byte	.LBE204
+	.8byte	.LBB205
+	.8byte	.LBE205
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB210
+	.8byte	.LBE210
+	.8byte	.LBB211
+	.8byte	.LBE211
+	.8byte	0
+	.8byte	0
+	.8byte	.LFB268
+	.8byte	.LFE268
+	.8byte	.LFB270
+	.8byte	.LFE270
+	.8byte	.LFB265
+	.8byte	.LFE265
+	.8byte	.LFB267
+	.8byte	.LFE267
+	.8byte	0
+	.8byte	0
+	.section	.debug_line,"",@progbits
+.Ldebug_line0:
+	.section	.debug_str,"MS",@progbits,1
+.LASF30:
+	.string	"parent_platdata"
+.LASF99:
+	.string	"off_mem_rsvmap"
+.LASF182:
+	.string	"UCLASS_I2C_EEPROM"
+.LASF300:
+	.string	"jt_funcs"
+.LASF187:
+	.string	"UCLASS_IRQ"
+.LASF149:
+	.string	"initrd_start"
+.LASF181:
+	.string	"UCLASS_I2C"
+.LASF13:
+	.string	"sizetype"
+.LASF314:
+	.string	"net_hostname"
+.LASF54:
+	.string	"start"
+.LASF220:
+	.string	"UCLASS_SPI"
+.LASF297:
+	.string	"child"
+.LASF185:
+	.string	"UCLASS_I2S"
+.LASF336:
+	.string	"NETLOOP_RESTART"
+.LASF387:
+	.string	"otp_data"
+.LASF183:
+	.string	"UCLASS_I2C_GENERIC"
+.LASF195:
+	.string	"UCLASS_MOD_EXP"
+.LASF242:
+	.string	"UCLASS_IO_DOMAIN"
+.LASF256:
+	.string	"using_pre_serial"
+.LASF37:
+	.string	"uclass_priv"
+.LASF215:
+	.string	"UCLASS_RKNAND"
+.LASF158:
+	.string	"UCLASS_DEMO"
+.LASF107:
+	.string	"ih_magic"
+.LASF46:
+	.string	"list_head"
+.LASF347:
+	.string	"child_pre_probe"
+.LASF391:
+	.string	"rockchip_secure_otp_ofdata_to_platdata"
+.LASF289:
+	.string	"pm_ctx_phys"
+.LASF162:
+	.string	"UCLASS_TEST_PROBE"
+.LASF295:
+	.string	"full_name"
+.LASF238:
+	.string	"UCLASS_KEY"
+.LASF80:
+	.string	"bi_intfreq"
+.LASF395:
+	.string	"__func__"
+.LASF11:
+	.string	"phys_addr_t"
+.LASF380:
+	.string	"write"
+.LASF233:
+	.string	"UCLASS_VIDEO_BRIDGE"
+.LASF5:
+	.string	"__u8"
+.LASF335:
+	.string	"NETLOOP_CONTINUE"
+.LASF223:
+	.string	"UCLASS_SPI_GENERIC"
+.LASF285:
+	.string	"malloc_base"
+.LASF409:
+	.string	"dev_read_addr_ptr"
+.LASF56:
+	.string	"flash_info_t"
+.LASF199:
+	.string	"UCLASS_PANEL"
+.LASF124:
+	.string	"comp"
+.LASF119:
+	.string	"image_header_t"
+.LASF154:
+	.string	"state"
+.LASF175:
+	.string	"UCLASS_CROS_EC"
+.LASF74:
+	.string	"bi_dsp_freq"
+.LASF389:
+	.string	"rockchip_otp_ids"
+.LASF121:
+	.string	"image_start"
+.LASF160:
+	.string	"UCLASS_TEST_FDT"
+.LASF65:
+	.string	"bd_info"
+.LASF333:
+	.string	"uclass_id"
+.LASF111:
+	.string	"ih_load"
+.LASF304:
+	.string	"__dtb_dt_spl_begin"
+.LASF373:
+	.string	"pre_remove"
+.LASF403:
+	.string	"delay"
+.LASF7:
+	.string	"__u32"
+.LASF35:
+	.string	"priv"
+.LASF288:
+	.string	"cur_serial_dev"
+.LASF320:
+	.string	"net_tx_packet"
+.LASF237:
+	.string	"UCLASS_FG"
+.LASF319:
+	.string	"net_server_ip"
+.LASF386:
+	.string	"ofnode_union"
+.LASF327:
+	.string	"net_native_vlan"
+.LASF235:
+	.string	"UCLASS_VIDEO_CRTC"
+.LASF174:
+	.string	"UCLASS_CODEC"
+.LASF282:
+	.string	"env_buf"
+.LASF399:
+	.string	"rockchip_secure_otp_write_byte"
+.LASF21:
+	.string	"errno"
+.LASF15:
+	.string	"long int"
+.LASF69:
+	.string	"bi_flashsize"
+.LASF29:
+	.string	"platdata"
+.LASF204:
+	.string	"UCLASS_PHY"
+.LASF92:
+	.string	"IRQ_STACK_START_IN"
+.LASF103:
+	.string	"size_dt_strings"
+.LASF232:
+	.string	"UCLASS_VIDEO"
+.LASF268:
+	.string	"relocaddr"
+.LASF364:
+	.string	"dev_head"
+.LASF381:
+	.string	"ioctl"
+.LASF330:
+	.string	"net_boot_file_size"
+.LASF113:
+	.string	"ih_dcrc"
+.LASF79:
+	.string	"bi_ethspeed"
+.LASF157:
+	.string	"UCLASS_ROOT"
+.LASF44:
+	.string	"ide_bus_offset"
+.LASF317:
+	.string	"net_server_ethaddr"
+.LASF82:
+	.string	"bi_arch_number"
+.LASF3:
+	.string	"signed char"
+.LASF188:
+	.string	"UCLASS_KEYBOARD"
+.LASF18:
+	.string	"uint8_t"
+.LASF390:
+	.string	"_u_boot_list_2_driver_2_rockchip_secure_otp"
+.LASF352:
+	.string	"per_child_platdata_auto_alloc_size"
+.LASF45:
+	.string	"udevice"
+.LASF411:
+	.string	"udelay"
+.LASF115:
+	.string	"ih_arch"
+.LASF96:
+	.string	"totalsize"
+.LASF108:
+	.string	"ih_hcrc"
+.LASF270:
+	.string	"mon_len"
+.LASF382:
+	.string	"call"
+.LASF123:
+	.string	"load"
+.LASF228:
+	.string	"UCLASS_TPM"
+.LASF59:
+	.string	"lmb_property"
+.LASF101:
+	.string	"last_comp_version"
+.LASF0:
+	.string	"unsigned char"
+.LASF371:
+	.string	"pre_probe"
+.LASF156:
+	.string	"images"
+.LASF416:
+	.string	"/home/zzz/code/u-boot-backup"
+.LASF241:
+	.string	"UCLASS_DVFS"
+.LASF75:
+	.string	"bi_ddr_freq"
+.LASF189:
+	.string	"UCLASS_LED"
+.LASF110:
+	.string	"ih_size"
+.LASF39:
+	.string	"uclass_node"
+.LASF383:
+	.string	"rockchip_otp_platdata"
+.LASF23:
+	.string	"_Bool"
+.LASF353:
+	.string	"property"
+.LASF339:
+	.string	"net_state"
+.LASF355:
+	.string	"value"
+.LASF402:
+	.string	"rockchip_secure_otp_check_flag"
+.LASF184:
+	.string	"UCLASS_I2C_MUX"
+.LASF14:
+	.string	"char"
+.LASF25:
+	.string	"_binary_u_boot_bin_start"
+.LASF337:
+	.string	"NETLOOP_SUCCESS"
+.LASF36:
+	.string	"uclass"
+.LASF361:
+	.string	"p_current"
+.LASF363:
+	.string	"uc_drv"
+.LASF334:
+	.string	"net_loop_state"
+.LASF43:
+	.string	"req_seq"
+.LASF298:
+	.string	"sibling"
+.LASF276:
+	.string	"dm_root_f"
+.LASF173:
+	.string	"UCLASS_AMP"
+.LASF210:
+	.string	"UCLASS_PWRSEQ"
+.LASF356:
+	.string	"of_offset"
+.LASF139:
+	.string	"fit_hdr_fdt"
+.LASF328:
+	.string	"net_restart_wrap"
+.LASF316:
+	.string	"net_ethaddr"
+.LASF42:
+	.string	"flags"
+.LASF413:
+	.string	"malloc_simple"
+.LASF116:
+	.string	"ih_type"
+.LASF97:
+	.string	"off_dt_struct"
+.LASF70:
+	.string	"bi_flashoffset"
+.LASF329:
+	.string	"net_boot_file_name"
+.LASF366:
+	.string	"compatible"
+.LASF159:
+	.string	"UCLASS_TEST"
+.LASF109:
+	.string	"ih_time"
+.LASF261:
+	.string	"bus_clk"
+.LASF211:
+	.string	"UCLASS_RAM"
+.LASF178:
+	.string	"UCLASS_ETH"
+.LASF32:
+	.string	"node"
+.LASF120:
+	.string	"image_info"
+.LASF126:
+	.string	"arch"
+.LASF263:
+	.string	"mem_clk"
+.LASF394:
+	.string	"temp"
+.LASF260:
+	.string	"cpu_clk"
+.LASF50:
+	.string	"select_hwpart"
+.LASF321:
+	.string	"net_rx_packets"
+.LASF358:
+	.string	"mem_malloc_start"
+.LASF404:
+	.string	"rockchip_secure_otp_wait_flag"
+.LASF91:
+	.string	"_datarelro_start_ofs"
+.LASF17:
+	.string	"ulong"
+.LASF112:
+	.string	"ih_ep"
+.LASF61:
+	.string	"lmb_region"
+.LASF412:
+	.string	"printf"
+.LASF134:
+	.string	"fit_uname_os"
+.LASF76:
+	.string	"bi_bootflags"
+.LASF318:
+	.string	"net_ip"
+.LASF405:
+	.string	"rockchip_secure_otp_wait_status"
+.LASF280:
+	.string	"fdt_size"
+.LASF312:
+	.string	"net_dns_server"
+.LASF332:
+	.string	"net_ping_ip"
+.LASF63:
+	.string	"memory"
+.LASF94:
+	.string	"fdt_header"
+.LASF359:
+	.string	"mem_malloc_end"
+.LASF191:
+	.string	"UCLASS_MAILBOX"
+.LASF146:
+	.string	"rd_end"
+.LASF341:
+	.string	"bind"
+.LASF271:
+	.string	"irq_sp"
+.LASF151:
+	.string	"cmdline_start"
+.LASF259:
+	.string	"global_data"
+.LASF376:
+	.string	"per_device_auto_alloc_size"
+.LASF218:
+	.string	"UCLASS_SCSI"
+.LASF230:
+	.string	"UCLASS_USB_DEV_GENERIC"
+.LASF192:
+	.string	"UCLASS_MASS_STORAGE"
+.LASF1:
+	.string	"long unsigned int"
+.LASF167:
+	.string	"UCLASS_SIMPLE_BUS"
+.LASF301:
+	.string	"gd_t"
+.LASF313:
+	.string	"net_nis_domain"
+.LASF141:
+	.string	"fit_noffset_fdt"
+.LASF388:
+	.string	"rockchip_secure_otp_ops"
+.LASF338:
+	.string	"NETLOOP_FAIL"
+.LASF236:
+	.string	"UCLASS_WDT"
+.LASF250:
+	.string	"timer_reset_value"
+.LASF272:
+	.string	"start_addr_sp"
+.LASF71:
+	.string	"bi_sramstart"
+.LASF26:
+	.string	"_binary_u_boot_bin_end"
+.LASF273:
+	.string	"reloc_off"
+.LASF102:
+	.string	"boot_cpuid_phys"
+.LASF249:
+	.string	"lastinc"
+.LASF253:
+	.string	"tlb_fillptr"
+.LASF137:
+	.string	"fit_uname_rd"
+.LASF224:
+	.string	"UCLASS_SYSCON"
+.LASF172:
+	.string	"UCLASS_CPU"
+.LASF132:
+	.string	"fit_uname_cfg"
+.LASF219:
+	.string	"UCLASS_SERIAL"
+.LASF326:
+	.string	"net_our_vlan"
+.LASF290:
+	.string	"serial"
+.LASF342:
+	.string	"probe"
+.LASF170:
+	.string	"UCLASS_BLK"
+.LASF127:
+	.string	"image_info_t"
+.LASF166:
+	.string	"UCLASS_USB_EMUL"
+.LASF251:
+	.string	"tlb_addr"
+.LASF203:
+	.string	"UCLASS_PCI_GENERIC"
+.LASF122:
+	.string	"image_len"
+.LASF77:
+	.string	"bi_ip_addr"
+.LASF205:
+	.string	"UCLASS_PINCONFIG"
+.LASF226:
+	.string	"UCLASS_THERMAL"
+.LASF130:
+	.string	"legacy_hdr_os_copy"
+.LASF9:
+	.string	"long long int"
+.LASF279:
+	.string	"new_fdt"
+.LASF22:
+	.string	"___strtok"
+.LASF331:
+	.string	"net_boot_file_expected_size_in_blocks"
+.LASF401:
+	.string	"enable"
+.LASF407:
+	.string	"rockchip_secure_otp_ecc_check"
+.LASF340:
+	.string	"of_match"
+.LASF198:
+	.string	"UCLASS_NVME"
+.LASF254:
+	.string	"tlb_emerg"
+.LASF128:
+	.string	"bootm_headers"
+.LASF55:
+	.string	"protect"
+.LASF229:
+	.string	"UCLASS_USB"
+.LASF368:
+	.string	"uclass_driver"
+.LASF239:
+	.string	"UCLASS_RC"
+.LASF283:
+	.string	"timebase_h"
+.LASF284:
+	.string	"timebase_l"
+.LASF176:
+	.string	"UCLASS_DISPLAY"
+.LASF325:
+	.string	"net_null_ethaddr"
+.LASF266:
+	.string	"env_valid"
+.LASF34:
+	.string	"parent"
+.LASF165:
+	.string	"UCLASS_PCI_EMUL"
+.LASF396:
+	.string	"rockchip_secure_otp_read"
+.LASF38:
+	.string	"parent_priv"
+.LASF398:
+	.string	"parity"
+.LASF240:
+	.string	"UCLASS_CHARGE_DISPLAY"
+.LASF305:
+	.string	"load_addr"
+.LASF133:
+	.string	"fit_hdr_os"
+.LASF89:
+	.string	"_datarelrolocal_start_ofs"
+.LASF258:
+	.string	"addr"
+.LASF379:
+	.string	"read"
+.LASF8:
+	.string	"unsigned int"
+.LASF16:
+	.string	"ushort"
+.LASF410:
+	.string	"dev_read_u32_default"
+.LASF349:
+	.string	"priv_auto_alloc_size"
+.LASF286:
+	.string	"malloc_limit"
+.LASF207:
+	.string	"UCLASS_PMIC"
+.LASF129:
+	.string	"legacy_hdr_os"
+.LASF98:
+	.string	"off_dt_strings"
+.LASF302:
+	.string	"monitor_flash_len"
+.LASF193:
+	.string	"UCLASS_MISC"
+.LASF67:
+	.string	"bi_memsize"
+.LASF406:
+	.string	"flag"
+.LASF24:
+	.string	"image_base"
+.LASF225:
+	.string	"UCLASS_SYSRESET"
+.LASF362:
+	.string	"current"
+.LASF180:
+	.string	"UCLASS_FIRMWARE"
+.LASF190:
+	.string	"UCLASS_LPC"
+.LASF393:
+	.string	"offset"
+.LASF186:
+	.string	"UCLASS_IDE"
+.LASF378:
+	.string	"misc_ops"
+.LASF294:
+	.string	"phandle"
+.LASF377:
+	.string	"per_device_platdata_auto_alloc_size"
+.LASF155:
+	.string	"bootm_headers_t"
+.LASF73:
+	.string	"bi_arm_freq"
+.LASF213:
+	.string	"UCLASS_REMOTEPROC"
+.LASF125:
+	.string	"type"
+.LASF136:
+	.string	"fit_hdr_rd"
+.LASF265:
+	.string	"env_addr"
+.LASF72:
+	.string	"bi_sramsize"
+.LASF277:
+	.string	"uclass_root"
+.LASF179:
+	.string	"UCLASS_GPIO"
+.LASF418:
+	.string	"read_end"
+.LASF208:
+	.string	"UCLASS_PWM"
+.LASF58:
+	.string	"long double"
+.LASF267:
+	.string	"ram_top"
+.LASF292:
+	.string	"console_evt"
+.LASF145:
+	.string	"rd_start"
+.LASF417:
+	.string	"write_end"
+.LASF209:
+	.string	"UCLASS_POWER_DOMAIN"
+.LASF212:
+	.string	"UCLASS_REGULATOR"
+.LASF307:
+	.string	"save_size"
+.LASF171:
+	.string	"UCLASS_CLK"
+.LASF31:
+	.string	"uclass_platdata"
+.LASF408:
+	.string	"dev_get_platdata"
+.LASF88:
+	.string	"_datarel_start_ofs"
+.LASF255:
+	.string	"pre_serial"
+.LASF414:
+	.ascii	"GNU C11 6.3.1 201"
+	.string	"70404 -mstrict-align -march=armv8-a+nosimd -mlittle-endian -mabi=lp64 -g -Os -fno-builtin -ffreestanding -fshort-wchar -fno-stack-protector -fno-delete-null-pointer-checks -fstack-usage -ffunction-sections -fdata-sections -ffixed-r9 -fno-common -ffixed-x18"
+.LASF118:
+	.string	"ih_name"
+.LASF114:
+	.string	"ih_os"
+.LASF152:
+	.string	"cmdline_end"
+.LASF322:
+	.string	"net_rx_packet"
+.LASF246:
+	.string	"LOGF_MAX_CATEGORIES"
+.LASF278:
+	.string	"fdt_blob"
+.LASF365:
+	.string	"udevice_id"
+.LASF51:
+	.string	"size"
+.LASF10:
+	.string	"long long unsigned int"
+.LASF375:
+	.string	"destroy"
+.LASF106:
+	.string	"image_header"
+.LASF354:
+	.string	"length"
+.LASF20:
+	.string	"__be32"
+.LASF68:
+	.string	"bi_flashstart"
+.LASF135:
+	.string	"fit_noffset_os"
+.LASF194:
+	.string	"UCLASS_MMC"
+.LASF245:
+	.string	"UCLASS_INVALID"
+.LASF231:
+	.string	"UCLASS_USB_HUB"
+.LASF348:
+	.string	"child_post_remove"
+.LASF41:
+	.string	"sibling_node"
+.LASF281:
+	.string	"of_root"
+.LASF57:
+	.string	"flash_info"
+.LASF100:
+	.string	"version"
+.LASF62:
+	.string	"region"
+.LASF104:
+	.string	"size_dt_struct"
+.LASF275:
+	.string	"dm_root"
+.LASF291:
+	.string	"sys_start_tick"
+.LASF296:
+	.string	"properties"
+.LASF196:
+	.string	"UCLASS_MTD"
+.LASF93:
+	.string	"fdt32_t"
+.LASF274:
+	.string	"new_gd"
+.LASF197:
+	.string	"UCLASS_NORTHBRIDGE"
+.LASF78:
+	.string	"bi_enetaddr"
+.LASF299:
+	.string	"mtd_info"
+.LASF346:
+	.string	"child_post_bind"
+.LASF308:
+	.string	"in_addr"
+.LASF323:
+	.string	"net_rx_packet_len"
+.LASF374:
+	.string	"init"
+.LASF400:
+	.string	"rockchip_secure_otp_ecc_enable"
+.LASF303:
+	.string	"__dtb_dt_begin"
+.LASF214:
+	.string	"UCLASS_RESET"
+.LASF138:
+	.string	"fit_noffset_rd"
+.LASF169:
+	.string	"UCLASS_AHCI"
+.LASF12:
+	.string	"phys_size_t"
+.LASF27:
+	.string	"driver"
+.LASF87:
+	.string	"FIQ_STACK_START"
+.LASF153:
+	.string	"verify"
+.LASF357:
+	.string	"ofnode"
+.LASF28:
+	.string	"name"
+.LASF397:
+	.string	"buffer"
+.LASF200:
+	.string	"UCLASS_PANEL_BACKLIGHT"
+.LASF227:
+	.string	"UCLASS_TIMER"
+.LASF222:
+	.string	"UCLASS_SPI_FLASH"
+.LASF264:
+	.string	"have_console"
+.LASF81:
+	.string	"bi_busfreq"
+.LASF6:
+	.string	"short int"
+.LASF385:
+	.string	"otp_mask_base"
+.LASF206:
+	.string	"UCLASS_PINCTRL"
+.LASF216:
+	.string	"UCLASS_RAMDISK"
+.LASF164:
+	.string	"UCLASS_I2C_EMUL"
+.LASF221:
+	.string	"UCLASS_SPMI"
+.LASF343:
+	.string	"remove"
+.LASF161:
+	.string	"UCLASS_TEST_BUS"
+.LASF306:
+	.string	"save_addr"
+.LASF351:
+	.string	"per_child_auto_alloc_size"
+.LASF287:
+	.string	"malloc_ptr"
+.LASF384:
+	.string	"secure_conf_base"
+.LASF150:
+	.string	"initrd_end"
+.LASF370:
+	.string	"pre_unbind"
+.LASF257:
+	.string	"baudrate"
+.LASF90:
+	.string	"_datarellocal_start_ofs"
+.LASF40:
+	.string	"child_head"
+.LASF247:
+	.string	"arch_global_data"
+.LASF244:
+	.string	"UCLASS_COUNT"
+.LASF262:
+	.string	"pci_clk"
+.LASF49:
+	.string	"block_drvr"
+.LASF53:
+	.string	"flash_id"
+.LASF243:
+	.string	"UCLASS_CRYPTO"
+.LASF293:
+	.string	"device_node"
+.LASF269:
+	.string	"ram_size"
+.LASF144:
+	.string	"fit_noffset_setup"
+.LASF105:
+	.string	"working_fdt"
+.LASF315:
+	.string	"net_root_path"
+.LASF177:
+	.string	"UCLASS_DMA"
+.LASF85:
+	.string	"bd_t"
+.LASF309:
+	.string	"s_addr"
+.LASF372:
+	.string	"post_probe"
+.LASF324:
+	.string	"net_bcast_ethaddr"
+.LASF83:
+	.string	"bi_boot_params"
+.LASF19:
+	.string	"uint32_t"
+.LASF360:
+	.string	"mem_malloc_brk"
+.LASF310:
+	.string	"net_gateway"
+.LASF350:
+	.string	"platdata_auto_alloc_size"
+.LASF66:
+	.string	"bi_memstart"
+.LASF234:
+	.string	"UCLASS_VIDEO_CONSOLE"
+.LASF345:
+	.string	"ofdata_to_platdata"
+.LASF64:
+	.string	"reserved"
+.LASF419:
+	.string	"free"
+.LASF84:
+	.string	"bi_dram"
+.LASF2:
+	.string	"short unsigned int"
+.LASF95:
+	.string	"magic"
+.LASF142:
+	.string	"fit_hdr_setup"
+.LASF131:
+	.string	"legacy_hdr_valid"
+.LASF60:
+	.string	"base"
+.LASF217:
+	.string	"UCLASS_RTC"
+.LASF248:
+	.string	"timer_rate_hz"
+.LASF52:
+	.string	"sector_count"
+.LASF117:
+	.string	"ih_comp"
+.LASF369:
+	.string	"post_bind"
+.LASF392:
+	.string	"rockchip_secure_otp_write"
+.LASF344:
+	.string	"unbind"
+.LASF147:
+	.string	"ft_addr"
+.LASF4:
+	.string	"uchar"
+.LASF148:
+	.string	"ft_len"
+.LASF47:
+	.string	"next"
+.LASF367:
+	.string	"data"
+.LASF143:
+	.string	"fit_uname_setup"
+.LASF48:
+	.string	"prev"
+.LASF201:
+	.string	"UCLASS_PCH"
+.LASF202:
+	.string	"UCLASS_PCI"
+.LASF311:
+	.string	"net_netmask"
+.LASF33:
+	.string	"driver_data"
+.LASF86:
+	.string	"IRQ_STACK_START"
+.LASF168:
+	.string	"UCLASS_ADC"
+.LASF163:
+	.string	"UCLASS_SPI_EMUL"
+.LASF252:
+	.string	"tlb_size"
+.LASF415:
+	.string	"drivers/misc/rockchip-secure-otp.c"
+.LASF140:
+	.string	"fit_uname_fdt"
+	.ident	"GCC: (Linaro GCC 6.3-2017.05) 6.3.1 20170404"
+	.section	.note.GNU-stack,"",@progbits

commit bc94d10207d9ef4c704f6a76e896a3218e1cde42
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Aug 21 14:32:16 2019 +0800

    misc: add tpl misc compile support
    
    Separate the tpl compile with spl compile.
    
    Change-Id: I01e6005fbc9fc49cc0fe6b357a4f15b35f591944
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 4d2ea06590..99fcff3b64 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -22,6 +22,15 @@ config SPL_MISC
 	  set of generic read, write and ioctl methods may be used to
 	  access the device.
 
+config TPL_MISC
+	bool "Enable Driver Model for Misc drivers in TPL"
+	depends on TPL_DM
+	help
+	  Enable driver model for miscellaneous devices. This class is
+	  used only for those do not fit other more general classes. A
+	  set of generic read, write and ioctl methods may be used to
+	  access the device.
+
 config ALTERA_SYSID
 	bool "Altera Sysid support"
 	depends on MISC
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 2f4227cb5d..21386781c6 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -5,7 +5,7 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
 
-obj-$(CONFIG_$(SPL_)MISC) += misc-uclass.o
+obj-$(CONFIG_$(SPL_TPL_)MISC) += misc-uclass.o
 obj-$(CONFIG_ALI152X) += ali512x.o
 obj-$(CONFIG_ALTERA_SYSID) += altera_sysid.o
 obj-$(CONFIG_ATSHA204A) += atsha204a-i2c.o

commit 6c65ad505d303d0c9b8260ddb14bc8adb636cc72
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Aug 22 17:01:49 2019 +0800

    mtd: nand: rockchip: avoid initializing nand driver twice
    
    Change-Id: Id643cbdaf3df1b57ef16a52004c2192944d1f289
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mtd/nand/raw/rockchip_nand_spl.c b/drivers/mtd/nand/raw/rockchip_nand_spl.c
index 7559c593ac..98dfe27a81 100644
--- a/drivers/mtd/nand/raw/rockchip_nand_spl.c
+++ b/drivers/mtd/nand/raw/rockchip_nand_spl.c
@@ -254,9 +254,15 @@ static void read_flash_id(struct rk_nand *rknand, uint8_t *id)
 void board_nand_init(void)
 {
 	const void *blob = gd->fdt_blob;
+	static int initialized;
 	fdt_addr_t regs;
 	int node;
 
+	if (initialized)
+		return;
+
+	initialized = 1;
+
 	if (g_rk_nand)
 		return;
 

commit 24c72b14cb801c87ca5aadfcc7f00ac164c336cd
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Mar 29 22:48:29 2019 +0800

    rockchip: dmc: rk3368: update rank number for evb-px5
    
    evb-px5 has only 1 CS, update for it.
    
    Change-Id: I5393d21c88d44457a590cb31df31eb59d20bbf02
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    Tested-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/drivers/ram/rockchip/dmc-rk3368.c b/drivers/ram/rockchip/dmc-rk3368.c
index bfcb1ddefe..2349217153 100644
--- a/drivers/ram/rockchip/dmc-rk3368.c
+++ b/drivers/ram/rockchip/dmc-rk3368.c
@@ -845,7 +845,11 @@ static int setup_sdram(struct udevice *dev)
 	move_to_access_state(pctl);
 
 	/* TODO(prt): could detect rank in training... */
+#ifdef CONFIG_TARGET_EVB_PX5
+	params->chan.rank = 1;
+#else
 	params->chan.rank = 2;
+#endif
 	/* TODO(prt): bus width is not auto-detected (yet)... */
 	params->chan.bw = 2;  /* 32bit wide bus */
 	params->chan.dbw = params->chan.dbw;  /* 32bit wide bus */

commit b35a11377175fa3beba2dc18e61c69607327d113
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Aug 14 09:59:59 2019 +0800

    common: spl: rkfw: update available case for mmc dma
    
    mmc dma can only access dram area, use DRAM base and
    max size to make it work for all socs.
    
    Change-Id: I6d65285c7e441b1c454460ad6897fcfd83fade45
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/spl/spl_rkfw.c b/common/spl/spl_rkfw.c
index 906ba12c6d..02fd32dc00 100644
--- a/common/spl/spl_rkfw.c
+++ b/common/spl/spl_rkfw.c
@@ -118,7 +118,8 @@ static int load_image(struct spl_load_info *info,
 		 * MMC/NAND controller DMA can't access sram region, so:
 		 * data -> ddr buffer -> memcpy to sram region.
 		 */
-		if (load_addr >= SDRAM_MAX_SIZE) {
+		if (load_addr < CONFIG_SYS_SDRAM_BASE ||
+		    load_addr >= CONFIG_SYS_SDRAM_BASE + SDRAM_MAX_SIZE) {
 			image_buf = memalign(ARCH_DMA_MINALIGN, sect_cnt * 512);
 			if (!image_buf) {
 				printf("%s: malloc failed\n", __func__);

commit e4adbfc93d0d42fdfd5a446db40f41ff6666abd1
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Aug 21 16:04:01 2019 +0800

    rockchip: rk3128: correct usb phy phandle
    
    The phy phandle in usb node should be port instead of phy, or else the phy
    driver not able to find the ops and abort at generic_phy_get_by_index().
    
    Change-Id: I79161dc252cfa9e57b34290fb94d926476a3035d
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3128.dtsi b/arch/arm/dts/rk3128.dtsi
index 7216c5defd..928310aec5 100644
--- a/arch/arm/dts/rk3128.dtsi
+++ b/arch/arm/dts/rk3128.dtsi
@@ -488,7 +488,7 @@
 		dr_mode = "otg";
 		g-use-dma;
 		hnp-srp-disable;
-		phys = <&u2phy 0>;
+		phys = <&u2phy_otg>;
 		phy-names = "usb";
 		status = "disabled";
 	};
@@ -497,7 +497,7 @@
 		compatible = "generic-ehci";
 		reg = <0x101c0000 0x20000>;
 		interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
-		phys = <&u2phy 1>;
+		phys = <&u2phy_host>;
 		phy-names = "usb";
 		status = "disabled";
 	};
@@ -506,7 +506,7 @@
 		compatible = "generic-ohci";
 		reg = <0x101e0000 0x20000>;
 		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
-		phys = <&u2phy 1>;
+		phys = <&u2phy_host>;
 		phy-names = "usb";
 		status = "disabled";
 	};

commit cbe246677bef17dbbf829ba451cf45ad70e48350
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Aug 20 20:06:46 2019 +0800

    rockchip: otp: add secure_conf_base & otp_mask_base to platdata
    
    We add secure_conf_base & otp_mask_base to platdata to operate
    the secure OTP.
    
    Change-Id: Ie336b2cf61076aa82f7c1987cc3cec7166751452
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/rockchip-otp.h b/include/rockchip-otp.h
index 5c6a1340d7..71fbbf5fb7 100644
--- a/include/rockchip-otp.h
+++ b/include/rockchip-otp.h
@@ -46,6 +46,8 @@ typedef int (*OTP_READ)(struct udevice *dev, int offset, void *buf, int size);
 
 struct rockchip_otp_platdata {
 	void __iomem *base;
+	unsigned long secure_conf_base;
+	unsigned long otp_mask_base;
 };
 
 #endif

commit 06536c203f89a0939e50d1201864f1e8d6b598d1
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Aug 20 20:13:56 2019 +0800

    misc: add spl misc support
    
    Change-Id: I77de161aaaa6490aeb8a5a8c3f9dfdc5c65f3f71
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index f936fd791f..4d2ea06590 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -13,6 +13,15 @@ config MISC
 	  set of generic read, write and ioctl methods may be used to
 	  access the device.
 
+config SPL_MISC
+	bool "Enable Driver Model for Misc drivers in SPL"
+	depends on SPL_DM
+	help
+	  Enable driver model for miscellaneous devices. This class is
+	  used only for those do not fit other more general classes. A
+	  set of generic read, write and ioctl methods may be used to
+	  access the device.
+
 config ALTERA_SYSID
 	bool "Altera Sysid support"
 	depends on MISC
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 72f3156812..2f4227cb5d 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -5,7 +5,7 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
 
-obj-$(CONFIG_MISC) += misc-uclass.o
+obj-$(CONFIG_$(SPL_)MISC) += misc-uclass.o
 obj-$(CONFIG_ALI152X) += ali512x.o
 obj-$(CONFIG_ALTERA_SYSID) += altera_sysid.o
 obj-$(CONFIG_ATSHA204A) += atsha204a-i2c.o

commit 6e12c1dd66e4f3415caa99d3699821f6b0a7b6c3
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Aug 14 11:31:49 2019 +0800

    rockchip: otp: move some definition to header file
    
    Change-Id: I82b4afe1adbb5f91f3b3146c3cad14e2873b93c3
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/misc/rockchip-otp.c b/drivers/misc/rockchip-otp.c
index 6c1228b1be..2e3d11eb7e 100644
--- a/drivers/misc/rockchip-otp.c
+++ b/drivers/misc/rockchip-otp.c
@@ -10,47 +10,7 @@
 #include <linux/bitops.h>
 #include <linux/delay.h>
 #include <misc.h>
-
-/* OTP Register Offsets */
-#define OTPC_SBPI_CTRL			0x0020
-#define OTPC_SBPI_CMD_VALID_PRE		0x0024
-#define OTPC_SBPI_CS_VALID_PRE		0x0028
-#define OTPC_SBPI_STATUS		0x002C
-#define OTPC_USER_CTRL			0x0100
-#define OTPC_USER_ADDR			0x0104
-#define OTPC_USER_ENABLE		0x0108
-#define OTPC_USER_Q			0x0124
-#define OTPC_INT_STATUS			0x0304
-#define OTPC_SBPI_CMD0_OFFSET		0x1000
-#define OTPC_SBPI_CMD1_OFFSET		0x1004
-
-/* OTP Register bits and masks */
-#define OTPC_USER_ADDR_MASK		GENMASK(31, 16)
-#define OTPC_USE_USER			BIT(0)
-#define OTPC_USE_USER_MASK		GENMASK(16, 16)
-#define OTPC_USER_FSM_ENABLE		BIT(0)
-#define OTPC_USER_FSM_ENABLE_MASK	GENMASK(16, 16)
-#define OTPC_SBPI_DONE			BIT(1)
-#define OTPC_USER_DONE			BIT(2)
-
-#define SBPI_DAP_ADDR			0x02
-#define SBPI_DAP_ADDR_SHIFT		8
-#define SBPI_DAP_ADDR_MASK		GENMASK(31, 24)
-#define SBPI_CMD_VALID_MASK		GENMASK(31, 16)
-#define SBPI_DAP_CMD_WRF		0xC0
-#define SBPI_DAP_REG_ECC		0x3A
-#define SBPI_ECC_ENABLE			0x00
-#define SBPI_ECC_DISABLE		0x09
-#define SBPI_ENABLE			BIT(0)
-#define SBPI_ENABLE_MASK		GENMASK(16, 16)
-
-#define OTPC_TIMEOUT			10000
-
-typedef int (*OTP_READ)(struct udevice *dev, int offset, void *buf, int size);
-
-struct rockchip_otp_platdata {
-	void __iomem *base;
-};
+#include <rockchip-otp.h>
 
 static int rockchip_otp_wait_status(struct rockchip_otp_platdata *otp,
 				    u32 flag)
diff --git a/include/rockchip-otp.h b/include/rockchip-otp.h
new file mode 100644
index 0000000000..5c6a1340d7
--- /dev/null
+++ b/include/rockchip-otp.h
@@ -0,0 +1,51 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _ROCKCHIP_OTP_H_
+#define _ROCKCHIP_OTP_H_
+
+/* OTP Register Offsets */
+#define OTPC_SBPI_CTRL			0x0020
+#define OTPC_SBPI_CMD_VALID_PRE		0x0024
+#define OTPC_SBPI_CS_VALID_PRE		0x0028
+#define OTPC_SBPI_STATUS		0x002C
+#define OTPC_USER_CTRL			0x0100
+#define OTPC_USER_ADDR			0x0104
+#define OTPC_USER_ENABLE		0x0108
+#define OTPC_USER_QP			0x0120
+#define OTPC_USER_Q			0x0124
+#define OTPC_INT_STATUS			0x0304
+#define OTPC_SBPI_CMD0_OFFSET		0x1000
+#define OTPC_SBPI_CMD1_OFFSET		0x1004
+
+/* OTP Register bits and masks */
+#define OTPC_USER_ADDR_MASK		GENMASK(31, 16)
+#define OTPC_USE_USER			BIT(0)
+#define OTPC_USE_USER_MASK		GENMASK(16, 16)
+#define OTPC_USER_FSM_ENABLE		BIT(0)
+#define OTPC_USER_FSM_ENABLE_MASK	GENMASK(16, 16)
+#define OTPC_SBPI_DONE			BIT(1)
+#define OTPC_USER_DONE			BIT(2)
+
+#define SBPI_DAP_ADDR			0x02
+#define SBPI_DAP_ADDR_SHIFT		8
+#define SBPI_DAP_ADDR_MASK		GENMASK(31, 24)
+#define SBPI_CMD_VALID_MASK		GENMASK(31, 16)
+#define SBPI_DAP_CMD_WRF		0xC0
+#define SBPI_DAP_REG_ECC		0x3A
+#define SBPI_ECC_ENABLE			0x00
+#define SBPI_ECC_DISABLE		0x09
+#define SBPI_ENABLE			BIT(0)
+#define SBPI_ENABLE_MASK		GENMASK(16, 16)
+
+#define OTPC_TIMEOUT			10000
+
+typedef int (*OTP_READ)(struct udevice *dev, int offset, void *buf, int size);
+
+struct rockchip_otp_platdata {
+	void __iomem *base;
+};
+
+#endif

commit 2b4182c1edaf1bfb2e4b0fb60381ba7dbb2e6a60
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Aug 21 09:10:32 2019 +0800

    cmd: rk_secure_storage: dump data which is written in OTP or efuse
    
    Change-Id: I644add22f3aaed546d727de7727d3230ae1a6c01
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/cmd/Kconfig b/cmd/Kconfig
index d9507cd927..39c1df16c6 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -930,6 +930,11 @@ config CMD_RKSFC
 	help
 	  Rockchip SFC device support
 
+config CMD_RK_SECURE_STORAGE
+	bool "dump rockchip efuse/otp content"
+	help
+	  Dump the data which is written in OTP or efuse.
+
 config CMD_SATA
 	bool "sata - Access SATA subsystem"
 	select SATA
diff --git a/cmd/Makefile b/cmd/Makefile
index e485988fc8..b35c28c638 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -122,6 +122,7 @@ obj-$(CONFIG_CMD_NVME) += nvme.o
 obj-$(CONFIG_CMD_ROCKUSB) += rockusb.o
 obj-$(CONFIG_CMD_RKNAND) += rknand.o
 obj-$(CONFIG_CMD_RKSFC) += rksfc.o
+obj-$(CONFIG_CMD_RK_SECURE_STORAGE) += rk_secure_storage.o
 obj-$(CONFIG_CMD_SF) += sf.o
 obj-$(CONFIG_CMD_SCSI) += scsi.o disk.o
 obj-$(CONFIG_CMD_SHA1SUM) += sha1sum.o
diff --git a/cmd/rk_secure_storage.c b/cmd/rk_secure_storage.c
new file mode 100644
index 0000000000..1edb0ac015
--- /dev/null
+++ b/cmd/rk_secure_storage.c
@@ -0,0 +1,85 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <command.h>
+#include <dm.h>
+#include <misc.h>
+
+#ifdef CONFIG_ROCKCHIP_OTP
+static int dump_otps(cmd_tbl_t *cmdtp, int flag,
+		     int argc, char * const argv[])
+{
+	struct udevice *dev;
+	u8 otps[64] = {0};
+	int ret;
+
+	/* retrieve the device */
+	ret = uclass_get_device_by_driver(UCLASS_MISC,
+					  DM_GET_DRIVER(rockchip_otp), &dev);
+	if (ret) {
+		printf("%s: no misc-device found\n", __func__);
+		return 0;
+	}
+
+	ret = misc_read(dev, 0, &otps, sizeof(otps));
+	if (ret) {
+		printf("%s: misc_read failed\n", __func__);
+		return 0;
+	}
+
+	printf("otp-contents:\n");
+	print_buffer(0, otps, 1, 64, 16);
+
+	return 0;
+}
+
+U_BOOT_CMD(
+	rockchip_dump_otps, 1, 1, dump_otps,
+	"Dump the content of the otps",
+	""
+);
+#endif
+
+#ifdef CONFIG_ROCKCHIP_EFUSE
+static int dump_efuses(cmd_tbl_t *cmdtp, int flag,
+		       int argc, char * const argv[])
+{
+	/*
+	 * N.B.: This function is tailored towards the RK3399 and assumes that
+	 *       there's always 32 fuses x 32 bits (i.e. 128 bytes of data) to
+	 *       be read.
+	 */
+
+	struct udevice *dev;
+	u8 fuses[128] = {0};
+	int ret;
+
+	/* retrieve the device */
+	ret = uclass_get_device_by_driver(UCLASS_MISC,
+					  DM_GET_DRIVER(rockchip_efuse), &dev);
+	if (ret) {
+		printf("%s: no misc-device found\n", __func__);
+		return 0;
+	}
+
+	ret = misc_read(dev, 0, &fuses, sizeof(fuses));
+	if (ret) {
+		printf("%s: misc_read failed\n", __func__);
+		return 0;
+	}
+
+	printf("efuse-contents:\n");
+	print_buffer(0, fuses, 1, 128, 16);
+
+	return 0;
+}
+
+U_BOOT_CMD(
+	rockchip_dump_efuses, 1, 1, dump_efuses,
+	"Dump the content of the efuses",
+	""
+);
+#endif

commit 95e4d4078e1388ac0818a4985029c08ac9421a19
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Aug 21 09:06:41 2019 +0800

    misc: rockchip efuse & otp: remove the cmd code from driver file
    
    Change-Id: I3c1f89a92770d69234cf0fdc6811b05fa275f262
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c
index a2e4da408f..643bfb6470 100644
--- a/drivers/misc/rockchip-efuse.c
+++ b/drivers/misc/rockchip-efuse.c
@@ -105,47 +105,6 @@ struct rockchip_efuse_platdata {
 	struct clk *clk;
 };
 
-#if defined(DEBUG)
-static int dump_efuses(cmd_tbl_t *cmdtp, int flag,
-		       int argc, char * const argv[])
-{
-	/*
-	 * N.B.: This function is tailored towards the RK3399 and assumes that
-	 *       there's always 32 fuses x 32 bits (i.e. 128 bytes of data) to
-	 *       be read.
-	 */
-
-	struct udevice *dev;
-	u8 fuses[128] = {0};
-	int ret;
-
-	/* retrieve the device */
-	ret = uclass_get_device_by_driver(UCLASS_MISC,
-					  DM_GET_DRIVER(rockchip_efuse), &dev);
-	if (ret) {
-		printf("%s: no misc-device found\n", __func__);
-		return 0;
-	}
-
-	ret = misc_read(dev, 0, &fuses, sizeof(fuses));
-	if (ret) {
-		printf("%s: misc_read failed\n", __func__);
-		return 0;
-	}
-
-	printf("efuse-contents:\n");
-	print_buffer(0, fuses, 1, 128, 16);
-
-	return 0;
-}
-
-U_BOOT_CMD(
-	rockchip_dump_efuses, 1, 1, dump_efuses,
-	"Dump the content of the efuses",
-	""
-);
-#endif
-
 static void rk1808_efuse_timing_init(void __iomem *base)
 {
 	static bool init;
diff --git a/drivers/misc/rockchip-otp.c b/drivers/misc/rockchip-otp.c
index c6ec5d9b3f..6c1228b1be 100644
--- a/drivers/misc/rockchip-otp.c
+++ b/drivers/misc/rockchip-otp.c
@@ -52,41 +52,6 @@ struct rockchip_otp_platdata {
 	void __iomem *base;
 };
 
-#if defined(DEBUG)
-static int dump_otps(cmd_tbl_t *cmdtp, int flag,
-		     int argc, char * const argv[])
-{
-	struct udevice *dev;
-	u8 otps[64] = {0};
-	int ret;
-
-	/* retrieve the device */
-	ret = uclass_get_device_by_driver(UCLASS_MISC,
-					  DM_GET_DRIVER(rockchip_otp), &dev);
-	if (ret) {
-		printf("%s: no misc-device found\n", __func__);
-		return 0;
-	}
-
-	ret = misc_read(dev, 0, &otps, sizeof(otps));
-	if (ret) {
-		printf("%s: misc_read failed\n", __func__);
-		return 0;
-	}
-
-	printf("otp-contents:\n");
-	print_buffer(0, otps, 1, 64, 16);
-
-	return 0;
-}
-
-U_BOOT_CMD(
-	rockchip_dump_otps, 1, 1, dump_otps,
-	"Dump the content of the otps",
-	""
-);
-#endif
-
 static int rockchip_otp_wait_status(struct rockchip_otp_platdata *otp,
 				    u32 flag)
 {

commit fb09b0715820b7b1500f75d9ab7910d4dc305e9c
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Aug 21 09:54:27 2019 +0800

    test: rockchip: fix pointer for free()
    
    free() is using pointer while sysmem_free() is not using pointer,
    so they can not use the same parameter.
    
    Change-Id: Ib68319bda2ba1a400f2436e21d5864a0e2511fad
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/test/rockchip/test-storage.c b/test/rockchip/test-storage.c
index c27c2a4a63..fc8d8a87f4 100644
--- a/test/rockchip/test-storage.c
+++ b/test/rockchip/test-storage.c
@@ -236,9 +236,9 @@ err3:
 err2:
 	sysmem_free((phys_addr_t)w_buf);
 #else
-	free((phys_addr_t)r_buf);
+	free(r_buf);
 err2:
-	free((phys_addr_t)w_buf);
+	free(w_buf);
 #endif
 err1:
 

commit 21a92a158bb238f14e906aae6475cf9fcb434db1
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Aug 20 17:33:02 2019 +0800

    rockchip: test: net: enable dhcp test with default value
    
    1. add default dhcp cmd for test
    2. fix the argc(has -1 in test-rockchip)
    3. fix return value for FAIL case(return value is '1').
    
    Change-Id: If55a3a8d29240be98febbf4649a23964a74452b6
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/test/rockchip/test-net.c b/test/rockchip/test-net.c
index fa7ac5c6bf..edf2d52648 100644
--- a/test/rockchip/test-net.c
+++ b/test/rockchip/test-net.c
@@ -250,7 +250,7 @@ int do_test_eth(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 {
 	struct udevice *current;
 	u32 tx_delay, rx_delay;
-	char cmd_eth[512] = {0};
+	char cmd_eth[512] = "dhcp $kernel_addr_r 172.16.12.246:golden/arm/rootfs.cpio.gz";
 	int i, speed;
 	int ret;
 
@@ -259,7 +259,7 @@ int do_test_eth(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 		return -EINVAL;
 
 	switch (argc) {
-	case 3:
+	case 2:
 		if (!strncmp(argv[2], "delaytest", sizeof("delaytest"))) {
 			/* Force 1000 speed test */
 			speed = LOOPBACK_SPEED_1000;
@@ -270,14 +270,14 @@ int do_test_eth(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 			return 0;
 		}
 		break;
-	case 4:
+	case 3:
 		if (!strncmp(argv[2], "loopback", sizeof("loopback"))) {
 			speed = simple_strtoul(argv[3], NULL, 0);
 			ret = eth_loopback_test(speed, 0);
 			return ret;
 		}
 		break;
-	case 5:
+	case 4:
 		if (!strncmp(argv[2], "delayline", sizeof("delayline"))) {
 			tx_delay = simple_strtoul(argv[3], NULL, 0);
 			rx_delay = simple_strtoul(argv[4], NULL, 0);
@@ -291,15 +291,18 @@ int do_test_eth(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 		break;
 	}
 
-	for (i = 2; i < argc; i++) {
-		strncat(cmd_eth, argv[i], sizeof(cmd_eth));
+	for (i = 1; i < argc; i++) {
+		if (i == 1)
+			sprintf(cmd_eth, argv[i]);
+		else
+			strncat(cmd_eth, argv[i], sizeof(argv[i]));
 		if (i < argc - 1)
 			strncat(cmd_eth, " ", sizeof(" "));
 	}
 
 	/* run dhcp/tftp test */
 	ret = run_command(cmd_eth, 0);
-	if (ret < 0) {
+	if (ret) {
 		printf("DHCP test error: %d\n", ret);
 		return ret;
 	}

commit 54108d04ceddfbc7c026ac102fdf29d44f72a8f4
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Aug 15 20:25:35 2019 +0800

    rockchip: test: adapt for upstream U-Boot
    
    Not test display and misc for upstream U-Boot, replace local APIs with
    upstream APIs.
    Use CONFIG_RKIMG_BOOTLOADER to identify the rockchip local U-Boot.
    
    Change-Id: I65b69eca8262d8aa0cb621c90d4ff1f2756368ba
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/test/rockchip/Makefile b/test/rockchip/Makefile
index 1219e6e926..f0b4cc67da 100644
--- a/test/rockchip/Makefile
+++ b/test/rockchip/Makefile
@@ -6,9 +6,11 @@
 
 obj-y += test-rockchip.o
 obj-y += test-boot.o
-obj-y += test-display.o
 obj-y += test-download.o
+ifdef CONFIG_RKIMG_BOOTLOADER
+obj-y += test-display.o
 obj-y += test-misc.o
+endif
 obj-y += test-net.o
 obj-y += test-power.o
 obj-y += test-storage.o
diff --git a/test/rockchip/test-net.c b/test/rockchip/test-net.c
index 28e6754b64..fa7ac5c6bf 100644
--- a/test/rockchip/test-net.c
+++ b/test/rockchip/test-net.c
@@ -34,9 +34,9 @@ enum loopback_speed {
 	LOOPBACK_SPEED_100	= 100,
 	LOOPBACK_SPEED_1000	= 1000
 };
-
+#ifdef CONFIG_RKIMG_BOOTLOADER
 extern void gmac_set_rgmii(struct udevice *dev, u32 tx_delay, u32 rx_delay);
-
+#endif
 static struct phy_device *get_current_phydev(void)
 {
 	struct mii_dev *bus = mdio_get_current_dev();
@@ -143,9 +143,10 @@ static int eth_run_loopback_test(struct udevice *current, int speed, int delay_t
 		if (delay_test)
 			printf("[0x%02x]:", i);
 		for (j = 0x0; j < MAX_RX_DELAY_LINE; j++) {
+#ifdef CONFIG_RKIMG_BOOTLOADER
 			if (delay_test)
 				gmac_set_rgmii(current, i, j);
-
+#endif
 			alter_lbtest_frame(tx_pkt, LOOPBACK_TEST_DATA_SIZE, i, j);
 			net_send_packet(net_tx_packet, LOOPBACK_TEST_FRAME_SIZE);
 
@@ -280,7 +281,9 @@ int do_test_eth(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 		if (!strncmp(argv[2], "delayline", sizeof("delayline"))) {
 			tx_delay = simple_strtoul(argv[3], NULL, 0);
 			rx_delay = simple_strtoul(argv[4], NULL, 0);
+#ifdef CONFIG_RKIMG_BOOTLOADER
 			gmac_set_rgmii(current, tx_delay, rx_delay);
+#endif
 			return 0;
 		}
 		break;
diff --git a/test/rockchip/test-power.c b/test/rockchip/test-power.c
index 25688227a7..b11dc3c383 100644
--- a/test/rockchip/test-power.c
+++ b/test/rockchip/test-power.c
@@ -201,7 +201,9 @@ static cmd_tbl_t sub_cmd[] = {
 #ifdef CONFIG_CMD_PMIC
 	UNIT_CMD_DEFINE(pmic, 0),
 #endif
+#ifdef CONFIG_DM_RESET
 	UNIT_CMD_ATTR_DEFINE(reset, 0, CMD_FLG_NORETURN),
+#endif
 #ifdef CONFIG_DM_REGULATOR
 	UNIT_CMD_ATTR_DEFINE(regulator, 0, CMD_FLG_INTERACTIVE),
 #endif
@@ -223,7 +225,9 @@ static char sub_cmd_help[] =
 #ifdef CONFIG_CMD_PMIC
 "    [.] rktest pmic                        - test pmic, dump registers\n"
 #endif
+#ifdef CONFIG_DM_RESET
 "    [n] rktest reset                       - test sysreset\n"
+#endif
 #ifdef CONFIG_DM_REGULATOR
 "    [i] rktest regulator                   - test regulator set and show\n"
 #endif
diff --git a/test/rockchip/test-rockchip.c b/test/rockchip/test-rockchip.c
index 3d69dc4172..3e7afa9dc0 100644
--- a/test/rockchip/test-rockchip.c
+++ b/test/rockchip/test-rockchip.c
@@ -9,9 +9,11 @@
 #include "test-rockchip.h"
 
 extern struct cmd_group cmd_grp_boot;
-extern struct cmd_group cmd_grp_display;
 extern struct cmd_group cmd_grp_download;
+#ifdef CONFIG_RKIMG_BOOTLOADER
+extern struct cmd_group cmd_grp_display;
 extern struct cmd_group cmd_grp_misc;
+#endif
 extern struct cmd_group cmd_grp_net;
 extern struct cmd_group cmd_grp_power;
 extern struct cmd_group cmd_grp_storage;
@@ -42,9 +44,11 @@ static const struct cmd_group *cmd_groups[] = {
 	&cmd_grp_boot,
 	&cmd_grp_storage,
 	&cmd_grp_power,
-	&cmd_grp_misc,
 	&cmd_grp_net,
+#ifdef CONFIG_RKIMG_BOOTLOADER
+	&cmd_grp_misc,
 	&cmd_grp_display,
+#endif
 };
 
 static int cmd_groups_help(void)
@@ -178,11 +182,11 @@ all_test:
 			}
 
 			printf("### Start [%s]\n", cp->name);
-
+#ifdef CONFIG_RKIMG_BOOTLOADER
 			/* Flush console */
 			if (cmd_groups[i]->id == TEST_ID_DOWNLOAD)
 				flushc();
-
+#endif
 			/* Execute command */
 			ret = cp->cmd(cmdtp, flag, argc, argv);
 			if (ret) {
diff --git a/test/rockchip/test-storage.c b/test/rockchip/test-storage.c
index 2f325fff77..c27c2a4a63 100644
--- a/test/rockchip/test-storage.c
+++ b/test/rockchip/test-storage.c
@@ -13,7 +13,9 @@
 #include <environment.h>
 #include <malloc.h>
 #include <misc.h>
+#ifdef CONFIG_RKIMG_BOOTLOADER
 #include <sysmem.h>
+#endif
 #include <linux/ctype.h>
 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
 #include <asm/arch/vendor.h>
@@ -126,14 +128,21 @@ static int do_test_storage(cmd_tbl_t *cmdtp, int flag,
 
 
 	/* 3. Prepare memory */
+#ifdef CONFIG_RKIMG_BOOTLOADER
 	w_buf = sysmem_alloc_by_name("storage_w", blocks * dev_desc->blksz);
+#else
+	w_buf = memalign(CONFIG_SYS_CACHELINE_SIZE, blocks * dev_desc->blksz);
+#endif
 	if (!w_buf) {
 		ut_err("%s: no sysmem for w_buf\n", label);
 		ret = -ENOMEM;
 		goto err1;
 	}
-
+#ifdef CONFIG_RKIMG_BOOTLOADER
 	r_buf = sysmem_alloc_by_name("storage_r", blocks * dev_desc->blksz);
+#else
+	r_buf = memalign(CONFIG_SYS_CACHELINE_SIZE, blocks * dev_desc->blksz);
+#endif
 	if (!r_buf) {
 		ut_err("%s: no sysmem for r_buf\n", label);
 		ret = -ENOMEM;
@@ -222,9 +231,15 @@ static int do_test_storage(cmd_tbl_t *cmdtp, int flag,
 
 	ret = 0;
 err3:
+#ifdef CONFIG_RKIMG_BOOTLOADER
 	sysmem_free((phys_addr_t)r_buf);
 err2:
 	sysmem_free((phys_addr_t)w_buf);
+#else
+	free((phys_addr_t)r_buf);
+err2:
+	free((phys_addr_t)w_buf);
+#endif
 err1:
 
 	return ret;

commit bc18ede00506ce1c5104cab8fdae85390bb1dfbd
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Aug 15 19:55:01 2019 +0800

    rockchip: test: use MACRO for module codes
    
    Use module Macro for APIs from different module.
    
    Change-Id: I765150f21bc9118e5ad0e661bb2b4ae12af77342
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/test/rockchip/test-misc.c b/test/rockchip/test-misc.c
index 577058d020..fa2e9345f2 100644
--- a/test/rockchip/test-misc.c
+++ b/test/rockchip/test-misc.c
@@ -6,7 +6,6 @@
 
 #include <common.h>
 #include <adc.h>
-#include <boot_rkimg.h>
 #include <console.h>
 #include <dm.h>
 #include <key.h>
diff --git a/test/rockchip/test-power.c b/test/rockchip/test-power.c
index 1455b13a42..25688227a7 100644
--- a/test/rockchip/test-power.c
+++ b/test/rockchip/test-power.c
@@ -5,7 +5,6 @@
  */
 
 #include <common.h>
-#include <boot_rkimg.h>
 #include <console.h>
 #include <dm.h>
 #include <thermal.h>
diff --git a/test/rockchip/test-storage.c b/test/rockchip/test-storage.c
index 283679ce4c..2f325fff77 100644
--- a/test/rockchip/test-storage.c
+++ b/test/rockchip/test-storage.c
@@ -5,7 +5,9 @@
  */
 
 #include <common.h>
+#ifdef CONFIG_DM_RAMDISK
 #include <boot_rkimg.h>
+#endif
 #include <cli.h>
 #include <dm.h>
 #include <environment.h>
@@ -13,7 +15,9 @@
 #include <misc.h>
 #include <sysmem.h>
 #include <linux/ctype.h>
+#ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
 #include <asm/arch/vendor.h>
+#endif
 #include "test-rockchip.h"
 
 #define DEFAULT_STORAGE_RW_PART		"userdata"
@@ -23,23 +27,33 @@ enum if_type blk_get_type_by_name(char* devtype)
 
 	if (!strcmp(devtype, "mmc"))
 		type = IF_TYPE_MMC;
+#ifdef CONFIG_RKNAND
 	else if (!strcmp(devtype, "rknand"))
 		type = IF_TYPE_RKNAND;
+#endif
+#ifdef CONFIG_RKSFC_NAND
 	else if (!strcmp(devtype, "spinand"))
 		type = IF_TYPE_SPINAND;
+#endif
+#ifdef CONFIG_RKSFC_NOR
 	else if (!strcmp(devtype, "spinor"))
 		type = IF_TYPE_SPINOR;
+#endif
+#ifdef CONFIG_DM_RAMDISK
 	else if (!strcmp(devtype, "ramdisk"))
 		type = IF_TYPE_RAMDISK;
+#endif
+#ifdef CONFIG_MTD_BLK
 	else if (!strcmp(devtype, "mtd"))
 		type = IF_TYPE_MTD;
+#endif
 	else if (!strcmp(devtype, "usb"))
 		type = IF_TYPE_USB;
 
 	return type;
 }
 
-#if defined(CONFIG_MMC) || defined(CONFIG_RKNAND) || defined(CONFIG_BLK) || defined(CONFIG_USB_HOST)
+#if defined(CONFIG_MMC) || defined(CONFIG_RKNAND) || defined(CONFIG_DM_RAMDISK) || defined(CONFIG_USB_HOST)
 static int do_test_storage(cmd_tbl_t *cmdtp, int flag,
 			   int argc, char *const argv[],
 			   const char *devtype,
@@ -71,7 +85,12 @@ static int do_test_storage(cmd_tbl_t *cmdtp, int flag,
 	}
 	if (!devtype) {
 		/* For blk test only */
+#ifdef CONFIG_DM_RAMDISK
 		dev_desc = rockchip_get_bootdev();
+#else
+		printf("%s Not support devtype!\n", __func__);
+		return -EINVAL;
+#endif
 	} else {
 		int if_type;
 		int num = simple_strtoul(devnum, NULL, 10);
@@ -233,12 +252,14 @@ static int do_test_rknand(cmd_tbl_t *cmdtp, int flag,
 }
 #endif
 
+#ifdef CONFIG_DM_RAMDISK
 static int do_test_blk(cmd_tbl_t *cmdtp, int flag,
 		       int argc, char *const argv[])
 {
 	return do_test_storage(cmdtp, flag, argc, argv, NULL, NULL, "BLK");
 }
-#endif/* defined(CONFIG_MMC) || defined(CONFIG_RKNAND) || defined(CONFIG_BLK) */
+#endif
+#endif/* defined(CONFIG_MMC) || defined(CONFIG_RKNAND) || defined(CONFIG_DM_RAMDISK) */
 
 #if defined(CONFIG_OPTEE_CLIENT) && defined(CONFIG_MMC)
 static int do_test_secure_storage(cmd_tbl_t *cmdtp, int flag,
@@ -346,7 +367,7 @@ static int do_test_usb(cmd_tbl_t *cmdtp, int flag,
 #endif
 
 static cmd_tbl_t sub_cmd[] = {
-#ifdef CONFIG_BLK
+#ifdef CONFIG_DM_RAMDISK
 	UNIT_CMD_DEFINE(blk, 0),
 #endif
 #ifdef CONFIG_MMC
@@ -383,7 +404,7 @@ static cmd_tbl_t sub_cmd[] = {
 };
 
 static char sub_cmd_help[] =
-#ifdef CONFIG_BLK
+#ifdef CONFIG_DM_RAMDISK
 "    [.] rktest blk                         - test blk layer read/write\n"
 #endif
 #ifdef CONFIG_MMC

commit d38ae1a6d6a643027dcb325fd7ca43690a760057
Author: zain wang <wzz@rock-chips.com>
Date:   Mon Aug 19 07:33:18 2019 +0000

    fastboot: export CONFIG_RK_AVB_LIBAVB_ENABLE_ATH_UNLOCK
    
    Relate to commit 46a8a26905fc
    ("fastboot: add RK_AVB_LIBAVB_ENABLE_ATH_UNLOCK config")
    Export config can help us select it easily.
    
    Change-Id: I43a210f1efb35ff679102c8686cbca219d2def97
    Signed-off-by: zain wang <wzz@rock-chips.com>

diff --git a/cmd/fastboot/Kconfig b/cmd/fastboot/Kconfig
index 9492ecb018..3f2dbc4097 100644
--- a/cmd/fastboot/Kconfig
+++ b/cmd/fastboot/Kconfig
@@ -90,6 +90,13 @@ config FASTBOOT_OEM_UNLOCK
 	  oem unlock command requires tee security storage to store
 	  unlock status. oem unlock status attach to bootargs on boot.
 
+config RK_AVB_LIBAVB_ENABLE_ATH_UNLOCK
+	bool "AVB Authenticated unlock function"
+	depends on ANDROID_AVB
+	default y
+	help
+	  Enabled authenticated unlock function can prevent lock state
+	  from invalid unlock cmd.
 
 endif # USB_FUNCTION_FASTBOOT || UDP_FUNCTION_FASTBOOT
 
diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index d44a1c022c..9de6db4bc1 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -2059,7 +2059,7 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 	} else if (strncmp("at-unlock-vboot", cmd + 4, 15) == 0) {
 #ifdef CONFIG_RK_AVB_LIBAVB_USER
 		uint8_t lock_state;
-		bool out_is_trusted = true;
+		char out_is_trusted = true;
 
 		if (rk_avb_read_lock_state(&lock_state))
 			fastboot_tx_write_str("FAILlock sate read failure");

commit e44966db5db29f52ad599703fae1b089c6fb5ec2
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Aug 13 21:09:23 2019 +0800

    rockchip: rk3326: defconfig: remove legacy and raw image support
    
    We only support FIT and rockchip image in SPL.
    
    Change-Id: Ib96cb86c2df40d554bbaf0534127f565d1f857fc
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/rk3326_defconfig b/configs/rk3326_defconfig
index 57e49d0b13..1509d7487f 100644
--- a/configs/rk3326_defconfig
+++ b/configs/rk3326_defconfig
@@ -23,6 +23,8 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_ANDROID_AVB=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
@@ -124,7 +126,6 @@ CONFIG_SPL_TINY_MEMSET=y
 CONFIG_LZ4=y
 CONFIG_LZO=y
 CONFIG_ERRNO_STR=y
-CONFIG_OF_LIBFDT_OVERLAY=y
 # CONFIG_EFI_LOADER is not set
 CONFIG_AVB_LIBAVB=y
 CONFIG_AVB_LIBAVB_AB=y

commit 7f9390c9835b8eb1f41f64c24b690213b8a652c6
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Aug 13 21:06:21 2019 +0800

    rockchip: rk3308: defconfig: remove legacy and raw image support
    
    We only support FIT and rockchip image in SPL.
    
    Change-Id: I6a599367f8c63de844a58e6b53ef684bf8e3c3e0
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/rk3308_defconfig b/configs/rk3308_defconfig
index e0c6888218..c2cfc190f3 100644
--- a/configs/rk3308_defconfig
+++ b/configs/rk3308_defconfig
@@ -24,6 +24,8 @@ CONFIG_BOOTDELAY=0
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
 CONFIG_SPL_STACK_R=y
 # CONFIG_SPL_SKIP_RELOCATE is not set
 CONFIG_SPL_RELOC_TEXT_BASE=0x3001000

commit f2e3284f527634aa5c6b8f1229b7db38eddaab30
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Aug 13 21:00:15 2019 +0800

    rockchip: rk3288: defconfig: remove legacy and raw image support
    
    We only support FIT and rockchip image in SPL.
    
    Change-Id: I1b9a5542a23b54f53a48d3ead77cc78dbf862de6
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/rk3288_defconfig b/configs/rk3288_defconfig
index 69ca208212..56ec88442b 100644
--- a/configs/rk3288_defconfig
+++ b/configs/rk3288_defconfig
@@ -14,6 +14,8 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_ANDROID_AVB=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set                                                                                                     
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 CONFIG_FASTBOOT_FLASH=y

commit ccfe72293ce3333077b62ba8f00619c51c991666
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Aug 13 20:58:29 2019 +0800

    rockchip: rk3399: defconfig: remove legacy and raw image support
    
    We only support FIT and rockchip image in SPL.
    
    Change-Id: Ic2760b1ad237234fe13d11da6f220301a5610e34
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
index e36f0b5edd..bd2a6d9992 100755
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -18,6 +18,8 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_ANDROID_AVB=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
 CONFIG_SPL_ATF=y

commit 0699ea8bfeac56dee59e3e5dd9faa45d935a3347
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Aug 13 20:57:17 2019 +0800

    rockchip: rk3328: defconfig: remove legacy and raw image support
    
    We only support FIT and rockchip image in SPL.
    
    Change-Id: Id994fa60f04bdd278d5e4e723ec03626d47037a5
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index 1050d1e2fe..2353b1b9b1 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -23,6 +23,8 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_ANDROID_AVB=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
 CONFIG_TPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_ATF=y

commit 85e663101859ff6970c8152d56df2b81aaf8163c
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Aug 13 20:48:46 2019 +0800

    rockchip: rk3328-evb: defconfig: remove legacy and raw image support
    
    We only support FIT and rockchip image in SPL.
    
    Change-Id: I2f51574d8a664909db84d0a013c7a1650038db6a
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index 897f873c3c..520dd79d6b 100644
--- a/configs/evb-rk3328_defconfig
+++ b/configs/evb-rk3328_defconfig
@@ -18,6 +18,8 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
 # CONFIG_DISPLAY_CPUINFO is not set
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
 CONFIG_TPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_ATF=y

commit 02e47c3d38e62a01ce84d79c9336fe764716c8b7
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Aug 13 20:47:31 2019 +0800

    rockchip: dts: rk3328: update init value for ACLK_BUS_PRE
    
    The ACLK_BUS_PRE suppose to be 150M instead of 15M.
    
    Change-Id: Ie746284219ee2a9ad7f61b823211c94f5e61ed77
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi
index 24f958bd72..abe05f5be9 100644
--- a/arch/arm/dts/rk3328.dtsi
+++ b/arch/arm/dts/rk3328.dtsi
@@ -402,7 +402,7 @@
 			<0>, <61440000>,
 			<0>, <24000000>,
 			<24000000>, <24000000>,
-			<15000000>, <15000000>,
+			<150000000>, <150000000>,
 			<100000000>, <100000000>,
 			<100000000>, <100000000>,
 			<50000000>, <100000000>,

commit a5e7a2d487fc6b3a5e710571ceee4f5f3703ce9c
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Aug 13 20:43:50 2019 +0800

    spl_fit: update available case for mmc dma
    
    mmc dma can only access dram area, use DRAM base and
    max size to make it work for all socs.
    
    Change-Id: I7badfc11ccf4072d3c37b147485ca4708c6be906
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 7203d30d78..d22f75af9a 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -198,7 +198,8 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 
 		load_ptr = (load_addr + align_len) & ~align_len;
 #if  defined(CONFIG_ARCH_ROCKCHIP)
-		if ((load_ptr & 0xffff0000) == CONFIG_ROCKCHIP_IRAM_START_ADDR)
+		if ((load_ptr < CONFIG_SYS_SDRAM_BASE) ||
+		     (load_ptr >= CONFIG_SYS_SDRAM_BASE + SDRAM_MAX_SIZE))
 			load_ptr = (ulong)memalign(ARCH_DMA_MINALIGN, len);
 #endif
 		length = len;

commit 8cf6fca4b89eca507b30e4950bce1b2ee4930c2c
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Aug 15 09:13:29 2019 +0800

    mtd: mtd_blk: get mtd through dev_get_priv() when the storage is nand
    
    In the nand mtd, we will use chip info to operate nand, and get the chip
    through mtd_to_nand(). So we should get mtd through dev_get_priv() but not
    dev_get_uclass_platdata.
    
    Change-Id: I1bacbec49158d04dc947a880dbe3a8043fe3123d
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index 83b57d8aa5..a1c805ae11 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -114,6 +114,10 @@ ulong mtd_dread(struct udevice *udev, lbaint_t start,
 #ifdef CONFIG_NAND
 		int ret = 0;
 
+		mtd = dev_get_priv(udev->parent);
+		if (!mtd)
+			return 0;
+
 		ret = nand_read_skip_bad(mtd, off, &rwsize,
 					 NULL, mtd->size,
 					 (u_char *)(dst));

commit 1d2de2a99a970f176f829137ccf0d1023fadf93e
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed Aug 14 20:54:05 2019 +0800

    rkflash: add new SPI Nor flash
    
    XMC devices
    
    Change-Id: Ia7cbe4e41e318da3c55943bdfbf0e9be79bae531
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/sfc_nor.c b/drivers/rkflash/sfc_nor.c
index b329a93d76..f97b5f9dd0 100644
--- a/drivers/rkflash/sfc_nor.c
+++ b/drivers/rkflash/sfc_nor.c
@@ -14,35 +14,53 @@
 
 static struct flash_info spi_flash_tbl[] = {
 	/* GD25Q32B */
-	{0xc84016, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 13, 9, 0},
+	{ 0xc84016, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 13, 9, 0 },
 	/* GD25Q64B */
-	{0xc84017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 14, 9, 0},
+	{ 0xc84017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 14, 9, 0 },
 	/* GD25Q127C and GD25Q128C*/
-	{0xc84018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 9, 0},
-	/* GD25Q256B */
-	{0xc84019, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x1C, 16, 6, 0},
+	{ 0xc84018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 9, 0 },
+	/* GD25Q256B/C/D */
+	{ 0xc84019, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x1C, 16, 6, 0 },
 	/* GD25Q512MC */
-	{0xc84020, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x1C, 17, 6, 0},
+	{ 0xc84020, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x1C, 17, 6, 0 },
 	/* 25Q64JVSSIQ */
-	{0xef4017, 128, 8, 0x13, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0},
-	/* 25Q128FV */
-	{0xef4018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 9, 0},
+	{ 0xef4017, 128, 8, 0x13, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0 },
+	/* 25Q128FV and 25Q128JV*/
+	{ 0xef4018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 9, 0 },
 	/* 25Q256FV */
-	{0xef4019, 128, 8, 0x13, 0x02, 0x6C, 0x32, 0x20, 0xD8, 0x3C, 16, 9, 0},
+	{ 0xef4019, 128, 8, 0x13, 0x02, 0x6C, 0x32, 0x20, 0xD8, 0x3C, 16, 9, 0 },
 	/* 25Q64FWSSIG */
-	{0xef6017, 128, 8, 0x13, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0},
-	/* XT25F128A */
-	{0x207018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x00, 15, 0, 0},
-	/* MX25L25635E/F */
-	{0xc22019, 128, 8, 0x03, 0x02, 0x6B, 0x38, 0x20, 0xD8, 0x30, 16, 6, 0},
+	{ 0xef6017, 128, 8, 0x13, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0 },
+	/* MX25L6433F */
+	{ 0xc22017, 128, 8, 0x03, 0x02, 0x6B, 0x38, 0x20, 0xD8, 0x0E, 14, 6, 0 },
+	/* MX25L12835E/F MX25L12833FMI-10G */
+	{ 0xc22018, 128, 8, 0x03, 0x02, 0x6B, 0x38, 0x20, 0xD8, 0x0E, 15, 6, 0 },
+	/* MX25L25635E/F MX25L25645G MX25L25645GMI-08G*/
+	{ 0xc22019, 128, 8, 0x13, 0x12, 0x6C, 0x38, 0x21, 0xDC, 0x3E, 16, 6, 0 },
+	/* MX25L51245GMI */
+	{ 0xc2201a, 128, 8, 0x13, 0x12, 0x6C, 0x38, 0x21, 0xDC, 0x3E, 17, 6, 0 },
+	/* XM25QH32C */
+	{ 0x204016, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 13, 9, 0 },
+	/* XM25QH64B */
+	{ 0x206017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 14, 6, 0 },
+	/* XM25QH128B */
+	{ 0x206018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 15, 6, 0 },
+	/* XM25QH(QU)256B */
+	{ 0x206019, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x1D, 16, 6, 0 },
 	/* XM25QH64A */
-	{0x207017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 0, 0},
-	/* XM25QH128A */
-	{0x207018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 0, 0},
+	{ 0x207017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 0, 0 },
+	/* XT25F128A XM25QH128A */
+	{ 0x207018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x00, 15, 0, 0 },
+	/* XT25F128BSSIGU */
+	{ 0x0b4018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 15, 9, 0 },
 	/* EN25QH128A */
-	{0x1c7018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 0, 0},
-	/* MX25L51245G08G */
-	{0xc2201a, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x10, 17, 6, 0},
+	{ 0x1c7018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 0, 0 },
+	/* EN25S32A */
+	{ 0x1c3816, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 13, 0, 0 },
+	/* EN25S64A */
+	{ 0x1c3817, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 0, 0 },
+	/* P25Q64H */
+	{ 0x856017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0 },
 };
 
 static const u8 sfnor_dev_code[] = {
@@ -144,6 +162,35 @@ static int snor_write_status2(u32 reg_index, u8 status)
 	u8 status2[2];
 	u8 read_index;
 
+	status2[reg_index] = status;
+	read_index = (reg_index == 0) ? 2 : 0;
+	ret = snor_read_status(read_index, &status2[read_index]);
+	if (ret != SFC_OK)
+		return ret;
+
+	snor_write_en();
+
+	sfcmd.d32 = 0;
+	sfcmd.b.cmd = CMD_WRITE_STATUS;
+	sfcmd.b.datasize = 2;
+	sfcmd.b.rw = SFC_WRITE;
+
+	ret = sfc_request(sfcmd.d32, 0, 0, &status2[0]);
+	if (ret != SFC_OK)
+		return ret;
+
+	ret = snor_wait_busy(10000);    /* 10ms */
+
+	return ret;
+}
+
+static int snor_write_status1(u32 reg_index, u8 status)
+{
+	int ret;
+	union SFCCMD_DATA sfcmd;
+	u8 status2[2];
+	u8 read_index;
+
 	status2[reg_index] = status;
 	read_index = (reg_index == 0) ? 1 : 0;
 	ret = snor_read_status(read_index, &status2[read_index]);
@@ -285,7 +332,11 @@ static int snor_enable_QE(struct SFNOR_DEV *p_dev)
 	u8 status;
 
 	if (p_dev->manufacturer == MID_GIGADEV ||
-	    p_dev->manufacturer == MID_WINBOND) {
+	    p_dev->manufacturer == MID_WINBOND ||
+	    p_dev->manufacturer == MID_XTX ||
+	    p_dev->manufacturer == MID_MACRONIX ||
+	    p_dev->manufacturer == MID_PUYA ||
+	    p_dev->manufacturer == MID_XMC) {
 		reg_index = p_dev->QE_bits >> 3;
 		bit_offset = p_dev->QE_bits & 0x7;
 		ret = snor_read_status(reg_index, &status);
@@ -566,7 +617,9 @@ int snor_init(struct SFNOR_DEV *p_dev)
 		i = g_spi_flash_info->feature & FEA_READ_STATUE_MASK;
 		if (i == 0)
 			p_dev->write_status = snor_write_status;
-		else
+		else if (i == 1)
+			p_dev->write_status = snor_write_status1;
+		else if (i == 2)
 			p_dev->write_status = snor_write_status2;
 		if (g_spi_flash_info->feature & FEA_4BIT_READ) {
 			if (snor_enable_QE(p_dev) == SFC_OK) {
diff --git a/drivers/rkflash/sfc_nor.h b/drivers/rkflash/sfc_nor.h
index 105683e84f..5b4c1233bb 100644
--- a/drivers/rkflash/sfc_nor.h
+++ b/drivers/rkflash/sfc_nor.h
@@ -33,6 +33,9 @@
 #define MID_SPANSION            0x01
 #define MID_EON                 0x1C
 #define MID_ST                  0x20
+#define MID_XTX                 0x0B
+#define MID_PUYA                0x85
+#define MID_XMC                 0x20
 
 /*Command Set*/
 #define CMD_READ_JEDECID        (0x9F)

commit b1758edae0a58989b9763cb34aae09211a6db8a7
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Aug 13 10:15:51 2019 +0800

    mtd: nand: rockchip: initialize uclass private data mtd_info
    
    Change-Id: I5399454ab3c6e5c24f72a4bde81348218991d354
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mtd/nand/raw/rockchip_nand.c b/drivers/mtd/nand/raw/rockchip_nand.c
index 959a2ef9c7..ef5ba8cde9 100644
--- a/drivers/mtd/nand/raw/rockchip_nand.c
+++ b/drivers/mtd/nand/raw/rockchip_nand.c
@@ -628,6 +628,8 @@ static int rockchip_nand_chip_init(int node, struct rk_nand *rknand, int devnum)
 		return ret;
 	}
 	mtd->name = "rk-nand";
+	memcpy(&rknand->mtd, mtd, sizeof(struct mtd_info));
+
 	return 0;
 }
 
@@ -657,6 +659,7 @@ static int rockchip_nandc_probe(struct udevice *dev)
 {
 	const void *blob = gd->fdt_blob;
 	struct rk_nand *rknand = dev_get_priv(dev);
+	struct mtd_info *mtd = dev_get_uclass_priv(dev);
 	fdt_addr_t regs;
 	int ret = 0, node;
 
@@ -681,6 +684,8 @@ static int rockchip_nandc_probe(struct udevice *dev)
 	if (ret)
 		debug("Failed to init nand chips\n");
 
+	memcpy(mtd, &rknand->mtd, sizeof(struct mtd_info));
+
 	return ret;
 }
 

commit 6e8ac5a8a0ddc09233510a472947f76c7b8bb6fd
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Aug 13 10:12:04 2019 +0800

    mtd: mtd_blk: support spi nand
    
    Change-Id: I34a0b90d43ec2599b171df965a27750893b766a5
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index 76b2faca13..83b57d8aa5 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -96,40 +96,42 @@ ulong mtd_dread(struct udevice *udev, lbaint_t start,
 		lbaint_t blkcnt, void *dst)
 {
 	struct blk_desc *desc = dev_get_uclass_platdata(udev);
+	loff_t off = (loff_t)(start * 512);
+	size_t rwsize = blkcnt * 512;
+	struct mtd_info *mtd;
 
 	if (!desc)
 		return 0;
 
+	mtd = desc->bdev->priv;
+	if (!mtd)
+		return 0;
+
 	if (blkcnt == 0)
 		return 0;
 
 	if (desc->devnum == BLK_MTD_NAND) {
+#ifdef CONFIG_NAND
 		int ret = 0;
-		size_t rwsize = blkcnt * 512;
-		struct mtd_info *mtd = dev_get_priv(udev->parent);
-		struct nand_chip *chip = mtd_to_nand(mtd);
-		loff_t off = (loff_t)(start * 512);
-
-		if (!mtd) {
-			puts("\nno mtd available\n");
-			return 0;
-		}
-
-		if (!chip) {
-			puts("\nno chip available\n");
-			return 0;
-		}
 
-		ret = nand_read_skip_bad(&chip->mtd, off, &rwsize,
-					 NULL, chip->mtd.size,
+		ret = nand_read_skip_bad(mtd, off, &rwsize,
+					 NULL, mtd->size,
 					 (u_char *)(dst));
-		if (ret)
-			return 0;
-		else
+		if (!ret)
 			return blkcnt;
+		else
+#endif
+			return 0;
 	} else if (desc->devnum == BLK_MTD_SPI_NAND) {
-		/* Not implemented */
-		return 0;
+#ifdef CONFIG_MTD_SPI_NAND
+		size_t retlen;
+
+		mtd_read(mtd, off, rwsize, &retlen, dst);
+		if (retlen == rwsize)
+			return blkcnt;
+		else
+#endif
+			return 0;
 	} else if (desc->devnum == BLK_MTD_SPI_NOR) {
 		/* Not implemented */
 		return 0;
@@ -154,8 +156,8 @@ ulong mtd_derase(struct udevice *udev, lbaint_t start,
 
 static int mtd_blk_probe(struct udevice *udev)
 {
+	struct mtd_info *mtd = dev_get_uclass_priv(udev->parent);
 	struct blk_desc *desc = dev_get_uclass_platdata(udev);
-	struct mtd_info *mtd = dev_get_priv(udev->parent);
 
 	desc->bdev->priv = mtd;
 	sprintf(desc->vendor, "0x%.4x", 0x2207);

commit 4569f424981c5e691791a043dc489b8b4508995c
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Aug 12 17:57:38 2019 +0800

    rockchip: common: add mtd_blk spi nand scan support
    
    Change-Id: Ibe59252b9648b61b733f7154ff91ccb90768715f
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index fd860e980b..42b76a1bc4 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -117,6 +117,8 @@
 		"setenv devtype mmc; setenv devnum 0;" \
 	"elif mtd_blk dev 0; then " \
 		"setenv devtype mtd; setenv devnum 0;" \
+	"elif mtd_blk dev 1; then " \
+		"setenv devtype mtd; setenv devnum 1;" \
 	"elif rknand dev 0; then " \
 		"setenv devtype rknand; setenv devnum 0;" \
 	"elif rksfc dev 0; then " \

commit 05b7d8847b1b9f5d977b18f117da275b3264b2c7
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Aug 12 17:50:16 2019 +0800

    mtd: spinand: bind spinand device to mtd block
    
    Change-Id: I90693daafe41ee356b36711353426b60108630f3
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index cb8ffa3fa9..1e3f785321 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -1138,6 +1138,21 @@ static void spinand_cleanup(struct spinand_device *spinand)
 	kfree(spinand->scratchbuf);
 }
 
+static int spinand_bind(struct udevice *udev)
+{
+	int ret = 0;
+
+#ifdef CONFIG_MTD_BLK
+	struct udevice *bdev;
+
+	ret = blk_create_devicef(udev, "mtd_blk", "blk", IF_TYPE_MTD,
+				 1, 512, 0, &bdev);
+	if (ret)
+		printf("Cannot create block device\n");
+#endif
+	return ret;
+}
+
 static int spinand_probe(struct udevice *dev)
 {
 	struct spinand_device *spinand = dev_get_priv(dev);
@@ -1250,6 +1265,7 @@ U_BOOT_DRIVER(spinand) = {
 	.name = "spi_nand",
 	.id = UCLASS_MTD,
 	.of_match = spinand_ids,
+	.bind	= spinand_bind,
 	.priv_auto_alloc_size = sizeof(struct spinand_device),
 	.probe = spinand_probe,
 };

commit e80ec83d323d4219fb2c3ca514e2abd23772db90
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Aug 12 19:31:26 2019 +0800

    rockchip: test: add usb disk test
    
    Add support to test usb disk like other blk device,
    update api to get correct blk_desc.
    
    Change-Id: I6b9cbce42ef16f207ad9d41ca55fa0e58f273ec7
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/test/rockchip/test-storage.c b/test/rockchip/test-storage.c
index 9ba3cd4502..283679ce4c 100644
--- a/test/rockchip/test-storage.c
+++ b/test/rockchip/test-storage.c
@@ -17,8 +17,29 @@
 #include "test-rockchip.h"
 
 #define DEFAULT_STORAGE_RW_PART		"userdata"
+enum if_type blk_get_type_by_name(char* devtype)
+{
+	int type = -1;
+
+	if (!strcmp(devtype, "mmc"))
+		type = IF_TYPE_MMC;
+	else if (!strcmp(devtype, "rknand"))
+		type = IF_TYPE_RKNAND;
+	else if (!strcmp(devtype, "spinand"))
+		type = IF_TYPE_SPINAND;
+	else if (!strcmp(devtype, "spinor"))
+		type = IF_TYPE_SPINOR;
+	else if (!strcmp(devtype, "ramdisk"))
+		type = IF_TYPE_RAMDISK;
+	else if (!strcmp(devtype, "mtd"))
+		type = IF_TYPE_MTD;
+	else if (!strcmp(devtype, "usb"))
+		type = IF_TYPE_USB;
+
+	return type;
+}
 
-#if defined(CONFIG_MMC) || defined(CONFIG_RKNAND) || defined(CONFIG_BLK)
+#if defined(CONFIG_MMC) || defined(CONFIG_RKNAND) || defined(CONFIG_BLK) || defined(CONFIG_USB_HOST)
 static int do_test_storage(cmd_tbl_t *cmdtp, int flag,
 			   int argc, char *const argv[],
 			   const char *devtype,
@@ -33,13 +54,36 @@ static int do_test_storage(cmd_tbl_t *cmdtp, int flag,
 	int i, ret;
 	ulong ts;
 
-	/* 1. Get test partition */
-	dev_desc = rockchip_get_bootdev();
+	/* 1. Switch to device type/num */
+	if (devtype && !strcmp(devtype, "usb")) {
+		if (run_command("usb start", 0)) {
+			printf("Switch to %s%s failed\n", devtype, devnum);
+			ret = -ENODEV;
+			goto err1;
+		}
+	} else if (devtype) {
+		snprintf(cmd, sizeof(cmd), "%s dev %s", devtype, devnum);
+		if (run_command(cmd, 0)) {
+			printf("Switch to %s%s failed\n", devtype, devnum);
+			ret = -ENODEV;
+			goto err1;
+		}
+	}
+	if (!devtype) {
+		/* For blk test only */
+		dev_desc = rockchip_get_bootdev();
+	} else {
+		int if_type;
+		int num = simple_strtoul(devnum, NULL, 10);
+		if_type = blk_get_type_by_name((char *)devtype);
+		dev_desc = blk_get_devnum_by_type(if_type, num);
+	}
 	if (!dev_desc) {
 		ut_err("%s: failed to get blk desc\n", label);
 		return -ENODEV;
 	}
 
+	/* 2. Get test partition */
 	if (part_get_info_by_name(dev_desc,
 				  DEFAULT_STORAGE_RW_PART, &part) < 0) {
 		ut_err("%s: failed to find %s partition\n", label,
@@ -61,15 +105,6 @@ static int do_test_storage(cmd_tbl_t *cmdtp, int flag,
 	       sector, sector + blocks,
 	       (blocks * dev_desc->blksz) >> 20, round);
 
-	/* 2. Switch to devnum */
-	if (devtype) {
-		snprintf(cmd, sizeof(cmd), "%s dev %s", devtype, devnum);
-		if (run_command(cmd, 0)) {
-			printf("Switch to %s%s failed\n", devtype, devnum);
-			ret = -ENODEV;
-			goto err1;
-		}
-	}
 
 	/* 3. Prepare memory */
 	w_buf = sysmem_alloc_by_name("storage_w", blocks * dev_desc->blksz);
@@ -301,6 +336,15 @@ static int do_test_part(cmd_tbl_t *cmdtp, int flag,
 }
 #endif
 
+#ifdef CONFIG_USB_HOST
+static int do_test_usb(cmd_tbl_t *cmdtp, int flag,
+			int argc, char *const argv[])
+{
+	run_command("usb start", 0);
+	return do_test_storage(cmdtp, flag, argc, argv, "usb", "0", "usb0");
+}
+#endif
+
 static cmd_tbl_t sub_cmd[] = {
 #ifdef CONFIG_BLK
 	UNIT_CMD_DEFINE(blk, 0),
@@ -327,6 +371,9 @@ static cmd_tbl_t sub_cmd[] = {
 #ifdef CONFIG_PARTITIONS
 	UNIT_CMD_DEFINE(part, 0),
 #endif
+#ifdef CONFIG_USB_HOST
+	UNIT_CMD_DEFINE(usb, 0),
+#endif
 #ifdef CONFIG_MMC
 	UNIT_CMD_DEFINE(sdmmc, 0),
 #endif
@@ -365,6 +412,9 @@ static char sub_cmd_help[] =
 #ifdef CONFIG_PARTITIONS
 "    [.] rktest part                        - test part list\n"
 #endif
+#ifdef CONFIG_USB_HOST
+"    [.] rktest usb                        - test usb disk\n"
+#endif
 ;
 
 const struct cmd_group cmd_grp_storage = {

commit bd5537509b6c771480165d8de7d5a423ae444197
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Aug 12 19:27:18 2019 +0800

    rockchip: rk3328: correct usb phy phandle in dts
    
    The phy phandle in usb node should be port instead of phy,
    or else the phy driver not able to find the ops and
    abort at generic_phy_get_by_index().
    
    Change-Id: I6aac0c45b882f45136f58062bccd8d1dab79d524
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi
index ea2140daaf..24f958bd72 100644
--- a/arch/arm/dts/rk3328.dtsi
+++ b/arch/arm/dts/rk3328.dtsi
@@ -516,7 +516,7 @@
 		compatible = "generic-ehci";
 		reg = <0x0 0xff5c0000 0x0 0x10000>;
 		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
-		phys = <&u2phy 1>;
+		phys = <&u2phy_host>;
 		phy-names = "usb";
 		status = "disabled";
 	};
@@ -525,7 +525,7 @@
 		compatible = "generic-ohci";
 		reg = <0x0 0xff5d0000 0x0 0x10000>;
 		interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
-		phys = <&u2phy 1>;
+		phys = <&u2phy_host>;
 		phy-names = "usb";
 		status = "disabled";
 	};
@@ -537,7 +537,7 @@
 		interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 		hnp-srp-disable;
 		dr_mode = "otg";
-		phys = <&u2phy 0>;
+		phys = <&u2phy_otg>;
 		phy-names = "usb";
 		status = "disabled";
 	};

commit f99f53c229c663e5567b01db328b74ffe8f3be99
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Aug 12 15:23:24 2019 +0800

    rockchip: dts: rk3328: update node for emmc and usb
    
    Enable related nodes in SPL and move all u-boot related dts
    into -u-boot.dtsi
    
    Change-Id: I1303598f209d20ebf10722f5451151d3e7c6c982
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3328-evb-u-boot.dtsi b/arch/arm/dts/rk3328-evb-u-boot.dtsi
new file mode 100644
index 0000000000..663ee78f7a
--- /dev/null
+++ b/arch/arm/dts/rk3328-evb-u-boot.dtsi
@@ -0,0 +1,19 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include "rk3328-u-boot.dtsi"
+
+&vcc3v3_sdmmc {
+	u-boot,dm-spl;
+};
+
+&vcc5v0_otg {
+	u-boot,dm-spl;
+};
+
+&vcc5v0_host_xhci {
+	u-boot,dm-spl;
+};
diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts
index c7256de867..af9c7b7a89 100644
--- a/arch/arm/dts/rk3328-evb.dts
+++ b/arch/arm/dts/rk3328-evb.dts
@@ -6,7 +6,6 @@
 
 /dts-v1/;
 #include "rk3328.dtsi"
-#include "rk3328-u-boot.dtsi"
 #include "rk3328-sdram-ddr3-666.dtsi"
 #include <dt-bindings/input/input.h>
 
@@ -85,6 +84,7 @@
 	num-slots = <1>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>;
+	vmmc-supply = <&vcc3v3_sdmmc>;
 	status = "okay";
 };
 
@@ -129,6 +129,7 @@
 };
 
 &usb_host0_ehci {
+	vbus-supply = <&vcc5v0_otg>;
 	status = "okay";
 };
 
diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi
index dc5dc68bf5..091eed2146 100644
--- a/arch/arm/dts/rk3328-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-u-boot.dtsi
@@ -34,30 +34,62 @@
 };
 
 &emmc {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 };
 
 &sdmmc {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 };
 
 &saradc {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 	status = "okay";
 };
 
 &usb20_otg {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 };
 
 &usb2phy_grf {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 };
 
 &u2phy {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 };
 
 &u2phy_otg {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
+};
+
+&u2phy_host {
+	u-boot,dm-spl;
+};
+
+&usb_host0_ehci {
+	u-boot,dm-spl;
+};
+
+&usb_host0_xhci {
+	u-boot,dm-spl;
+};
+
+&pinctrl {
+	u-boot,dm-spl;
+};
+
+&sdmmc0_bus4 {
+	u-boot,dm-spl;
+};
+
+&sdmmc0_clk {
+	u-boot,dm-spl;
+};
+
+&sdmmc0_cmd {
+	u-boot,dm-spl;
+};
+
+&sdmmc0_dectn {
+	u-boot,dm-spl;
 };

commit ec0c73794d86de62b5288b62ef419a5cf36d4391
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Aug 12 15:18:21 2019 +0800

    rockchip: config: enable USB HOST driver for rk3328
    
    Enable USB XHCI, EHCI, OHCI and storage drivers.
    
    Change-Id: I22ffe431e04a33d01789fb3d9ed1dc4a6cdbc76f
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index 1e06985868..1050d1e2fe 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -103,6 +103,13 @@ CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y

commit 4ba1647c4cadbe9a48ca6eaeae704da4f352d0ff
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Aug 12 11:39:32 2019 +0800

    rockchip: display: do not print normal info
    
    Convert these two print info into debug info:
    start get public phy
    inno hdmi phy init success, save it
    
    Change-Id: I1c5ad3d313b9ef1820e3445c0de3feda68857664
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 0cdec16e12..ffb0fc8753 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -127,7 +127,7 @@ static int get_public_phy(struct display_state *state,
 		}
 		conn_state->phy = phy;
 
-		printf("inno hdmi phy init success, save it\n");
+		debug("inno hdmi phy init success, save it\n");
 		data->phy_drv = conn_state->phy;
 		data->phy_init = true;
 		return 0;
@@ -179,7 +179,7 @@ static int connector_phy_init(struct display_state *state,
 	if (type == INNO_HDMI_PHY) {
 		/* there is no public phy was initialized */
 		if (!data->phy_init) {
-			printf("start get public phy\n");
+			debug("start get public phy\n");
 			data->public_phy_type = type;
 			if (get_public_phy(state, data)) {
 				printf("can't find correct public phy type\n");

commit 5eac14db172e97ceec514b9d7eeabbabd047aee3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Aug 2 12:09:02 2019 +0800

    power: charge animation: call irq suspend/resume before simple wfi
    
    Some interrupt only need active when suspend(e.g. plugout, pwrkey).
    
    Change-Id: Ieebaa5fbf9f69f424eefe5a52c1517be63acf873
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 48f48c349d..fa0a752085 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -224,9 +224,11 @@ static int system_suspend_enter(struct udevice *dev)
 		putc('1');
 		putc('\n');
 	} else {
+		irqs_suspend();
 		printf("\nWfi\n");
 		wfi();
 		putc('1');
+		irqs_resume();
 	}
 
 	priv->suspend_delay_timeout = get_timer(0);

commit 4f9cab2711b1d07245206315e2889bcf416fd4d9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Aug 2 09:43:41 2019 +0800

    dm: fuel gauge: rename fuel_gauge_get_soc() to fuel_gauge_update_get_soc()
    
    New name is more accurate about internal implementation..
    
    Change-Id: I16891f5f614fbb17f1e65e04ef4d8a713c8624f3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 074cfe9066..48f48c349d 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -377,7 +377,7 @@ static int charge_extrem_low_power(struct udevice *dev)
 		 * Just for fuel gauge to update something important,
 		 * including charge current, coulometer or other.
 		 */
-		soc = fuel_gauge_get_soc(fg);
+		soc = fuel_gauge_update_get_soc(fg);
 		if (soc < 0 || soc > 100) {
 			printf("get soc failed: %d\n", soc);
 			continue;
@@ -559,7 +559,7 @@ static int charge_animation_show(struct udevice *dev)
 		debug("step2 (%d)... show_idx=%d\n", screen_on, show_idx);
 
 		/* Step2: get soc and voltage */
-		soc = fuel_gauge_get_soc(fg);
+		soc = fuel_gauge_update_get_soc(fg);
 		if (soc < 0 || soc > 100) {
 			printf("get soc failed: %d\n", soc);
 			continue;
@@ -847,7 +847,7 @@ static int charge_animation_probe(struct udevice *dev)
 	}
 
 	/* Initialize charge current */
-	soc = fuel_gauge_get_soc(priv->fg);
+	soc = fuel_gauge_update_get_soc(priv->fg);
 	if (soc < 0 || soc > 100) {
 		debug("get soc failed: %d\n", soc);
 		return -EINVAL;
diff --git a/drivers/power/fuel_gauge/fuel_gauge_uclass.c b/drivers/power/fuel_gauge/fuel_gauge_uclass.c
index d766c57ee9..bbe8147ed9 100644
--- a/drivers/power/fuel_gauge/fuel_gauge_uclass.c
+++ b/drivers/power/fuel_gauge/fuel_gauge_uclass.c
@@ -50,7 +50,7 @@ int fuel_gauge_get_voltage(struct udevice *dev)
 	return ops->get_voltage(dev);
 }
 
-int fuel_gauge_get_soc(struct udevice *dev)
+int fuel_gauge_update_get_soc(struct udevice *dev)
 {
 	const struct dm_fuel_gauge_ops *ops = dev_get_driver_ops(dev);
 
diff --git a/include/power/fuel_gauge.h b/include/power/fuel_gauge.h
index ee6c3e5f0e..0685a33273 100644
--- a/include/power/fuel_gauge.h
+++ b/include/power/fuel_gauge.h
@@ -22,7 +22,7 @@ struct dm_fuel_gauge_ops {
 
 int fuel_gauge_capability(struct udevice *dev);
 int fuel_gauge_bat_is_exist(struct udevice *dev);
-int fuel_gauge_get_soc(struct udevice *dev);
+int fuel_gauge_update_get_soc(struct udevice *dev);
 int fuel_gauge_get_voltage(struct udevice *dev);
 int fuel_gauge_get_current(struct udevice *dev);
 bool fuel_gauge_get_chrg_online(struct udevice *dev);

commit 01c5bab16131f633f42f5b8fa6447df6e3a696f7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Jul 27 17:11:23 2019 +0800

    input: rk8xx pwrkey: refactor to match irq chip framework
    
    The PIMC as parent has register the interrupt controller as a irq chip,
    and as a children, this driver only cares about the rise/fall event.
    
    Change-Id: I934901a786b70920cd413e1fb15c8a5c372ea399
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/rk8xx_pwrkey.c b/drivers/input/rk8xx_pwrkey.c
index 6294aa88b4..1a91d71576 100644
--- a/drivers/input/rk8xx_pwrkey.c
+++ b/drivers/input/rk8xx_pwrkey.c
@@ -8,255 +8,69 @@
 #include <dm.h>
 #include <key.h>
 #include <linux/input.h>
-#include <power/pmic.h>
 #include <power/rk8xx_pmic.h>
 #include <irq-generic.h>
-#include <asm/arch/periph.h>
-#include <dm/pinctrl.h>
 
-#define	RK817_INT_STS_REG0	0xf8
-#define	RK817_INT_MSK_REG0	0xf9
-#define	RK817_INT_STS_REG1	0xfa
-#define	RK817_INT_MSK_REG1	0xfb
-#define	RK817_INT_STS_REG2	0xfc
-#define	RK817_INT_MSK_REG2	0xfd
-#define RK817_PWRON_RISE_INT	(1 << 1)
-#define RK817_PWRON_FALL_INT	(1 << 0)
-#define RK817_PLUG_OUT_INT	(1 << 1)
-
-#define	RK816_INT_STS_REG1	0x49
-#define	RK816_INT_MSK_REG1	0x4a
-#define	RK816_INT_STS_REG2	0x4c
-#define	RK816_INT_MSK_REG2	0x4d
-#define	RK816_INT_STS_REG3	0x4e
-#define	RK816_INT_MSK_REG3	0x4f
-#define RK816_PWRON_RISE_INT	(1 << 6)
-#define RK816_PWRON_FALL_INT	(1 << 5)
-#define RK816_PLUG_OUT_INT	(1 << 1)
-
-#define	RK805_INT_STS_REG	0x4c
-#define	RK805_INT_MSK_REG	0x4d
-#define RK805_PWRON_RISE_INT	(1 << 0)
-#define RK805_PWRON_FALL_INT	(1 << 7)
-
-struct rk8xx_key_priv {
-	u8 key_int_sts_reg;
-	u8 key_int_msk_reg;
-	u8 plug_int_sts_reg;
-	u8 plug_int_msk_reg;
-	u8 pwron_rise_int;
-	u8 pwron_fall_int;
-	u8 plug_out_int;
-	struct reg_data *init_reg;
-	u32 init_reg_num;
-	struct reg_data *irq_reg;
-	u32 irq_reg_num;
-};
-
-static struct reg_data rk817_init_reg[] = {
-	/* only enable rise/fall interrupt, plugout */
-	{ RK817_INT_MSK_REG0, 0xfc },
-	{ RK817_INT_MSK_REG1, 0xfd },
-	{ RK817_INT_MSK_REG2, 0xff },
-	/* clear all interrupt states */
-	{ RK817_INT_STS_REG0, 0xff },
-	{ RK817_INT_STS_REG1, 0xff },
-	{ RK817_INT_STS_REG2, 0xff },
-};
-
-static struct reg_data rk817_irq_reg[] = {
-	/* clear all interrupt states */
-	{ RK817_INT_STS_REG0, 0xff },
-	{ RK817_INT_STS_REG1, 0xff },
-	{ RK817_INT_STS_REG2, 0xff },
-};
-
-static struct reg_data rk816_init_reg[] = {
-	/* only enable rise/fall interrupt, plugout */
-	{ RK816_INT_MSK_REG1, 0x9f },
-	{ RK816_INT_MSK_REG2, 0xff },
-	{ RK816_INT_MSK_REG3, 0xfd },
-	/* clear all interrupt states */
-	{ RK816_INT_STS_REG1, 0xff },
-	{ RK816_INT_STS_REG2, 0xff },
-	{ RK816_INT_STS_REG3, 0xff },
-};
-
-static struct reg_data rk816_irq_reg[] = {
-	/* clear all interrupt states */
-	{ RK816_INT_STS_REG1, 0xff },
-	{ RK816_INT_STS_REG2, 0xff },
-	{ RK816_INT_STS_REG3, 0xff },
-};
-
-static struct reg_data rk805_irq_reg[] = {
-	/* clear all interrupt states */
-	{ RK805_INT_STS_REG, 0xff },
-};
-
-static struct reg_data rk805_init_reg[] = {
-	/* only enable rise/fall interrupt */
-	{ RK805_INT_MSK_REG, 0x7e },
-	/* clear all interrupt states */
-	{ RK805_INT_STS_REG, 0xff },
-};
-
-static void pwrkey_irq_handler(int irq, struct udevice *dev)
+static void rk8xx_pwron_rise_handler(int irq, void *data)
 {
-	struct rk8xx_key_priv *priv = dev_get_priv(dev);
-	struct dm_key_uclass_platdata *uc_key = dev_get_uclass_platdata(dev);
-	int ret, val, i;
-
-	debug("%s: irq = %d\n", __func__, irq);
-
-	/*
-	 * This plug out interrupt only used to wakeup cpu while U-Boot
-	 * charging and system suspend. Because we need to detect charger
-	 * plug out event and then shutdown system.
-	 */
-	if (priv->plug_int_sts_reg) {
-		val = pmic_reg_read(dev->parent, priv->plug_int_sts_reg);
-		if (val < 0) {
-			printf("%s: i2c read failed, ret=%d\n", __func__, val);
-			return;
-		}
+	struct udevice *dev = data;
+	struct dm_key_uclass_platdata *key;
 
-		if (val & priv->plug_out_int)
-			printf("Plug out interrupt\n");
-	}
-
-	/* read key status */
-	val = pmic_reg_read(dev->parent, priv->key_int_sts_reg);
-	if (val < 0) {
-		printf("%s: i2c read failed, ret=%d\n", __func__, val);
-		return;
-	}
-
-	/* fall event */
-	if (val & priv->pwron_fall_int) {
-		uc_key->fall_ms = key_timer(0);
-		debug("%s: key down: %llu ms\n", __func__, uc_key->fall_ms);
-	}
+	key = dev_get_uclass_platdata(dev);
+	key->rise_ms = key_timer(0);
 
-	/* rise event */
-	if (val & priv->pwron_rise_int) {
-		uc_key->rise_ms = key_timer(0);
-		debug("%s: key up: %llu ms\n", __func__, uc_key->rise_ms);
-	}
-
-	/* clear intertup */
-	for (i = 0; i < priv->irq_reg_num; i++) {
-		ret = pmic_reg_write(dev->parent,
-				     priv->irq_reg[i].reg,
-				     priv->irq_reg[i].val);
-		if (ret < 0) {
-			printf("%s: i2c write reg 0x%x failed, ret=%d\n",
-			       __func__, priv->irq_reg[i].reg, ret);
-		}
-
-		debug("%s: reg[0x%x] = 0x%x\n", __func__, priv->irq_reg[i].reg,
-		      pmic_reg_read(dev->parent, priv->irq_reg[i].reg));
-	}
+	debug("%s: %llu ms\n", __func__, key->rise_ms);
 }
 
-static int pwrkey_interrupt_init(struct udevice *dev)
+static void rk8xx_pwron_fall_handler(int irq, void *data)
 {
-	struct dm_key_uclass_platdata *uc_key = dev_get_uclass_platdata(dev);
-	u32 interrupt[2], phandle;
-	int ret;
+	struct udevice *dev = data;
+	struct dm_key_uclass_platdata *key;
 
-	phandle = dev_read_u32_default(dev->parent, "interrupt-parent", -1);
-	if (phandle < 0) {
-		printf("read 'interrupt-parent' failed, ret=%d\n", phandle);
-		return phandle;
-	}
+	key = dev_get_uclass_platdata(dev);
+	key->fall_ms = key_timer(0);
 
-	ret = dev_read_u32_array(dev->parent, "interrupts", interrupt, 2);
-	if (ret) {
-		printf("read 'interrupt' failed, ret=%d\n", ret);
-		return ret;
-	}
-
-	uc_key->name = "rk8xx_pwr";
-	uc_key->type = GPIO_KEY;
-	uc_key->code = KEY_POWER;
-	uc_key->gpios[0] = phandle;
-	uc_key->gpios[1] = interrupt[0];
-	uc_key->irq_thread = pwrkey_irq_handler;
-
-	return 0;
+	debug("%s: %llu ms\n", __func__, key->fall_ms);
 }
 
 static int rk8xx_pwrkey_probe(struct udevice *dev)
 {
 	struct rk8xx_priv *rk8xx = dev_get_priv(dev->parent);
-	struct rk8xx_key_priv *priv = dev_get_priv(dev);
-	int ret, i;
-
-	switch (rk8xx->variant) {
-	case RK805_ID:
-		priv->key_int_sts_reg = RK805_INT_STS_REG;
-		priv->key_int_msk_reg = RK805_INT_MSK_REG;
-		priv->pwron_rise_int = RK805_PWRON_RISE_INT;
-		priv->pwron_fall_int = RK805_PWRON_FALL_INT;
-		priv->init_reg = rk805_init_reg;
-		priv->init_reg_num = ARRAY_SIZE(rk805_init_reg);
-		priv->irq_reg = rk805_irq_reg;
-		priv->irq_reg_num = ARRAY_SIZE(rk805_irq_reg);
-		break;
+	struct dm_key_uclass_platdata *key = dev_get_uclass_platdata(dev);
+	int fall_irq, rise_irq;
 
-	case RK816_ID:
-		priv->key_int_sts_reg = RK816_INT_STS_REG1;
-		priv->key_int_msk_reg = RK816_INT_MSK_REG1;
-		priv->plug_int_sts_reg = RK816_INT_STS_REG3;
-		priv->plug_int_msk_reg = RK816_INT_MSK_REG3;
-		priv->pwron_rise_int = RK816_PWRON_RISE_INT;
-		priv->pwron_fall_int = RK816_PWRON_FALL_INT;
-		priv->plug_out_int = RK816_PLUG_OUT_INT;
-		priv->init_reg = rk816_init_reg;
-		priv->init_reg_num = ARRAY_SIZE(rk816_init_reg);
-		priv->irq_reg = rk816_irq_reg;
-		priv->irq_reg_num = ARRAY_SIZE(rk816_irq_reg);
-		break;
-	case RK809_ID:
-	case RK817_ID:
-		priv->key_int_sts_reg = RK817_INT_STS_REG0;
-		priv->key_int_msk_reg = RK817_INT_MSK_REG0;
-		priv->plug_int_sts_reg = RK817_INT_STS_REG1;
-		priv->plug_int_msk_reg = RK817_INT_MSK_REG1;
-		priv->pwron_rise_int = RK817_PWRON_RISE_INT;
-		priv->pwron_fall_int = RK817_PWRON_FALL_INT;
-		priv->plug_out_int = RK817_PLUG_OUT_INT;
-		priv->init_reg = rk817_init_reg;
-		priv->init_reg_num = ARRAY_SIZE(rk817_init_reg);
-		priv->irq_reg = rk817_irq_reg;
-		priv->irq_reg_num = ARRAY_SIZE(rk817_irq_reg);
-		break;
-	default:
-		return -EINVAL;
+	if (!rk8xx->irq_chip) {
+		printf("Failed to get parent irq chip\n");
+		return -ENOENT;
 	}
 
-	/* mask and clear interrupt */
-	for (i = 0; i < priv->init_reg_num; i++) {
-		ret = pmic_reg_write(dev->parent,
-				     priv->init_reg[i].reg,
-				     priv->init_reg[i].val);
-		if (ret < 0) {
-			printf("%s: i2c write reg 0x%x failed, ret=%d\n",
-			       __func__, priv->init_reg[i].reg, ret);
-			return ret;
-		}
+	fall_irq = virq_to_irq(rk8xx->irq_chip, RK8XX_IRQ_PWRON_FALL);
+	if (fall_irq < 0) {
+		printf("Failed to register pwron fall irq, ret=%d\n", fall_irq);
+		return fall_irq;
+	}
 
-		debug("%s: reg[%x] = 0x%x\n", __func__, priv->init_reg[i].reg,
-		      pmic_reg_read(dev->parent, priv->init_reg[i].reg));
+	rise_irq = virq_to_irq(rk8xx->irq_chip, RK8XX_IRQ_PWRON_RISE);
+	if (rise_irq < 0) {
+		printf("Failed to register pwron rise irq, ret=%d\n", rise_irq);
+		return rise_irq;
 	}
 
-	return pwrkey_interrupt_init(dev);
+	key->name = "rk8xx_pwr";
+	key->type = GPIO_KEY;
+	key->code = KEY_POWER;
+	key->skip_irq_init = 1;
+
+	irq_install_handler(fall_irq, rk8xx_pwron_fall_handler, dev);
+	irq_install_handler(rise_irq, rk8xx_pwron_rise_handler, dev);
+	irq_handler_enable(fall_irq);
+	irq_handler_enable(rise_irq);
+
+	return 0;
 }
 
 U_BOOT_DRIVER(rk8xx_pwrkey) = {
 	.name   = "rk8xx_pwrkey",
 	.id     = UCLASS_KEY,
 	.probe  = rk8xx_pwrkey_probe,
-	.priv_auto_alloc_size = sizeof(struct rk8xx_key_priv),
 };

commit 0f9d23ea98fe66deb716c07ffb9005e8261048a2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Jul 27 17:10:27 2019 +0800

    dm: key: allow power key to skip irq handler init
    
    At sometime, its parent driver would setup the main interrupt(e.g. PMIC).
    
    Change-Id: I8d24266c48f515fc92c3529a5b6aa7a18d181af1
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/key-uclass.c b/drivers/input/key-uclass.c
index 5c74ca1c6a..46bcb30a34 100644
--- a/drivers/input/key-uclass.c
+++ b/drivers/input/key-uclass.c
@@ -274,6 +274,9 @@ static int key_post_probe(struct udevice *dev)
 #ifdef CONFIG_IRQ
 			int irq;
 
+			if (uc_key->skip_irq_init)
+				return 0;
+
 			irq = phandle_gpio_to_irq(uc_key->gpios[0],
 						  uc_key->gpios[1]);
 			if (irq < 0) {
diff --git a/include/key.h b/include/key.h
index ad7bc1ad49..4692c4ca11 100644
--- a/include/key.h
+++ b/include/key.h
@@ -47,6 +47,8 @@ struct dm_key_uclass_platdata {
 
 	u32 trig_cnt;
 
+	int skip_irq_init;
+
 	/* Only for pwrkey gpio irq */
 	void (*irq_thread)(int irq, struct udevice *dev);
 };

commit ded32713dc9f75f0b42296604f205fdfb9e2c149
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Jul 27 16:41:29 2019 +0800

    power: pmic: register interrupt controller as a irq chip
    
    So that the child drivers can request their irq through the
    generic interrupt framework.
    
    Include: RK805/808/816/817/818.
    
    Change-Id: I5556f2e926e850ac6717a05166eab5e19566d531
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index f8c4f6166a..96ce4809df 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -8,11 +8,142 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <irq-generic.h>
 #include <power/rk8xx_pmic.h>
 #include <power/pmic.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#if defined(CONFIG_IRQ) && !defined(CONFIG_SPL_BUILD)
+/* RK805 */
+static const struct virq_reg rk805_irqs[] = {
+	[RK8XX_IRQ_PWRON_FALL] = {
+		.mask = RK805_IRQ_PWRON_FALL_MSK,
+		.reg_offset = 0,
+	},
+	[RK8XX_IRQ_PWRON_RISE] = {
+		.mask = RK805_IRQ_PWRON_RISE_MSK,
+		.reg_offset = 0,
+	},
+};
+
+static struct virq_chip rk805_irq_chip = {
+	.status_base		= RK805_INT_STS_REG,
+	.mask_base		= RK805_INT_MSK_REG,
+	.num_regs		= 1,
+	.i2c_read		= pmic_reg_read,
+	.i2c_write		= pmic_reg_write,
+	.irqs			= rk805_irqs,
+	.num_irqs		= ARRAY_SIZE(rk805_irqs),
+};
+
+/* RK808 */
+static const struct virq_reg rk808_irqs[] = {
+	[RK8XX_IRQ_PLUG_OUT] = {
+		.mask = RK808_IRQ_PLUG_OUT_MSK,
+		.reg_offset = 1,
+	},
+};
+
+static struct virq_chip rk808_irq_chip = {
+	.status_base		= RK808_INT_STS_REG1,
+	.mask_base		= RK808_INT_MSK_REG1,
+	.irq_reg_stride		= 2,
+	.num_regs		= 2,
+	.i2c_read		= pmic_reg_read,
+	.i2c_write		= pmic_reg_write,
+	.irqs			= rk808_irqs,
+	.num_irqs		= ARRAY_SIZE(rk808_irqs),
+};
+
+/* RK816 */
+static const struct virq_reg rk816_irqs[] = {
+	[RK8XX_IRQ_PWRON_FALL] = {
+		.mask = RK816_IRQ_PWRON_FALL_MSK,
+		.reg_offset = 0,
+	},
+	[RK8XX_IRQ_PWRON_RISE] = {
+		.mask = RK816_IRQ_PWRON_RISE_MSK,
+		.reg_offset = 0,
+	},
+	[RK8XX_IRQ_PLUG_OUT] = {
+		.mask = RK816_IRQ_PLUG_OUT_MSK,
+		.reg_offset = 2,
+	},
+	[RK8XX_IRQ_CHG_OK] = {
+		.mask = RK816_IRQ_CHR_OK_MSK,
+		.reg_offset = 2,
+	},
+};
+
+static struct virq_chip rk816_irq_chip = {
+	.status_base		= RK816_INT_STS_REG1,
+	.mask_base		= RK816_INT_MSK_REG1,
+	.irq_unalign_reg_idx	= 1,	/* idx <= 1, stride = 3 */
+	.irq_unalign_reg_stride	= 3,
+	.irq_reg_stride		= 2,	/* idx > 1, stride = 2 */
+	.num_regs		= 3,
+	.i2c_read		= pmic_reg_read,
+	.i2c_write		= pmic_reg_write,
+	.irqs			= rk816_irqs,
+	.num_irqs		= ARRAY_SIZE(rk816_irqs),
+};
+
+/* RK818 */
+static const struct virq_reg rk818_irqs[] = {
+	[RK8XX_IRQ_PLUG_OUT] = {
+		.mask = RK818_IRQ_PLUG_OUT_MSK,
+		.reg_offset = 1,
+	},
+	[RK8XX_IRQ_CHG_OK] = {
+		.mask = RK818_IRQ_CHR_OK_MSK,
+		.reg_offset = 1,
+	},
+};
+
+static struct virq_chip rk818_irq_chip = {
+	.status_base		= RK818_INT_STS_REG1,
+	.mask_base		= RK818_INT_MSK_REG1,
+	.irq_reg_stride		= 2,
+	.num_regs		= 2,
+	.i2c_read		= pmic_reg_read,
+	.i2c_write		= pmic_reg_write,
+	.irqs			= rk818_irqs,
+	.num_irqs		= ARRAY_SIZE(rk818_irqs),
+};
+
+/* RK817/RK809 */
+static const struct virq_reg rk817_irqs[] = {
+	[RK8XX_IRQ_PWRON_FALL] = {
+		.mask = RK817_IRQ_PWRON_FALL_MSK,
+		.reg_offset = 0,
+	},
+	[RK8XX_IRQ_PWRON_RISE] = {
+		.mask = RK817_IRQ_PWRON_RISE_MSK,
+		.reg_offset = 0,
+	},
+	[RK8XX_IRQ_PLUG_OUT] = {
+		.mask = RK817_IRQ_PLUG_OUT_MSK,
+		.reg_offset = 1,
+	},
+	[RK8XX_IRQ_PLUG_IN] = {
+		.mask = RK817_IRQ_PLUG_IN_MSK,
+		.reg_offset = 1,
+	},
+};
+
+static struct virq_chip rk817_irq_chip = {
+	.status_base		= RK817_INT_STS_REG0,
+	.mask_base		= RK817_INT_MSK_REG0,
+	.irq_reg_stride		= 2,
+	.num_regs		= 3,
+	.i2c_read		= pmic_reg_read,
+	.i2c_write		= pmic_reg_write,
+	.irqs			= rk817_irqs,
+	.num_irqs		= ARRAY_SIZE(rk817_irqs),
+};
+#endif
+
 static struct reg_data rk817_init_reg[] = {
 /* enable the under-voltage protection,
  * the under-voltage protection will shutdown the LDO3 and reset the PMIC
@@ -119,20 +250,33 @@ static int rk8xx_shutdown(struct udevice *dev)
 
 	ret = dm_i2c_read(dev, devctrl_reg, &val, 1);
 	if (ret) {
-		printf("%s: read reg 0x%02x failed, ret=%d\n", __func__, devctrl_reg, ret);
+		printf("%s: read reg 0x%02x failed, ret=%d\n",
+		       __func__, devctrl_reg, ret);
 		return ret;
 	}
 
 	val |= dev_off;
 	ret = dm_i2c_write(dev, devctrl_reg, &val, 1);
 	if (ret) {
-		printf("%s: write reg 0x%02x failed, ret=%d\n", __func__, devctrl_reg, ret);
+		printf("%s: write reg 0x%02x failed, ret=%d\n",
+		       __func__, devctrl_reg, ret);
 		return ret;
 	}
 
 	return 0;
 }
 
+/*
+ * When system suspend during U-Boot charge, make sure the plugout event
+ * be able to wakeup cpu in wfi/wfe state.
+ */
+#ifdef CONFIG_DM_CHARGE_DISPLAY
+static void rk8xx_plug_out_handler(int irq, void *data)
+{
+	printf("Plug out interrupt\n");
+}
+#endif
+
 #if CONFIG_IS_ENABLED(PMIC_CHILDREN)
 static int rk8xx_bind(struct udevice *dev)
 {
@@ -173,6 +317,91 @@ static int rk8xx_bind(struct udevice *dev)
 }
 #endif
 
+#if defined(CONFIG_IRQ) && !defined(CONFIG_SPL_BUILD)
+static int rk8xx_ofdata_to_platdata(struct udevice *dev)
+{
+	struct rk8xx_priv *rk8xx = dev_get_priv(dev);
+	u32 interrupt, phandle;
+	int ret;
+
+	phandle = dev_read_u32_default(dev, "interrupt-parent", -ENODATA);
+	if (phandle == -ENODATA) {
+		printf("Read 'interrupt-parent' failed, ret=%d\n", phandle);
+		return phandle;
+	}
+
+	ret = dev_read_u32_array(dev, "interrupts", &interrupt, 1);
+	if (ret) {
+		printf("Read 'interrupts' failed, ret=%d\n", ret);
+		return ret;
+	}
+
+	rk8xx->irq = phandle_gpio_to_irq(phandle, interrupt);
+	if (rk8xx->irq < 0) {
+		printf("Failed to request rk8xx irq, ret=%d\n", rk8xx->irq);
+		return rk8xx->irq;
+	}
+
+	return 0;
+}
+
+static int rk8xx_irq_chip_init(struct udevice *dev)
+{
+	struct rk8xx_priv *priv = dev_get_priv(dev);
+	struct virq_chip *irq_chip = NULL;
+	int ret;
+
+	switch (priv->variant) {
+	case RK808_ID:
+		irq_chip = &rk808_irq_chip;
+		break;
+	case RK805_ID:
+		irq_chip = &rk805_irq_chip;
+		break;
+	case RK816_ID:
+		irq_chip = &rk816_irq_chip;
+		break;
+	case RK818_ID:
+		irq_chip = &rk818_irq_chip;
+		break;
+	case RK809_ID:
+	case RK817_ID:
+		irq_chip = &rk817_irq_chip;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	if (irq_chip) {
+		ret = virq_add_chip(dev, irq_chip, priv->irq, 1);
+		if (ret) {
+			printf("Failed to add irqchip(irq=%d), ret=%d\n",
+			       priv->irq, ret);
+			return ret;
+		}
+
+		priv->irq_chip = irq_chip;
+
+#ifdef CONFIG_DM_CHARGE_DISPLAY
+		int irq;
+
+		irq = virq_to_irq(irq_chip, RK8XX_IRQ_PLUG_OUT);
+		if (irq < 0) {
+			printf("Failed to register plugout irq, ret=%d\n", irq);
+			return irq;
+		}
+		irq_install_handler(irq, rk8xx_plug_out_handler, dev);
+		irq_handler_enable_suspend_only(irq);
+#endif
+	}
+
+	return 0;
+}
+#else
+static inline int rk8xx_ofdata_to_platdata(struct udevice *dev) { return 0; }
+static inline int rk8xx_irq_chip_init(struct udevice *dev) { return 0; }
+#endif
+
 static int rk8xx_probe(struct udevice *dev)
 {
 	struct rk8xx_priv *priv = dev_get_priv(dev);
@@ -256,6 +485,12 @@ static int rk8xx_probe(struct udevice *dev)
 		       pmic_reg_read(dev, off_source));
 	printf("\n");
 
+	ret = rk8xx_irq_chip_init(dev);
+	if (ret) {
+		printf("IRQ chip initial failed\n");
+		return ret;
+	}
+
 	return 0;
 }
 
@@ -283,7 +518,8 @@ U_BOOT_DRIVER(pmic_rk8xx) = {
 #if CONFIG_IS_ENABLED(PMIC_CHILDREN)
 	.bind = rk8xx_bind,
 #endif
-	.priv_auto_alloc_size   = sizeof(struct rk8xx_priv),
+	.ofdata_to_platdata = rk8xx_ofdata_to_platdata,
+	.priv_auto_alloc_size = sizeof(struct rk8xx_priv),
 	.probe = rk8xx_probe,
 	.ops = &rk8xx_ops,
 };
diff --git a/include/power/rk8xx_pmic.h b/include/power/rk8xx_pmic.h
index 80bf923732..0a15bd431e 100644
--- a/include/power/rk8xx_pmic.h
+++ b/include/power/rk8xx_pmic.h
@@ -215,6 +215,43 @@ enum {
 #define RK817_ON_SOURCE		0xf5
 #define RK817_OFF_SOURCE	0xf6
 
+/* IRQ definitions */
+#define RK8XX_IRQ_PWRON_FALL		0
+#define RK8XX_IRQ_PWRON_RISE		1
+#define RK8XX_IRQ_PLUG_OUT		2
+#define RK8XX_IRQ_PLUG_IN		3
+#define RK8XX_IRQ_CHG_OK		4
+
+#define RK808_INT_STS_REG1		0x4c
+#define RK808_INT_MSK_REG1		0x4d
+#define RK808_IRQ_PLUG_OUT_MSK		BIT(1)
+
+#define RK805_INT_STS_REG		0x4c
+#define RK805_INT_MSK_REG		0x4d
+#define RK805_IRQ_PWRON_FALL_MSK	BIT(7)
+#define RK805_IRQ_PWRON_RISE_MSK	BIT(0)
+
+#define RK816_INT_STS_REG1		0x49
+#define RK816_INT_MSK_REG1		0x4a
+#define RK816_INT_STS_REG3		0x4e
+#define RK816_INT_STS_MSK_REG3		0x4f
+#define RK816_IRQ_PWRON_RISE_MSK	BIT(6)
+#define RK816_IRQ_PWRON_FALL_MSK	BIT(5)
+#define RK816_IRQ_PLUG_OUT_MSK		BIT(1)
+#define RK816_IRQ_CHR_OK_MSK		BIT(2)
+
+#define RK818_INT_STS_REG1		0x4c
+#define RK818_INT_MSK_REG1		0x4d
+#define RK818_IRQ_PLUG_OUT_MSK		BIT(1)
+#define RK818_IRQ_CHR_OK_MSK		BIT(2)
+
+#define	RK817_INT_STS_REG0		0xf8
+#define	RK817_INT_MSK_REG0		0xf9
+#define RK817_IRQ_PWRON_FALL_MSK	BIT(0)
+#define RK817_IRQ_PWRON_RISE_MSK	BIT(1)
+#define RK817_IRQ_PLUG_OUT_MSK		BIT(1)
+#define RK817_IRQ_PLUG_IN_MSK		BIT(0)
+
 struct reg_data {
 	u8 reg;
 	u8 val;
@@ -229,6 +266,8 @@ struct rk8xx_reg_table {
 
 struct rk8xx_priv {
 	int variant;
+	int irq;
+	struct virq_chip *irq_chip;
 };
 
 int rk8xx_spl_configure_buck(struct udevice *pmic, int buck, int uvolt);

commit 92f4f0904bffb59c79dbe38210a3ad16e0eb4a32
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Aug 9 15:00:26 2019 +0800

    irq: add "dump_irqs" command support
    
    Change-Id: Ia20bc3b0f4dc600f311ba3de0e75714b5d4c002c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/irq/irq-generic.c b/drivers/irq/irq-generic.c
index fc2695bbe5..f5cdd09115 100644
--- a/drivers/irq/irq-generic.c
+++ b/drivers/irq/irq-generic.c
@@ -405,3 +405,39 @@ int disable_interrupts(void)
 {
 	return cpu_local_irq_disable();
 }
+
+static int do_dump_irqs(cmd_tbl_t *cmdtp, int flag,
+			int argc, char * const argv[])
+
+{
+	struct udevice *dev;
+	char *drv_name;
+	int pirq;
+
+	printf(" IRQ    En    Handler       Driver         Name              Count\n");
+	printf("----------------------------------------------------------------------\n");
+
+	for (pirq = 0; pirq < PLATFORM_MAX_IRQ; pirq++) {
+		if (!irq_desc[pirq].handle_irq)
+			continue;
+
+		dev = (struct udevice *)irq_desc[pirq].data;
+		if (strstr(dev->name, "gpio"))
+			drv_name = "IRQ";
+		else
+			drv_name = dev->driver->name;
+
+		printf(" %3d	%d     0x%08lx    %-12s    %-12s       %d\n",
+		       pirq, irq_desc[pirq].flag & IRQ_FLG_ENABLE ? 1 : 0,
+		       (ulong)irq_desc[pirq].handle_irq,
+		       drv_name, dev->name, irq_desc[pirq].count);
+
+		virqs_show(pirq);
+	}
+
+	return 0;
+}
+
+U_BOOT_CMD(
+	dump_irqs, 1, 1, do_dump_irqs, "Dump IRQs", ""
+);
diff --git a/drivers/irq/irq-internal.h b/drivers/irq/irq-internal.h
index 0b03815b18..bb4a9c5af9 100644
--- a/drivers/irq/irq-internal.h
+++ b/drivers/irq/irq-internal.h
@@ -36,6 +36,7 @@ struct irq_chip *arch_virq_get_irqchip(void);
  * IRQ-VIRTUAL
  */
 int bad_virq(int irq);
+void virqs_show(int pirq);
 void virq_free_handler(int irq);
 int virq_install_handler(int irq, interrupt_handler_t *handler, void *data);
 
diff --git a/drivers/irq/virq.c b/drivers/irq/virq.c
index 24756a1b4e..9e8bb348d8 100644
--- a/drivers/irq/virq.c
+++ b/drivers/irq/virq.c
@@ -102,6 +102,34 @@ int bad_virq(int irq)
 	return !find_virq_desc(irq);
 }
 
+void virqs_show(int pirq)
+{
+	struct virq_data *vdata;
+	struct virq_desc *desc;
+	struct udevice *dev;
+	int num;
+	int i;
+
+	desc = find_virq_desc_by_pirq(pirq);
+	if (!desc)
+	       return;
+
+	vdata = desc->virqs;
+	num = desc->irq_end - desc->irq_base;
+
+	for (i = 0; i < num; i++) {
+		if (!vdata[i].handle_irq)
+			continue;
+
+		dev = (struct udevice *)vdata[i].data;
+		printf(" %3d    %d     0x%08lx    %-12s    |-- %-12s   %d\n",
+		       vdata[i].irq,
+		       vdata[i].flag & IRQ_FLG_ENABLE ? 1 : 0,
+		       (ulong)vdata[i].handle_irq, dev->driver->name, dev->name,
+		       vdata[i].count);
+	}
+}
+
 int virq_install_handler(int irq, interrupt_handler_t *handler, void *data)
 {
 	struct virq_desc *desc;

commit ae63f11992747d8645f3595abc110cd692f98787
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Aug 9 14:59:06 2019 +0800

    irq: add trigger count and enable/disable stat
    
    Change-Id: I3f29c4e3e420be0fe545a2f55f238345a17eaa6a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/irq/irq-generic.c b/drivers/irq/irq-generic.c
index 9d3c75ab60..fc2695bbe5 100644
--- a/drivers/irq/irq-generic.c
+++ b/drivers/irq/irq-generic.c
@@ -6,6 +6,7 @@
 
 #include <asm/io.h>
 #include <asm/u-boot-arm.h>
+#include <dm.h>
 #include <irq-generic.h>
 #include "irq-internal.h"
 
@@ -14,6 +15,8 @@ DECLARE_GLOBAL_DATA_PTR;
 struct irq_desc {
 	interrupt_handler_t *handle_irq;
 	void *data;
+	u32 flag;
+	u32 count;
 };
 
 struct irqchip_desc {
@@ -60,8 +63,10 @@ void __generic_gpio_handle_irq(int irq)
 		return;
 	}
 
-	if (irq_desc[irq].handle_irq)
+	if (irq_desc[irq].handle_irq) {
+		irq_desc[irq].count++;
 		irq_desc[irq].handle_irq(irq, irq_desc[irq].data);
+	}
 }
 
 void __do_generic_irq_handler(void)
@@ -74,8 +79,10 @@ void __do_generic_irq_handler(void)
 	irq = irqchip.gic->irq_get();
 
 	if (irq < PLATFORM_GIC_MAX_IRQ) {
-		if (irq_desc[irq].handle_irq)
+		if (irq_desc[irq].handle_irq) {
+			irq_desc[irq].count++;
 			irq_desc[irq].handle_irq(irq, irq_desc[irq].data);
+		}
 	}
 
 	irqchip.gic->irq_eoi(irq);
@@ -155,28 +162,42 @@ out:
 
 int irq_handler_enable(int irq)
 {
+	int ret;
+
 	if (bad_irq(irq))
 		return -EINVAL;
 
 	if (irq < PLATFORM_GIC_MAX_IRQ)
-		return irqchip.gic->irq_enable(irq);
+		ret = irqchip.gic->irq_enable(irq);
 	else if (irq < PLATFORM_GPIO_MAX_IRQ)
-		return irqchip.gpio->irq_enable(irq);
+		ret = irqchip.gpio->irq_enable(irq);
 	else
-		return irqchip.virq->irq_enable(irq);
+		ret = irqchip.virq->irq_enable(irq);
+
+	if (!ret && irq < PLATFORM_MAX_IRQ)
+		irq_desc[irq].flag |= IRQ_FLG_ENABLE;
+
+	return ret;
 }
 
 int irq_handler_disable(int irq)
 {
+	int ret;
+
 	if (bad_irq(irq))
 		return -EINVAL;
 
 	if (irq < PLATFORM_GIC_MAX_IRQ)
-		return irqchip.gic->irq_disable(irq);
+		ret = irqchip.gic->irq_disable(irq);
 	else if (irq < PLATFORM_GPIO_MAX_IRQ)
-		return irqchip.gpio->irq_disable(irq);
+		ret = irqchip.gpio->irq_disable(irq);
 	else
-		return irqchip.virq->irq_disable(irq);
+		ret = irqchip.virq->irq_disable(irq);
+
+	if (!ret && irq < PLATFORM_MAX_IRQ)
+		irq_desc[irq].flag &= ~IRQ_FLG_ENABLE;
+
+	return ret;
 }
 
 int irq_set_irq_type(int irq, unsigned int type)
diff --git a/drivers/irq/irq-gpio.c b/drivers/irq/irq-gpio.c
index 403feae7b3..0fbb40752b 100644
--- a/drivers/irq/irq-gpio.c
+++ b/drivers/irq/irq-gpio.c
@@ -4,6 +4,8 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 
+#include <dm.h>
+#include <malloc.h>
 #include "irq-internal.h"
 
 typedef enum GPIOIntType {
@@ -307,14 +309,22 @@ static int gpio_irq_init(void)
 	int i = 0;
 
 	for (i = 0; i < GPIO_BANK_NUM; i++) {
+		struct udevice *dev;
+
+		dev = malloc(sizeof(*dev));
+		if (!dev)
+			return -ENOMEM;
+
 		bank = gpio_id_to_bank(i);
 		if (bank) {
+			dev->name = bank->name;
+
 			/* disable gpio pin interrupt */
 			writel(0, bank->regbase + GPIO_INTEN);
 
 			/* register gpio group irq handler */
 			irq_install_handler(IRQ_GPIO0 + bank->id,
-			(interrupt_handler_t *)generic_gpio_handle_irq, NULL);
+			(interrupt_handler_t *)generic_gpio_handle_irq, dev);
 
 			/* default disable all gpio group interrupt */
 			irq_handler_disable(IRQ_GPIO0 + bank->id);
diff --git a/drivers/irq/irq-internal.h b/drivers/irq/irq-internal.h
index cb00efa268..0b03815b18 100644
--- a/drivers/irq/irq-internal.h
+++ b/drivers/irq/irq-internal.h
@@ -12,6 +12,11 @@
 #include <irq-platform.h>
 #include "irq-internal.h"
 
+/*
+ * IRQ FLAG
+ */
+#define IRQ_FLG_ENABLE			BIT(0)
+
 /*
  * IRQ-NUMBERS
  */
diff --git a/drivers/irq/virq.c b/drivers/irq/virq.c
index 3e5c23f90a..24756a1b4e 100644
--- a/drivers/irq/virq.c
+++ b/drivers/irq/virq.c
@@ -25,6 +25,9 @@ static u32 virq_id_alloc(void)
 
 struct virq_data {
 	int irq;
+	u32 flag;
+	u32 count;
+
 	void *data;
 	interrupt_handler_t *handle_irq;
 };
@@ -190,8 +193,10 @@ void virq_chip_generic_handler(int pirq, void *pdata)
 			irq = vdata[i].irq;
 			data = vdata[i].data;
 
-			if (vdata[i].handle_irq)
+			if (vdata[i].handle_irq) {
+				vdata[i].count++;
 				vdata[i].handle_irq(irq, data);
+			}
 		}
 	}
 
@@ -315,6 +320,11 @@ static int __virq_enable(int irq, int enable)
 		return ret;
 	}
 
+	if (enable)
+		desc->virqs[virq].flag |= IRQ_FLG_ENABLE;
+	else
+		desc->virqs[virq].flag &= ~IRQ_FLG_ENABLE;
+
 	return 0;
 }
 

commit 2c4e90c1f82ec1e96293ab9fcb0105fcfad8d2d1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Aug 2 11:49:18 2019 +0800

    irq: add irq_handler_enable_suspend_only() interface
    
    Change-Id: I3cda4c3a4ce5928be32eaa8b65ccd4e16946c116
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/irq/irq-generic.c b/drivers/irq/irq-generic.c
index ae4cc610bf..9d3c75ab60 100644
--- a/drivers/irq/irq-generic.c
+++ b/drivers/irq/irq-generic.c
@@ -21,6 +21,8 @@ struct irqchip_desc {
 	struct irq_chip *gpio;
 	struct irq_chip *virq;
 
+	int suspend_irq[PLATFORM_SUSPEND_MAX_IRQ];
+	int suspend_num;
 };
 
 static struct irq_desc irq_desc[PLATFORM_MAX_IRQ];
@@ -246,13 +248,38 @@ void irq_free_handler(int irq)
 	}
 }
 
+int irq_handler_enable_suspend_only(int irq)
+{
+	if (bad_irq(irq))
+		return -EINVAL;
+
+	if (irqchip.suspend_num >= PLATFORM_SUSPEND_MAX_IRQ) {
+		printf("Over max count(%d) of suspend irq\n",
+		       PLATFORM_SUSPEND_MAX_IRQ);
+		return -EPERM;
+	}
+
+	irqchip.suspend_irq[irqchip.suspend_num++] = irq;
+	return 0;
+}
+
 int irqs_suspend(void)
 {
+	int i;
+
+	for (i = 0; i < irqchip.suspend_num; i++)
+		irq_handler_enable(irqchip.suspend_irq[i]);
+
 	return irqchip.gic->irq_suspend();
 }
 
 int irqs_resume(void)
 {
+	int i;
+
+	for (i = 0; i < irqchip.suspend_num; i++)
+		irq_handler_disable(irqchip.suspend_irq[i]);
+
 	return irqchip.gic->irq_resume();
 }
 
diff --git a/drivers/irq/irq-internal.h b/drivers/irq/irq-internal.h
index 01d38361a8..cb00efa268 100644
--- a/drivers/irq/irq-internal.h
+++ b/drivers/irq/irq-internal.h
@@ -15,6 +15,7 @@
 /*
  * IRQ-NUMBERS
  */
+#define PLATFORM_SUSPEND_MAX_IRQ	12
 #define PLATFORM_GIC_MAX_IRQ		(GIC_IRQS_NR)
 #define PLATFORM_GPIO_MAX_IRQ		(GIC_IRQS_NR + GPIO_IRQS_NR)
 #define PLATFORM_MAX_IRQ		(GIC_IRQS_NR + GPIO_IRQS_NR)
diff --git a/include/irq-generic.h b/include/irq-generic.h
index f9b91b56e1..c543c4aed3 100644
--- a/include/irq-generic.h
+++ b/include/irq-generic.h
@@ -94,6 +94,7 @@ void irq_free_handler(int irq);
 int irq_set_irq_type(int irq, unsigned int type);
 int irq_revert_irq_type(int irq);
 int irq_handler_enable(int irq);
+int irq_handler_enable_suspend_only(int irq);
 int irq_handler_disable(int irq);
 int irq_get_gpio_level(int irq);
 int irqs_suspend(void);

commit 41766119095f80cbdb26bf10e9ac7347bc3185a3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Jul 27 10:44:31 2019 +0800

    irq: add virq irq-chip support
    
    This patch support the device to add its interrupt controller as "irq chip"
    into generic interrupt framework, the other driver can request its child
    interrupt like a real hardware irq.
    
    Example for PMIC:
        GIC-\
            |- ...
            |- GPIO-\
                    |- ...
                    |- PMIC-\
                            |_ virq_0
                            |_ virq_1
                            |_ virq_2
                            |...
                            |_ virq_n
    
    Change-Id: I17716f3db494a85fc22b23ff18042771a6116da8
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/irq/Makefile b/drivers/irq/Makefile
index 244a65d123..77ee56bd5f 100644
--- a/drivers/irq/Makefile
+++ b/drivers/irq/Makefile
@@ -7,4 +7,5 @@
 obj-y += irq-gic.o
 obj-y += irq-gpio.o
 obj-y += irq-generic.o
-obj-y += irq-gpio-switch.o
\ No newline at end of file
+obj-y += irq-gpio-switch.o
+obj-y += virq.o
diff --git a/drivers/irq/irq-generic.c b/drivers/irq/irq-generic.c
index cbd47291ea..ae4cc610bf 100644
--- a/drivers/irq/irq-generic.c
+++ b/drivers/irq/irq-generic.c
@@ -19,6 +19,8 @@ struct irq_desc {
 struct irqchip_desc {
 	struct irq_chip *gic;
 	struct irq_chip *gpio;
+	struct irq_chip *virq;
+
 };
 
 static struct irq_desc irq_desc[PLATFORM_MAX_IRQ];
@@ -32,13 +34,17 @@ int bad_irq(int irq)
 		return -EINVAL;
 	}
 
-	if (irq >= PLATFORM_MAX_IRQ) {
-		IRQ_W("IRQ %d: Out of max supported IRQ(%d)\n",
-		      irq, PLATFORM_MAX_IRQ);
-		return -EINVAL;
+	if (irq < PLATFORM_MAX_IRQ) {
+		if (!irq_desc[irq].handle_irq)
+			return -EINVAL;
+	} else {
+		if (bad_virq(irq)) {
+			IRQ_E("Unknown virq: %d\n", irq);
+			return -EINVAL;
+		}
 	}
 
-	return irq_desc[irq].handle_irq ? 0 : -EINVAL;
+	return 0;
 }
 
 /* general interrupt handler for gpio chip */
@@ -81,7 +87,7 @@ int irq_is_busy(int irq)
 static int bad_irq_chip(struct irq_chip *chip)
 {
 	return (!chip->name || !chip->irq_init || !chip->irq_enable ||
-		!chip->irq_disable || !chip->irq_set_type) ? -EINVAL : 0;
+		!chip->irq_disable) ? -EINVAL : 0;
 }
 
 static int __do_arch_irq_init(void)
@@ -113,6 +119,12 @@ static int __do_arch_irq_init(void)
 		goto out;
 	}
 
+	irqchip.virq = arch_virq_get_irqchip();
+	if (bad_irq_chip(irqchip.virq)) {
+		IRQ_E("Bad virq irqchip\n");
+		goto out;
+	}
+
 	ret = irqchip.gic->irq_init();
 	if (ret) {
 		IRQ_E("GIC Interrupt setup failed, ret=%d\n", ret);
@@ -125,6 +137,12 @@ static int __do_arch_irq_init(void)
 		goto out;
 	}
 
+	ret = irqchip.virq->irq_init();
+	if (ret) {
+		IRQ_E("VIRQ Interrupt setup failed, ret=%d\n", ret);
+		goto out;
+	}
+
 	return 0;
 
 out:
@@ -140,8 +158,10 @@ int irq_handler_enable(int irq)
 
 	if (irq < PLATFORM_GIC_MAX_IRQ)
 		return irqchip.gic->irq_enable(irq);
-	else
+	else if (irq < PLATFORM_GPIO_MAX_IRQ)
 		return irqchip.gpio->irq_enable(irq);
+	else
+		return irqchip.virq->irq_enable(irq);
 }
 
 int irq_handler_disable(int irq)
@@ -151,8 +171,10 @@ int irq_handler_disable(int irq)
 
 	if (irq < PLATFORM_GIC_MAX_IRQ)
 		return irqchip.gic->irq_disable(irq);
-	else
+	else if (irq < PLATFORM_GPIO_MAX_IRQ)
 		return irqchip.gpio->irq_disable(irq);
+	else
+		return irqchip.virq->irq_disable(irq);
 }
 
 int irq_set_irq_type(int irq, unsigned int type)
@@ -162,8 +184,10 @@ int irq_set_irq_type(int irq, unsigned int type)
 
 	if (irq < PLATFORM_GIC_MAX_IRQ)
 		return irqchip.gic->irq_set_type(irq, type);
-	else
+	else if (irq < PLATFORM_GPIO_MAX_IRQ)
 		return irqchip.gpio->irq_set_type(irq, type);
+	else
+		return -ENOSYS;
 }
 
 int irq_revert_irq_type(int irq)
@@ -173,8 +197,10 @@ int irq_revert_irq_type(int irq)
 
 	if (irq < PLATFORM_GIC_MAX_IRQ)
 		return 0;
-	else
+	else if (irq < PLATFORM_GPIO_MAX_IRQ)
 		return irqchip.gpio->irq_revert_type(irq);
+	else
+		return -ENOSYS;
 }
 
 int irq_get_gpio_level(int irq)
@@ -184,8 +210,10 @@ int irq_get_gpio_level(int irq)
 
 	if (irq < PLATFORM_GIC_MAX_IRQ)
 		return 0;
-	else
+	else if (irq < PLATFORM_GPIO_MAX_IRQ)
 		return irqchip.gpio->irq_get_gpio_level(irq);
+	else
+		return -ENOSYS;
 }
 
 void irq_install_handler(int irq, interrupt_handler_t *handler, void *data)
@@ -195,17 +223,14 @@ void irq_install_handler(int irq, interrupt_handler_t *handler, void *data)
 		return;
 	}
 
-	if (irq >= PLATFORM_MAX_IRQ) {
-		IRQ_W("IRQ %d: Out of max supported IRQ(%d)\n",
-		      irq, PLATFORM_MAX_IRQ);
-		return;
+	if (irq < PLATFORM_MAX_IRQ) {
+		if (!handler || irq_desc[irq].handle_irq)
+			return;
+		irq_desc[irq].handle_irq = handler;
+		irq_desc[irq].data = data;
+	} else {
+		virq_install_handler(irq, handler, data);
 	}
-
-	if (!handler || irq_desc[irq].handle_irq)
-		return;
-
-	irq_desc[irq].handle_irq = handler;
-	irq_desc[irq].data = data;
 }
 
 void irq_free_handler(int irq)
@@ -213,8 +238,12 @@ void irq_free_handler(int irq)
 	if (irq_handler_disable(irq))
 		return;
 
-	irq_desc[irq].handle_irq = NULL;
-	irq_desc[irq].data = NULL;
+	if (irq < PLATFORM_MAX_IRQ) {
+		irq_desc[irq].handle_irq = NULL;
+		irq_desc[irq].data = NULL;
+	} else {
+		virq_free_handler(irq);
+	}
 }
 
 int irqs_suspend(void)
diff --git a/drivers/irq/irq-internal.h b/drivers/irq/irq-internal.h
index 0d4f4f4a4a..01d38361a8 100644
--- a/drivers/irq/irq-internal.h
+++ b/drivers/irq/irq-internal.h
@@ -24,6 +24,14 @@
  */
 struct irq_chip *arch_gic_get_irqchip(void);
 struct irq_chip *arch_gpio_get_irqchip(void);
+struct irq_chip *arch_virq_get_irqchip(void);
+
+/*
+ * IRQ-VIRTUAL
+ */
+int bad_virq(int irq);
+void virq_free_handler(int irq);
+int virq_install_handler(int irq, interrupt_handler_t *handler, void *data);
 
 /*
  * Other
diff --git a/drivers/irq/virq.c b/drivers/irq/virq.c
new file mode 100644
index 0000000000..3e5c23f90a
--- /dev/null
+++ b/drivers/irq/virq.c
@@ -0,0 +1,347 @@
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <fdtdec.h>
+#include <malloc.h>
+#include <asm/io.h>
+#include <asm/u-boot-arm.h>
+#include <irq-generic.h>
+#include "irq-internal.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static LIST_HEAD(virq_desc_head);
+static u32 virq_id = PLATFORM_MAX_IRQ;
+
+static u32 virq_id_alloc(void)
+{
+	return ++virq_id;
+}
+
+struct virq_data {
+	int irq;
+	void *data;
+	interrupt_handler_t *handle_irq;
+};
+
+/* The structure to maintail the irqchip and child virqs */
+struct virq_desc {
+	struct virq_chip *chip;		/* irq chip */
+	struct virq_data *virqs;	/* child irq data list */
+	struct udevice *parent;		/* parent device */
+	int pirq;			/* parent irq */
+	int irq_base;			/* child irq base */
+	int irq_end;			/* child irq end */
+	uint reg_stride;
+	uint unalign_reg_idx;
+	uint unalign_reg_stride;
+	uint *status_buf;
+
+	struct list_head node;
+};
+
+static struct virq_desc *find_virq_desc(int irq)
+{
+	struct virq_desc *desc;
+	struct list_head *node;
+
+	list_for_each(node, &virq_desc_head) {
+		desc = list_entry(node, struct virq_desc, node);
+		if (irq >= desc->irq_base && irq <= desc->irq_end)
+			return desc;
+	}
+
+	return NULL;
+}
+
+static struct virq_desc *find_virq_desc_by_pirq(int parent_irq)
+{
+	struct virq_desc *desc;
+	struct list_head *node;
+
+	list_for_each(node, &virq_desc_head) {
+		desc = list_entry(node, struct virq_desc, node);
+		if (parent_irq == desc->pirq)
+			return desc;
+	}
+
+	return NULL;
+}
+
+int virq_to_irq(struct virq_chip *chip, int virq)
+{
+	struct virq_desc *desc;
+	struct list_head *node;
+	int irq;
+
+	if (!chip)
+		return -EINVAL;
+
+	list_for_each(node, &virq_desc_head) {
+		desc = list_entry(node, struct virq_desc, node);
+		if (desc->chip == chip) {
+			irq = desc->irq_base + virq;
+			if (irq >= desc->irq_base && irq <= desc->irq_end)
+				return irq;
+		}
+	}
+
+	return -ENONET;
+}
+
+int bad_virq(int irq)
+{
+	return !find_virq_desc(irq);
+}
+
+int virq_install_handler(int irq, interrupt_handler_t *handler, void *data)
+{
+	struct virq_desc *desc;
+	int virq;
+
+	if (!handler)
+		return -EINVAL;
+
+	desc = find_virq_desc(irq);
+	if (!desc)
+		return -ENOENT;
+
+	virq = irq - desc->irq_base;
+	if (desc->virqs[virq].handle_irq)
+		return -EBUSY;
+
+	desc->virqs[virq].handle_irq = handler;
+	desc->virqs[virq].data = data;
+
+	return 0;
+}
+
+void virq_free_handler(int irq)
+{
+	struct virq_desc *desc;
+	int virq;
+
+	desc = find_virq_desc(irq);
+	if (!desc)
+		return;
+
+	virq = irq - desc->irq_base;
+	desc->virqs[virq].handle_irq = NULL;
+	desc->virqs[virq].data = NULL;
+}
+
+static uint reg_base_get(struct virq_desc *desc, uint reg_base, int idx)
+{
+	int reg_addr;
+
+	if (idx <= desc->unalign_reg_idx) {
+		reg_addr = reg_base + (idx * desc->unalign_reg_stride);
+	} else {
+		reg_addr = reg_base +
+			   (desc->unalign_reg_idx * desc->unalign_reg_stride);
+		reg_addr += (idx - desc->unalign_reg_idx) * desc->reg_stride;
+	}
+
+	return reg_addr;
+}
+
+void virq_chip_generic_handler(int pirq, void *pdata)
+{
+	struct virq_chip *chip;
+	struct virq_desc *desc;
+	struct virq_data *vdata;
+	struct udevice *parent;
+	uint status_reg;
+	void *data;
+	int irq;
+	int ret;
+	int i;
+
+	desc = find_virq_desc_by_pirq(pirq);
+	if (!desc)
+		return;
+
+	chip = desc->chip;
+	vdata = desc->virqs;
+	parent = (struct udevice *)pdata;
+
+	if (!chip || !vdata || !parent)
+		return;
+
+	/* Read all status register */
+	for (i = 0; i < chip->num_regs; i++) {
+		status_reg = reg_base_get(desc, chip->status_base, i);
+		desc->status_buf[i] = chip->i2c_read(parent, status_reg);
+		if (desc->status_buf[i] < 0) {
+			printf("%s: Read status register 0x%x failed, ret=%d\n",
+			       __func__, status_reg, desc->status_buf[i]);
+		}
+	}
+
+	/* Handle all virq handler */
+	for (i = 0; i < chip->num_irqs; i++) {
+		if (desc->status_buf[chip->irqs[i].reg_offset] &
+		    chip->irqs[i].mask) {
+			irq = vdata[i].irq;
+			data = vdata[i].data;
+
+			if (vdata[i].handle_irq)
+				vdata[i].handle_irq(irq, data);
+		}
+	}
+
+	/* Clear all status register */
+	for (i = 0; i < chip->num_regs; i++) {
+		status_reg = reg_base_get(desc, chip->status_base, i);
+		ret = chip->i2c_write(parent, status_reg, ~0U);
+		if (ret)
+			printf("%s: Clear status register 0x%x failed, ret=%d\n",
+			       __func__, status_reg, ret);
+	}
+}
+
+int virq_add_chip(struct udevice *dev, struct virq_chip *chip,
+		  int irq, int enable)
+{
+	struct virq_data *vdata;
+	struct virq_desc *desc;
+	uint *status_buf;
+	uint mask_reg;
+	int ret;
+	int i;
+
+	if (irq < 0)
+		return -EINVAL;
+
+	desc = (struct virq_desc *)malloc(sizeof(*desc));
+	if (!desc)
+		return -ENOMEM;
+
+	vdata = (struct virq_data *)calloc(sizeof(*vdata), chip->num_irqs);
+	if (!vdata) {
+		ret = -ENOMEM;
+		goto free1;
+	}
+
+	status_buf = (uint *)calloc(sizeof(*status_buf), chip->num_irqs);
+	if (!status_buf) {
+		ret = -ENOMEM;
+		goto free2;
+	}
+
+	for (i = 0; i < chip->num_irqs; i++)
+		vdata[i].irq = virq_id_alloc();
+
+	desc->parent = dev;
+	desc->pirq = irq;
+	desc->chip = chip;
+	desc->virqs = vdata;
+	desc->irq_base = vdata[0].irq;
+	desc->irq_end = vdata[chip->num_irqs - 1].irq;
+	desc->status_buf = status_buf;
+	desc->reg_stride = chip->irq_reg_stride ? : 1;
+	desc->unalign_reg_stride = chip->irq_unalign_reg_stride ? : 1;
+	desc->unalign_reg_idx = chip->irq_unalign_reg_stride ?
+					chip->irq_unalign_reg_idx : 0;
+	list_add_tail(&desc->node, &virq_desc_head);
+
+	/* Mask all register */
+	for (i = 0; i < chip->num_regs; i++) {
+		mask_reg = reg_base_get(desc, chip->mask_base, i);
+		ret = chip->i2c_write(dev, mask_reg, ~0U);
+		if (ret)
+			printf("%s: Set mask register 0x%x failed, ret=%d\n",
+			       __func__, mask_reg, ret);
+	}
+
+	/* Add parent irq into interrupt framework with generic virq handler */
+	irq_install_handler(irq, virq_chip_generic_handler, dev);
+
+	return enable ? irq_handler_enable(irq) : irq_handler_disable(irq);
+
+free1:
+	free(desc);
+free2:
+	free(status_buf);
+
+	return ret;
+}
+
+static int virq_init(void)
+{
+	INIT_LIST_HEAD(&virq_desc_head);
+	return 0;
+}
+
+static int __virq_enable(int irq, int enable)
+{
+	struct virq_chip *chip;
+	struct virq_desc *desc;
+	uint mask_reg, mask_val;
+	uint reg_val;
+	int virq;
+	int ret;
+
+	desc = find_virq_desc(irq);
+	if (!desc) {
+		printf("%s: %s Invalid irq %d\n",
+		       __func__, enable ? "Enable" : "Disable", irq);
+		return -ENOENT;
+	}
+
+	chip = desc->chip;
+	if (!chip)
+		return -ENOENT;
+
+	virq = irq - desc->irq_base;
+	mask_val = chip->irqs[virq].mask;
+	mask_reg = reg_base_get(desc, chip->mask_base,
+				chip->irqs[virq].reg_offset);
+	reg_val = chip->i2c_read(desc->parent, mask_reg);
+	if (enable)
+		reg_val &= ~mask_val;
+	else
+		reg_val |= mask_val;
+
+	ret = chip->i2c_write(desc->parent, mask_reg, reg_val);
+	if (ret) {
+		printf("%s: Clear status register 0x%x failed, ret=%d\n",
+		       __func__, mask_reg, ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int virq_enable(int irq)
+{
+	if (bad_virq(irq))
+		return -EINVAL;
+
+	return __virq_enable(irq, 1);
+}
+
+static int virq_disable(int irq)
+{
+	if (bad_virq(irq))
+		return -EINVAL;
+
+	return __virq_enable(irq, 0);
+}
+
+struct irq_chip virq_generic_chip = {
+	.name		= "virq-irq-chip",
+	.irq_init	= virq_init,
+	.irq_enable	= virq_enable,
+	.irq_disable	= virq_disable,
+};
+
+struct irq_chip *arch_virq_get_irqchip(void)
+{
+	return &virq_generic_chip;
+}
diff --git a/include/irq-generic.h b/include/irq-generic.h
index fe9b74558c..f9b91b56e1 100644
--- a/include/irq-generic.h
+++ b/include/irq-generic.h
@@ -64,6 +64,30 @@ struct irq_chip {
 	int		(*irq_get_gpio_level)(int irq);
 };
 
+/*
+ * Virtual irq chip structure
+ */
+typedef int(virq_i2c_write_t)(struct udevice *dev, uint reg, uint value);
+typedef int(virq_i2c_read_t)(struct udevice *dev, uint reg);
+
+struct virq_reg {
+	uint reg_offset;
+	uint mask;
+};
+
+struct virq_chip {
+	uint status_base;
+	uint mask_base;
+	uint irq_reg_stride;
+	uint irq_unalign_reg_idx;
+	uint irq_unalign_reg_stride;
+	int num_regs;
+	const struct virq_reg *irqs;
+	int num_irqs;
+	virq_i2c_read_t *i2c_read;
+	virq_i2c_write_t *i2c_write;
+};
+
 /* APIs for irqs */
 void irq_install_handler(int irq, interrupt_handler_t *handler, void *data);
 void irq_free_handler(int irq);
@@ -93,4 +117,9 @@ int gpio_to_irq(struct gpio_desc *gpio);
 int hard_gpio_to_irq(unsigned gpio);
 int phandle_gpio_to_irq(u32 gpio_phandle, u32 pin);
 
+/* Virtual irq */
+int virq_to_irq(struct virq_chip *chip, int virq);
+int virq_add_chip(struct udevice *dev, struct virq_chip *chip,
+		  int irq, int enable);
+
 #endif /* _IRQ_GENERIC_H */

commit cf3442524166385b3cd6b25c51434c4811fe9fac
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Jul 27 09:47:43 2019 +0800

    irq: clean up code
    
    Change-Id: I51c2713b7c42fa798fee6971a2c91d867042ef70
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/irq/irq-generic.c b/drivers/irq/irq-generic.c
index 4d9406b278..cbd47291ea 100644
--- a/drivers/irq/irq-generic.c
+++ b/drivers/irq/irq-generic.c
@@ -7,8 +7,7 @@
 #include <asm/io.h>
 #include <asm/u-boot-arm.h>
 #include <irq-generic.h>
-#include "irq-gic.h"
-#include "irq-gpio.h"
+#include "irq-internal.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -17,27 +16,29 @@ struct irq_desc {
 	void *data;
 };
 
-static struct irq_desc irqs_desc[PLATFORM_MAX_IRQS_NR];
-static struct irq_chip *gic_irq_chip, *gpio_irq_chip;
-static bool initialized;
+struct irqchip_desc {
+	struct irq_chip *gic;
+	struct irq_chip *gpio;
+};
+
+static struct irq_desc irq_desc[PLATFORM_MAX_IRQ];
+static struct irqchip_desc irqchip;
+static bool intr_setup;
 
-static int bad_irq(int irq)
+int bad_irq(int irq)
 {
-	if (irq >= PLATFORM_MAX_IRQS_NR) {
-		IRQ_W("IRQ %d is out of max supported IRQ(%d)\n",
-		      irq, PLATFORM_MAX_IRQS_NR);
+	if (!intr_setup) {
+		IRQ_W("Interrupt framework is not setup\n");
 		return -EINVAL;
 	}
 
-	if (!irqs_desc[irq].handle_irq)
-		return -EINVAL;
-
-	if (!initialized) {
-		IRQ_W("Interrupt framework is not initialized\n");
+	if (irq >= PLATFORM_MAX_IRQ) {
+		IRQ_W("IRQ %d: Out of max supported IRQ(%d)\n",
+		      irq, PLATFORM_MAX_IRQ);
 		return -EINVAL;
 	}
 
-	return 0;
+	return irq_desc[irq].handle_irq ? 0 : -EINVAL;
 }
 
 /* general interrupt handler for gpio chip */
@@ -46,49 +47,48 @@ void __generic_gpio_handle_irq(int irq)
 	if (bad_irq(irq))
 		return;
 
-	if (irq < PLATFORM_GIC_IRQS_NR) {
-		IRQ_W("IRQ %d is not a GPIO irq\n", irq);
+	if (irq < PLATFORM_GIC_MAX_IRQ) {
+		IRQ_W("IRQ %d: Invalid GPIO irq\n", irq);
 		return;
 	}
 
-	if (irqs_desc[irq].handle_irq)
-		irqs_desc[irq].handle_irq(irq, irqs_desc[irq].data);
+	if (irq_desc[irq].handle_irq)
+		irq_desc[irq].handle_irq(irq, irq_desc[irq].data);
 }
 
 void __do_generic_irq_handler(void)
 {
-	u32 irq = gic_irq_chip->irq_get();
+	u32 irq;
+
+	assert(irqchip.gic->irq_get);
+	assert(irqchip.gic->irq_eoi);
 
-	if (irq < PLATFORM_GIC_IRQS_NR) {
-		if (irqs_desc[irq].handle_irq)
-			irqs_desc[irq].handle_irq(irq, irqs_desc[irq].data);
+	irq = irqchip.gic->irq_get();
+
+	if (irq < PLATFORM_GIC_MAX_IRQ) {
+		if (irq_desc[irq].handle_irq)
+			irq_desc[irq].handle_irq(irq, irq_desc[irq].data);
 	}
 
-	gic_irq_chip->irq_eoi(irq);
+	irqchip.gic->irq_eoi(irq);
 }
 
 int irq_is_busy(int irq)
 {
-	return (irq >= 0 && irqs_desc[irq].handle_irq) ? -EBUSY : 0;
+	return (irq >= 0 && irq_desc[irq].handle_irq) ? -EBUSY : 0;
 }
 
 static int bad_irq_chip(struct irq_chip *chip)
 {
-	if (!chip->name ||
-	    !chip->irq_init ||
-	    !chip->irq_enable ||
-	    !chip->irq_disable ||
-	    !chip->irq_set_type)
-		return -EINVAL;
-
-	return 0;
+	return (!chip->name || !chip->irq_init || !chip->irq_enable ||
+		!chip->irq_disable || !chip->irq_set_type) ? -EINVAL : 0;
 }
 
 static int __do_arch_irq_init(void)
 {
-	int irq, err = -EINVAL;
+	int ret = -EINVAL;
 
-	/* After relocation done, bss data initialized */
+	/* After relocation done, bss data intr_setup */
 	if (!(gd->flags & GD_FLG_RELOC)) {
 		IRQ_W("Interrupt framework should initialize after reloc\n");
 		return -EINVAL;
@@ -98,43 +98,39 @@ static int __do_arch_irq_init(void)
 	 * We set true before arch_gpio_irq_init() to avoid fail when
 	 * request irq for gpio banks.
 	 */
-	initialized = true;
-
-	for (irq = 0; irq < PLATFORM_MAX_IRQS_NR; irq++) {
-		irqs_desc[irq].handle_irq = NULL;
-		irqs_desc[irq].data = NULL;
-	}
+	intr_setup = true;
+	memset(irq_desc, 0, sizeof(irq_desc));
 
-	gic_irq_chip = arch_gic_irq_init();
-	if (bad_irq_chip(gic_irq_chip)) {
-		IRQ_E("Bad gic irq chip\n");
+	irqchip.gic = arch_gic_get_irqchip();
+	if (bad_irq_chip(irqchip.gic)) {
+		IRQ_E("Bad gic irqchip\n");
 		goto out;
 	}
 
-	gpio_irq_chip = arch_gpio_irq_init();
-	if (bad_irq_chip(gpio_irq_chip)) {
-		IRQ_E("Bad gpio irq chip\n");
+	irqchip.gpio = arch_gpio_get_irqchip();
+	if (bad_irq_chip(irqchip.gpio)) {
+		IRQ_E("Bad gpio irqchip\n");
 		goto out;
 	}
 
-	err = gic_irq_chip->irq_init();
-	if (err) {
-		IRQ_E("GIC interrupt initial failed, ret=%d\n", err);
+	ret = irqchip.gic->irq_init();
+	if (ret) {
+		IRQ_E("GIC Interrupt setup failed, ret=%d\n", ret);
 		goto out;
 	}
 
-	err = gpio_irq_chip->irq_init();
-	if (err) {
-		IRQ_E("GPIO interrupt initial failed, ret=%d\n", err);
+	ret = irqchip.gpio->irq_init();
+	if (ret) {
+		IRQ_E("GPIO Interrupt setup failed, ret=%d\n", ret);
 		goto out;
 	}
 
 	return 0;
 
 out:
-	initialized = false;
+	intr_setup = false;
 
-	return err;
+	return ret;
 }
 
 int irq_handler_enable(int irq)
@@ -142,10 +138,10 @@ int irq_handler_enable(int irq)
 	if (bad_irq(irq))
 		return -EINVAL;
 
-	if (irq < PLATFORM_GIC_IRQS_NR)
-		return gic_irq_chip->irq_enable(irq);
+	if (irq < PLATFORM_GIC_MAX_IRQ)
+		return irqchip.gic->irq_enable(irq);
 	else
-		return gpio_irq_chip->irq_enable(irq);
+		return irqchip.gpio->irq_enable(irq);
 }
 
 int irq_handler_disable(int irq)
@@ -153,10 +149,10 @@ int irq_handler_disable(int irq)
 	if (bad_irq(irq))
 		return -EINVAL;
 
-	if (irq < PLATFORM_GIC_IRQS_NR)
-		return gic_irq_chip->irq_disable(irq);
+	if (irq < PLATFORM_GIC_MAX_IRQ)
+		return irqchip.gic->irq_disable(irq);
 	else
-		return gpio_irq_chip->irq_disable(irq);
+		return irqchip.gpio->irq_disable(irq);
 }
 
 int irq_set_irq_type(int irq, unsigned int type)
@@ -164,10 +160,10 @@ int irq_set_irq_type(int irq, unsigned int type)
 	if (bad_irq(irq))
 		return -EINVAL;
 
-	if (irq < PLATFORM_GIC_IRQS_NR)
-		return gic_irq_chip->irq_set_type(irq, type);
+	if (irq < PLATFORM_GIC_MAX_IRQ)
+		return irqchip.gic->irq_set_type(irq, type);
 	else
-		return gpio_irq_chip->irq_set_type(irq, type);
+		return irqchip.gpio->irq_set_type(irq, type);
 }
 
 int irq_revert_irq_type(int irq)
@@ -175,10 +171,10 @@ int irq_revert_irq_type(int irq)
 	if (bad_irq(irq))
 		return -EINVAL;
 
-	if (irq < PLATFORM_GIC_IRQS_NR)
+	if (irq < PLATFORM_GIC_MAX_IRQ)
 		return 0;
 	else
-		return gpio_irq_chip->irq_revert_type(irq);
+		return irqchip.gpio->irq_revert_type(irq);
 }
 
 int irq_get_gpio_level(int irq)
@@ -186,30 +182,30 @@ int irq_get_gpio_level(int irq)
 	if (bad_irq(irq))
 		return -EINVAL;
 
-	if (irq < PLATFORM_GIC_IRQS_NR)
+	if (irq < PLATFORM_GIC_MAX_IRQ)
 		return 0;
 	else
-		return gpio_irq_chip->irq_get_gpio_level(irq);
+		return irqchip.gpio->irq_get_gpio_level(irq);
 }
 
 void irq_install_handler(int irq, interrupt_handler_t *handler, void *data)
 {
-	if (irq >= PLATFORM_MAX_IRQS_NR) {
-		IRQ_W("IRQ %d is out of max supported IRQ(%d)\n",
-		      irq, PLATFORM_MAX_IRQS_NR);
+	if (!intr_setup) {
+		IRQ_W("Interrupt framework is not intr_setup\n");
 		return;
 	}
 
-	if (!handler || irqs_desc[irq].handle_irq)
+	if (irq >= PLATFORM_MAX_IRQ) {
+		IRQ_W("IRQ %d: Out of max supported IRQ(%d)\n",
+		      irq, PLATFORM_MAX_IRQ);
 		return;
+	}
 
-	if (!initialized) {
-		IRQ_W("Interrupt framework is not initialized\n");
+	if (!handler || irq_desc[irq].handle_irq)
 		return;
-	}
 
-	irqs_desc[irq].handle_irq = handler;
-	irqs_desc[irq].data = data;
+	irq_desc[irq].handle_irq = handler;
+	irq_desc[irq].data = data;
 }
 
 void irq_free_handler(int irq)
@@ -217,34 +213,18 @@ void irq_free_handler(int irq)
 	if (irq_handler_disable(irq))
 		return;
 
-	irqs_desc[irq].handle_irq = NULL;
-	irqs_desc[irq].data = NULL;
+	irq_desc[irq].handle_irq = NULL;
+	irq_desc[irq].data = NULL;
 }
 
 int irqs_suspend(void)
 {
-	int err;
-
-	err = gic_irq_chip->irq_suspend();
-	if (err) {
-		IRQ_E("IRQs suspend failed, ret=%d\n", err);
-		return err;
-	}
-
-	return 0;
+	return irqchip.gic->irq_suspend();
 }
 
 int irqs_resume(void)
 {
-	int err;
-
-	err = gic_irq_chip->irq_resume();
-	if (err) {
-		IRQ_E("IRQs resume failed, ret=%d\n", err);
-		return err;
-	}
-
-	return 0;
+	return irqchip.gic->irq_resume();
 }
 
 #ifdef CONFIG_ARM64
diff --git a/drivers/irq/irq-gic.c b/drivers/irq/irq-gic.c
index dbd515cb0a..4d8d29ddfa 100644
--- a/drivers/irq/irq-gic.c
+++ b/drivers/irq/irq-gic.c
@@ -5,11 +5,9 @@
  */
 
 #include <common.h>
-#include <asm/io.h>
 #include <asm/gic.h>
 #include <config.h>
-#include <irq-generic.h>
-#include "irq-gic.h"
+#include "irq-internal.h"
 
 #define gicd_readl(offset)	readl((void *)GICD_BASE + (offset))
 #define gicc_readl(offset)	readl((void *)GICC_BASE + (offset))
@@ -139,7 +137,7 @@ static int gic_irq_enable(int irq)
 	u32 val, cpu_mask;
 	u32 shift = (irq % 4) * 8;
 
-	if (irq >= PLATFORM_GIC_IRQS_NR)
+	if (irq >= PLATFORM_GIC_MAX_IRQ)
 		return -EINVAL;
 
 	/* set enable */
@@ -333,7 +331,7 @@ static int gic_irq_init(void)
 	u32 val;
 
 	/* end of interrupt */
-	gicc_writel(PLATFORM_GIC_IRQS_NR, GICC_EOIR);
+	gicc_writel(PLATFORM_GIC_MAX_IRQ, GICC_EOIR);
 
 	/* disable gicc and gicd */
 	gicc_writel(0, GICC_CTLR);
@@ -371,7 +369,7 @@ static struct irq_chip gic_irq_chip = {
 	.irq_set_type	= gic_irq_set_type,
 };
 
-struct irq_chip *arch_gic_irq_init(void)
+struct irq_chip *arch_gic_get_irqchip(void)
 {
 	return &gic_irq_chip;
 }
diff --git a/drivers/irq/irq-gic.h b/drivers/irq/irq-gic.h
deleted file mode 100644
index 1f84de54fc..0000000000
--- a/drivers/irq/irq-gic.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#ifndef _IRQ_GIC_H_
-#define _IRQ_GIC_H_
-
-#include <irq-platform.h>
-
-#define PLATFORM_GIC_IRQS_NR		GIC_IRQS_NR
-#define PLATFORM_GPIO_IRQS_NR		GPIO_IRQS_NR
-#define PLATFORM_MAX_IRQS_NR		(GIC_IRQS_NR + GPIO_IRQS_NR)
-
-struct irq_chip *arch_gic_irq_init(void);
-
-#endif /* _IRQ_GIC_H_ */
diff --git a/drivers/irq/irq-gpio-switch.c b/drivers/irq/irq-gpio-switch.c
index cb228a2f61..2dc33404f8 100644
--- a/drivers/irq/irq-gpio-switch.c
+++ b/drivers/irq/irq-gpio-switch.c
@@ -5,8 +5,7 @@
  */
 
 #include <dm.h>
-#include <irq-generic.h>
-#include "irq-gpio-switch.h"
+#include "irq-internal.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/irq/irq-gpio.c b/drivers/irq/irq-gpio.c
index 3e61d188fa..403feae7b3 100644
--- a/drivers/irq/irq-gpio.c
+++ b/drivers/irq/irq-gpio.c
@@ -4,10 +4,7 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 
-#include <asm/io.h>
-#include <irq-generic.h>
-#include "irq-gpio.h"
-#include "irq-gpio-switch.h"
+#include "irq-internal.h"
 
 typedef enum GPIOIntType {
 	GPIOLevelLow = 0,
@@ -337,7 +334,7 @@ static struct irq_chip gpio_irq_chip = {
 	.irq_get_gpio_level = gpio_irq_get_gpio_level,
 };
 
-struct irq_chip *arch_gpio_irq_init(void)
+struct irq_chip *arch_gpio_get_irqchip(void)
 {
 	return &gpio_irq_chip;
 }
diff --git a/drivers/irq/irq-gpio.h b/drivers/irq/irq-gpio.h
deleted file mode 100644
index 78aa1e8adb..0000000000
--- a/drivers/irq/irq-gpio.h
+++ /dev/null
@@ -1,12 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#ifndef _IRQ_GPIO_H_
-#define _IRQ_GPIO_H_
-
-struct irq_chip *arch_gpio_irq_init(void);
-
-#endif /* _IRQ_GPIO_H_ */
diff --git a/drivers/irq/irq-gpio-switch.h b/drivers/irq/irq-internal.h
similarity index 53%
rename from drivers/irq/irq-gpio-switch.h
rename to drivers/irq/irq-internal.h
index a46604fb03..0d4f4f4a4a 100644
--- a/drivers/irq/irq-gpio-switch.h
+++ b/drivers/irq/irq-internal.h
@@ -4,19 +4,39 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 
-#ifndef _IRQ_GPIO_SWITCH_H_
-#define _IRQ_GPIO_SWITCH_H_
+#ifndef _IRQ_GIC_H_
+#define _IRQ_GIC_H_
 
 #include <asm/io.h>
-#include <common.h>
+#include <irq-generic.h>
 #include <irq-platform.h>
+#include "irq-internal.h"
 
-/* bank and pin bit mask */
+/*
+ * IRQ-NUMBERS
+ */
+#define PLATFORM_GIC_MAX_IRQ		(GIC_IRQS_NR)
+#define PLATFORM_GPIO_MAX_IRQ		(GIC_IRQS_NR + GPIO_IRQS_NR)
+#define PLATFORM_MAX_IRQ		(GIC_IRQS_NR + GPIO_IRQS_NR)
+
+/*
+ * IRQ-CHIP
+ */
+struct irq_chip *arch_gic_get_irqchip(void);
+struct irq_chip *arch_gpio_get_irqchip(void);
+
+/*
+ * Other
+ */
+int bad_irq(int irq);
+
+/*
+ * IRQ-GPIO-SWITCH
+ */
 #define GPIO_BANK_MASK		0xFFFFFF00
 #define GPIO_BANK_OFFSET	8
 #define GPIO_PIN_MASK		0x000000FF
 #define GPIO_PIN_OFFSET		0
-
 #define EINVAL_GPIO		-1
 #define PIN_BASE		GIC_IRQS_NR
 
@@ -29,15 +49,15 @@ struct gpio_bank {
 	int use_count;
 };
 
-#define GPIO_BANK_REGISTER(ID, GPIO_BANK_NUM)	\
-	{								\
-		.name	  = __stringify(gpio##ID),			\
-		.regbase  = (unsigned char __iomem *)GPIO##ID##_PHYS,	\
-		.id	  = ID,						\
-		.irq_base = PIN_BASE + (ID) * (GPIO_BANK_NUM),		\
-		.ngpio    = GPIO_BANK_NUM,				\
-		.use_count = 0						\
-	}
+#define GPIO_BANK_REGISTER(ID, GPIO_BANK_NUM)			\
+{								\
+	.name	  = __stringify(gpio##ID),			\
+	.regbase  = (unsigned char __iomem *)GPIO##ID##_PHYS,	\
+	.id	  = ID,						\
+	.irq_base = PIN_BASE + (ID) * (GPIO_BANK_NUM),		\
+	.ngpio    = GPIO_BANK_NUM,				\
+	.use_count = 0						\
+}
 
 /* gpio bank[31:8] and pin[7:0] */
 #define GPIO_BANK(gpio)		((gpio & GPIO_BANK_MASK) >> GPIO_BANK_OFFSET)
@@ -47,8 +67,9 @@ struct gpio_bank {
 
 int hard_gpio_to_irq(u32 gpio);
 int irq_to_gpio(int irq);
-
 struct gpio_bank *gpio_id_to_bank(unsigned int id);
 struct gpio_bank *gpio_to_bank(unsigned gpio);
 
-#endif	/* _IRQ_GPIO_SWITCH_H_ */
+void __generic_gpio_handle_irq(int irq);
+
+#endif /* _IRQ_GIC_H_ */
diff --git a/include/irq-generic.h b/include/irq-generic.h
index 41b8c1223c..fe9b74558c 100644
--- a/include/irq-generic.h
+++ b/include/irq-generic.h
@@ -93,7 +93,4 @@ int gpio_to_irq(struct gpio_desc *gpio);
 int hard_gpio_to_irq(unsigned gpio);
 int phandle_gpio_to_irq(u32 gpio_phandle, u32 pin);
 
-/* Only irq-gpio.c can call it */
-void __generic_gpio_handle_irq(int irq);
-
 #endif /* _IRQ_GENERIC_H */

commit 0b84b74a16c054cd7b0f295caa18d8f1145a38ef
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Aug 9 14:26:07 2019 +0800

    rockchip: rk3308: more space for ramdisk image on aarch32
    
    It seems ramdisk image needs more space.
    
    Change-Id: Idcdd9ca5b568132381ee1951be603045e1d09d13
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h
index 77e744604b..deb8024938 100644
--- a/include/configs/rk3308_common.h
+++ b/include/configs/rk3308_common.h
@@ -72,7 +72,7 @@
 	"fdt_addr_r=0x02f00000\0" \
 	"kernel_addr_r=0x00058000\0" \
 	"kernel_addr_c=0x2008000\0" \
-	"ramdisk_addr_r=0x03080000\0"
+	"ramdisk_addr_r=0x02880000\0"
 #endif
 
 #include <config_distro_bootcmd.h>

commit 443feaabc131897fe35c274a3f433719de94016d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 8 19:36:06 2019 +0800

    rockchip: test: add failed message for all cases
    
    Failed message with prefix: "[UT-ERROR]: ..."
    
    Change-Id: If44c174fc5e929d154851b4e2bf003c8a666f8b2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/test/rockchip/test-display.c b/test/rockchip/test-display.c
index 2935404ef5..6ee7ec561a 100644
--- a/test/rockchip/test-display.c
+++ b/test/rockchip/test-display.c
@@ -20,6 +20,8 @@ int do_test_display(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 	ret |= rockchip_show_bmp("logo_kernel.bmp");
 	mdelay(2000);
 
+	ut_err("display: failed to show bmp\n");
+
 	return ret;
 }
 
diff --git a/test/rockchip/test-download.c b/test/rockchip/test-download.c
index d62b8c452f..bc0328cf6b 100644
--- a/test/rockchip/test-download.c
+++ b/test/rockchip/test-download.c
@@ -47,6 +47,9 @@ static int do_test_tftp(cmd_tbl_t *cmdtp, int flag,
 	ret |= run_command("dhcp", 0);
 	ret |= run_command(load_cmd, 0);
 
+	if (ret)
+		ut_err("tftp: failed to download file\n");
+
 	return ret;
 }
 #endif
diff --git a/test/rockchip/test-misc.c b/test/rockchip/test-misc.c
index 3102bd6a30..577058d020 100644
--- a/test/rockchip/test-misc.c
+++ b/test/rockchip/test-misc.c
@@ -110,13 +110,13 @@ static int ir_test(void)
 
 	ret = uclass_get_device(UCLASS_RC, 0, &dev);
 	if (ret) {
-		printf("Get rc device failed: %d\n", ret);
+		ut_err("ir: failed to get device, ret=%d\n", ret);
 		goto out;
 	}
 
 	keycode = rc_get_keycode(dev);
 	if (keycode == -ENOSYS) {
-		printf("ir_test: failed to bind driver\n");
+		ut_err("ir: failed to bind driver\n");
 		goto out;
 	}
 
@@ -132,7 +132,7 @@ static int ir_test(void)
 			continue;
 
 		if (keycode != last_keycode || repeat != last_repeat) {
-			printf("ir_test: press key:0x%x repeat:%d\n",
+			printf("ir: press key:0x%x repeat:%d\n",
 			       keycode, repeat);
 			last_keycode = keycode;
 			last_repeat = repeat;
@@ -200,8 +200,10 @@ static int do_test_adc(cmd_tbl_t *cmdtp, int flag,
 
 	chn = argc < 2 ? 0 : strtoul(argv[1], NULL, 10);
 	ret = adc_channel_single_shot("saradc", chn, &val);
-	if (!ret)
-		printf("adc channel%d: adc value is %d\n", chn, val);
+	if (ret)
+		ut_err("adc: failed to get channel%d value, ret=%d\n", chn, ret);
+
+	printf("adc channel%d: adc value is %d\n", chn, val);
 
 	return ret;
 }
diff --git a/test/rockchip/test-power.c b/test/rockchip/test-power.c
index 0529415b1b..1455b13a42 100644
--- a/test/rockchip/test-power.c
+++ b/test/rockchip/test-power.c
@@ -31,12 +31,16 @@ static int regulator_change_voltage(struct udevice *dev)
 
 	/* Test get/set() */
 	save_uV = regulator_get_value(dev);
-	if (save_uV < 0)
+	if (save_uV < 0) {
+		ut_err("regulator: failed to get volt, ret=%d\n", save_uV);
 		return save_uV;
+	}
 
 	ret = regulator_set_value(dev, save_uV);
-	if (ret < 0)
+	if (ret < 0) {
+		ut_err("regulator: failed to set volt, ret=%d\n", ret);
 		return ret;
+	}
 
 	for (i = 1; i < 4; i++) {
 		uV = regulator_get_value(dev);
@@ -46,7 +50,7 @@ static int regulator_change_voltage(struct udevice *dev)
 		       regulator_get_value(dev));
 
 		if ((uV + step_uV * i) != regulator_get_value(dev)) {
-			printf("%s@%s: set voltage failed\n",
+			ut_err("regulator: %s@%s failed to set volt\n",
 			       dev->name, uc_pdata->name);
 			ret = -EINVAL;
 			break;
@@ -66,15 +70,19 @@ static int do_test_regulator(cmd_tbl_t *cmdtp, int flag,
 	int ret;
 
 	ret = uclass_get(UCLASS_REGULATOR, &uc);
-	if (ret)
+	if (ret) {
+		ut_err("regulator: failed to get uclass, ret=%d\n", ret);
 		return ret;
+	}
 
 	for (uclass_first_device(UCLASS_REGULATOR, &dev);
 	     dev;
 	     uclass_next_device(&dev)) {
 		ret = regulator_change_voltage(dev);
-		if (ret)
+		if (ret) {
+			ut_err("regulator: failed to change volt, ret=%d\n", ret);
 			return ret;
+		}
 	}
 
 	return 0;
@@ -107,7 +115,7 @@ static int do_test_wdt(cmd_tbl_t *cmdtp, int flag,
 	ret = uclass_get_device(UCLASS_WDT, 0, &dev);
 	if (ret) {
 		if (ret != -ENODEV)
-			printf("Get watchdog device failed, ret=%d\n", ret);
+			ut_err("wdt: failed to get device, ret=%d\n", ret);
 		return ret;
 	}
 
@@ -128,13 +136,13 @@ static int do_test_thermal(cmd_tbl_t *cmdtp, int flag,
 
 	ret = uclass_get_device(UCLASS_THERMAL, 0, &dev);
 	if (ret) {
-		printf("Get thermal device failed, ret=%d\n", ret);
+		ut_err("thermal: failed to get device, ret=%d\n", ret);
 		return ret;
 	}
 
 	ret = thermal_get_temp(dev, &temp);
 	if (ret) {
-		printf("Get temperature failed, ret=%d\n", ret);
+		ut_err("thermal: failed to get temperature, ret=%d\n", ret);
 		return ret;
 	}
 
@@ -162,8 +170,10 @@ static int do_test_pmic(cmd_tbl_t *cmdtp, int flag,
 		env_set("this_pmic", dev->name);
 		run_command("pmic dev $this_pmic", 0);
 		ret = run_command("pmic dump", 0);
-		if (ret)
+		if (ret) {
+			ut_err("pmic: failed to dump register, ret=%d\n", ret);
 			goto out;
+		}
 	}
 
 out:
diff --git a/test/rockchip/test-rockchip.h b/test/rockchip/test-rockchip.h
index 4e4d2607a2..7ae713ff37 100644
--- a/test/rockchip/test-rockchip.h
+++ b/test/rockchip/test-rockchip.h
@@ -53,4 +53,7 @@ struct cmd_group {
 #define lava_info(fmt, ...)
 #endif
 
+/* Unit test error message */
+#define ut_err(fmt, args...)	printf("[UT-ERROR]: "fmt, ##args)
+
 #endif /* _TEST_ROCKCHIP_H */
diff --git a/test/rockchip/test-storage.c b/test/rockchip/test-storage.c
index 546aed8b0f..9ba3cd4502 100644
--- a/test/rockchip/test-storage.c
+++ b/test/rockchip/test-storage.c
@@ -36,14 +36,14 @@ static int do_test_storage(cmd_tbl_t *cmdtp, int flag,
 	/* 1. Get test partition */
 	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {
-		printf("%s: Can't find dev_desc\n", __func__);
+		ut_err("%s: failed to get blk desc\n", label);
 		return -ENODEV;
 	}
 
 	if (part_get_info_by_name(dev_desc,
 				  DEFAULT_STORAGE_RW_PART, &part) < 0) {
-		printf("%s: Can't find %s part\n",
-		       __func__, DEFAULT_STORAGE_RW_PART);
+		ut_err("%s: failed to find %s partition\n", label,
+		       DEFAULT_STORAGE_RW_PART);
 		return -EINVAL;
 	}
 
@@ -74,14 +74,14 @@ static int do_test_storage(cmd_tbl_t *cmdtp, int flag,
 	/* 3. Prepare memory */
 	w_buf = sysmem_alloc_by_name("storage_w", blocks * dev_desc->blksz);
 	if (!w_buf) {
-		printf("No sysmem for w_buf!\n");
+		ut_err("%s: no sysmem for w_buf\n", label);
 		ret = -ENOMEM;
 		goto err1;
 	}
 
 	r_buf = sysmem_alloc_by_name("storage_r", blocks * dev_desc->blksz);
 	if (!r_buf) {
-		printf("No sysmem for r_buf!\n");
+		ut_err("%s: no sysmem for r_buf\n", label);
 		ret = -ENOMEM;
 		goto err2;
 	}
@@ -98,6 +98,7 @@ static int do_test_storage(cmd_tbl_t *cmdtp, int flag,
 			 devtype, (u32)(ulong)w_buf, sector, blocks);
 		for (i = 0; i < round; i++) {
 			if (run_command(cmd, 0)) {
+				ut_err("%s: failed to write @%d round\n", label, i);
 				ret = -EIO;
 				goto err3;
 			}
@@ -106,6 +107,7 @@ static int do_test_storage(cmd_tbl_t *cmdtp, int flag,
 		for (i = 0; i < round; i++) {
 			ret = blk_dwrite(dev_desc, sector, blocks, w_buf);
 			if (ret != blocks) {
+				ut_err("%s: failed to write @%d round\n", label, i);
 				ret = -EIO;
 				goto err3;
 			}
@@ -124,6 +126,7 @@ static int do_test_storage(cmd_tbl_t *cmdtp, int flag,
 
 		for (i = 0; i < round; i++) {
 			if (run_command(cmd, 0)) {
+				ut_err("%s: failed to read @%d round\n", label, i);
 				ret = -EIO;
 				goto err3;
 			}
@@ -132,6 +135,7 @@ static int do_test_storage(cmd_tbl_t *cmdtp, int flag,
 		for (i = 0; i < round; i++) {
 			ret = blk_dread(dev_desc, sector, blocks, r_buf);
 			if (ret != blocks) {
+				ut_err("%s: failed to read @%d round\n", label, i);
 				ret = -EIO;
 				goto err3;
 			}
@@ -145,7 +149,7 @@ static int do_test_storage(cmd_tbl_t *cmdtp, int flag,
 	/* 6. Verify the context */
 	for (i = 0; i < blocks * dev_desc->blksz; i++) {
 		if (w_buf[i] != r_buf[i]) {
-			printf("%s context compare error!\n", label);
+			ut_err("%s: context compare error\n", label);
 			ret = -EINVAL;
 			goto err3;
 		}
@@ -156,7 +160,7 @@ static int do_test_storage(cmd_tbl_t *cmdtp, int flag,
 	    strcmp(devnum, env_get("devnum"))) {
 		ret = run_command(cmd, 0);
 		if (ret) {
-			printf("Switch to mmc1 failed\n");
+			ut_err("%s: failed to switch to mmc1\n", label);
 			ret = -ENODEV;
 			goto err3;
 		}
@@ -217,8 +221,10 @@ static int do_test_env(cmd_tbl_t *cmdtp, int flag,
 	int ret;
 
 	ret = env_save();
-	if (ret)
+	if (ret) {
+		ut_err("env: failed to save, ret=%d\n", ret);
 		return ret;
+	}
 
 	return env_load();
 }
@@ -242,13 +248,13 @@ static int do_test_efuse(cmd_tbl_t *cmdtp, int flag,
 
 	ret = uclass_get_device(UCLASS_MISC, 0, &dev);
 	if (ret) {
-		printf("Can't find efuse device\n");
+		ut_err("efuse: failed to get device, ret=%d\n", ret);
 		return 0;
 	}
 
 	ret = misc_read(dev, 0, &fuses, sizeof(fuses));
 	if (ret) {
-		printf("Efuse read failed\n");
+		ut_err("efuse: failed to read, ret=%d\n", ret);
 		return 0;
 	}
 
@@ -270,13 +276,13 @@ static int do_test_otp(cmd_tbl_t *cmdtp, int flag,
 	/* retrieve the device */
 	ret = uclass_get_device_by_driver(UCLASS_MISC, 0, &dev);
 	if (ret) {
-		printf("Can't find otp device\n");
+		ut_err("otp: failed to get device, ret=%d\n", ret);
 		return 0;
 	}
 
 	ret = misc_read(dev, 0, &otps, sizeof(otps));
 	if (ret) {
-		printf("OTP read failed\n");
+		ut_err("otp: failed to read, ret=%d\n", ret);
 		return 0;
 	}
 

commit 474718ff26c6f7b4ebd8aaf8335fff141303aff5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 8 18:35:09 2019 +0800

    rockchip: test: storage: do not support user param
    
    Default test case is enough.
    
    Change-Id: Ic3627efc7b1cacd8b86d8303daa26af1f7fd32e7
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/test/rockchip/test-storage.c b/test/rockchip/test-storage.c
index 65e4a52edd..546aed8b0f 100644
--- a/test/rockchip/test-storage.c
+++ b/test/rockchip/test-storage.c
@@ -26,48 +26,38 @@ static int do_test_storage(cmd_tbl_t *cmdtp, int flag,
 			   const char *label)
 {
 	struct blk_desc *dev_desc;
+	disk_partition_t part;
 	u32 blocks, round, sector;
 	char *w_buf, *r_buf;
 	char cmd[64];
 	int i, ret;
 	ulong ts;
 
-	if (argc != 4 && argc != 1)
-		return CMD_RET_USAGE;
-
+	/* 1. Get test partition */
 	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {
 		printf("%s: Can't find dev_desc\n", __func__);
 		return -ENODEV;
 	}
 
-	/* 1. Get input param */
-	if (argc == 4) {
-		sector = simple_strtoul(argv[1], NULL, 0);
-		blocks = simple_strtoul(argv[2], NULL, 0);
-		round  = simple_strtoul(argv[3], NULL, 0);
-	} else {
-		disk_partition_t part;
-
-		if (part_get_info_by_name(dev_desc,
-					  DEFAULT_STORAGE_RW_PART, &part) < 0) {
-			printf("%s: Can't find %s part\n",
-			       __func__, DEFAULT_STORAGE_RW_PART);
-			return -EINVAL;
-		}
-
-		/* 32MB */
-		sector = part.start;
-		blocks = part.size > 0x10000 ? 0x10000 : part.size;
-		round  = 4;
+	if (part_get_info_by_name(dev_desc,
+				  DEFAULT_STORAGE_RW_PART, &part) < 0) {
+		printf("%s: Can't find %s part\n",
+		       __func__, DEFAULT_STORAGE_RW_PART);
+		return -EINVAL;
 	}
 
+	/* 32MB */
+	sector = part.start;
+	blocks = part.size > 0x10000 ? 0x10000 : part.size;
+	round  = 4;
+
 	/* Round up */
 	if (blocks % 2)
 		blocks += 1;
 
 	printf("%s RW sectors on %s 0x%08x - 0x%08x(size: %ld MiB) for %d round\n\n",
-	       label, argc == 1 ? DEFAULT_STORAGE_RW_PART : "",
+	       label, DEFAULT_STORAGE_RW_PART,
 	       sector, sector + blocks,
 	       (blocks * dev_desc->blksz) >> 20, round);
 
@@ -344,11 +334,11 @@ static char sub_cmd_help[] =
 "    [.] rktest blk                         - test blk layer read/write\n"
 #endif
 #ifdef CONFIG_MMC
-"    [.] rktest emmc blk# cnt round         - test emmc read/write speed\n"
+"    [.] rktest emmc                        - test emmc read/write speed\n"
 "    [.] rktest sdmmc                       - test sd card and fat fs read/write\n"
 #endif
 #ifdef CONFIG_RKNAND
-"    [.] rktest rknand blk# cnt round       - test rknand read/write speed\n"
+"    [.] rktest rknand                      - test rknand read/write speed\n"
 #endif
 #if defined(CONFIG_OPTEE_CLIENT) && defined(CONFIG_MMC)
 "    [.] rktest secure_storage              - test secure storage\n"

commit d4a9114ac14e1729fe546e0d9f9313ac322081ff
Author: Shixiang Zheng <shixiang.zheng@rock-chips.com>
Date:   Fri Aug 9 10:06:09 2019 +0800

    video/drm: rockchip_vop: workaround a issue of px30 treat rgb888 as bgr888
    
    Change-Id: I188cc8c32077ade7eef72ebec1b4e54d5736c46a
    Signed-off-by: Shixiang Zheng <shixiang.zheng@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index 4ed3892c90..67fd430061 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -642,6 +642,8 @@ static int rockchip_vop_setup_csc_table(struct display_state *state)
 static int rockchip_vop_set_plane(struct display_state *state)
 {
 	struct crtc_state *crtc_state = &state->crtc_state;
+	const struct rockchip_crtc *crtc = crtc_state->crtc;
+	const struct vop_data *vop_data = crtc->data;
 	struct connector_state *conn_state = &state->conn_state;
 	struct drm_display_mode *mode = &conn_state->mode;
 	u32 act_info, dsp_info, dsp_st, dsp_stx, dsp_sty;
@@ -664,6 +666,14 @@ static int rockchip_vop_set_plane(struct display_state *state)
 	dsp_stx = crtc_x + mode->crtc_htotal - mode->crtc_hsync_start;
 	dsp_sty = crtc_y + mode->crtc_vtotal - mode->crtc_vsync_start;
 	dsp_st = dsp_sty << 16 | (dsp_stx & 0xffff);
+	/*
+	 * PX30 treat rgb888 as bgr888
+	 * so we reverse the rb swap to workaround
+	 */
+	if (VOP_MAJOR(vop_data->version) == 2 &&
+	    VOP_MINOR(vop_data->version) == 6 &&
+	    crtc_state->format == ROCKCHIP_FMT_RGB888)
+		crtc_state->rb_swap = !crtc_state->rb_swap;
 
 	if (mode->flags & DRM_MODE_FLAG_YMIRROR)
 		y_mirror = 1;

commit 34d4668048cfa107e6c0367767f1013432409a8f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 8 19:52:37 2019 +0800

    configs: rk3399: enable CONFIG_CMD_BOOTD
    
    Change-Id: I527b63a7122603eaa6b5e525c5adb190d8c64cb9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
index 9b245b3676..e36f0b5edd 100755
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -26,7 +26,6 @@ CONFIG_FASTBOOT_BUF_ADDR=0x00800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
-# CONFIG_CMD_BOOTD is not set
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_DTIMG=y
 # CONFIG_CMD_ELF is not set

commit b50ed7b8b3aa6462e8300aedc8d9cc81753b1815
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 8 18:12:51 2019 +0800

    common: rkimg: add recovery mode reason
    
    Recovery mode from:
            - MISC partition;
            - "reboot recovery" command;
            - recovery key pressed without usb attach;
    
    Change-Id: I1e43260926acca827d43210023655321f470c3a5
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 46d8ea3113..15eaf7a8b2 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -369,6 +369,11 @@ void board_run_recovery_wipe_data(void)
  * 1st and 2nd cases are static determined at system start and we check it once,
  * while 3th case is dynamically added by U-Boot code, so we have to check it
  * everytime.
+ *
+ * Recovery mode from:
+ *	- MISC partition;
+ *	- "reboot recovery" command;
+ *	- recovery key pressed without usb attach;
  */
 int rockchip_get_boot_mode(void)
 {
@@ -389,7 +394,7 @@ int rockchip_get_boot_mode(void)
 	if (env_reboot_mode) {
 		if (!strcmp(env_reboot_mode, "recovery")) {
 			boot_mode = BOOT_MODE_RECOVERY;
-			printf("boot mode: recovery\n");
+			printf("boot mode: recovery (key)\n");
 		} else if (!strcmp(env_reboot_mode, "fastboot")) {
 			boot_mode = BOOT_MODE_BOOTLOADER;
 			printf("boot mode: fastboot\n");
@@ -439,7 +444,7 @@ fallback:
 		boot_mode = BOOT_MODE_BOOTLOADER;
 		clear_boot_reg = 1;
 	} else if (bmsg && !strcmp(bmsg->command, "boot-recovery")) {
-		printf("boot mode: recovery\n");
+		printf("boot mode: recovery (misc)\n");
 		boot_mode = BOOT_MODE_RECOVERY;
 		clear_boot_reg = 1;
 	} else {
@@ -450,7 +455,7 @@ fallback:
 			clear_boot_reg = 1;
 			break;
 		case BOOT_RECOVERY:
-			/* printf("boot mode: recovery\n"); */
+			printf("boot mode: recovery (cmd)\n");
 			boot_mode = BOOT_MODE_RECOVERY;
 			clear_boot_reg = 1;
 			break;

commit 2b2ef886598d48206aa9382d1d6ca0eb0b51e525
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 8 18:12:13 2019 +0800

    rockchip: boot_mode: remove unused recovery env set
    
    Change-Id: I50920f3b24f37d5bea123c7166eb4ed9e17c7b1e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index a14109f7fe..7d9bd312a0 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -199,10 +199,6 @@ int setup_boot_mode(void)
 		printf("enter charging!\n");
 		env_set("preboot", "setenv preboot; charge");
 		break;
-	case BOOT_MODE_RECOVERY:
-		printf("enter Recovery mode!\n");
-		env_set("reboot_mode", "recovery");
-		break;
 	}
 
 	return 0;

commit 39b850de477706c35ac2e6f4c2493229b5b3dede
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed Aug 7 15:59:15 2019 +0800

    spi: rockchip_sfc add SPI Nand support
    
    Change-Id: Ie31ccacd44d2a7b286db49fd5f18f1ecda663a6f
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/spi/rockchip_sfc.c b/drivers/spi/rockchip_sfc.c
index 5050d427de..39d817b849 100644
--- a/drivers/spi/rockchip_sfc.c
+++ b/drivers/spi/rockchip_sfc.c
@@ -22,6 +22,12 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#ifdef SFC_DEBUG
+#define SFC_DBG printf
+#else
+#define SFC_DBG(args...)
+#endif
+
 struct rockchip_sfc_reg {
 	u32 ctrl;
 	u32 imr;
@@ -42,6 +48,7 @@ struct rockchip_sfc_reg {
 	u32 addr;
 	u32 data;
 };
+
 check_member(rockchip_sfc_reg, data, 0x108);
 
 /*SFC_CTRL*/
@@ -187,7 +194,7 @@ static int rockchip_sfc_reset(struct rockchip_sfc *sfc)
  * SFC_CTRL cannot be set.
  */
 static int rockchip_sfc_wait_idle(struct rockchip_sfc *sfc,
-                                  u32 timeout_ms)
+				  u32 timeout_ms)
 {
 	struct rockchip_sfc_reg *regs = sfc->regbase;
 	unsigned long tbase = get_timer(0);
@@ -196,7 +203,9 @@ static int rockchip_sfc_wait_idle(struct rockchip_sfc *sfc,
 	while (1) {
 		sr = readl(&regs->sr);
 		fsr = readl(&regs->fsr);
-		if ((fsr & SFC_TX_EMPTY) && (fsr & SFC_RX_EMPTY) && !(sr & SFC_BUSY))
+		if ((fsr & SFC_TX_EMPTY) &&
+		    (fsr & SFC_RX_EMPTY) &&
+		    !(sr & SFC_BUSY))
 			break;
 		if (get_timer(tbase) > timeout_ms) {
 			printf("waite sfc idle timeout(sr:0x%08x fsr:0x%08x)\n",
@@ -239,13 +248,39 @@ static void rockchip_sfc_setup_xfer(struct rockchip_sfc *sfc, u32 trb)
 	u32 val = 0x02;
 	u8 data_width = IF_TYPE_STD;
 
-	if (sfc->addr_bits & SFC_ADDR_XBITS)
+	switch (sfc->addr_bits) {
+	case 0:
+		sfc->addr_bits = SFC_ADDR_0BITS;
+		break;
+	case 8:
+		sfc->addr_bits = SFC_ADDR_XBITS;
+		writel(7, &regs->abit);
+		break;
+	case 16:
+		sfc->addr_bits = SFC_ADDR_XBITS;
+		writel(15, &regs->abit);
+		break;
+	case 24:
+		sfc->addr_bits = SFC_ADDR_24BITS;
+		break;
+	case 32:
+		sfc->addr_bits = SFC_ADDR_32BITS;
+		break;
+	default:
+		pr_err("%s addr-bits error %d\n", __func__, sfc->addr_bits);
+		return;
+	}
+	SFC_DBG("--- sfc.addr_bit %x\n", sfc->addr_bits);
+
+	if (sfc->addr_bits == SFC_ADDR_24BITS ||
+	    sfc->addr_bits == SFC_ADDR_32BITS)
 		data_width = rockchip_sfc_get_if_type(sfc);
 
 	val |= (data_width << SFC_DATA_WIDTH_SHIFT);
 
 	rockchip_sfc_wait_idle(sfc, 10);
 
+	SFC_DBG("--- sfc.ctrl %x\n", val);
 	writel(val, &regs->ctrl);
 
 	val = sfc->cmd;
@@ -254,10 +289,13 @@ static void rockchip_sfc_setup_xfer(struct rockchip_sfc *sfc, u32 trb)
 	val |= sfc->addr_bits << SFC_ADDR_BITS_SHIFT;
 	val |= sfc->dummy_bits << SFC_DUMMY_BITS_SHIFT;
 
+	SFC_DBG("--- sfc.cmd %x\n", val);
 	writel(val, &regs->cmd);
 
-	if (sfc->addr_bits & SFC_ADDR_XBITS)
+	if (sfc->addr_bits & SFC_ADDR_XBITS) {
+		SFC_DBG("--- sfc.addr %x\n", sfc->addr);
 		writel(sfc->addr, &regs->addr);
+	}
 }
 
 static int rockchip_sfc_dma_xfer(struct rockchip_sfc *sfc, void *buffer, size_t trb)
@@ -404,7 +442,7 @@ static int rockchip_sfc_pio_xfer(struct rockchip_sfc *sfc, void *buf, u32 len)
 }
 
 static int rockchip_sfc_read(struct rockchip_sfc *sfc, u32 offset,
-                             void *buf, size_t len)
+			     void *buf, size_t len)
 {
 	u32 dma_trans;
 	u32 trb;
@@ -439,9 +477,8 @@ static int rockchip_sfc_read(struct rockchip_sfc *sfc, u32 offset,
 }
 
 static int rockchip_sfc_write(struct rockchip_sfc *sfc, u32 offset,
-                              void *buf, size_t len)
+			      void *buf, size_t len)
 {
-
 	if (len > SFC_MAX_TRB) {
 		printf("out of the max sfc trb");
 		return -EINVAL;
@@ -450,14 +487,13 @@ static int rockchip_sfc_write(struct rockchip_sfc *sfc, u32 offset,
 	if (len && !(len & (ARCH_DMA_MINALIGN - 1)))
 		return rockchip_sfc_dma_xfer(sfc, buf, len);
 	else
-		return rockchip_sfc_pio_xfer(sfc, buf,len);
+		return rockchip_sfc_pio_xfer(sfc, buf, len);
 
 	return 0;
 }
 
 static int rockchip_sfc_do_xfer(struct rockchip_sfc *sfc, void *buf, size_t len)
 {
-
 	if (sfc->rw)
 		return rockchip_sfc_write(sfc, sfc->addr, buf, len);
 	else
@@ -477,9 +513,17 @@ static int rockchip_sfc_xfer(struct udevice *dev, unsigned int bitlen,
 	if (flags & SPI_XFER_BEGIN) {
 		sfc->cmd = pcmd[0];
 		if (len >= 4) {
-			sfc->addr_bits = SFC_ADDR_24BITS;
+			sfc->addr_bits = 24;
 			sfc->dummy_bits = (len - 4) << 3;
 			sfc->addr = pcmd[3] | (pcmd[2] << 8) | (pcmd[1] << 16);
+		} else if (len == 3 && dout) {
+			sfc->addr_bits = 16;
+			sfc->dummy_bits = 0;
+			sfc->addr = pcmd[2] | pcmd[1] << 8;
+		} else if (len == 2 && dout) {
+			sfc->addr_bits = 8;
+			sfc->dummy_bits = 0;
+			sfc->addr = pcmd[1];
 		} else {
 			sfc->addr_bits = 0;
 			sfc->dummy_bits = 0;
@@ -488,7 +532,6 @@ static int rockchip_sfc_xfer(struct udevice *dev, unsigned int bitlen,
 	}
 
 	if (flags & SPI_XFER_END) {
-
 		if (din) {
 			sfc->rw = SFC_RD;
 			data_buf = din;

commit c4d5fc6337f7c764820361a48f0e874840e26379
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue Aug 6 21:06:50 2019 +0800

    cmd: mtd: fix compiler error
    
    Change-Id: Idc4bcd902c02b5dbd6f5aac631f3977f257f606f
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/cmd/mtd.c b/cmd/mtd.c
index 6142223984..31ef7be4eb 100644
--- a/cmd/mtd.c
+++ b/cmd/mtd.c
@@ -8,10 +8,8 @@
  * Author: Miquèl Raynal <miquel.raynal@bootlin.com>
  */
 
-#include <command.h>
 #include <common.h>
-#include <console.h>
-#include <malloc.h>
+#include <command.h>
 #include <mapmem.h>
 #include <mtd.h>
 
@@ -444,8 +442,9 @@ static int do_mtd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return CMD_RET_SUCCESS;
 }
 
-static char mtd_help_text[] =
-#ifdef CONFIG_SYS_LONGHELP
+U_BOOT_CMD(
+	mtd, 10, 1, do_mtd,
+	"MTD utils",
 	"- generic operations on memory technology devices\n\n"
 	"mtd list\n"
 	"mtd read[.raw][.oob]                  <name> <addr> [<off> [<size>]]\n"
@@ -467,7 +466,5 @@ static char mtd_help_text[] =
 	"\t\t* must be a multiple of a page otherwise (special case: default is a page with dump)\n"
 	"\n"
 	"The .dontskipff option forces writing empty pages, don't use it if unsure.\n"
-#endif
-	"";
+);
 
-U_BOOT_CMD(mtd, 10, 1, do_mtd, "MTD utils", mtd_help_text);

commit b99d850cbd4a0e9a9395b506412cce97fb8498a5
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue Aug 6 17:48:53 2019 +0800

    Revert "cmd: mtd: Use the subcmd infrastructure to declare mtd sub-commands"
    
    This reverts commit 9671243e8d10defb06f2ea24fac138c87697d7fc.
    
    Change-Id: Ie34f9feb06aa0525c9fa59d79ecf687a9a572491
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/cmd/mtd.c b/cmd/mtd.c
index cda702d18b..6142223984 100644
--- a/cmd/mtd.c
+++ b/cmd/mtd.c
@@ -15,22 +15,6 @@
 #include <mapmem.h>
 #include <mtd.h>
 
-#include <linux/ctype.h>
-
-static struct mtd_info *get_mtd_by_name(const char *name)
-{
-	struct mtd_info *mtd;
-
-	mtd_probe_devices();
-
-	mtd = get_mtd_device_nm(name);
-	if (IS_ERR_OR_NULL(mtd))
-		printf("MTD device %s not found, ret %ld\n", name,
-		       PTR_ERR(mtd));
-
-	return mtd;
-}
-
 static uint mtd_len_to_pages(struct mtd_info *mtd, u64 len)
 {
 	do_div(len, mtd->writesize);
@@ -193,8 +177,7 @@ static bool mtd_oob_write_is_empty(struct mtd_oob_ops *op)
 	return true;
 }
 
-static int do_mtd_list(cmd_tbl_t *cmdtp, int flag, int argc,
-		       char * const argv[])
+static int do_mtd_list(void)
 {
 	struct mtd_info *mtd;
 	int dev_nb = 0;
@@ -238,287 +221,229 @@ static int mtd_special_write_oob(struct mtd_info *mtd, u64 off,
 	return ret;
 }
 
-static int do_mtd_io(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_mtd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
-	bool dump, read, raw, woob, write_empty_pages, has_pages = false;
-	u64 start_off, off, len, remaining, default_len;
-	struct mtd_oob_ops io_op = {};
-	uint user_addr = 0, npages;
-	const char *cmd = argv[0];
 	struct mtd_info *mtd;
-	u32 oob_len;
-	u8 *buf;
-	int ret;
+	const char *cmd;
+	char *mtd_name;
 
+	/* All MTD commands need at least two arguments */
 	if (argc < 2)
 		return CMD_RET_USAGE;
 
-	mtd = get_mtd_by_name(argv[1]);
-	if (IS_ERR_OR_NULL(mtd))
-		return CMD_RET_FAILURE;
-
-	if (mtd->type == MTD_NANDFLASH || mtd->type == MTD_MLCNANDFLASH)
-		has_pages = true;
-
-	dump = !strncmp(cmd, "dump", 4);
-	read = dump || !strncmp(cmd, "read", 4);
-	raw = strstr(cmd, ".raw");
-	woob = strstr(cmd, ".oob");
-	write_empty_pages = !has_pages || strstr(cmd, ".dontskipff");
+	/* Parse the command name and its optional suffixes */
+	cmd = argv[1];
 
-	argc -= 2;
-	argv += 2;
+	/* List the MTD devices if that is what the user wants */
+	if (strcmp(cmd, "list") == 0)
+		return do_mtd_list();
 
-	if (!dump) {
-		if (!argc) {
-			ret = CMD_RET_USAGE;
-			goto out_put_mtd;
-		}
-
-		user_addr = simple_strtoul(argv[0], NULL, 16);
-		argc--;
-		argv++;
-	}
-
-	start_off = argc > 0 ? simple_strtoul(argv[0], NULL, 16) : 0;
-	if (!mtd_is_aligned_with_min_io_size(mtd, start_off)) {
-		printf("Offset not aligned with a page (0x%x)\n",
-		       mtd->writesize);
-		ret = CMD_RET_FAILURE;
-		goto out_put_mtd;
-	}
-
-	default_len = dump ? mtd->writesize : mtd->size;
-	len = argc > 1 ? simple_strtoul(argv[1], NULL, 16) : default_len;
-	if (!mtd_is_aligned_with_min_io_size(mtd, len)) {
-		len = round_up(len, mtd->writesize);
-		printf("Size not on a page boundary (0x%x), rounding to 0x%llx\n",
-		       mtd->writesize, len);
-	}
-
-	remaining = len;
-	npages = mtd_len_to_pages(mtd, len);
-	oob_len = woob ? npages * mtd->oobsize : 0;
-
-	if (dump)
-		buf = kmalloc(len + oob_len, GFP_KERNEL);
-	else
-		buf = map_sysmem(user_addr, 0);
+	/*
+	 * The remaining commands require also at least a device ID.
+	 * Check the selected device is valid. Ensure it is probed.
+	 */
+	if (argc < 3)
+		return CMD_RET_USAGE;
 
-	if (!buf) {
-		printf("Could not map/allocate the user buffer\n");
-		ret = CMD_RET_FAILURE;
-		goto out_put_mtd;
+	mtd_name = argv[2];
+	mtd_probe_devices();
+	mtd = get_mtd_device_nm(mtd_name);
+	if (IS_ERR_OR_NULL(mtd)) {
+		printf("MTD device %s not found, ret %ld\n",
+		       mtd_name, PTR_ERR(mtd));
+		return CMD_RET_FAILURE;
 	}
+	put_mtd_device(mtd);
 
-	if (has_pages)
-		printf("%s %lld byte(s) (%d page(s)) at offset 0x%08llx%s%s%s\n",
-		       read ? "Reading" : "Writing", len, npages, start_off,
-		       raw ? " [raw]" : "", woob ? " [oob]" : "",
-		       !read && write_empty_pages ? " [dontskipff]" : "");
-	else
-		printf("%s %lld byte(s) at offset 0x%08llx\n",
-		       read ? "Reading" : "Writing", len, start_off);
-
-	io_op.mode = raw ? MTD_OPS_RAW : MTD_OPS_AUTO_OOB;
-	io_op.len = has_pages ? mtd->writesize : len;
-	io_op.ooblen = woob ? mtd->oobsize : 0;
-	io_op.datbuf = buf;
-	io_op.oobbuf = woob ? &buf[len] : NULL;
-
-	/* Search for the first good block after the given offset */
-	off = start_off;
-	while (mtd_block_isbad(mtd, off))
-		off += mtd->erasesize;
-
-	/* Loop over the pages to do the actual read/write */
-	while (remaining) {
-		/* Skip the block if it is bad */
-		if (mtd_is_aligned_with_block_size(mtd, off) &&
-		    mtd_block_isbad(mtd, off)) {
-			off += mtd->erasesize;
-			continue;
+	argc -= 3;
+	argv += 3;
+
+	/* Do the parsing */
+	if (!strncmp(cmd, "read", 4) || !strncmp(cmd, "dump", 4) ||
+	    !strncmp(cmd, "write", 5)) {
+		bool has_pages = mtd->type == MTD_NANDFLASH ||
+				 mtd->type == MTD_MLCNANDFLASH;
+		bool dump, read, raw, woob, write_empty_pages;
+		struct mtd_oob_ops io_op = {};
+		uint user_addr = 0, npages;
+		u64 start_off, off, len, remaining, default_len;
+		u32 oob_len;
+		u8 *buf;
+		int ret;
+
+		dump = !strncmp(cmd, "dump", 4);
+		read = dump || !strncmp(cmd, "read", 4);
+		raw = strstr(cmd, ".raw");
+		woob = strstr(cmd, ".oob");
+		write_empty_pages = !has_pages || strstr(cmd, ".dontskipff");
+
+		if (!dump) {
+			if (!argc)
+				return CMD_RET_USAGE;
+
+			user_addr = simple_strtoul(argv[0], NULL, 16);
+			argc--;
+			argv++;
 		}
 
-		if (read)
-			ret = mtd_read_oob(mtd, off, &io_op);
-		else
-			ret = mtd_special_write_oob(mtd, off, &io_op,
-						    write_empty_pages, woob);
-
-		if (ret) {
-			printf("Failure while %s at offset 0x%llx\n",
-			       read ? "reading" : "writing", off);
-			break;
+		start_off = argc > 0 ? simple_strtoul(argv[0], NULL, 16) : 0;
+		if (!mtd_is_aligned_with_min_io_size(mtd, start_off)) {
+			printf("Offset not aligned with a page (0x%x)\n",
+			       mtd->writesize);
+			return CMD_RET_FAILURE;
 		}
 
-		off += io_op.retlen;
-		remaining -= io_op.retlen;
-		io_op.datbuf += io_op.retlen;
-		io_op.oobbuf += io_op.oobretlen;
-	}
-
-	if (!ret && dump)
-		mtd_dump_device_buf(mtd, start_off, buf, len, woob);
+		default_len = dump ? mtd->writesize : mtd->size;
+		len = argc > 1 ? simple_strtoul(argv[1], NULL, 16) :
+				 default_len;
+		if (!mtd_is_aligned_with_min_io_size(mtd, len)) {
+			len = round_up(len, mtd->writesize);
+			printf("Size not on a page boundary (0x%x), rounding to 0x%llx\n",
+			       mtd->writesize, len);
+		}
 
-	if (dump)
-		kfree(buf);
-	else
-		unmap_sysmem(buf);
+		remaining = len;
+		npages = mtd_len_to_pages(mtd, len);
+		oob_len = woob ? npages * mtd->oobsize : 0;
 
-	if (ret) {
-		printf("%s on %s failed with error %d\n",
-		       read ? "Read" : "Write", mtd->name, ret);
-		ret = CMD_RET_FAILURE;
-	} else {
-		ret = CMD_RET_SUCCESS;
-	}
+		if (dump)
+			buf = kmalloc(len + oob_len, GFP_KERNEL);
+		else
+			buf = map_sysmem(user_addr, 0);
 
-out_put_mtd:
-	put_mtd_device(mtd);
+		if (!buf) {
+			printf("Could not map/allocate the user buffer\n");
+			return CMD_RET_FAILURE;
+		}
 
-	return ret;
-}
+		if (has_pages)
+			printf("%s %lld byte(s) (%d page(s)) at offset 0x%08llx%s%s%s\n",
+			       read ? "Reading" : "Writing", len, npages, start_off,
+			       raw ? " [raw]" : "", woob ? " [oob]" : "",
+			       !read && write_empty_pages ? " [dontskipff]" : "");
+		else
+			printf("%s %lld byte(s) at offset 0x%08llx\n",
+			       read ? "Reading" : "Writing", len, start_off);
+
+		io_op.mode = raw ? MTD_OPS_RAW : MTD_OPS_AUTO_OOB;
+		io_op.len = has_pages ? mtd->writesize : len;
+		io_op.ooblen = woob ? mtd->oobsize : 0;
+		io_op.datbuf = buf;
+		io_op.oobbuf = woob ? &buf[len] : NULL;
+
+		/* Search for the first good block after the given offset */
+		off = start_off;
+		while (mtd_block_isbad(mtd, off))
+			off += mtd->erasesize;
 
-static int do_mtd_erase(cmd_tbl_t *cmdtp, int flag, int argc,
-			char * const argv[])
-{
-	struct erase_info erase_op = {};
-	struct mtd_info *mtd;
-	u64 off, len;
-	bool scrub;
-	int ret;
+		/* Loop over the pages to do the actual read/write */
+		while (remaining) {
+			/* Skip the block if it is bad */
+			if (mtd_is_aligned_with_block_size(mtd, off) &&
+			    mtd_block_isbad(mtd, off)) {
+				off += mtd->erasesize;
+				continue;
+			}
 
-	if (argc < 2)
-		return CMD_RET_USAGE;
+			if (read)
+				ret = mtd_read_oob(mtd, off, &io_op);
+			else
+				ret = mtd_special_write_oob(mtd, off, &io_op,
+							    write_empty_pages,
+							    woob);
+
+			if (ret) {
+				printf("Failure while %s at offset 0x%llx\n",
+				       read ? "reading" : "writing", off);
+				return CMD_RET_FAILURE;
+			}
 
-	mtd = get_mtd_by_name(argv[1]);
-	if (IS_ERR_OR_NULL(mtd))
-		return CMD_RET_FAILURE;
+			off += io_op.retlen;
+			remaining -= io_op.retlen;
+			io_op.datbuf += io_op.retlen;
+			io_op.oobbuf += io_op.oobretlen;
+		}
 
-	scrub = strstr(argv[0], ".dontskipbad");
+		if (!ret && dump)
+			mtd_dump_device_buf(mtd, start_off, buf, len, woob);
 
-	argc -= 2;
-	argv += 2;
+		if (dump)
+			kfree(buf);
+		else
+			unmap_sysmem(buf);
 
-	off = argc > 0 ? simple_strtoul(argv[0], NULL, 16) : 0;
-	len = argc > 1 ? simple_strtoul(argv[1], NULL, 16) : mtd->size;
+		if (ret) {
+			printf("%s on %s failed with error %d\n",
+			       read ? "Read" : "Write", mtd->name, ret);
+			return CMD_RET_FAILURE;
+		}
 
-	if (!mtd_is_aligned_with_block_size(mtd, off)) {
-		printf("Offset not aligned with a block (0x%x)\n",
-		       mtd->erasesize);
-		ret = CMD_RET_FAILURE;
-		goto out_put_mtd;
-	}
+	} else if (!strcmp(cmd, "erase")) {
+		bool scrub = strstr(cmd, ".dontskipbad");
+		struct erase_info erase_op = {};
+		u64 off, len;
+		int ret;
 
-	if (!mtd_is_aligned_with_block_size(mtd, len)) {
-		printf("Size not a multiple of a block (0x%x)\n",
-		       mtd->erasesize);
-		ret = CMD_RET_FAILURE;
-		goto out_put_mtd;
-	}
+		off = argc > 0 ? simple_strtoul(argv[0], NULL, 16) : 0;
+		len = argc > 1 ? simple_strtoul(argv[1], NULL, 16) : mtd->size;
 
-	printf("Erasing 0x%08llx ... 0x%08llx (%d eraseblock(s))\n",
-	       off, off + len - 1, mtd_div_by_eb(len, mtd));
+		if (!mtd_is_aligned_with_block_size(mtd, off)) {
+			printf("Offset not aligned with a block (0x%x)\n",
+			       mtd->erasesize);
+			return CMD_RET_FAILURE;
+		}
 
-	erase_op.mtd = mtd;
-	erase_op.addr = off;
-	erase_op.len = len;
-	erase_op.scrub = scrub;
+		if (!mtd_is_aligned_with_block_size(mtd, len)) {
+			printf("Size not a multiple of a block (0x%x)\n",
+			       mtd->erasesize);
+			return CMD_RET_FAILURE;
+		}
 
-	while (erase_op.len) {
-		ret = mtd_erase(mtd, &erase_op);
+		printf("Erasing 0x%08llx ... 0x%08llx (%d eraseblock(s))\n",
+		       off, off + len - 1, mtd_div_by_eb(len, mtd));
 
-		/* Abort if its not a bad block error */
-		if (ret != -EIO)
-			break;
+		erase_op.mtd = mtd;
+		erase_op.addr = off;
+		erase_op.len = len;
+		erase_op.scrub = scrub;
 
-		printf("Skipping bad block at 0x%08llx\n", erase_op.fail_addr);
+		while (erase_op.len) {
+			ret = mtd_erase(mtd, &erase_op);
 
-		/* Skip bad block and continue behind it */
-		erase_op.len -= erase_op.fail_addr - erase_op.addr;
-		erase_op.len -= mtd->erasesize;
-		erase_op.addr = erase_op.fail_addr + mtd->erasesize;
-	}
+			/* Abort if its not a bad block error */
+			if (ret != -EIO)
+				break;
 
-	if (ret && ret != -EIO)
-		ret = CMD_RET_FAILURE;
-	else
-		ret = CMD_RET_SUCCESS;
+			printf("Skipping bad block at 0x%08llx\n",
+			       erase_op.fail_addr);
 
-out_put_mtd:
-	put_mtd_device(mtd);
+			/* Skip bad block and continue behind it */
+			erase_op.len -= erase_op.fail_addr - erase_op.addr;
+			erase_op.len -= mtd->erasesize;
+			erase_op.addr = erase_op.fail_addr + mtd->erasesize;
+		}
 
-	return ret;
-}
+		if (ret && ret != -EIO)
+			return CMD_RET_FAILURE;
+	} else if (!strcmp(cmd, "bad")) {
+		loff_t off;
 
-static int do_mtd_bad(cmd_tbl_t *cmdtp, int flag, int argc,
-		      char * const argv[])
-{
-	struct mtd_info *mtd;
-	loff_t off;
+		if (!mtd_can_have_bb(mtd)) {
+			printf("Only NAND-based devices can have bad blocks\n");
+			return CMD_RET_SUCCESS;
+		}
 
-	if (argc < 2)
+		printf("MTD device %s bad blocks list:\n", mtd->name);
+		for (off = 0; off < mtd->size; off += mtd->erasesize)
+			if (mtd_block_isbad(mtd, off))
+				printf("\t0x%08llx\n", off);
+	} else {
 		return CMD_RET_USAGE;
-
-	mtd = get_mtd_by_name(argv[1]);
-	if (IS_ERR_OR_NULL(mtd))
-		return CMD_RET_FAILURE;
-
-	if (!mtd_can_have_bb(mtd)) {
-		printf("Only NAND-based devices can have bad blocks\n");
-		goto out_put_mtd;
-	}
-
-	printf("MTD device %s bad blocks list:\n", mtd->name);
-	for (off = 0; off < mtd->size; off += mtd->erasesize) {
-		if (mtd_block_isbad(mtd, off))
-			printf("\t0x%08llx\n", off);
 	}
 
-out_put_mtd:
-	put_mtd_device(mtd);
-
 	return CMD_RET_SUCCESS;
 }
 
-#ifdef CONFIG_AUTO_COMPLETE
-static int mtd_name_complete(int argc, char * const argv[], char last_char,
-			     int maxv, char *cmdv[])
-{
-	int len = 0, n_found = 0;
-	struct mtd_info *mtd;
-
-	argc--;
-	argv++;
-
-	if (argc > 1 ||
-	    (argc == 1 && (last_char == '\0' || isblank(last_char))))
-		return 0;
-
-	if (argc)
-		len = strlen(argv[0]);
-
-	mtd_for_each_device(mtd) {
-		if (argc &&
-		    (len > strlen(mtd->name) ||
-		     strncmp(argv[0], mtd->name, len)))
-			continue;
-
-		if (n_found >= maxv - 2) {
-			cmdv[n_found++] = "...";
-			break;
-		}
-
-		cmdv[n_found++] = mtd->name;
-	}
-
-	cmdv[n_found] = NULL;
-
-	return n_found;
-}
-#endif /* CONFIG_AUTO_COMPLETE */
-
 static char mtd_help_text[] =
 #ifdef CONFIG_SYS_LONGHELP
 	"- generic operations on memory technology devices\n\n"
@@ -545,15 +470,4 @@ static char mtd_help_text[] =
 #endif
 	"";
 
-U_BOOT_CMD_WITH_SUBCMDS(mtd, "MTD utils", mtd_help_text,
-		U_BOOT_SUBCMD_MKENT(list, 1, 1, do_mtd_list),
-		U_BOOT_SUBCMD_MKENT_COMPLETE(read, 5, 0, do_mtd_io,
-					     mtd_name_complete),
-		U_BOOT_SUBCMD_MKENT_COMPLETE(write, 5, 0, do_mtd_io,
-					     mtd_name_complete),
-		U_BOOT_SUBCMD_MKENT_COMPLETE(dump, 4, 0, do_mtd_io,
-					     mtd_name_complete),
-		U_BOOT_SUBCMD_MKENT_COMPLETE(erase, 4, 0, do_mtd_erase,
-					     mtd_name_complete),
-		U_BOOT_SUBCMD_MKENT_COMPLETE(bad, 2, 1, do_mtd_bad,
-					     mtd_name_complete));
+U_BOOT_CMD(mtd, 10, 1, do_mtd, "MTD utils", mtd_help_text);

commit b62a0f65a9ee0d7f60a443990f3c293b7b261275
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue Aug 6 17:48:41 2019 +0800

    Revert "cmd: mtd: fix compilation warning for help when SYS_LONGHELP=n"
    
    This reverts commit a645831ca0962532660e4db3155a8be85e5ca312.
    
    Change-Id: Ida32a1a893b88503cffe432705d5d02921dfab09
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/cmd/mtd.c b/cmd/mtd.c
index 1b6b8dda2b..cda702d18b 100644
--- a/cmd/mtd.c
+++ b/cmd/mtd.c
@@ -519,8 +519,8 @@ static int mtd_name_complete(int argc, char * const argv[], char last_char,
 }
 #endif /* CONFIG_AUTO_COMPLETE */
 
-#ifdef CONFIG_SYS_LONGHELP
 static char mtd_help_text[] =
+#ifdef CONFIG_SYS_LONGHELP
 	"- generic operations on memory technology devices\n\n"
 	"mtd list\n"
 	"mtd read[.raw][.oob]                  <name> <addr> [<off> [<size>]]\n"
@@ -541,8 +541,9 @@ static char mtd_help_text[] =
 	"\t\t* must be a multiple of a block for erase\n"
 	"\t\t* must be a multiple of a page otherwise (special case: default is a page with dump)\n"
 	"\n"
-	"The .dontskipff option forces writing empty pages, don't use it if unsure.\n";
+	"The .dontskipff option forces writing empty pages, don't use it if unsure.\n"
 #endif
+	"";
 
 U_BOOT_CMD_WITH_SUBCMDS(mtd, "MTD utils", mtd_help_text,
 		U_BOOT_SUBCMD_MKENT(list, 1, 1, do_mtd_list),

commit 87a1a21db688d7091580cfd71e08ae87cff13554
Author: Boris Brezillon <boris.brezillon@bootlin.com>
Date:   Thu Aug 16 17:30:10 2018 +0200

    UPSTREAM: mtd: nand: Pass mode information to nand_page_io_req
    
    The NAND sub-layers are likely to need the MTD_OPS_XXX mode information
    in order to decide if they should enable/disable ECC or how they should
    place the OOB bytes in the provided OOB buffer.
    
    Add a field to nand_page_io_req to pass this information.
    
    Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Change-Id: Idb70434140c0304cfc97d7f3c52cbeca349fdff8
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit f86787280b37e381f8d82f48583434d62dd16e27)

diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index ada7af4a41..13e8dd1103 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -86,6 +86,7 @@ struct nand_pos {
  * @ooboffs: the OOB offset within the page
  * @ooblen: the number of OOB bytes to read from/write to this page
  * @oobbuf: buffer to store OOB data in or get OOB data from
+ * @mode: one of the %MTD_OPS_XXX mode
  *
  * This object is used to pass per-page I/O requests to NAND sub-layers. This
  * way all useful information are already formatted in a useful way and
@@ -106,6 +107,7 @@ struct nand_page_io_req {
 		const void *out;
 		void *in;
 	} oobbuf;
+	int mode;
 };
 
 /**
@@ -599,6 +601,7 @@ static inline void nanddev_io_iter_init(struct nand_device *nand,
 {
 	struct mtd_info *mtd = nanddev_to_mtd(nand);
 
+	iter->req.mode = req->mode;
 	iter->req.dataoffs = nanddev_offs_to_pos(nand, offs, &iter->req.pos);
 	iter->req.ooboffs = req->ooboffs;
 	iter->oobbytes_per_page = mtd_oobavail(mtd, req);

commit 933d0d31651db0caa69881264cedddd6dc5d126f
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue Aug 6 14:13:12 2019 +0800

    UPSTREAM: mtd: move NAND files into a raw/ subdirectory
    
    NAND flavors, like serial and parallel, have a lot in common and would
    benefit to share code. Let's move raw (parallel) NAND specific code in a
    raw/ subdirectory, to ease the addition of a core file in nand/ and the
    introduction of a spi/ subdirectory specific to SPI NANDs.
    
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Change-Id: I44522b3af6f28b74e0cdaf249edae6189e261a3e
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit a430fa06a4ac50e785fdbfb7f43c3cb14b35619c)

diff --git a/drivers/mtd/Makefile b/drivers/mtd/Makefile
index 6c31833ff8..8fa594c3f0 100644
--- a/drivers/mtd/Makefile
+++ b/drivers/mtd/Makefile
@@ -21,3 +21,5 @@ obj-$(CONFIG_FLASH_PIC32) += pic32_flash.o
 obj-$(CONFIG_ST_SMI) += st_smi.o
 obj-$(CONFIG_STM32_FLASH) += stm32_flash.o
 obj-$(CONFIG_RENESAS_RPC_HF) += renesas_rpc_hf.o
+
+obj-y += nand/

commit 90a8d4436c3a92cdad55cacda5a86e5b739628d5
Author: Lin Huang <hl@rock-chips.com>
Date:   Mon Aug 5 19:16:02 2019 +0800

    arm: rockchip: rk1808 set isp qos priority to 2
    
    isp qos priority is 1, and if run with npu, sometime
    it can not get right image, so set it priority to 2.
    
    Change-Id: I3cc34ffe9c17c8a4d79f9ba71732fcab3c879511
    Signed-off-by: Lin Huang <hl@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk1808/rk1808.c b/arch/arm/mach-rockchip/rk1808/rk1808.c
index 1b0350822a..2c99de8435 100644
--- a/arch/arm/mach-rockchip/rk1808/rk1808.c
+++ b/arch/arm/mach-rockchip/rk1808/rk1808.c
@@ -16,6 +16,7 @@
 #include <asm/armv8/mmu.h>
 
 #define NIU_CIF_ADDR		0xfe8a0188
+#define NIU_ISP_ADDR		0xfe8a0008
 #define QOS_PRIORITY_LEVEL(h, l)	((((h) & 3) << 8) | ((l) & 3))
 
 static struct mm_region rk1808_mem_map[] = {
@@ -67,6 +68,7 @@ int arch_cpu_init(void)
 {
 	/* Set cif qos priority */
 	writel(QOS_PRIORITY_LEVEL(2, 2), NIU_CIF_ADDR);
+	writel(QOS_PRIORITY_LEVEL(2, 2), NIU_ISP_ADDR);
 
 	return 0;
 }

commit 2a77afce30a3be0d5c7f9049479f0aef6e90d4ab
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Jul 18 17:29:38 2019 +0800

    rockchip: test: add log message need by LAVA
    
    The LAVA system need message from log to show the test result.
    "<LAVA_SIGNAL_*>" for start, end, test case result key;
    "<LAVA_TEST_RUNNER>: exiting" for test complete key
    
    Change-Id: I13522bf82da69f105f439853fa5c4b32c9f3d1ff
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/test/Kconfig b/test/Kconfig
index b53d2d948c..9a22d50255 100644
--- a/test/Kconfig
+++ b/test/Kconfig
@@ -21,6 +21,12 @@ config TEST_ROCKCHIP
 	help
 	  This enables the test function for rockchip board modules.
 
+config LAVA_INFO
+	bool "Display test info need by LAVA system"
+	depends on TEST_ROCKCHIP
+	help
+	  This enable the print info need by LAVA system
+
 source "test/dm/Kconfig"
 source "test/env/Kconfig"
 source "test/overlay/Kconfig"
diff --git a/test/rockchip/test-rockchip.c b/test/rockchip/test-rockchip.c
index 6ede00316a..3d69dc4172 100644
--- a/test/rockchip/test-rockchip.c
+++ b/test/rockchip/test-rockchip.c
@@ -155,8 +155,8 @@ static int do_rockchip_test(cmd_tbl_t *cmdtp, int flag,
 	goto finish;
 
 all_test:
+	lava_info("<LAVA_SIGNAL_STARTRUN u-boot-function 0>\n");
 	ms_start = get_timer(0);
-
 	for (i = 0; i < ARRAY_SIZE(cmd_groups); i++) {
 		/*
 		 * If 'grp_test_id != TEST_ID_UNK', now is group test, find
@@ -173,6 +173,7 @@ all_test:
 			/* Skip this ignored cmd */
 			if (skip_this_cmd(cp, skip_mode)) {
 				printf("### Skip  [%s]\n", cp->name);
+				lava_info("<LAVA_SIGNAL_TESTCASE TEST_CASE_ID=%s RESULT=skip>\n", cp->name);
 				continue;
 			}
 
@@ -184,10 +185,13 @@ all_test:
 
 			/* Execute command */
 			ret = cp->cmd(cmdtp, flag, argc, argv);
-			if (ret)
+			if (ret) {
+				lava_info("<LAVA_SIGNAL_TESTCASE TEST_CASE_ID=%s RESULT=fail>\n", cp->name);
 				fail++;
-			else
+			} else {
+				lava_info("<LAVA_SIGNAL_TESTCASE TEST_CASE_ID=%s RESULT=pass>\n", cp->name);
 				okay++;
+			}
 
 			/* Result */
 			printf("### Finish, result: <%s>\n\n",
@@ -206,9 +210,14 @@ all_test:
 		sec = ms / 1000;
 		ms = ms % 1000;
 	}
-
 	printf("[=== SUM: pass: %d; failed: %d; total: %lu.%lus ===]\n\n\n",
 	       okay, fail, sec, ms);
+/*
+ * LAVA result with meansure data
+ * lava_info("<LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dd-write-mean RESULT=pass UNITS=MB/s MEASUREMENT=37.42>");
+ */
+	lava_info("<LAVA_SIGNAL_ENDRUN u-boot-function 0>\n");
+	lava_info("<LAVA_TEST_RUNNER>: exiting u-boot-function\n");
 
 finish:
 	return 0;
diff --git a/test/rockchip/test-rockchip.h b/test/rockchip/test-rockchip.h
index bc38d2ff24..4e4d2607a2 100644
--- a/test/rockchip/test-rockchip.h
+++ b/test/rockchip/test-rockchip.h
@@ -46,4 +46,11 @@ struct cmd_group {
 	u32 cmd_n;
 };
 
+#ifdef CONFIG_LAVA_INFO
+#define lava_info(fmt, ...) \
+	printf(fmt, ##__VA_ARGS__)
+#else
+#define lava_info(fmt, ...)
+#endif
+
 #endif /* _TEST_ROCKCHIP_H */

commit eae5fe32f17f91a1e77cfda56ce5d0a4372a4b42
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Jul 24 21:10:41 2019 +0800

    rockchip: evb-rk3128: enable RK8XX pmic and BOARD_EARLY_INIT_R
    
    This options help evb-rk3128 able to init regulator and rk818 current
    limit.
    
    Change-Id: I32da0d7e3a59427200bc19e013fe7469a8b99c9f
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3128_defconfig b/configs/evb-rk3128_defconfig
index 6c451f007e..207342260e 100644
--- a/configs/evb-rk3128_defconfig
+++ b/configs/evb-rk3128_defconfig
@@ -5,9 +5,7 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3128-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 # CONFIG_DISPLAY_CPUINFO is not set
-CONFIG_FASTBOOT=y
-CONFIG_USB_FUNCTION_FASTBOOT=y
-CONFIG_CMD_FASTBOOT=y
+CONFIG_BOARD_EARLY_INIT_R=y
 CONFIG_FASTBOOT_BUF_ADDR=0x60800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
@@ -26,18 +24,19 @@ CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_SPI_FLASH=y
 CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
 CONFIG_RAM=y
 CONFIG_DM_RESET=y
 CONFIG_DEBUG_UART_BASE=0x20068000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y

commit 92da45ec70fbfd3abc6a71c20f58617c92b2cc50
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Jul 24 21:05:22 2019 +0800

    treewide: Migrate CONFIG_BOARD_EARLY_INIT_R to Kconfig
    
    Migrate the CONFIG_BOARD_EARLY_INIT_R option to Kconfig.
    
    Signed-off-by: Mario Six <mario.six@gdsys.cc>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    
    Change-Id: I92483d7ecb8f2449eda4b3cdd3bc5ede45ae6c8d

diff --git a/common/Kconfig b/common/Kconfig
index bb7cf884f3..cb0434ea4e 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -581,6 +581,13 @@ config BOARD_EARLY_INIT_F
 	  Note that the normal serial console is not yet set up, but the
 	  debug UART will be available if enabled.
 
+config BOARD_EARLY_INIT_R
+	bool "Call board-specific init after relocation"
+	help
+	  Some boards need to perform initialisation as directly after
+	  relocation. With this option, U-Boot calls board_early_init_r()
+	  in the post-relocation init sequence.
+
 endmenu
 config ANDROID_BOOTLOADER
 	bool "Support for Android Bootloader boot flow"

commit 68fff71bb34b08bb468e9177508271e0f25fdad8
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Jul 24 20:57:07 2019 +0800

    rockchip: evb-rk3128: enable rk818 current limit early
    
    Some rk3128 board like fireprime is using rk818, and it may limit
    the current before change the pmic setting, the normal process
    need to enable the fuelguage and its dts which is too late,
    the U-Boot may HANG at regulator_power_on_init() in board_init().
    
    Change-Id: I7bd058d8bd8fac01377c3cef6b3681c1c6110ee7
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/board/rockchip/evb_rk3128/evb-rk3128.c b/board/rockchip/evb_rk3128/evb-rk3128.c
index bf36e25a7c..0decdf2339 100644
--- a/board/rockchip/evb_rk3128/evb-rk3128.c
+++ b/board/rockchip/evb_rk3128/evb-rk3128.c
@@ -5,5 +5,24 @@
  */
 
 #include <common.h>
+#include <dm.h>
+#include <power/rk8xx_pmic.h>
 
 DECLARE_GLOBAL_DATA_PTR;
+
+int board_early_init_r(void)
+{
+	struct udevice *pmic;
+	int ret;
+
+	ret = uclass_first_device_err(UCLASS_PMIC, &pmic);
+	if (ret)
+		return ret;
+
+	/* Increase USB input current to 2A */
+	ret = rk818_spl_configure_usb_input_current(pmic, 2000);
+	if (ret)
+		return ret;
+
+	return 0;
+}

commit 997d73f9dc6ab3159d0f20eca5415ad3f12af43b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Jul 24 20:56:30 2019 +0800

    board_r: re-order the board_early_init_r()
    
    The board_early_init_r() suppose to be called before board_init(),
    then the board callback functions in board_r will be:
    - board_early_init_r()
    - board_init()
    - board_late_init()
    
    Change-Id: I516fcbae91548e6e0ed469129ee5d11ee09b0a1e
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/board_r.c b/common/board_r.c
index 34c699f1c0..691b472946 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -807,6 +807,9 @@ static init_fnc_t init_sequence_r[] = {
 #ifdef CONFIG_USING_KERNEL_DTB
 	initr_env_nowhere,
 #endif
+#if defined(CONFIG_BOARD_EARLY_INIT_R)
+	board_early_init_r,
+#endif
 
 #if defined(CONFIG_ARM) || defined(CONFIG_NDS32)
 	board_init,	/* Setup chipselects */
@@ -844,9 +847,6 @@ static init_fnc_t init_sequence_r[] = {
 #endif
 #ifdef CONFIG_ADDR_MAP
 	initr_addr_map,
-#endif
-#if defined(CONFIG_BOARD_EARLY_INIT_R)
-	board_early_init_r,
 #endif
 	INIT_FUNC_WATCHDOG_RESET
 #ifdef CONFIG_POST

commit 99d14b019e97cfb134e368ae7a83c99a90348e87
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 26 11:19:08 2019 +0800

    test: rockchip: refactor framework and update test case
    
    Change-Id: I8406aaa6c4eacf2b2eb0fa6d787e2a46f45c8049
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/test/rockchip/Makefile b/test/rockchip/Makefile
index 319f22f553..1219e6e926 100644
--- a/test/rockchip/Makefile
+++ b/test/rockchip/Makefile
@@ -1,16 +1,14 @@
 #
-# (C) Copyright 2017 Rockchip Electronics Co., Ltd.
+# (C) Copyright 2019 Rockchip Electronics Co., Ltd.
 #
 # SPDX-License-Identifier:     GPL-2.0+
 #
 
 obj-y += test-rockchip.o
-obj-y += test-brom-dnl.o
-obj-$(CONFIG_IRQ) += test-timer.o
-obj-$(CONFIG_DM_KEY) += test-key.o
-obj-$(CONFIG_MMC) += test-emmc.o
-obj-$(CONFIG_DM_REGULATOR)+= test-regulator.o
-obj-$(CONFIG_RKNAND) += test-rknand.o
-obj-$(CONFIG_GMAC_ROCKCHIP) += test-eth.o
-obj-$(CONFIG_RK_IR) += test-ir.o
-obj-$(CONFIG_ROCKCHIP_VENDOR_PARTITION) += test-vendor-storage.o
+obj-y += test-boot.o
+obj-y += test-display.o
+obj-y += test-download.o
+obj-y += test-misc.o
+obj-y += test-net.o
+obj-y += test-power.o
+obj-y += test-storage.o
diff --git a/test/rockchip/test-boot.c b/test/rockchip/test-boot.c
new file mode 100644
index 0000000000..814e96cf70
--- /dev/null
+++ b/test/rockchip/test-boot.c
@@ -0,0 +1,76 @@
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include "test-rockchip.h"
+
+#ifdef CONFIG_CMD_BOOT_ANDROID
+static int do_test_android(cmd_tbl_t *cmdtp, int flag,
+			   int argc, char *const argv[])
+{
+	return run_command("boot_android ${devtype} ${devnum}", 0);
+}
+#endif
+
+#ifdef CONFIG_ANDROID_AVB
+static int do_test_android_avb(cmd_tbl_t *cmdtp, int flag,
+			       int argc, char *const argv[])
+{
+	return run_command("boot_android ${devtype} ${devnum}", 0);
+}
+#endif
+
+#ifdef CONFIG_CMD_BOOT_ROCKCHIP
+static int do_test_bootrkp(cmd_tbl_t *cmdtp, int flag,
+			   int argc, char *const argv[])
+{
+	return run_command("bootrkp", 0);
+}
+#endif
+
+#ifdef CONFIG_DISTRO_DEFAULTS
+static int do_test_distro(cmd_tbl_t *cmdtp, int flag,
+			  int argc, char *const argv[])
+{
+	return run_command("run distro_bootcmd", 0);
+}
+#endif
+
+static cmd_tbl_t sub_cmd[] = {
+#ifdef CONFIG_CMD_BOOT_ANDROID
+	UNIT_CMD_ATTR_DEFINE(android, 0, CMD_FLG_NORETURN),
+#endif
+#ifdef CONFIG_ANDROID_AVB
+	UNIT_CMD_ATTR_DEFINE(android_avb, 0, CMD_FLG_NORETURN),
+#endif
+#ifdef CONFIG_CMD_BOOT_ROCKCHIP
+	UNIT_CMD_ATTR_DEFINE(bootrkp, 0, CMD_FLG_NORETURN),
+#endif
+#ifdef CONFIG_DISTRO_DEFAULTS
+	UNIT_CMD_ATTR_DEFINE(distro, 0, CMD_FLG_NORETURN),
+#endif
+};
+
+static const char sub_cmd_help[] =
+#ifdef CONFIG_CMD_BOOT_ANDROID
+"    [n] rktest android                     - test android bootflow\n"
+#endif
+#ifdef CONFIG_ANDROID_AVB
+"    [n] rktest android_avb                 - test android avb bootflow\n"
+#endif
+#ifdef CONFIG_CMD_BOOT_ROCKCHIP
+"    [n] rktest bootrkp                     - test bootrkp bootflow\n"
+#endif
+#ifdef CONFIG_DISTRO_DEFAULTS
+"    [n] rktest distro                      - test linux distro bootflow\n"
+#endif
+;
+
+const struct cmd_group cmd_grp_boot = {
+	.id	= TEST_ID_BOOT,
+	.help	= sub_cmd_help,
+	.cmd	= sub_cmd,
+	.cmd_n	= ARRAY_SIZE(sub_cmd),
+};
diff --git a/test/rockchip/test-brom-dnl.c b/test/rockchip/test-brom-dnl.c
deleted file mode 100644
index 85f60c5afc..0000000000
--- a/test/rockchip/test-brom-dnl.c
+++ /dev/null
@@ -1,9 +0,0 @@
-#include <common.h>
-#include <asm/io.h>
-#include <asm/arch/boot_mode.h>
-
-int board_brom_dnl_test(int argc, char * const argv[])
-{
-	writel(BOOT_BROM_DOWNLOAD, CONFIG_ROCKCHIP_BOOT_MODE_REG);
-	return do_reset(NULL, 0, 0, NULL);
-}
diff --git a/test/rockchip/test-display.c b/test/rockchip/test-display.c
new file mode 100644
index 0000000000..2935404ef5
--- /dev/null
+++ b/test/rockchip/test-display.c
@@ -0,0 +1,47 @@
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <video_rockchip.h>
+#include "test-rockchip.h"
+
+#ifdef CONFIG_DRM_ROCKCHIP
+int do_test_display(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+{
+	int ret = 0;
+
+	ret |= rockchip_show_logo();
+	mdelay(2000);
+	ret |= rockchip_show_bmp("logo.bmp");
+	mdelay(2000);
+	ret |= rockchip_show_bmp("logo_kernel.bmp");
+	mdelay(2000);
+
+	return ret;
+}
+
+static cmd_tbl_t sub_cmd[] = {
+	UNIT_CMD_DEFINE(display, 0),
+};
+
+static const char sub_cmd_help[] =
+"    [.] rktest display                     - test display\n"
+;
+
+const struct cmd_group cmd_grp_display = {
+	.id	= TEST_ID_DISPLAY,
+	.help	= sub_cmd_help,
+	.cmd	= sub_cmd,
+	.cmd_n	= ARRAY_SIZE(sub_cmd),
+};
+#else
+const struct cmd_group cmd_grp_display = {
+	.id	= TEST_ID_DISPLAY,
+	.help	= NULL,
+	.cmd	= NULL,
+	.cmd_n	= 0,
+};
+#endif
diff --git a/test/rockchip/test-download.c b/test/rockchip/test-download.c
new file mode 100644
index 0000000000..d62b8c452f
--- /dev/null
+++ b/test/rockchip/test-download.c
@@ -0,0 +1,89 @@
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include "test-rockchip.h"
+
+#ifdef CONFIG_CMD_GO
+static int do_test_brom(cmd_tbl_t *cmdtp, int flag,
+			int argc, char *const argv[])
+{
+	return run_command("rbrom", 0);
+}
+#endif
+
+#ifdef CONFIG_CMD_FASTBOOT
+static int do_test_fastboot(cmd_tbl_t *cmdtp, int flag,
+			    int argc, char *const argv[])
+{
+	return run_command("fastboot usb 0", 0);
+}
+#endif
+
+#ifdef CONFIG_CMD_ROCKUSB
+static int do_test_rockusb(cmd_tbl_t *cmdtp, int flag,
+			   int argc, char *const argv[])
+{
+	return run_command("rockusb 0 ${devtype} ${devnum}", 0);
+}
+#endif
+
+#ifdef CONFIG_CMD_NET
+static int do_test_tftp(cmd_tbl_t *cmdtp, int flag,
+			int argc, char *const argv[])
+{
+	char load_cmd[64];
+	char serverip_cmd[64];
+	int ret = 0;
+
+	if (argc != 3)
+		return CMD_RET_USAGE;
+
+	snprintf(serverip_cmd, 64, "env set serverip %s", argv[1]);
+	snprintf(load_cmd, 64, "tftp %s", argv[2]);
+	ret |= run_command(serverip_cmd, 0);
+	ret |= run_command("dhcp", 0);
+	ret |= run_command(load_cmd, 0);
+
+	return ret;
+}
+#endif
+
+static cmd_tbl_t sub_cmd[] = {
+#ifdef CONFIG_CMD_GO
+	UNIT_CMD_ATTR_DEFINE(brom, 0, CMD_FLG_NORETURN),
+#endif
+#ifdef CONFIG_CMD_FASTBOOT
+	UNIT_CMD_ATTR_DEFINE(fastboot, 0, CMD_FLG_NORETURN),
+#endif
+#ifdef CONFIG_CMD_ROCKUSB
+	UNIT_CMD_ATTR_DEFINE(rockusb, 0, CMD_FLG_NORETURN),
+#endif
+#ifdef CONFIG_CMD_NET
+	UNIT_CMD_ATTR_DEFINE(tftp, 0, CMD_FLG_NORETURN),
+#endif
+};
+
+static const char sub_cmd_help[] =
+#ifdef CONFIG_CMD_GO
+"    [n] rktest brom                        - test bootrom, enter download mode\n"
+#endif
+#ifdef CONFIG_CMD_FASTBOOT
+"    [n] rktest fastboot                    - test fastboot, enter download mode\n"
+#endif
+#ifdef CONFIG_CMD_ROCKUSB
+"    [n] rktest rockusb                     - test rockusb, enter download mode\n"
+#endif
+#ifdef CONFIG_CMD_NET
+"    [.] rktest tftp [serverip] [file]      - test tftp download\n"
+#endif
+;
+
+const struct cmd_group cmd_grp_download = {
+	.id	= TEST_ID_DOWNLOAD,
+	.help	= sub_cmd_help,
+	.cmd	= sub_cmd,
+	.cmd_n	= ARRAY_SIZE(sub_cmd),
+};
diff --git a/test/rockchip/test-emmc.c b/test/rockchip/test-emmc.c
deleted file mode 100644
index 82d9cd2349..0000000000
--- a/test/rockchip/test-emmc.c
+++ /dev/null
@@ -1,102 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <cli.h>
-#include <linux/compat.h>
-#include <malloc.h>
-#include "test-rockchip.h"
-
-int board_emmc_test(int argc, char * const argv[])
-{
-	u8 *write_buffer, *read_buffer;
-	u32 i, blocks = 0, count = 0, lba;
-	unsigned long ts;
-	int err = 0;
-	char cmd_mmc[512] = {0};
-
-	if (argc < 5) {
-		printf("Usage: rktest emmc start_lba blocks count\n");
-		printf("blocks should be from 8129 to 30000\n");
-		err = -EINVAL;
-		goto err_wb;
-	}
-
-	lba = simple_strtoul(argv[2], NULL, 0);
-	blocks = simple_strtoul(argv[3], NULL, 0);
-	count = simple_strtoul(argv[4], NULL, 0);
-
-	if (blocks % 2)
-		/* Round up */
-		blocks += 1;
-
-	/* 1. Prepare memory */
-	write_buffer = (u8 *)kmalloc(sizeof(u8) * blocks * 512, GFP_KERNEL);
-	if (!write_buffer) {
-		printf("No memory for write_buffer!\n");
-		err = -ENOMEM;
-		goto err_wb;
-	}
-
-	read_buffer = (u8 *)kmalloc(sizeof(u8) * blocks * 512, GFP_KERNEL);
-	if (!read_buffer) {
-		printf("No memory for read_buffer!\n");
-		err = -ENOMEM;
-		goto err_rb;
-	}
-
-	for (i = 0; i < blocks * 512; i++) {
-		write_buffer[i] = i;
-		read_buffer[i] = 0;
-	}
-
-	/* 2. Prepare and start mmc write/read */
-	snprintf(cmd_mmc, sizeof(cmd_mmc), "mmc write 0x%x 0x%x 0x%x",
-		 (u32)(ulong)write_buffer, lba, blocks);
-	ts = get_timer(0);
-	for (i = 0; i < count; i++) {
-		err = cli_simple_run_command(cmd_mmc, 0);
-		if (!err)
-			goto err_mw;
-	}
-
-	ts = get_timer(0) - ts;
-	printf("eMMC write: size %dMB, used %ldms, speed %ldMB/s\n",
-		blocks * count / 2048, ts, (blocks * count >> 1) / ts);
-
-	snprintf(cmd_mmc, sizeof(cmd_mmc), "mmc read 0x%x 0x%x 0x%x",
-		 (u32)(ulong)read_buffer, lba, blocks);
-	ts = get_timer(0);
-	for (i = 0; i < count; i++) {
-		err = cli_simple_run_command(cmd_mmc, 0);
-		if (!err)
-			goto err_mw;
-	}
-	ts = get_timer(0) - ts;
-	printf("eMMC read: size %dMB, used %ldms, speed %ldMB/s\n",
-		blocks * count / 2048, ts, (blocks * count >> 1) / ts);
-
-	/* 3. Verify the context */
-
-	err = 0;
-	for (i = 0; i < blocks * 512; i++) {
-		if (write_buffer[i] != read_buffer[i]) {
-			printf("eMMC context compare err!\n");
-			err = -EINVAL;
-			goto err_mw;
-		}
-	}
-
-err_mw:
-	kfree(read_buffer);
-	read_buffer = NULL;
-err_rb:
-	kfree(write_buffer);
-	write_buffer = NULL;
-err_wb:
-	return err;
-}
diff --git a/test/rockchip/test-ir.c b/test/rockchip/test-ir.c
deleted file mode 100644
index e84bad8732..0000000000
--- a/test/rockchip/test-ir.c
+++ /dev/null
@@ -1,64 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <linux/input.h>
-#include <rc.h>
-
-#include "test-rockchip.h"
-
-static int ir_test(void)
-{
-	int ret;
-	ulong start;
-	int last_keycode, last_repeat;
-	int keycode, repeat;
-	struct udevice *dev;
-
-	printf("\nYou have 30s to test ir, press them, start!\n");
-
-	ret = uclass_get_device(UCLASS_RC, 0, &dev);
-	if (ret) {
-		printf("get rc device failed: %d\n", ret);
-		goto out;
-	}
-
-	keycode = rc_get_keycode(dev);
-	if (keycode == -ENOSYS) {
-		printf("ir_test: failed to bind driver\n");
-		goto out;
-	}
-
-	last_keycode = KEY_RESERVED;
-	last_repeat = KEY_RESERVED;
-	start = get_timer(0);
-	while (get_timer(start) <= 30000) {
-		mdelay(100);
-
-		keycode = rc_get_keycode(dev);
-		repeat = rc_get_repeat(dev);
-		if (keycode == KEY_RESERVED)
-			continue;
-
-		if (keycode != last_keycode || repeat != last_repeat) {
-			printf("ir_test: press key:0x%x repeat:%d\n",
-			       keycode, repeat);
-			last_keycode = keycode;
-			last_repeat = repeat;
-		}
-	}
-
-	return 0;
-
-out:
-	return -EINVAL;
-}
-
-int board_ir_test(int argc, char * const argv[])
-{
-	return ir_test();
-}
diff --git a/test/rockchip/test-key.c b/test/rockchip/test-key.c
deleted file mode 100644
index deef4e81c2..0000000000
--- a/test/rockchip/test-key.c
+++ /dev/null
@@ -1,47 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <asm/io.h>
-#include <common.h>
-#include <console.h>
-#include <dm.h>
-#include <key.h>
-#include <linux/input.h>
-#include "test-rockchip.h"
-
-int board_key_test(int argc, char * const argv[])
-{
-	int i, ret;
-	u32 key_code[] = {
-		KEY_VOLUMEUP,
-		KEY_VOLUMEDOWN,
-		KEY_POWER,
-		KEY_MENU,
-		KEY_ESC,
-		KEY_HOME,
-	};
-	const char *key_name[] = {
-		"volume up",
-		"volume down",
-		"power",
-		"menu",
-		"esc",
-		"home",
-	};
-
-	while (!ctrlc()) {
-		for (i = 0; i < ARRAY_SIZE(key_code); i++) {
-			mdelay(20);
-			ret = key_read(key_code[i]);
-			if (ret == KEY_PRESS_DOWN)
-				printf("'%s' key pressed...\n", key_name[i]);
-			else if (ret == KEY_PRESS_LONG_DOWN)
-				printf("'%s' key long pressed...\n", key_name[i]);
-		}
-	}
-
-	return 0;
-}
diff --git a/test/rockchip/test-misc.c b/test/rockchip/test-misc.c
new file mode 100644
index 0000000000..3102bd6a30
--- /dev/null
+++ b/test/rockchip/test-misc.c
@@ -0,0 +1,251 @@
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <adc.h>
+#include <boot_rkimg.h>
+#include <console.h>
+#include <dm.h>
+#include <key.h>
+#include <misc.h>
+#include <rc.h>
+#ifdef CONFIG_IRQ
+#include <irq-generic.h>
+#include <rk_timer_irq.h>
+#endif
+#include <asm/io.h>
+#include <linux/input.h>
+#include "test-rockchip.h"
+
+#ifdef CONFIG_IRQ
+/* Must use volatile to avoid being optimized by complier */
+static int volatile irq_exit;
+static ulong seconds;
+
+static void timer_irq_handler(int irq, void *data)
+{
+	int period;
+
+	writel(TIMER_CLR_INT, TIMER_BASE + TIMER_INTSTATUS);
+	period = get_timer(seconds);
+	printf("    Hello, this is timer isr: irq=%d, period=%dms\n", irq, period);
+
+	irq_exit = 1;
+}
+
+static int timer_interrupt_test(void)
+{
+	printf("Timer interrupt:\n");
+
+	/* Disable before config */
+	writel(0, TIMER_BASE + TIMER_CTRL);
+
+	/* Configure 1s */
+	writel(COUNTER_FREQUENCY, TIMER_BASE + TIMER_LOAD_COUNT0);
+	writel(0, TIMER_BASE + TIMER_LOAD_COUNT1);
+	writel(TIMER_CLR_INT, TIMER_BASE + TIMER_INTSTATUS);
+	writel(TIMER_EN | TIMER_INT_EN, TIMER_BASE + TIMER_CTRL);
+
+	/* Request irq */
+	irq_install_handler(TIMER_IRQ, timer_irq_handler, NULL);
+	irq_handler_enable(TIMER_IRQ);
+
+	seconds = get_timer(0);
+	while (!irq_exit)
+		;
+
+	irq_free_handler(TIMER_IRQ);
+
+	return 0;
+}
+#endif
+
+static void timer_delay_test(void)
+{
+	ulong delay = 100, delta;
+	u64 start;
+
+	printf("Timer delay:\n");
+
+	start = get_ticks();
+	udelay(delay);
+	delta = (get_ticks() - start) / 24UL;
+	printf("    Set %4luus, real %4luus\n", delay, delta);
+
+	start = get_ticks();
+	mdelay(delay);
+	delta = (get_ticks() - start) / 24000UL;
+	printf("    Set %4lums, real %4lums\n", delay, delta);
+
+	start = get_ticks();
+	mdelay(delay * 10UL);
+	delta = (get_ticks() - start) / 24000UL;
+	printf("    Set %4lums, real %4lums\n\n", delay * 10UL, delta);
+}
+
+int do_test_timer(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+{
+	timer_delay_test();
+
+#ifdef CONFIG_IRQ
+	timer_interrupt_test();
+#endif
+	return 0;
+}
+
+#ifdef CONFIG_RK_IR
+static int ir_test(void)
+{
+	struct udevice *dev;
+	int keycode, repeat;
+	int last_keycode;
+	int last_repeat;
+	ulong start;
+	int ret;
+
+	printf("\nYou have 30s to test ir, press them, start!\n");
+
+	ret = uclass_get_device(UCLASS_RC, 0, &dev);
+	if (ret) {
+		printf("Get rc device failed: %d\n", ret);
+		goto out;
+	}
+
+	keycode = rc_get_keycode(dev);
+	if (keycode == -ENOSYS) {
+		printf("ir_test: failed to bind driver\n");
+		goto out;
+	}
+
+	last_keycode = KEY_RESERVED;
+	last_repeat = KEY_RESERVED;
+	start = get_timer(0);
+	while (get_timer(start) <= 30000) {
+		mdelay(100);
+
+		keycode = rc_get_keycode(dev);
+		repeat = rc_get_repeat(dev);
+		if (keycode == KEY_RESERVED)
+			continue;
+
+		if (keycode != last_keycode || repeat != last_repeat) {
+			printf("ir_test: press key:0x%x repeat:%d\n",
+			       keycode, repeat);
+			last_keycode = keycode;
+			last_repeat = repeat;
+		}
+	}
+
+	return 0;
+
+out:
+	return -EINVAL;
+}
+
+int do_test_ir(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+{
+	return ir_test();
+}
+#endif
+
+#ifdef CONFIG_DM_KEY
+int do_test_key(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+{
+	struct dm_key_uclass_platdata *key;
+	struct udevice *dev;
+	struct uclass *uc;
+	int ret, evt;
+
+	ret = uclass_get(UCLASS_KEY, &uc);
+	if (ret)
+		return ret;
+
+	printf("Please press any key button...\n");
+	while (!ctrlc()) {
+		for (uclass_first_device(UCLASS_KEY, &dev);
+		     dev;
+		     uclass_next_device(&dev)) {
+			key = dev_get_uclass_platdata(dev);
+			evt = key_read(key->code);
+			if (evt == KEY_PRESS_DOWN)
+				printf("'%s' key pressed...\n", key->name);
+			else if (evt == KEY_PRESS_LONG_DOWN)
+				printf("'%s' key long pressed...\n", key->name);
+
+			mdelay(25);
+		}
+	}
+
+	return 0;
+}
+#endif
+
+#ifdef CONFIG_DM_CRYPTO
+static int do_test_crypto(cmd_tbl_t *cmdtp, int flag,
+			  int argc, char *const argv[])
+{
+	return run_command("crypto", 0);
+}
+#endif
+
+#ifdef CONFIG_ADC
+static int do_test_adc(cmd_tbl_t *cmdtp, int flag,
+		       int argc, char *const argv[])
+{
+	uint val, chn;
+	int ret;
+
+	chn = argc < 2 ? 0 : strtoul(argv[1], NULL, 10);
+	ret = adc_channel_single_shot("saradc", chn, &val);
+	if (!ret)
+		printf("adc channel%d: adc value is %d\n", chn, val);
+
+	return ret;
+}
+#endif
+
+static cmd_tbl_t sub_cmd[] = {
+#ifdef CONFIG_DM_CRYPTO
+	UNIT_CMD_DEFINE(crypto, 0),
+#endif
+#ifdef CONFIG_RK_IR
+	UNIT_CMD_ATTR_DEFINE(ir, 0, CMD_FLG_INTERACTIVE),
+#endif
+#ifdef CONFIG_DM_KEY
+	UNIT_CMD_ATTR_DEFINE(key, 0, CMD_FLG_INTERACTIVE),
+#endif
+#ifdef CONFIG_ADC
+	UNIT_CMD_DEFINE(adc, 0),
+#endif
+#ifdef CONFIG_IRQ
+	UNIT_CMD_DEFINE(timer, 0),
+#endif
+};
+
+static const char sub_cmd_help[] =
+#ifdef CONFIG_DM_CRYPTO
+"    [.] rktest crypto                      - test crypto\n"
+#endif
+#ifdef CONFIG_RK_IR
+"    [i] rktest ir                          - test pwm ir remoter\n"
+#endif
+#ifdef CONFIG_DM_KEY
+"    [i] rktest key                         - test key buttons\n"
+#endif
+#ifdef CONFIG_ADC
+"    [.] rktest adc [chn]                   - test adc channel\n"
+#endif
+#ifdef CONFIG_IRQ
+"    [.] rktest timer                       - test timer and interrupt\n"
+#endif
+;
+
+const struct cmd_group cmd_grp_misc = {
+	.id	= TEST_ID_MISC,
+	.help	= sub_cmd_help,
+	.cmd	= sub_cmd,
+	.cmd_n	= ARRAY_SIZE(sub_cmd),
+};
diff --git a/test/rockchip/test-eth.c b/test/rockchip/test-net.c
similarity index 91%
rename from test/rockchip/test-eth.c
rename to test/rockchip/test-net.c
index 4e04416935..28e6754b64 100644
--- a/test/rockchip/test-eth.c
+++ b/test/rockchip/test-net.c
@@ -1,24 +1,20 @@
 /*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:     GPL-2.0+
  */
 
-#include <asm/io.h>
-#include <adc.h>
-#include <cli.h>
 #include <common.h>
 #include <dm.h>
-#include <errno.h>
 #include <fdtdec.h>
 #include <malloc.h>
-#include <irq-generic.h>
-#include <irq-platform.h>
 #include <miiphy.h>
 #include <net.h>
 #include <phy.h>
+#include <asm/io.h>
 #include "test-rockchip.h"
 
+#ifdef CONFIG_GMAC_ROCKCHIP
 #define LOOPBACK_TEST_HDR_SIZE		14
 #define LOOPBACK_TEST_DATA_SIZE		1500
 #define LOOPBACK_TEST_FRAME_SIZE	(14 + 1500)
@@ -134,8 +130,8 @@ static int eth_run_loopback_test(struct udevice *current, int speed, int delay_t
 	u32 i, j;
 
 	/* make sure the net_tx_packet is initialized (net_init() was called) */
-	assert(net_tx_packet != NULL);
-	if (net_tx_packet == NULL)
+	assert(net_tx_packet);
+	if (!net_tx_packet)
 		return -EINVAL;
 
 	net_set_ether(net_tx_packet, net_bcast_ethaddr, LOOPBACK_TEST_DATA_SIZE);
@@ -249,13 +245,13 @@ static void do_eth_help(void)
 	printf("rktest eth dhcp address IP:file - Boot image via network using DHCP/TFTP protocol, example: rktest eth dhcp 0x62000000 192.168.1.100:Image\n");
 }
 
-int board_eth_test(int argc, char * const argv[])
+int do_test_eth(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 {
-	int ret;
+	struct udevice *current;
+	u32 tx_delay, rx_delay;
 	char cmd_eth[512] = {0};
 	int i, speed;
-	u32 tx_delay, rx_delay;
-	struct udevice *current;
+	int ret;
 
 	current = eth_get_dev();
 	if (!current || !device_active(current))
@@ -299,12 +295,33 @@ int board_eth_test(int argc, char * const argv[])
 	}
 
 	/* run dhcp/tftp test */
-	ret = cli_simple_run_command(cmd_eth, 0);
+	ret = run_command(cmd_eth, 0);
 	if (ret < 0) {
 		printf("DHCP test error: %d\n", ret);
 		return ret;
 	}
 
-
 	return 0;
 }
+#endif
+
+static cmd_tbl_t sub_cmd[] = {
+#ifdef CONFIG_GMAC_ROCKCHIP
+	UNIT_CMD_DEFINE(eth, 0),
+#endif
+};
+
+static const char sub_cmd_help[] =
+#ifdef CONFIG_GMAC_ROCKCHIP
+"    [i] rktest eth                         - test ethernet\n"
+#else
+""
+#endif
+;
+
+struct cmd_group cmd_grp_net = {
+	.id	= TEST_ID_NET,
+	.help	= sub_cmd_help,
+	.cmd	= sub_cmd,
+	.cmd_n	= ARRAY_SIZE(sub_cmd),
+};
diff --git a/test/rockchip/test-power.c b/test/rockchip/test-power.c
new file mode 100644
index 0000000000..0529415b1b
--- /dev/null
+++ b/test/rockchip/test-power.c
@@ -0,0 +1,231 @@
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <boot_rkimg.h>
+#include <console.h>
+#include <dm.h>
+#include <thermal.h>
+#include <wdt.h>
+#include <asm/io.h>
+#include <power/pmic.h>
+#include <power/regulator.h>
+#include "test-rockchip.h"
+
+#ifdef CONFIG_DM_REGULATOR
+static int regulator_change_voltage(struct udevice *dev)
+{
+	struct dm_regulator_uclass_platdata *uc_pdata;
+	int uV, save_uV, step_uV = 12500;
+	int i, ret;
+
+	uc_pdata = dev_get_uclass_platdata(dev);
+
+	/* Only voltage changeable regulator will be tested! */
+	if ((uc_pdata->max_uV == uc_pdata->min_uV) ||
+	    !regulator_get_enable(dev) || strncmp("DCDC", dev->name, 4))
+		return 0;
+
+	/* Test get/set() */
+	save_uV = regulator_get_value(dev);
+	if (save_uV < 0)
+		return save_uV;
+
+	ret = regulator_set_value(dev, save_uV);
+	if (ret < 0)
+		return ret;
+
+	for (i = 1; i < 4; i++) {
+		uV = regulator_get_value(dev);
+		regulator_set_value(dev, uV + step_uV * i);
+		printf("%s@%s: set %d uV -> %d uV; read back %d uV\n",
+		       dev->name, uc_pdata->name, uV, uV + step_uV * i,
+		       regulator_get_value(dev));
+
+		if ((uV + step_uV * i) != regulator_get_value(dev)) {
+			printf("%s@%s: set voltage failed\n",
+			       dev->name, uc_pdata->name);
+			ret = -EINVAL;
+			break;
+		}
+	}
+
+	regulator_set_value(dev, save_uV);
+
+	return ret;
+}
+
+static int do_test_regulator(cmd_tbl_t *cmdtp, int flag,
+			     int argc, char *const argv[])
+{
+	struct udevice *dev;
+	struct uclass *uc;
+	int ret;
+
+	ret = uclass_get(UCLASS_REGULATOR, &uc);
+	if (ret)
+		return ret;
+
+	for (uclass_first_device(UCLASS_REGULATOR, &dev);
+	     dev;
+	     uclass_next_device(&dev)) {
+		ret = regulator_change_voltage(dev);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+#endif
+
+#ifdef CONFIG_DM_RESET
+static int do_test_reset(cmd_tbl_t *cmdtp, int flag,
+			 int argc, char *const argv[])
+{
+	return run_command("reset", 0);
+}
+#endif
+
+#ifdef CONFIG_CMD_DVFS
+static int do_test_dvfs(cmd_tbl_t *cmdtp, int flag,
+			int argc, char *const argv[])
+{
+	return run_command("dvfs", 0);
+}
+#endif
+
+#if defined(CONFIG_WDT)
+static int do_test_wdt(cmd_tbl_t *cmdtp, int flag,
+		       int argc, char *const argv[])
+{
+	struct udevice *dev;
+	int ret;
+
+	ret = uclass_get_device(UCLASS_WDT, 0, &dev);
+	if (ret) {
+		if (ret != -ENODEV)
+			printf("Get watchdog device failed, ret=%d\n", ret);
+		return ret;
+	}
+
+	printf("Watchdog would reset system 10s later\n");
+	wdt_start(dev, 5000, 0);
+	wdt_stop(dev);
+
+	return 0;
+}
+#endif
+
+#ifdef CONFIG_DM_THERMAL
+static int do_test_thermal(cmd_tbl_t *cmdtp, int flag,
+			   int argc, char *const argv[])
+{
+	struct udevice *dev;
+	int ret, temp;
+
+	ret = uclass_get_device(UCLASS_THERMAL, 0, &dev);
+	if (ret) {
+		printf("Get thermal device failed, ret=%d\n", ret);
+		return ret;
+	}
+
+	ret = thermal_get_temp(dev, &temp);
+	if (ret) {
+		printf("Get temperature failed, ret=%d\n", ret);
+		return ret;
+	}
+
+	printf("Get temperature: %d'c\n", temp);
+
+	return 0;
+}
+#endif
+
+#ifdef CONFIG_CMD_PMIC
+static int do_test_pmic(cmd_tbl_t *cmdtp, int flag,
+			int argc, char *const argv[])
+{
+	struct udevice *dev;
+	struct uclass *uc;
+	int ret;
+
+	ret = uclass_get(UCLASS_PMIC, &uc);
+	if (ret)
+		return ret;
+
+	for (uclass_first_device(UCLASS_PMIC, &dev);
+	     dev;
+	     uclass_next_device(&dev)) {
+		env_set("this_pmic", dev->name);
+		run_command("pmic dev $this_pmic", 0);
+		ret = run_command("pmic dump", 0);
+		if (ret)
+			goto out;
+	}
+
+out:
+	env_set("this_pmic", NULL);
+
+	return ret;
+}
+#endif
+
+#ifdef CONFIG_DM_CHARGE_DISPLAY
+static int do_test_charge(cmd_tbl_t *cmdtp, int flag,
+			  int argc, char *const argv[])
+{
+	/* TODO */
+	return 0;
+}
+#endif
+
+static cmd_tbl_t sub_cmd[] = {
+#ifdef CONFIG_CMD_CHARGE_DISPLAY
+	UNIT_CMD_ATTR_DEFINE(charge, 0, CMD_FLG_NORETURN),
+#endif
+#ifdef CONFIG_CMD_DVFS
+	UNIT_CMD_DEFINE(dvfs, 0),
+#endif
+#ifdef CONFIG_CMD_PMIC
+	UNIT_CMD_DEFINE(pmic, 0),
+#endif
+	UNIT_CMD_ATTR_DEFINE(reset, 0, CMD_FLG_NORETURN),
+#ifdef CONFIG_DM_REGULATOR
+	UNIT_CMD_ATTR_DEFINE(regulator, 0, CMD_FLG_INTERACTIVE),
+#endif
+#ifdef CONFIG_DM_THERMAL
+	UNIT_CMD_DEFINE(thermal, 0),
+#endif
+#if defined(CONFIG_WDT)
+	UNIT_CMD_DEFINE(wdt, 0),
+#endif
+};
+
+static char sub_cmd_help[] =
+#ifdef CONFIG_CMD_CHARGE_DISPLAY
+"    [i] rktest charge                      - test charge animation\n"
+#endif
+#ifdef CONFIG_CMD_DVFS
+"    [.] rktest dvfs                        - test rockchip wide temperature dvfs\n"
+#endif
+#ifdef CONFIG_CMD_PMIC
+"    [.] rktest pmic                        - test pmic, dump registers\n"
+#endif
+"    [n] rktest reset                       - test sysreset\n"
+#ifdef CONFIG_DM_REGULATOR
+"    [i] rktest regulator                   - test regulator set and show\n"
+#endif
+#ifdef CONFIG_DM_THERMAL
+"    [.] rktest thermal                     - test thermal, getting temperature\n"
+#endif
+;
+
+const struct cmd_group cmd_grp_power = {
+	.id	= TEST_ID_POWER,
+	.help	= sub_cmd_help,
+	.cmd	= sub_cmd,
+	.cmd_n	= ARRAY_SIZE(sub_cmd),
+};
diff --git a/test/rockchip/test-regulator.c b/test/rockchip/test-regulator.c
deleted file mode 100644
index 093336689c..0000000000
--- a/test/rockchip/test-regulator.c
+++ /dev/null
@@ -1,157 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <asm/io.h>
-#include <common.h>
-#include <console.h>
-#include <dm.h>
-#include <power/pmic.h>
-#include <power/regulator.h>
-#include "test-rockchip.h"
-
-static void regulator_show_dt(struct udevice *dev)
-{
-	struct dm_regulator_uclass_platdata *uc_pdata;
-	int uV;
-
-	uc_pdata = dev_get_uclass_platdata(dev);
-	uV = regulator_get_value(dev);
-
-	printf("%25s@%15s: ", dev->name, uc_pdata->name);
-	printf("%7duV <-> %7duV, set %7duV, %s",
-	       uc_pdata->min_uV, uc_pdata->max_uV, uV,
-	       (uc_pdata->always_on || uc_pdata->boot_on) ?
-	       "enabling" : "disabled");
-
-	printf(" | supsend %7duV, %s",
-	       uc_pdata->suspend_uV,
-	       uc_pdata->suspend_on ? "enabling" : "disabled");
-	if (uc_pdata->init_uV != -ENODATA)
-		printf("; init %7duV", uc_pdata->init_uV);
-
-	printf("\n");
-
-}
-
-static void regulator_show_state(struct udevice *dev)
-{
-	struct dm_regulator_uclass_platdata *uc_pdata;
-	int enable, uV, suspend_enable, suspend_uV;
-
-	uc_pdata = dev_get_uclass_platdata(dev);
-
-	enable = regulator_get_enable(dev);
-	uV = regulator_get_value(dev);
-
-	suspend_enable = regulator_get_suspend_enable(dev);
-	suspend_uV = regulator_get_suspend_value(dev);
-
-	printf("%25s@%15s: set %7duV, %s | suspend %7duV, %s\n",
-	       dev->name, uc_pdata->name, uV,
-	       enable ? "enabling" : "disabled", suspend_uV,
-	       suspend_enable ? "enabling" : "disabled");
-}
-
-static int regulator_confirm_dt(void)
-{
-	struct udevice *dev;
-	struct uclass *uc;
-	int ret;
-
-	ret = uclass_get(UCLASS_REGULATOR, &uc);
-	if (ret)
-		return ret;
-
-	printf("<Board dts config>:\n");
-	for (uclass_first_device(UCLASS_REGULATOR, &dev);
-	     dev;
-	     uclass_next_device(&dev)) {
-		regulator_show_dt(dev);
-	}
-
-	printf("\n<Board current status>:\n");
-	for (uclass_first_device(UCLASS_REGULATOR, &dev);
-	     dev;
-	     uclass_next_device(&dev)) {
-		regulator_show_state(dev);
-	}
-
-	printf("\n");
-
-	while (!getc())
-		;
-
-	return 0;
-}
-
-static int regulator_adjust_voltage(struct udevice *dev)
-{
-	struct dm_regulator_uclass_platdata *uc_pdata;
-	int i, uV, save_uV, step_uV = 12500;
-
-	uc_pdata = dev_get_uclass_platdata(dev);
-
-	/* only not fix voltage regulator will be tested! */
-	if ((uc_pdata->max_uV == uc_pdata->min_uV) ||
-	    !regulator_get_enable(dev) || strncmp("DCDC", dev->name, 4))
-		return 0;
-
-	/* save for restore after test done */
-	save_uV = regulator_get_value(dev);
-
-	for (i = 1; i < 4; i++) {
-		uV = regulator_get_value(dev);
-		printf("[%s@%s] set: %d uV -> %d uV;  ",
-		       dev->name, uc_pdata->name, uV, uV + step_uV * i);
-		uV += (step_uV * i);
-		regulator_set_value(dev, uV);
-		printf("ReadBack: %d uV\n\n", regulator_get_value(dev));
-		printf("Confirm '%s' voltage, then hit any key to continue...\n\n",
-		       uc_pdata->name);
-
-		while (!getc())
-			;
-	}
-
-	/* restore voltage */
-	regulator_set_value(dev, save_uV);
-
-	return 0;
-}
-
-static int regulator_confirm_voltage_accuracy(void)
-{
-	struct udevice *dev;
-	struct uclass *uc;
-	int ret;
-
-	ret = uclass_get(UCLASS_REGULATOR, &uc);
-	if (ret)
-		return ret;
-
-	for (uclass_first_device(UCLASS_REGULATOR, &dev);
-	     dev;
-	     uclass_next_device(&dev)) {
-		regulator_adjust_voltage(dev);
-	}
-
-	return 0;
-}
-
-int board_regulator_test(int argc, char * const argv[])
-{
-	printf("----------------------------------------------------\n");
-	printf("REGULATOR: status show\n");
-	printf("----------------------------------------------------\n\n");
-	regulator_confirm_dt();
-
-	printf("----------------------------------------------------\n");
-	printf("REGULATOR: voltage accuracy confirm\n");
-	printf("----------------------------------------------------\n\n");
-	regulator_confirm_voltage_accuracy();
-
-	return 0;
-}
diff --git a/test/rockchip/test-rknand.c b/test/rockchip/test-rknand.c
deleted file mode 100644
index 59a6e2be6f..0000000000
--- a/test/rockchip/test-rknand.c
+++ /dev/null
@@ -1,117 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <asm/io.h>
-#include <cli.h>
-#include <common.h>
-#include <linux/compat.h>
-#include <malloc.h>
-#include "test-rockchip.h"
-
-int board_rknand_test(int argc, char * const argv[])
-{
-	u8 *write_buffer, *read_buffer;
-	u32 i, blocks = 0;
-	unsigned long ts;
-	int err = 0;
-	char cmd_rknand[512] = {0};
-
-	blocks = simple_strtoul(argv[2], NULL, 0);
-	if (!blocks) {
-		printf("Usage: rktest rknand blocks\n");
-		printf("8129 <= blocks <= 30000\n");
-		err = -EINVAL;
-		goto err_wb;
-	} 
-
-	if (blocks % 2) {
-		/* Round up */
-		blocks += 1;
-	}
-
-	if (blocks < 8192) {
-		printf("Round up to 8192 blocks compulsively\n");
-		blocks = 8192;
-	}
-
-	if (blocks > 30000) {
-		printf("Round down to 30000 blocks compulsively\n");
-		blocks = 30000;
-	}
-
-	/* 1. Prepare memory */
-
-	write_buffer = (u8 *)kmalloc(sizeof(u8) * blocks * 512, 0);
-	if (!write_buffer) {
-		printf("No memory for write_buffer!\n");
-		err = -ENOMEM;
-		goto err_wb;
-	}
-
-	read_buffer = (u8 *)kmalloc(sizeof(u8) * blocks * 512, 0);
-	if (!read_buffer) {
-		printf("No memory for read_buffer!\n");
-		err = -ENOMEM;
-		goto err_rb;
-	}
-
-	for (i = 0; i < blocks * 512; i++) {
-		write_buffer[i] = i;
-		read_buffer[i] = 0;
-	}
-
-	/* 2. Select device */
-
-	snprintf(cmd_rknand, sizeof(cmd_rknand), "rknand dev 0");
-	err = cli_simple_run_command(cmd_rknand, 0);
-	if (!err)
-		goto err_mw;
-
-	/* 3. Prepare and start cli command */
-
-	snprintf(cmd_rknand, sizeof(cmd_rknand),
-		 "rknand write 0x%x 0x1000 0x%x",
-		 (u32)(ulong)write_buffer, blocks);
-	ts = get_timer(0);
-	err = cli_simple_run_command(cmd_rknand, 0);
-	ts = get_timer(0) - ts;
-	if (!err)
-		goto err_mw;
-
-	printf("rknand write: size %dMB, used %ldms, speed %ldMB/s\n",
-		blocks / 2048, ts, (blocks >> 1) / ts);
-
-	snprintf(cmd_rknand, sizeof(cmd_rknand),
-		 "rknand read 0x%x 0x1000 0x%x",
-		 (u32)(ulong)read_buffer, blocks);
-	ts = get_timer(0);
-	err = cli_simple_run_command(cmd_rknand, 0);
-	ts = get_timer(0) - ts;
-	if (!err)
-		goto err_mw;
-
-	printf("rknand read: size %dMB, used %ldms, speed %ldMB/s\n",
-		blocks / 2048, ts, (blocks >> 1) / ts);
-	/* 4. Verify the context */
-
-	err = 0;
-	for (i = 0; i < blocks * 512; i++) {
-		if (write_buffer[i] != read_buffer[i]) {
-			printf("rknand context compare err!\n");
-			err = -EINVAL;
-			goto err_mw;
-		}
-	}
-
-err_mw:
-	kfree(read_buffer);
-	read_buffer = NULL;
-err_rb:
-	kfree(write_buffer);
-	write_buffer = NULL;
-err_wb:
-	return err;
-}
diff --git a/test/rockchip/test-rockchip.c b/test/rockchip/test-rockchip.c
index 303eb3a880..6ede00316a 100644
--- a/test/rockchip/test-rockchip.c
+++ b/test/rockchip/test-rockchip.c
@@ -5,170 +5,217 @@
  */
 
 #include <common.h>
-#include <command.h>
+#include <console.h>
 #include "test-rockchip.h"
 
-typedef struct board_module {
-	char *name;
-	char *desc;
-	int (*test)(int argc, char * const argv[]);
-} board_module_t;
-
-static int board_rockusb_test(int argc, char * const argv[])
-{
-	return run_command_list("rockusb 0 ${devtype} ${devnum}", -1, 0);
-}
+extern struct cmd_group cmd_grp_boot;
+extern struct cmd_group cmd_grp_display;
+extern struct cmd_group cmd_grp_download;
+extern struct cmd_group cmd_grp_misc;
+extern struct cmd_group cmd_grp_net;
+extern struct cmd_group cmd_grp_power;
+extern struct cmd_group cmd_grp_storage;
+
+enum {
+	TEST_SKIP_UNK,
+	TEST_SKIP_NORETURN,
+	TEST_SKIP_INTERACTIVE,
+	TEST_SKIP_NORETURN_INTERACTIVE,
+	TEST_SKIP_MAX,
+};
 
-static int board_fastboot_test(int argc, char * const argv[])
-{
-	return run_command_list("fastboot usb 0", -1, 0);
-}
+static const char *cmd_grp_name[] = {
+	[TEST_ID_UNK]		= "UNK",
+	[TEST_ID_BOOT]		= "BOOT",
+	[TEST_ID_DISPLAY]	= "DISPLAY",
+	[TEST_ID_DOWNLOAD]	= "DOWNLOAD",
+	[TEST_ID_MISC]		= "MISC",
+	[TEST_ID_NET]		= "NET",
+	[TEST_ID_POWER]		= "POWER",
+	[TEST_ID_STORAGE]	= "STORAGE",
+	[TEST_ID_USB]		= "USB",
+	[TEST_ID_MAX]		= "MAX",
+};
 
-static board_module_t g_board_modules[] = {
-#if defined(CONFIG_IRQ)
-	{
-		.name = "timer",
-		.desc = "test timer and interrupt",
-		.test = board_timer_test
-	},
-#endif
-	{
-		.name = "brom",
-		.desc = "enter bootrom download mode",
-		.test = board_brom_dnl_test
-	},
-	{
-		.name = "rockusb",
-		.desc = "enter rockusb download mode",
-		.test = board_rockusb_test
-	},
-	{
-		.name = "fastboot",
-		.desc = "enter fastboot download mode",
-		.test = board_fastboot_test
-	},
-#if defined(CONFIG_DM_KEY)
-	{
-		.name = "key",
-		.desc = "test board keys",
-		.test = board_key_test
-	},
-#endif
-#if defined(CONFIG_MMC)
-	{
-		.name = "emmc",
-		.desc = "test emmc read/write speed",
-		.test = board_emmc_test
-	},
-#endif
-#if defined(CONFIG_RKNAND)
-	{
-		.name = "rknand",
-		.desc = "test rknand read/write speed",
-		.test = board_rknand_test
-	},
-#endif
-
-#if defined(CONFIG_DM_REGULATOR)
-	{
-		.name = "regulator",
-		.desc = "test regulator volatge set and show regulator status",
-		.test = board_regulator_test
-	},
-#endif
-#if defined(CONFIG_GMAC_ROCKCHIP)
-	{
-		.name = "eth",
-		.desc = "test ethernet",
-		.test = board_eth_test
-	},
-#endif
-#if defined(CONFIG_RK_IR)
-	{
-		.name = "ir",
-		.desc = "test pwm ir remoter for box product",
-		.test = board_ir_test
-	},
-#endif
-#if defined(CONFIG_ROCKCHIP_VENDOR_PARTITION)
-	{
-		.name = "vendor",
-		.desc = "test vendor storage partition read/write",
-		.test = board_vendor_storage_test
-	},
-#endif
+static const struct cmd_group *cmd_groups[] = {
+	&cmd_grp_download,
+	&cmd_grp_boot,
+	&cmd_grp_storage,
+	&cmd_grp_power,
+	&cmd_grp_misc,
+	&cmd_grp_net,
+	&cmd_grp_display,
 };
 
-static void help(void)
+static int cmd_groups_help(void)
 {
 	int i;
 
-	printf("Command: rktest [module] [args...]\n"
-	       "  - module: timer|key|emmc|rknand|regulator|eth|ir|brom|rockusb|fastboot|vendor\n"
-	       "  - args: depends on module, try 'rktest [module]' for test or more help\n\n");
+	printf("* Test Case:\n");
+	printf("    -.: normal item\n");
+	printf("    -n: noturen item\n");
+	printf("    -i: interactive item\n\n");
+
+	printf("* ALL:\n");
+	printf("    [.] rktest all                         - test all\n");
+	printf("    [.] rktest all v1                      - test all, ignore noreturn items\n");
+	printf("    [.] rktest all v2                      - test all, ignore interactive items\n");
+	printf("    [.] rktest all v3                      - test all, ignore interactive and noreturn items\n");
+	printf("    [.] rktest storage			   - test all storage\n");
+	printf("    [.] rktest power			   - test all power\n");
+	printf("    [.] rktest misc			   - test all misc\n");
+	printf("    [.] rktest net			   - test all net\n");
+	printf("    [.] rktest display			   - test all display\n");
+
+	for (i = 0; i < ARRAY_SIZE(cmd_groups); i++) {
+		printf("* %s:\n", cmd_grp_name[cmd_groups[i]->id]);
+		printf("%s", cmd_groups[i]->help);
+	}
 
-	printf("  - Enabled modules:\n");
-	for (i = 0; i < ARRAY_SIZE(g_board_modules); i++)
-		printf("     - %10s%s %s\n",
-		       g_board_modules[i].name,
-		       g_board_modules[i].desc ? ":" : "",
-		       g_board_modules[i].desc ? g_board_modules[i].desc : "");
+	return 0;
 }
 
+static int skip_this_cmd(cmd_tbl_t *cp, int skip_mode)
+{
+	bool is_interactive = CMD_FLG_ENABLED(cp, CMD_FLG_INTERACTIVE);
+	bool is_noreturn = CMD_FLG_ENABLED(cp, CMD_FLG_NORETURN);
+
+	switch (skip_mode) {
+	case TEST_SKIP_NORETURN:
+		return is_noreturn;
+	case TEST_SKIP_INTERACTIVE:
+		return is_interactive;
+	case TEST_SKIP_NORETURN_INTERACTIVE:
+		return is_noreturn || is_interactive;
+	}
+
+	return 0;
+}
 static int do_rockchip_test(cmd_tbl_t *cmdtp, int flag,
-			    int argc, char * const argv[])
+			    int argc, char *const argv[])
 {
 	ulong ms_start = 0, ms = 0, sec = 0;
-	board_module_t *module = NULL;
-	char *module_name = NULL;
-	int index = 0, err = 0;
-	bool found = false;
-
-	if (argc >= 2) {
-		module_name = argv[1];
+	int grp_test_id = TEST_ID_UNK;
+	int okay = 0, fail = 0;
+	int ret, i, j;
+	int skip_mode = 0;
+	cmd_tbl_t *cp;
+
+	if (argc == 1)
+		return cmd_groups_help();
+
+	/* Drop initial "rktest" arg */
+	argc--;
+	argv++;
+
+	if (!strcmp(argv[0], "all")) {
+		/* Test all skip_mode: v1, v2, v3... */
+		if (argv[1]) {
+			if (!strcmp(argv[1], CMD_MODE_V1))
+				skip_mode = TEST_SKIP_NORETURN;
+			else if (!strcmp(argv[1], CMD_MODE_V2))
+				skip_mode = TEST_SKIP_INTERACTIVE;
+			else if (!strcmp(argv[1], CMD_MODE_V3))
+				skip_mode = TEST_SKIP_NORETURN_INTERACTIVE;
+		}
+		goto all_test;
 	} else {
-		help();
-		return 0;
+		if (!strcmp(argv[0], "storage"))
+			grp_test_id = TEST_ID_STORAGE;
+		else if (!strcmp(argv[0], "power"))
+			grp_test_id = TEST_ID_POWER;
+		else if (!strcmp(argv[0], "misc"))
+			grp_test_id = TEST_ID_MISC;
+		else if (!strcmp(argv[0], "net"))
+			grp_test_id = TEST_ID_NET;
+		else if (!strcmp(argv[0], "display"))
+			grp_test_id = TEST_ID_DISPLAY;
+
+		if (grp_test_id != TEST_ID_UNK) {
+			skip_mode = TEST_SKIP_NORETURN; /* Skip noreturn item */
+			goto all_test;
+		}
+	}
+
+/* item_test: */
+	for (i = 0; i < ARRAY_SIZE(cmd_groups); i++) {
+		cp = find_cmd_tbl(argv[0],
+				  cmd_groups[i]->cmd,
+				  cmd_groups[i]->cmd_n);
+		if (cp) {
+			ret = cp->cmd(cmdtp, flag, argc, argv);
+			printf("\n### [%s] test done, result: <%s>..\n",
+			       cp->name, ret ? "FAILED" : "OKAY");
+
+			return ret;
+		}
 	}
 
-	if (!module_name)
-		return 0;
+	printf("Unknown cmd: rktest %s (Not enabled ?)\n", argv[0]);
+	goto finish;
+
+all_test:
+	ms_start = get_timer(0);
+
+	for (i = 0; i < ARRAY_SIZE(cmd_groups); i++) {
+		/*
+		 * If 'grp_test_id != TEST_ID_UNK', now is group test, find
+		 * the grp cmd.
+		 */
+		if (grp_test_id != TEST_ID_UNK &&
+		    grp_test_id != cmd_groups[i]->id)
+			continue;
+
+		/* Run all commands in 'this' grp */
+		for (j = 0, cp = cmd_groups[i]->cmd;
+		     j < cmd_groups[i]->cmd_n;
+		     j++, cp++) {
+			/* Skip this ignored cmd */
+			if (skip_this_cmd(cp, skip_mode)) {
+				printf("### Skip  [%s]\n", cp->name);
+				continue;
+			}
 
-	for (index = 0; index < ARRAY_SIZE(g_board_modules); index++) {
-		module = &g_board_modules[index];
-		if (module && !strcmp(module->name, module_name)) {
-			found = true;
+			printf("### Start [%s]\n", cp->name);
 
-			printf("***********************************************************\n");
-			printf("Rockchip Board Module [%s] Test start.\n", module_name);
-			printf("***********************************************************\n");
+			/* Flush console */
+			if (cmd_groups[i]->id == TEST_ID_DOWNLOAD)
+				flushc();
 
-			ms_start = get_timer(0);
+			/* Execute command */
+			ret = cp->cmd(cmdtp, flag, argc, argv);
+			if (ret)
+				fail++;
+			else
+				okay++;
 
-			err = module->test(argc, argv);
+			/* Result */
+			printf("### Finish, result: <%s>\n\n",
+			       ret ? "FAILED" : "PASS");
 
-			ms = get_timer(ms_start);
-			if (ms >= 1000) {
-				sec = ms / 1000;
-				ms = ms % 1000;
+			if (ctrlc()) {
+				printf("Exit board test by ctrl+c\n");
+				break;
 			}
-
-			printf("-----------------------------------------------------------\n");
-			printf("Rockchip Board Module [%s] Test end <%s>.. Total: %lu.%lus\n",
-			       module->name, err ? "FAILED" : "PASS", sec, ms);
-			printf("-----------------------------------------------------------\n\n\n");
 		}
 	}
 
-	if (!found)
-		printf("Rockchip Board Module [%s] is not support !\n",
-		       module_name);
+	/* Total time and report */
+	ms = get_timer(ms_start);
+	if (ms >= 1000) {
+		sec = ms / 1000;
+		ms = ms % 1000;
+	}
+
+	printf("[=== SUM: pass: %d; failed: %d; total: %lu.%lus ===]\n\n\n",
+	       okay, fail, sec, ms);
 
+finish:
 	return 0;
 }
 
 U_BOOT_CMD(
 	rktest, 10, 0, do_rockchip_test,
-	"Rockchip Board Module Test",
-	""
+	"Rockchip board modules test",
+	NULL
 );
diff --git a/test/rockchip/test-rockchip.h b/test/rockchip/test-rockchip.h
index 85e5335937..bc38d2ff24 100644
--- a/test/rockchip/test-rockchip.h
+++ b/test/rockchip/test-rockchip.h
@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:     GPL-2.0+
  */
@@ -7,20 +7,43 @@
 #ifndef _TEST_ROCKCHIP_H
 #define _TEST_ROCKCHIP_H
 
-int board_timer_test(int argc, char * const argv[]);
-int board_key_test(int argc, char * const argv[]);
-int board_emmc_test(int argc, char * const argv[]);
-int board_regulator_test(int argc, char * const argv[]);
-int board_rknand_test(int argc, char * const argv[]);
-#if defined(CONFIG_GMAC_ROCKCHIP)
-int board_eth_test(int argc, char * const argv[]);
-#endif
-#if defined(CONFIG_RK_IR)
-int board_ir_test(int argc, char * const argv[]);
-#endif
-int board_brom_dnl_test(int argc, char * const argv[]);
-#if defined(CONFIG_ROCKCHIP_VENDOR_PARTITION)
-int board_vendor_storage_test(int argc, char * const argv[]);
-#endif
+#include <common.h>
+
+#define CMD_FLG_NORMAL			"normal"
+#define CMD_FLG_NORETURN		"noreturn"
+#define CMD_FLG_INTERACTIVE		"interactive"
+#define CMD_FLG_ENABLED(cmd, mode)	(!strcmp((cmd)->usage, mode))
+#define CMD_MODE_V1			"v1"
+#define CMD_MODE_V2			"v2"
+#define CMD_MODE_V3			"v3"
+
+enum test_id {
+	TEST_ID_UNK,
+	TEST_ID_BOOT,
+	TEST_ID_DISPLAY,
+	TEST_ID_DOWNLOAD,
+	TEST_ID_MISC,
+	TEST_ID_NET,
+	TEST_ID_POWER,
+	TEST_ID_STORAGE,
+	TEST_ID_USB,
+	TEST_ID_MAX,
+};
+
+#define UNIT_CMD(_name, _maxargs, _usage)		\
+	U_BOOT_CMD_MKENT(_name, _maxargs, 1, do_test_##_name, _usage, "")
+
+#define UNIT_CMD_DEFINE(_name, _maxargs)		\
+	UNIT_CMD(_name, _maxargs, "")
+
+#define UNIT_CMD_ATTR_DEFINE(_name, _maxargs, _flag)	\
+	UNIT_CMD(_name, _maxargs, _flag)
+
+struct cmd_group {
+	int id;
+	const char *help;
+	cmd_tbl_t *cmd;
+	u32 cmd_n;
+};
 
 #endif /* _TEST_ROCKCHIP_H */
diff --git a/test/rockchip/test-storage.c b/test/rockchip/test-storage.c
new file mode 100644
index 0000000000..65e4a52edd
--- /dev/null
+++ b/test/rockchip/test-storage.c
@@ -0,0 +1,379 @@
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <boot_rkimg.h>
+#include <cli.h>
+#include <dm.h>
+#include <environment.h>
+#include <malloc.h>
+#include <misc.h>
+#include <sysmem.h>
+#include <linux/ctype.h>
+#include <asm/arch/vendor.h>
+#include "test-rockchip.h"
+
+#define DEFAULT_STORAGE_RW_PART		"userdata"
+
+#if defined(CONFIG_MMC) || defined(CONFIG_RKNAND) || defined(CONFIG_BLK)
+static int do_test_storage(cmd_tbl_t *cmdtp, int flag,
+			   int argc, char *const argv[],
+			   const char *devtype,
+			   const char *devnum,
+			   const char *label)
+{
+	struct blk_desc *dev_desc;
+	u32 blocks, round, sector;
+	char *w_buf, *r_buf;
+	char cmd[64];
+	int i, ret;
+	ulong ts;
+
+	if (argc != 4 && argc != 1)
+		return CMD_RET_USAGE;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: Can't find dev_desc\n", __func__);
+		return -ENODEV;
+	}
+
+	/* 1. Get input param */
+	if (argc == 4) {
+		sector = simple_strtoul(argv[1], NULL, 0);
+		blocks = simple_strtoul(argv[2], NULL, 0);
+		round  = simple_strtoul(argv[3], NULL, 0);
+	} else {
+		disk_partition_t part;
+
+		if (part_get_info_by_name(dev_desc,
+					  DEFAULT_STORAGE_RW_PART, &part) < 0) {
+			printf("%s: Can't find %s part\n",
+			       __func__, DEFAULT_STORAGE_RW_PART);
+			return -EINVAL;
+		}
+
+		/* 32MB */
+		sector = part.start;
+		blocks = part.size > 0x10000 ? 0x10000 : part.size;
+		round  = 4;
+	}
+
+	/* Round up */
+	if (blocks % 2)
+		blocks += 1;
+
+	printf("%s RW sectors on %s 0x%08x - 0x%08x(size: %ld MiB) for %d round\n\n",
+	       label, argc == 1 ? DEFAULT_STORAGE_RW_PART : "",
+	       sector, sector + blocks,
+	       (blocks * dev_desc->blksz) >> 20, round);
+
+	/* 2. Switch to devnum */
+	if (devtype) {
+		snprintf(cmd, sizeof(cmd), "%s dev %s", devtype, devnum);
+		if (run_command(cmd, 0)) {
+			printf("Switch to %s%s failed\n", devtype, devnum);
+			ret = -ENODEV;
+			goto err1;
+		}
+	}
+
+	/* 3. Prepare memory */
+	w_buf = sysmem_alloc_by_name("storage_w", blocks * dev_desc->blksz);
+	if (!w_buf) {
+		printf("No sysmem for w_buf!\n");
+		ret = -ENOMEM;
+		goto err1;
+	}
+
+	r_buf = sysmem_alloc_by_name("storage_r", blocks * dev_desc->blksz);
+	if (!r_buf) {
+		printf("No sysmem for r_buf!\n");
+		ret = -ENOMEM;
+		goto err2;
+	}
+
+	for (i = 0; i < blocks * dev_desc->blksz; i++) {
+		w_buf[i] = i;
+		r_buf[i] = 0;
+	}
+
+	/* 4. Write test */
+	ts = get_timer(0);
+	if (devtype) {
+		snprintf(cmd, sizeof(cmd), "%s write 0x%x 0x%x 0x%x",
+			 devtype, (u32)(ulong)w_buf, sector, blocks);
+		for (i = 0; i < round; i++) {
+			if (run_command(cmd, 0)) {
+				ret = -EIO;
+				goto err3;
+			}
+		}
+	} else {
+		for (i = 0; i < round; i++) {
+			ret = blk_dwrite(dev_desc, sector, blocks, w_buf);
+			if (ret != blocks) {
+				ret = -EIO;
+				goto err3;
+			}
+		}
+	}
+
+	ts = get_timer(0) - ts;
+	printf("\n%s write: size %dMB, used %ldms, speed %ldMB/s\n",
+	       label, blocks * round / 2048, ts, (blocks * round >> 1) / ts);
+
+	/* 5. Read test */
+	ts = get_timer(0);
+	if (devtype) {
+		snprintf(cmd, sizeof(cmd), "%s read 0x%x 0x%x 0x%x",
+			 devtype, (u32)(ulong)r_buf, sector, blocks);
+
+		for (i = 0; i < round; i++) {
+			if (run_command(cmd, 0)) {
+				ret = -EIO;
+				goto err3;
+			}
+		}
+	} else {
+		for (i = 0; i < round; i++) {
+			ret = blk_dread(dev_desc, sector, blocks, r_buf);
+			if (ret != blocks) {
+				ret = -EIO;
+				goto err3;
+			}
+		}
+	}
+
+	ts = get_timer(0) - ts;
+	printf("\n%s read: size %dMB, used %ldms, speed %ldMB/s\n",
+	       label, blocks * round / 2048, ts, (blocks * round >> 1) / ts);
+
+	/* 6. Verify the context */
+	for (i = 0; i < blocks * dev_desc->blksz; i++) {
+		if (w_buf[i] != r_buf[i]) {
+			printf("%s context compare error!\n", label);
+			ret = -EINVAL;
+			goto err3;
+		}
+	}
+
+	/* 7. Switch back to default system devnum */
+	if (devtype && !strcmp(devtype, "mmc") &&
+	    strcmp(devnum, env_get("devnum"))) {
+		ret = run_command(cmd, 0);
+		if (ret) {
+			printf("Switch to mmc1 failed\n");
+			ret = -ENODEV;
+			goto err3;
+		}
+	}
+
+	ret = 0;
+err3:
+	sysmem_free((phys_addr_t)r_buf);
+err2:
+	sysmem_free((phys_addr_t)w_buf);
+err1:
+
+	return ret;
+}
+
+#ifdef CONFIG_MMC
+static int do_test_emmc(cmd_tbl_t *cmdtp, int flag,
+			int argc, char *const argv[])
+{
+	return do_test_storage(cmdtp, flag, argc, argv, "mmc", "0", "MMC0");
+}
+
+static int do_test_sdmmc(cmd_tbl_t *cmdtp, int flag,
+			 int argc, char *const argv[])
+{
+	return do_test_storage(cmdtp, flag, argc, argv, "mmc", "1", "MMC1");
+}
+#endif
+
+#ifdef CONFIG_RKNAND
+static int do_test_rknand(cmd_tbl_t *cmdtp, int flag,
+			  int argc, char *const argv[])
+{
+	return do_test_storage(cmdtp, flag, argc, argv, "rknand", "0", "RKNAND0");
+}
+#endif
+
+static int do_test_blk(cmd_tbl_t *cmdtp, int flag,
+		       int argc, char *const argv[])
+{
+	return do_test_storage(cmdtp, flag, argc, argv, NULL, NULL, "BLK");
+}
+#endif/* defined(CONFIG_MMC) || defined(CONFIG_RKNAND) || defined(CONFIG_BLK) */
+
+#if defined(CONFIG_OPTEE_CLIENT) && defined(CONFIG_MMC)
+static int do_test_secure_storage(cmd_tbl_t *cmdtp, int flag,
+				  int argc, char *const argv[])
+{
+	return run_command("mmc testsecurestorage", 0);
+}
+#endif
+
+#if defined(CONFIG_CMD_SAVEENV) && !defined(CONFIG_ENV_IS_NOWHERE) && \
+	!defined(CONFIG_SPL_BUILD)
+static int do_test_env(cmd_tbl_t *cmdtp, int flag,
+		       int argc, char *const argv[])
+{
+	int ret;
+
+	ret = env_save();
+	if (ret)
+		return ret;
+
+	return env_load();
+}
+#endif
+
+#ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
+static int do_test_vendor(cmd_tbl_t *cmdtp, int flag,
+			  int argc, char *const argv[])
+{
+	return vendor_storage_test();
+}
+#endif
+
+#ifdef CONFIG_ROCKCHIP_EFUSE
+static int do_test_efuse(cmd_tbl_t *cmdtp, int flag,
+			 int argc, char *const argv[])
+{
+	struct udevice *dev;
+	u8 fuses[128] = {0};
+	int ret;
+
+	ret = uclass_get_device(UCLASS_MISC, 0, &dev);
+	if (ret) {
+		printf("Can't find efuse device\n");
+		return 0;
+	}
+
+	ret = misc_read(dev, 0, &fuses, sizeof(fuses));
+	if (ret) {
+		printf("Efuse read failed\n");
+		return 0;
+	}
+
+	printf("Efuse-content:\n");
+	print_buffer(0, fuses, 1, 128, 16);
+
+	return 0;
+}
+#endif
+
+#ifdef CONFIG_ROCKCHIP_OTP
+static int do_test_otp(cmd_tbl_t *cmdtp, int flag,
+		       int argc, char *const argv[])
+{
+	struct udevice *dev;
+	u8 otps[64] = {0};
+	int ret;
+
+	/* retrieve the device */
+	ret = uclass_get_device_by_driver(UCLASS_MISC, 0, &dev);
+	if (ret) {
+		printf("Can't find otp device\n");
+		return 0;
+	}
+
+	ret = misc_read(dev, 0, &otps, sizeof(otps));
+	if (ret) {
+		printf("OTP read failed\n");
+		return 0;
+	}
+
+	printf("Otp-content:\n");
+	print_buffer(0, otps, 1, 64, 16);
+
+	return 0;
+}
+#endif
+
+#ifdef CONFIG_PARTITIONS
+static int do_test_part(cmd_tbl_t *cmdtp, int flag,
+			int argc, char *const argv[])
+{
+	return run_command("part list ${devtype} ${devnum}", 0);
+}
+#endif
+
+static cmd_tbl_t sub_cmd[] = {
+#ifdef CONFIG_BLK
+	UNIT_CMD_DEFINE(blk, 0),
+#endif
+#ifdef CONFIG_MMC
+	UNIT_CMD_DEFINE(emmc, 0),
+#endif
+#ifdef CONFIG_ROCKCHIP_EFUSE
+	UNIT_CMD_DEFINE(efuse, 0),
+#endif
+#if defined(CONFIG_CMD_SAVEENV) && !defined(CONFIG_ENV_IS_NOWHERE) && \
+	!defined(CONFIG_SPL_BUILD)
+	UNIT_CMD_DEFINE(env, 0),
+#endif
+#ifdef CONFIG_ROCKCHIP_OTP
+	UNIT_CMD_DEFINE(otp, 0),
+#endif
+#ifdef CONFIG_RKNAND
+	UNIT_CMD_DEFINE(rknand, 0),
+#endif
+#if defined(CONFIG_OPTEE_CLIENT) && defined(CONFIG_MMC)
+	UNIT_CMD_DEFINE(secure_storage, 0),
+#endif
+#ifdef CONFIG_PARTITIONS
+	UNIT_CMD_DEFINE(part, 0),
+#endif
+#ifdef CONFIG_MMC
+	UNIT_CMD_DEFINE(sdmmc, 0),
+#endif
+#ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
+	UNIT_CMD_DEFINE(vendor, 0),
+#endif
+};
+
+static char sub_cmd_help[] =
+#ifdef CONFIG_BLK
+"    [.] rktest blk                         - test blk layer read/write\n"
+#endif
+#ifdef CONFIG_MMC
+"    [.] rktest emmc blk# cnt round         - test emmc read/write speed\n"
+"    [.] rktest sdmmc                       - test sd card and fat fs read/write\n"
+#endif
+#ifdef CONFIG_RKNAND
+"    [.] rktest rknand blk# cnt round       - test rknand read/write speed\n"
+#endif
+#if defined(CONFIG_OPTEE_CLIENT) && defined(CONFIG_MMC)
+"    [.] rktest secure_storage              - test secure storage\n"
+#endif
+#ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
+"    [.] rktest vendor                      - test vendor storage read/write\n"
+#endif
+#ifdef CONFIG_ROCKCHIP_EFUSE
+"    [.] rktest efuse                       - test efuse, dump content\n"
+#endif
+#ifdef CONFIG_ROCKCHIP_OTP
+"    [.] rktest otp                         - test otp, dump content\n"
+#endif
+#if defined(CONFIG_CMD_SAVEENV) && !defined(CONFIG_ENV_IS_NOWHERE) && \
+	!defined(CONFIG_SPL_BUILD)
+"    [.] rktest env                         - test save env to storage\n"
+#endif
+#ifdef CONFIG_PARTITIONS
+"    [.] rktest part                        - test part list\n"
+#endif
+;
+
+const struct cmd_group cmd_grp_storage = {
+	.id	= TEST_ID_STORAGE,
+	.help	= sub_cmd_help,
+	.cmd	= sub_cmd,
+	.cmd_n	= ARRAY_SIZE(sub_cmd),
+};
diff --git a/test/rockchip/test-timer.c b/test/rockchip/test-timer.c
deleted file mode 100644
index 66b20393a3..0000000000
--- a/test/rockchip/test-timer.c
+++ /dev/null
@@ -1,116 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <asm/io.h>
-#include <common.h>
-#include <irq-generic.h>
-#include <rk_timer_irq.h>
-#include "test-rockchip.h"
-
-/*************************** timer irq test ***********************************/
-static ulong seconds;
-
-/* must use volatile to avoid being optimized by complier */
-static int volatile exit;
-
-static void timer_irq_handler(int irq, void *data)
-{
-	static int count;
-	int period;
-
-	writel(TIMER_CLR_INT, TIMER_BASE + TIMER_INTSTATUS);
-
-	period = get_timer(seconds);
-	printf("timer_irq_handler: round-%d, irq=%d, period=%dms\n",
-	       count++, irq, period);
-	seconds = get_timer(0);
-
-	if (count >= 5) {
-		exit = 1;
-		irq_free_handler(TIMER_IRQ);
-		printf("timer_irq_handler: irq test finish.\n");
-	}
-}
-
-static int soc_timer_irq_test_init(void)
-{
-	/* Disable before config */
-	writel(0, TIMER_BASE + TIMER_CTRL);
-
-	/* Config */
-	writel(COUNTER_FREQUENCY, TIMER_BASE + TIMER_LOAD_COUNT0);
-	writel(0, TIMER_BASE + TIMER_LOAD_COUNT1);
-	writel(TIMER_CLR_INT, TIMER_BASE + TIMER_INTSTATUS);
-	writel(TIMER_EN | TIMER_INT_EN, TIMER_BASE + TIMER_CTRL);
-
-	/* Request irq */
-	irq_install_handler(TIMER_IRQ, timer_irq_handler, NULL);
-	irq_handler_enable(TIMER_IRQ);
-
-	seconds = get_timer(0);
-
-	while (!exit)
-		;
-
-	return 0;
-}
-
-/*************************** timer delay test *********************************/
-static inline uint64_t arch_counter_get_cntpct(void)
-{
-	uint64_t cval;
-
-	isb();
-#ifdef CONFIG_ARM64
-	asm volatile("mrs %0, cntpct_el0" : "=r" (cval));
-#else
-	asm volatile("mrrc p15, 0, %Q0, %R0, c14" : "=r" (cval));
-#endif
-	return cval;
-}
-
-static void sys_timer_delay_test_init(void)
-{
-	ulong delay_t = 100, cost_t;
-	u64 tick_start;
-	int i;
-
-	for (i = 0; i < 5; i++) {
-		printf("sys timer delay test, round-%d\n", i);
-
-		/* us delay */
-		tick_start = arch_counter_get_cntpct();
-		udelay(delay_t);
-		cost_t = (arch_counter_get_cntpct() - tick_start) / 24;
-		printf("\tdesire delay %luus, actually delay %luus\n",
-		       delay_t, cost_t);
-
-		/* ms delay */
-		tick_start = arch_counter_get_cntpct();
-		mdelay(delay_t);
-		cost_t = (arch_counter_get_cntpct() - tick_start) / 24000;
-
-		printf("\tdesire delay %lums, actually delay: %lums\n",
-		       delay_t, cost_t);
-
-		/* ms delay */
-		tick_start = arch_counter_get_cntpct();
-		mdelay(delay_t * 10);
-		cost_t = (arch_counter_get_cntpct() - tick_start) / 24000;
-
-		printf("\tdesire delay %lums, actually delay: %lums\n",
-		       delay_t * 10, cost_t);
-	}
-}
-
-int board_timer_test(int argc, char * const argv[])
-{
-	sys_timer_delay_test_init();
-
-	soc_timer_irq_test_init();
-
-	return 0;
-}
diff --git a/test/rockchip/test-vendor-storage.c b/test/rockchip/test-vendor-storage.c
deleted file mode 100644
index ba75c237e7..0000000000
--- a/test/rockchip/test-vendor-storage.c
+++ /dev/null
@@ -1,14 +0,0 @@
-/*
- * (C) Copyright 2018 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/arch/vendor.h>
-
-int board_vendor_storage_test(int argc, char * const argv[])
-{
-	return vendor_storage_test();
-}

commit a2d2b88ee1f600bb13d279ad11eedebb5972c8fb
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Tue Jul 23 08:46:25 2019 +0800

    video/drm: rockchip_display: add return value for automatic test
    
    Change-Id: I6cd4f7d4bd738c7f4cf59af3a2daf46365e7c1e9
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 7af5bdf54b..0cdec16e12 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -1047,37 +1047,43 @@ void rockchip_show_fbbase(ulong fbbase)
 	}
 }
 
-void rockchip_show_bmp(const char *bmp)
+int rockchip_show_bmp(const char *bmp)
 {
 	struct display_state *s;
+	int ret = 0;
 
 	if (!bmp) {
 		list_for_each_entry(s, &rockchip_display_list, head)
 			display_disable(s);
-		return;
+		return -ENOENT;
 	}
 
 	list_for_each_entry(s, &rockchip_display_list, head) {
 		s->logo.mode = s->charge_logo_mode;
 		if (load_bmp_logo(&s->logo, bmp))
 			continue;
-		display_logo(s);
+		ret = display_logo(s);
 	}
+
+	return ret;
 }
 
-void rockchip_show_logo(void)
+int rockchip_show_logo(void)
 {
 	struct display_state *s;
+	int ret = 0;
 
 	list_for_each_entry(s, &rockchip_display_list, head) {
 		s->logo.mode = s->logo_mode;
 		if (load_bmp_logo(&s->logo, s->ulogo_name))
 			printf("failed to display uboot logo\n");
 		else
-			display_logo(s);
+			ret = display_logo(s);
 
 		/* Load kernel bmp in rockchip_display_fixup() later */
 	}
+
+	return ret;
 }
 
 enum {
diff --git a/include/video_rockchip.h b/include/video_rockchip.h
index 335b27ebcb..bb6c34bbf7 100644
--- a/include/video_rockchip.h
+++ b/include/video_rockchip.h
@@ -21,8 +21,8 @@
 #define DRM_ROCKCHIP_FB_SIZE \
 	VNBYTES(DRM_ROCKCHIP_FB_BPP) * DRM_ROCKCHIP_FB_WIDTH * DRM_ROCKCHIP_FB_HEIGHT
 
-void rockchip_show_bmp(const char *bmp);
-void rockchip_show_logo(void);
+int rockchip_show_bmp(const char *bmp);
+int rockchip_show_logo(void);
 void rockchip_display_fixup(void *blob);
 
 #endif

commit e7b6c6a93fc172ebfaf6704a0292c276fedfbb3d
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Mon Jul 15 15:12:41 2019 +0800

    dm: crypto: add SHA512 test
    
    Change-Id: If7bb7bb559a9d4d5e70e1f27eabb8995c85872d9
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/cmd/crypto.c b/cmd/crypto.c
index c465ded797..4f64a5cad8 100644
--- a/cmd/crypto.c
+++ b/cmd/crypto.c
@@ -10,6 +10,7 @@
 #include <u-boot/md5.h>
 #include <u-boot/sha1.h>
 #include <u-boot/sha256.h>
+#include <u-boot/sha512.h>
 
 static u8 foo_data[] = {
 	0x52, 0x53, 0x41, 0x4b, 0x00, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x00,
@@ -217,6 +218,7 @@ static int do_crypto(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	sha_context csha_ctx;
 	sha1_context sha1_ctx;
 	sha256_context sha256_ctx;
+	sha512_context sha512_ctx;
 	rsa_key rsa_key;
 	u8 sha256_out0[32];
 	u8 sha256_out1[32];
@@ -225,9 +227,18 @@ static int do_crypto(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	u8 rsa_out[256];
 	u8 md5_out0[16];
 	u8 md5_out1[16];
+	u8 sha512_out0[64];
+	u8 sha512_out1[64];
 	u32 cap;
 
-	cap = CRYPTO_MD5 | CRYPTO_SHA1 | CRYPTO_SHA256 | CRYPTO_RSA2048;
+	/* CRYPTO_V1 TODO: SHA512 is not available */
+#ifdef CONFIG_ROCKCHIP_CRYPTO_V1
+	cap = CRYPTO_MD5 | CRYPTO_SHA1 | CRYPTO_SHA256 |
+	      CRYPTO_RSA2048;
+#else
+	cap = CRYPTO_MD5 | CRYPTO_SHA1 | CRYPTO_SHA256 | CRYPTO_SHA512 |
+	      CRYPTO_RSA2048;
+#endif
 	dev = crypto_get_device(cap);
 	if (!dev) {
 		printf("Can't find crypto device for expected capability\n");
@@ -252,6 +263,17 @@ static int do_crypto(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	sha1_finish(&sha1_ctx, sha1_out1);
 	dump("SHA1", sha1_out0, sha1_out1, crypto_algo_nbits(csha_ctx.algo));
 
+	/* SHA512 */
+	csha_ctx.algo = CRYPTO_SHA512;
+	csha_ctx.length = sizeof(foo_data);
+	crypto_sha_csum(dev, &csha_ctx, (char *)foo_data,
+			sizeof(foo_data), sha512_out0);
+	sha512_starts(&sha512_ctx);
+	sha512_update(&sha512_ctx, (const u8 *)foo_data, sizeof(foo_data));
+	sha512_finish(&sha512_ctx, sha512_out1);
+	dump("SHA512", sha512_out0, sha512_out1,
+	     crypto_algo_nbits(csha_ctx.algo));
+
 	/* SHA256 */
 	csha_ctx.algo = CRYPTO_SHA256;
 	csha_ctx.length = sizeof(foo_data);

commit 2061474232a30c66db312f74b0fce4fb6f6e56d3
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Mon Jul 15 15:08:46 2019 +0800

    cmd: Kconfig: CMD_CRYPTO select SHA512
    
    when CMD_CRYPTO is enabled, SHA512 will be selected.
    
    Change-Id: I2a4dfa1ed024b9a6cc39417836e45ee1309fdfa1
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 9c365fd56e..d9507cd927 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -537,6 +537,7 @@ config CMD_CRYPTO
 	depends on DM_CRYPTO
 	select SHA1
 	select SHA256
+	select SHA512
 	select MD5
 	help
 	  Crypto test.

commit e7846385ca65a4d31edc00691799fb13d18ab12a
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Mon Jul 15 15:11:58 2019 +0800

    crypto: add crypto v2 SHA512 support
    
    Change-Id: Idee2ada3d5da6aef2a170509da2efa6b1f6e4a9d
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/drivers/crypto/crypto-uclass.c b/drivers/crypto/crypto-uclass.c
index 775b31f0ce..3c31347af5 100644
--- a/drivers/crypto/crypto-uclass.c
+++ b/drivers/crypto/crypto-uclass.c
@@ -17,6 +17,8 @@ u32 crypto_algo_nbits(u32 algo)
 		return 160;
 	case CRYPTO_SHA256:
 		return 256;
+	case CRYPTO_SHA512:
+		return 512;
 	case CRYPTO_RSA512:
 		return 512;
 	case CRYPTO_RSA1024:
diff --git a/drivers/crypto/rockchip/crypto_v2.c b/drivers/crypto/rockchip/crypto_v2.c
index 05edd10669..d5091499ae 100644
--- a/drivers/crypto/rockchip/crypto_v2.c
+++ b/drivers/crypto/rockchip/crypto_v2.c
@@ -64,6 +64,17 @@ static const u8 null_hash_sha256_value[] = {
 	0xa4, 0x95, 0x99, 0x1b, 0x78, 0x52, 0xb8, 0x55
 };
 
+static const u8 null_hash_sha512_value[] = {
+	0xcf, 0x83, 0xe1, 0x35, 0x7e, 0xef, 0xb8, 0xbd,
+	0xf1, 0x54, 0x28, 0x50, 0xd6, 0x6d, 0x80, 0x07,
+	0xd6, 0x20, 0xe4, 0x05, 0x0b, 0x57, 0x15, 0xdc,
+	0x83, 0xf4, 0xa9, 0x21, 0xd3, 0x6c, 0xe9, 0xce,
+	0x47, 0xd0, 0xd1, 0x3c, 0x5d, 0x85, 0xf2, 0xb0,
+	0xff, 0x83, 0x18, 0xd2, 0x87, 0x7e, 0xec, 0x2f,
+	0x63, 0xb9, 0x31, 0xbd, 0x47, 0x41, 0x7a, 0x81,
+	0xa5, 0x38, 0x32, 0x7a, 0xf9, 0x27, 0xda, 0x3e
+};
+
 fdt_addr_t crypto_base;
 
 static void word2byte(u32 word, u8 *ch, u32 endian)
@@ -166,6 +177,12 @@ int rk_hash_init(void *hw_ctx, u32 algo)
 		tmp_ctx->digest_size = 32;
 		tmp_ctx->null_hash = null_hash_sha256_value;
 		break;
+	case CRYPTO_SHA512:
+		reg_ctrl |= CRYPTO_MODE_SHA512;
+		tmp_ctx->digest_size = 64;
+		tmp_ctx->null_hash = null_hash_sha512_value;
+		break;
+
 	default:
 		ret = -EINVAL;
 		goto exit;
@@ -426,6 +443,7 @@ static u32 rockchip_crypto_capability(struct udevice *dev)
 	return CRYPTO_MD5 |
 	       CRYPTO_SHA1 |
 	       CRYPTO_SHA256 |
+	       CRYPTO_SHA512 |
 	       CRYPTO_RSA512 |
 	       CRYPTO_RSA1024 |
 	       CRYPTO_RSA2048 |
diff --git a/include/crypto.h b/include/crypto.h
index 487079dcb2..f9829b3fe4 100644
--- a/include/crypto.h
+++ b/include/crypto.h
@@ -10,11 +10,13 @@
 #define CRYPTO_MD5		BIT(0)
 #define CRYPTO_SHA1		BIT(1)
 #define CRYPTO_SHA256		BIT(2)
-#define CRYPTO_RSA512		BIT(3)
-#define CRYPTO_RSA1024		BIT(4)
-#define CRYPTO_RSA2048		BIT(5)
-#define CRYPTO_RSA3072		BIT(6)
-#define CRYPTO_RSA4096		BIT(7)
+#define CRYPTO_SHA512		BIT(3)
+
+#define CRYPTO_RSA512		BIT(10)
+#define CRYPTO_RSA1024		BIT(11)
+#define CRYPTO_RSA2048		BIT(12)
+#define CRYPTO_RSA3072		BIT(13)
+#define CRYPTO_RSA4096		BIT(14)
 
 #define BYTE2WORD(bytes)	((bytes) / 4)
 #define BITS2BYTE(nbits)	((nbits) / 8)

commit 3320fa93614f2fdc7b378ce3d9282b497218f7a7
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Jul 24 15:26:59 2019 +0800

    video/drm: dsi: resolved dependency between mipi_tx0 and mipi_tx1
    
    It has a shared pll for mipi_tx0/mipi_tx1 on RK3288/RK3399,
    so we need to initialize mipi_tx0 as necessary before enabling mipi_tx1.
    
    Change-Id: I217c93232c6cfdfb7bf15142b903d44783120ab0
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/dw_mipi_dsi.c b/drivers/video/drm/dw_mipi_dsi.c
index 01135a72ef..0d16cf39d8 100644
--- a/drivers/video/drm/dw_mipi_dsi.c
+++ b/drivers/video/drm/dw_mipi_dsi.c
@@ -233,10 +233,9 @@ struct dw_mipi_dsi {
 	void *base;
 	void *grf;
 	int id;
-
-	/* for dual-channel */
 	struct dw_mipi_dsi *master;
 	struct dw_mipi_dsi *slave;
+	bool prepared;
 
 	unsigned int lane_mbps; /* per lane */
 	u32 channel;
@@ -244,7 +243,7 @@ struct dw_mipi_dsi {
 	u32 format;
 	u32 mode_flags;
 	struct mipi_dphy dphy;
-	struct drm_display_mode *mode;
+	struct drm_display_mode mode;
 
 	const struct dw_mipi_dsi_plat_data *pdata;
 };
@@ -542,7 +541,7 @@ static void dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi)
 
 static unsigned long dw_mipi_dsi_get_lane_rate(struct dw_mipi_dsi *dsi)
 {
-	const struct drm_display_mode *mode = dsi->mode;
+	const struct drm_display_mode *mode = &dsi->mode;
 	unsigned long max_lane_rate = dsi->pdata->max_bit_rate_per_lane;
 	unsigned long lane_rate;
 	unsigned int value;
@@ -640,6 +639,11 @@ static void dw_mipi_dsi_set_pll(struct dw_mipi_dsi *dsi, unsigned long rate)
 		dsi->slave->dphy.input_div = dsi->dphy.input_div;
 		dsi->slave->dphy.feedback_div = dsi->dphy.feedback_div;
 	}
+	if (dsi->master) {
+		dsi->master->lane_mbps = dsi->lane_mbps;
+		dsi->master->dphy.input_div = dsi->dphy.input_div;
+		dsi->master->dphy.feedback_div = dsi->dphy.feedback_div;
+	}
 }
 
 static int dw_mipi_dsi_read_from_fifo(struct dw_mipi_dsi *dsi,
@@ -887,7 +891,7 @@ static void dw_mipi_dsi_video_mode_config(struct dw_mipi_dsi *dsi)
 
 static void dw_mipi_dsi_enable(struct dw_mipi_dsi *dsi)
 {
-	const struct drm_display_mode *mode = dsi->mode;
+	const struct drm_display_mode *mode = &dsi->mode;
 
 	dsi_update_bits(dsi, DSI_LPCLK_CTRL,
 			PHY_TXREQUESTCLKHS, PHY_TXREQUESTCLKHS);
@@ -924,9 +928,17 @@ static void dw_mipi_dsi_disable(struct dw_mipi_dsi *dsi)
 
 static void dw_mipi_dsi_post_disable(struct dw_mipi_dsi *dsi)
 {
+	if (!dsi->prepared)
+		return;
+
+	if (dsi->master)
+		dw_mipi_dsi_post_disable(dsi->master);
+
 	dsi_write(dsi, DSI_PWR_UP, RESET);
 	dsi_write(dsi, DSI_PHY_RSTZ, 0);
 
+	dsi->prepared = false;
+
 	if (dsi->slave)
 		dw_mipi_dsi_post_disable(dsi->slave);
 }
@@ -988,14 +1000,7 @@ static void dw_mipi_dsi_packet_handler_config(struct dw_mipi_dsi *dsi)
 static void dw_mipi_dsi_video_packet_config(struct dw_mipi_dsi *dsi,
 					    struct drm_display_mode *mode)
 {
-	int pkt_size;
-
-	if (dsi->slave || dsi->master)
-		pkt_size = VID_PKT_SIZE(mode->hdisplay / 2);
-	else
-		pkt_size = VID_PKT_SIZE(mode->hdisplay);
-
-	dsi_write(dsi, DSI_VID_PKT_SIZE, pkt_size);
+	dsi_write(dsi, DSI_VID_PKT_SIZE, VID_PKT_SIZE(mode->hdisplay));
 }
 
 static void dw_mipi_dsi_command_mode_config(struct dw_mipi_dsi *dsi)
@@ -1012,18 +1017,16 @@ static int dw_mipi_dsi_get_hcomponent_lbcc(struct dw_mipi_dsi *dsi,
 
 	lbcc = hcomponent * dsi->lane_mbps * 1000 / 8;
 
-	if (dsi->mode->clock == 0) {
-		printf("dsi mode clock is 0!\n");
+	if (!dsi->mode.clock)
 		return 0;
-	}
 
-	return DIV_ROUND_CLOSEST(lbcc, dsi->mode->clock);
+	return DIV_ROUND_CLOSEST(lbcc, dsi->mode.clock);
 }
 
 static void dw_mipi_dsi_line_timer_config(struct dw_mipi_dsi *dsi)
 {
 	int htotal, hsa, hbp, lbcc;
-	struct drm_display_mode *mode = dsi->mode;
+	struct drm_display_mode *mode = &dsi->mode;
 
 	htotal = mode->htotal;
 	hsa = mode->hsync_end - mode->hsync_start;
@@ -1042,7 +1045,7 @@ static void dw_mipi_dsi_line_timer_config(struct dw_mipi_dsi *dsi)
 static void dw_mipi_dsi_vertical_timing_config(struct dw_mipi_dsi *dsi)
 {
 	u32 vactive, vsa, vfp, vbp;
-	struct drm_display_mode *mode = dsi->mode;
+	struct drm_display_mode *mode = &dsi->mode;
 
 	vactive = mode->vdisplay;
 	vsa = mode->vsync_end - mode->vsync_start;
@@ -1089,7 +1092,35 @@ static int dw_mipi_dsi_connector_init(struct display_state *state)
 	conn_state->color_space = V4L2_COLORSPACE_DEFAULT;
 	conn_state->type = DRM_MODE_CONNECTOR_DSI;
 
-	if (dsi->slave) {
+	if (dsi->id) {
+		struct udevice *dev;
+		int ret;
+
+		ret = uclass_get_device_by_name(UCLASS_DISPLAY, "dsi@ff960000",
+						&dev);
+		if (ret)
+			return ret;
+
+		dsi->master = dev_get_priv(dev);
+		if (!dsi->master)
+			return -ENODEV;
+
+		conn_state->output_type = ROCKCHIP_OUTPUT_DSI_DUAL_LINK;
+	}
+
+	if (dsi->lanes > 4) {
+		struct udevice *dev;
+		int ret;
+
+		ret = uclass_get_device_by_name(UCLASS_DISPLAY, "dsi@ff968000",
+						&dev);
+		if (ret)
+			return ret;
+
+		dsi->slave = dev_get_priv(dev);
+		if (!dsi->slave)
+			return -ENODEV;
+
 		dsi->lanes /= 2;
 		dsi->slave->lanes = dsi->lanes;
 		dsi->slave->format = dsi->format;
@@ -1110,10 +1141,10 @@ static void dw_mipi_dsi_set_hs_clk(struct dw_mipi_dsi *dsi, unsigned long rate)
 static void dw_mipi_dsi_host_init(struct dw_mipi_dsi *dsi)
 {
 	dw_mipi_dsi_init(dsi);
-	dw_mipi_dsi_dpi_config(dsi, dsi->mode);
+	dw_mipi_dsi_dpi_config(dsi, &dsi->mode);
 	dw_mipi_dsi_packet_handler_config(dsi);
 	dw_mipi_dsi_video_mode_config(dsi);
-	dw_mipi_dsi_video_packet_config(dsi, dsi->mode);
+	dw_mipi_dsi_video_packet_config(dsi, &dsi->mode);
 	dw_mipi_dsi_command_mode_config(dsi);
 	dsi_update_bits(dsi, DSI_MODE_CFG, CMD_VIDEO_MODE, COMMAND_MODE);
 	dw_mipi_dsi_line_timer_config(dsi);
@@ -1133,7 +1164,7 @@ static void dw_mipi_dsi_vop_routing(struct dw_mipi_dsi *dsi, int vop_id)
 
 static void mipi_dphy_init(struct dw_mipi_dsi *dsi)
 {
-	u32 map[] = {0x1, 0x3, 0x7, 0xf};
+	u32 map[] = {0x0, 0x1, 0x3, 0x7, 0xf};
 
 	mipi_dphy_enableclk_deassert(dsi);
 	mipi_dphy_shutdownz_assert(dsi);
@@ -1159,7 +1190,7 @@ static void mipi_dphy_init(struct dw_mipi_dsi *dsi)
 		dw_mipi_dsi_phy_init(dsi);
 
 	/* Enable Data Lane Module */
-	grf_field_write(dsi, ENABLE_N, map[dsi->lanes - 1]);
+	grf_field_write(dsi, ENABLE_N, map[dsi->lanes]);
 
 	/* Enable Clock Lane Module */
 	grf_field_write(dsi, ENABLECLK, 1);
@@ -1169,11 +1200,19 @@ static void mipi_dphy_init(struct dw_mipi_dsi *dsi)
 
 static void dw_mipi_dsi_pre_enable(struct dw_mipi_dsi *dsi)
 {
+	if (dsi->prepared)
+		return;
+
+	if (dsi->master)
+		dw_mipi_dsi_pre_enable(dsi->master);
+
 	dw_mipi_dsi_host_init(dsi);
 	mipi_dphy_init(dsi);
 	mipi_dphy_power_on(dsi);
 	dsi_write(dsi, DSI_PWR_UP, POWERUP);
 
+	dsi->prepared = true;
+
 	if (dsi->slave)
 		dw_mipi_dsi_pre_enable(dsi->slave);
 }
@@ -1185,9 +1224,12 @@ static int dw_mipi_dsi_connector_prepare(struct display_state *state)
 	struct dw_mipi_dsi *dsi = dev_get_priv(conn_state->dev);
 	unsigned long lane_rate;
 
-	dsi->mode = &conn_state->mode;
-	if (dsi->slave)
-		dsi->slave->mode = dsi->mode;
+	memcpy(&dsi->mode, &conn_state->mode, sizeof(struct drm_display_mode));
+	if (dsi->slave) {
+		dsi->mode.hdisplay /= 2;
+		memcpy(&dsi->slave->mode, &dsi->mode,
+		       sizeof(struct drm_display_mode));
+	}
 
 	lane_rate = dw_mipi_dsi_get_lane_rate(dsi);
 	if (dsi->dphy.phy)
@@ -1240,40 +1282,13 @@ static const struct rockchip_connector_funcs dw_mipi_dsi_connector_funcs = {
 	.disable = dw_mipi_dsi_connector_disable,
 };
 
-static int dw_mipi_dsi_dual_channel_probe(struct dw_mipi_dsi *master)
-{
-	struct udevice *dev;
-	struct dw_mipi_dsi *slave;
-	int ret;
-
-	ret = uclass_get_device_by_phandle(UCLASS_DISPLAY, master->dev,
-					   "rockchip,dual-channel", &dev);
-	if (ret == -ENOENT) {
-		return 0;
-	} else if (ret) {
-		dev_err(dev, "failed to find slave device: %d\n", ret);
-		return ret;
-	}
-
-	slave = dev_get_priv(dev);
-	if (!slave) {
-		dev_err(dev, "failed to get slave channel\n");
-		return -ENODEV;
-	}
-
-	master->slave = slave;
-	slave->master = master;
-
-	return 0;
-}
-
 static int dw_mipi_dsi_probe(struct udevice *dev)
 {
 	struct dw_mipi_dsi *dsi = dev_get_priv(dev);
 	const struct rockchip_connector *connector =
 		(const struct rockchip_connector *)dev_get_driver_data(dev);
 	const struct dw_mipi_dsi_plat_data *pdata = connector->data;
-	int id, ret;
+	int id;
 
 	dsi->base = dev_read_addr_ptr(dev);
 	dsi->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
@@ -1288,10 +1303,6 @@ static int dw_mipi_dsi_probe(struct udevice *dev)
 	dsi->pdata = pdata;
 	dsi->id = id;
 
-	ret = dw_mipi_dsi_dual_channel_probe(dsi);
-	if (ret)
-		return ret;
-
 	return 0;
 }
 
@@ -1563,6 +1574,10 @@ static int dw_mipi_dsi_child_post_bind(struct udevice *dev)
 {
 	struct mipi_dsi_host *host = dev_get_platdata(dev->parent);
 	struct mipi_dsi_device *device = dev_get_parent_platdata(dev);
+	char name[20];
+
+	sprintf(name, "%s.%d", host->dev->name, device->channel);
+	device_set_name(dev, name);
 
 	device->dev = dev;
 	device->host = host;

commit 2942bf186f2a821030ae1ba2e6082fbb71fcaeaa
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Jul 24 15:46:18 2019 +0800

    video/drm: panel: allocate rockchip_panel objects per device
    
    Change-Id: I7719c945c56f794769e16ead44f5aea9acc3cac3
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_panel.c b/drivers/video/drm/rockchip_panel.c
index 57bf479c74..6e27364958 100644
--- a/drivers/video/drm/rockchip_panel.c
+++ b/drivers/video/drm/rockchip_panel.c
@@ -450,8 +450,7 @@ static int rockchip_panel_probe(struct udevice *dev)
 {
 	struct rockchip_panel_priv *priv = dev_get_priv(dev);
 	struct rockchip_panel_plat *plat = dev_get_platdata(dev);
-	struct rockchip_panel *panel =
-		(struct rockchip_panel *)dev_get_driver_data(dev);
+	struct rockchip_panel *panel;
 	int ret;
 	const char *cmd_type;
 
@@ -517,73 +516,22 @@ static int rockchip_panel_probe(struct udevice *dev)
 		dm_gpio_set_value(&priv->reset_gpio, 0);
 	}
 
+	panel = calloc(1, sizeof(*panel));
+	if (!panel)
+		return -ENOMEM;
+
+	dev->driver_data = (ulong)panel;
 	panel->dev = dev;
 	panel->bus_format = plat->bus_format;
 	panel->bpc = plat->bpc;
+	panel->funcs = &rockchip_panel_funcs;
 
 	return 0;
 }
 
-static const struct drm_display_mode auo_b125han03_mode = {
-	.clock = 146900,
-	.hdisplay = 1920,
-	.hsync_start = 1920 + 48,
-	.hsync_end = 1920 + 48 + 32,
-	.htotal = 1920 + 48 + 32 + 140,
-	.vdisplay = 1080,
-	.vsync_start = 1080 + 2,
-	.vsync_end = 1080 + 2 + 5,
-	.vtotal = 1080 + 2 + 5 + 57,
-	.vrefresh = 60,
-	.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
-};
-
-static const struct rockchip_panel auo_b125han03_driver_data = {
-	.funcs = &rockchip_panel_funcs,
-	.data = &auo_b125han03_mode,
-};
-
-static const struct drm_display_mode lg_lp079qx1_sp0v_mode = {
-	.clock = 200000,
-	.hdisplay = 1536,
-	.hsync_start = 1536 + 12,
-	.hsync_end = 1536 + 12 + 16,
-	.htotal = 1536 + 12 + 16 + 48,
-	.vdisplay = 2048,
-	.vsync_start = 2048 + 8,
-	.vsync_end = 2048 + 8 + 4,
-	.vtotal = 2048 + 8 + 4 + 8,
-	.vrefresh = 60,
-	.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
-};
-
-static const struct rockchip_panel lg_lp079qx1_sp0v_driver_data = {
-	.funcs = &rockchip_panel_funcs,
-	.data = &lg_lp079qx1_sp0v_mode,
-};
-
-static const struct rockchip_panel panel_simple_driver_data = {
-	.funcs = &rockchip_panel_funcs,
-};
-
-static const struct rockchip_panel panel_simple_dsi_driver_data = {
-	.funcs = &rockchip_panel_funcs,
-};
-
 static const struct udevice_id rockchip_panel_ids[] = {
-	{
-		.compatible = "auo,b125han03",
-		.data = (ulong)&auo_b125han03_driver_data,
-	}, {
-		.compatible = "lg,lp079qx1-sp0v",
-		.data = (ulong)&lg_lp079qx1_sp0v_driver_data,
-	}, {
-		.compatible = "simple-panel",
-		.data = (ulong)&panel_simple_driver_data,
-	}, {
-		.compatible = "simple-panel-dsi",
-		.data = (ulong)&panel_simple_dsi_driver_data,
-	},
+	{ .compatible = "simple-panel", },
+	{ .compatible = "simple-panel-dsi", },
 	{}
 };
 

commit 2227535d492f86d17eadea9543cd39061b66f194
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jul 11 15:45:33 2019 +0800

    lib: add sha512 support
    
    Porting from: https://tls.mbed.org/sha-512-source-code.
    
    Update and follow sha1/256.c function name and coding style.
    
    Change-Id: Idbe70b71e54e0e56a88aac5ec306c75fb2237f4f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/u-boot/sha512.h b/include/u-boot/sha512.h
new file mode 100644
index 0000000000..1fb21e1371
--- /dev/null
+++ b/include/u-boot/sha512.h
@@ -0,0 +1,98 @@
+// SPDX-License-Identifier: Apache-2.0
+/*
+ *  FIPS-180-2 compliant SHA-384/512 implementation
+ *
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ *  This file is part of mbed TLS (https://tls.mbed.org)
+ */
+/*
+ *  The SHA-512 Secure Hash Standard was published by NIST in 2002.
+ *
+ *  http://csrc.nist.gov/publications/fips/fips180-2/fips180-2.pdf
+ */
+
+#ifndef _SHA512_H
+#define _SHA512_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief          The SHA-512 context structure.
+ *
+ *                 The structure is used both for SHA-384 and for SHA-512
+ *                 checksum calculations. The choice between these two is
+ *                 made in the call to sha512_starts().
+ */
+typedef struct sha512_context {
+    uint64_t total[2];          /*!< The number of Bytes processed. */
+    uint64_t state[8];          /*!< The intermediate digest state. */
+    unsigned char buffer[128];  /*!< The data block being processed. */
+    int is384;                  /*!< Determines which function to use:
+                                     0: Use SHA-512, or 1: Use SHA-384. */
+} sha512_context;
+
+/**
+ * \brief          This function starts a SHA-384 or SHA-512 checksum
+ *                 calculation.
+ *
+ * \param ctx      The SHA-512 context to initialize.
+ * \param is384    Determines which function to use:
+ *                 0: Use SHA-512, or 1: Use SHA-384.
+ *
+ * \return         \c 0 on success.
+ */
+int sha512_starts(sha512_context *ctx);
+
+/**
+ * \brief          This function feeds an input buffer into an ongoing
+ *                 SHA-512 checksum calculation.
+ *
+ * \param ctx      The SHA-512 context.
+ * \param input    The buffer holding the input data.
+ * \param ilen     The length of the input data.
+ *
+ * \return         \c 0 on success.
+ */
+int sha512_update(sha512_context *ctx, const unsigned char *input, size_t ilen);
+
+/**
+ * \brief          This function finishes the SHA-512 operation, and writes
+ *                 the result to the output buffer.
+ *
+ * \param ctx      The SHA-512 context.
+ * \param output   The SHA-384 or SHA-512 checksum result.
+ *
+ * \return         \c 0 on success.
+ */
+int sha512_finish(sha512_context *ctx, unsigned char output[64]);
+
+/**
+ * \brief          This function starts SHA-512 checksum for the input data.
+ *
+ * \param input    The buffer holding the input data.
+ * \param ilen     The length of the input data.
+ * \param output   The SHA-384 or SHA-512 checksum result.
+ */
+void sha512_csum(const unsigned char *input, unsigned int ilen,
+		 unsigned char output[64]);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* sha512.h */
diff --git a/lib/Kconfig b/lib/Kconfig
index 51a988e3c5..2153c7a4d0 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -157,6 +157,14 @@ config SHA256
 	  The SHA256 algorithm produces a 256-bit (32-byte) hash value
 	  (digest).
 
+config SHA512
+	bool "Enable SHA512 support"
+	help
+	  This option enables support of hashing using SHA512 algorithm.
+	  The hash is calculated in software.
+	  The SHA512 algorithm produces a 512-bit (64-byte) hash value
+	  (digest).
+
 config SHA_HW_ACCEL
 	bool "Enable hashing using hardware"
 	help
diff --git a/lib/Makefile b/lib/Makefile
index 650666dcb0..9a4bfddae5 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -57,6 +57,7 @@ obj-$(CONFIG_$(SPL_TPL_)RK_AVB_LIBAVB_USER) += avb/rk_avb_user/
 obj-$(CONFIG_RSA) += rsa/
 obj-$(CONFIG_SHA1) += sha1.o
 obj-$(CONFIG_SHA256) += sha256.o
+obj-$(CONFIG_SHA512) += sha512.o
 
 obj-$(CONFIG_$(SPL_)ZLIB) += zlib/
 obj-$(CONFIG_$(SPL_)GZIP) += gunzip.o
diff --git a/lib/sha512.c b/lib/sha512.c
new file mode 100644
index 0000000000..d1adb94b94
--- /dev/null
+++ b/lib/sha512.c
@@ -0,0 +1,346 @@
+// SPDX-License-Identifier: Apache-2.0
+/*
+ *  FIPS-180-2 compliant SHA-384/512 implementation
+ *
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ *
+ *  This file is part of mbed TLS (https://tls.mbed.org)
+ */
+/*
+ *  The SHA-512 Secure Hash Standard was published by NIST in 2002.
+ *
+ *  http://csrc.nist.gov/publications/fips/fips180-2/fips180-2.pdf
+ */
+
+#ifndef USE_HOSTCC
+#include <common.h>
+#include <linux/string.h>
+#else
+#include <string.h>
+#endif /* USE_HOSTCC */
+#include <u-boot/sha512.h>
+
+#if defined(_MSC_VER) || defined(__WATCOMC__)
+#define UL64(x) x##ui64
+#else
+#define UL64(x) x##ULL
+#endif
+
+/*
+ * 64-bit integer manipulation macros (big endian)
+ */
+#ifndef GET_UINT64_BE
+#define GET_UINT64_BE(n,b,i)                   \
+{                                              \
+    (n) = ((uint64_t)(b)[(i)    ] << 56)       \
+        | ((uint64_t)(b)[(i) + 1] << 48)       \
+        | ((uint64_t)(b)[(i) + 2] << 40)       \
+        | ((uint64_t)(b)[(i) + 3] << 32)       \
+        | ((uint64_t)(b)[(i) + 4] << 24)       \
+        | ((uint64_t)(b)[(i) + 5] << 16)       \
+        | ((uint64_t)(b)[(i) + 6] <<  8)       \
+        | ((uint64_t)(b)[(i) + 7]      );      \
+}
+#endif /* GET_UINT64_BE */
+
+#ifndef PUT_UINT64_BE
+#define PUT_UINT64_BE(n,b,i)                          \
+{                                                     \
+    (b)[(i)    ] = (unsigned char) ((n) >> 56);       \
+    (b)[(i) + 1] = (unsigned char) ((n) >> 48);       \
+    (b)[(i) + 2] = (unsigned char) ((n) >> 40);       \
+    (b)[(i) + 3] = (unsigned char) ((n) >> 32);       \
+    (b)[(i) + 4] = (unsigned char) ((n) >> 24);       \
+    (b)[(i) + 5] = (unsigned char) ((n) >> 16);       \
+    (b)[(i) + 6] = (unsigned char) ((n) >>  8);       \
+    (b)[(i) + 7] = (unsigned char) ((n)      );       \
+}
+#endif /* PUT_UINT64_BE */
+
+/*
+ * SHA-512 context setup
+ */
+static int __sha512_starts(sha512_context *ctx, int is384)
+{
+	ctx->total[0] = 0;
+	ctx->total[1] = 0;
+
+	if (is384 == 0) {
+		/* SHA-512 */
+		ctx->state[0] = UL64(0x6A09E667F3BCC908);
+		ctx->state[1] = UL64(0xBB67AE8584CAA73B);
+		ctx->state[2] = UL64(0x3C6EF372FE94F82B);
+		ctx->state[3] = UL64(0xA54FF53A5F1D36F1);
+		ctx->state[4] = UL64(0x510E527FADE682D1);
+		ctx->state[5] = UL64(0x9B05688C2B3E6C1F);
+		ctx->state[6] = UL64(0x1F83D9ABFB41BD6B);
+		ctx->state[7] = UL64(0x5BE0CD19137E2179);
+	} else {
+		/* SHA-384 */
+		ctx->state[0] = UL64(0xCBBB9D5DC1059ED8);
+		ctx->state[1] = UL64(0x629A292A367CD507);
+		ctx->state[2] = UL64(0x9159015A3070DD17);
+		ctx->state[3] = UL64(0x152FECD8F70E5939);
+		ctx->state[4] = UL64(0x67332667FFC00B31);
+		ctx->state[5] = UL64(0x8EB44A8768581511);
+		ctx->state[6] = UL64(0xDB0C2E0D64F98FA7);
+		ctx->state[7] = UL64(0x47B5481DBEFA4FA4);
+	}
+
+	ctx->is384 = is384;
+
+	return(0);
+}
+
+int sha512_starts(sha512_context *ctx)
+{
+	return __sha512_starts(ctx, 0);
+}
+
+/*
+ * Round constants
+ */
+static const uint64_t K[80] = {
+	UL64(0x428A2F98D728AE22),  UL64(0x7137449123EF65CD),
+	UL64(0xB5C0FBCFEC4D3B2F),  UL64(0xE9B5DBA58189DBBC),
+	UL64(0x3956C25BF348B538),  UL64(0x59F111F1B605D019),
+	UL64(0x923F82A4AF194F9B),  UL64(0xAB1C5ED5DA6D8118),
+	UL64(0xD807AA98A3030242),  UL64(0x12835B0145706FBE),
+	UL64(0x243185BE4EE4B28C),  UL64(0x550C7DC3D5FFB4E2),
+	UL64(0x72BE5D74F27B896F),  UL64(0x80DEB1FE3B1696B1),
+	UL64(0x9BDC06A725C71235),  UL64(0xC19BF174CF692694),
+	UL64(0xE49B69C19EF14AD2),  UL64(0xEFBE4786384F25E3),
+	UL64(0x0FC19DC68B8CD5B5),  UL64(0x240CA1CC77AC9C65),
+	UL64(0x2DE92C6F592B0275),  UL64(0x4A7484AA6EA6E483),
+	UL64(0x5CB0A9DCBD41FBD4),  UL64(0x76F988DA831153B5),
+	UL64(0x983E5152EE66DFAB),  UL64(0xA831C66D2DB43210),
+	UL64(0xB00327C898FB213F),  UL64(0xBF597FC7BEEF0EE4),
+	UL64(0xC6E00BF33DA88FC2),  UL64(0xD5A79147930AA725),
+	UL64(0x06CA6351E003826F),  UL64(0x142929670A0E6E70),
+	UL64(0x27B70A8546D22FFC),  UL64(0x2E1B21385C26C926),
+	UL64(0x4D2C6DFC5AC42AED),  UL64(0x53380D139D95B3DF),
+	UL64(0x650A73548BAF63DE),  UL64(0x766A0ABB3C77B2A8),
+	UL64(0x81C2C92E47EDAEE6),  UL64(0x92722C851482353B),
+	UL64(0xA2BFE8A14CF10364),  UL64(0xA81A664BBC423001),
+	UL64(0xC24B8B70D0F89791),  UL64(0xC76C51A30654BE30),
+	UL64(0xD192E819D6EF5218),  UL64(0xD69906245565A910),
+	UL64(0xF40E35855771202A),  UL64(0x106AA07032BBD1B8),
+	UL64(0x19A4C116B8D2D0C8),  UL64(0x1E376C085141AB53),
+	UL64(0x2748774CDF8EEB99),  UL64(0x34B0BCB5E19B48A8),
+	UL64(0x391C0CB3C5C95A63),  UL64(0x4ED8AA4AE3418ACB),
+	UL64(0x5B9CCA4F7763E373),  UL64(0x682E6FF3D6B2B8A3),
+	UL64(0x748F82EE5DEFB2FC),  UL64(0x78A5636F43172F60),
+	UL64(0x84C87814A1F0AB72),  UL64(0x8CC702081A6439EC),
+	UL64(0x90BEFFFA23631E28),  UL64(0xA4506CEBDE82BDE9),
+	UL64(0xBEF9A3F7B2C67915),  UL64(0xC67178F2E372532B),
+	UL64(0xCA273ECEEA26619C),  UL64(0xD186B8C721C0C207),
+	UL64(0xEADA7DD6CDE0EB1E),  UL64(0xF57D4F7FEE6ED178),
+	UL64(0x06F067AA72176FBA),  UL64(0x0A637DC5A2C898A6),
+	UL64(0x113F9804BEF90DAE),  UL64(0x1B710B35131C471B),
+	UL64(0x28DB77F523047D84),  UL64(0x32CAAB7B40C72493),
+	UL64(0x3C9EBE0A15C9BEBC),  UL64(0x431D67C49C100D4C),
+	UL64(0x4CC5D4BECB3E42B6),  UL64(0x597F299CFC657E2A),
+	UL64(0x5FCB6FAB3AD6FAEC),  UL64(0x6C44198C4A475817)
+};
+
+static int sha512_process(sha512_context *ctx, const unsigned char data[128])
+{
+	int i;
+	uint64_t temp1, temp2, W[80];
+	uint64_t A, B, C, D, E, F, G, H;
+
+#define  SHR(x,n) (x >> n)
+#define ROTR(x,n) (SHR(x,n) | (x << (64 - n)))
+
+#define S0(x) (ROTR(x, 1) ^ ROTR(x, 8) ^  SHR(x, 7))
+#define S1(x) (ROTR(x,19) ^ ROTR(x,61) ^  SHR(x, 6))
+
+#define S2(x) (ROTR(x,28) ^ ROTR(x,34) ^ ROTR(x,39))
+#define S3(x) (ROTR(x,14) ^ ROTR(x,18) ^ ROTR(x,41))
+
+#define F0(x,y,z) ((x & y) | (z & (x | y)))
+#define F1(x,y,z) (z ^ (x & (y ^ z)))
+
+#define P(a,b,c,d,e,f,g,h,x,K)                  \
+{                                               \
+    temp1 = h + S3(e) + F1(e,f,g) + K + x;      \
+    temp2 = S2(a) + F0(a,b,c);                  \
+    d += temp1; h = temp1 + temp2;              \
+}
+
+	for (i = 0; i < 16; i++) {
+		GET_UINT64_BE(W[i], data, i << 3);
+	}
+
+	for (; i < 80; i++) {
+		W[i] = S1(W[i -  2]) + W[i -  7] +
+		       S0(W[i - 15]) + W[i - 16];
+	}
+
+	A = ctx->state[0];
+	B = ctx->state[1];
+	C = ctx->state[2];
+	D = ctx->state[3];
+	E = ctx->state[4];
+	F = ctx->state[5];
+	G = ctx->state[6];
+	H = ctx->state[7];
+	i = 0;
+
+	do {
+		P(A, B, C, D, E, F, G, H, W[i], K[i]);
+		i++;
+		P(H, A, B, C, D, E, F, G, W[i], K[i]);
+		i++;
+		P(G, H, A, B, C, D, E, F, W[i], K[i]);
+		i++;
+		P(F, G, H, A, B, C, D, E, W[i], K[i]);
+		i++;
+		P(E, F, G, H, A, B, C, D, W[i], K[i]);
+		i++;
+		P(D, E, F, G, H, A, B, C, W[i], K[i]);
+		i++;
+		P(C, D, E, F, G, H, A, B, W[i], K[i]);
+		i++;
+		P(B, C, D, E, F, G, H, A, W[i], K[i]);
+		i++;
+	} while (i < 80);
+
+	ctx->state[0] += A;
+	ctx->state[1] += B;
+	ctx->state[2] += C;
+	ctx->state[3] += D;
+	ctx->state[4] += E;
+	ctx->state[5] += F;
+	ctx->state[6] += G;
+	ctx->state[7] += H;
+
+	return(0);
+}
+
+/*
+ * SHA-512 process buffer
+ */
+int sha512_update(sha512_context *ctx, const unsigned char *input, size_t ilen)
+{
+	int ret;
+	size_t fill;
+	unsigned int left;
+
+	if (ilen == 0)
+		return(0);
+
+	left = (unsigned int)(ctx->total[0] & 0x7F);
+	fill = 128 - left;
+
+	ctx->total[0] += (uint64_t)ilen;
+
+	if (ctx->total[0] < (uint64_t)ilen)
+		ctx->total[1]++;
+
+	if (left && ilen >= fill) {
+		memcpy((void *)(ctx->buffer + left), input, fill);
+
+		if ((ret = sha512_process(ctx, ctx->buffer)) != 0)
+			return(ret);
+
+		input += fill;
+		ilen  -= fill;
+		left = 0;
+	}
+
+	while (ilen >= 128) {
+		if ((ret = sha512_process(ctx, input)) != 0)
+			return(ret);
+
+		input += 128;
+		ilen  -= 128;
+	}
+
+	if (ilen > 0)
+		memcpy((void *)(ctx->buffer + left), input, ilen);
+
+	return(0);
+}
+
+/*
+ * SHA-512 final digest
+ */
+int sha512_finish(sha512_context *ctx, unsigned char output[64])
+{
+	int ret;
+	unsigned used;
+	uint64_t high, low;
+
+	/*
+	 * Add padding: 0x80 then 0x00 until 16 bytes remain for the length
+	 */
+	used = ctx->total[0] & 0x7F;
+
+	ctx->buffer[used++] = 0x80;
+
+	if (used <= 112) {
+		/* Enough room for padding + length in current block */
+		memset(ctx->buffer + used, 0, 112 - used);
+	} else {
+		/* We'll need an extra block */
+		memset(ctx->buffer + used, 0, 128 - used);
+
+		if ((ret = sha512_process(ctx, ctx->buffer)) != 0)
+			return(ret);
+
+		memset(ctx->buffer, 0, 112);
+	}
+
+	/*
+	 * Add message length
+	 */
+	high = (ctx->total[0] >> 61)
+	       | (ctx->total[1] <<  3);
+	low  = (ctx->total[0] <<  3);
+
+	PUT_UINT64_BE(high, ctx->buffer, 112);
+	PUT_UINT64_BE(low,  ctx->buffer, 120);
+
+	if ((ret = sha512_process(ctx, ctx->buffer)) != 0)
+		return(ret);
+
+	/*
+	 * Output final state
+	 */
+	PUT_UINT64_BE(ctx->state[0], output,  0);
+	PUT_UINT64_BE(ctx->state[1], output,  8);
+	PUT_UINT64_BE(ctx->state[2], output, 16);
+	PUT_UINT64_BE(ctx->state[3], output, 24);
+	PUT_UINT64_BE(ctx->state[4], output, 32);
+	PUT_UINT64_BE(ctx->state[5], output, 40);
+
+	if (ctx->is384 == 0) {
+		PUT_UINT64_BE(ctx->state[6], output, 48);
+		PUT_UINT64_BE(ctx->state[7], output, 56);
+	}
+
+	return(0);
+}
+
+void sha512_csum(const unsigned char *input, unsigned int ilen,
+		 unsigned char output[64])
+{
+	sha512_context ctx;
+
+	sha512_starts(&ctx);
+	sha512_update(&ctx, input, ilen);
+	sha512_finish(&ctx, output);
+}

commit 993f1e5cc0698846e2cbe5333030dca65e7e1d37
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jul 29 15:04:16 2019 +0800

    common: spl: mmc: support A/B system boot
    
    Change-Id: I4b50a1daa2733c4926d90b4d489845b34a07eba3
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c
index 7bd989a06d..8933f8ee48 100644
--- a/common/spl/spl_mmc.c
+++ b/common/spl/spl_mmc.c
@@ -9,6 +9,7 @@
 #include <common.h>
 #include <dm.h>
 #include <spl.h>
+#include <spl_ab.h>
 #include <spl_rkfw.h>
 #include <linux/compiler.h>
 #include <errno.h>
@@ -62,6 +63,8 @@ int mmc_load_image_raw_sector(struct spl_image_info *spl_image,
 	int ret = 0;
 
 #ifdef CONFIG_SPL_LOAD_RKFW
+	u32 trust_sectors = CONFIG_RKFW_TRUST_SECTOR;
+	u32 uboot_sectors = CONFIG_RKFW_U_BOOT_SECTOR;
 	struct spl_load_info load;
 
 	load.dev = mmc;
@@ -70,9 +73,18 @@ int mmc_load_image_raw_sector(struct spl_image_info *spl_image,
 	load.bl_len = mmc->read_bl_len;
 	load.read = h_spl_load_read;
 
+#ifdef CONFIG_SPL_AB
+	char trust_partition[] = "trust";
+	char uboot_partition[] = "uboot";
+
+	spl_get_partitions_sector(mmc_get_blk_desc(mmc), trust_partition,
+				  &trust_sectors);
+	spl_get_partitions_sector(mmc_get_blk_desc(mmc), uboot_partition,
+				  &uboot_sectors);
+#endif
 	ret = spl_load_rkfw_image(spl_image, &load,
-				  CONFIG_RKFW_TRUST_SECTOR,
-				  CONFIG_RKFW_U_BOOT_SECTOR);
+				  trust_sectors,
+				  uboot_sectors);
 	/* If boot successfully or can't try others, just go end */
 	if (!ret || ret != -EAGAIN)
 		goto end;

commit 10dd5e8c27eacd34c04894f3f1f9861aaa803c4c
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jul 26 15:57:13 2019 +0800

    rockchip: spl: set bootdev by atags
    
    Change-Id: Ia47748b95bc2870d1bf7256306230458be42a77c
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index 1db0e2626c..042e53ec2f 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -10,6 +10,9 @@
 #include <ram.h>
 #include <spl.h>
 #include <asm/arch/bootrom.h>
+#ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
+#include <asm/arch/rk_atags.h>
+#endif
 #include <asm/arch/sdram_common.h>
 #include <asm/arch-rockchip/sys_proto.h>
 #include <asm/io.h>
@@ -247,3 +250,12 @@ void spl_board_init(void)
 	return;
 }
 #endif
+
+void spl_perform_fixups(struct spl_image_info *spl_image)
+{
+#ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
+	atags_set_bootdev_by_spl_bootdevice(spl_image->boot_device);
+#endif
+	return;
+}
+

commit 6f678d2aa9f3f91b59ec0848019c18b0793b1bdf
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jul 26 15:48:29 2019 +0800

    spl: record boot_device into spl_image and call
     spl_perform_fixups
    
    On some boards, we want to give the board/architecture-specific code a
    chance to look at where the next image has been loaded from and
    perform fixups before starting the next image.  This is of particular
    importance, when we probe multiple devices for bootable payloads and
    boot the first one found.
    
    This change adds the following:
     - we record the boot_device used into the spl_image structure
     - we provide an extension-point for boards/architectures that can
       perform late fixups depending on a fully populated spl_image
       structure (i.e. we'll know the final boot_device and have info
       on the image type and operating system to be booted).
    
    Change-Id: Iebca59a61979bc12eabe743c73dc2279e870e2ff
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/spl/spl.c b/common/spl/spl.c
index 84b4e9be00..3877d92715 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -77,6 +77,11 @@ int __weak bootz_setup(ulong image, ulong *start, ulong *end)
 }
 #endif
 
+/* Weak default function for arch/board-specific fixups to the spl_image_info */
+void __weak spl_perform_fixups(struct spl_image_info *spl_image)
+{
+}
+
 void spl_fixup_fdt(void)
 {
 #if defined(CONFIG_SPL_OF_LIBFDT) && defined(CONFIG_SYS_SPL_ARGS_ADDR)
@@ -377,8 +382,10 @@ static int boot_from_devices(struct spl_image_info *spl_image,
 		else
 			puts("SPL: Unsupported Boot Device!\n");
 #endif
-		if (loader && !spl_load_image(spl_image, loader))
+		if (loader && !spl_load_image(spl_image, loader)) {
+			spl_image->boot_device = spl_boot_list[i];
 			return 0;
+		}
 	}
 
 	return -ENODEV;
@@ -468,6 +475,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 #ifdef CONFIG_SYS_SPL_ARGS_ADDR
 	spl_image.arg = (void *)CONFIG_SYS_SPL_ARGS_ADDR;
 #endif
+	spl_image.boot_device = BOOT_DEVICE_NONE;
 	board_boot_order(spl_boot_list);
 
 	if (boot_from_devices(&spl_image, spl_boot_list,
@@ -476,6 +484,8 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 		hang();
 	}
 
+	spl_perform_fixups(&spl_image);
+
 #ifdef CONFIG_CPU_V7M
 	spl_image.entry_point |= 0x1;
 #endif
diff --git a/include/spl.h b/include/spl.h
index 9135e320e7..4033b12c08 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -32,6 +32,7 @@ struct spl_image_info {
 #if CONFIG_IS_ENABLED(LOAD_FIT)
 	void *fdt_addr;
 #endif
+	u32 boot_device;
 	u32 size;
 	u32 flags;
 	void *arg;
@@ -309,4 +310,10 @@ void spl_optee_entry(void *arg0, void *arg1, void *arg2, void *arg3);
  */
 void board_return_to_bootrom(void);
 
+/**
+ * spl_perform_fixups() - arch/board-specific callback before processing
+ *                        the boot-payload
+ */
+void spl_perform_fixups(struct spl_image_info *spl_image);
+
 #endif

commit 7a4963852a534fe86a299ceffd0680bd65e33077
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jul 24 17:02:53 2019 +0800

    rockchip: atags: add interface to set boottype by spl bootdevice
    
    Change-Id: I2dd6435d1c70d18114680c469bce72555735f55e
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rk_atags.h b/arch/arm/include/asm/arch-rockchip/rk_atags.h
index aa4bc62877..5ef9d3332e 100644
--- a/arch/arm/include/asm/arch-rockchip/rk_atags.h
+++ b/arch/arm/include/asm/arch-rockchip/rk_atags.h
@@ -227,6 +227,24 @@ int get_bootdev_by_brom_bootsource(void);
  * return: 0 success, others fail.
  */
 int atags_set_bootdev_by_brom_bootsource(void);
+
+/*
+ * get_bootdev_by_spl_bootdevice
+ *
+ * @bootdevice
+ *
+ * return: boootdev, else -ENODEV fail.
+ */
+int get_bootdev_by_spl_bootdevice(int bootdevice);
+
+/*
+ * atags_set_bootdev_by_spl_bootdevice
+ *
+ * @bootdevice
+ *
+ * return: 0 success, others fail.
+ */
+int atags_set_bootdev_by_spl_bootdevice(int bootdevice);
 #endif
 
 /* Print only one tag */
diff --git a/arch/arm/mach-rockchip/rk_atags.c b/arch/arm/mach-rockchip/rk_atags.c
index 62075a2061..4c4d0b50eb 100644
--- a/arch/arm/mach-rockchip/rk_atags.c
+++ b/arch/arm/mach-rockchip/rk_atags.c
@@ -35,6 +35,14 @@ static int bootdev_map[] = {
 	BOOT_TYPE_UNKNOWN,
 	BOOT_TYPE_UNKNOWN
 };
+
+static int spl_bootdev_map[] = {
+	BOOT_TYPE_RAM,
+	BOOT_TYPE_EMMC,
+	BOOT_TYPE_SD0,
+	BOOT_TYPE_UNKNOWN,
+	BOOT_TYPE_NAND
+};
 #endif
 
 #if CONFIG_IS_ENABLED(TINY_FRAMEWORK) &&		\
@@ -318,6 +326,26 @@ int atags_set_bootdev_by_brom_bootsource(void)
 
 	return atags_set_tag(ATAG_BOOTDEV, &boot_dev);
 }
+
+int get_bootdev_by_spl_bootdevice(int bootdevice)
+{
+	if (bootdevice > ARRAY_SIZE(spl_bootdev_map) - 1)
+		return -ENODEV;
+
+	return spl_bootdev_map[bootdevice];
+}
+
+int atags_set_bootdev_by_spl_bootdevice(int bootdevice)
+{
+	struct tag_bootdev boot_dev;
+
+	memset(&boot_dev, 0, sizeof(struct tag_bootdev));
+	boot_dev.devtype = get_bootdev_by_spl_bootdevice(bootdevice);
+	if (boot_dev.devtype < 0)
+		boot_dev.devtype = BOOT_TYPE_UNKNOWN;
+
+	return atags_set_tag(ATAG_BOOTDEV, &boot_dev);
+}
 #endif
 
 void atags_destroy(void)

commit 0cc16201bcd31e46860fe6f43e044aa6ef8958dd
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jul 26 15:18:07 2019 +0800

    common: spl: ab: add ab interface to get slot info
    
    Change-Id: Iffd16dfcf9014b024e522639cbcd851f002b742e
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 480bf725fb..7e77a045dd 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -785,6 +785,12 @@ config SPL_OPTEE
 	  OP-TEE is an open source Trusted OS  which is loaded by SPL.
 	  More detail at: https://github.com/OP-TEE/optee_os
 
+config SPL_AB
+	bool "Support AB system boot"
+	depends on SPL
+	help
+	  Enable this config to support AB system boot.
+
 config SPL_LOAD_RKFW
 	bool "SPL support load rockchip firmware images"
 	depends on SPL
diff --git a/common/spl/Makefile b/common/spl/Makefile
index 713faa3a76..9f07132f25 100644
--- a/common/spl/Makefile
+++ b/common/spl/Makefile
@@ -34,6 +34,7 @@ obj-$(CONFIG_$(SPL_TPL_)MMC_SUPPORT) += spl_mmc.o
 obj-$(CONFIG_$(SPL_TPL_)ATF) += spl_atf.o
 obj-$(CONFIG_$(SPL_TPL_)OPTEE) += spl_optee.o
 obj-$(CONFIG_$(SPL_TPL_)LOAD_RKFW) += spl_rkfw.o
+obj-$(CONFIG_$(SPL_TPL_)AB) += spl_ab.o
 obj-$(CONFIG_$(SPL_TPL_)USB_SUPPORT) += spl_usb.o
 obj-$(CONFIG_$(SPL_TPL_)FAT_SUPPORT) += spl_fat.o
 obj-$(CONFIG_$(SPL_TPL_)EXT_SUPPORT) += spl_ext.o
diff --git a/common/spl/spl_ab.c b/common/spl/spl_ab.c
new file mode 100644
index 0000000000..428e44cd81
--- /dev/null
+++ b/common/spl/spl_ab.c
@@ -0,0 +1,267 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <blk.h>
+#include <spl_ab.h>
+
+int safe_memcmp(const void *s1, const void *s2, size_t n)
+{
+	const unsigned char *us1 = s1;
+	const unsigned char *us2 = s2;
+	int result = 0;
+
+	if (0 == n)
+		return 0;
+
+	/*
+	 * Code snippet without data-dependent branch due to Nate Lawson
+	 * (nate@root.org) of Root Labs.
+	 */
+	while (n--)
+		result |= *us1++ ^ *us2++;
+
+	return result != 0;
+}
+
+static uint32_t htobe32(uint32_t in)
+{
+	union {
+		uint32_t word;
+		uint8_t bytes[4];
+	} ret;
+
+	ret.bytes[0] = (in >> 24) & 0xff;
+	ret.bytes[1] = (in >> 16) & 0xff;
+	ret.bytes[2] = (in >> 8) & 0xff;
+	ret.bytes[3] = in & 0xff;
+
+	return ret.word;
+}
+
+static uint32_t be32toh(uint32_t in)
+{
+	uint8_t *d = (uint8_t *)&in;
+	uint32_t ret;
+
+	ret = ((uint32_t)d[0]) << 24;
+	ret |= ((uint32_t)d[1]) << 16;
+	ret |= ((uint32_t)d[2]) << 8;
+	ret |= ((uint32_t)d[3]);
+
+	return ret;
+}
+
+static bool spl_ab_data_verify_and_byteswap(const AvbABData *src,
+					    AvbABData *dest)
+{
+	/* Ensure magic is correct. */
+	if (safe_memcmp(src->magic, AVB_AB_MAGIC, AVB_AB_MAGIC_LEN) != 0) {
+		printf("Magic is incorrect.\n");
+		return false;
+	}
+
+	memcpy(dest, src, sizeof(AvbABData));
+	dest->crc32 = be32toh(dest->crc32);
+
+	/* Ensure we don't attempt to access any fields if the major version
+	 * is not supported.
+	 */
+	if (dest->version_major > AVB_AB_MAJOR_VERSION) {
+		printf("No support for given major version.\n");
+		return false;
+	}
+
+	/* Bail if CRC32 doesn't match. */
+	if (dest->crc32 !=
+		crc32(0, (const uint8_t *)dest,
+		      sizeof(AvbABData) - sizeof(uint32_t))) {
+		printf("CRC32 does not match.\n");
+		return false;
+	}
+
+	return true;
+}
+
+static void spl_ab_data_update_crc_and_byteswap(const AvbABData *src,
+						AvbABData *dest)
+{
+	memcpy(dest, src, sizeof(AvbABData));
+	dest->crc32 = htobe32(crc32(0, (const uint8_t *)dest,
+			    sizeof(AvbABData) - sizeof(uint32_t)));
+}
+
+static void spl_ab_data_init(AvbABData *data)
+{
+	memset(data, '\0', sizeof(AvbABData));
+	memcpy(data->magic, AVB_AB_MAGIC, AVB_AB_MAGIC_LEN);
+	data->version_major = AVB_AB_MAJOR_VERSION;
+	data->version_minor = AVB_AB_MINOR_VERSION;
+	data->last_boot = 0;
+	data->slots[0].priority = AVB_AB_MAX_PRIORITY;
+	data->slots[0].tries_remaining = AVB_AB_MAX_TRIES_REMAINING;
+	data->slots[0].successful_boot = 0;
+	data->slots[1].priority = AVB_AB_MAX_PRIORITY - 1;
+	data->slots[1].tries_remaining = AVB_AB_MAX_TRIES_REMAINING;
+	data->slots[1].successful_boot = 0;
+}
+
+static int spl_read_ab_metadata(struct blk_desc *dev_desc, AvbABData *ab_data,
+				char *partition)
+{
+	disk_partition_t part_info;
+	char temp[512];
+	int ret;
+
+	if (!dev_desc || !partition || !ab_data)
+		return -EFAULT;
+
+	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0)
+		return -ENOENT;
+
+	ret = blk_dread(dev_desc, part_info.start + AB_METADATA_OFFSET, 1,
+			temp);
+	if (ret != 1)
+		return -ENODEV;
+
+	if (sizeof(AvbABData) > 512)
+		return -ENOMEM;
+
+	memcpy(ab_data, temp, sizeof(AvbABData));
+
+	return 0;
+}
+
+static int spl_write_ab_metadata(struct blk_desc *dev_desc, AvbABData *ab_data,
+				 char *partition)
+{
+	disk_partition_t part_info;
+	char temp[512];
+	int ret;
+
+	if (!dev_desc || !partition || !ab_data)
+		return -EFAULT;
+
+	if (sizeof(AvbABData) > 512)
+		return -ENOMEM;
+
+	memcpy(temp, ab_data, sizeof(AvbABData));
+	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0)
+		return -ENOENT;
+
+	ret = blk_dwrite(dev_desc, part_info.start + AB_METADATA_OFFSET, 1,
+			 temp);
+	if (ret != 1)
+		return -ENODEV;
+
+	return 0;
+}
+
+static int spl_ab_data_write(struct blk_desc *dev_desc, AvbABData *ab_data,
+			     char *partition)
+{
+	AvbABData serialized;
+
+	spl_ab_data_update_crc_and_byteswap(ab_data, &serialized);
+
+	return spl_write_ab_metadata(dev_desc, &serialized, partition);
+}
+
+static int spl_ab_data_read(struct blk_desc *dev_desc, AvbABData *ab_data,
+			    char *partition)
+{
+	int ret;
+	AvbABData serialized;
+
+	ret = spl_read_ab_metadata(dev_desc, &serialized, partition);
+	if (ret)
+		return ret;
+
+	if (!spl_ab_data_verify_and_byteswap(&serialized, ab_data)) {
+		printf("Error validating A/B metadata from disk. "
+		       "Resetting and writing new A/B metadata to disk.\n");
+		spl_ab_data_init(ab_data);
+		spl_ab_data_write(dev_desc, ab_data, partition);
+	}
+
+	return 0;
+}
+
+static bool spl_slot_is_bootable(AvbABSlotData *slot)
+{
+	return slot->priority > 0 &&
+		(slot->successful_boot || (slot->tries_remaining > 0));
+}
+
+static int spl_get_lastboot(AvbABData *ab_data)
+{
+	return ab_data->last_boot;
+}
+
+int spl_get_current_slot(struct blk_desc *dev_desc, char *partition, char *slot)
+{
+	size_t slot_index_to_boot;
+	AvbABData ab_data;
+	int ret;
+
+	ret = spl_ab_data_read(dev_desc, &ab_data, partition);
+	if (ret)
+		return ret;
+
+	if (spl_slot_is_bootable(&ab_data.slots[0]) &&
+	    spl_slot_is_bootable(&ab_data.slots[1])) {
+		if (ab_data.slots[1].priority > ab_data.slots[0].priority)
+			slot_index_to_boot = 1;
+		else
+			slot_index_to_boot = 0;
+	} else if (spl_slot_is_bootable(&ab_data.slots[0])) {
+		slot_index_to_boot = 0;
+	} else if (spl_slot_is_bootable(&ab_data.slots[1])) {
+		slot_index_to_boot = 1;
+	} else {
+		printf("No bootable slots found, use lastboot.\n");
+		if (spl_get_lastboot(&ab_data) == 0) {
+			memcpy(slot, "_a", 2);
+			goto out;
+		} else if (spl_get_lastboot(&ab_data) == 1) {
+			memcpy(slot, "_b", 2);
+			goto out;
+		} else {
+			return -ENODEV;
+		}
+	}
+
+	if (slot_index_to_boot == 0)
+		memcpy(slot, "_a", 2);
+	else if (slot_index_to_boot == 1)
+		memcpy(slot, "_b", 2);
+
+out:
+	return 0;
+}
+
+int spl_get_partitions_sector(struct blk_desc *dev_desc, char *partition,
+			       u32 *sectors)
+{
+	disk_partition_t part_info;
+	char part[10] = {0};
+	char slot[3] = {0};
+
+	if (!partition || !sectors)
+		return -EFAULT;
+
+	spl_get_current_slot(dev_desc, "misc", slot);
+	if (strlen(partition) > 8)
+		return -ENOMEM;
+
+	strcat(part, partition);
+	strcat(part, slot);
+	if (part_get_info_by_name(dev_desc, part, &part_info) < 0)
+		return -ENODEV;
+
+	*sectors = part_info.start;
+
+	return 0;
+}
diff --git a/include/spl_ab.h b/include/spl_ab.h
new file mode 100644
index 0000000000..b5be70f5bf
--- /dev/null
+++ b/include/spl_ab.h
@@ -0,0 +1,36 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _SPL_AB_H_
+#define _SPL_AB_H_
+
+#include <android_avb/libavb_ab.h>
+#include <android_avb/avb_ab_flow.h>
+
+#define AB_METADATA_OFFSET 4
+
+/*
+ * spl_get_current_slot
+ *
+ * @dev_desc: block description
+ * @partition: partition name
+ * @slot: A/B slot
+ *
+ * return: 0 success, others fail.
+ */
+int spl_get_current_slot(struct blk_desc *dev_desc, char *partition,
+			 char *slot);
+
+/*
+ * spl_get_partitions_sector
+ *
+ * @dev_desc: block description
+ * @partition: partition name
+ * @sectors: firmware load address
+ */
+int spl_get_partitions_sector(struct blk_desc *dev_desc, char *partition,
+			       u32 *sectors);
+
+ #endif

commit 6bccab870731a74807d6fe69aff78fcb975dfa75
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jul 31 22:01:50 2019 +0800

    fdt: fixup: move board_fdt_fixup the earliest than others
    
    If we update fdt by create or move operation, the fdt nodes offset are
    changed, but device node of DM didn't update its offset linking with the
    fdt node. This makes driver can't parse the right fdt node info.
    
    This is a DM framework bug, we need this patch to workarund it.
    
    Change-Id: I18ee427fe2457ae42e5c6d1dab3e365fe87e06e4
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/lib/bootm-fdt.c b/arch/arm/lib/bootm-fdt.c
index d564746cf2..8b9ef7de3b 100644
--- a/arch/arm/lib/bootm-fdt.c
+++ b/arch/arm/lib/bootm-fdt.c
@@ -40,6 +40,11 @@ __weak int board_fdt_fixup(void *blob)
 int arch_fixup_fdt(void *blob)
 {
 	int ret = 0;
+
+	ret = board_fdt_fixup(blob);
+	if (ret)
+		return ret;
+
 #if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_OF_LIBFDT)
 	bd_t *bd = gd->bd;
 	int bank;
@@ -80,9 +85,6 @@ int arch_fixup_fdt(void *blob)
 		return ret;
 #endif
 #endif
-	ret = board_fdt_fixup(blob);
-	if (ret)
-		return ret;
 
 #ifdef CONFIG_FMAN_ENET
 	ret = fdt_update_ethernet_dt(blob);
diff --git a/common/image-fdt.c b/common/image-fdt.c
index 6cabd2eeff..5d01a652a5 100644
--- a/common/image-fdt.c
+++ b/common/image-fdt.c
@@ -562,6 +562,12 @@ int image_setup_libfdt(bootm_headers_t *images, void *blob,
 	ulong *initrd_end = &images->initrd_end;
 	int ret = -EPERM;
 	int fdt_ret;
+
+	if (arch_fixup_fdt(blob) < 0) {
+		printf("ERROR: arch-specific fdt fixup failed\n");
+		goto err;
+	}
+
 #if defined(CONFIG_PASS_DEVICE_SERIAL_BY_FDT)
 	if (fdt_root(blob) < 0) {
 		printf("ERROR: root node setup failed\n");
@@ -572,10 +578,7 @@ int image_setup_libfdt(bootm_headers_t *images, void *blob,
 		printf("ERROR: /chosen node create failed\n");
 		goto err;
 	}
-	if (arch_fixup_fdt(blob) < 0) {
-		printf("ERROR: arch-specific fdt fixup failed\n");
-		goto err;
-	}
+
 	/* Update ethernet nodes */
 	fdt_fixup_ethernet(blob);
 	if (IMAGE_OF_BOARD_SETUP) {

commit 7e02d185cc333da4a14b82f2aa62ea41068c1532
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Wed Jul 31 08:24:36 2019 +0800

    configs: rk3328_defconfig: enable CONFIG_CMD_DTIMG
    
    Change-Id: Ic15017931d22a0fa3c5b9f92aebc4a5bfe74d780
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index 64b4bf7646..1e06985868 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -35,6 +35,7 @@ CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_BOOTD is not set
 CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_DTIMG=y
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set

commit fbf99d9116409fd59686dfd3f891547b111d65cb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 30 15:15:45 2019 +0800

    cmd: add "download" to enter rockusb/bootrom mode
    
    Effect order: rockusb => bootrom.
    
    Change-Id: Ie206f565e1c79e72c173c25f6970c93c8306332f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/cmd/Makefile b/cmd/Makefile
index 353972e0a6..e485988fc8 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -81,7 +81,7 @@ obj-$(CONFIG_CMD_CRAMFS) += cramfs.o
 obj-$(CONFIG_LED_STATUS_CMD) += legacy_led.o
 obj-$(CONFIG_CMD_LED) += led.o
 obj-$(CONFIG_CMD_LICENSE) += license.o
-obj-y += load.o
+obj-y += load.o download.o
 obj-$(CONFIG_CMD_LOAD_ANDROID) += load_android.o android_cmds.o
 obj-$(CONFIG_CMD_LOG) += log.o
 obj-$(CONFIG_ID_EEPROM) += mac.o
diff --git a/cmd/download.c b/cmd/download.c
new file mode 100644
index 0000000000..232c474977
--- /dev/null
+++ b/cmd/download.c
@@ -0,0 +1,27 @@
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <command.h>
+
+static int do_download(cmd_tbl_t *cmdtp, int flag,
+		       int argc, char * const argv[])
+{
+#ifdef CONFIG_CMD_ROCKUSB
+	run_command("rockusb 0 $devtype $devnum", 0);
+#endif
+#ifdef CONFIG_CMD_GO
+	printf("Enter rockusb failed, fallback to bootrom...\n");
+	flushc();
+	run_command("rbrom", 0);
+#endif
+	return 0;
+}
+
+U_BOOT_CMD(
+	download, 1, 1, do_download,
+	"enter rockusb/bootrom download mode", ""
+);

commit a5811164836b48f821eb7abae74550b20390e7c5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 30 15:10:15 2019 +0800

    dm: console/serial: fix flushc() doesn't work
    
    fixes: c1e72b20c91289718b46e1d52185fbef59878daf
    (dm: console/serial: add flushc() support)
    
    Change-Id: I0e0fae58b23bad52b4377d00e89f1b055d39f187
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/stdio.c b/common/stdio.c
index 2e5143a025..fbf06e29f0 100644
--- a/common/stdio.c
+++ b/common/stdio.c
@@ -54,6 +54,11 @@ static int nulldev_input(struct stdio_dev *dev)
 	/* nulldev is empty! */
 	return 0;
 }
+
+static void nulldev_clear(struct stdio_dev *dev)
+{
+	/* nulldev is empty! */
+}
 #endif
 
 static void stdio_serial_putc(struct stdio_dev *dev, const char c)
@@ -76,6 +81,11 @@ static int stdio_serial_tstc(struct stdio_dev *dev)
 	return serial_tstc();
 }
 
+static void stdio_serial_clear(struct stdio_dev *dev)
+{
+	serial_clear();
+}
+
 /**************************************************************************
  * SYSTEM DRIVERS
  **************************************************************************
@@ -93,6 +103,7 @@ static void drv_system_init (void)
 	dev.puts = stdio_serial_puts;
 	dev.getc = stdio_serial_getc;
 	dev.tstc = stdio_serial_tstc;
+	dev.clear = stdio_serial_clear;
 	stdio_register (&dev);
 
 #ifdef CONFIG_SYS_DEVICE_NULLDEV
@@ -104,6 +115,7 @@ static void drv_system_init (void)
 	dev.puts = nulldev_puts;
 	dev.getc = nulldev_input;
 	dev.tstc = nulldev_input;
+	dev.clear = nulldev_clear;
 
 	stdio_register (&dev);
 #endif
diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c
index c86766bb44..aaa864b8ac 100644
--- a/drivers/serial/serial-uclass.c
+++ b/drivers/serial/serial-uclass.c
@@ -201,6 +201,14 @@ static int __serial_tstc(struct udevice *dev)
 	return 1;
 }
 
+static void __serial_clear(struct udevice *dev)
+{
+	struct dm_serial_ops *ops = serial_get_ops(dev);
+
+	if (ops->clear)
+		ops->clear(dev);
+}
+
 #if CONFIG_IS_ENABLED(SERIAL_RX_BUFFER)
 static int _serial_tstc(struct udevice *dev)
 {
@@ -281,14 +289,10 @@ void serial_setbrg(void)
 
 void serial_clear(void)
 {
-	struct dm_serial_ops *ops;
-
 	if (!gd->cur_serial_dev)
 		return;
 
-	ops = serial_get_ops(gd->cur_serial_dev);
-	if (ops->setbrg)
-		ops->clear(gd->cur_serial_dev);
+	__serial_clear(gd->cur_serial_dev);
 }
 
 void serial_stdio_init(void)

commit 09d1ed2844e818b39ec08bee4e8bd81066bea46a
Author: wengtao <tao.weng@rock-chips.com>
Date:   Tue Jul 30 17:44:25 2019 +0800

    configs: rk3368_defconfig: enable CONFIG_GMAC_ROCKCHIP
    
    Ethernet cannot get the burned MAC address through ifconfig
    if we do not enable GMAC
    
    Change-Id: I99c9a805a7f0d42c4b9a1a9b2c869ed6bfb1d4dc
    Signed-off-by: wengtao <tao.weng@rock-chips.com>

diff --git a/configs/rk3368_defconfig b/configs/rk3368_defconfig
index 3ce2a8690a..9d18fda267 100644
--- a/configs/rk3368_defconfig
+++ b/configs/rk3368_defconfig
@@ -37,7 +37,6 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
 # CONFIG_CMD_MISC is not set
 # CONFIG_ISO_PARTITION is not set
 CONFIG_RKPARM_PARTITION=y
@@ -55,6 +54,9 @@ CONFIG_GPIO_KEY=y
 CONFIG_RK_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y

commit 11c62a96b292550a5c0971df58df4196f7db6564
Author: wengtao <tao.weng@rock-chips.com>
Date:   Wed Jul 31 12:30:03 2019 +0800

    configs: rk3368: update by make savedefconfig
    
    Change-Id: If60fc50a69bb1caa863d2438957a72fc96587f61
    Signed-off-by: wengtao <tao.weng@rock-chips.com>

diff --git a/configs/rk3368_defconfig b/configs/rk3368_defconfig
index 37642aba11..3ce2a8690a 100644
--- a/configs/rk3368_defconfig
+++ b/configs/rk3368_defconfig
@@ -90,16 +90,15 @@ CONFIG_G_DNL_PRODUCT_NUM=0x330a
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_DW_HDMI=y
 CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
-CONFIG_DRM_ROCKCHIP_DW_HDMI=y
 CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_ERRNO_STR=y
-CONFIG_OF_LIBFDT_OVERLAY=y
 # CONFIG_EFI_LOADER is not set
 CONFIG_AVB_LIBAVB=y
 CONFIG_AVB_LIBAVB_AB=y

commit 85bf7be3e68d3c1affb7752806577956bbbcddbb
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jul 26 09:41:06 2019 +0800

    common: spl: mmc: use block interface to find mmc device
    
    Use block interface to find mmc device if enable CONFIG_SPL_BLK.
    
    Change-Id: Ide47190c0648627d9853296a59053bdff282e4f7
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c
index 435fe06196..7bd989a06d 100644
--- a/common/spl/spl_mmc.c
+++ b/common/spl/spl_mmc.c
@@ -134,9 +134,6 @@ static int spl_mmc_get_device_index(u32 boot_device)
 
 static int spl_mmc_find_device(struct mmc **mmcp, u32 boot_device)
 {
-#if CONFIG_IS_ENABLED(DM_MMC)
-	struct udevice *dev;
-#endif
 	int err, mmc_dev;
 
 	mmc_dev = spl_mmc_get_device_index(boot_device);
@@ -151,14 +148,8 @@ static int spl_mmc_find_device(struct mmc **mmcp, u32 boot_device)
 		return err;
 	}
 
-#if CONFIG_IS_ENABLED(DM_MMC)
-	err = uclass_get_device(UCLASS_MMC, mmc_dev, &dev);
-	if (!err)
-		*mmcp = mmc_get_mmc_dev(dev);
-#else
 	*mmcp = find_mmc_device(mmc_dev);
 	err = *mmcp ? 0 : -ENODEV;
-#endif
 	if (err) {
 #ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
 		printf("spl: could not find mmc device. error: %d\n", err);

commit 444036a7cdd78d8d7c2cad2c85bb4f1b0a955249
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jul 26 09:38:51 2019 +0800

    dm: mmc: support get MMC order through aliases in spl process
    
    Since we use the aliases in U-Boot to get the MMC device order, and
    sometimes we pass the spl boot device to U-Boot. This may be confused
    that which MMC device is passed to U-Boot. So unify it together.
    
    Change-Id: I8db5e90d9543004aff128322398edffad35b551b
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mmc/mmc-uclass.c b/drivers/mmc/mmc-uclass.c
index 1a11844cae..7feb225186 100644
--- a/drivers/mmc/mmc-uclass.c
+++ b/drivers/mmc/mmc-uclass.c
@@ -214,11 +214,9 @@ int mmc_bind(struct udevice *dev, struct mmc *mmc, const struct mmc_config *cfg)
 
 	if (!mmc_get_ops(dev))
 		return -ENOSYS;
-#ifndef CONFIG_SPL_BUILD
 	/* Use the fixed index with aliase node's index */
 	ret = dev_read_alias_seq(dev, &devnum);
 	debug("%s: alias ret=%d, devnum=%d\n", __func__, ret, devnum);
-#endif
 
 	ret = blk_create_devicef(dev, "mmc_blk", "blk", IF_TYPE_MMC,
 			devnum, 512, 0, &bdev);

commit 83ea92e1b22a74f331f24b8f337759ad55514e1b
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Jul 18 20:32:58 2019 +0800

    disk: part: support get part info in spl
    
    Change-Id: I79be3609f0a4f9a24cb82c5cb8090bde0eafaf85
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/part.h b/include/part.h
index 287311863c..69ea046ce7 100644
--- a/include/part.h
+++ b/include/part.h
@@ -231,22 +231,16 @@ static inline int blk_get_device_part_str(const char *ifname,
 #endif
 
 /*
- * We don't support printing partition information in SPL and only support
- * getting partition information in a few cases.
+ * We don't support printing partition information in SPL.
  */
 #ifdef CONFIG_SPL_BUILD
-# define part_print_ptr(x)	NULL
-# if defined(CONFIG_SPL_EXT_SUPPORT) || defined(CONFIG_SPL_FAT_SUPPORT) || \
-	defined(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION)
-#  define part_get_info_ptr(x)	x
-# else
-#  define part_get_info_ptr(x)	NULL
-# endif
+#define part_print_ptr(x)	NULL
 #else
-#define part_print_ptr(x)	x
-#define part_get_info_ptr(x)	x
+#define part_print_ptr(x)       x
 #endif
 
+#define part_get_info_ptr(x)	x
+
 
 struct part_driver {
 	const char *name;

commit 6e54cbfe00ce71e38ee7f42d46acfac176a7b605
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Jul 18 16:59:08 2019 +0800

    disk: fix compile error when enable part efi in spl build
    
    TEST:
    ./make.sh rk3308
    
    CONFIG:
    CONFIG_SPL_EFI_PARTITION
    CONFIG_SPL_LIBDISK_SUPPORT
    
    Error message:
    disk/part_efi.c:1219:11: error: ‘part_test_efi’ undeclared here
    (not in a function) .test  = part_test_efi,
    disk/part_efi.c:1182:12: error: ‘is_pte_valid’ defined but not
    used [-Werror=unused-function] static int is_pte_valid(gpt_entry * pte)
    ......
    
    Change-Id: I231511eb54d998151aadff68f19db7ee8127f122
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/disk/Makefile b/disk/Makefile
index 97a23830f3..bf0ca73c56 100644
--- a/disk/Makefile
+++ b/disk/Makefile
@@ -12,5 +12,5 @@ obj-$(CONFIG_$(SPL_)MAC_PARTITION)   += part_mac.o
 obj-$(CONFIG_$(SPL_)DOS_PARTITION)   += part_dos.o
 obj-$(CONFIG_$(SPL_)ISO_PARTITION)   += part_iso.o
 obj-$(CONFIG_$(SPL_)AMIGA_PARTITION) += part_amiga.o
-obj-$(CONFIG_$(SPL_)EFI_PARTITION)   += part_efi.o
+obj-$(CONFIG_$(SPL_TPL_)EFI_PARTITION)   += part_efi.o
 obj-$(CONFIG_$(SPL_)RKPARM_PARTITION)   += part_rkparm.o

commit e064ede6e63074f01ddef2e71a91901c9e2203c9
Author: Shunqing Chen <csq@rock-chips.com>
Date:   Fri Jul 26 08:57:46 2019 +0800

    fuel gauge: rk817/rk809: fix code error
    
    Change-Id: I297015130144cb3c41e45a2030b729edd61498ce
    Signed-off-by: Shunqing Chen <csq@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk817.c b/drivers/power/fuel_gauge/fg_rk817.c
index 86eaf93772..24af7747e2 100644
--- a/drivers/power/fuel_gauge/fg_rk817.c
+++ b/drivers/power/fuel_gauge/fg_rk817.c
@@ -1307,7 +1307,7 @@ static int rk817_fg_init(struct rk817_battery_device *battery)
 	rk817_bat_write(battery, GG_CON, value | VOL_OUPUT_INSTANT_MODE);
 	if (battery->variant == RK817_ID) {
 		value =  rk817_bat_read(battery, BAT_DISCHRG);
-		rk817_bat_write(battery, GG_CON, value & (~DIS_ILIM_EN));
+		rk817_bat_write(battery, BAT_DISCHRG, value & (~DIS_ILIM_EN));
 	}
 	rk817_bat_gas_gaugle_enable(battery);
 	rk817_bat_init_voltage_kb(battery);

commit 14b86dc99363ff98df860b159ffefdacadcec22f
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Thu Jul 25 08:52:21 2019 +0800

    spi: rockchip_sfc update to compatible interface
    
    1.update interface to get register base
    2.update interface to scan subnote
    
    Change-Id: I14b9f582219b775d8c94ea38ab4bb0527d05c37d
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/spi/rockchip_sfc.c b/drivers/spi/rockchip_sfc.c
index f81d87b1f1..5050d427de 100644
--- a/drivers/spi/rockchip_sfc.c
+++ b/drivers/spi/rockchip_sfc.c
@@ -104,7 +104,7 @@ enum rockchip_sfc_if_type {
 
 struct rockchip_sfc_platdata {
 	s32 frequency;
-	fdt_addr_t base;
+	void *base;
 };
 
 struct rockchip_sfc {
@@ -125,27 +125,24 @@ static int rockchip_sfc_ofdata_to_platdata(struct udevice *bus)
 {
 	struct rockchip_sfc_platdata *plat = dev_get_platdata(bus);
 	struct rockchip_sfc *sfc = dev_get_priv(bus);
-	const void *blob = gd->fdt_blob;
-	int node = dev_of_offset(bus);
-	int subnode;
+	ofnode subnode;
 	int ret;
 
-	plat->base = devfdt_get_addr(bus);
-
+	plat->base = dev_read_addr_ptr(bus);
 	ret = clk_get_by_index(bus, 0, &sfc->clk);
 	if (ret < 0) {
-		debug("Could not get clock for %s: %d\n", bus->name, ret);
+		printf("Could not get clock for %s: %d\n", bus->name, ret);
 		return ret;
 	}
 
-	subnode = fdt_first_subnode(blob, node);
-	if (subnode < 0) {
-		debug("Error: subnode with SPI flash config missing!\n");
+	subnode = dev_read_first_subnode(bus);
+	if (!ofnode_valid(subnode)) {
+		printf("Error: subnode with SPI flash config missing!\n");
 		return -ENODEV;
 	}
 
-	plat->frequency = fdtdec_get_int(blob, subnode, "spi-max-frequency",
-					 100000000);
+	plat->frequency = ofnode_read_u32_default(subnode, "spi-max-frequency",
+						  100000000);
 
 	return 0;
 }
@@ -154,18 +151,9 @@ static int rockchip_sfc_probe(struct udevice *bus)
 {
 	struct rockchip_sfc_platdata *plat = dev_get_platdata(bus);
 	struct rockchip_sfc *sfc = dev_get_priv(bus);
-	int ret;
 
 	sfc->regbase = (struct rockchip_sfc_reg *)plat->base;
 
-	sfc->max_freq = plat->frequency;
-
-	ret = clk_set_rate(&sfc->clk, sfc->max_freq);
-	if (ret < 0) {
-		debug("%s: Failed to set clock: %d\n", __func__, ret);
-		return ret;
-	}
-
 	return 0;
 }
 
@@ -294,7 +282,7 @@ static int rockchip_sfc_dma_xfer(struct rockchip_sfc *sfc, void *buffer, size_t
 	rockchip_sfc_setup_xfer(sfc, bb.len_aligned);
 
 	writel(0xFFFFFFFF, &regs->iclr);
-	writel((u32)bb.bounce_buffer, &regs->dmaaddr);
+	writel((unsigned long)bb.bounce_buffer, &regs->dmaaddr);
 	writel(SFC_DMA_START, &regs->dmatr);
 
 	tbase = get_timer(0);

commit fe404743f85868fb979a073dd1380746460e6112
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jul 25 15:11:49 2019 +0800

    power: io-domain: initialize all io-domain
    
    There maybe more than one io-domain.
    
    Change-Id: I786544547b7c5da034e4d9685d60144c22266c3b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/io-domain/io-domain-uclass.c b/drivers/power/io-domain/io-domain-uclass.c
index 7d5139e3c1..c3d35b2c71 100644
--- a/drivers/power/io-domain/io-domain-uclass.c
+++ b/drivers/power/io-domain/io-domain-uclass.c
@@ -7,14 +7,22 @@
 #include <console.h>
 #include <io-domain.h>
 
-void io_domain_init(void)
+int io_domain_init(void)
 {
-	int ret;
 	struct udevice *dev;
+	struct uclass *uc;
+	int ret;
 
-	ret = uclass_get_device(UCLASS_IO_DOMAIN, 0, &dev);
+	ret = uclass_get(UCLASS_IO_DOMAIN, &uc);
 	if (ret)
-		printf("Can't find UCLASS_IO_DOMAIN driver %d\n", ret);
+		return ret;
+
+	for (uclass_first_device(UCLASS_IO_DOMAIN, &dev);
+	     dev;
+	     uclass_next_device(&dev))
+		;
+
+	return 0;
 }
 
 UCLASS_DRIVER(io_domain) = {
diff --git a/include/io-domain.h b/include/io-domain.h
index a52b9a7e37..53624cd6c0 100644
--- a/include/io-domain.h
+++ b/include/io-domain.h
@@ -11,6 +11,6 @@
 /**
  * io_domain_init() - init io-domain driver
  */
-void io_domain_init(void);
+int io_domain_init(void);
 
 #endif	/* _IO_DOMAIN_H_ */

commit 6a4b5e01bf781e2434dd8f3974e16cef7259a20c
Author: Tony Xu <tony.xu@rock-chips.com>
Date:   Thu Jul 25 14:06:16 2019 +0800

    common: write_keybox: write a flag to security storage
    
    The flag is used to help ta to decide where to read key
    
    Change-Id: I3255cc86dbf37940326364fcc617f774f9cfd89b
    Signed-off-by: Tony Xu <tony.xu@rock-chips.com>

diff --git a/common/write_keybox.c b/common/write_keybox.c
index 164d802353..1abf587654 100644
--- a/common/write_keybox.c
+++ b/common/write_keybox.c
@@ -129,6 +129,23 @@ uint32_t write_keybox_to_secure_storage(uint8_t *received_data, uint32_t len)
 	uint32_t data_size;
 	int rc = 0;
 	TEEC_Result ret;
+	struct blk_desc *dev_desc;
+	uint8_t is_use_rpmb;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -EIO;
+	}
+	is_use_rpmb = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	is_use_rpmb = 0;
+#endif
+	rc = write_to_keymaster((uint8_t *)"security_partition",
+				sizeof("security_partition"),
+				&is_use_rpmb, sizeof(is_use_rpmb));
+	if (rc)
+		return -EIO;
 
 	if (memcmp(received_data, WIDEVINE_TAG, SIZE_OF_TAG) == 0) {
 		/* widevine keybox */

commit 1490eb89f4697b02cfb8f826d2f5eaf37edcbd47
Author: Adam Ford <aford173@gmail.com>
Date:   Sun Apr 15 13:51:26 2018 -0400

    UPSTREAM: Convert CONFIG_SPI to Kconfig
    
    This converts the following to Kconfig:
       CONFIG_SPI
    
    This partly involves updating code that assumes that CONFIG_SPI implies
    things that are specific to the MPC8xx SPI driver.  For now, just update
    the CONFIG tests.  This also involves reworking the default for
    CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a
    reasonable default, as it does not cause any compile failures.
    
    Signed-off-by: Adam Ford <aford173@gmail.com>
    Signed-off-by: Tom Rini <trini@konsulko.com>
    (cherry picked from commit f1b1f77060beadbfe9f42a3be00019bd025afbd6)
    Change-Id: Ie9f15ada869105eb407f41d4df7eecbaa916b940
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/arch/Kconfig b/arch/Kconfig
index 0b12ed986c..9542bab784 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -66,6 +66,8 @@ config SANDBOX
 	select DM_SPI
 	select DM_GPIO
 	select DM_MMC
+	select HAVE_BLOCK_DEVICE
+	select SPI
 	select LZO
 	imply CMD_GETTIME
 	imply CMD_HASH
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 8e2d2a017e..d0117eb856 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -382,6 +382,7 @@ config ARCH_MVEBU
 	select DM_SERIAL
 	select DM_SPI
 	select DM_SPI_FLASH
+	select SPI
 
 config TARGET_DEVKIT3250
 	bool "Support devkit3250"
@@ -492,6 +493,7 @@ config TARGET_STV0991
 	select DM_SERIAL
 	select DM_SPI
 	select DM_SPI_FLASH
+	select SPI
 	select SPI_FLASH
 
 config TARGET_X600
@@ -607,6 +609,7 @@ config ARCH_EXYNOS
 	select DM_SPI
 	select DM_GPIO
 	select DM_KEYBOARD
+	select SPI
 	imply FAT_WRITE
 
 config ARCH_S5PC1XX
@@ -793,6 +796,7 @@ config ARCH_ZYNQ
 	select CLK
 	select SPL_CLK
 	select CLK_ZYNQ
+	select SPI
 	imply CMD_CLK
 	imply FAT_WRITE
 	imply CMD_SPL
@@ -1140,6 +1144,7 @@ config ARCH_ROCKCHIP
 	select ENABLE_ARM_SOC_BOOT0_HOOK
 	select SYS_NS16550
 	select SKIP_RELOCATE_UBOOT if !ARM64
+	select SPI
 	imply CMD_FASTBOOT
 	imply FASTBOOT
 	imply FAT_WRITE
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 20f7eeaf09..80c4c0ed45 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -32,6 +32,7 @@ config TARGET_GURNARD
 	select DM_SERIAL
 	select DM_GPIO
 	select DM_ETH
+	select SPI
 
 config TARGET_AT91SAM9261EK
 	bool "Atmel at91sam9261 reference board"
@@ -128,6 +129,9 @@ config TARGET_MA5D4EVK
 	bool "Aries MA5D4EVK Evaluation Kit"
 	select CPU_V7
 	select SUPPORT_SPL
+	select DM
+	select DM_SPI
+	select SPI
 
 config TARGET_MEESC
 	bool "Support meesc"
@@ -150,6 +154,7 @@ config TARGET_TAURUS
 	select DM_SERIAL
 	select DM_GPIO
 	select DM_ETH
+	select SPI
 
 config TARGET_SMARTWEB
 	bool "Support smartweb"
@@ -162,6 +167,20 @@ config TARGET_SMARTWEB
 
 config TARGET_VINCO
 	bool "Support VINCO"
+	select SAMA5D4
+	select SUPPORT_SPL
+	select DM
+	select DM_SPI
+	select SPI
+
+config TARGET_WB45N
+	bool "Support Laird WB45N"
+	select CPU_ARM926EJS
+	select SUPPORT_SPL
+
+config TARGET_WB50N
+	bool "Support Laird WB50N"
+	select BOARD_LATE_INIT
 	select CPU_V7
 	select SUPPORT_SPL
 
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index 51e50907d2..c1fe17c650 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -35,6 +35,7 @@ config TEGRA_COMMON
 	select DM_SPI
 	select DM_SPI_FLASH
 	select MISC
+	select SPI
 	select OF_CONTROL
 	select VIDCONSOLE_AS_LCD if DM_VIDEO
 	select BOARD_EARLY_INIT_F
diff --git a/cmd/eeprom.c b/cmd/eeprom.c
index c61b396a62..7608be10f5 100644
--- a/cmd/eeprom.c
+++ b/cmd/eeprom.c
@@ -68,7 +68,7 @@ __weak int eeprom_write_enable(unsigned dev_addr, int state)
 void eeprom_init(int bus)
 {
 	/* SPI EEPROM */
-#if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
+#if defined(CONFIG_MPC8XX_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
 	spi_init_f();
 #endif
 
@@ -131,7 +131,7 @@ static int eeprom_rw_block(unsigned offset, uchar *addr, unsigned alen,
 	int ret = 0;
 
 	/* SPI */
-#if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
+#if defined(CONFIG_MPC8XX_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
 	if (read)
 		spi_read(addr, alen, buffer, len);
 	else
diff --git a/common/board_r.c b/common/board_r.c
index e07a39fe8d..34c699f1c0 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -405,8 +405,8 @@ static int initr_flash(void)
 #if defined(CONFIG_PPC) && !defined(CONFIG_DM_SPI)
 static int initr_spi(void)
 {
-	/* PPC does this here */
-#ifdef CONFIG_SPI
+	/* MPC8xx does this here */
+#ifdef CONFIG_MPC8XX_SPI
 #if !defined(CONFIG_ENV_IS_IN_EEPROM)
 	spi_init_f();
 #endif
diff --git a/configs/B4420QDS_NAND_defconfig b/configs/B4420QDS_NAND_defconfig
index 01af4aab86..873f727771 100644
--- a/configs/B4420QDS_NAND_defconfig
+++ b/configs/B4420QDS_NAND_defconfig
@@ -39,6 +39,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/B4420QDS_SPIFLASH_defconfig b/configs/B4420QDS_SPIFLASH_defconfig
index 6e37669e67..b53a9bffab 100644
--- a/configs/B4420QDS_SPIFLASH_defconfig
+++ b/configs/B4420QDS_SPIFLASH_defconfig
@@ -29,6 +29,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/B4420QDS_defconfig b/configs/B4420QDS_defconfig
index beeaa82103..95b813f12b 100644
--- a/configs/B4420QDS_defconfig
+++ b/configs/B4420QDS_defconfig
@@ -28,6 +28,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/B4860QDS_NAND_defconfig b/configs/B4860QDS_NAND_defconfig
index be0011e036..5aa4e9e8a6 100644
--- a/configs/B4860QDS_NAND_defconfig
+++ b/configs/B4860QDS_NAND_defconfig
@@ -39,6 +39,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/B4860QDS_SECURE_BOOT_defconfig b/configs/B4860QDS_SECURE_BOOT_defconfig
index f756d002be..11f2186d9a 100644
--- a/configs/B4860QDS_SECURE_BOOT_defconfig
+++ b/configs/B4860QDS_SECURE_BOOT_defconfig
@@ -29,6 +29,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/B4860QDS_SPIFLASH_defconfig b/configs/B4860QDS_SPIFLASH_defconfig
index e9a4a07e95..6389bed29e 100644
--- a/configs/B4860QDS_SPIFLASH_defconfig
+++ b/configs/B4860QDS_SPIFLASH_defconfig
@@ -29,6 +29,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig b/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig
index e89b13274d..e14be6b31c 100644
--- a/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig
@@ -30,6 +30,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/B4860QDS_defconfig b/configs/B4860QDS_defconfig
index 5a22a8bc95..8c1a2bfde7 100644
--- a/configs/B4860QDS_defconfig
+++ b/configs/B4860QDS_defconfig
@@ -28,6 +28,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/BSC9131RDB_NAND_SYSCLK100_defconfig b/configs/BSC9131RDB_NAND_SYSCLK100_defconfig
index fa3831dac9..3d4ee24649 100644
--- a/configs/BSC9131RDB_NAND_SYSCLK100_defconfig
+++ b/configs/BSC9131RDB_NAND_SYSCLK100_defconfig
@@ -33,6 +33,7 @@ CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 # CONFIG_PCI is not set
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/BSC9131RDB_NAND_defconfig b/configs/BSC9131RDB_NAND_defconfig
index b9eb95f8d3..8fbeb46ed3 100644
--- a/configs/BSC9131RDB_NAND_defconfig
+++ b/configs/BSC9131RDB_NAND_defconfig
@@ -32,6 +32,7 @@ CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 # CONFIG_PCI is not set
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig b/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig
index 5da73748c0..a7dca1a931 100644
--- a/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig
+++ b/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig
@@ -29,6 +29,7 @@ CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 # CONFIG_PCI is not set
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/BSC9131RDB_SPIFLASH_defconfig b/configs/BSC9131RDB_SPIFLASH_defconfig
index 570e931e50..e73931cf25 100644
--- a/configs/BSC9131RDB_SPIFLASH_defconfig
+++ b/configs/BSC9131RDB_SPIFLASH_defconfig
@@ -29,6 +29,7 @@ CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 # CONFIG_PCI is not set
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig
index 97c2e974e6..5a6b901c7a 100644
--- a/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig
+++ b/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig
@@ -31,6 +31,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/BSC9132QDS_NAND_DDRCLK100_defconfig b/configs/BSC9132QDS_NAND_DDRCLK100_defconfig
index ab0d163fdc..2a8e91657f 100644
--- a/configs/BSC9132QDS_NAND_DDRCLK100_defconfig
+++ b/configs/BSC9132QDS_NAND_DDRCLK100_defconfig
@@ -34,6 +34,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig
index d08bb5f337..4153cae68a 100644
--- a/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig
+++ b/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig
@@ -31,6 +31,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/BSC9132QDS_NAND_DDRCLK133_defconfig b/configs/BSC9132QDS_NAND_DDRCLK133_defconfig
index fe2aab0aa8..0871d7c897 100644
--- a/configs/BSC9132QDS_NAND_DDRCLK133_defconfig
+++ b/configs/BSC9132QDS_NAND_DDRCLK133_defconfig
@@ -34,6 +34,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig
index e2d765de64..f5791e195c 100644
--- a/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig
+++ b/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig
@@ -31,6 +31,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/BSC9132QDS_NOR_DDRCLK100_defconfig b/configs/BSC9132QDS_NOR_DDRCLK100_defconfig
index 9d0ce6695c..843f2adf03 100644
--- a/configs/BSC9132QDS_NOR_DDRCLK100_defconfig
+++ b/configs/BSC9132QDS_NOR_DDRCLK100_defconfig
@@ -30,6 +30,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig
index c259f5490a..c135abca1b 100644
--- a/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig
+++ b/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig
@@ -31,6 +31,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/BSC9132QDS_NOR_DDRCLK133_defconfig b/configs/BSC9132QDS_NOR_DDRCLK133_defconfig
index 7aca9c0e81..4b93d5ba68 100644
--- a/configs/BSC9132QDS_NOR_DDRCLK133_defconfig
+++ b/configs/BSC9132QDS_NOR_DDRCLK133_defconfig
@@ -30,6 +30,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig
index ca1da8c097..998c8b5278 100644
--- a/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig
+++ b/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig
@@ -31,6 +31,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig
index ff33e94284..5de7f9aed6 100644
--- a/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig
+++ b/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig
@@ -30,6 +30,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig
index 999ad1315e..5ba2840370 100644
--- a/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig
+++ b/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig
@@ -31,6 +31,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig
index e27eb65b50..f529e22982 100644
--- a/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig
+++ b/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig
@@ -30,6 +30,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig
index bf203e0a03..d593aed9f6 100644
--- a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig
+++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig
@@ -31,6 +31,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig
index dfc281e24a..650314ffcb 100644
--- a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig
+++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig
@@ -30,6 +30,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig
index 0ccb4f6035..256cc984d7 100644
--- a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig
+++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig
@@ -31,6 +31,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig
index eb27fd0379..d414d94e53 100644
--- a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig
+++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig
@@ -30,6 +30,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/C29XPCIE_NAND_defconfig b/configs/C29XPCIE_NAND_defconfig
index 6b3e0934d4..dfbca62cbc 100644
--- a/configs/C29XPCIE_NAND_defconfig
+++ b/configs/C29XPCIE_NAND_defconfig
@@ -39,5 +39,6 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/C29XPCIE_NOR_SECBOOT_defconfig b/configs/C29XPCIE_NOR_SECBOOT_defconfig
index 89d6fc3d44..b6268143a0 100644
--- a/configs/C29XPCIE_NOR_SECBOOT_defconfig
+++ b/configs/C29XPCIE_NOR_SECBOOT_defconfig
@@ -27,6 +27,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_RSA=y
 CONFIG_SPL_RSA=y
diff --git a/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
index cd366a7096..0d0111f84d 100644
--- a/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
+++ b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
@@ -28,6 +28,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_RSA=y
 CONFIG_SPL_RSA=y
diff --git a/configs/C29XPCIE_SPIFLASH_defconfig b/configs/C29XPCIE_SPIFLASH_defconfig
index cf47a125dd..bb14e3170c 100644
--- a/configs/C29XPCIE_SPIFLASH_defconfig
+++ b/configs/C29XPCIE_SPIFLASH_defconfig
@@ -27,5 +27,6 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/C29XPCIE_defconfig b/configs/C29XPCIE_defconfig
index 7f5cea0f9d..f4de3666bf 100644
--- a/configs/C29XPCIE_defconfig
+++ b/configs/C29XPCIE_defconfig
@@ -26,5 +26,6 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/Cyrus_P5020_defconfig b/configs/Cyrus_P5020_defconfig
index 37f78a4811..d2183afc5f 100644
--- a/configs/Cyrus_P5020_defconfig
+++ b/configs/Cyrus_P5020_defconfig
@@ -30,6 +30,7 @@ CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/Cyrus_P5040_defconfig b/configs/Cyrus_P5040_defconfig
index d33b514ee0..5b3a3d4174 100644
--- a/configs/Cyrus_P5040_defconfig
+++ b/configs/Cyrus_P5040_defconfig
@@ -30,6 +30,7 @@ CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/M52277EVB_defconfig b/configs/M52277EVB_defconfig
index 88dcd9c51f..cb7cf5f15c 100644
--- a/configs/M52277EVB_defconfig
+++ b/configs/M52277EVB_defconfig
@@ -18,4 +18,5 @@ CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI=y
 CONFIG_CF_SPI=y
diff --git a/configs/M52277EVB_stmicro_defconfig b/configs/M52277EVB_stmicro_defconfig
index bd86c43415..e6d49c6a26 100644
--- a/configs/M52277EVB_stmicro_defconfig
+++ b/configs/M52277EVB_stmicro_defconfig
@@ -17,4 +17,5 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI=y
 CONFIG_CF_SPI=y
diff --git a/configs/M54418TWR_defconfig b/configs/M54418TWR_defconfig
index 9ae7f43fa3..73e21b6eb8 100644
--- a/configs/M54418TWR_defconfig
+++ b/configs/M54418TWR_defconfig
@@ -21,4 +21,5 @@ CONFIG_CMD_CACHE=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI=y
 CONFIG_CF_SPI=y
diff --git a/configs/M54418TWR_nand_mii_defconfig b/configs/M54418TWR_nand_mii_defconfig
index e4b71d4768..576b364f6d 100644
--- a/configs/M54418TWR_nand_mii_defconfig
+++ b/configs/M54418TWR_nand_mii_defconfig
@@ -20,4 +20,5 @@ CONFIG_CMD_PING=y
 CONFIG_CMD_CACHE=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI=y
 CONFIG_CF_SPI=y
diff --git a/configs/M54418TWR_nand_rmii_defconfig b/configs/M54418TWR_nand_rmii_defconfig
index cd2e811e41..68549def6f 100644
--- a/configs/M54418TWR_nand_rmii_defconfig
+++ b/configs/M54418TWR_nand_rmii_defconfig
@@ -20,4 +20,5 @@ CONFIG_CMD_PING=y
 CONFIG_CMD_CACHE=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI=y
 CONFIG_CF_SPI=y
diff --git a/configs/M54418TWR_nand_rmii_lowfreq_defconfig b/configs/M54418TWR_nand_rmii_lowfreq_defconfig
index 782df50fe9..bd8aca376f 100644
--- a/configs/M54418TWR_nand_rmii_lowfreq_defconfig
+++ b/configs/M54418TWR_nand_rmii_lowfreq_defconfig
@@ -20,4 +20,5 @@ CONFIG_CMD_PING=y
 CONFIG_CMD_CACHE=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI=y
 CONFIG_CF_SPI=y
diff --git a/configs/M54418TWR_serial_mii_defconfig b/configs/M54418TWR_serial_mii_defconfig
index 6cb12c9644..a3a5a7da39 100644
--- a/configs/M54418TWR_serial_mii_defconfig
+++ b/configs/M54418TWR_serial_mii_defconfig
@@ -21,4 +21,5 @@ CONFIG_CMD_CACHE=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI=y
 CONFIG_CF_SPI=y
diff --git a/configs/M54418TWR_serial_rmii_defconfig b/configs/M54418TWR_serial_rmii_defconfig
index 9ae7f43fa3..73e21b6eb8 100644
--- a/configs/M54418TWR_serial_rmii_defconfig
+++ b/configs/M54418TWR_serial_rmii_defconfig
@@ -21,4 +21,5 @@ CONFIG_CMD_CACHE=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI=y
 CONFIG_CF_SPI=y
diff --git a/configs/M54451EVB_defconfig b/configs/M54451EVB_defconfig
index b1acff4bcc..6aff84935c 100644
--- a/configs/M54451EVB_defconfig
+++ b/configs/M54451EVB_defconfig
@@ -21,4 +21,5 @@ CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI=y
 CONFIG_CF_SPI=y
diff --git a/configs/M54451EVB_stmicro_defconfig b/configs/M54451EVB_stmicro_defconfig
index 9141f956b2..ffcb97f3c5 100644
--- a/configs/M54451EVB_stmicro_defconfig
+++ b/configs/M54451EVB_stmicro_defconfig
@@ -20,4 +20,5 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI=y
 CONFIG_CF_SPI=y
diff --git a/configs/M54455EVB_a66_defconfig b/configs/M54455EVB_a66_defconfig
index bce319df04..ab79b4b877 100644
--- a/configs/M54455EVB_a66_defconfig
+++ b/configs/M54455EVB_a66_defconfig
@@ -25,4 +25,5 @@ CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI=y
 CONFIG_CF_SPI=y
diff --git a/configs/M54455EVB_defconfig b/configs/M54455EVB_defconfig
index 3b344dc6f4..c12306035d 100644
--- a/configs/M54455EVB_defconfig
+++ b/configs/M54455EVB_defconfig
@@ -26,4 +26,5 @@ CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI=y
 CONFIG_CF_SPI=y
diff --git a/configs/M54455EVB_i66_defconfig b/configs/M54455EVB_i66_defconfig
index ce9f8301bc..4129f8c5ec 100644
--- a/configs/M54455EVB_i66_defconfig
+++ b/configs/M54455EVB_i66_defconfig
@@ -25,4 +25,5 @@ CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI=y
 CONFIG_CF_SPI=y
diff --git a/configs/M54455EVB_intel_defconfig b/configs/M54455EVB_intel_defconfig
index de11894490..3500b0d91f 100644
--- a/configs/M54455EVB_intel_defconfig
+++ b/configs/M54455EVB_intel_defconfig
@@ -25,4 +25,5 @@ CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI=y
 CONFIG_CF_SPI=y
diff --git a/configs/M54455EVB_stm33_defconfig b/configs/M54455EVB_stm33_defconfig
index fc37b1f0ed..9cc370c948 100644
--- a/configs/M54455EVB_stm33_defconfig
+++ b/configs/M54455EVB_stm33_defconfig
@@ -25,4 +25,5 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI=y
 CONFIG_CF_SPI=y
diff --git a/configs/MPC8349EMDS_defconfig b/configs/MPC8349EMDS_defconfig
index 32ad48db00..f1fa9c495d 100644
--- a/configs/MPC8349EMDS_defconfig
+++ b/configs/MPC8349EMDS_defconfig
@@ -15,5 +15,6 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_PHYLIB=y
 # CONFIG_PCI is not set
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_MPC8XXX_SPI=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/MPC8536DS_36BIT_defconfig b/configs/MPC8536DS_36BIT_defconfig
index 8c4bab2e5a..b86d4417ad 100644
--- a/configs/MPC8536DS_36BIT_defconfig
+++ b/configs/MPC8536DS_36BIT_defconfig
@@ -31,6 +31,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/MPC8536DS_SDCARD_defconfig b/configs/MPC8536DS_SDCARD_defconfig
index 5ee64ccb34..af3c57b874 100644
--- a/configs/MPC8536DS_SDCARD_defconfig
+++ b/configs/MPC8536DS_SDCARD_defconfig
@@ -30,6 +30,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/MPC8536DS_SPIFLASH_defconfig b/configs/MPC8536DS_SPIFLASH_defconfig
index cd25980b9f..5bed866c03 100644
--- a/configs/MPC8536DS_SPIFLASH_defconfig
+++ b/configs/MPC8536DS_SPIFLASH_defconfig
@@ -30,6 +30,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/MPC8536DS_defconfig b/configs/MPC8536DS_defconfig
index e40208d89a..ea1ff1b408 100644
--- a/configs/MPC8536DS_defconfig
+++ b/configs/MPC8536DS_defconfig
@@ -30,6 +30,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig
index 97c5e85f64..9615f48a66 100644
--- a/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig
@@ -31,6 +31,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig
index e0626b2964..691dd94a30 100644
--- a/configs/P1010RDB-PA_36BIT_NAND_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig
@@ -43,6 +43,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig
index fa07a21ac0..4023908237 100644
--- a/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig
@@ -30,6 +30,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig
index 6d8492963e..2f88c84132 100644
--- a/configs/P1010RDB-PA_36BIT_NOR_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig
@@ -29,6 +29,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
index 4df6cbac29..688f1ce80b 100644
--- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
+++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
@@ -39,6 +39,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig
index be3545c30a..8a95db3106 100644
--- a/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig
@@ -31,6 +31,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
index 073323bff5..ea56bfdf05 100644
--- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
@@ -40,6 +40,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1010RDB-PA_NAND_SECBOOT_defconfig b/configs/P1010RDB-PA_NAND_SECBOOT_defconfig
index 7aa6433a4c..6c34464353 100644
--- a/configs/P1010RDB-PA_NAND_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_NAND_SECBOOT_defconfig
@@ -30,6 +30,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig
index 44da2304f8..a92159b10e 100644
--- a/configs/P1010RDB-PA_NAND_defconfig
+++ b/configs/P1010RDB-PA_NAND_defconfig
@@ -42,6 +42,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1010RDB-PA_NOR_SECBOOT_defconfig b/configs/P1010RDB-PA_NOR_SECBOOT_defconfig
index f026bdad18..93058def93 100644
--- a/configs/P1010RDB-PA_NOR_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_NOR_SECBOOT_defconfig
@@ -29,6 +29,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig
index efab49ff22..80336ced9c 100644
--- a/configs/P1010RDB-PA_NOR_defconfig
+++ b/configs/P1010RDB-PA_NOR_defconfig
@@ -28,6 +28,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig
index 4fc641dde1..63a8d971d8 100644
--- a/configs/P1010RDB-PA_SDCARD_defconfig
+++ b/configs/P1010RDB-PA_SDCARD_defconfig
@@ -38,6 +38,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig
index ecf525226f..959311ff06 100644
--- a/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig
@@ -30,6 +30,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig
index 60ba1ac203..d3b47e20df 100644
--- a/configs/P1010RDB-PA_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PA_SPIFLASH_defconfig
@@ -39,6 +39,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig
index f57c4f46fe..ce24017054 100644
--- a/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig
@@ -31,6 +31,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig
index c2741fd159..de559861d8 100644
--- a/configs/P1010RDB-PB_36BIT_NAND_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig
@@ -43,6 +43,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig
index c7920adf8e..4a1d017c83 100644
--- a/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig
@@ -30,6 +30,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig
index 619e54f0fc..eafead7a0c 100644
--- a/configs/P1010RDB-PB_36BIT_NOR_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig
@@ -29,6 +29,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
index 6a4154540d..ae6f2beb70 100644
--- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
+++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
@@ -39,6 +39,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig
index 121504d467..55d41d04b0 100644
--- a/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig
@@ -31,6 +31,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
index e5b1e3bbd6..fea732c2f0 100644
--- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
@@ -40,6 +40,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1010RDB-PB_NAND_SECBOOT_defconfig b/configs/P1010RDB-PB_NAND_SECBOOT_defconfig
index 7612cc2db5..f15d22de76 100644
--- a/configs/P1010RDB-PB_NAND_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_NAND_SECBOOT_defconfig
@@ -30,6 +30,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig
index eb72affff8..128147642e 100644
--- a/configs/P1010RDB-PB_NAND_defconfig
+++ b/configs/P1010RDB-PB_NAND_defconfig
@@ -42,6 +42,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1010RDB-PB_NOR_SECBOOT_defconfig b/configs/P1010RDB-PB_NOR_SECBOOT_defconfig
index f1e3a14928..1b25ba181e 100644
--- a/configs/P1010RDB-PB_NOR_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_NOR_SECBOOT_defconfig
@@ -29,6 +29,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig
index b67873ef5b..20387e23f7 100644
--- a/configs/P1010RDB-PB_NOR_defconfig
+++ b/configs/P1010RDB-PB_NOR_defconfig
@@ -28,6 +28,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig
index a60c65490b..1ef982d9de 100644
--- a/configs/P1010RDB-PB_SDCARD_defconfig
+++ b/configs/P1010RDB-PB_SDCARD_defconfig
@@ -38,6 +38,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig
index 2b22ab523a..b9abca77a0 100644
--- a/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig
@@ -30,6 +30,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig
index 15a98be54e..6c430076b6 100644
--- a/configs/P1010RDB-PB_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PB_SPIFLASH_defconfig
@@ -39,6 +39,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1020MBG-PC_36BIT_SDCARD_defconfig b/configs/P1020MBG-PC_36BIT_SDCARD_defconfig
index fc852bdf83..b489947406 100644
--- a/configs/P1020MBG-PC_36BIT_SDCARD_defconfig
+++ b/configs/P1020MBG-PC_36BIT_SDCARD_defconfig
@@ -36,6 +36,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1020MBG-PC_36BIT_defconfig b/configs/P1020MBG-PC_36BIT_defconfig
index a0e5bb3593..d7fe2888ad 100644
--- a/configs/P1020MBG-PC_36BIT_defconfig
+++ b/configs/P1020MBG-PC_36BIT_defconfig
@@ -27,6 +27,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1020MBG-PC_SDCARD_defconfig b/configs/P1020MBG-PC_SDCARD_defconfig
index e9de40830e..fc3b01b9f1 100644
--- a/configs/P1020MBG-PC_SDCARD_defconfig
+++ b/configs/P1020MBG-PC_SDCARD_defconfig
@@ -35,6 +35,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1020MBG-PC_defconfig b/configs/P1020MBG-PC_defconfig
index 7344dffb57..a059e2ed60 100644
--- a/configs/P1020MBG-PC_defconfig
+++ b/configs/P1020MBG-PC_defconfig
@@ -26,6 +26,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig
index cff7f598d9..ddd36c3936 100644
--- a/configs/P1020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig
@@ -41,6 +41,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
index 65b1a27d11..1f4aedc0f5 100644
--- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
@@ -38,6 +38,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
index 05e4dca025..758df88ec8 100644
--- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -39,6 +39,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig
index 4cd265b065..9dbecb2ce1 100644
--- a/configs/P1020RDB-PC_36BIT_defconfig
+++ b/configs/P1020RDB-PC_36BIT_defconfig
@@ -29,6 +29,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig
index 2dfb76272c..e7eaf8a4f7 100644
--- a/configs/P1020RDB-PC_NAND_defconfig
+++ b/configs/P1020RDB-PC_NAND_defconfig
@@ -40,6 +40,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig
index aea0ab49ff..978a729012 100644
--- a/configs/P1020RDB-PC_SDCARD_defconfig
+++ b/configs/P1020RDB-PC_SDCARD_defconfig
@@ -37,6 +37,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig
index 4722fd65fe..68dd2ea7f7 100644
--- a/configs/P1020RDB-PC_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PC_SPIFLASH_defconfig
@@ -38,6 +38,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig
index cc7ba55b57..77b3b5114d 100644
--- a/configs/P1020RDB-PC_defconfig
+++ b/configs/P1020RDB-PC_defconfig
@@ -28,6 +28,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig
index 7c0faa138d..5d904cbc31 100644
--- a/configs/P1020RDB-PD_NAND_defconfig
+++ b/configs/P1020RDB-PD_NAND_defconfig
@@ -42,6 +42,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig
index 2f0f311920..0c84642eb1 100644
--- a/configs/P1020RDB-PD_SDCARD_defconfig
+++ b/configs/P1020RDB-PD_SDCARD_defconfig
@@ -39,6 +39,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig
index b2403d80b1..c94cbbc66a 100644
--- a/configs/P1020RDB-PD_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PD_SPIFLASH_defconfig
@@ -40,6 +40,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig
index 80a1a6f2c9..74f6b36fa2 100644
--- a/configs/P1020RDB-PD_defconfig
+++ b/configs/P1020RDB-PD_defconfig
@@ -30,6 +30,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1020UTM-PC_36BIT_SDCARD_defconfig b/configs/P1020UTM-PC_36BIT_SDCARD_defconfig
index e2fc46ac72..205d9782d9 100644
--- a/configs/P1020UTM-PC_36BIT_SDCARD_defconfig
+++ b/configs/P1020UTM-PC_36BIT_SDCARD_defconfig
@@ -36,6 +36,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1020UTM-PC_36BIT_defconfig b/configs/P1020UTM-PC_36BIT_defconfig
index ab3b97631f..a3c97a51b2 100644
--- a/configs/P1020UTM-PC_36BIT_defconfig
+++ b/configs/P1020UTM-PC_36BIT_defconfig
@@ -27,6 +27,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1020UTM-PC_SDCARD_defconfig b/configs/P1020UTM-PC_SDCARD_defconfig
index 6d23d4122e..f5e2132a08 100644
--- a/configs/P1020UTM-PC_SDCARD_defconfig
+++ b/configs/P1020UTM-PC_SDCARD_defconfig
@@ -35,6 +35,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1020UTM-PC_defconfig b/configs/P1020UTM-PC_defconfig
index bbc0631a1c..262aabfbe6 100644
--- a/configs/P1020UTM-PC_defconfig
+++ b/configs/P1020UTM-PC_defconfig
@@ -26,6 +26,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1021RDB-PC_36BIT_NAND_defconfig b/configs/P1021RDB-PC_36BIT_NAND_defconfig
index 9396910a25..b37d24e7bc 100644
--- a/configs/P1021RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P1021RDB-PC_36BIT_NAND_defconfig
@@ -44,6 +44,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1021RDB-PC_36BIT_SDCARD_defconfig b/configs/P1021RDB-PC_36BIT_SDCARD_defconfig
index a51322b8d1..b28d9d2376 100644
--- a/configs/P1021RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P1021RDB-PC_36BIT_SDCARD_defconfig
@@ -41,6 +41,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig
index 5cc93ab8aa..6a9e126fb7 100644
--- a/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig
@@ -42,6 +42,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1021RDB-PC_36BIT_defconfig b/configs/P1021RDB-PC_36BIT_defconfig
index 87ae4afec4..bfc1aad17a 100644
--- a/configs/P1021RDB-PC_36BIT_defconfig
+++ b/configs/P1021RDB-PC_36BIT_defconfig
@@ -32,6 +32,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1021RDB-PC_NAND_defconfig b/configs/P1021RDB-PC_NAND_defconfig
index 72aab3be49..158e811189 100644
--- a/configs/P1021RDB-PC_NAND_defconfig
+++ b/configs/P1021RDB-PC_NAND_defconfig
@@ -43,6 +43,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1021RDB-PC_SDCARD_defconfig b/configs/P1021RDB-PC_SDCARD_defconfig
index 01c3c70575..0d9faf2362 100644
--- a/configs/P1021RDB-PC_SDCARD_defconfig
+++ b/configs/P1021RDB-PC_SDCARD_defconfig
@@ -40,6 +40,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1021RDB-PC_SPIFLASH_defconfig b/configs/P1021RDB-PC_SPIFLASH_defconfig
index 5cd0e68152..f3c0b7cfc0 100644
--- a/configs/P1021RDB-PC_SPIFLASH_defconfig
+++ b/configs/P1021RDB-PC_SPIFLASH_defconfig
@@ -41,6 +41,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1021RDB-PC_defconfig b/configs/P1021RDB-PC_defconfig
index dd165c1bc1..649106e312 100644
--- a/configs/P1021RDB-PC_defconfig
+++ b/configs/P1021RDB-PC_defconfig
@@ -31,6 +31,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1022DS_36BIT_NAND_defconfig b/configs/P1022DS_36BIT_NAND_defconfig
index e26887aca4..9544833164 100644
--- a/configs/P1022DS_36BIT_NAND_defconfig
+++ b/configs/P1022DS_36BIT_NAND_defconfig
@@ -44,6 +44,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1022DS_36BIT_SDCARD_defconfig b/configs/P1022DS_36BIT_SDCARD_defconfig
index 6c10b09174..901126a913 100644
--- a/configs/P1022DS_36BIT_SDCARD_defconfig
+++ b/configs/P1022DS_36BIT_SDCARD_defconfig
@@ -41,6 +41,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1022DS_36BIT_SPIFLASH_defconfig b/configs/P1022DS_36BIT_SPIFLASH_defconfig
index 385560cc76..9b64bcc5c5 100644
--- a/configs/P1022DS_36BIT_SPIFLASH_defconfig
+++ b/configs/P1022DS_36BIT_SPIFLASH_defconfig
@@ -42,6 +42,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1022DS_36BIT_defconfig b/configs/P1022DS_36BIT_defconfig
index 46f92040d1..b1a63ba28a 100644
--- a/configs/P1022DS_36BIT_defconfig
+++ b/configs/P1022DS_36BIT_defconfig
@@ -32,6 +32,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1022DS_NAND_defconfig b/configs/P1022DS_NAND_defconfig
index a296b8a477..62af9fce8d 100644
--- a/configs/P1022DS_NAND_defconfig
+++ b/configs/P1022DS_NAND_defconfig
@@ -43,6 +43,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1022DS_SDCARD_defconfig b/configs/P1022DS_SDCARD_defconfig
index 838487d541..419b76d117 100644
--- a/configs/P1022DS_SDCARD_defconfig
+++ b/configs/P1022DS_SDCARD_defconfig
@@ -40,6 +40,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1022DS_SPIFLASH_defconfig b/configs/P1022DS_SPIFLASH_defconfig
index 8d3a091b14..95d2d2b50c 100644
--- a/configs/P1022DS_SPIFLASH_defconfig
+++ b/configs/P1022DS_SPIFLASH_defconfig
@@ -41,6 +41,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1022DS_defconfig b/configs/P1022DS_defconfig
index 350576a46b..df0134289a 100644
--- a/configs/P1022DS_defconfig
+++ b/configs/P1022DS_defconfig
@@ -31,6 +31,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1024RDB_36BIT_defconfig b/configs/P1024RDB_36BIT_defconfig
index 00ede85381..8bab8c9d6c 100644
--- a/configs/P1024RDB_36BIT_defconfig
+++ b/configs/P1024RDB_36BIT_defconfig
@@ -29,6 +29,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1024RDB_NAND_defconfig b/configs/P1024RDB_NAND_defconfig
index a6eb7b85a9..1a8ddbb0e0 100644
--- a/configs/P1024RDB_NAND_defconfig
+++ b/configs/P1024RDB_NAND_defconfig
@@ -40,6 +40,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1024RDB_SDCARD_defconfig b/configs/P1024RDB_SDCARD_defconfig
index 0c7c326252..b8167e129d 100644
--- a/configs/P1024RDB_SDCARD_defconfig
+++ b/configs/P1024RDB_SDCARD_defconfig
@@ -37,6 +37,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1024RDB_SPIFLASH_defconfig b/configs/P1024RDB_SPIFLASH_defconfig
index 229604a60f..a911978021 100644
--- a/configs/P1024RDB_SPIFLASH_defconfig
+++ b/configs/P1024RDB_SPIFLASH_defconfig
@@ -38,6 +38,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1024RDB_defconfig b/configs/P1024RDB_defconfig
index a2179470d6..afeebfc88d 100644
--- a/configs/P1024RDB_defconfig
+++ b/configs/P1024RDB_defconfig
@@ -28,6 +28,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1025RDB_36BIT_defconfig b/configs/P1025RDB_36BIT_defconfig
index 1dabd6a5e4..34e91e46cc 100644
--- a/configs/P1025RDB_36BIT_defconfig
+++ b/configs/P1025RDB_36BIT_defconfig
@@ -31,6 +31,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1025RDB_NAND_defconfig b/configs/P1025RDB_NAND_defconfig
index 31f300e6f0..03273eaac7 100644
--- a/configs/P1025RDB_NAND_defconfig
+++ b/configs/P1025RDB_NAND_defconfig
@@ -42,6 +42,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1025RDB_SDCARD_defconfig b/configs/P1025RDB_SDCARD_defconfig
index 93801f0dcd..02fbfe633e 100644
--- a/configs/P1025RDB_SDCARD_defconfig
+++ b/configs/P1025RDB_SDCARD_defconfig
@@ -39,6 +39,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1025RDB_SPIFLASH_defconfig b/configs/P1025RDB_SPIFLASH_defconfig
index 63dc30508e..1b2dff18d3 100644
--- a/configs/P1025RDB_SPIFLASH_defconfig
+++ b/configs/P1025RDB_SPIFLASH_defconfig
@@ -40,6 +40,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P1025RDB_defconfig b/configs/P1025RDB_defconfig
index c35c988855..28408565cb 100644
--- a/configs/P1025RDB_defconfig
+++ b/configs/P1025RDB_defconfig
@@ -30,6 +30,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig
index 0193ea3f71..8fa18756e2 100644
--- a/configs/P2020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig
@@ -44,6 +44,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
index 0c396be014..76f8210146 100644
--- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
@@ -41,6 +41,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
index 8d16310813..1edb833e7b 100644
--- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -42,6 +42,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig
index 25c929c81a..293a5949b9 100644
--- a/configs/P2020RDB-PC_36BIT_defconfig
+++ b/configs/P2020RDB-PC_36BIT_defconfig
@@ -32,6 +32,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig
index 06960ce39a..19840f387b 100644
--- a/configs/P2020RDB-PC_NAND_defconfig
+++ b/configs/P2020RDB-PC_NAND_defconfig
@@ -43,6 +43,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig
index cedb4a8ca2..cd59ac9ff9 100644
--- a/configs/P2020RDB-PC_SDCARD_defconfig
+++ b/configs/P2020RDB-PC_SDCARD_defconfig
@@ -40,6 +40,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig
index 9bc909b922..44491b51ca 100644
--- a/configs/P2020RDB-PC_SPIFLASH_defconfig
+++ b/configs/P2020RDB-PC_SPIFLASH_defconfig
@@ -41,6 +41,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig
index 10c00491fa..06ba029f4e 100644
--- a/configs/P2020RDB-PC_defconfig
+++ b/configs/P2020RDB-PC_defconfig
@@ -31,6 +31,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P2041RDB_NAND_defconfig b/configs/P2041RDB_NAND_defconfig
index 64484b5ef9..7cb5d82565 100644
--- a/configs/P2041RDB_NAND_defconfig
+++ b/configs/P2041RDB_NAND_defconfig
@@ -30,6 +30,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P2041RDB_SDCARD_defconfig b/configs/P2041RDB_SDCARD_defconfig
index a6e6066deb..23b5270de0 100644
--- a/configs/P2041RDB_SDCARD_defconfig
+++ b/configs/P2041RDB_SDCARD_defconfig
@@ -29,6 +29,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P2041RDB_SECURE_BOOT_defconfig b/configs/P2041RDB_SECURE_BOOT_defconfig
index 386c1b8c6e..ce56027043 100644
--- a/configs/P2041RDB_SECURE_BOOT_defconfig
+++ b/configs/P2041RDB_SECURE_BOOT_defconfig
@@ -29,6 +29,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P2041RDB_SPIFLASH_defconfig b/configs/P2041RDB_SPIFLASH_defconfig
index f1afc7767f..86cc4d7d09 100644
--- a/configs/P2041RDB_SPIFLASH_defconfig
+++ b/configs/P2041RDB_SPIFLASH_defconfig
@@ -29,6 +29,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig b/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig
index 20333cd174..55e7279ab9 100644
--- a/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig
+++ b/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig
@@ -30,6 +30,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P2041RDB_defconfig b/configs/P2041RDB_defconfig
index 5f5b89865f..2cbd536e0a 100644
--- a/configs/P2041RDB_defconfig
+++ b/configs/P2041RDB_defconfig
@@ -28,6 +28,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P3041DS_NAND_SECURE_BOOT_defconfig b/configs/P3041DS_NAND_SECURE_BOOT_defconfig
index 0139522f8e..1d8eb3e4a7 100644
--- a/configs/P3041DS_NAND_SECURE_BOOT_defconfig
+++ b/configs/P3041DS_NAND_SECURE_BOOT_defconfig
@@ -31,6 +31,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P3041DS_NAND_defconfig b/configs/P3041DS_NAND_defconfig
index eaad8aa11a..fd48b847e4 100644
--- a/configs/P3041DS_NAND_defconfig
+++ b/configs/P3041DS_NAND_defconfig
@@ -30,6 +30,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P3041DS_SDCARD_defconfig b/configs/P3041DS_SDCARD_defconfig
index fda997c9a4..e7b7d1ac25 100644
--- a/configs/P3041DS_SDCARD_defconfig
+++ b/configs/P3041DS_SDCARD_defconfig
@@ -29,6 +29,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P3041DS_SECURE_BOOT_defconfig b/configs/P3041DS_SECURE_BOOT_defconfig
index 5bf425f728..b83800cd55 100644
--- a/configs/P3041DS_SECURE_BOOT_defconfig
+++ b/configs/P3041DS_SECURE_BOOT_defconfig
@@ -29,6 +29,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P3041DS_SPIFLASH_defconfig b/configs/P3041DS_SPIFLASH_defconfig
index 1de4fe1425..dccffcaeb7 100644
--- a/configs/P3041DS_SPIFLASH_defconfig
+++ b/configs/P3041DS_SPIFLASH_defconfig
@@ -29,6 +29,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P3041DS_SRIO_PCIE_BOOT_defconfig b/configs/P3041DS_SRIO_PCIE_BOOT_defconfig
index eaad4abe0c..fb6c4eb31a 100644
--- a/configs/P3041DS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/P3041DS_SRIO_PCIE_BOOT_defconfig
@@ -30,6 +30,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P3041DS_defconfig b/configs/P3041DS_defconfig
index 823dfe392f..0d93380f75 100644
--- a/configs/P3041DS_defconfig
+++ b/configs/P3041DS_defconfig
@@ -28,6 +28,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P4080DS_SDCARD_defconfig b/configs/P4080DS_SDCARD_defconfig
index e5b0273a40..1f31c44bee 100644
--- a/configs/P4080DS_SDCARD_defconfig
+++ b/configs/P4080DS_SDCARD_defconfig
@@ -29,6 +29,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P4080DS_SECURE_BOOT_defconfig b/configs/P4080DS_SECURE_BOOT_defconfig
index 97f05b5394..80e3a610d4 100644
--- a/configs/P4080DS_SECURE_BOOT_defconfig
+++ b/configs/P4080DS_SECURE_BOOT_defconfig
@@ -29,6 +29,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P4080DS_SPIFLASH_defconfig b/configs/P4080DS_SPIFLASH_defconfig
index 780a36fe60..f4326db8c5 100644
--- a/configs/P4080DS_SPIFLASH_defconfig
+++ b/configs/P4080DS_SPIFLASH_defconfig
@@ -29,6 +29,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P4080DS_SRIO_PCIE_BOOT_defconfig b/configs/P4080DS_SRIO_PCIE_BOOT_defconfig
index 117e2f6ee6..ee2308825a 100644
--- a/configs/P4080DS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/P4080DS_SRIO_PCIE_BOOT_defconfig
@@ -30,6 +30,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P4080DS_defconfig b/configs/P4080DS_defconfig
index be70a3601c..6235bef19a 100644
--- a/configs/P4080DS_defconfig
+++ b/configs/P4080DS_defconfig
@@ -28,6 +28,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P5020DS_NAND_SECURE_BOOT_defconfig b/configs/P5020DS_NAND_SECURE_BOOT_defconfig
index 40924af48a..33d8af5b20 100644
--- a/configs/P5020DS_NAND_SECURE_BOOT_defconfig
+++ b/configs/P5020DS_NAND_SECURE_BOOT_defconfig
@@ -32,6 +32,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P5020DS_NAND_defconfig b/configs/P5020DS_NAND_defconfig
index b5f9ec4e35..7c1600ebb2 100644
--- a/configs/P5020DS_NAND_defconfig
+++ b/configs/P5020DS_NAND_defconfig
@@ -31,6 +31,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P5020DS_SDCARD_defconfig b/configs/P5020DS_SDCARD_defconfig
index d7dfd16b57..161e9b2dbe 100644
--- a/configs/P5020DS_SDCARD_defconfig
+++ b/configs/P5020DS_SDCARD_defconfig
@@ -30,6 +30,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P5020DS_SECURE_BOOT_defconfig b/configs/P5020DS_SECURE_BOOT_defconfig
index 20bad18876..01238e8776 100644
--- a/configs/P5020DS_SECURE_BOOT_defconfig
+++ b/configs/P5020DS_SECURE_BOOT_defconfig
@@ -30,6 +30,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P5020DS_SPIFLASH_defconfig b/configs/P5020DS_SPIFLASH_defconfig
index 97511d839a..752ab4f050 100644
--- a/configs/P5020DS_SPIFLASH_defconfig
+++ b/configs/P5020DS_SPIFLASH_defconfig
@@ -30,6 +30,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P5020DS_SRIO_PCIE_BOOT_defconfig b/configs/P5020DS_SRIO_PCIE_BOOT_defconfig
index ba75e95f7f..a5f8bd1b0b 100644
--- a/configs/P5020DS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/P5020DS_SRIO_PCIE_BOOT_defconfig
@@ -31,6 +31,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P5020DS_defconfig b/configs/P5020DS_defconfig
index a9e9cfe35f..387006f412 100644
--- a/configs/P5020DS_defconfig
+++ b/configs/P5020DS_defconfig
@@ -29,6 +29,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P5040DS_NAND_SECURE_BOOT_defconfig b/configs/P5040DS_NAND_SECURE_BOOT_defconfig
index 3b7934c0e6..246a63636a 100644
--- a/configs/P5040DS_NAND_SECURE_BOOT_defconfig
+++ b/configs/P5040DS_NAND_SECURE_BOOT_defconfig
@@ -32,6 +32,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P5040DS_NAND_defconfig b/configs/P5040DS_NAND_defconfig
index eef6e5542a..2200d97b0f 100644
--- a/configs/P5040DS_NAND_defconfig
+++ b/configs/P5040DS_NAND_defconfig
@@ -31,6 +31,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P5040DS_SDCARD_defconfig b/configs/P5040DS_SDCARD_defconfig
index be18f60f23..76ebeae314 100644
--- a/configs/P5040DS_SDCARD_defconfig
+++ b/configs/P5040DS_SDCARD_defconfig
@@ -30,6 +30,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P5040DS_SECURE_BOOT_defconfig b/configs/P5040DS_SECURE_BOOT_defconfig
index 814a9a2ee7..80d72f4aa4 100644
--- a/configs/P5040DS_SECURE_BOOT_defconfig
+++ b/configs/P5040DS_SECURE_BOOT_defconfig
@@ -30,6 +30,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P5040DS_SPIFLASH_defconfig b/configs/P5040DS_SPIFLASH_defconfig
index d42bd4c8f2..710e6a675b 100644
--- a/configs/P5040DS_SPIFLASH_defconfig
+++ b/configs/P5040DS_SPIFLASH_defconfig
@@ -30,6 +30,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/P5040DS_defconfig b/configs/P5040DS_defconfig
index 4cfca6f61d..80e914d00b 100644
--- a/configs/P5040DS_defconfig
+++ b/configs/P5040DS_defconfig
@@ -29,6 +29,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T1023RDB_NAND_defconfig b/configs/T1023RDB_NAND_defconfig
index 53c5d40bda..576ded4432 100644
--- a/configs/T1023RDB_NAND_defconfig
+++ b/configs/T1023RDB_NAND_defconfig
@@ -45,6 +45,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T1023RDB_SDCARD_defconfig b/configs/T1023RDB_SDCARD_defconfig
index 057b7353c4..989dc6198b 100644
--- a/configs/T1023RDB_SDCARD_defconfig
+++ b/configs/T1023RDB_SDCARD_defconfig
@@ -44,6 +44,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T1023RDB_SECURE_BOOT_defconfig b/configs/T1023RDB_SECURE_BOOT_defconfig
index 02dc739da7..2d93a8c31f 100644
--- a/configs/T1023RDB_SECURE_BOOT_defconfig
+++ b/configs/T1023RDB_SECURE_BOOT_defconfig
@@ -33,6 +33,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T1023RDB_SPIFLASH_defconfig b/configs/T1023RDB_SPIFLASH_defconfig
index 9c65d574ee..4c6dbe94a9 100644
--- a/configs/T1023RDB_SPIFLASH_defconfig
+++ b/configs/T1023RDB_SPIFLASH_defconfig
@@ -45,6 +45,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T1023RDB_defconfig b/configs/T1023RDB_defconfig
index 21639186bc..248c13edbc 100644
--- a/configs/T1023RDB_defconfig
+++ b/configs/T1023RDB_defconfig
@@ -32,6 +32,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig b/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig
index a7959cc542..0536db9986 100644
--- a/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig
+++ b/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig
@@ -38,6 +38,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T1024QDS_DDR4_defconfig b/configs/T1024QDS_DDR4_defconfig
index a358b3455c..58912a6779 100644
--- a/configs/T1024QDS_DDR4_defconfig
+++ b/configs/T1024QDS_DDR4_defconfig
@@ -34,6 +34,7 @@ CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T1024QDS_NAND_defconfig b/configs/T1024QDS_NAND_defconfig
index f5b350b092..5abfa03148 100644
--- a/configs/T1024QDS_NAND_defconfig
+++ b/configs/T1024QDS_NAND_defconfig
@@ -49,6 +49,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T1024QDS_SDCARD_defconfig b/configs/T1024QDS_SDCARD_defconfig
index 358248a914..b1b8a90e9a 100644
--- a/configs/T1024QDS_SDCARD_defconfig
+++ b/configs/T1024QDS_SDCARD_defconfig
@@ -48,6 +48,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T1024QDS_SECURE_BOOT_defconfig b/configs/T1024QDS_SECURE_BOOT_defconfig
index 25655e297d..fdfac63a0e 100644
--- a/configs/T1024QDS_SECURE_BOOT_defconfig
+++ b/configs/T1024QDS_SECURE_BOOT_defconfig
@@ -39,6 +39,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T1024QDS_SPIFLASH_defconfig b/configs/T1024QDS_SPIFLASH_defconfig
index d3cb1f402d..7f24b5ca91 100644
--- a/configs/T1024QDS_SPIFLASH_defconfig
+++ b/configs/T1024QDS_SPIFLASH_defconfig
@@ -49,6 +49,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T1024QDS_defconfig b/configs/T1024QDS_defconfig
index 96edb3ae68..0a455aaa64 100644
--- a/configs/T1024QDS_defconfig
+++ b/configs/T1024QDS_defconfig
@@ -38,6 +38,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig
index 581316dbd8..e260f3179c 100644
--- a/configs/T1024RDB_NAND_defconfig
+++ b/configs/T1024RDB_NAND_defconfig
@@ -45,6 +45,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig
index f60e01c800..4e473e2ce5 100644
--- a/configs/T1024RDB_SDCARD_defconfig
+++ b/configs/T1024RDB_SDCARD_defconfig
@@ -44,6 +44,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T1024RDB_SECURE_BOOT_defconfig b/configs/T1024RDB_SECURE_BOOT_defconfig
index ef7f2e6baa..c9bcec95a2 100644
--- a/configs/T1024RDB_SECURE_BOOT_defconfig
+++ b/configs/T1024RDB_SECURE_BOOT_defconfig
@@ -35,6 +35,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig
index 4b0c80a9b9..c26d5a063a 100644
--- a/configs/T1024RDB_SPIFLASH_defconfig
+++ b/configs/T1024RDB_SPIFLASH_defconfig
@@ -45,6 +45,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T1024RDB_defconfig b/configs/T1024RDB_defconfig
index 53ff662bbd..3e7b0162aa 100644
--- a/configs/T1024RDB_defconfig
+++ b/configs/T1024RDB_defconfig
@@ -34,6 +34,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T1040D4RDB_NAND_defconfig b/configs/T1040D4RDB_NAND_defconfig
index d440dd0e7e..d972921fa6 100644
--- a/configs/T1040D4RDB_NAND_defconfig
+++ b/configs/T1040D4RDB_NAND_defconfig
@@ -43,6 +43,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T1040D4RDB_SDCARD_defconfig b/configs/T1040D4RDB_SDCARD_defconfig
index 82d9c4d708..9bfd5cc1e3 100644
--- a/configs/T1040D4RDB_SDCARD_defconfig
+++ b/configs/T1040D4RDB_SDCARD_defconfig
@@ -42,6 +42,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T1040D4RDB_SECURE_BOOT_defconfig b/configs/T1040D4RDB_SECURE_BOOT_defconfig
index e9eceaa536..709aa8fa04 100644
--- a/configs/T1040D4RDB_SECURE_BOOT_defconfig
+++ b/configs/T1040D4RDB_SECURE_BOOT_defconfig
@@ -33,6 +33,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T1040D4RDB_SPIFLASH_defconfig b/configs/T1040D4RDB_SPIFLASH_defconfig
index 0496f0584e..e60e878797 100644
--- a/configs/T1040D4RDB_SPIFLASH_defconfig
+++ b/configs/T1040D4RDB_SPIFLASH_defconfig
@@ -43,6 +43,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T1040D4RDB_defconfig b/configs/T1040D4RDB_defconfig
index d6fa198896..6b627d43fe 100644
--- a/configs/T1040D4RDB_defconfig
+++ b/configs/T1040D4RDB_defconfig
@@ -32,6 +32,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T1040QDS_DDR4_defconfig b/configs/T1040QDS_DDR4_defconfig
index 6baef6af28..e9c55a0f4c 100644
--- a/configs/T1040QDS_DDR4_defconfig
+++ b/configs/T1040QDS_DDR4_defconfig
@@ -38,6 +38,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T1040QDS_SECURE_BOOT_defconfig b/configs/T1040QDS_SECURE_BOOT_defconfig
index dfb58906a0..7f9e29e5ed 100644
--- a/configs/T1040QDS_SECURE_BOOT_defconfig
+++ b/configs/T1040QDS_SECURE_BOOT_defconfig
@@ -40,6 +40,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T1040QDS_defconfig b/configs/T1040QDS_defconfig
index 7ba223daa1..55687072c9 100644
--- a/configs/T1040QDS_defconfig
+++ b/configs/T1040QDS_defconfig
@@ -39,6 +39,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T1040RDB_NAND_defconfig b/configs/T1040RDB_NAND_defconfig
index 6d4dbb67b4..6e0e6662eb 100644
--- a/configs/T1040RDB_NAND_defconfig
+++ b/configs/T1040RDB_NAND_defconfig
@@ -44,6 +44,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T1040RDB_SDCARD_defconfig b/configs/T1040RDB_SDCARD_defconfig
index 5dedd664c9..036d192dc2 100644
--- a/configs/T1040RDB_SDCARD_defconfig
+++ b/configs/T1040RDB_SDCARD_defconfig
@@ -43,6 +43,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T1040RDB_SECURE_BOOT_defconfig b/configs/T1040RDB_SECURE_BOOT_defconfig
index 79dbd7616c..7010de968a 100644
--- a/configs/T1040RDB_SECURE_BOOT_defconfig
+++ b/configs/T1040RDB_SECURE_BOOT_defconfig
@@ -34,6 +34,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T1040RDB_SPIFLASH_defconfig b/configs/T1040RDB_SPIFLASH_defconfig
index 9560a22bae..d17ac7e2eb 100644
--- a/configs/T1040RDB_SPIFLASH_defconfig
+++ b/configs/T1040RDB_SPIFLASH_defconfig
@@ -44,6 +44,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T1040RDB_defconfig b/configs/T1040RDB_defconfig
index acf4a680c0..62d8258a82 100644
--- a/configs/T1040RDB_defconfig
+++ b/configs/T1040RDB_defconfig
@@ -33,6 +33,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig
index 2803076b7e..7e2f7ac9a9 100644
--- a/configs/T1042D4RDB_NAND_defconfig
+++ b/configs/T1042D4RDB_NAND_defconfig
@@ -45,6 +45,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig
index 20ff856df2..f0fff76556 100644
--- a/configs/T1042D4RDB_SDCARD_defconfig
+++ b/configs/T1042D4RDB_SDCARD_defconfig
@@ -44,6 +44,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T1042D4RDB_SECURE_BOOT_defconfig b/configs/T1042D4RDB_SECURE_BOOT_defconfig
index 25f0b01461..8ad3da3cdb 100644
--- a/configs/T1042D4RDB_SECURE_BOOT_defconfig
+++ b/configs/T1042D4RDB_SECURE_BOOT_defconfig
@@ -35,6 +35,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig
index 2abae0d188..f065569922 100644
--- a/configs/T1042D4RDB_SPIFLASH_defconfig
+++ b/configs/T1042D4RDB_SPIFLASH_defconfig
@@ -45,6 +45,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig
index 2c6be3661b..9c72cef7cc 100644
--- a/configs/T1042D4RDB_defconfig
+++ b/configs/T1042D4RDB_defconfig
@@ -34,6 +34,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig b/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig
index b0e72ab4af..f678dad0f1 100644
--- a/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig
+++ b/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig
@@ -50,6 +50,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T1042RDB_PI_NAND_defconfig b/configs/T1042RDB_PI_NAND_defconfig
index 37eab806a2..09dbd6cdaf 100644
--- a/configs/T1042RDB_PI_NAND_defconfig
+++ b/configs/T1042RDB_PI_NAND_defconfig
@@ -47,6 +47,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T1042RDB_PI_SDCARD_defconfig b/configs/T1042RDB_PI_SDCARD_defconfig
index a45168abcb..a3e730e380 100644
--- a/configs/T1042RDB_PI_SDCARD_defconfig
+++ b/configs/T1042RDB_PI_SDCARD_defconfig
@@ -46,6 +46,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T1042RDB_PI_SPIFLASH_defconfig b/configs/T1042RDB_PI_SPIFLASH_defconfig
index 2aea77f06e..f834aa898e 100644
--- a/configs/T1042RDB_PI_SPIFLASH_defconfig
+++ b/configs/T1042RDB_PI_SPIFLASH_defconfig
@@ -47,6 +47,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T1042RDB_PI_defconfig b/configs/T1042RDB_PI_defconfig
index 8f05033b21..cb07c2bb9c 100644
--- a/configs/T1042RDB_PI_defconfig
+++ b/configs/T1042RDB_PI_defconfig
@@ -36,6 +36,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T1042RDB_SECURE_BOOT_defconfig b/configs/T1042RDB_SECURE_BOOT_defconfig
index b2f6dd34dd..e308be77cc 100644
--- a/configs/T1042RDB_SECURE_BOOT_defconfig
+++ b/configs/T1042RDB_SECURE_BOOT_defconfig
@@ -33,6 +33,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T1042RDB_defconfig b/configs/T1042RDB_defconfig
index 781881d220..b1245cd1b1 100644
--- a/configs/T1042RDB_defconfig
+++ b/configs/T1042RDB_defconfig
@@ -32,6 +32,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig
index b2905d8331..6d9de5175b 100644
--- a/configs/T2080QDS_NAND_defconfig
+++ b/configs/T2080QDS_NAND_defconfig
@@ -42,6 +42,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig
index f422d41bf1..dfdae71b84 100644
--- a/configs/T2080QDS_SDCARD_defconfig
+++ b/configs/T2080QDS_SDCARD_defconfig
@@ -41,6 +41,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig
index 1ab33f7754..ed02513057 100644
--- a/configs/T2080QDS_SECURE_BOOT_defconfig
+++ b/configs/T2080QDS_SECURE_BOOT_defconfig
@@ -32,6 +32,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig
index 9f9dfb164d..396b9ec7bc 100644
--- a/configs/T2080QDS_SPIFLASH_defconfig
+++ b/configs/T2080QDS_SPIFLASH_defconfig
@@ -42,6 +42,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
index 51fc4f32c9..0a2189e41d 100644
--- a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
@@ -31,6 +31,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig
index 6fd7199b05..b97bbf6715 100644
--- a/configs/T2080QDS_defconfig
+++ b/configs/T2080QDS_defconfig
@@ -31,6 +31,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig
index 6482bd0661..540eb9a5a4 100644
--- a/configs/T2080RDB_NAND_defconfig
+++ b/configs/T2080RDB_NAND_defconfig
@@ -41,6 +41,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig
index ac64be5143..a0d23d09c8 100644
--- a/configs/T2080RDB_SDCARD_defconfig
+++ b/configs/T2080RDB_SDCARD_defconfig
@@ -40,6 +40,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T2080RDB_SECURE_BOOT_defconfig b/configs/T2080RDB_SECURE_BOOT_defconfig
index 670ec89259..8820819af7 100644
--- a/configs/T2080RDB_SECURE_BOOT_defconfig
+++ b/configs/T2080RDB_SECURE_BOOT_defconfig
@@ -31,6 +31,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig
index 073f7e9e84..898d8056ac 100644
--- a/configs/T2080RDB_SPIFLASH_defconfig
+++ b/configs/T2080RDB_SPIFLASH_defconfig
@@ -41,6 +41,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T2080RDB_SRIO_PCIE_BOOT_defconfig b/configs/T2080RDB_SRIO_PCIE_BOOT_defconfig
index 7475af761a..a495e37618 100644
--- a/configs/T2080RDB_SRIO_PCIE_BOOT_defconfig
+++ b/configs/T2080RDB_SRIO_PCIE_BOOT_defconfig
@@ -30,6 +30,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T2080RDB_defconfig b/configs/T2080RDB_defconfig
index 7f6baa8927..f638f1b94a 100644
--- a/configs/T2080RDB_defconfig
+++ b/configs/T2080RDB_defconfig
@@ -30,6 +30,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T2081QDS_NAND_defconfig b/configs/T2081QDS_NAND_defconfig
index 168b17e39b..b96f556f09 100644
--- a/configs/T2081QDS_NAND_defconfig
+++ b/configs/T2081QDS_NAND_defconfig
@@ -42,6 +42,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T2081QDS_SDCARD_defconfig b/configs/T2081QDS_SDCARD_defconfig
index 17e90deeb4..4c340fe2f5 100644
--- a/configs/T2081QDS_SDCARD_defconfig
+++ b/configs/T2081QDS_SDCARD_defconfig
@@ -41,6 +41,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T2081QDS_SPIFLASH_defconfig b/configs/T2081QDS_SPIFLASH_defconfig
index f268c7ef35..2f77808eec 100644
--- a/configs/T2081QDS_SPIFLASH_defconfig
+++ b/configs/T2081QDS_SPIFLASH_defconfig
@@ -42,6 +42,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig
index 89147b7a6c..47a6cd9f06 100644
--- a/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig
@@ -31,6 +31,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T2081QDS_defconfig b/configs/T2081QDS_defconfig
index d45df35f83..e4159451dd 100644
--- a/configs/T2081QDS_defconfig
+++ b/configs/T2081QDS_defconfig
@@ -31,6 +31,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T4160QDS_NAND_defconfig b/configs/T4160QDS_NAND_defconfig
index 9b49c3d6ab..386609c63e 100644
--- a/configs/T4160QDS_NAND_defconfig
+++ b/configs/T4160QDS_NAND_defconfig
@@ -38,6 +38,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T4160QDS_SDCARD_defconfig b/configs/T4160QDS_SDCARD_defconfig
index e4b0912d87..bea43d8f42 100644
--- a/configs/T4160QDS_SDCARD_defconfig
+++ b/configs/T4160QDS_SDCARD_defconfig
@@ -37,6 +37,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T4160QDS_SECURE_BOOT_defconfig b/configs/T4160QDS_SECURE_BOOT_defconfig
index 1d13bcfce3..069b57fcb3 100644
--- a/configs/T4160QDS_SECURE_BOOT_defconfig
+++ b/configs/T4160QDS_SECURE_BOOT_defconfig
@@ -28,6 +28,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T4160QDS_defconfig b/configs/T4160QDS_defconfig
index a9df2ad322..b697253ef6 100644
--- a/configs/T4160QDS_defconfig
+++ b/configs/T4160QDS_defconfig
@@ -27,6 +27,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T4160RDB_defconfig b/configs/T4160RDB_defconfig
index 11424912ad..f16b2a6cf2 100644
--- a/configs/T4160RDB_defconfig
+++ b/configs/T4160RDB_defconfig
@@ -27,6 +27,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T4240QDS_NAND_defconfig b/configs/T4240QDS_NAND_defconfig
index 8552b81ee3..6e42e1c271 100644
--- a/configs/T4240QDS_NAND_defconfig
+++ b/configs/T4240QDS_NAND_defconfig
@@ -38,6 +38,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T4240QDS_SDCARD_defconfig b/configs/T4240QDS_SDCARD_defconfig
index 6f0fcf261b..ccc24eed1b 100644
--- a/configs/T4240QDS_SDCARD_defconfig
+++ b/configs/T4240QDS_SDCARD_defconfig
@@ -37,6 +37,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T4240QDS_SECURE_BOOT_defconfig b/configs/T4240QDS_SECURE_BOOT_defconfig
index 367ca86384..f0088633af 100644
--- a/configs/T4240QDS_SECURE_BOOT_defconfig
+++ b/configs/T4240QDS_SECURE_BOOT_defconfig
@@ -28,6 +28,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T4240QDS_SRIO_PCIE_BOOT_defconfig b/configs/T4240QDS_SRIO_PCIE_BOOT_defconfig
index 43320b5f4e..f1eeca7af1 100644
--- a/configs/T4240QDS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/T4240QDS_SRIO_PCIE_BOOT_defconfig
@@ -29,6 +29,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T4240QDS_defconfig b/configs/T4240QDS_defconfig
index d4d2cafff2..72a879950a 100644
--- a/configs/T4240QDS_defconfig
+++ b/configs/T4240QDS_defconfig
@@ -27,6 +27,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig
index 18364a661a..c0fc356f19 100644
--- a/configs/T4240RDB_SDCARD_defconfig
+++ b/configs/T4240RDB_SDCARD_defconfig
@@ -37,6 +37,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/T4240RDB_defconfig b/configs/T4240RDB_defconfig
index e90208043f..3750e02378 100644
--- a/configs/T4240RDB_defconfig
+++ b/configs/T4240RDB_defconfig
@@ -27,6 +27,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/TWR-P1025_defconfig b/configs/TWR-P1025_defconfig
index fc83a03036..3262f89c41 100644
--- a/configs/TWR-P1025_defconfig
+++ b/configs/TWR-P1025_defconfig
@@ -30,6 +30,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/UCP1020_SPIFLASH_defconfig b/configs/UCP1020_SPIFLASH_defconfig
index ac949f7b6a..786529fe31 100644
--- a/configs/UCP1020_SPIFLASH_defconfig
+++ b/configs/UCP1020_SPIFLASH_defconfig
@@ -38,6 +38,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/UCP1020_defconfig b/configs/UCP1020_defconfig
index 4b81cb437f..d562581fba 100644
--- a/configs/UCP1020_defconfig
+++ b/configs/UCP1020_defconfig
@@ -38,6 +38,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/adp-ae3xx_defconfig b/configs/adp-ae3xx_defconfig
index 6b5093fe59..b79281c991 100644
--- a/configs/adp-ae3xx_defconfig
+++ b/configs/adp-ae3xx_defconfig
@@ -25,6 +25,7 @@ CONFIG_FTMAC100=y
 CONFIG_BAUDRATE=38400
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_ATCSPI200_SPI=y
 CONFIG_TIMER=y
diff --git a/configs/alt_defconfig b/configs/alt_defconfig
index ef4b109337..53032f0007 100644
--- a/configs/alt_defconfig
+++ b/configs/alt_defconfig
@@ -41,6 +41,7 @@ CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
 CONFIG_BAUDRATE=38400
 CONFIG_SCIF_CONSOLE=y
+CONFIG_SPI=y
 CONFIG_SH_QSPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/am335x_baltos_defconfig b/configs/am335x_baltos_defconfig
index 1f328aacb8..3ef3fff5ea 100644
--- a/configs/am335x_baltos_defconfig
+++ b/configs/am335x_baltos_defconfig
@@ -53,6 +53,7 @@ CONFIG_NAND=y
 CONFIG_NAND_OMAP_GPMC_PREFETCH=y
 CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_HOST=y
diff --git a/configs/am335x_boneblack_defconfig b/configs/am335x_boneblack_defconfig
index b8526fc15e..befd930ca7 100644
--- a/configs/am335x_boneblack_defconfig
+++ b/configs/am335x_boneblack_defconfig
@@ -32,6 +32,7 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_HOST=y
diff --git a/configs/am335x_boneblack_vboot_defconfig b/configs/am335x_boneblack_vboot_defconfig
index 0a239bb733..a69d9685c3 100644
--- a/configs/am335x_boneblack_vboot_defconfig
+++ b/configs/am335x_boneblack_vboot_defconfig
@@ -40,6 +40,7 @@ CONFIG_PHYLIB=y
 CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_TIMER=y
 CONFIG_OMAP_TIMER=y
diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig
index 4c3aacbced..44157f0b89 100644
--- a/configs/am335x_evm_defconfig
+++ b/configs/am335x_evm_defconfig
@@ -41,6 +41,7 @@ CONFIG_PHYLIB=y
 CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_TIMER=y
 CONFIG_OMAP_TIMER=y
diff --git a/configs/am335x_evm_nor_defconfig b/configs/am335x_evm_nor_defconfig
index f68fbd9d29..80d5c9f20c 100644
--- a/configs/am335x_evm_nor_defconfig
+++ b/configs/am335x_evm_nor_defconfig
@@ -32,6 +32,7 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_HOST=y
diff --git a/configs/am335x_evm_norboot_defconfig b/configs/am335x_evm_norboot_defconfig
index 97205a94f0..5fdaf0ee9d 100644
--- a/configs/am335x_evm_norboot_defconfig
+++ b/configs/am335x_evm_norboot_defconfig
@@ -26,6 +26,7 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_HOST=y
diff --git a/configs/am335x_evm_spiboot_defconfig b/configs/am335x_evm_spiboot_defconfig
index 29757657d5..48f4d69521 100644
--- a/configs/am335x_evm_spiboot_defconfig
+++ b/configs/am335x_evm_spiboot_defconfig
@@ -30,6 +30,7 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_HOST=y
diff --git a/configs/am335x_evm_usbspl_defconfig b/configs/am335x_evm_usbspl_defconfig
index e6d83accab..cf4f52bfa9 100644
--- a/configs/am335x_evm_usbspl_defconfig
+++ b/configs/am335x_evm_usbspl_defconfig
@@ -36,6 +36,7 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_HOST=y
diff --git a/configs/am335x_hs_evm_defconfig b/configs/am335x_hs_evm_defconfig
index dab5ba510d..169650ad1f 100644
--- a/configs/am335x_hs_evm_defconfig
+++ b/configs/am335x_hs_evm_defconfig
@@ -45,6 +45,7 @@ CONFIG_PHYLIB=y
 CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_TIMER=y
 CONFIG_OMAP_TIMER=y
diff --git a/configs/am335x_hs_evm_uart_defconfig b/configs/am335x_hs_evm_uart_defconfig
index 4e5f64961e..3b8a24c6f3 100644
--- a/configs/am335x_hs_evm_uart_defconfig
+++ b/configs/am335x_hs_evm_uart_defconfig
@@ -44,6 +44,7 @@ CONFIG_PHYLIB=y
 CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_TIMER=y
 CONFIG_OMAP_TIMER=y
diff --git a/configs/am335x_igep003x_defconfig b/configs/am335x_igep003x_defconfig
index 39ebcec910..2a177ea41d 100644
--- a/configs/am335x_igep003x_defconfig
+++ b/configs/am335x_igep003x_defconfig
@@ -57,6 +57,7 @@ CONFIG_NAND=y
 CONFIG_MTD_UBI_FASTMAP=y
 CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_FAT_WRITE=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/am335x_shc_defconfig b/configs/am335x_shc_defconfig
index 391155924e..65d1a74168 100644
--- a/configs/am335x_shc_defconfig
+++ b/configs/am335x_shc_defconfig
@@ -42,6 +42,7 @@ CONFIG_ENV_IS_IN_MMC=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_FAT_WRITE=y
 CONFIG_LZO=y
diff --git a/configs/am335x_shc_ict_defconfig b/configs/am335x_shc_ict_defconfig
index 7915e85c13..1fbb4f7857 100644
--- a/configs/am335x_shc_ict_defconfig
+++ b/configs/am335x_shc_ict_defconfig
@@ -42,6 +42,7 @@ CONFIG_ENV_IS_IN_MMC=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_FAT_WRITE=y
 CONFIG_LZO=y
diff --git a/configs/am335x_shc_netboot_defconfig b/configs/am335x_shc_netboot_defconfig
index 131e70317f..8e9ae1983c 100644
--- a/configs/am335x_shc_netboot_defconfig
+++ b/configs/am335x_shc_netboot_defconfig
@@ -43,6 +43,7 @@ CONFIG_ENV_IS_IN_MMC=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_FAT_WRITE=y
 CONFIG_LZO=y
diff --git a/configs/am335x_shc_prompt_defconfig b/configs/am335x_shc_prompt_defconfig
index 7a9b847cf7..7563bcbe4b 100644
--- a/configs/am335x_shc_prompt_defconfig
+++ b/configs/am335x_shc_prompt_defconfig
@@ -40,6 +40,7 @@ CONFIG_ENV_IS_IN_MMC=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_FAT_WRITE=y
 CONFIG_LZO=y
diff --git a/configs/am335x_shc_sdboot_defconfig b/configs/am335x_shc_sdboot_defconfig
index 06e848e50e..66b2c635b3 100644
--- a/configs/am335x_shc_sdboot_defconfig
+++ b/configs/am335x_shc_sdboot_defconfig
@@ -42,6 +42,7 @@ CONFIG_ENV_IS_IN_MMC=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_FAT_WRITE=y
 CONFIG_LZO=y
diff --git a/configs/am335x_shc_sdboot_prompt_defconfig b/configs/am335x_shc_sdboot_prompt_defconfig
index 06e848e50e..66b2c635b3 100644
--- a/configs/am335x_shc_sdboot_prompt_defconfig
+++ b/configs/am335x_shc_sdboot_prompt_defconfig
@@ -42,6 +42,7 @@ CONFIG_ENV_IS_IN_MMC=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_FAT_WRITE=y
 CONFIG_LZO=y
diff --git a/configs/am335x_sl50_defconfig b/configs/am335x_sl50_defconfig
index a39ff702a5..35ef4d4d9c 100644
--- a/configs/am335x_sl50_defconfig
+++ b/configs/am335x_sl50_defconfig
@@ -44,6 +44,7 @@ CONFIG_ENV_IS_IN_MMC=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_FAT_WRITE=y
 CONFIG_LZO=y
diff --git a/configs/am3517_evm_defconfig b/configs/am3517_evm_defconfig
index e7c6019557..3ac39700c8 100644
--- a/configs/am3517_evm_defconfig
+++ b/configs/am3517_evm_defconfig
@@ -41,6 +41,7 @@ CONFIG_NAND_OMAP_GPMC_PREFETCH=y
 CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 CONFIG_SPL_NAND_SIMPLE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_HOST=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/am43xx_evm_defconfig b/configs/am43xx_evm_defconfig
index 15c25d39f1..bfd202129c 100644
--- a/configs/am43xx_evm_defconfig
+++ b/configs/am43xx_evm_defconfig
@@ -40,6 +40,7 @@ CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_TI_QSPI=y
 CONFIG_TIMER=y
 CONFIG_OMAP_TIMER=y
diff --git a/configs/am43xx_evm_ethboot_defconfig b/configs/am43xx_evm_ethboot_defconfig
index 6c17088868..0f5331459f 100644
--- a/configs/am43xx_evm_ethboot_defconfig
+++ b/configs/am43xx_evm_ethboot_defconfig
@@ -51,6 +51,7 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_TI_QSPI=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
diff --git a/configs/am43xx_evm_qspiboot_defconfig b/configs/am43xx_evm_qspiboot_defconfig
index fde41c5c7e..d7214b202b 100644
--- a/configs/am43xx_evm_qspiboot_defconfig
+++ b/configs/am43xx_evm_qspiboot_defconfig
@@ -42,6 +42,7 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_TI_QSPI=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
diff --git a/configs/am43xx_evm_usbhost_boot_defconfig b/configs/am43xx_evm_usbhost_boot_defconfig
index 0bed335722..e2fb65af69 100644
--- a/configs/am43xx_evm_usbhost_boot_defconfig
+++ b/configs/am43xx_evm_usbhost_boot_defconfig
@@ -63,6 +63,7 @@ CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_TI_QSPI=y
 CONFIG_TIMER=y
 CONFIG_OMAP_TIMER=y
diff --git a/configs/am43xx_hs_evm_defconfig b/configs/am43xx_hs_evm_defconfig
index a4d23e10b6..157eccf763 100644
--- a/configs/am43xx_hs_evm_defconfig
+++ b/configs/am43xx_hs_evm_defconfig
@@ -51,6 +51,7 @@ CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_TI_QSPI=y
 CONFIG_TIMER=y
 CONFIG_OMAP_TIMER=y
diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig
index 3d455eb7d4..e9cc1a039f 100644
--- a/configs/am57xx_evm_defconfig
+++ b/configs/am57xx_evm_defconfig
@@ -61,6 +61,7 @@ CONFIG_DM_REGULATOR=y
 CONFIG_DM_REGULATOR_PALMAS=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TI_QSPI=y
 CONFIG_USB=y
diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig
index 01d77cbbd0..28e23460f8 100644
--- a/configs/am57xx_hs_evm_defconfig
+++ b/configs/am57xx_hs_evm_defconfig
@@ -64,6 +64,7 @@ CONFIG_DM_REGULATOR=y
 CONFIG_DM_REGULATOR_PALMAS=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TI_QSPI=y
 CONFIG_USB=y
diff --git a/configs/ap121_defconfig b/configs/ap121_defconfig
index 62dd14752c..98deaada24 100644
--- a/configs/ap121_defconfig
+++ b/configs/ap121_defconfig
@@ -52,6 +52,7 @@ CONFIG_DEBUG_UART_BASE=0xb8020000
 CONFIG_DEBUG_UART_CLOCK=25000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_AR933X_UART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_ATH79_SPI=y
 CONFIG_LZMA=y
diff --git a/configs/ap143_defconfig b/configs/ap143_defconfig
index 143064dfc3..eb7ca5b5e5 100644
--- a/configs/ap143_defconfig
+++ b/configs/ap143_defconfig
@@ -48,6 +48,7 @@ CONFIG_DEBUG_UART_CLOCK=25000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_ATH79_SPI=y
 CONFIG_LZMA=y
diff --git a/configs/at91sam9260ek_dataflash_cs0_defconfig b/configs/at91sam9260ek_dataflash_cs0_defconfig
index cf96aa5b0a..7d9331ab9b 100644
--- a/configs/at91sam9260ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9260ek_dataflash_cs0_defconfig
@@ -49,6 +49,7 @@ CONFIG_DEBUG_UART_CLOCK=132000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/at91sam9260ek_dataflash_cs1_defconfig b/configs/at91sam9260ek_dataflash_cs1_defconfig
index baabc01c06..9a411652b0 100644
--- a/configs/at91sam9260ek_dataflash_cs1_defconfig
+++ b/configs/at91sam9260ek_dataflash_cs1_defconfig
@@ -49,6 +49,7 @@ CONFIG_DEBUG_UART_CLOCK=132000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/at91sam9260ek_nandflash_defconfig b/configs/at91sam9260ek_nandflash_defconfig
index ece3517093..53bf4008db 100644
--- a/configs/at91sam9260ek_nandflash_defconfig
+++ b/configs/at91sam9260ek_nandflash_defconfig
@@ -49,6 +49,7 @@ CONFIG_DEBUG_UART_CLOCK=132000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/at91sam9261ek_dataflash_cs0_defconfig b/configs/at91sam9261ek_dataflash_cs0_defconfig
index 0e18ed9682..c0da7ce798 100644
--- a/configs/at91sam9261ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9261ek_dataflash_cs0_defconfig
@@ -48,6 +48,7 @@ CONFIG_DEBUG_UART_CLOCK=100000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/at91sam9261ek_dataflash_cs3_defconfig b/configs/at91sam9261ek_dataflash_cs3_defconfig
index 794fd07da8..014dd3b2c1 100644
--- a/configs/at91sam9261ek_dataflash_cs3_defconfig
+++ b/configs/at91sam9261ek_dataflash_cs3_defconfig
@@ -48,6 +48,7 @@ CONFIG_DEBUG_UART_CLOCK=100000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/at91sam9261ek_nandflash_defconfig b/configs/at91sam9261ek_nandflash_defconfig
index dd8cf128f4..c47697586a 100644
--- a/configs/at91sam9261ek_nandflash_defconfig
+++ b/configs/at91sam9261ek_nandflash_defconfig
@@ -48,6 +48,7 @@ CONFIG_DEBUG_UART_CLOCK=100000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/at91sam9263ek_dataflash_cs0_defconfig b/configs/at91sam9263ek_dataflash_cs0_defconfig
index a966be701e..49d4aff4ca 100644
--- a/configs/at91sam9263ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9263ek_dataflash_cs0_defconfig
@@ -54,6 +54,7 @@ CONFIG_DEBUG_UART_CLOCK=100000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/at91sam9263ek_dataflash_defconfig b/configs/at91sam9263ek_dataflash_defconfig
index a966be701e..49d4aff4ca 100644
--- a/configs/at91sam9263ek_dataflash_defconfig
+++ b/configs/at91sam9263ek_dataflash_defconfig
@@ -54,6 +54,7 @@ CONFIG_DEBUG_UART_CLOCK=100000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/at91sam9263ek_nandflash_defconfig b/configs/at91sam9263ek_nandflash_defconfig
index a1d725afe8..7e89971564 100644
--- a/configs/at91sam9263ek_nandflash_defconfig
+++ b/configs/at91sam9263ek_nandflash_defconfig
@@ -54,6 +54,7 @@ CONFIG_DEBUG_UART_CLOCK=100000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/at91sam9263ek_norflash_boot_defconfig b/configs/at91sam9263ek_norflash_boot_defconfig
index 97215d28e5..eafa3796c2 100644
--- a/configs/at91sam9263ek_norflash_boot_defconfig
+++ b/configs/at91sam9263ek_norflash_boot_defconfig
@@ -53,6 +53,7 @@ CONFIG_DEBUG_UART_CLOCK=100000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/at91sam9263ek_norflash_defconfig b/configs/at91sam9263ek_norflash_defconfig
index 2d36bacb2c..1b0ece6a57 100644
--- a/configs/at91sam9263ek_norflash_defconfig
+++ b/configs/at91sam9263ek_norflash_defconfig
@@ -53,6 +53,7 @@ CONFIG_DEBUG_UART_CLOCK=100000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/at91sam9g10ek_dataflash_cs0_defconfig b/configs/at91sam9g10ek_dataflash_cs0_defconfig
index 44515f033a..febe933a21 100644
--- a/configs/at91sam9g10ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9g10ek_dataflash_cs0_defconfig
@@ -48,6 +48,7 @@ CONFIG_DEBUG_UART_CLOCK=100000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/at91sam9g10ek_dataflash_cs3_defconfig b/configs/at91sam9g10ek_dataflash_cs3_defconfig
index 6fc7136c7e..03a3ed0268 100644
--- a/configs/at91sam9g10ek_dataflash_cs3_defconfig
+++ b/configs/at91sam9g10ek_dataflash_cs3_defconfig
@@ -48,6 +48,7 @@ CONFIG_DEBUG_UART_CLOCK=100000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/at91sam9g10ek_nandflash_defconfig b/configs/at91sam9g10ek_nandflash_defconfig
index a24676888c..4c6e67ba5d 100644
--- a/configs/at91sam9g10ek_nandflash_defconfig
+++ b/configs/at91sam9g10ek_nandflash_defconfig
@@ -48,6 +48,7 @@ CONFIG_DEBUG_UART_CLOCK=100000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/at91sam9g20ek_2mmc_defconfig b/configs/at91sam9g20ek_2mmc_defconfig
index 2a35d62e76..d46acd5033 100644
--- a/configs/at91sam9g20ek_2mmc_defconfig
+++ b/configs/at91sam9g20ek_2mmc_defconfig
@@ -51,6 +51,7 @@ CONFIG_DEBUG_UART_CLOCK=132000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/at91sam9g20ek_2mmc_nandflash_defconfig b/configs/at91sam9g20ek_2mmc_nandflash_defconfig
index c2a9be03a5..f8de9ed649 100644
--- a/configs/at91sam9g20ek_2mmc_nandflash_defconfig
+++ b/configs/at91sam9g20ek_2mmc_nandflash_defconfig
@@ -51,6 +51,7 @@ CONFIG_DEBUG_UART_CLOCK=132000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/at91sam9g20ek_dataflash_cs0_defconfig b/configs/at91sam9g20ek_dataflash_cs0_defconfig
index 42b8a9f15c..681fabc1d0 100644
--- a/configs/at91sam9g20ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9g20ek_dataflash_cs0_defconfig
@@ -49,6 +49,7 @@ CONFIG_DEBUG_UART_CLOCK=132000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/at91sam9g20ek_dataflash_cs1_defconfig b/configs/at91sam9g20ek_dataflash_cs1_defconfig
index 7d5c152d2f..3f73ba394d 100644
--- a/configs/at91sam9g20ek_dataflash_cs1_defconfig
+++ b/configs/at91sam9g20ek_dataflash_cs1_defconfig
@@ -49,6 +49,7 @@ CONFIG_DEBUG_UART_CLOCK=132000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/at91sam9g20ek_nandflash_defconfig b/configs/at91sam9g20ek_nandflash_defconfig
index 3f7687146f..31ae3810a9 100644
--- a/configs/at91sam9g20ek_nandflash_defconfig
+++ b/configs/at91sam9g20ek_nandflash_defconfig
@@ -49,6 +49,7 @@ CONFIG_DEBUG_UART_CLOCK=132000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/at91sam9n12ek_mmc_defconfig b/configs/at91sam9n12ek_mmc_defconfig
index a14d362105..f21c490052 100644
--- a/configs/at91sam9n12ek_mmc_defconfig
+++ b/configs/at91sam9n12ek_mmc_defconfig
@@ -49,6 +49,7 @@ CONFIG_DEBUG_UART_CLOCK=132000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/at91sam9n12ek_nandflash_defconfig b/configs/at91sam9n12ek_nandflash_defconfig
index ec91c3e0cb..6acf720b5d 100644
--- a/configs/at91sam9n12ek_nandflash_defconfig
+++ b/configs/at91sam9n12ek_nandflash_defconfig
@@ -49,6 +49,7 @@ CONFIG_DEBUG_UART_CLOCK=132000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/at91sam9n12ek_spiflash_defconfig b/configs/at91sam9n12ek_spiflash_defconfig
index 9cd18144eb..bf39595986 100644
--- a/configs/at91sam9n12ek_spiflash_defconfig
+++ b/configs/at91sam9n12ek_spiflash_defconfig
@@ -49,6 +49,7 @@ CONFIG_DEBUG_UART_CLOCK=132000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/at91sam9rlek_dataflash_defconfig b/configs/at91sam9rlek_dataflash_defconfig
index b4153910a5..2c883c9460 100644
--- a/configs/at91sam9rlek_dataflash_defconfig
+++ b/configs/at91sam9rlek_dataflash_defconfig
@@ -52,6 +52,7 @@ CONFIG_DEBUG_UART_CLOCK=100000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/at91sam9rlek_mmc_defconfig b/configs/at91sam9rlek_mmc_defconfig
index 5059623f83..e6014bfc04 100644
--- a/configs/at91sam9rlek_mmc_defconfig
+++ b/configs/at91sam9rlek_mmc_defconfig
@@ -52,6 +52,7 @@ CONFIG_DEBUG_UART_CLOCK=100000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/at91sam9rlek_nandflash_defconfig b/configs/at91sam9rlek_nandflash_defconfig
index b8a187e957..ccd5a8dbef 100644
--- a/configs/at91sam9rlek_nandflash_defconfig
+++ b/configs/at91sam9rlek_nandflash_defconfig
@@ -52,6 +52,7 @@ CONFIG_DEBUG_UART_CLOCK=100000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/at91sam9x5ek_dataflash_defconfig b/configs/at91sam9x5ek_dataflash_defconfig
index 8eae3097e2..09949b332d 100644
--- a/configs/at91sam9x5ek_dataflash_defconfig
+++ b/configs/at91sam9x5ek_dataflash_defconfig
@@ -55,6 +55,7 @@ CONFIG_DEBUG_UART_CLOCK=132000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/at91sam9x5ek_mmc_defconfig b/configs/at91sam9x5ek_mmc_defconfig
index f9dc668399..b59ef57463 100644
--- a/configs/at91sam9x5ek_mmc_defconfig
+++ b/configs/at91sam9x5ek_mmc_defconfig
@@ -55,6 +55,7 @@ CONFIG_DEBUG_UART_CLOCK=132000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/at91sam9x5ek_nandflash_defconfig b/configs/at91sam9x5ek_nandflash_defconfig
index b3edbcbb11..ccb8401c16 100644
--- a/configs/at91sam9x5ek_nandflash_defconfig
+++ b/configs/at91sam9x5ek_nandflash_defconfig
@@ -55,6 +55,7 @@ CONFIG_DEBUG_UART_CLOCK=132000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/at91sam9x5ek_spiflash_defconfig b/configs/at91sam9x5ek_spiflash_defconfig
index f839ac70cf..5b143bca45 100644
--- a/configs/at91sam9x5ek_spiflash_defconfig
+++ b/configs/at91sam9x5ek_spiflash_defconfig
@@ -55,6 +55,7 @@ CONFIG_DEBUG_UART_CLOCK=132000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/at91sam9xeek_dataflash_cs0_defconfig b/configs/at91sam9xeek_dataflash_cs0_defconfig
index e3633115ab..187042dcf9 100644
--- a/configs/at91sam9xeek_dataflash_cs0_defconfig
+++ b/configs/at91sam9xeek_dataflash_cs0_defconfig
@@ -49,6 +49,7 @@ CONFIG_DEBUG_UART_CLOCK=132000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/at91sam9xeek_dataflash_cs1_defconfig b/configs/at91sam9xeek_dataflash_cs1_defconfig
index 4a7cdb7678..d95dee2ead 100644
--- a/configs/at91sam9xeek_dataflash_cs1_defconfig
+++ b/configs/at91sam9xeek_dataflash_cs1_defconfig
@@ -49,6 +49,7 @@ CONFIG_DEBUG_UART_CLOCK=132000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/at91sam9xeek_nandflash_defconfig b/configs/at91sam9xeek_nandflash_defconfig
index 18cff28c71..d5839915af 100644
--- a/configs/at91sam9xeek_nandflash_defconfig
+++ b/configs/at91sam9xeek_nandflash_defconfig
@@ -49,6 +49,7 @@ CONFIG_DEBUG_UART_CLOCK=132000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/bayleybay_defconfig b/configs/bayleybay_defconfig
index 9d8f17079e..ba3f566a89 100644
--- a/configs/bayleybay_defconfig
+++ b/configs/bayleybay_defconfig
@@ -44,6 +44,7 @@ CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_CPU=y
 CONFIG_E1000=y
+CONFIG_SPI=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
 CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
diff --git a/configs/bg0900_defconfig b/configs/bg0900_defconfig
deleted file mode 100644
index 4649e5de5f..0000000000
--- a/configs/bg0900_defconfig
+++ /dev/null
@@ -1,35 +0,0 @@
-CONFIG_ARM=y
-CONFIG_TARGET_BG0900=y
-CONFIG_SPL_GPIO_SUPPORT=y
-CONFIG_SPL_LIBCOMMON_SUPPORT=y
-CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_BOOTDELAY=3
-CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="console=ttyAMA0,115200"
-CONFIG_VERSION_VARIABLE=y
-# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_ARCH_MISC_INIT=y
-CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_SPL=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
-# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_NAND_TRIMFFS=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_CACHE=y
-CONFIG_DOS_PARTITION=y
-# CONFIG_MMC is not set
-CONFIG_NAND=y
-CONFIG_NAND_MXS=y
-CONFIG_SPI_FLASH=y
-CONFIG_SPI_FLASH_BAR=y
-CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_MXS_SPI=y
-CONFIG_OF_LIBFDT=y
diff --git a/configs/birdland_bav335a_defconfig b/configs/birdland_bav335a_defconfig
index 3bb64d8b7a..4ea8643261 100644
--- a/configs/birdland_bav335a_defconfig
+++ b/configs/birdland_bav335a_defconfig
@@ -61,6 +61,7 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_HOST=y
diff --git a/configs/birdland_bav335b_defconfig b/configs/birdland_bav335b_defconfig
index fd81dad3f3..35b3d8edb9 100644
--- a/configs/birdland_bav335b_defconfig
+++ b/configs/birdland_bav335b_defconfig
@@ -61,6 +61,7 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_HOST=y
diff --git a/configs/bk4r1_defconfig b/configs/bk4r1_defconfig
index 5d8b72e288..dcd3d19f73 100644
--- a/configs/bk4r1_defconfig
+++ b/configs/bk4r1_defconfig
@@ -37,5 +37,6 @@ CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
 CONFIG_DM_SERIAL=y
 CONFIG_FSL_LPUART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_FSL_QSPI=y
diff --git a/configs/brppt1_spi_defconfig b/configs/brppt1_spi_defconfig
index 4cef0021ef..5237e96d2f 100644
--- a/configs/brppt1_spi_defconfig
+++ b/configs/brppt1_spi_defconfig
@@ -65,6 +65,7 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_HOST=y
diff --git a/configs/cairo_defconfig b/configs/cairo_defconfig
index 8a027ff267..9e931030d4 100644
--- a/configs/cairo_defconfig
+++ b/configs/cairo_defconfig
@@ -42,6 +42,7 @@ CONFIG_MMC_OMAP_HS=y
 CONFIG_NAND=y
 CONFIG_SPL_NAND_SIMPLE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_FAT_WRITE=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/cgtqmx6eval_defconfig b/configs/cgtqmx6eval_defconfig
deleted file mode 100644
index 2f9a9cc9a5..0000000000
--- a/configs/cgtqmx6eval_defconfig
+++ /dev/null
@@ -1,72 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_MX6=y
-CONFIG_SPL_GPIO_SUPPORT=y
-CONFIG_SPL_LIBCOMMON_SUPPORT=y
-CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_CGTQMX6EVAL=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_LIBDISK_SUPPORT=y
-CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
-CONFIG_VIDEO=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6QDL"
-CONFIG_BOOTDELAY=3
-# CONFIG_CONSOLE_MUX is not set
-CONFIG_SYS_CONSOLE_IS_IN_ENV=y
-CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
-# CONFIG_SYS_STDIO_DEREGISTER is not set
-CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_SPL=y
-CONFIG_SPL_EXT_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PROMPT="CGT-QMX6-Quad U-Boot > "
-CONFIG_FASTBOOT=y
-CONFIG_USB_FUNCTION_FASTBOOT=y
-CONFIG_CMD_FASTBOOT=y
-CONFIG_FASTBOOT_BUF_ADDR=0x12000000
-CONFIG_CMD_BOOTZ=y
-# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_DFU=y
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SATA=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_DFU_MMC=y
-CONFIG_DFU_SF=y
-CONFIG_USB_FUNCTION_FASTBOOT=y
-CONFIG_FASTBOOT_BUF_ADDR=0x12000000
-CONFIG_FSL_ESDHC=y
-CONFIG_SPI_FLASH=y
-CONFIG_PHYLIB=y
-CONFIG_USB=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y
-CONFIG_USB_GADGET=y
-CONFIG_CI_UDC=y
-CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Congatec"
-CONFIG_G_DNL_VENDOR_NUM=0x0525
-CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
-CONFIG_USB_HOST_ETHER=y
-CONFIG_USB_ETHER_ASIX=y
-# CONFIG_VIDEO_SW_CURSOR is not set
-CONFIG_OF_LIBFDT=y
diff --git a/configs/chiliboard_defconfig b/configs/chiliboard_defconfig
index f74095d9a6..0c5f981b2d 100644
--- a/configs/chiliboard_defconfig
+++ b/configs/chiliboard_defconfig
@@ -43,6 +43,7 @@ CONFIG_NAND=y
 CONFIG_NAND_OMAP_GPMC_PREFETCH=y
 CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_HOST=y
diff --git a/configs/chromebook_link64_defconfig b/configs/chromebook_link64_defconfig
index da247152a8..77d62ed7a2 100644
--- a/configs/chromebook_link64_defconfig
+++ b/configs/chromebook_link64_defconfig
@@ -66,6 +66,7 @@ CONFIG_DEBUG_UART_BASE=0x3f8
 CONFIG_DEBUG_UART_CLOCK=1843200
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_SPL_TIMER=y
 CONFIG_TPM_TIS_LPC=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/chromebook_link_defconfig b/configs/chromebook_link_defconfig
deleted file mode 100644
index aaabb22251..0000000000
--- a/configs/chromebook_link_defconfig
+++ /dev/null
@@ -1,60 +0,0 @@
-CONFIG_X86=y
-CONFIG_SYS_MALLOC_F_LEN=0x2000
-CONFIG_VENDOR_GOOGLE=y
-CONFIG_DEFAULT_DEVICE_TREE="chromebook_link"
-CONFIG_TARGET_CHROMEBOOK_LINK=y
-CONFIG_DEBUG_UART=y
-CONFIG_HAVE_MRC=y
-CONFIG_SMP=y
-CONFIG_HAVE_VGA_BIOS=y
-CONFIG_FIT=y
-CONFIG_BOOTSTAGE=y
-CONFIG_BOOTSTAGE_REPORT=y
-CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
-CONFIG_SYS_CONSOLE_INFO_QUIET=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_CPU=y
-# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_PART=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_USB=y
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-# CONFIG_CMD_NFS is not set
-CONFIG_CMD_PING=y
-CONFIG_CMD_TIME=y
-CONFIG_CMD_BOOTSTAGE=y
-CONFIG_CMD_TPM=y
-CONFIG_CMD_TPM_TEST=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_MAC_PARTITION=y
-CONFIG_ISO_PARTITION=y
-CONFIG_EFI_PARTITION=y
-CONFIG_REGMAP=y
-CONFIG_SYSCON=y
-CONFIG_CPU=y
-CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_INTEL=y
-CONFIG_CROS_EC=y
-CONFIG_CROS_EC_LPC=y
-CONFIG_DEBUG_UART_BASE=0x3f8
-CONFIG_DEBUG_UART_CLOCK=1843200
-CONFIG_DEBUG_UART_BOARD_INIT=y
-CONFIG_SYS_NS16550=y
-CONFIG_TPM_TIS_LPC=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_KEYBOARD=y
-CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
-CONFIG_FRAMEBUFFER_VESA_MODE_11A=y
-CONFIG_VIDEO_IVYBRIDGE_IGD=y
-CONFIG_CONSOLE_SCROLL_LINES=5
-CONFIG_CMD_DHRYSTONE=y
-CONFIG_TPM=y
diff --git a/configs/chromebook_samus_defconfig b/configs/chromebook_samus_defconfig
index 8df2c4c5c1..118fb8b998 100644
--- a/configs/chromebook_samus_defconfig
+++ b/configs/chromebook_samus_defconfig
@@ -47,6 +47,7 @@ CONFIG_DEBUG_UART_BASE=0x3f8
 CONFIG_DEBUG_UART_CLOCK=1843200
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_TPM_TIS_LPC=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
diff --git a/configs/chromebox_panther_defconfig b/configs/chromebox_panther_defconfig
index 2eb30bda6f..59c1493402 100644
--- a/configs/chromebox_panther_defconfig
+++ b/configs/chromebox_panther_defconfig
@@ -40,6 +40,7 @@ CONFIG_CROS_EC=y
 CONFIG_CROS_EC_LPC=y
 CONFIG_RTL8169=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_TPM_TIS_LPC=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
diff --git a/configs/cl-som-am57x_defconfig b/configs/cl-som-am57x_defconfig
index 0767e43785..709ad4131e 100644
--- a/configs/cl-som-am57x_defconfig
+++ b/configs/cl-som-am57x_defconfig
@@ -53,6 +53,7 @@ CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_TI_QSPI=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig
deleted file mode 100644
index 54f41010bc..0000000000
--- a/configs/cm_fx6_defconfig
+++ /dev/null
@@ -1,67 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_MX6=y
-CONFIG_SPL_GPIO_SUPPORT=y
-CONFIG_SPL_LIBCOMMON_SUPPORT=y
-CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_CM_FX6=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
-CONFIG_VIDEO=y
-# CONFIG_CMD_BMODE is not set
-CONFIG_DEFAULT_DEVICE_TREE="imx6q-cm-fx6"
-CONFIG_AHCI=y
-CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6QDL"
-CONFIG_BOOTDELAY=3
-CONFIG_SPL=y
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x80
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SYS_PROMPT="CM-FX6 # "
-# CONFIG_CMD_XIMG is not set
-CONFIG_CMD_GREPENV=y
-CONFIG_CMD_EEPROM=y
-CONFIG_CMD_EEPROM_LAYOUT=y
-CONFIG_EEPROM_LAYOUT_HELP_STRING="v2, v3"
-# CONFIG_CMD_FLASH is not set
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-# CONFIG_CMD_LOADB is not set
-# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SATA=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_USB=y
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_BMP=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_MTDPARTS=y
-CONFIG_OF_CONTROL=y
-CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_DM_MMC=y
-CONFIG_FSL_ESDHC=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_NAND=y
-CONFIG_NAND_MXS=y
-CONFIG_SPI_FLASH=y
-CONFIG_SPI_FLASH_ATMEL=y
-CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_PHYLIB=y
-CONFIG_DM_PMIC=y
-CONFIG_DM_REGULATOR=y
-CONFIG_USB=y
-CONFIG_DM_USB=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
-CONFIG_FDT_FIXUP_PARTITIONS=y
diff --git a/configs/cm_t3517_defconfig b/configs/cm_t3517_defconfig
index b74508ac1e..741686b115 100644
--- a/configs/cm_t3517_defconfig
+++ b/configs/cm_t3517_defconfig
@@ -40,6 +40,7 @@ CONFIG_MMC_OMAP_HS=y
 CONFIG_MTD_PARTITIONS=y
 CONFIG_NAND=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_HOST=y
diff --git a/configs/cm_t35_defconfig b/configs/cm_t35_defconfig
index 8b6427c6d8..672a3318c7 100644
--- a/configs/cm_t35_defconfig
+++ b/configs/cm_t35_defconfig
@@ -43,6 +43,7 @@ CONFIG_MTD_PARTITIONS=y
 CONFIG_NAND=y
 CONFIG_SPL_NAND_SIMPLE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/cm_t43_defconfig b/configs/cm_t43_defconfig
index 4c6274219b..e922259569 100644
--- a/configs/cm_t43_defconfig
+++ b/configs/cm_t43_defconfig
@@ -69,6 +69,7 @@ CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_PHYLIB=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
diff --git a/configs/cm_t54_defconfig b/configs/cm_t54_defconfig
index db34b2268a..6047076209 100644
--- a/configs/cm_t54_defconfig
+++ b/configs/cm_t54_defconfig
@@ -42,6 +42,7 @@ CONFIG_ENV_IS_IN_MMC=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_SCSI=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/colibri_vf_defconfig b/configs/colibri_vf_defconfig
index 49315d0638..9649ee36db 100644
--- a/configs/colibri_vf_defconfig
+++ b/configs/colibri_vf_defconfig
@@ -47,6 +47,7 @@ CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
 CONFIG_DM_SERIAL=y
 CONFIG_FSL_LPUART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_FSL_DSPI=y
 CONFIG_USB=y
diff --git a/configs/comtrend_ar5387un_ram_defconfig b/configs/comtrend_ar5387un_ram_defconfig
deleted file mode 100644
index 52e9d6c797..0000000000
--- a/configs/comtrend_ar5387un_ram_defconfig
+++ /dev/null
@@ -1,44 +0,0 @@
-CONFIG_MIPS=y
-CONFIG_SYS_TEXT_BASE=0x80010000
-CONFIG_ARCH_BMIPS=y
-CONFIG_SOC_BMIPS_BCM6328=y
-# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
-# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
-CONFIG_MIPS_BOOT_FDT=y
-CONFIG_DEFAULT_DEVICE_TREE="comtrend,ar-5387un"
-# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_DISPLAY_CPUINFO=y
-CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PROMPT="AR-5387un # "
-CONFIG_CMD_CPU=y
-CONFIG_CMD_LICENSE=y
-# CONFIG_CMD_BOOTD is not set
-# CONFIG_CMD_ELF is not set
-# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_XIMG is not set
-# CONFIG_CMD_EXPORTENV is not set
-# CONFIG_CMD_IMPORTENV is not set
-# CONFIG_CMD_EDITENV is not set
-# CONFIG_CMD_SAVEENV is not set
-# CONFIG_CMD_ENV_EXISTS is not set
-# CONFIG_CMD_CRC32 is not set
-CONFIG_CMD_MEMINFO=y
-# CONFIG_CMD_FLASH is not set
-# CONFIG_CMD_FPGA is not set
-# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
-# CONFIG_CMD_MISC is not set
-# CONFIG_DM_DEVICE_REMOVE is not set
-CONFIG_DM_GPIO=y
-CONFIG_LED=y
-CONFIG_LED_BCM6328=y
-CONFIG_LED_BLINK=y
-CONFIG_POWER_DOMAIN=y
-CONFIG_BCM6328_POWER_DOMAIN=y
-CONFIG_DM_RESET=y
-CONFIG_RESET_BCM6345=y
-# CONFIG_SPL_SERIAL_PRESENT is not set
-CONFIG_DM_SERIAL=y
-CONFIG_BCM6345_SERIAL=y
diff --git a/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig b/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig
index 9575c538ca..e4e97a78f4 100644
--- a/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig
+++ b/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig
@@ -51,6 +51,7 @@ CONFIG_WINBOND_W83627=y
 CONFIG_E1000=y
 CONFIG_DEBUG_UART_BASE=0x3f8
 CONFIG_DEBUG_UART_CLOCK=1843200
+CONFIG_SPI=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
 CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
diff --git a/configs/conga-qeval20-qa3-e3845_defconfig b/configs/conga-qeval20-qa3-e3845_defconfig
index b12be650d8..3196b211de 100644
--- a/configs/conga-qeval20-qa3-e3845_defconfig
+++ b/configs/conga-qeval20-qa3-e3845_defconfig
@@ -49,6 +49,7 @@ CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_INTEL=y
 CONFIG_WINBOND_W83627=y
 CONFIG_E1000=y
+CONFIG_SPI=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
 CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
diff --git a/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig b/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig
index 400941637c..1a53da3339 100644
--- a/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig
+++ b/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig
@@ -38,6 +38,7 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_TPM_AUTH_SESSIONS=y
 CONFIG_USB=y
diff --git a/configs/controlcenterd_36BIT_SDCARD_defconfig b/configs/controlcenterd_36BIT_SDCARD_defconfig
index 7e7b2b3c3c..f289cd0c27 100644
--- a/configs/controlcenterd_36BIT_SDCARD_defconfig
+++ b/configs/controlcenterd_36BIT_SDCARD_defconfig
@@ -38,6 +38,7 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_TPM_AUTH_SESSIONS=y
 CONFIG_USB=y
diff --git a/configs/coreboot-x86_defconfig b/configs/coreboot-x86_defconfig
index 9f3bc3f874..0fc2a579af 100644
--- a/configs/coreboot-x86_defconfig
+++ b/configs/coreboot-x86_defconfig
@@ -33,6 +33,7 @@ CONFIG_ISO_PARTITION=y
 CONFIG_EFI_PARTITION=y
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
+CONFIG_SPI=y
 CONFIG_TPM_TIS_LPC=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
diff --git a/configs/cougarcanyon2_defconfig b/configs/cougarcanyon2_defconfig
index 2d8ebaeb21..638924ff4f 100644
--- a/configs/cougarcanyon2_defconfig
+++ b/configs/cougarcanyon2_defconfig
@@ -30,6 +30,7 @@ CONFIG_EFI_PARTITION=y
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
 # CONFIG_VIDEO_VESA is not set
diff --git a/configs/crownbay_defconfig b/configs/crownbay_defconfig
index a46dd66696..2683a79c03 100644
--- a/configs/crownbay_defconfig
+++ b/configs/crownbay_defconfig
@@ -38,6 +38,7 @@ CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_CPU=y
 CONFIG_E1000=y
+CONFIG_SPI=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
 CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
diff --git a/configs/d2net_v2_defconfig b/configs/d2net_v2_defconfig
index 0e67a03198..6da1f40d92 100644
--- a/configs/d2net_v2_defconfig
+++ b/configs/d2net_v2_defconfig
@@ -31,6 +31,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_KIRKWOOD_SPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/da850_am18xxevm_defconfig b/configs/da850_am18xxevm_defconfig
index 6c297b12d6..7a018bac44 100644
--- a/configs/da850_am18xxevm_defconfig
+++ b/configs/da850_am18xxevm_defconfig
@@ -42,6 +42,7 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_DAVINCI_SPI=y
 # CONFIG_FAT_WRITE is not set
diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig
index b2fe206733..9945a87f9d 100644
--- a/configs/da850evm_defconfig
+++ b/configs/da850evm_defconfig
@@ -45,6 +45,7 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_DAVINCI_SPI=y
 # CONFIG_FAT_WRITE is not set
diff --git a/configs/da850evm_direct_nor_defconfig b/configs/da850evm_direct_nor_defconfig
index 36f755082f..c95e98f7b4 100644
--- a/configs/da850evm_direct_nor_defconfig
+++ b/configs/da850evm_direct_nor_defconfig
@@ -26,5 +26,6 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_DAVINCI_SPI=y
diff --git a/configs/devkit3250_defconfig b/configs/devkit3250_defconfig
index 5ea067a852..f8617a4c96 100644
--- a/configs/devkit3250_defconfig
+++ b/configs/devkit3250_defconfig
@@ -38,6 +38,7 @@ CONFIG_SPL_NAND_SIMPLE=y
 CONFIG_PHYLIB=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_LPC32XX_SSP=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/dfi-bt700-q7x-151_defconfig b/configs/dfi-bt700-q7x-151_defconfig
index 4db9ce73c2..f6d8c99845 100644
--- a/configs/dfi-bt700-q7x-151_defconfig
+++ b/configs/dfi-bt700-q7x-151_defconfig
@@ -46,6 +46,7 @@ CONFIG_CPU=y
 CONFIG_DM_I2C=y
 CONFIG_NUVOTON_NCT6102D=y
 CONFIG_E1000=y
+CONFIG_SPI=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
 CONFIG_USB_ETHER_MCS7830=y
diff --git a/configs/dms-ba16-1g_defconfig b/configs/dms-ba16-1g_defconfig
deleted file mode 100644
index 2342f34e78..0000000000
--- a/configs/dms-ba16-1g_defconfig
+++ /dev/null
@@ -1,47 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_MX6=y
-CONFIG_TARGET_ADVANTECH_DMS_BA16=y
-CONFIG_SYS_DDR_1G=y
-CONFIG_VIDEO=y
-CONFIG_BOOTDELAY=1
-# CONFIG_CONSOLE_MUX is not set
-CONFIG_SYS_CONSOLE_IS_IN_ENV=y
-CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
-# CONFIG_SYS_STDIO_DEREGISTER is not set
-CONFIG_DEFAULT_FDT_FILE="imx6q-dms-ba16.dtb"
-CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
-# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_SPI_FLASH=y
-CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_PHYLIB=y
-CONFIG_USB=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y
-CONFIG_USB_GADGET=y
-CONFIG_CI_UDC=y
-CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Advantech"
-CONFIG_G_DNL_VENDOR_NUM=0x0525
-CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
-# CONFIG_VIDEO_SW_CURSOR is not set
-CONFIG_OF_LIBFDT=y
diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig
index e4bb299275..ae8e815bda 100644
--- a/configs/dra7xx_evm_defconfig
+++ b/configs/dra7xx_evm_defconfig
@@ -75,6 +75,7 @@ CONFIG_DM_REGULATOR_LP873X=y
 CONFIG_DM_SCSI=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TI_QSPI=y
 CONFIG_TIMER=y
diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig
index f55fc501aa..9d15726629 100644
--- a/configs/dra7xx_hs_evm_defconfig
+++ b/configs/dra7xx_hs_evm_defconfig
@@ -77,6 +77,7 @@ CONFIG_DM_REGULATOR_LP873X=y
 CONFIG_DM_SCSI=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TI_QSPI=y
 CONFIG_TIMER=y
diff --git a/configs/draco_defconfig b/configs/draco_defconfig
index f5a2c1b526..d884ba3bbc 100644
--- a/configs/draco_defconfig
+++ b/configs/draco_defconfig
@@ -60,6 +60,7 @@ CONFIG_MTD_UBI_FASTMAP=y
 CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
 CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_HOST=y
diff --git a/configs/dreamplug_defconfig b/configs/dreamplug_defconfig
index 1360d3ea42..2c87693931 100644
--- a/configs/dreamplug_defconfig
+++ b/configs/dreamplug_defconfig
@@ -24,6 +24,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_KIRKWOOD_SPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/ds109_defconfig b/configs/ds109_defconfig
index a9bfdfd279..9b2924eb31 100644
--- a/configs/ds109_defconfig
+++ b/configs/ds109_defconfig
@@ -20,6 +20,7 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_KIRKWOOD_SPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/duovero_defconfig b/configs/duovero_defconfig
index 6feb4861a7..aad0630208 100644
--- a/configs/duovero_defconfig
+++ b/configs/duovero_defconfig
@@ -25,6 +25,7 @@ CONFIG_CMD_EXT4_WRITE=y
 CONFIG_SPL_PARTITION_UUIDS=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/ea20_defconfig b/configs/ea20_defconfig
index f23851ba67..0e4b97cbd2 100644
--- a/configs/ea20_defconfig
+++ b/configs/ea20_defconfig
@@ -36,6 +36,7 @@ CONFIG_NAND_DAVINCI=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DAVINCI_SPI=y
 CONFIG_VIDEO=y
 # CONFIG_VIDEO_SW_CURSOR is not set
diff --git a/configs/efi-x86_defconfig b/configs/efi-x86_defconfig
index 0e20e72140..62f95cdaae 100644
--- a/configs/efi-x86_defconfig
+++ b/configs/efi-x86_defconfig
@@ -33,6 +33,7 @@ CONFIG_OF_EMBED=y
 CONFIG_DEBUG_EFI_CONSOLE=y
 CONFIG_DEBUG_UART_BASE=0
 CONFIG_DEBUG_UART_CLOCK=0
+CONFIG_SPI=y
 CONFIG_ICH_SPI=y
 CONFIG_EFI=y
 # CONFIG_EFI_LOADER is not set
diff --git a/configs/etamin_defconfig b/configs/etamin_defconfig
index 148d4218c0..5b8a597aa2 100644
--- a/configs/etamin_defconfig
+++ b/configs/etamin_defconfig
@@ -60,6 +60,7 @@ CONFIG_MTD_UBI_FASTMAP=y
 CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
 CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_HOST=y
diff --git a/configs/ethernut5_defconfig b/configs/ethernut5_defconfig
index 7685052495..e41fb5c951 100644
--- a/configs/ethernut5_defconfig
+++ b/configs/ethernut5_defconfig
@@ -55,6 +55,7 @@ CONFIG_PINCTRL=y
 CONFIG_PINCTRL_AT91=y
 CONFIG_DM_SERIAL=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/galileo_defconfig b/configs/galileo_defconfig
index 514e3c5220..f8c3e566e9 100644
--- a/configs/galileo_defconfig
+++ b/configs/galileo_defconfig
@@ -39,5 +39,6 @@ CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_CPU=y
+CONFIG_SPI=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
diff --git a/configs/gose_defconfig b/configs/gose_defconfig
index 0267ef5c03..ebf35da9a1 100644
--- a/configs/gose_defconfig
+++ b/configs/gose_defconfig
@@ -40,6 +40,7 @@ CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
 CONFIG_BAUDRATE=38400
 CONFIG_SCIF_CONSOLE=y
+CONFIG_SPI=y
 CONFIG_SH_QSPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/ids8313_defconfig b/configs/ids8313_defconfig
index eee3559c21..35a4aa3f92 100644
--- a/configs/ids8313_defconfig
+++ b/configs/ids8313_defconfig
@@ -31,5 +31,6 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_PHYLIB=y
 # CONFIG_PCI is not set
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_MPC8XXX_SPI=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/igep0032_defconfig b/configs/igep0032_defconfig
index 5f067be1a2..9f994acf30 100644
--- a/configs/igep0032_defconfig
+++ b/configs/igep0032_defconfig
@@ -35,6 +35,7 @@ CONFIG_NAND=y
 CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 CONFIG_SPL_NAND_SIMPLE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_FAT_WRITE=y
 CONFIG_BCH=y
diff --git a/configs/igep00x0_defconfig b/configs/igep00x0_defconfig
index 146568430b..01fe607deb 100644
--- a/configs/igep00x0_defconfig
+++ b/configs/igep00x0_defconfig
@@ -36,6 +36,7 @@ CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 CONFIG_SPL_NAND_SIMPLE=y
 CONFIG_MTD_UBI_FASTMAP=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_FAT_WRITE=y
 CONFIG_BCH=y
diff --git a/configs/inetspace_v2_defconfig b/configs/inetspace_v2_defconfig
index 58814a4f5c..a31cd1201f 100644
--- a/configs/inetspace_v2_defconfig
+++ b/configs/inetspace_v2_defconfig
@@ -31,6 +31,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_KIRKWOOD_SPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig
index 9849b6f7e5..c8a03b9216 100644
--- a/configs/k2e_evm_defconfig
+++ b/configs/k2e_evm_defconfig
@@ -44,6 +44,7 @@ CONFIG_PHYLIB=y
 CONFIG_DM_ETH=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_DAVINCI_SPI=y
 CONFIG_USB=y
diff --git a/configs/k2e_hs_evm_defconfig b/configs/k2e_hs_evm_defconfig
index 04f902b1c6..01320fb16c 100644
--- a/configs/k2e_hs_evm_defconfig
+++ b/configs/k2e_hs_evm_defconfig
@@ -33,6 +33,7 @@ CONFIG_PHYLIB=y
 CONFIG_DM_ETH=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_DAVINCI_SPI=y
 CONFIG_USB=y
diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig
index 3a2e0f6c6e..6c7eb30a72 100644
--- a/configs/k2g_evm_defconfig
+++ b/configs/k2g_evm_defconfig
@@ -48,6 +48,7 @@ CONFIG_DM_ETH=y
 CONFIG_REMOTEPROC_TI_POWER=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_DAVINCI_SPI=y
 CONFIG_USB=y
diff --git a/configs/k2g_hs_evm_defconfig b/configs/k2g_hs_evm_defconfig
index 2a8618c5c2..c8dc268265 100644
--- a/configs/k2g_hs_evm_defconfig
+++ b/configs/k2g_hs_evm_defconfig
@@ -36,6 +36,7 @@ CONFIG_DM_ETH=y
 CONFIG_REMOTEPROC_TI_POWER=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_DAVINCI_SPI=y
 CONFIG_USB=y
diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig
index a5a8809ee9..495148e7d0 100644
--- a/configs/k2hk_evm_defconfig
+++ b/configs/k2hk_evm_defconfig
@@ -44,6 +44,7 @@ CONFIG_PHYLIB=y
 CONFIG_DM_ETH=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_DAVINCI_SPI=y
 CONFIG_USB=y
diff --git a/configs/k2hk_hs_evm_defconfig b/configs/k2hk_hs_evm_defconfig
index 30cced63ae..94c6f98f58 100644
--- a/configs/k2hk_hs_evm_defconfig
+++ b/configs/k2hk_hs_evm_defconfig
@@ -33,6 +33,7 @@ CONFIG_PHYLIB=y
 CONFIG_DM_ETH=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_DAVINCI_SPI=y
 CONFIG_USB=y
diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig
index 5c157aef01..6f9ce2c429 100644
--- a/configs/k2l_evm_defconfig
+++ b/configs/k2l_evm_defconfig
@@ -44,6 +44,7 @@ CONFIG_PHYLIB=y
 CONFIG_DM_ETH=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_DAVINCI_SPI=y
 CONFIG_USB=y
diff --git a/configs/km_kirkwood_128m16_defconfig b/configs/km_kirkwood_128m16_defconfig
index 3d18206c57..4791babd5b 100644
--- a/configs/km_kirkwood_128m16_defconfig
+++ b/configs/km_kirkwood_128m16_defconfig
@@ -28,6 +28,7 @@ CONFIG_ENV_IS_IN_EEPROM=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_KIRKWOOD_SPI=y
 CONFIG_BCH=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/km_kirkwood_defconfig b/configs/km_kirkwood_defconfig
index d87604cfb0..78230d27d9 100644
--- a/configs/km_kirkwood_defconfig
+++ b/configs/km_kirkwood_defconfig
@@ -28,6 +28,7 @@ CONFIG_ENV_IS_IN_EEPROM=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_KIRKWOOD_SPI=y
 CONFIG_BCH=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/km_kirkwood_pci_defconfig b/configs/km_kirkwood_pci_defconfig
index 1273ea9315..c9129d29f4 100644
--- a/configs/km_kirkwood_pci_defconfig
+++ b/configs/km_kirkwood_pci_defconfig
@@ -28,6 +28,7 @@ CONFIG_ENV_IS_IN_EEPROM=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_KIRKWOOD_SPI=y
 CONFIG_BCH=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/kmcoge4_defconfig b/configs/kmcoge4_defconfig
index 2c0d7a0951..f20fe85274 100644
--- a/configs/kmcoge4_defconfig
+++ b/configs/kmcoge4_defconfig
@@ -38,6 +38,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_BCH=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/kmcoge5un_defconfig b/configs/kmcoge5un_defconfig
index 6921528225..92e4bf729c 100644
--- a/configs/kmcoge5un_defconfig
+++ b/configs/kmcoge5un_defconfig
@@ -28,6 +28,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_KIRKWOOD_SPI=y
 CONFIG_BCH=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/kmlion1_defconfig b/configs/kmlion1_defconfig
index d7150537b0..5905efc683 100644
--- a/configs/kmlion1_defconfig
+++ b/configs/kmlion1_defconfig
@@ -38,6 +38,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_BCH=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/kmnusa_defconfig b/configs/kmnusa_defconfig
index 6218c9d6b9..e67dd9e4ee 100644
--- a/configs/kmnusa_defconfig
+++ b/configs/kmnusa_defconfig
@@ -28,6 +28,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_KIRKWOOD_SPI=y
 CONFIG_BCH=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/kmsugp1_defconfig b/configs/kmsugp1_defconfig
index 9c0bc03719..fd77eb3c78 100644
--- a/configs/kmsugp1_defconfig
+++ b/configs/kmsugp1_defconfig
@@ -28,6 +28,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_KIRKWOOD_SPI=y
 CONFIG_BCH=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/kmsuv31_defconfig b/configs/kmsuv31_defconfig
index add4b04cb1..703a582cf4 100644
--- a/configs/kmsuv31_defconfig
+++ b/configs/kmsuv31_defconfig
@@ -28,6 +28,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_KIRKWOOD_SPI=y
 CONFIG_BCH=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/koelsch_defconfig b/configs/koelsch_defconfig
index 6f75f7b8fd..cacfaddcc7 100644
--- a/configs/koelsch_defconfig
+++ b/configs/koelsch_defconfig
@@ -40,6 +40,7 @@ CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
 CONFIG_BAUDRATE=38400
 CONFIG_SCIF_CONSOLE=y
+CONFIG_SPI=y
 CONFIG_SH_QSPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/lager_defconfig b/configs/lager_defconfig
index 2a7602f44c..2dc6e12946 100644
--- a/configs/lager_defconfig
+++ b/configs/lager_defconfig
@@ -42,6 +42,7 @@ CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
 CONFIG_BAUDRATE=38400
 CONFIG_SCIF_CONSOLE=y
+CONFIG_SPI=y
 CONFIG_SH_QSPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/legoev3_defconfig b/configs/legoev3_defconfig
index b8fab0eff2..83c2c8c723 100644
--- a/configs/legoev3_defconfig
+++ b/configs/legoev3_defconfig
@@ -27,6 +27,7 @@ CONFIG_CMD_DIAG=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DAVINCI_SPI=y
 CONFIG_OF_LIBFDT=y
 # CONFIG_EFI_LOADER is not set
diff --git a/configs/ls1012afrdm_qspi_defconfig b/configs/ls1012afrdm_qspi_defconfig
index fe95f048be..8004654a9a 100644
--- a/configs/ls1012afrdm_qspi_defconfig
+++ b/configs/ls1012afrdm_qspi_defconfig
@@ -40,6 +40,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
diff --git a/configs/ls1012aqds_qspi_defconfig b/configs/ls1012aqds_qspi_defconfig
index 4073db6583..60012a71e8 100644
--- a/configs/ls1012aqds_qspi_defconfig
+++ b/configs/ls1012aqds_qspi_defconfig
@@ -46,6 +46,7 @@ CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_SCSI=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_FSL_DSPI=y
 CONFIG_USB=y
diff --git a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig
index 777a451854..4653c84260 100644
--- a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig
@@ -40,6 +40,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_FSL_DSPI=y
 CONFIG_USB=y
diff --git a/configs/ls1012ardb_qspi_defconfig b/configs/ls1012ardb_qspi_defconfig
index 81702e374d..fc05ed3ff0 100644
--- a/configs/ls1012ardb_qspi_defconfig
+++ b/configs/ls1012ardb_qspi_defconfig
@@ -43,6 +43,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_FSL_DSPI=y
 CONFIG_USB=y
diff --git a/configs/ls1021aiot_qspi_defconfig b/configs/ls1021aiot_qspi_defconfig
index 04d36581c8..c4bf997723 100644
--- a/configs/ls1021aiot_qspi_defconfig
+++ b/configs/ls1021aiot_qspi_defconfig
@@ -22,6 +22,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_FSL_DSPI=y
 CONFIG_FSL_QSPI=y
diff --git a/configs/ls1021aiot_sdcard_defconfig b/configs/ls1021aiot_sdcard_defconfig
index 0b8014683f..7c3e0f9250 100644
--- a/configs/ls1021aiot_sdcard_defconfig
+++ b/configs/ls1021aiot_sdcard_defconfig
@@ -26,6 +26,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_FSL_DSPI=y
 CONFIG_FSL_QSPI=y
diff --git a/configs/ls1021aqds_qspi_defconfig b/configs/ls1021aqds_qspi_defconfig
index 77a430dbd6..00eba51b4d 100644
--- a/configs/ls1021aqds_qspi_defconfig
+++ b/configs/ls1021aqds_qspi_defconfig
@@ -46,6 +46,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_FSL_DSPI=y
 CONFIG_FSL_QSPI=y
diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig
index f0da0ba8fa..fdee4572af 100644
--- a/configs/ls1021aqds_sdcard_qspi_defconfig
+++ b/configs/ls1021aqds_sdcard_qspi_defconfig
@@ -57,6 +57,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_FSL_DSPI=y
 CONFIG_FSL_QSPI=y
diff --git a/configs/ls1021atwr_qspi_defconfig b/configs/ls1021atwr_qspi_defconfig
index e415840042..cd508f5429 100644
--- a/configs/ls1021atwr_qspi_defconfig
+++ b/configs/ls1021atwr_qspi_defconfig
@@ -48,6 +48,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_FSL_DSPI=y
 CONFIG_FSL_QSPI=y
diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig b/configs/ls1021atwr_sdcard_qspi_defconfig
index b1267b684d..61aa3bc85f 100644
--- a/configs/ls1021atwr_sdcard_qspi_defconfig
+++ b/configs/ls1021atwr_sdcard_qspi_defconfig
@@ -53,6 +53,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_FSL_DSPI=y
 CONFIG_FSL_QSPI=y
diff --git a/configs/ls1043aqds_defconfig b/configs/ls1043aqds_defconfig
index 9265fb39e0..2806c9380d 100644
--- a/configs/ls1043aqds_defconfig
+++ b/configs/ls1043aqds_defconfig
@@ -39,6 +39,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
diff --git a/configs/ls1043aqds_lpuart_defconfig b/configs/ls1043aqds_lpuart_defconfig
index 265550bf9a..1c6e86cf9c 100644
--- a/configs/ls1043aqds_lpuart_defconfig
+++ b/configs/ls1043aqds_lpuart_defconfig
@@ -41,6 +41,7 @@ CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_DM_SERIAL=y
 CONFIG_FSL_LPUART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig
index 28791cfc52..a991bbe75b 100644
--- a/configs/ls1043aqds_nand_defconfig
+++ b/configs/ls1043aqds_nand_defconfig
@@ -54,6 +54,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
diff --git a/configs/ls1043aqds_nor_ddr3_defconfig b/configs/ls1043aqds_nor_ddr3_defconfig
index 015340ee85..bc5eebd713 100644
--- a/configs/ls1043aqds_nor_ddr3_defconfig
+++ b/configs/ls1043aqds_nor_ddr3_defconfig
@@ -40,6 +40,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
diff --git a/configs/ls1043aqds_qspi_defconfig b/configs/ls1043aqds_qspi_defconfig
index 892aef1a2f..20029b1a01 100644
--- a/configs/ls1043aqds_qspi_defconfig
+++ b/configs/ls1043aqds_qspi_defconfig
@@ -40,6 +40,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig
index a21589dc37..6b1f8ebc19 100644
--- a/configs/ls1043aqds_sdcard_ifc_defconfig
+++ b/configs/ls1043aqds_sdcard_ifc_defconfig
@@ -54,6 +54,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
diff --git a/configs/ls1043aqds_sdcard_qspi_defconfig b/configs/ls1043aqds_sdcard_qspi_defconfig
index f432ebe35d..2ea6acc748 100644
--- a/configs/ls1043aqds_sdcard_qspi_defconfig
+++ b/configs/ls1043aqds_sdcard_qspi_defconfig
@@ -53,6 +53,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
diff --git a/configs/ls1043ardb_SECURE_BOOT_defconfig b/configs/ls1043ardb_SECURE_BOOT_defconfig
index 80ab13be84..4ad94780d2 100644
--- a/configs/ls1043ardb_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_SECURE_BOOT_defconfig
@@ -29,6 +29,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
diff --git a/configs/ls1043ardb_defconfig b/configs/ls1043ardb_defconfig
index 9c7e16dbf1..8d4a918eed 100644
--- a/configs/ls1043ardb_defconfig
+++ b/configs/ls1043ardb_defconfig
@@ -30,6 +30,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig
index 5c8599ed0c..d5aeab4cb2 100644
--- a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig
@@ -52,6 +52,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig
index e5310febdb..3e64338c63 100644
--- a/configs/ls1043ardb_nand_defconfig
+++ b/configs/ls1043ardb_nand_defconfig
@@ -51,6 +51,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
diff --git a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
index bdd7ea710e..8ad315185b 100644
--- a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
@@ -46,6 +46,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig
index efdaaa3d69..ff53899623 100644
--- a/configs/ls1043ardb_sdcard_defconfig
+++ b/configs/ls1043ardb_sdcard_defconfig
@@ -45,6 +45,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
diff --git a/configs/ls1046aqds_SECURE_BOOT_defconfig b/configs/ls1046aqds_SECURE_BOOT_defconfig
index 5b2ca9273b..c085556fb4 100644
--- a/configs/ls1046aqds_SECURE_BOOT_defconfig
+++ b/configs/ls1046aqds_SECURE_BOOT_defconfig
@@ -38,6 +38,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_FSL_DSPI=y
 CONFIG_USB=y
diff --git a/configs/ls1046aqds_defconfig b/configs/ls1046aqds_defconfig
index abcf6857de..5130a21194 100644
--- a/configs/ls1046aqds_defconfig
+++ b/configs/ls1046aqds_defconfig
@@ -39,6 +39,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_FSL_DSPI=y
 CONFIG_USB=y
diff --git a/configs/ls1046aqds_lpuart_defconfig b/configs/ls1046aqds_lpuart_defconfig
index 17a53ef6b0..21ce3c9e07 100644
--- a/configs/ls1046aqds_lpuart_defconfig
+++ b/configs/ls1046aqds_lpuart_defconfig
@@ -34,6 +34,7 @@ CONFIG_SPI_FLASH=y
 CONFIG_PHYLIB=y
 CONFIG_DM_SERIAL=y
 CONFIG_FSL_LPUART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_FSL_DSPI=y
 CONFIG_USB=y
diff --git a/configs/ls1046aqds_nand_defconfig b/configs/ls1046aqds_nand_defconfig
index 2b7ffce267..da6d4febdd 100644
--- a/configs/ls1046aqds_nand_defconfig
+++ b/configs/ls1046aqds_nand_defconfig
@@ -45,6 +45,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_FSL_DSPI=y
 CONFIG_USB=y
diff --git a/configs/ls1046aqds_qspi_defconfig b/configs/ls1046aqds_qspi_defconfig
index 011e7108e0..bc5cbf03a9 100644
--- a/configs/ls1046aqds_qspi_defconfig
+++ b/configs/ls1046aqds_qspi_defconfig
@@ -39,6 +39,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_FSL_DSPI=y
 CONFIG_FSL_QSPI=y
diff --git a/configs/ls1046aqds_sdcard_ifc_defconfig b/configs/ls1046aqds_sdcard_ifc_defconfig
index c150807f2b..f1bae8c2f5 100644
--- a/configs/ls1046aqds_sdcard_ifc_defconfig
+++ b/configs/ls1046aqds_sdcard_ifc_defconfig
@@ -46,6 +46,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_FSL_DSPI=y
 CONFIG_USB=y
diff --git a/configs/ls1046aqds_sdcard_qspi_defconfig b/configs/ls1046aqds_sdcard_qspi_defconfig
index a91b4b9ca1..a894187575 100644
--- a/configs/ls1046aqds_sdcard_qspi_defconfig
+++ b/configs/ls1046aqds_sdcard_qspi_defconfig
@@ -45,6 +45,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_FSL_DSPI=y
 CONFIG_FSL_QSPI=y
diff --git a/configs/ls1046ardb_emmc_defconfig b/configs/ls1046ardb_emmc_defconfig
index 8c2213d486..12457d21a1 100644
--- a/configs/ls1046ardb_emmc_defconfig
+++ b/configs/ls1046ardb_emmc_defconfig
@@ -43,6 +43,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_FSL_QSPI=y
 CONFIG_USB=y
diff --git a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig
index 1deabfab58..bf45784c87 100644
--- a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig
@@ -32,6 +32,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_FSL_QSPI=y
 CONFIG_USB=y
diff --git a/configs/ls1046ardb_qspi_defconfig b/configs/ls1046ardb_qspi_defconfig
index 821fad8152..a70e3ee195 100644
--- a/configs/ls1046ardb_qspi_defconfig
+++ b/configs/ls1046ardb_qspi_defconfig
@@ -33,6 +33,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_FSL_QSPI=y
 CONFIG_USB=y
diff --git a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig
index 600e999ece..8b78006b5b 100644
--- a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig
+++ b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig
@@ -39,6 +39,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_FSL_QSPI=y
 CONFIG_USB=y
diff --git a/configs/ls1046ardb_sdcard_defconfig b/configs/ls1046ardb_sdcard_defconfig
index 600990ea60..09e71ff939 100644
--- a/configs/ls1046ardb_sdcard_defconfig
+++ b/configs/ls1046ardb_sdcard_defconfig
@@ -39,6 +39,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_FSL_QSPI=y
 CONFIG_USB=y
diff --git a/configs/ls2080aqds_SECURE_BOOT_defconfig b/configs/ls2080aqds_SECURE_BOOT_defconfig
index 4441755d78..de71e4439a 100644
--- a/configs/ls2080aqds_SECURE_BOOT_defconfig
+++ b/configs/ls2080aqds_SECURE_BOOT_defconfig
@@ -38,6 +38,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_FSL_DSPI=y
 CONFIG_USB=y
diff --git a/configs/ls2080aqds_defconfig b/configs/ls2080aqds_defconfig
index 6c65f3b70c..ca21bc7f93 100644
--- a/configs/ls2080aqds_defconfig
+++ b/configs/ls2080aqds_defconfig
@@ -39,6 +39,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_FSL_DSPI=y
 CONFIG_USB=y
diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig
index 7ab3b10680..1a5f508685 100644
--- a/configs/ls2080aqds_nand_defconfig
+++ b/configs/ls2080aqds_nand_defconfig
@@ -50,6 +50,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_FSL_QSPI=y
 CONFIG_USB=y
diff --git a/configs/ls2080aqds_qspi_defconfig b/configs/ls2080aqds_qspi_defconfig
index baa1b34eaf..a71b87af22 100644
--- a/configs/ls2080aqds_qspi_defconfig
+++ b/configs/ls2080aqds_qspi_defconfig
@@ -40,6 +40,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_FSL_QSPI=y
 CONFIG_USB=y
diff --git a/configs/ls2080aqds_sdcard_defconfig b/configs/ls2080aqds_sdcard_defconfig
index cd1421beb0..d853e94d08 100644
--- a/configs/ls2080aqds_sdcard_defconfig
+++ b/configs/ls2080aqds_sdcard_defconfig
@@ -47,6 +47,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_FSL_QSPI=y
 CONFIG_USB=y
diff --git a/configs/ls2080ardb_SECURE_BOOT_defconfig b/configs/ls2080ardb_SECURE_BOOT_defconfig
index 4a462ce77e..a7d8631dca 100644
--- a/configs/ls2080ardb_SECURE_BOOT_defconfig
+++ b/configs/ls2080ardb_SECURE_BOOT_defconfig
@@ -36,6 +36,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_FSL_DSPI=y
 CONFIG_USB=y
diff --git a/configs/ls2080ardb_defconfig b/configs/ls2080ardb_defconfig
index c44ac48c48..770fbb6a9f 100644
--- a/configs/ls2080ardb_defconfig
+++ b/configs/ls2080ardb_defconfig
@@ -37,6 +37,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_FSL_DSPI=y
 CONFIG_USB=y
diff --git a/configs/ls2081ardb_defconfig b/configs/ls2081ardb_defconfig
index 5b8e1aaafb..0e4172dea4 100644
--- a/configs/ls2081ardb_defconfig
+++ b/configs/ls2081ardb_defconfig
@@ -37,6 +37,7 @@ CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_SCSI=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_FSL_DSPI=y
 CONFIG_FSL_QSPI=y
diff --git a/configs/ls2088ardb_qspi_defconfig b/configs/ls2088ardb_qspi_defconfig
index 39c1d526c6..b9ffb28d5f 100644
--- a/configs/ls2088ardb_qspi_defconfig
+++ b/configs/ls2088ardb_qspi_defconfig
@@ -36,6 +36,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_FSL_DSPI=y
 CONFIG_FSL_QSPI=y
diff --git a/configs/lschlv2_defconfig b/configs/lschlv2_defconfig
index 4edf5d1c5f..9ccf341cc8 100644
--- a/configs/lschlv2_defconfig
+++ b/configs/lschlv2_defconfig
@@ -33,6 +33,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_KIRKWOOD_SPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/lsxhl_defconfig b/configs/lsxhl_defconfig
index f12c57a0d0..07b1bc1635 100644
--- a/configs/lsxhl_defconfig
+++ b/configs/lsxhl_defconfig
@@ -24,6 +24,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_KIRKWOOD_SPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/meesc_dataflash_defconfig b/configs/meesc_dataflash_defconfig
index 0ec7d70758..74ecd016ec 100644
--- a/configs/meesc_dataflash_defconfig
+++ b/configs/meesc_dataflash_defconfig
@@ -33,4 +33,5 @@ CONFIG_PINCTRL=y
 CONFIG_PINCTRL_AT91=y
 CONFIG_DM_SERIAL=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
diff --git a/configs/meesc_defconfig b/configs/meesc_defconfig
index 3a3e8f1585..7e9d1558b8 100644
--- a/configs/meesc_defconfig
+++ b/configs/meesc_defconfig
@@ -36,4 +36,5 @@ CONFIG_PINCTRL=y
 CONFIG_PINCTRL_AT91=y
 CONFIG_DM_SERIAL=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
diff --git a/configs/mgcoge3un_defconfig b/configs/mgcoge3un_defconfig
index c8a3354a9c..249adee676 100644
--- a/configs/mgcoge3un_defconfig
+++ b/configs/mgcoge3un_defconfig
@@ -28,6 +28,7 @@ CONFIG_ENV_IS_IN_EEPROM=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_KIRKWOOD_SPI=y
 CONFIG_BCH=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/minnowmax_defconfig b/configs/minnowmax_defconfig
index 7b237abfca..04b4c32091 100644
--- a/configs/minnowmax_defconfig
+++ b/configs/minnowmax_defconfig
@@ -48,6 +48,7 @@ CONFIG_CPU=y
 CONFIG_RTL8169=y
 CONFIG_DEBUG_UART_BASE=0x3f8
 CONFIG_DEBUG_UART_CLOCK=1843200
+CONFIG_SPI=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
 CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
diff --git a/configs/mx6sxsabreauto_defconfig b/configs/mx6sxsabreauto_defconfig
index 216884a757..af9059e19d 100644
--- a/configs/mx6sxsabreauto_defconfig
+++ b/configs/mx6sxsabreauto_defconfig
@@ -47,6 +47,7 @@ CONFIG_DM_REGULATOR=y
 CONFIG_DM_REGULATOR_PFUZE100=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_SPI=y
 CONFIG_FSL_QSPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/mx6ul_14x14_evk_defconfig b/configs/mx6ul_14x14_evk_defconfig
index c55b96c074..8e4d07a15b 100644
--- a/configs/mx6ul_14x14_evk_defconfig
+++ b/configs/mx6ul_14x14_evk_defconfig
@@ -41,6 +41,7 @@ CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
+CONFIG_SPI=y
 CONFIG_FSL_QSPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/mx6ul_9x9_evk_defconfig b/configs/mx6ul_9x9_evk_defconfig
index db255f8d72..fc73bbbb74 100644
--- a/configs/mx6ul_9x9_evk_defconfig
+++ b/configs/mx6ul_9x9_evk_defconfig
@@ -41,6 +41,7 @@ CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
+CONFIG_SPI=y
 CONFIG_FSL_QSPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/mx6ull_14x14_evk_defconfig b/configs/mx6ull_14x14_evk_defconfig
index ec33429edf..c2ac67dc54 100644
--- a/configs/mx6ull_14x14_evk_defconfig
+++ b/configs/mx6ull_14x14_evk_defconfig
@@ -30,4 +30,5 @@ CONFIG_DM_MMC=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX6=y
 CONFIG_DM_REGULATOR=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
diff --git a/configs/mx6ull_14x14_evk_plugin_defconfig b/configs/mx6ull_14x14_evk_plugin_defconfig
index ec35804ea2..e8183deef2 100644
--- a/configs/mx6ull_14x14_evk_plugin_defconfig
+++ b/configs/mx6ull_14x14_evk_plugin_defconfig
@@ -31,4 +31,5 @@ CONFIG_DM_MMC=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX6=y
 CONFIG_DM_REGULATOR=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
diff --git a/configs/mx7dsabresd_defconfig b/configs/mx7dsabresd_defconfig
index 795c4f2b71..690aa69e63 100644
--- a/configs/mx7dsabresd_defconfig
+++ b/configs/mx7dsabresd_defconfig
@@ -56,6 +56,7 @@ CONFIG_DM_REGULATOR=y
 CONFIG_DM_REGULATOR_PFUZE100=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_SOFT_SPI=y
 CONFIG_USB=y
diff --git a/configs/mx7dsabresd_secure_defconfig b/configs/mx7dsabresd_secure_defconfig
index bd68831db7..89e3fae2d5 100644
--- a/configs/mx7dsabresd_secure_defconfig
+++ b/configs/mx7dsabresd_secure_defconfig
@@ -58,6 +58,7 @@ CONFIG_DM_REGULATOR=y
 CONFIG_DM_REGULATOR_PFUZE100=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_SOFT_SPI=y
 CONFIG_USB=y
diff --git a/configs/net2big_v2_defconfig b/configs/net2big_v2_defconfig
index d1161a437a..828d67b24a 100644
--- a/configs/net2big_v2_defconfig
+++ b/configs/net2big_v2_defconfig
@@ -31,6 +31,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_KIRKWOOD_SPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/netspace_lite_v2_defconfig b/configs/netspace_lite_v2_defconfig
index f87bd1c48c..a3717c49bb 100644
--- a/configs/netspace_lite_v2_defconfig
+++ b/configs/netspace_lite_v2_defconfig
@@ -31,6 +31,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_KIRKWOOD_SPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/netspace_max_v2_defconfig b/configs/netspace_max_v2_defconfig
index bb7691a7cc..7f7c17e55e 100644
--- a/configs/netspace_max_v2_defconfig
+++ b/configs/netspace_max_v2_defconfig
@@ -31,6 +31,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_KIRKWOOD_SPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/netspace_mini_v2_defconfig b/configs/netspace_mini_v2_defconfig
index a2696b972f..882f8615fa 100644
--- a/configs/netspace_mini_v2_defconfig
+++ b/configs/netspace_mini_v2_defconfig
@@ -29,5 +29,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_KIRKWOOD_SPI=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/netspace_v2_defconfig b/configs/netspace_v2_defconfig
index 623786f57b..3ae950d935 100644
--- a/configs/netspace_v2_defconfig
+++ b/configs/netspace_v2_defconfig
@@ -31,6 +31,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_KIRKWOOD_SPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/nokia_rx51_defconfig b/configs/nokia_rx51_defconfig
index 44f8759adb..5b8aafec9f 100644
--- a/configs/nokia_rx51_defconfig
+++ b/configs/nokia_rx51_defconfig
@@ -27,6 +27,7 @@ CONFIG_CMD_EXT4=y
 CONFIG_CMD_FAT=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_CFB_CONSOLE_ANSI=y
 # CONFIG_VGA_AS_SINGLE_DEVICE is not set
diff --git a/configs/omap3_beagle_defconfig b/configs/omap3_beagle_defconfig
index e57af82a6d..3764482776 100644
--- a/configs/omap3_beagle_defconfig
+++ b/configs/omap3_beagle_defconfig
@@ -44,6 +44,7 @@ CONFIG_NAND=y
 CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 CONFIG_SPL_NAND_SIMPLE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/omap3_evm_defconfig b/configs/omap3_evm_defconfig
index 1c19198519..07bd93c007 100644
--- a/configs/omap3_evm_defconfig
+++ b/configs/omap3_evm_defconfig
@@ -49,6 +49,7 @@ CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 CONFIG_SPL_NAND_SIMPLE=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/omap3_ha_defconfig b/configs/omap3_ha_defconfig
index 97943339d2..d889bcb51a 100644
--- a/configs/omap3_ha_defconfig
+++ b/configs/omap3_ha_defconfig
@@ -29,6 +29,7 @@ CONFIG_NAND=y
 CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 CONFIG_SPL_NAND_SIMPLE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/omap3_overo_defconfig b/configs/omap3_overo_defconfig
index 864dd637c7..20379f076a 100644
--- a/configs/omap3_overo_defconfig
+++ b/configs/omap3_overo_defconfig
@@ -47,6 +47,7 @@ CONFIG_NAND=y
 CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 CONFIG_SPL_NAND_SIMPLE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/omap3_pandora_defconfig b/configs/omap3_pandora_defconfig
index 5cf4bdff37..432bedcf8e 100644
--- a/configs/omap3_pandora_defconfig
+++ b/configs/omap3_pandora_defconfig
@@ -28,6 +28,7 @@ CONFIG_MMC_OMAP_HS=y
 CONFIG_NAND=y
 CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_FAT_WRITE=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/omap3_zoom1_defconfig b/configs/omap3_zoom1_defconfig
index 2b67735ef5..d7d250f7aa 100644
--- a/configs/omap3_zoom1_defconfig
+++ b/configs/omap3_zoom1_defconfig
@@ -35,6 +35,7 @@ CONFIG_MMC_OMAP_HS=y
 CONFIG_NAND=y
 CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_FAT_WRITE=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/omap4_panda_defconfig b/configs/omap4_panda_defconfig
index b2d6c0aec7..d546dc687e 100644
--- a/configs/omap4_panda_defconfig
+++ b/configs/omap4_panda_defconfig
@@ -28,6 +28,7 @@ CONFIG_ENV_FAT_INTERFACE="mmc"
 CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
 CONFIG_MMC_OMAP_HS=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/omap4_sdp4430_defconfig b/configs/omap4_sdp4430_defconfig
index 13c4dd5b38..4c86b55143 100644
--- a/configs/omap4_sdp4430_defconfig
+++ b/configs/omap4_sdp4430_defconfig
@@ -26,6 +26,7 @@ CONFIG_CMD_EXT4_WRITE=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_FAT_WRITE=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/omap5_uevm_defconfig b/configs/omap5_uevm_defconfig
index 6e860ef5e3..c4009600c5 100644
--- a/configs/omap5_uevm_defconfig
+++ b/configs/omap5_uevm_defconfig
@@ -40,6 +40,7 @@ CONFIG_CMD_TCA642X=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_SCSI=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig
index d67e691c0c..14a9d199fa 100644
--- a/configs/omapl138_lcdk_defconfig
+++ b/configs/omapl138_lcdk_defconfig
@@ -37,5 +37,6 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DAVINCI_SPI=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/pcm051_rev1_defconfig b/configs/pcm051_rev1_defconfig
index 897f1ceeb3..1eda7acf13 100644
--- a/configs/pcm051_rev1_defconfig
+++ b/configs/pcm051_rev1_defconfig
@@ -55,6 +55,7 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_HOST=y
diff --git a/configs/pcm051_rev3_defconfig b/configs/pcm051_rev3_defconfig
index 6462733f0a..debdbd5d8a 100644
--- a/configs/pcm051_rev3_defconfig
+++ b/configs/pcm051_rev3_defconfig
@@ -55,6 +55,7 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_HOST=y
diff --git a/configs/pengwyn_defconfig b/configs/pengwyn_defconfig
index 569f12c4b0..fc8791250f 100644
--- a/configs/pengwyn_defconfig
+++ b/configs/pengwyn_defconfig
@@ -58,6 +58,7 @@ CONFIG_MMC_OMAP_HS=y
 CONFIG_NAND=y
 CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_HOST=y
diff --git a/configs/pepper_defconfig b/configs/pepper_defconfig
index 012e45cdd9..10981a2f4c 100644
--- a/configs/pepper_defconfig
+++ b/configs/pepper_defconfig
@@ -45,6 +45,7 @@ CONFIG_PHY_MICREL=y
 CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_NETDEVICES=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_FAT_WRITE=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/pm9261_defconfig b/configs/pm9261_defconfig
index f1b932847c..ddf09313ab 100644
--- a/configs/pm9261_defconfig
+++ b/configs/pm9261_defconfig
@@ -43,6 +43,7 @@ CONFIG_PINCTRL=y
 CONFIG_PINCTRL_AT91=y
 CONFIG_DM_SERIAL=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/pm9263_defconfig b/configs/pm9263_defconfig
index 26dc533948..618e29d49f 100644
--- a/configs/pm9263_defconfig
+++ b/configs/pm9263_defconfig
@@ -41,6 +41,7 @@ CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_DATAFLASH=y
 CONFIG_DM_SERIAL=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/porter_defconfig b/configs/porter_defconfig
index 8b0a91c8a3..326a7432e1 100644
--- a/configs/porter_defconfig
+++ b/configs/porter_defconfig
@@ -40,6 +40,7 @@ CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
 CONFIG_BAUDRATE=38400
 CONFIG_SCIF_CONSOLE=y
+CONFIG_SPI=y
 CONFIG_SH_QSPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/portl2_defconfig b/configs/portl2_defconfig
index 75ef2cca48..58f3ccd3cf 100644
--- a/configs/portl2_defconfig
+++ b/configs/portl2_defconfig
@@ -28,6 +28,7 @@ CONFIG_ENV_IS_IN_EEPROM=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_KIRKWOOD_SPI=y
 CONFIG_BCH=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/pxm2_defconfig b/configs/pxm2_defconfig
index 38370ee8d8..11198b8fd2 100644
--- a/configs/pxm2_defconfig
+++ b/configs/pxm2_defconfig
@@ -64,6 +64,7 @@ CONFIG_MTD_UBI_FASTMAP=y
 CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
 CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_HOST=y
diff --git a/configs/qemu-x86_64_defconfig b/configs/qemu-x86_64_defconfig
index 67e9a45fbc..033a18b156 100644
--- a/configs/qemu-x86_64_defconfig
+++ b/configs/qemu-x86_64_defconfig
@@ -58,6 +58,7 @@ CONFIG_SPL_SYSCON=y
 CONFIG_CPU=y
 CONFIG_DEBUG_UART_BASE=0x3f8
 CONFIG_DEBUG_UART_CLOCK=1843200
+CONFIG_SPI=y
 CONFIG_SPL_TIMER=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
diff --git a/configs/qemu-x86_defconfig b/configs/qemu-x86_defconfig
index 7ce97ff091..b0b77d7958 100644
--- a/configs/qemu-x86_defconfig
+++ b/configs/qemu-x86_defconfig
@@ -39,6 +39,7 @@ CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_CPU=y
 CONFIG_NVME=y
+CONFIG_SPI=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
 CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
diff --git a/configs/qemu-x86_efi_payload32_defconfig b/configs/qemu-x86_efi_payload32_defconfig
index 11a4a9e832..6970d27b87 100644
--- a/configs/qemu-x86_efi_payload32_defconfig
+++ b/configs/qemu-x86_efi_payload32_defconfig
@@ -35,6 +35,7 @@ CONFIG_EFI_PARTITION=y
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_CPU=y
+CONFIG_SPI=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
 CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
diff --git a/configs/qemu-x86_efi_payload64_defconfig b/configs/qemu-x86_efi_payload64_defconfig
index d123de2011..44ca364ba4 100644
--- a/configs/qemu-x86_efi_payload64_defconfig
+++ b/configs/qemu-x86_efi_payload64_defconfig
@@ -36,6 +36,7 @@ CONFIG_EFI_PARTITION=y
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_CPU=y
+CONFIG_SPI=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
 CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
diff --git a/configs/rastaban_defconfig b/configs/rastaban_defconfig
index 5acfe22b0a..27a71a7728 100644
--- a/configs/rastaban_defconfig
+++ b/configs/rastaban_defconfig
@@ -60,6 +60,7 @@ CONFIG_MTD_UBI_FASTMAP=y
 CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
 CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_HOST=y
diff --git a/configs/rut_defconfig b/configs/rut_defconfig
index 6ec8ff3571..034943b03a 100644
--- a/configs/rut_defconfig
+++ b/configs/rut_defconfig
@@ -65,6 +65,7 @@ CONFIG_MTD_UBI_FASTMAP=y
 CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
 CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_HOST=y
diff --git a/configs/sama5d27_som1_ek_mmc_defconfig b/configs/sama5d27_som1_ek_mmc_defconfig
index f0cbba06e8..aaa0a6de1e 100644
--- a/configs/sama5d27_som1_ek_mmc_defconfig
+++ b/configs/sama5d27_som1_ek_mmc_defconfig
@@ -76,6 +76,7 @@ CONFIG_DEBUG_UART_CLOCK=82000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TIMER=y
 CONFIG_SPL_TIMER=y
diff --git a/configs/sama5d2_xplained_mmc_defconfig b/configs/sama5d2_xplained_mmc_defconfig
index f8e1fc3761..4eacfb9d7d 100644
--- a/configs/sama5d2_xplained_mmc_defconfig
+++ b/configs/sama5d2_xplained_mmc_defconfig
@@ -69,6 +69,7 @@ CONFIG_DEBUG_UART_CLOCK=83000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TIMER=y
 CONFIG_SPL_TIMER=y
diff --git a/configs/sama5d2_xplained_spiflash_defconfig b/configs/sama5d2_xplained_spiflash_defconfig
index 18b998707b..dd1ac66d50 100644
--- a/configs/sama5d2_xplained_spiflash_defconfig
+++ b/configs/sama5d2_xplained_spiflash_defconfig
@@ -67,6 +67,7 @@ CONFIG_DEBUG_UART_CLOCK=83000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TIMER=y
 CONFIG_SPL_TIMER=y
diff --git a/configs/sama5d36ek_cmp_mmc_defconfig b/configs/sama5d36ek_cmp_mmc_defconfig
index 2c3f6ab512..02c194141c 100644
--- a/configs/sama5d36ek_cmp_mmc_defconfig
+++ b/configs/sama5d36ek_cmp_mmc_defconfig
@@ -54,6 +54,7 @@ CONFIG_DEBUG_UART_CLOCK=132000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/sama5d36ek_cmp_nandflash_defconfig b/configs/sama5d36ek_cmp_nandflash_defconfig
index 72b30af3ac..60897bcab3 100644
--- a/configs/sama5d36ek_cmp_nandflash_defconfig
+++ b/configs/sama5d36ek_cmp_nandflash_defconfig
@@ -54,6 +54,7 @@ CONFIG_DEBUG_UART_CLOCK=132000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/sama5d36ek_cmp_spiflash_defconfig b/configs/sama5d36ek_cmp_spiflash_defconfig
index 67c1ab63aa..51309d282d 100644
--- a/configs/sama5d36ek_cmp_spiflash_defconfig
+++ b/configs/sama5d36ek_cmp_spiflash_defconfig
@@ -54,6 +54,7 @@ CONFIG_DEBUG_UART_CLOCK=132000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig
index 13388617fd..9726028e73 100644
--- a/configs/sama5d3xek_mmc_defconfig
+++ b/configs/sama5d3xek_mmc_defconfig
@@ -74,6 +74,7 @@ CONFIG_DEBUG_UART_CLOCK=132000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TIMER=y
 CONFIG_SPL_TIMER=y
diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig
index 69b735ae77..d07da42d32 100644
--- a/configs/sama5d3xek_nandflash_defconfig
+++ b/configs/sama5d3xek_nandflash_defconfig
@@ -69,6 +69,7 @@ CONFIG_DEBUG_UART_CLOCK=132000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TIMER=y
 CONFIG_SPL_TIMER=y
diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig
index 35b4202a72..4eb9a24ed4 100644
--- a/configs/sama5d3xek_spiflash_defconfig
+++ b/configs/sama5d3xek_spiflash_defconfig
@@ -70,6 +70,7 @@ CONFIG_DEBUG_UART_CLOCK=132000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TIMER=y
 CONFIG_SPL_TIMER=y
diff --git a/configs/sama5d4_xplained_mmc_defconfig b/configs/sama5d4_xplained_mmc_defconfig
index 082ee4b718..b48df824f5 100644
--- a/configs/sama5d4_xplained_mmc_defconfig
+++ b/configs/sama5d4_xplained_mmc_defconfig
@@ -67,6 +67,7 @@ CONFIG_DEBUG_UART_CLOCK=100000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TIMER=y
 CONFIG_SPL_TIMER=y
diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig
index 4da477338b..1cb2793a86 100644
--- a/configs/sama5d4_xplained_nandflash_defconfig
+++ b/configs/sama5d4_xplained_nandflash_defconfig
@@ -65,6 +65,7 @@ CONFIG_DEBUG_UART_CLOCK=100000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TIMER=y
 CONFIG_SPL_TIMER=y
diff --git a/configs/sama5d4_xplained_spiflash_defconfig b/configs/sama5d4_xplained_spiflash_defconfig
index c6010c638f..80aad3c543 100644
--- a/configs/sama5d4_xplained_spiflash_defconfig
+++ b/configs/sama5d4_xplained_spiflash_defconfig
@@ -67,6 +67,7 @@ CONFIG_DEBUG_UART_CLOCK=100000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TIMER=y
 CONFIG_SPL_TIMER=y
diff --git a/configs/sama5d4ek_mmc_defconfig b/configs/sama5d4ek_mmc_defconfig
index 22328948de..772047ab88 100644
--- a/configs/sama5d4ek_mmc_defconfig
+++ b/configs/sama5d4ek_mmc_defconfig
@@ -70,6 +70,7 @@ CONFIG_DEBUG_UART_CLOCK=88000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TIMER=y
 CONFIG_SPL_TIMER=y
diff --git a/configs/sama5d4ek_nandflash_defconfig b/configs/sama5d4ek_nandflash_defconfig
index b618aee4cf..8c2cad28c4 100644
--- a/configs/sama5d4ek_nandflash_defconfig
+++ b/configs/sama5d4ek_nandflash_defconfig
@@ -68,6 +68,7 @@ CONFIG_DEBUG_UART_CLOCK=88000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TIMER=y
 CONFIG_SPL_TIMER=y
diff --git a/configs/sama5d4ek_spiflash_defconfig b/configs/sama5d4ek_spiflash_defconfig
index 07129bda6f..01f6bdaf05 100644
--- a/configs/sama5d4ek_spiflash_defconfig
+++ b/configs/sama5d4ek_spiflash_defconfig
@@ -67,6 +67,7 @@ CONFIG_DEBUG_UART_CLOCK=88000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_TIMER=y
 CONFIG_SPL_TIMER=y
diff --git a/configs/sh7752evb_defconfig b/configs/sh7752evb_defconfig
index c7ee40549b..8919d6d000 100644
--- a/configs/sh7752evb_defconfig
+++ b/configs/sh7752evb_defconfig
@@ -37,5 +37,6 @@ CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_SCIF_CONSOLE=y
+CONFIG_SPI=y
 CONFIG_SH_SPI=y
 CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/configs/sh7753evb_defconfig b/configs/sh7753evb_defconfig
index 9db700a526..a8a3148b2b 100644
--- a/configs/sh7753evb_defconfig
+++ b/configs/sh7753evb_defconfig
@@ -36,5 +36,6 @@ CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_SCIF_CONSOLE=y
+CONFIG_SPI=y
 CONFIG_SH_SPI=y
 CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/configs/sh7757lcr_defconfig b/configs/sh7757lcr_defconfig
index 189c5c2fb5..92ce10fab8 100644
--- a/configs/sh7757lcr_defconfig
+++ b/configs/sh7757lcr_defconfig
@@ -36,5 +36,6 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_SCIF_CONSOLE=y
+CONFIG_SPI=y
 CONFIG_SH_SPI=y
 CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/configs/silk_defconfig b/configs/silk_defconfig
index 6cdf03d4da..f1638d976d 100644
--- a/configs/silk_defconfig
+++ b/configs/silk_defconfig
@@ -42,6 +42,7 @@ CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
 CONFIG_BAUDRATE=38400
 CONFIG_SCIF_CONSOLE=y
+CONFIG_SPI=y
 CONFIG_SH_QSPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig
index 4fea6e58de..0336a414a4 100644
--- a/configs/socfpga_arria5_defconfig
+++ b/configs/socfpga_arria5_defconfig
@@ -58,6 +58,7 @@ CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_CADENCE_QSPI=y
 CONFIG_DESIGNWARE_SPI=y
 CONFIG_USB=y
diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig
index 48d118a714..2ad76ccc36 100644
--- a/configs/socfpga_cyclone5_defconfig
+++ b/configs/socfpga_cyclone5_defconfig
@@ -58,6 +58,7 @@ CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_CADENCE_QSPI=y
 CONFIG_DESIGNWARE_SPI=y
 CONFIG_USB=y
diff --git a/configs/socfpga_de0_nano_soc_defconfig b/configs/socfpga_de0_nano_soc_defconfig
index d03c88414f..7dea99a7b3 100644
--- a/configs/socfpga_de0_nano_soc_defconfig
+++ b/configs/socfpga_de0_nano_soc_defconfig
@@ -52,6 +52,7 @@ CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_CADENCE_QSPI=y
 CONFIG_DESIGNWARE_SPI=y
 CONFIG_USB=y
diff --git a/configs/socfpga_de10_nano_defconfig b/configs/socfpga_de10_nano_defconfig
index 21b806af3c..163d3ce96f 100644
--- a/configs/socfpga_de10_nano_defconfig
+++ b/configs/socfpga_de10_nano_defconfig
@@ -51,6 +51,7 @@ CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_CADENCE_QSPI=y
 CONFIG_DESIGNWARE_SPI=y
 CONFIG_USB=y
diff --git a/configs/socfpga_de1_soc_defconfig b/configs/socfpga_de1_soc_defconfig
index fc9e90ea19..84c7d73a56 100644
--- a/configs/socfpga_de1_soc_defconfig
+++ b/configs/socfpga_de1_soc_defconfig
@@ -52,6 +52,7 @@ CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_DWC2=y
diff --git a/configs/socfpga_is1_defconfig b/configs/socfpga_is1_defconfig
index 33ad943309..b2b5fcfa9b 100644
--- a/configs/socfpga_is1_defconfig
+++ b/configs/socfpga_is1_defconfig
@@ -51,4 +51,5 @@ CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_CADENCE_QSPI=y
diff --git a/configs/socfpga_mcvevk_defconfig b/configs/socfpga_mcvevk_defconfig
index 0b4ad4118f..7b84f060ba 100644
--- a/configs/socfpga_mcvevk_defconfig
+++ b/configs/socfpga_mcvevk_defconfig
@@ -51,6 +51,7 @@ CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_CADENCE_QSPI=y
 CONFIG_DESIGNWARE_SPI=y
 CONFIG_USB=y
diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig
index 2a07237df5..6969c16ba4 100644
--- a/configs/socfpga_sockit_defconfig
+++ b/configs/socfpga_sockit_defconfig
@@ -58,6 +58,7 @@ CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_CADENCE_QSPI=y
 CONFIG_DESIGNWARE_SPI=y
 CONFIG_USB=y
diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig
index df1e340958..c1246aa126 100644
--- a/configs/socfpga_socrates_defconfig
+++ b/configs/socfpga_socrates_defconfig
@@ -58,6 +58,7 @@ CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_CADENCE_QSPI=y
 CONFIG_DESIGNWARE_SPI=y
 CONFIG_USB=y
diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig
index 07f529b3cf..3c034a4fbe 100644
--- a/configs/socfpga_sr1500_defconfig
+++ b/configs/socfpga_sr1500_defconfig
@@ -56,5 +56,6 @@ CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_CADENCE_QSPI=y
 CONFIG_USE_TINY_PRINTF=y
diff --git a/configs/socfpga_vining_fpga_defconfig b/configs/socfpga_vining_fpga_defconfig
index a84b481089..93947b027c 100644
--- a/configs/socfpga_vining_fpga_defconfig
+++ b/configs/socfpga_vining_fpga_defconfig
@@ -75,6 +75,7 @@ CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_CADENCE_QSPI=y
 CONFIG_DESIGNWARE_SPI=y
 CONFIG_USB=y
diff --git a/configs/som-db5800-som-6867_defconfig b/configs/som-db5800-som-6867_defconfig
index 4489ddf5fb..93de1da1b4 100644
--- a/configs/som-db5800-som-6867_defconfig
+++ b/configs/som-db5800-som-6867_defconfig
@@ -45,6 +45,7 @@ CONFIG_CPU=y
 CONFIG_E1000=y
 CONFIG_DEBUG_UART_BASE=0x3f8
 CONFIG_DEBUG_UART_CLOCK=1843200
+CONFIG_SPI=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
 CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
diff --git a/configs/stmark2_defconfig b/configs/stmark2_defconfig
index 38ea407b83..52f0b06ed5 100644
--- a/configs/stmark2_defconfig
+++ b/configs/stmark2_defconfig
@@ -28,5 +28,6 @@ CONFIG_MTD_DEVICE=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ISSI=y
 CONFIG_SPI_FLASH_MTD=y
+CONFIG_SPI=y
 CONFIG_CF_SPI=y
 CONFIG_REGEX=y
diff --git a/configs/stout_defconfig b/configs/stout_defconfig
index aab997b0f0..41d196e46f 100644
--- a/configs/stout_defconfig
+++ b/configs/stout_defconfig
@@ -40,6 +40,7 @@ CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
 CONFIG_BAUDRATE=38400
 CONFIG_SCIF_CONSOLE=y
+CONFIG_SPI=y
 CONFIG_SH_QSPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/tao3530_defconfig b/configs/tao3530_defconfig
index ee3d19af9a..54d94216f6 100644
--- a/configs/tao3530_defconfig
+++ b/configs/tao3530_defconfig
@@ -29,6 +29,7 @@ CONFIG_NAND=y
 CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 CONFIG_SPL_NAND_SIMPLE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig b/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig
index 1888f08928..616d94f38a 100644
--- a/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig
+++ b/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig
@@ -48,6 +48,7 @@ CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_INTEL=y
 CONFIG_WINBOND_W83627=y
 CONFIG_E1000=y
+CONFIG_SPI=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
 CONFIG_USB_ETHER_MCS7830=y
diff --git a/configs/theadorable-x86-conga-qa3-e3845_defconfig b/configs/theadorable-x86-conga-qa3-e3845_defconfig
index 4c9492cf1f..37839323e4 100644
--- a/configs/theadorable-x86-conga-qa3-e3845_defconfig
+++ b/configs/theadorable-x86-conga-qa3-e3845_defconfig
@@ -47,6 +47,7 @@ CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_INTEL=y
 CONFIG_WINBOND_W83627=y
 CONFIG_E1000=y
+CONFIG_SPI=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
 CONFIG_USB_ETHER_MCS7830=y
diff --git a/configs/theadorable-x86-dfi-bt700_defconfig b/configs/theadorable-x86-dfi-bt700_defconfig
index 348d917b3b..1be6560ed4 100644
--- a/configs/theadorable-x86-dfi-bt700_defconfig
+++ b/configs/theadorable-x86-dfi-bt700_defconfig
@@ -45,6 +45,7 @@ CONFIG_CPU=y
 CONFIG_DM_I2C=y
 CONFIG_NUVOTON_NCT6102D=y
 CONFIG_E1000=y
+CONFIG_SPI=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
 CONFIG_USB_ETHER_MCS7830=y
diff --git a/configs/thuban_defconfig b/configs/thuban_defconfig
index c30e924fb5..27e6d34481 100644
--- a/configs/thuban_defconfig
+++ b/configs/thuban_defconfig
@@ -60,6 +60,7 @@ CONFIG_MTD_UBI_FASTMAP=y
 CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
 CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_HOST=y
diff --git a/configs/ti816x_evm_defconfig b/configs/ti816x_evm_defconfig
index 289908c198..76e0b34dad 100644
--- a/configs/ti816x_evm_defconfig
+++ b/configs/ti816x_evm_defconfig
@@ -46,5 +46,6 @@ CONFIG_NAND=y
 CONFIG_NAND_OMAP_GPMC_PREFETCH=y
 CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 # CONFIG_USE_PRIVATE_LIBGCC is not set
diff --git a/configs/tplink_wdr4300_defconfig b/configs/tplink_wdr4300_defconfig
index e973ef23ef..f829dc8fed 100644
--- a/configs/tplink_wdr4300_defconfig
+++ b/configs/tplink_wdr4300_defconfig
@@ -41,6 +41,7 @@ CONFIG_AG7XXX=y
 CONFIG_PINCTRL=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_ATH79_SPI=y
 CONFIG_USB=y
diff --git a/configs/usb_a9263_dataflash_defconfig b/configs/usb_a9263_dataflash_defconfig
index e8a84c30e2..cfa8a6b606 100644
--- a/configs/usb_a9263_dataflash_defconfig
+++ b/configs/usb_a9263_dataflash_defconfig
@@ -40,4 +40,5 @@ CONFIG_PINCTRL=y
 CONFIG_PINCTRL_AT91=y
 CONFIG_DM_SERIAL=y
 CONFIG_ATMEL_USART=y
+CONFIG_SPI=y
 CONFIG_DM_SPI=y
diff --git a/configs/work_92105_defconfig b/configs/work_92105_defconfig
index c007ab8b9a..165fe09801 100644
--- a/configs/work_92105_defconfig
+++ b/configs/work_92105_defconfig
@@ -37,4 +37,5 @@ CONFIG_DM_GPIO=y
 CONFIG_PHYLIB=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_LPC32XX_SSP=y
diff --git a/drivers/net/e1000_spi.c b/drivers/net/e1000_spi.c
index cb5f93d652..b38f4df9f3 100644
--- a/drivers/net/e1000_spi.c
+++ b/drivers/net/e1000_spi.c
@@ -78,8 +78,6 @@ static inline struct e1000_hw *e1000_hw_from_spi(struct spi_slave *spi)
 }
 
 /* Not sure why all of these are necessary */
-void spi_init_r(void) { /* Nothing to do */ }
-void spi_init_f(void) { /* Nothing to do */ }
 void spi_init(void)   { /* Nothing to do */ }
 
 struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 22097292d2..1c1e33b523 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -1,4 +1,7 @@
-menu "SPI Support"
+menuconfig SPI
+	bool "SPI Support"
+
+if SPI
 
 config DM_SPI
 	bool "Enable Driver Model for SPI drivers"
@@ -327,4 +330,4 @@ config OMAP3_SPI
 	  (McSPI). This driver be used to access SPI chips on platforms
 	  embedding this OMAP3 McSPI IP core.
 
-endmenu # menu "SPI Support"
+endif # menu "SPI Support"
diff --git a/drivers/spi/cf_spi.c b/drivers/spi/cf_spi.c
index 7be9427781..68317ed633 100644
--- a/drivers/spi/cf_spi.c
+++ b/drivers/spi/cf_spi.c
@@ -288,14 +288,6 @@ int spi_cs_is_valid(unsigned int bus, unsigned int cs)
 		return 0;
 }
 
-void spi_init_f(void)
-{
-}
-
-void spi_init_r(void)
-{
-}
-
 void spi_init(void)
 {
 	cfspi_init();
diff --git a/drivers/spi/fsl_dspi.c b/drivers/spi/fsl_dspi.c
index 42086197d9..41d1ba2fa5 100644
--- a/drivers/spi/fsl_dspi.c
+++ b/drivers/spi/fsl_dspi.c
@@ -396,16 +396,6 @@ void spi_init(void)
 	/* Nothing to do */
 }
 
-void spi_init_f(void)
-{
-	/* Nothing to do */
-}
-
-void spi_init_r(void)
-{
-	/* Nothing to do */
-}
-
 int spi_cs_is_valid(unsigned int bus, unsigned int cs)
 {
 	if (((cs >= 0) && (cs < 8)) && ((bus >= 0) && (bus < 8)))
diff --git a/include/common.h b/include/common.h
index 62081face0..624daaca37 100644
--- a/include/common.h
+++ b/include/common.h
@@ -451,19 +451,11 @@ int  eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned c
 #define eeprom_write(dev_addr, offset, buffer, cnt) ((void)-ENOSYS)
 #endif
 
-/*
- * Set this up regardless of board
- * type, to prevent errors.
- */
-#if defined(CONFIG_SPI) || !defined(CONFIG_SYS_I2C_EEPROM_ADDR)
-# define CONFIG_SYS_DEF_EEPROM_ADDR 0
-#else
-#if !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
+#if !defined(CONFIG_ENV_EEPROM_IS_ON_I2C) && defined(CONFIG_SYS_I2C_EEPROM_ADDR)
 # define CONFIG_SYS_DEF_EEPROM_ADDR CONFIG_SYS_I2C_EEPROM_ADDR
 #endif
-#endif /* CONFIG_SPI || !defined(CONFIG_SYS_I2C_EEPROM_ADDR) */
 
-#if defined(CONFIG_SPI)
+#if defined(CONFIG_MPC8XX_SPI)
 extern void spi_init_f (void);
 extern void spi_init_r (void);
 extern ssize_t spi_read	 (uchar *, int, uchar *, int);
diff --git a/include/configs/alt.h b/include/configs/alt.h
index 535147ee51..427c24e9b6 100644
--- a/include/configs/alt.h
+++ b/include/configs/alt.h
@@ -36,10 +36,7 @@
 #define RCAR_GEN2_SDRAM_SIZE		(1024u * 1024 * 1024)
 #define RCAR_GEN2_UBOOT_SDRAM_SIZE	(512 * 1024 * 1024)
 
-/* SCIF */
-
 /* FLASH */
-#define CONFIG_SPI
 #define CONFIG_SPI_FLASH_QUAD
 
 /* SH Ether */
diff --git a/include/configs/brppt1.h b/include/configs/brppt1.h
index 3d85c41652..72a265ddd1 100644
--- a/include/configs/brppt1.h
+++ b/include/configs/brppt1.h
@@ -227,7 +227,6 @@ MMCARGS
 
 #if defined(CONFIG_SPI_BOOT)
 /* McSPI IP block */
-#define CONFIG_SPI
 #define CONFIG_SF_DEFAULT_SPEED		24000000
 
 #define CONFIG_SPL_SPI_LOAD
diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h
index 8fa88d028b..53ac04811c 100644
--- a/include/configs/da850evm.h
+++ b/include/configs/da850evm.h
@@ -136,7 +136,6 @@
 #define CONFIG_SYS_NS16550_CLK	clk_get(DAVINCI_UART2_CLKID)
 #define CONFIG_CONS_INDEX	1		/* use UART0 for console */
 
-#define CONFIG_SPI
 #define CONFIG_SYS_SPI_CLK		clk_get(DAVINCI_SPI1_CLKID)
 #ifdef CONFIG_SPL_BUILD
 #define CONFIG_SYS_SPI_BASE		DAVINCI_SPI1_BASE
diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h
index 066c4a5f26..0408faa6ab 100644
--- a/include/configs/devkit8000.h
+++ b/include/configs/devkit8000.h
@@ -58,11 +58,6 @@
 #define CONFIG_DM9000_NO_SROM		1
 #undef	CONFIG_DM9000_DEBUG
 
-/* SPI */
-#undef CONFIG_SPI
-
-/* I2C */
-
 /* TWL4030 */
 #define CONFIG_TWL4030_LED		1
 
diff --git a/include/configs/ea20.h b/include/configs/ea20.h
index 221e105bed..672147bd77 100644
--- a/include/configs/ea20.h
+++ b/include/configs/ea20.h
@@ -60,7 +60,6 @@
 #define CONFIG_SYS_NS16550_CLK	clk_get(DAVINCI_UART2_CLKID)
 #define CONFIG_CONS_INDEX	1		/* use UART0 for console */
 
-#define CONFIG_SPI
 #define CONFIG_SYS_SPI_BASE		DAVINCI_SPI1_BASE
 #define CONFIG_SYS_SPI_CLK		clk_get(DAVINCI_SPI1_CLKID)
 #define CONFIG_SF_DEFAULT_SPEED		30000000
diff --git a/include/configs/gose.h b/include/configs/gose.h
index 0d00497e9e..e99d6fb11c 100644
--- a/include/configs/gose.h
+++ b/include/configs/gose.h
@@ -37,11 +37,6 @@
 #define RCAR_GEN2_SDRAM_SIZE		0x40000000
 #define RCAR_GEN2_UBOOT_SDRAM_SIZE	0x20000000
 
-/* SCIF */
-
-/* FLASH */
-#define CONFIG_SPI
-
 /* SH Ether */
 #define CONFIG_SH_ETHER
 #define CONFIG_SH_ETHER_USE_PORT	0
diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h
index af798139a3..50bf3b0f81 100644
--- a/include/configs/koelsch.h
+++ b/include/configs/koelsch.h
@@ -37,11 +37,6 @@
 #define RCAR_GEN2_SDRAM_SIZE		(2048u * 1024 * 1024)
 #define RCAR_GEN2_UBOOT_SDRAM_SIZE	(512 * 1024 * 1024)
 
-/* SCIF */
-
-/* FLASH */
-#define CONFIG_SPI
-
 /* SH Ether */
 #define CONFIG_SH_ETHER
 #define CONFIG_SH_ETHER_USE_PORT	0
diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h
index 98a15d5861..07bf802a04 100644
--- a/include/configs/legoev3.h
+++ b/include/configs/legoev3.h
@@ -123,7 +123,6 @@
 #define CONFIG_SYS_NS16550_CLK	clk_get(DAVINCI_UART2_CLKID)
 #define CONFIG_CONS_INDEX	1		/* use UART0 for console */
 
-#define CONFIG_SPI
 #define CONFIG_SYS_SPI_BASE		DAVINCI_SPI0_BASE
 #define CONFIG_SYS_SPI_CLK		clk_get(DAVINCI_SPI0_CLKID)
 #define CONFIG_SF_DEFAULT_SPEED		50000000
diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h
index 8d73bdf59d..2ee8979493 100644
--- a/include/configs/microblaze-generic.h
+++ b/include/configs/microblaze-generic.h
@@ -109,7 +109,6 @@
 
 #ifdef SPIFLASH
 # define CONFIG_SYS_SPI_BASE		XILINX_SPI_FLASH_BASEADDR
-# define CONFIG_SPI			1
 # define CONFIG_SF_DEFAULT_MODE		SPI_MODE_3
 # define CONFIG_SF_DEFAULT_SPEED	XILINX_SPI_FLASH_MAX_FREQ
 # define CONFIG_SF_DEFAULT_CS		XILINX_SPI_FLASH_CS
diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h
index 19398b46c8..acea90e6de 100644
--- a/include/configs/omapl138_lcdk.h
+++ b/include/configs/omapl138_lcdk.h
@@ -128,7 +128,6 @@
 #define CONFIG_CONS_INDEX	1		/* use UART0 for console */
 #define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
 
-#define CONFIG_SPI
 #define CONFIG_SYS_SPI_BASE		DAVINCI_SPI1_BASE
 #define CONFIG_SYS_SPI_CLK		clk_get(DAVINCI_SPI1_CLKID)
 #define CONFIG_SF_DEFAULT_SPEED		30000000
diff --git a/include/configs/porter.h b/include/configs/porter.h
index c8e8349c28..a676901014 100644
--- a/include/configs/porter.h
+++ b/include/configs/porter.h
@@ -37,10 +37,7 @@
 #define RCAR_GEN2_SDRAM_SIZE		(2048u * 1024 * 1024)
 #define RCAR_GEN2_UBOOT_SDRAM_SIZE	(1024u * 1024 * 1024)
 
-/* SCIF */
-
 /* FLASH */
-#define CONFIG_SPI
 #define CONFIG_SPI_FLASH_QUAD
 
 /* SH Ether */
diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index f54001b75a..a1387e0d9c 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -37,7 +37,6 @@
 #define SDRAM_BANK_SIZE			(512UL << 20UL)
 #define SDRAM_MAX_SIZE			0x80000000
 
-#define CONFIG_SPI
 #define CONFIG_SPI_FLASH_GIGADEVICE
 
 #ifndef CONFIG_SPL_BUILD
diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h
index 69e622b047..e81a1a2044 100644
--- a/include/configs/rk3128_common.h
+++ b/include/configs/rk3128_common.h
@@ -42,8 +42,6 @@
 #define CONFIG_SYS_SDRAM_BASE		0x60000000
 #define SDRAM_MAX_SIZE			0x80000000
 
-#define CONFIG_SPI
-
 #ifndef CONFIG_SPL_BUILD
 #define CONFIG_PREBOOT
 
diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h
index 76670671f0..8eb084ad00 100644
--- a/include/configs/rk3188_common.h
+++ b/include/configs/rk3188_common.h
@@ -48,8 +48,6 @@
 #define SDRAM_BANK_SIZE			(2UL << 30)
 #define SDRAM_MAX_SIZE			0x80000000
 
-#define CONFIG_SPI
-
 #ifndef CONFIG_SPL_BUILD
 
 /* usb mass storage */
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index 68efca8a18..befcfc106f 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -49,8 +49,6 @@
 #define SDRAM_BANK_SIZE			(2UL << 30)
 #define SDRAM_MAX_SIZE			0xfe000000
 
-#define CONFIG_SPI
-
 #ifndef CONFIG_SPL_BUILD
 /* usb otg */
 #define CONFIG_ROCKCHIP_USB2_PHY
diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index 6c7f1ef983..f842a63ace 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -46,8 +46,6 @@
 #define CONFIG_SYS_SDRAM_BASE		0
 #define SDRAM_MAX_SIZE			0xff000000
 
-#define CONFIG_SPI
-
 #ifndef CONFIG_SPL_BUILD
 
 /* usb mass storage */
diff --git a/include/configs/rut.h b/include/configs/rut.h
index 9f9bc718cd..e6707fafd8 100644
--- a/include/configs/rut.h
+++ b/include/configs/rut.h
@@ -119,8 +119,6 @@
 #define CONFIG_VIDEO_BMP_LOGO
 #define DA8XX_LCD_CNTL_BASE	LCD_CNTL_BASE
 
-#define CONFIG_SPI
-
 #define BOARD_LCD_RESET		115	/* Bank 3 pin 19 */
 #define CONFIG_FORMIKE
 #define DISPL_PLL_SPREAD_SPECTRUM
diff --git a/include/configs/silk.h b/include/configs/silk.h
index cd826fb291..ea286d2ad4 100644
--- a/include/configs/silk.h
+++ b/include/configs/silk.h
@@ -37,10 +37,7 @@
 #define RCAR_GEN2_SDRAM_SIZE		(1024u * 1024 * 1024)
 #define RCAR_GEN2_UBOOT_SDRAM_SIZE	(512 * 1024 * 1024)
 
-/* SCIF */
-
 /* FLASH */
-#define CONFIG_SPI
 #define CONFIG_SPI_FLASH_QUAD
 
 /* SH Ether */
diff --git a/include/configs/stout.h b/include/configs/stout.h
index 0b3a1ea6d7..fa556ed0f8 100644
--- a/include/configs/stout.h
+++ b/include/configs/stout.h
@@ -43,7 +43,6 @@
 #define CONFIG_SCIF_A
 
 /* SPI */
-#define CONFIG_SPI
 #define CONFIG_SPI_FLASH_QUAD
 
 /* SH Ether */
diff --git a/include/configs/taurus.h b/include/configs/taurus.h
index e920d7b25a..ab7dbe1419 100644
--- a/include/configs/taurus.h
+++ b/include/configs/taurus.h
@@ -116,7 +116,6 @@
 #endif
 
 /* SPI EEPROM */
-#define CONFIG_SPI
 #define TAURUS_SPI_MASK (1 << 4)
 #define TAURUS_SPI_CS_PIN	AT91_PIN_PA3
 
diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h
index 2f42375856..b03286ad68 100644
--- a/include/configs/ti_armv7_common.h
+++ b/include/configs/ti_armv7_common.h
@@ -98,11 +98,6 @@
 #define CONFIG_DM_I2C_COMPAT
 #endif
 
-/* McSPI IP block */
-#define CONFIG_SPI
-
-/* GPIO block */
-
 /*
  * The following are general good-enough settings for U-Boot.  We set a
  * large malloc pool as we generally have a lot of DDR, and we opt for
diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h
index 6422852010..babe987707 100644
--- a/include/configs/x86-common.h
+++ b/include/configs/x86-common.h
@@ -95,11 +95,6 @@
 /* allow to overwrite serial and ethaddr */
 #define CONFIG_ENV_OVERWRITE
 
-/*-----------------------------------------------------------------------
- * FLASH configuration
- */
-#define CONFIG_SPI
-
 /*-----------------------------------------------------------------------
  * Environment configuration
  */
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index fbd0ee9f4e..1ae4bf30d0 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -2119,7 +2119,6 @@ CONFIG_SPEAR_UART48M
 CONFIG_SPEAR_UARTCLKMSK
 CONFIG_SPEAR_USBBOOT
 CONFIG_SPEAR_USBTTY
-CONFIG_SPI
 CONFIG_SPI_ADDR
 CONFIG_SPI_BOOTING
 CONFIG_SPI_CS_IS_VALID

commit 300e61c1ec1bcf0c06a154514c87b09a2d73f7d4
Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Date:   Thu Apr 19 17:47:41 2018 +0300

    UPSTREAM: spi: dw: invert wait condition in dw_spi_xfer
    
    While switching to readl_poll_timeout macros from custom code
    the waiting condition was accidently inverted, so it was pure
    luck that this code works at least in some conditions.
    
    Fix that by inverting exit condition for readl_poll_timeout.
    
    Fixes: c6b4f031d9 ("DW SPI: fix tx data loss on FIFO flush")
    
    Change-Id: I741ce99a6b6cf57c248426549c0047d636d9e43e
    Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 9b14ac5cc2294ac3eaae92421abff27ed3e6caae)

diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c
index 0e93b62eee..5e2d290ddc 100644
--- a/drivers/spi/designware_spi.c
+++ b/drivers/spi/designware_spi.c
@@ -425,7 +425,7 @@ static int dw_spi_xfer(struct udevice *dev, unsigned int bitlen,
 	 * in the beginning of new transfer.
 	 */
 	if (readl_poll_timeout(priv->regs + DW_SPI_SR, val,
-			       !(val & SR_TF_EMPT) || (val & SR_BUSY),
+			       (val & SR_TF_EMPT) && !(val & SR_BUSY),
 			       RX_TIMEOUT * 1000)) {
 		ret = -ETIMEDOUT;
 	}

commit 7f3cd1e4f8010ae7bed52343c6fc5a6b4ea16e05
Author: Marek Vasut <marek.vasut+renesas@gmail.com>
Date:   Tue Apr 10 16:43:47 2018 +0200

    UPSTREAM: spi: sh_qspi: Make use of the 32byte FIFO
    
    The QSPI controller on RCar Gen2 has 32byte FIFO. Instead of doing
    the SPI transmission 1 byte at time, if there is a 32byte chunk of
    data to be transferred, fill the FIFO completely and then transfer
    the data to/from the FIFO. This increases the SPI NOR access speed
    significantly.
    
    Change-Id: Idc0280488ce052492579ee8e52f6084aa0840f3b
    Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
    Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit ea5512eb095067dda27930246792d2957feb9434)

diff --git a/drivers/spi/sh_qspi.c b/drivers/spi/sh_qspi.c
index d7f558a541..5075be3cd1 100644
--- a/drivers/spi/sh_qspi.c
+++ b/drivers/spi/sh_qspi.c
@@ -36,6 +36,8 @@
 			SPCMD_BRDV0
 #define SPBFCR_TXRST	BIT(7)
 #define SPBFCR_RXRST	BIT(6)
+#define SPBFCR_TXTRG	0x30
+#define SPBFCR_RXTRG	0x07
 
 /* SH QSPI register set */
 struct sh_qspi_regs {
@@ -201,8 +203,8 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
 	     void *din, unsigned long flags)
 {
 	struct sh_qspi_slave *ss = to_sh_qspi(slave);
-	u32 nbyte;
-	int ret = 0;
+	u32 nbyte, chunk;
+	int i, ret = 0;
 	u8 dtdata = 0, drdata;
 	u8 *tdata = &dtdata, *rdata = &drdata;
 	u32 *spbmul0 = &ss->regs->spbmul0;
@@ -237,26 +239,38 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
 		rdata = din;
 
 	while (nbyte > 0) {
+		/*
+		 * Check if there is 32 Byte chunk and if there is, transfer
+		 * it in one burst, otherwise transfer on byte-by-byte basis.
+		 */
+		chunk = (nbyte >= 32) ? 32 : 1;
+
+		clrsetbits_8(&ss->regs->spbfcr, SPBFCR_TXTRG | SPBFCR_RXTRG,
+			     chunk == 32 ? SPBFCR_TXTRG | SPBFCR_RXTRG : 0);
+
 		ret = wait_for_bit_8(&ss->regs->spsr, SPSR_SPTEF,
 				     true, 1000, true);
 		if (ret)
 			return ret;
 
-		writeb(*tdata, (u8 *)(&ss->regs->spdr));
+		for (i = 0; i < chunk; i++) {
+			writeb(*tdata, &ss->regs->spdr);
+			if (dout != NULL)
+				tdata++;
+		}
 
 		ret = wait_for_bit_8(&ss->regs->spsr, SPSR_SPRFF,
 				     true, 1000, true);
 		if (ret)
 			return ret;
 
-		*rdata = readb((u8 *)(&ss->regs->spdr));
-
-		if (dout != NULL)
-			tdata++;
-		if (din != NULL)
-			rdata++;
+		for (i = 0; i < chunk; i++) {
+			*rdata = readb(&ss->regs->spdr);
+			if (din != NULL)
+				rdata++;
+		}
 
-		nbyte--;
+		nbyte -= chunk;
 	}
 
 	if (flags & SPI_XFER_END)

commit 9d14f4ef9bae3a4a973e45b86f7ae82eab0b820b
Author: Marek Vasut <marek.vasut+renesas@gmail.com>
Date:   Tue Apr 10 16:58:46 2018 +0200

    UPSTREAM: spi: sh_qspi: Replace ad hoc waiting with wait_for_bit
    
    Replace the ad-hoc endless loops with wait_for_bit() with
    reasonable timeout. Note that the loops had internal 10uS
    delays, although there is no reason for those on this HW,
    so they are dropped.
    
    Change-Id: I0d004adc09e2fb32e88b17b0f060aecc0b7bda35
    Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
    Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 9573db654d1999a1dfde6469782aa8d7cf3d589f)

diff --git a/drivers/spi/sh_qspi.c b/drivers/spi/sh_qspi.c
index 8eaa6744cc..d7f558a541 100644
--- a/drivers/spi/sh_qspi.c
+++ b/drivers/spi/sh_qspi.c
@@ -11,6 +11,7 @@
 #include <console.h>
 #include <malloc.h>
 #include <spi.h>
+#include <wait_bit.h>
 #include <asm/arch/rmobile.h>
 #include <asm/io.h>
 
@@ -236,23 +237,17 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
 		rdata = din;
 
 	while (nbyte > 0) {
-		while (!(readb(&ss->regs->spsr) & SPSR_SPTEF)) {
-			if (ctrlc()) {
-				puts("abort\n");
-				return 1;
-			}
-			udelay(10);
-		}
+		ret = wait_for_bit_8(&ss->regs->spsr, SPSR_SPTEF,
+				     true, 1000, true);
+		if (ret)
+			return ret;
 
 		writeb(*tdata, (u8 *)(&ss->regs->spdr));
 
-		while (!(readb(&ss->regs->spsr) & SPSR_SPRFF)) {
-			if (ctrlc()) {
-				puts("abort\n");
-				return 1;
-			}
-			udelay(10);
-		}
+		ret = wait_for_bit_8(&ss->regs->spsr, SPSR_SPRFF,
+				     true, 1000, true);
+		if (ret)
+			return ret;
 
 		*rdata = readb((u8 *)(&ss->regs->spdr));
 

commit 2b8aed016f04bd5aa4792ec208052ab2e74225d0
Author: Marek Vasut <marek.vasut+renesas@gmail.com>
Date:   Tue Apr 10 16:54:38 2018 +0200

    UPSTREAM: spi: sh_qspi: Drop SPBDCR wait
    
    Waiting for SPBDCR == 1 is not required and is covered by the
    subsequent wait for SPSR_SPRFF, so drop this.
    
    Change-Id: Ie943ac6feff57e478a7b2e7325eac9b5438c0374
    Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
    Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 118226495249268a35e604b2e6309801699f6224)

diff --git a/drivers/spi/sh_qspi.c b/drivers/spi/sh_qspi.c
index fc0e1fc336..8eaa6744cc 100644
--- a/drivers/spi/sh_qspi.c
+++ b/drivers/spi/sh_qspi.c
@@ -246,14 +246,6 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
 
 		writeb(*tdata, (u8 *)(&ss->regs->spdr));
 
-		while ((readw(&ss->regs->spbdcr) != SPBDCR_RXBC0)) {
-			if (ctrlc()) {
-				puts("abort\n");
-				return 1;
-			}
-			udelay(1);
-		}
-
 		while (!(readb(&ss->regs->spsr) & SPSR_SPRFF)) {
 			if (ctrlc()) {
 				puts("abort\n");

commit 7950bf5ee5714fee388297beeb69143d348c1639
Author: Marek Vasut <marek.vasut+renesas@gmail.com>
Date:   Tue Apr 10 16:47:38 2018 +0200

    UPSTREAM: spi: sh_qspi: Replace data types with short ones
    
    Just replace unsigned {char,short,long} with u{8,16,32},
    no functional change.
    
    Change-Id: Ie9a9d331acb364d9b27a72a052a511a8da61c471
    Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
    Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 0e6fa20b14ed27ef667ddb31c8e7c620417ee4f5)

diff --git a/drivers/spi/sh_qspi.c b/drivers/spi/sh_qspi.c
index 75999c812d..fc0e1fc336 100644
--- a/drivers/spi/sh_qspi.c
+++ b/drivers/spi/sh_qspi.c
@@ -38,30 +38,30 @@
 
 /* SH QSPI register set */
 struct sh_qspi_regs {
-	unsigned char spcr;
-	unsigned char sslp;
-	unsigned char sppcr;
-	unsigned char spsr;
-	unsigned long spdr;
-	unsigned char spscr;
-	unsigned char spssr;
-	unsigned char spbr;
-	unsigned char spdcr;
-	unsigned char spckd;
-	unsigned char sslnd;
-	unsigned char spnd;
-	unsigned char dummy0;
-	unsigned short spcmd0;
-	unsigned short spcmd1;
-	unsigned short spcmd2;
-	unsigned short spcmd3;
-	unsigned char spbfcr;
-	unsigned char dummy1;
-	unsigned short spbdcr;
-	unsigned long spbmul0;
-	unsigned long spbmul1;
-	unsigned long spbmul2;
-	unsigned long spbmul3;
+	u8	spcr;
+	u8	sslp;
+	u8	sppcr;
+	u8	spsr;
+	u32	spdr;
+	u8	spscr;
+	u8	spssr;
+	u8	spbr;
+	u8	spdcr;
+	u8	spckd;
+	u8	sslnd;
+	u8	spnd;
+	u8	dummy0;
+	u16	spcmd0;
+	u16	spcmd1;
+	u16	spcmd2;
+	u16	spcmd3;
+	u8	spbfcr;
+	u8	dummy1;
+	u16	spbdcr;
+	u32	spbmul0;
+	u32	spbmul1;
+	u32	spbmul2;
+	u32	spbmul3;
 };
 
 struct sh_qspi_slave {
@@ -200,11 +200,11 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
 	     void *din, unsigned long flags)
 {
 	struct sh_qspi_slave *ss = to_sh_qspi(slave);
-	unsigned long nbyte;
+	u32 nbyte;
 	int ret = 0;
-	unsigned char dtdata = 0, drdata;
-	unsigned char *tdata = &dtdata, *rdata = &drdata;
-	unsigned long *spbmul0 = &ss->regs->spbmul0;
+	u8 dtdata = 0, drdata;
+	u8 *tdata = &dtdata, *rdata = &drdata;
+	u32 *spbmul0 = &ss->regs->spbmul0;
 
 	if (dout == NULL && din == NULL) {
 		if (flags & SPI_XFER_END)
@@ -230,7 +230,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
 		writel(nbyte, spbmul0);
 
 	if (dout != NULL)
-		tdata = (unsigned char *)dout;
+		tdata = (u8 *)dout;
 
 	if (din != NULL)
 		rdata = din;
@@ -244,7 +244,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
 			udelay(10);
 		}
 
-		writeb(*tdata, (unsigned char *)(&ss->regs->spdr));
+		writeb(*tdata, (u8 *)(&ss->regs->spdr));
 
 		while ((readw(&ss->regs->spbdcr) != SPBDCR_RXBC0)) {
 			if (ctrlc()) {
@@ -262,7 +262,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
 			udelay(10);
 		}
 
-		*rdata = readb((unsigned char *)(&ss->regs->spdr));
+		*rdata = readb((u8 *)(&ss->regs->spdr));
 
 		if (dout != NULL)
 			tdata++;

commit 5d78ea082ac741984d5baa235050c492cfbd262e
Author: Marek Vasut <marek.vasut+renesas@gmail.com>
Date:   Wed Nov 29 06:29:46 2017 +0100

    UPSTREAM: mtd: spi: Add Renesas RPC SPI-flash driver
    
    Add driver for the RPC block in SPI-flash mode. This driver allows
    access to a SPI NOR flash attached to the RPC block and does not
    support RPC in Hyperflash mode. Note that this block is extremely
    selective when communicating with the SPI NOR.
    
    Change-Id: I8b936d2862a1ef4bc2451d54a1808b7b49710b17
    Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
    Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit fbebea27e16eb760f1f2109a7535003bf359ba2b)

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 643298fde2..22097292d2 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -121,6 +121,14 @@ config PIC32_SPI
 	  to access the SPI NOR flash, MMC-over-SPI on platforms based on
 	  Microchip PIC32 family devices.
 
+config RENESAS_RPC_SPI
+	bool "Renesas RPC SPI driver"
+	depends on RCAR_GEN3
+	help
+	  Enable the Renesas RPC SPI driver, used to access SPI NOR flash
+	  on Renesas RCar Gen3 SoCs. This uses driver model and requires a
+	  device tree binding to operate.
+
 config ROCKCHIP_SPI
 	bool "Rockchip SPI driver"
 	help
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 5b343af35a..955b38a4df 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -41,6 +41,7 @@ obj-$(CONFIG_MXS_SPI) += mxs_spi.o
 obj-$(CONFIG_ATCSPI200_SPI) += atcspi200_spi.o
 obj-$(CONFIG_OMAP3_SPI) += omap3_spi.o
 obj-$(CONFIG_PIC32_SPI) += pic32_spi.o
+obj-$(CONFIG_RENESAS_RPC_SPI) += renesas_rpc_spi.o
 obj-$(CONFIG_ROCKCHIP_SPI) += rk_spi.o
 obj-$(CONFIG_ROCKCHIP_SFC) += rockchip_sfc.o
 obj-$(CONFIG_SANDBOX_SPI) += sandbox_spi.o
diff --git a/drivers/spi/renesas_rpc_spi.c b/drivers/spi/renesas_rpc_spi.c
new file mode 100644
index 0000000000..e54f24c5d8
--- /dev/null
+++ b/drivers/spi/renesas_rpc_spi.c
@@ -0,0 +1,465 @@
+/*
+ * Renesas RCar Gen3 RPC QSPI driver
+ *
+ * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <clk.h>
+#include <dm.h>
+#include <dm/of_access.h>
+#include <dt-structs.h>
+#include <errno.h>
+#include <linux/errno.h>
+#include <spi.h>
+#include <wait_bit.h>
+
+#define RPC_CMNCR		0x0000	/* R/W */
+#define RPC_CMNCR_MD		BIT(31)
+#define RPC_CMNCR_SFDE		BIT(24)
+#define RPC_CMNCR_MOIIO3(val)	(((val) & 0x3) << 22)
+#define RPC_CMNCR_MOIIO2(val)	(((val) & 0x3) << 20)
+#define RPC_CMNCR_MOIIO1(val)	(((val) & 0x3) << 18)
+#define RPC_CMNCR_MOIIO0(val)	(((val) & 0x3) << 16)
+#define RPC_CMNCR_MOIIO_HIZ	(RPC_CMNCR_MOIIO0(3) | RPC_CMNCR_MOIIO1(3) | \
+				 RPC_CMNCR_MOIIO2(3) | RPC_CMNCR_MOIIO3(3))
+#define RPC_CMNCR_IO3FV(val)	(((val) & 0x3) << 14)
+#define RPC_CMNCR_IO2FV(val)	(((val) & 0x3) << 12)
+#define RPC_CMNCR_IO0FV(val)	(((val) & 0x3) << 8)
+#define RPC_CMNCR_IOFV_HIZ	(RPC_CMNCR_IO0FV(3) | RPC_CMNCR_IO2FV(3) | \
+				 RPC_CMNCR_IO3FV(3))
+#define RPC_CMNCR_CPHAT		BIT(6)
+#define RPC_CMNCR_CPHAR		BIT(5)
+#define RPC_CMNCR_SSLP		BIT(4)
+#define RPC_CMNCR_CPOL		BIT(3)
+#define RPC_CMNCR_BSZ(val)	(((val) & 0x3) << 0)
+
+#define RPC_SSLDR		0x0004	/* R/W */
+#define RPC_SSLDR_SPNDL(d)	(((d) & 0x7) << 16)
+#define RPC_SSLDR_SLNDL(d)	(((d) & 0x7) << 8)
+#define RPC_SSLDR_SCKDL(d)	(((d) & 0x7) << 0)
+
+#define RPC_DRCR		0x000C	/* R/W */
+#define RPC_DRCR_SSLN		BIT(24)
+#define RPC_DRCR_RBURST(v)	(((v) & 0x1F) << 16)
+#define RPC_DRCR_RCF		BIT(9)
+#define RPC_DRCR_RBE		BIT(8)
+#define RPC_DRCR_SSLE		BIT(0)
+
+#define RPC_DRCMR		0x0010	/* R/W */
+#define RPC_DRCMR_CMD(c)	(((c) & 0xFF) << 16)
+#define RPC_DRCMR_OCMD(c)	(((c) & 0xFF) << 0)
+
+#define RPC_DREAR		0x0014	/* R/W */
+#define RPC_DREAR_EAV(v)	(((v) & 0xFF) << 16)
+#define RPC_DREAR_EAC(v)	(((v) & 0x7) << 0)
+
+#define RPC_DROPR		0x0018	/* R/W */
+#define RPC_DROPR_OPD3(o)	(((o) & 0xFF) << 24)
+#define RPC_DROPR_OPD2(o)	(((o) & 0xFF) << 16)
+#define RPC_DROPR_OPD1(o)	(((o) & 0xFF) << 8)
+#define RPC_DROPR_OPD0(o)	(((o) & 0xFF) << 0)
+
+#define RPC_DRENR		0x001C	/* R/W */
+#define RPC_DRENR_CDB(o)	(u32)((((o) & 0x3) << 30))
+#define RPC_DRENR_OCDB(o)	(((o) & 0x3) << 28)
+#define RPC_DRENR_ADB(o)	(((o) & 0x3) << 24)
+#define RPC_DRENR_OPDB(o)	(((o) & 0x3) << 20)
+#define RPC_DRENR_SPIDB(o)	(((o) & 0x3) << 16)
+#define RPC_DRENR_DME		BIT(15)
+#define RPC_DRENR_CDE		BIT(14)
+#define RPC_DRENR_OCDE		BIT(12)
+#define RPC_DRENR_ADE(v)	(((v) & 0xF) << 8)
+#define RPC_DRENR_OPDE(v)	(((v) & 0xF) << 4)
+
+#define RPC_SMCR		0x0020	/* R/W */
+#define RPC_SMCR_SSLKP		BIT(8)
+#define RPC_SMCR_SPIRE		BIT(2)
+#define RPC_SMCR_SPIWE		BIT(1)
+#define RPC_SMCR_SPIE		BIT(0)
+
+#define RPC_SMCMR		0x0024	/* R/W */
+#define RPC_SMCMR_CMD(c)	(((c) & 0xFF) << 16)
+#define RPC_SMCMR_OCMD(c)	(((c) & 0xFF) << 0)
+
+#define RPC_SMADR		0x0028	/* R/W */
+#define RPC_SMOPR		0x002C	/* R/W */
+#define RPC_SMOPR_OPD0(o)	(((o) & 0xFF) << 0)
+#define RPC_SMOPR_OPD1(o)	(((o) & 0xFF) << 8)
+#define RPC_SMOPR_OPD2(o)	(((o) & 0xFF) << 16)
+#define RPC_SMOPR_OPD3(o)	(((o) & 0xFF) << 24)
+
+#define RPC_SMENR		0x0030	/* R/W */
+#define RPC_SMENR_CDB(o)	(((o) & 0x3) << 30)
+#define RPC_SMENR_OCDB(o)	(((o) & 0x3) << 28)
+#define RPC_SMENR_ADB(o)	(((o) & 0x3) << 24)
+#define RPC_SMENR_OPDB(o)	(((o) & 0x3) << 20)
+#define RPC_SMENR_SPIDB(o)	(((o) & 0x3) << 16)
+#define RPC_SMENR_DME		BIT(15)
+#define RPC_SMENR_CDE		BIT(14)
+#define RPC_SMENR_OCDE		BIT(12)
+#define RPC_SMENR_ADE(v)	(((v) & 0xF) << 8)
+#define RPC_SMENR_OPDE(v)	(((v) & 0xF) << 4)
+#define RPC_SMENR_SPIDE(v)	(((v) & 0xF) << 0)
+
+#define RPC_SMRDR0		0x0038	/* R */
+#define RPC_SMRDR1		0x003C	/* R */
+#define RPC_SMWDR0		0x0040	/* R/W */
+#define RPC_SMWDR1		0x0044	/* R/W */
+#define RPC_CMNSR		0x0048	/* R */
+#define RPC_CMNSR_SSLF		BIT(1)
+#define	RPC_CMNSR_TEND		BIT(0)
+
+#define RPC_DRDMCR		0x0058	/* R/W */
+#define RPC_DRDMCR_DMCYC(v)	(((v) & 0xF) << 0)
+
+#define RPC_DRDRENR		0x005C	/* R/W */
+#define RPC_DRDRENR_HYPE	(0x5 << 12)
+#define RPC_DRDRENR_ADDRE	BIT(8)
+#define RPC_DRDRENR_OPDRE	BIT(4)
+#define RPC_DRDRENR_DRDRE	BIT(0)
+
+#define RPC_SMDMCR		0x0060	/* R/W */
+#define RPC_SMDMCR_DMCYC(v)	(((v) & 0xF) << 0)
+
+#define RPC_SMDRENR		0x0064	/* R/W */
+#define RPC_SMDRENR_HYPE	(0x5 << 12)
+#define RPC_SMDRENR_ADDRE	BIT(8)
+#define RPC_SMDRENR_OPDRE	BIT(4)
+#define RPC_SMDRENR_SPIDRE	BIT(0)
+
+#define RPC_PHYCNT		0x007C	/* R/W */
+#define RPC_PHYCNT_CAL		BIT(31)
+#define PRC_PHYCNT_OCTA_AA	BIT(22)
+#define PRC_PHYCNT_OCTA_SA	BIT(23)
+#define PRC_PHYCNT_EXDS		BIT(21)
+#define RPC_PHYCNT_OCT		BIT(20)
+#define RPC_PHYCNT_STRTIM(v)	(((v) & 0x7) << 15)
+#define RPC_PHYCNT_WBUF2	BIT(4)
+#define RPC_PHYCNT_WBUF		BIT(2)
+#define RPC_PHYCNT_MEM(v)	(((v) & 0x3) << 0)
+
+#define RPC_PHYINT		0x0088	/* R/W */
+#define RPC_PHYINT_RSTEN	BIT(18)
+#define RPC_PHYINT_WPEN		BIT(17)
+#define RPC_PHYINT_INTEN	BIT(16)
+#define RPC_PHYINT_RST		BIT(2)
+#define RPC_PHYINT_WP		BIT(1)
+#define RPC_PHYINT_INT		BIT(0)
+
+#define RPC_WBUF		0x8000	/* R/W size=4/8/16/32/64Bytes */
+#define RPC_WBUF_SIZE		0x100
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct rpc_spi_platdata {
+	fdt_addr_t	regs;
+	fdt_addr_t	extr;
+	s32		freq;	/* Default clock freq, -1 for none */
+};
+
+struct rpc_spi_priv {
+	fdt_addr_t	regs;
+	fdt_addr_t	extr;
+	struct clk	clk;
+
+	u8		cmdcopy[8];
+	u32		cmdlen;
+	bool		cmdstarted;
+};
+
+static int rpc_spi_wait_sslf(struct udevice *dev)
+{
+	struct rpc_spi_priv *priv = dev_get_priv(dev->parent);
+
+	return wait_for_bit_le32((void *)priv->regs + RPC_CMNSR, RPC_CMNSR_SSLF,
+				 false, 1000, false);
+}
+
+static int rpc_spi_wait_tend(struct udevice *dev)
+{
+	struct rpc_spi_priv *priv = dev_get_priv(dev->parent);
+
+	return wait_for_bit_le32((void *)priv->regs + RPC_CMNSR, RPC_CMNSR_TEND,
+				 true, 1000, false);
+}
+
+static void rpc_spi_flush_read_cache(struct udevice *dev)
+{
+	struct udevice *bus = dev->parent;
+	struct rpc_spi_priv *priv = dev_get_priv(bus);
+
+	/* Flush read cache */
+	writel(RPC_DRCR_SSLN | RPC_DRCR_RBURST(0x1f) |
+	       RPC_DRCR_RCF | RPC_DRCR_RBE | RPC_DRCR_SSLE,
+	       priv->regs + RPC_DRCR);
+	readl(priv->regs + RPC_DRCR);
+
+}
+
+static int rpc_spi_claim_bus(struct udevice *dev, bool manual)
+{
+	struct udevice *bus = dev->parent;
+	struct rpc_spi_priv *priv = dev_get_priv(bus);
+
+	/*
+	 * NOTE: The 0x260 are undocumented bits, but they must be set.
+	 * NOTE: On H3 ES1.x (not supported in mainline U-Boot), the
+	 *       RPC_PHYCNT_STRTIM shall be 0, while on newer parts, the
+	 *       RPC_PHYCNT_STRTIM shall be 6.
+	 */
+	writel(RPC_PHYCNT_CAL | RPC_PHYCNT_STRTIM(6) | 0x260,
+	       priv->regs + RPC_PHYCNT);
+	writel((manual ? RPC_CMNCR_MD : 0) | RPC_CMNCR_SFDE |
+		 RPC_CMNCR_MOIIO_HIZ | RPC_CMNCR_IOFV_HIZ | RPC_CMNCR_BSZ(0),
+		 priv->regs + RPC_CMNCR);
+
+	writel(RPC_SSLDR_SPNDL(7) | RPC_SSLDR_SLNDL(7) |
+	       RPC_SSLDR_SCKDL(7), priv->regs + RPC_SSLDR);
+
+	rpc_spi_flush_read_cache(dev);
+
+	return 0;
+}
+
+static int rpc_spi_release_bus(struct udevice *dev)
+{
+	struct udevice *bus = dev->parent;
+	struct rpc_spi_priv *priv = dev_get_priv(bus);
+
+	/* NOTE: The 0x260 are undocumented bits, but they must be set. */
+	writel(RPC_PHYCNT_STRTIM(6) | 0x260, priv->regs + RPC_PHYCNT);
+
+	rpc_spi_flush_read_cache(dev);
+
+	return 0;
+}
+
+static int rpc_spi_xfer(struct udevice *dev, unsigned int bitlen,
+			const void *dout, void *din, unsigned long flags)
+{
+	struct udevice *bus = dev->parent;
+	struct rpc_spi_priv *priv = dev_get_priv(bus);
+	u32 wlen = dout ? (bitlen / 8) : 0;
+	u32 rlen = din ? (bitlen / 8) : 0;
+	u32 wloop = DIV_ROUND_UP(wlen, 4);
+	u32 smenr, smcr, offset;
+	int ret = 0;
+
+	if (!priv->cmdstarted) {
+		if (!wlen || rlen)
+			BUG();
+
+		memcpy(priv->cmdcopy, dout, wlen);
+		priv->cmdlen = wlen;
+
+		/* Command transfer start */
+		priv->cmdstarted = true;
+		if (!(flags & SPI_XFER_END))
+			return 0;
+	}
+
+	offset = (priv->cmdcopy[1] << 16) | (priv->cmdcopy[2] << 8) |
+		 (priv->cmdcopy[3] << 0);
+
+	smenr = 0;
+
+	if (wlen || (!rlen && !wlen) || flags == SPI_XFER_ONCE) {
+		if (wlen && flags == SPI_XFER_END)
+			smenr = RPC_SMENR_SPIDE(0xf);
+
+		rpc_spi_claim_bus(dev, true);
+
+		writel(0, priv->regs + RPC_SMCR);
+
+		if (priv->cmdlen >= 1) {	/* Command(1) */
+			writel(RPC_SMCMR_CMD(priv->cmdcopy[0]),
+			       priv->regs + RPC_SMCMR);
+			smenr |= RPC_SMENR_CDE;
+		} else {
+			writel(0, priv->regs + RPC_SMCMR);
+		}
+
+		if (priv->cmdlen >= 4) {	/* Address(3) */
+			writel(offset, priv->regs + RPC_SMADR);
+			smenr |= RPC_SMENR_ADE(7);
+		} else {
+			writel(0, priv->regs + RPC_SMADR);
+		}
+
+		if (priv->cmdlen >= 5) {	/* Dummy(n) */
+			writel(8 * (priv->cmdlen - 4) - 1,
+			       priv->regs + RPC_SMDMCR);
+			smenr |= RPC_SMENR_DME;
+		} else {
+			writel(0, priv->regs + RPC_SMDMCR);
+		}
+
+		writel(0, priv->regs + RPC_SMOPR);
+
+		writel(0, priv->regs + RPC_SMDRENR);
+
+		if (wlen && flags == SPI_XFER_END) {
+			u32 *datout = (u32 *)dout;
+
+			while (wloop--) {
+				smcr = RPC_SMCR_SPIWE | RPC_SMCR_SPIE;
+				if (wloop >= 1)
+					smcr |= RPC_SMCR_SSLKP;
+				writel(smenr, priv->regs + RPC_SMENR);
+				writel(*datout, priv->regs + RPC_SMWDR0);
+				writel(smcr, priv->regs + RPC_SMCR);
+				ret = rpc_spi_wait_tend(dev);
+				if (ret)
+					goto err;
+				datout++;
+				smenr = RPC_SMENR_SPIDE(0xf);
+			}
+
+			ret = rpc_spi_wait_sslf(dev);
+
+		} else {
+			writel(smenr, priv->regs + RPC_SMENR);
+			writel(RPC_SMCR_SPIE, priv->regs + RPC_SMCR);
+			ret = rpc_spi_wait_tend(dev);
+		}
+	} else {	/* Read data only, using DRx ext access */
+		rpc_spi_claim_bus(dev, false);
+
+		if (priv->cmdlen >= 1) {	/* Command(1) */
+			writel(RPC_DRCMR_CMD(priv->cmdcopy[0]),
+			       priv->regs + RPC_DRCMR);
+			smenr |= RPC_DRENR_CDE;
+		} else {
+			writel(0, priv->regs + RPC_DRCMR);
+		}
+
+		if (priv->cmdlen >= 4)		/* Address(3) */
+			smenr |= RPC_DRENR_ADE(7);
+
+		if (priv->cmdlen >= 5) {	/* Dummy(n) */
+			writel(8 * (priv->cmdlen - 4) - 1,
+			       priv->regs + RPC_DRDMCR);
+			smenr |= RPC_DRENR_DME;
+		} else {
+			writel(0, priv->regs + RPC_DRDMCR);
+		}
+
+		writel(0, priv->regs + RPC_DROPR);
+
+		writel(smenr, priv->regs + RPC_DRENR);
+
+		if (rlen)
+			memcpy_fromio(din, (void *)(priv->extr + offset), rlen);
+		else
+			readl(priv->extr);	/* Dummy read */
+	}
+
+err:
+	priv->cmdstarted = false;
+
+	rpc_spi_release_bus(dev);
+
+	return ret;
+}
+
+static int rpc_spi_set_speed(struct udevice *bus, uint speed)
+{
+	/* This is a SPI NOR controller, do nothing. */
+	return 0;
+}
+
+static int rpc_spi_set_mode(struct udevice *bus, uint mode)
+{
+	/* This is a SPI NOR controller, do nothing. */
+	return 0;
+}
+
+static int rpc_spi_bind(struct udevice *parent)
+{
+	const void *fdt = gd->fdt_blob;
+	ofnode node;
+	int ret, off;
+
+	/*
+	 * Check if there are any SPI NOR child nodes, if so, bind as
+	 * this controller will be operated in SPI mode.
+	 */
+	dev_for_each_subnode(node, parent) {
+		off = ofnode_to_offset(node);
+
+		ret = fdt_node_check_compatible(fdt, off, "spi-flash");
+		if (!ret)
+			return 0;
+
+		ret = fdt_node_check_compatible(fdt, off, "jedec,spi-nor");
+		if (!ret)
+			return 0;
+	}
+
+	return -ENODEV;
+}
+
+static int rpc_spi_probe(struct udevice *dev)
+{
+	struct rpc_spi_platdata *plat = dev_get_platdata(dev);
+	struct rpc_spi_priv *priv = dev_get_priv(dev);
+
+	priv->regs = plat->regs;
+	priv->extr = plat->extr;
+
+	clk_enable(&priv->clk);
+
+	return 0;
+}
+
+static int rpc_spi_ofdata_to_platdata(struct udevice *bus)
+{
+	struct rpc_spi_platdata *plat = dev_get_platdata(bus);
+	struct rpc_spi_priv *priv = dev_get_priv(bus);
+	int ret;
+
+	plat->regs = dev_read_addr_index(bus, 0);
+	plat->extr = dev_read_addr_index(bus, 1);
+
+	ret = clk_get_by_index(bus, 0, &priv->clk);
+	if (ret < 0) {
+		printf("%s: Could not get clock for %s: %d\n",
+		       __func__, bus->name, ret);
+		return ret;
+	}
+
+	plat->freq = dev_read_u32_default(bus, "spi-max-freq", 50000000);
+
+	return 0;
+}
+
+static const struct dm_spi_ops rpc_spi_ops = {
+	.xfer		= rpc_spi_xfer,
+	.set_speed	= rpc_spi_set_speed,
+	.set_mode	= rpc_spi_set_mode,
+};
+
+static const struct udevice_id rpc_spi_ids[] = {
+	{ .compatible = "renesas,rpc-r8a7795" },
+	{ .compatible = "renesas,rpc-r8a7796" },
+	{ .compatible = "renesas,rpc-r8a77965" },
+	{ .compatible = "renesas,rpc-r8a77970" },
+	{ .compatible = "renesas,rpc-r8a77995" },
+	{ }
+};
+
+U_BOOT_DRIVER(rpc_spi) = {
+	.name		= "rpc_spi",
+	.id		= UCLASS_SPI,
+	.of_match	= rpc_spi_ids,
+	.ops		= &rpc_spi_ops,
+	.ofdata_to_platdata = rpc_spi_ofdata_to_platdata,
+	.platdata_auto_alloc_size = sizeof(struct rpc_spi_platdata),
+	.priv_auto_alloc_size = sizeof(struct rpc_spi_priv),
+	.bind		= rpc_spi_bind,
+	.probe		= rpc_spi_probe,
+};

commit 10f7c0a96532ad1f65c514d0e1f1df052969cb8c
Author: Tom Rini <trini@konsulko.com>
Date:   Sat Apr 7 09:15:50 2018 -0400

    UPSTREAM: Revert "spi: atmel: Drop non-dm code"
    
    As we aren't quite able to convert some platforms with a very small size
    limit in SPL yet, we need to revert this for now.
    
    This reverts commit 7b0947787358c6b277431d6b76ce043d8bec641d.
    
    Change-Id: I9953c2529a611950db1de168d772607329f827b7
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit e80fa2c2c0870f7c17e233ecc07552e1082c1513)

diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c
index 122c6d107d..3cdfd366ab 100644
--- a/drivers/spi/atmel_spi.c
+++ b/drivers/spi/atmel_spi.c
@@ -26,6 +26,206 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#ifndef CONFIG_DM_SPI
+
+static int spi_has_wdrbt(struct atmel_spi_slave *slave)
+{
+	unsigned int ver;
+
+	ver = spi_readl(slave, VERSION);
+
+	return (ATMEL_SPI_VERSION_REV(ver) >= 0x210);
+}
+
+void spi_init()
+{
+
+}
+
+struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
+			unsigned int max_hz, unsigned int mode)
+{
+	struct atmel_spi_slave	*as;
+	unsigned int		scbr;
+	u32			csrx;
+	void			*regs;
+
+	if (!spi_cs_is_valid(bus, cs))
+		return NULL;
+
+	switch (bus) {
+	case 0:
+		regs = (void *)ATMEL_BASE_SPI0;
+		break;
+#ifdef ATMEL_BASE_SPI1
+	case 1:
+		regs = (void *)ATMEL_BASE_SPI1;
+		break;
+#endif
+#ifdef ATMEL_BASE_SPI2
+	case 2:
+		regs = (void *)ATMEL_BASE_SPI2;
+		break;
+#endif
+#ifdef ATMEL_BASE_SPI3
+	case 3:
+		regs = (void *)ATMEL_BASE_SPI3;
+		break;
+#endif
+	default:
+		return NULL;
+	}
+
+
+	scbr = (get_spi_clk_rate(bus) + max_hz - 1) / max_hz;
+	if (scbr > ATMEL_SPI_CSRx_SCBR_MAX)
+		/* Too low max SCK rate */
+		return NULL;
+	if (scbr < 1)
+		scbr = 1;
+
+	csrx = ATMEL_SPI_CSRx_SCBR(scbr);
+	csrx |= ATMEL_SPI_CSRx_BITS(ATMEL_SPI_BITS_8);
+	if (!(mode & SPI_CPHA))
+		csrx |= ATMEL_SPI_CSRx_NCPHA;
+	if (mode & SPI_CPOL)
+		csrx |= ATMEL_SPI_CSRx_CPOL;
+
+	as = spi_alloc_slave(struct atmel_spi_slave, bus, cs);
+	if (!as)
+		return NULL;
+
+	as->regs = regs;
+	as->mr = ATMEL_SPI_MR_MSTR | ATMEL_SPI_MR_MODFDIS
+			| ATMEL_SPI_MR_PCS(~(1 << cs) & 0xf);
+	if (spi_has_wdrbt(as))
+		as->mr |= ATMEL_SPI_MR_WDRBT;
+
+	spi_writel(as, CSR(cs), csrx);
+
+	return &as->slave;
+}
+
+void spi_free_slave(struct spi_slave *slave)
+{
+	struct atmel_spi_slave *as = to_atmel_spi(slave);
+
+	free(as);
+}
+
+int spi_claim_bus(struct spi_slave *slave)
+{
+	struct atmel_spi_slave *as = to_atmel_spi(slave);
+
+	/* Enable the SPI hardware */
+	spi_writel(as, CR, ATMEL_SPI_CR_SPIEN);
+
+	/*
+	 * Select the slave. This should set SCK to the correct
+	 * initial state, etc.
+	 */
+	spi_writel(as, MR, as->mr);
+
+	return 0;
+}
+
+void spi_release_bus(struct spi_slave *slave)
+{
+	struct atmel_spi_slave *as = to_atmel_spi(slave);
+
+	/* Disable the SPI hardware */
+	spi_writel(as, CR, ATMEL_SPI_CR_SPIDIS);
+}
+
+int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
+		const void *dout, void *din, unsigned long flags)
+{
+	struct atmel_spi_slave *as = to_atmel_spi(slave);
+	unsigned int	len_tx;
+	unsigned int	len_rx;
+	unsigned int	len;
+	u32		status;
+	const u8	*txp = dout;
+	u8		*rxp = din;
+	u8		value;
+
+	if (bitlen == 0)
+		/* Finish any previously submitted transfers */
+		goto out;
+
+	/*
+	 * TODO: The controller can do non-multiple-of-8 bit
+	 * transfers, but this driver currently doesn't support it.
+	 *
+	 * It's also not clear how such transfers are supposed to be
+	 * represented as a stream of bytes...this is a limitation of
+	 * the current SPI interface.
+	 */
+	if (bitlen % 8) {
+		/* Errors always terminate an ongoing transfer */
+		flags |= SPI_XFER_END;
+		goto out;
+	}
+
+	len = bitlen / 8;
+
+	/*
+	 * The controller can do automatic CS control, but it is
+	 * somewhat quirky, and it doesn't really buy us much anyway
+	 * in the context of U-Boot.
+	 */
+	if (flags & SPI_XFER_BEGIN) {
+		spi_cs_activate(slave);
+		/*
+		 * sometimes the RDR is not empty when we get here,
+		 * in theory that should not happen, but it DOES happen.
+		 * Read it here to be on the safe side.
+		 * That also clears the OVRES flag. Required if the
+		 * following loop exits due to OVRES!
+		 */
+		spi_readl(as, RDR);
+	}
+
+	for (len_tx = 0, len_rx = 0; len_rx < len; ) {
+		status = spi_readl(as, SR);
+
+		if (status & ATMEL_SPI_SR_OVRES)
+			return -1;
+
+		if (len_tx < len && (status & ATMEL_SPI_SR_TDRE)) {
+			if (txp)
+				value = *txp++;
+			else
+				value = 0;
+			spi_writel(as, TDR, value);
+			len_tx++;
+		}
+		if (status & ATMEL_SPI_SR_RDRF) {
+			value = spi_readl(as, RDR);
+			if (rxp)
+				*rxp++ = value;
+			len_rx++;
+		}
+	}
+
+out:
+	if (flags & SPI_XFER_END) {
+		/*
+		 * Wait until the transfer is completely done before
+		 * we deactivate CS.
+		 */
+		do {
+			status = spi_readl(as, SR);
+		} while (!(status & ATMEL_SPI_SR_TXEMPTY));
+
+		spi_cs_deactivate(slave);
+	}
+
+	return 0;
+}
+
+#else
+
 #define MAX_CS_COUNT	4
 
 struct atmel_spi_platdata {
@@ -315,3 +515,4 @@ U_BOOT_DRIVER(atmel_spi) = {
 	.priv_auto_alloc_size = sizeof(struct atmel_spi_priv),
 	.probe	= atmel_spi_probe,
 };
+#endif
diff --git a/drivers/spi/atmel_spi.h b/drivers/spi/atmel_spi.h
index 685eeed99e..76b8556c98 100644
--- a/drivers/spi/atmel_spi.h
+++ b/drivers/spi/atmel_spi.h
@@ -79,6 +79,22 @@
 #define ATMEL_SPI_BITS_16		8
 
 struct atmel_spi_slave {
+	struct spi_slave slave;
 	void		*regs;
 	u32		mr;
 };
+
+static inline struct atmel_spi_slave *to_atmel_spi(struct spi_slave *slave)
+{
+	return container_of(slave, struct atmel_spi_slave, slave);
+}
+
+/* Register access macros */
+#define spi_readl(as, reg)					\
+	readl(as->regs + ATMEL_SPI_##reg)
+#define spi_writel(as, reg, value)				\
+	writel(value, as->regs + ATMEL_SPI_##reg)
+
+#if !defined(CONFIG_SYS_SPI_WRITE_TOUT)
+#define CONFIG_SYS_SPI_WRITE_TOUT	(5 * CONFIG_SYS_HZ)
+#endif
diff --git a/include/configs/ma5d4evk.h b/include/configs/ma5d4evk.h
index daa306f10c..50b21c9d97 100644
--- a/include/configs/ma5d4evk.h
+++ b/include/configs/ma5d4evk.h
@@ -83,6 +83,8 @@
  * SPI NOR (boot memory)
  */
 #ifdef CONFIG_CMD_SF
+#define CONFIG_ATMEL_SPI
+#define CONFIG_ATMEL_SPI0
 #define CONFIG_SPI_FLASH_ATMEL
 #define CONFIG_SF_DEFAULT_BUS		0
 #define CONFIG_SF_DEFAULT_CS		0
diff --git a/include/configs/vinco.h b/include/configs/vinco.h
index 42a9a78575..189ceca821 100644
--- a/include/configs/vinco.h
+++ b/include/configs/vinco.h
@@ -39,6 +39,8 @@
 /* SerialFlash */
 
 #ifdef CONFIG_CMD_SF
+#define CONFIG_ATMEL_SPI
+#define CONFIG_ATMEL_SPI0
 #define CONFIG_SPI_FLASH_STMICRO
 #define CONFIG_SF_DEFAULT_BUS		0
 #define CONFIG_SF_DEFAULT_CS		0
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 3b801663b7..fbd0ee9f4e 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -136,6 +136,7 @@ CONFIG_ATMEL_LEGACY
 CONFIG_ATMEL_MCI_8BIT
 CONFIG_ATMEL_NAND_HWECC
 CONFIG_ATMEL_NAND_HW_PMECC
+CONFIG_ATMEL_SPI0
 CONFIG_AT_TRANS
 CONFIG_AUTONEG_TIMEOUT
 CONFIG_AUTO_COMPLETE

commit 71c98550b1375033391752129b3af586a41150de
Author: Tom Rini <trini@konsulko.com>
Date:   Sat Apr 7 09:15:06 2018 -0400

    UPSTREAM: Revert "spi: atmel: Drop atmel_spi.h"
    
    As we aren't quite able to convert some platforms with a very small size
    limit in SPL yet, we need to revert this for now.
    
    This reverts commit 37434db29be495ef41f204a97b8bf13b1418f97d.
    
    Change-Id: I91af9f7fc85430b3c0c9c095f097e6692cac91ea
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 5270df2836761909864d9b548bf4b7f7f3a51484)

diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c
index bb2262cc1f..122c6d107d 100644
--- a/drivers/spi/atmel_spi.c
+++ b/drivers/spi/atmel_spi.c
@@ -22,90 +22,11 @@
 #include <asm/gpio.h>
 #endif
 
+#include "atmel_spi.h"
+
 DECLARE_GLOBAL_DATA_PTR;
 
-/* Register offsets */
-#define ATMEL_SPI_CR			0x0000
-#define ATMEL_SPI_MR			0x0004
-#define ATMEL_SPI_RDR			0x0008
-#define ATMEL_SPI_TDR			0x000c
-#define ATMEL_SPI_SR			0x0010
-#define ATMEL_SPI_IER			0x0014
-#define ATMEL_SPI_IDR			0x0018
-#define ATMEL_SPI_IMR			0x001c
-#define ATMEL_SPI_CSR(x)		(0x0030 + 4 * (x))
-#define ATMEL_SPI_VERSION		0x00fc
-
-/* Bits in CR */
-#define ATMEL_SPI_CR_SPIEN		BIT(0)
-#define ATMEL_SPI_CR_SPIDIS		BIT(1)
-#define ATMEL_SPI_CR_SWRST		BIT(7)
-#define ATMEL_SPI_CR_LASTXFER		BIT(24)
-
-/* Bits in MR */
-#define ATMEL_SPI_MR_MSTR		BIT(0)
-#define ATMEL_SPI_MR_PS			BIT(1)
-#define ATMEL_SPI_MR_PCSDEC		BIT(2)
-#define ATMEL_SPI_MR_FDIV		BIT(3)
-#define ATMEL_SPI_MR_MODFDIS		BIT(4)
-#define ATMEL_SPI_MR_WDRBT		BIT(5)
-#define ATMEL_SPI_MR_LLB		BIT(7)
-#define ATMEL_SPI_MR_PCS(x)		(((x) & 15) << 16)
-#define ATMEL_SPI_MR_DLYBCS(x)		((x) << 24)
-
-/* Bits in RDR */
-#define ATMEL_SPI_RDR_RD(x)		(x)
-#define ATMEL_SPI_RDR_PCS(x)		((x) << 16)
-
-/* Bits in TDR */
-#define ATMEL_SPI_TDR_TD(x)		(x)
-#define ATMEL_SPI_TDR_PCS(x)		((x) << 16)
-#define ATMEL_SPI_TDR_LASTXFER		BIT(24)
-
-/* Bits in SR/IER/IDR/IMR */
-#define ATMEL_SPI_SR_RDRF		BIT(0)
-#define ATMEL_SPI_SR_TDRE		BIT(1)
-#define ATMEL_SPI_SR_MODF		BIT(2)
-#define ATMEL_SPI_SR_OVRES		BIT(3)
-#define ATMEL_SPI_SR_ENDRX		BIT(4)
-#define ATMEL_SPI_SR_ENDTX		BIT(5)
-#define ATMEL_SPI_SR_RXBUFF		BIT(6)
-#define ATMEL_SPI_SR_TXBUFE		BIT(7)
-#define ATMEL_SPI_SR_NSSR		BIT(8)
-#define ATMEL_SPI_SR_TXEMPTY		BIT(9)
-#define ATMEL_SPI_SR_SPIENS		BIT(16)
-
-/* Bits in CSRx */
-#define ATMEL_SPI_CSR_CPOL		BIT(0)
-#define ATMEL_SPI_CSR_NCPHA		BIT(1)
-#define ATMEL_SPI_CSR_CSAAT		BIT(3)
-#define ATMEL_SPI_CSR_BITS(x)		((x) << 4)
-#define ATMEL_SPI_CSR_SCBR(x)		((x) << 8)
-#define ATMEL_SPI_CSR_SCBR_MAX		GENMASK(7, 0)
-#define ATMEL_SPI_CSR_DLYBS(x)		((x) << 16)
-#define ATMEL_SPI_CSR_DLYBCT(x)		((x) << 24)
-
-/* Bits in VERSION */
-#define ATMEL_SPI_VERSION_REV(x)	((x) & 0xfff)
-#define ATMEL_SPI_VERSION_MFN(x)	((x) << 16)
-
-/* Constants for CSRx:BITS */
-#define ATMEL_SPI_BITS_8		0
-#define ATMEL_SPI_BITS_9		1
-#define ATMEL_SPI_BITS_10		2
-#define ATMEL_SPI_BITS_11		3
-#define ATMEL_SPI_BITS_12		4
-#define ATMEL_SPI_BITS_13		5
-#define ATMEL_SPI_BITS_14		6
-#define ATMEL_SPI_BITS_15		7
-#define ATMEL_SPI_BITS_16		8
-
-#define MAX_CS_COUNT			4
-
-struct atmel_spi_slave {
-	void		*regs;
-	u32		mr;
-};
+#define MAX_CS_COUNT	4
 
 struct atmel_spi_platdata {
 	struct at91_spi *regs;
@@ -132,19 +53,19 @@ static int atmel_spi_claim_bus(struct udevice *dev)
 	u32 scbr, csrx, mode;
 
 	scbr = (priv->bus_clk_rate + freq - 1) / freq;
-	if (scbr > ATMEL_SPI_CSR_SCBR_MAX)
+	if (scbr > ATMEL_SPI_CSRx_SCBR_MAX)
 		return -EINVAL;
 
 	if (scbr < 1)
 		scbr = 1;
 
-	csrx = ATMEL_SPI_CSR_SCBR(scbr);
-	csrx |= ATMEL_SPI_CSR_BITS(ATMEL_SPI_BITS_8);
+	csrx = ATMEL_SPI_CSRx_SCBR(scbr);
+	csrx |= ATMEL_SPI_CSRx_BITS(ATMEL_SPI_BITS_8);
 
 	if (!(priv->mode & SPI_CPHA))
-		csrx |= ATMEL_SPI_CSR_NCPHA;
+		csrx |= ATMEL_SPI_CSRx_NCPHA;
 	if (priv->mode & SPI_CPOL)
-		csrx |= ATMEL_SPI_CSR_CPOL;
+		csrx |= ATMEL_SPI_CSRx_CPOL;
 
 	writel(csrx, &reg_base->csr[cs]);
 
@@ -366,7 +287,7 @@ static int atmel_spi_probe(struct udevice *bus)
 		return ret;
 	}
 
-	for (i = 0; i < ARRAY_SIZE(priv->cs_gpios); i++) {
+	for(i = 0; i < ARRAY_SIZE(priv->cs_gpios); i++) {
 		if (!dm_gpio_is_valid(&priv->cs_gpios[i]))
 			continue;
 
diff --git a/drivers/spi/atmel_spi.h b/drivers/spi/atmel_spi.h
new file mode 100644
index 0000000000..685eeed99e
--- /dev/null
+++ b/drivers/spi/atmel_spi.h
@@ -0,0 +1,84 @@
+/*
+ * Register definitions for the Atmel AT32/AT91 SPI Controller
+ */
+
+/* Register offsets */
+#define ATMEL_SPI_CR			0x0000
+#define ATMEL_SPI_MR			0x0004
+#define ATMEL_SPI_RDR			0x0008
+#define ATMEL_SPI_TDR			0x000c
+#define ATMEL_SPI_SR			0x0010
+#define ATMEL_SPI_IER			0x0014
+#define ATMEL_SPI_IDR			0x0018
+#define ATMEL_SPI_IMR			0x001c
+#define ATMEL_SPI_CSR(x)		(0x0030 + 4 * (x))
+#define ATMEL_SPI_VERSION		0x00fc
+
+/* Bits in CR */
+#define ATMEL_SPI_CR_SPIEN		BIT(0)
+#define ATMEL_SPI_CR_SPIDIS		BIT(1)
+#define ATMEL_SPI_CR_SWRST		BIT(7)
+#define ATMEL_SPI_CR_LASTXFER		BIT(24)
+
+/* Bits in MR */
+#define ATMEL_SPI_MR_MSTR		BIT(0)
+#define ATMEL_SPI_MR_PS			BIT(1)
+#define ATMEL_SPI_MR_PCSDEC		BIT(2)
+#define ATMEL_SPI_MR_FDIV		BIT(3)
+#define ATMEL_SPI_MR_MODFDIS		BIT(4)
+#define ATMEL_SPI_MR_WDRBT		BIT(5)
+#define ATMEL_SPI_MR_LLB		BIT(7)
+#define ATMEL_SPI_MR_PCS(x)		(((x) & 15) << 16)
+#define ATMEL_SPI_MR_DLYBCS(x)		((x) << 24)
+
+/* Bits in RDR */
+#define ATMEL_SPI_RDR_RD(x)		(x)
+#define ATMEL_SPI_RDR_PCS(x)		((x) << 16)
+
+/* Bits in TDR */
+#define ATMEL_SPI_TDR_TD(x)		(x)
+#define ATMEL_SPI_TDR_PCS(x)		((x) << 16)
+#define ATMEL_SPI_TDR_LASTXFER		BIT(24)
+
+/* Bits in SR/IER/IDR/IMR */
+#define ATMEL_SPI_SR_RDRF		BIT(0)
+#define ATMEL_SPI_SR_TDRE		BIT(1)
+#define ATMEL_SPI_SR_MODF		BIT(2)
+#define ATMEL_SPI_SR_OVRES		BIT(3)
+#define ATMEL_SPI_SR_ENDRX		BIT(4)
+#define ATMEL_SPI_SR_ENDTX		BIT(5)
+#define ATMEL_SPI_SR_RXBUFF		BIT(6)
+#define ATMEL_SPI_SR_TXBUFE		BIT(7)
+#define ATMEL_SPI_SR_NSSR		BIT(8)
+#define ATMEL_SPI_SR_TXEMPTY		BIT(9)
+#define ATMEL_SPI_SR_SPIENS		BIT(16)
+
+/* Bits in CSRx */
+#define ATMEL_SPI_CSRx_CPOL		BIT(0)
+#define ATMEL_SPI_CSRx_NCPHA		BIT(1)
+#define ATMEL_SPI_CSRx_CSAAT		BIT(3)
+#define ATMEL_SPI_CSRx_BITS(x)		((x) << 4)
+#define ATMEL_SPI_CSRx_SCBR(x)		((x) << 8)
+#define ATMEL_SPI_CSRx_SCBR_MAX		GENMASK(7, 0)
+#define ATMEL_SPI_CSRx_DLYBS(x)		((x) << 16)
+#define ATMEL_SPI_CSRx_DLYBCT(x)	((x) << 24)
+
+/* Bits in VERSION */
+#define ATMEL_SPI_VERSION_REV(x)	((x) & 0xfff)
+#define ATMEL_SPI_VERSION_MFN(x)	((x) << 16)
+
+/* Constants for CSRx:BITS */
+#define ATMEL_SPI_BITS_8		0
+#define ATMEL_SPI_BITS_9		1
+#define ATMEL_SPI_BITS_10		2
+#define ATMEL_SPI_BITS_11		3
+#define ATMEL_SPI_BITS_12		4
+#define ATMEL_SPI_BITS_13		5
+#define ATMEL_SPI_BITS_14		6
+#define ATMEL_SPI_BITS_15		7
+#define ATMEL_SPI_BITS_16		8
+
+struct atmel_spi_slave {
+	void		*regs;
+	u32		mr;
+};

commit 5bda114b503ca66ef5bbc85a2dec06523bab34ba
Author: Christophe Leroy <christophe.leroy@c-s.fr>
Date:   Fri Mar 16 17:20:43 2018 +0100

    UPSTREAM: powercp: mpc8xx: move commproc.h
    
    include/commproc.h is dedicated to the 8xx, rename it cpm_8xx.h and
    move it into arch/powerpc/include/asm
    
    Change-Id: I37b02101bd88b607f0f9eca79fdbb7cc1e85ed4d
    Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 18f8d4c60d26e6cd113461c5d716c64897c3f112)

diff --git a/arch/powerpc/cpu/mpc8xx/cpu.c b/arch/powerpc/cpu/mpc8xx/cpu.c
index 1120fd7441..179b038c24 100644
--- a/arch/powerpc/cpu/mpc8xx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xx/cpu.c
@@ -21,9 +21,9 @@
 #include <watchdog.h>
 #include <command.h>
 #include <mpc8xx.h>
-#include <commproc.h>
 #include <netdev.h>
 #include <asm/cache.h>
+#include <asm/cpm_8xx.h>
 #include <linux/compiler.h>
 #include <asm/io.h>
 
diff --git a/arch/powerpc/cpu/mpc8xx/cpu_init.c b/arch/powerpc/cpu/mpc8xx/cpu_init.c
index dc601a1297..6127c9f771 100644
--- a/arch/powerpc/cpu/mpc8xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc8xx/cpu_init.c
@@ -9,7 +9,7 @@
 #include <watchdog.h>
 
 #include <mpc8xx.h>
-#include <commproc.h>
+#include <asm/cpm_8xx.h>
 #include <asm/io.h>
 
 /*
diff --git a/arch/powerpc/cpu/mpc8xx/immap.c b/arch/powerpc/cpu/mpc8xx/immap.c
index dfe5dc2125..6164de281b 100644
--- a/arch/powerpc/cpu/mpc8xx/immap.c
+++ b/arch/powerpc/cpu/mpc8xx/immap.c
@@ -13,7 +13,7 @@
 #include <command.h>
 
 #include <asm/immap_8xx.h>
-#include <commproc.h>
+#include <asm/cpm_8xx.h>
 #include <asm/iopin_8xx.h>
 #include <asm/io.h>
 
diff --git a/arch/powerpc/cpu/mpc8xx/interrupts.c b/arch/powerpc/cpu/mpc8xx/interrupts.c
index 846148ab98..20f9664f06 100644
--- a/arch/powerpc/cpu/mpc8xx/interrupts.c
+++ b/arch/powerpc/cpu/mpc8xx/interrupts.c
@@ -8,9 +8,9 @@
 #include <common.h>
 #include <mpc8xx.h>
 #include <mpc8xx_irq.h>
+#include <asm/cpm_8xx.h>
 #include <asm/processor.h>
 #include <asm/io.h>
-#include <commproc.h>
 
 /************************************************************************/
 
diff --git a/include/commproc.h b/arch/powerpc/include/asm/cpm_8xx.h
similarity index 100%
rename from include/commproc.h
rename to arch/powerpc/include/asm/cpm_8xx.h
diff --git a/drivers/net/mpc8xx_fec.c b/drivers/net/mpc8xx_fec.c
index 71fe984a5d..1dd41df18b 100644
--- a/drivers/net/mpc8xx_fec.c
+++ b/drivers/net/mpc8xx_fec.c
@@ -7,10 +7,10 @@
 
 #include <common.h>
 #include <command.h>
-#include <commproc.h>
 #include <malloc.h>
 #include <net.h>
 #include <netdev.h>
+#include <asm/cpm_8xx.h>
 #include <asm/io.h>
 
 #include <phy.h>
diff --git a/drivers/serial/serial_mpc8xx.c b/drivers/serial/serial_mpc8xx.c
index 26a8085a69..7a5908f464 100644
--- a/drivers/serial/serial_mpc8xx.c
+++ b/drivers/serial/serial_mpc8xx.c
@@ -6,10 +6,10 @@
  */
 
 #include <common.h>
-#include <commproc.h>
 #include <command.h>
 #include <serial.h>
 #include <watchdog.h>
+#include <asm/cpm_8xx.h>
 #include <linux/compiler.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/drivers/spi/mpc8xx_spi.c b/drivers/spi/mpc8xx_spi.c
index b5bd558526..eb035e9510 100644
--- a/drivers/spi/mpc8xx_spi.c
+++ b/drivers/spi/mpc8xx_spi.c
@@ -19,7 +19,7 @@
 
 #include <common.h>
 #include <mpc8xx.h>
-#include <commproc.h>
+#include <asm/cpm_8xx.h>
 #include <linux/ctype.h>
 #include <malloc.h>
 #include <post.h>

commit 87e4c6020eff05133e40ab8b7b0e37e6a2be37e4
Author: Christophe Leroy <christophe.leroy@c-s.fr>
Date:   Fri Mar 16 17:20:41 2018 +0100

    UPSTREAM: powerpc: mpc8xx: Change CONFIG_8xx to CONFIG_MPC8xx
    
    CONFIG_8xx doesn't mean much outside of arch/powerpc/
    This patch renames it CONFIG_MPC8xx just like CONFIG_MPC85xx etc ...
    It also renames 8xx_immap.h to immap_8xx.h to be consistent with
    other file names.
    
    Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
    (cherry picked from commit ee1e600c13d16febd517ab7d0d2c243db174789b)
    Change-Id: I564708bb6517b699749e8a54c013d032f785e459
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/api/api_platform-powerpc.c b/api/api_platform-powerpc.c
index 9e9bc63b2f..aae7ddee95 100644
--- a/api/api_platform-powerpc.c
+++ b/api/api_platform-powerpc.c
@@ -30,7 +30,7 @@ int platform_sys_info(struct sys_info *si)
 	si->clk_bus = gd->bus_clk;
 	si->clk_cpu = gd->cpu_clk;
 
-#if defined(CONFIG_8xx) || defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
+#if defined(CONFIG_MPC8xx) || defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
 #define bi_bar	bi_immr_base
 #elif defined(CONFIG_MPC83xx)
 #define bi_bar	bi_immrbar
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index e4b3043fa2..f29465f2c0 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -30,7 +30,7 @@ config MPC86xx
 	select SYS_FSL_DDR_BE
 	imply CMD_REGINFO
 
-config 8xx
+config MPC8xx
 	bool "MPC8xx"
 	imply CMD_REGINFO
 
diff --git a/arch/powerpc/cpu/mpc8xx/Kconfig b/arch/powerpc/cpu/mpc8xx/Kconfig
index 5a7db335ed..f112317376 100644
--- a/arch/powerpc/cpu/mpc8xx/Kconfig
+++ b/arch/powerpc/cpu/mpc8xx/Kconfig
@@ -1,5 +1,5 @@
 menu "mpc8xx CPU"
-	depends on 8xx
+	depends on MPC8xx
 
 config SYS_CPU
 	default "mpc8xx"
diff --git a/arch/powerpc/cpu/mpc8xx/immap.c b/arch/powerpc/cpu/mpc8xx/immap.c
index 2284979dd6..dfe5dc2125 100644
--- a/arch/powerpc/cpu/mpc8xx/immap.c
+++ b/arch/powerpc/cpu/mpc8xx/immap.c
@@ -12,7 +12,7 @@
 #include <common.h>
 #include <command.h>
 
-#include <asm/8xx_immap.h>
+#include <asm/immap_8xx.h>
 #include <commproc.h>
 #include <asm/iopin_8xx.h>
 #include <asm/io.h>
diff --git a/arch/powerpc/include/asm/cache.h b/arch/powerpc/include/asm/cache.h
index 0801d2c367..445a366807 100644
--- a/arch/powerpc/include/asm/cache.h
+++ b/arch/powerpc/include/asm/cache.h
@@ -7,7 +7,7 @@
 #include <asm/processor.h>
 
 /* bytes per L1 cache line */
-#if defined(CONFIG_8xx)
+#if defined(CONFIG_MPC8xx)
 #define	L1_CACHE_SHIFT	4
 #elif defined(CONFIG_PPC64BRIDGE)
 #define L1_CACHE_SHIFT	7
@@ -72,7 +72,7 @@ void disable_cpc_sram(void);
 #define L2CACHE_NONE	0x03	/* NONE */
 #define L2CACHE_PARITY  0x08    /* Mask for L2 Cache Parity Protected bit */
 
-#ifdef CONFIG_8xx
+#ifdef CONFIG_MPC8xx
 /* Cache control on the MPC8xx is provided through some additional
  * special purpose registers.
  */
@@ -139,6 +139,6 @@ static inline void wr_dc_adr(uint val)
 	mtspr(DC_ADR, val);
 }
 #endif
-#endif /* CONFIG_8xx */
+#endif /* CONFIG_MPC8xx */
 
 #endif
diff --git a/arch/powerpc/include/asm/global_data.h b/arch/powerpc/include/asm/global_data.h
index 35a02b61a4..016dc19cb4 100644
--- a/arch/powerpc/include/asm/global_data.h
+++ b/arch/powerpc/include/asm/global_data.h
@@ -19,7 +19,7 @@ struct arch_global_data {
 	u8 sdhc_adapter;
 #endif
 #endif
-#if defined(CONFIG_8xx)
+#if defined(CONFIG_MPC8xx)
 	unsigned long brg_clk;
 #endif
 #if defined(CONFIG_CPM2)
diff --git a/arch/powerpc/include/asm/8xx_immap.h b/arch/powerpc/include/asm/immap_8xx.h
similarity index 100%
rename from arch/powerpc/include/asm/8xx_immap.h
rename to arch/powerpc/include/asm/immap_8xx.h
diff --git a/arch/powerpc/include/asm/iopin_8xx.h b/arch/powerpc/include/asm/iopin_8xx.h
index 15679a2db5..3b4e1b64a4 100644
--- a/arch/powerpc/include/asm/iopin_8xx.h
+++ b/arch/powerpc/include/asm/iopin_8xx.h
@@ -11,7 +11,7 @@
 #define _ASM_IOPIN_8XX_H_
 
 #include <linux/types.h>
-#include <asm/8xx_immap.h>
+#include <asm/immap_8xx.h>
 #include <asm/io.h>
 
 #ifdef __KERNEL__
diff --git a/arch/powerpc/include/asm/ppc.h b/arch/powerpc/include/asm/ppc.h
index 5e0aa08be9..596fa0f079 100644
--- a/arch/powerpc/include/asm/ppc.h
+++ b/arch/powerpc/include/asm/ppc.h
@@ -13,8 +13,8 @@
 
 #ifndef __ASSEMBLY__
 
-#if defined(CONFIG_8xx)
-#include <asm/8xx_immap.h>
+#if defined(CONFIG_MPC8xx)
+#include <asm/immap_8xx.h>
 #endif
 #ifdef CONFIG_MPC86xx
 #include <mpc86xx.h>
diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c
index 27ffcd55bc..f5585f5bfb 100644
--- a/cmd/bdinfo.c
+++ b/cmd/bdinfo.c
@@ -180,7 +180,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	print_bi_flash(bd);
 	print_num("sramstart",		bd->bi_sramstart);
 	print_num("sramsize",		bd->bi_sramsize);
-#if	defined(CONFIG_8xx) || defined(CONFIG_E500)
+#if	defined(CONFIG_MPC8xx) || defined(CONFIG_E500)
 	print_num("immr_base",		bd->bi_immr_base);
 #endif
 	print_num("bootflags",		bd->bi_bootflags);
diff --git a/configs/MCR3000_defconfig b/configs/MCR3000_defconfig
index 19fe2bd6bb..6bda6d3319 100644
--- a/configs/MCR3000_defconfig
+++ b/configs/MCR3000_defconfig
@@ -1,5 +1,6 @@
 CONFIG_PPC=y
-CONFIG_8xx=y
+CONFIG_SYS_TEXT_BASE=0x4000000
+CONFIG_MPC8xx=y
 CONFIG_TARGET_MCR3000=y
 CONFIG_8xx_GCLK_FREQ=132000000
 CONFIG_CMD_IMMAP=y
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 5ceea44c60..ba2e81491d 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -272,7 +272,7 @@ config RENESAS_RAVB
 
 config MPC8XX_FEC
 	bool "Fast Ethernet Controller on MPC8XX"
-	depends on 8xx
+	depends on MPC8xx
 	select MII
 	help
 	  This driver implements support for the Fast Ethernet Controller
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index aeed538fa4..953c1bee51 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -531,7 +531,7 @@ config STM32X7_SERIAL
 
 config MPC8XX_CONS
 	bool "Console driver for MPC8XX"
-	depends on 8xx
+	depends on MPC8xx
 	default y
 
 choice
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index b0d6e9deae..643298fde2 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -291,7 +291,7 @@ config LPC32XX_SSP
 
 config MPC8XX_SPI
 	bool "MPC8XX SPI Driver"
-	depends on 8xx
+	depends on MPC8xx
 	help
 	  Enable support for SPI on MPC8XX
 
diff --git a/include/asm-generic/u-boot.h b/include/asm-generic/u-boot.h
index d3049d81f5..f734d53eec 100644
--- a/include/asm-generic/u-boot.h
+++ b/include/asm-generic/u-boot.h
@@ -37,7 +37,7 @@ typedef struct bd_info {
 	unsigned long	bi_dsp_freq; /* dsp core frequency */
 	unsigned long	bi_ddr_freq; /* ddr frequency */
 #endif
-#if defined(CONFIG_8xx) || defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
+#if defined(CONFIG_MPC8xx) || defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
 	unsigned long	bi_immr_base;	/* base of IMMR register */
 #endif
 #if defined(CONFIG_M68K)
diff --git a/include/commproc.h b/include/commproc.h
index 9536b135dc..bd8adec6b0 100644
--- a/include/commproc.h
+++ b/include/commproc.h
@@ -16,7 +16,7 @@
 #ifndef __CPM_8XX__
 #define __CPM_8XX__
 
-#include <asm/8xx_immap.h>
+#include <asm/immap_8xx.h>
 
 /* CPM Command register.
 */
diff --git a/include/mpc8xx.h b/include/mpc8xx.h
index fc081ab756..daa874ccf5 100644
--- a/include/mpc8xx.h
+++ b/include/mpc8xx.h
@@ -81,7 +81,7 @@
 #define TBSCR_TBIRQ2	0x0400		/* Time Base Interrupt Request 2	*/
 #define TBSCR_TBIRQ1	0x0200		/* Time Base Interrupt Request 1	*/
 #define TBSCR_TBIRQ0	0x0100		/* Time Base Interrupt Request 0	*/
-#if 0	/* already in asm/8xx_immap.h */
+#if 0	/* already in asm/immap_8xx.h */
 #define TBSCR_REFA	0x0080		/* Reference Interrupt Status A		*/
 #define TBSCR_REFB	0x0040		/* Reference Interrupt Status B		*/
 #define TBSCR_REFAE	0x0008		/* Second Interrupt Enable A		*/
@@ -95,7 +95,7 @@
  */
 #undef	PISCR_PIRQ			/* TBD					*/
 #define PISCR_PITF	0x0002		/* Periodic Interrupt Timer Freeze	*/
-#if 0	/* already in asm/8xx_immap.h */
+#if 0	/* already in asm/immap_8xx.h */
 #define PISCR_PS	0x0080		/* Periodic interrupt Status		*/
 #define PISCR_PIE	0x0004		/* Periodic Interrupt Enable		*/
 #define PISCR_PTE	0x0001		/* Periodic Timer Enable		*/
diff --git a/include/ppc_asm.tmpl b/include/ppc_asm.tmpl
index 18783340d9..4947c77b8d 100644
--- a/include/ppc_asm.tmpl
+++ b/include/ppc_asm.tmpl
@@ -81,7 +81,7 @@
 #define	r30	30
 #define	r31	31
 
-#if defined(CONFIG_8xx)
+#if defined(CONFIG_MPC8xx)
 
 /* Some special registers */
 
@@ -93,10 +93,10 @@
 #define LCTRL2	157	/* Load/Store Support	    (37-41) */
 #define ICTRL	158
 
-#endif	/* CONFIG_8xx */
+#endif	/* CONFIG_MPC8xx */
 
 
-#if defined(CONFIG_8xx)
+#if defined(CONFIG_MPC8xx)
 
 /* Registers in the processor's internal memory map that we use.
 */
diff --git a/include/watchdog.h b/include/watchdog.h
index 64b59f107a..d420ab127b 100644
--- a/include/watchdog.h
+++ b/include/watchdog.h
@@ -73,7 +73,7 @@ int init_func_watchdog_reset(void);
  */
 
 /* MPC 8xx */
-#if defined(CONFIG_8xx) && !defined(__ASSEMBLY__)
+#if defined(CONFIG_MPC8xx) && !defined(__ASSEMBLY__)
 	void reset_8xx_watchdog(immap_t __iomem *immr);
 #endif
 

commit f92621cf933a284dac920477900f505ce7af5df9
Author: Jagan Teki <jagan@amarulasolutions.com>
Date:   Wed Mar 14 18:46:44 2018 +0530

    UPSTREAM: spi: atmel: default y if DM_SPI && ARCH_AT91
    
    ATMEL_SPI is now fully converted to driver-model and
    respective boards switch to DM_SPI as well,
    so make default y for ARCH_AT91
    
    Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
    Acked-by: Wenyou Yang <wenyouya@gmail.com>
    (cherry picked from commit 89d4fc153bb5c3830ab9e75e1690738cccea0322)
    Change-Id: I3c3da47c05f7fef7a2129c5325c4ddf7b596b2cf
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/configs/at91sam9260ek_dataflash_cs0_defconfig b/configs/at91sam9260ek_dataflash_cs0_defconfig
index 706481413b..cf96aa5b0a 100644
--- a/configs/at91sam9260ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9260ek_dataflash_cs0_defconfig
@@ -50,7 +50,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
 CONFIG_USB=y
diff --git a/configs/at91sam9260ek_dataflash_cs1_defconfig b/configs/at91sam9260ek_dataflash_cs1_defconfig
index 30539ddcbe..baabc01c06 100644
--- a/configs/at91sam9260ek_dataflash_cs1_defconfig
+++ b/configs/at91sam9260ek_dataflash_cs1_defconfig
@@ -50,7 +50,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
 CONFIG_USB=y
diff --git a/configs/at91sam9260ek_nandflash_defconfig b/configs/at91sam9260ek_nandflash_defconfig
index 944f66f590..ece3517093 100644
--- a/configs/at91sam9260ek_nandflash_defconfig
+++ b/configs/at91sam9260ek_nandflash_defconfig
@@ -50,7 +50,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
 CONFIG_USB=y
diff --git a/configs/at91sam9261ek_dataflash_cs0_defconfig b/configs/at91sam9261ek_dataflash_cs0_defconfig
index 87355b57d6..0e18ed9682 100644
--- a/configs/at91sam9261ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9261ek_dataflash_cs0_defconfig
@@ -49,7 +49,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
 CONFIG_USB=y
diff --git a/configs/at91sam9261ek_dataflash_cs3_defconfig b/configs/at91sam9261ek_dataflash_cs3_defconfig
index 74dfa665e7..794fd07da8 100644
--- a/configs/at91sam9261ek_dataflash_cs3_defconfig
+++ b/configs/at91sam9261ek_dataflash_cs3_defconfig
@@ -49,7 +49,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
 CONFIG_USB=y
diff --git a/configs/at91sam9261ek_nandflash_defconfig b/configs/at91sam9261ek_nandflash_defconfig
index dffcdcfadb..dd8cf128f4 100644
--- a/configs/at91sam9261ek_nandflash_defconfig
+++ b/configs/at91sam9261ek_nandflash_defconfig
@@ -49,7 +49,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
 CONFIG_USB=y
diff --git a/configs/at91sam9263ek_dataflash_cs0_defconfig b/configs/at91sam9263ek_dataflash_cs0_defconfig
index c17c5d8f70..a966be701e 100644
--- a/configs/at91sam9263ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9263ek_dataflash_cs0_defconfig
@@ -55,7 +55,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
 CONFIG_USB=y
diff --git a/configs/at91sam9263ek_dataflash_defconfig b/configs/at91sam9263ek_dataflash_defconfig
index c17c5d8f70..a966be701e 100644
--- a/configs/at91sam9263ek_dataflash_defconfig
+++ b/configs/at91sam9263ek_dataflash_defconfig
@@ -55,7 +55,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
 CONFIG_USB=y
diff --git a/configs/at91sam9263ek_nandflash_defconfig b/configs/at91sam9263ek_nandflash_defconfig
index 09169a1c9e..a1d725afe8 100644
--- a/configs/at91sam9263ek_nandflash_defconfig
+++ b/configs/at91sam9263ek_nandflash_defconfig
@@ -55,7 +55,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
 CONFIG_USB=y
diff --git a/configs/at91sam9263ek_norflash_boot_defconfig b/configs/at91sam9263ek_norflash_boot_defconfig
index 50de3c8627..97215d28e5 100644
--- a/configs/at91sam9263ek_norflash_boot_defconfig
+++ b/configs/at91sam9263ek_norflash_boot_defconfig
@@ -54,7 +54,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
 CONFIG_USB=y
diff --git a/configs/at91sam9263ek_norflash_defconfig b/configs/at91sam9263ek_norflash_defconfig
index ffd8ca9a74..2d36bacb2c 100644
--- a/configs/at91sam9263ek_norflash_defconfig
+++ b/configs/at91sam9263ek_norflash_defconfig
@@ -54,7 +54,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
 CONFIG_USB=y
diff --git a/configs/at91sam9g10ek_dataflash_cs0_defconfig b/configs/at91sam9g10ek_dataflash_cs0_defconfig
index 4fd5ff575c..44515f033a 100644
--- a/configs/at91sam9g10ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9g10ek_dataflash_cs0_defconfig
@@ -49,7 +49,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_LCD=y
diff --git a/configs/at91sam9g10ek_dataflash_cs3_defconfig b/configs/at91sam9g10ek_dataflash_cs3_defconfig
index 58a034afea..6fc7136c7e 100644
--- a/configs/at91sam9g10ek_dataflash_cs3_defconfig
+++ b/configs/at91sam9g10ek_dataflash_cs3_defconfig
@@ -49,7 +49,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_LCD=y
diff --git a/configs/at91sam9g10ek_nandflash_defconfig b/configs/at91sam9g10ek_nandflash_defconfig
index 8c5925b45c..a24676888c 100644
--- a/configs/at91sam9g10ek_nandflash_defconfig
+++ b/configs/at91sam9g10ek_nandflash_defconfig
@@ -49,7 +49,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_LCD=y
diff --git a/configs/at91sam9g20ek_2mmc_defconfig b/configs/at91sam9g20ek_2mmc_defconfig
index 4ea6a980aa..2a35d62e76 100644
--- a/configs/at91sam9g20ek_2mmc_defconfig
+++ b/configs/at91sam9g20ek_2mmc_defconfig
@@ -52,7 +52,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
 CONFIG_USB=y
diff --git a/configs/at91sam9g20ek_2mmc_nandflash_defconfig b/configs/at91sam9g20ek_2mmc_nandflash_defconfig
index b274729e8f..c2a9be03a5 100644
--- a/configs/at91sam9g20ek_2mmc_nandflash_defconfig
+++ b/configs/at91sam9g20ek_2mmc_nandflash_defconfig
@@ -52,7 +52,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
 CONFIG_USB=y
diff --git a/configs/at91sam9g20ek_dataflash_cs0_defconfig b/configs/at91sam9g20ek_dataflash_cs0_defconfig
index 351bccc1b8..42b8a9f15c 100644
--- a/configs/at91sam9g20ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9g20ek_dataflash_cs0_defconfig
@@ -50,7 +50,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
 CONFIG_USB=y
diff --git a/configs/at91sam9g20ek_dataflash_cs1_defconfig b/configs/at91sam9g20ek_dataflash_cs1_defconfig
index 7240d819e1..7d5c152d2f 100644
--- a/configs/at91sam9g20ek_dataflash_cs1_defconfig
+++ b/configs/at91sam9g20ek_dataflash_cs1_defconfig
@@ -50,7 +50,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
 CONFIG_USB=y
diff --git a/configs/at91sam9g20ek_nandflash_defconfig b/configs/at91sam9g20ek_nandflash_defconfig
index c0483d8d22..3f7687146f 100644
--- a/configs/at91sam9g20ek_nandflash_defconfig
+++ b/configs/at91sam9g20ek_nandflash_defconfig
@@ -50,7 +50,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
 CONFIG_USB=y
diff --git a/configs/at91sam9n12ek_mmc_defconfig b/configs/at91sam9n12ek_mmc_defconfig
index ed080c3a25..a14d362105 100644
--- a/configs/at91sam9n12ek_mmc_defconfig
+++ b/configs/at91sam9n12ek_mmc_defconfig
@@ -50,7 +50,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
 CONFIG_USB=y
diff --git a/configs/at91sam9n12ek_nandflash_defconfig b/configs/at91sam9n12ek_nandflash_defconfig
index 639c6c8db6..ec91c3e0cb 100644
--- a/configs/at91sam9n12ek_nandflash_defconfig
+++ b/configs/at91sam9n12ek_nandflash_defconfig
@@ -50,7 +50,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
 CONFIG_USB=y
diff --git a/configs/at91sam9n12ek_spiflash_defconfig b/configs/at91sam9n12ek_spiflash_defconfig
index e3ea0e709d..9cd18144eb 100644
--- a/configs/at91sam9n12ek_spiflash_defconfig
+++ b/configs/at91sam9n12ek_spiflash_defconfig
@@ -50,7 +50,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
 CONFIG_USB=y
diff --git a/configs/at91sam9rlek_dataflash_defconfig b/configs/at91sam9rlek_dataflash_defconfig
index c5c1f69669..b4153910a5 100644
--- a/configs/at91sam9rlek_dataflash_defconfig
+++ b/configs/at91sam9rlek_dataflash_defconfig
@@ -53,7 +53,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
 CONFIG_LCD=y
diff --git a/configs/at91sam9rlek_mmc_defconfig b/configs/at91sam9rlek_mmc_defconfig
index 9d3bb70d29..5059623f83 100644
--- a/configs/at91sam9rlek_mmc_defconfig
+++ b/configs/at91sam9rlek_mmc_defconfig
@@ -53,7 +53,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
 CONFIG_LCD=y
diff --git a/configs/at91sam9rlek_nandflash_defconfig b/configs/at91sam9rlek_nandflash_defconfig
index 431214b1da..b8a187e957 100644
--- a/configs/at91sam9rlek_nandflash_defconfig
+++ b/configs/at91sam9rlek_nandflash_defconfig
@@ -53,7 +53,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
 CONFIG_LCD=y
diff --git a/configs/at91sam9x5ek_dataflash_defconfig b/configs/at91sam9x5ek_dataflash_defconfig
index 817cdea025..8eae3097e2 100644
--- a/configs/at91sam9x5ek_dataflash_defconfig
+++ b/configs/at91sam9x5ek_dataflash_defconfig
@@ -56,7 +56,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
 CONFIG_USB=y
diff --git a/configs/at91sam9x5ek_mmc_defconfig b/configs/at91sam9x5ek_mmc_defconfig
index 3897883162..f9dc668399 100644
--- a/configs/at91sam9x5ek_mmc_defconfig
+++ b/configs/at91sam9x5ek_mmc_defconfig
@@ -56,7 +56,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
 CONFIG_USB=y
diff --git a/configs/at91sam9x5ek_nandflash_defconfig b/configs/at91sam9x5ek_nandflash_defconfig
index f3d19c86d2..b3edbcbb11 100644
--- a/configs/at91sam9x5ek_nandflash_defconfig
+++ b/configs/at91sam9x5ek_nandflash_defconfig
@@ -56,7 +56,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
 CONFIG_USB=y
diff --git a/configs/at91sam9x5ek_spiflash_defconfig b/configs/at91sam9x5ek_spiflash_defconfig
index a0e5592b38..f839ac70cf 100644
--- a/configs/at91sam9x5ek_spiflash_defconfig
+++ b/configs/at91sam9x5ek_spiflash_defconfig
@@ -56,7 +56,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
 CONFIG_USB=y
diff --git a/configs/at91sam9xeek_dataflash_cs0_defconfig b/configs/at91sam9xeek_dataflash_cs0_defconfig
index 328bf0ddec..e3633115ab 100644
--- a/configs/at91sam9xeek_dataflash_cs0_defconfig
+++ b/configs/at91sam9xeek_dataflash_cs0_defconfig
@@ -50,7 +50,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
 CONFIG_USB=y
diff --git a/configs/at91sam9xeek_dataflash_cs1_defconfig b/configs/at91sam9xeek_dataflash_cs1_defconfig
index bfb6867d83..4a7cdb7678 100644
--- a/configs/at91sam9xeek_dataflash_cs1_defconfig
+++ b/configs/at91sam9xeek_dataflash_cs1_defconfig
@@ -50,7 +50,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
 CONFIG_USB=y
diff --git a/configs/at91sam9xeek_nandflash_defconfig b/configs/at91sam9xeek_nandflash_defconfig
index af5231ae7f..18cff28c71 100644
--- a/configs/at91sam9xeek_nandflash_defconfig
+++ b/configs/at91sam9xeek_nandflash_defconfig
@@ -50,7 +50,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
 CONFIG_USB=y
diff --git a/configs/ethernut5_defconfig b/configs/ethernut5_defconfig
index fc2b777d04..7685052495 100644
--- a/configs/ethernut5_defconfig
+++ b/configs/ethernut5_defconfig
@@ -56,6 +56,5 @@ CONFIG_PINCTRL_AT91=y
 CONFIG_DM_SERIAL=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/gurnard_defconfig b/configs/gurnard_defconfig
index b82956eb11..ea1b31025c 100644
--- a/configs/gurnard_defconfig
+++ b/configs/gurnard_defconfig
@@ -23,9 +23,9 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_FAT=y
 CONFIG_OF_CONTROL=y
 CONFIG_ENV_IS_IN_NAND=y
-CONFIG_NAND=y
-CONFIG_NAND_ATMEL=y
-CONFIG_ATMEL_NAND_HWECC=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
 CONFIG_PHYLIB=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/meesc_dataflash_defconfig b/configs/meesc_dataflash_defconfig
index 1cd23e7a0e..0ec7d70758 100644
--- a/configs/meesc_dataflash_defconfig
+++ b/configs/meesc_dataflash_defconfig
@@ -34,4 +34,3 @@ CONFIG_PINCTRL_AT91=y
 CONFIG_DM_SERIAL=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
diff --git a/configs/meesc_defconfig b/configs/meesc_defconfig
index cba557db75..3a3e8f1585 100644
--- a/configs/meesc_defconfig
+++ b/configs/meesc_defconfig
@@ -37,4 +37,3 @@ CONFIG_PINCTRL_AT91=y
 CONFIG_DM_SERIAL=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
diff --git a/configs/pm9261_defconfig b/configs/pm9261_defconfig
index 65e8967f39..f1b932847c 100644
--- a/configs/pm9261_defconfig
+++ b/configs/pm9261_defconfig
@@ -44,7 +44,6 @@ CONFIG_PINCTRL_AT91=y
 CONFIG_DM_SERIAL=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_LCD=y
diff --git a/configs/pm9263_defconfig b/configs/pm9263_defconfig
index f108a324f0..26dc533948 100644
--- a/configs/pm9263_defconfig
+++ b/configs/pm9263_defconfig
@@ -42,7 +42,6 @@ CONFIG_SPI_FLASH_DATAFLASH=y
 CONFIG_DM_SERIAL=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_LCD=y
diff --git a/configs/sama5d27_som1_ek_mmc_defconfig b/configs/sama5d27_som1_ek_mmc_defconfig
new file mode 100644
index 0000000000..f0cbba06e8
--- /dev/null
+++ b/configs/sama5d27_som1_ek_mmc_defconfig
@@ -0,0 +1,90 @@
+CONFIG_ARM=y
+CONFIG_ARCH_AT91=y
+CONFIG_SYS_TEXT_BASE=0x23f00000
+CONFIG_TARGET_SAMA5D27_SOM1_EK=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_som1_ek"
+CONFIG_DEBUG_UART=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_FIT=y
+CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2"
+CONFIG_SD_BOOT=y
+CONFIG_BOOTDELAY=3
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_SPL=y
+CONFIG_SPL_SEPARATE_BSS=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names"
+CONFIG_ENV_IS_IN_FAT=y
+CONFIG_BOOTP_BOOTPATH=y
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
+CONFIG_DM=y
+CONFIG_SPL_DM=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_CLK_AT91=y
+CONFIG_AT91_UTMI=y
+CONFIG_AT91_H32MX=y
+CONFIG_AT91_GENERIC_CLK=y
+CONFIG_DM_GPIO=y
+CONFIG_ATMEL_PIO4=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_AT91=y
+CONFIG_I2C_EEPROM=y
+CONFIG_DM_MMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ATMEL=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_DM_ETH=y
+CONFIG_MACB=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_PINCTRL_AT91PIO4=y
+CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART_ATMEL=y
+CONFIG_DEBUG_UART_BASE=0xf8020000
+CONFIG_DEBUG_UART_CLOCK=82000000
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_ATMEL_USART=y
+CONFIG_DM_SPI=y
+CONFIG_TIMER=y
+CONFIG_SPL_TIMER=y
+CONFIG_ATMEL_PIT_TIMER=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_ATMEL_USBA=y
+CONFIG_DM_VIDEO=y
+CONFIG_ATMEL_HLCD=y
diff --git a/configs/sama5d2_xplained_mmc_defconfig b/configs/sama5d2_xplained_mmc_defconfig
index dc4d991512..f8e1fc3761 100644
--- a/configs/sama5d2_xplained_mmc_defconfig
+++ b/configs/sama5d2_xplained_mmc_defconfig
@@ -70,7 +70,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_TIMER=y
 CONFIG_SPL_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/sama5d2_xplained_spiflash_defconfig b/configs/sama5d2_xplained_spiflash_defconfig
index c64b8b8e3b..18b998707b 100644
--- a/configs/sama5d2_xplained_spiflash_defconfig
+++ b/configs/sama5d2_xplained_spiflash_defconfig
@@ -68,7 +68,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_TIMER=y
 CONFIG_SPL_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/sama5d36ek_cmp_mmc_defconfig b/configs/sama5d36ek_cmp_mmc_defconfig
index 7bbfcb7a24..2c3f6ab512 100644
--- a/configs/sama5d36ek_cmp_mmc_defconfig
+++ b/configs/sama5d36ek_cmp_mmc_defconfig
@@ -55,7 +55,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
 CONFIG_LCD=y
diff --git a/configs/sama5d36ek_cmp_nandflash_defconfig b/configs/sama5d36ek_cmp_nandflash_defconfig
index 640be26d00..72b30af3ac 100644
--- a/configs/sama5d36ek_cmp_nandflash_defconfig
+++ b/configs/sama5d36ek_cmp_nandflash_defconfig
@@ -55,7 +55,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
 CONFIG_LCD=y
diff --git a/configs/sama5d36ek_cmp_spiflash_defconfig b/configs/sama5d36ek_cmp_spiflash_defconfig
index cb62a75157..67c1ab63aa 100644
--- a/configs/sama5d36ek_cmp_spiflash_defconfig
+++ b/configs/sama5d36ek_cmp_spiflash_defconfig
@@ -55,7 +55,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
 CONFIG_LCD=y
diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig
index 19626befa2..13388617fd 100644
--- a/configs/sama5d3xek_mmc_defconfig
+++ b/configs/sama5d3xek_mmc_defconfig
@@ -75,7 +75,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_TIMER=y
 CONFIG_SPL_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig
index db698dfd4c..69b735ae77 100644
--- a/configs/sama5d3xek_nandflash_defconfig
+++ b/configs/sama5d3xek_nandflash_defconfig
@@ -70,7 +70,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_TIMER=y
 CONFIG_SPL_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig
index 5d32964175..35b4202a72 100644
--- a/configs/sama5d3xek_spiflash_defconfig
+++ b/configs/sama5d3xek_spiflash_defconfig
@@ -71,7 +71,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_TIMER=y
 CONFIG_SPL_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/sama5d4_xplained_mmc_defconfig b/configs/sama5d4_xplained_mmc_defconfig
index c4c24dd5b4..082ee4b718 100644
--- a/configs/sama5d4_xplained_mmc_defconfig
+++ b/configs/sama5d4_xplained_mmc_defconfig
@@ -68,7 +68,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_TIMER=y
 CONFIG_SPL_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig
index 800f679535..4da477338b 100644
--- a/configs/sama5d4_xplained_nandflash_defconfig
+++ b/configs/sama5d4_xplained_nandflash_defconfig
@@ -66,7 +66,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_TIMER=y
 CONFIG_SPL_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/sama5d4_xplained_spiflash_defconfig b/configs/sama5d4_xplained_spiflash_defconfig
index 9a065b8a3b..c6010c638f 100644
--- a/configs/sama5d4_xplained_spiflash_defconfig
+++ b/configs/sama5d4_xplained_spiflash_defconfig
@@ -68,7 +68,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_TIMER=y
 CONFIG_SPL_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/sama5d4ek_mmc_defconfig b/configs/sama5d4ek_mmc_defconfig
index de4de4074b..22328948de 100644
--- a/configs/sama5d4ek_mmc_defconfig
+++ b/configs/sama5d4ek_mmc_defconfig
@@ -71,7 +71,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_TIMER=y
 CONFIG_SPL_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/sama5d4ek_nandflash_defconfig b/configs/sama5d4ek_nandflash_defconfig
index b3ee471958..b618aee4cf 100644
--- a/configs/sama5d4ek_nandflash_defconfig
+++ b/configs/sama5d4ek_nandflash_defconfig
@@ -69,7 +69,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_TIMER=y
 CONFIG_SPL_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/sama5d4ek_spiflash_defconfig b/configs/sama5d4ek_spiflash_defconfig
index 057030d997..07129bda6f 100644
--- a/configs/sama5d4ek_spiflash_defconfig
+++ b/configs/sama5d4ek_spiflash_defconfig
@@ -68,7 +68,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
 CONFIG_TIMER=y
 CONFIG_SPL_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/usb_a9263_dataflash_defconfig b/configs/usb_a9263_dataflash_defconfig
index 527cec4723..e8a84c30e2 100644
--- a/configs/usb_a9263_dataflash_defconfig
+++ b/configs/usb_a9263_dataflash_defconfig
@@ -41,4 +41,3 @@ CONFIG_PINCTRL_AT91=y
 CONFIG_DM_SERIAL=y
 CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
-CONFIG_ATMEL_SPI=y
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index ac17d307e2..b0d6e9deae 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -48,7 +48,7 @@ config ATH79_SPI
 
 config ATMEL_SPI
 	bool "Atmel SPI driver"
-	depends on ARCH_AT91
+	default y if ARCH_AT91
 	help
 	  This enables driver for the Atmel SPI Controller, present on
 	  many AT91 (ARM) chips. This driver can be used to access
diff --git a/include/configs/ma5d4evk.h b/include/configs/ma5d4evk.h
index 7ce4424cdf..daa306f10c 100644
--- a/include/configs/ma5d4evk.h
+++ b/include/configs/ma5d4evk.h
@@ -83,7 +83,6 @@
  * SPI NOR (boot memory)
  */
 #ifdef CONFIG_CMD_SF
-#define CONFIG_ATMEL_SPI
 #define CONFIG_SPI_FLASH_ATMEL
 #define CONFIG_SF_DEFAULT_BUS		0
 #define CONFIG_SF_DEFAULT_CS		0
diff --git a/include/configs/taurus.h b/include/configs/taurus.h
index a44b04bb68..e920d7b25a 100644
--- a/include/configs/taurus.h
+++ b/include/configs/taurus.h
@@ -117,7 +117,6 @@
 
 /* SPI EEPROM */
 #define CONFIG_SPI
-#define CONFIG_ATMEL_SPI
 #define TAURUS_SPI_MASK (1 << 4)
 #define TAURUS_SPI_CS_PIN	AT91_PIN_PA3
 
diff --git a/include/configs/vinco.h b/include/configs/vinco.h
index 22d92ee86c..42a9a78575 100644
--- a/include/configs/vinco.h
+++ b/include/configs/vinco.h
@@ -39,7 +39,6 @@
 /* SerialFlash */
 
 #ifdef CONFIG_CMD_SF
-#define CONFIG_ATMEL_SPI
 #define CONFIG_SPI_FLASH_STMICRO
 #define CONFIG_SF_DEFAULT_BUS		0
 #define CONFIG_SF_DEFAULT_CS		0

commit d658123d48eb960bb9b520dc1f37d28d72bf8542
Author: Jagan Teki <jagan@amarulasolutions.com>
Date:   Wed Mar 14 18:46:43 2018 +0530

    UPSTREAM: spi: atmel: Drop atmel_spi.h
    
    atmel_spi.h has register offsets, and atmel_spi_slave
    structure, move it into .c file for better readability
    and drop atmel_spi.h
    
    Change-Id: Ia43a1c2dc2fc7e02a7d5613c8aac31c63bd0c37c
    Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
    Acked-by: Wenyou Yang <wenyouya@gmail.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 37434db29be495ef41f204a97b8bf13b1418f97d)

diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c
index 122c6d107d..bb2262cc1f 100644
--- a/drivers/spi/atmel_spi.c
+++ b/drivers/spi/atmel_spi.c
@@ -22,11 +22,90 @@
 #include <asm/gpio.h>
 #endif
 
-#include "atmel_spi.h"
-
 DECLARE_GLOBAL_DATA_PTR;
 
-#define MAX_CS_COUNT	4
+/* Register offsets */
+#define ATMEL_SPI_CR			0x0000
+#define ATMEL_SPI_MR			0x0004
+#define ATMEL_SPI_RDR			0x0008
+#define ATMEL_SPI_TDR			0x000c
+#define ATMEL_SPI_SR			0x0010
+#define ATMEL_SPI_IER			0x0014
+#define ATMEL_SPI_IDR			0x0018
+#define ATMEL_SPI_IMR			0x001c
+#define ATMEL_SPI_CSR(x)		(0x0030 + 4 * (x))
+#define ATMEL_SPI_VERSION		0x00fc
+
+/* Bits in CR */
+#define ATMEL_SPI_CR_SPIEN		BIT(0)
+#define ATMEL_SPI_CR_SPIDIS		BIT(1)
+#define ATMEL_SPI_CR_SWRST		BIT(7)
+#define ATMEL_SPI_CR_LASTXFER		BIT(24)
+
+/* Bits in MR */
+#define ATMEL_SPI_MR_MSTR		BIT(0)
+#define ATMEL_SPI_MR_PS			BIT(1)
+#define ATMEL_SPI_MR_PCSDEC		BIT(2)
+#define ATMEL_SPI_MR_FDIV		BIT(3)
+#define ATMEL_SPI_MR_MODFDIS		BIT(4)
+#define ATMEL_SPI_MR_WDRBT		BIT(5)
+#define ATMEL_SPI_MR_LLB		BIT(7)
+#define ATMEL_SPI_MR_PCS(x)		(((x) & 15) << 16)
+#define ATMEL_SPI_MR_DLYBCS(x)		((x) << 24)
+
+/* Bits in RDR */
+#define ATMEL_SPI_RDR_RD(x)		(x)
+#define ATMEL_SPI_RDR_PCS(x)		((x) << 16)
+
+/* Bits in TDR */
+#define ATMEL_SPI_TDR_TD(x)		(x)
+#define ATMEL_SPI_TDR_PCS(x)		((x) << 16)
+#define ATMEL_SPI_TDR_LASTXFER		BIT(24)
+
+/* Bits in SR/IER/IDR/IMR */
+#define ATMEL_SPI_SR_RDRF		BIT(0)
+#define ATMEL_SPI_SR_TDRE		BIT(1)
+#define ATMEL_SPI_SR_MODF		BIT(2)
+#define ATMEL_SPI_SR_OVRES		BIT(3)
+#define ATMEL_SPI_SR_ENDRX		BIT(4)
+#define ATMEL_SPI_SR_ENDTX		BIT(5)
+#define ATMEL_SPI_SR_RXBUFF		BIT(6)
+#define ATMEL_SPI_SR_TXBUFE		BIT(7)
+#define ATMEL_SPI_SR_NSSR		BIT(8)
+#define ATMEL_SPI_SR_TXEMPTY		BIT(9)
+#define ATMEL_SPI_SR_SPIENS		BIT(16)
+
+/* Bits in CSRx */
+#define ATMEL_SPI_CSR_CPOL		BIT(0)
+#define ATMEL_SPI_CSR_NCPHA		BIT(1)
+#define ATMEL_SPI_CSR_CSAAT		BIT(3)
+#define ATMEL_SPI_CSR_BITS(x)		((x) << 4)
+#define ATMEL_SPI_CSR_SCBR(x)		((x) << 8)
+#define ATMEL_SPI_CSR_SCBR_MAX		GENMASK(7, 0)
+#define ATMEL_SPI_CSR_DLYBS(x)		((x) << 16)
+#define ATMEL_SPI_CSR_DLYBCT(x)		((x) << 24)
+
+/* Bits in VERSION */
+#define ATMEL_SPI_VERSION_REV(x)	((x) & 0xfff)
+#define ATMEL_SPI_VERSION_MFN(x)	((x) << 16)
+
+/* Constants for CSRx:BITS */
+#define ATMEL_SPI_BITS_8		0
+#define ATMEL_SPI_BITS_9		1
+#define ATMEL_SPI_BITS_10		2
+#define ATMEL_SPI_BITS_11		3
+#define ATMEL_SPI_BITS_12		4
+#define ATMEL_SPI_BITS_13		5
+#define ATMEL_SPI_BITS_14		6
+#define ATMEL_SPI_BITS_15		7
+#define ATMEL_SPI_BITS_16		8
+
+#define MAX_CS_COUNT			4
+
+struct atmel_spi_slave {
+	void		*regs;
+	u32		mr;
+};
 
 struct atmel_spi_platdata {
 	struct at91_spi *regs;
@@ -53,19 +132,19 @@ static int atmel_spi_claim_bus(struct udevice *dev)
 	u32 scbr, csrx, mode;
 
 	scbr = (priv->bus_clk_rate + freq - 1) / freq;
-	if (scbr > ATMEL_SPI_CSRx_SCBR_MAX)
+	if (scbr > ATMEL_SPI_CSR_SCBR_MAX)
 		return -EINVAL;
 
 	if (scbr < 1)
 		scbr = 1;
 
-	csrx = ATMEL_SPI_CSRx_SCBR(scbr);
-	csrx |= ATMEL_SPI_CSRx_BITS(ATMEL_SPI_BITS_8);
+	csrx = ATMEL_SPI_CSR_SCBR(scbr);
+	csrx |= ATMEL_SPI_CSR_BITS(ATMEL_SPI_BITS_8);
 
 	if (!(priv->mode & SPI_CPHA))
-		csrx |= ATMEL_SPI_CSRx_NCPHA;
+		csrx |= ATMEL_SPI_CSR_NCPHA;
 	if (priv->mode & SPI_CPOL)
-		csrx |= ATMEL_SPI_CSRx_CPOL;
+		csrx |= ATMEL_SPI_CSR_CPOL;
 
 	writel(csrx, &reg_base->csr[cs]);
 
@@ -287,7 +366,7 @@ static int atmel_spi_probe(struct udevice *bus)
 		return ret;
 	}
 
-	for(i = 0; i < ARRAY_SIZE(priv->cs_gpios); i++) {
+	for (i = 0; i < ARRAY_SIZE(priv->cs_gpios); i++) {
 		if (!dm_gpio_is_valid(&priv->cs_gpios[i]))
 			continue;
 
diff --git a/drivers/spi/atmel_spi.h b/drivers/spi/atmel_spi.h
deleted file mode 100644
index 685eeed99e..0000000000
--- a/drivers/spi/atmel_spi.h
+++ /dev/null
@@ -1,84 +0,0 @@
-/*
- * Register definitions for the Atmel AT32/AT91 SPI Controller
- */
-
-/* Register offsets */
-#define ATMEL_SPI_CR			0x0000
-#define ATMEL_SPI_MR			0x0004
-#define ATMEL_SPI_RDR			0x0008
-#define ATMEL_SPI_TDR			0x000c
-#define ATMEL_SPI_SR			0x0010
-#define ATMEL_SPI_IER			0x0014
-#define ATMEL_SPI_IDR			0x0018
-#define ATMEL_SPI_IMR			0x001c
-#define ATMEL_SPI_CSR(x)		(0x0030 + 4 * (x))
-#define ATMEL_SPI_VERSION		0x00fc
-
-/* Bits in CR */
-#define ATMEL_SPI_CR_SPIEN		BIT(0)
-#define ATMEL_SPI_CR_SPIDIS		BIT(1)
-#define ATMEL_SPI_CR_SWRST		BIT(7)
-#define ATMEL_SPI_CR_LASTXFER		BIT(24)
-
-/* Bits in MR */
-#define ATMEL_SPI_MR_MSTR		BIT(0)
-#define ATMEL_SPI_MR_PS			BIT(1)
-#define ATMEL_SPI_MR_PCSDEC		BIT(2)
-#define ATMEL_SPI_MR_FDIV		BIT(3)
-#define ATMEL_SPI_MR_MODFDIS		BIT(4)
-#define ATMEL_SPI_MR_WDRBT		BIT(5)
-#define ATMEL_SPI_MR_LLB		BIT(7)
-#define ATMEL_SPI_MR_PCS(x)		(((x) & 15) << 16)
-#define ATMEL_SPI_MR_DLYBCS(x)		((x) << 24)
-
-/* Bits in RDR */
-#define ATMEL_SPI_RDR_RD(x)		(x)
-#define ATMEL_SPI_RDR_PCS(x)		((x) << 16)
-
-/* Bits in TDR */
-#define ATMEL_SPI_TDR_TD(x)		(x)
-#define ATMEL_SPI_TDR_PCS(x)		((x) << 16)
-#define ATMEL_SPI_TDR_LASTXFER		BIT(24)
-
-/* Bits in SR/IER/IDR/IMR */
-#define ATMEL_SPI_SR_RDRF		BIT(0)
-#define ATMEL_SPI_SR_TDRE		BIT(1)
-#define ATMEL_SPI_SR_MODF		BIT(2)
-#define ATMEL_SPI_SR_OVRES		BIT(3)
-#define ATMEL_SPI_SR_ENDRX		BIT(4)
-#define ATMEL_SPI_SR_ENDTX		BIT(5)
-#define ATMEL_SPI_SR_RXBUFF		BIT(6)
-#define ATMEL_SPI_SR_TXBUFE		BIT(7)
-#define ATMEL_SPI_SR_NSSR		BIT(8)
-#define ATMEL_SPI_SR_TXEMPTY		BIT(9)
-#define ATMEL_SPI_SR_SPIENS		BIT(16)
-
-/* Bits in CSRx */
-#define ATMEL_SPI_CSRx_CPOL		BIT(0)
-#define ATMEL_SPI_CSRx_NCPHA		BIT(1)
-#define ATMEL_SPI_CSRx_CSAAT		BIT(3)
-#define ATMEL_SPI_CSRx_BITS(x)		((x) << 4)
-#define ATMEL_SPI_CSRx_SCBR(x)		((x) << 8)
-#define ATMEL_SPI_CSRx_SCBR_MAX		GENMASK(7, 0)
-#define ATMEL_SPI_CSRx_DLYBS(x)		((x) << 16)
-#define ATMEL_SPI_CSRx_DLYBCT(x)	((x) << 24)
-
-/* Bits in VERSION */
-#define ATMEL_SPI_VERSION_REV(x)	((x) & 0xfff)
-#define ATMEL_SPI_VERSION_MFN(x)	((x) << 16)
-
-/* Constants for CSRx:BITS */
-#define ATMEL_SPI_BITS_8		0
-#define ATMEL_SPI_BITS_9		1
-#define ATMEL_SPI_BITS_10		2
-#define ATMEL_SPI_BITS_11		3
-#define ATMEL_SPI_BITS_12		4
-#define ATMEL_SPI_BITS_13		5
-#define ATMEL_SPI_BITS_14		6
-#define ATMEL_SPI_BITS_15		7
-#define ATMEL_SPI_BITS_16		8
-
-struct atmel_spi_slave {
-	void		*regs;
-	u32		mr;
-};

commit c7aa08536ca52e16b577c9e86d863f5385bb4bdd
Author: Jagan Teki <jagan@amarulasolutions.com>
Date:   Wed Mar 14 18:46:42 2018 +0530

    UPSTREAM:spi: atmel: Drop non-dm code
    
    All board configs are now enabled DM_SPI for SPL and
    U-Boot proper, so now its time to drop non-dm code.
    
    Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
    Acked-by: Wenyou Yang <wenyouya@gmail.com>
    (cherry picked from commit 7b0947787358c6b277431d6b76ce043d8bec641d)
    Change-Id: Ifa87682ea641368d73be6a059c00d194a668bf4b
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c
index 3cdfd366ab..122c6d107d 100644
--- a/drivers/spi/atmel_spi.c
+++ b/drivers/spi/atmel_spi.c
@@ -26,206 +26,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#ifndef CONFIG_DM_SPI
-
-static int spi_has_wdrbt(struct atmel_spi_slave *slave)
-{
-	unsigned int ver;
-
-	ver = spi_readl(slave, VERSION);
-
-	return (ATMEL_SPI_VERSION_REV(ver) >= 0x210);
-}
-
-void spi_init()
-{
-
-}
-
-struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
-			unsigned int max_hz, unsigned int mode)
-{
-	struct atmel_spi_slave	*as;
-	unsigned int		scbr;
-	u32			csrx;
-	void			*regs;
-
-	if (!spi_cs_is_valid(bus, cs))
-		return NULL;
-
-	switch (bus) {
-	case 0:
-		regs = (void *)ATMEL_BASE_SPI0;
-		break;
-#ifdef ATMEL_BASE_SPI1
-	case 1:
-		regs = (void *)ATMEL_BASE_SPI1;
-		break;
-#endif
-#ifdef ATMEL_BASE_SPI2
-	case 2:
-		regs = (void *)ATMEL_BASE_SPI2;
-		break;
-#endif
-#ifdef ATMEL_BASE_SPI3
-	case 3:
-		regs = (void *)ATMEL_BASE_SPI3;
-		break;
-#endif
-	default:
-		return NULL;
-	}
-
-
-	scbr = (get_spi_clk_rate(bus) + max_hz - 1) / max_hz;
-	if (scbr > ATMEL_SPI_CSRx_SCBR_MAX)
-		/* Too low max SCK rate */
-		return NULL;
-	if (scbr < 1)
-		scbr = 1;
-
-	csrx = ATMEL_SPI_CSRx_SCBR(scbr);
-	csrx |= ATMEL_SPI_CSRx_BITS(ATMEL_SPI_BITS_8);
-	if (!(mode & SPI_CPHA))
-		csrx |= ATMEL_SPI_CSRx_NCPHA;
-	if (mode & SPI_CPOL)
-		csrx |= ATMEL_SPI_CSRx_CPOL;
-
-	as = spi_alloc_slave(struct atmel_spi_slave, bus, cs);
-	if (!as)
-		return NULL;
-
-	as->regs = regs;
-	as->mr = ATMEL_SPI_MR_MSTR | ATMEL_SPI_MR_MODFDIS
-			| ATMEL_SPI_MR_PCS(~(1 << cs) & 0xf);
-	if (spi_has_wdrbt(as))
-		as->mr |= ATMEL_SPI_MR_WDRBT;
-
-	spi_writel(as, CSR(cs), csrx);
-
-	return &as->slave;
-}
-
-void spi_free_slave(struct spi_slave *slave)
-{
-	struct atmel_spi_slave *as = to_atmel_spi(slave);
-
-	free(as);
-}
-
-int spi_claim_bus(struct spi_slave *slave)
-{
-	struct atmel_spi_slave *as = to_atmel_spi(slave);
-
-	/* Enable the SPI hardware */
-	spi_writel(as, CR, ATMEL_SPI_CR_SPIEN);
-
-	/*
-	 * Select the slave. This should set SCK to the correct
-	 * initial state, etc.
-	 */
-	spi_writel(as, MR, as->mr);
-
-	return 0;
-}
-
-void spi_release_bus(struct spi_slave *slave)
-{
-	struct atmel_spi_slave *as = to_atmel_spi(slave);
-
-	/* Disable the SPI hardware */
-	spi_writel(as, CR, ATMEL_SPI_CR_SPIDIS);
-}
-
-int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
-		const void *dout, void *din, unsigned long flags)
-{
-	struct atmel_spi_slave *as = to_atmel_spi(slave);
-	unsigned int	len_tx;
-	unsigned int	len_rx;
-	unsigned int	len;
-	u32		status;
-	const u8	*txp = dout;
-	u8		*rxp = din;
-	u8		value;
-
-	if (bitlen == 0)
-		/* Finish any previously submitted transfers */
-		goto out;
-
-	/*
-	 * TODO: The controller can do non-multiple-of-8 bit
-	 * transfers, but this driver currently doesn't support it.
-	 *
-	 * It's also not clear how such transfers are supposed to be
-	 * represented as a stream of bytes...this is a limitation of
-	 * the current SPI interface.
-	 */
-	if (bitlen % 8) {
-		/* Errors always terminate an ongoing transfer */
-		flags |= SPI_XFER_END;
-		goto out;
-	}
-
-	len = bitlen / 8;
-
-	/*
-	 * The controller can do automatic CS control, but it is
-	 * somewhat quirky, and it doesn't really buy us much anyway
-	 * in the context of U-Boot.
-	 */
-	if (flags & SPI_XFER_BEGIN) {
-		spi_cs_activate(slave);
-		/*
-		 * sometimes the RDR is not empty when we get here,
-		 * in theory that should not happen, but it DOES happen.
-		 * Read it here to be on the safe side.
-		 * That also clears the OVRES flag. Required if the
-		 * following loop exits due to OVRES!
-		 */
-		spi_readl(as, RDR);
-	}
-
-	for (len_tx = 0, len_rx = 0; len_rx < len; ) {
-		status = spi_readl(as, SR);
-
-		if (status & ATMEL_SPI_SR_OVRES)
-			return -1;
-
-		if (len_tx < len && (status & ATMEL_SPI_SR_TDRE)) {
-			if (txp)
-				value = *txp++;
-			else
-				value = 0;
-			spi_writel(as, TDR, value);
-			len_tx++;
-		}
-		if (status & ATMEL_SPI_SR_RDRF) {
-			value = spi_readl(as, RDR);
-			if (rxp)
-				*rxp++ = value;
-			len_rx++;
-		}
-	}
-
-out:
-	if (flags & SPI_XFER_END) {
-		/*
-		 * Wait until the transfer is completely done before
-		 * we deactivate CS.
-		 */
-		do {
-			status = spi_readl(as, SR);
-		} while (!(status & ATMEL_SPI_SR_TXEMPTY));
-
-		spi_cs_deactivate(slave);
-	}
-
-	return 0;
-}
-
-#else
-
 #define MAX_CS_COUNT	4
 
 struct atmel_spi_platdata {
@@ -515,4 +315,3 @@ U_BOOT_DRIVER(atmel_spi) = {
 	.priv_auto_alloc_size = sizeof(struct atmel_spi_priv),
 	.probe	= atmel_spi_probe,
 };
-#endif
diff --git a/drivers/spi/atmel_spi.h b/drivers/spi/atmel_spi.h
index 76b8556c98..685eeed99e 100644
--- a/drivers/spi/atmel_spi.h
+++ b/drivers/spi/atmel_spi.h
@@ -79,22 +79,6 @@
 #define ATMEL_SPI_BITS_16		8
 
 struct atmel_spi_slave {
-	struct spi_slave slave;
 	void		*regs;
 	u32		mr;
 };
-
-static inline struct atmel_spi_slave *to_atmel_spi(struct spi_slave *slave)
-{
-	return container_of(slave, struct atmel_spi_slave, slave);
-}
-
-/* Register access macros */
-#define spi_readl(as, reg)					\
-	readl(as->regs + ATMEL_SPI_##reg)
-#define spi_writel(as, reg, value)				\
-	writel(value, as->regs + ATMEL_SPI_##reg)
-
-#if !defined(CONFIG_SYS_SPI_WRITE_TOUT)
-#define CONFIG_SYS_SPI_WRITE_TOUT	(5 * CONFIG_SYS_HZ)
-#endif
diff --git a/include/configs/ma5d4evk.h b/include/configs/ma5d4evk.h
index 50b21c9d97..7ce4424cdf 100644
--- a/include/configs/ma5d4evk.h
+++ b/include/configs/ma5d4evk.h
@@ -84,7 +84,6 @@
  */
 #ifdef CONFIG_CMD_SF
 #define CONFIG_ATMEL_SPI
-#define CONFIG_ATMEL_SPI0
 #define CONFIG_SPI_FLASH_ATMEL
 #define CONFIG_SF_DEFAULT_BUS		0
 #define CONFIG_SF_DEFAULT_CS		0
diff --git a/include/configs/vinco.h b/include/configs/vinco.h
index 189ceca821..22d92ee86c 100644
--- a/include/configs/vinco.h
+++ b/include/configs/vinco.h
@@ -40,7 +40,6 @@
 
 #ifdef CONFIG_CMD_SF
 #define CONFIG_ATMEL_SPI
-#define CONFIG_ATMEL_SPI0
 #define CONFIG_SPI_FLASH_STMICRO
 #define CONFIG_SF_DEFAULT_BUS		0
 #define CONFIG_SF_DEFAULT_CS		0
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index e6e6703cce..3b801663b7 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -134,7 +134,8 @@ CONFIG_ATMEL_LCD_BGR555
 CONFIG_ATMEL_LCD_RGB565
 CONFIG_ATMEL_LEGACY
 CONFIG_ATMEL_MCI_8BIT
-CONFIG_ATMEL_SPI0
+CONFIG_ATMEL_NAND_HWECC
+CONFIG_ATMEL_NAND_HW_PMECC
 CONFIG_AT_TRANS
 CONFIG_AUTONEG_TIMEOUT
 CONFIG_AUTO_COMPLETE

commit 48fef189ac047a87a2bda296d390a06b144c1883
Author: Jagan Teki <jagan@amarulasolutions.com>
Date:   Wed Mar 14 18:46:31 2018 +0530

    UPSTREAM: spi: atmel: Add ifdef for DM_GPIO code
    
    Few boards are configuring gpio directly from board instead
    using drivers/gpio so add ifdef for DM_GPIO to compatible
    for both the cases.
    
    Change-Id: I12cb7f90bd11ca5687da7992382fb3b447d5ec1c
    Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
    Acked-by: Wenyou Yang <wenyouya@gmail.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 9bf48e2ee8a0174adfb0f18d110198e4ca042284)

diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c
index 8010ab434c..3cdfd366ab 100644
--- a/drivers/spi/atmel_spi.c
+++ b/drivers/spi/atmel_spi.c
@@ -236,7 +236,9 @@ struct atmel_spi_priv {
 	unsigned int freq;		/* Default frequency */
 	unsigned int mode;
 	ulong bus_clk_rate;
+#ifdef CONFIG_DM_GPIO
 	struct gpio_desc cs_gpios[MAX_CS_COUNT];
+#endif
 };
 
 static int atmel_spi_claim_bus(struct udevice *dev)
@@ -291,6 +293,7 @@ static int atmel_spi_release_bus(struct udevice *dev)
 
 static void atmel_spi_cs_activate(struct udevice *dev)
 {
+#ifdef CONFIG_DM_GPIO
 	struct udevice *bus = dev_get_parent(dev);
 	struct atmel_spi_priv *priv = dev_get_priv(bus);
 	struct dm_spi_slave_platdata *slave_plat = dev_get_parent_platdata(dev);
@@ -300,10 +303,12 @@ static void atmel_spi_cs_activate(struct udevice *dev)
 		return;
 
 	dm_gpio_set_value(&priv->cs_gpios[cs], 0);
+#endif
 }
 
 static void atmel_spi_cs_deactivate(struct udevice *dev)
 {
+#ifdef CONFIG_DM_GPIO
 	struct udevice *bus = dev_get_parent(dev);
 	struct atmel_spi_priv *priv = dev_get_priv(bus);
 	struct dm_spi_slave_platdata *slave_plat = dev_get_parent_platdata(dev);
@@ -313,6 +318,7 @@ static void atmel_spi_cs_deactivate(struct udevice *dev)
 		return;
 
 	dm_gpio_set_value(&priv->cs_gpios[cs], 1);
+#endif
 }
 
 static int atmel_spi_xfer(struct udevice *dev, unsigned int bitlen,
@@ -462,8 +468,7 @@ static int atmel_spi_enable_clk(struct udevice *bus)
 static int atmel_spi_probe(struct udevice *bus)
 {
 	struct atmel_spi_platdata *bus_plat = dev_get_platdata(bus);
-	struct atmel_spi_priv *priv = dev_get_priv(bus);
-	int i, ret;
+	int ret;
 
 	ret = atmel_spi_enable_clk(bus);
 	if (ret)
@@ -471,6 +476,10 @@ static int atmel_spi_probe(struct udevice *bus)
 
 	bus_plat->regs = (struct at91_spi *)devfdt_get_addr(bus);
 
+#ifdef CONFIG_DM_GPIO
+	struct atmel_spi_priv *priv = dev_get_priv(bus);
+	int i;
+
 	ret = gpio_request_list_by_name(bus, "cs-gpios", priv->cs_gpios,
 					ARRAY_SIZE(priv->cs_gpios), 0);
 	if (ret < 0) {
@@ -485,6 +494,7 @@ static int atmel_spi_probe(struct udevice *bus)
 		dm_gpio_set_dir_flags(&priv->cs_gpios[i],
 				      GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);
 	}
+#endif
 
 	writel(ATMEL_SPI_CR_SWRST, &bus_plat->regs->cr);
 

commit cafc69117ec0b551390dae9baf2f9cb1124b56c9
Author: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Date:   Thu Mar 22 22:55:02 2018 +0100

    UPSTREAM: omap3: spi: Correct ti, pindir-d0-out-d1-in parsing
    
    The ti,pindir-d0-out-d1-in property is not expected to have a value
    according to the device-tree binding, so treat it as a boolean not a
    uint property.
    
    Change-Id: Icfcb73b19f630bda5faf2d8bbb03efff6db9c933
    Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 63018a3eddd5d9c64f7ee42615a63c6a67ab484d)

diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c
index 053a67bbe0..1ac691a68e 100644
--- a/drivers/spi/omap3_spi.c
+++ b/drivers/spi/omap3_spi.c
@@ -630,8 +630,10 @@ static int omap3_spi_probe(struct udevice *dev)
 		(struct omap2_mcspi_platform_config*)dev_get_driver_data(dev);
 
 	priv->regs = (struct mcspi *)(devfdt_get_addr(dev) + data->regs_offset);
-	priv->pin_dir = fdtdec_get_uint(blob, node, "ti,pindir-d0-out-d1-in",
-					    MCSPI_PINDIR_D0_IN_D1_OUT);
+	if (fdtdec_get_bool(blob, node, "ti,pindir-d0-out-d1-in"))
+		priv->pin_dir = MCSPI_PINDIR_D0_OUT_D1_IN;
+	else
+		priv->pin_dir = MCSPI_PINDIR_D0_IN_D1_OUT;
 	priv->wordlen = SPI_DEFAULT_WORDLEN;
 	return 0;
 }

commit ba102646eacea44db69c8fdb2f51b9e94a59129e
Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Date:   Thu Mar 22 13:50:47 2018 +0300

    UPSTREAM: DW SPI: use 32 bit access instead of 16 and 32 bit mix
    
    Current DW SPI driver uses 32 bit access for some registers and
    16 bit access for others. So if DW SPI IP is connected via bus
    which doesn't support 16 bit access we will get bus error.
    
    Fix that by switching to 32 bit access only instead of 16 and 32 bit mix
    
    Additional Documentation to Support this Change:
    The DW_apb_ssi databook states:
    "All registers in the DW_apb_ssi are addressed at 32-bit boundaries
    to remain consistent with the AHB bus. Where the physical size of
    any register is less than 32-bits wide, the upper unused bits of
    the 32-bit boundary are reserved. Writing to these bits has no
    effect; reading from these bits returns 0." [1]
    
    [1] Section 6.1 of dw_apb_ssi.pdf (version 3.22a)
    
    Change-Id: I3e52a45a49f96177d1c0d3781d8d98d7df5d9e0c
    Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 4b5f6c52e78d43710a0d062e31de741ec76ceea1)

diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c
index 06f777461e..0e93b62eee 100644
--- a/drivers/spi/designware_spi.c
+++ b/drivers/spi/designware_spi.c
@@ -114,26 +114,16 @@ struct dw_spi_priv {
 	void *rx_end;
 };
 
-static inline u32 dw_readl(struct dw_spi_priv *priv, u32 offset)
+static inline u32 dw_read(struct dw_spi_priv *priv, u32 offset)
 {
 	return __raw_readl(priv->regs + offset);
 }
 
-static inline void dw_writel(struct dw_spi_priv *priv, u32 offset, u32 val)
+static inline void dw_write(struct dw_spi_priv *priv, u32 offset, u32 val)
 {
 	__raw_writel(val, priv->regs + offset);
 }
 
-static inline u16 dw_readw(struct dw_spi_priv *priv, u32 offset)
-{
-	return __raw_readw(priv->regs + offset);
-}
-
-static inline void dw_writew(struct dw_spi_priv *priv, u32 offset, u16 val)
-{
-	__raw_writew(val, priv->regs + offset);
-}
-
 static int request_gpio_cs(struct udevice *bus)
 {
 #if defined(CONFIG_DM_GPIO) && !defined(CONFIG_SPL_BUILD)
@@ -179,14 +169,14 @@ static int dw_spi_ofdata_to_platdata(struct udevice *bus)
 
 static inline void spi_enable_chip(struct dw_spi_priv *priv, int enable)
 {
-	dw_writel(priv, DW_SPI_SSIENR, (enable ? 1 : 0));
+	dw_write(priv, DW_SPI_SSIENR, (enable ? 1 : 0));
 }
 
 /* Restart the controller, disable all interrupts, clean rx fifo */
 static void spi_hw_init(struct dw_spi_priv *priv)
 {
 	spi_enable_chip(priv, 0);
-	dw_writel(priv, DW_SPI_IMR, 0xff);
+	dw_write(priv, DW_SPI_IMR, 0xff);
 	spi_enable_chip(priv, 1);
 
 	/*
@@ -197,13 +187,13 @@ static void spi_hw_init(struct dw_spi_priv *priv)
 		u32 fifo;
 
 		for (fifo = 1; fifo < 256; fifo++) {
-			dw_writew(priv, DW_SPI_TXFLTR, fifo);
-			if (fifo != dw_readw(priv, DW_SPI_TXFLTR))
+			dw_write(priv, DW_SPI_TXFLTR, fifo);
+			if (fifo != dw_read(priv, DW_SPI_TXFLTR))
 				break;
 		}
 
 		priv->fifo_len = (fifo == 1) ? 0 : fifo;
-		dw_writew(priv, DW_SPI_TXFLTR, 0);
+		dw_write(priv, DW_SPI_TXFLTR, 0);
 	}
 	debug("%s: fifo_len=%d\n", __func__, priv->fifo_len);
 }
@@ -272,7 +262,7 @@ static inline u32 tx_max(struct dw_spi_priv *priv)
 	u32 tx_left, tx_room, rxtx_gap;
 
 	tx_left = (priv->tx_end - priv->tx) / (priv->bits_per_word >> 3);
-	tx_room = priv->fifo_len - dw_readw(priv, DW_SPI_TXFLR);
+	tx_room = priv->fifo_len - dw_read(priv, DW_SPI_TXFLR);
 
 	/*
 	 * Another concern is about the tx/rx mismatch, we
@@ -293,7 +283,7 @@ static inline u32 rx_max(struct dw_spi_priv *priv)
 {
 	u32 rx_left = (priv->rx_end - priv->rx) / (priv->bits_per_word >> 3);
 
-	return min_t(u32, rx_left, dw_readw(priv, DW_SPI_RXFLR));
+	return min_t(u32, rx_left, dw_read(priv, DW_SPI_RXFLR));
 }
 
 static void dw_writer(struct dw_spi_priv *priv)
@@ -309,7 +299,7 @@ static void dw_writer(struct dw_spi_priv *priv)
 			else
 				txw = *(u16 *)(priv->tx);
 		}
-		dw_writew(priv, DW_SPI_DR, txw);
+		dw_write(priv, DW_SPI_DR, txw);
 		debug("%s: tx=0x%02x\n", __func__, txw);
 		priv->tx += priv->bits_per_word >> 3;
 	}
@@ -321,7 +311,7 @@ static void dw_reader(struct dw_spi_priv *priv)
 	u16 rxw;
 
 	while (max--) {
-		rxw = dw_readw(priv, DW_SPI_DR);
+		rxw = dw_read(priv, DW_SPI_DR);
 		debug("%s: rx=0x%02x\n", __func__, rxw);
 
 		/* Care about rx if the transfer's original "rx" is not null */
@@ -410,8 +400,8 @@ static int dw_spi_xfer(struct udevice *dev, unsigned int bitlen,
 
 	debug("%s: cr0=%08x\n", __func__, cr0);
 	/* Reprogram cr0 only if changed */
-	if (dw_readw(priv, DW_SPI_CTRL0) != cr0)
-		dw_writew(priv, DW_SPI_CTRL0, cr0);
+	if (dw_read(priv, DW_SPI_CTRL0) != cr0)
+		dw_write(priv, DW_SPI_CTRL0, cr0);
 
 	/*
 	 * Configure the desired SS (slave select 0...3) in the controller
@@ -419,7 +409,7 @@ static int dw_spi_xfer(struct udevice *dev, unsigned int bitlen,
 	 * automatically. So no cs_activate() etc is needed in this driver.
 	 */
 	cs = spi_chip_select(dev);
-	dw_writel(priv, DW_SPI_SER, 1 << cs);
+	dw_write(priv, DW_SPI_SER, 1 << cs);
 
 	/* Enable controller after writing control registers */
 	spi_enable_chip(priv, 1);
@@ -462,7 +452,7 @@ static int dw_spi_set_speed(struct udevice *bus, uint speed)
 	/* clk_div doesn't support odd number */
 	clk_div = priv->bus_clk_rate / speed;
 	clk_div = (clk_div + 1) & 0xfffe;
-	dw_writel(priv, DW_SPI_BAUDR, clk_div);
+	dw_write(priv, DW_SPI_BAUDR, clk_div);
 
 	/* Enable controller after writing control registers */
 	spi_enable_chip(priv, 1);

commit c2b2998cf00e3251b49c85050dc157b8be113396
Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Date:   Thu Mar 22 13:50:46 2018 +0300

    UPSTREAM: DW SPI: add option to use external gpio for chip select
    
    DW SPI internal chip select management has limitation:
    it hold CS line in active state only when the FIFO is not
    empty. If the FIFO freed before we add new data the SPI transaction will
    be broken.
    
    So add option to use external gpio for chip select. Gpio can be added
    via device tree using standard gpio bindings.
    
    Change-Id: Ifecfe693bdc9316da7d23db43f8764885e3cb786
    Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit bcdcb3e61ebd0550355883aed3978028d0e7778b)

diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c
index b51242c862..06f777461e 100644
--- a/drivers/spi/designware_spi.c
+++ b/drivers/spi/designware_spi.c
@@ -10,6 +10,7 @@
  * SPDX-License-Identifier:	GPL-2.0
  */
 
+#include <asm-generic/gpio.h>
 #include <common.h>
 #include <clk.h>
 #include <dm.h>
@@ -98,6 +99,8 @@ struct dw_spi_priv {
 	struct clk clk;
 	unsigned long bus_clk_rate;
 
+	struct gpio_desc cs_gpio;	/* External chip-select gpio */
+
 	int bits_per_word;
 	u8 cs;			/* chip select pin */
 	u8 tmode;		/* TR/TO/RO/EEPROM */
@@ -131,6 +134,32 @@ static inline void dw_writew(struct dw_spi_priv *priv, u32 offset, u16 val)
 	__raw_writew(val, priv->regs + offset);
 }
 
+static int request_gpio_cs(struct udevice *bus)
+{
+#if defined(CONFIG_DM_GPIO) && !defined(CONFIG_SPL_BUILD)
+	struct dw_spi_priv *priv = dev_get_priv(bus);
+	int ret;
+
+	/* External chip select gpio line is optional */
+	ret = gpio_request_by_name(bus, "cs-gpio", 0, &priv->cs_gpio, 0);
+	if (ret == -ENOENT)
+		return 0;
+
+	if (ret < 0) {
+		printf("Error: %d: Can't get %s gpio!\n", ret, bus->name);
+		return ret;
+	}
+
+	if (dm_gpio_is_valid(&priv->cs_gpio)) {
+		dm_gpio_set_dir_flags(&priv->cs_gpio,
+				      GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);
+	}
+
+	debug("%s: used external gpio for CS management\n", __func__);
+#endif
+	return 0;
+}
+
 static int dw_spi_ofdata_to_platdata(struct udevice *bus)
 {
 	struct dw_spi_platdata *plat = bus->platdata;
@@ -145,7 +174,7 @@ static int dw_spi_ofdata_to_platdata(struct udevice *bus)
 	debug("%s: regs=%p max-frequency=%d\n", __func__, plat->regs,
 	      plat->frequency);
 
-	return 0;
+	return request_gpio_cs(bus);
 }
 
 static inline void spi_enable_chip(struct dw_spi_priv *priv, int enable)
@@ -316,6 +345,18 @@ static int poll_transfer(struct dw_spi_priv *priv)
 	return 0;
 }
 
+static void external_cs_manage(struct udevice *dev, bool on)
+{
+#if defined(CONFIG_DM_GPIO) && !defined(CONFIG_SPL_BUILD)
+	struct dw_spi_priv *priv = dev_get_priv(dev->parent);
+
+	if (!dm_gpio_is_valid(&priv->cs_gpio))
+		return;
+
+	dm_gpio_set_value(&priv->cs_gpio, on ? 1 : 0);
+#endif
+}
+
 static int dw_spi_xfer(struct udevice *dev, unsigned int bitlen,
 		       const void *dout, void *din, unsigned long flags)
 {
@@ -334,6 +375,10 @@ static int dw_spi_xfer(struct udevice *dev, unsigned int bitlen,
 		return -1;
 	}
 
+	/* Start the transaction if necessary. */
+	if (flags & SPI_XFER_BEGIN)
+		external_cs_manage(dev, false);
+
 	cr0 = (priv->bits_per_word - 1) | (priv->type << SPI_FRF_OFFSET) |
 		(priv->mode << SPI_MODE_OFFSET) |
 		(priv->tmode << SPI_TMOD_OFFSET);
@@ -395,6 +440,10 @@ static int dw_spi_xfer(struct udevice *dev, unsigned int bitlen,
 		ret = -ETIMEDOUT;
 	}
 
+	/* Stop the transaction if necessary */
+	if (flags & SPI_XFER_END)
+		external_cs_manage(dev, true);
+
 	return ret;
 }
 

commit 6904f1891df1de1bc1dd54c7bb84e95212d454c4
Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Date:   Thu Mar 22 13:50:45 2018 +0300

    UPSTREAM: DW SPI: refactor poll_transfer functions
    
    There is no sense in waiting for RX data in dw_reader function:
    there is no chance that RX data will appear in RX FIFO if
    RX FIFO is empty after previous TX write in dw_writer function.
    So get rid of this waiting. After that we can get rid of dw_reader
    return value and make it returning void. After that we can get rid
    of dw_reader return value check in poll_transfer function.
    
    With these changes we're getting closer to Linux DW SPI driver.
    
    Change-Id: I2654951199094c51609c5402b5abd62438bbf1dd
    Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit d3d8aaec7401703079f296a6460fe649fb06581b)

diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c
index 3296441606..b51242c862 100644
--- a/drivers/spi/designware_spi.c
+++ b/drivers/spi/designware_spi.c
@@ -286,28 +286,16 @@ static void dw_writer(struct dw_spi_priv *priv)
 	}
 }
 
-static int dw_reader(struct dw_spi_priv *priv)
+static void dw_reader(struct dw_spi_priv *priv)
 {
-	unsigned start = get_timer(0);
-	u32 max;
+	u32 max = rx_max(priv);
 	u16 rxw;
 
-	/* Wait for rx data to be ready */
-	while (rx_max(priv) == 0) {
-		if (get_timer(start) > RX_TIMEOUT)
-			return -ETIMEDOUT;
-	}
-
-	max = rx_max(priv);
-
 	while (max--) {
 		rxw = dw_readw(priv, DW_SPI_DR);
 		debug("%s: rx=0x%02x\n", __func__, rxw);
 
-		/*
-		 * Care about rx only if the transfer's original "rx" is
-		 * not null
-		 */
+		/* Care about rx if the transfer's original "rx" is not null */
 		if (priv->rx_end - priv->len) {
 			if (priv->bits_per_word == 8)
 				*(u8 *)(priv->rx) = rxw;
@@ -316,19 +304,13 @@ static int dw_reader(struct dw_spi_priv *priv)
 		}
 		priv->rx += priv->bits_per_word >> 3;
 	}
-
-	return 0;
 }
 
 static int poll_transfer(struct dw_spi_priv *priv)
 {
-	int ret;
-
 	do {
 		dw_writer(priv);
-		ret = dw_reader(priv);
-		if (ret < 0)
-			return ret;
+		dw_reader(priv);
 	} while (priv->rx_end > priv->rx);
 
 	return 0;

commit 131bd2776a4017e8c53da3853cebbfb8659c01f8
Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Date:   Thu Mar 22 13:50:44 2018 +0300

    UPSTREAM: DW SPI: fix transmit only mode
    
    In current implementation we get -ETIMEDOUT error when we try to use
    transmit only mode (SPI_TMOD_TO)
    This happens because in transmit only mode input FIFO never gets any data
    which breaks our logic in dw_reader(): we are waiting until RX data will be
    ready in dw_reader, but this newer happens, so we return with error.
    
    Fix that by using SPI_TMOD_TR instead of SPI_TMOD_TO which allows to use
    RX FIFO.
    
    Change-Id: I876d86fbf05feccebf6ded5f3acfa09a6cd15ea2
    Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit fc282c7bcb6a622ce1a0cf82c55654dec5bcb0cd)

diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c
index 5e196b21c9..3296441606 100644
--- a/drivers/spi/designware_spi.c
+++ b/drivers/spi/designware_spi.c
@@ -361,7 +361,11 @@ static int dw_spi_xfer(struct udevice *dev, unsigned int bitlen,
 	else if (rx)
 		priv->tmode = SPI_TMOD_RO;
 	else
-		priv->tmode = SPI_TMOD_TO;
+		/*
+		 * In transmit only mode (SPI_TMOD_TO) input FIFO never gets
+		 * any data which breaks our logic in poll_transfer() above.
+		 */
+		priv->tmode = SPI_TMOD_TR;
 
 	cr0 &= ~SPI_TMOD_MASK;
 	cr0 |= (priv->tmode << SPI_TMOD_OFFSET);

commit cccfaa061588768f9ca8c90b9c8cbebf4297e225
Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Date:   Thu Mar 22 13:50:43 2018 +0300

    UPSTREAM: DW SPI: fix tx data loss on FIFO flush
    
    In current implementation if some data still exists in Tx FIFO it
    can be silently flushed, i.e. dropped on disabling of the controller,
    which happens when writing 0 to DW_SPI_SSIENR (it happens in the
    beginning of new transfer)
    
    So add wait for current transmit operation to complete to be sure
    that current transmit operation is finished before new one.
    
    Change-Id: I13be86b6b7da544ff64656fdb62ea79d5ee16d26
    Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit c6b4f031d96a4e1d59761b294829b058b098f3df)

diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c
index c501aeea16..5e196b21c9 100644
--- a/drivers/spi/designware_spi.c
+++ b/drivers/spi/designware_spi.c
@@ -18,6 +18,7 @@
 #include <spi.h>
 #include <fdtdec.h>
 #include <linux/compat.h>
+#include <linux/iopoll.h>
 #include <asm/io.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -342,6 +343,7 @@ static int dw_spi_xfer(struct udevice *dev, unsigned int bitlen,
 	u8 *rx = din;
 	int ret = 0;
 	u32 cr0 = 0;
+	u32 val;
 	u32 cs;
 
 	/* spi core configured to do 8 bit transfers */
@@ -394,6 +396,19 @@ static int dw_spi_xfer(struct udevice *dev, unsigned int bitlen,
 	/* Start transfer in a polling loop */
 	ret = poll_transfer(priv);
 
+	/*
+	 * Wait for current transmit operation to complete.
+	 * Otherwise if some data still exists in Tx FIFO it can be
+	 * silently flushed, i.e. dropped on disabling of the controller,
+	 * which happens when writing 0 to DW_SPI_SSIENR which happens
+	 * in the beginning of new transfer.
+	 */
+	if (readl_poll_timeout(priv->regs + DW_SPI_SR, val,
+			       !(val & SR_TF_EMPT) || (val & SR_BUSY),
+			       RX_TIMEOUT * 1000)) {
+		ret = -ETIMEDOUT;
+	}
+
 	return ret;
 }
 

commit 43e86b9a684069967de7ffc4499a20180385ba48
Author: Jagan Teki <jagan@amarulasolutions.com>
Date:   Wed Mar 14 23:07:31 2018 +0530

    UPSTREAM: spi: omap3: Fix redeclared error
    
    omap3_spi_set_speed|mode redeclared bus symbol, fix the same.
    
    error:
    drivers/spi/omap3_spi.c: In function ‘omap3_spi_set_speed’:
    drivers/spi/omap3_spi.c:650:18: error: ‘bus’ redeclared as different kind of symbol
      struct udevice *bus = dev->parent;
    
    Change-Id: I6413fbdc32b1365d545033382c40fa39f85e5b84
    Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit b2b41d27775823b8e19f6816aa08ffca0e234ade)

diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c
index b8a0bf495a..053a67bbe0 100644
--- a/drivers/spi/omap3_spi.c
+++ b/drivers/spi/omap3_spi.c
@@ -645,7 +645,7 @@ static int omap3_spi_xfer(struct udevice *dev, unsigned int bitlen,
 	return _spi_xfer(priv, bitlen, dout, din, flags);
 }
 
-static int omap3_spi_set_speed(struct udevice *bus, unsigned int speed)
+static int omap3_spi_set_speed(struct udevice *dev, unsigned int speed)
 {
 	struct udevice *bus = dev->parent;
 	struct omap3_spi_priv *priv = dev_get_priv(bus);
@@ -658,7 +658,7 @@ static int omap3_spi_set_speed(struct udevice *bus, unsigned int speed)
 	return 0;
 }
 
-static int omap3_spi_set_mode(struct udevice *bus, uint mode)
+static int omap3_spi_set_mode(struct udevice *dev, uint mode)
 {
 	struct udevice *bus = dev->parent;
 	struct omap3_spi_priv *priv = dev_get_priv(bus);

commit 226998e3ef11e87e0fbf50715220ffe40ed4c9ea
Author: Jagan Teki <jagan@amarulasolutions.com>
Date:   Wed Mar 7 10:30:45 2018 +0530

    UPSTREAM: spi: omap3: Skip set_mode, set_speed from claim
    
    set_mode, set_seed functions has separate function pointers
    in dm_spi_ops, so use them in relevent one instead of
    calling from claim_bus.
    
    Change-Id: Ifbe121f3a84c8b2ce007fe5a80fdd213b9f78a82
    Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 84807922874e03895bbf15c4472a2dcee8fbbd03)

diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c
index 1da4542af0..b8a0bf495a 100644
--- a/drivers/spi/omap3_spi.c
+++ b/drivers/spi/omap3_spi.c
@@ -456,9 +456,6 @@ static void _omap3_spi_claim_bus(struct omap3_spi_priv *priv)
 	conf |= OMAP3_MCSPI_MODULCTRL_SINGLE;
 
 	writel(conf, &priv->regs->modulctrl);
-
-	_omap3_spi_set_mode(priv);
-	_omap3_spi_set_speed(priv);
 }
 
 #ifndef CONFIG_DM_SPI
@@ -594,8 +591,6 @@ static int omap3_spi_claim_bus(struct udevice *dev)
 	struct dm_spi_slave_platdata *slave_plat = dev_get_parent_platdata(dev);
 
 	priv->cs = slave_plat->cs;
-	priv->mode = slave_plat->mode;
-	priv->freq = slave_plat->max_hz;
 	_omap3_spi_claim_bus(priv);
 
 	return 0;
@@ -652,11 +647,27 @@ static int omap3_spi_xfer(struct udevice *dev, unsigned int bitlen,
 
 static int omap3_spi_set_speed(struct udevice *bus, unsigned int speed)
 {
+	struct udevice *bus = dev->parent;
+	struct omap3_spi_priv *priv = dev_get_priv(bus);
+	struct dm_spi_slave_platdata *slave_plat = dev_get_parent_platdata(dev);
+
+	priv->cs = slave_plat->cs;
+	priv->freq = slave_plat->max_hz;
+	_omap3_spi_set_speed(priv);
+
 	return 0;
 }
 
 static int omap3_spi_set_mode(struct udevice *bus, uint mode)
 {
+	struct udevice *bus = dev->parent;
+	struct omap3_spi_priv *priv = dev_get_priv(bus);
+	struct dm_spi_slave_platdata *slave_plat = dev_get_parent_platdata(dev);
+
+	priv->cs = slave_plat->cs;
+	priv->mode = slave_plat->mode;
+	_omap3_spi_set_mode(priv);
+
 	return 0;
 }
 

commit 0d17c3df7fd4704b61815d11bd914866bbfb27d1
Author: Jagan Teki <jagan@amarulasolutions.com>
Date:   Wed Mar 7 10:33:33 2018 +0530

    UPSTREAM: spi: atcspi200: Drop non-dm code
    
    Boards adp-ae3xx_defconfig, nx25-ae250_defconfig
    already enabled DM_SPI, so non-dm code make no use
    of it hence droped.
    
    Change-Id: I6864c71a8e9a97619fbe1989856077285aa2408e
    Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 15927aef02b7e7b5921bd1470ce145c2fa03ef08)

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 57bbb5814f..ac17d307e2 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -30,6 +30,13 @@ config ALTERA_SPI
 	  IP core. Please find details on the "Embedded Peripherals IP
 	  User Guide" of Altera.
 
+config ATCSPI200_SPI
+	bool "Andestech ATCSPI200 SPI driver"
+	help
+	  Enable the Andestech ATCSPI200 SPI driver. This driver can be
+	  used to access the SPI flash on AE3XX and AE250 platforms embedding
+	  this Andestech IP core.
+
 config ATH79_SPI
 	bool "Atheros SPI driver"
 	depends on ARCH_ATH79
@@ -247,13 +254,6 @@ config FSL_QSPI
 	  used to access the SPI NOR flash on platforms embedding this
 	  Freescale IP core.
 
-config ATCSPI200_SPI
-	bool "Andestech ATCSPI200 SPI driver"
-	help
-	  Enable the Andestech ATCSPI200 SPI driver. This driver can be
-	  used to access the SPI flash on AE3XX and AE250 platforms embedding
-	  this Andestech IP core.
-
 config DAVINCI_SPI
 	bool "Davinci & Keystone SPI driver"
 	depends on ARCH_DAVINCI || ARCH_KEYSTONE
diff --git a/drivers/spi/atcspi200_spi.c b/drivers/spi/atcspi200_spi.c
index 5b2e9d6264..bc08914b9e 100644
--- a/drivers/spi/atcspi200_spi.c
+++ b/drivers/spi/atcspi200_spi.c
@@ -75,9 +75,6 @@ struct atcspi200_spi_regs {
 };
 
 struct nds_spi_slave {
-#ifndef CONFIG_DM_SPI
-	struct spi_slave slave;
-#endif
 	volatile struct atcspi200_spi_regs *regs;
 	int		to;
 	unsigned int	freq;
@@ -286,89 +283,6 @@ static int __atcspi200_spi_xfer(struct nds_spi_slave *ns,
 		return ret;
 }
 
-#ifndef CONFIG_DM_SPI
-#define to_nds_spi_slave(s) container_of(s, struct nds_spi_slave, slave)
-struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
-		unsigned int max_hz, unsigned int mode)
-{
-	struct nds_spi_slave *ns;
-
-	if (!spi_cs_is_valid(bus, cs))
-		return NULL;
-
-	ns = spi_alloc_slave(struct nds_spi_slave, bus, cs);
-	if (!ns)
-		return NULL;
-
-	switch (bus) {
-	case SPI0_BUS:
-			ns->regs = (struct atcspi200_spi_regs *)SPI0_BASE;
-			break;
-
-		case SPI1_BUS:
-			ns->regs = (struct atcspi200_spi_regs *)SPI1_BASE;
-			break;
-
-		default:
-			return NULL;
-	}
-
-	ns->freq= max_hz;
-	ns->mode = mode;
-	ns->to = SPI_TIMEOUT;
-	ns->max_transfer_length = MAX_TRANSFER_LEN;
-	ns->slave.max_write_size = MAX_TRANSFER_LEN;
-
-	return &ns->slave;
-}
-
-void spi_free_slave(struct spi_slave *slave)
-{
-	struct nds_spi_slave *ns = to_nds_spi_slave(slave);
-	free(ns);
-}
-
-void spi_init(void)
-{
-	/* do nothing */
-}
-
-int spi_claim_bus(struct spi_slave *slave)
-{
-	struct nds_spi_slave *ns = to_nds_spi_slave(slave);
-	return __atcspi200_spi_claim_bus(ns);
-}
-
-void spi_release_bus(struct spi_slave *slave)
-{
-	struct nds_spi_slave *ns = to_nds_spi_slave(slave);
-	__atcspi200_spi_release_bus(ns);
-}
-
-int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *data_out,
-		void *data_in, unsigned long flags)
-{
-	struct nds_spi_slave *ns = to_nds_spi_slave(slave);
-	return __atcspi200_spi_xfer(ns, bitlen, data_out, data_in, flags);
-}
-
-int spi_cs_is_valid(unsigned int bus, unsigned int cs)
-{
-	return bus == 0 && cs < NSPI_MAX_CS_NUM;
-}
-
-void spi_cs_activate(struct spi_slave *slave)
-{
-	struct nds_spi_slave *ns = to_nds_spi_slave(slave);
-	__atcspi200_spi_start(ns);
-}
-
-void spi_cs_deactivate(struct spi_slave *slave)
-{
-	struct nds_spi_slave *ns = to_nds_spi_slave(slave);
-	__atcspi200_spi_stop(ns);
-}
-#else
 static int atcspi200_spi_set_speed(struct udevice *bus, uint max_hz)
 {
 	struct nds_spi_slave *ns = dev_get_priv(bus);
@@ -496,4 +410,3 @@ U_BOOT_DRIVER(atcspi200_spi) = {
 	.priv_auto_alloc_size = sizeof(struct nds_spi_slave),
 	.probe = atcspi200_spi_probe,
 };
-#endif

commit 845f53cfd39d4fdfc363cc538eb062d78823ad7f
Author: Tuomas Tynkkynen <tuomas@tuxera.com>
Date:   Wed Feb 7 02:42:23 2018 +0200

    UPSTREAM: spi: Migrate CONFIG_CF_SPI to Kconfig
    
    Change-Id: Ia9f6139d87f28ef8bbab5effb15b3e00e53e732d
    Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit fbca0e66cc982325d8031094736d79ed007e42e2)

diff --git a/configs/M52277EVB_defconfig b/configs/M52277EVB_defconfig
index aaf7f96cdb..88dcd9c51f 100644
--- a/configs/M52277EVB_defconfig
+++ b/configs/M52277EVB_defconfig
@@ -18,3 +18,4 @@ CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_CF_SPI=y
diff --git a/configs/M52277EVB_stmicro_defconfig b/configs/M52277EVB_stmicro_defconfig
index df97e20b74..bd86c43415 100644
--- a/configs/M52277EVB_stmicro_defconfig
+++ b/configs/M52277EVB_stmicro_defconfig
@@ -17,3 +17,4 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_CF_SPI=y
diff --git a/configs/M54418TWR_defconfig b/configs/M54418TWR_defconfig
index ee4dacd38c..9ae7f43fa3 100644
--- a/configs/M54418TWR_defconfig
+++ b/configs/M54418TWR_defconfig
@@ -21,3 +21,4 @@ CONFIG_CMD_CACHE=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_CF_SPI=y
diff --git a/configs/M54418TWR_nand_mii_defconfig b/configs/M54418TWR_nand_mii_defconfig
index efac720b7a..e4b71d4768 100644
--- a/configs/M54418TWR_nand_mii_defconfig
+++ b/configs/M54418TWR_nand_mii_defconfig
@@ -20,3 +20,4 @@ CONFIG_CMD_PING=y
 CONFIG_CMD_CACHE=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_CF_SPI=y
diff --git a/configs/M54418TWR_nand_rmii_defconfig b/configs/M54418TWR_nand_rmii_defconfig
index 09419c23ab..cd2e811e41 100644
--- a/configs/M54418TWR_nand_rmii_defconfig
+++ b/configs/M54418TWR_nand_rmii_defconfig
@@ -20,3 +20,4 @@ CONFIG_CMD_PING=y
 CONFIG_CMD_CACHE=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_CF_SPI=y
diff --git a/configs/M54418TWR_nand_rmii_lowfreq_defconfig b/configs/M54418TWR_nand_rmii_lowfreq_defconfig
index 5da77034a6..782df50fe9 100644
--- a/configs/M54418TWR_nand_rmii_lowfreq_defconfig
+++ b/configs/M54418TWR_nand_rmii_lowfreq_defconfig
@@ -20,3 +20,4 @@ CONFIG_CMD_PING=y
 CONFIG_CMD_CACHE=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_CF_SPI=y
diff --git a/configs/M54418TWR_serial_mii_defconfig b/configs/M54418TWR_serial_mii_defconfig
index 4e8a113975..6cb12c9644 100644
--- a/configs/M54418TWR_serial_mii_defconfig
+++ b/configs/M54418TWR_serial_mii_defconfig
@@ -21,3 +21,4 @@ CONFIG_CMD_CACHE=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_CF_SPI=y
diff --git a/configs/M54418TWR_serial_rmii_defconfig b/configs/M54418TWR_serial_rmii_defconfig
index ee4dacd38c..9ae7f43fa3 100644
--- a/configs/M54418TWR_serial_rmii_defconfig
+++ b/configs/M54418TWR_serial_rmii_defconfig
@@ -21,3 +21,4 @@ CONFIG_CMD_CACHE=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_CF_SPI=y
diff --git a/configs/M54451EVB_defconfig b/configs/M54451EVB_defconfig
index 82f2dbe096..b1acff4bcc 100644
--- a/configs/M54451EVB_defconfig
+++ b/configs/M54451EVB_defconfig
@@ -21,3 +21,4 @@ CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_CF_SPI=y
diff --git a/configs/M54451EVB_stmicro_defconfig b/configs/M54451EVB_stmicro_defconfig
index 41cfe6821f..9141f956b2 100644
--- a/configs/M54451EVB_stmicro_defconfig
+++ b/configs/M54451EVB_stmicro_defconfig
@@ -20,3 +20,4 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_CF_SPI=y
diff --git a/configs/M54455EVB_a66_defconfig b/configs/M54455EVB_a66_defconfig
index 4136482bf5..bce319df04 100644
--- a/configs/M54455EVB_a66_defconfig
+++ b/configs/M54455EVB_a66_defconfig
@@ -25,3 +25,4 @@ CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_CF_SPI=y
diff --git a/configs/M54455EVB_defconfig b/configs/M54455EVB_defconfig
index 46261961aa..3b344dc6f4 100644
--- a/configs/M54455EVB_defconfig
+++ b/configs/M54455EVB_defconfig
@@ -26,3 +26,4 @@ CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_CF_SPI=y
diff --git a/configs/M54455EVB_i66_defconfig b/configs/M54455EVB_i66_defconfig
index 691f57c364..ce9f8301bc 100644
--- a/configs/M54455EVB_i66_defconfig
+++ b/configs/M54455EVB_i66_defconfig
@@ -25,3 +25,4 @@ CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_CF_SPI=y
diff --git a/configs/M54455EVB_intel_defconfig b/configs/M54455EVB_intel_defconfig
index 35f2dc08d0..de11894490 100644
--- a/configs/M54455EVB_intel_defconfig
+++ b/configs/M54455EVB_intel_defconfig
@@ -25,3 +25,4 @@ CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_CF_SPI=y
diff --git a/configs/M54455EVB_stm33_defconfig b/configs/M54455EVB_stm33_defconfig
index 723692aa83..fc37b1f0ed 100644
--- a/configs/M54455EVB_stm33_defconfig
+++ b/configs/M54455EVB_stm33_defconfig
@@ -25,3 +25,4 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_CF_SPI=y
diff --git a/configs/stmark2_defconfig b/configs/stmark2_defconfig
index 2feb6828a0..38ea407b83 100644
--- a/configs/stmark2_defconfig
+++ b/configs/stmark2_defconfig
@@ -28,4 +28,5 @@ CONFIG_MTD_DEVICE=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ISSI=y
 CONFIG_SPI_FLASH_MTD=y
+CONFIG_CF_SPI=y
 CONFIG_REGEX=y
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 8a7a62a7b3..57bbb5814f 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -227,6 +227,12 @@ config SOFT_SPI
 	 Enable Soft SPI driver. This driver is to use GPIO simulate
 	 the SPI protocol.
 
+config CF_SPI
+	bool "ColdFire SPI driver"
+	help
+	  Enable the ColdFire SPI driver. This driver can be used on
+	  some m68k SoCs.
+
 config FSL_ESPI
 	bool "Freescale eSPI driver"
 	help
diff --git a/include/configs/M52277EVB.h b/include/configs/M52277EVB.h
index 98692df495..bfae23ca39 100644
--- a/include/configs/M52277EVB.h
+++ b/include/configs/M52277EVB.h
@@ -106,7 +106,6 @@
 #define CONFIG_SYS_IMMR			CONFIG_SYS_MBAR
 
 /* DSPI and Serial Flash */
-#define CONFIG_CF_SPI
 #define CONFIG_CF_DSPI
 #define CONFIG_HARD_SPI
 #define CONFIG_SYS_SBFHDR_SIZE		0x7
diff --git a/include/configs/M54418TWR.h b/include/configs/M54418TWR.h
index e91331fb2a..9c4ad70f7e 100644
--- a/include/configs/M54418TWR.h
+++ b/include/configs/M54418TWR.h
@@ -155,7 +155,6 @@
 #define CONFIG_SYS_IMMR		CONFIG_SYS_MBAR
 
 /* DSPI and Serial Flash */
-#define CONFIG_CF_SPI
 #define CONFIG_CF_DSPI
 #define CONFIG_SERIAL_FLASH
 #define CONFIG_HARD_SPI
diff --git a/include/configs/M54451EVB.h b/include/configs/M54451EVB.h
index ebc8277ec4..f2b133cad2 100644
--- a/include/configs/M54451EVB.h
+++ b/include/configs/M54451EVB.h
@@ -119,7 +119,6 @@
 #define CONFIG_SYS_IMMR			CONFIG_SYS_MBAR
 
 /* DSPI and Serial Flash */
-#define CONFIG_CF_SPI
 #define CONFIG_CF_DSPI
 #define CONFIG_SERIAL_FLASH
 #define CONFIG_HARD_SPI
diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h
index a709fbbf63..5f78ebb3ab 100644
--- a/include/configs/M54455EVB.h
+++ b/include/configs/M54455EVB.h
@@ -146,7 +146,6 @@
 #define CONFIG_SYS_IMMR		CONFIG_SYS_MBAR
 
 /* DSPI and Serial Flash */
-#define CONFIG_CF_SPI
 #define CONFIG_CF_DSPI
 #define CONFIG_HARD_SPI
 #define CONFIG_SYS_SBFHDR_SIZE		0x13
diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h
index cfe2f6e878..32f94625c9 100644
--- a/include/configs/stmark2.h
+++ b/include/configs/stmark2.h
@@ -71,7 +71,6 @@
 #undef CONFIG_MCFPIT
 
 /* DSPI and Serial Flash */
-#define CONFIG_CF_SPI
 #define CONFIG_CF_DSPI
 #define CONFIG_SF_DEFAULT_SPEED		50000000
 #define CONFIG_SERIAL_FLASH
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 673596a6d3..e6e6703cce 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -258,7 +258,6 @@ CONFIG_CFG_DATA_SECTOR
 CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
 CONFIG_CF_DSPI
 CONFIG_CF_SBF
-CONFIG_CF_SPI
 CONFIG_CF_V2
 CONFIG_CF_V3
 CONFIG_CF_V4

commit 5932b8bc8c3ed371692688174c52a2b38c5ee797
Author: Tuomas Tynkkynen <tuomas@tuxera.com>
Date:   Wed Feb 7 02:42:22 2018 +0200

    UPSTREAM: spi: Migrate CONFIG_KIRKWOOD_SPI to Kconfig
    
    Change-Id: I70b43d668f905f236e18493c07ac6c369b7ca2d1
    Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 4a942f49b891872727aa0bdba58e2ca513fc455c)

diff --git a/arch/arm/mach-kirkwood/include/mach/config.h b/arch/arm/mach-kirkwood/include/mach/config.h
index ba6007186e..ea1a59b3ba 100644
--- a/arch/arm/mach-kirkwood/include/mach/config.h
+++ b/arch/arm/mach-kirkwood/include/mach/config.h
@@ -61,7 +61,6 @@
  */
 #ifdef CONFIG_CMD_SF
 #define CONFIG_HARD_SPI			1
-#define CONFIG_KIRKWOOD_SPI		1
 #ifndef CONFIG_ENV_SPI_BUS
 # define CONFIG_ENV_SPI_BUS		0
 #endif
diff --git a/arch/arm/mach-mvebu/include/mach/config.h b/arch/arm/mach-mvebu/include/mach/config.h
index 2dc9b1dea3..115e846cbc 100644
--- a/arch/arm/mach-mvebu/include/mach/config.h
+++ b/arch/arm/mach-mvebu/include/mach/config.h
@@ -56,7 +56,6 @@
  * SPI Flash configuration
  */
 #ifdef CONFIG_CMD_SF
-#define CONFIG_KIRKWOOD_SPI
 #ifndef CONFIG_ENV_SPI_BUS
 # define CONFIG_ENV_SPI_BUS		0
 #endif
diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig
index 580eaf3e57..27c4537cf5 100644
--- a/configs/clearfog_defconfig
+++ b/configs/clearfog_defconfig
@@ -42,6 +42,7 @@ CONFIG_DEBUG_UART_BASE=0xd0012000
 CONFIG_DEBUG_UART_CLOCK=250000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550=y
+CONFIG_KIRKWOOD_SPI=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/controlcenterdc_defconfig b/configs/controlcenterdc_defconfig
index 836e00b2b5..04a1c785f3 100644
--- a/configs/controlcenterdc_defconfig
+++ b/configs/controlcenterdc_defconfig
@@ -53,6 +53,7 @@ CONFIG_DEBUG_UART_BASE=0xd0012000
 CONFIG_DEBUG_UART_CLOCK=250000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550=y
+CONFIG_KIRKWOOD_SPI=y
 CONFIG_TPM_ATMEL_TWI=y
 CONFIG_TPM_AUTH_SESSIONS=y
 CONFIG_TPM_FLUSH_RESOURCES=y
diff --git a/configs/d2net_v2_defconfig b/configs/d2net_v2_defconfig
index 5f3be0ea13..0e67a03198 100644
--- a/configs/d2net_v2_defconfig
+++ b/configs/d2net_v2_defconfig
@@ -31,6 +31,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SYS_NS16550=y
+CONFIG_KIRKWOOD_SPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/db-88f6720_defconfig b/configs/db-88f6720_defconfig
index 0dc4b2af07..7a581b4010 100644
--- a/configs/db-88f6720_defconfig
+++ b/configs/db-88f6720_defconfig
@@ -47,6 +47,7 @@ CONFIG_DEBUG_UART_BASE=0xf1012000
 CONFIG_DEBUG_UART_CLOCK=250000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550=y
+CONFIG_KIRKWOOD_SPI=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/db-88f6820-amc_defconfig b/configs/db-88f6820-amc_defconfig
index 3074994ec6..32fe40d7c7 100644
--- a/configs/db-88f6820-amc_defconfig
+++ b/configs/db-88f6820-amc_defconfig
@@ -54,6 +54,7 @@ CONFIG_DEBUG_UART_BASE=0xd0012000
 CONFIG_DEBUG_UART_CLOCK=200000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550=y
+CONFIG_KIRKWOOD_SPI=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/db-88f6820-gp_defconfig b/configs/db-88f6820-gp_defconfig
index 9d1771d292..9f356c5dae 100644
--- a/configs/db-88f6820-gp_defconfig
+++ b/configs/db-88f6820-gp_defconfig
@@ -53,6 +53,7 @@ CONFIG_DEBUG_UART_BASE=0xd0012000
 CONFIG_DEBUG_UART_CLOCK=250000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550=y
+CONFIG_KIRKWOOD_SPI=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/db-mv784mp-gp_defconfig b/configs/db-mv784mp-gp_defconfig
index 9458f8c438..1f7c013c80 100644
--- a/configs/db-mv784mp-gp_defconfig
+++ b/configs/db-mv784mp-gp_defconfig
@@ -51,6 +51,7 @@ CONFIG_DEBUG_UART_BASE=0xd0012000
 CONFIG_DEBUG_UART_CLOCK=250000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550=y
+CONFIG_KIRKWOOD_SPI=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/dreamplug_defconfig b/configs/dreamplug_defconfig
index 5bcdfd0277..1360d3ea42 100644
--- a/configs/dreamplug_defconfig
+++ b/configs/dreamplug_defconfig
@@ -24,6 +24,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SYS_NS16550=y
+CONFIG_KIRKWOOD_SPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/ds109_defconfig b/configs/ds109_defconfig
index 5f0ef7db7b..a9bfdfd279 100644
--- a/configs/ds109_defconfig
+++ b/configs/ds109_defconfig
@@ -20,5 +20,6 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SYS_NS16550=y
+CONFIG_KIRKWOOD_SPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/ds414_defconfig b/configs/ds414_defconfig
index f16b0e3522..7cbc680825 100644
--- a/configs/ds414_defconfig
+++ b/configs/ds414_defconfig
@@ -46,6 +46,7 @@ CONFIG_DEBUG_UART_BASE=0xd0012000
 CONFIG_DEBUG_UART_CLOCK=250000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550=y
+CONFIG_KIRKWOOD_SPI=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/inetspace_v2_defconfig b/configs/inetspace_v2_defconfig
index 2bdf0e4bc7..58814a4f5c 100644
--- a/configs/inetspace_v2_defconfig
+++ b/configs/inetspace_v2_defconfig
@@ -31,6 +31,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SYS_NS16550=y
+CONFIG_KIRKWOOD_SPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/km_kirkwood_128m16_defconfig b/configs/km_kirkwood_128m16_defconfig
index dd67dcd492..3d18206c57 100644
--- a/configs/km_kirkwood_128m16_defconfig
+++ b/configs/km_kirkwood_128m16_defconfig
@@ -28,5 +28,6 @@ CONFIG_ENV_IS_IN_EEPROM=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SYS_NS16550=y
+CONFIG_KIRKWOOD_SPI=y
 CONFIG_BCH=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/km_kirkwood_defconfig b/configs/km_kirkwood_defconfig
index 223479cbf8..d87604cfb0 100644
--- a/configs/km_kirkwood_defconfig
+++ b/configs/km_kirkwood_defconfig
@@ -28,5 +28,6 @@ CONFIG_ENV_IS_IN_EEPROM=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SYS_NS16550=y
+CONFIG_KIRKWOOD_SPI=y
 CONFIG_BCH=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/km_kirkwood_pci_defconfig b/configs/km_kirkwood_pci_defconfig
index f9d04d0ce9..1273ea9315 100644
--- a/configs/km_kirkwood_pci_defconfig
+++ b/configs/km_kirkwood_pci_defconfig
@@ -28,5 +28,6 @@ CONFIG_ENV_IS_IN_EEPROM=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SYS_NS16550=y
+CONFIG_KIRKWOOD_SPI=y
 CONFIG_BCH=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/kmcoge5un_defconfig b/configs/kmcoge5un_defconfig
index 31c571890b..6921528225 100644
--- a/configs/kmcoge5un_defconfig
+++ b/configs/kmcoge5un_defconfig
@@ -28,5 +28,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SYS_NS16550=y
+CONFIG_KIRKWOOD_SPI=y
 CONFIG_BCH=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/kmnusa_defconfig b/configs/kmnusa_defconfig
index 42becd939f..6218c9d6b9 100644
--- a/configs/kmnusa_defconfig
+++ b/configs/kmnusa_defconfig
@@ -28,5 +28,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SYS_NS16550=y
+CONFIG_KIRKWOOD_SPI=y
 CONFIG_BCH=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/kmsugp1_defconfig b/configs/kmsugp1_defconfig
index c6924d536e..9c0bc03719 100644
--- a/configs/kmsugp1_defconfig
+++ b/configs/kmsugp1_defconfig
@@ -28,5 +28,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SYS_NS16550=y
+CONFIG_KIRKWOOD_SPI=y
 CONFIG_BCH=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/kmsuv31_defconfig b/configs/kmsuv31_defconfig
index aad7b4d893..add4b04cb1 100644
--- a/configs/kmsuv31_defconfig
+++ b/configs/kmsuv31_defconfig
@@ -28,5 +28,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SYS_NS16550=y
+CONFIG_KIRKWOOD_SPI=y
 CONFIG_BCH=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/lschlv2_defconfig b/configs/lschlv2_defconfig
index 6d140d7471..4edf5d1c5f 100644
--- a/configs/lschlv2_defconfig
+++ b/configs/lschlv2_defconfig
@@ -33,6 +33,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SYS_NS16550=y
+CONFIG_KIRKWOOD_SPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/lsxhl_defconfig b/configs/lsxhl_defconfig
index 8da130a179..f12c57a0d0 100644
--- a/configs/lsxhl_defconfig
+++ b/configs/lsxhl_defconfig
@@ -24,6 +24,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SYS_NS16550=y
+CONFIG_KIRKWOOD_SPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/maxbcm_defconfig b/configs/maxbcm_defconfig
index 131d5e1d8e..53cfe3abe7 100644
--- a/configs/maxbcm_defconfig
+++ b/configs/maxbcm_defconfig
@@ -38,3 +38,4 @@ CONFIG_DEBUG_UART_BASE=0xd0012000
 CONFIG_DEBUG_UART_CLOCK=250000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550=y
+CONFIG_KIRKWOOD_SPI=y
diff --git a/configs/mgcoge3un_defconfig b/configs/mgcoge3un_defconfig
index 910d09e969..c8a3354a9c 100644
--- a/configs/mgcoge3un_defconfig
+++ b/configs/mgcoge3un_defconfig
@@ -28,5 +28,6 @@ CONFIG_ENV_IS_IN_EEPROM=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SYS_NS16550=y
+CONFIG_KIRKWOOD_SPI=y
 CONFIG_BCH=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/mvebu_db_armada8k_defconfig b/configs/mvebu_db_armada8k_defconfig
index 22dc914fc2..88d984135f 100644
--- a/configs/mvebu_db_armada8k_defconfig
+++ b/configs/mvebu_db_armada8k_defconfig
@@ -65,6 +65,7 @@ CONFIG_DEBUG_UART_CLOCK=200000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_SYS_NS16550=y
+CONFIG_KIRKWOOD_SPI=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
diff --git a/configs/mvebu_mcbin-88f8040_defconfig b/configs/mvebu_mcbin-88f8040_defconfig
index ca62ae827b..1f440229bd 100644
--- a/configs/mvebu_mcbin-88f8040_defconfig
+++ b/configs/mvebu_mcbin-88f8040_defconfig
@@ -69,6 +69,7 @@ CONFIG_DEBUG_UART_CLOCK=200000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_SYS_NS16550=y
+CONFIG_KIRKWOOD_SPI=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
diff --git a/configs/net2big_v2_defconfig b/configs/net2big_v2_defconfig
index e47c553bbe..d1161a437a 100644
--- a/configs/net2big_v2_defconfig
+++ b/configs/net2big_v2_defconfig
@@ -31,6 +31,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SYS_NS16550=y
+CONFIG_KIRKWOOD_SPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/netspace_lite_v2_defconfig b/configs/netspace_lite_v2_defconfig
index c3e689bbb5..f87bd1c48c 100644
--- a/configs/netspace_lite_v2_defconfig
+++ b/configs/netspace_lite_v2_defconfig
@@ -31,6 +31,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SYS_NS16550=y
+CONFIG_KIRKWOOD_SPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/netspace_max_v2_defconfig b/configs/netspace_max_v2_defconfig
index 92aaa66358..bb7691a7cc 100644
--- a/configs/netspace_max_v2_defconfig
+++ b/configs/netspace_max_v2_defconfig
@@ -31,6 +31,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SYS_NS16550=y
+CONFIG_KIRKWOOD_SPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/netspace_mini_v2_defconfig b/configs/netspace_mini_v2_defconfig
index 3ef8c8d3d1..a2696b972f 100644
--- a/configs/netspace_mini_v2_defconfig
+++ b/configs/netspace_mini_v2_defconfig
@@ -29,4 +29,5 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SYS_NS16550=y
+CONFIG_KIRKWOOD_SPI=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/netspace_v2_defconfig b/configs/netspace_v2_defconfig
index 2df688c8e8..623786f57b 100644
--- a/configs/netspace_v2_defconfig
+++ b/configs/netspace_v2_defconfig
@@ -31,6 +31,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SYS_NS16550=y
+CONFIG_KIRKWOOD_SPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/portl2_defconfig b/configs/portl2_defconfig
index 351f16b151..75ef2cca48 100644
--- a/configs/portl2_defconfig
+++ b/configs/portl2_defconfig
@@ -28,5 +28,6 @@ CONFIG_ENV_IS_IN_EEPROM=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SYS_NS16550=y
+CONFIG_KIRKWOOD_SPI=y
 CONFIG_BCH=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/theadorable_debug_defconfig b/configs/theadorable_debug_defconfig
index a39497984b..ce0bf0f061 100644
--- a/configs/theadorable_debug_defconfig
+++ b/configs/theadorable_debug_defconfig
@@ -58,6 +58,7 @@ CONFIG_DEBUG_UART_BASE=0xd0012000
 CONFIG_DEBUG_UART_CLOCK=250000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550=y
+CONFIG_KIRKWOOD_SPI=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig
index a0a73b5362..8d402c4152 100644
--- a/configs/turris_omnia_defconfig
+++ b/configs/turris_omnia_defconfig
@@ -40,6 +40,7 @@ CONFIG_DEBUG_UART_BASE=0xd0012000
 CONFIG_DEBUG_UART_CLOCK=250000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550=y
+CONFIG_KIRKWOOD_SPI=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 49e70c94ff..8a7a62a7b3 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -272,6 +272,12 @@ config TI_QSPI
 	  Enable the TI Quad-SPI (QSPI) driver for DRA7xx and AM43xx evms.
 	  This driver support spi flash single, quad and memory reads.
 
+config KIRKWOOD_SPI
+	bool "Marvell Kirkwood SPI Driver"
+	help
+	  Enable support for SPI on various Marvell SoCs, such as
+	  Kirkwood and Armada 375.
+
 config LPC32XX_SSP
 	bool "LPC32XX SPI Driver"
 	help
diff --git a/include/configs/dreamplug.h b/include/configs/dreamplug.h
index 7a739e39d7..c0f5b31550 100644
--- a/include/configs/dreamplug.h
+++ b/include/configs/dreamplug.h
@@ -37,7 +37,6 @@
 
 #ifdef CONFIG_CMD_SF
 #define CONFIG_HARD_SPI			1
-#define CONFIG_KIRKWOOD_SPI		1
 #define CONFIG_ENV_SPI_BUS		0
 #define CONFIG_ENV_SPI_CS		0
 #define CONFIG_ENV_SPI_MAX_HZ		50000000 /* 50 MHz */
diff --git a/include/configs/ds109.h b/include/configs/ds109.h
index a2c6837348..0040fbb427 100644
--- a/include/configs/ds109.h
+++ b/include/configs/ds109.h
@@ -40,7 +40,6 @@
 
 #ifdef CONFIG_CMD_SF
 #define CONFIG_HARD_SPI			1
-#define CONFIG_KIRKWOOD_SPI		1
 #define CONFIG_ENV_SPI_BUS		0
 #define CONFIG_ENV_SPI_CS		0
 #define CONFIG_ENV_SPI_MAX_HZ		50000000 /* 50 MHz */
diff --git a/include/configs/mvebu_armada-8k.h b/include/configs/mvebu_armada-8k.h
index fd60a9bfd4..6df090fe51 100644
--- a/include/configs/mvebu_armada-8k.h
+++ b/include/configs/mvebu_armada-8k.h
@@ -64,7 +64,6 @@
 /*
  * SPI Flash configuration
  */
-#define CONFIG_KIRKWOOD_SPI
 #define CONFIG_ENV_SPI_BUS		0
 #define CONFIG_ENV_SPI_CS		0
 
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 4cfb2b70ce..673596a6d3 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -1146,7 +1146,6 @@ CONFIG_KIRKWOOD_EGIGA_INIT
 CONFIG_KIRKWOOD_GPIO
 CONFIG_KIRKWOOD_PCIE_INIT
 CONFIG_KIRKWOOD_RGMII_PAD_1V8
-CONFIG_KIRKWOOD_SPI
 CONFIG_KIRQ_EN
 CONFIG_KM8321
 CONFIG_KMCOGE4

commit a1f9e12a3dfe44f6b1a83898aa506ec4977bdd14
Author: Tuomas Tynkkynen <tuomas@tuxera.com>
Date:   Wed Feb 7 02:42:21 2018 +0200

    UPSTREAM: spi: Migrate CONFIG_LPC32XX_SSP to Kconfig
    
    Change-Id: Ib34e1271ed6dd812bfb21bc2162b30d27b014498
    Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 2c4b096b4c3e9d115b43edb23b1592a297076ae4)

diff --git a/configs/devkit3250_defconfig b/configs/devkit3250_defconfig
index 8dc3c63726..5ea067a852 100644
--- a/configs/devkit3250_defconfig
+++ b/configs/devkit3250_defconfig
@@ -38,6 +38,7 @@ CONFIG_SPL_NAND_SIMPLE=y
 CONFIG_PHYLIB=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
+CONFIG_LPC32XX_SSP=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/work_92105_defconfig b/configs/work_92105_defconfig
index a0a6e20cc5..c007ab8b9a 100644
--- a/configs/work_92105_defconfig
+++ b/configs/work_92105_defconfig
@@ -37,3 +37,4 @@ CONFIG_DM_GPIO=y
 CONFIG_PHYLIB=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
+CONFIG_LPC32XX_SSP=y
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 230cccc0d1..49e70c94ff 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -272,6 +272,11 @@ config TI_QSPI
 	  Enable the TI Quad-SPI (QSPI) driver for DRA7xx and AM43xx evms.
 	  This driver support spi flash single, quad and memory reads.
 
+config LPC32XX_SSP
+	bool "LPC32XX SPI Driver"
+	help
+	  Enable support for SPI on LPC32xx
+
 config MPC8XX_SPI
 	bool "MPC8XX SPI Driver"
 	depends on 8xx
diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h
index 5c1ef0186f..0275071084 100644
--- a/include/configs/devkit3250.h
+++ b/include/configs/devkit3250.h
@@ -64,7 +64,6 @@
 /*
  * SSP/SPI
  */
-#define CONFIG_LPC32XX_SSP
 #define CONFIG_LPC32XX_SSP_TIMEOUT	100000
 
 /*
diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h
index 7faab4e073..2e407cc2b6 100644
--- a/include/configs/work_92105.h
+++ b/include/configs/work_92105.h
@@ -125,7 +125,6 @@
  * SSP/SPI/DISPLAY
  */
 
-#define CONFIG_LPC32XX_SSP
 #define CONFIG_LPC32XX_SSP_TIMEOUT 100000
 /*
  * Environment
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 4fe9d45e08..4cfb2b70ce 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -1309,7 +1309,6 @@ CONFIG_LPC32XX_NAND_SLC_WSETUP
 CONFIG_LPC32XX_NAND_SLC_WWIDTH
 CONFIG_LPC32XX_SDRAM_
 CONFIG_LPC32XX_SPL
-CONFIG_LPC32XX_SSP
 CONFIG_LPC32XX_SSP_TIMEOUT
 CONFIG_LPC_BASE
 CONFIG_LPC_IO_BASE

commit cb90935401ccfe644097bb928e14e70d416856f0
Author: Tuomas Tynkkynen <tuomas@tuxera.com>
Date:   Wed Feb 7 02:42:20 2018 +0200

    UPSTREAM: spi: Migrate CONFIG_MPC8XXX_SPI to Kconfig
    
    Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
    (cherry picked from commit bbdf38698ee5c96138868d563c6825cd48bb26dc
    Change-Id: I6c99c0696716c148a9f8a3255111b23749c78a6b
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/configs/MPC8349EMDS_defconfig b/configs/MPC8349EMDS_defconfig
index 88edf5fcf0..32ad48db00 100644
--- a/configs/MPC8349EMDS_defconfig
+++ b/configs/MPC8349EMDS_defconfig
@@ -15,4 +15,5 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_PHYLIB=y
 # CONFIG_PCI is not set
 CONFIG_SYS_NS16550=y
+CONFIG_MPC8XXX_SPI=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/ids8313_defconfig b/configs/ids8313_defconfig
index 947cda2adb..eee3559c21 100644
--- a/configs/ids8313_defconfig
+++ b/configs/ids8313_defconfig
@@ -31,4 +31,5 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_PHYLIB=y
 # CONFIG_PCI is not set
 CONFIG_SYS_NS16550=y
+CONFIG_MPC8XXX_SPI=y
 CONFIG_OF_LIBFDT=y
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index fa021d160d..230cccc0d1 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -278,6 +278,17 @@ config MPC8XX_SPI
 	help
 	  Enable support for SPI on MPC8XX
 
+config MPC8XXX_SPI
+	bool "MPC8XXX SPI Driver"
+	help
+	  Enable support for SPI on the MPC8XXX PowerPC SoCs.
+
+config MXC_SPI
+	bool "MXC SPI Driver"
+	help
+	  Enable the MXC SPI controller driver. This driver can be used
+	  on various i.MX SoCs such as i.MX31/35/51/6/7.
+
 config MXS_SPI
 	bool "MXS SPI Driver"
 	help
diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h
index 9b906a7c77..1af7ba7152 100644
--- a/include/configs/MPC8349EMDS.h
+++ b/include/configs/MPC8349EMDS.h
@@ -333,7 +333,6 @@
 #define CONFIG_SYS_I2C_NOPROBES		{ {0, 0x69} }
 
 /* SPI */
-#define CONFIG_MPC8XXX_SPI
 #undef CONFIG_SOFT_SPI			/* SPI bit-banged */
 
 /* GPIOs.  Used as SPI chip selects */
diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h
index e4210ce8f2..f507899796 100644
--- a/include/configs/ids8313.h
+++ b/include/configs/ids8313.h
@@ -286,7 +286,6 @@
  * SPI setup
  */
 #ifdef CONFIG_HARD_SPI
-#define CONFIG_MPC8XXX_SPI
 #define CONFIG_SYS_GPIO1_PRELIM
 #define CONFIG_SYS_GPIO1_DIR		0x00000001
 #define CONFIG_SYS_GPIO1_DAT		0x00000001
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 3b2de0d73f..4fe9d45e08 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -1452,7 +1452,6 @@ CONFIG_MPC83XX_PCI2
 CONFIG_MPC85XX_FEC
 CONFIG_MPC85XX_FEC_NAME
 CONFIG_MPC85XX_PCI2
-CONFIG_MPC8XXX_SPI
 CONFIG_MPC8xxx_DISABLE_BPTR
 CONFIG_MPLL_FREQ
 CONFIG_MPR2

commit d851477aa1d9766d7815a5ee20471550dfbbcbff
Author: Tuomas Tynkkynen <tuomas@tuxera.com>
Date:   Wed Feb 7 02:42:18 2018 +0200

    UPSTREAM: spi: Migrate CONFIG_MXS_SPI to Kconfig
    
    Change-Id: Id2769d0405f96348de67cdd24df8a82a35101637
    Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 7b819b569e92fd9b9b1baf160cd946a523fde1ce)

diff --git a/configs/bg0900_defconfig b/configs/bg0900_defconfig
index 0410e5eeba..4649e5de5f 100644
--- a/configs/bg0900_defconfig
+++ b/configs/bg0900_defconfig
@@ -31,4 +31,5 @@ CONFIG_NAND_MXS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_MXS_SPI=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/m28evk_defconfig b/configs/m28evk_defconfig
index b25344904f..a39e44746f 100644
--- a/configs/m28evk_defconfig
+++ b/configs/m28evk_defconfig
@@ -44,6 +44,7 @@ CONFIG_NAND=y
 CONFIG_NAND_MXS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_MXS_SPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/mx28evk_auart_console_defconfig b/configs/mx28evk_auart_console_defconfig
index bd0d3adea3..ecf0982c68 100644
--- a/configs/mx28evk_auart_console_defconfig
+++ b/configs/mx28evk_auart_console_defconfig
@@ -40,6 +40,7 @@ CONFIG_NAND=y
 CONFIG_NAND_MXS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_MXS_SPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/mx28evk_defconfig b/configs/mx28evk_defconfig
index aab99326ca..0853c94912 100644
--- a/configs/mx28evk_defconfig
+++ b/configs/mx28evk_defconfig
@@ -40,6 +40,7 @@ CONFIG_NAND=y
 CONFIG_NAND_MXS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_MXS_SPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/mx28evk_nand_defconfig b/configs/mx28evk_nand_defconfig
index 44e0b6f8e8..be2056c964 100644
--- a/configs/mx28evk_nand_defconfig
+++ b/configs/mx28evk_nand_defconfig
@@ -39,6 +39,7 @@ CONFIG_NAND=y
 CONFIG_NAND_MXS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_MXS_SPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/mx28evk_spi_defconfig b/configs/mx28evk_spi_defconfig
index a72153f026..901b2c672a 100644
--- a/configs/mx28evk_spi_defconfig
+++ b/configs/mx28evk_spi_defconfig
@@ -39,6 +39,7 @@ CONFIG_NAND=y
 CONFIG_NAND_MXS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_MXS_SPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index ed257f5e81..fa021d160d 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -278,6 +278,12 @@ config MPC8XX_SPI
 	help
 	  Enable support for SPI on MPC8XX
 
+config MXS_SPI
+	bool "MXS SPI Driver"
+	help
+	  Enable the MXS SPI controller driver. This driver can be used
+	  on the i.MX23 and i.MX28 SoCs.
+
 config OMAP3_SPI
 	bool "McSPI driver for OMAP"
 	help
diff --git a/include/configs/mxs.h b/include/configs/mxs.h
index 31020ed229..f19d16ba3e 100644
--- a/include/configs/mxs.h
+++ b/include/configs/mxs.h
@@ -149,7 +149,6 @@
 /* SPI */
 #ifdef CONFIG_CMD_SPI
 #define CONFIG_HARD_SPI
-#define CONFIG_MXS_SPI
 #define CONFIG_SPI_HALF_DUPLEX
 #endif
 
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 2c39049333..3b2de0d73f 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -1530,7 +1530,6 @@ CONFIG_MXS_AUART
 CONFIG_MXS_AUART_BASE
 CONFIG_MXS_GPIO
 CONFIG_MXS_OCOTP
-CONFIG_MXS_SPI
 CONFIG_MX_CYCLIC
 CONFIG_MY_OPTION
 CONFIG_NANDFLASH_SIZE

commit 3ad77667abd4ea5ac9fcd80702d1a422e8956c22
Author: Tuomas Tynkkynen <tuomas@tuxera.com>
Date:   Wed Feb 7 02:42:17 2018 +0200

    UPSTREAM: spi: Migrate CONFIG_SH_QSPI to Kconfig
    
    Change-Id: I51b0a222d7f5d4bf8925f7544c50d8f35da235e2
    Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit a5dfabea19f961826509118513f833cea25797bb)

diff --git a/configs/alt_defconfig b/configs/alt_defconfig
index 3ec7cf97d0..ef4b109337 100644
--- a/configs/alt_defconfig
+++ b/configs/alt_defconfig
@@ -41,6 +41,7 @@ CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
 CONFIG_BAUDRATE=38400
 CONFIG_SCIF_CONSOLE=y
+CONFIG_SH_QSPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/gose_defconfig b/configs/gose_defconfig
index 562dee54cb..0267ef5c03 100644
--- a/configs/gose_defconfig
+++ b/configs/gose_defconfig
@@ -40,6 +40,7 @@ CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
 CONFIG_BAUDRATE=38400
 CONFIG_SCIF_CONSOLE=y
+CONFIG_SH_QSPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/koelsch_defconfig b/configs/koelsch_defconfig
index 740a5fe5da..6f75f7b8fd 100644
--- a/configs/koelsch_defconfig
+++ b/configs/koelsch_defconfig
@@ -40,6 +40,7 @@ CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
 CONFIG_BAUDRATE=38400
 CONFIG_SCIF_CONSOLE=y
+CONFIG_SH_QSPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/lager_defconfig b/configs/lager_defconfig
index cf4f6b70ec..2a7602f44c 100644
--- a/configs/lager_defconfig
+++ b/configs/lager_defconfig
@@ -42,6 +42,7 @@ CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
 CONFIG_BAUDRATE=38400
 CONFIG_SCIF_CONSOLE=y
+CONFIG_SH_QSPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/porter_defconfig b/configs/porter_defconfig
index 7bc2e5d380..8b0a91c8a3 100644
--- a/configs/porter_defconfig
+++ b/configs/porter_defconfig
@@ -40,6 +40,7 @@ CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
 CONFIG_BAUDRATE=38400
 CONFIG_SCIF_CONSOLE=y
+CONFIG_SH_QSPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/silk_defconfig b/configs/silk_defconfig
index f16b29957c..6cdf03d4da 100644
--- a/configs/silk_defconfig
+++ b/configs/silk_defconfig
@@ -42,6 +42,7 @@ CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
 CONFIG_BAUDRATE=38400
 CONFIG_SCIF_CONSOLE=y
+CONFIG_SH_QSPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/stout_defconfig b/configs/stout_defconfig
index 5bc52b8ee4..aab997b0f0 100644
--- a/configs/stout_defconfig
+++ b/configs/stout_defconfig
@@ -40,6 +40,7 @@ CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
 CONFIG_BAUDRATE=38400
 CONFIG_SCIF_CONSOLE=y
+CONFIG_SH_QSPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 8b224aed68..ed257f5e81 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -260,6 +260,12 @@ config SH_SPI
 	  Enable the SuperH SPI controller driver. This driver can be used
 	  on various SuperH SoCs, such as SH7757.
 
+config SH_QSPI
+	bool "Renesas Quad SPI driver"
+	help
+	  Enable the Renesas Quad SPI controller driver. This driver can be
+	  used on Renesas SoCs.
+
 config TI_QSPI
 	bool "TI QSPI driver"
 	help
diff --git a/include/configs/alt.h b/include/configs/alt.h
index 35518da625..535147ee51 100644
--- a/include/configs/alt.h
+++ b/include/configs/alt.h
@@ -40,7 +40,6 @@
 
 /* FLASH */
 #define CONFIG_SPI
-#define CONFIG_SH_QSPI
 #define CONFIG_SPI_FLASH_QUAD
 
 /* SH Ether */
diff --git a/include/configs/blanche.h b/include/configs/blanche.h
index c09d430d3a..1e923613d6 100644
--- a/include/configs/blanche.h
+++ b/include/configs/blanche.h
@@ -41,7 +41,6 @@
 #if !defined(CONFIG_MTD_NOR_FLASH)
 #define CONFIG_SYS_TEXT_BASE	0x40000000
 #define CONFIG_SPI
-#define CONFIG_SH_QSPI
 #define CONFIG_SH_QSPI_BASE	0xE6B10000
 #else
 #define CONFIG_SYS_TEXT_BASE		0x00000000
diff --git a/include/configs/gose.h b/include/configs/gose.h
index 610ba1a7ac..0d00497e9e 100644
--- a/include/configs/gose.h
+++ b/include/configs/gose.h
@@ -41,7 +41,6 @@
 
 /* FLASH */
 #define CONFIG_SPI
-#define CONFIG_SH_QSPI
 
 /* SH Ether */
 #define CONFIG_SH_ETHER
diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h
index b9214d2f34..af798139a3 100644
--- a/include/configs/koelsch.h
+++ b/include/configs/koelsch.h
@@ -41,7 +41,6 @@
 
 /* FLASH */
 #define CONFIG_SPI
-#define CONFIG_SH_QSPI
 
 /* SH Ether */
 #define CONFIG_SH_ETHER
diff --git a/include/configs/lager.h b/include/configs/lager.h
index 291b03c50b..53ae55be4f 100644
--- a/include/configs/lager.h
+++ b/include/configs/lager.h
@@ -41,7 +41,6 @@
 
 /* SPI */
 #define CONFIG_SPI
-#define CONFIG_SH_QSPI
 
 /* SH Ether */
 #define CONFIG_SH_ETHER
diff --git a/include/configs/porter.h b/include/configs/porter.h
index 451d9dd66f..c8e8349c28 100644
--- a/include/configs/porter.h
+++ b/include/configs/porter.h
@@ -41,7 +41,6 @@
 
 /* FLASH */
 #define CONFIG_SPI
-#define CONFIG_SH_QSPI
 #define CONFIG_SPI_FLASH_QUAD
 
 /* SH Ether */
diff --git a/include/configs/silk.h b/include/configs/silk.h
index 0384325cb5..cd826fb291 100644
--- a/include/configs/silk.h
+++ b/include/configs/silk.h
@@ -41,7 +41,6 @@
 
 /* FLASH */
 #define CONFIG_SPI
-#define CONFIG_SH_QSPI
 #define CONFIG_SPI_FLASH_QUAD
 
 /* SH Ether */
diff --git a/include/configs/stout.h b/include/configs/stout.h
index 9422c042f3..0b3a1ea6d7 100644
--- a/include/configs/stout.h
+++ b/include/configs/stout.h
@@ -44,7 +44,6 @@
 
 /* SPI */
 #define CONFIG_SPI
-#define CONFIG_SH_QSPI
 #define CONFIG_SPI_FLASH_QUAD
 
 /* SH Ether */
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 911282f692..2c39049333 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -2023,7 +2023,6 @@ CONFIG_SH_I2C_DATA_LOW
 CONFIG_SH_MMCIF
 CONFIG_SH_MMCIF_ADDR
 CONFIG_SH_MMCIF_CLK
-CONFIG_SH_QSPI
 CONFIG_SH_QSPI_BASE
 CONFIG_SH_SCIF_CLK_FREQ
 CONFIG_SH_SDHI_FREQ

commit 99c184906c6e99d402edd816dcb78fcb9ef0f923
Author: Tuomas Tynkkynen <tuomas@tuxera.com>
Date:   Wed Feb 7 02:42:16 2018 +0200

    UPSTREAM: spi: Migrate CONFIG_SH_SPI to Kconfig
    
    Change-Id: I66c533e5c556c26b771037bc7eee5ceff01f5cb9
    Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 95d3877a5818cc3f149a9d443637ff145bbaaabb)

diff --git a/README b/README
index a39742d6a2..127ae4d5ac 100644
--- a/README
+++ b/README
@@ -2067,11 +2067,6 @@ The following options need to be configured:
 		SPI EEPROM, also an instance works with Crystal A/D and
 		D/As on the SACSng board)
 
-		CONFIG_SH_SPI
-
-		Enables the driver for SPI controller on SuperH. Currently
-		only SH7757 is supported.
-
 		CONFIG_SOFT_SPI
 
 		Enables a software (bit-bang) SPI driver rather than
diff --git a/configs/sh7752evb_defconfig b/configs/sh7752evb_defconfig
index a8286587c3..c7ee40549b 100644
--- a/configs/sh7752evb_defconfig
+++ b/configs/sh7752evb_defconfig
@@ -37,4 +37,5 @@ CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_SCIF_CONSOLE=y
+CONFIG_SH_SPI=y
 CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/configs/sh7753evb_defconfig b/configs/sh7753evb_defconfig
index dd3522d757..9db700a526 100644
--- a/configs/sh7753evb_defconfig
+++ b/configs/sh7753evb_defconfig
@@ -36,4 +36,5 @@ CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_SCIF_CONSOLE=y
+CONFIG_SH_SPI=y
 CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/configs/sh7757lcr_defconfig b/configs/sh7757lcr_defconfig
index 231c0a1b5a..189c5c2fb5 100644
--- a/configs/sh7757lcr_defconfig
+++ b/configs/sh7757lcr_defconfig
@@ -36,4 +36,5 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_SCIF_CONSOLE=y
+CONFIG_SH_SPI=y
 CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 8c7f2389f9..8b224aed68 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -254,6 +254,12 @@ config DAVINCI_SPI
 	help
 	  Enable the Davinci SPI driver
 
+config SH_SPI
+	bool "SuperH SPI driver"
+	help
+	  Enable the SuperH SPI controller driver. This driver can be used
+	  on various SuperH SoCs, such as SH7757.
+
 config TI_QSPI
 	bool "TI QSPI driver"
 	help
diff --git a/include/configs/sh7752evb.h b/include/configs/sh7752evb.h
index 13d22a2f17..2d0ff74f85 100644
--- a/include/configs/sh7752evb.h
+++ b/include/configs/sh7752evb.h
@@ -65,7 +65,6 @@
 #define SH7752EVB_ETHERNET_NUM_CH	2
 
 /* SPI */
-#define CONFIG_SH_SPI			1
 #define CONFIG_SH_SPI_BASE		0xfe002000
 
 /* MMCIF */
diff --git a/include/configs/sh7753evb.h b/include/configs/sh7753evb.h
index 66f8c7a227..ad38ae2044 100644
--- a/include/configs/sh7753evb.h
+++ b/include/configs/sh7753evb.h
@@ -65,7 +65,6 @@
 #define SH7753EVB_ETHERNET_NUM_CH	2
 
 /* SPI */
-#define CONFIG_SH_SPI			1
 #define CONFIG_SH_SPI_BASE		0xfe002000
 
 /* MMCIF */
diff --git a/include/configs/sh7757lcr.h b/include/configs/sh7757lcr.h
index 43de7e533e..2906f80f69 100644
--- a/include/configs/sh7757lcr.h
+++ b/include/configs/sh7757lcr.h
@@ -67,7 +67,6 @@
 #define SH7757LCR_GIGA_ETHERNET_NUM_CH	2
 
 /* SPI */
-#define CONFIG_SH_SPI			1
 #define CONFIG_SH_SPI_BASE		0xfe002000
 
 /* MMCIF */
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 73554ed9a4..911282f692 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -2028,7 +2028,6 @@ CONFIG_SH_QSPI_BASE
 CONFIG_SH_SCIF_CLK_FREQ
 CONFIG_SH_SDHI_FREQ
 CONFIG_SH_SDRAM_OFFSET
-CONFIG_SH_SPI
 CONFIG_SH_SPI_BASE
 CONFIG_SH_TMU_CLK_FREQ
 CONFIG_SIEMENS_DRACO

commit 70716f3196fa0732b9ccd13aa5b0110bd4b02eb2
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Wed Jan 31 01:05:54 2018 +0100

    UPSTREAM: atcspi200: avoid possible NULL dereference
    
    Check if ns before and not after dereferencing it.
    
    Indicated by cppcheck.
    
    Change-Id: Ic9a2491051754fef64ce7ad4a9a5377fc3aad6db
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 923837e159c5886be38c7a83a2d6bc489b35c1f4)

diff --git a/drivers/spi/atcspi200_spi.c b/drivers/spi/atcspi200_spi.c
index 3e29df03a4..5b2e9d6264 100644
--- a/drivers/spi/atcspi200_spi.c
+++ b/drivers/spi/atcspi200_spi.c
@@ -297,6 +297,8 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
 		return NULL;
 
 	ns = spi_alloc_slave(struct nds_spi_slave, bus, cs);
+	if (!ns)
+		return NULL;
 
 	switch (bus) {
 	case SPI0_BUS:
@@ -316,8 +318,6 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
 	ns->to = SPI_TIMEOUT;
 	ns->max_transfer_length = MAX_TRANSFER_LEN;
 	ns->slave.max_write_size = MAX_TRANSFER_LEN;
-	if (!ns)
-		return NULL;
 
 	return &ns->slave;
 }

commit ccb5fa0a6b93d444edc06f6138bef0c12686ff93
Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Date:   Thu Dec 28 15:09:03 2017 +0300

    UPSTREAM: DW SPI: Get clock value from Device Tree
    
    Add option to set spi controller clock frequency via device tree
    using standard clock bindings.
    
    Define dw_spi_get_clk function as 'weak' as some targets
    (like SOCFPGA_GEN5 and SOCFPGA_ARRIA10) don't use standard clock API
    and implement dw_spi_get_clk their own way in their clock manager.
    
    Get rid of clock_manager.h include as we don't use
    cm_get_spi_controller_clk_hz function anymore. (we use redefined
    dw_spi_get_clk in SOCFPGA clock managers instead)
    
    Reviewed-by: Marek Vasut <marex@denx.de>
    Change-Id: Iee14939326b5512a7704ccbcfd9795d1a1f6aa3b
    Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 58c125b9e2b232ce73ed7b24ba7b1ca5ff41c5bd)

diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c
index 5aa507b2d8..c501aeea16 100644
--- a/drivers/spi/designware_spi.c
+++ b/drivers/spi/designware_spi.c
@@ -11,6 +11,7 @@
  */
 
 #include <common.h>
+#include <clk.h>
 #include <dm.h>
 #include <errno.h>
 #include <malloc.h>
@@ -18,7 +19,6 @@
 #include <fdtdec.h>
 #include <linux/compat.h>
 #include <asm/io.h>
-#include <asm/arch/clock_manager.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -94,6 +94,8 @@ struct dw_spi_priv {
 	void __iomem *regs;
 	unsigned int freq;		/* Default frequency */
 	unsigned int mode;
+	struct clk clk;
+	unsigned long bus_clk_rate;
 
 	int bits_per_word;
 	u8 cs;			/* chip select pin */
@@ -176,14 +178,53 @@ static void spi_hw_init(struct dw_spi_priv *priv)
 	debug("%s: fifo_len=%d\n", __func__, priv->fifo_len);
 }
 
+/*
+ * We define dw_spi_get_clk function as 'weak' as some targets
+ * (like SOCFPGA_GEN5 and SOCFPGA_ARRIA10) don't use standard clock API
+ * and implement dw_spi_get_clk their own way in their clock manager.
+ */
+__weak int dw_spi_get_clk(struct udevice *bus, ulong *rate)
+{
+	struct dw_spi_priv *priv = dev_get_priv(bus);
+	int ret;
+
+	ret = clk_get_by_index(bus, 0, &priv->clk);
+	if (ret)
+		return ret;
+
+	ret = clk_enable(&priv->clk);
+	if (ret && ret != -ENOSYS && ret != -ENOTSUPP)
+		return ret;
+
+	*rate = clk_get_rate(&priv->clk);
+	if (!*rate)
+		goto err_rate;
+
+	debug("%s: get spi controller clk via device tree: %lu Hz\n",
+	      __func__, *rate);
+
+	return 0;
+
+err_rate:
+	clk_disable(&priv->clk);
+	clk_free(&priv->clk);
+
+	return -EINVAL;
+}
+
 static int dw_spi_probe(struct udevice *bus)
 {
 	struct dw_spi_platdata *plat = dev_get_platdata(bus);
 	struct dw_spi_priv *priv = dev_get_priv(bus);
+	int ret;
 
 	priv->regs = plat->regs;
 	priv->freq = plat->frequency;
 
+	ret = dw_spi_get_clk(bus, &priv->bus_clk_rate);
+	if (ret)
+		return ret;
+
 	/* Currently only bits_per_word == 8 supported */
 	priv->bits_per_word = 8;
 
@@ -369,7 +410,7 @@ static int dw_spi_set_speed(struct udevice *bus, uint speed)
 	spi_enable_chip(priv, 0);
 
 	/* clk_div doesn't support odd number */
-	clk_div = cm_get_spi_controller_clk_hz() / speed;
+	clk_div = priv->bus_clk_rate / speed;
 	clk_div = (clk_div + 1) & 0xfffe;
 	dw_writel(priv, DW_SPI_BAUDR, clk_div);
 

commit 613aa4d50e7c592bad2cd38d06650c4de386fe7a
Author: Vignesh R <vigneshr@ti.com>
Date:   Wed Jan 24 10:44:06 2018 +0530

    UPSTREAM: Revert "spi: cadence_qspi_apb: Use 32 bit indirect write transaction when possible"
    
    This reverts commit 57897c13de03ac0136d64641a3eab526c6810387.
    
    Using bounce_buf.c to handle non-DMA alignment problems is bad as
    bounce_buf.c does cache manipulations which is not required. Therefore
    revert this patch in favour of local bounce buffer solution in the next
    patch.
    
    Signed-off-by: Vignesh R <vigneshr@ti.com>
    Acked-by: Marek Vasut <marex@denx.de>
    Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
    Reviewed-by: Jason Rush <jarush@gmail.com>
    Acked-by: Jason Rush <jarush@gmail.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    (cherry picked from commit a743e2ba3837db5e8499b03f0f57c3610d03a570)
    Change-Id: I793c697ad11d10259e233b2a6b0fe6e6f0b3df85
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c
index 128c41d715..70d0f431ad 100644
--- a/drivers/spi/cadence_qspi_apb.c
+++ b/drivers/spi/cadence_qspi_apb.c
@@ -30,7 +30,6 @@
 #include <linux/errno.h>
 #include <wait_bit.h>
 #include <spi.h>
-#include <bouncebuf.h>
 #include "cadence_qspi.h"
 
 #define CQSPI_REG_POLL_US			1 /* 1us */
@@ -722,17 +721,6 @@ int cadence_qspi_apb_indirect_write_execute(struct cadence_spi_platdata *plat,
 	unsigned int remaining = n_tx;
 	unsigned int write_bytes;
 	int ret;
-	struct bounce_buffer bb;
-	u8 *bb_txbuf;
-
-	/*
-	 * Handle non-4-byte aligned accesses via bounce buffer to
-	 * avoid data abort.
-	 */
-	ret = bounce_buffer_start(&bb, (void *)txbuf, n_tx, GEN_BB_READ);
-	if (ret)
-		return ret;
-	bb_txbuf = bb.bounce_buffer;
 
 	/* Configure the indirect read transfer bytes */
 	writel(n_tx, plat->regbase + CQSPI_REG_INDIRECTWRBYTES);
@@ -743,11 +731,11 @@ int cadence_qspi_apb_indirect_write_execute(struct cadence_spi_platdata *plat,
 
 	while (remaining > 0) {
 		write_bytes = remaining > page_size ? page_size : remaining;
-		writesl(plat->ahbbase, bb_txbuf, write_bytes >> 2);
-		if (write_bytes % 4)
-			writesb(plat->ahbbase,
-				bb_txbuf + rounddown(write_bytes, 4),
-				write_bytes % 4);
+		/* Handle non-4-byte aligned access to avoid data abort. */
+		if (((uintptr_t)txbuf % 4) || (write_bytes % 4))
+			writesb(plat->ahbbase, txbuf, write_bytes);
+		else
+			writesl(plat->ahbbase, txbuf, write_bytes >> 2);
 
 		ret = wait_for_bit_le32(plat->regbase + CQSPI_REG_SDRAMLEVEL,
 					CQSPI_REG_SDRAMLEVEL_WR_MASK <<
@@ -757,7 +745,7 @@ int cadence_qspi_apb_indirect_write_execute(struct cadence_spi_platdata *plat,
 			goto failwr;
 		}
 
-		bb_txbuf += write_bytes;
+		txbuf += write_bytes;
 		remaining -= write_bytes;
 	}
 
@@ -768,7 +756,6 @@ int cadence_qspi_apb_indirect_write_execute(struct cadence_spi_platdata *plat,
 		printf("Indirect write completion error (%i)\n", ret);
 		goto failwr;
 	}
-	bounce_buffer_stop(&bb);
 
 	/* Clear indirect completion status */
 	writel(CQSPI_REG_INDIRECTWR_DONE,
@@ -779,7 +766,6 @@ failwr:
 	/* Cancel the indirect write */
 	writel(CQSPI_REG_INDIRECTWR_CANCEL,
 	       plat->regbase + CQSPI_REG_INDIRECTWR);
-	bounce_buffer_stop(&bb);
 	return ret;
 }
 
diff --git a/include/configs/k2g_evm.h b/include/configs/k2g_evm.h
index 6341609858..b225d0d971 100644
--- a/include/configs/k2g_evm.h
+++ b/include/configs/k2g_evm.h
@@ -94,8 +94,6 @@
 #ifndef CONFIG_SPL_BUILD
 #define CONFIG_CADENCE_QSPI
 #define CONFIG_CQSPI_REF_CLK 384000000
-#define CONFIG_CQSPI_DECODER 0x0
-#define CONFIG_BOUNCE_BUFFER
 #endif
 
 #define SPI_MTD_PARTS	KEYSTONE_SPI1_MTD_PARTS
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index ea0b0b5124..687af663a4 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -186,8 +186,6 @@ unsigned int cm_get_l4_sp_clk_hz(void);
 unsigned int cm_get_qspi_controller_clk_hz(void);
 #define CONFIG_CQSPI_REF_CLK		cm_get_qspi_controller_clk_hz()
 #endif
-#define CONFIG_CQSPI_DECODER		0
-#define CONFIG_BOUNCE_BUFFER
 
 /*
  * Designware SPI support
diff --git a/include/configs/stv0991.h b/include/configs/stv0991.h
index 27d7a4bf6b..8cd20b91b4 100644
--- a/include/configs/stv0991.h
+++ b/include/configs/stv0991.h
@@ -65,7 +65,6 @@
 #ifdef CONFIG_OF_CONTROL		/* QSPI is controlled via DT */
 #define CONFIG_CQSPI_DECODER		0
 #define CONFIG_CQSPI_REF_CLK		((30/4)/2)*1000*1000
-#define CONFIG_BOUNCE_BUFFER
 
 #endif
 

commit 06357de7664b17731c74ebe8b199d059e6970249
Author: Goldschmidt Simon <sgoldschmidt@de.pepperl-fuchs.com>
Date:   Wed Jan 24 10:44:05 2018 +0530

    UPSTREAM: Revert "spi: cadence_qspi_apb: Use 32 bit indirect read transaction when possible"
    
    This reverts commit b63b46313ed29e9b0c36b3d6b9407f6eade40c8f.
    
    This commit changed cadence_qspi_apb to use bouncebuf.c, which invalidates
    the data cache after reading. This is meant for dma transfers only and
    breaks the cadence_qspi driver which copies via cpu only: data that is
    copied by the cpu is in cache only and the cache invalidation at the end
    throws away this data.
    
    Change-Id: If32c692ac37cf2ee25254b7ecc49bc09096bf5d0
    Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
    Signed-off-by: Vignesh R <vigneshr@ti.com>
    Acked-by: Marek Vasut <marex@denx.de>
    Reviewed-by: Jason Rush <jarush@gmail.com>
    Acked-by: Jason Rush <jarush@gmail.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 948ad4f07598a729a0de523ed3d779115b2fa2f2)

diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c
index c3dd32912e..128c41d715 100644
--- a/drivers/spi/cadence_qspi_apb.c
+++ b/drivers/spi/cadence_qspi_apb.c
@@ -627,8 +627,6 @@ int cadence_qspi_apb_indirect_read_execute(struct cadence_spi_platdata *plat,
 {
 	unsigned int remaining = n_rx;
 	unsigned int bytes_to_read = 0;
-	struct bounce_buffer bb;
-	u8 *bb_rxbuf;
 	int ret;
 
 	writel(n_rx, plat->regbase + CQSPI_REG_INDIRECTRDBYTES);
@@ -637,11 +635,6 @@ int cadence_qspi_apb_indirect_read_execute(struct cadence_spi_platdata *plat,
 	writel(CQSPI_REG_INDIRECTRD_START,
 	       plat->regbase + CQSPI_REG_INDIRECTRD);
 
-	ret = bounce_buffer_start(&bb, (void *)rxbuf, n_rx, GEN_BB_WRITE);
-	if (ret)
-		return ret;
-	bb_rxbuf = bb.bounce_buffer;
-
 	while (remaining > 0) {
 		ret = cadence_qspi_wait_for_data(plat);
 		if (ret < 0) {
@@ -655,13 +648,16 @@ int cadence_qspi_apb_indirect_read_execute(struct cadence_spi_platdata *plat,
 			bytes_to_read *= plat->fifo_width;
 			bytes_to_read = bytes_to_read > remaining ?
 					remaining : bytes_to_read;
-			readsl(plat->ahbbase, bb_rxbuf, bytes_to_read >> 2);
-			if (bytes_to_read % 4)
-				readsb(plat->ahbbase,
-				       bb_rxbuf + rounddown(bytes_to_read, 4),
-				       bytes_to_read % 4);
-
-			bb_rxbuf += bytes_to_read;
+			/*
+			 * Handle non-4-byte aligned access to avoid
+			 * data abort.
+			 */
+			if (((uintptr_t)rxbuf % 4) || (bytes_to_read % 4))
+				readsb(plat->ahbbase, rxbuf, bytes_to_read);
+			else
+				readsl(plat->ahbbase, rxbuf,
+				       bytes_to_read >> 2);
+			rxbuf += bytes_to_read;
 			remaining -= bytes_to_read;
 			bytes_to_read = cadence_qspi_get_rd_sram_level(plat);
 		}
@@ -678,7 +674,6 @@ int cadence_qspi_apb_indirect_read_execute(struct cadence_spi_platdata *plat,
 	/* Clear indirect completion status */
 	writel(CQSPI_REG_INDIRECTRD_DONE,
 	       plat->regbase + CQSPI_REG_INDIRECTRD);
-	bounce_buffer_stop(&bb);
 
 	return 0;
 
@@ -686,7 +681,6 @@ failrd:
 	/* Cancel the indirect read */
 	writel(CQSPI_REG_INDIRECTRD_CANCEL,
 	       plat->regbase + CQSPI_REG_INDIRECTRD);
-	bounce_buffer_stop(&bb);
 	return ret;
 }
 

commit 6b7eb4157f46046b58dfcb5a360697a3ea90ad5b
Author: Jason Rush <jarush@gmail.com>
Date:   Tue Jan 23 17:13:09 2018 -0600

    UPSTREAM: spi: cadence_spi: Sync DT bindings with Linux
    
    Adopt the Linux DT bindings. This also fixes an issue
    with the indaddrtrig register on the Cadence QSPI
    device being programmed with the wrong value for the
    socfpga arch.
    
    Tested on TI K2G platform:
    Tested-by: Vignesh R <vigneshr@ti.com>
    
    Tested on a socfpga-cyclonev board:
    Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
    
    Change-Id: Ic221ac76abf1a32a027b9650bc6f27667209c77c
    Signed-off-by: Jason Rush <jarush@gmail.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
    Acked-by: Marek Vasut <marex@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 15a70a5da33229de884f60684a562ea60fe505b2)

diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
index 9a6e41f330..7b312f8e3e 100644
--- a/drivers/spi/cadence_qspi.c
+++ b/drivers/spi/cadence_qspi.c
@@ -212,7 +212,7 @@ static int cadence_spi_xfer(struct udevice *dev, unsigned int bitlen,
 
 	/* Set Chip select */
 	cadence_qspi_apb_chipselect(base, spi_chip_select(dev),
-				    CONFIG_CQSPI_DECODER);
+				    plat->is_decoded_cs);
 
 	if ((flags & SPI_XFER_END) || (flags == 0)) {
 		if (priv->cmd_len == 0) {
@@ -296,7 +296,11 @@ static int cadence_spi_ofdata_to_platdata(struct udevice *bus)
 
 	plat->regbase = (void *)data[0];
 	plat->ahbbase = (void *)data[2];
-	plat->sram_size = fdtdec_get_int(blob, node, "sram-size", 128);
+	plat->is_decoded_cs = fdtdec_get_bool(blob, node, "cdns,is-decoded-cs");
+	plat->fifo_depth = fdtdec_get_uint(blob, node, "cdns,fifo-depth", 128);
+	plat->fifo_width = fdtdec_get_uint(blob, node, "cdns,fifo-width", 4);
+	plat->trigger_address = fdtdec_get_uint(blob, node,
+						"cdns,trigger-address", 0);
 
 	/* All other paramters are embedded in the child node */
 	subnode = fdt_first_subnode(blob, node);
@@ -310,12 +314,12 @@ static int cadence_spi_ofdata_to_platdata(struct udevice *bus)
 				       500000);
 
 	/* Read other parameters from DT */
-	plat->page_size = fdtdec_get_int(blob, subnode, "page-size", 256);
-	plat->block_size = fdtdec_get_int(blob, subnode, "block-size", 16);
-	plat->tshsl_ns = fdtdec_get_int(blob, subnode, "tshsl-ns", 200);
-	plat->tsd2d_ns = fdtdec_get_int(blob, subnode, "tsd2d-ns", 255);
-	plat->tchsh_ns = fdtdec_get_int(blob, subnode, "tchsh-ns", 20);
-	plat->tslch_ns = fdtdec_get_int(blob, subnode, "tslch-ns", 20);
+	plat->page_size = fdtdec_get_uint(blob, subnode, "page-size", 256);
+	plat->block_size = fdtdec_get_uint(blob, subnode, "block-size", 16);
+	plat->tshsl_ns = fdtdec_get_uint(blob, subnode, "cdns,tshsl-ns", 200);
+	plat->tsd2d_ns = fdtdec_get_uint(blob, subnode, "cdns,tsd2d-ns", 255);
+	plat->tchsh_ns = fdtdec_get_uint(blob, subnode, "cdns,tchsh-ns", 20);
+	plat->tslch_ns = fdtdec_get_uint(blob, subnode, "cdns,tslch-ns", 20);
 
 	debug("%s: regbase=%p ahbbase=%p max-frequency=%d page-size=%d\n",
 	      __func__, plat->regbase, plat->ahbbase, plat->max_hz,
diff --git a/drivers/spi/cadence_qspi.h b/drivers/spi/cadence_qspi.h
index d1927a4003..9106b09d29 100644
--- a/drivers/spi/cadence_qspi.h
+++ b/drivers/spi/cadence_qspi.h
@@ -18,14 +18,18 @@ struct cadence_spi_platdata {
 	unsigned int	max_hz;
 	void		*regbase;
 	void		*ahbbase;
+	bool		is_decoded_cs;
+	u32		fifo_depth;
+	u32		fifo_width;
+	u32		trigger_address;
 
+	/* Flash parameters */
 	u32		page_size;
 	u32		block_size;
 	u32		tshsl_ns;
 	u32		tsd2d_ns;
 	u32		tchsh_ns;
 	u32		tslch_ns;
-	u32		sram_size;
 };
 
 struct cadence_spi_priv {
diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c
index dca3fdfdea..c3dd32912e 100644
--- a/drivers/spi/cadence_qspi_apb.c
+++ b/drivers/spi/cadence_qspi_apb.c
@@ -37,10 +37,6 @@
 #define CQSPI_REG_RETRY				10000
 #define CQSPI_POLL_IDLE_RETRY			3
 
-#define CQSPI_FIFO_WIDTH			4
-
-#define CQSPI_REG_SRAM_THRESHOLD_WORDS		50
-
 /* Transfer mode */
 #define CQSPI_INST_TYPE_SINGLE			0
 #define CQSPI_INST_TYPE_DUAL			1
@@ -51,9 +47,6 @@
 #define CQSPI_DUMMY_CLKS_PER_BYTE		8
 #define CQSPI_DUMMY_BYTES_MAX			4
 
-#define CQSPI_REG_SRAM_FILL_THRESHOLD	\
-	((CQSPI_REG_SRAM_SIZE_WORD / 2) * CQSPI_FIFO_WIDTH)
-
 /****************************************************************************
  * Controller's configuration and status register (offset from QSPI_BASE)
  ****************************************************************************/
@@ -400,7 +393,7 @@ void cadence_qspi_apb_controller_init(struct cadence_spi_platdata *plat)
 	writel(0, plat->regbase + CQSPI_REG_REMAP);
 
 	/* Indirect mode configurations */
-	writel((plat->sram_size/2), plat->regbase + CQSPI_REG_SRAMPARTITION);
+	writel(plat->fifo_depth / 2, plat->regbase + CQSPI_REG_SRAMPARTITION);
 
 	/* Disable all interrupts */
 	writel(0, plat->regbase + CQSPI_REG_IRQMASK);
@@ -560,7 +553,7 @@ int cadence_qspi_apb_indirect_read_setup(struct cadence_spi_platdata *plat,
 		addr_bytes = cmdlen - 1;
 
 	/* Setup the indirect trigger address */
-	writel((u32)plat->ahbbase,
+	writel(plat->trigger_address,
 	       plat->regbase + CQSPI_REG_INDIRECTTRIGGER);
 
 	/* Configure the opcode */
@@ -659,7 +652,7 @@ int cadence_qspi_apb_indirect_read_execute(struct cadence_spi_platdata *plat,
 		bytes_to_read = ret;
 
 		while (bytes_to_read != 0) {
-			bytes_to_read *= CQSPI_FIFO_WIDTH;
+			bytes_to_read *= plat->fifo_width;
 			bytes_to_read = bytes_to_read > remaining ?
 					remaining : bytes_to_read;
 			readsl(plat->ahbbase, bb_rxbuf, bytes_to_read >> 2);
@@ -710,7 +703,7 @@ int cadence_qspi_apb_indirect_write_setup(struct cadence_spi_platdata *plat,
 		return -EINVAL;
 	}
 	/* Setup the indirect trigger address */
-	writel((u32)plat->ahbbase,
+	writel(plat->trigger_address,
 	       plat->regbase + CQSPI_REG_INDIRECTTRIGGER);
 
 	/* Configure the opcode */

commit ab86434d690d9030cbfb0f21d7d14bdf1ca9f62e
Author: Chris Packham <judge.packham@gmail.com>
Date:   Mon Jan 22 22:44:20 2018 +1300

    UPSTREAM: spi: kirkwood_spi: implement workaround for FE-9144572
    
    Erratum NO. FE-9144572: The device SPI interface supports frequencies of
    up to 50 MHz.  However, due to this erratum, when the device core clock
    is 250 MHz and the SPI interfaces is configured for 50MHz SPI clock and
    CPOL=CPHA=1 there might occur data corruption on reads from the SPI
    device.
    
    Implement the workaround by setting the TMISO_SAMPLE value to 0x2
    in the timing1 register.
    
    Change-Id: Iee0b8cb304816d74c6442132be4cc04e6cb8adbc
    Signed-off-by: Chris Packham <judge.packham@gmail.com>
    Reviewed-by: Stefan Roese <sr@denx.de>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit df16881cea50a787c37591bd2168c8ea656217bd)

diff --git a/arch/arm/include/asm/arch-mvebu/spi.h b/arch/arm/include/asm/arch-mvebu/spi.h
index 3545aed173..1de510ea6d 100644
--- a/arch/arm/include/asm/arch-mvebu/spi.h
+++ b/arch/arm/include/asm/arch-mvebu/spi.h
@@ -57,6 +57,12 @@ struct kwspi_registers {
 #define KWSPI_TXLSBF		(1 << 13)
 #define KWSPI_RXLSBF		(1 << 14)
 
+/* Timing Parameters 1 Register */
+#define KW_SPI_TMISO_SAMPLE_OFFSET	6
+#define KW_SPI_TMISO_SAMPLE_MASK	(0x3 << KW_SPI_TMISO_SAMPLE_OFFSET)
+#define KW_SPI_TMISO_SAMPLE_1		(1 << KW_SPI_TMISO_SAMPLE_OFFSET)
+#define KW_SPI_TMISO_SAMPLE_2		(2 << KW_SPI_TMISO_SAMPLE_OFFSET)
+
 #define KWSPI_IRQUNMASK		1 /* unmask SPI interrupt */
 #define KWSPI_IRQMASK		0 /* mask SPI interrupt */
 #define KWSPI_SMEMRDIRQ		1 /* SerMem data xfer ready irq */
diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c
index 0c6bd295cd..1ad8cdee64 100644
--- a/drivers/spi/kirkwood_spi.c
+++ b/drivers/spi/kirkwood_spi.c
@@ -243,6 +243,10 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
 
 /* Here now the DM part */
 
+struct mvebu_spi_dev {
+	bool			is_errata_50mhz_ac;
+};
+
 struct mvebu_spi_platdata {
 	struct kwspi_registers *spireg;
 };
@@ -269,10 +273,44 @@ static int mvebu_spi_set_speed(struct udevice *bus, uint hz)
 	return 0;
 }
 
+static void mvebu_spi_50mhz_ac_timing_erratum(struct udevice *bus, uint mode)
+{
+	struct mvebu_spi_platdata *plat = dev_get_platdata(bus);
+	struct kwspi_registers *reg = plat->spireg;
+	u32 data;
+
+	/*
+	 * Erratum description: (Erratum NO. FE-9144572) The device
+	 * SPI interface supports frequencies of up to 50 MHz.
+	 * However, due to this erratum, when the device core clock is
+	 * 250 MHz and the SPI interfaces is configured for 50MHz SPI
+	 * clock and CPOL=CPHA=1 there might occur data corruption on
+	 * reads from the SPI device.
+	 * Erratum Workaround:
+	 * Work in one of the following configurations:
+	 * 1. Set CPOL=CPHA=0 in "SPI Interface Configuration
+	 * Register".
+	 * 2. Set TMISO_SAMPLE value to 0x2 in "SPI Timing Parameters 1
+	 * Register" before setting the interface.
+	 */
+	data = readl(&reg->timing1);
+	data &= ~KW_SPI_TMISO_SAMPLE_MASK;
+
+	if (CONFIG_SYS_TCLK == 250000000 &&
+	    mode & SPI_CPOL &&
+	    mode & SPI_CPHA)
+		data |= KW_SPI_TMISO_SAMPLE_2;
+	else
+		data |= KW_SPI_TMISO_SAMPLE_1;
+
+	writel(data, &reg->timing1);
+}
+
 static int mvebu_spi_set_mode(struct udevice *bus, uint mode)
 {
 	struct mvebu_spi_platdata *plat = dev_get_platdata(bus);
 	struct kwspi_registers *reg = plat->spireg;
+	const struct mvebu_spi_dev *drvdata;
 	u32 data = readl(&reg->cfg);
 
 	data &= ~(KWSPI_CPHA | KWSPI_CPOL | KWSPI_RXLSBF | KWSPI_TXLSBF);
@@ -286,6 +324,10 @@ static int mvebu_spi_set_mode(struct udevice *bus, uint mode)
 
 	writel(data, &reg->cfg);
 
+	drvdata = (struct mvebu_spi_dev *)dev_get_driver_data(bus);
+	if (drvdata->is_errata_50mhz_ac)
+		mvebu_spi_50mhz_ac_timing_erratum(bus, mode);
+
 	return 0;
 }
 
@@ -343,10 +385,31 @@ static const struct dm_spi_ops mvebu_spi_ops = {
 	 */
 };
 
+static const struct mvebu_spi_dev armada_xp_spi_dev_data = {
+	.is_errata_50mhz_ac = false,
+};
+
+static const struct mvebu_spi_dev armada_375_spi_dev_data = {
+	.is_errata_50mhz_ac = false,
+};
+
+static const struct mvebu_spi_dev armada_380_spi_dev_data = {
+	.is_errata_50mhz_ac = true,
+};
+
 static const struct udevice_id mvebu_spi_ids[] = {
-	{ .compatible = "marvell,armada-375-spi" },
-	{ .compatible = "marvell,armada-380-spi" },
-	{ .compatible = "marvell,armada-xp-spi" },
+	{
+		.compatible = "marvell,armada-375-spi",
+		.data = (ulong)&armada_375_spi_dev_data
+	},
+	{
+		.compatible = "marvell,armada-380-spi",
+		.data = (ulong)&armada_380_spi_dev_data
+	},
+	{
+		.compatible = "marvell,armada-xp-spi",
+		.data = (ulong)&armada_xp_spi_dev_data
+	},
 	{ }
 };
 

commit 8849a3be8a5192bb2486b9e062f6d51fdc225ca5
Author: Mario Six <mario.six@gdsys.cc>
Date:   Mon Jan 15 11:08:41 2018 +0100

    UPSTREAM: spi: spi-uclass: Fix style violations
    
    Remove a superfluous newline, and reduce the scope of a variable.
    
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Change-Id: I8916ae85b0339d29d7b50382182a263848e21a39
    Signed-off-by: Mario Six <mario.six@gdsys.cc>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 24fc1ec2ee71cd852e556f90bd352cc809ddeef9)

diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c
index 57d5d8aae6..09402efed2 100644
--- a/drivers/spi/spi-uclass.c
+++ b/drivers/spi/spi-uclass.c
@@ -50,7 +50,6 @@ int dm_spi_claim_bus(struct udevice *dev)
 	struct dm_spi_bus *spi = dev_get_uclass_priv(bus);
 	struct spi_slave *slave = dev_get_parent_priv(dev);
 	int speed;
-	int ret;
 
 	speed = slave->max_hz;
 	if (spi->max_hz) {
@@ -62,7 +61,8 @@ int dm_spi_claim_bus(struct udevice *dev)
 	if (!speed)
 		speed = 100000;
 	if (speed != slave->speed) {
-		ret = spi_set_speed_mode(bus, speed, slave->mode);
+		int ret = spi_set_speed_mode(bus, speed, slave->mode);
+
 		if (ret)
 			return log_ret(ret);
 		slave->speed = speed;
@@ -129,7 +129,6 @@ static int spi_post_probe(struct udevice *bus)
 #if defined(CONFIG_NEEDS_MANUAL_RELOC)
 	struct dm_spi_ops *ops = spi_get_ops(bus);
 
-
 	if (ops->claim_bus)
 		ops->claim_bus += gd->reloc_off;
 	if (ops->release_bus)

commit e806bc1cf363d72f6e8806661948c24e3bb7157f
Author: Mario Six <mario.six@gdsys.cc>
Date:   Mon Jan 15 11:08:38 2018 +0100

    UPSTREAM: spi: Remove spi_setup_slave_fdt
    
    A previous patch removed the spi_flash_probe_fdt function, which
    contained the last call of the spi_setup_slave_fdt function, which is
    now equally obsolete.
    
    This patch removes the function.
    
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Change-Id: I0836438bec6597bb99038997ae6a549d647f1666
    Signed-off-by: Mario Six <mario.six@gdsys.cc>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 184fa1c8da54d3c5305b3e1975e284e01de68bea)

diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c
index 97536cadfd..57d5d8aae6 100644
--- a/drivers/spi/spi-uclass.c
+++ b/drivers/spi/spi-uclass.c
@@ -349,22 +349,6 @@ err:
 	return ret;
 }
 
-/* Compatibility function - to be removed */
-struct spi_slave *spi_setup_slave_fdt(const void *blob, int node,
-				      int bus_node)
-{
-	struct udevice *bus, *dev;
-	int ret;
-
-	ret = uclass_get_device_by_of_offset(UCLASS_SPI, bus_node, &bus);
-	if (ret)
-		return NULL;
-	ret = device_get_child_by_of_offset(bus, node, &dev);
-	if (ret)
-		return NULL;
-	return dev_get_parent_priv(dev);
-}
-
 /* Compatibility function - to be removed */
 struct spi_slave *spi_setup_slave(unsigned int busnum, unsigned int cs,
 				  unsigned int speed, unsigned int mode)
diff --git a/include/spi.h b/include/spi.h
index 3fe34217d8..bed0f373ad 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -320,19 +320,6 @@ static inline int spi_w8r8(struct spi_slave *slave, unsigned char byte)
 	return ret < 0 ? ret : din[1];
 }
 
-/**
- * Set up a SPI slave for a particular device tree node
- *
- * This calls spi_setup_slave() with the correct bus number. Call
- * spi_free_slave() to free it later.
- *
- * @param blob:		Device tree blob
- * @param slave_node:	Slave node to use
- * @param spi_node:	SPI peripheral node to use
- * @return pointer to new spi_slave structure
- */
-struct spi_slave *spi_setup_slave_fdt(const void *blob, int slave_node,
-				      int spi_node);
 #ifdef CONFIG_DM_SPI
 
 /**

commit b91a110b4c988a55705335b894aa52ab1932e46f
Author: Mario Six <mario.six@gdsys.cc>
Date:   Mon Jan 15 11:08:36 2018 +0100

    UPSTREAM: spi: Remove obsolete spi_base_setup_slave_fdt
    
    0efc024 ("spi_flash: Add spi_flash_probe_fdt() to locate SPI by FDT
    node") added a helper function spi_base_setup_slave_fdt to to set up a
    SPI slave from a given FDT blob. The only user was the exynos SPI
    driver.
    
    But commit 73186c9 ("dm: exynos: Convert SPI to driver model") removed
    the use of this function, hence rendering it obsolete.
    
    Remove this function, as well as the CONFIG_OF_SPI option, which guarded
    only this function.
    
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Change-Id: I2a5bd866fda6d65b908c1f71160da59ab5332a15
    Signed-off-by: Mario Six <mario.six@gdsys.cc>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit c5b88f29ba46997e1cae39153980cae475b87b82)

diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index dea8dcda5b..45e73d28e4 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -39,23 +39,3 @@ void *spi_do_alloc_slave(int offset, int size, unsigned int bus,
 
 	return ptr;
 }
-
-#ifdef CONFIG_OF_SPI
-struct spi_slave *spi_base_setup_slave_fdt(const void *blob, int busnum,
-					   int node)
-{
-	int cs, max_hz, mode = 0;
-
-	cs = fdtdec_get_int(blob, node, "reg", -1);
-	max_hz = fdtdec_get_int(blob, node, "spi-max-frequency", 100000);
-	if (fdtdec_get_bool(blob, node, "spi-cpol"))
-		mode |= SPI_CPOL;
-	if (fdtdec_get_bool(blob, node, "spi-cpha"))
-		mode |= SPI_CPHA;
-	if (fdtdec_get_bool(blob, node, "spi-cs-high"))
-		mode |= SPI_CS_HIGH;
-	if (fdtdec_get_bool(blob, node, "spi-half-duplex"))
-		mode |= SPI_PREAMBLE;
-	return spi_setup_slave(busnum, cs, max_hz, mode);
-}
-#endif
diff --git a/include/spi.h b/include/spi.h
index 4a7ad1a132..3fe34217d8 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -333,20 +333,6 @@ static inline int spi_w8r8(struct spi_slave *slave, unsigned char byte)
  */
 struct spi_slave *spi_setup_slave_fdt(const void *blob, int slave_node,
 				      int spi_node);
-
-/**
- * spi_base_setup_slave_fdt() - helper function to set up a SPI slace
- *
- * This decodes SPI properties from the slave node to determine the
- * chip select and SPI parameters.
- *
- * @blob:	Device tree blob
- * @busnum:	Bus number to use
- * @node:	Device tree node for the SPI bus
- */
-struct spi_slave *spi_base_setup_slave_fdt(const void *blob, int busnum,
-					   int node);
-
 #ifdef CONFIG_DM_SPI
 
 /**
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index f3a4be2c16..73554ed9a4 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -1595,7 +1595,6 @@ CONFIG_NUM_PAMU
 CONFIG_ODROID_REV_AIN
 CONFIG_OFF_PADCONF
 CONFIG_OF_
-CONFIG_OF_SPI
 CONFIG_OF_SPI_FLASH
 CONFIG_OF_STDOUT_PATH
 CONFIG_OMAP_EHCI_PHY1_RESET_GPIO

commit 439ce24404a738284077aeb2bfd44e45a4097136
Author: Mario Six <mario.six@gdsys.cc>
Date:   Mon Jan 15 11:08:35 2018 +0100

    UPSTREAM: spi: Fix style violation and improve code
    
    This patch fixes a printf specifier style violation, reduces the scope
    of a variable, and turns a void pointer that is used with pointer
    arithmetic into a u8 pointer.
    
    Change-Id: I4084bfeaba1e992f589f5190660bcbfb8627b0b3
    Signed-off-by: Mario Six <mario.six@gdsys.cc>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 547bcc3d18ddcc107b8aa7ca393830590c27978f)

diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index 7d81fbd7f8..dea8dcda5b 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -12,7 +12,7 @@
 int spi_set_wordlen(struct spi_slave *slave, unsigned int wordlen)
 {
 	if (wordlen == 0 || wordlen > 32) {
-		printf("spi: invalid wordlen %d\n", wordlen);
+		printf("spi: invalid wordlen %u\n", wordlen);
 		return -1;
 	}
 
@@ -24,11 +24,12 @@ int spi_set_wordlen(struct spi_slave *slave, unsigned int wordlen)
 void *spi_do_alloc_slave(int offset, int size, unsigned int bus,
 			 unsigned int cs)
 {
-	struct spi_slave *slave;
-	void *ptr;
+	u8 *ptr;
 
 	ptr = malloc(size);
 	if (ptr) {
+		struct spi_slave *slave;
+
 		memset(ptr, '\0', size);
 		slave = (struct spi_slave *)(ptr + offset);
 		slave->bus = bus;

commit 4bb24893b6b7ca72b063f686ed85a12ad4b54f17
Author: Álvaro Fernández Rojas <noltari@gmail.com>
Date:   Sat Jan 20 02:13:38 2018 +0100

    UPSTREAM: dm: spi: add BCM63xx HSSPI driver
    
    This driver is a simplified version of linux/drivers/spi/spi-bcm63xx-hsspi.c
    
    Change-Id: Ib6d47452d3699df5eb799cc0289687331192f380
    Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 29cc4368ad4b8d67ae457681e9249e2008d6fee5)

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index aea0ac14e9..8c7f2389f9 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -47,6 +47,14 @@ config ATMEL_SPI
 	  many AT91 (ARM) chips. This driver can be used to access
 	  the SPI Flash, such as AT25DF321.
 
+config BCM63XX_HSSPI
+	bool "BCM63XX HSSPI driver"
+	depends on ARCH_BMIPS
+	help
+	  Enable the BCM6328 HSSPI driver. This driver can be used to
+	  access the SPI NOR flash on platforms embedding this Broadcom
+	  SPI core.
+
 config BCM63XX_SPI
 	bool "BCM6348 SPI driver"
 	depends on ARCH_BMIPS
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index a3bc4c8fe3..5b343af35a 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -20,6 +20,7 @@ endif
 obj-$(CONFIG_ALTERA_SPI) += altera_spi.o
 obj-$(CONFIG_ATH79_SPI) += ath79_spi.o
 obj-$(CONFIG_ATMEL_SPI) += atmel_spi.o
+obj-$(CONFIG_BCM63XX_HSSPI) += bcm63xx_hsspi.o
 obj-$(CONFIG_BCM63XX_SPI) += bcm63xx_spi.o
 obj-$(CONFIG_CADENCE_QSPI) += cadence_qspi.o cadence_qspi_apb.o
 obj-$(CONFIG_CF_SPI) += cf_spi.o
diff --git a/drivers/spi/bcm63xx_hsspi.c b/drivers/spi/bcm63xx_hsspi.c
new file mode 100644
index 0000000000..3393166a1e
--- /dev/null
+++ b/drivers/spi/bcm63xx_hsspi.c
@@ -0,0 +1,414 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * Derived from linux/drivers/spi/spi-bcm63xx-hsspi.c:
+ *	Copyright (C) 2000-2010 Broadcom Corporation
+ *	Copyright (C) 2012-2013 Jonas Gorski <jogo@openwrt.org>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <spi.h>
+#include <reset.h>
+#include <wait_bit.h>
+#include <asm/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define HSSPI_PP			0
+
+#define SPI_MAX_SYNC_CLOCK		30000000
+
+/* SPI Control register */
+#define SPI_CTL_REG			0x000
+#define SPI_CTL_CS_POL_SHIFT		0
+#define SPI_CTL_CS_POL_MASK		(0xff << SPI_CTL_CS_POL_SHIFT)
+#define SPI_CTL_CLK_GATE_SHIFT		16
+#define SPI_CTL_CLK_GATE_MASK		(1 << SPI_CTL_CLK_GATE_SHIFT)
+#define SPI_CTL_CLK_POL_SHIFT		17
+#define SPI_CTL_CLK_POL_MASK		(1 << SPI_CTL_CLK_POL_SHIFT)
+
+/* SPI Interrupts registers */
+#define SPI_IR_STAT_REG			0x008
+#define SPI_IR_ST_MASK_REG		0x00c
+#define SPI_IR_MASK_REG			0x010
+
+#define SPI_IR_CLEAR_ALL		0xff001f1f
+
+/* SPI Ping-Pong Command registers */
+#define SPI_CMD_REG			(0x080 + (0x40 * (HSSPI_PP)) + 0x00)
+#define SPI_CMD_OP_SHIFT		0
+#define SPI_CMD_OP_START		(0x1 << SPI_CMD_OP_SHIFT)
+#define SPI_CMD_PFL_SHIFT		8
+#define SPI_CMD_PFL_MASK		(0x7 << SPI_CMD_PFL_SHIFT)
+#define SPI_CMD_SLAVE_SHIFT		12
+#define SPI_CMD_SLAVE_MASK		(0x7 << SPI_CMD_SLAVE_SHIFT)
+
+/* SPI Ping-Pong Status registers */
+#define SPI_STAT_REG			(0x080 + (0x40 * (HSSPI_PP)) + 0x04)
+#define SPI_STAT_SRCBUSY_SHIFT		1
+#define SPI_STAT_SRCBUSY_MASK		(1 << SPI_STAT_SRCBUSY_SHIFT)
+
+/* SPI Profile Clock registers */
+#define SPI_PFL_CLK_REG(x)		(0x100 + (0x20 * (x)) + 0x00)
+#define SPI_PFL_CLK_FREQ_SHIFT		0
+#define SPI_PFL_CLK_FREQ_MASK		(0x3fff << SPI_PFL_CLK_FREQ_SHIFT)
+#define SPI_PFL_CLK_RSTLOOP_SHIFT	15
+#define SPI_PFL_CLK_RSTLOOP_MASK	(1 << SPI_PFL_CLK_RSTLOOP_SHIFT)
+
+/* SPI Profile Signal registers */
+#define SPI_PFL_SIG_REG(x)		(0x100 + (0x20 * (x)) + 0x04)
+#define SPI_PFL_SIG_LATCHRIS_SHIFT	12
+#define SPI_PFL_SIG_LATCHRIS_MASK	(1 << SPI_PFL_SIG_LATCHRIS_SHIFT)
+#define SPI_PFL_SIG_LAUNCHRIS_SHIFT	13
+#define SPI_PFL_SIG_LAUNCHRIS_MASK	(1 << SPI_PFL_SIG_LAUNCHRIS_SHIFT)
+#define SPI_PFL_SIG_ASYNCIN_SHIFT	16
+#define SPI_PFL_SIG_ASYNCIN_MASK	(1 << SPI_PFL_SIG_ASYNCIN_SHIFT)
+
+/* SPI Profile Mode registers */
+#define SPI_PFL_MODE_REG(x)		(0x100 + (0x20 * (x)) + 0x08)
+#define SPI_PFL_MODE_FILL_SHIFT		0
+#define SPI_PFL_MODE_FILL_MASK		(0xff << SPI_PFL_MODE_FILL_SHIFT)
+#define SPI_PFL_MODE_MDRDSZ_SHIFT	16
+#define SPI_PFL_MODE_MDRDSZ_MASK	(1 << SPI_PFL_MODE_MDRDSZ_SHIFT)
+#define SPI_PFL_MODE_MDWRSZ_SHIFT	18
+#define SPI_PFL_MODE_MDWRSZ_MASK	(1 << SPI_PFL_MODE_MDWRSZ_SHIFT)
+#define SPI_PFL_MODE_3WIRE_SHIFT	20
+#define SPI_PFL_MODE_3WIRE_MASK		(1 << SPI_PFL_MODE_3WIRE_SHIFT)
+
+/* SPI Ping-Pong FIFO registers */
+#define HSSPI_FIFO_SIZE			0x200
+#define HSSPI_FIFO_BASE			(0x200 + \
+					 (HSSPI_FIFO_SIZE * HSSPI_PP))
+
+/* SPI Ping-Pong FIFO OP register */
+#define HSSPI_FIFO_OP_SIZE		0x2
+#define HSSPI_FIFO_OP_REG		(HSSPI_FIFO_BASE + 0x00)
+#define HSSPI_FIFO_OP_BYTES_SHIFT	0
+#define HSSPI_FIFO_OP_BYTES_MASK	(0x3ff << HSSPI_FIFO_OP_BYTES_SHIFT)
+#define HSSPI_FIFO_OP_MBIT_SHIFT	11
+#define HSSPI_FIFO_OP_MBIT_MASK		(1 << HSSPI_FIFO_OP_MBIT_SHIFT)
+#define HSSPI_FIFO_OP_CODE_SHIFT	13
+#define HSSPI_FIFO_OP_READ_WRITE	(1 << HSSPI_FIFO_OP_CODE_SHIFT)
+#define HSSPI_FIFO_OP_CODE_W		(2 << HSSPI_FIFO_OP_CODE_SHIFT)
+#define HSSPI_FIFO_OP_CODE_R		(3 << HSSPI_FIFO_OP_CODE_SHIFT)
+
+struct bcm63xx_hsspi_priv {
+	void __iomem *regs;
+	ulong clk_rate;
+	uint8_t num_cs;
+	uint8_t cs_pols;
+	uint speed;
+};
+
+static int bcm63xx_hsspi_cs_info(struct udevice *bus, uint cs,
+			   struct spi_cs_info *info)
+{
+	struct bcm63xx_hsspi_priv *priv = dev_get_priv(bus);
+
+	if (cs >= priv->num_cs) {
+		printf("no cs %u\n", cs);
+		return -ENODEV;
+	}
+
+	return 0;
+}
+
+static int bcm63xx_hsspi_set_mode(struct udevice *bus, uint mode)
+{
+	struct bcm63xx_hsspi_priv *priv = dev_get_priv(bus);
+
+	/* clock polarity */
+	if (mode & SPI_CPOL)
+		setbits_be32(priv->regs + SPI_CTL_REG, SPI_CTL_CLK_POL_MASK);
+	else
+		clrbits_be32(priv->regs + SPI_CTL_REG, SPI_CTL_CLK_POL_MASK);
+
+	return 0;
+}
+
+static int bcm63xx_hsspi_set_speed(struct udevice *bus, uint speed)
+{
+	struct bcm63xx_hsspi_priv *priv = dev_get_priv(bus);
+
+	priv->speed = speed;
+
+	return 0;
+}
+
+static void bcm63xx_hsspi_activate_cs(struct bcm63xx_hsspi_priv *priv,
+				   struct dm_spi_slave_platdata *plat)
+{
+	uint32_t clr, set;
+
+	/* profile clock */
+	set = DIV_ROUND_UP(priv->clk_rate, priv->speed);
+	set = DIV_ROUND_UP(2048, set);
+	set &= SPI_PFL_CLK_FREQ_MASK;
+	set |= SPI_PFL_CLK_RSTLOOP_MASK;
+	writel_be(set, priv->regs + SPI_PFL_CLK_REG(plat->cs));
+
+	/* profile signal */
+	set = 0;
+	clr = SPI_PFL_SIG_LAUNCHRIS_MASK |
+	      SPI_PFL_SIG_LATCHRIS_MASK |
+	      SPI_PFL_SIG_ASYNCIN_MASK;
+
+	/* latch/launch config */
+	if (plat->mode & SPI_CPHA)
+		set |= SPI_PFL_SIG_LAUNCHRIS_MASK;
+	else
+		set |= SPI_PFL_SIG_LATCHRIS_MASK;
+
+	/* async clk */
+	if (priv->speed > SPI_MAX_SYNC_CLOCK)
+		set |= SPI_PFL_SIG_ASYNCIN_MASK;
+
+	clrsetbits_be32(priv->regs + SPI_PFL_SIG_REG(plat->cs), clr, set);
+
+	/* global control */
+	set = 0;
+	clr = 0;
+
+	/* invert cs polarity */
+	if (priv->cs_pols & BIT(plat->cs))
+		clr |= BIT(plat->cs);
+	else
+		set |= BIT(plat->cs);
+
+	/* invert dummy cs polarity */
+	if (priv->cs_pols & BIT(!plat->cs))
+		clr |= BIT(!plat->cs);
+	else
+		set |= BIT(!plat->cs);
+
+	clrsetbits_be32(priv->regs + SPI_CTL_REG, clr, set);
+}
+
+static void bcm63xx_hsspi_deactivate_cs(struct bcm63xx_hsspi_priv *priv)
+{
+	/* restore cs polarities */
+	clrsetbits_be32(priv->regs + SPI_CTL_REG, SPI_CTL_CS_POL_MASK,
+			priv->cs_pols);
+}
+
+/*
+ * BCM63xx HSSPI driver doesn't allow keeping CS active between transfers
+ * because they are controlled by HW.
+ * However, it provides a mechanism to prepend write transfers prior to read
+ * transfers (with a maximum prepend of 15 bytes), which is usually enough for
+ * SPI-connected flashes since reading requires prepending a write transfer of
+ * 5 bytes. On the other hand it also provides a way to invert each CS
+ * polarity, not only between transfers like the older BCM63xx SPI driver, but
+ * also the rest of the time.
+ *
+ * Instead of using the prepend mechanism, this implementation inverts the
+ * polarity of both the desired CS and another dummy CS when the bus is
+ * claimed. This way, the dummy CS is restored to its inactive value when
+ * transfers are issued and the desired CS is preserved in its active value
+ * all the time. This hack is also used in the upstream linux driver and
+ * allows keeping CS active between trasnfers even if the HW doesn't give
+ * this possibility.
+ */
+static int bcm63xx_hsspi_xfer(struct udevice *dev, unsigned int bitlen,
+		const void *dout, void *din, unsigned long flags)
+{
+	struct bcm63xx_hsspi_priv *priv = dev_get_priv(dev->parent);
+	struct dm_spi_slave_platdata *plat = dev_get_parent_platdata(dev);
+	size_t data_bytes = bitlen / 8;
+	size_t step_size = HSSPI_FIFO_SIZE;
+	uint16_t opcode = 0;
+	uint32_t val;
+	const uint8_t *tx = dout;
+	uint8_t *rx = din;
+
+	if (flags & SPI_XFER_BEGIN)
+		bcm63xx_hsspi_activate_cs(priv, plat);
+
+	/* fifo operation */
+	if (tx && rx)
+		opcode = HSSPI_FIFO_OP_READ_WRITE;
+	else if (rx)
+		opcode = HSSPI_FIFO_OP_CODE_R;
+	else if (tx)
+		opcode = HSSPI_FIFO_OP_CODE_W;
+
+	if (opcode != HSSPI_FIFO_OP_CODE_R)
+		step_size -= HSSPI_FIFO_OP_SIZE;
+
+	/* dual mode */
+	if ((opcode == HSSPI_FIFO_OP_CODE_R && plat->mode == SPI_RX_DUAL) ||
+	    (opcode == HSSPI_FIFO_OP_CODE_W && plat->mode == SPI_TX_DUAL))
+		opcode |= HSSPI_FIFO_OP_MBIT_MASK;
+
+	/* profile mode */
+	val = SPI_PFL_MODE_FILL_MASK |
+	      SPI_PFL_MODE_MDRDSZ_MASK |
+	      SPI_PFL_MODE_MDWRSZ_MASK;
+	if (plat->mode & SPI_3WIRE)
+		val |= SPI_PFL_MODE_3WIRE_MASK;
+	writel_be(val, priv->regs + SPI_PFL_MODE_REG(plat->cs));
+
+	/* transfer loop */
+	while (data_bytes > 0) {
+		size_t curr_step = min(step_size, data_bytes);
+		int ret;
+
+		/* copy tx data */
+		if (tx) {
+			memcpy_toio(priv->regs + HSSPI_FIFO_BASE +
+				    HSSPI_FIFO_OP_SIZE, tx, curr_step);
+			tx += curr_step;
+		}
+
+		/* set fifo operation */
+		writew_be(opcode | (curr_step & HSSPI_FIFO_OP_BYTES_MASK),
+			  priv->regs + HSSPI_FIFO_OP_REG);
+
+		/* issue the transfer */
+		val = SPI_CMD_OP_START;
+		val |= (plat->cs << SPI_CMD_PFL_SHIFT) &
+		       SPI_CMD_PFL_MASK;
+		val |= (!plat->cs << SPI_CMD_SLAVE_SHIFT) &
+		       SPI_CMD_SLAVE_MASK;
+		writel_be(val, priv->regs + SPI_CMD_REG);
+
+		/* wait for completion */
+		ret = wait_for_bit_be32(priv->regs + SPI_STAT_REG,
+					SPI_STAT_SRCBUSY_MASK, false,
+					1000, false);
+		if (ret) {
+			printf("interrupt timeout\n");
+			return ret;
+		}
+
+		/* copy rx data */
+		if (rx) {
+			memcpy_fromio(rx, priv->regs + HSSPI_FIFO_BASE,
+				      curr_step);
+			rx += curr_step;
+		}
+
+		data_bytes -= curr_step;
+	}
+
+	if (flags & SPI_XFER_END)
+		bcm63xx_hsspi_deactivate_cs(priv);
+
+	return 0;
+}
+
+static const struct dm_spi_ops bcm63xx_hsspi_ops = {
+	.cs_info = bcm63xx_hsspi_cs_info,
+	.set_mode = bcm63xx_hsspi_set_mode,
+	.set_speed = bcm63xx_hsspi_set_speed,
+	.xfer = bcm63xx_hsspi_xfer,
+};
+
+static const struct udevice_id bcm63xx_hsspi_ids[] = {
+	{ .compatible = "brcm,bcm6328-hsspi", },
+	{ /* sentinel */ }
+};
+
+static int bcm63xx_hsspi_child_pre_probe(struct udevice *dev)
+{
+	struct bcm63xx_hsspi_priv *priv = dev_get_priv(dev->parent);
+	struct dm_spi_slave_platdata *plat = dev_get_parent_platdata(dev);
+
+	/* check cs */
+	if (plat->cs >= priv->num_cs) {
+		printf("no cs %u\n", plat->cs);
+		return -ENODEV;
+	}
+
+	/* cs polarity */
+	if (plat->mode & SPI_CS_HIGH)
+		priv->cs_pols |= BIT(plat->cs);
+	else
+		priv->cs_pols &= ~BIT(plat->cs);
+
+	return 0;
+}
+
+static int bcm63xx_hsspi_probe(struct udevice *dev)
+{
+	struct bcm63xx_hsspi_priv *priv = dev_get_priv(dev);
+	struct reset_ctl rst_ctl;
+	struct clk clk;
+	fdt_addr_t addr;
+	fdt_size_t size;
+	int ret;
+
+	addr = devfdt_get_addr_size_index(dev, 0, &size);
+	if (addr == FDT_ADDR_T_NONE)
+		return -EINVAL;
+
+	priv->regs = ioremap(addr, size);
+	priv->num_cs = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev),
+				       "num-cs", 8);
+
+	/* enable clock */
+	ret = clk_get_by_name(dev, "hsspi", &clk);
+	if (ret < 0)
+		return ret;
+
+	ret = clk_enable(&clk);
+	if (ret < 0)
+		return ret;
+
+	ret = clk_free(&clk);
+	if (ret < 0)
+		return ret;
+
+	/* get clock rate */
+	ret = clk_get_by_name(dev, "pll", &clk);
+	if (ret < 0)
+		return ret;
+
+	priv->clk_rate = clk_get_rate(&clk);
+
+	ret = clk_free(&clk);
+	if (ret < 0)
+		return ret;
+
+	/* perform reset */
+	ret = reset_get_by_index(dev, 0, &rst_ctl);
+	if (ret < 0)
+		return ret;
+
+	ret = reset_deassert(&rst_ctl);
+	if (ret < 0)
+		return ret;
+
+	ret = reset_free(&rst_ctl);
+	if (ret < 0)
+		return ret;
+
+	/* initialize hardware */
+	writel_be(0, priv->regs + SPI_IR_MASK_REG);
+
+	/* clear pending interrupts */
+	writel_be(SPI_IR_CLEAR_ALL, priv->regs + SPI_IR_STAT_REG);
+
+	/* enable clk gate */
+	setbits_be32(priv->regs + SPI_CTL_REG, SPI_CTL_CLK_GATE_MASK);
+
+	/* read default cs polarities */
+	priv->cs_pols = readl_be(priv->regs + SPI_CTL_REG) &
+			SPI_CTL_CS_POL_MASK;
+
+	return 0;
+}
+
+U_BOOT_DRIVER(bcm63xx_hsspi) = {
+	.name = "bcm63xx_hsspi",
+	.id = UCLASS_SPI,
+	.of_match = bcm63xx_hsspi_ids,
+	.ops = &bcm63xx_hsspi_ops,
+	.priv_auto_alloc_size = sizeof(struct bcm63xx_hsspi_priv),
+	.child_pre_probe = bcm63xx_hsspi_child_pre_probe,
+	.probe = bcm63xx_hsspi_probe,
+};

commit c2d012f94d3435a04a33271d668ded9960fd42fb
Author: Álvaro Fernández Rojas <noltari@gmail.com>
Date:   Tue Jan 23 17:14:58 2018 +0100

    UPSTREAM: dm: spi: add BCM63xx SPI driver
    
    This driver is a simplified version of linux/drivers/spi/spi-bcm63xx.c
    
    Change-Id: I2a36ddc619bc5801fe6f9f9873a63d8e6d62534f
    Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 5ac07d2969e7f1ea2582f97ccacbe9ad9c9d62fc)

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index d1b33971be..aea0ac14e9 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -47,6 +47,14 @@ config ATMEL_SPI
 	  many AT91 (ARM) chips. This driver can be used to access
 	  the SPI Flash, such as AT25DF321.
 
+config BCM63XX_SPI
+	bool "BCM6348 SPI driver"
+	depends on ARCH_BMIPS
+	help
+	  Enable the BCM6348/BCM6358 SPI driver. This driver can be used to
+	  access the SPI NOR flash on platforms embedding these Broadcom
+	  SPI cores.
+
 config CADENCE_QSPI
 	bool "Cadence QSPI driver"
 	help
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 3840ba768b..a3bc4c8fe3 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -20,6 +20,7 @@ endif
 obj-$(CONFIG_ALTERA_SPI) += altera_spi.o
 obj-$(CONFIG_ATH79_SPI) += ath79_spi.o
 obj-$(CONFIG_ATMEL_SPI) += atmel_spi.o
+obj-$(CONFIG_BCM63XX_SPI) += bcm63xx_spi.o
 obj-$(CONFIG_CADENCE_QSPI) += cadence_qspi.o cadence_qspi_apb.o
 obj-$(CONFIG_CF_SPI) += cf_spi.o
 obj-$(CONFIG_DAVINCI_SPI) += davinci_spi.o
diff --git a/drivers/spi/bcm63xx_spi.c b/drivers/spi/bcm63xx_spi.c
new file mode 100644
index 0000000000..f0df6871d8
--- /dev/null
+++ b/drivers/spi/bcm63xx_spi.c
@@ -0,0 +1,433 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * Derived from linux/drivers/spi/spi-bcm63xx.c:
+ *	Copyright (C) 2009-2012 Florian Fainelli <florian@openwrt.org>
+ *	Copyright (C) 2010 Tanguy Bouzeloc <tanguy.bouzeloc@efixo.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <spi.h>
+#include <reset.h>
+#include <wait_bit.h>
+#include <asm/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* BCM6348 SPI core */
+#define SPI_6348_CLK			0x06
+#define SPI_6348_CMD			0x00
+#define SPI_6348_CTL			0x40
+#define SPI_6348_CTL_SHIFT		6
+#define SPI_6348_FILL			0x07
+#define SPI_6348_IR_MASK		0x04
+#define SPI_6348_IR_STAT		0x02
+#define SPI_6348_RX			0x80
+#define SPI_6348_RX_SIZE		0x3f
+#define SPI_6348_TX			0x41
+#define SPI_6348_TX_SIZE		0x3f
+
+/* BCM6358 SPI core */
+#define SPI_6358_CLK			0x706
+#define SPI_6358_CMD			0x700
+#define SPI_6358_CTL			0x000
+#define SPI_6358_CTL_SHIFT		14
+#define SPI_6358_FILL			0x707
+#define SPI_6358_IR_MASK		0x702
+#define SPI_6358_IR_STAT		0x704
+#define SPI_6358_RX			0x400
+#define SPI_6358_RX_SIZE		0x220
+#define SPI_6358_TX			0x002
+#define SPI_6358_TX_SIZE		0x21e
+
+/* SPI Clock register */
+#define SPI_CLK_SHIFT		0
+#define SPI_CLK_20MHZ		(0 << SPI_CLK_SHIFT)
+#define SPI_CLK_0_391MHZ	(1 << SPI_CLK_SHIFT)
+#define SPI_CLK_0_781MHZ	(2 << SPI_CLK_SHIFT)
+#define SPI_CLK_1_563MHZ	(3 << SPI_CLK_SHIFT)
+#define SPI_CLK_3_125MHZ	(4 << SPI_CLK_SHIFT)
+#define SPI_CLK_6_250MHZ	(5 << SPI_CLK_SHIFT)
+#define SPI_CLK_12_50MHZ	(6 << SPI_CLK_SHIFT)
+#define SPI_CLK_25MHZ		(7 << SPI_CLK_SHIFT)
+#define SPI_CLK_MASK		(7 << SPI_CLK_SHIFT)
+#define SPI_CLK_SSOFF_SHIFT	3
+#define SPI_CLK_SSOFF_2		(2 << SPI_CLK_SSOFF_SHIFT)
+#define SPI_CLK_SSOFF_MASK	(7 << SPI_CLK_SSOFF_SHIFT)
+#define SPI_CLK_BSWAP_SHIFT	7
+#define SPI_CLK_BSWAP_MASK	(1 << SPI_CLK_BSWAP_SHIFT)
+
+/* SPI Command register */
+#define SPI_CMD_OP_SHIFT	0
+#define SPI_CMD_OP_START	(0x3 << SPI_CMD_OP_SHIFT)
+#define SPI_CMD_SLAVE_SHIFT	4
+#define SPI_CMD_SLAVE_MASK	(0xf << SPI_CMD_SLAVE_SHIFT)
+#define SPI_CMD_PREPEND_SHIFT	8
+#define SPI_CMD_PREPEND_BYTES	0xf
+#define SPI_CMD_3WIRE_SHIFT	12
+#define SPI_CMD_3WIRE_MASK	(1 << SPI_CMD_3WIRE_SHIFT)
+
+/* SPI Control register */
+#define SPI_CTL_TYPE_FD_RW	0
+#define SPI_CTL_TYPE_HD_W	1
+#define SPI_CTL_TYPE_HD_R	2
+
+/* SPI Interrupt registers */
+#define SPI_IR_DONE_SHIFT	0
+#define SPI_IR_DONE_MASK	(1 << SPI_IR_DONE_SHIFT)
+#define SPI_IR_RXOVER_SHIFT	1
+#define SPI_IR_RXOVER_MASK	(1 << SPI_IR_RXOVER_SHIFT)
+#define SPI_IR_TXUNDER_SHIFT	2
+#define SPI_IR_TXUNDER_MASK	(1 << SPI_IR_TXUNDER_SHIFT)
+#define SPI_IR_TXOVER_SHIFT	3
+#define SPI_IR_TXOVER_MASK	(1 << SPI_IR_TXOVER_SHIFT)
+#define SPI_IR_RXUNDER_SHIFT	4
+#define SPI_IR_RXUNDER_MASK	(1 << SPI_IR_RXUNDER_SHIFT)
+#define SPI_IR_CLEAR_MASK	(SPI_IR_DONE_MASK |\
+				 SPI_IR_RXOVER_MASK |\
+				 SPI_IR_TXUNDER_MASK |\
+				 SPI_IR_TXOVER_MASK |\
+				 SPI_IR_RXUNDER_MASK)
+
+enum bcm63xx_regs_spi {
+	SPI_CLK,
+	SPI_CMD,
+	SPI_CTL,
+	SPI_CTL_SHIFT,
+	SPI_FILL,
+	SPI_IR_MASK,
+	SPI_IR_STAT,
+	SPI_RX,
+	SPI_RX_SIZE,
+	SPI_TX,
+	SPI_TX_SIZE,
+};
+
+struct bcm63xx_spi_priv {
+	const unsigned long *regs;
+	void __iomem *base;
+	size_t tx_bytes;
+	uint8_t num_cs;
+};
+
+#define SPI_CLK_CNT		8
+static const unsigned bcm63xx_spi_freq_table[SPI_CLK_CNT][2] = {
+	{ 25000000, SPI_CLK_25MHZ },
+	{ 20000000, SPI_CLK_20MHZ },
+	{ 12500000, SPI_CLK_12_50MHZ },
+	{  6250000, SPI_CLK_6_250MHZ },
+	{  3125000, SPI_CLK_3_125MHZ },
+	{  1563000, SPI_CLK_1_563MHZ },
+	{   781000, SPI_CLK_0_781MHZ },
+	{   391000, SPI_CLK_0_391MHZ }
+};
+
+static int bcm63xx_spi_cs_info(struct udevice *bus, uint cs,
+			   struct spi_cs_info *info)
+{
+	struct bcm63xx_spi_priv *priv = dev_get_priv(bus);
+
+	if (cs >= priv->num_cs) {
+		printf("no cs %u\n", cs);
+		return -ENODEV;
+	}
+
+	return 0;
+}
+
+static int bcm63xx_spi_set_mode(struct udevice *bus, uint mode)
+{
+	struct bcm63xx_spi_priv *priv = dev_get_priv(bus);
+	const unsigned long *regs = priv->regs;
+
+	if (mode & SPI_LSB_FIRST)
+		setbits_8(priv->base + regs[SPI_CLK], SPI_CLK_BSWAP_MASK);
+	else
+		clrbits_8(priv->base + regs[SPI_CLK], SPI_CLK_BSWAP_MASK);
+
+	return 0;
+}
+
+static int bcm63xx_spi_set_speed(struct udevice *bus, uint speed)
+{
+	struct bcm63xx_spi_priv *priv = dev_get_priv(bus);
+	const unsigned long *regs = priv->regs;
+	uint8_t clk_cfg;
+	int i;
+
+	/* default to lowest clock configuration */
+	clk_cfg = SPI_CLK_0_391MHZ;
+
+	/* find the closest clock configuration */
+	for (i = 0; i < SPI_CLK_CNT; i++) {
+		if (speed >= bcm63xx_spi_freq_table[i][0]) {
+			clk_cfg = bcm63xx_spi_freq_table[i][1];
+			break;
+		}
+	}
+
+	/* write clock configuration */
+	clrsetbits_8(priv->base + regs[SPI_CLK],
+		     SPI_CLK_SSOFF_MASK | SPI_CLK_MASK,
+		     clk_cfg | SPI_CLK_SSOFF_2);
+
+	return 0;
+}
+
+/*
+ * BCM63xx SPI driver doesn't allow keeping CS active between transfers since
+ * they are HW controlled.
+ * However, it provides a mechanism to prepend write transfers prior to read
+ * transfers (with a maximum prepend of 15 bytes), which is usually enough for
+ * SPI-connected flashes since reading requires prepending a write transfer of
+ * 5 bytes.
+ *
+ * This implementation takes advantage of the prepend mechanism and combines
+ * multiple transfers into a single one where possible (single/multiple write
+ * transfer(s) followed by a final read/write transfer).
+ * However, it's not possible to buffer reads, which means that read transfers
+ * should always be done as the final ones.
+ * On the other hand, take into account that combining write transfers into
+ * a single one is just buffering and doesn't require prepend mechanism.
+ */
+static int bcm63xx_spi_xfer(struct udevice *dev, unsigned int bitlen,
+		const void *dout, void *din, unsigned long flags)
+{
+	struct bcm63xx_spi_priv *priv = dev_get_priv(dev->parent);
+	const unsigned long *regs = priv->regs;
+	size_t data_bytes = bitlen / 8;
+
+	if (flags & SPI_XFER_BEGIN) {
+		/* clear prepends */
+		priv->tx_bytes = 0;
+
+		/* initialize hardware */
+		writeb_be(0, priv->base + regs[SPI_IR_MASK]);
+	}
+
+	if (din) {
+		/* buffering reads not possible since cs is hw controlled */
+		if (!(flags & SPI_XFER_END)) {
+			printf("unable to buffer reads\n");
+			return -EINVAL;
+		}
+
+		/* check rx size */
+		 if (data_bytes > regs[SPI_RX_SIZE]) {
+			printf("max rx bytes exceeded\n");
+			return -EMSGSIZE;
+		}
+	}
+
+	if (dout) {
+		/* check tx size */
+		if (priv->tx_bytes + data_bytes > regs[SPI_TX_SIZE]) {
+			printf("max tx bytes exceeded\n");
+			return -EMSGSIZE;
+		}
+
+		/* copy tx data */
+		memcpy_toio(priv->base + regs[SPI_TX] + priv->tx_bytes,
+			    dout, data_bytes);
+		priv->tx_bytes += data_bytes;
+	}
+
+	if (flags & SPI_XFER_END) {
+		struct dm_spi_slave_platdata *plat =
+			dev_get_parent_platdata(dev);
+		uint16_t val, cmd;
+		int ret;
+
+		/* determine control config */
+		if (dout && !din) {
+			/* buffered write transfers */
+			val = priv->tx_bytes;
+			val |= (SPI_CTL_TYPE_HD_W << regs[SPI_CTL_SHIFT]);
+			priv->tx_bytes = 0;
+		} else {
+			if (dout && din && (flags & SPI_XFER_ONCE)) {
+				/* full duplex read/write */
+				val = data_bytes;
+				val |= (SPI_CTL_TYPE_FD_RW <<
+					regs[SPI_CTL_SHIFT]);
+				priv->tx_bytes = 0;
+			} else {
+				/* prepended write transfer */
+				val = data_bytes;
+				val |= (SPI_CTL_TYPE_HD_R <<
+					regs[SPI_CTL_SHIFT]);
+				if (priv->tx_bytes > SPI_CMD_PREPEND_BYTES) {
+					printf("max prepend bytes exceeded\n");
+					return -EMSGSIZE;
+				}
+			}
+		}
+
+		if (regs[SPI_CTL_SHIFT] >= 8)
+			writew_be(val, priv->base + regs[SPI_CTL]);
+		else
+			writeb_be(val, priv->base + regs[SPI_CTL]);
+
+		/* clear interrupts */
+		writeb_be(SPI_IR_CLEAR_MASK, priv->base + regs[SPI_IR_STAT]);
+
+		/* issue the transfer */
+		cmd = SPI_CMD_OP_START;
+		cmd |= (plat->cs << SPI_CMD_SLAVE_SHIFT) & SPI_CMD_SLAVE_MASK;
+		cmd |= (priv->tx_bytes << SPI_CMD_PREPEND_SHIFT);
+		if (plat->mode & SPI_3WIRE)
+			cmd |= SPI_CMD_3WIRE_MASK;
+		writew_be(cmd, priv->base + regs[SPI_CMD]);
+
+		/* enable interrupts */
+		writeb_be(SPI_IR_DONE_MASK, priv->base + regs[SPI_IR_MASK]);
+
+		ret = wait_for_bit_8(priv->base + regs[SPI_IR_STAT],
+				     SPI_IR_DONE_MASK, true, 1000, false);
+		if (ret) {
+			printf("interrupt timeout\n");
+			return ret;
+		}
+
+		/* copy rx data */
+		if (din)
+			memcpy_fromio(din, priv->base + regs[SPI_RX],
+				      data_bytes);
+	}
+
+	return 0;
+}
+
+static const struct dm_spi_ops bcm63xx_spi_ops = {
+	.cs_info = bcm63xx_spi_cs_info,
+	.set_mode = bcm63xx_spi_set_mode,
+	.set_speed = bcm63xx_spi_set_speed,
+	.xfer = bcm63xx_spi_xfer,
+};
+
+static const unsigned long bcm6348_spi_regs[] = {
+	[SPI_CLK] = SPI_6348_CLK,
+	[SPI_CMD] = SPI_6348_CMD,
+	[SPI_CTL] = SPI_6348_CTL,
+	[SPI_CTL_SHIFT] = SPI_6348_CTL_SHIFT,
+	[SPI_FILL] = SPI_6348_FILL,
+	[SPI_IR_MASK] = SPI_6348_IR_MASK,
+	[SPI_IR_STAT] = SPI_6348_IR_STAT,
+	[SPI_RX] = SPI_6348_RX,
+	[SPI_RX_SIZE] = SPI_6348_RX_SIZE,
+	[SPI_TX] = SPI_6348_TX,
+	[SPI_TX_SIZE] = SPI_6348_TX_SIZE,
+};
+
+static const unsigned long bcm6358_spi_regs[] = {
+	[SPI_CLK] = SPI_6358_CLK,
+	[SPI_CMD] = SPI_6358_CMD,
+	[SPI_CTL] = SPI_6358_CTL,
+	[SPI_CTL_SHIFT] = SPI_6358_CTL_SHIFT,
+	[SPI_FILL] = SPI_6358_FILL,
+	[SPI_IR_MASK] = SPI_6358_IR_MASK,
+	[SPI_IR_STAT] = SPI_6358_IR_STAT,
+	[SPI_RX] = SPI_6358_RX,
+	[SPI_RX_SIZE] = SPI_6358_RX_SIZE,
+	[SPI_TX] = SPI_6358_TX,
+	[SPI_TX_SIZE] = SPI_6358_TX_SIZE,
+};
+
+static const struct udevice_id bcm63xx_spi_ids[] = {
+	{
+		.compatible = "brcm,bcm6348-spi",
+		.data = (ulong)&bcm6348_spi_regs,
+	}, {
+		.compatible = "brcm,bcm6358-spi",
+		.data = (ulong)&bcm6358_spi_regs,
+	}, { /* sentinel */ }
+};
+
+static int bcm63xx_spi_child_pre_probe(struct udevice *dev)
+{
+	struct bcm63xx_spi_priv *priv = dev_get_priv(dev->parent);
+	const unsigned long *regs = priv->regs;
+	struct spi_slave *slave = dev_get_parent_priv(dev);
+	struct dm_spi_slave_platdata *plat = dev_get_parent_platdata(dev);
+
+	/* check cs */
+	if (plat->cs >= priv->num_cs) {
+		printf("no cs %u\n", plat->cs);
+		return -ENODEV;
+	}
+
+	/* max read/write sizes */
+	slave->max_read_size = regs[SPI_RX_SIZE];
+	slave->max_write_size = regs[SPI_TX_SIZE];
+
+	return 0;
+}
+
+static int bcm63xx_spi_probe(struct udevice *dev)
+{
+	struct bcm63xx_spi_priv *priv = dev_get_priv(dev);
+	const unsigned long *regs =
+		(const unsigned long *)dev_get_driver_data(dev);
+	struct reset_ctl rst_ctl;
+	struct clk clk;
+	fdt_addr_t addr;
+	fdt_size_t size;
+	int ret;
+
+	addr = devfdt_get_addr_size_index(dev, 0, &size);
+	if (addr == FDT_ADDR_T_NONE)
+		return -EINVAL;
+
+	priv->regs = regs;
+	priv->base = ioremap(addr, size);
+	priv->num_cs = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev),
+				       "num-cs", 8);
+
+	/* enable clock */
+	ret = clk_get_by_index(dev, 0, &clk);
+	if (ret < 0)
+		return ret;
+
+	ret = clk_enable(&clk);
+	if (ret < 0)
+		return ret;
+
+	ret = clk_free(&clk);
+	if (ret < 0)
+		return ret;
+
+	/* perform reset */
+	ret = reset_get_by_index(dev, 0, &rst_ctl);
+	if (ret < 0)
+		return ret;
+
+	ret = reset_deassert(&rst_ctl);
+	if (ret < 0)
+		return ret;
+
+	ret = reset_free(&rst_ctl);
+	if (ret < 0)
+		return ret;
+
+	/* initialize hardware */
+	writeb_be(0, priv->base + regs[SPI_IR_MASK]);
+
+	/* set fill register */
+	writeb_be(0xff, priv->base + regs[SPI_FILL]);
+
+	return 0;
+}
+
+U_BOOT_DRIVER(bcm63xx_spi) = {
+	.name = "bcm63xx_spi",
+	.id = UCLASS_SPI,
+	.of_match = bcm63xx_spi_ids,
+	.ops = &bcm63xx_spi_ops,
+	.priv_auto_alloc_size = sizeof(struct bcm63xx_spi_priv),
+	.child_pre_probe = bcm63xx_spi_child_pre_probe,
+	.probe = bcm63xx_spi_probe,
+};

commit 2b9d6da418624bbf3d19f9d8093c54e5da5423e9
Author: Adam Ford <aford173@gmail.com>
Date:   Sat Dec 30 07:33:42 2017 -0600

    UPSTREAM: Convert CONFIG_DAVINCI_SPI to Kconfig
    
    This converts the following to Kconfig:
       CONFIG_DAVINCI_SPI
    
    Signed-off-by: Adam Ford <aford173@gmail.com>
    (cherry picked from commit 26410c1517bbb6d6f90de55b5fa65dac3c298bc7)
    Change-Id: I7b2166d5ea20dcd0a0e79d6faa1c51fca4d6eef9
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/configs/da850_am18xxevm_defconfig b/configs/da850_am18xxevm_defconfig
index 52af03835f..6c297b12d6 100644
--- a/configs/da850_am18xxevm_defconfig
+++ b/configs/da850_am18xxevm_defconfig
@@ -42,4 +42,6 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SYS_NS16550=y
-CONFIG_OF_LIBFDT=y
+CONFIG_DM_SPI=y
+CONFIG_DAVINCI_SPI=y
+# CONFIG_FAT_WRITE is not set
diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig
index 7eead565d1..b2fe206733 100644
--- a/configs/da850evm_defconfig
+++ b/configs/da850evm_defconfig
@@ -45,4 +45,6 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SYS_NS16550=y
-CONFIG_OF_LIBFDT=y
+CONFIG_DM_SPI=y
+CONFIG_DAVINCI_SPI=y
+# CONFIG_FAT_WRITE is not set
diff --git a/configs/da850evm_direct_nor_defconfig b/configs/da850evm_direct_nor_defconfig
index 9c1ae37671..36f755082f 100644
--- a/configs/da850evm_direct_nor_defconfig
+++ b/configs/da850evm_direct_nor_defconfig
@@ -26,4 +26,5 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SYS_NS16550=y
-CONFIG_OF_LIBFDT=y
+CONFIG_DM_SPI=y
+CONFIG_DAVINCI_SPI=y
diff --git a/configs/ea20_defconfig b/configs/ea20_defconfig
index fc1f03ce80..f23851ba67 100644
--- a/configs/ea20_defconfig
+++ b/configs/ea20_defconfig
@@ -36,4 +36,6 @@ CONFIG_NAND_DAVINCI=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SYS_NS16550=y
+CONFIG_DAVINCI_SPI=y
+CONFIG_VIDEO=y
 # CONFIG_VIDEO_SW_CURSOR is not set
diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig
index d67106742b..9849b6f7e5 100644
--- a/configs/k2e_evm_defconfig
+++ b/configs/k2e_evm_defconfig
@@ -45,6 +45,7 @@ CONFIG_DM_ETH=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
 CONFIG_DM_SPI=y
+CONFIG_DAVINCI_SPI=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
diff --git a/configs/k2e_hs_evm_defconfig b/configs/k2e_hs_evm_defconfig
index bf56f9b109..04f902b1c6 100644
--- a/configs/k2e_hs_evm_defconfig
+++ b/configs/k2e_hs_evm_defconfig
@@ -34,6 +34,7 @@ CONFIG_DM_ETH=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
 CONFIG_DM_SPI=y
+CONFIG_DAVINCI_SPI=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig
index b5d4dbd9f0..3a2e0f6c6e 100644
--- a/configs/k2g_evm_defconfig
+++ b/configs/k2g_evm_defconfig
@@ -49,6 +49,7 @@ CONFIG_REMOTEPROC_TI_POWER=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
 CONFIG_DM_SPI=y
+CONFIG_DAVINCI_SPI=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
diff --git a/configs/k2g_hs_evm_defconfig b/configs/k2g_hs_evm_defconfig
index dc5c941369..2a8618c5c2 100644
--- a/configs/k2g_hs_evm_defconfig
+++ b/configs/k2g_hs_evm_defconfig
@@ -37,6 +37,7 @@ CONFIG_REMOTEPROC_TI_POWER=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
 CONFIG_DM_SPI=y
+CONFIG_DAVINCI_SPI=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig
index ffa8287451..a5a8809ee9 100644
--- a/configs/k2hk_evm_defconfig
+++ b/configs/k2hk_evm_defconfig
@@ -45,6 +45,7 @@ CONFIG_DM_ETH=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
 CONFIG_DM_SPI=y
+CONFIG_DAVINCI_SPI=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
diff --git a/configs/k2hk_hs_evm_defconfig b/configs/k2hk_hs_evm_defconfig
index eb61d4985d..30cced63ae 100644
--- a/configs/k2hk_hs_evm_defconfig
+++ b/configs/k2hk_hs_evm_defconfig
@@ -34,6 +34,7 @@ CONFIG_DM_ETH=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
 CONFIG_DM_SPI=y
+CONFIG_DAVINCI_SPI=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig
index 2421d8930d..5c157aef01 100644
--- a/configs/k2l_evm_defconfig
+++ b/configs/k2l_evm_defconfig
@@ -45,6 +45,7 @@ CONFIG_DM_ETH=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
 CONFIG_DM_SPI=y
+CONFIG_DAVINCI_SPI=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
diff --git a/configs/legoev3_defconfig b/configs/legoev3_defconfig
index 589e8cf880..b8fab0eff2 100644
--- a/configs/legoev3_defconfig
+++ b/configs/legoev3_defconfig
@@ -27,5 +27,6 @@ CONFIG_CMD_DIAG=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SYS_NS16550=y
+CONFIG_DAVINCI_SPI=y
 CONFIG_OF_LIBFDT=y
 # CONFIG_EFI_LOADER is not set
diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig
index ca3c6061eb..d67e691c0c 100644
--- a/configs/omapl138_lcdk_defconfig
+++ b/configs/omapl138_lcdk_defconfig
@@ -37,4 +37,5 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SYS_NS16550=y
+CONFIG_DAVINCI_SPI=y
 CONFIG_OF_LIBFDT=y
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index a15927636c..d1b33971be 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -232,6 +232,12 @@ config ATCSPI200_SPI
 	  used to access the SPI flash on AE3XX and AE250 platforms embedding
 	  this Andestech IP core.
 
+config DAVINCI_SPI
+	bool "Davinci & Keystone SPI driver"
+	depends on ARCH_DAVINCI || ARCH_KEYSTONE
+	help
+	  Enable the Davinci SPI driver
+
 config TI_QSPI
 	bool "TI QSPI driver"
 	help
diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h
index bea18e1b37..8fa88d028b 100644
--- a/include/configs/da850evm.h
+++ b/include/configs/da850evm.h
@@ -137,7 +137,8 @@
 #define CONFIG_CONS_INDEX	1		/* use UART0 for console */
 
 #define CONFIG_SPI
-#define CONFIG_DAVINCI_SPI
+#define CONFIG_SYS_SPI_CLK		clk_get(DAVINCI_SPI1_CLKID)
+#ifdef CONFIG_SPL_BUILD
 #define CONFIG_SYS_SPI_BASE		DAVINCI_SPI1_BASE
 #define CONFIG_SYS_SPI_CLK		clk_get(DAVINCI_SPI1_CLKID)
 #define CONFIG_SF_DEFAULT_SPEED		30000000
diff --git a/include/configs/ea20.h b/include/configs/ea20.h
index fd4ea50c2b..221e105bed 100644
--- a/include/configs/ea20.h
+++ b/include/configs/ea20.h
@@ -61,7 +61,6 @@
 #define CONFIG_CONS_INDEX	1		/* use UART0 for console */
 
 #define CONFIG_SPI
-#define CONFIG_DAVINCI_SPI
 #define CONFIG_SYS_SPI_BASE		DAVINCI_SPI1_BASE
 #define CONFIG_SYS_SPI_CLK		clk_get(DAVINCI_SPI1_CLKID)
 #define CONFIG_SF_DEFAULT_SPEED		30000000
diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h
index c27373c56c..98a15d5861 100644
--- a/include/configs/legoev3.h
+++ b/include/configs/legoev3.h
@@ -124,7 +124,6 @@
 #define CONFIG_CONS_INDEX	1		/* use UART0 for console */
 
 #define CONFIG_SPI
-#define CONFIG_DAVINCI_SPI
 #define CONFIG_SYS_SPI_BASE		DAVINCI_SPI0_BASE
 #define CONFIG_SYS_SPI_CLK		clk_get(DAVINCI_SPI0_CLKID)
 #define CONFIG_SF_DEFAULT_SPEED		50000000
diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h
index 8a50b47b96..19398b46c8 100644
--- a/include/configs/omapl138_lcdk.h
+++ b/include/configs/omapl138_lcdk.h
@@ -129,7 +129,6 @@
 #define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
 
 #define CONFIG_SPI
-#define CONFIG_DAVINCI_SPI
 #define CONFIG_SYS_SPI_BASE		DAVINCI_SPI1_BASE
 #define CONFIG_SYS_SPI_CLK		clk_get(DAVINCI_SPI1_CLKID)
 #define CONFIG_SF_DEFAULT_SPEED		30000000
diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h
index 85294a27f0..c7431f7ec7 100644
--- a/include/configs/ti_armv7_keystone2.h
+++ b/include/configs/ti_armv7_keystone2.h
@@ -78,7 +78,6 @@
 #endif
 
 /* SPI Configuration */
-#define CONFIG_DAVINCI_SPI
 #define CONFIG_SYS_SPI_CLK		ks_clk_get_rate(KS2_CLK1_6)
 #define CONFIG_SF_DEFAULT_SPEED		30000000
 #define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 64958552fb..f3a4be2c16 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -378,7 +378,6 @@ CONFIG_DA850_AM18X_EVM
 CONFIG_DA850_EVM_MAX_CPU_CLK
 CONFIG_DA850_LOWLEVEL
 CONFIG_DA8XX_GPIO
-CONFIG_DAVINCI_SPI
 CONFIG_DBAU1000
 CONFIG_DBAU1X00
 CONFIG_DBGU

commit c3bb0077c76044d7c820ebaedc8524be9ee91a84
Author: Peng Fan <peng.fan@nxp.com>
Date:   Wed Jan 3 08:52:02 2018 +0800

    UPSTREAM: spi: fsl_qspi: support i.MX6UL/6ULLL/7D
    
    The QSPI module on i.MX7D is modified from i.MX6SX. The module used on
    i.MX6UL/6ULL is reused from i.MX7D. They share same tx buffer size.
    
    The endianness is not set at qspi driver initialization. So if we don't
    boot from QSPI, we will get wrong endianness when accessing from AHB
    address directly.
    
    Add the compatible entry for 6ul/7d.
    
    Change-Id: I8aa660b610b39c24969560187b35d5e7a8a17f5d
    Signed-off-by: Peng Fan <peng.fan@nxp.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit afe8e1b03362f169b2f905d20e2b352aca9d522e)

diff --git a/drivers/spi/fsl_qspi.c b/drivers/spi/fsl_qspi.c
index eed52c15c8..5dc69a6865 100644
--- a/drivers/spi/fsl_qspi.c
+++ b/drivers/spi/fsl_qspi.c
@@ -20,7 +20,8 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 #define RX_BUFFER_SIZE		0x80
-#ifdef CONFIG_MX6SX
+#if defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || \
+	defined(CONFIG_MX6ULL) || defined(CONFIG_MX7D)
 #define TX_BUFFER_SIZE		0x200
 #else
 #define TX_BUFFER_SIZE		0x40
@@ -268,7 +269,8 @@ static void qspi_set_lut(struct fsl_qspi_priv *priv)
 			     INSTR0(LUT_CMD) | OPRND1(ADDR32BIT) |
 			     PAD1(LUT_PAD1) | INSTR1(LUT_ADDR));
 #endif
-#ifdef CONFIG_MX6SX
+#if defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || \
+	defined(CONFIG_MX6ULL) || defined(CONFIG_MX7D)
 	/*
 	 * To MX6SX, OPRND0(TX_BUFFER_SIZE) can not work correctly.
 	 * So, Use IDATSZ in IPCR to determine the size and here set 0.
@@ -905,6 +907,11 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
 	qspi->slave.max_write_size = TX_BUFFER_SIZE;
 
 	mcr_val = qspi_read32(qspi->priv.flags, &regs->mcr);
+
+	/* Set endianness to LE for i.mx */
+	if (IS_ENABLED(CONFIG_MX6) || IS_ENABLED(CONFIG_MX7))
+		mcr_val = QSPI_MCR_END_CFD_LE;
+
 	qspi_write32(qspi->priv.flags, &regs->mcr,
 		     QSPI_MCR_RESERVED_MASK | QSPI_MCR_MDIS_MASK |
 		     (mcr_val & QSPI_MCR_END_CFD_MASK));
@@ -1023,6 +1030,11 @@ static int fsl_qspi_probe(struct udevice *bus)
 	}
 
 	mcr_val = qspi_read32(priv->flags, &priv->regs->mcr);
+
+	/* Set endianness to LE for i.mx */
+	if (IS_ENABLED(CONFIG_MX6) || IS_ENABLED(CONFIG_MX7))
+		mcr_val = QSPI_MCR_END_CFD_LE;
+
 	qspi_write32(priv->flags, &priv->regs->mcr,
 		     QSPI_MCR_RESERVED_MASK | QSPI_MCR_MDIS_MASK |
 		     (mcr_val & QSPI_MCR_END_CFD_MASK));
@@ -1227,6 +1239,8 @@ static const struct dm_spi_ops fsl_qspi_ops = {
 static const struct udevice_id fsl_qspi_ids[] = {
 	{ .compatible = "fsl,vf610-qspi" },
 	{ .compatible = "fsl,imx6sx-qspi" },
+	{ .compatible = "fsl,imx6ul-qspi" },
+	{ .compatible = "fsl,imx7d-qspi" },
 	{ }
 };
 

commit ab1460f2249c2619a1bcec90749a74d629e86be4
Author: Rick Chen <rick@andestech.com>
Date:   Thu Nov 23 14:17:35 2017 +0800

    UPSTREAM: cosmetic: atcspi200: Rename function name as atcspi200
    
    Integrate function and struct name from ae3xx to
    atcspi200 will be more reasonable.
    
    Change-Id: I932c2ed047541b6ad09344c0ceb80496ac575c64
    Signed-off-by: Rick Chen <rick@andestech.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 6720e4ae7a01afa93b99a8f62b0cc98fe01abc9b)

diff --git a/drivers/spi/atcspi200_spi.c b/drivers/spi/atcspi200_spi.c
index f5bd99a605..3e29df03a4 100644
--- a/drivers/spi/atcspi200_spi.c
+++ b/drivers/spi/atcspi200_spi.c
@@ -1,5 +1,5 @@
 /*
- * NDS SPI controller driver.
+ * Andestech ATCSPI200 SPI controller driver.
  *
  * Copyright 2017 Andes Technology, Inc.
  * Author: Rick Chen (rick@andestech.com)
@@ -25,7 +25,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define SPI1_BASE		0xf0f00000
 #define NSPI_MAX_CS_NUM		1
 
-struct ae3xx_spi_regs {
+struct atcspi200_spi_regs {
 	u32	rev;
 	u32	reserve1[3];
 	u32	format;		/* 0x10 */
@@ -78,7 +78,7 @@ struct nds_spi_slave {
 #ifndef CONFIG_DM_SPI
 	struct spi_slave slave;
 #endif
-	volatile struct ae3xx_spi_regs *regs;
+	volatile struct atcspi200_spi_regs *regs;
 	int		to;
 	unsigned int	freq;
 	ulong		clock;
@@ -94,7 +94,7 @@ struct nds_spi_slave {
 	unsigned int    max_transfer_length;
 };
 
-static int __ae3xx_spi_set_speed(struct nds_spi_slave *ns)
+static int __atcspi200_spi_set_speed(struct nds_spi_slave *ns)
 {
 	u32 tm;
 	u8 div;
@@ -117,7 +117,7 @@ static int __ae3xx_spi_set_speed(struct nds_spi_slave *ns)
 
 }
 
-static int __ae3xx_spi_claim_bus(struct nds_spi_slave *ns)
+static int __atcspi200_spi_claim_bus(struct nds_spi_slave *ns)
 {
 		unsigned int format=0;
 		ns->regs->ctrl |= (TXFRST|RXFRST|SPIRST);
@@ -128,18 +128,18 @@ static int __ae3xx_spi_claim_bus(struct nds_spi_slave *ns)
 		ns->cmd_len = 0;
 		format = ns->mode|DATA_LENGTH(8);
 		ns->regs->format = format;
-		__ae3xx_spi_set_speed(ns);
+		__atcspi200_spi_set_speed(ns);
 
 		return 0;
 }
 
-static int __ae3xx_spi_release_bus(struct nds_spi_slave *ns)
+static int __atcspi200_spi_release_bus(struct nds_spi_slave *ns)
 {
 	/* do nothing */
 	return 0;
 }
 
-static int __ae3xx_spi_start(struct nds_spi_slave *ns)
+static int __atcspi200_spi_start(struct nds_spi_slave *ns)
 {
 	int i,olen=0;
 	int tc = ns->regs->tctrl;
@@ -168,7 +168,7 @@ static int __ae3xx_spi_start(struct nds_spi_slave *ns)
 	return 0;
 }
 
-static int __ae3xx_spi_stop(struct nds_spi_slave *ns)
+static int __atcspi200_spi_stop(struct nds_spi_slave *ns)
 {
 	ns->regs->timing = ns->mtiming;
 	while ((ns->regs->status & SPIBSY)&&(ns->to--))
@@ -190,7 +190,7 @@ static int __nspi_espi_rx(struct nds_spi_slave *ns, void *din, unsigned int byte
 }
 
 
-static int __ae3xx_spi_xfer(struct nds_spi_slave *ns,
+static int __atcspi200_spi_xfer(struct nds_spi_slave *ns,
 		unsigned int bitlen,  const void *data_out, void *data_in,
 		unsigned long flags)
 {
@@ -230,7 +230,7 @@ static int __ae3xx_spi_xfer(struct nds_spi_slave *ns,
 			memcpy(cmd_buf, data_out, cmd_len);
 			data_out = 0;
 			data_len = 0;
-			__ae3xx_spi_start(ns);
+			__atcspi200_spi_start(ns);
 			break;
 		}
 		debug("spi_xfer: data_out %08X(%p) data_in %08X(%p) data_len %u\n",
@@ -245,7 +245,7 @@ static int __ae3xx_spi_xfer(struct nds_spi_slave *ns,
 			num_bytes = (tran_len) % CHUNK_SIZE;
 			if(num_bytes == 0)
 				num_bytes = CHUNK_SIZE;
-			__ae3xx_spi_start(ns);
+			__atcspi200_spi_start(ns);
 
 			while (num_blks) {
 				event = in_le32(&ns->regs->status);
@@ -279,9 +279,9 @@ static int __ae3xx_spi_xfer(struct nds_spi_slave *ns,
 				ns->cmd_buf[3] += ((tran_len)&0xff);
 				ns->data_len = data_len;
 			}
-			ret = __ae3xx_spi_stop(ns);
+			ret = __atcspi200_spi_stop(ns);
 		}
-		ret = __ae3xx_spi_stop(ns);
+		ret = __atcspi200_spi_stop(ns);
 
 		return ret;
 }
@@ -300,11 +300,11 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
 
 	switch (bus) {
 	case SPI0_BUS:
-			ns->regs = (struct ae3xx_spi_regs *)SPI0_BASE;
+			ns->regs = (struct atcspi200_spi_regs *)SPI0_BASE;
 			break;
 
 		case SPI1_BUS:
-			ns->regs = (struct ae3xx_spi_regs *)SPI1_BASE;
+			ns->regs = (struct atcspi200_spi_regs *)SPI1_BASE;
 			break;
 
 		default:
@@ -336,20 +336,20 @@ void spi_init(void)
 int spi_claim_bus(struct spi_slave *slave)
 {
 	struct nds_spi_slave *ns = to_nds_spi_slave(slave);
-	return __ae3xx_spi_claim_bus(ns);
+	return __atcspi200_spi_claim_bus(ns);
 }
 
 void spi_release_bus(struct spi_slave *slave)
 {
 	struct nds_spi_slave *ns = to_nds_spi_slave(slave);
-	__ae3xx_spi_release_bus(ns);
+	__atcspi200_spi_release_bus(ns);
 }
 
 int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *data_out,
 		void *data_in, unsigned long flags)
 {
 	struct nds_spi_slave *ns = to_nds_spi_slave(slave);
-	return __ae3xx_spi_xfer(ns, bitlen, data_out, data_in, flags);
+	return __atcspi200_spi_xfer(ns, bitlen, data_out, data_in, flags);
 }
 
 int spi_cs_is_valid(unsigned int bus, unsigned int cs)
@@ -360,28 +360,28 @@ int spi_cs_is_valid(unsigned int bus, unsigned int cs)
 void spi_cs_activate(struct spi_slave *slave)
 {
 	struct nds_spi_slave *ns = to_nds_spi_slave(slave);
-	__ae3xx_spi_start(ns);
+	__atcspi200_spi_start(ns);
 }
 
 void spi_cs_deactivate(struct spi_slave *slave)
 {
 	struct nds_spi_slave *ns = to_nds_spi_slave(slave);
-	__ae3xx_spi_stop(ns);
+	__atcspi200_spi_stop(ns);
 }
 #else
-static int ae3xx_spi_set_speed(struct udevice *bus, uint max_hz)
+static int atcspi200_spi_set_speed(struct udevice *bus, uint max_hz)
 {
 	struct nds_spi_slave *ns = dev_get_priv(bus);
 
 	debug("%s speed %u\n", __func__, max_hz);
 
 	ns->freq = max_hz;
-	__ae3xx_spi_set_speed(ns);
+	__atcspi200_spi_set_speed(ns);
 
 	return 0;
 }
 
-static int ae3xx_spi_set_mode(struct udevice *bus, uint mode)
+static int atcspi200_spi_set_mode(struct udevice *bus, uint mode)
 {
 	struct nds_spi_slave *ns = dev_get_priv(bus);
 
@@ -391,7 +391,7 @@ static int ae3xx_spi_set_mode(struct udevice *bus, uint mode)
 	return 0;
 }
 
-static int ae3xx_spi_claim_bus(struct udevice *dev)
+static int atcspi200_spi_claim_bus(struct udevice *dev)
 {
 	struct dm_spi_slave_platdata *slave_plat =
 		dev_get_parent_platdata(dev);
@@ -403,27 +403,27 @@ static int ae3xx_spi_claim_bus(struct udevice *dev)
 		return -EINVAL;
 	}
 
-	return __ae3xx_spi_claim_bus(ns);
+	return __atcspi200_spi_claim_bus(ns);
 }
 
-static int ae3xx_spi_release_bus(struct udevice *dev)
+static int atcspi200_spi_release_bus(struct udevice *dev)
 {
 	struct nds_spi_slave *ns = dev_get_priv(dev->parent);
 
-	return __ae3xx_spi_release_bus(ns);
+	return __atcspi200_spi_release_bus(ns);
 }
 
-static int ae3xx_spi_xfer(struct udevice *dev, unsigned int bitlen,
+static int atcspi200_spi_xfer(struct udevice *dev, unsigned int bitlen,
 			    const void *dout, void *din,
 			    unsigned long flags)
 {
 	struct udevice *bus = dev->parent;
 	struct nds_spi_slave *ns = dev_get_priv(bus);
 
-	return __ae3xx_spi_xfer(ns, bitlen, dout, din, flags);
+	return __atcspi200_spi_xfer(ns, bitlen, dout, din, flags);
 }
 
-static int ae3xx_spi_get_clk(struct udevice *bus)
+static int atcspi200_spi_get_clk(struct udevice *bus)
 {
 	struct nds_spi_slave *ns = dev_get_priv(bus);
 	struct clk clk;
@@ -444,26 +444,26 @@ static int ae3xx_spi_get_clk(struct udevice *bus)
 	return 0;
 }
 
-static int ae3xx_spi_probe(struct udevice *bus)
+static int atcspi200_spi_probe(struct udevice *bus)
 {
 	struct nds_spi_slave *ns = dev_get_priv(bus);
 
 	ns->to = SPI_TIMEOUT;
 	ns->max_transfer_length = MAX_TRANSFER_LEN;
 	ns->mtiming = ns->regs->timing;
-	ae3xx_spi_get_clk(bus);
+	atcspi200_spi_get_clk(bus);
 
 	return 0;
 }
 
-static int ae3xx_ofdata_to_platadata(struct udevice *bus)
+static int atcspi200_ofdata_to_platadata(struct udevice *bus)
 {
 	struct nds_spi_slave *ns = dev_get_priv(bus);
 	const void *blob = gd->fdt_blob;
 	int node = dev_of_offset(bus);
 
 	ns->regs = map_physmem(devfdt_get_addr(bus),
-				 sizeof(struct ae3xx_spi_regs),
+				 sizeof(struct atcspi200_spi_regs),
 				 MAP_NOCACHE);
 	if (!ns->regs) {
 		printf("%s: could not map device address\n", __func__);
@@ -474,26 +474,26 @@ static int ae3xx_ofdata_to_platadata(struct udevice *bus)
 	return 0;
 }
 
-static const struct dm_spi_ops ae3xx_spi_ops = {
-	.claim_bus	= ae3xx_spi_claim_bus,
-	.release_bus	= ae3xx_spi_release_bus,
-	.xfer		= ae3xx_spi_xfer,
-	.set_speed	= ae3xx_spi_set_speed,
-	.set_mode	= ae3xx_spi_set_mode,
+static const struct dm_spi_ops atcspi200_spi_ops = {
+	.claim_bus	= atcspi200_spi_claim_bus,
+	.release_bus	= atcspi200_spi_release_bus,
+	.xfer		= atcspi200_spi_xfer,
+	.set_speed	= atcspi200_spi_set_speed,
+	.set_mode	= atcspi200_spi_set_mode,
 };
 
-static const struct udevice_id ae3xx_spi_ids[] = {
+static const struct udevice_id atcspi200_spi_ids[] = {
 	{ .compatible = "andestech,atcspi200" },
 	{ }
 };
 
-U_BOOT_DRIVER(ae3xx_spi) = {
-	.name = "ae3xx_spi",
+U_BOOT_DRIVER(atcspi200_spi) = {
+	.name = "atcspi200_spi",
 	.id = UCLASS_SPI,
-	.of_match = ae3xx_spi_ids,
-	.ops = &ae3xx_spi_ops,
-	.ofdata_to_platdata = ae3xx_ofdata_to_platadata,
+	.of_match = atcspi200_spi_ids,
+	.ops = &atcspi200_spi_ops,
+	.ofdata_to_platdata = atcspi200_ofdata_to_platadata,
 	.priv_auto_alloc_size = sizeof(struct nds_spi_slave),
-	.probe = ae3xx_spi_probe,
+	.probe = atcspi200_spi_probe,
 };
 #endif

commit 6b239db430da06baff724d6ee3976ca010714bb9
Author: Rick Chen <rick@andestech.com>
Date:   Thu Nov 23 14:19:36 2017 +0800

    UPSTREAM: spi: nds_ae3xx: Rename nds_ae3xx_spi as atcspi200_spi
    
    atcspi200 is Andestech spi ip which is embedded in
    AE3XX and AE250 platforms. So rename as atcspi200
    will be more reasonable to be used in different
    platforms.
    
    Signed-off-by: Rick Chen <rick@andestech.com>
    (cherry picked from commit 41bbb8b333a6977cd28d31c58a5a209001ce5056)
    Change-Id: I78d0112ba78c09ba9cd2beace324b3af9b867d71
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/configs/adp-ae3xx_defconfig b/configs/adp-ae3xx_defconfig
index 30a1a0ae32..6b5093fe59 100644
--- a/configs/adp-ae3xx_defconfig
+++ b/configs/adp-ae3xx_defconfig
@@ -25,6 +25,8 @@ CONFIG_FTMAC100=y
 CONFIG_BAUDRATE=38400
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
+CONFIG_DM_SPI=y
+CONFIG_ATCSPI200_SPI=y
 CONFIG_TIMER=y
 CONFIG_AE3XX_TIMER=y
 CONFIG_PANIC_HANG=y
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 59075f1ea3..a15927636c 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -225,12 +225,12 @@ config FSL_QSPI
 	  used to access the SPI NOR flash on platforms embedding this
 	  Freescale IP core.
 
-config NDS_AE3XX_SPI
-	bool "Andestech AE3XX SPI driver"
+config ATCSPI200_SPI
+	bool "Andestech ATCSPI200 SPI driver"
 	help
-	  Enable the Andestech AE3XX SPI driver. This driver can be
-	  used to access the SPI flash on platforms embedding this
-	  Andestech IP core.
+	  Enable the Andestech ATCSPI200 SPI driver. This driver can be
+	  used to access the SPI flash on AE3XX and AE250 platforms embedding
+	  this Andestech IP core.
 
 config TI_QSPI
 	bool "TI QSPI driver"
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 5921fe6c38..3840ba768b 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -36,7 +36,7 @@ obj-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o
 obj-$(CONFIG_MVEBU_A3700_SPI) += mvebu_a3700_spi.o
 obj-$(CONFIG_MXC_SPI) += mxc_spi.o
 obj-$(CONFIG_MXS_SPI) += mxs_spi.o
-obj-$(CONFIG_NDS_AE3XX_SPI) += nds_ae3xx_spi.o
+obj-$(CONFIG_ATCSPI200_SPI) += atcspi200_spi.o
 obj-$(CONFIG_OMAP3_SPI) += omap3_spi.o
 obj-$(CONFIG_PIC32_SPI) += pic32_spi.o
 obj-$(CONFIG_ROCKCHIP_SPI) += rk_spi.o
diff --git a/drivers/spi/nds_ae3xx_spi.c b/drivers/spi/atcspi200_spi.c
similarity index 100%
rename from drivers/spi/nds_ae3xx_spi.c
rename to drivers/spi/atcspi200_spi.c

commit 204b4e68727e75710c9359a6b71f4bc0c55ad64f
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Sun Nov 12 20:59:44 2017 +0100

    UPSTREAM: rockchip: spi: the symbol for Hertz is Hz
    
    fix typo
    
    Change-Id: If467ba2cb4d16a4844400e9046e851ab0b96a4de
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 11f12c17d72499292f6e219ebbf8062faedcc5bb)

diff --git a/drivers/spi/rk_spi.c b/drivers/spi/rk_spi.c
index b18db74e7e..03d3fa6763 100644
--- a/drivers/spi/rk_spi.c
+++ b/drivers/spi/rk_spi.c
@@ -94,7 +94,7 @@ static void rkspi_set_clk(struct rockchip_spi_priv *priv, uint speed)
 	 */
 	if (clk_div > 0xfffe) {
 		clk_div = 0xfffe;
-		debug("%s: can't divide down to %d hz (actual will be %d hz)\n",
+		debug("%s: can't divide down to %d Hz (actual will be %d Hz)\n",
 		      __func__, speed, priv->input_rate / clk_div);
 	}
 

commit 538543349299457e458f3671edf66ead4c4781d7
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Sun Nov 12 21:02:52 2017 +0100

    UPSTREAM: omap3: spi: the symbol for Hertz is Hz
    
    fix typo
    
    Change-Id: Ifee202f67e4a972854ed33745de3984b6ae9e2d1
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 042de609ed49cfc41afb13639850c7b01079a527)

diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c
index ebbdcaf14a..1da4542af0 100644
--- a/drivers/spi/omap3_spi.c
+++ b/drivers/spi/omap3_spi.c
@@ -548,7 +548,8 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
 	}
 
 	if (max_hz > OMAP3_MCSPI_MAX_FREQ) {
-		printf("SPI error: unsupported frequency %i Hz. Max frequency is 48 Mhz\n", max_hz);
+		printf("SPI error: unsupported frequency %i Hz. Max frequency is 48 MHz\n",
+		       max_hz);
 		return NULL;
 	}
 

commit a117f09b28bbbb3e4accdf6d5b68ebc683e8934e
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Wed Oct 18 18:20:57 2017 -0700

    UPSTREAM: spi: ich: Lock down controller settings if required
    
    Some Intel FSP (like Braswell) does SPI lock-down during the call
    to fsp_notify(INIT_PHASE_BOOT). But before SPI lock-down is done,
    it's bootloader's responsibility to configure the SPI controller's
    opcode registers properly otherwise SPI controller driver doesn't
    know how to communicate with the SPI flash device.
    
    Rather than passively doing the opcode configuration, let's add a
    simple DTS property "intel,spi-lock-down" and let the driver call
    the opcode configuration function if required by such FSP.
    
    Change-Id: I2cef052b87320392449c39a8aa2330236539a2c3
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit ab20107468de5bf6b9affa93b17f2284cc838b5b)

diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c
index 22fc83dd72..927bbd708f 100644
--- a/drivers/spi/ich.c
+++ b/drivers/spi/ich.c
@@ -184,6 +184,19 @@ static inline void spi_use_in(struct spi_trans *trans, unsigned bytes)
 	trans->bytesin -= bytes;
 }
 
+static void spi_lock_down(struct ich_spi_platdata *plat, void *sbase)
+{
+	if (plat->ich_version == ICHV_7) {
+		struct ich7_spi_regs *ich7_spi = sbase;
+
+		setbits_le16(&ich7_spi->spis, SPIS_LOCK);
+	} else if (plat->ich_version == ICHV_9) {
+		struct ich9_spi_regs *ich9_spi = sbase;
+
+		setbits_le16(&ich9_spi->hsfs, HSFS_FLOCKDN);
+	}
+}
+
 static bool spi_lock_status(struct ich_spi_platdata *plat, void *sbase)
 {
 	int lock = 0;
@@ -592,6 +605,12 @@ static int ich_spi_probe(struct udevice *dev)
 		return ret;
 	}
 
+	/* Lock down SPI controller settings if required */
+	if (plat->lockdown) {
+		ich_spi_config_opcode(dev);
+		spi_lock_down(plat, priv->base);
+	}
+
 	priv->cur_speed = priv->max_speed;
 
 	return 0;
@@ -662,6 +681,9 @@ static int ich_spi_ofdata_to_platdata(struct udevice *dev)
 			plat->ich_version = ICHV_9;
 	}
 
+	plat->lockdown = fdtdec_get_bool(gd->fdt_blob, node,
+					 "intel,spi-lock-down");
+
 	return ret;
 }
 
diff --git a/drivers/spi/ich.h b/drivers/spi/ich.h
index c867c57be9..06b7fb9e01 100644
--- a/drivers/spi/ich.h
+++ b/drivers/spi/ich.h
@@ -174,6 +174,7 @@ enum ich_version {
 
 struct ich_spi_platdata {
 	enum ich_version ich_version;	/* Controller version, 7 or 9 */
+	bool lockdown;			/* lock down controller settings? */
 };
 
 struct ich_spi_priv {

commit 2bac9e0206b530e6c3118fc566a103630f34b31e
Author: Adam Ford <aford173@gmail.com>
Date:   Sun Sep 17 20:43:45 2017 -0500

    UPSTREAM: spi: davinci_spi: Add da830-spi support for DM
    
    The DM support is already in the driver, so add
    da830-spi to the compatible list.
    
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Change-Id: I1a9146dc21017f7f32e79608cfecb4129df93a14
    Signed-off-by: Adam Ford <aford173@gmail.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit ab0ac272421c4b72c7a78db32ad709e23cab1eea)

diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index 291ef9576a..eda252d0b3 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -563,6 +563,7 @@ static const struct dm_spi_ops davinci_spi_ops = {
 static const struct udevice_id davinci_spi_ids[] = {
 	{ .compatible = "ti,keystone-spi" },
 	{ .compatible = "ti,dm6441-spi" },
+	{ .compatible = "ti,da830-spi" },
 	{ }
 };
 

commit a668abfcdb34b92da3d30b972df5649cde9511fc
Author: Suresh Gupta <suresh.gupta@nxp.com>
Date:   Mon Jun 5 14:37:20 2017 +0530

    UPSTREAM: spi: fsl_qspi: Copy 16 byte aligned data in TX FIFO
    
    In some of the QSPI controller version, there must be atleast
    128bit data available in TX FIFO for any pop operation otherwise
    error bit will be set. The code will not make any behavior change
    for previous controller as the transfer data size in ipcr register
    is still the same.
    
    Patch is tested on LS1046A which do not require 16 bytes aligned and
    LS1088A which require 16 bytes aligned data in TX FIFO
    
    Change-Id: I87e05aa2d038997a6681d664605c0de9ca6d51bd
    Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
    Signed-off-by: Anupam Kumar <anupam.kumar_1@nxp.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 10509987285515b0a969c39ef7374fea3545851b)

diff --git a/drivers/spi/fsl_qspi.c b/drivers/spi/fsl_qspi.c
index 3aa23b4698..eed52c15c8 100644
--- a/drivers/spi/fsl_qspi.c
+++ b/drivers/spi/fsl_qspi.c
@@ -664,22 +664,20 @@ static void qspi_op_write(struct fsl_qspi_priv *priv, u8 *txbuf, u32 len)
 	tx_size = (len > TX_BUFFER_SIZE) ?
 		TX_BUFFER_SIZE : len;
 
-	size = tx_size / 4;
-	for (i = 0; i < size; i++) {
+	size = tx_size / 16;
+	/*
+	 * There must be atleast 128bit data
+	 * available in TX FIFO for any pop operation
+	 */
+	if (tx_size % 16)
+		size++;
+	for (i = 0; i < size * 4; i++) {
 		memcpy(&data, txbuf, 4);
 		data = qspi_endian_xchg(data);
 		qspi_write32(priv->flags, &regs->tbdr, data);
 		txbuf += 4;
 	}
 
-	size = tx_size % 4;
-	if (size) {
-		data = 0;
-		memcpy(&data, txbuf, size);
-		data = qspi_endian_xchg(data);
-		qspi_write32(priv->flags, &regs->tbdr, data);
-	}
-
 	qspi_write32(priv->flags, &regs->ipcr,
 		     (seqid << QSPI_IPCR_SEQID_SHIFT) | tx_size);
 	while (qspi_read32(priv->flags, &regs->sr) & QSPI_SR_BUSY_MASK)

commit f0d9665a8872f98600dac3070805dcf869899d45
Author: Suresh Gupta <suresh.gupta@nxp.com>
Date:   Wed Aug 30 20:06:33 2017 +0530

    UPSTREAM: spi: fsl_qspi: Add controller busy check before new spi operation
    
    It is recommended to check either controller is free to take
    new spi action. The IP_ACC and AHB_ACC bits indicates that
    the controller is busy in IP or AHB mode respectively.
    And the BUSY bit indicates that controller is currently
    busy handling a transaction to an external flash device
    
    Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    (cherry picked from commit 1c631da459a82f4f82a063f5b4ff339ca5384d11)
    Change-Id: I79b786b7e24294538cf014c86658838409c29e78
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/spi/fsl_qspi.c b/drivers/spi/fsl_qspi.c
index 21d391add5..3aa23b4698 100644
--- a/drivers/spi/fsl_qspi.c
+++ b/drivers/spi/fsl_qspi.c
@@ -14,6 +14,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <watchdog.h>
+#include <wait_bit.h>
 #include "fsl_qspi.h"
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -991,7 +992,7 @@ static int fsl_qspi_probe(struct udevice *bus)
 	struct fsl_qspi_platdata *plat = dev_get_platdata(bus);
 	struct fsl_qspi_priv *priv = dev_get_priv(bus);
 	struct dm_spi_bus *dm_spi_bus;
-	int i;
+	int i, ret;
 
 	dm_spi_bus = bus->uclass_priv;
 
@@ -1168,6 +1169,7 @@ static int fsl_qspi_claim_bus(struct udevice *dev)
 	struct fsl_qspi_priv *priv;
 	struct udevice *bus;
 	struct dm_spi_slave_platdata *slave_plat = dev_get_parent_platdata(dev);
+	int ret;
 
 	bus = dev->parent;
 	priv = dev_get_priv(bus);
diff --git a/drivers/spi/fsl_qspi.h b/drivers/spi/fsl_qspi.h
index 6cb361018b..e468eb2529 100644
--- a/drivers/spi/fsl_qspi.h
+++ b/drivers/spi/fsl_qspi.h
@@ -105,6 +105,10 @@ struct fsl_qspi_regs {
 #define QSPI_RBCT_RXBRD_SHIFT		8
 #define QSPI_RBCT_RXBRD_USEIPS		(1 << QSPI_RBCT_RXBRD_SHIFT)
 
+#define QSPI_SR_AHB_ACC_SHIFT		2
+#define QSPI_SR_AHB_ACC_MASK		(1 << QSPI_SR_AHB_ACC_SHIFT)
+#define QSPI_SR_IP_ACC_SHIFT		1
+#define QSPI_SR_IP_ACC_MASK		(1 << QSPI_SR_IP_ACC_SHIFT)
 #define QSPI_SR_BUSY_SHIFT		0
 #define QSPI_SR_BUSY_MASK		(1 << QSPI_SR_BUSY_SHIFT)
 

commit abdcd79a4cfa48197b1ddb81bc6dfafffdc50b6f
Author: Peng Fan <peng.fan@nxp.com>
Date:   Wed Aug 9 13:09:33 2017 +0800

    UPSTREAM: spi: mxc_spi: support driver model
    
    Add driver model support for mxc spi driver.
    Most functions are restructured to be reused by DM and non-DM.
    Tested on mx6slevk/mx6qsabresd board.
    
    Change-Id: Idb04e59b28f570b161aa75216748ebda0ed6d9ac
    Signed-off-by: Peng Fan <peng.fan@nxp.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Reviewed-by: Stefano Babic <sbabic@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 994266bdff7903279b8e43ddbf220b04a4e1411f)

diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c
index e1562c36b7..41f0cfcd6b 100644
--- a/drivers/spi/mxc_spi.c
+++ b/drivers/spi/mxc_spi.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <dm.h>
 #include <malloc.h>
 #include <spi.h>
 #include <linux/errno.h>
@@ -14,6 +15,8 @@
 #include <asm/arch/clock.h>
 #include <asm/mach-imx/spi.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #ifdef CONFIG_MX27
 /* i.MX27 has a completely wrong register layout and register definitions in the
  * datasheet, the correct one is in the Freescale's Linux driver */
@@ -22,10 +25,6 @@
 "See linux mxc_spi driver from Freescale for details."
 #endif
 
-static unsigned long spi_bases[] = {
-	MXC_SPI_BASE_ADDRESSES
-};
-
 __weak int board_spi_cs_gpio(unsigned bus, unsigned cs)
 {
 	return -1;
@@ -51,6 +50,7 @@ struct mxc_spi_slave {
 	int		ss_pol;
 	unsigned int	max_hz;
 	unsigned int	mode;
+	struct gpio_desc ss;
 };
 
 static inline struct mxc_spi_slave *to_mxc_spi_slave(struct spi_slave *slave)
@@ -58,19 +58,24 @@ static inline struct mxc_spi_slave *to_mxc_spi_slave(struct spi_slave *slave)
 	return container_of(slave, struct mxc_spi_slave, slave);
 }
 
-void spi_cs_activate(struct spi_slave *slave)
+static void mxc_spi_cs_activate(struct mxc_spi_slave *mxcs)
 {
-	struct mxc_spi_slave *mxcs = to_mxc_spi_slave(slave);
-	if (mxcs->gpio > 0)
-		gpio_set_value(mxcs->gpio, mxcs->ss_pol);
+	if (CONFIG_IS_ENABLED(DM_SPI)) {
+		dm_gpio_set_value(&mxcs->ss, mxcs->ss_pol);
+	} else {
+		if (mxcs->gpio > 0)
+			gpio_set_value(mxcs->gpio, mxcs->ss_pol);
+	}
 }
 
-void spi_cs_deactivate(struct spi_slave *slave)
+static void mxc_spi_cs_deactivate(struct mxc_spi_slave *mxcs)
 {
-	struct mxc_spi_slave *mxcs = to_mxc_spi_slave(slave);
-	if (mxcs->gpio > 0)
-		gpio_set_value(mxcs->gpio,
-			      !(mxcs->ss_pol));
+	if (CONFIG_IS_ENABLED(DM_SPI)) {
+		dm_gpio_set_value(&mxcs->ss, !(mxcs->ss_pol));
+	} else {
+		if (mxcs->gpio > 0)
+			gpio_set_value(mxcs->gpio, !(mxcs->ss_pol));
+	}
 }
 
 u32 get_cspi_div(u32 div)
@@ -211,10 +216,9 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs)
 }
 #endif
 
-int spi_xchg_single(struct spi_slave *slave, unsigned int bitlen,
+int spi_xchg_single(struct mxc_spi_slave *mxcs, unsigned int bitlen,
 	const u8 *dout, u8 *din, unsigned long flags)
 {
-	struct mxc_spi_slave *mxcs = to_mxc_spi_slave(slave);
 	int nbytes = DIV_ROUND_UP(bitlen, 8);
 	u32 data, cnt, i;
 	struct cspi_regs *regs = (struct cspi_regs *)mxcs->base;
@@ -327,8 +331,9 @@ int spi_xchg_single(struct spi_slave *slave, unsigned int bitlen,
 
 }
 
-int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
-		void *din, unsigned long flags)
+static int mxc_spi_xfer_internal(struct mxc_spi_slave *mxcs,
+				 unsigned int bitlen, const void *dout,
+				 void *din, unsigned long flags)
 {
 	int n_bytes = DIV_ROUND_UP(bitlen, 8);
 	int n_bits;
@@ -337,11 +342,11 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
 	u8 *p_outbuf = (u8 *)dout;
 	u8 *p_inbuf = (u8 *)din;
 
-	if (!slave)
-		return -1;
+	if (!mxcs)
+		return -EINVAL;
 
 	if (flags & SPI_XFER_BEGIN)
-		spi_cs_activate(slave);
+		mxc_spi_cs_activate(mxcs);
 
 	while (n_bytes > 0) {
 		if (n_bytes < MAX_SPI_BYTES)
@@ -351,7 +356,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
 
 		n_bits = blk_size * 8;
 
-		ret = spi_xchg_single(slave, n_bits, p_outbuf, p_inbuf, 0);
+		ret = spi_xchg_single(mxcs, n_bits, p_outbuf, p_inbuf, 0);
 
 		if (ret)
 			return ret;
@@ -363,12 +368,39 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
 	}
 
 	if (flags & SPI_XFER_END) {
-		spi_cs_deactivate(slave);
+		mxc_spi_cs_deactivate(mxcs);
 	}
 
 	return 0;
 }
 
+static int mxc_spi_claim_bus_internal(struct mxc_spi_slave *mxcs, int cs)
+{
+	struct cspi_regs *regs = (struct cspi_regs *)mxcs->base;
+	int ret;
+
+	reg_write(&regs->rxdata, 1);
+	udelay(1);
+	ret = spi_cfg_mxc(mxcs, cs);
+	if (ret) {
+		printf("mxc_spi: cannot setup SPI controller\n");
+		return ret;
+	}
+	reg_write(&regs->period, MXC_CSPIPERIOD_32KHZ);
+	reg_write(&regs->intr, 0);
+
+	return 0;
+}
+
+#ifndef CONFIG_DM_SPI
+int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
+		void *din, unsigned long flags)
+{
+	struct mxc_spi_slave *mxcs = to_mxc_spi_slave(slave);
+
+	return mxc_spi_xfer_internal(mxcs, bitlen, dout, din, flags);
+}
+
 void spi_init(void)
 {
 }
@@ -390,6 +422,7 @@ static int setup_cs_gpio(struct mxc_spi_slave *mxcs,
 	if (mxcs->gpio == -1)
 		return 0;
 
+	gpio_request(mxcs->gpio, "spi-cs");
 	ret = gpio_direction_output(mxcs->gpio, !(mxcs->ss_pol));
 	if (ret) {
 		printf("mxc_spi: cannot setup gpio %d\n", mxcs->gpio);
@@ -399,6 +432,10 @@ static int setup_cs_gpio(struct mxc_spi_slave *mxcs,
 	return 0;
 }
 
+static unsigned long spi_bases[] = {
+	MXC_SPI_BASE_ADDRESSES
+};
+
 struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
 			unsigned int max_hz, unsigned int mode)
 {
@@ -443,24 +480,104 @@ void spi_free_slave(struct spi_slave *slave)
 
 int spi_claim_bus(struct spi_slave *slave)
 {
-	int ret;
 	struct mxc_spi_slave *mxcs = to_mxc_spi_slave(slave);
-	struct cspi_regs *regs = (struct cspi_regs *)mxcs->base;
 
-	reg_write(&regs->rxdata, 1);
-	udelay(1);
-	ret = spi_cfg_mxc(mxcs, slave->cs);
+	return mxc_spi_claim_bus_internal(mxcs, slave->cs);
+}
+
+void spi_release_bus(struct spi_slave *slave)
+{
+	/* TODO: Shut the controller down */
+}
+#else
+
+static int mxc_spi_probe(struct udevice *bus)
+{
+	struct mxc_spi_slave *plat = bus->platdata;
+	struct mxc_spi_slave *mxcs = dev_get_platdata(bus);
+	int node = dev_of_offset(bus);
+	const void *blob = gd->fdt_blob;
+	int ret;
+
+	if (gpio_request_by_name(bus, "cs-gpios", 0, &plat->ss,
+				 GPIOD_IS_OUT)) {
+		dev_err(bus, "No cs-gpios property\n");
+		return -EINVAL;
+	}
+
+	plat->base = dev_get_addr(bus);
+	if (plat->base == FDT_ADDR_T_NONE)
+		return -ENODEV;
+
+	ret = dm_gpio_set_value(&plat->ss, !(mxcs->ss_pol));
 	if (ret) {
-		printf("mxc_spi: cannot setup SPI controller\n");
+		dev_err(bus, "Setting cs error\n");
 		return ret;
 	}
-	reg_write(&regs->period, MXC_CSPIPERIOD_32KHZ);
-	reg_write(&regs->intr, 0);
+
+	mxcs->max_hz = fdtdec_get_int(blob, node, "spi-max-frequency",
+				      20000000);
 
 	return 0;
 }
 
-void spi_release_bus(struct spi_slave *slave)
+static int mxc_spi_xfer(struct udevice *dev, unsigned int bitlen,
+		const void *dout, void *din, unsigned long flags)
 {
-	/* TODO: Shut the controller down */
+	struct mxc_spi_slave *mxcs = dev_get_platdata(dev->parent);
+
+
+	return mxc_spi_xfer_internal(mxcs, bitlen, dout, din, flags);
+}
+
+static int mxc_spi_claim_bus(struct udevice *dev)
+{
+	struct mxc_spi_slave *mxcs = dev_get_platdata(dev->parent);
+	struct dm_spi_slave_platdata *slave_plat = dev_get_parent_platdata(dev);
+
+	return mxc_spi_claim_bus_internal(mxcs, slave_plat->cs);
 }
+
+static int mxc_spi_release_bus(struct udevice *dev)
+{
+	return 0;
+}
+
+static int mxc_spi_set_speed(struct udevice *bus, uint speed)
+{
+	/* Nothing to do */
+	return 0;
+}
+
+static int mxc_spi_set_mode(struct udevice *bus, uint mode)
+{
+	struct mxc_spi_slave *mxcs = dev_get_platdata(bus);
+
+	mxcs->mode = mode;
+	mxcs->ss_pol = (mode & SPI_CS_HIGH) ? 1 : 0;
+
+	return 0;
+}
+
+static const struct dm_spi_ops mxc_spi_ops = {
+	.claim_bus	= mxc_spi_claim_bus,
+	.release_bus	= mxc_spi_release_bus,
+	.xfer		= mxc_spi_xfer,
+	.set_speed	= mxc_spi_set_speed,
+	.set_mode	= mxc_spi_set_mode,
+};
+
+static const struct udevice_id mxc_spi_ids[] = {
+	{ .compatible = "fsl,imx51-ecspi" },
+	{ }
+};
+
+U_BOOT_DRIVER(mxc_spi) = {
+	.name	= "mxc_spi",
+	.id	= UCLASS_SPI,
+	.of_match = mxc_spi_ids,
+	.ops	= &mxc_spi_ops,
+	.platdata_auto_alloc_size = sizeof(struct mxc_spi_slave),
+	.probe	= mxc_spi_probe,
+};
+#endif

commit 24456af2b515ee7baf806281df2b68e10ff05068
Author: rick <rick@andestech.com>
Date:   Mon Aug 28 15:08:01 2017 +0800

    UPSTREAM: nds32: spi: Support spi dm driver.
    
    Support spi driver and can detect MX25U1635E flash on AE3XX board.
    
    Verification:
    
    sf probe 0:0 50000000 0
    spi_flash_std_probe(sf_Probr.c)
            spi_flash_probe_slave(sf_Probr.c)
            SF: Detected mx25u1635e with page size 256 Bytes, erase size 4 KiB, total 2 MiB
            NDS32 # sf test 0x100000 0x1000
            SPI flash test:
            0 erase: 34 ticks, 117 KiB/s 0.936 Mbps
            1 check: 15 ticks, 266 KiB/s 2.128 Mbps
            2 write: 21 ticks, 190 KiB/s 1.520 Mbps
            3 read: 11 ticks, 363 KiB/s 2.904 Mbps
            Test passed
            0 erase: 34 ticks, 117 KiB/s 0.936 Mbps
            1 check: 15 ticks, 266 KiB/s 2.128 Mbps
            2 write: 21 ticks, 190 KiB/s 1.520 Mbps
            3 read: 11 ticks, 363 KiB/s 2.904 Mbps
    
    Change-Id: I40c6ea1857c58cffca3a89d53bd3593ad87a0bbe
    Signed-off-by: rick <rick@andestech.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 7155cd2e6e7824ab60fbfc755d546d45b1d15e7b)

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 4fe4a9409d..59075f1ea3 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -225,6 +225,13 @@ config FSL_QSPI
 	  used to access the SPI NOR flash on platforms embedding this
 	  Freescale IP core.
 
+config NDS_AE3XX_SPI
+	bool "Andestech AE3XX SPI driver"
+	help
+	  Enable the Andestech AE3XX SPI driver. This driver can be
+	  used to access the SPI flash on platforms embedding this
+	  Andestech IP core.
+
 config TI_QSPI
 	bool "TI QSPI driver"
 	help
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 8db9b3512c..5921fe6c38 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -36,6 +36,7 @@ obj-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o
 obj-$(CONFIG_MVEBU_A3700_SPI) += mvebu_a3700_spi.o
 obj-$(CONFIG_MXC_SPI) += mxc_spi.o
 obj-$(CONFIG_MXS_SPI) += mxs_spi.o
+obj-$(CONFIG_NDS_AE3XX_SPI) += nds_ae3xx_spi.o
 obj-$(CONFIG_OMAP3_SPI) += omap3_spi.o
 obj-$(CONFIG_PIC32_SPI) += pic32_spi.o
 obj-$(CONFIG_ROCKCHIP_SPI) += rk_spi.o
diff --git a/drivers/spi/nds_ae3xx_spi.c b/drivers/spi/nds_ae3xx_spi.c
new file mode 100644
index 0000000000..f5bd99a605
--- /dev/null
+++ b/drivers/spi/nds_ae3xx_spi.c
@@ -0,0 +1,499 @@
+/*
+ * NDS SPI controller driver.
+ *
+ * Copyright 2017 Andes Technology, Inc.
+ * Author: Rick Chen (rick@andestech.com)
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <clk.h>
+#include <common.h>
+#include <malloc.h>
+#include <spi.h>
+#include <asm/io.h>
+#include <dm.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define MAX_TRANSFER_LEN	512
+#define CHUNK_SIZE		1
+#define SPI_TIMEOUT		0x100000
+#define SPI0_BUS		0
+#define SPI1_BUS		1
+#define SPI0_BASE		0xf0b00000
+#define SPI1_BASE		0xf0f00000
+#define NSPI_MAX_CS_NUM		1
+
+struct ae3xx_spi_regs {
+	u32	rev;
+	u32	reserve1[3];
+	u32	format;		/* 0x10 */
+#define DATA_LENGTH(x)	((x-1)<<8)
+	u32	pio;
+	u32	reserve2[2];
+	u32	tctrl;		/* 0x20 */
+#define TRAMODE_OFFSET	24
+#define TRAMODE_MASK	(0x0F<<TRAMODE_OFFSET)
+#define TRAMODE_WR_SYNC	(0<<TRAMODE_OFFSET)
+#define TRAMODE_WO	(1<<TRAMODE_OFFSET)
+#define TRAMODE_RO	(2<<TRAMODE_OFFSET)
+#define TRAMODE_WR	(3<<TRAMODE_OFFSET)
+#define TRAMODE_RW	(4<<TRAMODE_OFFSET)
+#define TRAMODE_WDR	(5<<TRAMODE_OFFSET)
+#define TRAMODE_RDW	(6<<TRAMODE_OFFSET)
+#define TRAMODE_NONE	(7<<TRAMODE_OFFSET)
+#define TRAMODE_DW	(8<<TRAMODE_OFFSET)
+#define TRAMODE_DR	(9<<TRAMODE_OFFSET)
+#define WCNT_OFFSET	12
+#define WCNT_MASK	(0x1FF<<WCNT_OFFSET)
+#define RCNT_OFFSET	0
+#define RCNT_MASK	(0x1FF<<RCNT_OFFSET)
+	u32	cmd;
+	u32	addr;
+	u32	data;
+	u32	ctrl;		/* 0x30 */
+#define TXFTH_OFFSET	16
+#define RXFTH_OFFSET	8
+#define TXDMAEN		(1<<4)
+#define RXDMAEN		(1<<3)
+#define TXFRST		(1<<2)
+#define RXFRST		(1<<1)
+#define SPIRST		(1<<0)
+	u32	status;
+#define TXFFL		(1<<23)
+#define TXEPTY		(1<<22)
+#define TXFVE_MASK	(0x1F<<16)
+#define RXFEM		(1<<14)
+#define RXFVE_OFFSET	(8)
+#define RXFVE_MASK	(0x1F<<RXFVE_OFFSET)
+#define SPIBSY		(1<<0)
+	u32	inten;
+	u32	intsta;
+	u32	timing;		/* 0x40 */
+#define SCLK_DIV_MASK	0xFF
+};
+
+struct nds_spi_slave {
+#ifndef CONFIG_DM_SPI
+	struct spi_slave slave;
+#endif
+	volatile struct ae3xx_spi_regs *regs;
+	int		to;
+	unsigned int	freq;
+	ulong		clock;
+	unsigned int	mode;
+	u8 		num_cs;
+	unsigned int	mtiming;
+	size_t		cmd_len;
+	u8		cmd_buf[16];
+	size_t		data_len;
+	size_t		tran_len;
+	u8		*din;
+	u8		*dout;
+	unsigned int    max_transfer_length;
+};
+
+static int __ae3xx_spi_set_speed(struct nds_spi_slave *ns)
+{
+	u32 tm;
+	u8 div;
+	tm = ns->regs->timing;
+	tm &= ~SCLK_DIV_MASK;
+
+	if(ns->freq >= ns->clock)
+		div =0xff;
+	else{
+		for (div = 0; div < 0xff; div++) {
+			if (ns->freq >= ns->clock / (2 * (div + 1)))
+				break;
+		}
+	}
+
+	tm |= div;
+	ns->regs->timing = tm;
+
+	return 0;
+
+}
+
+static int __ae3xx_spi_claim_bus(struct nds_spi_slave *ns)
+{
+		unsigned int format=0;
+		ns->regs->ctrl |= (TXFRST|RXFRST|SPIRST);
+		while((ns->regs->ctrl &(TXFRST|RXFRST|SPIRST))&&(ns->to--))
+			if(!ns->to)
+				return -EINVAL;
+
+		ns->cmd_len = 0;
+		format = ns->mode|DATA_LENGTH(8);
+		ns->regs->format = format;
+		__ae3xx_spi_set_speed(ns);
+
+		return 0;
+}
+
+static int __ae3xx_spi_release_bus(struct nds_spi_slave *ns)
+{
+	/* do nothing */
+	return 0;
+}
+
+static int __ae3xx_spi_start(struct nds_spi_slave *ns)
+{
+	int i,olen=0;
+	int tc = ns->regs->tctrl;
+
+	tc &= ~(WCNT_MASK|RCNT_MASK|TRAMODE_MASK);
+	if ((ns->din)&&(ns->cmd_len))
+		tc |= TRAMODE_WR;
+	else if (ns->din)
+		tc |= TRAMODE_RO;
+	else
+		tc |= TRAMODE_WO;
+
+	if(ns->dout)
+		olen = ns->tran_len;
+	tc |= (ns->cmd_len+olen-1) << WCNT_OFFSET;
+
+	if(ns->din)
+		tc |= (ns->tran_len-1) << RCNT_OFFSET;
+
+	ns->regs->tctrl = tc;
+	ns->regs->cmd = 1;
+
+	for (i=0;i<ns->cmd_len;i++)
+		ns->regs->data = ns->cmd_buf[i];
+
+	return 0;
+}
+
+static int __ae3xx_spi_stop(struct nds_spi_slave *ns)
+{
+	ns->regs->timing = ns->mtiming;
+	while ((ns->regs->status & SPIBSY)&&(ns->to--))
+		if (!ns->to)
+			return -EINVAL;
+
+	return 0;
+}
+
+static void __nspi_espi_tx(struct nds_spi_slave *ns, const void *dout)
+{
+	ns->regs->data = *(u8 *)dout;
+}
+
+static int __nspi_espi_rx(struct nds_spi_slave *ns, void *din, unsigned int bytes)
+{
+	*(u8 *)din = ns->regs->data;
+	return bytes;
+}
+
+
+static int __ae3xx_spi_xfer(struct nds_spi_slave *ns,
+		unsigned int bitlen,  const void *data_out, void *data_in,
+		unsigned long flags)
+{
+		unsigned int event, rx_bytes;
+		const void *dout = NULL;
+		void *din = NULL;
+		int num_blks, num_chunks, max_tran_len, tran_len;
+		int num_bytes;
+		u8 *cmd_buf = ns->cmd_buf;
+		size_t cmd_len = ns->cmd_len;
+		size_t data_len = bitlen / 8;
+		int rf_cnt;
+		int ret = 0;
+
+		max_tran_len = ns->max_transfer_length;
+		switch (flags) {
+		case SPI_XFER_BEGIN:
+			cmd_len = ns->cmd_len = data_len;
+			memcpy(cmd_buf, data_out, cmd_len);
+			return 0;
+
+		case 0:
+		case SPI_XFER_END:
+			if (bitlen == 0) {
+				return 0;
+			}
+			ns->data_len = data_len;
+			ns->din = (u8 *)data_in;
+			ns->dout = (u8 *)data_out;
+			break;
+
+		case SPI_XFER_BEGIN | SPI_XFER_END:
+			ns->data_len = 0;
+			ns->din = 0;
+			ns->dout = 0;
+			cmd_len = ns->cmd_len = data_len;
+			memcpy(cmd_buf, data_out, cmd_len);
+			data_out = 0;
+			data_len = 0;
+			__ae3xx_spi_start(ns);
+			break;
+		}
+		debug("spi_xfer: data_out %08X(%p) data_in %08X(%p) data_len %u\n",
+		      *(uint *)data_out, data_out, *(uint *)data_in, data_in, data_len);
+		num_chunks = DIV_ROUND_UP(data_len, max_tran_len);
+		din = data_in;
+		dout = data_out;
+		while (num_chunks--) {
+			tran_len = min(data_len, (size_t)max_tran_len);
+			ns->tran_len = tran_len;
+			num_blks = DIV_ROUND_UP(tran_len , CHUNK_SIZE);
+			num_bytes = (tran_len) % CHUNK_SIZE;
+			if(num_bytes == 0)
+				num_bytes = CHUNK_SIZE;
+			__ae3xx_spi_start(ns);
+
+			while (num_blks) {
+				event = in_le32(&ns->regs->status);
+				if ((event & TXEPTY) && (data_out)) {
+					__nspi_espi_tx(ns, dout);
+					num_blks -= CHUNK_SIZE;
+					dout += CHUNK_SIZE;
+				}
+
+				if ((event & RXFVE_MASK) && (data_in)) {
+					rf_cnt = ((event & RXFVE_MASK)>> RXFVE_OFFSET);
+					if (rf_cnt >= CHUNK_SIZE)
+						rx_bytes = CHUNK_SIZE;
+					else if (num_blks == 1 && rf_cnt == num_bytes)
+						rx_bytes = num_bytes;
+					else
+						continue;
+
+					if (__nspi_espi_rx(ns, din, rx_bytes) == rx_bytes) {
+						num_blks -= CHUNK_SIZE;
+						din = (unsigned char *)din + rx_bytes;
+					}
+				}
+			}
+
+			data_len -= tran_len;
+			if(data_len)
+			{
+				ns->cmd_buf[1] += ((tran_len>>16)&0xff);
+				ns->cmd_buf[2] += ((tran_len>>8)&0xff);
+				ns->cmd_buf[3] += ((tran_len)&0xff);
+				ns->data_len = data_len;
+			}
+			ret = __ae3xx_spi_stop(ns);
+		}
+		ret = __ae3xx_spi_stop(ns);
+
+		return ret;
+}
+
+#ifndef CONFIG_DM_SPI
+#define to_nds_spi_slave(s) container_of(s, struct nds_spi_slave, slave)
+struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
+		unsigned int max_hz, unsigned int mode)
+{
+	struct nds_spi_slave *ns;
+
+	if (!spi_cs_is_valid(bus, cs))
+		return NULL;
+
+	ns = spi_alloc_slave(struct nds_spi_slave, bus, cs);
+
+	switch (bus) {
+	case SPI0_BUS:
+			ns->regs = (struct ae3xx_spi_regs *)SPI0_BASE;
+			break;
+
+		case SPI1_BUS:
+			ns->regs = (struct ae3xx_spi_regs *)SPI1_BASE;
+			break;
+
+		default:
+			return NULL;
+	}
+
+	ns->freq= max_hz;
+	ns->mode = mode;
+	ns->to = SPI_TIMEOUT;
+	ns->max_transfer_length = MAX_TRANSFER_LEN;
+	ns->slave.max_write_size = MAX_TRANSFER_LEN;
+	if (!ns)
+		return NULL;
+
+	return &ns->slave;
+}
+
+void spi_free_slave(struct spi_slave *slave)
+{
+	struct nds_spi_slave *ns = to_nds_spi_slave(slave);
+	free(ns);
+}
+
+void spi_init(void)
+{
+	/* do nothing */
+}
+
+int spi_claim_bus(struct spi_slave *slave)
+{
+	struct nds_spi_slave *ns = to_nds_spi_slave(slave);
+	return __ae3xx_spi_claim_bus(ns);
+}
+
+void spi_release_bus(struct spi_slave *slave)
+{
+	struct nds_spi_slave *ns = to_nds_spi_slave(slave);
+	__ae3xx_spi_release_bus(ns);
+}
+
+int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *data_out,
+		void *data_in, unsigned long flags)
+{
+	struct nds_spi_slave *ns = to_nds_spi_slave(slave);
+	return __ae3xx_spi_xfer(ns, bitlen, data_out, data_in, flags);
+}
+
+int spi_cs_is_valid(unsigned int bus, unsigned int cs)
+{
+	return bus == 0 && cs < NSPI_MAX_CS_NUM;
+}
+
+void spi_cs_activate(struct spi_slave *slave)
+{
+	struct nds_spi_slave *ns = to_nds_spi_slave(slave);
+	__ae3xx_spi_start(ns);
+}
+
+void spi_cs_deactivate(struct spi_slave *slave)
+{
+	struct nds_spi_slave *ns = to_nds_spi_slave(slave);
+	__ae3xx_spi_stop(ns);
+}
+#else
+static int ae3xx_spi_set_speed(struct udevice *bus, uint max_hz)
+{
+	struct nds_spi_slave *ns = dev_get_priv(bus);
+
+	debug("%s speed %u\n", __func__, max_hz);
+
+	ns->freq = max_hz;
+	__ae3xx_spi_set_speed(ns);
+
+	return 0;
+}
+
+static int ae3xx_spi_set_mode(struct udevice *bus, uint mode)
+{
+	struct nds_spi_slave *ns = dev_get_priv(bus);
+
+	debug("%s mode %u\n", __func__, mode);
+	ns->mode = mode;
+
+	return 0;
+}
+
+static int ae3xx_spi_claim_bus(struct udevice *dev)
+{
+	struct dm_spi_slave_platdata *slave_plat =
+		dev_get_parent_platdata(dev);
+	struct udevice *bus = dev->parent;
+	struct nds_spi_slave *ns = dev_get_priv(bus);
+
+	if (slave_plat->cs >= ns->num_cs) {
+		printf("Invalid SPI chipselect\n");
+		return -EINVAL;
+	}
+
+	return __ae3xx_spi_claim_bus(ns);
+}
+
+static int ae3xx_spi_release_bus(struct udevice *dev)
+{
+	struct nds_spi_slave *ns = dev_get_priv(dev->parent);
+
+	return __ae3xx_spi_release_bus(ns);
+}
+
+static int ae3xx_spi_xfer(struct udevice *dev, unsigned int bitlen,
+			    const void *dout, void *din,
+			    unsigned long flags)
+{
+	struct udevice *bus = dev->parent;
+	struct nds_spi_slave *ns = dev_get_priv(bus);
+
+	return __ae3xx_spi_xfer(ns, bitlen, dout, din, flags);
+}
+
+static int ae3xx_spi_get_clk(struct udevice *bus)
+{
+	struct nds_spi_slave *ns = dev_get_priv(bus);
+	struct clk clk;
+	ulong clk_rate;
+	int ret;
+
+	ret = clk_get_by_index(bus, 0, &clk);
+	if (ret)
+		return -EINVAL;
+
+	clk_rate = clk_get_rate(&clk);
+	if (!clk_rate)
+		return -EINVAL;
+
+	ns->clock = clk_rate;
+	clk_free(&clk);
+
+	return 0;
+}
+
+static int ae3xx_spi_probe(struct udevice *bus)
+{
+	struct nds_spi_slave *ns = dev_get_priv(bus);
+
+	ns->to = SPI_TIMEOUT;
+	ns->max_transfer_length = MAX_TRANSFER_LEN;
+	ns->mtiming = ns->regs->timing;
+	ae3xx_spi_get_clk(bus);
+
+	return 0;
+}
+
+static int ae3xx_ofdata_to_platadata(struct udevice *bus)
+{
+	struct nds_spi_slave *ns = dev_get_priv(bus);
+	const void *blob = gd->fdt_blob;
+	int node = dev_of_offset(bus);
+
+	ns->regs = map_physmem(devfdt_get_addr(bus),
+				 sizeof(struct ae3xx_spi_regs),
+				 MAP_NOCACHE);
+	if (!ns->regs) {
+		printf("%s: could not map device address\n", __func__);
+		return -EINVAL;
+	}
+	ns->num_cs = fdtdec_get_int(blob, node, "num-cs", 4);
+
+	return 0;
+}
+
+static const struct dm_spi_ops ae3xx_spi_ops = {
+	.claim_bus	= ae3xx_spi_claim_bus,
+	.release_bus	= ae3xx_spi_release_bus,
+	.xfer		= ae3xx_spi_xfer,
+	.set_speed	= ae3xx_spi_set_speed,
+	.set_mode	= ae3xx_spi_set_mode,
+};
+
+static const struct udevice_id ae3xx_spi_ids[] = {
+	{ .compatible = "andestech,atcspi200" },
+	{ }
+};
+
+U_BOOT_DRIVER(ae3xx_spi) = {
+	.name = "ae3xx_spi",
+	.id = UCLASS_SPI,
+	.of_match = ae3xx_spi_ids,
+	.ops = &ae3xx_spi_ops,
+	.ofdata_to_platdata = ae3xx_ofdata_to_platadata,
+	.priv_auto_alloc_size = sizeof(struct nds_spi_slave),
+	.probe = ae3xx_spi_probe,
+};
+#endif

commit eae0a6b103228ef1c62b1a0ce1f11f7ea811f0fb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 22 14:30:31 2019 +0800

    cmd: add command "android_print_hdr" support
    
    This is useful for debug.
    
    Change-Id: I6e56255d6e32e692031c6c3226d0dc041433dd48
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/cmd/Makefile b/cmd/Makefile
index 31513c7062..353972e0a6 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -24,7 +24,7 @@ obj-$(CONFIG_CMD_BDI) += bdinfo.o
 obj-$(CONFIG_CMD_BEDBUG) += bedbug.o
 obj-$(CONFIG_CMD_BLOCK_CACHE) += blkcache.o
 obj-$(CONFIG_CMD_BMP) += bmp.o
-obj-$(CONFIG_CMD_BOOT_ANDROID) += boot_android.o
+obj-$(CONFIG_CMD_BOOT_ANDROID) += boot_android.o android.o
 obj-$(CONFIG_CMD_BOOT_ROCKCHIP) += bootrkp.o
 obj-$(CONFIG_CMD_BOOTEFI) += bootefi.o
 obj-$(CONFIG_CMD_BOOTMENU) += bootmenu.o
diff --git a/cmd/android.c b/cmd/android.c
new file mode 100644
index 0000000000..50916b2759
--- /dev/null
+++ b/cmd/android.c
@@ -0,0 +1,69 @@
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <android_image.h>
+#include <blk.h>
+#include <boot_rkimg.h>
+#include <command.h>
+#include <malloc.h>
+
+static int do_android_print_hdr(cmd_tbl_t *cmdtp, int flag,
+				int argc, char * const argv[])
+{
+	struct blk_desc *dev_desc;
+	struct andr_img_hdr *hdr;
+	disk_partition_t part_info;
+	const char *part_name;
+	int blkcnt, ret;
+
+	if (argc != 2)
+		return CMD_RET_USAGE;
+
+	part_name = argv[1];
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("dev_desc is NULL!\n");
+		return -ENODEV;
+	}
+
+	ret = part_get_info_by_name(dev_desc, part_name, &part_info);
+	if (ret < 0) {
+		printf("Failed to get \"%s\" part, ret=%d\n", part_name, ret);
+		return -ENODEV;
+	}
+
+	hdr = memalign(ARCH_DMA_MINALIGN, sizeof(*hdr));
+	if (!hdr) {
+		printf("%s: out of memory!\n", __func__);
+		return -ENOMEM;
+	}
+
+	blkcnt = sizeof(*hdr) / dev_desc->blksz;
+	ret = blk_dread(dev_desc, part_info.start, blkcnt, hdr);
+	if (ret != blkcnt) {
+		printf("Failed to read %s sector, ret=%d\n", part_info.name, ret);
+		free(hdr);
+		return -EIO;
+	}
+
+	if (!android_image_check_header(hdr)) {
+		printf("Partition \"%s\"\n", part_info.name);
+		android_print_contents(hdr);
+	} else {
+		printf("Not an android image\n");
+	}
+
+	free(hdr);
+
+	return 0;
+}
+
+U_BOOT_CMD(
+	android_print_hdr, 2, 1, do_android_print_hdr,
+	"print android image header", "<partition name>"
+);

commit acffe33271791d8e6a4ef9f23d9a0f102057ad0d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 22 14:20:25 2019 +0800

    lib: sysmem: add sysmem_alloc_by_name() interface
    
    Change-Id: I9e2fd6d99fdc487396dd9619dc54567bcd2ba242
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/sysmem.h b/include/sysmem.h
index 6f19c5754c..f6e7a2c105 100644
--- a/include/sysmem.h
+++ b/include/sysmem.h
@@ -59,6 +59,16 @@ int sysmem_initr(void);
  */
 void *sysmem_alloc(enum memblk_id id, phys_size_t size);
 
+/**
+ * sysmem_alloc_by_name() - Alloc sysmem region by name at the expect addr
+ *
+ * @name: memblk name
+ * @size: region size
+ *
+ * @return NULL on error, otherwise the allocated region address ptr
+ */
+void *sysmem_alloc_by_name(const char *name, phys_size_t size);
+
 /**
  * sysmem_alloc_base() - Alloc sysmem region at the expect addr
  *
diff --git a/lib/sysmem.c b/lib/sysmem.c
index 7d60b972a0..30b0a7a7f2 100644
--- a/lib/sysmem.c
+++ b/lib/sysmem.c
@@ -551,6 +551,21 @@ void *sysmem_alloc(enum memblk_id id, phys_size_t size)
 	return paddr;
 }
 
+void *sysmem_alloc_by_name(const char *name, phys_size_t size)
+{
+	void *paddr;
+
+	paddr = sysmem_alloc_align_base(MEMBLK_ID_BY_NAME,
+					name,
+					SYSMEM_ALLOC_ANYWHERE,
+					size,
+					SYSMEM_ALLOC_NO_ALIGN);
+	if (!paddr)
+		sysmem_dump();
+
+	return paddr;
+}
+
 void *sysmem_alloc_base(enum memblk_id id, phys_addr_t base, phys_size_t size)
 {
 	void *paddr;

commit 996752e678eedad26a72900cda9a635f97a383db
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 15 14:20:40 2019 +0800

    rockchip: memblk: update memblk attr
    
    Add M_ATTR_IGNORE_INVISIBLE for kernel memblk on RK3308-AArch32 to
    alloc kernel region within 0~1M address.
    
    Add "ramoops" alias for share memblk to avoid sysmem check warning.
    
    Add M_ATTR_KMEM_CAN_OVERLAP for some images.
    
    Change-Id: I1d7ed93a19ea22e5c69f23d75a1c1faf4e9f0104
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/memblk.c b/arch/arm/mach-rockchip/memblk.c
index d9f92a2626..73fd9bbb34 100644
--- a/arch/arm/mach-rockchip/memblk.c
+++ b/arch/arm/mach-rockchip/memblk.c
@@ -7,10 +7,6 @@
 #include <memblk.h>
 
 const static struct memblk_attr plat_mem_attr[MEMBLK_ID_MAX] = {
-	[MEMBLK_ID_DEMO]     =	{
-		.name = "DEMO",
-		.flags = M_ATTR_NONE,
-	},
 	[MEMBLK_ID_ATF]      =	{
 		.name = "ATF",
 		.flags = M_ATTR_NONE,
@@ -22,18 +18,19 @@ const static struct memblk_attr plat_mem_attr[MEMBLK_ID_MAX] = {
 	[MEMBLK_ID_SHM]      =	{
 		.name = "SHM",
 		.flags = M_ATTR_NONE,
+		.alias[0] = "ramoops",
 	},
 	[MEMBLK_ID_UBOOT]    =	{
 		.name = "U-Boot",
-		.flags = M_ATTR_OVERLAP,
+		.flags = M_ATTR_KMEM_CAN_OVERLAP,
 	},
 	[MEMBLK_ID_FASTBOOT] =	{
 		.name = "FASTBOOT",
-		.flags = M_ATTR_OVERLAP,
+		.flags = M_ATTR_KMEM_CAN_OVERLAP,
 	},
 	[MEMBLK_ID_STACK]    =	{
 		.name = "STACK",
-		.flags = M_ATTR_HOFC | M_ATTR_OVERLAP,
+		.flags = M_ATTR_HOFC | M_ATTR_KMEM_CAN_OVERLAP,
 	},
 	[MEMBLK_ID_FDT]      =	{
 		.name = "FDT",
@@ -55,19 +52,30 @@ const static struct memblk_attr plat_mem_attr[MEMBLK_ID_MAX] = {
 	},
 	[MEMBLK_ID_KERNEL]   =	{
 		.name = "KERNEL",
+/*
+ * Here is a workarund:
+ *	ATF reserves 0~1MB when kernel is aarch32 mode(follow the ATF for
+ *	aarch64 kernel, but it actually occupies 0~192KB, so we allow kernel
+ *	to alloc the region within 0~1MB address.
+ */
+#if defined(CONFIG_ROCKCHIP_RK3308) && defined(CONFIG_ARM64_BOOT_AARCH32)
+		.flags = M_ATTR_OFC | M_ATTR_IGNORE_INVISIBLE,
+#else
 		.flags = M_ATTR_OFC,
+#endif
 	},
 	[MEMBLK_ID_UNCOMP_KERNEL] = {
 		.name = "UNCOMPRESS-KERNEL",
-		.flags = M_ATTR_PEEK,
+		.flags = M_ATTR_IGNORE_INVISIBLE,
 	},
 	[MEMBLK_ID_ANDROID]  =	{
 		.name = "ANDROID",
-		.flags = M_ATTR_OFC,
+		.flags = M_ATTR_OFC | M_ATTR_KMEM_CAN_OVERLAP,
 	},
 	[MEMBLK_ID_AVB_ANDROID]  =	{
 		.name = "AVB_ANDROID",
-		.flags = M_ATTR_OFC | M_ATTR_CACHELINE_ALIGN,
+		.flags = M_ATTR_OFC | M_ATTR_CACHELINE_ALIGN |
+			 M_ATTR_KMEM_CAN_OVERLAP,
 	},
 };
 

commit 50226c8f956b13577b22fb21175ebd0cdcf0b7ae
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 15 14:17:51 2019 +0800

    lib: sysmem: optimise alloc policy
    
    - Allow request region alloc within the first invisiable region reserved by
      bidram when request region has flags M_ATTR_IGNORE_INVISIBLE. This is a
      workaround for some firmware memory layout, eg: on RK3308-AArch32, the ATF
      region is 0~1M(same as RK3308-AArch64), but the kernel would like to alloc
      at 0x00058000.
    
    - Always make kernel reserved-memory alloc successfully and check overlap
      with invisible and sysmem allocated regions in sysmem_overflow_check()
      before bootm. This makes alloc policy more easier.
    
    Change-Id: I533c710a6e69bd930befda441b9ec64415e3f408
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/memblk.h b/include/memblk.h
index eccfbcd508..15accdb17b 100644
--- a/include/memblk.h
+++ b/include/memblk.h
@@ -6,6 +6,8 @@
 #ifndef _MEMBLK_H
 #define _MEMBLK_H
 
+#define ALIAS_COUNT_MAX		2
+
 enum memblk_id {
 	MEMBLK_ID_UNK,
 
@@ -31,20 +33,21 @@ enum memblk_id {
 
 	/* Other */
 	MEMBLK_ID_BY_NAME,
-	MEMBLK_ID_FDT_RESV,
+	MEMBLK_ID_KMEM_RESERVED,
 	MEMBLK_ID_DEMO,
 	MEMBLK_ID_MAX,
 };
 
 struct memblk_attr {
 	const char *name;
-	const char *alias[2];
+	const char *alias[ALIAS_COUNT_MAX];
 	u32 flags;
 };
 
 struct memblock {
 	phys_addr_t base;
 	phys_size_t size;
+	phys_addr_t orig_base;
 	struct memblk_attr attr;
 	struct list_head node;
 };
@@ -59,11 +62,18 @@ extern const struct memblk_attr *mem_attr;
 #define M_ATTR_OFC		(1 << 0)
 /* Over-Flow-Check for region Head, only for U-Boot stack */
 #define M_ATTR_HOFC		(1 << 1)
-/* Memory can be overlap by fdt reserved memory */
+/* Memory can be overlap by fdt reserved memory, deprecated */
 #define M_ATTR_OVERLAP		(1 << 2)
-/* Just peek, always return success */
+/* Just peek, always return success, deprecated */
 #define M_ATTR_PEEK		(1 << 3)
 /* The region start address should be aligned to cacheline size */
 #define M_ATTR_CACHELINE_ALIGN	(1 << 4)
+/* Kernel 'reserved-memory' */
+#define M_ATTR_KMEM_RESERVED	(1 << 5)
+/* The region can be overlap by kernel 'reserved-memory' */
+#define M_ATTR_KMEM_CAN_OVERLAP	(1 << 6)
+/* Ignore invisable region reserved by bidram */
+#define M_ATTR_IGNORE_INVISIBLE	(1 << 7)
+
 
 #endif /* _MEMBLK_H */
diff --git a/include/sysmem.h b/include/sysmem.h
index 6c869746b3..6f19c5754c 100644
--- a/include/sysmem.h
+++ b/include/sysmem.h
@@ -20,7 +20,9 @@
 struct sysmem {
 	struct lmb lmb;
 	struct list_head allocated_head;
+	struct list_head kmem_resv_head;
 	ulong allocated_cnt;
+	ulong kmem_resv_cnt;
 	bool has_initf;
 	bool has_initr;
 };
diff --git a/lib/sysmem.c b/lib/sysmem.c
index 76ef3b280a..7d60b972a0 100644
--- a/lib/sysmem.c
+++ b/lib/sysmem.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <bidram.h>
 #include <sysmem.h>
 #include <lmb.h>
 #include <malloc.h>
@@ -38,6 +39,22 @@ bool sysmem_has_init(void)
 	       plat_sysmem.has_initr : plat_sysmem.has_initf;
 }
 
+static inline int sysmem_is_overlap(phys_addr_t base1, phys_size_t size1,
+				    phys_addr_t base2, phys_size_t size2)
+{
+	return ((base1 < (base2 + size2)) && (base2 < (base1 + size1)));
+}
+
+static inline int sysmem_is_sub_region(struct memblock *sub,
+				       struct memblock *main)
+{
+	if (!sub || !main)
+		return false;
+
+	return ((sub->base >= main->base) &&
+		(sub->base + sub->size <= main->base + main->size));
+}
+
 void sysmem_dump(void)
 {
 	struct sysmem *sysmem = &plat_sysmem;
@@ -89,16 +106,37 @@ void sysmem_dump(void)
 			overflow = false;
 		}
 
-		printf("    allocated.rgn[%ld].name  = \"%s\" %s\n",
-		       i, mem->attr.name, overflow ? "	   <Overflow!>" : "");
+		printf("    allocated.rgn[%ld].name  = \"%s\" %s %s\n",
+		       i, mem->attr.name, overflow ? "	   <Overflow!>" : "",
+		       mem->orig_base != mem->base ? "<*>" : "");
+		printf("		    .addr  = 0x%08lx - 0x%08lx (size: 0x%08lx)\n",
+		       (ulong)mem->orig_base,
+		       (ulong)(mem->orig_base + mem->size),
+		       (ulong)mem->size);
+		i++;
+	}
+
+	/* Kernel 'reserved-memory' */
+	i = 0;
+	printf("\n");
+	list_for_each(node, &sysmem->kmem_resv_head) {
+		mem = list_entry(node, struct memblock, node);
+		allocated_size += mem->size;
+		printf("    kmem-resv.rgn[%ld].name  = \"%s\" %s\n",
+		       i, mem->attr.name,
+		       mem->orig_base != mem->base ? "<*>" : "");
 		printf("		    .addr  = 0x%08lx - 0x%08lx (size: 0x%08lx)\n",
-		       (ulong)mem->base, (ulong)(mem->base + mem->size),
+		       (ulong)mem->orig_base,
+		       (ulong)(mem->orig_base + mem->size),
 		       (ulong)mem->size);
 		i++;
 	}
 
-	printf("\n    malloc_r: %d MiB, malloc_f: %d KiB\n",
-	       SIZE_MB(CONFIG_SYS_MALLOC_LEN), SIZE_KB(CONFIG_SYS_MALLOC_F_LEN));
+	printf("\n    framework malloc_r     = %3d MiB",
+	       SIZE_MB(CONFIG_SYS_MALLOC_LEN));
+	printf("\n    framework malloc_f     = %3d KiB\n",
+	       SIZE_KB(CONFIG_SYS_MALLOC_F_LEN));
+
 	printf("\n    allocated.total	   = 0x%08lx (%ld MiB. %ld KiB)\n",
 	       (ulong)allocated_size,
 	       SIZE_MB((ulong)allocated_size),
@@ -109,7 +147,7 @@ void sysmem_dump(void)
 	reserved_size = 0;
 	for (i = 0; i < lmb->reserved.cnt; i++) {
 		reserved_size += lmb->reserved.region[i].size;
-		printf("    LMB.reserved[%ld].addr   = 0x%08lx - 0x%08lx (size: 0x%08lx)\n", i,
+		printf("    LMB.allocated[%ld].addr  = 0x%08lx - 0x%08lx (size: 0x%08lx)\n", i,
 		       (ulong)lmb->reserved.region[i].base,
 		       (ulong)lmb->reserved.region[i].base +
 		       (ulong)lmb->reserved.region[i].size,
@@ -126,42 +164,103 @@ void sysmem_dump(void)
 void sysmem_overflow_check(void)
 {
 	struct sysmem *sysmem = &plat_sysmem;
-	struct list_head *node;
+	struct list_head *node, *knode;
 	struct memcheck *check;
-	struct memblock *mem;
-	int overflow;
+	struct memblock *kmem;
+	struct memblock *smem;
+	struct memblock *rmem;
+	int overflow = 0, overlap = 0;
 
 	if (!sysmem_has_init())
 		return;
 
+#ifdef CONFIG_BIDRAM
+	/*
+	 * Check kernel 'reserved-memory' overlap with invisible regions
+	 *
+	 * Here, only print warning message when overlap with invisible region
+	 */
+	list_for_each(knode, &sysmem->kmem_resv_head) {
+		kmem = list_entry(knode, struct memblock, node);
+		rmem = bidram_reserved_is_overlap(kmem->base, kmem->size);
+		if (rmem) {
+			const char *alias;
+			int i, dump = 1;
+
+			/*
+			 * Ignore the sub region of invisible region.
+			 * eg: ramoops of SHM.
+			 */
+			alias = rmem->attr.alias[0];
+			if (alias && sysmem_is_sub_region(kmem, rmem)) {
+				for (i = 0; i < ALIAS_COUNT_MAX; i++, alias++) {
+					alias = rmem->attr.alias[i];
+					if (!alias)
+						continue;
+					if (!strncasecmp(kmem->attr.name, alias,
+							 strlen(alias))) {
+						dump = 0;
+						break;
+					}
+				}
+			}
+
+			if (dump)
+				SYSMEM_W("kernel 'reserved-memory' \"%s\"(0x%08lx - 0x%08lx) "
+					 "is overlap with [invisible] \"%s\" (0x%08lx - 0x%08lx)\n",
+					 kmem->attr.name, (ulong)kmem->base,
+					 (ulong)(kmem->base + kmem->size),
+					 rmem->attr.name, (ulong)rmem->base,
+					 (ulong)(rmem->base + rmem->size));
+		}
+	}
+#endif
+
 	list_for_each(node, &sysmem->allocated_head) {
-		mem = list_entry(node, struct memblock, node);
-		if (mem->attr.flags & M_ATTR_OFC) {
+		smem = list_entry(node, struct memblock, node);
+		/*
+		 * Check kernel 'reserved-memory' overlap with sysmem allocated regions
+		 */
+		list_for_each(knode, &sysmem->kmem_resv_head) {
+			kmem = list_entry(knode, struct memblock, node);
+			if (sysmem_is_overlap(smem->base, smem->size,
+					      kmem->base, kmem->size)) {
+				if (smem->attr.flags & M_ATTR_KMEM_CAN_OVERLAP)
+					continue;
+
+				overlap = 1;
+				SYSMEM_W("kernel 'reserved-memory' \"%s\"(0x%08lx - 0x%08lx) "
+					 "is overlap with \"%s\" (0x%08lx - 0x%08lx)\n",
+					 kmem->attr.name, (ulong)kmem->base,
+					 (ulong)(kmem->base + kmem->size),
+					 smem->attr.name, (ulong)smem->base,
+					 (ulong)(smem->base + smem->size));
+			}
+		}
+
+		/*
+		 * Check sysmem allocated regions overflow.
+		 */
+		if (smem->attr.flags & M_ATTR_OFC) {
 			check = (struct memcheck *)
-				(mem->base + mem->size - sizeof(*check));
+				(smem->base + smem->size - sizeof(*check));
 			overflow = (check->magic != SYSMEM_MAGIC);
-		} else if (mem->attr.flags & M_ATTR_HOFC) {
+		} else if (smem->attr.flags & M_ATTR_HOFC) {
 			check = (struct memcheck *)
-				(mem->base - sizeof(*check));
+				(smem->base - sizeof(*check));
 			overflow = (check->magic != SYSMEM_MAGIC);
 		} else {
 			overflow = 0;
 		}
 
-		if (overflow)
+		if (overflow) {
+			SYSMEM_E("Found there is region overflow!\n");
 			break;
+		}
 	}
 
-	if (overflow) {
-		SYSMEM_E("Found there is region overflow!\n");
+	if (overflow || overlap)
 		sysmem_dump();
-	}
-}
-
-static inline int sysmem_is_overlap(phys_addr_t base1, phys_size_t size1,
-				    phys_addr_t base2, phys_size_t size2)
-{
-	return ((base1 < (base2 + size2)) && (base2 < (base1 + size1)));
 }
 
 static int sysmem_add(phys_addr_t base, phys_size_t size)
@@ -183,7 +282,7 @@ static int sysmem_add(phys_addr_t base, phys_size_t size)
 static const char *sysmem_alias2name(const char *name, int *id)
 {
 	const char *alias;
-	int n, i, j;
+	int i, j;
 	int match = 0;
 
 	for (i = 0; i < MEMBLK_ID_MAX; i++) {
@@ -198,8 +297,8 @@ static const char *sysmem_alias2name(const char *name, int *id)
 		if (!alias)
 			continue;
 
-		n = ARRAY_SIZE(mem_attr[i].alias);
-		for (j = 0; j < n; j++, alias++) {
+		for (j = 0; j < ALIAS_COUNT_MAX; j++) {
+			alias = mem_attr[i].alias[j];
 			if (alias && !strcasecmp(alias, name)) {
 				match = 1;
 				goto finish;
@@ -231,59 +330,50 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 	phys_addr_t paddr;
 	phys_addr_t alloc_base;
 	phys_size_t alloc_size;
-	phys_addr_t bank_base;
-	phys_size_t bank_size;
-	bool req_overlap = false; /* Only for kernel reserved-memory */
-	int i;
+	phys_addr_t orig_base = base;
 
 	if (!sysmem_has_init())
 		goto out;
 
-	if (id == MEMBLK_ID_BY_NAME || id == MEMBLK_ID_FDT_RESV) {
+	if (id == MEMBLK_ID_BY_NAME || id == MEMBLK_ID_KMEM_RESERVED) {
 		if (!mem_name) {
 			SYSMEM_E("NULL name for alloc sysmem\n");
 			goto out;
-		} else if (id == MEMBLK_ID_FDT_RESV) {
-
-			/*
-			 * Allow fdt reserved memory to overlap with the region
-			 * only used in U-Boot, like: stack, fastboot, u-boot...
-			 * these regions are marked as M_ATTR_OVERLAP in flags.
-			 *
-			 * Here we check whether it overlaps with others, if
-			 * so, set req_overlap as true.
-			 */
-			for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
-				if (!gd->bd->bi_dram[i].size)
-					continue;
-
-				bank_base = gd->bd->bi_dram[i].start;
-				bank_size = gd->bd->bi_dram[i].size;
-				if (sysmem_is_overlap(base, size,
-						      bank_base, bank_size)) {
-					req_overlap = true;
-					break;
-				}
-			}
-
-			/*
-			 * If this request region is out size of all available
-			 * region, ignore and return success.
-			 */
-			if (!req_overlap)
-				return (void *)base;
 		}
 
-		/* Find name, id and attr by outer mem_name */
+		/* Find: name, id and attr by outer mem_name & id */
 		name = sysmem_alias2name(mem_name, (int *)&id);
 		attr = mem_attr[id];
 		if (!attr.name)
 			attr.name = strdup(name);
+
+		/* Always make kernel 'reserved-memory' alloc successfully */
+		if (id == MEMBLK_ID_KMEM_RESERVED) {
+			struct memblock *mem;
+
+			mem = malloc(sizeof(*mem));
+			if (!mem) {
+				SYSMEM_E("No memory for \"%s\" alloc sysmem\n", name);
+				return mem;
+			}
+
+			attr.flags |= M_ATTR_KMEM_RESERVED;
+			mem->orig_base = orig_base;
+			mem->base = base;
+			mem->size = size;
+			mem->attr = attr;
+			sysmem->kmem_resv_cnt++;
+			list_add_tail(&mem->node, &sysmem->kmem_resv_head);
+
+			return (void *)base;
+		}
 	} else if (id > MEMBLK_ID_UNK && id < MEMBLK_ID_MAX) {
 		attr = mem_attr[id];
 		name = attr.name;
 
 		/*
+		 * Special handle for Android AVB alloc(on any where)
+		 *
 		 * Fixup base and place right after U-Boot stack, adding a lot
 		 * of space(4KB) maybe safer.
 		 */
@@ -291,15 +381,25 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 		    (base == SYSMEM_ALLOC_ANYWHERE)) {
 			base = gd->start_addr_sp -
 					CONFIG_SYS_STACK_SIZE - size - 0x1000;
-		/*
-		 * So far, we use M_ATTR_PEEK for uncompress kernel alloc, and
-		 * for ARMv8 enabling AArch32 mode, the ATF is still AArch64
-		 * and ocuppies 0~1MB and shmem 1~2M. So let's ignore the region
-		 * which overlap with them.
-		 */
-		} else if (attr.flags & M_ATTR_PEEK) {
-			if (base <= gd->bd->bi_dram[0].start)
+
+		} else if (base <= gd->bd->bi_dram[0].start) {
+			/*
+			 * On Rockchip platform:
+			 *
+			 * So far, we use M_ATTR_IGNORE_INVISIBLE for uncompress
+			 * kernel alloc, and for ARMv8 enabling AArch32 mode, the
+			 * ATF is still AArch64 and ocuppies 0~1MB and shmem 1~2M.
+			 * So let's ignore the region which overlap with them.
+			 */
+			if (attr.flags & M_ATTR_IGNORE_INVISIBLE) {
 				base = gd->bd->bi_dram[0].start;
+			} else {
+				SYSMEM_E("Failed to alloc invisible sub region 0x%08lx - 0x%08lx "
+					 "of \"%s\" at 0x%08lx - 0x%08lx\n",
+					 (ulong)base, (ulong)gd->bd->bi_dram[0].start,
+					 name, (ulong)base, (ulong)(base + size));
+				goto out;
+			}
 		}
 	} else {
 		SYSMEM_E("Unsupport memblk id %d for alloc sysmem\n", id);
@@ -324,14 +424,14 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 		base -= ARCH_DMA_MINALIGN;
 	}
 
-	if (!IS_ALIGNED(base, 4)) {
+	if (base != SYSMEM_ALLOC_ANYWHERE && !IS_ALIGNED(base, 4)) {
 		SYSMEM_E("\"%s\" base=0x%08lx is not 4-byte aligned\n",
 			 name, (ulong)base);
 		goto out;
 	}
 
-	/* Must be 4-byte aligned */
-	size = ALIGN(size, 4);
+	/* Must be sizeof(long) byte aligned */
+	size = ALIGN(size, sizeof(long));
 
 	SYSMEM_D("Enter alloc: \"%s\" 0x%08lx - 0x%08lx\n",
 		 name, (ulong)base, (ulong)(base + size));
@@ -350,19 +450,6 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 			SYSMEM_E("Failed to double alloc for existence \"%s\"\n", name);
 			goto out;
 		} else if (sysmem_is_overlap(mem->base, mem->size, base, size)) {
-			/*
-			 * If this new alloc region expects overlap and the old
-			 * region is also allowed to be overlap, just do reserve.
-			 */
-			if (req_overlap && mem->attr.flags & M_ATTR_OVERLAP) {
-				if (lmb_reserve(&sysmem->lmb, base, size))
-					SYSMEM_E("Failed to overlap alloc \"%s\" "
-						 "at 0x%08lx - 0x%08lx\n",
-						 name, (ulong)base,
-						 (ulong)(base + size));
-				return (void *)base;
-			}
-
 			SYSMEM_E("\"%s\" (0x%08lx - 0x%08lx) alloc is "
 				 "overlap with existence \"%s\" (0x%08lx - "
 				 "0x%08lx)\n",
@@ -394,6 +481,8 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 				goto out;
 			}
 
+			/* Record original base for dump */
+			mem->orig_base = orig_base;
 			mem->base = paddr;
 			mem->size = alloc_size;
 			mem->attr = attr;
@@ -433,12 +522,18 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 out:
 	/*
 	 * Why: base + sizeof(ulong) ?
-	 * It's a not standard way to handle the case: the input base is 0.
+	 * It's not a standard way to handle the case: the input base is 0.
+	 * Because 0 equals NULL, but we don't want to return NULL when alloc
+	 * successfully, so just return a !NULL value is okay.
+	 *
+	 * When it happens ?
+	 * Maybe 32-bit platform would alloc region for uncompress kernel
+	 * at 0 address.
 	 */
 	if (base == 0)
 		base = base + sizeof(ulong);
 
-	return (attr.flags & M_ATTR_PEEK) ? (void *)base : NULL;
+	return (attr.flags & M_ATTR_IGNORE_INVISIBLE) ? (void *)base : NULL;
 }
 
 void *sysmem_alloc(enum memblk_id id, phys_size_t size)
@@ -492,7 +587,7 @@ void *sysmem_fdt_reserve_alloc_base(const char *name,
 {
 	void *paddr;
 
-	paddr = sysmem_alloc_align_base(MEMBLK_ID_FDT_RESV,
+	paddr = sysmem_alloc_align_base(MEMBLK_ID_KMEM_RESERVED,
 					name,
 					base,
 					size,
@@ -548,7 +643,7 @@ int sysmem_free(phys_addr_t base)
 	/* Find existence */
 	list_for_each(node, &sysmem->allocated_head) {
 		mem = list_entry(node, struct memblock, node);
-		if (mem->base == base) {
+		if (mem->base == base || mem->orig_base == base) {
 			found = 1;
 			break;
 		}
@@ -590,7 +685,10 @@ int sysmem_init(void)
 
 	lmb_init(&sysmem->lmb);
 	INIT_LIST_HEAD(&sysmem->allocated_head);
+	INIT_LIST_HEAD(&sysmem->kmem_resv_head);
 	sysmem->allocated_cnt = 0;
+	sysmem->kmem_resv_cnt = 0;
+
 	if (gd->flags & GD_FLG_RELOC) {
 		sysmem->has_initr = true;
 	} else {

commit fc7ff0f015ba9b45f5ea0356818302246b4c1d4a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 15 14:15:08 2019 +0800

    lib: bidram: add bidram_reserved_is_overlap() interface
    
    Check if the region is overlap with reserved regions.
    
    Change-Id: Ifd9b6a4438dcf954b7e48930e31d0c6cd5d1274c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/bidram.h b/include/bidram.h
index 3b39d442fd..4eb9ed9c75 100644
--- a/include/bidram.h
+++ b/include/bidram.h
@@ -64,6 +64,16 @@ int bidram_reserve_by_name(const char *name, phys_addr_t base, phys_size_t size)
  */
 void bidram_dump(void);
 
+/**
+ * bidram_reserved_is_overlap() - Check outside memory is overlap with reserved
+ *
+ * @base: region base address
+ * @size: region size
+ *
+ * @return memblk struct when overlap, otherwise NULL
+ */
+struct memblock *bidram_reserved_is_overlap(phys_addr_t base, phys_size_t size);
+
 /**
  * board_bidram_parse_fn() - Weak function for board to implement
  */
diff --git a/lib/bidram.c b/lib/bidram.c
index b6859150fd..5f6fac8a0a 100644
--- a/lib/bidram.c
+++ b/lib/bidram.c
@@ -182,6 +182,24 @@ static int bidram_is_overlap(phys_addr_t base1, phys_size_t size1,
 	return ((base1 < (base2 + size2)) && (base2 < (base1 + size1)));
 }
 
+struct memblock *bidram_reserved_is_overlap(phys_addr_t base, phys_size_t size)
+{
+	struct bidram *bidram = &plat_bidram;
+	struct list_head *node;
+	struct memblock *mem;
+
+	if (!bidram_has_init())
+		return false;
+
+	list_for_each(node, &bidram->reserved_head) {
+		mem = list_entry(node, struct memblock, node);
+		if (bidram_is_overlap(mem->base, mem->size, base, size))
+			return mem;
+	}
+
+	return NULL;
+}
+
 static int bidram_core_reserve(enum memblk_id id, const char *mem_name,
 			       phys_addr_t base, phys_size_t size)
 {

commit 351f3d38c30b78376b0b76e67d4c3dbf490746e8
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Thu Jul 18 17:22:50 2019 +0800

    configs: rk3368: Enable rk3368 hdmi
    
    Change-Id: I402c3d104f72005b19d44908ac36a72662c482d8
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>

diff --git a/configs/rk3368_defconfig b/configs/rk3368_defconfig
index bb25c3b9b8..37642aba11 100644
--- a/configs/rk3368_defconfig
+++ b/configs/rk3368_defconfig
@@ -92,6 +92,7 @@ CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_DRM_ROCKCHIP_DW_HDMI=y
 CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y

commit 19c2faf2ce4257ff31601a33c6642e82b452ad14
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Thu Jul 18 16:59:42 2019 +0800

    drm/rockchip: dw-hdmi: Fix hdmi i2c scl configuration error
    
    If ddc-i2c-scl-high-time-ns and ddc-i2c-scl-low-time-ns are not
    set in dts, scl_high_ns and scl_low_ns will set to -1. Because of
    these variables are unsigned int, misjudgment may occur when their
    values are judged.
    
    Change-Id: I8b94f7c2ab8bcb0d966182f220877f9268b7981b
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>

diff --git a/drivers/video/drm/dw_hdmi.c b/drivers/video/drm/dw_hdmi.c
index 6f1b333df3..2f8736cc65 100644
--- a/drivers/video/drm/dw_hdmi.c
+++ b/drivers/video/drm/dw_hdmi.c
@@ -2325,15 +2325,10 @@ int rockchip_dw_hdmi_init(struct display_state *state)
 	 */
 	hdmi->i2c->scl_high_ns =
 		ofnode_read_s32_default(hdmi_node,
-					"ddc-i2c-scl-high-time-ns", -1);
-	if (hdmi->i2c->scl_high_ns < 0)
-		hdmi->i2c->scl_high_ns = 4708;
-
+					"ddc-i2c-scl-high-time-ns", 4708);
 	hdmi->i2c->scl_low_ns =
 		ofnode_read_s32_default(hdmi_node,
-					"ddc-i2c-scl-low-time-ns", -1);
-	if (hdmi->i2c->scl_low_ns < 0)
-		hdmi->i2c->scl_low_ns = 4916;
+					"ddc-i2c-scl-low-time-ns", 4916);
 
 	dw_hdmi_i2c_init(hdmi);
 	conn_state->type = DRM_MODE_CONNECTOR_HDMIA;

commit 84a1bd9cfb74625224a3f40929a50a387e7dc67b
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Thu Jul 18 09:55:18 2019 +0800

    drm/rockchip: dw-hdmi: Support rk3368 hdmi
    
    Change-Id: Iaef5abee75b6e754c4884009ee4dc799277b6253
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_dw_hdmi.c b/drivers/video/drm/rockchip_dw_hdmi.c
index 52d16231db..30acb21b29 100644
--- a/drivers/video/drm/rockchip_dw_hdmi.c
+++ b/drivers/video/drm/rockchip_dw_hdmi.c
@@ -789,6 +789,14 @@ const struct dw_hdmi_plat_data rk3228_hdmi_drv_data = {
 	.dev_type   = RK3228_HDMI,
 };
 
+const struct dw_hdmi_plat_data rk3368_hdmi_drv_data = {
+	.mpll_cfg   = rockchip_mpll_cfg,
+	.cur_ctr    = rockchip_cur_ctr,
+	.phy_config = rockchip_phy_config,
+	.mpll_cfg_420 = rockchip_mpll_cfg_420,
+	.dev_type   = RK3368_HDMI,
+};
+
 const struct dw_hdmi_plat_data rk3399_hdmi_drv_data = {
 	.vop_sel_bit = 6,
 	.grf_vop_sel_reg = RK3399_GRF_SOC_CON20,
@@ -809,6 +817,11 @@ static const struct rockchip_connector rk3399_dw_hdmi_data = {
 	.data = &rk3399_hdmi_drv_data,
 };
 
+static const struct rockchip_connector rk3368_dw_hdmi_data = {
+	.funcs = &rockchip_dw_hdmi_funcs,
+	.data = &rk3368_hdmi_drv_data,
+};
+
 static const struct rockchip_connector rk3288_dw_hdmi_data = {
 	.funcs = &rockchip_dw_hdmi_funcs,
 	.data = &rk3288_hdmi_drv_data,
@@ -828,6 +841,9 @@ static const struct udevice_id rockchip_dw_hdmi_ids[] = {
 	{
 	 .compatible = "rockchip,rk3399-dw-hdmi",
 	 .data = (ulong)&rk3399_dw_hdmi_data,
+	}, {
+	 .compatible = "rockchip,rk3368-dw-hdmi",
+	 .data = (ulong)&rk3368_dw_hdmi_data,
 	}, {
 	 .compatible = "rockchip,rk3288-dw-hdmi",
 	 .data = (ulong)&rk3288_dw_hdmi_data,

commit fec5505a80eecc4a152a2ce17d530864d09229ca
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 16 15:29:49 2019 +0800

    common: board_f: set GD_FLG_DISABLE_CONSOLE early before initcall
    
    Set flags as early as possible to avoid putc() by CONFIG_DEBUG_UART.
    
    Change-Id: Ifb986397e7d94a4ab1a47c065afba3c7845c2563
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/board_f.c b/common/board_f.c
index f898e42edd..8e28147626 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -914,6 +914,10 @@ void board_init_f(ulong boot_flags)
 	gd->flags = boot_flags;
 	gd->have_console = 0;
 
+#if defined(CONFIG_DISABLE_CONSOLE)
+	gd->flags |= GD_FLG_DISABLE_CONSOLE;
+#endif
+
 	if (initcall_run_list(init_sequence_f))
 		hang();
 

commit c7abde102fd9a09792e5e1ca6a04ec497176c1a3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 16 15:16:47 2019 +0800

    common: console: support disable console in & out
    
    Set CONFIG_DISABLE_CONSOLE priority higher than CONFIG_DEBUG_UART,
    otherwise there maybe some early message is printed by CONFIG_DEBUG_UART.
    
    Change-Id: I235a49646b154e10e724e3d63e0ceecdd862c636
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/Kconfig b/common/Kconfig
index d6efe6590a..bb7cf884f3 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -255,6 +255,11 @@ config CONSOLE_DISABLE_CTRLC
 	help
 	  This disable ctrl+c when CONFIG_BOOTDELAY is 0.
 
+config DISABLE_CONSOLE
+	bool "disable console in & out"
+	help
+	 This disable console in & out.
+
 config IDENT_STRING
 	string "Board specific string to be added to uboot version string"
 	help
diff --git a/common/console.c b/common/console.c
index 1446b6268f..3e96261ad7 100644
--- a/common/console.c
+++ b/common/console.c
@@ -520,6 +520,11 @@ static inline void print_pre_console_buffer(int flushpoint) {}
 
 void putc(const char c)
 {
+#ifdef CONFIG_DISABLE_CONSOLE
+	if (!gd || gd->flags & GD_FLG_DISABLE_CONSOLE)
+		return;
+#endif
+
 #ifdef CONFIG_DEBUG_UART
 	/* if we don't have a console yet, use the debug UART */
 	if (!gd || !(gd->flags & GD_FLG_SERIAL_READY)) {
@@ -536,11 +541,6 @@ void putc(const char c)
 		return;
 #endif
 
-#ifdef CONFIG_DISABLE_CONSOLE
-	if (gd->flags & GD_FLG_DISABLE_CONSOLE)
-		return;
-#endif
-
 	if (!gd->have_console)
 		return pre_console_putc(c);
 

commit ab4c011acf48b178c2c1b4313f6f27d8be6c4bff
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 16 13:12:22 2019 +0800

    rockchip: hotkey: disable hotkey when CONFIG_CONSOLE_DISABLE_CTRLC enabled
    
    If we enable CONFIG_CONSOLE_DISABLE_CTRLC for AVB bootflow, we want to
    disable hotkey too.
    
    Change-Id: Idd542a1fa8b3b2a7d232373a767e91e49e90d9ae
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/hotkey.c b/arch/arm/mach-rockchip/hotkey.c
index 32e6b1e513..ae078d5c02 100644
--- a/arch/arm/mach-rockchip/hotkey.c
+++ b/arch/arm/mach-rockchip/hotkey.c
@@ -20,6 +20,11 @@ DECLARE_GLOBAL_DATA_PTR;
 #define CTRL_P		0x10	/* parameter(cmdline) dump */
 #define CTRL_S		0x13	/* shell(cli) */
 
+#if defined(CONFIG_CONSOLE_DISABLE_CTRLC) && \
+	defined(CONFIG_BOOTDELAY) && (CONFIG_BOOTDELAY <= 0)
+bool is_hotkey(enum hotkey_t id) { return false; }
+void hotkey_run(enum hotkey_t id) { }
+#else
 bool is_hotkey(enum hotkey_t id)
 {
 	switch (id) {
@@ -60,11 +65,6 @@ void hotkey_run(enum hotkey_t id)
 			env_update("bootargs", "initcall_debug debug");
 		break;
 	case HK_CLI:
-		/* Disable enter cli by hotkey*/
-#if defined(CONFIG_CONSOLE_DISABLE_CTRLC) && \
-    defined(CONFIG_BOOTDELAY) && (CONFIG_BOOTDELAY <= 0)
-		break;
-#endif
 		if (gd->console_evt == CTRL_S)
 			cli_loop();
 		break;
@@ -72,3 +72,4 @@ void hotkey_run(enum hotkey_t id)
 		break;
 	}
 }
+#endif

commit 8dbcccd6d4b2256a705ab35ed765cec28731010f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jul 18 15:18:04 2019 +0800

    rockchip: atags: disable set atags if it is not available
    
    We make the appoint that the other pre-loader can set atags
    only when TPL ative it(creating the valid atags header).
    
    Change-Id: I579d31e0880f35193b9c017fc83cbe0f5a25bfb3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk_atags.c b/arch/arm/mach-rockchip/rk_atags.c
index 13fec6ff4a..62075a2061 100644
--- a/arch/arm/mach-rockchip/rk_atags.c
+++ b/arch/arm/mach-rockchip/rk_atags.c
@@ -160,6 +160,11 @@ int atags_set_tag(u32 magic, void *tagdata)
 	u32 length, size = 0, hash;
 	struct tag *t = (struct tag *)ATAGS_PHYS_BASE;
 
+#ifndef CONFIG_TPL_BUILD
+	if (!atags_is_available())
+		return -EPERM;
+#endif
+
 	if (!tagdata)
 		return -ENODATA;
 
@@ -310,8 +315,6 @@ int atags_set_bootdev_by_brom_bootsource(void)
 
 	memset(&boot_dev, 0, sizeof(struct tag_bootdev));
 	boot_dev.devtype = get_bootdev_by_brom_bootsource();
-	if (!atags_is_available())
-		return -ENODATA;
 
 	return atags_set_tag(ATAG_BOOTDEV, &boot_dev);
 }

commit e8b83500806afc49b988730b41ad7e2d195c1ffa
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jul 18 14:13:48 2019 +0800

    rockchip: resource: dump android version and build time
    
    It prints like: "Android 8.1, Build 2019.7", maybe helpful
    for debugging.
    
    Change-Id: I10acbb6e8d864ae2daa2621bf9cfdf4b902a49b4
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 5fdad4412a..bf413312f2 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -249,6 +249,14 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 	}
 	ret = android_image_check_header(andr_hdr);
 	if (!ret) {
+		u32 os_ver = andr_hdr->os_version >> 11;
+		u32 os_lvl = andr_hdr->os_version & ((1U << 11) - 1);
+
+		if (os_ver)
+			printf("Android %u.%u, Build %u.%u\n",
+			       (os_ver >> 14) & 0x7F, (os_ver >> 7) & 0x7F,
+			       (os_lvl >> 4) + 2000, os_lvl & 0x0F);
+
 		debug("%s: Load resource from %s second pos\n",
 		      __func__, part_info.name);
 		/* Read resource from second offset */

commit 2208cd926b3c994781e59f25c4c1c014e2ab83e4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 16 10:48:15 2019 +0800

    rockchip: board: clean up code
    
    Change-Id: Ic4cdd4b54514a4c89f5603063ca791e9efa39193
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index f5583c8f67..5ac587dd96 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -3,66 +3,83 @@
  *
  * SPDX-License-Identifier:     GPL-2.0+
  */
+
 #include <common.h>
 #include <amp.h>
-#include <clk.h>
 #include <bidram.h>
-#include <dm.h>
+#include <clk.h>
+#include <console.h>
 #include <debug_uart.h>
+#include <dm.h>
+#include <dvfs.h>
+#include <io-domain.h>
 #include <key.h>
 #include <memblk.h>
+#include <misc.h>
+#include <of_live.h>
 #include <ram.h>
+#include <rockchip_debugger.h>
 #include <syscon.h>
 #include <sysmem.h>
+#include <video_rockchip.h>
 #include <asm/io.h>
-#include <asm/arch/vendor.h>
-#include <misc.h>
 #include <asm/gpio.h>
 #include <dm/uclass-internal.h>
+#include <dm/root.h>
+#include <power/charge_display.h>
+#include <power/regulator.h>
+#include <asm/arch/boot_mode.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/cpu.h>
-#include <asm/arch/periph.h>
-#include <asm/arch/boot_mode.h>
 #include <asm/arch/hotkey.h>
-#include <asm/arch/rk_atags.h>
 #include <asm/arch/param.h>
-#ifdef CONFIG_DM_CHARGE_DISPLAY
-#include <power/charge_display.h>
-#endif
-#ifdef CONFIG_DM_DVFS
-#include <dvfs.h>
-#endif
-#ifdef CONFIG_ROCKCHIP_IO_DOMAIN
-#include <io-domain.h>
-#endif
-#ifdef CONFIG_DM_REGULATOR
-#include <power/regulator.h>
-#endif
-#ifdef CONFIG_DRM_ROCKCHIP
-#include <video_rockchip.h>
-#endif
-#ifdef CONFIG_ROCKCHIP_DEBUGGER
-#include <rockchip_debugger.h>
-#endif
-#include <of_live.h>
-#include <dm/root.h>
-#include <console.h>
+#include <asm/arch/periph.h>
+#include <asm/arch/resource_img.h>
+#include <asm/arch/rk_atags.h>
+#include <asm/arch/vendor.h>
 
 DECLARE_GLOBAL_DATA_PTR;
-/* define serialno max length, the max length is 512 Bytes
+
+__weak int rk_board_late_init(void)
+{
+	return 0;
+}
+
+__weak int rk_board_fdt_fixup(void *blob)
+{
+	return 0;
+}
+
+__weak int soc_clk_dump(void)
+{
+	return 0;
+}
+
+__weak int set_armclk_rate(void)
+{
+	return 0;
+}
+
+__weak int rk_board_init(void)
+{
+	return 0;
+}
+
+/*
+ * define serialno max length, the max length is 512 Bytes
  * The remaining bytes are used to ensure that the first 512 bytes
  * are valid when executing 'env_set("serial#", value)'.
  */
 #define VENDOR_SN_MAX	513
-#define CPUID_LEN       0x10
-#define CPUID_OFF       0x7
+#define CPUID_LEN	0x10
+#define CPUID_OFF	0x07
 
 static int rockchip_set_ethaddr(void)
 {
 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
-	int ret;
-	u8 ethaddr[ARP_HLEN];
 	char buf[ARP_HLEN_ASCII + 1];
+	u8 ethaddr[ARP_HLEN];
+	int ret;
 
 	ret = vendor_storage_read(VENDOR_LAN_MAC_ID, ethaddr, sizeof(ethaddr));
 	if (ret > 0 && is_valid_ethaddr(ethaddr)) {
@@ -75,14 +92,15 @@ static int rockchip_set_ethaddr(void)
 
 static int rockchip_set_serialno(void)
 {
+	u8 low[CPUID_LEN / 2], high[CPUID_LEN / 2];
+	u8 cpuid[CPUID_LEN] = {0};
 	char serialno_str[VENDOR_SN_MAX];
 	int ret = 0, i;
-	u8 cpuid[CPUID_LEN] = {0};
-	u8 low[CPUID_LEN / 2], high[CPUID_LEN / 2];
 	u64 serialno;
 
 	/* Read serial number from vendor storage part */
 	memset(serialno_str, 0, VENDOR_SN_MAX);
+
 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
 	ret = vendor_storage_read(VENDOR_SN_ID, serialno_str, (VENDOR_SN_MAX-1));
 	if (ret > 0) {
@@ -94,28 +112,31 @@ static int rockchip_set_serialno(void)
 
 		/* retrieve the device */
 		ret = uclass_get_device_by_driver(UCLASS_MISC,
-						  DM_GET_DRIVER(rockchip_efuse), &dev);
+						  DM_GET_DRIVER(rockchip_efuse),
+						  &dev);
 		if (ret) {
 			printf("%s: could not find efuse device\n", __func__);
 			return ret;
 		}
+
 		/* read the cpu_id range from the efuses */
 		ret = misc_read(dev, CPUID_OFF, &cpuid, sizeof(cpuid));
 		if (ret) {
-			printf("%s: reading cpuid from the efuses failed\n", __func__);
+			printf("%s: read cpuid from efuses failed, ret=%d\n",
+			       __func__, ret);
 			return ret;
 		}
 #else
 		/* generate random cpuid */
-		for (i = 0; i < CPUID_LEN; i++) {
+		for (i = 0; i < CPUID_LEN; i++)
 			cpuid[i] = (u8)(rand());
-		}
 #endif
 		/* Generate the serial number based on CPU ID */
 		for (i = 0; i < 8; i++) {
 			low[i] = cpuid[1 + (i << 1)];
 			high[i] = cpuid[i << 1];
 		}
+
 		serialno = crc32_no_comp(0, low, 8);
 		serialno |= (u64)crc32_no_comp(serialno, high, 8) << 32;
 		snprintf(serialno_str, sizeof(serialno_str), "%llx", serialno);
@@ -124,6 +145,7 @@ static int rockchip_set_serialno(void)
 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
 	}
 #endif
+
 	return ret;
 }
 
@@ -131,38 +153,12 @@ static int rockchip_set_serialno(void)
 int fb_set_reboot_flag(void)
 {
 	printf("Setting reboot to fastboot flag ...\n");
-	/* Set boot mode to fastboot */
 	writel(BOOT_FASTBOOT, CONFIG_ROCKCHIP_BOOT_MODE_REG);
 
 	return 0;
 }
 #endif
 
-__weak int rk_board_init(void)
-{
-	return 0;
-}
-
-__weak int rk_board_late_init(void)
-{
-	return 0;
-}
-
-__weak int rk_board_fdt_fixup(void *blob)
-{
-	return 0;
-}
-
-__weak int soc_clk_dump(void)
-{
-	return 0;
-}
-
-__weak int set_armclk_rate(void)
-{
-	return 0;
-}
-
 int board_late_init(void)
 {
 	rockchip_set_ethaddr();
@@ -170,23 +166,18 @@ int board_late_init(void)
 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0)
 	setup_boot_mode();
 #endif
-
 #ifdef CONFIG_DM_CHARGE_DISPLAY
 	charge_display();
 #endif
-
 #ifdef CONFIG_DRM_ROCKCHIP
 	rockchip_show_logo();
 #endif
-
 	soc_clk_dump();
 
 	return rk_board_late_init();
 }
 
 #ifdef CONFIG_USING_KERNEL_DTB
-#include <asm/arch/resource_img.h>
-
 /* Here, only fixup cru phandle, pmucru is not included */
 static int phandles_fixup(void *fdt)
 {
@@ -295,8 +286,8 @@ static int phandles_fixup(void *fdt)
 
 int init_kernel_dtb(void)
 {
-	int ret = 0;
-	ulong fdt_addr = 0;
+	ulong fdt_addr;
+	int ret;
 
 	fdt_addr = env_get_ulong("fdt_addr_r", 16, 0);
 	if (!fdt_addr) {
@@ -306,7 +297,7 @@ int init_kernel_dtb(void)
 
 	ret = rockchip_read_dtb_file((void *)fdt_addr);
 	if (ret < 0) {
-		printf("%s dtb in resource read fail\n", __func__);
+		printf("Read kernel dtb failed, ret=%d\n", ret);
 		return 0;
 	}
 
@@ -317,9 +308,7 @@ int init_kernel_dtb(void)
 	phandles_fixup((void *)fdt_addr);
 
 	of_live_build((void *)fdt_addr, (struct device_node **)&gd->of_root);
-
 	dm_scan_fdt((void *)fdt_addr, false);
-
 	gd->fdt_blob = (void *)fdt_addr;
 
 	/* Reserve 'reserved-memory' */
@@ -390,7 +379,6 @@ static void early_download_init(void)
 		printf("Hotkey: ctrl+%c\n", (gd->console_evt + 'a' - 1));
 
 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0)
-	/* ctrl+b */
 	if (is_hotkey(HK_BROM_DNL)) {
 		printf("Enter bootrom download...");
 		flushc();
@@ -403,8 +391,6 @@ static void early_download_init(void)
 
 int board_init(void)
 {
-	int ret;
-
 	board_debug_uart_init();
 
 #ifdef CONFIG_USING_KERNEL_DTB
@@ -418,9 +404,8 @@ int board_init(void)
 	 */
 	clks_probe();
 #ifdef CONFIG_DM_REGULATOR
-	ret = regulators_enable_boot_on(false);
-	if (ret)
-		debug("%s: Cannot enable boot on regulator\n", __func__);
+	if (regulators_enable_boot_on(false))
+		debug("%s: Can't enable boot on regulator\n", __func__);
 #endif
 
 #ifdef CONFIG_ROCKCHIP_IO_DOMAIN
@@ -438,19 +423,16 @@ int board_init(void)
 
 int interrupt_debugger_init(void)
 {
-	int ret = 0;
-
 #ifdef CONFIG_ROCKCHIP_DEBUGGER
-	ret = rockchip_debugger_init();
+	return rockchip_debugger_init();
+#else
+	return 0;
 #endif
-	return ret;
 }
 
 int board_fdt_fixup(void *blob)
 {
-	/*
-	 * Common fixup for DRM
-	 */
+	/* Common fixup for DRM */
 #ifdef CONFIG_DRM_ROCKCHIP
 	rockchip_display_fixup(blob);
 #endif
@@ -528,9 +510,9 @@ void enable_caches(void)
  */
 void board_lmb_reserve(struct lmb *lmb)
 {
-	u64 start, size;
-	char bootm_low[32];
 	char bootm_mapsize[32];
+	char bootm_low[32];
+	u64 start, size;
 	int i;
 
 	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
@@ -643,10 +625,10 @@ static struct dwc2_plat_otg_data otg_data = {
 
 int board_usb_init(int index, enum usb_init_type init)
 {
-	int node;
-	fdt_addr_t addr;
-	const fdt32_t *reg;
 	const void *blob = gd->fdt_blob;
+	const fdt32_t *reg;
+	fdt_addr_t addr;
+	int node;
 
 	/* find the usb_otg node */
 	node = fdt_node_offset_by_compatible(blob, -1, "snps,dwc2");

commit 14768307235d208fd8f1e3ec83ca0e94fe1bd357
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jul 10 16:14:23 2019 +0800

    cmd: bootrkp: clean up code
    
    Change-Id: Ic76a6cabca67263a792eece7ecc7ee46e521ef97
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/cmd/bootrkp.c b/cmd/bootrkp.c
index e57cc28a63..5e1960b651 100755
--- a/cmd/bootrkp.c
+++ b/cmd/bootrkp.c
@@ -5,23 +5,20 @@
  */
 
 #include <common.h>
+#include <boot_rkimg.h>
+#include <keymaster.h>
 #include <malloc.h>
 #include <android_bootloader.h>
 #include <attestation_key.h>
-#include <boot_rkimg.h>
-#include <keymaster.h>
-
-#define OEM_UNLOCK_ARG_SIZE 30
 
 static int do_boot_rockchip(cmd_tbl_t *cmdtp, int flag, int argc,
-		      char * const argv[])
+			    char *const argv[])
 {
+	char *boot_partname = PART_BOOT;
 	disk_partition_t part_info;
 	struct blk_desc *dev_desc;
-	int mode = 0;
-	char *boot_partname = PART_BOOT;
-	int ret = 0;
-	int i = 0;
+	int i, ret;
+	int mode;
 
 	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {
@@ -30,51 +27,49 @@ static int do_boot_rockchip(cmd_tbl_t *cmdtp, int flag, int argc,
 	}
 
 #ifdef CONFIG_ANDROID_KEYMASTER_CA
-	disk_partition_t misc_part_info;
-
 	/* load attestation key from misc partition. */
-	ret = part_get_info_by_name(dev_desc, "misc",
-				    &misc_part_info);
+	ret = part_get_info_by_name(dev_desc, PART_MISC, &part_info);
 	if (ret < 0)
-		printf("%s Could not find misc partition\n", __func__);
+		printf("%s: Could not find misc partition\n", __func__);
 	else
-		load_attestation_key(dev_desc, &misc_part_info);
+		load_attestation_key(dev_desc, &part_info);
 #endif
 
 #ifdef CONFIG_FASTBOOT_OEM_UNLOCK
 	/* read oem unlock status and attach to bootargs */
-	uint8_t unlock = 0;
+	char oem_unlock[30] = {0};
 	TEEC_Result result;
-	char oem_unlock[OEM_UNLOCK_ARG_SIZE] = {0};
+	uint8_t unlock = 0;
+
 	result = trusty_read_oem_unlock(&unlock);
 	if (result) {
-		printf("read oem unlock status with error : 0x%x\n", result);
+		printf("%s: Read oem unlock status failed: %d\n",
+		       __func__, result);
 	} else {
-		snprintf(oem_unlock, OEM_UNLOCK_ARG_SIZE, "androidboot.oem_unlocked=%d", unlock);
+		snprintf(oem_unlock, sizeof(oem_unlock),
+			 "androidboot.oem_unlocked=%d", unlock);
 		env_update("bootargs", oem_unlock);
 	}
 #endif
 
 	mode = rockchip_get_boot_mode();
-	if (mode == BOOT_MODE_RECOVERY) {
+	if (mode == BOOT_MODE_RECOVERY)
 		boot_partname = PART_RECOVERY;
-		printf("%s boot from Recovery partition!\n", __func__);
-	}
 
 	for (i = 0; i < argc; i++) {
 		if (!strcmp(argv[i], "boot-recovery")) {
 			boot_partname = PART_RECOVERY;
-			printf("%s argv%d:%s boot from Recovery partition!\n",
-				__func__, i, argv[i]);
+			printf("Boot from Recovery partition\n");
 		}
 	}
 
 	ret = part_get_info_by_name(dev_desc, boot_partname, &part_info);
+	if (ret < 0) {
+		printf("%s: Could not find %s part\n", __func__, part_info.name);
+		return CMD_RET_FAILURE;
+	}
 
-	if(boot_rockchip_image(dev_desc, &part_info))
-		ret = CMD_RET_FAILURE;
-
-	return ret;
+	return boot_rockchip_image(dev_desc, &part_info) ? CMD_RET_FAILURE : 0;
 }
 
 U_BOOT_CMD(
@@ -86,33 +81,36 @@ U_BOOT_CMD(
 );
 
 static int do_rkimg_test(cmd_tbl_t *cmdtp, int flag, int argc,
-		      char * const argv[])
+			 char *const argv[])
 {
 	struct blk_desc *dev_desc;
-	u32* buffer;
-	int ret = 0;
+	u32 *buffer;
+	int ret;
 
 	dev_desc = blk_get_dev(argv[1], simple_strtoul(argv[2], NULL, 16));
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return CMD_RET_FAILURE;
+	}
 
+	/* Read one block from beginning of IDB data */
 	buffer = memalign(ARCH_DMA_MINALIGN, 1024);
-	/* Read one block from begining of IDB data */
 	ret = blk_dread(dev_desc, 64, 2, buffer);
 	if (ret != 2) {
-		printf("%s fail to read data from IDB\n", __func__);
+		printf("%s: Fail to read data from IDB\n", __func__);
 		free(buffer);
 		return CMD_RET_FAILURE;
 	}
 
-	if (buffer[0] == 0xFCDC8C3B){
-		printf("%s found IDB in SDcard\n", __func__);
-		ret = CMD_RET_SUCCESS;
+	if (buffer[0] == 0xFCDC8C3B) {
+		printf("Found IDB in SDcard\n");
 		if (0 == buffer[128 + 104 / 4]) /* TAG in IDB */
 			env_update("bootargs", "sdfwupdate");
 	}
 
 	free(buffer);
 
-	return ret;
+	return CMD_RET_SUCCESS;
 }
 
 U_BOOT_CMD(

commit d14162bd807a78f94e49dffcb862883e0e514ab4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jul 10 16:03:28 2019 +0800

    common: rkimg: clean up code
    
    Change-Id: I392fce121353b6ae51fcd016b3ba5cedeb033757
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index f0d210009c..46d8ea3113 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -5,28 +5,26 @@
  */
 
 #include <common.h>
+#include <bidram.h>
 #include <bootm.h>
+#include <boot_rkimg.h>
+#include <console.h>
+#include <malloc.h>
 #include <mmc.h>
-#include <linux/list.h>
+#include <part.h>
+#include <sysmem.h>
+#include <asm/io.h>
 #include <linux/libfdt.h>
-#include <malloc.h>
 #include <asm/arch/hotkey.h>
 #include <asm/arch/resource_img.h>
 #include <asm/arch/rockchip_crc.h>
-#include <boot_rkimg.h>
 #include <asm/arch/boot_mode.h>
-#include <asm/io.h>
-#include <part.h>
-#include <bidram.h>
-#include <console.h>
-#include <sysmem.h>
-
-#define TAG_KERNEL			0x4C4E524B
-
-#define DTB_FILE			"rk-kernel.dtb"
 
+#define TAG_KERNEL				0x4C4E524B
+#define DTB_FILE				"rk-kernel.dtb"
 #define BOOTLOADER_MESSAGE_OFFSET_IN_MISC	(16 * 1024)
 #define BOOTLOADER_MESSAGE_BLK_OFFSET		(BOOTLOADER_MESSAGE_OFFSET_IN_MISC >> 9)
+
 DECLARE_GLOBAL_DATA_PTR;
 
 struct bootloader_message {
@@ -88,26 +86,22 @@ static void boot_lmb_init(bootm_headers_t *images)
 #endif
 
 /*
- * non-OTA packaged kernel.img & boot.img
- * return the image size on success, and a
- * negative value on error.
+ * non-OTA packaged kernel.img & boot.img return the image size on success,
+ * and a negative value on error.
  */
 int read_rockchip_image(struct blk_desc *dev_desc,
 			disk_partition_t *part_info, void *dst)
 {
 	struct rockchip_image *img;
 	int header_len = 8;
-	int cnt;
-	int ret;
+	int cnt, ret;
 #ifdef CONFIG_ROCKCHIP_CRC
 	u32 crc32;
 #endif
 
 	img = memalign(ARCH_DMA_MINALIGN, RK_BLK_SIZE);
-	if (!img) {
-		printf("out of memory\n");
+	if (!img)
 		return -ENOMEM;
-	}
 
 	/* read first block with header imformation */
 	ret = blk_dread(dev_desc, part_info->start, 1, img);
@@ -117,14 +111,15 @@ int read_rockchip_image(struct blk_desc *dev_desc,
 	}
 
 	if (img->tag != TAG_KERNEL) {
-		printf("%s: invalid image tag(0x%x)\n", part_info->name, img->tag);
+		printf("Invalid %s image tag(0x%x)\n",
+		       part_info->name, img->tag);
 		ret = -EINVAL;
 		goto err;
 	}
 
 	/*
 	 * read the rest blks
-	 * total size  = image size + 8 bytes header + 4 bytes crc32
+	 * total size = image size + 8 bytes header + 4 bytes crc32
 	 */
 	cnt = DIV_ROUND_UP(img->size + 8 + 4, RK_BLK_SIZE);
 	if (!sysmem_alloc_base_by_name((const char *)part_info->name,
@@ -138,8 +133,7 @@ int read_rockchip_image(struct blk_desc *dev_desc,
 	ret = blk_dread(dev_desc, part_info->start + 1, cnt - 1,
 			dst + RK_BLK_SIZE - header_len);
 	if (ret != (cnt - 1)) {
-		printf("%s try to read %d blocks failed, only read %d blocks\n",
-		       part_info->name, cnt - 1, ret);
+		printf("Read %s part failed, ret=%d\n", part_info->name, ret);
 		ret = -EIO;
 	} else {
 		ret = img->size;
@@ -147,8 +141,7 @@ int read_rockchip_image(struct blk_desc *dev_desc,
 
 #ifdef CONFIG_ROCKCHIP_CRC
 	printf("%s image CRC32 verify... ", part_info->name);
-	crc32 = rockchip_crc_verify((unsigned char *)(unsigned long)dst,
-				  img->size + 4);
+	crc32 = rockchip_crc_verify((uchar *)(unsigned long)dst, img->size + 4);
 	if (!crc32) {
 		printf("fail!\n");
 		ret = -EINVAL;
@@ -165,11 +158,11 @@ err:
 /* Gets the storage type of the current device */
 int get_bootdev_type(void)
 {
-	int type = 0;
-	ulong devnum = 0;
 	char *boot_media = NULL, *devtype = NULL;
 	char boot_options[128] = {0};
 	static int appended;
+	ulong devnum = 0;
+	int type = 0;
 
 	devtype = env_get("devtype");
 	devnum = env_get_ulong("devnum", 10, 0);
@@ -277,7 +270,7 @@ struct blk_desc *rockchip_get_bootdev(void)
 
 	dev_desc = blk_get_devnum_by_type(dev_type, devnum);
 	if (!dev_desc) {
-		printf("%s: can't find dev_desc!\n", __func__);
+		printf("%s: Can't find dev_desc!\n", __func__);
 		return NULL;
 	}
 
@@ -291,7 +284,7 @@ struct blk_desc *rockchip_get_bootdev(void)
 
 		mmc = find_mmc_device(devnum);
 		printf("MMC%d: %s, %dMhz\n", devnum,
-		        timing[mmc->timing], mmc->clock / 1000000);
+		       timing[mmc->timing], mmc->clock / 1000000);
 	}
 #endif
 
@@ -306,6 +299,7 @@ static void rkloader_set_bootloader_msg(struct bootloader_message *bmsg)
 {
 	struct blk_desc *dev_desc;
 	disk_partition_t part_info;
+	int ret, cnt;
 
 	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {
@@ -313,28 +307,23 @@ static void rkloader_set_bootloader_msg(struct bootloader_message *bmsg)
 		return;
 	}
 
-	int ret = part_get_info_by_name(dev_desc, PART_MISC,
-			&part_info);
+	ret = part_get_info_by_name(dev_desc, PART_MISC, &part_info);
 	if (ret < 0) {
-		printf("not found misc partition.\n");
+		printf("%s: Could not found misc partition\n", __func__);
 		return;
 	}
-	int size = DIV_ROUND_UP(sizeof(struct bootloader_message), RK_BLK_SIZE)
-			* RK_BLK_SIZE;
-	ret = blk_dwrite(dev_desc, part_info.start + BOOTLOADER_MESSAGE_BLK_OFFSET,
-			size >> 9, bmsg);
-	if (ret != (size >> 9)) {
-		printf("wape data failed!");
-	}
+
+	cnt = DIV_ROUND_UP(sizeof(struct bootloader_message), dev_desc->blksz);
+	ret = blk_dwrite(dev_desc,
+			 part_info.start + BOOTLOADER_MESSAGE_BLK_OFFSET,
+			 cnt, bmsg);
+	if (ret != cnt)
+		printf("%s: Wipe data failed\n", __func__);
 }
 
 void board_run_recovery(void)
 {
-	char *const boot_recovery_cmd[] = {"run", "boot_recovery_cmd", NULL};
-
-	env_set("boot_recovery_cmd", "bootrkp boot-recovery");
-
-	do_run(NULL, 0, ARRAY_SIZE(boot_recovery_cmd), boot_recovery_cmd);
+	run_command("bootrkp boot-recovery", 0);
 }
 
 void board_run_recovery_wipe_data(void)
@@ -342,6 +331,7 @@ void board_run_recovery_wipe_data(void)
 	struct bootloader_message bmsg;
 	struct blk_desc *dev_desc;
 	disk_partition_t part_info;
+	int ret;
 
 	printf("Rebooting into recovery to do wipe_data\n");
 	dev_desc = rockchip_get_bootdev();
@@ -350,20 +340,17 @@ void board_run_recovery_wipe_data(void)
 		return;
 	}
 
-	int ret;
-
-	ret = part_get_info_by_name(dev_desc, PART_MISC,
-		&part_info);
-
+	ret = part_get_info_by_name(dev_desc, PART_MISC, &part_info);
 	if (ret < 0) {
-		printf("not found misc partition, just run recovery.\n");
+		printf("%s: Could not found misc partition, just run recovery\n",
+		       __func__);
 		board_run_recovery();
 	}
 
 	memset((char *)&bmsg, 0, sizeof(struct bootloader_message));
 	strcpy(bmsg.command, "boot-recovery");
-	bmsg.status[0] = 0;
 	strcpy(bmsg.recovery, "recovery\n--wipe_data");
+	bmsg.status[0] = 0;
 
 	rkloader_set_bootloader_msg(&bmsg);
 
@@ -385,15 +372,13 @@ void board_run_recovery_wipe_data(void)
  */
 int rockchip_get_boot_mode(void)
 {
+	struct bootloader_message *bmsg = NULL;
 	struct blk_desc *dev_desc;
 	disk_partition_t part_info;
-	struct bootloader_message *bmsg = NULL;
-	int size = DIV_ROUND_UP(sizeof(struct bootloader_message), RK_BLK_SIZE)
-		   * RK_BLK_SIZE;
-	int ret;
 	uint32_t reg_boot_mode;
 	char *env_reboot_mode;
 	int clear_boot_reg = 0;
+	int ret, cnt;
 
 	/*
 	 * Here, we mainly check for:
@@ -419,18 +404,19 @@ int rockchip_get_boot_mode(void)
 		printf("%s: dev_desc is NULL!\n", __func__);
 		return -ENODEV;
 	}
-	ret = part_get_info_by_name(dev_desc, PART_MISC,
-			&part_info);
+
+	ret = part_get_info_by_name(dev_desc, PART_MISC, &part_info);
 	if (ret < 0) {
-		printf("get part %s fail %d\n", PART_MISC, ret);
+		printf("%s: Could not found misc partition\n", __func__);
 		goto fallback;
 	}
 
-	bmsg = memalign(ARCH_DMA_MINALIGN, size);
+	cnt = DIV_ROUND_UP(sizeof(struct bootloader_message), dev_desc->blksz);
+	bmsg = memalign(ARCH_DMA_MINALIGN, cnt * dev_desc->blksz);
 	ret = blk_dread(dev_desc,
 			part_info.start + BOOTLOADER_MESSAGE_BLK_OFFSET,
-			size >> 9, bmsg);
-	if (ret != (size >> 9)) {
+			cnt, bmsg);
+	if (ret != cnt) {
 		free(bmsg);
 		return -EIO;
 	}
@@ -523,22 +509,19 @@ static void fdt_ramdisk_skip_relocation(void)
 
 int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 {
-	ulong fdt_addr_r = env_get_ulong("fdt_addr_r", 16, 0);
 	ulong ramdisk_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0);
 	ulong kernel_addr_r = env_get_ulong("kernel_addr_r", 16, 0);
+	ulong fdt_addr_r = env_get_ulong("fdt_addr_r", 16, 0);
 	disk_partition_t kernel_part;
 	int ramdisk_size;
 	int kernel_size;
 	int fdt_size;
 	int ret = 0;
-	int part_num;
 
 	printf("=Booting Rockchip format image=\n");
-	part_num = part_get_info_by_name(dev_desc, PART_KERNEL,
-					 &kernel_part);
-
-	if (part_num < 0 || !boot_part) {
-		printf("%s kernel or boot part info error\n", __func__);
+	ret = part_get_info_by_name(dev_desc, PART_KERNEL, &kernel_part);
+	if (ret < 0 || !boot_part) {
+		printf("Could not found misc partition\n");
 		ret = -EINVAL;
 		goto out;
 	}
@@ -546,7 +529,7 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 	kernel_size = read_rockchip_image(dev_desc, &kernel_part,
 					  (void *)kernel_addr_r);
 	if (kernel_size < 0) {
-		printf("%s kernel part read error\n", __func__);
+		printf("Read kernel image failed, ret=%d\n", ret);
 		ret = -EINVAL;
 		goto out;
 	}
@@ -554,8 +537,7 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 	ramdisk_size = read_rockchip_image(dev_desc, boot_part,
 					   (void *)ramdisk_addr_r);
 	if (ramdisk_size < 0) {
-		printf("%s ramdisk part %s read error\n", __func__,
-		       boot_part->name);
+		printf("Read ramdisk image failed, ret=%d\n", ret);
 		ramdisk_size = 0;
 	}
 
@@ -571,7 +553,7 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 	if (gd->fdt_blob != (void *)fdt_addr_r) {
 		fdt_size = rockchip_read_dtb_file((void *)fdt_addr_r);
 		if (fdt_size < 0) {
-			printf("%s fdt read error\n", __func__);
+			printf("Read fdt failed, ret=%d\n", fdt_size);
 			ret = -EINVAL;
 			goto out;
 		}
@@ -589,8 +571,9 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 
 #if defined(CONFIG_ARM64)
 	char cmdbuf[64];
-	sprintf(cmdbuf, "booti 0x%lx 0x%lx:0x%x 0x%lx",
-		kernel_addr_r, ramdisk_addr_r, ramdisk_size, fdt_addr_r);
+
+	snprintf(cmdbuf, 64, "booti 0x%lx 0x%lx:0x%x 0x%lx",
+		 kernel_addr_r, ramdisk_addr_r, ramdisk_size, fdt_addr_r);
 	run_command(cmdbuf, 0);
 #else
 	/* We asume it's always zImage on 32-bit platform */

commit 3f6d16ab3dc9af1e6e05efcd36f4697be8b5548c
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Tue Jul 9 08:36:13 2019 +0800

    drm/rockchip: dw-hdmi: Fix yuv422 display err
    
    When switching from another color to yuv422, neither
    encoder input color nor encoder output color is rgb.
    CSC coeff will be incorrectly selected as
    csc_coeff_full_to_limited, which causes the display
    turn to green. To solve this problem, choose
    csc_coeff_full_to_limited only if the input and output
    colors are both RGB.
    
    Change-Id: If09f53fb2a5aa20359efb548b1a8b7da2c79310d
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>

diff --git a/drivers/video/drm/dw_hdmi.c b/drivers/video/drm/dw_hdmi.c
index 00a0ba4331..6f1b333df3 100644
--- a/drivers/video/drm/dw_hdmi.c
+++ b/drivers/video/drm/dw_hdmi.c
@@ -1170,7 +1170,7 @@ static void dw_hdmi_update_csc_coeffs(struct dw_hdmi *hdmi)
 	enc_in_rgb = hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_in_bus_format);
 
 	if (is_color_space_conversion(hdmi)) {
-		if (enc_out_rgb == enc_in_rgb) {
+		if (enc_out_rgb && enc_in_rgb) {
 			csc_coeff = &csc_coeff_full_to_limited;
 			csc_scale = 0;
 		} else if (enc_out_rgb) {

commit b5016cf2d5ee50c93382cc5148a4aea6b73ee84c
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Thu Mar 21 10:23:30 2019 +0800

    drm/rockchip: dw-hdmi: Support hdmi quantization range setting
    
    Adding hdmi quantization range switching function. The current
    version use default quant range, subsequent version will keep consistent
    with the kernel Setting.
    
    Change-Id: Ibb93f7c08d72322caa15f12b1d6e1f901371b27b
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>

diff --git a/common/edid.c b/common/edid.c
index 00797a9f6d..2adcced730 100644
--- a/common/edid.c
+++ b/common/edid.c
@@ -2748,6 +2748,24 @@ static void drm_parse_hdmi_forum_vsdb(struct hdmi_edid_data *data,
 	drm_parse_ycbcr420_deep_color_info(data, hf_vsdb);
 }
 
+/**
+ * drm_default_rgb_quant_range - default RGB quantization range
+ * @mode: display mode
+ *
+ * Determine the default RGB quantization range for the mode,
+ * as specified in CEA-861.
+ *
+ * Return: The default RGB quantization range for the mode
+ */
+enum hdmi_quantization_range
+drm_default_rgb_quant_range(struct drm_display_mode *mode)
+{
+	/* All CEA modes other than VIC 1 use limited quantization range. */
+	return drm_match_cea_mode(mode) > 1 ?
+		HDMI_QUANTIZATION_RANGE_LIMITED :
+		HDMI_QUANTIZATION_RANGE_FULL;
+}
+
 static void drm_parse_hdmi_deep_color_info(struct hdmi_edid_data *data,
 					   const u8 *hdmi)
 {
@@ -5157,6 +5175,50 @@ static int hdmi_vendor_infoframe_init(struct hdmi_vendor_infoframe *frame)
 	return 0;
 }
 
+/**
+ * drm_hdmi_avi_infoframe_quant_range() - fill the HDMI AVI infoframe
+ *                                        quantization range information
+ * @frame: HDMI AVI infoframe
+ * @rgb_quant_range: RGB quantization range (Q)
+ * @rgb_quant_range_selectable: Sink support selectable RGB quantization range (QS)
+ */
+void
+drm_hdmi_avi_infoframe_quant_range(struct hdmi_avi_infoframe *frame,
+				   struct drm_display_mode *mode,
+				   enum hdmi_quantization_range rgb_quant_range,
+				   bool rgb_quant_range_selectable)
+{
+	/*
+	 * CEA-861:
+	 * "A Source shall not send a non-zero Q value that does not correspond
+	 *  to the default RGB Quantization Range for the transmitted Picture
+	 *  unless the Sink indicates support for the Q bit in a Video
+	 *  Capabilities Data Block."
+	 *
+	 * HDMI 2.0 recommends sending non-zero Q when it does match the
+	 * default RGB quantization range for the mode, even when QS=0.
+	 */
+	if (rgb_quant_range_selectable ||
+	    rgb_quant_range == drm_default_rgb_quant_range(mode))
+		frame->quantization_range = rgb_quant_range;
+	else
+		frame->quantization_range = HDMI_QUANTIZATION_RANGE_DEFAULT;
+
+	/*
+	 * CEA-861-F:
+	 * "When transmitting any RGB colorimetry, the Source should set the
+	 *  YQ-field to match the RGB Quantization Range being transmitted
+	 *  (e.g., when Limited Range RGB, set YQ=0 or when Full Range RGB,
+	 *  set YQ=1) and the Sink shall ignore the YQ-field."
+	 */
+	if (rgb_quant_range == HDMI_QUANTIZATION_RANGE_LIMITED)
+		frame->ycc_quantization_range =
+			HDMI_YCC_QUANTIZATION_RANGE_LIMITED;
+	else
+		frame->ycc_quantization_range =
+			HDMI_YCC_QUANTIZATION_RANGE_FULL;
+}
+
 static enum hdmi_3d_structure
 s3d_structure_from_display_mode(const struct drm_display_mode *mode)
 {
diff --git a/drivers/video/drm/dw_hdmi.c b/drivers/video/drm/dw_hdmi.c
index c95614367f..00a0ba4331 100644
--- a/drivers/video/drm/dw_hdmi.c
+++ b/drivers/video/drm/dw_hdmi.c
@@ -111,6 +111,12 @@ static const u16 csc_coeff_rgb_in_eitu709[3][4] = {
 	{ 0x6756, 0x78ab, 0x2000, 0x0200 }
 };
 
+static const u16 csc_coeff_full_to_limited[3][4] = {
+	{ 0x36f7, 0x0000, 0x0000, 0x0040 },
+	{ 0x0000, 0x36f7, 0x0000, 0x0040 },
+	{ 0x0000, 0x0000, 0x36f7, 0x0040 }
+};
+
 struct hdmi_vmode {
 	bool mdataenablepolarity;
 
@@ -125,6 +131,7 @@ struct hdmi_data_info {
 	unsigned int enc_out_bus_format;
 	unsigned int enc_in_encoding;
 	unsigned int enc_out_encoding;
+	unsigned int quant_range;
 	unsigned int pix_repet_factor;
 	struct hdmi_vmode video_mode;
 };
@@ -327,8 +334,26 @@ static int hdmi_bus_fmt_color_depth(unsigned int bus_format)
 
 static int is_color_space_conversion(struct dw_hdmi *hdmi)
 {
-	return hdmi->hdmi_data.enc_in_bus_format !=
-	hdmi->hdmi_data.enc_out_bus_format;
+	struct drm_display_mode *mode =
+		hdmi->edid_data.preferred_mode;
+	bool is_cea_default;
+
+	is_cea_default = (drm_match_cea_mode(mode) > 1) &&
+			 (hdmi->hdmi_data.quant_range ==
+			  HDMI_QUANTIZATION_RANGE_DEFAULT);
+
+	/*
+	 * When output is rgb limited range or default range with
+	 * cea mode, csc should be enabled.
+	 */
+	if (hdmi->hdmi_data.enc_in_bus_format !=
+	    hdmi->hdmi_data.enc_out_bus_format ||
+	    ((hdmi->hdmi_data.quant_range == HDMI_QUANTIZATION_RANGE_LIMITED ||
+	      is_cea_default) &&
+	     hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_in_bus_format)))
+		return 1;
+
+	return 0;
 }
 
 static int is_color_space_decimation(struct dw_hdmi *hdmi)
@@ -1139,16 +1164,22 @@ static void dw_hdmi_update_csc_coeffs(struct dw_hdmi *hdmi)
 	const u16 (*csc_coeff)[3][4] = &csc_coeff_default;
 	unsigned i;
 	u32 csc_scale = 1;
+	int enc_out_rgb, enc_in_rgb;
+
+	enc_out_rgb = hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format);
+	enc_in_rgb = hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_in_bus_format);
 
 	if (is_color_space_conversion(hdmi)) {
-		if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format)) {
+		if (enc_out_rgb == enc_in_rgb) {
+			csc_coeff = &csc_coeff_full_to_limited;
+			csc_scale = 0;
+		} else if (enc_out_rgb) {
 			if (hdmi->hdmi_data.enc_out_encoding ==
 						V4L2_YCBCR_ENC_601)
 				csc_coeff = &csc_coeff_rgb_out_eitu601;
 			else
 				csc_coeff = &csc_coeff_rgb_out_eitu709;
-		} else if (hdmi_bus_fmt_is_rgb(
-					hdmi->hdmi_data.enc_in_bus_format)) {
+		} else if (enc_in_rgb) {
 			if (hdmi->hdmi_data.enc_out_encoding ==
 						V4L2_YCBCR_ENC_601)
 				csc_coeff = &csc_coeff_rgb_in_eitu601;
@@ -1513,6 +1544,8 @@ static void hdmi_config_AVI(struct dw_hdmi *hdmi, struct drm_display_mode *mode)
 	struct hdmi_avi_infoframe frame;
 	u8 val;
 	bool is_hdmi2 = false;
+	enum hdmi_quantization_range rgb_quant_range =
+		hdmi->hdmi_data.quant_range;
 
 	if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format) ||
 	    hdmi->edid_data.display_info.hdmi.scdc.supported)
@@ -1520,6 +1553,12 @@ static void hdmi_config_AVI(struct dw_hdmi *hdmi, struct drm_display_mode *mode)
 	/* Initialise info frame from DRM mode */
 	drm_hdmi_avi_infoframe_from_display_mode(&frame, mode, is_hdmi2);
 
+	/*
+	 * Ignore monitor selectable quantization, use quantization set
+	 * by the user
+	 */
+	drm_hdmi_avi_infoframe_quant_range(&frame, mode, rgb_quant_range,
+					   true);
 	if (hdmi_bus_fmt_is_yuv444(hdmi->hdmi_data.enc_out_bus_format))
 		frame.colorspace = HDMI_COLORSPACE_YUV444;
 	else if (hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format))
@@ -2034,6 +2073,13 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi,
 			hdmi->plat_data->input_bus_encoding;
 	else
 		hdmi->hdmi_data.enc_in_encoding = V4L2_YCBCR_ENC_DEFAULT;
+
+	if (hdmi->plat_data->get_quant_range)
+		hdmi->hdmi_data.quant_range =
+			hdmi->plat_data->get_quant_range(data);
+	else
+		hdmi->hdmi_data.quant_range = HDMI_QUANTIZATION_RANGE_DEFAULT;
+
 	/*
 	 * According to the dw-hdmi specification 6.4.2
 	 * vp_pr_cd[3:0]:
diff --git a/include/edid.h b/include/edid.h
index 1ac641c963..7e52b325fd 100644
--- a/include/edid.h
+++ b/include/edid.h
@@ -847,6 +847,8 @@ bool drm_detect_hdmi_monitor(struct edid *edid);
 bool drm_detect_monitor_audio(struct edid *edid);
 int do_cea_modes(struct hdmi_edid_data *data, const u8 *db, u8 len);
 int drm_do_get_edid(struct ddc_adapter *adap, u8 *edid);
+enum hdmi_quantization_range
+drm_default_rgb_quant_range(struct drm_display_mode *mode);
 u8 drm_scdc_readb(struct ddc_adapter *adap, u8 offset,
 		  u8 *value);
 u8 drm_scdc_writeb(struct ddc_adapter *adap, u8 offset,
diff --git a/include/linux/dw_hdmi.h b/include/linux/dw_hdmi.h
index 8b0b8fa6e2..6a9f473741 100644
--- a/include/linux/dw_hdmi.h
+++ b/include/linux/dw_hdmi.h
@@ -163,6 +163,7 @@ struct dw_hdmi_plat_data {
 	unsigned long (*get_output_bus_format)(void *data);
 	unsigned long (*get_enc_in_encoding)(void *data);
 	unsigned long (*get_enc_out_encoding)(void *data);
+	unsigned long (*get_quant_range)(void *data);
 };
 
 #endif /* __IMX_HDMI_H__ */
diff --git a/include/linux/hdmi.h b/include/linux/hdmi.h
index 70a8e36755..005d34a8fc 100644
--- a/include/linux/hdmi.h
+++ b/include/linux/hdmi.h
@@ -322,6 +322,11 @@ int
 drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame,
 					 struct drm_display_mode *mode,
 					 bool is_hdmi2_sink);
+void
+drm_hdmi_avi_infoframe_quant_range(struct hdmi_avi_infoframe *frame,
+				   struct drm_display_mode *mode,
+				   enum hdmi_quantization_range rgb_quant_range,
+				   bool rgb_quant_range_selectable);
 u8 drm_match_cea_mode(struct drm_display_mode *to_match);
 
 #endif /* _DRM_HDMI_H */

commit af4fa707937dec40b4068ab4d8ccfc8768f7362d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 16 09:50:51 2019 +0800

    common: android: format address with "0x%08lx"
    
    Change-Id: Icbb0d31541fab9d66043834a28f995da8b9ab087
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 230bf0ef7c..0cca5b04a0 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -393,7 +393,7 @@ int android_bootloader_boot_kernel(unsigned long kernel_address)
 		"bootm", kernel_addr_str, kernel_addr_str, fdt_addr, NULL };
 
 	comp_type = env_get_ulong("os_comp", 10, 0);
-	sprintf(kernel_addr_str, "0x%lx", kernel_address);
+	sprintf(kernel_addr_str, "0x%08lx", kernel_address);
 
 	if (comp_type != IH_COMP_NONE) {
 		if (comp_type == IH_COMP_ZIMAGE &&

commit 26e23df7b8d929c440e9c48d74257fc60f70e260
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue Jul 16 11:50:11 2019 +0800

    rkflash: add new SPI Nannd flash
    
    GD5F1GQ4R
    
    Change-Id: Ie2077814963f564318cda4777a0c91bbacb4c1fb
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/sfc_nand.c b/drivers/rkflash/sfc_nand.c
index 49c350b850..6a7bfcef24 100644
--- a/drivers/rkflash/sfc_nand.c
+++ b/drivers/rkflash/sfc_nand.c
@@ -77,6 +77,8 @@ static struct nand_info spi_nand_tbl[] = {
 	{0xD503, 8, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 20, 8, 0xB0, 0, 4, 40, NULL},
 	/* GD5F2GQ5UEYIG */
 	{0xC852, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 4, 0xB0, 0, 4, 20, &sfc_nand_ecc_status_sp2},
+	/* GD5F1GQ4R */
+	{0xC8C1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 8, 0xB0, 0, 4, 8, &sfc_nand_ecc_status_sp3},
 };
 
 static u8 id_byte[8];

commit 9f7520289f006287214b79c123061dd596e983db
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Jul 16 10:01:02 2019 +0800

    configs: rk3399pro: delete CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
    
    The CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION force to use the security
    partition. But in routine situation, scan the storage device to find
    whether RPMB exist. If not, then use the security partition. So in
    conventional defconfig, delete CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION.
    
    fixes: b9a7e756c4e94fc58b5962647eaf2fa12a2146a9
    (lib: optee_client: change the condition for eMMC devices)
    
    Change-Id: I2abed8b06292ce68c09b5bcfc6d0ef9bd19b080f
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/rk3399pro_defconfig b/configs/rk3399pro_defconfig
index 589e03ad00..591c4c80f3 100644
--- a/configs/rk3399pro_defconfig
+++ b/configs/rk3399pro_defconfig
@@ -147,5 +147,4 @@ CONFIG_AVB_LIBAVB_USER=y
 CONFIG_RK_AVB_LIBAVB_USER=y
 CONFIG_OPTEE_CLIENT=y
 CONFIG_OPTEE_V1=y
-CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
 CONFIG_TEST_ROCKCHIP=y

commit b5c685eb33f189b1d0325126a3e92bde2968161c
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Jul 16 09:59:43 2019 +0800

    configs: rk3399: delete CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
    
    The CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION force to use the security
    partition. But in routine situation, scan the storage device to find
    whether RPMB exist. If not, then use the security partition. So in
    conventional defconfig, delete CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION.
    
    fixes: b9a7e756c4e94fc58b5962647eaf2fa12a2146a9
    (lib: optee_client: change the condition for eMMC devices)
    
    Change-Id: I5b26d9ac988f45f4dd3627542c2d2eec9b6ca1f2
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
index 32f04b2c4c..9b245b3676 100755
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -137,5 +137,4 @@ CONFIG_AVB_LIBAVB_USER=y
 CONFIG_RK_AVB_LIBAVB_USER=y
 CONFIG_OPTEE_CLIENT=y
 CONFIG_OPTEE_V1=y
-CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
 CONFIG_TEST_ROCKCHIP=y

commit d075d60b9793434fc851ebb1b999c22477f15699
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Jul 16 09:58:44 2019 +0800

    configs: rk3368: delete CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
    
    The CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION force to use the security
    partition. But in routine situation, scan the storage device to find
    whether RPMB exist. If not, then use the security partition. So in
    conventional defconfig, delete CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION.
    
    fixes: b9a7e756c4e94fc58b5962647eaf2fa12a2146a9
    (lib: optee_client: change the condition for eMMC devices)
    
    Change-Id: Iae4d1ea91fef4e4355babd88e54277e24ff17edd
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/rk3368_defconfig b/configs/rk3368_defconfig
index 42f42d239f..bb25c3b9b8 100644
--- a/configs/rk3368_defconfig
+++ b/configs/rk3368_defconfig
@@ -107,5 +107,4 @@ CONFIG_AVB_LIBAVB_USER=y
 CONFIG_RK_AVB_LIBAVB_USER=y
 CONFIG_OPTEE_CLIENT=y
 CONFIG_OPTEE_V1=y
-CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
 CONFIG_TEST_ROCKCHIP=y

commit 6ad43d645c15416e7172595475d9316731cf606e
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Jul 16 09:56:59 2019 +0800

    configs: rk3288: delete CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
    
    The CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION force to use the security
    partition. But in routine situation, scan the storage device to find
    whether RPMB exist. If not, then use the security partition. So in
    conventional defconfig, delete CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION.
    
    fixes: b9a7e756c4e94fc58b5962647eaf2fa12a2146a9
    (lib: optee_client: change the condition for eMMC devices)
    
    Change-Id: I50054102e03ae5925a35124ccbedd3f7cebce5f5
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/rk3288_defconfig b/configs/rk3288_defconfig
index e93174e403..69ca208212 100644
--- a/configs/rk3288_defconfig
+++ b/configs/rk3288_defconfig
@@ -117,5 +117,4 @@ CONFIG_AVB_LIBAVB_USER=y
 CONFIG_RK_AVB_LIBAVB_USER=y
 CONFIG_OPTEE_CLIENT=y
 CONFIG_OPTEE_V1=y
-CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
 CONFIG_TEST_ROCKCHIP=y

commit 38b5f44a82b01e30b4efd7e6e57040a13cafc029
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Jul 16 09:55:43 2019 +0800

    configs: rk3128x: delete CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
    
    The CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION force to use the security
    partition. But in routine situation, scan the storage device to find
    whether RPMB exist. If not, then use the security partition. So in
    conventional defconfig, delete CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION.
    
    fixes: b9a7e756c4e94fc58b5962647eaf2fa12a2146a9
    (lib: optee_client: change the condition for eMMC devices)
    
    Change-Id: Ieb9c9e49df3b18fa6a9b459469e8c9c0377192ac
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/rk3128x_defconfig b/configs/rk3128x_defconfig
index 4e1ae0f306..922c568e96 100644
--- a/configs/rk3128x_defconfig
+++ b/configs/rk3128x_defconfig
@@ -136,4 +136,3 @@ CONFIG_RK_AVB_LIBAVB_USER=y
 CONFIG_OPTEE_CLIENT=y
 CONFIG_OPTEE_V1=y
 CONFIG_TEST_ROCKCHIP=y
-CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y

commit 1477ee821bda958c6e99f22fd5c0ae7eb06a4791
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Jul 16 09:54:14 2019 +0800

    configs: rk3126: delete CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
    
    The CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION force to use the security
    partition. But in routine situation, scan the storage device to find
    whether RPMB exist. If not, then use the security partition. So in
    conventional defconfig, delete CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION.
    
    fixes: b9a7e756c4e94fc58b5962647eaf2fa12a2146a9
    (lib: optee_client: change the condition for eMMC devices)
    
    Change-Id: I343a84e08668af7895ef3fcbf0da0f2deeced63a
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/rk3126_defconfig b/configs/rk3126_defconfig
index 669761bf7a..199ce340b2 100644
--- a/configs/rk3126_defconfig
+++ b/configs/rk3126_defconfig
@@ -105,5 +105,4 @@ CONFIG_AVB_LIBAVB_USER=y
 CONFIG_RK_AVB_LIBAVB_USER=y
 CONFIG_OPTEE_CLIENT=y
 CONFIG_OPTEE_V1=y
-CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
 CONFIG_TEST_ROCKCHIP=y

commit 6c720b9e02bca732f5b9d4b6e8fd63194701ec55
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Jul 16 09:50:16 2019 +0800

    configs: rk3326: delete CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
    
    The CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION force to use the security
    partition. But in routine situation, scan the storage device to find
    whether RPMB exist. If not, then use the security partition. So in
    conventional defconfig, delete CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION.
    
    fixes: b9a7e756c4e94fc58b5962647eaf2fa12a2146a9
    (lib: optee_client: change the condition for eMMC devices)
    
    Change-Id: I0d9028411a83a7bbe15060ecd06c0804b8a29c10
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/evb-rk3326_defconfig b/configs/evb-rk3326_defconfig
index 27a9790679..801f4b46bc 100644
--- a/configs/evb-rk3326_defconfig
+++ b/configs/evb-rk3326_defconfig
@@ -124,5 +124,4 @@ CONFIG_ERRNO_STR=y
 # CONFIG_EFI_LOADER is not set
 CONFIG_OPTEE_CLIENT=y
 CONFIG_OPTEE_V2=y
-CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
 CONFIG_TEST_ROCKCHIP=y
diff --git a/configs/rk3326-aarch32_defconfig b/configs/rk3326-aarch32_defconfig
index 06eda5d7a2..f2ea3463f7 100644
--- a/configs/rk3326-aarch32_defconfig
+++ b/configs/rk3326-aarch32_defconfig
@@ -116,5 +116,4 @@ CONFIG_AVB_LIBAVB_USER=y
 CONFIG_RK_AVB_LIBAVB_USER=y
 CONFIG_OPTEE_CLIENT=y
 CONFIG_OPTEE_V2=y
-CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
 CONFIG_TEST_ROCKCHIP=y
diff --git a/configs/rk3326_defconfig b/configs/rk3326_defconfig
index 698f4e50a5..57e49d0b13 100644
--- a/configs/rk3326_defconfig
+++ b/configs/rk3326_defconfig
@@ -133,5 +133,4 @@ CONFIG_AVB_LIBAVB_USER=y
 CONFIG_RK_AVB_LIBAVB_USER=y
 CONFIG_OPTEE_CLIENT=y
 CONFIG_OPTEE_V2=y
-CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
 CONFIG_TEST_ROCKCHIP=y

commit 3f1729266560d8b2bf3035f146009cd9bc7529bf
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Jul 16 09:25:47 2019 +0800

    configs: px30: delete CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
    
    The CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION force to use the security
    partition. But in routine situation, scan the storage device to find
    whether RPMB exist. If not, then use the security partition. So in
    conventional defconfig, delete CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION.
    
    fixes: b9a7e756c4e94fc58b5962647eaf2fa12a2146a9
    (lib: optee_client: change the condition for eMMC devices)
    
    Change-Id: Ibad49030f76a69c5f32c5deac963f49c96c9670b
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index f69bf0d290..4da8f6d3a0 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -135,5 +135,4 @@ CONFIG_ERRNO_STR=y
 # CONFIG_EFI_LOADER is not set
 CONFIG_OPTEE_CLIENT=y
 CONFIG_OPTEE_V2=y
-CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
 CONFIG_TEST_ROCKCHIP=y
diff --git a/configs/px30_defconfig b/configs/px30_defconfig
index 43449a49b3..8264e501e4 100644
--- a/configs/px30_defconfig
+++ b/configs/px30_defconfig
@@ -143,5 +143,4 @@ CONFIG_AVB_LIBAVB_USER=y
 CONFIG_RK_AVB_LIBAVB_USER=y
 CONFIG_OPTEE_CLIENT=y
 CONFIG_OPTEE_V2=y
-CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
 CONFIG_TEST_ROCKCHIP=y

commit b9a7e756c4e94fc58b5962647eaf2fa12a2146a9
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Mon Jul 15 15:51:01 2019 +0800

    lib: optee_client: change the condition for eMMC devices
    
    1.dev_desc->if_type == IF_TYPE_MMC for SD and eMMC device,
      dev_desc->devnum == 1 is SD devices,
      dev_desc->devnum == 0 is eMMC devices
    2.SD devices do not have rpmb
    3.we prefer to use rpmb for eMMC devices, use security
      partition for nand or SD devices
    
    Change-Id: Ifc21bd4da7c3ee91e2ecc845c343182c78d52dc1
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/cmd/optee.c b/cmd/optee.c
index 705ac87433..bdc8148ebd 100644
--- a/cmd/optee.c
+++ b/cmd/optee.c
@@ -43,8 +43,10 @@ int test_secure_storage_default(void)
 						    TEEC_NONE,
 						    TEEC_NONE);
 	/*0 nand or emmc "security" partition , 1 rpmb*/
-	TeecOperation.params[0].value.a =
-		(dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+	if (dev_desc->if_type == IF_TYPE_MMC && dev_desc->devnum == 0)
+		TeecOperation.params[0].value.a = 1;
+	else
+		TeecOperation.params[0].value.a = 0;
 
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				      &TeecSession,
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index 48a9ca1a76..5a7efb5ea8 100644
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -45,7 +45,10 @@ uint32_t test_optee(void)
 						TEEC_NONE,
 						TEEC_NONE);
 	/*0 nand or emmc "security" partition , 1 rpmb*/
-	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+	if (dev_desc->if_type == IF_TYPE_MMC && dev_desc->devnum == 0)
+		TeecOperation.params[0].value.a = 1;
+	else
+		TeecOperation.params[0].value.a = 0;
 #ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
 	TeecOperation.params[0].value.a = 0;
 #endif
@@ -167,7 +170,10 @@ uint32_t trusty_read_rollback_index(uint32_t slot, uint64_t *value)
 						TEEC_NONE,
 						TEEC_NONE);
 	/*0 nand or emmc "security" partition , 1 rpmb*/
-	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+	if (dev_desc->if_type == IF_TYPE_MMC && dev_desc->devnum == 0)
+		TeecOperation.params[0].value.a = 1;
+	else
+		TeecOperation.params[0].value.a = 0;
 #ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
 	TeecOperation.params[0].value.a = 0;
 #endif
@@ -260,7 +266,10 @@ uint32_t trusty_write_rollback_index(uint32_t slot, uint64_t value)
 						TEEC_NONE,
 						TEEC_NONE);
 	/*0 nand or emmc "security" partition , 1 rpmb*/
-	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+	if (dev_desc->if_type == IF_TYPE_MMC && dev_desc->devnum == 0)
+		TeecOperation.params[0].value.a = 1;
+	else
+		TeecOperation.params[0].value.a = 0;
 #ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
 	TeecOperation.params[0].value.a = 0;
 #endif
@@ -354,7 +363,11 @@ uint32_t trusty_read_permanent_attributes(uint8_t *attributes, uint32_t size)
 						TEEC_NONE,
 						TEEC_NONE);
 	/*0 nand or emmc "security" partition , 1 rpmb*/
-	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+	if (dev_desc->if_type == IF_TYPE_MMC && dev_desc->devnum == 0)
+		TeecOperation.params[0].value.a = 1;
+	else
+		TeecOperation.params[0].value.a = 0;
+
 #ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
 	TeecOperation.params[0].value.a = 0;
 #endif
@@ -446,7 +459,11 @@ uint32_t trusty_write_permanent_attributes(uint8_t *attributes, uint32_t size)
 						TEEC_NONE,
 						TEEC_NONE);
 	/*0 nand or emmc "security" partition , 1 rpmb*/
-	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+	if (dev_desc->if_type == IF_TYPE_MMC && dev_desc->devnum == 0)
+		TeecOperation.params[0].value.a = 1;
+	else
+		TeecOperation.params[0].value.a = 0;
+
 #ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
 	TeecOperation.params[0].value.a = 0;
 #endif
@@ -542,8 +559,11 @@ uint32_t trusty_read_permanent_attributes_cer(uint8_t *attributes,
 						    TEEC_NONE,
 						    TEEC_NONE);
 	/*0 nand or emmc "security" partition , 1 rpmb*/
-	TeecOperation.params[0].value.a =
-		(dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+	if (dev_desc->if_type == IF_TYPE_MMC && dev_desc->devnum == 0)
+		TeecOperation.params[0].value.a = 1;
+	else
+		TeecOperation.params[0].value.a = 0;
+
 #ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
 	TeecOperation.params[0].value.a = 0;
 #endif
@@ -629,8 +649,11 @@ uint32_t trusty_write_permanent_attributes_cer(uint8_t *attributes,
 						    TEEC_NONE,
 						    TEEC_NONE);
 	/*0 nand or emmc "security" partition , 1 rpmb*/
-	TeecOperation.params[0].value.a =
-		(dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+	if (dev_desc->if_type == IF_TYPE_MMC && dev_desc->devnum == 0)
+		TeecOperation.params[0].value.a = 1;
+	else
+		TeecOperation.params[0].value.a = 0;
+
 #ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
 	TeecOperation.params[0].value.a = 0;
 #endif
@@ -715,7 +738,11 @@ uint32_t trusty_read_lock_state(uint8_t *lock_state)
 						TEEC_NONE,
 						TEEC_NONE);
 	/*0 nand or emmc "security" partition , 1 rpmb*/
-	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+	if (dev_desc->if_type == IF_TYPE_MMC && dev_desc->devnum == 0)
+		TeecOperation.params[0].value.a = 1;
+	else
+		TeecOperation.params[0].value.a = 0;
+
 #ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
 	TeecOperation.params[0].value.a = 0;
 #endif
@@ -807,7 +834,11 @@ uint32_t trusty_write_lock_state(uint8_t lock_state)
 						TEEC_NONE,
 						TEEC_NONE);
 	/*0 nand or emmc "security" partition , 1 rpmb*/
-	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+	if (dev_desc->if_type == IF_TYPE_MMC && dev_desc->devnum == 0)
+		TeecOperation.params[0].value.a = 1;
+	else
+		TeecOperation.params[0].value.a = 0;
+
 #ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
 	TeecOperation.params[0].value.a = 0;
 #endif
@@ -901,7 +932,11 @@ uint32_t trusty_read_flash_lock_state(uint8_t *flash_lock_state)
 						TEEC_NONE,
 						TEEC_NONE);
 	/*0 nand or emmc "security" partition , 1 rpmb*/
-	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+	if (dev_desc->if_type == IF_TYPE_MMC && dev_desc->devnum == 0)
+		TeecOperation.params[0].value.a = 1;
+	else
+		TeecOperation.params[0].value.a = 0;
+
 #ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
 	TeecOperation.params[0].value.a = 0;
 #endif
@@ -994,7 +1029,11 @@ uint32_t trusty_write_flash_lock_state(uint8_t flash_lock_state)
 						TEEC_NONE,
 						TEEC_NONE);
 	/*0 nand or emmc "security" partition , 1 rpmb*/
-	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+	if (dev_desc->if_type == IF_TYPE_MMC && dev_desc->devnum == 0)
+		TeecOperation.params[0].value.a = 1;
+	else
+		TeecOperation.params[0].value.a = 0;
+
 #ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
 	TeecOperation.params[0].value.a = 0;
 #endif
@@ -1511,7 +1550,11 @@ uint32_t trusty_read_permanent_attributes_flag(uint8_t *attributes)
 						TEEC_NONE,
 						TEEC_NONE);
 	/*0 nand or emmc "security" partition , 1 rpmb*/
-	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+	if (dev_desc->if_type == IF_TYPE_MMC && dev_desc->devnum == 0)
+		TeecOperation.params[0].value.a = 1;
+	else
+		TeecOperation.params[0].value.a = 0;
+
 #ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
 	TeecOperation.params[0].value.a = 0;
 #endif
@@ -1602,7 +1645,11 @@ uint32_t trusty_write_permanent_attributes_flag(uint8_t attributes)
 						TEEC_NONE,
 						TEEC_NONE);
 	/*0 nand or emmc "security" partition , 1 rpmb*/
-	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+	if (dev_desc->if_type == IF_TYPE_MMC && dev_desc->devnum == 0)
+		TeecOperation.params[0].value.a = 1;
+	else
+		TeecOperation.params[0].value.a = 0;
+
 #ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
 	TeecOperation.params[0].value.a = 0;
 #endif
@@ -1698,7 +1745,11 @@ uint32_t trusty_attest_dh(uint8_t *dh, uint32_t *dh_size)
 						TEEC_NONE,
 						TEEC_NONE);
 	/*0 nand or emmc "security" partition , 1 rpmb*/
-	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+	if (dev_desc->if_type == IF_TYPE_MMC && dev_desc->devnum == 0)
+		TeecOperation.params[0].value.a = 1;
+	else
+		TeecOperation.params[0].value.a = 0;
+
 #ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
 	TeecOperation.params[0].value.a = 0;
 #endif
@@ -1780,7 +1831,11 @@ uint32_t trusty_attest_uuid(uint8_t *uuid, uint32_t *uuid_size)
 						TEEC_NONE,
 						TEEC_NONE);
 	/*0 nand or emmc "security" partition , 1 rpmb*/
-	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+	if (dev_desc->if_type == IF_TYPE_MMC && dev_desc->devnum == 0)
+		TeecOperation.params[0].value.a = 1;
+	else
+		TeecOperation.params[0].value.a = 0;
+
 #ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
 	TeecOperation.params[0].value.a = 0;
 #endif
@@ -1867,7 +1922,11 @@ uint32_t trusty_attest_get_ca(uint8_t *operation_start,
 						TEEC_NONE,
 						TEEC_NONE);
 	/*0 nand or emmc "security" partition , 1 rpmb*/
-	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+	if (dev_desc->if_type == IF_TYPE_MMC && dev_desc->devnum == 0)
+		TeecOperation.params[0].value.a = 1;
+	else
+		TeecOperation.params[0].value.a = 0;
+
 #ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
 	TeecOperation.params[0].value.a = 0;
 #endif
@@ -1963,7 +2022,11 @@ uint32_t trusty_attest_set_ca(uint8_t *ca_response, uint32_t *ca_response_size)
 						TEEC_NONE,
 						TEEC_NONE);
 	/*0 nand or emmc "security" partition , 1 rpmb*/
-	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+	if (dev_desc->if_type == IF_TYPE_MMC && dev_desc->devnum == 0)
+		TeecOperation.params[0].value.a = 1;
+	else
+		TeecOperation.params[0].value.a = 0;
+
 #ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
 	TeecOperation.params[0].value.a = 0;
 #endif

commit 0202ee8aefc1cbe36925b21b5fd0dce585adfb91
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Mon Jul 15 14:33:32 2019 +0800

    lib: optee_client: vboot enable if read bootflag == 1 for rk3288
    
    Change-Id: Ic59341a3bd386a5d05cc501a6841556a6375572a
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index ba3ce52c16..48a9ca1a76 100644
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -1465,8 +1465,13 @@ uint32_t trusty_read_vbootkey_enable_flag(uint8_t *flag)
 
 	if (TeecResult == TEEC_SUCCESS) {
 		memcpy(&bootflag, SharedMem0.buffer, SharedMem0.size);
+#if defined(CONFIG_ROCKCHIP_RK3288)
+		if (bootflag == 0x00000001)
+			*flag = 1;
+#else
 		if (bootflag == 0x000000FF)
 			*flag = 1;
+#endif
 	}
 exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);

commit 2556ca16c0947a02833be810c13e3b494d22cea4
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Mon May 7 22:18:27 2018 +0200

    include: update log2 header from the Linux kernel
    
    Without the patch gcc 8 produces:
    warning: ignoring attribute ‘noreturn’ because it conflicts with
    attribute ‘const’ [-Wattributes]
     int ____ilog2_NaN(void);
    
    So let's update the include from Linux kernel v4.16.
    
    This removes static checks of ilog2() arguments.
    
    Change-Id: I313759aac445d1e369ba5c478393ebfa27d988a2
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/linux/log2.h b/include/linux/log2.h
index 4ded5ee68a..d4e32ecfc6 100644
--- a/include/linux/log2.h
+++ b/include/linux/log2.h
@@ -3,6 +3,11 @@
  *
  * Copyright (C) 2006 Red Hat, Inc. All Rights Reserved.
  * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
  */
 
 #ifndef _LINUX_LOG2_H
@@ -11,12 +16,6 @@
 #include <linux/types.h>
 #include <linux/bitops.h>
 
-/*
- * deal with unrepresentable constant logarithms
- */
-extern __attribute__((const, noreturn))
-int ____ilog2_NaN(void);
-
 /*
  * non-constant log of base 2 calculators
  * - the arch may override these in asm/bitops.h if they can be implemented
@@ -39,19 +38,23 @@ int __ilog2_u64(u64 n)
 }
 #endif
 
-/*
- *  Determine whether some value is a power of two, where zero is
+/**
+ * is_power_of_2() - check if a value is a power of two
+ * @n: the value to check
+ *
+ * Determine whether some value is a power of two, where zero is
  * *not* considered a power of two.
+ * Return: true if @n is a power of 2, otherwise false.
  */
-
 static inline __attribute__((const))
 bool is_power_of_2(unsigned long n)
 {
 	return (n != 0 && ((n & (n - 1)) == 0));
 }
 
-/*
- * round up to nearest power of two
+/**
+ * __roundup_pow_of_two() - round up to nearest power of two
+ * @n: value to round up
  */
 static inline __attribute__((const))
 unsigned long __roundup_pow_of_two(unsigned long n)
@@ -59,8 +62,9 @@ unsigned long __roundup_pow_of_two(unsigned long n)
 	return 1UL << fls_long(n - 1);
 }
 
-/*
- * round down to nearest power of two
+/**
+ * __rounddown_pow_of_two() - round down to nearest power of two
+ * @n: value to round down
  */
 static inline __attribute__((const))
 unsigned long __rounddown_pow_of_two(unsigned long n)
@@ -69,19 +73,19 @@ unsigned long __rounddown_pow_of_two(unsigned long n)
 }
 
 /**
- * ilog2 - log of base 2 of 32-bit or a 64-bit unsigned value
- * @n - parameter
+ * ilog2 - log base 2 of 32-bit or a 64-bit unsigned value
+ * @n: parameter
  *
  * constant-capable log of base 2 calculation
  * - this can be used to initialise global variables from constant data, hence
- *   the massive ternary operator construction
+ * the massive ternary operator construction
  *
  * selects the appropriately-sized optimised version depending on sizeof(n)
  */
 #define ilog2(n)				\
 (						\
 	__builtin_constant_p(n) ? (		\
-		(n) < 1 ? ____ilog2_NaN() :	\
+		(n) < 2 ? 0 :			\
 		(n) & (1ULL << 63) ? 63 :	\
 		(n) & (1ULL << 62) ? 62 :	\
 		(n) & (1ULL << 61) ? 61 :	\
@@ -144,10 +148,7 @@ unsigned long __rounddown_pow_of_two(unsigned long n)
 		(n) & (1ULL <<  4) ?  4 :	\
 		(n) & (1ULL <<  3) ?  3 :	\
 		(n) & (1ULL <<  2) ?  2 :	\
-		(n) & (1ULL <<  1) ?  1 :	\
-		(n) & (1ULL <<  0) ?  0 :	\
-		____ilog2_NaN()			\
-				   ) :		\
+		1) :				\
 	(sizeof(n) <= 4) ?			\
 	__ilog2_u32(n) :			\
 	__ilog2_u64(n)				\
@@ -155,7 +156,7 @@ unsigned long __rounddown_pow_of_two(unsigned long n)
 
 /**
  * roundup_pow_of_two - round the given value up to nearest power of two
- * @n - parameter
+ * @n: parameter
  *
  * round the given value up to the nearest power of two
  * - the result is undefined when n == 0
@@ -172,7 +173,7 @@ unsigned long __rounddown_pow_of_two(unsigned long n)
 
 /**
  * rounddown_pow_of_two - round the given value down to nearest power of two
- * @n - parameter
+ * @n: parameter
  *
  * round the given value down to the nearest power of two
  * - the result is undefined when n == 0
@@ -185,6 +186,12 @@ unsigned long __rounddown_pow_of_two(unsigned long n)
 	__rounddown_pow_of_two(n)		\
  )
 
+static inline __attribute_const__
+int __order_base_2(unsigned long n)
+{
+	return n > 1 ? ilog2(n - 1) + 1 : 0;
+}
+
 /**
  * order_base_2 - calculate the (rounded up) base 2 order of the argument
  * @n: parameter
@@ -198,7 +205,11 @@ unsigned long __rounddown_pow_of_two(unsigned long n)
  *  ob2(5) = 3
  *  ... and so on.
  */
-
-#define order_base_2(n) ilog2(roundup_pow_of_two(n))
-
+#define order_base_2(n)				\
+(						\
+	__builtin_constant_p(n) ? (		\
+		((n) == 0 || (n) == 1) ? 0 :	\
+		ilog2((n) - 1) + 1) :		\
+	__order_base_2(n)			\
+)
 #endif /* _LINUX_LOG2_H */

commit 2f61549f3d2336ce511c606a847a60398b9aab6a
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Jul 12 11:55:06 2019 +0800

    include: log2: update license format
    
    Change-Id: I83faacafca564b52de987c8af851d2979ce80f30
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/linux/log2.h b/include/linux/log2.h
index aa1de63090..4ded5ee68a 100644
--- a/include/linux/log2.h
+++ b/include/linux/log2.h
@@ -1,9 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /* Integer base 2 logarithm calculation
  *
  * Copyright (C) 2006 Red Hat, Inc. All Rights Reserved.
  * Written by David Howells (dhowells@redhat.com)
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef _LINUX_LOG2_H

commit d9cdd3188bda965c1704d72b1b8a57a3efc34958
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Jul 12 08:50:29 2019 +0800

    rkflash: add new SPI Nand flash
    
    FM25S01, HYF1GQ4UPACAE, EM73E044SNA-G, GD5F2GQ5UEYIG
    
    Change-Id: Ied88add0b99e6aa733a59990c267b1802a9c9b79
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/sfc_nand.c b/drivers/rkflash/sfc_nand.c
index 012e1d1d00..49c350b850 100644
--- a/drivers/rkflash/sfc_nand.c
+++ b/drivers/rkflash/sfc_nand.c
@@ -69,6 +69,14 @@ static struct nand_info spi_nand_tbl[] = {
 	{0x0BF1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xB0, 0x0, 8, 12, &sfc_nand_ecc_status_sp4},
 	/* HYF4GQ4UAACBE */
 	{0xC9D4, 8, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 20, 4, 0xB0, 0, 32, 64, NULL},
+	/* FM25S01 */
+	{0xA1A1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xB0, 0, 0, 4, &sfc_nand_ecc_status_sp1},
+	/* HYF1GQ4UPACAE */
+	{0xC9A1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 4, 0xB0, 0, 4, 20, &sfc_nand_ecc_status_sp1},
+	/* EM73E044SNA-G */
+	{0xD503, 8, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 20, 8, 0xB0, 0, 4, 40, NULL},
+	/* GD5F2GQ5UEYIG */
+	{0xC852, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 4, 0xB0, 0, 4, 20, &sfc_nand_ecc_status_sp2},
 };
 
 static u8 id_byte[8];
@@ -245,6 +253,47 @@ u32 sfc_nand_ecc_status_sp1(void)
 	return ret;
 }
 
+/*
+ * ecc spectial type2:
+ * [0x0000, 0x0011], No bit errors were detected;
+ * [0x0100, 0x0111], Bit errors were detected and corrected. Not
+ *	reach Flipping Bits;
+ * [0x1000, 0x1011], Multiple bit errors were detected and
+ *	not corrected;
+ * [0x1100, 0x1111], reserved.
+ */
+u32 sfc_nand_ecc_status_sp2(void)
+{
+	int ret;
+	u32 i;
+	u8 ecc;
+	u8 status, status1;
+	u32 timeout = 1000 * 1000;
+
+	for (i = 0; i < timeout; i++) {
+		ret = sfc_nand_read_feature(0xC0, &status);
+		if (ret != SFC_OK)
+			return SFC_NAND_ECC_ERROR;
+		ret = sfc_nand_read_feature(0xF0, &status1);
+		if (ret != SFC_OK)
+			return SFC_NAND_ECC_ERROR;
+		if (!(status & (1 << 0)))
+			break;
+		sfc_delay(1);
+	}
+
+	ecc = (status >> 4) & 0x03;
+	ecc = (ecc << 2) | ((status1 >> 4) & 0x03);
+	if (ecc < 7)
+		ret = SFC_NAND_ECC_OK;
+	else if (ecc == 7)
+		ret = SFC_NAND_ECC_REFRESH;
+	else
+		ret = SFC_NAND_ECC_ERROR;
+
+	return ret;
+}
+
 /*
  * ecc spectial type3:
  * [0x0000, 0x0011], No bit errors were detected;
diff --git a/drivers/rkflash/sfc_nand.h b/drivers/rkflash/sfc_nand.h
index c3ddf85200..c99ec5ab63 100644
--- a/drivers/rkflash/sfc_nand.h
+++ b/drivers/rkflash/sfc_nand.h
@@ -126,6 +126,7 @@ u32 sfc_nand_init(void);
 void sfc_nand_deinit(void);
 int sfc_nand_read_id(u8 *buf);
 u32 sfc_nand_ecc_status_sp1(void);
+u32 sfc_nand_ecc_status_sp2(void);
 u32 sfc_nand_ecc_status_sp3(void);
 u32 sfc_nand_ecc_status_sp4(void);
 u32 sfc_nand_ecc_status_sp5(void);

commit 1d30bcc50cc75cc50f7bb3d5a25af0ee6a71279d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 8 17:52:10 2019 +0800

    rockchip: resource: support parse "logo" partition picture
    
    We provide a "logo" partition for user to store logo.bmp
    and update from kernel user space dynamically.
    
    This patch follows the rkdevelop usage:
    - Only support store one picture named "logo.bmp";
    - Use "dd" command to generate partition image with logo.img
      eg: "dd if=logo.bmp of=logo.img count=1 bs=19456"
    
    Change-Id: Iffde4d123e303c010d99cd446c241a535bce1dcf
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 83d0faf584..5fdad4412a 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -5,10 +5,12 @@
  */
 #include <common.h>
 #include <adc.h>
+#include <bmp_layout.h>
 #include <asm/io.h>
 #include <fs.h>
 #include <malloc.h>
 #include <sysmem.h>
+#include <asm/unaligned.h>
 #include <linux/list.h>
 #include <asm/arch/resource_img.h>
 #include <boot_rkimg.h>
@@ -165,6 +167,7 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 	int offset = 0;
 	int resource_found = 0;
 	struct blk_desc *dev_desc;
+	struct bmp_header *header;
 	disk_partition_t part_info;
 	char *boot_partname = PART_BOOT;
 
@@ -317,6 +320,65 @@ next:
 
 	ret = 0;
 	printf("Load FDT from %s part\n", boot_partname);
+
+	/*
+	 * Add logo.bmp from "logo" parititon
+	 *
+	 * We provide a "logo" partition for user to store logo.bmp
+	 * and update from kernel user space dynamically.
+	 */
+	if (part_get_info_by_name(dev_desc, PART_LOGO, &part_info) >= 0) {
+		struct resource_file *file;
+		struct list_head *node;
+
+		header = memalign(ARCH_DMA_MINALIGN, RK_BLK_SIZE);
+		if (!header) {
+			ret = -ENOMEM;
+			goto err;
+		}
+
+		ret = blk_dread(dev_desc, part_info.start, 1, header);
+		if (ret != 1) {
+			ret = -EIO;
+			goto err2;
+		}
+
+		if (header->signature[0] != 'B' ||
+		    header->signature[1] != 'M') {
+			ret = 0;
+			goto err2;
+		}
+
+		entry = malloc(sizeof(*entry));
+		if (!entry) {
+			ret = -ENOMEM;
+			goto err2;
+		}
+
+		memcpy(entry->tag, ENTRY_TAG, sizeof(ENTRY_TAG));
+		memcpy(entry->name, "logo.bmp", sizeof("logo.bmp"));
+		entry->f_size = get_unaligned_le32(&header->file_size);
+		entry->f_offset = 0;
+
+		/* Delete exist "logo.bmp", then add new */
+		list_for_each(node, &entrys_head) {
+			file = list_entry(node,
+					  struct resource_file, link);
+			if (!strcmp(file->name, entry->name)) {
+				list_del(&file->link);
+				free(file);
+				break;
+			}
+		}
+
+		add_file_to_list(entry, part_info.start);
+		free(entry);
+		printf("Load \"logo.bmp\" from logo part\n");
+		ret = 0;
+err2:
+		free(header);
+	}
+
 err:
 	free(content);
 out:
diff --git a/include/boot_rkimg.h b/include/boot_rkimg.h
index 954c8fec09..14e077847c 100644
--- a/include/boot_rkimg.h
+++ b/include/boot_rkimg.h
@@ -26,6 +26,7 @@ enum _boot_mode {
 #define PART_BOOT			"boot"
 #define PART_RECOVERY			"recovery"
 #define PART_DTBO			"dtbo"
+#define PART_LOGO			"logo"
 
 #define RK_BLK_SIZE 512
 

commit 47e67a816e0de3a0b24f88a60f0c605ba605718b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 8 12:05:14 2019 +0800

    rockchip: boot mode: remove "recovery" partition lookup for recovery mode
    
    Since we have unified android and linux image format that "recovery" partition
    is necessary, we remove partition lookup when recovery mode is required.
    
    Anyway, there is no recovery partition in A/B system and recovery ramdisk
    has been moved to boot.img, and adding this judgment code is a little mess.
    
    Change-Id: I9f590f464a14ac25855b8a9487c55cec8d353890
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index 96361bf6d7..a14109f7fe 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -156,28 +156,7 @@ void rockchip_dnl_mode_check(void)
 			set_back_to_bootrom_dnl_flag();
 			do_reset(NULL, 0, 0, NULL);
 		} else {
-			printf("\n");
-#ifdef CONFIG_RKIMG_BOOTLOADER
-			/* If there is no recovery partition, just boot on */
-			struct blk_desc *dev_desc;
-			disk_partition_t part_info;
-			int ret;
-
-			dev_desc = rockchip_get_bootdev();
-			if (!dev_desc) {
-				printf("%s: dev_desc is NULL!\n", __func__);
-				return;
-			}
-
-			ret = part_get_info_by_name(dev_desc,
-						    PART_RECOVERY,
-						    &part_info);
-			if (ret < 0) {
-				debug("%s: no recovery partition\n", __func__);
-				return;
-			}
-#endif
-			printf("recovery key pressed, entering recovery mode!\n");
+			printf("entering recovery mode!\n");
 			env_set("reboot_mode", "recovery");
 		}
 	} else if (is_hotkey(HK_FASTBOOT)) {

commit d851b9175cc826c2d5605092b43a6b6dac7d3ce7
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed Jul 10 17:52:36 2019 +0800

    include: rk3036: rm CONFIG_MTD_DEVICE which is redefined
    
    Change-Id: I835b7600bc67cb1d417a3a65e2a717ae6815040d
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/include/configs/rk3066_common.h b/include/configs/rk3066_common.h
index b5a0a66d2e..94d2ebb7e1 100644
--- a/include/configs/rk3066_common.h
+++ b/include/configs/rk3066_common.h
@@ -57,7 +57,6 @@
 #define CONFIG_SYS_NAND_U_BOOT_DST	CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_NAND_U_BOOT_SIZE	0x80000
 #define CONFIG_EXTRA_ENV_SETTINGS ROCKCHIP_DEVICE_SETTINGS
-#define CONFIG_MTD_DEVICE
 #endif
 
 #include <config_distro_defaults.h>
@@ -66,7 +65,6 @@
 
 #define CONFIG_USB_FUNCTION_MASS_STORAGE
 
-#define CONFIG_MTD_DEVICE
 #define MTDIDS_DEFAULT			"nand0=rockchip-nand.0"
 
 #define ENV_MEM_LAYOUT_SETTINGS \

commit d864de69ceddad1fbcbabdb182215155d4cf967e
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed Jul 10 17:51:56 2019 +0800

    defconfig: rockchip: rm MTD nand support
    
    Change-Id: I6ae494789075c86835ebbcf4ee5b7ce9eb0d98b4
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/configs/evb-rk3066_defconfig b/configs/evb-rk3066_defconfig
index 6f32c06024..953c8a7ebe 100644
--- a/configs/evb-rk3066_defconfig
+++ b/configs/evb-rk3066_defconfig
@@ -62,11 +62,9 @@ CONFIG_G_DNL_PRODUCT_NUM=0x300a
 CONFIG_BOARD_LATE_INIT=y
 CONFIG_MTD_DEVICE=y
 CONFIG_NAND_ROCKCHIP=y
-CONFIG_CMD_NAND=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_MTD_PARTITIONS=y
 CONFIG_NAND=y
-CONFIG_DFU_NAND=y
 CONFIG_USB_FUNCTION_DFU=y
 CONFIG_DFU_RAM=y
 CONFIG_CMD_DFU=y
@@ -76,8 +74,6 @@ CONFIG_SPL_DFU_RAM=y
 CONFIG_SPL_DFU_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_MTD_SUPPORT=y
-CONFIG_SPL_NAND_SUPPORT=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_SPL_RAM=y

commit d3a731eb0a985e5d1c850e7e2fb3aa348ca27935
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jul 10 20:36:23 2019 +0800

    rockchip: rk1808: add CONFIG_SUPPORT_EMMC_RPMB
    
    This config is used to open the MMC RPMB driver.
    
    Change-Id: Ie58ff510221e75743f10222dab2ebedd81b6bf56
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/configs/rk1808_common.h b/include/configs/rk1808_common.h
index 836acae37f..480824ddfe 100644
--- a/include/configs/rk1808_common.h
+++ b/include/configs/rk1808_common.h
@@ -24,6 +24,7 @@
 
 /* MMC/SD IP block */
 #define CONFIG_BOUNCE_BUFFER
+#define CONFIG_SUPPORT_EMMC_RPMB
 
 #define CONFIG_SYS_SDRAM_BASE		0
 #define SDRAM_MAX_SIZE			0xf8000000

commit fb504314e848813de0b66fd7218fd6c15673b6f1
Author: Quentin Schulz <quentin.schulz@bootlin.com>
Date:   Thu Jan 17 10:18:47 2019 +0100

    UPSTREAM: cmd: mtd: fix compilation warning for help when SYS_LONGHELP=n
    
    cmd/mtd.c:447:13: warning: ‘mtd_help_text’ defined but not used [-Wunused-variable]
    static char mtd_help_text[] =
                ^~~~~~~~~~~~~
    
    When SYS_LONGHELP is not defined. After looking at how other commands
    work, we should surround the whole help text (even its declaration) with
    an #ifdef CONFIG_SYS_LONGHELP, since it's compiled out when calling
    _CMD_HELP[1] on the help text variable argument to U_BOOT_CMD.
    
    [1] https://elixir.bootlin.com/u-boot/latest/source/include/command.h#L181
    
    Change-Id: If84aae3167fd8826e33f717b7debefe32920dd0b
    Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
    Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit a645831ca0962532660e4db3155a8be85e5ca312)

diff --git a/cmd/mtd.c b/cmd/mtd.c
index cda702d18b..1b6b8dda2b 100644
--- a/cmd/mtd.c
+++ b/cmd/mtd.c
@@ -519,8 +519,8 @@ static int mtd_name_complete(int argc, char * const argv[], char last_char,
 }
 #endif /* CONFIG_AUTO_COMPLETE */
 
-static char mtd_help_text[] =
 #ifdef CONFIG_SYS_LONGHELP
+static char mtd_help_text[] =
 	"- generic operations on memory technology devices\n\n"
 	"mtd list\n"
 	"mtd read[.raw][.oob]                  <name> <addr> [<off> [<size>]]\n"
@@ -541,9 +541,8 @@ static char mtd_help_text[] =
 	"\t\t* must be a multiple of a block for erase\n"
 	"\t\t* must be a multiple of a page otherwise (special case: default is a page with dump)\n"
 	"\n"
-	"The .dontskipff option forces writing empty pages, don't use it if unsure.\n"
+	"The .dontskipff option forces writing empty pages, don't use it if unsure.\n";
 #endif
-	"";
 
 U_BOOT_CMD_WITH_SUBCMDS(mtd, "MTD utils", mtd_help_text,
 		U_BOOT_SUBCMD_MKENT(list, 1, 1, do_mtd_list),

commit b3d8fba6e05f1408b0169b02b32dfde530affe5b
Author: Boris Brezillon <boris.brezillon@bootlin.com>
Date:   Mon Dec 3 22:54:22 2018 +0100

    cmd: mtd: Use the subcmd infrastructure to declare mtd sub-commands
    
    It's way simpler this way, and we also gain auto-completion support for
    free (MTD name auto-completion has been added with mtd_name_complete())
    
    change-Id: I4292fde7affaddd8eb5a51fe8ec4265ae4984a21
    Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
    Reviewed-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 9671243e8d10defb06f2ea24fac138c87697d7fc)

diff --git a/cmd/mtd.c b/cmd/mtd.c
index 6142223984..cda702d18b 100644
--- a/cmd/mtd.c
+++ b/cmd/mtd.c
@@ -15,6 +15,22 @@
 #include <mapmem.h>
 #include <mtd.h>
 
+#include <linux/ctype.h>
+
+static struct mtd_info *get_mtd_by_name(const char *name)
+{
+	struct mtd_info *mtd;
+
+	mtd_probe_devices();
+
+	mtd = get_mtd_device_nm(name);
+	if (IS_ERR_OR_NULL(mtd))
+		printf("MTD device %s not found, ret %ld\n", name,
+		       PTR_ERR(mtd));
+
+	return mtd;
+}
+
 static uint mtd_len_to_pages(struct mtd_info *mtd, u64 len)
 {
 	do_div(len, mtd->writesize);
@@ -177,7 +193,8 @@ static bool mtd_oob_write_is_empty(struct mtd_oob_ops *op)
 	return true;
 }
 
-static int do_mtd_list(void)
+static int do_mtd_list(cmd_tbl_t *cmdtp, int flag, int argc,
+		       char * const argv[])
 {
 	struct mtd_info *mtd;
 	int dev_nb = 0;
@@ -221,229 +238,287 @@ static int mtd_special_write_oob(struct mtd_info *mtd, u64 off,
 	return ret;
 }
 
-static int do_mtd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_mtd_io(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
+	bool dump, read, raw, woob, write_empty_pages, has_pages = false;
+	u64 start_off, off, len, remaining, default_len;
+	struct mtd_oob_ops io_op = {};
+	uint user_addr = 0, npages;
+	const char *cmd = argv[0];
 	struct mtd_info *mtd;
-	const char *cmd;
-	char *mtd_name;
+	u32 oob_len;
+	u8 *buf;
+	int ret;
 
-	/* All MTD commands need at least two arguments */
 	if (argc < 2)
 		return CMD_RET_USAGE;
 
-	/* Parse the command name and its optional suffixes */
-	cmd = argv[1];
+	mtd = get_mtd_by_name(argv[1]);
+	if (IS_ERR_OR_NULL(mtd))
+		return CMD_RET_FAILURE;
 
-	/* List the MTD devices if that is what the user wants */
-	if (strcmp(cmd, "list") == 0)
-		return do_mtd_list();
+	if (mtd->type == MTD_NANDFLASH || mtd->type == MTD_MLCNANDFLASH)
+		has_pages = true;
 
-	/*
-	 * The remaining commands require also at least a device ID.
-	 * Check the selected device is valid. Ensure it is probed.
-	 */
-	if (argc < 3)
-		return CMD_RET_USAGE;
+	dump = !strncmp(cmd, "dump", 4);
+	read = dump || !strncmp(cmd, "read", 4);
+	raw = strstr(cmd, ".raw");
+	woob = strstr(cmd, ".oob");
+	write_empty_pages = !has_pages || strstr(cmd, ".dontskipff");
 
-	mtd_name = argv[2];
-	mtd_probe_devices();
-	mtd = get_mtd_device_nm(mtd_name);
-	if (IS_ERR_OR_NULL(mtd)) {
-		printf("MTD device %s not found, ret %ld\n",
-		       mtd_name, PTR_ERR(mtd));
-		return CMD_RET_FAILURE;
-	}
-	put_mtd_device(mtd);
+	argc -= 2;
+	argv += 2;
 
-	argc -= 3;
-	argv += 3;
-
-	/* Do the parsing */
-	if (!strncmp(cmd, "read", 4) || !strncmp(cmd, "dump", 4) ||
-	    !strncmp(cmd, "write", 5)) {
-		bool has_pages = mtd->type == MTD_NANDFLASH ||
-				 mtd->type == MTD_MLCNANDFLASH;
-		bool dump, read, raw, woob, write_empty_pages;
-		struct mtd_oob_ops io_op = {};
-		uint user_addr = 0, npages;
-		u64 start_off, off, len, remaining, default_len;
-		u32 oob_len;
-		u8 *buf;
-		int ret;
-
-		dump = !strncmp(cmd, "dump", 4);
-		read = dump || !strncmp(cmd, "read", 4);
-		raw = strstr(cmd, ".raw");
-		woob = strstr(cmd, ".oob");
-		write_empty_pages = !has_pages || strstr(cmd, ".dontskipff");
-
-		if (!dump) {
-			if (!argc)
-				return CMD_RET_USAGE;
-
-			user_addr = simple_strtoul(argv[0], NULL, 16);
-			argc--;
-			argv++;
+	if (!dump) {
+		if (!argc) {
+			ret = CMD_RET_USAGE;
+			goto out_put_mtd;
 		}
 
-		start_off = argc > 0 ? simple_strtoul(argv[0], NULL, 16) : 0;
-		if (!mtd_is_aligned_with_min_io_size(mtd, start_off)) {
-			printf("Offset not aligned with a page (0x%x)\n",
-			       mtd->writesize);
-			return CMD_RET_FAILURE;
-		}
+		user_addr = simple_strtoul(argv[0], NULL, 16);
+		argc--;
+		argv++;
+	}
 
-		default_len = dump ? mtd->writesize : mtd->size;
-		len = argc > 1 ? simple_strtoul(argv[1], NULL, 16) :
-				 default_len;
-		if (!mtd_is_aligned_with_min_io_size(mtd, len)) {
-			len = round_up(len, mtd->writesize);
-			printf("Size not on a page boundary (0x%x), rounding to 0x%llx\n",
-			       mtd->writesize, len);
-		}
+	start_off = argc > 0 ? simple_strtoul(argv[0], NULL, 16) : 0;
+	if (!mtd_is_aligned_with_min_io_size(mtd, start_off)) {
+		printf("Offset not aligned with a page (0x%x)\n",
+		       mtd->writesize);
+		ret = CMD_RET_FAILURE;
+		goto out_put_mtd;
+	}
 
-		remaining = len;
-		npages = mtd_len_to_pages(mtd, len);
-		oob_len = woob ? npages * mtd->oobsize : 0;
+	default_len = dump ? mtd->writesize : mtd->size;
+	len = argc > 1 ? simple_strtoul(argv[1], NULL, 16) : default_len;
+	if (!mtd_is_aligned_with_min_io_size(mtd, len)) {
+		len = round_up(len, mtd->writesize);
+		printf("Size not on a page boundary (0x%x), rounding to 0x%llx\n",
+		       mtd->writesize, len);
+	}
 
-		if (dump)
-			buf = kmalloc(len + oob_len, GFP_KERNEL);
-		else
-			buf = map_sysmem(user_addr, 0);
+	remaining = len;
+	npages = mtd_len_to_pages(mtd, len);
+	oob_len = woob ? npages * mtd->oobsize : 0;
 
-		if (!buf) {
-			printf("Could not map/allocate the user buffer\n");
-			return CMD_RET_FAILURE;
+	if (dump)
+		buf = kmalloc(len + oob_len, GFP_KERNEL);
+	else
+		buf = map_sysmem(user_addr, 0);
+
+	if (!buf) {
+		printf("Could not map/allocate the user buffer\n");
+		ret = CMD_RET_FAILURE;
+		goto out_put_mtd;
+	}
+
+	if (has_pages)
+		printf("%s %lld byte(s) (%d page(s)) at offset 0x%08llx%s%s%s\n",
+		       read ? "Reading" : "Writing", len, npages, start_off,
+		       raw ? " [raw]" : "", woob ? " [oob]" : "",
+		       !read && write_empty_pages ? " [dontskipff]" : "");
+	else
+		printf("%s %lld byte(s) at offset 0x%08llx\n",
+		       read ? "Reading" : "Writing", len, start_off);
+
+	io_op.mode = raw ? MTD_OPS_RAW : MTD_OPS_AUTO_OOB;
+	io_op.len = has_pages ? mtd->writesize : len;
+	io_op.ooblen = woob ? mtd->oobsize : 0;
+	io_op.datbuf = buf;
+	io_op.oobbuf = woob ? &buf[len] : NULL;
+
+	/* Search for the first good block after the given offset */
+	off = start_off;
+	while (mtd_block_isbad(mtd, off))
+		off += mtd->erasesize;
+
+	/* Loop over the pages to do the actual read/write */
+	while (remaining) {
+		/* Skip the block if it is bad */
+		if (mtd_is_aligned_with_block_size(mtd, off) &&
+		    mtd_block_isbad(mtd, off)) {
+			off += mtd->erasesize;
+			continue;
 		}
 
-		if (has_pages)
-			printf("%s %lld byte(s) (%d page(s)) at offset 0x%08llx%s%s%s\n",
-			       read ? "Reading" : "Writing", len, npages, start_off,
-			       raw ? " [raw]" : "", woob ? " [oob]" : "",
-			       !read && write_empty_pages ? " [dontskipff]" : "");
+		if (read)
+			ret = mtd_read_oob(mtd, off, &io_op);
 		else
-			printf("%s %lld byte(s) at offset 0x%08llx\n",
-			       read ? "Reading" : "Writing", len, start_off);
-
-		io_op.mode = raw ? MTD_OPS_RAW : MTD_OPS_AUTO_OOB;
-		io_op.len = has_pages ? mtd->writesize : len;
-		io_op.ooblen = woob ? mtd->oobsize : 0;
-		io_op.datbuf = buf;
-		io_op.oobbuf = woob ? &buf[len] : NULL;
-
-		/* Search for the first good block after the given offset */
-		off = start_off;
-		while (mtd_block_isbad(mtd, off))
-			off += mtd->erasesize;
+			ret = mtd_special_write_oob(mtd, off, &io_op,
+						    write_empty_pages, woob);
 
-		/* Loop over the pages to do the actual read/write */
-		while (remaining) {
-			/* Skip the block if it is bad */
-			if (mtd_is_aligned_with_block_size(mtd, off) &&
-			    mtd_block_isbad(mtd, off)) {
-				off += mtd->erasesize;
-				continue;
-			}
+		if (ret) {
+			printf("Failure while %s at offset 0x%llx\n",
+			       read ? "reading" : "writing", off);
+			break;
+		}
 
-			if (read)
-				ret = mtd_read_oob(mtd, off, &io_op);
-			else
-				ret = mtd_special_write_oob(mtd, off, &io_op,
-							    write_empty_pages,
-							    woob);
-
-			if (ret) {
-				printf("Failure while %s at offset 0x%llx\n",
-				       read ? "reading" : "writing", off);
-				return CMD_RET_FAILURE;
-			}
+		off += io_op.retlen;
+		remaining -= io_op.retlen;
+		io_op.datbuf += io_op.retlen;
+		io_op.oobbuf += io_op.oobretlen;
+	}
 
-			off += io_op.retlen;
-			remaining -= io_op.retlen;
-			io_op.datbuf += io_op.retlen;
-			io_op.oobbuf += io_op.oobretlen;
-		}
+	if (!ret && dump)
+		mtd_dump_device_buf(mtd, start_off, buf, len, woob);
 
-		if (!ret && dump)
-			mtd_dump_device_buf(mtd, start_off, buf, len, woob);
+	if (dump)
+		kfree(buf);
+	else
+		unmap_sysmem(buf);
 
-		if (dump)
-			kfree(buf);
-		else
-			unmap_sysmem(buf);
+	if (ret) {
+		printf("%s on %s failed with error %d\n",
+		       read ? "Read" : "Write", mtd->name, ret);
+		ret = CMD_RET_FAILURE;
+	} else {
+		ret = CMD_RET_SUCCESS;
+	}
 
-		if (ret) {
-			printf("%s on %s failed with error %d\n",
-			       read ? "Read" : "Write", mtd->name, ret);
-			return CMD_RET_FAILURE;
-		}
+out_put_mtd:
+	put_mtd_device(mtd);
 
-	} else if (!strcmp(cmd, "erase")) {
-		bool scrub = strstr(cmd, ".dontskipbad");
-		struct erase_info erase_op = {};
-		u64 off, len;
-		int ret;
+	return ret;
+}
 
-		off = argc > 0 ? simple_strtoul(argv[0], NULL, 16) : 0;
-		len = argc > 1 ? simple_strtoul(argv[1], NULL, 16) : mtd->size;
+static int do_mtd_erase(cmd_tbl_t *cmdtp, int flag, int argc,
+			char * const argv[])
+{
+	struct erase_info erase_op = {};
+	struct mtd_info *mtd;
+	u64 off, len;
+	bool scrub;
+	int ret;
 
-		if (!mtd_is_aligned_with_block_size(mtd, off)) {
-			printf("Offset not aligned with a block (0x%x)\n",
-			       mtd->erasesize);
-			return CMD_RET_FAILURE;
-		}
+	if (argc < 2)
+		return CMD_RET_USAGE;
 
-		if (!mtd_is_aligned_with_block_size(mtd, len)) {
-			printf("Size not a multiple of a block (0x%x)\n",
-			       mtd->erasesize);
-			return CMD_RET_FAILURE;
-		}
+	mtd = get_mtd_by_name(argv[1]);
+	if (IS_ERR_OR_NULL(mtd))
+		return CMD_RET_FAILURE;
 
-		printf("Erasing 0x%08llx ... 0x%08llx (%d eraseblock(s))\n",
-		       off, off + len - 1, mtd_div_by_eb(len, mtd));
+	scrub = strstr(argv[0], ".dontskipbad");
 
-		erase_op.mtd = mtd;
-		erase_op.addr = off;
-		erase_op.len = len;
-		erase_op.scrub = scrub;
+	argc -= 2;
+	argv += 2;
 
-		while (erase_op.len) {
-			ret = mtd_erase(mtd, &erase_op);
+	off = argc > 0 ? simple_strtoul(argv[0], NULL, 16) : 0;
+	len = argc > 1 ? simple_strtoul(argv[1], NULL, 16) : mtd->size;
 
-			/* Abort if its not a bad block error */
-			if (ret != -EIO)
-				break;
+	if (!mtd_is_aligned_with_block_size(mtd, off)) {
+		printf("Offset not aligned with a block (0x%x)\n",
+		       mtd->erasesize);
+		ret = CMD_RET_FAILURE;
+		goto out_put_mtd;
+	}
 
-			printf("Skipping bad block at 0x%08llx\n",
-			       erase_op.fail_addr);
+	if (!mtd_is_aligned_with_block_size(mtd, len)) {
+		printf("Size not a multiple of a block (0x%x)\n",
+		       mtd->erasesize);
+		ret = CMD_RET_FAILURE;
+		goto out_put_mtd;
+	}
 
-			/* Skip bad block and continue behind it */
-			erase_op.len -= erase_op.fail_addr - erase_op.addr;
-			erase_op.len -= mtd->erasesize;
-			erase_op.addr = erase_op.fail_addr + mtd->erasesize;
-		}
+	printf("Erasing 0x%08llx ... 0x%08llx (%d eraseblock(s))\n",
+	       off, off + len - 1, mtd_div_by_eb(len, mtd));
 
-		if (ret && ret != -EIO)
-			return CMD_RET_FAILURE;
-	} else if (!strcmp(cmd, "bad")) {
-		loff_t off;
+	erase_op.mtd = mtd;
+	erase_op.addr = off;
+	erase_op.len = len;
+	erase_op.scrub = scrub;
 
-		if (!mtd_can_have_bb(mtd)) {
-			printf("Only NAND-based devices can have bad blocks\n");
-			return CMD_RET_SUCCESS;
-		}
+	while (erase_op.len) {
+		ret = mtd_erase(mtd, &erase_op);
 
-		printf("MTD device %s bad blocks list:\n", mtd->name);
-		for (off = 0; off < mtd->size; off += mtd->erasesize)
-			if (mtd_block_isbad(mtd, off))
-				printf("\t0x%08llx\n", off);
-	} else {
+		/* Abort if its not a bad block error */
+		if (ret != -EIO)
+			break;
+
+		printf("Skipping bad block at 0x%08llx\n", erase_op.fail_addr);
+
+		/* Skip bad block and continue behind it */
+		erase_op.len -= erase_op.fail_addr - erase_op.addr;
+		erase_op.len -= mtd->erasesize;
+		erase_op.addr = erase_op.fail_addr + mtd->erasesize;
+	}
+
+	if (ret && ret != -EIO)
+		ret = CMD_RET_FAILURE;
+	else
+		ret = CMD_RET_SUCCESS;
+
+out_put_mtd:
+	put_mtd_device(mtd);
+
+	return ret;
+}
+
+static int do_mtd_bad(cmd_tbl_t *cmdtp, int flag, int argc,
+		      char * const argv[])
+{
+	struct mtd_info *mtd;
+	loff_t off;
+
+	if (argc < 2)
 		return CMD_RET_USAGE;
+
+	mtd = get_mtd_by_name(argv[1]);
+	if (IS_ERR_OR_NULL(mtd))
+		return CMD_RET_FAILURE;
+
+	if (!mtd_can_have_bb(mtd)) {
+		printf("Only NAND-based devices can have bad blocks\n");
+		goto out_put_mtd;
+	}
+
+	printf("MTD device %s bad blocks list:\n", mtd->name);
+	for (off = 0; off < mtd->size; off += mtd->erasesize) {
+		if (mtd_block_isbad(mtd, off))
+			printf("\t0x%08llx\n", off);
 	}
 
+out_put_mtd:
+	put_mtd_device(mtd);
+
 	return CMD_RET_SUCCESS;
 }
 
+#ifdef CONFIG_AUTO_COMPLETE
+static int mtd_name_complete(int argc, char * const argv[], char last_char,
+			     int maxv, char *cmdv[])
+{
+	int len = 0, n_found = 0;
+	struct mtd_info *mtd;
+
+	argc--;
+	argv++;
+
+	if (argc > 1 ||
+	    (argc == 1 && (last_char == '\0' || isblank(last_char))))
+		return 0;
+
+	if (argc)
+		len = strlen(argv[0]);
+
+	mtd_for_each_device(mtd) {
+		if (argc &&
+		    (len > strlen(mtd->name) ||
+		     strncmp(argv[0], mtd->name, len)))
+			continue;
+
+		if (n_found >= maxv - 2) {
+			cmdv[n_found++] = "...";
+			break;
+		}
+
+		cmdv[n_found++] = mtd->name;
+	}
+
+	cmdv[n_found] = NULL;
+
+	return n_found;
+}
+#endif /* CONFIG_AUTO_COMPLETE */
+
 static char mtd_help_text[] =
 #ifdef CONFIG_SYS_LONGHELP
 	"- generic operations on memory technology devices\n\n"
@@ -470,4 +545,15 @@ static char mtd_help_text[] =
 #endif
 	"";
 
-U_BOOT_CMD(mtd, 10, 1, do_mtd, "MTD utils", mtd_help_text);
+U_BOOT_CMD_WITH_SUBCMDS(mtd, "MTD utils", mtd_help_text,
+		U_BOOT_SUBCMD_MKENT(list, 1, 1, do_mtd_list),
+		U_BOOT_SUBCMD_MKENT_COMPLETE(read, 5, 0, do_mtd_io,
+					     mtd_name_complete),
+		U_BOOT_SUBCMD_MKENT_COMPLETE(write, 5, 0, do_mtd_io,
+					     mtd_name_complete),
+		U_BOOT_SUBCMD_MKENT_COMPLETE(dump, 4, 0, do_mtd_io,
+					     mtd_name_complete),
+		U_BOOT_SUBCMD_MKENT_COMPLETE(erase, 4, 0, do_mtd_erase,
+					     mtd_name_complete),
+		U_BOOT_SUBCMD_MKENT_COMPLETE(bad, 2, 1, do_mtd_bad,
+					     mtd_name_complete));

commit 375a256d232d28636c5bb7e91f0a6e80ea8df363
Author: Zain Wang <wzz@rock-chips.com>
Date:   Thu Jul 11 10:28:55 2019 +0800

    rockchip: common: enter fastboot when avb+ab system boot failed
    
    When avb+ab system boot failed, it means slot a/b is unbootable
    and slot_cnt_a/b is zero. We should update images a/b and
    active slot again, and this can be done by fastboot. Remove
    rockusb from RKIMG_BOOTCOMMAND since rockusb unable to active slot.
    
    Change-Id: Ib9b15940a5b8f0cefe9a91ee7564ea8f9aa6f201
    Signed-off-by: Zain Wang <wzz@rock-chips.com>

diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index 2fe15ac920..fd860e980b 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -126,12 +126,24 @@
 	"fi; \0"
 
 #ifdef CONFIG_AVB_VBMETA_PUBLIC_KEY_VALIDATE
+#ifndef CONFIG_ANDROID_AB
 #define RKIMG_BOOTCOMMAND \
 	"boot_android ${devtype} ${devnum};" \
 	"echo AVB boot failed and enter rockusb or fastboot!;" \
 	"rockusb 0 ${devtype} ${devnum};" \
 	"fastboot usb 0;"
 #else
+/*
+ * Update images a/b and active slot with fastboot
+ * when avb+ab system boot failed.
+ * Remove rockusb since it unable to active slot.
+ */
+#define RKIMG_BOOTCOMMAND \
+	"boot_android ${devtype} ${devnum};" \
+	"echo AVB boot failed and enter fastboot!;" \
+	"fastboot usb 0;"
+#endif /* CONFIG_ANDROID_AB */
+#else /* CONFIG_AVB_VBMETA_PUBLIC_KEY_VALIDATE */
 #define RKIMG_BOOTCOMMAND \
 	"boot_android ${devtype} ${devnum};" \
 	"bootrkp;" \

commit f3d602457fdb0dee848776460a1775daf41dd215
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jul 11 10:22:14 2019 +0800

    make.sh: add more help information
    
    Change-Id: I8ed016767d8d7d0cd8dd533ce384715ad8d8afab
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 8fb8cd1549..eac352b74d 100755
--- a/make.sh
+++ b/make.sh
@@ -75,11 +75,15 @@ help()
 {
 	echo
 	echo "Usage:"
-	echo "	./make.sh [board|subcmd] [O=<dir>]"
+	echo "	./make.sh [board|subcmd] [O=<dir>|ini]"
 	echo
-	echo "	 - board: board name of defconfig"
-	echo "	 - subcmd: loader|loader-all|trust|trust-all|uboot|elf|map|sym|<addr>|"
-	echo "	 - O=<dir>: assigned output directory"
+	echo "	 - board:   board name of defconfig"
+	echo "	 - subcmd:  |elf*|loader*|spl*|itb||trust*|uboot|map|sym|<addr>|"
+	echo "	 - O=<dir>: assigned output directory, not recommend"
+	echo "	 - ini:     assigned ini file to pack trust/loader"
+	echo
+	echo "Output:"
+	echo "	 When board built okay, there are uboot/trust/loader images in current directory"
 	echo
 	echo "Example:"
 	echo
@@ -89,19 +93,23 @@ help()
 	echo "	./make.sh firefly-rk3288           --- build for firefly-rk3288_defconfig"
 	echo "	./make.sh                          --- build with exist .config"
 	echo
-	echo "	After build, Images of uboot, loader and trust are all generated."
-	echo
 	echo "2. Pack helper:"
 	echo "	./make.sh uboot                    --- pack uboot.img"
 	echo "	./make.sh trust                    --- pack trust.img"
 	echo "	./make.sh trust-all                --- pack trust img (all supported)"
+	echo "	./make.sh trust <ini>              --- pack trust img with assigned ini file"
 	echo "	./make.sh loader                   --- pack loader bin"
 	echo "	./make.sh loader-all	           --- pack loader bin (all supported)"
+	echo "	./make.sh loader <ini>             --- pack loader img with assigned ini file"
+	echo "	./make.sh spl                      --- pack loader with u-boot-spl.bin and u-boot-tpl.bin"
+	echo "	./make.sh spl-s                    --- pack loader only replace miniloader with u-boot-spl.bin"
+	echo "	./make.sh itb                      --- pack u-boot.itb(TODO: bl32 is not included for ARMv8)"
 	echo
 	echo "3. Debug helper:"
 	echo "	./make.sh elf                      --- dump elf file with -D(default)"
 	echo "	./make.sh elf-S                    --- dump elf file with -S"
 	echo "	./make.sh elf-d                    --- dump elf file with -d"
+	echo "	./make.sh elf-*                    --- dump elf file with -*"
 	echo "	./make.sh <no reloc_addr>          --- dump function symbol and code position of address(no relocated)"
 	echo "	./make.sh <reloc_addr-reloc_off>   --- dump function symbol and code position of address(relocated)"
 	echo "	./make.sh map                      --- cat u-boot.map"

commit 41beaf3970db33f24fe7d1f1323e80765237c543
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jul 10 15:11:21 2019 +0800

    rockchip: dts: rv1108: add cd-gpios
    
    Add cd-gpios to test the mmc device whether exist.
    
    Change-Id: I36bcdf0a0b0d5ca79392646cfcc17f03c5704235
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/dts/rv1108-u-boot.dtsi b/arch/arm/dts/rv1108-u-boot.dtsi
index f065afd9d0..31160b416e 100644
--- a/arch/arm/dts/rv1108-u-boot.dtsi
+++ b/arch/arm/dts/rv1108-u-boot.dtsi
@@ -25,3 +25,11 @@
 &uart0 {
 	u-boot,dm-pre-reloc;
 };
+
+&pinctrl {
+	u-boot,dm-pre-reloc;
+};
+
+&gpio0 {
+	u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/rv1108.dtsi b/arch/arm/dts/rv1108.dtsi
index 5354ac3b1e..1c1649b3a4 100644
--- a/arch/arm/dts/rv1108.dtsi
+++ b/arch/arm/dts/rv1108.dtsi
@@ -308,6 +308,7 @@
 		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
 			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
 		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
+		cd-gpios = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
 		fifo-depth = <0x100>;
 		interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 		reg = <0x30130000 0x4000>;

commit 069b847777bbcef6ad785033b7d23ead64cb58b8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jul 3 11:19:55 2019 +0800

    rockchip: dts: rk3399: add "sclk_crypto1" for clock-names
    
    It was missed by careless on:
    (272fdf6 rockchip: dts: rk3399: add and enable crypto node)
    
    Change-Id: I89c4c2acfd72d88dcf37b3ef3a7a39474cd73854
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
index 0f87ef67c4..50c78ec0ef 100644
--- a/arch/arm/dts/rk3399.dtsi
+++ b/arch/arm/dts/rk3399.dtsi
@@ -205,7 +205,7 @@
 	crypto: crypto@ff8b0000 {
 		compatible = "rockchip,rk3399-crypto";
 		reg = <0x0 0xff8b0000 0x0 0x10000>;
-		clock-names = "sclk_crypto0";
+		clock-names = "sclk_crypto0", "sclk_crypto1";
 		clocks = <&cru SCLK_CRYPTO0>, <&cru SCLK_CRYPTO1>;
 		status = "disabled";
 	};

commit 7d9fa41d1fd38f00272c951d3ace81d1dc2df648
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Jul 9 11:43:45 2019 +0800

    rockchip: rk3308: correct the nand iomux
    
    The nand has two group iomuxs, change the iomux to the correct one.
    
    Change-Id: I38affa1287f64dd72d8a17b7d6c56671108b831a
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3308/rk3308.c b/arch/arm/mach-rockchip/rk3308/rk3308.c
index 245ee56b5e..9bdcc877b8 100644
--- a/arch/arm/mach-rockchip/rk3308/rk3308.c
+++ b/arch/arm/mach-rockchip/rk3308/rk3308.c
@@ -5,8 +5,10 @@
  */
 #include <common.h>
 #include <asm/io.h>
+#include <asm/arch/cpu.h>
 #include <asm/arch/grf_rk3308.h>
 #include <asm/arch/hardware.h>
+#include <asm/arch/rk_atags.h>
 #include <asm/gpio.h>
 #include <debug_uart.h>
 
@@ -75,6 +77,32 @@ enum {
 	UART2_IO_SEL_M0		= 0,
 	UART2_IO_SEL_M1,
 	UART2_IO_SEL_USB,
+
+	GPIO3B3_SEL_SRC_CTRL_SHIFT	= 7,
+	GPIO3B3_SEL_SRC_CTRL_MASK	= BIT(7),
+	GPIO3B3_SEL_SRC_CTRL_IOMUX	= 0,
+	GPIO3B3_SEL_SRC_CTRL_SEL_PLUS,
+
+	GPIO3B3_SEL_PLUS_SHIFT		= 4,
+	GPIO3B3_SEL_PLUS_MASK		= GENMASK(6, 4),
+	GPIO3B3_SEL_PLUS_GPIO3_B3	= 0,
+	GPIO3B3_SEL_PLUS_FLASH_ALE,
+	GPIO3B3_SEL_PLUS_EMMC_PWREN,
+	GPIO3B3_SEL_PLUS_SPI1_CLK,
+	GPIO3B3_SEL_PLUS_LCDC_D23_M1,
+
+	GPIO3B2_SEL_SRC_CTRL_SHIFT	= 3,
+	GPIO3B2_SEL_SRC_CTRL_MASK	= BIT(3),
+	GPIO3B2_SEL_SRC_CTRL_IOMUX	= 0,
+	GPIO3B2_SEL_SRC_CTRL_SEL_PLUS,
+
+	GPIO3B2_SEL_PLUS_SHIFT		= 0,
+	GPIO3B2_SEL_PLUS_MASK		= GENMASK(2, 0),
+	GPIO3B2_SEL_PLUS_GPIO3_B2	= 0,
+	GPIO3B2_SEL_PLUS_FLASH_RDN,
+	GPIO3B2_SEL_PLUS_EMMC_RSTN,
+	GPIO3B2_SEL_PLUS_SPI1_MISO,
+	GPIO3B2_SEL_PLUS_LCDC_D22_M1,
 };
 
 enum {
@@ -125,6 +153,29 @@ int rk_board_init(void)
 	return 0;
 }
 
+#ifdef CONFIG_SPL_BUILD
+int rk_board_init_f(void)
+{
+	static struct rk3308_grf * const grf = (void *)GRF_BASE;
+	unsigned long mask;
+	unsigned long value;
+
+	mask = GPIO3B2_SEL_PLUS_MASK | GPIO3B2_SEL_SRC_CTRL_MASK |
+		GPIO3B3_SEL_PLUS_MASK | GPIO3B3_SEL_SRC_CTRL_MASK;
+	value = (GPIO3B2_SEL_PLUS_FLASH_RDN << GPIO3B2_SEL_PLUS_SHIFT) |
+		(GPIO3B2_SEL_SRC_CTRL_SEL_PLUS << GPIO3B2_SEL_SRC_CTRL_SHIFT) |
+		(GPIO3B3_SEL_PLUS_FLASH_ALE << GPIO3B3_SEL_PLUS_SHIFT) |
+		(GPIO3B3_SEL_SRC_CTRL_SEL_PLUS << GPIO3B3_SEL_SRC_CTRL_SHIFT);
+
+	if (get_bootdev_by_brom_bootsource() == BOOT_TYPE_NAND) {
+		if (soc_is_rk3308b())
+			rk_clrsetreg(&grf->soc_con15, mask, value);
+	}
+
+	return 0;
+}
+#endif
+
 void board_debug_uart_init(void)
 {
 	static struct rk3308_grf * const grf = (void *)GRF_BASE;

commit 5afd3315596fe0e1ae4a74c6a3fef1211925ae7e
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jun 28 22:48:47 2019 +0800

    rockchip: atags: add interface to get boot type from brom
    
    We get bootsource from BROM_BOOTSOURCE_ID_ADDR. The array bootdev_map
    is used to transform rom bootsource type to rk atags boot type.
    
    Change-Id: I6d0cef250dc2e65ccb6e55077bc2b4be6115bd90
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rk_atags.h b/arch/arm/include/asm/arch-rockchip/rk_atags.h
index 21559e8f37..aa4bc62877 100644
--- a/arch/arm/include/asm/arch-rockchip/rk_atags.h
+++ b/arch/arm/include/asm/arch-rockchip/rk_atags.h
@@ -209,6 +209,26 @@ struct tag *atags_get_tag(u32 magic);
  */
 int atags_is_available(void);
 
+#ifdef CONFIG_SPL_BUILD
+/*
+ * get_bootdev_by_brom_bootsource
+ *
+ * @magic: void
+ *
+ * return: boootdev, else 0 fail.
+ */
+int get_bootdev_by_brom_bootsource(void);
+
+/*
+ * atags_set_bootdev_by_brom_bootsource
+ *
+ * @magic: void
+ *
+ * return: 0 success, others fail.
+ */
+int atags_set_bootdev_by_brom_bootsource(void);
+#endif
+
 /* Print only one tag */
 void atags_print_tag(struct tag *t);
 
diff --git a/arch/arm/mach-rockchip/rk_atags.c b/arch/arm/mach-rockchip/rk_atags.c
index 43fb4b0eaa..13fec6ff4a 100644
--- a/arch/arm/mach-rockchip/rk_atags.c
+++ b/arch/arm/mach-rockchip/rk_atags.c
@@ -5,6 +5,8 @@
  */
 
 #include <common.h>
+#include <asm/io.h>
+#include <asm/arch/bootrom.h>
 #include <asm/arch/rk_atags.h>
 #if CONFIG_IS_ENABLED(TINY_FRAMEWORK)
 #include <debug_uart.h>
@@ -16,6 +18,25 @@
 #define for_each_tag(t, base)		\
 	for (t = base; t->hdr.size; t = tag_next(t))
 
+#ifdef CONFIG_SPL_BUILD
+/*
+ * The array is used to transform rom bootsource type to rk atags boot type.
+ */
+static int bootdev_map[] = {
+	BOOT_TYPE_UNKNOWN,
+	BOOT_TYPE_NAND,
+	BOOT_TYPE_EMMC,
+	BOOT_TYPE_SPI_NOR,
+	BOOT_TYPE_SPI_NAND,
+	BOOT_TYPE_SD0,
+	BOOT_TYPE_UNKNOWN,
+	BOOT_TYPE_UNKNOWN,
+	BOOT_TYPE_UNKNOWN,
+	BOOT_TYPE_UNKNOWN,
+	BOOT_TYPE_UNKNOWN
+};
+#endif
+
 #if CONFIG_IS_ENABLED(TINY_FRAMEWORK) &&		\
 	!CONFIG_IS_ENABLED(LIBGENERIC_SUPPORT) &&	\
 	defined(CONFIG_ARM64)
@@ -271,6 +292,31 @@ struct tag *atags_get_tag(u32 magic)
 struct tag *atags_get_tag(u32 magic) { return NULL; }
 #endif
 
+#ifdef CONFIG_SPL_BUILD
+int get_bootdev_by_brom_bootsource(void)
+{
+	int bootsource = 0;
+
+	bootsource = readl(BROM_BOOTSOURCE_ID_ADDR);
+	if (bootsource > ARRAY_SIZE(bootdev_map) - 1 || bootsource < 0)
+		return 0;
+	else
+		return bootdev_map[bootsource];
+}
+
+int atags_set_bootdev_by_brom_bootsource(void)
+{
+	struct tag_bootdev boot_dev;
+
+	memset(&boot_dev, 0, sizeof(struct tag_bootdev));
+	boot_dev.devtype = get_bootdev_by_brom_bootsource();
+	if (!atags_is_available())
+		return -ENODATA;
+
+	return atags_set_tag(ATAG_BOOTDEV, &boot_dev);
+}
+#endif
+
 void atags_destroy(void)
 {
 	if (atags_is_available())

commit 3969e121dda6f629ffa3aade4e5be75f3d117f6d
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Jul 1 20:04:39 2019 +0800

    rkflash: optimize processing for large data transfers
    
    Unpack large packets of data
    
    Change-Id: Ic8082bdf7c630ca62ad5916a6fa94ed0cc68a9de
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/rk_sftl_arm_v7.S b/drivers/rkflash/rk_sftl_arm_v7.S
index 01d67fba67..6213c7993a 100644
--- a/drivers/rkflash/rk_sftl_arm_v7.S
+++ b/drivers/rkflash/rk_sftl_arm_v7.S
@@ -2,7 +2,7 @@
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:    GPL-2.0
- * date: 2019-04-19
+ * date: 2019-07-01
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -13113,16 +13113,30 @@ sftl_write:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
-	mov	r5, r1
-	mov	r6, r2
-	mov	r4, r0
+	mov	r6, r0
+	mov	r4, r1
+	mov	r5, r2
+	add	r6, r6, r4
 	bl	FtlWriteToIDB
-	mov	r3, r6
-	mov	r2, r5
-	mov	r1, r4
+.L1764:
+	cmp	r4, #256
+	sub	r1, r6, r4
+	mov	r3, r5
+	bhi	.L1766
+	mov	r2, r4
 	movs	r0, #0
 	pop	{r4, r5, r6, lr}
 	b	FtlWrite
+.L1766:
+	mov	r2, #256
+	movs	r0, #0
+	bl	FtlWrite
+	cbnz	r0, .L1763
+	add	r5, r5, #131072
+	sub	r4, r4, #256
+	b	.L1764
+.L1763:
+	pop	{r4, r5, r6, pc}
 	.size	sftl_write, .-sftl_write
 	.global	g_nand_ops
 	.global	g_nand_phy_info
@@ -14447,215 +14461,215 @@ power_up_flag:
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",%progbits,1
 .LC1:
 	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
-	.section	.rodata.__func__.10001,"a",%progbits
+	.section	.rodata.__func__.10020,"a",%progbits
 	.set	.LANCHOR175,. + 0
-	.type	__func__.10001, %object
-	.size	__func__.10001, 23
-__func__.10001:
+	.type	__func__.10020, %object
+	.size	__func__.10020, 23
+__func__.10020:
 	.ascii	"rk_ftl_garbage_collect\000"
-	.section	.rodata.__func__.10273,"a",%progbits
-	.set	.LANCHOR137,. + 0
-	.type	__func__.10273, %object
-	.size	__func__.10273, 15
-__func__.10273:
-	.ascii	"FlashReadPages\000"
 	.section	.rodata.__func__.10292,"a",%progbits
-	.set	.LANCHOR142,. + 0
+	.set	.LANCHOR137,. + 0
 	.type	__func__.10292, %object
 	.size	__func__.10292, 15
 __func__.10292:
+	.ascii	"FlashReadPages\000"
+	.section	.rodata.__func__.10311,"a",%progbits
+	.set	.LANCHOR142,. + 0
+	.type	__func__.10311, %object
+	.size	__func__.10311, 15
+__func__.10311:
 	.ascii	"FlashProgPages\000"
-	.section	.rodata.__func__.10316,"a",%progbits
+	.section	.rodata.__func__.10335,"a",%progbits
 	.set	.LANCHOR77,. + 0
-	.type	__func__.10316, %object
-	.size	__func__.10316, 17
-__func__.10316:
+	.type	__func__.10335, %object
+	.size	__func__.10335, 17
+__func__.10335:
 	.ascii	"FlashEraseBlocks\000"
-	.section	.rodata.__func__.10431,"a",%progbits
+	.section	.rodata.__func__.10450,"a",%progbits
 	.set	.LANCHOR185,. + 0
-	.type	__func__.10431, %object
-	.size	__func__.10431, 14
-__func__.10431:
+	.type	__func__.10450, %object
+	.size	__func__.10450, 14
+__func__.10450:
 	.ascii	"FtlWriteToIDB\000"
-	.section	.rodata.__func__.8925,"a",%progbits
+	.section	.rodata.__func__.8937,"a",%progbits
 	.set	.LANCHOR169,. + 0
-	.type	__func__.8925, %object
-	.size	__func__.8925, 13
-__func__.8925:
+	.type	__func__.8937, %object
+	.size	__func__.8937, 13
+__func__.8937:
 	.ascii	"FtlProgPages\000"
-	.section	.rodata.__func__.8953,"a",%progbits
+	.section	.rodata.__func__.8965,"a",%progbits
 	.set	.LANCHOR177,. + 0
-	.type	__func__.8953, %object
-	.size	__func__.8953, 9
-__func__.8953:
+	.type	__func__.8965, %object
+	.size	__func__.8965, 9
+__func__.8965:
 	.ascii	"FtlWrite\000"
-	.section	.rodata.__func__.9028,"a",%progbits
+	.section	.rodata.__func__.9047,"a",%progbits
 	.set	.LANCHOR128,. + 0
-	.type	__func__.9028, %object
-	.size	__func__.9028, 14
-__func__.9028:
+	.type	__func__.9047, %object
+	.size	__func__.9047, 14
+__func__.9047:
 	.ascii	"FtlBbt2Bitmap\000"
-	.section	.rodata.__func__.9063,"a",%progbits
+	.section	.rodata.__func__.9082,"a",%progbits
 	.set	.LANCHOR141,. + 0
-	.type	__func__.9063, %object
-	.size	__func__.9063, 11
-__func__.9063:
+	.type	__func__.9082, %object
+	.size	__func__.9082, 11
+__func__.9082:
 	.ascii	"FtlLoadBbt\000"
-	.section	.rodata.__func__.9178,"a",%progbits
+	.section	.rodata.__func__.9197,"a",%progbits
 	.set	.LANCHOR49,. + 0
-	.type	__func__.9178, %object
-	.size	__func__.9178, 17
-__func__.9178:
+	.type	__func__.9197, %object
+	.size	__func__.9197, 17
+__func__.9197:
 	.ascii	"INSERT_FREE_LIST\000"
-	.section	.rodata.__func__.9183,"a",%progbits
+	.section	.rodata.__func__.9202,"a",%progbits
 	.set	.LANCHOR45,. + 0
-	.type	__func__.9183, %object
-	.size	__func__.9183, 17
-__func__.9183:
+	.type	__func__.9202, %object
+	.size	__func__.9202, 17
+__func__.9202:
 	.ascii	"INSERT_DATA_LIST\000"
-	.section	.rodata.__func__.9214,"a",%progbits
+	.section	.rodata.__func__.9233,"a",%progbits
 	.set	.LANCHOR50,. + 0
-	.type	__func__.9214, %object
-	.size	__func__.9214, 17
-__func__.9214:
+	.type	__func__.9233, %object
+	.size	__func__.9233, 17
+__func__.9233:
 	.ascii	"List_remove_node\000"
-	.section	.rodata.__func__.9246,"a",%progbits
+	.section	.rodata.__func__.9265,"a",%progbits
 	.set	.LANCHOR54,. + 0
-	.type	__func__.9246, %object
-	.size	__func__.9246, 22
-__func__.9246:
+	.type	__func__.9265, %object
+	.size	__func__.9265, 22
+__func__.9265:
 	.ascii	"List_update_data_list\000"
-	.section	.rodata.__func__.9255,"a",%progbits
+	.section	.rodata.__func__.9274,"a",%progbits
 	.set	.LANCHOR150,. + 0
-	.type	__func__.9255, %object
-	.size	__func__.9255, 16
-__func__.9255:
+	.type	__func__.9274, %object
+	.size	__func__.9274, 16
+__func__.9274:
 	.ascii	"load_l2p_region\000"
-	.section	.rodata.__func__.9288,"a",%progbits
+	.section	.rodata.__func__.9307,"a",%progbits
 	.set	.LANCHOR81,. + 0
-	.type	__func__.9288, %object
-	.size	__func__.9288, 26
-__func__.9288:
+	.type	__func__.9307, %object
+	.size	__func__.9307, 26
+__func__.9307:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.section	.rodata.__func__.9299,"a",%progbits
+	.section	.rodata.__func__.9318,"a",%progbits
 	.set	.LANCHOR151,. + 0
-	.type	__func__.9299, %object
-	.size	__func__.9299, 15
-__func__.9299:
+	.type	__func__.9318, %object
+	.size	__func__.9318, 15
+__func__.9318:
 	.ascii	"ftl_map_blk_gc\000"
-	.section	.rodata.__func__.9314,"a",%progbits
+	.section	.rodata.__func__.9333,"a",%progbits
 	.set	.LANCHOR148,. + 0
-	.type	__func__.9314, %object
-	.size	__func__.9314, 31
-__func__.9314:
+	.type	__func__.9333, %object
+	.size	__func__.9333, 31
+__func__.9333:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.section	.rodata.__func__.9328,"a",%progbits
+	.section	.rodata.__func__.9347,"a",%progbits
 	.set	.LANCHOR149,. + 0
-	.type	__func__.9328, %object
-	.size	__func__.9328, 16
-__func__.9328:
+	.type	__func__.9347, %object
+	.size	__func__.9347, 16
+__func__.9347:
 	.ascii	"FtlMapWritePage\000"
-	.section	.rodata.__func__.9353,"a",%progbits
+	.section	.rodata.__func__.9372,"a",%progbits
 	.set	.LANCHOR57,. + 0
-	.type	__func__.9353, %object
-	.size	__func__.9353, 22
-__func__.9353:
+	.type	__func__.9372, %object
+	.size	__func__.9372, 22
+__func__.9372:
 	.ascii	"select_l2p_ram_region\000"
-	.section	.rodata.__func__.9370,"a",%progbits
+	.section	.rodata.__func__.9389,"a",%progbits
 	.set	.LANCHOR153,. + 0
-	.type	__func__.9370, %object
-	.size	__func__.9370, 9
-__func__.9370:
+	.type	__func__.9389, %object
+	.size	__func__.9389, 9
+__func__.9389:
 	.ascii	"log2phys\000"
-	.section	.rodata.__func__.9434,"a",%progbits
+	.section	.rodata.__func__.9453,"a",%progbits
 	.set	.LANCHOR165,. + 0
-	.type	__func__.9434, %object
-	.size	__func__.9434, 15
-__func__.9434:
+	.type	__func__.9453, %object
+	.size	__func__.9453, 15
+__func__.9453:
 	.ascii	"FtlVpcTblFlush\000"
-	.section	.rodata.__func__.9456,"a",%progbits
+	.section	.rodata.__func__.9475,"a",%progbits
 	.set	.LANCHOR140,. + 0
-	.type	__func__.9456, %object
-	.size	__func__.9456, 14
-__func__.9456:
+	.type	__func__.9475, %object
+	.size	__func__.9475, 14
+__func__.9475:
 	.ascii	"FtlScanSysBlk\000"
-	.section	.rodata.__func__.9512,"a",%progbits
+	.section	.rodata.__func__.9531,"a",%progbits
 	.set	.LANCHOR178,. + 0
-	.type	__func__.9512, %object
-	.size	__func__.9512, 15
-__func__.9512:
+	.type	__func__.9531, %object
+	.size	__func__.9531, 15
+__func__.9531:
 	.ascii	"FtlLoadSysInfo\000"
-	.section	.rodata.__func__.9534,"a",%progbits
+	.section	.rodata.__func__.9553,"a",%progbits
 	.set	.LANCHOR180,. + 0
-	.type	__func__.9534, %object
-	.size	__func__.9534, 18
-__func__.9534:
+	.type	__func__.9553, %object
+	.size	__func__.9553, 18
+__func__.9553:
 	.ascii	"FtlMapTblRecovery\000"
-	.section	.rodata.__func__.9580,"a",%progbits
+	.section	.rodata.__func__.9599,"a",%progbits
 	.set	.LANCHOR154,. + 0
-	.type	__func__.9580, %object
-	.size	__func__.9580, 16
-__func__.9580:
+	.type	__func__.9599, %object
+	.size	__func__.9599, 16
+__func__.9599:
 	.ascii	"FtlReUsePrevPpa\000"
-	.section	.rodata.__func__.9614,"a",%progbits
+	.section	.rodata.__func__.9633,"a",%progbits
 	.set	.LANCHOR155,. + 0
-	.type	__func__.9614, %object
-	.size	__func__.9614, 22
-__func__.9614:
+	.type	__func__.9633, %object
+	.size	__func__.9633, 22
+__func__.9633:
 	.ascii	"FtlRecoverySuperblock\000"
-	.section	.rodata.__func__.9671,"a",%progbits
+	.section	.rodata.__func__.9690,"a",%progbits
 	.set	.LANCHOR60,. + 0
-	.type	__func__.9671, %object
-	.size	__func__.9671, 16
-__func__.9671:
+	.type	__func__.9690, %object
+	.size	__func__.9690, 16
+__func__.9690:
 	.ascii	"make_superblock\000"
-	.section	.rodata.__func__.9692,"a",%progbits
+	.section	.rodata.__func__.9711,"a",%progbits
 	.set	.LANCHOR136,. + 0
-	.type	__func__.9692, %object
-	.size	__func__.9692, 18
-__func__.9692:
+	.type	__func__.9711, %object
+	.size	__func__.9711, 18
+__func__.9711:
 	.ascii	"SupperBlkListInit\000"
-	.section	.rodata.__func__.9719,"a",%progbits
+	.section	.rodata.__func__.9738,"a",%progbits
 	.set	.LANCHOR159,. + 0
-	.type	__func__.9719, %object
-	.size	__func__.9719, 14
-__func__.9719:
+	.type	__func__.9738, %object
+	.size	__func__.9738, 14
+__func__.9738:
 	.ascii	"ftl_check_vpc\000"
-	.section	.rodata.__func__.9784,"a",%progbits
+	.section	.rodata.__func__.9803,"a",%progbits
 	.set	.LANCHOR144,. + 0
-	.type	__func__.9784, %object
-	.size	__func__.9784, 25
-__func__.9784:
+	.type	__func__.9803, %object
+	.size	__func__.9803, 25
+__func__.9803:
 	.ascii	"allocate_data_superblock\000"
-	.section	.rodata.__func__.9805,"a",%progbits
+	.section	.rodata.__func__.9824,"a",%progbits
 	.set	.LANCHOR168,. + 0
-	.type	__func__.9805, %object
-	.size	__func__.9805, 29
-__func__.9805:
+	.type	__func__.9824, %object
+	.size	__func__.9824, 29
+__func__.9824:
 	.ascii	"allocate_new_data_superblock\000"
-	.section	.rodata.__func__.9812,"a",%progbits
+	.section	.rodata.__func__.9831,"a",%progbits
 	.set	.LANCHOR61,. + 0
-	.type	__func__.9812, %object
-	.size	__func__.9812, 19
-__func__.9812:
+	.type	__func__.9831, %object
+	.size	__func__.9831, 19
+__func__.9831:
 	.ascii	"get_new_active_ppa\000"
-	.section	.rodata.__func__.9825,"a",%progbits
+	.section	.rodata.__func__.9844,"a",%progbits
 	.set	.LANCHOR146,. + 0
-	.type	__func__.9825, %object
-	.size	__func__.9825, 16
-__func__.9825:
+	.type	__func__.9844, %object
+	.size	__func__.9844, 16
+__func__.9844:
 	.ascii	"update_vpc_list\000"
-	.section	.rodata.__func__.9832,"a",%progbits
+	.section	.rodata.__func__.9851,"a",%progbits
 	.set	.LANCHOR147,. + 0
-	.type	__func__.9832, %object
-	.size	__func__.9832, 20
-__func__.9832:
+	.type	__func__.9851, %object
+	.size	__func__.9851, 20
+__func__.9851:
 	.ascii	"decrement_vpc_count\000"
-	.section	.rodata.__func__.9902,"a",%progbits
+	.section	.rodata.__func__.9921,"a",%progbits
 	.set	.LANCHOR170,. + 0
-	.type	__func__.9902, %object
-	.size	__func__.9902, 19
-__func__.9902:
+	.type	__func__.9921, %object
+	.size	__func__.9921, 19
+__func__.9921:
 	.ascii	"FtlGcFreeTempBlock\000"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",%progbits,1
 .LC21:
diff --git a/drivers/rkflash/rk_sftl_arm_v8.S b/drivers/rkflash/rk_sftl_arm_v8.S
index f1ec64e811..3055fbad4a 100644
--- a/drivers/rkflash/rk_sftl_arm_v8.S
+++ b/drivers/rkflash/rk_sftl_arm_v8.S
@@ -2,7 +2,7 @@
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:    GPL-2.0
- * date: 2019-04-19
+ * date: 2019-07-01
  */
 	.arch armv8-a+nosimd
 	.file	"rk_sftl.c"
@@ -11605,19 +11605,36 @@ sftl_write:
 	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	mov	w20, w1
-	mov	w19, w0
+	mov	w19, w1
 	str	x21, [sp, 32]
-	mov	x21, x2
+	mov	w21, w0
+	add	w21, w19, w21
+	mov	x20, x2
 	bl	FtlWriteToIDB
-	mov	x3, x21
-	mov	w2, w20
-	mov	w1, w19
+.L1592:
+	sub	w1, w21, w19
+	mov	x3, x20
+	cmp	w19, 256
+	bhi	.L1594
+	mov	w2, w19
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x29, x30, [sp], 48
 	b	FtlWrite
+.L1594:
+	mov	w2, 256
+	mov	w0, 0
+	bl	FtlWrite
+	cbnz	w0, .L1591
+	add	x20, x20, 131072
+	sub	w19, w19, #256
+	b	.L1592
+.L1591:
+	ldp	x19, x20, [sp, 16]
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
 	.size	sftl_write, .-sftl_write
 	.global	g_nand_ops
 	.global	g_nand_phy_info
@@ -12938,250 +12955,250 @@ power_up_flag:
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",@progbits,1
 .LC1:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
-	.section	.rodata.__func__.6234,"a",@progbits
+	.section	.rodata.__func__.6246,"a",@progbits
 	.align	3
 	.set	.LANCHOR169,. + 0
-	.type	__func__.6234, %object
-	.size	__func__.6234, 13
-__func__.6234:
+	.type	__func__.6246, %object
+	.size	__func__.6246, 13
+__func__.6246:
 	.string	"FtlProgPages"
-	.section	.rodata.__func__.6262,"a",@progbits
+	.section	.rodata.__func__.6274,"a",@progbits
 	.align	3
 	.set	.LANCHOR177,. + 0
-	.type	__func__.6262, %object
-	.size	__func__.6262, 9
-__func__.6262:
+	.type	__func__.6274, %object
+	.size	__func__.6274, 9
+__func__.6274:
 	.string	"FtlWrite"
-	.section	.rodata.__func__.6337,"a",@progbits
+	.section	.rodata.__func__.6356,"a",@progbits
 	.align	3
 	.set	.LANCHOR128,. + 0
-	.type	__func__.6337, %object
-	.size	__func__.6337, 14
-__func__.6337:
+	.type	__func__.6356, %object
+	.size	__func__.6356, 14
+__func__.6356:
 	.string	"FtlBbt2Bitmap"
-	.section	.rodata.__func__.6372,"a",@progbits
+	.section	.rodata.__func__.6391,"a",@progbits
 	.align	3
 	.set	.LANCHOR141,. + 0
-	.type	__func__.6372, %object
-	.size	__func__.6372, 11
-__func__.6372:
+	.type	__func__.6391, %object
+	.size	__func__.6391, 11
+__func__.6391:
 	.string	"FtlLoadBbt"
-	.section	.rodata.__func__.6487,"a",@progbits
+	.section	.rodata.__func__.6506,"a",@progbits
 	.align	3
 	.set	.LANCHOR49,. + 0
-	.type	__func__.6487, %object
-	.size	__func__.6487, 17
-__func__.6487:
+	.type	__func__.6506, %object
+	.size	__func__.6506, 17
+__func__.6506:
 	.string	"INSERT_FREE_LIST"
-	.section	.rodata.__func__.6492,"a",@progbits
+	.section	.rodata.__func__.6511,"a",@progbits
 	.align	3
 	.set	.LANCHOR45,. + 0
-	.type	__func__.6492, %object
-	.size	__func__.6492, 17
-__func__.6492:
+	.type	__func__.6511, %object
+	.size	__func__.6511, 17
+__func__.6511:
 	.string	"INSERT_DATA_LIST"
-	.section	.rodata.__func__.6523,"a",@progbits
+	.section	.rodata.__func__.6542,"a",@progbits
 	.align	3
 	.set	.LANCHOR50,. + 0
-	.type	__func__.6523, %object
-	.size	__func__.6523, 17
-__func__.6523:
+	.type	__func__.6542, %object
+	.size	__func__.6542, 17
+__func__.6542:
 	.string	"List_remove_node"
-	.section	.rodata.__func__.6555,"a",@progbits
+	.section	.rodata.__func__.6574,"a",@progbits
 	.align	3
 	.set	.LANCHOR54,. + 0
-	.type	__func__.6555, %object
-	.size	__func__.6555, 22
-__func__.6555:
+	.type	__func__.6574, %object
+	.size	__func__.6574, 22
+__func__.6574:
 	.string	"List_update_data_list"
-	.section	.rodata.__func__.6564,"a",@progbits
+	.section	.rodata.__func__.6583,"a",@progbits
 	.align	3
 	.set	.LANCHOR150,. + 0
-	.type	__func__.6564, %object
-	.size	__func__.6564, 16
-__func__.6564:
+	.type	__func__.6583, %object
+	.size	__func__.6583, 16
+__func__.6583:
 	.string	"load_l2p_region"
-	.section	.rodata.__func__.6597,"a",@progbits
+	.section	.rodata.__func__.6616,"a",@progbits
 	.align	3
 	.set	.LANCHOR81,. + 0
-	.type	__func__.6597, %object
-	.size	__func__.6597, 26
-__func__.6597:
+	.type	__func__.6616, %object
+	.size	__func__.6616, 26
+__func__.6616:
 	.string	"ftl_map_blk_alloc_new_blk"
-	.section	.rodata.__func__.6608,"a",@progbits
+	.section	.rodata.__func__.6627,"a",@progbits
 	.align	3
 	.set	.LANCHOR151,. + 0
-	.type	__func__.6608, %object
-	.size	__func__.6608, 15
-__func__.6608:
+	.type	__func__.6627, %object
+	.size	__func__.6627, 15
+__func__.6627:
 	.string	"ftl_map_blk_gc"
-	.section	.rodata.__func__.6623,"a",@progbits
+	.section	.rodata.__func__.6642,"a",@progbits
 	.align	3
 	.set	.LANCHOR148,. + 0
-	.type	__func__.6623, %object
-	.size	__func__.6623, 31
-__func__.6623:
+	.type	__func__.6642, %object
+	.size	__func__.6642, 31
+__func__.6642:
 	.string	"Ftl_write_map_blk_to_last_page"
-	.section	.rodata.__func__.6637,"a",@progbits
+	.section	.rodata.__func__.6656,"a",@progbits
 	.align	3
 	.set	.LANCHOR149,. + 0
-	.type	__func__.6637, %object
-	.size	__func__.6637, 16
-__func__.6637:
+	.type	__func__.6656, %object
+	.size	__func__.6656, 16
+__func__.6656:
 	.string	"FtlMapWritePage"
-	.section	.rodata.__func__.6662,"a",@progbits
+	.section	.rodata.__func__.6681,"a",@progbits
 	.align	3
 	.set	.LANCHOR57,. + 0
-	.type	__func__.6662, %object
-	.size	__func__.6662, 22
-__func__.6662:
+	.type	__func__.6681, %object
+	.size	__func__.6681, 22
+__func__.6681:
 	.string	"select_l2p_ram_region"
-	.section	.rodata.__func__.6679,"a",@progbits
+	.section	.rodata.__func__.6698,"a",@progbits
 	.align	3
 	.set	.LANCHOR153,. + 0
-	.type	__func__.6679, %object
-	.size	__func__.6679, 9
-__func__.6679:
+	.type	__func__.6698, %object
+	.size	__func__.6698, 9
+__func__.6698:
 	.string	"log2phys"
-	.section	.rodata.__func__.6743,"a",@progbits
+	.section	.rodata.__func__.6762,"a",@progbits
 	.align	3
 	.set	.LANCHOR165,. + 0
-	.type	__func__.6743, %object
-	.size	__func__.6743, 15
-__func__.6743:
+	.type	__func__.6762, %object
+	.size	__func__.6762, 15
+__func__.6762:
 	.string	"FtlVpcTblFlush"
-	.section	.rodata.__func__.6765,"a",@progbits
+	.section	.rodata.__func__.6784,"a",@progbits
 	.align	3
 	.set	.LANCHOR140,. + 0
-	.type	__func__.6765, %object
-	.size	__func__.6765, 14
-__func__.6765:
+	.type	__func__.6784, %object
+	.size	__func__.6784, 14
+__func__.6784:
 	.string	"FtlScanSysBlk"
-	.section	.rodata.__func__.6821,"a",@progbits
+	.section	.rodata.__func__.6840,"a",@progbits
 	.align	3
 	.set	.LANCHOR178,. + 0
-	.type	__func__.6821, %object
-	.size	__func__.6821, 15
-__func__.6821:
+	.type	__func__.6840, %object
+	.size	__func__.6840, 15
+__func__.6840:
 	.string	"FtlLoadSysInfo"
-	.section	.rodata.__func__.6843,"a",@progbits
+	.section	.rodata.__func__.6862,"a",@progbits
 	.align	3
 	.set	.LANCHOR180,. + 0
-	.type	__func__.6843, %object
-	.size	__func__.6843, 18
-__func__.6843:
+	.type	__func__.6862, %object
+	.size	__func__.6862, 18
+__func__.6862:
 	.string	"FtlMapTblRecovery"
-	.section	.rodata.__func__.6889,"a",@progbits
+	.section	.rodata.__func__.6908,"a",@progbits
 	.align	3
 	.set	.LANCHOR154,. + 0
-	.type	__func__.6889, %object
-	.size	__func__.6889, 16
-__func__.6889:
+	.type	__func__.6908, %object
+	.size	__func__.6908, 16
+__func__.6908:
 	.string	"FtlReUsePrevPpa"
-	.section	.rodata.__func__.6923,"a",@progbits
+	.section	.rodata.__func__.6942,"a",@progbits
 	.align	3
 	.set	.LANCHOR155,. + 0
-	.type	__func__.6923, %object
-	.size	__func__.6923, 22
-__func__.6923:
+	.type	__func__.6942, %object
+	.size	__func__.6942, 22
+__func__.6942:
 	.string	"FtlRecoverySuperblock"
-	.section	.rodata.__func__.6980,"a",@progbits
+	.section	.rodata.__func__.6999,"a",@progbits
 	.align	3
 	.set	.LANCHOR60,. + 0
-	.type	__func__.6980, %object
-	.size	__func__.6980, 16
-__func__.6980:
+	.type	__func__.6999, %object
+	.size	__func__.6999, 16
+__func__.6999:
 	.string	"make_superblock"
-	.section	.rodata.__func__.7001,"a",@progbits
+	.section	.rodata.__func__.7020,"a",@progbits
 	.align	3
 	.set	.LANCHOR136,. + 0
-	.type	__func__.7001, %object
-	.size	__func__.7001, 18
-__func__.7001:
+	.type	__func__.7020, %object
+	.size	__func__.7020, 18
+__func__.7020:
 	.string	"SupperBlkListInit"
-	.section	.rodata.__func__.7028,"a",@progbits
+	.section	.rodata.__func__.7047,"a",@progbits
 	.align	3
 	.set	.LANCHOR159,. + 0
-	.type	__func__.7028, %object
-	.size	__func__.7028, 14
-__func__.7028:
+	.type	__func__.7047, %object
+	.size	__func__.7047, 14
+__func__.7047:
 	.string	"ftl_check_vpc"
-	.section	.rodata.__func__.7093,"a",@progbits
+	.section	.rodata.__func__.7112,"a",@progbits
 	.align	3
 	.set	.LANCHOR144,. + 0
-	.type	__func__.7093, %object
-	.size	__func__.7093, 25
-__func__.7093:
+	.type	__func__.7112, %object
+	.size	__func__.7112, 25
+__func__.7112:
 	.string	"allocate_data_superblock"
-	.section	.rodata.__func__.7114,"a",@progbits
+	.section	.rodata.__func__.7133,"a",@progbits
 	.align	3
 	.set	.LANCHOR168,. + 0
-	.type	__func__.7114, %object
-	.size	__func__.7114, 29
-__func__.7114:
+	.type	__func__.7133, %object
+	.size	__func__.7133, 29
+__func__.7133:
 	.string	"allocate_new_data_superblock"
-	.section	.rodata.__func__.7121,"a",@progbits
+	.section	.rodata.__func__.7140,"a",@progbits
 	.align	3
 	.set	.LANCHOR61,. + 0
-	.type	__func__.7121, %object
-	.size	__func__.7121, 19
-__func__.7121:
+	.type	__func__.7140, %object
+	.size	__func__.7140, 19
+__func__.7140:
 	.string	"get_new_active_ppa"
-	.section	.rodata.__func__.7134,"a",@progbits
+	.section	.rodata.__func__.7153,"a",@progbits
 	.align	3
 	.set	.LANCHOR146,. + 0
-	.type	__func__.7134, %object
-	.size	__func__.7134, 16
-__func__.7134:
+	.type	__func__.7153, %object
+	.size	__func__.7153, 16
+__func__.7153:
 	.string	"update_vpc_list"
-	.section	.rodata.__func__.7141,"a",@progbits
+	.section	.rodata.__func__.7160,"a",@progbits
 	.align	3
 	.set	.LANCHOR147,. + 0
-	.type	__func__.7141, %object
-	.size	__func__.7141, 20
-__func__.7141:
+	.type	__func__.7160, %object
+	.size	__func__.7160, 20
+__func__.7160:
 	.string	"decrement_vpc_count"
-	.section	.rodata.__func__.7211,"a",@progbits
+	.section	.rodata.__func__.7230,"a",@progbits
 	.align	3
 	.set	.LANCHOR170,. + 0
-	.type	__func__.7211, %object
-	.size	__func__.7211, 19
-__func__.7211:
+	.type	__func__.7230, %object
+	.size	__func__.7230, 19
+__func__.7230:
 	.string	"FtlGcFreeTempBlock"
-	.section	.rodata.__func__.7310,"a",@progbits
+	.section	.rodata.__func__.7329,"a",@progbits
 	.align	3
 	.set	.LANCHOR175,. + 0
-	.type	__func__.7310, %object
-	.size	__func__.7310, 23
-__func__.7310:
+	.type	__func__.7329, %object
+	.size	__func__.7329, 23
+__func__.7329:
 	.string	"rk_ftl_garbage_collect"
-	.section	.rodata.__func__.7582,"a",@progbits
-	.align	3
-	.set	.LANCHOR137,. + 0
-	.type	__func__.7582, %object
-	.size	__func__.7582, 15
-__func__.7582:
-	.string	"FlashReadPages"
 	.section	.rodata.__func__.7601,"a",@progbits
 	.align	3
-	.set	.LANCHOR142,. + 0
+	.set	.LANCHOR137,. + 0
 	.type	__func__.7601, %object
 	.size	__func__.7601, 15
 __func__.7601:
+	.string	"FlashReadPages"
+	.section	.rodata.__func__.7620,"a",@progbits
+	.align	3
+	.set	.LANCHOR142,. + 0
+	.type	__func__.7620, %object
+	.size	__func__.7620, 15
+__func__.7620:
 	.string	"FlashProgPages"
-	.section	.rodata.__func__.7625,"a",@progbits
+	.section	.rodata.__func__.7644,"a",@progbits
 	.align	3
 	.set	.LANCHOR77,. + 0
-	.type	__func__.7625, %object
-	.size	__func__.7625, 17
-__func__.7625:
+	.type	__func__.7644, %object
+	.size	__func__.7644, 17
+__func__.7644:
 	.string	"FlashEraseBlocks"
-	.section	.rodata.__func__.7740,"a",@progbits
+	.section	.rodata.__func__.7759,"a",@progbits
 	.align	3
 	.set	.LANCHOR185,. + 0
-	.type	__func__.7740, %object
-	.size	__func__.7740, 14
-__func__.7740:
+	.type	__func__.7759, %object
+	.size	__func__.7759, 14
+__func__.7759:
 	.string	"FtlWriteToIDB"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",@progbits,1
 .LC21:

commit 35bc5ad9158f3223a0eb44fc110ce9751893a5af
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Jul 9 16:45:08 2019 +0800

    common: android: reset the system when verify fail with ab & avb system
    
    Change-Id: I641f6a6972534a785058d94154cbf9304ddac45b
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 58df0fc2ec..230bf0ef7c 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -1096,6 +1096,16 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 		if (android_slot_verify(boot_partname, &load_address,
 					slot_suffix)) {
 			printf("AVB verify failed\n");
+#ifdef CONFIG_ANDROID_AB
+			printf("Reset in AB system.\n");
+			flushc();
+			/*
+			 * Since we use the retry-count in ab system, then can
+			 * try reboot if verify fail until the retry-count is
+			 * equal to zero.
+			 */
+			reset_cpu(0);
+#endif
 			return -1;
 		}
 	} else {
@@ -1117,6 +1127,16 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 			if (android_slot_verify(boot_partname, &load_address,
 						slot_suffix)) {
 				printf("AVB verify failed\n");
+#ifdef CONFIG_ANDROID_AB
+				printf("Reset in AB system.\n");
+				flushc();
+				/*
+				 * Since we use the retry-count in ab system,
+				 * then can try reboot if verify fail until
+				 * the retry-count is equal to zero.
+				 */
+				reset_cpu(0);
+#endif
 				return -1;
 			}
 		}

commit 3120d9d50e248da1e0208f3711287f6c0ce3a31b
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Jun 27 18:00:11 2019 +0800

    avb: do not use lastboot if enable CONFIG_ANDROID_AVB
    
    The avb process have verify next level firmware to ensure its
    availability. So there is no need to support lastboot in avb
    process.
    
    Change-Id: I1623a2bd93c54802ce0067cad7061ade6cc56313
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 20bbad5049..58df0fc2ec 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -1043,12 +1043,14 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	}
 
 	if (slot_suffix[0] != '_') {
+#ifndef CONFIG_ANDROID_AVB
 		printf("###There is no bootable slot, bring up lastboot!###\n");
 		if (rk_get_lastboot() == 1)
 			memcpy(slot_suffix, "_b", 2);
 		else if(rk_get_lastboot() == 0)
 			memcpy(slot_suffix, "_a", 2);
 		else
+#endif
 			return -1;
 	}
 #endif
diff --git a/lib/avb/rk_avb_user/rk_avb_ops_user.c b/lib/avb/rk_avb_user/rk_avb_ops_user.c
index cfe5936c50..f7b5901eab 100644
--- a/lib/avb/rk_avb_user/rk_avb_ops_user.c
+++ b/lib/avb/rk_avb_user/rk_avb_ops_user.c
@@ -154,12 +154,14 @@ int rk_avb_get_current_slot(char *select_slot)
 	}
 
 	if (rk_avb_ab_slot_select(ops->ab_ops, select_slot) != 0) {
+#ifndef CONFIG_ANDROID_AVB
 		printf("###There is no bootable slot, bring up last_boot!###\n");
 		if (rk_get_lastboot() == 1)
 			memcpy(select_slot, "_b", 2);
 		else if(rk_get_lastboot() == 0)
 			memcpy(select_slot, "_a", 2);
 		else
+#endif
 			return -1;
 		ret = 0;
 	}
@@ -793,4 +795,4 @@ int rk_avb_init_ab_metadata(void)
 	avb_ops_user_free(ops);
 
 	return 0;
-}
\ No newline at end of file
+}

commit 5adc7ded881d9acae0f0218e573a0ef5f4c3a04a
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Tue Jul 9 15:10:24 2019 +0800

    rk3308: include: configs: add config nand onfi detection
    
    Change-Id: I497fc73ca6f121a5de8b87871851b65586428e0e
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h
index 3bfa3222e2..77e744604b 100644
--- a/include/configs/rk3308_common.h
+++ b/include/configs/rk3308_common.h
@@ -13,6 +13,7 @@
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
+#define CONFIG_SYS_NAND_ONFI_DETECTION
 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
 #define CONFIG_SYS_NAND_PAGE_COUNT	64
 #define CONFIG_SYS_NAND_SIZE		(256 * 1024 * 1024)

commit 57e25cf7ea75e107ba3b4033e705e4e6a45dacbc
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Tue Jul 9 15:03:01 2019 +0800

    rockchip: drivers: mtd: nand: move driver to raw/ subdirectory
    
    Change-Id: Ic35e85a69a0599fb0f6dc47e38cfc40601f6e838
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index f86035bcce..457fd17dab 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -266,6 +266,29 @@ config NAND_MXS_USE_MINIMUM_ECC
 
 endif
 
+config NAND_ROCKCHIP
+	bool "Support for NAND on Rockchip SoCs"
+	select SYS_NAND_SELF_INIT
+	default n
+	help
+	  Enable support for Rockchip nand.
+
+config NAND_ROCKCHIP_V9
+	bool "Support for NAND V9 on Rockchip SoCs"
+	select SYS_NAND_SELF_INIT
+	default n
+	help
+	  Enable support for Rockchip nand v9.
+
+if NAND_ROCKCHIP || NAND_ROCKCHIP_V9
+config NAND_ROCKCHIP_DT
+	bool "Support Rockchip NAND controller as a DT device"
+	default y
+	help
+	  Enable the driver for Rockchip NAND flash on platforms
+	  using device tree.
+endif
+
 config NAND_ZYNQ
 	bool "Support for Zynq Nand controller"
 	select SYS_NAND_SELF_INIT
diff --git a/drivers/mtd/nand/raw/Makefile b/drivers/mtd/nand/raw/Makefile
index 9337f6482e..527efd0229 100644
--- a/drivers/mtd/nand/raw/Makefile
+++ b/drivers/mtd/nand/raw/Makefile
@@ -64,6 +64,8 @@ obj-$(CONFIG_TEGRA_NAND) += tegra_nand.o
 obj-$(CONFIG_NAND_OMAP_GPMC) += omap_gpmc.o
 obj-$(CONFIG_NAND_OMAP_ELM) += omap_elm.o
 obj-$(CONFIG_NAND_PLAT) += nand_plat.o
+obj-$(CONFIG_NAND_ROCKCHIP) += rockchip_nand.o
+obj-$(CONFIG_NAND_ROCKCHIP_V9) += rockchip_nand_v9.o
 obj-$(CONFIG_NAND_SUNXI) += sunxi_nand.o
 obj-$(CONFIG_NAND_ZYNQ) += zynq_nand.o
 obj-$(CONFIG_NAND_STM32_FMC2) += stm32_fmc2_nand.o
@@ -75,5 +77,6 @@ obj-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_spl.o
 obj-$(CONFIG_NAND_MXC) += mxc_nand_spl.o
 obj-$(CONFIG_NAND_MXS) += mxs_nand_spl.o mxs_nand.o
 obj-$(CONFIG_NAND_SUNXI) += sunxi_nand_spl.o
+obj-$(CONFIG_NAND_ROCKCHIP) += rockchip_nand_spl.o
 
 endif # drivers
diff --git a/drivers/mtd/nand/rockchip_nand.c b/drivers/mtd/nand/raw/rockchip_nand.c
similarity index 99%
rename from drivers/mtd/nand/rockchip_nand.c
rename to drivers/mtd/nand/raw/rockchip_nand.c
index 0f3c5ff2c4..959a2ef9c7 100644
--- a/drivers/mtd/nand/rockchip_nand.c
+++ b/drivers/mtd/nand/raw/rockchip_nand.c
@@ -14,7 +14,7 @@
 #include <linux/ioport.h>
 #include <linux/kernel.h>
 #include <linux/mtd/mtd.h>
-#include <linux/mtd/nand.h>
+#include <linux/mtd/rawnand.h>
 #include <linux/mtd/partitions.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/drivers/mtd/nand/rockchip_nand_spl.c b/drivers/mtd/nand/raw/rockchip_nand_spl.c
similarity index 100%
rename from drivers/mtd/nand/rockchip_nand_spl.c
rename to drivers/mtd/nand/raw/rockchip_nand_spl.c
diff --git a/drivers/mtd/nand/rockchip_nand_v9.c b/drivers/mtd/nand/raw/rockchip_nand_v9.c
similarity index 100%
rename from drivers/mtd/nand/rockchip_nand_v9.c
rename to drivers/mtd/nand/raw/rockchip_nand_v9.c

commit 2432f0ab4974749ba58dda5da55d1a2e9d7fb489
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Jul 9 15:02:49 2019 +0800

    rockchip: common: rename mtd to mtd_blk
    
    Change-Id: I430e1c6d0e37d4dee8bb127556e6847f9e640755
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index cfec67e118..2fe15ac920 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -115,7 +115,7 @@
 		"setenv devtype mmc; setenv devnum 1; echo Boot from SDcard;" \
 	"elif mmc dev 0; then " \
 		"setenv devtype mmc; setenv devnum 0;" \
-	"elif mtd dev 0; then " \
+	"elif mtd_blk dev 0; then " \
 		"setenv devtype mtd; setenv devnum 0;" \
 	"elif rknand dev 0; then " \
 		"setenv devtype rknand; setenv devnum 0;" \

commit 65eeaea56975ef6dbf83f5d5d60ba92050aa47d4
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Jul 9 14:55:28 2019 +0800

    cmd: cmd_blk: rename the command mtd to mtd_blk
    
    Since the command mtd is used in the file cmd/mtd.c, rename
    the command mtd to mtd_blk.
    
    Change-Id: I3a76aa8cc1da3f4b098f376d13fb0cdcf76ab246
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/cmd/mtd_blk.c b/cmd/mtd_blk.c
index 3ca1122dff..4135fb09be 100644
--- a/cmd/mtd_blk.c
+++ b/cmd/mtd_blk.c
@@ -10,7 +10,7 @@
 
 static int mtd_curr_dev = -1;
 
-static int do_mtd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_mtd_blk(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
 	if (argc == 2) {
 		return CMD_RET_FAILURE;
@@ -20,12 +20,12 @@ static int do_mtd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 }
 
 U_BOOT_CMD(
-	mtd, 8, 1, do_mtd,
-	"MTD device sub-system",
-	"mtd dev [dev] - show or set current MTD device\n"
-	"mtd part [dev] - print partition table of one or all MTD devices\n"
-	"mtd read addr blk# cnt - read `cnt' blocks starting at block\n"
+	mtd_blk, 8, 1, do_mtd_blk,
+	"MTD Block device sub-system",
+	"mtd_blk dev [dev] - show or set current MTD device\n"
+	"mtd_blk part [dev] - print partition table of one or all MTD devices\n"
+	"mtd_blk read addr blk# cnt - read `cnt' blocks starting at block\n"
 	"     `blk#' to memory address `addr'\n"
-	"mtd write addr blk# cnt - write `cnt' blocks starting at block\n"
+	"mtd_blk write addr blk# cnt - write `cnt' blocks starting at block\n"
 	"     `blk#' from memory address `addr'"
 );

commit ec6d4288c5edc38bc7f8eced3745f104ebf13e52
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Jul 9 14:47:07 2019 +0800

    mtd: mtd_blk: test mtd is NULL or not before use
    
    Change-Id: Ie8c34ba5565a5668aeac3883613c089d5bba47a0
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index 81f4b137e5..76b2faca13 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -35,6 +35,9 @@ char *mtd_part_parse(void)
 		return NULL;
 
 	mtd = (struct mtd_info *)dev_desc->bdev->priv;
+	if (!mtd)
+		return NULL;
+
 	mtd_part_info = (char *)calloc(MTD_PART_INFO_MAX_SIZE, sizeof(char));
 	if (!mtd_part_info) {
 		printf("%s: Fail to malloc!", __func__);

commit 17e5c754fc60377665b32cec14d46ee4f866902d
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jun 28 22:28:55 2019 +0800

    rockchip: atags: add BOOT_TYPE_UNKNOWN
    
    Change-Id: I486f78a8394bba27119ba3e318ae11288f3a585c
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rk_atags.h b/arch/arm/include/asm/arch-rockchip/rk_atags.h
index bdb6254378..21559e8f37 100644
--- a/arch/arm/include/asm/arch-rockchip/rk_atags.h
+++ b/arch/arm/include/asm/arch-rockchip/rk_atags.h
@@ -33,6 +33,7 @@
 #endif
 
 /* tag_bootdev.devtype */
+#define BOOT_TYPE_UNKNOWN	0
 #define BOOT_TYPE_NAND		(1 << 0)
 #define BOOT_TYPE_EMMC		(1 << 1)
 #define BOOT_TYPE_SD0		(1 << 2)

commit b7307f89b5f85ac453e593ba531641e765c2faa7
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jun 28 21:53:42 2019 +0800

    rockchip: bootrom: sync bootsource from bootrom
    
    Add more bootsource:
    1.BROM_BOOTSOURCE_UNKNOWN
    2.BROM_BOOTSOURCE_I2C
    3.BROM_BOOTSOURCE_SPI
    
    Change-Id: Idd4c28caa532a22b576b255e12d1e83e4b96471d
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/bootrom.h b/arch/arm/include/asm/arch-rockchip/bootrom.h
index 15bf7a94c9..0aa58493d0 100644
--- a/arch/arm/include/asm/arch-rockchip/bootrom.h
+++ b/arch/arm/include/asm/arch-rockchip/bootrom.h
@@ -44,11 +44,14 @@ void back_to_bootrom(enum rockchip_bootrom_cmd brom_cmd);
  * Boot-device identifiers as used by the BROM
  */
 enum {
+	BROM_BOOTSOURCE_UNKNOWN = 0,
 	BROM_BOOTSOURCE_NAND = 1,
 	BROM_BOOTSOURCE_EMMC = 2,
 	BROM_BOOTSOURCE_SPINOR = 3,
 	BROM_BOOTSOURCE_SPINAND = 4,
 	BROM_BOOTSOURCE_SD = 5,
+	BROM_BOOTSOURCE_I2C = 8,
+	BROM_BOOTSOURCE_SPI = 9,
 	BROM_BOOTSOURCE_USB = 10,
 	BROM_LAST_BOOTSOURCE = BROM_BOOTSOURCE_USB
 };

commit 4cf3d2547c97473d84e1992037cb11880743a2cc
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Sun Jul 7 19:44:56 2019 +0800

    configs: rk1808: enable inno mipi dphy for logo display
    
    Change-Id: I14bbc5caa183166785e8d8b1d04a3cec087d4163
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/configs/rk1808_defconfig b/configs/rk1808_defconfig
index 0cba656691..86937c3554 100644
--- a/configs/rk1808_defconfig
+++ b/configs/rk1808_defconfig
@@ -96,6 +96,7 @@ CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_DRM_ROCKCHIP_INNO_MIPI_PHY=y
 CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_LCD=y
 CONFIG_LZ4=y

commit 27d50ce71145ed896ffbf07aa0945cc048ad1187
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Sun Jul 7 19:44:07 2019 +0800

    video/drm: inno_mipi_phy: Add support for rk1808
    
    Change-Id: I79d7b33f8458502ed8015d38a4b79a24a7bf7328
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/drivers/video/drm/inno_mipi_phy.c b/drivers/video/drm/inno_mipi_phy.c
index 9f41260c0b..8047913d3c 100644
--- a/drivers/video/drm/inno_mipi_phy.c
+++ b/drivers/video/drm/inno_mipi_phy.c
@@ -26,63 +26,79 @@
 #define UPDATE(v, h, l)		(((v) << (l)) & GENMASK((h), (l)))
 
 /* Innosilicon MIPI D-PHY registers */
-#define INNO_PHY_LANE_CTRL	0x00000
-#define MIPI_BGPD		BIT(7)
-#define CLK_LANE_EN_MASK	BIT(6)
-#define DATA_LANE_3_EN_MASK	BIT(5)
-#define DATA_LANE_2_EN_MASK	BIT(4)
-#define DATA_LANE_1_EN_MASK	BIT(3)
-#define DATA_LANE_0_EN_MASK	BIT(2)
-#define CLK_LANE_EN		BIT(6)
-#define DATA_LANE_3_EN		BIT(5)
-#define DATA_LANE_2_EN		BIT(4)
-#define DATA_LANE_1_EN		BIT(3)
-#define DATA_LANE_0_EN		BIT(2)
-#define PWROK_BP		BIT(1)
-#define PWROK			BIT(0)
-#define INNO_PHY_POWER_CTRL	0x00004
-#define ANALOG_RESET_MASK	BIT(2)
-#define ANALOG_RESET		BIT(2)
-#define ANALOG_NORMAL		0
-#define LDO_POWER_MASK		BIT(1)
-#define LDO_POWER_DOWN		BIT(1)
-#define LDO_POWER_ON		0
-#define PLL_POWER_MASK		BIT(0)
-#define PLL_POWER_DOWN		BIT(0)
-#define PLL_POWER_ON		0
-#define INNO_PHY_PLL_CTRL_0	0x0000c
-#define FBDIV_HI_MASK		BIT(5)
-#define FBDIV_HI(x)		UPDATE(x, 5, 5)
-#define PREDIV_MASK		GENMASK(4, 0)
-#define PREDIV(x)		UPDATE(x, 4, 0)
-#define INNO_PHY_PLL_CTRL_1	0x00010
-#define FBDIV_LO_MASK		GENMASK(7, 0)
-#define FBDIV_LO(x)		UPDATE(x, 7, 0)
-#define INNO_PHY_DIG_CTRL	0x00080
-#define DIGITAL_RESET_MASK	BIT(0)
-#define DIGITAL_NORMAL		BIT(0)
-#define DIGITAL_RESET		0
-#define INNO_PHY_LVDS_CTRL	0x003ac
-#define LVDS_BGPD		BIT(0)
-
-#define INNO_CLOCK_LANE_REG_BASE	0x00100
-#define INNO_DATA_LANE_0_REG_BASE	0x00180
-#define INNO_DATA_LANE_1_REG_BASE	0x00200
-#define INNO_DATA_LANE_2_REG_BASE	0x00280
-#define INNO_DATA_LANE_3_REG_BASE	0x00300
-
-#define T_LPX_OFFSET		0x00014
-#define T_HS_PREPARE_OFFSET	0x00018
-#define T_HS_ZERO_OFFSET	0x0001c
-#define T_HS_TRAIL_OFFSET	0x00020
-#define T_HS_EXIT_OFFSET	0x00024
-#define T_CLK_POST_OFFSET	0x00028
-#define T_WAKUP_H_OFFSET	0x00030
-#define T_WAKUP_L_OFFSET	0x00034
-#define T_CLK_PRE_OFFSET	0x00038
-#define T_TA_GO_OFFSET		0x00040
-#define T_TA_SURE_OFFSET	0x00044
-#define T_TA_WAIT_OFFSET	0x00048
+#define INNO_PHY_LANE_CTRL		0x0000
+#define MIPI_BGPD			BIT(7)
+#define CLK_LANE_EN_MASK		BIT(6)
+#define DATA_LANE_3_EN_MASK		BIT(5)
+#define DATA_LANE_2_EN_MASK		BIT(4)
+#define DATA_LANE_1_EN_MASK		BIT(3)
+#define DATA_LANE_0_EN_MASK		BIT(2)
+#define CLK_LANE_EN			BIT(6)
+#define DATA_LANE_3_EN			BIT(5)
+#define DATA_LANE_2_EN			BIT(4)
+#define DATA_LANE_1_EN			BIT(3)
+#define DATA_LANE_0_EN			BIT(2)
+#define PWROK_BP			BIT(1)
+#define PWROK				BIT(0)
+#define INNO_PHY_POWER_CTRL		0x0004
+#define ANALOG_RESET_MASK		BIT(2)
+#define ANALOG_RESET			BIT(2)
+#define ANALOG_NORMAL			0
+#define LDO_POWER_MASK			BIT(1)
+#define LDO_POWER_DOWN			BIT(1)
+#define LDO_POWER_ON			0
+#define PLL_POWER_MASK			BIT(0)
+#define PLL_POWER_DOWN			BIT(0)
+#define PLL_POWER_ON			0
+#define INNO_PHY_PLL_CTRL_0		0x000c
+#define FBDIV_HI_MASK			BIT(5)
+#define FBDIV_HI(x)			UPDATE(x, 5, 5)
+#define PREDIV_MASK			GENMASK(4, 0)
+#define PREDIV(x)			UPDATE(x, 4, 0)
+#define INNO_PHY_PLL_CTRL_1		0x0010
+#define FBDIV_LO_MASK			GENMASK(7, 0)
+#define FBDIV_LO(x)			UPDATE(x, 7, 0)
+#define ANALOG_REG_08			0x0020
+#define PRE_EMPHASIS_ENABLE_MASK	BIT(7)
+#define PRE_EMPHASIS_ENABLE		BIT(7)
+#define PRE_EMPHASIS_DISABLE		0
+#define PLL_POST_DIV_ENABLE_MASK	BIT(5)
+#define PLL_POST_DIV_ENABLE		BIT(5)
+#define PLL_POST_DIV_DISABLE		0
+#define DATA_LANE_VOD_RANGE_SET_MASK	GENMASK(3, 0)
+#define DATA_LANE_VOD_RANGE_SET(x)	UPDATE(x, 3, 0)
+#define ANALOG_REG_0B			0x002c
+#define CLOCK_LANE_VOD_RANGE_SET_MASK	GENMASK(3, 0)
+#define CLOCK_LANE_VOD_RANGE_SET(x)	UPDATE(x, 3, 0)
+#define VOD_MIN_RANGE			0x1
+#define VOD_MID_RANGE			0x3
+#define VOD_BIG_RANGE			0x7
+#define VOD_MAX_RANGE			0xf
+#define INNO_PHY_DIG_CTRL		0x0080
+#define DIGITAL_RESET_MASK		BIT(0)
+#define DIGITAL_NORMAL			BIT(0)
+#define DIGITAL_RESET			0
+#define INNO_PHY_LVDS_CTRL		0x03ac
+#define LVDS_BGPD			BIT(0)
+
+#define INNO_CLOCK_LANE_REG_BASE	0x0100
+#define INNO_DATA_LANE_0_REG_BASE	0x0180
+#define INNO_DATA_LANE_1_REG_BASE	0x0200
+#define INNO_DATA_LANE_2_REG_BASE	0x0280
+#define INNO_DATA_LANE_3_REG_BASE	0x0300
+
+#define T_LPX_OFFSET		0x0014
+#define T_HS_PREPARE_OFFSET	0x0018
+#define T_HS_ZERO_OFFSET	0x001c
+#define T_HS_TRAIL_OFFSET	0x0020
+#define T_HS_EXIT_OFFSET	0x0024
+#define T_CLK_POST_OFFSET	0x0028
+#define T_WAKUP_H_OFFSET	0x0030
+#define T_WAKUP_L_OFFSET	0x0034
+#define T_CLK_PRE_OFFSET	0x0038
+#define T_TA_GO_OFFSET		0x0040
+#define T_TA_SURE_OFFSET	0x0044
+#define T_TA_WAIT_OFFSET	0x0048
 
 #define T_LPX_MASK		GENMASK(5, 0)
 #define T_LPX(x)		UPDATE(x, 5, 0)
@@ -109,6 +125,11 @@
 #define T_TA_WAIT_MASK		GENMASK(5, 0)
 #define T_TA_WAIT(x)		UPDATE(x, 5, 0)
 
+enum soc_type {
+	RV1108_MIPI_DPHY,
+	RK1808_MIPI_DPHY,
+};
+
 enum lane_type {
 	CLOCK_LANE,
 	DATA_LANE_0,
@@ -198,19 +219,37 @@ struct fixed_param {
 };
 
 static const struct fixed_param fixed_param_table[] = {
-	FIXED_PARAM( 110, 0x20, 0x16, 0x02, 0x22),
-	FIXED_PARAM( 150, 0x06, 0x16, 0x03, 0x45),
-	FIXED_PARAM( 200, 0x18, 0x17, 0x04, 0x0b),
-	FIXED_PARAM( 250, 0x05, 0x17, 0x05, 0x16),
-	FIXED_PARAM( 300, 0x51, 0x18, 0x06, 0x2c),
-	FIXED_PARAM( 400, 0x64, 0x19, 0x07, 0x33),
-	FIXED_PARAM( 500, 0x20, 0x1b, 0x07, 0x4e),
-	FIXED_PARAM( 600, 0x6a, 0x1d, 0x08, 0x3a),
-	FIXED_PARAM( 700, 0x3e, 0x1e, 0x08, 0x6a),
-	FIXED_PARAM( 800, 0x21, 0x1f, 0x09, 0x29),
+	FIXED_PARAM(110, 0x20, 0x16, 0x02, 0x22),
+	FIXED_PARAM(150, 0x06, 0x16, 0x03, 0x45),
+	FIXED_PARAM(200, 0x18, 0x17, 0x04, 0x0b),
+	FIXED_PARAM(250, 0x05, 0x17, 0x05, 0x16),
+	FIXED_PARAM(300, 0x51, 0x18, 0x06, 0x2c),
+	FIXED_PARAM(400, 0x64, 0x19, 0x07, 0x33),
+	FIXED_PARAM(500, 0x20, 0x1b, 0x07, 0x4e),
+	FIXED_PARAM(600, 0x6a, 0x1d, 0x08, 0x3a),
+	FIXED_PARAM(700, 0x3e, 0x1e, 0x08, 0x6a),
+	FIXED_PARAM(800, 0x21, 0x1f, 0x09, 0x29),
 	FIXED_PARAM(1000, 0x09, 0x20, 0x09, 0x27)
 };
 
+static const struct fixed_param rk1808_fixed_param_table[] = {
+	FIXED_PARAM(110, 0x7f, 0x16, 0x02, 0x02),
+	FIXED_PARAM(150, 0x7f, 0x16, 0x03, 0x02),
+	FIXED_PARAM(200, 0x7f, 0x17, 0x04, 0x02),
+	FIXED_PARAM(250, 0x7f, 0x17, 0x05, 0x04),
+	FIXED_PARAM(300, 0x7f, 0x18, 0x06, 0x04),
+	FIXED_PARAM(400, 0x7e, 0x19, 0x07, 0x04),
+	FIXED_PARAM(500, 0x7c, 0x1b, 0x07, 0x08),
+	FIXED_PARAM(600, 0x70, 0x1d, 0x08, 0x10),
+	FIXED_PARAM(700, 0x40, 0x1e, 0x08, 0x30),
+	FIXED_PARAM(800, 0x02, 0x1f, 0x09, 0x30),
+	FIXED_PARAM(1000, 0x08, 0x20, 0x09, 0x30),
+	FIXED_PARAM(1400, 0x03, 0x32, 0x14, 0x0f),
+	FIXED_PARAM(1600, 0x42, 0x36, 0x0e, 0x0f),
+	FIXED_PARAM(1800, 0x47, 0x7a, 0x0e, 0x0f),
+	FIXED_PARAM(2000, 0x64, 0x7a, 0x0e, 0x0b),
+};
+
 static inline void inno_write(struct inno_mipi_dphy *inno, u32 reg, u32 val)
 {
 	writel(val, inno->regs + reg);
@@ -320,19 +359,28 @@ static void inno_mipi_dphy_timing_update(struct inno_mipi_dphy *inno,
 
 static void inno_mipi_dphy_get_fixed_param(struct inno_mipi_dphy_timing *t,
 					   unsigned int freq,
+					   enum soc_type soc_type,
 					   enum lane_type lane_type)
 {
-	const struct fixed_param *param;
-	int i;
+	const struct fixed_param *param, *param_table;
+	int i, param_num;
+
+	if (soc_type == RK1808_MIPI_DPHY) {
+		param_table = rk1808_fixed_param_table;
+		param_num = ARRAY_SIZE(rk1808_fixed_param_table);
+	} else {
+		param_table = fixed_param_table;
+		param_num = ARRAY_SIZE(fixed_param_table);
+	}
 
-	for (i = 0; i < ARRAY_SIZE(fixed_param_table); i++)
-		if (freq <= fixed_param_table[i].max_freq)
+	for (i = 0; i < param_num; i++)
+		if (freq <= param_table[i].max_freq)
 			break;
 
-	if (i == ARRAY_SIZE(fixed_param_table))
+	if (i == param_num)
 		--i;
 
-	param = &fixed_param_table[i];
+	param = &param_table[i];
 
 	if (lane_type == CLOCK_LANE)
 		t->hs_zero = param->clk_lane.hs_zero;
@@ -346,6 +394,8 @@ static void inno_mipi_dphy_get_fixed_param(struct inno_mipi_dphy_timing *t,
 static void inno_mipi_dphy_lane_timing_init(struct inno_mipi_dphy *inno,
 					    enum lane_type lane_type)
 {
+	struct rockchip_phy *phy =
+		(struct rockchip_phy *)dev_get_driver_data(inno->dev);
 	struct mipi_dphy_timing timing;
 	struct inno_mipi_dphy_timing data;
 	unsigned long txbyteclk, txclkesc, UI;
@@ -363,7 +413,8 @@ static void inno_mipi_dphy_lane_timing_init(struct inno_mipi_dphy *inno,
 	      txbyteclk, txclkesc, esc_clk_div, UI);
 
 	mipi_dphy_timing_get_default(&timing, UI);
-	inno_mipi_dphy_get_fixed_param(&data, inno->lane_mbps, lane_type);
+	inno_mipi_dphy_get_fixed_param(&data, inno->lane_mbps,
+				       phy->soc_type, lane_type);
 
 	/*
 	 * Ttxbyteclk * val >= Ths-exit
@@ -599,6 +650,14 @@ static unsigned long inno_mipi_dphy_set_pll(struct rockchip_phy *phy,
 	v = FBDIV_LO(fbdiv);
 	inno_update_bits(inno, INNO_PHY_PLL_CTRL_1, m, v);
 
+	if (phy->soc_type == RK1808_MIPI_DPHY) {
+		inno_update_bits(inno, ANALOG_REG_08,
+				 PLL_POST_DIV_ENABLE_MASK, PLL_POST_DIV_ENABLE);
+		inno_update_bits(inno, ANALOG_REG_0B,
+				 CLOCK_LANE_VOD_RANGE_SET_MASK,
+				 CLOCK_LANE_VOD_RANGE_SET(VOD_MAX_RANGE));
+	}
+
 	inno->lane_mbps = fout / USEC_PER_SEC;
 
 	return fout;
@@ -637,7 +696,13 @@ static const struct rockchip_phy_funcs inno_mipi_dphy_funcs = {
 };
 
 static struct rockchip_phy inno_mipi_dphy_driver_data = {
+	.funcs = &inno_mipi_dphy_funcs,
+	.soc_type = RV1108_MIPI_DPHY,
+};
+
+static struct rockchip_phy rk1808_inno_mipi_dphy_driver_data = {
 	 .funcs = &inno_mipi_dphy_funcs,
+	 .soc_type = RK1808_MIPI_DPHY,
 };
 
 static const struct udevice_id inno_mipi_dphy_ids[] = {
@@ -645,6 +710,10 @@ static const struct udevice_id inno_mipi_dphy_ids[] = {
 		.compatible = "rockchip,rv1108-mipi-dphy",
 		.data = (ulong)&inno_mipi_dphy_driver_data,
 	},
+	{
+		.compatible = "rockchip,rk1808-mipi-dphy",
+		.data = (ulong)&rk1808_inno_mipi_dphy_driver_data,
+	},
 	{}
 };
 
diff --git a/drivers/video/drm/rockchip_phy.h b/drivers/video/drm/rockchip_phy.h
index 479dbb059c..de4983dd6c 100644
--- a/drivers/video/drm/rockchip_phy.h
+++ b/drivers/video/drm/rockchip_phy.h
@@ -30,6 +30,7 @@ struct rockchip_phy {
 	struct udevice *dev;
 	const struct rockchip_phy_funcs *funcs;
 	const void *data;
+	int soc_type;
 };
 
 int rockchip_phy_init(struct rockchip_phy *phy);

commit f8841d3b055ca913ce1b068758680ed2895da18a
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Sun Jul 7 19:42:54 2019 +0800

    video/drm: dsi: Add support for rk1808
    
    Change-Id: I4d788a2d9594798a3e9b8fba69214e5f8a722193
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/drivers/video/drm/dw_mipi_dsi.c b/drivers/video/drm/dw_mipi_dsi.c
index 263bb7ac44..01135a72ef 100644
--- a/drivers/video/drm/dw_mipi_dsi.c
+++ b/drivers/video/drm/dw_mipi_dsi.c
@@ -1314,6 +1314,26 @@ static const struct rockchip_connector px30_mipi_dsi_driver_data = {
 	 .data = &px30_mipi_dsi_plat_data,
 };
 
+static const u32 rk1808_dsi_grf_reg_fields[MAX_FIELDS] = {
+	[MASTERSLAVEZ]          = GRF_REG_FIELD(0x0440,  8,  8),
+	[DPIUPDATECFG]          = GRF_REG_FIELD(0x0440,  7,  7),
+	[DPICOLORM]             = GRF_REG_FIELD(0x0440,  3,  3),
+	[DPISHUTDN]             = GRF_REG_FIELD(0x0440,  2,  2),
+	[FORCETXSTOPMODE]       = GRF_REG_FIELD(0x0444,  7, 10),
+	[FORCERXMODE]           = GRF_REG_FIELD(0x0444,  6,  6),
+	[TURNDISABLE]           = GRF_REG_FIELD(0x0444,  5,  5),
+};
+
+static const struct dw_mipi_dsi_plat_data rk1808_mipi_dsi_plat_data = {
+	.dsi0_grf_reg_fields = rk1808_dsi_grf_reg_fields,
+	.max_bit_rate_per_lane = 2000000000UL,
+};
+
+static const struct rockchip_connector rk1808_mipi_dsi_driver_data = {
+	 .funcs = &dw_mipi_dsi_connector_funcs,
+	 .data = &rk1808_mipi_dsi_plat_data,
+};
+
 static const u32 rk3128_dsi_grf_reg_fields[MAX_FIELDS] = {
 	[FORCETXSTOPMODE]	= GRF_REG_FIELD(0x0150, 10, 13),
 	[FORCERXMODE]		= GRF_REG_FIELD(0x0150,  9,  9),
@@ -1469,6 +1489,10 @@ static const struct udevice_id dw_mipi_dsi_ids[] = {
 		.compatible = "rockchip,px30-mipi-dsi",
 		.data = (ulong)&px30_mipi_dsi_driver_data,
 	},
+	{
+		.compatible = "rockchip,rk1808-mipi-dsi",
+		.data = (ulong)&rk1808_mipi_dsi_driver_data,
+	},
 	{
 		.compatible = "rockchip,rk3128-mipi-dsi",
 		.data = (ulong)&rk3128_mipi_dsi_driver_data,

commit 5b045e7d5a4f5e37f8bc9e2006fd21cd1dc6c226
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 25 13:13:53 2019 +0800

    rockchip: board: move rk3288 fdt fixup to rk3288.c
    
    Change-Id: I6ec415121457c86412648cc6f54b4001bc044dd9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 443d0157aa..f5583c8f67 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -455,23 +455,6 @@ int board_fdt_fixup(void *blob)
 	rockchip_display_fixup(blob);
 #endif
 
-	/*
-	 * Platform fixup:
-	 *
-	 * - RK3288: Recognize RK3288W by HDMI Revision ID is 0x1A;
-	 * - RK1808: MMC strength 2mA;
-	 */
-#ifdef CONFIG_ROCKCHIP_RK3288
-	int ret;
-
-	if (soc_is_rk3288w()) {
-		ret = fdt_setprop_string(blob, 0,
-					 "compatible", "rockchip,rk3288w");
-		if (ret)
-			printf("fdt set compatible failed: %d\n", ret);
-	}
-#endif
-
 	return rk_board_fdt_fixup(blob);
 }
 
diff --git a/arch/arm/mach-rockchip/rk3288/rk3288.c b/arch/arm/mach-rockchip/rk3288/rk3288.c
index 2a8bb49d83..8fcc9c10c9 100644
--- a/arch/arm/mach-rockchip/rk3288/rk3288.c
+++ b/arch/arm/mach-rockchip/rk3288/rk3288.c
@@ -10,6 +10,7 @@
 #include <asm/io.h>
 #include <asm/arch/bootrom.h>
 #include <asm/arch/clock.h>
+#include <asm/arch/cpu.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/periph.h>
 #include <asm/arch/cru_rk3288.h>
@@ -372,3 +373,17 @@ int board_early_init_f(void)
 
 	return 0;
 }
+
+#ifndef CONFIG_SPL_BUILD
+int rk_board_fdt_fixup(void *blob)
+{
+	/* RK3288: Recognize RK3288W by HDMI Revision ID is 0x1A; */
+	if (soc_is_rk3288w()) {
+		if (fdt_setprop_string(blob, 0,
+				       "compatible", "rockchip,rk3288w"))
+			printf("RK3288w set compatible failed!\n");
+	}
+
+	return 0;
+}
+#endif

commit 38ce6261011faa0116d2131e8bf569e55aa1878a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 25 13:15:47 2019 +0800

    rockchip: board: move rk1808 fdt fixup to rk1808.c
    
    Change-Id: I83914f26081802f7580b40acf357546b0003c2bb
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 5540749f4f..443d0157aa 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -148,6 +148,11 @@ __weak int rk_board_late_init(void)
 	return 0;
 }
 
+__weak int rk_board_fdt_fixup(void *blob)
+{
+	return 0;
+}
+
 __weak int soc_clk_dump(void)
 {
 	return 0;
@@ -441,55 +446,8 @@ int interrupt_debugger_init(void)
 	return ret;
 }
 
-#if defined(CONFIG_ROCKCHIP_RK1808) && !defined(CONFIG_COPROCESSOR_RK1808)
-#define PINCTRL_EMMC_BUS8_PATH		"/pinctrl/emmc/emmc-bus8"
-#define PINCTRL_EMMC_CMD_PATH		"/pinctrl/emmc/emmc-cmd"
-#define PINCTRL_EMMC_CLK_PATH		"/pinctrl/emmc/emmc-clk"
-#define PINCTRL_PCFG_PU_2MA_PATH	"/pinctrl/pcfg-pull-up-2ma"
-#define MAX_ROCKCHIP_PINS_ENTRIES	12
-
-static int rockchip_pinctrl_cfg_fdt_fixup(const char *path, u32 new_phandle)
-{
-	u32 cells[MAX_ROCKCHIP_PINS_ENTRIES * 4];
-	const u32 *data;
-	int i, count;
-	int node;
-
-	node = fdt_path_offset(gd->fdt_blob, path);
-	if (node < 0) {
-		debug("%s: can't find: %s\n", __func__, path);
-		return node;
-	}
-
-	data = fdt_getprop(gd->fdt_blob, node, "rockchip,pins", &count);
-	if (!data) {
-		debug("%s: can't find prop \"rockchip,pins\"\n", __func__);
-		return -ENODATA;
-	}
-
-	count /= sizeof(u32);
-	if (count > MAX_ROCKCHIP_PINS_ENTRIES * 4) {
-		debug("%s: %d is over max count\n", __func__, count);
-		return -EINVAL;
-	}
-
-	for (i = 0; i < count; i++)
-		cells[i] = data[i];
-
-	for (i = 0; i < (count >> 2); i++)
-		cells[4 * i + 3] = cpu_to_fdt32(new_phandle);
-
-	fdt_setprop((void *)gd->fdt_blob, node, "rockchip,pins",
-		    &cells, count * sizeof(u32));
-
-	return 0;
-}
-#endif
-
 int board_fdt_fixup(void *blob)
 {
-	int ret = 0;
-
 	/*
 	 * Common fixup for DRM
 	 */
@@ -504,38 +462,17 @@ int board_fdt_fixup(void *blob)
 	 * - RK1808: MMC strength 2mA;
 	 */
 #ifdef CONFIG_ROCKCHIP_RK3288
+	int ret;
+
 	if (soc_is_rk3288w()) {
 		ret = fdt_setprop_string(blob, 0,
 					 "compatible", "rockchip,rk3288w");
 		if (ret)
 			printf("fdt set compatible failed: %d\n", ret);
 	}
-#elif defined(CONFIG_ROCKCHIP_RK1808) && !defined(CONFIG_COPROCESSOR_RK1808)
-	struct tag *t;
-	u32 ph_pu_2ma;
-
-	t = atags_get_tag(ATAG_SOC_INFO);
-	if (!t)
-		return 0;
-
-	debug("soc=0x%x, flags=0x%x\n", t->u.soc.name, t->u.soc.flags);
-
-	if (t->u.soc.flags != SOC_FLAGS_ET00)
-		return 0;
-
-	ph_pu_2ma = fdt_get_phandle(gd->fdt_blob,
-		    fdt_path_offset(gd->fdt_blob, PINCTRL_PCFG_PU_2MA_PATH));
-	if (!ph_pu_2ma) {
-		debug("Can't find: %s\n", PINCTRL_PCFG_PU_2MA_PATH);
-		return -EINVAL;
-	}
-
-	ret |= rockchip_pinctrl_cfg_fdt_fixup(PINCTRL_EMMC_BUS8_PATH, ph_pu_2ma);
-	ret |= rockchip_pinctrl_cfg_fdt_fixup(PINCTRL_EMMC_CMD_PATH, ph_pu_2ma);
-	ret |= rockchip_pinctrl_cfg_fdt_fixup(PINCTRL_EMMC_CLK_PATH, ph_pu_2ma);
 #endif
 
-	return ret;
+	return rk_board_fdt_fixup(blob);
 }
 
 #ifdef CONFIG_ARM64_BOOT_AARCH32
diff --git a/arch/arm/mach-rockchip/rk1808/rk1808.c b/arch/arm/mach-rockchip/rk1808/rk1808.c
index 5e17ed2ca7..1b0350822a 100644
--- a/arch/arm/mach-rockchip/rk1808/rk1808.c
+++ b/arch/arm/mach-rockchip/rk1808/rk1808.c
@@ -9,6 +9,7 @@
 #include <asm/io.h>
 #include <asm/arch/grf_rk1808.h>
 #include <asm/arch/hardware.h>
+#include <asm/arch/rk_atags.h>
 #include <asm/gpio.h>
 #include <debug_uart.h>
 
@@ -90,6 +91,80 @@ void board_debug_uart_init(void)
 #endif
 }
 
+#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_COPROCESSOR_RK1808)
+#define PINCTRL_EMMC_BUS8_PATH		"/pinctrl/emmc/emmc-bus8"
+#define PINCTRL_EMMC_CMD_PATH		"/pinctrl/emmc/emmc-cmd"
+#define PINCTRL_EMMC_CLK_PATH		"/pinctrl/emmc/emmc-clk"
+#define PINCTRL_PCFG_PU_2MA_PATH	"/pinctrl/pcfg-pull-up-2ma"
+#define MAX_ROCKCHIP_PINS_ENTRIES	12
+
+static int rockchip_pinctrl_cfg_fdt_fixup(const char *path, u32 new_phandle)
+{
+	u32 cells[MAX_ROCKCHIP_PINS_ENTRIES * 4];
+	const u32 *data;
+	int i, count;
+	int node;
+
+	node = fdt_path_offset(gd->fdt_blob, path);
+	if (node < 0) {
+		debug("%s: can't find: %s\n", __func__, path);
+		return node;
+	}
+
+	data = fdt_getprop(gd->fdt_blob, node, "rockchip,pins", &count);
+	if (!data) {
+		debug("%s: can't find prop \"rockchip,pins\"\n", __func__);
+		return -ENODATA;
+	}
+
+	count /= sizeof(u32);
+	if (count > MAX_ROCKCHIP_PINS_ENTRIES * 4) {
+		debug("%s: %d is over max count\n", __func__, count);
+		return -EINVAL;
+	}
+
+	for (i = 0; i < count; i++)
+		cells[i] = data[i];
+
+	for (i = 0; i < (count >> 2); i++)
+		cells[4 * i + 3] = cpu_to_fdt32(new_phandle);
+
+	fdt_setprop((void *)gd->fdt_blob, node, "rockchip,pins",
+		    &cells, count * sizeof(u32));
+
+	return 0;
+}
+
+int rk_board_fdt_fixup(void *blob)
+{
+	struct tag *t;
+	u32 ph_pu_2ma;
+	int ret = 0;
+
+	t = atags_get_tag(ATAG_SOC_INFO);
+	if (!t)
+		return 0;
+
+	debug("soc=0x%x, flags=0x%x\n", t->u.soc.name, t->u.soc.flags);
+
+	if (t->u.soc.flags != SOC_FLAGS_ET00)
+		return 0;
+
+	ph_pu_2ma = fdt_get_phandle(gd->fdt_blob,
+		    fdt_path_offset(gd->fdt_blob, PINCTRL_PCFG_PU_2MA_PATH));
+	if (!ph_pu_2ma) {
+		debug("Can't find: %s\n", PINCTRL_PCFG_PU_2MA_PATH);
+		return -EINVAL;
+	}
+
+	ret |= rockchip_pinctrl_cfg_fdt_fixup(PINCTRL_EMMC_BUS8_PATH, ph_pu_2ma);
+	ret |= rockchip_pinctrl_cfg_fdt_fixup(PINCTRL_EMMC_CMD_PATH, ph_pu_2ma);
+	ret |= rockchip_pinctrl_cfg_fdt_fixup(PINCTRL_EMMC_CLK_PATH, ph_pu_2ma);
+
+	return ret;
+}
+#endif
+
 /*
  * rockchip: rk1808: fixup "ramdisk_addr_r" by real image address
  *

commit 46929408f20c518828acfb3d952c71bb0c6bd8e8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 1 18:03:58 2019 +0800

    rockchip: rk1808: fixup "ramdisk_addr_r" by real image address
    
    We fixup "ramdisk_addr_r" with real image address which has been already
    loaded by pre-loader. This brings benefits:
    
    - It saves boot time when ramdisk is large;
    - It avoids memory overlap with original ramdisk data.
    
    Change-Id: Ib67545e1895c09c8294a1682f9cd52d59c3b33b8
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk1808/rk1808.c b/arch/arm/mach-rockchip/rk1808/rk1808.c
index 03de8b932e..5e17ed2ca7 100644
--- a/arch/arm/mach-rockchip/rk1808/rk1808.c
+++ b/arch/arm/mach-rockchip/rk1808/rk1808.c
@@ -4,6 +4,8 @@
  *
  */
 #include <common.h>
+#include <android_image.h>
+#include <boot_rkimg.h>
 #include <asm/io.h>
 #include <asm/arch/grf_rk1808.h>
 #include <asm/arch/hardware.h>
@@ -87,3 +89,53 @@ void board_debug_uart_init(void)
 		     GPIO4A3_UART2_RX_M0 << GPIO4A3_SHIFT);
 #endif
 }
+
+/*
+ * rockchip: rk1808: fixup "ramdisk_addr_r" by real image address
+ *
+ * We fixup "ramdisk_addr_r" with real image address which has been already
+ * loaded by pre-loader. This brings benefits:
+ *
+ * - It saves boot time when ramdisk is large;
+ * - It avoids memory overlap with original ramdisk data.
+ */
+#if defined(CONFIG_DM_RAMDISK) && !defined(CONFIG_SPL_BUILD)
+static int env_fixup_ramdisk_addr_r(void)
+{
+	const char *boot_part = PART_BOOT;
+	struct blk_desc *dev_desc;
+	struct andr_img_hdr *hdr;
+	disk_partition_t info;
+	ulong ramdisk_addr_r;
+	int ret;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -ENODEV;
+	}
+
+	ret = part_get_info_by_name(dev_desc, boot_part, &info);
+	if (ret < 0) {
+		printf("%s: failed to get %s part, ret=%d\n",
+		       __func__, boot_part, ret);
+	}
+
+	hdr = (struct andr_img_hdr *)(info.start * dev_desc->blksz);
+	ramdisk_addr_r = (ulong)hdr;
+	ramdisk_addr_r += hdr->page_size;
+	ramdisk_addr_r += ALIGN(hdr->kernel_size, hdr->page_size);
+	env_set_hex("ramdisk_addr_r", ramdisk_addr_r);
+
+	return 0;
+}
+#endif
+
+int rk_board_late_init(void)
+{
+#if defined(CONFIG_DM_RAMDISK) && !defined(CONFIG_SPL_BUILD)
+	env_fixup_ramdisk_addr_r();
+#endif
+
+	return 0;
+}

commit b5d113223481e42931db28e2222ea954af0b37c7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 25 14:11:13 2019 +0800

    ram: ramdisk_ro: skip memcpy when src and dest are same address
    
    Change-Id: I6a52fcf3111a57940b2dd7ac034a92929a77fb93
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/ram/ramdisk_ro.c b/drivers/ram/ramdisk_ro.c
index e2f5c29b54..47fad6dbe6 100644
--- a/drivers/ram/ramdisk_ro.c
+++ b/drivers/ram/ramdisk_ro.c
@@ -20,7 +20,11 @@ static ulong ramdisk_ro_bread(struct blk_desc *desc, lbaint_t start,
 	/* Byte */
 	b_start = start * desc->blksz;
 	b_size = blkcnt * desc->blksz;
-	memcpy((char *)dst, (char *)b_start, b_size);
+
+	if ((ulong)dst != (ulong)b_start)
+		memcpy((char *)dst, (char *)b_start, b_size);
+	else
+		debug("%s: skip memcpy at: 0x%08lx\n", __func__, (ulong)b_start);
 
 	debug("%s: b_start=0x%lx, b_size=0x%lx. dst=%p\n",
 	      __func__, b_start, b_size, dst);

commit ad5a4d82a5b4d268f75e34f7cd1d720e0a5e15a5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 1 17:54:37 2019 +0800

    common: android: add android image header check
    
    Change-Id: I0872eeb02955396b086de448ff69296323628591
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/image-android.c b/common/image-android.c
index 67ba1820c0..a00e9f6988 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -270,6 +270,11 @@ int android_image_load_separate(struct andr_img_hdr *hdr,
 	int ret, blk_read = 0;
 	ulong start;
 
+	if (android_image_check_header(hdr)) {
+		printf("Bad android image header\n");
+		return -EINVAL;
+	}
+
 	if (hdr->kernel_size) {
 		size = hdr->kernel_size + hdr->page_size;
 		blk_cnt = DIV_ROUND_UP(size, dev_desc->blksz);

commit 0abc5d192aec0c2d5e6ac6d1a36ddc446dcdaceb
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jun 28 15:47:30 2019 +0800

    rockchip: board: test the bootdev if the bootdev is error
    
    Test the bootdev if the bootdev is error which passed by
    pre-loader. Run the devtype_num_set to get correct dev_desc.
    
    Change-Id: I5a6f7cd996032a649b2a8fe821314265f00a0091
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index 5e8e66ffa8..96361bf6d7 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -14,6 +14,7 @@
 #include <dm.h>
 #include <fdtdec.h>
 #include <boot_rkimg.h>
+#include <stdlib.h>
 #include <linux/usb/phy-rockchip-inno-usb2.h>
 #include <key.h>
 #ifdef CONFIG_DM_RAMDISK
@@ -105,24 +106,38 @@ void boot_devtype_init(void)
 		atags_en = 1;
 		env_set("devtype", devtype);
 		env_set("devnum", devnum);
+
 #ifdef CONFIG_DM_MMC
 		if (!strcmp("mmc", devtype))
 			mmc_initialize(gd->bd);
 #endif
-	} else {
+		/*
+		 * For example, the pre-loader do not have mtd device,
+		 * and pass devtype is nand. Then U-Boot can not get
+		 * dev_desc when use mtd driver to read firmware. So
+		 * test the block dev is exist or not here.
+		 *
+		 * And the devtype & devnum maybe wrong sometimes, it
+		 * is better to test first.
+		 */
+		if (blk_get_devnum_by_typename(devtype, atoi(devnum)))
+			goto finish;
+	}
+
+	/* If not find valid bootdev by atags, scan all possible */
 #ifdef CONFIG_DM_MMC
-		mmc_initialize(gd->bd);
+	mmc_initialize(gd->bd);
 #endif
-		ret = run_command_list(devtype_num_set, -1, 0);
-		if (ret) {
-			/* Set default dev type/num if command not valid */
-			devtype = "mmc";
-			devnum = "0";
-			env_set("devtype", devtype);
-			env_set("devnum", devnum);
-		}
+	ret = run_command_list(devtype_num_set, -1, 0);
+	if (ret) {
+		/* Set default dev type/num if command not valid */
+		devtype = "mmc";
+		devnum = "0";
+		env_set("devtype", devtype);
+		env_set("devnum", devnum);
 	}
 
+finish:
 	done = 1;
 	printf("Bootdev%s: %s %s\n", atags_en ? "(atags)" : "",
 	       env_get("devtype"), env_get("devnum"));

commit a62211b47d3f13cf49e9f7e77cdc1d19d478cf4b
Author: Patrice Chotard <patrice.chotard@st.com>
Date:   Wed Jan 23 18:12:48 2019 +0100

    UPSTREAM: mtd: Fix get_mtdparts()
    
    When ENV_IS_IN_UBI is enable, get_mtdparts is called before relocation.
    
    During first get_mtdparts() call, mtdparts is not available in environment,
    it can be retrieved by calling board_mtdparts_default(), but following
    env_set() do nothing as we are before relocation. Finally mtdparts is
    still not available in environment.
    
    At second get_mtdparts() call, use_defaults is false, but mtdparts is still
    not in environment and is NULL.
    
    Remove use_defaults bool, only mtdparts criteria is useful.
    
    Fixes: commit 5ffcd50612f6 ("mtd: Use default mtdparts/mtids when not defined
    in the environment")
    
    Change-Id: I5e789575c70c88fce758f36343baca7625afd297
    Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit e6b7afe737f95f61f347a340acdda1a48d29ed50)

diff --git a/drivers/mtd/mtd_uboot.c b/drivers/mtd/mtd_uboot.c
index 2344864492..774461a2eb 100644
--- a/drivers/mtd/mtd_uboot.c
+++ b/drivers/mtd/mtd_uboot.c
@@ -123,7 +123,6 @@ static const char *get_mtdparts(void)
 {
 	__maybe_unused const char *mtdids = NULL;
 	static char tmp_parts[MTDPARTS_MAXLEN];
-	static bool use_defaults = true;
 	const char *mtdparts = NULL;
 
 	if (gd->flags & GD_FLG_ENV_READY)
@@ -131,7 +130,7 @@ static const char *get_mtdparts(void)
 	else if (env_get_f("mtdparts", tmp_parts, sizeof(tmp_parts)) != -1)
 		mtdparts = tmp_parts;
 
-	if (mtdparts || !use_defaults)
+	if (mtdparts)
 		return mtdparts;
 
 #if defined(CONFIG_SYS_MTDPARTS_RUNTIME)
@@ -145,8 +144,6 @@ static const char *get_mtdparts(void)
 	if (mtdparts)
 		env_set("mtdparts", mtdparts);
 
-	use_defaults = false;
-
 	return mtdparts;
 }
 

commit fb31fcb37ac2d7ffffb75ca12abf7b0f4ec987f5
Author: Chris Packham <judge.packham@gmail.com>
Date:   Sat Apr 13 21:13:57 2019 +1200

    UPSTREAM: mtd: ubi: Remove select for non existent option
    
    There is no 'config CRC32' remove the select that was attempting to use
    it.
    
    Change-Id: I5b21e1689cc2e98af4a24e8a0467935d7e90a215
    Reported-by: Robert P. J. Day <rpjday@crashcourse.ca>
    Signed-off-by: Chris Packham <judge.packham@gmail.com>
    Reviewed-by: Heiko Schocher <hs@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 661bbc50d3274ddc86245b8cd4a552956ccaffdf)

diff --git a/drivers/mtd/ubi/Kconfig b/drivers/mtd/ubi/Kconfig
index cf84783356..2b17eae947 100644
--- a/drivers/mtd/ubi/Kconfig
+++ b/drivers/mtd/ubi/Kconfig
@@ -9,7 +9,6 @@ config CONFIG_UBI_SILENCE_MSG
 
 config MTD_UBI
 	bool "Enable UBI - Unsorted block images"
-	select CRC32
 	select RBTREE
 	select MTD_PARTITIONS
 	help

commit 0d1b2165f037855103bbc8e853f8ad1ce9c41865
Author: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Date:   Mon Apr 29 18:37:10 2019 +0200

    UPSTREAM: nand: davinci: remove dead code for dm644x
    
    The support for DaVinci DM* SoCs has been dropped. The code that used
    to be relevant to dm644x is no longer needed. Remove it.
    
    Change-Id: I202b85f5f963d82dea73f0b7b88430134f00ba88
    Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit a7fc3d7c687e4b7b61784ee7a13fd9e054a18e17)

diff --git a/drivers/mtd/nand/raw/davinci_nand.c b/drivers/mtd/nand/raw/davinci_nand.c
index b8ffcc70b0..19a2c5b8dd 100644
--- a/drivers/mtd/nand/raw/davinci_nand.c
+++ b/drivers/mtd/nand/raw/davinci_nand.c
@@ -731,43 +731,6 @@ static int nand_davinci_dev_ready(struct mtd_info *mtd)
 	return __raw_readl(&davinci_emif_regs->nandfsr) & 0x1;
 }
 
-static void nand_flash_init(void)
-{
-	/* This is for DM6446 EVM and *very* similar.  DO NOT GROW THIS!
-	 * Instead, have your board_init() set EMIF timings, based on its
-	 * knowledge of the clocks and what devices are hooked up ... and
-	 * don't even do that unless no UBL handled it.
-	 */
-#ifdef CONFIG_SOC_DM644X
-	u_int32_t	acfg1 = 0x3ffffffc;
-
-	/*------------------------------------------------------------------*
-	 *  NAND FLASH CHIP TIMEOUT @ 459 MHz                               *
-	 *                                                                  *
-	 *  AEMIF.CLK freq   = PLL1/6 = 459/6 = 76.5 MHz                    *
-	 *  AEMIF.CLK period = 1/76.5 MHz = 13.1 ns                         *
-	 *                                                                  *
-	 *------------------------------------------------------------------*/
-	 acfg1 = 0
-		| (0 << 31)	/* selectStrobe */
-		| (0 << 30)	/* extWait */
-		| (1 << 26)	/* writeSetup	10 ns */
-		| (3 << 20)	/* writeStrobe	40 ns */
-		| (1 << 17)	/* writeHold	10 ns */
-		| (1 << 13)	/* readSetup	10 ns */
-		| (5 << 7)	/* readStrobe	60 ns */
-		| (1 << 4)	/* readHold	10 ns */
-		| (3 << 2)	/* turnAround	?? ns */
-		| (0 << 0)	/* asyncSize	8-bit bus */
-		;
-
-	__raw_writel(acfg1, &davinci_emif_regs->ab1cr); /* CS2 */
-
-	/* NAND flash on CS2 */
-	__raw_writel(0x00000101, &davinci_emif_regs->nandfcr);
-#endif
-}
-
 void davinci_nand_init(struct nand_chip *nand)
 {
 #if defined CONFIG_KEYSTONE_RBL_NAND
@@ -821,8 +784,6 @@ void davinci_nand_init(struct nand_chip *nand)
 	nand->write_buf = nand_davinci_write_buf;
 
 	nand->dev_ready = nand_davinci_dev_ready;
-
-	nand_flash_init();
 }
 
 int board_nand_init(struct nand_chip *chip) __attribute__((weak));

commit 0b841403dfae54bb102f86a1dc88a2d9b79a158f
Author: Weijie Gao <weijie.gao@mediatek.com>
Date:   Fri Apr 26 17:22:19 2019 +0800

    UPSTREAM: mtd: spi-nor: fix page program issue when using spi-mem driver
    
    Some SPI controllers can't write nor->page_size bytes in a single step
    because their TX FIFO is too small, but when that happens we should
    make sure a WRITE_EN command before each write access and READ_SR command
    after each write access is issued.
    
    We should allow nor->write() to return a size that is smaller than the
    requested write size to gracefully handle this case.
    
    Also, the spi_nor_write_data() should return the actual number of bytes
    that were written during the spi_mem_exec_op() operation.
    
    This patch is a combination of two commits backported from kernel:
    
      commit 630d6bd8a3b4 ("mtd: spi-nor: Support controllers with limit ...")
      commit 3baa8ec88c2f ("mtd: devices: m25p80: Make sure WRITE_EN is ...")
    
    Cc: Vignesh R <vigneshr@ti.com>
    Change-Id: I352142d4325b15c52eb04ac929b9e2bcd3648472
    Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
    Acked-by: Vignesh R <vigneshr@ti.com>
    Tested-by: Shyam Saini <shyam.saini@amarulasolutions.com> # microzed
    Acked-by: Jagan Teki <jagan@amarulasolutions.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 60e2bf46784ebbd30ff29b3d3c7c97e56b11e86a)

diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index c4e2f6a08f..1acff745d1 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -116,7 +116,6 @@ static ssize_t spi_nor_write_data(struct spi_nor *nor, loff_t to, size_t len,
 				   SPI_MEM_OP_ADDR(nor->addr_width, to, 1),
 				   SPI_MEM_OP_NO_DUMMY,
 				   SPI_MEM_OP_DATA_OUT(len, buf, 1));
-	size_t remaining = len;
 	int ret;
 
 	/* get transfer protocols. */
@@ -127,22 +126,16 @@ static ssize_t spi_nor_write_data(struct spi_nor *nor, loff_t to, size_t len,
 	if (nor->program_opcode == SPINOR_OP_AAI_WP && nor->sst_write_second)
 		op.addr.nbytes = 0;
 
-	while (remaining) {
-		op.data.nbytes = remaining < UINT_MAX ? remaining : UINT_MAX;
-		ret = spi_mem_adjust_op_size(nor->spi, &op);
-		if (ret)
-			return ret;
-
-		ret = spi_mem_exec_op(nor->spi, &op);
-		if (ret)
-			return ret;
+	ret = spi_mem_adjust_op_size(nor->spi, &op);
+	if (ret)
+		return ret;
+	op.data.nbytes = len < op.data.nbytes ? len : op.data.nbytes;
 
-		op.addr.val += op.data.nbytes;
-		remaining -= op.data.nbytes;
-		op.data.buf.out += op.data.nbytes;
-	}
+	ret = spi_mem_exec_op(nor->spi, &op);
+	if (ret)
+		return ret;
 
-	return len;
+	return op.data.nbytes;
 }
 
 /*
@@ -1101,10 +1094,6 @@ static int spi_nor_write(struct mtd_info *mtd, loff_t to, size_t len,
 			goto write_err;
 		*retlen += written;
 		i += written;
-		if (written != page_remain) {
-			ret = -EIO;
-			goto write_err;
-		}
 	}
 
 write_err:

commit 0cc120e37a4ae1d3d1bc4e8f0d7c9a476635608f
Author: Gregory CLEMENT <gregory.clement@bootlin.com>
Date:   Wed Apr 17 11:22:05 2019 +0200

    UPSTREAM: mtd: nand: raw: Fix CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT behavior
    
    The purpose of "mtd: nand: raw: allow to disable unneeded ECC layouts"
    was to allow disabling the default ECC layouts if a driver is known to
    provide its own ECC layout. However, this commit did the opposite and
    disabled the default layout when it was _not_ selected.
    
    It breaks all the NAND drivers not providing their own ECC layout this
    patch fix this situation.
    
    It was tested with the lpc32xx_nand_slc driver.
    
    Fixes: a38c3af868 ("mtd: nand: raw: allow to disable unneeded ECC layouts")
    Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Change-Id: I5bb978707782b690533152aaf71f34e10387fc6d
    Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
    Tested-by: Eugen Hristev <eugen.hristev@microchip.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 5f626e78491c95dbf3e5036cc0c67aea8b1746fd)

diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index e07bd6b657..aba8ac019d 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -47,7 +47,7 @@
 #include <linux/errno.h>
 
 /* Define default oob placement schemes for large and small page devices */
-#ifdef CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT
+#ifndef CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT
 static struct nand_ecclayout nand_oob_8 = {
 	.eccbytes = 3,
 	.eccpos = {0, 1, 2},
@@ -5034,7 +5034,7 @@ int nand_scan_tail(struct mtd_info *mtd)
 	 */
 	if (!ecc->layout && (ecc->mode != NAND_ECC_SOFT_BCH)) {
 		switch (mtd->oobsize) {
-#ifdef CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT
+#ifndef CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT
 		case 8:
 			ecc->layout = &nand_oob_8;
 			break;

commit 8eea0cf179f53166b045ab5fe63313f6a0d84ac2
Author: Philippe Reynes <philippe.reynes@softathome.com>
Date:   Fri Mar 15 15:14:38 2019 +0100

    UPSTREAM: drivers: nand: brcmnand: add an option to read the write-protect from device tree
    
    The option write-protect may only change on the kernel command line,
    we add a property in the device tree to be more flexible.
    
    Change-Id: I9b09732a963f89571b723b66c62978aacf274a98
    Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit f917438772c7c7da7f30e9209d9f100edac0255e)

diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
index e333320808..faa6da42d5 100644
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -2671,6 +2671,9 @@ int brcmnand_probe(struct udevice *dev, struct brcmnand_soc *soc)
 	/* Disable XOR addressing */
 	brcmnand_rmw_reg(ctrl, BRCMNAND_CS_XOR, 0xff, 0, 0);
 
+	/* Read the write-protect configuration in the device tree */
+	wp_on = dev_read_u32_default(dev, "write-protect", wp_on);
+
 	if (ctrl->features & BRCMNAND_HAS_WP) {
 		/* Permanently disable write protection */
 		if (wp_on == 2)

commit 96d2a53877192d6e722d3add5f0632aa8f6d2aec
Author: Philippe Reynes <philippe.reynes@softathome.com>
Date:   Fri Mar 15 15:14:37 2019 +0100

    UPSTREAM: drivers: nand: brcmnand: add parameter parameter-page-big-endian
    
    The parameter page isn't always in big endian, so we add
    an option to choose the endiannes of the parameter page.
    
    Change-Id: I58c8ce2f6a2d4ac71c0b832a76e2ec5b943004e2
    Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 317d40eb01a8e194e6e321e71e811d6da03b8365)

diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
index 7791077142..e333320808 100644
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -113,6 +113,7 @@ struct brcmnand_controller {
 	unsigned int		irq;
 	unsigned int		dma_irq;
 	int			nand_version;
+	int			parameter_page_big_endian;
 
 	/* Some SoCs provide custom interrupt status register(s) */
 	struct brcmnand_soc	*soc;
@@ -1439,12 +1440,20 @@ static void brcmnand_cmdfunc(struct mtd_info *mtd, unsigned command,
 		 * Must cache the FLASH_CACHE now, since changes in
 		 * SECTOR_SIZE_1K may invalidate it
 		 */
-		for (i = 0; i < FC_WORDS; i++)
+		for (i = 0; i < FC_WORDS; i++) {
+			u32 fc;
+
+			fc = brcmnand_read_fc(ctrl, i);
+
 			/*
 			 * Flash cache is big endian for parameter pages, at
 			 * least on STB SoCs
 			 */
-			flash_cache[i] = be32_to_cpu(brcmnand_read_fc(ctrl, i));
+			if (ctrl->parameter_page_big_endian)
+				flash_cache[i] = be32_to_cpu(fc);
+			else
+				flash_cache[i] = le32_to_cpu(fc);
+		}
 
 		brcmnand_soc_data_bus_unprepare(ctrl->soc, true);
 
@@ -2550,6 +2559,10 @@ int brcmnand_probe(struct udevice *dev, struct brcmnand_soc *soc)
 	nand_hw_control_init(&ctrl->controller);
 	INIT_LIST_HEAD(&ctrl->host_list);
 
+	/* Is parameter page in big endian ? */
+	ctrl->parameter_page_big_endian =
+	    dev_read_u32_default(dev, "parameter-page-big-endian", 1);
+
 	/* NAND register range */
 #ifndef __UBOOT__
 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);

commit 625940fecbe21d1b53fc4fe282c4f92835df7f14
Author: Philippe Reynes <philippe.reynes@softathome.com>
Date:   Fri Mar 15 15:14:36 2019 +0100

    UPSTREAM: drivers: nand: brcmnand: add initial support
    
    The driver brcmnand come from linux kernel 4.18.
    Only SoC bcm6838 and bcm6858 are supported.
    
    Change-Id: I0337600b164da018c1236ef9cbdd90ecc0904ee7
    Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 22daafba25592b79112d21d1662d7b8381827c56)

diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index dc087ab641..f86035bcce 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -60,6 +60,31 @@ config SPL_GENERATE_ATMEL_PMECC_HEADER
 
 endif
 
+config NAND_BRCMNAND
+	bool "Support Broadcom NAND controller"
+	depends on OF_CONTROL && DM && MTD
+	help
+	  Enable the driver for NAND flash on platforms using a Broadcom NAND
+	  controller.
+
+config NAND_BRCMNAND_6838
+       bool "Support Broadcom NAND controller on bcm6838"
+       depends on NAND_BRCMNAND && ARCH_BMIPS && SOC_BMIPS_BCM6838
+       help
+         Enable support for broadcom nand driver on bcm6838.
+
+config NAND_BRCMNAND_6858
+       bool "Support Broadcom NAND controller on bcm6858"
+       depends on NAND_BRCMNAND && ARCH_BCM6858
+       help
+         Enable support for broadcom nand driver on bcm6858.
+
+config NAND_BRCMNAND_63158
+       bool "Support Broadcom NAND controller on bcm63158"
+       depends on NAND_BRCMNAND && ARCH_BCM63158
+       help
+         Enable support for broadcom nand driver on bcm63158.
+
 config NAND_DAVINCI
 	bool "Support TI Davinci NAND controller"
 	help
diff --git a/drivers/mtd/nand/raw/Makefile b/drivers/mtd/nand/raw/Makefile
index b10e718d15..9337f6482e 100644
--- a/drivers/mtd/nand/raw/Makefile
+++ b/drivers/mtd/nand/raw/Makefile
@@ -41,6 +41,7 @@ obj-$(CONFIG_NAND_ECC_BCH) += nand_bch.o
 
 obj-$(CONFIG_NAND_ATMEL) += atmel_nand.o
 obj-$(CONFIG_NAND_ARASAN) += arasan_nfc.o
+obj-$(CONFIG_NAND_BRCMNAND) += brcmnand/
 obj-$(CONFIG_NAND_DAVINCI) += davinci_nand.o
 obj-$(CONFIG_NAND_DENALI) += denali.o
 obj-$(CONFIG_NAND_DENALI_DT) += denali_dt.o
diff --git a/drivers/mtd/nand/raw/brcmnand/Makefile b/drivers/mtd/nand/raw/brcmnand/Makefile
new file mode 100644
index 0000000000..a2363cc80e
--- /dev/null
+++ b/drivers/mtd/nand/raw/brcmnand/Makefile
@@ -0,0 +1,7 @@
+# SPDX-License-Identifier: GPL-2.0+
+
+obj-$(CONFIG_NAND_BRCMNAND_63158) += bcm63158_nand.o
+obj-$(CONFIG_NAND_BRCMNAND_6838) += bcm6838_nand.o
+obj-$(CONFIG_NAND_BRCMNAND_6858) += bcm6858_nand.o
+obj-$(CONFIG_NAND_BRCMNAND) += brcmnand.o
+obj-$(CONFIG_NAND_BRCMNAND) += brcmnand_compat.o
diff --git a/drivers/mtd/nand/raw/brcmnand/bcm63158_nand.c b/drivers/mtd/nand/raw/brcmnand/bcm63158_nand.c
new file mode 100644
index 0000000000..16b0d4440a
--- /dev/null
+++ b/drivers/mtd/nand/raw/brcmnand/bcm63158_nand.c
@@ -0,0 +1,123 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include <common.h>
+#include <asm/io.h>
+#include <memalign.h>
+#include <nand.h>
+#include <linux/errno.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <dm.h>
+
+#include "brcmnand.h"
+
+struct bcm63158_nand_soc {
+	struct brcmnand_soc soc;
+	void __iomem *base;
+};
+
+#define BCM63158_NAND_INT		0x00
+#define BCM63158_NAND_STATUS_SHIFT	0
+#define BCM63158_NAND_STATUS_MASK	(0xfff << BCM63158_NAND_STATUS_SHIFT)
+
+#define BCM63158_NAND_INT_EN		0x04
+#define BCM63158_NAND_ENABLE_SHIFT	0
+#define BCM63158_NAND_ENABLE_MASK	(0xffff << BCM63158_NAND_ENABLE_SHIFT)
+
+enum {
+	BCM63158_NP_READ		= BIT(0),
+	BCM63158_BLOCK_ERASE	= BIT(1),
+	BCM63158_COPY_BACK	= BIT(2),
+	BCM63158_PAGE_PGM	= BIT(3),
+	BCM63158_CTRL_READY	= BIT(4),
+	BCM63158_DEV_RBPIN	= BIT(5),
+	BCM63158_ECC_ERR_UNC	= BIT(6),
+	BCM63158_ECC_ERR_CORR	= BIT(7),
+};
+
+static bool bcm63158_nand_intc_ack(struct brcmnand_soc *soc)
+{
+	struct bcm63158_nand_soc *priv =
+			container_of(soc, struct bcm63158_nand_soc, soc);
+	void __iomem *mmio = priv->base + BCM63158_NAND_INT;
+	u32 val = brcmnand_readl(mmio);
+
+	if (val & (BCM63158_CTRL_READY << BCM63158_NAND_STATUS_SHIFT)) {
+		/* Ack interrupt */
+		val &= ~BCM63158_NAND_STATUS_MASK;
+		val |= BCM63158_CTRL_READY << BCM63158_NAND_STATUS_SHIFT;
+		brcmnand_writel(val, mmio);
+		return true;
+	}
+
+	return false;
+}
+
+static void bcm63158_nand_intc_set(struct brcmnand_soc *soc, bool en)
+{
+	struct bcm63158_nand_soc *priv =
+			container_of(soc, struct bcm63158_nand_soc, soc);
+	void __iomem *mmio = priv->base + BCM63158_NAND_INT_EN;
+	u32 val = brcmnand_readl(mmio);
+
+	/* Don't ack any interrupts */
+	val &= ~BCM63158_NAND_STATUS_MASK;
+
+	if (en)
+		val |= BCM63158_CTRL_READY << BCM63158_NAND_ENABLE_SHIFT;
+	else
+		val &= ~(BCM63158_CTRL_READY << BCM63158_NAND_ENABLE_SHIFT);
+
+	brcmnand_writel(val, mmio);
+}
+
+static int bcm63158_nand_probe(struct udevice *dev)
+{
+	struct udevice *pdev = dev;
+	struct bcm63158_nand_soc *priv = dev_get_priv(dev);
+	struct brcmnand_soc *soc;
+	struct resource res;
+
+	soc = &priv->soc;
+
+	dev_read_resource_byname(pdev, "nand-int-base", &res);
+	priv->base = devm_ioremap(dev, res.start, resource_size(&res));
+	if (IS_ERR(priv->base))
+		return PTR_ERR(priv->base);
+
+	soc->ctlrdy_ack = bcm63158_nand_intc_ack;
+	soc->ctlrdy_set_enabled = bcm63158_nand_intc_set;
+
+	/* Disable and ack all interrupts  */
+	brcmnand_writel(0, priv->base + BCM63158_NAND_INT_EN);
+	brcmnand_writel(0, priv->base + BCM63158_NAND_INT);
+
+	return brcmnand_probe(pdev, soc);
+}
+
+static const struct udevice_id bcm63158_nand_dt_ids[] = {
+	{
+		.compatible = "brcm,nand-bcm63158",
+	},
+	{ /* sentinel */ }
+};
+
+U_BOOT_DRIVER(bcm63158_nand) = {
+	.name = "bcm63158-nand",
+	.id = UCLASS_MTD,
+	.of_match = bcm63158_nand_dt_ids,
+	.probe = bcm63158_nand_probe,
+	.priv_auto_alloc_size = sizeof(struct bcm63158_nand_soc),
+};
+
+void board_nand_init(void)
+{
+	struct udevice *dev;
+	int ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_MTD,
+					  DM_GET_DRIVER(bcm63158_nand), &dev);
+	if (ret && ret != -ENODEV)
+		pr_err("Failed to initialize %s. (error %d)\n", dev->name,
+		       ret);
+}
diff --git a/drivers/mtd/nand/raw/brcmnand/bcm6838_nand.c b/drivers/mtd/nand/raw/brcmnand/bcm6838_nand.c
new file mode 100644
index 0000000000..ece944485c
--- /dev/null
+++ b/drivers/mtd/nand/raw/brcmnand/bcm6838_nand.c
@@ -0,0 +1,122 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include <common.h>
+#include <asm/io.h>
+#include <memalign.h>
+#include <nand.h>
+#include <linux/errno.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <dm.h>
+
+#include "brcmnand.h"
+
+struct bcm6838_nand_soc {
+	struct brcmnand_soc soc;
+	void __iomem *base;
+};
+
+#define BCM6838_NAND_INT		0x00
+#define  BCM6838_NAND_STATUS_SHIFT	0
+#define  BCM6838_NAND_STATUS_MASK	(0xfff << BCM6838_NAND_STATUS_SHIFT)
+#define  BCM6838_NAND_ENABLE_SHIFT	16
+#define  BCM6838_NAND_ENABLE_MASK	(0xffff << BCM6838_NAND_ENABLE_SHIFT)
+
+enum {
+	BCM6838_NP_READ		= BIT(0),
+	BCM6838_BLOCK_ERASE	= BIT(1),
+	BCM6838_COPY_BACK	= BIT(2),
+	BCM6838_PAGE_PGM	= BIT(3),
+	BCM6838_CTRL_READY	= BIT(4),
+	BCM6838_DEV_RBPIN	= BIT(5),
+	BCM6838_ECC_ERR_UNC	= BIT(6),
+	BCM6838_ECC_ERR_CORR	= BIT(7),
+};
+
+static bool bcm6838_nand_intc_ack(struct brcmnand_soc *soc)
+{
+	struct bcm6838_nand_soc *priv =
+			container_of(soc, struct bcm6838_nand_soc, soc);
+	void __iomem *mmio = priv->base + BCM6838_NAND_INT;
+	u32 val = brcmnand_readl(mmio);
+
+	if (val & (BCM6838_CTRL_READY << BCM6838_NAND_STATUS_SHIFT)) {
+		/* Ack interrupt */
+		val &= ~BCM6838_NAND_STATUS_MASK;
+		val |= BCM6838_CTRL_READY << BCM6838_NAND_STATUS_SHIFT;
+		brcmnand_writel(val, mmio);
+		return true;
+	}
+
+	return false;
+}
+
+static void bcm6838_nand_intc_set(struct brcmnand_soc *soc, bool en)
+{
+	struct bcm6838_nand_soc *priv =
+			container_of(soc, struct bcm6838_nand_soc, soc);
+	void __iomem *mmio = priv->base + BCM6838_NAND_INT;
+	u32 val = brcmnand_readl(mmio);
+
+	/* Don't ack any interrupts */
+	val &= ~BCM6838_NAND_STATUS_MASK;
+
+	if (en)
+		val |= BCM6838_CTRL_READY << BCM6838_NAND_ENABLE_SHIFT;
+	else
+		val &= ~(BCM6838_CTRL_READY << BCM6838_NAND_ENABLE_SHIFT);
+
+	brcmnand_writel(val, mmio);
+}
+
+static int bcm6838_nand_probe(struct udevice *dev)
+{
+	struct udevice *pdev = dev;
+	struct bcm6838_nand_soc *priv = dev_get_priv(dev);
+	struct brcmnand_soc *soc;
+	struct resource res;
+
+	soc = &priv->soc;
+
+	dev_read_resource_byname(pdev, "nand-int-base", &res);
+	priv->base = ioremap(res.start, resource_size(&res));
+	if (IS_ERR(priv->base))
+		return PTR_ERR(priv->base);
+
+	soc->ctlrdy_ack = bcm6838_nand_intc_ack;
+	soc->ctlrdy_set_enabled = bcm6838_nand_intc_set;
+
+	/* Disable and ack all interrupts  */
+	brcmnand_writel(0, priv->base + BCM6838_NAND_INT);
+	brcmnand_writel(BCM6838_NAND_STATUS_MASK,
+			priv->base + BCM6838_NAND_INT);
+
+	return brcmnand_probe(pdev, soc);
+}
+
+static const struct udevice_id bcm6838_nand_dt_ids[] = {
+	{
+		.compatible = "brcm,nand-bcm6838",
+	},
+	{ /* sentinel */ }
+};
+
+U_BOOT_DRIVER(bcm6838_nand) = {
+	.name = "bcm6838-nand",
+	.id = UCLASS_MTD,
+	.of_match = bcm6838_nand_dt_ids,
+	.probe = bcm6838_nand_probe,
+	.priv_auto_alloc_size = sizeof(struct bcm6838_nand_soc),
+};
+
+void board_nand_init(void)
+{
+	struct udevice *dev;
+	int ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_MTD,
+					  DM_GET_DRIVER(bcm6838_nand), &dev);
+	if (ret && ret != -ENODEV)
+		pr_err("Failed to initialize %s. (error %d)\n", dev->name,
+		       ret);
+}
diff --git a/drivers/mtd/nand/raw/brcmnand/bcm6858_nand.c b/drivers/mtd/nand/raw/brcmnand/bcm6858_nand.c
new file mode 100644
index 0000000000..3586baa4fa
--- /dev/null
+++ b/drivers/mtd/nand/raw/brcmnand/bcm6858_nand.c
@@ -0,0 +1,123 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include <common.h>
+#include <asm/io.h>
+#include <memalign.h>
+#include <nand.h>
+#include <linux/errno.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <dm.h>
+
+#include "brcmnand.h"
+
+struct bcm6858_nand_soc {
+	struct brcmnand_soc soc;
+	void __iomem *base;
+};
+
+#define BCM6858_NAND_INT		0x00
+#define BCM6858_NAND_STATUS_SHIFT	0
+#define BCM6858_NAND_STATUS_MASK	(0xfff << BCM6858_NAND_STATUS_SHIFT)
+
+#define BCM6858_NAND_INT_EN		0x04
+#define BCM6858_NAND_ENABLE_SHIFT	0
+#define BCM6858_NAND_ENABLE_MASK	(0xffff << BCM6858_NAND_ENABLE_SHIFT)
+
+enum {
+	BCM6858_NP_READ		= BIT(0),
+	BCM6858_BLOCK_ERASE	= BIT(1),
+	BCM6858_COPY_BACK	= BIT(2),
+	BCM6858_PAGE_PGM	= BIT(3),
+	BCM6858_CTRL_READY	= BIT(4),
+	BCM6858_DEV_RBPIN	= BIT(5),
+	BCM6858_ECC_ERR_UNC	= BIT(6),
+	BCM6858_ECC_ERR_CORR	= BIT(7),
+};
+
+static bool bcm6858_nand_intc_ack(struct brcmnand_soc *soc)
+{
+	struct bcm6858_nand_soc *priv =
+			container_of(soc, struct bcm6858_nand_soc, soc);
+	void __iomem *mmio = priv->base + BCM6858_NAND_INT;
+	u32 val = brcmnand_readl(mmio);
+
+	if (val & (BCM6858_CTRL_READY << BCM6858_NAND_STATUS_SHIFT)) {
+		/* Ack interrupt */
+		val &= ~BCM6858_NAND_STATUS_MASK;
+		val |= BCM6858_CTRL_READY << BCM6858_NAND_STATUS_SHIFT;
+		brcmnand_writel(val, mmio);
+		return true;
+	}
+
+	return false;
+}
+
+static void bcm6858_nand_intc_set(struct brcmnand_soc *soc, bool en)
+{
+	struct bcm6858_nand_soc *priv =
+			container_of(soc, struct bcm6858_nand_soc, soc);
+	void __iomem *mmio = priv->base + BCM6858_NAND_INT_EN;
+	u32 val = brcmnand_readl(mmio);
+
+	/* Don't ack any interrupts */
+	val &= ~BCM6858_NAND_STATUS_MASK;
+
+	if (en)
+		val |= BCM6858_CTRL_READY << BCM6858_NAND_ENABLE_SHIFT;
+	else
+		val &= ~(BCM6858_CTRL_READY << BCM6858_NAND_ENABLE_SHIFT);
+
+	brcmnand_writel(val, mmio);
+}
+
+static int bcm6858_nand_probe(struct udevice *dev)
+{
+	struct udevice *pdev = dev;
+	struct bcm6858_nand_soc *priv = dev_get_priv(dev);
+	struct brcmnand_soc *soc;
+	struct resource res;
+
+	soc = &priv->soc;
+
+	dev_read_resource_byname(pdev, "nand-int-base", &res);
+	priv->base = devm_ioremap(dev, res.start, resource_size(&res));
+	if (IS_ERR(priv->base))
+		return PTR_ERR(priv->base);
+
+	soc->ctlrdy_ack = bcm6858_nand_intc_ack;
+	soc->ctlrdy_set_enabled = bcm6858_nand_intc_set;
+
+	/* Disable and ack all interrupts  */
+	brcmnand_writel(0, priv->base + BCM6858_NAND_INT_EN);
+	brcmnand_writel(0, priv->base + BCM6858_NAND_INT);
+
+	return brcmnand_probe(pdev, soc);
+}
+
+static const struct udevice_id bcm6858_nand_dt_ids[] = {
+	{
+		.compatible = "brcm,nand-bcm6858",
+	},
+	{ /* sentinel */ }
+};
+
+U_BOOT_DRIVER(bcm6858_nand) = {
+	.name = "bcm6858-nand",
+	.id = UCLASS_MTD,
+	.of_match = bcm6858_nand_dt_ids,
+	.probe = bcm6858_nand_probe,
+	.priv_auto_alloc_size = sizeof(struct bcm6858_nand_soc),
+};
+
+void board_nand_init(void)
+{
+	struct udevice *dev;
+	int ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_MTD,
+					  DM_GET_DRIVER(bcm6858_nand), &dev);
+	if (ret && ret != -ENODEV)
+		pr_err("Failed to initialize %s. (error %d)\n", dev->name,
+		       ret);
+}
diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
new file mode 100644
index 0000000000..7791077142
--- /dev/null
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -0,0 +1,2789 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright © 2010-2015 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <memalign.h>
+#include <nand.h>
+#include <clk.h>
+#include <linux/ioport.h>
+#include <linux/completion.h>
+#include <linux/errno.h>
+#include <linux/log2.h>
+#include <asm/processor.h>
+#include <dm.h>
+
+#include "brcmnand.h"
+#include "brcmnand_compat.h"
+
+/*
+ * This flag controls if WP stays on between erase/write commands to mitigate
+ * flash corruption due to power glitches. Values:
+ * 0: NAND_WP is not used or not available
+ * 1: NAND_WP is set by default, cleared for erase/write operations
+ * 2: NAND_WP is always cleared
+ */
+static int wp_on = 1;
+module_param(wp_on, int, 0444);
+
+/***********************************************************************
+ * Definitions
+ ***********************************************************************/
+
+#define DRV_NAME			"brcmnand"
+
+#define CMD_NULL			0x00
+#define CMD_PAGE_READ			0x01
+#define CMD_SPARE_AREA_READ		0x02
+#define CMD_STATUS_READ			0x03
+#define CMD_PROGRAM_PAGE		0x04
+#define CMD_PROGRAM_SPARE_AREA		0x05
+#define CMD_COPY_BACK			0x06
+#define CMD_DEVICE_ID_READ		0x07
+#define CMD_BLOCK_ERASE			0x08
+#define CMD_FLASH_RESET			0x09
+#define CMD_BLOCKS_LOCK			0x0a
+#define CMD_BLOCKS_LOCK_DOWN		0x0b
+#define CMD_BLOCKS_UNLOCK		0x0c
+#define CMD_READ_BLOCKS_LOCK_STATUS	0x0d
+#define CMD_PARAMETER_READ		0x0e
+#define CMD_PARAMETER_CHANGE_COL	0x0f
+#define CMD_LOW_LEVEL_OP		0x10
+
+struct brcm_nand_dma_desc {
+	u32 next_desc;
+	u32 next_desc_ext;
+	u32 cmd_irq;
+	u32 dram_addr;
+	u32 dram_addr_ext;
+	u32 tfr_len;
+	u32 total_len;
+	u32 flash_addr;
+	u32 flash_addr_ext;
+	u32 cs;
+	u32 pad2[5];
+	u32 status_valid;
+} __packed;
+
+/* Bitfields for brcm_nand_dma_desc::status_valid */
+#define FLASH_DMA_ECC_ERROR	(1 << 8)
+#define FLASH_DMA_CORR_ERROR	(1 << 9)
+
+/* 512B flash cache in the NAND controller HW */
+#define FC_SHIFT		9U
+#define FC_BYTES		512U
+#define FC_WORDS		(FC_BYTES >> 2)
+
+#define BRCMNAND_MIN_PAGESIZE	512
+#define BRCMNAND_MIN_BLOCKSIZE	(8 * 1024)
+#define BRCMNAND_MIN_DEVSIZE	(4ULL * 1024 * 1024)
+
+#define NAND_CTRL_RDY			(INTFC_CTLR_READY | INTFC_FLASH_READY)
+#define NAND_POLL_STATUS_TIMEOUT_MS	100
+
+/* Controller feature flags */
+enum {
+	BRCMNAND_HAS_1K_SECTORS			= BIT(0),
+	BRCMNAND_HAS_PREFETCH			= BIT(1),
+	BRCMNAND_HAS_CACHE_MODE			= BIT(2),
+	BRCMNAND_HAS_WP				= BIT(3),
+};
+
+struct brcmnand_controller {
+#ifndef __UBOOT__
+	struct device		*dev;
+#else
+	struct udevice		*dev;
+#endif /* __UBOOT__ */
+	struct nand_hw_control	controller;
+	void __iomem		*nand_base;
+	void __iomem		*nand_fc; /* flash cache */
+	void __iomem		*flash_dma_base;
+	unsigned int		irq;
+	unsigned int		dma_irq;
+	int			nand_version;
+
+	/* Some SoCs provide custom interrupt status register(s) */
+	struct brcmnand_soc	*soc;
+
+	/* Some SoCs have a gateable clock for the controller */
+	struct clk		*clk;
+
+	int			cmd_pending;
+	bool			dma_pending;
+	struct completion	done;
+	struct completion	dma_done;
+
+	/* List of NAND hosts (one for each chip-select) */
+	struct list_head host_list;
+
+	struct brcm_nand_dma_desc *dma_desc;
+	dma_addr_t		dma_pa;
+
+	/* in-memory cache of the FLASH_CACHE, used only for some commands */
+	u8			flash_cache[FC_BYTES];
+
+	/* Controller revision details */
+	const u16		*reg_offsets;
+	unsigned int		reg_spacing; /* between CS1, CS2, ... regs */
+	const u8		*cs_offsets; /* within each chip-select */
+	const u8		*cs0_offsets; /* within CS0, if different */
+	unsigned int		max_block_size;
+	const unsigned int	*block_sizes;
+	unsigned int		max_page_size;
+	const unsigned int	*page_sizes;
+	unsigned int		max_oob;
+	u32			features;
+
+	/* for low-power standby/resume only */
+	u32			nand_cs_nand_select;
+	u32			nand_cs_nand_xor;
+	u32			corr_stat_threshold;
+	u32			flash_dma_mode;
+};
+
+struct brcmnand_cfg {
+	u64			device_size;
+	unsigned int		block_size;
+	unsigned int		page_size;
+	unsigned int		spare_area_size;
+	unsigned int		device_width;
+	unsigned int		col_adr_bytes;
+	unsigned int		blk_adr_bytes;
+	unsigned int		ful_adr_bytes;
+	unsigned int		sector_size_1k;
+	unsigned int		ecc_level;
+	/* use for low-power standby/resume only */
+	u32			acc_control;
+	u32			config;
+	u32			config_ext;
+	u32			timing_1;
+	u32			timing_2;
+};
+
+struct brcmnand_host {
+	struct list_head	node;
+
+	struct nand_chip	chip;
+#ifndef __UBOOT__
+	struct platform_device	*pdev;
+#else
+	struct udevice	*pdev;
+#endif /* __UBOOT__ */
+	int			cs;
+
+	unsigned int		last_cmd;
+	unsigned int		last_byte;
+	u64			last_addr;
+	struct brcmnand_cfg	hwcfg;
+	struct brcmnand_controller *ctrl;
+};
+
+enum brcmnand_reg {
+	BRCMNAND_CMD_START = 0,
+	BRCMNAND_CMD_EXT_ADDRESS,
+	BRCMNAND_CMD_ADDRESS,
+	BRCMNAND_INTFC_STATUS,
+	BRCMNAND_CS_SELECT,
+	BRCMNAND_CS_XOR,
+	BRCMNAND_LL_OP,
+	BRCMNAND_CS0_BASE,
+	BRCMNAND_CS1_BASE,		/* CS1 regs, if non-contiguous */
+	BRCMNAND_CORR_THRESHOLD,
+	BRCMNAND_CORR_THRESHOLD_EXT,
+	BRCMNAND_UNCORR_COUNT,
+	BRCMNAND_CORR_COUNT,
+	BRCMNAND_CORR_EXT_ADDR,
+	BRCMNAND_CORR_ADDR,
+	BRCMNAND_UNCORR_EXT_ADDR,
+	BRCMNAND_UNCORR_ADDR,
+	BRCMNAND_SEMAPHORE,
+	BRCMNAND_ID,
+	BRCMNAND_ID_EXT,
+	BRCMNAND_LL_RDATA,
+	BRCMNAND_OOB_READ_BASE,
+	BRCMNAND_OOB_READ_10_BASE,	/* offset 0x10, if non-contiguous */
+	BRCMNAND_OOB_WRITE_BASE,
+	BRCMNAND_OOB_WRITE_10_BASE,	/* offset 0x10, if non-contiguous */
+	BRCMNAND_FC_BASE,
+};
+
+/* BRCMNAND v4.0 */
+static const u16 brcmnand_regs_v40[] = {
+	[BRCMNAND_CMD_START]		=  0x04,
+	[BRCMNAND_CMD_EXT_ADDRESS]	=  0x08,
+	[BRCMNAND_CMD_ADDRESS]		=  0x0c,
+	[BRCMNAND_INTFC_STATUS]		=  0x6c,
+	[BRCMNAND_CS_SELECT]		=  0x14,
+	[BRCMNAND_CS_XOR]		=  0x18,
+	[BRCMNAND_LL_OP]		= 0x178,
+	[BRCMNAND_CS0_BASE]		=  0x40,
+	[BRCMNAND_CS1_BASE]		=  0xd0,
+	[BRCMNAND_CORR_THRESHOLD]	=  0x84,
+	[BRCMNAND_CORR_THRESHOLD_EXT]	=     0,
+	[BRCMNAND_UNCORR_COUNT]		=     0,
+	[BRCMNAND_CORR_COUNT]		=     0,
+	[BRCMNAND_CORR_EXT_ADDR]	=  0x70,
+	[BRCMNAND_CORR_ADDR]		=  0x74,
+	[BRCMNAND_UNCORR_EXT_ADDR]	=  0x78,
+	[BRCMNAND_UNCORR_ADDR]		=  0x7c,
+	[BRCMNAND_SEMAPHORE]		=  0x58,
+	[BRCMNAND_ID]			=  0x60,
+	[BRCMNAND_ID_EXT]		=  0x64,
+	[BRCMNAND_LL_RDATA]		= 0x17c,
+	[BRCMNAND_OOB_READ_BASE]	=  0x20,
+	[BRCMNAND_OOB_READ_10_BASE]	= 0x130,
+	[BRCMNAND_OOB_WRITE_BASE]	=  0x30,
+	[BRCMNAND_OOB_WRITE_10_BASE]	=     0,
+	[BRCMNAND_FC_BASE]		= 0x200,
+};
+
+/* BRCMNAND v5.0 */
+static const u16 brcmnand_regs_v50[] = {
+	[BRCMNAND_CMD_START]		=  0x04,
+	[BRCMNAND_CMD_EXT_ADDRESS]	=  0x08,
+	[BRCMNAND_CMD_ADDRESS]		=  0x0c,
+	[BRCMNAND_INTFC_STATUS]		=  0x6c,
+	[BRCMNAND_CS_SELECT]		=  0x14,
+	[BRCMNAND_CS_XOR]		=  0x18,
+	[BRCMNAND_LL_OP]		= 0x178,
+	[BRCMNAND_CS0_BASE]		=  0x40,
+	[BRCMNAND_CS1_BASE]		=  0xd0,
+	[BRCMNAND_CORR_THRESHOLD]	=  0x84,
+	[BRCMNAND_CORR_THRESHOLD_EXT]	=     0,
+	[BRCMNAND_UNCORR_COUNT]		=     0,
+	[BRCMNAND_CORR_COUNT]		=     0,
+	[BRCMNAND_CORR_EXT_ADDR]	=  0x70,
+	[BRCMNAND_CORR_ADDR]		=  0x74,
+	[BRCMNAND_UNCORR_EXT_ADDR]	=  0x78,
+	[BRCMNAND_UNCORR_ADDR]		=  0x7c,
+	[BRCMNAND_SEMAPHORE]		=  0x58,
+	[BRCMNAND_ID]			=  0x60,
+	[BRCMNAND_ID_EXT]		=  0x64,
+	[BRCMNAND_LL_RDATA]		= 0x17c,
+	[BRCMNAND_OOB_READ_BASE]	=  0x20,
+	[BRCMNAND_OOB_READ_10_BASE]	= 0x130,
+	[BRCMNAND_OOB_WRITE_BASE]	=  0x30,
+	[BRCMNAND_OOB_WRITE_10_BASE]	= 0x140,
+	[BRCMNAND_FC_BASE]		= 0x200,
+};
+
+/* BRCMNAND v6.0 - v7.1 */
+static const u16 brcmnand_regs_v60[] = {
+	[BRCMNAND_CMD_START]		=  0x04,
+	[BRCMNAND_CMD_EXT_ADDRESS]	=  0x08,
+	[BRCMNAND_CMD_ADDRESS]		=  0x0c,
+	[BRCMNAND_INTFC_STATUS]		=  0x14,
+	[BRCMNAND_CS_SELECT]		=  0x18,
+	[BRCMNAND_CS_XOR]		=  0x1c,
+	[BRCMNAND_LL_OP]		=  0x20,
+	[BRCMNAND_CS0_BASE]		=  0x50,
+	[BRCMNAND_CS1_BASE]		=     0,
+	[BRCMNAND_CORR_THRESHOLD]	=  0xc0,
+	[BRCMNAND_CORR_THRESHOLD_EXT]	=  0xc4,
+	[BRCMNAND_UNCORR_COUNT]		=  0xfc,
+	[BRCMNAND_CORR_COUNT]		= 0x100,
+	[BRCMNAND_CORR_EXT_ADDR]	= 0x10c,
+	[BRCMNAND_CORR_ADDR]		= 0x110,
+	[BRCMNAND_UNCORR_EXT_ADDR]	= 0x114,
+	[BRCMNAND_UNCORR_ADDR]		= 0x118,
+	[BRCMNAND_SEMAPHORE]		= 0x150,
+	[BRCMNAND_ID]			= 0x194,
+	[BRCMNAND_ID_EXT]		= 0x198,
+	[BRCMNAND_LL_RDATA]		= 0x19c,
+	[BRCMNAND_OOB_READ_BASE]	= 0x200,
+	[BRCMNAND_OOB_READ_10_BASE]	=     0,
+	[BRCMNAND_OOB_WRITE_BASE]	= 0x280,
+	[BRCMNAND_OOB_WRITE_10_BASE]	=     0,
+	[BRCMNAND_FC_BASE]		= 0x400,
+};
+
+/* BRCMNAND v7.1 */
+static const u16 brcmnand_regs_v71[] = {
+	[BRCMNAND_CMD_START]		=  0x04,
+	[BRCMNAND_CMD_EXT_ADDRESS]	=  0x08,
+	[BRCMNAND_CMD_ADDRESS]		=  0x0c,
+	[BRCMNAND_INTFC_STATUS]		=  0x14,
+	[BRCMNAND_CS_SELECT]		=  0x18,
+	[BRCMNAND_CS_XOR]		=  0x1c,
+	[BRCMNAND_LL_OP]		=  0x20,
+	[BRCMNAND_CS0_BASE]		=  0x50,
+	[BRCMNAND_CS1_BASE]		=     0,
+	[BRCMNAND_CORR_THRESHOLD]	=  0xdc,
+	[BRCMNAND_CORR_THRESHOLD_EXT]	=  0xe0,
+	[BRCMNAND_UNCORR_COUNT]		=  0xfc,
+	[BRCMNAND_CORR_COUNT]		= 0x100,
+	[BRCMNAND_CORR_EXT_ADDR]	= 0x10c,
+	[BRCMNAND_CORR_ADDR]		= 0x110,
+	[BRCMNAND_UNCORR_EXT_ADDR]	= 0x114,
+	[BRCMNAND_UNCORR_ADDR]		= 0x118,
+	[BRCMNAND_SEMAPHORE]		= 0x150,
+	[BRCMNAND_ID]			= 0x194,
+	[BRCMNAND_ID_EXT]		= 0x198,
+	[BRCMNAND_LL_RDATA]		= 0x19c,
+	[BRCMNAND_OOB_READ_BASE]	= 0x200,
+	[BRCMNAND_OOB_READ_10_BASE]	=     0,
+	[BRCMNAND_OOB_WRITE_BASE]	= 0x280,
+	[BRCMNAND_OOB_WRITE_10_BASE]	=     0,
+	[BRCMNAND_FC_BASE]		= 0x400,
+};
+
+/* BRCMNAND v7.2 */
+static const u16 brcmnand_regs_v72[] = {
+	[BRCMNAND_CMD_START]		=  0x04,
+	[BRCMNAND_CMD_EXT_ADDRESS]	=  0x08,
+	[BRCMNAND_CMD_ADDRESS]		=  0x0c,
+	[BRCMNAND_INTFC_STATUS]		=  0x14,
+	[BRCMNAND_CS_SELECT]		=  0x18,
+	[BRCMNAND_CS_XOR]		=  0x1c,
+	[BRCMNAND_LL_OP]		=  0x20,
+	[BRCMNAND_CS0_BASE]		=  0x50,
+	[BRCMNAND_CS1_BASE]		=     0,
+	[BRCMNAND_CORR_THRESHOLD]	=  0xdc,
+	[BRCMNAND_CORR_THRESHOLD_EXT]	=  0xe0,
+	[BRCMNAND_UNCORR_COUNT]		=  0xfc,
+	[BRCMNAND_CORR_COUNT]		= 0x100,
+	[BRCMNAND_CORR_EXT_ADDR]	= 0x10c,
+	[BRCMNAND_CORR_ADDR]		= 0x110,
+	[BRCMNAND_UNCORR_EXT_ADDR]	= 0x114,
+	[BRCMNAND_UNCORR_ADDR]		= 0x118,
+	[BRCMNAND_SEMAPHORE]		= 0x150,
+	[BRCMNAND_ID]			= 0x194,
+	[BRCMNAND_ID_EXT]		= 0x198,
+	[BRCMNAND_LL_RDATA]		= 0x19c,
+	[BRCMNAND_OOB_READ_BASE]	= 0x200,
+	[BRCMNAND_OOB_READ_10_BASE]	=     0,
+	[BRCMNAND_OOB_WRITE_BASE]	= 0x400,
+	[BRCMNAND_OOB_WRITE_10_BASE]	=     0,
+	[BRCMNAND_FC_BASE]		= 0x600,
+};
+
+enum brcmnand_cs_reg {
+	BRCMNAND_CS_CFG_EXT = 0,
+	BRCMNAND_CS_CFG,
+	BRCMNAND_CS_ACC_CONTROL,
+	BRCMNAND_CS_TIMING1,
+	BRCMNAND_CS_TIMING2,
+};
+
+/* Per chip-select offsets for v7.1 */
+static const u8 brcmnand_cs_offsets_v71[] = {
+	[BRCMNAND_CS_ACC_CONTROL]	= 0x00,
+	[BRCMNAND_CS_CFG_EXT]		= 0x04,
+	[BRCMNAND_CS_CFG]		= 0x08,
+	[BRCMNAND_CS_TIMING1]		= 0x0c,
+	[BRCMNAND_CS_TIMING2]		= 0x10,
+};
+
+/* Per chip-select offsets for pre v7.1, except CS0 on <= v5.0 */
+static const u8 brcmnand_cs_offsets[] = {
+	[BRCMNAND_CS_ACC_CONTROL]	= 0x00,
+	[BRCMNAND_CS_CFG_EXT]		= 0x04,
+	[BRCMNAND_CS_CFG]		= 0x04,
+	[BRCMNAND_CS_TIMING1]		= 0x08,
+	[BRCMNAND_CS_TIMING2]		= 0x0c,
+};
+
+/* Per chip-select offset for <= v5.0 on CS0 only */
+static const u8 brcmnand_cs_offsets_cs0[] = {
+	[BRCMNAND_CS_ACC_CONTROL]	= 0x00,
+	[BRCMNAND_CS_CFG_EXT]		= 0x08,
+	[BRCMNAND_CS_CFG]		= 0x08,
+	[BRCMNAND_CS_TIMING1]		= 0x10,
+	[BRCMNAND_CS_TIMING2]		= 0x14,
+};
+
+/*
+ * Bitfields for the CFG and CFG_EXT registers. Pre-v7.1 controllers only had
+ * one config register, but once the bitfields overflowed, newer controllers
+ * (v7.1 and newer) added a CFG_EXT register and shuffled a few fields around.
+ */
+enum {
+	CFG_BLK_ADR_BYTES_SHIFT		= 8,
+	CFG_COL_ADR_BYTES_SHIFT		= 12,
+	CFG_FUL_ADR_BYTES_SHIFT		= 16,
+	CFG_BUS_WIDTH_SHIFT		= 23,
+	CFG_BUS_WIDTH			= BIT(CFG_BUS_WIDTH_SHIFT),
+	CFG_DEVICE_SIZE_SHIFT		= 24,
+
+	/* Only for pre-v7.1 (with no CFG_EXT register) */
+	CFG_PAGE_SIZE_SHIFT		= 20,
+	CFG_BLK_SIZE_SHIFT		= 28,
+
+	/* Only for v7.1+ (with CFG_EXT register) */
+	CFG_EXT_PAGE_SIZE_SHIFT		= 0,
+	CFG_EXT_BLK_SIZE_SHIFT		= 4,
+};
+
+/* BRCMNAND_INTFC_STATUS */
+enum {
+	INTFC_FLASH_STATUS		= GENMASK(7, 0),
+
+	INTFC_ERASED			= BIT(27),
+	INTFC_OOB_VALID			= BIT(28),
+	INTFC_CACHE_VALID		= BIT(29),
+	INTFC_FLASH_READY		= BIT(30),
+	INTFC_CTLR_READY		= BIT(31),
+};
+
+static inline u32 nand_readreg(struct brcmnand_controller *ctrl, u32 offs)
+{
+	return brcmnand_readl(ctrl->nand_base + offs);
+}
+
+static inline void nand_writereg(struct brcmnand_controller *ctrl, u32 offs,
+				 u32 val)
+{
+	brcmnand_writel(val, ctrl->nand_base + offs);
+}
+
+static int brcmnand_revision_init(struct brcmnand_controller *ctrl)
+{
+	static const unsigned int block_sizes_v6[] = { 8, 16, 128, 256, 512, 1024, 2048, 0 };
+	static const unsigned int block_sizes_v4[] = { 16, 128, 8, 512, 256, 1024, 2048, 0 };
+	static const unsigned int page_sizes[] = { 512, 2048, 4096, 8192, 0 };
+
+	ctrl->nand_version = nand_readreg(ctrl, 0) & 0xffff;
+
+	/* Only support v4.0+? */
+	if (ctrl->nand_version < 0x0400) {
+		dev_err(ctrl->dev, "version %#x not supported\n",
+			ctrl->nand_version);
+		return -ENODEV;
+	}
+
+	/* Register offsets */
+	if (ctrl->nand_version >= 0x0702)
+		ctrl->reg_offsets = brcmnand_regs_v72;
+	else if (ctrl->nand_version >= 0x0701)
+		ctrl->reg_offsets = brcmnand_regs_v71;
+	else if (ctrl->nand_version >= 0x0600)
+		ctrl->reg_offsets = brcmnand_regs_v60;
+	else if (ctrl->nand_version >= 0x0500)
+		ctrl->reg_offsets = brcmnand_regs_v50;
+	else if (ctrl->nand_version >= 0x0400)
+		ctrl->reg_offsets = brcmnand_regs_v40;
+
+	/* Chip-select stride */
+	if (ctrl->nand_version >= 0x0701)
+		ctrl->reg_spacing = 0x14;
+	else
+		ctrl->reg_spacing = 0x10;
+
+	/* Per chip-select registers */
+	if (ctrl->nand_version >= 0x0701) {
+		ctrl->cs_offsets = brcmnand_cs_offsets_v71;
+	} else {
+		ctrl->cs_offsets = brcmnand_cs_offsets;
+
+		/* v5.0 and earlier has a different CS0 offset layout */
+		if (ctrl->nand_version <= 0x0500)
+			ctrl->cs0_offsets = brcmnand_cs_offsets_cs0;
+	}
+
+	/* Page / block sizes */
+	if (ctrl->nand_version >= 0x0701) {
+		/* >= v7.1 use nice power-of-2 values! */
+		ctrl->max_page_size = 16 * 1024;
+		ctrl->max_block_size = 2 * 1024 * 1024;
+	} else {
+		ctrl->page_sizes = page_sizes;
+		if (ctrl->nand_version >= 0x0600)
+			ctrl->block_sizes = block_sizes_v6;
+		else
+			ctrl->block_sizes = block_sizes_v4;
+
+		if (ctrl->nand_version < 0x0400) {
+			ctrl->max_page_size = 4096;
+			ctrl->max_block_size = 512 * 1024;
+		}
+	}
+
+	/* Maximum spare area sector size (per 512B) */
+	if (ctrl->nand_version >= 0x0702)
+		ctrl->max_oob = 128;
+	else if (ctrl->nand_version >= 0x0600)
+		ctrl->max_oob = 64;
+	else if (ctrl->nand_version >= 0x0500)
+		ctrl->max_oob = 32;
+	else
+		ctrl->max_oob = 16;
+
+	/* v6.0 and newer (except v6.1) have prefetch support */
+	if (ctrl->nand_version >= 0x0600 && ctrl->nand_version != 0x0601)
+		ctrl->features |= BRCMNAND_HAS_PREFETCH;
+
+	/*
+	 * v6.x has cache mode, but it's implemented differently. Ignore it for
+	 * now.
+	 */
+	if (ctrl->nand_version >= 0x0700)
+		ctrl->features |= BRCMNAND_HAS_CACHE_MODE;
+
+	if (ctrl->nand_version >= 0x0500)
+		ctrl->features |= BRCMNAND_HAS_1K_SECTORS;
+
+	if (ctrl->nand_version >= 0x0700)
+		ctrl->features |= BRCMNAND_HAS_WP;
+#ifndef __UBOOT__
+	else if (of_property_read_bool(ctrl->dev->of_node, "brcm,nand-has-wp"))
+#else
+	else if (dev_read_bool(ctrl->dev, "brcm,nand-has-wp"))
+#endif /* __UBOOT__ */
+		ctrl->features |= BRCMNAND_HAS_WP;
+
+	return 0;
+}
+
+static inline u32 brcmnand_read_reg(struct brcmnand_controller *ctrl,
+		enum brcmnand_reg reg)
+{
+	u16 offs = ctrl->reg_offsets[reg];
+
+	if (offs)
+		return nand_readreg(ctrl, offs);
+	else
+		return 0;
+}
+
+static inline void brcmnand_write_reg(struct brcmnand_controller *ctrl,
+				      enum brcmnand_reg reg, u32 val)
+{
+	u16 offs = ctrl->reg_offsets[reg];
+
+	if (offs)
+		nand_writereg(ctrl, offs, val);
+}
+
+static inline void brcmnand_rmw_reg(struct brcmnand_controller *ctrl,
+				    enum brcmnand_reg reg, u32 mask, unsigned
+				    int shift, u32 val)
+{
+	u32 tmp = brcmnand_read_reg(ctrl, reg);
+
+	tmp &= ~mask;
+	tmp |= val << shift;
+	brcmnand_write_reg(ctrl, reg, tmp);
+}
+
+static inline u32 brcmnand_read_fc(struct brcmnand_controller *ctrl, int word)
+{
+	return __raw_readl(ctrl->nand_fc + word * 4);
+}
+
+static inline void brcmnand_write_fc(struct brcmnand_controller *ctrl,
+				     int word, u32 val)
+{
+	__raw_writel(val, ctrl->nand_fc + word * 4);
+}
+
+static inline u16 brcmnand_cs_offset(struct brcmnand_controller *ctrl, int cs,
+				     enum brcmnand_cs_reg reg)
+{
+	u16 offs_cs0 = ctrl->reg_offsets[BRCMNAND_CS0_BASE];
+	u16 offs_cs1 = ctrl->reg_offsets[BRCMNAND_CS1_BASE];
+	u8 cs_offs;
+
+	if (cs == 0 && ctrl->cs0_offsets)
+		cs_offs = ctrl->cs0_offsets[reg];
+	else
+		cs_offs = ctrl->cs_offsets[reg];
+
+	if (cs && offs_cs1)
+		return offs_cs1 + (cs - 1) * ctrl->reg_spacing + cs_offs;
+
+	return offs_cs0 + cs * ctrl->reg_spacing + cs_offs;
+}
+
+static inline u32 brcmnand_count_corrected(struct brcmnand_controller *ctrl)
+{
+	if (ctrl->nand_version < 0x0600)
+		return 1;
+	return brcmnand_read_reg(ctrl, BRCMNAND_CORR_COUNT);
+}
+
+static void brcmnand_wr_corr_thresh(struct brcmnand_host *host, u8 val)
+{
+	struct brcmnand_controller *ctrl = host->ctrl;
+	unsigned int shift = 0, bits;
+	enum brcmnand_reg reg = BRCMNAND_CORR_THRESHOLD;
+	int cs = host->cs;
+
+	if (ctrl->nand_version >= 0x0702)
+		bits = 7;
+	else if (ctrl->nand_version >= 0x0600)
+		bits = 6;
+	else if (ctrl->nand_version >= 0x0500)
+		bits = 5;
+	else
+		bits = 4;
+
+	if (ctrl->nand_version >= 0x0702) {
+		if (cs >= 4)
+			reg = BRCMNAND_CORR_THRESHOLD_EXT;
+		shift = (cs % 4) * bits;
+	} else if (ctrl->nand_version >= 0x0600) {
+		if (cs >= 5)
+			reg = BRCMNAND_CORR_THRESHOLD_EXT;
+		shift = (cs % 5) * bits;
+	}
+	brcmnand_rmw_reg(ctrl, reg, (bits - 1) << shift, shift, val);
+}
+
+static inline int brcmnand_cmd_shift(struct brcmnand_controller *ctrl)
+{
+	if (ctrl->nand_version < 0x0602)
+		return 24;
+	return 0;
+}
+
+/***********************************************************************
+ * NAND ACC CONTROL bitfield
+ *
+ * Some bits have remained constant throughout hardware revision, while
+ * others have shifted around.
+ ***********************************************************************/
+
+/* Constant for all versions (where supported) */
+enum {
+	/* See BRCMNAND_HAS_CACHE_MODE */
+	ACC_CONTROL_CACHE_MODE				= BIT(22),
+
+	/* See BRCMNAND_HAS_PREFETCH */
+	ACC_CONTROL_PREFETCH				= BIT(23),
+
+	ACC_CONTROL_PAGE_HIT				= BIT(24),
+	ACC_CONTROL_WR_PREEMPT				= BIT(25),
+	ACC_CONTROL_PARTIAL_PAGE			= BIT(26),
+	ACC_CONTROL_RD_ERASED				= BIT(27),
+	ACC_CONTROL_FAST_PGM_RDIN			= BIT(28),
+	ACC_CONTROL_WR_ECC				= BIT(30),
+	ACC_CONTROL_RD_ECC				= BIT(31),
+};
+
+static inline u32 brcmnand_spare_area_mask(struct brcmnand_controller *ctrl)
+{
+	if (ctrl->nand_version >= 0x0702)
+		return GENMASK(7, 0);
+	else if (ctrl->nand_version >= 0x0600)
+		return GENMASK(6, 0);
+	else
+		return GENMASK(5, 0);
+}
+
+#define NAND_ACC_CONTROL_ECC_SHIFT	16
+#define NAND_ACC_CONTROL_ECC_EXT_SHIFT	13
+
+static inline u32 brcmnand_ecc_level_mask(struct brcmnand_controller *ctrl)
+{
+	u32 mask = (ctrl->nand_version >= 0x0600) ? 0x1f : 0x0f;
+
+	mask <<= NAND_ACC_CONTROL_ECC_SHIFT;
+
+	/* v7.2 includes additional ECC levels */
+	if (ctrl->nand_version >= 0x0702)
+		mask |= 0x7 << NAND_ACC_CONTROL_ECC_EXT_SHIFT;
+
+	return mask;
+}
+
+static void brcmnand_set_ecc_enabled(struct brcmnand_host *host, int en)
+{
+	struct brcmnand_controller *ctrl = host->ctrl;
+	u16 offs = brcmnand_cs_offset(ctrl, host->cs, BRCMNAND_CS_ACC_CONTROL);
+	u32 acc_control = nand_readreg(ctrl, offs);
+	u32 ecc_flags = ACC_CONTROL_WR_ECC | ACC_CONTROL_RD_ECC;
+
+	if (en) {
+		acc_control |= ecc_flags; /* enable RD/WR ECC */
+		acc_control |= host->hwcfg.ecc_level
+			       << NAND_ACC_CONTROL_ECC_SHIFT;
+	} else {
+		acc_control &= ~ecc_flags; /* disable RD/WR ECC */
+		acc_control &= ~brcmnand_ecc_level_mask(ctrl);
+	}
+
+	nand_writereg(ctrl, offs, acc_control);
+}
+
+static inline int brcmnand_sector_1k_shift(struct brcmnand_controller *ctrl)
+{
+	if (ctrl->nand_version >= 0x0702)
+		return 9;
+	else if (ctrl->nand_version >= 0x0600)
+		return 7;
+	else if (ctrl->nand_version >= 0x0500)
+		return 6;
+	else
+		return -1;
+}
+
+static int brcmnand_get_sector_size_1k(struct brcmnand_host *host)
+{
+	struct brcmnand_controller *ctrl = host->ctrl;
+	int shift = brcmnand_sector_1k_shift(ctrl);
+	u16 acc_control_offs = brcmnand_cs_offset(ctrl, host->cs,
+						  BRCMNAND_CS_ACC_CONTROL);
+
+	if (shift < 0)
+		return 0;
+
+	return (nand_readreg(ctrl, acc_control_offs) >> shift) & 0x1;
+}
+
+static void brcmnand_set_sector_size_1k(struct brcmnand_host *host, int val)
+{
+	struct brcmnand_controller *ctrl = host->ctrl;
+	int shift = brcmnand_sector_1k_shift(ctrl);
+	u16 acc_control_offs = brcmnand_cs_offset(ctrl, host->cs,
+						  BRCMNAND_CS_ACC_CONTROL);
+	u32 tmp;
+
+	if (shift < 0)
+		return;
+
+	tmp = nand_readreg(ctrl, acc_control_offs);
+	tmp &= ~(1 << shift);
+	tmp |= (!!val) << shift;
+	nand_writereg(ctrl, acc_control_offs, tmp);
+}
+
+/***********************************************************************
+ * CS_NAND_SELECT
+ ***********************************************************************/
+
+enum {
+	CS_SELECT_NAND_WP			= BIT(29),
+	CS_SELECT_AUTO_DEVICE_ID_CFG		= BIT(30),
+};
+
+static int bcmnand_ctrl_poll_status(struct brcmnand_controller *ctrl,
+				    u32 mask, u32 expected_val,
+				    unsigned long timeout_ms)
+{
+#ifndef __UBOOT__
+	unsigned long limit;
+	u32 val;
+
+	if (!timeout_ms)
+		timeout_ms = NAND_POLL_STATUS_TIMEOUT_MS;
+
+	limit = jiffies + msecs_to_jiffies(timeout_ms);
+	do {
+		val = brcmnand_read_reg(ctrl, BRCMNAND_INTFC_STATUS);
+		if ((val & mask) == expected_val)
+			return 0;
+
+		cpu_relax();
+	} while (time_after(limit, jiffies));
+#else
+	unsigned long base, limit;
+	u32 val;
+
+	if (!timeout_ms)
+		timeout_ms = NAND_POLL_STATUS_TIMEOUT_MS;
+
+	base = get_timer(0);
+	limit = CONFIG_SYS_HZ * timeout_ms / 1000;
+	do {
+		val = brcmnand_read_reg(ctrl, BRCMNAND_INTFC_STATUS);
+		if ((val & mask) == expected_val)
+			return 0;
+
+		cpu_relax();
+	} while (get_timer(base) < limit);
+#endif /* __UBOOT__ */
+
+	dev_warn(ctrl->dev, "timeout on status poll (expected %x got %x)\n",
+		 expected_val, val & mask);
+
+	return -ETIMEDOUT;
+}
+
+static inline void brcmnand_set_wp(struct brcmnand_controller *ctrl, bool en)
+{
+	u32 val = en ? CS_SELECT_NAND_WP : 0;
+
+	brcmnand_rmw_reg(ctrl, BRCMNAND_CS_SELECT, CS_SELECT_NAND_WP, 0, val);
+}
+
+/***********************************************************************
+ * Flash DMA
+ ***********************************************************************/
+
+enum flash_dma_reg {
+	FLASH_DMA_REVISION		= 0x00,
+	FLASH_DMA_FIRST_DESC		= 0x04,
+	FLASH_DMA_FIRST_DESC_EXT	= 0x08,
+	FLASH_DMA_CTRL			= 0x0c,
+	FLASH_DMA_MODE			= 0x10,
+	FLASH_DMA_STATUS		= 0x14,
+	FLASH_DMA_INTERRUPT_DESC	= 0x18,
+	FLASH_DMA_INTERRUPT_DESC_EXT	= 0x1c,
+	FLASH_DMA_ERROR_STATUS		= 0x20,
+	FLASH_DMA_CURRENT_DESC		= 0x24,
+	FLASH_DMA_CURRENT_DESC_EXT	= 0x28,
+};
+
+static inline bool has_flash_dma(struct brcmnand_controller *ctrl)
+{
+	return ctrl->flash_dma_base;
+}
+
+static inline bool flash_dma_buf_ok(const void *buf)
+{
+#ifndef __UBOOT__
+	return buf && !is_vmalloc_addr(buf) &&
+		likely(IS_ALIGNED((uintptr_t)buf, 4));
+#else
+	return buf && likely(IS_ALIGNED((uintptr_t)buf, 4));
+#endif /* __UBOOT__ */
+}
+
+static inline void flash_dma_writel(struct brcmnand_controller *ctrl, u8 offs,
+				    u32 val)
+{
+	brcmnand_writel(val, ctrl->flash_dma_base + offs);
+}
+
+static inline u32 flash_dma_readl(struct brcmnand_controller *ctrl, u8 offs)
+{
+	return brcmnand_readl(ctrl->flash_dma_base + offs);
+}
+
+/* Low-level operation types: command, address, write, or read */
+enum brcmnand_llop_type {
+	LL_OP_CMD,
+	LL_OP_ADDR,
+	LL_OP_WR,
+	LL_OP_RD,
+};
+
+/***********************************************************************
+ * Internal support functions
+ ***********************************************************************/
+
+static inline bool is_hamming_ecc(struct brcmnand_controller *ctrl,
+				  struct brcmnand_cfg *cfg)
+{
+	if (ctrl->nand_version <= 0x0701)
+		return cfg->sector_size_1k == 0 && cfg->spare_area_size == 16 &&
+			cfg->ecc_level == 15;
+	else
+		return cfg->sector_size_1k == 0 && ((cfg->spare_area_size == 16 &&
+			cfg->ecc_level == 15) ||
+			(cfg->spare_area_size == 28 && cfg->ecc_level == 16));
+}
+
+/*
+ * Set mtd->ooblayout to the appropriate mtd_ooblayout_ops given
+ * the layout/configuration.
+ * Returns -ERRCODE on failure.
+ */
+static int brcmnand_hamming_ooblayout_ecc(struct mtd_info *mtd, int section,
+					  struct mtd_oob_region *oobregion)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct brcmnand_host *host = nand_get_controller_data(chip);
+	struct brcmnand_cfg *cfg = &host->hwcfg;
+	int sas = cfg->spare_area_size << cfg->sector_size_1k;
+	int sectors = cfg->page_size / (512 << cfg->sector_size_1k);
+
+	if (section >= sectors)
+		return -ERANGE;
+
+	oobregion->offset = (section * sas) + 6;
+	oobregion->length = 3;
+
+	return 0;
+}
+
+static int brcmnand_hamming_ooblayout_free(struct mtd_info *mtd, int section,
+					   struct mtd_oob_region *oobregion)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct brcmnand_host *host = nand_get_controller_data(chip);
+	struct brcmnand_cfg *cfg = &host->hwcfg;
+	int sas = cfg->spare_area_size << cfg->sector_size_1k;
+	int sectors = cfg->page_size / (512 << cfg->sector_size_1k);
+
+	if (section >= sectors * 2)
+		return -ERANGE;
+
+	oobregion->offset = (section / 2) * sas;
+
+	if (section & 1) {
+		oobregion->offset += 9;
+		oobregion->length = 7;
+	} else {
+		oobregion->length = 6;
+
+		/* First sector of each page may have BBI */
+		if (!section) {
+			/*
+			 * Small-page NAND use byte 6 for BBI while large-page
+			 * NAND use byte 0.
+			 */
+			if (cfg->page_size > 512)
+				oobregion->offset++;
+			oobregion->length--;
+		}
+	}
+
+	return 0;
+}
+
+static const struct mtd_ooblayout_ops brcmnand_hamming_ooblayout_ops = {
+	.ecc = brcmnand_hamming_ooblayout_ecc,
+	.free = brcmnand_hamming_ooblayout_free,
+};
+
+static int brcmnand_bch_ooblayout_ecc(struct mtd_info *mtd, int section,
+				      struct mtd_oob_region *oobregion)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct brcmnand_host *host = nand_get_controller_data(chip);
+	struct brcmnand_cfg *cfg = &host->hwcfg;
+	int sas = cfg->spare_area_size << cfg->sector_size_1k;
+	int sectors = cfg->page_size / (512 << cfg->sector_size_1k);
+
+	if (section >= sectors)
+		return -ERANGE;
+
+	oobregion->offset = (section * (sas + 1)) - chip->ecc.bytes;
+	oobregion->length = chip->ecc.bytes;
+
+	return 0;
+}
+
+static int brcmnand_bch_ooblayout_free_lp(struct mtd_info *mtd, int section,
+					  struct mtd_oob_region *oobregion)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct brcmnand_host *host = nand_get_controller_data(chip);
+	struct brcmnand_cfg *cfg = &host->hwcfg;
+	int sas = cfg->spare_area_size << cfg->sector_size_1k;
+	int sectors = cfg->page_size / (512 << cfg->sector_size_1k);
+
+	if (section >= sectors)
+		return -ERANGE;
+
+	if (sas <= chip->ecc.bytes)
+		return 0;
+
+	oobregion->offset = section * sas;
+	oobregion->length = sas - chip->ecc.bytes;
+
+	if (!section) {
+		oobregion->offset++;
+		oobregion->length--;
+	}
+
+	return 0;
+}
+
+static int brcmnand_bch_ooblayout_free_sp(struct mtd_info *mtd, int section,
+					  struct mtd_oob_region *oobregion)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct brcmnand_host *host = nand_get_controller_data(chip);
+	struct brcmnand_cfg *cfg = &host->hwcfg;
+	int sas = cfg->spare_area_size << cfg->sector_size_1k;
+
+	if (section > 1 || sas - chip->ecc.bytes < 6 ||
+	    (section && sas - chip->ecc.bytes == 6))
+		return -ERANGE;
+
+	if (!section) {
+		oobregion->offset = 0;
+		oobregion->length = 5;
+	} else {
+		oobregion->offset = 6;
+		oobregion->length = sas - chip->ecc.bytes - 6;
+	}
+
+	return 0;
+}
+
+static const struct mtd_ooblayout_ops brcmnand_bch_lp_ooblayout_ops = {
+	.ecc = brcmnand_bch_ooblayout_ecc,
+	.free = brcmnand_bch_ooblayout_free_lp,
+};
+
+static const struct mtd_ooblayout_ops brcmnand_bch_sp_ooblayout_ops = {
+	.ecc = brcmnand_bch_ooblayout_ecc,
+	.free = brcmnand_bch_ooblayout_free_sp,
+};
+
+static int brcmstb_choose_ecc_layout(struct brcmnand_host *host)
+{
+	struct brcmnand_cfg *p = &host->hwcfg;
+	struct mtd_info *mtd = nand_to_mtd(&host->chip);
+	struct nand_ecc_ctrl *ecc = &host->chip.ecc;
+	unsigned int ecc_level = p->ecc_level;
+	int sas = p->spare_area_size << p->sector_size_1k;
+	int sectors = p->page_size / (512 << p->sector_size_1k);
+
+	if (p->sector_size_1k)
+		ecc_level <<= 1;
+
+	if (is_hamming_ecc(host->ctrl, p)) {
+		ecc->bytes = 3 * sectors;
+		mtd_set_ooblayout(mtd, &brcmnand_hamming_ooblayout_ops);
+		return 0;
+	}
+
+	/*
+	 * CONTROLLER_VERSION:
+	 *   < v5.0: ECC_REQ = ceil(BCH_T * 13/8)
+	 *  >= v5.0: ECC_REQ = ceil(BCH_T * 14/8)
+	 * But we will just be conservative.
+	 */
+	ecc->bytes = DIV_ROUND_UP(ecc_level * 14, 8);
+	if (p->page_size == 512)
+		mtd_set_ooblayout(mtd, &brcmnand_bch_sp_ooblayout_ops);
+	else
+		mtd_set_ooblayout(mtd, &brcmnand_bch_lp_ooblayout_ops);
+
+	if (ecc->bytes >= sas) {
+		dev_err(&host->pdev->dev,
+			"error: ECC too large for OOB (ECC bytes %d, spare sector %d)\n",
+			ecc->bytes, sas);
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static void brcmnand_wp(struct mtd_info *mtd, int wp)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct brcmnand_host *host = nand_get_controller_data(chip);
+	struct brcmnand_controller *ctrl = host->ctrl;
+
+	if ((ctrl->features & BRCMNAND_HAS_WP) && wp_on == 1) {
+		static int old_wp = -1;
+		int ret;
+
+		if (old_wp != wp) {
+			dev_dbg(ctrl->dev, "WP %s\n", wp ? "on" : "off");
+			old_wp = wp;
+		}
+
+		/*
+		 * make sure ctrl/flash ready before and after
+		 * changing state of #WP pin
+		 */
+		ret = bcmnand_ctrl_poll_status(ctrl, NAND_CTRL_RDY |
+					       NAND_STATUS_READY,
+					       NAND_CTRL_RDY |
+					       NAND_STATUS_READY, 0);
+		if (ret)
+			return;
+
+		brcmnand_set_wp(ctrl, wp);
+		nand_status_op(chip, NULL);
+		/* NAND_STATUS_WP 0x00 = protected, 0x80 = not protected */
+		ret = bcmnand_ctrl_poll_status(ctrl,
+					       NAND_CTRL_RDY |
+					       NAND_STATUS_READY |
+					       NAND_STATUS_WP,
+					       NAND_CTRL_RDY |
+					       NAND_STATUS_READY |
+					       (wp ? 0 : NAND_STATUS_WP), 0);
+#ifndef __UBOOT__
+		if (ret)
+			dev_err_ratelimited(&host->pdev->dev,
+					    "nand #WP expected %s\n",
+					    wp ? "on" : "off");
+#else
+		if (ret)
+			dev_err(&host->pdev->dev,
+					    "nand #WP expected %s\n",
+					    wp ? "on" : "off");
+#endif /* __UBOOT__ */
+	}
+}
+
+/* Helper functions for reading and writing OOB registers */
+static inline u8 oob_reg_read(struct brcmnand_controller *ctrl, u32 offs)
+{
+	u16 offset0, offset10, reg_offs;
+
+	offset0 = ctrl->reg_offsets[BRCMNAND_OOB_READ_BASE];
+	offset10 = ctrl->reg_offsets[BRCMNAND_OOB_READ_10_BASE];
+
+	if (offs >= ctrl->max_oob)
+		return 0x77;
+
+	if (offs >= 16 && offset10)
+		reg_offs = offset10 + ((offs - 0x10) & ~0x03);
+	else
+		reg_offs = offset0 + (offs & ~0x03);
+
+	return nand_readreg(ctrl, reg_offs) >> (24 - ((offs & 0x03) << 3));
+}
+
+static inline void oob_reg_write(struct brcmnand_controller *ctrl, u32 offs,
+				 u32 data)
+{
+	u16 offset0, offset10, reg_offs;
+
+	offset0 = ctrl->reg_offsets[BRCMNAND_OOB_WRITE_BASE];
+	offset10 = ctrl->reg_offsets[BRCMNAND_OOB_WRITE_10_BASE];
+
+	if (offs >= ctrl->max_oob)
+		return;
+
+	if (offs >= 16 && offset10)
+		reg_offs = offset10 + ((offs - 0x10) & ~0x03);
+	else
+		reg_offs = offset0 + (offs & ~0x03);
+
+	nand_writereg(ctrl, reg_offs, data);
+}
+
+/*
+ * read_oob_from_regs - read data from OOB registers
+ * @ctrl: NAND controller
+ * @i: sub-page sector index
+ * @oob: buffer to read to
+ * @sas: spare area sector size (i.e., OOB size per FLASH_CACHE)
+ * @sector_1k: 1 for 1KiB sectors, 0 for 512B, other values are illegal
+ */
+static int read_oob_from_regs(struct brcmnand_controller *ctrl, int i, u8 *oob,
+			      int sas, int sector_1k)
+{
+	int tbytes = sas << sector_1k;
+	int j;
+
+	/* Adjust OOB values for 1K sector size */
+	if (sector_1k && (i & 0x01))
+		tbytes = max(0, tbytes - (int)ctrl->max_oob);
+	tbytes = min_t(int, tbytes, ctrl->max_oob);
+
+	for (j = 0; j < tbytes; j++)
+		oob[j] = oob_reg_read(ctrl, j);
+	return tbytes;
+}
+
+/*
+ * write_oob_to_regs - write data to OOB registers
+ * @i: sub-page sector index
+ * @oob: buffer to write from
+ * @sas: spare area sector size (i.e., OOB size per FLASH_CACHE)
+ * @sector_1k: 1 for 1KiB sectors, 0 for 512B, other values are illegal
+ */
+static int write_oob_to_regs(struct brcmnand_controller *ctrl, int i,
+			     const u8 *oob, int sas, int sector_1k)
+{
+	int tbytes = sas << sector_1k;
+	int j;
+
+	/* Adjust OOB values for 1K sector size */
+	if (sector_1k && (i & 0x01))
+		tbytes = max(0, tbytes - (int)ctrl->max_oob);
+	tbytes = min_t(int, tbytes, ctrl->max_oob);
+
+	for (j = 0; j < tbytes; j += 4)
+		oob_reg_write(ctrl, j,
+				(oob[j + 0] << 24) |
+				(oob[j + 1] << 16) |
+				(oob[j + 2] <<  8) |
+				(oob[j + 3] <<  0));
+	return tbytes;
+}
+
+#ifndef __UBOOT__
+static irqreturn_t brcmnand_ctlrdy_irq(int irq, void *data)
+{
+	struct brcmnand_controller *ctrl = data;
+
+	/* Discard all NAND_CTLRDY interrupts during DMA */
+	if (ctrl->dma_pending)
+		return IRQ_HANDLED;
+
+	complete(&ctrl->done);
+	return IRQ_HANDLED;
+}
+
+/* Handle SoC-specific interrupt hardware */
+static irqreturn_t brcmnand_irq(int irq, void *data)
+{
+	struct brcmnand_controller *ctrl = data;
+
+	if (ctrl->soc->ctlrdy_ack(ctrl->soc))
+		return brcmnand_ctlrdy_irq(irq, data);
+
+	return IRQ_NONE;
+}
+
+static irqreturn_t brcmnand_dma_irq(int irq, void *data)
+{
+	struct brcmnand_controller *ctrl = data;
+
+	complete(&ctrl->dma_done);
+
+	return IRQ_HANDLED;
+}
+#endif /* __UBOOT__ */
+
+static void brcmnand_send_cmd(struct brcmnand_host *host, int cmd)
+{
+	struct brcmnand_controller *ctrl = host->ctrl;
+	int ret;
+
+	dev_dbg(ctrl->dev, "send native cmd %d addr_lo 0x%x\n", cmd,
+		brcmnand_read_reg(ctrl, BRCMNAND_CMD_ADDRESS));
+	BUG_ON(ctrl->cmd_pending != 0);
+	ctrl->cmd_pending = cmd;
+
+	ret = bcmnand_ctrl_poll_status(ctrl, NAND_CTRL_RDY, NAND_CTRL_RDY, 0);
+	WARN_ON(ret);
+
+	mb(); /* flush previous writes */
+	brcmnand_write_reg(ctrl, BRCMNAND_CMD_START,
+			   cmd << brcmnand_cmd_shift(ctrl));
+}
+
+/***********************************************************************
+ * NAND MTD API: read/program/erase
+ ***********************************************************************/
+
+static void brcmnand_cmd_ctrl(struct mtd_info *mtd, int dat,
+	unsigned int ctrl)
+{
+	/* intentionally left blank */
+}
+
+static int brcmnand_waitfunc(struct mtd_info *mtd, struct nand_chip *this)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct brcmnand_host *host = nand_get_controller_data(chip);
+	struct brcmnand_controller *ctrl = host->ctrl;
+
+#ifndef __UBOOT__
+	unsigned long timeo = msecs_to_jiffies(100);
+
+	dev_dbg(ctrl->dev, "wait on native cmd %d\n", ctrl->cmd_pending);
+	if (ctrl->cmd_pending &&
+			wait_for_completion_timeout(&ctrl->done, timeo) <= 0) {
+		u32 cmd = brcmnand_read_reg(ctrl, BRCMNAND_CMD_START)
+					>> brcmnand_cmd_shift(ctrl);
+
+		dev_err_ratelimited(ctrl->dev,
+			"timeout waiting for command %#02x\n", cmd);
+		dev_err_ratelimited(ctrl->dev, "intfc status %08x\n",
+			brcmnand_read_reg(ctrl, BRCMNAND_INTFC_STATUS));
+	}
+#else
+	unsigned long timeo = 100; /* 100 msec */
+	int ret;
+
+	dev_dbg(ctrl->dev, "wait on native cmd %d\n", ctrl->cmd_pending);
+
+	ret = bcmnand_ctrl_poll_status(ctrl, NAND_CTRL_RDY, NAND_CTRL_RDY, timeo);
+	WARN_ON(ret);
+#endif /* __UBOOT__ */
+
+	ctrl->cmd_pending = 0;
+	return brcmnand_read_reg(ctrl, BRCMNAND_INTFC_STATUS) &
+				 INTFC_FLASH_STATUS;
+}
+
+enum {
+	LLOP_RE				= BIT(16),
+	LLOP_WE				= BIT(17),
+	LLOP_ALE			= BIT(18),
+	LLOP_CLE			= BIT(19),
+	LLOP_RETURN_IDLE		= BIT(31),
+
+	LLOP_DATA_MASK			= GENMASK(15, 0),
+};
+
+static int brcmnand_low_level_op(struct brcmnand_host *host,
+				 enum brcmnand_llop_type type, u32 data,
+				 bool last_op)
+{
+	struct mtd_info *mtd = nand_to_mtd(&host->chip);
+	struct nand_chip *chip = &host->chip;
+	struct brcmnand_controller *ctrl = host->ctrl;
+	u32 tmp;
+
+	tmp = data & LLOP_DATA_MASK;
+	switch (type) {
+	case LL_OP_CMD:
+		tmp |= LLOP_WE | LLOP_CLE;
+		break;
+	case LL_OP_ADDR:
+		/* WE | ALE */
+		tmp |= LLOP_WE | LLOP_ALE;
+		break;
+	case LL_OP_WR:
+		/* WE */
+		tmp |= LLOP_WE;
+		break;
+	case LL_OP_RD:
+		/* RE */
+		tmp |= LLOP_RE;
+		break;
+	}
+	if (last_op)
+		/* RETURN_IDLE */
+		tmp |= LLOP_RETURN_IDLE;
+
+	dev_dbg(ctrl->dev, "ll_op cmd %#x\n", tmp);
+
+	brcmnand_write_reg(ctrl, BRCMNAND_LL_OP, tmp);
+	(void)brcmnand_read_reg(ctrl, BRCMNAND_LL_OP);
+
+	brcmnand_send_cmd(host, CMD_LOW_LEVEL_OP);
+	return brcmnand_waitfunc(mtd, chip);
+}
+
+static void brcmnand_cmdfunc(struct mtd_info *mtd, unsigned command,
+			     int column, int page_addr)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct brcmnand_host *host = nand_get_controller_data(chip);
+	struct brcmnand_controller *ctrl = host->ctrl;
+	u64 addr = (u64)page_addr << chip->page_shift;
+	int native_cmd = 0;
+
+	if (command == NAND_CMD_READID || command == NAND_CMD_PARAM ||
+			command == NAND_CMD_RNDOUT)
+		addr = (u64)column;
+	/* Avoid propagating a negative, don't-care address */
+	else if (page_addr < 0)
+		addr = 0;
+
+	dev_dbg(ctrl->dev, "cmd 0x%x addr 0x%llx\n", command,
+		(unsigned long long)addr);
+
+	host->last_cmd = command;
+	host->last_byte = 0;
+	host->last_addr = addr;
+
+	switch (command) {
+	case NAND_CMD_RESET:
+		native_cmd = CMD_FLASH_RESET;
+		break;
+	case NAND_CMD_STATUS:
+		native_cmd = CMD_STATUS_READ;
+		break;
+	case NAND_CMD_READID:
+		native_cmd = CMD_DEVICE_ID_READ;
+		break;
+	case NAND_CMD_READOOB:
+		native_cmd = CMD_SPARE_AREA_READ;
+		break;
+	case NAND_CMD_ERASE1:
+		native_cmd = CMD_BLOCK_ERASE;
+		brcmnand_wp(mtd, 0);
+		break;
+	case NAND_CMD_PARAM:
+		native_cmd = CMD_PARAMETER_READ;
+		break;
+	case NAND_CMD_SET_FEATURES:
+	case NAND_CMD_GET_FEATURES:
+		brcmnand_low_level_op(host, LL_OP_CMD, command, false);
+		brcmnand_low_level_op(host, LL_OP_ADDR, column, false);
+		break;
+	case NAND_CMD_RNDOUT:
+		native_cmd = CMD_PARAMETER_CHANGE_COL;
+		addr &= ~((u64)(FC_BYTES - 1));
+		/*
+		 * HW quirk: PARAMETER_CHANGE_COL requires SECTOR_SIZE_1K=0
+		 * NB: hwcfg.sector_size_1k may not be initialized yet
+		 */
+		if (brcmnand_get_sector_size_1k(host)) {
+			host->hwcfg.sector_size_1k =
+				brcmnand_get_sector_size_1k(host);
+			brcmnand_set_sector_size_1k(host, 0);
+		}
+		break;
+	}
+
+	if (!native_cmd)
+		return;
+
+	brcmnand_write_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS,
+		(host->cs << 16) | ((addr >> 32) & 0xffff));
+	(void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS);
+	brcmnand_write_reg(ctrl, BRCMNAND_CMD_ADDRESS, lower_32_bits(addr));
+	(void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_ADDRESS);
+
+	brcmnand_send_cmd(host, native_cmd);
+	brcmnand_waitfunc(mtd, chip);
+
+	if (native_cmd == CMD_PARAMETER_READ ||
+			native_cmd == CMD_PARAMETER_CHANGE_COL) {
+		/* Copy flash cache word-wise */
+		u32 *flash_cache = (u32 *)ctrl->flash_cache;
+		int i;
+
+		brcmnand_soc_data_bus_prepare(ctrl->soc, true);
+
+		/*
+		 * Must cache the FLASH_CACHE now, since changes in
+		 * SECTOR_SIZE_1K may invalidate it
+		 */
+		for (i = 0; i < FC_WORDS; i++)
+			/*
+			 * Flash cache is big endian for parameter pages, at
+			 * least on STB SoCs
+			 */
+			flash_cache[i] = be32_to_cpu(brcmnand_read_fc(ctrl, i));
+
+		brcmnand_soc_data_bus_unprepare(ctrl->soc, true);
+
+		/* Cleanup from HW quirk: restore SECTOR_SIZE_1K */
+		if (host->hwcfg.sector_size_1k)
+			brcmnand_set_sector_size_1k(host,
+						    host->hwcfg.sector_size_1k);
+	}
+
+	/* Re-enable protection is necessary only after erase */
+	if (command == NAND_CMD_ERASE1)
+		brcmnand_wp(mtd, 1);
+}
+
+static uint8_t brcmnand_read_byte(struct mtd_info *mtd)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct brcmnand_host *host = nand_get_controller_data(chip);
+	struct brcmnand_controller *ctrl = host->ctrl;
+	uint8_t ret = 0;
+	int addr, offs;
+
+	switch (host->last_cmd) {
+	case NAND_CMD_READID:
+		if (host->last_byte < 4)
+			ret = brcmnand_read_reg(ctrl, BRCMNAND_ID) >>
+				(24 - (host->last_byte << 3));
+		else if (host->last_byte < 8)
+			ret = brcmnand_read_reg(ctrl, BRCMNAND_ID_EXT) >>
+				(56 - (host->last_byte << 3));
+		break;
+
+	case NAND_CMD_READOOB:
+		ret = oob_reg_read(ctrl, host->last_byte);
+		break;
+
+	case NAND_CMD_STATUS:
+		ret = brcmnand_read_reg(ctrl, BRCMNAND_INTFC_STATUS) &
+					INTFC_FLASH_STATUS;
+		if (wp_on) /* hide WP status */
+			ret |= NAND_STATUS_WP;
+		break;
+
+	case NAND_CMD_PARAM:
+	case NAND_CMD_RNDOUT:
+		addr = host->last_addr + host->last_byte;
+		offs = addr & (FC_BYTES - 1);
+
+		/* At FC_BYTES boundary, switch to next column */
+		if (host->last_byte > 0 && offs == 0)
+			nand_change_read_column_op(chip, addr, NULL, 0, false);
+
+		ret = ctrl->flash_cache[offs];
+		break;
+	case NAND_CMD_GET_FEATURES:
+		if (host->last_byte >= ONFI_SUBFEATURE_PARAM_LEN) {
+			ret = 0;
+		} else {
+			bool last = host->last_byte ==
+				ONFI_SUBFEATURE_PARAM_LEN - 1;
+			brcmnand_low_level_op(host, LL_OP_RD, 0, last);
+			ret = brcmnand_read_reg(ctrl, BRCMNAND_LL_RDATA) & 0xff;
+		}
+	}
+
+	dev_dbg(ctrl->dev, "read byte = 0x%02x\n", ret);
+	host->last_byte++;
+
+	return ret;
+}
+
+static void brcmnand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
+{
+	int i;
+
+	for (i = 0; i < len; i++, buf++)
+		*buf = brcmnand_read_byte(mtd);
+}
+
+static void brcmnand_write_buf(struct mtd_info *mtd, const uint8_t *buf,
+				   int len)
+{
+	int i;
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct brcmnand_host *host = nand_get_controller_data(chip);
+
+	switch (host->last_cmd) {
+	case NAND_CMD_SET_FEATURES:
+		for (i = 0; i < len; i++)
+			brcmnand_low_level_op(host, LL_OP_WR, buf[i],
+						  (i + 1) == len);
+		break;
+	default:
+		BUG();
+		break;
+	}
+}
+
+/**
+ * Construct a FLASH_DMA descriptor as part of a linked list. You must know the
+ * following ahead of time:
+ *  - Is this descriptor the beginning or end of a linked list?
+ *  - What is the (DMA) address of the next descriptor in the linked list?
+ */
+#ifndef __UBOOT__
+static int brcmnand_fill_dma_desc(struct brcmnand_host *host,
+				  struct brcm_nand_dma_desc *desc, u64 addr,
+				  dma_addr_t buf, u32 len, u8 dma_cmd,
+				  bool begin, bool end,
+				  dma_addr_t next_desc)
+{
+	memset(desc, 0, sizeof(*desc));
+	/* Descriptors are written in native byte order (wordwise) */
+	desc->next_desc = lower_32_bits(next_desc);
+	desc->next_desc_ext = upper_32_bits(next_desc);
+	desc->cmd_irq = (dma_cmd << 24) |
+		(end ? (0x03 << 8) : 0) | /* IRQ | STOP */
+		(!!begin) | ((!!end) << 1); /* head, tail */
+#ifdef CONFIG_CPU_BIG_ENDIAN
+	desc->cmd_irq |= 0x01 << 12;
+#endif
+	desc->dram_addr = lower_32_bits(buf);
+	desc->dram_addr_ext = upper_32_bits(buf);
+	desc->tfr_len = len;
+	desc->total_len = len;
+	desc->flash_addr = lower_32_bits(addr);
+	desc->flash_addr_ext = upper_32_bits(addr);
+	desc->cs = host->cs;
+	desc->status_valid = 0x01;
+	return 0;
+}
+
+/**
+ * Kick the FLASH_DMA engine, with a given DMA descriptor
+ */
+static void brcmnand_dma_run(struct brcmnand_host *host, dma_addr_t desc)
+{
+	struct brcmnand_controller *ctrl = host->ctrl;
+	unsigned long timeo = msecs_to_jiffies(100);
+
+	flash_dma_writel(ctrl, FLASH_DMA_FIRST_DESC, lower_32_bits(desc));
+	(void)flash_dma_readl(ctrl, FLASH_DMA_FIRST_DESC);
+	flash_dma_writel(ctrl, FLASH_DMA_FIRST_DESC_EXT, upper_32_bits(desc));
+	(void)flash_dma_readl(ctrl, FLASH_DMA_FIRST_DESC_EXT);
+
+	/* Start FLASH_DMA engine */
+	ctrl->dma_pending = true;
+	mb(); /* flush previous writes */
+	flash_dma_writel(ctrl, FLASH_DMA_CTRL, 0x03); /* wake | run */
+
+	if (wait_for_completion_timeout(&ctrl->dma_done, timeo) <= 0) {
+		dev_err(ctrl->dev,
+				"timeout waiting for DMA; status %#x, error status %#x\n",
+				flash_dma_readl(ctrl, FLASH_DMA_STATUS),
+				flash_dma_readl(ctrl, FLASH_DMA_ERROR_STATUS));
+	}
+	ctrl->dma_pending = false;
+	flash_dma_writel(ctrl, FLASH_DMA_CTRL, 0); /* force stop */
+}
+
+static int brcmnand_dma_trans(struct brcmnand_host *host, u64 addr, u32 *buf,
+			      u32 len, u8 dma_cmd)
+{
+	struct brcmnand_controller *ctrl = host->ctrl;
+	dma_addr_t buf_pa;
+	int dir = dma_cmd == CMD_PAGE_READ ? DMA_FROM_DEVICE : DMA_TO_DEVICE;
+
+	buf_pa = dma_map_single(ctrl->dev, buf, len, dir);
+	if (dma_mapping_error(ctrl->dev, buf_pa)) {
+		dev_err(ctrl->dev, "unable to map buffer for DMA\n");
+		return -ENOMEM;
+	}
+
+	brcmnand_fill_dma_desc(host, ctrl->dma_desc, addr, buf_pa, len,
+				   dma_cmd, true, true, 0);
+
+	brcmnand_dma_run(host, ctrl->dma_pa);
+
+	dma_unmap_single(ctrl->dev, buf_pa, len, dir);
+
+	if (ctrl->dma_desc->status_valid & FLASH_DMA_ECC_ERROR)
+		return -EBADMSG;
+	else if (ctrl->dma_desc->status_valid & FLASH_DMA_CORR_ERROR)
+		return -EUCLEAN;
+
+	return 0;
+}
+#endif /* __UBOOT__ */
+
+/*
+ * Assumes proper CS is already set
+ */
+static int brcmnand_read_by_pio(struct mtd_info *mtd, struct nand_chip *chip,
+				u64 addr, unsigned int trans, u32 *buf,
+				u8 *oob, u64 *err_addr)
+{
+	struct brcmnand_host *host = nand_get_controller_data(chip);
+	struct brcmnand_controller *ctrl = host->ctrl;
+	int i, j, ret = 0;
+
+	/* Clear error addresses */
+	brcmnand_write_reg(ctrl, BRCMNAND_UNCORR_ADDR, 0);
+	brcmnand_write_reg(ctrl, BRCMNAND_CORR_ADDR, 0);
+	brcmnand_write_reg(ctrl, BRCMNAND_UNCORR_EXT_ADDR, 0);
+	brcmnand_write_reg(ctrl, BRCMNAND_CORR_EXT_ADDR, 0);
+
+	brcmnand_write_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS,
+			(host->cs << 16) | ((addr >> 32) & 0xffff));
+	(void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS);
+
+	for (i = 0; i < trans; i++, addr += FC_BYTES) {
+		brcmnand_write_reg(ctrl, BRCMNAND_CMD_ADDRESS,
+				   lower_32_bits(addr));
+		(void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_ADDRESS);
+		/* SPARE_AREA_READ does not use ECC, so just use PAGE_READ */
+		brcmnand_send_cmd(host, CMD_PAGE_READ);
+		brcmnand_waitfunc(mtd, chip);
+
+		if (likely(buf)) {
+			brcmnand_soc_data_bus_prepare(ctrl->soc, false);
+
+			for (j = 0; j < FC_WORDS; j++, buf++)
+				*buf = brcmnand_read_fc(ctrl, j);
+
+			brcmnand_soc_data_bus_unprepare(ctrl->soc, false);
+		}
+
+		if (oob)
+			oob += read_oob_from_regs(ctrl, i, oob,
+					mtd->oobsize / trans,
+					host->hwcfg.sector_size_1k);
+
+		if (!ret) {
+			*err_addr = brcmnand_read_reg(ctrl,
+					BRCMNAND_UNCORR_ADDR) |
+				((u64)(brcmnand_read_reg(ctrl,
+						BRCMNAND_UNCORR_EXT_ADDR)
+					& 0xffff) << 32);
+			if (*err_addr)
+				ret = -EBADMSG;
+		}
+
+		if (!ret) {
+			*err_addr = brcmnand_read_reg(ctrl,
+					BRCMNAND_CORR_ADDR) |
+				((u64)(brcmnand_read_reg(ctrl,
+						BRCMNAND_CORR_EXT_ADDR)
+					& 0xffff) << 32);
+			if (*err_addr)
+				ret = -EUCLEAN;
+		}
+	}
+
+	return ret;
+}
+
+/*
+ * Check a page to see if it is erased (w/ bitflips) after an uncorrectable ECC
+ * error
+ *
+ * Because the HW ECC signals an ECC error if an erase paged has even a single
+ * bitflip, we must check each ECC error to see if it is actually an erased
+ * page with bitflips, not a truly corrupted page.
+ *
+ * On a real error, return a negative error code (-EBADMSG for ECC error), and
+ * buf will contain raw data.
+ * Otherwise, buf gets filled with 0xffs and return the maximum number of
+ * bitflips-per-ECC-sector to the caller.
+ *
+ */
+static int brcmstb_nand_verify_erased_page(struct mtd_info *mtd,
+		  struct nand_chip *chip, void *buf, u64 addr)
+{
+	int i, sas;
+	void *oob = chip->oob_poi;
+	int bitflips = 0;
+	int page = addr >> chip->page_shift;
+	int ret;
+
+	if (!buf) {
+#ifndef __UBOOT__
+		buf = chip->data_buf;
+#else
+		buf = chip->buffers->databuf;
+#endif
+		/* Invalidate page cache */
+		chip->pagebuf = -1;
+	}
+
+	sas = mtd->oobsize / chip->ecc.steps;
+
+	/* read without ecc for verification */
+	ret = chip->ecc.read_page_raw(mtd, chip, buf, true, page);
+	if (ret)
+		return ret;
+
+	for (i = 0; i < chip->ecc.steps; i++, oob += sas) {
+		ret = nand_check_erased_ecc_chunk(buf, chip->ecc.size,
+						  oob, sas, NULL, 0,
+						  chip->ecc.strength);
+		if (ret < 0)
+			return ret;
+
+		bitflips = max(bitflips, ret);
+	}
+
+	return bitflips;
+}
+
+static int brcmnand_read(struct mtd_info *mtd, struct nand_chip *chip,
+			 u64 addr, unsigned int trans, u32 *buf, u8 *oob)
+{
+	struct brcmnand_host *host = nand_get_controller_data(chip);
+	struct brcmnand_controller *ctrl = host->ctrl;
+	u64 err_addr = 0;
+	int err;
+	bool retry = true;
+
+	dev_dbg(ctrl->dev, "read %llx -> %p\n", (unsigned long long)addr, buf);
+
+try_dmaread:
+	brcmnand_write_reg(ctrl, BRCMNAND_UNCORR_COUNT, 0);
+
+#ifndef __UBOOT__
+	if (has_flash_dma(ctrl) && !oob && flash_dma_buf_ok(buf)) {
+		err = brcmnand_dma_trans(host, addr, buf, trans * FC_BYTES,
+					     CMD_PAGE_READ);
+		if (err) {
+			if (mtd_is_bitflip_or_eccerr(err))
+				err_addr = addr;
+			else
+				return -EIO;
+		}
+	} else {
+		if (oob)
+			memset(oob, 0x99, mtd->oobsize);
+
+		err = brcmnand_read_by_pio(mtd, chip, addr, trans, buf,
+					       oob, &err_addr);
+	}
+#else
+	if (oob)
+		memset(oob, 0x99, mtd->oobsize);
+
+	err = brcmnand_read_by_pio(mtd, chip, addr, trans, buf,
+							   oob, &err_addr);
+#endif /* __UBOOT__ */
+
+	if (mtd_is_eccerr(err)) {
+		/*
+		 * On controller version and 7.0, 7.1 , DMA read after a
+		 * prior PIO read that reported uncorrectable error,
+		 * the DMA engine captures this error following DMA read
+		 * cleared only on subsequent DMA read, so just retry once
+		 * to clear a possible false error reported for current DMA
+		 * read
+		 */
+		if ((ctrl->nand_version == 0x0700) ||
+		    (ctrl->nand_version == 0x0701)) {
+			if (retry) {
+				retry = false;
+				goto try_dmaread;
+			}
+		}
+
+		/*
+		 * Controller version 7.2 has hw encoder to detect erased page
+		 * bitflips, apply sw verification for older controllers only
+		 */
+		if (ctrl->nand_version < 0x0702) {
+			err = brcmstb_nand_verify_erased_page(mtd, chip, buf,
+							      addr);
+			/* erased page bitflips corrected */
+			if (err >= 0)
+				return err;
+		}
+
+		dev_dbg(ctrl->dev, "uncorrectable error at 0x%llx\n",
+			(unsigned long long)err_addr);
+		mtd->ecc_stats.failed++;
+		/* NAND layer expects zero on ECC errors */
+		return 0;
+	}
+
+	if (mtd_is_bitflip(err)) {
+		unsigned int corrected = brcmnand_count_corrected(ctrl);
+
+		dev_dbg(ctrl->dev, "corrected error at 0x%llx\n",
+			(unsigned long long)err_addr);
+		mtd->ecc_stats.corrected += corrected;
+		/* Always exceed the software-imposed threshold */
+		return max(mtd->bitflip_threshold, corrected);
+	}
+
+	return 0;
+}
+
+static int brcmnand_read_page(struct mtd_info *mtd, struct nand_chip *chip,
+			      uint8_t *buf, int oob_required, int page)
+{
+	struct brcmnand_host *host = nand_get_controller_data(chip);
+	u8 *oob = oob_required ? (u8 *)chip->oob_poi : NULL;
+
+	nand_read_page_op(chip, page, 0, NULL, 0);
+
+	return brcmnand_read(mtd, chip, host->last_addr,
+			mtd->writesize >> FC_SHIFT, (u32 *)buf, oob);
+}
+
+static int brcmnand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
+				  uint8_t *buf, int oob_required, int page)
+{
+	struct brcmnand_host *host = nand_get_controller_data(chip);
+	u8 *oob = oob_required ? (u8 *)chip->oob_poi : NULL;
+	int ret;
+
+	nand_read_page_op(chip, page, 0, NULL, 0);
+
+	brcmnand_set_ecc_enabled(host, 0);
+	ret = brcmnand_read(mtd, chip, host->last_addr,
+			mtd->writesize >> FC_SHIFT, (u32 *)buf, oob);
+	brcmnand_set_ecc_enabled(host, 1);
+	return ret;
+}
+
+static int brcmnand_read_oob(struct mtd_info *mtd, struct nand_chip *chip,
+			     int page)
+{
+	return brcmnand_read(mtd, chip, (u64)page << chip->page_shift,
+			mtd->writesize >> FC_SHIFT,
+			NULL, (u8 *)chip->oob_poi);
+}
+
+static int brcmnand_read_oob_raw(struct mtd_info *mtd, struct nand_chip *chip,
+				 int page)
+{
+	struct brcmnand_host *host = nand_get_controller_data(chip);
+
+	brcmnand_set_ecc_enabled(host, 0);
+	brcmnand_read(mtd, chip, (u64)page << chip->page_shift,
+		mtd->writesize >> FC_SHIFT,
+		NULL, (u8 *)chip->oob_poi);
+	brcmnand_set_ecc_enabled(host, 1);
+	return 0;
+}
+
+static int brcmnand_write(struct mtd_info *mtd, struct nand_chip *chip,
+			  u64 addr, const u32 *buf, u8 *oob)
+{
+	struct brcmnand_host *host = nand_get_controller_data(chip);
+	struct brcmnand_controller *ctrl = host->ctrl;
+	unsigned int i, j, trans = mtd->writesize >> FC_SHIFT;
+	int status, ret = 0;
+
+	dev_dbg(ctrl->dev, "write %llx <- %p\n", (unsigned long long)addr, buf);
+
+	if (unlikely((unsigned long)buf & 0x03)) {
+		dev_warn(ctrl->dev, "unaligned buffer: %p\n", buf);
+		buf = (u32 *)((unsigned long)buf & ~0x03);
+	}
+
+	brcmnand_wp(mtd, 0);
+
+	for (i = 0; i < ctrl->max_oob; i += 4)
+		oob_reg_write(ctrl, i, 0xffffffff);
+
+#ifndef __UBOOT__
+	if (has_flash_dma(ctrl) && !oob && flash_dma_buf_ok(buf)) {
+		if (brcmnand_dma_trans(host, addr, (u32 *)buf,
+					mtd->writesize, CMD_PROGRAM_PAGE))
+			ret = -EIO;
+		goto out;
+	}
+#endif /* __UBOOT__ */
+
+	brcmnand_write_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS,
+			(host->cs << 16) | ((addr >> 32) & 0xffff));
+	(void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS);
+
+	for (i = 0; i < trans; i++, addr += FC_BYTES) {
+		/* full address MUST be set before populating FC */
+		brcmnand_write_reg(ctrl, BRCMNAND_CMD_ADDRESS,
+				   lower_32_bits(addr));
+		(void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_ADDRESS);
+
+		if (buf) {
+			brcmnand_soc_data_bus_prepare(ctrl->soc, false);
+
+			for (j = 0; j < FC_WORDS; j++, buf++)
+				brcmnand_write_fc(ctrl, j, *buf);
+
+			brcmnand_soc_data_bus_unprepare(ctrl->soc, false);
+		} else if (oob) {
+			for (j = 0; j < FC_WORDS; j++)
+				brcmnand_write_fc(ctrl, j, 0xffffffff);
+		}
+
+		if (oob) {
+			oob += write_oob_to_regs(ctrl, i, oob,
+					mtd->oobsize / trans,
+					host->hwcfg.sector_size_1k);
+		}
+
+		/* we cannot use SPARE_AREA_PROGRAM when PARTIAL_PAGE_EN=0 */
+		brcmnand_send_cmd(host, CMD_PROGRAM_PAGE);
+		status = brcmnand_waitfunc(mtd, chip);
+
+		if (status & NAND_STATUS_FAIL) {
+			dev_info(ctrl->dev, "program failed at %llx\n",
+				(unsigned long long)addr);
+			ret = -EIO;
+			goto out;
+		}
+	}
+out:
+	brcmnand_wp(mtd, 1);
+	return ret;
+}
+
+static int brcmnand_write_page(struct mtd_info *mtd, struct nand_chip *chip,
+			       const uint8_t *buf, int oob_required, int page)
+{
+	struct brcmnand_host *host = nand_get_controller_data(chip);
+	void *oob = oob_required ? chip->oob_poi : NULL;
+
+	nand_prog_page_begin_op(chip, page, 0, NULL, 0);
+	brcmnand_write(mtd, chip, host->last_addr, (const u32 *)buf, oob);
+
+	return nand_prog_page_end_op(chip);
+}
+
+static int brcmnand_write_page_raw(struct mtd_info *mtd,
+				   struct nand_chip *chip, const uint8_t *buf,
+				   int oob_required, int page)
+{
+	struct brcmnand_host *host = nand_get_controller_data(chip);
+	void *oob = oob_required ? chip->oob_poi : NULL;
+
+	nand_prog_page_begin_op(chip, page, 0, NULL, 0);
+	brcmnand_set_ecc_enabled(host, 0);
+	brcmnand_write(mtd, chip, host->last_addr, (const u32 *)buf, oob);
+	brcmnand_set_ecc_enabled(host, 1);
+
+	return nand_prog_page_end_op(chip);
+}
+
+static int brcmnand_write_oob(struct mtd_info *mtd, struct nand_chip *chip,
+				  int page)
+{
+	return brcmnand_write(mtd, chip, (u64)page << chip->page_shift,
+				  NULL, chip->oob_poi);
+}
+
+static int brcmnand_write_oob_raw(struct mtd_info *mtd, struct nand_chip *chip,
+				  int page)
+{
+	struct brcmnand_host *host = nand_get_controller_data(chip);
+	int ret;
+
+	brcmnand_set_ecc_enabled(host, 0);
+	ret = brcmnand_write(mtd, chip, (u64)page << chip->page_shift, NULL,
+				 (u8 *)chip->oob_poi);
+	brcmnand_set_ecc_enabled(host, 1);
+
+	return ret;
+}
+
+/***********************************************************************
+ * Per-CS setup (1 NAND device)
+ ***********************************************************************/
+
+static int brcmnand_set_cfg(struct brcmnand_host *host,
+			    struct brcmnand_cfg *cfg)
+{
+	struct brcmnand_controller *ctrl = host->ctrl;
+	struct nand_chip *chip = &host->chip;
+	u16 cfg_offs = brcmnand_cs_offset(ctrl, host->cs, BRCMNAND_CS_CFG);
+	u16 cfg_ext_offs = brcmnand_cs_offset(ctrl, host->cs,
+			BRCMNAND_CS_CFG_EXT);
+	u16 acc_control_offs = brcmnand_cs_offset(ctrl, host->cs,
+			BRCMNAND_CS_ACC_CONTROL);
+	u8 block_size = 0, page_size = 0, device_size = 0;
+	u32 tmp;
+
+	if (ctrl->block_sizes) {
+		int i, found;
+
+		for (i = 0, found = 0; ctrl->block_sizes[i]; i++)
+			if (ctrl->block_sizes[i] * 1024 == cfg->block_size) {
+				block_size = i;
+				found = 1;
+			}
+		if (!found) {
+			dev_warn(ctrl->dev, "invalid block size %u\n",
+					cfg->block_size);
+			return -EINVAL;
+		}
+	} else {
+		block_size = ffs(cfg->block_size) - ffs(BRCMNAND_MIN_BLOCKSIZE);
+	}
+
+	if (cfg->block_size < BRCMNAND_MIN_BLOCKSIZE || (ctrl->max_block_size &&
+				cfg->block_size > ctrl->max_block_size)) {
+		dev_warn(ctrl->dev, "invalid block size %u\n",
+				cfg->block_size);
+		block_size = 0;
+	}
+
+	if (ctrl->page_sizes) {
+		int i, found;
+
+		for (i = 0, found = 0; ctrl->page_sizes[i]; i++)
+			if (ctrl->page_sizes[i] == cfg->page_size) {
+				page_size = i;
+				found = 1;
+			}
+		if (!found) {
+			dev_warn(ctrl->dev, "invalid page size %u\n",
+					cfg->page_size);
+			return -EINVAL;
+		}
+	} else {
+		page_size = ffs(cfg->page_size) - ffs(BRCMNAND_MIN_PAGESIZE);
+	}
+
+	if (cfg->page_size < BRCMNAND_MIN_PAGESIZE || (ctrl->max_page_size &&
+				cfg->page_size > ctrl->max_page_size)) {
+		dev_warn(ctrl->dev, "invalid page size %u\n", cfg->page_size);
+		return -EINVAL;
+	}
+
+	if (fls64(cfg->device_size) < fls64(BRCMNAND_MIN_DEVSIZE)) {
+		dev_warn(ctrl->dev, "invalid device size 0x%llx\n",
+			(unsigned long long)cfg->device_size);
+		return -EINVAL;
+	}
+	device_size = fls64(cfg->device_size) - fls64(BRCMNAND_MIN_DEVSIZE);
+
+	tmp = (cfg->blk_adr_bytes << CFG_BLK_ADR_BYTES_SHIFT) |
+		(cfg->col_adr_bytes << CFG_COL_ADR_BYTES_SHIFT) |
+		(cfg->ful_adr_bytes << CFG_FUL_ADR_BYTES_SHIFT) |
+		(!!(cfg->device_width == 16) << CFG_BUS_WIDTH_SHIFT) |
+		(device_size << CFG_DEVICE_SIZE_SHIFT);
+	if (cfg_offs == cfg_ext_offs) {
+		tmp |= (page_size << CFG_PAGE_SIZE_SHIFT) |
+		       (block_size << CFG_BLK_SIZE_SHIFT);
+		nand_writereg(ctrl, cfg_offs, tmp);
+	} else {
+		nand_writereg(ctrl, cfg_offs, tmp);
+		tmp = (page_size << CFG_EXT_PAGE_SIZE_SHIFT) |
+		      (block_size << CFG_EXT_BLK_SIZE_SHIFT);
+		nand_writereg(ctrl, cfg_ext_offs, tmp);
+	}
+
+	tmp = nand_readreg(ctrl, acc_control_offs);
+	tmp &= ~brcmnand_ecc_level_mask(ctrl);
+	tmp |= cfg->ecc_level << NAND_ACC_CONTROL_ECC_SHIFT;
+	tmp &= ~brcmnand_spare_area_mask(ctrl);
+	tmp |= cfg->spare_area_size;
+	nand_writereg(ctrl, acc_control_offs, tmp);
+
+	brcmnand_set_sector_size_1k(host, cfg->sector_size_1k);
+
+	/* threshold = ceil(BCH-level * 0.75) */
+	brcmnand_wr_corr_thresh(host, DIV_ROUND_UP(chip->ecc.strength * 3, 4));
+
+	return 0;
+}
+
+static void brcmnand_print_cfg(struct brcmnand_host *host,
+			       char *buf, struct brcmnand_cfg *cfg)
+{
+	buf += sprintf(buf,
+		"%lluMiB total, %uKiB blocks, %u%s pages, %uB OOB, %u-bit",
+		(unsigned long long)cfg->device_size >> 20,
+		cfg->block_size >> 10,
+		cfg->page_size >= 1024 ? cfg->page_size >> 10 : cfg->page_size,
+		cfg->page_size >= 1024 ? "KiB" : "B",
+		cfg->spare_area_size, cfg->device_width);
+
+	/* Account for Hamming ECC and for BCH 512B vs 1KiB sectors */
+	if (is_hamming_ecc(host->ctrl, cfg))
+		sprintf(buf, ", Hamming ECC");
+	else if (cfg->sector_size_1k)
+		sprintf(buf, ", BCH-%u (1KiB sector)", cfg->ecc_level << 1);
+	else
+		sprintf(buf, ", BCH-%u", cfg->ecc_level);
+}
+
+/*
+ * Minimum number of bytes to address a page. Calculated as:
+ *     roundup(log2(size / page-size) / 8)
+ *
+ * NB: the following does not "round up" for non-power-of-2 'size'; but this is
+ *     OK because many other things will break if 'size' is irregular...
+ */
+static inline int get_blk_adr_bytes(u64 size, u32 writesize)
+{
+	return ALIGN(ilog2(size) - ilog2(writesize), 8) >> 3;
+}
+
+static int brcmnand_setup_dev(struct brcmnand_host *host)
+{
+	struct mtd_info *mtd = nand_to_mtd(&host->chip);
+	struct nand_chip *chip = &host->chip;
+	struct brcmnand_controller *ctrl = host->ctrl;
+	struct brcmnand_cfg *cfg = &host->hwcfg;
+	char msg[128];
+	u32 offs, tmp, oob_sector;
+	int ret;
+
+	memset(cfg, 0, sizeof(*cfg));
+
+#ifndef __UBOOT__
+	ret = of_property_read_u32(nand_get_flash_node(chip),
+				   "brcm,nand-oob-sector-size",
+				   &oob_sector);
+#else
+	ret = ofnode_read_u32(nand_get_flash_node(chip),
+			      "brcm,nand-oob-sector-size",
+			      &oob_sector);
+#endif /* __UBOOT__ */
+	if (ret) {
+		/* Use detected size */
+		cfg->spare_area_size = mtd->oobsize /
+					(mtd->writesize >> FC_SHIFT);
+	} else {
+		cfg->spare_area_size = oob_sector;
+	}
+	if (cfg->spare_area_size > ctrl->max_oob)
+		cfg->spare_area_size = ctrl->max_oob;
+	/*
+	 * Set oobsize to be consistent with controller's spare_area_size, as
+	 * the rest is inaccessible.
+	 */
+	mtd->oobsize = cfg->spare_area_size * (mtd->writesize >> FC_SHIFT);
+
+	cfg->device_size = mtd->size;
+	cfg->block_size = mtd->erasesize;
+	cfg->page_size = mtd->writesize;
+	cfg->device_width = (chip->options & NAND_BUSWIDTH_16) ? 16 : 8;
+	cfg->col_adr_bytes = 2;
+	cfg->blk_adr_bytes = get_blk_adr_bytes(mtd->size, mtd->writesize);
+
+	if (chip->ecc.mode != NAND_ECC_HW) {
+		dev_err(ctrl->dev, "only HW ECC supported; selected: %d\n",
+			chip->ecc.mode);
+		return -EINVAL;
+	}
+
+	if (chip->ecc.algo == NAND_ECC_UNKNOWN) {
+		if (chip->ecc.strength == 1 && chip->ecc.size == 512)
+			/* Default to Hamming for 1-bit ECC, if unspecified */
+			chip->ecc.algo = NAND_ECC_HAMMING;
+		else
+			/* Otherwise, BCH */
+			chip->ecc.algo = NAND_ECC_BCH;
+	}
+
+	if (chip->ecc.algo == NAND_ECC_HAMMING && (chip->ecc.strength != 1 ||
+						   chip->ecc.size != 512)) {
+		dev_err(ctrl->dev, "invalid Hamming params: %d bits per %d bytes\n",
+			chip->ecc.strength, chip->ecc.size);
+		return -EINVAL;
+	}
+
+	switch (chip->ecc.size) {
+	case 512:
+		if (chip->ecc.algo == NAND_ECC_HAMMING)
+			cfg->ecc_level = 15;
+		else
+			cfg->ecc_level = chip->ecc.strength;
+		cfg->sector_size_1k = 0;
+		break;
+	case 1024:
+		if (!(ctrl->features & BRCMNAND_HAS_1K_SECTORS)) {
+			dev_err(ctrl->dev, "1KB sectors not supported\n");
+			return -EINVAL;
+		}
+		if (chip->ecc.strength & 0x1) {
+			dev_err(ctrl->dev,
+				"odd ECC not supported with 1KB sectors\n");
+			return -EINVAL;
+		}
+
+		cfg->ecc_level = chip->ecc.strength >> 1;
+		cfg->sector_size_1k = 1;
+		break;
+	default:
+		dev_err(ctrl->dev, "unsupported ECC size: %d\n",
+			chip->ecc.size);
+		return -EINVAL;
+	}
+
+	cfg->ful_adr_bytes = cfg->blk_adr_bytes;
+	if (mtd->writesize > 512)
+		cfg->ful_adr_bytes += cfg->col_adr_bytes;
+	else
+		cfg->ful_adr_bytes += 1;
+
+	ret = brcmnand_set_cfg(host, cfg);
+	if (ret)
+		return ret;
+
+	brcmnand_set_ecc_enabled(host, 1);
+
+	brcmnand_print_cfg(host, msg, cfg);
+	dev_info(ctrl->dev, "detected %s\n", msg);
+
+	/* Configure ACC_CONTROL */
+	offs = brcmnand_cs_offset(ctrl, host->cs, BRCMNAND_CS_ACC_CONTROL);
+	tmp = nand_readreg(ctrl, offs);
+	tmp &= ~ACC_CONTROL_PARTIAL_PAGE;
+	tmp &= ~ACC_CONTROL_RD_ERASED;
+
+	/* We need to turn on Read from erased paged protected by ECC */
+	if (ctrl->nand_version >= 0x0702)
+		tmp |= ACC_CONTROL_RD_ERASED;
+	tmp &= ~ACC_CONTROL_FAST_PGM_RDIN;
+	if (ctrl->features & BRCMNAND_HAS_PREFETCH)
+		tmp &= ~ACC_CONTROL_PREFETCH;
+
+	nand_writereg(ctrl, offs, tmp);
+
+	return 0;
+}
+
+#ifndef __UBOOT__
+static int brcmnand_init_cs(struct brcmnand_host *host, struct device_node *dn)
+#else
+static int brcmnand_init_cs(struct brcmnand_host *host, ofnode dn)
+#endif
+{
+	struct brcmnand_controller *ctrl = host->ctrl;
+#ifndef __UBOOT__
+	struct platform_device *pdev = host->pdev;
+#else
+	struct udevice *pdev = host->pdev;
+#endif /* __UBOOT__ */
+	struct mtd_info *mtd;
+	struct nand_chip *chip;
+	int ret;
+	u16 cfg_offs;
+
+#ifndef __UBOOT__
+	ret = of_property_read_u32(dn, "reg", &host->cs);
+#else
+	ret = ofnode_read_s32(dn, "reg", &host->cs);
+#endif
+	if (ret) {
+		dev_err(&pdev->dev, "can't get chip-select\n");
+		return -ENXIO;
+	}
+
+	mtd = nand_to_mtd(&host->chip);
+	chip = &host->chip;
+
+	nand_set_flash_node(chip, dn);
+	nand_set_controller_data(chip, host);
+#ifndef __UBOOT__
+	mtd->name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "brcmnand.%d",
+				   host->cs);
+#else
+	mtd->name = devm_kasprintf(pdev, GFP_KERNEL, "brcmnand.%d",
+				   host->cs);
+#endif /* __UBOOT__ */
+	if (!mtd->name)
+		return -ENOMEM;
+
+	mtd->owner = THIS_MODULE;
+#ifndef __UBOOT__
+	mtd->dev.parent = &pdev->dev;
+#else
+	mtd->dev->parent = pdev;
+#endif /* __UBOOT__ */
+
+	chip->IO_ADDR_R = (void __iomem *)0xdeadbeef;
+	chip->IO_ADDR_W = (void __iomem *)0xdeadbeef;
+
+	chip->cmd_ctrl = brcmnand_cmd_ctrl;
+	chip->cmdfunc = brcmnand_cmdfunc;
+	chip->waitfunc = brcmnand_waitfunc;
+	chip->read_byte = brcmnand_read_byte;
+	chip->read_buf = brcmnand_read_buf;
+	chip->write_buf = brcmnand_write_buf;
+
+	chip->ecc.mode = NAND_ECC_HW;
+	chip->ecc.read_page = brcmnand_read_page;
+	chip->ecc.write_page = brcmnand_write_page;
+	chip->ecc.read_page_raw = brcmnand_read_page_raw;
+	chip->ecc.write_page_raw = brcmnand_write_page_raw;
+	chip->ecc.write_oob_raw = brcmnand_write_oob_raw;
+	chip->ecc.read_oob_raw = brcmnand_read_oob_raw;
+	chip->ecc.read_oob = brcmnand_read_oob;
+	chip->ecc.write_oob = brcmnand_write_oob;
+
+	chip->controller = &ctrl->controller;
+
+	/*
+	 * The bootloader might have configured 16bit mode but
+	 * NAND READID command only works in 8bit mode. We force
+	 * 8bit mode here to ensure that NAND READID commands works.
+	 */
+	cfg_offs = brcmnand_cs_offset(ctrl, host->cs, BRCMNAND_CS_CFG);
+	nand_writereg(ctrl, cfg_offs,
+		      nand_readreg(ctrl, cfg_offs) & ~CFG_BUS_WIDTH);
+
+	ret = nand_scan_ident(mtd, 1, NULL);
+	if (ret)
+		return ret;
+
+	chip->options |= NAND_NO_SUBPAGE_WRITE;
+	/*
+	 * Avoid (for instance) kmap()'d buffers from JFFS2, which we can't DMA
+	 * to/from, and have nand_base pass us a bounce buffer instead, as
+	 * needed.
+	 */
+	chip->options |= NAND_USE_BOUNCE_BUFFER;
+
+	if (chip->bbt_options & NAND_BBT_USE_FLASH)
+		chip->bbt_options |= NAND_BBT_NO_OOB;
+
+	if (brcmnand_setup_dev(host))
+		return -ENXIO;
+
+	chip->ecc.size = host->hwcfg.sector_size_1k ? 1024 : 512;
+	/* only use our internal HW threshold */
+	mtd->bitflip_threshold = 1;
+
+	ret = brcmstb_choose_ecc_layout(host);
+	if (ret)
+		return ret;
+
+	ret = nand_scan_tail(mtd);
+	if (ret)
+		return ret;
+
+#ifndef __UBOOT__
+	ret = mtd_device_register(mtd, NULL, 0);
+	if (ret)
+		nand_cleanup(chip);
+#else
+	ret = nand_register(0, mtd);
+#endif /* __UBOOT__ */
+
+	return ret;
+}
+
+#ifndef __UBOOT__
+static void brcmnand_save_restore_cs_config(struct brcmnand_host *host,
+					    int restore)
+{
+	struct brcmnand_controller *ctrl = host->ctrl;
+	u16 cfg_offs = brcmnand_cs_offset(ctrl, host->cs, BRCMNAND_CS_CFG);
+	u16 cfg_ext_offs = brcmnand_cs_offset(ctrl, host->cs,
+			BRCMNAND_CS_CFG_EXT);
+	u16 acc_control_offs = brcmnand_cs_offset(ctrl, host->cs,
+			BRCMNAND_CS_ACC_CONTROL);
+	u16 t1_offs = brcmnand_cs_offset(ctrl, host->cs, BRCMNAND_CS_TIMING1);
+	u16 t2_offs = brcmnand_cs_offset(ctrl, host->cs, BRCMNAND_CS_TIMING2);
+
+	if (restore) {
+		nand_writereg(ctrl, cfg_offs, host->hwcfg.config);
+		if (cfg_offs != cfg_ext_offs)
+			nand_writereg(ctrl, cfg_ext_offs,
+				      host->hwcfg.config_ext);
+		nand_writereg(ctrl, acc_control_offs, host->hwcfg.acc_control);
+		nand_writereg(ctrl, t1_offs, host->hwcfg.timing_1);
+		nand_writereg(ctrl, t2_offs, host->hwcfg.timing_2);
+	} else {
+		host->hwcfg.config = nand_readreg(ctrl, cfg_offs);
+		if (cfg_offs != cfg_ext_offs)
+			host->hwcfg.config_ext =
+				nand_readreg(ctrl, cfg_ext_offs);
+		host->hwcfg.acc_control = nand_readreg(ctrl, acc_control_offs);
+		host->hwcfg.timing_1 = nand_readreg(ctrl, t1_offs);
+		host->hwcfg.timing_2 = nand_readreg(ctrl, t2_offs);
+	}
+}
+
+static int brcmnand_suspend(struct device *dev)
+{
+	struct brcmnand_controller *ctrl = dev_get_drvdata(dev);
+	struct brcmnand_host *host;
+
+	list_for_each_entry(host, &ctrl->host_list, node)
+		brcmnand_save_restore_cs_config(host, 0);
+
+	ctrl->nand_cs_nand_select = brcmnand_read_reg(ctrl, BRCMNAND_CS_SELECT);
+	ctrl->nand_cs_nand_xor = brcmnand_read_reg(ctrl, BRCMNAND_CS_XOR);
+	ctrl->corr_stat_threshold =
+		brcmnand_read_reg(ctrl, BRCMNAND_CORR_THRESHOLD);
+
+	if (has_flash_dma(ctrl))
+		ctrl->flash_dma_mode = flash_dma_readl(ctrl, FLASH_DMA_MODE);
+
+	return 0;
+}
+
+static int brcmnand_resume(struct device *dev)
+{
+	struct brcmnand_controller *ctrl = dev_get_drvdata(dev);
+	struct brcmnand_host *host;
+
+	if (has_flash_dma(ctrl)) {
+		flash_dma_writel(ctrl, FLASH_DMA_MODE, ctrl->flash_dma_mode);
+		flash_dma_writel(ctrl, FLASH_DMA_ERROR_STATUS, 0);
+	}
+
+	brcmnand_write_reg(ctrl, BRCMNAND_CS_SELECT, ctrl->nand_cs_nand_select);
+	brcmnand_write_reg(ctrl, BRCMNAND_CS_XOR, ctrl->nand_cs_nand_xor);
+	brcmnand_write_reg(ctrl, BRCMNAND_CORR_THRESHOLD,
+			ctrl->corr_stat_threshold);
+	if (ctrl->soc) {
+		/* Clear/re-enable interrupt */
+		ctrl->soc->ctlrdy_ack(ctrl->soc);
+		ctrl->soc->ctlrdy_set_enabled(ctrl->soc, true);
+	}
+
+	list_for_each_entry(host, &ctrl->host_list, node) {
+		struct nand_chip *chip = &host->chip;
+
+		brcmnand_save_restore_cs_config(host, 1);
+
+		/* Reset the chip, required by some chips after power-up */
+		nand_reset_op(chip);
+	}
+
+	return 0;
+}
+
+const struct dev_pm_ops brcmnand_pm_ops = {
+	.suspend		= brcmnand_suspend,
+	.resume			= brcmnand_resume,
+};
+EXPORT_SYMBOL_GPL(brcmnand_pm_ops);
+
+static const struct of_device_id brcmnand_of_match[] = {
+	{ .compatible = "brcm,brcmnand-v4.0" },
+	{ .compatible = "brcm,brcmnand-v5.0" },
+	{ .compatible = "brcm,brcmnand-v6.0" },
+	{ .compatible = "brcm,brcmnand-v6.1" },
+	{ .compatible = "brcm,brcmnand-v6.2" },
+	{ .compatible = "brcm,brcmnand-v7.0" },
+	{ .compatible = "brcm,brcmnand-v7.1" },
+	{ .compatible = "brcm,brcmnand-v7.2" },
+	{},
+};
+MODULE_DEVICE_TABLE(of, brcmnand_of_match);
+#endif  /* __UBOOT__ */
+
+/***********************************************************************
+ * Platform driver setup (per controller)
+ ***********************************************************************/
+
+#ifndef __UBOOT__
+int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc)
+#else
+int brcmnand_probe(struct udevice *dev, struct brcmnand_soc *soc)
+#endif /* __UBOOT__ */
+{
+#ifndef __UBOOT__
+	struct device *dev = &pdev->dev;
+	struct device_node *dn = dev->of_node, *child;
+#else
+	ofnode child;
+	struct udevice *pdev = dev;
+#endif /* __UBOOT__ */
+	struct brcmnand_controller *ctrl;
+#ifndef __UBOOT__
+	struct resource *res;
+#else
+	struct resource res;
+#endif /* __UBOOT__ */
+	int ret;
+
+#ifndef __UBOOT__
+	/* We only support device-tree instantiation */
+	if (!dn)
+		return -ENODEV;
+
+	if (!of_match_node(brcmnand_of_match, dn))
+		return -ENODEV;
+#endif /* __UBOOT__ */
+
+	ctrl = devm_kzalloc(dev, sizeof(*ctrl), GFP_KERNEL);
+	if (!ctrl)
+		return -ENOMEM;
+
+#ifndef __UBOOT__
+	dev_set_drvdata(dev, ctrl);
+#else
+	/*
+	 * in u-boot, the data for the driver is allocated before probing
+	 * so to keep the reference to ctrl, we store it in the variable soc
+	 */
+	soc->ctrl = ctrl;
+#endif /* __UBOOT__ */
+	ctrl->dev = dev;
+
+	init_completion(&ctrl->done);
+	init_completion(&ctrl->dma_done);
+	nand_hw_control_init(&ctrl->controller);
+	INIT_LIST_HEAD(&ctrl->host_list);
+
+	/* NAND register range */
+#ifndef __UBOOT__
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	ctrl->nand_base = devm_ioremap_resource(dev, res);
+#else
+	dev_read_resource(pdev, 0, &res);
+	ctrl->nand_base = devm_ioremap(pdev, res.start, resource_size(&res));
+#endif
+	if (IS_ERR(ctrl->nand_base))
+		return PTR_ERR(ctrl->nand_base);
+
+	/* Enable clock before using NAND registers */
+	ctrl->clk = devm_clk_get(dev, "nand");
+	if (!IS_ERR(ctrl->clk)) {
+		ret = clk_prepare_enable(ctrl->clk);
+		if (ret)
+			return ret;
+	} else {
+		ret = PTR_ERR(ctrl->clk);
+		if (ret == -EPROBE_DEFER)
+			return ret;
+
+		ctrl->clk = NULL;
+	}
+
+	/* Initialize NAND revision */
+	ret = brcmnand_revision_init(ctrl);
+	if (ret)
+		goto err;
+
+	/*
+	 * Most chips have this cache at a fixed offset within 'nand' block.
+	 * Some must specify this region separately.
+	 */
+#ifndef __UBOOT__
+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "nand-cache");
+	if (res) {
+		ctrl->nand_fc = devm_ioremap_resource(dev, res);
+		if (IS_ERR(ctrl->nand_fc)) {
+			ret = PTR_ERR(ctrl->nand_fc);
+			goto err;
+		}
+	} else {
+		ctrl->nand_fc = ctrl->nand_base +
+				ctrl->reg_offsets[BRCMNAND_FC_BASE];
+	}
+#else
+	if (!dev_read_resource_byname(pdev, "nand-cache", &res)) {
+		ctrl->nand_fc = devm_ioremap(dev, res.start,
+					     resource_size(&res));
+		if (IS_ERR(ctrl->nand_fc)) {
+			ret = PTR_ERR(ctrl->nand_fc);
+			goto err;
+		}
+	} else {
+		ctrl->nand_fc = ctrl->nand_base +
+				ctrl->reg_offsets[BRCMNAND_FC_BASE];
+	}
+#endif
+
+#ifndef __UBOOT__
+	/* FLASH_DMA */
+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "flash-dma");
+	if (res) {
+		ctrl->flash_dma_base = devm_ioremap_resource(dev, res);
+		if (IS_ERR(ctrl->flash_dma_base)) {
+			ret = PTR_ERR(ctrl->flash_dma_base);
+			goto err;
+		}
+
+		flash_dma_writel(ctrl, FLASH_DMA_MODE, 1); /* linked-list */
+		flash_dma_writel(ctrl, FLASH_DMA_ERROR_STATUS, 0);
+
+		/* Allocate descriptor(s) */
+		ctrl->dma_desc = dmam_alloc_coherent(dev,
+						     sizeof(*ctrl->dma_desc),
+						     &ctrl->dma_pa, GFP_KERNEL);
+		if (!ctrl->dma_desc) {
+			ret = -ENOMEM;
+			goto err;
+		}
+
+		ctrl->dma_irq = platform_get_irq(pdev, 1);
+		if ((int)ctrl->dma_irq < 0) {
+			dev_err(dev, "missing FLASH_DMA IRQ\n");
+			ret = -ENODEV;
+			goto err;
+		}
+
+		ret = devm_request_irq(dev, ctrl->dma_irq,
+				brcmnand_dma_irq, 0, DRV_NAME,
+				ctrl);
+		if (ret < 0) {
+			dev_err(dev, "can't allocate IRQ %d: error %d\n",
+					ctrl->dma_irq, ret);
+			goto err;
+		}
+
+		dev_info(dev, "enabling FLASH_DMA\n");
+	}
+#endif /* __UBOOT__ */
+
+	/* Disable automatic device ID config, direct addressing */
+	brcmnand_rmw_reg(ctrl, BRCMNAND_CS_SELECT,
+			 CS_SELECT_AUTO_DEVICE_ID_CFG | 0xff, 0, 0);
+	/* Disable XOR addressing */
+	brcmnand_rmw_reg(ctrl, BRCMNAND_CS_XOR, 0xff, 0, 0);
+
+	if (ctrl->features & BRCMNAND_HAS_WP) {
+		/* Permanently disable write protection */
+		if (wp_on == 2)
+			brcmnand_set_wp(ctrl, false);
+	} else {
+		wp_on = 0;
+	}
+
+#ifndef __UBOOT__
+	/* IRQ */
+	ctrl->irq = platform_get_irq(pdev, 0);
+	if ((int)ctrl->irq < 0) {
+		dev_err(dev, "no IRQ defined\n");
+		ret = -ENODEV;
+		goto err;
+	}
+
+	/*
+	 * Some SoCs integrate this controller (e.g., its interrupt bits) in
+	 * interesting ways
+	 */
+	if (soc) {
+		ctrl->soc = soc;
+
+		ret = devm_request_irq(dev, ctrl->irq, brcmnand_irq, 0,
+				       DRV_NAME, ctrl);
+
+		/* Enable interrupt */
+		ctrl->soc->ctlrdy_ack(ctrl->soc);
+		ctrl->soc->ctlrdy_set_enabled(ctrl->soc, true);
+	} else {
+		/* Use standard interrupt infrastructure */
+		ret = devm_request_irq(dev, ctrl->irq, brcmnand_ctlrdy_irq, 0,
+				       DRV_NAME, ctrl);
+	}
+	if (ret < 0) {
+		dev_err(dev, "can't allocate IRQ %d: error %d\n",
+			ctrl->irq, ret);
+		goto err;
+	}
+#endif /* __UBOOT__ */
+
+#ifndef __UBOOT__
+	for_each_available_child_of_node(dn, child) {
+		if (of_device_is_compatible(child, "brcm,nandcs")) {
+			struct brcmnand_host *host;
+
+			host = devm_kzalloc(dev, sizeof(*host), GFP_KERNEL);
+			if (!host) {
+				of_node_put(child);
+				ret = -ENOMEM;
+				goto err;
+			}
+			host->pdev = pdev;
+			host->ctrl = ctrl;
+
+			ret = brcmnand_init_cs(host, child);
+			if (ret) {
+				devm_kfree(dev, host);
+				continue; /* Try all chip-selects */
+			}
+
+			list_add_tail(&host->node, &ctrl->host_list);
+		}
+	}
+#else
+	ofnode_for_each_subnode(child, dev_ofnode(dev)) {
+		if (ofnode_device_is_compatible(child, "brcm,nandcs")) {
+			struct brcmnand_host *host;
+
+			host = devm_kzalloc(dev, sizeof(*host), GFP_KERNEL);
+			if (!host) {
+				ret = -ENOMEM;
+				goto err;
+			}
+			host->pdev = pdev;
+			host->ctrl = ctrl;
+
+			ret = brcmnand_init_cs(host, child);
+			if (ret) {
+				devm_kfree(dev, host);
+				continue; /* Try all chip-selects */
+			}
+
+			list_add_tail(&host->node, &ctrl->host_list);
+		}
+	}
+#endif /* __UBOOT__ */
+
+err:
+#ifndef __UBOOT__
+	clk_disable_unprepare(ctrl->clk);
+#else
+	if (ctrl->clk)
+		clk_disable(ctrl->clk);
+#endif /* __UBOOT__ */
+	return ret;
+
+}
+EXPORT_SYMBOL_GPL(brcmnand_probe);
+
+#ifndef __UBOOT__
+int brcmnand_remove(struct platform_device *pdev)
+{
+	struct brcmnand_controller *ctrl = dev_get_drvdata(&pdev->dev);
+	struct brcmnand_host *host;
+
+	list_for_each_entry(host, &ctrl->host_list, node)
+		nand_release(nand_to_mtd(&host->chip));
+
+	clk_disable_unprepare(ctrl->clk);
+
+	dev_set_drvdata(&pdev->dev, NULL);
+
+	return 0;
+}
+#else
+int brcmnand_remove(struct udevice *pdev)
+{
+	return 0;
+}
+#endif /* __UBOOT__ */
+EXPORT_SYMBOL_GPL(brcmnand_remove);
+
+MODULE_LICENSE("GPL v2");
+MODULE_AUTHOR("Kevin Cernekee");
+MODULE_AUTHOR("Brian Norris");
+MODULE_DESCRIPTION("NAND driver for Broadcom chips");
+MODULE_ALIAS("platform:brcmnand");
diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.h b/drivers/mtd/nand/raw/brcmnand/brcmnand.h
new file mode 100644
index 0000000000..6946a62b06
--- /dev/null
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.h
@@ -0,0 +1,63 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#ifndef __BRCMNAND_H__
+#define __BRCMNAND_H__
+
+#include <linux/types.h>
+#include <linux/io.h>
+
+struct brcmnand_soc {
+	bool (*ctlrdy_ack)(struct brcmnand_soc *soc);
+	void (*ctlrdy_set_enabled)(struct brcmnand_soc *soc, bool en);
+	void (*prepare_data_bus)(struct brcmnand_soc *soc, bool prepare,
+				 bool is_param);
+	void *ctrl;
+};
+
+static inline void brcmnand_soc_data_bus_prepare(struct brcmnand_soc *soc,
+						 bool is_param)
+{
+	if (soc && soc->prepare_data_bus)
+		soc->prepare_data_bus(soc, true, is_param);
+}
+
+static inline void brcmnand_soc_data_bus_unprepare(struct brcmnand_soc *soc,
+						   bool is_param)
+{
+	if (soc && soc->prepare_data_bus)
+		soc->prepare_data_bus(soc, false, is_param);
+}
+
+static inline u32 brcmnand_readl(void __iomem *addr)
+{
+	/*
+	 * MIPS endianness is configured by boot strap, which also reverses all
+	 * bus endianness (i.e., big-endian CPU + big endian bus ==> native
+	 * endian I/O).
+	 *
+	 * Other architectures (e.g., ARM) either do not support big endian, or
+	 * else leave I/O in little endian mode.
+	 */
+	if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_SYS_BIG_ENDIAN))
+		return __raw_readl(addr);
+	else
+		return readl_relaxed(addr);
+}
+
+static inline void brcmnand_writel(u32 val, void __iomem *addr)
+{
+	/* See brcmnand_readl() comments */
+	if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_SYS_BIG_ENDIAN))
+		__raw_writel(val, addr);
+	else
+		writel_relaxed(val, addr);
+}
+
+int brcmnand_probe(struct udevice *dev, struct brcmnand_soc *soc);
+int brcmnand_remove(struct udevice *dev);
+
+#ifndef __UBOOT__
+extern const struct dev_pm_ops brcmnand_pm_ops;
+#endif /* __UBOOT__ */
+
+#endif /* __BRCMNAND_H__ */
diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand_compat.c b/drivers/mtd/nand/raw/brcmnand/brcmnand_compat.c
new file mode 100644
index 0000000000..96b27e6e5a
--- /dev/null
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand_compat.c
@@ -0,0 +1,66 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include <common.h>
+#include "brcmnand_compat.h"
+
+struct clk *devm_clk_get(struct udevice *dev, const char *id)
+{
+	struct clk *clk;
+	int ret;
+
+	clk = devm_kzalloc(dev, sizeof(*clk), GFP_KERNEL);
+	if (!clk) {
+		debug("%s: can't allocate clock\n", __func__);
+		return ERR_PTR(-ENOMEM);
+	}
+
+	ret = clk_get_by_name(dev, id, clk);
+	if (ret < 0) {
+		debug("%s: can't get clock (ret = %d)!\n", __func__, ret);
+		return ERR_PTR(ret);
+	}
+
+	return clk;
+}
+
+int clk_prepare_enable(struct clk *clk)
+{
+	return clk_enable(clk);
+}
+
+void clk_disable_unprepare(struct clk *clk)
+{
+	clk_disable(clk);
+}
+
+static char *devm_kvasprintf(struct udevice *dev, gfp_t gfp, const char *fmt,
+			     va_list ap)
+{
+	unsigned int len;
+	char *p;
+	va_list aq;
+
+	va_copy(aq, ap);
+	len = vsnprintf(NULL, 0, fmt, aq);
+	va_end(aq);
+
+	p = devm_kmalloc(dev, len + 1, gfp);
+	if (!p)
+		return NULL;
+
+	vsnprintf(p, len + 1, fmt, ap);
+
+	return p;
+}
+
+char *devm_kasprintf(struct udevice *dev, gfp_t gfp, const char *fmt, ...)
+{
+	va_list ap;
+	char *p;
+
+	va_start(ap, fmt);
+	p = devm_kvasprintf(dev, gfp, fmt, ap);
+	va_end(ap);
+
+	return p;
+}
diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand_compat.h b/drivers/mtd/nand/raw/brcmnand/brcmnand_compat.h
new file mode 100644
index 0000000000..02cab0f828
--- /dev/null
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand_compat.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#ifndef __BRCMNAND_COMPAT_H
+#define __BRCMNAND_COMPAT_H
+
+#include <clk.h>
+#include <dm.h>
+
+struct clk *devm_clk_get(struct udevice *dev, const char *id);
+int clk_prepare_enable(struct clk *clk);
+void clk_disable_unprepare(struct clk *clk);
+
+char *devm_kasprintf(struct udevice *dev, gfp_t gfp, const char *fmt, ...);
+
+#endif /* __BRCMNAND_COMPAT_H */

commit 73ecea3d8e9fe2f32ca3e7712de0769c9c32752d
Author: Boris Brezillon <boris.brezillon@free-electrons.com>
Date:   Fri Mar 15 15:14:32 2019 +0100

    UPSTREAM: mtd: nand: provide several helpers to do common NAND operations
    
    Linux commit 97d90da8a88 ("mtd: nand: provide several helpers
    to do common NAND operations")
    
    This is part of the process of removing direct calls to ->cmdfunc()
    outside of the core in order to introduce a better interface to execute
    NAND operations.
    
    Here we provide several helpers and make use of them to remove all
    direct calls to ->cmdfunc(). This way, we can easily modify those
    helpers to make use of the new ->exec_op() interface when available.
    
    Change-Id: I721c476a3ea5997dd4e4ca68ed929543478efd69
    Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
    [miquel.raynal@free-electrons.com: rebased and fixed some conflicts]
    Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
    Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    [Philippe Reynes: adapt code to u-boot and only keep new function]
    Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 9db29b300f7d9a58122a22a0815fe8449a664563)

diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index 6d2ff58d86..e07bd6b657 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -486,14 +486,19 @@ static int nand_block_markbad_lowlevel(struct mtd_info *mtd, loff_t ofs)
 static int nand_check_wp(struct mtd_info *mtd)
 {
 	struct nand_chip *chip = mtd_to_nand(mtd);
+	u8 status;
+	int ret;
 
 	/* Broken xD cards report WP despite being writable */
 	if (chip->options & NAND_BROKEN_XD)
 		return 0;
 
 	/* Check the WP bit */
-	chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
-	return (chip->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1;
+	ret = nand_status_op(chip, &status);
+	if (ret)
+		return ret;
+
+	return status & NAND_STATUS_WP ? 0 : 1;
 }
 
 /**
@@ -575,11 +580,18 @@ static void nand_wait_status_ready(struct mtd_info *mtd, unsigned long timeo)
 {
 	register struct nand_chip *chip = mtd_to_nand(mtd);
 	u32 time_start;
+	int ret;
 
 	timeo = (CONFIG_SYS_HZ * timeo) / 1000;
 	time_start = get_timer(0);
 	while (get_timer(time_start) < timeo) {
-		if ((chip->read_byte(mtd) & NAND_STATUS_READY))
+		u8 status;
+
+		ret = nand_read_data_op(chip, &status, sizeof(status), true);
+		if (ret)
+			return;
+
+		if (status & NAND_STATUS_READY)
 			break;
 		WATCHDOG_RESET();
 	}
@@ -851,7 +863,15 @@ static void panic_nand_wait(struct mtd_info *mtd, struct nand_chip *chip,
 			if (chip->dev_ready(mtd))
 				break;
 		} else {
-			if (chip->read_byte(mtd) & NAND_STATUS_READY)
+			int ret;
+			u8 status;
+
+			ret = nand_read_data_op(chip, &status, sizeof(status),
+						true);
+			if (ret)
+				return;
+
+			if (status & NAND_STATUS_READY)
 				break;
 		}
 		mdelay(1);
@@ -867,8 +887,9 @@ static void panic_nand_wait(struct mtd_info *mtd, struct nand_chip *chip,
  */
 static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip)
 {
-	int status;
 	unsigned long timeo = 400;
+	u8 status;
+	int ret;
 
 	led_trigger_event(nand_led_trigger, LED_FULL);
 
@@ -878,7 +899,9 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip)
 	 */
 	ndelay(100);
 
-	chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
+	ret = nand_status_op(chip, NULL);
+	if (ret)
+		return ret;
 
  	u32 timer = (CONFIG_SYS_HZ * timeo) / 1000;
  	u32 time_start;
@@ -889,13 +912,21 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip)
 			if (chip->dev_ready(mtd))
 				break;
 		} else {
-			if (chip->read_byte(mtd) & NAND_STATUS_READY)
+			ret = nand_read_data_op(chip, &status,
+						sizeof(status), true);
+			if (ret)
+				return ret;
+
+			if (status & NAND_STATUS_READY)
 				break;
 		}
 	}
 	led_trigger_event(nand_led_trigger, LED_OFF);
 
-	status = (int)chip->read_byte(mtd);
+	ret = nand_read_data_op(chip, &status, sizeof(status), true);
+	if (ret)
+		return ret;
+
 	/* This can happen if in case of timeout or buggy dev_ready */
 	WARN_ON(!(status & NAND_STATUS_READY));
 	return status;
@@ -1047,6 +1078,516 @@ static void __maybe_unused nand_release_data_interface(struct nand_chip *chip)
 	kfree(chip->data_interface);
 }
 
+/**
+ * nand_read_page_op - Do a READ PAGE operation
+ * @chip: The NAND chip
+ * @page: page to read
+ * @offset_in_page: offset within the page
+ * @buf: buffer used to store the data
+ * @len: length of the buffer
+ *
+ * This function issues a READ PAGE operation.
+ * This function does not select/unselect the CS line.
+ *
+ * Returns 0 on success, a negative error code otherwise.
+ */
+int nand_read_page_op(struct nand_chip *chip, unsigned int page,
+		      unsigned int offset_in_page, void *buf, unsigned int len)
+{
+	struct mtd_info *mtd = nand_to_mtd(chip);
+
+	if (len && !buf)
+		return -EINVAL;
+
+	if (offset_in_page + len > mtd->writesize + mtd->oobsize)
+		return -EINVAL;
+
+	chip->cmdfunc(mtd, NAND_CMD_READ0, offset_in_page, page);
+	if (len)
+		chip->read_buf(mtd, buf, len);
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(nand_read_page_op);
+
+/**
+ * nand_read_param_page_op - Do a READ PARAMETER PAGE operation
+ * @chip: The NAND chip
+ * @page: parameter page to read
+ * @buf: buffer used to store the data
+ * @len: length of the buffer
+ *
+ * This function issues a READ PARAMETER PAGE operation.
+ * This function does not select/unselect the CS line.
+ *
+ * Returns 0 on success, a negative error code otherwise.
+ */
+static int nand_read_param_page_op(struct nand_chip *chip, u8 page, void *buf,
+				   unsigned int len)
+{
+	struct mtd_info *mtd = nand_to_mtd(chip);
+	unsigned int i;
+	u8 *p = buf;
+
+	if (len && !buf)
+		return -EINVAL;
+
+	chip->cmdfunc(mtd, NAND_CMD_PARAM, page, -1);
+	for (i = 0; i < len; i++)
+		p[i] = chip->read_byte(mtd);
+
+	return 0;
+}
+
+/**
+ * nand_change_read_column_op - Do a CHANGE READ COLUMN operation
+ * @chip: The NAND chip
+ * @offset_in_page: offset within the page
+ * @buf: buffer used to store the data
+ * @len: length of the buffer
+ * @force_8bit: force 8-bit bus access
+ *
+ * This function issues a CHANGE READ COLUMN operation.
+ * This function does not select/unselect the CS line.
+ *
+ * Returns 0 on success, a negative error code otherwise.
+ */
+int nand_change_read_column_op(struct nand_chip *chip,
+			       unsigned int offset_in_page, void *buf,
+			       unsigned int len, bool force_8bit)
+{
+	struct mtd_info *mtd = nand_to_mtd(chip);
+
+	if (len && !buf)
+		return -EINVAL;
+
+	if (offset_in_page + len > mtd->writesize + mtd->oobsize)
+		return -EINVAL;
+
+	chip->cmdfunc(mtd, NAND_CMD_RNDOUT, offset_in_page, -1);
+	if (len)
+		chip->read_buf(mtd, buf, len);
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(nand_change_read_column_op);
+
+/**
+ * nand_read_oob_op - Do a READ OOB operation
+ * @chip: The NAND chip
+ * @page: page to read
+ * @offset_in_oob: offset within the OOB area
+ * @buf: buffer used to store the data
+ * @len: length of the buffer
+ *
+ * This function issues a READ OOB operation.
+ * This function does not select/unselect the CS line.
+ *
+ * Returns 0 on success, a negative error code otherwise.
+ */
+int nand_read_oob_op(struct nand_chip *chip, unsigned int page,
+		     unsigned int offset_in_oob, void *buf, unsigned int len)
+{
+	struct mtd_info *mtd = nand_to_mtd(chip);
+
+	if (len && !buf)
+		return -EINVAL;
+
+	if (offset_in_oob + len > mtd->oobsize)
+		return -EINVAL;
+
+	chip->cmdfunc(mtd, NAND_CMD_READOOB, offset_in_oob, page);
+	if (len)
+		chip->read_buf(mtd, buf, len);
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(nand_read_oob_op);
+
+/**
+ * nand_prog_page_begin_op - starts a PROG PAGE operation
+ * @chip: The NAND chip
+ * @page: page to write
+ * @offset_in_page: offset within the page
+ * @buf: buffer containing the data to write to the page
+ * @len: length of the buffer
+ *
+ * This function issues the first half of a PROG PAGE operation.
+ * This function does not select/unselect the CS line.
+ *
+ * Returns 0 on success, a negative error code otherwise.
+ */
+int nand_prog_page_begin_op(struct nand_chip *chip, unsigned int page,
+			    unsigned int offset_in_page, const void *buf,
+			    unsigned int len)
+{
+	struct mtd_info *mtd = nand_to_mtd(chip);
+
+	if (len && !buf)
+		return -EINVAL;
+
+	if (offset_in_page + len > mtd->writesize + mtd->oobsize)
+		return -EINVAL;
+
+	chip->cmdfunc(mtd, NAND_CMD_SEQIN, offset_in_page, page);
+
+	if (buf)
+		chip->write_buf(mtd, buf, len);
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(nand_prog_page_begin_op);
+
+/**
+ * nand_prog_page_end_op - ends a PROG PAGE operation
+ * @chip: The NAND chip
+ *
+ * This function issues the second half of a PROG PAGE operation.
+ * This function does not select/unselect the CS line.
+ *
+ * Returns 0 on success, a negative error code otherwise.
+ */
+int nand_prog_page_end_op(struct nand_chip *chip)
+{
+	struct mtd_info *mtd = nand_to_mtd(chip);
+	int status;
+
+	chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
+
+	status = chip->waitfunc(mtd, chip);
+	if (status & NAND_STATUS_FAIL)
+		return -EIO;
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(nand_prog_page_end_op);
+
+/**
+ * nand_prog_page_op - Do a full PROG PAGE operation
+ * @chip: The NAND chip
+ * @page: page to write
+ * @offset_in_page: offset within the page
+ * @buf: buffer containing the data to write to the page
+ * @len: length of the buffer
+ *
+ * This function issues a full PROG PAGE operation.
+ * This function does not select/unselect the CS line.
+ *
+ * Returns 0 on success, a negative error code otherwise.
+ */
+int nand_prog_page_op(struct nand_chip *chip, unsigned int page,
+		      unsigned int offset_in_page, const void *buf,
+		      unsigned int len)
+{
+	struct mtd_info *mtd = nand_to_mtd(chip);
+	int status;
+
+	if (!len || !buf)
+		return -EINVAL;
+
+	if (offset_in_page + len > mtd->writesize + mtd->oobsize)
+		return -EINVAL;
+
+	chip->cmdfunc(mtd, NAND_CMD_SEQIN, offset_in_page, page);
+	chip->write_buf(mtd, buf, len);
+	chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
+
+	status = chip->waitfunc(mtd, chip);
+	if (status & NAND_STATUS_FAIL)
+		return -EIO;
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(nand_prog_page_op);
+
+/**
+ * nand_change_write_column_op - Do a CHANGE WRITE COLUMN operation
+ * @chip: The NAND chip
+ * @offset_in_page: offset within the page
+ * @buf: buffer containing the data to send to the NAND
+ * @len: length of the buffer
+ * @force_8bit: force 8-bit bus access
+ *
+ * This function issues a CHANGE WRITE COLUMN operation.
+ * This function does not select/unselect the CS line.
+ *
+ * Returns 0 on success, a negative error code otherwise.
+ */
+int nand_change_write_column_op(struct nand_chip *chip,
+				unsigned int offset_in_page,
+				const void *buf, unsigned int len,
+				bool force_8bit)
+{
+	struct mtd_info *mtd = nand_to_mtd(chip);
+
+	if (len && !buf)
+		return -EINVAL;
+
+	if (offset_in_page + len > mtd->writesize + mtd->oobsize)
+		return -EINVAL;
+
+	chip->cmdfunc(mtd, NAND_CMD_RNDIN, offset_in_page, -1);
+	if (len)
+		chip->write_buf(mtd, buf, len);
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(nand_change_write_column_op);
+
+/**
+ * nand_readid_op - Do a READID operation
+ * @chip: The NAND chip
+ * @addr: address cycle to pass after the READID command
+ * @buf: buffer used to store the ID
+ * @len: length of the buffer
+ *
+ * This function sends a READID command and reads back the ID returned by the
+ * NAND.
+ * This function does not select/unselect the CS line.
+ *
+ * Returns 0 on success, a negative error code otherwise.
+ */
+int nand_readid_op(struct nand_chip *chip, u8 addr, void *buf,
+		   unsigned int len)
+{
+	struct mtd_info *mtd = nand_to_mtd(chip);
+	unsigned int i;
+	u8 *id = buf;
+
+	if (len && !buf)
+		return -EINVAL;
+
+	chip->cmdfunc(mtd, NAND_CMD_READID, addr, -1);
+
+	for (i = 0; i < len; i++)
+		id[i] = chip->read_byte(mtd);
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(nand_readid_op);
+
+/**
+ * nand_status_op - Do a STATUS operation
+ * @chip: The NAND chip
+ * @status: out variable to store the NAND status
+ *
+ * This function sends a STATUS command and reads back the status returned by
+ * the NAND.
+ * This function does not select/unselect the CS line.
+ *
+ * Returns 0 on success, a negative error code otherwise.
+ */
+int nand_status_op(struct nand_chip *chip, u8 *status)
+{
+	struct mtd_info *mtd = nand_to_mtd(chip);
+
+	chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
+	if (status)
+		*status = chip->read_byte(mtd);
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(nand_status_op);
+
+/**
+ * nand_exit_status_op - Exit a STATUS operation
+ * @chip: The NAND chip
+ *
+ * This function sends a READ0 command to cancel the effect of the STATUS
+ * command to avoid reading only the status until a new read command is sent.
+ *
+ * This function does not select/unselect the CS line.
+ *
+ * Returns 0 on success, a negative error code otherwise.
+ */
+int nand_exit_status_op(struct nand_chip *chip)
+{
+	struct mtd_info *mtd = nand_to_mtd(chip);
+
+	chip->cmdfunc(mtd, NAND_CMD_READ0, -1, -1);
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(nand_exit_status_op);
+
+/**
+ * nand_erase_op - Do an erase operation
+ * @chip: The NAND chip
+ * @eraseblock: block to erase
+ *
+ * This function sends an ERASE command and waits for the NAND to be ready
+ * before returning.
+ * This function does not select/unselect the CS line.
+ *
+ * Returns 0 on success, a negative error code otherwise.
+ */
+int nand_erase_op(struct nand_chip *chip, unsigned int eraseblock)
+{
+	struct mtd_info *mtd = nand_to_mtd(chip);
+	unsigned int page = eraseblock <<
+			    (chip->phys_erase_shift - chip->page_shift);
+	int status;
+
+	chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page);
+	chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1);
+
+	status = chip->waitfunc(mtd, chip);
+	if (status < 0)
+		return status;
+
+	if (status & NAND_STATUS_FAIL)
+		return -EIO;
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(nand_erase_op);
+
+/**
+ * nand_set_features_op - Do a SET FEATURES operation
+ * @chip: The NAND chip
+ * @feature: feature id
+ * @data: 4 bytes of data
+ *
+ * This function sends a SET FEATURES command and waits for the NAND to be
+ * ready before returning.
+ * This function does not select/unselect the CS line.
+ *
+ * Returns 0 on success, a negative error code otherwise.
+ */
+static int nand_set_features_op(struct nand_chip *chip, u8 feature,
+				const void *data)
+{
+	struct mtd_info *mtd = nand_to_mtd(chip);
+	const u8 *params = data;
+	int i, status;
+
+	chip->cmdfunc(mtd, NAND_CMD_SET_FEATURES, feature, -1);
+	for (i = 0; i < ONFI_SUBFEATURE_PARAM_LEN; ++i)
+		chip->write_byte(mtd, params[i]);
+
+	status = chip->waitfunc(mtd, chip);
+	if (status & NAND_STATUS_FAIL)
+		return -EIO;
+
+	return 0;
+}
+
+/**
+ * nand_get_features_op - Do a GET FEATURES operation
+ * @chip: The NAND chip
+ * @feature: feature id
+ * @data: 4 bytes of data
+ *
+ * This function sends a GET FEATURES command and waits for the NAND to be
+ * ready before returning.
+ * This function does not select/unselect the CS line.
+ *
+ * Returns 0 on success, a negative error code otherwise.
+ */
+static int nand_get_features_op(struct nand_chip *chip, u8 feature,
+				void *data)
+{
+	struct mtd_info *mtd = nand_to_mtd(chip);
+	u8 *params = data;
+	int i;
+
+	chip->cmdfunc(mtd, NAND_CMD_GET_FEATURES, feature, -1);
+	for (i = 0; i < ONFI_SUBFEATURE_PARAM_LEN; ++i)
+		params[i] = chip->read_byte(mtd);
+
+	return 0;
+}
+
+/**
+ * nand_reset_op - Do a reset operation
+ * @chip: The NAND chip
+ *
+ * This function sends a RESET command and waits for the NAND to be ready
+ * before returning.
+ * This function does not select/unselect the CS line.
+ *
+ * Returns 0 on success, a negative error code otherwise.
+ */
+int nand_reset_op(struct nand_chip *chip)
+{
+	struct mtd_info *mtd = nand_to_mtd(chip);
+
+	chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(nand_reset_op);
+
+/**
+ * nand_read_data_op - Read data from the NAND
+ * @chip: The NAND chip
+ * @buf: buffer used to store the data
+ * @len: length of the buffer
+ * @force_8bit: force 8-bit bus access
+ *
+ * This function does a raw data read on the bus. Usually used after launching
+ * another NAND operation like nand_read_page_op().
+ * This function does not select/unselect the CS line.
+ *
+ * Returns 0 on success, a negative error code otherwise.
+ */
+int nand_read_data_op(struct nand_chip *chip, void *buf, unsigned int len,
+		      bool force_8bit)
+{
+	struct mtd_info *mtd = nand_to_mtd(chip);
+
+	if (!len || !buf)
+		return -EINVAL;
+
+	if (force_8bit) {
+		u8 *p = buf;
+		unsigned int i;
+
+		for (i = 0; i < len; i++)
+			p[i] = chip->read_byte(mtd);
+	} else {
+		chip->read_buf(mtd, buf, len);
+	}
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(nand_read_data_op);
+
+/**
+ * nand_write_data_op - Write data from the NAND
+ * @chip: The NAND chip
+ * @buf: buffer containing the data to send on the bus
+ * @len: length of the buffer
+ * @force_8bit: force 8-bit bus access
+ *
+ * This function does a raw data write on the bus. Usually used after launching
+ * another NAND operation like nand_write_page_begin_op().
+ * This function does not select/unselect the CS line.
+ *
+ * Returns 0 on success, a negative error code otherwise.
+ */
+int nand_write_data_op(struct nand_chip *chip, const void *buf,
+		       unsigned int len, bool force_8bit)
+{
+	struct mtd_info *mtd = nand_to_mtd(chip);
+
+	if (!len || !buf)
+		return -EINVAL;
+
+	if (force_8bit) {
+		const u8 *p = buf;
+		unsigned int i;
+
+		for (i = 0; i < len; i++)
+			chip->write_byte(mtd, p[i]);
+	} else {
+		chip->write_buf(mtd, buf, len);
+	}
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(nand_write_data_op);
+
 /**
  * nand_reset - Reset and initialize a NAND device
  * @chip: The NAND chip
@@ -1068,8 +1609,10 @@ int nand_reset(struct nand_chip *chip, int chipnr)
 	 * interface settings, hence this weird ->select_chip() dance.
 	 */
 	chip->select_chip(mtd, chipnr);
-	chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
+	ret = nand_reset_op(chip);
 	chip->select_chip(mtd, -1);
+	if (ret)
+		return ret;
 
 	chip->select_chip(mtd, chipnr);
 	ret = nand_setup_data_interface(chip, chipnr);
@@ -1220,9 +1763,19 @@ EXPORT_SYMBOL(nand_check_erased_ecc_chunk);
 static int nand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
 			      uint8_t *buf, int oob_required, int page)
 {
-	chip->read_buf(mtd, buf, mtd->writesize);
-	if (oob_required)
-		chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
+	int ret;
+
+	ret = nand_read_data_op(chip, buf, mtd->writesize, false);
+	if (ret)
+		return ret;
+
+	if (oob_required) {
+		ret = nand_read_data_op(chip, chip->oob_poi, mtd->oobsize,
+					false);
+		if (ret)
+			return ret;
+	}
+
 	return 0;
 }
 
@@ -1243,29 +1796,46 @@ static int nand_read_page_raw_syndrome(struct mtd_info *mtd,
 	int eccsize = chip->ecc.size;
 	int eccbytes = chip->ecc.bytes;
 	uint8_t *oob = chip->oob_poi;
-	int steps, size;
+	int steps, size, ret;
 
 	for (steps = chip->ecc.steps; steps > 0; steps--) {
-		chip->read_buf(mtd, buf, eccsize);
+		ret = nand_read_data_op(chip, buf, eccsize, false);
+		if (ret)
+			return ret;
+
 		buf += eccsize;
 
 		if (chip->ecc.prepad) {
-			chip->read_buf(mtd, oob, chip->ecc.prepad);
+			ret = nand_read_data_op(chip, oob, chip->ecc.prepad,
+						false);
+			if (ret)
+				return ret;
+
 			oob += chip->ecc.prepad;
 		}
 
-		chip->read_buf(mtd, oob, eccbytes);
+		ret = nand_read_data_op(chip, oob, eccbytes, false);
+		if (ret)
+			return ret;
+
 		oob += eccbytes;
 
 		if (chip->ecc.postpad) {
-			chip->read_buf(mtd, oob, chip->ecc.postpad);
+			ret = nand_read_data_op(chip, oob, chip->ecc.postpad,
+						false);
+			if (ret)
+				return ret;
+
 			oob += chip->ecc.postpad;
 		}
 	}
 
 	size = mtd->oobsize - (oob - chip->oob_poi);
-	if (size)
-		chip->read_buf(mtd, oob, size);
+	if (size) {
+		ret = nand_read_data_op(chip, oob, size, false);
+		if (ret)
+			return ret;
+	}
 
 	return 0;
 }
@@ -1336,6 +1906,7 @@ static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip,
 	int busw = (chip->options & NAND_BUSWIDTH_16) ? 2 : 1;
 	int index;
 	unsigned int max_bitflips = 0;
+	int ret;
 
 	/* Column address within the page aligned to ECC size (256bytes) */
 	start_step = data_offs / chip->ecc.size;
@@ -1353,7 +1924,9 @@ static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip,
 		chip->cmdfunc(mtd, NAND_CMD_RNDOUT, data_col_addr, -1);
 
 	p = bufpoi + data_col_addr;
-	chip->read_buf(mtd, p, datafrag_len);
+	ret = nand_read_data_op(chip, p, datafrag_len, false);
+	if (ret)
+		return ret;
 
 	/* Calculate ECC */
 	for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size)
@@ -1370,8 +1943,11 @@ static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip,
 		}
 	}
 	if (gaps) {
-		chip->cmdfunc(mtd, NAND_CMD_RNDOUT, mtd->writesize, -1);
-		chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
+		ret = nand_change_read_column_op(chip, mtd->writesize,
+						 chip->oob_poi, mtd->oobsize,
+						 false);
+		if (ret)
+			return ret;
 	} else {
 		/*
 		 * Send the command to read the particular ECC bytes take care
@@ -1384,9 +1960,12 @@ static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip,
 		if (eccpos[index + (num_steps * chip->ecc.bytes)] & (busw - 1))
 			aligned_len++;
 
-		chip->cmdfunc(mtd, NAND_CMD_RNDOUT,
-					mtd->writesize + aligned_pos, -1);
-		chip->read_buf(mtd, &chip->oob_poi[aligned_pos], aligned_len);
+		ret = nand_change_read_column_op(chip,
+						 mtd->writesize + aligned_pos,
+						 &chip->oob_poi[aligned_pos],
+						 aligned_len, false);
+		if (ret)
+			return ret;
 	}
 
 	for (i = 0; i < eccfrag_len; i++)
@@ -1439,13 +2018,21 @@ static int nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
 	uint8_t *ecc_code = chip->buffers->ecccode;
 	uint32_t *eccpos = chip->ecc.layout->eccpos;
 	unsigned int max_bitflips = 0;
+	int ret;
 
 	for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
 		chip->ecc.hwctl(mtd, NAND_ECC_READ);
-		chip->read_buf(mtd, p, eccsize);
+
+		ret = nand_read_data_op(chip, p, eccsize, false);
+		if (ret)
+			return ret;
+
 		chip->ecc.calculate(mtd, p, &ecc_calc[i]);
 	}
-	chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
+
+	ret = nand_read_data_op(chip, chip->oob_poi, mtd->oobsize, false);
+	if (ret)
+		return ret;
 
 	for (i = 0; i < chip->ecc.total; i++)
 		ecc_code[i] = chip->oob_poi[eccpos[i]];
@@ -1501,11 +2088,16 @@ static int nand_read_page_hwecc_oob_first(struct mtd_info *mtd,
 	uint32_t *eccpos = chip->ecc.layout->eccpos;
 	uint8_t *ecc_calc = chip->buffers->ecccalc;
 	unsigned int max_bitflips = 0;
+	int ret;
 
 	/* Read the OOB area first */
-	chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);
-	chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
-	chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);
+	ret = nand_read_oob_op(chip, page, 0, chip->oob_poi, mtd->oobsize);
+	if (ret)
+		return ret;
+
+	ret = nand_read_page_op(chip, page, 0, NULL, 0);
+	if (ret)
+		return ret;
 
 	for (i = 0; i < chip->ecc.total; i++)
 		ecc_code[i] = chip->oob_poi[eccpos[i]];
@@ -1514,7 +2106,11 @@ static int nand_read_page_hwecc_oob_first(struct mtd_info *mtd,
 		int stat;
 
 		chip->ecc.hwctl(mtd, NAND_ECC_READ);
-		chip->read_buf(mtd, p, eccsize);
+
+		ret = nand_read_data_op(chip, p, eccsize, false);
+		if (ret)
+			return ret;
+
 		chip->ecc.calculate(mtd, p, &ecc_calc[i]);
 
 		stat = chip->ecc.correct(mtd, p, &ecc_code[i], NULL);
@@ -1551,7 +2147,7 @@ static int nand_read_page_hwecc_oob_first(struct mtd_info *mtd,
 static int nand_read_page_syndrome(struct mtd_info *mtd, struct nand_chip *chip,
 				   uint8_t *buf, int oob_required, int page)
 {
-	int i, eccsize = chip->ecc.size;
+	int ret, i, eccsize = chip->ecc.size;
 	int eccbytes = chip->ecc.bytes;
 	int eccsteps = chip->ecc.steps;
 	int eccpadbytes = eccbytes + chip->ecc.prepad + chip->ecc.postpad;
@@ -1563,21 +2159,36 @@ static int nand_read_page_syndrome(struct mtd_info *mtd, struct nand_chip *chip,
 		int stat;
 
 		chip->ecc.hwctl(mtd, NAND_ECC_READ);
-		chip->read_buf(mtd, p, eccsize);
+
+		ret = nand_read_data_op(chip, p, eccsize, false);
+		if (ret)
+			return ret;
 
 		if (chip->ecc.prepad) {
-			chip->read_buf(mtd, oob, chip->ecc.prepad);
+			ret = nand_read_data_op(chip, oob, chip->ecc.prepad,
+						false);
+			if (ret)
+				return ret;
+
 			oob += chip->ecc.prepad;
 		}
 
 		chip->ecc.hwctl(mtd, NAND_ECC_READSYN);
-		chip->read_buf(mtd, oob, eccbytes);
+
+		ret = nand_read_data_op(chip, oob, eccbytes, false);
+		if (ret)
+			return ret;
+
 		stat = chip->ecc.correct(mtd, p, oob, NULL);
 
 		oob += eccbytes;
 
 		if (chip->ecc.postpad) {
-			chip->read_buf(mtd, oob, chip->ecc.postpad);
+			ret = nand_read_data_op(chip, oob, chip->ecc.postpad,
+						false);
+			if (ret)
+				return ret;
+
 			oob += chip->ecc.postpad;
 		}
 
@@ -1601,8 +2212,11 @@ static int nand_read_page_syndrome(struct mtd_info *mtd, struct nand_chip *chip,
 
 	/* Calculate remaining oob bytes */
 	i = mtd->oobsize - (oob - chip->oob_poi);
-	if (i)
-		chip->read_buf(mtd, oob, i);
+	if (i) {
+		ret = nand_read_data_op(chip, oob, i, false);
+		if (ret)
+			return ret;
+	}
 
 	return max_bitflips;
 }
@@ -1739,8 +2353,11 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,
 						 __func__, buf);
 
 read_retry:
-			if (nand_standard_page_accessors(&chip->ecc))
-				chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);
+			if (nand_standard_page_accessors(&chip->ecc)) {
+				ret = nand_read_page_op(chip, page, 0, NULL, 0);
+				if (ret)
+					break;
+			}
 
 			/*
 			 * Now read the page into the buffer.  Absent an error,
@@ -1874,9 +2491,7 @@ read_retry:
 static int nand_read_oob_std(struct mtd_info *mtd, struct nand_chip *chip,
 			     int page)
 {
-	chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);
-	chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
-	return 0;
+	return nand_read_oob_op(chip, page, 0, chip->oob_poi, mtd->oobsize);
 }
 
 /**
@@ -1893,25 +2508,43 @@ static int nand_read_oob_syndrome(struct mtd_info *mtd, struct nand_chip *chip,
 	int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;
 	int eccsize = chip->ecc.size;
 	uint8_t *bufpoi = chip->oob_poi;
-	int i, toread, sndrnd = 0, pos;
+	int i, toread, sndrnd = 0, pos, ret;
+
+	ret = nand_read_page_op(chip, page, chip->ecc.size, NULL, 0);
+	if (ret)
+		return ret;
 
-	chip->cmdfunc(mtd, NAND_CMD_READ0, chip->ecc.size, page);
 	for (i = 0; i < chip->ecc.steps; i++) {
 		if (sndrnd) {
+			int ret;
+
 			pos = eccsize + i * (eccsize + chunk);
 			if (mtd->writesize > 512)
-				chip->cmdfunc(mtd, NAND_CMD_RNDOUT, pos, -1);
+				ret = nand_change_read_column_op(chip, pos,
+								 NULL, 0,
+								 false);
 			else
-				chip->cmdfunc(mtd, NAND_CMD_READ0, pos, page);
+				ret = nand_read_page_op(chip, page, pos, NULL,
+							0);
+
+			if (ret)
+				return ret;
 		} else
 			sndrnd = 1;
 		toread = min_t(int, length, chunk);
-		chip->read_buf(mtd, bufpoi, toread);
+
+		ret = nand_read_data_op(chip, bufpoi, toread, false);
+		if (ret)
+			return ret;
+
 		bufpoi += toread;
 		length -= toread;
 	}
-	if (length > 0)
-		chip->read_buf(mtd, bufpoi, length);
+	if (length > 0) {
+		ret = nand_read_data_op(chip, bufpoi, length, false);
+		if (ret)
+			return ret;
+	}
 
 	return 0;
 }
@@ -1925,18 +2558,8 @@ static int nand_read_oob_syndrome(struct mtd_info *mtd, struct nand_chip *chip,
 static int nand_write_oob_std(struct mtd_info *mtd, struct nand_chip *chip,
 			      int page)
 {
-	int status = 0;
-	const uint8_t *buf = chip->oob_poi;
-	int length = mtd->oobsize;
-
-	chip->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize, page);
-	chip->write_buf(mtd, buf, length);
-	/* Send command to program the OOB data */
-	chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
-
-	status = chip->waitfunc(mtd, chip);
-
-	return status & NAND_STATUS_FAIL ? -EIO : 0;
+	return nand_prog_page_op(chip, page, mtd->writesize, chip->oob_poi,
+				 mtd->oobsize);
 }
 
 /**
@@ -1951,7 +2574,7 @@ static int nand_write_oob_syndrome(struct mtd_info *mtd,
 {
 	int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;
 	int eccsize = chip->ecc.size, length = mtd->oobsize;
-	int i, len, pos, status = 0, sndcmd = 0, steps = chip->ecc.steps;
+	int ret, i, len, pos, sndcmd = 0, steps = chip->ecc.steps;
 	const uint8_t *bufpoi = chip->oob_poi;
 
 	/*
@@ -1965,7 +2588,10 @@ static int nand_write_oob_syndrome(struct mtd_info *mtd,
 	} else
 		pos = eccsize;
 
-	chip->cmdfunc(mtd, NAND_CMD_SEQIN, pos, page);
+	ret = nand_prog_page_begin_op(chip, page, pos, NULL, 0);
+	if (ret)
+		return ret;
+
 	for (i = 0; i < steps; i++) {
 		if (sndcmd) {
 			if (mtd->writesize <= 512) {
@@ -1974,28 +2600,40 @@ static int nand_write_oob_syndrome(struct mtd_info *mtd,
 				len = eccsize;
 				while (len > 0) {
 					int num = min_t(int, len, 4);
-					chip->write_buf(mtd, (uint8_t *)&fill,
-							num);
+
+					ret = nand_write_data_op(chip, &fill,
+								 num, false);
+					if (ret)
+						return ret;
+
 					len -= num;
 				}
 			} else {
 				pos = eccsize + i * (eccsize + chunk);
-				chip->cmdfunc(mtd, NAND_CMD_RNDIN, pos, -1);
+				ret = nand_change_write_column_op(chip, pos,
+								  NULL, 0,
+								  false);
+				if (ret)
+					return ret;
 			}
 		} else
 			sndcmd = 1;
 		len = min_t(int, length, chunk);
-		chip->write_buf(mtd, bufpoi, len);
+
+		ret = nand_write_data_op(chip, bufpoi, len, false);
+		if (ret)
+			return ret;
+
 		bufpoi += len;
 		length -= len;
 	}
-	if (length > 0)
-		chip->write_buf(mtd, bufpoi, length);
-
-	chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
-	status = chip->waitfunc(mtd, chip);
+	if (length > 0) {
+		ret = nand_write_data_op(chip, bufpoi, length, false);
+		if (ret)
+			return ret;
+	}
 
-	return status & NAND_STATUS_FAIL ? -EIO : 0;
+	return nand_prog_page_end_op(chip);
 }
 
 /**
@@ -2154,9 +2792,18 @@ out:
 static int nand_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
 			       const uint8_t *buf, int oob_required, int page)
 {
-	chip->write_buf(mtd, buf, mtd->writesize);
-	if (oob_required)
-		chip->write_buf(mtd, chip->oob_poi, mtd->oobsize);
+	int ret;
+
+	ret = nand_write_data_op(chip, buf, mtd->writesize, false);
+	if (ret)
+		return ret;
+
+	if (oob_required) {
+		ret = nand_write_data_op(chip, chip->oob_poi, mtd->oobsize,
+					 false);
+		if (ret)
+			return ret;
+	}
 
 	return 0;
 }
@@ -2179,29 +2826,46 @@ static int nand_write_page_raw_syndrome(struct mtd_info *mtd,
 	int eccsize = chip->ecc.size;
 	int eccbytes = chip->ecc.bytes;
 	uint8_t *oob = chip->oob_poi;
-	int steps, size;
+	int steps, size, ret;
 
 	for (steps = chip->ecc.steps; steps > 0; steps--) {
-		chip->write_buf(mtd, buf, eccsize);
+		ret = nand_write_data_op(chip, buf, eccsize, false);
+		if (ret)
+			return ret;
+
 		buf += eccsize;
 
 		if (chip->ecc.prepad) {
-			chip->write_buf(mtd, oob, chip->ecc.prepad);
+			ret = nand_write_data_op(chip, oob, chip->ecc.prepad,
+						 false);
+			if (ret)
+				return ret;
+
 			oob += chip->ecc.prepad;
 		}
 
-		chip->write_buf(mtd, oob, eccbytes);
+		ret = nand_write_data_op(chip, oob, eccbytes, false);
+		if (ret)
+			return ret;
+
 		oob += eccbytes;
 
 		if (chip->ecc.postpad) {
-			chip->write_buf(mtd, oob, chip->ecc.postpad);
+			ret = nand_write_data_op(chip, oob, chip->ecc.postpad,
+						 false);
+			if (ret)
+				return ret;
+
 			oob += chip->ecc.postpad;
 		}
 	}
 
 	size = mtd->oobsize - (oob - chip->oob_poi);
-	if (size)
-		chip->write_buf(mtd, oob, size);
+	if (size) {
+		ret = nand_write_data_op(chip, oob, size, false);
+		if (ret)
+			return ret;
+	}
 
 	return 0;
 }
@@ -2252,17 +2916,24 @@ static int nand_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
 	uint8_t *ecc_calc = chip->buffers->ecccalc;
 	const uint8_t *p = buf;
 	uint32_t *eccpos = chip->ecc.layout->eccpos;
+	int ret;
 
 	for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
 		chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
-		chip->write_buf(mtd, p, eccsize);
+
+		ret = nand_write_data_op(chip, p, eccsize, false);
+		if (ret)
+			return ret;
+
 		chip->ecc.calculate(mtd, p, &ecc_calc[i]);
 	}
 
 	for (i = 0; i < chip->ecc.total; i++)
 		chip->oob_poi[eccpos[i]] = ecc_calc[i];
 
-	chip->write_buf(mtd, chip->oob_poi, mtd->oobsize);
+	ret = nand_write_data_op(chip, chip->oob_poi, mtd->oobsize, false);
+	if (ret)
+		return ret;
 
 	return 0;
 }
@@ -2293,13 +2964,16 @@ static int nand_write_subpage_hwecc(struct mtd_info *mtd,
 	uint32_t end_step   = (offset + data_len - 1) / ecc_size;
 	int oob_bytes       = mtd->oobsize / ecc_steps;
 	int step, i;
+	int ret;
 
 	for (step = 0; step < ecc_steps; step++) {
 		/* configure controller for WRITE access */
 		chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
 
 		/* write data (untouched subpages already masked by 0xFF) */
-		chip->write_buf(mtd, buf, ecc_size);
+		ret = nand_write_data_op(chip, buf, ecc_size, false);
+		if (ret)
+			return ret;
 
 		/* mask ECC of un-touched subpages by padding 0xFF */
 		if ((step < start_step) || (step > end_step))
@@ -2324,7 +2998,9 @@ static int nand_write_subpage_hwecc(struct mtd_info *mtd,
 		chip->oob_poi[eccpos[i]] = ecc_calc[i];
 
 	/* write OOB buffer to NAND device */
-	chip->write_buf(mtd, chip->oob_poi, mtd->oobsize);
+	ret = nand_write_data_op(chip, chip->oob_poi, mtd->oobsize, false);
+	if (ret)
+		return ret;
 
 	return 0;
 }
@@ -2351,31 +3027,49 @@ static int nand_write_page_syndrome(struct mtd_info *mtd,
 	int eccsteps = chip->ecc.steps;
 	const uint8_t *p = buf;
 	uint8_t *oob = chip->oob_poi;
+	int ret;
 
 	for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
-
 		chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
-		chip->write_buf(mtd, p, eccsize);
+
+		ret = nand_write_data_op(chip, p, eccsize, false);
+		if (ret)
+			return ret;
 
 		if (chip->ecc.prepad) {
-			chip->write_buf(mtd, oob, chip->ecc.prepad);
+			ret = nand_write_data_op(chip, oob, chip->ecc.prepad,
+						 false);
+			if (ret)
+				return ret;
+
 			oob += chip->ecc.prepad;
 		}
 
 		chip->ecc.calculate(mtd, p, oob);
-		chip->write_buf(mtd, oob, eccbytes);
+
+		ret = nand_write_data_op(chip, oob, eccbytes, false);
+		if (ret)
+			return ret;
+
 		oob += eccbytes;
 
 		if (chip->ecc.postpad) {
-			chip->write_buf(mtd, oob, chip->ecc.postpad);
+			ret = nand_write_data_op(chip, oob, chip->ecc.postpad,
+						 false);
+			if (ret)
+				return ret;
+
 			oob += chip->ecc.postpad;
 		}
 	}
 
 	/* Calculate remaining oob bytes */
 	i = mtd->oobsize - (oob - chip->oob_poi);
-	if (i)
-		chip->write_buf(mtd, oob, i);
+	if (i) {
+		ret = nand_write_data_op(chip, oob, i, false);
+		if (ret)
+			return ret;
+	}
 
 	return 0;
 }
@@ -2403,8 +3097,11 @@ static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip,
 	else
 		subpage = 0;
 
-	if (nand_standard_page_accessors(&chip->ecc))
-		chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page);
+	if (nand_standard_page_accessors(&chip->ecc)) {
+		status = nand_prog_page_begin_op(chip, page, 0, NULL, 0);
+		if (status)
+			return status;
+	}
 
 	if (unlikely(raw))
 		status = chip->ecc.write_page_raw(mtd, chip, buf,
@@ -2419,13 +3116,8 @@ static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip,
 	if (status < 0)
 		return status;
 
-	if (nand_standard_page_accessors(&chip->ecc)) {
-		chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
-
-		status = chip->waitfunc(mtd, chip);
-		if (status & NAND_STATUS_FAIL)
-			return -EIO;
-	}
+	if (nand_standard_page_accessors(&chip->ecc))
+		return nand_prog_page_end_op(chip);
 
 	return 0;
 }
@@ -2785,11 +3477,12 @@ out:
 static int single_erase(struct mtd_info *mtd, int page)
 {
 	struct nand_chip *chip = mtd_to_nand(mtd);
+	unsigned int eraseblock;
+
 	/* Send commands to erase a block */
-	chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page);
-	chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1);
+	eraseblock = page >> (chip->phys_erase_shift - chip->page_shift);
 
-	return chip->waitfunc(mtd, chip);
+	return nand_erase_op(chip, eraseblock);
 }
 
 /**
@@ -2982,9 +3675,6 @@ static int nand_block_markbad(struct mtd_info *mtd, loff_t ofs)
 static int nand_onfi_set_features(struct mtd_info *mtd, struct nand_chip *chip,
 			int addr, uint8_t *subfeature_param)
 {
-	int status;
-	int i;
-
 #ifdef CONFIG_SYS_NAND_ONFI_DETECTION
 	if (!chip->onfi_version ||
 	    !(le16_to_cpu(chip->onfi_params.opt_cmd)
@@ -2992,14 +3682,7 @@ static int nand_onfi_set_features(struct mtd_info *mtd, struct nand_chip *chip,
 		return -ENOTSUPP;
 #endif
 
-	chip->cmdfunc(mtd, NAND_CMD_SET_FEATURES, addr, -1);
-	for (i = 0; i < ONFI_SUBFEATURE_PARAM_LEN; ++i)
-		chip->write_byte(mtd, subfeature_param[i]);
-
-	status = chip->waitfunc(mtd, chip);
-	if (status & NAND_STATUS_FAIL)
-		return -EIO;
-	return 0;
+	return nand_set_features_op(chip, addr, subfeature_param);
 }
 
 /**
@@ -3012,8 +3695,6 @@ static int nand_onfi_set_features(struct mtd_info *mtd, struct nand_chip *chip,
 static int nand_onfi_get_features(struct mtd_info *mtd, struct nand_chip *chip,
 			int addr, uint8_t *subfeature_param)
 {
-	int i;
-
 #ifdef CONFIG_SYS_NAND_ONFI_DETECTION
 	if (!chip->onfi_version ||
 	    !(le16_to_cpu(chip->onfi_params.opt_cmd)
@@ -3021,10 +3702,7 @@ static int nand_onfi_get_features(struct mtd_info *mtd, struct nand_chip *chip,
 		return -ENOTSUPP;
 #endif
 
-	chip->cmdfunc(mtd, NAND_CMD_GET_FEATURES, addr, -1);
-	for (i = 0; i < ONFI_SUBFEATURE_PARAM_LEN; ++i)
-		*subfeature_param++ = chip->read_byte(mtd);
-	return 0;
+	return nand_get_features_op(chip, addr, subfeature_param);
 }
 
 /* Set default functions */
@@ -3118,7 +3796,7 @@ static int nand_flash_detect_ext_param_page(struct mtd_info *mtd,
 	struct onfi_ext_section *s;
 	struct onfi_ext_ecc_info *ecc;
 	uint8_t *cursor;
-	int ret = -EINVAL;
+	int ret;
 	int len;
 	int i;
 
@@ -3128,14 +3806,18 @@ static int nand_flash_detect_ext_param_page(struct mtd_info *mtd,
 		return -ENOMEM;
 
 	/* Send our own NAND_CMD_PARAM. */
-	chip->cmdfunc(mtd, NAND_CMD_PARAM, 0, -1);
+	ret = nand_read_param_page_op(chip, 0, NULL, 0);
+	if (ret)
+		goto ext_out;
 
 	/* Use the Change Read Column command to skip the ONFI param pages. */
-	chip->cmdfunc(mtd, NAND_CMD_RNDOUT,
-			sizeof(*p) * p->num_of_param_pages , -1);
+	ret = nand_change_read_column_op(chip,
+					 sizeof(*p) * p->num_of_param_pages,
+					 ep, len, true);
+	if (ret)
+		goto ext_out;
 
-	/* Read out the Extended Parameter Page. */
-	chip->read_buf(mtd, (uint8_t *)ep, len);
+	ret = -EINVAL;
 	if ((onfi_crc16(ONFI_CRC_BASE, ((uint8_t *)ep) + 2, len - 2)
 		!= le16_to_cpu(ep->crc))) {
 		pr_debug("fail in the CRC.\n");
@@ -3212,19 +3894,23 @@ static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip,
 					int *busw)
 {
 	struct nand_onfi_params *p = &chip->onfi_params;
-	int i, j;
-	int val;
+	char id[4];
+	int i, ret, val;
 
 	/* Try ONFI for unknown chip or LP */
-	chip->cmdfunc(mtd, NAND_CMD_READID, 0x20, -1);
-	if (chip->read_byte(mtd) != 'O' || chip->read_byte(mtd) != 'N' ||
-		chip->read_byte(mtd) != 'F' || chip->read_byte(mtd) != 'I')
+	ret = nand_readid_op(chip, 0x20, id, sizeof(id));
+	if (ret || strncmp(id, "ONFI", 4))
+		return 0;
+
+	ret = nand_read_param_page_op(chip, 0, NULL, 0);
+	if (ret)
 		return 0;
 
-	chip->cmdfunc(mtd, NAND_CMD_PARAM, 0, -1);
 	for (i = 0; i < 3; i++) {
-		for (j = 0; j < sizeof(*p); j++)
-			((uint8_t *)p)[j] = chip->read_byte(mtd);
+		ret = nand_read_data_op(chip, p, sizeof(*p), true);
+		if (ret)
+			return 0;
+
 		if (onfi_crc16(ONFI_CRC_BASE, (uint8_t *)p, 254) ==
 				le16_to_cpu(p->crc)) {
 			break;
@@ -3324,20 +4010,22 @@ static int nand_flash_detect_jedec(struct mtd_info *mtd, struct nand_chip *chip,
 {
 	struct nand_jedec_params *p = &chip->jedec_params;
 	struct jedec_ecc_info *ecc;
-	int val;
-	int i, j;
+	char id[5];
+	int i, val, ret;
 
 	/* Try JEDEC for unknown chip or LP */
-	chip->cmdfunc(mtd, NAND_CMD_READID, 0x40, -1);
-	if (chip->read_byte(mtd) != 'J' || chip->read_byte(mtd) != 'E' ||
-		chip->read_byte(mtd) != 'D' || chip->read_byte(mtd) != 'E' ||
-		chip->read_byte(mtd) != 'C')
+	ret = nand_readid_op(chip, 0x40, id, sizeof(id));
+	if (ret || strncmp(id, "JEDEC", sizeof(id)))
+		return 0;
+
+	ret = nand_read_param_page_op(chip, 0x40, NULL, 0);
+	if (ret)
 		return 0;
 
-	chip->cmdfunc(mtd, NAND_CMD_PARAM, 0x40, -1);
 	for (i = 0; i < 3; i++) {
-		for (j = 0; j < sizeof(*p); j++)
-			((uint8_t *)p)[j] = chip->read_byte(mtd);
+		ret = nand_read_data_op(chip, p, sizeof(*p), true);
+		if (ret)
+			return 0;
 
 		if (onfi_crc16(ONFI_CRC_BASE, (uint8_t *)p, 510) ==
 				le16_to_cpu(p->crc))
@@ -3708,25 +4396,29 @@ struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
 						  int *maf_id, int *dev_id,
 						  struct nand_flash_dev *type)
 {
-	int busw;
-	int i, maf_idx;
+	int busw, ret;
+	int maf_idx;
 	u8 id_data[8];
 
 	/*
 	 * Reset the chip, required by some chips (e.g. Micron MT29FxGxxxxx)
 	 * after power-up.
 	 */
-	nand_reset(chip, 0);
+	ret = nand_reset(chip, 0);
+	if (ret)
+		return ERR_PTR(ret);
 
 	/* Select the device */
 	chip->select_chip(mtd, 0);
 
 	/* Send the command for reading device ID */
-	chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
+	ret = nand_readid_op(chip, 0, id_data, 2);
+	if (ret)
+		return ERR_PTR(ret);
 
 	/* Read manufacturer and device IDs */
-	*maf_id = chip->read_byte(mtd);
-	*dev_id = chip->read_byte(mtd);
+	*maf_id = id_data[0];
+	*dev_id = id_data[1];
 
 	/*
 	 * Try again to make sure, as some systems the bus-hold or other
@@ -3735,11 +4427,10 @@ struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
 	 * not match, ignore the device completely.
 	 */
 
-	chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
-
 	/* Read entire ID string */
-	for (i = 0; i < 8; i++)
-		id_data[i] = chip->read_byte(mtd);
+	ret = nand_readid_op(chip, 0, id_data, 8);
+	if (ret)
+		return ERR_PTR(ret);
 
 	if (id_data[0] != *maf_id || id_data[1] != *dev_id) {
 		pr_info("second ID read did not match %02x,%02x against %02x,%02x\n",
@@ -3999,15 +4690,17 @@ int nand_scan_ident(struct mtd_info *mtd, int maxchips,
 
 	/* Check for a chip array */
 	for (i = 1; i < maxchips; i++) {
+		u8 id[2];
+
 		/* See comment in nand_get_flash_type for reset */
 		nand_reset(chip, i);
 
 		chip->select_chip(mtd, i);
 		/* Send the command for reading device ID */
-		chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
+		nand_readid_op(chip, 0, id, sizeof(id));
+
 		/* Read manufacturer and device IDs */
-		if (nand_maf_id != chip->read_byte(mtd) ||
-		    nand_dev_id != chip->read_byte(mtd)) {
+		if (nand_maf_id != id[0] || nand_dev_id != id[1]) {
 			chip->select_chip(mtd, -1);
 			break;
 		}
diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
index cf4409e545..571b307e47 100644
--- a/include/linux/mtd/rawnand.h
+++ b/include/linux/mtd/rawnand.h
@@ -1245,4 +1245,34 @@ int nand_maximize_ecc(struct nand_chip *chip,
 
 /* Reset and initialize a NAND device */
 int nand_reset(struct nand_chip *chip, int chipnr);
+
+/* NAND operation helpers */
+int nand_reset_op(struct nand_chip *chip);
+int nand_readid_op(struct nand_chip *chip, u8 addr, void *buf,
+		   unsigned int len);
+int nand_status_op(struct nand_chip *chip, u8 *status);
+int nand_exit_status_op(struct nand_chip *chip);
+int nand_erase_op(struct nand_chip *chip, unsigned int eraseblock);
+int nand_read_page_op(struct nand_chip *chip, unsigned int page,
+		      unsigned int offset_in_page, void *buf, unsigned int len);
+int nand_change_read_column_op(struct nand_chip *chip,
+			       unsigned int offset_in_page, void *buf,
+			       unsigned int len, bool force_8bit);
+int nand_read_oob_op(struct nand_chip *chip, unsigned int page,
+		     unsigned int offset_in_page, void *buf, unsigned int len);
+int nand_prog_page_begin_op(struct nand_chip *chip, unsigned int page,
+			    unsigned int offset_in_page, const void *buf,
+			    unsigned int len);
+int nand_prog_page_end_op(struct nand_chip *chip);
+int nand_prog_page_op(struct nand_chip *chip, unsigned int page,
+		      unsigned int offset_in_page, const void *buf,
+		      unsigned int len);
+int nand_change_write_column_op(struct nand_chip *chip,
+				unsigned int offset_in_page, const void *buf,
+				unsigned int len, bool force_8bit);
+int nand_read_data_op(struct nand_chip *chip, void *buf, unsigned int len,
+		      bool force_8bit);
+int nand_write_data_op(struct nand_chip *chip, const void *buf,
+		       unsigned int len, bool force_8bit);
+
 #endif /* __LINUX_MTD_RAWNAND_H */

commit f6b2aa453d69b754484db0a47747fad2506b8128
Author: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Date:   Fri Mar 1 20:12:34 2019 +0100

    UPSTREAM: mtd: rawnand: denali: add reset handling
    
    This adds reset handling to the devicetree-enabled Denali NAND driver.
    
    For backwards compatibility, only a warning is printed when failing to
    get reset handles.
    
    Change-Id: I0d0ccb6e20f7c3ca6056c8aa03fb8ccd7b7bf340
    Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit ed784ac3822b7d7019679a41a17907296e2dadbe)

diff --git a/drivers/mtd/nand/raw/denali.h b/drivers/mtd/nand/raw/denali.h
index 14aa34af03..42fa1be14f 100644
--- a/drivers/mtd/nand/raw/denali.h
+++ b/drivers/mtd/nand/raw/denali.h
@@ -11,6 +11,7 @@
 #include <linux/bitops.h>
 #include <linux/mtd/rawnand.h>
 #include <linux/types.h>
+#include <reset.h>
 
 #define DEVICE_RESET				0x0
 #define     DEVICE_RESET__BANK(bank)			BIT(bank)
@@ -316,6 +317,7 @@ struct denali_nand_info {
 	void (*host_write)(struct denali_nand_info *denali, u32 addr, u32 data);
 	void (*setup_dma)(struct denali_nand_info *denali, dma_addr_t dma_addr,
 			  int page, int write);
+	struct reset_ctl_bulk resets;
 };
 
 #define DENALI_CAP_HW_ECC_FIXUP			BIT(0)
diff --git a/drivers/mtd/nand/raw/denali_dt.c b/drivers/mtd/nand/raw/denali_dt.c
index 979a72a5f7..6412d4d8d7 100644
--- a/drivers/mtd/nand/raw/denali_dt.c
+++ b/drivers/mtd/nand/raw/denali_dt.c
@@ -132,15 +132,30 @@ static int denali_dt_probe(struct udevice *dev)
 		denali->clk_x_rate = 200000000;
 	}
 
+	ret = reset_get_bulk(dev, &denali->resets);
+	if (ret)
+		dev_warn(dev, "Can't get reset: %d\n", ret);
+	else
+		reset_deassert_bulk(&denali->resets);
+
 	return denali_init(denali);
 }
 
+static int denali_dt_remove(struct udevice *dev)
+{
+	struct denali_nand_info *denali = dev_get_priv(dev);
+
+	return reset_release_bulk(&denali->resets);
+}
+
 U_BOOT_DRIVER(denali_nand_dt) = {
 	.name = "denali-nand-dt",
 	.id = UCLASS_MISC,
 	.of_match = denali_nand_dt_ids,
 	.probe = denali_dt_probe,
 	.priv_auto_alloc_size = sizeof(struct denali_nand_info),
+	.remove = denali_dt_remove,
+	.flags = DM_FLAG_OS_PREPARE,
 };
 
 void board_nand_init(void)

commit 15f504ad16676cf1810fc83768ffc63ecd5d047b
Author: Christophe Kerello <christophe.kerello@st.com>
Date:   Fri Apr 5 11:41:50 2019 +0200

    UPSTREAM: mtd: rawnand: stm32_fmc2: add STM32 FMC2 NAND flash controller driver
    
    The driver adds the support for the STMicroelectronics FMC2 NAND
    Controller found on STM32MP SOCs.
    
    This patch adds the polling mode, a basic mode that do not need
    any DMA channels.
    
    Only NAND_ECC_HW mode is actually supported.
    The driver supports a maximum 8k page size.
    The following ECC strength and step size are currently supported:
     - nand-ecc-strength = <8>, nand-ecc-step-size = <512> (BCH8)
     - nand-ecc-strength = <4>, nand-ecc-step-size = <512> (BCH4)
     - nand-ecc-strength = <1>, nand-ecc-step-size = <512> (Extended ECC
       based on Hamming)
    
    This patch has been tested on Micron MT29F8G08ABACAH4.
    
    Change-Id: I30c2a61a49af2f8855f7f98ef302a70554d87a5d
    Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 7bb75023a720432a32840c6df543aae92653b23d)

diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index 7f76e5ecef..dc087ab641 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -256,6 +256,17 @@ config NAND_ZYNQ_USE_BOOTLOADER1_TIMINGS
 	  This flag prevent U-boot reconfigure NAND flash controller and reuse
 	  the NAND timing from 1st stage bootloader.
 
+config NAND_STM32_FMC2
+	bool "Support for NAND controller on STM32MP SoCs"
+	depends on ARCH_STM32MP
+	select SYS_NAND_SELF_INIT
+	imply CMD_NAND
+	help
+	  Enables support for NAND Flash chips on SoCs containing the FMC2
+	  NAND controller. This controller is found on STM32MP SoCs.
+	  The controller supports a maximum 8k page size and supports
+	  a maximum 8-bit correction error per sector of 512 bytes.
+
 comment "Generic NAND options"
 
 config SYS_NAND_BLOCK_SIZE
diff --git a/drivers/mtd/nand/raw/Makefile b/drivers/mtd/nand/raw/Makefile
index c61e3f3839..b10e718d15 100644
--- a/drivers/mtd/nand/raw/Makefile
+++ b/drivers/mtd/nand/raw/Makefile
@@ -65,6 +65,7 @@ obj-$(CONFIG_NAND_OMAP_ELM) += omap_elm.o
 obj-$(CONFIG_NAND_PLAT) += nand_plat.o
 obj-$(CONFIG_NAND_SUNXI) += sunxi_nand.o
 obj-$(CONFIG_NAND_ZYNQ) += zynq_nand.o
+obj-$(CONFIG_NAND_STM32_FMC2) += stm32_fmc2_nand.o
 
 else  # minimal SPL drivers
 
diff --git a/drivers/mtd/nand/raw/stm32_fmc2_nand.c b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
new file mode 100644
index 0000000000..2bb749d7f7
--- /dev/null
+++ b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
@@ -0,0 +1,1092 @@
+// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+/*
+ * Copyright (C) STMicroelectronics 2019
+ * Author: Christophe Kerello <christophe.kerello@st.com>
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <nand.h>
+#include <reset.h>
+#include <linux/iopoll.h>
+#include <linux/ioport.h>
+
+/* Bad block marker length */
+#define FMC2_BBM_LEN			2
+
+/* ECC step size */
+#define FMC2_ECC_STEP_SIZE		512
+
+/* Command delay */
+#define FMC2_RB_DELAY_US		30
+
+/* Max chip enable */
+#define FMC2_MAX_CE			2
+
+/* Timings */
+#define FMC2_THIZ			1
+#define FMC2_TIO			8000
+#define FMC2_TSYNC			3000
+#define FMC2_PCR_TIMING_MASK		0xf
+#define FMC2_PMEM_PATT_TIMING_MASK	0xff
+
+/* FMC2 Controller Registers */
+#define FMC2_BCR1			0x0
+#define FMC2_PCR			0x80
+#define FMC2_SR				0x84
+#define FMC2_PMEM			0x88
+#define FMC2_PATT			0x8c
+#define FMC2_HECCR			0x94
+#define FMC2_BCHISR			0x254
+#define FMC2_BCHICR			0x258
+#define FMC2_BCHPBR1			0x260
+#define FMC2_BCHPBR2			0x264
+#define FMC2_BCHPBR3			0x268
+#define FMC2_BCHPBR4			0x26c
+#define FMC2_BCHDSR0			0x27c
+#define FMC2_BCHDSR1			0x280
+#define FMC2_BCHDSR2			0x284
+#define FMC2_BCHDSR3			0x288
+#define FMC2_BCHDSR4			0x28c
+
+/* Register: FMC2_BCR1 */
+#define FMC2_BCR1_FMC2EN		BIT(31)
+
+/* Register: FMC2_PCR */
+#define FMC2_PCR_PWAITEN		BIT(1)
+#define FMC2_PCR_PBKEN			BIT(2)
+#define FMC2_PCR_PWID_MASK		GENMASK(5, 4)
+#define FMC2_PCR_PWID(x)		(((x) & 0x3) << 4)
+#define FMC2_PCR_PWID_BUSWIDTH_8	0
+#define FMC2_PCR_PWID_BUSWIDTH_16	1
+#define FMC2_PCR_ECCEN			BIT(6)
+#define FMC2_PCR_ECCALG			BIT(8)
+#define FMC2_PCR_TCLR_MASK		GENMASK(12, 9)
+#define FMC2_PCR_TCLR(x)		(((x) & 0xf) << 9)
+#define FMC2_PCR_TCLR_DEFAULT		0xf
+#define FMC2_PCR_TAR_MASK		GENMASK(16, 13)
+#define FMC2_PCR_TAR(x)			(((x) & 0xf) << 13)
+#define FMC2_PCR_TAR_DEFAULT		0xf
+#define FMC2_PCR_ECCSS_MASK		GENMASK(19, 17)
+#define FMC2_PCR_ECCSS(x)		(((x) & 0x7) << 17)
+#define FMC2_PCR_ECCSS_512		1
+#define FMC2_PCR_ECCSS_2048		3
+#define FMC2_PCR_BCHECC			BIT(24)
+#define FMC2_PCR_WEN			BIT(25)
+
+/* Register: FMC2_SR */
+#define FMC2_SR_NWRF			BIT(6)
+
+/* Register: FMC2_PMEM */
+#define FMC2_PMEM_MEMSET(x)		(((x) & 0xff) << 0)
+#define FMC2_PMEM_MEMWAIT(x)		(((x) & 0xff) << 8)
+#define FMC2_PMEM_MEMHOLD(x)		(((x) & 0xff) << 16)
+#define FMC2_PMEM_MEMHIZ(x)		(((x) & 0xff) << 24)
+#define FMC2_PMEM_DEFAULT		0x0a0a0a0a
+
+/* Register: FMC2_PATT */
+#define FMC2_PATT_ATTSET(x)		(((x) & 0xff) << 0)
+#define FMC2_PATT_ATTWAIT(x)		(((x) & 0xff) << 8)
+#define FMC2_PATT_ATTHOLD(x)		(((x) & 0xff) << 16)
+#define FMC2_PATT_ATTHIZ(x)		(((x) & 0xff) << 24)
+#define FMC2_PATT_DEFAULT		0x0a0a0a0a
+
+/* Register: FMC2_BCHISR */
+#define FMC2_BCHISR_DERF		BIT(1)
+#define FMC2_BCHISR_EPBRF		BIT(4)
+
+/* Register: FMC2_BCHICR */
+#define FMC2_BCHICR_CLEAR_IRQ		GENMASK(4, 0)
+
+/* Register: FMC2_BCHDSR0 */
+#define FMC2_BCHDSR0_DUE		BIT(0)
+#define FMC2_BCHDSR0_DEF		BIT(1)
+#define FMC2_BCHDSR0_DEN_MASK		GENMASK(7, 4)
+#define FMC2_BCHDSR0_DEN_SHIFT		4
+
+/* Register: FMC2_BCHDSR1 */
+#define FMC2_BCHDSR1_EBP1_MASK		GENMASK(12, 0)
+#define FMC2_BCHDSR1_EBP2_MASK		GENMASK(28, 16)
+#define FMC2_BCHDSR1_EBP2_SHIFT		16
+
+/* Register: FMC2_BCHDSR2 */
+#define FMC2_BCHDSR2_EBP3_MASK		GENMASK(12, 0)
+#define FMC2_BCHDSR2_EBP4_MASK		GENMASK(28, 16)
+#define FMC2_BCHDSR2_EBP4_SHIFT		16
+
+/* Register: FMC2_BCHDSR3 */
+#define FMC2_BCHDSR3_EBP5_MASK		GENMASK(12, 0)
+#define FMC2_BCHDSR3_EBP6_MASK		GENMASK(28, 16)
+#define FMC2_BCHDSR3_EBP6_SHIFT		16
+
+/* Register: FMC2_BCHDSR4 */
+#define FMC2_BCHDSR4_EBP7_MASK		GENMASK(12, 0)
+#define FMC2_BCHDSR4_EBP8_MASK		GENMASK(28, 16)
+#define FMC2_BCHDSR4_EBP8_SHIFT		16
+
+#define FMC2_NSEC_PER_SEC		1000000000L
+
+enum stm32_fmc2_ecc {
+	FMC2_ECC_HAM = 1,
+	FMC2_ECC_BCH4 = 4,
+	FMC2_ECC_BCH8 = 8
+};
+
+struct stm32_fmc2_timings {
+	u8 tclr;
+	u8 tar;
+	u8 thiz;
+	u8 twait;
+	u8 thold_mem;
+	u8 tset_mem;
+	u8 thold_att;
+	u8 tset_att;
+};
+
+struct stm32_fmc2_nand {
+	struct nand_chip chip;
+	struct stm32_fmc2_timings timings;
+	int ncs;
+	int cs_used[FMC2_MAX_CE];
+};
+
+static inline struct stm32_fmc2_nand *to_fmc2_nand(struct nand_chip *chip)
+{
+	return container_of(chip, struct stm32_fmc2_nand, chip);
+}
+
+struct stm32_fmc2_nfc {
+	struct nand_hw_control base;
+	struct stm32_fmc2_nand nand;
+	struct nand_ecclayout ecclayout;
+	void __iomem *io_base;
+	void __iomem *data_base[FMC2_MAX_CE];
+	void __iomem *cmd_base[FMC2_MAX_CE];
+	void __iomem *addr_base[FMC2_MAX_CE];
+	struct clk clk;
+
+	u8 cs_assigned;
+	int cs_sel;
+};
+
+static inline struct stm32_fmc2_nfc *to_stm32_nfc(struct nand_hw_control *base)
+{
+	return container_of(base, struct stm32_fmc2_nfc, base);
+}
+
+/* Timings configuration */
+static void stm32_fmc2_timings_init(struct nand_chip *chip)
+{
+	struct stm32_fmc2_nfc *fmc2 = to_stm32_nfc(chip->controller);
+	struct stm32_fmc2_nand *nand = to_fmc2_nand(chip);
+	struct stm32_fmc2_timings *timings = &nand->timings;
+	u32 pcr = readl(fmc2->io_base + FMC2_PCR);
+	u32 pmem, patt;
+
+	/* Set tclr/tar timings */
+	pcr &= ~FMC2_PCR_TCLR_MASK;
+	pcr |= FMC2_PCR_TCLR(timings->tclr);
+	pcr &= ~FMC2_PCR_TAR_MASK;
+	pcr |= FMC2_PCR_TAR(timings->tar);
+
+	/* Set tset/twait/thold/thiz timings in common bank */
+	pmem = FMC2_PMEM_MEMSET(timings->tset_mem);
+	pmem |= FMC2_PMEM_MEMWAIT(timings->twait);
+	pmem |= FMC2_PMEM_MEMHOLD(timings->thold_mem);
+	pmem |= FMC2_PMEM_MEMHIZ(timings->thiz);
+
+	/* Set tset/twait/thold/thiz timings in attribut bank */
+	patt = FMC2_PATT_ATTSET(timings->tset_att);
+	patt |= FMC2_PATT_ATTWAIT(timings->twait);
+	patt |= FMC2_PATT_ATTHOLD(timings->thold_att);
+	patt |= FMC2_PATT_ATTHIZ(timings->thiz);
+
+	writel(pcr, fmc2->io_base + FMC2_PCR);
+	writel(pmem, fmc2->io_base + FMC2_PMEM);
+	writel(patt, fmc2->io_base + FMC2_PATT);
+}
+
+/* Controller configuration */
+static void stm32_fmc2_setup(struct nand_chip *chip)
+{
+	struct stm32_fmc2_nfc *fmc2 = to_stm32_nfc(chip->controller);
+	u32 pcr = readl(fmc2->io_base + FMC2_PCR);
+
+	/* Configure ECC algorithm (default configuration is Hamming) */
+	pcr &= ~FMC2_PCR_ECCALG;
+	pcr &= ~FMC2_PCR_BCHECC;
+	if (chip->ecc.strength == FMC2_ECC_BCH8) {
+		pcr |= FMC2_PCR_ECCALG;
+		pcr |= FMC2_PCR_BCHECC;
+	} else if (chip->ecc.strength == FMC2_ECC_BCH4) {
+		pcr |= FMC2_PCR_ECCALG;
+	}
+
+	/* Set buswidth */
+	pcr &= ~FMC2_PCR_PWID_MASK;
+	if (chip->options & NAND_BUSWIDTH_16)
+		pcr |= FMC2_PCR_PWID(FMC2_PCR_PWID_BUSWIDTH_16);
+
+	/* Set ECC sector size */
+	pcr &= ~FMC2_PCR_ECCSS_MASK;
+	pcr |= FMC2_PCR_ECCSS(FMC2_PCR_ECCSS_512);
+
+	writel(pcr, fmc2->io_base + FMC2_PCR);
+}
+
+/* Select target */
+static void stm32_fmc2_select_chip(struct mtd_info *mtd, int chipnr)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct stm32_fmc2_nfc *fmc2 = to_stm32_nfc(chip->controller);
+	struct stm32_fmc2_nand *nand = to_fmc2_nand(chip);
+
+	if (chipnr < 0 || chipnr >= nand->ncs)
+		return;
+
+	if (nand->cs_used[chipnr] == fmc2->cs_sel)
+		return;
+
+	fmc2->cs_sel = nand->cs_used[chipnr];
+	chip->IO_ADDR_R = fmc2->data_base[fmc2->cs_sel];
+	chip->IO_ADDR_W = fmc2->data_base[fmc2->cs_sel];
+
+	/* FMC2 setup routine */
+	stm32_fmc2_setup(chip);
+
+	/* Apply timings */
+	stm32_fmc2_timings_init(chip);
+}
+
+/* Set bus width to 16-bit or 8-bit */
+static void stm32_fmc2_set_buswidth_16(struct stm32_fmc2_nfc *fmc2, bool set)
+{
+	u32 pcr = readl(fmc2->io_base + FMC2_PCR);
+
+	pcr &= ~FMC2_PCR_PWID_MASK;
+	if (set)
+		pcr |= FMC2_PCR_PWID(FMC2_PCR_PWID_BUSWIDTH_16);
+	writel(pcr, fmc2->io_base + FMC2_PCR);
+}
+
+/* Enable/disable ECC */
+static void stm32_fmc2_set_ecc(struct stm32_fmc2_nfc *fmc2, bool enable)
+{
+	u32 pcr = readl(fmc2->io_base + FMC2_PCR);
+
+	pcr &= ~FMC2_PCR_ECCEN;
+	if (enable)
+		pcr |= FMC2_PCR_ECCEN;
+	writel(pcr, fmc2->io_base + FMC2_PCR);
+}
+
+/* Clear irq sources in case of bch is used */
+static inline void stm32_fmc2_clear_bch_irq(struct stm32_fmc2_nfc *fmc2)
+{
+	writel(FMC2_BCHICR_CLEAR_IRQ, fmc2->io_base + FMC2_BCHICR);
+}
+
+/* Send command and address cycles */
+static void stm32_fmc2_cmd_ctrl(struct mtd_info *mtd, int cmd,
+				unsigned int ctrl)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct stm32_fmc2_nfc *fmc2 = to_stm32_nfc(chip->controller);
+
+	if (cmd == NAND_CMD_NONE)
+		return;
+
+	if (ctrl & NAND_CLE) {
+		writeb(cmd, fmc2->cmd_base[fmc2->cs_sel]);
+		return;
+	}
+
+	writeb(cmd, fmc2->addr_base[fmc2->cs_sel]);
+}
+
+/*
+ * Enable ECC logic and reset syndrome/parity bits previously calculated
+ * Syndrome/parity bits is cleared by setting the ECCEN bit to 0
+ */
+static void stm32_fmc2_hwctl(struct mtd_info *mtd, int mode)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct stm32_fmc2_nfc *fmc2 = to_stm32_nfc(chip->controller);
+
+	stm32_fmc2_set_ecc(fmc2, false);
+
+	if (chip->ecc.strength != FMC2_ECC_HAM) {
+		u32 pcr = readl(fmc2->io_base + FMC2_PCR);
+
+		if (mode == NAND_ECC_WRITE)
+			pcr |= FMC2_PCR_WEN;
+		else
+			pcr &= ~FMC2_PCR_WEN;
+		writel(pcr, fmc2->io_base + FMC2_PCR);
+
+		stm32_fmc2_clear_bch_irq(fmc2);
+	}
+
+	stm32_fmc2_set_ecc(fmc2, true);
+}
+
+/*
+ * ECC Hamming calculation
+ * ECC is 3 bytes for 512 bytes of data (supports error correction up to
+ * max of 1-bit)
+ */
+static int stm32_fmc2_ham_calculate(struct mtd_info *mtd, const u8 *data,
+				    u8 *ecc)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct stm32_fmc2_nfc *fmc2 = to_stm32_nfc(chip->controller);
+	u32 heccr, sr;
+	int ret;
+
+	ret = readl_poll_timeout(fmc2->io_base + FMC2_SR, sr,
+				 sr & FMC2_SR_NWRF, 10000);
+	if (ret < 0) {
+		pr_err("Ham timeout\n");
+		return ret;
+	}
+
+	heccr = readl(fmc2->io_base + FMC2_HECCR);
+
+	ecc[0] = heccr;
+	ecc[1] = heccr >> 8;
+	ecc[2] = heccr >> 16;
+
+	/* Disable ecc */
+	stm32_fmc2_set_ecc(fmc2, false);
+
+	return 0;
+}
+
+static int stm32_fmc2_ham_correct(struct mtd_info *mtd, u8 *dat,
+				  u8 *read_ecc, u8 *calc_ecc)
+{
+	u8 bit_position = 0, b0, b1, b2;
+	u32 byte_addr = 0, b;
+	u32 i, shifting = 1;
+
+	/* Indicate which bit and byte is faulty (if any) */
+	b0 = read_ecc[0] ^ calc_ecc[0];
+	b1 = read_ecc[1] ^ calc_ecc[1];
+	b2 = read_ecc[2] ^ calc_ecc[2];
+	b = b0 | (b1 << 8) | (b2 << 16);
+
+	/* No errors */
+	if (likely(!b))
+		return 0;
+
+	/* Calculate bit position */
+	for (i = 0; i < 3; i++) {
+		switch (b % 4) {
+		case 2:
+			bit_position += shifting;
+		case 1:
+			break;
+		default:
+			return -EBADMSG;
+		}
+		shifting <<= 1;
+		b >>= 2;
+	}
+
+	/* Calculate byte position */
+	shifting = 1;
+	for (i = 0; i < 9; i++) {
+		switch (b % 4) {
+		case 2:
+			byte_addr += shifting;
+		case 1:
+			break;
+		default:
+			return -EBADMSG;
+		}
+		shifting <<= 1;
+		b >>= 2;
+	}
+
+	/* Flip the bit */
+	dat[byte_addr] ^= (1 << bit_position);
+
+	return 1;
+}
+
+/*
+ * ECC BCH calculation and correction
+ * ECC is 7/13 bytes for 512 bytes of data (supports error correction up to
+ * max of 4-bit/8-bit)
+ */
+
+static int stm32_fmc2_bch_calculate(struct mtd_info *mtd, const u8 *data,
+				    u8 *ecc)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct stm32_fmc2_nfc *fmc2 = to_stm32_nfc(chip->controller);
+	u32 bchpbr, bchisr;
+	int ret;
+
+	/* Wait until the BCH code is ready */
+	ret = readl_poll_timeout(fmc2->io_base + FMC2_BCHISR, bchisr,
+				 bchisr & FMC2_BCHISR_EPBRF, 10000);
+	if (ret < 0) {
+		pr_err("Bch timeout\n");
+		return ret;
+	}
+
+	/* Read parity bits */
+	bchpbr = readl(fmc2->io_base + FMC2_BCHPBR1);
+	ecc[0] = bchpbr;
+	ecc[1] = bchpbr >> 8;
+	ecc[2] = bchpbr >> 16;
+	ecc[3] = bchpbr >> 24;
+
+	bchpbr = readl(fmc2->io_base + FMC2_BCHPBR2);
+	ecc[4] = bchpbr;
+	ecc[5] = bchpbr >> 8;
+	ecc[6] = bchpbr >> 16;
+
+	if (chip->ecc.strength == FMC2_ECC_BCH8) {
+		ecc[7] = bchpbr >> 24;
+
+		bchpbr = readl(fmc2->io_base + FMC2_BCHPBR3);
+		ecc[8] = bchpbr;
+		ecc[9] = bchpbr >> 8;
+		ecc[10] = bchpbr >> 16;
+		ecc[11] = bchpbr >> 24;
+
+		bchpbr = readl(fmc2->io_base + FMC2_BCHPBR4);
+		ecc[12] = bchpbr;
+	}
+
+	/* Disable ecc */
+	stm32_fmc2_set_ecc(fmc2, false);
+
+	return 0;
+}
+
+/* BCH algorithm correction */
+static int stm32_fmc2_bch_correct(struct mtd_info *mtd, u8 *dat,
+				  u8 *read_ecc, u8 *calc_ecc)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct stm32_fmc2_nfc *fmc2 = to_stm32_nfc(chip->controller);
+	u32 bchdsr0, bchdsr1, bchdsr2, bchdsr3, bchdsr4, bchisr;
+	u16 pos[8];
+	int i, ret, den, eccsize = chip->ecc.size;
+	unsigned int nb_errs = 0;
+
+	/* Wait until the decoding error is ready */
+	ret = readl_poll_timeout(fmc2->io_base + FMC2_BCHISR, bchisr,
+				 bchisr & FMC2_BCHISR_DERF, 10000);
+	if (ret < 0) {
+		pr_err("Bch timeout\n");
+		return ret;
+	}
+
+	bchdsr0 = readl(fmc2->io_base + FMC2_BCHDSR0);
+	bchdsr1 = readl(fmc2->io_base + FMC2_BCHDSR1);
+	bchdsr2 = readl(fmc2->io_base + FMC2_BCHDSR2);
+	bchdsr3 = readl(fmc2->io_base + FMC2_BCHDSR3);
+	bchdsr4 = readl(fmc2->io_base + FMC2_BCHDSR4);
+
+	/* Disable ECC */
+	stm32_fmc2_set_ecc(fmc2, false);
+
+	/* No errors found */
+	if (likely(!(bchdsr0 & FMC2_BCHDSR0_DEF)))
+		return 0;
+
+	/* Too many errors detected */
+	if (unlikely(bchdsr0 & FMC2_BCHDSR0_DUE))
+		return -EBADMSG;
+
+	pos[0] = bchdsr1 & FMC2_BCHDSR1_EBP1_MASK;
+	pos[1] = (bchdsr1 & FMC2_BCHDSR1_EBP2_MASK) >> FMC2_BCHDSR1_EBP2_SHIFT;
+	pos[2] = bchdsr2 & FMC2_BCHDSR2_EBP3_MASK;
+	pos[3] = (bchdsr2 & FMC2_BCHDSR2_EBP4_MASK) >> FMC2_BCHDSR2_EBP4_SHIFT;
+	pos[4] = bchdsr3 & FMC2_BCHDSR3_EBP5_MASK;
+	pos[5] = (bchdsr3 & FMC2_BCHDSR3_EBP6_MASK) >> FMC2_BCHDSR3_EBP6_SHIFT;
+	pos[6] = bchdsr4 & FMC2_BCHDSR4_EBP7_MASK;
+	pos[7] = (bchdsr4 & FMC2_BCHDSR4_EBP8_MASK) >> FMC2_BCHDSR4_EBP8_SHIFT;
+
+	den = (bchdsr0 & FMC2_BCHDSR0_DEN_MASK) >> FMC2_BCHDSR0_DEN_SHIFT;
+	for (i = 0; i < den; i++) {
+		if (pos[i] < eccsize * 8) {
+			__change_bit(pos[i], (unsigned long *)dat);
+			nb_errs++;
+		}
+	}
+
+	return nb_errs;
+}
+
+static int stm32_fmc2_read_page(struct mtd_info *mtd,
+				struct nand_chip *chip, u8 *buf,
+				int oob_required, int page)
+{
+	int i, s, stat, eccsize = chip->ecc.size;
+	int eccbytes = chip->ecc.bytes;
+	int eccsteps = chip->ecc.steps;
+	int eccstrength = chip->ecc.strength;
+	u8 *p = buf;
+	u8 *ecc_calc = chip->buffers->ecccalc;
+	u8 *ecc_code = chip->buffers->ecccode;
+	unsigned int max_bitflips = 0;
+
+	for (i = mtd->writesize + FMC2_BBM_LEN, s = 0; s < eccsteps;
+	     s++, i += eccbytes, p += eccsize) {
+		chip->ecc.hwctl(mtd, NAND_ECC_READ);
+
+		/* Read the nand page sector (512 bytes) */
+		chip->cmdfunc(mtd, NAND_CMD_RNDOUT, s * eccsize, -1);
+		chip->read_buf(mtd, p, eccsize);
+
+		/* Read the corresponding ECC bytes */
+		chip->cmdfunc(mtd, NAND_CMD_RNDOUT, i, -1);
+		chip->read_buf(mtd, ecc_code, eccbytes);
+
+		/* Correct the data */
+		stat = chip->ecc.correct(mtd, p, ecc_code, ecc_calc);
+		if (stat == -EBADMSG)
+			/* Check for empty pages with bitflips */
+			stat = nand_check_erased_ecc_chunk(p, eccsize,
+							   ecc_code, eccbytes,
+							   NULL, 0,
+							   eccstrength);
+
+		if (stat < 0) {
+			mtd->ecc_stats.failed++;
+		} else {
+			mtd->ecc_stats.corrected += stat;
+			max_bitflips = max_t(unsigned int, max_bitflips, stat);
+		}
+	}
+
+	/* Read oob */
+	if (oob_required) {
+		chip->cmdfunc(mtd, NAND_CMD_RNDOUT, mtd->writesize, -1);
+		chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
+	}
+
+	return max_bitflips;
+}
+
+/* Controller initialization */
+static void stm32_fmc2_init(struct stm32_fmc2_nfc *fmc2)
+{
+	u32 pcr = readl(fmc2->io_base + FMC2_PCR);
+	u32 bcr1 = readl(fmc2->io_base + FMC2_BCR1);
+
+	/* Set CS used to undefined */
+	fmc2->cs_sel = -1;
+
+	/* Enable wait feature and nand flash memory bank */
+	pcr |= FMC2_PCR_PWAITEN;
+	pcr |= FMC2_PCR_PBKEN;
+
+	/* Set buswidth to 8 bits mode for identification */
+	pcr &= ~FMC2_PCR_PWID_MASK;
+
+	/* ECC logic is disabled */
+	pcr &= ~FMC2_PCR_ECCEN;
+
+	/* Default mode */
+	pcr &= ~FMC2_PCR_ECCALG;
+	pcr &= ~FMC2_PCR_BCHECC;
+	pcr &= ~FMC2_PCR_WEN;
+
+	/* Set default ECC sector size */
+	pcr &= ~FMC2_PCR_ECCSS_MASK;
+	pcr |= FMC2_PCR_ECCSS(FMC2_PCR_ECCSS_2048);
+
+	/* Set default tclr/tar timings */
+	pcr &= ~FMC2_PCR_TCLR_MASK;
+	pcr |= FMC2_PCR_TCLR(FMC2_PCR_TCLR_DEFAULT);
+	pcr &= ~FMC2_PCR_TAR_MASK;
+	pcr |= FMC2_PCR_TAR(FMC2_PCR_TAR_DEFAULT);
+
+	/* Enable FMC2 controller */
+	bcr1 |= FMC2_BCR1_FMC2EN;
+
+	writel(bcr1, fmc2->io_base + FMC2_BCR1);
+	writel(pcr, fmc2->io_base + FMC2_PCR);
+	writel(FMC2_PMEM_DEFAULT, fmc2->io_base + FMC2_PMEM);
+	writel(FMC2_PATT_DEFAULT, fmc2->io_base + FMC2_PATT);
+}
+
+/* Controller timings */
+static void stm32_fmc2_calc_timings(struct nand_chip *chip,
+				    const struct nand_sdr_timings *sdrt)
+{
+	struct stm32_fmc2_nfc *fmc2 = to_stm32_nfc(chip->controller);
+	struct stm32_fmc2_nand *nand = to_fmc2_nand(chip);
+	struct stm32_fmc2_timings *tims = &nand->timings;
+	unsigned long hclk = clk_get_rate(&fmc2->clk);
+	unsigned long hclkp = FMC2_NSEC_PER_SEC / (hclk / 1000);
+	int tar, tclr, thiz, twait, tset_mem, tset_att, thold_mem, thold_att;
+
+	tar = hclkp;
+	if (tar < sdrt->tAR_min)
+		tar = sdrt->tAR_min;
+	tims->tar = DIV_ROUND_UP(tar, hclkp) - 1;
+	if (tims->tar > FMC2_PCR_TIMING_MASK)
+		tims->tar = FMC2_PCR_TIMING_MASK;
+
+	tclr = hclkp;
+	if (tclr < sdrt->tCLR_min)
+		tclr = sdrt->tCLR_min;
+	tims->tclr = DIV_ROUND_UP(tclr, hclkp) - 1;
+	if (tims->tclr > FMC2_PCR_TIMING_MASK)
+		tims->tclr = FMC2_PCR_TIMING_MASK;
+
+	tims->thiz = FMC2_THIZ;
+	thiz = (tims->thiz + 1) * hclkp;
+
+	/*
+	 * tWAIT > tRP
+	 * tWAIT > tWP
+	 * tWAIT > tREA + tIO
+	 */
+	twait = hclkp;
+	if (twait < sdrt->tRP_min)
+		twait = sdrt->tRP_min;
+	if (twait < sdrt->tWP_min)
+		twait = sdrt->tWP_min;
+	if (twait < sdrt->tREA_max + FMC2_TIO)
+		twait = sdrt->tREA_max + FMC2_TIO;
+	tims->twait = DIV_ROUND_UP(twait, hclkp);
+	if (tims->twait == 0)
+		tims->twait = 1;
+	else if (tims->twait > FMC2_PMEM_PATT_TIMING_MASK)
+		tims->twait = FMC2_PMEM_PATT_TIMING_MASK;
+
+	/*
+	 * tSETUP_MEM > tCS - tWAIT
+	 * tSETUP_MEM > tALS - tWAIT
+	 * tSETUP_MEM > tDS - (tWAIT - tHIZ)
+	 */
+	tset_mem = hclkp;
+	if (sdrt->tCS_min > twait && (tset_mem < sdrt->tCS_min - twait))
+		tset_mem = sdrt->tCS_min - twait;
+	if (sdrt->tALS_min > twait && (tset_mem < sdrt->tALS_min - twait))
+		tset_mem = sdrt->tALS_min - twait;
+	if (twait > thiz && (sdrt->tDS_min > twait - thiz) &&
+	    (tset_mem < sdrt->tDS_min - (twait - thiz)))
+		tset_mem = sdrt->tDS_min - (twait - thiz);
+	tims->tset_mem = DIV_ROUND_UP(tset_mem, hclkp);
+	if (tims->tset_mem == 0)
+		tims->tset_mem = 1;
+	else if (tims->tset_mem > FMC2_PMEM_PATT_TIMING_MASK)
+		tims->tset_mem = FMC2_PMEM_PATT_TIMING_MASK;
+
+	/*
+	 * tHOLD_MEM > tCH
+	 * tHOLD_MEM > tREH - tSETUP_MEM
+	 * tHOLD_MEM > max(tRC, tWC) - (tSETUP_MEM + tWAIT)
+	 */
+	thold_mem = hclkp;
+	if (thold_mem < sdrt->tCH_min)
+		thold_mem = sdrt->tCH_min;
+	if (sdrt->tREH_min > tset_mem &&
+	    (thold_mem < sdrt->tREH_min - tset_mem))
+		thold_mem = sdrt->tREH_min - tset_mem;
+	if ((sdrt->tRC_min > tset_mem + twait) &&
+	    (thold_mem < sdrt->tRC_min - (tset_mem + twait)))
+		thold_mem = sdrt->tRC_min - (tset_mem + twait);
+	if ((sdrt->tWC_min > tset_mem + twait) &&
+	    (thold_mem < sdrt->tWC_min - (tset_mem + twait)))
+		thold_mem = sdrt->tWC_min - (tset_mem + twait);
+	tims->thold_mem = DIV_ROUND_UP(thold_mem, hclkp);
+	if (tims->thold_mem == 0)
+		tims->thold_mem = 1;
+	else if (tims->thold_mem > FMC2_PMEM_PATT_TIMING_MASK)
+		tims->thold_mem = FMC2_PMEM_PATT_TIMING_MASK;
+
+	/*
+	 * tSETUP_ATT > tCS - tWAIT
+	 * tSETUP_ATT > tCLS - tWAIT
+	 * tSETUP_ATT > tALS - tWAIT
+	 * tSETUP_ATT > tRHW - tHOLD_MEM
+	 * tSETUP_ATT > tDS - (tWAIT - tHIZ)
+	 */
+	tset_att = hclkp;
+	if (sdrt->tCS_min > twait && (tset_att < sdrt->tCS_min - twait))
+		tset_att = sdrt->tCS_min - twait;
+	if (sdrt->tCLS_min > twait && (tset_att < sdrt->tCLS_min - twait))
+		tset_att = sdrt->tCLS_min - twait;
+	if (sdrt->tALS_min > twait && (tset_att < sdrt->tALS_min - twait))
+		tset_att = sdrt->tALS_min - twait;
+	if (sdrt->tRHW_min > thold_mem &&
+	    (tset_att < sdrt->tRHW_min - thold_mem))
+		tset_att = sdrt->tRHW_min - thold_mem;
+	if (twait > thiz && (sdrt->tDS_min > twait - thiz) &&
+	    (tset_att < sdrt->tDS_min - (twait - thiz)))
+		tset_att = sdrt->tDS_min - (twait - thiz);
+	tims->tset_att = DIV_ROUND_UP(tset_att, hclkp);
+	if (tims->tset_att == 0)
+		tims->tset_att = 1;
+	else if (tims->tset_att > FMC2_PMEM_PATT_TIMING_MASK)
+		tims->tset_att = FMC2_PMEM_PATT_TIMING_MASK;
+
+	/*
+	 * tHOLD_ATT > tALH
+	 * tHOLD_ATT > tCH
+	 * tHOLD_ATT > tCLH
+	 * tHOLD_ATT > tCOH
+	 * tHOLD_ATT > tDH
+	 * tHOLD_ATT > tWB + tIO + tSYNC - tSETUP_MEM
+	 * tHOLD_ATT > tADL - tSETUP_MEM
+	 * tHOLD_ATT > tWH - tSETUP_MEM
+	 * tHOLD_ATT > tWHR - tSETUP_MEM
+	 * tHOLD_ATT > tRC - (tSETUP_ATT + tWAIT)
+	 * tHOLD_ATT > tWC - (tSETUP_ATT + tWAIT)
+	 */
+	thold_att = hclkp;
+	if (thold_att < sdrt->tALH_min)
+		thold_att = sdrt->tALH_min;
+	if (thold_att < sdrt->tCH_min)
+		thold_att = sdrt->tCH_min;
+	if (thold_att < sdrt->tCLH_min)
+		thold_att = sdrt->tCLH_min;
+	if (thold_att < sdrt->tCOH_min)
+		thold_att = sdrt->tCOH_min;
+	if (thold_att < sdrt->tDH_min)
+		thold_att = sdrt->tDH_min;
+	if ((sdrt->tWB_max + FMC2_TIO + FMC2_TSYNC > tset_mem) &&
+	    (thold_att < sdrt->tWB_max + FMC2_TIO + FMC2_TSYNC - tset_mem))
+		thold_att = sdrt->tWB_max + FMC2_TIO + FMC2_TSYNC - tset_mem;
+	if (sdrt->tADL_min > tset_mem &&
+	    (thold_att < sdrt->tADL_min - tset_mem))
+		thold_att = sdrt->tADL_min - tset_mem;
+	if (sdrt->tWH_min > tset_mem &&
+	    (thold_att < sdrt->tWH_min - tset_mem))
+		thold_att = sdrt->tWH_min - tset_mem;
+	if (sdrt->tWHR_min > tset_mem &&
+	    (thold_att < sdrt->tWHR_min - tset_mem))
+		thold_att = sdrt->tWHR_min - tset_mem;
+	if ((sdrt->tRC_min > tset_att + twait) &&
+	    (thold_att < sdrt->tRC_min - (tset_att + twait)))
+		thold_att = sdrt->tRC_min - (tset_att + twait);
+	if ((sdrt->tWC_min > tset_att + twait) &&
+	    (thold_att < sdrt->tWC_min - (tset_att + twait)))
+		thold_att = sdrt->tWC_min - (tset_att + twait);
+	tims->thold_att = DIV_ROUND_UP(thold_att, hclkp);
+	if (tims->thold_att == 0)
+		tims->thold_att = 1;
+	else if (tims->thold_att > FMC2_PMEM_PATT_TIMING_MASK)
+		tims->thold_att = FMC2_PMEM_PATT_TIMING_MASK;
+}
+
+static int stm32_fmc2_setup_interface(struct mtd_info *mtd, int chipnr,
+				      const struct nand_data_interface *conf)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	const struct nand_sdr_timings *sdrt;
+
+	sdrt = nand_get_sdr_timings(conf);
+	if (IS_ERR(sdrt))
+		return PTR_ERR(sdrt);
+
+	if (chipnr == NAND_DATA_IFACE_CHECK_ONLY)
+		return 0;
+
+	stm32_fmc2_calc_timings(chip, sdrt);
+
+	/* Apply timings */
+	stm32_fmc2_timings_init(chip);
+
+	return 0;
+}
+
+/* NAND callbacks setup */
+static void stm32_fmc2_nand_callbacks_setup(struct nand_chip *chip)
+{
+	chip->ecc.hwctl = stm32_fmc2_hwctl;
+
+	/*
+	 * Specific callbacks to read/write a page depending on
+	 * the algo used (Hamming, BCH).
+	 */
+	if (chip->ecc.strength == FMC2_ECC_HAM) {
+		/* Hamming is used */
+		chip->ecc.calculate = stm32_fmc2_ham_calculate;
+		chip->ecc.correct = stm32_fmc2_ham_correct;
+		chip->ecc.bytes = chip->options & NAND_BUSWIDTH_16 ? 4 : 3;
+		chip->ecc.options |= NAND_ECC_GENERIC_ERASED_CHECK;
+		return;
+	}
+
+	/* BCH is used */
+	chip->ecc.read_page = stm32_fmc2_read_page;
+	chip->ecc.calculate = stm32_fmc2_bch_calculate;
+	chip->ecc.correct = stm32_fmc2_bch_correct;
+
+	if (chip->ecc.strength == FMC2_ECC_BCH8)
+		chip->ecc.bytes = chip->options & NAND_BUSWIDTH_16 ? 14 : 13;
+	else
+		chip->ecc.bytes = chip->options & NAND_BUSWIDTH_16 ? 8 : 7;
+}
+
+/* FMC2 caps */
+static int stm32_fmc2_calc_ecc_bytes(int step_size, int strength)
+{
+	/* Hamming */
+	if (strength == FMC2_ECC_HAM)
+		return 4;
+
+	/* BCH8 */
+	if (strength == FMC2_ECC_BCH8)
+		return 14;
+
+	/* BCH4 */
+	return 8;
+}
+
+NAND_ECC_CAPS_SINGLE(stm32_fmc2_ecc_caps, stm32_fmc2_calc_ecc_bytes,
+		     FMC2_ECC_STEP_SIZE,
+		     FMC2_ECC_HAM, FMC2_ECC_BCH4, FMC2_ECC_BCH8);
+
+/* FMC2 probe */
+static int stm32_fmc2_parse_child(struct stm32_fmc2_nfc *fmc2,
+				  ofnode node)
+{
+	struct stm32_fmc2_nand *nand = &fmc2->nand;
+	u32 cs[FMC2_MAX_CE];
+	int ret, i;
+
+	if (!ofnode_get_property(node, "reg", &nand->ncs))
+		return -EINVAL;
+
+	nand->ncs /= sizeof(u32);
+	if (!nand->ncs) {
+		pr_err("Invalid reg property size\n");
+		return -EINVAL;
+	}
+
+	ret = ofnode_read_u32_array(node, "reg", cs, nand->ncs);
+	if (ret < 0) {
+		pr_err("Could not retrieve reg property\n");
+		return -EINVAL;
+	}
+
+	for (i = 0; i < nand->ncs; i++) {
+		if (cs[i] > FMC2_MAX_CE) {
+			pr_err("Invalid reg value: %d\n",
+			       nand->cs_used[i]);
+			return -EINVAL;
+		}
+
+		if (fmc2->cs_assigned & BIT(cs[i])) {
+			pr_err("Cs already assigned: %d\n",
+			       nand->cs_used[i]);
+			return -EINVAL;
+		}
+
+		fmc2->cs_assigned |= BIT(cs[i]);
+		nand->cs_used[i] = cs[i];
+	}
+
+	nand->chip.flash_node = ofnode_to_offset(node);
+
+	return 0;
+}
+
+static int stm32_fmc2_parse_dt(struct udevice *dev,
+			       struct stm32_fmc2_nfc *fmc2)
+{
+	ofnode child;
+	int ret, nchips = 0;
+
+	dev_for_each_subnode(child, dev)
+		nchips++;
+
+	if (!nchips) {
+		pr_err("NAND chip not defined\n");
+		return -EINVAL;
+	}
+
+	if (nchips > 1) {
+		pr_err("Too many NAND chips defined\n");
+		return -EINVAL;
+	}
+
+	dev_for_each_subnode(child, dev) {
+		ret = stm32_fmc2_parse_child(fmc2, child);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+static int stm32_fmc2_probe(struct udevice *dev)
+{
+	struct stm32_fmc2_nfc *fmc2 = dev_get_priv(dev);
+	struct stm32_fmc2_nand *nand = &fmc2->nand;
+	struct nand_chip *chip = &nand->chip;
+	struct mtd_info *mtd = &chip->mtd;
+	struct nand_ecclayout *ecclayout;
+	struct resource resource;
+	struct reset_ctl reset;
+	int oob_index, chip_cs, mem_region, ret, i;
+
+	spin_lock_init(&fmc2->controller.lock);
+	init_waitqueue_head(&fmc2->controller.wq);
+
+	ret = stm32_fmc2_parse_dt(dev, fmc2);
+	if (ret)
+		return ret;
+
+	/* Get resources */
+	ret = dev_read_resource(dev, 0, &resource);
+	if (ret) {
+		pr_err("Resource io_base not found");
+		return ret;
+	}
+	fmc2->io_base = (void __iomem *)resource.start;
+
+	for (chip_cs = 0, mem_region = 1; chip_cs < FMC2_MAX_CE;
+	     chip_cs++, mem_region += 3) {
+		if (!(fmc2->cs_assigned & BIT(chip_cs)))
+			continue;
+
+		ret = dev_read_resource(dev, mem_region, &resource);
+		if (ret) {
+			pr_err("Resource data_base not found for cs%d",
+			       chip_cs);
+			return ret;
+		}
+		fmc2->data_base[chip_cs] = (void __iomem *)resource.start;
+
+		ret = dev_read_resource(dev, mem_region + 1, &resource);
+		if (ret) {
+			pr_err("Resource cmd_base not found for cs%d",
+			       chip_cs);
+			return ret;
+		}
+		fmc2->cmd_base[chip_cs] = (void __iomem *)resource.start;
+
+		ret = dev_read_resource(dev, mem_region + 2, &resource);
+		if (ret) {
+			pr_err("Resource addr_base not found for cs%d",
+			       chip_cs);
+			return ret;
+		}
+		fmc2->addr_base[chip_cs] = (void __iomem *)resource.start;
+	}
+
+	/* Enable the clock */
+	ret = clk_get_by_index(dev, 0, &fmc2->clk);
+	if (ret)
+		return ret;
+
+	ret = clk_enable(&fmc2->clk);
+	if (ret)
+		return ret;
+
+	/* Reset */
+	ret = reset_get_by_index(dev, 0, &reset);
+	if (!ret) {
+		reset_assert(&reset);
+		udelay(2);
+		reset_deassert(&reset);
+	}
+
+	/* FMC2 init routine */
+	stm32_fmc2_init(fmc2);
+
+	chip->controller = &fmc2->base;
+	chip->select_chip = stm32_fmc2_select_chip;
+	chip->setup_data_interface = stm32_fmc2_setup_interface;
+	chip->cmd_ctrl = stm32_fmc2_cmd_ctrl;
+	chip->chip_delay = FMC2_RB_DELAY_US;
+	chip->options |= NAND_BUSWIDTH_AUTO | NAND_NO_SUBPAGE_WRITE |
+			 NAND_USE_BOUNCE_BUFFER;
+
+	/* Default ECC settings */
+	chip->ecc.mode = NAND_ECC_HW;
+	chip->ecc.size = FMC2_ECC_STEP_SIZE;
+	chip->ecc.strength = FMC2_ECC_BCH8;
+
+	/* Scan to find existence of the device */
+	ret = nand_scan_ident(mtd, nand->ncs, NULL);
+	if (ret)
+		return ret;
+
+	/*
+	 * Only NAND_ECC_HW mode is actually supported
+	 * Hamming => ecc.strength = 1
+	 * BCH4 => ecc.strength = 4
+	 * BCH8 => ecc.strength = 8
+	 * ECC sector size = 512
+	 */
+	if (chip->ecc.mode != NAND_ECC_HW) {
+		pr_err("Nand_ecc_mode is not well defined in the DT\n");
+		return -EINVAL;
+	}
+
+	ret = nand_check_ecc_caps(chip, &stm32_fmc2_ecc_caps,
+				  mtd->oobsize - FMC2_BBM_LEN);
+	if (ret) {
+		pr_err("No valid ECC settings set\n");
+		return ret;
+	}
+
+	if (chip->bbt_options & NAND_BBT_USE_FLASH)
+		chip->bbt_options |= NAND_BBT_NO_OOB;
+
+	/* NAND callbacks setup */
+	stm32_fmc2_nand_callbacks_setup(chip);
+
+	/* Define ECC layout */
+	ecclayout = &fmc2->ecclayout;
+	ecclayout->eccbytes = chip->ecc.bytes *
+			      (mtd->writesize / chip->ecc.size);
+	oob_index = FMC2_BBM_LEN;
+	for (i = 0; i < ecclayout->eccbytes; i++, oob_index++)
+		ecclayout->eccpos[i] = oob_index;
+	ecclayout->oobfree->offset = oob_index;
+	ecclayout->oobfree->length = mtd->oobsize - ecclayout->oobfree->offset;
+	chip->ecc.layout = ecclayout;
+
+	/* Configure bus width to 16-bit */
+	if (chip->options & NAND_BUSWIDTH_16)
+		stm32_fmc2_set_buswidth_16(fmc2, true);
+
+	/* Scan the device to fill MTD data-structures */
+	ret = nand_scan_tail(mtd);
+	if (ret)
+		return ret;
+
+	return nand_register(0, mtd);
+}
+
+static const struct udevice_id stm32_fmc2_match[] = {
+	{ .compatible = "st,stm32mp15-fmc2" },
+	{ /* Sentinel */ }
+};
+
+U_BOOT_DRIVER(stm32_fmc2_nand) = {
+	.name = "stm32_fmc2_nand",
+	.id = UCLASS_MTD,
+	.of_match = stm32_fmc2_match,
+	.probe = stm32_fmc2_probe,
+	.priv_auto_alloc_size = sizeof(struct stm32_fmc2_nfc),
+};
+
+void board_nand_init(void)
+{
+	struct udevice *dev;
+	int ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_MTD,
+					  DM_GET_DRIVER(stm32_fmc2_nand),
+					  &dev);
+	if (ret && ret != -ENODEV)
+		pr_err("Failed to initialize STM32 FMC2 NAND controller. (error %d)\n",
+		       ret);
+}

commit af9eba54b2a5d9b530b878d801a2870d8d92b180
Author: Neil Armstrong <narmstrong@baylibre.com>
Date:   Fri Apr 12 11:50:10 2019 +0200

    UPSTREAM: mtd: spi-nor-ids: Add Gigadevice gd25lq128 ID
    
    This adds support for the Gigadevice gd25lq128 ID needed on the
    upcoming libretech-ac board.
    
    SPI_NOR_QUAD_READ is not set since it has not been tested in Quad
    mode.
    
    Change-Id: If9b3b25e63bffbecff454dde94e5cb418a5d3cf6
    Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
    Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 30b9a28a3f2dc599dc9c6d6d6c015fb89bed95bf)

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 9633001514..ec929760ee 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -106,6 +106,11 @@ const struct flash_info spi_nor_ids[] = {
 			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
 			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
 	},
+	{
+		INFO("gd25lq128", 0xc86018, 0, 64 * 1024, 256,
+			SECT_4K | SPI_NOR_DUAL_READ |
+			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+	},
 #endif
 #ifdef CONFIG_SPI_FLASH_ISSI		/* ISSI */
 	/* ISSI */

commit ee9b3572a4be046beaf1f0bfd8907c845e20288d
Author: Patrick Delaunay <patrick.delaunay@st.com>
Date:   Wed Feb 27 15:36:44 2019 +0100

    UPSTREAM: dm: spi: Read default speed and mode values from DT
    
    This patch update the behavior introduced by
    commit 96907c0fe50a ("dm: spi: Read default speed and mode values from DT")
    
    In case of DT boot, don't read default speed and mode for SPI from
    CONFIG_* but instead read from DT node. This will make sure that boards
    with multiple SPI/QSPI controllers can be probed at different
    bus frequencies and SPI modes.
    
    Remove also use in boards of the value speed=0 (no more supported)
    for ENV in SPI by using CONFIG_ENV_SPI_MAX_HZ=0.
    
    DT values will be always used when available (full DM support of
    SPI slave with available DT node) even if speed and mode are requested;
    for example in splash screen support (in splash_sf_read_raw)
    or in SPL boot (in spl_spi_load_image).
    The caller of spi_get_bus_and_cs() no more need to force speed=0.
    
    But the current behavior don't change if the SPI slave is not
    present (device with generic driver is created automatically)
    or if platdata is used (CONFIG_OF_PLATDATA).
    
    Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
    Acked-by: Jagan Teki <jagan@amarulasolutions.com>
    Change-Id: I6f5990b73f33815a7acb9b5da9c90dce48b6211d
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit b0cc1b846fcb310c0ac2f8cbeb4ed5947dc52912)

diff --git a/cmd/sf.c b/cmd/sf.c
index 9953895268..66832a7e37 100644
--- a/cmd/sf.c
+++ b/cmd/sf.c
@@ -82,14 +82,13 @@ static int do_spi_flash_probe(int argc, char * const argv[])
 {
 	unsigned int bus = CONFIG_SF_DEFAULT_BUS;
 	unsigned int cs = CONFIG_SF_DEFAULT_CS;
+	/* In DM mode, defaults speed and mode will be taken from DT */
 	unsigned int speed = CONFIG_SF_DEFAULT_SPEED;
 	unsigned int mode = CONFIG_SF_DEFAULT_MODE;
 	char *endp;
 #ifdef CONFIG_DM_SPI_FLASH
 	struct udevice *new, *bus_dev;
 	int ret;
-	/* In DM mode defaults will be taken from DT */
-	speed = 0, mode = 0;
 #else
 	struct spi_flash *new;
 #endif
diff --git a/common/spl/spl_spi.c b/common/spl/spl_spi.c
index 16dee3a247..b3507eaf4b 100644
--- a/common/spl/spl_spi.c
+++ b/common/spl/spl_spi.c
@@ -78,6 +78,8 @@ static int spl_spi_load_image(struct spl_image_info *spl_image,
 
 	/*
 	 * Load U-Boot image from SPI flash into RAM
+	 * In DM mode: defaults speed and mode will be
+	 * taken from DT when available
 	 */
 
 	flash = spi_flash_probe(CONFIG_SF_DEFAULT_BUS,
diff --git a/configs/mscc_jr2_defconfig b/configs/mscc_jr2_defconfig
new file mode 100644
index 0000000000..9276df22a5
--- /dev/null
+++ b/configs/mscc_jr2_defconfig
@@ -0,0 +1,64 @@
+CONFIG_MIPS=y
+CONFIG_SYS_TEXT_BASE=0x40000000
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_BASE=0x70100000
+CONFIG_DEBUG_UART_CLOCK=250000000
+CONFIG_ARCH_MSCC=y
+CONFIG_SOC_JR2=y
+CONFIG_SYS_LITTLE_ENDIAN=y
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200"
+CONFIG_LOGLEVEL=7
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_SYS_PROMPT="jr2 # "
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_CONSOLE is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_EXPORTENV is not set
+# CONFIG_CMD_IMPORTENV is not set
+# CONFIG_CMD_CRC32 is not set
+CONFIG_CMD_MD5SUM=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+# CONFIG_CMD_NET is not set
+CONFIG_CMD_MTDPARTS=y
+CONFIG_MTDIDS_DEFAULT="nor0=spi_flash"
+CONFIG_MTDPARTS_DEFAULT="mtdparts=spi_flash:1m(UBoot),256k(Env),256k(Env.bk)"
+# CONFIG_ISO_PARTITION is not set
+CONFIG_DEFAULT_DEVICE_TREE="jr2_pcb110"
+CONFIG_OF_LIST="jr2_pcb110 jr2_pcb111 serval2_pcb112"
+CONFIG_DTB_RESELECT=y
+CONFIG_MULTI_DTB_FIT=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_CLK=y
+CONFIG_DM_GPIO=y
+CONFIG_MSCC_SGPIO=y
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPI_FLASH_MTD=y
+CONFIG_DM_ETH=y
+CONFIG_PINCTRL=y
+CONFIG_PINCONF=y
+CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_LZMA=y
diff --git a/configs/mscc_luton_defconfig b/configs/mscc_luton_defconfig
new file mode 100644
index 0000000000..0fdd9b8f3f
--- /dev/null
+++ b/configs/mscc_luton_defconfig
@@ -0,0 +1,72 @@
+CONFIG_MIPS=y
+CONFIG_SYS_TEXT_BASE=0x40000000
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_BASE=0x70100000
+CONFIG_DEBUG_UART_CLOCK=208333333
+CONFIG_ARCH_MSCC=y
+CONFIG_SOC_LUTON=y
+CONFIG_DDRTYPE_MT47H128M8HQ=y
+CONFIG_SYS_LITTLE_ENDIAN=y
+CONFIG_MIPS_BOOT_FDT=y
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200"
+CONFIG_LOGLEVEL=7
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_SYS_PROMPT="luton # "
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_CONSOLE is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_EXPORTENV is not set
+# CONFIG_CMD_IMPORTENV is not set
+# CONFIG_CMD_CRC32 is not set
+CONFIG_CMD_MD5SUM=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_DHCP=y
+# CONFIG_NET_TFTP_VARS is not set
+# CONFIG_CMD_NFS is not set
+CONFIG_CMD_PING=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_MTDIDS_DEFAULT="nor0=spi_flash"
+CONFIG_MTDPARTS_DEFAULT="mtdparts=spi_flash:512k(UBoot),256k(Env),256k(conf),6m@1m(linux)"
+# CONFIG_ISO_PARTITION is not set
+CONFIG_DEFAULT_DEVICE_TREE="luton_pcb091"
+CONFIG_OF_LIST="luton_pcb090 luton_pcb091"
+CONFIG_DTB_RESELECT=y
+CONFIG_MULTI_DTB_FIT=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_CLK=y
+CONFIG_DM_GPIO=y
+CONFIG_MSCC_SGPIO=y
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPI_FLASH_MTD=y
+CONFIG_DM_ETH=y
+CONFIG_MSCC_LUTON_SWITCH=y
+CONFIG_PINCTRL=y
+CONFIG_PINCONF=y
+CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_MSCC_BB_SPI=y
+CONFIG_LZMA=y
diff --git a/configs/mscc_ocelot_defconfig b/configs/mscc_ocelot_defconfig
new file mode 100644
index 0000000000..edc476d143
--- /dev/null
+++ b/configs/mscc_ocelot_defconfig
@@ -0,0 +1,72 @@
+CONFIG_MIPS=y
+CONFIG_SYS_TEXT_BASE=0x40000000
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_BASE=0x70100000
+CONFIG_DEBUG_UART_CLOCK=250000000
+CONFIG_ARCH_MSCC=y
+CONFIG_SYS_LITTLE_ENDIAN=y
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200"
+CONFIG_LOGLEVEL=7
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_SYS_PROMPT="ocelot # "
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_CONSOLE is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_EXPORTENV is not set
+# CONFIG_CMD_IMPORTENV is not set
+# CONFIG_CMD_CRC32 is not set
+CONFIG_CMD_MD5SUM=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_DHCP=y
+# CONFIG_NET_TFTP_VARS is not set
+# CONFIG_CMD_NFS is not set
+CONFIG_CMD_PING=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_MTDIDS_DEFAULT="nor0=spi_flash"
+CONFIG_MTDPARTS_DEFAULT="mtdparts=spi_flash:512k(UBoot),256k(Env),256k(conf),15m(linux),15m(linux.bk)"
+CONFIG_CMD_UBI=y
+# CONFIG_CMD_UBIFS is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_DEFAULT_DEVICE_TREE="ocelot_pcb123"
+CONFIG_OF_LIST="ocelot_pcb120 ocelot_pcb123"
+CONFIG_DTB_RESELECT=y
+CONFIG_MULTI_DTB_FIT=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_CLK=y
+CONFIG_DM_GPIO=y
+CONFIG_MSCC_SGPIO=y
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
+CONFIG_MTD=y
+CONFIG_MTD_SPI_NAND=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPI_FLASH_MTD=y
+CONFIG_DM_ETH=y
+CONFIG_MSCC_OCELOT_SWITCH=y
+CONFIG_PINCTRL=y
+CONFIG_PINCONF=y
+CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_LZMA=y
diff --git a/configs/mscc_serval_defconfig b/configs/mscc_serval_defconfig
new file mode 100644
index 0000000000..146188bb0c
--- /dev/null
+++ b/configs/mscc_serval_defconfig
@@ -0,0 +1,60 @@
+CONFIG_MIPS=y
+CONFIG_SYS_TEXT_BASE=0x40000000
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_ARCH_MSCC=y
+CONFIG_SOC_SERVAL=y
+CONFIG_DDRTYPE_H5TQ1G63BFA=y
+CONFIG_SYS_LITTLE_ENDIAN=y
+CONFIG_FIT=y
+CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200"
+CONFIG_LOGLEVEL=7
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_SYS_PROMPT="serval # "
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_CONSOLE is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_EXPORTENV is not set
+# CONFIG_CMD_IMPORTENV is not set
+# CONFIG_CMD_CRC32 is not set
+CONFIG_CMD_MD5SUM=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+# CONFIG_CMD_NFS is not set
+CONFIG_CMD_MTDPARTS=y
+CONFIG_MTDIDS_DEFAULT="nor0=spi_flash"
+CONFIG_MTDPARTS_DEFAULT="mtdparts=spi_flash:1m(UBoot),256k(Env),256k(Env.bk)"
+# CONFIG_ISO_PARTITION is not set
+CONFIG_DEFAULT_DEVICE_TREE="serval_pcb106"
+CONFIG_OF_LIST="serval_pcb106 serval_pcb105"
+CONFIG_DTB_RESELECT=y
+CONFIG_MULTI_DTB_FIT=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_CLK=y
+CONFIG_DM_GPIO=y
+CONFIG_MSCC_SGPIO=y
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPI_FLASH_MTD=y
+CONFIG_DM_ETH=y
+CONFIG_PINCTRL=y
+CONFIG_PINCONF=y
+CONFIG_DM_SERIAL=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_LZMA=y
diff --git a/configs/mscc_servalt_defconfig b/configs/mscc_servalt_defconfig
new file mode 100644
index 0000000000..a450f48018
--- /dev/null
+++ b/configs/mscc_servalt_defconfig
@@ -0,0 +1,57 @@
+CONFIG_MIPS=y
+CONFIG_SYS_TEXT_BASE=0x40000000
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_ARCH_MSCC=y
+CONFIG_SOC_SERVALT=y
+CONFIG_SYS_LITTLE_ENDIAN=y
+CONFIG_FIT=y
+CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200"
+CONFIG_LOGLEVEL=7
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_SYS_PROMPT="servalt # "
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_CONSOLE is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_EXPORTENV is not set
+# CONFIG_CMD_IMPORTENV is not set
+# CONFIG_CMD_CRC32 is not set
+CONFIG_CMD_MD5SUM=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+# CONFIG_CMD_NET is not set
+CONFIG_CMD_MTDPARTS=y
+CONFIG_MTDIDS_DEFAULT="nor0=spi_flash"
+CONFIG_MTDPARTS_DEFAULT="mtdparts=spi_flash:1m(UBoot),256k(Env),256k(Env.bk)"
+# CONFIG_ISO_PARTITION is not set
+CONFIG_DEFAULT_DEVICE_TREE="servalt_pcb116"
+CONFIG_DTB_RESELECT=y
+CONFIG_MULTI_DTB_FIT=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_CLK=y
+CONFIG_DM_GPIO=y
+CONFIG_MSCC_SGPIO=y
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPI_FLASH_MTD=y
+CONFIG_DM_ETH=y
+CONFIG_PINCTRL=y
+CONFIG_PINCONF=y
+CONFIG_DM_SERIAL=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_LZMA=y
diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig
index e3b40fc157..d3b007a731 100644
--- a/drivers/mtd/spi/Kconfig
+++ b/drivers/mtd/spi/Kconfig
@@ -36,6 +36,48 @@ config SPI_FLASH
 
 	  If unsure, say N
 
+config SF_DEFAULT_BUS
+	int "SPI Flash default bus identifier"
+	depends on SPI_FLASH || DM_SPI_FLASH
+	default 0
+	help
+	  The default bus may be provided by the platform
+	  to handle the common case when only a single serial
+	  flash is present on the system.
+
+config SF_DEFAULT_CS
+	int "SPI Flash default Chip-select"
+	depends on SPI_FLASH || DM_SPI_FLASH
+	default 0
+	help
+	  The default chip select may be provided by the platform
+	  to handle the common case when only a single serial
+	  flash is present on the system.
+
+config SF_DEFAULT_MODE
+	hex "SPI Flash default mode (see include/spi.h)"
+	depends on SPI_FLASH || DM_SPI_FLASH
+	default 3
+	help
+	  The default mode may be provided by the platform
+	  to handle the common case when only a single serial
+	  flash is present on the system.
+	  Not used for boot with device tree; the SPI driver reads
+	  speed and mode from platdata values computed from
+	  available node.
+
+config SF_DEFAULT_SPEED
+	int "SPI Flash default speed in Hz"
+	depends on SPI_FLASH || DM_SPI_FLASH
+	default 1000000
+	help
+	  The default speed may be provided by the platform
+	  to handle the common case when only a single serial
+	  flash is present on the system.
+	  Not used for boot with device tree; the SPI driver reads
+	  speed and mode from platdata values computed from
+	  available node.
+
 if SPI_FLASH
 
 config SPI_FLASH_SFDP_SUPPORT
diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c
index a01896cc5f..97536cadfd 100644
--- a/drivers/spi/spi-uclass.c
+++ b/drivers/spi/spi-uclass.c
@@ -322,7 +322,9 @@ int spi_get_bus_and_cs(int busnum, int cs, int speed, int mode,
 	}
 
 	plat = dev_get_parent_platdata(dev);
-	if (!speed) {
+
+	/* get speed and mode from platdata when available */
+	if (plat->max_hz) {
 		speed = plat->max_hz;
 		mode = plat->mode;
 	}
diff --git a/include/spi.h b/include/spi.h
index 4678e94b1f..4a7ad1a132 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -532,14 +532,15 @@ int spi_find_bus_and_cs(int busnum, int cs, struct udevice **busp,
  * device and slave device.
  *
  * If no such slave exists, and drv_name is not NULL, then a new slave device
- * is automatically bound on this chip select.
+ * is automatically bound on this chip select with requested speed and mode.
  *
- * Ths new slave device is probed ready for use with the given speed and mode.
+ * Ths new slave device is probed ready for use with the speed and mode
+ * from platdata when available or the requested values.
  *
  * @busnum:	SPI bus number
  * @cs:		Chip select to look for
- * @speed:	SPI speed to use for this slave
- * @mode:	SPI mode to use for this slave
+ * @speed:	SPI speed to use for this slave when not available in platdata
+ * @mode:	SPI mode to use for this slave when not available in platdata
  * @drv_name:	Name of driver to attach to this chip select
  * @dev_name:	Name of the new device thus created
  * @busp:	Returns bus device

commit c4a1b0553e4ccc4504ae9f26b74a896cf6ef8858
Author: Marek Vasut <marek.vasut@gmail.com>
Date:   Tue Apr 2 02:52:53 2019 +0200

    UPSTREAM: mtd: spi: Replace ad-hoc default implementation with spi_mem_op
    
    Replace the ad-hoc erase operation implementation with a simple spi_mem_op
    implementation of the same functionality. This is a minor optimization and
    removal of the ad-hoc code.
    
    This however also changes the behavior of the execution of the erase
    opcode from two separate transfer requests to the SPI NOR driver to
    one transfer request to the SPI NOR driver. The former was how U-Boot
    behaved before the SPI NOR framework was imported and the later was
    introduced by the SPI NOR framework. The former is more optimal, so
    keep that.
    
    Change-Id: Ie8f39dff83fd7f49b606c813be0260a159257ac9
    Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
    Cc: Horatiu Vultur <horatiu.vultur@microchip.com>
    Cc: Jagan Teki <jagan@openedev.com>
    Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
    Cc: Stefan Roese <sr@denx.de>
    Cc: Vignesh R <vigneshr@ti.com>
    Tested-by: Ashish Kumar <Ashish.kumar@nxp.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit f909ddb3e1770a5ef18606b46000e0d3eaf63b2e)

diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index b7f0733877..c4e2f6a08f 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -524,8 +524,11 @@ static int read_bar(struct spi_nor *nor, const struct flash_info *info)
  */
 static int spi_nor_erase_sector(struct spi_nor *nor, u32 addr)
 {
-	u8 buf[SPI_NOR_MAX_ADDR_WIDTH];
-	int i;
+	struct spi_mem_op op =
+		SPI_MEM_OP(SPI_MEM_OP_CMD(nor->erase_opcode, 1),
+			   SPI_MEM_OP_ADDR(nor->addr_width, addr, 1),
+			   SPI_MEM_OP_NO_DUMMY,
+			   SPI_MEM_OP_NO_DATA);
 
 	if (nor->erase)
 		return nor->erase(nor, addr);
@@ -534,12 +537,7 @@ static int spi_nor_erase_sector(struct spi_nor *nor, u32 addr)
 	 * Default implementation, if driver doesn't have a specialized HW
 	 * control
 	 */
-	for (i = nor->addr_width - 1; i >= 0; i--) {
-		buf[i] = addr & 0xff;
-		addr >>= 8;
-	}
-
-	return nor->write_reg(nor, nor->erase_opcode, buf, nor->addr_width);
+	return spi_mem_exec_op(nor->spi, &op);
 }
 
 /*

commit 584c2880f1414c7386c73c6ca265670f672f2a06
Author: Miquel Raynal <miquel.raynal@bootlin.com>
Date:   Sun Nov 18 21:11:47 2018 +0100

    UPSTREAM: mtd: fix Coverity integer handling issue
    
    A Coverity robot reported an integer handling issue
    (OVERFLOW_BEFORE_WIDEN) in the potentially overflowing expression:
    
        (mtd_div_by_ws(mtd->size, mtd) - mtd_div_by_ws(offs, mtd)) *
        mtd_oobavail(mtd, ops)
    
    While such overflow will certainly never happen due to the numbers
    handled, it is cleaner to fix this operation anyway.
    
    The problem is that all the maths include 32-bit quantities, while the
    result is stored in an explicit 64-bit value.
    
    As maxooblen will just be compared with a size_t, let's change the
    type of the variable to a size_t. This will not fix anything but will
    clarify a bit the situation. Then, do an explicit cast to fix Coverity
    warning.
    
    Addresses-Coverity-ID: 184180 ("Integer handling issues")
    Change-Id: Iab6b48d8709a7dcb70eebeb33088e866ee17dadf
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 3f3aef4b9dc88278f31567fe6f26095fd9477b1a)

diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c
index 7bd4f3bc97..0809adfa19 100644
--- a/drivers/mtd/mtdcore.c
+++ b/drivers/mtd/mtdcore.c
@@ -1052,13 +1052,13 @@ static int mtd_check_oob_ops(struct mtd_info *mtd, loff_t offs,
 		return -EINVAL;
 
 	if (ops->ooblen) {
-		u64 maxooblen;
+		size_t maxooblen;
 
 		if (ops->ooboffs >= mtd_oobavail(mtd, ops))
 			return -EINVAL;
 
-		maxooblen = ((mtd_div_by_ws(mtd->size, mtd) -
-			      mtd_div_by_ws(offs, mtd)) *
+		maxooblen = ((size_t)(mtd_div_by_ws(mtd->size, mtd) -
+				      mtd_div_by_ws(offs, mtd)) *
 			     mtd_oobavail(mtd, ops)) - ops->ooboffs;
 		if (ops->ooblen > maxooblen)
 			return -EINVAL;

commit ee22b06e17a6644630d833eb97f310654e642392
Author: Marek Vasut <marex@denx.de>
Date:   Thu Mar 7 23:27:46 2019 +0100

    UPSTREAM: mtd: spi: Add Macronix MX66U2G45F device
    
    Add Macronix MX66U2G45F flash device description.
    This is a 256 MiB part.
    
    Change-Id: I3b546ca5a5268aa8fb0805ab6125242a724792d1
    Signed-off-by: Marek Vasut <marex@denx.de>
    Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
    Cc: Vignesh R <vigneshr@ti.com>
    [jagan: use 'g' instead of 'f' in flash name]
    Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 3d2f12c4a151f6a4ec54782befa2fa92bcaa558f)

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index ef18a0568e..9633001514 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -142,6 +142,7 @@ const struct flash_info spi_nor_ids[] = {
 	{ INFO("mx25l25655e", 0xc22619, 0, 64 * 1024, 512, 0) },
 	{ INFO("mx66l51235l", 0xc2201a, 0, 64 * 1024, 1024, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
 	{ INFO("mx66u51235f", 0xc2253a, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
+	{ INFO("mx66u2g45g",  0xc2253c, 0, 64 * 1024, 4096, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
 	{ INFO("mx66l1g45g",  0xc2201b, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 	{ INFO("mx25l1633e", 0xc22415, 0, 64 * 1024,   32, SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES | SECT_4K) },
 #endif

commit e68a79e26524607fa68e2df109f15debd8664c1e
Author: Neil Armstrong <narmstrong@baylibre.com>
Date:   Sun Feb 10 10:16:22 2019 +0000

    UPSTREAM: mtd: sf_probe: remove spi-flash compatible
    
    Now the "spi-flash" compatible has been removed in the DTS files,
    remove this compatible from sf_probe to finally use the Linux "jedec,spi-nor"
    compatible.
    
    Change-Id: Iefd8098160529df04c9e7db2558bdf82117d095c
    Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
    Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit cd35365762add381b5765926f967d6a7259db783)

diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index ef1fff83e1..0aed7a6d80 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -167,7 +167,6 @@ static const struct dm_spi_flash_ops spi_flash_std_ops = {
 };
 
 static const struct udevice_id spi_flash_std_ids[] = {
-	{ .compatible = "spi-flash" },
 	{ .compatible = "jedec,spi-nor" },
 	{ }
 };

commit be1b7881641b8fc9b337d40d414476a2dff10bc0
Author: Heiko Schocher <hs@denx.de>
Date:   Fri Feb 8 11:03:39 2019 +0100

    UPSTREAM: mtd: add spi flash id s25fl064l
    
    Add support for SPANSION s25fl064l
    
    Change-Id: I081105625dcf484bd2c4d71080fc9c15f6df0ba7
    Signed-off-by: Heiko Schocher <hs@denx.de>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Acked-by: Vignesh R <vigneshr@ti.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit a2dc8b1832734fdd0c567dbaa1c8f98e10c427e2)

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 3215e2431d..ef18a0568e 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -187,6 +187,7 @@ const struct flash_info spi_nor_ids[] = {
 	{ INFO("s25fl116k",  0x014015,      0,  64 * 1024,  32, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 	{ INFO("s25fl164k",  0x014017,      0,  64 * 1024, 128, SECT_4K) },
 	{ INFO("s25fl208k",  0x014014,      0,  64 * 1024,  16, SECT_4K | SPI_NOR_DUAL_READ) },
+	{ INFO("s25fl064l",  0x016017,      0,  64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
 	{ INFO("s25fl128l",  0x016018,      0,  64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
 #endif
 #ifdef CONFIG_SPI_FLASH_SST		/* SST */

commit a7b78be475cd089c95fe5e52b178a3686924979f
Author: Stefan Roese <sr@denx.de>
Date:   Thu Jan 24 17:18:19 2019 +0100

    UPSTREAM: mtd: spinand: Sync GigaDevice GD5F1GQ4UExxG with latest Linux version
    
    This patch sync's the U-Boot SPI NAND GigaDevice GD5F1GQ4UExxG support
    with the latest Linux version (v5.0-rc3) plus the chip supported posted
    on the MTD list. Only the currently in U-Boot available chip is
    supported with this sync.
    
    The changes for the GD5F1GQ4UExxG are:
    - Name of NAND device changed to better reflect the real part
    - OOB layout changed to only reserve 1 byte for BBT
    - Use ECC caps 8bits/512bytes instead of 8bits/2048bytes
    - Enhanced ecc_get_status() function to determine and report
      a more fine grained bit error status
    
    Change-Id: Ia0f8ea6e9c19aec57628ea3217128c389c1375c1
    Signed-off-by: Stefan Roese <sr@denx.de>
    Cc: Boris Brezillon <bbrezillon@kernel.org>
    Cc: Miquel Raynal <miquel.raynal@bootlin.com>
    Acked-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit d67fb265d1c071c6475fd97d01787b4c961516d5)

diff --git a/drivers/mtd/nand/spi/gigadevice.c b/drivers/mtd/nand/spi/gigadevice.c
index 0bade20808..3681c5eed9 100644
--- a/drivers/mtd/nand/spi/gigadevice.c
+++ b/drivers/mtd/nand/spi/gigadevice.c
@@ -12,12 +12,11 @@
 #endif
 #include <linux/mtd/spinand.h>
 
-#define SPINAND_MFR_GIGADEVICE			0xc8
+#define SPINAND_MFR_GIGADEVICE			0xC8
+#define GD5FXGQ4XA_STATUS_ECC_1_7_BITFLIPS	(1 << 4)
+#define GD5FXGQ4XA_STATUS_ECC_8_BITFLIPS	(3 << 4)
 
-#define GIGADEVICE_STATUS_ECC_MASK		GENMASK(5, 4)
-#define GIGADEVICE_STATUS_ECC_NO_BITFLIPS	(0 << 4)
-#define GIGADEVICE_STATUS_ECC_1TO7_BITFLIPS	(1 << 4)
-#define GIGADEVICE_STATUS_ECC_8_BITFLIPS	(3 << 4)
+#define GD5FXGQ4XEXXG_REG_STATUS2		0xf0
 
 static SPINAND_OP_VARIANTS(read_cache_variants,
 		SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
@@ -35,8 +34,8 @@ static SPINAND_OP_VARIANTS(update_cache_variants,
 		SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
 		SPINAND_PROG_LOAD(false, 0, NULL, 0));
 
-static int gd5f1gq4u_ooblayout_ecc(struct mtd_info *mtd, int section,
-				   struct mtd_oob_region *region)
+static int gd5fxgq4xexxg_ooblayout_ecc(struct mtd_info *mtd, int section,
+				       struct mtd_oob_region *region)
 {
 	if (section)
 		return -ERANGE;
@@ -47,38 +46,49 @@ static int gd5f1gq4u_ooblayout_ecc(struct mtd_info *mtd, int section,
 	return 0;
 }
 
-static int gd5f1gq4u_ooblayout_free(struct mtd_info *mtd, int section,
-				    struct mtd_oob_region *region)
+static int gd5fxgq4xexxg_ooblayout_free(struct mtd_info *mtd, int section,
+					struct mtd_oob_region *region)
 {
 	if (section)
 		return -ERANGE;
 
-	/* Reserve 2 bytes for the BBM. */
-	region->offset = 2;
-	region->length = 62;
+	/* Reserve 1 bytes for the BBM. */
+	region->offset = 1;
+	region->length = 63;
 
 	return 0;
 }
 
-static const struct mtd_ooblayout_ops gd5f1gq4u_ooblayout = {
-	.ecc = gd5f1gq4u_ooblayout_ecc,
-	.free = gd5f1gq4u_ooblayout_free,
-};
-
-static int gd5f1gq4u_ecc_get_status(struct spinand_device *spinand,
-				    u8 status)
+static int gd5fxgq4xexxg_ecc_get_status(struct spinand_device *spinand,
+					u8 status)
 {
-	if (status)
-		debug("%s (%d): status=%02x\n", __func__, __LINE__, status);
+	u8 status2;
+	struct spi_mem_op op = SPINAND_GET_FEATURE_OP(GD5FXGQ4XEXXG_REG_STATUS2,
+						      &status2);
+	int ret;
 
-	switch (status & GIGADEVICE_STATUS_ECC_MASK) {
+	switch (status & STATUS_ECC_MASK) {
 	case STATUS_ECC_NO_BITFLIPS:
 		return 0;
 
-	case GIGADEVICE_STATUS_ECC_1TO7_BITFLIPS:
-		return 7;
-
-	case GIGADEVICE_STATUS_ECC_8_BITFLIPS:
+	case GD5FXGQ4XA_STATUS_ECC_1_7_BITFLIPS:
+		/*
+		 * Read status2 register to determine a more fine grained
+		 * bit error status
+		 */
+		ret = spi_mem_exec_op(spinand->slave, &op);
+		if (ret)
+			return ret;
+
+		/*
+		 * 4 ... 7 bits are flipped (1..4 can't be detected, so
+		 * report the maximum of 4 in this case
+		 */
+		/* bits sorted this way (3...0): ECCS1,ECCS0,ECCSE1,ECCSE0 */
+		return ((status & STATUS_ECC_MASK) >> 2) |
+			((status2 & STATUS_ECC_MASK) >> 4);
+
+	case GD5FXGQ4XA_STATUS_ECC_8_BITFLIPS:
 		return 8;
 
 	case STATUS_ECC_UNCOR_ERROR:
@@ -91,16 +101,21 @@ static int gd5f1gq4u_ecc_get_status(struct spinand_device *spinand,
 	return -EINVAL;
 }
 
+static const struct mtd_ooblayout_ops gd5fxgq4xexxg_ooblayout = {
+	.ecc = gd5fxgq4xexxg_ooblayout_ecc,
+	.free = gd5fxgq4xexxg_ooblayout_free,
+};
+
 static const struct spinand_info gigadevice_spinand_table[] = {
-	SPINAND_INFO("GD5F1GQ4UC", 0xd1,
+	SPINAND_INFO("GD5F1GQ4UExxG", 0xd1,
 		     NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
-		     NAND_ECCREQ(8, 2048),
+		     NAND_ECCREQ(8, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
 					      &write_cache_variants,
 					      &update_cache_variants),
 		     0,
-		     SPINAND_ECCINFO(&gd5f1gq4u_ooblayout,
-				     gd5f1gq4u_ecc_get_status)),
+		     SPINAND_ECCINFO(&gd5fxgq4xexxg_ooblayout,
+				     gd5fxgq4xexxg_ecc_get_status)),
 };
 
 static int gigadevice_spinand_detect(struct spinand_device *spinand)
@@ -109,8 +124,8 @@ static int gigadevice_spinand_detect(struct spinand_device *spinand)
 	int ret;
 
 	/*
-	 * Gigadevice SPI NAND read ID need a dummy byte,
-	 * so the first byte in raw_id is dummy.
+	 * For GD NANDs, There is an address byte needed to shift in before IDs
+	 * are read out, so the first byte in raw_id is dummy.
 	 */
 	if (id[1] != SPINAND_MFR_GIGADEVICE)
 		return 0;

commit 955a06fc55f32112b7f5b7a986e3d0157df5c2d0
Author: Eran Matityahu <eran.m@variscite.com>
Date:   Wed Feb 13 20:56:17 2019 +0200

    UPSTREAM: mtd: ubi, ubifs debug: Use pr_debug instead of pr_crit
    
    Before printk.h was introduced and MTDDEBUG was removed,
    pr_crit() was calling MTDDEBUG(), which was since then
    replaced by the current pr_debug().
    
    pr_debug is more appropriate here.
    
    Change-Id: Id553ff366acbb614f7a8adee6e8e46f79535be08
    Signed-off-by: Eran Matityahu <eran.m@variscite.com>
    Reviewed-by: Heiko Schocher <hs@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 734b080e78805edbb3430a52c8c5b1aeee02bd9f)

diff --git a/drivers/mtd/ubi/debug.h b/drivers/mtd/ubi/debug.h
index 2b9011d237..215fca7693 100644
--- a/drivers/mtd/ubi/debug.h
+++ b/drivers/mtd/ubi/debug.h
@@ -30,7 +30,7 @@ void ubi_dump_vid_hdr(const struct ubi_vid_hdr *vid_hdr);
 #else
 #define ubi_assert(expr)  do {                                               \
 	if (unlikely(!(expr))) {                                             \
-		pr_crit("UBI assert failed in %s at %u\n",                   \
+		pr_debug("UBI assert failed in %s at %u\n",                  \
 		       __func__, __LINE__);                                  \
 		dump_stack();                                                \
 	}                                                                    \
diff --git a/fs/ubifs/debug.h b/fs/ubifs/debug.h
index 807ce1b733..0d8ed57cbd 100644
--- a/fs/ubifs/debug.h
+++ b/fs/ubifs/debug.h
@@ -168,7 +168,7 @@ struct ubifs_global_debug_info {
 #else
 #define ubifs_assert(expr) do {                                                \
 	if (unlikely(!(expr))) {                                               \
-		pr_crit("UBIFS assert failed in %s at %u\n",                   \
+		pr_debug("UBIFS assert failed in %s at %u\n",                  \
 		       __func__, __LINE__);                                    \
 		dump_stack();                                                  \
 	}                                                                      \
@@ -177,7 +177,7 @@ struct ubifs_global_debug_info {
 #define ubifs_assert_cmt_locked(c) do {                                        \
 	if (unlikely(down_write_trylock(&(c)->commit_sem))) {                  \
 		up_write(&(c)->commit_sem);                                    \
-		pr_crit("commit lock is not locked!\n");                       \
+		pr_debug("commit lock is not locked!\n");                      \
 		ubifs_assert(0);                                               \
 	}                                                                      \
 } while (0)

commit 8ea74120565f81f5f3f7e7fa29bb3cd5be62a91e
Author: Eran Matityahu <eran.m@variscite.com>
Date:   Wed Feb 13 20:55:43 2019 +0200

    UPSTREAM: mtd: ubi debug: Remove the pid print from ubi_assert
    
    Add a new definition for ubi_assert and keep
    the original one in an ifndef __UBOOT__.
    
    Change-Id: I73cb2a932ad46bffffdce86250d4e08940d0aed9
    Signed-off-by: Eran Matityahu <eran.m@variscite.com>
    Reviewed-by: Heiko Schocher <hs@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 66e78fc196f59a9cd2688effa4d4d2eea32b0ed5)

diff --git a/drivers/mtd/ubi/debug.h b/drivers/mtd/ubi/debug.h
index eb3351e562..2b9011d237 100644
--- a/drivers/mtd/ubi/debug.h
+++ b/drivers/mtd/ubi/debug.h
@@ -19,6 +19,7 @@ void ubi_dump_vid_hdr(const struct ubi_vid_hdr *vid_hdr);
 
 #include <hexdump.h>
 
+#ifndef __UBOOT__
 #define ubi_assert(expr)  do {                                               \
 	if (unlikely(!(expr))) {                                             \
 		pr_crit("UBI assert failed in %s at %u (pid %d)\n",          \
@@ -26,6 +27,15 @@ void ubi_dump_vid_hdr(const struct ubi_vid_hdr *vid_hdr);
 		dump_stack();                                                \
 	}                                                                    \
 } while (0)
+#else
+#define ubi_assert(expr)  do {                                               \
+	if (unlikely(!(expr))) {                                             \
+		pr_crit("UBI assert failed in %s at %u\n",                   \
+		       __func__, __LINE__);                                  \
+		dump_stack();                                                \
+	}                                                                    \
+} while (0)
+#endif
 
 #define ubi_dbg_print_hex_dump(ps, pt, r, g, b, len, a)                      \
 		print_hex_dump(ps, pt, r, g, b, len, a)

commit ebe7071926c29b5adfd20005a458032d57315a23
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Jul 1 20:35:31 2019 +0800

    UPSTREAM: Convert CONFIG_SF_DEFAULT_* to Kconfig
    
    This converts the following to Kconfig:
      CONFIG_SF_DEFAULT_BUS
      CONFIG_SF_DEFAULT_CS
      CONFIG_SF_DEFAULT_MODE
      CONFIG_SF_DEFAULT_SPEED
    
    I use moveconfig script and then manual check on generated u-boot.cfg
    to solve the remaining issue.
    
    Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
    Change-Id: I6aaaaf572649fd16925af9eb457ea19423372e60
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 14453fbfadc2f98ca35d6033140466c7a4b4947a)

diff --git a/README b/README
index 196e9cb1b3..a39742d6a2 100644
--- a/README
+++ b/README
@@ -2363,33 +2363,6 @@ The following options need to be configured:
 		this is instead controlled by the value of
 		/config/load-environment.
 
-- Serial Flash support
-		Usage requires an initial 'sf probe' to define the serial
-		flash parameters, followed by read/write/erase/update
-		commands.
-
-		The following defaults may be provided by the platform
-		to handle the common case when only a single serial
-		flash is present on the system.
-
-		CONFIG_SF_DEFAULT_BUS		Bus identifier
-		CONFIG_SF_DEFAULT_CS		Chip-select
-		CONFIG_SF_DEFAULT_MODE 		(see include/spi.h)
-		CONFIG_SF_DEFAULT_SPEED		in Hz
-
-		CONFIG_SYSTEMACE
-
-		Adding this option adds support for Xilinx SystemACE
-		chips attached via some sort of local bus. The address
-		of the chip must also be defined in the
-		CONFIG_SYS_SYSTEMACE_BASE macro. For example:
-
-		#define CONFIG_SYSTEMACE
-		#define CONFIG_SYS_SYSTEMACE_BASE 0xf0000000
-
-		When SystemACE support is added, the "ace" device type
-		becomes available to the fat commands, i.e. fatls.
-
 - TFTP Fixed UDP Port:
 		CONFIG_TFTP_PORT
 
diff --git a/configs/rk3036_defconfig b/configs/rk3036_defconfig
index eee16d0e98..a6eb3bebd1 100644
--- a/configs/rk3036_defconfig
+++ b/configs/rk3036_defconfig
@@ -76,6 +76,7 @@ CONFIG_LED=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_DM_REGULATOR_FIXED=y
diff --git a/configs/rk3128x_defconfig b/configs/rk3128x_defconfig
index 8916c312a4..4e1ae0f306 100644
--- a/configs/rk3128x_defconfig
+++ b/configs/rk3128x_defconfig
@@ -85,6 +85,7 @@ CONFIG_ROCKCHIP_EFUSE=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
diff --git a/configs/rk3288_defconfig b/configs/rk3288_defconfig
index 2955dbd17e..e93174e403 100644
--- a/configs/rk3288_defconfig
+++ b/configs/rk3288_defconfig
@@ -66,6 +66,7 @@ CONFIG_RK_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index 97e86af181..64b4bf7646 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -81,6 +81,7 @@ CONFIG_ROCKCHIP_EFUSE=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_PMIC=y
diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
index ae4d35572b..32f04b2c4c 100755
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -73,6 +73,7 @@ CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index 9c2356608f..f54001b75a 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -39,7 +39,6 @@
 
 #define CONFIG_SPI
 #define CONFIG_SPI_FLASH_GIGADEVICE
-#define CONFIG_SF_DEFAULT_SPEED 20000000
 
 #ifndef CONFIG_SPL_BUILD
 /* usb otg */
diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h
index 1ffc84c080..69e622b047 100644
--- a/include/configs/rk3128_common.h
+++ b/include/configs/rk3128_common.h
@@ -43,7 +43,6 @@
 #define SDRAM_MAX_SIZE			0x80000000
 
 #define CONFIG_SPI
-#define CONFIG_SF_DEFAULT_SPEED 20000000
 
 #ifndef CONFIG_SPL_BUILD
 #define CONFIG_PREBOOT
diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h
index 826becc4d1..76670671f0 100644
--- a/include/configs/rk3188_common.h
+++ b/include/configs/rk3188_common.h
@@ -49,7 +49,6 @@
 #define SDRAM_MAX_SIZE			0x80000000
 
 #define CONFIG_SPI
-#define CONFIG_SF_DEFAULT_SPEED 20000000
 
 #ifndef CONFIG_SPL_BUILD
 
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index cb0e792352..68efca8a18 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -50,7 +50,6 @@
 #define SDRAM_MAX_SIZE			0xfe000000
 
 #define CONFIG_SPI
-#define CONFIG_SF_DEFAULT_SPEED 20000000
 
 #ifndef CONFIG_SPL_BUILD
 /* usb otg */
diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index ac110c627f..6c7f1ef983 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -47,7 +47,6 @@
 #define SDRAM_MAX_SIZE			0xff000000
 
 #define CONFIG_SPI
-#define CONFIG_SF_DEFAULT_SPEED 20000000
 
 #ifndef CONFIG_SPL_BUILD
 
diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index 70db093bed..36820bce41 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -51,7 +51,6 @@
 #define CONFIG_SYS_SDRAM_BASE		0
 #define SDRAM_MAX_SIZE			0xf8000000
 
-#define CONFIG_SF_DEFAULT_SPEED 20000000
 
 #ifndef CONFIG_SPL_BUILD
 

commit 524aaf7690e608f2975b5f4acb64e39d1c0dba93
Author: Adam Ford <aford173@gmail.com>
Date:   Mon Feb 18 17:58:17 2019 -0600

    UPSTREAM: MTD: mxs_nand_spl: Redo the way nand_init initializes
    
    Currently the spl system calls nand_init which does nothing.
    It isn't until an attempt to load from NAND that it gets initialized.
    Subsequent attempts to load just skip the initialization  because
    NAND is already initialized.
    
    This moves the contents of mxs_nand_init to nand_init.  In the event
    of an error, it clears the number of nand chips found.  Any
    attempts to use nand will check if there are nand chips available
    instead of actually doing the initialization at that time. If there
    are none, it will return an error to the higher level calls.
    
    Change-Id: Icfde060758de88354580fc4834adb880bb205b39
    Signed-off-by: Adam Ford <aford173@gmail.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit d46d27d3b6558904b8fb44e90393f11c54ef3363)

diff --git a/drivers/mtd/nand/raw/mxs_nand_spl.c b/drivers/mtd/nand/raw/mxs_nand_spl.c
index 8269b22568..4caae5dae9 100644
--- a/drivers/mtd/nand/raw/mxs_nand_spl.c
+++ b/drivers/mtd/nand/raw/mxs_nand_spl.c
@@ -175,11 +175,11 @@ static int is_badblock(struct mtd_info *mtd, loff_t offs, int allowbbt)
 }
 
 /* setup mtd and nand structs and init mxs_nand driver */
-static int mxs_nand_init(void)
+void nand_init(void)
 {
 	/* return if already initalized */
 	if (nand_chip.numchips)
-		return 0;
+		return;
 
 	/* init mxs nand driver */
 	mxs_nand_init_spl(&nand_chip);
@@ -192,7 +192,8 @@ static int mxs_nand_init(void)
 	/* identify flash device */
 	if (mxs_flash_ident(mtd)) {
 		printf("Failed to identify\n");
-		return -1;
+		nand_chip.numchips = 0; /* If fail, don't use nand */
+		return;
 	}
 
 	/* allocate and initialize buffers */
@@ -203,8 +204,6 @@ static int mxs_nand_init(void)
 	mtd->size = nand_chip.chipsize;
 	nand_chip.scan_bbt(mtd);
 	mxs_nand_setup_ecc(mtd);
-
-	return 0;
 }
 
 int nand_spl_load_image(uint32_t offs, unsigned int size, void *buf)
@@ -214,9 +213,9 @@ int nand_spl_load_image(uint32_t offs, unsigned int size, void *buf)
 	unsigned int nand_page_per_block;
 	unsigned int sz = 0;
 
-	if (mxs_nand_init())
-		return -ENODEV;
 	chip = mtd_to_nand(mtd);
+	if (!chip->numchips)
+		return -ENODEV;
 	page = offs >> chip->page_shift;
 	nand_page_per_block = mtd->erasesize / mtd->writesize;
 
@@ -257,10 +256,6 @@ int nand_default_bbt(struct mtd_info *mtd)
 	return 0;
 }
 
-void nand_init(void)
-{
-}
-
 void nand_deselect(void)
 {
 }

commit 72912a48f11b1c2a581db76f4a41eb51599c5da3
Author: Adam Ford <aford173@gmail.com>
Date:   Thu Jan 17 07:16:39 2019 -0600

    UPSTREAM: MTD: nand: mxs_nand: Allow driver to auto setup ECC in SPL
    
    The initialization of the NAND in SPL hard-coded ecc.bytes,
    ecc.size, and ecc.strength which may work for some NAND parts,
    but it not appropriate for others.  With the pending patch
    "mxs_nand: Fix BCH read timeout error on boards requiring ECC"
    the driver can auto configure the ECC when these entries are
    blank.  This patch has been tested in NAND flash with oob 64
    and oob 128.
    
    Change-Id: Iaa9d322e8b39bbde309993e9bb9cb53cd920e80c
    Signed-off-by: Adam Ford <aford173@gmail.com>
    Tested-by: Jörg Krause <joerg.krause@embedded.rocks>
    Acked-by: Tim Harvey <tharvey@gateworks.com>
    Tested-by: Tim Harvey <tharvey@gateworks.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 04568bd0b6d673a325eed76bd857a9cbd0c556bc)

diff --git a/drivers/mtd/nand/raw/mxs_nand.c b/drivers/mtd/nand/raw/mxs_nand.c
index 66f34c8824..bb7a627aa4 100644
--- a/drivers/mtd/nand/raw/mxs_nand.c
+++ b/drivers/mtd/nand/raw/mxs_nand.c
@@ -1192,9 +1192,6 @@ int mxs_nand_init_spl(struct nand_chip *nand)
 	nand->ecc.read_page	= mxs_nand_ecc_read_page;
 
 	nand->ecc.mode		= NAND_ECC_HW;
-	nand->ecc.bytes		= 9;
-	nand->ecc.size		= 512;
-	nand->ecc.strength	= 8;
 
 	return 0;
 }

commit f58e694f40ba670b18175d57730380845fe92281
Author: Adam Ford <aford173@gmail.com>
Date:   Sat Jan 12 06:25:48 2019 -0600

    UPSTREAM: MTD: NAND: mxs_nand_init_dma: Make mxs_nand_init_dma static
    
    mxs_nand_init_dma is only referenced from mxs_nand.c.  It's not
    referenced in any headers or outside code, so this patch
    defines it as static.
    
    Change-Id: I6c1dd1690288a073b95a715c53e4bc36b154dd59
    Signed-off-by: Adam Ford <aford173@gmail.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 5645df9e00a01407730dc11d3a2bc4969203dc8c)

diff --git a/drivers/mtd/nand/raw/mxs_nand.c b/drivers/mtd/nand/raw/mxs_nand.c
index 043a1bf46b..66f34c8824 100644
--- a/drivers/mtd/nand/raw/mxs_nand.c
+++ b/drivers/mtd/nand/raw/mxs_nand.c
@@ -1093,7 +1093,7 @@ int mxs_nand_alloc_buffers(struct mxs_nand_info *nand_info)
 /*
  * Initializes the NFC hardware.
  */
-int mxs_nand_init_dma(struct mxs_nand_info *info)
+static int mxs_nand_init_dma(struct mxs_nand_info *info)
 {
 	int i = 0, j, ret = 0;
 

commit 0aa53418f32400b2f81753e8edc65d2110356acd
Author: Adam Ford <aford173@gmail.com>
Date:   Wed Jan 2 20:36:52 2019 -0600

    UPSTREAM: MTD: mxs_nand: Fix BCH read timeout error on boards requiring ECC
    
    The LogicPD board uses a Micron Flash with ECC.  To boot this from
    SPL, the ECC needs to be correctly configured or the BCH engine
    times out.
    
    Change-Id: I0fcdc7f4853bf01c1a7318f4384767e9cb252e2c
    Signed-off-by: Adam Ford <aford173@gmail.com>
    Acked-by: Stefan Agner <stefan.agner@toradex.com>
    Tested-by: Jörg Krause <joerg.krause@embedded.rocks>
    Acked-by: Tim Harvey <tharvey@gateworks.com>
    Tested-by: Tim Harvey <tharvey@gateworks.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 5ae585ba3a8bb2336d5cb6e1ef4c80a5ef445409)

diff --git a/drivers/mtd/nand/raw/mxs_nand.c b/drivers/mtd/nand/raw/mxs_nand.c
index 30fc4ec4b6..043a1bf46b 100644
--- a/drivers/mtd/nand/raw/mxs_nand.c
+++ b/drivers/mtd/nand/raw/mxs_nand.c
@@ -1164,6 +1164,12 @@ int mxs_nand_init_spl(struct nand_chip *nand)
 
 	nand_info->gpmi_regs = (struct mxs_gpmi_regs *)MXS_GPMI_BASE;
 	nand_info->bch_regs = (struct mxs_bch_regs *)MXS_BCH_BASE;
+
+	if (is_mx6sx() || is_mx7())
+		nand_info->max_ecc_strength_supported = 62;
+	else
+		nand_info->max_ecc_strength_supported = 40;
+
 	err = mxs_nand_alloc_buffers(nand_info);
 	if (err)
 		return err;
diff --git a/drivers/mtd/nand/raw/mxs_nand_spl.c b/drivers/mtd/nand/raw/mxs_nand_spl.c
index 7867675c93..8269b22568 100644
--- a/drivers/mtd/nand/raw/mxs_nand_spl.c
+++ b/drivers/mtd/nand/raw/mxs_nand_spl.c
@@ -202,6 +202,7 @@ static int mxs_nand_init(void)
 	/* setup flash layout (does not scan as we override that) */
 	mtd->size = nand_chip.chipsize;
 	nand_chip.scan_bbt(mtd);
+	mxs_nand_setup_ecc(mtd);
 
 	return 0;
 }

commit da74824551f7610aee5c245bae76fe346ca8dab4
Author: Vignesh R <vigneshr@ti.com>
Date:   Tue Feb 5 11:29:25 2019 +0530

    UPSTREAM: mtd: spi: Add lightweight SPI flash stack for SPL
    
    Add a tiny SPI flash stack that just supports reading data/images from
    SPI flash. This is useful for boards that have SPL size constraints and
    would need to use SPI flash framework just to read images/data from
    flash. There is approximately 1.5 to 2KB savings with this.
    
    Based on prior work of reducing spi flash id table by
    Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
    
    Change-Id: I9b87d3ed4a01d2ce31eee327b67689e5e2ecff57
    Signed-off-by: Vignesh R <vigneshr@ti.com>
    Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
    Tested-by: Stefan Roese <sr@denx.de>
    Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 778572d7cb1e2df678340fda9b081e4f7bd6c4b3)

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index a3542f5721..480bf725fb 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -625,9 +625,18 @@ config SPL_SPI_FLASH_SUPPORT
 
 if SPL_SPI_FLASH_SUPPORT
 
+config SPL_SPI_FLASH_TINY
+	bool "Enable low footprint SPL SPI Flash support"
+	depends on !SPI_FLASH_BAR
+	help
+	 Enable lightweight SPL SPI Flash support that supports just reading
+	 data/images from flash. No support to write/erase flash. Enable
+	 this if you have SPL size limitations and don't need full
+	 fledged SPI flash support.
+
 config SPL_SPI_FLASH_SFDP_SUPPORT
 	bool "SFDP table parsing support for SPI NOR flashes"
-	depends on !SPI_FLASH_BAR
+	depends on !SPI_FLASH_BAR && !SPL_SPI_FLASH_TINY
 	help
 	 Enable support for parsing and auto discovery of parameters for
 	 SPI NOR flashes using Serial Flash Discoverable Parameters (SFDP)
diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile
index 8cfa49d5d3..329a036155 100644
--- a/drivers/mtd/spi/Makefile
+++ b/drivers/mtd/spi/Makefile
@@ -6,12 +6,20 @@
 #
 
 obj-$(CONFIG_DM_SPI_FLASH) += sf-uclass.o
+spi-nor-y := sf_probe.o spi-nor-ids.o
 
 ifdef CONFIG_SPL_BUILD
 obj-$(CONFIG_SPL_SPI_BOOT)	+= fsl_espi_spl.o
+ifeq ($(CONFIG_SPL_SPI_FLASH_TINY),y)
+spi-nor-y += spi-nor-tiny.o
+else
+spi-nor-y += spi-nor-core.o
+endif
+else
+spi-nor-y += spi-nor-core.o
 endif
 
-obj-$(CONFIG_SPI_FLASH) += sf_probe.o spi-nor-core.o
+obj-$(CONFIG_SPI_FLASH) += spi-nor.o
 obj-$(CONFIG_SPI_FLASH_DATAFLASH) += sf_dataflash.o sf.o
 obj-$(CONFIG_SPI_FLASH_MTD) += sf_mtd.o
 obj-$(CONFIG_SPI_FLASH_SANDBOX) += sandbox.o
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index f202445f2f..7d4f0b42e6 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -17,7 +17,9 @@
 #define SPI_NOR_MAX_ADDR_WIDTH	4
 
 struct flash_info {
+#if !CONFIG_IS_ENABLED(SPI_FLASH_TINY)
 	char		*name;
+#endif
 
 	/*
 	 * This array stores the ID bytes.
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 7590ff7716..b7f0733877 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -879,284 +879,26 @@ static int stm_is_locked(struct spi_nor *nor, loff_t ofs, uint64_t len)
 }
 #endif /* CONFIG_SPI_FLASH_STMICRO */
 
-/* Used when the "_ext_id" is two bytes at most */
-#define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags)	\
-		.id = {							\
-			((_jedec_id) >> 16) & 0xff,			\
-			((_jedec_id) >> 8) & 0xff,			\
-			(_jedec_id) & 0xff,				\
-			((_ext_id) >> 8) & 0xff,			\
-			(_ext_id) & 0xff,				\
-			},						\
-		.id_len = (!(_jedec_id) ? 0 : (3 + ((_ext_id) ? 2 : 0))),	\
-		.sector_size = (_sector_size),				\
-		.n_sectors = (_n_sectors),				\
-		.page_size = 256,					\
-		.flags = (_flags),
-
-#define INFO6(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags)	\
-		.id = {							\
-			((_jedec_id) >> 16) & 0xff,			\
-			((_jedec_id) >> 8) & 0xff,			\
-			(_jedec_id) & 0xff,				\
-			((_ext_id) >> 16) & 0xff,			\
-			((_ext_id) >> 8) & 0xff,			\
-			(_ext_id) & 0xff,				\
-			},						\
-		.id_len = 6,						\
-		.sector_size = (_sector_size),				\
-		.n_sectors = (_n_sectors),				\
-		.page_size = 256,					\
-		.flags = (_flags),
-
-/* NOTE: double check command sets and memory organization when you add
- * more nor chips.  This current list focusses on newer chips, which
- * have been converging on command sets which including JEDEC ID.
- *
- * All newly added entries should describe *hardware* and should use SECT_4K
- * (or SECT_4K_PMC) if hardware supports erasing 4 KiB sectors. For usage
- * scenarios excluding small sectors there is config option that can be
- * disabled: CONFIG_MTD_SPI_NOR_USE_4K_SECTORS.
- * For historical (and compatibility) reasons (before we got above config) some
- * old entries may be missing 4K flag.
- */
-const struct flash_info spi_nor_ids[] = {
-#ifdef CONFIG_SPI_FLASH_ATMEL		/* ATMEL */
-	/* Atmel -- some are (confusingly) marketed as "DataFlash" */
-	{ "at26df321",  INFO(0x1f4700, 0, 64 * 1024, 64, SECT_4K) },
-	{ "at25df321a", INFO(0x1f4701, 0, 64 * 1024, 64, SECT_4K) },
-
-	{ "at45db011d",	INFO(0x1f2200, 0, 64 * 1024,   4, SECT_4K) },
-	{ "at45db021d",	INFO(0x1f2300, 0, 64 * 1024,   8, SECT_4K) },
-	{ "at45db041d",	INFO(0x1f2400, 0, 64 * 1024,   8, SECT_4K) },
-	{ "at45db081d", INFO(0x1f2500, 0, 64 * 1024,  16, SECT_4K) },
-	{ "at45db161d",	INFO(0x1f2600, 0, 64 * 1024,  32, SECT_4K) },
-	{ "at45db321d",	INFO(0x1f2700, 0, 64 * 1024,  64, SECT_4K) },
-	{ "at45db641d",	INFO(0x1f2800, 0, 64 * 1024, 128, SECT_4K) },
-	{ "at26df081a", INFO(0x1f4501, 0, 64 * 1024,  16, SECT_4K) },
-#endif
-#ifdef CONFIG_SPI_FLASH_EON		/* EON */
-	/* EON -- en25xxx */
-	{ "en25q32b",   INFO(0x1c3016, 0, 64 * 1024,   64, 0) },
-	{ "en25q64",    INFO(0x1c3017, 0, 64 * 1024,  128, SECT_4K) },
-	{ "en25qh128",  INFO(0x1c7018, 0, 64 * 1024,  256, 0) },
-	{ "en25s64",	INFO(0x1c3817, 0, 64 * 1024,  128, SECT_4K) },
-#endif
-#ifdef CONFIG_SPI_FLASH_GIGADEVICE	/* GIGADEVICE */
-	/* GigaDevice */
-	{
-		"gd25q16", INFO(0xc84015, 0, 64 * 1024,  32,
-			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
-			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
-	},
-	{
-		"gd25q32", INFO(0xc84016, 0, 64 * 1024,  64,
-			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
-			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
-	},
-	{
-		"gd25lq32", INFO(0xc86016, 0, 64 * 1024, 64,
-			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
-			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
-	},
-	{
-		"gd25q64", INFO(0xc84017, 0, 64 * 1024, 128,
-			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
-			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
-	},
-#endif
-#ifdef CONFIG_SPI_FLASH_ISSI		/* ISSI */
-	/* ISSI */
-	{ "is25lq040b", INFO(0x9d4013, 0, 64 * 1024,   8,
-			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-	{ "is25lp032",	INFO(0x9d6016, 0, 64 * 1024,  64, 0) },
-	{ "is25lp064",	INFO(0x9d6017, 0, 64 * 1024, 128, 0) },
-	{ "is25lp128",  INFO(0x9d6018, 0, 64 * 1024, 256,
-			SECT_4K | SPI_NOR_DUAL_READ) },
-	{ "is25lp256",  INFO(0x9d6019, 0, 64 * 1024, 512,
-			SECT_4K | SPI_NOR_DUAL_READ) },
-	{ "is25wp032",  INFO(0x9d7016, 0, 64 * 1024,  64,
-			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-	{ "is25wp064",  INFO(0x9d7017, 0, 64 * 1024, 128,
-			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-	{ "is25wp128",  INFO(0x9d7018, 0, 64 * 1024, 256,
-			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-#endif
-#ifdef CONFIG_SPI_FLASH_MACRONIX	/* MACRONIX */
-	/* Macronix */
-	{ "mx25l2005a",  INFO(0xc22012, 0, 64 * 1024,   4, SECT_4K) },
-	{ "mx25l4005a",  INFO(0xc22013, 0, 64 * 1024,   8, SECT_4K) },
-	{ "mx25l8005",   INFO(0xc22014, 0, 64 * 1024,  16, 0) },
-	{ "mx25l1606e",  INFO(0xc22015, 0, 64 * 1024,  32, SECT_4K) },
-	{ "mx25l3205d",  INFO(0xc22016, 0, 64 * 1024,  64, SECT_4K) },
-	{ "mx25l6405d",  INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) },
-	{ "mx25u2033e",  INFO(0xc22532, 0, 64 * 1024,   4, SECT_4K) },
-	{ "mx25u1635e",  INFO(0xc22535, 0, 64 * 1024,  32, SECT_4K) },
-	{ "mx25u6435f",  INFO(0xc22537, 0, 64 * 1024, 128, SECT_4K) },
-	{ "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) },
-	{ "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) },
-	{ "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-	{ "mx25u25635f", INFO(0xc22539, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_4B_OPCODES) },
-	{ "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, 0) },
-	{ "mx66l51235l", INFO(0xc2201a, 0, 64 * 1024, 1024, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
-	{ "mx66u51235f", INFO(0xc2253a, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
-	{ "mx66l1g45g",  INFO(0xc2201b, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-	{ "mx25l1633e",	 INFO(0xc22415, 0, 64 * 1024,   32, SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES | SECT_4K) },
-#endif
-
-#ifdef CONFIG_SPI_FLASH_STMICRO		/* STMICRO */
-	/* Micron */
-	{ "n25q016a",	 INFO(0x20bb15, 0, 64 * 1024,   32, SECT_4K | SPI_NOR_QUAD_READ) },
-	{ "n25q032",	 INFO(0x20ba16, 0, 64 * 1024,   64, SPI_NOR_QUAD_READ) },
-	{ "n25q032a",	 INFO(0x20bb16, 0, 64 * 1024,   64, SPI_NOR_QUAD_READ) },
-	{ "n25q064",     INFO(0x20ba17, 0, 64 * 1024,  128, SECT_4K | SPI_NOR_QUAD_READ) },
-	{ "n25q064a",    INFO(0x20bb17, 0, 64 * 1024,  128, SECT_4K | SPI_NOR_QUAD_READ) },
-	{ "n25q128a11",  INFO(0x20bb18, 0, 64 * 1024,  256, SECT_4K | SPI_NOR_QUAD_READ) },
-	{ "n25q128a13",  INFO(0x20ba18, 0, 64 * 1024,  256, SECT_4K | SPI_NOR_QUAD_READ) },
-	{ "n25q256a",    INFO(0x20ba19, 0, 64 * 1024,  512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-	{ "n25q256ax1",  INFO(0x20bb19, 0, 64 * 1024,  512, SECT_4K | SPI_NOR_QUAD_READ) },
-	{ "n25q512a",    INFO(0x20bb20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
-	{ "n25q512ax3",  INFO(0x20ba20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
-	{ "n25q00",      INFO(0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
-	{ "n25q00a",     INFO(0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
-	{ "mt25qu02g",   INFO(0x20bb22, 0, 64 * 1024, 4096, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
-#endif
-#ifdef CONFIG_SPI_FLASH_SPANSION	/* SPANSION */
-	/* Spansion/Cypress -- single (large) sector size only, at least
-	 * for the chips listed here (without boot sectors).
-	 */
-	{ "s25sl032p",  INFO(0x010215, 0x4d00,  64 * 1024,  64, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-	{ "s25sl064p",  INFO(0x010216, 0x4d00,  64 * 1024, 128, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-	{ "s25fl256s0", INFO(0x010219, 0x4d00, 256 * 1024, 128, USE_CLSR) },
-	{ "s25fl256s1", INFO(0x010219, 0x4d01,  64 * 1024, 512, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
-	{ "s25fl512s",  INFO6(0x010220, 0x4d0081, 256 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
-	{ "s25fl512s_256k",  INFO(0x010220, 0x4d00, 256 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
-	{ "s25fl512s_64k",  INFO(0x010220, 0x4d01, 64 * 1024, 1024, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
-	{ "s25fl512s_512k",  INFO(0x010220, 0x4f00, 256 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
-	{ "s25sl12800", INFO(0x012018, 0x0300, 256 * 1024,  64, 0) },
-	{ "s25sl12801", INFO(0x012018, 0x0301,  64 * 1024, 256, 0) },
-	{ "s25fl128s",  INFO6(0x012018, 0x4d0180, 64 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
-	{ "s25fl129p0", INFO(0x012018, 0x4d00, 256 * 1024,  64, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
-	{ "s25fl129p1", INFO(0x012018, 0x4d01,  64 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
-	{ "s25sl008a",  INFO(0x010213,      0,  64 * 1024,  16, 0) },
-	{ "s25sl016a",  INFO(0x010214,      0,  64 * 1024,  32, 0) },
-	{ "s25sl032a",  INFO(0x010215,      0,  64 * 1024,  64, 0) },
-	{ "s25sl064a",  INFO(0x010216,      0,  64 * 1024, 128, 0) },
-	{ "s25fl116k",  INFO(0x014015,      0,  64 * 1024,  32, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-	{ "s25fl164k",  INFO(0x014017,      0,  64 * 1024, 128, SECT_4K) },
-	{ "s25fl208k",  INFO(0x014014,      0,  64 * 1024,  16, SECT_4K | SPI_NOR_DUAL_READ) },
-	{ "s25fl128l",  INFO(0x016018,      0,  64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
-#endif
-#ifdef CONFIG_SPI_FLASH_SST		/* SST */
-	/* SST -- large erase sizes are "overlays", "sectors" are 4K */
-	{ "sst25vf040b", INFO(0xbf258d, 0, 64 * 1024,  8, SECT_4K | SST_WRITE) },
-	{ "sst25vf080b", INFO(0xbf258e, 0, 64 * 1024, 16, SECT_4K | SST_WRITE) },
-	{ "sst25vf016b", INFO(0xbf2541, 0, 64 * 1024, 32, SECT_4K | SST_WRITE) },
-	{ "sst25vf032b", INFO(0xbf254a, 0, 64 * 1024, 64, SECT_4K | SST_WRITE) },
-	{ "sst25vf064c", INFO(0xbf254b, 0, 64 * 1024, 128, SECT_4K) },
-	{ "sst25wf512",  INFO(0xbf2501, 0, 64 * 1024,  1, SECT_4K | SST_WRITE) },
-	{ "sst25wf010",  INFO(0xbf2502, 0, 64 * 1024,  2, SECT_4K | SST_WRITE) },
-	{ "sst25wf020",  INFO(0xbf2503, 0, 64 * 1024,  4, SECT_4K | SST_WRITE) },
-	{ "sst25wf020a", INFO(0x621612, 0, 64 * 1024,  4, SECT_4K) },
-	{ "sst25wf040b", INFO(0x621613, 0, 64 * 1024,  8, SECT_4K) },
-	{ "sst25wf040",  INFO(0xbf2504, 0, 64 * 1024,  8, SECT_4K | SST_WRITE) },
-	{ "sst25wf080",  INFO(0xbf2505, 0, 64 * 1024, 16, SECT_4K | SST_WRITE) },
-	{ "sst26vf064b", INFO(0xbf2643, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-	{ "sst26wf016",  INFO(0xbf2651, 0, 64 * 1024,  32, SECT_4K) },
-	{ "sst26wf032",	 INFO(0xbf2622, 0, 64 * 1024,  64, SECT_4K) },
-	{ "sst26wf064",	 INFO(0xbf2643, 0, 64 * 1024, 128, SECT_4K) },
-#endif
-#ifdef CONFIG_SPI_FLASH_STMICRO		/* STMICRO */
-	/* ST Microelectronics -- newer production may have feature updates */
-	{ "m25p10",  INFO(0x202011,  0,  32 * 1024,   4, 0) },
-	{ "m25p20",  INFO(0x202012,  0,  64 * 1024,   4, 0) },
-	{ "m25p40",  INFO(0x202013,  0,  64 * 1024,   8, 0) },
-	{ "m25p80",  INFO(0x202014,  0,  64 * 1024,  16, 0) },
-	{ "m25p16",  INFO(0x202015,  0,  64 * 1024,  32, 0) },
-	{ "m25p32",  INFO(0x202016,  0,  64 * 1024,  64, 0) },
-	{ "m25p64",  INFO(0x202017,  0,  64 * 1024, 128, 0) },
-	{ "m25p128", INFO(0x202018,  0, 256 * 1024,  64, 0) },
-	{ "m25pe16", INFO(0x208015,  0, 64 * 1024, 32, SECT_4K) },
-	{ "m25px16",    INFO(0x207115,  0, 64 * 1024, 32, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-	{ "m25px64",    INFO(0x207117,  0, 64 * 1024, 128, 0) },
-#endif
-#ifdef CONFIG_SPI_FLASH_WINBOND		/* WINBOND */
-	/* Winbond -- w25x "blocks" are 64K, "sectors" are 4KiB */
-	{ "w25x05", INFO(0xef3010, 0, 64 * 1024,  1,  SECT_4K) },
-	{ "w25x10", INFO(0xef3011, 0, 64 * 1024,  2,  SECT_4K) },
-	{ "w25x20", INFO(0xef3012, 0, 64 * 1024,  4,  SECT_4K) },
-	{ "w25x40", INFO(0xef3013, 0, 64 * 1024,  8,  SECT_4K) },
-	{ "w25x80", INFO(0xef3014, 0, 64 * 1024,  16, SECT_4K) },
-	{ "w25x16", INFO(0xef3015, 0, 64 * 1024,  32, SECT_4K) },
-	{
-		"w25q16dw", INFO(0xef6015, 0, 64 * 1024,  32,
-			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
-			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
-	},
-	{ "w25x32", INFO(0xef3016, 0, 64 * 1024,  64, SECT_4K) },
-	{ "w25q20cl", INFO(0xef4012, 0, 64 * 1024,  4, SECT_4K) },
-	{ "w25q20bw", INFO(0xef5012, 0, 64 * 1024,  4, SECT_4K) },
-	{ "w25q20ew", INFO(0xef6012, 0, 64 * 1024,  4, SECT_4K) },
-	{ "w25q32", INFO(0xef4016, 0, 64 * 1024,  64, SECT_4K) },
-	{
-		"w25q32dw", INFO(0xef6016, 0, 64 * 1024,  64,
-			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
-			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
-	},
-	{
-		"w25q32jv", INFO(0xef7016, 0, 64 * 1024,  64,
-			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
-			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
-	},
-	{ "w25x64", INFO(0xef3017, 0, 64 * 1024, 128, SECT_4K) },
-	{ "w25q64", INFO(0xef4017, 0, 64 * 1024, 128, SECT_4K) },
-	{
-		"w25q64dw", INFO(0xef6017, 0, 64 * 1024, 128,
-			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
-			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
-	},
-	{
-		"w25q128fw", INFO(0xef6018, 0, 64 * 1024, 256,
-			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
-			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
-	},
-	{ "w25q80", INFO(0xef5014, 0, 64 * 1024,  16, SECT_4K) },
-	{ "w25q80bl", INFO(0xef4014, 0, 64 * 1024,  16, SECT_4K) },
-	{ "w25q128", INFO(0xef4018, 0, 64 * 1024, 256, SECT_4K) },
-	{ "w25q256", INFO(0xef4019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-	{ "w25m512jv", INFO(0xef7119, 0, 64 * 1024, 1024,
-			SECT_4K | SPI_NOR_QUAD_READ | SPI_NOR_DUAL_READ) },
-#endif
-#ifdef CONFIG_SPI_FLASH_XMC
-	/* XMC (Wuhan Xinxin Semiconductor Manufacturing Corp.) */
-	{ "XM25QH64A", INFO(0x207017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-	{ "XM25QH128A", INFO(0x207018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-#endif
-	{ },
-};
-
 static const struct flash_info *spi_nor_read_id(struct spi_nor *nor)
 {
 	int			tmp;
 	u8			id[SPI_NOR_MAX_ID_LEN];
 	const struct flash_info	*info;
 
-	if (!ARRAY_SIZE(spi_nor_ids))
-		return ERR_PTR(-ENODEV);
-
 	tmp = nor->read_reg(nor, SPINOR_OP_RDID, id, SPI_NOR_MAX_ID_LEN);
 	if (tmp < 0) {
 		dev_dbg(nor->dev, "error %d reading JEDEC ID\n", tmp);
 		return ERR_PTR(tmp);
 	}
 
-	for (tmp = 0; tmp < ARRAY_SIZE(spi_nor_ids) - 1; tmp++) {
-		info = &spi_nor_ids[tmp];
+	info = spi_nor_ids;
+	for (; info->name; info++) {
 		if (info->id_len) {
 			if (!memcmp(info->id, id, info->id_len))
-				return &spi_nor_ids[tmp];
+				return info;
 		}
 	}
+
 	dev_err(nor->dev, "unrecognized JEDEC id bytes: %02x, %02x, %02x\n",
 		id[0], id[1], id[2]);
 	return ERR_PTR(-ENODEV);
diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
new file mode 100644
index 0000000000..3215e2431d
--- /dev/null
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -0,0 +1,297 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ *
+ * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
+ * Copyright (C) 2016 Jagan Teki <jagan@openedev.com>
+ * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
+ */
+
+#include <common.h>
+#include <spi.h>
+#include <spi_flash.h>
+
+#include "sf_internal.h"
+
+/* Exclude chip names for SPL to save space */
+#if !CONFIG_IS_ENABLED(SPI_FLASH_TINY)
+#define INFO_NAME(_name) .name = _name,
+#else
+#define INFO_NAME(_name)
+#endif
+
+/* Used when the "_ext_id" is two bytes at most */
+#define INFO(_name, _jedec_id, _ext_id, _sector_size, _n_sectors, _flags)	\
+		INFO_NAME(_name)					\
+		.id = {							\
+			((_jedec_id) >> 16) & 0xff,			\
+			((_jedec_id) >> 8) & 0xff,			\
+			(_jedec_id) & 0xff,				\
+			((_ext_id) >> 8) & 0xff,			\
+			(_ext_id) & 0xff,				\
+			},						\
+		.id_len = (!(_jedec_id) ? 0 : (3 + ((_ext_id) ? 2 : 0))),	\
+		.sector_size = (_sector_size),				\
+		.n_sectors = (_n_sectors),				\
+		.page_size = 256,					\
+		.flags = (_flags),
+
+#define INFO6(_name, _jedec_id, _ext_id, _sector_size, _n_sectors, _flags)	\
+		INFO_NAME(_name)					\
+		.id = {							\
+			((_jedec_id) >> 16) & 0xff,			\
+			((_jedec_id) >> 8) & 0xff,			\
+			(_jedec_id) & 0xff,				\
+			((_ext_id) >> 16) & 0xff,			\
+			((_ext_id) >> 8) & 0xff,			\
+			(_ext_id) & 0xff,				\
+			},						\
+		.id_len = 6,						\
+		.sector_size = (_sector_size),				\
+		.n_sectors = (_n_sectors),				\
+		.page_size = 256,					\
+		.flags = (_flags),
+
+/* NOTE: double check command sets and memory organization when you add
+ * more nor chips.  This current list focusses on newer chips, which
+ * have been converging on command sets which including JEDEC ID.
+ *
+ * All newly added entries should describe *hardware* and should use SECT_4K
+ * (or SECT_4K_PMC) if hardware supports erasing 4 KiB sectors. For usage
+ * scenarios excluding small sectors there is config option that can be
+ * disabled: CONFIG_MTD_SPI_NOR_USE_4K_SECTORS.
+ * For historical (and compatibility) reasons (before we got above config) some
+ * old entries may be missing 4K flag.
+ */
+const struct flash_info spi_nor_ids[] = {
+#ifdef CONFIG_SPI_FLASH_ATMEL		/* ATMEL */
+	/* Atmel -- some are (confusingly) marketed as "DataFlash" */
+	{ INFO("at26df321",	0x1f4700, 0, 64 * 1024, 64, SECT_4K) },
+	{ INFO("at25df321a",	0x1f4701, 0, 64 * 1024, 64, SECT_4K) },
+
+	{ INFO("at45db011d",	0x1f2200, 0, 64 * 1024,   4, SECT_4K) },
+	{ INFO("at45db021d",	0x1f2300, 0, 64 * 1024,   8, SECT_4K) },
+	{ INFO("at45db041d",	0x1f2400, 0, 64 * 1024,   8, SECT_4K) },
+	{ INFO("at45db081d",	0x1f2500, 0, 64 * 1024,  16, SECT_4K) },
+	{ INFO("at45db161d",	0x1f2600, 0, 64 * 1024,  32, SECT_4K) },
+	{ INFO("at45db321d",	0x1f2700, 0, 64 * 1024,  64, SECT_4K) },
+	{ INFO("at45db641d",	0x1f2800, 0, 64 * 1024, 128, SECT_4K) },
+	{ INFO("at26df081a", 	0x1f4501, 0, 64 * 1024,  16, SECT_4K) },
+#endif
+#ifdef CONFIG_SPI_FLASH_EON		/* EON */
+	/* EON -- en25xxx */
+	{ INFO("en25q32b",   0x1c3016, 0, 64 * 1024,   64, 0) },
+	{ INFO("en25q64",    0x1c3017, 0, 64 * 1024,  128, SECT_4K) },
+	{ INFO("en25qh128",  0x1c7018, 0, 64 * 1024,  256, 0) },
+	{ INFO("en25s64",    0x1c3817, 0, 64 * 1024,  128, SECT_4K) },
+#endif
+#ifdef CONFIG_SPI_FLASH_GIGADEVICE	/* GIGADEVICE */
+	/* GigaDevice */
+	{
+		INFO("gd25q16", 0xc84015, 0, 64 * 1024,  32,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+	},
+	{
+		INFO("gd25q32", 0xc84016, 0, 64 * 1024,  64,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+	},
+	{
+		INFO("gd25lq32", 0xc86016, 0, 64 * 1024, 64,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+	},
+	{
+		INFO("gd25q64", 0xc84017, 0, 64 * 1024, 128,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+	},
+#endif
+#ifdef CONFIG_SPI_FLASH_ISSI		/* ISSI */
+	/* ISSI */
+	{ INFO("is25lq040b", 0x9d4013, 0, 64 * 1024,   8,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{ INFO("is25lp032",	0x9d6016, 0, 64 * 1024,  64, 0) },
+	{ INFO("is25lp064",	0x9d6017, 0, 64 * 1024, 128, 0) },
+	{ INFO("is25lp128",  0x9d6018, 0, 64 * 1024, 256,
+			SECT_4K | SPI_NOR_DUAL_READ) },
+	{ INFO("is25lp256",  0x9d6019, 0, 64 * 1024, 512,
+			SECT_4K | SPI_NOR_DUAL_READ) },
+	{ INFO("is25wp032",  0x9d7016, 0, 64 * 1024,  64,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{ INFO("is25wp064",  0x9d7017, 0, 64 * 1024, 128,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{ INFO("is25wp128",  0x9d7018, 0, 64 * 1024, 256,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+#endif
+#ifdef CONFIG_SPI_FLASH_MACRONIX	/* MACRONIX */
+	/* Macronix */
+	{ INFO("mx25l2005a",  0xc22012, 0, 64 * 1024,   4, SECT_4K) },
+	{ INFO("mx25l4005a",  0xc22013, 0, 64 * 1024,   8, SECT_4K) },
+	{ INFO("mx25l8005",   0xc22014, 0, 64 * 1024,  16, 0) },
+	{ INFO("mx25l1606e",  0xc22015, 0, 64 * 1024,  32, SECT_4K) },
+	{ INFO("mx25l3205d",  0xc22016, 0, 64 * 1024,  64, SECT_4K) },
+	{ INFO("mx25l6405d",  0xc22017, 0, 64 * 1024, 128, SECT_4K) },
+	{ INFO("mx25u2033e",  0xc22532, 0, 64 * 1024,   4, SECT_4K) },
+	{ INFO("mx25u1635e",  0xc22535, 0, 64 * 1024,  32, SECT_4K) },
+	{ INFO("mx25u6435f",  0xc22537, 0, 64 * 1024, 128, SECT_4K) },
+	{ INFO("mx25l12805d", 0xc22018, 0, 64 * 1024, 256, 0) },
+	{ INFO("mx25l12855e", 0xc22618, 0, 64 * 1024, 256, 0) },
+	{ INFO("mx25l25635e", 0xc22019, 0, 64 * 1024, 512, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{ INFO("mx25u25635f", 0xc22539, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_4B_OPCODES) },
+	{ INFO("mx25l25655e", 0xc22619, 0, 64 * 1024, 512, 0) },
+	{ INFO("mx66l51235l", 0xc2201a, 0, 64 * 1024, 1024, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
+	{ INFO("mx66u51235f", 0xc2253a, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
+	{ INFO("mx66l1g45g",  0xc2201b, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{ INFO("mx25l1633e", 0xc22415, 0, 64 * 1024,   32, SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES | SECT_4K) },
+#endif
+
+#ifdef CONFIG_SPI_FLASH_STMICRO		/* STMICRO */
+	/* Micron */
+	{ INFO("n25q016a",	 0x20bb15, 0, 64 * 1024,   32, SECT_4K | SPI_NOR_QUAD_READ) },
+	{ INFO("n25q032",	 0x20ba16, 0, 64 * 1024,   64, SPI_NOR_QUAD_READ) },
+	{ INFO("n25q032a",	0x20bb16, 0, 64 * 1024,   64, SPI_NOR_QUAD_READ) },
+	{ INFO("n25q064",     0x20ba17, 0, 64 * 1024,  128, SECT_4K | SPI_NOR_QUAD_READ) },
+	{ INFO("n25q064a",    0x20bb17, 0, 64 * 1024,  128, SECT_4K | SPI_NOR_QUAD_READ) },
+	{ INFO("n25q128a11",  0x20bb18, 0, 64 * 1024,  256, SECT_4K | SPI_NOR_QUAD_READ) },
+	{ INFO("n25q128a13",  0x20ba18, 0, 64 * 1024,  256, SECT_4K | SPI_NOR_QUAD_READ) },
+	{ INFO("n25q256a",    0x20ba19, 0, 64 * 1024,  512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
+	{ INFO("n25q256ax1",  0x20bb19, 0, 64 * 1024,  512, SECT_4K | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
+	{ INFO("n25q512a",    0x20bb20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
+	{ INFO("n25q512ax3",  0x20ba20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
+	{ INFO("n25q00",      0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
+	{ INFO("n25q00a",     0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
+	{ INFO("mt25qu02g",   0x20bb22, 0, 64 * 1024, 4096, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
+#endif
+#ifdef CONFIG_SPI_FLASH_SPANSION	/* SPANSION */
+	/* Spansion/Cypress -- single (large) sector size only, at least
+	 * for the chips listed here (without boot sectors).
+	 */
+	{ INFO("s25sl032p",  0x010215, 0x4d00,  64 * 1024,  64, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{ INFO("s25sl064p",  0x010216, 0x4d00,  64 * 1024, 128, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{ INFO("s25fl256s0", 0x010219, 0x4d00, 256 * 1024, 128, USE_CLSR) },
+	{ INFO("s25fl256s1", 0x010219, 0x4d01,  64 * 1024, 512, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
+	{ INFO6("s25fl512s",  0x010220, 0x4d0081, 256 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
+	{ INFO("s25fl512s_256k",  0x010220, 0x4d00, 256 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
+	{ INFO("s25fl512s_64k",  0x010220, 0x4d01, 64 * 1024, 1024, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
+	{ INFO("s25fl512s_512k", 0x010220, 0x4f00, 256 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
+	{ INFO("s25sl12800", 0x012018, 0x0300, 256 * 1024,  64, 0) },
+	{ INFO("s25sl12801", 0x012018, 0x0301,  64 * 1024, 256, 0) },
+	{ INFO6("s25fl128s",  0x012018, 0x4d0180, 64 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
+	{ INFO("s25fl129p0", 0x012018, 0x4d00, 256 * 1024,  64, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
+	{ INFO("s25fl129p1", 0x012018, 0x4d01,  64 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
+	{ INFO("s25sl008a",  0x010213,      0,  64 * 1024,  16, 0) },
+	{ INFO("s25sl016a",  0x010214,      0,  64 * 1024,  32, 0) },
+	{ INFO("s25sl032a",  0x010215,      0,  64 * 1024,  64, 0) },
+	{ INFO("s25sl064a",  0x010216,      0,  64 * 1024, 128, 0) },
+	{ INFO("s25fl116k",  0x014015,      0,  64 * 1024,  32, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{ INFO("s25fl164k",  0x014017,      0,  64 * 1024, 128, SECT_4K) },
+	{ INFO("s25fl208k",  0x014014,      0,  64 * 1024,  16, SECT_4K | SPI_NOR_DUAL_READ) },
+	{ INFO("s25fl128l",  0x016018,      0,  64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
+#endif
+#ifdef CONFIG_SPI_FLASH_SST		/* SST */
+	/* SST -- large erase sizes are "overlays", "sectors" are 4K */
+	{ INFO("sst25vf040b", 0xbf258d, 0, 64 * 1024,  8, SECT_4K | SST_WRITE) },
+	{ INFO("sst25vf080b", 0xbf258e, 0, 64 * 1024, 16, SECT_4K | SST_WRITE) },
+	{ INFO("sst25vf016b", 0xbf2541, 0, 64 * 1024, 32, SECT_4K | SST_WRITE) },
+	{ INFO("sst25vf032b", 0xbf254a, 0, 64 * 1024, 64, SECT_4K | SST_WRITE) },
+	{ INFO("sst25vf064c", 0xbf254b, 0, 64 * 1024, 128, SECT_4K) },
+	{ INFO("sst25wf512",  0xbf2501, 0, 64 * 1024,  1, SECT_4K | SST_WRITE) },
+	{ INFO("sst25wf010",  0xbf2502, 0, 64 * 1024,  2, SECT_4K | SST_WRITE) },
+	{ INFO("sst25wf020",  0xbf2503, 0, 64 * 1024,  4, SECT_4K | SST_WRITE) },
+	{ INFO("sst25wf020a", 0x621612, 0, 64 * 1024,  4, SECT_4K) },
+	{ INFO("sst25wf040b", 0x621613, 0, 64 * 1024,  8, SECT_4K) },
+	{ INFO("sst25wf040",  0xbf2504, 0, 64 * 1024,  8, SECT_4K | SST_WRITE) },
+	{ INFO("sst25wf080",  0xbf2505, 0, 64 * 1024, 16, SECT_4K | SST_WRITE) },
+	{ INFO("sst26vf064b", 0xbf2643, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{ INFO("sst26wf016",  0xbf2651, 0, 64 * 1024,  32, SECT_4K) },
+	{ INFO("sst26wf032",  0xbf2622, 0, 64 * 1024,  64, SECT_4K) },
+	{ INFO("sst26wf064",  0xbf2643, 0, 64 * 1024, 128, SECT_4K) },
+#endif
+#ifdef CONFIG_SPI_FLASH_STMICRO		/* STMICRO */
+	/* ST Microelectronics -- newer production may have feature updates */
+	{ INFO("m25p10",  0x202011,  0,  32 * 1024,   4, 0) },
+	{ INFO("m25p20",  0x202012,  0,  64 * 1024,   4, 0) },
+	{ INFO("m25p40",  0x202013,  0,  64 * 1024,   8, 0) },
+	{ INFO("m25p80",  0x202014,  0,  64 * 1024,  16, 0) },
+	{ INFO("m25p16",  0x202015,  0,  64 * 1024,  32, 0) },
+	{ INFO("m25p32",  0x202016,  0,  64 * 1024,  64, 0) },
+	{ INFO("m25p64",  0x202017,  0,  64 * 1024, 128, 0) },
+	{ INFO("m25p128", 0x202018,  0, 256 * 1024,  64, 0) },
+	{ INFO("m25pe16", 0x208015,  0, 64 * 1024, 32, SECT_4K) },
+	{ INFO("m25px16",    0x207115,  0, 64 * 1024, 32, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{ INFO("m25px64",    0x207117,  0, 64 * 1024, 128, 0) },
+#endif
+#ifdef CONFIG_SPI_FLASH_WINBOND		/* WINBOND */
+	/* Winbond -- w25x "blocks" are 64K, "sectors" are 4KiB */
+	{ INFO("w25p80", 0xef2014, 0x0,	64 * 1024,    16, 0) },
+	{ INFO("w25p16", 0xef2015, 0x0,	64 * 1024,    32, 0) },
+	{ INFO("w25p32", 0xef2016, 0x0,	64 * 1024,    64, 0) },
+	{ INFO("w25x05", 0xef3010, 0, 64 * 1024,  1,  SECT_4K) },
+	{ INFO("w25x40", 0xef3013, 0, 64 * 1024,  8,  SECT_4K) },
+	{ INFO("w25x16", 0xef3015, 0, 64 * 1024,  32, SECT_4K) },
+	{
+		INFO("w25q16dw", 0xef6015, 0, 64 * 1024,  32,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+	},
+	{ INFO("w25x32", 0xef3016, 0, 64 * 1024,  64, SECT_4K) },
+	{ INFO("w25q20cl", 0xef4012, 0, 64 * 1024,  4, SECT_4K) },
+	{ INFO("w25q20bw", 0xef5012, 0, 64 * 1024,  4, SECT_4K) },
+	{ INFO("w25q20ew", 0xef6012, 0, 64 * 1024,  4, SECT_4K) },
+	{ INFO("w25q32", 0xef4016, 0, 64 * 1024,  64, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{
+		INFO("w25q32dw", 0xef6016, 0, 64 * 1024,  64,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+	},
+	{
+		INFO("w25q32jv", 0xef7016, 0, 64 * 1024,  64,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+	},
+	{ INFO("w25x64", 0xef3017, 0, 64 * 1024, 128, SECT_4K) },
+	{
+		INFO("w25q64dw", 0xef6017, 0, 64 * 1024, 128,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+	},
+	{
+		INFO("w25q64jv", 0xef7017, 0, 64 * 1024, 128,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+	},
+	{
+		INFO("w25q128fw", 0xef6018, 0, 64 * 1024, 256,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+	},
+	{
+		INFO("w25q128jv", 0xef7018, 0, 64 * 1024, 256,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+	},
+	{
+		INFO("w25q256fw", 0xef6019, 0, 64 * 1024, 512,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+	},
+	{
+		INFO("w25q256jw", 0xef7019, 0, 64 * 1024, 512,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+	},
+	{ INFO("w25q80", 0xef5014, 0, 64 * 1024,  16, SECT_4K) },
+	{ INFO("w25q80bl", 0xef4014, 0, 64 * 1024,  16, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{ INFO("w25q16cl", 0xef4015, 0, 64 * 1024,  32, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{ INFO("w25q64cv", 0xef4017, 0, 64 * 1024,  128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{ INFO("w25q128", 0xef4018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{ INFO("w25q256", 0xef4019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+#endif
+#ifdef CONFIG_SPI_FLASH_XMC
+	/* XMC (Wuhan Xinxin Semiconductor Manufacturing Corp.) */
+	{ INFO("XM25QH64A", 0x207017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{ INFO("XM25QH128A", 0x207018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+#endif
+	{ },
+};
diff --git a/drivers/mtd/spi/spi-nor-tiny.c b/drivers/mtd/spi/spi-nor-tiny.c
new file mode 100644
index 0000000000..c19d468d62
--- /dev/null
+++ b/drivers/mtd/spi/spi-nor-tiny.c
@@ -0,0 +1,804 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Based on m25p80.c, by Mike Lavender (mike@steroidmicros.com), with
+ * influence from lart.c (Abraham Van Der Merwe) and mtd_dataflash.c
+ *
+ * Copyright (C) 2005, Intec Automation Inc.
+ * Copyright (C) 2014, Freescale Semiconductor, Inc.
+ *
+ * Synced from Linux v4.19
+ */
+
+#include <common.h>
+#include <linux/err.h>
+#include <linux/errno.h>
+#include <linux/log2.h>
+#include <linux/math64.h>
+#include <linux/sizes.h>
+
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/spi-nor.h>
+#include <spi-mem.h>
+#include <spi.h>
+
+#include "sf_internal.h"
+
+/* Define max times to check status register before we give up. */
+
+/*
+ * For everything but full-chip erase; probably could be much smaller, but kept
+ * around for safety for now
+ */
+
+#define HZ					CONFIG_SYS_HZ
+
+#define DEFAULT_READY_WAIT_JIFFIES		(40UL * HZ)
+
+static int spi_nor_read_write_reg(struct spi_nor *nor, struct spi_mem_op
+		*op, void *buf)
+{
+	if (op->data.dir == SPI_MEM_DATA_IN)
+		op->data.buf.in = buf;
+	else
+		op->data.buf.out = buf;
+	return spi_mem_exec_op(nor->spi, op);
+}
+
+static int spi_nor_read_reg(struct spi_nor *nor, u8 code, u8 *val, int len)
+{
+	struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(code, 1),
+					  SPI_MEM_OP_NO_ADDR,
+					  SPI_MEM_OP_NO_DUMMY,
+					  SPI_MEM_OP_DATA_IN(len, NULL, 1));
+	int ret;
+
+	ret = spi_nor_read_write_reg(nor, &op, val);
+	if (ret < 0)
+		dev_dbg(&flash->spimem->spi->dev, "error %d reading %x\n", ret,
+			code);
+
+	return ret;
+}
+
+static int spi_nor_write_reg(struct spi_nor *nor, u8 opcode, u8 *buf, int len)
+{
+	struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 1),
+					  SPI_MEM_OP_NO_ADDR,
+					  SPI_MEM_OP_NO_DUMMY,
+					  SPI_MEM_OP_DATA_OUT(len, NULL, 1));
+
+	return spi_nor_read_write_reg(nor, &op, buf);
+}
+
+static ssize_t spi_nor_read_data(struct spi_nor *nor, loff_t from, size_t len,
+				 u_char *buf)
+{
+	struct spi_mem_op op =
+			SPI_MEM_OP(SPI_MEM_OP_CMD(nor->read_opcode, 1),
+				   SPI_MEM_OP_ADDR(nor->addr_width, from, 1),
+				   SPI_MEM_OP_DUMMY(nor->read_dummy, 1),
+				   SPI_MEM_OP_DATA_IN(len, buf, 1));
+	size_t remaining = len;
+	int ret;
+
+	/* get transfer protocols. */
+	op.cmd.buswidth = spi_nor_get_protocol_inst_nbits(nor->read_proto);
+	op.addr.buswidth = spi_nor_get_protocol_addr_nbits(nor->read_proto);
+	op.dummy.buswidth = op.addr.buswidth;
+	op.data.buswidth = spi_nor_get_protocol_data_nbits(nor->read_proto);
+
+	/* convert the dummy cycles to the number of bytes */
+	op.dummy.nbytes = (nor->read_dummy * op.dummy.buswidth) / 8;
+
+	while (remaining) {
+		op.data.nbytes = remaining < UINT_MAX ? remaining : UINT_MAX;
+		ret = spi_mem_adjust_op_size(nor->spi, &op);
+		if (ret)
+			return ret;
+
+		ret = spi_mem_exec_op(nor->spi, &op);
+		if (ret)
+			return ret;
+
+		op.addr.val += op.data.nbytes;
+		remaining -= op.data.nbytes;
+		op.data.buf.in += op.data.nbytes;
+	}
+
+	return len;
+}
+
+#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
+/*
+ * Read configuration register, returning its value in the
+ * location. Return the configuration register value.
+ * Returns negative if error occurred.
+ */
+static int read_cr(struct spi_nor *nor)
+{
+	int ret;
+	u8 val;
+
+	ret = spi_nor_read_reg(nor, SPINOR_OP_RDCR, &val, 1);
+	if (ret < 0) {
+		dev_dbg(nor->dev, "error %d reading CR\n", ret);
+		return ret;
+	}
+
+	return val;
+}
+#endif
+
+/*
+ * Write status register 1 byte
+ * Returns negative if error occurred.
+ */
+static inline int write_sr(struct spi_nor *nor, u8 val)
+{
+	nor->cmd_buf[0] = val;
+	return spi_nor_write_reg(nor, SPINOR_OP_WRSR, nor->cmd_buf, 1);
+}
+
+/*
+ * Set write enable latch with Write Enable command.
+ * Returns negative if error occurred.
+ */
+static inline int write_enable(struct spi_nor *nor)
+{
+	return spi_nor_write_reg(nor, SPINOR_OP_WREN, NULL, 0);
+}
+
+/*
+ * Send write disable instruction to the chip.
+ */
+static inline int write_disable(struct spi_nor *nor)
+{
+	return spi_nor_write_reg(nor, SPINOR_OP_WRDI, NULL, 0);
+}
+
+static inline struct spi_nor *mtd_to_spi_nor(struct mtd_info *mtd)
+{
+	return mtd->priv;
+}
+
+static u8 spi_nor_convert_opcode(u8 opcode, const u8 table[][2], size_t size)
+{
+	size_t i;
+
+	for (i = 0; i < size; i++)
+		if (table[i][0] == opcode)
+			return table[i][1];
+
+	/* No conversion found, keep input op code. */
+	return opcode;
+}
+
+static inline u8 spi_nor_convert_3to4_read(u8 opcode)
+{
+	static const u8 spi_nor_3to4_read[][2] = {
+		{ SPINOR_OP_READ,	SPINOR_OP_READ_4B },
+		{ SPINOR_OP_READ_FAST,	SPINOR_OP_READ_FAST_4B },
+		{ SPINOR_OP_READ_1_1_2,	SPINOR_OP_READ_1_1_2_4B },
+		{ SPINOR_OP_READ_1_2_2,	SPINOR_OP_READ_1_2_2_4B },
+		{ SPINOR_OP_READ_1_1_4,	SPINOR_OP_READ_1_1_4_4B },
+		{ SPINOR_OP_READ_1_4_4,	SPINOR_OP_READ_1_4_4_4B },
+	};
+
+	return spi_nor_convert_opcode(opcode, spi_nor_3to4_read,
+				      ARRAY_SIZE(spi_nor_3to4_read));
+}
+
+static void spi_nor_set_4byte_opcodes(struct spi_nor *nor,
+				      const struct flash_info *info)
+{
+	nor->read_opcode = spi_nor_convert_3to4_read(nor->read_opcode);
+}
+
+/* Enable/disable 4-byte addressing mode. */
+static inline int set_4byte(struct spi_nor *nor, const struct flash_info *info,
+			    int enable)
+{
+	int status;
+	bool need_wren = false;
+	u8 cmd;
+
+	switch (JEDEC_MFR(info)) {
+	case SNOR_MFR_ST:
+	case SNOR_MFR_MICRON:
+		/* Some Micron need WREN command; all will accept it */
+		need_wren = true;
+	case SNOR_MFR_MACRONIX:
+	case SNOR_MFR_WINBOND:
+		if (need_wren)
+			write_enable(nor);
+
+		cmd = enable ? SPINOR_OP_EN4B : SPINOR_OP_EX4B;
+		status = spi_nor_write_reg(nor, cmd, NULL, 0);
+		if (need_wren)
+			write_disable(nor);
+
+		if (!status && !enable &&
+		    JEDEC_MFR(info) == SNOR_MFR_WINBOND) {
+			/*
+			 * On Winbond W25Q256FV, leaving 4byte mode causes
+			 * the Extended Address Register to be set to 1, so all
+			 * 3-byte-address reads come from the second 16M.
+			 * We must clear the register to enable normal behavior.
+			 */
+			write_enable(nor);
+			nor->cmd_buf[0] = 0;
+			spi_nor_write_reg(nor, SPINOR_OP_WREAR,
+					  nor->cmd_buf, 1);
+			write_disable(nor);
+		}
+
+		return status;
+	default:
+		/* Spansion style */
+		nor->cmd_buf[0] = enable << 7;
+		return spi_nor_write_reg(nor, SPINOR_OP_BRWR, nor->cmd_buf, 1);
+	}
+}
+
+#if defined(CONFIG_SPI_FLASH_SPANSION) ||	\
+	defined(CONFIG_SPI_FLASH_WINBOND) ||	\
+	defined(CONFIG_SPI_FLASH_MACRONIX)
+/*
+ * Read the status register, returning its value in the location
+ * Return the status register value.
+ * Returns negative if error occurred.
+ */
+static int read_sr(struct spi_nor *nor)
+{
+	int ret;
+	u8 val;
+
+	ret = spi_nor_read_reg(nor, SPINOR_OP_RDSR, &val, 1);
+	if (ret < 0) {
+		pr_debug("error %d reading SR\n", (int)ret);
+		return ret;
+	}
+
+	return val;
+}
+
+/*
+ * Read the flag status register, returning its value in the location
+ * Return the status register value.
+ * Returns negative if error occurred.
+ */
+static int read_fsr(struct spi_nor *nor)
+{
+	int ret;
+	u8 val;
+
+	ret = spi_nor_read_reg(nor, SPINOR_OP_RDFSR, &val, 1);
+	if (ret < 0) {
+		pr_debug("error %d reading FSR\n", ret);
+		return ret;
+	}
+
+	return val;
+}
+
+static int spi_nor_sr_ready(struct spi_nor *nor)
+{
+	int sr = read_sr(nor);
+
+	if (sr < 0)
+		return sr;
+
+	return !(sr & SR_WIP);
+}
+
+static int spi_nor_fsr_ready(struct spi_nor *nor)
+{
+	int fsr = read_fsr(nor);
+
+	if (fsr < 0)
+		return fsr;
+	return fsr & FSR_READY;
+}
+
+static int spi_nor_ready(struct spi_nor *nor)
+{
+	int sr, fsr;
+
+	sr = spi_nor_sr_ready(nor);
+	if (sr < 0)
+		return sr;
+	fsr = nor->flags & SNOR_F_USE_FSR ? spi_nor_fsr_ready(nor) : 1;
+	if (fsr < 0)
+		return fsr;
+	return sr && fsr;
+}
+
+/*
+ * Service routine to read status register until ready, or timeout occurs.
+ * Returns non-zero if error.
+ */
+static int spi_nor_wait_till_ready_with_timeout(struct spi_nor *nor,
+						unsigned long timeout)
+{
+	unsigned long timebase;
+	int ret;
+
+	timebase = get_timer(0);
+
+	while (get_timer(timebase) < timeout) {
+		ret = spi_nor_ready(nor);
+		if (ret < 0)
+			return ret;
+		if (ret)
+			return 0;
+	}
+
+	dev_err(nor->dev, "flash operation timed out\n");
+
+	return -ETIMEDOUT;
+}
+
+static int spi_nor_wait_till_ready(struct spi_nor *nor)
+{
+	return spi_nor_wait_till_ready_with_timeout(nor,
+						    DEFAULT_READY_WAIT_JIFFIES);
+}
+#endif /* CONFIG_SPI_FLASH_SPANSION */
+
+/*
+ * Erase an address range on the nor chip.  The address range may extend
+ * one or more erase sectors.  Return an error is there is a problem erasing.
+ */
+static int spi_nor_erase(struct mtd_info *mtd, struct erase_info *instr)
+{
+	return -ENOTSUPP;
+}
+
+static const struct flash_info *spi_nor_read_id(struct spi_nor *nor)
+{
+	int			tmp;
+	u8			id[SPI_NOR_MAX_ID_LEN];
+	const struct flash_info	*info;
+
+	tmp = spi_nor_read_reg(nor, SPINOR_OP_RDID, id, SPI_NOR_MAX_ID_LEN);
+	if (tmp < 0) {
+		dev_dbg(nor->dev, "error %d reading JEDEC ID\n", tmp);
+		return ERR_PTR(tmp);
+	}
+
+	info = spi_nor_ids;
+	for (; info->sector_size != 0; info++) {
+		if (info->id_len) {
+			if (!memcmp(info->id, id, info->id_len))
+				return info;
+		}
+	}
+	dev_dbg(nor->dev, "unrecognized JEDEC id bytes: %02x, %02x, %02x\n",
+		id[0], id[1], id[2]);
+	return ERR_PTR(-ENODEV);
+}
+
+static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len,
+			size_t *retlen, u_char *buf)
+{
+	struct spi_nor *nor = mtd_to_spi_nor(mtd);
+	int ret;
+
+	dev_dbg(nor->dev, "from 0x%08x, len %zd\n", (u32)from, len);
+
+	while (len) {
+		loff_t addr = from;
+
+		ret = spi_nor_read_data(nor, addr, len, buf);
+		if (ret == 0) {
+			/* We shouldn't see 0-length reads */
+			ret = -EIO;
+			goto read_err;
+		}
+		if (ret < 0)
+			goto read_err;
+
+		*retlen += ret;
+		buf += ret;
+		from += ret;
+		len -= ret;
+	}
+	ret = 0;
+
+read_err:
+	return ret;
+}
+
+/*
+ * Write an address range to the nor chip.  Data must be written in
+ * FLASH_PAGESIZE chunks.  The address range may be any size provided
+ * it is within the physical boundaries.
+ */
+static int spi_nor_write(struct mtd_info *mtd, loff_t to, size_t len,
+			 size_t *retlen, const u_char *buf)
+{
+	return -ENOTSUPP;
+}
+
+#ifdef CONFIG_SPI_FLASH_MACRONIX
+/**
+ * macronix_quad_enable() - set QE bit in Status Register.
+ * @nor:	pointer to a 'struct spi_nor'
+ *
+ * Set the Quad Enable (QE) bit in the Status Register.
+ *
+ * bit 6 of the Status Register is the QE bit for Macronix like QSPI memories.
+ *
+ * Return: 0 on success, -errno otherwise.
+ */
+static int macronix_quad_enable(struct spi_nor *nor)
+{
+	int ret, val;
+
+	val = read_sr(nor);
+	if (val < 0)
+		return val;
+	if (val & SR_QUAD_EN_MX)
+		return 0;
+
+	write_enable(nor);
+
+	write_sr(nor, val | SR_QUAD_EN_MX);
+
+	ret = spi_nor_wait_till_ready(nor);
+	if (ret)
+		return ret;
+
+	ret = read_sr(nor);
+	if (!(ret > 0 && (ret & SR_QUAD_EN_MX))) {
+		dev_err(nor->dev, "Macronix Quad bit not set\n");
+		return -EINVAL;
+	}
+
+	return 0;
+}
+#endif
+
+#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
+/*
+ * Write status Register and configuration register with 2 bytes
+ * The first byte will be written to the status register, while the
+ * second byte will be written to the configuration register.
+ * Return negative if error occurred.
+ */
+static int write_sr_cr(struct spi_nor *nor, u8 *sr_cr)
+{
+	int ret;
+
+	write_enable(nor);
+
+	ret = spi_nor_write_reg(nor, SPINOR_OP_WRSR, sr_cr, 2);
+	if (ret < 0) {
+		dev_dbg(nor->dev,
+			"error while writing configuration register\n");
+		return -EINVAL;
+	}
+
+	ret = spi_nor_wait_till_ready(nor);
+	if (ret) {
+		dev_dbg(nor->dev,
+			"timeout while writing configuration register\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+/**
+ * spansion_read_cr_quad_enable() - set QE bit in Configuration Register.
+ * @nor:	pointer to a 'struct spi_nor'
+ *
+ * Set the Quad Enable (QE) bit in the Configuration Register.
+ * This function should be used with QSPI memories supporting the Read
+ * Configuration Register (35h) instruction.
+ *
+ * bit 1 of the Configuration Register is the QE bit for Spansion like QSPI
+ * memories.
+ *
+ * Return: 0 on success, -errno otherwise.
+ */
+static int spansion_read_cr_quad_enable(struct spi_nor *nor)
+{
+	u8 sr_cr[2];
+	int ret;
+
+	/* Check current Quad Enable bit value. */
+	ret = read_cr(nor);
+	if (ret < 0) {
+		dev_dbg(dev, "error while reading configuration register\n");
+		return -EINVAL;
+	}
+
+	if (ret & CR_QUAD_EN_SPAN)
+		return 0;
+
+	sr_cr[1] = ret | CR_QUAD_EN_SPAN;
+
+	/* Keep the current value of the Status Register. */
+	ret = read_sr(nor);
+	if (ret < 0) {
+		dev_dbg(dev, "error while reading status register\n");
+		return -EINVAL;
+	}
+	sr_cr[0] = ret;
+
+	ret = write_sr_cr(nor, sr_cr);
+	if (ret)
+		return ret;
+
+	/* Read back and check it. */
+	ret = read_cr(nor);
+	if (!(ret > 0 && (ret & CR_QUAD_EN_SPAN))) {
+		dev_dbg(nor->dev, "Spansion Quad bit not set\n");
+		return -EINVAL;
+	}
+
+	return 0;
+}
+#endif /* CONFIG_SPI_FLASH_SPANSION */
+
+struct spi_nor_read_command {
+	u8			num_mode_clocks;
+	u8			num_wait_states;
+	u8			opcode;
+	enum spi_nor_protocol	proto;
+};
+
+enum spi_nor_read_command_index {
+	SNOR_CMD_READ,
+	SNOR_CMD_READ_FAST,
+
+	/* Quad SPI */
+	SNOR_CMD_READ_1_1_4,
+
+	SNOR_CMD_READ_MAX
+};
+
+struct spi_nor_flash_parameter {
+	struct spi_nor_hwcaps		hwcaps;
+	struct spi_nor_read_command	reads[SNOR_CMD_READ_MAX];
+};
+
+static void
+spi_nor_set_read_settings(struct spi_nor_read_command *read,
+			  u8 num_mode_clocks,
+			  u8 num_wait_states,
+			  u8 opcode,
+			  enum spi_nor_protocol proto)
+{
+	read->num_mode_clocks = num_mode_clocks;
+	read->num_wait_states = num_wait_states;
+	read->opcode = opcode;
+	read->proto = proto;
+}
+
+static int spi_nor_init_params(struct spi_nor *nor,
+			       const struct flash_info *info,
+			       struct spi_nor_flash_parameter *params)
+{
+	/* (Fast) Read settings. */
+	params->hwcaps.mask = SNOR_HWCAPS_READ;
+	spi_nor_set_read_settings(&params->reads[SNOR_CMD_READ],
+				  0, 0, SPINOR_OP_READ,
+				  SNOR_PROTO_1_1_1);
+
+	if (!(info->flags & SPI_NOR_NO_FR)) {
+		params->hwcaps.mask |= SNOR_HWCAPS_READ_FAST;
+		spi_nor_set_read_settings(&params->reads[SNOR_CMD_READ_FAST],
+					  0, 8, SPINOR_OP_READ_FAST,
+					  SNOR_PROTO_1_1_1);
+	}
+
+	if (info->flags & SPI_NOR_QUAD_READ) {
+		params->hwcaps.mask |= SNOR_HWCAPS_READ_1_1_4;
+		spi_nor_set_read_settings(&params->reads[SNOR_CMD_READ_1_1_4],
+					  0, 8, SPINOR_OP_READ_1_1_4,
+					  SNOR_PROTO_1_1_4);
+	}
+
+	return 0;
+}
+
+static int spi_nor_select_read(struct spi_nor *nor,
+			       const struct spi_nor_flash_parameter *params,
+			       u32 shared_hwcaps)
+{
+	int best_match = shared_hwcaps & SNOR_HWCAPS_READ_MASK;
+	int cmd;
+	const struct spi_nor_read_command *read;
+
+	if (best_match < 0)
+		return -EINVAL;
+
+	if (best_match & SNOR_HWCAPS_READ_1_1_4)
+		cmd = SNOR_CMD_READ_1_1_4;
+	else if (best_match & SNOR_HWCAPS_READ_FAST)
+		cmd = SNOR_CMD_READ_FAST;
+	else
+		cmd = SNOR_CMD_READ;
+
+	read = &params->reads[cmd];
+	nor->read_opcode = read->opcode;
+	nor->read_proto = read->proto;
+
+	/*
+	 * In the spi-nor framework, we don't need to make the difference
+	 * between mode clock cycles and wait state clock cycles.
+	 * Indeed, the value of the mode clock cycles is used by a QSPI
+	 * flash memory to know whether it should enter or leave its 0-4-4
+	 * (Continuous Read / XIP) mode.
+	 * eXecution In Place is out of the scope of the mtd sub-system.
+	 * Hence we choose to merge both mode and wait state clock cycles
+	 * into the so called dummy clock cycles.
+	 */
+	nor->read_dummy = read->num_mode_clocks + read->num_wait_states;
+	return 0;
+}
+
+static int spi_nor_setup(struct spi_nor *nor, const struct flash_info *info,
+			 const struct spi_nor_flash_parameter *params,
+			 const struct spi_nor_hwcaps *hwcaps)
+{
+	u32 shared_mask;
+	int err;
+
+	/*
+	 * Keep only the hardware capabilities supported by both the SPI
+	 * controller and the SPI flash memory.
+	 */
+	shared_mask = hwcaps->mask & params->hwcaps.mask;
+
+	/* Select the (Fast) Read command. */
+	err = spi_nor_select_read(nor, params, shared_mask);
+	if (err) {
+		dev_dbg(nor->dev,
+			"can't select read settings supported by both the SPI controller and memory.\n");
+		return err;
+	}
+
+	/* Enable Quad I/O if needed. */
+	if (spi_nor_get_protocol_width(nor->read_proto) == 4) {
+		switch (JEDEC_MFR(info)) {
+#ifdef CONFIG_SPI_FLASH_MACRONIX
+		case SNOR_MFR_MACRONIX:
+			err = macronix_quad_enable(nor);
+			break;
+#endif
+		case SNOR_MFR_ST:
+		case SNOR_MFR_MICRON:
+			break;
+
+		default:
+#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
+			/* Kept only for backward compatibility purpose. */
+			err = spansion_read_cr_quad_enable(nor);
+#endif
+			break;
+		}
+	}
+	if (err) {
+		dev_dbg(nor->dev, "quad mode not supported\n");
+		return err;
+	}
+
+	return 0;
+}
+
+static int spi_nor_init(struct spi_nor *nor)
+{
+	if (nor->addr_width == 4 &&
+	    (JEDEC_MFR(nor->info) != SNOR_MFR_SPANSION) &&
+	    !(nor->info->flags & SPI_NOR_4B_OPCODES)) {
+		/*
+		 * If the RESET# pin isn't hooked up properly, or the system
+		 * otherwise doesn't perform a reset command in the boot
+		 * sequence, it's impossible to 100% protect against unexpected
+		 * reboots (e.g., crashes). Warn the user (or hopefully, system
+		 * designer) that this is bad.
+		 */
+		if (nor->flags & SNOR_F_BROKEN_RESET)
+			printf("enabling reset hack; may not recover from unexpected reboots\n");
+		set_4byte(nor, nor->info, 1);
+	}
+
+	return 0;
+}
+
+int spi_nor_scan(struct spi_nor *nor)
+{
+	struct spi_nor_flash_parameter params;
+	const struct flash_info *info = NULL;
+	struct mtd_info *mtd = &nor->mtd;
+	struct spi_nor_hwcaps hwcaps = {
+		.mask = SNOR_HWCAPS_READ |
+			SNOR_HWCAPS_READ_FAST
+	};
+	struct spi_slave *spi = nor->spi;
+	int ret;
+
+	/* Reset SPI protocol for all commands. */
+	nor->reg_proto = SNOR_PROTO_1_1_1;
+	nor->read_proto = SNOR_PROTO_1_1_1;
+	nor->write_proto = SNOR_PROTO_1_1_1;
+
+	if (spi->mode & SPI_RX_QUAD)
+		hwcaps.mask |= SNOR_HWCAPS_READ_1_1_4;
+
+	info = spi_nor_read_id(nor);
+	if (IS_ERR_OR_NULL(info))
+		return -ENOENT;
+	/* Parse the Serial Flash Discoverable Parameters table. */
+	ret = spi_nor_init_params(nor, info, &params);
+	if (ret)
+		return ret;
+
+	mtd->name = "spi-flash";
+	mtd->priv = nor;
+	mtd->type = MTD_NORFLASH;
+	mtd->writesize = 1;
+	mtd->flags = MTD_CAP_NORFLASH;
+	mtd->size = info->sector_size * info->n_sectors;
+	mtd->_erase = spi_nor_erase;
+	mtd->_read = spi_nor_read;
+	mtd->_write = spi_nor_write;
+
+	nor->size = mtd->size;
+
+	if (info->flags & USE_FSR)
+		nor->flags |= SNOR_F_USE_FSR;
+	if (info->flags & USE_CLSR)
+		nor->flags |= SNOR_F_USE_CLSR;
+
+	if (info->flags & SPI_NOR_NO_FR)
+		params.hwcaps.mask &= ~SNOR_HWCAPS_READ_FAST;
+
+	/*
+	 * Configure the SPI memory:
+	 * - select op codes for (Fast) Read, Page Program and Sector Erase.
+	 * - set the number of dummy cycles (mode cycles + wait states).
+	 * - set the SPI protocols for register and memory accesses.
+	 * - set the Quad Enable bit if needed (required by SPI x-y-4 protos).
+	 */
+	ret = spi_nor_setup(nor, info, &params, &hwcaps);
+	if (ret)
+		return ret;
+
+	if (nor->addr_width) {
+		/* already configured from SFDP */
+	} else if (info->addr_width) {
+		nor->addr_width = info->addr_width;
+	} else if (mtd->size > 0x1000000) {
+		/* enable 4-byte addressing if the device exceeds 16MiB */
+		nor->addr_width = 4;
+		if (JEDEC_MFR(info) == SNOR_MFR_SPANSION ||
+		    info->flags & SPI_NOR_4B_OPCODES)
+			spi_nor_set_4byte_opcodes(nor, info);
+	} else {
+		nor->addr_width = 3;
+	}
+
+	if (nor->addr_width > SPI_NOR_MAX_ADDR_WIDTH) {
+		dev_dbg(dev, "address width is too large: %u\n",
+			nor->addr_width);
+		return -EINVAL;
+	}
+
+	/* Send all the required SPI flash commands to initialize device */
+	nor->info = info;
+	ret = spi_nor_init(nor);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
+/* U-Boot specific functions, need to extend MTD to support these */
+int spi_flash_cmd_get_sw_write_prot(struct spi_nor *nor)
+{
+	return -ENOTSUPP;
+}

commit f2313133c8b63b9260aea9eee872e725fcacbdcf
Author: Vignesh R <vigneshr@ti.com>
Date:   Tue Feb 5 11:29:23 2019 +0530

    UPSTREAM: mtd: spi: Switch to new SPI NOR framework
    
    Switch spi_flash_* interfaces to call into new SPI NOR framework via MTD
    layer. Fix up sf_dataflash to work in legacy way. And update sandbox to
    use new interfaces/definitions
    
    Signed-off-by: Vignesh R <vigneshr@ti.com>
    Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
    Tested-by: Stefan Roese <sr@denx.de>
    Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
    Change-Id: I4c459ebdff8b2aec38623f27d0ba630c6c6f1ca3
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit c4e8862308d420e85c227498797c32410d9e47a8)

diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig
index 4ba95d58b3..e3b40fc157 100644
--- a/drivers/mtd/spi/Kconfig
+++ b/drivers/mtd/spi/Kconfig
@@ -27,6 +27,8 @@ config SPI_FLASH_SANDBOX
 
 config SPI_FLASH
 	bool "Legacy SPI Flash Interface support"
+	depends on SPI
+	select SPI_MEM
 	help
 	  Enable the legacy SPI flash support. This will include basic
 	  standard support for things like probing, read / write, and
diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile
index 4be6e9b15f..8cfa49d5d3 100644
--- a/drivers/mtd/spi/Makefile
+++ b/drivers/mtd/spi/Makefile
@@ -11,7 +11,7 @@ ifdef CONFIG_SPL_BUILD
 obj-$(CONFIG_SPL_SPI_BOOT)	+= fsl_espi_spl.o
 endif
 
-obj-$(CONFIG_SPI_FLASH) += sf_probe.o spi_flash.o spi_flash_ids.o sf.o
-obj-$(CONFIG_SPI_FLASH_DATAFLASH) += sf_dataflash.o
+obj-$(CONFIG_SPI_FLASH) += sf_probe.o spi-nor-core.o
+obj-$(CONFIG_SPI_FLASH_DATAFLASH) += sf_dataflash.o sf.o
 obj-$(CONFIG_SPI_FLASH_MTD) += sf_mtd.o
 obj-$(CONFIG_SPI_FLASH_SANDBOX) += sandbox.o
diff --git a/drivers/mtd/spi/sandbox.c b/drivers/mtd/spi/sandbox.c
index 92588740b5..31714d24cd 100644
--- a/drivers/mtd/spi/sandbox.c
+++ b/drivers/mtd/spi/sandbox.c
@@ -94,7 +94,7 @@ struct sandbox_spi_flash {
 	/* The current flash status (see STAT_XXX defines above) */
 	u16 status;
 	/* Data describing the flash we're emulating */
-	const struct spi_flash_info *data;
+	const struct flash_info *data;
 	/* The file on disk to serv up data from */
 	int fd;
 };
@@ -124,7 +124,7 @@ static int sandbox_sf_probe(struct udevice *dev)
 	/* spec = idcode:file */
 	struct sandbox_spi_flash *sbsf = dev_get_priv(dev);
 	size_t len, idname_len;
-	const struct spi_flash_info *data;
+	const struct flash_info *data;
 	struct sandbox_spi_flash_plat_data *pdata = dev_get_platdata(dev);
 	struct sandbox_state *state = state_get_current();
 	struct dm_spi_slave_platdata *slave_plat;
@@ -157,7 +157,7 @@ static int sandbox_sf_probe(struct udevice *dev)
 	idname_len = strlen(spec);
 	debug("%s: device='%s'\n", __func__, spec);
 
-	for (data = spi_flash_ids; data->name; data++) {
+	for (data = spi_nor_ids; data->name; data++) {
 		len = strlen(data->name);
 		if (idname_len != len)
 			continue;
@@ -245,43 +245,43 @@ static int sandbox_sf_process_cmd(struct sandbox_spi_flash *sbsf, const u8 *rx,
 
 	sbsf->cmd = rx[0];
 	switch (sbsf->cmd) {
-	case CMD_READ_ID:
+	case SPINOR_OP_RDID:
 		sbsf->state = SF_ID;
 		sbsf->cmd = SF_ID;
 		break;
-	case CMD_READ_ARRAY_FAST:
+	case SPINOR_OP_READ_FAST:
 		sbsf->pad_addr_bytes = 1;
-	case CMD_READ_ARRAY_SLOW:
-	case CMD_PAGE_PROGRAM:
+	case SPINOR_OP_READ:
+	case SPINOR_OP_PP:
 		sbsf->state = SF_ADDR;
 		break;
-	case CMD_WRITE_DISABLE:
+	case SPINOR_OP_WRDI:
 		debug(" write disabled\n");
 		sbsf->status &= ~STAT_WEL;
 		break;
-	case CMD_READ_STATUS:
+	case SPINOR_OP_RDSR:
 		sbsf->state = SF_READ_STATUS;
 		break;
-	case CMD_READ_STATUS1:
+	case SPINOR_OP_RDSR2:
 		sbsf->state = SF_READ_STATUS1;
 		break;
-	case CMD_WRITE_ENABLE:
+	case SPINOR_OP_WREN:
 		debug(" write enabled\n");
 		sbsf->status |= STAT_WEL;
 		break;
-	case CMD_WRITE_STATUS:
+	case SPINOR_OP_WRSR:
 		sbsf->state = SF_WRITE_STATUS;
 		break;
 	default: {
 		int flags = sbsf->data->flags;
 
 		/* we only support erase here */
-		if (sbsf->cmd == CMD_ERASE_CHIP) {
+		if (sbsf->cmd == SPINOR_OP_CHIP_ERASE) {
 			sbsf->erase_size = sbsf->data->sector_size *
 				sbsf->data->n_sectors;
-		} else if (sbsf->cmd == CMD_ERASE_4K && (flags & SECT_4K)) {
+		} else if (sbsf->cmd == SPINOR_OP_BE_4K && (flags & SECT_4K)) {
 			sbsf->erase_size = 4 << 10;
-		} else if (sbsf->cmd == CMD_ERASE_64K && !(flags & SECT_4K)) {
+		} else if (sbsf->cmd == SPINOR_OP_SE && !(flags & SECT_4K)) {
 			sbsf->erase_size = 64 << 10;
 		} else {
 			debug(" cmd unknown: %#x\n", sbsf->cmd);
@@ -382,11 +382,11 @@ static int sandbox_sf_xfer(struct udevice *dev, unsigned int bitlen,
 				return -EIO;
 			}
 			switch (sbsf->cmd) {
-			case CMD_READ_ARRAY_FAST:
-			case CMD_READ_ARRAY_SLOW:
+			case SPINOR_OP_READ_FAST:
+			case SPINOR_OP_READ:
 				sbsf->state = SF_READ;
 				break;
-			case CMD_PAGE_PROGRAM:
+			case SPINOR_OP_PP:
 				sbsf->state = SF_WRITE;
 				break;
 			default:
diff --git a/drivers/mtd/spi/sf_dataflash.c b/drivers/mtd/spi/sf_dataflash.c
index e5c0e12faa..1d5975be8e 100644
--- a/drivers/mtd/spi/sf_dataflash.c
+++ b/drivers/mtd/spi/sf_dataflash.c
@@ -19,6 +19,7 @@
 
 #include "sf_internal.h"
 
+#define CMD_READ_ID		0x9f
 /* reads can bypass the buffers */
 #define OP_READ_CONTINUOUS	0xE8
 #define OP_READ_PAGE		0xD2
@@ -442,7 +443,7 @@ static int add_dataflash(struct udevice *dev, char *name, int nr_pages,
 	return 0;
 }
 
-struct flash_info {
+struct data_flash_info {
 	char		*name;
 
 	/*
@@ -461,7 +462,7 @@ struct flash_info {
 #define IS_POW2PS	0x0001		/* uses 2^N byte pages */
 };
 
-static struct flash_info dataflash_data[] = {
+static struct data_flash_info dataflash_data[] = {
 	/*
 	 * NOTE:  chips with SUP_POW2PS (rev D and up) need two entries,
 	 * one with IS_POW2PS and the other without.  The entry with the
@@ -502,12 +503,12 @@ static struct flash_info dataflash_data[] = {
 	{ "at45db642d",  0x1f2800, 8192, 1024, 10, SUP_POW2PS | IS_POW2PS},
 };
 
-static struct flash_info *jedec_probe(struct spi_slave *spi)
+static struct data_flash_info *jedec_probe(struct spi_slave *spi)
 {
 	int			tmp;
 	uint8_t			id[5];
 	uint32_t		jedec;
-	struct flash_info	*info;
+	struct data_flash_info	*info;
 	int status;
 
 	/*
@@ -584,7 +585,7 @@ static int spi_dataflash_probe(struct udevice *dev)
 {
 	struct spi_slave *spi = dev_get_parent_priv(dev);
 	struct spi_flash *spi_flash;
-	struct flash_info *info;
+	struct data_flash_info *info;
 	int status;
 
 	spi_flash = dev_get_uclass_priv(dev);
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index c15cec8eed..f202445f2f 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -13,143 +13,63 @@
 #include <linux/types.h>
 #include <linux/compiler.h>
 
-/* Dual SPI flash memories - see SPI_COMM_DUAL_... */
-enum spi_dual_flash {
-	SF_SINGLE_FLASH	= 0,
-	SF_DUAL_STACKED_FLASH	= BIT(0),
-	SF_DUAL_PARALLEL_FLASH	= BIT(1),
-};
-
-enum spi_nor_option_flags {
-	SNOR_F_SST_WR		= BIT(0),
-	SNOR_F_USE_FSR		= BIT(1),
-	SNOR_F_USE_UPAGE	= BIT(3),
-};
-
-#define SPI_FLASH_3B_ADDR_LEN		3
-#define SPI_FLASH_CMD_LEN		(1 + SPI_FLASH_3B_ADDR_LEN)
-#define SPI_FLASH_16MB_BOUN		0x1000000
-
-/* CFI Manufacture ID's */
-#define SPI_FLASH_CFI_MFR_SPANSION	0x01
-#define SPI_FLASH_CFI_MFR_STMICRO	0x20
-#define SPI_FLASH_CFI_MFR_MICRON	0x2C
-#define SPI_FLASH_CFI_MFR_MACRONIX	0xc2
-#define SPI_FLASH_CFI_MFR_SST		0xbf
-#define SPI_FLASH_CFI_MFR_WINBOND	0xef
-#define SPI_FLASH_CFI_MFR_ATMEL		0x1f
-#define SPI_FLASH_CIF_MFR_GIGADEVICE	0xc8
-
-/* Erase commands */
-#define CMD_ERASE_4K			0x20
-#define CMD_ERASE_CHIP			0xc7
-#define CMD_ERASE_64K			0xd8
-
-/* Write commands */
-#define CMD_WRITE_STATUS		0x01
-#define CMD_PAGE_PROGRAM		0x02
-#define CMD_WRITE_DISABLE		0x04
-#define CMD_WRITE_ENABLE		0x06
-#define CMD_QUAD_PAGE_PROGRAM		0x32
-
-/* Read commands */
-#define CMD_READ_ARRAY_SLOW		0x03
-#define CMD_READ_ARRAY_FAST		0x0b
-#define CMD_READ_DUAL_OUTPUT_FAST	0x3b
-#define CMD_READ_DUAL_IO_FAST		0xbb
-#define CMD_READ_QUAD_OUTPUT_FAST	0x6b
-#define CMD_READ_QUAD_IO_FAST		0xeb
-#define CMD_READ_ID			0x9f
-#define CMD_READ_STATUS			0x05
-#define CMD_READ_STATUS1		0x35
-#define CMD_READ_CONFIG			0x35
-#define CMD_FLAG_STATUS			0x70
-
-/* Bank addr access commands */
-#ifdef CONFIG_SPI_FLASH_BAR
-# define CMD_BANKADDR_BRWR		0x17
-# define CMD_BANKADDR_BRRD		0x16
-# define CMD_EXTNADDR_WREAR		0xC5
-# define CMD_EXTNADDR_RDEAR		0xC8
-#endif
-
-/* Common status */
-#define STATUS_WIP			BIT(0)
-#define STATUS_QEB_WINSPAN		BIT(1)
-#define STATUS_QEB_MXIC			BIT(6)
-#define STATUS_PEC			BIT(7)
-#define SR_BP0				BIT(2)  /* Block protect 0 */
-#define SR_BP1				BIT(3)  /* Block protect 1 */
-#define SR_BP2				BIT(4)  /* Block protect 2 */
-
-/* Flash timeout values */
-#define SPI_FLASH_PROG_TIMEOUT		(2 * CONFIG_SYS_HZ)
-#define SPI_FLASH_PAGE_ERASE_TIMEOUT	(5 * CONFIG_SYS_HZ)
-#define SPI_FLASH_SECTOR_ERASE_TIMEOUT	(10 * CONFIG_SYS_HZ)
-
-/* SST specific */
-#ifdef CONFIG_SPI_FLASH_SST
-#define SST26_CMD_READ_BPR		0x72
-#define SST26_CMD_WRITE_BPR		0x42
-
-#define SST26_BPR_8K_NUM		4
-#define SST26_MAX_BPR_REG_LEN		(18 + 1)
-#define SST26_BOUND_REG_SIZE		((32 + SST26_BPR_8K_NUM * 8) * SZ_1K)
-
-enum lock_ctl {
-	SST26_CTL_LOCK,
-	SST26_CTL_UNLOCK,
-	SST26_CTL_CHECK
-};
-
-# define CMD_SST_BP		0x02    /* Byte Program */
-# define CMD_SST_AAI_WP		0xAD	/* Auto Address Incr Word Program */
-
-int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
-		const void *buf);
-int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len,
-		const void *buf);
-#endif
-
-#define JEDEC_MFR(info)		((info)->id[0])
-#define JEDEC_ID(info)		(((info)->id[1]) << 8 | ((info)->id[2]))
-#define JEDEC_EXT(info)		(((info)->id[3]) << 8 | ((info)->id[4]))
-#define SPI_FLASH_MAX_ID_LEN	6
+#define SPI_NOR_MAX_ID_LEN	6
+#define SPI_NOR_MAX_ADDR_WIDTH	4
 
-struct spi_flash_info {
-	/* Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO]) */
-	const char	*name;
+struct flash_info {
+	char		*name;
 
 	/*
 	 * This array stores the ID bytes.
 	 * The first three bytes are the JEDIC ID.
 	 * JEDEC ID zero means "no ID" (mostly older chips).
 	 */
-	u8		id[SPI_FLASH_MAX_ID_LEN];
+	u8		id[SPI_NOR_MAX_ID_LEN];
 	u8		id_len;
 
-	/*
-	 * The size listed here is what works with SPINOR_OP_SE, which isn't
+	/* The size listed here is what works with SPINOR_OP_SE, which isn't
 	 * necessarily called a "sector" by the vendor.
 	 */
-	u32		sector_size;
-	u32		n_sectors;
+	unsigned int	sector_size;
+	u16		n_sectors;
 
 	u16		page_size;
+	u16		addr_width;
 
 	u16		flags;
-#define SECT_4K			BIT(0)	/* CMD_ERASE_4K works uniformly */
-#define E_FSR			BIT(1)	/* use flag status register for */
-#define SST_WR			BIT(2)	/* use SST byte/word programming */
-#define WR_QPP			BIT(3)	/* use Quad Page Program */
-#define RD_QUAD			BIT(4)	/* use Quad Read */
-#define RD_DUAL			BIT(5)	/* use Dual Read */
-#define RD_QUADIO		BIT(6)	/* use Quad IO Read */
-#define RD_DUALIO		BIT(7)	/* use Dual IO Read */
-#define RD_FULL			(RD_QUAD | RD_DUAL | RD_QUADIO | RD_DUALIO)
+#define SECT_4K			BIT(0)	/* SPINOR_OP_BE_4K works uniformly */
+#define SPI_NOR_NO_ERASE	BIT(1)	/* No erase command needed */
+#define SST_WRITE		BIT(2)	/* use SST byte programming */
+#define SPI_NOR_NO_FR		BIT(3)	/* Can't do fastread */
+#define SECT_4K_PMC		BIT(4)	/* SPINOR_OP_BE_4K_PMC works uniformly */
+#define SPI_NOR_DUAL_READ	BIT(5)	/* Flash supports Dual Read */
+#define SPI_NOR_QUAD_READ	BIT(6)	/* Flash supports Quad Read */
+#define USE_FSR			BIT(7)	/* use flag status register */
+#define SPI_NOR_HAS_LOCK	BIT(8)	/* Flash supports lock/unlock via SR */
+#define SPI_NOR_HAS_TB		BIT(9)	/*
+					 * Flash SR has Top/Bottom (TB) protect
+					 * bit. Must be used with
+					 * SPI_NOR_HAS_LOCK.
+					 */
+#define	SPI_S3AN		BIT(10)	/*
+					 * Xilinx Spartan 3AN In-System Flash
+					 * (MFR cannot be used for probing
+					 * because it has the same value as
+					 * ATMEL flashes)
+					 */
+#define SPI_NOR_4B_OPCODES	BIT(11)	/*
+					 * Use dedicated 4byte address op codes
+					 * to support memory size above 128Mib.
+					 */
+#define NO_CHIP_ERASE		BIT(12) /* Chip does not support chip erase */
+#define SPI_NOR_SKIP_SFDP	BIT(13)	/* Skip parsing of SFDP tables */
+#define USE_CLSR		BIT(14)	/* use CLSR command */
 };
 
-extern const struct spi_flash_info spi_flash_ids[];
+extern const struct flash_info spi_nor_ids[];
+
+#define JEDEC_MFR(info)	((info)->id[0])
+#define JEDEC_ID(info)		(((info)->id[1]) << 8 | ((info)->id[2]))
 
 /* Send a single-byte command to the device and read the response */
 int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len);
@@ -169,78 +89,12 @@ int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len,
 		const void *data, size_t data_len);
 
 
-/* Flash erase(sectors) operation, support all possible erase commands */
-int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len);
-
 /* Get software write-protect value (BP bits) */
 int spi_flash_cmd_get_sw_write_prot(struct spi_flash *flash);
 
-/* Lock stmicro spi flash region */
-int stm_lock(struct spi_flash *flash, u32 ofs, size_t len);
-
-/* Unlock stmicro spi flash region */
-int stm_unlock(struct spi_flash *flash, u32 ofs, size_t len);
-
-/* Check if a stmicro spi flash region is completely locked */
-int stm_is_locked(struct spi_flash *flash, u32 ofs, size_t len);
-
-/* Enable writing on the SPI flash */
-static inline int spi_flash_cmd_write_enable(struct spi_flash *flash)
-{
-	return spi_flash_cmd(flash->spi, CMD_WRITE_ENABLE, NULL, 0);
-}
-
-/* Disable writing on the SPI flash */
-static inline int spi_flash_cmd_write_disable(struct spi_flash *flash)
-{
-	return spi_flash_cmd(flash->spi, CMD_WRITE_DISABLE, NULL, 0);
-}
-
-/*
- * Used for spi_flash write operation
- * - SPI claim
- * - spi_flash_cmd_write_enable
- * - spi_flash_cmd_write
- * - spi_flash_wait_till_ready
- * - SPI release
- */
-int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
-		size_t cmd_len, const void *buf, size_t buf_len);
-
-/*
- * Flash write operation, support all possible write commands.
- * Write the requested data out breaking it up into multiple write
- * commands as needed per the write size.
- */
-int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
-		size_t len, const void *buf);
-
-/*
- * Same as spi_flash_cmd_read() except it also claims/releases the SPI
- * bus. Used as common part of the ->read() operation.
- */
-int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
-		size_t cmd_len, void *data, size_t data_len);
-
-/* Flash read operation, support all possible read commands */
-int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
-		size_t len, void *data);
 
 #ifdef CONFIG_SPI_FLASH_MTD
 int spi_flash_mtd_register(struct spi_flash *flash);
 void spi_flash_mtd_unregister(void);
 #endif
-
-/**
- * spi_flash_scan - scan the SPI FLASH
- * @flash:	the spi flash structure
- *
- * The drivers can use this fuction to scan the SPI FLASH.
- * In the scanning, it will try to get all the necessary information to
- * fill the spi_flash{}.
- *
- * Return: 0 for success, others for failure.
- */
-int spi_flash_scan(struct spi_flash *flash);
-
 #endif /* _SF_INTERNAL_H_ */
diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index 103bd2566e..ef1fff83e1 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -41,7 +41,7 @@ static int spi_flash_probe_slave(struct spi_flash *flash)
 		return ret;
 	}
 
-	ret = spi_flash_scan(flash);
+	ret = spi_nor_scan(flash);
 	if (ret)
 		goto err_read_id;
 
@@ -97,32 +97,38 @@ static int spi_flash_std_read(struct udevice *dev, u32 offset, size_t len,
 			      void *buf)
 {
 	struct spi_flash *flash = dev_get_uclass_priv(dev);
+	struct mtd_info *mtd = &flash->mtd;
+	size_t retlen;
 
-	return log_ret(spi_flash_cmd_read_ops(flash, offset, len, buf));
+	return log_ret(mtd->_read(mtd, offset, len, &retlen, buf));
 }
 
 static int spi_flash_std_write(struct udevice *dev, u32 offset, size_t len,
 			       const void *buf)
 {
 	struct spi_flash *flash = dev_get_uclass_priv(dev);
+	struct mtd_info *mtd = &flash->mtd;
+	size_t retlen;
 
-#if defined(CONFIG_SPI_FLASH_SST)
-	if (flash->flags & SNOR_F_SST_WR) {
-		if (flash->spi->mode & SPI_TX_BYTE)
-			return sst_write_bp(flash, offset, len, buf);
-		else
-			return sst_write_wp(flash, offset, len, buf);
-	}
-#endif
-
-	return spi_flash_cmd_write_ops(flash, offset, len, buf);
+	return mtd->_write(mtd, offset, len, &retlen, buf);
 }
 
 static int spi_flash_std_erase(struct udevice *dev, u32 offset, size_t len)
 {
 	struct spi_flash *flash = dev_get_uclass_priv(dev);
+	struct mtd_info *mtd = &flash->mtd;
+	struct erase_info instr;
+
+	if (offset % mtd->erasesize || len % mtd->erasesize) {
+		printf("SF: Erase offset/length not multiple of erase size\n");
+		return -EINVAL;
+	}
+
+	memset(&instr, 0, sizeof(instr));
+	instr.addr = offset;
+	instr.len = len;
 
-	return spi_flash_cmd_erase_ops(flash, offset, len);
+	return mtd->_erase(mtd, &instr);
 }
 
 static int spi_flash_std_get_sw_write_prot(struct udevice *dev)
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 13c6236d62..7590ff7716 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -21,6 +21,8 @@
 #include <spi-mem.h>
 #include <spi.h>
 
+#include "sf_internal.h"
+
 /* Define max times to check status register before we give up. */
 
 /*
@@ -32,63 +34,6 @@
 
 #define DEFAULT_READY_WAIT_JIFFIES		(40UL * HZ)
 
-#define SPI_NOR_MAX_ID_LEN	6
-#define SPI_NOR_MAX_ADDR_WIDTH	4
-
-struct flash_info {
-	char		*name;
-
-	/*
-	 * This array stores the ID bytes.
-	 * The first three bytes are the JEDIC ID.
-	 * JEDEC ID zero means "no ID" (mostly older chips).
-	 */
-	u8		id[SPI_NOR_MAX_ID_LEN];
-	u8		id_len;
-
-	/* The size listed here is what works with SPINOR_OP_SE, which isn't
-	 * necessarily called a "sector" by the vendor.
-	 */
-	unsigned int	sector_size;
-	u16		n_sectors;
-
-	u16		page_size;
-	u16		addr_width;
-
-	u16		flags;
-#define SECT_4K			BIT(0)	/* SPINOR_OP_BE_4K works uniformly */
-#define SPI_NOR_NO_ERASE	BIT(1)	/* No erase command needed */
-#define SST_WRITE		BIT(2)	/* use SST byte programming */
-#define SPI_NOR_NO_FR		BIT(3)	/* Can't do fastread */
-#define SECT_4K_PMC		BIT(4)	/* SPINOR_OP_BE_4K_PMC works uniformly */
-#define SPI_NOR_DUAL_READ	BIT(5)	/* Flash supports Dual Read */
-#define SPI_NOR_QUAD_READ	BIT(6)	/* Flash supports Quad Read */
-#define USE_FSR			BIT(7)	/* use flag status register */
-#define SPI_NOR_HAS_LOCK	BIT(8)	/* Flash supports lock/unlock via SR */
-#define SPI_NOR_HAS_TB		BIT(9)	/*
-					 * Flash SR has Top/Bottom (TB) protect
-					 * bit. Must be used with
-					 * SPI_NOR_HAS_LOCK.
-					 */
-#define	SPI_S3AN		BIT(10)	/*
-					 * Xilinx Spartan 3AN In-System Flash
-					 * (MFR cannot be used for probing
-					 * because it has the same value as
-					 * ATMEL flashes)
-					 */
-#define SPI_NOR_4B_OPCODES	BIT(11)	/*
-					 * Use dedicated 4byte address op codes
-					 * to support memory size above 128Mib.
-					 */
-#define NO_CHIP_ERASE		BIT(12) /* Chip does not support chip erase */
-#define SPI_NOR_SKIP_SFDP	BIT(13)	/* Skip parsing of SFDP tables */
-#define USE_CLSR		BIT(14)	/* use CLSR command */
-
-	int	(*quad_enable)(struct spi_nor *nor);
-};
-
-#define JEDEC_MFR(info)	((info)->id[0])
-
 static int spi_nor_read_write_reg(struct spi_nor *nor, struct spi_mem_op
 		*op, void *buf)
 {
diff --git a/drivers/spi/stm32_qspi.c b/drivers/spi/stm32_qspi.c
index ef2b64ec5f..820202ec44 100644
--- a/drivers/spi/stm32_qspi.c
+++ b/drivers/spi/stm32_qspi.c
@@ -259,9 +259,11 @@ static unsigned int _stm32_qspi_gen_ccr(struct stm32_qspi_priv *priv)
 static void _stm32_qspi_enable_mmap(struct stm32_qspi_priv *priv,
 		struct spi_flash *flash)
 {
-	priv->command = flash->read_cmd | CMD_HAS_ADR | CMD_HAS_DATA
+	unsigned int ccr_reg;
+
+	priv->command = flash->read_opcode | CMD_HAS_ADR | CMD_HAS_DATA
 			| CMD_HAS_DUMMY;
-	priv->dummycycles = flash->dummy_byte * 8;
+	priv->dummycycles = flash->read_dummy;
 
 	unsigned int ccr_reg = _stm32_qspi_gen_ccr(priv);
 	ccr_reg |= (STM32_QSPI_CCR_MEM_MAP << STM32_QSPI_CCR_FMODE_SHIFT);
diff --git a/include/spi_flash.h b/include/spi_flash.h
index e62d4bce52..825f4f54b4 100644
--- a/include/spi_flash.h
+++ b/include/spi_flash.h
@@ -12,6 +12,7 @@
 
 #include <dm.h>	/* Because we dereference struct udevice here */
 #include <linux/types.h>
+#include <linux/mtd/spi-nor.h>
 
 #ifndef CONFIG_SF_DEFAULT_SPEED
 # define CONFIG_SF_DEFAULT_SPEED	1000000
@@ -28,86 +29,6 @@
 
 struct spi_slave;
 
-/**
- * struct spi_flash - SPI flash structure
- *
- * @spi:		SPI slave
- * @dev:		SPI flash device
- * @name:		Name of SPI flash
- * @dual_flash:		Indicates dual flash memories - dual stacked, parallel
- * @shift:		Flash shift useful in dual parallel
- * @flags:		Indication of spi flash flags
- * @size:		Total flash size
- * @page_size:		Write (page) size
- * @sector_size:	Sector size
- * @erase_size:		Erase size
- * @bank_read_cmd:	Bank read cmd
- * @bank_write_cmd:	Bank write cmd
- * @bank_curr:		Current flash bank
- * @erase_cmd:		Erase cmd 4K, 32K, 64K
- * @read_cmd:		Read cmd - Array Fast, Extn read and quad read.
- * @write_cmd:		Write cmd - page and quad program.
- * @dummy_byte:		Dummy cycles for read operation.
- * @memory_map:		Address of read-only SPI flash access
- * @flash_lock:		lock a region of the SPI Flash
- * @flash_unlock:	unlock a region of the SPI Flash
- * @flash_is_locked:	check if a region of the SPI Flash is completely locked
- * @read:		Flash read ops: Read len bytes at offset into buf
- *			Supported cmds: Fast Array Read
- * @write:		Flash write ops: Write len bytes from buf into offset
- *			Supported cmds: Page Program
- * @erase:		Flash erase ops: Erase len bytes from offset
- *			Supported cmds: Sector erase 4K, 32K, 64K
- * return 0 - Success, 1 - Failure
- */
-struct spi_flash {
-	struct spi_slave *spi;
-#ifdef CONFIG_DM_SPI_FLASH
-	struct udevice *dev;
-#endif
-	const char *name;
-	u8 dual_flash;
-	u8 shift;
-	u16 flags;
-
-	u32 size;
-	u32 page_size;
-	u32 sector_size;
-	u32 erase_size;
-#ifdef CONFIG_SPI_FLASH_BAR
-	u8 bank_read_cmd;
-	u8 bank_write_cmd;
-	u8 bank_curr;
-#endif
-	u8 erase_cmd;
-	u8 read_cmd;
-	u8 write_cmd;
-	u8 dummy_byte;
-
-	void *memory_map;
-
-	int (*flash_lock)(struct spi_flash *flash, u32 ofs, size_t len);
-	int (*flash_unlock)(struct spi_flash *flash, u32 ofs, size_t len);
-	int (*flash_is_locked)(struct spi_flash *flash, u32 ofs, size_t len);
-#ifndef CONFIG_DM_SPI_FLASH
-	/*
-	 * These are not strictly needed for driver model, but keep them here
-	 * while the transition is in progress.
-	 *
-	 * Normally each driver would provide its own operations, but for
-	 * SPI flash most chips use the same algorithms. One approach is
-	 * to create a 'common' SPI flash device which knows how to talk
-	 * to most devices, and then allow other drivers to be used instead
-	 * if required, perhaps with a way of scanning through the list to
-	 * find the driver that matches the device.
-	 */
-	int (*read)(struct spi_flash *flash, u32 offset, size_t len, void *buf);
-	int (*write)(struct spi_flash *flash, u32 offset, size_t len,
-			const void *buf);
-	int (*erase)(struct spi_flash *flash, u32 offset, size_t len);
-#endif
-};
-
 struct dm_spi_flash_ops {
 	int (*read)(struct udevice *dev, u32 offset, size_t len, void *buf);
 	int (*write)(struct udevice *dev, u32 offset, size_t len,
@@ -226,19 +147,37 @@ void spi_flash_free(struct spi_flash *flash);
 static inline int spi_flash_read(struct spi_flash *flash, u32 offset,
 		size_t len, void *buf)
 {
-	return flash->read(flash, offset, len, buf);
+	struct mtd_info *mtd = &flash->mtd;
+	size_t retlen;
+
+	return mtd->_read(mtd, offset, len, &retlen, buf);
 }
 
 static inline int spi_flash_write(struct spi_flash *flash, u32 offset,
 		size_t len, const void *buf)
 {
-	return flash->write(flash, offset, len, buf);
+	struct mtd_info *mtd = &flash->mtd;
+	size_t retlen;
+
+	return mtd->_write(mtd, offset, len, &retlen, buf);
 }
 
 static inline int spi_flash_erase(struct spi_flash *flash, u32 offset,
 		size_t len)
 {
-	return flash->erase(flash, offset, len);
+	struct mtd_info *mtd = &flash->mtd;
+	struct erase_info instr;
+
+	if (offset % mtd->erasesize || len % mtd->erasesize) {
+		printf("SF: Erase offset/length not multiple of erase size\n");
+		return -EINVAL;
+	}
+
+	memset(&instr, 0, sizeof(instr));
+	instr.addr = offset;
+	instr.len = len;
+
+	return mtd->_erase(mtd, &instr);
 }
 #endif
 

commit c964ade6392e69a0bd1a7a038a59639eb0a542d2
Author: Vignesh R <vigneshr@ti.com>
Date:   Tue Feb 5 11:29:10 2019 +0530

    UPSTREAM: configs: Move CONFIG_SPI_FLASH into defconfigs
    
    Completely move CONFIG_SPI_FLASH from remaining board header files to
    defconfigs
    
    Signed-off-by: Vignesh R <vigneshr@ti.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
    Change-Id: Iab125975d8e45a953666dcc04c989da9ae9b7f93
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit ea4805d6b26282451eee9c701a456225bcf7db85)

diff --git a/configs/cgtqmx6eval_defconfig b/configs/cgtqmx6eval_defconfig
index fc336103cf..2f9a9cc9a5 100644
--- a/configs/cgtqmx6eval_defconfig
+++ b/configs/cgtqmx6eval_defconfig
@@ -51,6 +51,10 @@ CONFIG_CMD_FS_GENERIC=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_DFU_MMC=y
 CONFIG_DFU_SF=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x12000000
+CONFIG_FSL_ESDHC=y
+CONFIG_SPI_FLASH=y
 CONFIG_PHYLIB=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig
index 3ec0370dec..880439bf52 100644
--- a/configs/chromebit_mickey_defconfig
+++ b/configs/chromebit_mickey_defconfig
@@ -52,6 +52,7 @@ CONFIG_CROS_EC_SPI=y
 CONFIG_PWRSEQ=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SPI_FLASH=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_DM_PMIC=y
diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig
index ca11b5cbc1..61a3774e0c 100644
--- a/configs/chromebook_jerry_defconfig
+++ b/configs/chromebook_jerry_defconfig
@@ -54,6 +54,7 @@ CONFIG_CROS_EC_SPI=y
 CONFIG_PWRSEQ=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SPI_FLASH=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_DM_PMIC=y
diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig
index 9663da138d..a60011462f 100644
--- a/configs/chromebook_minnie_defconfig
+++ b/configs/chromebook_minnie_defconfig
@@ -53,6 +53,7 @@ CONFIG_CROS_EC_SPI=y
 CONFIG_PWRSEQ=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SPI_FLASH=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_DM_PMIC=y
diff --git a/configs/evb-rk3036_defconfig b/configs/evb-rk3036_defconfig
index 9166b2725f..280179c3b9 100644
--- a/configs/evb-rk3036_defconfig
+++ b/configs/evb-rk3036_defconfig
@@ -62,6 +62,7 @@ CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_LED=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SPI_FLASH=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_DM_REGULATOR_FIXED=y
diff --git a/configs/evb-rk3128_defconfig b/configs/evb-rk3128_defconfig
index ed4b42f94b..6c451f007e 100644
--- a/configs/evb-rk3128_defconfig
+++ b/configs/evb-rk3128_defconfig
@@ -26,6 +26,7 @@ CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SPI_FLASH=y
 CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig
index c45348aea1..cf61d0dabf 100644
--- a/configs/evb-rk3288_defconfig
+++ b/configs/evb-rk3288_defconfig
@@ -50,6 +50,7 @@ CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SPI_FLASH=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index 77d757afae..897f873c3c 100644
--- a/configs/evb-rk3328_defconfig
+++ b/configs/evb-rk3328_defconfig
@@ -55,6 +55,7 @@ CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SPI_FLASH=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
diff --git a/configs/fennec-rk3288_defconfig b/configs/fennec-rk3288_defconfig
index 39f71f4ac9..3158280c01 100644
--- a/configs/fennec-rk3288_defconfig
+++ b/configs/fennec-rk3288_defconfig
@@ -52,6 +52,7 @@ CONFIG_DM_KEY=y
 CONFIG_ADC_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SPI_FLASH=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig
index e7f778013b..1673b9f8e3 100644
--- a/configs/firefly-rk3288_defconfig
+++ b/configs/firefly-rk3288_defconfig
@@ -47,6 +47,7 @@ CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SPI_FLASH=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
diff --git a/configs/kylin-rk3036_defconfig b/configs/kylin-rk3036_defconfig
index a11cd6ea82..d74add4fab 100644
--- a/configs/kylin-rk3036_defconfig
+++ b/configs/kylin-rk3036_defconfig
@@ -56,6 +56,7 @@ CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_LED=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SPI_FLASH=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_DM_REGULATOR_FIXED=y
diff --git a/configs/ls2080aqds_SECURE_BOOT_defconfig b/configs/ls2080aqds_SECURE_BOOT_defconfig
index c80a83708b..4441755d78 100644
--- a/configs/ls2080aqds_SECURE_BOOT_defconfig
+++ b/configs/ls2080aqds_SECURE_BOOT_defconfig
@@ -28,6 +28,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
 CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
diff --git a/configs/ls2080aqds_defconfig b/configs/ls2080aqds_defconfig
index ef1d9dcd3b..6c65f3b70c 100644
--- a/configs/ls2080aqds_defconfig
+++ b/configs/ls2080aqds_defconfig
@@ -29,6 +29,7 @@ CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
 CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig
index e6f1e533c2..7ab3b10680 100644
--- a/configs/ls2080aqds_nand_defconfig
+++ b/configs/ls2080aqds_nand_defconfig
@@ -40,6 +40,7 @@ CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_NAND=y
 CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
 CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
diff --git a/configs/ls2080aqds_qspi_defconfig b/configs/ls2080aqds_qspi_defconfig
index 79307f8359..baa1b34eaf 100644
--- a/configs/ls2080aqds_qspi_defconfig
+++ b/configs/ls2080aqds_qspi_defconfig
@@ -30,6 +30,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
 CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
diff --git a/configs/ls2080aqds_sdcard_defconfig b/configs/ls2080aqds_sdcard_defconfig
index 0e8b7d0b19..cd1421beb0 100644
--- a/configs/ls2080aqds_sdcard_defconfig
+++ b/configs/ls2080aqds_sdcard_defconfig
@@ -37,6 +37,7 @@ CONFIG_ENV_IS_IN_MMC=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
 CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig
index 09d5979dff..7d918982ef 100644
--- a/configs/miqi-rk3288_defconfig
+++ b/configs/miqi-rk3288_defconfig
@@ -50,6 +50,7 @@ CONFIG_DM_KEY=y
 CONFIG_ADC_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SPI_FLASH=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
diff --git a/configs/phycore-rk3288_defconfig b/configs/phycore-rk3288_defconfig
index d0ecf3ad6e..40bf1fc069 100644
--- a/configs/phycore-rk3288_defconfig
+++ b/configs/phycore-rk3288_defconfig
@@ -50,6 +50,7 @@ CONFIG_MISC=y
 CONFIG_I2C_EEPROM=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SPI_FLASH=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
diff --git a/configs/popmetal-rk3288_defconfig b/configs/popmetal-rk3288_defconfig
index 0a4fb89b9c..c818c43197 100644
--- a/configs/popmetal-rk3288_defconfig
+++ b/configs/popmetal-rk3288_defconfig
@@ -47,6 +47,7 @@ CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SPI_FLASH=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
diff --git a/configs/rk3036_defconfig b/configs/rk3036_defconfig
index acb901c273..eee16d0e98 100644
--- a/configs/rk3036_defconfig
+++ b/configs/rk3036_defconfig
@@ -75,6 +75,7 @@ CONFIG_ADC_KEY=y
 CONFIG_LED=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SPI_FLASH=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_DM_REGULATOR_FIXED=y
diff --git a/configs/rk3128x_defconfig b/configs/rk3128x_defconfig
index 511babf891..8916c312a4 100644
--- a/configs/rk3128x_defconfig
+++ b/configs/rk3128x_defconfig
@@ -84,6 +84,7 @@ CONFIG_MISC=y
 CONFIG_ROCKCHIP_EFUSE=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SPI_FLASH=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
diff --git a/configs/rk3288_defconfig b/configs/rk3288_defconfig
index 34c0705cfc..2955dbd17e 100644
--- a/configs/rk3288_defconfig
+++ b/configs/rk3288_defconfig
@@ -65,6 +65,7 @@ CONFIG_GPIO_KEY=y
 CONFIG_RK_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SPI_FLASH=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index 8b01c1f96b..97e86af181 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -80,6 +80,7 @@ CONFIG_MISC=y
 CONFIG_ROCKCHIP_EFUSE=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SPI_FLASH=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_PMIC=y
diff --git a/configs/rock2_defconfig b/configs/rock2_defconfig
index 63ed99d013..8e542d6ca0 100644
--- a/configs/rock2_defconfig
+++ b/configs/rock2_defconfig
@@ -45,6 +45,7 @@ CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SPI_FLASH=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
diff --git a/configs/rock_defconfig b/configs/rock_defconfig
index d2f3d6ecb7..ae6db6546a 100644
--- a/configs/rock_defconfig
+++ b/configs/rock_defconfig
@@ -40,6 +40,7 @@ CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_LED=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SPI_FLASH=y
 CONFIG_PINCTRL=y
 CONFIG_DM_PMIC=y
 # CONFIG_SPL_PMIC_CHILDREN is not set
diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig
index 3abf7c1088..9af919d15e 100644
--- a/configs/tinker-rk3288_defconfig
+++ b/configs/tinker-rk3288_defconfig
@@ -49,6 +49,7 @@ CONFIG_MISC=y
 CONFIG_I2C_EEPROM=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SPI_FLASH=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig
index a3834acb96..a0a73b5362 100644
--- a/configs/turris_omnia_defconfig
+++ b/configs/turris_omnia_defconfig
@@ -33,7 +33,8 @@ CONFIG_MISC=y
 CONFIG_ATSHA204A=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_MV=y
-CONFIG_PHYLIB=y
+CONFIG_SPI_FLASH=y
+CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
 CONFIG_DEBUG_UART_BASE=0xd0012000
 CONFIG_DEBUG_UART_CLOCK=250000000
diff --git a/configs/vyasa-rk3288_defconfig b/configs/vyasa-rk3288_defconfig
index d4f8e400b9..293cafbfde 100644
--- a/configs/vyasa-rk3288_defconfig
+++ b/configs/vyasa-rk3288_defconfig
@@ -42,6 +42,10 @@ CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SPI_FLASH=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_DM_PMIC=y
diff --git a/include/configs/cgtqmx6eval.h b/include/configs/cgtqmx6eval.h
index 8f7f26b9ed..91a109d70f 100644
--- a/include/configs/cgtqmx6eval.h
+++ b/include/configs/cgtqmx6eval.h
@@ -35,7 +35,6 @@
 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
 
 /* SPI NOR */
-#define CONFIG_SPI_FLASH
 #define CONFIG_SPI_FLASH_STMICRO
 #define CONFIG_SPI_FLASH_SST
 #define CONFIG_MXC_SPI
diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index dcd1b0c35c..cfe4e33934 100644
--- a/include/configs/ls2080aqds.h
+++ b/include/configs/ls2080aqds.h
@@ -292,8 +292,6 @@ unsigned long get_board_ddr_clk(void);
 
 /* SPI */
 #if defined(CONFIG_FSL_QSPI) || defined(CONFIG_FSL_DSPI)
-#define CONFIG_SPI_FLASH
-
 #ifdef CONFIG_FSL_DSPI
 #define CONFIG_SPI_FLASH_STMICRO
 #define CONFIG_SPI_FLASH_SST
diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index b45f92600a..9c2356608f 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -37,7 +37,6 @@
 #define SDRAM_BANK_SIZE			(512UL << 20UL)
 #define SDRAM_MAX_SIZE			0x80000000
 
-#define CONFIG_SPI_FLASH
 #define CONFIG_SPI
 #define CONFIG_SPI_FLASH_GIGADEVICE
 #define CONFIG_SF_DEFAULT_SPEED 20000000
diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h
index 414c51b9c5..1ffc84c080 100644
--- a/include/configs/rk3128_common.h
+++ b/include/configs/rk3128_common.h
@@ -42,7 +42,6 @@
 #define CONFIG_SYS_SDRAM_BASE		0x60000000
 #define SDRAM_MAX_SIZE			0x80000000
 
-#define CONFIG_SPI_FLASH
 #define CONFIG_SPI
 #define CONFIG_SF_DEFAULT_SPEED 20000000
 
diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h
index cec22aacbe..826becc4d1 100644
--- a/include/configs/rk3188_common.h
+++ b/include/configs/rk3188_common.h
@@ -48,7 +48,6 @@
 #define SDRAM_BANK_SIZE			(2UL << 30)
 #define SDRAM_MAX_SIZE			0x80000000
 
-#define CONFIG_SPI_FLASH
 #define CONFIG_SPI
 #define CONFIG_SF_DEFAULT_SPEED 20000000
 
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index 957f05735c..cb0e792352 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -49,7 +49,6 @@
 #define SDRAM_BANK_SIZE			(2UL << 30)
 #define SDRAM_MAX_SIZE			0xfe000000
 
-#define CONFIG_SPI_FLASH
 #define CONFIG_SPI
 #define CONFIG_SF_DEFAULT_SPEED 20000000
 
diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index 34608712fc..ac110c627f 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -46,7 +46,6 @@
 #define CONFIG_SYS_SDRAM_BASE		0
 #define SDRAM_MAX_SIZE			0xff000000
 
-#define CONFIG_SPI_FLASH
 #define CONFIG_SPI
 #define CONFIG_SF_DEFAULT_SPEED 20000000
 
diff --git a/include/configs/turris_omnia.h b/include/configs/turris_omnia.h
index d2c3e57570..29dd356887 100644
--- a/include/configs/turris_omnia.h
+++ b/include/configs/turris_omnia.h
@@ -42,7 +42,6 @@
 /* SPI NOR flash default params, used by sf commands */
 #define CONFIG_SF_DEFAULT_SPEED		1000000
 #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_3
-#define CONFIG_SPI_FLASH
 #define CONFIG_SPI_FLASH_SPANSION
 
 /*

commit a1e428c28f0775ac06d03560bba5a26591e1bff1
Author: Vignesh R <vigneshr@ti.com>
Date:   Tue Feb 5 11:29:22 2019 +0530

    UPSTREAM: mtd: spi: sf_probe: Add "jedec, spi-nor" compatible string
    
    Linux uses "jedec,spi-nor" as compatible string for JEDEC compatible
    SPI Flash device nodes. Therefore make U-Boot also to look for the same
    compatible string so that we can use Linux DTS files as is.
    
    Change-Id: I4eea83ffe642240f398443bd73e6c331c64d3aac
    Signed-off-by: Vignesh R <vigneshr@ti.com>
    Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
    Tested-by: Stefan Roese <sr@denx.de>
    Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 2ee6705be01c430ad9f71c0bac02d1d59819072c)

diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index 30957d36fb..103bd2566e 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -162,6 +162,7 @@ static const struct dm_spi_flash_ops spi_flash_std_ops = {
 
 static const struct udevice_id spi_flash_std_ids[] = {
 	{ .compatible = "spi-flash" },
+	{ .compatible = "jedec,spi-nor" },
 	{ }
 };
 

commit 95d92f5885bb79fd6e8597f0952b567170e39111
Author: Vignesh R <vigneshr@ti.com>
Date:   Tue Feb 5 11:29:15 2019 +0530

    UPSTREAM: spi: Add non DM version of SPI_MEM
    
    Add non DM version of SPI_MEM to support easy migration to new SPI NOR
    framework. This can be removed once DM_SPI conversion is complete.
    
    Change-Id: I912b535ef05862f65e535ba828b680a07cd784d3
    Signed-off-by: Vignesh R <vigneshr@ti.com>
    Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
    Tested-by: Stefan Roese <sr@denx.de>
    Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 6430eea639ed9ca967764a0ee113fa1c53619356)

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index ae010d4c92..4fe4a9409d 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -13,8 +13,6 @@ config DM_SPI
 	  typically use driver-private data instead of extending the
 	  spi_slave structure.
 
-if DM_SPI
-
 config SPI_MEM
 	bool "SPI memory extension"
 	help
@@ -22,6 +20,8 @@ config SPI_MEM
 	  This extension is meant to simplify interaction with SPI memories
 	  by providing an high-level interface to send memory-like commands.
 
+if DM_SPI
+
 config ALTERA_SPI
 	bool "Altera SPI driver"
 	help
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index e95bffc578..8db9b3512c 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_SOFT_SPI) += soft_spi.o
 obj-$(CONFIG_SPI_MEM) += spi-mem.o
 else
 obj-y += spi.o
+obj-$(CONFIG_SPI_MEM) += spi-mem-nodm.o
 obj-$(CONFIG_SOFT_SPI) += soft_spi_legacy.o
 endif
 
diff --git a/drivers/spi/spi-mem-nodm.c b/drivers/spi/spi-mem-nodm.c
new file mode 100644
index 0000000000..4447d44991
--- /dev/null
+++ b/drivers/spi/spi-mem-nodm.c
@@ -0,0 +1,105 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
+ */
+
+#include <spi.h>
+#include <spi-mem.h>
+
+int spi_mem_exec_op(struct spi_slave *slave,
+		    const struct spi_mem_op *op)
+{
+	unsigned int pos = 0;
+	const u8 *tx_buf = NULL;
+	u8 *rx_buf = NULL;
+	u8 *op_buf;
+	int op_len;
+	u32 flag;
+	int ret;
+	int i;
+
+	if (op->data.nbytes) {
+		if (op->data.dir == SPI_MEM_DATA_IN)
+			rx_buf = op->data.buf.in;
+		else
+			tx_buf = op->data.buf.out;
+	}
+
+	op_len = sizeof(op->cmd.opcode) + op->addr.nbytes + op->dummy.nbytes;
+	op_buf = calloc(1, op_len);
+
+	ret = spi_claim_bus(slave);
+	if (ret < 0)
+		return ret;
+
+	op_buf[pos++] = op->cmd.opcode;
+
+	if (op->addr.nbytes) {
+		for (i = 0; i < op->addr.nbytes; i++)
+			op_buf[pos + i] = op->addr.val >>
+				(8 * (op->addr.nbytes - i - 1));
+
+		pos += op->addr.nbytes;
+	}
+
+	if (op->dummy.nbytes)
+		memset(op_buf + pos, 0xff, op->dummy.nbytes);
+
+	/* 1st transfer: opcode + address + dummy cycles */
+	flag = SPI_XFER_BEGIN;
+	/* Make sure to set END bit if no tx or rx data messages follow */
+	if (!tx_buf && !rx_buf)
+		flag |= SPI_XFER_END;
+
+	ret = spi_xfer(slave, op_len * 8, op_buf, NULL, flag);
+	if (ret)
+		return ret;
+
+	/* 2nd transfer: rx or tx data path */
+	if (tx_buf || rx_buf) {
+		ret = spi_xfer(slave, op->data.nbytes * 8, tx_buf,
+			       rx_buf, SPI_XFER_END);
+		if (ret)
+			return ret;
+	}
+
+	spi_release_bus(slave);
+
+	for (i = 0; i < pos; i++)
+		debug("%02x ", op_buf[i]);
+	debug("| [%dB %s] ",
+	      tx_buf || rx_buf ? op->data.nbytes : 0,
+	      tx_buf || rx_buf ? (tx_buf ? "out" : "in") : "-");
+	for (i = 0; i < op->data.nbytes; i++)
+		debug("%02x ", tx_buf ? tx_buf[i] : rx_buf[i]);
+	debug("[ret %d]\n", ret);
+
+	free(op_buf);
+
+	if (ret < 0)
+		return ret;
+
+	return 0;
+}
+
+int spi_mem_adjust_op_size(struct spi_slave *slave,
+			   struct spi_mem_op *op)
+{
+	unsigned int len;
+
+	len = sizeof(op->cmd.opcode) + op->addr.nbytes + op->dummy.nbytes;
+	if (slave->max_write_size && len > slave->max_write_size)
+		return -EINVAL;
+
+	if (op->data.dir == SPI_MEM_DATA_IN && slave->max_read_size)
+		op->data.nbytes = min(op->data.nbytes,
+				      slave->max_read_size);
+	else if (slave->max_write_size)
+		op->data.nbytes = min(op->data.nbytes,
+				      slave->max_write_size - len);
+
+	if (!op->data.nbytes)
+		return -EINVAL;
+
+	return 0;
+}

commit 83e21979e7b55f8047ea2adae5087cd51473a9b3
Author: Vignesh R <vigneshr@ti.com>
Date:   Tue Feb 5 11:29:14 2019 +0530

    UPSTREAM: spi: spi-mem: Claim SPI bus before spi mem access
    
    It is necessary to call spi_claim_bus() before starting any SPI
    transactions and this restriction would also apply when calling spi-mem
    operations. Therefore claim and release bus before requesting transfer
    via exec_op.
    
    Change-Id: I27bb7e70536178101e26c28b28d1c64b0d07f064
    Signed-off-by: Vignesh R <vigneshr@ti.com>
    Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
    Tested-by: Stefan Roese <sr@denx.de>
    Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 76094485e462d1bed6c37ed465d1fcb341d94531)

diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c
index 334af682dc..1bb0987edb 100644
--- a/drivers/spi/spi-mem.c
+++ b/drivers/spi/spi-mem.c
@@ -210,6 +210,10 @@ int spi_mem_exec_op(struct spi_slave *slave, const struct spi_mem_op *op)
 	if (!spi_mem_supports_op(slave, op))
 		return -ENOTSUPP;
 
+	ret = spi_claim_bus(slave);
+	if (ret < 0)
+		return ret;
+
 	if (ops->mem_ops) {
 #ifndef __UBOOT__
 		/*
@@ -232,6 +236,7 @@ int spi_mem_exec_op(struct spi_slave *slave, const struct spi_mem_op *op)
 		mutex_lock(&ctlr->io_mutex);
 #endif
 		ret = ops->mem_ops->exec_op(slave, op);
+
 #ifndef __UBOOT__
 		mutex_unlock(&ctlr->io_mutex);
 		mutex_unlock(&ctlr->bus_lock_mutex);
@@ -245,8 +250,10 @@ int spi_mem_exec_op(struct spi_slave *slave, const struct spi_mem_op *op)
 		 * read path) and expect the core to use the regular SPI
 		 * interface in other cases.
 		 */
-		if (!ret || ret != -ENOTSUPP)
+		if (!ret || ret != -ENOTSUPP) {
+			spi_release_bus(slave);
 			return ret;
+		}
 	}
 
 #ifndef __UBOOT__
@@ -333,10 +340,6 @@ int spi_mem_exec_op(struct spi_slave *slave, const struct spi_mem_op *op)
 	op_len = sizeof(op->cmd.opcode) + op->addr.nbytes + op->dummy.nbytes;
 	op_buf = calloc(1, op_len);
 
-	ret = spi_claim_bus(slave);
-	if (ret < 0)
-		return ret;
-
 	op_buf[pos++] = op->cmd.opcode;
 
 	if (op->addr.nbytes) {

commit 3e37766e25abbde08471b94fb28dd9b693c6cb8a
Author: Vignesh R <vigneshr@ti.com>
Date:   Tue Feb 5 11:29:13 2019 +0530

    UPSTREAM: spi: spi-mem: Extend spi_mem_adjust_op_size() to honor max xfer size
    
    Extend spi_mem_adjust_op_size() to take spi->max_write_size and
    spi->max_read_size into account.
    
    Signed-off-by: Vignesh R <vigneshr@ti.com>
    Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
    Tested-by: Stefan Roese <sr@denx.de>
    Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
    Change-Id: I22b4bf3f6f35de38297aa86edd38d4bc401fb23e
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 12563f768ed7357d52bc15773b76cbeca6407d92)

diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c
index 1da20b8de5..334af682dc 100644
--- a/drivers/spi/spi-mem.c
+++ b/drivers/spi/spi-mem.c
@@ -412,6 +412,25 @@ int spi_mem_adjust_op_size(struct spi_slave *slave, struct spi_mem_op *op)
 	if (ops->mem_ops && ops->mem_ops->adjust_op_size)
 		return ops->mem_ops->adjust_op_size(slave, op);
 
+	if (!ops->mem_ops || !ops->mem_ops->exec_op) {
+		unsigned int len;
+
+		len = sizeof(op->cmd.opcode) + op->addr.nbytes +
+			op->dummy.nbytes;
+		if (slave->max_write_size && len > slave->max_write_size)
+			return -EINVAL;
+
+		if (op->data.dir == SPI_MEM_DATA_IN && slave->max_read_size)
+			op->data.nbytes = min(op->data.nbytes,
+					      slave->max_read_size);
+		else if (slave->max_write_size)
+			op->data.nbytes = min(op->data.nbytes,
+					      slave->max_write_size - len);
+
+		if (!op->data.nbytes)
+			return -EINVAL;
+	}
+
 	return 0;
 }
 EXPORT_SYMBOL_GPL(spi_mem_adjust_op_size);

commit 9dff8775b1acd54181d48b9af34b6375b3f1e627
Author: Vignesh R <vigneshr@ti.com>
Date:   Tue Feb 5 11:29:12 2019 +0530

    USPTREAM: spi: spi-mem: Allow use of spi_mem_exec_op for all SPI modes
    
    SPI controllers support all types of SPI modes including dual/quad bus
    widths. Therefore remove constraint wrt SPI mode from spi-mem layer.
    
    Change-Id: I120f8ff89e1342fc615899d6e4b997d6d96e41c1
    Signed-off-by: Vignesh R <vigneshr@ti.com>
    Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
    Tested-by: Stefan Roese <sr@denx.de>
    Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 6d373e523f899c5a8f8808327215e3b9eb3f92f4)

diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c
index af9aef009a..1da20b8de5 100644
--- a/drivers/spi/spi-mem.c
+++ b/drivers/spi/spi-mem.c
@@ -323,15 +323,6 @@ int spi_mem_exec_op(struct spi_slave *slave, const struct spi_mem_op *op)
 		return -EIO;
 #else
 
-	/* U-Boot does not support parallel SPI data lanes */
-	if ((op->cmd.buswidth != 1) ||
-	    (op->addr.nbytes && op->addr.buswidth != 1) ||
-	    (op->dummy.nbytes && op->dummy.buswidth != 1) ||
-	    (op->data.nbytes && op->data.buswidth != 1)) {
-		printf("Dual/Quad raw SPI transfers not supported\n");
-		return -ENOTSUPP;
-	}
-
 	if (op->data.nbytes) {
 		if (op->data.dir == SPI_MEM_DATA_IN)
 			rx_buf = op->data.buf.in;

commit 967efcae9060af5a7cda3376c9f203b7e7bfc16e
Author: Boris Brezillon <boris.brezillon@bootlin.com>
Date:   Thu Aug 16 17:30:11 2018 +0200

    UPSTREAM: spi: Extend the core to ease integration of SPI memory controllers
    
    Some controllers are exposing high-level interfaces to access various
    kind of SPI memories. Unfortunately they do not fit in the current
    spi_controller model and usually have drivers placed in
    drivers/mtd/spi-nor which are only supporting SPI NORs and not SPI
    memories in general.
    
    This is an attempt at defining a SPI memory interface which works for
    all kinds of SPI memories (NORs, NANDs, SRAMs).
    
    Change-Id: I5b907d51232777b54366a589a75b3b1ce1f54dd2
    Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Acked-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit e0bc8d8542f7bd34e5a6722d3ae41bcf9ca044af)

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index e168ed6b15..ae010d4c92 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -15,6 +15,13 @@ config DM_SPI
 
 if DM_SPI
 
+config SPI_MEM
+	bool "SPI memory extension"
+	help
+	  Enable this option if you want to enable the SPI memory extension.
+	  This extension is meant to simplify interaction with SPI memories
+	  by providing an high-level interface to send memory-like commands.
+
 config ALTERA_SPI
 	bool "Altera SPI driver"
 	help
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index a942efa8aa..e95bffc578 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -10,6 +10,7 @@ ifdef CONFIG_DM_SPI
 obj-y += spi-uclass.o
 obj-$(CONFIG_SANDBOX) += spi-emul-uclass.o
 obj-$(CONFIG_SOFT_SPI) += soft_spi.o
+obj-$(CONFIG_SPI_MEM) += spi-mem.o
 else
 obj-y += spi.o
 obj-$(CONFIG_SOFT_SPI) += soft_spi_legacy.o
diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c
new file mode 100644
index 0000000000..af9aef009a
--- /dev/null
+++ b/drivers/spi/spi-mem.c
@@ -0,0 +1,501 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Exceet Electronics GmbH
+ * Copyright (C) 2018 Bootlin
+ *
+ * Author: Boris Brezillon <boris.brezillon@bootlin.com>
+ */
+
+#ifndef __UBOOT__
+#include <linux/dmaengine.h>
+#include <linux/pm_runtime.h>
+#include "internals.h"
+#else
+#include <spi.h>
+#include <spi-mem.h>
+#endif
+
+#ifndef __UBOOT__
+/**
+ * spi_controller_dma_map_mem_op_data() - DMA-map the buffer attached to a
+ *					  memory operation
+ * @ctlr: the SPI controller requesting this dma_map()
+ * @op: the memory operation containing the buffer to map
+ * @sgt: a pointer to a non-initialized sg_table that will be filled by this
+ *	 function
+ *
+ * Some controllers might want to do DMA on the data buffer embedded in @op.
+ * This helper prepares everything for you and provides a ready-to-use
+ * sg_table. This function is not intended to be called from spi drivers.
+ * Only SPI controller drivers should use it.
+ * Note that the caller must ensure the memory region pointed by
+ * op->data.buf.{in,out} is DMA-able before calling this function.
+ *
+ * Return: 0 in case of success, a negative error code otherwise.
+ */
+int spi_controller_dma_map_mem_op_data(struct spi_controller *ctlr,
+				       const struct spi_mem_op *op,
+				       struct sg_table *sgt)
+{
+	struct device *dmadev;
+
+	if (!op->data.nbytes)
+		return -EINVAL;
+
+	if (op->data.dir == SPI_MEM_DATA_OUT && ctlr->dma_tx)
+		dmadev = ctlr->dma_tx->device->dev;
+	else if (op->data.dir == SPI_MEM_DATA_IN && ctlr->dma_rx)
+		dmadev = ctlr->dma_rx->device->dev;
+	else
+		dmadev = ctlr->dev.parent;
+
+	if (!dmadev)
+		return -EINVAL;
+
+	return spi_map_buf(ctlr, dmadev, sgt, op->data.buf.in, op->data.nbytes,
+			   op->data.dir == SPI_MEM_DATA_IN ?
+			   DMA_FROM_DEVICE : DMA_TO_DEVICE);
+}
+EXPORT_SYMBOL_GPL(spi_controller_dma_map_mem_op_data);
+
+/**
+ * spi_controller_dma_unmap_mem_op_data() - DMA-unmap the buffer attached to a
+ *					    memory operation
+ * @ctlr: the SPI controller requesting this dma_unmap()
+ * @op: the memory operation containing the buffer to unmap
+ * @sgt: a pointer to an sg_table previously initialized by
+ *	 spi_controller_dma_map_mem_op_data()
+ *
+ * Some controllers might want to do DMA on the data buffer embedded in @op.
+ * This helper prepares things so that the CPU can access the
+ * op->data.buf.{in,out} buffer again.
+ *
+ * This function is not intended to be called from SPI drivers. Only SPI
+ * controller drivers should use it.
+ *
+ * This function should be called after the DMA operation has finished and is
+ * only valid if the previous spi_controller_dma_map_mem_op_data() call
+ * returned 0.
+ *
+ * Return: 0 in case of success, a negative error code otherwise.
+ */
+void spi_controller_dma_unmap_mem_op_data(struct spi_controller *ctlr,
+					  const struct spi_mem_op *op,
+					  struct sg_table *sgt)
+{
+	struct device *dmadev;
+
+	if (!op->data.nbytes)
+		return;
+
+	if (op->data.dir == SPI_MEM_DATA_OUT && ctlr->dma_tx)
+		dmadev = ctlr->dma_tx->device->dev;
+	else if (op->data.dir == SPI_MEM_DATA_IN && ctlr->dma_rx)
+		dmadev = ctlr->dma_rx->device->dev;
+	else
+		dmadev = ctlr->dev.parent;
+
+	spi_unmap_buf(ctlr, dmadev, sgt,
+		      op->data.dir == SPI_MEM_DATA_IN ?
+		      DMA_FROM_DEVICE : DMA_TO_DEVICE);
+}
+EXPORT_SYMBOL_GPL(spi_controller_dma_unmap_mem_op_data);
+#endif /* __UBOOT__ */
+
+static int spi_check_buswidth_req(struct spi_slave *slave, u8 buswidth, bool tx)
+{
+	u32 mode = slave->mode;
+
+	switch (buswidth) {
+	case 1:
+		return 0;
+
+	case 2:
+		if ((tx && (mode & (SPI_TX_DUAL | SPI_TX_QUAD))) ||
+		    (!tx && (mode & (SPI_RX_DUAL | SPI_RX_QUAD))))
+			return 0;
+
+		break;
+
+	case 4:
+		if ((tx && (mode & SPI_TX_QUAD)) ||
+		    (!tx && (mode & SPI_RX_QUAD)))
+			return 0;
+
+		break;
+
+	default:
+		break;
+	}
+
+	return -ENOTSUPP;
+}
+
+bool spi_mem_default_supports_op(struct spi_slave *slave,
+				 const struct spi_mem_op *op)
+{
+	if (spi_check_buswidth_req(slave, op->cmd.buswidth, true))
+		return false;
+
+	if (op->addr.nbytes &&
+	    spi_check_buswidth_req(slave, op->addr.buswidth, true))
+		return false;
+
+	if (op->dummy.nbytes &&
+	    spi_check_buswidth_req(slave, op->dummy.buswidth, true))
+		return false;
+
+	if (op->data.nbytes &&
+	    spi_check_buswidth_req(slave, op->data.buswidth,
+				   op->data.dir == SPI_MEM_DATA_OUT))
+		return false;
+
+	return true;
+}
+EXPORT_SYMBOL_GPL(spi_mem_default_supports_op);
+
+/**
+ * spi_mem_supports_op() - Check if a memory device and the controller it is
+ *			   connected to support a specific memory operation
+ * @slave: the SPI device
+ * @op: the memory operation to check
+ *
+ * Some controllers are only supporting Single or Dual IOs, others might only
+ * support specific opcodes, or it can even be that the controller and device
+ * both support Quad IOs but the hardware prevents you from using it because
+ * only 2 IO lines are connected.
+ *
+ * This function checks whether a specific operation is supported.
+ *
+ * Return: true if @op is supported, false otherwise.
+ */
+bool spi_mem_supports_op(struct spi_slave *slave,
+			 const struct spi_mem_op *op)
+{
+	struct udevice *bus = slave->dev->parent;
+	struct dm_spi_ops *ops = spi_get_ops(bus);
+
+	if (ops->mem_ops && ops->mem_ops->supports_op)
+		return ops->mem_ops->supports_op(slave, op);
+
+	return spi_mem_default_supports_op(slave, op);
+}
+EXPORT_SYMBOL_GPL(spi_mem_supports_op);
+
+/**
+ * spi_mem_exec_op() - Execute a memory operation
+ * @slave: the SPI device
+ * @op: the memory operation to execute
+ *
+ * Executes a memory operation.
+ *
+ * This function first checks that @op is supported and then tries to execute
+ * it.
+ *
+ * Return: 0 in case of success, a negative error code otherwise.
+ */
+int spi_mem_exec_op(struct spi_slave *slave, const struct spi_mem_op *op)
+{
+	struct udevice *bus = slave->dev->parent;
+	struct dm_spi_ops *ops = spi_get_ops(bus);
+	unsigned int pos = 0;
+	const u8 *tx_buf = NULL;
+	u8 *rx_buf = NULL;
+	u8 *op_buf;
+	int op_len;
+	u32 flag;
+	int ret;
+	int i;
+
+	if (!spi_mem_supports_op(slave, op))
+		return -ENOTSUPP;
+
+	if (ops->mem_ops) {
+#ifndef __UBOOT__
+		/*
+		 * Flush the message queue before executing our SPI memory
+		 * operation to prevent preemption of regular SPI transfers.
+		 */
+		spi_flush_queue(ctlr);
+
+		if (ctlr->auto_runtime_pm) {
+			ret = pm_runtime_get_sync(ctlr->dev.parent);
+			if (ret < 0) {
+				dev_err(&ctlr->dev,
+					"Failed to power device: %d\n",
+					ret);
+				return ret;
+			}
+		}
+
+		mutex_lock(&ctlr->bus_lock_mutex);
+		mutex_lock(&ctlr->io_mutex);
+#endif
+		ret = ops->mem_ops->exec_op(slave, op);
+#ifndef __UBOOT__
+		mutex_unlock(&ctlr->io_mutex);
+		mutex_unlock(&ctlr->bus_lock_mutex);
+
+		if (ctlr->auto_runtime_pm)
+			pm_runtime_put(ctlr->dev.parent);
+#endif
+
+		/*
+		 * Some controllers only optimize specific paths (typically the
+		 * read path) and expect the core to use the regular SPI
+		 * interface in other cases.
+		 */
+		if (!ret || ret != -ENOTSUPP)
+			return ret;
+	}
+
+#ifndef __UBOOT__
+	tmpbufsize = sizeof(op->cmd.opcode) + op->addr.nbytes +
+		     op->dummy.nbytes;
+
+	/*
+	 * Allocate a buffer to transmit the CMD, ADDR cycles with kmalloc() so
+	 * we're guaranteed that this buffer is DMA-able, as required by the
+	 * SPI layer.
+	 */
+	tmpbuf = kzalloc(tmpbufsize, GFP_KERNEL | GFP_DMA);
+	if (!tmpbuf)
+		return -ENOMEM;
+
+	spi_message_init(&msg);
+
+	tmpbuf[0] = op->cmd.opcode;
+	xfers[xferpos].tx_buf = tmpbuf;
+	xfers[xferpos].len = sizeof(op->cmd.opcode);
+	xfers[xferpos].tx_nbits = op->cmd.buswidth;
+	spi_message_add_tail(&xfers[xferpos], &msg);
+	xferpos++;
+	totalxferlen++;
+
+	if (op->addr.nbytes) {
+		int i;
+
+		for (i = 0; i < op->addr.nbytes; i++)
+			tmpbuf[i + 1] = op->addr.val >>
+					(8 * (op->addr.nbytes - i - 1));
+
+		xfers[xferpos].tx_buf = tmpbuf + 1;
+		xfers[xferpos].len = op->addr.nbytes;
+		xfers[xferpos].tx_nbits = op->addr.buswidth;
+		spi_message_add_tail(&xfers[xferpos], &msg);
+		xferpos++;
+		totalxferlen += op->addr.nbytes;
+	}
+
+	if (op->dummy.nbytes) {
+		memset(tmpbuf + op->addr.nbytes + 1, 0xff, op->dummy.nbytes);
+		xfers[xferpos].tx_buf = tmpbuf + op->addr.nbytes + 1;
+		xfers[xferpos].len = op->dummy.nbytes;
+		xfers[xferpos].tx_nbits = op->dummy.buswidth;
+		spi_message_add_tail(&xfers[xferpos], &msg);
+		xferpos++;
+		totalxferlen += op->dummy.nbytes;
+	}
+
+	if (op->data.nbytes) {
+		if (op->data.dir == SPI_MEM_DATA_IN) {
+			xfers[xferpos].rx_buf = op->data.buf.in;
+			xfers[xferpos].rx_nbits = op->data.buswidth;
+		} else {
+			xfers[xferpos].tx_buf = op->data.buf.out;
+			xfers[xferpos].tx_nbits = op->data.buswidth;
+		}
+
+		xfers[xferpos].len = op->data.nbytes;
+		spi_message_add_tail(&xfers[xferpos], &msg);
+		xferpos++;
+		totalxferlen += op->data.nbytes;
+	}
+
+	ret = spi_sync(slave, &msg);
+
+	kfree(tmpbuf);
+
+	if (ret)
+		return ret;
+
+	if (msg.actual_length != totalxferlen)
+		return -EIO;
+#else
+
+	/* U-Boot does not support parallel SPI data lanes */
+	if ((op->cmd.buswidth != 1) ||
+	    (op->addr.nbytes && op->addr.buswidth != 1) ||
+	    (op->dummy.nbytes && op->dummy.buswidth != 1) ||
+	    (op->data.nbytes && op->data.buswidth != 1)) {
+		printf("Dual/Quad raw SPI transfers not supported\n");
+		return -ENOTSUPP;
+	}
+
+	if (op->data.nbytes) {
+		if (op->data.dir == SPI_MEM_DATA_IN)
+			rx_buf = op->data.buf.in;
+		else
+			tx_buf = op->data.buf.out;
+	}
+
+	op_len = sizeof(op->cmd.opcode) + op->addr.nbytes + op->dummy.nbytes;
+	op_buf = calloc(1, op_len);
+
+	ret = spi_claim_bus(slave);
+	if (ret < 0)
+		return ret;
+
+	op_buf[pos++] = op->cmd.opcode;
+
+	if (op->addr.nbytes) {
+		for (i = 0; i < op->addr.nbytes; i++)
+			op_buf[pos + i] = op->addr.val >>
+				(8 * (op->addr.nbytes - i - 1));
+
+		pos += op->addr.nbytes;
+	}
+
+	if (op->dummy.nbytes)
+		memset(op_buf + pos, 0xff, op->dummy.nbytes);
+
+	/* 1st transfer: opcode + address + dummy cycles */
+	flag = SPI_XFER_BEGIN;
+	/* Make sure to set END bit if no tx or rx data messages follow */
+	if (!tx_buf && !rx_buf)
+		flag |= SPI_XFER_END;
+
+	ret = spi_xfer(slave, op_len * 8, op_buf, NULL, flag);
+	if (ret)
+		return ret;
+
+	/* 2nd transfer: rx or tx data path */
+	if (tx_buf || rx_buf) {
+		ret = spi_xfer(slave, op->data.nbytes * 8, tx_buf,
+			       rx_buf, SPI_XFER_END);
+		if (ret)
+			return ret;
+	}
+
+	spi_release_bus(slave);
+
+	for (i = 0; i < pos; i++)
+		debug("%02x ", op_buf[i]);
+	debug("| [%dB %s] ",
+	      tx_buf || rx_buf ? op->data.nbytes : 0,
+	      tx_buf || rx_buf ? (tx_buf ? "out" : "in") : "-");
+	for (i = 0; i < op->data.nbytes; i++)
+		debug("%02x ", tx_buf ? tx_buf[i] : rx_buf[i]);
+	debug("[ret %d]\n", ret);
+
+	free(op_buf);
+
+	if (ret < 0)
+		return ret;
+#endif /* __UBOOT__ */
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(spi_mem_exec_op);
+
+/**
+ * spi_mem_adjust_op_size() - Adjust the data size of a SPI mem operation to
+ *				 match controller limitations
+ * @slave: the SPI device
+ * @op: the operation to adjust
+ *
+ * Some controllers have FIFO limitations and must split a data transfer
+ * operation into multiple ones, others require a specific alignment for
+ * optimized accesses. This function allows SPI mem drivers to split a single
+ * operation into multiple sub-operations when required.
+ *
+ * Return: a negative error code if the controller can't properly adjust @op,
+ *	   0 otherwise. Note that @op->data.nbytes will be updated if @op
+ *	   can't be handled in a single step.
+ */
+int spi_mem_adjust_op_size(struct spi_slave *slave, struct spi_mem_op *op)
+{
+	struct udevice *bus = slave->dev->parent;
+	struct dm_spi_ops *ops = spi_get_ops(bus);
+
+	if (ops->mem_ops && ops->mem_ops->adjust_op_size)
+		return ops->mem_ops->adjust_op_size(slave, op);
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(spi_mem_adjust_op_size);
+
+#ifndef __UBOOT__
+static inline struct spi_mem_driver *to_spi_mem_drv(struct device_driver *drv)
+{
+	return container_of(drv, struct spi_mem_driver, spidrv.driver);
+}
+
+static int spi_mem_probe(struct spi_device *spi)
+{
+	struct spi_mem_driver *memdrv = to_spi_mem_drv(spi->dev.driver);
+	struct spi_mem *mem;
+
+	mem = devm_kzalloc(&spi->dev, sizeof(*mem), GFP_KERNEL);
+	if (!mem)
+		return -ENOMEM;
+
+	mem->spi = spi;
+	spi_set_drvdata(spi, mem);
+
+	return memdrv->probe(mem);
+}
+
+static int spi_mem_remove(struct spi_device *spi)
+{
+	struct spi_mem_driver *memdrv = to_spi_mem_drv(spi->dev.driver);
+	struct spi_mem *mem = spi_get_drvdata(spi);
+
+	if (memdrv->remove)
+		return memdrv->remove(mem);
+
+	return 0;
+}
+
+static void spi_mem_shutdown(struct spi_device *spi)
+{
+	struct spi_mem_driver *memdrv = to_spi_mem_drv(spi->dev.driver);
+	struct spi_mem *mem = spi_get_drvdata(spi);
+
+	if (memdrv->shutdown)
+		memdrv->shutdown(mem);
+}
+
+/**
+ * spi_mem_driver_register_with_owner() - Register a SPI memory driver
+ * @memdrv: the SPI memory driver to register
+ * @owner: the owner of this driver
+ *
+ * Registers a SPI memory driver.
+ *
+ * Return: 0 in case of success, a negative error core otherwise.
+ */
+
+int spi_mem_driver_register_with_owner(struct spi_mem_driver *memdrv,
+				       struct module *owner)
+{
+	memdrv->spidrv.probe = spi_mem_probe;
+	memdrv->spidrv.remove = spi_mem_remove;
+	memdrv->spidrv.shutdown = spi_mem_shutdown;
+
+	return __spi_register_driver(owner, &memdrv->spidrv);
+}
+EXPORT_SYMBOL_GPL(spi_mem_driver_register_with_owner);
+
+/**
+ * spi_mem_driver_unregister_with_owner() - Unregister a SPI memory driver
+ * @memdrv: the SPI memory driver to unregister
+ *
+ * Unregisters a SPI memory driver.
+ */
+void spi_mem_driver_unregister(struct spi_mem_driver *memdrv)
+{
+	spi_unregister_driver(&memdrv->spidrv);
+}
+EXPORT_SYMBOL_GPL(spi_mem_driver_unregister);
+#endif /* __UBOOT__ */
diff --git a/include/spi-mem.h b/include/spi-mem.h
new file mode 100644
index 0000000000..36814efa86
--- /dev/null
+++ b/include/spi-mem.h
@@ -0,0 +1,258 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2018 Exceet Electronics GmbH
+ * Copyright (C) 2018 Bootlin
+ *
+ * Author:
+ *	Peter Pan <peterpandong@micron.com>
+ *	Boris Brezillon <boris.brezillon@bootlin.com>
+ */
+
+#ifndef __UBOOT_SPI_MEM_H
+#define __UBOOT_SPI_MEM_H
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <spi.h>
+
+#define SPI_MEM_OP_CMD(__opcode, __buswidth)			\
+	{							\
+		.buswidth = __buswidth,				\
+		.opcode = __opcode,				\
+	}
+
+#define SPI_MEM_OP_ADDR(__nbytes, __val, __buswidth)		\
+	{							\
+		.nbytes = __nbytes,				\
+		.val = __val,					\
+		.buswidth = __buswidth,				\
+	}
+
+#define SPI_MEM_OP_NO_ADDR	{ }
+
+#define SPI_MEM_OP_DUMMY(__nbytes, __buswidth)			\
+	{							\
+		.nbytes = __nbytes,				\
+		.buswidth = __buswidth,				\
+	}
+
+#define SPI_MEM_OP_NO_DUMMY	{ }
+
+#define SPI_MEM_OP_DATA_IN(__nbytes, __buf, __buswidth)		\
+	{							\
+		.dir = SPI_MEM_DATA_IN,				\
+		.nbytes = __nbytes,				\
+		.buf.in = __buf,				\
+		.buswidth = __buswidth,				\
+	}
+
+#define SPI_MEM_OP_DATA_OUT(__nbytes, __buf, __buswidth)	\
+	{							\
+		.dir = SPI_MEM_DATA_OUT,			\
+		.nbytes = __nbytes,				\
+		.buf.out = __buf,				\
+		.buswidth = __buswidth,				\
+	}
+
+#define SPI_MEM_OP_NO_DATA	{ }
+
+/**
+ * enum spi_mem_data_dir - describes the direction of a SPI memory data
+ *			   transfer from the controller perspective
+ * @SPI_MEM_DATA_IN: data coming from the SPI memory
+ * @SPI_MEM_DATA_OUT: data sent the SPI memory
+ */
+enum spi_mem_data_dir {
+	SPI_MEM_DATA_IN,
+	SPI_MEM_DATA_OUT,
+};
+
+/**
+ * struct spi_mem_op - describes a SPI memory operation
+ * @cmd.buswidth: number of IO lines used to transmit the command
+ * @cmd.opcode: operation opcode
+ * @addr.nbytes: number of address bytes to send. Can be zero if the operation
+ *		 does not need to send an address
+ * @addr.buswidth: number of IO lines used to transmit the address cycles
+ * @addr.val: address value. This value is always sent MSB first on the bus.
+ *	      Note that only @addr.nbytes are taken into account in this
+ *	      address value, so users should make sure the value fits in the
+ *	      assigned number of bytes.
+ * @dummy.nbytes: number of dummy bytes to send after an opcode or address. Can
+ *		  be zero if the operation does not require dummy bytes
+ * @dummy.buswidth: number of IO lanes used to transmit the dummy bytes
+ * @data.buswidth: number of IO lanes used to send/receive the data
+ * @data.dir: direction of the transfer
+ * @data.buf.in: input buffer
+ * @data.buf.out: output buffer
+ */
+struct spi_mem_op {
+	struct {
+		u8 buswidth;
+		u8 opcode;
+	} cmd;
+
+	struct {
+		u8 nbytes;
+		u8 buswidth;
+		u64 val;
+	} addr;
+
+	struct {
+		u8 nbytes;
+		u8 buswidth;
+	} dummy;
+
+	struct {
+		u8 buswidth;
+		enum spi_mem_data_dir dir;
+		unsigned int nbytes;
+		/* buf.{in,out} must be DMA-able. */
+		union {
+			void *in;
+			const void *out;
+		} buf;
+	} data;
+};
+
+#define SPI_MEM_OP(__cmd, __addr, __dummy, __data)		\
+	{							\
+		.cmd = __cmd,					\
+		.addr = __addr,					\
+		.dummy = __dummy,				\
+		.data = __data,					\
+	}
+
+#ifndef __UBOOT__
+/**
+ * struct spi_mem - describes a SPI memory device
+ * @spi: the underlying SPI device
+ * @drvpriv: spi_mem_driver private data
+ *
+ * Extra information that describe the SPI memory device and may be needed by
+ * the controller to properly handle this device should be placed here.
+ *
+ * One example would be the device size since some controller expose their SPI
+ * mem devices through a io-mapped region.
+ */
+struct spi_mem {
+	struct udevice *dev;
+	void *drvpriv;
+};
+
+/**
+ * struct spi_mem_set_drvdata() - attach driver private data to a SPI mem
+ *				  device
+ * @mem: memory device
+ * @data: data to attach to the memory device
+ */
+static inline void spi_mem_set_drvdata(struct spi_mem *mem, void *data)
+{
+	mem->drvpriv = data;
+}
+
+/**
+ * struct spi_mem_get_drvdata() - get driver private data attached to a SPI mem
+ *				  device
+ * @mem: memory device
+ *
+ * Return: the data attached to the mem device.
+ */
+static inline void *spi_mem_get_drvdata(struct spi_mem *mem)
+{
+	return mem->drvpriv;
+}
+#endif /* __UBOOT__ */
+
+/**
+ * struct spi_controller_mem_ops - SPI memory operations
+ * @adjust_op_size: shrink the data xfer of an operation to match controller's
+ *		    limitations (can be alignment of max RX/TX size
+ *		    limitations)
+ * @supports_op: check if an operation is supported by the controller
+ * @exec_op: execute a SPI memory operation
+ *
+ * This interface should be implemented by SPI controllers providing an
+ * high-level interface to execute SPI memory operation, which is usually the
+ * case for QSPI controllers.
+ */
+struct spi_controller_mem_ops {
+	int (*adjust_op_size)(struct spi_slave *slave, struct spi_mem_op *op);
+	bool (*supports_op)(struct spi_slave *slave,
+			    const struct spi_mem_op *op);
+	int (*exec_op)(struct spi_slave *slave,
+		       const struct spi_mem_op *op);
+};
+
+#ifndef __UBOOT__
+/**
+ * struct spi_mem_driver - SPI memory driver
+ * @spidrv: inherit from a SPI driver
+ * @probe: probe a SPI memory. Usually where detection/initialization takes
+ *	   place
+ * @remove: remove a SPI memory
+ * @shutdown: take appropriate action when the system is shutdown
+ *
+ * This is just a thin wrapper around a spi_driver. The core takes care of
+ * allocating the spi_mem object and forwarding the probe/remove/shutdown
+ * request to the spi_mem_driver. The reason we use this wrapper is because
+ * we might have to stuff more information into the spi_mem struct to let
+ * SPI controllers know more about the SPI memory they interact with, and
+ * having this intermediate layer allows us to do that without adding more
+ * useless fields to the spi_device object.
+ */
+struct spi_mem_driver {
+	struct spi_driver spidrv;
+	int (*probe)(struct spi_mem *mem);
+	int (*remove)(struct spi_mem *mem);
+	void (*shutdown)(struct spi_mem *mem);
+};
+
+#if IS_ENABLED(CONFIG_SPI_MEM)
+int spi_controller_dma_map_mem_op_data(struct spi_controller *ctlr,
+				       const struct spi_mem_op *op,
+				       struct sg_table *sg);
+
+void spi_controller_dma_unmap_mem_op_data(struct spi_controller *ctlr,
+					  const struct spi_mem_op *op,
+					  struct sg_table *sg);
+#else
+static inline int
+spi_controller_dma_map_mem_op_data(struct spi_controller *ctlr,
+				   const struct spi_mem_op *op,
+				   struct sg_table *sg)
+{
+	return -ENOTSUPP;
+}
+
+static inline void
+spi_controller_dma_unmap_mem_op_data(struct spi_controller *ctlr,
+				     const struct spi_mem_op *op,
+				     struct sg_table *sg)
+{
+}
+#endif /* CONFIG_SPI_MEM */
+#endif /* __UBOOT__ */
+
+int spi_mem_adjust_op_size(struct spi_slave *slave, struct spi_mem_op *op);
+
+bool spi_mem_supports_op(struct spi_slave *slave, const struct spi_mem_op *op);
+
+int spi_mem_exec_op(struct spi_slave *slave, const struct spi_mem_op *op);
+
+#ifndef __UBOOT__
+int spi_mem_driver_register_with_owner(struct spi_mem_driver *drv,
+				       struct module *owner);
+
+void spi_mem_driver_unregister(struct spi_mem_driver *drv);
+
+#define spi_mem_driver_register(__drv)                                  \
+	spi_mem_driver_register_with_owner(__drv, THIS_MODULE)
+
+#define module_spi_mem_driver(__drv)                                    \
+	module_driver(__drv, spi_mem_driver_register,                   \
+		      spi_mem_driver_unregister)
+#endif
+
+#endif /* __LINUX_SPI_MEM_H */
diff --git a/include/spi.h b/include/spi.h
index c4e1da68ab..4678e94b1f 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -10,6 +10,8 @@
 #ifndef _SPI_H_
 #define _SPI_H_
 
+#include <common.h>
+
 /* SPI mode flags */
 #define SPI_CPHA	BIT(0)			/* clock phase */
 #define SPI_CPOL	BIT(1)			/* clock polarity */
@@ -431,6 +433,15 @@ struct dm_spi_ops {
 	int (*xfer)(struct udevice *dev, unsigned int bitlen, const void *dout,
 		    void *din, unsigned long flags);
 
+	/**
+	 * Optimized handlers for SPI memory-like operations.
+	 *
+	 * Optimized/dedicated operations for interactions with SPI memory. This
+	 * field is optional and should only be implemented if the controller
+	 * has native support for memory like operations.
+	 */
+	const struct spi_controller_mem_ops *mem_ops;
+
 	/**
 	 * Set transfer speed.
 	 * This sets a new speed to be applied for next spi_xfer().

commit dc6fa43f76271b28d5461ffe52c83d26ffcf187e
Author: Vignesh R <vigneshr@ti.com>
Date:   Tue Feb 5 11:29:21 2019 +0530

    UPSTREAM: mtd: spi: spi-nor-core: Add back U-Boot specific features
    
    For legacy reasons, we will have to keep around U-Boot specific
    SPI_FLASH_BAR and SPI_TX_BYTE. Add them back to the new framework
    
    Change-Id: I6888e49eeaeb89adca64cb8ca6683b27781bd7a8
    Signed-off-by: Vignesh R <vigneshr@ti.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 8c927809ea960596345c33b02294af6e236d4ad4)

diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 2b39aaedea..13c6236d62 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -291,6 +291,7 @@ static struct spi_nor *mtd_to_spi_nor(struct mtd_info *mtd)
 	return mtd->priv;
 }
 
+#ifndef CONFIG_SPI_FLASH_BAR
 static u8 spi_nor_convert_opcode(u8 opcode, const u8 table[][2], size_t size)
 {
 	size_t i;
@@ -365,6 +366,7 @@ static void spi_nor_set_4byte_opcodes(struct spi_nor *nor,
 	nor->program_opcode = spi_nor_convert_3to4_program(nor->program_opcode);
 	nor->erase_opcode = spi_nor_convert_3to4_erase(nor->erase_opcode);
 }
+#endif /* !CONFIG_SPI_FLASH_BAR */
 
 /* Enable/disable 4-byte addressing mode. */
 static int set_4byte(struct spi_nor *nor, const struct flash_info *info,
@@ -499,6 +501,79 @@ static int spi_nor_wait_till_ready(struct spi_nor *nor)
 						    DEFAULT_READY_WAIT_JIFFIES);
 }
 
+#ifdef CONFIG_SPI_FLASH_BAR
+/*
+ * This "clean_bar" is necessary in a situation when one was accessing
+ * spi flash memory > 16 MiB by using Bank Address Register's BA24 bit.
+ *
+ * After it the BA24 bit shall be cleared to allow access to correct
+ * memory region after SW reset (by calling "reset" command).
+ *
+ * Otherwise, the BA24 bit may be left set and then after reset, the
+ * ROM would read/write/erase SPL from 16 MiB * bank_sel address.
+ */
+static int clean_bar(struct spi_nor *nor)
+{
+	u8 cmd, bank_sel = 0;
+
+	if (nor->bank_curr == 0)
+		return 0;
+	cmd = nor->bank_write_cmd;
+	nor->bank_curr = 0;
+	write_enable(nor);
+
+	return nor->write_reg(nor, cmd, &bank_sel, 1);
+}
+
+static int write_bar(struct spi_nor *nor, u32 offset)
+{
+	u8 cmd, bank_sel;
+	int ret;
+
+	bank_sel = offset / SZ_16M;
+	if (bank_sel == nor->bank_curr)
+		goto bar_end;
+
+	cmd = nor->bank_write_cmd;
+	write_enable(nor);
+	ret = nor->write_reg(nor, cmd, &bank_sel, 1);
+	if (ret < 0) {
+		debug("SF: fail to write bank register\n");
+		return ret;
+	}
+
+bar_end:
+	nor->bank_curr = bank_sel;
+	return nor->bank_curr;
+}
+
+static int read_bar(struct spi_nor *nor, const struct flash_info *info)
+{
+	u8 curr_bank = 0;
+	int ret;
+
+	switch (JEDEC_MFR(info)) {
+	case SNOR_MFR_SPANSION:
+		nor->bank_read_cmd = SPINOR_OP_BRRD;
+		nor->bank_write_cmd = SPINOR_OP_BRWR;
+		break;
+	default:
+		nor->bank_read_cmd = SPINOR_OP_RDEAR;
+		nor->bank_write_cmd = SPINOR_OP_WREAR;
+	}
+
+	ret = nor->read_reg(nor, nor->bank_read_cmd,
+				    &curr_bank, 1);
+	if (ret) {
+		debug("SF: fail to read bank addr register\n");
+		return ret;
+	}
+	nor->bank_curr = curr_bank;
+
+	return 0;
+}
+#endif
+
 /*
  * Initiate the erasure of a single sector
  */
@@ -543,6 +618,11 @@ static int spi_nor_erase(struct mtd_info *mtd, struct erase_info *instr)
 	len = instr->len;
 
 	while (len) {
+#ifdef CONFIG_SPI_FLASH_BAR
+		ret = write_bar(nor, addr);
+		if (ret < 0)
+			return ret;
+#endif
 		write_enable(nor);
 
 		ret = spi_nor_erase_sector(nor, addr);
@@ -557,9 +637,12 @@ static int spi_nor_erase(struct mtd_info *mtd, struct erase_info *instr)
 			goto erase_err;
 	}
 
+erase_err:
+#ifdef CONFIG_SPI_FLASH_BAR
+	ret = clean_bar(nor);
+#endif
 	write_disable(nor);
 
-erase_err:
 	return ret;
 }
 
@@ -1144,8 +1227,23 @@ static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len,
 
 	while (len) {
 		loff_t addr = from;
+		size_t read_len = len;
 
-		ret = nor->read(nor, addr, len, buf);
+#ifdef CONFIG_SPI_FLASH_BAR
+		u32 remain_len;
+
+		ret = write_bar(nor, addr);
+		if (ret < 0)
+			return log_ret(ret);
+		remain_len = (SZ_16M * (nor->bank_curr + 1)) - addr;
+
+		if (len < remain_len)
+			read_len = len;
+		else
+			read_len = remain_len;
+#endif
+
+		ret = nor->read(nor, addr, read_len, buf);
 		if (ret == 0) {
 			/* We shouldn't see 0-length reads */
 			ret = -EIO;
@@ -1162,18 +1260,49 @@ static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len,
 	ret = 0;
 
 read_err:
+#ifdef CONFIG_SPI_FLASH_BAR
+	ret = clean_bar(nor);
+#endif
 	return ret;
 }
 
 #ifdef CONFIG_SPI_FLASH_SST
+static int sst_write_byteprogram(struct spi_nor *nor, loff_t to, size_t len,
+				 size_t *retlen, const u_char *buf)
+{
+	size_t actual;
+	int ret = 0;
+
+	for (actual = 0; actual < len; actual++) {
+		nor->program_opcode = SPINOR_OP_BP;
+
+		write_enable(nor);
+		/* write one byte. */
+		ret = nor->write(nor, to, 1, buf + actual);
+		if (ret < 0)
+			goto sst_write_err;
+		ret = spi_nor_wait_till_ready(nor);
+		if (ret)
+			goto sst_write_err;
+		to++;
+	}
+
+sst_write_err:
+	write_disable(nor);
+	return ret;
+}
+
 static int sst_write(struct mtd_info *mtd, loff_t to, size_t len,
 		     size_t *retlen, const u_char *buf)
 {
 	struct spi_nor *nor = mtd_to_spi_nor(mtd);
+	struct spi_slave *spi = nor->spi;
 	size_t actual;
 	int ret;
 
 	dev_dbg(nor->dev, "to 0x%08x, len %zd\n", (u32)to, len);
+	if (spi->mode & SPI_TX_BYTE)
+		return sst_write_byteprogram(nor, to, len, retlen, buf);
 
 	write_enable(nor);
 
@@ -1271,6 +1400,11 @@ static int spi_nor_write(struct mtd_info *mtd, loff_t to, size_t len,
 		page_remain = min_t(size_t,
 				    nor->page_size - page_offset, len - i);
 
+#ifdef CONFIG_SPI_FLASH_BAR
+		ret = write_bar(nor, addr);
+		if (ret < 0)
+			return ret;
+#endif
 		write_enable(nor);
 		ret = nor->write(nor, addr, page_remain, buf + i);
 		if (ret < 0)
@@ -1289,6 +1423,9 @@ static int spi_nor_write(struct mtd_info *mtd, loff_t to, size_t len,
 	}
 
 write_err:
+#ifdef CONFIG_SPI_FLASH_BAR
+	ret = clean_bar(nor);
+#endif
 	return ret;
 }
 
@@ -2532,12 +2669,20 @@ int spi_nor_scan(struct spi_nor *nor)
 		/* already configured from SFDP */
 	} else if (info->addr_width) {
 		nor->addr_width = info->addr_width;
-	} else if (mtd->size > 0x1000000) {
+	} else if (mtd->size > SZ_16M) {
+#ifndef CONFIG_SPI_FLASH_BAR
 		/* enable 4-byte addressing if the device exceeds 16MiB */
 		nor->addr_width = 4;
 		if (JEDEC_MFR(info) == SNOR_MFR_SPANSION ||
 		    info->flags & SPI_NOR_4B_OPCODES)
 			spi_nor_set_4byte_opcodes(nor, info);
+#else
+	/* Configure the BAR - discover bank cmds and read current bank */
+	nor->addr_width = 3;
+	ret = read_bar(nor, info);
+	if (ret < 0)
+		return ret;
+#endif
 	} else {
 		nor->addr_width = 3;
 	}
@@ -2569,3 +2714,14 @@ int spi_nor_scan(struct spi_nor *nor)
 
 	return 0;
 }
+
+/* U-Boot specific functions, need to extend MTD to support these */
+int spi_flash_cmd_get_sw_write_prot(struct spi_nor *nor)
+{
+	int sr = read_sr(nor);
+
+	if (sr < 0)
+		return sr;
+
+	return (sr >> 2) & 7;
+}
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index 507458a760..88e80af579 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -105,6 +105,7 @@
 
 /* Used for Spansion flashes only. */
 #define SPINOR_OP_BRWR		0x17	/* Bank register write */
+#define SPINOR_OP_BRRD		0x16	/* Bank register read */
 #define SPINOR_OP_CLSR		0x30	/* Clear status register 1 */
 
 /* Used for Micron flashes only. */
@@ -256,6 +257,9 @@ struct flash_info;
  * @read_opcode:	the read opcode
  * @read_dummy:		the dummy needed by the read operation
  * @program_opcode:	the program opcode
+ * @bank_read_cmd:	Bank read cmd
+ * @bank_write_cmd:	Bank write cmd
+ * @bank_curr:		Current flash bank
  * @sst_write_second:	used by the SST write operation
  * @flags:		flag options for the current SPI-NOR (SNOR_F_*)
  * @read_proto:		the SPI protocol for read operations
@@ -291,6 +295,11 @@ struct spi_nor {
 	u8			read_opcode;
 	u8			read_dummy;
 	u8			program_opcode;
+#ifdef CONFIG_SPI_FLASH_BAR
+	u8			bank_read_cmd;
+	u8			bank_write_cmd;
+	u8			bank_curr;
+#endif
 	enum spi_nor_protocol	read_proto;
 	enum spi_nor_protocol	write_proto;
 	enum spi_nor_protocol	reg_proto;

commit 2359fc6f33f286d59219f8ff304060fcbe99ec4c
Author: Vignesh R <vigneshr@ti.com>
Date:   Tue Feb 5 11:29:20 2019 +0530

    UPSTREAM: mtd: spi: spi-nor-core: Add SFDP support
    
    Sync Serial Flash Discoverable Parameters (SFDP) parsing support from
    Linux. This allows auto detection and configuration of Flash parameters.
    
    Signed-off-by: Vignesh R <vigneshr@ti.com>
    Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
    Tested-by: Stefan Roese <sr@denx.de>
    Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
    Change-Id: I595586c8e491a56b6819182bc30de8e7f70b9476
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 0c6f187cdb18b52bcf6d3964771cf3a36b758568)

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index f248ffff45..a3542f5721 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -623,6 +623,24 @@ config SPL_SPI_FLASH_SUPPORT
 	  lines). This enables the drivers in drivers/mtd/spi as part of an
 	  SPL build. This normally requires SPL_SPI_SUPPORT.
 
+if SPL_SPI_FLASH_SUPPORT
+
+config SPL_SPI_FLASH_SFDP_SUPPORT
+	bool "SFDP table parsing support for SPI NOR flashes"
+	depends on !SPI_FLASH_BAR
+	help
+	 Enable support for parsing and auto discovery of parameters for
+	 SPI NOR flashes using Serial Flash Discoverable Parameters (SFDP)
+	 tables as per JESD216 standard in SPL.
+
+config SPL_SPI_LOAD
+	bool "Support loading from SPI flash"
+	help
+	  Enable support for loading next stage, U-Boot or otherwise, from
+	  SPI NOR in U-Boot SPL.
+
+endif # SPL_SPI_FLASH_SUPPORT
+
 config SPL_SPI_SUPPORT
 	bool "Support SPI drivers"
 	help
diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig
index 76d5a1d115..4ba95d58b3 100644
--- a/drivers/mtd/spi/Kconfig
+++ b/drivers/mtd/spi/Kconfig
@@ -34,9 +34,18 @@ config SPI_FLASH
 
 	  If unsure, say N
 
+if SPI_FLASH
+
+config SPI_FLASH_SFDP_SUPPORT
+	bool "SFDP table parsing support for SPI NOR flashes"
+	depends on !SPI_FLASH_BAR
+	help
+	 Enable support for parsing and auto discovery of parameters for
+	 SPI NOR flashes using Serial Flash Discoverable Parameters (SFDP)
+	 tables as per JESD216 standard.
+
 config SPI_FLASH_BAR
 	bool "SPI flash Bank/Extended address register support"
-	depends on SPI_FLASH
 	help
 	  Enable the SPI flash Bank/Extended address register support.
 	  Bank/Extended address registers are used to access the flash
@@ -44,13 +53,10 @@ config SPI_FLASH_BAR
 
 config SF_DUAL_FLASH
 	bool "SPI DUAL flash memory support"
-	depends on SPI_FLASH
 	help
 	  Enable this option to support two flash memories connected to a single
 	  controller. Currently Xilinx Zynq qspi supports this.
 
-if SPI_FLASH
-
 config SPI_FLASH_ATMEL
 	bool "Atmel SPI flash support"
 	help
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 523e44cbba..2b39aaedea 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -81,6 +81,7 @@ struct flash_info {
 					 * to support memory size above 128Mib.
 					 */
 #define NO_CHIP_ERASE		BIT(12) /* Chip does not support chip erase */
+#define SPI_NOR_SKIP_SFDP	BIT(13)	/* Skip parsing of SFDP tables */
 #define USE_CLSR		BIT(14)	/* use CLSR command */
 
 	int	(*quad_enable)(struct spi_nor *nor);
@@ -1411,6 +1412,39 @@ static int spansion_read_cr_quad_enable(struct spi_nor *nor)
 
 	return 0;
 }
+
+#if CONFIG_IS_ENABLED(SPI_FLASH_SFDP_SUPPORT)
+/**
+ * spansion_no_read_cr_quad_enable() - set QE bit in Configuration Register.
+ * @nor:	pointer to a 'struct spi_nor'
+ *
+ * Set the Quad Enable (QE) bit in the Configuration Register.
+ * This function should be used with QSPI memories not supporting the Read
+ * Configuration Register (35h) instruction.
+ *
+ * bit 1 of the Configuration Register is the QE bit for Spansion like QSPI
+ * memories.
+ *
+ * Return: 0 on success, -errno otherwise.
+ */
+static int spansion_no_read_cr_quad_enable(struct spi_nor *nor)
+{
+	u8 sr_cr[2];
+	int ret;
+
+	/* Keep the current value of the Status Register. */
+	ret = read_sr(nor);
+	if (ret < 0) {
+		dev_dbg(nor->dev, "error while reading status register\n");
+		return -EINVAL;
+	}
+	sr_cr[0] = ret;
+	sr_cr[1] = CR_QUAD_EN_SPAN;
+
+	return write_sr_cr(nor, sr_cr);
+}
+
+#endif /* CONFIG_SPI_FLASH_SFDP_SUPPORT */
 #endif /* CONFIG_SPI_FLASH_SPANSION */
 
 struct spi_nor_read_command {
@@ -1500,6 +1534,573 @@ spi_nor_set_pp_settings(struct spi_nor_pp_command *pp,
 	pp->proto = proto;
 }
 
+#if CONFIG_IS_ENABLED(SPI_FLASH_SFDP_SUPPORT)
+/*
+ * Serial Flash Discoverable Parameters (SFDP) parsing.
+ */
+
+/**
+ * spi_nor_read_sfdp() - read Serial Flash Discoverable Parameters.
+ * @nor:	pointer to a 'struct spi_nor'
+ * @addr:	offset in the SFDP area to start reading data from
+ * @len:	number of bytes to read
+ * @buf:	buffer where the SFDP data are copied into (dma-safe memory)
+ *
+ * Whatever the actual numbers of bytes for address and dummy cycles are
+ * for (Fast) Read commands, the Read SFDP (5Ah) instruction is always
+ * followed by a 3-byte address and 8 dummy clock cycles.
+ *
+ * Return: 0 on success, -errno otherwise.
+ */
+static int spi_nor_read_sfdp(struct spi_nor *nor, u32 addr,
+			     size_t len, void *buf)
+{
+	u8 addr_width, read_opcode, read_dummy;
+	int ret;
+
+	read_opcode = nor->read_opcode;
+	addr_width = nor->addr_width;
+	read_dummy = nor->read_dummy;
+
+	nor->read_opcode = SPINOR_OP_RDSFDP;
+	nor->addr_width = 3;
+	nor->read_dummy = 8;
+
+	while (len) {
+		ret = nor->read(nor, addr, len, (u8 *)buf);
+		if (!ret || ret > len) {
+			ret = -EIO;
+			goto read_err;
+		}
+		if (ret < 0)
+			goto read_err;
+
+		buf += ret;
+		addr += ret;
+		len -= ret;
+	}
+	ret = 0;
+
+read_err:
+	nor->read_opcode = read_opcode;
+	nor->addr_width = addr_width;
+	nor->read_dummy = read_dummy;
+
+	return ret;
+}
+
+struct sfdp_parameter_header {
+	u8		id_lsb;
+	u8		minor;
+	u8		major;
+	u8		length; /* in double words */
+	u8		parameter_table_pointer[3]; /* byte address */
+	u8		id_msb;
+};
+
+#define SFDP_PARAM_HEADER_ID(p)	(((p)->id_msb << 8) | (p)->id_lsb)
+#define SFDP_PARAM_HEADER_PTP(p) \
+	(((p)->parameter_table_pointer[2] << 16) | \
+	 ((p)->parameter_table_pointer[1] <<  8) | \
+	 ((p)->parameter_table_pointer[0] <<  0))
+
+#define SFDP_BFPT_ID		0xff00	/* Basic Flash Parameter Table */
+#define SFDP_SECTOR_MAP_ID	0xff81	/* Sector Map Table */
+
+#define SFDP_SIGNATURE		0x50444653U
+#define SFDP_JESD216_MAJOR	1
+#define SFDP_JESD216_MINOR	0
+#define SFDP_JESD216A_MINOR	5
+#define SFDP_JESD216B_MINOR	6
+
+struct sfdp_header {
+	u32		signature; /* Ox50444653U <=> "SFDP" */
+	u8		minor;
+	u8		major;
+	u8		nph; /* 0-base number of parameter headers */
+	u8		unused;
+
+	/* Basic Flash Parameter Table. */
+	struct sfdp_parameter_header	bfpt_header;
+};
+
+/* Basic Flash Parameter Table */
+
+/*
+ * JESD216 rev B defines a Basic Flash Parameter Table of 16 DWORDs.
+ * They are indexed from 1 but C arrays are indexed from 0.
+ */
+#define BFPT_DWORD(i)		((i) - 1)
+#define BFPT_DWORD_MAX		16
+
+/* The first version of JESB216 defined only 9 DWORDs. */
+#define BFPT_DWORD_MAX_JESD216			9
+
+/* 1st DWORD. */
+#define BFPT_DWORD1_FAST_READ_1_1_2		BIT(16)
+#define BFPT_DWORD1_ADDRESS_BYTES_MASK		GENMASK(18, 17)
+#define BFPT_DWORD1_ADDRESS_BYTES_3_ONLY	(0x0UL << 17)
+#define BFPT_DWORD1_ADDRESS_BYTES_3_OR_4	(0x1UL << 17)
+#define BFPT_DWORD1_ADDRESS_BYTES_4_ONLY	(0x2UL << 17)
+#define BFPT_DWORD1_DTR				BIT(19)
+#define BFPT_DWORD1_FAST_READ_1_2_2		BIT(20)
+#define BFPT_DWORD1_FAST_READ_1_4_4		BIT(21)
+#define BFPT_DWORD1_FAST_READ_1_1_4		BIT(22)
+
+/* 5th DWORD. */
+#define BFPT_DWORD5_FAST_READ_2_2_2		BIT(0)
+#define BFPT_DWORD5_FAST_READ_4_4_4		BIT(4)
+
+/* 11th DWORD. */
+#define BFPT_DWORD11_PAGE_SIZE_SHIFT		4
+#define BFPT_DWORD11_PAGE_SIZE_MASK		GENMASK(7, 4)
+
+/* 15th DWORD. */
+
+/*
+ * (from JESD216 rev B)
+ * Quad Enable Requirements (QER):
+ * - 000b: Device does not have a QE bit. Device detects 1-1-4 and 1-4-4
+ *         reads based on instruction. DQ3/HOLD# functions are hold during
+ *         instruction phase.
+ * - 001b: QE is bit 1 of status register 2. It is set via Write Status with
+ *         two data bytes where bit 1 of the second byte is one.
+ *         [...]
+ *         Writing only one byte to the status register has the side-effect of
+ *         clearing status register 2, including the QE bit. The 100b code is
+ *         used if writing one byte to the status register does not modify
+ *         status register 2.
+ * - 010b: QE is bit 6 of status register 1. It is set via Write Status with
+ *         one data byte where bit 6 is one.
+ *         [...]
+ * - 011b: QE is bit 7 of status register 2. It is set via Write status
+ *         register 2 instruction 3Eh with one data byte where bit 7 is one.
+ *         [...]
+ *         The status register 2 is read using instruction 3Fh.
+ * - 100b: QE is bit 1 of status register 2. It is set via Write Status with
+ *         two data bytes where bit 1 of the second byte is one.
+ *         [...]
+ *         In contrast to the 001b code, writing one byte to the status
+ *         register does not modify status register 2.
+ * - 101b: QE is bit 1 of status register 2. Status register 1 is read using
+ *         Read Status instruction 05h. Status register2 is read using
+ *         instruction 35h. QE is set via Writ Status instruction 01h with
+ *         two data bytes where bit 1 of the second byte is one.
+ *         [...]
+ */
+#define BFPT_DWORD15_QER_MASK			GENMASK(22, 20)
+#define BFPT_DWORD15_QER_NONE			(0x0UL << 20) /* Micron */
+#define BFPT_DWORD15_QER_SR2_BIT1_BUGGY		(0x1UL << 20)
+#define BFPT_DWORD15_QER_SR1_BIT6		(0x2UL << 20) /* Macronix */
+#define BFPT_DWORD15_QER_SR2_BIT7		(0x3UL << 20)
+#define BFPT_DWORD15_QER_SR2_BIT1_NO_RD		(0x4UL << 20)
+#define BFPT_DWORD15_QER_SR2_BIT1		(0x5UL << 20) /* Spansion */
+
+struct sfdp_bfpt {
+	u32	dwords[BFPT_DWORD_MAX];
+};
+
+/* Fast Read settings. */
+
+static void
+spi_nor_set_read_settings_from_bfpt(struct spi_nor_read_command *read,
+				    u16 half,
+				    enum spi_nor_protocol proto)
+{
+	read->num_mode_clocks = (half >> 5) & 0x07;
+	read->num_wait_states = (half >> 0) & 0x1f;
+	read->opcode = (half >> 8) & 0xff;
+	read->proto = proto;
+}
+
+struct sfdp_bfpt_read {
+	/* The Fast Read x-y-z hardware capability in params->hwcaps.mask. */
+	u32			hwcaps;
+
+	/*
+	 * The <supported_bit> bit in <supported_dword> BFPT DWORD tells us
+	 * whether the Fast Read x-y-z command is supported.
+	 */
+	u32			supported_dword;
+	u32			supported_bit;
+
+	/*
+	 * The half-word at offset <setting_shift> in <setting_dword> BFPT DWORD
+	 * encodes the op code, the number of mode clocks and the number of wait
+	 * states to be used by Fast Read x-y-z command.
+	 */
+	u32			settings_dword;
+	u32			settings_shift;
+
+	/* The SPI protocol for this Fast Read x-y-z command. */
+	enum spi_nor_protocol	proto;
+};
+
+static const struct sfdp_bfpt_read sfdp_bfpt_reads[] = {
+	/* Fast Read 1-1-2 */
+	{
+		SNOR_HWCAPS_READ_1_1_2,
+		BFPT_DWORD(1), BIT(16),	/* Supported bit */
+		BFPT_DWORD(4), 0,	/* Settings */
+		SNOR_PROTO_1_1_2,
+	},
+
+	/* Fast Read 1-2-2 */
+	{
+		SNOR_HWCAPS_READ_1_2_2,
+		BFPT_DWORD(1), BIT(20),	/* Supported bit */
+		BFPT_DWORD(4), 16,	/* Settings */
+		SNOR_PROTO_1_2_2,
+	},
+
+	/* Fast Read 2-2-2 */
+	{
+		SNOR_HWCAPS_READ_2_2_2,
+		BFPT_DWORD(5),  BIT(0),	/* Supported bit */
+		BFPT_DWORD(6), 16,	/* Settings */
+		SNOR_PROTO_2_2_2,
+	},
+
+	/* Fast Read 1-1-4 */
+	{
+		SNOR_HWCAPS_READ_1_1_4,
+		BFPT_DWORD(1), BIT(22),	/* Supported bit */
+		BFPT_DWORD(3), 16,	/* Settings */
+		SNOR_PROTO_1_1_4,
+	},
+
+	/* Fast Read 1-4-4 */
+	{
+		SNOR_HWCAPS_READ_1_4_4,
+		BFPT_DWORD(1), BIT(21),	/* Supported bit */
+		BFPT_DWORD(3), 0,	/* Settings */
+		SNOR_PROTO_1_4_4,
+	},
+
+	/* Fast Read 4-4-4 */
+	{
+		SNOR_HWCAPS_READ_4_4_4,
+		BFPT_DWORD(5), BIT(4),	/* Supported bit */
+		BFPT_DWORD(7), 16,	/* Settings */
+		SNOR_PROTO_4_4_4,
+	},
+};
+
+struct sfdp_bfpt_erase {
+	/*
+	 * The half-word at offset <shift> in DWORD <dwoard> encodes the
+	 * op code and erase sector size to be used by Sector Erase commands.
+	 */
+	u32			dword;
+	u32			shift;
+};
+
+static const struct sfdp_bfpt_erase sfdp_bfpt_erases[] = {
+	/* Erase Type 1 in DWORD8 bits[15:0] */
+	{BFPT_DWORD(8), 0},
+
+	/* Erase Type 2 in DWORD8 bits[31:16] */
+	{BFPT_DWORD(8), 16},
+
+	/* Erase Type 3 in DWORD9 bits[15:0] */
+	{BFPT_DWORD(9), 0},
+
+	/* Erase Type 4 in DWORD9 bits[31:16] */
+	{BFPT_DWORD(9), 16},
+};
+
+static int spi_nor_hwcaps_read2cmd(u32 hwcaps);
+
+/**
+ * spi_nor_parse_bfpt() - read and parse the Basic Flash Parameter Table.
+ * @nor:		pointer to a 'struct spi_nor'
+ * @bfpt_header:	pointer to the 'struct sfdp_parameter_header' describing
+ *			the Basic Flash Parameter Table length and version
+ * @params:		pointer to the 'struct spi_nor_flash_parameter' to be
+ *			filled
+ *
+ * The Basic Flash Parameter Table is the main and only mandatory table as
+ * defined by the SFDP (JESD216) specification.
+ * It provides us with the total size (memory density) of the data array and
+ * the number of address bytes for Fast Read, Page Program and Sector Erase
+ * commands.
+ * For Fast READ commands, it also gives the number of mode clock cycles and
+ * wait states (regrouped in the number of dummy clock cycles) for each
+ * supported instruction op code.
+ * For Page Program, the page size is now available since JESD216 rev A, however
+ * the supported instruction op codes are still not provided.
+ * For Sector Erase commands, this table stores the supported instruction op
+ * codes and the associated sector sizes.
+ * Finally, the Quad Enable Requirements (QER) are also available since JESD216
+ * rev A. The QER bits encode the manufacturer dependent procedure to be
+ * executed to set the Quad Enable (QE) bit in some internal register of the
+ * Quad SPI memory. Indeed the QE bit, when it exists, must be set before
+ * sending any Quad SPI command to the memory. Actually, setting the QE bit
+ * tells the memory to reassign its WP# and HOLD#/RESET# pins to functions IO2
+ * and IO3 hence enabling 4 (Quad) I/O lines.
+ *
+ * Return: 0 on success, -errno otherwise.
+ */
+static int spi_nor_parse_bfpt(struct spi_nor *nor,
+			      const struct sfdp_parameter_header *bfpt_header,
+			      struct spi_nor_flash_parameter *params)
+{
+	struct mtd_info *mtd = &nor->mtd;
+	struct sfdp_bfpt bfpt;
+	size_t len;
+	int i, cmd, err;
+	u32 addr;
+	u16 half;
+
+	/* JESD216 Basic Flash Parameter Table length is at least 9 DWORDs. */
+	if (bfpt_header->length < BFPT_DWORD_MAX_JESD216)
+		return -EINVAL;
+
+	/* Read the Basic Flash Parameter Table. */
+	len = min_t(size_t, sizeof(bfpt),
+		    bfpt_header->length * sizeof(u32));
+	addr = SFDP_PARAM_HEADER_PTP(bfpt_header);
+	memset(&bfpt, 0, sizeof(bfpt));
+	err = spi_nor_read_sfdp(nor,  addr, len, &bfpt);
+	if (err < 0)
+		return err;
+
+	/* Fix endianness of the BFPT DWORDs. */
+	for (i = 0; i < BFPT_DWORD_MAX; i++)
+		bfpt.dwords[i] = le32_to_cpu(bfpt.dwords[i]);
+
+	/* Number of address bytes. */
+	switch (bfpt.dwords[BFPT_DWORD(1)] & BFPT_DWORD1_ADDRESS_BYTES_MASK) {
+	case BFPT_DWORD1_ADDRESS_BYTES_3_ONLY:
+		nor->addr_width = 3;
+		break;
+
+	case BFPT_DWORD1_ADDRESS_BYTES_4_ONLY:
+		nor->addr_width = 4;
+		break;
+
+	default:
+		break;
+	}
+
+	/* Flash Memory Density (in bits). */
+	params->size = bfpt.dwords[BFPT_DWORD(2)];
+	if (params->size & BIT(31)) {
+		params->size &= ~BIT(31);
+
+		/*
+		 * Prevent overflows on params->size. Anyway, a NOR of 2^64
+		 * bits is unlikely to exist so this error probably means
+		 * the BFPT we are reading is corrupted/wrong.
+		 */
+		if (params->size > 63)
+			return -EINVAL;
+
+		params->size = 1ULL << params->size;
+	} else {
+		params->size++;
+	}
+	params->size >>= 3; /* Convert to bytes. */
+
+	/* Fast Read settings. */
+	for (i = 0; i < ARRAY_SIZE(sfdp_bfpt_reads); i++) {
+		const struct sfdp_bfpt_read *rd = &sfdp_bfpt_reads[i];
+		struct spi_nor_read_command *read;
+
+		if (!(bfpt.dwords[rd->supported_dword] & rd->supported_bit)) {
+			params->hwcaps.mask &= ~rd->hwcaps;
+			continue;
+		}
+
+		params->hwcaps.mask |= rd->hwcaps;
+		cmd = spi_nor_hwcaps_read2cmd(rd->hwcaps);
+		read = &params->reads[cmd];
+		half = bfpt.dwords[rd->settings_dword] >> rd->settings_shift;
+		spi_nor_set_read_settings_from_bfpt(read, half, rd->proto);
+	}
+
+	/* Sector Erase settings. */
+	for (i = 0; i < ARRAY_SIZE(sfdp_bfpt_erases); i++) {
+		const struct sfdp_bfpt_erase *er = &sfdp_bfpt_erases[i];
+		u32 erasesize;
+		u8 opcode;
+
+		half = bfpt.dwords[er->dword] >> er->shift;
+		erasesize = half & 0xff;
+
+		/* erasesize == 0 means this Erase Type is not supported. */
+		if (!erasesize)
+			continue;
+
+		erasesize = 1U << erasesize;
+		opcode = (half >> 8) & 0xff;
+#ifdef CONFIG_MTD_SPI_NOR_USE_4K_SECTORS
+		if (erasesize == SZ_4K) {
+			nor->erase_opcode = opcode;
+			mtd->erasesize = erasesize;
+			break;
+		}
+#endif
+		if (!mtd->erasesize || mtd->erasesize < erasesize) {
+			nor->erase_opcode = opcode;
+			mtd->erasesize = erasesize;
+		}
+	}
+
+	/* Stop here if not JESD216 rev A or later. */
+	if (bfpt_header->length < BFPT_DWORD_MAX)
+		return 0;
+
+	/* Page size: this field specifies 'N' so the page size = 2^N bytes. */
+	params->page_size = bfpt.dwords[BFPT_DWORD(11)];
+	params->page_size &= BFPT_DWORD11_PAGE_SIZE_MASK;
+	params->page_size >>= BFPT_DWORD11_PAGE_SIZE_SHIFT;
+	params->page_size = 1U << params->page_size;
+
+	/* Quad Enable Requirements. */
+	switch (bfpt.dwords[BFPT_DWORD(15)] & BFPT_DWORD15_QER_MASK) {
+	case BFPT_DWORD15_QER_NONE:
+		params->quad_enable = NULL;
+		break;
+#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
+	case BFPT_DWORD15_QER_SR2_BIT1_BUGGY:
+	case BFPT_DWORD15_QER_SR2_BIT1_NO_RD:
+		params->quad_enable = spansion_no_read_cr_quad_enable;
+		break;
+#endif
+#ifdef CONFIG_SPI_FLASH_MACRONIX
+	case BFPT_DWORD15_QER_SR1_BIT6:
+		params->quad_enable = macronix_quad_enable;
+		break;
+#endif
+#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
+	case BFPT_DWORD15_QER_SR2_BIT1:
+		params->quad_enable = spansion_read_cr_quad_enable;
+		break;
+#endif
+	default:
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+/**
+ * spi_nor_parse_sfdp() - parse the Serial Flash Discoverable Parameters.
+ * @nor:		pointer to a 'struct spi_nor'
+ * @params:		pointer to the 'struct spi_nor_flash_parameter' to be
+ *			filled
+ *
+ * The Serial Flash Discoverable Parameters are described by the JEDEC JESD216
+ * specification. This is a standard which tends to supported by almost all
+ * (Q)SPI memory manufacturers. Those hard-coded tables allow us to learn at
+ * runtime the main parameters needed to perform basic SPI flash operations such
+ * as Fast Read, Page Program or Sector Erase commands.
+ *
+ * Return: 0 on success, -errno otherwise.
+ */
+static int spi_nor_parse_sfdp(struct spi_nor *nor,
+			      struct spi_nor_flash_parameter *params)
+{
+	const struct sfdp_parameter_header *param_header, *bfpt_header;
+	struct sfdp_parameter_header *param_headers = NULL;
+	struct sfdp_header header;
+	size_t psize;
+	int i, err;
+
+	/* Get the SFDP header. */
+	err = spi_nor_read_sfdp(nor, 0, sizeof(header), &header);
+	if (err < 0)
+		return err;
+
+	/* Check the SFDP header version. */
+	if (le32_to_cpu(header.signature) != SFDP_SIGNATURE ||
+	    header.major != SFDP_JESD216_MAJOR)
+		return -EINVAL;
+
+	/*
+	 * Verify that the first and only mandatory parameter header is a
+	 * Basic Flash Parameter Table header as specified in JESD216.
+	 */
+	bfpt_header = &header.bfpt_header;
+	if (SFDP_PARAM_HEADER_ID(bfpt_header) != SFDP_BFPT_ID ||
+	    bfpt_header->major != SFDP_JESD216_MAJOR)
+		return -EINVAL;
+
+	/*
+	 * Allocate memory then read all parameter headers with a single
+	 * Read SFDP command. These parameter headers will actually be parsed
+	 * twice: a first time to get the latest revision of the basic flash
+	 * parameter table, then a second time to handle the supported optional
+	 * tables.
+	 * Hence we read the parameter headers once for all to reduce the
+	 * processing time. Also we use kmalloc() instead of devm_kmalloc()
+	 * because we don't need to keep these parameter headers: the allocated
+	 * memory is always released with kfree() before exiting this function.
+	 */
+	if (header.nph) {
+		psize = header.nph * sizeof(*param_headers);
+
+		param_headers = kmalloc(psize, GFP_KERNEL);
+		if (!param_headers)
+			return -ENOMEM;
+
+		err = spi_nor_read_sfdp(nor, sizeof(header),
+					psize, param_headers);
+		if (err < 0) {
+			dev_err(dev, "failed to read SFDP parameter headers\n");
+			goto exit;
+		}
+	}
+
+	/*
+	 * Check other parameter headers to get the latest revision of
+	 * the basic flash parameter table.
+	 */
+	for (i = 0; i < header.nph; i++) {
+		param_header = &param_headers[i];
+
+		if (SFDP_PARAM_HEADER_ID(param_header) == SFDP_BFPT_ID &&
+		    param_header->major == SFDP_JESD216_MAJOR &&
+		    (param_header->minor > bfpt_header->minor ||
+		     (param_header->minor == bfpt_header->minor &&
+		      param_header->length > bfpt_header->length)))
+			bfpt_header = param_header;
+	}
+
+	err = spi_nor_parse_bfpt(nor, bfpt_header, params);
+	if (err)
+		goto exit;
+
+	/* Parse other parameter headers. */
+	for (i = 0; i < header.nph; i++) {
+		param_header = &param_headers[i];
+
+		switch (SFDP_PARAM_HEADER_ID(param_header)) {
+		case SFDP_SECTOR_MAP_ID:
+			dev_info(dev, "non-uniform erase sector maps are not supported yet.\n");
+			break;
+
+		default:
+			break;
+		}
+
+		if (err)
+			goto exit;
+	}
+
+exit:
+	kfree(param_headers);
+	return err;
+}
+#else
+static int spi_nor_parse_sfdp(struct spi_nor *nor,
+			      struct spi_nor_flash_parameter *params)
+{
+	return -EINVAL;
+}
+#endif /* SPI_FLASH_SFDP_SUPPORT */
+
 static int spi_nor_init_params(struct spi_nor *nor,
 			       const struct flash_info *info,
 			       struct spi_nor_flash_parameter *params)
@@ -1570,6 +2171,24 @@ static int spi_nor_init_params(struct spi_nor *nor,
 			break;
 		}
 	}
+
+	/* Override the parameters with data read from SFDP tables. */
+	nor->addr_width = 0;
+	nor->mtd.erasesize = 0;
+	if ((info->flags & (SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)) &&
+	    !(info->flags & SPI_NOR_SKIP_SFDP)) {
+		struct spi_nor_flash_parameter sfdp_params;
+
+		memcpy(&sfdp_params, params, sizeof(sfdp_params));
+		if (spi_nor_parse_sfdp(nor, &sfdp_params)) {
+			nor->addr_width = 0;
+			nor->mtd.erasesize = 0;
+		} else {
+			memcpy(params, &sfdp_params, sizeof(*params));
+		}
+	}
+
+	return 0;
 }
 
 static int spi_nor_hwcaps2cmd(u32 hwcaps, const int table[][2], size_t size)
@@ -1680,6 +2299,10 @@ static int spi_nor_select_erase(struct spi_nor *nor,
 {
 	struct mtd_info *mtd = &nor->mtd;
 
+	/* Do nothing if already configured from SFDP. */
+	if (mtd->erasesize)
+		return 0;
+
 #ifdef CONFIG_SPI_FLASH_USE_4K_SECTORS
 	/* prefer "small sector" erase if possible */
 	if (info->flags & SECT_4K) {
@@ -1840,7 +2463,7 @@ int spi_nor_scan(struct spi_nor *nor)
 	info = spi_nor_read_id(nor);
 	if (IS_ERR_OR_NULL(info))
 		return -ENOENT;
-
+	/* Parse the Serial Flash Discoverable Parameters table. */
 	ret = spi_nor_init_params(nor, info, &params);
 	if (ret)
 		return ret;
@@ -1905,7 +2528,9 @@ int spi_nor_scan(struct spi_nor *nor)
 	if (ret)
 		return ret;
 
-	if (info->addr_width) {
+	if (nor->addr_width) {
+		/* already configured from SFDP */
+	} else if (info->addr_width) {
 		nor->addr_width = info->addr_width;
 	} else if (mtd->size > 0x1000000) {
 		/* enable 4-byte addressing if the device exceeds 16MiB */

commit cd15750530266e16a75b1c74df984b2d2498f585
Author: Vignesh R <vigneshr@ti.com>
Date:   Tue Feb 5 11:29:19 2019 +0530

    UPSTREAM: mtd: spi: spi-nor-core: Add 4 Byte addressing support
    
    Sync changes from Linux SPI NOR framework to add 4 byte addressing
    support. This is required in order to support flashes like MT35x
    that no longer support legacy Bank Address Register(BAR) way of accessing
    >16MB region.
    
    Change-Id: I051c17ed80e1b483166a3057732ae579cc2572c9
    Signed-off-by: Vignesh R <vigneshr@ti.com>
    Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
    Tested-by: Stefan Roese <sr@denx.de>
    Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 61059bc55ab108bdd53c953480b3f84f9d6100ab)

diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 66e94258b6..523e44cbba 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -290,6 +290,126 @@ static struct spi_nor *mtd_to_spi_nor(struct mtd_info *mtd)
 	return mtd->priv;
 }
 
+static u8 spi_nor_convert_opcode(u8 opcode, const u8 table[][2], size_t size)
+{
+	size_t i;
+
+	for (i = 0; i < size; i++)
+		if (table[i][0] == opcode)
+			return table[i][1];
+
+	/* No conversion found, keep input op code. */
+	return opcode;
+}
+
+static u8 spi_nor_convert_3to4_read(u8 opcode)
+{
+	static const u8 spi_nor_3to4_read[][2] = {
+		{ SPINOR_OP_READ,	SPINOR_OP_READ_4B },
+		{ SPINOR_OP_READ_FAST,	SPINOR_OP_READ_FAST_4B },
+		{ SPINOR_OP_READ_1_1_2,	SPINOR_OP_READ_1_1_2_4B },
+		{ SPINOR_OP_READ_1_2_2,	SPINOR_OP_READ_1_2_2_4B },
+		{ SPINOR_OP_READ_1_1_4,	SPINOR_OP_READ_1_1_4_4B },
+		{ SPINOR_OP_READ_1_4_4,	SPINOR_OP_READ_1_4_4_4B },
+
+		{ SPINOR_OP_READ_1_1_1_DTR,	SPINOR_OP_READ_1_1_1_DTR_4B },
+		{ SPINOR_OP_READ_1_2_2_DTR,	SPINOR_OP_READ_1_2_2_DTR_4B },
+		{ SPINOR_OP_READ_1_4_4_DTR,	SPINOR_OP_READ_1_4_4_DTR_4B },
+	};
+
+	return spi_nor_convert_opcode(opcode, spi_nor_3to4_read,
+				      ARRAY_SIZE(spi_nor_3to4_read));
+}
+
+static u8 spi_nor_convert_3to4_program(u8 opcode)
+{
+	static const u8 spi_nor_3to4_program[][2] = {
+		{ SPINOR_OP_PP,		SPINOR_OP_PP_4B },
+		{ SPINOR_OP_PP_1_1_4,	SPINOR_OP_PP_1_1_4_4B },
+		{ SPINOR_OP_PP_1_4_4,	SPINOR_OP_PP_1_4_4_4B },
+	};
+
+	return spi_nor_convert_opcode(opcode, spi_nor_3to4_program,
+				      ARRAY_SIZE(spi_nor_3to4_program));
+}
+
+static u8 spi_nor_convert_3to4_erase(u8 opcode)
+{
+	static const u8 spi_nor_3to4_erase[][2] = {
+		{ SPINOR_OP_BE_4K,	SPINOR_OP_BE_4K_4B },
+		{ SPINOR_OP_BE_32K,	SPINOR_OP_BE_32K_4B },
+		{ SPINOR_OP_SE,		SPINOR_OP_SE_4B },
+	};
+
+	return spi_nor_convert_opcode(opcode, spi_nor_3to4_erase,
+				      ARRAY_SIZE(spi_nor_3to4_erase));
+}
+
+static void spi_nor_set_4byte_opcodes(struct spi_nor *nor,
+				      const struct flash_info *info)
+{
+	/* Do some manufacturer fixups first */
+	switch (JEDEC_MFR(info)) {
+	case SNOR_MFR_SPANSION:
+		/* No small sector erase for 4-byte command set */
+		nor->erase_opcode = SPINOR_OP_SE;
+		nor->mtd.erasesize = info->sector_size;
+		break;
+
+	default:
+		break;
+	}
+
+	nor->read_opcode = spi_nor_convert_3to4_read(nor->read_opcode);
+	nor->program_opcode = spi_nor_convert_3to4_program(nor->program_opcode);
+	nor->erase_opcode = spi_nor_convert_3to4_erase(nor->erase_opcode);
+}
+
+/* Enable/disable 4-byte addressing mode. */
+static int set_4byte(struct spi_nor *nor, const struct flash_info *info,
+		     int enable)
+{
+	int status;
+	bool need_wren = false;
+	u8 cmd;
+
+	switch (JEDEC_MFR(info)) {
+	case SNOR_MFR_ST:
+	case SNOR_MFR_MICRON:
+		/* Some Micron need WREN command; all will accept it */
+		need_wren = true;
+	case SNOR_MFR_MACRONIX:
+	case SNOR_MFR_WINBOND:
+		if (need_wren)
+			write_enable(nor);
+
+		cmd = enable ? SPINOR_OP_EN4B : SPINOR_OP_EX4B;
+		status = nor->write_reg(nor, cmd, NULL, 0);
+		if (need_wren)
+			write_disable(nor);
+
+		if (!status && !enable &&
+		    JEDEC_MFR(info) == SNOR_MFR_WINBOND) {
+			/*
+			 * On Winbond W25Q256FV, leaving 4byte mode causes
+			 * the Extended Address Register to be set to 1, so all
+			 * 3-byte-address reads come from the second 16M.
+			 * We must clear the register to enable normal behavior.
+			 */
+			write_enable(nor);
+			nor->cmd_buf[0] = 0;
+			nor->write_reg(nor, SPINOR_OP_WREAR, nor->cmd_buf, 1);
+			write_disable(nor);
+		}
+
+		return status;
+	default:
+		/* Spansion style */
+		nor->cmd_buf[0] = enable << 7;
+		return nor->write_reg(nor, SPINOR_OP_BRWR, nor->cmd_buf, 1);
+	}
+}
+
 static int spi_nor_sr_ready(struct spi_nor *nor)
 {
 	int sr = read_sr(nor);
@@ -1663,6 +1783,21 @@ static int spi_nor_init(struct spi_nor *nor)
 		}
 	}
 
+	if (nor->addr_width == 4 &&
+	    (JEDEC_MFR(nor->info) != SNOR_MFR_SPANSION) &&
+	    !(nor->info->flags & SPI_NOR_4B_OPCODES)) {
+		/*
+		 * If the RESET# pin isn't hooked up properly, or the system
+		 * otherwise doesn't perform a reset command in the boot
+		 * sequence, it's impossible to 100% protect against unexpected
+		 * reboots (e.g., crashes). Warn the user (or hopefully, system
+		 * designer) that this is bad.
+		 */
+		if (nor->flags & SNOR_F_BROKEN_RESET)
+			printf("enabling reset hack; may not recover from unexpected reboots\n");
+		set_4byte(nor, nor->info, 1);
+	}
+
 	return 0;
 }
 
@@ -1772,6 +1907,12 @@ int spi_nor_scan(struct spi_nor *nor)
 
 	if (info->addr_width) {
 		nor->addr_width = info->addr_width;
+	} else if (mtd->size > 0x1000000) {
+		/* enable 4-byte addressing if the device exceeds 16MiB */
+		nor->addr_width = 4;
+		if (JEDEC_MFR(info) == SNOR_MFR_SPANSION ||
+		    info->flags & SPI_NOR_4B_OPCODES)
+			spi_nor_set_4byte_opcodes(nor, info);
 	} else {
 		nor->addr_width = 3;
 	}

commit e57032cac7e98f7912ebca4c6eab295007271c4b
Author: Vignesh R <vigneshr@ti.com>
Date:   Tue Feb 5 11:29:18 2019 +0530

    UPSTREAM: mtd: spi: spi-nor-core: Add SPI MEM support
    
    Many SPI controllers have special MMIO interfaces which provide
    accelerated read/write access but require knowledge of flash parameters
    to make use of it. Recent spi-mem layer provides a way to support such
    controllers.
    Therefore, add spi-mem support to spi-nor-core as a way to support SPI
    controllers with MMIO interface. SPI MEM layer takes care of translating
    spi_mem_ops to spi_xfer()s in case of legacy SPI controllers.
    
    Change-Id: Ib62acebae33a6c21961d0c2f2630267c1346d193
    Signed-off-by: Vignesh R <vigneshr@ti.com>
    Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
    Tested-by: Stefan Roese <sr@denx.de>
    Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 492e65b29b4c75ba6139577e10c9a5a6747ffa5a)

diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 54ef94d20f..66e94258b6 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -88,26 +88,115 @@ struct flash_info {
 
 #define JEDEC_MFR(info)	((info)->id[0])
 
+static int spi_nor_read_write_reg(struct spi_nor *nor, struct spi_mem_op
+		*op, void *buf)
+{
+	if (op->data.dir == SPI_MEM_DATA_IN)
+		op->data.buf.in = buf;
+	else
+		op->data.buf.out = buf;
+	return spi_mem_exec_op(nor->spi, op);
+}
+
 static int spi_nor_read_reg(struct spi_nor *nor, u8 code, u8 *val, int len)
 {
-	return -EINVAL;
+	struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(code, 1),
+					  SPI_MEM_OP_NO_ADDR,
+					  SPI_MEM_OP_NO_DUMMY,
+					  SPI_MEM_OP_DATA_IN(len, NULL, 1));
+	int ret;
+
+	ret = spi_nor_read_write_reg(nor, &op, val);
+	if (ret < 0)
+		dev_dbg(&flash->spimem->spi->dev, "error %d reading %x\n", ret,
+			code);
+
+	return ret;
 }
 
 static int spi_nor_write_reg(struct spi_nor *nor, u8 opcode, u8 *buf, int len)
 {
-	return -EINVAL;
+	struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 1),
+					  SPI_MEM_OP_NO_ADDR,
+					  SPI_MEM_OP_NO_DUMMY,
+					  SPI_MEM_OP_DATA_OUT(len, NULL, 1));
+
+	return spi_nor_read_write_reg(nor, &op, buf);
 }
 
 static ssize_t spi_nor_read_data(struct spi_nor *nor, loff_t from, size_t len,
 				 u_char *buf)
 {
-	return -EINVAL;
+	struct spi_mem_op op =
+			SPI_MEM_OP(SPI_MEM_OP_CMD(nor->read_opcode, 1),
+				   SPI_MEM_OP_ADDR(nor->addr_width, from, 1),
+				   SPI_MEM_OP_DUMMY(nor->read_dummy, 1),
+				   SPI_MEM_OP_DATA_IN(len, buf, 1));
+	size_t remaining = len;
+	int ret;
+
+	/* get transfer protocols. */
+	op.cmd.buswidth = spi_nor_get_protocol_inst_nbits(nor->read_proto);
+	op.addr.buswidth = spi_nor_get_protocol_addr_nbits(nor->read_proto);
+	op.dummy.buswidth = op.addr.buswidth;
+	op.data.buswidth = spi_nor_get_protocol_data_nbits(nor->read_proto);
+
+	/* convert the dummy cycles to the number of bytes */
+	op.dummy.nbytes = (nor->read_dummy * op.dummy.buswidth) / 8;
+
+	while (remaining) {
+		op.data.nbytes = remaining < UINT_MAX ? remaining : UINT_MAX;
+		ret = spi_mem_adjust_op_size(nor->spi, &op);
+		if (ret)
+			return ret;
+
+		ret = spi_mem_exec_op(nor->spi, &op);
+		if (ret)
+			return ret;
+
+		op.addr.val += op.data.nbytes;
+		remaining -= op.data.nbytes;
+		op.data.buf.in += op.data.nbytes;
+	}
+
+	return len;
 }
 
 static ssize_t spi_nor_write_data(struct spi_nor *nor, loff_t to, size_t len,
 				  const u_char *buf)
 {
-	return -EINVAL;
+	struct spi_mem_op op =
+			SPI_MEM_OP(SPI_MEM_OP_CMD(nor->program_opcode, 1),
+				   SPI_MEM_OP_ADDR(nor->addr_width, to, 1),
+				   SPI_MEM_OP_NO_DUMMY,
+				   SPI_MEM_OP_DATA_OUT(len, buf, 1));
+	size_t remaining = len;
+	int ret;
+
+	/* get transfer protocols. */
+	op.cmd.buswidth = spi_nor_get_protocol_inst_nbits(nor->write_proto);
+	op.addr.buswidth = spi_nor_get_protocol_addr_nbits(nor->write_proto);
+	op.data.buswidth = spi_nor_get_protocol_data_nbits(nor->write_proto);
+
+	if (nor->program_opcode == SPINOR_OP_AAI_WP && nor->sst_write_second)
+		op.addr.nbytes = 0;
+
+	while (remaining) {
+		op.data.nbytes = remaining < UINT_MAX ? remaining : UINT_MAX;
+		ret = spi_mem_adjust_op_size(nor->spi, &op);
+		if (ret)
+			return ret;
+
+		ret = spi_mem_exec_op(nor->spi, &op);
+		if (ret)
+			return ret;
+
+		op.addr.val += op.data.nbytes;
+		remaining -= op.data.nbytes;
+		op.data.buf.out += op.data.nbytes;
+	}
+
+	return len;
 }
 
 /*

commit a2b7f1942f0cc74776010e48f0fc72a62394de07
Author: Vignesh R <vigneshr@ti.com>
Date:   Tue Feb 5 11:29:17 2019 +0530

    UPSTREAM: mtd: spi: Port SPI NOR framework from Linux
    
    Current U-Boot SPI NOR support (sf layer) is quite outdated as it does not
    support 4 byte addressing opcodes, SFDP table parsing and different types of
    quad mode enable sequences. Many newer flashes no longer support BANK
    registers used by sf layer to a access >16MB of flash address space.
    So, sync SPI NOR framework from Linux v4.19 that supports all the
    above features. Start with basic sync up that brings in basic framework
    subsequent commits will bring in more features.
    
    Change-Id: I16b35b48166c00b7a4be215cfb6dcde00805f9f8
    Signed-off-by: Vignesh R <vigneshr@ti.com>
    Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
    Tested-by: Stefan Roese <sr@denx.de>
    Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 7aeedac01534ab343c28abed60f8e0fb9311bbee)

diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
new file mode 100644
index 0000000000..54ef94d20f
--- /dev/null
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -0,0 +1,1716 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Based on m25p80.c, by Mike Lavender (mike@steroidmicros.com), with
+ * influence from lart.c (Abraham Van Der Merwe) and mtd_dataflash.c
+ *
+ * Copyright (C) 2005, Intec Automation Inc.
+ * Copyright (C) 2014, Freescale Semiconductor, Inc.
+ *
+ * Synced from Linux v4.19
+ */
+
+#include <common.h>
+#include <linux/err.h>
+#include <linux/errno.h>
+#include <linux/log2.h>
+#include <linux/math64.h>
+#include <linux/sizes.h>
+
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/spi-nor.h>
+#include <spi-mem.h>
+#include <spi.h>
+
+/* Define max times to check status register before we give up. */
+
+/*
+ * For everything but full-chip erase; probably could be much smaller, but kept
+ * around for safety for now
+ */
+
+#define HZ					CONFIG_SYS_HZ
+
+#define DEFAULT_READY_WAIT_JIFFIES		(40UL * HZ)
+
+#define SPI_NOR_MAX_ID_LEN	6
+#define SPI_NOR_MAX_ADDR_WIDTH	4
+
+struct flash_info {
+	char		*name;
+
+	/*
+	 * This array stores the ID bytes.
+	 * The first three bytes are the JEDIC ID.
+	 * JEDEC ID zero means "no ID" (mostly older chips).
+	 */
+	u8		id[SPI_NOR_MAX_ID_LEN];
+	u8		id_len;
+
+	/* The size listed here is what works with SPINOR_OP_SE, which isn't
+	 * necessarily called a "sector" by the vendor.
+	 */
+	unsigned int	sector_size;
+	u16		n_sectors;
+
+	u16		page_size;
+	u16		addr_width;
+
+	u16		flags;
+#define SECT_4K			BIT(0)	/* SPINOR_OP_BE_4K works uniformly */
+#define SPI_NOR_NO_ERASE	BIT(1)	/* No erase command needed */
+#define SST_WRITE		BIT(2)	/* use SST byte programming */
+#define SPI_NOR_NO_FR		BIT(3)	/* Can't do fastread */
+#define SECT_4K_PMC		BIT(4)	/* SPINOR_OP_BE_4K_PMC works uniformly */
+#define SPI_NOR_DUAL_READ	BIT(5)	/* Flash supports Dual Read */
+#define SPI_NOR_QUAD_READ	BIT(6)	/* Flash supports Quad Read */
+#define USE_FSR			BIT(7)	/* use flag status register */
+#define SPI_NOR_HAS_LOCK	BIT(8)	/* Flash supports lock/unlock via SR */
+#define SPI_NOR_HAS_TB		BIT(9)	/*
+					 * Flash SR has Top/Bottom (TB) protect
+					 * bit. Must be used with
+					 * SPI_NOR_HAS_LOCK.
+					 */
+#define	SPI_S3AN		BIT(10)	/*
+					 * Xilinx Spartan 3AN In-System Flash
+					 * (MFR cannot be used for probing
+					 * because it has the same value as
+					 * ATMEL flashes)
+					 */
+#define SPI_NOR_4B_OPCODES	BIT(11)	/*
+					 * Use dedicated 4byte address op codes
+					 * to support memory size above 128Mib.
+					 */
+#define NO_CHIP_ERASE		BIT(12) /* Chip does not support chip erase */
+#define USE_CLSR		BIT(14)	/* use CLSR command */
+
+	int	(*quad_enable)(struct spi_nor *nor);
+};
+
+#define JEDEC_MFR(info)	((info)->id[0])
+
+static int spi_nor_read_reg(struct spi_nor *nor, u8 code, u8 *val, int len)
+{
+	return -EINVAL;
+}
+
+static int spi_nor_write_reg(struct spi_nor *nor, u8 opcode, u8 *buf, int len)
+{
+	return -EINVAL;
+}
+
+static ssize_t spi_nor_read_data(struct spi_nor *nor, loff_t from, size_t len,
+				 u_char *buf)
+{
+	return -EINVAL;
+}
+
+static ssize_t spi_nor_write_data(struct spi_nor *nor, loff_t to, size_t len,
+				  const u_char *buf)
+{
+	return -EINVAL;
+}
+
+/*
+ * Read the status register, returning its value in the location
+ * Return the status register value.
+ * Returns negative if error occurred.
+ */
+static int read_sr(struct spi_nor *nor)
+{
+	int ret;
+	u8 val;
+
+	ret = nor->read_reg(nor, SPINOR_OP_RDSR, &val, 1);
+	if (ret < 0) {
+		pr_debug("error %d reading SR\n", (int)ret);
+		return ret;
+	}
+
+	return val;
+}
+
+/*
+ * Read the flag status register, returning its value in the location
+ * Return the status register value.
+ * Returns negative if error occurred.
+ */
+static int read_fsr(struct spi_nor *nor)
+{
+	int ret;
+	u8 val;
+
+	ret = nor->read_reg(nor, SPINOR_OP_RDFSR, &val, 1);
+	if (ret < 0) {
+		pr_debug("error %d reading FSR\n", ret);
+		return ret;
+	}
+
+	return val;
+}
+
+/*
+ * Read configuration register, returning its value in the
+ * location. Return the configuration register value.
+ * Returns negative if error occurred.
+ */
+#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
+static int read_cr(struct spi_nor *nor)
+{
+	int ret;
+	u8 val;
+
+	ret = nor->read_reg(nor, SPINOR_OP_RDCR, &val, 1);
+	if (ret < 0) {
+		dev_dbg(nor->dev, "error %d reading CR\n", ret);
+		return ret;
+	}
+
+	return val;
+}
+#endif
+
+/*
+ * Write status register 1 byte
+ * Returns negative if error occurred.
+ */
+static int write_sr(struct spi_nor *nor, u8 val)
+{
+	nor->cmd_buf[0] = val;
+	return nor->write_reg(nor, SPINOR_OP_WRSR, nor->cmd_buf, 1);
+}
+
+/*
+ * Set write enable latch with Write Enable command.
+ * Returns negative if error occurred.
+ */
+static int write_enable(struct spi_nor *nor)
+{
+	return nor->write_reg(nor, SPINOR_OP_WREN, NULL, 0);
+}
+
+/*
+ * Send write disable instruction to the chip.
+ */
+static int write_disable(struct spi_nor *nor)
+{
+	return nor->write_reg(nor, SPINOR_OP_WRDI, NULL, 0);
+}
+
+static struct spi_nor *mtd_to_spi_nor(struct mtd_info *mtd)
+{
+	return mtd->priv;
+}
+
+static int spi_nor_sr_ready(struct spi_nor *nor)
+{
+	int sr = read_sr(nor);
+
+	if (sr < 0)
+		return sr;
+
+	if (nor->flags & SNOR_F_USE_CLSR && sr & (SR_E_ERR | SR_P_ERR)) {
+		if (sr & SR_E_ERR)
+			dev_dbg(nor->dev, "Erase Error occurred\n");
+		else
+			dev_dbg(nor->dev, "Programming Error occurred\n");
+
+		nor->write_reg(nor, SPINOR_OP_CLSR, NULL, 0);
+		return -EIO;
+	}
+
+	return !(sr & SR_WIP);
+}
+
+static int spi_nor_fsr_ready(struct spi_nor *nor)
+{
+	int fsr = read_fsr(nor);
+
+	if (fsr < 0)
+		return fsr;
+
+	if (fsr & (FSR_E_ERR | FSR_P_ERR)) {
+		if (fsr & FSR_E_ERR)
+			dev_dbg(nor->dev, "Erase operation failed.\n");
+		else
+			dev_dbg(nor->dev, "Program operation failed.\n");
+
+		if (fsr & FSR_PT_ERR)
+			dev_dbg(nor->dev,
+				"Attempted to modify a protected sector.\n");
+
+		nor->write_reg(nor, SPINOR_OP_CLFSR, NULL, 0);
+		return -EIO;
+	}
+
+	return fsr & FSR_READY;
+}
+
+static int spi_nor_ready(struct spi_nor *nor)
+{
+	int sr, fsr;
+
+	sr = spi_nor_sr_ready(nor);
+	if (sr < 0)
+		return sr;
+	fsr = nor->flags & SNOR_F_USE_FSR ? spi_nor_fsr_ready(nor) : 1;
+	if (fsr < 0)
+		return fsr;
+	return sr && fsr;
+}
+
+/*
+ * Service routine to read status register until ready, or timeout occurs.
+ * Returns non-zero if error.
+ */
+static int spi_nor_wait_till_ready_with_timeout(struct spi_nor *nor,
+						unsigned long timeout)
+{
+	unsigned long timebase;
+	int ret;
+
+	timebase = get_timer(0);
+
+	while (get_timer(timebase) < timeout) {
+		ret = spi_nor_ready(nor);
+		if (ret < 0)
+			return ret;
+		if (ret)
+			return 0;
+	}
+
+	dev_err(nor->dev, "flash operation timed out\n");
+
+	return -ETIMEDOUT;
+}
+
+static int spi_nor_wait_till_ready(struct spi_nor *nor)
+{
+	return spi_nor_wait_till_ready_with_timeout(nor,
+						    DEFAULT_READY_WAIT_JIFFIES);
+}
+
+/*
+ * Initiate the erasure of a single sector
+ */
+static int spi_nor_erase_sector(struct spi_nor *nor, u32 addr)
+{
+	u8 buf[SPI_NOR_MAX_ADDR_WIDTH];
+	int i;
+
+	if (nor->erase)
+		return nor->erase(nor, addr);
+
+	/*
+	 * Default implementation, if driver doesn't have a specialized HW
+	 * control
+	 */
+	for (i = nor->addr_width - 1; i >= 0; i--) {
+		buf[i] = addr & 0xff;
+		addr >>= 8;
+	}
+
+	return nor->write_reg(nor, nor->erase_opcode, buf, nor->addr_width);
+}
+
+/*
+ * Erase an address range on the nor chip.  The address range may extend
+ * one or more erase sectors.  Return an error is there is a problem erasing.
+ */
+static int spi_nor_erase(struct mtd_info *mtd, struct erase_info *instr)
+{
+	struct spi_nor *nor = mtd_to_spi_nor(mtd);
+	u32 addr, len, rem;
+	int ret;
+
+	dev_dbg(nor->dev, "at 0x%llx, len %lld\n", (long long)instr->addr,
+		(long long)instr->len);
+
+	div_u64_rem(instr->len, mtd->erasesize, &rem);
+	if (rem)
+		return -EINVAL;
+
+	addr = instr->addr;
+	len = instr->len;
+
+	while (len) {
+		write_enable(nor);
+
+		ret = spi_nor_erase_sector(nor, addr);
+		if (ret)
+			goto erase_err;
+
+		addr += mtd->erasesize;
+		len -= mtd->erasesize;
+
+		ret = spi_nor_wait_till_ready(nor);
+		if (ret)
+			goto erase_err;
+	}
+
+	write_disable(nor);
+
+erase_err:
+	return ret;
+}
+
+#if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST)
+/* Write status register and ensure bits in mask match written values */
+static int write_sr_and_check(struct spi_nor *nor, u8 status_new, u8 mask)
+{
+	int ret;
+
+	write_enable(nor);
+	ret = write_sr(nor, status_new);
+	if (ret)
+		return ret;
+
+	ret = spi_nor_wait_till_ready(nor);
+	if (ret)
+		return ret;
+
+	ret = read_sr(nor);
+	if (ret < 0)
+		return ret;
+
+	return ((ret & mask) != (status_new & mask)) ? -EIO : 0;
+}
+
+static void stm_get_locked_range(struct spi_nor *nor, u8 sr, loff_t *ofs,
+				 uint64_t *len)
+{
+	struct mtd_info *mtd = &nor->mtd;
+	u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
+	int shift = ffs(mask) - 1;
+	int pow;
+
+	if (!(sr & mask)) {
+		/* No protection */
+		*ofs = 0;
+		*len = 0;
+	} else {
+		pow = ((sr & mask) ^ mask) >> shift;
+		*len = mtd->size >> pow;
+		if (nor->flags & SNOR_F_HAS_SR_TB && sr & SR_TB)
+			*ofs = 0;
+		else
+			*ofs = mtd->size - *len;
+	}
+}
+
+/*
+ * Return 1 if the entire region is locked (if @locked is true) or unlocked (if
+ * @locked is false); 0 otherwise
+ */
+static int stm_check_lock_status_sr(struct spi_nor *nor, loff_t ofs, u64 len,
+				    u8 sr, bool locked)
+{
+	loff_t lock_offs;
+	uint64_t lock_len;
+
+	if (!len)
+		return 1;
+
+	stm_get_locked_range(nor, sr, &lock_offs, &lock_len);
+
+	if (locked)
+		/* Requested range is a sub-range of locked range */
+		return (ofs + len <= lock_offs + lock_len) && (ofs >= lock_offs);
+	else
+		/* Requested range does not overlap with locked range */
+		return (ofs >= lock_offs + lock_len) || (ofs + len <= lock_offs);
+}
+
+static int stm_is_locked_sr(struct spi_nor *nor, loff_t ofs, uint64_t len,
+			    u8 sr)
+{
+	return stm_check_lock_status_sr(nor, ofs, len, sr, true);
+}
+
+static int stm_is_unlocked_sr(struct spi_nor *nor, loff_t ofs, uint64_t len,
+			      u8 sr)
+{
+	return stm_check_lock_status_sr(nor, ofs, len, sr, false);
+}
+
+/*
+ * Lock a region of the flash. Compatible with ST Micro and similar flash.
+ * Supports the block protection bits BP{0,1,2} in the status register
+ * (SR). Does not support these features found in newer SR bitfields:
+ *   - SEC: sector/block protect - only handle SEC=0 (block protect)
+ *   - CMP: complement protect - only support CMP=0 (range is not complemented)
+ *
+ * Support for the following is provided conditionally for some flash:
+ *   - TB: top/bottom protect
+ *
+ * Sample table portion for 8MB flash (Winbond w25q64fw):
+ *
+ *   SEC  |  TB   |  BP2  |  BP1  |  BP0  |  Prot Length  | Protected Portion
+ *  --------------------------------------------------------------------------
+ *    X   |   X   |   0   |   0   |   0   |  NONE         | NONE
+ *    0   |   0   |   0   |   0   |   1   |  128 KB       | Upper 1/64
+ *    0   |   0   |   0   |   1   |   0   |  256 KB       | Upper 1/32
+ *    0   |   0   |   0   |   1   |   1   |  512 KB       | Upper 1/16
+ *    0   |   0   |   1   |   0   |   0   |  1 MB         | Upper 1/8
+ *    0   |   0   |   1   |   0   |   1   |  2 MB         | Upper 1/4
+ *    0   |   0   |   1   |   1   |   0   |  4 MB         | Upper 1/2
+ *    X   |   X   |   1   |   1   |   1   |  8 MB         | ALL
+ *  ------|-------|-------|-------|-------|---------------|-------------------
+ *    0   |   1   |   0   |   0   |   1   |  128 KB       | Lower 1/64
+ *    0   |   1   |   0   |   1   |   0   |  256 KB       | Lower 1/32
+ *    0   |   1   |   0   |   1   |   1   |  512 KB       | Lower 1/16
+ *    0   |   1   |   1   |   0   |   0   |  1 MB         | Lower 1/8
+ *    0   |   1   |   1   |   0   |   1   |  2 MB         | Lower 1/4
+ *    0   |   1   |   1   |   1   |   0   |  4 MB         | Lower 1/2
+ *
+ * Returns negative on errors, 0 on success.
+ */
+static int stm_lock(struct spi_nor *nor, loff_t ofs, uint64_t len)
+{
+	struct mtd_info *mtd = &nor->mtd;
+	int status_old, status_new;
+	u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
+	u8 shift = ffs(mask) - 1, pow, val;
+	loff_t lock_len;
+	bool can_be_top = true, can_be_bottom = nor->flags & SNOR_F_HAS_SR_TB;
+	bool use_top;
+
+	status_old = read_sr(nor);
+	if (status_old < 0)
+		return status_old;
+
+	/* If nothing in our range is unlocked, we don't need to do anything */
+	if (stm_is_locked_sr(nor, ofs, len, status_old))
+		return 0;
+
+	/* If anything below us is unlocked, we can't use 'bottom' protection */
+	if (!stm_is_locked_sr(nor, 0, ofs, status_old))
+		can_be_bottom = false;
+
+	/* If anything above us is unlocked, we can't use 'top' protection */
+	if (!stm_is_locked_sr(nor, ofs + len, mtd->size - (ofs + len),
+			      status_old))
+		can_be_top = false;
+
+	if (!can_be_bottom && !can_be_top)
+		return -EINVAL;
+
+	/* Prefer top, if both are valid */
+	use_top = can_be_top;
+
+	/* lock_len: length of region that should end up locked */
+	if (use_top)
+		lock_len = mtd->size - ofs;
+	else
+		lock_len = ofs + len;
+
+	/*
+	 * Need smallest pow such that:
+	 *
+	 *   1 / (2^pow) <= (len / size)
+	 *
+	 * so (assuming power-of-2 size) we do:
+	 *
+	 *   pow = ceil(log2(size / len)) = log2(size) - floor(log2(len))
+	 */
+	pow = ilog2(mtd->size) - ilog2(lock_len);
+	val = mask - (pow << shift);
+	if (val & ~mask)
+		return -EINVAL;
+	/* Don't "lock" with no region! */
+	if (!(val & mask))
+		return -EINVAL;
+
+	status_new = (status_old & ~mask & ~SR_TB) | val;
+
+	/* Disallow further writes if WP pin is asserted */
+	status_new |= SR_SRWD;
+
+	if (!use_top)
+		status_new |= SR_TB;
+
+	/* Don't bother if they're the same */
+	if (status_new == status_old)
+		return 0;
+
+	/* Only modify protection if it will not unlock other areas */
+	if ((status_new & mask) < (status_old & mask))
+		return -EINVAL;
+
+	return write_sr_and_check(nor, status_new, mask);
+}
+
+/*
+ * Unlock a region of the flash. See stm_lock() for more info
+ *
+ * Returns negative on errors, 0 on success.
+ */
+static int stm_unlock(struct spi_nor *nor, loff_t ofs, uint64_t len)
+{
+	struct mtd_info *mtd = &nor->mtd;
+	int status_old, status_new;
+	u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
+	u8 shift = ffs(mask) - 1, pow, val;
+	loff_t lock_len;
+	bool can_be_top = true, can_be_bottom = nor->flags & SNOR_F_HAS_SR_TB;
+	bool use_top;
+
+	status_old = read_sr(nor);
+	if (status_old < 0)
+		return status_old;
+
+	/* If nothing in our range is locked, we don't need to do anything */
+	if (stm_is_unlocked_sr(nor, ofs, len, status_old))
+		return 0;
+
+	/* If anything below us is locked, we can't use 'top' protection */
+	if (!stm_is_unlocked_sr(nor, 0, ofs, status_old))
+		can_be_top = false;
+
+	/* If anything above us is locked, we can't use 'bottom' protection */
+	if (!stm_is_unlocked_sr(nor, ofs + len, mtd->size - (ofs + len),
+				status_old))
+		can_be_bottom = false;
+
+	if (!can_be_bottom && !can_be_top)
+		return -EINVAL;
+
+	/* Prefer top, if both are valid */
+	use_top = can_be_top;
+
+	/* lock_len: length of region that should remain locked */
+	if (use_top)
+		lock_len = mtd->size - (ofs + len);
+	else
+		lock_len = ofs;
+
+	/*
+	 * Need largest pow such that:
+	 *
+	 *   1 / (2^pow) >= (len / size)
+	 *
+	 * so (assuming power-of-2 size) we do:
+	 *
+	 *   pow = floor(log2(size / len)) = log2(size) - ceil(log2(len))
+	 */
+	pow = ilog2(mtd->size) - order_base_2(lock_len);
+	if (lock_len == 0) {
+		val = 0; /* fully unlocked */
+	} else {
+		val = mask - (pow << shift);
+		/* Some power-of-two sizes are not supported */
+		if (val & ~mask)
+			return -EINVAL;
+	}
+
+	status_new = (status_old & ~mask & ~SR_TB) | val;
+
+	/* Don't protect status register if we're fully unlocked */
+	if (lock_len == 0)
+		status_new &= ~SR_SRWD;
+
+	if (!use_top)
+		status_new |= SR_TB;
+
+	/* Don't bother if they're the same */
+	if (status_new == status_old)
+		return 0;
+
+	/* Only modify protection if it will not lock other areas */
+	if ((status_new & mask) > (status_old & mask))
+		return -EINVAL;
+
+	return write_sr_and_check(nor, status_new, mask);
+}
+
+/*
+ * Check if a region of the flash is (completely) locked. See stm_lock() for
+ * more info.
+ *
+ * Returns 1 if entire region is locked, 0 if any portion is unlocked, and
+ * negative on errors.
+ */
+static int stm_is_locked(struct spi_nor *nor, loff_t ofs, uint64_t len)
+{
+	int status;
+
+	status = read_sr(nor);
+	if (status < 0)
+		return status;
+
+	return stm_is_locked_sr(nor, ofs, len, status);
+}
+#endif /* CONFIG_SPI_FLASH_STMICRO */
+
+/* Used when the "_ext_id" is two bytes at most */
+#define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags)	\
+		.id = {							\
+			((_jedec_id) >> 16) & 0xff,			\
+			((_jedec_id) >> 8) & 0xff,			\
+			(_jedec_id) & 0xff,				\
+			((_ext_id) >> 8) & 0xff,			\
+			(_ext_id) & 0xff,				\
+			},						\
+		.id_len = (!(_jedec_id) ? 0 : (3 + ((_ext_id) ? 2 : 0))),	\
+		.sector_size = (_sector_size),				\
+		.n_sectors = (_n_sectors),				\
+		.page_size = 256,					\
+		.flags = (_flags),
+
+#define INFO6(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags)	\
+		.id = {							\
+			((_jedec_id) >> 16) & 0xff,			\
+			((_jedec_id) >> 8) & 0xff,			\
+			(_jedec_id) & 0xff,				\
+			((_ext_id) >> 16) & 0xff,			\
+			((_ext_id) >> 8) & 0xff,			\
+			(_ext_id) & 0xff,				\
+			},						\
+		.id_len = 6,						\
+		.sector_size = (_sector_size),				\
+		.n_sectors = (_n_sectors),				\
+		.page_size = 256,					\
+		.flags = (_flags),
+
+/* NOTE: double check command sets and memory organization when you add
+ * more nor chips.  This current list focusses on newer chips, which
+ * have been converging on command sets which including JEDEC ID.
+ *
+ * All newly added entries should describe *hardware* and should use SECT_4K
+ * (or SECT_4K_PMC) if hardware supports erasing 4 KiB sectors. For usage
+ * scenarios excluding small sectors there is config option that can be
+ * disabled: CONFIG_MTD_SPI_NOR_USE_4K_SECTORS.
+ * For historical (and compatibility) reasons (before we got above config) some
+ * old entries may be missing 4K flag.
+ */
+const struct flash_info spi_nor_ids[] = {
+#ifdef CONFIG_SPI_FLASH_ATMEL		/* ATMEL */
+	/* Atmel -- some are (confusingly) marketed as "DataFlash" */
+	{ "at26df321",  INFO(0x1f4700, 0, 64 * 1024, 64, SECT_4K) },
+	{ "at25df321a", INFO(0x1f4701, 0, 64 * 1024, 64, SECT_4K) },
+
+	{ "at45db011d",	INFO(0x1f2200, 0, 64 * 1024,   4, SECT_4K) },
+	{ "at45db021d",	INFO(0x1f2300, 0, 64 * 1024,   8, SECT_4K) },
+	{ "at45db041d",	INFO(0x1f2400, 0, 64 * 1024,   8, SECT_4K) },
+	{ "at45db081d", INFO(0x1f2500, 0, 64 * 1024,  16, SECT_4K) },
+	{ "at45db161d",	INFO(0x1f2600, 0, 64 * 1024,  32, SECT_4K) },
+	{ "at45db321d",	INFO(0x1f2700, 0, 64 * 1024,  64, SECT_4K) },
+	{ "at45db641d",	INFO(0x1f2800, 0, 64 * 1024, 128, SECT_4K) },
+	{ "at26df081a", INFO(0x1f4501, 0, 64 * 1024,  16, SECT_4K) },
+#endif
+#ifdef CONFIG_SPI_FLASH_EON		/* EON */
+	/* EON -- en25xxx */
+	{ "en25q32b",   INFO(0x1c3016, 0, 64 * 1024,   64, 0) },
+	{ "en25q64",    INFO(0x1c3017, 0, 64 * 1024,  128, SECT_4K) },
+	{ "en25qh128",  INFO(0x1c7018, 0, 64 * 1024,  256, 0) },
+	{ "en25s64",	INFO(0x1c3817, 0, 64 * 1024,  128, SECT_4K) },
+#endif
+#ifdef CONFIG_SPI_FLASH_GIGADEVICE	/* GIGADEVICE */
+	/* GigaDevice */
+	{
+		"gd25q16", INFO(0xc84015, 0, 64 * 1024,  32,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+	},
+	{
+		"gd25q32", INFO(0xc84016, 0, 64 * 1024,  64,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+	},
+	{
+		"gd25lq32", INFO(0xc86016, 0, 64 * 1024, 64,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+	},
+	{
+		"gd25q64", INFO(0xc84017, 0, 64 * 1024, 128,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+	},
+#endif
+#ifdef CONFIG_SPI_FLASH_ISSI		/* ISSI */
+	/* ISSI */
+	{ "is25lq040b", INFO(0x9d4013, 0, 64 * 1024,   8,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{ "is25lp032",	INFO(0x9d6016, 0, 64 * 1024,  64, 0) },
+	{ "is25lp064",	INFO(0x9d6017, 0, 64 * 1024, 128, 0) },
+	{ "is25lp128",  INFO(0x9d6018, 0, 64 * 1024, 256,
+			SECT_4K | SPI_NOR_DUAL_READ) },
+	{ "is25lp256",  INFO(0x9d6019, 0, 64 * 1024, 512,
+			SECT_4K | SPI_NOR_DUAL_READ) },
+	{ "is25wp032",  INFO(0x9d7016, 0, 64 * 1024,  64,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{ "is25wp064",  INFO(0x9d7017, 0, 64 * 1024, 128,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{ "is25wp128",  INFO(0x9d7018, 0, 64 * 1024, 256,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+#endif
+#ifdef CONFIG_SPI_FLASH_MACRONIX	/* MACRONIX */
+	/* Macronix */
+	{ "mx25l2005a",  INFO(0xc22012, 0, 64 * 1024,   4, SECT_4K) },
+	{ "mx25l4005a",  INFO(0xc22013, 0, 64 * 1024,   8, SECT_4K) },
+	{ "mx25l8005",   INFO(0xc22014, 0, 64 * 1024,  16, 0) },
+	{ "mx25l1606e",  INFO(0xc22015, 0, 64 * 1024,  32, SECT_4K) },
+	{ "mx25l3205d",  INFO(0xc22016, 0, 64 * 1024,  64, SECT_4K) },
+	{ "mx25l6405d",  INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) },
+	{ "mx25u2033e",  INFO(0xc22532, 0, 64 * 1024,   4, SECT_4K) },
+	{ "mx25u1635e",  INFO(0xc22535, 0, 64 * 1024,  32, SECT_4K) },
+	{ "mx25u6435f",  INFO(0xc22537, 0, 64 * 1024, 128, SECT_4K) },
+	{ "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) },
+	{ "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) },
+	{ "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{ "mx25u25635f", INFO(0xc22539, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_4B_OPCODES) },
+	{ "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, 0) },
+	{ "mx66l51235l", INFO(0xc2201a, 0, 64 * 1024, 1024, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
+	{ "mx66u51235f", INFO(0xc2253a, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
+	{ "mx66l1g45g",  INFO(0xc2201b, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{ "mx25l1633e",	 INFO(0xc22415, 0, 64 * 1024,   32, SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES | SECT_4K) },
+#endif
+
+#ifdef CONFIG_SPI_FLASH_STMICRO		/* STMICRO */
+	/* Micron */
+	{ "n25q016a",	 INFO(0x20bb15, 0, 64 * 1024,   32, SECT_4K | SPI_NOR_QUAD_READ) },
+	{ "n25q032",	 INFO(0x20ba16, 0, 64 * 1024,   64, SPI_NOR_QUAD_READ) },
+	{ "n25q032a",	 INFO(0x20bb16, 0, 64 * 1024,   64, SPI_NOR_QUAD_READ) },
+	{ "n25q064",     INFO(0x20ba17, 0, 64 * 1024,  128, SECT_4K | SPI_NOR_QUAD_READ) },
+	{ "n25q064a",    INFO(0x20bb17, 0, 64 * 1024,  128, SECT_4K | SPI_NOR_QUAD_READ) },
+	{ "n25q128a11",  INFO(0x20bb18, 0, 64 * 1024,  256, SECT_4K | SPI_NOR_QUAD_READ) },
+	{ "n25q128a13",  INFO(0x20ba18, 0, 64 * 1024,  256, SECT_4K | SPI_NOR_QUAD_READ) },
+	{ "n25q256a",    INFO(0x20ba19, 0, 64 * 1024,  512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{ "n25q256ax1",  INFO(0x20bb19, 0, 64 * 1024,  512, SECT_4K | SPI_NOR_QUAD_READ) },
+	{ "n25q512a",    INFO(0x20bb20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
+	{ "n25q512ax3",  INFO(0x20ba20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
+	{ "n25q00",      INFO(0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
+	{ "n25q00a",     INFO(0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
+	{ "mt25qu02g",   INFO(0x20bb22, 0, 64 * 1024, 4096, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
+#endif
+#ifdef CONFIG_SPI_FLASH_SPANSION	/* SPANSION */
+	/* Spansion/Cypress -- single (large) sector size only, at least
+	 * for the chips listed here (without boot sectors).
+	 */
+	{ "s25sl032p",  INFO(0x010215, 0x4d00,  64 * 1024,  64, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{ "s25sl064p",  INFO(0x010216, 0x4d00,  64 * 1024, 128, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{ "s25fl256s0", INFO(0x010219, 0x4d00, 256 * 1024, 128, USE_CLSR) },
+	{ "s25fl256s1", INFO(0x010219, 0x4d01,  64 * 1024, 512, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
+	{ "s25fl512s",  INFO6(0x010220, 0x4d0081, 256 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
+	{ "s25fl512s_256k",  INFO(0x010220, 0x4d00, 256 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
+	{ "s25fl512s_64k",  INFO(0x010220, 0x4d01, 64 * 1024, 1024, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
+	{ "s25fl512s_512k",  INFO(0x010220, 0x4f00, 256 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
+	{ "s25sl12800", INFO(0x012018, 0x0300, 256 * 1024,  64, 0) },
+	{ "s25sl12801", INFO(0x012018, 0x0301,  64 * 1024, 256, 0) },
+	{ "s25fl128s",  INFO6(0x012018, 0x4d0180, 64 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
+	{ "s25fl129p0", INFO(0x012018, 0x4d00, 256 * 1024,  64, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
+	{ "s25fl129p1", INFO(0x012018, 0x4d01,  64 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
+	{ "s25sl008a",  INFO(0x010213,      0,  64 * 1024,  16, 0) },
+	{ "s25sl016a",  INFO(0x010214,      0,  64 * 1024,  32, 0) },
+	{ "s25sl032a",  INFO(0x010215,      0,  64 * 1024,  64, 0) },
+	{ "s25sl064a",  INFO(0x010216,      0,  64 * 1024, 128, 0) },
+	{ "s25fl116k",  INFO(0x014015,      0,  64 * 1024,  32, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{ "s25fl164k",  INFO(0x014017,      0,  64 * 1024, 128, SECT_4K) },
+	{ "s25fl208k",  INFO(0x014014,      0,  64 * 1024,  16, SECT_4K | SPI_NOR_DUAL_READ) },
+	{ "s25fl128l",  INFO(0x016018,      0,  64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
+#endif
+#ifdef CONFIG_SPI_FLASH_SST		/* SST */
+	/* SST -- large erase sizes are "overlays", "sectors" are 4K */
+	{ "sst25vf040b", INFO(0xbf258d, 0, 64 * 1024,  8, SECT_4K | SST_WRITE) },
+	{ "sst25vf080b", INFO(0xbf258e, 0, 64 * 1024, 16, SECT_4K | SST_WRITE) },
+	{ "sst25vf016b", INFO(0xbf2541, 0, 64 * 1024, 32, SECT_4K | SST_WRITE) },
+	{ "sst25vf032b", INFO(0xbf254a, 0, 64 * 1024, 64, SECT_4K | SST_WRITE) },
+	{ "sst25vf064c", INFO(0xbf254b, 0, 64 * 1024, 128, SECT_4K) },
+	{ "sst25wf512",  INFO(0xbf2501, 0, 64 * 1024,  1, SECT_4K | SST_WRITE) },
+	{ "sst25wf010",  INFO(0xbf2502, 0, 64 * 1024,  2, SECT_4K | SST_WRITE) },
+	{ "sst25wf020",  INFO(0xbf2503, 0, 64 * 1024,  4, SECT_4K | SST_WRITE) },
+	{ "sst25wf020a", INFO(0x621612, 0, 64 * 1024,  4, SECT_4K) },
+	{ "sst25wf040b", INFO(0x621613, 0, 64 * 1024,  8, SECT_4K) },
+	{ "sst25wf040",  INFO(0xbf2504, 0, 64 * 1024,  8, SECT_4K | SST_WRITE) },
+	{ "sst25wf080",  INFO(0xbf2505, 0, 64 * 1024, 16, SECT_4K | SST_WRITE) },
+	{ "sst26vf064b", INFO(0xbf2643, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{ "sst26wf016",  INFO(0xbf2651, 0, 64 * 1024,  32, SECT_4K) },
+	{ "sst26wf032",	 INFO(0xbf2622, 0, 64 * 1024,  64, SECT_4K) },
+	{ "sst26wf064",	 INFO(0xbf2643, 0, 64 * 1024, 128, SECT_4K) },
+#endif
+#ifdef CONFIG_SPI_FLASH_STMICRO		/* STMICRO */
+	/* ST Microelectronics -- newer production may have feature updates */
+	{ "m25p10",  INFO(0x202011,  0,  32 * 1024,   4, 0) },
+	{ "m25p20",  INFO(0x202012,  0,  64 * 1024,   4, 0) },
+	{ "m25p40",  INFO(0x202013,  0,  64 * 1024,   8, 0) },
+	{ "m25p80",  INFO(0x202014,  0,  64 * 1024,  16, 0) },
+	{ "m25p16",  INFO(0x202015,  0,  64 * 1024,  32, 0) },
+	{ "m25p32",  INFO(0x202016,  0,  64 * 1024,  64, 0) },
+	{ "m25p64",  INFO(0x202017,  0,  64 * 1024, 128, 0) },
+	{ "m25p128", INFO(0x202018,  0, 256 * 1024,  64, 0) },
+	{ "m25pe16", INFO(0x208015,  0, 64 * 1024, 32, SECT_4K) },
+	{ "m25px16",    INFO(0x207115,  0, 64 * 1024, 32, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{ "m25px64",    INFO(0x207117,  0, 64 * 1024, 128, 0) },
+#endif
+#ifdef CONFIG_SPI_FLASH_WINBOND		/* WINBOND */
+	/* Winbond -- w25x "blocks" are 64K, "sectors" are 4KiB */
+	{ "w25x05", INFO(0xef3010, 0, 64 * 1024,  1,  SECT_4K) },
+	{ "w25x10", INFO(0xef3011, 0, 64 * 1024,  2,  SECT_4K) },
+	{ "w25x20", INFO(0xef3012, 0, 64 * 1024,  4,  SECT_4K) },
+	{ "w25x40", INFO(0xef3013, 0, 64 * 1024,  8,  SECT_4K) },
+	{ "w25x80", INFO(0xef3014, 0, 64 * 1024,  16, SECT_4K) },
+	{ "w25x16", INFO(0xef3015, 0, 64 * 1024,  32, SECT_4K) },
+	{
+		"w25q16dw", INFO(0xef6015, 0, 64 * 1024,  32,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+	},
+	{ "w25x32", INFO(0xef3016, 0, 64 * 1024,  64, SECT_4K) },
+	{ "w25q20cl", INFO(0xef4012, 0, 64 * 1024,  4, SECT_4K) },
+	{ "w25q20bw", INFO(0xef5012, 0, 64 * 1024,  4, SECT_4K) },
+	{ "w25q20ew", INFO(0xef6012, 0, 64 * 1024,  4, SECT_4K) },
+	{ "w25q32", INFO(0xef4016, 0, 64 * 1024,  64, SECT_4K) },
+	{
+		"w25q32dw", INFO(0xef6016, 0, 64 * 1024,  64,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+	},
+	{
+		"w25q32jv", INFO(0xef7016, 0, 64 * 1024,  64,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+	},
+	{ "w25x64", INFO(0xef3017, 0, 64 * 1024, 128, SECT_4K) },
+	{ "w25q64", INFO(0xef4017, 0, 64 * 1024, 128, SECT_4K) },
+	{
+		"w25q64dw", INFO(0xef6017, 0, 64 * 1024, 128,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+	},
+	{
+		"w25q128fw", INFO(0xef6018, 0, 64 * 1024, 256,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+	},
+	{ "w25q80", INFO(0xef5014, 0, 64 * 1024,  16, SECT_4K) },
+	{ "w25q80bl", INFO(0xef4014, 0, 64 * 1024,  16, SECT_4K) },
+	{ "w25q128", INFO(0xef4018, 0, 64 * 1024, 256, SECT_4K) },
+	{ "w25q256", INFO(0xef4019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{ "w25m512jv", INFO(0xef7119, 0, 64 * 1024, 1024,
+			SECT_4K | SPI_NOR_QUAD_READ | SPI_NOR_DUAL_READ) },
+#endif
+#ifdef CONFIG_SPI_FLASH_XMC
+	/* XMC (Wuhan Xinxin Semiconductor Manufacturing Corp.) */
+	{ "XM25QH64A", INFO(0x207017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{ "XM25QH128A", INFO(0x207018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+#endif
+	{ },
+};
+
+static const struct flash_info *spi_nor_read_id(struct spi_nor *nor)
+{
+	int			tmp;
+	u8			id[SPI_NOR_MAX_ID_LEN];
+	const struct flash_info	*info;
+
+	if (!ARRAY_SIZE(spi_nor_ids))
+		return ERR_PTR(-ENODEV);
+
+	tmp = nor->read_reg(nor, SPINOR_OP_RDID, id, SPI_NOR_MAX_ID_LEN);
+	if (tmp < 0) {
+		dev_dbg(nor->dev, "error %d reading JEDEC ID\n", tmp);
+		return ERR_PTR(tmp);
+	}
+
+	for (tmp = 0; tmp < ARRAY_SIZE(spi_nor_ids) - 1; tmp++) {
+		info = &spi_nor_ids[tmp];
+		if (info->id_len) {
+			if (!memcmp(info->id, id, info->id_len))
+				return &spi_nor_ids[tmp];
+		}
+	}
+	dev_err(nor->dev, "unrecognized JEDEC id bytes: %02x, %02x, %02x\n",
+		id[0], id[1], id[2]);
+	return ERR_PTR(-ENODEV);
+}
+
+static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len,
+			size_t *retlen, u_char *buf)
+{
+	struct spi_nor *nor = mtd_to_spi_nor(mtd);
+	int ret;
+
+	dev_dbg(nor->dev, "from 0x%08x, len %zd\n", (u32)from, len);
+
+	while (len) {
+		loff_t addr = from;
+
+		ret = nor->read(nor, addr, len, buf);
+		if (ret == 0) {
+			/* We shouldn't see 0-length reads */
+			ret = -EIO;
+			goto read_err;
+		}
+		if (ret < 0)
+			goto read_err;
+
+		*retlen += ret;
+		buf += ret;
+		from += ret;
+		len -= ret;
+	}
+	ret = 0;
+
+read_err:
+	return ret;
+}
+
+#ifdef CONFIG_SPI_FLASH_SST
+static int sst_write(struct mtd_info *mtd, loff_t to, size_t len,
+		     size_t *retlen, const u_char *buf)
+{
+	struct spi_nor *nor = mtd_to_spi_nor(mtd);
+	size_t actual;
+	int ret;
+
+	dev_dbg(nor->dev, "to 0x%08x, len %zd\n", (u32)to, len);
+
+	write_enable(nor);
+
+	nor->sst_write_second = false;
+
+	actual = to % 2;
+	/* Start write from odd address. */
+	if (actual) {
+		nor->program_opcode = SPINOR_OP_BP;
+
+		/* write one byte. */
+		ret = nor->write(nor, to, 1, buf);
+		if (ret < 0)
+			goto sst_write_err;
+		ret = spi_nor_wait_till_ready(nor);
+		if (ret)
+			goto sst_write_err;
+	}
+	to += actual;
+
+	/* Write out most of the data here. */
+	for (; actual < len - 1; actual += 2) {
+		nor->program_opcode = SPINOR_OP_AAI_WP;
+
+		/* write two bytes. */
+		ret = nor->write(nor, to, 2, buf + actual);
+		if (ret < 0)
+			goto sst_write_err;
+		ret = spi_nor_wait_till_ready(nor);
+		if (ret)
+			goto sst_write_err;
+		to += 2;
+		nor->sst_write_second = true;
+	}
+	nor->sst_write_second = false;
+
+	write_disable(nor);
+	ret = spi_nor_wait_till_ready(nor);
+	if (ret)
+		goto sst_write_err;
+
+	/* Write out trailing byte if it exists. */
+	if (actual != len) {
+		write_enable(nor);
+
+		nor->program_opcode = SPINOR_OP_BP;
+		ret = nor->write(nor, to, 1, buf + actual);
+		if (ret < 0)
+			goto sst_write_err;
+		ret = spi_nor_wait_till_ready(nor);
+		if (ret)
+			goto sst_write_err;
+		write_disable(nor);
+		actual += 1;
+	}
+sst_write_err:
+	*retlen += actual;
+	return ret;
+}
+#endif
+/*
+ * Write an address range to the nor chip.  Data must be written in
+ * FLASH_PAGESIZE chunks.  The address range may be any size provided
+ * it is within the physical boundaries.
+ */
+static int spi_nor_write(struct mtd_info *mtd, loff_t to, size_t len,
+	size_t *retlen, const u_char *buf)
+{
+	struct spi_nor *nor = mtd_to_spi_nor(mtd);
+	size_t page_offset, page_remain, i;
+	ssize_t ret;
+
+	dev_dbg(nor->dev, "to 0x%08x, len %zd\n", (u32)to, len);
+
+	for (i = 0; i < len; ) {
+		ssize_t written;
+		loff_t addr = to + i;
+
+		/*
+		 * If page_size is a power of two, the offset can be quickly
+		 * calculated with an AND operation. On the other cases we
+		 * need to do a modulus operation (more expensive).
+		 * Power of two numbers have only one bit set and we can use
+		 * the instruction hweight32 to detect if we need to do a
+		 * modulus (do_div()) or not.
+		 */
+		if (hweight32(nor->page_size) == 1) {
+			page_offset = addr & (nor->page_size - 1);
+		} else {
+			u64 aux = addr;
+
+			page_offset = do_div(aux, nor->page_size);
+		}
+		/* the size of data remaining on the first page */
+		page_remain = min_t(size_t,
+				    nor->page_size - page_offset, len - i);
+
+		write_enable(nor);
+		ret = nor->write(nor, addr, page_remain, buf + i);
+		if (ret < 0)
+			goto write_err;
+		written = ret;
+
+		ret = spi_nor_wait_till_ready(nor);
+		if (ret)
+			goto write_err;
+		*retlen += written;
+		i += written;
+		if (written != page_remain) {
+			ret = -EIO;
+			goto write_err;
+		}
+	}
+
+write_err:
+	return ret;
+}
+
+#ifdef CONFIG_SPI_FLASH_MACRONIX
+/**
+ * macronix_quad_enable() - set QE bit in Status Register.
+ * @nor:	pointer to a 'struct spi_nor'
+ *
+ * Set the Quad Enable (QE) bit in the Status Register.
+ *
+ * bit 6 of the Status Register is the QE bit for Macronix like QSPI memories.
+ *
+ * Return: 0 on success, -errno otherwise.
+ */
+static int macronix_quad_enable(struct spi_nor *nor)
+{
+	int ret, val;
+
+	val = read_sr(nor);
+	if (val < 0)
+		return val;
+	if (val & SR_QUAD_EN_MX)
+		return 0;
+
+	write_enable(nor);
+
+	write_sr(nor, val | SR_QUAD_EN_MX);
+
+	ret = spi_nor_wait_till_ready(nor);
+	if (ret)
+		return ret;
+
+	ret = read_sr(nor);
+	if (!(ret > 0 && (ret & SR_QUAD_EN_MX))) {
+		dev_err(nor->dev, "Macronix Quad bit not set\n");
+		return -EINVAL;
+	}
+
+	return 0;
+}
+#endif
+
+#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
+/*
+ * Write status Register and configuration register with 2 bytes
+ * The first byte will be written to the status register, while the
+ * second byte will be written to the configuration register.
+ * Return negative if error occurred.
+ */
+static int write_sr_cr(struct spi_nor *nor, u8 *sr_cr)
+{
+	int ret;
+
+	write_enable(nor);
+
+	ret = nor->write_reg(nor, SPINOR_OP_WRSR, sr_cr, 2);
+	if (ret < 0) {
+		dev_dbg(nor->dev,
+			"error while writing configuration register\n");
+		return -EINVAL;
+	}
+
+	ret = spi_nor_wait_till_ready(nor);
+	if (ret) {
+		dev_dbg(nor->dev,
+			"timeout while writing configuration register\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+/**
+ * spansion_read_cr_quad_enable() - set QE bit in Configuration Register.
+ * @nor:	pointer to a 'struct spi_nor'
+ *
+ * Set the Quad Enable (QE) bit in the Configuration Register.
+ * This function should be used with QSPI memories supporting the Read
+ * Configuration Register (35h) instruction.
+ *
+ * bit 1 of the Configuration Register is the QE bit for Spansion like QSPI
+ * memories.
+ *
+ * Return: 0 on success, -errno otherwise.
+ */
+static int spansion_read_cr_quad_enable(struct spi_nor *nor)
+{
+	u8 sr_cr[2];
+	int ret;
+
+	/* Check current Quad Enable bit value. */
+	ret = read_cr(nor);
+	if (ret < 0) {
+		dev_dbg(dev, "error while reading configuration register\n");
+		return -EINVAL;
+	}
+
+	if (ret & CR_QUAD_EN_SPAN)
+		return 0;
+
+	sr_cr[1] = ret | CR_QUAD_EN_SPAN;
+
+	/* Keep the current value of the Status Register. */
+	ret = read_sr(nor);
+	if (ret < 0) {
+		dev_dbg(dev, "error while reading status register\n");
+		return -EINVAL;
+	}
+	sr_cr[0] = ret;
+
+	ret = write_sr_cr(nor, sr_cr);
+	if (ret)
+		return ret;
+
+	/* Read back and check it. */
+	ret = read_cr(nor);
+	if (!(ret > 0 && (ret & CR_QUAD_EN_SPAN))) {
+		dev_dbg(nor->dev, "Spansion Quad bit not set\n");
+		return -EINVAL;
+	}
+
+	return 0;
+}
+#endif /* CONFIG_SPI_FLASH_SPANSION */
+
+struct spi_nor_read_command {
+	u8			num_mode_clocks;
+	u8			num_wait_states;
+	u8			opcode;
+	enum spi_nor_protocol	proto;
+};
+
+struct spi_nor_pp_command {
+	u8			opcode;
+	enum spi_nor_protocol	proto;
+};
+
+enum spi_nor_read_command_index {
+	SNOR_CMD_READ,
+	SNOR_CMD_READ_FAST,
+	SNOR_CMD_READ_1_1_1_DTR,
+
+	/* Dual SPI */
+	SNOR_CMD_READ_1_1_2,
+	SNOR_CMD_READ_1_2_2,
+	SNOR_CMD_READ_2_2_2,
+	SNOR_CMD_READ_1_2_2_DTR,
+
+	/* Quad SPI */
+	SNOR_CMD_READ_1_1_4,
+	SNOR_CMD_READ_1_4_4,
+	SNOR_CMD_READ_4_4_4,
+	SNOR_CMD_READ_1_4_4_DTR,
+
+	/* Octo SPI */
+	SNOR_CMD_READ_1_1_8,
+	SNOR_CMD_READ_1_8_8,
+	SNOR_CMD_READ_8_8_8,
+	SNOR_CMD_READ_1_8_8_DTR,
+
+	SNOR_CMD_READ_MAX
+};
+
+enum spi_nor_pp_command_index {
+	SNOR_CMD_PP,
+
+	/* Quad SPI */
+	SNOR_CMD_PP_1_1_4,
+	SNOR_CMD_PP_1_4_4,
+	SNOR_CMD_PP_4_4_4,
+
+	/* Octo SPI */
+	SNOR_CMD_PP_1_1_8,
+	SNOR_CMD_PP_1_8_8,
+	SNOR_CMD_PP_8_8_8,
+
+	SNOR_CMD_PP_MAX
+};
+
+struct spi_nor_flash_parameter {
+	u64				size;
+	u32				page_size;
+
+	struct spi_nor_hwcaps		hwcaps;
+	struct spi_nor_read_command	reads[SNOR_CMD_READ_MAX];
+	struct spi_nor_pp_command	page_programs[SNOR_CMD_PP_MAX];
+
+	int (*quad_enable)(struct spi_nor *nor);
+};
+
+static void
+spi_nor_set_read_settings(struct spi_nor_read_command *read,
+			  u8 num_mode_clocks,
+			  u8 num_wait_states,
+			  u8 opcode,
+			  enum spi_nor_protocol proto)
+{
+	read->num_mode_clocks = num_mode_clocks;
+	read->num_wait_states = num_wait_states;
+	read->opcode = opcode;
+	read->proto = proto;
+}
+
+static void
+spi_nor_set_pp_settings(struct spi_nor_pp_command *pp,
+			u8 opcode,
+			enum spi_nor_protocol proto)
+{
+	pp->opcode = opcode;
+	pp->proto = proto;
+}
+
+static int spi_nor_init_params(struct spi_nor *nor,
+			       const struct flash_info *info,
+			       struct spi_nor_flash_parameter *params)
+{
+	/* Set legacy flash parameters as default. */
+	memset(params, 0, sizeof(*params));
+
+	/* Set SPI NOR sizes. */
+	params->size = info->sector_size * info->n_sectors;
+	params->page_size = info->page_size;
+
+	/* (Fast) Read settings. */
+	params->hwcaps.mask |= SNOR_HWCAPS_READ;
+	spi_nor_set_read_settings(&params->reads[SNOR_CMD_READ],
+				  0, 0, SPINOR_OP_READ,
+				  SNOR_PROTO_1_1_1);
+
+	if (!(info->flags & SPI_NOR_NO_FR)) {
+		params->hwcaps.mask |= SNOR_HWCAPS_READ_FAST;
+		spi_nor_set_read_settings(&params->reads[SNOR_CMD_READ_FAST],
+					  0, 8, SPINOR_OP_READ_FAST,
+					  SNOR_PROTO_1_1_1);
+	}
+
+	if (info->flags & SPI_NOR_DUAL_READ) {
+		params->hwcaps.mask |= SNOR_HWCAPS_READ_1_1_2;
+		spi_nor_set_read_settings(&params->reads[SNOR_CMD_READ_1_1_2],
+					  0, 8, SPINOR_OP_READ_1_1_2,
+					  SNOR_PROTO_1_1_2);
+	}
+
+	if (info->flags & SPI_NOR_QUAD_READ) {
+		params->hwcaps.mask |= SNOR_HWCAPS_READ_1_1_4;
+		spi_nor_set_read_settings(&params->reads[SNOR_CMD_READ_1_1_4],
+					  0, 8, SPINOR_OP_READ_1_1_4,
+					  SNOR_PROTO_1_1_4);
+	}
+
+	/* Page Program settings. */
+	params->hwcaps.mask |= SNOR_HWCAPS_PP;
+	spi_nor_set_pp_settings(&params->page_programs[SNOR_CMD_PP],
+				SPINOR_OP_PP, SNOR_PROTO_1_1_1);
+
+	if (info->flags & SPI_NOR_QUAD_READ) {
+		params->hwcaps.mask |= SNOR_HWCAPS_PP_1_1_4;
+		spi_nor_set_pp_settings(&params->page_programs[SNOR_CMD_PP_1_1_4],
+					SPINOR_OP_PP_1_1_4, SNOR_PROTO_1_1_4);
+	}
+
+	/* Select the procedure to set the Quad Enable bit. */
+	if (params->hwcaps.mask & (SNOR_HWCAPS_READ_QUAD |
+				   SNOR_HWCAPS_PP_QUAD)) {
+		switch (JEDEC_MFR(info)) {
+#ifdef CONFIG_SPI_FLASH_MACRONIX
+		case SNOR_MFR_MACRONIX:
+			params->quad_enable = macronix_quad_enable;
+			break;
+#endif
+		case SNOR_MFR_ST:
+		case SNOR_MFR_MICRON:
+			break;
+
+		default:
+#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
+			/* Kept only for backward compatibility purpose. */
+			params->quad_enable = spansion_read_cr_quad_enable;
+#endif
+			break;
+		}
+	}
+}
+
+static int spi_nor_hwcaps2cmd(u32 hwcaps, const int table[][2], size_t size)
+{
+	size_t i;
+
+	for (i = 0; i < size; i++)
+		if (table[i][0] == (int)hwcaps)
+			return table[i][1];
+
+	return -EINVAL;
+}
+
+static int spi_nor_hwcaps_read2cmd(u32 hwcaps)
+{
+	static const int hwcaps_read2cmd[][2] = {
+		{ SNOR_HWCAPS_READ,		SNOR_CMD_READ },
+		{ SNOR_HWCAPS_READ_FAST,	SNOR_CMD_READ_FAST },
+		{ SNOR_HWCAPS_READ_1_1_1_DTR,	SNOR_CMD_READ_1_1_1_DTR },
+		{ SNOR_HWCAPS_READ_1_1_2,	SNOR_CMD_READ_1_1_2 },
+		{ SNOR_HWCAPS_READ_1_2_2,	SNOR_CMD_READ_1_2_2 },
+		{ SNOR_HWCAPS_READ_2_2_2,	SNOR_CMD_READ_2_2_2 },
+		{ SNOR_HWCAPS_READ_1_2_2_DTR,	SNOR_CMD_READ_1_2_2_DTR },
+		{ SNOR_HWCAPS_READ_1_1_4,	SNOR_CMD_READ_1_1_4 },
+		{ SNOR_HWCAPS_READ_1_4_4,	SNOR_CMD_READ_1_4_4 },
+		{ SNOR_HWCAPS_READ_4_4_4,	SNOR_CMD_READ_4_4_4 },
+		{ SNOR_HWCAPS_READ_1_4_4_DTR,	SNOR_CMD_READ_1_4_4_DTR },
+		{ SNOR_HWCAPS_READ_1_1_8,	SNOR_CMD_READ_1_1_8 },
+		{ SNOR_HWCAPS_READ_1_8_8,	SNOR_CMD_READ_1_8_8 },
+		{ SNOR_HWCAPS_READ_8_8_8,	SNOR_CMD_READ_8_8_8 },
+		{ SNOR_HWCAPS_READ_1_8_8_DTR,	SNOR_CMD_READ_1_8_8_DTR },
+	};
+
+	return spi_nor_hwcaps2cmd(hwcaps, hwcaps_read2cmd,
+				  ARRAY_SIZE(hwcaps_read2cmd));
+}
+
+static int spi_nor_hwcaps_pp2cmd(u32 hwcaps)
+{
+	static const int hwcaps_pp2cmd[][2] = {
+		{ SNOR_HWCAPS_PP,		SNOR_CMD_PP },
+		{ SNOR_HWCAPS_PP_1_1_4,		SNOR_CMD_PP_1_1_4 },
+		{ SNOR_HWCAPS_PP_1_4_4,		SNOR_CMD_PP_1_4_4 },
+		{ SNOR_HWCAPS_PP_4_4_4,		SNOR_CMD_PP_4_4_4 },
+		{ SNOR_HWCAPS_PP_1_1_8,		SNOR_CMD_PP_1_1_8 },
+		{ SNOR_HWCAPS_PP_1_8_8,		SNOR_CMD_PP_1_8_8 },
+		{ SNOR_HWCAPS_PP_8_8_8,		SNOR_CMD_PP_8_8_8 },
+	};
+
+	return spi_nor_hwcaps2cmd(hwcaps, hwcaps_pp2cmd,
+				  ARRAY_SIZE(hwcaps_pp2cmd));
+}
+
+static int spi_nor_select_read(struct spi_nor *nor,
+			       const struct spi_nor_flash_parameter *params,
+			       u32 shared_hwcaps)
+{
+	int cmd, best_match = fls(shared_hwcaps & SNOR_HWCAPS_READ_MASK) - 1;
+	const struct spi_nor_read_command *read;
+
+	if (best_match < 0)
+		return -EINVAL;
+
+	cmd = spi_nor_hwcaps_read2cmd(BIT(best_match));
+	if (cmd < 0)
+		return -EINVAL;
+
+	read = &params->reads[cmd];
+	nor->read_opcode = read->opcode;
+	nor->read_proto = read->proto;
+
+	/*
+	 * In the spi-nor framework, we don't need to make the difference
+	 * between mode clock cycles and wait state clock cycles.
+	 * Indeed, the value of the mode clock cycles is used by a QSPI
+	 * flash memory to know whether it should enter or leave its 0-4-4
+	 * (Continuous Read / XIP) mode.
+	 * eXecution In Place is out of the scope of the mtd sub-system.
+	 * Hence we choose to merge both mode and wait state clock cycles
+	 * into the so called dummy clock cycles.
+	 */
+	nor->read_dummy = read->num_mode_clocks + read->num_wait_states;
+	return 0;
+}
+
+static int spi_nor_select_pp(struct spi_nor *nor,
+			     const struct spi_nor_flash_parameter *params,
+			     u32 shared_hwcaps)
+{
+	int cmd, best_match = fls(shared_hwcaps & SNOR_HWCAPS_PP_MASK) - 1;
+	const struct spi_nor_pp_command *pp;
+
+	if (best_match < 0)
+		return -EINVAL;
+
+	cmd = spi_nor_hwcaps_pp2cmd(BIT(best_match));
+	if (cmd < 0)
+		return -EINVAL;
+
+	pp = &params->page_programs[cmd];
+	nor->program_opcode = pp->opcode;
+	nor->write_proto = pp->proto;
+	return 0;
+}
+
+static int spi_nor_select_erase(struct spi_nor *nor,
+				const struct flash_info *info)
+{
+	struct mtd_info *mtd = &nor->mtd;
+
+#ifdef CONFIG_SPI_FLASH_USE_4K_SECTORS
+	/* prefer "small sector" erase if possible */
+	if (info->flags & SECT_4K) {
+		nor->erase_opcode = SPINOR_OP_BE_4K;
+		mtd->erasesize = 4096;
+	} else if (info->flags & SECT_4K_PMC) {
+		nor->erase_opcode = SPINOR_OP_BE_4K_PMC;
+		mtd->erasesize = 4096;
+	} else
+#endif
+	{
+		nor->erase_opcode = SPINOR_OP_SE;
+		mtd->erasesize = info->sector_size;
+	}
+	return 0;
+}
+
+static int spi_nor_setup(struct spi_nor *nor, const struct flash_info *info,
+			 const struct spi_nor_flash_parameter *params,
+			 const struct spi_nor_hwcaps *hwcaps)
+{
+	u32 ignored_mask, shared_mask;
+	bool enable_quad_io;
+	int err;
+
+	/*
+	 * Keep only the hardware capabilities supported by both the SPI
+	 * controller and the SPI flash memory.
+	 */
+	shared_mask = hwcaps->mask & params->hwcaps.mask;
+
+	/* SPI n-n-n protocols are not supported yet. */
+	ignored_mask = (SNOR_HWCAPS_READ_2_2_2 |
+			SNOR_HWCAPS_READ_4_4_4 |
+			SNOR_HWCAPS_READ_8_8_8 |
+			SNOR_HWCAPS_PP_4_4_4 |
+			SNOR_HWCAPS_PP_8_8_8);
+	if (shared_mask & ignored_mask) {
+		dev_dbg(nor->dev,
+			"SPI n-n-n protocols are not supported yet.\n");
+		shared_mask &= ~ignored_mask;
+	}
+
+	/* Select the (Fast) Read command. */
+	err = spi_nor_select_read(nor, params, shared_mask);
+	if (err) {
+		dev_dbg(nor->dev,
+			"can't select read settings supported by both the SPI controller and memory.\n");
+		return err;
+	}
+
+	/* Select the Page Program command. */
+	err = spi_nor_select_pp(nor, params, shared_mask);
+	if (err) {
+		dev_dbg(nor->dev,
+			"can't select write settings supported by both the SPI controller and memory.\n");
+		return err;
+	}
+
+	/* Select the Sector Erase command. */
+	err = spi_nor_select_erase(nor, info);
+	if (err) {
+		dev_dbg(nor->dev,
+			"can't select erase settings supported by both the SPI controller and memory.\n");
+		return err;
+	}
+
+	/* Enable Quad I/O if needed. */
+	enable_quad_io = (spi_nor_get_protocol_width(nor->read_proto) == 4 ||
+			  spi_nor_get_protocol_width(nor->write_proto) == 4);
+	if (enable_quad_io && params->quad_enable)
+		nor->quad_enable = params->quad_enable;
+	else
+		nor->quad_enable = NULL;
+
+	return 0;
+}
+
+static int spi_nor_init(struct spi_nor *nor)
+{
+	int err;
+
+	/*
+	 * Atmel, SST, Intel/Numonyx, and others serial NOR tend to power up
+	 * with the software protection bits set
+	 */
+	if (JEDEC_MFR(nor->info) == SNOR_MFR_ATMEL ||
+	    JEDEC_MFR(nor->info) == SNOR_MFR_INTEL ||
+	    JEDEC_MFR(nor->info) == SNOR_MFR_SST ||
+	    nor->info->flags & SPI_NOR_HAS_LOCK) {
+		write_enable(nor);
+		write_sr(nor, 0);
+		spi_nor_wait_till_ready(nor);
+	}
+
+	if (nor->quad_enable) {
+		err = nor->quad_enable(nor);
+		if (err) {
+			dev_dbg(nor->dev, "quad mode not supported\n");
+			return err;
+		}
+	}
+
+	return 0;
+}
+
+int spi_nor_scan(struct spi_nor *nor)
+{
+	struct spi_nor_flash_parameter params;
+	const struct flash_info *info = NULL;
+	struct mtd_info *mtd = &nor->mtd;
+	struct spi_nor_hwcaps hwcaps = {
+		.mask = SNOR_HWCAPS_READ |
+			SNOR_HWCAPS_READ_FAST |
+			SNOR_HWCAPS_PP,
+	};
+	struct spi_slave *spi = nor->spi;
+	int ret;
+
+	/* Reset SPI protocol for all commands. */
+	nor->reg_proto = SNOR_PROTO_1_1_1;
+	nor->read_proto = SNOR_PROTO_1_1_1;
+	nor->write_proto = SNOR_PROTO_1_1_1;
+	nor->read = spi_nor_read_data;
+	nor->write = spi_nor_write_data;
+	nor->read_reg = spi_nor_read_reg;
+	nor->write_reg = spi_nor_write_reg;
+
+	if (spi->mode & SPI_RX_QUAD) {
+		hwcaps.mask |= SNOR_HWCAPS_READ_1_1_4;
+
+		if (spi->mode & SPI_TX_QUAD)
+			hwcaps.mask |= (SNOR_HWCAPS_READ_1_4_4 |
+					SNOR_HWCAPS_PP_1_1_4 |
+					SNOR_HWCAPS_PP_1_4_4);
+	} else if (spi->mode & SPI_RX_DUAL) {
+		hwcaps.mask |= SNOR_HWCAPS_READ_1_1_2;
+
+		if (spi->mode & SPI_TX_DUAL)
+			hwcaps.mask |= SNOR_HWCAPS_READ_1_2_2;
+	}
+
+	info = spi_nor_read_id(nor);
+	if (IS_ERR_OR_NULL(info))
+		return -ENOENT;
+
+	ret = spi_nor_init_params(nor, info, &params);
+	if (ret)
+		return ret;
+
+	if (!mtd->name)
+		mtd->name = info->name;
+	mtd->priv = nor;
+	mtd->type = MTD_NORFLASH;
+	mtd->writesize = 1;
+	mtd->flags = MTD_CAP_NORFLASH;
+	mtd->size = params.size;
+	mtd->_erase = spi_nor_erase;
+	mtd->_read = spi_nor_read;
+
+#if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST)
+	/* NOR protection support for STmicro/Micron chips and similar */
+	if (JEDEC_MFR(info) == SNOR_MFR_ST ||
+	    JEDEC_MFR(info) == SNOR_MFR_MICRON ||
+	    JEDEC_MFR(info) == SNOR_MFR_SST ||
+			info->flags & SPI_NOR_HAS_LOCK) {
+		nor->flash_lock = stm_lock;
+		nor->flash_unlock = stm_unlock;
+		nor->flash_is_locked = stm_is_locked;
+	}
+#endif
+
+#ifdef CONFIG_SPI_FLASH_SST
+	/* sst nor chips use AAI word program */
+	if (info->flags & SST_WRITE)
+		mtd->_write = sst_write;
+	else
+#endif
+		mtd->_write = spi_nor_write;
+
+	if (info->flags & USE_FSR)
+		nor->flags |= SNOR_F_USE_FSR;
+	if (info->flags & SPI_NOR_HAS_TB)
+		nor->flags |= SNOR_F_HAS_SR_TB;
+	if (info->flags & NO_CHIP_ERASE)
+		nor->flags |= SNOR_F_NO_OP_CHIP_ERASE;
+	if (info->flags & USE_CLSR)
+		nor->flags |= SNOR_F_USE_CLSR;
+
+	if (info->flags & SPI_NOR_NO_ERASE)
+		mtd->flags |= MTD_NO_ERASE;
+
+	nor->page_size = params.page_size;
+	mtd->writebufsize = nor->page_size;
+
+	/* Some devices cannot do fast-read, no matter what DT tells us */
+	if ((info->flags & SPI_NOR_NO_FR) || (spi->mode & SPI_RX_SLOW))
+		params.hwcaps.mask &= ~SNOR_HWCAPS_READ_FAST;
+
+	/*
+	 * Configure the SPI memory:
+	 * - select op codes for (Fast) Read, Page Program and Sector Erase.
+	 * - set the number of dummy cycles (mode cycles + wait states).
+	 * - set the SPI protocols for register and memory accesses.
+	 * - set the Quad Enable bit if needed (required by SPI x-y-4 protos).
+	 */
+	ret = spi_nor_setup(nor, info, &params, &hwcaps);
+	if (ret)
+		return ret;
+
+	if (info->addr_width) {
+		nor->addr_width = info->addr_width;
+	} else {
+		nor->addr_width = 3;
+	}
+
+	if (nor->addr_width > SPI_NOR_MAX_ADDR_WIDTH) {
+		dev_dbg(dev, "address width is too large: %u\n",
+			nor->addr_width);
+		return -EINVAL;
+	}
+
+	/* Send all the required SPI flash commands to initialize device */
+	nor->info = info;
+	ret = spi_nor_init(nor);
+	if (ret)
+		return ret;
+
+	nor->name = mtd->name;
+	nor->size = mtd->size;
+	nor->erase_size = mtd->erasesize;
+	nor->sector_size = mtd->erasesize;
+
+#ifndef CONFIG_SPL_BUILD
+	printf("SF: Detected %s with page size ", nor->name);
+	print_size(nor->page_size, ", erase size ");
+	print_size(nor->erase_size, ", total ");
+	print_size(nor->size, "");
+	puts("\n");
+#endif
+
+	return 0;
+}
diff --git a/include/linux/mtd/cfi.h b/include/linux/mtd/cfi.h
new file mode 100644
index 0000000000..3555518bd3
--- /dev/null
+++ b/include/linux/mtd/cfi.h
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright © 2000-2010 David Woodhouse <dwmw2@infradead.org> et al.
+ *
+ */
+
+#ifndef __MTD_CFI_H__
+#define __MTD_CFI_H__
+
+#define CFI_MFR_ANY		0xFFFF
+#define CFI_ID_ANY		0xFFFF
+#define CFI_MFR_CONTINUATION	0x007F
+
+#define CFI_MFR_AMD		0x0001
+#define CFI_MFR_AMIC		0x0037
+#define CFI_MFR_ATMEL		0x001F
+#define CFI_MFR_EON		0x001C
+#define CFI_MFR_FUJITSU		0x0004
+#define CFI_MFR_HYUNDAI		0x00AD
+#define CFI_MFR_INTEL		0x0089
+#define CFI_MFR_MACRONIX	0x00C2
+#define CFI_MFR_NEC		0x0010
+#define CFI_MFR_PMC		0x009D
+#define CFI_MFR_SAMSUNG		0x00EC
+#define CFI_MFR_SHARP		0x00B0
+#define CFI_MFR_SST		0x00BF
+#define CFI_MFR_ST		0x0020 /* STMicroelectronics */
+#define CFI_MFR_MICRON		0x002C	/* Micron */
+#define CFI_MFR_TOSHIBA		0x0098
+#define CFI_MFR_WINBOND		0x00DA
+
+#endif /* __MTD_CFI_H__ */
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
new file mode 100644
index 0000000000..507458a760
--- /dev/null
+++ b/include/linux/mtd/spi-nor.h
@@ -0,0 +1,410 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2014 Freescale Semiconductor, Inc.
+ * Synced from Linux v4.19
+ */
+
+#ifndef __LINUX_MTD_SPI_NOR_H
+#define __LINUX_MTD_SPI_NOR_H
+
+#include <linux/bitops.h>
+#include <linux/mtd/cfi.h>
+#include <linux/mtd/mtd.h>
+
+/*
+ * Manufacturer IDs
+ *
+ * The first byte returned from the flash after sending opcode SPINOR_OP_RDID.
+ * Sometimes these are the same as CFI IDs, but sometimes they aren't.
+ */
+#define SNOR_MFR_ATMEL		CFI_MFR_ATMEL
+#define SNOR_MFR_GIGADEVICE	0xc8
+#define SNOR_MFR_INTEL		CFI_MFR_INTEL
+#define SNOR_MFR_ST		CFI_MFR_ST /* ST Micro <--> Micron */
+#define SNOR_MFR_MICRON		CFI_MFR_MICRON /* ST Micro <--> Micron */
+#define SNOR_MFR_MACRONIX	CFI_MFR_MACRONIX
+#define SNOR_MFR_SPANSION	CFI_MFR_AMD
+#define SNOR_MFR_SST		CFI_MFR_SST
+#define SNOR_MFR_WINBOND	0xef /* Also used by some Spansion */
+
+/*
+ * Note on opcode nomenclature: some opcodes have a format like
+ * SPINOR_OP_FUNCTION{4,}_x_y_z. The numbers x, y, and z stand for the number
+ * of I/O lines used for the opcode, address, and data (respectively). The
+ * FUNCTION has an optional suffix of '4', to represent an opcode which
+ * requires a 4-byte (32-bit) address.
+ */
+
+/* Flash opcodes. */
+#define SPINOR_OP_WREN		0x06	/* Write enable */
+#define SPINOR_OP_RDSR		0x05	/* Read status register */
+#define SPINOR_OP_WRSR		0x01	/* Write status register 1 byte */
+#define SPINOR_OP_RDSR2		0x3f	/* Read status register 2 */
+#define SPINOR_OP_WRSR2		0x3e	/* Write status register 2 */
+#define SPINOR_OP_READ		0x03	/* Read data bytes (low frequency) */
+#define SPINOR_OP_READ_FAST	0x0b	/* Read data bytes (high frequency) */
+#define SPINOR_OP_READ_1_1_2	0x3b	/* Read data bytes (Dual Output SPI) */
+#define SPINOR_OP_READ_1_2_2	0xbb	/* Read data bytes (Dual I/O SPI) */
+#define SPINOR_OP_READ_1_1_4	0x6b	/* Read data bytes (Quad Output SPI) */
+#define SPINOR_OP_READ_1_4_4	0xeb	/* Read data bytes (Quad I/O SPI) */
+#define SPINOR_OP_PP		0x02	/* Page program (up to 256 bytes) */
+#define SPINOR_OP_PP_1_1_4	0x32	/* Quad page program */
+#define SPINOR_OP_PP_1_4_4	0x38	/* Quad page program */
+#define SPINOR_OP_BE_4K		0x20	/* Erase 4KiB block */
+#define SPINOR_OP_BE_4K_PMC	0xd7	/* Erase 4KiB block on PMC chips */
+#define SPINOR_OP_BE_32K	0x52	/* Erase 32KiB block */
+#define SPINOR_OP_CHIP_ERASE	0xc7	/* Erase whole flash chip */
+#define SPINOR_OP_SE		0xd8	/* Sector erase (usually 64KiB) */
+#define SPINOR_OP_RDID		0x9f	/* Read JEDEC ID */
+#define SPINOR_OP_RDSFDP	0x5a	/* Read SFDP */
+#define SPINOR_OP_RDCR		0x35	/* Read configuration register */
+#define SPINOR_OP_RDFSR		0x70	/* Read flag status register */
+#define SPINOR_OP_CLFSR		0x50	/* Clear flag status register */
+#define SPINOR_OP_RDEAR		0xc8	/* Read Extended Address Register */
+#define SPINOR_OP_WREAR		0xc5	/* Write Extended Address Register */
+
+/* 4-byte address opcodes - used on Spansion and some Macronix flashes. */
+#define SPINOR_OP_READ_4B	0x13	/* Read data bytes (low frequency) */
+#define SPINOR_OP_READ_FAST_4B	0x0c	/* Read data bytes (high frequency) */
+#define SPINOR_OP_READ_1_1_2_4B	0x3c	/* Read data bytes (Dual Output SPI) */
+#define SPINOR_OP_READ_1_2_2_4B	0xbc	/* Read data bytes (Dual I/O SPI) */
+#define SPINOR_OP_READ_1_1_4_4B	0x6c	/* Read data bytes (Quad Output SPI) */
+#define SPINOR_OP_READ_1_4_4_4B	0xec	/* Read data bytes (Quad I/O SPI) */
+#define SPINOR_OP_PP_4B		0x12	/* Page program (up to 256 bytes) */
+#define SPINOR_OP_PP_1_1_4_4B	0x34	/* Quad page program */
+#define SPINOR_OP_PP_1_4_4_4B	0x3e	/* Quad page program */
+#define SPINOR_OP_BE_4K_4B	0x21	/* Erase 4KiB block */
+#define SPINOR_OP_BE_32K_4B	0x5c	/* Erase 32KiB block */
+#define SPINOR_OP_SE_4B		0xdc	/* Sector erase (usually 64KiB) */
+
+/* Double Transfer Rate opcodes - defined in JEDEC JESD216B. */
+#define SPINOR_OP_READ_1_1_1_DTR	0x0d
+#define SPINOR_OP_READ_1_2_2_DTR	0xbd
+#define SPINOR_OP_READ_1_4_4_DTR	0xed
+
+#define SPINOR_OP_READ_1_1_1_DTR_4B	0x0e
+#define SPINOR_OP_READ_1_2_2_DTR_4B	0xbe
+#define SPINOR_OP_READ_1_4_4_DTR_4B	0xee
+
+/* Used for SST flashes only. */
+#define SPINOR_OP_BP		0x02	/* Byte program */
+#define SPINOR_OP_WRDI		0x04	/* Write disable */
+#define SPINOR_OP_AAI_WP	0xad	/* Auto address increment word program */
+
+/* Used for S3AN flashes only */
+#define SPINOR_OP_XSE		0x50	/* Sector erase */
+#define SPINOR_OP_XPP		0x82	/* Page program */
+#define SPINOR_OP_XRDSR		0xd7	/* Read status register */
+
+#define XSR_PAGESIZE		BIT(0)	/* Page size in Po2 or Linear */
+#define XSR_RDY			BIT(7)	/* Ready */
+
+/* Used for Macronix and Winbond flashes. */
+#define SPINOR_OP_EN4B		0xb7	/* Enter 4-byte mode */
+#define SPINOR_OP_EX4B		0xe9	/* Exit 4-byte mode */
+
+/* Used for Spansion flashes only. */
+#define SPINOR_OP_BRWR		0x17	/* Bank register write */
+#define SPINOR_OP_CLSR		0x30	/* Clear status register 1 */
+
+/* Used for Micron flashes only. */
+#define SPINOR_OP_RD_EVCR      0x65    /* Read EVCR register */
+#define SPINOR_OP_WD_EVCR      0x61    /* Write EVCR register */
+
+/* Status Register bits. */
+#define SR_WIP			BIT(0)	/* Write in progress */
+#define SR_WEL			BIT(1)	/* Write enable latch */
+/* meaning of other SR_* bits may differ between vendors */
+#define SR_BP0			BIT(2)	/* Block protect 0 */
+#define SR_BP1			BIT(3)	/* Block protect 1 */
+#define SR_BP2			BIT(4)	/* Block protect 2 */
+#define SR_TB			BIT(5)	/* Top/Bottom protect */
+#define SR_SRWD			BIT(7)	/* SR write protect */
+/* Spansion/Cypress specific status bits */
+#define SR_E_ERR		BIT(5)
+#define SR_P_ERR		BIT(6)
+
+#define SR_QUAD_EN_MX		BIT(6)	/* Macronix Quad I/O */
+
+/* Enhanced Volatile Configuration Register bits */
+#define EVCR_QUAD_EN_MICRON	BIT(7)	/* Micron Quad I/O */
+
+/* Flag Status Register bits */
+#define FSR_READY		BIT(7)	/* Device status, 0 = Busy, 1 = Ready */
+#define FSR_E_ERR		BIT(5)	/* Erase operation status */
+#define FSR_P_ERR		BIT(4)	/* Program operation status */
+#define FSR_PT_ERR		BIT(1)	/* Protection error bit */
+
+/* Configuration Register bits. */
+#define CR_QUAD_EN_SPAN		BIT(1)	/* Spansion Quad I/O */
+
+/* Status Register 2 bits. */
+#define SR2_QUAD_EN_BIT7	BIT(7)
+
+/* Supported SPI protocols */
+#define SNOR_PROTO_INST_MASK	GENMASK(23, 16)
+#define SNOR_PROTO_INST_SHIFT	16
+#define SNOR_PROTO_INST(_nbits)	\
+	((((unsigned long)(_nbits)) << SNOR_PROTO_INST_SHIFT) & \
+	 SNOR_PROTO_INST_MASK)
+
+#define SNOR_PROTO_ADDR_MASK	GENMASK(15, 8)
+#define SNOR_PROTO_ADDR_SHIFT	8
+#define SNOR_PROTO_ADDR(_nbits)	\
+	((((unsigned long)(_nbits)) << SNOR_PROTO_ADDR_SHIFT) & \
+	 SNOR_PROTO_ADDR_MASK)
+
+#define SNOR_PROTO_DATA_MASK	GENMASK(7, 0)
+#define SNOR_PROTO_DATA_SHIFT	0
+#define SNOR_PROTO_DATA(_nbits)	\
+	((((unsigned long)(_nbits)) << SNOR_PROTO_DATA_SHIFT) & \
+	 SNOR_PROTO_DATA_MASK)
+
+#define SNOR_PROTO_IS_DTR	BIT(24)	/* Double Transfer Rate */
+
+#define SNOR_PROTO_STR(_inst_nbits, _addr_nbits, _data_nbits)	\
+	(SNOR_PROTO_INST(_inst_nbits) |				\
+	 SNOR_PROTO_ADDR(_addr_nbits) |				\
+	 SNOR_PROTO_DATA(_data_nbits))
+#define SNOR_PROTO_DTR(_inst_nbits, _addr_nbits, _data_nbits)	\
+	(SNOR_PROTO_IS_DTR |					\
+	 SNOR_PROTO_STR(_inst_nbits, _addr_nbits, _data_nbits))
+
+enum spi_nor_protocol {
+	SNOR_PROTO_1_1_1 = SNOR_PROTO_STR(1, 1, 1),
+	SNOR_PROTO_1_1_2 = SNOR_PROTO_STR(1, 1, 2),
+	SNOR_PROTO_1_1_4 = SNOR_PROTO_STR(1, 1, 4),
+	SNOR_PROTO_1_1_8 = SNOR_PROTO_STR(1, 1, 8),
+	SNOR_PROTO_1_2_2 = SNOR_PROTO_STR(1, 2, 2),
+	SNOR_PROTO_1_4_4 = SNOR_PROTO_STR(1, 4, 4),
+	SNOR_PROTO_1_8_8 = SNOR_PROTO_STR(1, 8, 8),
+	SNOR_PROTO_2_2_2 = SNOR_PROTO_STR(2, 2, 2),
+	SNOR_PROTO_4_4_4 = SNOR_PROTO_STR(4, 4, 4),
+	SNOR_PROTO_8_8_8 = SNOR_PROTO_STR(8, 8, 8),
+
+	SNOR_PROTO_1_1_1_DTR = SNOR_PROTO_DTR(1, 1, 1),
+	SNOR_PROTO_1_2_2_DTR = SNOR_PROTO_DTR(1, 2, 2),
+	SNOR_PROTO_1_4_4_DTR = SNOR_PROTO_DTR(1, 4, 4),
+	SNOR_PROTO_1_8_8_DTR = SNOR_PROTO_DTR(1, 8, 8),
+};
+
+static inline bool spi_nor_protocol_is_dtr(enum spi_nor_protocol proto)
+{
+	return !!(proto & SNOR_PROTO_IS_DTR);
+}
+
+static inline u8 spi_nor_get_protocol_inst_nbits(enum spi_nor_protocol proto)
+{
+	return ((unsigned long)(proto & SNOR_PROTO_INST_MASK)) >>
+		SNOR_PROTO_INST_SHIFT;
+}
+
+static inline u8 spi_nor_get_protocol_addr_nbits(enum spi_nor_protocol proto)
+{
+	return ((unsigned long)(proto & SNOR_PROTO_ADDR_MASK)) >>
+		SNOR_PROTO_ADDR_SHIFT;
+}
+
+static inline u8 spi_nor_get_protocol_data_nbits(enum spi_nor_protocol proto)
+{
+	return ((unsigned long)(proto & SNOR_PROTO_DATA_MASK)) >>
+		SNOR_PROTO_DATA_SHIFT;
+}
+
+static inline u8 spi_nor_get_protocol_width(enum spi_nor_protocol proto)
+{
+	return spi_nor_get_protocol_data_nbits(proto);
+}
+
+#define SPI_NOR_MAX_CMD_SIZE	8
+enum spi_nor_ops {
+	SPI_NOR_OPS_READ = 0,
+	SPI_NOR_OPS_WRITE,
+	SPI_NOR_OPS_ERASE,
+	SPI_NOR_OPS_LOCK,
+	SPI_NOR_OPS_UNLOCK,
+};
+
+enum spi_nor_option_flags {
+	SNOR_F_USE_FSR		= BIT(0),
+	SNOR_F_HAS_SR_TB	= BIT(1),
+	SNOR_F_NO_OP_CHIP_ERASE	= BIT(2),
+	SNOR_F_S3AN_ADDR_DEFAULT = BIT(3),
+	SNOR_F_READY_XSR_RDY	= BIT(4),
+	SNOR_F_USE_CLSR		= BIT(5),
+	SNOR_F_BROKEN_RESET	= BIT(6),
+};
+
+/**
+ * struct flash_info - Forward declaration of a structure used internally by
+ *		       spi_nor_scan()
+ */
+struct flash_info;
+
+/* TODO: Remove, once all users of spi_flash interface are moved to MTD */
+#define spi_flash spi_nor
+
+/**
+ * struct spi_nor - Structure for defining a the SPI NOR layer
+ * @mtd:		point to a mtd_info structure
+ * @lock:		the lock for the read/write/erase/lock/unlock operations
+ * @dev:		point to a spi device, or a spi nor controller device.
+ * @info:		spi-nor part JDEC MFR id and other info
+ * @page_size:		the page size of the SPI NOR
+ * @addr_width:		number of address bytes
+ * @erase_opcode:	the opcode for erasing a sector
+ * @read_opcode:	the read opcode
+ * @read_dummy:		the dummy needed by the read operation
+ * @program_opcode:	the program opcode
+ * @sst_write_second:	used by the SST write operation
+ * @flags:		flag options for the current SPI-NOR (SNOR_F_*)
+ * @read_proto:		the SPI protocol for read operations
+ * @write_proto:	the SPI protocol for write operations
+ * @reg_proto		the SPI protocol for read_reg/write_reg/erase operations
+ * @cmd_buf:		used by the write_reg
+ * @prepare:		[OPTIONAL] do some preparations for the
+ *			read/write/erase/lock/unlock operations
+ * @unprepare:		[OPTIONAL] do some post work after the
+ *			read/write/erase/lock/unlock operations
+ * @read_reg:		[DRIVER-SPECIFIC] read out the register
+ * @write_reg:		[DRIVER-SPECIFIC] write data to the register
+ * @read:		[DRIVER-SPECIFIC] read data from the SPI NOR
+ * @write:		[DRIVER-SPECIFIC] write data to the SPI NOR
+ * @erase:		[DRIVER-SPECIFIC] erase a sector of the SPI NOR
+ *			at the offset @offs; if not provided by the driver,
+ *			spi-nor will send the erase opcode via write_reg()
+ * @flash_lock:		[FLASH-SPECIFIC] lock a region of the SPI NOR
+ * @flash_unlock:	[FLASH-SPECIFIC] unlock a region of the SPI NOR
+ * @flash_is_locked:	[FLASH-SPECIFIC] check if a region of the SPI NOR is
+ * @quad_enable:	[FLASH-SPECIFIC] enables SPI NOR quad mode
+ *			completely locked
+ * @priv:		the private data
+ */
+struct spi_nor {
+	struct mtd_info		mtd;
+	struct udevice		*dev;
+	struct spi_slave	*spi;
+	const struct flash_info	*info;
+	u32			page_size;
+	u8			addr_width;
+	u8			erase_opcode;
+	u8			read_opcode;
+	u8			read_dummy;
+	u8			program_opcode;
+	enum spi_nor_protocol	read_proto;
+	enum spi_nor_protocol	write_proto;
+	enum spi_nor_protocol	reg_proto;
+	bool			sst_write_second;
+	u32			flags;
+	u8			cmd_buf[SPI_NOR_MAX_CMD_SIZE];
+
+	int (*prepare)(struct spi_nor *nor, enum spi_nor_ops ops);
+	void (*unprepare)(struct spi_nor *nor, enum spi_nor_ops ops);
+	int (*read_reg)(struct spi_nor *nor, u8 opcode, u8 *buf, int len);
+	int (*write_reg)(struct spi_nor *nor, u8 opcode, u8 *buf, int len);
+
+	ssize_t (*read)(struct spi_nor *nor, loff_t from,
+			size_t len, u_char *read_buf);
+	ssize_t (*write)(struct spi_nor *nor, loff_t to,
+			 size_t len, const u_char *write_buf);
+	int (*erase)(struct spi_nor *nor, loff_t offs);
+
+	int (*flash_lock)(struct spi_nor *nor, loff_t ofs, uint64_t len);
+	int (*flash_unlock)(struct spi_nor *nor, loff_t ofs, uint64_t len);
+	int (*flash_is_locked)(struct spi_nor *nor, loff_t ofs, uint64_t len);
+	int (*quad_enable)(struct spi_nor *nor);
+
+	void *priv;
+/* Compatibility for spi_flash, remove once sf layer is merged with mtd */
+	const char *name;
+	u32 size;
+	u32 sector_size;
+	u32 erase_size;
+};
+
+static inline void spi_nor_set_flash_node(struct spi_nor *nor,
+					  const struct device_node *np)
+{
+	mtd_set_of_node(&nor->mtd, np);
+}
+
+static inline const struct
+device_node *spi_nor_get_flash_node(struct spi_nor *nor)
+{
+	return mtd_get_of_node(&nor->mtd);
+}
+
+/**
+ * struct spi_nor_hwcaps - Structure for describing the hardware capabilies
+ * supported by the SPI controller (bus master).
+ * @mask:		the bitmask listing all the supported hw capabilies
+ */
+struct spi_nor_hwcaps {
+	u32	mask;
+};
+
+/*
+ *(Fast) Read capabilities.
+ * MUST be ordered by priority: the higher bit position, the higher priority.
+ * As a matter of performances, it is relevant to use Octo SPI protocols first,
+ * then Quad SPI protocols before Dual SPI protocols, Fast Read and lastly
+ * (Slow) Read.
+ */
+#define SNOR_HWCAPS_READ_MASK		GENMASK(14, 0)
+#define SNOR_HWCAPS_READ		BIT(0)
+#define SNOR_HWCAPS_READ_FAST		BIT(1)
+#define SNOR_HWCAPS_READ_1_1_1_DTR	BIT(2)
+
+#define SNOR_HWCAPS_READ_DUAL		GENMASK(6, 3)
+#define SNOR_HWCAPS_READ_1_1_2		BIT(3)
+#define SNOR_HWCAPS_READ_1_2_2		BIT(4)
+#define SNOR_HWCAPS_READ_2_2_2		BIT(5)
+#define SNOR_HWCAPS_READ_1_2_2_DTR	BIT(6)
+
+#define SNOR_HWCAPS_READ_QUAD		GENMASK(10, 7)
+#define SNOR_HWCAPS_READ_1_1_4		BIT(7)
+#define SNOR_HWCAPS_READ_1_4_4		BIT(8)
+#define SNOR_HWCAPS_READ_4_4_4		BIT(9)
+#define SNOR_HWCAPS_READ_1_4_4_DTR	BIT(10)
+
+#define SNOR_HWCPAS_READ_OCTO		GENMASK(14, 11)
+#define SNOR_HWCAPS_READ_1_1_8		BIT(11)
+#define SNOR_HWCAPS_READ_1_8_8		BIT(12)
+#define SNOR_HWCAPS_READ_8_8_8		BIT(13)
+#define SNOR_HWCAPS_READ_1_8_8_DTR	BIT(14)
+
+/*
+ * Page Program capabilities.
+ * MUST be ordered by priority: the higher bit position, the higher priority.
+ * Like (Fast) Read capabilities, Octo/Quad SPI protocols are preferred to the
+ * legacy SPI 1-1-1 protocol.
+ * Note that Dual Page Programs are not supported because there is no existing
+ * JEDEC/SFDP standard to define them. Also at this moment no SPI flash memory
+ * implements such commands.
+ */
+#define SNOR_HWCAPS_PP_MASK	GENMASK(22, 16)
+#define SNOR_HWCAPS_PP		BIT(16)
+
+#define SNOR_HWCAPS_PP_QUAD	GENMASK(19, 17)
+#define SNOR_HWCAPS_PP_1_1_4	BIT(17)
+#define SNOR_HWCAPS_PP_1_4_4	BIT(18)
+#define SNOR_HWCAPS_PP_4_4_4	BIT(19)
+
+#define SNOR_HWCAPS_PP_OCTO	GENMASK(22, 20)
+#define SNOR_HWCAPS_PP_1_1_8	BIT(20)
+#define SNOR_HWCAPS_PP_1_8_8	BIT(21)
+#define SNOR_HWCAPS_PP_8_8_8	BIT(22)
+
+/**
+ * spi_nor_scan() - scan the SPI NOR
+ * @nor:	the spi_nor structure
+ *
+ * The drivers can use this function to scan the SPI NOR.
+ * In the scanning, it will try to get all the necessary information to
+ * fill the mtd_info{} and the spi_nor{}.
+ *
+ * Return: 0 for success, others for failure.
+ */
+int spi_nor_scan(struct spi_nor *nor);
+
+#endif

commit cd1cb8b33e9b6cde1dc07b172172f21f010b807a
Author: Adam Ford <aford173@gmail.com>
Date:   Sun Dec 30 10:11:16 2018 -0600

    UPSTREAM: MTD: nand: mxs_nand_spl: Fix empty function pointer for BBT
    
    The initialization function calls a nand_chip.scan_bbt(mtd) but
    scan_bbt is never initialized resulting in an undefined function
    pointer.  This will direct the function pointer to nand_default_bbt
    defined in the same file.
    
    Change-Id: Ie96ca5a965549ac74293f5f96cd6fbe4220b91fa
    Signed-off-by: Adam Ford <aford173@gmail.com>
    Acked-by: Stefan Agner <stefan.agner@toradex.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 96d0be07e7498e7174daa6f3b56fc807b9feb71d)

diff --git a/drivers/mtd/nand/raw/mxs_nand_spl.c b/drivers/mtd/nand/raw/mxs_nand_spl.c
index 3b7b0d6f72..7867675c93 100644
--- a/drivers/mtd/nand/raw/mxs_nand_spl.c
+++ b/drivers/mtd/nand/raw/mxs_nand_spl.c
@@ -186,6 +186,7 @@ static int mxs_nand_init(void)
 	mtd = nand_to_mtd(&nand_chip);
 	/* set mtd functions */
 	nand_chip.cmdfunc = mxs_nand_command;
+	nand_chip.scan_bbt = nand_default_bbt;
 	nand_chip.numchips = 1;
 
 	/* identify flash device */

commit 3dbd2dd744be2e425e62cb979f8744b3eec56123
Author: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Date:   Mon Dec 3 16:11:58 2018 +0530

    UPSTREAM: mtd: nand: arasan_nfc: Add support for nand multi chip select
    
    This patch adds support for nand multi chip select.
    Also adding CONFIG_SYS_NAND_MAX_CHIPS to Kconfig to specify maximum number
    of nand chips.
    
    Change-Id: I7f6a8c4f3069bfc6c5eae9196a814ee08b1bb6d4
    Signed-off-by: Tummala Karthik Reddy <t.karthik.reddy@xilinx.com>
    Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
    Signed-off-by: Michal Simek <michal.simek@xilinx.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 97fca6a146390e1c4a5fe4c29b68f7730229db56)

diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index 6d466603d8..7f76e5ecef 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -299,6 +299,13 @@ config SYS_NAND_BUSWIDTH_16BIT
 	    not available while configuring controller. So a static CONFIG_NAND_xx
 	    is needed to know the device's bus-width in advance.
 
+config SYS_NAND_MAX_CHIPS
+	int "NAND max chips"
+	default 1
+	depends on NAND_ARASAN
+	help
+	  The maximum number of NAND chips per device to be supported.
+
 if SPL
 
 config SYS_NAND_U_BOOT_LOCATIONS
diff --git a/drivers/mtd/nand/raw/arasan_nfc.c b/drivers/mtd/nand/raw/arasan_nfc.c
index 69137d02b7..ddd96de6b7 100644
--- a/drivers/mtd/nand/raw/arasan_nfc.c
+++ b/drivers/mtd/nand/raw/arasan_nfc.c
@@ -91,6 +91,8 @@ struct arasan_nand_command_format {
 #define ARASAN_NAND_MEM_ADDR1_PAGE_SHIFT	16
 #define ARASAN_NAND_MEM_ADDR2_PAGE_MASK		0xFF
 #define ARASAN_NAND_MEM_ADDR2_CS_MASK		0xC0000000
+#define ARASAN_NAND_MEM_ADDR2_CS0_MASK         (0x3 << 30)
+#define ARASAN_NAND_MEM_ADDR2_CS1_MASK         (0x1 << 30)
 #define ARASAN_NAND_MEM_ADDR2_BCH_MASK		0xE000000
 #define ARASAN_NAND_MEM_ADDR2_BCH_SHIFT		25
 
@@ -262,6 +264,16 @@ static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE];
 
 static void arasan_nand_select_chip(struct mtd_info *mtd, int chip)
 {
+	u32 reg_val;
+
+	reg_val = readl(&arasan_nand_base->memadr_reg2);
+	if (chip == 0) {
+		reg_val &= ~ARASAN_NAND_MEM_ADDR2_CS0_MASK;
+		writel(reg_val, &arasan_nand_base->memadr_reg2);
+	} else if (chip == 1) {
+		reg_val |= ARASAN_NAND_MEM_ADDR2_CS1_MASK;
+		writel(reg_val, &arasan_nand_base->memadr_reg2);
+	}
 }
 
 static void arasan_nand_enable_ecc(void)
@@ -714,9 +726,6 @@ static int arasan_nand_send_wrcmd(struct arasan_nand_command_format *curr_cmd,
 	reg_val &= ~ARASAN_NAND_MEM_ADDR2_PAGE_MASK;
 	reg_val |= (page_addr >> ARASAN_NAND_MEM_ADDR1_PAGE_SHIFT);
 	writel(reg_val, &arasan_nand_base->memadr_reg2);
-	reg_val = readl(&arasan_nand_base->memadr_reg2);
-	reg_val &= ~ARASAN_NAND_MEM_ADDR2_CS_MASK;
-	writel(reg_val, &arasan_nand_base->memadr_reg2);
 
 	return 0;
 }
@@ -805,9 +814,6 @@ static int arasan_nand_erase(struct arasan_nand_command_format *curr_cmd,
 	reg_val &= ~ARASAN_NAND_MEM_ADDR2_PAGE_MASK;
 	reg_val |= (page_addr >> ARASAN_NAND_MEM_ADDR1_PAGE_SHIFT);
 	writel(reg_val, &arasan_nand_base->memadr_reg2);
-	reg_val = readl(&arasan_nand_base->memadr_reg2);
-	reg_val &= ~ARASAN_NAND_MEM_ADDR2_CS_MASK;
-	writel(reg_val, &arasan_nand_base->memadr_reg2);
 	writel(curr_cmd->pgm, &arasan_nand_base->pgm_reg);
 
 	while (!(readl(&arasan_nand_base->intsts_reg) &
@@ -860,10 +866,6 @@ static int arasan_nand_read_status(struct arasan_nand_command_format *curr_cmd,
 	reg_val |= (1 << ARASAN_NAND_PKT_REG_PKT_CNT_SHFT) | 1;
 	writel(reg_val, &arasan_nand_base->pkt_reg);
 
-	reg_val = readl(&arasan_nand_base->memadr_reg2);
-	reg_val &= ~ARASAN_NAND_MEM_ADDR2_CS_MASK;
-	writel(reg_val, &arasan_nand_base->memadr_reg2);
-
 	writel(curr_cmd->pgm, &arasan_nand_base->pgm_reg);
 	while (!(readl(&arasan_nand_base->intsts_reg) &
 		ARASAN_NAND_INT_STS_XFR_CMPLT_MASK) && timeout) {
@@ -933,9 +935,6 @@ static int arasan_nand_send_rdcmd(struct arasan_nand_command_format *curr_cmd,
 	reg_val |= (page_addr >> ARASAN_NAND_MEM_ADDR1_PAGE_SHIFT);
 	writel(reg_val, &arasan_nand_base->memadr_reg2);
 
-	reg_val = readl(&arasan_nand_base->memadr_reg2);
-	reg_val &= ~ARASAN_NAND_MEM_ADDR2_CS_MASK;
-	writel(reg_val, &arasan_nand_base->memadr_reg2);
 	buf_index = 0;
 
 	return 0;
@@ -1220,7 +1219,7 @@ static int arasan_nand_init(struct nand_chip *nand_chip, int devnum)
 	writel(0x0, &arasan_nand_base->pgm_reg);
 
 	/* first scan to find the device and get the page size */
-	if (nand_scan_ident(mtd, 1, NULL)) {
+	if (nand_scan_ident(mtd, CONFIG_SYS_NAND_MAX_CHIPS, NULL)) {
 		printf("%s: nand_scan_ident failed\n", __func__);
 		goto fail;
 	}

commit c6de2aae290151e042ec480accafecb4e77fd4fd
Author: Derald D. Woods <woods.technical@gmail.com>
Date:   Sat Dec 15 01:36:46 2018 -0600

    UPSTREAM: ARM: at91: Convert SPL_GENERATE_ATMEL_PMECC_HEADER to Kconfig
    
    This commit converts the following items to Kconfig:
    
    CONFIG_ATMEL_NAND_HWECC
    CONFIG_ATMEL_NAND_HW_PMECC
    CONFIG_PMECC_CAP
    CONFIG_PMECC_SECTOR_SIZE
    CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
    
    [PMECC References]
    https://www.at91.com/linux4sam/bin/view/Linux4SAM/PmeccConfigure
    https://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91Bootstrap
    
    [Mailing List Thread]
    https://lists.denx.de/pipermail/u-boot/2018-December/350666.html
    
    Fixes: 5541543f ("configs: at91: Remove CONFIG_SYS_EXTRA_OPTIONS assignment")
    [trini: Make the migration be size neutral and possibly not fix the
    above in all cases]
    Reported-by: Daniel Evans <photonthunder@gmail.com>
    Cc: Eugen Hristev <eugen.hristev@microchip.com>
    Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Change-Id: I00f123659dcb281b50cd4720901343e039e802c1
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit a 49ad40298cc5639436c6d490b699ecb60895ba2d）

diff --git a/configs/at91sam9n12ek_mmc_defconfig b/configs/at91sam9n12ek_mmc_defconfig
index f3ce2c55ef..ed080c3a25 100644
--- a/configs/at91sam9n12ek_mmc_defconfig
+++ b/configs/at91sam9n12ek_mmc_defconfig
@@ -36,7 +36,7 @@ CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
-CONFIG_MTD_PARTITIONS=y
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/at91sam9n12ek_nandflash_defconfig b/configs/at91sam9n12ek_nandflash_defconfig
index 9c63c302c0..639c6c8db6 100644
--- a/configs/at91sam9n12ek_nandflash_defconfig
+++ b/configs/at91sam9n12ek_nandflash_defconfig
@@ -36,7 +36,7 @@ CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
-CONFIG_MTD_PARTITIONS=y
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/at91sam9n12ek_spiflash_defconfig b/configs/at91sam9n12ek_spiflash_defconfig
index b2f28e8819..e3ea0e709d 100644
--- a/configs/at91sam9n12ek_spiflash_defconfig
+++ b/configs/at91sam9n12ek_spiflash_defconfig
@@ -36,7 +36,7 @@ CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
-CONFIG_MTD_PARTITIONS=y
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/at91sam9x5ek_dataflash_defconfig b/configs/at91sam9x5ek_dataflash_defconfig
index 4e17b1c4f0..817cdea025 100644
--- a/configs/at91sam9x5ek_dataflash_defconfig
+++ b/configs/at91sam9x5ek_dataflash_defconfig
@@ -40,6 +40,7 @@ CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/at91sam9x5ek_mmc_defconfig b/configs/at91sam9x5ek_mmc_defconfig
index af042ab7bb..3897883162 100644
--- a/configs/at91sam9x5ek_mmc_defconfig
+++ b/configs/at91sam9x5ek_mmc_defconfig
@@ -40,6 +40,7 @@ CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/at91sam9x5ek_nandflash_defconfig b/configs/at91sam9x5ek_nandflash_defconfig
index 97b1bc0995..f3d19c86d2 100644
--- a/configs/at91sam9x5ek_nandflash_defconfig
+++ b/configs/at91sam9x5ek_nandflash_defconfig
@@ -40,6 +40,7 @@ CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/at91sam9x5ek_spiflash_defconfig b/configs/at91sam9x5ek_spiflash_defconfig
index a05f985cb1..a0e5592b38 100644
--- a/configs/at91sam9x5ek_spiflash_defconfig
+++ b/configs/at91sam9x5ek_spiflash_defconfig
@@ -40,6 +40,7 @@ CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/gurnard_defconfig b/configs/gurnard_defconfig
index 09ca2683b1..b82956eb11 100644
--- a/configs/gurnard_defconfig
+++ b/configs/gurnard_defconfig
@@ -25,6 +25,7 @@ CONFIG_OF_CONTROL=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_ATMEL_NAND_HWECC=y
 CONFIG_PHYLIB=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/sama5d2_ptc_ek_mmc_defconfig b/configs/sama5d2_ptc_ek_mmc_defconfig
index 27606be8ba..5a68ef1e9a 100644
--- a/configs/sama5d2_ptc_ek_mmc_defconfig
+++ b/configs/sama5d2_ptc_ek_mmc_defconfig
@@ -47,6 +47,7 @@ CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ATMEL=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_ATMEL_NAND_HW_PMECC=y
 CONFIG_DM_ETH=y
 CONFIG_MACB=y
 CONFIG_PINCTRL=y
diff --git a/configs/sama5d2_ptc_ek_nandflash_defconfig b/configs/sama5d2_ptc_ek_nandflash_defconfig
index b4a7376197..eb0583acdd 100644
--- a/configs/sama5d2_ptc_ek_nandflash_defconfig
+++ b/configs/sama5d2_ptc_ek_nandflash_defconfig
@@ -47,6 +47,7 @@ CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ATMEL=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_ATMEL_NAND_HW_PMECC=y
 CONFIG_DM_ETH=y
 CONFIG_MACB=y
 CONFIG_PINCTRL=y
diff --git a/configs/sama5d36ek_cmp_mmc_defconfig b/configs/sama5d36ek_cmp_mmc_defconfig
index ed4d4d1192..7bbfcb7a24 100644
--- a/configs/sama5d36ek_cmp_mmc_defconfig
+++ b/configs/sama5d36ek_cmp_mmc_defconfig
@@ -39,6 +39,7 @@ CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/sama5d36ek_cmp_nandflash_defconfig b/configs/sama5d36ek_cmp_nandflash_defconfig
index 4460d68672..640be26d00 100644
--- a/configs/sama5d36ek_cmp_nandflash_defconfig
+++ b/configs/sama5d36ek_cmp_nandflash_defconfig
@@ -39,6 +39,7 @@ CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/sama5d36ek_cmp_spiflash_defconfig b/configs/sama5d36ek_cmp_spiflash_defconfig
index 259a063b85..cb62a75157 100644
--- a/configs/sama5d36ek_cmp_spiflash_defconfig
+++ b/configs/sama5d36ek_cmp_spiflash_defconfig
@@ -39,6 +39,7 @@ CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/sama5d3_xplained_mmc_defconfig b/configs/sama5d3_xplained_mmc_defconfig
index ec2099e324..9f5bb09505 100644
--- a/configs/sama5d3_xplained_mmc_defconfig
+++ b/configs/sama5d3_xplained_mmc_defconfig
@@ -56,6 +56,7 @@ CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_ETH=y
 CONFIG_MACB=y
 CONFIG_PINCTRL=y
diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig
index a46b118297..bf8982fae9 100644
--- a/configs/sama5d3_xplained_nandflash_defconfig
+++ b/configs/sama5d3_xplained_nandflash_defconfig
@@ -53,6 +53,8 @@ CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_PMECC_CAP=4
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_ETH=y
 CONFIG_MACB=y
 CONFIG_PINCTRL=y
diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig
index 11a91924a3..19626befa2 100644
--- a/configs/sama5d3xek_mmc_defconfig
+++ b/configs/sama5d3xek_mmc_defconfig
@@ -57,6 +57,8 @@ CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_PMECC_CAP=4
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig
index 6ab44af029..db698dfd4c 100644
--- a/configs/sama5d3xek_nandflash_defconfig
+++ b/configs/sama5d3xek_nandflash_defconfig
@@ -52,6 +52,8 @@ CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_PMECC_CAP=4
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig
index 19950d0b2d..5d32964175 100644
--- a/configs/sama5d3xek_spiflash_defconfig
+++ b/configs/sama5d3xek_spiflash_defconfig
@@ -53,6 +53,8 @@ CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_PMECC_CAP=4
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/sama5d4_xplained_mmc_defconfig b/configs/sama5d4_xplained_mmc_defconfig
index d357062724..c4c24dd5b4 100644
--- a/configs/sama5d4_xplained_mmc_defconfig
+++ b/configs/sama5d4_xplained_mmc_defconfig
@@ -51,6 +51,7 @@ CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig
index 305eaeb3d7..800f679535 100644
--- a/configs/sama5d4_xplained_nandflash_defconfig
+++ b/configs/sama5d4_xplained_nandflash_defconfig
@@ -48,6 +48,8 @@ CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_PMECC_CAP=8
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/sama5d4_xplained_spiflash_defconfig b/configs/sama5d4_xplained_spiflash_defconfig
index d7ac9a1c0a..9a065b8a3b 100644
--- a/configs/sama5d4_xplained_spiflash_defconfig
+++ b/configs/sama5d4_xplained_spiflash_defconfig
@@ -50,6 +50,8 @@ CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_PMECC_CAP=8
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/sama5d4ek_mmc_defconfig b/configs/sama5d4ek_mmc_defconfig
index a184925a8e..de4de4074b 100644
--- a/configs/sama5d4ek_mmc_defconfig
+++ b/configs/sama5d4ek_mmc_defconfig
@@ -54,6 +54,7 @@ CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/sama5d4ek_nandflash_defconfig b/configs/sama5d4ek_nandflash_defconfig
index bbfa18cdcd..b3ee471958 100644
--- a/configs/sama5d4ek_nandflash_defconfig
+++ b/configs/sama5d4ek_nandflash_defconfig
@@ -51,6 +51,8 @@ CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_PMECC_CAP=8
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/sama5d4ek_spiflash_defconfig b/configs/sama5d4ek_spiflash_defconfig
index 3119e87022..057030d997 100644
--- a/configs/sama5d4ek_spiflash_defconfig
+++ b/configs/sama5d4ek_spiflash_defconfig
@@ -50,6 +50,8 @@ CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_PMECC_CAP=8
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/wb45n_defconfig b/configs/wb45n_defconfig
index eb6a921301..4ec8d3b37c 100644
--- a/configs/wb45n_defconfig
+++ b/configs/wb45n_defconfig
@@ -27,5 +27,7 @@ CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
 CONFIG_MTD_DEVICE=y
 CONFIG_MTD_PARTITIONS=y
+CONFIG_PMECC_CAP=4
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_LZMA=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/wb50n_defconfig b/configs/wb50n_defconfig
index ea27852df7..4c9ed74917 100644
--- a/configs/wb50n_defconfig
+++ b/configs/wb50n_defconfig
@@ -26,6 +26,8 @@ CONFIG_ENV_IS_IN_NAND=y
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_PMECC_CAP=8
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
 CONFIG_PHY_MICREL_KSZ90X1=y
diff --git a/doc/README.atmel_pmecc b/doc/README.atmel_pmecc
index 274d860f06..c86d085779 100644
--- a/doc/README.atmel_pmecc
+++ b/doc/README.atmel_pmecc
@@ -20,13 +20,12 @@ To use PMECC in this driver, the user needs to set:
 	2. The PMECC sector size: CONFIG_PMECC_SECTOR_SIZE.
 	   It only can be 512 or 1024.
 
-Take AT91SAM9X5EK as an example, the board definition file likes:
+Take 'configs/at91sam9x5ek_nandflash_defconfig' as an example, the board
+configuration file has the following entries:
 
-/* PMECC & PMERRLOC */
-#define CONFIG_ATMEL_NAND_HWECC		1
-#define CONFIG_ATMEL_NAND_HW_PMECC	1
-#define CONFIG_PMECC_CAP		2
-#define CONFIG_PMECC_SECTOR_SIZE	512
+	CONFIG_PMECC_CAP=2
+	CONFIG_PMECC_SECTOR_SIZE=512
+	CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 
 How to enable PMECC header for direct programmable boot.bin
 -----------------------------------------------------------
@@ -40,7 +39,7 @@ sama5d3 SoC spec (as of 03. April 2014) defines how this PMECC header has to
 look like. In order to do so we have a new image type added to mkimage to
 generate this PMECC header and integrated this into the build process of SPL.
 
-To enable the generation of atmel PMECC header for SPL one need to define
+To enable the generation of atmel PMECC header for SPL one needs to define
 CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER. The required parameters are taken from
 board configuration and compiled into the host tools atmel_pmecc_params. This
 tool will be called in build process to parametrize mkimage for atmelimage
diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index ffc6cc98aa..6d466603d8 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -22,6 +22,44 @@ config NAND_ATMEL
 	  Enable this driver for NAND flash platforms using an Atmel NAND
 	  controller.
 
+if NAND_ATMEL
+
+config ATMEL_NAND_HWECC
+	bool "Atmel Hardware ECC"
+	default n
+
+config ATMEL_NAND_HW_PMECC
+	bool "Atmel Programmable Multibit ECC (PMECC)"
+	select ATMEL_NAND_HWECC
+	default n
+	help
+	  The Programmable Multibit ECC (PMECC) controller is a programmable
+	  binary BCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder.
+
+config PMECC_CAP
+	int "PMECC Correctable ECC Bits"
+	depends on ATMEL_NAND_HW_PMECC
+	default 2
+	help
+	  Correctable ECC bits, can be 2, 4, 8, 12, and 24.
+
+config PMECC_SECTOR_SIZE
+	int "PMECC Sector Size"
+	depends on ATMEL_NAND_HW_PMECC
+	default 512
+	help
+	  Sector size, in bytes, can be 512 or 1024.
+
+config SPL_GENERATE_ATMEL_PMECC_HEADER
+	bool "Atmel PMECC Header Generation"
+	select ATMEL_NAND_HWECC
+	select ATMEL_NAND_HW_PMECC
+	default n
+	help
+	  Generate Programmable Multibit ECC (PMECC) header for SPL image.
+
+endif
+
 config NAND_DAVINCI
 	bool "Support TI Davinci NAND controller"
 	help
diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h
index 88753280b7..a44cff9380 100644
--- a/include/configs/at91sam9n12ek.h
+++ b/include/configs/at91sam9n12ek.h
@@ -72,13 +72,6 @@
 #define CONFIG_SYS_NAND_READY_PIN	GPIO_PIN_PD(5)
 #endif
 
-/* PMECC & PMERRLOC */
-#define CONFIG_ATMEL_NAND_HWECC
-#define CONFIG_ATMEL_NAND_HW_PMECC
-#define CONFIG_PMECC_CAP		2
-#define CONFIG_PMECC_SECTOR_SIZE	512
-#define CONFIG_PMECC_INDEX_TABLE_OFFSET	0x8000
-
 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 	"console=console=ttyS0,115200\0"                                \
 	"mtdparts="MTDPARTS_DEFAULT"\0"					\
@@ -191,7 +184,6 @@
 #define CONFIG_SYS_NAND_OOBSIZE		64
 #define CONFIG_SYS_NAND_BLOCK_SIZE	0x20000
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	0x0
-#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
 
 #elif CONFIG_SYS_USE_SPIFLASH
 #define CONFIG_SPL_SPI_LOAD
diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h
index b63aca6593..ff3d751446 100644
--- a/include/configs/at91sam9x5ek.h
+++ b/include/configs/at91sam9x5ek.h
@@ -76,12 +76,6 @@
 #define CONFIG_SYS_NAND_READY_PIN	AT91_PIN_PD5
 #endif
 
-/* PMECC & PMERRLOC */
-#define CONFIG_ATMEL_NAND_HWECC		1
-#define CONFIG_ATMEL_NAND_HW_PMECC	1
-#define CONFIG_PMECC_CAP		2
-#define CONFIG_PMECC_SECTOR_SIZE	512
-
 /* USB */
 #ifdef CONFIG_CMD_USB
 #ifndef CONFIG_USB_EHCI_HCD
@@ -172,7 +166,6 @@
 #define CONFIG_SYS_NAND_OOBSIZE		64
 #define CONFIG_SYS_NAND_BLOCK_SIZE	0x20000
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	0x0
-#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
 
 #elif CONFIG_SYS_USE_SPIFLASH
 #define CONFIG_SPL_SPI_LOAD
diff --git a/include/configs/sama5d2_ptc_ek.h b/include/configs/sama5d2_ptc_ek.h
index d2d4adbb7f..9417e0fbae 100644
--- a/include/configs/sama5d2_ptc_ek.h
+++ b/include/configs/sama5d2_ptc_ek.h
@@ -36,9 +36,6 @@
 /* our CLE is AD22 */
 #define CONFIG_SYS_NAND_MASK_CLE	BIT(22)
 #define CONFIG_SYS_NAND_ONFI_DETECTION
-/* PMECC & PMERRLOC */
-#define CONFIG_ATMEL_NAND_HWECC
-#define CONFIG_ATMEL_NAND_HW_PMECC
 #endif
 
 #endif /* __CONFIG_H */
diff --git a/include/configs/sama5d3_xplained.h b/include/configs/sama5d3_xplained.h
index ed1f5073dc..bc8396e382 100644
--- a/include/configs/sama5d3_xplained.h
+++ b/include/configs/sama5d3_xplained.h
@@ -45,14 +45,8 @@
 #define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
 #define CONFIG_SYS_NAND_ONFI_DETECTION
 #endif
-/* PMECC & PMERRLOC */
-#define CONFIG_ATMEL_NAND_HWECC
-#define CONFIG_ATMEL_NAND_HW_PMECC
-#define CONFIG_PMECC_CAP		4
-#define CONFIG_PMECC_SECTOR_SIZE	512
 
 /* USB */
-
 #ifdef CONFIG_CMD_USB
 #define CONFIG_USB_ATMEL
 #define CONFIG_USB_ATMEL_CLK_SEL_UPLL
@@ -96,7 +90,6 @@
 #define CONFIG_SYS_NAND_OOBSIZE		64
 #define CONFIG_SYS_NAND_BLOCK_SIZE	0x20000
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	0x0
-#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
 
 #endif
 
diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h
index d9dec0baa0..9824cf3148 100644
--- a/include/configs/sama5d3xek.h
+++ b/include/configs/sama5d3xek.h
@@ -78,14 +78,8 @@
 #define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
 #define CONFIG_SYS_NAND_ONFI_DETECTION
 #endif
-/* PMECC & PMERRLOC */
-#define CONFIG_ATMEL_NAND_HWECC
-#define CONFIG_ATMEL_NAND_HW_PMECC
-#define CONFIG_PMECC_CAP		4
-#define CONFIG_PMECC_SECTOR_SIZE	512
 
 /* USB */
-
 #ifdef CONFIG_CMD_USB
 #define CONFIG_USB_ATMEL_CLK_SEL_UPLL
 #define CONFIG_USB_OHCI_NEW
@@ -130,7 +124,6 @@
 #define CONFIG_SYS_NAND_OOBSIZE		64
 #define CONFIG_SYS_NAND_BLOCK_SIZE	0x20000
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	0x0
-#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
 
 #elif CONFIG_SYS_USE_SERIALFLASH
 #define CONFIG_SPL_SPI_LOAD
diff --git a/include/configs/sama5d4_xplained.h b/include/configs/sama5d4_xplained.h
index ccf47f3264..11d23d8213 100644
--- a/include/configs/sama5d4_xplained.h
+++ b/include/configs/sama5d4_xplained.h
@@ -39,9 +39,6 @@
 /* our CLE is AD22 */
 #define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
 #define CONFIG_SYS_NAND_ONFI_DETECTION
-/* PMECC & PMERRLOC */
-#define CONFIG_ATMEL_NAND_HWECC
-#define CONFIG_ATMEL_NAND_HW_PMECC
 #endif
 
 /* LCD */
@@ -81,8 +78,7 @@
 #elif CONFIG_SYS_USE_NANDFLASH
 #define CONFIG_SPL_NAND_DRIVERS
 #define CONFIG_SPL_NAND_BASE
-#define CONFIG_PMECC_CAP		8
-#define CONFIG_PMECC_SECTOR_SIZE	512
+#endif
 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x40000
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_SIZE	0x1000
@@ -90,7 +86,6 @@
 #define CONFIG_SYS_NAND_OOBSIZE		224
 #define CONFIG_SYS_NAND_BLOCK_SIZE	0x40000
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	0x0
-#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
 
 #elif CONFIG_SYS_USE_SERIALFLASH
 #define CONFIG_SPL_SPI_LOAD
diff --git a/include/configs/sama5d4ek.h b/include/configs/sama5d4ek.h
index dd567f93c8..2a78a66302 100644
--- a/include/configs/sama5d4ek.h
+++ b/include/configs/sama5d4ek.h
@@ -39,9 +39,6 @@
 /* our CLE is AD22 */
 #define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
 #define CONFIG_SYS_NAND_ONFI_DETECTION
-/* PMECC & PMERRLOC */
-#define CONFIG_ATMEL_NAND_HWECC
-#define CONFIG_ATMEL_NAND_HW_PMECC
 #endif
 
 /* LCD */
@@ -79,8 +76,7 @@
 #elif CONFIG_SYS_USE_NANDFLASH
 #define CONFIG_SPL_NAND_DRIVERS
 #define CONFIG_SPL_NAND_BASE
-#define CONFIG_PMECC_CAP		8
-#define CONFIG_PMECC_SECTOR_SIZE	512
+#endif
 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x40000
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_SIZE	0x1000
@@ -88,7 +84,6 @@
 #define CONFIG_SYS_NAND_OOBSIZE		224
 #define CONFIG_SYS_NAND_BLOCK_SIZE	0x40000
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	0x0
-#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
 
 #elif CONFIG_SYS_USE_SERIALFLASH
 #define CONFIG_SPL_SPI_LOAD
diff --git a/include/configs/snapper9g45.h b/include/configs/snapper9g45.h
index 472989f328..59a16b049c 100644
--- a/include/configs/snapper9g45.h
+++ b/include/configs/snapper9g45.h
@@ -39,7 +39,6 @@
 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + (1024 * 1024))
 
 /* NAND Flash */
-#define CONFIG_ATMEL_NAND_HWECC
 #define CONFIG_SYS_NAND_ECC_BASE	ATMEL_BASE_ECC
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
diff --git a/include/configs/wb45n.h b/include/configs/wb45n.h
index c9dd3915b0..d31c300a20 100644
--- a/include/configs/wb45n.h
+++ b/include/configs/wb45n.h
@@ -48,14 +48,6 @@
 #define CONFIG_SYS_NAND_MASK_CLE    (1 << 22)
 #define CONFIG_SYS_NAND_ENABLE_PIN  AT91_PIN_PD4
 #define CONFIG_SYS_NAND_READY_PIN   AT91_PIN_PD5
-
-/* PMECC & PMERRLOC */
-#define CONFIG_ATMEL_NAND_HWECC     1
-#define CONFIG_ATMEL_NAND_HW_PMECC  1
-#define CONFIG_PMECC_CAP            4
-#define CONFIG_PMECC_SECTOR_SIZE    512
-
-#define CONFIG_CMD_MTDPARTS
 #define CONFIG_RBTREE
 #define CONFIG_LZO
 
@@ -143,6 +135,5 @@
 #define CONFIG_SYS_NAND_OOBSIZE     64
 #define CONFIG_SYS_NAND_BLOCK_SIZE  0x20000
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   0x0
-#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
 
 #endif				/* __CONFIG_H__ */
diff --git a/include/configs/wb50n.h b/include/configs/wb50n.h
index 70ea48a9a3..bd5a35326a 100644
--- a/include/configs/wb50n.h
+++ b/include/configs/wb50n.h
@@ -58,11 +58,6 @@
 /* our CLE is AD22 */
 #define CONFIG_SYS_NAND_MASK_CLE    (1 << 22)
 #define CONFIG_SYS_NAND_ONFI_DETECTION
-/* PMECC & PMERRLOC */
-#define CONFIG_ATMEL_NAND_HWECC
-#define CONFIG_ATMEL_NAND_HW_PMECC
-#define CONFIG_PMECC_CAP            8
-#define CONFIG_PMECC_SECTOR_SIZE    512
 
 /* Ethernet Hardware */
 #define CONFIG_MACB
@@ -119,6 +114,5 @@
 #define CONFIG_SYS_NAND_OOBSIZE     64
 #define CONFIG_SYS_NAND_BLOCK_SIZE  0x20000
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   0x0
-#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
 
 #endif
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 439fdcbd4b..64958552fb 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -134,8 +134,6 @@ CONFIG_ATMEL_LCD_BGR555
 CONFIG_ATMEL_LCD_RGB565
 CONFIG_ATMEL_LEGACY
 CONFIG_ATMEL_MCI_8BIT
-CONFIG_ATMEL_NAND_HWECC
-CONFIG_ATMEL_NAND_HW_PMECC
 CONFIG_ATMEL_SPI0
 CONFIG_AT_TRANS
 CONFIG_AUTONEG_TIMEOUT
@@ -1724,9 +1722,6 @@ CONFIG_PM9263
 CONFIG_PM9G45
 CONFIG_PMC_BR_PRELIM
 CONFIG_PMC_OR_PRELIM
-CONFIG_PMECC_CAP
-CONFIG_PMECC_INDEX_TABLE_OFFSET
-CONFIG_PMECC_SECTOR_SIZE
 CONFIG_PME_PLAT_CLK_DIV
 CONFIG_PMU
 CONFIG_PMW_BASE
@@ -2168,7 +2163,6 @@ CONFIG_SPL_FS_LOAD_ARGS_NAME
 CONFIG_SPL_FS_LOAD_KERNEL_NAME
 CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
 CONFIG_SPL_GD_ADDR
-CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
 CONFIG_SPL_INIT_MINIMAL
 CONFIG_SPL_JR0_LIODN_NS
 CONFIG_SPL_JR0_LIODN_S

commit 50c9e2f7d503b68d4d04ee0fbf23d590ed2d155e
Author: Stefan Agner <stefan.agner@toradex.com>
Date:   Thu Dec 6 14:57:09 2018 +0100

    UPSTREAM: mtd: nand: raw: allow to disable unneeded ECC layouts
    
    Each ECC layout consumes about 2984 bytes in the .data section. Allow
    to disable the default ECC layouts if a driver is known to provide its
    own ECC layout.
    
    Change-Id: I6e51f184fd4dcc688d2c27c8ba5b789bf6743344
    Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
    Reviewed-by: Lukasz Majewski <lukma@denx.de>
    Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit a38c3af868ad2a7a7c04667e559570d5f81b1d51)

diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index fd1723feda..ffc6cc98aa 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -9,6 +9,12 @@ config SYS_NAND_SELF_INIT
 	  This option, if enabled, provides more flexible and linux-like
 	  NAND initialization process.
 
+config SYS_NAND_DRIVER_ECC_LAYOUT
+	bool
+	help
+	  Omit standard ECC layouts to safe space. Select this if your driver
+	  is known to provide its own ECC layout.
+
 config NAND_ATMEL
 	bool "Support Atmel NAND controller"
 	imply SYS_NAND_USE_FLASH_BBT
@@ -81,6 +87,7 @@ config NAND_OMAP_ELM
 config NAND_VF610_NFC
 	bool "Support for Freescale NFC for VF610"
 	select SYS_NAND_SELF_INIT
+	select SYS_NAND_DRIVER_ECC_LAYOUT
 	imply CMD_NAND
 	help
 	  Enables support for NAND Flash Controller on some Freescale
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index 92daebe120..6d2ff58d86 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -47,6 +47,7 @@
 #include <linux/errno.h>
 
 /* Define default oob placement schemes for large and small page devices */
+#ifdef CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT
 static struct nand_ecclayout nand_oob_8 = {
 	.eccbytes = 3,
 	.eccpos = {0, 1, 2},
@@ -89,6 +90,7 @@ static struct nand_ecclayout nand_oob_128 = {
 		{.offset = 2,
 		 .length = 78} }
 };
+#endif
 
 static int nand_get_device(struct mtd_info *mtd, int new_state);
 
@@ -4339,6 +4341,7 @@ int nand_scan_tail(struct mtd_info *mtd)
 	 */
 	if (!ecc->layout && (ecc->mode != NAND_ECC_SOFT_BCH)) {
 		switch (mtd->oobsize) {
+#ifdef CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT
 		case 8:
 			ecc->layout = &nand_oob_8;
 			break;
@@ -4351,6 +4354,7 @@ int nand_scan_tail(struct mtd_info *mtd)
 		case 128:
 			ecc->layout = &nand_oob_128;
 			break;
+#endif
 		default:
 			pr_warn("No oob scheme defined for oobsize %d\n",
 				   mtd->oobsize);

commit cdd7a99bc3bb3df0a1222f99328452a5b7ba3c38
Author: Nikolai Zhubr <n-a-zhubr@yandex.ru>
Date:   Wed Jan 2 00:56:13 2019 +0530

    UPSTREAM: mtd: nand: raw: Add Hynix H27UBG8T2BTR id table
    
    This patch adds Hynix H27UBG8T2BTR id table as part of raw nand,
    these chips were available in some A20-olinuxino-micro boards.
    
    Change-Id: I51130e0c1579a98bc74c023fa725302b3833374f
    Signed-off-by: Nikolai Zhubr <n-a-zhubr@yandex.ru>
    [jagan: add proper commit message]
    Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit cdf72c188c62b8ac20e5a2e1abbd45bc721e2ff9)

diff --git a/drivers/mtd/nand/raw/nand_ids.c b/drivers/mtd/nand/raw/nand_ids.c
index 4f1de4da41..126610a056 100644
--- a/drivers/mtd/nand/raw/nand_ids.c
+++ b/drivers/mtd/nand/raw/nand_ids.c
@@ -64,6 +64,10 @@ struct nand_flash_dev nand_flash_ids[] = {
 	{"SDTNRGAMA 64G 3.3V 8-bit",
 		{ .id = {0x45, 0xde, 0x94, 0x93, 0x76, 0x50} },
 		  SZ_16K, SZ_8K, SZ_4M, 0, 6, 1280, NAND_ECC_INFO(40, SZ_1K) },
+	{"H27UBG8T2BTR-BC 32G 3.3V 8-bit",
+		{ .id = {0xad, 0xd7, 0x94, 0xda, 0x74, 0xc3} },
+		  SZ_8K, SZ_4K, SZ_2M, NAND_NEED_SCRAMBLING, 6, 640,
+		  NAND_ECC_INFO(40, SZ_1K), 0 },
 	{"H27UCG8T2ATR-BC 64G 3.3V 8-bit",
 		{ .id = {0xad, 0xde, 0x94, 0xda, 0x74, 0xc4} },
 		  SZ_8K, SZ_8K, SZ_2M, NAND_NEED_SCRAMBLING, 6, 640,

commit 251a3b836012a99dea07f6687715d916d760f550
Author: Lukasz Majewski <lukma@denx.de>
Date:   Mon Dec 3 10:24:51 2018 +0100

    UPSTREAM: nand: vybrid: Extend the vf610 NFC NAND driver to support device tree (and DM)
    
    This commit adds support for device tree and enumeration via device model
    for the Vybrid's NFC NAND driver.
    
    Change-Id: I382299d2fb235ee2a922527a0933afbd89317a1c
    Signed-off-by: Lukasz Majewski <lukma@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit acdf10e17937f4b23fb2613e148caf25aac62c37)

diff --git a/drivers/mtd/nand/raw/vf610_nfc.c b/drivers/mtd/nand/raw/vf610_nfc.c
index e3bfdcc319..1a4b6fb5b3 100644
--- a/drivers/mtd/nand/raw/vf610_nfc.c
+++ b/drivers/mtd/nand/raw/vf610_nfc.c
@@ -32,6 +32,11 @@
 #include <nand.h>
 #include <errno.h>
 #include <asm/io.h>
+#if CONFIG_NAND_VF610_NFC_DT
+#include <dm.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#endif
 
 /* Register Offsets */
 #define NFC_FLASH_CMD1			0x3F00
@@ -761,9 +766,51 @@ error:
 	return err;
 }
 
+#if CONFIG_NAND_VF610_NFC_DT
+static const struct udevice_id vf610_nfc_dt_ids[] = {
+	{
+		.compatible = "fsl,vf610-nfc",
+	},
+	{ /* sentinel */ }
+};
+
+static int vf610_nfc_dt_probe(struct udevice *dev)
+{
+	struct resource res;
+	int ret;
+
+	ret = dev_read_resource(dev, 0, &res);
+	if (ret)
+		return ret;
+
+	return vf610_nfc_nand_init(0, devm_ioremap(dev, res.start,
+						   resource_size(&res)));
+}
+
+U_BOOT_DRIVER(vf610_nfc_dt) = {
+	.name = "vf610-nfc-dt",
+	.id = UCLASS_MTD,
+	.of_match = vf610_nfc_dt_ids,
+	.probe = vf610_nfc_dt_probe,
+};
+
+void board_nand_init(void)
+{
+	struct udevice *dev;
+	int ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_MTD,
+					  DM_GET_DRIVER(vf610_nfc_dt),
+					  &dev);
+	if (ret && ret != -ENODEV)
+		pr_err("Failed to initialize NAND controller. (error %d)\n",
+		       ret);
+}
+#else
 void board_nand_init(void)
 {
 	int err = vf610_nfc_nand_init(0, (void __iomem *)CONFIG_SYS_NAND_BASE);
 	if (err)
 		printf("VF610 NAND init failed (err %d)\n", err);
 }
+#endif /* CONFIG_NAND_VF610_NFC_DT */

commit b6a0fedb562b86e3792f35bd29cda9d0fa4fa565
Author: Lukasz Majewski <lukma@denx.de>
Date:   Mon Dec 3 10:24:50 2018 +0100

    UPSTREAM: Kconfig: Add entry for VF610 NAND NFC device tree aware driver
    
    This commit provides code to add proper entry to Kconfig to enable
    support for VF610 device tree aware driver.
    
    Change-Id: I117a450614f987c83f3e29bfbc57fa35a6a30288
    Signed-off-by: Lukasz Majewski <lukma@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 8a12d127d7a9298e051b6b26d4cc1e7c3af1d83a)

diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index 008f7b4b4b..fd1723feda 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -88,6 +88,15 @@ config NAND_VF610_NFC
 	  The driver supports a maximum 2k page size. The driver
 	  currently does not support hardware ECC.
 
+if NAND_VF610_NFC
+
+config NAND_VF610_NFC_DT
+        bool "Support Vybrid's vf610 NAND controller as a DT device"
+        depends on OF_CONTROL && MTD
+        help
+          Enable the driver for Vybrid's vf610 NAND flash on platforms
+	  using device tree.
+
 choice
 	prompt "Hardware ECC strength"
 	depends on NAND_VF610_NFC
@@ -103,6 +112,8 @@ config SYS_NAND_VF610_NFC_60_ECC_BYTES
 
 endchoice
 
+endif
+
 config NAND_PXA3XX
 	bool "Support for NAND on PXA3xx and Armada 370/XP/38x"
 	select SYS_NAND_SELF_INIT

commit 2c92be1601a4526d1ae30543667842be907f8849
Author: Lukasz Majewski <lukma@denx.de>
Date:   Mon Dec 3 10:20:47 2018 +0100

    UPSTREAM: nand: vybrid: Use calloc() instead of malloc() to allocate struct nfc
    
    Without this change it is possible that Vybrid's NFC driver malloc() call
    will obtain some memory used (and correctly free'd) by some previous
    driver (in this case pinctrl for Vybrid).
    
    As a result some fields of struct nfc - in out case mtd->_get_device - are
    "pre initialized" with some random values.
    
    On the latter stage of booting, when e.g. somebody calls 'mtdparts default'
    the "data abort" is observed when __get_mtd_device() function is called.
    
    The mtd->_get_device pointer is not NULL and wrong value is referenced.
    
    Change-Id: Ibf1b8d444f4cdd8103298ecb7bc594d8126ac555
    Signed-off-by: Lukasz Majewski <lukma@denx.de>
    Reviewed-by: Stefan Agner <stefan.agner@toradex.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 254409dbe836633b079968c0e7686ecd09b45dc7)

diff --git a/drivers/mtd/nand/raw/vf610_nfc.c b/drivers/mtd/nand/raw/vf610_nfc.c
index dd53f2bedb..e3bfdcc319 100644
--- a/drivers/mtd/nand/raw/vf610_nfc.c
+++ b/drivers/mtd/nand/raw/vf610_nfc.c
@@ -642,7 +642,7 @@ static int vf610_nfc_nand_init(int devnum, void __iomem *addr)
 		.flash_bbt = 1,
 	};
 
-	nfc = malloc(sizeof(*nfc));
+	nfc = calloc(1, sizeof(*nfc));
 	if (!nfc) {
 		printf(KERN_ERR "%s: Memory exhausted!\n", __func__);
 		return -ENOMEM;

commit a27f458bd51ab3f68c25454e34e2bd59ce77adcd
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Wed Dec 19 20:03:19 2018 +0900

    UPSTREAM: mtd: rawnand: denali: fix a race condition when DMA is kicked
    
    Based on Linux commit cf51e4b9c34407bf0c3d9b582b7837e047e1df47
    
    Add the register read-back, commenting why this is necessary.
    
    Change-Id: I37833cf64255f4b3eb955b74c571889435d4f243
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 9d43649a7740cf715c750929d19661a35144e7d1)

diff --git a/drivers/mtd/nand/raw/denali.c b/drivers/mtd/nand/raw/denali.c
index 59544ff934..d9f3c32eb9 100644
--- a/drivers/mtd/nand/raw/denali.c
+++ b/drivers/mtd/nand/raw/denali.c
@@ -588,6 +588,12 @@ static int denali_dma_xfer(struct denali_nand_info *denali, void *buf,
 	}
 
 	iowrite32(DMA_ENABLE__FLAG, denali->reg + DMA_ENABLE);
+	/*
+	 * The ->setup_dma() hook kicks DMA by using the data/command
+	 * interface, which belongs to a different AXI port from the
+	 * register interface.  Read back the register to avoid a race.
+	 */
+	ioread32(denali->reg + DMA_ENABLE);
 
 	denali_reset_irq(denali);
 	denali->setup_dma(denali, dma_addr, page, write);

commit 3d00936c5e41814d4e2bf792db9ec8f32fb808c2
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Wed Dec 19 20:03:18 2018 +0900

    UPSTREAM: mtd: rawnand: denali: optimize timing parameters for data interface
    
    Based on Linux commit 1dfac31a5a63ac04a9b5fbc3f5105a586560f191
    
    This commit improves the ->setup_data_interface() hook.
    
    The denali_setup_data_interface() needs the frequency of clk_x
    and the ratio of clk_x / clk.
    
    The latter is currently hardcoded in the driver, like this:
    
      #define DENALI_CLK_X_MULT       6
    
    The IP datasheet requires that clk_x / clk be 4, 5, or 6.  I just
    chose 6 because it is the most defensive value, but it is not optimal.
    By getting the clock rate of both "clk" and "clk_x", the driver can
    compute the timing values more precisely.
    
    To not break the existing platforms, the fallback value, 50 MHz is
    provided.  It is true for all upstreamed platforms.
    
    Change-Id: Ia8b76dbbbac6ae1d82936a633c457280e3adc315
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 8ccfbfb3e1c54caf67def3626ca046fafaa5092d)

diff --git a/drivers/mtd/nand/raw/denali.c b/drivers/mtd/nand/raw/denali.c
index 0d57b6b707..59544ff934 100644
--- a/drivers/mtd/nand/raw/denali.c
+++ b/drivers/mtd/nand/raw/denali.c
@@ -70,14 +70,6 @@ static int dma_mapping_error(void *dev, dma_addr_t addr)
 #define DENALI_INVALID_BANK	-1
 #define DENALI_NR_BANKS		4
 
-/*
- * The bus interface clock, clk_x, is phase aligned with the core clock.  The
- * clk_x is an integral multiple N of the core clk.  The value N is configured
- * at IP delivery time, and its available value is 4, 5, or 6.  We need to align
- * to the largest value to make it work with any possible configuration.
- */
-#define DENALI_CLK_X_MULT	6
-
 static inline struct denali_nand_info *mtd_to_denali(struct mtd_info *mtd)
 {
 	return container_of(mtd_to_nand(mtd), struct denali_nand_info, nand);
@@ -947,7 +939,7 @@ static int denali_setup_data_interface(struct mtd_info *mtd, int chipnr,
 {
 	struct denali_nand_info *denali = mtd_to_denali(mtd);
 	const struct nand_sdr_timings *timings;
-	unsigned long t_clk;
+	unsigned long t_x, mult_x;
 	int acc_clks, re_2_we, re_2_re, we_2_re, addr_2_data;
 	int rdwr_en_lo, rdwr_en_hi, rdwr_en_lo_hi, cs_setup;
 	int addr_2_data_mask;
@@ -958,15 +950,24 @@ static int denali_setup_data_interface(struct mtd_info *mtd, int chipnr,
 		return PTR_ERR(timings);
 
 	/* clk_x period in picoseconds */
-	t_clk = DIV_ROUND_DOWN_ULL(1000000000000ULL, denali->clk_x_rate);
-	if (!t_clk)
+	t_x = DIV_ROUND_DOWN_ULL(1000000000000ULL, denali->clk_x_rate);
+	if (!t_x)
+		return -EINVAL;
+
+	/*
+	 * The bus interface clock, clk_x, is phase aligned with the core clock.
+	 * The clk_x is an integral multiple N of the core clk.  The value N is
+	 * configured at IP delivery time, and its available value is 4, 5, 6.
+	 */
+	mult_x = DIV_ROUND_CLOSEST_ULL(denali->clk_x_rate, denali->clk_rate);
+	if (mult_x < 4 || mult_x > 6)
 		return -EINVAL;
 
 	if (chipnr == NAND_DATA_IFACE_CHECK_ONLY)
 		return 0;
 
 	/* tREA -> ACC_CLKS */
-	acc_clks = DIV_ROUND_UP(timings->tREA_max, t_clk);
+	acc_clks = DIV_ROUND_UP(timings->tREA_max, t_x);
 	acc_clks = min_t(int, acc_clks, ACC_CLKS__VALUE);
 
 	tmp = ioread32(denali->reg + ACC_CLKS);
@@ -975,7 +976,7 @@ static int denali_setup_data_interface(struct mtd_info *mtd, int chipnr,
 	iowrite32(tmp, denali->reg + ACC_CLKS);
 
 	/* tRWH -> RE_2_WE */
-	re_2_we = DIV_ROUND_UP(timings->tRHW_min, t_clk);
+	re_2_we = DIV_ROUND_UP(timings->tRHW_min, t_x);
 	re_2_we = min_t(int, re_2_we, RE_2_WE__VALUE);
 
 	tmp = ioread32(denali->reg + RE_2_WE);
@@ -984,7 +985,7 @@ static int denali_setup_data_interface(struct mtd_info *mtd, int chipnr,
 	iowrite32(tmp, denali->reg + RE_2_WE);
 
 	/* tRHZ -> RE_2_RE */
-	re_2_re = DIV_ROUND_UP(timings->tRHZ_max, t_clk);
+	re_2_re = DIV_ROUND_UP(timings->tRHZ_max, t_x);
 	re_2_re = min_t(int, re_2_re, RE_2_RE__VALUE);
 
 	tmp = ioread32(denali->reg + RE_2_RE);
@@ -998,8 +999,7 @@ static int denali_setup_data_interface(struct mtd_info *mtd, int chipnr,
 	 * With WE_2_RE properly set, the Denali controller automatically takes
 	 * care of the delay; the driver need not set NAND_WAIT_TCCS.
 	 */
-	we_2_re = DIV_ROUND_UP(max(timings->tCCS_min, timings->tWHR_min),
-			       t_clk);
+	we_2_re = DIV_ROUND_UP(max(timings->tCCS_min, timings->tWHR_min), t_x);
 	we_2_re = min_t(int, we_2_re, TWHR2_AND_WE_2_RE__WE_2_RE);
 
 	tmp = ioread32(denali->reg + TWHR2_AND_WE_2_RE);
@@ -1014,7 +1014,7 @@ static int denali_setup_data_interface(struct mtd_info *mtd, int chipnr,
 	if (denali->revision < 0x0501)
 		addr_2_data_mask >>= 1;
 
-	addr_2_data = DIV_ROUND_UP(timings->tADL_min, t_clk);
+	addr_2_data = DIV_ROUND_UP(timings->tADL_min, t_x);
 	addr_2_data = min_t(int, addr_2_data, addr_2_data_mask);
 
 	tmp = ioread32(denali->reg + TCWAW_AND_ADDR_2_DATA);
@@ -1024,7 +1024,7 @@ static int denali_setup_data_interface(struct mtd_info *mtd, int chipnr,
 
 	/* tREH, tWH -> RDWR_EN_HI_CNT */
 	rdwr_en_hi = DIV_ROUND_UP(max(timings->tREH_min, timings->tWH_min),
-				  t_clk);
+				  t_x);
 	rdwr_en_hi = min_t(int, rdwr_en_hi, RDWR_EN_HI_CNT__VALUE);
 
 	tmp = ioread32(denali->reg + RDWR_EN_HI_CNT);
@@ -1033,11 +1033,10 @@ static int denali_setup_data_interface(struct mtd_info *mtd, int chipnr,
 	iowrite32(tmp, denali->reg + RDWR_EN_HI_CNT);
 
 	/* tRP, tWP -> RDWR_EN_LO_CNT */
-	rdwr_en_lo = DIV_ROUND_UP(max(timings->tRP_min, timings->tWP_min),
-				  t_clk);
+	rdwr_en_lo = DIV_ROUND_UP(max(timings->tRP_min, timings->tWP_min), t_x);
 	rdwr_en_lo_hi = DIV_ROUND_UP(max(timings->tRC_min, timings->tWC_min),
-				     t_clk);
-	rdwr_en_lo_hi = max(rdwr_en_lo_hi, DENALI_CLK_X_MULT);
+				     t_x);
+	rdwr_en_lo_hi = max_t(int, rdwr_en_lo_hi, mult_x);
 	rdwr_en_lo = max(rdwr_en_lo, rdwr_en_lo_hi - rdwr_en_hi);
 	rdwr_en_lo = min_t(int, rdwr_en_lo, RDWR_EN_LO_CNT__VALUE);
 
@@ -1047,8 +1046,8 @@ static int denali_setup_data_interface(struct mtd_info *mtd, int chipnr,
 	iowrite32(tmp, denali->reg + RDWR_EN_LO_CNT);
 
 	/* tCS, tCEA -> CS_SETUP_CNT */
-	cs_setup = max3((int)DIV_ROUND_UP(timings->tCS_min, t_clk) - rdwr_en_lo,
-			(int)DIV_ROUND_UP(timings->tCEA_max, t_clk) - acc_clks,
+	cs_setup = max3((int)DIV_ROUND_UP(timings->tCS_min, t_x) - rdwr_en_lo,
+			(int)DIV_ROUND_UP(timings->tCEA_max, t_x) - acc_clks,
 			0);
 	cs_setup = min_t(int, cs_setup, CS_SETUP_CNT__VALUE);
 
diff --git a/drivers/mtd/nand/raw/denali.h b/drivers/mtd/nand/raw/denali.h
index bdaea71f91..14aa34af03 100644
--- a/drivers/mtd/nand/raw/denali.h
+++ b/drivers/mtd/nand/raw/denali.h
@@ -293,6 +293,7 @@ struct udevice;
 
 struct denali_nand_info {
 	struct nand_chip nand;
+	unsigned long clk_rate;		/* core clock rate */
 	unsigned long clk_x_rate;	/* bus interface clock rate */
 	int active_bank;		/* currently selected bank */
 	struct udevice *dev;
diff --git a/drivers/mtd/nand/raw/denali_dt.c b/drivers/mtd/nand/raw/denali_dt.c
index 0d78bc16e6..979a72a5f7 100644
--- a/drivers/mtd/nand/raw/denali_dt.c
+++ b/drivers/mtd/nand/raw/denali_dt.c
@@ -119,6 +119,7 @@ static int denali_dt_probe(struct udevice *dev)
 	}
 
 	if (clk_x.dev) {
+		denali->clk_rate = clk_get_rate(&clk);
 		denali->clk_x_rate = clk_get_rate(&clk_x);
 	} else {
 		/*
@@ -127,6 +128,7 @@ static int denali_dt_probe(struct udevice *dev)
 		 */
 		dev_notice(dev,
 			   "necessary clock is missing. default clock rates are used.\n");
+		denali->clk_rate = 50000000;
 		denali->clk_x_rate = 200000000;
 	}
 

commit 577a294eea5e25282801ab30bae20998a64c3149
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Wed Dec 19 20:03:17 2018 +0900

    UPSTREAM: mtd: rawnand: denali_dt: add more clocks based on IP datasheet
    
    Based on Linux commit 6f1fe97bec349a1fd6c5a8c7c5998d759fe721d5
    
    Currently, denali_dt.c requires a single anonymous clock, but
    the Denali User's Guide requires three clocks for this IP:
    
     - clk: controller core clock
    
     - clk_x: bus interface clock
    
     - ecc_clk: clock at which ECC circuitry is run
    
    This commit supports these named clocks to represent the real hardware.
    
    For the backward compatibility, the driver still accepts a single clock
    just as before.  The clk_x_rate is taken from the clock driver again if
    the named clock "clk_x" is available.  This will happen only for future
    DT, hence the existing DT files are not affected.
    
    Change-Id: Ib1b3913554f5a3cad89f6ca919a3ca8e020bb1ad
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit a13fe7afe9cd79060ecb8ac03265a27ceb7d91eb)

diff --git a/drivers/mtd/nand/raw/denali_dt.c b/drivers/mtd/nand/raw/denali_dt.c
index c96512f2df..0d78bc16e6 100644
--- a/drivers/mtd/nand/raw/denali_dt.c
+++ b/drivers/mtd/nand/raw/denali_dt.c
@@ -63,7 +63,7 @@ static int denali_dt_probe(struct udevice *dev)
 {
 	struct denali_nand_info *denali = dev_get_priv(dev);
 	const struct denali_dt_data *data;
-	struct clk clk;
+	struct clk clk, clk_x, clk_ecc;
 	struct resource res;
 	int ret;
 
@@ -88,15 +88,47 @@ static int denali_dt_probe(struct udevice *dev)
 
 	denali->host = devm_ioremap(dev, res.start, resource_size(&res));
 
-	ret = clk_get_by_index(dev, 0, &clk);
+	ret = clk_get_by_name(dev, "nand", &clk);
+	if (ret)
+		ret = clk_get_by_index(dev, 0, &clk);
 	if (ret)
 		return ret;
 
+	ret = clk_get_by_name(dev, "nand_x", &clk_x);
+	if (ret)
+		clk_x.dev = NULL;
+
+	ret = clk_get_by_name(dev, "ecc", &clk_ecc);
+	if (ret)
+		clk_ecc.dev = NULL;
+
 	ret = clk_enable(&clk);
 	if (ret)
 		return ret;
 
-	denali->clk_x_rate = clk_get_rate(&clk);
+	if (clk_x.dev) {
+		ret = clk_enable(&clk_x);
+		if (ret)
+			return ret;
+	}
+
+	if (clk_ecc.dev) {
+		ret = clk_enable(&clk_ecc);
+		if (ret)
+			return ret;
+	}
+
+	if (clk_x.dev) {
+		denali->clk_x_rate = clk_get_rate(&clk_x);
+	} else {
+		/*
+		 * Hardcode the clock rates for the backward compatibility.
+		 * This works for both SOCFPGA and UniPhier.
+		 */
+		dev_notice(dev,
+			   "necessary clock is missing. default clock rates are used.\n");
+		denali->clk_x_rate = 200000000;
+	}
 
 	return denali_init(denali);
 }

commit 1ed65f0297874bd2af8ba83ac8425b97b338860b
Author: Boris Brezillon <boris.brezillon@bootlin.com>
Date:   Sun Dec 2 10:54:32 2018 +0100

    UPSTREAM: mtd: sf: Make sf_mtd.c more robust
    
    SPI flash based MTD devs can be registered/unregistered at any time
    through the sf probe command or the spi_flash_free() function.
    
    This commit does not try to fix the root cause as it would probably
    require rewriting most of the code and have an mtd_info object
    instance per spi_flash object (not to mention that the the spi-flash
    layer is likely to be replaced by a spi-nor layer ported from Linux).
    
    Instead, we try to be as safe as can be by checking the code returned
    by del_mtd_device() and complain loudly when there's nothing we can
    do about the deregistration failure. When that happens we also reset
    sf_mtd_info.priv to NULL, and check for NULL pointer in the mtd hooks
    so that -ENODEV is returned instead of hitting a NULL pointer
    dereference exception when the MTD instance is later accessed by a user.
    
    Change-Id: I5dc19ed7c6d6809957a5968c3790f01c32c26acb
    Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
    Tested-by: Heiko Schocher <hs@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 08898e8b22d74a4511eadee9b06b11aab43e809c)

diff --git a/drivers/mtd/spi/sf_mtd.c b/drivers/mtd/spi/sf_mtd.c
index 8e04504d6a..1c2a8c2799 100644
--- a/drivers/mtd/spi/sf_mtd.c
+++ b/drivers/mtd/spi/sf_mtd.c
@@ -19,6 +19,9 @@ static int spi_flash_mtd_erase(struct mtd_info *mtd, struct erase_info *instr)
 	struct spi_flash *flash = mtd->priv;
 	int err;
 
+	if (!flash)
+		return -ENODEV;
+
 	instr->state = MTD_ERASING;
 
 	err = spi_flash_erase(flash, instr->addr, instr->len);
@@ -40,6 +43,9 @@ static int spi_flash_mtd_read(struct mtd_info *mtd, loff_t from, size_t len,
 	struct spi_flash *flash = mtd->priv;
 	int err;
 
+	if (!flash)
+		return -ENODEV;
+
 	err = spi_flash_read(flash, from, len, buf);
 	if (!err)
 		*retlen = len;
@@ -53,6 +59,9 @@ static int spi_flash_mtd_write(struct mtd_info *mtd, loff_t to, size_t len,
 	struct spi_flash *flash = mtd->priv;
 	int err;
 
+	if (!flash)
+		return -ENODEV;
+
 	err = spi_flash_write(flash, to, len, buf);
 	if (!err)
 		*retlen = len;
@@ -77,8 +86,13 @@ int spi_flash_mtd_register(struct spi_flash *flash)
 {
 	int ret;
 
-	if (sf_mtd_registered)
-		del_mtd_device(&sf_mtd_info);
+	if (sf_mtd_registered) {
+		ret = del_mtd_device(&sf_mtd_info);
+		if (ret)
+			return ret;
+
+		sf_mtd_registered = false;
+	}
 
 	sf_mtd_registered = false;
 	memset(&sf_mtd_info, 0, sizeof(sf_mtd_info));
@@ -111,5 +125,24 @@ int spi_flash_mtd_register(struct spi_flash *flash)
 
 void spi_flash_mtd_unregister(void)
 {
-	del_mtd_device(&sf_mtd_info);
+	int ret;
+
+	if (!sf_mtd_registered)
+		return;
+
+	ret = del_mtd_device(&sf_mtd_info);
+	if (!ret) {
+		sf_mtd_registered = false;
+		return;
+	}
+
+	/*
+	 * Setting mtd->priv to NULL is the best we can do. Thanks to that,
+	 * the MTD layer can still call mtd hooks without risking a
+	 * use-after-free bug. Still, things should be fixed to prevent the
+	 * spi_flash object from being destroyed when del_mtd_device() fails.
+	 */
+	sf_mtd_info.priv = NULL;
+	printf("Failed to unregister MTD %s and the spi_flash object is going away: you're in deep trouble!",
+	       sf_mtd_info.name);
 }

commit 2233bdccd1114bd16338848ba75026f572cbd191
Author: Boris Brezillon <boris.brezillon@bootlin.com>
Date:   Sun Dec 2 10:54:31 2018 +0100

    UPSTREAM: mtd: sf: Unregister the MTD device prior to removing the spi_flash obj
    
    The DM implementation of spi_flash_free() does not unregister the MTD
    device before removing the spi dev object. This leads to a use-after-free
    bug when the MTD device is later accessed by a MTD user (observed when
    attaching the device to UBI after env_sf_load() has called
    spi_flash_free()).
    
    Implement ->remove() and call spi_flash_mtd_unregister() from there.
    
    Fixes: 9fe6d8716e09 ("mtd, spi: Add MTD layer driver")
    Change-Id: I2d825a7cc4ac5a6ce9cf17d59cfe3fbe4e120bd0
    Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
    Tested-by: Heiko Schocher <hs@denx.de>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 7371944a71690abafd0717b5d5f72c67e9f0f414)

diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index 825b616556..30957d36fb 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -145,6 +145,14 @@ static int spi_flash_std_probe(struct udevice *dev)
 	return spi_flash_probe_slave(flash);
 }
 
+static int spi_flash_std_remove(struct udevice *dev)
+{
+#ifdef CONFIG_SPI_FLASH_MTD
+	spi_flash_mtd_unregister();
+#endif
+	return 0;
+}
+
 static const struct dm_spi_flash_ops spi_flash_std_ops = {
 	.read = spi_flash_std_read,
 	.write = spi_flash_std_write,
@@ -162,6 +170,7 @@ U_BOOT_DRIVER(spi_flash_std) = {
 	.id		= UCLASS_SPI_FLASH,
 	.of_match	= spi_flash_std_ids,
 	.probe		= spi_flash_std_probe,
+	.remove		= spi_flash_std_remove,
 	.priv_auto_alloc_size = sizeof(struct spi_flash),
 	.ops		= &spi_flash_std_ops,
 };

commit ef964b0175615a3d0352ee21566df96e00044114
Author: Boris Brezillon <boris.brezillon@bootlin.com>
Date:   Sun Dec 2 10:54:30 2018 +0100

    UPSTREAM: mtd: Don't stop MTD partition creation when it fails on one device
    
    MTD partition creation code is a bit tricky. It tries to figure out
    when things have changed (either MTD dev list or mtdparts/mtdids vars)
    and when that happens it first deletes all the partitions that had been
    previously created and then creates the new ones based on the new
    mtdparts/mtdids values.
    But before deleting the old partitions, it ensures that none of the
    currently registered parts are being used and bails out when that's
    not the case. So, we end up in a situation where, if at least one MTD
    dev has one of its partitions used by someone (UBI for instance), the
    partitions update logic no longer works for other devs.
    
    Rework the code to relax the logic and allow updates of MTD parts on
    devices that are not being used (we still refuse to updates parts on
    devices who have at least one of their partitions used by someone).
    
    Fixes: 5db66b3aee6f ("cmd: mtd: add 'mtd' command")
    Change-Id: I789ff4aef0fa6e25a85e48ef7a98cfcead4b81bb
    Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
    Tested-by: Heiko Schocher <hs@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 4a5594fa20d0fa6479f477d2bd67967aca201c2f)

diff --git a/drivers/mtd/mtd_uboot.c b/drivers/mtd/mtd_uboot.c
index 7783eedf23..2344864492 100644
--- a/drivers/mtd/mtd_uboot.c
+++ b/drivers/mtd/mtd_uboot.c
@@ -150,6 +150,54 @@ static const char *get_mtdparts(void)
 	return mtdparts;
 }
 
+static int mtd_del_parts(struct mtd_info *mtd, bool quiet)
+{
+	int ret;
+
+	if (!mtd_has_partitions(mtd))
+		return 0;
+
+	/* do not delete partitions if they are in use. */
+	if (mtd_partitions_used(mtd)) {
+		if (!quiet)
+			printf("\"%s\" partitions still in use, can't delete them\n",
+			       mtd->name);
+		return -EACCES;
+	}
+
+	ret = del_mtd_partitions(mtd);
+	if (ret)
+		return ret;
+
+	return 1;
+}
+
+static bool mtd_del_all_parts_failed;
+
+static void mtd_del_all_parts(void)
+{
+	struct mtd_info *mtd;
+	int ret = 0;
+
+	mtd_del_all_parts_failed = false;
+
+	/*
+	 * It is not safe to remove entries from the mtd_for_each_device loop
+	 * as it uses idr indexes and the partitions removal is done in bulk
+	 * (all partitions of one device at the same time), so break and
+	 * iterate from start each time a new partition is found and deleted.
+	 */
+	do {
+		mtd_for_each_device(mtd) {
+			ret = mtd_del_parts(mtd, false);
+			if (ret > 0)
+				break;
+			else if (ret < 0)
+				mtd_del_all_parts_failed = true;
+		}
+	} while (ret > 0);
+}
+
 int mtd_probe_devices(void)
 {
 	static char *old_mtdparts;
@@ -157,18 +205,19 @@ int mtd_probe_devices(void)
 	const char *mtdparts = get_mtdparts();
 	const char *mtdids = get_mtdids();
 	const char *mtdparts_next = mtdparts;
-	bool remaining_partitions = true;
 	struct mtd_info *mtd;
 
 	mtd_probe_uclass_mtd_devs();
 
 	/*
-	 * Check if mtdparts/mtdids changed or if the MTD dev list was updated
-	 * since last call, otherwise: exit
+	 * Check if mtdparts/mtdids changed, if the MTD dev list was updated
+	 * or if our previous attempt to delete existing partititions failed.
+	 * In any of these cases we want to update the partitions, otherwise,
+	 * everything is up-to-date and we can return 0 directly.
 	 */
 	if ((!mtdparts && !old_mtdparts && !mtdids && !old_mtdids) ||
 	    (mtdparts && old_mtdparts && mtdids && old_mtdids &&
-	     !mtd_dev_list_updated() &&
+	     !mtd_dev_list_updated() && !mtd_del_all_parts_failed &&
 	     !strcmp(mtdparts, old_mtdparts) &&
 	     !strcmp(mtdids, old_mtdids)))
 		return 0;
@@ -179,32 +228,12 @@ int mtd_probe_devices(void)
 	old_mtdparts = strdup(mtdparts);
 	old_mtdids = strdup(mtdids);
 
-	/* If at least one partition is still in use, do not delete anything */
-	mtd_for_each_device(mtd) {
-		if (mtd->usecount) {
-			printf("Partition \"%s\" already in use, aborting\n",
-			       mtd->name);
-			return -EACCES;
-		}
-	}
-
 	/*
-	 * Everything looks clear, remove all partitions. It is not safe to
-	 * remove entries from the mtd_for_each_device loop as it uses idr
-	 * indexes and the partitions removal is done in bulk (all partitions of
-	 * one device at the same time), so break and iterate from start each
-	 * time a new partition is found and deleted.
+	 * Remove all old parts. Note that partition removal can fail in case
+	 * one of the partition is still being used by an MTD user, so this
+	 * does not guarantee that all old partitions are gone.
 	 */
-	while (remaining_partitions) {
-		remaining_partitions = false;
-		mtd_for_each_device(mtd) {
-			if (!mtd_is_partition(mtd) && mtd_has_partitions(mtd)) {
-				del_mtd_partitions(mtd);
-				remaining_partitions = true;
-				break;
-			}
-		}
-	}
+	mtd_del_all_parts();
 
 	/*
 	 * Call mtd_dev_list_updated() to clear updates generated by our own
@@ -279,6 +308,17 @@ int mtd_probe_devices(void)
 			}
 		}
 
+		/*
+		 * Call mtd_del_parts() again, even if it's already been called
+		 * in mtd_del_all_parts(). We need to know if old partitions are
+		 * still around (because they are still being used by someone),
+		 * and if they are, we shouldn't create new partitions, so just
+		 * skip this MTD device and try the next one.
+		 */
+		ret = mtd_del_parts(mtd, true);
+		if (ret < 0)
+			continue;
+
 		/*
 		 * Parse the MTD device partitions. It will update the mtdparts
 		 * pointer, create an array of parts (that must be freed), and
diff --git a/drivers/mtd/mtdpart.c b/drivers/mtd/mtdpart.c
index b1b6d27d7a..b330d22633 100644
--- a/drivers/mtd/mtdpart.c
+++ b/drivers/mtd/mtdpart.c
@@ -64,6 +64,18 @@ char *kstrdup(const char *s, gfp_t gfp)
 #define MTD_SIZE_REMAINING		(~0LLU)
 #define MTD_OFFSET_NOT_SPECIFIED	(~0LLU)
 
+bool mtd_partitions_used(struct mtd_info *master)
+{
+	struct mtd_info *slave;
+
+	list_for_each_entry(slave, &master->partitions, node) {
+		if (slave->usecount)
+			return true;
+	}
+
+	return false;
+}
+
 /**
  * mtd_parse_partition - Parse @mtdparts partition definition, fill @partition
  *                       with it and update the @mtdparts string pointer.
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index f46a8fd256..ddd8e543fb 100644
--- a/include/linux/mtd/mtd.h
+++ b/include/linux/mtd/mtd.h
@@ -371,6 +371,8 @@ static inline bool mtd_has_partitions(const struct mtd_info *mtd)
 	return !list_empty(&mtd->partitions);
 }
 
+bool mtd_partitions_used(struct mtd_info *master);
+
 int mtd_ooblayout_ecc(struct mtd_info *mtd, int section,
 		      struct mtd_oob_region *oobecc);
 int mtd_ooblayout_find_eccregion(struct mtd_info *mtd, int eccbyte,

commit a38bf0a9b17c4255faece9db47065cc02b839f9a
Author: Boris Brezillon <boris.brezillon@bootlin.com>
Date:   Sun Dec 2 10:54:29 2018 +0100

    UPSTREAM: mtd: Make sure we don't parse MTD partitions belonging to another dev
    
    The mtdparts variable might contain partition definitions for several
    MTD devices. Each partition layout is separated by a ';', so let's
    make sure we don't pick a wrong name when mtdparts is malformed.
    
    Fixes: 5db66b3aee6f ("cmd: mtd: add 'mtd' command")
    Change-Id: I3d2678fb7b20da5705f4f94be8c454363cc2ecf1
    Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
    Tested-by: Heiko Schocher <hs@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 2428d9160b80375870c1fff6cbb0214639628282)

diff --git a/drivers/mtd/mtd_uboot.c b/drivers/mtd/mtd_uboot.c
index 448ac0236c..7783eedf23 100644
--- a/drivers/mtd/mtd_uboot.c
+++ b/drivers/mtd/mtd_uboot.c
@@ -156,6 +156,7 @@ int mtd_probe_devices(void)
 	static char *old_mtdids;
 	const char *mtdparts = get_mtdparts();
 	const char *mtdids = get_mtdids();
+	const char *mtdparts_next = mtdparts;
 	bool remaining_partitions = true;
 	struct mtd_info *mtd;
 
@@ -220,13 +221,22 @@ int mtd_probe_devices(void)
 		mtdparts += 9;
 
 	/* For each MTD device in mtdparts */
-	while (mtdparts[0] != '\0') {
+	for (; mtdparts[0] != '\0'; mtdparts = mtdparts_next) {
 		char mtd_name[MTD_NAME_MAX_LEN], *colon;
 		struct mtd_partition *parts;
 		unsigned int mtd_name_len;
 		int nparts, ret;
 
+		mtdparts_next = strchr(mtdparts, ';');
+		if (!mtdparts_next)
+			mtdparts_next = mtdparts + strlen(mtdparts);
+		else
+			mtdparts_next++;
+
 		colon = strchr(mtdparts, ':');
+		if (colon > mtdparts_next)
+			colon = NULL;
+
 		if (!colon) {
 			printf("Wrong mtdparts: %s\n", mtdparts);
 			return -EINVAL;
@@ -264,10 +274,7 @@ int mtd_probe_devices(void)
 			if (ret || IS_ERR_OR_NULL(mtd)) {
 				printf("Could not find a valid device for %s\n",
 				       mtd_name);
-				mtdparts = strchr(mtdparts, ';');
-				if (mtdparts)
-					mtdparts++;
-
+				mtdparts = mtdparts_next;
 				continue;
 			}
 		}

commit 7a13c786fea0ce3e6b583d8e3eefc15875abe2b1
Author: Boris Brezillon <boris.brezillon@bootlin.com>
Date:   Sun Dec 2 10:54:28 2018 +0100

    UPSTREAM: mtd: Make sure the name passed in mtdparts fits in mtd_name[]
    
    The local mtd_name[] variable is limited in size. Return an error if
    the name passed in mtdparts does not fit in this local var.
    
    Fixes: 5db66b3aee6f ("cmd: mtd: add 'mtd' command")
    Change-Id: I42886a7579c0550a2bf1913cf390a19d9b21e825
    Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
    Tested-by: Heiko Schocher <hs@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 772aa9799353d1d6bd6d9e2682945d4d7122539a)

diff --git a/drivers/mtd/mtd_uboot.c b/drivers/mtd/mtd_uboot.c
index a291a7b695..448ac0236c 100644
--- a/drivers/mtd/mtd_uboot.c
+++ b/drivers/mtd/mtd_uboot.c
@@ -223,8 +223,8 @@ int mtd_probe_devices(void)
 	while (mtdparts[0] != '\0') {
 		char mtd_name[MTD_NAME_MAX_LEN], *colon;
 		struct mtd_partition *parts;
-		int mtd_name_len, nparts;
-		int ret;
+		unsigned int mtd_name_len;
+		int nparts, ret;
 
 		colon = strchr(mtdparts, ':');
 		if (!colon) {
@@ -232,7 +232,12 @@ int mtd_probe_devices(void)
 			return -EINVAL;
 		}
 
-		mtd_name_len = colon - mtdparts;
+		mtd_name_len = (unsigned int)(colon - mtdparts);
+		if (mtd_name_len + 1 > sizeof(mtd_name)) {
+			printf("MTD name too long: %s\n", mtdparts);
+			return -EINVAL;
+		}
+
 		strncpy(mtd_name, mtdparts, mtd_name_len);
 		mtd_name[mtd_name_len] = '\0';
 		/* Move the pointer forward (including the ':') */

commit e3112a2cc31874c248ee0e1c42ad4c8647314f92
Author: Boris Brezillon <boris.brezillon@bootlin.com>
Date:   Sun Dec 2 10:54:27 2018 +0100

    UPSTREAM: mtd: Be more strict on the "mtdparts=" prefix check
    
    strstr() does not guarantee that the string we're searching for is
    placed at the beginning. Use strncmp() instead.
    
    Fixes: 5db66b3aee6f ("cmd: mtd: add 'mtd' command")
    Change-Id: Ia8da418501df1067f702fcd7b428cc3acde5b4e5
    Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
    Tested-by: Heiko Schocher <hs@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 429e048e4190b68b078c37c0012c59804e32818b)

diff --git a/drivers/mtd/mtd_uboot.c b/drivers/mtd/mtd_uboot.c
index f4b2e7136c..a291a7b695 100644
--- a/drivers/mtd/mtd_uboot.c
+++ b/drivers/mtd/mtd_uboot.c
@@ -216,7 +216,7 @@ int mtd_probe_devices(void)
 		return 0;
 
 	/* Start the parsing by ignoring the extra 'mtdparts=' prefix, if any */
-	if (strstr(mtdparts, "mtdparts="))
+	if (!strncmp(mtdparts, "mtdparts=", sizeof("mtdparts=") - 1))
 		mtdparts += 9;
 
 	/* For each MTD device in mtdparts */

commit 4ac4e964c5de70d65a3ddc93247785e14feef0fa
Author: Boris Brezillon <boris.brezillon@bootlin.com>
Date:   Sun Dec 2 10:54:26 2018 +0100

    UPSTREAM: mtd: Use get_mtdids() instead of env_get("mtdids") in mtd_search_alternate_name()
    
    The environment is not guaranteed to contain a valid mtdids variable
    when called from mtd_search_alternate_name(). Call get_mtdids() instead
    of env_get("mtdids").
    
    Fixes: ff4afa8a981e ("mtd: uboot: search for an equivalent MTD name with the mtdids")
    Change-Id: I6a0147009b60dd3c03799981971975fb40ce1283
    Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
    Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Tested-by: Heiko Schocher <hs@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 96b06434e56ce5dca391e8417d293132ff7164e0)

diff --git a/drivers/mtd/mtd_uboot.c b/drivers/mtd/mtd_uboot.c
index b12df3df0f..f4b2e7136c 100644
--- a/drivers/mtd/mtd_uboot.c
+++ b/drivers/mtd/mtd_uboot.c
@@ -14,6 +14,29 @@
 
 #define MTD_NAME_MAX_LEN 20
 
+void board_mtdparts_default(const char **mtdids, const char **mtdparts);
+
+static const char *get_mtdids(void)
+{
+	__maybe_unused const char *mtdparts = NULL;
+	const char *mtdids = env_get("mtdids");
+
+	if (mtdids)
+		return mtdids;
+
+#if defined(CONFIG_SYS_MTDPARTS_RUNTIME)
+	board_mtdparts_default(&mtdids, &mtdparts);
+#elif defined(MTDIDS_DEFAULT)
+	mtdids = MTDIDS_DEFAULT;
+#elif defined(CONFIG_MTDIDS_DEFAULT)
+	mtdids = CONFIG_MTDIDS_DEFAULT;
+#endif
+
+	if (mtdids)
+		env_set("mtdids", mtdids);
+
+	return mtdids;
+}
 
 /**
  * mtd_search_alternate_name - Search an alternate name for @mtdname thanks to
@@ -35,7 +58,7 @@ int mtd_search_alternate_name(const char *mtdname, char *altname,
 	const char *mtdids, *equal, *comma, *dev_id, *mtd_id;
 	int dev_id_len, mtd_id_len;
 
-	mtdids = env_get("mtdids");
+	mtdids = get_mtdids();
 	if (!mtdids)
 		return -EINVAL;
 
@@ -93,30 +116,6 @@ static void mtd_probe_uclass_mtd_devs(void) { }
 #endif
 
 #if defined(CONFIG_MTD_PARTITIONS)
-extern void board_mtdparts_default(const char **mtdids,
-				   const char **mtdparts);
-
-static const char *get_mtdids(void)
-{
-	__maybe_unused const char *mtdparts = NULL;
-	const char *mtdids = env_get("mtdids");
-
-	if (mtdids)
-		return mtdids;
-
-#if defined(CONFIG_SYS_MTDPARTS_RUNTIME)
-	board_mtdparts_default(&mtdids, &mtdparts);
-#elif defined(MTDIDS_DEFAULT)
-	mtdids = MTDIDS_DEFAULT;
-#elif defined(CONFIG_MTDIDS_DEFAULT)
-	mtdids = CONFIG_MTDIDS_DEFAULT;
-#endif
-
-	if (mtdids)
-		env_set("mtdids", mtdids);
-
-	return mtdids;
-}
 
 #define MTDPARTS_MAXLEN         512
 

commit c79c393fb9344b7e8c2200ec0933a0513cf8526d
Author: Boris Brezillon <boris.brezillon@bootlin.com>
Date:   Sun Dec 2 10:54:25 2018 +0100

    UPSTREAM: mtd: sf: Make sure we don't register the same device twice
    
    spi_flash_mtd_register() can be called several times and each time it
    will register the same mtd_info instance like if it was a new one.
    The MTD ID allocation gets crazy when that happens, so let's track the
    status of the sf_mtd_info object to avoid that.
    
    Fixes: 9fe6d8716e09 ("mtd, spi: Add MTD layer driver")
    Change-Id: Ia2c2778f275d0bf46371b5f914fcf1d1bbefdede
    Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
    Tested-by: Heiko Schocher <hs@denx.de>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 492151b2093ee4df173f7e10da4938ef7c2a2156)

diff --git a/drivers/mtd/spi/sf_mtd.c b/drivers/mtd/spi/sf_mtd.c
index 935ae4d2b9..8e04504d6a 100644
--- a/drivers/mtd/spi/sf_mtd.c
+++ b/drivers/mtd/spi/sf_mtd.c
@@ -11,6 +11,7 @@
 #include <spi_flash.h>
 
 static struct mtd_info sf_mtd_info;
+static bool sf_mtd_registered;
 static char sf_mtd_name[8];
 
 static int spi_flash_mtd_erase(struct mtd_info *mtd, struct erase_info *instr)
@@ -74,6 +75,12 @@ static int spi_flash_mtd_number(void)
 
 int spi_flash_mtd_register(struct spi_flash *flash)
 {
+	int ret;
+
+	if (sf_mtd_registered)
+		del_mtd_device(&sf_mtd_info);
+
+	sf_mtd_registered = false;
 	memset(&sf_mtd_info, 0, sizeof(sf_mtd_info));
 	sprintf(sf_mtd_name, "nor%d", spi_flash_mtd_number());
 
@@ -95,7 +102,11 @@ int spi_flash_mtd_register(struct spi_flash *flash)
 	sf_mtd_info.numeraseregions = 0;
 	sf_mtd_info.erasesize = flash->sector_size;
 
-	return add_mtd_device(&sf_mtd_info);
+	ret = add_mtd_device(&sf_mtd_info);
+	if (!ret)
+		sf_mtd_registered = true;
+
+	return ret;
 }
 
 void spi_flash_mtd_unregister(void)

commit 002d1762d9a3fdbfc7abeb59a3ab6b707c4562ac
Author: Boris Brezillon <boris.brezillon@bootlin.com>
Date:   Sun Dec 2 10:54:24 2018 +0100

    UPSTREAM: mtd: Delete partitions attached to the device when a device is deleted
    
    If we don't do that, partitions might still be exposed while the
    underlying device is gone.
    
    Fixes: 2a74930da57f ("mtd: mtdpart: implement proper partition handling")
    Change-Id: Ibf4a89f2caab24e6fdfb9c2dbd42fc4114b4bbe6
    Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
    Tested-by: Heiko Schocher <hs@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit a02820fca90ce9ccf243b3fce59c04dabd5671a8)

diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c
index 2ddc3af155..7bd4f3bc97 100644
--- a/drivers/mtd/mtdcore.c
+++ b/drivers/mtd/mtdcore.c
@@ -529,6 +529,13 @@ int del_mtd_device(struct mtd_info *mtd)
 	struct mtd_notifier *not;
 #endif
 
+	ret = del_mtd_partitions(mtd);
+	if (ret) {
+		debug("Failed to delete MTD partitions attached to %s (err %d)\n",
+		      mtd->name, ret);
+		return ret;
+	}
+
 	mutex_lock(&mtd_table_mutex);
 
 	if (idr_find(&mtd_idr, mtd->index) != mtd) {
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index e4c6c842e8..f46a8fd256 100644
--- a/include/linux/mtd/mtd.h
+++ b/include/linux/mtd/mtd.h
@@ -591,8 +591,23 @@ unsigned mtd_mmap_capabilities(struct mtd_info *mtd);
 /* drivers/mtd/mtdcore.h */
 int add_mtd_device(struct mtd_info *mtd);
 int del_mtd_device(struct mtd_info *mtd);
+
+#ifdef CONFIG_MTD_PARTITIONS
 int add_mtd_partitions(struct mtd_info *, const struct mtd_partition *, int);
 int del_mtd_partitions(struct mtd_info *);
+#else
+static inline int add_mtd_partitions(struct mtd_info *mtd,
+				     const struct mtd_partition *parts,
+				     int nparts)
+{
+	return 0;
+}
+
+static inline int del_mtd_partitions(struct mtd_info *mtd)
+{
+	return 0;
+}
+#endif
 
 struct mtd_info *__mtd_next_device(int i);
 #define mtd_for_each_device(mtd)			\

commit 4c33ae3b484d4e48a5aaa786df12d8cb55a68406
Author: Boris Brezillon <boris.brezillon@bootlin.com>
Date:   Sun Dec 2 10:54:23 2018 +0100

    UPSTREAM: mtd: Parse mtdparts/mtdids again when the MTD list has been updated
    
    Updates to the MTD device list should trigger a new parsing of the
    mtdids/mtdparts vars even if those vars haven't changed.
    
    Fixes: 5db66b3aee6f ("cmd: mtd: add 'mtd' command")
    Change-Id: I02c0e18d9ac70ab3b36f865d85746c8cf69c4d23
    Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
    Tested-by: Heiko Schocher <hs@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 779c9c0565a44e7dc5f72919d88f67fb7e280880)

diff --git a/drivers/mtd/mtd_uboot.c b/drivers/mtd/mtd_uboot.c
index 8ee1d69d83..b12df3df0f 100644
--- a/drivers/mtd/mtd_uboot.c
+++ b/drivers/mtd/mtd_uboot.c
@@ -162,9 +162,13 @@ int mtd_probe_devices(void)
 
 	mtd_probe_uclass_mtd_devs();
 
-	/* Check if mtdparts/mtdids changed since last call, otherwise: exit */
+	/*
+	 * Check if mtdparts/mtdids changed or if the MTD dev list was updated
+	 * since last call, otherwise: exit
+	 */
 	if ((!mtdparts && !old_mtdparts && !mtdids && !old_mtdids) ||
 	    (mtdparts && old_mtdparts && mtdids && old_mtdids &&
+	     !mtd_dev_list_updated() &&
 	     !strcmp(mtdparts, old_mtdparts) &&
 	     !strcmp(mtdids, old_mtdids)))
 		return 0;
@@ -202,6 +206,12 @@ int mtd_probe_devices(void)
 		}
 	}
 
+	/*
+	 * Call mtd_dev_list_updated() to clear updates generated by our own
+	 * parts removal loop.
+	 */
+	mtd_dev_list_updated();
+
 	/* If either mtdparts or mtdids is empty, then exit */
 	if (!mtdparts || !mtdids)
 		return 0;
@@ -282,6 +292,12 @@ int mtd_probe_devices(void)
 		put_mtd_device(mtd);
 	}
 
+	/*
+	 * Call mtd_dev_list_updated() to clear updates generated by our own
+	 * parts registration loop.
+	 */
+	mtd_dev_list_updated();
+
 	return 0;
 }
 #else

commit 90108c6c51a1d7dcea7ee7753f7af05735b371b4
Author: Boris Brezillon <boris.brezillon@bootlin.com>
Date:   Sun Dec 2 10:54:22 2018 +0100

    UPSTREAM: mtd: Add a function to report when the MTD dev list has been updated
    
    We need to parse mtdparts/mtids again everytime a device has been
    added/removed from the MTD list, but there's currently no way to know
    when such an update has been done.
    
    Add an ->updated field to the idr struct that we set to true every time
    a device is added/removed and expose a function returning the value
    of this field and resetting it to false.
    
    Change-Id: If7edb8fde01051087b43eb16683aca6b991daace
    Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
    Tested-by: Heiko Schocher <hs@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 4c47fd0b6bce62162e11b8a22e2eaf0d8f6673b1)

diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c
index d131a962a2..2ddc3af155 100644
--- a/drivers/mtd/mtdcore.c
+++ b/drivers/mtd/mtdcore.c
@@ -88,14 +88,17 @@ struct idr_layer {
 
 struct idr {
 	struct idr_layer id[MAX_IDR_ID];
+	bool updated;
 };
 
 #define DEFINE_IDR(name)	struct idr name;
 
 void idr_remove(struct idr *idp, int id)
 {
-	if (idp->id[id].used)
+	if (idp->id[id].used) {
 		idp->id[id].used = 0;
+		idp->updated = true;
+	}
 
 	return;
 }
@@ -135,6 +138,7 @@ int idr_alloc(struct idr *idp, void *ptr, int start, int end, gfp_t gfp_mask)
 		if (idl->used == 0) {
 			idl->used = 1;
 			idl->ptr = ptr;
+			idp->updated = true;
 			return i;
 		}
 		i++;
@@ -156,6 +160,16 @@ struct mtd_info *__mtd_next_device(int i)
 }
 EXPORT_SYMBOL_GPL(__mtd_next_device);
 
+bool mtd_dev_list_updated(void)
+{
+	if (mtd_idr.updated) {
+		mtd_idr.updated = false;
+		return true;
+	}
+
+	return false;
+}
+
 #ifndef __UBOOT__
 static LIST_HEAD(mtd_notifiers);
 
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index 32152869a5..e4c6c842e8 100644
--- a/include/linux/mtd/mtd.h
+++ b/include/linux/mtd/mtd.h
@@ -610,6 +610,7 @@ int mtd_arg_off_size(int argc, char *const argv[], int *idx, loff_t *off,
 void mtd_get_len_incl_bad(struct mtd_info *mtd, uint64_t offset,
 			  const uint64_t length, uint64_t *len_incl_bad,
 			  int *truncated);
+bool mtd_dev_list_updated(void);
 
 /* drivers/mtd/mtd_uboot.c */
 int mtd_search_alternate_name(const char *mtdname, char *altname,

commit ce9c7df5f501500413629e0fb1b39664e289c5bd
Author: Martin Lund <malu@gomspace.com>
Date:   Tue Oct 30 14:16:19 2018 +0100

    UPSTREAM: mtd: nand: Arasan: Add subpage configuration support
    
    Add support for disabling subpage write support via
    CONFIG_SYS_NAND_NO_SUBPAGE_WRITE.
    
    Currently the Linux Arasan driver does not support subpage writes and in
    case of running UBI and accessing the same UBI volume from both U-Boot
    and Linux it is required to have the same subpage write configuration
    else the location of the UBI headers (EC + VID) will be misaligned
    (subpage vs page) and incompatible. Hence the need for disabling
    subpage write support in the U-Boot Arasan NAND driver.
    
    Change-Id: Ifa8b66ae1a29efd8705da564ca83012fb8e1d7bd
    Signed-off-by: Martin Lund <malu@gomspace.com>
    Acked-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
    Signed-off-by: Michal Simek <michal.simek@xilinx.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 1cefca71d237aae2c5cc2445f7698941443a2cd9)

diff --git a/drivers/mtd/nand/raw/arasan_nfc.c b/drivers/mtd/nand/raw/arasan_nfc.c
index 3be66efb73..69137d02b7 100644
--- a/drivers/mtd/nand/raw/arasan_nfc.c
+++ b/drivers/mtd/nand/raw/arasan_nfc.c
@@ -1202,6 +1202,10 @@ static int arasan_nand_init(struct nand_chip *nand_chip, int devnum)
 	mtd = nand_to_mtd(nand_chip);
 	nand_set_controller_data(nand_chip, nand);
 
+#ifdef CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
+	nand_chip->options |= NAND_NO_SUBPAGE_WRITE;
+#endif
+
 	/* Set the driver entry points for MTD */
 	nand_chip->cmdfunc = arasan_nand_cmd_function;
 	nand_chip->select_chip = arasan_nand_select_chip;

commit b6abd93471efadb434552c93072d4204746e3214
Author: Miquel Raynal <miquel.raynal@bootlin.com>
Date:   Thu Oct 11 17:45:44 2018 +0200

    UPSTREAM: mtd: rawnand: pxa3xx: fix 2kiB pages with 8b strength chips layout
    
    The initial layout for such NAND chips was the following:
    
    +----------------------------------------------------------------------------+
    | 1024 (data) | 30 (ECC) | 1024 (data) | 30 (ECC) | 32 (free OOB) | 30 (ECC) |
    +----------------------------------------------------------------------------+
    
    This layout has a weakness: reading empty pages trigger ECC errors
    (this is expected), but the hardware ECC engine tries to correct the
    data anyway and creates itself bitflips, hence bitflips are detected
    in erased pages while actually there are none in the NAND chip.
    
    Two solutions have been found at the same time. One was to enlarge the
    free OOB area to 64 bytes, changing the layout to be:
    
    +----------------------------------------------------------------------------+
    | 1024 (data) | 30 (ECC) | 1024 (data) | 30 (ECC) | 64 (free OOB) | 30 (ECC) |
    +----------------------------------------------------------------------------+
                                                        ^^
    
    The very big drawbacks of this solution are:
    1/ It prevents booting from NAND.
    2/ The current Linux driver (marvell_nand) does not have such problem
    because it already re-reads possible empty pages in raw mode before
    checking for bitflips. Using different layouts in U-Boot and Linux
    would simply not work.
    
    As this driver does support raw reads now and uses it to check for
    empty pages, let's forget about this broken hack and return to the
    initial layout with only 32 free OOB bytes.
    
    Fixes: ac56a3b30c ("mtd: nand: pxa3xx: add support for 2KB 8-bit flash")
    Change-Id: Ie0c901afa1ad8d525957e8ebb5211cf2a741901e
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Acked-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit c907464a0ad5f1327a3873e9d0ffd617a0182a44)

diff --git a/drivers/mtd/nand/raw/pxa3xx_nand.c b/drivers/mtd/nand/raw/pxa3xx_nand.c
index 8a524dc574..a9c2a5e227 100644
--- a/drivers/mtd/nand/raw/pxa3xx_nand.c
+++ b/drivers/mtd/nand/raw/pxa3xx_nand.c
@@ -328,14 +328,14 @@ static struct nand_ecclayout ecc_layout_2KB_bch4bit = {
 static struct nand_ecclayout ecc_layout_2KB_bch8bit = {
 	.eccbytes = 64,
 	.eccpos = {
-		64,  65,  66,  67,  68,  69,  70,  71,
-		72,  73,  74,  75,  76,  77,  78,  79,
-		80,  81,  82,  83,  84,  85,  86,  87,
-		88,  89,  90,  91,  92,  93,  94,  95,
-		96,  97,  98,  99,  100, 101, 102, 103,
-		104, 105, 106, 107, 108, 109, 110, 111,
-		112, 113, 114, 115, 116, 117, 118, 119,
-		120, 121, 122, 123, 124, 125, 126, 127},
+		32, 33, 34, 35, 36, 37, 38, 39,
+		40, 41, 42, 43, 44, 45, 46, 47,
+		48, 49, 50, 51, 52, 53, 54, 55,
+		56, 57, 58, 59, 60, 61, 62, 63,
+		64, 65, 66, 67, 68, 69, 70, 71,
+		72, 73, 74, 75, 76, 77, 78, 79,
+		80, 81, 82, 83, 84, 85, 86, 87,
+		88, 89, 90, 91, 92, 93, 94, 95},
 	.oobfree = { {1, 4}, {6, 26} }
 };
 
@@ -1592,7 +1592,7 @@ static int pxa_ecc_init(struct pxa3xx_nand_info *info,
 		info->chunk_size = 1024;
 		info->spare_size = 0;
 		info->last_chunk_size = 1024;
-		info->last_spare_size = 64;
+		info->last_spare_size = 32;
 		info->ecc_size = 32;
 		ecc->mode = NAND_ECC_HW;
 		ecc->size = info->chunk_size;

commit 0477a061ba2505408a619ce79f9bc052e5e3633a
Author: Miquel Raynal <miquel.raynal@bootlin.com>
Date:   Thu Oct 11 17:45:43 2018 +0200

    UPSTREAM: mtd: nand: pxa3xx: re-read a page in raw mode on uncorrectable error
    
    This only applies on BCH path.
    
    When an empty page is read, it triggers an uncorrectable error. While
    this is expected, the ECC engine might produce itself bitflips in the
    read data under certain layouts. To overcome this situation, always
    re-read the entire page in raw mode and check for the whole page to be
    empty.
    
    Also report the right number of bitflips if there are any.
    
    Change-Id: Ia83b841b91fc58c9c1640690a244965c92c8ce60
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Acked-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit af61ea27f51fce62188276d7b5682ac51b03a705)

diff --git a/drivers/mtd/nand/raw/pxa3xx_nand.c b/drivers/mtd/nand/raw/pxa3xx_nand.c
index 843e102da6..8a524dc574 100644
--- a/drivers/mtd/nand/raw/pxa3xx_nand.c
+++ b/drivers/mtd/nand/raw/pxa3xx_nand.c
@@ -1238,6 +1238,7 @@ static int pxa3xx_nand_read_page_hwecc(struct mtd_info *mtd,
 {
 	struct pxa3xx_nand_host *host = nand_get_controller_data(chip);
 	struct pxa3xx_nand_info *info = host->info_data;
+	int bf;
 
 	chip->read_buf(mtd, buf, mtd->writesize);
 	chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
@@ -1245,12 +1246,30 @@ static int pxa3xx_nand_read_page_hwecc(struct mtd_info *mtd,
 	if (info->retcode == ERR_CORERR && info->use_ecc) {
 		mtd->ecc_stats.corrected += info->ecc_err_cnt;
 
-	} else if (info->retcode == ERR_UNCORERR) {
+	} else if (info->retcode == ERR_UNCORERR && info->ecc_bch) {
 		/*
-		 * for blank page (all 0xff), HW will calculate its ECC as
-		 * 0, which is different from the ECC information within
-		 * OOB, ignore such uncorrectable errors
+		 * Empty pages will trigger uncorrectable errors. Re-read the
+		 * entire page in raw mode and check for bits not being "1".
+		 * If there are more than the supported strength, then it means
+		 * this is an actual uncorrectable error.
 		 */
+		chip->ecc.read_page_raw(mtd, chip, buf, oob_required, page);
+		bf = nand_check_erased_ecc_chunk(buf, mtd->writesize,
+						 chip->oob_poi, mtd->oobsize,
+						 NULL, 0, chip->ecc.strength);
+		if (bf < 0) {
+			mtd->ecc_stats.failed++;
+		} else if (bf) {
+			mtd->ecc_stats.corrected += bf;
+			info->max_bitflips = max_t(unsigned int,
+						   info->max_bitflips, bf);
+			info->retcode = ERR_CORERR;
+		} else {
+			info->retcode = ERR_NONE;
+		}
+
+	} else if (info->retcode == ERR_UNCORERR && !info->ecc_bch) {
+		/* Raw read is not supported with Hamming ECC engine */
 		if (is_buf_blank(buf, mtd->writesize))
 			info->retcode = ERR_NONE;
 		else

commit c33740a3ecb6f35a895bccdf6f42bbda5e8eb0df
Author: Miquel Raynal <miquel.raynal@bootlin.com>
Date:   Thu Oct 11 17:45:42 2018 +0200

    UPSTREAM: mtd: nand: pxa3xx: add raw read support
    
    Raw read support is added by editing a few code sections:
    
        ->handle_data_pio() includes the ECC bytes that are not consumed
        anymore by the ECC engine.
    
        ->prepare_set_command() is changed so that the ECC bytes are
        requested as part of the data I/O length.
    
        ->drain_fifo() shall also avoid checking the R/B pin too often
        when in raw mode.
    
        ->read_page_raw()/->read_oob_raw() are written from scratch.
    
    Change-Id: Ic086aa685a84325bd37c7db3f900343682776045
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Acked-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 6293b0361d9816dc5286cd766d4865a30ebdfb6f)

diff --git a/drivers/mtd/nand/raw/pxa3xx_nand.c b/drivers/mtd/nand/raw/pxa3xx_nand.c
index cf8551fce2..843e102da6 100644
--- a/drivers/mtd/nand/raw/pxa3xx_nand.c
+++ b/drivers/mtd/nand/raw/pxa3xx_nand.c
@@ -196,6 +196,7 @@ struct pxa3xx_nand_info {
 
 	int			cs;
 	int			use_ecc;	/* use HW ECC ? */
+	int			force_raw;	/* prevent use_ecc to be set */
 	int			ecc_bch;	/* using BCH ECC? */
 	int			use_spare;	/* use spare ? */
 	int			need_wait;
@@ -580,7 +581,7 @@ static void disable_int(struct pxa3xx_nand_info *info, uint32_t int_mask)
 
 static void drain_fifo(struct pxa3xx_nand_info *info, void *data, int len)
 {
-	if (info->ecc_bch) {
+	if (info->ecc_bch && !info->force_raw) {
 		u32 ts;
 
 		/*
@@ -613,12 +614,22 @@ static void drain_fifo(struct pxa3xx_nand_info *info, void *data, int len)
 
 static void handle_data_pio(struct pxa3xx_nand_info *info)
 {
+	int data_len = info->step_chunk_size;
+
+	/*
+	 * In raw mode, include the spare area and the ECC bytes that are not
+	 * consumed by the controller in the data section. Do not reorganize
+	 * here, do it in the ->read_page_raw() handler instead.
+	 */
+	if (info->force_raw)
+		data_len += info->step_spare_size + info->ecc_size;
+
 	switch (info->state) {
 	case STATE_PIO_WRITING:
 		if (info->step_chunk_size)
 			writesl(info->mmio_base + NDDB,
 				info->data_buff + info->data_buff_pos,
-				DIV_ROUND_UP(info->step_chunk_size, 4));
+				DIV_ROUND_UP(data_len, 4));
 
 		if (info->step_spare_size)
 			writesl(info->mmio_base + NDDB,
@@ -629,7 +640,10 @@ static void handle_data_pio(struct pxa3xx_nand_info *info)
 		if (info->step_chunk_size)
 			drain_fifo(info,
 				   info->data_buff + info->data_buff_pos,
-				   DIV_ROUND_UP(info->step_chunk_size, 4));
+				   DIV_ROUND_UP(data_len, 4));
+
+		if (info->force_raw)
+			break;
 
 		if (info->step_spare_size)
 			drain_fifo(info,
@@ -643,7 +657,7 @@ static void handle_data_pio(struct pxa3xx_nand_info *info)
 	}
 
 	/* Update buffer pointers for multi-page read/write */
-	info->data_buff_pos += info->step_chunk_size;
+	info->data_buff_pos += data_len;
 	info->oob_buff_pos += info->step_spare_size;
 }
 
@@ -797,7 +811,8 @@ static void prepare_start_command(struct pxa3xx_nand_info *info, int command)
 	case NAND_CMD_READ0:
 	case NAND_CMD_READOOB:
 	case NAND_CMD_PAGEPROG:
-		info->use_ecc = 1;
+		if (!info->force_raw)
+			info->use_ecc = 1;
 		break;
 	case NAND_CMD_PARAM:
 		info->use_spare = 0;
@@ -867,7 +882,13 @@ static int prepare_set_command(struct pxa3xx_nand_info *info, int command,
 		 * which is either naked-read or last-read according to the
 		 * state.
 		 */
-		if (mtd->writesize == info->chunk_size) {
+		if (info->force_raw) {
+			info->ndcb0 |= NDCB0_DBC | (NAND_CMD_READSTART << 8) |
+				       NDCB0_LEN_OVRD |
+				       NDCB0_EXT_CMD_TYPE(ext_cmd_type);
+			info->ndcb3 = info->step_chunk_size +
+				      info->step_spare_size + info->ecc_size;
+		} else if (mtd->writesize == info->chunk_size) {
 			info->ndcb0 |= NDCB0_DBC | (NAND_CMD_READSTART << 8);
 		} else if (mtd->writesize > info->chunk_size) {
 			info->ndcb0 |= NDCB0_DBC | (NAND_CMD_READSTART << 8)
@@ -1239,6 +1260,69 @@ static int pxa3xx_nand_read_page_hwecc(struct mtd_info *mtd,
 	return info->max_bitflips;
 }
 
+static int pxa3xx_nand_read_page_raw(struct mtd_info *mtd,
+				     struct nand_chip *chip, uint8_t *buf,
+				     int oob_required, int page)
+{
+	struct pxa3xx_nand_host *host = chip->priv;
+	struct pxa3xx_nand_info *info = host->info_data;
+	int chunk, ecc_off_buf;
+
+	if (!info->ecc_bch)
+		return -ENOTSUPP;
+
+	/*
+	 * Set the force_raw boolean, then re-call ->cmdfunc() that will run
+	 * pxa3xx_nand_start(), which will actually disable the ECC engine.
+	 */
+	info->force_raw = true;
+	chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);
+
+	ecc_off_buf = (info->nfullchunks * info->spare_size) +
+		      info->last_spare_size;
+	for (chunk = 0; chunk < info->nfullchunks; chunk++) {
+		chip->read_buf(mtd,
+			       buf + (chunk * info->chunk_size),
+			       info->chunk_size);
+		chip->read_buf(mtd,
+			       chip->oob_poi +
+			       (chunk * (info->spare_size)),
+			       info->spare_size);
+		chip->read_buf(mtd,
+			       chip->oob_poi + ecc_off_buf +
+			       (chunk * (info->ecc_size)),
+			       info->ecc_size - 2);
+	}
+
+	if (info->ntotalchunks > info->nfullchunks) {
+		chip->read_buf(mtd,
+			       buf + (info->nfullchunks * info->chunk_size),
+			       info->last_chunk_size);
+		chip->read_buf(mtd,
+			       chip->oob_poi +
+			       (info->nfullchunks * (info->spare_size)),
+			       info->last_spare_size);
+		chip->read_buf(mtd,
+			       chip->oob_poi + ecc_off_buf +
+			       (info->nfullchunks * (info->ecc_size)),
+			       info->ecc_size - 2);
+	}
+
+	info->force_raw = false;
+
+	return 0;
+}
+
+static int pxa3xx_nand_read_oob_raw(struct mtd_info *mtd,
+				    struct nand_chip *chip, int page)
+{
+	/* Invalidate page cache */
+	chip->pagebuf = -1;
+
+	return chip->ecc.read_page_raw(mtd, chip, chip->buffers->databuf, true,
+				       page);
+}
+
 static uint8_t pxa3xx_nand_read_byte(struct mtd_info *mtd)
 {
 	struct nand_chip *chip = mtd_to_nand(mtd);
@@ -1670,6 +1754,8 @@ static int alloc_nand_resource(struct pxa3xx_nand_info *info)
 
 		nand_set_controller_data(chip, host);
 		chip->ecc.read_page	= pxa3xx_nand_read_page_hwecc;
+		chip->ecc.read_page_raw	= pxa3xx_nand_read_page_raw;
+		chip->ecc.read_oob_raw	= pxa3xx_nand_read_oob_raw;
 		chip->ecc.write_page	= pxa3xx_nand_write_page_hwecc;
 		chip->controller        = &info->controller;
 		chip->waitfunc		= pxa3xx_nand_waitfunc;

commit b6e92505d54995de560d9232c3a0afe8c35b7727
Author: Simon Glass <sjg@chromium.org>
Date:   Tue Nov 6 15:21:41 2018 -0700

    UPSTREAM: sf: Add a method to obtain the block-protect setting
    
    It is useful to obtain the block-protect setting of the SPI flash, so we
    know whether it is fully open or (perhaps partially) write-protected. Add
    a method for this. Update the sandbox driver to process this operation and
    add a test.
    
    Signed-off-by: Simon Glass <sjg@chromium.org
    Change-Id: I8e8abe197ab483a26622f02666cc234a1544e642
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit a58986ca8b53d8c7a441397082f84edc7f47d19f)

diff --git a/arch/sandbox/include/asm/test.h b/arch/sandbox/include/asm/test.h
index 451a78e590..8db580b513 100644
--- a/arch/sandbox/include/asm/test.h
+++ b/arch/sandbox/include/asm/test.h
@@ -79,4 +79,35 @@ long sandbox_i2c_rtc_get_set_base_time(struct udevice *dev, long base_time);
 
 int sandbox_usb_keyb_add_string(struct udevice *dev, const char *str);
 
+/**
+ * sandbox_osd_get_mem() - get the internal memory of a sandbox OSD
+ *
+ * @dev:	OSD device for which to access the internal memory for
+ * @buf:	pointer to buffer to receive the OSD memory data
+ * @buflen:	length of buffer in bytes
+ */
+int sandbox_osd_get_mem(struct udevice *dev, u8 *buf, size_t buflen);
+
+/**
+ * sandbox_pwm_get_config() - get the PWM config for a channel
+ *
+ * @dev: Device to check
+ * @channel: Channel number to check
+ * @period_ns: Period of the PWM in nanoseconds
+ * @duty_ns: Current duty cycle of the PWM in nanoseconds
+ * @enable: true if the PWM is enabled
+ * @polarity: true if the PWM polarity is active high
+ * @return 0 if OK, -ENOSPC if the PWM number is invalid
+ */
+int sandbox_pwm_get_config(struct udevice *dev, uint channel, uint *period_nsp,
+			   uint *duty_nsp, bool *enablep, bool *polarityp);
+
+/**
+ * sandbox_sf_set_block_protect() - Set the BP bits of the status register
+ *
+ * @dev: Device to update
+ * @bp_mask: BP bits to set (bits 2:0, so a value of 0 to 7)
+ */
+void sandbox_sf_set_block_protect(struct udevice *dev, int bp_mask);
+
 #endif
diff --git a/drivers/mtd/spi/sandbox.c b/drivers/mtd/spi/sandbox.c
index a8ffde240d..92588740b5 100644
--- a/drivers/mtd/spi/sandbox.c
+++ b/drivers/mtd/spi/sandbox.c
@@ -59,6 +59,8 @@ static const char *sandbox_sf_state_name(enum sandbox_sf_state state)
 /* Bits for the status register */
 #define STAT_WIP	(1 << 0)
 #define STAT_WEL	(1 << 1)
+#define STAT_BP_SHIFT	2
+#define STAT_BP_MASK	(7 << STAT_BP_SHIFT)
 
 /* Assume all SPI flashes have 3 byte addresses since they do atm */
 #define SF_ADDR_LEN	3
@@ -104,6 +106,14 @@ struct sandbox_spi_flash_plat_data {
 	int cs;
 };
 
+void sandbox_sf_set_block_protect(struct udevice *dev, int bp_mask)
+{
+	struct sandbox_spi_flash *sbsf = dev_get_priv(dev);
+
+	sbsf->status &= ~STAT_BP_MASK;
+	sbsf->status |= bp_mask << STAT_BP_SHIFT;
+}
+
 /**
  * This is a very strange probe function. If it has platform data (which may
  * have come from the device tree) then this function gets the filename and
diff --git a/drivers/mtd/spi/sf-uclass.c b/drivers/mtd/spi/sf-uclass.c
index 538f41787f..0843473247 100644
--- a/drivers/mtd/spi/sf-uclass.c
+++ b/drivers/mtd/spi/sf-uclass.c
@@ -29,6 +29,15 @@ int spi_flash_erase_dm(struct udevice *dev, u32 offset, size_t len)
 	return log_ret(sf_get_ops(dev)->erase(dev, offset, len));
 }
 
+int spl_flash_get_sw_write_prot(struct udevice *dev)
+{
+	struct dm_spi_flash_ops *ops = sf_get_ops(dev);
+
+	if (!ops->get_sw_write_prot)
+		return -ENOSYS;
+	return log_ret(ops->get_sw_write_prot(dev));
+}
+
 /*
  * TODO(sjg@chromium.org): This is an old-style function. We should remove
  * it when all SPI flash drivers use dm
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index fb41cd5e96..c15cec8eed 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -172,6 +172,9 @@ int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len,
 /* Flash erase(sectors) operation, support all possible erase commands */
 int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len);
 
+/* Get software write-protect value (BP bits) */
+int spi_flash_cmd_get_sw_write_prot(struct spi_flash *flash);
+
 /* Lock stmicro spi flash region */
 int stm_lock(struct spi_flash *flash, u32 ofs, size_t len);
 
diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index 1dd4f39509..825b616556 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -125,6 +125,13 @@ static int spi_flash_std_erase(struct udevice *dev, u32 offset, size_t len)
 	return spi_flash_cmd_erase_ops(flash, offset, len);
 }
 
+static int spi_flash_std_get_sw_write_prot(struct udevice *dev)
+{
+	struct spi_flash *flash = dev_get_uclass_priv(dev);
+
+	return spi_flash_cmd_get_sw_write_prot(flash);
+}
+
 static int spi_flash_std_probe(struct udevice *dev)
 {
 	struct spi_slave *slave = dev_get_parent_priv(dev);
@@ -142,6 +149,7 @@ static const struct dm_spi_flash_ops spi_flash_std_ops = {
 	.read = spi_flash_std_read,
 	.write = spi_flash_std_write,
 	.erase = spi_flash_std_erase,
+	.get_sw_write_prot = spi_flash_std_get_sw_write_prot,
 };
 
 static const struct udevice_id spi_flash_std_ids[] = {
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 74ea264228..71afa65ecc 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -113,6 +113,18 @@ static int write_cr(struct spi_flash *flash, u8 wc)
 }
 #endif
 
+int spi_flash_cmd_get_sw_write_prot(struct spi_flash *flash)
+{
+	u8 status;
+	int ret;
+
+	ret = read_sr(flash, &status);
+	if (ret)
+		return ret;
+
+	return (status >> 2) & 7;
+}
+
 #ifdef CONFIG_SPI_FLASH_BAR
 /*
  * This "clean_bar" is necessary in a situation when one was accessing
diff --git a/include/spi_flash.h b/include/spi_flash.h
index a09f3522d2..e62d4bce52 100644
--- a/include/spi_flash.h
+++ b/include/spi_flash.h
@@ -113,6 +113,19 @@ struct dm_spi_flash_ops {
 	int (*write)(struct udevice *dev, u32 offset, size_t len,
 		     const void *buf);
 	int (*erase)(struct udevice *dev, u32 offset, size_t len);
+	/**
+	 * get_sw_write_prot() - Check state of software write-protect feature
+	 *
+	 * SPI flash chips can lock a region of the flash defined by a
+	 * 'protected area'. This function checks if this protected area is
+	 * defined.
+	 *
+	 * @dev:	SPI flash device
+	 * @return 0 if no region is write-protected, 1 if a region is
+	 *	write-protected, -ENOSYS if the driver does not implement this,
+	 *	other -ve value on error
+	 */
+	int (*get_sw_write_prot)(struct udevice *dev);
 };
 
 /* Access the serial operations for a device */
@@ -154,6 +167,20 @@ int spi_flash_write_dm(struct udevice *dev, u32 offset, size_t len,
  */
 int spi_flash_erase_dm(struct udevice *dev, u32 offset, size_t len);
 
+/**
+ * spl_flash_get_sw_write_prot() - Check state of software write-protect feature
+ *
+ * SPI flash chips can lock a region of the flash defined by a
+ * 'protected area'. This function checks if this protected area is
+ * defined.
+ *
+ * @dev:	SPI flash device
+ * @return 0 if no region is write-protected, 1 if a region is
+ *	write-protected, -ENOSYS if the driver does not implement this,
+ *	other -ve value on error
+ */
+int spl_flash_get_sw_write_prot(struct udevice *dev);
+
 int spi_flash_probe_bus_cs(unsigned int busnum, unsigned int cs,
 			   unsigned int max_hz, unsigned int spi_mode,
 			   struct udevice **devp);
diff --git a/test/dm/sf.c b/test/dm/sf.c
index b0844629f9..cac4287335 100644
--- a/test/dm/sf.c
+++ b/test/dm/sf.c
@@ -10,12 +10,61 @@
 #include <spi.h>
 #include <spi_flash.h>
 #include <asm/state.h>
+#include <asm/test.h>
 #include <dm/test.h>
 #include <dm/util.h>
 #include <test/ut.h>
 
 /* Test that sandbox SPI flash works correctly */
 static int dm_test_spi_flash(struct unit_test_state *uts)
+{
+	struct udevice *dev, *emul;
+	int full_size = 0x200000;
+	int size = 0x10000;
+	u8 *src, *dst;
+	int i;
+
+	src = map_sysmem(0x20000, full_size);
+	ut_assertok(os_write_file("spi.bin", src, full_size));
+	ut_assertok(uclass_first_device_err(UCLASS_SPI_FLASH, &dev));
+
+	dst = map_sysmem(0x20000 + full_size, full_size);
+	ut_assertok(spi_flash_read_dm(dev, 0, size, dst));
+	ut_assertok(memcmp(src, dst, size));
+
+	/* Erase */
+	ut_assertok(spi_flash_erase_dm(dev, 0, size));
+	ut_assertok(spi_flash_read_dm(dev, 0, size, dst));
+	for (i = 0; i < size; i++)
+		ut_asserteq(dst[i], 0xff);
+
+	/* Write some new data */
+	for (i = 0; i < size; i++)
+		src[i] = i;
+	ut_assertok(spi_flash_write_dm(dev, 0, size, src));
+	ut_assertok(spi_flash_read_dm(dev, 0, size, dst));
+	ut_assertok(memcmp(src, dst, size));
+
+	/* Try the write-protect stuff */
+	ut_assertok(uclass_first_device_err(UCLASS_SPI_EMUL, &emul));
+	ut_asserteq(0, spl_flash_get_sw_write_prot(dev));
+	sandbox_sf_set_block_protect(emul, 1);
+	ut_asserteq(1, spl_flash_get_sw_write_prot(dev));
+	sandbox_sf_set_block_protect(emul, 0);
+	ut_asserteq(0, spl_flash_get_sw_write_prot(dev));
+
+	/*
+	 * Since we are about to destroy all devices, we must tell sandbox
+	 * to forget the emulation device
+	 */
+	sandbox_sf_unbind_emul(state_get_current(), 0, 0);
+
+	return 0;
+}
+DM_TEST(dm_test_spi_flash, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+
+/* Functional test that sandbox SPI flash works correctly */
+static int dm_test_spi_flash_func(struct unit_test_state *uts)
 {
 	/*
 	 * Create an empty test file and run the SPI flash tests. This is a

commit 59beb0b0a87bffa6ea7422e141e164f3eb709719
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed Jun 26 17:15:55 2019 +0800

    UPSTREAM: mtd: nand: lpc32xx slc: disable DMA support in SPL builds
    
    Testing and analysis shows that at the moment LPC32xx NAND SLC driver
    can not get PL080 DMA backbone support in SPL build, because SPL NAND
    loaders operate with subpage (ECC step to be precisely) reads, and
    this is not supported in the NAND SLC + DMA + hardware ECC calculation
    bundle.
    
    The change removes a cautious build time warning and explicitly
    disables DMA flavour of the driver for SPL builds, to reduce the
    amound of #ifdef sections the code blocks are minimally reorganized.
    
    Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
    Change-Id: I9af7057ff579b3afc216038ce959a6f9f3e02279
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 44cdfc0ece20d649ab18690a8020da34137a670b)

diff --git a/drivers/mtd/nand/raw/lpc32xx_nand_slc.c b/drivers/mtd/nand/raw/lpc32xx_nand_slc.c
index f7e27b39ce..9c02cf25fa 100644
--- a/drivers/mtd/nand/raw/lpc32xx_nand_slc.c
+++ b/drivers/mtd/nand/raw/lpc32xx_nand_slc.c
@@ -1,15 +1,12 @@
 /*
  * LPC32xx SLC NAND flash controller driver
  *
- * (C) Copyright 2015 Vladimir Zapolskiy <vz@mleia.com>
+ * (C) Copyright 2015-2018 Vladimir Zapolskiy <vz@mleia.com>
+ * Copyright (c) 2015 Tyco Fire Protection Products.
  *
  * Hardware ECC support original source code
  * Copyright (C) 2008 by NXP Semiconductors
  * Author: Kevin Wells
- *
- * Copyright (c) 2015 Tyco Fire Protection Products.
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <common.h>
@@ -23,10 +20,6 @@
 #include <asm/arch/dma.h>
 #include <asm/arch/cpu.h>
 
-#if defined(CONFIG_DMA_LPC32XX) && defined(CONFIG_SPL_BUILD)
-#warning "DMA support in SPL image is not tested"
-#endif
-
 struct lpc32xx_nand_slc_regs {
 	u32 data;
 	u32 addr;
@@ -79,16 +72,14 @@ struct lpc32xx_nand_slc_regs {
  * Note: For large page devices, the default layouts are used. */
 static struct nand_ecclayout lpc32xx_nand_oob_16 = {
 	.eccbytes = 6,
-	.eccpos = {10, 11, 12, 13, 14, 15},
+	.eccpos = { 10, 11, 12, 13, 14, 15, },
 	.oobfree = {
-		{.offset = 0,
-		 . length = 4},
-		{.offset = 6,
-		 . length = 4}
-		}
+		{ .offset = 0, .length = 4, },
+		{ .offset = 6, .length = 4, },
+	}
 };
 
-#if defined(CONFIG_DMA_LPC32XX)
+#if defined(CONFIG_DMA_LPC32XX) && !defined(CONFIG_SPL_BUILD)
 #define ECCSTEPS	(CONFIG_SYS_NAND_PAGE_SIZE / CONFIG_SYS_NAND_ECCSIZE)
 
 /*
@@ -166,7 +157,7 @@ static int lpc32xx_nand_dev_ready(struct mtd_info *mtd)
 	return readl(&lpc32xx_nand_slc_regs->stat) & STAT_NAND_READY;
 }
 
-#if defined(CONFIG_DMA_LPC32XX)
+#if defined(CONFIG_DMA_LPC32XX) && !defined(CONFIG_SPL_BUILD)
 /*
  * Prepares DMA descriptors for NAND RD/WR operations
  * If the size is < 256 Bytes then it is assumed to be
@@ -325,7 +316,6 @@ static void lpc32xx_nand_xfer(struct mtd_info *mtd, const u8 *buf,
 	if (unlikely(ret < 0))
 		BUG();
 
-
 	/* Wait for NAND to be ready */
 	while (!lpc32xx_nand_dev_ready(mtd))
 		;
@@ -405,46 +395,18 @@ int lpc32xx_correct_data(struct mtd_info *mtd, u_char *dat,
 
 	return ret2;
 }
-#endif
 
-#if defined(CONFIG_DMA_LPC32XX)
 static void lpc32xx_dma_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
 {
 	lpc32xx_nand_xfer(mtd, buf, len, 1);
 }
-#else
-static void lpc32xx_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
-{
-	while (len-- > 0)
-		*buf++ = readl(&lpc32xx_nand_slc_regs->data);
-}
-#endif
-
-static uint8_t lpc32xx_read_byte(struct mtd_info *mtd)
-{
-	return readl(&lpc32xx_nand_slc_regs->data);
-}
 
-#if defined(CONFIG_DMA_LPC32XX)
 static void lpc32xx_dma_write_buf(struct mtd_info *mtd, const uint8_t *buf,
 				  int len)
 {
 	lpc32xx_nand_xfer(mtd, buf, len, 0);
 }
-#else
-static void lpc32xx_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
-{
-	while (len-- > 0)
-		writel(*buf++, &lpc32xx_nand_slc_regs->data);
-}
-#endif
 
-static void lpc32xx_write_byte(struct mtd_info *mtd, uint8_t byte)
-{
-	writel(byte, &lpc32xx_nand_slc_regs->data);
-}
-
-#if defined(CONFIG_DMA_LPC32XX)
 /* Reuse the logic from "nand_read_page_hwecc()" */
 static int lpc32xx_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
 				uint8_t *buf, int oob_required, int page)
@@ -512,8 +474,30 @@ static int lpc32xx_write_page_hwecc(struct mtd_info *mtd,
 
 	return 0;
 }
+#else
+static void lpc32xx_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
+{
+	while (len-- > 0)
+		*buf++ = readl(&lpc32xx_nand_slc_regs->data);
+}
+
+static void lpc32xx_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
+{
+	while (len-- > 0)
+		writel(*buf++, &lpc32xx_nand_slc_regs->data);
+}
 #endif
 
+static uint8_t lpc32xx_read_byte(struct mtd_info *mtd)
+{
+	return readl(&lpc32xx_nand_slc_regs->data);
+}
+
+static void lpc32xx_write_byte(struct mtd_info *mtd, uint8_t byte)
+{
+	writel(byte, &lpc32xx_nand_slc_regs->data);
+}
+
 /*
  * LPC32xx has only one SLC NAND controller, don't utilize
  * CONFIG_SYS_NAND_SELF_INIT to be able to reuse this function
@@ -521,7 +505,7 @@ static int lpc32xx_write_page_hwecc(struct mtd_info *mtd,
  */
 int board_nand_init(struct nand_chip *lpc32xx_chip)
 {
-#if defined(CONFIG_DMA_LPC32XX)
+#if defined(CONFIG_DMA_LPC32XX) && !defined(CONFIG_SPL_BUILD)
 	int ret;
 
 	/* Acquire a channel for our use */
@@ -544,7 +528,7 @@ int board_nand_init(struct nand_chip *lpc32xx_chip)
 	lpc32xx_chip->read_byte  = lpc32xx_read_byte;
 	lpc32xx_chip->write_byte = lpc32xx_write_byte;
 
-#if defined(CONFIG_DMA_LPC32XX)
+#if defined(CONFIG_DMA_LPC32XX) && !defined(CONFIG_SPL_BUILD)
 	/* Hardware ECC calculation is supported when DMA driver is selected */
 	lpc32xx_chip->ecc.mode		= NAND_ECC_HW;
 

commit a286c3a152c501e752e470687598a0a31a53d415
Author: Vladimir Zapolskiy <vz@mleia.com>
Date:   Fri Oct 19 03:21:05 2018 +0300

    UPSTREAM: mtd: nand: lpc32xx mlc: predefine number of NAND chips to support
    
    Build option CONFIG_SYS_MAX_NAND_CHIPS is used by NXP LPC32xx NAND MLC
    driver only, as a preparation for potential removal or replacement of
    the option the change predefines CONFIG_SYS_MAX_NAND_CHIPS to 1, same
    value is used by the single user Work Microwave Work 92105 board, thus
    it will be safe now to remove the option as a board specific one.
    
    Change-Id: I970ed8175e95e7a7a15d310b78c9d83f95be4ea3
    Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
    Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit a098ce21420e2359042041efaede75a8360c9f42)

diff --git a/drivers/mtd/nand/raw/lpc32xx_nand_mlc.c b/drivers/mtd/nand/raw/lpc32xx_nand_mlc.c
index e1b36706ca..baabbbd014 100644
--- a/drivers/mtd/nand/raw/lpc32xx_nand_mlc.c
+++ b/drivers/mtd/nand/raw/lpc32xx_nand_mlc.c
@@ -83,6 +83,10 @@ struct lpc32xx_nand_mlc_registers {
 static struct lpc32xx_nand_mlc_registers __iomem *lpc32xx_nand_mlc_registers
 	= (struct lpc32xx_nand_mlc_registers __iomem *)MLC_NAND_BASE;
 
+#if !defined(CONFIG_SYS_MAX_NAND_CHIPS)
+#define CONFIG_SYS_MAX_NAND_CHIPS	1
+#endif
+
 #define clkdiv(v, w, o) (((1+(clk/v)) & w) << o)
 
 /**

commit 3fced5d0394dde1398fa7dc1127e8f43ebd2390e
Author: Boris Brezillon <boris.brezillon@bootlin.com>
Date:   Tue Nov 13 12:43:13 2018 +0100

    UPSTREAM: mtd: Drop duplicate MTD_PARTITIONS Kconfig option
    
    Commit 9c5b00973bce ("Convert CONFIG_MTD_PARTITIONS et al to Kconfig")
    introduced a publicly visible Kconfig entry for the
    CONFIG_MTD_PARTITIONS option, while the rework on MTD partitioning
    was in progress, and we somehow did not notice that the same Kconfig
    entry was added by commit 4048a5c519a8 ("mtd: declare MTD_PARTITIONS
    symbol in Kconfig"), but this time as an invisible entry (this can
    only be selected by other options).
    
    Keep the non-visible version of this symbol, since MTD_PARTITIONS is
    not something the user should be able to enable/disable directly.
    
    Fixes: 4048a5c519a8 ("mtd: declare MTD_PARTITIONS symbol in Kconfig")
    Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
    Reviewed-by: Lukasz Majewski <lukma@denx.de>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Change-Id: If64d62b3de44515d5954fbc4ec8c1a4d71993dfd
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 5ffcd50612f6e716ea9479bea0edfdc89f7a0f0b)

diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig
index 7e55b530f2..56b6269a45 100644
--- a/drivers/mtd/Kconfig
+++ b/drivers/mtd/Kconfig
@@ -28,11 +28,15 @@ config MTD_DEVICE
 	  Adds the MTD device infrastructure from the Linux kernel.
 	  Needed for mtdparts command support.
 
-config MTD_PARTITIONS
-	bool "Add MTD Partioning infrastructure"
+config FLASH_CFI_DRIVER
+	bool "Enable CFI Flash driver"
 	help
-	  Adds the MTD partitioning infrastructure from the Linux
-	  kernel. Needed for UBI support.
+	  The Common Flash Interface specification was developed by Intel,
+	  AMD and other flash manufactures. It provides a universal method
+	  for probing the capabilities of flash devices. If you wish to
+	  support any device that is CFI-compliant, you need to enable this
+	  option. Visit <http://www.amd.com/products/nvd/overview/cfi.html>
+	  for more information on CFI.
 
 config CFI_FLASH
 	bool "Enable Driver Model for CFI Flash driver"

commit b95c8f6caece637d742719c07d80b56f80c89caa
Author: Boris Brezillon <boris.brezillon@bootlin.com>
Date:   Tue Nov 13 12:43:09 2018 +0100

    UPSTREAM: mtd: Use default mtdparts/mtids when not defined in the environment
    
    U-boot provides a mean to define default values for mtdids and mtdparts
    when they're not defined in the environment. Patch mtd_probe_devices()
    to use those default values when env_get("mtdparts") or
    env_get("mtdids") return NULL.
    
    This implementation is based on the logic found in cmd/mtdparts.c.
    
    Fixes: 5db66b3aee6f ("cmd: mtd: add 'mtd' command")
    Change-Id: Ic10873631a58981860f95584efc0b0b03b753a98
    Reported-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
    Tested-by: Stefan Roese <sr@denx.de>
    Reviewed-by: Lukasz Majewski <lukma@denx.de>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 5ffcd50612f6e716ea9479bea0edfdc89f7a0f0b)

diff --git a/drivers/mtd/mtd_uboot.c b/drivers/mtd/mtd_uboot.c
index 74fc0d5921..8ee1d69d83 100644
--- a/drivers/mtd/mtd_uboot.c
+++ b/drivers/mtd/mtd_uboot.c
@@ -93,12 +93,70 @@ static void mtd_probe_uclass_mtd_devs(void) { }
 #endif
 
 #if defined(CONFIG_MTD_PARTITIONS)
+extern void board_mtdparts_default(const char **mtdids,
+				   const char **mtdparts);
+
+static const char *get_mtdids(void)
+{
+	__maybe_unused const char *mtdparts = NULL;
+	const char *mtdids = env_get("mtdids");
+
+	if (mtdids)
+		return mtdids;
+
+#if defined(CONFIG_SYS_MTDPARTS_RUNTIME)
+	board_mtdparts_default(&mtdids, &mtdparts);
+#elif defined(MTDIDS_DEFAULT)
+	mtdids = MTDIDS_DEFAULT;
+#elif defined(CONFIG_MTDIDS_DEFAULT)
+	mtdids = CONFIG_MTDIDS_DEFAULT;
+#endif
+
+	if (mtdids)
+		env_set("mtdids", mtdids);
+
+	return mtdids;
+}
+
+#define MTDPARTS_MAXLEN         512
+
+static const char *get_mtdparts(void)
+{
+	__maybe_unused const char *mtdids = NULL;
+	static char tmp_parts[MTDPARTS_MAXLEN];
+	static bool use_defaults = true;
+	const char *mtdparts = NULL;
+
+	if (gd->flags & GD_FLG_ENV_READY)
+		mtdparts = env_get("mtdparts");
+	else if (env_get_f("mtdparts", tmp_parts, sizeof(tmp_parts)) != -1)
+		mtdparts = tmp_parts;
+
+	if (mtdparts || !use_defaults)
+		return mtdparts;
+
+#if defined(CONFIG_SYS_MTDPARTS_RUNTIME)
+	board_mtdparts_default(&mtdids, &mtdparts);
+#elif defined(MTDPARTS_DEFAULT)
+	mtdparts = MTDPARTS_DEFAULT;
+#elif defined(CONFIG_MTDPARTS_DEFAULT)
+	mtdparts = CONFIG_MTDPARTS_DEFAULT;
+#endif
+
+	if (mtdparts)
+		env_set("mtdparts", mtdparts);
+
+	use_defaults = false;
+
+	return mtdparts;
+}
+
 int mtd_probe_devices(void)
 {
 	static char *old_mtdparts;
 	static char *old_mtdids;
-	const char *mtdparts = env_get("mtdparts");
-	const char *mtdids = env_get("mtdids");
+	const char *mtdparts = get_mtdparts();
+	const char *mtdids = get_mtdids();
 	bool remaining_partitions = true;
 	struct mtd_info *mtd;
 

commit adf2f01f99a2cc841d251759fad213e9678bdc30
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Mon Oct 8 02:27:44 2018 -0700

    UPSTREAM: nand: atmel: Initialize pmecc smu with correct size
    
    Currently in pmecc_get_sigma(), the code tries to clear the memory
    pointed by smu with wrong size 'sizeof(int16_t) * ARRAY_SIZE(smu)'.
    Since smu is actually a pointer, not an array, so ARRAY_SIZE(smu)
    does not generate correct size to be cleared.
    
    In fact, GCC 8.1.0 reports a warning against it:
    
    error: division 'sizeof (int16_t * {aka short int *}) / sizeof (int16_t
    {aka short int})' does not compute the number of array elements
    [-Werror=sizeof-pointer-div]
    
    Fix it by using the correct size.
    
    Change-Id: I9a74b5a51c848cec7b54443449cb00609df00b39
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit ed5df0852f56a3512db283010ad7b6e93cba0612)

diff --git a/drivers/mtd/nand/raw/atmel_nand.c b/drivers/mtd/nand/raw/atmel_nand.c
index 65dd83eced..fc2de54864 100644
--- a/drivers/mtd/nand/raw/atmel_nand.c
+++ b/drivers/mtd/nand/raw/atmel_nand.c
@@ -250,7 +250,7 @@ static void pmecc_get_sigma(struct mtd_info *mtd)
 	int diff;
 
 	/* Init the Sigma(x) */
-	memset(smu, 0, sizeof(int16_t) * ARRAY_SIZE(smu));
+	memset(smu, 0, sizeof(int16_t) * num * (cap + 2));
 
 	dmu_0_count = 0;
 

commit 570e8d641b271fd4218f2b0fd35359e8ed066b2a
Author: Ashish Kumar <Ashish.Kumar@nxp.com>
Date:   Tue Sep 25 14:11:33 2018 +0530

    UPSTREAM: sf: Add MICRON manufacturer id
    
    NOR flash name MT35X_QLKA and MT25Q_** used on NXP board has
    manufacturer id as 0x2C, which are rather for newer flashes
    after the split of Micron from ST.
    
    So macro for this micron manufacturer id.
    
    Change-Id: Ib32d4350646f2d2946fee85dd59e55a72a55627f
    Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
    Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
    Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
    [jagan: updated commit message]
    Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 5c391486b411025785e064f160d248bef31b3d28)

diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 7342590f32..fb41cd5e96 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -33,6 +33,7 @@ enum spi_nor_option_flags {
 /* CFI Manufacture ID's */
 #define SPI_FLASH_CFI_MFR_SPANSION	0x01
 #define SPI_FLASH_CFI_MFR_STMICRO	0x20
+#define SPI_FLASH_CFI_MFR_MICRON	0x2C
 #define SPI_FLASH_CFI_MFR_MACRONIX	0xc2
 #define SPI_FLASH_CFI_MFR_SST		0xbf
 #define SPI_FLASH_CFI_MFR_WINBOND	0xef
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 522413c2d7..74ea264228 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -1095,6 +1095,7 @@ static int set_quad_mode(struct spi_flash *flash,
 #endif
 #ifdef CONFIG_SPI_FLASH_STMICRO
 	case SPI_FLASH_CFI_MFR_STMICRO:
+	case SPI_FLASH_CFI_MFR_MICRON:
 		debug("SF: QEB is volatile for %02x flash\n", JEDEC_MFR(info));
 		return 0;
 #endif
@@ -1182,6 +1183,7 @@ int spi_flash_scan(struct spi_flash *flash)
 #if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST)
 	/* NOR protection support for STmicro/Micron chips and similar */
 	if (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_STMICRO ||
+	    JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_MICRON ||
 	    JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_SST) {
 		flash->flash_lock = stm_lock;
 		flash->flash_unlock = stm_unlock;

commit 4696f08f04ce38a31f56e360585fff4df8247f15
Author: Adam Ford <aford173@gmail.com>
Date:   Mon Oct 8 14:13:03 2018 -0500

    UPSTREAM: mtd: uboot: Fix hanging during mtd list command
    
    Some boards (like omap3_logic) hang when trying to access
    address 0. This happens when executing the new 'mtd list' command.
    This patch enhances the checks for conditions that would
    preclude mtd_probe_devices() from operating.
    
    Fixes: 5db66b3aee6f ("cmd: mtd: add 'mtd' command")
    Suggested-by: Boris Brezillon <boris.brezillon@bootlin.com>
    Change-Id: I89cc935188ab9b4c380fbf09cf24386c0b5d6e6c
    Signed-off-by: Adam Ford <aford173@gmail.com>
    Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
    Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit c8602061a7b27fe874a454b0ec65f1e45621adbb)

diff --git a/drivers/mtd/mtd_uboot.c b/drivers/mtd/mtd_uboot.c
index d7159075bb..74fc0d5921 100644
--- a/drivers/mtd/mtd_uboot.c
+++ b/drivers/mtd/mtd_uboot.c
@@ -105,7 +105,10 @@ int mtd_probe_devices(void)
 	mtd_probe_uclass_mtd_devs();
 
 	/* Check if mtdparts/mtdids changed since last call, otherwise: exit */
-	if (!strcmp(mtdparts, old_mtdparts) && !strcmp(mtdids, old_mtdids))
+	if ((!mtdparts && !old_mtdparts && !mtdids && !old_mtdids) ||
+	    (mtdparts && old_mtdparts && mtdids && old_mtdids &&
+	     !strcmp(mtdparts, old_mtdparts) &&
+	     !strcmp(mtdids, old_mtdids)))
 		return 0;
 
 	/* Update the local copy of mtdparts */
@@ -141,6 +144,10 @@ int mtd_probe_devices(void)
 		}
 	}
 
+	/* If either mtdparts or mtdids is empty, then exit */
+	if (!mtdparts || !mtdids)
+		return 0;
+
 	/* Start the parsing by ignoring the extra 'mtdparts=' prefix, if any */
 	if (strstr(mtdparts, "mtdparts="))
 		mtdparts += 9;

commit 519ddfff4fa792342eabdc5badc5603d90024765
Author: Simon Glass <sjg@chromium.org>
Date:   Mon Oct 1 12:22:24 2018 -0600

    UPSTREAM: dm: spi: Add logging of some return values
    
    When SPI flash operations fail it is helpful to be able to see the error
    codes and where they are generated. Add logging to capture this
    information for read operations.
    
    Change-Id: I58270e564a558fbaf9ae2c5b0d888d3af842e09c
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 5e24a2ef8bf4f09b18cf4e943c73bfdd169a7581)

diff --git a/drivers/mtd/spi/sf-uclass.c b/drivers/mtd/spi/sf-uclass.c
index 83876485fe..538f41787f 100644
--- a/drivers/mtd/spi/sf-uclass.c
+++ b/drivers/mtd/spi/sf-uclass.c
@@ -15,18 +15,18 @@ DECLARE_GLOBAL_DATA_PTR;
 
 int spi_flash_read_dm(struct udevice *dev, u32 offset, size_t len, void *buf)
 {
-	return sf_get_ops(dev)->read(dev, offset, len, buf);
+	return log_ret(sf_get_ops(dev)->read(dev, offset, len, buf));
 }
 
 int spi_flash_write_dm(struct udevice *dev, u32 offset, size_t len,
 		       const void *buf)
 {
-	return sf_get_ops(dev)->write(dev, offset, len, buf);
+	return log_ret(sf_get_ops(dev)->write(dev, offset, len, buf));
 }
 
 int spi_flash_erase_dm(struct udevice *dev, u32 offset, size_t len)
 {
-	return sf_get_ops(dev)->erase(dev, offset, len);
+	return log_ret(sf_get_ops(dev)->erase(dev, offset, len));
 }
 
 /*
diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index 09143d7868..1dd4f39509 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -98,7 +98,7 @@ static int spi_flash_std_read(struct udevice *dev, u32 offset, size_t len,
 {
 	struct spi_flash *flash = dev_get_uclass_priv(dev);
 
-	return spi_flash_cmd_read_ops(flash, offset, len, buf);
+	return log_ret(spi_flash_cmd_read_ops(flash, offset, len, buf));
 }
 
 static int spi_flash_std_write(struct udevice *dev, u32 offset, size_t len,
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index bed9e00aa2..522413c2d7 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -474,14 +474,14 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
 	u8 cmdsz;
 	u32 remain_len, read_len, read_addr;
 	int bank_sel = 0;
-	int ret = -1;
+	int ret = 0;
 
 	/* Handle memory-mapped SPI */
 	if (flash->memory_map) {
 		ret = spi_claim_bus(spi);
 		if (ret) {
 			debug("SF: unable to claim SPI bus\n");
-			return ret;
+			return log_ret(ret);
 		}
 		spi_xfer(spi, 0, NULL, NULL, SPI_XFER_MMAP);
 		spi_flash_copy_mmap(data, flash->memory_map + offset, len);
@@ -504,7 +504,7 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
 #ifdef CONFIG_SPI_FLASH_BAR
 		ret = write_bar(flash, read_addr);
 		if (ret < 0)
-			return ret;
+			return log_ret(ret);
 		bank_sel = flash->bank_curr;
 #endif
 		remain_len = ((SPI_FLASH_16MB_BOUN << flash->shift) *
@@ -534,7 +534,7 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
 	ret = clean_bar(flash);
 #endif
 
-	return ret;
+	return log_ret(ret);
 }
 
 #ifdef CONFIG_SPI_FLASH_SST
diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c
index e06a603ab1..a01896cc5f 100644
--- a/drivers/spi/spi-uclass.c
+++ b/drivers/spi/spi-uclass.c
@@ -64,11 +64,11 @@ int dm_spi_claim_bus(struct udevice *dev)
 	if (speed != slave->speed) {
 		ret = spi_set_speed_mode(bus, speed, slave->mode);
 		if (ret)
-			return ret;
+			return log_ret(ret);
 		slave->speed = speed;
 	}
 
-	return ops->claim_bus ? ops->claim_bus(dev) : 0;
+	return log_ret(ops->claim_bus ? ops->claim_bus(dev) : 0);
 }
 
 void dm_spi_release_bus(struct udevice *dev)
@@ -93,7 +93,7 @@ int dm_spi_xfer(struct udevice *dev, unsigned int bitlen,
 
 int spi_claim_bus(struct spi_slave *slave)
 {
-	return dm_spi_claim_bus(slave->dev);
+	return log_ret(dm_spi_claim_bus(slave->dev));
 }
 
 void spi_release_bus(struct spi_slave *slave)
diff --git a/include/log.h b/include/log.h
index 22afa7da1a..b63058f211 100644
--- a/include/log.h
+++ b/include/log.h
@@ -159,6 +159,25 @@ void __assert_fail(const char *assertion, const char *file, unsigned int line,
 	({ if (!(x) && _DEBUG) \
 		__assert_fail(#x, __FILE__, __LINE__, __func__); })
 
+#ifdef CONFIG_LOG_ERROR_RETURN
+#define log_ret(_ret) ({ \
+	int __ret = (_ret); \
+	if (__ret < 0) \
+		log(LOG_CATEGORY, LOGL_ERR, "returning err=%d\n", __ret); \
+	__ret; \
+	})
+#define log_msg_ret(_msg, _ret) ({ \
+	int __ret = (_ret); \
+	if (__ret < 0) \
+		log(LOG_CATEGORY, LOGL_ERR, "%s: returning err=%d\n", _msg, \
+		    __ret); \
+	__ret; \
+	})
+#else
+#define log_ret(_ret) (_ret)
+#define log_msg_ret(_msg, _ret) (_ret)
+#endif
+
 /**
  * struct log_rec - a single log record
  *

commit 50d09c0bdea5e01d0341fc75ddd65764fec71aca
Author: Simon Glass <sjg@chromium.org>
Date:   Mon Oct 1 12:22:09 2018 -0600

    UPSTREAM: sf: Avoid allocating memory on every read operation
    
    At present spi_flash_cmd_read_ops() allocates and frees a few bytes of
    memory every time it is called. It is faster to use the stack for this
    and this is now supported by the minimum GCC version required by U-Boot.
    
    Remove the allocation and use a variable-sized array instead.
    
    Change-Id: I1c59601b4d56cd941784cbdac830a562c1491bbd
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 97f57109bb750d0b2908d6ecd4aef3801baf1cf2)

diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index bea35c5c92..bed9e00aa2 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -471,7 +471,7 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
 		size_t len, void *data)
 {
 	struct spi_slave *spi = flash->spi;
-	u8 *cmd, cmdsz;
+	u8 cmdsz;
 	u32 remain_len, read_len, read_addr;
 	int bank_sel = 0;
 	int ret = -1;
@@ -491,11 +491,7 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
 	}
 
 	cmdsz = SPI_FLASH_CMD_LEN + flash->dummy_byte;
-	cmd = calloc(1, cmdsz);
-	if (!cmd) {
-		debug("SF: Failed to allocate cmd\n");
-		return -ENOMEM;
-	}
+	u8 cmd[cmdsz];
 
 	cmd[0] = flash->read_cmd;
 	while (len) {
@@ -538,7 +534,6 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
 	ret = clean_bar(flash);
 #endif
 
-	free(cmd);
 	return ret;
 }
 

commit 583deafe1bcb453d20d4f3c81cfcdd7a364ab305
Author: Simon Glass <sjg@chromium.org>
Date:   Mon Oct 1 11:55:19 2018 -0600

    UPSTREAM: dm: spi: Clean up detection of sandbox SPI emulator
    
    Now that we don't have to deal with the command-line flag we can simplify
    the code for detecting the emulator. Remove the lookup based on the SPI
    specification, relying just on the device tree to locate the emulator.
    
    Change-Id: I6dd9372cb74b8ee991e12314a02e928e3201ae3d
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 66613f5dd25c4372b3f5ecb2f0c1d08b7f77b3a8)

diff --git a/arch/sandbox/include/asm/state.h b/arch/sandbox/include/asm/state.h
index 617f95291a..3913d1c754 100644
--- a/arch/sandbox/include/asm/state.h
+++ b/arch/sandbox/include/asm/state.h
@@ -35,7 +35,6 @@ enum state_terminal_raw {
 };
 
 struct sandbox_spi_info {
-	const char *spec;
 	struct udevice *emul;
 };
 
diff --git a/drivers/mtd/spi/sandbox.c b/drivers/mtd/spi/sandbox.c
index cd21b4e9bb..a8ffde240d 100644
--- a/drivers/mtd/spi/sandbox.c
+++ b/drivers/mtd/spi/sandbox.c
@@ -117,24 +117,22 @@ static int sandbox_sf_probe(struct udevice *dev)
 	const struct spi_flash_info *data;
 	struct sandbox_spi_flash_plat_data *pdata = dev_get_platdata(dev);
 	struct sandbox_state *state = state_get_current();
+	struct dm_spi_slave_platdata *slave_plat;
 	struct udevice *bus = dev->parent;
 	const char *spec = NULL;
+	struct udevice *emul;
 	int ret = 0;
 	int cs = -1;
-	int i;
 
 	debug("%s: bus %d, looking for emul=%p: ", __func__, bus->seq, dev);
-	if (bus->seq >= 0 && bus->seq < CONFIG_SANDBOX_SPI_MAX_BUS) {
-		for (i = 0; i < CONFIG_SANDBOX_SPI_MAX_CS; i++) {
-			if (state->spi[bus->seq][i].emul == dev)
-				cs = i;
-		}
-	}
-	if (cs == -1) {
+	ret = sandbox_spi_get_emul(state, bus, dev, &emul);
+	if (ret) {
 		printf("Error: Unknown chip select for device '%s'\n",
-		       dev->name);
-		return -EINVAL;
+			dev->name);
+		return ret;
 	}
+	slave_plat = dev_get_parent_platdata(dev);
+	cs = slave_plat->cs;
 	debug("found at cs %d\n", cs);
 
 	if (!pdata->filename) {

commit 3f1540d65310bb3118ca2280bd8cbfbd71b35c4b
Author: Simon Glass <sjg@chromium.org>
Date:   Mon Oct 1 11:55:13 2018 -0600

    UPSTREAM: sandbox: spi: Add more logging
    
    Add logging to aid debugging features in these drivers. Also drop some
    code in sandbox_spi_xfer() which is not used.
    
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Change-Id: I736a761d9651dc17de0649f191ed717ea37a3fc6
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit c3aed5db591ee38068dc2b6d73b04638bd7b7b26)

diff --git a/drivers/mtd/spi/sandbox.c b/drivers/mtd/spi/sandbox.c
index c339d83016..cd21b4e9bb 100644
--- a/drivers/mtd/spi/sandbox.c
+++ b/drivers/mtd/spi/sandbox.c
@@ -8,6 +8,8 @@
  * Licensed under the GPL-2 or later.
  */
 
+#define LOG_CATEGORY UCLASS_SPI_FLASH
+
 #include <common.h>
 #include <dm.h>
 #include <malloc.h>
@@ -43,6 +45,7 @@ enum sandbox_sf_state {
 	SF_WRITE_STATUS, /* write the flash's status register */
 };
 
+#if CONFIG_IS_ENABLED(LOG)
 static const char *sandbox_sf_state_name(enum sandbox_sf_state state)
 {
 	static const char * const states[] = {
@@ -51,6 +54,7 @@ static const char *sandbox_sf_state_name(enum sandbox_sf_state state)
 	};
 	return states[state];
 }
+#endif /* LOG */
 
 /* Bits for the status register */
 #define STAT_WIP	(1 << 0)
@@ -193,7 +197,7 @@ static void sandbox_sf_cs_activate(struct udevice *dev)
 {
 	struct sandbox_spi_flash *sbsf = dev_get_priv(dev);
 
-	debug("sandbox_sf: CS activated; state is fresh!\n");
+	log_content("sandbox_sf: CS activated; state is fresh!\n");
 
 	/* CS is asserted, so reset state */
 	sbsf->off = 0;
@@ -205,7 +209,7 @@ static void sandbox_sf_cs_activate(struct udevice *dev)
 
 static void sandbox_sf_cs_deactivate(struct udevice *dev)
 {
-	debug("sandbox_sf: CS deactivated; cmd done processing!\n");
+	log_content("sandbox_sf: CS deactivated; cmd done processing!\n");
 }
 
 /*
@@ -281,8 +285,8 @@ static int sandbox_sf_process_cmd(struct sandbox_spi_flash *sbsf, const u8 *rx,
 	}
 
 	if (oldstate != sbsf->state)
-		debug(" cmd: transition to %s state\n",
-		      sandbox_sf_state_name(sbsf->state));
+		log_content(" cmd: transition to %s state\n",
+			    sandbox_sf_state_name(sbsf->state));
 
 	return 0;
 }
@@ -313,8 +317,8 @@ static int sandbox_sf_xfer(struct udevice *dev, unsigned int bitlen,
 	int bytes = bitlen / 8;
 	int ret;
 
-	debug("sandbox_sf: state:%x(%s) bytes:%u\n", sbsf->state,
-	      sandbox_sf_state_name(sbsf->state), bytes);
+	log_content("sandbox_sf: state:%x(%s) bytes:%u\n", sbsf->state,
+		    sandbox_sf_state_name(sbsf->state), bytes);
 
 	if ((flags & SPI_XFER_BEGIN))
 		sandbox_sf_cs_activate(dev);
@@ -333,7 +337,7 @@ static int sandbox_sf_xfer(struct udevice *dev, unsigned int bitlen,
 		case SF_ID: {
 			u8 id;
 
-			debug(" id: off:%u tx:", sbsf->off);
+			log_content(" id: off:%u tx:", sbsf->off);
 			if (sbsf->off < IDCODE_LEN) {
 				/* Extract correct byte from ID 0x00aabbcc */
 				id = ((JEDEC_MFR(sbsf->data) << 16) |
@@ -342,18 +346,18 @@ static int sandbox_sf_xfer(struct udevice *dev, unsigned int bitlen,
 			} else {
 				id = 0;
 			}
-			debug("%d %02x\n", sbsf->off, id);
+			log_content("%d %02x\n", sbsf->off, id);
 			tx[pos++] = id;
 			++sbsf->off;
 			break;
 		}
 		case SF_ADDR:
-			debug(" addr: bytes:%u rx:%02x ", sbsf->addr_bytes,
-			      rx[pos]);
+			log_content(" addr: bytes:%u rx:%02x ",
+				    sbsf->addr_bytes, rx[pos]);
 
 			if (sbsf->addr_bytes++ < SF_ADDR_LEN)
 				sbsf->off = (sbsf->off << 8) | rx[pos];
-			debug("addr:%06x\n", sbsf->off);
+			log_content("addr:%06x\n", sbsf->off);
 
 			if (tx)
 				sandbox_spi_tristate(&tx[pos], 1);
@@ -382,8 +386,8 @@ static int sandbox_sf_xfer(struct udevice *dev, unsigned int bitlen,
 				sbsf->state = SF_ERASE;
 				goto case_sf_erase;
 			}
-			debug(" cmd: transition to %s state\n",
-			      sandbox_sf_state_name(sbsf->state));
+			log_content(" cmd: transition to %s state\n",
+				    sandbox_sf_state_name(sbsf->state));
 			break;
 		case SF_READ:
 			/*
@@ -392,7 +396,7 @@ static int sandbox_sf_xfer(struct udevice *dev, unsigned int bitlen,
 			 */
 
 			cnt = bytes - pos;
-			debug(" tx: read(%u)\n", cnt);
+			log_content(" tx: read(%u)\n", cnt);
 			assert(tx);
 			ret = os_read(sbsf->fd, tx + pos, cnt);
 			if (ret < 0) {
@@ -402,19 +406,19 @@ static int sandbox_sf_xfer(struct udevice *dev, unsigned int bitlen,
 			pos += ret;
 			break;
 		case SF_READ_STATUS:
-			debug(" read status: %#x\n", sbsf->status);
+			log_content(" read status: %#x\n", sbsf->status);
 			cnt = bytes - pos;
 			memset(tx + pos, sbsf->status, cnt);
 			pos += cnt;
 			break;
 		case SF_READ_STATUS1:
-			debug(" read status: %#x\n", sbsf->status);
+			log_content(" read status: %#x\n", sbsf->status);
 			cnt = bytes - pos;
 			memset(tx + pos, sbsf->status >> 8, cnt);
 			pos += cnt;
 			break;
 		case SF_WRITE_STATUS:
-			debug(" write status: %#x (ignored)\n", rx[pos]);
+			log_content(" write status: %#x (ignored)\n", rx[pos]);
 			pos = bytes;
 			break;
 		case SF_WRITE:
@@ -430,7 +434,7 @@ static int sandbox_sf_xfer(struct udevice *dev, unsigned int bitlen,
 			}
 
 			cnt = bytes - pos;
-			debug(" rx: write(%u)\n", cnt);
+			log_content(" rx: write(%u)\n", cnt);
 			if (tx)
 				sandbox_spi_tristate(&tx[pos], cnt);
 			ret = os_write(sbsf->fd, rx + pos, cnt);
@@ -450,15 +454,15 @@ static int sandbox_sf_xfer(struct udevice *dev, unsigned int bitlen,
 
 			/* verify address is aligned */
 			if (sbsf->off & (sbsf->erase_size - 1)) {
-				debug(" sector erase: cmd:%#x needs align:%#x, but we got %#x\n",
-				      sbsf->cmd, sbsf->erase_size,
-				      sbsf->off);
+				log_content(" sector erase: cmd:%#x needs align:%#x, but we got %#x\n",
+					    sbsf->cmd, sbsf->erase_size,
+					    sbsf->off);
 				sbsf->status &= ~STAT_WEL;
 				goto done;
 			}
 
-			debug(" sector erase addr: %u, size: %u\n", sbsf->off,
-			      sbsf->erase_size);
+			log_content(" sector erase addr: %u, size: %u\n",
+				    sbsf->off, sbsf->erase_size);
 
 			cnt = bytes - pos;
 			if (tx)
@@ -472,13 +476,13 @@ static int sandbox_sf_xfer(struct udevice *dev, unsigned int bitlen,
 			ret = sandbox_erase_part(sbsf, sbsf->erase_size);
 			sbsf->status &= ~STAT_WEL;
 			if (ret) {
-				debug("sandbox_sf: Erase failed\n");
+				log_content("sandbox_sf: Erase failed\n");
 				goto done;
 			}
 			goto done;
 		}
 		default:
-			debug(" ??? no idea what to do ???\n");
+			log_content(" ??? no idea what to do ???\n");
 			goto done;
 		}
 	}
diff --git a/drivers/spi/sandbox_spi.c b/drivers/spi/sandbox_spi.c
index 092b13b00b..5e2257b2a8 100644
--- a/drivers/spi/sandbox_spi.c
+++ b/drivers/spi/sandbox_spi.c
@@ -8,6 +8,8 @@
  * Licensed under the GPL-2 or later.
  */
 
+#define LOG_CATEGORY UCLASS_SPI
+
 #include <common.h>
 #include <dm.h>
 #include <malloc.h>
@@ -58,7 +60,6 @@ static int sandbox_spi_xfer(struct udevice *slave, unsigned int bitlen,
 	struct udevice *emul;
 	uint bytes = bitlen / 8, i;
 	int ret;
-	u8 *tx = (void *)dout, *rx = din;
 	uint busnum, cs;
 
 	if (bitlen == 0)
@@ -89,37 +90,16 @@ static int sandbox_spi_xfer(struct udevice *slave, unsigned int bitlen,
 	if (ret)
 		return ret;
 
-	/* make sure rx/tx buffers are full so clients can assume */
-	if (!tx) {
-		debug("sandbox_spi: xfer: auto-allocating tx scratch buffer\n");
-		tx = malloc(bytes);
-		if (!tx) {
-			debug("sandbox_spi: Out of memory\n");
-			return -ENOMEM;
-		}
-	}
-	if (!rx) {
-		debug("sandbox_spi: xfer: auto-allocating rx scratch buffer\n");
-		rx = malloc(bytes);
-		if (!rx) {
-			debug("sandbox_spi: Out of memory\n");
-			return -ENOMEM;
-		}
-	}
-
 	ops = spi_emul_get_ops(emul);
 	ret = ops->xfer(emul, bitlen, dout, din, flags);
 
-	debug("sandbox_spi: xfer: got back %i (that's %s)\n rx:",
-	      ret, ret ? "bad" : "good");
-	for (i = 0; i < bytes; ++i)
-		debug(" %u:%02x", i, rx[i]);
-	debug("\n");
-
-	if (tx != dout)
-		free(tx);
-	if (rx != din)
-		free(rx);
+	log_content("sandbox_spi: xfer: got back %i (that's %s)\n rx:",
+		    ret, ret ? "bad" : "good");
+	if (din) {
+		for (i = 0; i < bytes; ++i)
+			log_content(" %u:%02x", i, ((u8 *)din)[i]);
+	}
+	log_content("\n");
 
 	return ret;
 }
diff --git a/include/log.h b/include/log.h
index 8083b64831..22afa7da1a 100644
--- a/include/log.h
+++ b/include/log.h
@@ -42,7 +42,10 @@ enum log_category_t {
 	LOGC_ARCH,
 	LOGC_BOARD,
 	LOGC_CORE,
-	LOGC_DT,
+	LOGC_DM,	/* Core driver-model */
+	LOGC_DT,	/* Device-tree */
+	LOGC_EFI,	/* EFI implementation */
+	LOGC_ALLOC,	/* Memory allocation */
 
 	LOGC_COUNT,
 	LOGC_END,

commit 2fbcf3af5ef14045c0cea1e86f88bd05dda33930
Author: Simon Glass <sjg@chromium.org>
Date:   Mon Oct 1 11:55:09 2018 -0600

    UPSTREAM: sandbox: spi: Drop command-line SPI option
    
    At present we support specifying SPI flash devices to use in the device
    tree and on the command line. Drop the second option, since it is a pain
    to support nicely with driver model, and unnecessary.
    
    Change-Id: Ic9e8e6cd69fb6bfa3a7cf26e51d454c4794cd18d
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 1289e96797bfd6311f3dc656fc515a882b82701b)

diff --git a/drivers/mtd/spi/sandbox.c b/drivers/mtd/spi/sandbox.c
index c8aa158f1c..c339d83016 100644
--- a/drivers/mtd/spi/sandbox.c
+++ b/drivers/mtd/spi/sandbox.c
@@ -103,14 +103,12 @@ struct sandbox_spi_flash_plat_data {
 /**
  * This is a very strange probe function. If it has platform data (which may
  * have come from the device tree) then this function gets the filename and
- * device type from there. Failing that it looks at the command line
- * parameter.
+ * device type from there.
  */
 static int sandbox_sf_probe(struct udevice *dev)
 {
 	/* spec = idcode:file */
 	struct sandbox_spi_flash *sbsf = dev_get_priv(dev);
-	const char *file;
 	size_t len, idname_len;
 	const struct spi_flash_info *data;
 	struct sandbox_spi_flash_plat_data *pdata = dev_get_platdata(dev);
@@ -136,36 +134,15 @@ static int sandbox_sf_probe(struct udevice *dev)
 	debug("found at cs %d\n", cs);
 
 	if (!pdata->filename) {
-		struct sandbox_state *state = state_get_current();
-
-		assert(bus->seq != -1);
-		if (bus->seq < CONFIG_SANDBOX_SPI_MAX_BUS)
-			spec = state->spi[bus->seq][cs].spec;
-		if (!spec) {
-			debug("%s:  No spec found for bus %d, cs %d\n",
-			      __func__, bus->seq, cs);
-			ret = -ENOENT;
-			goto error;
-		}
-
-		file = strchr(spec, ':');
-		if (!file) {
-			printf("%s: unable to parse file\n", __func__);
-			ret = -EINVAL;
-			goto error;
-		}
-		idname_len = file - spec;
-		pdata->filename = file + 1;
-		pdata->device_name = spec;
-		++file;
-	} else {
-		spec = strchr(pdata->device_name, ',');
-		if (spec)
-			spec++;
-		else
-			spec = pdata->device_name;
-		idname_len = strlen(spec);
+		printf("Error: No filename available\n");
+		return -EINVAL;
 	}
+	spec = strchr(pdata->device_name, ',');
+	if (spec)
+		spec++;
+	else
+		spec = pdata->device_name;
+	idname_len = strlen(spec);
 	debug("%s: device='%s'\n", __func__, spec);
 
 	for (data = spi_flash_ids; data->name; data++) {
@@ -532,31 +509,6 @@ static const struct dm_spi_emul_ops sandbox_sf_emul_ops = {
 };
 
 #ifdef CONFIG_SPI_FLASH
-static int sandbox_cmdline_cb_spi_sf(struct sandbox_state *state,
-				     const char *arg)
-{
-	unsigned long bus, cs;
-	const char *spec = sandbox_spi_parse_spec(arg, &bus, &cs);
-
-	if (!spec)
-		return 1;
-
-	/*
-	 * It is safe to not make a copy of 'spec' because it comes from the
-	 * command line.
-	 *
-	 * TODO(sjg@chromium.org): It would be nice if we could parse the
-	 * spec here, but the problem is that no U-Boot init has been done
-	 * yet. Perhaps we can figure something out.
-	 */
-	state->spi[bus][cs].spec = spec;
-	debug("%s:  Setting up spec '%s' for bus %ld, cs %ld\n", __func__,
-	      spec, bus, cs);
-
-	return 0;
-}
-SANDBOX_CMDLINE_OPT(spi_sf, 1, "connect a SPI flash: <bus>:<cs>:<id>:<file>");
-
 int sandbox_sf_bind_emul(struct sandbox_state *state, int busnum, int cs,
 			 struct udevice *bus, ofnode node, const char *spec)
 {
@@ -599,33 +551,6 @@ void sandbox_sf_unbind_emul(struct sandbox_state *state, int busnum, int cs)
 	state->spi[busnum][cs].emul = NULL;
 }
 
-static int sandbox_sf_bind_bus_cs(struct sandbox_state *state, int busnum,
-				  int cs, const char *spec)
-{
-	struct udevice *bus, *slave;
-	int ret;
-
-	ret = uclass_find_device_by_seq(UCLASS_SPI, busnum, true, &bus);
-	if (ret) {
-		printf("Invalid bus %d for spec '%s' (err=%d)\n", busnum,
-		       spec, ret);
-		return ret;
-	}
-	ret = spi_find_chip_select(bus, cs, &slave);
-	if (!ret) {
-		printf("Chip select %d already exists for spec '%s'\n", cs,
-		       spec);
-		return -EEXIST;
-	}
-
-	ret = device_bind_driver(bus, "spi_flash_std", spec, &slave);
-	if (ret)
-		return ret;
-
-	return sandbox_sf_bind_emul(state, busnum, cs, bus, ofnode_null(),
-				    spec);
-}
-
 int sandbox_spi_get_emul(struct sandbox_state *state,
 			 struct udevice *bus, struct udevice *slave,
 			 struct udevice **emulp)
@@ -652,35 +577,6 @@ int sandbox_spi_get_emul(struct sandbox_state *state,
 
 	return 0;
 }
-
-int dm_scan_other(bool pre_reloc_only)
-{
-	struct sandbox_state *state = state_get_current();
-	int busnum, cs;
-
-	if (pre_reloc_only)
-		return 0;
-	for (busnum = 0; busnum < CONFIG_SANDBOX_SPI_MAX_BUS; busnum++) {
-		for (cs = 0; cs < CONFIG_SANDBOX_SPI_MAX_CS; cs++) {
-			const char *spec = state->spi[busnum][cs].spec;
-			int ret;
-
-			if (spec) {
-				ret = sandbox_sf_bind_bus_cs(state, busnum,
-							     cs, spec);
-				if (ret) {
-					debug("%s: Bind failed for bus %d, cs %d\n",
-					      __func__, busnum, cs);
-					return ret;
-				}
-				debug("%s:  Setting up spec '%s' for bus %d, cs %d\n",
-				      __func__, spec, busnum, cs);
-			}
-		}
-	}
-
-	return 0;
-}
 #endif
 
 static const struct udevice_id sandbox_sf_ids[] = {

commit 6eb4b036a3b54124969f7fb927b2514642bebeb4
Author: Stefan Roese <sr@denx.de>
Date:   Thu Aug 16 18:05:08 2018 +0200

    UPSTREAM: mtd: nand: spi: Add Gigadevice SPI NAND support
    
    This patch adds support for Gigadevices SPI NAND device to the new SPI
    NAND infrastructure in U-Boot. Currently only the 128MiB GD5F1GQ4UC
    device is supported.
    
    Change-Id: I9939a71a038b27bb7250dec0617a0d11e18f03dd
    Signed-off-by: Stefan Roese <sr@denx.de>
    Cc: Miquel Raynal <miquel.raynal@bootlin.com>
    Cc: Boris Brezillon <boris.brezillon@bootlin.com>
    Cc: Jagan Teki <jagan@openedev.com>
    Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Acked-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 9e5c2a755a6ca5f3931de548f43101d0d18ac003)

diff --git a/drivers/mtd/nand/spi/Makefile b/drivers/mtd/nand/spi/Makefile
index a66edd9199..dd6bacae34 100644
--- a/drivers/mtd/nand/spi/Makefile
+++ b/drivers/mtd/nand/spi/Makefile
@@ -1,4 +1,4 @@
 # SPDX-License-Identifier: GPL-2.0
 
-spinand-objs := core.o macronix.o micron.o winbond.o
+spinand-objs := core.o gigadevice.o macronix.o micron.o winbond.o
 obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index 362d104846..cb8ffa3fa9 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -830,6 +830,7 @@ static const struct nand_ops spinand_ops = {
 };
 
 static const struct spinand_manufacturer *spinand_manufacturers[] = {
+	&gigadevice_spinand_manufacturer,
 	&macronix_spinand_manufacturer,
 	&micron_spinand_manufacturer,
 	&winbond_spinand_manufacturer,
diff --git a/drivers/mtd/nand/spi/gigadevice.c b/drivers/mtd/nand/spi/gigadevice.c
new file mode 100644
index 0000000000..0bade20808
--- /dev/null
+++ b/drivers/mtd/nand/spi/gigadevice.c
@@ -0,0 +1,135 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2018 Stefan Roese <sr@denx.de>
+ *
+ * Derived from drivers/mtd/nand/spi/micron.c
+ *   Copyright (c) 2016-2017 Micron Technology, Inc.
+ */
+
+#ifndef __UBOOT__
+#include <linux/device.h>
+#include <linux/kernel.h>
+#endif
+#include <linux/mtd/spinand.h>
+
+#define SPINAND_MFR_GIGADEVICE			0xc8
+
+#define GIGADEVICE_STATUS_ECC_MASK		GENMASK(5, 4)
+#define GIGADEVICE_STATUS_ECC_NO_BITFLIPS	(0 << 4)
+#define GIGADEVICE_STATUS_ECC_1TO7_BITFLIPS	(1 << 4)
+#define GIGADEVICE_STATUS_ECC_8_BITFLIPS	(3 << 4)
+
+static SPINAND_OP_VARIANTS(read_cache_variants,
+		SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
+
+static SPINAND_OP_VARIANTS(write_cache_variants,
+		SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
+		SPINAND_PROG_LOAD(true, 0, NULL, 0));
+
+static SPINAND_OP_VARIANTS(update_cache_variants,
+		SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
+		SPINAND_PROG_LOAD(false, 0, NULL, 0));
+
+static int gd5f1gq4u_ooblayout_ecc(struct mtd_info *mtd, int section,
+				   struct mtd_oob_region *region)
+{
+	if (section)
+		return -ERANGE;
+
+	region->offset = 64;
+	region->length = 64;
+
+	return 0;
+}
+
+static int gd5f1gq4u_ooblayout_free(struct mtd_info *mtd, int section,
+				    struct mtd_oob_region *region)
+{
+	if (section)
+		return -ERANGE;
+
+	/* Reserve 2 bytes for the BBM. */
+	region->offset = 2;
+	region->length = 62;
+
+	return 0;
+}
+
+static const struct mtd_ooblayout_ops gd5f1gq4u_ooblayout = {
+	.ecc = gd5f1gq4u_ooblayout_ecc,
+	.free = gd5f1gq4u_ooblayout_free,
+};
+
+static int gd5f1gq4u_ecc_get_status(struct spinand_device *spinand,
+				    u8 status)
+{
+	if (status)
+		debug("%s (%d): status=%02x\n", __func__, __LINE__, status);
+
+	switch (status & GIGADEVICE_STATUS_ECC_MASK) {
+	case STATUS_ECC_NO_BITFLIPS:
+		return 0;
+
+	case GIGADEVICE_STATUS_ECC_1TO7_BITFLIPS:
+		return 7;
+
+	case GIGADEVICE_STATUS_ECC_8_BITFLIPS:
+		return 8;
+
+	case STATUS_ECC_UNCOR_ERROR:
+		return -EBADMSG;
+
+	default:
+		break;
+	}
+
+	return -EINVAL;
+}
+
+static const struct spinand_info gigadevice_spinand_table[] = {
+	SPINAND_INFO("GD5F1GQ4UC", 0xd1,
+		     NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
+		     NAND_ECCREQ(8, 2048),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     0,
+		     SPINAND_ECCINFO(&gd5f1gq4u_ooblayout,
+				     gd5f1gq4u_ecc_get_status)),
+};
+
+static int gigadevice_spinand_detect(struct spinand_device *spinand)
+{
+	u8 *id = spinand->id.data;
+	int ret;
+
+	/*
+	 * Gigadevice SPI NAND read ID need a dummy byte,
+	 * so the first byte in raw_id is dummy.
+	 */
+	if (id[1] != SPINAND_MFR_GIGADEVICE)
+		return 0;
+
+	ret = spinand_match_and_init(spinand, gigadevice_spinand_table,
+				     ARRAY_SIZE(gigadevice_spinand_table),
+				     id[2]);
+	if (ret)
+		return ret;
+
+	return 1;
+}
+
+static const struct spinand_manufacturer_ops gigadevice_spinand_manuf_ops = {
+	.detect = gigadevice_spinand_detect,
+};
+
+const struct spinand_manufacturer gigadevice_spinand_manufacturer = {
+	.id = SPINAND_MFR_GIGADEVICE,
+	.name = "GigaDevice",
+	.ops = &gigadevice_spinand_manuf_ops,
+};
diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
index 8c9c756179..be01e1e82e 100644
--- a/include/linux/mtd/spinand.h
+++ b/include/linux/mtd/spinand.h
@@ -201,6 +201,7 @@ struct spinand_manufacturer {
 };
 
 /* SPI NAND manufacturers */
+extern const struct spinand_manufacturer gigadevice_spinand_manufacturer;
 extern const struct spinand_manufacturer macronix_spinand_manufacturer;
 extern const struct spinand_manufacturer micron_spinand_manufacturer;
 extern const struct spinand_manufacturer winbond_spinand_manufacturer;

commit 008a0f12441ae08cfc073df286dfd94672bec799
Author: Stefan Roese <sr@denx.de>
Date:   Mon Aug 6 16:33:19 2018 +0200

    UPSTREAM: sf: Add XMC xm25qh64a and xm25qh128a entries
    
    This patch adds support for 2 new XMC (Wuhan Xinxin Semiconductor
    Manufacturing Corp) SPI NOR chips.
    
    This support can be enabled by selecting the SPI_FLASH_XMC Kconfig
    option.
    
    Change-Id: Id0f9eec62f9c99d085e2cba550cd2e0fd77f1261
    Signed-off-by: Stefan Roese <sr@denx.de>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 881e4fc206fb0e7466b532665655647b5956b65e)

diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig
index 98485b1236..76d5a1d115 100644
--- a/drivers/mtd/spi/Kconfig
+++ b/drivers/mtd/spi/Kconfig
@@ -96,6 +96,12 @@ config SPI_FLASH_WINBOND
 	help
 	  Add support for various Winbond SPI flash chips (W25xxx)
 
+config SPI_FLASH_XMC
+	bool "XMC SPI flash support"
+	help
+	  Add support for various XMC (Wuhan Xinxin Semiconductor
+	  Manufacturing Corp.) SPI flash chips (XM25xxx)
+
 endif
 
 config SPI_FLASH_USE_4K_SECTORS
diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c
index 4ce311c417..44e33c7c8b 100644
--- a/drivers/mtd/spi/spi_flash_ids.c
+++ b/drivers/mtd/spi/spi_flash_ids.c
@@ -190,6 +190,10 @@ const struct spi_flash_info spi_flash_ids[] = {
 	{"w25q128jv",	   INFO(0xef7018, 0x0,	64 * 1024,   256, RD_FULL | WR_QPP | SECT_4K) },
 	{"w25q256fw",	   INFO(0xef6019, 0x0,	64 * 1024,   512, RD_FULL | WR_QPP | SECT_4K) },
 	{"w25q256jw",	   INFO(0xef7019, 0x0,	64 * 1024,   512, RD_FULL | WR_QPP | SECT_4K) },
+#endif
+#ifdef CONFIG_SPI_FLASH_XMC /* Wuhan Xinxin Semiconductor Manufacturing Corp */
+	{ "xm25qh64a",	   INFO(0x207017, 0x0, 64 * 1024,    128, SECT_4K | RD_DUAL | RD_QUAD) },
+	{ "xm25qh128a",	   INFO(0x207018, 0x0, 64 * 1024,    256, SECT_4K | RD_DUAL | RD_QUAD) },
 #endif
 	{},	/* Empty entry to terminate the list */
 	/*

commit f87151b32590263209fd0270c8c78064720ef6d5
Author: Miquel Raynal <miquel.raynal@bootlin.com>
Date:   Sat Sep 29 12:58:28 2018 +0200

    UPSTREAM: cmd: mtd: add 'mtd' command
    
    There should not be a 'nand' command, a 'sf' command and certainly not
    a new 'spi-nand' command. Write a 'mtd' command instead to manage all
    MTD devices/partitions at once. This should be the preferred way to
    access any MTD device.
    
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Acked-by: Jagan Teki <jagan@openedev.com>
    Reviewed-by: Stefan Roese <sr@denx.de>
    Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
    Change-Id: I68bcf4f0126c3a9d6ae0481dafcfcaab0506bd3f
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 5db66b3aee6f2c057706d8715f7e5c472e82f047)

diff --git a/cmd/Kconfig b/cmd/Kconfig
index e7cc2d7583..9c365fd56e 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -818,6 +818,12 @@ config CMD_MMC
 	help
 	  MMC memory mapped support.
 
+config CMD_MTD
+	bool "mtd"
+	select MTD_PARTITIONS
+	help
+	  MTD commands support.
+
 config CMD_NAND
 	bool "nand"
 	default y if NAND_SUNXI
@@ -1511,13 +1517,13 @@ config CMD_MTD_BLK
 
 config MTDIDS_DEFAULT
 	string "Default MTD IDs"
-	depends on CMD_MTDPARTS
+	depends on CMD_MTD || CMD_MTDPARTS || CMD_NAND || CMD_FLASH
 	help
 	  Defines a default MTD ID
 
 config MTDPARTS_DEFAULT
 	string "Default MTD partition scheme"
-	depends on CMD_MTDPARTS
+	depends on CMD_MTD || CMD_MTDPARTS || CMD_NAND || CMD_FLASH
 	help
 	  Defines a default MTD partitioning scheme in the Linux MTD command
 	  line partitions format
diff --git a/cmd/Makefile b/cmd/Makefile
index 2682bd7de5..31513c7062 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -99,6 +99,7 @@ obj-$(CONFIG_CMD_MISC) += misc.o
 obj-$(CONFIG_CMD_MMC) += mmc.o
 obj-$(CONFIG_CMD_MMC_SPI) += mmc_spi.o
 obj-$(CONFIG_MP) += mp.o
+obj-$(CONFIG_CMD_MTD) += mtd.o
 obj-$(CONFIG_CMD_MTDPARTS) += mtdparts.o
 obj-$(CONFIG_CMD_MTD_BLK) += mtd_blk.o
 obj-$(CONFIG_CMD_NAND) += nand.o
diff --git a/cmd/mtd.c b/cmd/mtd.c
new file mode 100644
index 0000000000..6142223984
--- /dev/null
+++ b/cmd/mtd.c
@@ -0,0 +1,473 @@
+// SPDX-License-Identifier:  GPL-2.0+
+/*
+ * mtd.c
+ *
+ * Generic command to handle basic operations on any memory device.
+ *
+ * Copyright: Bootlin, 2018
+ * Author: Miquèl Raynal <miquel.raynal@bootlin.com>
+ */
+
+#include <command.h>
+#include <common.h>
+#include <console.h>
+#include <malloc.h>
+#include <mapmem.h>
+#include <mtd.h>
+
+static uint mtd_len_to_pages(struct mtd_info *mtd, u64 len)
+{
+	do_div(len, mtd->writesize);
+
+	return len;
+}
+
+static bool mtd_is_aligned_with_min_io_size(struct mtd_info *mtd, u64 size)
+{
+	return !do_div(size, mtd->writesize);
+}
+
+static bool mtd_is_aligned_with_block_size(struct mtd_info *mtd, u64 size)
+{
+	return !do_div(size, mtd->erasesize);
+}
+
+static void mtd_dump_buf(const u8 *buf, uint len, uint offset)
+{
+	int i, j;
+
+	for (i = 0; i < len; ) {
+		printf("0x%08x:\t", offset + i);
+		for (j = 0; j < 8; j++)
+			printf("%02x ", buf[i + j]);
+		printf(" ");
+		i += 8;
+		for (j = 0; j < 8; j++)
+			printf("%02x ", buf[i + j]);
+		printf("\n");
+		i += 8;
+	}
+}
+
+static void mtd_dump_device_buf(struct mtd_info *mtd, u64 start_off,
+				const u8 *buf, u64 len, bool woob)
+{
+	bool has_pages = mtd->type == MTD_NANDFLASH ||
+		mtd->type == MTD_MLCNANDFLASH;
+	int npages = mtd_len_to_pages(mtd, len);
+	uint page;
+
+	if (has_pages) {
+		for (page = 0; page < npages; page++) {
+			u64 data_off = page * mtd->writesize;
+
+			printf("\nDump %d data bytes from 0x%08llx:\n",
+			       mtd->writesize, start_off + data_off);
+			mtd_dump_buf(&buf[data_off],
+				     mtd->writesize, start_off + data_off);
+
+			if (woob) {
+				u64 oob_off = page * mtd->oobsize;
+
+				printf("Dump %d OOB bytes from page at 0x%08llx:\n",
+				       mtd->oobsize, start_off + data_off);
+				mtd_dump_buf(&buf[len + oob_off],
+					     mtd->oobsize, 0);
+			}
+		}
+	} else {
+		printf("\nDump %lld data bytes from 0x%llx:\n",
+		       len, start_off);
+		mtd_dump_buf(buf, len, start_off);
+	}
+}
+
+static void mtd_show_parts(struct mtd_info *mtd, int level)
+{
+	struct mtd_info *part;
+	int i;
+
+	list_for_each_entry(part, &mtd->partitions, node) {
+		for (i = 0; i < level; i++)
+			printf("\t");
+		printf("  - 0x%012llx-0x%012llx : \"%s\"\n",
+		       part->offset, part->offset + part->size, part->name);
+
+		mtd_show_parts(part, level + 1);
+	}
+}
+
+static void mtd_show_device(struct mtd_info *mtd)
+{
+	/* Device */
+	printf("* %s\n", mtd->name);
+#if defined(CONFIG_DM)
+	if (mtd->dev) {
+		printf("  - device: %s\n", mtd->dev->name);
+		printf("  - parent: %s\n", mtd->dev->parent->name);
+		printf("  - driver: %s\n", mtd->dev->driver->name);
+	}
+#endif
+
+	/* MTD device information */
+	printf("  - type: ");
+	switch (mtd->type) {
+	case MTD_RAM:
+		printf("RAM\n");
+		break;
+	case MTD_ROM:
+		printf("ROM\n");
+		break;
+	case MTD_NORFLASH:
+		printf("NOR flash\n");
+		break;
+	case MTD_NANDFLASH:
+		printf("NAND flash\n");
+		break;
+	case MTD_DATAFLASH:
+		printf("Data flash\n");
+		break;
+	case MTD_UBIVOLUME:
+		printf("UBI volume\n");
+		break;
+	case MTD_MLCNANDFLASH:
+		printf("MLC NAND flash\n");
+		break;
+	case MTD_ABSENT:
+	default:
+		printf("Unknown\n");
+		break;
+	}
+
+	printf("  - block size: 0x%x bytes\n", mtd->erasesize);
+	printf("  - min I/O: 0x%x bytes\n", mtd->writesize);
+
+	if (mtd->oobsize) {
+		printf("  - OOB size: %u bytes\n", mtd->oobsize);
+		printf("  - OOB available: %u bytes\n", mtd->oobavail);
+	}
+
+	if (mtd->ecc_strength) {
+		printf("  - ECC strength: %u bits\n", mtd->ecc_strength);
+		printf("  - ECC step size: %u bytes\n", mtd->ecc_step_size);
+		printf("  - bitflip threshold: %u bits\n",
+		       mtd->bitflip_threshold);
+	}
+
+	printf("  - 0x%012llx-0x%012llx : \"%s\"\n",
+	       mtd->offset, mtd->offset + mtd->size, mtd->name);
+
+	/* MTD partitions, if any */
+	mtd_show_parts(mtd, 1);
+}
+
+/* Logic taken from fs/ubifs/recovery.c:is_empty() */
+static bool mtd_oob_write_is_empty(struct mtd_oob_ops *op)
+{
+	int i;
+
+	for (i = 0; i < op->len; i++)
+		if (op->datbuf[i] != 0xff)
+			return false;
+
+	for (i = 0; i < op->ooblen; i++)
+		if (op->oobbuf[i] != 0xff)
+			return false;
+
+	return true;
+}
+
+static int do_mtd_list(void)
+{
+	struct mtd_info *mtd;
+	int dev_nb = 0;
+
+	/* Ensure all devices (and their partitions) are probed */
+	mtd_probe_devices();
+
+	printf("List of MTD devices:\n");
+	mtd_for_each_device(mtd) {
+		if (!mtd_is_partition(mtd))
+			mtd_show_device(mtd);
+
+		dev_nb++;
+	}
+
+	if (!dev_nb) {
+		printf("No MTD device found\n");
+		return CMD_RET_FAILURE;
+	}
+
+	return CMD_RET_SUCCESS;
+}
+
+static int mtd_special_write_oob(struct mtd_info *mtd, u64 off,
+				 struct mtd_oob_ops *io_op,
+				 bool write_empty_pages, bool woob)
+{
+	int ret = 0;
+
+	/*
+	 * By default, do not write an empty page.
+	 * Skip it by simulating a successful write.
+	 */
+	if (!write_empty_pages && mtd_oob_write_is_empty(io_op)) {
+		io_op->retlen = mtd->writesize;
+		io_op->oobretlen = woob ? mtd->oobsize : 0;
+	} else {
+		ret = mtd_write_oob(mtd, off, io_op);
+	}
+
+	return ret;
+}
+
+static int do_mtd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+	struct mtd_info *mtd;
+	const char *cmd;
+	char *mtd_name;
+
+	/* All MTD commands need at least two arguments */
+	if (argc < 2)
+		return CMD_RET_USAGE;
+
+	/* Parse the command name and its optional suffixes */
+	cmd = argv[1];
+
+	/* List the MTD devices if that is what the user wants */
+	if (strcmp(cmd, "list") == 0)
+		return do_mtd_list();
+
+	/*
+	 * The remaining commands require also at least a device ID.
+	 * Check the selected device is valid. Ensure it is probed.
+	 */
+	if (argc < 3)
+		return CMD_RET_USAGE;
+
+	mtd_name = argv[2];
+	mtd_probe_devices();
+	mtd = get_mtd_device_nm(mtd_name);
+	if (IS_ERR_OR_NULL(mtd)) {
+		printf("MTD device %s not found, ret %ld\n",
+		       mtd_name, PTR_ERR(mtd));
+		return CMD_RET_FAILURE;
+	}
+	put_mtd_device(mtd);
+
+	argc -= 3;
+	argv += 3;
+
+	/* Do the parsing */
+	if (!strncmp(cmd, "read", 4) || !strncmp(cmd, "dump", 4) ||
+	    !strncmp(cmd, "write", 5)) {
+		bool has_pages = mtd->type == MTD_NANDFLASH ||
+				 mtd->type == MTD_MLCNANDFLASH;
+		bool dump, read, raw, woob, write_empty_pages;
+		struct mtd_oob_ops io_op = {};
+		uint user_addr = 0, npages;
+		u64 start_off, off, len, remaining, default_len;
+		u32 oob_len;
+		u8 *buf;
+		int ret;
+
+		dump = !strncmp(cmd, "dump", 4);
+		read = dump || !strncmp(cmd, "read", 4);
+		raw = strstr(cmd, ".raw");
+		woob = strstr(cmd, ".oob");
+		write_empty_pages = !has_pages || strstr(cmd, ".dontskipff");
+
+		if (!dump) {
+			if (!argc)
+				return CMD_RET_USAGE;
+
+			user_addr = simple_strtoul(argv[0], NULL, 16);
+			argc--;
+			argv++;
+		}
+
+		start_off = argc > 0 ? simple_strtoul(argv[0], NULL, 16) : 0;
+		if (!mtd_is_aligned_with_min_io_size(mtd, start_off)) {
+			printf("Offset not aligned with a page (0x%x)\n",
+			       mtd->writesize);
+			return CMD_RET_FAILURE;
+		}
+
+		default_len = dump ? mtd->writesize : mtd->size;
+		len = argc > 1 ? simple_strtoul(argv[1], NULL, 16) :
+				 default_len;
+		if (!mtd_is_aligned_with_min_io_size(mtd, len)) {
+			len = round_up(len, mtd->writesize);
+			printf("Size not on a page boundary (0x%x), rounding to 0x%llx\n",
+			       mtd->writesize, len);
+		}
+
+		remaining = len;
+		npages = mtd_len_to_pages(mtd, len);
+		oob_len = woob ? npages * mtd->oobsize : 0;
+
+		if (dump)
+			buf = kmalloc(len + oob_len, GFP_KERNEL);
+		else
+			buf = map_sysmem(user_addr, 0);
+
+		if (!buf) {
+			printf("Could not map/allocate the user buffer\n");
+			return CMD_RET_FAILURE;
+		}
+
+		if (has_pages)
+			printf("%s %lld byte(s) (%d page(s)) at offset 0x%08llx%s%s%s\n",
+			       read ? "Reading" : "Writing", len, npages, start_off,
+			       raw ? " [raw]" : "", woob ? " [oob]" : "",
+			       !read && write_empty_pages ? " [dontskipff]" : "");
+		else
+			printf("%s %lld byte(s) at offset 0x%08llx\n",
+			       read ? "Reading" : "Writing", len, start_off);
+
+		io_op.mode = raw ? MTD_OPS_RAW : MTD_OPS_AUTO_OOB;
+		io_op.len = has_pages ? mtd->writesize : len;
+		io_op.ooblen = woob ? mtd->oobsize : 0;
+		io_op.datbuf = buf;
+		io_op.oobbuf = woob ? &buf[len] : NULL;
+
+		/* Search for the first good block after the given offset */
+		off = start_off;
+		while (mtd_block_isbad(mtd, off))
+			off += mtd->erasesize;
+
+		/* Loop over the pages to do the actual read/write */
+		while (remaining) {
+			/* Skip the block if it is bad */
+			if (mtd_is_aligned_with_block_size(mtd, off) &&
+			    mtd_block_isbad(mtd, off)) {
+				off += mtd->erasesize;
+				continue;
+			}
+
+			if (read)
+				ret = mtd_read_oob(mtd, off, &io_op);
+			else
+				ret = mtd_special_write_oob(mtd, off, &io_op,
+							    write_empty_pages,
+							    woob);
+
+			if (ret) {
+				printf("Failure while %s at offset 0x%llx\n",
+				       read ? "reading" : "writing", off);
+				return CMD_RET_FAILURE;
+			}
+
+			off += io_op.retlen;
+			remaining -= io_op.retlen;
+			io_op.datbuf += io_op.retlen;
+			io_op.oobbuf += io_op.oobretlen;
+		}
+
+		if (!ret && dump)
+			mtd_dump_device_buf(mtd, start_off, buf, len, woob);
+
+		if (dump)
+			kfree(buf);
+		else
+			unmap_sysmem(buf);
+
+		if (ret) {
+			printf("%s on %s failed with error %d\n",
+			       read ? "Read" : "Write", mtd->name, ret);
+			return CMD_RET_FAILURE;
+		}
+
+	} else if (!strcmp(cmd, "erase")) {
+		bool scrub = strstr(cmd, ".dontskipbad");
+		struct erase_info erase_op = {};
+		u64 off, len;
+		int ret;
+
+		off = argc > 0 ? simple_strtoul(argv[0], NULL, 16) : 0;
+		len = argc > 1 ? simple_strtoul(argv[1], NULL, 16) : mtd->size;
+
+		if (!mtd_is_aligned_with_block_size(mtd, off)) {
+			printf("Offset not aligned with a block (0x%x)\n",
+			       mtd->erasesize);
+			return CMD_RET_FAILURE;
+		}
+
+		if (!mtd_is_aligned_with_block_size(mtd, len)) {
+			printf("Size not a multiple of a block (0x%x)\n",
+			       mtd->erasesize);
+			return CMD_RET_FAILURE;
+		}
+
+		printf("Erasing 0x%08llx ... 0x%08llx (%d eraseblock(s))\n",
+		       off, off + len - 1, mtd_div_by_eb(len, mtd));
+
+		erase_op.mtd = mtd;
+		erase_op.addr = off;
+		erase_op.len = len;
+		erase_op.scrub = scrub;
+
+		while (erase_op.len) {
+			ret = mtd_erase(mtd, &erase_op);
+
+			/* Abort if its not a bad block error */
+			if (ret != -EIO)
+				break;
+
+			printf("Skipping bad block at 0x%08llx\n",
+			       erase_op.fail_addr);
+
+			/* Skip bad block and continue behind it */
+			erase_op.len -= erase_op.fail_addr - erase_op.addr;
+			erase_op.len -= mtd->erasesize;
+			erase_op.addr = erase_op.fail_addr + mtd->erasesize;
+		}
+
+		if (ret && ret != -EIO)
+			return CMD_RET_FAILURE;
+	} else if (!strcmp(cmd, "bad")) {
+		loff_t off;
+
+		if (!mtd_can_have_bb(mtd)) {
+			printf("Only NAND-based devices can have bad blocks\n");
+			return CMD_RET_SUCCESS;
+		}
+
+		printf("MTD device %s bad blocks list:\n", mtd->name);
+		for (off = 0; off < mtd->size; off += mtd->erasesize)
+			if (mtd_block_isbad(mtd, off))
+				printf("\t0x%08llx\n", off);
+	} else {
+		return CMD_RET_USAGE;
+	}
+
+	return CMD_RET_SUCCESS;
+}
+
+static char mtd_help_text[] =
+#ifdef CONFIG_SYS_LONGHELP
+	"- generic operations on memory technology devices\n\n"
+	"mtd list\n"
+	"mtd read[.raw][.oob]                  <name> <addr> [<off> [<size>]]\n"
+	"mtd dump[.raw][.oob]                  <name>        [<off> [<size>]]\n"
+	"mtd write[.raw][.oob][.dontskipff]    <name> <addr> [<off> [<size>]]\n"
+	"mtd erase[.dontskipbad]               <name>        [<off> [<size>]]\n"
+	"\n"
+	"Specific functions:\n"
+	"mtd bad                               <name>\n"
+	"\n"
+	"With:\n"
+	"\t<name>: NAND partition/chip name\n"
+	"\t<addr>: user address from/to which data will be retrieved/stored\n"
+	"\t<off>: offset in <name> in bytes (default: start of the part)\n"
+	"\t\t* must be block-aligned for erase\n"
+	"\t\t* must be page-aligned otherwise\n"
+	"\t<size>: length of the operation in bytes (default: the entire device)\n"
+	"\t\t* must be a multiple of a block for erase\n"
+	"\t\t* must be a multiple of a page otherwise (special case: default is a page with dump)\n"
+	"\n"
+	"The .dontskipff option forces writing empty pages, don't use it if unsure.\n"
+#endif
+	"";
+
+U_BOOT_CMD(mtd, 10, 1, do_mtd, "MTD utils", mtd_help_text);
diff --git a/drivers/mtd/Makefile b/drivers/mtd/Makefile
index ea006eeed4..6c31833ff8 100644
--- a/drivers/mtd/Makefile
+++ b/drivers/mtd/Makefile
@@ -5,7 +5,7 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
 
-ifneq (,$(findstring y,$(CONFIG_MTD_DEVICE)$(CONFIG_CMD_NAND)$(CONFIG_CMD_ONENAND)$(CONFIG_CMD_SF)))
+ifneq (,$(findstring y,$(CONFIG_MTD_DEVICE)$(CONFIG_CMD_NAND)$(CONFIG_CMD_ONENAND)$(CONFIG_CMD_SF)$(CONFIG_CMD_MTD)))
 obj-y += mtdcore.o mtd_uboot.o
 endif
 obj-$(CONFIG_MTD) += mtd-uclass.o
diff --git a/drivers/mtd/mtd_uboot.c b/drivers/mtd/mtd_uboot.c
index 38b04a3a34..d7159075bb 100644
--- a/drivers/mtd/mtd_uboot.c
+++ b/drivers/mtd/mtd_uboot.c
@@ -5,8 +5,15 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 #include <common.h>
+#include <dm/device.h>
+#include <dm/uclass-internal.h>
+#include <jffs2/jffs2.h> /* LEGACY */
 #include <linux/mtd/mtd.h>
-#include <jffs2/jffs2.h> /* Legacy */
+#include <linux/mtd/partitions.h>
+#include <mtd.h>
+
+#define MTD_NAME_MAX_LEN 20
+
 
 /**
  * mtd_search_alternate_name - Search an alternate name for @mtdname thanks to
@@ -69,6 +76,158 @@ int mtd_search_alternate_name(const char *mtdname, char *altname,
 	return -EINVAL;
 }
 
+#if IS_ENABLED(CONFIG_MTD)
+static void mtd_probe_uclass_mtd_devs(void)
+{
+	struct udevice *dev;
+	int idx = 0;
+
+	/* Probe devices with DM compliant drivers */
+	while (!uclass_find_device(UCLASS_MTD, idx, &dev) && dev) {
+		mtd_probe(dev);
+		idx++;
+	}
+}
+#else
+static void mtd_probe_uclass_mtd_devs(void) { }
+#endif
+
+#if defined(CONFIG_MTD_PARTITIONS)
+int mtd_probe_devices(void)
+{
+	static char *old_mtdparts;
+	static char *old_mtdids;
+	const char *mtdparts = env_get("mtdparts");
+	const char *mtdids = env_get("mtdids");
+	bool remaining_partitions = true;
+	struct mtd_info *mtd;
+
+	mtd_probe_uclass_mtd_devs();
+
+	/* Check if mtdparts/mtdids changed since last call, otherwise: exit */
+	if (!strcmp(mtdparts, old_mtdparts) && !strcmp(mtdids, old_mtdids))
+		return 0;
+
+	/* Update the local copy of mtdparts */
+	free(old_mtdparts);
+	free(old_mtdids);
+	old_mtdparts = strdup(mtdparts);
+	old_mtdids = strdup(mtdids);
+
+	/* If at least one partition is still in use, do not delete anything */
+	mtd_for_each_device(mtd) {
+		if (mtd->usecount) {
+			printf("Partition \"%s\" already in use, aborting\n",
+			       mtd->name);
+			return -EACCES;
+		}
+	}
+
+	/*
+	 * Everything looks clear, remove all partitions. It is not safe to
+	 * remove entries from the mtd_for_each_device loop as it uses idr
+	 * indexes and the partitions removal is done in bulk (all partitions of
+	 * one device at the same time), so break and iterate from start each
+	 * time a new partition is found and deleted.
+	 */
+	while (remaining_partitions) {
+		remaining_partitions = false;
+		mtd_for_each_device(mtd) {
+			if (!mtd_is_partition(mtd) && mtd_has_partitions(mtd)) {
+				del_mtd_partitions(mtd);
+				remaining_partitions = true;
+				break;
+			}
+		}
+	}
+
+	/* Start the parsing by ignoring the extra 'mtdparts=' prefix, if any */
+	if (strstr(mtdparts, "mtdparts="))
+		mtdparts += 9;
+
+	/* For each MTD device in mtdparts */
+	while (mtdparts[0] != '\0') {
+		char mtd_name[MTD_NAME_MAX_LEN], *colon;
+		struct mtd_partition *parts;
+		int mtd_name_len, nparts;
+		int ret;
+
+		colon = strchr(mtdparts, ':');
+		if (!colon) {
+			printf("Wrong mtdparts: %s\n", mtdparts);
+			return -EINVAL;
+		}
+
+		mtd_name_len = colon - mtdparts;
+		strncpy(mtd_name, mtdparts, mtd_name_len);
+		mtd_name[mtd_name_len] = '\0';
+		/* Move the pointer forward (including the ':') */
+		mtdparts += mtd_name_len + 1;
+		mtd = get_mtd_device_nm(mtd_name);
+		if (IS_ERR_OR_NULL(mtd)) {
+			char linux_name[MTD_NAME_MAX_LEN];
+
+			/*
+			 * The MTD device named "mtd_name" does not exist. Try
+			 * to find a correspondance with an MTD device having
+			 * the same type and number as defined in the mtdids.
+			 */
+			debug("No device named %s\n", mtd_name);
+			ret = mtd_search_alternate_name(mtd_name, linux_name,
+							MTD_NAME_MAX_LEN);
+			if (!ret)
+				mtd = get_mtd_device_nm(linux_name);
+
+			/*
+			 * If no device could be found, move the mtdparts
+			 * pointer forward until the next set of partitions.
+			 */
+			if (ret || IS_ERR_OR_NULL(mtd)) {
+				printf("Could not find a valid device for %s\n",
+				       mtd_name);
+				mtdparts = strchr(mtdparts, ';');
+				if (mtdparts)
+					mtdparts++;
+
+				continue;
+			}
+		}
+
+		/*
+		 * Parse the MTD device partitions. It will update the mtdparts
+		 * pointer, create an array of parts (that must be freed), and
+		 * return the number of partition structures in the array.
+		 */
+		ret = mtd_parse_partitions(mtd, &mtdparts, &parts, &nparts);
+		if (ret) {
+			printf("Could not parse device %s\n", mtd->name);
+			put_mtd_device(mtd);
+			return -EINVAL;
+		}
+
+		if (!nparts)
+			continue;
+
+		/* Create the new MTD partitions */
+		add_mtd_partitions(mtd, parts, nparts);
+
+		/* Free the structures allocated during the parsing */
+		mtd_free_parsed_partitions(parts, nparts);
+
+		put_mtd_device(mtd);
+	}
+
+	return 0;
+}
+#else
+int mtd_probe_devices(void)
+{
+	mtd_probe_uclass_mtd_devs();
+
+	return 0;
+}
+#endif /* defined(CONFIG_MTD_PARTITIONS) */
+
 /* Legacy */
 
 static int get_part(const char *partname, int *idx, loff_t *off, loff_t *size,
diff --git a/include/mtd.h b/include/mtd.h
index 5ce07eeeff..97a1061e36 100644
--- a/include/mtd.h
+++ b/include/mtd.h
@@ -10,5 +10,6 @@
 #include <linux/mtd/mtd.h>
 
 int mtd_probe(struct udevice *dev);
+int mtd_probe_devices(void);
 
 #endif	/* _MTD_H_ */

commit fe85de89e43efd43a175b1ece864ce20f4f1244d
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue Jul 2 20:45:46 2019 +0800

    cmd: mtd: rename mtd.c to mtd_blk.c
    
    Change-Id: Ie35d54afdbc0580af06805eca9f0db813db2dfe5
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 50c354f326..e7cc2d7583 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1504,6 +1504,11 @@ config CMD_MTD
 	help
 	  MTD support
 
+config CMD_MTD_BLK
+	bool "MTD block support"
+	help
+	  MTD block support
+
 config MTDIDS_DEFAULT
 	string "Default MTD IDs"
 	depends on CMD_MTDPARTS
diff --git a/cmd/Makefile b/cmd/Makefile
index 853643bfb2..2682bd7de5 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -100,7 +100,7 @@ obj-$(CONFIG_CMD_MMC) += mmc.o
 obj-$(CONFIG_CMD_MMC_SPI) += mmc_spi.o
 obj-$(CONFIG_MP) += mp.o
 obj-$(CONFIG_CMD_MTDPARTS) += mtdparts.o
-obj-$(CONFIG_CMD_MTD) += mtd.o
+obj-$(CONFIG_CMD_MTD_BLK) += mtd_blk.o
 obj-$(CONFIG_CMD_NAND) += nand.o
 obj-$(CONFIG_CMD_NET) += net.o
 obj-$(CONFIG_CMD_ONENAND) += onenand.o
diff --git a/cmd/mtd.c b/cmd/mtd_blk.c
similarity index 100%
rename from cmd/mtd.c
rename to cmd/mtd_blk.c

commit c7314be4306f9967c37b441c75fe6a777cf10032
Author: Miquel Raynal <miquel.raynal@bootlin.com>
Date:   Sat Sep 29 12:58:27 2018 +0200

    UPSTREAM: mtd: mtdpart: implement proper partition handling
    
    Instead of collecting partitions in a flat list, create a hierarchy
    within the mtd_info structure: use a partitions list to keep track of
    the partitions of an MTD device (which might be itself a partition of
    another MTD device), a pointer to the parent device (NULL when the MTD
    device is the root one, not a partition).
    
    By also saving directly in mtd_info the offset of the partition, we
    can get rid of the mtd_part structure.
    
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Reviewed-by: Stefan Roese <sr@denx.de>
    Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
    Change-Id: I87c81be7b75c7d71db5dce2fb4b0cfb1ec1a0fe2
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 2a74930da57f6fbe3c24509f1d481f435acd2356)

diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c
index 61d60e402a..d131a962a2 100644
--- a/drivers/mtd/mtdcore.c
+++ b/drivers/mtd/mtdcore.c
@@ -427,6 +427,8 @@ int add_mtd_device(struct mtd_info *mtd)
 	mtd->index = i;
 	mtd->usecount = 0;
 
+	INIT_LIST_HEAD(&mtd->partitions);
+
 	/* default value if not set by driver */
 	if (mtd->bitflip_threshold == 0)
 		mtd->bitflip_threshold = mtd->ecc_strength;
diff --git a/drivers/mtd/mtdpart.c b/drivers/mtd/mtdpart.c
index c359665cb7..b1b6d27d7a 100644
--- a/drivers/mtd/mtdpart.c
+++ b/drivers/mtd/mtdpart.c
@@ -31,29 +31,12 @@
 
 #include "mtdcore.h"
 
-/* Our partition linked list */
-static LIST_HEAD(mtd_partitions);
 #ifndef __UBOOT__
 static DEFINE_MUTEX(mtd_partitions_mutex);
 #else
 DEFINE_MUTEX(mtd_partitions_mutex);
 #endif
 
-/* Our partition node structure */
-struct mtd_part {
-	struct mtd_info mtd;
-	struct mtd_info *master;
-	uint64_t offset;
-	struct list_head list;
-};
-
-/*
- * Given a pointer to the MTD object in the mtd_part structure, we can retrieve
- * the pointer to that structure with this macro.
- */
-#define PART(x)  ((struct mtd_part *)(x))
-
-
 #ifdef __UBOOT__
 /* from mm/util.c */
 
@@ -295,19 +278,18 @@ void mtd_free_parsed_partitions(struct mtd_partition *parts,
 static int part_read(struct mtd_info *mtd, loff_t from, size_t len,
 		size_t *retlen, u_char *buf)
 {
-	struct mtd_part *part = PART(mtd);
 	struct mtd_ecc_stats stats;
 	int res;
 
-	stats = part->master->ecc_stats;
-	res = part->master->_read(part->master, from + part->offset, len,
-				  retlen, buf);
+	stats = mtd->parent->ecc_stats;
+	res = mtd->parent->_read(mtd->parent, from + mtd->offset, len,
+				 retlen, buf);
 	if (unlikely(mtd_is_eccerr(res)))
 		mtd->ecc_stats.failed +=
-			part->master->ecc_stats.failed - stats.failed;
+			mtd->parent->ecc_stats.failed - stats.failed;
 	else
 		mtd->ecc_stats.corrected +=
-			part->master->ecc_stats.corrected - stats.corrected;
+			mtd->parent->ecc_stats.corrected - stats.corrected;
 	return res;
 }
 
@@ -315,17 +297,13 @@ static int part_read(struct mtd_info *mtd, loff_t from, size_t len,
 static int part_point(struct mtd_info *mtd, loff_t from, size_t len,
 		size_t *retlen, void **virt, resource_size_t *phys)
 {
-	struct mtd_part *part = PART(mtd);
-
-	return part->master->_point(part->master, from + part->offset, len,
-				    retlen, virt, phys);
+	return mtd->parent->_point(mtd->parent, from + mtd->offset, len,
+				   retlen, virt, phys);
 }
 
 static int part_unpoint(struct mtd_info *mtd, loff_t from, size_t len)
 {
-	struct mtd_part *part = PART(mtd);
-
-	return part->master->_unpoint(part->master, from + part->offset, len);
+	return mtd->parent->_unpoint(mtd->parent, from + mtd->offset, len);
 }
 #endif
 
@@ -334,17 +312,13 @@ static unsigned long part_get_unmapped_area(struct mtd_info *mtd,
 					    unsigned long offset,
 					    unsigned long flags)
 {
-	struct mtd_part *part = PART(mtd);
-
-	offset += part->offset;
-	return part->master->_get_unmapped_area(part->master, len, offset,
-						flags);
+	offset += mtd->offset;
+	return mtd->parent->_get_unmapped_area(mtd->parent, len, offset, flags);
 }
 
 static int part_read_oob(struct mtd_info *mtd, loff_t from,
 		struct mtd_oob_ops *ops)
 {
-	struct mtd_part *part = PART(mtd);
 	int res;
 
 	if (from >= mtd->size)
@@ -369,7 +343,7 @@ static int part_read_oob(struct mtd_info *mtd, loff_t from,
 			return -EINVAL;
 	}
 
-	res = part->master->_read_oob(part->master, from + part->offset, ops);
+	res = mtd->parent->_read_oob(mtd->parent, from + mtd->offset, ops);
 	if (unlikely(res)) {
 		if (mtd_is_bitflip(res))
 			mtd->ecc_stats.corrected++;
@@ -382,99 +356,87 @@ static int part_read_oob(struct mtd_info *mtd, loff_t from,
 static int part_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
 		size_t len, size_t *retlen, u_char *buf)
 {
-	struct mtd_part *part = PART(mtd);
-	return part->master->_read_user_prot_reg(part->master, from, len,
-						 retlen, buf);
+	return mtd->parent->_read_user_prot_reg(mtd->parent, from, len,
+						retlen, buf);
 }
 
 static int part_get_user_prot_info(struct mtd_info *mtd, size_t len,
 				   size_t *retlen, struct otp_info *buf)
 {
-	struct mtd_part *part = PART(mtd);
-	return part->master->_get_user_prot_info(part->master, len, retlen,
-						 buf);
+	return mtd->parent->_get_user_prot_info(mtd->parent, len, retlen,
+						buf);
 }
 
 static int part_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
 		size_t len, size_t *retlen, u_char *buf)
 {
-	struct mtd_part *part = PART(mtd);
-	return part->master->_read_fact_prot_reg(part->master, from, len,
-						 retlen, buf);
+	return mtd->parent->_read_fact_prot_reg(mtd->parent, from, len,
+						retlen, buf);
 }
 
 static int part_get_fact_prot_info(struct mtd_info *mtd, size_t len,
 				   size_t *retlen, struct otp_info *buf)
 {
-	struct mtd_part *part = PART(mtd);
-	return part->master->_get_fact_prot_info(part->master, len, retlen,
-						 buf);
+	return mtd->parent->_get_fact_prot_info(mtd->parent, len, retlen,
+						buf);
 }
 
 static int part_write(struct mtd_info *mtd, loff_t to, size_t len,
 		size_t *retlen, const u_char *buf)
 {
-	struct mtd_part *part = PART(mtd);
-	return part->master->_write(part->master, to + part->offset, len,
-				    retlen, buf);
+	return mtd->parent->_write(mtd->parent, to + mtd->offset, len,
+				   retlen, buf);
 }
 
 static int part_panic_write(struct mtd_info *mtd, loff_t to, size_t len,
 		size_t *retlen, const u_char *buf)
 {
-	struct mtd_part *part = PART(mtd);
-	return part->master->_panic_write(part->master, to + part->offset, len,
-					  retlen, buf);
+	return mtd->parent->_panic_write(mtd->parent, to + mtd->offset, len,
+					 retlen, buf);
 }
 
 static int part_write_oob(struct mtd_info *mtd, loff_t to,
 		struct mtd_oob_ops *ops)
 {
-	struct mtd_part *part = PART(mtd);
-
 	if (to >= mtd->size)
 		return -EINVAL;
 	if (ops->datbuf && to + ops->len > mtd->size)
 		return -EINVAL;
-	return part->master->_write_oob(part->master, to + part->offset, ops);
+	return mtd->parent->_write_oob(mtd->parent, to + mtd->offset, ops);
 }
 
 static int part_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
 		size_t len, size_t *retlen, u_char *buf)
 {
-	struct mtd_part *part = PART(mtd);
-	return part->master->_write_user_prot_reg(part->master, from, len,
-						  retlen, buf);
+	return mtd->parent->_write_user_prot_reg(mtd->parent, from, len,
+						 retlen, buf);
 }
 
 static int part_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
 		size_t len)
 {
-	struct mtd_part *part = PART(mtd);
-	return part->master->_lock_user_prot_reg(part->master, from, len);
+	return mtd->parent->_lock_user_prot_reg(mtd->parent, from, len);
 }
 
 #ifndef __UBOOT__
 static int part_writev(struct mtd_info *mtd, const struct kvec *vecs,
 		unsigned long count, loff_t to, size_t *retlen)
 {
-	struct mtd_part *part = PART(mtd);
-	return part->master->_writev(part->master, vecs, count,
-				     to + part->offset, retlen);
+	return mtd->parent->_writev(mtd->parent, vecs, count,
+				    to + mtd->offset, retlen);
 }
 #endif
 
 static int part_erase(struct mtd_info *mtd, struct erase_info *instr)
 {
-	struct mtd_part *part = PART(mtd);
 	int ret;
 
-	instr->addr += part->offset;
-	ret = part->master->_erase(part->master, instr);
+	instr->addr += mtd->offset;
+	ret = mtd->parent->_erase(mtd->parent, instr);
 	if (ret) {
 		if (instr->fail_addr != MTD_FAIL_ADDR_UNKNOWN)
-			instr->fail_addr -= part->offset;
-		instr->addr -= part->offset;
+			instr->fail_addr -= mtd->offset;
+		instr->addr -= mtd->offset;
 	}
 	return ret;
 }
@@ -482,11 +444,9 @@ static int part_erase(struct mtd_info *mtd, struct erase_info *instr)
 void mtd_erase_callback(struct erase_info *instr)
 {
 	if (instr->mtd->_erase == part_erase) {
-		struct mtd_part *part = PART(instr->mtd);
-
 		if (instr->fail_addr != MTD_FAIL_ADDR_UNKNOWN)
-			instr->fail_addr -= part->offset;
-		instr->addr -= part->offset;
+			instr->fail_addr -= instr->mtd->offset;
+		instr->addr -= instr->mtd->offset;
 	}
 	if (instr->callback)
 		instr->callback(instr);
@@ -495,107 +455,112 @@ EXPORT_SYMBOL_GPL(mtd_erase_callback);
 
 static int part_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
 {
-	struct mtd_part *part = PART(mtd);
-	return part->master->_lock(part->master, ofs + part->offset, len);
+	return mtd->parent->_lock(mtd->parent, ofs + mtd->offset, len);
 }
 
 static int part_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
 {
-	struct mtd_part *part = PART(mtd);
-	return part->master->_unlock(part->master, ofs + part->offset, len);
+	return mtd->parent->_unlock(mtd->parent, ofs + mtd->offset, len);
 }
 
 static int part_is_locked(struct mtd_info *mtd, loff_t ofs, uint64_t len)
 {
-	struct mtd_part *part = PART(mtd);
-	return part->master->_is_locked(part->master, ofs + part->offset, len);
+	return mtd->parent->_is_locked(mtd->parent, ofs + mtd->offset, len);
 }
 
 static void part_sync(struct mtd_info *mtd)
 {
-	struct mtd_part *part = PART(mtd);
-	part->master->_sync(part->master);
+	mtd->parent->_sync(mtd->parent);
 }
 
 #ifndef __UBOOT__
 static int part_suspend(struct mtd_info *mtd)
 {
-	struct mtd_part *part = PART(mtd);
-	return part->master->_suspend(part->master);
+	return mtd->parent->_suspend(mtd->parent);
 }
 
 static void part_resume(struct mtd_info *mtd)
 {
-	struct mtd_part *part = PART(mtd);
-	part->master->_resume(part->master);
+	mtd->parent->_resume(mtd->parent);
 }
 #endif
 
 static int part_block_isreserved(struct mtd_info *mtd, loff_t ofs)
 {
-	struct mtd_part *part = PART(mtd);
-	ofs += part->offset;
-	return part->master->_block_isreserved(part->master, ofs);
+	ofs += mtd->offset;
+	return mtd->parent->_block_isreserved(mtd->parent, ofs);
 }
 
 static int part_block_isbad(struct mtd_info *mtd, loff_t ofs)
 {
-	struct mtd_part *part = PART(mtd);
-	ofs += part->offset;
-	return part->master->_block_isbad(part->master, ofs);
+	ofs += mtd->offset;
+	return mtd->parent->_block_isbad(mtd->parent, ofs);
 }
 
 static int part_block_markbad(struct mtd_info *mtd, loff_t ofs)
 {
-	struct mtd_part *part = PART(mtd);
 	int res;
 
-	ofs += part->offset;
-	res = part->master->_block_markbad(part->master, ofs);
+	ofs += mtd->offset;
+	res = mtd->parent->_block_markbad(mtd->parent, ofs);
 	if (!res)
 		mtd->ecc_stats.badblocks++;
 	return res;
 }
 
-static inline void free_partition(struct mtd_part *p)
+static inline void free_partition(struct mtd_info *p)
 {
-	kfree(p->mtd.name);
+	kfree(p->name);
 	kfree(p);
 }
 
 /*
  * This function unregisters and destroy all slave MTD objects which are
- * attached to the given master MTD object.
+ * attached to the given master MTD object, recursively.
  */
+static int do_del_mtd_partitions(struct mtd_info *master)
+{
+	struct mtd_info *slave, *next;
+	int ret, err = 0;
+
+	list_for_each_entry_safe(slave, next, &master->partitions, node) {
+		if (mtd_has_partitions(slave))
+			del_mtd_partitions(slave);
+
+		debug("Deleting %s MTD partition\n", slave->name);
+		ret = del_mtd_device(slave);
+		if (ret < 0) {
+			printf("Error when deleting partition \"%s\" (%d)\n",
+			       slave->name, ret);
+			err = ret;
+			continue;
+		}
+
+		list_del(&slave->node);
+		free_partition(slave);
+	}
+
+	return err;
+}
 
 int del_mtd_partitions(struct mtd_info *master)
 {
-	struct mtd_part *slave, *next;
-	int ret, err = 0;
+	int ret;
 
 	debug("Deleting MTD partitions on \"%s\":\n", master->name);
 
 	mutex_lock(&mtd_partitions_mutex);
-	list_for_each_entry_safe(slave, next, &mtd_partitions, list)
-		if (slave->master == master) {
-			ret = del_mtd_device(&slave->mtd);
-			if (ret < 0) {
-				err = ret;
-				continue;
-			}
-			list_del(&slave->list);
-			free_partition(slave);
-		}
+	ret = do_del_mtd_partitions(master);
 	mutex_unlock(&mtd_partitions_mutex);
 
-	return err;
+	return ret;
 }
 
-static struct mtd_part *allocate_partition(struct mtd_info *master,
-			const struct mtd_partition *part, int partno,
-			uint64_t cur_offset)
+static struct mtd_info *allocate_partition(struct mtd_info *master,
+					   const struct mtd_partition *part,
+					   int partno, uint64_t cur_offset)
 {
-	struct mtd_part *slave;
+	struct mtd_info *slave;
 	char *name;
 
 	/* allocate the partition structure */
@@ -610,85 +575,87 @@ static struct mtd_part *allocate_partition(struct mtd_info *master,
 	}
 
 	/* set up the MTD object for this partition */
-	slave->mtd.type = master->type;
-	slave->mtd.flags = master->flags & ~part->mask_flags;
-	slave->mtd.size = part->size;
-	slave->mtd.writesize = master->writesize;
-	slave->mtd.writebufsize = master->writebufsize;
-	slave->mtd.oobsize = master->oobsize;
-	slave->mtd.oobavail = master->oobavail;
-	slave->mtd.subpage_sft = master->subpage_sft;
-
-	slave->mtd.name = name;
-	slave->mtd.owner = master->owner;
+	slave->type = master->type;
+	slave->flags = master->flags & ~part->mask_flags;
+	slave->size = part->size;
+	slave->writesize = master->writesize;
+	slave->writebufsize = master->writebufsize;
+	slave->oobsize = master->oobsize;
+	slave->oobavail = master->oobavail;
+	slave->subpage_sft = master->subpage_sft;
+
+	slave->name = name;
+	slave->owner = master->owner;
 #ifndef __UBOOT__
-	slave->mtd.backing_dev_info = master->backing_dev_info;
+	slave->backing_dev_info = master->backing_dev_info;
 
 	/* NOTE:  we don't arrange MTDs as a tree; it'd be error-prone
 	 * to have the same data be in two different partitions.
 	 */
-	slave->mtd.dev.parent = master->dev.parent;
+	slave->dev.parent = master->dev.parent;
 #endif
 
 	if (master->_read)
-		slave->mtd._read = part_read;
+		slave->_read = part_read;
 	if (master->_write)
-		slave->mtd._write = part_write;
+		slave->_write = part_write;
 
 	if (master->_panic_write)
-		slave->mtd._panic_write = part_panic_write;
+		slave->_panic_write = part_panic_write;
 
 #ifndef __UBOOT__
 	if (master->_point && master->_unpoint) {
-		slave->mtd._point = part_point;
-		slave->mtd._unpoint = part_unpoint;
+		slave->_point = part_point;
+		slave->_unpoint = part_unpoint;
 	}
 #endif
 
 	if (master->_get_unmapped_area)
-		slave->mtd._get_unmapped_area = part_get_unmapped_area;
+		slave->_get_unmapped_area = part_get_unmapped_area;
 	if (master->_read_oob)
-		slave->mtd._read_oob = part_read_oob;
+		slave->_read_oob = part_read_oob;
 	if (master->_write_oob)
-		slave->mtd._write_oob = part_write_oob;
+		slave->_write_oob = part_write_oob;
 	if (master->_read_user_prot_reg)
-		slave->mtd._read_user_prot_reg = part_read_user_prot_reg;
+		slave->_read_user_prot_reg = part_read_user_prot_reg;
 	if (master->_read_fact_prot_reg)
-		slave->mtd._read_fact_prot_reg = part_read_fact_prot_reg;
+		slave->_read_fact_prot_reg = part_read_fact_prot_reg;
 	if (master->_write_user_prot_reg)
-		slave->mtd._write_user_prot_reg = part_write_user_prot_reg;
+		slave->_write_user_prot_reg = part_write_user_prot_reg;
 	if (master->_lock_user_prot_reg)
-		slave->mtd._lock_user_prot_reg = part_lock_user_prot_reg;
+		slave->_lock_user_prot_reg = part_lock_user_prot_reg;
 	if (master->_get_user_prot_info)
-		slave->mtd._get_user_prot_info = part_get_user_prot_info;
+		slave->_get_user_prot_info = part_get_user_prot_info;
 	if (master->_get_fact_prot_info)
-		slave->mtd._get_fact_prot_info = part_get_fact_prot_info;
+		slave->_get_fact_prot_info = part_get_fact_prot_info;
 	if (master->_sync)
-		slave->mtd._sync = part_sync;
+		slave->_sync = part_sync;
 #ifndef __UBOOT__
 	if (!partno && !master->dev.class && master->_suspend &&
 	    master->_resume) {
-			slave->mtd._suspend = part_suspend;
-			slave->mtd._resume = part_resume;
+		slave->_suspend = part_suspend;
+		slave->_resume = part_resume;
 	}
 	if (master->_writev)
-		slave->mtd._writev = part_writev;
+		slave->_writev = part_writev;
 #endif
 	if (master->_lock)
-		slave->mtd._lock = part_lock;
+		slave->_lock = part_lock;
 	if (master->_unlock)
-		slave->mtd._unlock = part_unlock;
+		slave->_unlock = part_unlock;
 	if (master->_is_locked)
-		slave->mtd._is_locked = part_is_locked;
+		slave->_is_locked = part_is_locked;
 	if (master->_block_isreserved)
-		slave->mtd._block_isreserved = part_block_isreserved;
+		slave->_block_isreserved = part_block_isreserved;
 	if (master->_block_isbad)
-		slave->mtd._block_isbad = part_block_isbad;
+		slave->_block_isbad = part_block_isbad;
 	if (master->_block_markbad)
-		slave->mtd._block_markbad = part_block_markbad;
-	slave->mtd._erase = part_erase;
-	slave->master = master;
+		slave->_block_markbad = part_block_markbad;
+	slave->_erase = part_erase;
+	slave->parent = master;
 	slave->offset = part->offset;
+	INIT_LIST_HEAD(&slave->partitions);
+	INIT_LIST_HEAD(&slave->node);
 
 	if (slave->offset == MTDPART_OFS_APPEND)
 		slave->offset = cur_offset;
@@ -704,41 +671,41 @@ static struct mtd_part *allocate_partition(struct mtd_info *master,
 	}
 	if (slave->offset == MTDPART_OFS_RETAIN) {
 		slave->offset = cur_offset;
-		if (master->size - slave->offset >= slave->mtd.size) {
-			slave->mtd.size = master->size - slave->offset
-							- slave->mtd.size;
+		if (master->size - slave->offset >= slave->size) {
+			slave->size = master->size - slave->offset
+							- slave->size;
 		} else {
 			debug("mtd partition \"%s\" doesn't have enough space: %#llx < %#llx, disabled\n",
 				part->name, master->size - slave->offset,
-				slave->mtd.size);
+				slave->size);
 			/* register to preserve ordering */
 			goto out_register;
 		}
 	}
-	if (slave->mtd.size == MTDPART_SIZ_FULL)
-		slave->mtd.size = master->size - slave->offset;
+	if (slave->size == MTDPART_SIZ_FULL)
+		slave->size = master->size - slave->offset;
 
 	debug("0x%012llx-0x%012llx : \"%s\"\n", (unsigned long long)slave->offset,
-		(unsigned long long)(slave->offset + slave->mtd.size), slave->mtd.name);
+		(unsigned long long)(slave->offset + slave->size), slave->name);
 
 	/* let's do some sanity checks */
 	if (slave->offset >= master->size) {
 		/* let's register it anyway to preserve ordering */
 		slave->offset = 0;
-		slave->mtd.size = 0;
+		slave->size = 0;
 		printk(KERN_ERR"mtd: partition \"%s\" is out of reach -- disabled\n",
 			part->name);
 		goto out_register;
 	}
-	if (slave->offset + slave->mtd.size > master->size) {
-		slave->mtd.size = master->size - slave->offset;
+	if (slave->offset + slave->size > master->size) {
+		slave->size = master->size - slave->offset;
 		printk(KERN_WARNING"mtd: partition \"%s\" extends beyond the end of device \"%s\" -- size truncated to %#llx\n",
-			part->name, master->name, (unsigned long long)slave->mtd.size);
+		       part->name, master->name, slave->size);
 	}
 	if (master->numeraseregions > 1) {
 		/* Deal with variable erase size stuff */
 		int i, max = master->numeraseregions;
-		u64 end = slave->offset + slave->mtd.size;
+		u64 end = slave->offset + slave->size;
 		struct mtd_erase_region_info *regions = master->eraseregions;
 
 		/* Find the first erase regions which is part of this
@@ -751,44 +718,43 @@ static struct mtd_part *allocate_partition(struct mtd_info *master,
 
 		/* Pick biggest erasesize */
 		for (; i < max && regions[i].offset < end; i++) {
-			if (slave->mtd.erasesize < regions[i].erasesize) {
-				slave->mtd.erasesize = regions[i].erasesize;
-			}
+			if (slave->erasesize < regions[i].erasesize)
+				slave->erasesize = regions[i].erasesize;
 		}
-		BUG_ON(slave->mtd.erasesize == 0);
+		WARN_ON(slave->erasesize == 0);
 	} else {
 		/* Single erase size */
-		slave->mtd.erasesize = master->erasesize;
+		slave->erasesize = master->erasesize;
 	}
 
-	if ((slave->mtd.flags & MTD_WRITEABLE) &&
-	    mtd_mod_by_eb(slave->offset, &slave->mtd)) {
+	if ((slave->flags & MTD_WRITEABLE) &&
+	    mtd_mod_by_eb(slave->offset, slave)) {
 		/* Doesn't start on a boundary of major erase size */
 		/* FIXME: Let it be writable if it is on a boundary of
 		 * _minor_ erase size though */
-		slave->mtd.flags &= ~MTD_WRITEABLE;
+		slave->flags &= ~MTD_WRITEABLE;
 		printk(KERN_WARNING"mtd: partition \"%s\" doesn't start on an erase block boundary -- force read-only\n",
 			part->name);
 	}
-	if ((slave->mtd.flags & MTD_WRITEABLE) &&
-	    mtd_mod_by_eb(slave->mtd.size, &slave->mtd)) {
-		slave->mtd.flags &= ~MTD_WRITEABLE;
+	if ((slave->flags & MTD_WRITEABLE) &&
+	    mtd_mod_by_eb(slave->size, slave)) {
+		slave->flags &= ~MTD_WRITEABLE;
 		printk(KERN_WARNING"mtd: partition \"%s\" doesn't end on an erase block -- force read-only\n",
 			part->name);
 	}
 
-	slave->mtd.ecclayout = master->ecclayout;
-	slave->mtd.ecc_step_size = master->ecc_step_size;
-	slave->mtd.ecc_strength = master->ecc_strength;
-	slave->mtd.bitflip_threshold = master->bitflip_threshold;
+	slave->ecclayout = master->ecclayout;
+	slave->ecc_step_size = master->ecc_step_size;
+	slave->ecc_strength = master->ecc_strength;
+	slave->bitflip_threshold = master->bitflip_threshold;
 
 	if (master->_block_isbad) {
 		uint64_t offs = 0;
 
-		while (offs < slave->mtd.size) {
+		while (offs < slave->size) {
 			if (mtd_block_isbad(master, offs + slave->offset))
-				slave->mtd.ecc_stats.badblocks++;
-			offs += slave->mtd.erasesize;
+				slave->ecc_stats.badblocks++;
+			offs += slave->erasesize;
 		}
 	}
 
@@ -801,7 +767,7 @@ int mtd_add_partition(struct mtd_info *master, const char *name,
 		      long long offset, long long length)
 {
 	struct mtd_partition part;
-	struct mtd_part *p, *new;
+	struct mtd_info *p, *new;
 	uint64_t start, end;
 	int ret = 0;
 
@@ -830,21 +796,20 @@ int mtd_add_partition(struct mtd_info *master, const char *name,
 	end = offset + length;
 
 	mutex_lock(&mtd_partitions_mutex);
-	list_for_each_entry(p, &mtd_partitions, list)
-		if (p->master == master) {
-			if ((start >= p->offset) &&
-			    (start < (p->offset + p->mtd.size)))
-				goto err_inv;
-
-			if ((end >= p->offset) &&
-			    (end < (p->offset + p->mtd.size)))
-				goto err_inv;
-		}
+	list_for_each_entry(p, &master->partitions, node) {
+		if (start >= p->offset &&
+		    (start < (p->offset + p->size)))
+			goto err_inv;
+
+		if (end >= p->offset &&
+		    (end < (p->offset + p->size)))
+			goto err_inv;
+	}
 
-	list_add(&new->list, &mtd_partitions);
+	list_add_tail(&new->node, &master->partitions);
 	mutex_unlock(&mtd_partitions_mutex);
 
-	add_mtd_device(&new->mtd);
+	add_mtd_device(new);
 
 	return ret;
 err_inv:
@@ -856,18 +821,17 @@ EXPORT_SYMBOL_GPL(mtd_add_partition);
 
 int mtd_del_partition(struct mtd_info *master, int partno)
 {
-	struct mtd_part *slave, *next;
+	struct mtd_info *slave, *next;
 	int ret = -EINVAL;
 
 	mutex_lock(&mtd_partitions_mutex);
-	list_for_each_entry_safe(slave, next, &mtd_partitions, list)
-		if ((slave->master == master) &&
-		    (slave->mtd.index == partno)) {
-			ret = del_mtd_device(&slave->mtd);
+	list_for_each_entry_safe(slave, next, &master->partitions, node)
+		if (slave->index == partno) {
+			ret = del_mtd_device(slave);
 			if (ret < 0)
 				break;
 
-			list_del(&slave->list);
+			list_del(&slave->node);
 			free_partition(slave);
 			break;
 		}
@@ -891,20 +855,10 @@ int add_mtd_partitions(struct mtd_info *master,
 		       const struct mtd_partition *parts,
 		       int nbparts)
 {
-	struct mtd_part *slave;
+	struct mtd_info *slave;
 	uint64_t cur_offset = 0;
 	int i;
 
-#ifdef __UBOOT__
-	/*
-	 * Need to init the list here, since LIST_INIT() does not
-	 * work on platforms where relocation has problems (like MIPS
-	 * & PPC).
-	 */
-	if (mtd_partitions.next == NULL)
-		INIT_LIST_HEAD(&mtd_partitions);
-#endif
-
 	debug("Creating %d MTD partitions on \"%s\":\n", nbparts, master->name);
 
 	for (i = 0; i < nbparts; i++) {
@@ -913,12 +867,12 @@ int add_mtd_partitions(struct mtd_info *master,
 			return PTR_ERR(slave);
 
 		mutex_lock(&mtd_partitions_mutex);
-		list_add(&slave->list, &mtd_partitions);
+		list_add_tail(&slave->node, &master->partitions);
 		mutex_unlock(&mtd_partitions_mutex);
 
-		add_mtd_device(&slave->mtd);
+		add_mtd_device(slave);
 
-		cur_offset = slave->offset + slave->mtd.size;
+		cur_offset = slave->offset + slave->size;
 	}
 
 	return 0;
@@ -1021,29 +975,12 @@ int parse_mtd_partitions(struct mtd_info *master, const char *const *types,
 }
 #endif
 
-int mtd_is_partition(const struct mtd_info *mtd)
-{
-	struct mtd_part *part;
-	int ispart = 0;
-
-	mutex_lock(&mtd_partitions_mutex);
-	list_for_each_entry(part, &mtd_partitions, list)
-		if (&part->mtd == mtd) {
-			ispart = 1;
-			break;
-		}
-	mutex_unlock(&mtd_partitions_mutex);
-
-	return ispart;
-}
-EXPORT_SYMBOL_GPL(mtd_is_partition);
-
 /* Returns the size of the entire flash chip */
 uint64_t mtd_get_device_size(const struct mtd_info *mtd)
 {
-	if (!mtd_is_partition(mtd))
-		return mtd->size;
+	if (mtd_is_partition(mtd))
+		return mtd->parent->size;
 
-	return PART(mtd)->master->size;
+	return mtd->size;
 }
 EXPORT_SYMBOL_GPL(mtd_get_device_size);
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index d645829a5b..32152869a5 100644
--- a/include/linux/mtd/mtd.h
+++ b/include/linux/mtd/mtd.h
@@ -21,7 +21,11 @@
 #include <linux/compat.h>
 #include <mtd/mtd-abi.h>
 #include <linux/errno.h>
+#include <linux/list.h>
 #include <div64.h>
+#if IS_ENABLED(CONFIG_DM)
+#include <dm/device.h>
+#endif
 
 #define MAX_MTD_DEVICES 32
 #endif
@@ -309,8 +313,64 @@ struct mtd_info {
 	struct udevice *dev;
 #endif
 	int usecount;
+
+	/* MTD devices do not have any parent. MTD partitions do. */
+	struct mtd_info *parent;
+
+	/*
+	 * Offset of the partition relatively to the parent offset.
+	 * Is 0 for real MTD devices (ie. not partitions).
+	 */
+	u64 offset;
+
+	/*
+	 * List node used to add an MTD partition to the parent
+	 * partition list.
+	 */
+	struct list_head node;
+
+	/*
+	 * List of partitions attached to this MTD device (the parent
+	 * MTD device can itself be a partition).
+	 */
+	struct list_head partitions;
 };
 
+#if IS_ENABLED(CONFIG_DM)
+static inline void mtd_set_of_node(struct mtd_info *mtd,
+				   const struct device_node *np)
+{
+	mtd->dev->node.np = np;
+}
+
+static inline const struct device_node *mtd_get_of_node(struct mtd_info *mtd)
+{
+	return mtd->dev->node.np;
+}
+#else
+struct device_node;
+
+static inline void mtd_set_of_node(struct mtd_info *mtd,
+				   const struct device_node *np)
+{
+}
+
+static inline const struct device_node *mtd_get_of_node(struct mtd_info *mtd)
+{
+	return NULL;
+}
+#endif
+
+static inline bool mtd_is_partition(const struct mtd_info *mtd)
+{
+	return mtd->parent;
+}
+
+static inline bool mtd_has_partitions(const struct mtd_info *mtd)
+{
+	return !list_empty(&mtd->partitions);
+}
+
 int mtd_ooblayout_ecc(struct mtd_info *mtd, int section,
 		      struct mtd_oob_region *oobecc);
 int mtd_ooblayout_find_eccregion(struct mtd_info *mtd, int eccbyte,
diff --git a/include/linux/mtd/partitions.h b/include/linux/mtd/partitions.h
index 6eea0a547a..3822237f2a 100644
--- a/include/linux/mtd/partitions.h
+++ b/include/linux/mtd/partitions.h
@@ -81,7 +81,6 @@ extern void register_mtd_parser(struct mtd_part_parser *parser);
 extern void deregister_mtd_parser(struct mtd_part_parser *parser);
 #endif
 
-int mtd_is_partition(const struct mtd_info *mtd);
 int mtd_add_partition(struct mtd_info *master, const char *name,
 		      long long offset, long long length);
 int mtd_del_partition(struct mtd_info *master, int partno);

commit 504668197e7197da1a2a34a2d43ae93e5b496ded
Author: Miquel Raynal <miquel.raynal@bootlin.com>
Date:   Sat Sep 29 12:58:26 2018 +0200

    UPSTREAM: mtd: uboot: search for an equivalent MTD name with the mtdids
    
    Using an MTD device (resp. partition) name in mtdparts is simple and
    straightforward. However, for a long time already, another name was
    given in mtdparts to indicate a device (resp. partition) so the
    "mtdids" environment variable was created to do the match.
    
    Let's create a function that, from an MTD device (resp. partition)
    name, search for the equivalent name in the "mtdparts" environment
    variable thanks to the "mtdids" string.
    
    Change-Id: I0fbf73baa9623bb933dd268d7a88dd2746a30d6d
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Reviewed-by: Stefan Roese <sr@denx.de>
    Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit ff4afa8a981e22eef670c7c857cb87983346cc2c)

diff --git a/drivers/mtd/mtd_uboot.c b/drivers/mtd/mtd_uboot.c
index 21386951ef..38b04a3a34 100644
--- a/drivers/mtd/mtd_uboot.c
+++ b/drivers/mtd/mtd_uboot.c
@@ -6,7 +6,70 @@
  */
 #include <common.h>
 #include <linux/mtd/mtd.h>
-#include <jffs2/jffs2.h>
+#include <jffs2/jffs2.h> /* Legacy */
+
+/**
+ * mtd_search_alternate_name - Search an alternate name for @mtdname thanks to
+ *                             the mtdids legacy environment variable.
+ *
+ * The mtdids string is a list of comma-separated 'dev_id=mtd_id' tupples.
+ * Check if one of the mtd_id matches mtdname, in this case save dev_id in
+ * altname.
+ *
+ * @mtdname: Current MTD device name
+ * @altname: Alternate name to return
+ * @max_len: Length of the alternate name buffer
+ *
+ * @return 0 on success, an error otherwise.
+ */
+int mtd_search_alternate_name(const char *mtdname, char *altname,
+			      unsigned int max_len)
+{
+	const char *mtdids, *equal, *comma, *dev_id, *mtd_id;
+	int dev_id_len, mtd_id_len;
+
+	mtdids = env_get("mtdids");
+	if (!mtdids)
+		return -EINVAL;
+
+	do {
+		/* Find the '=' sign */
+		dev_id = mtdids;
+		equal = strchr(dev_id, '=');
+		if (!equal)
+			break;
+		dev_id_len = equal - mtdids;
+		mtd_id = equal + 1;
+
+		/* Find the end of the tupple */
+		comma = strchr(mtdids, ',');
+		if (comma)
+			mtd_id_len = comma - mtd_id;
+		else
+			mtd_id_len = &mtdids[strlen(mtdids)] - mtd_id + 1;
+
+		if (!dev_id_len || !mtd_id_len)
+			return -EINVAL;
+
+		if (dev_id_len + 1 > max_len)
+			continue;
+
+		/* Compare the name we search with the current mtd_id */
+		if (!strncmp(mtdname, mtd_id, mtd_id_len)) {
+			strncpy(altname, dev_id, dev_id_len);
+			altname[dev_id_len] = 0;
+
+			return 0;
+		}
+
+		/* Go to the next tupple */
+		mtdids = comma + 1;
+	} while (comma);
+
+	return -EINVAL;
+}
+
+/* Legacy */
 
 static int get_part(const char *partname, int *idx, loff_t *off, loff_t *size,
 		loff_t *maxsize, int devtype)
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index 614d950be4..d645829a5b 100644
--- a/include/linux/mtd/mtd.h
+++ b/include/linux/mtd/mtd.h
@@ -550,5 +550,10 @@ int mtd_arg_off_size(int argc, char *const argv[], int *idx, loff_t *off,
 void mtd_get_len_incl_bad(struct mtd_info *mtd, uint64_t offset,
 			  const uint64_t length, uint64_t *len_incl_bad,
 			  int *truncated);
+
+/* drivers/mtd/mtd_uboot.c */
+int mtd_search_alternate_name(const char *mtdname, char *altname,
+			      unsigned int max_len);
+
 #endif
 #endif /* __MTD_MTD_H__ */

commit 3de98b82f9097ef0106987bf3c6d694476416a71
Author: Miquel Raynal <miquel.raynal@bootlin.com>
Date:   Sat Sep 29 12:58:25 2018 +0200

    UPSTREAM: mtd: mtdpart: add a generic mtdparts-like parser
    
    The current parser is very specific to U-Boot mtdparts implementation.
    It does not use MTD structures like mtd_info and mtd_partition. Copy
    and adapt the current parser in drivers/mtd/mtd-uclass.c (to not break
    the current use of mtdparts.c itself) and write some kind of a wrapper
    around the current implementation to allow other commands to benefit
    from this parsing in a user-friendly way.
    
    This new function will allocate an mtd_partition array for each
    successful call. This array must be freed after use by the caller.
    The given 'mtdparts' buffer pointer will be moved forward to the next
    MTD device (if any, it will point towards a '\0' character otherwise).
    
    Change-Id: If785967e93395e883636695c669a52c60d2a043d
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Acked-by: Jagan Teki <jagan@openedev.com>
    Reviewed-by: Stefan Roese <sr@denx.de>
    Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 21cc1fb5af06e468c74ae601bac719d306523f9c)

diff --git a/drivers/mtd/mtdpart.c b/drivers/mtd/mtdpart.c
index cb6b635849..c359665cb7 100644
--- a/drivers/mtd/mtdpart.c
+++ b/drivers/mtd/mtdpart.c
@@ -27,6 +27,7 @@
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
 #include <linux/err.h>
+#include <linux/sizes.h>
 
 #include "mtdcore.h"
 
@@ -77,6 +78,215 @@ char *kstrdup(const char *s, gfp_t gfp)
 }
 #endif
 
+#define MTD_SIZE_REMAINING		(~0LLU)
+#define MTD_OFFSET_NOT_SPECIFIED	(~0LLU)
+
+/**
+ * mtd_parse_partition - Parse @mtdparts partition definition, fill @partition
+ *                       with it and update the @mtdparts string pointer.
+ *
+ * The partition name is allocated and must be freed by the caller.
+ *
+ * This function is widely inspired from part_parse (mtdparts.c).
+ *
+ * @mtdparts: String describing the partition with mtdparts command syntax
+ * @partition: MTD partition structure to fill
+ *
+ * @return 0 on success, an error otherwise.
+ */
+static int mtd_parse_partition(const char **_mtdparts,
+			       struct mtd_partition *partition)
+{
+	const char *mtdparts = *_mtdparts;
+	const char *name = NULL;
+	int name_len;
+	char *buf;
+
+	/* Ensure the partition structure is empty */
+	memset(partition, 0, sizeof(struct mtd_partition));
+
+	/* Fetch the partition size */
+	if (*mtdparts == '-') {
+		/* Assign all remaining space to this partition */
+		partition->size = MTD_SIZE_REMAINING;
+		mtdparts++;
+	} else {
+		partition->size = ustrtoull(mtdparts, (char **)&mtdparts, 0);
+		if (partition->size < SZ_4K) {
+			printf("Minimum partition size 4kiB, %lldB requested\n",
+			       partition->size);
+			return -EINVAL;
+		}
+	}
+
+	/* Check for the offset */
+	partition->offset = MTD_OFFSET_NOT_SPECIFIED;
+	if (*mtdparts == '@') {
+		mtdparts++;
+		partition->offset = ustrtoull(mtdparts, (char **)&mtdparts, 0);
+	}
+
+	/* Now look for the name */
+	if (*mtdparts == '(') {
+		name = ++mtdparts;
+		mtdparts = strchr(name, ')');
+		if (!mtdparts) {
+			printf("No closing ')' found in partition name\n");
+			return -EINVAL;
+		}
+		name_len = mtdparts - name + 1;
+		if ((name_len - 1) == 0) {
+			printf("Empty partition name\n");
+			return -EINVAL;
+		}
+		mtdparts++;
+	} else {
+		/* Name will be of the form size@offset */
+		name_len = 22;
+	}
+
+	/* Check if the partition is read-only */
+	if (strncmp(mtdparts, "ro", 2) == 0) {
+		partition->mask_flags |= MTD_WRITEABLE;
+		mtdparts += 2;
+	}
+
+	/* Check for a potential next partition definition */
+	if (*mtdparts == ',') {
+		if (partition->size == MTD_SIZE_REMAINING) {
+			printf("No partitions allowed after a fill-up\n");
+			return -EINVAL;
+		}
+		++mtdparts;
+	} else if ((*mtdparts == ';') || (*mtdparts == '\0')) {
+		/* NOP */
+	} else {
+		printf("Unexpected character '%c' in mtdparts\n", *mtdparts);
+		return -EINVAL;
+	}
+
+	/*
+	 * Allocate a buffer for the name and either copy the provided name or
+	 * auto-generate it with the form 'size@offset'.
+	 */
+	buf = malloc(name_len);
+	if (!buf)
+		return -ENOMEM;
+
+	if (name)
+		strncpy(buf, name, name_len - 1);
+	else
+		snprintf(buf, name_len, "0x%08llx@0x%08llx",
+			 partition->size, partition->offset);
+
+	buf[name_len - 1] = '\0';
+	partition->name = buf;
+
+	*_mtdparts = mtdparts;
+
+	return 0;
+}
+
+/**
+ * mtd_parse_partitions - Create a partition array from an mtdparts definition
+ *
+ * Stateless function that takes a @parent MTD device, a string @_mtdparts
+ * describing the partitions (with the "mtdparts" command syntax) and creates
+ * the corresponding MTD partition structure array @_parts. Both the name and
+ * the structure partition itself must be freed freed, the caller may use
+ * @mtd_free_parsed_partitions() for this purpose.
+ *
+ * @parent: MTD device which contains the partitions
+ * @_mtdparts: Pointer to a string describing the partitions with "mtdparts"
+ *             command syntax.
+ * @_parts: Allocated array containing the partitions, must be freed by the
+ *          caller.
+ * @_nparts: Size of @_parts array.
+ *
+ * @return 0 on success, an error otherwise.
+ */
+int mtd_parse_partitions(struct mtd_info *parent, const char **_mtdparts,
+			 struct mtd_partition **_parts, int *_nparts)
+{
+	struct mtd_partition partition = {}, *parts;
+	const char *mtdparts = *_mtdparts;
+	int cur_off = 0, cur_sz = 0;
+	int nparts = 0;
+	int ret, idx;
+	u64 sz;
+
+	/* First, iterate over the partitions until we know their number */
+	while (mtdparts[0] != '\0' && mtdparts[0] != ';') {
+		ret = mtd_parse_partition(&mtdparts, &partition);
+		if (ret)
+			return ret;
+
+		free((char *)partition.name);
+		nparts++;
+	}
+
+	/* Allocate an array of partitions to give back to the caller */
+	parts = malloc(sizeof(*parts) * nparts);
+	if (!parts) {
+		printf("Not enough space to save partitions meta-data\n");
+		return -ENOMEM;
+	}
+
+	/* Iterate again over each partition to save the data in our array */
+	for (idx = 0; idx < nparts; idx++) {
+		ret = mtd_parse_partition(_mtdparts, &parts[idx]);
+		if (ret)
+			return ret;
+
+		if (parts[idx].size == MTD_SIZE_REMAINING)
+			parts[idx].size = parent->size - cur_sz;
+		cur_sz += parts[idx].size;
+
+		sz = parts[idx].size;
+		if (sz < parent->writesize || do_div(sz, parent->writesize)) {
+			printf("Partition size must be a multiple of %d\n",
+			       parent->writesize);
+			return -EINVAL;
+		}
+
+		if (parts[idx].offset == MTD_OFFSET_NOT_SPECIFIED)
+			parts[idx].offset = cur_off;
+		cur_off += parts[idx].size;
+
+		parts[idx].ecclayout = parent->ecclayout;
+	}
+
+	/* Offset by one mtdparts to point to the next device if any */
+	if (*_mtdparts[0] == ';')
+		(*_mtdparts)++;
+
+	*_parts = parts;
+	*_nparts = nparts;
+
+	return 0;
+}
+
+/**
+ * mtd_free_parsed_partitions - Free dynamically allocated partitions
+ *
+ * Each successful call to @mtd_parse_partitions must be followed by a call to
+ * @mtd_free_parsed_partitions to free any allocated array during the parsing
+ * process.
+ *
+ * @parts: Array containing the partitions that will be freed.
+ * @nparts: Size of @parts array.
+ */
+void mtd_free_parsed_partitions(struct mtd_partition *parts,
+				unsigned int nparts)
+{
+	int i;
+
+	for (i = 0; i < nparts; i++)
+		free((char *)parts[i].name);
+
+	free(parts);
+}
+
 /*
  * MTD methods which simply translate the effective address and pass through
  * to the _real_ device.
diff --git a/include/linux/mtd/partitions.h b/include/linux/mtd/partitions.h
index ce0e8dbee4..6eea0a547a 100644
--- a/include/linux/mtd/partitions.h
+++ b/include/linux/mtd/partitions.h
@@ -87,4 +87,25 @@ int mtd_add_partition(struct mtd_info *master, const char *name,
 int mtd_del_partition(struct mtd_info *master, int partno);
 uint64_t mtd_get_device_size(const struct mtd_info *mtd);
 
+#if defined(CONFIG_MTD_PARTITIONS)
+int mtd_parse_partitions(struct mtd_info *parent, const char **_mtdparts,
+			 struct mtd_partition **_parts, int *_nparts);
+void mtd_free_parsed_partitions(struct mtd_partition *parts,
+				unsigned int nparts);
+#else
+static inline int
+mtd_parse_partitions(struct mtd_info *parent, const char **_mtdparts,
+		     struct mtd_partition **_parts, int *_nparts)
+{
+	*_nparts = 0;
+
+	return 0;
+}
+static inline void
+mtd_free_parsed_partitions(struct mtd_partition *parts, unsigned int nparts)
+{
+	return;
+}
+#endif /* defined(MTD_PARTITIONS) */
+
 #endif

commit 3cccee98d513346f131b0872647af8e21541e818
Author: Miquel Raynal <miquel.raynal@bootlin.com>
Date:   Sat Sep 29 12:58:24 2018 +0200

    UPSTREAM: The user might want to trigger the probe of any MTD device, export these functions so they can be called from a command source file.
    
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Acked-by: Jagan Teki <jagan@openedev.com>
    Reviewed-by: Stefan Roese <sr@denx.de>
    Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
    Change-Id: Ib85ac321bc06f6fc9d8c41b0dbe3dce7bdbb3fce
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/mtd-uclass.c b/drivers/mtd/mtd-uclass.c
index 7b7c48ec5a..bf3d48bd96 100644
--- a/drivers/mtd/mtd-uclass.c
+++ b/drivers/mtd/mtd-uclass.c
@@ -6,9 +6,25 @@
 
 #include <common.h>
 #include <dm.h>
+#include <dm/device-internal.h>
 #include <errno.h>
 #include <mtd.h>
 
+/**
+ * mtd_probe - Probe the device @dev if not already done
+ *
+ * @dev: U-Boot device to probe
+ *
+ * @return 0 on success, an error otherwise.
+ */
+int mtd_probe(struct udevice *dev)
+{
+	if (device_active(dev))
+		return 0;
+
+	return device_probe(dev);
+}
+
 /*
  * Implement a MTD uclass which should include most flash drivers.
  * The uclass private is pointed to mtd_info.
diff --git a/include/mtd.h b/include/mtd.h
index 3f8c293b00..5ce07eeeff 100644
--- a/include/mtd.h
+++ b/include/mtd.h
@@ -9,15 +9,6 @@
 
 #include <linux/mtd/mtd.h>
 
-/*
- * Get mtd_info structure of the dev, which is stored as uclass private.
- *
- * @dev: The MTD device
- * @return: pointer to mtd_info, NULL on error
- */
-static inline struct mtd_info *mtd_get_info(struct udevice *dev)
-{
-	return dev_get_uclass_priv(dev);
-}
+int mtd_probe(struct udevice *dev);
 
 #endif	/* _MTD_H_ */

commit 857ca405794c5b854b279d5503ee50df3d33fcc8
Author: Miquel Raynal <miquel.raynal@bootlin.com>
Date:   Thu Aug 16 17:30:19 2018 +0200

    UPSTREAM: mtd: mtdpart: balance debug messages
    
    Balance debug message in the partition allocation/removal process in
    order to keep track of them more easily.
    
    Change-Id: I15a7843b243c2a023dd0c38d899b4f67e23270f6
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit b0036f70044d3d59d5c90f0c4f1c8c1a90b7cd55)

diff --git a/drivers/mtd/mtdpart.c b/drivers/mtd/mtdpart.c
index b9e0506aeb..cb6b635849 100644
--- a/drivers/mtd/mtdpart.c
+++ b/drivers/mtd/mtdpart.c
@@ -363,6 +363,8 @@ int del_mtd_partitions(struct mtd_info *master)
 	struct mtd_part *slave, *next;
 	int ret, err = 0;
 
+	debug("Deleting MTD partitions on \"%s\":\n", master->name);
+
 	mutex_lock(&mtd_partitions_mutex);
 	list_for_each_entry_safe(slave, next, &mtd_partitions, list)
 		if (slave->master == master) {

commit 56913fbe307c0daa2bcb9408a86108c5968ab602
Author: Miquel Raynal <miquel.raynal@bootlin.com>
Date:   Thu Aug 16 17:30:18 2018 +0200

    UPSTREAM: mtd: declare MTD_PARTITIONS symbol in Kconfig
    
    UBI selects MTD_PARTITIONS which is the symbol to compile
    drivers/mtd/mtdpart.c. Unfortunately, the symbol was not defined in
    Kconfig and this worked only with board files defining it. Fix this by
    adding a boolean in Kconfig so boards defined by defconfig files only
    will work as expected.
    
    Change-Id: I5165c6a74dee0be0e5c5651bfad4c3e53d3e17d2
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 4048a5c519a86eab2805f4f07fe9f5c6c8a1fe91)

diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig
index 96e9d8baa7..7e55b530f2 100644
--- a/drivers/mtd/Kconfig
+++ b/drivers/mtd/Kconfig
@@ -1,5 +1,8 @@
 menu "MTD Support"
 
+config MTD_PARTITIONS
+	bool
+
 config MTD
 	bool "Enable Driver Model for MTD drivers"
 	depends on DM

commit ecae5b478fb1f6684816558e6d51d113743d19a1
Author: Miquel Raynal <miquel.raynal@bootlin.com>
Date:   Thu Aug 16 17:30:16 2018 +0200

    UPSTREAM: mtd: spinand: Add initial support for the MX35LF2GE4AB chip
    
    Add support for the MX35LF2GE4AB chip, which is similar to its cousin
    MX35LF1GE4AB, with two planes instead of one.
    
    Change-Id: Ib1821e688151f9e9790effc78e7446c6387b3525
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Acked-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 515d0212615b8b4bbe1e39ccf7946e042dc1bf58)

diff --git a/drivers/mtd/nand/spi/macronix.c b/drivers/mtd/nand/spi/macronix.c
index dd351dcb6c..662c561e50 100644
--- a/drivers/mtd/nand/spi/macronix.c
+++ b/drivers/mtd/nand/spi/macronix.c
@@ -27,13 +27,13 @@ static SPINAND_OP_VARIANTS(update_cache_variants,
 		SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
 		SPINAND_PROG_LOAD(false, 0, NULL, 0));
 
-static int mx35lf1ge4ab_ooblayout_ecc(struct mtd_info *mtd, int section,
+static int mx35lfxge4ab_ooblayout_ecc(struct mtd_info *mtd, int section,
 				      struct mtd_oob_region *region)
 {
 	return -ERANGE;
 }
 
-static int mx35lf1ge4ab_ooblayout_free(struct mtd_info *mtd, int section,
+static int mx35lfxge4ab_ooblayout_free(struct mtd_info *mtd, int section,
 				       struct mtd_oob_region *region)
 {
 	if (section)
@@ -45,9 +45,9 @@ static int mx35lf1ge4ab_ooblayout_free(struct mtd_info *mtd, int section,
 	return 0;
 }
 
-static const struct mtd_ooblayout_ops mx35lf1ge4ab_ooblayout = {
-	.ecc = mx35lf1ge4ab_ooblayout_ecc,
-	.free = mx35lf1ge4ab_ooblayout_free,
+static const struct mtd_ooblayout_ops mx35lfxge4ab_ooblayout = {
+	.ecc = mx35lfxge4ab_ooblayout_ecc,
+	.free = mx35lfxge4ab_ooblayout_free,
 };
 
 static int mx35lf1ge4ab_get_eccsr(struct spinand_device *spinand, u8 *eccsr)
@@ -102,8 +102,16 @@ static const struct spinand_info macronix_spinand_table[] = {
 					      &write_cache_variants,
 					      &update_cache_variants),
 		     SPINAND_HAS_QE_BIT,
-		     SPINAND_ECCINFO(&mx35lf1ge4ab_ooblayout,
+		     SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
 				     mx35lf1ge4ab_ecc_get_status)),
+	SPINAND_INFO("MX35LF2GE4AB", 0x22,
+		     NAND_MEMORG(1, 2048, 64, 64, 2048, 2, 1, 1),
+		     NAND_ECCREQ(4, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL)),
 };
 
 static int macronix_spinand_detect(struct spinand_device *spinand)

commit 80c0c832a10d1b7b3bd638f9f4f57219c9e8fd51
Author: Boris Brezillon <boris.brezillon@bootlin.com>
Date:   Thu Aug 16 17:30:15 2018 +0200

    UPSTREAM: mtd: spinand: Add initial support for the MX35LF1GE4AB chip
    
    Add minimal support for the MX35LF1GE4AB SPI NAND chip.
    
    Change-Id: Ifb036b16f09086f5cda092c30bb850d1f91668a4
    Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
    Acked-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 6f041ccabb03bea16c2f21f3254dc9c1cb38425c)

diff --git a/drivers/mtd/nand/spi/Makefile b/drivers/mtd/nand/spi/Makefile
index 11ba5de68b..a66edd9199 100644
--- a/drivers/mtd/nand/spi/Makefile
+++ b/drivers/mtd/nand/spi/Makefile
@@ -1,4 +1,4 @@
 # SPDX-License-Identifier: GPL-2.0
 
-spinand-objs := core.o micron.o winbond.o
+spinand-objs := core.o macronix.o micron.o winbond.o
 obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index ef3e6445d8..362d104846 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -830,6 +830,7 @@ static const struct nand_ops spinand_ops = {
 };
 
 static const struct spinand_manufacturer *spinand_manufacturers[] = {
+	&macronix_spinand_manufacturer,
 	&micron_spinand_manufacturer,
 	&winbond_spinand_manufacturer,
 };
diff --git a/drivers/mtd/nand/spi/macronix.c b/drivers/mtd/nand/spi/macronix.c
new file mode 100644
index 0000000000..dd351dcb6c
--- /dev/null
+++ b/drivers/mtd/nand/spi/macronix.c
@@ -0,0 +1,138 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2018 Macronix
+ *
+ * Author: Boris Brezillon <boris.brezillon@bootlin.com>
+ */
+
+#ifndef __UBOOT__
+#include <linux/device.h>
+#include <linux/kernel.h>
+#endif
+#include <linux/mtd/spinand.h>
+
+#define SPINAND_MFR_MACRONIX		0xC2
+
+static SPINAND_OP_VARIANTS(read_cache_variants,
+		SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
+
+static SPINAND_OP_VARIANTS(write_cache_variants,
+		SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
+		SPINAND_PROG_LOAD(true, 0, NULL, 0));
+
+static SPINAND_OP_VARIANTS(update_cache_variants,
+		SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
+		SPINAND_PROG_LOAD(false, 0, NULL, 0));
+
+static int mx35lf1ge4ab_ooblayout_ecc(struct mtd_info *mtd, int section,
+				      struct mtd_oob_region *region)
+{
+	return -ERANGE;
+}
+
+static int mx35lf1ge4ab_ooblayout_free(struct mtd_info *mtd, int section,
+				       struct mtd_oob_region *region)
+{
+	if (section)
+		return -ERANGE;
+
+	region->offset = 2;
+	region->length = mtd->oobsize - 2;
+
+	return 0;
+}
+
+static const struct mtd_ooblayout_ops mx35lf1ge4ab_ooblayout = {
+	.ecc = mx35lf1ge4ab_ooblayout_ecc,
+	.free = mx35lf1ge4ab_ooblayout_free,
+};
+
+static int mx35lf1ge4ab_get_eccsr(struct spinand_device *spinand, u8 *eccsr)
+{
+	struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(0x7c, 1),
+					  SPI_MEM_OP_NO_ADDR,
+					  SPI_MEM_OP_DUMMY(1, 1),
+					  SPI_MEM_OP_DATA_IN(1, eccsr, 1));
+
+	return spi_mem_exec_op(spinand->slave, &op);
+}
+
+static int mx35lf1ge4ab_ecc_get_status(struct spinand_device *spinand,
+				       u8 status)
+{
+	struct nand_device *nand = spinand_to_nand(spinand);
+	u8 eccsr;
+
+	switch (status & STATUS_ECC_MASK) {
+	case STATUS_ECC_NO_BITFLIPS:
+		return 0;
+
+	case STATUS_ECC_UNCOR_ERROR:
+		return -EBADMSG;
+
+	case STATUS_ECC_HAS_BITFLIPS:
+		/*
+		 * Let's try to retrieve the real maximum number of bitflips
+		 * in order to avoid forcing the wear-leveling layer to move
+		 * data around if it's not necessary.
+		 */
+		if (mx35lf1ge4ab_get_eccsr(spinand, &eccsr))
+			return nand->eccreq.strength;
+
+		if (WARN_ON(eccsr > nand->eccreq.strength || !eccsr))
+			return nand->eccreq.strength;
+
+		return eccsr;
+
+	default:
+		break;
+	}
+
+	return -EINVAL;
+}
+
+static const struct spinand_info macronix_spinand_table[] = {
+	SPINAND_INFO("MX35LF1GE4AB", 0x12,
+		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
+		     NAND_ECCREQ(4, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&mx35lf1ge4ab_ooblayout,
+				     mx35lf1ge4ab_ecc_get_status)),
+};
+
+static int macronix_spinand_detect(struct spinand_device *spinand)
+{
+	u8 *id = spinand->id.data;
+	int ret;
+
+	/*
+	 * Macronix SPI NAND read ID needs a dummy byte, so the first byte in
+	 * raw_id is garbage.
+	 */
+	if (id[1] != SPINAND_MFR_MACRONIX)
+		return 0;
+
+	ret = spinand_match_and_init(spinand, macronix_spinand_table,
+				     ARRAY_SIZE(macronix_spinand_table),
+				     id[2]);
+	if (ret)
+		return ret;
+
+	return 1;
+}
+
+static const struct spinand_manufacturer_ops macronix_spinand_manuf_ops = {
+	.detect = macronix_spinand_detect,
+};
+
+const struct spinand_manufacturer macronix_spinand_manufacturer = {
+	.id = SPINAND_MFR_MACRONIX,
+	.name = "Macronix",
+	.ops = &macronix_spinand_manuf_ops,
+};
diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
index d40a7c8f4e..8c9c756179 100644
--- a/include/linux/mtd/spinand.h
+++ b/include/linux/mtd/spinand.h
@@ -201,6 +201,7 @@ struct spinand_manufacturer {
 };
 
 /* SPI NAND manufacturers */
+extern const struct spinand_manufacturer macronix_spinand_manufacturer;
 extern const struct spinand_manufacturer micron_spinand_manufacturer;
 extern const struct spinand_manufacturer winbond_spinand_manufacturer;
 

commit b98ac5e2eed5bfe3e31fe34c06a433556c482e0c
Author: Frieder Schrempf <frieder.schrempf@exceet.de>
Date:   Thu Aug 16 17:30:14 2018 +0200

    UPSTREAM: mtd: spinand: Add initial support for Winbond W25M02GV
    
    Add support for the W25M02GV chip.
    
    Change-Id: Iad3e56fb79484fe8bd809c74f033ca1cc270c68b
    Signed-off-by: Frieder Schrempf <frieder.schrempf@exceet.de>
    Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Acked-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 3181c0a622d35bd8e6d4407458e7204d4df5a8c1)

diff --git a/drivers/mtd/nand/spi/Makefile b/drivers/mtd/nand/spi/Makefile
index 4eb745abd4..11ba5de68b 100644
--- a/drivers/mtd/nand/spi/Makefile
+++ b/drivers/mtd/nand/spi/Makefile
@@ -1,4 +1,4 @@
 # SPDX-License-Identifier: GPL-2.0
 
-spinand-objs := core.o micron.o
+spinand-objs := core.o micron.o winbond.o
 obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index 36b8b52bc2..ef3e6445d8 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -831,6 +831,7 @@ static const struct nand_ops spinand_ops = {
 
 static const struct spinand_manufacturer *spinand_manufacturers[] = {
 	&micron_spinand_manufacturer,
+	&winbond_spinand_manufacturer,
 };
 
 static int spinand_manufacturer_detect(struct spinand_device *spinand)
diff --git a/drivers/mtd/nand/spi/winbond.c b/drivers/mtd/nand/spi/winbond.c
new file mode 100644
index 0000000000..eac811d97c
--- /dev/null
+++ b/drivers/mtd/nand/spi/winbond.c
@@ -0,0 +1,143 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2017 exceet electronics GmbH
+ *
+ * Authors:
+ *	Frieder Schrempf <frieder.schrempf@exceet.de>
+ *	Boris Brezillon <boris.brezillon@bootlin.com>
+ */
+
+#ifndef __UBOOT__
+#include <linux/device.h>
+#include <linux/kernel.h>
+#endif
+#include <linux/mtd/spinand.h>
+
+#define SPINAND_MFR_WINBOND		0xEF
+
+#define WINBOND_CFG_BUF_READ		BIT(3)
+
+static SPINAND_OP_VARIANTS(read_cache_variants,
+		SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
+
+static SPINAND_OP_VARIANTS(write_cache_variants,
+		SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
+		SPINAND_PROG_LOAD(true, 0, NULL, 0));
+
+static SPINAND_OP_VARIANTS(update_cache_variants,
+		SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
+		SPINAND_PROG_LOAD(false, 0, NULL, 0));
+
+static int w25m02gv_ooblayout_ecc(struct mtd_info *mtd, int section,
+				  struct mtd_oob_region *region)
+{
+	if (section > 3)
+		return -ERANGE;
+
+	region->offset = (16 * section) + 8;
+	region->length = 8;
+
+	return 0;
+}
+
+static int w25m02gv_ooblayout_free(struct mtd_info *mtd, int section,
+				   struct mtd_oob_region *region)
+{
+	if (section > 3)
+		return -ERANGE;
+
+	region->offset = (16 * section) + 2;
+	region->length = 6;
+
+	return 0;
+}
+
+static const struct mtd_ooblayout_ops w25m02gv_ooblayout = {
+	.ecc = w25m02gv_ooblayout_ecc,
+	.free = w25m02gv_ooblayout_free,
+};
+
+static int w25m02gv_select_target(struct spinand_device *spinand,
+				  unsigned int target)
+{
+	struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(0xc2, 1),
+					  SPI_MEM_OP_NO_ADDR,
+					  SPI_MEM_OP_NO_DUMMY,
+					  SPI_MEM_OP_DATA_OUT(1,
+							spinand->scratchbuf,
+							1));
+
+	*spinand->scratchbuf = target;
+	return spi_mem_exec_op(spinand->slave, &op);
+}
+
+static const struct spinand_info winbond_spinand_table[] = {
+	SPINAND_INFO("W25M02GV", 0xAB,
+		     NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 2),
+		     NAND_ECCREQ(1, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     0,
+		     SPINAND_ECCINFO(&w25m02gv_ooblayout, NULL),
+		     SPINAND_SELECT_TARGET(w25m02gv_select_target)),
+};
+
+/**
+ * winbond_spinand_detect - initialize device related part in spinand_device
+ * struct if it is a Winbond device.
+ * @spinand: SPI NAND device structure
+ */
+static int winbond_spinand_detect(struct spinand_device *spinand)
+{
+	u8 *id = spinand->id.data;
+	int ret;
+
+	/*
+	 * Winbond SPI NAND read ID need a dummy byte,
+	 * so the first byte in raw_id is dummy.
+	 */
+	if (id[1] != SPINAND_MFR_WINBOND)
+		return 0;
+
+	ret = spinand_match_and_init(spinand, winbond_spinand_table,
+				     ARRAY_SIZE(winbond_spinand_table), id[2]);
+	if (ret)
+		return ret;
+
+	return 1;
+}
+
+static int winbond_spinand_init(struct spinand_device *spinand)
+{
+	struct nand_device *nand = spinand_to_nand(spinand);
+	unsigned int i;
+
+	/*
+	 * Make sure all dies are in buffer read mode and not continuous read
+	 * mode.
+	 */
+	for (i = 0; i < nand->memorg.ntargets; i++) {
+		spinand_select_target(spinand, i);
+		spinand_upd_cfg(spinand, WINBOND_CFG_BUF_READ,
+				WINBOND_CFG_BUF_READ);
+	}
+
+	return 0;
+}
+
+static const struct spinand_manufacturer_ops winbond_spinand_manuf_ops = {
+	.detect = winbond_spinand_detect,
+	.init = winbond_spinand_init,
+};
+
+const struct spinand_manufacturer winbond_spinand_manufacturer = {
+	.id = SPINAND_MFR_WINBOND,
+	.name = "Winbond",
+	.ops = &winbond_spinand_manuf_ops,
+};
diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
index 5302d38de8..d40a7c8f4e 100644
--- a/include/linux/mtd/spinand.h
+++ b/include/linux/mtd/spinand.h
@@ -202,6 +202,7 @@ struct spinand_manufacturer {
 
 /* SPI NAND manufacturers */
 extern const struct spinand_manufacturer micron_spinand_manufacturer;
+extern const struct spinand_manufacturer winbond_spinand_manufacturer;
 
 /**
  * struct spinand_op_variants - SPI NAND operation variants

commit ed13557fe1bafd3550ef443dc57c2721ebc9fdfc
Author: Peter Pan <peterpandong@micron.com>
Date:   Thu Aug 16 17:30:13 2018 +0200

    UPSTREAM: mtd: spinand: Add initial support for Micron MT29F2G01ABAGD
    
    Add a basic driver for Micron SPI NANDs. Only one device is supported
    right now, but the driver will be extended to support more devices
    afterwards.
    
    Change-Id: I00be31e80599565e8bd3c01e17177c6594f5b98b
    Signed-off-by: Peter Pan <peterpandong@micron.com>
    Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Acked-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 883d8778ae177172c0a53c018faa39e61f30dea3)

diff --git a/drivers/mtd/nand/spi/Makefile b/drivers/mtd/nand/spi/Makefile
index f0c6e69d2e..4eb745abd4 100644
--- a/drivers/mtd/nand/spi/Makefile
+++ b/drivers/mtd/nand/spi/Makefile
@@ -1,4 +1,4 @@
 # SPDX-License-Identifier: GPL-2.0
 
-spinand-objs := core.o
+spinand-objs := core.o micron.o
 obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index 08f853ae11..36b8b52bc2 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -829,8 +829,25 @@ static const struct nand_ops spinand_ops = {
 	.isbad = spinand_isbad,
 };
 
+static const struct spinand_manufacturer *spinand_manufacturers[] = {
+	&micron_spinand_manufacturer,
+};
+
 static int spinand_manufacturer_detect(struct spinand_device *spinand)
 {
+	unsigned int i;
+	int ret;
+
+	for (i = 0; i < ARRAY_SIZE(spinand_manufacturers); i++) {
+		ret = spinand_manufacturers[i]->ops->detect(spinand);
+		if (ret > 0) {
+			spinand->manufacturer = spinand_manufacturers[i];
+			return 0;
+		} else if (ret < 0) {
+			return ret;
+		}
+	}
+
 	return -ENOTSUPP;
 }
 
diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c
new file mode 100644
index 0000000000..83951c5d0f
--- /dev/null
+++ b/drivers/mtd/nand/spi/micron.c
@@ -0,0 +1,135 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2016-2017 Micron Technology, Inc.
+ *
+ * Authors:
+ *	Peter Pan <peterpandong@micron.com>
+ */
+
+#ifndef __UBOOT__
+#include <linux/device.h>
+#include <linux/kernel.h>
+#endif
+#include <linux/mtd/spinand.h>
+
+#define SPINAND_MFR_MICRON		0x2c
+
+#define MICRON_STATUS_ECC_MASK		GENMASK(7, 4)
+#define MICRON_STATUS_ECC_NO_BITFLIPS	(0 << 4)
+#define MICRON_STATUS_ECC_1TO3_BITFLIPS	(1 << 4)
+#define MICRON_STATUS_ECC_4TO6_BITFLIPS	(3 << 4)
+#define MICRON_STATUS_ECC_7TO8_BITFLIPS	(5 << 4)
+
+static SPINAND_OP_VARIANTS(read_cache_variants,
+		SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
+
+static SPINAND_OP_VARIANTS(write_cache_variants,
+		SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
+		SPINAND_PROG_LOAD(true, 0, NULL, 0));
+
+static SPINAND_OP_VARIANTS(update_cache_variants,
+		SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
+		SPINAND_PROG_LOAD(false, 0, NULL, 0));
+
+static int mt29f2g01abagd_ooblayout_ecc(struct mtd_info *mtd, int section,
+					struct mtd_oob_region *region)
+{
+	if (section)
+		return -ERANGE;
+
+	region->offset = 64;
+	region->length = 64;
+
+	return 0;
+}
+
+static int mt29f2g01abagd_ooblayout_free(struct mtd_info *mtd, int section,
+					 struct mtd_oob_region *region)
+{
+	if (section)
+		return -ERANGE;
+
+	/* Reserve 2 bytes for the BBM. */
+	region->offset = 2;
+	region->length = 62;
+
+	return 0;
+}
+
+static const struct mtd_ooblayout_ops mt29f2g01abagd_ooblayout = {
+	.ecc = mt29f2g01abagd_ooblayout_ecc,
+	.free = mt29f2g01abagd_ooblayout_free,
+};
+
+static int mt29f2g01abagd_ecc_get_status(struct spinand_device *spinand,
+					 u8 status)
+{
+	switch (status & MICRON_STATUS_ECC_MASK) {
+	case STATUS_ECC_NO_BITFLIPS:
+		return 0;
+
+	case STATUS_ECC_UNCOR_ERROR:
+		return -EBADMSG;
+
+	case MICRON_STATUS_ECC_1TO3_BITFLIPS:
+		return 3;
+
+	case MICRON_STATUS_ECC_4TO6_BITFLIPS:
+		return 6;
+
+	case MICRON_STATUS_ECC_7TO8_BITFLIPS:
+		return 8;
+
+	default:
+		break;
+	}
+
+	return -EINVAL;
+}
+
+static const struct spinand_info micron_spinand_table[] = {
+	SPINAND_INFO("MT29F2G01ABAGD", 0x24,
+		     NAND_MEMORG(1, 2048, 128, 64, 2048, 2, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     0,
+		     SPINAND_ECCINFO(&mt29f2g01abagd_ooblayout,
+				     mt29f2g01abagd_ecc_get_status)),
+};
+
+static int micron_spinand_detect(struct spinand_device *spinand)
+{
+	u8 *id = spinand->id.data;
+	int ret;
+
+	/*
+	 * Micron SPI NAND read ID need a dummy byte,
+	 * so the first byte in raw_id is dummy.
+	 */
+	if (id[1] != SPINAND_MFR_MICRON)
+		return 0;
+
+	ret = spinand_match_and_init(spinand, micron_spinand_table,
+				     ARRAY_SIZE(micron_spinand_table), id[2]);
+	if (ret)
+		return ret;
+
+	return 1;
+}
+
+static const struct spinand_manufacturer_ops micron_spinand_manuf_ops = {
+	.detect = micron_spinand_detect,
+};
+
+const struct spinand_manufacturer micron_spinand_manufacturer = {
+	.id = SPINAND_MFR_MICRON,
+	.name = "Micron",
+	.ops = &micron_spinand_manuf_ops,
+};
diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
index ad59fc01ef..5302d38de8 100644
--- a/include/linux/mtd/spinand.h
+++ b/include/linux/mtd/spinand.h
@@ -200,6 +200,9 @@ struct spinand_manufacturer {
 	const struct spinand_manufacturer_ops *ops;
 };
 
+/* SPI NAND manufacturers */
+extern const struct spinand_manufacturer micron_spinand_manufacturer;
+
 /**
  * struct spinand_op_variants - SPI NAND operation variants
  * @ops: the list of variants for a given operation

commit 749af7cd07a192b94067ae11b805eed1fd5a26b6
Author: Peter Pan <peterpandong@micron.com>
Date:   Thu Aug 16 17:30:12 2018 +0200

    UPSTREAM: mtd: nand: Add core infrastructure to support SPI NANDs
    
    Add a SPI NAND framework based on the generic NAND framework and the
    spi-mem infrastructure.
    
    In its current state, this framework supports the following features:
    
    - single/dual/quad IO modes
    - on-die ECC
    
    Change-Id: Ifdb3001b7570e0e034f7125c4b66053462f2aed2
    Signed-off-by: Peter Pan <peterpandong@micron.com>
    Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Acked-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 0a6d6bae03864938f073cc114992c40f2338a155)

diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 1c1a1f487e..78ae04bdcb 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -2,3 +2,5 @@ config MTD_NAND_CORE
 	tristate
 
 source "drivers/mtd/nand/raw/Kconfig"
+
+source "drivers/mtd/nand/spi/Kconfig"
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index cd492dbc14..a358bc680e 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -2,3 +2,4 @@
 
 nandcore-objs := core.o bbt.o
 obj-$(CONFIG_MTD_NAND_CORE) += nandcore.o
+obj-$(CONFIG_MTD_SPI_NAND) += spi/
diff --git a/drivers/mtd/nand/spi/Kconfig b/drivers/mtd/nand/spi/Kconfig
new file mode 100644
index 0000000000..2197cb531f
--- /dev/null
+++ b/drivers/mtd/nand/spi/Kconfig
@@ -0,0 +1,7 @@
+menuconfig MTD_SPI_NAND
+	bool "SPI NAND device Support"
+	depends on MTD && DM_SPI
+	select MTD_NAND_CORE
+	select SPI_MEM
+	help
+	  This is the framework for the SPI NAND device drivers.
diff --git a/drivers/mtd/nand/spi/Makefile b/drivers/mtd/nand/spi/Makefile
new file mode 100644
index 0000000000..f0c6e69d2e
--- /dev/null
+++ b/drivers/mtd/nand/spi/Makefile
@@ -0,0 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0
+
+spinand-objs := core.o
+obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
new file mode 100644
index 0000000000..08f853ae11
--- /dev/null
+++ b/drivers/mtd/nand/spi/core.c
@@ -0,0 +1,1235 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2016-2017 Micron Technology, Inc.
+ *
+ * Authors:
+ *	Peter Pan <peterpandong@micron.com>
+ *	Boris Brezillon <boris.brezillon@bootlin.com>
+ */
+
+#define pr_fmt(fmt)	"spi-nand: " fmt
+
+#ifndef __UBOOT__
+#include <linux/device.h>
+#include <linux/jiffies.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/mtd/spinand.h>
+#include <linux/of.h>
+#include <linux/slab.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/spi-mem.h>
+#else
+#include <common.h>
+#include <errno.h>
+#include <spi.h>
+#include <spi-mem.h>
+#include <linux/mtd/spinand.h>
+#endif
+
+/* SPI NAND index visible in MTD names */
+static int spi_nand_idx;
+
+static void spinand_cache_op_adjust_colum(struct spinand_device *spinand,
+					  const struct nand_page_io_req *req,
+					  u16 *column)
+{
+	struct nand_device *nand = spinand_to_nand(spinand);
+	unsigned int shift;
+
+	if (nand->memorg.planes_per_lun < 2)
+		return;
+
+	/* The plane number is passed in MSB just above the column address */
+	shift = fls(nand->memorg.pagesize);
+	*column |= req->pos.plane << shift;
+}
+
+static int spinand_read_reg_op(struct spinand_device *spinand, u8 reg, u8 *val)
+{
+	struct spi_mem_op op = SPINAND_GET_FEATURE_OP(reg,
+						      spinand->scratchbuf);
+	int ret;
+
+	ret = spi_mem_exec_op(spinand->slave, &op);
+	if (ret)
+		return ret;
+
+	*val = *spinand->scratchbuf;
+	return 0;
+}
+
+static int spinand_write_reg_op(struct spinand_device *spinand, u8 reg, u8 val)
+{
+	struct spi_mem_op op = SPINAND_SET_FEATURE_OP(reg,
+						      spinand->scratchbuf);
+
+	*spinand->scratchbuf = val;
+	return spi_mem_exec_op(spinand->slave, &op);
+}
+
+static int spinand_read_status(struct spinand_device *spinand, u8 *status)
+{
+	return spinand_read_reg_op(spinand, REG_STATUS, status);
+}
+
+static int spinand_get_cfg(struct spinand_device *spinand, u8 *cfg)
+{
+	struct nand_device *nand = spinand_to_nand(spinand);
+
+	if (WARN_ON(spinand->cur_target < 0 ||
+		    spinand->cur_target >= nand->memorg.ntargets))
+		return -EINVAL;
+
+	*cfg = spinand->cfg_cache[spinand->cur_target];
+	return 0;
+}
+
+static int spinand_set_cfg(struct spinand_device *spinand, u8 cfg)
+{
+	struct nand_device *nand = spinand_to_nand(spinand);
+	int ret;
+
+	if (WARN_ON(spinand->cur_target < 0 ||
+		    spinand->cur_target >= nand->memorg.ntargets))
+		return -EINVAL;
+
+	if (spinand->cfg_cache[spinand->cur_target] == cfg)
+		return 0;
+
+	ret = spinand_write_reg_op(spinand, REG_CFG, cfg);
+	if (ret)
+		return ret;
+
+	spinand->cfg_cache[spinand->cur_target] = cfg;
+	return 0;
+}
+
+/**
+ * spinand_upd_cfg() - Update the configuration register
+ * @spinand: the spinand device
+ * @mask: the mask encoding the bits to update in the config reg
+ * @val: the new value to apply
+ *
+ * Update the configuration register.
+ *
+ * Return: 0 on success, a negative error code otherwise.
+ */
+int spinand_upd_cfg(struct spinand_device *spinand, u8 mask, u8 val)
+{
+	int ret;
+	u8 cfg;
+
+	ret = spinand_get_cfg(spinand, &cfg);
+	if (ret)
+		return ret;
+
+	cfg &= ~mask;
+	cfg |= val;
+
+	return spinand_set_cfg(spinand, cfg);
+}
+
+/**
+ * spinand_select_target() - Select a specific NAND target/die
+ * @spinand: the spinand device
+ * @target: the target/die to select
+ *
+ * Select a new target/die. If chip only has one die, this function is a NOOP.
+ *
+ * Return: 0 on success, a negative error code otherwise.
+ */
+int spinand_select_target(struct spinand_device *spinand, unsigned int target)
+{
+	struct nand_device *nand = spinand_to_nand(spinand);
+	int ret;
+
+	if (WARN_ON(target >= nand->memorg.ntargets))
+		return -EINVAL;
+
+	if (spinand->cur_target == target)
+		return 0;
+
+	if (nand->memorg.ntargets == 1) {
+		spinand->cur_target = target;
+		return 0;
+	}
+
+	ret = spinand->select_target(spinand, target);
+	if (ret)
+		return ret;
+
+	spinand->cur_target = target;
+	return 0;
+}
+
+static int spinand_init_cfg_cache(struct spinand_device *spinand)
+{
+	struct nand_device *nand = spinand_to_nand(spinand);
+	struct udevice *dev = spinand->slave->dev;
+	unsigned int target;
+	int ret;
+
+	spinand->cfg_cache = devm_kzalloc(dev,
+					  sizeof(*spinand->cfg_cache) *
+					  nand->memorg.ntargets,
+					  GFP_KERNEL);
+	if (!spinand->cfg_cache)
+		return -ENOMEM;
+
+	for (target = 0; target < nand->memorg.ntargets; target++) {
+		ret = spinand_select_target(spinand, target);
+		if (ret)
+			return ret;
+
+		/*
+		 * We use spinand_read_reg_op() instead of spinand_get_cfg()
+		 * here to bypass the config cache.
+		 */
+		ret = spinand_read_reg_op(spinand, REG_CFG,
+					  &spinand->cfg_cache[target]);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+static int spinand_init_quad_enable(struct spinand_device *spinand)
+{
+	bool enable = false;
+
+	if (!(spinand->flags & SPINAND_HAS_QE_BIT))
+		return 0;
+
+	if (spinand->op_templates.read_cache->data.buswidth == 4 ||
+	    spinand->op_templates.write_cache->data.buswidth == 4 ||
+	    spinand->op_templates.update_cache->data.buswidth == 4)
+		enable = true;
+
+	return spinand_upd_cfg(spinand, CFG_QUAD_ENABLE,
+			       enable ? CFG_QUAD_ENABLE : 0);
+}
+
+static int spinand_ecc_enable(struct spinand_device *spinand,
+			      bool enable)
+{
+	return spinand_upd_cfg(spinand, CFG_ECC_ENABLE,
+			       enable ? CFG_ECC_ENABLE : 0);
+}
+
+static int spinand_write_enable_op(struct spinand_device *spinand)
+{
+	struct spi_mem_op op = SPINAND_WR_EN_DIS_OP(true);
+
+	return spi_mem_exec_op(spinand->slave, &op);
+}
+
+static int spinand_load_page_op(struct spinand_device *spinand,
+				const struct nand_page_io_req *req)
+{
+	struct nand_device *nand = spinand_to_nand(spinand);
+	unsigned int row = nanddev_pos_to_row(nand, &req->pos);
+	struct spi_mem_op op = SPINAND_PAGE_READ_OP(row);
+
+	return spi_mem_exec_op(spinand->slave, &op);
+}
+
+static int spinand_read_from_cache_op(struct spinand_device *spinand,
+				      const struct nand_page_io_req *req)
+{
+	struct spi_mem_op op = *spinand->op_templates.read_cache;
+	struct nand_device *nand = spinand_to_nand(spinand);
+	struct mtd_info *mtd = nanddev_to_mtd(nand);
+	struct nand_page_io_req adjreq = *req;
+	unsigned int nbytes = 0;
+	void *buf = NULL;
+	u16 column = 0;
+	int ret;
+
+	if (req->datalen) {
+		adjreq.datalen = nanddev_page_size(nand);
+		adjreq.dataoffs = 0;
+		adjreq.databuf.in = spinand->databuf;
+		buf = spinand->databuf;
+		nbytes = adjreq.datalen;
+	}
+
+	if (req->ooblen) {
+		adjreq.ooblen = nanddev_per_page_oobsize(nand);
+		adjreq.ooboffs = 0;
+		adjreq.oobbuf.in = spinand->oobbuf;
+		nbytes += nanddev_per_page_oobsize(nand);
+		if (!buf) {
+			buf = spinand->oobbuf;
+			column = nanddev_page_size(nand);
+		}
+	}
+
+	spinand_cache_op_adjust_colum(spinand, &adjreq, &column);
+	op.addr.val = column;
+
+	/*
+	 * Some controllers are limited in term of max RX data size. In this
+	 * case, just repeat the READ_CACHE operation after updating the
+	 * column.
+	 */
+	while (nbytes) {
+		op.data.buf.in = buf;
+		op.data.nbytes = nbytes;
+		ret = spi_mem_adjust_op_size(spinand->slave, &op);
+		if (ret)
+			return ret;
+
+		ret = spi_mem_exec_op(spinand->slave, &op);
+		if (ret)
+			return ret;
+
+		buf += op.data.nbytes;
+		nbytes -= op.data.nbytes;
+		op.addr.val += op.data.nbytes;
+	}
+
+	if (req->datalen)
+		memcpy(req->databuf.in, spinand->databuf + req->dataoffs,
+		       req->datalen);
+
+	if (req->ooblen) {
+		if (req->mode == MTD_OPS_AUTO_OOB)
+			mtd_ooblayout_get_databytes(mtd, req->oobbuf.in,
+						    spinand->oobbuf,
+						    req->ooboffs,
+						    req->ooblen);
+		else
+			memcpy(req->oobbuf.in, spinand->oobbuf + req->ooboffs,
+			       req->ooblen);
+	}
+
+	return 0;
+}
+
+static int spinand_write_to_cache_op(struct spinand_device *spinand,
+				     const struct nand_page_io_req *req)
+{
+	struct spi_mem_op op = *spinand->op_templates.write_cache;
+	struct nand_device *nand = spinand_to_nand(spinand);
+	struct mtd_info *mtd = nanddev_to_mtd(nand);
+	struct nand_page_io_req adjreq = *req;
+	unsigned int nbytes = 0;
+	void *buf = NULL;
+	u16 column = 0;
+	int ret;
+
+	memset(spinand->databuf, 0xff,
+	       nanddev_page_size(nand) +
+	       nanddev_per_page_oobsize(nand));
+
+	if (req->datalen) {
+		memcpy(spinand->databuf + req->dataoffs, req->databuf.out,
+		       req->datalen);
+		adjreq.dataoffs = 0;
+		adjreq.datalen = nanddev_page_size(nand);
+		adjreq.databuf.out = spinand->databuf;
+		nbytes = adjreq.datalen;
+		buf = spinand->databuf;
+	}
+
+	if (req->ooblen) {
+		if (req->mode == MTD_OPS_AUTO_OOB)
+			mtd_ooblayout_set_databytes(mtd, req->oobbuf.out,
+						    spinand->oobbuf,
+						    req->ooboffs,
+						    req->ooblen);
+		else
+			memcpy(spinand->oobbuf + req->ooboffs, req->oobbuf.out,
+			       req->ooblen);
+
+		adjreq.ooblen = nanddev_per_page_oobsize(nand);
+		adjreq.ooboffs = 0;
+		nbytes += nanddev_per_page_oobsize(nand);
+		if (!buf) {
+			buf = spinand->oobbuf;
+			column = nanddev_page_size(nand);
+		}
+	}
+
+	spinand_cache_op_adjust_colum(spinand, &adjreq, &column);
+
+	op = *spinand->op_templates.write_cache;
+	op.addr.val = column;
+
+	/*
+	 * Some controllers are limited in term of max TX data size. In this
+	 * case, split the operation into one LOAD CACHE and one or more
+	 * LOAD RANDOM CACHE.
+	 */
+	while (nbytes) {
+		op.data.buf.out = buf;
+		op.data.nbytes = nbytes;
+
+		ret = spi_mem_adjust_op_size(spinand->slave, &op);
+		if (ret)
+			return ret;
+
+		ret = spi_mem_exec_op(spinand->slave, &op);
+		if (ret)
+			return ret;
+
+		buf += op.data.nbytes;
+		nbytes -= op.data.nbytes;
+		op.addr.val += op.data.nbytes;
+
+		/*
+		 * We need to use the RANDOM LOAD CACHE operation if there's
+		 * more than one iteration, because the LOAD operation resets
+		 * the cache to 0xff.
+		 */
+		if (nbytes) {
+			column = op.addr.val;
+			op = *spinand->op_templates.update_cache;
+			op.addr.val = column;
+		}
+	}
+
+	return 0;
+}
+
+static int spinand_program_op(struct spinand_device *spinand,
+			      const struct nand_page_io_req *req)
+{
+	struct nand_device *nand = spinand_to_nand(spinand);
+	unsigned int row = nanddev_pos_to_row(nand, &req->pos);
+	struct spi_mem_op op = SPINAND_PROG_EXEC_OP(row);
+
+	return spi_mem_exec_op(spinand->slave, &op);
+}
+
+static int spinand_erase_op(struct spinand_device *spinand,
+			    const struct nand_pos *pos)
+{
+	struct nand_device *nand = &spinand->base;
+	unsigned int row = nanddev_pos_to_row(nand, pos);
+	struct spi_mem_op op = SPINAND_BLK_ERASE_OP(row);
+
+	return spi_mem_exec_op(spinand->slave, &op);
+}
+
+static int spinand_wait(struct spinand_device *spinand, u8 *s)
+{
+	unsigned long start, stop;
+	u8 status;
+	int ret;
+
+	start = get_timer(0);
+	stop = 400;
+	do {
+		ret = spinand_read_status(spinand, &status);
+		if (ret)
+			return ret;
+
+		if (!(status & STATUS_BUSY))
+			goto out;
+	} while (get_timer(start) < stop);
+
+	/*
+	 * Extra read, just in case the STATUS_READY bit has changed
+	 * since our last check
+	 */
+	ret = spinand_read_status(spinand, &status);
+	if (ret)
+		return ret;
+
+out:
+	if (s)
+		*s = status;
+
+	return status & STATUS_BUSY ? -ETIMEDOUT : 0;
+}
+
+static int spinand_read_id_op(struct spinand_device *spinand, u8 *buf)
+{
+	struct spi_mem_op op = SPINAND_READID_OP(0, spinand->scratchbuf,
+						 SPINAND_MAX_ID_LEN);
+	int ret;
+
+	ret = spi_mem_exec_op(spinand->slave, &op);
+	if (!ret)
+		memcpy(buf, spinand->scratchbuf, SPINAND_MAX_ID_LEN);
+
+	return ret;
+}
+
+static int spinand_reset_op(struct spinand_device *spinand)
+{
+	struct spi_mem_op op = SPINAND_RESET_OP;
+	int ret;
+
+	ret = spi_mem_exec_op(spinand->slave, &op);
+	if (ret)
+		return ret;
+
+	return spinand_wait(spinand, NULL);
+}
+
+static int spinand_lock_block(struct spinand_device *spinand, u8 lock)
+{
+	return spinand_write_reg_op(spinand, REG_BLOCK_LOCK, lock);
+}
+
+static int spinand_check_ecc_status(struct spinand_device *spinand, u8 status)
+{
+	struct nand_device *nand = spinand_to_nand(spinand);
+
+	if (spinand->eccinfo.get_status)
+		return spinand->eccinfo.get_status(spinand, status);
+
+	switch (status & STATUS_ECC_MASK) {
+	case STATUS_ECC_NO_BITFLIPS:
+		return 0;
+
+	case STATUS_ECC_HAS_BITFLIPS:
+		/*
+		 * We have no way to know exactly how many bitflips have been
+		 * fixed, so let's return the maximum possible value so that
+		 * wear-leveling layers move the data immediately.
+		 */
+		return nand->eccreq.strength;
+
+	case STATUS_ECC_UNCOR_ERROR:
+		return -EBADMSG;
+
+	default:
+		break;
+	}
+
+	return -EINVAL;
+}
+
+static int spinand_read_page(struct spinand_device *spinand,
+			     const struct nand_page_io_req *req,
+			     bool ecc_enabled)
+{
+	u8 status;
+	int ret;
+
+	ret = spinand_load_page_op(spinand, req);
+	if (ret)
+		return ret;
+
+	ret = spinand_wait(spinand, &status);
+	if (ret < 0)
+		return ret;
+
+	ret = spinand_read_from_cache_op(spinand, req);
+	if (ret)
+		return ret;
+
+	if (!ecc_enabled)
+		return 0;
+
+	return spinand_check_ecc_status(spinand, status);
+}
+
+static int spinand_write_page(struct spinand_device *spinand,
+			      const struct nand_page_io_req *req)
+{
+	u8 status;
+	int ret;
+
+	ret = spinand_write_enable_op(spinand);
+	if (ret)
+		return ret;
+
+	ret = spinand_write_to_cache_op(spinand, req);
+	if (ret)
+		return ret;
+
+	ret = spinand_program_op(spinand, req);
+	if (ret)
+		return ret;
+
+	ret = spinand_wait(spinand, &status);
+	if (!ret && (status & STATUS_PROG_FAILED))
+		ret = -EIO;
+
+	return ret;
+}
+
+static int spinand_mtd_read(struct mtd_info *mtd, loff_t from,
+			    struct mtd_oob_ops *ops)
+{
+	struct spinand_device *spinand = mtd_to_spinand(mtd);
+	struct nand_device *nand = mtd_to_nanddev(mtd);
+	unsigned int max_bitflips = 0;
+	struct nand_io_iter iter;
+	bool enable_ecc = false;
+	bool ecc_failed = false;
+	int ret = 0;
+
+	if (ops->mode != MTD_OPS_RAW && spinand->eccinfo.ooblayout)
+		enable_ecc = true;
+
+#ifndef __UBOOT__
+	mutex_lock(&spinand->lock);
+#endif
+
+	nanddev_io_for_each_page(nand, from, ops, &iter) {
+		ret = spinand_select_target(spinand, iter.req.pos.target);
+		if (ret)
+			break;
+
+		ret = spinand_ecc_enable(spinand, enable_ecc);
+		if (ret)
+			break;
+
+		ret = spinand_read_page(spinand, &iter.req, enable_ecc);
+		if (ret < 0 && ret != -EBADMSG)
+			break;
+
+		if (ret == -EBADMSG) {
+			ecc_failed = true;
+			mtd->ecc_stats.failed++;
+			ret = 0;
+		} else {
+			mtd->ecc_stats.corrected += ret;
+			max_bitflips = max_t(unsigned int, max_bitflips, ret);
+		}
+
+		ops->retlen += iter.req.datalen;
+		ops->oobretlen += iter.req.ooblen;
+	}
+
+#ifndef __UBOOT__
+	mutex_unlock(&spinand->lock);
+#endif
+	if (ecc_failed && !ret)
+		ret = -EBADMSG;
+
+	return ret ? ret : max_bitflips;
+}
+
+static int spinand_mtd_write(struct mtd_info *mtd, loff_t to,
+			     struct mtd_oob_ops *ops)
+{
+	struct spinand_device *spinand = mtd_to_spinand(mtd);
+	struct nand_device *nand = mtd_to_nanddev(mtd);
+	struct nand_io_iter iter;
+	bool enable_ecc = false;
+	int ret = 0;
+
+	if (ops->mode != MTD_OPS_RAW && mtd->ooblayout)
+		enable_ecc = true;
+
+#ifndef __UBOOT__
+	mutex_lock(&spinand->lock);
+#endif
+
+	nanddev_io_for_each_page(nand, to, ops, &iter) {
+		ret = spinand_select_target(spinand, iter.req.pos.target);
+		if (ret)
+			break;
+
+		ret = spinand_ecc_enable(spinand, enable_ecc);
+		if (ret)
+			break;
+
+		ret = spinand_write_page(spinand, &iter.req);
+		if (ret)
+			break;
+
+		ops->retlen += iter.req.datalen;
+		ops->oobretlen += iter.req.ooblen;
+	}
+
+#ifndef __UBOOT__
+	mutex_unlock(&spinand->lock);
+#endif
+
+	return ret;
+}
+
+static bool spinand_isbad(struct nand_device *nand, const struct nand_pos *pos)
+{
+	struct spinand_device *spinand = nand_to_spinand(nand);
+	struct nand_page_io_req req = {
+		.pos = *pos,
+		.ooblen = 2,
+		.ooboffs = 0,
+		.oobbuf.in = spinand->oobbuf,
+		.mode = MTD_OPS_RAW,
+	};
+	int ret;
+
+	memset(spinand->oobbuf, 0, 2);
+	ret = spinand_select_target(spinand, pos->target);
+	if (ret)
+		return ret;
+
+	ret = spinand_read_page(spinand, &req, false);
+	if (ret)
+		return ret;
+
+	if (spinand->oobbuf[0] != 0xff || spinand->oobbuf[1] != 0xff)
+		return true;
+
+	return false;
+}
+
+static int spinand_mtd_block_isbad(struct mtd_info *mtd, loff_t offs)
+{
+	struct nand_device *nand = mtd_to_nanddev(mtd);
+#ifndef __UBOOT__
+	struct spinand_device *spinand = nand_to_spinand(nand);
+#endif
+	struct nand_pos pos;
+	int ret;
+
+	nanddev_offs_to_pos(nand, offs, &pos);
+#ifndef __UBOOT__
+	mutex_lock(&spinand->lock);
+#endif
+	ret = nanddev_isbad(nand, &pos);
+#ifndef __UBOOT__
+	mutex_unlock(&spinand->lock);
+#endif
+	return ret;
+}
+
+static int spinand_markbad(struct nand_device *nand, const struct nand_pos *pos)
+{
+	struct spinand_device *spinand = nand_to_spinand(nand);
+	struct nand_page_io_req req = {
+		.pos = *pos,
+		.ooboffs = 0,
+		.ooblen = 2,
+		.oobbuf.out = spinand->oobbuf,
+	};
+	int ret;
+
+	/* Erase block before marking it bad. */
+	ret = spinand_select_target(spinand, pos->target);
+	if (ret)
+		return ret;
+
+	ret = spinand_write_enable_op(spinand);
+	if (ret)
+		return ret;
+
+	ret = spinand_erase_op(spinand, pos);
+	if (ret)
+		return ret;
+
+	memset(spinand->oobbuf, 0, 2);
+	return spinand_write_page(spinand, &req);
+}
+
+static int spinand_mtd_block_markbad(struct mtd_info *mtd, loff_t offs)
+{
+	struct nand_device *nand = mtd_to_nanddev(mtd);
+#ifndef __UBOOT__
+	struct spinand_device *spinand = nand_to_spinand(nand);
+#endif
+	struct nand_pos pos;
+	int ret;
+
+	nanddev_offs_to_pos(nand, offs, &pos);
+#ifndef __UBOOT__
+	mutex_lock(&spinand->lock);
+#endif
+	ret = nanddev_markbad(nand, &pos);
+#ifndef __UBOOT__
+	mutex_unlock(&spinand->lock);
+#endif
+	return ret;
+}
+
+static int spinand_erase(struct nand_device *nand, const struct nand_pos *pos)
+{
+	struct spinand_device *spinand = nand_to_spinand(nand);
+	u8 status;
+	int ret;
+
+	ret = spinand_select_target(spinand, pos->target);
+	if (ret)
+		return ret;
+
+	ret = spinand_write_enable_op(spinand);
+	if (ret)
+		return ret;
+
+	ret = spinand_erase_op(spinand, pos);
+	if (ret)
+		return ret;
+
+	ret = spinand_wait(spinand, &status);
+	if (!ret && (status & STATUS_ERASE_FAILED))
+		ret = -EIO;
+
+	return ret;
+}
+
+static int spinand_mtd_erase(struct mtd_info *mtd,
+			     struct erase_info *einfo)
+{
+#ifndef __UBOOT__
+	struct spinand_device *spinand = mtd_to_spinand(mtd);
+#endif
+	int ret;
+
+#ifndef __UBOOT__
+	mutex_lock(&spinand->lock);
+#endif
+	ret = nanddev_mtd_erase(mtd, einfo);
+#ifndef __UBOOT__
+	mutex_unlock(&spinand->lock);
+#endif
+
+	return ret;
+}
+
+static int spinand_mtd_block_isreserved(struct mtd_info *mtd, loff_t offs)
+{
+#ifndef __UBOOT__
+	struct spinand_device *spinand = mtd_to_spinand(mtd);
+#endif
+	struct nand_device *nand = mtd_to_nanddev(mtd);
+	struct nand_pos pos;
+	int ret;
+
+	nanddev_offs_to_pos(nand, offs, &pos);
+#ifndef __UBOOT__
+	mutex_lock(&spinand->lock);
+#endif
+	ret = nanddev_isreserved(nand, &pos);
+#ifndef __UBOOT__
+	mutex_unlock(&spinand->lock);
+#endif
+
+	return ret;
+}
+
+const struct spi_mem_op *
+spinand_find_supported_op(struct spinand_device *spinand,
+			  const struct spi_mem_op *ops,
+			  unsigned int nops)
+{
+	unsigned int i;
+
+	for (i = 0; i < nops; i++) {
+		if (spi_mem_supports_op(spinand->slave, &ops[i]))
+			return &ops[i];
+	}
+
+	return NULL;
+}
+
+static const struct nand_ops spinand_ops = {
+	.erase = spinand_erase,
+	.markbad = spinand_markbad,
+	.isbad = spinand_isbad,
+};
+
+static int spinand_manufacturer_detect(struct spinand_device *spinand)
+{
+	return -ENOTSUPP;
+}
+
+static int spinand_manufacturer_init(struct spinand_device *spinand)
+{
+	if (spinand->manufacturer->ops->init)
+		return spinand->manufacturer->ops->init(spinand);
+
+	return 0;
+}
+
+static void spinand_manufacturer_cleanup(struct spinand_device *spinand)
+{
+	/* Release manufacturer private data */
+	if (spinand->manufacturer->ops->cleanup)
+		return spinand->manufacturer->ops->cleanup(spinand);
+}
+
+static const struct spi_mem_op *
+spinand_select_op_variant(struct spinand_device *spinand,
+			  const struct spinand_op_variants *variants)
+{
+	struct nand_device *nand = spinand_to_nand(spinand);
+	unsigned int i;
+
+	for (i = 0; i < variants->nops; i++) {
+		struct spi_mem_op op = variants->ops[i];
+		unsigned int nbytes;
+		int ret;
+
+		nbytes = nanddev_per_page_oobsize(nand) +
+			 nanddev_page_size(nand);
+
+		while (nbytes) {
+			op.data.nbytes = nbytes;
+			ret = spi_mem_adjust_op_size(spinand->slave, &op);
+			if (ret)
+				break;
+
+			if (!spi_mem_supports_op(spinand->slave, &op))
+				break;
+
+			nbytes -= op.data.nbytes;
+		}
+
+		if (!nbytes)
+			return &variants->ops[i];
+	}
+
+	return NULL;
+}
+
+/**
+ * spinand_match_and_init() - Try to find a match between a device ID and an
+ *			      entry in a spinand_info table
+ * @spinand: SPI NAND object
+ * @table: SPI NAND device description table
+ * @table_size: size of the device description table
+ *
+ * Should be used by SPI NAND manufacturer drivers when they want to find a
+ * match between a device ID retrieved through the READ_ID command and an
+ * entry in the SPI NAND description table. If a match is found, the spinand
+ * object will be initialized with information provided by the matching
+ * spinand_info entry.
+ *
+ * Return: 0 on success, a negative error code otherwise.
+ */
+int spinand_match_and_init(struct spinand_device *spinand,
+			   const struct spinand_info *table,
+			   unsigned int table_size, u8 devid)
+{
+	struct nand_device *nand = spinand_to_nand(spinand);
+	unsigned int i;
+
+	for (i = 0; i < table_size; i++) {
+		const struct spinand_info *info = &table[i];
+		const struct spi_mem_op *op;
+
+		if (devid != info->devid)
+			continue;
+
+		nand->memorg = table[i].memorg;
+		nand->eccreq = table[i].eccreq;
+		spinand->eccinfo = table[i].eccinfo;
+		spinand->flags = table[i].flags;
+		spinand->select_target = table[i].select_target;
+
+		op = spinand_select_op_variant(spinand,
+					       info->op_variants.read_cache);
+		if (!op)
+			return -ENOTSUPP;
+
+		spinand->op_templates.read_cache = op;
+
+		op = spinand_select_op_variant(spinand,
+					       info->op_variants.write_cache);
+		if (!op)
+			return -ENOTSUPP;
+
+		spinand->op_templates.write_cache = op;
+
+		op = spinand_select_op_variant(spinand,
+					       info->op_variants.update_cache);
+		spinand->op_templates.update_cache = op;
+
+		return 0;
+	}
+
+	return -ENOTSUPP;
+}
+
+static int spinand_detect(struct spinand_device *spinand)
+{
+	struct nand_device *nand = spinand_to_nand(spinand);
+	int ret;
+
+	ret = spinand_reset_op(spinand);
+	if (ret)
+		return ret;
+
+	ret = spinand_read_id_op(spinand, spinand->id.data);
+	if (ret)
+		return ret;
+
+	spinand->id.len = SPINAND_MAX_ID_LEN;
+
+	ret = spinand_manufacturer_detect(spinand);
+	if (ret) {
+		dev_err(dev, "unknown raw ID %*phN\n", SPINAND_MAX_ID_LEN,
+			spinand->id.data);
+		return ret;
+	}
+
+	if (nand->memorg.ntargets > 1 && !spinand->select_target) {
+		dev_err(dev,
+			"SPI NANDs with more than one die must implement ->select_target()\n");
+		return -EINVAL;
+	}
+
+	dev_info(spinand->slave->dev,
+		 "%s SPI NAND was found.\n", spinand->manufacturer->name);
+	dev_info(spinand->slave->dev,
+		 "%llu MiB, block size: %zu KiB, page size: %zu, OOB size: %u\n",
+		 nanddev_size(nand) >> 20, nanddev_eraseblock_size(nand) >> 10,
+		 nanddev_page_size(nand), nanddev_per_page_oobsize(nand));
+
+	return 0;
+}
+
+static int spinand_noecc_ooblayout_ecc(struct mtd_info *mtd, int section,
+				       struct mtd_oob_region *region)
+{
+	return -ERANGE;
+}
+
+static int spinand_noecc_ooblayout_free(struct mtd_info *mtd, int section,
+					struct mtd_oob_region *region)
+{
+	if (section)
+		return -ERANGE;
+
+	/* Reserve 2 bytes for the BBM. */
+	region->offset = 2;
+	region->length = 62;
+
+	return 0;
+}
+
+static const struct mtd_ooblayout_ops spinand_noecc_ooblayout = {
+	.ecc = spinand_noecc_ooblayout_ecc,
+	.free = spinand_noecc_ooblayout_free,
+};
+
+static int spinand_init(struct spinand_device *spinand)
+{
+	struct mtd_info *mtd = spinand_to_mtd(spinand);
+	struct nand_device *nand = mtd_to_nanddev(mtd);
+	int ret, i;
+
+	/*
+	 * We need a scratch buffer because the spi_mem interface requires that
+	 * buf passed in spi_mem_op->data.buf be DMA-able.
+	 */
+	spinand->scratchbuf = kzalloc(SPINAND_MAX_ID_LEN, GFP_KERNEL);
+	if (!spinand->scratchbuf)
+		return -ENOMEM;
+
+	ret = spinand_detect(spinand);
+	if (ret)
+		goto err_free_bufs;
+
+	/*
+	 * Use kzalloc() instead of devm_kzalloc() here, because some drivers
+	 * may use this buffer for DMA access.
+	 * Memory allocated by devm_ does not guarantee DMA-safe alignment.
+	 */
+	spinand->databuf = kzalloc(nanddev_page_size(nand) +
+			       nanddev_per_page_oobsize(nand),
+			       GFP_KERNEL);
+	if (!spinand->databuf) {
+		ret = -ENOMEM;
+		goto err_free_bufs;
+	}
+
+	spinand->oobbuf = spinand->databuf + nanddev_page_size(nand);
+
+	ret = spinand_init_cfg_cache(spinand);
+	if (ret)
+		goto err_free_bufs;
+
+	ret = spinand_init_quad_enable(spinand);
+	if (ret)
+		goto err_free_bufs;
+
+	ret = spinand_upd_cfg(spinand, CFG_OTP_ENABLE, 0);
+	if (ret)
+		goto err_free_bufs;
+
+	ret = spinand_manufacturer_init(spinand);
+	if (ret) {
+		dev_err(dev,
+			"Failed to initialize the SPI NAND chip (err = %d)\n",
+			ret);
+		goto err_free_bufs;
+	}
+
+	/* After power up, all blocks are locked, so unlock them here. */
+	for (i = 0; i < nand->memorg.ntargets; i++) {
+		ret = spinand_select_target(spinand, i);
+		if (ret)
+			goto err_free_bufs;
+
+		ret = spinand_lock_block(spinand, BL_ALL_UNLOCKED);
+		if (ret)
+			goto err_free_bufs;
+	}
+
+	ret = nanddev_init(nand, &spinand_ops, THIS_MODULE);
+	if (ret)
+		goto err_manuf_cleanup;
+
+	/*
+	 * Right now, we don't support ECC, so let the whole oob
+	 * area is available for user.
+	 */
+	mtd->_read_oob = spinand_mtd_read;
+	mtd->_write_oob = spinand_mtd_write;
+	mtd->_block_isbad = spinand_mtd_block_isbad;
+	mtd->_block_markbad = spinand_mtd_block_markbad;
+	mtd->_block_isreserved = spinand_mtd_block_isreserved;
+	mtd->_erase = spinand_mtd_erase;
+
+	if (spinand->eccinfo.ooblayout)
+		mtd_set_ooblayout(mtd, spinand->eccinfo.ooblayout);
+	else
+		mtd_set_ooblayout(mtd, &spinand_noecc_ooblayout);
+
+	ret = mtd_ooblayout_count_freebytes(mtd);
+	if (ret < 0)
+		goto err_cleanup_nanddev;
+
+	mtd->oobavail = ret;
+
+	return 0;
+
+err_cleanup_nanddev:
+	nanddev_cleanup(nand);
+
+err_manuf_cleanup:
+	spinand_manufacturer_cleanup(spinand);
+
+err_free_bufs:
+	kfree(spinand->databuf);
+	kfree(spinand->scratchbuf);
+	return ret;
+}
+
+static void spinand_cleanup(struct spinand_device *spinand)
+{
+	struct nand_device *nand = spinand_to_nand(spinand);
+
+	nanddev_cleanup(nand);
+	spinand_manufacturer_cleanup(spinand);
+	kfree(spinand->databuf);
+	kfree(spinand->scratchbuf);
+}
+
+static int spinand_probe(struct udevice *dev)
+{
+	struct spinand_device *spinand = dev_get_priv(dev);
+	struct spi_slave *slave = dev_get_parent_priv(dev);
+	struct mtd_info *mtd = dev_get_uclass_priv(dev);
+	struct nand_device *nand = spinand_to_nand(spinand);
+	int ret;
+
+#ifndef __UBOOT__
+	spinand = devm_kzalloc(&mem->spi->dev, sizeof(*spinand),
+			       GFP_KERNEL);
+	if (!spinand)
+		return -ENOMEM;
+
+	spinand->spimem = mem;
+	spi_mem_set_drvdata(mem, spinand);
+	spinand_set_of_node(spinand, mem->spi->dev.of_node);
+	mutex_init(&spinand->lock);
+
+	mtd = spinand_to_mtd(spinand);
+	mtd->dev.parent = &mem->spi->dev;
+#else
+	nand->mtd = mtd;
+	mtd->priv = nand;
+	mtd->dev = dev;
+	mtd->name = malloc(20);
+	if (!mtd->name)
+		return -ENOMEM;
+	sprintf(mtd->name, "spi-nand%d", spi_nand_idx++);
+	spinand->slave = slave;
+	spinand_set_of_node(spinand, dev->node.np);
+#endif
+
+	ret = spinand_init(spinand);
+	if (ret)
+		return ret;
+
+#ifndef __UBOOT__
+	ret = mtd_device_register(mtd, NULL, 0);
+#else
+	ret = add_mtd_device(mtd);
+#endif
+	if (ret)
+		goto err_spinand_cleanup;
+
+	return 0;
+
+err_spinand_cleanup:
+	spinand_cleanup(spinand);
+
+	return ret;
+}
+
+#ifndef __UBOOT__
+static int spinand_remove(struct udevice *slave)
+{
+	struct spinand_device *spinand;
+	struct mtd_info *mtd;
+	int ret;
+
+	spinand = spi_mem_get_drvdata(slave);
+	mtd = spinand_to_mtd(spinand);
+	free(mtd->name);
+
+	ret = mtd_device_unregister(mtd);
+	if (ret)
+		return ret;
+
+	spinand_cleanup(spinand);
+
+	return 0;
+}
+
+static const struct spi_device_id spinand_ids[] = {
+	{ .name = "spi-nand" },
+	{ /* sentinel */ },
+};
+
+#ifdef CONFIG_OF
+static const struct of_device_id spinand_of_ids[] = {
+	{ .compatible = "spi-nand" },
+	{ /* sentinel */ },
+};
+#endif
+
+static struct spi_mem_driver spinand_drv = {
+	.spidrv = {
+		.id_table = spinand_ids,
+		.driver = {
+			.name = "spi-nand",
+			.of_match_table = of_match_ptr(spinand_of_ids),
+		},
+	},
+	.probe = spinand_probe,
+	.remove = spinand_remove,
+};
+module_spi_mem_driver(spinand_drv);
+
+MODULE_DESCRIPTION("SPI NAND framework");
+MODULE_AUTHOR("Peter Pan<peterpandong@micron.com>");
+MODULE_LICENSE("GPL v2");
+#endif /* __UBOOT__ */
+
+static const struct udevice_id spinand_ids[] = {
+	{ .compatible = "spi-nand" },
+	{ /* sentinel */ },
+};
+
+U_BOOT_DRIVER(spinand) = {
+	.name = "spi_nand",
+	.id = UCLASS_MTD,
+	.of_match = spinand_ids,
+	.priv_auto_alloc_size = sizeof(struct spinand_device),
+	.probe = spinand_probe,
+};
diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
new file mode 100644
index 0000000000..ad59fc01ef
--- /dev/null
+++ b/include/linux/mtd/spinand.h
@@ -0,0 +1,427 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2016-2017 Micron Technology, Inc.
+ *
+ *  Authors:
+ *	Peter Pan <peterpandong@micron.com>
+ */
+#ifndef __LINUX_MTD_SPINAND_H
+#define __LINUX_MTD_SPINAND_H
+
+#ifndef __UBOOT__
+#include <linux/mutex.h>
+#include <linux/bitops.h>
+#include <linux/device.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/nand.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/spi-mem.h>
+#else
+#include <common.h>
+#include <spi.h>
+#include <spi-mem.h>
+#include <linux/mtd/nand.h>
+#endif
+
+/**
+ * Standard SPI NAND flash operations
+ */
+
+#define SPINAND_RESET_OP						\
+	SPI_MEM_OP(SPI_MEM_OP_CMD(0xff, 1),				\
+		   SPI_MEM_OP_NO_ADDR,					\
+		   SPI_MEM_OP_NO_DUMMY,					\
+		   SPI_MEM_OP_NO_DATA)
+
+#define SPINAND_WR_EN_DIS_OP(enable)					\
+	SPI_MEM_OP(SPI_MEM_OP_CMD((enable) ? 0x06 : 0x04, 1),		\
+		   SPI_MEM_OP_NO_ADDR,					\
+		   SPI_MEM_OP_NO_DUMMY,					\
+		   SPI_MEM_OP_NO_DATA)
+
+#define SPINAND_READID_OP(ndummy, buf, len)				\
+	SPI_MEM_OP(SPI_MEM_OP_CMD(0x9f, 1),				\
+		   SPI_MEM_OP_NO_ADDR,					\
+		   SPI_MEM_OP_DUMMY(ndummy, 1),				\
+		   SPI_MEM_OP_DATA_IN(len, buf, 1))
+
+#define SPINAND_SET_FEATURE_OP(reg, valptr)				\
+	SPI_MEM_OP(SPI_MEM_OP_CMD(0x1f, 1),				\
+		   SPI_MEM_OP_ADDR(1, reg, 1),				\
+		   SPI_MEM_OP_NO_DUMMY,					\
+		   SPI_MEM_OP_DATA_OUT(1, valptr, 1))
+
+#define SPINAND_GET_FEATURE_OP(reg, valptr)				\
+	SPI_MEM_OP(SPI_MEM_OP_CMD(0x0f, 1),				\
+		   SPI_MEM_OP_ADDR(1, reg, 1),				\
+		   SPI_MEM_OP_NO_DUMMY,					\
+		   SPI_MEM_OP_DATA_IN(1, valptr, 1))
+
+#define SPINAND_BLK_ERASE_OP(addr)					\
+	SPI_MEM_OP(SPI_MEM_OP_CMD(0xd8, 1),				\
+		   SPI_MEM_OP_ADDR(3, addr, 1),				\
+		   SPI_MEM_OP_NO_DUMMY,					\
+		   SPI_MEM_OP_NO_DATA)
+
+#define SPINAND_PAGE_READ_OP(addr)					\
+	SPI_MEM_OP(SPI_MEM_OP_CMD(0x13, 1),				\
+		   SPI_MEM_OP_ADDR(3, addr, 1),				\
+		   SPI_MEM_OP_NO_DUMMY,					\
+		   SPI_MEM_OP_NO_DATA)
+
+#define SPINAND_PAGE_READ_FROM_CACHE_OP(fast, addr, ndummy, buf, len)	\
+	SPI_MEM_OP(SPI_MEM_OP_CMD(fast ? 0x0b : 0x03, 1),		\
+		   SPI_MEM_OP_ADDR(2, addr, 1),				\
+		   SPI_MEM_OP_DUMMY(ndummy, 1),				\
+		   SPI_MEM_OP_DATA_IN(len, buf, 1))
+
+#define SPINAND_PAGE_READ_FROM_CACHE_X2_OP(addr, ndummy, buf, len)	\
+	SPI_MEM_OP(SPI_MEM_OP_CMD(0x3b, 1),				\
+		   SPI_MEM_OP_ADDR(2, addr, 1),				\
+		   SPI_MEM_OP_DUMMY(ndummy, 1),				\
+		   SPI_MEM_OP_DATA_IN(len, buf, 2))
+
+#define SPINAND_PAGE_READ_FROM_CACHE_X4_OP(addr, ndummy, buf, len)	\
+	SPI_MEM_OP(SPI_MEM_OP_CMD(0x6b, 1),				\
+		   SPI_MEM_OP_ADDR(2, addr, 1),				\
+		   SPI_MEM_OP_DUMMY(ndummy, 1),				\
+		   SPI_MEM_OP_DATA_IN(len, buf, 4))
+
+#define SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(addr, ndummy, buf, len)	\
+	SPI_MEM_OP(SPI_MEM_OP_CMD(0xbb, 1),				\
+		   SPI_MEM_OP_ADDR(2, addr, 2),				\
+		   SPI_MEM_OP_DUMMY(ndummy, 2),				\
+		   SPI_MEM_OP_DATA_IN(len, buf, 2))
+
+#define SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(addr, ndummy, buf, len)	\
+	SPI_MEM_OP(SPI_MEM_OP_CMD(0xeb, 1),				\
+		   SPI_MEM_OP_ADDR(2, addr, 4),				\
+		   SPI_MEM_OP_DUMMY(ndummy, 4),				\
+		   SPI_MEM_OP_DATA_IN(len, buf, 4))
+
+#define SPINAND_PROG_EXEC_OP(addr)					\
+	SPI_MEM_OP(SPI_MEM_OP_CMD(0x10, 1),				\
+		   SPI_MEM_OP_ADDR(3, addr, 1),				\
+		   SPI_MEM_OP_NO_DUMMY,					\
+		   SPI_MEM_OP_NO_DATA)
+
+#define SPINAND_PROG_LOAD(reset, addr, buf, len)			\
+	SPI_MEM_OP(SPI_MEM_OP_CMD(reset ? 0x02 : 0x84, 1),		\
+		   SPI_MEM_OP_ADDR(2, addr, 1),				\
+		   SPI_MEM_OP_NO_DUMMY,					\
+		   SPI_MEM_OP_DATA_OUT(len, buf, 1))
+
+#define SPINAND_PROG_LOAD_X4(reset, addr, buf, len)			\
+	SPI_MEM_OP(SPI_MEM_OP_CMD(reset ? 0x32 : 0x34, 1),		\
+		   SPI_MEM_OP_ADDR(2, addr, 1),				\
+		   SPI_MEM_OP_NO_DUMMY,					\
+		   SPI_MEM_OP_DATA_OUT(len, buf, 4))
+
+/**
+ * Standard SPI NAND flash commands
+ */
+#define SPINAND_CMD_PROG_LOAD_X4		0x32
+#define SPINAND_CMD_PROG_LOAD_RDM_DATA_X4	0x34
+
+/* feature register */
+#define REG_BLOCK_LOCK		0xa0
+#define BL_ALL_UNLOCKED		0x00
+
+/* configuration register */
+#define REG_CFG			0xb0
+#define CFG_OTP_ENABLE		BIT(6)
+#define CFG_ECC_ENABLE		BIT(4)
+#define CFG_QUAD_ENABLE		BIT(0)
+
+/* status register */
+#define REG_STATUS		0xc0
+#define STATUS_BUSY		BIT(0)
+#define STATUS_ERASE_FAILED	BIT(2)
+#define STATUS_PROG_FAILED	BIT(3)
+#define STATUS_ECC_MASK		GENMASK(5, 4)
+#define STATUS_ECC_NO_BITFLIPS	(0 << 4)
+#define STATUS_ECC_HAS_BITFLIPS	(1 << 4)
+#define STATUS_ECC_UNCOR_ERROR	(2 << 4)
+
+struct spinand_op;
+struct spinand_device;
+
+#define SPINAND_MAX_ID_LEN	4
+
+/**
+ * struct spinand_id - SPI NAND id structure
+ * @data: buffer containing the id bytes. Currently 4 bytes large, but can
+ *	  be extended if required
+ * @len: ID length
+ *
+ * struct_spinand_id->data contains all bytes returned after a READ_ID command,
+ * including dummy bytes if the chip does not emit ID bytes right after the
+ * READ_ID command. The responsibility to extract real ID bytes is left to
+ * struct_manufacurer_ops->detect().
+ */
+struct spinand_id {
+	u8 data[SPINAND_MAX_ID_LEN];
+	int len;
+};
+
+/**
+ * struct manufacurer_ops - SPI NAND manufacturer specific operations
+ * @detect: detect a SPI NAND device. Every time a SPI NAND device is probed
+ *	    the core calls the struct_manufacurer_ops->detect() hook of each
+ *	    registered manufacturer until one of them return 1. Note that
+ *	    the first thing to check in this hook is that the manufacturer ID
+ *	    in struct_spinand_device->id matches the manufacturer whose
+ *	    ->detect() hook has been called. Should return 1 if there's a
+ *	    match, 0 if the manufacturer ID does not match and a negative
+ *	    error code otherwise. When true is returned, the core assumes
+ *	    that properties of the NAND chip (spinand->base.memorg and
+ *	    spinand->base.eccreq) have been filled
+ * @init: initialize a SPI NAND device
+ * @cleanup: cleanup a SPI NAND device
+ *
+ * Each SPI NAND manufacturer driver should implement this interface so that
+ * NAND chips coming from this vendor can be detected and initialized properly.
+ */
+struct spinand_manufacturer_ops {
+	int (*detect)(struct spinand_device *spinand);
+	int (*init)(struct spinand_device *spinand);
+	void (*cleanup)(struct spinand_device *spinand);
+};
+
+/**
+ * struct spinand_manufacturer - SPI NAND manufacturer instance
+ * @id: manufacturer ID
+ * @name: manufacturer name
+ * @ops: manufacturer operations
+ */
+struct spinand_manufacturer {
+	u8 id;
+	char *name;
+	const struct spinand_manufacturer_ops *ops;
+};
+
+/**
+ * struct spinand_op_variants - SPI NAND operation variants
+ * @ops: the list of variants for a given operation
+ * @nops: the number of variants
+ *
+ * Some operations like read-from-cache/write-to-cache have several variants
+ * depending on the number of IO lines you use to transfer data or address
+ * cycles. This structure is a way to describe the different variants supported
+ * by a chip and let the core pick the best one based on the SPI mem controller
+ * capabilities.
+ */
+struct spinand_op_variants {
+	const struct spi_mem_op *ops;
+	unsigned int nops;
+};
+
+#define SPINAND_OP_VARIANTS(name, ...)					\
+	const struct spinand_op_variants name = {			\
+		.ops = (struct spi_mem_op[]) { __VA_ARGS__ },		\
+		.nops = sizeof((struct spi_mem_op[]){ __VA_ARGS__ }) /	\
+			sizeof(struct spi_mem_op),			\
+	}
+
+/**
+ * spinand_ecc_info - description of the on-die ECC implemented by a SPI NAND
+ *		      chip
+ * @get_status: get the ECC status. Should return a positive number encoding
+ *		the number of corrected bitflips if correction was possible or
+ *		-EBADMSG if there are uncorrectable errors. I can also return
+ *		other negative error codes if the error is not caused by
+ *		uncorrectable bitflips
+ * @ooblayout: the OOB layout used by the on-die ECC implementation
+ */
+struct spinand_ecc_info {
+	int (*get_status)(struct spinand_device *spinand, u8 status);
+	const struct mtd_ooblayout_ops *ooblayout;
+};
+
+#define SPINAND_HAS_QE_BIT		BIT(0)
+
+/**
+ * struct spinand_info - Structure used to describe SPI NAND chips
+ * @model: model name
+ * @devid: device ID
+ * @flags: OR-ing of the SPINAND_XXX flags
+ * @memorg: memory organization
+ * @eccreq: ECC requirements
+ * @eccinfo: on-die ECC info
+ * @op_variants: operations variants
+ * @op_variants.read_cache: variants of the read-cache operation
+ * @op_variants.write_cache: variants of the write-cache operation
+ * @op_variants.update_cache: variants of the update-cache operation
+ * @select_target: function used to select a target/die. Required only for
+ *		   multi-die chips
+ *
+ * Each SPI NAND manufacturer driver should have a spinand_info table
+ * describing all the chips supported by the driver.
+ */
+struct spinand_info {
+	const char *model;
+	u8 devid;
+	u32 flags;
+	struct nand_memory_organization memorg;
+	struct nand_ecc_req eccreq;
+	struct spinand_ecc_info eccinfo;
+	struct {
+		const struct spinand_op_variants *read_cache;
+		const struct spinand_op_variants *write_cache;
+		const struct spinand_op_variants *update_cache;
+	} op_variants;
+	int (*select_target)(struct spinand_device *spinand,
+			     unsigned int target);
+};
+
+#define SPINAND_INFO_OP_VARIANTS(__read, __write, __update)		\
+	{								\
+		.read_cache = __read,					\
+		.write_cache = __write,					\
+		.update_cache = __update,				\
+	}
+
+#define SPINAND_ECCINFO(__ooblayout, __get_status)			\
+	.eccinfo = {							\
+		.ooblayout = __ooblayout,				\
+		.get_status = __get_status,				\
+	}
+
+#define SPINAND_SELECT_TARGET(__func)					\
+	.select_target = __func,
+
+#define SPINAND_INFO(__model, __id, __memorg, __eccreq, __op_variants,	\
+		     __flags, ...)					\
+	{								\
+		.model = __model,					\
+		.devid = __id,						\
+		.memorg = __memorg,					\
+		.eccreq = __eccreq,					\
+		.op_variants = __op_variants,				\
+		.flags = __flags,					\
+		__VA_ARGS__						\
+	}
+
+/**
+ * struct spinand_device - SPI NAND device instance
+ * @base: NAND device instance
+ * @slave: pointer to the SPI slave object
+ * @lock: lock used to serialize accesses to the NAND
+ * @id: NAND ID as returned by READ_ID
+ * @flags: NAND flags
+ * @op_templates: various SPI mem op templates
+ * @op_templates.read_cache: read cache op template
+ * @op_templates.write_cache: write cache op template
+ * @op_templates.update_cache: update cache op template
+ * @select_target: select a specific target/die. Usually called before sending
+ *		   a command addressing a page or an eraseblock embedded in
+ *		   this die. Only required if your chip exposes several dies
+ * @cur_target: currently selected target/die
+ * @eccinfo: on-die ECC information
+ * @cfg_cache: config register cache. One entry per die
+ * @databuf: bounce buffer for data
+ * @oobbuf: bounce buffer for OOB data
+ * @scratchbuf: buffer used for everything but page accesses. This is needed
+ *		because the spi-mem interface explicitly requests that buffers
+ *		passed in spi_mem_op be DMA-able, so we can't based the bufs on
+ *		the stack
+ * @manufacturer: SPI NAND manufacturer information
+ * @priv: manufacturer private data
+ */
+struct spinand_device {
+	struct nand_device base;
+#ifndef __UBOOT__
+	struct spi_mem *spimem;
+	struct mutex lock;
+#else
+	struct spi_slave *slave;
+#endif
+	struct spinand_id id;
+	u32 flags;
+
+	struct {
+		const struct spi_mem_op *read_cache;
+		const struct spi_mem_op *write_cache;
+		const struct spi_mem_op *update_cache;
+	} op_templates;
+
+	int (*select_target)(struct spinand_device *spinand,
+			     unsigned int target);
+	unsigned int cur_target;
+
+	struct spinand_ecc_info eccinfo;
+
+	u8 *cfg_cache;
+	u8 *databuf;
+	u8 *oobbuf;
+	u8 *scratchbuf;
+	const struct spinand_manufacturer *manufacturer;
+	void *priv;
+};
+
+/**
+ * mtd_to_spinand() - Get the SPI NAND device attached to an MTD instance
+ * @mtd: MTD instance
+ *
+ * Return: the SPI NAND device attached to @mtd.
+ */
+static inline struct spinand_device *mtd_to_spinand(struct mtd_info *mtd)
+{
+	return container_of(mtd_to_nanddev(mtd), struct spinand_device, base);
+}
+
+/**
+ * spinand_to_mtd() - Get the MTD device embedded in a SPI NAND device
+ * @spinand: SPI NAND device
+ *
+ * Return: the MTD device embedded in @spinand.
+ */
+static inline struct mtd_info *spinand_to_mtd(struct spinand_device *spinand)
+{
+	return nanddev_to_mtd(&spinand->base);
+}
+
+/**
+ * nand_to_spinand() - Get the SPI NAND device embedding an NAND object
+ * @nand: NAND object
+ *
+ * Return: the SPI NAND device embedding @nand.
+ */
+static inline struct spinand_device *nand_to_spinand(struct nand_device *nand)
+{
+	return container_of(nand, struct spinand_device, base);
+}
+
+/**
+ * spinand_to_nand() - Get the NAND device embedded in a SPI NAND object
+ * @spinand: SPI NAND device
+ *
+ * Return: the NAND device embedded in @spinand.
+ */
+static inline struct nand_device *
+spinand_to_nand(struct spinand_device *spinand)
+{
+	return &spinand->base;
+}
+
+/**
+ * spinand_set_of_node - Attach a DT node to a SPI NAND device
+ * @spinand: SPI NAND device
+ * @np: DT node
+ *
+ * Attach a DT node to a SPI NAND device.
+ */
+static inline void spinand_set_of_node(struct spinand_device *spinand,
+				       const struct device_node *np)
+{
+	nanddev_set_of_node(&spinand->base, np);
+}
+
+int spinand_match_and_init(struct spinand_device *dev,
+			   const struct spinand_info *table,
+			   unsigned int table_size, u8 devid);
+
+int spinand_upd_cfg(struct spinand_device *spinand, u8 mask, u8 val);
+int spinand_select_target(struct spinand_device *spinand, unsigned int target);
+
+#endif /* __LINUX_MTD_SPINAND_H */

commit ed99f7731a5a40a9638c4b4e603f3caebef05913
Author: Boris Brezillon <boris.brezillon@bootlin.com>
Date:   Thu Aug 16 17:30:09 2018 +0200

    UPSTREAM: mtd: nand: Add core infrastructure to deal with NAND devices
    
    Add an intermediate layer to abstract NAND device interface so that
    some logic can be shared between SPI NANDs, parallel/raw NANDs,
    OneNANDs, ...
    
    Change-Id: I0c2b2e3ddae912756a35aac2741dd1ce8a243b35
    Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Acked-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit b95db8d33a1e920801816e47ffc5c6f18acce024)

diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 6d53734718..1c1a1f487e 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -1 +1,4 @@
+config MTD_NAND_CORE
+	tristate
+
 source "drivers/mtd/nand/raw/Kconfig"
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 69f40d1563..cd492dbc14 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -1,2 +1,4 @@
 # SPDX-License-Identifier: GPL-2.0+
 
+nandcore-objs := core.o bbt.o
+obj-$(CONFIG_MTD_NAND_CORE) += nandcore.o
diff --git a/drivers/mtd/nand/bbt.c b/drivers/mtd/nand/bbt.c
new file mode 100644
index 0000000000..7e0ad3190c
--- /dev/null
+++ b/drivers/mtd/nand/bbt.c
@@ -0,0 +1,132 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2017 Free Electrons
+ *
+ * Authors:
+ *	Boris Brezillon <boris.brezillon@free-electrons.com>
+ *	Peter Pan <peterpandong@micron.com>
+ */
+
+#define pr_fmt(fmt)	"nand-bbt: " fmt
+
+#include <linux/mtd/nand.h>
+#ifndef __UBOOT__
+#include <linux/slab.h>
+#endif
+
+/**
+ * nanddev_bbt_init() - Initialize the BBT (Bad Block Table)
+ * @nand: NAND device
+ *
+ * Initialize the in-memory BBT.
+ *
+ * Return: 0 in case of success, a negative error code otherwise.
+ */
+int nanddev_bbt_init(struct nand_device *nand)
+{
+	unsigned int bits_per_block = fls(NAND_BBT_BLOCK_NUM_STATUS);
+	unsigned int nblocks = nanddev_neraseblocks(nand);
+	unsigned int nwords = DIV_ROUND_UP(nblocks * bits_per_block,
+					   BITS_PER_LONG);
+
+	nand->bbt.cache = kzalloc(nwords, GFP_KERNEL);
+	if (!nand->bbt.cache)
+		return -ENOMEM;
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(nanddev_bbt_init);
+
+/**
+ * nanddev_bbt_cleanup() - Cleanup the BBT (Bad Block Table)
+ * @nand: NAND device
+ *
+ * Undoes what has been done in nanddev_bbt_init()
+ */
+void nanddev_bbt_cleanup(struct nand_device *nand)
+{
+	kfree(nand->bbt.cache);
+}
+EXPORT_SYMBOL_GPL(nanddev_bbt_cleanup);
+
+/**
+ * nanddev_bbt_update() - Update a BBT
+ * @nand: nand device
+ *
+ * Update the BBT. Currently a NOP function since on-flash bbt is not yet
+ * supported.
+ *
+ * Return: 0 in case of success, a negative error code otherwise.
+ */
+int nanddev_bbt_update(struct nand_device *nand)
+{
+	return 0;
+}
+EXPORT_SYMBOL_GPL(nanddev_bbt_update);
+
+/**
+ * nanddev_bbt_get_block_status() - Return the status of an eraseblock
+ * @nand: nand device
+ * @entry: the BBT entry
+ *
+ * Return: a positive number nand_bbt_block_status status or -%ERANGE if @entry
+ *	   is bigger than the BBT size.
+ */
+int nanddev_bbt_get_block_status(const struct nand_device *nand,
+				 unsigned int entry)
+{
+	unsigned int bits_per_block = fls(NAND_BBT_BLOCK_NUM_STATUS);
+	unsigned long *pos = nand->bbt.cache +
+			     ((entry * bits_per_block) / BITS_PER_LONG);
+	unsigned int offs = (entry * bits_per_block) % BITS_PER_LONG;
+	unsigned long status;
+
+	if (entry >= nanddev_neraseblocks(nand))
+		return -ERANGE;
+
+	status = pos[0] >> offs;
+	if (bits_per_block + offs > BITS_PER_LONG)
+		status |= pos[1] << (BITS_PER_LONG - offs);
+
+	return status & GENMASK(bits_per_block - 1, 0);
+}
+EXPORT_SYMBOL_GPL(nanddev_bbt_get_block_status);
+
+/**
+ * nanddev_bbt_set_block_status() - Update the status of an eraseblock in the
+ *				    in-memory BBT
+ * @nand: nand device
+ * @entry: the BBT entry to update
+ * @status: the new status
+ *
+ * Update an entry of the in-memory BBT. If you want to push the updated BBT
+ * the NAND you should call nanddev_bbt_update().
+ *
+ * Return: 0 in case of success or -%ERANGE if @entry is bigger than the BBT
+ *	   size.
+ */
+int nanddev_bbt_set_block_status(struct nand_device *nand, unsigned int entry,
+				 enum nand_bbt_block_status status)
+{
+	unsigned int bits_per_block = fls(NAND_BBT_BLOCK_NUM_STATUS);
+	unsigned long *pos = nand->bbt.cache +
+			     ((entry * bits_per_block) / BITS_PER_LONG);
+	unsigned int offs = (entry * bits_per_block) % BITS_PER_LONG;
+	unsigned long val = status & GENMASK(bits_per_block - 1, 0);
+
+	if (entry >= nanddev_neraseblocks(nand))
+		return -ERANGE;
+
+	pos[0] &= ~GENMASK(offs + bits_per_block - 1, offs);
+	pos[0] |= val << offs;
+
+	if (bits_per_block + offs > BITS_PER_LONG) {
+		unsigned int rbits = bits_per_block + offs - BITS_PER_LONG;
+
+		pos[1] &= ~GENMASK(rbits - 1, 0);
+		pos[1] |= val >> rbits;
+	}
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(nanddev_bbt_set_block_status);
diff --git a/drivers/mtd/nand/core.c b/drivers/mtd/nand/core.c
new file mode 100644
index 0000000000..0b793695cc
--- /dev/null
+++ b/drivers/mtd/nand/core.c
@@ -0,0 +1,243 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2017 Free Electrons
+ *
+ * Authors:
+ *	Boris Brezillon <boris.brezillon@free-electrons.com>
+ *	Peter Pan <peterpandong@micron.com>
+ */
+
+#define pr_fmt(fmt)	"nand: " fmt
+
+#ifndef __UBOOT__
+#include <linux/module.h>
+#endif
+#include <linux/mtd/nand.h>
+
+/**
+ * nanddev_isbad() - Check if a block is bad
+ * @nand: NAND device
+ * @pos: position pointing to the block we want to check
+ *
+ * Return: true if the block is bad, false otherwise.
+ */
+bool nanddev_isbad(struct nand_device *nand, const struct nand_pos *pos)
+{
+	if (nanddev_bbt_is_initialized(nand)) {
+		unsigned int entry;
+		int status;
+
+		entry = nanddev_bbt_pos_to_entry(nand, pos);
+		status = nanddev_bbt_get_block_status(nand, entry);
+		/* Lazy block status retrieval */
+		if (status == NAND_BBT_BLOCK_STATUS_UNKNOWN) {
+			if (nand->ops->isbad(nand, pos))
+				status = NAND_BBT_BLOCK_FACTORY_BAD;
+			else
+				status = NAND_BBT_BLOCK_GOOD;
+
+			nanddev_bbt_set_block_status(nand, entry, status);
+		}
+
+		if (status == NAND_BBT_BLOCK_WORN ||
+		    status == NAND_BBT_BLOCK_FACTORY_BAD)
+			return true;
+
+		return false;
+	}
+
+	return nand->ops->isbad(nand, pos);
+}
+EXPORT_SYMBOL_GPL(nanddev_isbad);
+
+/**
+ * nanddev_markbad() - Mark a block as bad
+ * @nand: NAND device
+ * @pos: position of the block to mark bad
+ *
+ * Mark a block bad. This function is updating the BBT if available and
+ * calls the low-level markbad hook (nand->ops->markbad()).
+ *
+ * Return: 0 in case of success, a negative error code otherwise.
+ */
+int nanddev_markbad(struct nand_device *nand, const struct nand_pos *pos)
+{
+	struct mtd_info *mtd = nanddev_to_mtd(nand);
+	unsigned int entry;
+	int ret = 0;
+
+	if (nanddev_isbad(nand, pos))
+		return 0;
+
+	ret = nand->ops->markbad(nand, pos);
+	if (ret)
+		pr_warn("failed to write BBM to block @%llx (err = %d)\n",
+			nanddev_pos_to_offs(nand, pos), ret);
+
+	if (!nanddev_bbt_is_initialized(nand))
+		goto out;
+
+	entry = nanddev_bbt_pos_to_entry(nand, pos);
+	ret = nanddev_bbt_set_block_status(nand, entry, NAND_BBT_BLOCK_WORN);
+	if (ret)
+		goto out;
+
+	ret = nanddev_bbt_update(nand);
+
+out:
+	if (!ret)
+		mtd->ecc_stats.badblocks++;
+
+	return ret;
+}
+EXPORT_SYMBOL_GPL(nanddev_markbad);
+
+/**
+ * nanddev_isreserved() - Check whether an eraseblock is reserved or not
+ * @nand: NAND device
+ * @pos: NAND position to test
+ *
+ * Checks whether the eraseblock pointed by @pos is reserved or not.
+ *
+ * Return: true if the eraseblock is reserved, false otherwise.
+ */
+bool nanddev_isreserved(struct nand_device *nand, const struct nand_pos *pos)
+{
+	unsigned int entry;
+	int status;
+
+	if (!nanddev_bbt_is_initialized(nand))
+		return false;
+
+	/* Return info from the table */
+	entry = nanddev_bbt_pos_to_entry(nand, pos);
+	status = nanddev_bbt_get_block_status(nand, entry);
+	return status == NAND_BBT_BLOCK_RESERVED;
+}
+EXPORT_SYMBOL_GPL(nanddev_isreserved);
+
+/**
+ * nanddev_erase() - Erase a NAND portion
+ * @nand: NAND device
+ * @pos: position of the block to erase
+ *
+ * Erases the block if it's not bad.
+ *
+ * Return: 0 in case of success, a negative error code otherwise.
+ */
+int nanddev_erase(struct nand_device *nand, const struct nand_pos *pos)
+{
+	if (nanddev_isbad(nand, pos) || nanddev_isreserved(nand, pos)) {
+		pr_warn("attempt to erase a bad/reserved block @%llx\n",
+			nanddev_pos_to_offs(nand, pos));
+		return -EIO;
+	}
+
+	return nand->ops->erase(nand, pos);
+}
+EXPORT_SYMBOL_GPL(nanddev_erase);
+
+/**
+ * nanddev_mtd_erase() - Generic mtd->_erase() implementation for NAND devices
+ * @mtd: MTD device
+ * @einfo: erase request
+ *
+ * This is a simple mtd->_erase() implementation iterating over all blocks
+ * concerned by @einfo and calling nand->ops->erase() on each of them.
+ *
+ * Note that mtd->_erase should not be directly assigned to this helper,
+ * because there's no locking here. NAND specialized layers should instead
+ * implement there own wrapper around nanddev_mtd_erase() taking the
+ * appropriate lock before calling nanddev_mtd_erase().
+ *
+ * Return: 0 in case of success, a negative error code otherwise.
+ */
+int nanddev_mtd_erase(struct mtd_info *mtd, struct erase_info *einfo)
+{
+	struct nand_device *nand = mtd_to_nanddev(mtd);
+	struct nand_pos pos, last;
+	int ret;
+
+	nanddev_offs_to_pos(nand, einfo->addr, &pos);
+	nanddev_offs_to_pos(nand, einfo->addr + einfo->len - 1, &last);
+	while (nanddev_pos_cmp(&pos, &last) <= 0) {
+		ret = nanddev_erase(nand, &pos);
+		if (ret) {
+			einfo->fail_addr = nanddev_pos_to_offs(nand, &pos);
+
+			return ret;
+		}
+
+		nanddev_pos_next_eraseblock(nand, &pos);
+	}
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(nanddev_mtd_erase);
+
+/**
+ * nanddev_init() - Initialize a NAND device
+ * @nand: NAND device
+ * @ops: NAND device operations
+ * @owner: NAND device owner
+ *
+ * Initializes a NAND device object. Consistency checks are done on @ops and
+ * @nand->memorg. Also takes care of initializing the BBT.
+ *
+ * Return: 0 in case of success, a negative error code otherwise.
+ */
+int nanddev_init(struct nand_device *nand, const struct nand_ops *ops,
+		 struct module *owner)
+{
+	struct mtd_info *mtd = nanddev_to_mtd(nand);
+	struct nand_memory_organization *memorg = nanddev_get_memorg(nand);
+
+	if (!nand || !ops)
+		return -EINVAL;
+
+	if (!ops->erase || !ops->markbad || !ops->isbad)
+		return -EINVAL;
+
+	if (!memorg->bits_per_cell || !memorg->pagesize ||
+	    !memorg->pages_per_eraseblock || !memorg->eraseblocks_per_lun ||
+	    !memorg->planes_per_lun || !memorg->luns_per_target ||
+	    !memorg->ntargets)
+		return -EINVAL;
+
+	nand->rowconv.eraseblock_addr_shift =
+					fls(memorg->pages_per_eraseblock - 1);
+	nand->rowconv.lun_addr_shift = fls(memorg->eraseblocks_per_lun - 1) +
+				       nand->rowconv.eraseblock_addr_shift;
+
+	nand->ops = ops;
+
+	mtd->type = memorg->bits_per_cell == 1 ?
+		    MTD_NANDFLASH : MTD_MLCNANDFLASH;
+	mtd->flags = MTD_CAP_NANDFLASH;
+	mtd->erasesize = memorg->pagesize * memorg->pages_per_eraseblock;
+	mtd->writesize = memorg->pagesize;
+	mtd->writebufsize = memorg->pagesize;
+	mtd->oobsize = memorg->oobsize;
+	mtd->size = nanddev_size(nand);
+	mtd->owner = owner;
+
+	return nanddev_bbt_init(nand);
+}
+EXPORT_SYMBOL_GPL(nanddev_init);
+
+/**
+ * nanddev_cleanup() - Release resources allocated in nanddev_init()
+ * @nand: NAND device
+ *
+ * Basically undoes what has been done in nanddev_init().
+ */
+void nanddev_cleanup(struct nand_device *nand)
+{
+	if (nanddev_bbt_is_initialized(nand))
+		nanddev_bbt_cleanup(nand);
+}
+EXPORT_SYMBOL_GPL(nanddev_cleanup);
+
+MODULE_DESCRIPTION("Generic NAND framework");
+MODULE_AUTHOR("Boris Brezillon <boris.brezillon@free-electrons.com>");
+MODULE_LICENSE("GPL v2");
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
new file mode 100644
index 0000000000..ada7af4a41
--- /dev/null
+++ b/include/linux/mtd/nand.h
@@ -0,0 +1,731 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ *  Copyright 2017 - Free Electrons
+ *
+ *  Authors:
+ *	Boris Brezillon <boris.brezillon@free-electrons.com>
+ *	Peter Pan <peterpandong@micron.com>
+ */
+
+#ifndef __LINUX_MTD_NAND_H
+#define __LINUX_MTD_NAND_H
+
+#include <linux/mtd/mtd.h>
+
+/**
+ * struct nand_memory_organization - Memory organization structure
+ * @bits_per_cell: number of bits per NAND cell
+ * @pagesize: page size
+ * @oobsize: OOB area size
+ * @pages_per_eraseblock: number of pages per eraseblock
+ * @eraseblocks_per_lun: number of eraseblocks per LUN (Logical Unit Number)
+ * @planes_per_lun: number of planes per LUN
+ * @luns_per_target: number of LUN per target (target is a synonym for die)
+ * @ntargets: total number of targets exposed by the NAND device
+ */
+struct nand_memory_organization {
+	unsigned int bits_per_cell;
+	unsigned int pagesize;
+	unsigned int oobsize;
+	unsigned int pages_per_eraseblock;
+	unsigned int eraseblocks_per_lun;
+	unsigned int planes_per_lun;
+	unsigned int luns_per_target;
+	unsigned int ntargets;
+};
+
+#define NAND_MEMORG(bpc, ps, os, ppe, epl, ppl, lpt, nt)	\
+	{							\
+		.bits_per_cell = (bpc),				\
+		.pagesize = (ps),				\
+		.oobsize = (os),				\
+		.pages_per_eraseblock = (ppe),			\
+		.eraseblocks_per_lun = (epl),			\
+		.planes_per_lun = (ppl),			\
+		.luns_per_target = (lpt),			\
+		.ntargets = (nt),				\
+	}
+
+/**
+ * struct nand_row_converter - Information needed to convert an absolute offset
+ *			       into a row address
+ * @lun_addr_shift: position of the LUN identifier in the row address
+ * @eraseblock_addr_shift: position of the eraseblock identifier in the row
+ *			   address
+ */
+struct nand_row_converter {
+	unsigned int lun_addr_shift;
+	unsigned int eraseblock_addr_shift;
+};
+
+/**
+ * struct nand_pos - NAND position object
+ * @target: the NAND target/die
+ * @lun: the LUN identifier
+ * @plane: the plane within the LUN
+ * @eraseblock: the eraseblock within the LUN
+ * @page: the page within the LUN
+ *
+ * These information are usually used by specific sub-layers to select the
+ * appropriate target/die and generate a row address to pass to the device.
+ */
+struct nand_pos {
+	unsigned int target;
+	unsigned int lun;
+	unsigned int plane;
+	unsigned int eraseblock;
+	unsigned int page;
+};
+
+/**
+ * struct nand_page_io_req - NAND I/O request object
+ * @pos: the position this I/O request is targeting
+ * @dataoffs: the offset within the page
+ * @datalen: number of data bytes to read from/write to this page
+ * @databuf: buffer to store data in or get data from
+ * @ooboffs: the OOB offset within the page
+ * @ooblen: the number of OOB bytes to read from/write to this page
+ * @oobbuf: buffer to store OOB data in or get OOB data from
+ *
+ * This object is used to pass per-page I/O requests to NAND sub-layers. This
+ * way all useful information are already formatted in a useful way and
+ * specific NAND layers can focus on translating these information into
+ * specific commands/operations.
+ */
+struct nand_page_io_req {
+	struct nand_pos pos;
+	unsigned int dataoffs;
+	unsigned int datalen;
+	union {
+		const void *out;
+		void *in;
+	} databuf;
+	unsigned int ooboffs;
+	unsigned int ooblen;
+	union {
+		const void *out;
+		void *in;
+	} oobbuf;
+};
+
+/**
+ * struct nand_ecc_req - NAND ECC requirements
+ * @strength: ECC strength
+ * @step_size: ECC step/block size
+ */
+struct nand_ecc_req {
+	unsigned int strength;
+	unsigned int step_size;
+};
+
+#define NAND_ECCREQ(str, stp) { .strength = (str), .step_size = (stp) }
+
+/**
+ * struct nand_bbt - bad block table object
+ * @cache: in memory BBT cache
+ */
+struct nand_bbt {
+	unsigned long *cache;
+};
+
+struct nand_device;
+
+/**
+ * struct nand_ops - NAND operations
+ * @erase: erase a specific block. No need to check if the block is bad before
+ *	   erasing, this has been taken care of by the generic NAND layer
+ * @markbad: mark a specific block bad. No need to check if the block is
+ *	     already marked bad, this has been taken care of by the generic
+ *	     NAND layer. This method should just write the BBM (Bad Block
+ *	     Marker) so that future call to struct_nand_ops->isbad() return
+ *	     true
+ * @isbad: check whether a block is bad or not. This method should just read
+ *	   the BBM and return whether the block is bad or not based on what it
+ *	   reads
+ *
+ * These are all low level operations that should be implemented by specialized
+ * NAND layers (SPI NAND, raw NAND, ...).
+ */
+struct nand_ops {
+	int (*erase)(struct nand_device *nand, const struct nand_pos *pos);
+	int (*markbad)(struct nand_device *nand, const struct nand_pos *pos);
+	bool (*isbad)(struct nand_device *nand, const struct nand_pos *pos);
+};
+
+/**
+ * struct nand_device - NAND device
+ * @mtd: MTD instance attached to the NAND device
+ * @memorg: memory layout
+ * @eccreq: ECC requirements
+ * @rowconv: position to row address converter
+ * @bbt: bad block table info
+ * @ops: NAND operations attached to the NAND device
+ *
+ * Generic NAND object. Specialized NAND layers (raw NAND, SPI NAND, OneNAND)
+ * should declare their own NAND object embedding a nand_device struct (that's
+ * how inheritance is done).
+ * struct_nand_device->memorg and struct_nand_device->eccreq should be filled
+ * at device detection time to reflect the NAND device
+ * capabilities/requirements. Once this is done nanddev_init() can be called.
+ * It will take care of converting NAND information into MTD ones, which means
+ * the specialized NAND layers should never manually tweak
+ * struct_nand_device->mtd except for the ->_read/write() hooks.
+ */
+struct nand_device {
+	struct mtd_info *mtd;
+	struct nand_memory_organization memorg;
+	struct nand_ecc_req eccreq;
+	struct nand_row_converter rowconv;
+	struct nand_bbt bbt;
+	const struct nand_ops *ops;
+};
+
+/**
+ * struct nand_io_iter - NAND I/O iterator
+ * @req: current I/O request
+ * @oobbytes_per_page: maximum number of OOB bytes per page
+ * @dataleft: remaining number of data bytes to read/write
+ * @oobleft: remaining number of OOB bytes to read/write
+ *
+ * Can be used by specialized NAND layers to iterate over all pages covered
+ * by an MTD I/O request, which should greatly simplifies the boiler-plate
+ * code needed to read/write data from/to a NAND device.
+ */
+struct nand_io_iter {
+	struct nand_page_io_req req;
+	unsigned int oobbytes_per_page;
+	unsigned int dataleft;
+	unsigned int oobleft;
+};
+
+/**
+ * mtd_to_nanddev() - Get the NAND device attached to the MTD instance
+ * @mtd: MTD instance
+ *
+ * Return: the NAND device embedding @mtd.
+ */
+static inline struct nand_device *mtd_to_nanddev(struct mtd_info *mtd)
+{
+	return mtd->priv;
+}
+
+/**
+ * nanddev_to_mtd() - Get the MTD device attached to a NAND device
+ * @nand: NAND device
+ *
+ * Return: the MTD device embedded in @nand.
+ */
+static inline struct mtd_info *nanddev_to_mtd(struct nand_device *nand)
+{
+	return nand->mtd;
+}
+
+/*
+ * nanddev_bits_per_cell() - Get the number of bits per cell
+ * @nand: NAND device
+ *
+ * Return: the number of bits per cell.
+ */
+static inline unsigned int nanddev_bits_per_cell(const struct nand_device *nand)
+{
+	return nand->memorg.bits_per_cell;
+}
+
+/**
+ * nanddev_page_size() - Get NAND page size
+ * @nand: NAND device
+ *
+ * Return: the page size.
+ */
+static inline size_t nanddev_page_size(const struct nand_device *nand)
+{
+	return nand->memorg.pagesize;
+}
+
+/**
+ * nanddev_per_page_oobsize() - Get NAND OOB size
+ * @nand: NAND device
+ *
+ * Return: the OOB size.
+ */
+static inline unsigned int
+nanddev_per_page_oobsize(const struct nand_device *nand)
+{
+	return nand->memorg.oobsize;
+}
+
+/**
+ * nanddev_pages_per_eraseblock() - Get the number of pages per eraseblock
+ * @nand: NAND device
+ *
+ * Return: the number of pages per eraseblock.
+ */
+static inline unsigned int
+nanddev_pages_per_eraseblock(const struct nand_device *nand)
+{
+	return nand->memorg.pages_per_eraseblock;
+}
+
+/**
+ * nanddev_per_page_oobsize() - Get NAND erase block size
+ * @nand: NAND device
+ *
+ * Return: the eraseblock size.
+ */
+static inline size_t nanddev_eraseblock_size(const struct nand_device *nand)
+{
+	return nand->memorg.pagesize * nand->memorg.pages_per_eraseblock;
+}
+
+/**
+ * nanddev_eraseblocks_per_lun() - Get the number of eraseblocks per LUN
+ * @nand: NAND device
+ *
+ * Return: the number of eraseblocks per LUN.
+ */
+static inline unsigned int
+nanddev_eraseblocks_per_lun(const struct nand_device *nand)
+{
+	return nand->memorg.eraseblocks_per_lun;
+}
+
+/**
+ * nanddev_target_size() - Get the total size provided by a single target/die
+ * @nand: NAND device
+ *
+ * Return: the total size exposed by a single target/die in bytes.
+ */
+static inline u64 nanddev_target_size(const struct nand_device *nand)
+{
+	return (u64)nand->memorg.luns_per_target *
+	       nand->memorg.eraseblocks_per_lun *
+	       nand->memorg.pages_per_eraseblock *
+	       nand->memorg.pagesize;
+}
+
+/**
+ * nanddev_ntarget() - Get the total of targets
+ * @nand: NAND device
+ *
+ * Return: the number of targets/dies exposed by @nand.
+ */
+static inline unsigned int nanddev_ntargets(const struct nand_device *nand)
+{
+	return nand->memorg.ntargets;
+}
+
+/**
+ * nanddev_neraseblocks() - Get the total number of erasablocks
+ * @nand: NAND device
+ *
+ * Return: the total number of eraseblocks exposed by @nand.
+ */
+static inline unsigned int nanddev_neraseblocks(const struct nand_device *nand)
+{
+	return (u64)nand->memorg.luns_per_target *
+	       nand->memorg.eraseblocks_per_lun *
+	       nand->memorg.pages_per_eraseblock;
+}
+
+/**
+ * nanddev_size() - Get NAND size
+ * @nand: NAND device
+ *
+ * Return: the total size (in bytes) exposed by @nand.
+ */
+static inline u64 nanddev_size(const struct nand_device *nand)
+{
+	return nanddev_target_size(nand) * nanddev_ntargets(nand);
+}
+
+/**
+ * nanddev_get_memorg() - Extract memory organization info from a NAND device
+ * @nand: NAND device
+ *
+ * This can be used by the upper layer to fill the memorg info before calling
+ * nanddev_init().
+ *
+ * Return: the memorg object embedded in the NAND device.
+ */
+static inline struct nand_memory_organization *
+nanddev_get_memorg(struct nand_device *nand)
+{
+	return &nand->memorg;
+}
+
+int nanddev_init(struct nand_device *nand, const struct nand_ops *ops,
+		 struct module *owner);
+void nanddev_cleanup(struct nand_device *nand);
+
+/**
+ * nanddev_register() - Register a NAND device
+ * @nand: NAND device
+ *
+ * Register a NAND device.
+ * This function is just a wrapper around mtd_device_register()
+ * registering the MTD device embedded in @nand.
+ *
+ * Return: 0 in case of success, a negative error code otherwise.
+ */
+static inline int nanddev_register(struct nand_device *nand)
+{
+	return mtd_device_register(nand->mtd, NULL, 0);
+}
+
+/**
+ * nanddev_unregister() - Unregister a NAND device
+ * @nand: NAND device
+ *
+ * Unregister a NAND device.
+ * This function is just a wrapper around mtd_device_unregister()
+ * unregistering the MTD device embedded in @nand.
+ *
+ * Return: 0 in case of success, a negative error code otherwise.
+ */
+static inline int nanddev_unregister(struct nand_device *nand)
+{
+	return mtd_device_unregister(nand->mtd);
+}
+
+/**
+ * nanddev_set_of_node() - Attach a DT node to a NAND device
+ * @nand: NAND device
+ * @np: DT node
+ *
+ * Attach a DT node to a NAND device.
+ */
+static inline void nanddev_set_of_node(struct nand_device *nand,
+				       const struct device_node *np)
+{
+	mtd_set_of_node(nand->mtd, np);
+}
+
+/**
+ * nanddev_get_of_node() - Retrieve the DT node attached to a NAND device
+ * @nand: NAND device
+ *
+ * Return: the DT node attached to @nand.
+ */
+static inline const struct device_node *nanddev_get_of_node(struct nand_device *nand)
+{
+	return mtd_get_of_node(nand->mtd);
+}
+
+/**
+ * nanddev_offs_to_pos() - Convert an absolute NAND offset into a NAND position
+ * @nand: NAND device
+ * @offs: absolute NAND offset (usually passed by the MTD layer)
+ * @pos: a NAND position object to fill in
+ *
+ * Converts @offs into a nand_pos representation.
+ *
+ * Return: the offset within the NAND page pointed by @pos.
+ */
+static inline unsigned int nanddev_offs_to_pos(struct nand_device *nand,
+					       loff_t offs,
+					       struct nand_pos *pos)
+{
+	unsigned int pageoffs;
+	u64 tmp = offs;
+
+	pageoffs = do_div(tmp, nand->memorg.pagesize);
+	pos->page = do_div(tmp, nand->memorg.pages_per_eraseblock);
+	pos->eraseblock = do_div(tmp, nand->memorg.eraseblocks_per_lun);
+	pos->plane = pos->eraseblock % nand->memorg.planes_per_lun;
+	pos->lun = do_div(tmp, nand->memorg.luns_per_target);
+	pos->target = tmp;
+
+	return pageoffs;
+}
+
+/**
+ * nanddev_pos_cmp() - Compare two NAND positions
+ * @a: First NAND position
+ * @b: Second NAND position
+ *
+ * Compares two NAND positions.
+ *
+ * Return: -1 if @a < @b, 0 if @a == @b and 1 if @a > @b.
+ */
+static inline int nanddev_pos_cmp(const struct nand_pos *a,
+				  const struct nand_pos *b)
+{
+	if (a->target != b->target)
+		return a->target < b->target ? -1 : 1;
+
+	if (a->lun != b->lun)
+		return a->lun < b->lun ? -1 : 1;
+
+	if (a->eraseblock != b->eraseblock)
+		return a->eraseblock < b->eraseblock ? -1 : 1;
+
+	if (a->page != b->page)
+		return a->page < b->page ? -1 : 1;
+
+	return 0;
+}
+
+/**
+ * nanddev_pos_to_offs() - Convert a NAND position into an absolute offset
+ * @nand: NAND device
+ * @pos: the NAND position to convert
+ *
+ * Converts @pos NAND position into an absolute offset.
+ *
+ * Return: the absolute offset. Note that @pos points to the beginning of a
+ *	   page, if one wants to point to a specific offset within this page
+ *	   the returned offset has to be adjusted manually.
+ */
+static inline loff_t nanddev_pos_to_offs(struct nand_device *nand,
+					 const struct nand_pos *pos)
+{
+	unsigned int npages;
+
+	npages = pos->page +
+		 ((pos->eraseblock +
+		   (pos->lun +
+		    (pos->target * nand->memorg.luns_per_target)) *
+		   nand->memorg.eraseblocks_per_lun) *
+		  nand->memorg.pages_per_eraseblock);
+
+	return (loff_t)npages * nand->memorg.pagesize;
+}
+
+/**
+ * nanddev_pos_to_row() - Extract a row address from a NAND position
+ * @nand: NAND device
+ * @pos: the position to convert
+ *
+ * Converts a NAND position into a row address that can then be passed to the
+ * device.
+ *
+ * Return: the row address extracted from @pos.
+ */
+static inline unsigned int nanddev_pos_to_row(struct nand_device *nand,
+					      const struct nand_pos *pos)
+{
+	return (pos->lun << nand->rowconv.lun_addr_shift) |
+	       (pos->eraseblock << nand->rowconv.eraseblock_addr_shift) |
+	       pos->page;
+}
+
+/**
+ * nanddev_pos_next_target() - Move a position to the next target/die
+ * @nand: NAND device
+ * @pos: the position to update
+ *
+ * Updates @pos to point to the start of the next target/die. Useful when you
+ * want to iterate over all targets/dies of a NAND device.
+ */
+static inline void nanddev_pos_next_target(struct nand_device *nand,
+					   struct nand_pos *pos)
+{
+	pos->page = 0;
+	pos->plane = 0;
+	pos->eraseblock = 0;
+	pos->lun = 0;
+	pos->target++;
+}
+
+/**
+ * nanddev_pos_next_lun() - Move a position to the next LUN
+ * @nand: NAND device
+ * @pos: the position to update
+ *
+ * Updates @pos to point to the start of the next LUN. Useful when you want to
+ * iterate over all LUNs of a NAND device.
+ */
+static inline void nanddev_pos_next_lun(struct nand_device *nand,
+					struct nand_pos *pos)
+{
+	if (pos->lun >= nand->memorg.luns_per_target - 1)
+		return nanddev_pos_next_target(nand, pos);
+
+	pos->lun++;
+	pos->page = 0;
+	pos->plane = 0;
+	pos->eraseblock = 0;
+}
+
+/**
+ * nanddev_pos_next_eraseblock() - Move a position to the next eraseblock
+ * @nand: NAND device
+ * @pos: the position to update
+ *
+ * Updates @pos to point to the start of the next eraseblock. Useful when you
+ * want to iterate over all eraseblocks of a NAND device.
+ */
+static inline void nanddev_pos_next_eraseblock(struct nand_device *nand,
+					       struct nand_pos *pos)
+{
+	if (pos->eraseblock >= nand->memorg.eraseblocks_per_lun - 1)
+		return nanddev_pos_next_lun(nand, pos);
+
+	pos->eraseblock++;
+	pos->page = 0;
+	pos->plane = pos->eraseblock % nand->memorg.planes_per_lun;
+}
+
+/**
+ * nanddev_pos_next_eraseblock() - Move a position to the next page
+ * @nand: NAND device
+ * @pos: the position to update
+ *
+ * Updates @pos to point to the start of the next page. Useful when you want to
+ * iterate over all pages of a NAND device.
+ */
+static inline void nanddev_pos_next_page(struct nand_device *nand,
+					 struct nand_pos *pos)
+{
+	if (pos->page >= nand->memorg.pages_per_eraseblock - 1)
+		return nanddev_pos_next_eraseblock(nand, pos);
+
+	pos->page++;
+}
+
+/**
+ * nand_io_iter_init - Initialize a NAND I/O iterator
+ * @nand: NAND device
+ * @offs: absolute offset
+ * @req: MTD request
+ * @iter: NAND I/O iterator
+ *
+ * Initializes a NAND iterator based on the information passed by the MTD
+ * layer.
+ */
+static inline void nanddev_io_iter_init(struct nand_device *nand,
+					loff_t offs, struct mtd_oob_ops *req,
+					struct nand_io_iter *iter)
+{
+	struct mtd_info *mtd = nanddev_to_mtd(nand);
+
+	iter->req.dataoffs = nanddev_offs_to_pos(nand, offs, &iter->req.pos);
+	iter->req.ooboffs = req->ooboffs;
+	iter->oobbytes_per_page = mtd_oobavail(mtd, req);
+	iter->dataleft = req->len;
+	iter->oobleft = req->ooblen;
+	iter->req.databuf.in = req->datbuf;
+	iter->req.datalen = min_t(unsigned int,
+				  nand->memorg.pagesize - iter->req.dataoffs,
+				  iter->dataleft);
+	iter->req.oobbuf.in = req->oobbuf;
+	iter->req.ooblen = min_t(unsigned int,
+				 iter->oobbytes_per_page - iter->req.ooboffs,
+				 iter->oobleft);
+}
+
+/**
+ * nand_io_iter_next_page - Move to the next page
+ * @nand: NAND device
+ * @iter: NAND I/O iterator
+ *
+ * Updates the @iter to point to the next page.
+ */
+static inline void nanddev_io_iter_next_page(struct nand_device *nand,
+					     struct nand_io_iter *iter)
+{
+	nanddev_pos_next_page(nand, &iter->req.pos);
+	iter->dataleft -= iter->req.datalen;
+	iter->req.databuf.in += iter->req.datalen;
+	iter->oobleft -= iter->req.ooblen;
+	iter->req.oobbuf.in += iter->req.ooblen;
+	iter->req.dataoffs = 0;
+	iter->req.ooboffs = 0;
+	iter->req.datalen = min_t(unsigned int, nand->memorg.pagesize,
+				  iter->dataleft);
+	iter->req.ooblen = min_t(unsigned int, iter->oobbytes_per_page,
+				 iter->oobleft);
+}
+
+/**
+ * nand_io_iter_end - Should end iteration or not
+ * @nand: NAND device
+ * @iter: NAND I/O iterator
+ *
+ * Check whether @iter has reached the end of the NAND portion it was asked to
+ * iterate on or not.
+ *
+ * Return: true if @iter has reached the end of the iteration request, false
+ *	   otherwise.
+ */
+static inline bool nanddev_io_iter_end(struct nand_device *nand,
+				       const struct nand_io_iter *iter)
+{
+	if (iter->dataleft || iter->oobleft)
+		return false;
+
+	return true;
+}
+
+/**
+ * nand_io_for_each_page - Iterate over all NAND pages contained in an MTD I/O
+ *			   request
+ * @nand: NAND device
+ * @start: start address to read/write from
+ * @req: MTD I/O request
+ * @iter: NAND I/O iterator
+ *
+ * Should be used for iterate over pages that are contained in an MTD request.
+ */
+#define nanddev_io_for_each_page(nand, start, req, iter)		\
+	for (nanddev_io_iter_init(nand, start, req, iter);		\
+	     !nanddev_io_iter_end(nand, iter);				\
+	     nanddev_io_iter_next_page(nand, iter))
+
+bool nanddev_isbad(struct nand_device *nand, const struct nand_pos *pos);
+bool nanddev_isreserved(struct nand_device *nand, const struct nand_pos *pos);
+int nanddev_erase(struct nand_device *nand, const struct nand_pos *pos);
+int nanddev_markbad(struct nand_device *nand, const struct nand_pos *pos);
+
+/* BBT related functions */
+enum nand_bbt_block_status {
+	NAND_BBT_BLOCK_STATUS_UNKNOWN,
+	NAND_BBT_BLOCK_GOOD,
+	NAND_BBT_BLOCK_WORN,
+	NAND_BBT_BLOCK_RESERVED,
+	NAND_BBT_BLOCK_FACTORY_BAD,
+	NAND_BBT_BLOCK_NUM_STATUS,
+};
+
+int nanddev_bbt_init(struct nand_device *nand);
+void nanddev_bbt_cleanup(struct nand_device *nand);
+int nanddev_bbt_update(struct nand_device *nand);
+int nanddev_bbt_get_block_status(const struct nand_device *nand,
+				 unsigned int entry);
+int nanddev_bbt_set_block_status(struct nand_device *nand, unsigned int entry,
+				 enum nand_bbt_block_status status);
+int nanddev_bbt_markbad(struct nand_device *nand, unsigned int block);
+
+/**
+ * nanddev_bbt_pos_to_entry() - Convert a NAND position into a BBT entry
+ * @nand: NAND device
+ * @pos: the NAND position we want to get BBT entry for
+ *
+ * Return the BBT entry used to store information about the eraseblock pointed
+ * by @pos.
+ *
+ * Return: the BBT entry storing information about eraseblock pointed by @pos.
+ */
+static inline unsigned int nanddev_bbt_pos_to_entry(struct nand_device *nand,
+						    const struct nand_pos *pos)
+{
+	return pos->eraseblock +
+	       ((pos->lun + (pos->target * nand->memorg.luns_per_target)) *
+		nand->memorg.eraseblocks_per_lun);
+}
+
+/**
+ * nanddev_bbt_is_initialized() - Check if the BBT has been initialized
+ * @nand: NAND device
+ *
+ * Return: true if the BBT has been initialized, false otherwise.
+ */
+static inline bool nanddev_bbt_is_initialized(struct nand_device *nand)
+{
+	return !!nand->bbt.cache;
+}
+
+/* MTD -> NAND helper functions. */
+int nanddev_mtd_erase(struct mtd_info *mtd, struct erase_info *einfo);
+
+#endif /* __LINUX_MTD_NAND_H */

commit 53bde89b0aa729086de9e36a9588ee331396203b
Author: Miquel Raynal <miquel.raynal@bootlin.com>
Date:   Thu Aug 16 17:30:08 2018 +0200

    UPSTREAM: mtd: rename nand into rawnand in Kconfig prompt
    
    Sync the Kconfig raw NAND entry title with the code architecture.
    
    Change-Id: I81c8cfd67b94c67ec6b5e3bf31b0df908c8a9fdb
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 3657b2f4a309ed2e527c805333f9485757912397)

diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index 1e4ea7bdd4..008f7b4b4b 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -1,6 +1,6 @@
 
 menuconfig NAND
-	bool "NAND Device Support"
+	bool "Raw NAND Device Support"
 if NAND
 
 config SYS_NAND_SELF_INIT

commit cfcc706c901d603707657919484e4f65467be9ff
Author: Miquel Raynal <miquel.raynal@bootlin.com>
Date:   Thu Aug 16 17:30:07 2018 +0200

    UPSTREAM: mtd: move NAND files into a raw/ subdirectory
    
    NAND flavors, like serial and parallel, have a lot in common and would
    benefit to share code. Let's move raw (parallel) NAND specific code in a
    raw/ subdirectory, to ease the addition of a core file in nand/ and the
    introduction of a spi/ subdirectory specific to SPI NANDs.
    
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Change-Id: Ibb56f85620c4798fb579be3e4e30438963b7c48b
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit a430fa06a4ac50e785fdbfb7f43c3cb14b35619c)

diff --git a/MAINTAINERS b/MAINTAINERS
index 7b11bc9e8d..a33e2bef60 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -224,14 +224,57 @@ N:	uniphier
 ARM ZYNQ
 M:	Michal Simek <monstr@monstr.eu>
 S:	Maintained
-F:	arch/arm/cpu/armv7/zynq/
-F:	arch/arm/include/asm/arch-zynq/
+T:	git git://git.denx.de/u-boot-microblaze.git
+F:	arch/arm/mach-zynq/
+F:	drivers/clk/clk_zynq.c
+F:	drivers/fpga/zynqpl.c
+F:	drivers/gpio/zynq_gpio.c
+F:	drivers/i2c/i2c-cdns.c
+F:	drivers/i2c/muxes/pca954x.c
+F:	drivers/i2c/zynq_i2c.c
+F:	drivers/mmc/zynq_sdhci.c
+F:	drivers/mtd/nand/raw/zynq_nand.c
+F:	drivers/net/phy/xilinx_phy.c
+F:	drivers/net/zynq_gem.c
+F:	drivers/serial/serial_zynq.c
+F:	drivers/spi/zynq_qspi.c
+F:	drivers/spi/zynq_spi.c
+F:	drivers/usb/host/ehci-zynq.c
+F:	drivers/watchdog/cdns_wdt.c
+F:	include/zynqpl.h
+F:	tools/zynqimage.c
+N:	zynq
 
 ARM ZYNQMP
 M:	Michal Simek <michal.simek@xilinx.com>
 S:	Maintained
 F:	arch/arm/cpu/armv8/zynqmp/
-F:	arch/arm/include/asm/arch-zynqmp/
+F:	drivers/clk/clk_zynqmp.c
+F:	drivers/fpga/zynqpl.c
+F:	drivers/gpio/zynq_gpio.c
+F:	drivers/i2c/i2c-cdns.c
+F:	drivers/i2c/muxes/pca954x.c
+F:	drivers/i2c/zynq_i2c.c
+F:	drivers/mmc/zynq_sdhci.c
+F:	drivers/mtd/nand/raw/zynq_nand.c
+F:	drivers/net/phy/xilinx_phy.c
+F:	drivers/net/zynq_gem.c
+F:	drivers/serial/serial_zynq.c
+F:	drivers/spi/zynq_qspi.c
+F:	drivers/spi/zynq_spi.c
+F:	drivers/timer/cadence-ttc.c
+F:	drivers/usb/host/ehci-zynq.c
+F:	drivers/watchdog/cdns_wdt.c
+F:	include/zynqmppl.h
+F:	tools/zynqmp*
+N:	ultra96
+N:	zynqmp
+
+ARM ZYNQMP R5
+M:	Michal Simek <michal.simek@xilinx.com>
+S:	Maintained
+T:	git git://git.denx.de/u-boot-microblaze.git
+F:	arch/arm/mach-zynqmp-r5/
 
 BUILDMAN
 M:	Simon Glass <sjg@chromium.org>
@@ -329,6 +372,37 @@ S:	Maintained
 T:	git git://git.denx.de/u-boot-mmc.git
 F:	drivers/mmc/
 
+NAND FLASH
+#M:	Scott Wood <oss@buserror.net>
+S:	Orphaned (Since 2018-07)
+T:	git git://git.denx.de/u-boot-nand-flash.git
+F:	drivers/mtd/nand/raw/
+
+NDS32
+M:	Macpaul Lin <macpaul@andestech.com>
+S:	Maintained
+T:	git git://git.denx.de/u-boot-nds32.git
+F:	arch/nds32/
+
+NETWORK
+M:	Joe Hershberger <joe.hershberger@ni.com>
+S:	Maintained
+T:	git git://git.denx.de/u-boot-net.git
+F:	drivers/net/
+F:	net/
+
+NIOS
+M:	Thomas Chou <thomas@wytron.com.tw>
+S:	Maintained
+T:	git git://git.denx.de/u-boot-nios.git
+F:	arch/nios2/
+
+ONENAND
+#M:	Lukasz Majewski <l.majewski@majess.pl>
+S:	Orphaned (Since 2017-01)
+T:	git git://git.denx.de/u-boot-onenand.git
+F:	drivers/mtd/onenand/
+
 PATMAN
 M:	Simon Glass <sjg@chromium.org>
 S:	Maintained
diff --git a/Makefile b/Makefile
index a2e1a09674..c60ad289ab 100644
--- a/Makefile
+++ b/Makefile
@@ -659,7 +659,7 @@ libs-y += drivers/dma/
 libs-y += drivers/gpio/
 libs-y += drivers/i2c/
 libs-y += drivers/mtd/
-libs-$(CONFIG_CMD_NAND) += drivers/mtd/nand/
+libs-$(CONFIG_CMD_NAND) += drivers/mtd/nand/raw/
 libs-y += drivers/mtd/onenand/
 libs-$(CONFIG_CMD_UBI) += drivers/mtd/ubi/
 libs-y += drivers/mtd/spi/
diff --git a/README b/README
index f6d745bb8e..196e9cb1b3 100644
--- a/README
+++ b/README
@@ -3492,8 +3492,8 @@ Low Level (hardware related) configuration options:
 		a 16 bit bus.
 		Not all NAND drivers use this symbol.
 		Example of drivers that use it:
-		- drivers/mtd/nand/ndfc.c
-		- drivers/mtd/nand/mxc_nand.c
+		- drivers/mtd/nand/raw/ndfc.c
+		- drivers/mtd/nand/raw/mxc_nand.c
 
 - CONFIG_SYS_NDFC_EBC0_CFG
 		Sets the EBC0_CFG register for the NDFC. If not defined
@@ -3613,7 +3613,7 @@ Low Level (hardware related) configuration options:
 - CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
 		Option to disable subpage write in NAND driver
 		driver that uses this:
-		drivers/mtd/nand/davinci_nand.c
+		drivers/mtd/nand/raw/davinci_nand.c
 
 Freescale QE/FMAN Firmware Support:
 -----------------------------------
diff --git a/arch/arm/mach-uniphier/board_late_init.c b/arch/arm/mach-uniphier/board_late_init.c
index 23b57c3a64..da43c6023c 100644
--- a/arch/arm/mach-uniphier/board_late_init.c
+++ b/arch/arm/mach-uniphier/board_late_init.c
@@ -11,7 +11,8 @@
 #include <linux/libfdt.h>
 #include <nand.h>
 #include <linux/io.h>
-#include <../drivers/mtd/nand/denali.h>
+#include <linux/printk.h>
+#include <../drivers/mtd/nand/raw/denali.h>
 
 #include "init.h"
 
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 317547792c..f248ffff45 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -458,7 +458,7 @@ config SPL_NAND_SUPPORT
 	help
 	  Enable support for NAND (Negative AND) flash in SPL. NAND flash
 	  can be used to allow SPL to load U-Boot from supported devices.
-	  This enables the drivers in drivers/mtd/nand as part of an SPL
+	  This enables the drivers in drivers/mtd/nand/raw as part of an SPL
 	  build.
 
 config SPL_NET_SUPPORT
diff --git a/common/spl/spl_spi.c b/common/spl/spl_spi.c
index 42880d56b9..16dee3a247 100644
--- a/common/spl/spl_spi.c
+++ b/common/spl/spl_spi.c
@@ -1,7 +1,7 @@
 /*
  * Copyright (C) 2011 OMICRON electronics GmbH
  *
- * based on drivers/mtd/nand/nand_spl_load.c
+ * based on drivers/mtd/nand/raw/nand_spl_load.c
  *
  * Copyright (C) 2011
  * Heiko Schocher, DENX Software Engineering, hs@denx.de.
diff --git a/doc/README.SPL b/doc/README.SPL
index 3ba313caa8..fc1ca1ad4f 100644
--- a/doc/README.SPL
+++ b/doc/README.SPL
@@ -57,11 +57,11 @@ CONFIG_SPL_FAT_SUPPORT (fs/fat/libfat.o)
 CONFIG_SPL_EXT_SUPPORT
 CONFIG_SPL_LIBGENERIC_SUPPORT (lib/libgeneric.o)
 CONFIG_SPL_POWER_SUPPORT (drivers/power/libpower.o)
-CONFIG_SPL_NAND_SUPPORT (drivers/mtd/nand/libnand.o)
+CONFIG_SPL_NAND_SUPPORT (drivers/mtd/nand/raw/libnand.o)
 CONFIG_SPL_DRIVERS_MISC_SUPPORT (drivers/misc)
 CONFIG_SPL_DMA_SUPPORT (drivers/dma/libdma.o)
 CONFIG_SPL_POST_MEM_SUPPORT (post/drivers/memory.o)
-CONFIG_SPL_NAND_LOAD (drivers/mtd/nand/nand_spl_load.o)
+CONFIG_SPL_NAND_LOAD (drivers/mtd/nand/raw/nand_spl_load.o)
 CONFIG_SPL_SPI_LOAD (drivers/mtd/spi/spi_spl_load.o)
 CONFIG_SPL_RAM_DEVICE (common/spl/spl.c)
 CONFIG_SPL_WATCHDOG_SUPPORT (drivers/watchdog/libwatchdog.o)
diff --git a/doc/README.arm-relocation b/doc/README.arm-relocation
index 645b3746c8..d2a7e8122e 100644
--- a/doc/README.arm-relocation
+++ b/doc/README.arm-relocation
@@ -84,7 +84,7 @@ Relocation with SPL (example for the tx25 booting from NAND Flash):
 - cpu copies the first page from NAND to 0xbb000000 (IMX_NFC_BASE)
   and start with code execution on this address.
 
-- The First page contains u-boot code from drivers/mtd/nand/mxc_nand_spl.c
+- The First page contains u-boot code from drivers/mtd/nand/raw/mxc_nand_spl.c
   which inits the dram, cpu registers, reloacte itself to CONFIG_SPL_TEXT_BASE	and loads
   the "real" u-boot to CONFIG_SYS_NAND_U_BOOT_DST and starts execution
   @CONFIG_SYS_NAND_U_BOOT_START
diff --git a/doc/README.nand b/doc/README.nand
index 362b8d8c9f..a1ef4ead7d 100644
--- a/doc/README.nand
+++ b/doc/README.nand
@@ -116,7 +116,7 @@ Configuration Options:
       The maximum number of NAND chips per device to be supported.
 
    CONFIG_SYS_NAND_SELF_INIT
-      Traditionally, glue code in drivers/mtd/nand/nand.c has driven
+      Traditionally, glue code in drivers/mtd/nand/raw/nand.c has driven
       the initialization process -- it provides the mtd and nand
       structs, calls a board init function for a specific device,
       calls nand_scan(), and registers with mtd.
@@ -125,7 +125,7 @@ Configuration Options:
       run code between nand_scan_ident() and nand_scan_tail(), or other
       deviations from the "normal" flow.
 
-      If a board defines CONFIG_SYS_NAND_SELF_INIT, drivers/mtd/nand/nand.c
+      If a board defines CONFIG_SYS_NAND_SELF_INIT, drivers/mtd/nand/raw/nand.c
       will make one call to board_nand_init(), with no arguments.  That
       function is responsible for calling a driver init function for
       each NAND device on the board, that performs all initialization
@@ -280,7 +280,7 @@ NOTE:
 =====
 
 The Disk On Chip driver is currently broken and has been for some time.
-There is a driver in drivers/mtd/nand, taken from Linux, that works with
+There is a driver in drivers/mtd/nand/raw, taken from Linux, that works with
 the current NAND system but has not yet been adapted to the u-boot
 environment.
 
diff --git a/doc/README.zynq b/doc/README.zynq
index b89c39edac..7b18cf1ef6 100644
--- a/doc/README.zynq
+++ b/doc/README.zynq
@@ -65,6 +65,7 @@ bootmode strings at runtime.
   mmc - drivers/mmc/zynq_sdhci.c
   spi-  drivers/spi/zynq_spi.c
   i2c - drivers/i2c/zynq_i2c.c
+  nand - drivers/mtd/nand/raw/zynq_nand.c
 - Done proper cleanups on board configurations
 - Added basic FDT support for zynq boards
 - d-cache support for zynq_gem.c
diff --git a/drivers/Makefile b/drivers/Makefile
index e806aec2cf..7075c6824f 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -8,7 +8,7 @@ obj-$(CONFIG_$(SPL_TPL_)DRIVERS_MISC_SUPPORT) += misc/ sysreset/ firmware/
 obj-$(CONFIG_$(SPL_TPL_)I2C_SUPPORT) += i2c/
 obj-$(CONFIG_$(SPL_TPL_)LED) += led/
 obj-$(CONFIG_$(SPL_TPL_)MMC_SUPPORT) += mmc/
-obj-$(CONFIG_$(SPL_TPL_)NAND_SUPPORT) += mtd/nand/
+obj-$(CONFIG_$(SPL_TPL_)NAND_SUPPORT) += mtd/nand/raw/
 obj-$(CONFIG_$(SPL_TPL_)PHY) += phy/
 obj-$(CONFIG_$(SPL_TPL_)PINCTRL) += pinctrl/
 obj-$(CONFIG_$(SPL_TPL_)RAM) += ram/
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 2863ea83b0..6d53734718 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -1,320 +1 @@
-
-menuconfig NAND
-	bool "NAND Device Support"
-if NAND
-
-config SYS_NAND_SELF_INIT
-	bool
-	help
-	  This option, if enabled, provides more flexible and linux-like
-	  NAND initialization process.
-
-config NAND_ATMEL
-	bool "Support Atmel NAND controller"
-	imply SYS_NAND_USE_FLASH_BBT
-	help
-	  Enable this driver for NAND flash platforms using an Atmel NAND
-	  controller.
-
-config NAND_DAVINCI
-	bool "Support TI Davinci NAND controller"
-	help
-	  Enable this driver for NAND flash controllers available in TI Davinci
-	  and Keystone2 platforms
-
-config NAND_DENALI
-	bool
-	select SYS_NAND_SELF_INIT
-	imply CMD_NAND
-
-config NAND_DENALI_DT
-	bool "Support Denali NAND controller as a DT device"
-	select NAND_DENALI
-	depends on OF_CONTROL && DM
-	help
-	  Enable the driver for NAND flash on platforms using a Denali NAND
-	  controller as a DT device.
-
-config NAND_DENALI_SPARE_AREA_SKIP_BYTES
-	int "Number of bytes skipped in OOB area"
-	depends on NAND_DENALI
-	range 0 63
-	help
-	  This option specifies the number of bytes to skip from the beginning
-	  of OOB area before last ECC sector data starts.  This is potentially
-	  used to preserve the bad block marker in the OOB area.
-
-config NAND_LPC32XX_SLC
-	bool "Support LPC32XX_SLC controller"
-	help
-	  Enable the LPC32XX SLC NAND controller.
-
-config NAND_OMAP_GPMC
-	bool "Support OMAP GPMC NAND controller"
-	depends on ARCH_OMAP2PLUS
-	help
-	  Enables omap_gpmc.c driver for OMAPx and AMxxxx platforms.
-	  GPMC controller is used for parallel NAND flash devices, and can
-	  do ECC calculation (not ECC error detection) for HAM1, BCH4, BCH8
-	  and BCH16 ECC algorithms.
-
-config NAND_OMAP_GPMC_PREFETCH
-	bool "Enable GPMC Prefetch"
-	depends on NAND_OMAP_GPMC
-	default y
-	help
-	  On OMAP platforms that use the GPMC controller
-	  (CONFIG_NAND_OMAP_GPMC_PREFETCH), this options enables the code that
-	  uses the prefetch mode to speed up read operations.
-
-config NAND_OMAP_ELM
-	bool "Enable ELM driver for OMAPxx and AMxx platforms."
-	depends on NAND_OMAP_GPMC && !OMAP34XX
-	help
-	  ELM controller is used for ECC error detection (not ECC calculation)
-	  of BCH4, BCH8 and BCH16 ECC algorithms.
-	  Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
-	  thus such SoC platforms need to depend on software library for ECC error
-	  detection. However ECC calculation on such plaforms would still be
-	  done by GPMC controller.
-
-config NAND_VF610_NFC
-	bool "Support for Freescale NFC for VF610"
-	select SYS_NAND_SELF_INIT
-	imply CMD_NAND
-	help
-	  Enables support for NAND Flash Controller on some Freescale
-	  processors like the VF610, MCF54418 or Kinetis K70.
-	  The driver supports a maximum 2k page size. The driver
-	  currently does not support hardware ECC.
-
-choice
-	prompt "Hardware ECC strength"
-	depends on NAND_VF610_NFC
-	default SYS_NAND_VF610_NFC_45_ECC_BYTES
-	help
-	  Select the ECC strength used in the hardware BCH ECC block.
-
-config SYS_NAND_VF610_NFC_45_ECC_BYTES
-	bool "24-error correction (45 ECC bytes)"
-
-config SYS_NAND_VF610_NFC_60_ECC_BYTES
-	bool "32-error correction (60 ECC bytes)"
-
-endchoice
-
-config NAND_PXA3XX
-	bool "Support for NAND on PXA3xx and Armada 370/XP/38x"
-	select SYS_NAND_SELF_INIT
-	imply CMD_NAND
-	help
-	  This enables the driver for the NAND flash device found on
-	  PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2).
-
-config NAND_ROCKCHIP
-	bool "Support for NAND on Rockchip SoCs"
-	select SYS_NAND_SELF_INIT
-	default n
-	---help---
-	Enable support for Rockchip nand.
-
-config NAND_ROCKCHIP_V9
-	bool "Support for NAND V9 on Rockchip SoCs"
-	select SYS_NAND_SELF_INIT
-	default n
-	---help---
-	Enable support for Rockchip nand v9.
-
-if NAND_ROCKCHIP || NAND_ROCKCHIP_V9
-config NAND_ROCKCHIP_DT
-        bool "Support Rockchip NAND controller as a DT device"
-	default y
-        help
-          Enable the driver for Rockchip NAND flash on platforms
-	  using device tree.
-endif
-
-config NAND_SUNXI
-	bool "Support for NAND on Allwinner SoCs"
-	default ARCH_SUNXI
-	depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUN8I
-	select SYS_NAND_SELF_INIT
-	select SYS_NAND_U_BOOT_LOCATIONS
-	select SPL_NAND_SUPPORT
-	imply CMD_NAND
-	---help---
-	Enable support for NAND. This option enables the standard and
-	SPL drivers.
-	The SPL driver only supports reading from the NAND using DMA
-	transfers.
-
-if NAND_SUNXI
-
-config NAND_SUNXI_SPL_ECC_STRENGTH
-	int "Allwinner NAND SPL ECC Strength"
-	default 64
-
-config NAND_SUNXI_SPL_ECC_SIZE
-	int "Allwinner NAND SPL ECC Step Size"
-	default 1024
-
-config NAND_SUNXI_SPL_USABLE_PAGE_SIZE
-	int "Allwinner NAND SPL Usable Page Size"
-	default 1024
-
-endif
-
-config NAND_ARASAN
-	bool "Configure Arasan Nand"
-	select SYS_NAND_SELF_INIT
-	imply CMD_NAND
-	help
-	  This enables Nand driver support for Arasan nand flash
-	  controller. This uses the hardware ECC for read and
-	  write operations.
-
-config NAND_MXC
-	bool "MXC NAND support"
-	depends on CPU_ARM926EJS || CPU_ARM1136 || MX5
-	imply CMD_NAND
-	help
-	  This enables the NAND driver for the NAND flash controller on the
-	  i.MX27 / i.MX31 / i.MX5 rocessors.
-
-config NAND_MXS
-	bool "MXS NAND support"
-	depends on MX23 || MX28 || MX6 || MX7
-	select SYS_NAND_SELF_INIT
-	imply CMD_NAND
-	select APBH_DMA
-	select APBH_DMA_BURST if ARCH_MX6 || ARCH_MX7
-	select APBH_DMA_BURST8 if ARCH_MX6 || ARCH_MX7
-	help
-	  This enables NAND driver for the NAND flash controller on the
-	  MXS processors.
-
-if NAND_MXS
-
-config NAND_MXS_DT
-	bool "Support MXS NAND controller as a DT device"
-	depends on OF_CONTROL && MTD
-	help
-	  Enable the driver for MXS NAND flash on platforms using
-	  device tree.
-
-config NAND_MXS_USE_MINIMUM_ECC
-	bool "Use minimum ECC strength supported by the controller"
-	default false
-
-endif
-
-config NAND_ZYNQ
-	bool "Support for Zynq Nand controller"
-	select SYS_NAND_SELF_INIT
-	imply CMD_NAND
-	help
-	  This enables Nand driver support for Nand flash controller
-	  found on Zynq SoC.
-
-config NAND_ZYNQ_USE_BOOTLOADER1_TIMINGS
-	bool "Enable use of 1st stage bootloader timing for NAND"
-	depends on NAND_ZYNQ
-	help
-	  This flag prevent U-boot reconfigure NAND flash controller and reuse
-	  the NAND timing from 1st stage bootloader.
-
-comment "Generic NAND options"
-
-config SYS_NAND_BLOCK_SIZE
-	hex "NAND chip eraseblock size"
-	depends on ARCH_SUNXI
-	help
-	  Number of data bytes in one eraseblock for the NAND chip on the
-	  board. This is the multiple of NAND_PAGE_SIZE and the number of
-	  pages.
-
-config SYS_NAND_PAGE_SIZE
-	hex "NAND chip page size"
-	depends on ARCH_SUNXI
-	help
-	  Number of data bytes in one page for the NAND chip on the
-	  board, not including the OOB area.
-
-config SYS_NAND_OOBSIZE
-	hex "NAND chip OOB size"
-	depends on ARCH_SUNXI
-	help
-	  Number of bytes in the Out-Of-Band area for the NAND chip on
-	  the board.
-
-# Enhance depends when converting drivers to Kconfig which use this config
-# option (mxc_nand, ndfc, omap_gpmc).
-config SYS_NAND_BUSWIDTH_16BIT
-	bool "Use 16-bit NAND interface"
-	depends on NAND_VF610_NFC || NAND_OMAP_GPMC || NAND_MXC || ARCH_DAVINCI
-	help
-	  Indicates that NAND device has 16-bit wide data-bus. In absence of this
-	  config, bus-width of NAND device is assumed to be either 8-bit and later
-	  determined by reading ONFI params.
-	  Above config is useful when NAND device's bus-width information cannot
-	  be determined from on-chip ONFI params, like in following scenarios:
-	  - SPL boot does not support reading of ONFI parameters. This is done to
-	    keep SPL code foot-print small.
-	  - In current U-Boot flow using nand_init(), driver initialization
-	    happens in board_nand_init() which is called before any device probe
-	    (nand_scan_ident + nand_scan_tail), thus device's ONFI parameters are
-	    not available while configuring controller. So a static CONFIG_NAND_xx
-	    is needed to know the device's bus-width in advance.
-
-if SPL
-
-config SYS_NAND_U_BOOT_LOCATIONS
-	bool "Define U-boot binaries locations in NAND"
-	help
-	Enable CONFIG_SYS_NAND_U_BOOT_OFFS though Kconfig.
-	This option should not be enabled when compiling U-boot for boards
-	defining CONFIG_SYS_NAND_U_BOOT_OFFS in their include/configs/<board>.h
-	file.
-
-config SYS_NAND_U_BOOT_OFFS
-	hex "Location in NAND to read U-Boot from"
-	default 0x800000 if NAND_SUNXI
-	depends on SYS_NAND_U_BOOT_LOCATIONS
-	help
-	Set the offset from the start of the nand where u-boot should be
-	loaded from.
-
-config SYS_NAND_U_BOOT_OFFS_REDUND
-	hex "Location in NAND to read U-Boot from"
-	default SYS_NAND_U_BOOT_OFFS
-	depends on SYS_NAND_U_BOOT_LOCATIONS
-	help
-	Set the offset from the start of the nand where the redundant u-boot
-	should be loaded from.
-
-config SPL_NAND_AM33XX_BCH
-	bool "Enables SPL-NAND driver which supports ELM based"
-	depends on NAND_OMAP_GPMC && !OMAP34XX
-	default y
-        help
-	  Hardware ECC correction. This is useful for platforms which have ELM
-	  hardware engine and use NAND boot mode.
-	  Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
-	  so those platforms should use CONFIG_SPL_NAND_SIMPLE for enabling
-          SPL-NAND driver with software ECC correction support.
-
-config SPL_NAND_DENALI
-	bool "Support Denali NAND controller for SPL"
-	help
-	  This is a small implementation of the Denali NAND controller
-	  for use on SPL.
-
-config SPL_NAND_SIMPLE
-	bool "Use simple SPL NAND driver"
-	depends on !SPL_NAND_AM33XX_BCH
-	help
-	  Support for NAND boot using simple NAND drivers that
-	  expose the cmd_ctrl() interface.
-endif
-
-endif   # if NAND
+source "drivers/mtd/nand/raw/Kconfig"
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index a0043d2a69..69f40d1563 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -1,84 +1,2 @@
-#
-# (C) Copyright 2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
+# SPDX-License-Identifier: GPL-2.0+
 
-ifdef CONFIG_SPL_BUILD
-
-ifdef CONFIG_SPL_NAND_DRIVERS
-NORMAL_DRIVERS=y
-endif
-
-obj-$(CONFIG_SPL_NAND_AM33XX_BCH) += am335x_spl_bch.o
-obj-$(CONFIG_SPL_NAND_DENALI) += denali_spl.o
-obj-$(CONFIG_SPL_NAND_SIMPLE) += nand_spl_simple.o
-obj-$(CONFIG_SPL_NAND_LOAD) += nand_spl_load.o
-obj-$(CONFIG_SPL_NAND_ECC) += nand_ecc.o
-obj-$(CONFIG_SPL_NAND_BASE) += nand_base.o
-obj-$(CONFIG_SPL_NAND_IDENT) += nand_ids.o nand_timings.o
-obj-$(CONFIG_SPL_NAND_INIT) += nand.o
-obj-$(CONFIG_SPL_NAND_BBT) += nand_bbt.o
-obj-$(CONFIG_SPL_NAND_IDS) += nand_ids.o
-obj-$(CONFIG_SPL_NAND_UTIL) += nand_util.o
-ifeq ($(CONFIG_SPL_ENV_SUPPORT),y)
-obj-$(CONFIG_ENV_IS_IN_NAND) += nand_util.o
-endif
-
-else # not spl
-
-NORMAL_DRIVERS=y
-
-obj-y += nand.o
-obj-y += nand_bbt.o
-obj-y += nand_ids.o
-obj-y += nand_util.o
-obj-y += nand_ecc.o
-obj-y += nand_base.o
-obj-y += nand_timings.o
-
-endif # not spl
-
-ifdef NORMAL_DRIVERS
-
-obj-$(CONFIG_NAND_ECC_BCH) += nand_bch.o
-
-obj-$(CONFIG_NAND_ATMEL) += atmel_nand.o
-obj-$(CONFIG_NAND_ARASAN) += arasan_nfc.o
-obj-$(CONFIG_NAND_DAVINCI) += davinci_nand.o
-obj-$(CONFIG_NAND_DENALI) += denali.o
-obj-$(CONFIG_NAND_DENALI_DT) += denali_dt.o
-obj-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_nand.o
-obj-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_nand.o
-obj-$(CONFIG_NAND_FSL_UPM) += fsl_upm.o
-obj-$(CONFIG_NAND_FSMC) += fsmc_nand.o
-obj-$(CONFIG_NAND_KB9202) += kb9202_nand.o
-obj-$(CONFIG_NAND_KIRKWOOD) += kirkwood_nand.o
-obj-$(CONFIG_NAND_KMETER1) += kmeter1_nand.o
-obj-$(CONFIG_NAND_LPC32XX_MLC) += lpc32xx_nand_mlc.o
-obj-$(CONFIG_NAND_LPC32XX_SLC) += lpc32xx_nand_slc.o
-obj-$(CONFIG_NAND_VF610_NFC) += vf610_nfc.o
-obj-$(CONFIG_NAND_MXC) += mxc_nand.o
-obj-$(CONFIG_NAND_MXS) += mxs_nand.o
-obj-$(CONFIG_NAND_MXS_DT) += mxs_nand_dt.o
-obj-$(CONFIG_NAND_PXA3XX) += pxa3xx_nand.o
-obj-$(CONFIG_NAND_SPEAR) += spr_nand.o
-obj-$(CONFIG_TEGRA_NAND) += tegra_nand.o
-obj-$(CONFIG_NAND_OMAP_GPMC) += omap_gpmc.o
-obj-$(CONFIG_NAND_OMAP_ELM) += omap_elm.o
-obj-$(CONFIG_NAND_PLAT) += nand_plat.o
-obj-$(CONFIG_NAND_SUNXI) += sunxi_nand.o
-obj-$(CONFIG_NAND_ZYNQ) += zynq_nand.o
-obj-$(CONFIG_NAND_ROCKCHIP) += rockchip_nand.o
-obj-$(CONFIG_NAND_ROCKCHIP_V9) += rockchip_nand_v9.o
-else  # minimal SPL drivers
-
-obj-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_spl.o
-obj-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_spl.o
-obj-$(CONFIG_NAND_MXC) += mxc_nand_spl.o
-obj-$(CONFIG_NAND_MXS) += mxs_nand_spl.o mxs_nand.o
-obj-$(CONFIG_NAND_ROCKCHIP) += rockchip_nand_spl.o
-obj-$(CONFIG_NAND_SUNXI) += sunxi_nand_spl.o
-
-endif # drivers
diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
new file mode 100644
index 0000000000..1e4ea7bdd4
--- /dev/null
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -0,0 +1,297 @@
+
+menuconfig NAND
+	bool "NAND Device Support"
+if NAND
+
+config SYS_NAND_SELF_INIT
+	bool
+	help
+	  This option, if enabled, provides more flexible and linux-like
+	  NAND initialization process.
+
+config NAND_ATMEL
+	bool "Support Atmel NAND controller"
+	imply SYS_NAND_USE_FLASH_BBT
+	help
+	  Enable this driver for NAND flash platforms using an Atmel NAND
+	  controller.
+
+config NAND_DAVINCI
+	bool "Support TI Davinci NAND controller"
+	help
+	  Enable this driver for NAND flash controllers available in TI Davinci
+	  and Keystone2 platforms
+
+config NAND_DENALI
+	bool
+	select SYS_NAND_SELF_INIT
+	imply CMD_NAND
+
+config NAND_DENALI_DT
+	bool "Support Denali NAND controller as a DT device"
+	select NAND_DENALI
+	depends on OF_CONTROL && DM
+	help
+	  Enable the driver for NAND flash on platforms using a Denali NAND
+	  controller as a DT device.
+
+config NAND_DENALI_SPARE_AREA_SKIP_BYTES
+	int "Number of bytes skipped in OOB area"
+	depends on NAND_DENALI
+	range 0 63
+	help
+	  This option specifies the number of bytes to skip from the beginning
+	  of OOB area before last ECC sector data starts.  This is potentially
+	  used to preserve the bad block marker in the OOB area.
+
+config NAND_LPC32XX_SLC
+	bool "Support LPC32XX_SLC controller"
+	help
+	  Enable the LPC32XX SLC NAND controller.
+
+config NAND_OMAP_GPMC
+	bool "Support OMAP GPMC NAND controller"
+	depends on ARCH_OMAP2PLUS
+	help
+	  Enables omap_gpmc.c driver for OMAPx and AMxxxx platforms.
+	  GPMC controller is used for parallel NAND flash devices, and can
+	  do ECC calculation (not ECC error detection) for HAM1, BCH4, BCH8
+	  and BCH16 ECC algorithms.
+
+config NAND_OMAP_GPMC_PREFETCH
+	bool "Enable GPMC Prefetch"
+	depends on NAND_OMAP_GPMC
+	default y
+	help
+	  On OMAP platforms that use the GPMC controller
+	  (CONFIG_NAND_OMAP_GPMC_PREFETCH), this options enables the code that
+	  uses the prefetch mode to speed up read operations.
+
+config NAND_OMAP_ELM
+	bool "Enable ELM driver for OMAPxx and AMxx platforms."
+	depends on NAND_OMAP_GPMC && !OMAP34XX
+	help
+	  ELM controller is used for ECC error detection (not ECC calculation)
+	  of BCH4, BCH8 and BCH16 ECC algorithms.
+	  Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
+	  thus such SoC platforms need to depend on software library for ECC error
+	  detection. However ECC calculation on such plaforms would still be
+	  done by GPMC controller.
+
+config NAND_VF610_NFC
+	bool "Support for Freescale NFC for VF610"
+	select SYS_NAND_SELF_INIT
+	imply CMD_NAND
+	help
+	  Enables support for NAND Flash Controller on some Freescale
+	  processors like the VF610, MCF54418 or Kinetis K70.
+	  The driver supports a maximum 2k page size. The driver
+	  currently does not support hardware ECC.
+
+choice
+	prompt "Hardware ECC strength"
+	depends on NAND_VF610_NFC
+	default SYS_NAND_VF610_NFC_45_ECC_BYTES
+	help
+	  Select the ECC strength used in the hardware BCH ECC block.
+
+config SYS_NAND_VF610_NFC_45_ECC_BYTES
+	bool "24-error correction (45 ECC bytes)"
+
+config SYS_NAND_VF610_NFC_60_ECC_BYTES
+	bool "32-error correction (60 ECC bytes)"
+
+endchoice
+
+config NAND_PXA3XX
+	bool "Support for NAND on PXA3xx and Armada 370/XP/38x"
+	select SYS_NAND_SELF_INIT
+	imply CMD_NAND
+	help
+	  This enables the driver for the NAND flash device found on
+	  PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2).
+
+config NAND_SUNXI
+	bool "Support for NAND on Allwinner SoCs"
+	default ARCH_SUNXI
+	depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUN8I
+	select SYS_NAND_SELF_INIT
+	select SYS_NAND_U_BOOT_LOCATIONS
+	select SPL_NAND_SUPPORT
+	imply CMD_NAND
+	---help---
+	Enable support for NAND. This option enables the standard and
+	SPL drivers.
+	The SPL driver only supports reading from the NAND using DMA
+	transfers.
+
+if NAND_SUNXI
+
+config NAND_SUNXI_SPL_ECC_STRENGTH
+	int "Allwinner NAND SPL ECC Strength"
+	default 64
+
+config NAND_SUNXI_SPL_ECC_SIZE
+	int "Allwinner NAND SPL ECC Step Size"
+	default 1024
+
+config NAND_SUNXI_SPL_USABLE_PAGE_SIZE
+	int "Allwinner NAND SPL Usable Page Size"
+	default 1024
+
+endif
+
+config NAND_ARASAN
+	bool "Configure Arasan Nand"
+	select SYS_NAND_SELF_INIT
+	imply CMD_NAND
+	help
+	  This enables Nand driver support for Arasan nand flash
+	  controller. This uses the hardware ECC for read and
+	  write operations.
+
+config NAND_MXC
+	bool "MXC NAND support"
+	depends on CPU_ARM926EJS || CPU_ARM1136 || MX5
+	imply CMD_NAND
+	help
+	  This enables the NAND driver for the NAND flash controller on the
+	  i.MX27 / i.MX31 / i.MX5 rocessors.
+
+config NAND_MXS
+	bool "MXS NAND support"
+	depends on MX23 || MX28 || MX6 || MX7
+	select SYS_NAND_SELF_INIT
+	imply CMD_NAND
+	select APBH_DMA
+	select APBH_DMA_BURST if ARCH_MX6 || ARCH_MX7
+	select APBH_DMA_BURST8 if ARCH_MX6 || ARCH_MX7
+	help
+	  This enables NAND driver for the NAND flash controller on the
+	  MXS processors.
+
+if NAND_MXS
+
+config NAND_MXS_DT
+	bool "Support MXS NAND controller as a DT device"
+	depends on OF_CONTROL && MTD
+	help
+	  Enable the driver for MXS NAND flash on platforms using
+	  device tree.
+
+config NAND_MXS_USE_MINIMUM_ECC
+	bool "Use minimum ECC strength supported by the controller"
+	default false
+
+endif
+
+config NAND_ZYNQ
+	bool "Support for Zynq Nand controller"
+	select SYS_NAND_SELF_INIT
+	imply CMD_NAND
+	help
+	  This enables Nand driver support for Nand flash controller
+	  found on Zynq SoC.
+
+config NAND_ZYNQ_USE_BOOTLOADER1_TIMINGS
+	bool "Enable use of 1st stage bootloader timing for NAND"
+	depends on NAND_ZYNQ
+	help
+	  This flag prevent U-boot reconfigure NAND flash controller and reuse
+	  the NAND timing from 1st stage bootloader.
+
+comment "Generic NAND options"
+
+config SYS_NAND_BLOCK_SIZE
+	hex "NAND chip eraseblock size"
+	depends on ARCH_SUNXI
+	help
+	  Number of data bytes in one eraseblock for the NAND chip on the
+	  board. This is the multiple of NAND_PAGE_SIZE and the number of
+	  pages.
+
+config SYS_NAND_PAGE_SIZE
+	hex "NAND chip page size"
+	depends on ARCH_SUNXI
+	help
+	  Number of data bytes in one page for the NAND chip on the
+	  board, not including the OOB area.
+
+config SYS_NAND_OOBSIZE
+	hex "NAND chip OOB size"
+	depends on ARCH_SUNXI
+	help
+	  Number of bytes in the Out-Of-Band area for the NAND chip on
+	  the board.
+
+# Enhance depends when converting drivers to Kconfig which use this config
+# option (mxc_nand, ndfc, omap_gpmc).
+config SYS_NAND_BUSWIDTH_16BIT
+	bool "Use 16-bit NAND interface"
+	depends on NAND_VF610_NFC || NAND_OMAP_GPMC || NAND_MXC || ARCH_DAVINCI
+	help
+	  Indicates that NAND device has 16-bit wide data-bus. In absence of this
+	  config, bus-width of NAND device is assumed to be either 8-bit and later
+	  determined by reading ONFI params.
+	  Above config is useful when NAND device's bus-width information cannot
+	  be determined from on-chip ONFI params, like in following scenarios:
+	  - SPL boot does not support reading of ONFI parameters. This is done to
+	    keep SPL code foot-print small.
+	  - In current U-Boot flow using nand_init(), driver initialization
+	    happens in board_nand_init() which is called before any device probe
+	    (nand_scan_ident + nand_scan_tail), thus device's ONFI parameters are
+	    not available while configuring controller. So a static CONFIG_NAND_xx
+	    is needed to know the device's bus-width in advance.
+
+if SPL
+
+config SYS_NAND_U_BOOT_LOCATIONS
+	bool "Define U-boot binaries locations in NAND"
+	help
+	Enable CONFIG_SYS_NAND_U_BOOT_OFFS though Kconfig.
+	This option should not be enabled when compiling U-boot for boards
+	defining CONFIG_SYS_NAND_U_BOOT_OFFS in their include/configs/<board>.h
+	file.
+
+config SYS_NAND_U_BOOT_OFFS
+	hex "Location in NAND to read U-Boot from"
+	default 0x800000 if NAND_SUNXI
+	depends on SYS_NAND_U_BOOT_LOCATIONS
+	help
+	Set the offset from the start of the nand where u-boot should be
+	loaded from.
+
+config SYS_NAND_U_BOOT_OFFS_REDUND
+	hex "Location in NAND to read U-Boot from"
+	default SYS_NAND_U_BOOT_OFFS
+	depends on SYS_NAND_U_BOOT_LOCATIONS
+	help
+	Set the offset from the start of the nand where the redundant u-boot
+	should be loaded from.
+
+config SPL_NAND_AM33XX_BCH
+	bool "Enables SPL-NAND driver which supports ELM based"
+	depends on NAND_OMAP_GPMC && !OMAP34XX
+	default y
+        help
+	  Hardware ECC correction. This is useful for platforms which have ELM
+	  hardware engine and use NAND boot mode.
+	  Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
+	  so those platforms should use CONFIG_SPL_NAND_SIMPLE for enabling
+          SPL-NAND driver with software ECC correction support.
+
+config SPL_NAND_DENALI
+	bool "Support Denali NAND controller for SPL"
+	help
+	  This is a small implementation of the Denali NAND controller
+	  for use on SPL.
+
+config SPL_NAND_SIMPLE
+	bool "Use simple SPL NAND driver"
+	depends on !SPL_NAND_AM33XX_BCH
+	help
+	  Support for NAND boot using simple NAND drivers that
+	  expose the cmd_ctrl() interface.
+endif
+
+endif   # if NAND
diff --git a/drivers/mtd/nand/raw/Makefile b/drivers/mtd/nand/raw/Makefile
new file mode 100644
index 0000000000..c61e3f3839
--- /dev/null
+++ b/drivers/mtd/nand/raw/Makefile
@@ -0,0 +1,77 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+
+ifdef CONFIG_SPL_BUILD
+
+ifdef CONFIG_SPL_NAND_DRIVERS
+NORMAL_DRIVERS=y
+endif
+
+obj-$(CONFIG_SPL_NAND_AM33XX_BCH) += am335x_spl_bch.o
+obj-$(CONFIG_SPL_NAND_DENALI) += denali_spl.o
+obj-$(CONFIG_SPL_NAND_SIMPLE) += nand_spl_simple.o
+obj-$(CONFIG_SPL_NAND_LOAD) += nand_spl_load.o
+obj-$(CONFIG_SPL_NAND_ECC) += nand_ecc.o
+obj-$(CONFIG_SPL_NAND_BASE) += nand_base.o
+obj-$(CONFIG_SPL_NAND_IDENT) += nand_ids.o nand_timings.o
+obj-$(CONFIG_SPL_NAND_INIT) += nand.o
+ifeq ($(CONFIG_SPL_ENV_SUPPORT),y)
+obj-$(CONFIG_ENV_IS_IN_NAND) += nand_util.o
+endif
+
+else # not spl
+
+NORMAL_DRIVERS=y
+
+obj-y += nand.o
+obj-y += nand_bbt.o
+obj-y += nand_ids.o
+obj-y += nand_util.o
+obj-y += nand_ecc.o
+obj-y += nand_base.o
+obj-y += nand_timings.o
+
+endif # not spl
+
+ifdef NORMAL_DRIVERS
+
+obj-$(CONFIG_NAND_ECC_BCH) += nand_bch.o
+
+obj-$(CONFIG_NAND_ATMEL) += atmel_nand.o
+obj-$(CONFIG_NAND_ARASAN) += arasan_nfc.o
+obj-$(CONFIG_NAND_DAVINCI) += davinci_nand.o
+obj-$(CONFIG_NAND_DENALI) += denali.o
+obj-$(CONFIG_NAND_DENALI_DT) += denali_dt.o
+obj-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_nand.o
+obj-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_nand.o
+obj-$(CONFIG_NAND_FSL_UPM) += fsl_upm.o
+obj-$(CONFIG_NAND_FSMC) += fsmc_nand.o
+obj-$(CONFIG_NAND_KB9202) += kb9202_nand.o
+obj-$(CONFIG_NAND_KIRKWOOD) += kirkwood_nand.o
+obj-$(CONFIG_NAND_KMETER1) += kmeter1_nand.o
+obj-$(CONFIG_NAND_LPC32XX_MLC) += lpc32xx_nand_mlc.o
+obj-$(CONFIG_NAND_LPC32XX_SLC) += lpc32xx_nand_slc.o
+obj-$(CONFIG_NAND_VF610_NFC) += vf610_nfc.o
+obj-$(CONFIG_NAND_MXC) += mxc_nand.o
+obj-$(CONFIG_NAND_MXS) += mxs_nand.o
+obj-$(CONFIG_NAND_MXS_DT) += mxs_nand_dt.o
+obj-$(CONFIG_NAND_PXA3XX) += pxa3xx_nand.o
+obj-$(CONFIG_NAND_SPEAR) += spr_nand.o
+obj-$(CONFIG_TEGRA_NAND) += tegra_nand.o
+obj-$(CONFIG_NAND_OMAP_GPMC) += omap_gpmc.o
+obj-$(CONFIG_NAND_OMAP_ELM) += omap_elm.o
+obj-$(CONFIG_NAND_PLAT) += nand_plat.o
+obj-$(CONFIG_NAND_SUNXI) += sunxi_nand.o
+obj-$(CONFIG_NAND_ZYNQ) += zynq_nand.o
+
+else  # minimal SPL drivers
+
+obj-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_spl.o
+obj-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_spl.o
+obj-$(CONFIG_NAND_MXC) += mxc_nand_spl.o
+obj-$(CONFIG_NAND_MXS) += mxs_nand_spl.o mxs_nand.o
+obj-$(CONFIG_NAND_SUNXI) += sunxi_nand_spl.o
+
+endif # drivers
diff --git a/drivers/mtd/nand/am335x_spl_bch.c b/drivers/mtd/nand/raw/am335x_spl_bch.c
similarity index 100%
rename from drivers/mtd/nand/am335x_spl_bch.c
rename to drivers/mtd/nand/raw/am335x_spl_bch.c
diff --git a/drivers/mtd/nand/arasan_nfc.c b/drivers/mtd/nand/raw/arasan_nfc.c
similarity index 100%
rename from drivers/mtd/nand/arasan_nfc.c
rename to drivers/mtd/nand/raw/arasan_nfc.c
diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/raw/atmel_nand.c
similarity index 100%
rename from drivers/mtd/nand/atmel_nand.c
rename to drivers/mtd/nand/raw/atmel_nand.c
diff --git a/drivers/mtd/nand/atmel_nand_ecc.h b/drivers/mtd/nand/raw/atmel_nand_ecc.h
similarity index 100%
rename from drivers/mtd/nand/atmel_nand_ecc.h
rename to drivers/mtd/nand/raw/atmel_nand_ecc.h
diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/raw/davinci_nand.c
similarity index 99%
rename from drivers/mtd/nand/davinci_nand.c
rename to drivers/mtd/nand/raw/davinci_nand.c
index 65104c6cf4..b8ffcc70b0 100644
--- a/drivers/mtd/nand/davinci_nand.c
+++ b/drivers/mtd/nand/raw/davinci_nand.c
@@ -8,7 +8,7 @@
 
 /*
  *
- * linux/drivers/mtd/nand/nand_davinci.c
+ * linux/drivers/mtd/nand/raw/nand_davinci.c
  *
  * NAND Flash Driver
  *
diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/raw/denali.c
similarity index 100%
rename from drivers/mtd/nand/denali.c
rename to drivers/mtd/nand/raw/denali.c
diff --git a/drivers/mtd/nand/denali.h b/drivers/mtd/nand/raw/denali.h
similarity index 100%
rename from drivers/mtd/nand/denali.h
rename to drivers/mtd/nand/raw/denali.h
diff --git a/drivers/mtd/nand/denali_dt.c b/drivers/mtd/nand/raw/denali_dt.c
similarity index 100%
rename from drivers/mtd/nand/denali_dt.c
rename to drivers/mtd/nand/raw/denali_dt.c
diff --git a/drivers/mtd/nand/denali_spl.c b/drivers/mtd/nand/raw/denali_spl.c
similarity index 100%
rename from drivers/mtd/nand/denali_spl.c
rename to drivers/mtd/nand/raw/denali_spl.c
diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/raw/fsl_elbc_nand.c
similarity index 100%
rename from drivers/mtd/nand/fsl_elbc_nand.c
rename to drivers/mtd/nand/raw/fsl_elbc_nand.c
diff --git a/drivers/mtd/nand/fsl_elbc_spl.c b/drivers/mtd/nand/raw/fsl_elbc_spl.c
similarity index 100%
rename from drivers/mtd/nand/fsl_elbc_spl.c
rename to drivers/mtd/nand/raw/fsl_elbc_spl.c
diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/raw/fsl_ifc_nand.c
similarity index 100%
rename from drivers/mtd/nand/fsl_ifc_nand.c
rename to drivers/mtd/nand/raw/fsl_ifc_nand.c
diff --git a/drivers/mtd/nand/fsl_ifc_spl.c b/drivers/mtd/nand/raw/fsl_ifc_spl.c
similarity index 100%
rename from drivers/mtd/nand/fsl_ifc_spl.c
rename to drivers/mtd/nand/raw/fsl_ifc_spl.c
diff --git a/drivers/mtd/nand/fsl_upm.c b/drivers/mtd/nand/raw/fsl_upm.c
similarity index 100%
rename from drivers/mtd/nand/fsl_upm.c
rename to drivers/mtd/nand/raw/fsl_upm.c
diff --git a/drivers/mtd/nand/fsmc_nand.c b/drivers/mtd/nand/raw/fsmc_nand.c
similarity index 100%
rename from drivers/mtd/nand/fsmc_nand.c
rename to drivers/mtd/nand/raw/fsmc_nand.c
diff --git a/drivers/mtd/nand/kb9202_nand.c b/drivers/mtd/nand/raw/kb9202_nand.c
similarity index 100%
rename from drivers/mtd/nand/kb9202_nand.c
rename to drivers/mtd/nand/raw/kb9202_nand.c
diff --git a/drivers/mtd/nand/kirkwood_nand.c b/drivers/mtd/nand/raw/kirkwood_nand.c
similarity index 100%
rename from drivers/mtd/nand/kirkwood_nand.c
rename to drivers/mtd/nand/raw/kirkwood_nand.c
diff --git a/drivers/mtd/nand/kmeter1_nand.c b/drivers/mtd/nand/raw/kmeter1_nand.c
similarity index 100%
rename from drivers/mtd/nand/kmeter1_nand.c
rename to drivers/mtd/nand/raw/kmeter1_nand.c
diff --git a/drivers/mtd/nand/lpc32xx_nand_mlc.c b/drivers/mtd/nand/raw/lpc32xx_nand_mlc.c
similarity index 100%
rename from drivers/mtd/nand/lpc32xx_nand_mlc.c
rename to drivers/mtd/nand/raw/lpc32xx_nand_mlc.c
diff --git a/drivers/mtd/nand/lpc32xx_nand_slc.c b/drivers/mtd/nand/raw/lpc32xx_nand_slc.c
similarity index 100%
rename from drivers/mtd/nand/lpc32xx_nand_slc.c
rename to drivers/mtd/nand/raw/lpc32xx_nand_slc.c
diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/raw/mxc_nand.c
similarity index 100%
rename from drivers/mtd/nand/mxc_nand.c
rename to drivers/mtd/nand/raw/mxc_nand.c
diff --git a/drivers/mtd/nand/mxc_nand.h b/drivers/mtd/nand/raw/mxc_nand.h
similarity index 100%
rename from drivers/mtd/nand/mxc_nand.h
rename to drivers/mtd/nand/raw/mxc_nand.h
diff --git a/drivers/mtd/nand/mxc_nand_spl.c b/drivers/mtd/nand/raw/mxc_nand_spl.c
similarity index 100%
rename from drivers/mtd/nand/mxc_nand_spl.c
rename to drivers/mtd/nand/raw/mxc_nand_spl.c
diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/raw/mxs_nand.c
similarity index 100%
rename from drivers/mtd/nand/mxs_nand.c
rename to drivers/mtd/nand/raw/mxs_nand.c
diff --git a/drivers/mtd/nand/mxs_nand.h b/drivers/mtd/nand/raw/mxs_nand.h
similarity index 100%
rename from drivers/mtd/nand/mxs_nand.h
rename to drivers/mtd/nand/raw/mxs_nand.h
diff --git a/drivers/mtd/nand/mxs_nand_dt.c b/drivers/mtd/nand/raw/mxs_nand_dt.c
similarity index 100%
rename from drivers/mtd/nand/mxs_nand_dt.c
rename to drivers/mtd/nand/raw/mxs_nand_dt.c
diff --git a/drivers/mtd/nand/mxs_nand_spl.c b/drivers/mtd/nand/raw/mxs_nand_spl.c
similarity index 100%
rename from drivers/mtd/nand/mxs_nand_spl.c
rename to drivers/mtd/nand/raw/mxs_nand_spl.c
diff --git a/drivers/mtd/nand/nand.c b/drivers/mtd/nand/raw/nand.c
similarity index 100%
rename from drivers/mtd/nand/nand.c
rename to drivers/mtd/nand/raw/nand.c
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
similarity index 100%
rename from drivers/mtd/nand/nand_base.c
rename to drivers/mtd/nand/raw/nand_base.c
diff --git a/drivers/mtd/nand/nand_bbt.c b/drivers/mtd/nand/raw/nand_bbt.c
similarity index 100%
rename from drivers/mtd/nand/nand_bbt.c
rename to drivers/mtd/nand/raw/nand_bbt.c
diff --git a/drivers/mtd/nand/nand_bch.c b/drivers/mtd/nand/raw/nand_bch.c
similarity index 100%
rename from drivers/mtd/nand/nand_bch.c
rename to drivers/mtd/nand/raw/nand_bch.c
diff --git a/drivers/mtd/nand/nand_ecc.c b/drivers/mtd/nand/raw/nand_ecc.c
similarity index 99%
rename from drivers/mtd/nand/nand_ecc.c
rename to drivers/mtd/nand/raw/nand_ecc.c
index 13a6535bd5..5b776a23be 100644
--- a/drivers/mtd/nand/nand_ecc.c
+++ b/drivers/mtd/nand/raw/nand_ecc.c
@@ -2,7 +2,7 @@
  * This file contains an ECC algorithm from Toshiba that detects and
  * corrects 1 bit errors in a 256 byte block of data.
  *
- * drivers/mtd/nand/nand_ecc.c
+ * drivers/mtd/nand/raw/nand_ecc.c
  *
  * Copyright (C) 2000-2004 Steven J. Hill (sjhill@realitydiluted.com)
  *                         Toshiba America Electronics Components, Inc.
diff --git a/drivers/mtd/nand/nand_ids.c b/drivers/mtd/nand/raw/nand_ids.c
similarity index 100%
rename from drivers/mtd/nand/nand_ids.c
rename to drivers/mtd/nand/raw/nand_ids.c
diff --git a/drivers/mtd/nand/nand_plat.c b/drivers/mtd/nand/raw/nand_plat.c
similarity index 100%
rename from drivers/mtd/nand/nand_plat.c
rename to drivers/mtd/nand/raw/nand_plat.c
diff --git a/drivers/mtd/nand/nand_spl_load.c b/drivers/mtd/nand/raw/nand_spl_load.c
similarity index 100%
rename from drivers/mtd/nand/nand_spl_load.c
rename to drivers/mtd/nand/raw/nand_spl_load.c
diff --git a/drivers/mtd/nand/nand_spl_loaders.c b/drivers/mtd/nand/raw/nand_spl_loaders.c
similarity index 100%
rename from drivers/mtd/nand/nand_spl_loaders.c
rename to drivers/mtd/nand/raw/nand_spl_loaders.c
diff --git a/drivers/mtd/nand/nand_spl_simple.c b/drivers/mtd/nand/raw/nand_spl_simple.c
similarity index 100%
rename from drivers/mtd/nand/nand_spl_simple.c
rename to drivers/mtd/nand/raw/nand_spl_simple.c
diff --git a/drivers/mtd/nand/nand_timings.c b/drivers/mtd/nand/raw/nand_timings.c
similarity index 100%
rename from drivers/mtd/nand/nand_timings.c
rename to drivers/mtd/nand/raw/nand_timings.c
diff --git a/drivers/mtd/nand/nand_util.c b/drivers/mtd/nand/raw/nand_util.c
similarity index 99%
rename from drivers/mtd/nand/nand_util.c
rename to drivers/mtd/nand/raw/nand_util.c
index 9cc5f3357a..c9b717b06b 100644
--- a/drivers/mtd/nand/nand_util.c
+++ b/drivers/mtd/nand/raw/nand_util.c
@@ -1,5 +1,5 @@
 /*
- * drivers/mtd/nand/nand_util.c
+ * drivers/mtd/nand/raw/nand_util.c
  *
  * Copyright (C) 2006 by Weiss-Electronic GmbH.
  * All rights reserved.
diff --git a/drivers/mtd/nand/omap_elm.c b/drivers/mtd/nand/raw/omap_elm.c
similarity index 100%
rename from drivers/mtd/nand/omap_elm.c
rename to drivers/mtd/nand/raw/omap_elm.c
diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/raw/omap_gpmc.c
similarity index 100%
rename from drivers/mtd/nand/omap_gpmc.c
rename to drivers/mtd/nand/raw/omap_gpmc.c
diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/raw/pxa3xx_nand.c
similarity index 99%
rename from drivers/mtd/nand/pxa3xx_nand.c
rename to drivers/mtd/nand/raw/pxa3xx_nand.c
index fb2f1e20bb..cf8551fce2 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/raw/pxa3xx_nand.c
@@ -1,5 +1,5 @@
 /*
- * drivers/mtd/nand/pxa3xx_nand.c
+ * drivers/mtd/nand/raw/pxa3xx_nand.c
  *
  * Copyright © 2005 Intel Corporation
  * Copyright © 2006 Marvell International Ltd.
diff --git a/drivers/mtd/nand/pxa3xx_nand.h b/drivers/mtd/nand/raw/pxa3xx_nand.h
similarity index 100%
rename from drivers/mtd/nand/pxa3xx_nand.h
rename to drivers/mtd/nand/raw/pxa3xx_nand.h
diff --git a/drivers/mtd/nand/sunxi_nand.c b/drivers/mtd/nand/raw/sunxi_nand.c
similarity index 100%
rename from drivers/mtd/nand/sunxi_nand.c
rename to drivers/mtd/nand/raw/sunxi_nand.c
diff --git a/drivers/mtd/nand/sunxi_nand_spl.c b/drivers/mtd/nand/raw/sunxi_nand_spl.c
similarity index 100%
rename from drivers/mtd/nand/sunxi_nand_spl.c
rename to drivers/mtd/nand/raw/sunxi_nand_spl.c
diff --git a/drivers/mtd/nand/tegra_nand.c b/drivers/mtd/nand/raw/tegra_nand.c
similarity index 100%
rename from drivers/mtd/nand/tegra_nand.c
rename to drivers/mtd/nand/raw/tegra_nand.c
diff --git a/drivers/mtd/nand/tegra_nand.h b/drivers/mtd/nand/raw/tegra_nand.h
similarity index 100%
rename from drivers/mtd/nand/tegra_nand.h
rename to drivers/mtd/nand/raw/tegra_nand.h
diff --git a/drivers/mtd/nand/vf610_nfc.c b/drivers/mtd/nand/raw/vf610_nfc.c
similarity index 100%
rename from drivers/mtd/nand/vf610_nfc.c
rename to drivers/mtd/nand/raw/vf610_nfc.c
diff --git a/drivers/mtd/nand/zynq_nand.c b/drivers/mtd/nand/raw/zynq_nand.c
similarity index 100%
rename from drivers/mtd/nand/zynq_nand.c
rename to drivers/mtd/nand/raw/zynq_nand.c
diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h
index fbc0b05b64..5dab27e370 100644
--- a/include/configs/MPC8313ERDB.h
+++ b/include/configs/MPC8313ERDB.h
@@ -250,7 +250,7 @@
 				/* LB refresh timer prescal, 266MHz/32 */
 #define CONFIG_SYS_LBC_MRTPR	0x20000000  /*TODO */
 
-/* drivers/mtd/nand/nand.c */
+/* drivers/mtd/nand/raw/nand.c */
 #if defined(CONFIG_NAND) && defined(CONFIG_SPL_BUILD)
 #define CONFIG_SYS_NAND_BASE		0xFFF00000
 #else

commit 952e9c19823e23a52220ac5852cc5f4fecc7528d
Author: Miquel Raynal <miquel.raynal@bootlin.com>
Date:   Thu Aug 16 17:30:06 2018 +0200

    UPSTREAM: mtd: move all flash categories inside MTD submenu
    
    There is no reason to have NAND, SPI flashes and UBI sections outside of
    the MTD submenu in Kconfig.
    
    Change-Id: I1c42acb7aa7c359d20edff6452e45331ceadea07
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit ce9bdc87436ef91129876c9b16fcf5111eea69aa)

diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig
index aa66a08ecc..96e9d8baa7 100644
--- a/drivers/mtd/Kconfig
+++ b/drivers/mtd/Kconfig
@@ -65,10 +65,10 @@ config RENESAS_RPC_HF
 	  This enables access to Hyperflash memory through the Renesas
 	  RCar Gen3 RPC controller.
 
-endmenu
-
 source "drivers/mtd/nand/Kconfig"
 
 source "drivers/mtd/spi/Kconfig"
 
 source "drivers/mtd/ubi/Kconfig"
+
+endmenu

commit ac199d1339c1e08fffa59943b86e5015c5f4c7e3
Author: Miquel Raynal <miquel.raynal@bootlin.com>
Date:   Thu Aug 16 17:30:05 2018 +0200

    UPSTREAM: mtd: move definitions to enlarge their range
    
    Some helpers might be useful in a future 'mtd' U-Boot command to parse
    MTD device list.
    
    Change-Id: I127b2a919e781c749271caa8d2186a69edb70982
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit d02f1d36ec6fe6bfadd77fa71b1df228010ddaa8)

diff --git a/drivers/mtd/mtdcore.h b/drivers/mtd/mtdcore.h
index 7b0353399a..1d181a1045 100644
--- a/drivers/mtd/mtdcore.h
+++ b/drivers/mtd/mtdcore.h
@@ -5,7 +5,6 @@
 
 extern struct mutex mtd_table_mutex;
 
-struct mtd_info *__mtd_next_device(int i);
 int add_mtd_device(struct mtd_info *mtd);
 int del_mtd_device(struct mtd_info *mtd);
 int add_mtd_partitions(struct mtd_info *, const struct mtd_partition *, int);
@@ -16,8 +15,3 @@ int parse_mtd_partitions(struct mtd_info *master, const char * const *types,
 
 int __init init_mtdchar(void);
 void __exit cleanup_mtdchar(void);
-
-#define mtd_for_each_device(mtd)			\
-	for ((mtd) = __mtd_next_device(0);		\
-	     (mtd) != NULL;				\
-	     (mtd) = __mtd_next_device(mtd->index + 1))
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index 7cb862d5cf..614d950be4 100644
--- a/include/linux/mtd/mtd.h
+++ b/include/linux/mtd/mtd.h
@@ -534,6 +534,12 @@ int del_mtd_device(struct mtd_info *mtd);
 int add_mtd_partitions(struct mtd_info *, const struct mtd_partition *, int);
 int del_mtd_partitions(struct mtd_info *);
 
+struct mtd_info *__mtd_next_device(int i);
+#define mtd_for_each_device(mtd)			\
+	for ((mtd) = __mtd_next_device(0);		\
+	     (mtd) != NULL;				\
+	     (mtd) = __mtd_next_device(mtd->index + 1))
+
 int mtd_arg_off(const char *arg, int *idx, loff_t *off, loff_t *size,
 		loff_t *maxsize, int devtype, uint64_t chipsize);
 int mtd_arg_off_size(int argc, char *const argv[], int *idx, loff_t *off,

commit fd9fa5805c62135b51e7a621ea7730d66ae400e1
Author: Miquel Raynal <miquel.raynal@bootlin.com>
Date:   Thu Aug 16 17:30:02 2018 +0200

    UPSTREAM: mtd: Fallback to ->_read/write() when ->_read/write_oob() is missing
    
    Some MTD sublayers/drivers are implementing ->_read/write() and
    not ->_read/write_oob().
    
    While for NAND devices both are usually valid, for NOR devices, using
    the _oob variant has no real meaning. But, as the MTD layer is supposed
    to hide as much as possible the flash complexity to the user, there is
    no reason to error out while it is just a matter of rewritting things
    internally.
    
    Add a fallback on mtd->_read() (resp. mtd->_write()) when the user calls
    mtd_read_oob() (resp. mtd_write_oob()) while mtd->_read_oob() (resp.
    mtd->_write_oob) is not implemented. There is already a fallback on the
    _oob variant if the former is used.
    
    Change-Id: Ic8f4749900a2034cfaa103effcdace78242bcbe7
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit ca040d8512f4d93a7eb83f7b8fec8f4b8b1d3192)

diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c
index ba170f212e..61d60e402a 100644
--- a/drivers/mtd/mtdcore.c
+++ b/drivers/mtd/mtdcore.c
@@ -1048,20 +1048,27 @@ int mtd_read_oob(struct mtd_info *mtd, loff_t from, struct mtd_oob_ops *ops)
 {
 	int ret_code;
 	ops->retlen = ops->oobretlen = 0;
-	if (!mtd->_read_oob)
-		return -EOPNOTSUPP;
 
 	ret_code = mtd_check_oob_ops(mtd, from, ops);
 	if (ret_code)
 		return ret_code;
 
+	/* Check the validity of a potential fallback on mtd->_read */
+	if (!mtd->_read_oob && (!mtd->_read || ops->oobbuf))
+		return -EOPNOTSUPP;
+
+	if (mtd->_read_oob)
+		ret_code = mtd->_read_oob(mtd, from, ops);
+	else
+		ret_code = mtd->_read(mtd, from, ops->len, &ops->retlen,
+				      ops->datbuf);
+
 	/*
 	 * In cases where ops->datbuf != NULL, mtd->_read_oob() has semantics
 	 * similar to mtd->_read(), returning a non-negative integer
 	 * representing max bitflips. In other cases, mtd->_read_oob() may
 	 * return -EUCLEAN. In all cases, perform similar logic to mtd_read().
 	 */
-	ret_code = mtd->_read_oob(mtd, from, ops);
 	if (unlikely(ret_code < 0))
 		return ret_code;
 	if (mtd->ecc_strength == 0)
@@ -1076,8 +1083,7 @@ int mtd_write_oob(struct mtd_info *mtd, loff_t to,
 	int ret;
 
 	ops->retlen = ops->oobretlen = 0;
-	if (!mtd->_write_oob)
-		return -EOPNOTSUPP;
+
 	if (!(mtd->flags & MTD_WRITEABLE))
 		return -EROFS;
 
@@ -1085,7 +1091,15 @@ int mtd_write_oob(struct mtd_info *mtd, loff_t to,
 	if (ret)
 		return ret;
 
-	return mtd->_write_oob(mtd, to, ops);
+	/* Check the validity of a potential fallback on mtd->_write */
+	if (!mtd->_write_oob && (!mtd->_write || ops->oobbuf))
+		return -EOPNOTSUPP;
+
+	if (mtd->_write_oob)
+		return mtd->_write_oob(mtd, to, ops);
+	else
+		return mtd->_write(mtd, to, ops->len, &ops->retlen,
+				   ops->datbuf);
 }
 EXPORT_SYMBOL_GPL(mtd_write_oob);
 

commit 300aab2ac13af6f60ecc5d02fc13aeef614e7d66
Author: Boris Brezillon <boris.brezillon@free-electrons.com>
Date:   Thu Aug 16 17:30:01 2018 +0200

    UPSTREAM: mtd: Add sanity checks in mtd_write/read_oob()
    
    Unlike what's done in mtd_read/write(), there are no checks to make sure
    the parameters passed to mtd_read/write_oob() are consistent, which
    forces implementers of ->_read/write_oob() to do it, which in turn leads
    to code duplication and possibly errors in the logic.
    
    Do general sanity checks, like ops fields consistency and range checking.
    
    Change-Id: Ibe2de07dfd3d7504d615b1c22cdcb34c79eca63e
    Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
    Cc: Peter Pan <peterpandong@micron.com>
    Signed-off-by: Richard Weinberger <richard@nod.at>
    [Miquel: squashed the fix about the chip's size check]
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 8fad769f1eab88a2bcf0b714694158968f58715a)

diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c
index c22ca20368..ba170f212e 100644
--- a/drivers/mtd/mtdcore.c
+++ b/drivers/mtd/mtdcore.c
@@ -1011,12 +1011,50 @@ int mtd_panic_write(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen,
 }
 EXPORT_SYMBOL_GPL(mtd_panic_write);
 
+static int mtd_check_oob_ops(struct mtd_info *mtd, loff_t offs,
+			     struct mtd_oob_ops *ops)
+{
+	/*
+	 * Some users are setting ->datbuf or ->oobbuf to NULL, but are leaving
+	 * ->len or ->ooblen uninitialized. Force ->len and ->ooblen to 0 in
+	 *  this case.
+	 */
+	if (!ops->datbuf)
+		ops->len = 0;
+
+	if (!ops->oobbuf)
+		ops->ooblen = 0;
+
+	if (offs < 0 || offs + ops->len > mtd->size)
+		return -EINVAL;
+
+	if (ops->ooblen) {
+		u64 maxooblen;
+
+		if (ops->ooboffs >= mtd_oobavail(mtd, ops))
+			return -EINVAL;
+
+		maxooblen = ((mtd_div_by_ws(mtd->size, mtd) -
+			      mtd_div_by_ws(offs, mtd)) *
+			     mtd_oobavail(mtd, ops)) - ops->ooboffs;
+		if (ops->ooblen > maxooblen)
+			return -EINVAL;
+	}
+
+	return 0;
+}
+
 int mtd_read_oob(struct mtd_info *mtd, loff_t from, struct mtd_oob_ops *ops)
 {
 	int ret_code;
 	ops->retlen = ops->oobretlen = 0;
 	if (!mtd->_read_oob)
 		return -EOPNOTSUPP;
+
+	ret_code = mtd_check_oob_ops(mtd, from, ops);
+	if (ret_code)
+		return ret_code;
+
 	/*
 	 * In cases where ops->datbuf != NULL, mtd->_read_oob() has semantics
 	 * similar to mtd->_read(), returning a non-negative integer
@@ -1035,11 +1073,18 @@ EXPORT_SYMBOL_GPL(mtd_read_oob);
 int mtd_write_oob(struct mtd_info *mtd, loff_t to,
 				struct mtd_oob_ops *ops)
 {
+	int ret;
+
 	ops->retlen = ops->oobretlen = 0;
 	if (!mtd->_write_oob)
 		return -EOPNOTSUPP;
 	if (!(mtd->flags & MTD_WRITEABLE))
 		return -EROFS;
+
+	ret = mtd_check_oob_ops(mtd, to, ops);
+	if (ret)
+		return ret;
+
 	return mtd->_write_oob(mtd, to, ops);
 }
 EXPORT_SYMBOL_GPL(mtd_write_oob);

commit 86db6a459fda5d71b1b50702ed1db3ef79aa2d17
Author: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Date:   Thu Aug 16 17:30:00 2018 +0200

    UPSTREAM: mtd: Uninline mtd_write_oob and move it to mtdcore.c
    
    There's no reason for having mtd_write_oob inlined in mtd.h header.
    Move it to mtdcore.c where it belongs.
    
    Change-Id: I1e06b151912689171ff9c66f95cba13f256d27a1
    Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
    Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
    Signed-off-by: Jacek Anaszewski <j.anaszewski@samsung.com>
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 5f50d82d8918b711717b4bbd96c6f348eb6e2a2c)

diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c
index 15e0ac2f3e..c22ca20368 100644
--- a/drivers/mtd/mtdcore.c
+++ b/drivers/mtd/mtdcore.c
@@ -1032,6 +1032,18 @@ int mtd_read_oob(struct mtd_info *mtd, loff_t from, struct mtd_oob_ops *ops)
 }
 EXPORT_SYMBOL_GPL(mtd_read_oob);
 
+int mtd_write_oob(struct mtd_info *mtd, loff_t to,
+				struct mtd_oob_ops *ops)
+{
+	ops->retlen = ops->oobretlen = 0;
+	if (!mtd->_write_oob)
+		return -EOPNOTSUPP;
+	if (!(mtd->flags & MTD_WRITEABLE))
+		return -EROFS;
+	return mtd->_write_oob(mtd, to, ops);
+}
+EXPORT_SYMBOL_GPL(mtd_write_oob);
+
 /**
  * mtd_ooblayout_ecc - Get the OOB region definition of a specific ECC section
  * @mtd: MTD device structure
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index 0b5e1649bc..7cb862d5cf 100644
--- a/include/linux/mtd/mtd.h
+++ b/include/linux/mtd/mtd.h
@@ -356,17 +356,7 @@ int mtd_panic_write(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen,
 		    const u_char *buf);
 
 int mtd_read_oob(struct mtd_info *mtd, loff_t from, struct mtd_oob_ops *ops);
-
-static inline int mtd_write_oob(struct mtd_info *mtd, loff_t to,
-				struct mtd_oob_ops *ops)
-{
-	ops->retlen = ops->oobretlen = 0;
-	if (!mtd->_write_oob)
-		return -EOPNOTSUPP;
-	if (!(mtd->flags & MTD_WRITEABLE))
-		return -EROFS;
-	return mtd->_write_oob(mtd, to, ops);
-}
+int mtd_write_oob(struct mtd_info *mtd, loff_t to, struct mtd_oob_ops *ops);
 
 int mtd_get_fact_prot_info(struct mtd_info *mtd, size_t len, size_t *retlen,
 			   struct otp_info *buf);

commit 042673ef62d35b992a506e9f43f035c973d36c1d
Author: Boris Brezillon <boris.brezillon@free-electrons.com>
Date:   Thu Aug 16 17:29:59 2018 +0200

    UPSTREAM: mtd: Fallback to ->_read/write_oob() when ->_read/write() is missing
    
    Some MTD sublayers/drivers are implementing ->_read/write_oob() and
    provide dummy wrappers for their ->_read/write() implementations.
    Let the core handle this case instead of duplicating the logic.
    
    Change-Id: I7276effeba2885da48ab4834e272c51a258588dd
    Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
    Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
    Acked-by: Brian Norris <computersforpeace@gmail.com>
    Reviewed-by: Miquel Raynal <miquel.raynal@free-electrons.com>
    Tested-by: Ladislav Michl <ladis@linux-mips.org>
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 596cf083da34c2007f8ec760c8b077f6f28ee655)

diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c
index 2cda0511e8..15e0ac2f3e 100644
--- a/drivers/mtd/mtdcore.c
+++ b/drivers/mtd/mtdcore.c
@@ -938,7 +938,20 @@ int mtd_read(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen,
 	 * representing the maximum number of bitflips that were corrected on
 	 * any one ecc region (if applicable; zero otherwise).
 	 */
-	ret_code = mtd->_read(mtd, from, len, retlen, buf);
+	if (mtd->_read) {
+		ret_code = mtd->_read(mtd, from, len, retlen, buf);
+	} else if (mtd->_read_oob) {
+		struct mtd_oob_ops ops = {
+			.len = len,
+			.datbuf = buf,
+		};
+
+		ret_code = mtd->_read_oob(mtd, from, &ops);
+		*retlen = ops.retlen;
+	} else {
+		return -ENOTSUPP;
+	}
+
 	if (unlikely(ret_code < 0))
 		return ret_code;
 	if (mtd->ecc_strength == 0)
@@ -953,10 +966,24 @@ int mtd_write(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen,
 	*retlen = 0;
 	if (to < 0 || to > mtd->size || len > mtd->size - to)
 		return -EINVAL;
-	if (!mtd->_write || !(mtd->flags & MTD_WRITEABLE))
+	if ((!mtd->_write && !mtd->_write_oob) ||
+	    !(mtd->flags & MTD_WRITEABLE))
 		return -EROFS;
 	if (!len)
 		return 0;
+
+	if (!mtd->_write) {
+		struct mtd_oob_ops ops = {
+			.len = len,
+			.datbuf = (u8 *)buf,
+		};
+		int ret;
+
+		ret = mtd->_write_oob(mtd, to, &ops);
+		*retlen = ops.retlen;
+		return ret;
+	}
+
 	return mtd->_write(mtd, to, len, retlen, buf);
 }
 EXPORT_SYMBOL_GPL(mtd_write);
diff --git a/drivers/mtd/mtdpart.c b/drivers/mtd/mtdpart.c
index 5e42c4b833..b9e0506aeb 100644
--- a/drivers/mtd/mtdpart.c
+++ b/drivers/mtd/mtdpart.c
@@ -418,8 +418,10 @@ static struct mtd_part *allocate_partition(struct mtd_info *master,
 	slave->mtd.dev.parent = master->dev.parent;
 #endif
 
-	slave->mtd._read = part_read;
-	slave->mtd._write = part_write;
+	if (master->_read)
+		slave->mtd._read = part_read;
+	if (master->_write)
+		slave->mtd._write = part_write;
 
 	if (master->_panic_write)
 		slave->mtd._panic_write = part_panic_write;
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 9094f857c1..92daebe120 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -1863,33 +1863,6 @@ read_retry:
 	return max_bitflips;
 }
 
-/**
- * nand_read - [MTD Interface] MTD compatibility function for nand_do_read_ecc
- * @mtd: MTD device structure
- * @from: offset to read from
- * @len: number of bytes to read
- * @retlen: pointer to variable to store the number of read bytes
- * @buf: the databuffer to put data
- *
- * Get hold of the chip and call nand_do_read.
- */
-static int nand_read(struct mtd_info *mtd, loff_t from, size_t len,
-		     size_t *retlen, uint8_t *buf)
-{
-	struct mtd_oob_ops ops;
-	int ret;
-
-	nand_get_device(mtd, FL_READING);
-	memset(&ops, 0, sizeof(ops));
-	ops.len = len;
-	ops.datbuf = buf;
-	ops.mode = MTD_OPS_PLACE_OOB;
-	ret = nand_do_read_ops(mtd, from, &ops);
-	*retlen = ops.retlen;
-	nand_release_device(mtd);
-	return ret;
-}
-
 /**
  * nand_read_oob_std - [REPLACEABLE] the most common OOB data read function
  * @mtd: mtd info structure
@@ -2674,33 +2647,6 @@ static int panic_nand_write(struct mtd_info *mtd, loff_t to, size_t len,
 	return ret;
 }
 
-/**
- * nand_write - [MTD Interface] NAND write with ECC
- * @mtd: MTD device structure
- * @to: offset to write to
- * @len: number of bytes to write
- * @retlen: pointer to variable to store the number of written bytes
- * @buf: the data to write
- *
- * NAND write with ECC.
- */
-static int nand_write(struct mtd_info *mtd, loff_t to, size_t len,
-			  size_t *retlen, const uint8_t *buf)
-{
-	struct mtd_oob_ops ops;
-	int ret;
-
-	nand_get_device(mtd, FL_WRITING);
-	memset(&ops, 0, sizeof(ops));
-	ops.len = len;
-	ops.datbuf = (uint8_t *)buf;
-	ops.mode = MTD_OPS_PLACE_OOB;
-	ret = nand_do_write_ops(mtd, to, &ops);
-	*retlen = ops.retlen;
-	nand_release_device(mtd);
-	return ret;
-}
-
 /**
  * nand_do_write_oob - [MTD Interface] NAND write out-of-band
  * @mtd: MTD device structure
@@ -4620,8 +4566,6 @@ int nand_scan_tail(struct mtd_info *mtd)
 	mtd->flags = (chip->options & NAND_ROM) ? MTD_CAP_ROM :
 						MTD_CAP_NANDFLASH;
 	mtd->_erase = nand_erase;
-	mtd->_read = nand_read;
-	mtd->_write = nand_write;
 	mtd->_panic_write = panic_nand_write;
 	mtd->_read_oob = nand_read_oob;
 	mtd->_write_oob = nand_write_oob;
diff --git a/drivers/mtd/onenand/onenand_base.c b/drivers/mtd/onenand/onenand_base.c
index 86b1640357..371e2ecaa7 100644
--- a/drivers/mtd/onenand/onenand_base.c
+++ b/drivers/mtd/onenand/onenand_base.c
@@ -2656,8 +2656,6 @@ int onenand_probe(struct mtd_info *mtd)
 
 	mtd->flags = MTD_CAP_NANDFLASH;
 	mtd->_erase = onenand_erase;
-	mtd->_read = onenand_read;
-	mtd->_write = onenand_write;
 	mtd->_read_oob = onenand_read_oob;
 	mtd->_write_oob = onenand_write_oob;
 	mtd->_sync = onenand_sync;

commit 61f292ed8a56e6bf43c05f2ceacd684a716b8d4a
Author: David Sniatkiwicz <davidsn@marvell.com>
Date:   Wed Aug 29 11:56:18 2018 +0300

    UPSTREAM: fix: nand: pxa3xx: Add WA for eliminating flash ready timeout
    
    add delay before processing the status flags in pxa3xx_nand_irq().
    
    Change-Id: I06cb7459b9f1127ce8d66b04fdaedc026b4c77da
    Signed-off-by: David Sniatkiwicz <davidsn@marvell.com>
    Reviewed-by: Igal Liberman <igall@marvell.com>
    Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
    c: Stefan Roese <sr@denx.de>
    Cc: Simon Glass <sjg@chromium.org>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit e76afd84095a10e7cd9d8ee6b74ed94941e5f4f8)

diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index 74fca44ff8..fb2f1e20bb 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -669,6 +669,9 @@ static irqreturn_t pxa3xx_nand_irq(struct pxa3xx_nand_info *info)
 		cmd_done        = NDSR_CS1_CMDD;
 	}
 
+	/* TODO - find out why we need the delay during write operation. */
+	ndelay(1);
+
 	status = nand_readl(info, NDSR);
 
 	if (status & NDSR_UNCORERR)

commit 707def3015d0b197c6d9cf9b20a0b4b7408be57d
Author: Konstantin Porotchkin <kostap@marvell.com>
Date:   Wed Aug 29 11:56:17 2018 +0300

    UPSTREAM: nand: pxa3xx: Add support for 8KB page 4 and 8 bit ECC NAND
    
    Add support for NAND chips with 8KB page, 4 and 8 bit ECC (ONFI).
    
    Change-Id: I9fbcd1b11f5ef22d352730b44be5f84cacc255aa
    Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
    Reviewed-by: Ofer Heifetz <oferh@marvell.com>
    Cc: Stefan Roese <sr@denx.de>
    Cc: Simon Glass <sjg@chromium.org>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit b7b3f2c8bbf346b29f877b61d7e2b12a877b01d0)

diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index 0abf15de96..74fca44ff8 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -353,6 +353,33 @@ static struct nand_ecclayout ecc_layout_4KB_bch4bit = {
 	.oobfree = { {6, 26}, { 64, 32} }
 };
 
+static struct nand_ecclayout ecc_layout_8KB_bch4bit = {
+	.eccbytes = 128,
+	.eccpos = {
+		32,  33,  34,  35,  36,  37,  38,  39,
+		40,  41,  42,  43,  44,  45,  46,  47,
+		48,  49,  50,  51,  52,  53,  54,  55,
+		56,  57,  58,  59,  60,  61,  62,  63,
+
+		96,  97,  98,  99,  100, 101, 102, 103,
+		104, 105, 106, 107, 108, 109, 110, 111,
+		112, 113, 114, 115, 116, 117, 118, 119,
+		120, 121, 122, 123, 124, 125, 126, 127,
+
+		160, 161, 162, 163, 164, 165, 166, 167,
+		168, 169, 170, 171, 172, 173, 174, 175,
+		176, 177, 178, 179, 180, 181, 182, 183,
+		184, 185, 186, 187, 188, 189, 190, 191,
+
+		224, 225, 226, 227, 228, 229, 230, 231,
+		232, 233, 234, 235, 236, 237, 238, 239,
+		240, 241, 242, 243, 244, 245, 246, 247,
+		248, 249, 250, 251, 252, 253, 254, 255},
+
+	/* Bootrom looks in bytes 0 & 5 for bad blocks */
+	.oobfree = { {1, 4}, {6, 26}, { 64, 32}, {128, 32}, {192, 32} }
+};
+
 static struct nand_ecclayout ecc_layout_4KB_bch8bit = {
 	.eccbytes = 128,
 	.eccpos = {
@@ -363,6 +390,13 @@ static struct nand_ecclayout ecc_layout_4KB_bch8bit = {
 	.oobfree = { }
 };
 
+static struct nand_ecclayout ecc_layout_8KB_bch8bit = {
+	.eccbytes = 256,
+	.eccpos = {},
+	/* HW ECC handles all ECC data and all spare area is free for OOB */
+	.oobfree = {{0, 160} }
+};
+
 #define NDTR0_tCH(c)	(min((c), 7) << 19)
 #define NDTR0_tCS(c)	(min((c), 7) << 16)
 #define NDTR0_tWH(c)	(min((c), 7) << 11)
@@ -1429,10 +1463,36 @@ static int pxa_ecc_init(struct pxa3xx_nand_info *info,
 		ecc->layout = &ecc_layout_4KB_bch4bit;
 		ecc->strength = 16;
 
+	} else if (strength == 4 && ecc_stepsize == 512 && page_size == 8192) {
+		info->ecc_bch = 1;
+		info->nfullchunks = 4;
+		info->ntotalchunks = 4;
+		info->chunk_size = 2048;
+		info->spare_size = 32;
+		info->ecc_size = 32;
+		ecc->mode = NAND_ECC_HW;
+		ecc->size = info->chunk_size;
+		ecc->layout = &ecc_layout_8KB_bch4bit;
+		ecc->strength = 16;
+
 	/*
 	 * Required ECC: 8-bit correction per 512 bytes
 	 * Select: 16-bit correction per 1024 bytes
 	 */
+	} else if (strength == 8 && ecc_stepsize == 512 && page_size == 2048) {
+		info->ecc_bch = 1;
+		info->nfullchunks = 1;
+		info->ntotalchunks = 2;
+		info->chunk_size = 1024;
+		info->spare_size = 0;
+		info->last_chunk_size = 1024;
+		info->last_spare_size = 64;
+		info->ecc_size = 32;
+		ecc->mode = NAND_ECC_HW;
+		ecc->size = info->chunk_size;
+		ecc->layout = &ecc_layout_2KB_bch8bit;
+		ecc->strength = 16;
+
 	} else if (strength == 8 && ecc_stepsize == 512 && page_size == 4096) {
 		info->ecc_bch = 1;
 		info->nfullchunks = 4;
@@ -1447,18 +1507,18 @@ static int pxa_ecc_init(struct pxa3xx_nand_info *info,
 		ecc->layout = &ecc_layout_4KB_bch8bit;
 		ecc->strength = 16;
 
-	} else if (strength == 8 && ecc_stepsize == 512 && page_size == 2048) {
+	} else if (strength == 8 && ecc_stepsize == 512 && page_size == 8192) {
 		info->ecc_bch = 1;
-		info->nfullchunks = 1;
-		info->ntotalchunks = 2;
+		info->nfullchunks = 8;
+		info->ntotalchunks = 9;
 		info->chunk_size = 1024;
 		info->spare_size = 0;
-		info->last_chunk_size = 1024;
-		info->last_spare_size = 64;
+		info->last_chunk_size = 0;
+		info->last_spare_size = 160;
 		info->ecc_size = 32;
 		ecc->mode = NAND_ECC_HW;
 		ecc->size = info->chunk_size;
-		ecc->layout = &ecc_layout_2KB_bch8bit;
+		ecc->layout = &ecc_layout_8KB_bch8bit;
 		ecc->strength = 16;
 
 	} else {

commit e16be99ddec8aeb2264377dc05ff932fa891748c
Author: Konstantin Porotchkin <kostap@marvell.com>
Date:   Wed Aug 29 11:56:16 2018 +0300

    UPSTREAM: nand: pxa3xx: cosmetic: add comments to the timing layout structures
    
    Add comments with timing parameter names and some details about
    nand layout fileds.
    Remove unneeded definition.
    
    Change-Id: I82d550b47e92bf0ec3c4aaadd6bd0a537fb96ce5
    Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
    Reviewed-by: Igal Liberman <igall@marvell.com>
    Cc: Stefan Roese <sr@denx.de>
    Cc: Simon Glass <sjg@chromium.org>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit e9a0777f851c3ffa5ece59921427d89bab1d7506)

diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index e4299b24b2..0abf15de96 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -62,7 +62,6 @@ DECLARE_GLOBAL_DATA_PTR;
 #define NDCR_NAND_MODE		(0x0)
 #define NDCR_CLR_PG_CNT		(0x1 << 20)
 #define NFCV1_NDCR_ARB_CNTL	(0x1 << 19)
-#define NFCV2_NDCR_STOP_ON_UNCOR	(0x1 << 19)
 #define NDCR_RD_ID_CNT_MASK	(0x7 << 16)
 #define NDCR_RD_ID_CNT(x)	(((x) << 16) & NDCR_RD_ID_CNT_MASK)
 
@@ -252,6 +251,17 @@ struct pxa3xx_nand_info {
 };
 
 static struct pxa3xx_nand_timing timing[] = {
+	/*
+	 * tCH	Enable signal hold time
+	 * tCS	Enable signal setup time
+	 * tWH	ND_nWE high duration
+	 * tWP	ND_nWE pulse time
+	 * tRH	ND_nRE high duration
+	 * tRP	ND_nRE pulse width
+	 * tR	ND_nWE high to ND_nRE low for read
+	 * tWHR	ND_nWE high to ND_nRE low for status read
+	 * tAR	ND_ALE low to ND_nRE low delay
+	 */
 	/*ch  cs  wh  wp   rh  rp   r      whr  ar */
 	{ 40, 80, 60, 100, 80, 100, 90000, 400, 40, },
 	{ 10,  0, 20,  40, 30,  40, 11123, 110, 10, },
@@ -261,6 +271,13 @@ static struct pxa3xx_nand_timing timing[] = {
 };
 
 static struct pxa3xx_nand_flash builtin_flash_types[] = {
+	/*
+	 * chip_id
+	 * flash_width	Width of Flash memory (DWIDTH_M)
+	 * dfc_width	Width of flash controller(DWIDTH_C)
+	 * *timing
+	 * http://www.linux-mtd.infradead.org/nand-data/nanddata.html
+	 */
 	{ 0x46ec, 16, 16, &timing[1] },
 	{ 0xdaec,  8,  8, &timing[1] },
 	{ 0xd7ec,  8,  8, &timing[1] },
@@ -1429,6 +1446,7 @@ static int pxa_ecc_init(struct pxa3xx_nand_info *info,
 		ecc->size = info->chunk_size;
 		ecc->layout = &ecc_layout_4KB_bch8bit;
 		ecc->strength = 16;
+
 	} else if (strength == 8 && ecc_stepsize == 512 && page_size == 2048) {
 		info->ecc_bch = 1;
 		info->nfullchunks = 1;
@@ -1442,6 +1460,7 @@ static int pxa_ecc_init(struct pxa3xx_nand_info *info,
 		ecc->size = info->chunk_size;
 		ecc->layout = &ecc_layout_2KB_bch8bit;
 		ecc->strength = 16;
+
 	} else {
 		dev_err(&info->pdev->dev,
 			"ECC strength %d at page size %d is not supported\n",

commit 42109d1042e061496f6ae26e507107cbc19bb3b3
Author: Konstantin Porotchkin <kostap@marvell.com>
Date:   Wed Aug 29 11:56:15 2018 +0300

    UPSTREAM: fix: nand: Replace hardcoded page chunk size with calculated one
    
    Replace the hardcoded value of page chink with value that
    depends on flash page size and ECC strength.
    This fixes nand access errors for 2K page flashes with 8-bit ECC.
    Move the initial flash commannd function assignment past the ECC
    structures initialization for eliminating usage of hardcoded page
    chunk size value.
    
    Change-Id: I3d75d6b65012ca38572d75e505bb085b643830d6
    Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
    Reviewed-by: Igal Liberman <igall@marvell.com>
    Cc: Stefan Roese <sr@denx.de>
    Cc: Simon Glass <sjg@chromium.org>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 2057eb0b163ac31fee00ae6ef9e8e27dcca65fd5)

diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index cccd14e8ae..e4299b24b2 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -25,7 +25,6 @@ DECLARE_GLOBAL_DATA_PTR;
 #define TIMEOUT_DRAIN_FIFO	5	/* in ms */
 #define	CHIP_DELAY_TIMEOUT	200
 #define NAND_STOP_DELAY		40
-#define PAGE_CHUNK_SIZE		(2048)
 
 /*
  * Define a buffer size for the initial command that detects the flash device:
@@ -704,7 +703,7 @@ static void set_command_address(struct pxa3xx_nand_info *info,
 		unsigned int page_size, uint16_t column, int page_addr)
 {
 	/* small page addr setting */
-	if (page_size < PAGE_CHUNK_SIZE) {
+	if (page_size < info->chunk_size) {
 		info->ndcb1 = ((page_addr & 0xFFFFFF) << 8)
 				| (column & 0xFF);
 
@@ -814,9 +813,9 @@ static int prepare_set_command(struct pxa3xx_nand_info *info, int command,
 		 * which is either naked-read or last-read according to the
 		 * state.
 		 */
-		if (mtd->writesize == PAGE_CHUNK_SIZE) {
+		if (mtd->writesize == info->chunk_size) {
 			info->ndcb0 |= NDCB0_DBC | (NAND_CMD_READSTART << 8);
-		} else if (mtd->writesize > PAGE_CHUNK_SIZE) {
+		} else if (mtd->writesize > info->chunk_size) {
 			info->ndcb0 |= NDCB0_DBC | (NAND_CMD_READSTART << 8)
 					| NDCB0_LEN_OVRD
 					| NDCB0_EXT_CMD_TYPE(ext_cmd_type);
@@ -836,7 +835,7 @@ static int prepare_set_command(struct pxa3xx_nand_info *info, int command,
 		 * Multiple page programming needs to execute the initial
 		 * SEQIN command that sets the page address.
 		 */
-		if (mtd->writesize > PAGE_CHUNK_SIZE) {
+		if (mtd->writesize > info->chunk_size) {
 			info->ndcb0 |= NDCB0_CMD_TYPE(0x1)
 				| NDCB0_EXT_CMD_TYPE(ext_cmd_type)
 				| addr_cycle
@@ -861,7 +860,7 @@ static int prepare_set_command(struct pxa3xx_nand_info *info, int command,
 		}
 
 		/* Second command setting for large pages */
-		if (mtd->writesize > PAGE_CHUNK_SIZE) {
+		if (mtd->writesize > info->chunk_size) {
 			/*
 			 * Multiple page write uses the 'extended command'
 			 * field. This can be used to issue a command dispatch
@@ -1287,7 +1286,6 @@ static int pxa3xx_nand_config_ident(struct pxa3xx_nand_info *info)
 	struct pxa3xx_nand_platform_data *pdata = info->pdata;
 
 	/* Configure default flash values */
-	info->chunk_size = PAGE_CHUNK_SIZE;
 	info->reg_ndcr = 0x0; /* enable all interrupts */
 	info->reg_ndcr |= (pdata->enable_arbiter) ? NDCR_ND_ARB_EN : 0;
 	info->reg_ndcr |= NDCR_RD_ID_CNT(READ_ID_BYTES);
@@ -1504,21 +1502,6 @@ static int pxa3xx_nand_scan(struct mtd_info *mtd)
 	chip->bbt_md = &bbt_mirror_descr;
 #endif
 
-	/*
-	 * If the page size is bigger than the FIFO size, let's check
-	 * we are given the right variant and then switch to the extended
-	 * (aka splitted) command handling,
-	 */
-	if (mtd->writesize > PAGE_CHUNK_SIZE) {
-		if (info->variant == PXA3XX_NAND_VARIANT_ARMADA370) {
-			chip->cmdfunc = nand_cmdfunc_extended;
-		} else {
-			dev_err(&info->pdev->dev,
-				"unsupported page size on this variant\n");
-			return -ENODEV;
-		}
-	}
-
 	if (pdata->ecc_strength && pdata->ecc_step_size) {
 		ecc_strength = pdata->ecc_strength;
 		ecc_step = pdata->ecc_step_size;
@@ -1538,6 +1521,21 @@ static int pxa3xx_nand_scan(struct mtd_info *mtd)
 	if (ret)
 		return ret;
 
+	/*
+	 * If the page size is bigger than the FIFO size, let's check
+	 * we are given the right variant and then switch to the extended
+	 * (aka split) command handling,
+	 */
+	if (mtd->writesize > info->chunk_size) {
+		if (info->variant == PXA3XX_NAND_VARIANT_ARMADA370) {
+			chip->cmdfunc = nand_cmdfunc_extended;
+		} else {
+			dev_err(&info->pdev->dev,
+				"unsupported page size on this variant\n");
+			return -ENODEV;
+		}
+	}
+
 	/* calculate addressing information */
 	if (mtd->writesize >= 2048)
 		host->col_addr_cycles = 2;

commit 378400604ed77edd54da92fe92de6dcdccaa79f1
Author: Konstantin Porotchkin <kostap@marvell.com>
Date:   Wed Aug 29 11:56:14 2018 +0300

    UPSTREAM: mtd: nand: pxa3xx: add support for Toshiba flash
    
    Add timings and device ID for Toshiba TC58NVG1S3HTA00 flash
    
    Change-Id: I7aa6eb7f84b5063e5497355058cbe3bc00519f2a
    Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
    Reviewed-by: Igal Liberman <igall@marvell.com>
    Cc: Stefan Roese <sr@denx.de>
    Cc: Simon Glass <sjg@chromium.org>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit b0d7c106c9703498f12bb1254b02574c803874a0)

diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index efd0a9263d..cccd14e8ae 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -253,10 +253,12 @@ struct pxa3xx_nand_info {
 };
 
 static struct pxa3xx_nand_timing timing[] = {
+	/*ch  cs  wh  wp   rh  rp   r      whr  ar */
 	{ 40, 80, 60, 100, 80, 100, 90000, 400, 40, },
 	{ 10,  0, 20,  40, 30,  40, 11123, 110, 10, },
 	{ 10, 25, 15,  25, 15,  30, 25000,  60, 10, },
 	{ 10, 35, 15,  25, 15,  25, 25000,  60, 10, },
+	{  5, 20, 10,  12, 10,  12, 25000,  60, 10, },
 };
 
 static struct pxa3xx_nand_flash builtin_flash_types[] = {
@@ -268,6 +270,7 @@ static struct pxa3xx_nand_flash builtin_flash_types[] = {
 	{ 0xdc2c,  8,  8, &timing[2] },
 	{ 0xcc2c, 16, 16, &timing[2] },
 	{ 0xba20, 16, 16, &timing[3] },
+	{ 0xda98,  8,  8, &timing[4] },
 };
 
 #ifdef CONFIG_SYS_NAND_USE_FLASH_BBT

commit e385769d04aa3dd993bc9a0858e4b46c04244cd2
Author: Victor Axelrod <victora@marvell.com>
Date:   Wed Aug 29 11:56:13 2018 +0300

    UPSTREAM: mtd: nand: pxa3xx: add support for 2KB 8-bit flash
    
    Add support for 2KB page 8-bit ECC strength flash layout
    
    Change-Id: I3a4f2712c7107be83d2c63adc2c62841f4dac56d
    Signed-off-by: Victor Axelrod <victora@marvell.com>
    Reviewed-by: Igal Liberman <igall@marvell.com>
    Cc: Stefan Roese <sr@denx.de>
    Cc: Simon Glass <sjg@chromium.org>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit ac56a3b30cc74f2c9dd667705e756ff5f5aeda0f)

diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index 0056418811..efd0a9263d 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -305,6 +305,20 @@ static struct nand_ecclayout ecc_layout_2KB_bch4bit = {
 	.oobfree = { {2, 30} }
 };
 
+static struct nand_ecclayout ecc_layout_2KB_bch8bit = {
+	.eccbytes = 64,
+	.eccpos = {
+		64,  65,  66,  67,  68,  69,  70,  71,
+		72,  73,  74,  75,  76,  77,  78,  79,
+		80,  81,  82,  83,  84,  85,  86,  87,
+		88,  89,  90,  91,  92,  93,  94,  95,
+		96,  97,  98,  99,  100, 101, 102, 103,
+		104, 105, 106, 107, 108, 109, 110, 111,
+		112, 113, 114, 115, 116, 117, 118, 119,
+		120, 121, 122, 123, 124, 125, 126, 127},
+	.oobfree = { {1, 4}, {6, 26} }
+};
+
 static struct nand_ecclayout ecc_layout_4KB_bch4bit = {
 	.eccbytes = 64,
 	.eccpos = {
@@ -1414,6 +1428,19 @@ static int pxa_ecc_init(struct pxa3xx_nand_info *info,
 		ecc->size = info->chunk_size;
 		ecc->layout = &ecc_layout_4KB_bch8bit;
 		ecc->strength = 16;
+	} else if (strength == 8 && ecc_stepsize == 512 && page_size == 2048) {
+		info->ecc_bch = 1;
+		info->nfullchunks = 1;
+		info->ntotalchunks = 2;
+		info->chunk_size = 1024;
+		info->spare_size = 0;
+		info->last_chunk_size = 1024;
+		info->last_spare_size = 64;
+		info->ecc_size = 32;
+		ecc->mode = NAND_ECC_HW;
+		ecc->size = info->chunk_size;
+		ecc->layout = &ecc_layout_2KB_bch8bit;
+		ecc->strength = 16;
 	} else {
 		dev_err(&info->pdev->dev,
 			"ECC strength %d at page size %d is not supported\n",

commit 189ae2d2b017aefb3e1703c37b774a98a3e09f20
Author: Boris Brezillon <boris.brezillon@free-electrons.com>
Date:   Wed Aug 29 11:56:12 2018 +0300

    UPSTREAM: mtd: nand: pxa3xx: Fix READOOB implementation
    
    In the current driver, OOB bytes are accessed in raw mode, and when a
    page access is done with NDCR_SPARE_EN set and NDCR_ECC_EN cleared, the
    driver must read the whole spare area (64 bytes in case of a 2k page,
    16 bytes for a 512 page). The driver was only reading the free OOB
    bytes, which was leaving some unread data in the FIFO and was somehow
    leading to a timeout.
    
    We could patch the driver to read ->spare_size + ->ecc_size instead of
    just ->spare_size when READOOB is requested, but we'd better make
    in-band and OOB accesses consistent.
    Since the driver is always accessing in-band data in non-raw mode (with
    the ECC engine enabled), we should also access OOB data in this mode.
    That's particularly useful when using the BCH engine because in this
    mode the free OOB bytes are also ECC protected.
    
    Fixes: 43bcfd2bb24a ("mtd: nand: pxa3xx: Add driver-specific ECC BCH support")
    Cc: stable@vger.kernel.org
    Change-Id: I4b53b3f4fd84e58ca78d01492a3768ba5ba4eaa0
    Reported-by: Sean Nyekjær <sean.nyekjaer@prevas.dk>
    Tested-by: Willy Tarreau <w@1wt.eu>
    Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
    Acked-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
    Tested-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk>
    Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
    Signed-off-by: Richard Weinberger <richard@nod.at>
    Signed-off-by: Ofer Heifetz <oferh@marvell.com>
    Reviewed-by: Igal Liberman <igall@marvell.com>
    Cc: Stefan Roese <sr@denx.de>
    Cc: Simon Glass <sjg@chromium.org>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit f3d235702de09622a542ba2830882d23e2dfee1f)

diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index 1f8868763b..0056418811 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -725,6 +725,7 @@ static void prepare_start_command(struct pxa3xx_nand_info *info, int command)
 
 	switch (command) {
 	case NAND_CMD_READ0:
+	case NAND_CMD_READOOB:
 	case NAND_CMD_PAGEPROG:
 		info->use_ecc = 1;
 		break;

commit 9a2304c22bd318b1e61670a005b7b4ff44544b6a
Author: Ofer Heifetz <oferh@marvell.com>
Date:   Wed Aug 29 11:56:09 2018 +0300

    UPSTREAM: mtd: nand: pxa3xx_nand: add support for partial chunks
    
    This commit is needed to properly support the 8-bits ECC configuration
    with 4KB pages.
    
    When pages larger than 2 KB are used on platforms using the PXA3xx
    NAND controller, the reading/programming operations need to be split
    in chunks of 2 KBs or less because the controller FIFO is limited to
    about 2 KB (i.e a bit more than 2 KB to accommodate OOB data). Due to
    this requirement, the data layout on NAND is a bit strange, with ECC
    interleaved with data, at the end of each chunk.
    
    When a 4-bits ECC configuration is used with 4 KB pages, the physical
    data layout on the NAND looks like this:
    
    | 2048 data | 32 spare | 30 ECC | 2048 data | 32 spare | 30 ECC |
    
    So the data chunks have an equal size, 2080 bytes for each chunk,
    which the driver supports properly.
    
    When a 8-bits ECC configuration is used with 4KB pages, the physical
    data layout on the NAND looks like this:
    
    | 1024 data | 30 ECC | 1024 data | 30 ECC | 1024 data | 30 ECC | 1024 data | 30 ECC | 64 spare | 30 ECC |
    
    So, the spare area is stored in its own chunk, which has a different
    size than the other chunks. Since OOB is not used by UBIFS, the initial
    implementation of the driver has chosen to not support reading this
    additional "spare" chunk of data.
    
    Unfortunately, Marvell has chosen to store the BBT signature in the
    OOB area. Therefore, if the driver doesn't read this spare area, Linux
    has no way of finding the BBT. It thinks there is no BBT, and rewrites
    one, which U-Boot does not recognize, causing compatibility problems
    between the bootloader and the kernel in terms of NAND usage.
    
    To fix this, this commit implements the support for reading a partial
    last chunk. This support is currently only useful for the case of 8
    bits ECC with 4 KB pages, but it will be useful in the future to
    enable other configurations such as 12 bits and 16 bits ECC with 4 KB
    pages, or 8 bits ECC with 8 KB pages, etc. All those configurations
    have a "last" chunk that doesn't have the same size as the other
    chunks.
    
    In order to implement reading of the last chunk, this commit:
    
     - Adds a number of new fields to the pxa3xx_nand_info to describe how
       many full chunks and how many chunks we have, the size of full
       chunks and partial chunks, both in terms of data area and spare
       area.
    
     - Fills in the step_chunk_size and step_spare_size variables to
       describe how much data and spare should be read/written for the
       current read/program step.
    
     - Reworks the state machine to accommodate doing the additional read
       or program step when a last partial chunk is used.
    
    This commit is taken from Linux:
    'commit c2cdace755b'
    ("mtd: nand: pxa3xx_nand: add support for partial chunks")
    
    Change-Id: I63a98c133cbadb1cfe1b1919bf08182e5ea99c47
    Signed-off-by: Chris Packham <judge.packham@gmail.com>
    Signed-off-by: Ofer Heifetz <oferh@marvell.com>
    Reviewed-by: Igal Liberman <igall@marvell.com>
    Cc: Stefan Roese <sr@denx.de>
    Cc: Simon Glass <sjg@chromium.org>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit b47f677931b2255d0d454e100590e94f0dd97f55)

diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index 5f6094fab7..1f8868763b 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -202,15 +202,44 @@ struct pxa3xx_nand_info {
 	int			use_spare;	/* use spare ? */
 	int			need_wait;
 
-	unsigned int		data_size;	/* data to be read from FIFO */
-	unsigned int		chunk_size;	/* split commands chunk size */
-	unsigned int		oob_size;
+	/* Amount of real data per full chunk */
+	unsigned int		chunk_size;
+
+	/* Amount of spare data per full chunk */
 	unsigned int		spare_size;
+
+	/* Number of full chunks (i.e chunk_size + spare_size) */
+	unsigned int            nfullchunks;
+
+	/*
+	 * Total number of chunks. If equal to nfullchunks, then there
+	 * are only full chunks. Otherwise, there is one last chunk of
+	 * size (last_chunk_size + last_spare_size)
+	 */
+	unsigned int            ntotalchunks;
+
+	/* Amount of real data in the last chunk */
+	unsigned int		last_chunk_size;
+
+	/* Amount of spare data in the last chunk */
+	unsigned int		last_spare_size;
+
 	unsigned int		ecc_size;
 	unsigned int		ecc_err_cnt;
 	unsigned int		max_bitflips;
 	int			retcode;
 
+	/*
+	 * Variables only valid during command
+	 * execution. step_chunk_size and step_spare_size is the
+	 * amount of real data and spare data in the current
+	 * chunk. cur_chunk is the current chunk being
+	 * read/programmed.
+	 */
+	unsigned int		step_chunk_size;
+	unsigned int		step_spare_size;
+	unsigned int            cur_chunk;
+
 	/* cached register value */
 	uint32_t		reg_ndcr;
 	uint32_t		ndtr0cs0;
@@ -437,25 +466,6 @@ static int pxa3xx_nand_init_timings(struct pxa3xx_nand_host *host)
 	return 0;
 }
 
-/*
- * Set the data and OOB size, depending on the selected
- * spare and ECC configuration.
- * Only applicable to READ0, READOOB and PAGEPROG commands.
- */
-static void pxa3xx_set_datasize(struct pxa3xx_nand_info *info,
-				struct mtd_info *mtd)
-{
-	int oob_enable = info->reg_ndcr & NDCR_SPARE_EN;
-
-	info->data_size = mtd->writesize;
-	if (!oob_enable)
-		return;
-
-	info->oob_size = info->spare_size;
-	if (!info->use_ecc)
-		info->oob_size += info->ecc_size;
-}
-
 /**
  * NOTE: it is a must to set ND_RUN first, then write
  * command buffer, otherwise, it does not work.
@@ -536,39 +546,38 @@ static void drain_fifo(struct pxa3xx_nand_info *info, void *data, int len)
 
 static void handle_data_pio(struct pxa3xx_nand_info *info)
 {
-	unsigned int do_bytes = min(info->data_size, info->chunk_size);
-
 	switch (info->state) {
 	case STATE_PIO_WRITING:
-		writesl(info->mmio_base + NDDB,
-			info->data_buff + info->data_buff_pos,
-			DIV_ROUND_UP(do_bytes, 4));
+		if (info->step_chunk_size)
+			writesl(info->mmio_base + NDDB,
+				info->data_buff + info->data_buff_pos,
+				DIV_ROUND_UP(info->step_chunk_size, 4));
 
-		if (info->oob_size > 0)
+		if (info->step_spare_size)
 			writesl(info->mmio_base + NDDB,
 				info->oob_buff + info->oob_buff_pos,
-				DIV_ROUND_UP(info->oob_size, 4));
+				DIV_ROUND_UP(info->step_spare_size, 4));
 		break;
 	case STATE_PIO_READING:
-		drain_fifo(info,
-			   info->data_buff + info->data_buff_pos,
-			   DIV_ROUND_UP(do_bytes, 4));
+		if (info->step_chunk_size)
+			drain_fifo(info,
+				   info->data_buff + info->data_buff_pos,
+				   DIV_ROUND_UP(info->step_chunk_size, 4));
 
-		if (info->oob_size > 0)
+		if (info->step_spare_size)
 			drain_fifo(info,
 				   info->oob_buff + info->oob_buff_pos,
-				   DIV_ROUND_UP(info->oob_size, 4));
+				   DIV_ROUND_UP(info->step_spare_size, 4));
 		break;
 	default:
 		dev_err(&info->pdev->dev, "%s: invalid state %d\n", __func__,
-			info->state);
+				info->state);
 		BUG();
 	}
 
 	/* Update buffer pointers for multi-page read/write */
-	info->data_buff_pos += do_bytes;
-	info->oob_buff_pos += info->oob_size;
-	info->data_size -= do_bytes;
+	info->data_buff_pos += info->step_chunk_size;
+	info->oob_buff_pos += info->step_spare_size;
 }
 
 static void pxa3xx_nand_irq_thread(struct pxa3xx_nand_info *info)
@@ -702,9 +711,11 @@ static void prepare_start_command(struct pxa3xx_nand_info *info, int command)
 	/* reset data and oob column point to handle data */
 	info->buf_start		= 0;
 	info->buf_count		= 0;
-	info->oob_size		= 0;
 	info->data_buff_pos	= 0;
 	info->oob_buff_pos	= 0;
+	info->step_chunk_size   = 0;
+	info->step_spare_size   = 0;
+	info->cur_chunk         = 0;
 	info->use_ecc		= 0;
 	info->use_spare		= 1;
 	info->retcode		= ERR_NONE;
@@ -716,8 +727,6 @@ static void prepare_start_command(struct pxa3xx_nand_info *info, int command)
 	case NAND_CMD_READ0:
 	case NAND_CMD_PAGEPROG:
 		info->use_ecc = 1;
-	case NAND_CMD_READOOB:
-		pxa3xx_set_datasize(info, mtd);
 		break;
 	case NAND_CMD_PARAM:
 		info->use_spare = 0;
@@ -774,6 +783,14 @@ static int prepare_set_command(struct pxa3xx_nand_info *info, int command,
 		if (command == NAND_CMD_READOOB)
 			info->buf_start += mtd->writesize;
 
+		if (info->cur_chunk < info->nfullchunks) {
+			info->step_chunk_size = info->chunk_size;
+			info->step_spare_size = info->spare_size;
+		} else {
+			info->step_chunk_size = info->last_chunk_size;
+			info->step_spare_size = info->last_spare_size;
+		}
+
 		/*
 		 * Multiple page read needs an 'extended command type' field,
 		 * which is either naked-read or last-read according to the
@@ -785,8 +802,8 @@ static int prepare_set_command(struct pxa3xx_nand_info *info, int command,
 			info->ndcb0 |= NDCB0_DBC | (NAND_CMD_READSTART << 8)
 					| NDCB0_LEN_OVRD
 					| NDCB0_EXT_CMD_TYPE(ext_cmd_type);
-			info->ndcb3 = info->chunk_size +
-				      info->oob_size;
+			info->ndcb3 = info->step_chunk_size +
+				info->step_spare_size;
 		}
 
 		set_command_address(info, mtd->writesize, column, page_addr);
@@ -806,8 +823,6 @@ static int prepare_set_command(struct pxa3xx_nand_info *info, int command,
 				| NDCB0_EXT_CMD_TYPE(ext_cmd_type)
 				| addr_cycle
 				| command;
-			/* No data transfer in this case */
-			info->data_size = 0;
 			exec_cmd = 1;
 		}
 		break;
@@ -819,6 +834,14 @@ static int prepare_set_command(struct pxa3xx_nand_info *info, int command,
 			break;
 		}
 
+		if (info->cur_chunk < info->nfullchunks) {
+			info->step_chunk_size = info->chunk_size;
+			info->step_spare_size = info->spare_size;
+		} else {
+			info->step_chunk_size = info->last_chunk_size;
+			info->step_spare_size = info->last_spare_size;
+		}
+
 		/* Second command setting for large pages */
 		if (mtd->writesize > PAGE_CHUNK_SIZE) {
 			/*
@@ -829,14 +852,14 @@ static int prepare_set_command(struct pxa3xx_nand_info *info, int command,
 			info->ndcb0 |= NDCB0_CMD_TYPE(0x1)
 					| NDCB0_LEN_OVRD
 					| NDCB0_EXT_CMD_TYPE(ext_cmd_type);
-			info->ndcb3 = info->chunk_size +
-				      info->oob_size;
+			info->ndcb3 = info->step_chunk_size +
+				      info->step_spare_size;
 
 			/*
 			 * This is the command dispatch that completes a chunked
 			 * page program operation.
 			 */
-			if (info->data_size == 0) {
+			if (info->cur_chunk == info->ntotalchunks) {
 				info->ndcb0 = NDCB0_CMD_TYPE(0x1)
 					| NDCB0_EXT_CMD_TYPE(ext_cmd_type)
 					| command;
@@ -863,7 +886,7 @@ static int prepare_set_command(struct pxa3xx_nand_info *info, int command,
 				| command;
 		info->ndcb1 = (column & 0xFF);
 		info->ndcb3 = INIT_BUFFER_SIZE;
-		info->data_size = INIT_BUFFER_SIZE;
+		info->step_chunk_size = INIT_BUFFER_SIZE;
 		break;
 
 	case NAND_CMD_READID:
@@ -873,7 +896,7 @@ static int prepare_set_command(struct pxa3xx_nand_info *info, int command,
 				| command;
 		info->ndcb1 = (column & 0xFF);
 
-		info->data_size = 8;
+		info->step_chunk_size = 8;
 		break;
 	case NAND_CMD_STATUS:
 		info->buf_count = 1;
@@ -881,7 +904,7 @@ static int prepare_set_command(struct pxa3xx_nand_info *info, int command,
 				| NDCB0_ADDR_CYC(1)
 				| command;
 
-		info->data_size = 8;
+		info->step_chunk_size = 8;
 		break;
 
 	case NAND_CMD_ERASE1:
@@ -1065,22 +1088,31 @@ static void nand_cmdfunc_extended(struct mtd_info *mtd,
 			}
 		}
 
+		/* Only a few commands need several steps */
+		if (command != NAND_CMD_PAGEPROG &&
+		    command != NAND_CMD_READ0    &&
+		    command != NAND_CMD_READOOB)
+			break;
+
+		info->cur_chunk++;
+
 		/* Check if the sequence is complete */
-		if (info->data_size == 0 && command != NAND_CMD_PAGEPROG)
+		if (info->cur_chunk == info->ntotalchunks &&
+		    command != NAND_CMD_PAGEPROG)
 			break;
 
 		/*
 		 * After a splitted program command sequence has issued
 		 * the command dispatch, the command sequence is complete.
 		 */
-		if (info->data_size == 0 &&
+		if (info->cur_chunk == (info->ntotalchunks + 1) &&
 		    command == NAND_CMD_PAGEPROG &&
 		    ext_cmd_type == EXT_CMD_TYPE_DISPATCH)
 			break;
 
 		if (command == NAND_CMD_READ0 || command == NAND_CMD_READOOB) {
 			/* Last read: issue a 'last naked read' */
-			if (info->data_size == info->chunk_size)
+			if (info->cur_chunk == info->ntotalchunks - 1)
 				ext_cmd_type = EXT_CMD_TYPE_LAST_RW;
 			else
 				ext_cmd_type = EXT_CMD_TYPE_NAKED_RW;
@@ -1090,7 +1122,7 @@ static void nand_cmdfunc_extended(struct mtd_info *mtd,
 		 * the command dispatch must be issued to complete.
 		 */
 		} else if (command == NAND_CMD_PAGEPROG &&
-			   info->data_size == 0) {
+			   info->cur_chunk == info->ntotalchunks) {
 				ext_cmd_type = EXT_CMD_TYPE_DISPATCH;
 		}
 	} while (1);
@@ -1317,6 +1349,8 @@ static int pxa_ecc_init(struct pxa3xx_nand_info *info,
 			int strength, int ecc_stepsize, int page_size)
 {
 	if (strength == 1 && ecc_stepsize == 512 && page_size == 2048) {
+		info->nfullchunks = 1;
+		info->ntotalchunks = 1;
 		info->chunk_size = 2048;
 		info->spare_size = 40;
 		info->ecc_size = 24;
@@ -1325,6 +1359,8 @@ static int pxa_ecc_init(struct pxa3xx_nand_info *info,
 		ecc->strength = 1;
 
 	} else if (strength == 1 && ecc_stepsize == 512 && page_size == 512) {
+		info->nfullchunks = 1;
+		info->ntotalchunks = 1;
 		info->chunk_size = 512;
 		info->spare_size = 8;
 		info->ecc_size = 8;
@@ -1338,6 +1374,8 @@ static int pxa_ecc_init(struct pxa3xx_nand_info *info,
 	 */
 	} else if (strength == 4 && ecc_stepsize == 512 && page_size == 2048) {
 		info->ecc_bch = 1;
+		info->nfullchunks = 1;
+		info->ntotalchunks = 1;
 		info->chunk_size = 2048;
 		info->spare_size = 32;
 		info->ecc_size = 32;
@@ -1348,6 +1386,8 @@ static int pxa_ecc_init(struct pxa3xx_nand_info *info,
 
 	} else if (strength == 4 && ecc_stepsize == 512 && page_size == 4096) {
 		info->ecc_bch = 1;
+		info->nfullchunks = 2;
+		info->ntotalchunks = 2;
 		info->chunk_size = 2048;
 		info->spare_size = 32;
 		info->ecc_size = 32;
@@ -1362,8 +1402,12 @@ static int pxa_ecc_init(struct pxa3xx_nand_info *info,
 	 */
 	} else if (strength == 8 && ecc_stepsize == 512 && page_size == 4096) {
 		info->ecc_bch = 1;
+		info->nfullchunks = 4;
+		info->ntotalchunks = 5;
 		info->chunk_size = 1024;
 		info->spare_size = 0;
+		info->last_chunk_size = 0;
+		info->last_spare_size = 64;
 		info->ecc_size = 32;
 		ecc->mode = NAND_ECC_HW;
 		ecc->size = info->chunk_size;

commit e3ba9ba2c857c04b16039275d0e5ea7e9c23a829
Author: Ofer Heifetz <oferh@marvell.com>
Date:   Wed Aug 29 11:56:08 2018 +0300

    UPSTREAM: mtd: pxa3xx_nand: Simplify pxa3xx_nand_scan
    
    This commit simplifies the initial configuration performed
    by pxa3xx_nand_scan. No functionality change is intended.
    
    This commit is taken from Linux:
    'commit 154f50fbde53'
    ("mtd: pxa3xx_nand: Simplify pxa3xx_nand_scan")
    
    Change-Id: I72a34c2a18addb5a96b98fa5799bc9391a934d26
    Signed-off-by: Chris Packham <judge.packham@gmail.com>
    Signed-off-by: Ofer Heifetz <oferh@marvell.com>
    Reviewed-by: Igal Liberman <igall@marvell.com>
    Cc: Stefan Roese <sr@denx.de>
    Cc: Simon Glass <sjg@chromium.org>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 7efd95eacf790714e70415cbe290056fedc33f82)

diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index 93fa0c9206..5f6094fab7 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -1257,7 +1257,7 @@ static void pxa3xx_nand_config_tail(struct pxa3xx_nand_info *info)
 	info->reg_ndcr |= (mtd->writesize == 2048) ? NDCR_PAGE_SZ : 0;
 }
 
-static int pxa3xx_nand_detect_config(struct pxa3xx_nand_info *info)
+static void pxa3xx_nand_detect_config(struct pxa3xx_nand_info *info)
 {
 	struct pxa3xx_nand_platform_data *pdata = info->pdata;
 	uint32_t ndcr = nand_readl(info, NDCR);
@@ -1269,7 +1269,6 @@ static int pxa3xx_nand_detect_config(struct pxa3xx_nand_info *info)
 	info->reg_ndcr |= (pdata->enable_arbiter) ? NDCR_ND_ARB_EN : 0;
 	info->ndtr0cs0 = nand_readl(info, NDTR0CS0);
 	info->ndtr1cs0 = nand_readl(info, NDTR1CS0);
-	return 0;
 }
 
 static int pxa3xx_nand_init_buff(struct pxa3xx_nand_info *info)
@@ -1389,22 +1388,21 @@ static int pxa3xx_nand_scan(struct mtd_info *mtd)
 	int ret;
 	uint16_t ecc_strength, ecc_step;
 
-	if (pdata->keep_config && !pxa3xx_nand_detect_config(info))
-		goto KEEP_CONFIG;
-
-	ret = pxa3xx_nand_config_ident(info);
-	if (ret)
-		return ret;
-
-	ret = pxa3xx_nand_sensing(host);
-	if (ret) {
-		dev_info(&info->pdev->dev, "There is no chip on cs %d!\n",
-			 info->cs);
-
-		return ret;
+	if (pdata->keep_config) {
+		pxa3xx_nand_detect_config(info);
+	} else {
+		ret = pxa3xx_nand_config_ident(info);
+		if (ret)
+			return ret;
+		ret = pxa3xx_nand_sensing(host);
+		if (ret) {
+			dev_info(&info->pdev->dev,
+				 "There is no chip on cs %d!\n",
+				 info->cs);
+			return ret;
+		}
 	}
 
-KEEP_CONFIG:
 	/* Device detection must be done with ECC disabled */
 	if (info->variant == PXA3XX_NAND_VARIANT_ARMADA370)
 		nand_writel(info, NDECCCTRL, 0x0);

commit 7c94bb9bcbf0ab6d7f7afdd626c5d09ec93597bd
Author: Ofer Heifetz <oferh@marvell.com>
Date:   Wed Aug 29 11:56:07 2018 +0300

    UPSTREAM: mtd: pxa3xx_nand: Fix initial controller configuration
    
    The Data Flash Control Register (NDCR) contains two types
    of parameters: those that are needed for device identification,
    and those that can only be set after device identification.
    
    Therefore, the driver can't set them all at once and instead
    needs to configure the first group before nand_scan_ident()
    and the second group later.
    
    Let's split pxa3xx_nand_config in two halves, and set the
    parameters that depend on the device geometry once this is known.
    
    This commit is taken from Linux:
    'commit 66e8e47eae65'
    ("mtd: pxa3xx_nand: Fix initial controller configuration")
    
    Change-Id: I1be50c463d38627c0ed43258c59ca9624d56912e
    Signed-off-by: Chris Packham <judge.packham@gmail.com>
    Signed-off-by: Ofer Heifetz <oferh@marvell.com>
    Reviewed-by: Igal Liberman <igall@marvell.com>
    Cc: Stefan Roese <sr@denx.de>
    Cc: Simon Glass <sjg@chromium.org>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit b87ae6f587e44e3974e41bd80dbc628540211604)

diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index 70aff590a7..93fa0c9206 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -62,7 +62,8 @@ DECLARE_GLOBAL_DATA_PTR;
 #define NDCR_ND_MODE		(0x3 << 21)
 #define NDCR_NAND_MODE		(0x0)
 #define NDCR_CLR_PG_CNT		(0x1 << 20)
-#define NDCR_STOP_ON_UNCOR	(0x1 << 19)
+#define NFCV1_NDCR_ARB_CNTL	(0x1 << 19)
+#define NFCV2_NDCR_STOP_ON_UNCOR	(0x1 << 19)
 #define NDCR_RD_ID_CNT_MASK	(0x7 << 16)
 #define NDCR_RD_ID_CNT(x)	(((x) << 16) & NDCR_RD_ID_CNT_MASK)
 
@@ -1231,26 +1232,41 @@ static int pxa3xx_nand_waitfunc(struct mtd_info *mtd, struct nand_chip *this)
 	return NAND_STATUS_READY;
 }
 
-static int pxa3xx_nand_config_flash(struct pxa3xx_nand_info *info)
+static int pxa3xx_nand_config_ident(struct pxa3xx_nand_info *info)
+{
+	struct pxa3xx_nand_platform_data *pdata = info->pdata;
+
+	/* Configure default flash values */
+	info->chunk_size = PAGE_CHUNK_SIZE;
+	info->reg_ndcr = 0x0; /* enable all interrupts */
+	info->reg_ndcr |= (pdata->enable_arbiter) ? NDCR_ND_ARB_EN : 0;
+	info->reg_ndcr |= NDCR_RD_ID_CNT(READ_ID_BYTES);
+	info->reg_ndcr |= NDCR_SPARE_EN;
+
+	return 0;
+}
+
+static void pxa3xx_nand_config_tail(struct pxa3xx_nand_info *info)
 {
 	struct pxa3xx_nand_host *host = info->host[info->cs];
-	struct mtd_info *mtd = nand_to_mtd(&host->chip);
+	struct mtd_info *mtd = nand_to_mtd(&info->host[info->cs]->chip);
 	struct nand_chip *chip = mtd_to_nand(mtd);
 
 	info->reg_ndcr |= (host->col_addr_cycles == 2) ? NDCR_RA_START : 0;
 	info->reg_ndcr |= (chip->page_shift == 6) ? NDCR_PG_PER_BLK : 0;
 	info->reg_ndcr |= (mtd->writesize == 2048) ? NDCR_PAGE_SZ : 0;
-
-	return 0;
 }
 
 static int pxa3xx_nand_detect_config(struct pxa3xx_nand_info *info)
 {
+	struct pxa3xx_nand_platform_data *pdata = info->pdata;
 	uint32_t ndcr = nand_readl(info, NDCR);
 
 	/* Set an initial chunk size */
 	info->chunk_size = ndcr & NDCR_PAGE_SZ ? 2048 : 512;
-	info->reg_ndcr = ndcr & ~NDCR_INT_MASK;
+	info->reg_ndcr = ndcr &
+		~(NDCR_INT_MASK | NDCR_ND_ARB_EN | NFCV1_NDCR_ARB_CNTL);
+	info->reg_ndcr |= (pdata->enable_arbiter) ? NDCR_ND_ARB_EN : 0;
 	info->ndtr0cs0 = nand_readl(info, NDTR0CS0);
 	info->ndtr1cs0 = nand_readl(info, NDTR1CS0);
 	return 0;
@@ -1376,8 +1392,9 @@ static int pxa3xx_nand_scan(struct mtd_info *mtd)
 	if (pdata->keep_config && !pxa3xx_nand_detect_config(info))
 		goto KEEP_CONFIG;
 
-	/* Set a default chunk size */
-	info->chunk_size = PAGE_CHUNK_SIZE;
+	ret = pxa3xx_nand_config_ident(info);
+	if (ret)
+		return ret;
 
 	ret = pxa3xx_nand_sensing(host);
 	if (ret) {
@@ -1404,10 +1421,6 @@ KEEP_CONFIG:
 		}
 	}
 
-	ret = pxa3xx_nand_config_flash(info);
-	if (ret)
-		return ret;
-
 #ifdef CONFIG_SYS_NAND_USE_FLASH_BBT
 	/*
 	 * We'll use a bad block table stored in-flash and don't
@@ -1472,6 +1485,10 @@ KEEP_CONFIG:
 		host->row_addr_cycles = 3;
 	else
 		host->row_addr_cycles = 2;
+
+	if (!pdata->keep_config)
+		pxa3xx_nand_config_tail(info);
+
 	return nand_scan_tail(mtd);
 }
 

commit 947abcf07861855871b59a437c6afa7b585d4b04
Author: Ofer Heifetz <oferh@marvell.com>
Date:   Wed Aug 29 11:56:06 2018 +0300

    UPSTREAM: mtd: pxa3xx_nand: Increase the initial chunk size
    
    The chunk size represents the size of the data chunks, which
    is used by the controllers that allow to split transferred data.
    
    However, the initial chunk size is used in a non-split way,
    during device identification. Therefore, it must be large enough
    for all the NAND commands issued during device identification.
    This includes NAND_CMD_PARAM which was recently changed to
    transfer up to 2048 bytes (for the redundant parameter pages).
    
    Thus, the initial chunk size should be 2048 as well.
    
    On Armada 370/XP platforms (NFCv2) booted without the keep-config
    devicetree property, this commit fixes a timeout on the NAND_CMD_PARAM
    command:
    
      [..]
      pxa3xx-nand f10d0000.nand: This platform can't do DMA on this device
      pxa3xx-nand f10d0000.nand: Wait time out!!!
      nand: device found, Manufacturer ID: 0x2c, Chip ID: 0x38
      nand: Micron MT29F8G08ABABAWP
      nand: 1024 MiB, SLC, erase size: 512 KiB, page size: 4096, OOB size: 224
    
    This commit is taken from Linux:
    'commit c7f00c29aa8'
    ("mtd: pxa3xx_nand: Increase the initial chunk size")
    
    Change-Id: I7bcf3042a0567171d0dc0a90bf3d15c821914cd1
    Signed-off-by: Chris Packham <judge.packham@gmail.com>
    Signed-off-by: Ofer Heifetz <oferh@marvell.com>
    Reviewed-by: Igal Liberman <igall@marvell.com>
    Cc: Stefan Roese <sr@denx.de>
    Cc: Simon Glass <sjg@chromium.org>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 6bbe7f681feac91fc03a4dc2e88bc0d9391bfaa8)

diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index 86e6c4149a..70aff590a7 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -1377,7 +1377,7 @@ static int pxa3xx_nand_scan(struct mtd_info *mtd)
 		goto KEEP_CONFIG;
 
 	/* Set a default chunk size */
-	info->chunk_size = 512;
+	info->chunk_size = PAGE_CHUNK_SIZE;
 
 	ret = pxa3xx_nand_sensing(host);
 	if (ret) {

commit 99738e136e19f43f2456e68659e5d6134496b1d6
Author: Ofer Heifetz <oferh@marvell.com>
Date:   Wed Aug 29 11:56:05 2018 +0300

    UPSTREAM: nand: pxa3xx: Increase READ_ID buffer and make the size static
    
    The read ID count should be made as large as the maximum READ_ID size,
    so there's no need to have dynamic size. This commit sets the hardware
    maximum read ID count, which should be more than enough on all cases.
    Also, we get rid of the read_id_bytes, and use a macro instead.
    
    This commit is taken from Linux:
    'commit b226eca2088'
    ("nand: pxa3xx: Increase READ_ID buffer and make the size static")
    
    Change-Id: If5d3398463cb409d7b62f9d7f23dd29ea77efe7a
    Signed-off-by: Chris Packham <judge.packham@gmail.com>
    Signed-off-by: Ofer Heifetz <oferh@marvell.com>
    Reviewed-by: Igal Liberman <igall@marvell.com>
    Cc: Stefan Roese <sr@denx.de>
    Cc: Simon Glass <sjg@chromium.org>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 94488612cb21e51b772e3b616c8f1acfe2d0961c)

diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index d83efea930..86e6c4149a 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -113,6 +113,13 @@ DECLARE_GLOBAL_DATA_PTR;
 #define EXT_CMD_TYPE_LAST_RW	1 /* Last naked read/write */
 #define EXT_CMD_TYPE_MONO	0 /* Monolithic read/write */
 
+/*
+ * This should be large enough to read 'ONFI' and 'JEDEC'.
+ * Let's use 7 bytes, which is the maximum ID count supported
+ * by the controller (see NDCR_RD_ID_CNT_MASK).
+ */
+#define READ_ID_BYTES		7
+
 /* macros for registers read/write */
 #define nand_writel(info, off, val)	\
 	writel((val), (info)->mmio_base + (off))
@@ -159,8 +166,6 @@ struct pxa3xx_nand_host {
 	/* calculated from pxa3xx_nand_flash data */
 	unsigned int		col_addr_cycles;
 	unsigned int		row_addr_cycles;
-	size_t			read_id_bytes;
-
 };
 
 struct pxa3xx_nand_info {
@@ -861,7 +866,7 @@ static int prepare_set_command(struct pxa3xx_nand_info *info, int command,
 		break;
 
 	case NAND_CMD_READID:
-		info->buf_count = host->read_id_bytes;
+		info->buf_count = READ_ID_BYTES;
 		info->ndcb0 |= NDCB0_CMD_TYPE(3)
 				| NDCB0_ADDR_CYC(1)
 				| command;
@@ -1241,23 +1246,10 @@ static int pxa3xx_nand_config_flash(struct pxa3xx_nand_info *info)
 
 static int pxa3xx_nand_detect_config(struct pxa3xx_nand_info *info)
 {
-	/*
-	 * We set 0 by hard coding here, for we don't support keep_config
-	 * when there is more than one chip attached to the controller
-	 */
-	struct pxa3xx_nand_host *host = info->host[0];
 	uint32_t ndcr = nand_readl(info, NDCR);
 
-	if (ndcr & NDCR_PAGE_SZ) {
-		/* Controller's FIFO size */
-		info->chunk_size = 2048;
-		host->read_id_bytes = 4;
-	} else {
-		info->chunk_size = 512;
-		host->read_id_bytes = 2;
-	}
-
 	/* Set an initial chunk size */
+	info->chunk_size = ndcr & NDCR_PAGE_SZ ? 2048 : 512;
 	info->reg_ndcr = ndcr & ~NDCR_INT_MASK;
 	info->ndtr0cs0 = nand_readl(info, NDTR0CS0);
 	info->ndtr1cs0 = nand_readl(info, NDTR1CS0);
@@ -1287,7 +1279,7 @@ static int pxa3xx_nand_sensing(struct pxa3xx_nand_host *host)
 	/* configure default flash values */
 	info->reg_ndcr = 0x0; /* enable all interrupts */
 	info->reg_ndcr |= (pdata->enable_arbiter) ? NDCR_ND_ARB_EN : 0;
-	info->reg_ndcr |= NDCR_RD_ID_CNT(host->read_id_bytes);
+	info->reg_ndcr |= NDCR_RD_ID_CNT(READ_ID_BYTES);
 	info->reg_ndcr |= NDCR_SPARE_EN; /* enable spare by default */
 
 	/* use the common timing to make a try */
@@ -1504,7 +1496,6 @@ static int alloc_nand_resource(struct pxa3xx_nand_info *info)
 		info->host[cs] = host;
 		host->cs = cs;
 		host->info_data = info;
-		host->read_id_bytes = 4;
 		mtd->owner = THIS_MODULE;
 
 		nand_set_controller_data(chip, host);

commit 4ff6d0d5a25b1ef77037a64a95bbc4e08607cfe4
Author: Ofer Heifetz <oferh@marvell.com>
Date:   Wed Aug 29 11:56:04 2018 +0300

    UPSTREAM: mtd: nand: pxa3xx-nand: fix random command timeouts
    
    When 2 commands are submitted in a row, and the second is very quick,
    the completion of the second command might never come. This happens
    especially if the second command is quick, such as a status read
    after an erase
    
    This patch is taken from Linux:
    'commit 21fc0ef9652f'
    ("mtd: nand: pxa3xx-nand: fix random command timeouts")
    
    Change-Id: I399aaaacff8259bd282c924e0b8471aa8d32d252
    Signed-off-by: Chris Packham <judge.packham@gmail.com>
    Signed-off-by: Ofer Heifetz <oferh@marvell.com>
    Reviewed-by: Igal Liberman <igall@marvell.com>
    Cc: Stefan Roese <sr@denx.de>
    Cc: Simon Glass <sjg@chromium.org>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit cd11b2b457bb8aa5e0e72c4d90df1c7995c738b4)

diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index 5d37f22f6b..d83efea930 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -624,8 +624,14 @@ static irqreturn_t pxa3xx_nand_irq(struct pxa3xx_nand_info *info)
 		is_ready = 1;
 	}
 
+	/*
+	 * Clear all status bit before issuing the next command, which
+	 * can and will alter the status bits and will deserve a new
+	 * interrupt on its own. This lets the controller exit the IRQ
+	 */
+	nand_writel(info, NDSR, status);
+
 	if (status & NDSR_WRCMDREQ) {
-		nand_writel(info, NDSR, NDSR_WRCMDREQ);
 		status &= ~NDSR_WRCMDREQ;
 		info->state = STATE_CMD_HANDLE;
 
@@ -646,8 +652,6 @@ static irqreturn_t pxa3xx_nand_irq(struct pxa3xx_nand_info *info)
 			nand_writel(info, NDCB0, info->ndcb3);
 	}
 
-	/* clear NDSR to let the controller exit the IRQ */
-	nand_writel(info, NDSR, status);
 	if (is_completed)
 		info->cmd_complete = 1;
 	if (is_ready)

commit 80ad5a23c1720ec472e6a42bedbb22386429af08
Author: Ofer Heifetz <oferh@marvell.com>
Date:   Wed Aug 29 11:56:03 2018 +0300

    UPSTREAM: mtd: nand: pxa3xx_nand: fix early spurious interrupt
    
    When the nand is first probe, and upon the first command start, the
    status bits should be cleared before the interrupts are unmasked.
    
    This commit is taken from Linux:
    'commit 0b14392db2e'
    ("mtd: nand: pxa3xx_nand: fix early spurious interrupt")
    
    Change-Id: Ie6b9b9dc2983df500b1496d814fa957c53ce4321
    Signed-off-by: Chris Packham <judge.packham@gmail.com>
    Signed-off-by: Ofer Heifetz <oferh@marvell.com>
    Reviewed-by: Igal Liberman <igall@marvell.com>
    Cc: Stefan Roese <sr@denx.de>
    Cc: Simon Glass <sjg@chromium.org>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 658999244a0446a32301bc34c8fa53f1a3f05594)

diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index 3feaf0ca38..5d37f22f6b 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -482,8 +482,8 @@ static void pxa3xx_nand_start(struct pxa3xx_nand_info *info)
 	ndcr |= NDCR_ND_RUN;
 
 	/* clear status bits and run */
-	nand_writel(info, NDCR, 0);
 	nand_writel(info, NDSR, NDSR_MASK);
+	nand_writel(info, NDCR, 0);
 	nand_writel(info, NDCR, ndcr);
 }
 

commit 5389812ac627b6150d3a914fc22500de3f98e405
Author: Ofer Heifetz <oferh@marvell.com>
Date:   Wed Aug 29 11:56:02 2018 +0300

    UPSTREAM: mtd: nand: pxa3xx_nand: sync pxa3xx_nand_set_sdr_timing()
    
    Since the pxa3xx_nand driver was added there has been a discrepancy in
    pxa3xx_nand_set_sdr_timing() around the setting of tWP_min and tRP_min.
    This brings us into line with the current Linux code.
    
    Change-Id: I67ac39aca2dccf8463c3d5404b9abb4f2b59d593
    Signed-off-by: Chris Packham <judge.packham@gmail.com>
    Signed-off-by: Ofer Heifetz <oferh@marvell.com>
    Reviewed-by: Igal Liberman <igall@marvell.com>
    Cc: Stefan Roese <sr@denx.de>
    Cc: Simon Glass <sjg@chromium.org>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit d3859d1b5349e8105b23043e6e7158e3dc1582d4)

diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index 0eb6abbd2c..3feaf0ca38 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -350,9 +350,9 @@ static void pxa3xx_nand_set_sdr_timing(struct pxa3xx_nand_host *host,
 	u32 tCH_min = DIV_ROUND_UP(t->tCH_min, 1000);
 	u32 tCS_min = DIV_ROUND_UP(t->tCS_min, 1000);
 	u32 tWH_min = DIV_ROUND_UP(t->tWH_min, 1000);
-	u32 tWP_min = DIV_ROUND_UP(t->tWC_min - tWH_min, 1000);
+	u32 tWP_min = DIV_ROUND_UP(t->tWC_min - t->tWH_min, 1000);
 	u32 tREH_min = DIV_ROUND_UP(t->tREH_min, 1000);
-	u32 tRP_min = DIV_ROUND_UP(t->tRC_min - tREH_min, 1000);
+	u32 tRP_min = DIV_ROUND_UP(t->tRC_min - t->tREH_min, 1000);
 	u32 tR = chip->chip_delay * 1000;
 	u32 tWHR_min = DIV_ROUND_UP(t->tWHR_min, 1000);
 	u32 tAR_min = DIV_ROUND_UP(t->tAR_min, 1000);

commit 63ea44350bc5a0fef7a68a8ca6c1afd68a1434bd
Author: Ofer Heifetz <oferh@marvell.com>
Date:   Wed Aug 29 11:56:01 2018 +0300

    UPSTREAM: mtd: nand: pxa3xx_nand: use nand_to_mtd()
    
    Don't store struct mtd_info in struct pxa3xx_nand_host. Instead use the
    one that is already part of struct nand_chip. This brings us in line
    with current U-boot and Linux conventions.
    
    Change-Id: Ida9c1652736c94db9cebd295d32aed034e868660
    Signed-off-by: Chris Packham <judge.packham@gmail.com>
    Signed-off-by: Ofer Heifetz <oferh@marvell.com>
    Reviewed-by: Igal Liberman <igall@marvell.com>
    Cc: Stefan Roese <sr@denx.de>
    Cc: Simon Glass <sjg@chromium.org>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 8cdcf672c59b778f2a68a4f5d6c5f4d584f7ef54)

diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index c4505f16bf..0eb6abbd2c 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -150,7 +150,6 @@ enum pxa3xx_nand_variant {
 
 struct pxa3xx_nand_host {
 	struct nand_chip	chip;
-	struct mtd_info         *mtd;
 	void			*info_data;
 
 	/* page size of attached chip */
@@ -385,16 +384,17 @@ static int pxa3xx_nand_init_timings(struct pxa3xx_nand_host *host)
 	struct nand_chip *chip = &host->chip;
 	struct pxa3xx_nand_info *info = host->info_data;
 	const struct pxa3xx_nand_flash *f = NULL;
+	struct mtd_info *mtd = nand_to_mtd(&host->chip);
 	int mode, id, ntypes, i;
 
 	mode = onfi_get_async_timing_mode(chip);
 	if (mode == ONFI_TIMING_MODE_UNKNOWN) {
 		ntypes = ARRAY_SIZE(builtin_flash_types);
 
-		chip->cmdfunc(host->mtd, NAND_CMD_READID, 0x00, -1);
+		chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
 
-		id = chip->read_byte(host->mtd);
-		id |= chip->read_byte(host->mtd) << 0x8;
+		id = chip->read_byte(mtd);
+		id |= chip->read_byte(mtd) << 0x8;
 
 		for (i = 0; i < ntypes; i++) {
 			f = &builtin_flash_types[i];
@@ -687,7 +687,7 @@ static void set_command_address(struct pxa3xx_nand_info *info,
 static void prepare_start_command(struct pxa3xx_nand_info *info, int command)
 {
 	struct pxa3xx_nand_host *host = info->host[info->cs];
-	struct mtd_info *mtd = host->mtd;
+	struct mtd_info *mtd = nand_to_mtd(&host->chip);
 
 	/* reset data and oob column point to handle data */
 	info->buf_start		= 0;
@@ -738,7 +738,7 @@ static int prepare_set_command(struct pxa3xx_nand_info *info, int command,
 	struct mtd_info *mtd;
 
 	host = info->host[info->cs];
-	mtd = host->mtd;
+	mtd = nand_to_mtd(&host->chip);
 	addr_cycle = 0;
 	exec_cmd = 1;
 
@@ -1225,7 +1225,7 @@ static int pxa3xx_nand_waitfunc(struct mtd_info *mtd, struct nand_chip *this)
 static int pxa3xx_nand_config_flash(struct pxa3xx_nand_info *info)
 {
 	struct pxa3xx_nand_host *host = info->host[info->cs];
-	struct mtd_info *mtd = host->mtd;
+	struct mtd_info *mtd = nand_to_mtd(&host->chip);
 	struct nand_chip *chip = mtd_to_nand(mtd);
 
 	info->reg_ndcr |= (host->col_addr_cycles == 2) ? NDCR_RA_START : 0;
@@ -1277,7 +1277,7 @@ static int pxa3xx_nand_sensing(struct pxa3xx_nand_host *host)
 	const struct nand_sdr_timings *timings;
 	int ret;
 
-	mtd = info->host[info->cs]->mtd;
+	mtd = nand_to_mtd(&info->host[info->cs]->chip);
 	chip = mtd_to_nand(mtd);
 
 	/* configure default flash values */
@@ -1498,7 +1498,6 @@ static int alloc_nand_resource(struct pxa3xx_nand_info *info)
 		mtd = nand_to_mtd(chip);
 		host = (struct pxa3xx_nand_host *)chip;
 		info->host[cs] = host;
-		host->mtd = mtd;
 		host->cs = cs;
 		host->info_data = info;
 		host->read_id_bytes = 4;
@@ -1616,7 +1615,7 @@ static int pxa3xx_nand_probe(struct pxa3xx_nand_info *info)
 
 	probe_success = 0;
 	for (cs = 0; cs < pdata->num_cs; cs++) {
-		struct mtd_info *mtd = info->host[cs]->mtd;
+		struct mtd_info *mtd = nand_to_mtd(&info->host[cs]->chip);
 
 		/*
 		 * The mtd name matches the one used in 'mtdparts' kernel

commit 873e3ed7ba8d919b40b386c7cc2658fb267eea10
Author: Ofer Heifetz <oferh@marvell.com>
Date:   Wed Aug 29 11:56:00 2018 +0300

    UPSTREAM: mtd: nand: pxa3xx_nand: Increase initial buffer size
    
    The initial buffer is used for the initial commands used to detect
    a flash device (STATUS, READID and PARAM).
    
    ONFI param page is 256 bytes, and there are three redundant copies
    to be read. JEDEC param page is 512 bytes, and there are also three
    redundant copies to be read. Hence this buffer should be at least
    512 x 3. This commits rounds the buffer size to 2048.
    
    This commit is taken from Linux:
    'commit c16340973fcb64614' ("nand: pxa3xx: Increase initial buffer size")
    
    Change-Id: I61c33092402a06ab75b390b791ba4cc57072de3b
    Signed-off-by: Chris Packham <judge.packham@gmail.com>
    Signed-off-by: Ofer Heifetz <oferh@marvell.com>
    Reviewed-by: Igal Liberman <igall@marvell.com>
    Cc: Stefan Roese <sr@denx.de>
    Cc: Simon Glass <sjg@chromium.org>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 144532242ed3588bf63acccc6a46399b87861c03)

diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index a3ca3373e4..c4505f16bf 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -29,10 +29,13 @@ DECLARE_GLOBAL_DATA_PTR;
 
 /*
  * Define a buffer size for the initial command that detects the flash device:
- * STATUS, READID and PARAM. The largest of these is the PARAM command,
- * needing 256 bytes.
+ * STATUS, READID and PARAM.
+ * ONFI param page is 256 bytes, and there are three redundant copies
+ * to be read. JEDEC param page is 512 bytes, and there are also three
+ * redundant copies to be read.
+ * Hence this buffer should be at least 512 x 3. Let's pick 2048.
  */
-#define INIT_BUFFER_SIZE	256
+#define INIT_BUFFER_SIZE	2048
 
 /* registers and bit definitions */
 #define NDCR		(0x00) /* Control register */
@@ -843,14 +846,14 @@ static int prepare_set_command(struct pxa3xx_nand_info *info, int command,
 		break;
 
 	case NAND_CMD_PARAM:
-		info->buf_count = 256;
+		info->buf_count = INIT_BUFFER_SIZE;
 		info->ndcb0 |= NDCB0_CMD_TYPE(0)
 				| NDCB0_ADDR_CYC(1)
 				| NDCB0_LEN_OVRD
 				| command;
 		info->ndcb1 = (column & 0xFF);
-		info->ndcb3 = 256;
-		info->data_size = 256;
+		info->ndcb3 = INIT_BUFFER_SIZE;
+		info->data_size = INIT_BUFFER_SIZE;
 		break;
 
 	case NAND_CMD_READID:

commit c42b27f4bf3d02d6e0abf0a482a955196e049cbb
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Mon Sep 10 11:17:30 2018 +0900

    UPSTREAM: mtd: nand: denali: fix unaligned cache operations on ARMv7 SoCs
    
    If the OOB size is not multiple of the cache line size, the ARMv7
    cache operation still prints "Misaligned operation at range".
    
    => nand info
    
    Device 0: nand0, sector size 256 KiB
      Page size       4096 b
      OOB size         224 b
      Erase size    262144 b
      subpagesize     4096 b
      options     0x00104200
      bbt options 0x00060000
    => nand dump 0
    CACHE: Misaligned operation at range [9fb15280, 9fb16360]
    CACHE: Misaligned operation at range [9fb15280, 9fb16360]
    CACHE: Misaligned operation at range [9fb15280, 9fb16360]
    CACHE: Misaligned operation at range [9fb15280, 9fb16360]
      ...
    
    The cache flushing operations won't happen in this case to cover all of
    the range to fix this by making sure we have things aligned.
    
    Change-Id: I8c396d3c8f00bca5d82840c71caa685c0e912cb9
    Reported-by: Marek Vasut <marex@denx.de>
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    [trini: Reword the commit message to be clear this is a direct problem
    rather than just a warning]
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit e8f65763ef07e0667f57dda7eece657f8fe136a7)

diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
index 3fc796c35a..0d57b6b707 100644
--- a/drivers/mtd/nand/denali.c
+++ b/drivers/mtd/nand/denali.c
@@ -22,6 +22,8 @@ static dma_addr_t dma_map_single(void *dev, void *ptr, size_t size,
 {
 	unsigned long addr = (unsigned long)ptr;
 
+	size = ALIGN(size, ARCH_DMA_MINALIGN);
+
 	if (dir == DMA_FROM_DEVICE)
 		invalidate_dcache_range(addr, addr + size);
 	else
@@ -33,6 +35,8 @@ static dma_addr_t dma_map_single(void *dev, void *ptr, size_t size,
 static void dma_unmap_single(void *dev, dma_addr_t addr, size_t size,
 			     enum dma_data_direction dir)
 {
+	size = ALIGN(size, ARCH_DMA_MINALIGN);
+
 	if (dir != DMA_TO_DEVICE)
 		invalidate_dcache_range(addr, addr + size);
 }

commit 0305d56018aa53e9955786209e11ea3836420a70
Author: Darwin Dingel <darwin.dingel@alliedtelesis.co.nz>
Date:   Thu Aug 2 10:02:45 2018 +0200

    UPSTREAM: mtd: nand: fsl_ifc: Fix handling of bitflips in erased pages
    
    This is a fix made for the fsl_ifc_nand driver on linux kernel by
    Pavel Machek and is applied to uboot. It is currently on applied on
    linux-mtd.
    
    https://patchwork.kernel.org/patch/9758117/
    
    IFC always raises ECC errors on erased pages. It is only ignored when
    the buffer is checked for all 0xFF by is_blank(). The problem is a
    single bitflip will cause is_blank() and then mtd_read to fail. The fix
    makes use of nand_check_erased_ecc_chunk() to check for empty pages
    instead of is_blank(). This also makes sure that reads are made at ECC
    page size granularity to get a proper bitflip count. If the number of
    bitflips does not exceed the ECC strength, the page is considered empty
    and the bitflips will be corrected when data is sent to the higher
    layers (e.g. ubi).
    
    Change-Id: Iff78706ceb288d52ad82343d67eb1bec3275ed03
    Signed-off-by: Darwin Dingel <darwin.dingel@alliedtelesis.co.nz>
    Cc: Pavel Machek <pavel@denx.de>
    Cc: Scott Wood <oss@buserror.net>
    Acked-by: Pavel Machek <pavel@denx.de>
    [Kurt: Replaced dev_err by printf due to compiler warnings]
    Tested-by: Kurt Kanzenbach <kurt@linutronix.de>
    Signed-off-by: Kurt Kanzenbach <kurt@linutronix.de>
    Reviewed-by: York Sun <york.sun@nxp.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 1711add3dca291376072ec0c66b01023a3462daf)

diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c
index 9bf4d717c4..5f4a800ad5 100644
--- a/drivers/mtd/nand/fsl_ifc_nand.c
+++ b/drivers/mtd/nand/fsl_ifc_nand.c
@@ -243,31 +243,6 @@ static void set_addr(struct mtd_info *mtd, int column, int page_addr, int oob)
 		ctrl->index += mtd->writesize;
 }
 
-static int is_blank(struct mtd_info *mtd, struct fsl_ifc_ctrl *ctrl,
-		    unsigned int bufnum)
-{
-	struct nand_chip *chip = mtd_to_nand(mtd);
-	struct fsl_ifc_mtd *priv = nand_get_controller_data(chip);
-	u8 __iomem *addr = priv->vbase + bufnum * (mtd->writesize * 2);
-	u32 __iomem *main = (u32 *)addr;
-	u8 __iomem *oob = addr + mtd->writesize;
-	int i;
-
-	for (i = 0; i < mtd->writesize / 4; i++) {
-		if (__raw_readl(&main[i]) != 0xffffffff)
-			return 0;
-	}
-
-	for (i = 0; i < chip->ecc.layout->eccbytes; i++) {
-		int pos = chip->ecc.layout->eccpos[i];
-
-		if (__raw_readb(&oob[pos]) != 0xff)
-			return 0;
-	}
-
-	return 1;
-}
-
 /* returns nonzero if entire page is blank */
 static int check_read_ecc(struct mtd_info *mtd, struct fsl_ifc_ctrl *ctrl,
 			  u32 eccstat, unsigned int bufnum)
@@ -332,16 +307,14 @@ static int fsl_ifc_run_command(struct mtd_info *mtd)
 			if (errors == 15) {
 				/*
 				 * Uncorrectable error.
-				 * OK only if the whole page is blank.
+				 * We'll check for blank pages later.
 				 *
 				 * We disable ECCER reporting due to erratum
 				 * IFC-A002770 -- so report it now if we
 				 * see an uncorrectable error in ECCSTAT.
 				 */
-				if (!is_blank(mtd, ctrl, bufnum))
-					ctrl->status |=
-						IFC_NAND_EVTER_STAT_ECCER;
-				break;
+				ctrl->status |= IFC_NAND_EVTER_STAT_ECCER;
+				continue;
 			}
 
 			mtd->ecc_stats.corrected += errors;
@@ -728,6 +701,39 @@ static int fsl_ifc_wait(struct mtd_info *mtd, struct nand_chip *chip)
 	return status | NAND_STATUS_WP;
 }
 
+/*
+ * The controller does not check for bitflips in erased pages,
+ * therefore software must check instead.
+ */
+static int
+check_erased_page(struct nand_chip *chip, u8 *buf, struct mtd_info *mtd)
+{
+	u8 *ecc = chip->oob_poi;
+	const int ecc_size = chip->ecc.bytes;
+	const int pkt_size = chip->ecc.size;
+	int i, res, bitflips;
+
+	/* IFC starts ecc bytes at offset 8 in the spare area. */
+	ecc += 8;
+	bitflips = 0;
+	for (i = 0; i < chip->ecc.steps; i++) {
+		res = nand_check_erased_ecc_chunk(buf, pkt_size, ecc, ecc_size,
+						  NULL, 0, chip->ecc.strength);
+
+		if (res < 0) {
+			printf("fsl-ifc: NAND Flash ECC Uncorrectable Error\n");
+			mtd->ecc_stats.failed++;
+		} else if (res > 0) {
+			mtd->ecc_stats.corrected += res;
+		}
+		bitflips = max(res, bitflips);
+		buf += pkt_size;
+		ecc += ecc_size;
+	}
+
+	return bitflips;
+}
+
 static int fsl_ifc_read_page(struct mtd_info *mtd, struct nand_chip *chip,
 			     uint8_t *buf, int oob_required, int page)
 {
@@ -737,6 +743,9 @@ static int fsl_ifc_read_page(struct mtd_info *mtd, struct nand_chip *chip,
 	fsl_ifc_read_buf(mtd, buf, mtd->writesize);
 	fsl_ifc_read_buf(mtd, chip->oob_poi, mtd->oobsize);
 
+	if (ctrl->status & IFC_NAND_EVTER_STAT_ECCER)
+		return check_erased_page(chip, buf, mtd);
+
 	if (ctrl->status != IFC_NAND_EVTER_STAT_OPC)
 		mtd->ecc_stats.failed++;
 

commit 0d229d106eb170bddbce377a120465bc26d6ec54
Author: Michal Simek <michal.simek@xilinx.com>
Date:   Mon Jan 25 15:39:26 2016 +0100

    UPSTREAM: spi: Kconfig: Create ISSI Kconfig entry
    
    Add ISSI to Kconfig to make it selectable via menuconfig.
    Also convert all current platforms.
    
    Signed-off-by: Michal Simek <michal.simek@xilinx.com>
    Change-Id: I623a8e29359455055f7d20ad60bb8972846bec6e
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 13f451bf5625e222e881779e69d92a2002e41dfc)

diff --git a/configs/stmark2_defconfig b/configs/stmark2_defconfig
index 8bfbb978ae..2feb6828a0 100644
--- a/configs/stmark2_defconfig
+++ b/configs/stmark2_defconfig
@@ -26,5 +26,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 # CONFIG_NET is not set
 CONFIG_MTD_DEVICE=y
 CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_SPI_FLASH_MTD=y
 CONFIG_REGEX=y
diff --git a/configs/zynq_cc108_defconfig b/configs/zynq_cc108_defconfig
new file mode 100644
index 0000000000..26fdafb7c0
--- /dev/null
+++ b/configs/zynq_cc108_defconfig
@@ -0,0 +1,59 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ZYNQ=y
+CONFIG_SYS_TEXT_BASE=0x4000000
+CONFIG_SPL=y
+CONFIG_DEBUG_UART_BASE=0xe0000000
+CONFIG_DEBUG_UART_CLOCK=50000000
+CONFIG_SPL_STACK_R_ADDR=0x200000
+CONFIG_DEFAULT_DEVICE_TREE="zynq-cc108"
+CONFIG_DEBUG_UART=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_FIT=y
+CONFIG_FIT_SIGNATURE=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_IMAGE_FORMAT_LEGACY=y
+CONFIG_BOOTCOMMAND="run $modeboot || run distro_bootcmd"
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_PROMPT="Zynq> "
+CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQPL=y
+CONFIG_DM_GPIO=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ZYNQ=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHY_MARVELL=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_XILINX=y
+CONFIG_ZYNQ_GEM=y
+CONFIG_DEBUG_UART_ZYNQ=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_ZYNQ_SERIAL=y
+CONFIG_ZYNQ_QSPI=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_ULPI_VIEWPORT=y
+CONFIG_USB_ULPI=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_CI_UDC=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_USB_FUNCTION_THOR=y
diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig
new file mode 100644
index 0000000000..0b2cd8cd62
--- /dev/null
+++ b/configs/zynq_cse_qspi_defconfig
@@ -0,0 +1,65 @@
+CONFIG_ARM=y
+CONFIG_SYS_CONFIG_NAME="zynq_cse"
+CONFIG_ARCH_ZYNQ=y
+CONFIG_SYS_TEXT_BASE=0xFFFC0000
+CONFIG_ENV_SIZE=0x190
+CONFIG_SPL=y
+CONFIG_DEBUG_UART_BASE=0x0
+CONFIG_DEBUG_UART_CLOCK=0
+CONFIG_SPL_STACK_R_ADDR=0x200000
+# CONFIG_ZYNQ_DDRC_INIT is not set
+# CONFIG_CMD_ZYNQ is not set
+CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-qspi-single"
+CONFIG_DEBUG_UART=y
+CONFIG_DISTRO_DEFAULTS=y
+# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
+CONFIG_BOOTDELAY=-1
+# CONFIG_USE_BOOTCOMMAND is not set
+# CONFIG_DISPLAY_CPUINFO is not set
+# CONFIG_ARCH_EARLY_INIT_R is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_PROMPT="Zynq> "
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_CONSOLE is not set
+# CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_BOOTM is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_GO is not set
+# CONFIG_CMD_RUN is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_SPL is not set
+# CONFIG_CMD_EXPORTENV is not set
+# CONFIG_CMD_IMPORTENV is not set
+# CONFIG_CMD_EDITENV is not set
+# CONFIG_CMD_SAVEENV is not set
+# CONFIG_CMD_CRC32 is not set
+# CONFIG_CMD_CLK is not set
+# CONFIG_CMD_DM is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_SF=y
+# CONFIG_CMD_ECHO is not set
+# CONFIG_CMD_ITEST is not set
+# CONFIG_CMD_SOURCE is not set
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_MISC is not set
+# CONFIG_PARTITIONS is not set
+CONFIG_OF_EMBED=y
+# CONFIG_NET is not set
+# CONFIG_DM_WARN is not set
+# CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_SPL_DM_SEQ_ALIAS=y
+# CONFIG_MMC is not set
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DEBUG_UART_ARM_DCC=y
+CONFIG_ZYNQ_QSPI=y
+# CONFIG_EFI_LOADER is not set
diff --git a/configs/zynq_zc702_defconfig b/configs/zynq_zc702_defconfig
index 21852e55b6..eb78c5b5ec 100644
--- a/configs/zynq_zc702_defconfig
+++ b/configs/zynq_zc702_defconfig
@@ -46,6 +46,8 @@ CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
diff --git a/configs/zynq_zc706_defconfig b/configs/zynq_zc706_defconfig
index dfafc9a9f6..a7c18c381e 100644
--- a/configs/zynq_zc706_defconfig
+++ b/configs/zynq_zc706_defconfig
@@ -45,6 +45,8 @@ CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
diff --git a/configs/zynq_zc770_xm010_defconfig b/configs/zynq_zc770_xm010_defconfig
index e6845cbaca..4add62ab20 100644
--- a/configs/zynq_zc770_xm010_defconfig
+++ b/configs/zynq_zc770_xm010_defconfig
@@ -38,6 +38,8 @@ CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
diff --git a/configs/zynq_zc770_xm013_defconfig b/configs/zynq_zc770_xm013_defconfig
index 5c029109e2..6f7d777ad2 100644
--- a/configs/zynq_zc770_xm013_defconfig
+++ b/configs/zynq_zc770_xm013_defconfig
@@ -30,4 +30,12 @@ CONFIG_SPL_DM_SEQ_ALIAS=y
 # CONFIG_MMC is not set
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHY_MARVELL=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_XILINX=y
 CONFIG_ZYNQ_GEM=y
diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig
index 4484cf8195..98485b1236 100644
--- a/drivers/mtd/spi/Kconfig
+++ b/drivers/mtd/spi/Kconfig
@@ -66,6 +66,11 @@ config SPI_FLASH_GIGADEVICE
 	help
 	  Add support for various GigaDevice SPI flash chips (GD25xxx)
 
+config SPI_FLASH_ISSI
+	bool "ISSI SPI flash support"
+	help
+	  Add support for various ISSI SPI flash chips (ISxxx)
+
 config SPI_FLASH_MACRONIX
 	bool "Macronix SPI flash support"
 	help
diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h
index 153d9c2b21..cfe2f6e878 100644
--- a/include/configs/stmark2.h
+++ b/include/configs/stmark2.h
@@ -76,7 +76,6 @@
 #define CONFIG_SF_DEFAULT_SPEED		50000000
 #define CONFIG_SERIAL_FLASH
 #define CONFIG_HARD_SPI
-#define CONFIG_SPI_FLASH_ISSI
 #define CONFIG_ENV_SPI_BUS		0
 #define CONFIG_ENV_SPI_CS		1
 
diff --git a/include/configs/topic_miami.h b/include/configs/topic_miami.h
index d538080aa3..beb9f2a70c 100644
--- a/include/configs/topic_miami.h
+++ b/include/configs/topic_miami.h
@@ -57,7 +57,6 @@
 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
 #undef CONFIG_SPI_FLASH_WINBOND
-#undef CONFIG_SPI_FLASH_ISSI
 
 /* Setup proper boot sequences for Miami boards */
 
diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
index 6f52936cf0..8c73fa00c3 100644
--- a/include/configs/zynq-common.h
+++ b/include/configs/zynq-common.h
@@ -55,7 +55,6 @@
 /* QSPI */
 #ifdef CONFIG_ZYNQ_QSPI
 # define CONFIG_SF_DEFAULT_SPEED	30000000
-# define CONFIG_SPI_FLASH_ISSI
 #endif
 
 /* NOR */

commit 409ad5ec72c31f7adc739ea2f2baa1f25baacacc
Author: Clément Laigle <c.laigle@catie.fr>
Date:   Thu Jul 26 09:31:41 2018 +0200

    UPSTREAM: mtd: add spi flash id s25fl128l
    
    Add support for SPANSION s25fl128l
    
    Change-Id: I52bc8fe66c45a196bc688c1eb5a55af322ea0b52
    Signed-off-by: Clément Laigle <c.laigle@catie.fr>
    Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
    [jagan: fixed , at the end of } ]
    Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 04d57b1d588aeda00f308028aad6239467f24923)

diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c
index 2b333a6ba8..4ce311c417 100644
--- a/drivers/mtd/spi/spi_flash_ids.c
+++ b/drivers/mtd/spi/spi_flash_ids.c
@@ -111,6 +111,7 @@ const struct spi_flash_info spi_flash_ids[] = {
 	{"s25fl064p",	   INFO(0x010216, 0x4d00,  64 * 1024,   128, RD_FULL | WR_QPP) },
 	{"s25fl128s_256k", INFO(0x012018, 0x4d00, 256 * 1024,    64, RD_FULL | WR_QPP) },
 	{"s25fl128s_64k",  INFO(0x012018, 0x4d01,  64 * 1024,   256, RD_FULL | WR_QPP) },
+	{"s25fl128l",      INFO(0x016018, 0, 64 * 1024,    256, RD_FULL | WR_QPP) },
 	{"s25fl256s_256k", INFO(0x010219, 0x4d00, 256 * 1024,   128, RD_FULL | WR_QPP) },
 	{"s25fs256s_64k",  INFO6(0x010219, 0x4d0181, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) },
 	{"s25fl256s_64k",  INFO(0x010219, 0x4d01,  64 * 1024,   512, RD_FULL | WR_QPP) },

commit 818820e8405a467389dfdecad65a9251b02ab236
Author: Mylène Josserand <mylene.josserand@bootlin.com>
Date:   Fri Jul 13 18:10:24 2018 +0200

    UPSTREAM: mtd: nand: sunxi: Return on set_feature only when not ENOTSUPP
    
    Return the error code of the set_features function only if
    the error code is not ENOTSUPP. Otherwise, if this function
    is not supported, it will return and fail to initialize the
    NAND.
    
    Change-Id: I8fc8c50831fa8c078cb503fd6d2cd9bf9f1032bc
    Signed-off-by: Mylène Josserand <mylene.josserand@bootlin.com>
    Acked-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 850bdafa503e2045a8e931ce601fd71dc33157cf)

diff --git a/drivers/mtd/nand/sunxi_nand.c b/drivers/mtd/nand/sunxi_nand.c
index 37160aaec2..1c07c7ceb0 100644
--- a/drivers/mtd/nand/sunxi_nand.c
+++ b/drivers/mtd/nand/sunxi_nand.c
@@ -1370,7 +1370,7 @@ static int sunxi_nand_chip_init_timings(struct sunxi_nand_chip *chip)
 						ONFI_FEATURE_ADDR_TIMING_MODE,
 						feature);
 			chip->nand.select_chip(mtd, -1);
-			if (ret)
+			if (ret && ret != -ENOTSUPP)
 				return ret;
 		}
 	}

commit 1aab2d2cbb4be6b13f0bbb12fe8642c87378525e
Author: Mylène Josserand <mylene.josserand@bootlin.com>
Date:   Fri Jul 13 18:10:23 2018 +0200

    UPSTREAM: mtd: nand: nand_base: Convert EINVAL into ENOTSUPP
    
    Convert the EINVAL error into ENOTSUPP when the GET/SET_FEATURES
    is not supported.
    
    Change-Id: I97f0329262a75602fd2d776a925ff804d991f45a
    Signed-off-by: Mylène Josserand <mylene.josserand@bootlin.com>
    Acked-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit cbe9ea26e3a275bc3e47414797406a234c0baa55)

diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 64e4621aaa..9094f857c1 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -3041,7 +3041,7 @@ static int nand_onfi_set_features(struct mtd_info *mtd, struct nand_chip *chip,
 	if (!chip->onfi_version ||
 	    !(le16_to_cpu(chip->onfi_params.opt_cmd)
 	      & ONFI_OPT_CMD_SET_GET_FEATURES))
-		return -EINVAL;
+		return -ENOTSUPP;
 #endif
 
 	chip->cmdfunc(mtd, NAND_CMD_SET_FEATURES, addr, -1);
@@ -3070,7 +3070,7 @@ static int nand_onfi_get_features(struct mtd_info *mtd, struct nand_chip *chip,
 	if (!chip->onfi_version ||
 	    !(le16_to_cpu(chip->onfi_params.opt_cmd)
 	      & ONFI_OPT_CMD_SET_GET_FEATURES))
-		return -EINVAL;
+		return -ENOTSUPP;
 #endif
 
 	chip->cmdfunc(mtd, NAND_CMD_GET_FEATURES, addr, -1);

commit a902fc6848024db9f91a05342a5cc22152eb91fe
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Thu Jul 19 10:13:23 2018 +0900

    UPSTREAM: mtd: nand: denali: correct buffer alignment for DMA transfer
    
    The NAND framework makes sure to pass in the buffer with at least
    chip->buf_align alignment.  Currently, the Denali NAND driver only
    requests 16 byte alignment.  This causes unaligned cache operations
    for the DMA transfer.
    
    [Error Example]
    
    => nand read 81000010 0 1000
    
    NAND read: device 0 offset 0x0, size 0x1000
    CACHE: Misaligned operation at range [81000010, 81001010]
    CACHE: Misaligned operation at range [81000010, 81001010]
    CACHE: Misaligned operation at range [81000010, 81001010]
    CACHE: Misaligned operation at range [81000010, 81001010]
     4096 bytes read: OK
    
    Change-Id: I2e336f50ce2cf91e6e0532152ea7a153685f60b4
    Reported-by: Marek Vasut <marex@denx.de>
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 4a610fada193057c97c1b23016ef119f98459b22)

diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
index 3a67653cb9..3fc796c35a 100644
--- a/drivers/mtd/nand/denali.c
+++ b/drivers/mtd/nand/denali.c
@@ -1271,7 +1271,7 @@ int denali_init(struct denali_nand_info *denali)
 		denali->dma_avail = 1;
 
 	if (denali->dma_avail) {
-		chip->buf_align = 16;
+		chip->buf_align = ARCH_DMA_MINALIGN;
 		if (denali->caps & DENALI_CAP_DMA_64BIT)
 			denali->setup_dma = denali_setup_dma64;
 		else

commit 9521748614acfb8a8e9157dedd8caaf3218e92e4
Author: Stefan Agner <stefan.agner@toradex.com>
Date:   Wed May 30 19:01:44 2018 +0200

    UPSTREAM: mtd: nand: mxs_nand: add device tree support for i.MX 6
    
    Support i.MX 6 NAND GPMI driver data from device tree.
    
    Change-Id: Ib374f5e929971be8e9bdad6948ef9908e25e47cf
    Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit c7f367bc8d6b1b5da79aa430c4449c9f505b9577)

diff --git a/drivers/mtd/nand/mxs_nand_dt.c b/drivers/mtd/nand/mxs_nand_dt.c
index f89eb091a9..44dec5dedf 100644
--- a/drivers/mtd/nand/mxs_nand_dt.c
+++ b/drivers/mtd/nand/mxs_nand_dt.c
@@ -21,11 +21,19 @@ struct mxs_nand_dt_data {
 	unsigned int max_ecc_strength_supported;
 };
 
+static const struct mxs_nand_dt_data mxs_nand_imx6q_data = {
+	.max_ecc_strength_supported = 40,
+};
+
 static const struct mxs_nand_dt_data mxs_nand_imx7d_data = {
 	.max_ecc_strength_supported = 62,
 };
 
 static const struct udevice_id mxs_nand_dt_ids[] = {
+	{
+		.compatible = "fsl,imx6q-gpmi-nand",
+		.data = (unsigned long)&mxs_nand_imx6q_data,
+	},
 	{
 		.compatible = "fsl,imx7d-gpmi-nand",
 		.data = (unsigned long)&mxs_nand_imx7d_data,

commit 577968e5669858e1d5bcb651ab28d60d20166252
Author: Adam Ford <aford173@gmail.com>
Date:   Sat Jul 7 22:18:22 2018 -0500

    UPSTREAM: Convert CONFIG_MTD_PARTITIONS et al to Kconfig
    
    This converts the following to Kconfig:
       CONFIG_MTD_PARTITIONS
       CONFIG_MTD_DEVICE
    
    Signed-off-by: Adam Ford <aford173@gmail.com>
    Change-Id: I90c45c7716965009c00d18a19f5491f19b1ab8b3
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 9c5b00973bceb7c0192bd6b03672d69b092700b4)

diff --git a/README b/README
index d762f35e65..f6d745bb8e 100644
--- a/README
+++ b/README
@@ -891,9 +891,6 @@ The following options need to be configured:
 		CONFIG_EFI_PARTITION   GPT partition table, common when EFI is the
 				       bootloader.  Note 2TB partition limit; see
 				       disk/part_efi.c
-		CONFIG_MTD_PARTITIONS  Memory Technology Device partition table.
-
-		If IDE or SCSI support is enabled (CONFIG_IDE or
 		CONFIG_SCSI) you must configure support for at
 		least one non-MTD partition type as well.
 
@@ -2647,17 +2644,6 @@ FIT uImage format:
 		for a more detailed description refer to doc/README.update.
 
 - MTD Support (mtdparts command, UBI support)
-		CONFIG_MTD_DEVICE
-
-		Adds the MTD device infrastructure from the Linux kernel.
-		Needed for mtdparts command support.
-
-		CONFIG_MTD_PARTITIONS
-
-		Adds the MTD partitioning infrastructure from the Linux
-		kernel. Needed for UBI support.
-
-- UBI support
 		CONFIG_MTD_UBI_WL_THRESHOLD
 		This parameter defines the maximum difference between the highest
 		erase counter value and the lowest erase counter value of eraseblocks
diff --git a/cmd/Kconfig b/cmd/Kconfig
index b5b6b36943..50c354f326 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1495,6 +1495,7 @@ config CMD_JFFS2
 
 config CMD_MTDPARTS
 	bool "MTD partition support"
+	select MTD_DEVICE if (CMD_NAND || NAND)
 	help
 	  MTD partition support
 
diff --git a/configs/10m50_defconfig b/configs/10m50_defconfig
index 89f8068be6..34eab13b50 100644
--- a/configs/10m50_defconfig
+++ b/configs/10m50_defconfig
@@ -25,6 +25,7 @@ CONFIG_MISC=y
 CONFIG_ALTERA_SYSID=y
 CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_DEVICE=y
 CONFIG_ALTERA_QSPI=y
 CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
diff --git a/configs/BSC9131RDB_NAND_SYSCLK100_defconfig b/configs/BSC9131RDB_NAND_SYSCLK100_defconfig
index 25a8123db9..fa3831dac9 100644
--- a/configs/BSC9131RDB_NAND_SYSCLK100_defconfig
+++ b/configs/BSC9131RDB_NAND_SYSCLK100_defconfig
@@ -26,6 +26,7 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_FSL_CAAM=y
 # CONFIG_MMC is not set
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
diff --git a/configs/BSC9131RDB_NAND_defconfig b/configs/BSC9131RDB_NAND_defconfig
index 2dc7322257..b9eb95f8d3 100644
--- a/configs/BSC9131RDB_NAND_defconfig
+++ b/configs/BSC9131RDB_NAND_defconfig
@@ -25,6 +25,7 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_FSL_CAAM=y
 # CONFIG_MMC is not set
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
diff --git a/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig b/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig
index 6637e76368..5da73748c0 100644
--- a/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig
+++ b/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig
@@ -23,6 +23,7 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_FSL_CAAM=y
 # CONFIG_MMC is not set
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
diff --git a/configs/BSC9131RDB_SPIFLASH_defconfig b/configs/BSC9131RDB_SPIFLASH_defconfig
index d06fbd11db..570e931e50 100644
--- a/configs/BSC9131RDB_SPIFLASH_defconfig
+++ b/configs/BSC9131RDB_SPIFLASH_defconfig
@@ -23,6 +23,7 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_FSL_CAAM=y
 # CONFIG_MMC is not set
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
diff --git a/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig
index d86d7b1511..97c2e974e6 100644
--- a/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig
+++ b/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig
@@ -23,6 +23,7 @@ CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
diff --git a/configs/BSC9132QDS_NAND_DDRCLK100_defconfig b/configs/BSC9132QDS_NAND_DDRCLK100_defconfig
index 4f46b25011..ab0d163fdc 100644
--- a/configs/BSC9132QDS_NAND_DDRCLK100_defconfig
+++ b/configs/BSC9132QDS_NAND_DDRCLK100_defconfig
@@ -25,6 +25,7 @@ CONFIG_CMD_FAT=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
diff --git a/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig
index d23952f2f4..d08bb5f337 100644
--- a/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig
+++ b/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig
@@ -23,6 +23,7 @@ CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
diff --git a/configs/BSC9132QDS_NAND_DDRCLK133_defconfig b/configs/BSC9132QDS_NAND_DDRCLK133_defconfig
index 4f4431e88c..fe2aab0aa8 100644
--- a/configs/BSC9132QDS_NAND_DDRCLK133_defconfig
+++ b/configs/BSC9132QDS_NAND_DDRCLK133_defconfig
@@ -25,6 +25,7 @@ CONFIG_CMD_FAT=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
diff --git a/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig
index 69b9a0671d..e2d765de64 100644
--- a/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig
+++ b/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig
@@ -23,6 +23,7 @@ CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
diff --git a/configs/BSC9132QDS_NOR_DDRCLK100_defconfig b/configs/BSC9132QDS_NOR_DDRCLK100_defconfig
index 3996e4d5db..9d0ce6695c 100644
--- a/configs/BSC9132QDS_NOR_DDRCLK100_defconfig
+++ b/configs/BSC9132QDS_NOR_DDRCLK100_defconfig
@@ -22,6 +22,7 @@ CONFIG_CMD_FAT=y
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
diff --git a/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig
index 14885dc460..c259f5490a 100644
--- a/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig
+++ b/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig
@@ -23,6 +23,7 @@ CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
diff --git a/configs/BSC9132QDS_NOR_DDRCLK133_defconfig b/configs/BSC9132QDS_NOR_DDRCLK133_defconfig
index 7cd0fdd7d2..7aca9c0e81 100644
--- a/configs/BSC9132QDS_NOR_DDRCLK133_defconfig
+++ b/configs/BSC9132QDS_NOR_DDRCLK133_defconfig
@@ -22,6 +22,7 @@ CONFIG_CMD_FAT=y
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig
index 4bbea52f8b..ca1da8c097 100644
--- a/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig
+++ b/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig
@@ -23,6 +23,7 @@ CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig
index e1ec87420f..ff33e94284 100644
--- a/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig
+++ b/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig
@@ -22,6 +22,7 @@ CONFIG_CMD_FAT=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig
index 7a7e56d71f..999ad1315e 100644
--- a/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig
+++ b/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig
@@ -23,6 +23,7 @@ CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig
index 665486b218..e27eb65b50 100644
--- a/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig
+++ b/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig
@@ -22,6 +22,7 @@ CONFIG_CMD_FAT=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig
index 3c684a0352..bf203e0a03 100644
--- a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig
+++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig
@@ -23,6 +23,7 @@ CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig
index 713006a146..dfc281e24a 100644
--- a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig
+++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig
@@ -22,6 +22,7 @@ CONFIG_CMD_FAT=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig
index dd801ab8e9..0ccb4f6035 100644
--- a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig
+++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig
@@ -23,6 +23,7 @@ CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig
index 855102fbf3..eb27fd0379 100644
--- a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig
+++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig
@@ -22,6 +22,7 @@ CONFIG_CMD_FAT=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig
index ee0fdb0946..7c0faa138d 100644
--- a/configs/P1020RDB-PD_NAND_defconfig
+++ b/configs/P1020RDB-PD_NAND_defconfig
@@ -33,6 +33,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig
index 16cdf8e6b1..2f0f311920 100644
--- a/configs/P1020RDB-PD_SDCARD_defconfig
+++ b/configs/P1020RDB-PD_SDCARD_defconfig
@@ -31,6 +31,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig
index 031afa4bd6..b2403d80b1 100644
--- a/configs/P1020RDB-PD_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PD_SPIFLASH_defconfig
@@ -32,6 +32,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig
index d2d8d91cb0..80a1a6f2c9 100644
--- a/configs/P1020RDB-PD_defconfig
+++ b/configs/P1020RDB-PD_defconfig
@@ -22,6 +22,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
diff --git a/configs/P1021RDB-PC_36BIT_NAND_defconfig b/configs/P1021RDB-PC_36BIT_NAND_defconfig
index e7e0ae003e..9396910a25 100644
--- a/configs/P1021RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P1021RDB-PC_36BIT_NAND_defconfig
@@ -35,6 +35,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
diff --git a/configs/P1021RDB-PC_36BIT_SDCARD_defconfig b/configs/P1021RDB-PC_36BIT_SDCARD_defconfig
index 72973f726d..a51322b8d1 100644
--- a/configs/P1021RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P1021RDB-PC_36BIT_SDCARD_defconfig
@@ -33,6 +33,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
diff --git a/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig
index 7a0bfb0762..5cc93ab8aa 100644
--- a/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig
@@ -34,6 +34,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
diff --git a/configs/P1021RDB-PC_36BIT_defconfig b/configs/P1021RDB-PC_36BIT_defconfig
index 3528db51b5..87ae4afec4 100644
--- a/configs/P1021RDB-PC_36BIT_defconfig
+++ b/configs/P1021RDB-PC_36BIT_defconfig
@@ -24,6 +24,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
diff --git a/configs/P1021RDB-PC_NAND_defconfig b/configs/P1021RDB-PC_NAND_defconfig
index 0e80cf3468..72aab3be49 100644
--- a/configs/P1021RDB-PC_NAND_defconfig
+++ b/configs/P1021RDB-PC_NAND_defconfig
@@ -34,6 +34,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
diff --git a/configs/P1021RDB-PC_SDCARD_defconfig b/configs/P1021RDB-PC_SDCARD_defconfig
index f8899b232b..01c3c70575 100644
--- a/configs/P1021RDB-PC_SDCARD_defconfig
+++ b/configs/P1021RDB-PC_SDCARD_defconfig
@@ -32,6 +32,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
diff --git a/configs/P1021RDB-PC_SPIFLASH_defconfig b/configs/P1021RDB-PC_SPIFLASH_defconfig
index e7408c23ba..5cd0e68152 100644
--- a/configs/P1021RDB-PC_SPIFLASH_defconfig
+++ b/configs/P1021RDB-PC_SPIFLASH_defconfig
@@ -33,6 +33,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
diff --git a/configs/P1021RDB-PC_defconfig b/configs/P1021RDB-PC_defconfig
index 1648ad694f..dd165c1bc1 100644
--- a/configs/P1021RDB-PC_defconfig
+++ b/configs/P1021RDB-PC_defconfig
@@ -23,6 +23,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
diff --git a/configs/P1022DS_36BIT_NAND_defconfig b/configs/P1022DS_36BIT_NAND_defconfig
index 7cd4ebb8f9..e26887aca4 100644
--- a/configs/P1022DS_36BIT_NAND_defconfig
+++ b/configs/P1022DS_36BIT_NAND_defconfig
@@ -35,6 +35,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
diff --git a/configs/P1022DS_36BIT_SDCARD_defconfig b/configs/P1022DS_36BIT_SDCARD_defconfig
index 5e510b9dc9..6c10b09174 100644
--- a/configs/P1022DS_36BIT_SDCARD_defconfig
+++ b/configs/P1022DS_36BIT_SDCARD_defconfig
@@ -33,6 +33,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
diff --git a/configs/P1022DS_36BIT_SPIFLASH_defconfig b/configs/P1022DS_36BIT_SPIFLASH_defconfig
index ec39ffbf2f..385560cc76 100644
--- a/configs/P1022DS_36BIT_SPIFLASH_defconfig
+++ b/configs/P1022DS_36BIT_SPIFLASH_defconfig
@@ -34,6 +34,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
diff --git a/configs/P1022DS_36BIT_defconfig b/configs/P1022DS_36BIT_defconfig
index d2922f3fde..46f92040d1 100644
--- a/configs/P1022DS_36BIT_defconfig
+++ b/configs/P1022DS_36BIT_defconfig
@@ -24,6 +24,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
diff --git a/configs/P1022DS_NAND_defconfig b/configs/P1022DS_NAND_defconfig
index 27cf431fa7..a296b8a477 100644
--- a/configs/P1022DS_NAND_defconfig
+++ b/configs/P1022DS_NAND_defconfig
@@ -34,6 +34,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
diff --git a/configs/P1022DS_SDCARD_defconfig b/configs/P1022DS_SDCARD_defconfig
index 198968e0e7..838487d541 100644
--- a/configs/P1022DS_SDCARD_defconfig
+++ b/configs/P1022DS_SDCARD_defconfig
@@ -32,6 +32,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
diff --git a/configs/P1022DS_SPIFLASH_defconfig b/configs/P1022DS_SPIFLASH_defconfig
index 619b7ca573..8d3a091b14 100644
--- a/configs/P1022DS_SPIFLASH_defconfig
+++ b/configs/P1022DS_SPIFLASH_defconfig
@@ -33,6 +33,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
diff --git a/configs/P1022DS_defconfig b/configs/P1022DS_defconfig
index 4b1b4c3389..350576a46b 100644
--- a/configs/P1022DS_defconfig
+++ b/configs/P1022DS_defconfig
@@ -23,6 +23,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig
index 3e33eae34f..0193ea3f71 100644
--- a/configs/P2020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig
@@ -35,6 +35,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
index 5ba0ff9b4f..0c396be014 100644
--- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
@@ -33,6 +33,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
index 482b092528..8d16310813 100644
--- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -34,6 +34,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig
index 1e074bcf49..25c929c81a 100644
--- a/configs/P2020RDB-PC_36BIT_defconfig
+++ b/configs/P2020RDB-PC_36BIT_defconfig
@@ -24,6 +24,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig
index 74555f9d9d..06960ce39a 100644
--- a/configs/P2020RDB-PC_NAND_defconfig
+++ b/configs/P2020RDB-PC_NAND_defconfig
@@ -34,6 +34,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig
index 4646895edb..cedb4a8ca2 100644
--- a/configs/P2020RDB-PC_SDCARD_defconfig
+++ b/configs/P2020RDB-PC_SDCARD_defconfig
@@ -32,6 +32,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig
index 4f8a4aac8d..9bc909b922 100644
--- a/configs/P2020RDB-PC_SPIFLASH_defconfig
+++ b/configs/P2020RDB-PC_SPIFLASH_defconfig
@@ -33,6 +33,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig
index b32dc629c7..10c00491fa 100644
--- a/configs/P2020RDB-PC_defconfig
+++ b/configs/P2020RDB-PC_defconfig
@@ -23,6 +23,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
diff --git a/configs/T1023RDB_NAND_defconfig b/configs/T1023RDB_NAND_defconfig
index 7d2ae4d011..53c5d40bda 100644
--- a/configs/T1023RDB_NAND_defconfig
+++ b/configs/T1023RDB_NAND_defconfig
@@ -36,6 +36,7 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
diff --git a/configs/T1023RDB_SDCARD_defconfig b/configs/T1023RDB_SDCARD_defconfig
index de61b58985..057b7353c4 100644
--- a/configs/T1023RDB_SDCARD_defconfig
+++ b/configs/T1023RDB_SDCARD_defconfig
@@ -36,6 +36,7 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
diff --git a/configs/T1023RDB_SECURE_BOOT_defconfig b/configs/T1023RDB_SECURE_BOOT_defconfig
index 0c81e91e84..02dc739da7 100644
--- a/configs/T1023RDB_SECURE_BOOT_defconfig
+++ b/configs/T1023RDB_SECURE_BOOT_defconfig
@@ -25,6 +25,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
diff --git a/configs/T1023RDB_SPIFLASH_defconfig b/configs/T1023RDB_SPIFLASH_defconfig
index 82dba0b3ee..9c65d574ee 100644
--- a/configs/T1023RDB_SPIFLASH_defconfig
+++ b/configs/T1023RDB_SPIFLASH_defconfig
@@ -37,6 +37,7 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
diff --git a/configs/T1023RDB_defconfig b/configs/T1023RDB_defconfig
index ce0df6651b..21639186bc 100644
--- a/configs/T1023RDB_defconfig
+++ b/configs/T1023RDB_defconfig
@@ -24,6 +24,7 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
diff --git a/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig b/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig
index 8ec02060da..a7959cc542 100644
--- a/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig
+++ b/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig
@@ -28,6 +28,7 @@ CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/T1024QDS_DDR4_defconfig b/configs/T1024QDS_DDR4_defconfig
index bd71f90935..a358b3455c 100644
--- a/configs/T1024QDS_DDR4_defconfig
+++ b/configs/T1024QDS_DDR4_defconfig
@@ -27,6 +27,7 @@ CONFIG_CMD_FAT=y
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/T1024QDS_NAND_defconfig b/configs/T1024QDS_NAND_defconfig
index 16d35b2f68..f5b350b092 100644
--- a/configs/T1024QDS_NAND_defconfig
+++ b/configs/T1024QDS_NAND_defconfig
@@ -38,6 +38,7 @@ CONFIG_ENV_IS_IN_NAND=y
 CONFIG_FSL_CAAM=y
 CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
diff --git a/configs/T1024QDS_SDCARD_defconfig b/configs/T1024QDS_SDCARD_defconfig
index d1fc51eb3c..358248a914 100644
--- a/configs/T1024QDS_SDCARD_defconfig
+++ b/configs/T1024QDS_SDCARD_defconfig
@@ -38,6 +38,7 @@ CONFIG_ENV_IS_IN_MMC=y
 CONFIG_FSL_CAAM=y
 CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/T1024QDS_SECURE_BOOT_defconfig b/configs/T1024QDS_SECURE_BOOT_defconfig
index 20b1e3d7b5..25655e297d 100644
--- a/configs/T1024QDS_SECURE_BOOT_defconfig
+++ b/configs/T1024QDS_SECURE_BOOT_defconfig
@@ -29,6 +29,7 @@ CONFIG_CMD_FAT=y
 CONFIG_DM=y
 CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/T1024QDS_SPIFLASH_defconfig b/configs/T1024QDS_SPIFLASH_defconfig
index c2470800ce..d3cb1f402d 100644
--- a/configs/T1024QDS_SPIFLASH_defconfig
+++ b/configs/T1024QDS_SPIFLASH_defconfig
@@ -39,6 +39,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_FSL_CAAM=y
 CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/T1024QDS_defconfig b/configs/T1024QDS_defconfig
index aee3c9238b..96edb3ae68 100644
--- a/configs/T1024QDS_defconfig
+++ b/configs/T1024QDS_defconfig
@@ -28,6 +28,7 @@ CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_FSL_CAAM=y
 CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig
index 979dbce6bf..581316dbd8 100644
--- a/configs/T1024RDB_NAND_defconfig
+++ b/configs/T1024RDB_NAND_defconfig
@@ -36,6 +36,7 @@ CONFIG_ENV_IS_IN_NAND=y
 CONFIG_FSL_CAAM=y
 CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig
index 468a1bf5d0..f60e01c800 100644
--- a/configs/T1024RDB_SDCARD_defconfig
+++ b/configs/T1024RDB_SDCARD_defconfig
@@ -36,6 +36,7 @@ CONFIG_ENV_IS_IN_MMC=y
 CONFIG_FSL_CAAM=y
 CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
diff --git a/configs/T1024RDB_SECURE_BOOT_defconfig b/configs/T1024RDB_SECURE_BOOT_defconfig
index 0daabfcd19..ef7f2e6baa 100644
--- a/configs/T1024RDB_SECURE_BOOT_defconfig
+++ b/configs/T1024RDB_SECURE_BOOT_defconfig
@@ -27,6 +27,7 @@ CONFIG_CMD_FAT=y
 CONFIG_DM=y
 CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig
index 5b6bacb333..4b0c80a9b9 100644
--- a/configs/T1024RDB_SPIFLASH_defconfig
+++ b/configs/T1024RDB_SPIFLASH_defconfig
@@ -37,6 +37,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_FSL_CAAM=y
 CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
diff --git a/configs/T1024RDB_defconfig b/configs/T1024RDB_defconfig
index 5ba4fac8a3..53ff662bbd 100644
--- a/configs/T1024RDB_defconfig
+++ b/configs/T1024RDB_defconfig
@@ -26,6 +26,7 @@ CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_FSL_CAAM=y
 CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
diff --git a/configs/T1040D4RDB_NAND_defconfig b/configs/T1040D4RDB_NAND_defconfig
index f5229c6143..d440dd0e7e 100644
--- a/configs/T1040D4RDB_NAND_defconfig
+++ b/configs/T1040D4RDB_NAND_defconfig
@@ -34,6 +34,7 @@ CONFIG_CMD_FAT=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/T1040D4RDB_SDCARD_defconfig b/configs/T1040D4RDB_SDCARD_defconfig
index e9ad05af19..82d9c4d708 100644
--- a/configs/T1040D4RDB_SDCARD_defconfig
+++ b/configs/T1040D4RDB_SDCARD_defconfig
@@ -34,6 +34,7 @@ CONFIG_CMD_FAT=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
diff --git a/configs/T1040D4RDB_SECURE_BOOT_defconfig b/configs/T1040D4RDB_SECURE_BOOT_defconfig
index 91bc7a0587..e9eceaa536 100644
--- a/configs/T1040D4RDB_SECURE_BOOT_defconfig
+++ b/configs/T1040D4RDB_SECURE_BOOT_defconfig
@@ -25,6 +25,7 @@ CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
diff --git a/configs/T1040D4RDB_SPIFLASH_defconfig b/configs/T1040D4RDB_SPIFLASH_defconfig
index 6d9ed8af19..0496f0584e 100644
--- a/configs/T1040D4RDB_SPIFLASH_defconfig
+++ b/configs/T1040D4RDB_SPIFLASH_defconfig
@@ -35,6 +35,7 @@ CONFIG_CMD_FAT=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
diff --git a/configs/T1040D4RDB_defconfig b/configs/T1040D4RDB_defconfig
index e67757c75a..d6fa198896 100644
--- a/configs/T1040D4RDB_defconfig
+++ b/configs/T1040D4RDB_defconfig
@@ -24,6 +24,7 @@ CONFIG_CMD_FAT=y
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
diff --git a/configs/T1040QDS_DDR4_defconfig b/configs/T1040QDS_DDR4_defconfig
index 4506cd5acd..6baef6af28 100644
--- a/configs/T1040QDS_DDR4_defconfig
+++ b/configs/T1040QDS_DDR4_defconfig
@@ -28,6 +28,7 @@ CONFIG_CMD_FAT=y
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/T1040QDS_SECURE_BOOT_defconfig b/configs/T1040QDS_SECURE_BOOT_defconfig
index 9910f24ff4..dfb58906a0 100644
--- a/configs/T1040QDS_SECURE_BOOT_defconfig
+++ b/configs/T1040QDS_SECURE_BOOT_defconfig
@@ -30,6 +30,7 @@ CONFIG_CMD_FAT=y
 CONFIG_DM=y
 CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/T1040QDS_defconfig b/configs/T1040QDS_defconfig
index 39e3018d6e..7ba223daa1 100644
--- a/configs/T1040QDS_defconfig
+++ b/configs/T1040QDS_defconfig
@@ -29,6 +29,7 @@ CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_FSL_CAAM=y
 CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/T1040RDB_NAND_defconfig b/configs/T1040RDB_NAND_defconfig
index ca65c190a1..6d4dbb67b4 100644
--- a/configs/T1040RDB_NAND_defconfig
+++ b/configs/T1040RDB_NAND_defconfig
@@ -35,6 +35,7 @@ CONFIG_ENV_IS_IN_NAND=y
 CONFIG_FSL_CAAM=y
 CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/T1040RDB_SDCARD_defconfig b/configs/T1040RDB_SDCARD_defconfig
index 7ff52d2992..5dedd664c9 100644
--- a/configs/T1040RDB_SDCARD_defconfig
+++ b/configs/T1040RDB_SDCARD_defconfig
@@ -35,6 +35,7 @@ CONFIG_ENV_IS_IN_MMC=y
 CONFIG_FSL_CAAM=y
 CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
diff --git a/configs/T1040RDB_SECURE_BOOT_defconfig b/configs/T1040RDB_SECURE_BOOT_defconfig
index f6cf68fa94..79dbd7616c 100644
--- a/configs/T1040RDB_SECURE_BOOT_defconfig
+++ b/configs/T1040RDB_SECURE_BOOT_defconfig
@@ -26,6 +26,7 @@ CONFIG_CMD_FAT=y
 CONFIG_DM=y
 CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
diff --git a/configs/T1040RDB_SPIFLASH_defconfig b/configs/T1040RDB_SPIFLASH_defconfig
index 8c0f1d11b7..9560a22bae 100644
--- a/configs/T1040RDB_SPIFLASH_defconfig
+++ b/configs/T1040RDB_SPIFLASH_defconfig
@@ -36,6 +36,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_FSL_CAAM=y
 CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
diff --git a/configs/T1040RDB_defconfig b/configs/T1040RDB_defconfig
index 3f19a7ed33..acf4a680c0 100644
--- a/configs/T1040RDB_defconfig
+++ b/configs/T1040RDB_defconfig
@@ -25,6 +25,7 @@ CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_FSL_CAAM=y
 CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig
index dd4d748ce8..2803076b7e 100644
--- a/configs/T1042D4RDB_NAND_defconfig
+++ b/configs/T1042D4RDB_NAND_defconfig
@@ -36,6 +36,7 @@ CONFIG_CMD_FAT=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig
index 9593d27cee..20ff856df2 100644
--- a/configs/T1042D4RDB_SDCARD_defconfig
+++ b/configs/T1042D4RDB_SDCARD_defconfig
@@ -36,6 +36,7 @@ CONFIG_CMD_FAT=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
diff --git a/configs/T1042D4RDB_SECURE_BOOT_defconfig b/configs/T1042D4RDB_SECURE_BOOT_defconfig
index 1692b47fa5..25f0b01461 100644
--- a/configs/T1042D4RDB_SECURE_BOOT_defconfig
+++ b/configs/T1042D4RDB_SECURE_BOOT_defconfig
@@ -27,6 +27,7 @@ CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig
index 316e14fe4b..2abae0d188 100644
--- a/configs/T1042D4RDB_SPIFLASH_defconfig
+++ b/configs/T1042D4RDB_SPIFLASH_defconfig
@@ -37,6 +37,7 @@ CONFIG_CMD_FAT=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig
index d69c5910c0..2c6be3661b 100644
--- a/configs/T1042D4RDB_defconfig
+++ b/configs/T1042D4RDB_defconfig
@@ -26,6 +26,7 @@ CONFIG_CMD_FAT=y
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
diff --git a/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig b/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig
index 3a8e7e7b9d..b0e72ab4af 100644
--- a/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig
+++ b/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig
@@ -41,6 +41,7 @@ CONFIG_DM=y
 CONFIG_SPL_DM=y
 CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/T1042RDB_PI_NAND_defconfig b/configs/T1042RDB_PI_NAND_defconfig
index 9489972cfa..37eab806a2 100644
--- a/configs/T1042RDB_PI_NAND_defconfig
+++ b/configs/T1042RDB_PI_NAND_defconfig
@@ -38,6 +38,7 @@ CONFIG_ENV_IS_IN_NAND=y
 CONFIG_FSL_CAAM=y
 CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/T1042RDB_PI_SDCARD_defconfig b/configs/T1042RDB_PI_SDCARD_defconfig
index 5b678ed185..a45168abcb 100644
--- a/configs/T1042RDB_PI_SDCARD_defconfig
+++ b/configs/T1042RDB_PI_SDCARD_defconfig
@@ -38,6 +38,7 @@ CONFIG_ENV_IS_IN_MMC=y
 CONFIG_FSL_CAAM=y
 CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
diff --git a/configs/T1042RDB_PI_SPIFLASH_defconfig b/configs/T1042RDB_PI_SPIFLASH_defconfig
index fd6bc4e9f7..2aea77f06e 100644
--- a/configs/T1042RDB_PI_SPIFLASH_defconfig
+++ b/configs/T1042RDB_PI_SPIFLASH_defconfig
@@ -39,6 +39,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_FSL_CAAM=y
 CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
diff --git a/configs/T1042RDB_PI_defconfig b/configs/T1042RDB_PI_defconfig
index 9ab594c173..8f05033b21 100644
--- a/configs/T1042RDB_PI_defconfig
+++ b/configs/T1042RDB_PI_defconfig
@@ -28,6 +28,7 @@ CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_FSL_CAAM=y
 CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
diff --git a/configs/T1042RDB_SECURE_BOOT_defconfig b/configs/T1042RDB_SECURE_BOOT_defconfig
index b43bfdd7d3..b2f6dd34dd 100644
--- a/configs/T1042RDB_SECURE_BOOT_defconfig
+++ b/configs/T1042RDB_SECURE_BOOT_defconfig
@@ -25,6 +25,7 @@ CONFIG_CMD_FAT=y
 CONFIG_DM=y
 CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
diff --git a/configs/T1042RDB_defconfig b/configs/T1042RDB_defconfig
index b103c43f3e..781881d220 100644
--- a/configs/T1042RDB_defconfig
+++ b/configs/T1042RDB_defconfig
@@ -24,6 +24,7 @@ CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_FSL_CAAM=y
 CONFIG_SYS_FSL_DDR3=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig
index 671eacc050..b2905d8331 100644
--- a/configs/T2080QDS_NAND_defconfig
+++ b/configs/T2080QDS_NAND_defconfig
@@ -31,6 +31,7 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig
index faa43d3dbc..f422d41bf1 100644
--- a/configs/T2080QDS_SDCARD_defconfig
+++ b/configs/T2080QDS_SDCARD_defconfig
@@ -31,6 +31,7 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig
index 5b341aa5d2..1ab33f7754 100644
--- a/configs/T2080QDS_SECURE_BOOT_defconfig
+++ b/configs/T2080QDS_SECURE_BOOT_defconfig
@@ -22,6 +22,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig
index c8a8095a31..9f9dfb164d 100644
--- a/configs/T2080QDS_SPIFLASH_defconfig
+++ b/configs/T2080QDS_SPIFLASH_defconfig
@@ -32,6 +32,7 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig
index 985e98ae4b..6fd7199b05 100644
--- a/configs/T2080QDS_defconfig
+++ b/configs/T2080QDS_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig
index 72bfa02914..6482bd0661 100644
--- a/configs/T2080RDB_NAND_defconfig
+++ b/configs/T2080RDB_NAND_defconfig
@@ -32,6 +32,7 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig
index 2aee843342..ac64be5143 100644
--- a/configs/T2080RDB_SDCARD_defconfig
+++ b/configs/T2080RDB_SDCARD_defconfig
@@ -32,6 +32,7 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
diff --git a/configs/T2080RDB_SECURE_BOOT_defconfig b/configs/T2080RDB_SECURE_BOOT_defconfig
index ec6f975ab1..670ec89259 100644
--- a/configs/T2080RDB_SECURE_BOOT_defconfig
+++ b/configs/T2080RDB_SECURE_BOOT_defconfig
@@ -23,6 +23,7 @@ CONFIG_CMD_MTDPARTS=y
 # CONFIG_CMD_IRQ is not set
 CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig
index 1186cc0b81..073f7e9e84 100644
--- a/configs/T2080RDB_SPIFLASH_defconfig
+++ b/configs/T2080RDB_SPIFLASH_defconfig
@@ -33,6 +33,7 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
diff --git a/configs/T2080RDB_defconfig b/configs/T2080RDB_defconfig
index 58d16c67fb..7f6baa8927 100644
--- a/configs/T2080RDB_defconfig
+++ b/configs/T2080RDB_defconfig
@@ -22,6 +22,7 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
diff --git a/configs/T2081QDS_NAND_defconfig b/configs/T2081QDS_NAND_defconfig
index 6a261afe85..168b17e39b 100644
--- a/configs/T2081QDS_NAND_defconfig
+++ b/configs/T2081QDS_NAND_defconfig
@@ -31,6 +31,7 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
diff --git a/configs/T2081QDS_SDCARD_defconfig b/configs/T2081QDS_SDCARD_defconfig
index 2edd417439..17e90deeb4 100644
--- a/configs/T2081QDS_SDCARD_defconfig
+++ b/configs/T2081QDS_SDCARD_defconfig
@@ -31,6 +31,7 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/T2081QDS_SPIFLASH_defconfig b/configs/T2081QDS_SPIFLASH_defconfig
index dee4b901a6..f268c7ef35 100644
--- a/configs/T2081QDS_SPIFLASH_defconfig
+++ b/configs/T2081QDS_SPIFLASH_defconfig
@@ -32,6 +32,7 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/T2081QDS_defconfig b/configs/T2081QDS_defconfig
index 70c395944c..d45df35f83 100644
--- a/configs/T2081QDS_defconfig
+++ b/configs/T2081QDS_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_FSL_CAAM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/TQM834x_defconfig b/configs/TQM834x_defconfig
index fe7819e5a0..3ce17d075e 100644
--- a/configs/TQM834x_defconfig
+++ b/configs/TQM834x_defconfig
@@ -19,6 +19,9 @@ CONFIG_CMD_JFFS2=y
 CONFIG_CMD_MTDPARTS=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
-CONFIG_PHYLIB=y
+CONFIG_MTD_DEVICE=y
+CONFIG_PHY_MARVELL=y
+CONFIG_NETDEVICES=y
+CONFIG_TSEC_ENET=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/TWR-P1025_defconfig b/configs/TWR-P1025_defconfig
index 3389f9a63b..fc83a03036 100644
--- a/configs/TWR-P1025_defconfig
+++ b/configs/TWR-P1025_defconfig
@@ -23,7 +23,9 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_MTD_NOR_FLASH=y
-CONFIG_PHYLIB=y
+CONFIG_MTD_DEVICE=y
+CONFIG_MTD_PARTITIONS=y
+CONFIG_PHY_MARVELL=y
 CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
diff --git a/configs/alt_defconfig b/configs/alt_defconfig
index b191564e96..3ec7cf97d0 100644
--- a/configs/alt_defconfig
+++ b/configs/alt_defconfig
@@ -22,6 +22,18 @@ CONFIG_CMD_EXT4=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_CLK=y
+CONFIG_CLK_RENESAS=y
+CONFIG_DM_GPIO=y
+CONFIG_RCAR_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_RCAR_IIC=y
+CONFIG_DM_MMC=y
+CONFIG_SH_MMCIF=y
+CONFIG_RENESAS_SDHI=y
+CONFIG_MTD=y
+CONFIG_MTD_DEVICE=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_SPANSION=y
diff --git a/configs/am335x_evm_norboot_defconfig b/configs/am335x_evm_norboot_defconfig
index c5e7425a77..97205a94f0 100644
--- a/configs/am335x_evm_norboot_defconfig
+++ b/configs/am335x_evm_norboot_defconfig
@@ -21,6 +21,7 @@ CONFIG_DFU_MMC=y
 CONFIG_DFU_RAM=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_DEVICE=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_PHYLIB=y
diff --git a/configs/am335x_evm_spiboot_defconfig b/configs/am335x_evm_spiboot_defconfig
index 501fb2b90f..29757657d5 100644
--- a/configs/am335x_evm_spiboot_defconfig
+++ b/configs/am335x_evm_spiboot_defconfig
@@ -25,6 +25,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_DFU_MMC=y
 CONFIG_DFU_RAM=y
 CONFIG_MMC_OMAP_HS=y
+CONFIG_MTD_DEVICE=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_PHYLIB=y
diff --git a/configs/at91sam9n12ek_mmc_defconfig b/configs/at91sam9n12ek_mmc_defconfig
index fb43b68c22..f3ce2c55ef 100644
--- a/configs/at91sam9n12ek_mmc_defconfig
+++ b/configs/at91sam9n12ek_mmc_defconfig
@@ -36,6 +36,7 @@ CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/at91sam9n12ek_nandflash_defconfig b/configs/at91sam9n12ek_nandflash_defconfig
index 1bb2545809..9c63c302c0 100644
--- a/configs/at91sam9n12ek_nandflash_defconfig
+++ b/configs/at91sam9n12ek_nandflash_defconfig
@@ -36,6 +36,7 @@ CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/at91sam9n12ek_spiflash_defconfig b/configs/at91sam9n12ek_spiflash_defconfig
index 021994267b..b2f28e8819 100644
--- a/configs/at91sam9n12ek_spiflash_defconfig
+++ b/configs/at91sam9n12ek_spiflash_defconfig
@@ -36,6 +36,7 @@ CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/bitmain_antminer_s9_defconfig b/configs/bitmain_antminer_s9_defconfig
new file mode 100644
index 0000000000..e7f473b359
--- /dev/null
+++ b/configs/bitmain_antminer_s9_defconfig
@@ -0,0 +1,68 @@
+CONFIG_ARM=y
+CONFIG_SYS_VENDOR="bitmain"
+CONFIG_SYS_BOARD="antminer_s9"
+CONFIG_SYS_CONFIG_NAME="bitmain_antminer_s9"
+CONFIG_ARCH_ZYNQ=y
+CONFIG_SYS_TEXT_BASE=0x4000000
+CONFIG_ENV_OFFSET=0x300000
+CONFIG_SPL=y
+CONFIG_DEBUG_UART_BASE=0xe0001000
+CONFIG_DEBUG_UART_CLOCK=50000000
+CONFIG_SPL_STACK_R_ADDR=0x200000
+CONFIG_DEFAULT_DEVICE_TREE="bitmain-antminer-s9"
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_FIT_SIGNATURE=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_BOOTDELAY=3
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="antminer> "
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_DM is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_FPGA_LOADBP=y
+CONFIG_CMD_FPGA_LOADFS=y
+CONFIG_CMD_FPGA_LOADMK=y
+CONFIG_CMD_FPGA_LOADP=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND_LOCK_UNLOCK=y
+CONFIG_CMD_PART=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_DHCP=y
+# CONFIG_CMD_NFS is not set
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_PXE=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_OF_EMBED=y
+CONFIG_ENV_IS_IN_NAND=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0xEFFFFF0
+CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQPL=y
+CONFIG_DM_GPIO=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ZYNQ=y
+CONFIG_MTD_DEVICE=y
+CONFIG_NAND=y
+CONFIG_NAND_ZYNQ=y
+CONFIG_NAND_ZYNQ_USE_BOOTLOADER1_TIMINGS=y
+CONFIG_ZYNQ_GEM=y
+CONFIG_DEBUG_UART_ZYNQ=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_ZYNQ_SERIAL=y
+# CONFIG_WATCHDOG is not set
+CONFIG_WDT=y
+CONFIG_WDT_CDNS=y
+# CONFIG_EFI_LOADER is not set
diff --git a/configs/brppt1_spi_defconfig b/configs/brppt1_spi_defconfig
index 9839ca4c49..4cef0021ef 100644
--- a/configs/brppt1_spi_defconfig
+++ b/configs/brppt1_spi_defconfig
@@ -58,6 +58,8 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_NETCONSOLE=y
 CONFIG_MMC_OMAP_HS=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_MTD_DEVICE=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig
index acb6f5ce58..54f41010bc 100644
--- a/configs/cm_fx6_defconfig
+++ b/configs/cm_fx6_defconfig
@@ -43,6 +43,8 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_OF_CONTROL=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_DM_MMC=y
+CONFIG_FSL_ESDHC=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NAND=y
 CONFIG_NAND_MXS=y
 CONFIG_SPI_FLASH=y
diff --git a/configs/cm_t3517_defconfig b/configs/cm_t3517_defconfig
index 46b5c1c11e..b74508ac1e 100644
--- a/configs/cm_t3517_defconfig
+++ b/configs/cm_t3517_defconfig
@@ -37,6 +37,7 @@ CONFIG_LED_STATUS_STATE=2
 CONFIG_LED_STATUS_BOOT_ENABLE=y
 CONFIG_LED_STATUS_BOOT=0
 CONFIG_MMC_OMAP_HS=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NAND=y
 CONFIG_SYS_NS16550=y
 CONFIG_OMAP3_SPI=y
diff --git a/configs/cm_t35_defconfig b/configs/cm_t35_defconfig
index db8c836963..8b6427c6d8 100644
--- a/configs/cm_t35_defconfig
+++ b/configs/cm_t35_defconfig
@@ -39,6 +39,7 @@ CONFIG_LED_STATUS_STATE=2
 CONFIG_LED_STATUS_BOOT_ENABLE=y
 CONFIG_LED_STATUS_BOOT=0
 CONFIG_MMC_OMAP_HS=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NAND=y
 CONFIG_SPL_NAND_SIMPLE=y
 CONFIG_SYS_NS16550=y
diff --git a/configs/corvus_defconfig b/configs/corvus_defconfig
index 61f6dbd477..f850d1c52d 100644
--- a/configs/corvus_defconfig
+++ b/configs/corvus_defconfig
@@ -44,6 +44,7 @@ CONFIG_DFU_NAND=y
 # CONFIG_MMC is not set
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_PHYLIB=y
 # CONFIG_SPL_DM_SERIAL is not set
 CONFIG_ATMEL_USART=y
diff --git a/configs/da850_am18xxevm_defconfig b/configs/da850_am18xxevm_defconfig
index cb3726d6f5..52af03835f 100644
--- a/configs/da850_am18xxevm_defconfig
+++ b/configs/da850_am18xxevm_defconfig
@@ -32,6 +32,12 @@ CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_DIAG=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_DM=y
+CONFIG_DM_I2C=y
+CONFIG_DM_I2C_COMPAT=y
+CONFIG_MTD_DEVICE=y
+CONFIG_MTD_PARTITIONS=y
+CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig
index ac542358b5..7eead565d1 100644
--- a/configs/da850evm_defconfig
+++ b/configs/da850evm_defconfig
@@ -34,6 +34,13 @@ CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_DIAG=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_DM=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_DM_I2C_COMPAT=y
+CONFIG_MTD_DEVICE=y
+CONFIG_MTD_PARTITIONS=y
+CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
diff --git a/configs/display5_defconfig b/configs/display5_defconfig
new file mode 100644
index 0000000000..2a85cf1074
--- /dev/null
+++ b/configs/display5_defconfig
@@ -0,0 +1,74 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
+CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_MX6_DDRCAL=y
+CONFIG_TARGET_DISPLAY5=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_DEFAULT_DEVICE_TREE="imx6q-display5"
+CONFIG_FIT=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6Q"
+CONFIG_SUPPORT_RAW_INITRD=y
+CONFIG_SPL_BOOTCOUNT_LIMIT=y
+# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
+CONFIG_SPL_DMA_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_SAVEENV=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_OS_BOOT=y
+CONFIG_SPL_SPI_LOAD=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="display5 > "
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_ELF is not set
+CONFIG_CMD_ASKENV=y
+CONFIG_CRC32_VERIFY=y
+CONFIG_CMD_EEPROM=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_MTDIDS_DEFAULT="nor0=02008000.spi.1"
+CONFIG_MTDPARTS_DEFAULT="mtdparts=02008000.spi.1:128k(SPL),1m(u-boot),64k(env1),64k(env2),4m(swu-kernel),16m(swu-initramfs),1m(factory),-(reserved)"
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_OF_CONTROL=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0x020CC068
+CONFIG_FSL_ESDHC=y
+CONFIG_MTD_DEVICE=y
+CONFIG_MTD_PARTITIONS=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MARVELL=y
+CONFIG_NETDEVICES=y
+CONFIG_FEC_MXC=y
+CONFIG_MXC_UART=y
+CONFIG_SPI=y
+CONFIG_MXC_SPI=y
diff --git a/configs/display5_factory_defconfig b/configs/display5_factory_defconfig
new file mode 100644
index 0000000000..3cd2d6c888
--- /dev/null
+++ b/configs/display5_factory_defconfig
@@ -0,0 +1,83 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
+CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_TARGET_DISPLAY5=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_FIT=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6Q"
+CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTCOMMAND=y
+CONFIG_BOOTCOMMAND="run factory"
+CONFIG_SUPPORT_RAW_INITRD=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
+CONFIG_SPL_DMA_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_OS_BOOT=y
+CONFIG_SPL_SPI_LOAD=y
+CONFIG_SPL_USB_HOST_SUPPORT=y
+CONFIG_SPL_USB_GADGET_SUPPORT=y
+CONFIG_SPL_USB_SDP_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="display5 factory > "
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_ELF is not set
+CONFIG_CMD_ASKENV=y
+CONFIG_CRC32_VERIFY=y
+CONFIG_CMD_EEPROM=y
+CONFIG_CMD_DFU=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB_SDP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_MTDIDS_DEFAULT="nor0=02008000.spi.1"
+CONFIG_MTDPARTS_DEFAULT="mtdparts=02008000.spi.1:128k(SPL),1m(u-boot),64k(env1),64k(env2),4m(swu-kernel),16m(swu-initramfs),1m(factory),-(reserved)"
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_PARTITION_TYPE_GUID=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_DFU_MMC=y
+CONFIG_DFU_SF=y
+CONFIG_FSL_ESDHC=y
+CONFIG_MTD_DEVICE=y
+CONFIG_MTD_PARTITIONS=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_NETDEVICES=y
+CONFIG_FEC_MXC=y
+CONFIG_MXC_UART=y
+CONFIG_SPI=y
+CONFIG_MXC_SPI=y
+CONFIG_USB=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Liebherr"
+CONFIG_USB_GADGET_VENDOR_NUM=0x1b67
+CONFIG_USB_GADGET_PRODUCT_NUM=0x4000
+CONFIG_CI_UDC=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_OF_LIBFDT=y
diff --git a/configs/ds414_defconfig b/configs/ds414_defconfig
index 96bdbeb0ea..f16b0e3522 100644
--- a/configs/ds414_defconfig
+++ b/configs/ds414_defconfig
@@ -35,6 +35,7 @@ CONFIG_CMD_UBI=y
 CONFIG_ISO_PARTITION=y
 CONFIG_SPL_OF_TRANSLATE=y
 # CONFIG_MMC is not set
+CONFIG_MTD_DEVICE=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/flea3_defconfig b/configs/flea3_defconfig
index 87f54f3b22..4527204fd4 100644
--- a/configs/flea3_defconfig
+++ b/configs/flea3_defconfig
@@ -18,6 +18,7 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_FLASH=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NAND=y
 CONFIG_NAND_MXC=y
 CONFIG_PHYLIB=y
diff --git a/configs/gose_defconfig b/configs/gose_defconfig
index d887ee3bd3..562dee54cb 100644
--- a/configs/gose_defconfig
+++ b/configs/gose_defconfig
@@ -22,6 +22,17 @@ CONFIG_CMD_EXT4=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_CLK=y
+CONFIG_CLK_RENESAS=y
+CONFIG_DM_GPIO=y
+CONFIG_RCAR_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_RCAR_IIC=y
+CONFIG_DM_MMC=y
+CONFIG_RENESAS_SDHI=y
+CONFIG_MTD=y
+CONFIG_MTD_DEVICE=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_SPANSION=y
diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig
index 74aa2ef566..60a11675d2 100644
--- a/configs/gwventana_emmc_defconfig
+++ b/configs/gwventana_emmc_defconfig
@@ -53,6 +53,10 @@ CONFIG_CMD_FS_GENERIC=y
 CONFIG_CMD_UBI=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_DM=y
+CONFIG_DWC_AHSATA=y
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_FSL_ESDHC=y
+CONFIG_MTD_DEVICE=y
 CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig
index 7bbdd500a7..e81cadbff8 100644
--- a/configs/gwventana_gw5904_defconfig
+++ b/configs/gwventana_gw5904_defconfig
@@ -53,6 +53,10 @@ CONFIG_CMD_FS_GENERIC=y
 CONFIG_CMD_UBI=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_DM=y
+CONFIG_DWC_AHSATA=y
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_FSL_ESDHC=y
+CONFIG_MTD_DEVICE=y
 CONFIG_PHYLIB=y
 CONFIG_MV88E61XX_SWITCH=y
 CONFIG_MV88E61XX_CPU_PORT=5
diff --git a/configs/hikey_defconfig b/configs/hikey_defconfig
index 8a7a1be081..8375ff2cef 100644
--- a/configs/hikey_defconfig
+++ b/configs/hikey_defconfig
@@ -19,6 +19,8 @@ CONFIG_ENV_FAT_INTERFACE="mmc"
 CONFIG_ENV_FAT_DEVICE_AND_PART="1:1"
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_K3=y
+CONFIG_MTD_PARTITIONS=y
+CONFIG_CONS_INDEX=4
 CONFIG_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/imx6q_logic_defconfig b/configs/imx6q_logic_defconfig
index 64757ad30e..511010192b 100644
--- a/configs/imx6q_logic_defconfig
+++ b/configs/imx6q_logic_defconfig
@@ -31,6 +31,8 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_NAND=y
 # CONFIG_BLK is not set
 CONFIG_SYS_I2C_MXC=y
+CONFIG_FSL_ESDHC=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NAND=y
 CONFIG_NAND_MXS=y
 CONFIG_PHYLIB=y
diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig
index 012c49bc15..b5d4dbd9f0 100644
--- a/configs/k2g_evm_defconfig
+++ b/configs/k2g_evm_defconfig
@@ -36,6 +36,7 @@ CONFIG_DM_MMC=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_NAND=y
 CONFIG_NAND_DAVINCI=y
+CONFIG_MTD_DEVICE=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
diff --git a/configs/k2g_hs_evm_defconfig b/configs/k2g_hs_evm_defconfig
index 7948f080f2..dc5c941369 100644
--- a/configs/k2g_hs_evm_defconfig
+++ b/configs/k2g_hs_evm_defconfig
@@ -24,6 +24,7 @@ CONFIG_DM_MMC=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_NAND=y
 CONFIG_NAND_DAVINCI=y
+CONFIG_MTD_DEVICE=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
diff --git a/configs/kmeter1_defconfig b/configs/kmeter1_defconfig
index 358e0cd5a5..f025cd24f9 100644
--- a/configs/kmeter1_defconfig
+++ b/configs/kmeter1_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_UBI=y
 # CONFIG_CMD_UBIFS is not set
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_DEVICE=y
 # CONFIG_PCI is not set
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/kmopti2_defconfig b/configs/kmopti2_defconfig
index c16bef6cf1..fb0f097045 100644
--- a/configs/kmopti2_defconfig
+++ b/configs/kmopti2_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_UBI=y
 # CONFIG_CMD_UBIFS is not set
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_DEVICE=y
 # CONFIG_PCI is not set
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/kmsupx5_defconfig b/configs/kmsupx5_defconfig
index e95aafcf0c..4fa6e547b5 100644
--- a/configs/kmsupx5_defconfig
+++ b/configs/kmsupx5_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_UBI=y
 # CONFIG_CMD_UBIFS is not set
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_DEVICE=y
 # CONFIG_PCI is not set
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/kmtepr2_defconfig b/configs/kmtepr2_defconfig
index 06d207ca12..5588211413 100644
--- a/configs/kmtepr2_defconfig
+++ b/configs/kmtepr2_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_UBI=y
 # CONFIG_CMD_UBIFS is not set
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_DEVICE=y
 # CONFIG_PCI is not set
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/kmvect1_defconfig b/configs/kmvect1_defconfig
index 9b63a940e6..279b248561 100644
--- a/configs/kmvect1_defconfig
+++ b/configs/kmvect1_defconfig
@@ -22,6 +22,7 @@ CONFIG_CMD_UBI=y
 # CONFIG_CMD_UBIFS is not set
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_DEVICE=y
 # CONFIG_PCI is not set
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/koelsch_defconfig b/configs/koelsch_defconfig
index 119533f49e..740a5fe5da 100644
--- a/configs/koelsch_defconfig
+++ b/configs/koelsch_defconfig
@@ -22,6 +22,17 @@ CONFIG_CMD_EXT4=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_CLK=y
+CONFIG_CLK_RENESAS=y
+CONFIG_DM_GPIO=y
+CONFIG_RCAR_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_RCAR_IIC=y
+CONFIG_DM_MMC=y
+CONFIG_RENESAS_SDHI=y
+CONFIG_MTD=y
+CONFIG_MTD_DEVICE=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_SPANSION=y
diff --git a/configs/lager_defconfig b/configs/lager_defconfig
index 37b9abfe92..cf4f6b70ec 100644
--- a/configs/lager_defconfig
+++ b/configs/lager_defconfig
@@ -22,6 +22,19 @@ CONFIG_CMD_EXT4=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_CLK=y
+CONFIG_CLK_RENESAS=y
+CONFIG_DM_GPIO=y
+CONFIG_RCAR_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_RCAR_I2C=y
+CONFIG_SYS_I2C_RCAR_IIC=y
+CONFIG_DM_MMC=y
+CONFIG_SH_MMCIF=y
+CONFIG_RENESAS_SDHI=y
+CONFIG_MTD=y
+CONFIG_MTD_DEVICE=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_SPANSION=y
diff --git a/configs/mccmon6_nor_defconfig b/configs/mccmon6_nor_defconfig
index dd5511f910..9605540c59 100644
--- a/configs/mccmon6_nor_defconfig
+++ b/configs/mccmon6_nor_defconfig
@@ -32,6 +32,8 @@ CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_DM=y
 CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_DEVICE=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
diff --git a/configs/mccmon6_sd_defconfig b/configs/mccmon6_sd_defconfig
index 61169c39d5..a09db78c51 100644
--- a/configs/mccmon6_sd_defconfig
+++ b/configs/mccmon6_sd_defconfig
@@ -33,6 +33,8 @@ CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_DM=y
 CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_DEVICE=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
diff --git a/configs/microblaze-generic_defconfig b/configs/microblaze-generic_defconfig
index 953801e6d0..c9de5daa3f 100644
--- a/configs/microblaze-generic_defconfig
+++ b/configs/microblaze-generic_defconfig
@@ -41,6 +41,13 @@ CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_NETCONSOLE=y
 CONFIG_SPL_DM=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_DEVICE=y
+CONFIG_MTD_PARTITIONS=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
+CONFIG_PHY_MARVELL=y
 CONFIG_PHY_MICREL=y
 CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_DM_ETH=y
diff --git a/configs/mx35pdk_defconfig b/configs/mx35pdk_defconfig
index 2ba24d2819..90d4cf79ab 100644
--- a/configs/mx35pdk_defconfig
+++ b/configs/mx35pdk_defconfig
@@ -22,6 +22,7 @@ CONFIG_EFI_PARTITION=y
 # CONFIG_PARTITION_UUIDS is not set
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NAND=y
 CONFIG_NAND_MXC=y
 CONFIG_USB=y
diff --git a/configs/pfla02_defconfig b/configs/pfla02_defconfig
index 14e385ef34..31a980eb86 100644
--- a/configs/pfla02_defconfig
+++ b/configs/pfla02_defconfig
@@ -45,6 +45,7 @@ CONFIG_EFI_PARTITION=y
 # CONFIG_SPL_PARTITION_UUIDS is not set
 CONFIG_DM=y
 CONFIG_MTD=y
+CONFIG_MTD_DEVICE=y
 CONFIG_NAND=y
 CONFIG_NAND_MXS=y
 CONFIG_SPI_FLASH=y
diff --git a/configs/porter_defconfig b/configs/porter_defconfig
index 882ff2a9c1..7bc2e5d380 100644
--- a/configs/porter_defconfig
+++ b/configs/porter_defconfig
@@ -22,6 +22,17 @@ CONFIG_CMD_EXT4=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_CLK=y
+CONFIG_CLK_RENESAS=y
+CONFIG_DM_GPIO=y
+CONFIG_RCAR_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_RCAR_IIC=y
+CONFIG_DM_MMC=y
+CONFIG_RENESAS_SDHI=y
+CONFIG_MTD=y
+CONFIG_MTD_DEVICE=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_SPANSION=y
diff --git a/configs/r8a77995_draak_defconfig b/configs/r8a77995_draak_defconfig
new file mode 100644
index 0000000000..2897a3e141
--- /dev/null
+++ b/configs/r8a77995_draak_defconfig
@@ -0,0 +1,69 @@
+CONFIG_ARM=y
+CONFIG_ARCH_RMOBILE=y
+CONFIG_SYS_TEXT_BASE=0x50000000
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_RCAR_GEN3=y
+CONFIG_R8A77995=y
+CONFIG_TARGET_DRAAK=y
+CONFIG_DEFAULT_DEVICE_TREE="r8a77995-draak-u-boot"
+CONFIG_SMBIOS_PRODUCT_NAME=""
+CONFIG_FIT=y
+# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC0,115200 rw root=/dev/nfs nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
+CONFIG_SUPPORT_RAW_INITRD=y
+CONFIG_DEFAULT_FDT_FILE="r8a77995-draak.dtb"
+CONFIG_VERSION_VARIABLE=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_OF_CONTROL=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_CLK_RENESAS=y
+CONFIG_DM_GPIO=y
+CONFIG_RCAR_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_RCAR_IIC=y
+CONFIG_DM_MMC=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS200_SUPPORT=y
+CONFIG_RENESAS_SDHI=y
+CONFIG_MTD=y
+CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_DEVICE=y
+CONFIG_CFI_FLASH=y
+CONFIG_RENESAS_RPC_HF=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_DM_ETH=y
+CONFIG_RENESAS_RAVB=y
+CONFIG_PINCTRL=y
+CONFIG_PINCONF=y
+CONFIG_PINCTRL_PFC=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_SCIF_CONSOLE=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_STORAGE=y
+CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_SMBIOS_MANUFACTURER=""
diff --git a/configs/s5pc210_universal_defconfig b/configs/s5pc210_universal_defconfig
index 16352ad7a0..2dcf2cfe0c 100644
--- a/configs/s5pc210_universal_defconfig
+++ b/configs/s5pc210_universal_defconfig
@@ -41,6 +41,8 @@ CONFIG_MMC_DW=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_SDMA=y
 CONFIG_MMC_SDHCI_S5P=y
+CONFIG_MTD_DEVICE=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_DM_PMIC=y
 CONFIG_DM_PMIC_MAX8998=y
 CONFIG_USB=y
diff --git a/configs/silk_defconfig b/configs/silk_defconfig
index d72e48f799..f16b29957c 100644
--- a/configs/silk_defconfig
+++ b/configs/silk_defconfig
@@ -22,6 +22,19 @@ CONFIG_CMD_EXT4=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_CLK=y
+CONFIG_CLK_RENESAS=y
+CONFIG_DM_GPIO=y
+CONFIG_RCAR_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_RCAR_I2C=y
+CONFIG_SYS_I2C_RCAR_IIC=y
+CONFIG_DM_MMC=y
+CONFIG_SH_MMCIF=y
+CONFIG_RENESAS_SDHI=y
+CONFIG_MTD=y
+CONFIG_MTD_DEVICE=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_SPANSION=y
diff --git a/configs/smartweb_defconfig b/configs/smartweb_defconfig
index 060a1666ec..c1d4fe302d 100644
--- a/configs/smartweb_defconfig
+++ b/configs/smartweb_defconfig
@@ -44,6 +44,7 @@ CONFIG_DFU_NAND=y
 # CONFIG_MMC is not set
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_PHYLIB=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
diff --git a/configs/smdkc100_defconfig b/configs/smdkc100_defconfig
index 45b854a6ca..49afbf1f76 100644
--- a/configs/smdkc100_defconfig
+++ b/configs/smdkc100_defconfig
@@ -17,3 +17,8 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_ONENAND=y
 # CONFIG_MMC is not set
+CONFIG_MTD_DEVICE=y
+CONFIG_MTD_PARTITIONS=y
+CONFIG_NETDEVICES=y
+CONFIG_SMC911X=y
+CONFIG_SMC911X_BASE=0x98800300
diff --git a/configs/socfpga_arria10_defconfig b/configs/socfpga_arria10_defconfig
index 4c73d73cdc..89c67c40f9 100644
--- a/configs/socfpga_arria10_defconfig
+++ b/configs/socfpga_arria10_defconfig
@@ -30,5 +30,7 @@ CONFIG_FPGA_SOCFPGA=y
 CONFIG_DM_GPIO=y
 CONFIG_DWAPB_GPIO=y
 CONFIG_DM_MMC=y
-CONFIG_SYS_NS16550=y
+CONFIG_MTD_DEVICE=y
+CONFIG_MTD_PARTITIONS=y
+CONFIG_SPI=y
 CONFIG_USE_TINY_PRINTF=y
diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig
index cf4fa20f2c..4fea6e58de 100644
--- a/configs/socfpga_arria5_defconfig
+++ b/configs/socfpga_arria5_defconfig
@@ -47,6 +47,7 @@ CONFIG_DWAPB_GPIO=y
 CONFIG_SYS_I2C_DW=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_DW=y
+CONFIG_MTD_DEVICE=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_SPANSION=y
diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig
index 1cc6e161d9..48d118a714 100644
--- a/configs/socfpga_cyclone5_defconfig
+++ b/configs/socfpga_cyclone5_defconfig
@@ -47,6 +47,7 @@ CONFIG_DWAPB_GPIO=y
 CONFIG_SYS_I2C_DW=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_DW=y
+CONFIG_MTD_DEVICE=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_SPANSION=y
diff --git a/configs/socfpga_dbm_soc1_defconfig b/configs/socfpga_dbm_soc1_defconfig
new file mode 100644
index 0000000000..e4468e9aa0
--- /dev/null
+++ b/configs/socfpga_dbm_soc1_defconfig
@@ -0,0 +1,69 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SOCFPGA=y
+CONFIG_SYS_TEXT_BASE=0x01000040
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_TARGET_SOCFPGA_DEVBOARDS_DBM_SOC1=y
+CONFIG_SPL=y
+CONFIG_SPL_STACK_R_ADDR=0x00800000
+CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_dbm_soc1"
+CONFIG_FIT=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200"
+CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
+CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
+CONFIG_VERSION_VARIABLE=y
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_SPI_LOAD=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_ASKENV=y
+CONFIG_CMD_GREPENV=y
+CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_PXE=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SPL_DM=y
+CONFIG_DFU_MMC=y
+CONFIG_FPGA_SOCFPGA=y
+CONFIG_DM_GPIO=y
+CONFIG_DWAPB_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_DW=y
+CONFIG_DM_MMC=y
+CONFIG_MMC_DW=y
+CONFIG_MTD_DEVICE=y
+CONFIG_MTD_PARTITIONS=y
+CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_DM_RESET=y
+CONFIG_SPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="devboards"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_USE_TINY_PRINTF=y
diff --git a/configs/socfpga_de0_nano_soc_defconfig b/configs/socfpga_de0_nano_soc_defconfig
index 0bb9121c26..d03c88414f 100644
--- a/configs/socfpga_de0_nano_soc_defconfig
+++ b/configs/socfpga_de0_nano_soc_defconfig
@@ -46,6 +46,7 @@ CONFIG_DWAPB_GPIO=y
 CONFIG_SYS_I2C_DW=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_DW=y
+CONFIG_MTD_DEVICE=y
 CONFIG_PHY_MICREL=y
 CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_DM_ETH=y
diff --git a/configs/socfpga_de10_nano_defconfig b/configs/socfpga_de10_nano_defconfig
index 16cff90369..21b806af3c 100644
--- a/configs/socfpga_de10_nano_defconfig
+++ b/configs/socfpga_de10_nano_defconfig
@@ -44,6 +44,8 @@ CONFIG_DWAPB_GPIO=y
 CONFIG_SYS_I2C_DW=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_DW=y
+CONFIG_MTD_DEVICE=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_PHY_MICREL=y
 CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_DM_ETH=y
diff --git a/configs/socfpga_de1_soc_defconfig b/configs/socfpga_de1_soc_defconfig
index a093145855..fc9e90ea19 100644
--- a/configs/socfpga_de1_soc_defconfig
+++ b/configs/socfpga_de1_soc_defconfig
@@ -45,6 +45,8 @@ CONFIG_DWAPB_GPIO=y
 CONFIG_SYS_I2C_DW=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_DW=y
+CONFIG_MTD_DEVICE=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_PHY_MICREL=y
 CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_DM_ETH=y
diff --git a/configs/socfpga_is1_defconfig b/configs/socfpga_is1_defconfig
index 3de4274634..33ad943309 100644
--- a/configs/socfpga_is1_defconfig
+++ b/configs/socfpga_is1_defconfig
@@ -42,6 +42,7 @@ CONFIG_DM_GPIO=y
 CONFIG_DWAPB_GPIO=y
 CONFIG_SYS_I2C_DW=y
 # CONFIG_MMC is not set
+CONFIG_MTD_DEVICE=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig
index b22bf6f608..2a07237df5 100644
--- a/configs/socfpga_sockit_defconfig
+++ b/configs/socfpga_sockit_defconfig
@@ -47,6 +47,7 @@ CONFIG_DWAPB_GPIO=y
 CONFIG_SYS_I2C_DW=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_DW=y
+CONFIG_MTD_DEVICE=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_SPANSION=y
diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig
index 335c9e8384..df1e340958 100644
--- a/configs/socfpga_socrates_defconfig
+++ b/configs/socfpga_socrates_defconfig
@@ -48,6 +48,7 @@ CONFIG_DWAPB_GPIO=y
 CONFIG_SYS_I2C_DW=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_DW=y
+CONFIG_MTD_DEVICE=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_SPANSION=y
diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig
index eb9fc49b3a..07f529b3cf 100644
--- a/configs/socfpga_sr1500_defconfig
+++ b/configs/socfpga_sr1500_defconfig
@@ -47,6 +47,7 @@ CONFIG_DWAPB_GPIO=y
 CONFIG_SYS_I2C_DW=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_DW=y
+CONFIG_MTD_DEVICE=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/socfpga_vining_fpga_defconfig b/configs/socfpga_vining_fpga_defconfig
index 3bcedb6d1a..a84b481089 100644
--- a/configs/socfpga_vining_fpga_defconfig
+++ b/configs/socfpga_vining_fpga_defconfig
@@ -64,6 +64,7 @@ CONFIG_LED_STATUS_BIT3=65
 CONFIG_LED_STATUS_CMD=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_DW=y
+CONFIG_MTD_DEVICE=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/spear300_defconfig b/configs/spear300_defconfig
index a929b86cd1..fc5294b3b5 100644
--- a/configs/spear300_defconfig
+++ b/configs/spear300_defconfig
@@ -17,6 +17,8 @@ CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_SYS_I2C_DW=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_DEVICE=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear300_nand_defconfig b/configs/spear300_nand_defconfig
index 4694ca9f5f..af00e3b1be 100644
--- a/configs/spear300_nand_defconfig
+++ b/configs/spear300_nand_defconfig
@@ -17,6 +17,8 @@ CONFIG_ENV_IS_IN_NAND=y
 CONFIG_SYS_I2C_DW=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_DEVICE=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NAND=y
 CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
diff --git a/configs/spear300_usbtty_defconfig b/configs/spear300_usbtty_defconfig
index 8563ce2b48..7db8c5967b 100644
--- a/configs/spear300_usbtty_defconfig
+++ b/configs/spear300_usbtty_defconfig
@@ -17,6 +17,8 @@ CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_SYS_I2C_DW=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_DEVICE=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear300_usbtty_nand_defconfig b/configs/spear300_usbtty_nand_defconfig
index bc58c24318..9eb09b7403 100644
--- a/configs/spear300_usbtty_nand_defconfig
+++ b/configs/spear300_usbtty_nand_defconfig
@@ -17,6 +17,8 @@ CONFIG_ENV_IS_IN_NAND=y
 CONFIG_SYS_I2C_DW=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_DEVICE=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NAND=y
 CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
diff --git a/configs/spear310_defconfig b/configs/spear310_defconfig
index 1b6062ebab..1dfadd083b 100644
--- a/configs/spear310_defconfig
+++ b/configs/spear310_defconfig
@@ -17,6 +17,8 @@ CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_SYS_I2C_DW=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_DEVICE=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear310_nand_defconfig b/configs/spear310_nand_defconfig
index 28d40d5f27..de3a222fc6 100644
--- a/configs/spear310_nand_defconfig
+++ b/configs/spear310_nand_defconfig
@@ -17,6 +17,8 @@ CONFIG_ENV_IS_IN_NAND=y
 CONFIG_SYS_I2C_DW=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_DEVICE=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NAND=y
 CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
diff --git a/configs/spear310_pnor_defconfig b/configs/spear310_pnor_defconfig
index 0a17d42c0a..0b0e8dc4ea 100644
--- a/configs/spear310_pnor_defconfig
+++ b/configs/spear310_pnor_defconfig
@@ -17,6 +17,8 @@ CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_SYS_I2C_DW=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_DEVICE=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear310_usbtty_defconfig b/configs/spear310_usbtty_defconfig
index 0285ae910c..261ef034dd 100644
--- a/configs/spear310_usbtty_defconfig
+++ b/configs/spear310_usbtty_defconfig
@@ -17,6 +17,8 @@ CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_SYS_I2C_DW=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_DEVICE=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear310_usbtty_nand_defconfig b/configs/spear310_usbtty_nand_defconfig
index 8bea8253d6..df9b3c47c7 100644
--- a/configs/spear310_usbtty_nand_defconfig
+++ b/configs/spear310_usbtty_nand_defconfig
@@ -17,6 +17,8 @@ CONFIG_ENV_IS_IN_NAND=y
 CONFIG_SYS_I2C_DW=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_DEVICE=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NAND=y
 CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
diff --git a/configs/spear310_usbtty_pnor_defconfig b/configs/spear310_usbtty_pnor_defconfig
index 0dc3951e27..190d110f26 100644
--- a/configs/spear310_usbtty_pnor_defconfig
+++ b/configs/spear310_usbtty_pnor_defconfig
@@ -17,6 +17,8 @@ CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_SYS_I2C_DW=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_DEVICE=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear320_defconfig b/configs/spear320_defconfig
index 87b009e23d..b811edb977 100644
--- a/configs/spear320_defconfig
+++ b/configs/spear320_defconfig
@@ -17,6 +17,8 @@ CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_SYS_I2C_DW=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_DEVICE=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear320_nand_defconfig b/configs/spear320_nand_defconfig
index 2384e525ac..92040b98c4 100644
--- a/configs/spear320_nand_defconfig
+++ b/configs/spear320_nand_defconfig
@@ -17,6 +17,8 @@ CONFIG_ENV_IS_IN_NAND=y
 CONFIG_SYS_I2C_DW=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_DEVICE=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NAND=y
 CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
diff --git a/configs/spear320_pnor_defconfig b/configs/spear320_pnor_defconfig
index 94ac19dce4..2f9b58d1a1 100644
--- a/configs/spear320_pnor_defconfig
+++ b/configs/spear320_pnor_defconfig
@@ -17,6 +17,8 @@ CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_SYS_I2C_DW=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_DEVICE=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear320_usbtty_defconfig b/configs/spear320_usbtty_defconfig
index b391ca6982..529be45f28 100644
--- a/configs/spear320_usbtty_defconfig
+++ b/configs/spear320_usbtty_defconfig
@@ -17,6 +17,8 @@ CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_SYS_I2C_DW=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_DEVICE=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear320_usbtty_nand_defconfig b/configs/spear320_usbtty_nand_defconfig
index f75776bfa6..d90a0f35f5 100644
--- a/configs/spear320_usbtty_nand_defconfig
+++ b/configs/spear320_usbtty_nand_defconfig
@@ -17,6 +17,8 @@ CONFIG_ENV_IS_IN_NAND=y
 CONFIG_SYS_I2C_DW=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_DEVICE=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NAND=y
 CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
diff --git a/configs/spear320_usbtty_pnor_defconfig b/configs/spear320_usbtty_pnor_defconfig
index 9499cb2059..80fd3af7df 100644
--- a/configs/spear320_usbtty_pnor_defconfig
+++ b/configs/spear320_usbtty_pnor_defconfig
@@ -17,6 +17,8 @@ CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_SYS_I2C_DW=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_DEVICE=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear600_defconfig b/configs/spear600_defconfig
index 64617c19e9..f6d7c6adf5 100644
--- a/configs/spear600_defconfig
+++ b/configs/spear600_defconfig
@@ -20,6 +20,8 @@ CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_SYS_I2C_DW=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_DEVICE=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear600_nand_defconfig b/configs/spear600_nand_defconfig
index 042eef5a72..abc3475dde 100644
--- a/configs/spear600_nand_defconfig
+++ b/configs/spear600_nand_defconfig
@@ -17,6 +17,8 @@ CONFIG_ENV_IS_IN_NAND=y
 CONFIG_SYS_I2C_DW=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_DEVICE=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NAND=y
 CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
diff --git a/configs/spear600_usbtty_defconfig b/configs/spear600_usbtty_defconfig
index e1689f9f9c..890d6ae227 100644
--- a/configs/spear600_usbtty_defconfig
+++ b/configs/spear600_usbtty_defconfig
@@ -17,6 +17,8 @@ CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_SYS_I2C_DW=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_DEVICE=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear600_usbtty_nand_defconfig b/configs/spear600_usbtty_nand_defconfig
index 8e3733fa5d..df0f7adbd8 100644
--- a/configs/spear600_usbtty_nand_defconfig
+++ b/configs/spear600_usbtty_nand_defconfig
@@ -17,6 +17,8 @@ CONFIG_ENV_IS_IN_NAND=y
 CONFIG_SYS_I2C_DW=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_DEVICE=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NAND=y
 CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
diff --git a/configs/stmark2_defconfig b/configs/stmark2_defconfig
index 2630865db9..8bfbb978ae 100644
--- a/configs/stmark2_defconfig
+++ b/configs/stmark2_defconfig
@@ -19,6 +19,12 @@ CONFIG_CMD_SPI=y
 # CONFIG_CMD_NET is not set
 # CONFIG_CMD_NFS is not set
 CONFIG_CMD_CACHE=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_MTDIDS_DEFAULT="nor0=spi-flash.0"
+CONFIG_MTDPARTS_DEFAULT="mtdparts=spi-flash.0:1m(u-boot),7m(kernel),-(rootfs)"
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+# CONFIG_NET is not set
+CONFIG_MTD_DEVICE=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_MTD=y
 CONFIG_REGEX=y
diff --git a/configs/stout_defconfig b/configs/stout_defconfig
index 9c18914626..5bc52b8ee4 100644
--- a/configs/stout_defconfig
+++ b/configs/stout_defconfig
@@ -22,6 +22,17 @@ CONFIG_CMD_EXT4=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_CLK=y
+CONFIG_CLK_RENESAS=y
+CONFIG_DM_GPIO=y
+CONFIG_RCAR_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_RCAR_IIC=y
+CONFIG_DM_MMC=y
+CONFIG_RENESAS_SDHI=y
+CONFIG_MTD=y
+CONFIG_MTD_DEVICE=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_SPANSION=y
diff --git a/configs/suvd3_defconfig b/configs/suvd3_defconfig
index 4184998370..a9e776bf5e 100644
--- a/configs/suvd3_defconfig
+++ b/configs/suvd3_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_UBI=y
 # CONFIG_CMD_UBIFS is not set
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_DEVICE=y
 # CONFIG_PCI is not set
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/taurus_defconfig b/configs/taurus_defconfig
index 74df16026f..1a90f0514e 100644
--- a/configs/taurus_defconfig
+++ b/configs/taurus_defconfig
@@ -49,6 +49,7 @@ CONFIG_DFU_NAND=y
 # CONFIG_MMC is not set
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
diff --git a/configs/tuge1_defconfig b/configs/tuge1_defconfig
index e88c517f30..9746258bff 100644
--- a/configs/tuge1_defconfig
+++ b/configs/tuge1_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_UBI=y
 # CONFIG_CMD_UBIFS is not set
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_DEVICE=y
 # CONFIG_PCI is not set
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/tuxx1_defconfig b/configs/tuxx1_defconfig
index 90de4adca8..ed1105c893 100644
--- a/configs/tuxx1_defconfig
+++ b/configs/tuxx1_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_UBI=y
 # CONFIG_CMD_UBIFS is not set
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_DEVICE=y
 # CONFIG_PCI is not set
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/uniphier_ld4_sld8_defconfig b/configs/uniphier_ld4_sld8_defconfig
index d847a6827a..0566d8482a 100644
--- a/configs/uniphier_ld4_sld8_defconfig
+++ b/configs/uniphier_ld4_sld8_defconfig
@@ -37,6 +37,7 @@ CONFIG_MISC=y
 CONFIG_I2C_EEPROM=y
 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
 CONFIG_MMC_UNIPHIER=y
+CONFIG_MTD_DEVICE=y
 CONFIG_NAND=y
 CONFIG_NAND_DENALI=y
 CONFIG_NAND_DENALI_DT=y
diff --git a/configs/uniphier_v7_defconfig b/configs/uniphier_v7_defconfig
new file mode 100644
index 0000000000..8dae587e01
--- /dev/null
+++ b/configs/uniphier_v7_defconfig
@@ -0,0 +1,56 @@
+CONFIG_ARM=y
+CONFIG_ARCH_UNIPHIER=y
+CONFIG_SYS_TEXT_BASE=0x84000000
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL=y
+CONFIG_MICRO_SUPPORT_CARD=y
+CONFIG_DEFAULT_DEVICE_TREE="uniphier-pxs2-vodka"
+# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
+CONFIG_LOGLEVEL=6
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_NOR_SUPPORT=y
+CONFIG_HUSH_PARSER=y
+# CONFIG_AUTO_COMPLETE is not set
+CONFIG_CMD_CONFIG=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_IMLS=y
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_ENV_EXISTS is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIME=y
+# CONFIG_CMD_MISC is not set
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_GPIO_UNIPHIER=y
+CONFIG_MISC=y
+CONFIG_I2C_EEPROM=y
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
+CONFIG_MMC_UNIPHIER=y
+CONFIG_MTD_DEVICE=y
+CONFIG_NAND=y
+CONFIG_NAND_DENALI_DT=y
+CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8
+CONFIG_SPL_NAND_DENALI=y
+CONFIG_DM_ETH=y
+CONFIG_SNI_AVE=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_UNIPHIER=y
+CONFIG_USB_STORAGE=y
+CONFIG_PANIC_HANG=y
diff --git a/configs/uniphier_v8_defconfig b/configs/uniphier_v8_defconfig
index ca8a50017b..8f7655fccd 100644
--- a/configs/uniphier_v8_defconfig
+++ b/configs/uniphier_v8_defconfig
@@ -32,6 +32,7 @@ CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
 CONFIG_MMC_UNIPHIER=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_CADENCE=y
+CONFIG_MTD_DEVICE=y
 CONFIG_NAND=y
 CONFIG_NAND_DENALI=y
 CONFIG_NAND_DENALI_DT=y
diff --git a/configs/vct_platinum_onenand_defconfig b/configs/vct_platinum_onenand_defconfig
index 4a92b03621..1f07ee6172 100644
--- a/configs/vct_platinum_onenand_defconfig
+++ b/configs/vct_platinum_onenand_defconfig
@@ -20,6 +20,11 @@ CONFIG_CMD_JFFS2=y
 CONFIG_CMD_UBI=y
 # CONFIG_CMD_UBIFS is not set
 CONFIG_ENV_IS_IN_ONENAND=y
+CONFIG_MTD_DEVICE=y
+CONFIG_NETDEVICES=y
+CONFIG_SMC911X=y
+CONFIG_SMC911X_BASE=0x00000000
+CONFIG_SMC911X_32_BIT=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/vct_platinum_onenand_small_defconfig b/configs/vct_platinum_onenand_small_defconfig
index 7125d070b1..5035f3f2f7 100644
--- a/configs/vct_platinum_onenand_small_defconfig
+++ b/configs/vct_platinum_onenand_small_defconfig
@@ -26,4 +26,6 @@ CONFIG_CMD_UBI=y
 # CONFIG_CMD_UBIFS is not set
 # CONFIG_ISO_PARTITION is not set
 CONFIG_ENV_IS_IN_ONENAND=y
+# CONFIG_NET is not set
+CONFIG_MTD_DEVICE=y
 CONFIG_SYS_NS16550=y
diff --git a/configs/vct_platinumavc_onenand_defconfig b/configs/vct_platinumavc_onenand_defconfig
index 7f194e8f2e..f992990ead 100644
--- a/configs/vct_platinumavc_onenand_defconfig
+++ b/configs/vct_platinumavc_onenand_defconfig
@@ -19,4 +19,5 @@ CONFIG_CMD_UBI=y
 # CONFIG_CMD_UBIFS is not set
 # CONFIG_ISO_PARTITION is not set
 CONFIG_ENV_IS_IN_ONENAND=y
+CONFIG_MTD_DEVICE=y
 CONFIG_SYS_NS16550=y
diff --git a/configs/vct_platinumavc_onenand_small_defconfig b/configs/vct_platinumavc_onenand_small_defconfig
index f5d2759545..144f141939 100644
--- a/configs/vct_platinumavc_onenand_small_defconfig
+++ b/configs/vct_platinumavc_onenand_small_defconfig
@@ -26,4 +26,6 @@ CONFIG_CMD_UBI=y
 # CONFIG_CMD_UBIFS is not set
 # CONFIG_ISO_PARTITION is not set
 CONFIG_ENV_IS_IN_ONENAND=y
+# CONFIG_NET is not set
+CONFIG_MTD_DEVICE=y
 CONFIG_SYS_NS16550=y
diff --git a/configs/vct_premium_onenand_defconfig b/configs/vct_premium_onenand_defconfig
index 4d909741ba..a53b65fa10 100644
--- a/configs/vct_premium_onenand_defconfig
+++ b/configs/vct_premium_onenand_defconfig
@@ -20,7 +20,11 @@ CONFIG_CMD_JFFS2=y
 CONFIG_CMD_UBI=y
 # CONFIG_CMD_UBIFS is not set
 CONFIG_ENV_IS_IN_ONENAND=y
-CONFIG_SYS_NS16550=y
+CONFIG_MTD_DEVICE=y
+CONFIG_NETDEVICES=y
+CONFIG_SMC911X=y
+CONFIG_SMC911X_BASE=0x00000000
+CONFIG_SMC911X_32_BIT=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/vct_premium_onenand_small_defconfig b/configs/vct_premium_onenand_small_defconfig
index 27e74742c8..d0d9e99394 100644
--- a/configs/vct_premium_onenand_small_defconfig
+++ b/configs/vct_premium_onenand_small_defconfig
@@ -26,4 +26,6 @@ CONFIG_CMD_UBI=y
 # CONFIG_CMD_UBIFS is not set
 # CONFIG_ISO_PARTITION is not set
 CONFIG_ENV_IS_IN_ONENAND=y
+# CONFIG_NET is not set
+CONFIG_MTD_DEVICE=y
 CONFIG_SYS_NS16550=y
diff --git a/configs/wb45n_defconfig b/configs/wb45n_defconfig
index f52d46ebe9..eb6a921301 100644
--- a/configs/wb45n_defconfig
+++ b/configs/wb45n_defconfig
@@ -25,5 +25,7 @@ CONFIG_CMD_PING=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_MTD_DEVICE=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_LZMA=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/woodburn_defconfig b/configs/woodburn_defconfig
index 27bf798e15..9cef8087c9 100644
--- a/configs/woodburn_defconfig
+++ b/configs/woodburn_defconfig
@@ -22,6 +22,7 @@ CONFIG_EFI_PARTITION=y
 # CONFIG_PARTITION_UUIDS is not set
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NAND=y
 CONFIG_NAND_MXC=y
 CONFIG_PHYLIB=y
diff --git a/configs/woodburn_sd_defconfig b/configs/woodburn_sd_defconfig
index 6d423ebe6e..060c6185d0 100644
--- a/configs/woodburn_sd_defconfig
+++ b/configs/woodburn_sd_defconfig
@@ -33,6 +33,7 @@ CONFIG_EFI_PARTITION=y
 # CONFIG_SPL_PARTITION_UUIDS is not set
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_NAND=y
 CONFIG_NAND_MXC=y
 CONFIG_PHYLIB=y
diff --git a/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig b/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig
index 0a3ac9dbea..166d253a05 100644
--- a/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig
+++ b/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig
@@ -52,6 +52,7 @@ CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_CADENCE=y
 # CONFIG_MMC is not set
 CONFIG_DM_MMC=y
+CONFIG_MTD_DEVICE=y
 CONFIG_NAND=y
 CONFIG_NAND_ARASAN=y
 CONFIG_SPI_FLASH=y
diff --git a/configs/xilinx_zynqmp_zc1751_xm017_dc3_defconfig b/configs/xilinx_zynqmp_zc1751_xm017_dc3_defconfig
new file mode 100644
index 0000000000..aaa025bd9e
--- /dev/null
+++ b/configs/xilinx_zynqmp_zc1751_xm017_dc3_defconfig
@@ -0,0 +1,86 @@
+CONFIG_ARM=y
+CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zc1751_xm017_dc3"
+CONFIG_ARCH_ZYNQMP=y
+CONFIG_SYS_TEXT_BASE=0x8000000
+CONFIG_SYS_MALLOC_F_LEN=0x8000
+CONFIG_SPL=y
+CONFIG_DEBUG_UART_BASE=0xff010000
+CONFIG_DEBUG_UART_CLOCK=100000000
+CONFIG_ZYNQMP_USB=y
+CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm017-dc3"
+CONFIG_DEBUG_UART=y
+CONFIG_AHCI=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SPL_OS_BOOT=y
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
+CONFIG_SPL_ATF=y
+CONFIG_SYS_PROMPT="ZynqMP> "
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_CLK=y
+CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_FPGA_LOADBP=y
+CONFIG_CMD_FPGA_LOADP=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_TIME=y
+CONFIG_MP=y
+CONFIG_CMD_TIMER=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_EMBED=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_DM=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_SCSI_AHCI=y
+CONFIG_SATA_CEVA=y
+CONFIG_CLK_ZYNQMP=y
+CONFIG_DFU_RAM=y
+CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQMPPL=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_CADENCE=y
+CONFIG_MISC=y
+CONFIG_DM_MMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ZYNQ=y
+CONFIG_MTD_DEVICE=y
+CONFIG_NAND=y
+CONFIG_NAND_ARASAN=y
+CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_TI=y
+CONFIG_PHY_VITESSE=y
+CONFIG_PHY_FIXED=y
+CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
+CONFIG_ZYNQ_GEM=y
+CONFIG_SCSI=y
+CONFIG_DM_SCSI=y
+CONFIG_DEBUG_UART_ZYNQ=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_ZYNQ_SERIAL=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_XHCI_ZYNQMP=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_USB_ULPI_VIEWPORT=y
+CONFIG_USB_ULPI=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
diff --git a/configs/zynq_cse_nand_defconfig b/configs/zynq_cse_nand_defconfig
new file mode 100644
index 0000000000..5ac68a8bd1
--- /dev/null
+++ b/configs/zynq_cse_nand_defconfig
@@ -0,0 +1,49 @@
+CONFIG_ARM=y
+CONFIG_SYS_CONFIG_NAME="zynq_cse"
+CONFIG_ARCH_ZYNQ=y
+CONFIG_SYS_TEXT_BASE=0x100000
+CONFIG_ENV_SIZE=0x190
+CONFIG_SPL=y
+CONFIG_SPL_STACK_R_ADDR=0x200000
+CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-nand"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SYS_PROMPT="Zynq> "
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_CONSOLE is not set
+# CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_BOOTM is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_FDT is not set
+# CONFIG_CMD_GO is not set
+# CONFIG_CMD_RUN is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_SPL is not set
+# CONFIG_CMD_EXPORTENV is not set
+# CONFIG_CMD_IMPORTENV is not set
+# CONFIG_CMD_EDITENV is not set
+# CONFIG_CMD_SAVEENV is not set
+# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_CRC32 is not set
+# CONFIG_CMD_CLK is not set
+# CONFIG_CMD_DM is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+# CONFIG_CMD_ECHO is not set
+# CONFIG_CMD_ITEST is not set
+# CONFIG_CMD_SOURCE is not set
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_NET is not set
+# CONFIG_CMD_MISC is not set
+# CONFIG_PARTITIONS is not set
+CONFIG_OF_EMBED=y
+# CONFIG_DM_WARN is not set
+# CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_SPL_DM_SEQ_ALIAS=y
+# CONFIG_MMC is not set
+CONFIG_MTD_DEVICE=y
+CONFIG_NAND=y
+CONFIG_NAND_ZYNQ=y
+# CONFIG_EFI_LOADER is not set
diff --git a/configs/zynq_zc770_xm011_defconfig b/configs/zynq_zc770_xm011_defconfig
index 428670cbca..67c9fd3ced 100644
--- a/configs/zynq_zc770_xm011_defconfig
+++ b/configs/zynq_zc770_xm011_defconfig
@@ -29,6 +29,7 @@ CONFIG_CMD_CACHE=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
 # CONFIG_MMC is not set
+CONFIG_MTD_DEVICE=y
 CONFIG_NAND=y
 CONFIG_NAND_ZYNQ=y
 CONFIG_ZYNQ_GEM=y
diff --git a/configs/zynq_zc770_xm011_x16_defconfig b/configs/zynq_zc770_xm011_x16_defconfig
new file mode 100644
index 0000000000..f4ed082636
--- /dev/null
+++ b/configs/zynq_zc770_xm011_x16_defconfig
@@ -0,0 +1,44 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ZYNQ=y
+CONFIG_SYS_TEXT_BASE=0x4000000
+CONFIG_SPL=y
+CONFIG_DEBUG_UART_BASE=0xe0001000
+CONFIG_DEBUG_UART_CLOCK=50000000
+CONFIG_IDENT_STRING=" Xilinx Zynq ZC770 XM011 x16"
+CONFIG_SPL_STACK_R_ADDR=0x200000
+# CONFIG_SPL_FAT_SUPPORT is not set
+CONFIG_DEFAULT_DEVICE_TREE="zynq-zc770-xm011-x16"
+CONFIG_DEBUG_UART=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_FIT=y
+CONFIG_FIT_SIGNATURE=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_IMAGE_FORMAT_LEGACY=y
+CONFIG_BOOTCOMMAND="run $modeboot || run distro_bootcmd"
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_OS_BOOT=y
+CONFIG_SYS_PROMPT="Zynq> "
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_FPGA_LOADBP=y
+CONFIG_CMD_FPGA_LOADFS=y
+CONFIG_CMD_FPGA_LOADMK=y
+CONFIG_CMD_FPGA_LOADP=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_NAND_LOCK_UNLOCK=y
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_NET is not set
+CONFIG_CMD_CACHE=y
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_BLK=y
+CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQPL=y
+CONFIG_DM_GPIO=y
+# CONFIG_MMC is not set
+CONFIG_MTD_DEVICE=y
+CONFIG_NAND=y
+CONFIG_NAND_ZYNQ=y
+CONFIG_DEBUG_UART_ZYNQ=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_ZYNQ_SERIAL=y
diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig
index 3b04e24fa1..aa66a08ecc 100644
--- a/drivers/mtd/Kconfig
+++ b/drivers/mtd/Kconfig
@@ -19,6 +19,18 @@ config MTD_NOR_FLASH
 	help
 	  Enable support for parallel NOR flash.
 
+config MTD_DEVICE
+	bool "Enable MTD Device for NAND and ONENAND devices"
+	help
+	  Adds the MTD device infrastructure from the Linux kernel.
+	  Needed for mtdparts command support.
+
+config MTD_PARTITIONS
+	bool "Add MTD Partioning infrastructure"
+	help
+	  Adds the MTD partitioning infrastructure from the Linux
+	  kernel. Needed for UBI support.
+
 config CFI_FLASH
 	bool "Enable Driver Model for CFI Flash driver"
 	depends on MTD
diff --git a/include/configs/10m50_devboard.h b/include/configs/10m50_devboard.h
index ec30ed0674..889cfb324f 100644
--- a/include/configs/10m50_devboard.h
+++ b/include/configs/10m50_devboard.h
@@ -24,7 +24,6 @@
  */
 #define CONFIG_SYS_MAX_FLASH_BANKS	1
 #define CONFIG_SYS_MAX_FLASH_SECT	1024
-#define CONFIG_MTD_DEVICE
 
 /*
  * NET options
diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h
index 62a9a13962..6c045762f6 100644
--- a/include/configs/BSC9131RDB.h
+++ b/include/configs/BSC9131RDB.h
@@ -320,11 +320,6 @@ extern unsigned long get_sdram_size(void);
 /*
  * Dynamic MTD Partition support with mtdparts
  */
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
-#define MTDIDS_DEFAULT "nand0=ff800000.flash,"
-#define MTDPARTS_DEFAULT "mtdparts=ff800000.flash:1m(uboot)," \
-			"8m(kernel),512k(dtb),-(fs)"
 
 /*
  * Environment Configuration
diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h
index b90f54a015..f64a284b6a 100644
--- a/include/configs/BSC9132QDS.h
+++ b/include/configs/BSC9132QDS.h
@@ -531,8 +531,6 @@ combinations. this should be removed later
  * Dynamic MTD Partition support with mtdparts
  */
 #ifdef CONFIG_MTD_NOR_FLASH
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
 #define CONFIG_FLASH_CFI_MTD
 #define MTDIDS_DEFAULT "nor0=88000000.nor,nand0=ff800000.flash,"
 #define MTDPARTS_DEFAULT "mtdparts=88000000.nor:256k(dtb),7m(kernel)," \
diff --git a/include/configs/M54418TWR.h b/include/configs/M54418TWR.h
index b5d51d775f..e91331fb2a 100644
--- a/include/configs/M54418TWR.h
+++ b/include/configs/M54418TWR.h
@@ -291,23 +291,9 @@
  */
 #ifdef CONFIG_CMD_JFFS2
 #define CONFIG_JFFS2_DEV		"nand0"
-#define CONFIG_JFFS2_PART_OFFSET	(0x800000)
-#define CONFIG_MTD_DEVICE
-#define MTDIDS_DEFAULT		"nand0=m54418twr.nand"
-
-#define MTDPARTS_DEFAULT	"mtdparts=m54418twr.nand:1m(data),"	\
-						"7m(kernel),"		\
-						"-(rootfs)"
 
 #endif
 
-#ifdef CONFIG_CMD_UBI
-#define CONFIG_MTD_DEVICE	/* needed for mtdparts command */
-#define CONFIG_MTD_PARTITIONS	/* mtdparts and UBI support */
-#define MTDIDS_DEFAULT		"nand0=NAND"
-#define MTDPARTS_DEFAULT	"mtdparts=NAND:1m(u-boot),"	\
-					"-(ubi)"
-#endif
 /* Cache Configuration */
 #define CONFIG_SYS_CACHELINE_SIZE	16
 #define ICACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h
index 78e6811ece..fbc0b05b64 100644
--- a/include/configs/MPC8313ERDB.h
+++ b/include/configs/MPC8313ERDB.h
@@ -257,7 +257,6 @@
 #define CONFIG_SYS_NAND_BASE		0xE2800000
 #endif
 
-#define CONFIG_MTD_DEVICE
 #define CONFIG_MTD_PARTITION
 #define MTDIDS_DEFAULT			"nand0=e2800000.flash"
 #define MTDPARTS_DEFAULT		\
diff --git a/include/configs/MPC8315ERDB.h b/include/configs/MPC8315ERDB.h
index 2ff67d6cce..f5fd719160 100644
--- a/include/configs/MPC8315ERDB.h
+++ b/include/configs/MPC8315ERDB.h
@@ -233,7 +233,6 @@
 #define CONFIG_SYS_NAND_BASE		0xE0600000
 #endif
 
-#define CONFIG_MTD_DEVICE
 #define CONFIG_MTD_PARTITION
 #define MTDIDS_DEFAULT			"nand0=e0600000.flash"
 #define MTDPARTS_DEFAULT		\
diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index 45b302e768..6b82872250 100644
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -349,7 +349,6 @@ extern unsigned long get_sdram_size(void);
 #define CONFIG_SYS_NAND_BASE_PHYS	CONFIG_SYS_NAND_BASE
 #endif
 
-#define CONFIG_MTD_DEVICE
 #define CONFIG_MTD_PARTITION
 #define MTDIDS_DEFAULT			"nand0=ff800000.flash"
 #define MTDPARTS_DEFAULT		\
diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h
index aadbe02706..f2668f65eb 100644
--- a/include/configs/P1022DS.h
+++ b/include/configs/P1022DS.h
@@ -529,8 +529,6 @@
 /*
  * Dynamic MTD Partition support with mtdparts
  */
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
 #define CONFIG_FLASH_CFI_MTD
 #ifdef CONFIG_PHYS_64BIT
 #define MTDIDS_DEFAULT "nor0=fe8000000.nor"
diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h
index 87ce2e8524..4b7cfdbf88 100644
--- a/include/configs/T102xQDS.h
+++ b/include/configs/T102xQDS.h
@@ -748,8 +748,6 @@ unsigned long get_board_ddr_clk(void);
  * Dynamic MTD Partition support with mtdparts
  */
 #ifdef CONFIG_MTD_NOR_FLASH
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
 #define CONFIG_FLASH_CFI_MTD
 #define MTDIDS_DEFAULT    "nor0=fe8000000.nor,nand0=fff800000.flash," \
 			  "spi0=spife110000.0"
diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h
index 7296d34803..1524ff67f3 100644
--- a/include/configs/T102xRDB.h
+++ b/include/configs/T102xRDB.h
@@ -760,8 +760,6 @@ unsigned long get_board_ddr_clk(void);
  * Dynamic MTD Partition support with mtdparts
  */
 #ifdef CONFIG_MTD_NOR_FLASH
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
 #define CONFIG_FLASH_CFI_MTD
 #define MTDIDS_DEFAULT "nor0=fe8000000.nor,nand0=fff800000.flash," \
 			"spi0=spife110000.1"
diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h
index 3db7a2a462..65053f43e1 100644
--- a/include/configs/T1040QDS.h
+++ b/include/configs/T1040QDS.h
@@ -627,8 +627,6 @@ unsigned long get_board_ddr_clk(void);
  * Dynamic MTD Partition support with mtdparts
  */
 #ifdef CONFIG_MTD_NOR_FLASH
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
 #define CONFIG_FLASH_CFI_MTD
 #define MTDIDS_DEFAULT "nor0=fe8000000.nor,nand0=fff800000.flash," \
 			"spi0=spife110000.0"
diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index 0eeb5f68ee..b791e3364d 100644
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -784,8 +784,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg
  * Dynamic MTD Partition support with mtdparts
  */
 #ifdef CONFIG_MTD_NOR_FLASH
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
 #define CONFIG_FLASH_CFI_MTD
 #define MTDIDS_DEFAULT "nor0=fe8000000.nor,nand0=fff800000.flash," \
 			"spi0=spife110000.0"
diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index c9e2a6cdb5..d7cdfdb8ef 100644
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -715,8 +715,6 @@ unsigned long get_board_ddr_clk(void);
  * Dynamic MTD Partition support with mtdparts
  */
 #ifdef CONFIG_MTD_NOR_FLASH
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
 #define CONFIG_FLASH_CFI_MTD
 #define MTDIDS_DEFAULT "nor0=fe8000000.nor,nand0=fff800000.flash," \
 			"spi0=spife110000.0"
diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index 233e0ab8fa..5a17797ada 100644
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -663,8 +663,6 @@ unsigned long get_board_ddr_clk(void);
  * Dynamic MTD Partition support with mtdparts
  */
 #ifdef CONFIG_MTD_NOR_FLASH
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
 #define CONFIG_FLASH_CFI_MTD
 #define MTDIDS_DEFAULT "nor0=fe8000000.nor,nand0=fff800000.flash," \
 			"spi0=spife110000.1"
diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h
index 77d0bc304d..67a7c106e2 100644
--- a/include/configs/TQM834x.h
+++ b/include/configs/TQM834x.h
@@ -489,7 +489,6 @@
  * JFFS2 partitions
  */
 /* mtdparts command line support */
-#define CONFIG_MTD_DEVICE		/* needed for mtdparts commands */
 #define CONFIG_FLASH_CFI_MTD
 #define MTDIDS_DEFAULT		"nor0=TQM834x-0"
 
diff --git a/include/configs/am335x_igep003x.h b/include/configs/am335x_igep003x.h
index e7d0ec9471..7fed8bfca6 100644
--- a/include/configs/am335x_igep003x.h
+++ b/include/configs/am335x_igep003x.h
@@ -111,12 +111,6 @@
 /* NAND support */
 #define CONFIG_SYS_NAND_ONFI_DETECTION	1
 
-#define CONFIG_MTD_PARTITIONS
-#define CONFIG_MTD_DEVICE
-
-#define MTDIDS_DEFAULT			"nand0=omap2-nand.0"
-#define MTDPARTS_DEFAULT		"mtdparts=omap2-nand.0:512k(SPL),-(UBI)"
-
 /* SPL */
 
 /* UBI configuration */
diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h
index ef0157b7fd..c8c7f16c52 100644
--- a/include/configs/am3517_evm.h
+++ b/include/configs/am3517_evm.h
@@ -125,8 +125,6 @@
 #define CONFIG_SYS_NAND_MAX_ECCPOS	56
 #define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x80000
-#define CONFIG_MTD_PARTITIONS		/* required for UBI partition support */
-#define CONFIG_MTD_DEVICE		/* needed for mtdparts commands */
 /* NAND block size is 128 KiB.  Synchronize these values with
  * corresponding Device Tree entries in Linux:
  *  MLO(SPL)             4 * NAND_BLOCK_SIZE = 512 KiB  @ 0x000000
diff --git a/include/configs/apf27.h b/include/configs/apf27.h
index 99a96d9767..7a41b544c5 100644
--- a/include/configs/apf27.h
+++ b/include/configs/apf27.h
@@ -213,9 +213,6 @@
 /*
  * Partitions & Filsystems
  */
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
-#define CONFIG_SUPPORT_VFAT
 
 /*
  * Ethernet (on SOC imx FEC)
diff --git a/include/configs/apx4devkit.h b/include/configs/apx4devkit.h
index bb68125462..6d13a0cfc6 100644
--- a/include/configs/apx4devkit.h
+++ b/include/configs/apx4devkit.h
@@ -46,15 +46,6 @@
 #endif
 
 /* UBI and NAND partitioning */
-#ifdef CONFIG_CMD_NAND
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
-#define MTDIDS_DEFAULT			"nand0=gpmi-nand"
-#define MTDPARTS_DEFAULT \
-	"mtdparts=gpmi-nand:128k(bootstrap),1024k(boot),768k(env),-(root)"
-#else
-#define MTDPARTS_DEFAULT		""
-#endif
 
 /* FEC Ethernet on SoC */
 #ifdef CONFIG_CMD_NET
diff --git a/include/configs/aristainetos-common.h b/include/configs/aristainetos-common.h
index 3a72b24cd8..c050a6f385 100644
--- a/include/configs/aristainetos-common.h
+++ b/include/configs/aristainetos-common.h
@@ -195,8 +195,6 @@
 #define CONFIG_MXC_USB_FLAGS	0
 
 /* UBI support */
-#define CONFIG_MTD_PARTITIONS
-#define CONFIG_MTD_DEVICE
 
 #define CONFIG_HW_WATCHDOG
 #define CONFIG_IMX_WATCHDOG
diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h
index 2c71c5bd19..88753280b7 100644
--- a/include/configs/at91sam9n12ek.h
+++ b/include/configs/at91sam9n12ek.h
@@ -79,14 +79,6 @@
 #define CONFIG_PMECC_SECTOR_SIZE	512
 #define CONFIG_PMECC_INDEX_TABLE_OFFSET	0x8000
 
-#define CONFIG_MTD_PARTITIONS
-#define CONFIG_MTD_DEVICE
-#define MTDIDS_DEFAULT			"nand0=atmel_nand"
-#define MTDPARTS_DEFAULT						\
-	"mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,"		\
-	"256k(env),256k(env_redundant),256k(spare),"			\
-	"512k(dtb),6M(kernel)ro,-(rootfs)"
-
 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 	"console=console=ttyS0,115200\0"                                \
 	"mtdparts="MTDPARTS_DEFAULT"\0"					\
diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h
index 735aaa9983..b63aca6593 100644
--- a/include/configs/at91sam9x5ek.h
+++ b/include/configs/at91sam9x5ek.h
@@ -74,9 +74,6 @@
 #define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
 #define CONFIG_SYS_NAND_ENABLE_PIN	AT91_PIN_PD4
 #define CONFIG_SYS_NAND_READY_PIN	AT91_PIN_PD5
-
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
 #endif
 
 /* PMECC & PMERRLOC */
diff --git a/include/configs/baltos.h b/include/configs/baltos.h
index 059cf4a766..edc9466327 100644
--- a/include/configs/baltos.h
+++ b/include/configs/baltos.h
@@ -35,8 +35,6 @@
 #define CONFIG_SYS_BOOTM_LEN         SZ_64M
 
 /* UBI Support */
-#define CONFIG_MTD_PARTITIONS
-#define CONFIG_MTD_DEVICE
 
 /* I2C configuration */
 #undef CONFIG_SYS_OMAP24_I2C_SPEED
diff --git a/include/configs/brppt1.h b/include/configs/brppt1.h
index 2af575a138..3d85c41652 100644
--- a/include/configs/brppt1.h
+++ b/include/configs/brppt1.h
@@ -52,9 +52,6 @@
  * both for ease of use in U-Boot and for passing information on to
  * the Linux kernel.
  */
-#if defined(CONFIG_SPI_BOOT) || defined(CONFIG_NAND)
-#define CONFIG_MTD_DEVICE		/* Required for mtdparts */
-#endif /* CONFIG_SPI_BOOT, ... */
 
 #ifdef CONFIG_SPL_OS_BOOT
 #define CONFIG_SYS_SPL_ARGS_ADDR		0x80F80000
diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h
index ad70281436..fb60b7a9f8 100644
--- a/include/configs/cm_fx6.h
+++ b/include/configs/cm_fx6.h
@@ -48,8 +48,6 @@
 
 /* MTD support */
 #ifndef CONFIG_SPL_BUILD
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
 #define CONFIG_SPI_FLASH_MTD
 #endif
 
diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h
index 5c14885019..d64ca32010 100644
--- a/include/configs/cm_t35.h
+++ b/include/configs/cm_t35.h
@@ -83,12 +83,6 @@
 #define CONFIG_USB_TTY
 
 /* commands to include */
-#define CONFIG_MTD_DEVICE	/* needed for mtdparts commands */
-#define CONFIG_MTD_PARTITIONS
-#define MTDIDS_DEFAULT		"nand0=nand"
-#define MTDPARTS_DEFAULT	"mtdparts=nand:512k(x-loader),"\
-				"1920k(u-boot),256k(u-boot-env),"\
-				"4m(kernel),-(fs)"
 
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_OMAP24_I2C_SPEED	100000
diff --git a/include/configs/cm_t3517.h b/include/configs/cm_t3517.h
index 382e11740f..2f28fdc7ae 100644
--- a/include/configs/cm_t3517.h
+++ b/include/configs/cm_t3517.h
@@ -91,12 +91,6 @@
 #endif /* CONFIG_USB_MUSB_AM35X */
 
 /* commands to include */
-#define CONFIG_MTD_DEVICE	/* needed for mtdparts commands */
-#define CONFIG_MTD_PARTITIONS
-#define MTDIDS_DEFAULT		"nand0=nand"
-#define MTDPARTS_DEFAULT	"mtdparts=nand:512k(x-loader),"\
-				"1920k(u-boot),256k(u-boot-env),"\
-				"4m(kernel),-(fs)"
 
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_OMAP24_I2C_SPEED	400000
diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h
index 59afa2f112..84d9595a9c 100644
--- a/include/configs/colibri_imx7.h
+++ b/include/configs/colibri_imx7.h
@@ -166,15 +166,6 @@
 #define CONFIG_SYS_NAND_MX7_GPMI_62_ECC_BYTES
 
 /* Dynamic MTD partition support */
-#define CONFIG_MTD_PARTITIONS
-#define CONFIG_MTD_DEVICE	/* needed for mtdparts commands */
-#define MTDIDS_DEFAULT		"nand0=gpmi-nand"
-#define MTDPARTS_DEFAULT	"mtdparts=gpmi-nand:"		\
-				"512k(mx7-bcb),"		\
-				"1536k(u-boot1)ro,"		\
-				"1536k(u-boot2)ro,"		\
-				"512k(u-boot-env),"		\
-				"-(ubi)"
 
 /* DMA stuff, needed for GPMI/MXS NAND support */
 
diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h
index d51f7bd9cd..f3c8f9f7fa 100644
--- a/include/configs/colibri_t20.h
+++ b/include/configs/colibri_t20.h
@@ -43,14 +43,6 @@
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 
 /* Dynamic MTD partition support */
-#define CONFIG_MTD_PARTITIONS
-#define CONFIG_MTD_DEVICE	/* needed for mtdparts commands */
-#define MTDIDS_DEFAULT		"nand0=tegra_nand"
-#define MTDPARTS_DEFAULT	"mtdparts=tegra_nand:"		\
-				"2m(u-boot)ro,"			\
-				"1m(u-boot-env),"		\
-				"1m(cfgblock)ro,"		\
-				"-(ubi)"
 
 /* Environment in NAND, 64K is a bit excessive but erase block is 512K anyway */
 #define CONFIG_ENV_OFFSET		(SZ_2M)
diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h
index 8166aa4afb..2f08dffbd0 100644
--- a/include/configs/colibri_vf.h
+++ b/include/configs/colibri_vf.h
@@ -48,16 +48,6 @@
 #define CONFIG_SYS_NAND_BASE		NFC_BASE_ADDR
 
 /* Dynamic MTD partition support */
-#define CONFIG_MTD_PARTITIONS
-#define CONFIG_MTD_DEVICE	/* needed for mtdparts commands */
-#define MTDIDS_DEFAULT		"nand0=vf610_nfc"
-#define MTDPARTS_DEFAULT	"mtdparts=vf610_nfc:"		\
-				"128k(vf-bcb)ro,"		\
-				"1408k(u-boot)ro,"		\
-				"512k(u-boot-env),"		\
-				"-(ubi)"
-
-#define CONFIG_FSL_ESDHC
 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
 #define CONFIG_SYS_FSL_ESDHC_NUM	1
 
diff --git a/include/configs/corvus.h b/include/configs/corvus.h
index c930113390..a0a2719f2d 100644
--- a/include/configs/corvus.h
+++ b/include/configs/corvus.h
@@ -87,9 +87,6 @@
 #define CONFIG_NET_RETRY_COUNT		20
 #define CONFIG_AT91_WANTS_COMMON_PHY
 
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
-
 /* DFU class support */
 #define CONFIG_SYS_DFU_DATA_BUF_SIZE	(SZ_1M)
 #define DFU_MANIFEST_POLL_TIMEOUT	25000
diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h
index 3741f90cfe..bea18e1b37 100644
--- a/include/configs/da850evm.h
+++ b/include/configs/da850evm.h
@@ -264,15 +264,7 @@
 #ifndef CONFIG_DRIVER_TI_EMAC
 #endif
 
-#ifdef CONFIG_USE_NAND
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
-#endif
-
-#ifdef CONFIG_USE_SPIFLASH
-#endif
-
-#if !defined(CONFIG_USE_NAND) && \
+#if !defined(CONFIG_NAND) && \
 	!defined(CONFIG_USE_NOR) && \
 	!defined(CONFIG_USE_SPIFLASH)
 #define CONFIG_ENV_SIZE		(16 << 10)
diff --git a/include/configs/display5.h b/include/configs/display5.h
new file mode 100644
index 0000000000..692a95938b
--- /dev/null
+++ b/include/configs/display5.h
@@ -0,0 +1,418 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2017
+ * Lukasz Majewski, DENX Software Engineering, lukma@denx.de
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include "mx6_common.h"
+
+/* Falcon Mode */
+#define CONFIG_CMD_SPL
+#define CONFIG_SYS_SPL_ARGS_ADDR	0x18000000
+#define CONFIG_CMD_SPL_WRITE_SIZE	(44 * SZ_1K)
+
+/* Falcon Mode - MMC support */
+#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	0x3F00
+#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	\
+	(CONFIG_CMD_SPL_WRITE_SIZE / 512)
+#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	0x100	/* 128KiB */
+
+/*
+ * display5 SPI-NOR memory layout
+ *
+ * The definition can be found in Kconfig's
+ * CONFIG_MTDIDS_DEFAULT and CONFIG_MTDPARTS_DEFAULT
+ *
+ * 0x000000 - 0x020000 : SPI.SPL (128KiB)
+ * 0x020000 - 0x120000 : SPI.u-boot (1MiB)
+ * 0x120000 - 0x130000 : SPI.u-boot-env1 (64KiB)
+ * 0x130000 - 0x140000 : SPI.u-boot-env2 (64KiB)
+ * 0x140000 - 0x540000 : SPI.swupdate-kernel-FIT (4MiB)
+ * 0x540000 - 0x1540000 : SPI.swupdate-initramfs  (16MiB)
+ * 0x1540000 - 0x1640000 : SPI.factory  (1MiB)
+ */
+
+#ifndef CONFIG_SPL_BUILD
+#define CONFIG_SPI_FLASH_MTD
+#endif
+
+/* Below values are "dummy" - only to avoid build break */
+#define CONFIG_SYS_SPI_KERNEL_OFFS      0x150000
+#define CONFIG_SYS_SPI_ARGS_OFFS        0x140000
+#define CONFIG_SYS_SPI_ARGS_SIZE        0x10000
+
+#include "imx6_spl.h"
+#define CONFIG_SYS_SPI_U_BOOT_OFFS	0x20000
+
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
+#define CONFIG_REVISION_TAG
+
+/* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN		(16 * 1024 * 1024)
+#define CONFIG_MISC_INIT_R
+
+/*#define CONFIG_MXC_UART*/
+#define CONFIG_MXC_UART_BASE		UART5_BASE
+
+/* SPI NOR Flash */
+#ifdef CONFIG_CMD_SF
+#define CONFIG_SF_DEFAULT_BUS		1
+#define CONFIG_SF_DEFAULT_CS		(0 | (IMX_GPIO_NR(5, 29) << 8))
+#define CONFIG_SF_DEFAULT_SPEED		50000000
+#define CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
+#endif
+
+/* I2C Configs */
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C1
+#define CONFIG_SYS_I2C_MXC_I2C2
+#define CONFIG_SYS_I2C_MXC_I2C3
+#define CONFIG_I2C_MULTI_BUS
+#define CONFIG_SYS_I2C_SPEED		100000
+#define CONFIG_I2C_EDID
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  2
+
+/* Ethernet */
+#ifdef CONFIG_FEC_MXC
+#define IMX_FEC_BASE			ENET_BASE_ADDR
+#define CONFIG_FEC_XCV_TYPE		RGMII
+#define CONFIG_ETHPRIME			"FEC"
+#define CONFIG_FEC_MXC_PHYADDR		0
+#define CONFIG_MII
+#endif
+
+/* MMC Configs */
+#define CONFIG_FSL_USDHC
+#define CONFIG_SYS_FSL_ESDHC_ADDR	0
+#define CONFIG_SYS_FSL_USDHC_NUM	2
+#define CONFIG_SUPPORT_EMMC_BOOT
+
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+#define CONFIG_BAUDRATE			115200
+
+#ifndef CONFIG_BOOTCOMMAND
+#define CONFIG_BOOTCOMMAND "if run check_em_pad; then " \
+	     "run recovery;" \
+	"else if test ${BOOT_FROM} = FACTORY; then " \
+	     "run factory_nfs;" \
+	"else " \
+	     "run boot_mmc;" \
+	"fi;fi"
+#endif
+
+#define PARTS_DEFAULT \
+	/* Linux partitions */ \
+	"partitions=" \
+	"uuid_disk=${uuid_gpt_disk};" \
+	"name=kernel_raw1,start=128K,size=8M,uuid=${uuid_gpt_kernel_raw1};" \
+	"name=rootfs1,size=1528M,uuid=${uuid_gpt_rootfs1};" \
+	"name=kernel_raw2,size=8M,uuid=${uuid_gpt_kernel_raw2};" \
+	"name=rootfs2,size=512M,uuid=${uuid_gpt_rootfs2};" \
+	"name=data,size=-,uuid=${uuid_gpt_data}\0"
+
+#define FACTORY_PROCEDURE \
+	"echo '#######################';" \
+	"echo '# Factory Boot        #';" \
+	"echo '#######################';" \
+	"env default -a;" \
+	"saveenv;" \
+	"gpt write mmc ${mmcdev} ${partitions};" \
+	"run tftp_sf_SPL;" \
+	"run tftp_sf_uboot;" \
+	TFTP_UPDATE_KERNEL \
+	"run tftp_sf_fitImg_SWU;" \
+	"run tftp_sf_initramfs_SWU;" \
+	TFTP_UPDATE_ROOTFS \
+	"echo '#######################';" \
+	"echo '# END - OK            #';" \
+	"echo '#######################';" \
+	"setenv bootcmd 'env default -a; saveenv; run falcon_setup; reset';" \
+	"setenv boot_os 'n';" \
+	"saveenv;" \
+	"reset;"
+
+#define SWUPDATE_RECOVERY_PROCEDURE \
+	"echo '#######################';" \
+	"echo '# RECOVERY SWUupdate  #';" \
+	"echo '#######################';" \
+	"echo '#######################';" \
+	"echo '# GPT verify          #';" \
+	"if gpt verify mmc ${mmcdev} ${partitions}; then " \
+		"echo '# OK !                #';" \
+	"else " \
+		"echo '# FAILED !            #';" \
+		"echo '# GPT RESTORATION     #';" \
+		"gpt write mmc ${mmcdev} ${partitions};" \
+	"fi;" \
+	"echo '#######################';" \
+	"setenv loadaddr_swu_initramfs 0x14000000;" \
+	"setenv bootargs console=${console} " \
+		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
+		":${hostname}::off root=/dev/ram rw;" \
+	"sf probe;" \
+	"sf read ${loadaddr} swu-kernel;" \
+	"sf read ${loadaddr_swu_initramfs} swu-initramfs;" \
+	"bootm ${loadaddr} ${loadaddr_swu_initramfs};reset;"
+
+#define SETUP_BOOTARGS \
+	"run set_rootfs_part;" \
+	"setenv bootargs ${bootargs} console=${console} "	  \
+		      "root=/dev/mmcblk${mmcdev}p${rootfs_part} " \
+		      "rootwait rootfstype=ext4 rw; " \
+	"run set_kernel_part;" \
+	"part start mmc ${mmcdev} ${kernel_part} lba_start; " \
+	"mmc read ${loadaddr} ${lba_start} 0x2000; " \
+	"setenv fdt_conf imx6q-${board}-${display}.dtb; "
+
+/* All the numbers are in LBAs */
+#define __TFTP_UPDATE_KERNEL \
+	"tftp_mmc_fitImg=" \
+	   "if test ! -n ${kernel_part}; then " \
+	       "setenv kernel_part ${kernel_part_active};" \
+	   "fi;" \
+	   "if tftp ${loadaddr} ${kernel_file}; then " \
+	       "setexpr fw_sz ${filesize} / 0x200; " \
+	       "setexpr fw_sz ${fw_sz} + 1; "  \
+	       "part start mmc ${mmcdev} ${kernel_part} lba_start; " \
+	       "mmc write ${loadaddr} ${lba_start} ${fw_sz}; " \
+	   "; fi\0" \
+
+#define TFTP_UPDATE_KERNEL \
+	"setenv kernel_part ${kernel_part_active};" \
+	"run tftp_mmc_fitImg;" \
+	"setenv kernel_part ${kernel_part_backup};" \
+	"run tftp_mmc_fitImg;" \
+
+#define __TFTP_UPDATE_ROOTFS \
+	"tftp_mmc_rootfs=" \
+	   "if test ! -n ${rootfs_part}; then " \
+	       "setenv rootfs_part ${rootfs_part_active};" \
+	   "fi;" \
+	   "if tftp ${loadaddr} ${rootfs_file}; then " \
+	       "setexpr fw_sz ${filesize} / 0x200; " \
+	       "setexpr fw_sz ${fw_sz} + 1; "  \
+	       "part start mmc ${mmcdev} ${rootfs_part} lba_start; " \
+	       "mmc write ${loadaddr} ${lba_start} ${fw_sz}; " \
+	   "; fi\0" \
+
+#define TFTP_UPDATE_ROOTFS \
+	"setenv rootfs_part ${rootfs_part_active};" \
+	"run tftp_mmc_rootfs;" \
+	"run tftp_mmc_rootfs_bkp;" \
+
+
+#define TFTP_UPDATE_RECOVERY_SWU_KERNEL \
+	"tftp_sf_fitImg_SWU=" \
+	    "if tftp ${loadaddr} ${kernel_file}; then " \
+		"sf probe;" \
+		"sf erase swu-kernel +${filesize};" \
+		"sf write ${loadaddr} swu-kernel ${filesize};" \
+	"; fi\0"	  \
+
+#define TFTP_UPDATE_RECOVERY_SWU_INITRAMFS \
+	"swu_initramfs_file=swupdate-image-display5.ext4.gz.u-boot\0" \
+	"tftp_sf_initramfs_SWU=" \
+	    "if tftp ${loadaddr} ${swu_initramfs_file}; then " \
+		"sf probe;" \
+		"sf erase swu-initramfs +${filesize};" \
+		"sf write ${loadaddr} swu-initramfs ${filesize};" \
+	"; fi\0"	  \
+
+#define TFTP_UPDATE_BOOTLOADER \
+	"ubootfile=u-boot.img\0" \
+	"ubootfileSPL=SPL\0" \
+	"tftp_sf_uboot=" \
+	    "if tftp ${loadaddr} ${ubootfile}; then " \
+		"sf probe;" \
+		"sf erase u-boot +${filesize};" \
+		"sf write ${loadaddr} u-boot ${filesize}" \
+	"; fi\0"	  \
+	"tftp_sf_SPL="	  \
+	    "if tftp ${loadaddr} ${ubootfileSPL}; then " \
+		"sf probe;" \
+		"setexpr uboot_SPL_size ${filesize} + 0x400;" \
+		"sf erase 0x0 +${uboot_SPL_size};" \
+		"sf write ${loadaddr} 0x400 ${filesize};" \
+	"fi\0" \
+
+#define TFTP_UPDATE_SPINOR \
+	"spinorfile=core-image-lwn-display5.spinor\0" \
+	"spinorsize=0x2000000\0" \
+	"tftp_sf_img=" \
+	    "if tftp ${loadaddr} ${spinorfile}; then " \
+		"sf probe;" \
+		"sf erase 0x0 ${spinorsize};" \
+		"sf write ${loadaddr} 0x0 ${filesize};" \
+	"fi\0" \
+
+#define CONFIG_EXTRA_ENV_SETTINGS	  \
+	PARTS_DEFAULT \
+	"gpio_recovery=93\0" \
+	"check_em_pad=gpio input ${gpio_recovery};test $? -eq 0;\0" \
+	"display=tianma-tm070-800x480\0" \
+	"board=display5\0" \
+	"mmcdev=0\0" \
+	"altbootcmd=run recovery\0" \
+	"bootdelay=1\0" \
+	"baudrate=115200\0" \
+	"bootcmd=" CONFIG_BOOTCOMMAND "\0" \
+	"factory=" FACTORY_PROCEDURE "\0" \
+	"bootlimit=3\0" \
+	"ethact=FEC\0" \
+	"netdev=eth0\0" \
+	"boot_os=y\0" \
+	"hostname=display5\0" \
+	"loadaddr=0x12000000\0" \
+	"fdtaddr=0x12800000\0" \
+	"console=ttymxc4,115200 quiet cma=256M\0" \
+	"fdtfile=imx6q-display5.dtb\0" \
+	"fdt_high=0xffffffff\0" \
+	"initrd_high=0xffffffff\0" \
+	"kernel_file=fitImage\0" \
+	"up=run tftp_sf_SPL; run tftp_sf_uboot\0" \
+	"download_kernel=" \
+		"tftpboot ${loadaddr} ${kernel_file};\0" \
+	"factory_nfs=" \
+	     "setenv ipaddr 192.168.1.102;" \
+	     "setenv gatewayip 192.168.1.1;" \
+	     "setenv netmask 255.255.255.0;" \
+	     "setenv serverip 192.168.1.2;" \
+	     "echo BOOT: FACTORY (LEG);" \
+	     "run boot_nfs\0" \
+	"boot_swu_recovery=" SWUPDATE_RECOVERY_PROCEDURE "\0" \
+	"recovery=" \
+	     "echo BOOT: RECOVERY: SWU;" \
+	     "run boot_swu_recovery\0" \
+	"boot_tftp=" \
+	"if run download_kernel; then "	  \
+	     "setenv bootargs console=${console} " \
+	     "root=/dev/mmcblk0p2 rootwait;" \
+	     "bootm ${loadaddr} - ${fdtaddr};reset;" \
+	"fi\0" \
+	"addip=setenv bootargs ${bootargs} " \
+	"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:" \
+	    "${hostname}:eth0:on"	  \
+	"\0"	  \
+	"nfsargs=setenv bootargs " \
+	"root=/dev/nfs rw "	  \
+	"nfsroot=${serverip}:${rootpath},nolock,nfsvers=3" \
+	"\0" \
+	"rootpath=/srv/tftp/DISP5/rootfs\0" \
+	"boot_nfs=" \
+	"if run download_kernel; then "	  \
+	     "run nfsargs;"	  \
+	     "run addip;"	  \
+	     "setenv bootargs ${bootargs} console=${console};"	  \
+	     "setenv fdt_conf imx6q-${board}-${display}.dtb; " \
+	     "bootm ${loadaddr}#conf@${fdt_conf};reset;" \
+	"fi\0" \
+	"falcon_setup=" \
+	"if mmc dev ${mmcdev}; then "	  \
+	     SETUP_BOOTARGS \
+	     "spl export fdt ${loadaddr}#conf@${fdt_conf};" \
+	     "setexpr fw_sz ${fdtargslen} / 0x200; " \
+	     "setexpr fw_sz ${fw_sz} + 1; "  \
+	     "mmc write ${fdtargsaddr} " \
+	     __stringify(CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR)" ${fw_sz}; " \
+	"fi\0" \
+	"boot_mmc=" \
+	"if mmc dev ${mmcdev}; then "	  \
+	     SETUP_BOOTARGS \
+	     "bootm ${loadaddr}#conf@${fdt_conf};reset;" \
+	"fi\0" \
+	"set_kernel_part=" \
+	"if test ${BOOT_FROM} = ACTIVE; then " \
+	     "setenv kernel_part ${kernel_part_active};" \
+	     "echo BOOT: ACTIVE;" \
+	"else if test ${BOOT_FROM} = BACKUP; then " \
+	     "setenv kernel_part ${kernel_part_backup};" \
+	     "echo BOOT: BACKUP;" \
+	"else " \
+	     "run recovery;" \
+	"fi;fi\0" \
+	"set_rootfs_part=" \
+	"if test ${BOOT_FROM} = ACTIVE; then " \
+	     "setenv rootfs_part ${rootfs_part_active};" \
+	"else if test ${BOOT_FROM} = BACKUP; then " \
+	     "setenv rootfs_part ${rootfs_part_backup};" \
+	"else " \
+	     "run recovery;" \
+	"fi;fi\0" \
+	"BOOT_FROM=ACTIVE\0" \
+	TFTP_UPDATE_BOOTLOADER \
+	TFTP_UPDATE_SPINOR \
+	"kernel_part_active=1\0" \
+	"kernel_part_backup=3\0" \
+	__TFTP_UPDATE_KERNEL \
+	"rootfs_part_active=2\0" \
+	"rootfs_part_backup=4\0" \
+	"rootfs_file=core-image-lwn-display5.ext4\0" \
+	"rootfs_file_backup=core-image-lwn-backup-display5.ext4\0" \
+	__TFTP_UPDATE_ROOTFS \
+	"tftp_mmc_rootfs_bkp=" \
+	   "setenv rootfs_part ${rootfs_part_backup};" \
+	   "setenv rootfs_file ${rootfs_file_backup};" \
+	   "run tftp_mmc_rootfs\0" \
+	TFTP_UPDATE_RECOVERY_SWU_KERNEL \
+	TFTP_UPDATE_RECOVERY_SWU_INITRAMFS \
+	"\0" \
+
+/* Miscellaneous configurable options */
+#undef CONFIG_SYS_CBSIZE
+#define CONFIG_SYS_CBSIZE		2048
+
+/* Print Buffer Size */
+#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
+					 sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_MAXARGS		32
+#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
+
+#define CONFIG_STANDALONE_LOAD_ADDR	0x10001000
+#define CONFIG_SYS_HZ			1000
+
+/* Physical Memory Map */
+#define CONFIG_NR_DRAM_BANKS		1
+#define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
+
+#define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
+#define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
+
+#define CONFIG_SYS_INIT_SP_OFFSET \
+	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR \
+	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+
+/* Commands */
+
+/* Watchdog */
+#define CONFIG_HW_WATCHDOG
+#define CONFIG_IMX_WATCHDOG
+#define CONFIG_WATCHDOG_TIMEOUT_MSECS   15000
+
+/* ENV config */
+#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_ENV_SIZE		(SZ_64K)
+/* The 0x120000 value corresponds to above SPI-NOR memory MAP */
+#define CONFIG_ENV_OFFSET		(0x120000)
+#define CONFIG_ENV_SECT_SIZE		(SZ_64K)
+#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
+#define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + \
+						CONFIG_ENV_SECT_SIZE)
+#define CONFIG_ENV_SIZE_REDUND		CONFIG_ENV_SIZE
+
+#define CONFIG_ENV_SPI_BUS		CONFIG_SF_DEFAULT_BUS
+#define CONFIG_ENV_SPI_CS		CONFIG_SF_DEFAULT_CS
+#define CONFIG_ENV_SPI_MODE		CONFIG_SF_DEFAULT_MODE
+#define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
+#endif
+
+#define CONFIG_MXC_USB_PORTSC           (PORT_PTS_UTMI | PORT_PTS_PTW)
+#endif /* __CONFIG_H */
diff --git a/include/configs/dns325.h b/include/configs/dns325.h
index f8166854c1..aa167fe5ec 100644
--- a/include/configs/dns325.h
+++ b/include/configs/dns325.h
@@ -28,7 +28,6 @@
 /*
  * Commands configuration
  */
-#define CONFIG_SYS_MVFS
 
 #define CONFIG_NR_DRAM_BANKS		1
 
diff --git a/include/configs/dockstar.h b/include/configs/dockstar.h
index 2389086597..4fca8a81ca 100644
--- a/include/configs/dockstar.h
+++ b/include/configs/dockstar.h
@@ -72,7 +72,5 @@
 /*
  * File system
  */
-#define CONFIG_MTD_DEVICE               /* needed for mtdparts commands */
-#define CONFIG_MTD_PARTITIONS
 
 #endif /* _CONFIG_DOCKSTAR_H */
diff --git a/include/configs/draak.h b/include/configs/draak.h
new file mode 100644
index 0000000000..5d1da21e99
--- /dev/null
+++ b/include/configs/draak.h
@@ -0,0 +1,38 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * include/configs/draak.h
+ *     This file is Draak board configuration.
+ *
+ * Copyright (C) 2015 Renesas Electronics Corporation
+ */
+
+#ifndef __DRAAK_H
+#define __DRAAK_H
+
+#include "rcar-gen3-common.h"
+
+/* Ethernet RAVB */
+#define CONFIG_BITBANGMII
+#define CONFIG_BITBANGMII_MULTI
+
+/* Generic Timer Definitions (use in assembler source) */
+#define COUNTER_FREQUENCY	0xFE502A	/* 16.66MHz from CPclk */
+
+/* Environment in eMMC, at the end of 2nd "boot sector" */
+#define CONFIG_ENV_OFFSET		(-CONFIG_ENV_SIZE)
+#define CONFIG_SYS_MMC_ENV_DEV		0
+#define CONFIG_SYS_MMC_ENV_PART		2
+
+#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_FLASH_CFI_MTD
+#define CONFIG_FLASH_SHOW_PROGRESS	45
+#define CONFIG_SYS_FLASH_BANKS_LIST	{ 0x08000000 }
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_16BIT
+#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT	1
+#define CONFIG_SYS_MAX_FLASH_SECT	256
+#define CONFIG_SYS_WRITE_SWAPPED_DATA
+#define CONFIG_CMD_CACHE
+
+#endif /* __DRAAK_H */
diff --git a/include/configs/ds414.h b/include/configs/ds414.h
index c201dbf4d3..74a07a57e5 100644
--- a/include/configs/ds414.h
+++ b/include/configs/ds414.h
@@ -68,8 +68,6 @@
 #endif
 
 /* why is this only defined in mv-common.h if CONFIG_DM is undefined? */
-#define CONFIG_SUPPORT_VFAT
-#define CONFIG_SYS_MVFS
 
 /*
  * mv-common.h should be defined after CMD configs since it used them
diff --git a/include/configs/ea20.h b/include/configs/ea20.h
index 8bfa5d4d46..fd4ea50c2b 100644
--- a/include/configs/ea20.h
+++ b/include/configs/ea20.h
@@ -128,9 +128,6 @@
 
 /* NAND Setup */
 #ifdef CONFIG_SYS_USE_NAND
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
-
 #define	CONFIG_SYS_NAND_PAGE_2K
 #define CONFIG_SYS_NAND_NO_SUBPAGE
 #define CONFIG_SYS_NAND_CS		2
diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h
index 9c989bba8b..d6e4c940fa 100644
--- a/include/configs/ethernut5.h
+++ b/include/configs/ethernut5.h
@@ -149,12 +149,6 @@
 #endif
 
 /* File systems */
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
-#if defined(CONFIG_CMD_MTDPARTS) || defined(CONFIG_CMD_NAND)
-#define MTDIDS_DEFAULT		"nand0=atmel_nand"
-#define MTDPARTS_DEFAULT	"mtdparts=atmel_nand:-(root)"
-#endif
 
 /* Boot command */
 #define CONFIG_CMDLINE_TAG
diff --git a/include/configs/flea3.h b/include/configs/flea3.h
index df8169e410..60e439a6e1 100644
--- a/include/configs/flea3.h
+++ b/include/configs/flea3.h
@@ -117,17 +117,7 @@
 /*
  * MTD Command for mtdparts
  */
-#define CONFIG_MTD_DEVICE
 #define CONFIG_FLASH_CFI_MTD
-#define CONFIG_MTD_PARTITIONS
-#define MTDIDS_DEFAULT		"nand0=mxc_nand,nor0=physmap-flash.0"
-#define MTDPARTS_DEFAULT	"mtdparts=mxc_nand:50m(root1)," \
-				"32m(rootfb)," \
-				"64m(pcache)," \
-				"64m(app1)," \
-				"10m(app2),-(spool);" \
-				"physmap-flash.0:512k(u-boot),64k(env1)," \
-				"64k(env2),3776k(kernel1),3776k(kernel2)"
 
 /*
  * FLASH and environment organization
diff --git a/include/configs/goflexhome.h b/include/configs/goflexhome.h
index aaa336e34c..8db7d638fb 100644
--- a/include/configs/goflexhome.h
+++ b/include/configs/goflexhome.h
@@ -43,8 +43,6 @@
  * Commands configuration
  */
 
-#define CONFIG_SYS_MVFS         /* Picks up Filesystem from mv-common.h */
-
 /*
  * mv-common.h should be defined after CMD configs since it used them
  * to enable certain macros
diff --git a/include/configs/guruplug.h b/include/configs/guruplug.h
index c69e8994bd..aa25584e7b 100644
--- a/include/configs/guruplug.h
+++ b/include/configs/guruplug.h
@@ -19,7 +19,7 @@
 /*
  * Standard filesystems
  */
-#define CONFIG_SYS_MVFS
+#define CONFIG_BZIP2
 
 /*
  * mv-plug-common.h should be defined after CMD configs since it used them
diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index d7a4a708a1..639655b65e 100644
--- a/include/configs/gw_ventana.h
+++ b/include/configs/gw_ventana.h
@@ -183,16 +183,6 @@
 /*
  * MTD Command for mtdparts
  */
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
-#ifdef CONFIG_SPI_FLASH
-#define MTDIDS_DEFAULT    "nor0=nor"
-#define MTDPARTS_DEFAULT  \
-	"mtdparts=nor:512k(uboot),64k(env),2m(kernel),-(rootfs)"
-#else
-#define MTDIDS_DEFAULT    "nand0=nand"
-#define MTDPARTS_DEFAULT  "mtdparts=nand:16m(uboot),1m(env),-(rootfs)"
-#endif
 
 /* Persistent Environment Config */
 #if defined(CONFIG_ENV_IS_IN_MMC)
diff --git a/include/configs/hikey.h b/include/configs/hikey.h
index 7eaa6e4667..d7daf4ed04 100644
--- a/include/configs/hikey.h
+++ b/include/configs/hikey.h
@@ -70,8 +70,6 @@
 
 /* Command line configuration */
 
-#define CONFIG_MTD_PARTITIONS
-
 /* BOOTP options */
 #define CONFIG_BOOTP_BOOTFILESIZE
 
diff --git a/include/configs/ib62x0.h b/include/configs/ib62x0.h
index d45dc357cb..4de6750c36 100644
--- a/include/configs/ib62x0.h
+++ b/include/configs/ib62x0.h
@@ -27,7 +27,6 @@
 /*
  * Commands configuration
  */
-#define CONFIG_SYS_MVFS
 
 /*
  * mv-common.h should be defined after CMD configs since it used them
diff --git a/include/configs/iconnect.h b/include/configs/iconnect.h
index 26dbe53943..0979c5ad78 100644
--- a/include/configs/iconnect.h
+++ b/include/configs/iconnect.h
@@ -29,7 +29,6 @@
 /*
  * Commands configuration
  */
-#define CONFIG_SYS_MVFS
 
 /*
  * mv-common.h should be defined after CMD configs since it used them
@@ -81,7 +80,5 @@
 /*
  * File system
  */
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
 
 #endif /* _CONFIG_ICONNECT_H */
diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h
index 1a8c273533..e4210ce8f2 100644
--- a/include/configs/ids8313.h
+++ b/include/configs/ids8313.h
@@ -471,12 +471,6 @@
 
 /* mtdparts command line support */
 #define CONFIG_FLASH_CFI_MTD
-#define CONFIG_MTD_DEVICE
-#define MTDIDS_DEFAULT		"nor0=ff800000.flash,nand0=e1000000.flash"
-#define MTDPARTS_DEFAULT	"mtdparts=ff800000.flash:7m(dum)," \
-					"768k(BOOT-BIN)," \
-					"128k(BOOT-ENV),128k(BOOT-REDENV);" \
-					"e1000000.flash:-(ubi)"
 
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	"netdev=" __stringify(CONFIG_NETDEV) "\0"			\
@@ -519,7 +513,6 @@
 	"bootm ${loadaddr} - ${fdtaddr}"
 
 /* UBI Support */
-#define CONFIG_MTD_PARTITIONS
 
 /* bootcount support */
 #define CONFIG_BOOTCOUNT_LIMIT
diff --git a/include/configs/imx27lite-common.h b/include/configs/imx27lite-common.h
index 962856e101..4a554a0804 100644
--- a/include/configs/imx27lite-common.h
+++ b/include/configs/imx27lite-common.h
@@ -120,7 +120,6 @@
  * MTD
  */
 #define CONFIG_FLASH_CFI_MTD
-#define CONFIG_MTD_DEVICE
 
 /*
  * NAND
diff --git a/include/configs/imx6-engicam.h b/include/configs/imx6-engicam.h
index 7c302c2faf..6e4cbff5be 100644
--- a/include/configs/imx6-engicam.h
+++ b/include/configs/imx6-engicam.h
@@ -159,8 +159,6 @@
 # define CONFIG_SYS_NAND_U_BOOT_OFFS	0x200000
 
 /* MTD device */
-# define CONFIG_MTD_DEVICE
-# define CONFIG_MTD_PARTITIONS
 #endif
 
 /* Ethernet */
diff --git a/include/configs/imx6_logic.h b/include/configs/imx6_logic.h
index 8b2c645113..467781eea8 100644
--- a/include/configs/imx6_logic.h
+++ b/include/configs/imx6_logic.h
@@ -152,11 +152,6 @@
 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x200000
 
 /* MTD device */
-# define CONFIG_MTD_DEVICE
-# define CONFIG_MTD_PARTITIONS
-# define MTDIDS_DEFAULT		"nand0=gpmi-nand"
-# define MTDPARTS_DEFAULT	"mtdparts=gpmi-nand:4m(uboot)," \
-					"1m(env),16m(kernel),1m(dtb),-(fs)"
 
 /* DMA stuff, needed for GPMI/MXS NAND support */
 
diff --git a/include/configs/ipam390.h b/include/configs/ipam390.h
index 1d05bf6885..8e96046deb 100644
--- a/include/configs/ipam390.h
+++ b/include/configs/ipam390.h
@@ -236,22 +236,6 @@
 #define CONFIG_CLOCKS
 #endif
 
-#ifndef CONFIG_DRIVER_TI_EMAC
-#endif
-
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
-
-#define MTDIDS_NAME_STR		"davinci_nand.0"
-#define MTDIDS_DEFAULT		"nand0=" MTDIDS_NAME_STR
-#define MTDPARTS_DEFAULT	"mtdparts=" MTDIDS_NAME_STR ":" \
-					"128k(u-boot-env),"	\
-					"1408k(u-boot),"	\
-					"128k(bootparms),"	\
-					"384k(factory-info),"	\
-					"4M(kernel),"	\
-					"-(rootfs)"
-
 /* defines for SPL */
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SYS_SPL_MALLOC_START	(CONFIG_SYS_TEXT_BASE - \
diff --git a/include/configs/km/keymile-common.h b/include/configs/km/keymile-common.h
index 1971ba4f7e..27cf6fbe3a 100644
--- a/include/configs/km/keymile-common.h
+++ b/include/configs/km/keymile-common.h
@@ -52,8 +52,6 @@
 #define CONFIG_BOOTP_HOSTNAME
 
 /* UBI Support for all Keymile boards */
-#define CONFIG_MTD_PARTITIONS
-#define CONFIG_MTD_DEVICE
 #define CONFIG_MTD_CONCAT
 
 #ifndef CONFIG_KM_DEF_ENV_BOOTPARAMS
diff --git a/include/configs/mccmon6.h b/include/configs/mccmon6.h
index 755c949b76..4300e8f6b6 100644
--- a/include/configs/mccmon6.h
+++ b/include/configs/mccmon6.h
@@ -80,8 +80,6 @@
 #define CONFIG_SYS_FLASH_BANKS_SIZES	{ (32 * SZ_1M) }
 
 /* MTD support */
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
 
 #define MTDIDS_DEFAULT                  "nor0=8000000.nor"
 #define MTDPARTS_DEFAULT  \
diff --git a/include/configs/mcx.h b/include/configs/mcx.h
index b05877e400..703068c7fe 100644
--- a/include/configs/mcx.h
+++ b/include/configs/mcx.h
@@ -77,9 +77,6 @@
 
 /* commands to include */
 
-#define CONFIG_MTD_PARTITIONS
-#define CONFIG_MTD_DEVICE
-
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_OMAP24_I2C_SPEED	100000
 #define CONFIG_SYS_OMAP24_I2C_SLAVE	1
diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h
index 2cc4b8a1a3..8d73bdf59d 100644
--- a/include/configs/microblaze-generic.h
+++ b/include/configs/microblaze-generic.h
@@ -160,17 +160,8 @@
 #define CONFIG_BOOTP_GATEWAY
 #define CONFIG_BOOTP_HOSTNAME
 
-#if defined(CONFIG_CMD_JFFS2)
-# define CONFIG_MTD_PARTITIONS
-#endif
-
-#if defined(CONFIG_CMD_UBI)
-# define CONFIG_MTD_PARTITIONS
-#endif
-
 #if defined(CONFIG_MTD_PARTITIONS)
 /* MTD partitions */
-#define CONFIG_MTD_DEVICE	/* needed for mtdparts commands */
 #define CONFIG_FLASH_CFI_MTD
 #define MTDIDS_DEFAULT		"nor0=flash-0"
 
diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h
index e191d3a8a2..8e3dfd6c1f 100644
--- a/include/configs/mx28evk.h
+++ b/include/configs/mx28evk.h
@@ -58,20 +58,6 @@
 #endif
 
 /* UBI and NAND partitioning */
-#ifdef CONFIG_CMD_NAND
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
-#define MTDIDS_DEFAULT			"nand0=gpmi-nand"
-#define MTDPARTS_DEFAULT			\
-	"mtdparts=gpmi-nand:"			\
-		"3m(bootloader)ro,"		\
-		"512k(environment),"		\
-		"512k(redundant-environment),"	\
-		"4m(kernel),"			\
-		"512k(fdt),"			\
-		"8m(ramdisk),"			\
-		"-(filesystem)"
-#endif
 
 /* FEC Ethernet on SoC */
 #ifdef	CONFIG_CMD_NET
diff --git a/include/configs/mx35pdk.h b/include/configs/mx35pdk.h
index 18695d2686..e3a6bb3dc5 100644
--- a/include/configs/mx35pdk.h
+++ b/include/configs/mx35pdk.h
@@ -136,13 +136,7 @@
 /*
  * MTD Command for mtdparts
  */
-#define CONFIG_MTD_DEVICE
 #define CONFIG_FLASH_CFI_MTD
-#define CONFIG_MTD_PARTITIONS
-#define MTDIDS_DEFAULT		"nand0=mxc_nand,nor0=physmap-flash.0"
-#define MTDPARTS_DEFAULT	"mtdparts=mxc_nand:1m(boot),5m(linux),"	\
-				"96m(root),8m(cfg),1938m(user);"	\
-				"physmap-flash.0:512k(b),4m(k),30m(u),28m(r)"
 
 /*
  * FLASH and environment organization
diff --git a/include/configs/nas220.h b/include/configs/nas220.h
index 089263f96f..724b2c9613 100644
--- a/include/configs/nas220.h
+++ b/include/configs/nas220.h
@@ -99,8 +99,6 @@
  */
 #define CONFIG_JFFS2_NAND
 #define CONFIG_JFFS2_LZO
-#define CONFIG_MTD_DEVICE               /* needed for mtdparts commands */
-#define CONFIG_MTD_PARTITIONS
 
 /*
  * SATA
diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h
index 8e1effad34..1278cce015 100644
--- a/include/configs/nokia_rx51.h
+++ b/include/configs/nokia_rx51.h
@@ -163,8 +163,6 @@
 #ifdef ONENAND_SUPPORT
 
 #define CONFIG_SYS_ONENAND_BASE		ONENAND_MAP
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
 
 #define MTDIDS_DEFAULT			"onenand0=onenand"
 #define MTDPARTS_DEFAULT		"mtdparts=onenand:" \
diff --git a/include/configs/nsa310s.h b/include/configs/nsa310s.h
index 896c32996c..3d7692927b 100644
--- a/include/configs/nsa310s.h
+++ b/include/configs/nsa310s.h
@@ -23,7 +23,6 @@
 #define CONFIG_BZIP2
 
 /* commands configuration */
-#define CONFIG_SYS_MVFS
 
 /*
  * mv-common.h should be defined after CMD configs since it used them
diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
index 4d86b00687..e4adcbc6e8 100644
--- a/include/configs/omap3_beagle.h
+++ b/include/configs/omap3_beagle.h
@@ -33,6 +33,11 @@
 
 #define CONFIG_REVISION_TAG		1
 #define CONFIG_ENV_OVERWRITE
+/* NAND: SPL falcon mode configs */
+#if defined(CONFIG_SPL_OS_BOOT)
+#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x2a0000
+#endif /* CONFIG_SPL_OS_BOOT */
+#endif /* CONFIG_NAND */
 
 /* Status LED */
 
diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h
index 2edeee554f..8077e67f58 100644
--- a/include/configs/omap3_evm.h
+++ b/include/configs/omap3_evm.h
@@ -69,7 +69,6 @@
 #define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
 #define CONFIG_ENV_ADDR                 SMNAND_ENV_OFFSET
 #define CONFIG_ENV_OVERWRITE
-#define CONFIG_MTD_PARTITIONS           /* required for UBI partition support */
 /* NAND: SPL falcon mode configs */
 #if defined(CONFIG_SPL_OS_BOOT)
 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h
index 14f237b013..e75c1b104a 100644
--- a/include/configs/omap3_igep00x0.h
+++ b/include/configs/omap3_igep00x0.h
@@ -101,16 +101,6 @@
 
 #endif
 
-/*
- * SMSC911x Ethernet
- */
-#if defined(CONFIG_CMD_NET)
-#define CONFIG_SMC911X
-#define CONFIG_SMC911X_32_BIT
-#define CONFIG_SMC911X_BASE		0x2C000000
-#endif /* (CONFIG_CMD_NET) */
-
-#define CONFIG_MTD_PARTITIONS
 #define CONFIG_SYS_MTDPARTS_RUNTIME
 
 /* OneNAND config */
diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h
index d7fd9b449e..258bb70cd2 100644
--- a/include/configs/omap3_logic.h
+++ b/include/configs/omap3_logic.h
@@ -86,15 +86,6 @@
 #define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
 #define CONFIG_SYS_NAND_MAX_OOBFREE	2
 #define CONFIG_SYS_NAND_MAX_ECCPOS	56
-#define CONFIG_MTD_DEVICE		/* needed for mtdparts commands */
-#define CONFIG_MTD_PARTITIONS		/* required for UBI partition support */
-#define MTDIDS_DEFAULT			"nand0=omap2-nand.0"
-#define MTDPARTS_DEFAULT	"mtdparts=omap2-nand.0:"\
-							"512k(MLO),"\
-							"1792k(u-boot),"\
-							"128k(spl-os)," \
-							"128k(u-boot-env),"\
-							"6m(kernel),-(fs)"
 #endif
 
 /* Environment information */
diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h
index 622b32aa7d..988c762fe8 100644
--- a/include/configs/omap3_overo.h
+++ b/include/configs/omap3_overo.h
@@ -41,8 +41,6 @@
 /* commands to include */
 
 #ifdef CONFIG_NAND
-#define CONFIG_MTD_PARTITIONS	/* required for UBI partition support */
-
 /* NAND block size is 128 KiB.  Synchronize these values with
  * overo_nand_partitions in mach-omap2/board-overo.c in Linux:
  *  xloader              4 * NAND_BLOCK_SIZE = 512 KiB
diff --git a/include/configs/omap3_pandora.h b/include/configs/omap3_pandora.h
index 2d5f40e09c..885a33ba78 100644
--- a/include/configs/omap3_pandora.h
+++ b/include/configs/omap3_pandora.h
@@ -52,17 +52,6 @@
 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
 #define CONFIG_SYS_NAND_OOBSIZE		64
 
-#ifdef CONFIG_NAND
-#define CONFIG_MTD_PARTITIONS	/* required for UBI partition support */
-
-#define MTDIDS_DEFAULT			"nand0=omap2-nand.0"
-#define MTDPARTS_DEFAULT		"mtdparts=omap2-nand.0:512k(xloader),"\
-					"1920k(uboot),128k(uboot-env),"\
-					"10m(boot),-(rootfs)"
-#else
-#define MTDPARTS_DEFAULT
-#endif
-
 
 #define CONFIG_BOOTCOMMAND \
 	"run distro_bootcmd; " \
diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h
index c5f5bcfc93..8a50b47b96 100644
--- a/include/configs/omapl138_lcdk.h
+++ b/include/configs/omapl138_lcdk.h
@@ -273,15 +273,7 @@
 #define CONFIG_CLOCKS
 #endif
 
-#ifndef CONFIG_DRIVER_TI_EMAC
-#endif
-
-#ifdef CONFIG_USE_NAND
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
-#endif
-
-#if !defined(CONFIG_USE_NAND) && \
+#if !defined(CONFIG_NAND) && \
 	!defined(CONFIG_SYS_USE_NOR) && \
 	!defined(CONFIG_USE_SPIFLASH)
 #define CONFIG_ENV_SIZE		(16 << 10)
diff --git a/include/configs/openrd.h b/include/configs/openrd.h
index d685411bbb..3b41709367 100644
--- a/include/configs/openrd.h
+++ b/include/configs/openrd.h
@@ -25,7 +25,6 @@
 /*
  * Commands configuration
  */
-#define CONFIG_SYS_MVFS
 
 /*
  * mv-common.h should be defined after CMD configs since it used them
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 537a6ba196..08ba1e1681 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -70,8 +70,6 @@
 /*
  * Dynamic MTD Partition support with mtdparts
  */
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
 #define CONFIG_FLASH_CFI_MTD
 #define MTDIDS_DEFAULT "nor0=ec000000.nor"
 #define MTDPARTS_DEFAULT "mtdparts=ec000000.nor:128k(dtb),6016k(kernel)," \
@@ -95,8 +93,6 @@
 /*
  * Dynamic MTD Partition support with mtdparts
  */
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
 #define CONFIG_FLASH_CFI_MTD
 #ifdef CONFIG_PHYS_64BIT
 #define MTDIDS_DEFAULT "nor0=fef000000.nor"
@@ -153,8 +149,6 @@
 /*
  * Dynamic MTD Partition support with mtdparts
  */
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
 #define CONFIG_FLASH_CFI_MTD
 #ifdef CONFIG_PHYS_64BIT
 #define MTDIDS_DEFAULT "nor0=fef000000.nor"
diff --git a/include/configs/p1_twr.h b/include/configs/p1_twr.h
index 6bc9bdc58b..3072d44ea9 100644
--- a/include/configs/p1_twr.h
+++ b/include/configs/p1_twr.h
@@ -343,8 +343,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 /*
  * Dynamic MTD Partition support with mtdparts
  */
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
 #define CONFIG_FLASH_CFI_MTD
 #define MTDIDS_DEFAULT "nor0=ec000000.nor"
 #define MTDPARTS_DEFAULT "mtdparts=ec000000.nor:256k(vsc7385-firmware)," \
diff --git a/include/configs/pcm052.h b/include/configs/pcm052.h
index 8144a83db2..dd8dbcc2ae 100644
--- a/include/configs/pcm052.h
+++ b/include/configs/pcm052.h
@@ -32,8 +32,6 @@
 #define CONFIG_JFFS2_NAND
 
 /* Dynamic MTD partition support */
-#define CONFIG_MTD_PARTITIONS
-#define CONFIG_MTD_DEVICE
 
 #ifndef MTDIDS_DEFAULT
 #define MTDIDS_DEFAULT			"nand0=NAND"
diff --git a/include/configs/pcm058.h b/include/configs/pcm058.h
index e3f419b1de..3018209571 100644
--- a/include/configs/pcm058.h
+++ b/include/configs/pcm058.h
@@ -67,10 +67,6 @@
 /* DMA stuff, needed for GPMI/MXS NAND support */
 
 /* Filesystem support */
-#define CONFIG_MTD_PARTITIONS
-#define CONFIG_MTD_DEVICE
-#define MTDIDS_DEFAULT    "nand0=nand"
-#define MTDPARTS_DEFAULT  "mtdparts=nand:16m(uboot),1m(env),-(rootfs)"
 
 /* Physical Memory Map */
 #define CONFIG_NR_DRAM_BANKS           1
diff --git a/include/configs/pfla02.h b/include/configs/pfla02.h
index e12887010a..82741ce3ef 100644
--- a/include/configs/pfla02.h
+++ b/include/configs/pfla02.h
@@ -66,11 +66,6 @@
 /* DMA stuff, needed for GPMI/MXS NAND support */
 
 /* Filesystem support */
-#define CONFIG_MTD_PARTITIONS
-#define CONFIG_MTD_DEVICE
-#define MTDIDS_DEFAULT    "nand0=gpmi-nand"
-#define MTDPARTS_DEFAULT  "mtdparts=gpmi-nand:-(nand);" \
-	"spi2.0:1024k(bootloader),64k(env1),64k(env2),-(rescue)"
 
 /* Various command support */
 
diff --git a/include/configs/platinum.h b/include/configs/platinum.h
index 4d7258aedb..049ba872b8 100644
--- a/include/configs/platinum.h
+++ b/include/configs/platinum.h
@@ -109,8 +109,6 @@
 #define CONFIG_PREBOOT
 
 /* MTD/UBI/UBIFS config */
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
 
 #if (CONFIG_SYS_NAND_MAX_CHIPS == 1)
 #define MTDIDS_DEFAULT		"nand0=gpmi-nand"
diff --git a/include/configs/pogo_e02.h b/include/configs/pogo_e02.h
index 809005e289..662d11e48d 100644
--- a/include/configs/pogo_e02.h
+++ b/include/configs/pogo_e02.h
@@ -28,7 +28,6 @@
 /*
  * Commands configuration
  */
-#define CONFIG_SYS_MVFS
 
 /*
  * mv-common.h should be defined after CMD configs since it used them
@@ -73,7 +72,5 @@
 /*
  * File system
  */
-#define CONFIG_MTD_DEVICE               /* needed for mtdparts commands */
-#define CONFIG_MTD_PARTITIONS
 
 #endif /* _CONFIG_POGO_E02_H */
diff --git a/include/configs/rcar-gen2-common.h b/include/configs/rcar-gen2-common.h
index 2c10e6152d..4bc3a89157 100644
--- a/include/configs/rcar-gen2-common.h
+++ b/include/configs/rcar-gen2-common.h
@@ -54,4 +54,10 @@
 #define CONFIG_ENV_SIZE		(CONFIG_ENV_SECT_SIZE)
 #define CONFIG_ENV_SIZE_REDUND	(CONFIG_SYS_MONITOR_LEN)
 
+/* SF MTD */
+#if defined(CONFIG_SPI_FLASH_MTD) && !defined(CONFIG_SPL_BUILD)
+#else
+#undef CONFIG_SPI_FLASH_MTD
+#endif
+
 #endif	/* __RCAR_GEN2_COMMON_H */
diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h
index 9859f30718..ae43a530b2 100644
--- a/include/configs/s5pc210_universal.h
+++ b/include/configs/s5pc210_universal.h
@@ -44,11 +44,6 @@
 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x5000000)
 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x4800000)
 
-#define CONFIG_SYS_TEXT_BASE		0x44800000
-
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
-
 /* Actual modem binary size is 16MiB. Add 2MiB for bad block handling */
 #define MTDIDS_DEFAULT		"onenand0=samsung-onenand"
 
diff --git a/include/configs/sama5d3_xplained.h b/include/configs/sama5d3_xplained.h
index c97518eada..ed1f5073dc 100644
--- a/include/configs/sama5d3_xplained.h
+++ b/include/configs/sama5d3_xplained.h
@@ -44,9 +44,6 @@
 /* our CLE is AD22 */
 #define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
 #define CONFIG_SYS_NAND_ONFI_DETECTION
-
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
 #endif
 /* PMECC & PMERRLOC */
 #define CONFIG_ATMEL_NAND_HWECC
diff --git a/include/configs/sheevaplug.h b/include/configs/sheevaplug.h
index d4c9995d50..74d2ee0300 100644
--- a/include/configs/sheevaplug.h
+++ b/include/configs/sheevaplug.h
@@ -23,7 +23,7 @@
 /*
  * Standard filesystems
  */
-#define CONFIG_SYS_MVFS
+#define CONFIG_BZIP2
 
 /*
  * mv-plug-common.h should be defined after CMD configs since it used them
diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h
index ff7bade632..308d441477 100644
--- a/include/configs/siemens-am33x-common.h
+++ b/include/configs/siemens-am33x-common.h
@@ -67,8 +67,6 @@
 
 #define CONFIG_SYS_LOAD_ADDR		0x81000000 /* Default load address */
 
-#define CONFIG_SPI
-#define CONFIG_MTD_DEVICE
 #define CONFIG_SF_DEFAULT_SPEED		(75000000)
 
  /* Physical Memory Map */
@@ -223,10 +221,6 @@
 /* NAND support */
 #ifdef CONFIG_NAND
 /* UBI Support */
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_MTD_PARTITIONS
-#define CONFIG_MTD_DEVICE
-#endif
 
 /* Commen environment */
 #define CONFIG_PREBOOT
diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h
index 1473002e4f..c8f3196826 100644
--- a/include/configs/smartweb.h
+++ b/include/configs/smartweb.h
@@ -90,17 +90,6 @@
 #define CONFIG_SYS_NAND_ENABLE_PIN	AT91_PIN_PC14
 #define CONFIG_SYS_NAND_READY_PIN	AT91_PIN_PC13
 
-#define CONFIG_MTD_DEVICE
-#define MTDIDS_NAME_STR		"atmel_nand"
-#define MTDIDS_DEFAULT		"nand0=" MTDIDS_NAME_STR
-#define MTDPARTS_DEFAULT	"mtdparts=" MTDIDS_NAME_STR ":" \
-					"128k(Bootstrap),"		\
-					"896k(U-Boot),"	\
-					"512k(ENV0),"	\
-					"512k(ENV1),"	\
-					"4M(Linux),"	\
-					"-(Root-FS)"
-
 /* general purpose I/O */
 #define CONFIG_ATMEL_LEGACY		/* required until (g)pio is fixed */
 #define CONFIG_AT91_GPIO		/* enable the GPIO features */
@@ -149,8 +138,6 @@
 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
 
 /* USB DFU support */
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
 
 #define CONFIG_USB_GADGET_AT91
 
diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h
index 3398b121bf..efcb3d84d3 100644
--- a/include/configs/smdkc100.h
+++ b/include/configs/smdkc100.h
@@ -56,18 +56,6 @@
 /* allow to overwrite serial and ethaddr */
 #define CONFIG_ENV_OVERWRITE
 
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
-
-#define MTDIDS_DEFAULT		"onenand0=s3c-onenand"
-#define MTDPARTS_DEFAULT	"mtdparts=s3c-onenand:256k(bootloader)"\
-				",128k@0x40000(params)"\
-				",3m@0x60000(kernel)"\
-				",16m@0x360000(test)"\
-				",-(UBI)"
-
-#define NORMAL_MTDPARTS_DEFAULT MTDPARTS_DEFAULT
-
 #define CONFIG_BOOTCOMMAND	"run ubifsboot"
 
 #define CONFIG_RAMDISK_BOOT	"root=/dev/ram0 rw rootfstype=ext2" \
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index 9897e11b59..ea0b0b5124 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -180,9 +180,6 @@ unsigned int cm_get_l4_sp_clk_hz(void);
 /* Enable multiple SPI NOR flash manufacturers */
 #ifndef CONFIG_SPL_BUILD
 #define CONFIG_SPI_FLASH_MTD
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
-#define MTDIDS_DEFAULT			"nor0=ff705000.spi.0"
 #endif
 /* QSPI reference clock */
 #ifndef __ASSEMBLY__
diff --git a/include/configs/spear-common.h b/include/configs/spear-common.h
index 349232e1bf..73c65f125b 100644
--- a/include/configs/spear-common.h
+++ b/include/configs/spear-common.h
@@ -86,8 +86,6 @@
 
 /* NAND FLASH Configuration */
 #define CONFIG_SYS_NAND_SELF_INIT
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
 #define CONFIG_NAND_FSMC
 #define CONFIG_SYS_MAX_NAND_DEVICE		1
 #define CONFIG_SYS_NAND_ONFI_DETECTION
diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h
index 5f711d03d8..153d9c2b21 100644
--- a/include/configs/stmark2.h
+++ b/include/configs/stmark2.h
@@ -57,8 +57,6 @@
 #define CONFIG_SYS_MCFRRTC_BASE		0xFC0A8000
 
 /* spi not partitions */
-#define CONFIG_CMD_MTDPARTS
-#define CONFIG_MTD_DEVICE
 #define CONFIG_JFFS2_CMDLINE
 #define CONFIG_JFFS2_DEV		"nor0"
 #define MTDIDS_DEFAULT			"nor0=spi-flash.0"
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index 02d7be0849..ea7ec62892 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -133,9 +133,6 @@
 #define CONFIG_SYS_NAND_MAX_ECCPOS 1664
 #define CONFIG_SYS_NAND_ONFI_DETECTION
 #define CONFIG_SYS_MAX_NAND_DEVICE 8
-
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
 #endif
 
 #ifdef CONFIG_SPL_SPI_SUNXI
diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h
index 3e9803e86e..70ccb6c934 100644
--- a/include/configs/tam3517-common.h
+++ b/include/configs/tam3517-common.h
@@ -204,9 +204,6 @@
 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x80000
 #define CONFIG_SYS_NAND_U_BOOT_SIZE	0x80000
 
-#define CONFIG_MTD_PARTITIONS
-#define CONFIG_MTD_DEVICE
-
 /* Setup MTD for NAND on the SOM */
 #define MTDIDS_DEFAULT		"nand0=omap2-nand.0"
 #define MTDPARTS_DEFAULT	"mtdparts=omap2-nand.0:512k(MLO)," \
diff --git a/include/configs/tao3530.h b/include/configs/tao3530.h
index 743e23cd7f..7b7a4ec0af 100644
--- a/include/configs/tao3530.h
+++ b/include/configs/tao3530.h
@@ -62,11 +62,6 @@
 #define CONFIG_ENV_OVERWRITE
 
 /* commands to include */
-#define CONFIG_MTD_DEVICE	/* needed for mtdparts commands */
-#define MTDIDS_DEFAULT			"nand0=nand"
-#define MTDPARTS_DEFAULT		"mtdparts=nand:512k(x-loader),"\
-					"1920k(u-boot),128k(u-boot-env),"\
-					"4m(kernel),-(fs)"
 
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_OMAP24_I2C_SPEED	100000
diff --git a/include/configs/taurus.h b/include/configs/taurus.h
index 087c81c28a..a44b04bb68 100644
--- a/include/configs/taurus.h
+++ b/include/configs/taurus.h
@@ -107,8 +107,6 @@
 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
 
 /* USB DFU support */
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
 
 #define CONFIG_USB_GADGET_AT91
 
diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h
index 91e139853c..2f42375856 100644
--- a/include/configs/ti_armv7_common.h
+++ b/include/configs/ti_armv7_common.h
@@ -134,9 +134,6 @@
  * mtdparts, both for ease of use in U-Boot and for passing information
  * on to the Linux kernel.
  */
-#if defined(CONFIG_SPI_BOOT) || defined(CONFIG_NOR) || defined(CONFIG_NAND) || defined(CONFIG_NAND_DAVINCI)
-#define CONFIG_MTD_DEVICE		/* Required for mtdparts */
-#endif
 
 #define CONFIG_SUPPORT_RAW_INITRD
 
diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h
index 7d197644fd..85294a27f0 100644
--- a/include/configs/ti_armv7_keystone2.h
+++ b/include/configs/ti_armv7_keystone2.h
@@ -182,11 +182,6 @@
 #define CONFIG_SYS_MAX_NAND_DEVICE		1
 #define CONFIG_SYS_NAND_MAX_CHIPS		1
 #define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
-#define CONFIG_MTD_PARTITIONS
-#define MTDIDS_DEFAULT			"nand0=davinci_nand.0"
-#define MTDPARTS_DEFAULT		"mtdparts=davinci_nand.0:" \
-					"1024k(bootloader)ro,512k(params)ro," \
-					"-(ubifs)"
 
 /* USB Configuration */
 #define CONFIG_USB_XHCI_KEYSTONE
diff --git a/include/configs/titanium.h b/include/configs/titanium.h
index fedd16c87d..4fa50108bc 100644
--- a/include/configs/titanium.h
+++ b/include/configs/titanium.h
@@ -170,7 +170,5 @@
 #endif /* CONFIG_CMD_NAND */
 
 /* UBI/UBIFS config options */
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
 
 #endif			       /* __CONFIG_H */
diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h
index a2bf4220e0..34cf66f229 100644
--- a/include/configs/tricorder.h
+++ b/include/configs/tricorder.h
@@ -72,17 +72,6 @@
 #define CONFIG_TWL4030_LED
 
 /* Board NAND Info */
-#define CONFIG_MTD_DEVICE		/* needed for mtdparts commands */
-#define MTDIDS_DEFAULT			"nand0=omap2-nand.0"
-#define MTDPARTS_DEFAULT		"mtdparts=omap2-nand.0:" \
-						"128k(SPL)," \
-						"1m(u-boot)," \
-						"384k(u-boot-env1)," \
-						"1152k(mtdoops)," \
-						"384k(u-boot-env2)," \
-						"5m(kernel)," \
-						"2m(fdt)," \
-						"-(ubi)"
 
 #define CONFIG_SYS_NAND_ADDR		NAND_BASE	/* physical address */
 							/* to access nand */
@@ -95,8 +84,6 @@
 #define CONFIG_SYS_NAND_MAX_ECCPOS	56
 
 /* needed for ubi */
-#define CONFIG_MTD_DEVICE       /* needed for mtdparts commands */
-#define CONFIG_MTD_PARTITIONS
 
 /* Environment information (this is the common part) */
 
diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h
index 6de8129e0b..8f58a3eb0d 100644
--- a/include/configs/uniphier.h
+++ b/include/configs/uniphier.h
@@ -26,7 +26,6 @@
 #define CONFIG_TIMESTAMP
 
 /* FLASH related */
-#define CONFIG_MTD_DEVICE
 
 #define CONFIG_SMC911X_32_BIT
 /* dummy: referenced by examples/standalone/smc911x_eeprom.c */
diff --git a/include/configs/vct.h b/include/configs/vct.h
index d223bcebf1..2666fa2568 100644
--- a/include/configs/vct.h
+++ b/include/configs/vct.h
@@ -219,16 +219,6 @@ int vct_gpio_get(int pin);
 /*
  * UBI configuration
  */
-#if defined(CONFIG_VCT_ONENAND)
-#define CONFIG_MTD_DEVICE		/* needed for mtdparts commands */
-#define CONFIG_MTD_PARTITIONS
-
-#define MTDIDS_DEFAULT		"onenand0=onenand"
-#define MTDPARTS_DEFAULT	"mtdparts=onenand:128k(u-boot),"	\
-					"128k(env),"		\
-					"20m(kernel),"		\
-					"-(rootfs)"
-#endif
 
 /*
  * We need a small, stripped down image to fit into the first 128k OneNAND
diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h
index 3430f27c40..34cb619114 100644
--- a/include/configs/vf610twr.h
+++ b/include/configs/vf610twr.h
@@ -38,16 +38,6 @@
 #define CONFIG_SYS_NAND_BASE		NFC_BASE_ADDR
 
 /* Dynamic MTD partition support */
-#define CONFIG_MTD_PARTITIONS
-#define CONFIG_MTD_DEVICE
-#define MTDIDS_DEFAULT			"nand0=fsl_nfc"
-#define MTDPARTS_DEFAULT		"mtdparts=fsl_nfc:"		\
-					"128k(vf-bcb)ro,"		\
-					"1408k(u-boot)ro,"		\
-					"512k(u-boot-env),"		\
-					"4m(kernel),"			\
-					"512k(fdt),"		\
-					"-(rootfs)"
 #endif
 
 #define CONFIG_FSL_ESDHC
diff --git a/include/configs/wb45n.h b/include/configs/wb45n.h
index 9e4dee50fd..c9dd3915b0 100644
--- a/include/configs/wb45n.h
+++ b/include/configs/wb45n.h
@@ -55,9 +55,7 @@
 #define CONFIG_PMECC_CAP            4
 #define CONFIG_PMECC_SECTOR_SIZE    512
 
-#define CONFIG_MTD_DEVICE
 #define CONFIG_CMD_MTDPARTS
-#define CONFIG_MTD_PARTITIONS
 #define CONFIG_RBTREE
 #define CONFIG_LZO
 
diff --git a/include/configs/woodburn_common.h b/include/configs/woodburn_common.h
index 8ea5e48483..9794f2d5df 100644
--- a/include/configs/woodburn_common.h
+++ b/include/configs/woodburn_common.h
@@ -126,17 +126,7 @@
 /*
  * MTD Command for mtdparts
  */
-#define CONFIG_MTD_DEVICE
 #define CONFIG_FLASH_CFI_MTD
-#define CONFIG_MTD_PARTITIONS
-#define MTDIDS_DEFAULT		"nand0=mxc_nand,nor0=physmap-flash.0"
-#define MTDPARTS_DEFAULT	"mtdparts=mxc_nand:50m(root1)," \
-				"32m(rootfb)," \
-				"64m(pcache)," \
-				"64m(app1)," \
-				"10m(app2),-(spool);" \
-				"physmap-flash.0:512k(u-boot),64k(env1)," \
-				"64k(env2),3776k(kernel1),3776k(kernel2)"
 
 /*
  * FLASH and environment organization
diff --git a/include/configs/x600.h b/include/configs/x600.h
index dc8ec3663b..602186e86d 100644
--- a/include/configs/x600.h
+++ b/include/configs/x600.h
@@ -66,8 +66,6 @@
 #define CONFIG_NAND_ECC_BCH
 
 /* UBI/UBI config options */
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
 
 /* Ethernet config options */
 #define CONFIG_MII
diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h
index 9cec7f8a2c..92438db0e9 100644
--- a/include/configs/xilinx_zynqmp.h
+++ b/include/configs/xilinx_zynqmp.h
@@ -78,7 +78,6 @@
 #ifdef CONFIG_NAND_ARASAN
 # define CONFIG_SYS_MAX_NAND_DEVICE	1
 # define CONFIG_SYS_NAND_ONFI_DETECTION
-# define CONFIG_MTD_DEVICE
 #endif
 
 /* Miscellaneous configurable options */
diff --git a/include/configs/xilinx_zynqmp_mini.h b/include/configs/xilinx_zynqmp_mini.h
new file mode 100644
index 0000000000..e58e9cecab
--- /dev/null
+++ b/include/configs/xilinx_zynqmp_mini.h
@@ -0,0 +1,35 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Configuration for Xilinx ZynqMP Flash utility
+ *
+ * (C) Copyright 2018 Xilinx, Inc.
+ * Michal Simek <michal.simek@xilinx.com>
+ * Siva Durga Prasad Paladugu <sivadur@xilinx.com>
+ */
+
+#ifndef __CONFIG_ZYNQMP_MINI_H
+#define __CONFIG_ZYNQMP_MINI_H
+
+#define CONFIG_SYS_MEMTEST_SCRATCH     0xfffc0000
+
+#include <configs/xilinx_zynqmp.h>
+
+/* Undef unneeded configs */
+#undef CONFIG_EXTRA_ENV_SETTINGS
+#undef CONFIG_SYS_MALLOC_LEN
+#undef CONFIG_ZLIB
+#undef CONFIG_GZIP
+#undef CONFIG_CMD_ENV
+#undef CONFIG_SYS_INIT_SP_ADDR
+#undef CONFIG_BOOTM_NETBSD
+#undef CONFIG_BOOTM_VXWORKS
+#undef CONFIG_BOOTM_LINUX
+#undef CONFIG_BOARD_LATE_INIT
+
+/* BOOTP options */
+#undef CONFIG_BOOTP_BOOTFILESIZE
+#undef CONFIG_BOOTP_MAY_FAIL
+
+#undef CONFIG_NR_DRAM_BANKS
+
+#endif /* __CONFIG_ZYNQMP_MINI_H */
diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
index b9599c73a6..6f52936cf0 100644
--- a/include/configs/zynq-common.h
+++ b/include/configs/zynq-common.h
@@ -77,7 +77,6 @@
 #ifdef CONFIG_NAND_ZYNQ
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #define CONFIG_SYS_NAND_ONFI_DETECTION
-#define CONFIG_MTD_DEVICE
 #endif
 
 /* MMC */
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 6b455b51ce..439fdcbd4b 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -1467,15 +1467,11 @@ CONFIG_MSHC_FREQ
 CONFIG_MTDMAP
 CONFIG_MTDPARTS
 CONFIG_MTD_CONCAT
-CONFIG_MTD_DEBUG
-CONFIG_MTD_DEBUG_VERBOSE
-CONFIG_MTD_DEVICE
 CONFIG_MTD_ECC_SOFT
 CONFIG_MTD_NAND_MUSEUM_IDS
 CONFIG_MTD_NAND_VERIFY_WRITE
 CONFIG_MTD_ONENAND_VERIFY_WRITE
 CONFIG_MTD_PARTITION
-CONFIG_MTD_PARTITIONS
 CONFIG_MTD_UBI_BEB_RESERVE
 CONFIG_MTD_UBI_BLOCK
 CONFIG_MTD_UBI_DEBUG

commit 02850cebc501c417b9f3ac0e0e3f2c5c50e23ad3
Author: Adam Ford <aford173@gmail.com>
Date:   Sun Jul 8 06:43:36 2018 -0500

    UPSTREAM: Convert CONFIG_NAND_DAVINCI to Kconfig
    
    This converts the following to Kconfig:
       CONFIG_NAND_DAVINCI
    
    Signed-off-by: Adam Ford <aford173@gmail.com>
    
    Change-Id: I3d95031ee5ebaa5e8ac6c03236622089ccf3caee
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit eba7f1ff6c9836931f0ce2812182190862e38b5f)

diff --git a/configs/ea20_defconfig b/configs/ea20_defconfig
index 7c9f78d8d6..fc1f03ce80 100644
--- a/configs/ea20_defconfig
+++ b/configs/ea20_defconfig
@@ -31,6 +31,8 @@ CONFIG_CMD_DIAG=y
 CONFIG_CMD_UBI=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 # CONFIG_MMC is not set
+CONFIG_NAND=y
+CONFIG_NAND_DAVINCI=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SYS_NS16550=y
diff --git a/configs/ipam390_defconfig b/configs/ipam390_defconfig
index e9c82baf76..8823a7b384 100644
--- a/configs/ipam390_defconfig
+++ b/configs/ipam390_defconfig
@@ -32,4 +32,6 @@ CONFIG_CMD_DIAG=y
 CONFIG_CMD_UBI=y
 CONFIG_ENV_IS_IN_NAND=y
 # CONFIG_MMC is not set
+CONFIG_NAND=y
+CONFIG_NAND_DAVINCI=y
 CONFIG_SYS_NS16550=y
diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig
index b6a5282ff4..d67106742b 100644
--- a/configs/k2e_evm_defconfig
+++ b/configs/k2e_evm_defconfig
@@ -35,6 +35,8 @@ CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_TI_AEMIF=y
 # CONFIG_MMC is not set
+CONFIG_NAND=y
+CONFIG_NAND_DAVINCI=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/k2e_hs_evm_defconfig b/configs/k2e_hs_evm_defconfig
index 43f9bd4abd..bf56f9b109 100644
--- a/configs/k2e_hs_evm_defconfig
+++ b/configs/k2e_hs_evm_defconfig
@@ -24,6 +24,8 @@ CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_TI_AEMIF=y
 # CONFIG_MMC is not set
+CONFIG_NAND=y
+CONFIG_NAND_DAVINCI=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig
index 9c8b66d1e1..012c49bc15 100644
--- a/configs/k2g_evm_defconfig
+++ b/configs/k2g_evm_defconfig
@@ -34,6 +34,8 @@ CONFIG_DM=y
 # CONFIG_BLK is not set
 CONFIG_DM_MMC=y
 CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
+CONFIG_NAND_DAVINCI=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
diff --git a/configs/k2g_hs_evm_defconfig b/configs/k2g_hs_evm_defconfig
index 52c1c63141..7948f080f2 100644
--- a/configs/k2g_hs_evm_defconfig
+++ b/configs/k2g_hs_evm_defconfig
@@ -22,6 +22,8 @@ CONFIG_DM=y
 # CONFIG_BLK is not set
 CONFIG_DM_MMC=y
 CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
+CONFIG_NAND_DAVINCI=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig
index bfb95abe32..ffa8287451 100644
--- a/configs/k2hk_evm_defconfig
+++ b/configs/k2hk_evm_defconfig
@@ -35,6 +35,8 @@ CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_TI_AEMIF=y
 # CONFIG_MMC is not set
+CONFIG_NAND=y
+CONFIG_NAND_DAVINCI=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/k2hk_hs_evm_defconfig b/configs/k2hk_hs_evm_defconfig
index f9f2f2712f..eb61d4985d 100644
--- a/configs/k2hk_hs_evm_defconfig
+++ b/configs/k2hk_hs_evm_defconfig
@@ -24,6 +24,8 @@ CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_TI_AEMIF=y
 # CONFIG_MMC is not set
+CONFIG_NAND=y
+CONFIG_NAND_DAVINCI=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig
index 7ab0d47e03..2421d8930d 100644
--- a/configs/k2l_evm_defconfig
+++ b/configs/k2l_evm_defconfig
@@ -35,6 +35,8 @@ CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_TI_AEMIF=y
 # CONFIG_MMC is not set
+CONFIG_NAND=y
+CONFIG_NAND_DAVINCI=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/k2l_hs_evm_defconfig b/configs/k2l_hs_evm_defconfig
new file mode 100644
index 0000000000..0381a7240c
--- /dev/null
+++ b/configs/k2l_hs_evm_defconfig
@@ -0,0 +1,47 @@
+CONFIG_ARM=y
+CONFIG_ARCH_KEYSTONE=y
+CONFIG_TI_SECURE_DEVICE=y
+CONFIG_SYS_TEXT_BASE=0xC000060
+CONFIG_TI_COMMON_CMD_OPTIONS=y
+CONFIG_TARGET_K2L_EVM=y
+CONFIG_DEFAULT_DEVICE_TREE="keystone-k2l-evm"
+CONFIG_FIT_IMAGE_POST_PROCESS=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+CONFIG_VERSION_VARIABLE=y
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_HUSH_PARSER=y
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_GPIO is not set
+# CONFIG_CMD_GPT is not set
+# CONFIG_CMD_MMC is not set
+CONFIG_CMD_NAND=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_MTDIDS_DEFAULT="nand0=davinci_nand.0"
+CONFIG_MTDPARTS_DEFAULT="mtdparts=davinci_nand.0:1024k(bootloader)ro,512k(params)ro,-(ubifs)"
+CONFIG_CMD_UBI=y
+CONFIG_ISO_PARTITION=y
+CONFIG_EFI_PARTITION=y
+CONFIG_OF_CONTROL=y
+CONFIG_ENV_IS_IN_NAND=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_DM=y
+CONFIG_TI_AEMIF=y
+# CONFIG_MMC is not set
+CONFIG_NAND=y
+CONFIG_NAND_DAVINCI=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MARVELL=y
+CONFIG_DM_ETH=y
+CONFIG_DM_SERIAL=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_DAVINCI_SPI=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_STORAGE=y
diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig
index 58b46d7c5a..ca3c6061eb 100644
--- a/configs/omapl138_lcdk_defconfig
+++ b/configs/omapl138_lcdk_defconfig
@@ -28,6 +28,7 @@ CONFIG_CMD_UBI=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_NAND=y
+CONFIG_NAND_DAVINCI=y
 CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
 CONFIG_SYS_NAND_U_BOOT_OFFS=0x28000
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 6cb7c05059..2863ea83b0 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -16,6 +16,12 @@ config NAND_ATMEL
 	  Enable this driver for NAND flash platforms using an Atmel NAND
 	  controller.
 
+config NAND_DAVINCI
+	bool "Support TI Davinci NAND controller"
+	help
+	  Enable this driver for NAND flash controllers available in TI Davinci
+	  and Keystone2 platforms
+
 config NAND_DENALI
 	bool
 	select SYS_NAND_SELF_INIT
diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h
index 4def7d1919..3741f90cfe 100644
--- a/include/configs/da850evm.h
+++ b/include/configs/da850evm.h
@@ -162,7 +162,6 @@
  * Flash & Environment
  */
 #ifdef CONFIG_USE_NAND
-#define CONFIG_NAND_DAVINCI
 #define CONFIG_ENV_OFFSET		0x0 /* Block 0--not used by bootcode */
 #define CONFIG_ENV_SIZE			(128 << 10)
 #define	CONFIG_SYS_NAND_USE_FLASH_BBT
diff --git a/include/configs/ea20.h b/include/configs/ea20.h
index c5e6e9ef72..8bfa5d4d46 100644
--- a/include/configs/ea20.h
+++ b/include/configs/ea20.h
@@ -131,7 +131,6 @@
 #define CONFIG_MTD_DEVICE
 #define CONFIG_MTD_PARTITIONS
 
-#define CONFIG_NAND_DAVINCI
 #define	CONFIG_SYS_NAND_PAGE_2K
 #define CONFIG_SYS_NAND_NO_SUBPAGE
 #define CONFIG_SYS_NAND_CS		2
diff --git a/include/configs/ipam390.h b/include/configs/ipam390.h
index 2bb7d079f6..1d05bf6885 100644
--- a/include/configs/ipam390.h
+++ b/include/configs/ipam390.h
@@ -138,7 +138,6 @@
 /*
  * Flash & Environment
  */
-#define CONFIG_NAND_DAVINCI
 #define CONFIG_ENV_OFFSET		0x0 /* Block 0--not used by bootcode */
 #define CONFIG_ENV_SIZE			(128 << 10)
 #define	CONFIG_SYS_NAND_USE_FLASH_BBT
diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h
index 5dba7d279a..c5f5bcfc93 100644
--- a/include/configs/omapl138_lcdk.h
+++ b/include/configs/omapl138_lcdk.h
@@ -154,7 +154,6 @@
  * Flash & Environment
  */
 #ifdef CONFIG_USE_NAND
-#define CONFIG_NAND_DAVINCI
 #define CONFIG_ENV_OFFSET		0x0 /* Block 0--not used by bootcode */
 #define CONFIG_ENV_SIZE			(128 << 9)
 #define	CONFIG_SYS_NAND_USE_FLASH_BBT
diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h
index 2b2b85d085..7d197644fd 100644
--- a/include/configs/ti_armv7_keystone2.h
+++ b/include/configs/ti_armv7_keystone2.h
@@ -169,7 +169,6 @@
 #define CONFIG_ENV_EEPROM_IS_ON_I2C
 
 /* NAND Configuration */
-#define CONFIG_NAND_DAVINCI
 #define CONFIG_KEYSTONE_RBL_NAND
 #define CONFIG_KEYSTONE_NAND_MAX_RBL_SIZE	CONFIG_ENV_OFFSET
 #define CONFIG_SYS_NAND_MASK_CLE		0x4000
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 71f63068cc..6b455b51ce 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -1545,8 +1545,6 @@ CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC
 CONFIG_NAND_ACTL
 CONFIG_NAND_CS_INIT
 CONFIG_NAND_DATA_REG
-CONFIG_NAND_DAVINCI
-CONFIG_NAND_DENALI_ECC_SIZE
 CONFIG_NAND_ECC_BCH
 CONFIG_NAND_ENV_DST
 CONFIG_NAND_FSL_ELBC

commit 2cce6f5430c3ca3b2b9eafaed874ff104f26b660
Author: Adam Ford <aford173@gmail.com>
Date:   Sun Jul 8 08:11:07 2018 -0500

    UPSTREAM: Convert CONFIG_NAND_ATMEL to Kconfig
    
    This converts the following to Kconfig:
       CONFIG_NAND_ATMEL
    
    Signed-off-by: Adam Ford <aford173@gmail.com>
    
    Change-Id: Ic71bd0ef5704faf04852bf51d265d94e1a8dc259
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit e7db856bf96213ba3f6b716be9fa264e184f74e2)

diff --git a/configs/at91sam9260ek_dataflash_cs0_defconfig b/configs/at91sam9260ek_dataflash_cs0_defconfig
index e3d46dca6a..706481413b 100644
--- a/configs/at91sam9260ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9260ek_dataflash_cs0_defconfig
@@ -32,6 +32,8 @@ CONFIG_CLK_AT91=y
 CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 # CONFIG_MMC is not set
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/at91sam9260ek_dataflash_cs1_defconfig b/configs/at91sam9260ek_dataflash_cs1_defconfig
index b1903c2345..30539ddcbe 100644
--- a/configs/at91sam9260ek_dataflash_cs1_defconfig
+++ b/configs/at91sam9260ek_dataflash_cs1_defconfig
@@ -32,6 +32,8 @@ CONFIG_CLK_AT91=y
 CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 # CONFIG_MMC is not set
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/at91sam9260ek_nandflash_defconfig b/configs/at91sam9260ek_nandflash_defconfig
index 8cd8398685..944f66f590 100644
--- a/configs/at91sam9260ek_nandflash_defconfig
+++ b/configs/at91sam9260ek_nandflash_defconfig
@@ -32,6 +32,8 @@ CONFIG_CLK_AT91=y
 CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 # CONFIG_MMC is not set
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/at91sam9261ek_dataflash_cs0_defconfig b/configs/at91sam9261ek_dataflash_cs0_defconfig
index a11bc91be1..87355b57d6 100644
--- a/configs/at91sam9261ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9261ek_dataflash_cs0_defconfig
@@ -33,6 +33,8 @@ CONFIG_CLK_AT91=y
 CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 # CONFIG_MMC is not set
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/at91sam9261ek_dataflash_cs3_defconfig b/configs/at91sam9261ek_dataflash_cs3_defconfig
index 9cbf767107..74dfa665e7 100644
--- a/configs/at91sam9261ek_dataflash_cs3_defconfig
+++ b/configs/at91sam9261ek_dataflash_cs3_defconfig
@@ -33,6 +33,8 @@ CONFIG_CLK_AT91=y
 CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 # CONFIG_MMC is not set
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/at91sam9261ek_nandflash_defconfig b/configs/at91sam9261ek_nandflash_defconfig
index b374cc5780..dffcdcfadb 100644
--- a/configs/at91sam9261ek_nandflash_defconfig
+++ b/configs/at91sam9261ek_nandflash_defconfig
@@ -33,6 +33,8 @@ CONFIG_CLK_AT91=y
 CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 # CONFIG_MMC is not set
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/at91sam9263ek_dataflash_cs0_defconfig b/configs/at91sam9263ek_dataflash_cs0_defconfig
index 20c07848ca..c17c5d8f70 100644
--- a/configs/at91sam9263ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9263ek_dataflash_cs0_defconfig
@@ -37,6 +37,8 @@ CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/at91sam9263ek_dataflash_defconfig b/configs/at91sam9263ek_dataflash_defconfig
index 20c07848ca..c17c5d8f70 100644
--- a/configs/at91sam9263ek_dataflash_defconfig
+++ b/configs/at91sam9263ek_dataflash_defconfig
@@ -37,6 +37,8 @@ CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/at91sam9263ek_nandflash_defconfig b/configs/at91sam9263ek_nandflash_defconfig
index 3c3fda6207..09169a1c9e 100644
--- a/configs/at91sam9263ek_nandflash_defconfig
+++ b/configs/at91sam9263ek_nandflash_defconfig
@@ -37,6 +37,8 @@ CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/at91sam9263ek_norflash_boot_defconfig b/configs/at91sam9263ek_norflash_boot_defconfig
index edfa0ef02f..50de3c8627 100644
--- a/configs/at91sam9263ek_norflash_boot_defconfig
+++ b/configs/at91sam9263ek_norflash_boot_defconfig
@@ -36,6 +36,8 @@ CONFIG_AT91_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/at91sam9263ek_norflash_defconfig b/configs/at91sam9263ek_norflash_defconfig
index 579082d242..ffd8ca9a74 100644
--- a/configs/at91sam9263ek_norflash_defconfig
+++ b/configs/at91sam9263ek_norflash_defconfig
@@ -36,6 +36,8 @@ CONFIG_AT91_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/at91sam9g10ek_dataflash_cs0_defconfig b/configs/at91sam9g10ek_dataflash_cs0_defconfig
index 7aeccaff4a..4fd5ff575c 100644
--- a/configs/at91sam9g10ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9g10ek_dataflash_cs0_defconfig
@@ -33,6 +33,8 @@ CONFIG_CLK_AT91=y
 CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 # CONFIG_MMC is not set
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/at91sam9g10ek_dataflash_cs3_defconfig b/configs/at91sam9g10ek_dataflash_cs3_defconfig
index 2dfaa9ba2a..58a034afea 100644
--- a/configs/at91sam9g10ek_dataflash_cs3_defconfig
+++ b/configs/at91sam9g10ek_dataflash_cs3_defconfig
@@ -33,6 +33,8 @@ CONFIG_CLK_AT91=y
 CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 # CONFIG_MMC is not set
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/at91sam9g10ek_nandflash_defconfig b/configs/at91sam9g10ek_nandflash_defconfig
index 6ae7065cba..8c5925b45c 100644
--- a/configs/at91sam9g10ek_nandflash_defconfig
+++ b/configs/at91sam9g10ek_nandflash_defconfig
@@ -33,6 +33,8 @@ CONFIG_CLK_AT91=y
 CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 # CONFIG_MMC is not set
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/at91sam9g20ek_2mmc_defconfig b/configs/at91sam9g20ek_2mmc_defconfig
index bf0b6b1724..4ea6a980aa 100644
--- a/configs/at91sam9g20ek_2mmc_defconfig
+++ b/configs/at91sam9g20ek_2mmc_defconfig
@@ -34,6 +34,8 @@ CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/at91sam9g20ek_2mmc_nandflash_defconfig b/configs/at91sam9g20ek_2mmc_nandflash_defconfig
index cf03371c72..b274729e8f 100644
--- a/configs/at91sam9g20ek_2mmc_nandflash_defconfig
+++ b/configs/at91sam9g20ek_2mmc_nandflash_defconfig
@@ -34,6 +34,8 @@ CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/at91sam9g20ek_dataflash_cs0_defconfig b/configs/at91sam9g20ek_dataflash_cs0_defconfig
index 8d40bd0b36..351bccc1b8 100644
--- a/configs/at91sam9g20ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9g20ek_dataflash_cs0_defconfig
@@ -32,6 +32,8 @@ CONFIG_CLK_AT91=y
 CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 # CONFIG_MMC is not set
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/at91sam9g20ek_dataflash_cs1_defconfig b/configs/at91sam9g20ek_dataflash_cs1_defconfig
index f68ed71910..7240d819e1 100644
--- a/configs/at91sam9g20ek_dataflash_cs1_defconfig
+++ b/configs/at91sam9g20ek_dataflash_cs1_defconfig
@@ -32,6 +32,8 @@ CONFIG_CLK_AT91=y
 CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 # CONFIG_MMC is not set
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/at91sam9g20ek_nandflash_defconfig b/configs/at91sam9g20ek_nandflash_defconfig
index e8d0278828..c0483d8d22 100644
--- a/configs/at91sam9g20ek_nandflash_defconfig
+++ b/configs/at91sam9g20ek_nandflash_defconfig
@@ -32,6 +32,8 @@ CONFIG_CLK_AT91=y
 CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 # CONFIG_MMC is not set
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/at91sam9m10g45ek_mmc_defconfig b/configs/at91sam9m10g45ek_mmc_defconfig
index e0e37c4f99..c5dc5e8512 100644
--- a/configs/at91sam9m10g45ek_mmc_defconfig
+++ b/configs/at91sam9m10g45ek_mmc_defconfig
@@ -37,6 +37,8 @@ CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_ETH=y
 CONFIG_MACB=y
 CONFIG_PINCTRL=y
diff --git a/configs/at91sam9m10g45ek_nandflash_defconfig b/configs/at91sam9m10g45ek_nandflash_defconfig
index 3d73f83262..8fdd1c86d5 100644
--- a/configs/at91sam9m10g45ek_nandflash_defconfig
+++ b/configs/at91sam9m10g45ek_nandflash_defconfig
@@ -37,6 +37,8 @@ CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_ETH=y
 CONFIG_MACB=y
 CONFIG_PINCTRL=y
diff --git a/configs/at91sam9n12ek_mmc_defconfig b/configs/at91sam9n12ek_mmc_defconfig
index 4c554f260d..fb43b68c22 100644
--- a/configs/at91sam9n12ek_mmc_defconfig
+++ b/configs/at91sam9n12ek_mmc_defconfig
@@ -34,6 +34,8 @@ CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/at91sam9n12ek_nandflash_defconfig b/configs/at91sam9n12ek_nandflash_defconfig
index 19053b43a0..1bb2545809 100644
--- a/configs/at91sam9n12ek_nandflash_defconfig
+++ b/configs/at91sam9n12ek_nandflash_defconfig
@@ -34,6 +34,8 @@ CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/at91sam9n12ek_spiflash_defconfig b/configs/at91sam9n12ek_spiflash_defconfig
index 8a4d836843..021994267b 100644
--- a/configs/at91sam9n12ek_spiflash_defconfig
+++ b/configs/at91sam9n12ek_spiflash_defconfig
@@ -34,6 +34,8 @@ CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/at91sam9rlek_dataflash_defconfig b/configs/at91sam9rlek_dataflash_defconfig
index a06186c065..c5c1f69669 100644
--- a/configs/at91sam9rlek_dataflash_defconfig
+++ b/configs/at91sam9rlek_dataflash_defconfig
@@ -37,6 +37,8 @@ CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/at91sam9rlek_mmc_defconfig b/configs/at91sam9rlek_mmc_defconfig
index 0f59c7c29e..9d3bb70d29 100644
--- a/configs/at91sam9rlek_mmc_defconfig
+++ b/configs/at91sam9rlek_mmc_defconfig
@@ -37,6 +37,8 @@ CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/at91sam9rlek_nandflash_defconfig b/configs/at91sam9rlek_nandflash_defconfig
index d690358cd9..431214b1da 100644
--- a/configs/at91sam9rlek_nandflash_defconfig
+++ b/configs/at91sam9rlek_nandflash_defconfig
@@ -37,6 +37,8 @@ CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/at91sam9x5ek_dataflash_defconfig b/configs/at91sam9x5ek_dataflash_defconfig
index b82b0a714c..4e17b1c4f0 100644
--- a/configs/at91sam9x5ek_dataflash_defconfig
+++ b/configs/at91sam9x5ek_dataflash_defconfig
@@ -38,6 +38,8 @@ CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/at91sam9x5ek_mmc_defconfig b/configs/at91sam9x5ek_mmc_defconfig
index 72c5550692..af042ab7bb 100644
--- a/configs/at91sam9x5ek_mmc_defconfig
+++ b/configs/at91sam9x5ek_mmc_defconfig
@@ -38,6 +38,8 @@ CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/at91sam9x5ek_nandflash_defconfig b/configs/at91sam9x5ek_nandflash_defconfig
index 21f5bcbc2d..97b1bc0995 100644
--- a/configs/at91sam9x5ek_nandflash_defconfig
+++ b/configs/at91sam9x5ek_nandflash_defconfig
@@ -38,6 +38,8 @@ CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/at91sam9x5ek_spiflash_defconfig b/configs/at91sam9x5ek_spiflash_defconfig
index 8880fc97d8..a05f985cb1 100644
--- a/configs/at91sam9x5ek_spiflash_defconfig
+++ b/configs/at91sam9x5ek_spiflash_defconfig
@@ -38,6 +38,8 @@ CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/at91sam9xeek_dataflash_cs0_defconfig b/configs/at91sam9xeek_dataflash_cs0_defconfig
index 1478997f49..328bf0ddec 100644
--- a/configs/at91sam9xeek_dataflash_cs0_defconfig
+++ b/configs/at91sam9xeek_dataflash_cs0_defconfig
@@ -32,6 +32,8 @@ CONFIG_CLK_AT91=y
 CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 # CONFIG_MMC is not set
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/at91sam9xeek_dataflash_cs1_defconfig b/configs/at91sam9xeek_dataflash_cs1_defconfig
index 7892cc358a..bfb6867d83 100644
--- a/configs/at91sam9xeek_dataflash_cs1_defconfig
+++ b/configs/at91sam9xeek_dataflash_cs1_defconfig
@@ -32,6 +32,8 @@ CONFIG_CLK_AT91=y
 CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 # CONFIG_MMC is not set
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/at91sam9xeek_nandflash_defconfig b/configs/at91sam9xeek_nandflash_defconfig
index 9451db37a9..af5231ae7f 100644
--- a/configs/at91sam9xeek_nandflash_defconfig
+++ b/configs/at91sam9xeek_nandflash_defconfig
@@ -32,6 +32,8 @@ CONFIG_CLK_AT91=y
 CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 # CONFIG_MMC is not set
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/axm_defconfig b/configs/axm_defconfig
index 81654b2304..0b837d9ffd 100644
--- a/configs/axm_defconfig
+++ b/configs/axm_defconfig
@@ -37,6 +37,8 @@ CONFIG_OF_CONTROL=y
 CONFIG_OF_EMBED=y
 CONFIG_ENV_IS_IN_NAND=y
 # CONFIG_MMC is not set
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
diff --git a/configs/corvus_defconfig b/configs/corvus_defconfig
index 705e001457..61f6dbd477 100644
--- a/configs/corvus_defconfig
+++ b/configs/corvus_defconfig
@@ -42,6 +42,8 @@ CONFIG_CLK_AT91=y
 CONFIG_AT91_UTMI=y
 CONFIG_DFU_NAND=y
 # CONFIG_MMC is not set
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_PHYLIB=y
 # CONFIG_SPL_DM_SERIAL is not set
 CONFIG_ATMEL_USART=y
diff --git a/configs/ethernut5_defconfig b/configs/ethernut5_defconfig
index e5fb0d2215..fc2b777d04 100644
--- a/configs/ethernut5_defconfig
+++ b/configs/ethernut5_defconfig
@@ -45,6 +45,8 @@ CONFIG_CLK_AT91=y
 CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/gurnard_defconfig b/configs/gurnard_defconfig
index f5dc29e89a..09ca2683b1 100644
--- a/configs/gurnard_defconfig
+++ b/configs/gurnard_defconfig
@@ -23,6 +23,8 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_FAT=y
 CONFIG_OF_CONTROL=y
 CONFIG_ENV_IS_IN_NAND=y
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_PHYLIB=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/meesc_defconfig b/configs/meesc_defconfig
index 7eca4d47ff..cba557db75 100644
--- a/configs/meesc_defconfig
+++ b/configs/meesc_defconfig
@@ -26,6 +26,8 @@ CONFIG_CLK_AT91=y
 CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 # CONFIG_MMC is not set
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/pm9261_defconfig b/configs/pm9261_defconfig
index 8b2f405e26..65e8967f39 100644
--- a/configs/pm9261_defconfig
+++ b/configs/pm9261_defconfig
@@ -33,6 +33,8 @@ CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/pm9263_defconfig b/configs/pm9263_defconfig
index 21f57cb802..f108a324f0 100644
--- a/configs/pm9263_defconfig
+++ b/configs/pm9263_defconfig
@@ -33,6 +33,8 @@ CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/pm9g45_defconfig b/configs/pm9g45_defconfig
index e86b09cf05..6fb35b2167 100644
--- a/configs/pm9g45_defconfig
+++ b/configs/pm9g45_defconfig
@@ -22,5 +22,7 @@ CONFIG_CMD_CACHE=y
 CONFIG_CMD_JFFS2=y
 CONFIG_ENV_IS_IN_NAND=y
 # CONFIG_MMC is not set
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/sama5d2_ptc_ek_mmc_defconfig b/configs/sama5d2_ptc_ek_mmc_defconfig
new file mode 100644
index 0000000000..27606be8ba
--- /dev/null
+++ b/configs/sama5d2_ptc_ek_mmc_defconfig
@@ -0,0 +1,63 @@
+CONFIG_ARM=y
+CONFIG_ARCH_AT91=y
+CONFIG_SYS_TEXT_BASE=0x26f00000
+CONFIG_TARGET_SAMA5D2_PTC_EK=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_BASE=0xf801c000
+CONFIG_DEBUG_UART_CLOCK=82000000
+CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_ptc_ek"
+CONFIG_DEBUG_UART=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_FIT=y
+CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2"
+CONFIG_SD_BOOT=y
+CONFIG_BOOTDELAY=3
+CONFIG_CONSOLE_MUX=y
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_DM=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_CLK=y
+CONFIG_CLK_AT91=y
+CONFIG_AT91_UTMI=y
+CONFIG_AT91_H32MX=y
+CONFIG_AT91_GENERIC_CLK=y
+CONFIG_DM_GPIO=y
+CONFIG_ATMEL_PIO4=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_AT91=y
+CONFIG_I2C_EEPROM=y
+CONFIG_DM_MMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ATMEL=y
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
+CONFIG_DM_ETH=y
+CONFIG_MACB=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_AT91PIO4=y
+CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART_ATMEL=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_ATMEL_USART=y
+CONFIG_TIMER=y
+CONFIG_ATMEL_PIT_TIMER=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_STORAGE=y
diff --git a/configs/sama5d2_ptc_ek_nandflash_defconfig b/configs/sama5d2_ptc_ek_nandflash_defconfig
new file mode 100644
index 0000000000..b4a7376197
--- /dev/null
+++ b/configs/sama5d2_ptc_ek_nandflash_defconfig
@@ -0,0 +1,63 @@
+CONFIG_ARM=y
+CONFIG_ARCH_AT91=y
+CONFIG_SYS_TEXT_BASE=0x26f00000
+CONFIG_TARGET_SAMA5D2_PTC_EK=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_BASE=0xf801c000
+CONFIG_DEBUG_UART_CLOCK=82000000
+CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_ptc_ek"
+CONFIG_DEBUG_UART=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_FIT=y
+CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2"
+CONFIG_NAND_BOOT=y
+CONFIG_BOOTDELAY=3
+CONFIG_CONSOLE_MUX=y
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_ENV_IS_IN_NAND=y
+CONFIG_DM=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_CLK=y
+CONFIG_CLK_AT91=y
+CONFIG_AT91_UTMI=y
+CONFIG_AT91_H32MX=y
+CONFIG_AT91_GENERIC_CLK=y
+CONFIG_DM_GPIO=y
+CONFIG_ATMEL_PIO4=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_AT91=y
+CONFIG_I2C_EEPROM=y
+CONFIG_DM_MMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ATMEL=y
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
+CONFIG_DM_ETH=y
+CONFIG_MACB=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_AT91PIO4=y
+CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART_ATMEL=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_ATMEL_USART=y
+CONFIG_TIMER=y
+CONFIG_ATMEL_PIT_TIMER=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_STORAGE=y
diff --git a/configs/sama5d36ek_cmp_mmc_defconfig b/configs/sama5d36ek_cmp_mmc_defconfig
index e517a38377..ed4d4d1192 100644
--- a/configs/sama5d36ek_cmp_mmc_defconfig
+++ b/configs/sama5d36ek_cmp_mmc_defconfig
@@ -37,6 +37,8 @@ CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/sama5d36ek_cmp_nandflash_defconfig b/configs/sama5d36ek_cmp_nandflash_defconfig
index c02cc04bc2..4460d68672 100644
--- a/configs/sama5d36ek_cmp_nandflash_defconfig
+++ b/configs/sama5d36ek_cmp_nandflash_defconfig
@@ -37,6 +37,8 @@ CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/sama5d36ek_cmp_spiflash_defconfig b/configs/sama5d36ek_cmp_spiflash_defconfig
index fd2ce15bb7..259a063b85 100644
--- a/configs/sama5d36ek_cmp_spiflash_defconfig
+++ b/configs/sama5d36ek_cmp_spiflash_defconfig
@@ -37,6 +37,8 @@ CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/sama5d3_xplained_mmc_defconfig b/configs/sama5d3_xplained_mmc_defconfig
index 99c4d5a808..ec2099e324 100644
--- a/configs/sama5d3_xplained_mmc_defconfig
+++ b/configs/sama5d3_xplained_mmc_defconfig
@@ -54,6 +54,8 @@ CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_ETH=y
 CONFIG_MACB=y
 CONFIG_PINCTRL=y
diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig
index 904c31b27d..a46b118297 100644
--- a/configs/sama5d3_xplained_nandflash_defconfig
+++ b/configs/sama5d3_xplained_nandflash_defconfig
@@ -51,6 +51,8 @@ CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_ETH=y
 CONFIG_MACB=y
 CONFIG_PINCTRL=y
diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig
index afb7a51feb..11a91924a3 100644
--- a/configs/sama5d3xek_mmc_defconfig
+++ b/configs/sama5d3xek_mmc_defconfig
@@ -55,6 +55,8 @@ CONFIG_AT91_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig
index 6bc0f51698..6ab44af029 100644
--- a/configs/sama5d3xek_nandflash_defconfig
+++ b/configs/sama5d3xek_nandflash_defconfig
@@ -50,6 +50,8 @@ CONFIG_AT91_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig
index c225e09111..19950d0b2d 100644
--- a/configs/sama5d3xek_spiflash_defconfig
+++ b/configs/sama5d3xek_spiflash_defconfig
@@ -51,6 +51,8 @@ CONFIG_AT91_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/sama5d4_xplained_mmc_defconfig b/configs/sama5d4_xplained_mmc_defconfig
index 0c2b63dab9..d357062724 100644
--- a/configs/sama5d4_xplained_mmc_defconfig
+++ b/configs/sama5d4_xplained_mmc_defconfig
@@ -49,6 +49,8 @@ CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig
index 3a2dcb12b9..305eaeb3d7 100644
--- a/configs/sama5d4_xplained_nandflash_defconfig
+++ b/configs/sama5d4_xplained_nandflash_defconfig
@@ -46,6 +46,8 @@ CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/sama5d4_xplained_spiflash_defconfig b/configs/sama5d4_xplained_spiflash_defconfig
index d82a4cddf2..d7ac9a1c0a 100644
--- a/configs/sama5d4_xplained_spiflash_defconfig
+++ b/configs/sama5d4_xplained_spiflash_defconfig
@@ -48,6 +48,8 @@ CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/sama5d4ek_mmc_defconfig b/configs/sama5d4ek_mmc_defconfig
index 10c8d0965e..a184925a8e 100644
--- a/configs/sama5d4ek_mmc_defconfig
+++ b/configs/sama5d4ek_mmc_defconfig
@@ -52,6 +52,8 @@ CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/sama5d4ek_nandflash_defconfig b/configs/sama5d4ek_nandflash_defconfig
index 39ff60db8b..bbfa18cdcd 100644
--- a/configs/sama5d4ek_nandflash_defconfig
+++ b/configs/sama5d4ek_nandflash_defconfig
@@ -49,6 +49,8 @@ CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/sama5d4ek_spiflash_defconfig b/configs/sama5d4ek_spiflash_defconfig
index 4f848b9175..3119e87022 100644
--- a/configs/sama5d4ek_spiflash_defconfig
+++ b/configs/sama5d4ek_spiflash_defconfig
@@ -48,6 +48,8 @@ CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/smartweb_defconfig b/configs/smartweb_defconfig
index accdd5da88..060a1666ec 100644
--- a/configs/smartweb_defconfig
+++ b/configs/smartweb_defconfig
@@ -42,6 +42,8 @@ CONFIG_CLK=y
 CONFIG_CLK_AT91=y
 CONFIG_DFU_NAND=y
 # CONFIG_MMC is not set
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_PHYLIB=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
diff --git a/configs/snapper9260_defconfig b/configs/snapper9260_defconfig
index 871290157e..a1c779805b 100644
--- a/configs/snapper9260_defconfig
+++ b/configs/snapper9260_defconfig
@@ -28,5 +28,7 @@ CONFIG_CMD_FAT=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_CMD_PCA953X=y
 # CONFIG_MMC is not set
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/snapper9g20_defconfig b/configs/snapper9g20_defconfig
index 93faa77baf..0e06c7b09f 100644
--- a/configs/snapper9g20_defconfig
+++ b/configs/snapper9g20_defconfig
@@ -27,5 +27,7 @@ CONFIG_CMD_FAT=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_CMD_PCA953X=y
 # CONFIG_MMC is not set
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/taurus_defconfig b/configs/taurus_defconfig
index 71a382a3e1..74df16026f 100644
--- a/configs/taurus_defconfig
+++ b/configs/taurus_defconfig
@@ -47,6 +47,8 @@ CONFIG_CLK=y
 CONFIG_CLK_AT91=y
 CONFIG_DFU_NAND=y
 # CONFIG_MMC is not set
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
diff --git a/configs/usb_a9263_dataflash_defconfig b/configs/usb_a9263_dataflash_defconfig
index d49c68b2b5..527cec4723 100644
--- a/configs/usb_a9263_dataflash_defconfig
+++ b/configs/usb_a9263_dataflash_defconfig
@@ -30,6 +30,8 @@ CONFIG_CLK_AT91=y
 CONFIG_DM_GPIO=y
 CONFIG_AT91_GPIO=y
 # CONFIG_MMC is not set
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/configs/wb45n_defconfig b/configs/wb45n_defconfig
new file mode 100644
index 0000000000..f52d46ebe9
--- /dev/null
+++ b/configs/wb45n_defconfig
@@ -0,0 +1,29 @@
+CONFIG_ARM=y
+CONFIG_ARCH_AT91=y
+CONFIG_SYS_TEXT_BASE=0x23f00000
+CONFIG_TARGET_WB45N=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9X5,SYS_USE_NANDFLASH"
+CONFIG_BOOTDELAY=3
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_MEMTEST=y
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_ENV_IS_IN_NAND=y
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
+CONFIG_LZMA=y
+CONFIG_OF_LIBFDT=y
diff --git a/configs/wb50n_defconfig b/configs/wb50n_defconfig
new file mode 100644
index 0000000000..ea27852df7
--- /dev/null
+++ b/configs/wb50n_defconfig
@@ -0,0 +1,34 @@
+CONFIG_ARM=y
+CONFIG_ARCH_AT91=y
+CONFIG_SYS_TEXT_BASE=0x23f00000
+CONFIG_TARGET_WB50N=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_NANDFLASH"
+CONFIG_BOOTDELAY=3
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_ALT_MEMTEST=y
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_ENV_IS_IN_NAND=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_NAND=y
+CONFIG_NAND_ATMEL=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
+CONFIG_LZMA=y
+CONFIG_OF_LIBFDT=y
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 8a4ab8b5a9..6cb7c05059 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -9,6 +9,13 @@ config SYS_NAND_SELF_INIT
 	  This option, if enabled, provides more flexible and linux-like
 	  NAND initialization process.
 
+config NAND_ATMEL
+	bool "Support Atmel NAND controller"
+	imply SYS_NAND_USE_FLASH_BBT
+	help
+	  Enable this driver for NAND flash platforms using an Atmel NAND
+	  controller.
+
 config NAND_DENALI
 	bool
 	select SYS_NAND_SELF_INIT
diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h
index ea7478b70d..e9a14f8e36 100644
--- a/include/configs/at91sam9260ek.h
+++ b/include/configs/at91sam9260ek.h
@@ -95,7 +95,6 @@
 
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
-#define CONFIG_NAND_ATMEL
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
 #define CONFIG_SYS_NAND_DBW_8
diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h
index 39e4b38052..b35fbe6e13 100644
--- a/include/configs/at91sam9261ek.h
+++ b/include/configs/at91sam9261ek.h
@@ -64,7 +64,6 @@
 
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
-#define CONFIG_NAND_ATMEL
 #define CONFIG_SYS_MAX_NAND_DEVICE		1
 #define CONFIG_SYS_NAND_BASE			0x40000000
 #define CONFIG_SYS_NAND_DBW_8
diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h
index 9431777384..5bb91927ca 100644
--- a/include/configs/at91sam9263ek.h
+++ b/include/configs/at91sam9263ek.h
@@ -202,7 +202,6 @@
 
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
-#define CONFIG_NAND_ATMEL
 #define CONFIG_SYS_MAX_NAND_DEVICE		1
 #define CONFIG_SYS_NAND_BASE			ATMEL_BASE_CS3
 #define CONFIG_SYS_NAND_DBW_8			1
diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h
index 22db94772d..b333cf60f0 100644
--- a/include/configs/at91sam9m10g45ek.h
+++ b/include/configs/at91sam9m10g45ek.h
@@ -60,7 +60,6 @@
 
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
-#define CONFIG_NAND_ATMEL
 #define CONFIG_SYS_MAX_NAND_DEVICE		1
 #define CONFIG_SYS_NAND_BASE			ATMEL_BASE_CS3
 #define CONFIG_SYS_NAND_DBW_8
diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h
index 7d70d8892a..2c71c5bd19 100644
--- a/include/configs/at91sam9n12ek.h
+++ b/include/configs/at91sam9n12ek.h
@@ -64,7 +64,6 @@
 
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
-#define CONFIG_NAND_ATMEL
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #define CONFIG_SYS_NAND_BASE		0x40000000
 #define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h
index c08fb2e2f2..39f441101f 100644
--- a/include/configs/at91sam9rlek.h
+++ b/include/configs/at91sam9rlek.h
@@ -55,7 +55,6 @@
 
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
-#define CONFIG_NAND_ATMEL
 #define CONFIG_SYS_MAX_NAND_DEVICE		1
 #define CONFIG_SYS_NAND_BASE			ATMEL_BASE_CS3
 #define CONFIG_SYS_NAND_DBW_8			1
diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h
index c50e0b816f..735aaa9983 100644
--- a/include/configs/at91sam9x5ek.h
+++ b/include/configs/at91sam9x5ek.h
@@ -65,7 +65,6 @@
 
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
-#define CONFIG_NAND_ATMEL
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #define CONFIG_SYS_NAND_BASE		0x40000000
 #define CONFIG_SYS_NAND_DBW_8		1
diff --git a/include/configs/corvus.h b/include/configs/corvus.h
index cc671f25a8..c930113390 100644
--- a/include/configs/corvus.h
+++ b/include/configs/corvus.h
@@ -70,7 +70,6 @@
 
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
-#define CONFIG_NAND_ATMEL
 #define CONFIG_SYS_MAX_NAND_DEVICE		1
 #define CONFIG_SYS_NAND_BASE			ATMEL_BASE_CS3
 #define CONFIG_SYS_NAND_DBW_8
diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h
index 9bf35328c6..9c989bba8b 100644
--- a/include/configs/ethernut5.h
+++ b/include/configs/ethernut5.h
@@ -68,7 +68,6 @@
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #define CONFIG_SYS_NAND_BASE		0x40000000
 #define CONFIG_SYS_NAND_DBW_8
-#define CONFIG_NAND_ATMEL
 /* our ALE is AD21 */
 #define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
 /* our CLE is AD22 */
diff --git a/include/configs/meesc.h b/include/configs/meesc.h
index 15402217b4..11e9dafd13 100644
--- a/include/configs/meesc.h
+++ b/include/configs/meesc.h
@@ -82,7 +82,6 @@
 
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
-# define CONFIG_NAND_ATMEL
 # define CONFIG_SYS_MAX_NAND_DEVICE		1
 # define CONFIG_SYS_NAND_BASE			ATMEL_BASE_CS3 /* 0x40000000 */
 # define CONFIG_SYS_NAND_DBW_8
diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h
index 51a72a46b0..bd0be3fece 100644
--- a/include/configs/pm9261.h
+++ b/include/configs/pm9261.h
@@ -165,7 +165,6 @@
 #define PHYS_SDRAM_SIZE				0x04000000	/* 64 megs */
 
 /* NAND flash */
-#define CONFIG_NAND_ATMEL
 #define CONFIG_SYS_MAX_NAND_DEVICE		1
 #define CONFIG_SYS_NAND_BASE			0x40000000
 #define CONFIG_SYS_NAND_DBW_8			1
diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h
index 8edd8cae4c..b747922716 100644
--- a/include/configs/pm9263.h
+++ b/include/configs/pm9263.h
@@ -188,7 +188,6 @@
 
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
-#define CONFIG_NAND_ATMEL
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #define CONFIG_SYS_NAND_BASE		0x40000000
 #define CONFIG_SYS_NAND_DBW_8		1
diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h
index e11c67fc1c..b281f502b4 100644
--- a/include/configs/pm9g45.h
+++ b/include/configs/pm9g45.h
@@ -77,7 +77,6 @@
 
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
-#define CONFIG_NAND_ATMEL
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #define CONFIG_SYS_NAND_BASE		0x40000000
 #define CONFIG_SYS_NAND_DBW_8		1
diff --git a/include/configs/sama5d2_ptc_ek.h b/include/configs/sama5d2_ptc_ek.h
new file mode 100644
index 0000000000..d2d4adbb7f
--- /dev/null
+++ b/include/configs/sama5d2_ptc_ek.h
@@ -0,0 +1,44 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Configuration file for the SAMA5D2 PTC EK Board.
+ *
+ * Copyright (C) 2017 Microchip Technology Inc.
+ *		      Wenyou Yang <wenyou.yang@microchip.com>
+ *		      Ludovic Desroches <ludovic.desroches@microchip.com>
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include "at91-sama5_common.h"
+
+#undef CONFIG_SYS_AT91_MAIN_CLOCK
+#define CONFIG_SYS_AT91_MAIN_CLOCK      24000000 /* from 24 MHz crystal */
+
+#define CONFIG_MISC_INIT_R
+
+/* SDRAM */
+#define CONFIG_NR_DRAM_BANKS		1
+#define CONFIG_SYS_SDRAM_BASE		0x20000000
+#define CONFIG_SYS_SDRAM_SIZE		0x20000000
+
+#define CONFIG_SYS_INIT_SP_ADDR \
+	(CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
+
+#define CONFIG_SYS_LOAD_ADDR		0x22000000 /* load address */
+
+/* NAND Flash */
+#ifdef CONFIG_CMD_NAND
+#define CONFIG_SYS_MAX_NAND_DEVICE	1
+#define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
+/* our ALE is AD21 */
+#define CONFIG_SYS_NAND_MASK_ALE	BIT(21)
+/* our CLE is AD22 */
+#define CONFIG_SYS_NAND_MASK_CLE	BIT(22)
+#define CONFIG_SYS_NAND_ONFI_DETECTION
+/* PMECC & PMERRLOC */
+#define CONFIG_ATMEL_NAND_HWECC
+#define CONFIG_ATMEL_NAND_HW_PMECC
+#endif
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/sama5d3_xplained.h b/include/configs/sama5d3_xplained.h
index 05600c81ff..c97518eada 100644
--- a/include/configs/sama5d3_xplained.h
+++ b/include/configs/sama5d3_xplained.h
@@ -37,7 +37,6 @@
 
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
-#define CONFIG_NAND_ATMEL
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
 /* our ALE is AD21 */
diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h
index 29b7e8b50a..d9dec0baa0 100644
--- a/include/configs/sama5d3xek.h
+++ b/include/configs/sama5d3xek.h
@@ -70,7 +70,6 @@
 
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
-#define CONFIG_NAND_ATMEL
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
 /* our ALE is AD21 */
diff --git a/include/configs/sama5d4_xplained.h b/include/configs/sama5d4_xplained.h
index c8462b0b64..ccf47f3264 100644
--- a/include/configs/sama5d4_xplained.h
+++ b/include/configs/sama5d4_xplained.h
@@ -32,7 +32,6 @@
 
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
-#define CONFIG_NAND_ATMEL
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
 /* our ALE is AD21 */
diff --git a/include/configs/sama5d4ek.h b/include/configs/sama5d4ek.h
index fc16ed0420..dd567f93c8 100644
--- a/include/configs/sama5d4ek.h
+++ b/include/configs/sama5d4ek.h
@@ -32,7 +32,6 @@
 
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
-#define CONFIG_NAND_ATMEL
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
 /* our ALE is AD21 */
diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h
index 4cbc903098..1473002e4f 100644
--- a/include/configs/smartweb.h
+++ b/include/configs/smartweb.h
@@ -82,7 +82,6 @@
 	ROUND(3 * CONFIG_ENV_SIZE + (4 * SZ_1M), 0x1000)
 
 /* NAND flash settings */
-#define CONFIG_NAND_ATMEL
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
 #define CONFIG_SYS_NAND_DBW_8
diff --git a/include/configs/snapper9260.h b/include/configs/snapper9260.h
index b4ac12e0f5..4ceafcebaf 100644
--- a/include/configs/snapper9260.h
+++ b/include/configs/snapper9260.h
@@ -41,7 +41,6 @@
 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + (1024 * 1024))
 
 /* NAND Flash */
-#define CONFIG_NAND_ATMEL
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
 #define CONFIG_SYS_NAND_DBW_8
diff --git a/include/configs/snapper9g45.h b/include/configs/snapper9g45.h
index f0e1a1d398..472989f328 100644
--- a/include/configs/snapper9g45.h
+++ b/include/configs/snapper9g45.h
@@ -39,7 +39,6 @@
 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + (1024 * 1024))
 
 /* NAND Flash */
-#define CONFIG_NAND_ATMEL
 #define CONFIG_ATMEL_NAND_HWECC
 #define CONFIG_SYS_NAND_ECC_BASE	ATMEL_BASE_ECC
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
diff --git a/include/configs/taurus.h b/include/configs/taurus.h
index ce06f7bb5f..087c81c28a 100644
--- a/include/configs/taurus.h
+++ b/include/configs/taurus.h
@@ -75,7 +75,6 @@
 
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
-#define CONFIG_NAND_ATMEL
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
 #define CONFIG_SYS_NAND_DBW_8
diff --git a/include/configs/usb_a9263.h b/include/configs/usb_a9263.h
index d8cb43a7cb..80dc238a82 100644
--- a/include/configs/usb_a9263.h
+++ b/include/configs/usb_a9263.h
@@ -54,7 +54,6 @@
 
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
-#define CONFIG_NAND_ATMEL
 #define CONFIG_SYS_MAX_NAND_DEVICE		1
 #define CONFIG_SYS_NAND_BASE			ATMEL_BASE_CS3
 /* our ALE is AD21 */
diff --git a/include/configs/wb45n.h b/include/configs/wb45n.h
new file mode 100644
index 0000000000..9e4dee50fd
--- /dev/null
+++ b/include/configs/wb45n.h
@@ -0,0 +1,150 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Configuation settings for the WB45N CPU Module.
+ */
+
+#ifndef __CONFIG_H__
+#define __CONFIG_H__
+
+#include <asm/hardware.h>
+
+/* ARM asynchronous clock */
+#define CONFIG_SYS_AT91_SLOW_CLOCK  32768
+#define CONFIG_SYS_AT91_MAIN_CLOCK  12000000	/* 12 MHz crystal */
+
+#define CONFIG_CMDLINE_TAG	/* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
+#define CONFIG_SKIP_LOWLEVEL_INIT
+
+/* general purpose I/O */
+#define CONFIG_ATMEL_LEGACY	/* required until (g)pio is fixed */
+#define CONFIG_AT91_GPIO
+
+/* serial console */
+#define CONFIG_ATMEL_USART
+#define CONFIG_USART_BASE   ATMEL_BASE_DBGU
+#define CONFIG_USART_ID     ATMEL_ID_SYS
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+
+/* SDRAM */
+#define CONFIG_NR_DRAM_BANKS        1
+#define CONFIG_SYS_SDRAM_BASE       0x20000000
+#define CONFIG_SYS_SDRAM_SIZE       0x04000000	/* 64 MB */
+
+#define CONFIG_SYS_INIT_SP_ADDR \
+    (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
+
+/* NAND flash */
+#define CONFIG_SYS_MAX_NAND_DEVICE  1
+#define CONFIG_SYS_NAND_BASE        0x40000000
+/* our ALE is AD21 */
+#define CONFIG_SYS_NAND_MASK_ALE    (1 << 21)
+/* our CLE is AD22 */
+#define CONFIG_SYS_NAND_MASK_CLE    (1 << 22)
+#define CONFIG_SYS_NAND_ENABLE_PIN  AT91_PIN_PD4
+#define CONFIG_SYS_NAND_READY_PIN   AT91_PIN_PD5
+
+/* PMECC & PMERRLOC */
+#define CONFIG_ATMEL_NAND_HWECC     1
+#define CONFIG_ATMEL_NAND_HW_PMECC  1
+#define CONFIG_PMECC_CAP            4
+#define CONFIG_PMECC_SECTOR_SIZE    512
+
+#define CONFIG_MTD_DEVICE
+#define CONFIG_CMD_MTDPARTS
+#define CONFIG_MTD_PARTITIONS
+#define CONFIG_RBTREE
+#define CONFIG_LZO
+
+/* Ethernet */
+#define CONFIG_MACB
+#define CONFIG_RMII
+#define CONFIG_NET_RETRY_COUNT      20
+#define CONFIG_MACB_SEARCH_PHY
+#define CONFIG_ETHADDR              C0:EE:40:00:00:00
+#define CONFIG_ENV_OVERWRITE        1
+
+/* System */
+#define CONFIG_SYS_LOAD_ADDR        0x22000000	/* load address */
+#define CONFIG_SYS_MEMTEST_START    CONFIG_SYS_SDRAM_BASE
+#define CONFIG_SYS_MEMTEST_END      0x23e00000
+
+#ifdef CONFIG_SYS_USE_NANDFLASH
+/* bootstrap + u-boot + env + linux in nandflash */
+#define CONFIG_ENV_OFFSET           0xa0000
+#define CONFIG_ENV_OFFSET_REDUND    0xc0000
+#define CONFIG_ENV_SIZE             0x20000	/* 1 block = 128 kB */
+
+#define CONFIG_BOOTCOMMAND  "nand read 0x22000000 0xe0000 0x280000; " \
+    "run _mtd; bootm"
+
+#define MTDIDS_DEFAULT      "nand0=atmel_nand"
+#define MTDPARTS_DEFAULT    "mtdparts=atmel_nand:" \
+                            "128K(at91bs)," \
+                            "512K(u-boot)," \
+                            "128K(u-boot-env)," \
+                            "128K(redund-env)," \
+                            "2560K(kernel-a)," \
+                            "2560K(kernel-b)," \
+                            "38912K(rootfs-a)," \
+                            "38912K(rootfs-b)," \
+                            "46208K(user)," \
+                            "512K(logs)"
+
+#else
+#error No boot method selected, please select 'CONFIG_SYS_USE_NANDFLASH'
+#endif
+
+#define CONFIG_BOOTARGS     "console=ttyS0,115200 earlyprintk " \
+                            "rw noinitrd mem=64M "              \
+                            "rootfstype=ubifs root=ubi0:rootfs ubi.mtd=6"
+
+#define CONFIG_EXTRA_ENV_SETTINGS       \
+    "_mtd=mtdparts default; setenv bootargs ${bootargs} ${mtdparts}\0" \
+    "autoload=no\0" \
+    "autostart=no\0" \
+    "ethaddr=" __stringify(CONFIG_ETHADDR) "\0" \
+    "\0"
+
+#define CONFIG_SYS_CBSIZE   256
+#define CONFIG_SYS_MAXARGS  16
+
+/*
+ * Size of malloc() pool
+ */
+#define CONFIG_SYS_MALLOC_LEN       (512 * 1024 + 0x1000)
+
+/* SPL */
+#define CONFIG_SPL_TEXT_BASE        0x300000
+#define CONFIG_SPL_MAX_SIZE         0x6000
+#define CONFIG_SPL_STACK            0x308000
+
+#define CONFIG_SPL_BSS_START_ADDR   0x20000000
+#define CONFIG_SPL_BSS_MAX_SIZE     0x80000
+#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
+#define CONFIG_SYS_SPL_MALLOC_SIZE  0x80000
+
+#define CONFIG_SYS_MONITOR_LEN      (512 << 10)
+
+#define CONFIG_SYS_MASTER_CLOCK     132096000
+#define CONFIG_SYS_AT91_PLLA        0x20c73f03
+#define CONFIG_SYS_MCKR             0x1301
+#define CONFIG_SYS_MCKR_CSS         0x1302
+
+#define CONFIG_SPL_NAND_DRIVERS
+#define CONFIG_SPL_NAND_BASE
+#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
+#define CONFIG_SYS_NAND_5_ADDR_CYCLE
+#define CONFIG_SYS_NAND_PAGE_SIZE   0x800
+#define CONFIG_SYS_NAND_PAGE_COUNT  64
+#define CONFIG_SYS_NAND_OOBSIZE     64
+#define CONFIG_SYS_NAND_BLOCK_SIZE  0x20000
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS   0x0
+#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
+
+#endif				/* __CONFIG_H__ */
diff --git a/include/configs/wb50n.h b/include/configs/wb50n.h
new file mode 100644
index 0000000000..70ea48a9a3
--- /dev/null
+++ b/include/configs/wb50n.h
@@ -0,0 +1,124 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Configuation settings for the WB50N CPU Module.
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include <asm/hardware.h>
+
+/* ARM asynchronous clock */
+#define CONFIG_SYS_AT91_SLOW_CLOCK      32768
+#define CONFIG_SYS_AT91_MAIN_CLOCK      12000000	/* from 12 MHz crystal */
+
+#define CONFIG_ARCH_CPU_INIT
+
+#define CONFIG_CMDLINE_TAG	/* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
+
+#ifndef CONFIG_SPL_BUILD
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#endif
+
+/* general purpose I/O */
+#define CONFIG_AT91_GPIO
+
+/* serial console */
+#define CONFIG_ATMEL_USART
+#define CONFIG_USART_BASE       ATMEL_BASE_DBGU
+#define CONFIG_USART_ID         ATMEL_ID_DBGU
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+
+/* SDRAM */
+#define CONFIG_NR_DRAM_BANKS        1
+#define CONFIG_SYS_SDRAM_BASE       ATMEL_BASE_DDRCS
+#define CONFIG_SYS_SDRAM_SIZE       0x04000000
+
+#ifdef CONFIG_SPL_BUILD
+#define CONFIG_SYS_INIT_SP_ADDR     0x310000
+#else
+#define CONFIG_SYS_INIT_SP_ADDR \
+    (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
+#endif
+
+#define CONFIG_SYS_MEMTEST_START    0x21000000
+#define CONFIG_SYS_MEMTEST_END      0x22000000
+
+/* NAND flash */
+#define CONFIG_SYS_MAX_NAND_DEVICE  1
+#define CONFIG_SYS_NAND_BASE        ATMEL_BASE_CS3
+/* our ALE is AD21 */
+#define CONFIG_SYS_NAND_MASK_ALE    (1 << 21)
+/* our CLE is AD22 */
+#define CONFIG_SYS_NAND_MASK_CLE    (1 << 22)
+#define CONFIG_SYS_NAND_ONFI_DETECTION
+/* PMECC & PMERRLOC */
+#define CONFIG_ATMEL_NAND_HWECC
+#define CONFIG_ATMEL_NAND_HW_PMECC
+#define CONFIG_PMECC_CAP            8
+#define CONFIG_PMECC_SECTOR_SIZE    512
+
+/* Ethernet Hardware */
+#define CONFIG_MACB
+#define CONFIG_RMII
+#define CONFIG_NET_RETRY_COUNT      20
+#define CONFIG_MACB_SEARCH_PHY
+#define CONFIG_RGMII
+#define CONFIG_ETHADDR              C0:EE:40:00:00:00
+#define CONFIG_ENV_OVERWRITE        1
+
+#define CONFIG_SYS_LOAD_ADDR        0x22000000	/* load address */
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+    "autoload=no\0" \
+    "autostart=no\0"
+
+/* bootstrap + u-boot + env in nandflash */
+#define CONFIG_ENV_OFFSET           0xA0000
+#define CONFIG_ENV_OFFSET_REDUND    0xC0000
+#define CONFIG_ENV_SIZE             0x20000
+#define CONFIG_BOOTCOMMAND \
+    "nand read 0x22000000 0x000e0000 0x500000; " \
+    "bootm"
+
+#define CONFIG_BOOTARGS \
+    "rw rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs"
+
+#define CONFIG_BAUDRATE             115200
+
+#define CONFIG_SYS_CBSIZE           1024
+#define CONFIG_SYS_MAXARGS          16
+#define CONFIG_SYS_PBSIZE \
+    (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
+
+/* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN       (2 * 1024 * 1024)
+
+/* SPL */
+#define CONFIG_SPL_TEXT_BASE        0x300000
+#define CONFIG_SPL_MAX_SIZE         0x10000
+#define CONFIG_SPL_BSS_START_ADDR   0x20000000
+#define CONFIG_SPL_BSS_MAX_SIZE     0x80000
+#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
+#define CONFIG_SYS_SPL_MALLOC_SIZE  0x80000
+
+#define CONFIG_SYS_MONITOR_LEN      (512 << 10)
+
+#define CONFIG_SPL_NAND_DRIVERS
+#define CONFIG_SPL_NAND_BASE
+#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
+#define CONFIG_SYS_NAND_5_ADDR_CYCLE
+#define CONFIG_SYS_NAND_PAGE_SIZE   0x800
+#define CONFIG_SYS_NAND_PAGE_COUNT  64
+#define CONFIG_SYS_NAND_OOBSIZE     64
+#define CONFIG_SYS_NAND_BLOCK_SIZE  0x20000
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS   0x0
+#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
+
+#endif
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 154b4784ba..71f63068cc 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -1543,7 +1543,6 @@ CONFIG_MY_OPTION
 CONFIG_NANDFLASH_SIZE
 CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC
 CONFIG_NAND_ACTL
-CONFIG_NAND_ATMEL
 CONFIG_NAND_CS_INIT
 CONFIG_NAND_DATA_REG
 CONFIG_NAND_DAVINCI

commit e81e7a85560fd4cf436e703632dbeeb44ec422d7
Author: Adam Ford <aford173@gmail.com>
Date:   Sun Jul 8 06:18:48 2018 -0500

    UPSTREAM: Convert CONFIG_NAND_LPC32XX_SLC to Kconfig
    
    This converts the following to Kconfig:
       CONFIG_NAND_LPC32XX_SLC
    
    Change-Id: Ib4d42bc173665d6483af8c1007006dd0422d5a86
    Signed-off-by: Adam Ford <aford173@gmail.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit d294335e5d51aa83b6dd57db85c3251e9a92349e)

diff --git a/configs/devkit3250_defconfig b/configs/devkit3250_defconfig
index 97922a1d03..8dc3c63726 100644
--- a/configs/devkit3250_defconfig
+++ b/configs/devkit3250_defconfig
@@ -33,6 +33,7 @@ CONFIG_DM_GPIO=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_NAND=y
+CONFIG_NAND_LPC32XX_SLC=y
 CONFIG_SPL_NAND_SIMPLE=y
 CONFIG_PHYLIB=y
 CONFIG_DM_SERIAL=y
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 8d4c275088..8a4ab8b5a9 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -31,6 +31,11 @@ config NAND_DENALI_SPARE_AREA_SKIP_BYTES
 	  of OOB area before last ECC sector data starts.  This is potentially
 	  used to preserve the bad block marker in the OOB area.
 
+config NAND_LPC32XX_SLC
+	bool "Support LPC32XX_SLC controller"
+	help
+	  Enable the LPC32XX SLC NAND controller.
+
 config NAND_OMAP_GPMC
 	bool "Support OMAP GPMC NAND controller"
 	depends on ARCH_OMAP2PLUS
diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h
index 526a81a382..5c1ef0186f 100644
--- a/include/configs/devkit3250.h
+++ b/include/configs/devkit3250.h
@@ -88,7 +88,6 @@
 /*
  * NAND controller
  */
-#define CONFIG_NAND_LPC32XX_SLC
 #define CONFIG_SYS_NAND_BASE		SLC_NAND_BASE
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #define CONFIG_SYS_NAND_BASE_LIST	{ CONFIG_SYS_NAND_BASE }
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 9247395dea..154b4784ba 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -1557,7 +1557,6 @@ CONFIG_NAND_FSMC
 CONFIG_NAND_KIRKWOOD
 CONFIG_NAND_KMETER1
 CONFIG_NAND_LPC32XX_MLC
-CONFIG_NAND_LPC32XX_SLC
 CONFIG_NAND_MODE_REG
 CONFIG_NAND_MXC_V1_1
 CONFIG_NAND_OMAP_ECCSCHEME

commit 54e454772f5b4d249e3b33ed9b1e811ebb103b58
Author: Ludwig Zenz <lzenz@dh-electronics.de>
Date:   Thu Jul 5 09:27:47 2018 +0200

    UPSTREAM: sf: add paired dev info for winbond w25q16jv
    
    This commit adds paired dev info for winbond w25q16jv
    (tested w25q16jvssiq with a i.mx6 board)
    
    Change-Id: I71adbc8b57960d6c4f1f9a0d45a1b5f92cc72f43
    Signed-off-by: Ludwig Zenz <lzenz@dh-electronics.de>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 51b2411946e5f247f26fde41a7227a002270d376)

diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c
index 9dbd0fbc02..2b333a6ba8 100644
--- a/drivers/mtd/spi/spi_flash_ids.c
+++ b/drivers/mtd/spi/spi_flash_ids.c
@@ -196,7 +196,7 @@ const struct spi_flash_info spi_flash_ids[] = {
 	 * Below paired flash devices has similar spi_flash params.
 	 * (s25fl129p_64k, s25fl128s_64k)
 	 * (w25q80bl, w25q80bv)
-	 * (w25q16cl, w25q16dv)
+	 * (w25q16cl, w25q16dv, w25q16jv)
 	 * (w25q32bv, w25q32fv_spi)
 	 * (w25q64cv, w25q64fv_spi)
 	 * (w25q128bv, w25q128fv_spi)

commit c9de7db241246bb5a527e80794a86af7827466fd
Author: Ludwig Zenz <lzenz@dh-electronics.de>
Date:   Thu Jul 5 09:27:46 2018 +0200

    UPSTREAM: sf: add Macronix mx25l1633e entry
    
    Add support for the Macronix mx25l1633e nor flash. (Tested on a imx6 board)
    
    Change-Id: If15d3a6fcf78a95c798966b720329d697bcb1bbd
    Signed-off-by: Ludwig Zenz <lzenz@dh-electronics.de>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 70cff76c38a7051992e399f35e1571f24efbfded)

diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c
index 4a9d4087b5..9dbd0fbc02 100644
--- a/drivers/mtd/spi/spi_flash_ids.c
+++ b/drivers/mtd/spi/spi_flash_ids.c
@@ -89,6 +89,7 @@ const struct spi_flash_info spi_flash_ids[] = {
 	{"mx25l12805",	   INFO(0xc22018, 0x0, 64 * 1024,   256, RD_FULL | WR_QPP) },
 	{"mx25l25635f",	   INFO(0xc22019, 0x0, 64 * 1024,   512, RD_FULL | WR_QPP) },
 	{"mx25l51235f",	   INFO(0xc2201a, 0x0, 64 * 1024,  1024, RD_FULL | WR_QPP) },
+	{"mx25l1633e",	   INFO(0xc22415, 0x0, 64 * 1024,    32, RD_FULL | WR_QPP | SECT_4K) },
 	{"mx25u6435f",	   INFO(0xc22537, 0x0, 64 * 1024,   128, RD_FULL | WR_QPP) },
 	{"mx25l12855e",	   INFO(0xc22618, 0x0, 64 * 1024,   256, RD_FULL | WR_QPP) },
 	{"mx25u1635e",     INFO(0xc22535, 0x0, 64 * 1024,  32, SECT_4K) },

commit e343c949b0c9adc8a8112c769838b0b6c2ade0f1
Author: Ludwig Zenz <lzenz@dh-electronics.de>
Date:   Thu Jul 5 09:27:45 2018 +0200

    UPSTREAM: sf: add Gigadevice gd25q16c entry
    
    Add support for the Gigadevice gd25q16c nor flash. (Tested on a imx6 board)
    
    Change-Id: I7382793b94bbe142346dfdd601bbd3f5d77e20e6
    Signed-off-by: Ludwig Zenz <lzenz@dh-electronics.de>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit b1360e2fc9b45650e1744138702dc6938962d608)

diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c
index 52d92d6794..4a9d4087b5 100644
--- a/drivers/mtd/spi/spi_flash_ids.c
+++ b/drivers/mtd/spi/spi_flash_ids.c
@@ -63,6 +63,7 @@ const struct spi_flash_info spi_flash_ids[] = {
 	{"en25s64",	   INFO(0x1c3817, 0x0, 64 * 1024,   128, 0) },
 #endif
 #ifdef CONFIG_SPI_FLASH_GIGADEVICE	/* GIGADEVICE */
+	{"gd25q16c",	   INFO(0xc84015, 0x0, 64 * 1024,    32, RD_FULL | WR_QPP | SECT_4K) },
 	{"gd25q64b",	   INFO(0xc84017, 0x0, 64 * 1024,   128, SECT_4K) },
 	{"gd25q32b",       INFO(0xc84016, 0x0, 64 * 1024,    64, SECT_4K) },
 	{"gd25lq32",	   INFO(0xc86016, 0x0, 64 * 1024,    64, SECT_4K) },

commit cbb9e591ecc82c1e3a27047bad7db62c2b746340
Author: Hannes Schmelzer <oe5hpm@oevsv.at>
Date:   Tue Jun 26 23:14:07 2018 +0200

    UPSTREAM: spi_flash: add a bunch of winbond flashes to id-table
    
    This commit adds the following flashes to the id-table
    
    - W25Q16JV
    - W25Q32JV
    - W25Q64JV
    - W25Q128JV
    - W25Q256JV
    
    Change-Id: Ic5873a7292d9b706b2839feb84c171d8cb1f5c73
    Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 760b75564fdf2fe53d8c4069a6fb3320586eb662)

diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c
index 176da27c68..52d92d6794 100644
--- a/drivers/mtd/spi/spi_flash_ids.c
+++ b/drivers/mtd/spi/spi_flash_ids.c
@@ -178,10 +178,15 @@ const struct spi_flash_info spi_flash_ids[] = {
 	{"w25q256",	   INFO(0xef4019, 0x0,	64 * 1024,   512, RD_FULL | WR_QPP | SECT_4K) },
 	{"w25q80bw",	   INFO(0xef5014, 0x0,	64 * 1024,    16, RD_FULL | WR_QPP | SECT_4K) },
 	{"w25q16dw",	   INFO(0xef6015, 0x0,	64 * 1024,    32, RD_FULL | WR_QPP | SECT_4K) },
+	{"w25q16jv",	   INFO(0xef7015, 0x0,	64 * 1024,    32, RD_FULL | WR_QPP | SECT_4K) },
 	{"w25q32dw",	   INFO(0xef6016, 0x0,	64 * 1024,    64, RD_FULL | WR_QPP | SECT_4K) },
+	{"w25q32jv",	   INFO(0xef7016, 0x0,	64 * 1024,    64, RD_FULL | WR_QPP | SECT_4K) },
 	{"w25q64dw",	   INFO(0xef6017, 0x0,	64 * 1024,   128, RD_FULL | WR_QPP | SECT_4K) },
+	{"w25q64jv",	   INFO(0xef7017, 0x0,	64 * 1024,   128, RD_FULL | WR_QPP | SECT_4K) },
 	{"w25q128fw",	   INFO(0xef6018, 0x0,	64 * 1024,   256, RD_FULL | WR_QPP | SECT_4K) },
+	{"w25q128jv",	   INFO(0xef7018, 0x0,	64 * 1024,   256, RD_FULL | WR_QPP | SECT_4K) },
 	{"w25q256fw",	   INFO(0xef6019, 0x0,	64 * 1024,   512, RD_FULL | WR_QPP | SECT_4K) },
+	{"w25q256jw",	   INFO(0xef7019, 0x0,	64 * 1024,   512, RD_FULL | WR_QPP | SECT_4K) },
 #endif
 	{},	/* Empty entry to terminate the list */
 	/*

commit 4d9cacbffa2f5ac0488205d26ef2c796537d29ff
Author: Simon Glass <sjg@chromium.org>
Date:   Mon Jun 11 13:07:16 2018 -0600

    UPSTREAM: dm: spi: Update sandbox SPI emulation driver to use ofnode
    
    Update the parameters sandbox_sf_bind_emul to support livetree.
    
    Change-Id: Iec83b813c8cddd750f7061d697304fa05556c5fb
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 008dcddf9937bd2576f98b48eb5bf0f60ad36014)

diff --git a/drivers/mtd/spi/sandbox.c b/drivers/mtd/spi/sandbox.c
index a5f35c73a6..c8aa158f1c 100644
--- a/drivers/mtd/spi/sandbox.c
+++ b/drivers/mtd/spi/sandbox.c
@@ -558,7 +558,7 @@ static int sandbox_cmdline_cb_spi_sf(struct sandbox_state *state,
 SANDBOX_CMDLINE_OPT(spi_sf, 1, "connect a SPI flash: <bus>:<cs>:<id>:<file>");
 
 int sandbox_sf_bind_emul(struct sandbox_state *state, int busnum, int cs,
-			 struct udevice *bus, int of_offset, const char *spec)
+			 struct udevice *bus, ofnode node, const char *spec)
 {
 	struct udevice *emul;
 	char name[20], *str;
@@ -577,7 +577,7 @@ int sandbox_sf_bind_emul(struct sandbox_state *state, int busnum, int cs,
 	str = strdup(name);
 	if (!str)
 		return -ENOMEM;
-	ret = device_bind(bus, drv, str, NULL, of_offset, &emul);
+	ret = device_bind_ofnode(bus, drv, str, NULL, node, &emul);
 	if (ret) {
 		free(str);
 		printf("Cannot create emul device for spec '%s' (err=%d)\n",
@@ -622,7 +622,8 @@ static int sandbox_sf_bind_bus_cs(struct sandbox_state *state, int busnum,
 	if (ret)
 		return ret;
 
-	return sandbox_sf_bind_emul(state, busnum, cs, bus, -1, spec);
+	return sandbox_sf_bind_emul(state, busnum, cs, bus, ofnode_null(),
+				    spec);
 }
 
 int sandbox_spi_get_emul(struct sandbox_state *state,
@@ -640,7 +641,7 @@ int sandbox_spi_get_emul(struct sandbox_state *state,
 		debug("%s: busnum=%u, cs=%u: binding SPI flash emulation: ",
 		      __func__, busnum, cs);
 		ret = sandbox_sf_bind_emul(state, busnum, cs, bus,
-					   dev_of_offset(slave), slave->name);
+					   dev_ofnode(slave), slave->name);
 		if (ret) {
 			debug("failed (err=%d)\n", ret);
 			return ret;
diff --git a/include/spi_flash.h b/include/spi_flash.h
index f3c4e83424..a09f3522d2 100644
--- a/include/spi_flash.h
+++ b/include/spi_flash.h
@@ -186,7 +186,7 @@ static inline int spi_flash_erase(struct spi_flash *flash, u32 offset,
 struct sandbox_state;
 
 int sandbox_sf_bind_emul(struct sandbox_state *state, int busnum, int cs,
-			 struct udevice *bus, int of_offset, const char *spec);
+			 struct udevice *bus, ofnode node, const char *spec);
 
 void sandbox_sf_unbind_emul(struct sandbox_state *state, int busnum, int cs);
 
diff --git a/test/dm/spi.c b/test/dm/spi.c
index 24fa2a48ae..b3b87286bd 100644
--- a/test/dm/spi.c
+++ b/test/dm/spi.c
@@ -24,7 +24,7 @@ static int dm_test_spi_find(struct unit_test_state *uts)
 	struct udevice *bus, *dev;
 	const int busnum = 0, cs = 0, mode = 0, speed = 1000000, cs_b = 1;
 	struct spi_cs_info info;
-	int of_offset;
+	ofnode node;
 
 	ut_asserteq(-ENODEV, uclass_find_device_by_seq(UCLASS_SPI, busnum,
 						       false, &bus));
@@ -35,7 +35,7 @@ static int dm_test_spi_find(struct unit_test_state *uts)
 	 */
 	ut_asserteq(0, uclass_get_device_by_seq(UCLASS_SPI, busnum, &bus));
 	ut_assertok(spi_cs_info(bus, cs, &info));
-	of_offset = dev_of_offset(info.dev);
+	node = dev_ofnode(info.dev);
 	device_remove(info.dev, DM_REMOVE_NORMAL);
 	device_unbind(info.dev);
 
@@ -66,7 +66,7 @@ static int dm_test_spi_find(struct unit_test_state *uts)
 	ut_asserteq_ptr(NULL, info.dev);
 
 	/* Add the emulation and try again */
-	ut_assertok(sandbox_sf_bind_emul(state, busnum, cs, bus, of_offset,
+	ut_assertok(sandbox_sf_bind_emul(state, busnum, cs, bus, node,
 					 "name"));
 	ut_assertok(spi_find_bus_and_cs(busnum, cs, &bus, &dev));
 	ut_assertok(spi_get_bus_and_cs(busnum, cs, speed, mode,
@@ -76,7 +76,7 @@ static int dm_test_spi_find(struct unit_test_state *uts)
 	ut_asserteq_ptr(info.dev, slave->dev);
 
 	/* We should be able to add something to another chip select */
-	ut_assertok(sandbox_sf_bind_emul(state, busnum, cs_b, bus, of_offset,
+	ut_assertok(sandbox_sf_bind_emul(state, busnum, cs_b, bus, node,
 					 "name"));
 	ut_assertok(spi_get_bus_and_cs(busnum, cs_b, speed, mode,
 				       "spi_flash_std", "name", &bus, &slave));

commit 8cf3ac90c72510ca6a52bc7933b707e49476b59b
Author: Marek Vasut <marex@denx.de>
Date:   Thu May 24 21:58:45 2018 +0200

    UPSTREAM: sf: Enable FSR polling on N25Q256(A)
    
    The N25Q256(A) datasheet clearly states that this device does have
    a Flag Status Register and does update FSR PEC bit 7 during Program
    and Erase cycles to indicate the cycle is in progress. Enable the
    FSR PEC bit polling on this device to prevent data corruption.
    
    Change-Id: I3f2a50091513a52b9bc02c44d4a37f0bd6c8e392
    Signed-off-by: Marek Vasut <marex@denx.de>
    Cc: Jagan Teki <jagan@openedev.com>
    Cc: Tom Rini <trini@konsulko.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 069b746ad9e66ab75973020f992e059c06cf3a7c)

diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c
index 5679b8feb6..176da27c68 100644
--- a/drivers/mtd/spi/spi_flash_ids.c
+++ b/drivers/mtd/spi/spi_flash_ids.c
@@ -136,8 +136,8 @@ const struct spi_flash_info spi_flash_ids[] = {
 	{"n25q64a",	   INFO(0x20bb17, 0x0,  64 * 1024,   128, RD_FULL | WR_QPP | SECT_4K) },
 	{"n25q128",	   INFO(0x20ba18, 0x0,  64 * 1024,   256, RD_FULL | WR_QPP) },
 	{"n25q128a",	   INFO(0x20bb18, 0x0,  64 * 1024,   256, RD_FULL | WR_QPP) },
-	{"n25q256",	   INFO(0x20ba19, 0x0,  64 * 1024,   512, RD_FULL | WR_QPP | SECT_4K) },
-	{"n25q256a",	   INFO(0x20bb19, 0x0,  64 * 1024,   512, RD_FULL | WR_QPP | SECT_4K) },
+	{"n25q256",	   INFO(0x20ba19, 0x0,  64 * 1024,   512, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
+	{"n25q256a",	   INFO(0x20bb19, 0x0,  64 * 1024,   512, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
 	{"n25q512",	   INFO(0x20ba20, 0x0,  64 * 1024,  1024, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
 	{"n25q512a",	   INFO(0x20bb20, 0x0,  64 * 1024,  1024, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
 	{"n25q1024",	   INFO(0x20ba21, 0x0,  64 * 1024,  2048, RD_FULL | WR_QPP | E_FSR | SECT_4K) },

commit 4be09724dc49a4d326780cf1685954a7be4eda23
Author: Jörg Krause <joerg.krause@embedded.rocks>
Date:   Sun Jan 14 19:26:40 2018 +0100

    UPSTREAM: mtd: nand: mxs_nand_spl: add mxs_flash_full_ident
    
    For now, the existing SPL MXS NAND driver only supports to identify
    ONFi-compliant NAND chips. In order to allow identifying
    non-ONFi-compliant chips add `mxs_flash_full_ident()` which uses the
    `nand_get_flash_type()` functionality from `nand_base.c` to lookup
    for supported NAND chips in the chip ID list.
    
    For compatibility reason the full identification support is only
    available if the config option `CONFIG_SPL_NAND_IDENT` is enabled.
    
    The lookup was tested on a custom i.MX6ULL board with a Toshiba
    TC58NVG1S3HTAI0 NAND chip.
    
    Change-Id: Idcf3cec142f0e7e326c532d86e6ffc2664c633d2
    Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 4368f85359b947da7f151265d8969d6af1235357)

diff --git a/drivers/mtd/nand/mxs_nand_spl.c b/drivers/mtd/nand/mxs_nand_spl.c
index 27340402e3..3b7b0d6f72 100644
--- a/drivers/mtd/nand/mxs_nand_spl.c
+++ b/drivers/mtd/nand/mxs_nand_spl.c
@@ -50,6 +50,28 @@ static void mxs_nand_command(struct mtd_info *mtd, unsigned int command,
 	}
 }
 
+#if defined (CONFIG_SPL_NAND_IDENT)
+
+/* Trying to detect the NAND flash using ONFi, JEDEC, and (extended) IDs */
+static int mxs_flash_full_ident(struct mtd_info *mtd)
+{
+	int nand_maf_id, nand_dev_id;
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct nand_flash_dev *type;
+
+	type = nand_get_flash_type(mtd, chip, &nand_maf_id, &nand_dev_id, NULL);
+
+	if (IS_ERR(type)) {
+		chip->select_chip(mtd, -1);
+		return PTR_ERR(type);
+	}
+
+	return 0;
+}
+
+#else
+
+/* Trying to detect the NAND flash using ONFi only */
 static int mxs_flash_onfi_ident(struct mtd_info *mtd)
 {
 	register struct nand_chip *chip = mtd_to_nand(mtd);
@@ -110,10 +132,16 @@ static int mxs_flash_onfi_ident(struct mtd_info *mtd)
 	return 0;
 }
 
+#endif /* CONFIG_SPL_NAND_IDENT */
+
 static int mxs_flash_ident(struct mtd_info *mtd)
 {
 	int ret;
+#if defined (CONFIG_SPL_NAND_IDENT)
+	ret = mxs_flash_full_ident(mtd);
+#else
 	ret = mxs_flash_onfi_ident(mtd);
+#endif
 	return ret;
 }
 

commit b57f8059af912af371e64caee554577a4c7eeac7
Author: Jörg Krause <joerg.krause@embedded.rocks>
Date:   Sun Jan 14 19:26:39 2018 +0100

    UPSTREAM: mtd: nand: mxs_nand_spl: refactor mxs_flash_ident
    
    The existing `mxs_flash_ident()` is limited to identify ONFi compliant
    NAND chips only. In order to support non-ONFi NAND chips refactor the
    function and rename it to `mxs_flash_onfi_ident()`.
    
    A follow-up patch will add `mxs_flash_full_ident()` which allows to use
    the chip ID list to lookup for supported NAND flashs.
    
    Change-Id: I560d7f7729f0977d8a638079a849cb1c8c5d31b8
    Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit f3f2af3bdf2af89d0621aa0fbd94a918e4447081)

diff --git a/drivers/mtd/nand/mxs_nand_spl.c b/drivers/mtd/nand/mxs_nand_spl.c
index 59cd903026..27340402e3 100644
--- a/drivers/mtd/nand/mxs_nand_spl.c
+++ b/drivers/mtd/nand/mxs_nand_spl.c
@@ -50,7 +50,7 @@ static void mxs_nand_command(struct mtd_info *mtd, unsigned int command,
 	}
 }
 
-static int mxs_flash_ident(struct mtd_info *mtd)
+static int mxs_flash_onfi_ident(struct mtd_info *mtd)
 {
 	register struct nand_chip *chip = mtd_to_nand(mtd);
 	int i;
@@ -110,6 +110,13 @@ static int mxs_flash_ident(struct mtd_info *mtd)
 	return 0;
 }
 
+static int mxs_flash_ident(struct mtd_info *mtd)
+{
+	int ret;
+	ret = mxs_flash_onfi_ident(mtd);
+	return ret;
+}
+
 static int mxs_read_page_ecc(struct mtd_info *mtd, void *buf, unsigned int page)
 {
 	register struct nand_chip *chip = mtd_to_nand(mtd);

commit a564ed3a5384ac10c5d8b6cc690815ea32f7b99b
Author: Jörg Krause <joerg.krause@embedded.rocks>
Date:   Sun Jan 14 19:26:38 2018 +0100

    UPSTREAM: spl, nand: add option CONFIG_SPL_NAND_IDENT to lookup for supported NAND chips
    
    Add the config option `CONFIG_SPL_NAND_IDENT` for using the NAND chip ID list
    to identify the NAND flash in SPL.
    
    Change-Id: I4d83cb678cb52e83ddf755c0188a4f2f42fe5671
    Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 15e207faa0c32b587c173844936cadd7bf8dee01)

diff --git a/README b/README
index 8ff12ba0c5..d762f35e65 100644
--- a/README
+++ b/README
@@ -2850,6 +2850,10 @@ FIT uImage format:
 		CONFIG_SPL_NAND_DRIVERS
 		SPL uses normal NAND drivers, not minimal drivers.
 
+		CONFIG_SPL_NAND_IDENT
+		SPL uses the chip ID list to identify the NAND flash.
+		Requires CONFIG_SPL_NAND_BASE.
+
 		CONFIG_SPL_NAND_ECC
 		Include standard software ECC in the SPL
 
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index c11a078203..a0043d2a69 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -17,6 +17,7 @@ obj-$(CONFIG_SPL_NAND_SIMPLE) += nand_spl_simple.o
 obj-$(CONFIG_SPL_NAND_LOAD) += nand_spl_load.o
 obj-$(CONFIG_SPL_NAND_ECC) += nand_ecc.o
 obj-$(CONFIG_SPL_NAND_BASE) += nand_base.o
+obj-$(CONFIG_SPL_NAND_IDENT) += nand_ids.o nand_timings.o
 obj-$(CONFIG_SPL_NAND_INIT) += nand.o
 obj-$(CONFIG_SPL_NAND_BBT) += nand_bbt.o
 obj-$(CONFIG_SPL_NAND_IDS) += nand_ids.o
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index afe7edf8e2..9247395dea 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -2193,6 +2193,7 @@ CONFIG_SPL_NAND_BASE
 CONFIG_SPL_NAND_BOOT
 CONFIG_SPL_NAND_DRIVERS
 CONFIG_SPL_NAND_ECC
+CONFIG_SPL_NAND_IDENT
 CONFIG_SPL_NAND_INIT
 CONFIG_SPL_NAND_LOAD
 CONFIG_SPL_NAND_MINIMAL

commit 46c3d471e4068d3d77f85f98c1cb91c009ce56cc
Author: Jörg Krause <joerg.krause@embedded.rocks>
Date:   Sun Jan 14 19:26:37 2018 +0100

    UPSTREAM: mtd: nand: export nand_get_flash_type function
    
    `nand_get_flash_type()` allows identification of supported NAND flashs.
    The function is useful in SPL (like mxs_nand_spl.c) to lookup for a NAND
    flash (which does not support ONFi) instead of using nand_simple.c and
    hard-coding all required NAND parameters.
    
    Change-Id: I469c18019d13e8e7f5105ece92c581047e751924
    Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit da37d096820e15b2bcdb0243da2dc01707c650f2)

diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index eb9f121f81..64e4621aaa 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -3755,7 +3755,7 @@ static bool find_full_id_nand(struct mtd_info *mtd, struct nand_chip *chip,
 /*
  * Get the flash and manufacturer id and lookup if the type is supported.
  */
-static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
+struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
 						  struct nand_chip *chip,
 						  int *maf_id, int *dev_id,
 						  struct nand_flash_dev *type)
@@ -3927,6 +3927,7 @@ ident_done:
 		mtd->erasesize >> 10, mtd->writesize, mtd->oobsize);
 	return type;
 }
+EXPORT_SYMBOL(nand_get_flash_type);
 
 #if CONFIG_IS_ENABLED(OF_CONTROL)
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
index e0c7681d27..cf4409e545 100644
--- a/include/linux/mtd/rawnand.h
+++ b/include/linux/mtd/rawnand.h
@@ -22,9 +22,16 @@
 #include <linux/mtd/bbm.h>
 
 struct mtd_info;
+struct nand_chip;
 struct nand_flash_dev;
 struct device_node;
 
+/* Get the flash and manufacturer id and lookup if the type is supported. */
+struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
+					   struct nand_chip *chip,
+					   int *maf_id, int *dev_id,
+					   struct nand_flash_dev *type);
+
 /* Scan and identify a NAND device */
 extern int nand_scan(struct mtd_info *mtd, int max_chips);
 /*
@@ -247,9 +254,6 @@ typedef enum {
 #define NAND_CI_CELLTYPE_MSK	0x0C
 #define NAND_CI_CELLTYPE_SHIFT	2
 
-/* Keep gcc happy */
-struct nand_chip;
-
 /* ONFI features */
 #define ONFI_FEATURE_16_BIT_BUS		(1 << 0)
 #define ONFI_FEATURE_EXT_PARAM_PAGE	(1 << 7)

commit 0888241969b2c68345ecbdf10df14656ddf929af
Author: Stefan Agner <stefan.agner@toradex.com>
Date:   Fri Jun 22 18:06:18 2018 +0200

    UPSTREAM: mtd: nand: mxs_nand: add support for specific ECC strength
    
    Add support for specified ECC strength/size using device tree
    properties nand-ecc-strength/nand-ecc-step-size.
    
    This aligns behavior with the mainline driver, such that:
    - If fsl,use-minimal-ecc is requested it will use data from
      data sheet/ONFI. If this is not available the driver will fail.
    - If nand-ecc-strength/nand-ecc-step-size are specified those
      value will be used.
    - By default maximum possible ECC strength is used
    
    Change-Id: I981df217443c7ac9684b59df8d946a7f531bc063
    Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 627544506f5709bb2d14f0db66661a27cd78ec0a)

diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c
index 3d1ce6f10f..30fc4ec4b6 100644
--- a/drivers/mtd/nand/mxs_nand.c
+++ b/drivers/mtd/nand/mxs_nand.c
@@ -162,15 +162,14 @@ static inline int mxs_nand_calc_mark_offset(struct bch_geometry *geo,
 }
 
 static inline int mxs_nand_calc_ecc_layout_by_info(struct bch_geometry *geo,
-						   struct mtd_info *mtd)
+						   struct mtd_info *mtd,
+						   unsigned int ecc_strength,
+						   unsigned int ecc_step)
 {
 	struct nand_chip *chip = mtd_to_nand(mtd);
 	struct mxs_nand_info *nand_info = nand_get_controller_data(chip);
 
-	if (!(chip->ecc_strength_ds > 0 && chip->ecc_step_ds > 0))
-		return -ENOTSUPP;
-
-	switch (chip->ecc_step_ds) {
+	switch (ecc_step) {
 	case SZ_512:
 		geo->gf_len = 13;
 		break;
@@ -181,8 +180,8 @@ static inline int mxs_nand_calc_ecc_layout_by_info(struct bch_geometry *geo,
 		return -EINVAL;
 	}
 
-	geo->ecc_chunk_size = chip->ecc_step_ds;
-	geo->ecc_strength = round_up(chip->ecc_strength_ds, 2);
+	geo->ecc_chunk_size = ecc_step;
+	geo->ecc_strength = round_up(ecc_strength, 2);
 
 	/* Keep the C >= O */
 	if (geo->ecc_chunk_size < mtd->oobsize)
@@ -965,6 +964,28 @@ static int mxs_nand_block_bad(struct mtd_info *mtd, loff_t ofs)
 	return 0;
 }
 
+static int mxs_nand_set_geometry(struct mtd_info *mtd, struct bch_geometry *geo)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct nand_chip *nand = mtd_to_nand(mtd);
+	struct mxs_nand_info *nand_info = nand_get_controller_data(nand);
+
+	if (chip->ecc.strength > 0 && chip->ecc.size > 0)
+		return mxs_nand_calc_ecc_layout_by_info(geo, mtd,
+				chip->ecc.strength, chip->ecc.size);
+
+	if (nand_info->use_minimum_ecc ||
+		mxs_nand_calc_ecc_layout(geo, mtd)) {
+		if (!(chip->ecc_strength_ds > 0 && chip->ecc_step_ds > 0))
+			return -EINVAL;
+
+		return mxs_nand_calc_ecc_layout_by_info(geo, mtd,
+				chip->ecc_strength_ds, chip->ecc_step_ds);
+	}
+
+	return 0;
+}
+
 /*
  * At this point, the physical NAND Flash chips have been identified and
  * counted, so we know the physical geometry. This enables us to make some
@@ -981,14 +1002,9 @@ int mxs_nand_setup_ecc(struct mtd_info *mtd)
 	struct bch_geometry *geo = &nand_info->bch_geometry;
 	struct mxs_bch_regs *bch_regs = nand_info->bch_regs;
 	uint32_t tmp;
-	int ret = -ENOTSUPP;
-
-	if (nand_info->use_minimum_ecc)
-		ret = mxs_nand_calc_ecc_layout_by_info(geo, mtd);
-
-	if (ret == -ENOTSUPP)
-		ret = mxs_nand_calc_ecc_layout(geo, mtd);
+	int ret;
 
+	ret = mxs_nand_set_geometry(mtd, geo);
 	if (ret)
 		return ret;
 

commit db281d09bca37ea1babf36e1080f57d9acc46452
Author: Stefan Agner <stefan.agner@toradex.com>
Date:   Fri Jun 22 18:06:17 2018 +0200

    UPSTREAM: mtd: nand: mxs_nand: add device tree support
    
    Support driver data from device tree. Also support fsl,use-minimal-ecc
    similar to Linux' GPMI NAND driver.
    
    Change-Id: I3f91a764c1bf75bdb5a51328146297a4b662141f
    Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit f75e83bfae2bcf36197e25b8b3d539b0652b83fa)

diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 310c6010c1..8d4c275088 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -177,6 +177,13 @@ config NAND_MXS
 
 if NAND_MXS
 
+config NAND_MXS_DT
+	bool "Support MXS NAND controller as a DT device"
+	depends on OF_CONTROL && MTD
+	help
+	  Enable the driver for MXS NAND flash on platforms using
+	  device tree.
+
 config NAND_MXS_USE_MINIMUM_ECC
 	bool "Use minimum ECC strength supported by the controller"
 	default false
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index b24cd007ce..c11a078203 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -60,6 +60,7 @@ obj-$(CONFIG_NAND_LPC32XX_SLC) += lpc32xx_nand_slc.o
 obj-$(CONFIG_NAND_VF610_NFC) += vf610_nfc.o
 obj-$(CONFIG_NAND_MXC) += mxc_nand.o
 obj-$(CONFIG_NAND_MXS) += mxs_nand.o
+obj-$(CONFIG_NAND_MXS_DT) += mxs_nand_dt.o
 obj-$(CONFIG_NAND_PXA3XX) += pxa3xx_nand.o
 obj-$(CONFIG_NAND_SPEAR) += spr_nand.o
 obj-$(CONFIG_TEGRA_NAND) += tegra_nand.o
diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c
index 25b726c718..3d1ce6f10f 100644
--- a/drivers/mtd/nand/mxs_nand.c
+++ b/drivers/mtd/nand/mxs_nand.c
@@ -1202,6 +1202,9 @@ int mxs_nand_init_ctrl(struct mxs_nand_info *nand_info)
 	nand_set_controller_data(nand, nand_info);
 	nand->options |= NAND_NO_SUBPAGE_WRITE;
 
+	if (nand_info->dev)
+		nand->flash_node = dev_of_offset(nand_info->dev);
+
 	nand->cmd_ctrl		= mxs_nand_cmd_ctrl;
 
 	nand->dev_ready		= mxs_nand_device_ready;
@@ -1248,6 +1251,7 @@ err_free_buffers:
 	return err;
 }
 
+#ifndef CONFIG_NAND_MXS_DT
 void board_nand_init(void)
 {
 	struct mxs_nand_info *nand_info;
@@ -1280,3 +1284,4 @@ void board_nand_init(void)
 err:
 	free(nand_info);
 }
+#endif
diff --git a/drivers/mtd/nand/mxs_nand_dt.c b/drivers/mtd/nand/mxs_nand_dt.c
new file mode 100644
index 0000000000..f89eb091a9
--- /dev/null
+++ b/drivers/mtd/nand/mxs_nand_dt.c
@@ -0,0 +1,86 @@
+/*
+ * NXP GPMI NAND flash driver (DT initialization)
+ *
+ * Copyright (C) 2018 Toradex
+ * Authors:
+ * Stefan Agner <stefan.agner@toradex.com>
+ *
+ * Based on denali_dt.c
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <dm.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <linux/printk.h>
+
+#include "mxs_nand.h"
+
+struct mxs_nand_dt_data {
+	unsigned int max_ecc_strength_supported;
+};
+
+static const struct mxs_nand_dt_data mxs_nand_imx7d_data = {
+	.max_ecc_strength_supported = 62,
+};
+
+static const struct udevice_id mxs_nand_dt_ids[] = {
+	{
+		.compatible = "fsl,imx7d-gpmi-nand",
+		.data = (unsigned long)&mxs_nand_imx7d_data,
+	},
+	{ /* sentinel */ }
+};
+
+static int mxs_nand_dt_probe(struct udevice *dev)
+{
+	struct mxs_nand_info *info = dev_get_priv(dev);
+	const struct mxs_nand_dt_data *data;
+	struct resource res;
+	int ret;
+
+	data = (void *)dev_get_driver_data(dev);
+	if (data)
+		info->max_ecc_strength_supported = data->max_ecc_strength_supported;
+
+	info->dev = dev;
+
+	ret = dev_read_resource_byname(dev, "gpmi-nand", &res);
+	if (ret)
+		return ret;
+
+	info->gpmi_regs = devm_ioremap(dev, res.start, resource_size(&res));
+
+
+	ret = dev_read_resource_byname(dev, "bch", &res);
+	if (ret)
+		return ret;
+
+	info->bch_regs = devm_ioremap(dev, res.start, resource_size(&res));
+
+	info->use_minimum_ecc = dev_read_bool(dev, "fsl,use-minimum-ecc");
+
+	return mxs_nand_init_ctrl(info);
+}
+
+U_BOOT_DRIVER(mxs_nand_dt) = {
+	.name = "mxs-nand-dt",
+	.id = UCLASS_MTD,
+	.of_match = mxs_nand_dt_ids,
+	.probe = mxs_nand_dt_probe,
+	.priv_auto_alloc_size = sizeof(struct mxs_nand_info),
+};
+
+void board_nand_init(void)
+{
+	struct udevice *dev;
+	int ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_MTD,
+					  DM_GET_DRIVER(mxs_nand_dt),
+					  &dev);
+	if (ret && ret != -ENODEV)
+		pr_err("Failed to initialize MXS NAND controller. (error %d)\n",
+		       ret);
+}

commit ad743355bbd6a3941dc0c686191044713c1940fd
Author: Stefan Agner <stefan.agner@toradex.com>
Date:   Fri Jun 22 18:06:16 2018 +0200

    UPSTREAM: mtd: nand: mxs_nand: move structs into header file
    
    Move structs into header file so we can use a separate compile
    unit for device tree support.
    
    Change-Id: I83cfe57d76d434fe483911f8b8b3d4dea4a4d170
    Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 68748340c8613877d71b444c0dffe63b536d5a5f)

diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c
index d77c12d21e..25b726c718 100644
--- a/drivers/mtd/nand/mxs_nand.c
+++ b/drivers/mtd/nand/mxs_nand.c
@@ -14,12 +14,11 @@
  */
 
 #include <common.h>
-#include <linux/mtd/mtd.h>
+#include <dm.h>
 #include <linux/mtd/rawnand.h>
 #include <linux/sizes.h>
 #include <linux/types.h>
 #include <malloc.h>
-#include <nand.h>
 #include <linux/errno.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
@@ -27,7 +26,6 @@
 #include <asm/mach-imx/regs-bch.h>
 #include <asm/mach-imx/regs-gpmi.h>
 #include <asm/arch/sys_proto.h>
-#include <asm/mach-imx/dma.h>
 #include "mxs_nand.h"
 
 #define	MXS_NAND_DMA_DESCRIPTOR_COUNT		4
@@ -48,61 +46,6 @@
 
 #define	MXS_NAND_BCH_TIMEOUT			10000
 
-/**
- * @gf_len:                   The length of Galois Field. (e.g., 13 or 14)
- * @ecc_strength:             A number that describes the strength of the ECC
- *                            algorithm.
- * @ecc_chunk_size:           The size, in bytes, of a single ECC chunk. Note
- *                            the first chunk in the page includes both data and
- *                            metadata, so it's a bit larger than this value.
- * @ecc_chunk_count:          The number of ECC chunks in the page,
- * @block_mark_byte_offset:   The byte offset in the ECC-based page view at
- *                            which the underlying physical block mark appears.
- * @block_mark_bit_offset:    The bit offset into the ECC-based page view at
- *                            which the underlying physical block mark appears.
- */
-struct bch_geometry {
-	unsigned int  gf_len;
-	unsigned int  ecc_strength;
-	unsigned int  ecc_chunk_size;
-	unsigned int  ecc_chunk_count;
-	unsigned int  block_mark_byte_offset;
-	unsigned int  block_mark_bit_offset;
-};
-
-struct mxs_nand_info {
-	struct nand_chip chip;
-	unsigned int	max_ecc_strength_supported;
-	bool		use_minimum_ecc;
-	int		cur_chip;
-
-	uint32_t	cmd_queue_len;
-	uint32_t	data_buf_size;
-	struct bch_geometry bch_geometry;
-
-	uint8_t		*cmd_buf;
-	uint8_t		*data_buf;
-	uint8_t		*oob_buf;
-
-	uint8_t		marking_block_bad;
-	uint8_t		raw_oob_mode;
-
-	struct mxs_gpmi_regs *gpmi_regs;
-	struct mxs_bch_regs *bch_regs;
-
-	/* Functions with altered behaviour */
-	int		(*hooked_read_oob)(struct mtd_info *mtd,
-				loff_t from, struct mtd_oob_ops *ops);
-	int		(*hooked_write_oob)(struct mtd_info *mtd,
-				loff_t to, struct mtd_oob_ops *ops);
-	int		(*hooked_block_markbad)(struct mtd_info *mtd,
-				loff_t ofs);
-
-	/* DMA descriptors */
-	struct mxs_dma_desc	**desc;
-	uint32_t		desc_index;
-};
-
 struct nand_ecclayout fake_ecc_layout;
 
 /*
@@ -1234,7 +1177,7 @@ int mxs_nand_init_spl(struct nand_chip *nand)
 	return 0;
 }
 
-int mxs_nand_init(struct mxs_nand_info *nand_info)
+int mxs_nand_init_ctrl(struct mxs_nand_info *nand_info)
 {
 	struct mtd_info *mtd;
 	struct nand_chip *nand;
@@ -1329,7 +1272,7 @@ void board_nand_init(void)
 	nand_info->use_minimum_ecc = true;
 #endif
 
-	if (mxs_nand_init(nand_info) < 0)
+	if (mxs_nand_init_ctrl(nand_info) < 0)
 		goto err;
 
 	return;
diff --git a/drivers/mtd/nand/mxs_nand.h b/drivers/mtd/nand/mxs_nand.h
index 379ed24f05..4bd65cded9 100644
--- a/drivers/mtd/nand/mxs_nand.h
+++ b/drivers/mtd/nand/mxs_nand.h
@@ -7,5 +7,67 @@
  * Stefan Agner <stefan.agner@toradex.com>
  */
 
+#include <linux/mtd/mtd.h>
+#include <asm/cache.h>
+#include <nand.h>
+#include <asm/mach-imx/dma.h>
+
+/**
+ * @gf_len:                   The length of Galois Field. (e.g., 13 or 14)
+ * @ecc_strength:             A number that describes the strength of the ECC
+ *                            algorithm.
+ * @ecc_chunk_size:           The size, in bytes, of a single ECC chunk. Note
+ *                            the first chunk in the page includes both data and
+ *                            metadata, so it's a bit larger than this value.
+ * @ecc_chunk_count:          The number of ECC chunks in the page,
+ * @block_mark_byte_offset:   The byte offset in the ECC-based page view at
+ *                            which the underlying physical block mark appears.
+ * @block_mark_bit_offset:    The bit offset into the ECC-based page view at
+ *                            which the underlying physical block mark appears.
+ */
+struct bch_geometry {
+	unsigned int  gf_len;
+	unsigned int  ecc_strength;
+	unsigned int  ecc_chunk_size;
+	unsigned int  ecc_chunk_count;
+	unsigned int  block_mark_byte_offset;
+	unsigned int  block_mark_bit_offset;
+};
+
+struct mxs_nand_info {
+	struct nand_chip chip;
+	struct udevice *dev;
+	unsigned int	max_ecc_strength_supported;
+	bool		use_minimum_ecc;
+	int		cur_chip;
+
+	uint32_t	cmd_queue_len;
+	uint32_t	data_buf_size;
+	struct bch_geometry bch_geometry;
+
+	uint8_t		*cmd_buf;
+	uint8_t		*data_buf;
+	uint8_t		*oob_buf;
+
+	uint8_t		marking_block_bad;
+	uint8_t		raw_oob_mode;
+
+	struct mxs_gpmi_regs *gpmi_regs;
+	struct mxs_bch_regs *bch_regs;
+
+	/* Functions with altered behaviour */
+	int		(*hooked_read_oob)(struct mtd_info *mtd,
+				loff_t from, struct mtd_oob_ops *ops);
+	int		(*hooked_write_oob)(struct mtd_info *mtd,
+				loff_t to, struct mtd_oob_ops *ops);
+	int		(*hooked_block_markbad)(struct mtd_info *mtd,
+				loff_t ofs);
+
+	/* DMA descriptors */
+	struct mxs_dma_desc	**desc;
+	uint32_t		desc_index;
+};
+
+int mxs_nand_init_ctrl(struct mxs_nand_info *nand_info);
 int mxs_nand_init_spl(struct nand_chip *nand);
 int mxs_nand_setup_ecc(struct mtd_info *mtd);

commit 39cdf33a937b486fd2e7dd275541aab80784b5d5
Author: Stefan Agner <stefan.agner@toradex.com>
Date:   Fri Jun 22 18:06:15 2018 +0200

    UPSTREAM: mtd: nand: mxs_nand: add use_minimum_ecc to struct
    
    Add use_minimum_ecc as struct mxs_nand_info field in preparation
    for device tree support.
    
    Change-Id: Idfda9d4b95e6091ca8a4ca1f9d0541f41d4fec95
    Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 502bdc6b4f52fff92d19b5072a60e8b8cbfb1c04)

diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c
index 6de0e96d98..d77c12d21e 100644
--- a/drivers/mtd/nand/mxs_nand.c
+++ b/drivers/mtd/nand/mxs_nand.c
@@ -72,6 +72,8 @@ struct bch_geometry {
 
 struct mxs_nand_info {
 	struct nand_chip chip;
+	unsigned int	max_ecc_strength_supported;
+	bool		use_minimum_ecc;
 	int		cur_chip;
 
 	uint32_t	cmd_queue_len;
@@ -216,19 +218,11 @@ static inline int mxs_nand_calc_mark_offset(struct bch_geometry *geo,
 	return 0;
 }
 
-static inline unsigned int mxs_nand_max_ecc_strength_supported(void)
-{
-	/* Refer to Chapter 17 for i.MX6DQ, Chapter 18 for i.MX6SX */
-	if (is_mx6sx() || is_mx7())
-		return 62;
-	else
-		return 40;
-}
-
 static inline int mxs_nand_calc_ecc_layout_by_info(struct bch_geometry *geo,
 						   struct mtd_info *mtd)
 {
 	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct mxs_nand_info *nand_info = nand_get_controller_data(chip);
 
 	if (!(chip->ecc_strength_ds > 0 && chip->ecc_step_ds > 0))
 		return -ENOTSUPP;
@@ -251,7 +245,7 @@ static inline int mxs_nand_calc_ecc_layout_by_info(struct bch_geometry *geo,
 	if (geo->ecc_chunk_size < mtd->oobsize)
 		return -EINVAL;
 
-	if (geo->ecc_strength > mxs_nand_max_ecc_strength_supported())
+	if (geo->ecc_strength > nand_info->max_ecc_strength_supported)
 		return -EINVAL;
 
 	geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunk_size;
@@ -262,6 +256,9 @@ static inline int mxs_nand_calc_ecc_layout_by_info(struct bch_geometry *geo,
 static inline int mxs_nand_calc_ecc_layout(struct bch_geometry *geo,
 					   struct mtd_info *mtd)
 {
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct mxs_nand_info *nand_info = nand_get_controller_data(chip);
+
 	/* The default for the length of Galois Field. */
 	geo->gf_len = 13;
 
@@ -293,7 +290,7 @@ static inline int mxs_nand_calc_ecc_layout(struct bch_geometry *geo,
 			/ (geo->gf_len * geo->ecc_chunk_count);
 
 	geo->ecc_strength = min(round_down(geo->ecc_strength, 2),
-				mxs_nand_max_ecc_strength_supported());
+				nand_info->max_ecc_strength_supported);
 
 	return 0;
 }
@@ -1043,9 +1040,8 @@ int mxs_nand_setup_ecc(struct mtd_info *mtd)
 	uint32_t tmp;
 	int ret = -ENOTSUPP;
 
-#ifdef CONFIG_NAND_MXS_USE_MINIMUM_ECC
-	ret = mxs_nand_calc_ecc_layout_by_info(geo, mtd);
-#endif
+	if (nand_info->use_minimum_ecc)
+		ret = mxs_nand_calc_ecc_layout_by_info(geo, mtd);
 
 	if (ret == -ENOTSUPP)
 		ret = mxs_nand_calc_ecc_layout(geo, mtd);
@@ -1323,6 +1319,16 @@ void board_nand_init(void)
 	nand_info->gpmi_regs = (struct mxs_gpmi_regs *)MXS_GPMI_BASE;
 	nand_info->bch_regs = (struct mxs_bch_regs *)MXS_BCH_BASE;
 
+	/* Refer to Chapter 17 for i.MX6DQ, Chapter 18 for i.MX6SX */
+	if (is_mx6sx() || is_mx7())
+		nand_info->max_ecc_strength_supported = 62;
+	else
+		nand_info->max_ecc_strength_supported = 40;
+
+#ifdef CONFIG_NAND_MXS_USE_MINIMUM_ECC
+	nand_info->use_minimum_ecc = true;
+#endif
+
 	if (mxs_nand_init(nand_info) < 0)
 		goto err;
 

commit 992747b31b2130f5d797f072b3b15669e764745e
Author: Stefan Agner <stefan.agner@toradex.com>
Date:   Fri Jun 22 18:06:14 2018 +0200

    UPSTREAM: mtd: nand: mxs_nand: separate board/controller init
    
    In preparation for device tree support separate board init
    from controller init similar to other raw NAND drivers.
    
    Change-Id: Iea6dddb96d3939a628731c4b089dccf04da10281
    Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 3b1328a0ad7624f7e7bd803d0709c7c2fd13fc46)

diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c
index 68dadb37a0..6de0e96d98 100644
--- a/drivers/mtd/nand/mxs_nand.c
+++ b/drivers/mtd/nand/mxs_nand.c
@@ -1238,31 +1238,21 @@ int mxs_nand_init_spl(struct nand_chip *nand)
 	return 0;
 }
 
-void board_nand_init(void)
+int mxs_nand_init(struct mxs_nand_info *nand_info)
 {
 	struct mtd_info *mtd;
-	struct mxs_nand_info *nand_info;
 	struct nand_chip *nand;
 	int err;
 
-	nand_info = malloc(sizeof(struct mxs_nand_info));
-	if (!nand_info) {
-		printf("MXS NAND: Failed to allocate private data\n");
-			return;
-	}
-	memset(nand_info, 0, sizeof(struct mxs_nand_info));
-
-	nand_info->gpmi_regs = (struct mxs_gpmi_regs *)MXS_GPMI_BASE;
-	nand_info->bch_regs = (struct mxs_bch_regs *)MXS_BCH_BASE;
 	nand = &nand_info->chip;
 	mtd = nand_to_mtd(nand);
 	err = mxs_nand_alloc_buffers(nand_info);
 	if (err)
-		goto err1;
+		return err;
 
 	err = mxs_nand_init_dma(nand_info);
 	if (err)
-		goto err2;
+		goto err_free_buffers;
 
 	memset(&fake_ecc_layout, 0, sizeof(fake_ecc_layout));
 
@@ -1286,10 +1276,10 @@ void board_nand_init(void)
 
 	/* first scan to find the device and get the page size */
 	if (nand_scan_ident(mtd, CONFIG_SYS_MAX_NAND_DEVICE, NULL))
-		goto err2;
+		goto err_free_buffers;
 
 	if (mxs_nand_setup_ecc(mtd))
-		goto err2;
+		goto err_free_buffers;
 
 	nand->ecc.read_page	= mxs_nand_ecc_read_page;
 	nand->ecc.write_page	= mxs_nand_ecc_write_page;
@@ -1304,18 +1294,40 @@ void board_nand_init(void)
 	/* second phase scan */
 	err = nand_scan_tail(mtd);
 	if (err)
-		goto err2;
+		goto err_free_buffers;
 
 	err = nand_register(0, mtd);
 	if (err)
-		goto err2;
+		goto err_free_buffers;
 
-	return;
+	return 0;
 
-err2:
+err_free_buffers:
 	free(nand_info->data_buf);
 	free(nand_info->cmd_buf);
-err1:
-	free(nand_info);
+
+	return err;
+}
+
+void board_nand_init(void)
+{
+	struct mxs_nand_info *nand_info;
+
+	nand_info = malloc(sizeof(struct mxs_nand_info));
+	if (!nand_info) {
+		printf("MXS NAND: Failed to allocate private data\n");
+			return;
+	}
+	memset(nand_info, 0, sizeof(struct mxs_nand_info));
+
+	nand_info->gpmi_regs = (struct mxs_gpmi_regs *)MXS_GPMI_BASE;
+	nand_info->bch_regs = (struct mxs_bch_regs *)MXS_BCH_BASE;
+
+	if (mxs_nand_init(nand_info) < 0)
+		goto err;
+
 	return;
+
+err:
+	free(nand_info);
 }

commit 848e2ace0e35d6da8c9dbf70f684be5fdc91e2db
Author: Stefan Agner <stefan.agner@toradex.com>
Date:   Fri Jun 22 18:06:13 2018 +0200

    UPSTREAM: mtd: nand: mxs_nand: use more precise function name
    
    This function initializes DMA descriptors so mxs_nand_init_dma is
    more precise. It also frees up the rather generic name mxs_nand_init.
    
    Change-Id: I84819ba8bf2f3d350795c79829c707ad86c38e46
    Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 0d4e9d8be23a30f5f1ca5bad2188e8a1c9848c5c)

diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c
index 8a3c756c72..68dadb37a0 100644
--- a/drivers/mtd/nand/mxs_nand.c
+++ b/drivers/mtd/nand/mxs_nand.c
@@ -1138,7 +1138,7 @@ int mxs_nand_alloc_buffers(struct mxs_nand_info *nand_info)
 /*
  * Initializes the NFC hardware.
  */
-int mxs_nand_init(struct mxs_nand_info *info)
+int mxs_nand_init_dma(struct mxs_nand_info *info)
 {
 	int i = 0, j, ret = 0;
 
@@ -1213,7 +1213,7 @@ int mxs_nand_init_spl(struct nand_chip *nand)
 	if (err)
 		return err;
 
-	err = mxs_nand_init(nand_info);
+	err = mxs_nand_init_dma(nand_info);
 	if (err)
 		return err;
 
@@ -1260,7 +1260,7 @@ void board_nand_init(void)
 	if (err)
 		goto err1;
 
-	err = mxs_nand_init(nand_info);
+	err = mxs_nand_init_dma(nand_info);
 	if (err)
 		goto err2;
 

commit e704b80e3a5f478fc271fd3489c33c57370905de
Author: Stefan Agner <stefan.agner@toradex.com>
Date:   Fri Jun 22 18:06:12 2018 +0200

    UPSTREAM: mtd: nand: mxs_nand: move register structs to driver data
    
    Move GPMI and BCH register structs to the driver struct mxs_nand_info
    in prepartion for device tree support.
    
    Change-Id: Ic38e32a629d666dbbcf1593c39e54bd1bc35bab1
    Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 931747e517b19387716cd56057e4afa9e2cdfff4)

diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c
index cefc863166..8a3c756c72 100644
--- a/drivers/mtd/nand/mxs_nand.c
+++ b/drivers/mtd/nand/mxs_nand.c
@@ -85,6 +85,9 @@ struct mxs_nand_info {
 	uint8_t		marking_block_bad;
 	uint8_t		raw_oob_mode;
 
+	struct mxs_gpmi_regs *gpmi_regs;
+	struct mxs_bch_regs *bch_regs;
+
 	/* Functions with altered behaviour */
 	int		(*hooked_read_oob)(struct mtd_info *mtd,
 				loff_t from, struct mtd_oob_ops *ops);
@@ -298,16 +301,15 @@ static inline int mxs_nand_calc_ecc_layout(struct bch_geometry *geo,
 /*
  * Wait for BCH complete IRQ and clear the IRQ
  */
-static int mxs_nand_wait_for_bch_complete(void)
+static int mxs_nand_wait_for_bch_complete(struct mxs_nand_info *nand_info)
 {
-	struct mxs_bch_regs *bch_regs = (struct mxs_bch_regs *)MXS_BCH_BASE;
 	int timeout = MXS_NAND_BCH_TIMEOUT;
 	int ret;
 
-	ret = mxs_wait_mask_set(&bch_regs->hw_bch_ctrl_reg,
+	ret = mxs_wait_mask_set(&nand_info->bch_regs->hw_bch_ctrl_reg,
 		BCH_CTRL_COMPLETE_IRQ, timeout);
 
-	writel(BCH_CTRL_COMPLETE_IRQ, &bch_regs->hw_bch_ctrl_clr);
+	writel(BCH_CTRL_COMPLETE_IRQ, &nand_info->bch_regs->hw_bch_ctrl_clr);
 
 	return ret;
 }
@@ -405,11 +407,9 @@ static int mxs_nand_device_ready(struct mtd_info *mtd)
 {
 	struct nand_chip *chip = mtd_to_nand(mtd);
 	struct mxs_nand_info *nand_info = nand_get_controller_data(chip);
-	struct mxs_gpmi_regs *gpmi_regs =
-		(struct mxs_gpmi_regs *)MXS_GPMI_BASE;
 	uint32_t tmp;
 
-	tmp = readl(&gpmi_regs->hw_gpmi_stat);
+	tmp = readl(&nand_info->gpmi_regs->hw_gpmi_stat);
 	tmp >>= (GPMI_STAT_READY_BUSY_OFFSET + nand_info->cur_chip);
 
 	return tmp & 1;
@@ -706,7 +706,7 @@ static int mxs_nand_ecc_read_page(struct mtd_info *mtd, struct nand_chip *nand,
 		goto rtn;
 	}
 
-	ret = mxs_nand_wait_for_bch_complete();
+	ret = mxs_nand_wait_for_bch_complete(nand_info);
 	if (ret) {
 		printf("MXS NAND: BCH read timeout\n");
 		goto rtn;
@@ -814,7 +814,7 @@ static int mxs_nand_ecc_write_page(struct mtd_info *mtd,
 		goto rtn;
 	}
 
-	ret = mxs_nand_wait_for_bch_complete();
+	ret = mxs_nand_wait_for_bch_complete(nand_info);
 	if (ret) {
 		printf("MXS NAND: BCH write timeout\n");
 		goto rtn;
@@ -1039,7 +1039,7 @@ int mxs_nand_setup_ecc(struct mtd_info *mtd)
 	struct nand_chip *nand = mtd_to_nand(mtd);
 	struct mxs_nand_info *nand_info = nand_get_controller_data(nand);
 	struct bch_geometry *geo = &nand_info->bch_geometry;
-	struct mxs_bch_regs *bch_regs = (struct mxs_bch_regs *)MXS_BCH_BASE;
+	struct mxs_bch_regs *bch_regs = nand_info->bch_regs;
 	uint32_t tmp;
 	int ret = -ENOTSUPP;
 
@@ -1140,10 +1140,6 @@ int mxs_nand_alloc_buffers(struct mxs_nand_info *nand_info)
  */
 int mxs_nand_init(struct mxs_nand_info *info)
 {
-	struct mxs_gpmi_regs *gpmi_regs =
-		(struct mxs_gpmi_regs *)MXS_GPMI_BASE;
-	struct mxs_bch_regs *bch_regs =
-		(struct mxs_bch_regs *)MXS_BCH_BASE;
 	int i = 0, j, ret = 0;
 
 	info->desc = malloc(sizeof(struct mxs_dma_desc *) *
@@ -1172,14 +1168,14 @@ int mxs_nand_init(struct mxs_nand_info *info)
 	}
 
 	/* Reset the GPMI block. */
-	mxs_reset_block(&gpmi_regs->hw_gpmi_ctrl0_reg);
-	mxs_reset_block(&bch_regs->hw_bch_ctrl_reg);
+	mxs_reset_block(&info->gpmi_regs->hw_gpmi_ctrl0_reg);
+	mxs_reset_block(&info->bch_regs->hw_bch_ctrl_reg);
 
 	/*
 	 * Choose NAND mode, set IRQ polarity, disable write protection and
 	 * select BCH ECC.
 	 */
-	clrsetbits_le32(&gpmi_regs->hw_gpmi_ctrl1,
+	clrsetbits_le32(&info->gpmi_regs->hw_gpmi_ctrl1,
 			GPMI_CTRL1_GPMI_MODE,
 			GPMI_CTRL1_ATA_IRQRDY_POLARITY | GPMI_CTRL1_DEV_RESET |
 			GPMI_CTRL1_BCH_MODE);
@@ -1211,6 +1207,8 @@ int mxs_nand_init_spl(struct nand_chip *nand)
 	}
 	memset(nand_info, 0, sizeof(struct mxs_nand_info));
 
+	nand_info->gpmi_regs = (struct mxs_gpmi_regs *)MXS_GPMI_BASE;
+	nand_info->bch_regs = (struct mxs_bch_regs *)MXS_BCH_BASE;
 	err = mxs_nand_alloc_buffers(nand_info);
 	if (err)
 		return err;
@@ -1254,6 +1252,8 @@ void board_nand_init(void)
 	}
 	memset(nand_info, 0, sizeof(struct mxs_nand_info));
 
+	nand_info->gpmi_regs = (struct mxs_gpmi_regs *)MXS_GPMI_BASE;
+	nand_info->bch_regs = (struct mxs_bch_regs *)MXS_BCH_BASE;
 	nand = &nand_info->chip;
 	mtd = nand_to_mtd(nand);
 	err = mxs_nand_alloc_buffers(nand_info);

commit 6d69683085d27d1bb06812a72eec413700e3d216
Author: Stefan Agner <stefan.agner@toradex.com>
Date:   Fri Jun 22 17:19:51 2018 +0200

    UPSTREAM: mtd: nand: mxs_nand: add minimal ECC support
    
    Add support for minimum ECC strength supported by the NAND chip.
    This aligns with the behavior when using the fsl,use-minimum-ecc
    device tree property in Linux.
    
    Change-Id: Id687fc1d9ce8c18ffb5ff387b08a486d220a34e8
    Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 984df7add1fe6e5a25854eae81f51940806456bc)

diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index f8fd800a87..310c6010c1 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -175,6 +175,14 @@ config NAND_MXS
 	  This enables NAND driver for the NAND flash controller on the
 	  MXS processors.
 
+if NAND_MXS
+
+config NAND_MXS_USE_MINIMUM_ECC
+	bool "Use minimum ECC strength supported by the controller"
+	default false
+
+endif
+
 config NAND_ZYNQ
 	bool "Support for Zynq Nand controller"
 	select SYS_NAND_SELF_INIT
diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c
index 0d842653df..cefc863166 100644
--- a/drivers/mtd/nand/mxs_nand.c
+++ b/drivers/mtd/nand/mxs_nand.c
@@ -16,6 +16,7 @@
 #include <common.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/rawnand.h>
+#include <linux/sizes.h>
 #include <linux/types.h>
 #include <malloc.h>
 #include <nand.h>
@@ -212,11 +213,52 @@ static inline int mxs_nand_calc_mark_offset(struct bch_geometry *geo,
 	return 0;
 }
 
+static inline unsigned int mxs_nand_max_ecc_strength_supported(void)
+{
+	/* Refer to Chapter 17 for i.MX6DQ, Chapter 18 for i.MX6SX */
+	if (is_mx6sx() || is_mx7())
+		return 62;
+	else
+		return 40;
+}
+
+static inline int mxs_nand_calc_ecc_layout_by_info(struct bch_geometry *geo,
+						   struct mtd_info *mtd)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+
+	if (!(chip->ecc_strength_ds > 0 && chip->ecc_step_ds > 0))
+		return -ENOTSUPP;
+
+	switch (chip->ecc_step_ds) {
+	case SZ_512:
+		geo->gf_len = 13;
+		break;
+	case SZ_1K:
+		geo->gf_len = 14;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	geo->ecc_chunk_size = chip->ecc_step_ds;
+	geo->ecc_strength = round_up(chip->ecc_strength_ds, 2);
+
+	/* Keep the C >= O */
+	if (geo->ecc_chunk_size < mtd->oobsize)
+		return -EINVAL;
+
+	if (geo->ecc_strength > mxs_nand_max_ecc_strength_supported())
+		return -EINVAL;
+
+	geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunk_size;
+
+	return 0;
+}
+
 static inline int mxs_nand_calc_ecc_layout(struct bch_geometry *geo,
 					   struct mtd_info *mtd)
 {
-	unsigned int max_ecc_strength_supported;
-
 	/* The default for the length of Galois Field. */
 	geo->gf_len = 13;
 
@@ -236,12 +278,6 @@ static inline int mxs_nand_calc_ecc_layout(struct bch_geometry *geo,
 
 	geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunk_size;
 
-	/* Refer to Chapter 17 for i.MX6DQ, Chapter 18 for i.MX6SX */
-	if (is_mx6sx() || is_mx7())
-		max_ecc_strength_supported = 62;
-	else
-		max_ecc_strength_supported = 40;
-
 	/*
 	 * Determine the ECC layout with the formula:
 	 *	ECC bits per chunk = (total page spare data bits) /
@@ -253,10 +289,8 @@ static inline int mxs_nand_calc_ecc_layout(struct bch_geometry *geo,
 	geo->ecc_strength = ((mtd->oobsize - MXS_NAND_METADATA_SIZE) * 8)
 			/ (geo->gf_len * geo->ecc_chunk_count);
 
-	geo->ecc_strength = min(round_down(geo->ecc_strength, 2), max_ecc_strength_supported);
-
-	if (mxs_nand_calc_mark_offset(geo, mtd->writesize) < 0)
-		return -EINVAL;
+	geo->ecc_strength = min(round_down(geo->ecc_strength, 2),
+				mxs_nand_max_ecc_strength_supported());
 
 	return 0;
 }
@@ -1007,9 +1041,19 @@ int mxs_nand_setup_ecc(struct mtd_info *mtd)
 	struct bch_geometry *geo = &nand_info->bch_geometry;
 	struct mxs_bch_regs *bch_regs = (struct mxs_bch_regs *)MXS_BCH_BASE;
 	uint32_t tmp;
+	int ret = -ENOTSUPP;
 
-	if (mxs_nand_calc_ecc_layout(geo, mtd))
-		return -EINVAL;
+#ifdef CONFIG_NAND_MXS_USE_MINIMUM_ECC
+	ret = mxs_nand_calc_ecc_layout_by_info(geo, mtd);
+#endif
+
+	if (ret == -ENOTSUPP)
+		ret = mxs_nand_calc_ecc_layout(geo, mtd);
+
+	if (ret)
+		return ret;
+
+	mxs_nand_calc_mark_offset(geo, mtd->writesize);
 
 	/* Configure BCH and set NFC geometry */
 	mxs_reset_block(&bch_regs->hw_bch_ctrl_reg);

commit 468b89443e4ebb10575666feb611e9daba23e472
Author: Stefan Agner <stefan.agner@toradex.com>
Date:   Fri Jun 22 17:19:50 2018 +0200

    UPSTREAM: mtd: nand: mxs_nand: report correct ECC parameters
    
    Report correct ECC parameters back to the stack. Do not report
    bytes as we have it not immeaditly available and the Linux version
    also does not report it. It seems to have no aversive effect.
    
    Change-Id: Iacb4717a287b40bc301c31b7ab5b8c93be3c209b
    Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 5c69dd0730ff6bcad16e86fd93bf7a914d988a22)

diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c
index 2f194e00af..0d842653df 100644
--- a/drivers/mtd/nand/mxs_nand.c
+++ b/drivers/mtd/nand/mxs_nand.c
@@ -1254,9 +1254,8 @@ void board_nand_init(void)
 
 	nand->ecc.layout	= &fake_ecc_layout;
 	nand->ecc.mode		= NAND_ECC_HW;
-	nand->ecc.bytes		= 9;
-	nand->ecc.size		= 512;
-	nand->ecc.strength	= 8;
+	nand->ecc.size		= nand_info->bch_geometry.ecc_chunk_size;
+	nand->ecc.strength	= nand_info->bch_geometry.ecc_strength;
 
 	/* second phase scan */
 	err = nand_scan_tail(mtd);

commit 0ae359f4f0a3736003c887d1f628df28745ef656
Author: Stefan Agner <stefan.agner@toradex.com>
Date:   Fri Jun 22 17:19:49 2018 +0200

    UPSTREAM: mtd: nand: mxs_nand: use structure for BCH geometry
    
    Calculate BCH geometry at start and store the information in
    a structure. This avoids recalculation on every page access
    and allows to calculate ECC relevant information in one place.
    This patch does not change ECC layout or driver behavior in
    any way.
    
    The patch aligns the driver somewhat with the Linux GPMI NAND
    driver which drives the same IP.
    
    Change-Id: Ia89d8c67ed0016e1f0da29d84ac90d477b16385e
    Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 28897e8d21f8e197e259a91c693de09cd81f2d5a)

diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c
index 121a678a4e..2f194e00af 100644
--- a/drivers/mtd/nand/mxs_nand.c
+++ b/drivers/mtd/nand/mxs_nand.c
@@ -31,7 +31,6 @@
 
 #define	MXS_NAND_DMA_DESCRIPTOR_COUNT		4
 
-#define	MXS_NAND_CHUNK_DATA_CHUNK_SIZE		512
 #if (defined(CONFIG_MX6) || defined(CONFIG_MX7))
 #define	MXS_NAND_CHUNK_DATA_CHUNK_SIZE_SHIFT	2
 #else
@@ -48,12 +47,35 @@
 
 #define	MXS_NAND_BCH_TIMEOUT			10000
 
+/**
+ * @gf_len:                   The length of Galois Field. (e.g., 13 or 14)
+ * @ecc_strength:             A number that describes the strength of the ECC
+ *                            algorithm.
+ * @ecc_chunk_size:           The size, in bytes, of a single ECC chunk. Note
+ *                            the first chunk in the page includes both data and
+ *                            metadata, so it's a bit larger than this value.
+ * @ecc_chunk_count:          The number of ECC chunks in the page,
+ * @block_mark_byte_offset:   The byte offset in the ECC-based page view at
+ *                            which the underlying physical block mark appears.
+ * @block_mark_bit_offset:    The bit offset into the ECC-based page view at
+ *                            which the underlying physical block mark appears.
+ */
+struct bch_geometry {
+	unsigned int  gf_len;
+	unsigned int  ecc_strength;
+	unsigned int  ecc_chunk_size;
+	unsigned int  ecc_chunk_count;
+	unsigned int  block_mark_byte_offset;
+	unsigned int  block_mark_bit_offset;
+};
+
 struct mxs_nand_info {
 	struct nand_chip chip;
 	int		cur_chip;
 
 	uint32_t	cmd_queue_len;
 	uint32_t	data_buf_size;
+	struct bch_geometry bch_geometry;
 
 	uint8_t		*cmd_buf;
 	uint8_t		*data_buf;
@@ -76,8 +98,6 @@ struct mxs_nand_info {
 };
 
 struct nand_ecclayout fake_ecc_layout;
-static int chunk_data_size = MXS_NAND_CHUNK_DATA_CHUNK_SIZE;
-static int galois_field = 13;
 
 /*
  * Cache management functions
@@ -138,61 +158,21 @@ static void mxs_nand_return_dma_descs(struct mxs_nand_info *info)
 	info->desc_index = 0;
 }
 
-static uint32_t mxs_nand_ecc_chunk_cnt(uint32_t page_data_size)
-{
-	return page_data_size / chunk_data_size;
-}
-
-static uint32_t mxs_nand_ecc_size_in_bits(uint32_t ecc_strength)
-{
-	return ecc_strength * galois_field;
-}
-
 static uint32_t mxs_nand_aux_status_offset(void)
 {
 	return (MXS_NAND_METADATA_SIZE + 0x3) & ~0x3;
 }
 
-static inline uint32_t mxs_nand_get_ecc_strength(uint32_t page_data_size,
-						uint32_t page_oob_size)
+static inline int mxs_nand_calc_mark_offset(struct bch_geometry *geo,
+					    uint32_t page_data_size)
 {
-	int ecc_strength;
-	int max_ecc_strength_supported;
-
-	/* Refer to Chapter 17 for i.MX6DQ, Chapter 18 for i.MX6SX */
-	if (is_mx6sx() || is_mx7())
-		max_ecc_strength_supported = 62;
-	else
-		max_ecc_strength_supported = 40;
-
-	/*
-	 * Determine the ECC layout with the formula:
-	 *	ECC bits per chunk = (total page spare data bits) /
-	 *		(bits per ECC level) / (chunks per page)
-	 * where:
-	 *	total page spare data bits =
-	 *		(page oob size - meta data size) * (bits per byte)
-	 */
-	ecc_strength = ((page_oob_size - MXS_NAND_METADATA_SIZE) * 8)
-			/ (galois_field *
-			   mxs_nand_ecc_chunk_cnt(page_data_size));
-
-	return min(round_down(ecc_strength, 2), max_ecc_strength_supported);
-}
-
-static inline uint32_t mxs_nand_get_mark_offset(uint32_t page_data_size,
-						uint32_t ecc_strength)
-{
-	uint32_t chunk_data_size_in_bits;
-	uint32_t chunk_ecc_size_in_bits;
+	uint32_t chunk_data_size_in_bits = geo->ecc_chunk_size * 8;
+	uint32_t chunk_ecc_size_in_bits = geo->ecc_strength * geo->gf_len;
 	uint32_t chunk_total_size_in_bits;
 	uint32_t block_mark_chunk_number;
 	uint32_t block_mark_chunk_bit_offset;
 	uint32_t block_mark_bit_offset;
 
-	chunk_data_size_in_bits = chunk_data_size * 8;
-	chunk_ecc_size_in_bits  = mxs_nand_ecc_size_in_bits(ecc_strength);
-
 	chunk_total_size_in_bits =
 			chunk_data_size_in_bits + chunk_ecc_size_in_bits;
 
@@ -217,7 +197,7 @@ static inline uint32_t mxs_nand_get_mark_offset(uint32_t page_data_size,
 			(block_mark_chunk_number * chunk_total_size_in_bits);
 
 	if (block_mark_chunk_bit_offset > chunk_data_size_in_bits)
-		return 1;
+		return -EINVAL;
 
 	/*
 	 * Now that we know the chunk number in which the block mark appears,
@@ -226,21 +206,59 @@ static inline uint32_t mxs_nand_get_mark_offset(uint32_t page_data_size,
 	block_mark_bit_offset -=
 		block_mark_chunk_number * chunk_ecc_size_in_bits;
 
-	return block_mark_bit_offset;
-}
+	geo->block_mark_byte_offset = block_mark_bit_offset >> 3;
+	geo->block_mark_bit_offset = block_mark_bit_offset & 0x7;
 
-static uint32_t mxs_nand_mark_byte_offset(struct mtd_info *mtd)
-{
-	uint32_t ecc_strength;
-	ecc_strength = mxs_nand_get_ecc_strength(mtd->writesize, mtd->oobsize);
-	return mxs_nand_get_mark_offset(mtd->writesize, ecc_strength) >> 3;
+	return 0;
 }
 
-static uint32_t mxs_nand_mark_bit_offset(struct mtd_info *mtd)
+static inline int mxs_nand_calc_ecc_layout(struct bch_geometry *geo,
+					   struct mtd_info *mtd)
 {
-	uint32_t ecc_strength;
-	ecc_strength = mxs_nand_get_ecc_strength(mtd->writesize, mtd->oobsize);
-	return mxs_nand_get_mark_offset(mtd->writesize, ecc_strength) & 0x7;
+	unsigned int max_ecc_strength_supported;
+
+	/* The default for the length of Galois Field. */
+	geo->gf_len = 13;
+
+	/* The default for chunk size. */
+	geo->ecc_chunk_size = 512;
+
+	if (geo->ecc_chunk_size < mtd->oobsize) {
+		geo->gf_len = 14;
+		geo->ecc_chunk_size *= 2;
+	}
+
+	if (mtd->oobsize > geo->ecc_chunk_size) {
+		printf("Not support the NAND chips whose oob size is larger then %d bytes!\n",
+		       geo->ecc_chunk_size);
+		return -EINVAL;
+	}
+
+	geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunk_size;
+
+	/* Refer to Chapter 17 for i.MX6DQ, Chapter 18 for i.MX6SX */
+	if (is_mx6sx() || is_mx7())
+		max_ecc_strength_supported = 62;
+	else
+		max_ecc_strength_supported = 40;
+
+	/*
+	 * Determine the ECC layout with the formula:
+	 *	ECC bits per chunk = (total page spare data bits) /
+	 *		(bits per ECC level) / (chunks per page)
+	 * where:
+	 *	total page spare data bits =
+	 *		(page oob size - meta data size) * (bits per byte)
+	 */
+	geo->ecc_strength = ((mtd->oobsize - MXS_NAND_METADATA_SIZE) * 8)
+			/ (geo->gf_len * geo->ecc_chunk_count);
+
+	geo->ecc_strength = min(round_down(geo->ecc_strength, 2), max_ecc_strength_supported);
+
+	if (mxs_nand_calc_mark_offset(geo, mtd->writesize) < 0)
+		return -EINVAL;
+
+	return 0;
 }
 
 /*
@@ -381,18 +399,15 @@ static void mxs_nand_select_chip(struct mtd_info *mtd, int chip)
  * swapping the block mark, or swapping it *back* -- but it doesn't matter
  * because the the operation is the same.
  */
-static void mxs_nand_swap_block_mark(struct mtd_info *mtd,
-					uint8_t *data_buf, uint8_t *oob_buf)
+static void mxs_nand_swap_block_mark(struct bch_geometry *geo,
+				     uint8_t *data_buf, uint8_t *oob_buf)
 {
-	uint32_t bit_offset;
-	uint32_t buf_offset;
+	uint32_t bit_offset = geo->block_mark_bit_offset;
+	uint32_t buf_offset = geo->block_mark_byte_offset;
 
 	uint32_t src;
 	uint32_t dst;
 
-	bit_offset = mxs_nand_mark_bit_offset(mtd);
-	buf_offset = mxs_nand_mark_byte_offset(mtd);
-
 	/*
 	 * Get the byte from the data area that overlays the block mark. Since
 	 * the ECC engine applies its own view to the bits in the page, the
@@ -568,6 +583,7 @@ static int mxs_nand_ecc_read_page(struct mtd_info *mtd, struct nand_chip *nand,
 					int page)
 {
 	struct mxs_nand_info *nand_info = nand_get_controller_data(nand);
+	struct bch_geometry *geo = &nand_info->bch_geometry;
 	struct mxs_dma_desc *d;
 	uint32_t channel = MXS_DMA_CHANNEL_AHB_APBH_GPMI0 + nand_info->cur_chip;
 	uint32_t corrected = 0, failed = 0;
@@ -666,11 +682,11 @@ static int mxs_nand_ecc_read_page(struct mtd_info *mtd, struct nand_chip *nand,
 	mxs_nand_inval_data_buf(nand_info);
 
 	/* Read DMA completed, now do the mark swapping. */
-	mxs_nand_swap_block_mark(mtd, nand_info->data_buf, nand_info->oob_buf);
+	mxs_nand_swap_block_mark(geo, nand_info->data_buf, nand_info->oob_buf);
 
 	/* Loop over status bytes, accumulating ECC status. */
 	status = nand_info->oob_buf + mxs_nand_aux_status_offset();
-	for (i = 0; i < mxs_nand_ecc_chunk_cnt(mtd->writesize); i++) {
+	for (i = 0; i < geo->ecc_chunk_count; i++) {
 		if (status[i] == 0x00)
 			continue;
 
@@ -718,6 +734,7 @@ static int mxs_nand_ecc_write_page(struct mtd_info *mtd,
 				int oob_required, int page)
 {
 	struct mxs_nand_info *nand_info = nand_get_controller_data(nand);
+	struct bch_geometry *geo = &nand_info->bch_geometry;
 	struct mxs_dma_desc *d;
 	uint32_t channel = MXS_DMA_CHANNEL_AHB_APBH_GPMI0 + nand_info->cur_chip;
 	int ret;
@@ -726,7 +743,7 @@ static int mxs_nand_ecc_write_page(struct mtd_info *mtd,
 	memcpy(nand_info->oob_buf, nand->oob_poi, mtd->oobsize);
 
 	/* Handle block mark swapping. */
-	mxs_nand_swap_block_mark(mtd, nand_info->data_buf, nand_info->oob_buf);
+	mxs_nand_swap_block_mark(geo, nand_info->data_buf, nand_info->oob_buf);
 
 	/* Compile the DMA descriptor - write data. */
 	d = mxs_nand_get_dma_desc(nand_info);
@@ -987,39 +1004,30 @@ int mxs_nand_setup_ecc(struct mtd_info *mtd)
 {
 	struct nand_chip *nand = mtd_to_nand(mtd);
 	struct mxs_nand_info *nand_info = nand_get_controller_data(nand);
+	struct bch_geometry *geo = &nand_info->bch_geometry;
 	struct mxs_bch_regs *bch_regs = (struct mxs_bch_regs *)MXS_BCH_BASE;
 	uint32_t tmp;
 
-	if (mtd->oobsize > MXS_NAND_CHUNK_DATA_CHUNK_SIZE) {
-		galois_field = 14;
-		chunk_data_size = MXS_NAND_CHUNK_DATA_CHUNK_SIZE * 2;
-	}
-
-	if (mtd->oobsize > chunk_data_size) {
-		printf("Not support the NAND chips whose oob size is larger then %d bytes!\n", chunk_data_size);
+	if (mxs_nand_calc_ecc_layout(geo, mtd))
 		return -EINVAL;
-	}
 
 	/* Configure BCH and set NFC geometry */
 	mxs_reset_block(&bch_regs->hw_bch_ctrl_reg);
 
 	/* Configure layout 0 */
-	tmp = (mxs_nand_ecc_chunk_cnt(mtd->writesize) - 1)
-		<< BCH_FLASHLAYOUT0_NBLOCKS_OFFSET;
+	tmp = (geo->ecc_chunk_count - 1) << BCH_FLASHLAYOUT0_NBLOCKS_OFFSET;
 	tmp |= MXS_NAND_METADATA_SIZE << BCH_FLASHLAYOUT0_META_SIZE_OFFSET;
-	tmp |= (mxs_nand_get_ecc_strength(mtd->writesize, mtd->oobsize) >> 1)
-		<< BCH_FLASHLAYOUT0_ECC0_OFFSET;
-	tmp |= chunk_data_size >> MXS_NAND_CHUNK_DATA_CHUNK_SIZE_SHIFT;
-	tmp |= (14 == galois_field ? 1 : 0) <<
+	tmp |= (geo->ecc_strength >> 1) << BCH_FLASHLAYOUT0_ECC0_OFFSET;
+	tmp |= geo->ecc_chunk_size >> MXS_NAND_CHUNK_DATA_CHUNK_SIZE_SHIFT;
+	tmp |= (geo->gf_len == 14 ? 1 : 0) <<
 		BCH_FLASHLAYOUT0_GF13_0_GF14_1_OFFSET;
 	writel(tmp, &bch_regs->hw_bch_flash0layout0);
 
 	tmp = (mtd->writesize + mtd->oobsize)
 		<< BCH_FLASHLAYOUT1_PAGE_SIZE_OFFSET;
-	tmp |= (mxs_nand_get_ecc_strength(mtd->writesize, mtd->oobsize) >> 1)
-		<< BCH_FLASHLAYOUT1_ECCN_OFFSET;
-	tmp |= chunk_data_size >> MXS_NAND_CHUNK_DATA_CHUNK_SIZE_SHIFT;
-	tmp |= (14 == galois_field ? 1 : 0) <<
+	tmp |= (geo->ecc_strength >> 1) << BCH_FLASHLAYOUT1_ECCN_OFFSET;
+	tmp |= geo->ecc_chunk_size >> MXS_NAND_CHUNK_DATA_CHUNK_SIZE_SHIFT;
+	tmp |= (geo->gf_len == 14 ? 1 : 0) <<
 		BCH_FLASHLAYOUT1_GF13_0_GF14_1_OFFSET;
 	writel(tmp, &bch_regs->hw_bch_flash0layout1);
 

commit 8b8c820674bba3f5c36da59315137a2f7ae853db
Author: Stefan Agner <stefan.agner@toradex.com>
Date:   Fri Jun 22 17:19:48 2018 +0200

    UPSTREAM: mtd: nand: mxs_nand: allow to enable BBT support
    
    Add config option which allows to enable on flash bad block table
    support. This has the same effect as when using the device tree
    property "nand-on-flash-bbt" in Linux.
    
    Change-Id: If72080027de5d703ba3609e9fc5f6a791bcc7b01
    Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit dc0b69fa9f97df90cbcabf16a51d7eb88f26cd2d)

diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c
index d577ad82c5..121a678a4e 100644
--- a/drivers/mtd/nand/mxs_nand.c
+++ b/drivers/mtd/nand/mxs_nand.c
@@ -1214,6 +1214,10 @@ void board_nand_init(void)
 
 	memset(&fake_ecc_layout, 0, sizeof(fake_ecc_layout));
 
+#ifdef CONFIG_SYS_NAND_USE_FLASH_BBT
+	nand->bbt_options |= NAND_BBT_USE_FLASH | NAND_BBT_NO_OOB;
+#endif
+
 	nand_set_controller_data(nand, nand_info);
 	nand->options |= NAND_NO_SUBPAGE_WRITE;
 

commit 0039efa1057ef3360bd9087bef9723812a6219bf
Author: Stefan Agner <stefan.agner@toradex.com>
Date:   Fri Jun 22 17:19:47 2018 +0200

    UPSTREAM: mtd: nand: mxs_nand: use self init
    
    Instead of completing initialization via scan_bbt callback use
    NAND self init to initialize the GPMI (MXS) NAND controller.
    
    Suggested-by: Scott Wood <oss@buserror.net>
    Change-Id: I27a3a5c32edd3f5c27dd7385875656cc1c6ece62
    Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 5346c31e305a37d39f535cc0d5ae87d8b7e81230)

diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 1302108476..f8fd800a87 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -166,6 +166,7 @@ config NAND_MXC
 config NAND_MXS
 	bool "MXS NAND support"
 	depends on MX23 || MX28 || MX6 || MX7
+	select SYS_NAND_SELF_INIT
 	imply CMD_NAND
 	select APBH_DMA
 	select APBH_DMA_BURST if ARCH_MX6 || ARCH_MX7
diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c
index 5fd8db2c51..d577ad82c5 100644
--- a/drivers/mtd/nand/mxs_nand.c
+++ b/drivers/mtd/nand/mxs_nand.c
@@ -18,6 +18,7 @@
 #include <linux/mtd/rawnand.h>
 #include <linux/types.h>
 #include <malloc.h>
+#include <nand.h>
 #include <linux/errno.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
@@ -48,6 +49,7 @@
 #define	MXS_NAND_BCH_TIMEOUT			10000
 
 struct mxs_nand_info {
+	struct nand_chip chip;
 	int		cur_chip;
 
 	uint32_t	cmd_queue_len;
@@ -973,20 +975,15 @@ static int mxs_nand_block_bad(struct mtd_info *mtd, loff_t ofs)
 }
 
 /*
- * Nominally, the purpose of this function is to look for or create the bad
- * block table. In fact, since the we call this function at the very end of
- * the initialization process started by nand_scan(), and we doesn't have a
- * more formal mechanism, we "hook" this function to continue init process.
- *
  * At this point, the physical NAND Flash chips have been identified and
  * counted, so we know the physical geometry. This enables us to make some
  * important configuration decisions.
  *
  * The return value of this function propagates directly back to this driver's
- * call to nand_scan(). Anything other than zero will cause this driver to
+ * board_nand_init(). Anything other than zero will cause this driver to
  * tear everything down and declare failure.
  */
-static int mxs_nand_scan_bbt(struct mtd_info *mtd)
+int mxs_nand_setup_ecc(struct mtd_info *mtd)
 {
 	struct nand_chip *nand = mtd_to_nand(mtd);
 	struct mxs_nand_info *nand_info = nand_get_controller_data(nand);
@@ -1048,8 +1045,7 @@ static int mxs_nand_scan_bbt(struct mtd_info *mtd)
 		mtd->_block_markbad = mxs_nand_hook_block_markbad;
 	}
 
-	/* We use the reference implementation for bad block management. */
-	return nand_default_bbt(mtd);
+	return 0;
 }
 
 /*
@@ -1178,7 +1174,6 @@ int mxs_nand_init_spl(struct nand_chip *nand)
 	nand->cmd_ctrl		= mxs_nand_cmd_ctrl;
 	nand->dev_ready		= mxs_nand_device_ready;
 	nand->select_chip	= mxs_nand_select_chip;
-	nand->scan_bbt		= mxs_nand_scan_bbt;
 
 	nand->read_byte		= mxs_nand_read_byte;
 	nand->read_buf		= mxs_nand_read_buf;
@@ -1193,27 +1188,22 @@ int mxs_nand_init_spl(struct nand_chip *nand)
 	return 0;
 }
 
-/*!
- * This function is called during the driver binding process.
- *
- * @param   pdev  the device structure used to store device specific
- *                information that is used by the suspend, resume and
- *                remove functions
- *
- * @return  The function always returns 0.
- */
-int board_nand_init(struct nand_chip *nand)
+void board_nand_init(void)
 {
+	struct mtd_info *mtd;
 	struct mxs_nand_info *nand_info;
+	struct nand_chip *nand;
 	int err;
 
 	nand_info = malloc(sizeof(struct mxs_nand_info));
 	if (!nand_info) {
 		printf("MXS NAND: Failed to allocate private data\n");
-		return -ENOMEM;
+			return;
 	}
 	memset(nand_info, 0, sizeof(struct mxs_nand_info));
 
+	nand = &nand_info->chip;
+	mtd = nand_to_mtd(nand);
 	err = mxs_nand_alloc_buffers(nand_info);
 	if (err)
 		goto err1;
@@ -1232,13 +1222,19 @@ int board_nand_init(struct nand_chip *nand)
 	nand->dev_ready		= mxs_nand_device_ready;
 	nand->select_chip	= mxs_nand_select_chip;
 	nand->block_bad		= mxs_nand_block_bad;
-	nand->scan_bbt		= mxs_nand_scan_bbt;
 
 	nand->read_byte		= mxs_nand_read_byte;
 
 	nand->read_buf		= mxs_nand_read_buf;
 	nand->write_buf		= mxs_nand_write_buf;
 
+	/* first scan to find the device and get the page size */
+	if (nand_scan_ident(mtd, CONFIG_SYS_MAX_NAND_DEVICE, NULL))
+		goto err2;
+
+	if (mxs_nand_setup_ecc(mtd))
+		goto err2;
+
 	nand->ecc.read_page	= mxs_nand_ecc_read_page;
 	nand->ecc.write_page	= mxs_nand_ecc_write_page;
 	nand->ecc.read_oob	= mxs_nand_ecc_read_oob;
@@ -1250,12 +1246,21 @@ int board_nand_init(struct nand_chip *nand)
 	nand->ecc.size		= 512;
 	nand->ecc.strength	= 8;
 
-	return 0;
+	/* second phase scan */
+	err = nand_scan_tail(mtd);
+	if (err)
+		goto err2;
+
+	err = nand_register(0, mtd);
+	if (err)
+		goto err2;
+
+	return;
 
 err2:
 	free(nand_info->data_buf);
 	free(nand_info->cmd_buf);
 err1:
 	free(nand_info);
-	return err;
+	return;
 }
diff --git a/drivers/mtd/nand/mxs_nand.h b/drivers/mtd/nand/mxs_nand.h
index 9bb7148d98..379ed24f05 100644
--- a/drivers/mtd/nand/mxs_nand.h
+++ b/drivers/mtd/nand/mxs_nand.h
@@ -8,3 +8,4 @@
  */
 
 int mxs_nand_init_spl(struct nand_chip *nand);
+int mxs_nand_setup_ecc(struct mtd_info *mtd);

commit 10811032c8b3000c8ac1d6d6c34d81df39d423ce
Author: Stefan Agner <stefan.agner@toradex.com>
Date:   Fri Jun 22 17:19:46 2018 +0200

    UPSTREAM: mtd: nand: mxs_nand: introduce SPL specific init
    
    In preparation to convert the driver to use NAND self init
    provide a new minimal init for SPL builds. As a side effect
    this also reduces size of SPL by about 4KiB.
    
    Change-Id: I8450871ce30793a3526057cc5be322ebb0ae8d14
    Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 9345943b2b5ea890cb479770c3c802cf851ed3e6)

diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c
index bed9b65ef4..5fd8db2c51 100644
--- a/drivers/mtd/nand/mxs_nand.c
+++ b/drivers/mtd/nand/mxs_nand.c
@@ -26,6 +26,7 @@
 #include <asm/mach-imx/regs-gpmi.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/mach-imx/dma.h>
+#include "mxs_nand.h"
 
 #define	MXS_NAND_DMA_DESCRIPTOR_COUNT		4
 
@@ -1150,6 +1151,48 @@ err1:
 	return ret;
 }
 
+int mxs_nand_init_spl(struct nand_chip *nand)
+{
+	struct mxs_nand_info *nand_info;
+	int err;
+
+	nand_info = malloc(sizeof(struct mxs_nand_info));
+	if (!nand_info) {
+		printf("MXS NAND: Failed to allocate private data\n");
+		return -ENOMEM;
+	}
+	memset(nand_info, 0, sizeof(struct mxs_nand_info));
+
+	err = mxs_nand_alloc_buffers(nand_info);
+	if (err)
+		return err;
+
+	err = mxs_nand_init(nand_info);
+	if (err)
+		return err;
+
+	nand_set_controller_data(nand, nand_info);
+
+	nand->options |= NAND_NO_SUBPAGE_WRITE;
+
+	nand->cmd_ctrl		= mxs_nand_cmd_ctrl;
+	nand->dev_ready		= mxs_nand_device_ready;
+	nand->select_chip	= mxs_nand_select_chip;
+	nand->scan_bbt		= mxs_nand_scan_bbt;
+
+	nand->read_byte		= mxs_nand_read_byte;
+	nand->read_buf		= mxs_nand_read_buf;
+
+	nand->ecc.read_page	= mxs_nand_ecc_read_page;
+
+	nand->ecc.mode		= NAND_ECC_HW;
+	nand->ecc.bytes		= 9;
+	nand->ecc.size		= 512;
+	nand->ecc.strength	= 8;
+
+	return 0;
+}
+
 /*!
  * This function is called during the driver binding process.
  *
diff --git a/drivers/mtd/nand/mxs_nand.h b/drivers/mtd/nand/mxs_nand.h
new file mode 100644
index 0000000000..9bb7148d98
--- /dev/null
+++ b/drivers/mtd/nand/mxs_nand.h
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * NXP GPMI NAND flash driver
+ *
+ * Copyright (C) 2018 Toradex
+ * Authors:
+ * Stefan Agner <stefan.agner@toradex.com>
+ */
+
+int mxs_nand_init_spl(struct nand_chip *nand);
diff --git a/drivers/mtd/nand/mxs_nand_spl.c b/drivers/mtd/nand/mxs_nand_spl.c
index 910f76dd9d..59cd903026 100644
--- a/drivers/mtd/nand/mxs_nand_spl.c
+++ b/drivers/mtd/nand/mxs_nand_spl.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <nand.h>
 #include <malloc.h>
+#include "mxs_nand.h"
 
 static struct mtd_info *mtd;
 static struct nand_chip nand_chip;
@@ -146,7 +147,7 @@ static int mxs_nand_init(void)
 		return 0;
 
 	/* init mxs nand driver */
-	board_nand_init(&nand_chip);
+	mxs_nand_init_spl(&nand_chip);
 	mtd = nand_to_mtd(&nand_chip);
 	/* set mtd functions */
 	nand_chip.cmdfunc = mxs_nand_command;

commit e7e0eac89a9ced3023c300bdae76b04310ec5152
Author: Ashish Kumar <Ashish.Kumar@nxp.com>
Date:   Mon Jun 25 15:45:11 2018 +0530

    UPSTREAM: mtd: spi: Correct parameters for s25fs512s flash
    
    Change sector size to 256KiB in table spi_flash_ids.
    
    Change-Id: If80ace950e8ffe6a911e10d28732e60ce2298dfd
    Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 51dce7d2bfdecd974412634e4a0758ac55edcc00)

diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c
index 3397297bcc..5679b8feb6 100644
--- a/drivers/mtd/spi/spi_flash_ids.c
+++ b/drivers/mtd/spi/spi_flash_ids.c
@@ -112,7 +112,7 @@ const struct spi_flash_info spi_flash_ids[] = {
 	{"s25fl256s_256k", INFO(0x010219, 0x4d00, 256 * 1024,   128, RD_FULL | WR_QPP) },
 	{"s25fs256s_64k",  INFO6(0x010219, 0x4d0181, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) },
 	{"s25fl256s_64k",  INFO(0x010219, 0x4d01,  64 * 1024,   512, RD_FULL | WR_QPP) },
-	{"s25fs512s",      INFO6(0x010220, 0x4d0081, 128 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) },
+	{"s25fs512s",      INFO6(0x010220, 0x4d0081, 256 * 1024, 256, RD_FULL | WR_QPP | SECT_4K) },
 	{"s25fl512s_256k", INFO(0x010220, 0x4d00, 256 * 1024,   256, RD_FULL | WR_QPP) },
 	{"s25fl512s_64k",  INFO(0x010220, 0x4d01,  64 * 1024,  1024, RD_FULL | WR_QPP) },
 	{"s25fl512s_512k", INFO(0x010220, 0x4f00, 256 * 1024,   256, RD_FULL | WR_QPP) },

commit d08942591cb8e0776bf2439b00783fa0dcef6529
Author: Simon Glass <sjg@chromium.org>
Date:   Tue Jun 12 00:05:01 2018 -0600

    UPSTREAM: spi: sandbox: Fix memory leak in sandbox_sf_bind_emul()
    
    Move the strdup() call so that it is only done when we know we will bind
    the device.
    
    Change-Id: Ie322cba71f94d829e6c327a921ddc64cfca64e81
    Reported-by: Coverity (CID: 131216)
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit fb95283931011aef78d885f2799ad9d7367f4e48)

diff --git a/drivers/mtd/spi/sandbox.c b/drivers/mtd/spi/sandbox.c
index 1ba6815232..a5f35c73a6 100644
--- a/drivers/mtd/spi/sandbox.c
+++ b/drivers/mtd/spi/sandbox.c
@@ -569,16 +569,17 @@ int sandbox_sf_bind_emul(struct sandbox_state *state, int busnum, int cs,
 	strncpy(name, spec, sizeof(name) - 6);
 	name[sizeof(name) - 6] = '\0';
 	strcat(name, "-emul");
-	str = strdup(name);
-	if (!str)
-		return -ENOMEM;
 	drv = lists_driver_lookup_name("sandbox_sf_emul");
 	if (!drv) {
 		puts("Cannot find sandbox_sf_emul driver\n");
 		return -ENOENT;
 	}
+	str = strdup(name);
+	if (!str)
+		return -ENOMEM;
 	ret = device_bind(bus, drv, str, NULL, of_offset, &emul);
 	if (ret) {
+		free(str);
 		printf("Cannot create emul device for spec '%s' (err=%d)\n",
 		       spec, ret);
 		return ret;

commit 28386b6dc69ba6ece0345798f08ef0aed9fb0691
Author: Alexey Brodkin <Alexey.Brodkin@synopsys.com>
Date:   Tue Jun 5 17:17:57 2018 +0300

    UPSTREAM: lib: Add hexdump
    
    Often during debugging session it's very interesting to see
    what data we were dealing with. For example what we write or read
    to/from memory or peripherals.
    
    This change introduces functions that allow to dump binary
    data with one simple function invocation like:
    ------------------->8----------------
    print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, buf, len);
    ------------------->8----------------
    
    which gives us the following:
    ------------------->8----------------
    00000000: f2 b7 c9 88 62 61 75 64 72 61 74 65 3d 31 31 35  ....baudrate=115
    00000010: 32 30 30 00 62 6f 6f 74 61 72 67 73 3d 63 6f 6e  200.bootargs=con
    00000020: 73 6f 6c 65 3d 74 74 79 53 33 2c 31 31 35 32 30  sole=ttyS3,11520
    00000030: 30 6e 38 00 62 6f 6f 74 64 65 6c 61 79 3d 33 00  0n8.bootdelay=3.
    00000040: 62 6f 6f 74 66 69 6c 65 3d 75 49 6d 61 67 65 00  bootfile=uImage.
    00000050: 66 64 74 63 6f 6e 74 72 6f 6c 61 64 64 72 3d 39  fdtcontroladdr=9
    00000060: 66 66 62 31 62 61 30 00 6c 6f 61 64 61 64 64 72  ffb1ba0.loadaddr
    00000070: 3d 30 78 38 32 30 30 30 30 30 30 00 73 74 64 65  =0x82000000.stde
    00000080: 72 72 3d 73 65 72 69 61 6c 30 40 65 30 30 32 32  rr=serial0@e0022
    00000090: 30 30 30 00 73 74 64 69 6e 3d 73 65 72 69 61 6c  000.stdin=serial
    000000a0: 30 40 65 30 30 32 32 30 30 30 00 73 74 64 6f 75  0@e0022000.stdou
    000000b0: 74 3d 73 65 72 69 61 6c 30 40 65 30 30 32 32 30  t=serial0@e00220
    000000c0: 30 30 00 00 00 00 00 00 00 00 00 00 00 00 00 00  00..............
    ...
    ------------------->8----------------
    
    Source of hexdump.c was copied from Linux kernel v4.7-rc2.
    
    Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
    Cc: Anatolij Gustschin <agust@denx.de>
    Cc: Mario Six <mario.six@gdsys.cc>
    Cc: Simon Glass <sjg@chromium.org>
    Cc: Tom Rini <trini@konsulko.com>
    Cc: Stefan Roese <sr@denx.de>
    
    Change-Id: I038b41f51d45d1b853da499578bf8ef384a63730
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit f8c987f8f127f867d96ca74bcd1fcb11d8265b67)

diff --git a/common/edid.c b/common/edid.c
index 02b42c1941..00797a9f6d 100644
--- a/common/edid.c
+++ b/common/edid.c
@@ -18,6 +18,7 @@
 #include <edid.h>
 #include <errno.h>
 #include <fdtdec.h>
+#include <hexdump.h>
 #include <malloc.h>
 #include <linux/compat.h>
 #include <linux/ctype.h>
@@ -4917,7 +4918,7 @@ bad:
 			debug("EDID block is all zeroes\n");
 		} else {
 			debug("Raw EDID:\n");
-			print_hex_dump(KERN_ERR, " \t", DUMP_PREFIX_NONE, 16, 1,
+			print_hex_dump("", DUMP_PREFIX_NONE, 16, 1,
 				       raw_edid, EDID_SIZE, false);
 		}
 	}
diff --git a/drivers/mtd/ubi/attach.c b/drivers/mtd/ubi/attach.c
index 33c176a77b..1ab3ff7312 100644
--- a/drivers/mtd/ubi/attach.c
+++ b/drivers/mtd/ubi/attach.c
@@ -790,7 +790,7 @@ static int check_corruption(struct ubi_device *ubi, struct ubi_vid_hdr *vid_hdr,
 	ubi_dump_vid_hdr(vid_hdr);
 	pr_err("hexdump of PEB %d offset %d, length %d",
 	       pnum, ubi->leb_start, ubi->leb_size);
-	ubi_dbg_print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET, 32, 1,
+	ubi_dbg_print_hex_dump("", DUMP_PREFIX_OFFSET, 32, 1,
 			       ubi->peb_buf, ubi->leb_size, 1);
 	err = 1;
 
diff --git a/drivers/mtd/ubi/debug.c b/drivers/mtd/ubi/debug.c
index c35c85b18c..0beaa254f6 100644
--- a/drivers/mtd/ubi/debug.c
+++ b/drivers/mtd/ubi/debug.c
@@ -6,6 +6,7 @@
  * Author: Artem Bityutskiy (Битюцкий Артём)
  */
 
+#include <hexdump.h>
 #include <ubi_uboot.h>
 #include "ubi.h"
 #ifndef __UBOOT__
@@ -40,7 +41,7 @@ void ubi_dump_flash(struct ubi_device *ubi, int pnum, int offset, int len)
 
 	ubi_msg(ubi, "dumping %d bytes of data from PEB %d, offset %d",
 		len, pnum, offset);
-	print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET, 32, 1, buf, len, 1);
+	print_hex_dump("", DUMP_PREFIX_OFFSET, 32, 1, buf, len, 1);
 out:
 	vfree(buf);
 	return;
@@ -61,7 +62,7 @@ void ubi_dump_ec_hdr(const struct ubi_ec_hdr *ec_hdr)
 	pr_err("\timage_seq      %d\n", be32_to_cpu(ec_hdr->image_seq));
 	pr_err("\thdr_crc        %#08x\n", be32_to_cpu(ec_hdr->hdr_crc));
 	pr_err("erase counter header hexdump:\n");
-	print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET, 32, 1,
+	print_hex_dump("", DUMP_PREFIX_OFFSET, 32, 1,
 		       ec_hdr, UBI_EC_HDR_SIZE, 1);
 }
 
@@ -86,7 +87,7 @@ void ubi_dump_vid_hdr(const struct ubi_vid_hdr *vid_hdr)
 		(unsigned long long)be64_to_cpu(vid_hdr->sqnum));
 	pr_err("\thdr_crc   %08x\n", be32_to_cpu(vid_hdr->hdr_crc));
 	pr_err("Volume identifier header hexdump:\n");
-	print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET, 32, 1,
+	print_hex_dump("", DUMP_PREFIX_OFFSET, 32, 1,
 		       vid_hdr, UBI_VID_HDR_SIZE, 1);
 }
 
diff --git a/drivers/mtd/ubi/debug.h b/drivers/mtd/ubi/debug.h
index d8d824e487..eb3351e562 100644
--- a/drivers/mtd/ubi/debug.h
+++ b/drivers/mtd/ubi/debug.h
@@ -17,6 +17,8 @@ void ubi_dump_vid_hdr(const struct ubi_vid_hdr *vid_hdr);
 #include <linux/random.h>
 #endif
 
+#include <hexdump.h>
+
 #define ubi_assert(expr)  do {                                               \
 	if (unlikely(!(expr))) {                                             \
 		pr_crit("UBI assert failed in %s at %u (pid %d)\n",          \
@@ -25,8 +27,8 @@ void ubi_dump_vid_hdr(const struct ubi_vid_hdr *vid_hdr);
 	}                                                                    \
 } while (0)
 
-#define ubi_dbg_print_hex_dump(l, ps, pt, r, g, b, len, a)                   \
-		print_hex_dump(l, ps, pt, r, g, b, len, a)
+#define ubi_dbg_print_hex_dump(ps, pt, r, g, b, len, a)                      \
+		print_hex_dump(ps, pt, r, g, b, len, a)
 
 #define ubi_dbg_msg(type, fmt, ...) \
 	pr_debug("UBI DBG " type " (pid %d): " fmt "\n", current->pid,       \
diff --git a/drivers/mtd/ubi/io.c b/drivers/mtd/ubi/io.c
index 0be9c5a9d5..6d16c2e7e0 100644
--- a/drivers/mtd/ubi/io.c
+++ b/drivers/mtd/ubi/io.c
@@ -78,6 +78,7 @@
 #include <linux/err.h>
 #include <linux/slab.h>
 #else
+#include <hexdump.h>
 #include <ubi_uboot.h>
 #endif
 
@@ -1353,11 +1354,11 @@ static int self_check_write(struct ubi_device *ubi, const void *buf, int pnum,
 		ubi_msg(ubi, "data differ at position %d", i);
 		ubi_msg(ubi, "hex dump of the original buffer from %d to %d",
 			i, i + dump_len);
-		print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET, 32, 1,
+		print_hex_dump("", DUMP_PREFIX_OFFSET, 32, 1,
 			       buf + i, dump_len, 1);
 		ubi_msg(ubi, "hex dump of the read buffer from %d to %d",
 			i, i + dump_len);
-		print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET, 32, 1,
+		print_hex_dump("", DUMP_PREFIX_OFFSET, 32, 1,
 			       buf1 + i, dump_len, 1);
 		dump_stack();
 		err = -EINVAL;
@@ -1419,7 +1420,7 @@ int ubi_self_check_all_ff(struct ubi_device *ubi, int pnum, int offset, int len)
 fail:
 	ubi_err(ubi, "self-check failed for PEB %d", pnum);
 	ubi_msg(ubi, "hex dump of the %d-%d region", offset, offset + len);
-	print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET, 32, 1, buf, len, 1);
+	print_hex_dump("", DUMP_PREFIX_OFFSET, 32, 1, buf, len, 1);
 	err = -EINVAL;
 error:
 	dump_stack();
diff --git a/drivers/usb/gadget/f_mass_storage.c b/drivers/usb/gadget/f_mass_storage.c
index 404e8eafdb..7a66a3e1f8 100644
--- a/drivers/usb/gadget/f_mass_storage.c
+++ b/drivers/usb/gadget/f_mass_storage.c
@@ -241,6 +241,7 @@
 /* #define DUMP_MSGS */
 
 #include <config.h>
+#include <hexdump.h>
 #include <malloc.h>
 #include <common.h>
 #include <console.h>
diff --git a/drivers/usb/gadget/storage_common.c b/drivers/usb/gadget/storage_common.c
index ce1b0a3a85..7b2c4ae748 100644
--- a/drivers/usb/gadget/storage_common.c
+++ b/drivers/usb/gadget/storage_common.c
@@ -125,7 +125,7 @@
 # define dump_msg(fsg, label, buf, length) do {                         \
 	if (length < 512) {						\
 		DBG(fsg, "%s, length %u:\n", label, length);		\
-		print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET,	\
+		print_hex_dump("", DUMP_PREFIX_OFFSET,	\
 			       16, 1, buf, length, 0);			\
 	}								\
 } while (0)
@@ -140,7 +140,7 @@
 #  ifdef VERBOSE_DEBUG
 
 #    define dump_cdb(fsg)						\
-	print_hex_dump(KERN_DEBUG, "SCSI CDB: ", DUMP_PREFIX_NONE,	\
+	print_hex_dump("SCSI CDB: ", DUMP_PREFIX_NONE,	\
 		       16, 1, (fsg)->cmnd, (fsg)->cmnd_size, 0)		\
 
 #  else
diff --git a/examples/api/Makefile b/examples/api/Makefile
index 899527267d..1c8d55cb9e 100644
--- a/examples/api/Makefile
+++ b/examples/api/Makefile
@@ -31,6 +31,7 @@ OBJ-y += libgenwrap.o
 EXT_COBJ-y += lib/crc32.o
 EXT_COBJ-y += lib/ctype.o
 EXT_COBJ-y += lib/div64.o
+EXT_COBJ-y += lib/hexdump.o
 EXT_COBJ-y += lib/string.o
 EXT_COBJ-y += lib/time.o
 EXT_COBJ-y += lib/vsprintf.o
diff --git a/fs/ubifs/debug.c b/fs/ubifs/debug.c
index 38c91d0734..ae3d4cb306 100644
--- a/fs/ubifs/debug.c
+++ b/fs/ubifs/debug.c
@@ -16,6 +16,8 @@
  * various local functions of those subsystems.
  */
 
+#include <hexdump.h>
+
 #ifndef __UBOOT__
 #include <linux/module.h>
 #include <linux/debugfs.h>
@@ -308,7 +310,7 @@ void ubifs_dump_node(const struct ubifs_info *c, const void *node)
 	/* If the magic is incorrect, just hexdump the first bytes */
 	if (le32_to_cpu(ch->magic) != UBIFS_NODE_MAGIC) {
 		pr_err("Not a node, first %zu bytes:", UBIFS_CH_SZ);
-		print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 32, 1,
+		print_hex_dump("", DUMP_PREFIX_OFFSET, 32, 1,
 			       (void *)node, UBIFS_CH_SZ, 1);
 		return;
 	}
@@ -483,7 +485,7 @@ void ubifs_dump_node(const struct ubifs_info *c, const void *node)
 		       (int)le16_to_cpu(dn->compr_type));
 		pr_err("\tdata size      %d\n", dlen);
 		pr_err("\tdata:\n");
-		print_hex_dump(KERN_ERR, "\t", DUMP_PREFIX_OFFSET, 32, 1,
+		print_hex_dump("\t", DUMP_PREFIX_OFFSET, 32, 1,
 			       (void *)&dn->data, dlen, 0);
 		break;
 	}
diff --git a/fs/ubifs/scan.c b/fs/ubifs/scan.c
index 12a3597468..9b2fbe970e 100644
--- a/fs/ubifs/scan.c
+++ b/fs/ubifs/scan.c
@@ -17,6 +17,7 @@
  */
 
 #ifdef __UBOOT__
+#include <hexdump.h>
 #include <linux/err.h>
 #endif
 #include "ubifs.h"
@@ -237,7 +238,7 @@ void ubifs_scanned_corruption(const struct ubifs_info *c, int lnum, int offs,
 	if (len > 8192)
 		len = 8192;
 	ubifs_err(c, "first %d bytes from LEB %d:%d", len, lnum, offs);
-	print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET, 32, 4, buf, len, 1);
+	print_hex_dump("", DUMP_PREFIX_OFFSET, 32, 4, buf, len, 1);
 }
 
 /**
diff --git a/include/hexdump.h b/include/hexdump.h
new file mode 100644
index 0000000000..f7b76ff712
--- /dev/null
+++ b/include/hexdump.h
@@ -0,0 +1,91 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2018 Synopsys, Inc. All rights reserved.
+ *
+ */
+
+#ifndef HEXDUMP_H
+#define HEXDUMP_H
+
+#include <linux/ctype.h>
+#include <linux/types.h>
+
+enum {
+	DUMP_PREFIX_NONE,
+	DUMP_PREFIX_ADDRESS,
+	DUMP_PREFIX_OFFSET
+};
+
+extern const char hex_asc[];
+#define hex_asc_lo(x)	hex_asc[((x) & 0x0f)]
+#define hex_asc_hi(x)	hex_asc[((x) & 0xf0) >> 4]
+
+static inline char *hex_byte_pack(char *buf, u8 byte)
+{
+	*buf++ = hex_asc_hi(byte);
+	*buf++ = hex_asc_lo(byte);
+	return buf;
+}
+
+/**
+ * hex_to_bin - convert a hex digit to its real value
+ * @ch: ascii character represents hex digit
+ *
+ * hex_to_bin() converts one hex digit to its actual value or -1 in case of bad
+ * input.
+ */
+static inline int hex_to_bin(char ch)
+{
+	if ((ch >= '0') && (ch <= '9'))
+		return ch - '0';
+	ch = tolower(ch);
+	if ((ch >= 'a') && (ch <= 'f'))
+		return ch - 'a' + 10;
+	return -1;
+}
+
+/**
+ * hex2bin - convert an ascii hexadecimal string to its binary representation
+ * @dst: binary result
+ * @src: ascii hexadecimal string
+ * @count: result length
+ *
+ * Return 0 on success, -1 in case of bad input.
+ */
+static inline int hex2bin(u8 *dst, const char *src, size_t count)
+{
+	while (count--) {
+		int hi = hex_to_bin(*src++);
+		int lo = hex_to_bin(*src++);
+
+		if ((hi < 0) || (lo < 0))
+			return -1;
+
+		*dst++ = (hi << 4) | lo;
+	}
+	return 0;
+}
+
+/**
+ * bin2hex - convert binary data to an ascii hexadecimal string
+ * @dst: ascii hexadecimal result
+ * @src: binary data
+ * @count: binary data length
+ */
+static inline char *bin2hex(char *dst, const void *src, size_t count)
+{
+	const unsigned char *_src = src;
+
+	while (count--)
+		dst = hex_byte_pack(dst, *_src++);
+	return dst;
+}
+
+int hex_dump_to_buffer(const void *buf, size_t len, int rowsize, int groupsize,
+		       char *linebuf, size_t linebuflen, bool ascii);
+void print_hex_dump(const char *prefix_str, int prefix_type, int rowsize,
+		    int groupsize, const void *buf, size_t len, bool ascii);
+void print_hex_dump_bytes(const char *prefix_str, int prefix_type,
+			  const void *buf, size_t len);
+
+#endif /* HEXDUMP_H */
diff --git a/include/linux/compat.h b/include/linux/compat.h
index 0de9ff0bd0..52a8d89d4e 100644
--- a/include/linux/compat.h
+++ b/include/linux/compat.h
@@ -194,7 +194,8 @@ typedef unsigned long blkcnt_t;
 #define init_waitqueue_head(...)	do { } while (0)
 #define wait_event_interruptible(...)	0
 #define wake_up_interruptible(...)	do { } while (0)
-#define print_hex_dump(...)		do { } while (0)
+#define dump_stack(...)			do { } while (0)
+
 #define task_pid_nr(x)			0
 #define set_freezable(...)		do { } while (0)
 #define try_to_freeze(...)		0
diff --git a/lib/Kconfig b/lib/Kconfig
index c1aca36303..51a988e3c5 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -237,6 +237,11 @@ config ERRNO_STR
 	  - if errno is null or positive number - a pointer to "Success" message
 	  - if errno is negative - a pointer to errno related message
 
+config HEXDUMP
+	bool "Enable hexdump"
+	help
+	  This enables functions for printing dumps of binary data.
+
 config OF_LIBFDT
 	bool "Enable the FDT library"
 	default y if OF_CONTROL
diff --git a/lib/Makefile b/lib/Makefile
index d62b97caf0..650666dcb0 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -93,6 +93,7 @@ obj-y += string.o
 obj-y += stdlib.o
 obj-y += tables_csum.o
 obj-y += time.o
+obj-y += hexdump.o
 obj-$(CONFIG_TRACE) += trace.o
 obj-$(CONFIG_LIB_UUID) += uuid.o
 obj-$(CONFIG_LIB_RAND) += rand.o
diff --git a/lib/hexdump.c b/lib/hexdump.c
new file mode 100644
index 0000000000..bf14b5bdbd
--- /dev/null
+++ b/lib/hexdump.c
@@ -0,0 +1,245 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * lib/hexdump.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation. See README and COPYING for
+ * more details.
+ */
+
+#include <common.h>
+#include <hexdump.h>
+#include <linux/ctype.h>
+#include <linux/compat.h>
+#include <linux/log2.h>
+#include <asm/unaligned.h>
+
+const char hex_asc[] = "0123456789abcdef";
+const char hex_asc_upper[] = "0123456789ABCDEF";
+
+#ifdef CONFIG_HEXDUMP
+/**
+ * hex_dump_to_buffer - convert a blob of data to "hex ASCII" in memory
+ * @buf: data blob to dump
+ * @len: number of bytes in the @buf
+ * @rowsize: number of bytes to print per line; must be 16 or 32
+ * @groupsize: number of bytes to print at a time (1, 2, 4, 8; default = 1)
+ * @linebuf: where to put the converted data
+ * @linebuflen: total size of @linebuf, including space for terminating NUL
+ * @ascii: include ASCII after the hex output
+ *
+ * hex_dump_to_buffer() works on one "line" of output at a time, i.e.,
+ * 16 or 32 bytes of input data converted to hex + ASCII output.
+ *
+ * Given a buffer of u8 data, hex_dump_to_buffer() converts the input data
+ * to a hex + ASCII dump at the supplied memory location.
+ * The converted output is always NUL-terminated.
+ *
+ * E.g.:
+ *   hex_dump_to_buffer(frame->data, frame->len, 16, 1,
+ *			linebuf, sizeof(linebuf), true);
+ *
+ * example output buffer:
+ * 40 41 42 43 44 45 46 47 48 49 4a 4b 4c 4d 4e 4f  @ABCDEFGHIJKLMNO
+ *
+ * Return:
+ * The amount of bytes placed in the buffer without terminating NUL. If the
+ * output was truncated, then the return value is the number of bytes
+ * (excluding the terminating NUL) which would have been written to the final
+ * string if enough space had been available.
+ */
+int hex_dump_to_buffer(const void *buf, size_t len, int rowsize, int groupsize,
+		       char *linebuf, size_t linebuflen, bool ascii)
+{
+	const u8 *ptr = buf;
+	int ngroups;
+	u8 ch;
+	int j, lx = 0;
+	int ascii_column;
+	int ret;
+
+	if (rowsize != 16 && rowsize != 32)
+		rowsize = 16;
+
+	if (len > rowsize)		/* limit to one line at a time */
+		len = rowsize;
+	if (!is_power_of_2(groupsize) || groupsize > 8)
+		groupsize = 1;
+	if ((len % groupsize) != 0)	/* no mixed size output */
+		groupsize = 1;
+
+	ngroups = len / groupsize;
+	ascii_column = rowsize * 2 + rowsize / groupsize + 1;
+
+	if (!linebuflen)
+		goto overflow1;
+
+	if (!len)
+		goto nil;
+
+	if (groupsize == 8) {
+		const u64 *ptr8 = buf;
+
+		for (j = 0; j < ngroups; j++) {
+			ret = snprintf(linebuf + lx, linebuflen - lx,
+				       "%s%16.16llx", j ? " " : "",
+				       get_unaligned(ptr8 + j));
+			if (ret >= linebuflen - lx)
+				goto overflow1;
+			lx += ret;
+		}
+	} else if (groupsize == 4) {
+		const u32 *ptr4 = buf;
+
+		for (j = 0; j < ngroups; j++) {
+			ret = snprintf(linebuf + lx, linebuflen - lx,
+				       "%s%8.8x", j ? " " : "",
+				       get_unaligned(ptr4 + j));
+			if (ret >= linebuflen - lx)
+				goto overflow1;
+			lx += ret;
+		}
+	} else if (groupsize == 2) {
+		const u16 *ptr2 = buf;
+
+		for (j = 0; j < ngroups; j++) {
+			ret = snprintf(linebuf + lx, linebuflen - lx,
+				       "%s%4.4x", j ? " " : "",
+				       get_unaligned(ptr2 + j));
+			if (ret >= linebuflen - lx)
+				goto overflow1;
+			lx += ret;
+		}
+	} else {
+		for (j = 0; j < len; j++) {
+			if (linebuflen < lx + 2)
+				goto overflow2;
+			ch = ptr[j];
+			linebuf[lx++] = hex_asc_hi(ch);
+			if (linebuflen < lx + 2)
+				goto overflow2;
+			linebuf[lx++] = hex_asc_lo(ch);
+			if (linebuflen < lx + 2)
+				goto overflow2;
+			linebuf[lx++] = ' ';
+		}
+		if (j)
+			lx--;
+	}
+	if (!ascii)
+		goto nil;
+
+	while (lx < ascii_column) {
+		if (linebuflen < lx + 2)
+			goto overflow2;
+		linebuf[lx++] = ' ';
+	}
+	for (j = 0; j < len; j++) {
+		if (linebuflen < lx + 2)
+			goto overflow2;
+		ch = ptr[j];
+		linebuf[lx++] = (isascii(ch) && isprint(ch)) ? ch : '.';
+	}
+nil:
+	linebuf[lx] = '\0';
+	return lx;
+overflow2:
+	linebuf[lx++] = '\0';
+overflow1:
+	return ascii ? ascii_column + len : (groupsize * 2 + 1) * ngroups - 1;
+}
+
+/**
+ * print_hex_dump - print a text hex dump to syslog for a binary blob of data
+ * @prefix_str: string to prefix each line with;
+ *  caller supplies trailing spaces for alignment if desired
+ * @prefix_type: controls whether prefix of an offset, address, or none
+ *  is printed (%DUMP_PREFIX_OFFSET, %DUMP_PREFIX_ADDRESS, %DUMP_PREFIX_NONE)
+ * @rowsize: number of bytes to print per line; must be 16 or 32
+ * @groupsize: number of bytes to print at a time (1, 2, 4, 8; default = 1)
+ * @buf: data blob to dump
+ * @len: number of bytes in the @buf
+ * @ascii: include ASCII after the hex output
+ *
+ * Given a buffer of u8 data, print_hex_dump() prints a hex + ASCII dump
+ * to the stdio, with an optional leading prefix.
+ *
+ * print_hex_dump() works on one "line" of output at a time, i.e.,
+ * 16 or 32 bytes of input data converted to hex + ASCII output.
+ * print_hex_dump() iterates over the entire input @buf, breaking it into
+ * "line size" chunks to format and print.
+ *
+ * E.g.:
+ *   print_hex_dump("raw data: ", DUMP_PREFIX_ADDRESS, 16, 1, frame->data,
+ *                  frame->len, true);
+ *
+ * Example output using %DUMP_PREFIX_OFFSET and 1-byte mode:
+ * 0009ab42: 40 41 42 43 44 45 46 47 48 49 4a 4b 4c 4d 4e 4f  @ABCDEFGHIJKLMNO
+ * Example output using %DUMP_PREFIX_ADDRESS and 4-byte mode:
+ * ffffffff88089af0: 73727170 77767574 7b7a7978 7f7e7d7c  pqrstuvwxyz{|}~.
+ */
+void print_hex_dump(const char *prefix_str, int prefix_type, int rowsize,
+		    int groupsize, const void *buf, size_t len, bool ascii)
+{
+	const u8 *ptr = buf;
+	int i, linelen, remaining = len;
+	char linebuf[32 * 3 + 2 + 32 + 1];
+
+	if (rowsize != 16 && rowsize != 32)
+		rowsize = 16;
+
+	for (i = 0; i < len; i += rowsize) {
+		linelen = min(remaining, rowsize);
+		remaining -= rowsize;
+
+		hex_dump_to_buffer(ptr + i, linelen, rowsize, groupsize,
+				   linebuf, sizeof(linebuf), ascii);
+
+		switch (prefix_type) {
+		case DUMP_PREFIX_ADDRESS:
+			printf("%s%p: %s\n", prefix_str, ptr + i, linebuf);
+			break;
+		case DUMP_PREFIX_OFFSET:
+			printf("%s%.8x: %s\n", prefix_str, i, linebuf);
+			break;
+		default:
+			printf("%s%s\n", prefix_str, linebuf);
+			break;
+		}
+	}
+}
+
+/**
+ * print_hex_dump_bytes - shorthand form of print_hex_dump() with default params
+ * @prefix_str: string to prefix each line with;
+ *  caller supplies trailing spaces for alignment if desired
+ * @prefix_type: controls whether prefix of an offset, address, or none
+ *  is printed (%DUMP_PREFIX_OFFSET, %DUMP_PREFIX_ADDRESS, %DUMP_PREFIX_NONE)
+ * @buf: data blob to dump
+ * @len: number of bytes in the @buf
+ *
+ * Calls print_hex_dump(), rowsize of 16, groupsize of 1,
+ * and ASCII output included.
+ */
+void print_hex_dump_bytes(const char *prefix_str, int prefix_type,
+			  const void *buf, size_t len)
+{
+	print_hex_dump(prefix_str, prefix_type, 16, 1, buf, len, true);
+}
+#else
+/*
+ * Some code in U-Boot copy-pasted from Linux kernel uses both
+ * functions below so to keep stuff compilable we keep these stubs here.
+ */
+void print_hex_dump(const char *prefix_str, int prefix_type,
+				  int rowsize, int groupsize, const void *buf,
+				  size_t len, bool ascii)
+{
+}
+
+void print_hex_dump_bytes(const char *prefix_str, int prefix_type,
+					const void *buf, size_t len)
+{
+}
+#endif /* CONFIG_HEXDUMP */
diff --git a/lib/vsprintf.c b/lib/vsprintf.c
index dd572d2868..3d2f078fc2 100644
--- a/lib/vsprintf.c
+++ b/lib/vsprintf.c
@@ -11,16 +11,17 @@
  * from hush: simple_itoa() was lifted from boa-0.93.15
  */
 
+#include <common.h>
+#include <charset.h>
+#include <efi_loader.h>
+#include <div64.h>
+#include <hexdump.h>
+#include <uuid.h>
 #include <stdarg.h>
 #include <linux/types.h>
 #include <linux/string.h>
 #include <linux/ctype.h>
 
-#include <common.h>
-#include <charset.h>
-#include <uuid.h>
-
-#include <div64.h>
 #define noinline __attribute__((noinline))
 
 /* we use this so that we can do without the ctype library */
@@ -293,17 +294,6 @@ static char *string16(char *buf, char *end, u16 *s, int field_width,
 }
 
 #ifdef CONFIG_CMD_NET
-static const char hex_asc[] = "0123456789abcdef";
-#define hex_asc_lo(x)	hex_asc[((x) & 0x0f)]
-#define hex_asc_hi(x)	hex_asc[((x) & 0xf0) >> 4]
-
-static inline char *pack_hex_byte(char *buf, u8 byte)
-{
-	*buf++ = hex_asc_hi(byte);
-	*buf++ = hex_asc_lo(byte);
-	return buf;
-}
-
 static char *mac_address_string(char *buf, char *end, u8 *addr, int field_width,
 				int precision, int flags)
 {
@@ -313,7 +303,7 @@ static char *mac_address_string(char *buf, char *end, u8 *addr, int field_width,
 	int i;
 
 	for (i = 0; i < 6; i++) {
-		p = pack_hex_byte(p, addr[i]);
+		p = hex_byte_pack(p, addr[i]);
 		if (!(flags & SPECIAL) && i != 5)
 			*p++ = ':';
 	}
@@ -332,8 +322,8 @@ static char *ip6_addr_string(char *buf, char *end, u8 *addr, int field_width,
 	int i;
 
 	for (i = 0; i < 8; i++) {
-		p = pack_hex_byte(p, addr[2 * i]);
-		p = pack_hex_byte(p, addr[2 * i + 1]);
+		p = hex_byte_pack(p, addr[2 * i]);
+		p = hex_byte_pack(p, addr[2 * i + 1]);
 		if (!(flags & SPECIAL) && i != 7)
 			*p++ = ':';
 	}

commit 5296618ae2dbb09bdd7f879d78e2dfaa9cf16dae
Author: Stefan Roese <sr@denx.de>
Date:   Tue May 29 15:28:54 2018 +0200

    UPSTREAM: mtd: ubi: Add missing newlines in ubi_init()
    
    I just stumbled over some cluttered UBI messages. It seems some newline
    chars are missing in the current U-Boot UBI source. Lets fix this
    in U-Boot as well (Linux has those fixes already).
    
    Change-Id: I21c13a3ef73aa78d4cf32721b1dd21cab186e8bd
    Signed-off-by: Stefan Roese <sr@denx.de>
    Cc: Heiko Schocher <hs@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 78306cba118e718a3b429695ac48846b9d9afeff)

diff --git a/drivers/mtd/ubi/build.c b/drivers/mtd/ubi/build.c
index d81bd434ac..a6dcd035a6 100644
--- a/drivers/mtd/ubi/build.c
+++ b/drivers/mtd/ubi/build.c
@@ -1251,7 +1251,7 @@ int ubi_init(void)
 	BUILD_BUG_ON(sizeof(struct ubi_vid_hdr) != 64);
 
 	if (mtd_devs > UBI_MAX_DEVICES) {
-		pr_err("UBI error: too many MTD devices, maximum is %d",
+		pr_err("UBI error: too many MTD devices, maximum is %d\n",
 		       UBI_MAX_DEVICES);
 		return -EINVAL;
 	}
@@ -1263,7 +1263,7 @@ int ubi_init(void)
 
 	err = misc_register(&ubi_ctrl_cdev);
 	if (err) {
-		pr_err("UBI error: cannot register device");
+		pr_err("UBI error: cannot register device\n");
 		goto out;
 	}
 
@@ -1290,7 +1290,7 @@ int ubi_init(void)
 		mtd = open_mtd_device(p->name);
 		if (IS_ERR(mtd)) {
 			err = PTR_ERR(mtd);
-			pr_err("UBI error: cannot open mtd %s, error %d",
+			pr_err("UBI error: cannot open mtd %s, error %d\n",
 			       p->name, err);
 			/* See comment below re-ubi_is_module(). */
 			if (ubi_is_module())
@@ -1303,7 +1303,7 @@ int ubi_init(void)
 					 p->vid_hdr_offs, p->max_beb_per1024);
 		mutex_unlock(&ubi_devices_mutex);
 		if (err < 0) {
-			pr_err("UBI error: cannot attach mtd%d",
+			pr_err("UBI error: cannot attach mtd%d\n",
 			       mtd->index);
 			put_mtd_device(mtd);
 
@@ -1327,7 +1327,7 @@ int ubi_init(void)
 
 	err = ubiblock_init();
 	if (err) {
-		pr_err("UBI error: block: cannot initialize, error %d", err);
+		pr_err("UBI error: block: cannot initialize, error %d\n", err);
 
 		/* See comment above re-ubi_is_module(). */
 		if (ubi_is_module())
@@ -1354,7 +1354,7 @@ out:
 	mtd_devs = 0;
 #endif
 	class_unregister(&ubi_class);
-	pr_err("UBI error: cannot initialize UBI, error %d", err);
+	pr_err("UBI error: cannot initialize UBI, error %d\n", err);
 	return err;
 }
 late_initcall(ubi_init);

commit 829ac35b005451557fbafee5cc34d0797dde5a2d
Author: Carlo Caione <carlo@endlessm.com>
Date:   Sat Jun 2 14:06:17 2018 +0100

    UPSTREAM: sf: Add support for gd25q32b gigadevice flash
    
    This flash IC is used in some chromebook models
    manufactured by Bitland.
    
    Change-Id: I40d9868d2a30ad8e28f8a06abb50130211fcf0c6
    Signed-off-by: Carlo Caione <carlo@endlessm.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit b1f2b72e39465f2d4582bb4d8c426489ee94e2d9)

diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c
index a85d895372..3397297bcc 100644
--- a/drivers/mtd/spi/spi_flash_ids.c
+++ b/drivers/mtd/spi/spi_flash_ids.c
@@ -64,6 +64,7 @@ const struct spi_flash_info spi_flash_ids[] = {
 #endif
 #ifdef CONFIG_SPI_FLASH_GIGADEVICE	/* GIGADEVICE */
 	{"gd25q64b",	   INFO(0xc84017, 0x0, 64 * 1024,   128, SECT_4K) },
+	{"gd25q32b",       INFO(0xc84016, 0x0, 64 * 1024,    64, SECT_4K) },
 	{"gd25lq32",	   INFO(0xc86016, 0x0, 64 * 1024,    64, SECT_4K) },
 	{"GD25Q256",       INFO(0xc84019, 0x0, 64 * 1024,   512, RD_FULL | WR_QPP | SECT_4K)},
 #endif

commit 0df07db408d11cfb65506d894225c26d5d6b4928
Author: Marek Vasut <marex@denx.de>
Date:   Thu May 24 21:58:40 2018 +0200

    UPSTREAM: sf: Set current flash bank to 0 in clean_bar()
    
    The clean_bar() function resets the SPI NOR BAR register to 0, but
    does not set the flash->curr_bar to 0 , therefore those two can get
    out of sync, which could ultimatelly result in corrupted flash content.
    
    The simplest test case is this:
    
      => mw 0x10000000 0x1234abcd 0x4000
      => sf probe
      => sf erase 0x1000000 0x10000
      => sf write 0x10000000 0x1000000 0x10000
    
      => sf probe ; sf read 0x12000000 0 0x10000 ; md 0x12000000
    
    That is, erase a sector above the 16 MiB boundary and write it with
    random pre-configured data. What will actually happen without this
    patch is the sector will be erased, but the data will be written to
    BAR 0 offset 0x0 in the flash.
    
    This is because the erase command will call write_bar()+clean_bar(),
    which will leave flash->bank_curr = 1 while the hardware BAR registers
    will be set to 0 through clean_bar(). The subsequent write will also
    trigger write_bar()+clean_bar(), but write_bar checks if the target
    bank == flash->bank_curr and if so, does NOT reconfigure the BAR in
    the SPI NOR. Since flash->bank_curr is still 1 and out of sync with
    the HW, the condition matches, BAR programming is skipped and write
    ends up at address 0x0, thus corrupting flash content.
    
    Change-Id: Ib8ec33a2b890ee7f1566846172c51254b0388964
    Signed-off-by: Marek Vasut <marex@denx.de>
    Cc: Tom Rini <trini@konsulko.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 8ff4130debcc09594b550209c44abf6c7e3ee595)

diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 618799f4fb..bea35c5c92 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -131,6 +131,7 @@ static int clean_bar(struct spi_flash *flash)
 	if (flash->bank_curr == 0)
 		return 0;
 	cmd = flash->bank_write_cmd;
+	flash->bank_curr = 0;
 
 	return spi_flash_write_common(flash, &cmd, 1, &bank_sel, 1);
 }

commit faf21c4b8b74c1f0314a82221cd19cf8c5a61b77
Author: Rick Chen <rick@andestech.com>
Date:   Tue May 29 11:10:56 2018 +0800

    UPSTREAM: mtd: ftsmc020: Drop unsed code
    
    ftsmc020_init is not used anymore.
    So it can be removed.
    
    Change-Id: Ieb504bd6fd84400e46fcf70b16272ed401db8360
    Signed-off-by: Rick Chen <rick@andestech.com>
    Signed-off-by: Rick Chen <rickchen36@gmail.com>
    Cc: Greentime Hu <green.hu@gmail.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/mtd/Makefile b/drivers/mtd/Makefile
index c57b7bd1b8..ea006eeed4 100644
--- a/drivers/mtd/Makefile
+++ b/drivers/mtd/Makefile
@@ -15,7 +15,6 @@ obj-$(CONFIG_MTD_CONCAT) += mtdconcat.o
 obj-$(CONFIG_ALTERA_QSPI) += altera_qspi.o
 obj-$(CONFIG_FLASH_CFI_DRIVER) += cfi_flash.o
 obj-$(CONFIG_FLASH_CFI_MTD) += cfi_mtd.o
-obj-$(CONFIG_FTSMC020) += ftsmc020.o
 obj-$(CONFIG_FLASH_CFI_LEGACY) += jedec_flash.o
 obj-$(CONFIG_MW_EEPROM) += mw_eeprom.o
 obj-$(CONFIG_FLASH_PIC32) += pic32_flash.o

commit b7e3d7f2522d6ce247fee7e9a8814b193c98ae3f
Author: Marek Vasut <marex@denx.de>
Date:   Thu May 17 14:49:03 2018 +0200

    UPSTREAM: sf: Add Macronix MX25U25635F ID
    
    Add ID for the Macronix MX25U25635F flash.
    
    Change-Id: I0ae2cf15f262229e508af57c3a25d4a46c1286db
    Signed-off-by: Marek Vasut <marex@denx.de>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit a2569f12f0efaad2b1e0754a19f373275562f91e)

diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c
index 42afeebd0f..a85d895372 100644
--- a/drivers/mtd/spi/spi_flash_ids.c
+++ b/drivers/mtd/spi/spi_flash_ids.c
@@ -90,6 +90,7 @@ const struct spi_flash_info spi_flash_ids[] = {
 	{"mx25u6435f",	   INFO(0xc22537, 0x0, 64 * 1024,   128, RD_FULL | WR_QPP) },
 	{"mx25l12855e",	   INFO(0xc22618, 0x0, 64 * 1024,   256, RD_FULL | WR_QPP) },
 	{"mx25u1635e",     INFO(0xc22535, 0x0, 64 * 1024,  32, SECT_4K) },
+	{"mx25u25635f",    INFO(0xc22539, 0x0, 64 * 1024,   512, RD_FULL | WR_QPP) },
 	{"mx66u51235f",    INFO(0xc2253a, 0x0, 64 * 1024,  1024, RD_FULL | WR_QPP) },
 	{"mx66l1g45g",     INFO(0xc2201b, 0x0, 64 * 1024,  2048, RD_FULL | WR_QPP) },
 #endif

commit 85a3f553ed1fe274d8d05cde310ad27f74b7592a
Author: Marek Vasut <marex@denx.de>
Date:   Wed May 16 16:45:18 2018 +0200

    UPSTREAM: sf: Add Winbond W25Q256 ID
    
    Add ID for the Winbond W25Q256 flash.
    
    Change-Id: I16e11302d8006ef92d233bdfb17c0838b7e897c9
    Signed-off-by: Marek Vasut <marex@denx.de>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit d8c16849a90866617c6656c5d25d860be840dec9)

diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c
index 58beacb60e..42afeebd0f 100644
--- a/drivers/mtd/spi/spi_flash_ids.c
+++ b/drivers/mtd/spi/spi_flash_ids.c
@@ -179,6 +179,7 @@ const struct spi_flash_info spi_flash_ids[] = {
 	{"w25q32dw",	   INFO(0xef6016, 0x0,	64 * 1024,    64, RD_FULL | WR_QPP | SECT_4K) },
 	{"w25q64dw",	   INFO(0xef6017, 0x0,	64 * 1024,   128, RD_FULL | WR_QPP | SECT_4K) },
 	{"w25q128fw",	   INFO(0xef6018, 0x0,	64 * 1024,   256, RD_FULL | WR_QPP | SECT_4K) },
+	{"w25q256fw",	   INFO(0xef6019, 0x0,	64 * 1024,   512, RD_FULL | WR_QPP | SECT_4K) },
 #endif
 	{},	/* Empty entry to terminate the list */
 	/*
@@ -193,5 +194,6 @@ const struct spi_flash_info spi_flash_ids[] = {
 	 * (w25q32dw, w25q32fv_qpi)
 	 * (w25q64dw, w25q64fv_qpi)
 	 * (w25q128fw, w25q128fv_qpi)
+	 * (w25q256fw, w25q256fv_qpi)
 	 */
 };

commit 0d64d9f7f5867bc3b2cd554ddc7efc808e1f5d28
Author: Patrice Chotard <patrice.chotard@st.com>
Date:   Tue May 22 10:10:51 2018 +0200

    UPSTREAM: ubi: fastmap: Implement produce_free_peb()
    
    Since 'commit f82290afc847 ("mtd: ubi: Fix worker handling")',
    when booting from NAND, on a fresh NAND just after being flashed (and
    only in this case), we got the following log:
    
    ubi0: default fastmap pool size: 200
    ubi0: default fastmap WL pool size: 100
    ubi0: attaching mtd2
    ubi0: scanning is finished
    ubi0 error: ubi_update_fastmap: could not find any anchor PEB
    ubi0 error: ubi_update_fastmap: could not find any anchor PEB
    ubi0 error: ubi_wl_get_peb: Unable to get a free PEB from user WL pool
    ubi0 error: autoresize: cannot auto-resize volume 1
    UBI error: cannot attach mtd2UBI error: cannot initialize UBI, error
    -28UBI init error 28
    
    After analysis, in ubi_wl_init(), when performing schedule_erase(),
    thread_enabled flag is not yet set to 1, which forbids ubi_do_worker()
    to execute pending works.
    
    This has to effect to not populate ubi->free with free physical
    eraseblocks.
    
    Following Richard Weinberger's advice, this patch has been
    backported from kernel tree :
    'commit 1cb8f9776c7d ("ubi: fastmap: Implement produce_free_peb()")'
    
    Tested-by: Patrice Chotard <patrice.chotard@st.com>
    Change-Id: I9ca7778757d9b578a75368a8e3fdbc990c3ed6dc
    Signed-off-by: Richard Weinberger <richard@nod.at>
    Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
    Acked-by: Heiko Schocher <hs@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 65c3d25a6a21b5cf4d978f05f84aaeb6b250e636)

diff --git a/drivers/mtd/ubi/fastmap-wl.c b/drivers/mtd/ubi/fastmap-wl.c
index b7876a81cb..e36fb39943 100644
--- a/drivers/mtd/ubi/fastmap-wl.c
+++ b/drivers/mtd/ubi/fastmap-wl.c
@@ -170,6 +170,30 @@ void ubi_refill_pools(struct ubi_device *ubi)
 	spin_unlock(&ubi->wl_lock);
 }
 
+/**
+ * produce_free_peb - produce a free physical eraseblock.
+ * @ubi: UBI device description object
+ *
+ * This function tries to make a free PEB by means of synchronous execution of
+ * pending works. This may be needed if, for example the background thread is
+ * disabled. Returns zero in case of success and a negative error code in case
+ * of failure.
+ */
+static int produce_free_peb(struct ubi_device *ubi)
+{
+	int err;
+
+	while (!ubi->free.rb_node && ubi->works_count) {
+		dbg_wl("do one work synchronously");
+		err = do_work(ubi);
+
+		if (err)
+			return err;
+	}
+
+	return 0;
+}
+
 /**
  * ubi_wl_get_peb - get a physical eraseblock.
  * @ubi: UBI device description object
@@ -212,6 +236,11 @@ again:
 		}
 		retried = 1;
 		up_read(&ubi->fm_eba_sem);
+		ret = produce_free_peb(ubi);
+		if (ret < 0) {
+			down_read(&ubi->fm_eba_sem);
+			goto out;
+		}
 		goto again;
 	}
 

commit 6eab7397e1d69216c8702e26d2c02912f4d69c7f
Author: Ashish Kumar <Ashish.Kumar@nxp.com>
Date:   Mon May 7 16:01:47 2018 +0530

    UPSTREAM: sf: Default page size Spansion flash "S25FS512S" is 256b
    
    page size for JEDEC EXT starting 0x4d00 is 512b,
    except JEDEC ID 0x215, 0x216 and 0x220
    
    Change-Id: I0f55264c67685f7b497cffc52509277678daccde
    Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
    [jagan: added proper commit message]
    Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 4eaa2fa16968359ffcf207e63848ed7f3a6e4309)

diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 475fa939af..618799f4fb 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -1206,14 +1206,15 @@ int spi_flash_scan(struct spi_flash *flash)
 	flash->shift = (flash->dual_flash & SF_DUAL_PARALLEL_FLASH) ? 1 : 0;
 	flash->page_size = info->page_size;
 	/*
-	 * The Spansion S25FL032P and S25FL064P have 256b pages, yet use the
-	 * 0x4d00 Extended JEDEC code. The rest of the Spansion flashes with
-	 * the 0x4d00 Extended JEDEC code have 512b pages. All of the others
-	 * have 256b pages.
+	 * The Spansion S25FS512S, S25FL032P and S25FL064P have 256b pages,
+	 * yet use the 0x4d00 Extended JEDEC code. The rest of the Spansion
+	 * flashes with the 0x4d00 Extended JEDEC code have 512b pages.
+	 * All of the others have 256b pages.
 	 */
 	if (JEDEC_EXT(info) == 0x4d00) {
 		if ((JEDEC_ID(info) != 0x0215) &&
-		    (JEDEC_ID(info) != 0x0216))
+		    (JEDEC_ID(info) != 0x0216) &&
+		    (JEDEC_ID(info) != 0x0220))
 			flash->page_size = 512;
 	}
 	flash->page_size <<= flash->shift;

commit 8ad9d41f6f83b4cee5241f430385212e52f4fefe
Author: Kimmo Rautkoski <ext-kimmo.rautkoski@vaisala.com>
Date:   Mon May 14 09:30:26 2018 +0300

    UPSTREAM: sf: Add support for ISSI is25wp
    
    Added support for is25wp032, is25wp064 and is25wp128.
    
    Change-Id: I59a336eaf7d1491dbd802e57adf0ca366b113133
    Signed-off-by: Kimmo Rautkoski <ext-kimmo.rautkoski@vaisala.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 39b9e9bc72cef52abb8532ffa92c42be9f010e2f)

diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c
index bae3ced3a0..58beacb60e 100644
--- a/drivers/mtd/spi/spi_flash_ids.c
+++ b/drivers/mtd/spi/spi_flash_ids.c
@@ -73,6 +73,9 @@ const struct spi_flash_info spi_flash_ids[] = {
 	{"is25lp064",	   INFO(0x9d6017, 0x0, 64 * 1024,   128, 0) },
 	{"is25lp128",	   INFO(0x9d6018, 0x0, 64 * 1024,   256, 0) },
 	{"is25lp256",	   INFO(0x9d6019, 0x0, 64 * 1024,   512, 0) },
+	{"is25wp032",	   INFO(0x9d7016, 0x0, 64 * 1024,    64, RD_FULL | SECT_4K) },
+	{"is25wp064",	   INFO(0x9d7017, 0x0, 64 * 1024,   128, RD_FULL | SECT_4K) },
+	{"is25wp128",	   INFO(0x9d7018, 0x0, 64 * 1024,   256, RD_FULL | SECT_4K) },
 #endif
 #ifdef CONFIG_SPI_FLASH_MACRONIX	/* MACRONIX */
 	{"mx25l2006e",	   INFO(0xc22012, 0x0, 64 * 1024,     4, 0) },

commit 944196db3fb2ece3bf8b6d3df486ff086c9c9a04
Author: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Date:   Thu May 25 12:15:24 2017 +0530

    UPSTREAM: nand: zynq: Send address cycles as per onfi parameter page
    
    Send address cycles as per value read from onfi parameter
    page for Read and write commands instead of using a
    hard coded value. This may vary for different parts and
    hence use it from onfi parameter page value.
    
    Change-Id: I16512bb8cb560148af32c7746d23539a6676c466
    Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
    Signed-off-by: Michal Simek <michal.simek@xilinx.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 9fdde6c4bbb6840dd175f0c29dfcc791fc0c1d2a)

diff --git a/drivers/mtd/nand/zynq_nand.c b/drivers/mtd/nand/zynq_nand.c
index d203a5f19d..3f4fa91078 100644
--- a/drivers/mtd/nand/zynq_nand.c
+++ b/drivers/mtd/nand/zynq_nand.c
@@ -85,6 +85,9 @@
 #define ZYNQ_NAND_ECC_BUSY	(1 << 6)	/* ECC block is busy */
 #define ZYNQ_NAND_ECC_MASK	0x00FFFFFF	/* ECC value mask */
 
+#define ZYNQ_NAND_ROW_ADDR_CYCL_MASK	0x0F
+#define ZYNQ_NAND_COL_ADDR_CYCL_MASK	0xF0
+
 #define ZYNQ_NAND_MIO_NUM_NAND_8BIT	13
 #define ZYNQ_NAND_MIO_NUM_NAND_16BIT	8
 
@@ -779,6 +782,7 @@ static void zynq_nand_cmd_function(struct mtd_info *mtd, unsigned int command,
 {
 	struct nand_chip *chip = mtd->priv;
 	const struct zynq_nand_command_format *curr_cmd = NULL;
+	u8 addr_cycles = 0;
 	struct zynq_nand_info *xnand = (struct zynq_nand_info *)chip->priv;
 	void *cmd_addr;
 	unsigned long cmd_data = 0;
@@ -829,8 +833,18 @@ static void zynq_nand_cmd_function(struct mtd_info *mtd, unsigned int command,
 	else
 		end_cmd = curr_cmd->end_cmd;
 
+	if (command == NAND_CMD_READ0 ||
+	    command == NAND_CMD_SEQIN) {
+		addr_cycles = chip->onfi_params.addr_cycles &
+				ZYNQ_NAND_ROW_ADDR_CYCL_MASK;
+		addr_cycles += ((chip->onfi_params.addr_cycles &
+				ZYNQ_NAND_COL_ADDR_CYCL_MASK) >> 4);
+	} else {
+		addr_cycles = curr_cmd->addr_cycles;
+	}
+
 	cmd_phase_addr = (unsigned long)xnand->nand_base	|
-			(curr_cmd->addr_cycles << ADDR_CYCLES_SHIFT)	|
+			(addr_cycles << ADDR_CYCLES_SHIFT)	|
 			(end_cmd_valid << END_CMD_VALID_SHIFT)		|
 			(COMMAND_PHASE)					|
 			(end_cmd << END_CMD_SHIFT)			|

commit 437b20851cde4a400a05d93adc390cf3a83d4fb9
Author: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Date:   Thu May 25 14:25:55 2017 +0530

    UPSTREAM: nand: zynq: Add support for 16-bit buswidth
    
    This patch adds support for 16-bit buswidth by determining
    the bus width based on mio configuration.
    
    Change-Id: I821bb2d5fe8bc8e5173d590ae408f16d767a083f
    Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
    Signed-off-by: Michal Simek <michal.simek@xilinx.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 9ca8388059de8f10e035fbdcaa418ec3caeb0599)

diff --git a/drivers/mtd/nand/zynq_nand.c b/drivers/mtd/nand/zynq_nand.c
index 2d4e8b4736..d203a5f19d 100644
--- a/drivers/mtd/nand/zynq_nand.c
+++ b/drivers/mtd/nand/zynq_nand.c
@@ -17,6 +17,7 @@
 #include <linux/mtd/partitions.h>
 #include <linux/mtd/nand_ecc.h>
 #include <asm/arch/hardware.h>
+#include <asm/arch/sys_proto.h>
 
 /* The NAND flash driver defines */
 #define ZYNQ_NAND_CMD_PHASE		1
@@ -84,6 +85,15 @@
 #define ZYNQ_NAND_ECC_BUSY	(1 << 6)	/* ECC block is busy */
 #define ZYNQ_NAND_ECC_MASK	0x00FFFFFF	/* ECC value mask */
 
+#define ZYNQ_NAND_MIO_NUM_NAND_8BIT	13
+#define ZYNQ_NAND_MIO_NUM_NAND_16BIT	8
+
+enum zynq_nand_bus_width {
+	NAND_BW_UNKNOWN = -1,
+	NAND_BW_8BIT,
+	NAND_BW_16BIT,
+};
+
 #ifndef NAND_CMD_LOCK_TIGHT
 #define NAND_CMD_LOCK_TIGHT 0x2c
 #endif
@@ -1006,6 +1016,23 @@ static int zynq_nand_device_ready(struct mtd_info *mtd)
 	return 0;
 }
 
+static int zynq_nand_check_is_16bit_bw_flash(void)
+{
+	int is_16bit_bw = NAND_BW_UNKNOWN;
+	int mio_num_8bit = 0, mio_num_16bit = 0;
+
+	mio_num_8bit = zynq_slcr_get_mio_pin_status("nand8");
+	if (mio_num_8bit == ZYNQ_NAND_MIO_NUM_NAND_8BIT)
+		is_16bit_bw = NAND_BW_8BIT;
+
+	mio_num_16bit = zynq_slcr_get_mio_pin_status("nand16");
+	if (mio_num_8bit == ZYNQ_NAND_MIO_NUM_NAND_8BIT &&
+	    mio_num_16bit == ZYNQ_NAND_MIO_NUM_NAND_16BIT)
+		is_16bit_bw = NAND_BW_16BIT;
+
+	return is_16bit_bw;
+}
+
 static int zynq_nand_init(struct nand_chip *nand_chip, int devnum)
 {
 	struct zynq_nand_info *xnand;
@@ -1017,6 +1044,7 @@ static int zynq_nand_init(struct nand_chip *nand_chip, int devnum)
 	unsigned long ecc_cfg;
 	int ondie_ecc_enabled = 0;
 	int err = -1;
+	int is_16bit_bw;
 
 	xnand = calloc(1, sizeof(struct zynq_nand_info));
 	if (!xnand) {
@@ -1046,6 +1074,16 @@ static int zynq_nand_init(struct nand_chip *nand_chip, int devnum)
 	nand_chip->read_buf = zynq_nand_read_buf;
 	nand_chip->write_buf = zynq_nand_write_buf;
 
+	is_16bit_bw = zynq_nand_check_is_16bit_bw_flash();
+	if (is_16bit_bw == NAND_BW_UNKNOWN) {
+		printf("%s: Unable detect NAND based on MIO settings\n",
+		       __func__);
+		goto fail;
+	}
+
+	if (is_16bit_bw == NAND_BW_16BIT)
+		nand_chip->options = NAND_BUSWIDTH_16;
+
 	nand_chip->bbt_options = NAND_BBT_USE_FLASH;
 
 	/* Initialize the NAND flash interface on NAND controller */

commit 73dea0ba2b75d365c2c5cd46ece48e2f8be32854
Author: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Date:   Mon May 7 23:18:41 2018 +0200

    UPSTREAM: mtd: nand: tegra: convert to driver model and live tree
    
    The Tegra NAND driver recently got broken by ongoing driver model resp.
    live tree migration work:
    
    NAND:  Could not decode nand-flash in device tree
    Tegra NAND init failed
    0 MiB
    
    A patch for NAND uclass support was proposed about a year ago:
    https://patchwork.ozlabs.org/patch/722282/
    
    It was not merged and I do not see on-going work for this.
    
    This commit just provides a driver model probe hook to retrieve further
    configuration from the live device tree. As there is no NAND ulass as of
    yet (ab)using UCLASS_MTD. Once UCLASS_NAND is supported, it would be
    possible to migrate to it.
    
    Change-Id: Idc7dc3440cc6158d61bf41150bde9c5010e30486
    Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Tom Warren <twarren@nvidia.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 4b11a6296aab84b628434cdbdd15697fab8a3a93)

diff --git a/drivers/mtd/nand/tegra_nand.c b/drivers/mtd/nand/tegra_nand.c
index c03c9cb178..3802cc9e89 100644
--- a/drivers/mtd/nand/tegra_nand.c
+++ b/drivers/mtd/nand/tegra_nand.c
@@ -18,6 +18,7 @@
 #include <asm/gpio.h>
 #include <fdtdec.h>
 #include <bouncebuf.h>
+#include <dm.h>
 #include "tegra_nand.h"
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -29,6 +30,13 @@ DECLARE_GLOBAL_DATA_PTR;
 /* ECC bytes to be generated for tag data */
 #define TAG_ECC_BYTES			4
 
+static const struct udevice_id tegra_nand_dt_ids[] = {
+	{
+		.compatible = "nvidia,tegra20-nand",
+	},
+	{ /* sentinel */ }
+};
+
 /* 64 byte oob block info for large page (== 2KB) device
  *
  * OOB flash layout for Tegra with Reed-Solomon 4 symbol correct ECC:
@@ -91,9 +99,11 @@ struct nand_drv {
 	struct fdt_nand config;
 };
 
-static struct nand_drv nand_ctrl;
-static struct mtd_info *our_mtd;
-static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE];
+struct tegra_nand_info {
+	struct udevice *dev;
+	struct nand_drv nand_ctrl;
+	struct nand_chip nand_chip;
+};
 
 /**
  * Wait for command completion
@@ -453,8 +463,8 @@ static void stop_command(struct nand_ctlr *reg)
  * @param *reg_val	address of reg_val
  * @return 0 if ok, -1 on error
  */
-static int set_bus_width_page_size(struct fdt_nand *config,
-	u32 *reg_val)
+static int set_bus_width_page_size(struct mtd_info *our_mtd,
+				   struct fdt_nand *config, u32 *reg_val)
 {
 	if (config->width == 8)
 		*reg_val = CFG_BUS_WIDTH_8BIT;
@@ -514,7 +524,7 @@ static int nand_rw_page(struct mtd_info *mtd, struct nand_chip *chip,
 
 	info = (struct nand_drv *)nand_get_controller_data(chip);
 	config = &info->config;
-	if (set_bus_width_page_size(config, &reg_val))
+	if (set_bus_width_page_size(mtd, config, &reg_val))
 		return -EINVAL;
 
 	/* Need to be 4-byte aligned */
@@ -722,7 +732,7 @@ static int nand_rw_oob(struct mtd_info *mtd, struct nand_chip *chip,
 	if (((int)chip->oob_poi) & 0x03)
 		return -EINVAL;
 	info = (struct nand_drv *)nand_get_controller_data(chip);
-	if (set_bus_width_page_size(&info->config, &reg_val))
+	if (set_bus_width_page_size(mtd, &info->config, &reg_val))
 		return -EINVAL;
 
 	stop_command(info->reg);
@@ -883,51 +893,39 @@ static void setup_timing(unsigned timing[FDT_NAND_TIMING_COUNT],
 /**
  * Decode NAND parameters from the device tree
  *
- * @param blob	Device tree blob
- * @param node	Node containing "nand-flash" compatible node
+ * @param dev		Driver model device
+ * @param config	Device tree NAND configuration
  * @return 0 if ok, -ve on error (FDT_ERR_...)
  */
-static int fdt_decode_nand(const void *blob, int node, struct fdt_nand *config)
+static int fdt_decode_nand(struct udevice *dev, struct fdt_nand *config)
 {
 	int err;
 
-	config->reg = (struct nand_ctlr *)fdtdec_get_addr(blob, node, "reg");
-	config->enabled = fdtdec_get_is_enabled(blob, node);
-	config->width = fdtdec_get_int(blob, node, "nvidia,nand-width", 8);
-	err = gpio_request_by_name_nodev(offset_to_ofnode(node),
-			"nvidia,wp-gpios", 0, &config->wp_gpio, GPIOD_IS_OUT);
+	config->reg = (struct nand_ctlr *)dev_read_addr(dev);
+	config->enabled = dev_read_enabled(dev);
+	config->width = dev_read_u32_default(dev, "nvidia,nand-width", 8);
+	err = gpio_request_by_name(dev, "nvidia,wp-gpios", 0, &config->wp_gpio,
+				   GPIOD_IS_OUT);
 	if (err)
 		return err;
-	err = fdtdec_get_int_array(blob, node, "nvidia,timing",
-			config->timing, FDT_NAND_TIMING_COUNT);
+	err = dev_read_u32_array(dev, "nvidia,timing", config->timing,
+				 FDT_NAND_TIMING_COUNT);
 	if (err < 0)
 		return err;
 
-	/* Now look up the controller and decode that */
-	node = fdt_next_node(blob, node, NULL);
-	if (node < 0)
-		return node;
-
 	return 0;
 }
 
-/**
- * Board-specific NAND initialization
- *
- * @param nand	nand chip info structure
- * @return 0, after initialized, -1 on error
- */
-int tegra_nand_init(struct nand_chip *nand, int devnum)
+static int tegra_probe(struct udevice *dev)
 {
-	struct nand_drv *info = &nand_ctrl;
+	struct tegra_nand_info *tegra = dev_get_priv(dev);
+	struct nand_chip *nand = &tegra->nand_chip;
+	struct nand_drv *info = &tegra->nand_ctrl;
 	struct fdt_nand *config = &info->config;
-	int node, ret;
+	struct mtd_info *our_mtd;
+	int ret;
 
-	node = fdtdec_next_compatible(gd->fdt_blob, 0,
-				      COMPAT_NVIDIA_TEGRA20_NAND);
-	if (node < 0)
-		return -1;
-	if (fdt_decode_nand(gd->fdt_blob, node, config)) {
+	if (fdt_decode_nand(dev, config)) {
 		printf("Could not decode nand-flash in device tree\n");
 		return -1;
 	}
@@ -950,7 +948,7 @@ int tegra_nand_init(struct nand_chip *nand, int devnum)
 	nand->ecc.strength = 1;
 	nand->select_chip = nand_select_chip;
 	nand->dev_ready  = nand_dev_ready;
-	nand_set_controller_data(nand, &nand_ctrl);
+	nand_set_controller_data(nand, &tegra->nand_ctrl);
 
 	/* Disable subpage writes as we do not provide ecc->hwctl */
 	nand->options |= NAND_NO_SUBPAGE_WRITE;
@@ -975,17 +973,31 @@ int tegra_nand_init(struct nand_chip *nand, int devnum)
 	if (ret)
 		return ret;
 
-	ret = nand_register(devnum, our_mtd);
-	if (ret)
+	ret = nand_register(0, our_mtd);
+	if (ret) {
+		dev_err(dev, "Failed to register MTD: %d\n", ret);
 		return ret;
+	}
 
 	return 0;
 }
 
+U_BOOT_DRIVER(tegra_nand) = {
+	.name = "tegra-nand",
+	.id = UCLASS_MTD,
+	.of_match = tegra_nand_dt_ids,
+	.probe = tegra_probe,
+	.priv_auto_alloc_size = sizeof(struct tegra_nand_info),
+};
+
 void board_nand_init(void)
 {
-	struct nand_chip *nand = &nand_chip[0];
-
-	if (tegra_nand_init(nand, 0))
-		puts("Tegra NAND init failed\n");
+	struct udevice *dev;
+	int ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_MTD,
+					  DM_GET_DRIVER(tegra_nand), &dev);
+	if (ret && ret != -ENODEV)
+		pr_err("Failed to initialize %s. (error %d)\n", dev->name,
+		       ret);
 }

commit ff9ab0b1b2c108b37d386760909bd4434c3e005c
Author: Jagdish Gediya <jagdish.gediya@nxp.com>
Date:   Wed May 2 01:20:57 2018 +0530

    UPSTREAM: mtd: nand: fsl_ifc: Fix nand waitfunc return value
    
    As per the IFC hardware manual, Most significant byte in nand_fsr
    register is the outcome of NAND READ STATUS command.
    
    So status value need to be shifted as per the nand framework
    requirement.
    
    Change-Id: I0cb0278f83f3ea6d3768660dcb3e169e47fcbdd1
    Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
    Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
    Reviewed-by: York Sun <york.sun@nxp.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit e8c669a3e6ec9b33aea55e957024f97300b99c1c)

diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c
index c36043d494..9bf4d717c4 100644
--- a/drivers/mtd/nand/fsl_ifc_nand.c
+++ b/drivers/mtd/nand/fsl_ifc_nand.c
@@ -701,6 +701,7 @@ static int fsl_ifc_wait(struct mtd_info *mtd, struct nand_chip *chip)
 	struct fsl_ifc_ctrl *ctrl = priv->ctrl;
 	struct fsl_ifc_runtime *ifc = ctrl->regs.rregs;
 	u32 nand_fsr;
+	int status;
 
 	if (ctrl->status != IFC_NAND_EVTER_STAT_OPC)
 		return NAND_STATUS_FAIL;
@@ -721,10 +722,10 @@ static int fsl_ifc_wait(struct mtd_info *mtd, struct nand_chip *chip)
 		return NAND_STATUS_FAIL;
 
 	nand_fsr = ifc_in32(&ifc->ifc_nand.nand_fsr);
+	status = nand_fsr >> 24;
 
 	/* Chip sometimes reporting write protect even when it's not */
-	nand_fsr = nand_fsr | NAND_STATUS_WP;
-	return nand_fsr;
+	return status | NAND_STATUS_WP;
 }
 
 static int fsl_ifc_read_page(struct mtd_info *mtd, struct nand_chip *chip,

commit 10be2ce2a73c6a91078a2aa76b797e7f34b0bf55
Author: Jagdish Gediya <jagdish.gediya@nxp.com>
Date:   Sat Mar 24 02:55:51 2018 +0530

    UPSTREAM: mtd: nand: fsl_ifc: Fix eccstat array overflow for IFC ver >= 2.0.0
    
    Number of ECC status registers i.e. (ECCSTATx) has been increased in
    IFC version 2.0.0 due to increase in SRAM size. This is causing
    eccstat array to over flow.
    
    So, replace eccstat array with u32 variable to make it fail-safe and
    independent of number of ECC status registers or SRAM size.
    
    Change-Id: I00699a36b57beed284afeccf44001ee4373d9bb6
    Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
    Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
    Reviewed-by: York Sun <york.sun@nxp.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit f195fad178979020b226671cafec9f9592860174)

diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c
index d1165f7d6b..c36043d494 100644
--- a/drivers/mtd/nand/fsl_ifc_nand.c
+++ b/drivers/mtd/nand/fsl_ifc_nand.c
@@ -270,14 +270,9 @@ static int is_blank(struct mtd_info *mtd, struct fsl_ifc_ctrl *ctrl,
 
 /* returns nonzero if entire page is blank */
 static int check_read_ecc(struct mtd_info *mtd, struct fsl_ifc_ctrl *ctrl,
-			  u32 *eccstat, unsigned int bufnum)
+			  u32 eccstat, unsigned int bufnum)
 {
-	u32 reg = eccstat[bufnum / 4];
-	int errors;
-
-	errors = (reg >> ((3 - bufnum % 4) * 8)) & 15;
-
-	return errors;
+	return (eccstat >> ((3 - bufnum % 4) * 8)) & 15;
 }
 
 /*
@@ -291,7 +286,7 @@ static int fsl_ifc_run_command(struct mtd_info *mtd)
 	struct fsl_ifc_runtime *ifc = ctrl->regs.rregs;
 	u32 timeo = (CONFIG_SYS_HZ * 10) / 1000;
 	u32 time_start;
-	u32 eccstat[8] = {0};
+	u32 eccstat;
 	int i;
 
 	/* set the chip select for NAND Transaction */
@@ -321,20 +316,17 @@ static int fsl_ifc_run_command(struct mtd_info *mtd)
 	if (ctrl->eccread) {
 		int errors;
 		int bufnum = ctrl->page & priv->bufnum_mask;
-		int sector = bufnum * chip->ecc.steps;
-		int sector_end = sector + chip->ecc.steps - 1;
-
-		for (i = sector / 4; i <= sector_end / 4; i++) {
-			if (i >= ARRAY_SIZE(eccstat)) {
-				printf("%s: eccstat too small for %d\n",
-				       __func__, i);
-				return -EIO;
-			}
+		int sector_start = bufnum * chip->ecc.steps;
+		int sector_end = sector_start + chip->ecc.steps - 1;
+		u32 *eccstat_regs;
 
-			eccstat[i] = ifc_in32(&ifc->ifc_nand.nand_eccstat[i]);
-		}
+		eccstat_regs = ifc->ifc_nand.nand_eccstat;
+		eccstat = ifc_in32(&eccstat_regs[sector_start / 4]);
+
+		for (i = sector_start; i <= sector_end; i++) {
+			if ((i != sector_start) && !(i % 4))
+				eccstat = ifc_in32(&eccstat_regs[i / 4]);
 
-		for (i = sector; i <= sector_end; i++) {
 			errors = check_read_ecc(mtd, ctrl, eccstat, i);
 
 			if (errors == 15) {
diff --git a/include/fsl_ifc.h b/include/fsl_ifc.h
index 29aa687507..4bff019177 100644
--- a/include/fsl_ifc.h
+++ b/include/fsl_ifc.h
@@ -892,8 +892,8 @@ struct fsl_ifc_nand {
 	u32 nand_erattr1;
 	u32 res19[0x10];
 	u32 nand_fsr;
-	u32 res20[0x3];
-	u32 nand_eccstat[6];
+	u32 res20[0x1];
+	u32 nand_eccstat[8];
 	u32 res21[0x1c];
 	u32 nanndcr;
 	u32 res22[0x2];

commit c398bb76a35a86a7a767d6d78da5089dbd84c213
Author: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Date:   Sat Jan 13 14:56:17 2018 -0300

    UPSTREAM: nand: zynq: Cleanup initialization
    
    CONFIG_NAND_ZYNQ selects CONFIG_SYS_NAND_SELF_INIT, so the
    driver doesn't have to play any ifdef game.
    
    Also, we can mark zynq_nand_init() as static and get rid
    of the mach-specific nand.h header.
    
    This is really a revert of:
    "mtd: zynq: nand: Move board_nand_init() function to board.c"
    (sha1: 310995d9f91ae56082b49be06fe8c3d01424f8f6)
    
    Change-Id: I3d435d645c911c88bdf1d25600896141cd37d54e
    Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
    Reviewed-by: Michal Simek <michal.simek@xilinx.com>
    Signed-off-by: Michal Simek <michal.simek@xilinx.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 41b7d7f241221ab9f0888f47f31226cfa74a971a)

diff --git a/arch/arm/mach-zynq/include/mach/nand.h b/arch/arm/mach-zynq/include/mach/nand.h
deleted file mode 100644
index 61ef45f582..0000000000
--- a/arch/arm/mach-zynq/include/mach/nand.h
+++ /dev/null
@@ -1,9 +0,0 @@
-/*
- * Copyright (C) 2017 National Instruments Corp.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <nand.h>
-
-void zynq_nand_init(void);
diff --git a/drivers/mtd/nand/zynq_nand.c b/drivers/mtd/nand/zynq_nand.c
index 9f6ff3d045..2d4e8b4736 100644
--- a/drivers/mtd/nand/zynq_nand.c
+++ b/drivers/mtd/nand/zynq_nand.c
@@ -1006,7 +1006,7 @@ static int zynq_nand_device_ready(struct mtd_info *mtd)
 	return 0;
 }
 
-int zynq_nand_init(struct nand_chip *nand_chip, int devnum)
+static int zynq_nand_init(struct nand_chip *nand_chip, int devnum)
 {
 	struct zynq_nand_info *xnand;
 	struct mtd_info *mtd;
@@ -1192,14 +1192,12 @@ fail:
 	return err;
 }
 
-#ifdef CONFIG_SYS_NAND_SELF_INIT
 static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE];
 
-void __weak board_nand_init(void)
+void board_nand_init(void)
 {
 	struct nand_chip *nand = &nand_chip[0];
 
 	if (zynq_nand_init(nand, 0))
 		puts("ZYNQ NAND init failed\n");
 }
-#endif

commit 54f5c90169c916daca48cbb5c1487809124924fd
Author: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Date:   Fri Jan 12 15:30:55 2018 -0300

    UPSTREAM: nand: zynq: Fix driver initialization
    
    This driver is currently broken, refusing to initialize properly.
    
    The reason is that get_nand_dev_by_index() was being called before
    nand_register(), thus returning a pointer into uninitialized memory.
    In other words, the struct mtd_info used by the driver is total junk.
    
    Fix it by getting the correct struct mtd_info, via nand_to_mtd()
    on the driver's struct nand_chip.
    
    Tested on a custom board, where the CPU is halted without this patch.
    
    Change-Id: I372eca6bfe6e6ca53612d8f2d8bcc5cdfe620222
    Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
    Reviewed-by: Michal Simek <michal.simek@xilinx.com>
    Signed-off-by: Michal Simek <michal.simek@xilinx.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 07c5cbbd1e6573e169687da873db37503a1f8b60)

diff --git a/drivers/mtd/nand/zynq_nand.c b/drivers/mtd/nand/zynq_nand.c
index 6494196049..9f6ff3d045 100644
--- a/drivers/mtd/nand/zynq_nand.c
+++ b/drivers/mtd/nand/zynq_nand.c
@@ -1025,7 +1025,7 @@ int zynq_nand_init(struct nand_chip *nand_chip, int devnum)
 	}
 
 	xnand->nand_base = (void __iomem *)ZYNQ_NAND_BASEADDR;
-	mtd = get_nand_dev_by_index(0);
+	mtd = nand_to_mtd(nand_chip);
 
 	nand_chip->priv = xnand;
 	mtd->priv = nand_chip;

commit d2204938cc51d050380d2c508959d62c43c49f3f
Author: Sean Nyekjaer <sean.nyekjaer@prevas.dk>
Date:   Wed Apr 4 11:50:54 2018 +0200

    UPSTREAM: sf: Add Spansion s25fl208k entry
    
    Add entry for Spansion s25fl208k part.
    
    Change-Id: Ia340455b50efeae30ef152e72d9a7083a22f468a
    Signed-off-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 4d95ed39a19565a784419c8d9d67ad1b46ce3103)

diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c
index b33e7fd666..bae3ced3a0 100644
--- a/drivers/mtd/spi/spi_flash_ids.c
+++ b/drivers/mtd/spi/spi_flash_ids.c
@@ -95,6 +95,7 @@ const struct spi_flash_info spi_flash_ids[] = {
 	{"s25fl016a",	   INFO(0x010214, 0x0, 64 * 1024,    32, 0) },
 	{"s25fl032a",	   INFO(0x010215, 0x0, 64 * 1024,    64, 0) },
 	{"s25fl064a",	   INFO(0x010216, 0x0, 64 * 1024,   128, 0) },
+	{"s25fl208k",	   INFO(0x014014, 0x0, 64 * 1024,    16, 0) },
 	{"s25fl116k",	   INFO(0x014015, 0x0, 64 * 1024,    32, 0) },
 	{"s25fl164k",	   INFO(0x014017, 0x0140,  64 * 1024,   128, 0) },
 	{"s25fl128p_256k", INFO(0x012018, 0x0300, 256 * 1024,    64, RD_FULL | WR_QPP) },

commit 56644b34b0f673a0e5c7f6e4e935ce7eb146903f
Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Date:   Tue Apr 10 14:40:45 2018 +0300

    UPSTREAM: mtd: sf: add support for sst26wf016, sst26wf032, sst26wf064
    
    This commit adds support for the SST sst26wf016, sst26wf032
    and sst26wf064 flash IC.
    
    Change-Id: I6ceec6acfd99a0e5e0ae97f59a9a62b2a9dd1f69
    Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit a19e97157c3721ef9c4b15c68c1773467a3b4a98)

diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c
index 122a217c60..b33e7fd666 100644
--- a/drivers/mtd/spi/spi_flash_ids.c
+++ b/drivers/mtd/spi/spi_flash_ids.c
@@ -152,6 +152,9 @@ const struct spi_flash_info spi_flash_ids[] = {
 	{"sst25wf040",	   INFO(0xbf2504, 0x0,	64 * 1024,     8, SECT_4K | SST_WR) },
 	{"sst25wf040b",	   INFO(0x621613, 0x0,	64 * 1024,     8, SECT_4K) },
 	{"sst25wf080",	   INFO(0xbf2505, 0x0,	64 * 1024,    16, SECT_4K | SST_WR) },
+	{"sst26wf016",	   INFO(0xbf2651, 0x0,	64 * 1024,    32, SECT_4K) },
+	{"sst26wf032",	   INFO(0xbf2622, 0x0,	64 * 1024,    64, SECT_4K) },
+	{"sst26wf064",	   INFO(0xbf2643, 0x0,	64 * 1024,   128, SECT_4K) },
 #endif
 #ifdef CONFIG_SPI_FLASH_WINBOND		/* WINBOND */
 	{"w25p80",	   INFO(0xef2014, 0x0,	64 * 1024,    16, 0) },

commit 58a870a7b29e0602b813801058a1ae59e0dcd822
Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Date:   Tue Apr 10 14:40:44 2018 +0300

    UPSTREAM: mtd: sf: Add support of sst26wf* flash ICs protection ops
    
    sst26wf flash series block protection implementation differs
    from other SST series, so add specific implementation
    flash_lock/flash_unlock/flash_is_locked functions for sst26wf
    flash ICs.
    
    Change-Id: Id4228dde75de212d7b29dc2a621f64805fed5b48
    Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
    Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 3d4fed87a5fa3ffedf64ff2811cd95c5ac4503ac)

diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 357b3bcfd4..7342590f32 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -88,6 +88,19 @@ enum spi_nor_option_flags {
 
 /* SST specific */
 #ifdef CONFIG_SPI_FLASH_SST
+#define SST26_CMD_READ_BPR		0x72
+#define SST26_CMD_WRITE_BPR		0x42
+
+#define SST26_BPR_8K_NUM		4
+#define SST26_MAX_BPR_REG_LEN		(18 + 1)
+#define SST26_BOUND_REG_SIZE		((32 + SST26_BPR_8K_NUM * 8) * SZ_1K)
+
+enum lock_ctl {
+	SST26_CTL_LOCK,
+	SST26_CTL_UNLOCK,
+	SST26_CTL_CHECK
+};
+
 # define CMD_SST_BP		0x02    /* Byte Program */
 # define CMD_SST_AAI_WP		0xAD	/* Auto Address Incr Word Program */
 
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 10f2e08ce3..475fa939af 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -16,6 +16,7 @@
 #include <spi.h>
 #include <spi_flash.h>
 #include <linux/log2.h>
+#include <linux/sizes.h>
 #include <dma.h>
 
 #include "sf_internal.h"
@@ -541,6 +542,164 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
 }
 
 #ifdef CONFIG_SPI_FLASH_SST
+static bool sst26_process_bpr(u32 bpr_size, u8 *cmd, u32 bit, enum lock_ctl ctl)
+{
+	switch (ctl) {
+		case SST26_CTL_LOCK:
+			cmd[bpr_size - (bit / 8) - 1] |= BIT(bit % 8);
+			break;
+		case SST26_CTL_UNLOCK:
+			cmd[bpr_size - (bit / 8) - 1] &= ~BIT(bit % 8);
+			break;
+		case SST26_CTL_CHECK:
+			return !!(cmd[bpr_size - (bit / 8) - 1] & BIT(bit % 8));
+	}
+
+	return false;
+}
+
+/*
+ * sst26wf016/sst26wf032/sst26wf064 have next block protection:
+ * 4x   - 8  KByte blocks - read & write protection bits - upper addresses
+ * 1x   - 32 KByte blocks - write protection bits
+ * rest - 64 KByte blocks - write protection bits
+ * 1x   - 32 KByte blocks - write protection bits
+ * 4x   - 8  KByte blocks - read & write protection bits - lower addresses
+ *
+ * We'll support only per 64k lock/unlock so lower and upper 64 KByte region
+ * will be treated as single block.
+ */
+
+/*
+ * Lock, unlock or check lock status of the flash region of the flash (depending
+ * on the lock_ctl value)
+ */
+static int sst26_lock_ctl(struct spi_flash *flash, u32 ofs, size_t len, enum lock_ctl ctl)
+{
+	u32 i, bpr_ptr, rptr_64k, lptr_64k, bpr_size;
+	bool lower_64k = false, upper_64k = false;
+	u8 cmd, bpr_buff[SST26_MAX_BPR_REG_LEN] = {};
+	int ret;
+
+	/* Check length and offset for 64k alignment */
+	if ((ofs & (SZ_64K - 1)) || (len & (SZ_64K - 1)))
+		return -EINVAL;
+
+	if (ofs + len > flash->size)
+		return -EINVAL;
+
+	/* SST26 family has only 16 Mbit, 32 Mbit and 64 Mbit IC */
+	if (flash->size != SZ_2M &&
+	    flash->size != SZ_4M &&
+	    flash->size != SZ_8M)
+		return -EINVAL;
+
+	bpr_size = 2 + (flash->size / SZ_64K / 8);
+
+	cmd = SST26_CMD_READ_BPR;
+	ret = spi_flash_read_common(flash, &cmd, 1, bpr_buff, bpr_size);
+	if (ret < 0) {
+		printf("SF: fail to read block-protection register\n");
+		return ret;
+	}
+
+	rptr_64k = min_t(u32, ofs + len , flash->size - SST26_BOUND_REG_SIZE);
+	lptr_64k = max_t(u32, ofs, SST26_BOUND_REG_SIZE);
+
+	upper_64k = ((ofs + len) > (flash->size - SST26_BOUND_REG_SIZE));
+	lower_64k = (ofs < SST26_BOUND_REG_SIZE);
+
+	/* Lower bits in block-protection register are about 64k region */
+	bpr_ptr = lptr_64k / SZ_64K - 1;
+
+	/* Process 64K blocks region */
+	while (lptr_64k < rptr_64k) {
+		if (sst26_process_bpr(bpr_size, bpr_buff, bpr_ptr, ctl))
+			return EACCES;
+
+		bpr_ptr++;
+		lptr_64k += SZ_64K;
+	}
+
+	/* 32K and 8K region bits in BPR are after 64k region bits */
+	bpr_ptr = (flash->size - 2 * SST26_BOUND_REG_SIZE) / SZ_64K;
+
+	/* Process lower 32K block region */
+	if (lower_64k)
+		if (sst26_process_bpr(bpr_size, bpr_buff, bpr_ptr, ctl))
+			return EACCES;
+
+	bpr_ptr++;
+
+	/* Process upper 32K block region */
+	if (upper_64k)
+		if (sst26_process_bpr(bpr_size, bpr_buff, bpr_ptr, ctl))
+			return EACCES;
+
+	bpr_ptr++;
+
+	/* Process lower 8K block regions */
+	for (i = 0; i < SST26_BPR_8K_NUM; i++) {
+		if (lower_64k)
+			if (sst26_process_bpr(bpr_size, bpr_buff, bpr_ptr, ctl))
+				return EACCES;
+
+		/* In 8K area BPR has both read and write protection bits */
+		bpr_ptr += 2;
+	}
+
+	/* Process upper 8K block regions */
+	for (i = 0; i < SST26_BPR_8K_NUM; i++) {
+		if (upper_64k)
+			if (sst26_process_bpr(bpr_size, bpr_buff, bpr_ptr, ctl))
+				return EACCES;
+
+		/* In 8K area BPR has both read and write protection bits */
+		bpr_ptr += 2;
+	}
+
+	/* If we check region status we don't need to write BPR back */
+	if (ctl == SST26_CTL_CHECK)
+		return 0;
+
+	cmd = SST26_CMD_WRITE_BPR;
+	ret = spi_flash_write_common(flash, &cmd, 1, bpr_buff, bpr_size);
+	if (ret < 0) {
+		printf("SF: fail to write block-protection register\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+static int sst26_unlock(struct spi_flash *flash, u32 ofs, size_t len)
+{
+	return sst26_lock_ctl(flash, ofs, len, SST26_CTL_UNLOCK);
+}
+
+static int sst26_lock(struct spi_flash *flash, u32 ofs, size_t len)
+{
+	return sst26_lock_ctl(flash, ofs, len, SST26_CTL_LOCK);
+}
+
+/*
+ * Returns EACCES (positive value) if region is locked, 0 if region is unlocked,
+ * and negative on errors.
+ */
+static int sst26_is_locked(struct spi_flash *flash, u32 ofs, size_t len)
+{
+	/*
+	 * is_locked function is used for check before reading or erasing flash
+	 * region, so offset and length might be not 64k allighned, so adjust
+	 * them to be 64k allighned as sst26_lock_ctl works only with 64k
+	 * allighned regions.
+	 */
+	ofs -= ofs & (SZ_64K - 1);
+	len = len & (SZ_64K - 1) ? (len & ~(SZ_64K - 1)) + SZ_64K : len;
+
+	return sst26_lock_ctl(flash, ofs, len, SST26_CTL_CHECK);
+}
+
 static int sst_byte_write(struct spi_flash *flash, u32 offset, const void *buf)
 {
 	struct spi_slave *spi = flash->spi;
@@ -1034,6 +1193,15 @@ int spi_flash_scan(struct spi_flash *flash)
 	}
 #endif
 
+/* sst26wf series block protection implementation differs from other series */
+#if defined(CONFIG_SPI_FLASH_SST)
+	if (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_SST && info->id[1] == 0x26) {
+		flash->flash_lock = sst26_lock;
+		flash->flash_unlock = sst26_unlock;
+		flash->flash_is_locked = sst26_is_locked;
+	}
+#endif
+
 	/* Compute the flash size */
 	flash->shift = (flash->dual_flash & SF_DUAL_PARALLEL_FLASH) ? 1 : 0;
 	flash->page_size = info->page_size;

commit 583966da1e6f75980b29d20da3f69b4ecf144c9c
Author: Mario Six <mario.six@gdsys.cc>
Date:   Wed Mar 28 14:38:41 2018 +0200

    UPSTREAM: mtd: cfi_flash: Make live-tree compatible
    
    Make the cfi_flash driver compatible with a live device tree.
    
    Change-Id: Iec5b202b4ee94bbf3a129147037abe647978ab3f
    Signed-off-by: Mario Six <mario.six@gdsys.cc>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 8bfeb33c463296af38432c3dbfb976f45545e381)

diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index da44e6184e..e5509fe353 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -2461,27 +2461,28 @@ unsigned long flash_init(void)
 #ifdef CONFIG_CFI_FLASH /* for driver model */
 static int cfi_flash_probe(struct udevice *dev)
 {
-	void *blob = (void *)gd->fdt_blob;
-	int node = dev_of_offset(dev);
 	const fdt32_t *cell;
-	phys_addr_t addr;
-	int parent, addrc, sizec;
+	int addrc, sizec;
 	int len, idx;
 
-	parent = fdt_parent_offset(blob, node);
-	fdt_support_default_count_cells(blob, parent, &addrc, &sizec);
-	/* decode regs, there may be multiple reg tuples. */
-	cell = fdt_getprop(blob, node, "reg", &len);
+	addrc = dev_read_addr_cells(dev);
+	sizec = dev_read_size_cells(dev);
+
+	/* decode regs; there may be multiple reg tuples. */
+	cell = dev_read_prop(dev, "reg", &len);
 	if (!cell)
 		return -ENOENT;
 	idx = 0;
 	len /= sizeof(fdt32_t);
 	while (idx < len) {
-		addr = fdt_translate_address((void *)blob,
-					     node, cell + idx);
+		phys_addr_t addr;
+
+		addr = dev_translate_address(dev, cell + idx);
+
 		flash_info[cfi_flash_num_flash_banks].dev = dev;
 		flash_info[cfi_flash_num_flash_banks].base = addr;
 		cfi_flash_num_flash_banks++;
+
 		idx += addrc + sizec;
 	}
 	gd->bd->bi_flashstart = flash_info[0].base;

commit 215519648e8c36ff416507db74e6f354e522773c
Author: Marek Vasut <marek.vasut+renesas@gmail.com>
Date:   Sat Aug 19 23:24:08 2017 +0200

    UPSTREAM: mtd: rpc: Add Renesas RPC Hyperflash driver
    
    Add driver for the RPC block in Hyperflash mode. This driver allows
    access to a CFI Hyperflash attached to the RPC block and does not
    support RPC in SPI mode.
    
    Change-Id: Ifb30047694ea0ef39f5d7f7b4181cce338a8f245
    Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
    Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit a405a55ba8daf70311a1831938bbdc1ed92c5a83)

diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig
index 658197a864..3b04e24fa1 100644
--- a/drivers/mtd/Kconfig
+++ b/drivers/mtd/Kconfig
@@ -46,6 +46,13 @@ config FLASH_PIC32
 	  This enables access to Microchip PIC32 internal non-CFI flash
 	  chips through PIC32 Non-Volatile-Memory Controller.
 
+config RENESAS_RPC_HF
+	bool "Renesas RCar Gen3 RPC Hyperflash driver"
+	depends on RCAR_GEN3 && MTD
+	help
+	  This enables access to Hyperflash memory through the Renesas
+	  RCar Gen3 RPC controller.
+
 endmenu
 
 source "drivers/mtd/nand/Kconfig"
diff --git a/drivers/mtd/Makefile b/drivers/mtd/Makefile
index 3a3b54bdd1..c57b7bd1b8 100644
--- a/drivers/mtd/Makefile
+++ b/drivers/mtd/Makefile
@@ -21,3 +21,4 @@ obj-$(CONFIG_MW_EEPROM) += mw_eeprom.o
 obj-$(CONFIG_FLASH_PIC32) += pic32_flash.o
 obj-$(CONFIG_ST_SMI) += st_smi.o
 obj-$(CONFIG_STM32_FLASH) += stm32_flash.o
+obj-$(CONFIG_RENESAS_RPC_HF) += renesas_rpc_hf.o
diff --git a/drivers/mtd/renesas_rpc_hf.c b/drivers/mtd/renesas_rpc_hf.c
new file mode 100644
index 0000000000..1ba6e354a0
--- /dev/null
+++ b/drivers/mtd/renesas_rpc_hf.c
@@ -0,0 +1,398 @@
+/*
+ * Renesas RCar Gen3 RPC Hyperflash driver
+ *
+ * Copyright (C) 2016 Renesas Electronics Corporation
+ * Copyright (C) 2016 Cogent Embedded, Inc.
+ * Copyright (C) 2017 Marek Vasut <marek.vasut@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <clk.h>
+#include <dm.h>
+#include <dm/of_access.h>
+#include <errno.h>
+#include <fdt_support.h>
+#include <flash.h>
+#include <mtd.h>
+#include <wait_bit.h>
+#include <mtd/cfi_flash.h>
+
+#define RPC_CMNCR		0x0000	/* R/W */
+#define RPC_CMNCR_MD		BIT(31)
+#define RPC_CMNCR_MOIIO0(val)	(((val) & 0x3) << 16)
+#define RPC_CMNCR_MOIIO1(val)	(((val) & 0x3) << 18)
+#define RPC_CMNCR_MOIIO2(val)	(((val) & 0x3) << 20)
+#define RPC_CMNCR_MOIIO3(val)	(((val) & 0x3) << 22)
+#define RPC_CMNCR_MOIIO_HIZ	(RPC_CMNCR_MOIIO0(3) | RPC_CMNCR_MOIIO1(3) | \
+				 RPC_CMNCR_MOIIO2(3) | RPC_CMNCR_MOIIO3(3))
+#define RPC_CMNCR_IO0FV(val)	(((val) & 0x3) << 8)
+#define RPC_CMNCR_IO2FV(val)	(((val) & 0x3) << 12)
+#define RPC_CMNCR_IO3FV(val)	(((val) & 0x3) << 14)
+#define RPC_CMNCR_IOFV_HIZ	(RPC_CMNCR_IO0FV(3) | RPC_CMNCR_IO2FV(3) | \
+				 RPC_CMNCR_IO3FV(3))
+#define RPC_CMNCR_BSZ(val)	(((val) & 0x3) << 0)
+
+#define RPC_SSLDR		0x0004	/* R/W */
+#define RPC_SSLDR_SPNDL(d)	(((d) & 0x7) << 16)
+#define RPC_SSLDR_SLNDL(d)	(((d) & 0x7) << 8)
+#define RPC_SSLDR_SCKDL(d)	(((d) & 0x7) << 0)
+
+#define RPC_DRCR		0x000C	/* R/W */
+#define RPC_DRCR_SSLN		BIT(24)
+#define RPC_DRCR_RBURST(v)	(((v) & 0x1F) << 16)
+#define RPC_DRCR_RCF		BIT(9)
+#define RPC_DRCR_RBE		BIT(8)
+#define RPC_DRCR_SSLE		BIT(0)
+
+#define RPC_DRCMR		0x0010	/* R/W */
+#define RPC_DRCMR_CMD(c)	(((c) & 0xFF) << 16)
+#define RPC_DRCMR_OCMD(c)	(((c) & 0xFF) << 0)
+
+#define RPC_DREAR		0x0014	/* R/W */
+#define RPC_DREAR_EAV(v)	(((v) & 0xFF) << 16)
+#define RPC_DREAR_EAC(v)	(((v) & 0x7) << 0)
+
+#define RPC_DROPR		0x0018	/* R/W */
+#define RPC_DROPR_OPD3(o)	(((o) & 0xFF) << 24)
+#define RPC_DROPR_OPD2(o)	(((o) & 0xFF) << 16)
+#define RPC_DROPR_OPD1(o)	(((o) & 0xFF) << 8)
+#define RPC_DROPR_OPD0(o)	(((o) & 0xFF) << 0)
+
+#define RPC_DRENR		0x001C	/* R/W */
+#define RPC_DRENR_CDB(o)	(u32)((((o) & 0x3) << 30))
+#define RPC_DRENR_OCDB(o)	(((o) & 0x3) << 28)
+#define RPC_DRENR_ADB(o)	(((o) & 0x3) << 24)
+#define RPC_DRENR_OPDB(o)	(((o) & 0x3) << 20)
+#define RPC_DRENR_SPIDB(o)	(((o) & 0x3) << 16)
+#define RPC_DRENR_DME		BIT(15)
+#define RPC_DRENR_CDE		BIT(14)
+#define RPC_DRENR_OCDE		BIT(12)
+#define RPC_DRENR_ADE(v)	(((v) & 0xF) << 8)
+#define RPC_DRENR_OPDE(v)	(((v) & 0xF) << 4)
+
+#define RPC_SMCR		0x0020	/* R/W */
+#define RPC_SMCR_SSLKP		BIT(8)
+#define RPC_SMCR_SPIRE		BIT(2)
+#define RPC_SMCR_SPIWE		BIT(1)
+#define RPC_SMCR_SPIE		BIT(0)
+
+#define RPC_SMCMR		0x0024	/* R/W */
+#define RPC_SMCMR_CMD(c)	(((c) & 0xFF) << 16)
+#define RPC_SMCMR_OCMD(c)	(((c) & 0xFF) << 0)
+
+#define RPC_SMADR		0x0028	/* R/W */
+#define RPC_SMOPR		0x002C	/* R/W */
+#define RPC_SMOPR_OPD0(o)	(((o) & 0xFF) << 0)
+#define RPC_SMOPR_OPD1(o)	(((o) & 0xFF) << 8)
+#define RPC_SMOPR_OPD2(o)	(((o) & 0xFF) << 16)
+#define RPC_SMOPR_OPD3(o)	(((o) & 0xFF) << 24)
+
+#define RPC_SMENR		0x0030	/* R/W */
+#define RPC_SMENR_CDB(o)	(((o) & 0x3) << 30)
+#define RPC_SMENR_OCDB(o)	(((o) & 0x3) << 28)
+#define RPC_SMENR_ADB(o)	(((o) & 0x3) << 24)
+#define RPC_SMENR_OPDB(o)	(((o) & 0x3) << 20)
+#define RPC_SMENR_SPIDB(o)	(((o) & 0x3) << 16)
+#define RPC_SMENR_DME		BIT(15)
+#define RPC_SMENR_CDE		BIT(14)
+#define RPC_SMENR_OCDE		BIT(12)
+#define RPC_SMENR_ADE(v)	(((v) & 0xF) << 8)
+#define RPC_SMENR_OPDE(v)	(((v) & 0xF) << 4)
+#define RPC_SMENR_SPIDE(v)	(((v) & 0xF) << 0)
+
+#define RPC_SMRDR0		0x0038	/* R */
+#define RPC_SMRDR1		0x003C	/* R */
+#define RPC_SMWDR0		0x0040	/* R/W */
+#define RPC_SMWDR1		0x0044	/* R/W */
+#define RPC_CMNSR		0x0048	/* R */
+#define RPC_CMNSR_SSLF		BIT(1)
+#define	RPC_CMNSR_TEND		BIT(0)
+
+#define RPC_DRDMCR		0x0058	/* R/W */
+#define RPC_DRDMCR_DMCYC(v)	(((v) & 0xF) << 0)
+
+#define RPC_DRDRENR		0x005C	/* R/W */
+#define RPC_DRDRENR_HYPE	(0x5 << 12)
+#define RPC_DRDRENR_ADDRE	BIT(8)
+#define RPC_DRDRENR_OPDRE	BIT(4)
+#define RPC_DRDRENR_DRDRE	BIT(0)
+
+#define RPC_SMDMCR		0x0060	/* R/W */
+#define RPC_SMDMCR_DMCYC(v)	(((v) & 0xF) << 0)
+
+#define RPC_SMDRENR		0x0064	/* R/W */
+#define RPC_SMDRENR_HYPE	(0x5 << 12)
+#define RPC_SMDRENR_ADDRE	BIT(8)
+#define RPC_SMDRENR_OPDRE	BIT(4)
+#define RPC_SMDRENR_SPIDRE	BIT(0)
+
+#define RPC_PHYCNT		0x007C	/* R/W */
+#define RPC_PHYCNT_CAL		BIT(31)
+#define PRC_PHYCNT_OCTA_AA	BIT(22)
+#define PRC_PHYCNT_OCTA_SA	BIT(23)
+#define PRC_PHYCNT_EXDS		BIT(21)
+#define RPC_PHYCNT_OCT		BIT(20)
+#define RPC_PHYCNT_WBUF2	BIT(4)
+#define RPC_PHYCNT_WBUF		BIT(2)
+#define RPC_PHYCNT_MEM(v)	(((v) & 0x3) << 0)
+
+#define RPC_PHYINT		0x0088	/* R/W */
+#define RPC_PHYINT_RSTEN	BIT(18)
+#define RPC_PHYINT_WPEN		BIT(17)
+#define RPC_PHYINT_INTEN	BIT(16)
+#define RPC_PHYINT_RST		BIT(2)
+#define RPC_PHYINT_WP		BIT(1)
+#define RPC_PHYINT_INT		BIT(0)
+
+#define RPC_WBUF		0x8000	/* R/W size=4/8/16/32/64Bytes */
+#define RPC_WBUF_SIZE		0x100
+
+static phys_addr_t rpc_base;
+
+enum rpc_hf_size {
+	RPC_HF_SIZE_16BIT = RPC_SMENR_SPIDE(0x8),
+	RPC_HF_SIZE_32BIT = RPC_SMENR_SPIDE(0xC),
+	RPC_HF_SIZE_64BIT = RPC_SMENR_SPIDE(0xF),
+};
+
+static int rpc_hf_wait_tend(void)
+{
+	void __iomem *reg = (void __iomem *)rpc_base + RPC_CMNSR;
+	return wait_for_bit_le32(reg, RPC_CMNSR_TEND, true, 1000, 0);
+}
+
+static int rpc_hf_mode(bool man)
+{
+	int ret;
+
+	ret = rpc_hf_wait_tend();
+	if (ret)
+		return ret;
+
+	clrsetbits_le32(rpc_base + RPC_PHYCNT,
+		 RPC_PHYCNT_WBUF | RPC_PHYCNT_WBUF2 |
+		 RPC_PHYCNT_CAL | RPC_PHYCNT_MEM(3),
+		 RPC_PHYCNT_CAL | RPC_PHYCNT_MEM(3));
+
+	clrsetbits_le32(rpc_base + RPC_CMNCR,
+		 RPC_CMNCR_MD | RPC_CMNCR_BSZ(3),
+		 RPC_CMNCR_MOIIO_HIZ | RPC_CMNCR_IOFV_HIZ |
+		 (man ? RPC_CMNCR_MD : 0) | RPC_CMNCR_BSZ(1));
+
+	if (man)
+		return 0;
+
+	writel(RPC_DRCR_RBURST(0x1F) | RPC_DRCR_RCF | RPC_DRCR_RBE,
+	       rpc_base + RPC_DRCR);
+
+	writel(RPC_DRCMR_CMD(0xA0), rpc_base + RPC_DRCMR);
+	writel(RPC_DRENR_CDB(2) | RPC_DRENR_OCDB(2) | RPC_DRENR_ADB(2) |
+	       RPC_DRENR_SPIDB(2) | RPC_DRENR_CDE | RPC_DRENR_OCDE |
+	       RPC_DRENR_ADE(4), rpc_base + RPC_DRENR);
+	writel(RPC_DRDMCR_DMCYC(0xE), rpc_base + RPC_DRDMCR);
+	writel(RPC_DRDRENR_HYPE | RPC_DRDRENR_ADDRE | RPC_DRDRENR_DRDRE,
+	       rpc_base + RPC_DRDRENR);
+
+	/* Dummy read */
+	readl(rpc_base + RPC_DRCR);
+
+	return 0;
+}
+
+static int rpc_hf_xfer(void *addr, u64 wdata, u64 *rdata,
+		       enum rpc_hf_size size, bool write)
+{
+	int ret;
+	u32 val;
+
+	ret = rpc_hf_mode(1);
+	if (ret)
+		return ret;
+
+	/* Submit HF address, SMCMR CMD[7] ~= CA Bit# 47 (R/nW) */
+	writel(write ? 0 : RPC_SMCMR_CMD(0x80), rpc_base + RPC_SMCMR);
+	writel((uintptr_t)addr >> 1, rpc_base + RPC_SMADR);
+	writel(0x0, rpc_base + RPC_SMOPR);
+
+	writel(RPC_SMDRENR_HYPE | RPC_SMDRENR_ADDRE | RPC_SMDRENR_SPIDRE,
+	       rpc_base + RPC_SMDRENR);
+
+	val = RPC_SMENR_CDB(2) | RPC_SMENR_OCDB(2) |
+	      RPC_SMENR_ADB(2) | RPC_SMENR_SPIDB(2) |
+	      RPC_SMENR_CDE | RPC_SMENR_OCDE | RPC_SMENR_ADE(4) | size;
+
+	if (write) {
+		writel(val, rpc_base + RPC_SMENR);
+
+		if (size == RPC_HF_SIZE_64BIT)
+			writeq(cpu_to_be64(wdata), rpc_base + RPC_SMWDR0);
+		else
+			writel(cpu_to_be32(wdata), rpc_base + RPC_SMWDR0);
+
+		writel(RPC_SMCR_SPIWE | RPC_SMCR_SPIE, rpc_base + RPC_SMCR);
+	} else {
+		val |= RPC_SMENR_DME;
+
+		writel(RPC_SMDMCR_DMCYC(0xE), rpc_base + RPC_SMDMCR);
+
+		writel(val, rpc_base + RPC_SMENR);
+
+		writel(RPC_SMCR_SPIRE | RPC_SMCR_SPIE, rpc_base + RPC_SMCR);
+
+		ret = rpc_hf_wait_tend();
+		if (ret)
+			return ret;
+
+		if (size == RPC_HF_SIZE_64BIT)
+			*rdata = be64_to_cpu(readq(rpc_base + RPC_SMRDR0));
+		else
+			*rdata = be32_to_cpu(readl(rpc_base + RPC_SMRDR0));
+	}
+
+	return rpc_hf_mode(0);
+}
+
+static void rpc_hf_write_cmd(void *addr, u64 wdata, enum rpc_hf_size size)
+{
+	int ret;
+
+	ret = rpc_hf_xfer(addr, wdata, NULL, size, 1);
+	if (ret)
+		printf("RPC: Write failed, ret=%i\n", ret);
+}
+
+static u64 rpc_hf_read_reg(void *addr, enum rpc_hf_size size)
+{
+	u64 rdata = 0;
+	int ret;
+
+	ret = rpc_hf_xfer(addr, 0, &rdata, size, 0);
+	if (ret)
+		printf("RPC: Read failed, ret=%i\n", ret);
+
+	return rdata;
+}
+
+void flash_write8(u8 value, void *addr)
+{
+	rpc_hf_write_cmd(addr, value, RPC_HF_SIZE_16BIT);
+}
+
+void flash_write16(u16 value, void *addr)
+{
+	rpc_hf_write_cmd(addr, value, RPC_HF_SIZE_16BIT);
+}
+
+void flash_write32(u32 value, void *addr)
+{
+	rpc_hf_write_cmd(addr, value, RPC_HF_SIZE_32BIT);
+}
+
+void flash_write64(u64 value, void *addr)
+{
+	rpc_hf_write_cmd(addr, value, RPC_HF_SIZE_64BIT);
+}
+
+u8 flash_read8(void *addr)
+{
+	return rpc_hf_read_reg(addr, RPC_HF_SIZE_16BIT);
+}
+
+u16 flash_read16(void *addr)
+{
+	return rpc_hf_read_reg(addr, RPC_HF_SIZE_16BIT);
+}
+
+u32 flash_read32(void *addr)
+{
+	return rpc_hf_read_reg(addr, RPC_HF_SIZE_32BIT);
+}
+
+u64 flash_read64(void *addr)
+{
+	return rpc_hf_read_reg(addr, RPC_HF_SIZE_64BIT);
+}
+
+static int rpc_hf_bind(struct udevice *parent)
+{
+	const void *fdt = gd->fdt_blob;
+	ofnode node;
+	int ret, off;
+
+	/*
+	 * Check if there are any SPI NOR child nodes, if so, do NOT bind
+	 * as this controller will be operated by the QSPI driver instead.
+	 */
+	dev_for_each_subnode(node, parent) {
+		off = ofnode_to_offset(node);
+
+		ret = fdt_node_check_compatible(fdt, off, "spi-flash");
+		if (!ret)
+			return -ENODEV;
+
+		ret = fdt_node_check_compatible(fdt, off, "jedec,spi-nor");
+		if (!ret)
+			return -ENODEV;
+	}
+
+	return 0;
+}
+
+static int rpc_hf_probe(struct udevice *dev)
+{
+	void *blob = (void *)gd->fdt_blob;
+	const fdt32_t *cell;
+	int node = dev_of_offset(dev);
+	int parent, addrc, sizec, len, ret;
+	struct clk clk;
+	phys_addr_t flash_base;
+
+	parent = fdt_parent_offset(blob, node);
+	fdt_support_default_count_cells(blob, parent, &addrc, &sizec);
+	cell = fdt_getprop(blob, node, "reg", &len);
+	if (!cell)
+		return -ENOENT;
+
+	if (addrc != 2 || sizec != 2)
+		return -EINVAL;
+
+
+	ret = clk_get_by_index(dev, 0, &clk);
+	if (ret < 0) {
+		dev_err(dev, "Failed to get RPC clock\n");
+		return ret;
+	}
+
+	ret = clk_enable(&clk);
+	clk_free(&clk);
+	if (ret) {
+		dev_err(dev, "Failed to enable RPC clock\n");
+		return ret;
+	}
+
+	rpc_base = fdt_translate_address(blob, node, cell);
+	flash_base = fdt_translate_address(blob, node, cell + addrc + sizec);
+
+	flash_info[0].dev = dev;
+	flash_info[0].base = flash_base;
+	cfi_flash_num_flash_banks = 1;
+	gd->bd->bi_flashstart = flash_base;
+
+	return 0;
+}
+
+static const struct udevice_id rpc_hf_ids[] = {
+	{ .compatible = "renesas,rpc" },
+	{}
+};
+
+U_BOOT_DRIVER(rpc_hf) = {
+	.name		= "rpc_hf",
+	.id		= UCLASS_MTD,
+	.of_match	= rpc_hf_ids,
+	.bind		= rpc_hf_bind,
+	.probe		= rpc_hf_probe,
+};

commit c615eb94c4d2072f16c343cfc1f504bae73da214
Author: Vipul Kumar <vipul.kumar@xilinx.com>
Date:   Sat Mar 10 17:52:23 2018 +0530

    UPSTREAM: nand: arasan_nfc: Fixed NAND write issue
    
    In commit 2453c695185f ("arm64: zynqmp: nand: Fixed NAND erase issue for
    size 1GiB or more"), ARASAN_NAND_MEM_ADDR1_PAGE_MASK macro changed
    to 0xFFFF and the same macro is used in nand write and so that getting
    nand write error.
    This patch reverted this macro to the 0xFFFF0000 and used
    ARASAN_NAND_MEM_ADDR1_COL_MASK in the nand erase function
    which is equal to 0xFFFF.
    
    Change-Id: Iae3ff9baf6bb1c05512c8432c346fafbb1bf6225
    Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
    Signed-off-by: Michal Simek <michal.simek@xilinx.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 6fbbe2d8f671920948a0b1882c6884cfdd0cbe67)

diff --git a/drivers/mtd/nand/arasan_nfc.c b/drivers/mtd/nand/arasan_nfc.c
index 9c82c7db33..3be66efb73 100644
--- a/drivers/mtd/nand/arasan_nfc.c
+++ b/drivers/mtd/nand/arasan_nfc.c
@@ -86,7 +86,7 @@ struct arasan_nand_command_format {
 #define ARASAN_NAND_CMD_ADDR_CYCL_MASK		0x70000000
 #define ARASAN_NAND_CMD_ADDR_CYCL_SHIFT		28
 
-#define ARASAN_NAND_MEM_ADDR1_PAGE_MASK		0xFFFF
+#define ARASAN_NAND_MEM_ADDR1_PAGE_MASK		0xFFFF0000
 #define ARASAN_NAND_MEM_ADDR1_COL_MASK		0xFFFF
 #define ARASAN_NAND_MEM_ADDR1_PAGE_SHIFT	16
 #define ARASAN_NAND_MEM_ADDR2_PAGE_MASK		0xFF
@@ -796,7 +796,7 @@ static int arasan_nand_erase(struct arasan_nand_command_format *curr_cmd,
 	writel(reg_val, &arasan_nand_base->cmd_reg);
 
 	page = (page_addr >> ARASAN_NAND_MEM_ADDR1_PAGE_SHIFT) &
-		ARASAN_NAND_MEM_ADDR1_PAGE_MASK;
+		ARASAN_NAND_MEM_ADDR1_COL_MASK;
 	column = page_addr & ARASAN_NAND_MEM_ADDR1_COL_MASK;
 	writel(column | (page << ARASAN_NAND_MEM_ADDR1_PAGE_SHIFT),
 	       &arasan_nand_base->memadr_reg1);

commit 6428a0b705c699b4280032ecd6d3a6add43890ac
Author: Miquel Raynal <miquel.raynal@bootlin.com>
Date:   Wed Feb 28 20:52:01 2018 +0100

    UPSTREAM: sunxi: move the NAND parameters to Kconfig
    
    Move the NAND parameters from defconfig files to Kconfig for SUNXI
    architecture only. Fort now only the CHIP pro is migrated.
    
    It would have been better to convert this defconfig entry to Kconfig for
    all supported machines/architectures but it has been abandoned due to a
    fairly high amount of errors reported by the moveconfig.py tool. This is
    due to defines quite often being multiplications of values/other defines
    not correctly handled.
    
    Change-Id: I9010719934b53180d2af15e45acabc45dd39d039
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
    Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 748b5b34d3d0e67923cac5f8606b7a209e063df6)

diff --git a/configs/CHIP_pro_defconfig b/configs/CHIP_pro_defconfig
index 5b4199009e..effded3d64 100644
--- a/configs/CHIP_pro_defconfig
+++ b/configs/CHIP_pro_defconfig
@@ -4,7 +4,9 @@ CONFIG_MACH_SUN5I=y
 CONFIG_DRAM_TIMINGS_DDR3_800E_1066G_1333J=y
 CONFIG_USB0_VBUS_PIN="PB10"
 CONFIG_DEFAULT_DEVICE_TREE="sun5i-gr8-chip-pro"
-CONFIG_SYS_EXTRA_OPTIONS="SYS_NAND_BLOCK_SIZE=0x40000,SYS_NAND_PAGE_SIZE=4096,SYS_NAND_OOBSIZE=256"
+CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
+CONFIG_SYS_NAND_OOBSIZE=0x1000
+CONFIG_SYS_NAND_OOBSIZE=0x100
 CONFIG_SPL=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_FASTBOOT_FLASH=y
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index d545b90c0d..1302108476 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -191,6 +191,28 @@ config NAND_ZYNQ_USE_BOOTLOADER1_TIMINGS
 
 comment "Generic NAND options"
 
+config SYS_NAND_BLOCK_SIZE
+	hex "NAND chip eraseblock size"
+	depends on ARCH_SUNXI
+	help
+	  Number of data bytes in one eraseblock for the NAND chip on the
+	  board. This is the multiple of NAND_PAGE_SIZE and the number of
+	  pages.
+
+config SYS_NAND_PAGE_SIZE
+	hex "NAND chip page size"
+	depends on ARCH_SUNXI
+	help
+	  Number of data bytes in one page for the NAND chip on the
+	  board, not including the OOB area.
+
+config SYS_NAND_OOBSIZE
+	hex "NAND chip OOB size"
+	depends on ARCH_SUNXI
+	help
+	  Number of bytes in the Out-Of-Band area for the NAND chip on
+	  the board.
+
 # Enhance depends when converting drivers to Kconfig which use this config
 # option (mxc_nand, ndfc, omap_gpmc).
 config SYS_NAND_BUSWIDTH_16BIT

commit 7cdf5b3d2bd52aafb29d00bf974d0ae7fcbcfc7a
Author: Miquel Raynal <miquel.raynal@bootlin.com>
Date:   Wed Feb 28 20:52:00 2018 +0100

    UPSTREAM: sunxi: make NAND_SUNXI use ARCH_SUNXI as default in Kconfig
    
    Remove NAND_SUNXI from the CHIP pro defconfig to be automatically
    selected depending on the state of ARCH_SUNXI.
    
    Change-Id: I49bec5ad57be81004a5836adeebd40b5fabe55e4
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
    Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit b56052f4ca40d0d8b29fb7bd3be4c104618e4fc8)

diff --git a/configs/CHIP_pro_defconfig b/configs/CHIP_pro_defconfig
index 07a5da6b9c..5b4199009e 100644
--- a/configs/CHIP_pro_defconfig
+++ b/configs/CHIP_pro_defconfig
@@ -20,7 +20,6 @@ CONFIG_ENV_UBI_PART="UBI"
 CONFIG_ENV_UBI_VOLUME="uboot-env"
 # CONFIG_MMC is not set
 CONFIG_NAND=y
-CONFIG_NAND_SUNXI=y
 CONFIG_AXP_ALDO3_VOLT=3300
 CONFIG_AXP_ALDO4_VOLT=3300
 CONFIG_USB_EHCI_HCD=y
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 24c1ebb25c..d545b90c0d 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -118,6 +118,7 @@ endif
 
 config NAND_SUNXI
 	bool "Support for NAND on Allwinner SoCs"
+	default ARCH_SUNXI
 	depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUN8I
 	select SYS_NAND_SELF_INIT
 	select SYS_NAND_U_BOOT_LOCATIONS

commit 05d4858a0844550ae3e012cb6d7ae28aa770d480
Author: Miquel Raynal <miquel.raynal@bootlin.com>
Date:   Wed Feb 28 20:51:59 2018 +0100

    UPSTREAM: sunxi: automatically select SPL_NAND_SUPPORT in Kconfig
    
    Make SUNXI_NAND select SPL_NAND_SUPPORT in Kconfig, this limit the
    number of entries to add in defconfig files when adding NAND support.
    
    For now, the only board using it is the CHIP pro.
    
    Change-Id: Ia308aa9a877a06912571510d18a00e3aaaff0403
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
    Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 6d094d535c121637775b5108f1e78e426017f757)

diff --git a/configs/CHIP_pro_defconfig b/configs/CHIP_pro_defconfig
index 3a748fc27e..07a5da6b9c 100644
--- a/configs/CHIP_pro_defconfig
+++ b/configs/CHIP_pro_defconfig
@@ -1,6 +1,5 @@
 CONFIG_ARM=y
 CONFIG_ARCH_SUNXI=y
-CONFIG_SPL_NAND_SUPPORT=y
 CONFIG_MACH_SUN5I=y
 CONFIG_DRAM_TIMINGS_DDR3_800E_1066G_1333J=y
 CONFIG_USB0_VBUS_PIN="PB10"
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 4c36b1122c..24c1ebb25c 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -121,6 +121,7 @@ config NAND_SUNXI
 	depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUN8I
 	select SYS_NAND_SELF_INIT
 	select SYS_NAND_U_BOOT_LOCATIONS
+	select SPL_NAND_SUPPORT
 	imply CMD_NAND
 	---help---
 	Enable support for NAND. This option enables the standard and

commit dbb23086db07d120a874e6ad98c1bf31bc78e610
Author: Miquel Raynal <miquel.raynal@bootlin.com>
Date:   Wed Feb 28 20:51:57 2018 +0100

    UPSTREAM: sunxi: allow NAND support to be compiled for sun8i platforms
    
    Add some clocks/PLL definitions as well as the dependency on MACH_SUN8I
    in Kconfig.
    
    Change-Id: I8fb0229aa90d5b837c3f2a735dc1b169dca37b06
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 663e8a9b54ccbc9b939e4e3696a84fdf2f5a43fc)

diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
index d328df9597..d35aa479f7 100644
--- a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
+++ b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
@@ -192,6 +192,7 @@ struct sunxi_ccm_reg {
 #define ATB_DIV_1			0
 #define ATB_DIV_2			1
 #define ATB_DIV_4			2
+#define AHB_DIV_1			0
 #define CPU_CLK_SRC_OSC24M		1
 #define CPU_CLK_SRC_PLL1		2
 
@@ -317,6 +318,11 @@ struct sunxi_ccm_reg {
 #define AHB_GATE_OFFSET_LCD0		3
 #endif
 
+#define CCM_NAND_CTRL_M(x)		((x) - 1)
+#define CCM_NAND_CTRL_N(x)		((x) << 16)
+#define CCM_NAND_CTRL_PLL6		(0x1 << 24)
+#define CCM_NAND_CTRL_ENABLE		(0x1 << 31)
+
 #define CCM_MMC_CTRL_M(x)		((x) - 1)
 #define CCM_MMC_CTRL_OCLK_DLY(x)	((x) << 8)
 #define CCM_MMC_CTRL_N(x)		((x) << 16)
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index f8c37d47b0..4c36b1122c 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -118,7 +118,7 @@ endif
 
 config NAND_SUNXI
 	bool "Support for NAND on Allwinner SoCs"
-	depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
+	depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUN8I
 	select SYS_NAND_SELF_INIT
 	select SYS_NAND_U_BOOT_LOCATIONS
 	imply CMD_NAND

commit 460aa71a13d1cc190ca42bdd781e9e2bd4a79985
Author: Miquel Raynal <miquel.raynal@bootlin.com>
Date:   Wed Feb 28 20:51:55 2018 +0100

    UPSTREAM: spl: nand: sunxi: use PIO instead of DMA
    
    SPL support was first written to support only the earlier generations of
    Allwinner SoCs, and was only really enabled on the A13 / GR8. However,
    those old SoCs had a DMA engine that has been replaced since the A31 by
    another DMA controller that is no longer compatible.
    
    Since the code directly uses that DMA controller, it cannot operate
    properly on the later SoCs, while the NAND controller has not changed.
    
    There's two paths forward, the first one would have been to add support
    for that DMA controller too, the second to just remove the DMA usage
    entirely and rely on PIO.
    
    The later has been chosen because CPU overload at this stage is not an
    issue and it makes the driver more generic, and easier to understand.
    
    Change-Id: I6c237da0e67d520568903d77c84103c98730ccc2
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Acked-by: Boris Brezillon <boris.brezillon@bootlin.com>
    Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 6ddbb1e936c78cdef1e7395039fa7020c5c75326)

diff --git a/drivers/mtd/nand/sunxi_nand_spl.c b/drivers/mtd/nand/sunxi_nand_spl.c
index af1e964eff..7241e9a374 100644
--- a/drivers/mtd/nand/sunxi_nand_spl.c
+++ b/drivers/mtd/nand/sunxi_nand_spl.c
@@ -10,6 +10,7 @@
 #include <common.h>
 #include <config.h>
 #include <nand.h>
+#include <linux/ctype.h>
 
 /* registers */
 #define NFC_CTL                    0x00000000
@@ -67,10 +68,12 @@
 #define NFC_SEND_CMD3              (1 << 28)
 #define NFC_SEND_CMD4              (1 << 29)
 #define NFC_RAW_CMD                (0 << 30)
+#define NFC_ECC_CMD                (1 << 30)
 #define NFC_PAGE_CMD               (2 << 30)
 
 #define NFC_ST_CMD_INT_FLAG        (1 << 1)
 #define NFC_ST_DMA_INT_FLAG        (1 << 2)
+#define NFC_ST_CMD_FIFO_STAT       (1 << 3)
 
 #define NFC_READ_CMD_OFFSET         0
 #define NFC_RANDOM_READ_CMD0_OFFSET 8
@@ -80,22 +83,6 @@
 #define NFC_CMD_RNDOUT             0x05
 #define NFC_CMD_READSTART          0x30
 
-#define SUNXI_DMA_CFG_REG0              0x300
-#define SUNXI_DMA_SRC_START_ADDR_REG0   0x304
-#define SUNXI_DMA_DEST_START_ADDRR_REG0 0x308
-#define SUNXI_DMA_DDMA_BC_REG0          0x30C
-#define SUNXI_DMA_DDMA_PARA_REG0        0x318
-
-#define SUNXI_DMA_DDMA_CFG_REG_LOADING  (1 << 31)
-#define SUNXI_DMA_DDMA_CFG_REG_DMA_DEST_DATA_WIDTH_32 (2 << 25)
-#define SUNXI_DMA_DDMA_CFG_REG_DDMA_DST_DRQ_TYPE_DRAM (1 << 16)
-#define SUNXI_DMA_DDMA_CFG_REG_DMA_SRC_DATA_WIDTH_32 (2 << 9)
-#define SUNXI_DMA_DDMA_CFG_REG_DMA_SRC_ADDR_MODE_IO (1 << 5)
-#define SUNXI_DMA_DDMA_CFG_REG_DDMA_SRC_DRQ_TYPE_NFC (3 << 0)
-
-#define SUNXI_DMA_DDMA_PARA_REG_SRC_WAIT_CYC (0x0F << 0)
-#define SUNXI_DMA_DDMA_PARA_REG_SRC_BLK_SIZE (0x7F << 8)
-
 struct nfc_config {
 	int page_size;
 	int ecc_strength;
@@ -268,86 +255,74 @@ static const int ecc_bytes[] = {32, 46, 54, 60, 74, 88, 102, 110, 116};
 static int nand_read_page(const struct nfc_config *conf, u32 offs,
 			  void *dest, int len)
 {
-	dma_addr_t dst = (dma_addr_t)dest;
 	int nsectors = len / conf->ecc_size;
 	u16 rand_seed = 0;
-	u32 val;
-	int page;
-
-	page = offs / conf->page_size;
+	int oob_chunk_sz = ecc_bytes[conf->ecc_strength];
+	int page = offs / conf->page_size;
+	u32 ecc_st;
+	int i;
 
 	if (offs % conf->page_size || len % conf->ecc_size ||
 	    len > conf->page_size || len < 0)
 		return -EINVAL;
 
-	/* clear ecc status */
-	writel(0, SUNXI_NFC_BASE + NFC_ECC_ST);
-
 	/* Choose correct seed if randomized */
 	if (conf->randomize)
 		rand_seed = random_seed[page % conf->nseeds];
 
-	writel((rand_seed << 16) | (conf->ecc_strength << 12) |
-		(conf->randomize ? NFC_ECC_RANDOM_EN : 0) |
-		(conf->ecc_size == 512 ? NFC_ECC_BLOCK_SIZE : 0) |
-		NFC_ECC_EN | NFC_ECC_PIPELINE | NFC_ECC_EXCEPTION,
-		SUNXI_NFC_BASE + NFC_ECC_CTL);
-
-	flush_dcache_range(dst, ALIGN(dst + conf->ecc_size, ARCH_DMA_MINALIGN));
-
-	/* SUNXI_DMA */
-	writel(0x0, SUNXI_DMA_BASE + SUNXI_DMA_CFG_REG0); /* clr dma cmd */
-	/* read from REG_IO_DATA */
-	writel(SUNXI_NFC_BASE + NFC_IO_DATA,
-	       SUNXI_DMA_BASE + SUNXI_DMA_SRC_START_ADDR_REG0);
-	/* read to RAM */
-	writel(dst, SUNXI_DMA_BASE + SUNXI_DMA_DEST_START_ADDRR_REG0);
-	writel(SUNXI_DMA_DDMA_PARA_REG_SRC_WAIT_CYC |
-	       SUNXI_DMA_DDMA_PARA_REG_SRC_BLK_SIZE,
-	       SUNXI_DMA_BASE + SUNXI_DMA_DDMA_PARA_REG0);
-	writel(len, SUNXI_DMA_BASE + SUNXI_DMA_DDMA_BC_REG0);
-	writel(SUNXI_DMA_DDMA_CFG_REG_LOADING |
-	       SUNXI_DMA_DDMA_CFG_REG_DMA_DEST_DATA_WIDTH_32 |
-	       SUNXI_DMA_DDMA_CFG_REG_DDMA_DST_DRQ_TYPE_DRAM |
-	       SUNXI_DMA_DDMA_CFG_REG_DMA_SRC_DATA_WIDTH_32 |
-	       SUNXI_DMA_DDMA_CFG_REG_DMA_SRC_ADDR_MODE_IO |
-	       SUNXI_DMA_DDMA_CFG_REG_DDMA_SRC_DRQ_TYPE_NFC,
-	       SUNXI_DMA_BASE + SUNXI_DMA_CFG_REG0);
-
-	writel(nsectors, SUNXI_NFC_BASE + NFC_SECTOR_NUM);
-	writel(NFC_ST_DMA_INT_FLAG, SUNXI_NFC_BASE + NFC_ST);
-	writel(NFC_DATA_TRANS |	NFC_PAGE_CMD | NFC_DATA_SWAP_METHOD,
-	       SUNXI_NFC_BASE + NFC_CMD);
-
-	if (!check_value(SUNXI_NFC_BASE + NFC_ST, NFC_ST_DMA_INT_FLAG,
-			 DEFAULT_TIMEOUT_US)) {
-		printf("Error while initializing dma interrupt\n");
-		return -EIO;
-	}
-	writel(NFC_ST_DMA_INT_FLAG, SUNXI_NFC_BASE + NFC_ST);
+	/* Retrieve data from SRAM (PIO) */
+	for (i = 0; i < nsectors; i++) {
+		int data_off = i * conf->ecc_size;
+		int oob_off = conf->page_size + (i * oob_chunk_sz);
+		u8 *data = dest + data_off;
+
+		/* Clear ECC status and restart ECC engine */
+		writel(0, SUNXI_NFC_BASE + NFC_ECC_ST);
+		writel((rand_seed << 16) | (conf->ecc_strength << 12) |
+		       (conf->randomize ? NFC_ECC_RANDOM_EN : 0) |
+		       (conf->ecc_size == 512 ? NFC_ECC_BLOCK_SIZE : 0) |
+		       NFC_ECC_EN | NFC_ECC_EXCEPTION,
+		       SUNXI_NFC_BASE + NFC_ECC_CTL);
+
+		/* Move the data in SRAM */
+		nand_change_column(data_off);
+		writel(conf->ecc_size, SUNXI_NFC_BASE + NFC_CNT);
+		nand_exec_cmd(NFC_DATA_TRANS);
 
-	if (!check_value_negated(SUNXI_DMA_BASE + SUNXI_DMA_CFG_REG0,
-				 SUNXI_DMA_DDMA_CFG_REG_LOADING,
-				 DEFAULT_TIMEOUT_US)) {
-		printf("Error while waiting for dma transfer to finish\n");
-		return -EIO;
-	}
+		/*
+		 * Let the ECC engine consume the ECC bytes and possibly correct
+		 * the data.
+		 */
+		nand_change_column(oob_off);
+		nand_exec_cmd(NFC_DATA_TRANS | NFC_ECC_CMD);
 
-	invalidate_dcache_range(dst,
-				ALIGN(dst + conf->ecc_size, ARCH_DMA_MINALIGN));
+		/* Get the ECC status */
+		ecc_st = readl(SUNXI_NFC_BASE + NFC_ECC_ST);
 
-	val = readl(SUNXI_NFC_BASE + NFC_ECC_ST);
+		/* ECC error detected. */
+		if (ecc_st & 0xffff)
+			return -EIO;
 
-	/* ECC error detected. */
-	if (val & 0xffff)
-		return -EIO;
+		/*
+		 * Return 1 if the first chunk is empty (needed for
+		 * configuration detection).
+		 */
+		if (!i && (ecc_st & 0x10000))
+			return 1;
 
-	/*
-	 * Return 1 if the page is empty.
-	 * We consider the page as empty if the first ECC block is marked
-	 * empty.
-	 */
-	return (val & 0x10000) ? 1 : 0;
+		/* Retrieve the data from SRAM */
+		memcpy_fromio(data, SUNXI_NFC_BASE + NFC_RAM0_BASE,
+			      conf->ecc_size);
+
+		/* Stop the ECC engine */
+		writel(readl(SUNXI_NFC_BASE + NFC_ECC_CTL) & ~NFC_ECC_EN,
+		       SUNXI_NFC_BASE + NFC_ECC_CTL);
+
+		if (data_off + conf->ecc_size >= len)
+			break;
+	}
+
+	return 0;
 }
 
 static int nand_max_ecc_strength(struct nfc_config *conf)

commit 3df1515ab84d20ae3c4b7b3153341df304e034b5
Author: Miquel Raynal <miquel.raynal@bootlin.com>
Date:   Wed Feb 28 20:51:54 2018 +0100

    UPSTREAM: spl: nand: sunxi: declare the ecc_bytes array globally
    
    Move the ecc_bytes array out of nand_max_ecc_strength() for future use
    by nand_read_page().
    
    Change-Id: I0dc537a460183bc3352adfbe2163eab84d3cdbeb
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Acked-by: Boris Brezillon <boris.brezillon@bootlin.com>
    Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 7440bd7885da984dc20e2e8c8a0b167911e9dce1)

diff --git a/drivers/mtd/nand/sunxi_nand_spl.c b/drivers/mtd/nand/sunxi_nand_spl.c
index 9ebdcee351..af1e964eff 100644
--- a/drivers/mtd/nand/sunxi_nand_spl.c
+++ b/drivers/mtd/nand/sunxi_nand_spl.c
@@ -263,6 +263,8 @@ static int nand_change_column(u16 column)
 	return 0;
 }
 
+static const int ecc_bytes[] = {32, 46, 54, 60, 74, 88, 102, 110, 116};
+
 static int nand_read_page(const struct nfc_config *conf, u32 offs,
 			  void *dest, int len)
 {
@@ -350,7 +352,6 @@ static int nand_read_page(const struct nfc_config *conf, u32 offs,
 
 static int nand_max_ecc_strength(struct nfc_config *conf)
 {
-	static const int ecc_bytes[] = { 32, 46, 54, 60, 74, 88, 102, 110, 116 };
 	int max_oobsize, max_ecc_bytes;
 	int nsectors = conf->page_size / conf->ecc_size;
 	int i;

commit b32fcfc3aa88dd4f343851878916406c61525398
Author: Miquel Raynal <miquel.raynal@bootlin.com>
Date:   Wed Feb 28 20:51:52 2018 +0100

    UPSTREAM: spl: nand: sunxi: make the reset column helper more generic
    
    Prepare the future use of an helper to move the data pointer (the
    column) of the NAND chip by renaming nand_reset_column() to
    nand_change_column(). Resetting the column is just a matter of giving 0
    as argument.
    
    Change-Id: Ie311136768de7f7d6e92eb56afe1af9b39d4d93d
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Acked-by: Boris Brezillon <boris.brezillon@bootlin.com>
    Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 22f0aa0528a48cb9eb72abb065071e47c4215af9)

diff --git a/drivers/mtd/nand/sunxi_nand_spl.c b/drivers/mtd/nand/sunxi_nand_spl.c
index d63aa978d4..9ebdcee351 100644
--- a/drivers/mtd/nand/sunxi_nand_spl.c
+++ b/drivers/mtd/nand/sunxi_nand_spl.c
@@ -241,7 +241,7 @@ static int nand_load_page(const struct nfc_config *conf, u32 offs)
 			     ((conf->addr_cycles - 1) << NFC_ADDR_NUM_OFFSET));
 }
 
-static int nand_reset_column(void)
+static int nand_change_column(u16 column)
 {
 	int ret;
 
@@ -249,7 +249,7 @@ static int nand_reset_column(void)
 	       (NFC_CMD_RNDOUT << NFC_RANDOM_READ_CMD0_OFFSET) |
 	       (NFC_CMD_RNDOUTSTART << NFC_READ_CMD_OFFSET),
 	       SUNXI_NFC_BASE + NFC_RCMD_SET);
-	writel(0, SUNXI_NFC_BASE + NFC_ADDR_LOW);
+	writel(column, SUNXI_NFC_BASE + NFC_ADDR_LOW);
 
 	ret = nand_exec_cmd(NFC_SEND_CMD1 | NFC_SEND_CMD2 | NFC_RAW_CMD |
 			    (1 << NFC_ADDR_NUM_OFFSET) | NFC_SEND_ADDR |
@@ -416,7 +416,7 @@ static int nand_detect_ecc_config(struct nfc_config *conf, u32 offs,
 		     conf->ecc_strength >= 0;
 		     conf->ecc_strength--) {
 			conf->randomize = false;
-			if (nand_reset_column())
+			if (nand_change_column(0))
 				return -EIO;
 
 			/*
@@ -436,7 +436,7 @@ static int nand_detect_ecc_config(struct nfc_config *conf, u32 offs,
 			conf->randomize = true;
 			conf->nseeds = ARRAY_SIZE(random_seed);
 			do {
-				if (nand_reset_column())
+				if (nand_change_column(0))
 					return -EIO;
 
 				if (!nand_read_page(conf, offs, dest,
@@ -528,7 +528,7 @@ static int nand_read_buffer(struct nfc_config *conf, uint32_t offs,
 			/* Try to adjust ->nseeds and read the page again... */
 			conf->nseeds = cur_seed;
 
-			if (nand_reset_column())
+			if (nand_change_column(0))
 				return -EIO;
 
 			/* ... it still fails => it's a real corruption. */

commit 989f52df7bd76d77899b6e41f294831d7b6ffda9
Author: Miquel Raynal <miquel.raynal@bootlin.com>
Date:   Wed Feb 28 20:51:51 2018 +0100

    UPSTREAM: spl: nand: sunxi: ensure enough time has passed after changing the column
    
    When changing the column, the ONFI specification states that a minimum
    time of tCCS (Change Column Setup time) must elapse between the last
    address cycle is asserted on the bus and the first data cycle is
    clocked. An usual value for average NANDs is 500 nanoseconds. Round it
    up to 1 microsecond to be safe.
    
    Change-Id: If9f02bf0861da520e9c7e6288e41986cbb8fbe0e
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Acked-by: Boris Brezillon <boris.brezillon@bootlin.com>
    Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 4dac80a5e991dd3b5b99910d7927edfdf4c99bb3)

diff --git a/drivers/mtd/nand/sunxi_nand_spl.c b/drivers/mtd/nand/sunxi_nand_spl.c
index 25a0941fd2..d63aa978d4 100644
--- a/drivers/mtd/nand/sunxi_nand_spl.c
+++ b/drivers/mtd/nand/sunxi_nand_spl.c
@@ -243,15 +243,24 @@ static int nand_load_page(const struct nfc_config *conf, u32 offs)
 
 static int nand_reset_column(void)
 {
+	int ret;
+
 	writel((NFC_CMD_RNDOUTSTART << NFC_RANDOM_READ_CMD1_OFFSET) |
 	       (NFC_CMD_RNDOUT << NFC_RANDOM_READ_CMD0_OFFSET) |
 	       (NFC_CMD_RNDOUTSTART << NFC_READ_CMD_OFFSET),
 	       SUNXI_NFC_BASE + NFC_RCMD_SET);
 	writel(0, SUNXI_NFC_BASE + NFC_ADDR_LOW);
 
-	return nand_exec_cmd(NFC_SEND_CMD1 | NFC_SEND_CMD2 | NFC_RAW_CMD |
-			     (1 << NFC_ADDR_NUM_OFFSET) | NFC_SEND_ADDR |
-			     NFC_CMD_RNDOUT);
+	ret = nand_exec_cmd(NFC_SEND_CMD1 | NFC_SEND_CMD2 | NFC_RAW_CMD |
+			    (1 << NFC_ADDR_NUM_OFFSET) | NFC_SEND_ADDR |
+			    NFC_CMD_RNDOUT);
+	if (ret)
+		return ret;
+
+	/* Ensure tCCS has passed before reading data */
+	udelay(1);
+
+	return 0;
 }
 
 static int nand_read_page(const struct nfc_config *conf, u32 offs,

commit 0cb95e30886edef9d2c841e83c709476e321d486
Author: Miquel Raynal <miquel.raynal@bootlin.com>
Date:   Wed Feb 28 20:51:50 2018 +0100

    UPSTREAM: spl: nand: sunxi: create an helper to handle command execution
    
    Executing a command is matter of always doing the following sequence:
      * Waiting for the FIFO to be empty so we can fill it with the new
        command.
      * Clearing the status register.
      * Writing the command in the FIFO.
      * Waiting for the command to finish.
    
    Add a nand_exec_cmd() helper to handle this instead of repeating the
    logic through the various functions.
    
    Change-Id: If33cb5d361838472d12580c97a5ddaed80f08945
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Acked-by: Boris Brezillon <boris.brezillon@bootlin.com>
    Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit a084cb6664e0de40f33da1c8ec6de816a9852f6d)

diff --git a/drivers/mtd/nand/sunxi_nand_spl.c b/drivers/mtd/nand/sunxi_nand_spl.c
index 913de7d442..25a0941fd2 100644
--- a/drivers/mtd/nand/sunxi_nand_spl.c
+++ b/drivers/mtd/nand/sunxi_nand_spl.c
@@ -177,6 +177,20 @@ static int nand_wait_int(void)
 	return 0;
 }
 
+static int nand_exec_cmd(u32 cmd)
+{
+	int ret;
+
+	ret = nand_wait_cmd_fifo_empty();
+	if (ret)
+		return ret;
+
+	writel(NFC_ST_CMD_INT_FLAG, SUNXI_NFC_BASE + NFC_ST);
+	writel(cmd, SUNXI_NFC_BASE + NFC_CMD);
+
+	return nand_wait_int();
+}
+
 void nand_init(void)
 {
 	uint32_t val;
@@ -194,13 +208,7 @@ void nand_init(void)
 	}
 
 	/* reset NAND */
-	nand_wait_cmd_fifo_empty();
-
-	writel(NFC_ST_CMD_INT_FLAG, SUNXI_NFC_BASE + NFC_ST);
-	writel(NFC_SEND_CMD1 | NFC_WAIT_FLAG | NAND_CMD_RESET,
-	       SUNXI_NFC_BASE + NFC_CMD);
-
-	nand_wait_int();
+	nand_exec_cmd(NFC_SEND_CMD1 | NFC_WAIT_FLAG | NAND_CMD_RESET);
 }
 
 static void nand_apply_config(const struct nfc_config *conf)
@@ -221,37 +229,29 @@ static int nand_load_page(const struct nfc_config *conf, u32 offs)
 {
 	int page = offs / conf->page_size;
 
-	nand_wait_cmd_fifo_empty();
-
 	writel((NFC_CMD_RNDOUTSTART << NFC_RANDOM_READ_CMD1_OFFSET) |
 	       (NFC_CMD_RNDOUT << NFC_RANDOM_READ_CMD0_OFFSET) |
 	       (NFC_CMD_READSTART << NFC_READ_CMD_OFFSET),
 	       SUNXI_NFC_BASE + NFC_RCMD_SET);
 	writel(((page & 0xFFFF) << 16), SUNXI_NFC_BASE + NFC_ADDR_LOW);
 	writel((page >> 16) & 0xFF, SUNXI_NFC_BASE + NFC_ADDR_HIGH);
-	writel(NFC_ST_CMD_INT_FLAG, SUNXI_NFC_BASE + NFC_ST);
-	writel(NFC_SEND_CMD1 | NFC_SEND_CMD2 | NFC_RAW_CMD | NFC_WAIT_FLAG |
-	       ((conf->addr_cycles - 1) << NFC_ADDR_NUM_OFFSET) | NFC_SEND_ADDR,
-	       SUNXI_NFC_BASE + NFC_CMD);
 
-	return nand_wait_int();
+	return nand_exec_cmd(NFC_SEND_CMD1 | NFC_SEND_CMD2 | NFC_RAW_CMD |
+			     NFC_SEND_ADDR | NFC_WAIT_FLAG |
+			     ((conf->addr_cycles - 1) << NFC_ADDR_NUM_OFFSET));
 }
 
 static int nand_reset_column(void)
 {
-	nand_wait_cmd_fifo_empty();
-
 	writel((NFC_CMD_RNDOUTSTART << NFC_RANDOM_READ_CMD1_OFFSET) |
 	       (NFC_CMD_RNDOUT << NFC_RANDOM_READ_CMD0_OFFSET) |
 	       (NFC_CMD_RNDOUTSTART << NFC_READ_CMD_OFFSET),
 	       SUNXI_NFC_BASE + NFC_RCMD_SET);
-	writel(NFC_ST_CMD_INT_FLAG, SUNXI_NFC_BASE + NFC_ST);
 	writel(0, SUNXI_NFC_BASE + NFC_ADDR_LOW);
-	writel(NFC_SEND_CMD1 | NFC_SEND_CMD2 | NFC_RAW_CMD |
-	       (1 << NFC_ADDR_NUM_OFFSET) | NFC_SEND_ADDR | NFC_CMD_RNDOUT,
-	       SUNXI_NFC_BASE + NFC_CMD);
 
-	return nand_wait_int();
+	return nand_exec_cmd(NFC_SEND_CMD1 | NFC_SEND_CMD2 | NFC_RAW_CMD |
+			     (1 << NFC_ADDR_NUM_OFFSET) | NFC_SEND_ADDR |
+			     NFC_CMD_RNDOUT);
 }
 
 static int nand_read_page(const struct nfc_config *conf, u32 offs,

commit e62d3eddf861d093c667b75bdce49622b5840c6f
Author: Miquel Raynal <miquel.raynal@bootlin.com>
Date:   Wed Feb 28 20:51:49 2018 +0100

    UPSTREAM: spl: nand: sunxi: add missing status clear
    
    It is best practice to always clear the status register before executing
    a command to be sure that the status read afterwards is relevant.
    
    Change-Id: I70a36f514d8f820521541ed0b7473dc31f9c5824
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Acked-by: Boris Brezillon <boris.brezillon@bootlin.com>
    Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 781e70cff12916ae6698cc77a22e0ce687f39e3b)

diff --git a/drivers/mtd/nand/sunxi_nand_spl.c b/drivers/mtd/nand/sunxi_nand_spl.c
index cd823cd70b..913de7d442 100644
--- a/drivers/mtd/nand/sunxi_nand_spl.c
+++ b/drivers/mtd/nand/sunxi_nand_spl.c
@@ -245,6 +245,7 @@ static int nand_reset_column(void)
 	       (NFC_CMD_RNDOUT << NFC_RANDOM_READ_CMD0_OFFSET) |
 	       (NFC_CMD_RNDOUTSTART << NFC_READ_CMD_OFFSET),
 	       SUNXI_NFC_BASE + NFC_RCMD_SET);
+	writel(NFC_ST_CMD_INT_FLAG, SUNXI_NFC_BASE + NFC_ST);
 	writel(0, SUNXI_NFC_BASE + NFC_ADDR_LOW);
 	writel(NFC_SEND_CMD1 | NFC_SEND_CMD2 | NFC_RAW_CMD |
 	       (1 << NFC_ADDR_NUM_OFFSET) | NFC_SEND_ADDR | NFC_CMD_RNDOUT,

commit 621d22540fa9bc5bfc6c22aa535d12d3986ae858
Author: Miquel Raynal <miquel.raynal@bootlin.com>
Date:   Wed Feb 28 20:51:48 2018 +0100

    UPSTREAM: spl: nand: sunxi: introduce the nand_wait_cmd_fifo_empty() helper
    
    One bit in the control registers indicates if the NAND controller is
    ready to receive a new command. Otherwise, the command FIFO is full and
    we should wait for this bit to flip. It then states that the last
    command has been processed and the FIFO is now free to welcome another
    command.
    
    Add this sanity check before starting any new command.
    
    Change-Id: I55a93fc0b3f889c40cf0e4fbb40eeeb3e46df17b
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Acked-by: Boris Brezillon <boris.brezillon@bootlin.com>
    Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 60fb17913354757d015ade2b5457675a0506903a)

diff --git a/drivers/mtd/nand/sunxi_nand_spl.c b/drivers/mtd/nand/sunxi_nand_spl.c
index c2f4f2cbf7..cd823cd70b 100644
--- a/drivers/mtd/nand/sunxi_nand_spl.c
+++ b/drivers/mtd/nand/sunxi_nand_spl.c
@@ -155,6 +155,17 @@ static inline int check_value_negated(int offset, int unexpected_bits,
 	return check_value_inner(offset, unexpected_bits, timeout_us, 1);
 }
 
+static int nand_wait_cmd_fifo_empty(void)
+{
+	if (!check_value_negated(SUNXI_NFC_BASE + NFC_ST, NFC_ST_CMD_FIFO_STAT,
+				 DEFAULT_TIMEOUT_US)) {
+		printf("nand: timeout waiting for empty cmd FIFO\n");
+		return -ETIMEDOUT;
+	}
+
+	return 0;
+}
+
 static int nand_wait_int(void)
 {
 	if (!check_value(SUNXI_NFC_BASE + NFC_ST, NFC_ST_CMD_INT_FLAG,
@@ -183,6 +194,8 @@ void nand_init(void)
 	}
 
 	/* reset NAND */
+	nand_wait_cmd_fifo_empty();
+
 	writel(NFC_ST_CMD_INT_FLAG, SUNXI_NFC_BASE + NFC_ST);
 	writel(NFC_SEND_CMD1 | NFC_WAIT_FLAG | NAND_CMD_RESET,
 	       SUNXI_NFC_BASE + NFC_CMD);
@@ -194,6 +207,8 @@ static void nand_apply_config(const struct nfc_config *conf)
 {
 	u32 val;
 
+	nand_wait_cmd_fifo_empty();
+
 	val = readl(SUNXI_NFC_BASE + NFC_CTL);
 	val &= ~NFC_CTL_PAGE_SIZE_MASK;
 	writel(val | NFC_CTL_RAM_METHOD | NFC_CTL_PAGE_SIZE(conf->page_size),
@@ -206,6 +221,8 @@ static int nand_load_page(const struct nfc_config *conf, u32 offs)
 {
 	int page = offs / conf->page_size;
 
+	nand_wait_cmd_fifo_empty();
+
 	writel((NFC_CMD_RNDOUTSTART << NFC_RANDOM_READ_CMD1_OFFSET) |
 	       (NFC_CMD_RNDOUT << NFC_RANDOM_READ_CMD0_OFFSET) |
 	       (NFC_CMD_READSTART << NFC_READ_CMD_OFFSET),
@@ -222,6 +239,8 @@ static int nand_load_page(const struct nfc_config *conf, u32 offs)
 
 static int nand_reset_column(void)
 {
+	nand_wait_cmd_fifo_empty();
+
 	writel((NFC_CMD_RNDOUTSTART << NFC_RANDOM_READ_CMD1_OFFSET) |
 	       (NFC_CMD_RNDOUT << NFC_RANDOM_READ_CMD0_OFFSET) |
 	       (NFC_CMD_RNDOUTSTART << NFC_READ_CMD_OFFSET),

commit d52265b77c99675c8948580cf69276b85a1a3135
Author: Miquel Raynal <miquel.raynal@bootlin.com>
Date:   Wed Feb 28 20:51:47 2018 +0100

    UPSTREAM: spl: nand: sunxi: introduce the nand_wait_int() helper
    
    The pattern of polling on a status register until a bit is set or a
    timeout occurs is repeated multiple times in the driver. Mutualize the
    code by introducing the nand_wait_int() helper that does wait for the
    bit to flip or returns an error in case of timeout.
    
    Change-Id: Id41d445462a0fab357d9582d0560b77a07e5ac1c
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Acked-by: Boris Brezillon <boris.brezillon@bootlin.com>
    Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 28f7a9d375c8bc7a30563b8d995b9baa355c7e41)

diff --git a/drivers/mtd/nand/sunxi_nand_spl.c b/drivers/mtd/nand/sunxi_nand_spl.c
index 608cc997ca..c2f4f2cbf7 100644
--- a/drivers/mtd/nand/sunxi_nand_spl.c
+++ b/drivers/mtd/nand/sunxi_nand_spl.c
@@ -155,6 +155,17 @@ static inline int check_value_negated(int offset, int unexpected_bits,
 	return check_value_inner(offset, unexpected_bits, timeout_us, 1);
 }
 
+static int nand_wait_int(void)
+{
+	if (!check_value(SUNXI_NFC_BASE + NFC_ST, NFC_ST_CMD_INT_FLAG,
+			 DEFAULT_TIMEOUT_US)) {
+		printf("nand: timeout waiting for interruption\n");
+		return -ETIMEDOUT;
+	}
+
+	return 0;
+}
+
 void nand_init(void)
 {
 	uint32_t val;
@@ -176,12 +187,7 @@ void nand_init(void)
 	writel(NFC_SEND_CMD1 | NFC_WAIT_FLAG | NAND_CMD_RESET,
 	       SUNXI_NFC_BASE + NFC_CMD);
 
-	if (!check_value(SUNXI_NFC_BASE + NFC_ST, NFC_ST_CMD_INT_FLAG,
-			 DEFAULT_TIMEOUT_US)) {
-		printf("Error timeout waiting for nand reset\n");
-		return;
-	}
-	writel(NFC_ST_CMD_INT_FLAG, SUNXI_NFC_BASE + NFC_ST);
+	nand_wait_int();
 }
 
 static void nand_apply_config(const struct nfc_config *conf)
@@ -211,13 +217,7 @@ static int nand_load_page(const struct nfc_config *conf, u32 offs)
 	       ((conf->addr_cycles - 1) << NFC_ADDR_NUM_OFFSET) | NFC_SEND_ADDR,
 	       SUNXI_NFC_BASE + NFC_CMD);
 
-	if (!check_value(SUNXI_NFC_BASE + NFC_ST, NFC_ST_CMD_INT_FLAG,
-			 DEFAULT_TIMEOUT_US)) {
-		printf("Error while initializing dma interrupt\n");
-		return -EIO;
-	}
-
-	return 0;
+	return nand_wait_int();
 }
 
 static int nand_reset_column(void)
@@ -231,13 +231,7 @@ static int nand_reset_column(void)
 	       (1 << NFC_ADDR_NUM_OFFSET) | NFC_SEND_ADDR | NFC_CMD_RNDOUT,
 	       SUNXI_NFC_BASE + NFC_CMD);
 
-	if (!check_value(SUNXI_NFC_BASE + NFC_ST, NFC_ST_CMD_INT_FLAG,
-			 DEFAULT_TIMEOUT_US)) {
-		printf("Error while initializing dma interrupt\n");
-		return -1;
-	}
-
-	return 0;
+	return nand_wait_int();
 }
 
 static int nand_read_page(const struct nfc_config *conf, u32 offs,

commit 49509060fecf461740fddb1c0f6b384fa833b9e3
Author: Miquel Raynal <miquel.raynal@bootlin.com>
Date:   Wed Feb 28 20:51:46 2018 +0100

    UPSTREAM: spl: nand: sunxi: fix typo on register name
    
    Change NFC_SEND_ADR to NFC_SEND_ADDR.
    
    Change-Id: I7042369a3de14534a0fb3f25ebed9d5b3234e774
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Acked-by: Boris Brezillon <boris.brezillon@bootlin.com>
    Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 802f766994ded5afc9d89e93556011063a430e0d)

diff --git a/drivers/mtd/nand/sunxi_nand_spl.c b/drivers/mtd/nand/sunxi_nand_spl.c
index 06695fc15f..608cc997ca 100644
--- a/drivers/mtd/nand/sunxi_nand_spl.c
+++ b/drivers/mtd/nand/sunxi_nand_spl.c
@@ -55,7 +55,7 @@
 
 
 #define NFC_ADDR_NUM_OFFSET        16
-#define NFC_SEND_ADR               (1 << 19)
+#define NFC_SEND_ADDR              (1 << 19)
 #define NFC_ACCESS_DIR             (1 << 20)
 #define NFC_DATA_TRANS             (1 << 21)
 #define NFC_SEND_CMD1              (1 << 22)
@@ -208,7 +208,7 @@ static int nand_load_page(const struct nfc_config *conf, u32 offs)
 	writel((page >> 16) & 0xFF, SUNXI_NFC_BASE + NFC_ADDR_HIGH);
 	writel(NFC_ST_CMD_INT_FLAG, SUNXI_NFC_BASE + NFC_ST);
 	writel(NFC_SEND_CMD1 | NFC_SEND_CMD2 | NFC_RAW_CMD | NFC_WAIT_FLAG |
-	       ((conf->addr_cycles - 1) << NFC_ADDR_NUM_OFFSET) | NFC_SEND_ADR,
+	       ((conf->addr_cycles - 1) << NFC_ADDR_NUM_OFFSET) | NFC_SEND_ADDR,
 	       SUNXI_NFC_BASE + NFC_CMD);
 
 	if (!check_value(SUNXI_NFC_BASE + NFC_ST, NFC_ST_CMD_INT_FLAG,
@@ -228,7 +228,7 @@ static int nand_reset_column(void)
 	       SUNXI_NFC_BASE + NFC_RCMD_SET);
 	writel(0, SUNXI_NFC_BASE + NFC_ADDR_LOW);
 	writel(NFC_SEND_CMD1 | NFC_SEND_CMD2 | NFC_RAW_CMD |
-	       (1 << NFC_ADDR_NUM_OFFSET) | NFC_SEND_ADR | NFC_CMD_RNDOUT,
+	       (1 << NFC_ADDR_NUM_OFFSET) | NFC_SEND_ADDR | NFC_CMD_RNDOUT,
 	       SUNXI_NFC_BASE + NFC_CMD);
 
 	if (!check_value(SUNXI_NFC_BASE + NFC_ST, NFC_ST_CMD_INT_FLAG,

commit cd3063914c2b9b8ca9307d65995cc3fa7d310a60
Author: Miquel Raynal <miquel.raynal@bootlin.com>
Date:   Wed Feb 28 20:51:45 2018 +0100

    UPSTREAM: spl: nand: sunxi: fix second case of modulo by zero error
    
    In the nand_read_buffer() step, the seed is calculated by doing a modulo
    by conf->nseeds which is always zero when not using the randomizer (most
    of SLC NANDs).
    
    This situation turns out to lead to a run time freeze with certain
    toolchains.
    
    Derive this seed only when the randomizer is enabled (and conf->nseeds
    logically not zero), exactly like what has been done before with an
    identical situation, see commit ea3f750c73e3 ("nand: sunxi: Fix modulo
    by zero error").
    
    Change-Id: Ie3fdf32e1636b16a60b92ed90e965007ef29369c
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Acked-by: Boris Brezillon <boris.brezillon@bootlin.com>
    Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit a0a984e14a41bf07f6b3f563a2a8bd22c03aea3a)

diff --git a/drivers/mtd/nand/sunxi_nand_spl.c b/drivers/mtd/nand/sunxi_nand_spl.c
index eed4472bdc..06695fc15f 100644
--- a/drivers/mtd/nand/sunxi_nand_spl.c
+++ b/drivers/mtd/nand/sunxi_nand_spl.c
@@ -475,11 +475,12 @@ static int nand_detect_config(struct nfc_config *conf, u32 offs, void *dest)
 static int nand_read_buffer(struct nfc_config *conf, uint32_t offs,
 			    unsigned int size, void *dest)
 {
-	int first_seed, page, ret;
+	int first_seed = 0, page, ret;
 
 	size = ALIGN(size, conf->page_size);
 	page = offs / conf->page_size;
-	first_seed = page % conf->nseeds;
+	if (conf->randomize)
+		first_seed = page % conf->nseeds;
 
 	for (; size; size -= conf->page_size) {
 		if (nand_load_page(conf, offs))

commit 9612de70ab812f016c2089eb7f746fdbf2e707a1
Author: Miquel Raynal <miquel.raynal@bootlin.com>
Date:   Wed Feb 28 20:51:44 2018 +0100

    UPSTREAM: mtd: nand: sunxi: fix ECC strength choice
    
    When the requested ECC strength does not exactly match the strengths
    supported by the ECC engine, the driver is selecting the closest
    strength meeting the 'selected_strength > requested_strength'
    constraint. Fix the fact that, in this particular case, ecc->strength
    value was not updated to match the 'selected_strength'.
    
    For instance, one can encounter this issue when no ECC requirement is
    filled in the device tree while the NAND chip minimum requirement is not
    a strength/step_size combo natively supported by the ECC engine.
    
    Suggested-by: Boris Brezillon <boris.brezillon@bootlin.com>
    Change-Id: I1a0f337fc5241ad6d994219979ac4c5588ab1784
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
    Acked-by: Boris Brezillon <boris.brezillon@bootlin.com>
    Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit f3aff376892a5af55a090d29e53e10391f886d80)

diff --git a/drivers/mtd/nand/sunxi_nand.c b/drivers/mtd/nand/sunxi_nand.c
index 532e03cd84..37160aaec2 100644
--- a/drivers/mtd/nand/sunxi_nand.c
+++ b/drivers/mtd/nand/sunxi_nand.c
@@ -1407,8 +1407,14 @@ static int sunxi_nand_hw_common_ecc_ctrl_init(struct mtd_info *mtd,
 
 	/* Add ECC info retrieval from DT */
 	for (i = 0; i < ARRAY_SIZE(strengths); i++) {
-		if (ecc->strength <= strengths[i])
+		if (ecc->strength <= strengths[i]) {
+			/*
+			 * Update ecc->strength value with the actual strength
+			 * that will be used by the ECC engine.
+			 */
+			ecc->strength = strengths[i];
 			break;
+		}
 	}
 
 	if (i >= ARRAY_SIZE(strengths)) {

commit 0d5390ceb239b6812110b37fc3135ecdb1218972
Author: Petr Vorel <petr.vorel@gmail.com>
Date:   Sat Mar 24 01:49:24 2018 +0100

    UPSTREAM: Convert CONFIG_UBI_SILENCE_MSG to Kconfig
    
    Change-Id: I0ba60a6d86cd7f4777f91027fc9da3f4db855114
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit c0ce4ceaba03fa6ddf738628344025c44fc78dd4)

diff --git a/README b/README
index fbb76cc307..8ff12ba0c5 100644
--- a/README
+++ b/README
@@ -2658,12 +2658,6 @@ FIT uImage format:
 		kernel. Needed for UBI support.
 
 - UBI support
-		CONFIG_UBI_SILENCE_MSG
-
-		Make the verbose messages from UBI stop printing.  This leaves
-		warnings and errors enabled.
-
-
 		CONFIG_MTD_UBI_WL_THRESHOLD
 		This parameter defines the maximum difference between the highest
 		erase counter value and the lowest erase counter value of eraseblocks
diff --git a/configs/am335x_igep003x_defconfig b/configs/am335x_igep003x_defconfig
index 1b03c334b4..39ebcec910 100644
--- a/configs/am335x_igep003x_defconfig
+++ b/configs/am335x_igep003x_defconfig
@@ -47,6 +47,7 @@ CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_CMD_UBI=y
+CONFIG_UBI_SILENCE_MSG=y
 # CONFIG_CMD_UBIFS is not set
 CONFIG_ISO_PARTITION=y
 CONFIG_EFI_PARTITION=y
diff --git a/configs/igep0032_defconfig b/configs/igep0032_defconfig
index 757f3c39ab..5f067be1a2 100644
--- a/configs/igep0032_defconfig
+++ b/configs/igep0032_defconfig
@@ -27,6 +27,7 @@ CONFIG_CMD_SPI=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_UBI=y
+CONFIG_UBI_SILENCE_MSG=y
 # CONFIG_CMD_UBIFS is not set
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_MMC_OMAP_HS=y
diff --git a/configs/igep00x0_defconfig b/configs/igep00x0_defconfig
index 1ef1c6920a..146568430b 100644
--- a/configs/igep00x0_defconfig
+++ b/configs/igep00x0_defconfig
@@ -27,6 +27,7 @@ CONFIG_CMD_SPI=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_UBI=y
+CONFIG_UBI_SILENCE_MSG=y
 # CONFIG_CMD_UBIFS is not set
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_MMC_OMAP_HS=y
diff --git a/drivers/mtd/ubi/Kconfig b/drivers/mtd/ubi/Kconfig
index caa5197df5..cf84783356 100644
--- a/drivers/mtd/ubi/Kconfig
+++ b/drivers/mtd/ubi/Kconfig
@@ -1,5 +1,12 @@
 menu "UBI support"
 
+config CONFIG_UBI_SILENCE_MSG
+	bool "UBI silence verbose messages"
+	default ENV_IS_IN_UBI
+	help
+	  Make the verbose messages from UBI stop printing. This leaves
+	  warnings and errors enabled.
+
 config MTD_UBI
 	bool "Enable UBI - Unsorted block images"
 	select CRC32
diff --git a/include/configs/am335x_igep003x.h b/include/configs/am335x_igep003x.h
index 2400eee390..e7d0ec9471 100644
--- a/include/configs/am335x_igep003x.h
+++ b/include/configs/am335x_igep003x.h
@@ -22,10 +22,6 @@
 
 #define CONFIG_ENV_SIZE			(96 << 10)	/*  96 KiB */
 
-/* Make the verbose messages from UBI stop printing */
-#define CONFIG_UBI_SILENCE_MSG
-#define CONFIG_UBIFS_SILENCE_MSG
-
 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
 
 #ifndef CONFIG_SPL_BUILD
diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h
index 123de88711..14f237b013 100644
--- a/include/configs/omap3_igep00x0.h
+++ b/include/configs/omap3_igep00x0.h
@@ -154,8 +154,6 @@
 #define CONFIG_ENV_UBI_PART		"UBI"
 #define CONFIG_ENV_UBI_VOLUME		"config"
 #define CONFIG_ENV_UBI_VOLUME_REDUND	"config_r"
-#define CONFIG_UBI_SILENCE_MSG		1
-#define CONFIG_UBIFS_SILENCE_MSG	1
 #define CONFIG_ENV_SIZE			(32*1024)
 
 #endif /* __IGEP00X0_H */
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 04be432c44..afe7edf8e2 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -4908,7 +4908,6 @@ CONFIG_UBIBLOCK
 CONFIG_UBIFS_SILENCE_MSG
 CONFIG_UBIFS_VOLUME
 CONFIG_UBI_PART
-CONFIG_UBI_SILENCE_MSG
 CONFIG_UBI_SIZE
 CONFIG_UBOOT1_ENV_ADDR
 CONFIG_UBOOT2_ENV_ADDR

commit bc9b85f9ed3d12a842a0eb8467368dc4415a360d
Author: Vipul Kumar <vipul.kumar@xilinx.com>
Date:   Mon Mar 5 15:24:59 2018 +0530

    UPSTREAM: arm64: zynqmp: nand: Fixed NAND erase issue for size 1GiB or more
    
    NAND erase was not happening for size 1GiB or more. Erase
    command was executing successfully but in actual, it was not
    erasing.
    This patch fixed erase issue for 1 GiB or more size nand.
    
    Change-Id: Iee50e5a07ab1d4f65fa0c826c248864449b50ef7
    Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
    Signed-off-by: Michal Simek <michal.simek@xilinx.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 2453c695185f8fd8257f370b746acdfe5ee56408)

diff --git a/drivers/mtd/nand/arasan_nfc.c b/drivers/mtd/nand/arasan_nfc.c
index 3c9a0215c5..9c82c7db33 100644
--- a/drivers/mtd/nand/arasan_nfc.c
+++ b/drivers/mtd/nand/arasan_nfc.c
@@ -86,7 +86,7 @@ struct arasan_nand_command_format {
 #define ARASAN_NAND_CMD_ADDR_CYCL_MASK		0x70000000
 #define ARASAN_NAND_CMD_ADDR_CYCL_SHIFT		28
 
-#define ARASAN_NAND_MEM_ADDR1_PAGE_MASK		0xFFFF0000
+#define ARASAN_NAND_MEM_ADDR1_PAGE_MASK		0xFFFF
 #define ARASAN_NAND_MEM_ADDR1_COL_MASK		0xFFFF
 #define ARASAN_NAND_MEM_ADDR1_PAGE_SHIFT	16
 #define ARASAN_NAND_MEM_ADDR2_PAGE_MASK		0xFF
@@ -795,10 +795,11 @@ static int arasan_nand_erase(struct arasan_nand_command_format *curr_cmd,
 
 	writel(reg_val, &arasan_nand_base->cmd_reg);
 
-	page = (page_addr << ARASAN_NAND_MEM_ADDR1_PAGE_SHIFT) &
+	page = (page_addr >> ARASAN_NAND_MEM_ADDR1_PAGE_SHIFT) &
 		ARASAN_NAND_MEM_ADDR1_PAGE_MASK;
 	column = page_addr & ARASAN_NAND_MEM_ADDR1_COL_MASK;
-	writel(page | column, &arasan_nand_base->memadr_reg1);
+	writel(column | (page << ARASAN_NAND_MEM_ADDR1_PAGE_SHIFT),
+	       &arasan_nand_base->memadr_reg1);
 
 	reg_val = readl(&arasan_nand_base->memadr_reg2);
 	reg_val &= ~ARASAN_NAND_MEM_ADDR2_PAGE_MASK;

commit bf3fe9286161ae173ff4de0fa321ce951106fe1c
Author: Liam Beguin <liambeguin@gmail.com>
Date:   Wed Mar 14 19:15:10 2018 -0400

    UPSTREAM: spi: spi_flash: do not fail silently on bad user input
    
    Make sure the user is notified instead of silently returning an error.
    
    Change-Id: I727948d67e404a09a2b444296a3cd8189a3662ed
    Signed-off-by: Liam Beguin <liambeguin@gmail.com>
    Reviewed-by: Stephen Warren <swarren@nvidia.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit aa1ced7f09798700f3d96f39f6f5dc7d3d34cf66)

diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 152316b9e3..10f2e08ce3 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -320,7 +320,7 @@ int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len)
 
 	erase_size = flash->erase_size;
 	if (offset % erase_size || len % erase_size) {
-		debug("SF: Erase offset/length not multiple of erase size\n");
+		printf("SF: Erase offset/length not multiple of erase size\n");
 		return -1;
 	}
 

commit 32fcc5959637c588b8313de6387438c758a94529
Author: Stefan Roese <sr@denx.de>
Date:   Tue Mar 13 08:41:08 2018 +0100

    UPSTREAM: nand: Remove unused ppc4xx NAND driver and references
    
    ppc4xx support was removed some time ago. Lets remove the now unused
    NAND driver and all its references for this platform as well.
    
    Signed-off-by: Stefan Roese <sr@denx.de>
    Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Cc: Scott Wood <oss@buserror.net>
    Change-Id: I18d36aa6b1529d608acb7d39f886c3b45a791c22
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit ec9c80d643a3e5ff35c5d24d675cb1feaa440c9d)

diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index ffc6f42fb7..b24cd007ce 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -60,7 +60,6 @@ obj-$(CONFIG_NAND_LPC32XX_SLC) += lpc32xx_nand_slc.o
 obj-$(CONFIG_NAND_VF610_NFC) += vf610_nfc.o
 obj-$(CONFIG_NAND_MXC) += mxc_nand.o
 obj-$(CONFIG_NAND_MXS) += mxs_nand.o
-obj-$(CONFIG_NAND_NDFC) += ndfc.o
 obj-$(CONFIG_NAND_PXA3XX) += pxa3xx_nand.o
 obj-$(CONFIG_NAND_SPEAR) += spr_nand.o
 obj-$(CONFIG_TEGRA_NAND) += tegra_nand.o
diff --git a/drivers/mtd/nand/nand_ecc.c b/drivers/mtd/nand/nand_ecc.c
index 8b548b204d..13a6535bd5 100644
--- a/drivers/mtd/nand/nand_ecc.c
+++ b/drivers/mtd/nand/nand_ecc.c
@@ -29,11 +29,6 @@
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/nand_ecc.h>
 
-/* The PPC4xx NDFC uses Smart Media (SMC) bytes order */
-#ifdef CONFIG_NAND_NDFC
-#define CONFIG_MTD_NAND_ECC_SMC
-#endif
-
 /*
  * NAND-SPL has no sofware ECC for now, so don't include nand_calculate_ecc(),
  * only nand_correct_data() is needed
@@ -110,13 +105,8 @@ int nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat,
 	tmp2 |= (reg2 & 0x01) << 0; /* B7 -> B0 */
 
 	/* Calculate final ECC code */
-#ifdef CONFIG_MTD_NAND_ECC_SMC
-	ecc_code[0] = ~tmp2;
-	ecc_code[1] = ~tmp1;
-#else
 	ecc_code[0] = ~tmp1;
 	ecc_code[1] = ~tmp2;
-#endif
 	ecc_code[2] = ((~reg1) << 2) | 0x03;
 
 	return 0;
@@ -146,15 +136,9 @@ int nand_correct_data(struct mtd_info *mtd, u_char *dat,
 {
 	uint8_t s0, s1, s2;
 
-#ifdef CONFIG_MTD_NAND_ECC_SMC
-	s0 = calc_ecc[0] ^ read_ecc[0];
-	s1 = calc_ecc[1] ^ read_ecc[1];
-	s2 = calc_ecc[2] ^ read_ecc[2];
-#else
 	s1 = calc_ecc[0] ^ read_ecc[0];
 	s0 = calc_ecc[1] ^ read_ecc[1];
 	s2 = calc_ecc[2] ^ read_ecc[2];
-#endif
 	if ((s0 | s1 | s2) == 0)
 		return 0;
 
diff --git a/drivers/mtd/nand/ndfc.c b/drivers/mtd/nand/ndfc.c
deleted file mode 100644
index 0a9849e9bc..0000000000
--- a/drivers/mtd/nand/ndfc.c
+++ /dev/null
@@ -1,200 +0,0 @@
-/*
- * Overview:
- *   Platform independent driver for NDFC (NanD Flash Controller)
- *   integrated into IBM/AMCC PPC4xx cores
- *
- * (C) Copyright 2006-2009
- * Stefan Roese, DENX Software Engineering, sr@denx.de.
- *
- * Based on original work by
- *	Thomas Gleixner
- *	Copyright 2006 IBM
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <nand.h>
-#include <linux/mtd/ndfc.h>
-#include <linux/mtd/nand_ecc.h>
-#include <asm/processor.h>
-#include <asm/io.h>
-#include <asm/ppc4xx.h>
-
-#ifndef CONFIG_SYS_NAND_BCR
-#define CONFIG_SYS_NAND_BCR 0x80002222
-#endif
-#ifndef CONFIG_SYS_NDFC_EBC0_CFG
-#define CONFIG_SYS_NDFC_EBC0_CFG 0xb8400000
-#endif
-
-/*
- * We need to store the info, which chip-select (CS) is used for the
- * chip number. For example on Sequoia NAND chip #0 uses
- * CS #3.
- */
-static int ndfc_cs[NDFC_MAX_BANKS];
-
-static void ndfc_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
-{
-	struct nand_chip *this = mtd_to_nand(mtd);
-	ulong base = (ulong) this->IO_ADDR_W & 0xffffff00;
-
-	if (cmd == NAND_CMD_NONE)
-		return;
-
-	if (ctrl & NAND_CLE)
-		out_8((u8 *)(base + NDFC_CMD), cmd & 0xFF);
-	else
-		out_8((u8 *)(base + NDFC_ALE), cmd & 0xFF);
-}
-
-static int ndfc_dev_ready(struct mtd_info *mtdinfo)
-{
-	struct nand_chip *this = mtd_to_nand(mtdinfo);
-	ulong base = (ulong) this->IO_ADDR_W & 0xffffff00;
-
-	return (in_be32((u32 *)(base + NDFC_STAT)) & NDFC_STAT_IS_READY);
-}
-
-static void ndfc_enable_hwecc(struct mtd_info *mtdinfo, int mode)
-{
-	struct nand_chip *this = mtd_to_nand(mtdinfo);
-	ulong base = (ulong) this->IO_ADDR_W & 0xffffff00;
-	u32 ccr;
-
-	ccr = in_be32((u32 *)(base + NDFC_CCR));
-	ccr |= NDFC_CCR_RESET_ECC;
-	out_be32((u32 *)(base + NDFC_CCR), ccr);
-}
-
-static int ndfc_calculate_ecc(struct mtd_info *mtdinfo,
-			      const u_char *dat, u_char *ecc_code)
-{
-	struct nand_chip *this = mtd_to_nand(mtdinfo);
-	ulong base = (ulong) this->IO_ADDR_W & 0xffffff00;
-	u32 ecc;
-	u8 *p = (u8 *)&ecc;
-
-	ecc = in_be32((u32 *)(base + NDFC_ECC));
-
-	/* The NDFC uses Smart Media (SMC) bytes order
-	 */
-	ecc_code[0] = p[1];
-	ecc_code[1] = p[2];
-	ecc_code[2] = p[3];
-
-	return 0;
-}
-
-/*
- * Speedups for buffer read/write/verify
- *
- * NDFC allows 32bit read/write of data. So we can speed up the buffer
- * functions. No further checking, as nand_base will always read/write
- * page aligned.
- */
-static void ndfc_read_buf(struct mtd_info *mtdinfo, uint8_t *buf, int len)
-{
-	struct nand_chip *this = mtd_to_nand(mtdinfo);
-	ulong base = (ulong) this->IO_ADDR_W & 0xffffff00;
-	uint32_t *p = (uint32_t *) buf;
-
-	for (;len > 0; len -= 4)
-		*p++ = in_be32((u32 *)(base + NDFC_DATA));
-}
-
-/*
- * Don't use these speedup functions in NAND boot image, since the image
- * has to fit into 4kByte.
- */
-static void ndfc_write_buf(struct mtd_info *mtdinfo, const uint8_t *buf, int len)
-{
-	struct nand_chip *this = mtd_to_nand(mtdinfo);
-	ulong base = (ulong) this->IO_ADDR_W & 0xffffff00;
-	uint32_t *p = (uint32_t *) buf;
-
-	for (; len > 0; len -= 4)
-		out_be32((u32 *)(base + NDFC_DATA), *p++);
-}
-
-/*
- * Read a byte from the NDFC.
- */
-static uint8_t ndfc_read_byte(struct mtd_info *mtd)
-{
-
-	struct nand_chip *chip = mtd_to_nand(mtd);
-
-#ifdef CONFIG_SYS_NAND_BUSWIDTH_16BIT
-	return (uint8_t) readw(chip->IO_ADDR_R);
-#else
-	return readb(chip->IO_ADDR_R);
-#endif
-
-}
-
-void board_nand_select_device(struct nand_chip *nand, int chip)
-{
-	/*
-	 * Don't use "chip" to address the NAND device,
-	 * generate the cs from the address where it is encoded.
-	 */
-	ulong base = (ulong)nand->IO_ADDR_W & 0xffffff00;
-	int cs = ndfc_cs[chip];
-
-	/* Set NandFlash Core Configuration Register */
-	/* 1 col x 2 rows */
-	out_be32((u32 *)(base + NDFC_CCR), 0x00000000 | (cs << 24));
-	out_be32((u32 *)(base + NDFC_BCFG0 + (cs << 2)), CONFIG_SYS_NAND_BCR);
-}
-
-static void ndfc_select_chip(struct mtd_info *mtd, int chip)
-{
-	/*
-	 * Nothing to do here!
-	 */
-}
-
-int board_nand_init(struct nand_chip *nand)
-{
-	int cs = (ulong)nand->IO_ADDR_W & 0x00000003;
-	ulong base = (ulong)nand->IO_ADDR_W & 0xffffff00;
-	static int chip = 0;
-
-	/*
-	 * Save chip-select for this chip #
-	 */
-	ndfc_cs[chip] = cs;
-
-	/*
-	 * Select required NAND chip in NDFC
-	 */
-	board_nand_select_device(nand, chip);
-
-	nand->IO_ADDR_R = (void __iomem *)(base + NDFC_DATA);
-	nand->IO_ADDR_W = (void __iomem *)(base + NDFC_DATA);
-	nand->cmd_ctrl = ndfc_hwcontrol;
-	nand->chip_delay = 50;
-	nand->read_buf = ndfc_read_buf;
-	nand->dev_ready = ndfc_dev_ready;
-	nand->ecc.correct = nand_correct_data;
-	nand->ecc.hwctl = ndfc_enable_hwecc;
-	nand->ecc.calculate = ndfc_calculate_ecc;
-	nand->ecc.mode = NAND_ECC_HW;
-	nand->ecc.size = 256;
-	nand->ecc.bytes = 3;
-	nand->ecc.strength = 1;
-	nand->select_chip = ndfc_select_chip;
-
-#ifdef CONFIG_SYS_NAND_BUSWIDTH_16BIT
-	nand->options |= NAND_BUSWIDTH_16;
-#endif
-
-	nand->write_buf  = ndfc_write_buf;
-	nand->read_byte = ndfc_read_byte;
-
-	chip++;
-
-	return 0;
-}
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index cad756019d..04be432c44 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -1471,8 +1471,6 @@ CONFIG_MTD_DEBUG
 CONFIG_MTD_DEBUG_VERBOSE
 CONFIG_MTD_DEVICE
 CONFIG_MTD_ECC_SOFT
-CONFIG_MTD_NAND_DENALI_SCRATCH_REG_ADDR
-CONFIG_MTD_NAND_ECC_SMC
 CONFIG_MTD_NAND_MUSEUM_IDS
 CONFIG_MTD_NAND_VERIFY_WRITE
 CONFIG_MTD_ONENAND_VERIFY_WRITE
@@ -1562,7 +1560,6 @@ CONFIG_NAND_LPC32XX_MLC
 CONFIG_NAND_LPC32XX_SLC
 CONFIG_NAND_MODE_REG
 CONFIG_NAND_MXC_V1_1
-CONFIG_NAND_NDFC
 CONFIG_NAND_OMAP_ECCSCHEME
 CONFIG_NAND_OMAP_GPMC_WSCFG
 CONFIG_NAND_SECBOOT

commit e336fd769dac922cd38a452197b9975f3587013f
Author: Patrice Chotard <patrice.chotard@st.com>
Date:   Fri Feb 9 13:09:55 2018 +0100

    UPSTREAM: arch-stm32: Factorize stm32.h for STM32F4 and F7
    
    For STM32F4 and F7 SoCx family, a specific stm32.h file exists.
    Some common defines are duplicated or even unused in each of
    these stm32.h.
    
    Factorize all common definition in arch/arm/include/asm/stm32f.h and keep
    specific definitions in each arch/arm/include/asm/arch-stm32fx/stm32.h.
    
    Change-Id: I63b112cc23cde9d970a29fb0fba728d34b065d1b
    Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 2536f18bfa22eacc8d39d5b68762374f4bca8986)

diff --git a/arch/arm/include/asm/arch-stm32/stm32f.h b/arch/arm/include/asm/arch-stm32/stm32f.h
new file mode 100644
index 0000000000..7bea20b4d0
--- /dev/null
+++ b/arch/arm/include/asm/arch-stm32/stm32f.h
@@ -0,0 +1,22 @@
+/*
+ * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
+ * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _ASM_ARCH_STM32F_H
+#define _ASM_ARCH_STM32F_H
+
+#define STM32_PERIPH_BASE	0x40000000UL
+
+#define STM32_APB2_PERIPH_BASE	(STM32_PERIPH_BASE + 0x00010000)
+#define STM32_AHB1_PERIPH_BASE	(STM32_PERIPH_BASE + 0x00020000)
+
+#define STM32_SYSCFG_BASE	(STM32_APB2_PERIPH_BASE + 0x3800)
+#define STM32_FLASH_CNTL_BASE	(STM32_AHB1_PERIPH_BASE + 0x3C00)
+
+void stm32_flash_latency_cfg(int latency);
+
+#endif /* _ASM_ARCH_STM32F_H */
+
diff --git a/arch/arm/include/asm/arch-stm32f4/stm32.h b/arch/arm/include/asm/arch-stm32f4/stm32.h
index 6cc19664dd..dfccb445cb 100644
--- a/arch/arm/include/asm/arch-stm32f4/stm32.h
+++ b/arch/arm/include/asm/arch-stm32f4/stm32.h
@@ -11,17 +11,12 @@
 #ifndef _MACH_STM32_H_
 #define _MACH_STM32_H_
 
+#include <asm/arch-stm32/stm32f.h>
+
 /*
  * Peripheral memory map
  */
 #define STM32_SYSMEM_BASE	0x1FFF0000
-#define STM32_PERIPH_BASE	0x40000000
-#define STM32_APB1PERIPH_BASE	(STM32_PERIPH_BASE + 0x00000000)
-#define STM32_APB2PERIPH_BASE	(STM32_PERIPH_BASE + 0x00010000)
-#define STM32_AHB1PERIPH_BASE	(STM32_PERIPH_BASE + 0x00020000)
-#define STM32_AHB2PERIPH_BASE	(STM32_PERIPH_BASE + 0x10000000)
-
-#define STM32_BUS_MASK		0xFFFF0000
 
 #define STM32_GPIOA_BASE	(STM32_AHB1PERIPH_BASE + 0x0000)
 #define STM32_GPIOB_BASE	(STM32_AHB1PERIPH_BASE + 0x0400)
@@ -87,38 +82,10 @@ struct stm32_pwr_regs {
  */
 #define STM32_U_ID_BASE		(STM32_SYSMEM_BASE + 0x7A10)
 #define STM32_U_ID		((struct stm32_u_id_regs *)STM32_U_ID_BASE)
-
-#define STM32_RCC_BASE		(STM32_AHB1PERIPH_BASE + 0x3800)
-#define STM32_RCC		((struct stm32_rcc_regs *)STM32_RCC_BASE)
-
-#define STM32_PWR_BASE		(STM32_APB1PERIPH_BASE + 0x7000)
-#define STM32_PWR		((struct stm32_pwr_regs *)STM32_PWR_BASE)
-
-/*
- * Peripheral base addresses
- */
-#define STM32_USART1_BASE	(STM32_APB2PERIPH_BASE + 0x1000)
-#define STM32_USART2_BASE	(STM32_APB1PERIPH_BASE + 0x4400)
-#define STM32_USART3_BASE	(STM32_APB1PERIPH_BASE + 0x4800)
-#define STM32_USART6_BASE	(STM32_APB2PERIPH_BASE + 0x1400)
-
-#define FLASH_CNTL_BASE		(STM32_AHB1PERIPH_BASE + 0x3C00)
-
 static const u32 sect_sz_kb[CONFIG_SYS_MAX_FLASH_SECT] = {
 	[0 ... 3] =	16 * 1024,
 	[4] =		64 * 1024,
 	[5 ... 11] =	128 * 1024
 };
 
-enum clock {
-	CLOCK_CORE,
-	CLOCK_AHB,
-	CLOCK_APB1,
-	CLOCK_APB2
-};
-
-int configure_clocks(void);
-unsigned long clock_get(enum clock clck);
-void stm32_flash_latency_cfg(int latency);
-
-#endif /* _MACH_STM32_H_ */
+#endif /* _MACH_STM31_H_ */
diff --git a/arch/arm/include/asm/arch-stm32f7/stm32.h b/arch/arm/include/asm/arch-stm32f7/stm32.h
index 87aee6057b..f6c2208384 100644
--- a/arch/arm/include/asm/arch-stm32f7/stm32.h
+++ b/arch/arm/include/asm/arch-stm32f7/stm32.h
@@ -8,48 +8,7 @@
 #ifndef _ASM_ARCH_HARDWARE_H
 #define _ASM_ARCH_HARDWARE_H
 
-/* STM32F746 */
-#define ITCM_FLASH_BASE		0x00200000UL
-#define AXIM_FLASH_BASE		0x08000000UL
-
-#define ITCM_SRAM_BASE		0x00000000UL
-#define DTCM_SRAM_BASE		0x20000000UL
-#define SRAM1_BASE		0x20010000UL
-#define SRAM2_BASE		0x2004C000UL
-
-#define PERIPH_BASE		0x40000000UL
-
-#define APB1_PERIPH_BASE	(PERIPH_BASE + 0x00000000)
-#define APB2_PERIPH_BASE	(PERIPH_BASE + 0x00010000)
-#define AHB1_PERIPH_BASE	(PERIPH_BASE + 0x00020000)
-#define AHB2_PERIPH_BASE	(PERIPH_BASE + 0x10000000)
-#define AHB3_PERIPH_BASE	(PERIPH_BASE + 0x20000000)
-
-#define TIM2_BASE		(APB1_PERIPH_BASE + 0x0000)
-#define USART2_BASE		(APB1_PERIPH_BASE + 0x4400)
-#define USART3_BASE		(APB1_PERIPH_BASE + 0x4800)
-#define PWR_BASE		(APB1_PERIPH_BASE + 0x7000)
-
-#define USART1_BASE		(APB2_PERIPH_BASE + 0x1000)
-#define USART6_BASE		(APB2_PERIPH_BASE + 0x1400)
-#define STM32_SYSCFG_BASE	(APB2_PERIPH_BASE + 0x3800)
-
-#define STM32_GPIOA_BASE	(AHB1_PERIPH_BASE + 0x0000)
-#define STM32_GPIOB_BASE	(AHB1_PERIPH_BASE + 0x0400)
-#define STM32_GPIOC_BASE	(AHB1_PERIPH_BASE + 0x0800)
-#define STM32_GPIOD_BASE	(AHB1_PERIPH_BASE + 0x0C00)
-#define STM32_GPIOE_BASE	(AHB1_PERIPH_BASE + 0x1000)
-#define STM32_GPIOF_BASE	(AHB1_PERIPH_BASE + 0x1400)
-#define STM32_GPIOG_BASE	(AHB1_PERIPH_BASE + 0x1800)
-#define STM32_GPIOH_BASE	(AHB1_PERIPH_BASE + 0x1C00)
-#define STM32_GPIOI_BASE	(AHB1_PERIPH_BASE + 0x2000)
-#define STM32_GPIOJ_BASE	(AHB1_PERIPH_BASE + 0x2400)
-#define STM32_GPIOK_BASE	(AHB1_PERIPH_BASE + 0x2800)
-#define RCC_BASE		(AHB1_PERIPH_BASE + 0x3800)
-#define FLASH_CNTL_BASE		(AHB1_PERIPH_BASE + 0x3C00)
-
-
-#define SDRAM_FMC_BASE		(AHB3_PERIPH_BASE + 0x40000140)
+#include <asm/arch-stm32/stm32f.h>
 
 static const u32 sect_sz_kb[CONFIG_SYS_MAX_FLASH_SECT] = {
 	[0 ... 3] =	32 * 1024,
@@ -57,52 +16,4 @@ static const u32 sect_sz_kb[CONFIG_SYS_MAX_FLASH_SECT] = {
 	[5 ... 7] =	256 * 1024
 };
 
-#define STM32_BUS_MASK		GENMASK(31, 16)
-
-struct stm32_rcc_regs {
-	u32 cr;		/* RCC clock control */
-	u32 pllcfgr;	/* RCC PLL configuration */
-	u32 cfgr;	/* RCC clock configuration */
-	u32 cir;	/* RCC clock interrupt */
-	u32 ahb1rstr;	/* RCC AHB1 peripheral reset */
-	u32 ahb2rstr;	/* RCC AHB2 peripheral reset */
-	u32 ahb3rstr;	/* RCC AHB3 peripheral reset */
-	u32 rsv0;
-	u32 apb1rstr;	/* RCC APB1 peripheral reset */
-	u32 apb2rstr;	/* RCC APB2 peripheral reset */
-	u32 rsv1[2];
-	u32 ahb1enr;	/* RCC AHB1 peripheral clock enable */
-	u32 ahb2enr;	/* RCC AHB2 peripheral clock enable */
-	u32 ahb3enr;	/* RCC AHB3 peripheral clock enable */
-	u32 rsv2;
-	u32 apb1enr;	/* RCC APB1 peripheral clock enable */
-	u32 apb2enr;	/* RCC APB2 peripheral clock enable */
-	u32 rsv3[2];
-	u32 ahb1lpenr;	/* RCC AHB1 periph clk enable in low pwr mode */
-	u32 ahb2lpenr;	/* RCC AHB2 periph clk enable in low pwr mode */
-	u32 ahb3lpenr;	/* RCC AHB3 periph clk enable in low pwr mode */
-	u32 rsv4;
-	u32 apb1lpenr;	/* RCC APB1 periph clk enable in low pwr mode */
-	u32 apb2lpenr;	/* RCC APB2 periph clk enable in low pwr mode */
-	u32 rsv5[2];
-	u32 bdcr;	/* RCC Backup domain control */
-	u32 csr;	/* RCC clock control & status */
-	u32 rsv6[2];
-	u32 sscgr;	/* RCC spread spectrum clock generation */
-	u32 plli2scfgr;	/* RCC PLLI2S configuration */
-	u32 pllsaicfgr;	/* PLLSAI configuration */
-	u32 dckcfgr;	/* dedicated clocks configuration register */
-};
-#define STM32_RCC		((struct stm32_rcc_regs *)RCC_BASE)
-
-struct stm32_pwr_regs {
-	u32 cr1;   /* power control register 1 */
-	u32 csr1;  /* power control/status register 2 */
-	u32 cr2;   /* power control register 2 */
-	u32 csr2;  /* power control/status register 2 */
-};
-#define STM32_PWR		((struct stm32_pwr_regs *)PWR_BASE)
-
-void stm32_flash_latency_cfg(int latency);
-
 #endif /* _ASM_ARCH_HARDWARE_H */
diff --git a/drivers/mtd/stm32_flash.c b/drivers/mtd/stm32_flash.c
index 472499d83c..a82814272e 100644
--- a/drivers/mtd/stm32_flash.c
+++ b/drivers/mtd/stm32_flash.c
@@ -12,7 +12,7 @@
 
 flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
 
-#define STM32_FLASH		((struct stm32_flash_regs *)FLASH_CNTL_BASE)
+#define STM32_FLASH	((struct stm32_flash_regs *)STM32_FLASH_CNTL_BASE)
 
 void stm32_flash_latency_cfg(int latency)
 {

commit cf6fc54d5805d338500f2eafb9f3008b73220029
Author: Jagan Teki <jagan@amarulasolutions.com>
Date:   Tue Feb 6 22:42:56 2018 +0530

    UPSTREAM: arm: sunxi: Move spl spi sunxi code to mach-sunxi
    
    This SUNXI variant SPL SPI code doesn't use either SPI or
    SPL_FLASG subsystems due to size constraints and also placing
    this code in drivers/mtd/spi will unnecessary build SPI_FLASH
    code(if defined) which never required, hence moved to arch area.
    
    And also renamed the file according to kconfig which resembles
    proper name.
    
    Change-Id: I0bf18e93d26bc1b80d3dfa7219a2a904ed17085a
    Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit c2a7a7ef866f2980213fee2a4a0df60fb06db6d0)

diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index 2309f59999..4bcdc5ccdc 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -844,4 +844,12 @@ config SPL_STACK_R_ADDR
 	default 0x2fe00000 if MACH_SUN9I
 	default 0x4fe00000 if MACH_SUN50I
 
+config SPL_SPI_SUNXI
+	bool "Support for SPI Flash on Allwinner SoCs in SPL"
+	depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUNXI_H3_H5 || MACH_SUN50I
+	help
+	  Enable support for SPI Flash. This option allows SPL to read from
+	  sunxi SPI Flash. It uses the same method as the boot ROM, so does
+	  not need any extra configuration.
+
 endif
diff --git a/arch/arm/mach-sunxi/Makefile b/arch/arm/mach-sunxi/Makefile
index 2a3c379b72..6ddf682764 100644
--- a/arch/arm/mach-sunxi/Makefile
+++ b/arch/arm/mach-sunxi/Makefile
@@ -48,6 +48,7 @@ obj-$(CONFIG_MACH_SUN7I)	+= dram_sun4i.o
 obj-$(CONFIG_MACH_SUN8I_A23)	+= dram_sun8i_a23.o
 obj-$(CONFIG_MACH_SUN8I_A33)	+= dram_sun8i_a33.o
 obj-$(CONFIG_MACH_SUN8I_A83T)	+= dram_sun8i_a83t.o
+obj-$(CONFIG_SPL_SPI_SUNXI)	+= spl_spi_sunxi.o
 obj-$(CONFIG_SUNXI_DRAM_DW)	+= dram_sunxi_dw.o
 obj-$(CONFIG_SUNXI_DRAM_DW)	+= dram_timings/
 obj-$(CONFIG_MACH_SUN9I)	+= dram_sun9i.o
diff --git a/drivers/mtd/spi/sunxi_spi_spl.c b/arch/arm/mach-sunxi/spl_spi_sunxi.c
similarity index 100%
rename from drivers/mtd/spi/sunxi_spi_spl.c
rename to arch/arm/mach-sunxi/spl_spi_sunxi.c
diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig
index 6ba255d676..4484cf8195 100644
--- a/drivers/mtd/spi/Kconfig
+++ b/drivers/mtd/spi/Kconfig
@@ -135,17 +135,4 @@ config SPI_FLASH_MTD
 
 	  If unsure, say N
 
-if SPL
-
-config SPL_SPI_SUNXI
-	bool "Support for SPI Flash on Allwinner SoCs in SPL"
-	depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUNXI_H3_H5 || MACH_SUN50I
-	select SPL_SPI_FLASH_SUPPORT
-	---help---
-	Enable support for SPI Flash. This option allows SPL to read from
-	sunxi SPI Flash. It uses the same method as the boot ROM, so does
-	not need any extra configuration.
-
-endif
-
 endmenu # menu "SPI Flash Support"
diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile
index fcda023412..4be6e9b15f 100644
--- a/drivers/mtd/spi/Makefile
+++ b/drivers/mtd/spi/Makefile
@@ -9,7 +9,6 @@ obj-$(CONFIG_DM_SPI_FLASH) += sf-uclass.o
 
 ifdef CONFIG_SPL_BUILD
 obj-$(CONFIG_SPL_SPI_BOOT)	+= fsl_espi_spl.o
-obj-$(CONFIG_SPL_SPI_SUNXI)	+= sunxi_spi_spl.o
 endif
 
 obj-$(CONFIG_SPI_FLASH) += sf_probe.o spi_flash.o spi_flash_ids.o sf.o

commit f1ba13f8e2acf648740a4a8a3594509a3e16b3aa
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Mon Mar 5 01:20:11 2018 +0900

    UPSTREAM: libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h>
    
    Thomas reported U-Boot failed to build host tools if libfdt-devel
    package is installed because tools include libfdt headers from
    /usr/include/ instead of using internal ones.
    
    This commit moves the header code:
      include/libfdt.h         -> include/linux/libfdt.h
      include/libfdt_env.h     -> include/linux/libfdt_env.h
    
    and replaces include directives:
      #include <libfdt.h>      -> #include <linux/libfdt.h>
      #include <libfdt_env.h>  -> #include <linux/libfdt_env.h>
    
    Change-Id: I68fd5734d6460c169fa5ee2893c57cb5d73340b6
    Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit b08c8c4870831c9315dcae237772238e80035bd5)

diff --git a/board/freescale/ls1088a/ls1088a.c b/board/freescale/ls1088a/ls1088a.c
new file mode 100644
index 0000000000..56e454ff20
--- /dev/null
+++ b/board/freescale/ls1088a/ls1088a.c
@@ -0,0 +1,588 @@
+/*
+ * Copyright 2017 NXP
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#include <common.h>
+#include <i2c.h>
+#include <malloc.h>
+#include <errno.h>
+#include <netdev.h>
+#include <fsl_ifc.h>
+#include <fsl_ddr.h>
+#include <fsl_sec.h>
+#include <asm/io.h>
+#include <fdt_support.h>
+#include <linux/libfdt.h>
+#include <fsl-mc/fsl_mc.h>
+#include <environment.h>
+#include <asm/arch-fsl-layerscape/soc.h>
+#include <asm/arch/ppa.h>
+#include <hwconfig.h>
+#include <asm/arch/fsl_serdes.h>
+#include <asm/arch/soc.h>
+
+#include "../common/qixis.h"
+#include "ls1088a_qixis.h"
+#include "../common/vid.h"
+#include <fsl_immap.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_early_init_f(void)
+{
+	fsl_lsch3_early_init_f();
+	return 0;
+}
+
+#ifdef CONFIG_FSL_QIXIS
+unsigned long long get_qixis_addr(void)
+{
+	unsigned long long addr;
+
+	if (gd->flags & GD_FLG_RELOC)
+		addr = QIXIS_BASE_PHYS;
+	else
+		addr = QIXIS_BASE_PHYS_EARLY;
+
+	/*
+	 * IFC address under 256MB is mapped to 0x30000000, any address above
+	 * is mapped to 0x5_10000000 up to 4GB.
+	 */
+	addr = addr  > 0x10000000 ? addr + 0x500000000ULL : addr + 0x30000000;
+
+	return addr;
+}
+#endif
+
+#if defined(CONFIG_VID)
+int init_func_vid(void)
+{
+	if (adjust_vdd(0) < 0)
+		printf("core voltage not adjusted\n");
+
+	return 0;
+}
+#endif
+
+#if !defined(CONFIG_SPL_BUILD)
+int checkboard(void)
+{
+	char buf[64];
+	u8 sw;
+	static const char *const freq[] = {"100", "125", "156.25",
+					    "100 separate SSCG"};
+	int clock;
+
+#ifdef CONFIG_TARGET_LS1088AQDS
+	printf("Board: LS1088A-QDS, ");
+#else
+	printf("Board: LS1088A-RDB, ");
+#endif
+
+	sw = QIXIS_READ(arch);
+	printf("Board Arch: V%d, ", sw >> 4);
+
+#ifdef CONFIG_TARGET_LS1088AQDS
+	printf("Board version: %c, boot from ", (sw & 0xf) + 'A' - 1);
+#else
+	printf("Board version: %c, boot from ", (sw & 0xf) + 'A');
+#endif
+
+	memset((u8 *)buf, 0x00, ARRAY_SIZE(buf));
+
+	sw = QIXIS_READ(brdcfg[0]);
+	sw = (sw & QIXIS_LBMAP_MASK) >> QIXIS_LBMAP_SHIFT;
+
+#ifdef CONFIG_SD_BOOT
+	puts("SD card\n");
+#endif
+	switch (sw) {
+#ifdef CONFIG_TARGET_LS1088AQDS
+	case 0:
+	case 1:
+	case 2:
+	case 3:
+	case 4:
+	case 5:
+	case 6:
+	case 7:
+		printf("vBank: %d\n", sw);
+		break;
+	case 8:
+		puts("PromJet\n");
+		break;
+	case 15:
+		puts("IFCCard\n");
+		break;
+	case 14:
+#else
+	case 0:
+#endif
+		puts("QSPI:");
+		sw = QIXIS_READ(brdcfg[0]);
+		sw = (sw & QIXIS_QMAP_MASK) >> QIXIS_QMAP_SHIFT;
+		if (sw == 0 || sw == 4)
+			puts("0\n");
+		else if (sw == 1)
+			puts("1\n");
+		else
+			puts("EMU\n");
+		break;
+
+	default:
+		printf("invalid setting of SW%u\n", QIXIS_LBMAP_SWITCH);
+		break;
+	}
+
+#ifdef CONFIG_TARGET_LS1088AQDS
+	printf("FPGA: v%d (%s), build %d",
+	       (int)QIXIS_READ(scver), qixis_read_tag(buf),
+	       (int)qixis_read_minor());
+	/* the timestamp string contains "\n" at the end */
+	printf(" on %s", qixis_read_time(buf));
+#else
+	printf("CPLD: v%d.%d\n", QIXIS_READ(scver), QIXIS_READ(tagdata));
+#endif
+
+	/*
+	 * Display the actual SERDES reference clocks as configured by the
+	 * dip switches on the board.  Note that the SWx registers could
+	 * technically be set to force the reference clocks to match the
+	 * values that the SERDES expects (or vice versa).  For now, however,
+	 * we just display both values and hope the user notices when they
+	 * don't match.
+	 */
+	puts("SERDES1 Reference : ");
+	sw = QIXIS_READ(brdcfg[2]);
+	clock = (sw >> 6) & 3;
+	printf("Clock1 = %sMHz ", freq[clock]);
+	clock = (sw >> 4) & 3;
+	printf("Clock2 = %sMHz", freq[clock]);
+
+	puts("\nSERDES2 Reference : ");
+	clock = (sw >> 2) & 3;
+	printf("Clock1 = %sMHz ", freq[clock]);
+	clock = (sw >> 0) & 3;
+	printf("Clock2 = %sMHz\n", freq[clock]);
+
+	return 0;
+}
+
+bool if_board_diff_clk(void)
+{
+#ifdef CONFIG_TARGET_LS1088AQDS
+	u8 diff_conf = QIXIS_READ(brdcfg[11]);
+	return diff_conf & 0x40;
+#else
+	u8 diff_conf = QIXIS_READ(dutcfg[11]);
+	return diff_conf & 0x80;
+#endif
+}
+
+unsigned long get_board_sys_clk(void)
+{
+	u8 sysclk_conf = QIXIS_READ(brdcfg[1]);
+
+	switch (sysclk_conf & 0x0f) {
+	case QIXIS_SYSCLK_83:
+		return 83333333;
+	case QIXIS_SYSCLK_100:
+		return 100000000;
+	case QIXIS_SYSCLK_125:
+		return 125000000;
+	case QIXIS_SYSCLK_133:
+		return 133333333;
+	case QIXIS_SYSCLK_150:
+		return 150000000;
+	case QIXIS_SYSCLK_160:
+		return 160000000;
+	case QIXIS_SYSCLK_166:
+		return 166666666;
+	}
+
+	return 66666666;
+}
+
+unsigned long get_board_ddr_clk(void)
+{
+	u8 ddrclk_conf = QIXIS_READ(brdcfg[1]);
+
+	if (if_board_diff_clk())
+		return get_board_sys_clk();
+	switch ((ddrclk_conf & 0x30) >> 4) {
+	case QIXIS_DDRCLK_100:
+		return 100000000;
+	case QIXIS_DDRCLK_125:
+		return 125000000;
+	case QIXIS_DDRCLK_133:
+		return 133333333;
+	}
+
+	return 66666666;
+}
+#endif
+
+int select_i2c_ch_pca9547(u8 ch)
+{
+	int ret;
+
+	ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1);
+	if (ret) {
+		puts("PCA: failed to select proper channel\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+#if !defined(CONFIG_SPL_BUILD)
+void board_retimer_init(void)
+{
+	u8 reg;
+
+	/* Retimer is connected to I2C1_CH5 */
+	select_i2c_ch_pca9547(I2C_MUX_CH5);
+
+	/* Access to Control/Shared register */
+	reg = 0x0;
+	i2c_write(I2C_RETIMER_ADDR, 0xff, 1, &reg, 1);
+
+	/* Read device revision and ID */
+	i2c_read(I2C_RETIMER_ADDR, 1, 1, &reg, 1);
+	debug("Retimer version id = 0x%x\n", reg);
+
+	/* Enable Broadcast. All writes target all channel register sets */
+	reg = 0x0c;
+	i2c_write(I2C_RETIMER_ADDR, 0xff, 1, &reg, 1);
+
+	/* Reset Channel Registers */
+	i2c_read(I2C_RETIMER_ADDR, 0, 1, &reg, 1);
+	reg |= 0x4;
+	i2c_write(I2C_RETIMER_ADDR, 0, 1, &reg, 1);
+
+	/* Set data rate as 10.3125 Gbps */
+	reg = 0x90;
+	i2c_write(I2C_RETIMER_ADDR, 0x60, 1, &reg, 1);
+	reg = 0xb3;
+	i2c_write(I2C_RETIMER_ADDR, 0x61, 1, &reg, 1);
+	reg = 0x90;
+	i2c_write(I2C_RETIMER_ADDR, 0x62, 1, &reg, 1);
+	reg = 0xb3;
+	i2c_write(I2C_RETIMER_ADDR, 0x63, 1, &reg, 1);
+	reg = 0xcd;
+	i2c_write(I2C_RETIMER_ADDR, 0x64, 1, &reg, 1);
+
+	/* Select VCO Divider to full rate (000) */
+	i2c_read(I2C_RETIMER_ADDR, 0x2F, 1, &reg, 1);
+	reg &= 0x0f;
+	reg |= 0x70;
+	i2c_write(I2C_RETIMER_ADDR, 0x2F, 1, &reg, 1);
+
+#ifdef	CONFIG_TARGET_LS1088AQDS
+	/* Retimer is connected to I2C1_CH5 */
+	select_i2c_ch_pca9547(I2C_MUX_CH5);
+
+	/* Access to Control/Shared register */
+	reg = 0x0;
+	i2c_write(I2C_RETIMER_ADDR2, 0xff, 1, &reg, 1);
+
+	/* Read device revision and ID */
+	i2c_read(I2C_RETIMER_ADDR2, 1, 1, &reg, 1);
+	debug("Retimer version id = 0x%x\n", reg);
+
+	/* Enable Broadcast. All writes target all channel register sets */
+	reg = 0x0c;
+	i2c_write(I2C_RETIMER_ADDR2, 0xff, 1, &reg, 1);
+
+	/* Reset Channel Registers */
+	i2c_read(I2C_RETIMER_ADDR2, 0, 1, &reg, 1);
+	reg |= 0x4;
+	i2c_write(I2C_RETIMER_ADDR2, 0, 1, &reg, 1);
+
+	/* Set data rate as 10.3125 Gbps */
+	reg = 0x90;
+	i2c_write(I2C_RETIMER_ADDR2, 0x60, 1, &reg, 1);
+	reg = 0xb3;
+	i2c_write(I2C_RETIMER_ADDR2, 0x61, 1, &reg, 1);
+	reg = 0x90;
+	i2c_write(I2C_RETIMER_ADDR2, 0x62, 1, &reg, 1);
+	reg = 0xb3;
+	i2c_write(I2C_RETIMER_ADDR2, 0x63, 1, &reg, 1);
+	reg = 0xcd;
+	i2c_write(I2C_RETIMER_ADDR2, 0x64, 1, &reg, 1);
+
+	/* Select VCO Divider to full rate (000) */
+	i2c_read(I2C_RETIMER_ADDR2, 0x2F, 1, &reg, 1);
+	reg &= 0x0f;
+	reg |= 0x70;
+	i2c_write(I2C_RETIMER_ADDR2, 0x2F, 1, &reg, 1);
+#endif
+	/*return the default channel*/
+	select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
+}
+
+#ifdef CONFIG_MISC_INIT_R
+int misc_init_r(void)
+{
+#ifdef CONFIG_TARGET_LS1088ARDB
+	u8 brdcfg5;
+
+	if (hwconfig("esdhc-force-sd")) {
+		brdcfg5 = QIXIS_READ(brdcfg[5]);
+		brdcfg5 &= ~BRDCFG5_SPISDHC_MASK;
+		brdcfg5 |= BRDCFG5_FORCE_SD;
+		QIXIS_WRITE(brdcfg[5], brdcfg5);
+	}
+#endif
+	return 0;
+}
+#endif
+#endif
+
+int i2c_multiplexer_select_vid_channel(u8 channel)
+{
+	return select_i2c_ch_pca9547(channel);
+}
+
+#ifdef CONFIG_TARGET_LS1088AQDS
+/* read the current value(SVDD) of the LTM Regulator Voltage */
+int get_serdes_volt(void)
+{
+	int  ret, vcode = 0;
+	u8 chan = PWM_CHANNEL0;
+
+	/* Select the PAGE 0 using PMBus commands PAGE for VDD */
+	ret = i2c_write(I2C_SVDD_MONITOR_ADDR,
+			PMBUS_CMD_PAGE, 1, &chan, 1);
+	if (ret) {
+		printf("VID: failed to select VDD Page 0\n");
+		return ret;
+	}
+
+	/* Read the output voltage using PMBus command READ_VOUT */
+	ret = i2c_read(I2C_SVDD_MONITOR_ADDR,
+		       PMBUS_CMD_READ_VOUT, 1, (void *)&vcode, 2);
+	if (ret) {
+		printf("VID: failed to read the volatge\n");
+		return ret;
+	}
+
+	return vcode;
+}
+
+int set_serdes_volt(int svdd)
+{
+	int ret, vdd_last;
+	u8 buff[5] = {0x04, PWM_CHANNEL0, PMBUS_CMD_VOUT_COMMAND,
+			svdd & 0xFF, (svdd & 0xFF00) >> 8};
+
+	/* Write the desired voltage code to the SVDD regulator */
+	ret = i2c_write(I2C_SVDD_MONITOR_ADDR,
+			PMBUS_CMD_PAGE_PLUS_WRITE, 1, (void *)&buff, 5);
+	if (ret) {
+		printf("VID: I2C failed to write to the volatge regulator\n");
+		return -1;
+	}
+
+	/* Wait for the volatge to get to the desired value */
+	do {
+		vdd_last = get_serdes_volt();
+		if (vdd_last < 0) {
+			printf("VID: Couldn't read sensor abort VID adjust\n");
+			return -1;
+		}
+	} while (vdd_last != svdd);
+
+	return 1;
+}
+#else
+int get_serdes_volt(void)
+{
+	return 0;
+}
+
+int set_serdes_volt(int svdd)
+{
+	int ret;
+	u8 brdcfg4;
+
+	printf("SVDD changing of RDB\n");
+
+	/* Read the BRDCFG54 via CLPD */
+	ret = i2c_read(CONFIG_SYS_I2C_FPGA_ADDR,
+		       QIXIS_BRDCFG4_OFFSET, 1, (void *)&brdcfg4, 1);
+	if (ret) {
+		printf("VID: I2C failed to read the CPLD BRDCFG4\n");
+		return -1;
+	}
+
+	brdcfg4 = brdcfg4 | 0x08;
+
+	/* Write to the BRDCFG4 */
+	ret = i2c_write(CONFIG_SYS_I2C_FPGA_ADDR,
+			QIXIS_BRDCFG4_OFFSET, 1, (void *)&brdcfg4, 1);
+	if (ret) {
+		debug("VID: I2C failed to set the SVDD CPLD BRDCFG4\n");
+		return -1;
+	}
+
+	/* Wait for the volatge to get to the desired value */
+	udelay(10000);
+
+	return 1;
+}
+#endif
+
+/* this function disables the SERDES, changes the SVDD Voltage and enables it*/
+int board_adjust_vdd(int vdd)
+{
+	int ret = 0;
+
+	debug("%s: vdd = %d\n", __func__, vdd);
+
+	/* Special settings to be performed when voltage is 900mV */
+	if (vdd == 900) {
+		ret = setup_serdes_volt(vdd);
+		if (ret < 0) {
+			ret = -1;
+			goto exit;
+		}
+	}
+exit:
+	return ret;
+}
+
+#if !defined(CONFIG_SPL_BUILD)
+int board_init(void)
+{
+	init_final_memctl_regs();
+#if defined(CONFIG_TARGET_LS1088ARDB) && defined(CONFIG_FSL_MC_ENET)
+	u32 __iomem *irq_ccsr = (u32 __iomem *)ISC_BASE;
+#endif
+
+	select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
+	board_retimer_init();
+
+#ifdef CONFIG_ENV_IS_NOWHERE
+	gd->env_addr = (ulong)&default_environment[0];
+#endif
+
+#if defined(CONFIG_TARGET_LS1088ARDB) && defined(CONFIG_FSL_MC_ENET)
+	/* invert AQR105 IRQ pins polarity */
+	out_le32(irq_ccsr + IRQCR_OFFSET / 4, AQR105_IRQ_MASK);
+#endif
+
+#ifdef CONFIG_FSL_CAAM
+	sec_init();
+#endif
+#ifdef CONFIG_FSL_LS_PPA
+	ppa_init();
+#endif
+	return 0;
+}
+
+void detail_board_ddr_info(void)
+{
+	puts("\nDDR    ");
+	print_size(gd->bd->bi_dram[0].size + gd->bd->bi_dram[1].size, "");
+	print_ddr_info(0);
+}
+
+#if defined(CONFIG_ARCH_MISC_INIT)
+int arch_misc_init(void)
+{
+	return 0;
+}
+#endif
+
+#ifdef CONFIG_FSL_MC_ENET
+void fdt_fixup_board_enet(void *fdt)
+{
+	int offset;
+
+	offset = fdt_path_offset(fdt, "/fsl-mc");
+
+	if (offset < 0)
+		offset = fdt_path_offset(fdt, "/fsl,dprc@0");
+
+	if (offset < 0) {
+		printf("%s: ERROR: fsl-mc node not found in device tree (error %d)\n",
+		       __func__, offset);
+		return;
+	}
+
+	if ((get_mc_boot_status() == 0) && (get_dpl_apply_status() == 0))
+		fdt_status_okay(fdt, offset);
+	else
+		fdt_status_fail(fdt, offset);
+}
+#endif
+
+#ifdef CONFIG_OF_BOARD_SETUP
+void fsl_fdt_fixup_flash(void *fdt)
+{
+	int offset;
+
+/*
+ * IFC-NOR and QSPI are muxed on SoC.
+ * So disable IFC node in dts if QSPI is enabled or
+ * disable QSPI node in dts in case QSPI is not enabled.
+ */
+
+#ifdef CONFIG_FSL_QSPI
+	offset = fdt_path_offset(fdt, "/soc/ifc/nor");
+
+	if (offset < 0)
+		offset = fdt_path_offset(fdt, "/ifc/nor");
+#else
+	offset = fdt_path_offset(fdt, "/soc/quadspi");
+
+	if (offset < 0)
+		offset = fdt_path_offset(fdt, "/quadspi");
+#endif
+	if (offset < 0)
+		return;
+
+	fdt_status_disabled(fdt, offset);
+}
+
+int ft_board_setup(void *blob, bd_t *bd)
+{
+	int err, i;
+	u64 base[CONFIG_NR_DRAM_BANKS];
+	u64 size[CONFIG_NR_DRAM_BANKS];
+
+	ft_cpu_setup(blob, bd);
+
+	/* fixup DT for the two GPP DDR banks */
+	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+		base[i] = gd->bd->bi_dram[i].start;
+		size[i] = gd->bd->bi_dram[i].size;
+	}
+
+#ifdef CONFIG_RESV_RAM
+	/* reduce size if reserved memory is within this bank */
+	if (gd->arch.resv_ram >= base[0] &&
+	    gd->arch.resv_ram < base[0] + size[0])
+		size[0] = gd->arch.resv_ram - base[0];
+	else if (gd->arch.resv_ram >= base[1] &&
+		 gd->arch.resv_ram < base[1] + size[1])
+		size[1] = gd->arch.resv_ram - base[1];
+#endif
+
+	fdt_fixup_memory_banks(blob, base, size, CONFIG_NR_DRAM_BANKS);
+
+	fsl_fdt_fixup_flash(blob);
+
+#ifdef CONFIG_FSL_MC_ENET
+	fdt_fixup_board_enet(blob);
+	err = fsl_mc_ldpaa_exit(bd);
+	if (err)
+		return err;
+#endif
+
+	return 0;
+}
+#endif
+#endif /* defined(CONFIG_SPL_BUILD) */
diff --git a/board/freescale/p1023rdb/p1023rdb.c b/board/freescale/p1023rdb/p1023rdb.c
index 05abf371c4..5c6b64ecd7 100644
--- a/board/freescale/p1023rdb/p1023rdb.c
+++ b/board/freescale/p1023rdb/p1023rdb.c
@@ -18,6 +18,7 @@
 #include <asm/fsl_pci.h>
 #include <fsl_ddr_sdram.h>
 #include <asm/fsl_portals.h>
+#include <fsl_qbman.h>
 #include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <netdev.h>
diff --git a/board/liebherr/display5/spl.c b/board/liebherr/display5/spl.c
new file mode 100644
index 0000000000..437963e225
--- /dev/null
+++ b/board/liebherr/display5/spl.c
@@ -0,0 +1,247 @@
+/*
+ * Copyright (C) 2017 DENX Software Engineering
+ * Lukasz Majewski, DENX Software Engineering, lukma@denx.de
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <spl.h>
+#include <linux/libfdt.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/mx6-ddr.h>
+#include <asm/arch/mx6-pins.h>
+#include "asm/arch/crm_regs.h"
+#include <asm/arch/sys_proto.h>
+#include <asm/arch/imx-regs.h>
+#include "asm/arch/iomux.h"
+#include <asm/mach-imx/iomux-v3.h>
+#include <environment.h>
+#include <fsl_esdhc.h>
+#include <netdev.h>
+#include "common.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static const struct mx6dq_iomux_ddr_regs mx6_ddr_ioregs = {
+	.dram_sdclk_0 = 0x00000030,
+	.dram_sdclk_1 = 0x00000030,
+	.dram_cas = 0x00000030,
+	.dram_ras = 0x00000030,
+	.dram_reset = 0x00000030,
+	.dram_sdcke0 = 0x00003000,
+	.dram_sdcke1 = 0x00003000,
+	.dram_sdba2 = 0x00000000,
+	.dram_sdodt0 = 0x00000030,
+	.dram_sdodt1 = 0x00000030,
+
+	.dram_sdqs0 = 0x00000030,
+	.dram_sdqs1 = 0x00000030,
+	.dram_sdqs2 = 0x00000030,
+	.dram_sdqs3 = 0x00000030,
+	.dram_sdqs4 = 0x00000030,
+	.dram_sdqs5 = 0x00000030,
+	.dram_sdqs6 = 0x00000030,
+	.dram_sdqs7 = 0x00000030,
+
+	.dram_dqm0 = 0x00000030,
+	.dram_dqm1 = 0x00000030,
+	.dram_dqm2 = 0x00000030,
+	.dram_dqm3 = 0x00000030,
+	.dram_dqm4 = 0x00000030,
+	.dram_dqm5 = 0x00000030,
+	.dram_dqm6 = 0x00000030,
+	.dram_dqm7 = 0x00000030,
+};
+
+static const struct mx6dq_iomux_grp_regs mx6_grp_ioregs = {
+	.grp_ddr_type = 0x000c0000,
+	.grp_ddrmode_ctl = 0x00020000,
+	.grp_ddrpke = 0x00000000,
+	.grp_addds = 0x00000030,
+	.grp_ctlds = 0x00000030,
+	.grp_ddrmode = 0x00020000,
+	.grp_b0ds = 0x00000030,
+	.grp_b1ds = 0x00000030,
+	.grp_b2ds = 0x00000030,
+	.grp_b3ds = 0x00000030,
+	.grp_b4ds = 0x00000030,
+	.grp_b5ds = 0x00000030,
+	.grp_b6ds = 0x00000030,
+	.grp_b7ds = 0x00000030,
+};
+
+/* 4x128Mx16.cfg */
+static const struct mx6_mmdc_calibration mx6_4x256mx16_mmdc_calib = {
+	.p0_mpwldectrl0 = 0x002D0028,
+	.p0_mpwldectrl1 = 0x0032002D,
+	.p1_mpwldectrl0 = 0x00210036,
+	.p1_mpwldectrl1 = 0x0019002E,
+	.p0_mpdgctrl0 = 0x4349035C,
+	.p0_mpdgctrl1 = 0x0348033D,
+	.p1_mpdgctrl0 = 0x43550362,
+	.p1_mpdgctrl1 = 0x03520316,
+	.p0_mprddlctl = 0x41393940,
+	.p1_mprddlctl = 0x3F3A3C47,
+	.p0_mpwrdlctl = 0x413A423A,
+	.p1_mpwrdlctl = 0x4042483E,
+};
+
+/* MT41K128M16JT-125 (2Gb density) */
+static const struct mx6_ddr3_cfg mt41k128m16jt_125 = {
+	.mem_speed = 1600,
+	.density = 2,
+	.width = 16,
+	.banks = 8,
+	.rowaddr = 14,
+	.coladdr = 10,
+	.pagesz = 2,
+	.trcd = 1375,
+	.trcmin = 4875,
+	.trasmin = 3500,
+};
+
+static void ccgr_init(void)
+{
+	struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
+
+	writel(0x00C03F3F, &ccm->CCGR0);
+	writel(0x0030FC3F, &ccm->CCGR1);
+	writel(0x0FFFCFC0, &ccm->CCGR2);
+	writel(0x3FF00000, &ccm->CCGR3);
+	writel(0x00FFF300, &ccm->CCGR4);
+	writel(0x0F0000C3, &ccm->CCGR5);
+	writel(0x000003FF, &ccm->CCGR6);
+}
+
+static void spl_dram_init(void)
+{
+	struct mx6_ddr_sysinfo sysinfo = {
+		/* width of data bus:0=16,1=32,2=64 */
+		.dsize = 2,
+		/* config for full 4GB range so that get_mem_size() works */
+		.cs_density = 32, /* 32Gb per CS */
+		/* single chip select */
+		.ncs = 1,
+		.cs1_mirror = 0,
+		.rtt_wr = 1 /*DDR3_RTT_60_OHM*/,	/* RTT_Wr = RZQ/4 */
+		.rtt_nom = 2 /*DDR3_RTT_120_OHM*/,	/* RTT_Nom = RZQ/2 */
+		.walat = 1,	/* Write additional latency */
+		.ralat = 5,	/* Read additional latency */
+		.mif3_mode = 3,	/* Command prediction working mode */
+		.bi_on = 1,	/* Bank interleaving enabled */
+		.sde_to_rst = 0x10,	/* 14 cycles, 200us (JEDEC default) */
+		.rst_to_cke = 0x23,	/* 33 cycles, 500us (JEDEC default) */
+		.pd_fast_exit = 1, /* enable precharge power-down fast exit */
+		.ddr_type = DDR_TYPE_DDR3,
+		.refsel = 1,	/* Refresh cycles at 32KHz */
+		.refr = 7,	/* 8 refresh commands per refresh cycle */
+	};
+
+	mx6dq_dram_iocfg(64, &mx6_ddr_ioregs, &mx6_grp_ioregs);
+	mx6_dram_cfg(&sysinfo, &mx6_4x256mx16_mmdc_calib, &mt41k128m16jt_125);
+}
+
+#ifdef CONFIG_SPL_SPI_SUPPORT
+static void displ5_init_ecspi(void)
+{
+	displ5_set_iomux_ecspi_spl();
+	enable_spi_clk(1, 1);
+}
+#else
+static inline void displ5_init_ecspi(void) { }
+#endif
+
+#ifdef CONFIG_SPL_MMC_SUPPORT
+static struct fsl_esdhc_cfg usdhc_cfg = {
+	.esdhc_base = USDHC4_BASE_ADDR,
+	.max_bus_width = 8,
+};
+
+int board_mmc_init(bd_t *bd)
+{
+	displ5_set_iomux_usdhc_spl();
+
+	usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
+	gd->arch.sdhc_clk = usdhc_cfg.sdhc_clk;
+
+	return fsl_esdhc_initialize(bd, &usdhc_cfg);
+}
+#endif
+
+void board_init_f(ulong dummy)
+{
+	ccgr_init();
+
+	arch_cpu_init();
+
+	gpr_init();
+
+	/* setup GP timer */
+	timer_init();
+
+	displ5_set_iomux_uart_spl();
+
+	/* UART clocks enabled and gd valid - init serial console */
+	preloader_console_init();
+
+	displ5_init_ecspi();
+
+	/* DDR initialization */
+	spl_dram_init();
+
+	/* Clear the BSS. */
+	memset(__bss_start, 0, __bss_end - __bss_start);
+
+	/* load/boot image from boot device */
+	board_init_r(NULL, 0);
+}
+
+void board_boot_order(u32 *spl_boot_list)
+{
+	/* Default boot sequence SPI -> MMC */
+	spl_boot_list[0] = spl_boot_device();
+	spl_boot_list[1] = BOOT_DEVICE_MMC1;
+	spl_boot_list[2] = BOOT_DEVICE_UART;
+	spl_boot_list[3] = BOOT_DEVICE_NONE;
+
+#ifdef CONFIG_SPL_ENV_SUPPORT
+	/* 'fastboot' */
+	const char *s;
+
+	env_init();
+	env_load();
+
+	s = env_get("BOOT_FROM");
+	if (s && strcmp(s, "ACTIVE") == 0) {
+		spl_boot_list[0] = BOOT_DEVICE_MMC1;
+		spl_boot_list[1] = spl_boot_device();
+	}
+#endif
+}
+
+void reset_cpu(ulong addr) {}
+
+#ifdef CONFIG_SPL_LOAD_FIT
+int board_fit_config_name_match(const char *name)
+{
+	return 0;
+}
+#endif
+
+#ifdef CONFIG_SPL_OS_BOOT
+/* Return: 1 - boot to U-Boot. 0 - boot OS (falcon mode) */
+int spl_start_uboot(void)
+{
+	/* break into full u-boot on 'c' */
+	if (serial_tstc() && serial_getc() == 'c')
+		return 1;
+
+#ifdef CONFIG_SPL_ENV_SUPPORT
+	if (env_get_yesno("boot_os") != 1)
+		return 1;
+#endif
+	return 0;
+}
+#endif
diff --git a/drivers/misc/fsl_portals.c b/drivers/misc/fsl_portals.c
new file mode 100644
index 0000000000..159dff8281
--- /dev/null
+++ b/drivers/misc/fsl_portals.c
@@ -0,0 +1,305 @@
+/*
+ * Copyright 2008-2011 Freescale Semiconductor, Inc.
+ * Copyright 2017 NXP
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <linux/libfdt.h>
+#include <fdt_support.h>
+
+#include <asm/processor.h>
+#include <asm/io.h>
+#ifdef CONFIG_PPC
+#include <asm/fsl_portals.h>
+#include <asm/fsl_liodn.h>
+#endif
+#include <fsl_qbman.h>
+
+#define MAX_BPORTALS (CONFIG_SYS_BMAN_CINH_SIZE / CONFIG_SYS_BMAN_SP_CINH_SIZE)
+#define MAX_QPORTALS (CONFIG_SYS_QMAN_CINH_SIZE / CONFIG_SYS_QMAN_SP_CINH_SIZE)
+void setup_qbman_portals(void)
+{
+	void __iomem *bpaddr = (void *)CONFIG_SYS_BMAN_CINH_BASE +
+				CONFIG_SYS_BMAN_SWP_ISDR_REG;
+	void __iomem *qpaddr = (void *)CONFIG_SYS_QMAN_CINH_BASE +
+				CONFIG_SYS_QMAN_SWP_ISDR_REG;
+#ifdef CONFIG_PPC
+	struct ccsr_qman *qman = (void *)CONFIG_SYS_FSL_QMAN_ADDR;
+
+	/* Set the Qman initiator BAR to match the LAW (for DQRR stashing) */
+#ifdef CONFIG_PHYS_64BIT
+	out_be32(&qman->qcsp_bare, (u32)(CONFIG_SYS_QMAN_MEM_PHYS >> 32));
+#endif
+	out_be32(&qman->qcsp_bar, (u32)CONFIG_SYS_QMAN_MEM_PHYS);
+#endif
+#ifdef CONFIG_FSL_CORENET
+	int i;
+
+	for (i = 0; i < CONFIG_SYS_QMAN_NUM_PORTALS; i++) {
+		u8 sdest = qp_info[i].sdest;
+		u16 fliodn = qp_info[i].fliodn;
+		u16 dliodn = qp_info[i].dliodn;
+		u16 liodn_off = qp_info[i].liodn_offset;
+
+		out_be32(&qman->qcsp[i].qcsp_lio_cfg, (liodn_off << 16) |
+					dliodn);
+		/* set frame liodn */
+		out_be32(&qman->qcsp[i].qcsp_io_cfg, (sdest << 16) | fliodn);
+	}
+#endif
+
+	/* Change default state of BMan ISDR portals to all 1s */
+	inhibit_portals(bpaddr, CONFIG_SYS_BMAN_NUM_PORTALS, MAX_BPORTALS,
+			CONFIG_SYS_BMAN_SP_CINH_SIZE);
+	inhibit_portals(qpaddr, CONFIG_SYS_QMAN_NUM_PORTALS, MAX_QPORTALS,
+			CONFIG_SYS_QMAN_SP_CINH_SIZE);
+}
+
+void inhibit_portals(void __iomem *addr, int max_portals,
+		     int arch_max_portals, int portal_cinh_size)
+{
+	u32 val;
+	int i;
+
+	/* arch_max_portals is the maximum based on memory size. This includes
+	 * the reserved memory in the SoC.  max_portals the number of physical
+	 * portals in the SoC
+	 */
+	if (max_portals > arch_max_portals) {
+		printf("ERROR: portal config error\n");
+		max_portals = arch_max_portals;
+	}
+
+	for (i = 0; i < max_portals; i++) {
+		out_be32(addr, -1);
+		val = in_be32(addr);
+		if (!val) {
+			printf("ERROR: Stopped after %d portals\n", i);
+			return;
+		}
+		addr += portal_cinh_size;
+	}
+	debug("Cleared %d portals\n", i);
+}
+
+#ifdef CONFIG_PPC
+static int fdt_qportal(void *blob, int off, int id, char *name,
+		       enum fsl_dpaa_dev dev, int create)
+{
+	int childoff, dev_off, ret = 0;
+	u32 dev_handle;
+#ifdef CONFIG_FSL_CORENET
+	int num;
+	u32 liodns[2];
+#endif
+
+	childoff = fdt_subnode_offset(blob, off, name);
+	if (create) {
+		char handle[64], *p;
+
+		strncpy(handle, name, sizeof(handle));
+		p = strchr(handle, '@');
+		if (!strncmp(name, "fman", 4)) {
+			*p = *(p + 1);
+			p++;
+		}
+		*p = '\0';
+
+		dev_off = fdt_path_offset(blob, handle);
+		/* skip this node if alias is not found */
+		if (dev_off == -FDT_ERR_BADPATH)
+			return 0;
+		if (dev_off < 0)
+			return dev_off;
+
+		if (childoff <= 0)
+			childoff = fdt_add_subnode(blob, off, name);
+
+		/* need to update the dev_off after adding a subnode */
+		dev_off = fdt_path_offset(blob, handle);
+		if (dev_off < 0)
+			return dev_off;
+
+		if (childoff > 0) {
+			dev_handle = fdt_get_phandle(blob, dev_off);
+			if (dev_handle <= 0) {
+				dev_handle = fdt_alloc_phandle(blob);
+				ret = fdt_set_phandle(blob, dev_off,
+						      dev_handle);
+				if (ret < 0)
+					return ret;
+			}
+
+			ret = fdt_setprop(blob, childoff, "dev-handle",
+					  &dev_handle, sizeof(dev_handle));
+			if (ret < 0)
+				return ret;
+
+#ifdef CONFIG_FSL_CORENET
+			num = get_dpaa_liodn(dev, &liodns[0], id);
+			ret = fdt_setprop(blob, childoff, "fsl,liodn",
+					  &liodns[0], sizeof(u32) * num);
+			if (!strncmp(name, "pme", 3)) {
+				u32 pme_rev1, pme_rev2;
+				ccsr_pme_t *pme_regs =
+					(void *)CONFIG_SYS_FSL_CORENET_PME_ADDR;
+
+				pme_rev1 = in_be32(&pme_regs->pm_ip_rev_1);
+				pme_rev2 = in_be32(&pme_regs->pm_ip_rev_2);
+				ret = fdt_setprop(blob, childoff,
+						  "fsl,pme-rev1", &pme_rev1,
+						  sizeof(u32));
+				if (ret < 0)
+					return ret;
+				ret = fdt_setprop(blob, childoff,
+						  "fsl,pme-rev2", &pme_rev2,
+						  sizeof(u32));
+			}
+#endif
+		} else {
+			return childoff;
+		}
+	} else {
+		if (childoff > 0)
+			ret = fdt_del_node(blob, childoff);
+	}
+
+	return ret;
+}
+#endif /* CONFIG_PPC */
+
+void fdt_fixup_qportals(void *blob)
+{
+	int off, err;
+	unsigned int maj, min;
+	unsigned int ip_cfg;
+	struct ccsr_qman *qman = (void *)CONFIG_SYS_FSL_QMAN_ADDR;
+	u32 rev_1 = in_be32(&qman->ip_rev_1);
+	u32 rev_2 = in_be32(&qman->ip_rev_2);
+	char compat[64];
+	int compat_len;
+
+	maj = (rev_1 >> 8) & 0xff;
+	min = rev_1 & 0xff;
+	ip_cfg = rev_2 & 0xff;
+
+	compat_len = sprintf(compat, "fsl,qman-portal-%u.%u.%u",
+			     maj, min, ip_cfg) + 1;
+	compat_len += sprintf(compat + compat_len, "fsl,qman-portal") + 1;
+
+	off = fdt_node_offset_by_compatible(blob, -1, "fsl,qman-portal");
+	while (off != -FDT_ERR_NOTFOUND) {
+#ifdef CONFIG_PPC
+#ifdef CONFIG_FSL_CORENET
+		u32 liodns[2];
+#endif
+		const int *ci = fdt_getprop(blob, off, "cell-index", &err);
+		int i;
+
+		if (!ci)
+			goto err;
+
+		i = *ci;
+#ifdef CONFIG_SYS_DPAA_FMAN
+		int j;
+#endif
+
+#endif /* CONFIG_PPC */
+		err = fdt_setprop(blob, off, "compatible", compat, compat_len);
+		if (err < 0)
+			goto err;
+#ifdef CONFIG_PPC
+#ifdef CONFIG_FSL_CORENET
+		liodns[0] = qp_info[i].dliodn;
+		liodns[1] = qp_info[i].fliodn;
+		err = fdt_setprop(blob, off, "fsl,liodn",
+				  &liodns, sizeof(u32) * 2);
+		if (err < 0)
+			goto err;
+#endif
+
+		i++;
+
+		err = fdt_qportal(blob, off, i, "crypto@0", FSL_HW_PORTAL_SEC,
+				  IS_E_PROCESSOR(get_svr()));
+		if (err < 0)
+			goto err;
+
+#ifdef CONFIG_FSL_CORENET
+#ifdef CONFIG_SYS_DPAA_PME
+		err = fdt_qportal(blob, off, i, "pme@0", FSL_HW_PORTAL_PME, 1);
+		if (err < 0)
+			goto err;
+#else
+		fdt_qportal(blob, off, i, "pme@0", FSL_HW_PORTAL_PME, 0);
+#endif
+#endif
+
+#ifdef CONFIG_SYS_DPAA_FMAN
+		for (j = 0; j < CONFIG_SYS_NUM_FMAN; j++) {
+			char name[] = "fman@0";
+
+			name[sizeof(name) - 2] = '0' + j;
+			err = fdt_qportal(blob, off, i, name,
+					  FSL_HW_PORTAL_FMAN1 + j, 1);
+			if (err < 0)
+				goto err;
+		}
+#endif
+#ifdef CONFIG_SYS_DPAA_RMAN
+		err = fdt_qportal(blob, off, i, "rman@0",
+				  FSL_HW_PORTAL_RMAN, 1);
+		if (err < 0)
+			goto err;
+#endif
+#endif /* CONFIG_PPC */
+
+err:
+		if (err < 0) {
+			printf("ERROR: unable to create props for %s: %s\n",
+			       fdt_get_name(blob, off, NULL),
+			       fdt_strerror(err));
+			return;
+		}
+
+		off = fdt_node_offset_by_compatible(blob, off,
+						    "fsl,qman-portal");
+	}
+}
+
+void fdt_fixup_bportals(void *blob)
+{
+	int off, err;
+	unsigned int maj, min;
+	unsigned int ip_cfg;
+	struct ccsr_bman *bman = (void *)CONFIG_SYS_FSL_BMAN_ADDR;
+	u32 rev_1 = in_be32(&bman->ip_rev_1);
+	u32 rev_2 = in_be32(&bman->ip_rev_2);
+	char compat[64];
+	int compat_len;
+
+	maj = (rev_1 >> 8) & 0xff;
+	min = rev_1 & 0xff;
+
+	ip_cfg = rev_2 & 0xff;
+
+	compat_len = sprintf(compat, "fsl,bman-portal-%u.%u.%u",
+			     maj, min, ip_cfg) + 1;
+	compat_len += sprintf(compat + compat_len, "fsl,bman-portal") + 1;
+
+	off = fdt_node_offset_by_compatible(blob, -1, "fsl,bman-portal");
+	while (off != -FDT_ERR_NOTFOUND) {
+		err = fdt_setprop(blob, off, "compatible", compat, compat_len);
+		if (err < 0) {
+			printf("ERROR: unable to create props for %s: %s\n",
+			       fdt_get_name(blob, off, NULL),
+			       fdt_strerror(err));
+			return;
+		}
+
+		off = fdt_node_offset_by_compatible(blob, off,
+						    "fsl,bman-portal");
+	}
+}
diff --git a/drivers/mmc/stm32_sdmmc2.c b/drivers/mmc/stm32_sdmmc2.c
new file mode 100644
index 0000000000..bd2200a05c
--- /dev/null
+++ b/drivers/mmc/stm32_sdmmc2.c
@@ -0,0 +1,608 @@
+/*
+ * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
+ * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <fdtdec.h>
+#include <linux/libfdt.h>
+#include <mmc.h>
+#include <reset.h>
+#include <asm/io.h>
+#include <asm/gpio.h>
+#include <linux/iopoll.h>
+
+struct stm32_sdmmc2_plat {
+	struct mmc_config cfg;
+	struct mmc mmc;
+};
+
+struct stm32_sdmmc2_priv {
+	fdt_addr_t base;
+	struct clk clk;
+	struct reset_ctl reset_ctl;
+	struct gpio_desc cd_gpio;
+	u32 clk_reg_msk;
+	u32 pwr_reg_msk;
+};
+
+struct stm32_sdmmc2_ctx {
+	u32 cache_start;
+	u32 cache_end;
+	u32 data_length;
+	bool dpsm_abort;
+};
+
+/* SDMMC REGISTERS OFFSET */
+#define SDMMC_POWER		0x00	/* SDMMC power control             */
+#define SDMMC_CLKCR		0x04	/* SDMMC clock control             */
+#define SDMMC_ARG		0x08	/* SDMMC argument                  */
+#define SDMMC_CMD		0x0C	/* SDMMC command                   */
+#define SDMMC_RESP1		0x14	/* SDMMC response 1                */
+#define SDMMC_RESP2		0x18	/* SDMMC response 2                */
+#define SDMMC_RESP3		0x1C	/* SDMMC response 3                */
+#define SDMMC_RESP4		0x20	/* SDMMC response 4                */
+#define SDMMC_DTIMER		0x24	/* SDMMC data timer                */
+#define SDMMC_DLEN		0x28	/* SDMMC data length               */
+#define SDMMC_DCTRL		0x2C	/* SDMMC data control              */
+#define SDMMC_DCOUNT		0x30	/* SDMMC data counter              */
+#define SDMMC_STA		0x34	/* SDMMC status                    */
+#define SDMMC_ICR		0x38	/* SDMMC interrupt clear           */
+#define SDMMC_MASK		0x3C	/* SDMMC mask                      */
+#define SDMMC_IDMACTRL		0x50	/* SDMMC DMA control               */
+#define SDMMC_IDMABASE0		0x58	/* SDMMC DMA buffer 0 base address */
+
+/* SDMMC_POWER register */
+#define SDMMC_POWER_PWRCTRL		GENMASK(1, 0)
+#define SDMMC_POWER_VSWITCH		BIT(2)
+#define SDMMC_POWER_VSWITCHEN		BIT(3)
+#define SDMMC_POWER_DIRPOL		BIT(4)
+
+/* SDMMC_CLKCR register */
+#define SDMMC_CLKCR_CLKDIV		GENMASK(9, 0)
+#define SDMMC_CLKCR_CLKDIV_MAX		SDMMC_CLKCR_CLKDIV
+#define SDMMC_CLKCR_PWRSAV		BIT(12)
+#define SDMMC_CLKCR_WIDBUS_4		BIT(14)
+#define SDMMC_CLKCR_WIDBUS_8		BIT(15)
+#define SDMMC_CLKCR_NEGEDGE		BIT(16)
+#define SDMMC_CLKCR_HWFC_EN		BIT(17)
+#define SDMMC_CLKCR_DDR			BIT(18)
+#define SDMMC_CLKCR_BUSSPEED		BIT(19)
+#define SDMMC_CLKCR_SELCLKRX		GENMASK(21, 20)
+
+/* SDMMC_CMD register */
+#define SDMMC_CMD_CMDINDEX		GENMASK(5, 0)
+#define SDMMC_CMD_CMDTRANS		BIT(6)
+#define SDMMC_CMD_CMDSTOP		BIT(7)
+#define SDMMC_CMD_WAITRESP		GENMASK(9, 8)
+#define SDMMC_CMD_WAITRESP_0		BIT(8)
+#define SDMMC_CMD_WAITRESP_1		BIT(9)
+#define SDMMC_CMD_WAITINT		BIT(10)
+#define SDMMC_CMD_WAITPEND		BIT(11)
+#define SDMMC_CMD_CPSMEN		BIT(12)
+#define SDMMC_CMD_DTHOLD		BIT(13)
+#define SDMMC_CMD_BOOTMODE		BIT(14)
+#define SDMMC_CMD_BOOTEN		BIT(15)
+#define SDMMC_CMD_CMDSUSPEND		BIT(16)
+
+/* SDMMC_DCTRL register */
+#define SDMMC_DCTRL_DTEN		BIT(0)
+#define SDMMC_DCTRL_DTDIR		BIT(1)
+#define SDMMC_DCTRL_DTMODE		GENMASK(3, 2)
+#define SDMMC_DCTRL_DBLOCKSIZE		GENMASK(7, 4)
+#define SDMMC_DCTRL_DBLOCKSIZE_SHIFT	4
+#define SDMMC_DCTRL_RWSTART		BIT(8)
+#define SDMMC_DCTRL_RWSTOP		BIT(9)
+#define SDMMC_DCTRL_RWMOD		BIT(10)
+#define SDMMC_DCTRL_SDMMCEN		BIT(11)
+#define SDMMC_DCTRL_BOOTACKEN		BIT(12)
+#define SDMMC_DCTRL_FIFORST		BIT(13)
+
+/* SDMMC_STA register */
+#define SDMMC_STA_CCRCFAIL		BIT(0)
+#define SDMMC_STA_DCRCFAIL		BIT(1)
+#define SDMMC_STA_CTIMEOUT		BIT(2)
+#define SDMMC_STA_DTIMEOUT		BIT(3)
+#define SDMMC_STA_TXUNDERR		BIT(4)
+#define SDMMC_STA_RXOVERR		BIT(5)
+#define SDMMC_STA_CMDREND		BIT(6)
+#define SDMMC_STA_CMDSENT		BIT(7)
+#define SDMMC_STA_DATAEND		BIT(8)
+#define SDMMC_STA_DHOLD			BIT(9)
+#define SDMMC_STA_DBCKEND		BIT(10)
+#define SDMMC_STA_DABORT		BIT(11)
+#define SDMMC_STA_DPSMACT		BIT(12)
+#define SDMMC_STA_CPSMACT		BIT(13)
+#define SDMMC_STA_TXFIFOHE		BIT(14)
+#define SDMMC_STA_RXFIFOHF		BIT(15)
+#define SDMMC_STA_TXFIFOF		BIT(16)
+#define SDMMC_STA_RXFIFOF		BIT(17)
+#define SDMMC_STA_TXFIFOE		BIT(18)
+#define SDMMC_STA_RXFIFOE		BIT(19)
+#define SDMMC_STA_BUSYD0		BIT(20)
+#define SDMMC_STA_BUSYD0END		BIT(21)
+#define SDMMC_STA_SDMMCIT		BIT(22)
+#define SDMMC_STA_ACKFAIL		BIT(23)
+#define SDMMC_STA_ACKTIMEOUT		BIT(24)
+#define SDMMC_STA_VSWEND		BIT(25)
+#define SDMMC_STA_CKSTOP		BIT(26)
+#define SDMMC_STA_IDMATE		BIT(27)
+#define SDMMC_STA_IDMABTC		BIT(28)
+
+/* SDMMC_ICR register */
+#define SDMMC_ICR_CCRCFAILC		BIT(0)
+#define SDMMC_ICR_DCRCFAILC		BIT(1)
+#define SDMMC_ICR_CTIMEOUTC		BIT(2)
+#define SDMMC_ICR_DTIMEOUTC		BIT(3)
+#define SDMMC_ICR_TXUNDERRC		BIT(4)
+#define SDMMC_ICR_RXOVERRC		BIT(5)
+#define SDMMC_ICR_CMDRENDC		BIT(6)
+#define SDMMC_ICR_CMDSENTC		BIT(7)
+#define SDMMC_ICR_DATAENDC		BIT(8)
+#define SDMMC_ICR_DHOLDC		BIT(9)
+#define SDMMC_ICR_DBCKENDC		BIT(10)
+#define SDMMC_ICR_DABORTC		BIT(11)
+#define SDMMC_ICR_BUSYD0ENDC		BIT(21)
+#define SDMMC_ICR_SDMMCITC		BIT(22)
+#define SDMMC_ICR_ACKFAILC		BIT(23)
+#define SDMMC_ICR_ACKTIMEOUTC		BIT(24)
+#define SDMMC_ICR_VSWENDC		BIT(25)
+#define SDMMC_ICR_CKSTOPC		BIT(26)
+#define SDMMC_ICR_IDMATEC		BIT(27)
+#define SDMMC_ICR_IDMABTCC		BIT(28)
+#define SDMMC_ICR_STATIC_FLAGS		((GENMASK(28, 21)) | (GENMASK(11, 0)))
+
+/* SDMMC_MASK register */
+#define SDMMC_MASK_CCRCFAILIE		BIT(0)
+#define SDMMC_MASK_DCRCFAILIE		BIT(1)
+#define SDMMC_MASK_CTIMEOUTIE		BIT(2)
+#define SDMMC_MASK_DTIMEOUTIE		BIT(3)
+#define SDMMC_MASK_TXUNDERRIE		BIT(4)
+#define SDMMC_MASK_RXOVERRIE		BIT(5)
+#define SDMMC_MASK_CMDRENDIE		BIT(6)
+#define SDMMC_MASK_CMDSENTIE		BIT(7)
+#define SDMMC_MASK_DATAENDIE		BIT(8)
+#define SDMMC_MASK_DHOLDIE		BIT(9)
+#define SDMMC_MASK_DBCKENDIE		BIT(10)
+#define SDMMC_MASK_DABORTIE		BIT(11)
+#define SDMMC_MASK_TXFIFOHEIE		BIT(14)
+#define SDMMC_MASK_RXFIFOHFIE		BIT(15)
+#define SDMMC_MASK_RXFIFOFIE		BIT(17)
+#define SDMMC_MASK_TXFIFOEIE		BIT(18)
+#define SDMMC_MASK_BUSYD0ENDIE		BIT(21)
+#define SDMMC_MASK_SDMMCITIE		BIT(22)
+#define SDMMC_MASK_ACKFAILIE		BIT(23)
+#define SDMMC_MASK_ACKTIMEOUTIE		BIT(24)
+#define SDMMC_MASK_VSWENDIE		BIT(25)
+#define SDMMC_MASK_CKSTOPIE		BIT(26)
+#define SDMMC_MASK_IDMABTCIE		BIT(28)
+
+/* SDMMC_IDMACTRL register */
+#define SDMMC_IDMACTRL_IDMAEN		BIT(0)
+
+#define SDMMC_CMD_TIMEOUT		0xFFFFFFFF
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static void stm32_sdmmc2_start_data(struct stm32_sdmmc2_priv *priv,
+				    struct mmc_data *data,
+				    struct stm32_sdmmc2_ctx *ctx)
+{
+	u32 data_ctrl, idmabase0;
+
+	/* Configure the SDMMC DPSM (Data Path State Machine) */
+	data_ctrl = (__ilog2(data->blocksize) <<
+		     SDMMC_DCTRL_DBLOCKSIZE_SHIFT) &
+		    SDMMC_DCTRL_DBLOCKSIZE;
+
+	if (data->flags & MMC_DATA_READ) {
+		data_ctrl |= SDMMC_DCTRL_DTDIR;
+		idmabase0 = (u32)data->dest;
+	} else {
+		idmabase0 = (u32)data->src;
+	}
+
+	/* Set the SDMMC Data TimeOut value */
+	writel(SDMMC_CMD_TIMEOUT, priv->base + SDMMC_DTIMER);
+
+	/* Set the SDMMC DataLength value */
+	writel(ctx->data_length, priv->base + SDMMC_DLEN);
+
+	/* Write to SDMMC DCTRL */
+	writel(data_ctrl, priv->base + SDMMC_DCTRL);
+
+	/* Cache align */
+	ctx->cache_start = rounddown(idmabase0, ARCH_DMA_MINALIGN);
+	ctx->cache_end = roundup(idmabase0 + ctx->data_length,
+				 ARCH_DMA_MINALIGN);
+
+	/*
+	 * Flush data cache before DMA start (clean and invalidate)
+	 * Clean also needed for read
+	 * Avoid issue on buffer not cached-aligned
+	 */
+	flush_dcache_range(ctx->cache_start, ctx->cache_end);
+
+	/* Enable internal DMA */
+	writel(idmabase0, priv->base + SDMMC_IDMABASE0);
+	writel(SDMMC_IDMACTRL_IDMAEN, priv->base + SDMMC_IDMACTRL);
+}
+
+static void stm32_sdmmc2_start_cmd(struct stm32_sdmmc2_priv *priv,
+				   struct mmc_cmd *cmd, u32 cmd_param)
+{
+	if (readl(priv->base + SDMMC_ARG) & SDMMC_CMD_CPSMEN)
+		writel(0, priv->base + SDMMC_ARG);
+
+	cmd_param |= cmd->cmdidx | SDMMC_CMD_CPSMEN;
+	if (cmd->resp_type & MMC_RSP_PRESENT) {
+		if (cmd->resp_type & MMC_RSP_136)
+			cmd_param |= SDMMC_CMD_WAITRESP;
+		else if (cmd->resp_type & MMC_RSP_CRC)
+			cmd_param |= SDMMC_CMD_WAITRESP_0;
+		else
+			cmd_param |= SDMMC_CMD_WAITRESP_1;
+	}
+
+	/* Clear flags */
+	writel(SDMMC_ICR_STATIC_FLAGS, priv->base + SDMMC_ICR);
+
+	/* Set SDMMC argument value */
+	writel(cmd->cmdarg, priv->base + SDMMC_ARG);
+
+	/* Set SDMMC command parameters */
+	writel(cmd_param, priv->base + SDMMC_CMD);
+}
+
+static int stm32_sdmmc2_end_cmd(struct stm32_sdmmc2_priv *priv,
+				struct mmc_cmd *cmd,
+				struct stm32_sdmmc2_ctx *ctx)
+{
+	u32 mask = SDMMC_STA_CTIMEOUT;
+	u32 status;
+	int ret;
+
+	if (cmd->resp_type & MMC_RSP_PRESENT) {
+		mask |= SDMMC_STA_CMDREND;
+		if (cmd->resp_type & MMC_RSP_CRC)
+			mask |= SDMMC_STA_CCRCFAIL;
+	} else {
+		mask |= SDMMC_STA_CMDSENT;
+	}
+
+	/* Polling status register */
+	ret = readl_poll_timeout(priv->base + SDMMC_STA, status, status & mask,
+				 10000);
+
+	if (ret < 0) {
+		debug("%s: timeout reading SDMMC_STA register\n", __func__);
+		ctx->dpsm_abort = true;
+		return ret;
+	}
+
+	/* Check status */
+	if (status & SDMMC_STA_CTIMEOUT) {
+		debug("%s: error SDMMC_STA_CTIMEOUT (0x%x) for cmd %d\n",
+		      __func__, status, cmd->cmdidx);
+		ctx->dpsm_abort = true;
+		return -ETIMEDOUT;
+	}
+
+	if (status & SDMMC_STA_CCRCFAIL && cmd->resp_type & MMC_RSP_CRC) {
+		debug("%s: error SDMMC_STA_CCRCFAIL (0x%x) for cmd %d\n",
+		      __func__, status, cmd->cmdidx);
+		ctx->dpsm_abort = true;
+		return -EILSEQ;
+	}
+
+	if (status & SDMMC_STA_CMDREND && cmd->resp_type & MMC_RSP_PRESENT) {
+		cmd->response[0] = readl(priv->base + SDMMC_RESP1);
+		if (cmd->resp_type & MMC_RSP_136) {
+			cmd->response[1] = readl(priv->base + SDMMC_RESP2);
+			cmd->response[2] = readl(priv->base + SDMMC_RESP3);
+			cmd->response[3] = readl(priv->base + SDMMC_RESP4);
+		}
+	}
+
+	return 0;
+}
+
+static int stm32_sdmmc2_end_data(struct stm32_sdmmc2_priv *priv,
+				 struct mmc_cmd *cmd,
+				 struct mmc_data *data,
+				 struct stm32_sdmmc2_ctx *ctx)
+{
+	u32 mask = SDMMC_STA_DCRCFAIL | SDMMC_STA_DTIMEOUT |
+		   SDMMC_STA_IDMATE | SDMMC_STA_DATAEND;
+	u32 status;
+
+	if (data->flags & MMC_DATA_READ)
+		mask |= SDMMC_STA_RXOVERR;
+	else
+		mask |= SDMMC_STA_TXUNDERR;
+
+	status = readl(priv->base + SDMMC_STA);
+	while (!(status & mask))
+		status = readl(priv->base + SDMMC_STA);
+
+	/*
+	 * Need invalidate the dcache again to avoid any
+	 * cache-refill during the DMA operations (pre-fetching)
+	 */
+	if (data->flags & MMC_DATA_READ)
+		invalidate_dcache_range(ctx->cache_start, ctx->cache_end);
+
+	if (status & SDMMC_STA_DCRCFAIL) {
+		debug("%s: error SDMMC_STA_DCRCFAIL (0x%x) for cmd %d\n",
+		      __func__, status, cmd->cmdidx);
+		if (readl(priv->base + SDMMC_DCOUNT))
+			ctx->dpsm_abort = true;
+		return -EILSEQ;
+	}
+
+	if (status & SDMMC_STA_DTIMEOUT) {
+		debug("%s: error SDMMC_STA_DTIMEOUT (0x%x) for cmd %d\n",
+		      __func__, status, cmd->cmdidx);
+		ctx->dpsm_abort = true;
+		return -ETIMEDOUT;
+	}
+
+	if (status & SDMMC_STA_TXUNDERR) {
+		debug("%s: error SDMMC_STA_TXUNDERR (0x%x) for cmd %d\n",
+		      __func__, status, cmd->cmdidx);
+		ctx->dpsm_abort = true;
+		return -EIO;
+	}
+
+	if (status & SDMMC_STA_RXOVERR) {
+		debug("%s: error SDMMC_STA_RXOVERR (0x%x) for cmd %d\n",
+		      __func__, status, cmd->cmdidx);
+		ctx->dpsm_abort = true;
+		return -EIO;
+	}
+
+	if (status & SDMMC_STA_IDMATE) {
+		debug("%s: error SDMMC_STA_IDMATE (0x%x) for cmd %d\n",
+		      __func__, status, cmd->cmdidx);
+		ctx->dpsm_abort = true;
+		return -EIO;
+	}
+
+	return 0;
+}
+
+static int stm32_sdmmc2_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
+				 struct mmc_data *data)
+{
+	struct stm32_sdmmc2_priv *priv = dev_get_priv(dev);
+	struct stm32_sdmmc2_ctx ctx;
+	u32 cmdat = data ? SDMMC_CMD_CMDTRANS : 0;
+	int ret, retry = 3;
+
+retry_cmd:
+	ctx.data_length = 0;
+	ctx.dpsm_abort = false;
+
+	if (data) {
+		ctx.data_length = data->blocks * data->blocksize;
+		stm32_sdmmc2_start_data(priv, data, &ctx);
+	}
+
+	stm32_sdmmc2_start_cmd(priv, cmd, cmdat);
+
+	debug("%s: send cmd %d data: 0x%x @ 0x%x\n",
+	      __func__, cmd->cmdidx,
+	      data ? ctx.data_length : 0, (unsigned int)data);
+
+	ret = stm32_sdmmc2_end_cmd(priv, cmd, &ctx);
+
+	if (data && !ret)
+		ret = stm32_sdmmc2_end_data(priv, cmd, data, &ctx);
+
+	/* Clear flags */
+	writel(SDMMC_ICR_STATIC_FLAGS, priv->base + SDMMC_ICR);
+	if (data)
+		writel(0x0, priv->base + SDMMC_IDMACTRL);
+
+	/*
+	 * To stop Data Path State Machine, a stop_transmission command
+	 * shall be send on cmd or data errors.
+	 */
+	if (ctx.dpsm_abort && (cmd->cmdidx != MMC_CMD_STOP_TRANSMISSION)) {
+		struct mmc_cmd stop_cmd;
+
+		stop_cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
+		stop_cmd.cmdarg = 0;
+		stop_cmd.resp_type = MMC_RSP_R1b;
+
+		debug("%s: send STOP command to abort dpsm treatments\n",
+		      __func__);
+
+		stm32_sdmmc2_start_cmd(priv, &stop_cmd, SDMMC_CMD_CMDSTOP);
+		stm32_sdmmc2_end_cmd(priv, &stop_cmd, &ctx);
+
+		writel(SDMMC_ICR_STATIC_FLAGS, priv->base + SDMMC_ICR);
+	}
+
+	if ((ret != -ETIMEDOUT) && (ret != 0) && retry) {
+		printf("%s: cmd %d failed, retrying ...\n",
+		       __func__, cmd->cmdidx);
+		retry--;
+		goto retry_cmd;
+	}
+
+	debug("%s: end for CMD %d, ret = %d\n", __func__, cmd->cmdidx, ret);
+
+	return ret;
+}
+
+static void stm32_sdmmc2_pwron(struct stm32_sdmmc2_priv *priv)
+{
+	/* Reset */
+	reset_assert(&priv->reset_ctl);
+	udelay(2);
+	reset_deassert(&priv->reset_ctl);
+
+	udelay(1000);
+
+	/* Set Power State to ON */
+	writel(SDMMC_POWER_PWRCTRL | priv->pwr_reg_msk, priv->base + SDMMC_POWER);
+
+	/*
+	 * 1ms: required power up waiting time before starting the
+	 * SD initialization sequence
+	 */
+	udelay(1000);
+}
+
+#define IS_RISING_EDGE(reg) (reg & SDMMC_CLKCR_NEGEDGE ? 0 : 1)
+static int stm32_sdmmc2_set_ios(struct udevice *dev)
+{
+	struct mmc *mmc = mmc_get_mmc_dev(dev);
+	struct stm32_sdmmc2_priv *priv = dev_get_priv(dev);
+	struct stm32_sdmmc2_plat *plat = dev_get_platdata(dev);
+	struct mmc_config *cfg = &plat->cfg;
+	u32 desired = mmc->clock;
+	u32 sys_clock = clk_get_rate(&priv->clk);
+	u32 clk = 0;
+
+	debug("%s: bus_with = %d, clock = %d\n", __func__,
+	      mmc->bus_width, mmc->clock);
+
+	if ((mmc->bus_width == 1) && (desired == cfg->f_min))
+		stm32_sdmmc2_pwron(priv);
+
+	/*
+	 * clk_div = 0 => command and data generated on SDMMCCLK falling edge
+	 * clk_div > 0 and NEGEDGE = 0 => command and data generated on
+	 * SDMMCCLK rising edge
+	 * clk_div > 0 and NEGEDGE = 1 => command and data generated on
+	 * SDMMCCLK falling edge
+	 */
+	if (desired && ((sys_clock > desired) ||
+			IS_RISING_EDGE(priv->clk_reg_msk))) {
+		clk = DIV_ROUND_UP(sys_clock, 2 * desired);
+		if (clk > SDMMC_CLKCR_CLKDIV_MAX)
+			clk = SDMMC_CLKCR_CLKDIV_MAX;
+	}
+
+	if (mmc->bus_width == 4)
+		clk |= SDMMC_CLKCR_WIDBUS_4;
+	if (mmc->bus_width == 8)
+		clk |= SDMMC_CLKCR_WIDBUS_8;
+
+	writel(clk | priv->clk_reg_msk, priv->base + SDMMC_CLKCR);
+
+	return 0;
+}
+
+static int stm32_sdmmc2_getcd(struct udevice *dev)
+{
+	struct stm32_sdmmc2_priv *priv = dev_get_priv(dev);
+
+	debug("stm32_sdmmc2_getcd called\n");
+
+	if (dm_gpio_is_valid(&priv->cd_gpio))
+		return dm_gpio_get_value(&priv->cd_gpio);
+
+	return 1;
+}
+
+static const struct dm_mmc_ops stm32_sdmmc2_ops = {
+	.send_cmd = stm32_sdmmc2_send_cmd,
+	.set_ios = stm32_sdmmc2_set_ios,
+	.get_cd = stm32_sdmmc2_getcd,
+};
+
+static int stm32_sdmmc2_probe(struct udevice *dev)
+{
+	struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
+	struct stm32_sdmmc2_plat *plat = dev_get_platdata(dev);
+	struct stm32_sdmmc2_priv *priv = dev_get_priv(dev);
+	struct mmc_config *cfg = &plat->cfg;
+	int ret;
+
+	priv->base = dev_read_addr(dev);
+	if (priv->base == FDT_ADDR_T_NONE)
+		return -EINVAL;
+
+	if (dev_read_bool(dev, "st,negedge"))
+		priv->clk_reg_msk |= SDMMC_CLKCR_NEGEDGE;
+	if (dev_read_bool(dev, "st,dirpol"))
+		priv->pwr_reg_msk |= SDMMC_POWER_DIRPOL;
+
+	ret = clk_get_by_index(dev, 0, &priv->clk);
+	if (ret)
+		return ret;
+
+	ret = clk_enable(&priv->clk);
+	if (ret)
+		goto clk_free;
+
+	ret = reset_get_by_index(dev, 0, &priv->reset_ctl);
+	if (ret)
+		goto clk_disable;
+
+	gpio_request_by_name(dev, "cd-gpios", 0, &priv->cd_gpio,
+			     GPIOD_IS_IN);
+
+	cfg->f_min = 400000;
+	cfg->f_max = dev_read_u32_default(dev, "max-frequency", 52000000);
+	cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
+	cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
+	cfg->name = "STM32 SDMMC2";
+
+	cfg->host_caps = 0;
+	if (cfg->f_max > 25000000)
+		cfg->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
+
+	switch (dev_read_u32_default(dev, "bus-width", 1)) {
+	case 8:
+		cfg->host_caps |= MMC_MODE_8BIT;
+	case 4:
+		cfg->host_caps |= MMC_MODE_4BIT;
+		break;
+	case 1:
+		break;
+	default:
+		pr_err("invalid \"bus-width\" property, force to 1\n");
+	}
+
+	upriv->mmc = &plat->mmc;
+
+	return 0;
+
+clk_disable:
+	clk_disable(&priv->clk);
+clk_free:
+	clk_free(&priv->clk);
+
+	return ret;
+}
+
+int stm32_sdmmc_bind(struct udevice *dev)
+{
+	struct stm32_sdmmc2_plat *plat = dev_get_platdata(dev);
+
+	return mmc_bind(dev, &plat->mmc, &plat->cfg);
+}
+
+static const struct udevice_id stm32_sdmmc2_ids[] = {
+	{ .compatible = "st,stm32-sdmmc2" },
+	{ }
+};
+
+U_BOOT_DRIVER(stm32_sdmmc2) = {
+	.name = "stm32_sdmmc2",
+	.id = UCLASS_MMC,
+	.of_match = stm32_sdmmc2_ids,
+	.ops = &stm32_sdmmc2_ops,
+	.probe = stm32_sdmmc2_probe,
+	.bind = stm32_sdmmc_bind,
+	.priv_auto_alloc_size = sizeof(struct stm32_sdmmc2_priv),
+	.platdata_auto_alloc_size = sizeof(struct stm32_sdmmc2_plat),
+};
diff --git a/drivers/mtd/spi/sunxi_spi_spl.c b/drivers/mtd/spi/sunxi_spi_spl.c
index 35835c2798..fa22981316 100644
--- a/drivers/mtd/spi/sunxi_spi_spl.c
+++ b/drivers/mtd/spi/sunxi_spi_spl.c
@@ -8,7 +8,7 @@
 #include <spl.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 
 #ifdef CONFIG_SPL_OS_BOOT
 #error CONFIG_SPL_OS_BOOT is not supported yet
diff --git a/drivers/phy/sti_usb_phy.c b/drivers/phy/sti_usb_phy.c
new file mode 100644
index 0000000000..727fb8b9ba
--- /dev/null
+++ b/drivers/phy/sti_usb_phy.c
@@ -0,0 +1,181 @@
+/*
+ * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
+ * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <bitfield.h>
+#include <dm.h>
+#include <errno.h>
+#include <fdtdec.h>
+#include <generic-phy.h>
+#include <linux/libfdt.h>
+#include <regmap.h>
+#include <reset-uclass.h>
+#include <syscon.h>
+#include <wait_bit.h>
+
+#include <linux/bitops.h>
+#include <linux/compat.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* Default PHY_SEL and REFCLKSEL configuration */
+#define STIH407_USB_PICOPHY_CTRL_PORT_CONF	0x6
+
+/* ports parameters overriding */
+#define STIH407_USB_PICOPHY_PARAM_DEF		0x39a4dc
+
+#define PHYPARAM_REG	1
+#define PHYCTRL_REG	2
+#define PHYPARAM_NB	3
+
+struct sti_usb_phy {
+	struct regmap *regmap;
+	struct reset_ctl global_ctl;
+	struct reset_ctl port_ctl;
+	int param;
+	int ctrl;
+};
+
+static int sti_usb_phy_deassert(struct sti_usb_phy *phy)
+{
+	int ret;
+
+	ret = reset_deassert(&phy->global_ctl);
+	if (ret < 0) {
+		pr_err("PHY global deassert failed: %d", ret);
+		return ret;
+	}
+
+	ret = reset_deassert(&phy->port_ctl);
+	if (ret < 0)
+		pr_err("PHY port deassert failed: %d", ret);
+
+	return ret;
+}
+
+static int sti_usb_phy_init(struct phy *usb_phy)
+{
+	struct udevice *dev = usb_phy->dev;
+	struct sti_usb_phy *phy = dev_get_priv(dev);
+	void __iomem *reg;
+
+	/* set ctrl picophy value */
+	reg = (void __iomem *)phy->regmap->base + phy->ctrl;
+	/* CTRL_PORT mask is 0x1f */
+	clrsetbits_le32(reg, 0x1f, STIH407_USB_PICOPHY_CTRL_PORT_CONF);
+
+	/* set ports parameters overriding */
+	reg = (void __iomem *)phy->regmap->base + phy->param;
+	/* PARAM_DEF mask is 0xffffffff */
+	clrsetbits_le32(reg, 0xffffffff, STIH407_USB_PICOPHY_PARAM_DEF);
+
+	return sti_usb_phy_deassert(phy);
+}
+
+static int sti_usb_phy_exit(struct phy *usb_phy)
+{
+	struct udevice *dev = usb_phy->dev;
+	struct sti_usb_phy *phy = dev_get_priv(dev);
+	int ret;
+
+	ret = reset_assert(&phy->port_ctl);
+	if (ret < 0) {
+		pr_err("PHY port assert failed: %d", ret);
+		return ret;
+	}
+
+	ret = reset_assert(&phy->global_ctl);
+	if (ret < 0)
+		pr_err("PHY global assert failed: %d", ret);
+
+	return ret;
+}
+
+struct phy_ops sti_usb_phy_ops = {
+	.init = sti_usb_phy_init,
+	.exit = sti_usb_phy_exit,
+};
+
+int sti_usb_phy_probe(struct udevice *dev)
+{
+	struct sti_usb_phy *priv = dev_get_priv(dev);
+	struct udevice *syscon;
+	struct ofnode_phandle_args syscfg_phandle;
+	u32 cells[PHYPARAM_NB];
+	int ret, count;
+
+	/* get corresponding syscon phandle */
+	ret = dev_read_phandle_with_args(dev, "st,syscfg", NULL, 0, 0,
+					 &syscfg_phandle);
+
+	if (ret < 0) {
+		pr_err("Can't get syscfg phandle: %d\n", ret);
+		return ret;
+	}
+
+	ret = uclass_get_device_by_ofnode(UCLASS_SYSCON, syscfg_phandle.node,
+					  &syscon);
+	if (ret) {
+		pr_err("unable to find syscon device (%d)\n", ret);
+		return ret;
+	}
+
+	priv->regmap = syscon_get_regmap(syscon);
+	if (!priv->regmap) {
+		pr_err("unable to find regmap\n");
+		return -ENODEV;
+	}
+
+	/* get phy param offset */
+	count = fdtdec_get_int_array_count(gd->fdt_blob, dev_of_offset(dev),
+					   "st,syscfg", cells,
+					   ARRAY_SIZE(cells));
+
+	if (count < 0) {
+		pr_err("Bad PHY st,syscfg property %d\n", count);
+		return -EINVAL;
+	}
+
+	if (count > PHYPARAM_NB) {
+		pr_err("Unsupported PHY param count %d\n", count);
+		return -EINVAL;
+	}
+
+	priv->param = cells[PHYPARAM_REG];
+	priv->ctrl = cells[PHYCTRL_REG];
+
+	/* get global reset control */
+	ret = reset_get_by_name(dev, "global", &priv->global_ctl);
+	if (ret) {
+		pr_err("can't get global reset for %s (%d)", dev->name, ret);
+		return ret;
+	}
+
+	/* get port reset control */
+	ret = reset_get_by_name(dev, "port", &priv->port_ctl);
+	if (ret) {
+		pr_err("can't get port reset for %s (%d)", dev->name, ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static const struct udevice_id sti_usb_phy_ids[] = {
+	{ .compatible = "st,stih407-usb2-phy" },
+	{ }
+};
+
+U_BOOT_DRIVER(sti_usb_phy) = {
+	.name = "sti_usb_phy",
+	.id = UCLASS_PHY,
+	.of_match = sti_usb_phy_ids,
+	.probe = sti_usb_phy_probe,
+	.ops = &sti_usb_phy_ops,
+	.priv_auto_alloc_size = sizeof(struct sti_usb_phy),
+};
diff --git a/drivers/power/regulator/pwm_regulator.c b/drivers/power/regulator/pwm_regulator.c
index b719d54d3e..4582737fe1 100644
--- a/drivers/power/regulator/pwm_regulator.c
+++ b/drivers/power/regulator/pwm_regulator.c
@@ -13,6 +13,9 @@
 #include <errno.h>
 #include <pwm.h>
 #include <power/regulator.h>
+#include <linux/libfdt.h>
+#include <fdt_support.h>
+#include <fdtdec.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/usb/host/dwc3-sti-glue.c b/drivers/usb/host/dwc3-sti-glue.c
new file mode 100644
index 0000000000..ce9335e476
--- /dev/null
+++ b/drivers/usb/host/dwc3-sti-glue.c
@@ -0,0 +1,257 @@
+/*
+ * STiH407 family DWC3 specific Glue layer
+ *
+ * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
+ * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <dm.h>
+#include <errno.h>
+#include <fdtdec.h>
+#include <linux/libfdt.h>
+#include <dm/lists.h>
+#include <regmap.h>
+#include <reset-uclass.h>
+#include <syscon.h>
+#include <usb.h>
+
+#include <linux/usb/dwc3.h>
+#include <linux/usb/otg.h>
+#include <dwc3-sti-glue.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * struct sti_dwc3_glue_platdata - dwc3 STi glue driver private structure
+ * @syscfg_base:	addr for the glue syscfg
+ * @glue_base:		addr for the glue registers
+ * @syscfg_offset:	usb syscfg control offset
+ * @powerdown_ctl:	rest controller for powerdown signal
+ * @softreset_ctl:	reset controller for softreset signal
+ * @mode:		drd static host/device config
+ */
+struct sti_dwc3_glue_platdata {
+	phys_addr_t syscfg_base;
+	phys_addr_t glue_base;
+	phys_addr_t syscfg_offset;
+	struct reset_ctl powerdown_ctl;
+	struct reset_ctl softreset_ctl;
+	enum usb_dr_mode mode;
+};
+
+static int sti_dwc3_glue_drd_init(struct sti_dwc3_glue_platdata *plat)
+{
+	unsigned long val;
+
+	val = readl(plat->syscfg_base + plat->syscfg_offset);
+
+	val &= USB3_CONTROL_MASK;
+
+	switch (plat->mode) {
+	case USB_DR_MODE_PERIPHERAL:
+		val &= ~(USB3_DELAY_VBUSVALID
+			| USB3_SEL_FORCE_OPMODE | USB3_FORCE_OPMODE(0x3)
+			| USB3_SEL_FORCE_DPPULLDOWN2 | USB3_FORCE_DPPULLDOWN2
+			| USB3_SEL_FORCE_DMPULLDOWN2 | USB3_FORCE_DMPULLDOWN2);
+
+		val |= USB3_DEVICE_NOT_HOST | USB3_FORCE_VBUSVALID;
+		break;
+
+	case USB_DR_MODE_HOST:
+		val &= ~(USB3_DEVICE_NOT_HOST | USB3_FORCE_VBUSVALID
+			| USB3_SEL_FORCE_OPMODE	| USB3_FORCE_OPMODE(0x3)
+			| USB3_SEL_FORCE_DPPULLDOWN2 | USB3_FORCE_DPPULLDOWN2
+			| USB3_SEL_FORCE_DMPULLDOWN2 | USB3_FORCE_DMPULLDOWN2);
+
+		val |= USB3_DELAY_VBUSVALID;
+		break;
+
+	default:
+		pr_err("Unsupported mode of operation %d\n", plat->mode);
+		return -EINVAL;
+	}
+	writel(val, plat->syscfg_base + plat->syscfg_offset);
+
+	return 0;
+}
+
+static void sti_dwc3_glue_init(struct sti_dwc3_glue_platdata *plat)
+{
+	unsigned long reg;
+
+	reg = readl(plat->glue_base + CLKRST_CTRL);
+
+	reg |= AUX_CLK_EN | EXT_CFG_RESET_N | XHCI_REVISION;
+	reg &= ~SW_PIPEW_RESET_N;
+
+	writel(reg, plat->glue_base + CLKRST_CTRL);
+
+	/* configure mux for vbus, powerpresent and bvalid signals */
+	reg = readl(plat->glue_base + USB2_VBUS_MNGMNT_SEL1);
+
+	reg |= SEL_OVERRIDE_VBUSVALID(USB2_VBUS_UTMIOTG) |
+	       SEL_OVERRIDE_POWERPRESENT(USB2_VBUS_UTMIOTG) |
+	       SEL_OVERRIDE_BVALID(USB2_VBUS_UTMIOTG);
+
+	writel(reg, plat->glue_base + USB2_VBUS_MNGMNT_SEL1);
+
+	setbits_le32(plat->glue_base + CLKRST_CTRL, SW_PIPEW_RESET_N);
+}
+
+static int sti_dwc3_glue_ofdata_to_platdata(struct udevice *dev)
+{
+	struct sti_dwc3_glue_platdata *plat = dev_get_platdata(dev);
+	struct udevice *syscon;
+	struct regmap *regmap;
+	int ret;
+	u32 reg[4];
+
+	ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(dev),
+				   "reg", reg, ARRAY_SIZE(reg));
+	if (ret) {
+		pr_err("unable to find st,stih407-dwc3 reg property(%d)\n", ret);
+		return ret;
+	}
+
+	plat->glue_base = reg[0];
+	plat->syscfg_offset = reg[2];
+
+	/* get corresponding syscon phandle */
+	ret = uclass_get_device_by_phandle(UCLASS_SYSCON, dev, "st,syscfg",
+					   &syscon);
+	if (ret) {
+		pr_err("unable to find syscon device (%d)\n", ret);
+		return ret;
+	}
+
+	/* get syscfg-reg base address */
+	regmap = syscon_get_regmap(syscon);
+	if (!regmap) {
+		pr_err("unable to find regmap\n");
+		return -ENODEV;
+	}
+	plat->syscfg_base = regmap->base;
+
+	/* get powerdown reset */
+	ret = reset_get_by_name(dev, "powerdown", &plat->powerdown_ctl);
+	if (ret) {
+		pr_err("can't get powerdown reset for %s (%d)", dev->name, ret);
+		return ret;
+	}
+
+	/* get softreset reset */
+	ret = reset_get_by_name(dev, "softreset", &plat->softreset_ctl);
+	if (ret)
+		pr_err("can't get soft reset for %s (%d)", dev->name, ret);
+
+	return ret;
+};
+
+static int sti_dwc3_glue_bind(struct udevice *dev)
+{
+	struct sti_dwc3_glue_platdata *plat = dev_get_platdata(dev);
+	int dwc3_node;
+
+	/* check if one subnode is present */
+	dwc3_node = fdt_first_subnode(gd->fdt_blob, dev_of_offset(dev));
+	if (dwc3_node <= 0) {
+		pr_err("Can't find subnode for %s\n", dev->name);
+		return -ENODEV;
+	}
+
+	/* check if the subnode compatible string is the dwc3 one*/
+	if (fdt_node_check_compatible(gd->fdt_blob, dwc3_node,
+				      "snps,dwc3") != 0) {
+		pr_err("Can't find dwc3 subnode for %s\n", dev->name);
+		return -ENODEV;
+	}
+
+	/* retrieve the DWC3 dual role mode */
+	plat->mode = usb_get_dr_mode(dwc3_node);
+	if (plat->mode == USB_DR_MODE_UNKNOWN)
+		/* by default set dual role mode to HOST */
+		plat->mode = USB_DR_MODE_HOST;
+
+	return dm_scan_fdt_dev(dev);
+}
+
+static int sti_dwc3_glue_probe(struct udevice *dev)
+{
+	struct sti_dwc3_glue_platdata *plat = dev_get_platdata(dev);
+	int ret;
+
+	/* deassert both powerdown and softreset */
+	ret = reset_deassert(&plat->powerdown_ctl);
+	if (ret < 0) {
+		pr_err("DWC3 powerdown reset deassert failed: %d", ret);
+		return ret;
+	}
+
+	ret = reset_deassert(&plat->softreset_ctl);
+	if (ret < 0) {
+		pr_err("DWC3 soft reset deassert failed: %d", ret);
+		goto softreset_err;
+	}
+
+	ret = sti_dwc3_glue_drd_init(plat);
+	if (ret)
+		goto init_err;
+
+	sti_dwc3_glue_init(plat);
+
+	return 0;
+
+init_err:
+	ret = reset_assert(&plat->softreset_ctl);
+	if (ret < 0) {
+		pr_err("DWC3 soft reset deassert failed: %d", ret);
+		return ret;
+	}
+
+softreset_err:
+	ret = reset_assert(&plat->powerdown_ctl);
+	if (ret < 0)
+		pr_err("DWC3 powerdown reset deassert failed: %d", ret);
+
+	return ret;
+}
+
+static int sti_dwc3_glue_remove(struct udevice *dev)
+{
+	struct sti_dwc3_glue_platdata *plat = dev_get_platdata(dev);
+	int ret;
+
+	/* assert both powerdown and softreset */
+	ret = reset_assert(&plat->powerdown_ctl);
+	if (ret < 0) {
+		pr_err("DWC3 powerdown reset deassert failed: %d", ret);
+		return ret;
+	}
+
+	ret = reset_assert(&plat->softreset_ctl);
+	if (ret < 0)
+		pr_err("DWC3 soft reset deassert failed: %d", ret);
+
+	return ret;
+}
+
+static const struct udevice_id sti_dwc3_glue_ids[] = {
+	{ .compatible = "st,stih407-dwc3" },
+	{ }
+};
+
+U_BOOT_DRIVER(dwc3_sti_glue) = {
+	.name = "dwc3_sti_glue",
+	.id = UCLASS_MISC,
+	.of_match = sti_dwc3_glue_ids,
+	.ofdata_to_platdata = sti_dwc3_glue_ofdata_to_platdata,
+	.probe = sti_dwc3_glue_probe,
+	.remove = sti_dwc3_glue_remove,
+	.bind = sti_dwc3_glue_bind,
+	.platdata_auto_alloc_size = sizeof(struct sti_dwc3_glue_platdata),
+	.flags = DM_FLAG_ALLOC_PRIV_DMA,
+};
diff --git a/drivers/usb/phy/rockchip_usb2_phy.c b/drivers/usb/phy/rockchip_usb2_phy.c
index 31efee297a..faaa19f68d 100644
--- a/drivers/usb/phy/rockchip_usb2_phy.c
+++ b/drivers/usb/phy/rockchip_usb2_phy.c
@@ -11,6 +11,7 @@
 #include <fdtdec.h>
 #include <fdt_support.h>
 #include <syscon.h>
+#include <linux/libfdt.h>
 
 #include "../gadget/dwc2_udc_otg_priv.h"
 
diff --git a/include/linux/libfdt.h b/include/linux/libfdt.h
index eeb2344971..9e6eeadc40 100644
--- a/include/linux/libfdt.h
+++ b/include/linux/libfdt.h
@@ -309,4 +309,7 @@ int fdt_add_alias_regions(const void *fdt, struct fdt_region *region, int count,
 
 extern struct fdt_header *working_fdt;  /* Pointer to the working fdt */
 
+/* adding a ramdisk needs 0x44 bytes in version 2008.10 */
+#define FDT_RAMDISK_OVERHEAD	0x80
+
 #endif /* _INCLUDE_LIBFDT_H_ */

commit d84099fb1fff890155bc5b1266bb416dbdd8bcfe
Author: Marek Vasut <marex@denx.de>
Date:   Wed Feb 21 21:12:02 2018 +0100

    UPSTREAM: sf: Add ISSI IS25LP256 entry
    
    Add entry for ISSI IS25LP256 part.
    
    Change-Id: I80fbd5458f5d85b8a996dec746bf196276b9952e
    Signed-off-by: Marek Vasut <marex@denx.de>
    Cc: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 0a84925974f26023df743d2b601ab1328a485e35)

diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c
index 9f493fff9a..122a217c60 100644
--- a/drivers/mtd/spi/spi_flash_ids.c
+++ b/drivers/mtd/spi/spi_flash_ids.c
@@ -72,6 +72,7 @@ const struct spi_flash_info spi_flash_ids[] = {
 	{"is25lp032",	   INFO(0x9d6016, 0x0, 64 * 1024,    64, 0) },
 	{"is25lp064",	   INFO(0x9d6017, 0x0, 64 * 1024,   128, 0) },
 	{"is25lp128",	   INFO(0x9d6018, 0x0, 64 * 1024,   256, 0) },
+	{"is25lp256",	   INFO(0x9d6019, 0x0, 64 * 1024,   512, 0) },
 #endif
 #ifdef CONFIG_SPI_FLASH_MACRONIX	/* MACRONIX */
 	{"mx25l2006e",	   INFO(0xc22012, 0x0, 64 * 1024,     4, 0) },

commit b7922e0e0cd4ef02b25c558fa14bdf00ff54ced4
Author: Richard Weinberger <richard@nod.at>
Date:   Thu Feb 8 07:29:52 2018 +0100

    UPSTREAM: mtd: ubi: Fix worker handling
    
    Fixes a bug found on thuban boards, which were for 2 years in
    a long-term test with varying temperatures. They showed
    problems in u-boot when attaching the ubi partition:
    
    U-Boot# run flash_self_test
    Booting from nand
    set A...
    UBI: attaching mtd1 to ubi0
    UBI: scanning is finished
    data abort
    pc : [<87f97c3c>]          lr : [<87f97c28>]
    reloc pc : [<8012cc3c>]    lr : [<8012cc28>]
    sp : 85f686e8  ip : 00000020     fp : 000001f7
    r10: 8605ce40  r9 : 85f68ef8     r8 : 0001f000
    r7 : 00000001  r6 : 00000006     r5 : 0001f000  r4 : 85f6ecc0
    r3 : 00000000  r2 : 44e35000     r1 : 87fcbcd4  r0 : 87fc755b
    Flags: nZCv  IRQs off  FIQs on  Mode SVC_32
    Resetting CPU ...
    
    Reason is, that accidentially the U-Boot implementation
    from __schedule_ubi_work() did not check the flag
    ubi->thread_enabled and started with wearleveling work,
    but ubi did not have setup all structures at this point
    and crashes.
    
    Solve this problem by splitting work scheduling and processing.
    
    Change-Id: I0929e70c36da53b173cf135bd461bbf22f8e2e12
    Signed-off-by: Richard Weinberger <richard@nod.at>
    Signed-off-by: Heiko Schocher <hs@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit f82290afc84716a16a8e300d5d17702858ba84ea)

diff --git a/drivers/mtd/ubi/build.c b/drivers/mtd/ubi/build.c
index baf4e2d25b..d81bd434ac 100644
--- a/drivers/mtd/ubi/build.c
+++ b/drivers/mtd/ubi/build.c
@@ -1060,15 +1060,7 @@ int ubi_attach_mtd_dev(struct mtd_info *mtd, int ubi_num,
 #ifndef __UBOOT__
 	wake_up_process(ubi->bgt_thread);
 #else
-	/*
-	 * U-Boot special: We have no bgt_thread in U-Boot!
-	 * So just call do_work() here directly.
-	 */
-	err = do_work(ubi);
-	if (err) {
-		ubi_err(ubi, "%s: work failed with error code %d",
-			ubi->bgt_name, err);
-	}
+	ubi_do_worker(ubi);
 #endif
 
 	spin_unlock(&ubi->wl_lock);
diff --git a/drivers/mtd/ubi/ubi.h b/drivers/mtd/ubi/ubi.h
index 540f721e1b..3337201fb0 100644
--- a/drivers/mtd/ubi/ubi.h
+++ b/drivers/mtd/ubi/ubi.h
@@ -1119,6 +1119,6 @@ static inline int idx2vol_id(const struct ubi_device *ubi, int idx)
 }
 
 #ifdef __UBOOT__
-int do_work(struct ubi_device *ubi);
+void ubi_do_worker(struct ubi_device *ubi);
 #endif
 #endif /* !__UBI_UBI_H__ */
diff --git a/drivers/mtd/ubi/wl.c b/drivers/mtd/ubi/wl.c
index e823ca56f2..0de2a4a5f8 100644
--- a/drivers/mtd/ubi/wl.c
+++ b/drivers/mtd/ubi/wl.c
@@ -191,11 +191,7 @@ static void wl_entry_destroy(struct ubi_device *ubi, struct ubi_wl_entry *e)
  * This function returns zero in case of success and a negative error code in
  * case of failure.
  */
-#ifndef __UBOOT__
 static int do_work(struct ubi_device *ubi)
-#else
-int do_work(struct ubi_device *ubi)
-#endif
 {
 	int err;
 	struct ubi_work *wrk;
@@ -528,6 +524,33 @@ repeat:
 	spin_unlock(&ubi->wl_lock);
 }
 
+#ifdef __UBOOT__
+void ubi_do_worker(struct ubi_device *ubi)
+{
+	int err;
+
+	if (list_empty(&ubi->works) || ubi->ro_mode ||
+	    !ubi->thread_enabled || ubi_dbg_is_bgt_disabled(ubi))
+		return;
+
+	spin_lock(&ubi->wl_lock);
+	while (!list_empty(&ubi->works)) {
+		/*
+		 * call do_work, which executes exactly one work form the queue,
+		 * including removeing it from the work queue.
+		 */
+		spin_unlock(&ubi->wl_lock);
+		err = do_work(ubi);
+		spin_lock(&ubi->wl_lock);
+		if (err) {
+			ubi_err(ubi, "%s: work failed with error code %d",
+				ubi->bgt_name, err);
+		}
+	}
+	spin_unlock(&ubi->wl_lock);
+}
+#endif
+
 /**
  * __schedule_ubi_work - schedule a work.
  * @ubi: UBI device description object
@@ -545,17 +568,6 @@ static void __schedule_ubi_work(struct ubi_device *ubi, struct ubi_work *wrk)
 #ifndef __UBOOT__
 	if (ubi->thread_enabled && !ubi_dbg_is_bgt_disabled(ubi))
 		wake_up_process(ubi->bgt_thread);
-#else
-	int err;
-	/*
-	 * U-Boot special: We have no bgt_thread in U-Boot!
-	 * So just call do_work() here directly.
-	 */
-	err = do_work(ubi);
-	if (err) {
-		ubi_err(ubi, "%s: work failed with error code %d",
-			ubi->bgt_name, err);
-	}
 #endif
 	spin_unlock(&ubi->wl_lock);
 }
@@ -610,6 +622,10 @@ static int schedule_erase(struct ubi_device *ubi, struct ubi_wl_entry *e,
 	wl_wrk->torture = torture;
 
 	schedule_ubi_work(ubi, wl_wrk);
+
+#ifdef __UBOOT__
+	ubi_do_worker(ubi);
+#endif
 	return 0;
 }
 
@@ -1011,8 +1027,15 @@ static int ensure_wear_leveling(struct ubi_device *ubi, int nested)
 	wrk->func = &wear_leveling_worker;
 	if (nested)
 		__schedule_ubi_work(ubi, wrk);
+#ifndef __UBOOT__
 	else
 		schedule_ubi_work(ubi, wrk);
+#else
+	else {
+		schedule_ubi_work(ubi, wrk);
+		ubi_do_worker(ubi);
+	}
+#endif
 	return err;
 
 out_cancel:

commit 6a35a5ca77e940616bd72270e1f78af3fda118ac
Author: Adam Ford <aford173@gmail.com>
Date:   Tue Feb 6 08:34:45 2018 -0600

    UPSTREAM: Convert CONFIG_APBH_DMA et al to Kconfig
    
    This converts the following to Kconfig:
       CONFIG_APBH_DMA
       CONFIG_APBH_DMA_BURST
       CONFIG_APBH_DMA_BURST8
    
    Signed-off-by: Adam Ford <aford173@gmail.com>
    Reviewed-by: Stefan Agner <stefan.agner@toradex.com>
    [trini: Add in MMC as well]
    Change-Id: I45b919ab747aa414ba23f1e165c11dd8aff44c44
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 99bec1aead5927c54f4364bfe10823a86fe0dad2)

diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index 1b92c7789d..4ee6afad35 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -19,4 +19,19 @@ config TI_EDMA3
 	  This driver support data transfer between memory
 	  regions.
 
+config APBH_DMA
+	bool "Support APBH DMA"
+	depends on MX23 || MX28 || MX6 || MX7
+	help
+	  Enable APBH DMA driver.
+
+if APBH_DMA
+config APBH_DMA_BURST
+	bool "Enable DMA BURST"
+
+config APBH_DMA_BURST8
+	bool "Enable DMA BURST8"
+
+endif
+
 endmenu # menu "DMA Support"
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 6de927b8c6..689c184256 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -119,6 +119,10 @@ config MMC_MXC
 
 config MMC_MXS
 	bool "Freescale MXS Multimedia Card Interface support"
+	depends on MX23 || MX28 || MX6 || MX7
+	select APBH_DMA
+	select APBH_DMA_BURST if ARCH_MX6 || ARCH_MX7
+	select APBH_DMA_BURST8 if ARCH_MX6 || ARCH_MX7
 	help
 	  This selects the Freescale SSP MMC controller found on MXS based
 	  platforms like mx23/28.
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index a347d1c833..f8c37d47b0 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -165,6 +165,9 @@ config NAND_MXS
 	bool "MXS NAND support"
 	depends on MX23 || MX28 || MX6 || MX7
 	imply CMD_NAND
+	select APBH_DMA
+	select APBH_DMA_BURST if ARCH_MX6 || ARCH_MX7
+	select APBH_DMA_BURST8 if ARCH_MX6 || ARCH_MX7
 	help
 	  This enables NAND driver for the NAND flash controller on the
 	  MXS processors.
diff --git a/include/configs/aristainetos-common.h b/include/configs/aristainetos-common.h
index fe838813c0..3a72b24cd8 100644
--- a/include/configs/aristainetos-common.h
+++ b/include/configs/aristainetos-common.h
@@ -182,9 +182,6 @@
 #define CONFIG_SYS_NAND_ONFI_DETECTION
 
 /* DMA stuff, needed for GPMI/MXS NAND support */
-#define CONFIG_APBH_DMA
-#define CONFIG_APBH_DMA_BURST
-#define CONFIG_APBH_DMA_BURST8
 
 /* RTC */
 #define CONFIG_SYS_I2C_RTC_ADDR	0x68
diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h
index 7d12233c1a..ad70281436 100644
--- a/include/configs/cm_fx6.h
+++ b/include/configs/cm_fx6.h
@@ -177,9 +177,6 @@
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #define CONFIG_SYS_NAND_ONFI_DETECTION
 /* APBH DMA is required for NAND support */
-#define CONFIG_APBH_DMA
-#define CONFIG_APBH_DMA_BURST
-#define CONFIG_APBH_DMA_BURST8
 #endif
 
 /* Ethernet */
diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h
index 68dfcc2170..59afa2f112 100644
--- a/include/configs/colibri_imx7.h
+++ b/include/configs/colibri_imx7.h
@@ -177,9 +177,6 @@
 				"-(ubi)"
 
 /* DMA stuff, needed for GPMI/MXS NAND support */
-#define CONFIG_APBH_DMA
-#define CONFIG_APBH_DMA_BURST
-#define CONFIG_APBH_DMA_BURST8
 
 /* USB Configs */
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index 2df4d58f89..d7a4a708a1 100644
--- a/include/configs/gw_ventana.h
+++ b/include/configs/gw_ventana.h
@@ -73,9 +73,6 @@
   #define CONFIG_SYS_NAND_ONFI_DETECTION
 
   /* DMA stuff, needed for GPMI/MXS NAND support */
-  #define CONFIG_APBH_DMA
-  #define CONFIG_APBH_DMA_BURST
-  #define CONFIG_APBH_DMA_BURST8
 #endif
 
 #endif /* CONFIG_SPI_FLASH */
diff --git a/include/configs/imx6-engicam.h b/include/configs/imx6-engicam.h
index a1b7036156..7c302c2faf 100644
--- a/include/configs/imx6-engicam.h
+++ b/include/configs/imx6-engicam.h
@@ -161,13 +161,6 @@
 /* MTD device */
 # define CONFIG_MTD_DEVICE
 # define CONFIG_MTD_PARTITIONS
-# define MTDIDS_DEFAULT			"nand0=gpmi-nand"
-# define MTDPARTS_DEFAULT		"mtdparts=gpmi-nand:2m(spl),2m(uboot)," \
-					"1m(env),8m(kernel),1m(dtb),-(rootfs)"
-
-# define CONFIG_APBH_DMA
-# define CONFIG_APBH_DMA_BURST
-# define CONFIG_APBH_DMA_BURST8
 #endif
 
 /* Ethernet */
diff --git a/include/configs/imx6_logic.h b/include/configs/imx6_logic.h
index c1e9f5d042..8b2c645113 100644
--- a/include/configs/imx6_logic.h
+++ b/include/configs/imx6_logic.h
@@ -159,9 +159,6 @@
 					"1m(env),16m(kernel),1m(dtb),-(fs)"
 
 /* DMA stuff, needed for GPMI/MXS NAND support */
-#define CONFIG_APBH_DMA
-#define CONFIG_APBH_DMA_BURST
-#define CONFIG_APBH_DMA_BURST8
 
 /* EEPROM  contains serial no, MAC addr and other Logic PD info */
 #define CONFIG_I2C_EEPROM
diff --git a/include/configs/mx6sabreauto.h b/include/configs/mx6sabreauto.h
index 9982685f67..bba15a7943 100644
--- a/include/configs/mx6sabreauto.h
+++ b/include/configs/mx6sabreauto.h
@@ -72,9 +72,6 @@
 #define CONFIG_SYS_NAND_ONFI_DETECTION
 
 /* DMA stuff, needed for GPMI/MXS NAND support */
-#define CONFIG_APBH_DMA
-#define CONFIG_APBH_DMA_BURST
-#define CONFIG_APBH_DMA_BURST8
 
 /* PMIC */
 #define CONFIG_POWER
diff --git a/include/configs/mx6sxsabreauto.h b/include/configs/mx6sxsabreauto.h
index 02d6acf47e..06e416bb59 100644
--- a/include/configs/mx6sxsabreauto.h
+++ b/include/configs/mx6sxsabreauto.h
@@ -125,9 +125,6 @@
 #define CONFIG_SYS_NAND_ONFI_DETECTION
 
 /* DMA stuff, needed for GPMI/MXS NAND support */
-#define CONFIG_APBH_DMA
-#define CONFIG_APBH_DMA_BURST
-#define CONFIG_APBH_DMA_BURST8
 
 /* Network */
 
diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h
index 593bf38d7e..14d0ba88e2 100644
--- a/include/configs/mx7dsabresd.h
+++ b/include/configs/mx7dsabresd.h
@@ -197,9 +197,6 @@
 #define CONFIG_SYS_NAND_ONFI_DETECTION
 
 /* DMA stuff, needed for GPMI/MXS NAND support */
-#define CONFIG_APBH_DMA
-#define CONFIG_APBH_DMA_BURST
-#define CONFIG_APBH_DMA_BURST8
 #endif
 
 #define CONFIG_ENV_OFFSET		(12 * SZ_64K)
diff --git a/include/configs/mxs.h b/include/configs/mxs.h
index 418728cde9..31020ed229 100644
--- a/include/configs/mxs.h
+++ b/include/configs/mxs.h
@@ -99,7 +99,6 @@
  */
 
 /* APBH DMA */
-#define CONFIG_APBH_DMA
 
 /* GPIO */
 #define CONFIG_MXS_GPIO
diff --git a/include/configs/pcm058.h b/include/configs/pcm058.h
index d2fc124e35..e3f419b1de 100644
--- a/include/configs/pcm058.h
+++ b/include/configs/pcm058.h
@@ -65,9 +65,6 @@
 #endif
 
 /* DMA stuff, needed for GPMI/MXS NAND support */
-#define CONFIG_APBH_DMA
-#define CONFIG_APBH_DMA_BURST
-#define CONFIG_APBH_DMA_BURST8
 
 /* Filesystem support */
 #define CONFIG_MTD_PARTITIONS
diff --git a/include/configs/pfla02.h b/include/configs/pfla02.h
index bf1bcd2e6a..e12887010a 100644
--- a/include/configs/pfla02.h
+++ b/include/configs/pfla02.h
@@ -64,9 +64,6 @@
 #endif
 
 /* DMA stuff, needed for GPMI/MXS NAND support */
-#define CONFIG_APBH_DMA
-#define CONFIG_APBH_DMA_BURST
-#define CONFIG_APBH_DMA_BURST8
 
 /* Filesystem support */
 #define CONFIG_MTD_PARTITIONS
diff --git a/include/configs/platinum.h b/include/configs/platinum.h
index 402f139c70..4d7258aedb 100644
--- a/include/configs/platinum.h
+++ b/include/configs/platinum.h
@@ -75,9 +75,6 @@
 #define CONFIG_SYS_NAND_ONFI_DETECTION
 
 /* DMA config, needed for GPMI/MXS NAND support */
-#define CONFIG_APBH_DMA
-#define CONFIG_APBH_DMA_BURST
-#define CONFIG_APBH_DMA_BURST8
 
 /* Environment in NAND */
 #define CONFIG_ENV_OFFSET		(16 << 20)
diff --git a/include/configs/titanium.h b/include/configs/titanium.h
index c206b56388..fedd16c87d 100644
--- a/include/configs/titanium.h
+++ b/include/configs/titanium.h
@@ -152,9 +152,6 @@
 #define CONFIG_SYS_NAND_ONFI_DETECTION
 
 /* DMA stuff, needed for GPMI/MXS NAND support */
-#define CONFIG_APBH_DMA
-#define CONFIG_APBH_DMA_BURST
-#define CONFIG_APBH_DMA_BURST8
 
 /* Environment in NAND */
 #define CONFIG_ENV_OFFSET		(16 << 20)
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index d80cfe3509..cad756019d 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -37,10 +37,6 @@ CONFIG_AM437X_USB2PHY2_HOST
 CONFIG_AMCORE
 CONFIG_ANDES_PCU
 CONFIG_ANDES_PCU_BASE
-CONFIG_AP325RXA
-CONFIG_APBH_DMA
-CONFIG_APBH_DMA_BURST
-CONFIG_APBH_DMA_BURST8
 CONFIG_APER_0_BASE
 CONFIG_APER_1_BASE
 CONFIG_APER_SIZE

commit fd70bba7169b7ebb66cb63d6c479f572589f0d91
Author: Stefan Agner <stefan.agner@toradex.com>
Date:   Tue Feb 6 09:44:37 2018 +0100

    UPSTREAM: Convert CONFIG_NAND_MXS to Kconfig
    
    This converts CONFIG_NAND_MXS to Kconfig.
    
    Change-Id: I217ef77c1e7a11072e08f84d2ab4720e98df9b3f
    Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit c87c81186cf7e5073dbc7c5f46ad256a84f5ed22)

diff --git a/configs/apx4devkit_defconfig b/configs/apx4devkit_defconfig
index 9a35238e21..0581668b85 100644
--- a/configs/apx4devkit_defconfig
+++ b/configs/apx4devkit_defconfig
@@ -14,7 +14,6 @@ CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_DHCP=y
@@ -26,6 +25,8 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_UBI=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_MMC_MXS=y
+CONFIG_NAND=y
+CONFIG_NAND_MXS=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/aristainetos2_defconfig b/configs/aristainetos2_defconfig
index 8f76e2b31b..4498ee790c 100644
--- a/configs/aristainetos2_defconfig
+++ b/configs/aristainetos2_defconfig
@@ -16,7 +16,6 @@ CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
 CONFIG_CMD_NAND_TRIMFFS=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
@@ -33,6 +32,8 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_CMD_UBI=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_NAND=y
+CONFIG_NAND_MXS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_MTD_UBI_FASTMAP=y
diff --git a/configs/aristainetos2b_defconfig b/configs/aristainetos2b_defconfig
index 829c00f942..a3f801b5e2 100644
--- a/configs/aristainetos2b_defconfig
+++ b/configs/aristainetos2b_defconfig
@@ -16,7 +16,6 @@ CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
 CONFIG_CMD_NAND_TRIMFFS=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
@@ -33,6 +32,8 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_CMD_UBI=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_NAND=y
+CONFIG_NAND_MXS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_MTD_UBI_FASTMAP=y
diff --git a/configs/aristainetos_defconfig b/configs/aristainetos_defconfig
index 253202c621..dab647e71f 100644
--- a/configs/aristainetos_defconfig
+++ b/configs/aristainetos_defconfig
@@ -16,7 +16,6 @@ CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
 CONFIG_CMD_NAND_TRIMFFS=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
@@ -33,6 +32,8 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_CMD_UBI=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_NAND=y
+CONFIG_NAND_MXS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_MTD_UBI_FASTMAP=y
diff --git a/configs/bg0900_defconfig b/configs/bg0900_defconfig
index 24e8bbde17..0410e5eeba 100644
--- a/configs/bg0900_defconfig
+++ b/configs/bg0900_defconfig
@@ -17,7 +17,6 @@ CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_GPIO=y
-CONFIG_CMD_NAND=y
 CONFIG_CMD_NAND_TRIMFFS=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
@@ -27,6 +26,8 @@ CONFIG_CMD_PING=y
 CONFIG_CMD_CACHE=y
 CONFIG_DOS_PARTITION=y
 # CONFIG_MMC is not set
+CONFIG_NAND=y
+CONFIG_NAND_MXS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig
index 540d662dd1..acb6f5ce58 100644
--- a/configs/cm_fx6_defconfig
+++ b/configs/cm_fx6_defconfig
@@ -19,10 +19,7 @@ CONFIG_BOOTDELAY=3
 CONFIG_SPL=y
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x80
 CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="CM-FX6 # "
-CONFIG_CMD_BOOTZ=y
-# CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_XIMG is not set
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_EEPROM=y
@@ -35,24 +32,19 @@ CONFIG_CMD_I2C=y
 # CONFIG_CMD_LOADB is not set
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
 CONFIG_CMD_SATA=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PING=y
 CONFIG_CMD_BMP=y
 CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
 CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_OF_CONTROL=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_DM_MMC=y
+CONFIG_NAND=y
+CONFIG_NAND_MXS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_EON=y
diff --git a/configs/colibri_imx7_defconfig b/configs/colibri_imx7_defconfig
index d0b6c68146..55b13ff279 100644
--- a/configs/colibri_imx7_defconfig
+++ b/configs/colibri_imx7_defconfig
@@ -25,7 +25,6 @@ CONFIG_CMD_DFU=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
 CONFIG_CMD_NAND_TRIMFFS=y
 CONFIG_CMD_NAND_TORTURE=y
 CONFIG_CMD_USB=y
@@ -45,6 +44,8 @@ CONFIG_ENV_IS_IN_NAND=y
 CONFIG_DFU_MMC=y
 CONFIG_DM_GPIO=y
 CONFIG_DM_I2C=y
+CONFIG_NAND=y
+CONFIG_NAND_MXS=y
 CONFIG_MTD_UBI_FASTMAP=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig
index aaedf93eea..9e3f710b58 100644
--- a/configs/gwventana_nand_defconfig
+++ b/configs/gwventana_nand_defconfig
@@ -38,7 +38,6 @@ CONFIG_CMD_SPL_WRITE_SIZE=0x20000
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
 CONFIG_CMD_NAND_TRIMFFS=y
 CONFIG_CMD_PCI=y
 CONFIG_CMD_USB=y
@@ -56,6 +55,9 @@ CONFIG_CMD_FS_GENERIC=y
 CONFIG_CMD_UBI=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_DM=y
+CONFIG_DWC_AHSATA=y
+CONFIG_NAND=y
+CONFIG_NAND_MXS=y
 CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
diff --git a/configs/m28evk_defconfig b/configs/m28evk_defconfig
index 94c205ec00..b25344904f 100644
--- a/configs/m28evk_defconfig
+++ b/configs/m28evk_defconfig
@@ -23,7 +23,6 @@ CONFIG_CMD_GREPENV=y
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
 CONFIG_CMD_NAND_TRIMFFS=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
@@ -41,6 +40,8 @@ CONFIG_CMD_FS_GENERIC=y
 CONFIG_CMD_UBI=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_MMC_MXS=y
+CONFIG_NAND=y
+CONFIG_NAND_MXS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_USB=y
diff --git a/configs/mx28evk_auart_console_defconfig b/configs/mx28evk_auart_console_defconfig
index c53cc59f14..bd0d3adea3 100644
--- a/configs/mx28evk_auart_console_defconfig
+++ b/configs/mx28evk_auart_console_defconfig
@@ -19,7 +19,6 @@ CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
 CONFIG_CMD_NAND_TRIMFFS=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
@@ -37,6 +36,8 @@ CONFIG_CMD_FS_GENERIC=y
 CONFIG_CMD_UBI=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_MMC_MXS=y
+CONFIG_NAND=y
+CONFIG_NAND_MXS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_USB=y
diff --git a/configs/mx28evk_defconfig b/configs/mx28evk_defconfig
index 999cb3482b..aab99326ca 100644
--- a/configs/mx28evk_defconfig
+++ b/configs/mx28evk_defconfig
@@ -19,7 +19,6 @@ CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
 CONFIG_CMD_NAND_TRIMFFS=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
@@ -37,6 +36,8 @@ CONFIG_CMD_FS_GENERIC=y
 CONFIG_CMD_UBI=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_MMC_MXS=y
+CONFIG_NAND=y
+CONFIG_NAND_MXS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_USB=y
diff --git a/configs/mx28evk_nand_defconfig b/configs/mx28evk_nand_defconfig
index 324d5666d6..44e0b6f8e8 100644
--- a/configs/mx28evk_nand_defconfig
+++ b/configs/mx28evk_nand_defconfig
@@ -18,7 +18,6 @@ CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
 CONFIG_CMD_NAND_TRIMFFS=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
@@ -36,6 +35,8 @@ CONFIG_CMD_FS_GENERIC=y
 CONFIG_CMD_UBI=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_MMC_MXS=y
+CONFIG_NAND=y
+CONFIG_NAND_MXS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_USB=y
diff --git a/configs/mx28evk_spi_defconfig b/configs/mx28evk_spi_defconfig
index 3dfb540987..a72153f026 100644
--- a/configs/mx28evk_spi_defconfig
+++ b/configs/mx28evk_spi_defconfig
@@ -18,7 +18,6 @@ CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
 CONFIG_CMD_NAND_TRIMFFS=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
@@ -36,6 +35,8 @@ CONFIG_CMD_FS_GENERIC=y
 CONFIG_CMD_UBI=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_MMC_MXS=y
+CONFIG_NAND=y
+CONFIG_NAND_MXS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_USB=y
diff --git a/configs/mx6sabreauto_defconfig b/configs/mx6sabreauto_defconfig
index 8283189315..fd236ea0a4 100644
--- a/configs/mx6sabreauto_defconfig
+++ b/configs/mx6sabreauto_defconfig
@@ -25,7 +25,6 @@ CONFIG_CMD_DFU=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
 CONFIG_CMD_NAND_TRIMFFS=y
 CONFIG_CMD_PART=y
 CONFIG_CMD_SF=y
@@ -42,6 +41,8 @@ CONFIG_CMD_FS_GENERIC=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_DFU_MMC=y
 CONFIG_DFU_SF=y
+CONFIG_NAND=y
+CONFIG_NAND_MXS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
diff --git a/configs/mx6sxsabreauto_defconfig b/configs/mx6sxsabreauto_defconfig
index 5ae12d45bd..216884a757 100644
--- a/configs/mx6sxsabreauto_defconfig
+++ b/configs/mx6sxsabreauto_defconfig
@@ -12,7 +12,6 @@ CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
 CONFIG_CMD_NAND_TRIMFFS=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
@@ -34,6 +33,8 @@ CONFIG_DM_GPIO=y
 CONFIG_DM_PCA953X=y
 CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
+CONFIG_NAND=y
+CONFIG_NAND_MXS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/pcm058_defconfig b/configs/pcm058_defconfig
index c219ee4844..4e276920f4 100644
--- a/configs/pcm058_defconfig
+++ b/configs/pcm058_defconfig
@@ -27,7 +27,6 @@ CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
 CONFIG_CMD_NAND_TRIMFFS=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_DHCP=y
@@ -47,6 +46,8 @@ CONFIG_EFI_PARTITION=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_DM=y
 CONFIG_MTD=y
+CONFIG_NAND=y
+CONFIG_NAND_MXS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
diff --git a/configs/pfla02_defconfig b/configs/pfla02_defconfig
index bcd83edebb..14e385ef34 100644
--- a/configs/pfla02_defconfig
+++ b/configs/pfla02_defconfig
@@ -27,6 +27,7 @@ CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
+# CONFIG_CMD_NAND is not set
 CONFIG_CMD_SF=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_MII=y
@@ -44,6 +45,8 @@ CONFIG_EFI_PARTITION=y
 # CONFIG_SPL_PARTITION_UUIDS is not set
 CONFIG_DM=y
 CONFIG_MTD=y
+CONFIG_NAND=y
+CONFIG_NAND_MXS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
diff --git a/configs/platinum_picon_defconfig b/configs/platinum_picon_defconfig
index d9f65c21de..f258093d46 100644
--- a/configs/platinum_picon_defconfig
+++ b/configs/platinum_picon_defconfig
@@ -24,7 +24,6 @@ CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
 CONFIG_CMD_NAND_TRIMFFS=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
@@ -40,6 +39,8 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_CMD_UBI=y
 CONFIG_ENV_IS_IN_NAND=y
+CONFIG_NAND=y
+CONFIG_NAND_MXS=y
 CONFIG_PHYLIB=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/platinum_titanium_defconfig b/configs/platinum_titanium_defconfig
index 5cf8d9ebe6..dfba561354 100644
--- a/configs/platinum_titanium_defconfig
+++ b/configs/platinum_titanium_defconfig
@@ -24,7 +24,6 @@ CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
 CONFIG_CMD_NAND_TRIMFFS=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
@@ -40,6 +39,8 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_CMD_UBI=y
 CONFIG_ENV_IS_IN_NAND=y
+CONFIG_NAND=y
+CONFIG_NAND_MXS=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
 CONFIG_PHY_MICREL_KSZ90X1=y
diff --git a/configs/titanium_defconfig b/configs/titanium_defconfig
index a2197b59bc..8b824a5884 100644
--- a/configs/titanium_defconfig
+++ b/configs/titanium_defconfig
@@ -12,7 +12,6 @@ CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
 CONFIG_CMD_NAND_TRIMFFS=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
@@ -28,6 +27,8 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_CMD_UBI=y
 CONFIG_ENV_IS_IN_NAND=y
+CONFIG_NAND=y
+CONFIG_NAND_MXS=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
 CONFIG_PHY_MICREL_KSZ90X1=y
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index ccd2707871..a347d1c833 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -163,7 +163,7 @@ config NAND_MXC
 
 config NAND_MXS
 	bool "MXS NAND support"
-	depends on MX6 || MX7
+	depends on MX23 || MX28 || MX6 || MX7
 	imply CMD_NAND
 	help
 	  This enables NAND driver for the NAND flash controller on the
diff --git a/include/configs/aristainetos-common.h b/include/configs/aristainetos-common.h
index d24d564d48..fe838813c0 100644
--- a/include/configs/aristainetos-common.h
+++ b/include/configs/aristainetos-common.h
@@ -176,7 +176,6 @@
 #define CONFIG_SYS_I2C_NOPROBES		{ {0, 0x00} }
 
 /* NAND stuff */
-#define CONFIG_NAND_MXS
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #define CONFIG_SYS_NAND_BASE		0x40000000
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h
index 2d6132df9b..7d12233c1a 100644
--- a/include/configs/cm_fx6.h
+++ b/include/configs/cm_fx6.h
@@ -175,7 +175,6 @@
 #define CONFIG_SYS_NAND_BASE		0x40000000
 #define CONFIG_SYS_NAND_MAX_CHIPS	1
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
-#define CONFIG_NAND_MXS
 #define CONFIG_SYS_NAND_ONFI_DETECTION
 /* APBH DMA is required for NAND support */
 #define CONFIG_APBH_DMA
diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h
index 30a2d1286b..68dfcc2170 100644
--- a/include/configs/colibri_imx7.h
+++ b/include/configs/colibri_imx7.h
@@ -158,8 +158,6 @@
 #define CONFIG_ENV_SIZE			CONFIG_ENV_SECT_SIZE
 #endif
 
-#define CONFIG_NAND_MXS
-
 /* NAND stuff */
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #define CONFIG_SYS_NAND_BASE		0x40000000
diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index 9c26059a06..2df4d58f89 100644
--- a/include/configs/gw_ventana.h
+++ b/include/configs/gw_ventana.h
@@ -67,7 +67,6 @@
 #elif defined(CONFIG_SPL_NAND_SUPPORT)
 /* Enable NAND support */
 #ifdef CONFIG_CMD_NAND
-  #define CONFIG_NAND_MXS
   #define CONFIG_SYS_MAX_NAND_DEVICE	1
   #define CONFIG_SYS_NAND_BASE		0x40000000
   #define CONFIG_SYS_NAND_5_ADDR_CYCLE
diff --git a/include/configs/mx6sabreauto.h b/include/configs/mx6sabreauto.h
index 64d54b6751..9982685f67 100644
--- a/include/configs/mx6sabreauto.h
+++ b/include/configs/mx6sabreauto.h
@@ -66,7 +66,6 @@
 #define CONFIG_SYS_I2C_SPEED		100000
 
 /* NAND stuff */
-#define CONFIG_NAND_MXS
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_BASE           0x40000000
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
diff --git a/include/configs/mx6sxsabreauto.h b/include/configs/mx6sxsabreauto.h
index 9e46c397a4..02d6acf47e 100644
--- a/include/configs/mx6sxsabreauto.h
+++ b/include/configs/mx6sxsabreauto.h
@@ -119,7 +119,6 @@
 #define CONFIG_SYS_I2C_SPEED		  100000
 
 /* NAND stuff */
-#define CONFIG_NAND_MXS
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_BASE           0x40000000
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
diff --git a/include/configs/mxs.h b/include/configs/mxs.h
index 804b9e199c..418728cde9 100644
--- a/include/configs/mxs.h
+++ b/include/configs/mxs.h
@@ -137,7 +137,6 @@
 
 /* NAND */
 #ifdef CONFIG_CMD_NAND
-#define CONFIG_NAND_MXS
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #define CONFIG_SYS_NAND_BASE		0x60000000
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
diff --git a/include/configs/pcm058.h b/include/configs/pcm058.h
index 2c1221d085..d2fc124e35 100644
--- a/include/configs/pcm058.h
+++ b/include/configs/pcm058.h
@@ -58,7 +58,6 @@
 
 #ifndef CONFIG_SPL_BUILD
 /* Enable NAND support */
-#define CONFIG_NAND_MXS
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #define CONFIG_SYS_NAND_BASE		0x40000000
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
diff --git a/include/configs/pfla02.h b/include/configs/pfla02.h
index be90ce9bff..bf1bcd2e6a 100644
--- a/include/configs/pfla02.h
+++ b/include/configs/pfla02.h
@@ -57,7 +57,6 @@
 #define CONFIG_CMD_NAND
 /* Enable NAND support */
 #define CONFIG_CMD_NAND_TRIMFFS
-#define CONFIG_NAND_MXS
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #define CONFIG_SYS_NAND_BASE		0x40000000
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
diff --git a/include/configs/platinum.h b/include/configs/platinum.h
index bb0e929404..402f139c70 100644
--- a/include/configs/platinum.h
+++ b/include/configs/platinum.h
@@ -66,7 +66,6 @@
 #ifdef CONFIG_CMD_NAND
 
 /* NAND config */
-#define CONFIG_NAND_MXS
 #ifndef CONFIG_SYS_NAND_MAX_CHIPS
 #define CONFIG_SYS_NAND_MAX_CHIPS		2
 #endif
diff --git a/include/configs/titanium.h b/include/configs/titanium.h
index 882b1d7f5f..c206b56388 100644
--- a/include/configs/titanium.h
+++ b/include/configs/titanium.h
@@ -146,7 +146,6 @@
 #ifdef CONFIG_CMD_NAND
 
 /* NAND stuff */
-#define CONFIG_NAND_MXS
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #define CONFIG_SYS_NAND_BASE		0x40000000
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE

commit 3494d6cca60320c75b3a7b05ccbc3db4b6681f60
Author: Martin Townsend <mtownsend1973@gmail.com>
Date:   Thu Jan 18 08:07:33 2018 +0000

    UPSTREAM: ubi: Ensure no fastmap flush after uif_close
    
    On detach UBI attempts to update fastmap after closing user interfaces
    but at this point UBI volumes have already been free()'ed and fastmap
    can no longer access these data structures.
    
    Change-Id: I580c53b74539cd76d328e15c7c49ec54b5d67bf9
    Signed-off-by: Martin Townsend <mtownsend1973@gmail.com>
    Cc: hs@denx.de
    Cc: kmpark@infradead.org
    Cc: richard@sigma-star.at
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 2d2d306f79e5ae090790fd380662f5407ccace11)

diff --git a/drivers/mtd/ubi/fastmap-wl.c b/drivers/mtd/ubi/fastmap-wl.c
index a33d4063e0..b7876a81cb 100644
--- a/drivers/mtd/ubi/fastmap-wl.c
+++ b/drivers/mtd/ubi/fastmap-wl.c
@@ -337,11 +337,6 @@ static void ubi_fastmap_close(struct ubi_device *ubi)
 {
 	int i;
 
-#ifndef __UBOOT__
-	flush_work(&ubi->fm_work);
-#else
-	update_fastmap_work_fn(ubi);
-#endif
 	return_unused_pool_pebs(ubi, &ubi->fm_pool);
 	return_unused_pool_pebs(ubi, &ubi->fm_wl_pool);
 

commit 55bb5553263a166a9710922892c1492e169d840b
Author: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Date:   Mon Jan 15 12:48:12 2018 -0300

    UPSTREAM: nand: arasan: Select CONFIG_SYS_NAND_SELF_INIT
    
    The Arasan NFC driver requires the self-init mode,
    so it should select it.
    
    Instead of having the config header define the macro,
    it's cleaner to select the option at the Kconfig level.
    
    Change-Id: I7071edaf3c1bc6defd7772319c15a15df2030938
    Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
    Signed-off-by: Michal Simek <michal.simek@xilinx.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit d55c8159bddd133610e18174b4c4d02a3484a173)

diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 3217a27b82..ccd2707871 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -146,6 +146,7 @@ endif
 
 config NAND_ARASAN
 	bool "Configure Arasan Nand"
+	select SYS_NAND_SELF_INIT
 	imply CMD_NAND
 	help
 	  This enables Nand driver support for Arasan nand flash
diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h
index 1399dfd436..9cec7f8a2c 100644
--- a/include/configs/xilinx_zynqmp.h
+++ b/include/configs/xilinx_zynqmp.h
@@ -77,7 +77,6 @@
 
 #ifdef CONFIG_NAND_ARASAN
 # define CONFIG_SYS_MAX_NAND_DEVICE	1
-# define CONFIG_SYS_NAND_SELF_INIT
 # define CONFIG_SYS_NAND_ONFI_DETECTION
 # define CONFIG_MTD_DEVICE
 #endif

commit 8fa19e0e9d1774b6cea4821895e2d2d58dace249
Author: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Date:   Thu Jan 4 16:04:22 2018 +0530

    UPSTREAM: nand: arasan_nfc: Use the calculated ecc address for updating ecc register
    
    This patch corrects the ecc address calculation before updating
    to ecc register. The ecc address has to be calculated based on
    page, oob and ecc sizes of the device.
    
    Change-Id: Ic783dd586a2080fb1697457abf3d30eaee173b3c
    Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
    Signed-off-by: Michal Simek <michal.simek@xilinx.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit f25ac66c528553a38d349c563d67d0eebbdd77f9)

diff --git a/drivers/mtd/nand/arasan_nfc.c b/drivers/mtd/nand/arasan_nfc.c
index 70cb00e85f..3c9a0215c5 100644
--- a/drivers/mtd/nand/arasan_nfc.c
+++ b/drivers/mtd/nand/arasan_nfc.c
@@ -1133,7 +1133,7 @@ static void arasan_check_ondie(struct mtd_info *mtd)
 static int arasan_nand_ecc_init(struct mtd_info *mtd)
 {
 	int found = -1;
-	u32 regval, eccpos_start, i;
+	u32 regval, eccpos_start, i, eccaddr;
 	struct nand_chip *nand_chip = mtd_to_nand(mtd);
 
 	for (i = 0; i < ARRAY_SIZE(ecc_matrix); i++) {
@@ -1152,7 +1152,10 @@ static int arasan_nand_ecc_init(struct mtd_info *mtd)
 	if (found < 0)
 		return 1;
 
-	regval = ecc_matrix[found].eccaddr |
+	eccaddr = mtd->writesize + mtd->oobsize -
+		  ecc_matrix[found].eccsize;
+
+	regval = eccaddr |
 		 (ecc_matrix[found].eccsize << ARASAN_NAND_ECC_SIZE_SHIFT) |
 		 (ecc_matrix[found].bch << ARASAN_NAND_ECC_BCH_SHIFT);
 	writel(regval, &arasan_nand_base->ecc_reg);

commit aa06c3b03249799cf22670593fb85ee3f8e723ed
Author: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Date:   Thu Jan 4 16:04:21 2018 +0530

    UPSTREAM: nand: arasan_nfc: Add support for ondie ecc
    
    This patch adds support for ondie ecc. As of now
    this adds support for micron parts which supports
    ondie ecc.
    Didn't found any better way to detect ondie ecc
    support by a device except sorting out with
    manufacture and device id's.
    
    Change-Id: Iab408d7af047d9de530c6ccc0fb4c9ca2a7d83b4
    Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
    Signed-off-by: Michal Simek <michal.simek@xilinx.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit cacb8a029fa1d1c140625f18e01663817a2d1b7f)

diff --git a/drivers/mtd/nand/arasan_nfc.c b/drivers/mtd/nand/arasan_nfc.c
index dc956f81e4..70cb00e85f 100644
--- a/drivers/mtd/nand/arasan_nfc.c
+++ b/drivers/mtd/nand/arasan_nfc.c
@@ -21,6 +21,7 @@
 struct arasan_nand_info {
 	void __iomem *nand_base;
 	u32 page;
+	bool on_die_ecc_enabled;
 };
 
 struct nand_regs {
@@ -64,6 +65,7 @@ struct arasan_nand_command_format {
 };
 
 #define ONDIE_ECC_FEATURE_ADDR			0x90
+#define ENABLE_ONDIE_ECC			0x08
 
 #define ARASAN_PROG_RD_MASK			0x00000001
 #define ARASAN_PROG_BLK_ERS_MASK		0x00000004
@@ -206,6 +208,51 @@ static const struct arasan_ecc_matrix ecc_matrix[] = {
 	{16384, 1024, 24, 1, 4, 0x4220, 0x2A0}
 };
 
+static struct nand_ecclayout ondie_nand_oob_64 = {
+	.eccbytes = 32,
+
+	.eccpos = {
+		8, 9, 10, 11, 12, 13, 14, 15,
+		24, 25, 26, 27, 28, 29, 30, 31,
+		40, 41, 42, 43, 44, 45, 46, 47,
+		56, 57, 58, 59, 60, 61, 62, 63
+	},
+
+	.oobfree = {
+		{ .offset = 4, .length = 4 },
+		{ .offset = 20, .length = 4 },
+		{ .offset = 36, .length = 4 },
+		{ .offset = 52, .length = 4 }
+	}
+};
+
+/*
+ * bbt decriptors for chips with on-die ECC and
+ * chips with 64-byte OOB
+ */
+static u8 bbt_pattern[] = {'B', 'b', 't', '0' };
+static u8 mirror_pattern[] = {'1', 't', 'b', 'B' };
+
+static struct nand_bbt_descr bbt_main_descr = {
+	.options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE |
+		NAND_BBT_2BIT | NAND_BBT_VERSION | NAND_BBT_PERCHIP,
+	.offs = 4,
+	.len = 4,
+	.veroffs = 20,
+	.maxblocks = 4,
+	.pattern = bbt_pattern
+};
+
+static struct nand_bbt_descr bbt_mirror_descr = {
+	.options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE |
+		NAND_BBT_2BIT | NAND_BBT_VERSION | NAND_BBT_PERCHIP,
+	.offs = 4,
+	.len = 4,
+	.veroffs = 20,
+	.maxblocks = 4,
+	.pattern = mirror_pattern
+};
+
 static u8 buf_data[READ_BUFF_SIZE];
 static u32 buf_index;
 
@@ -265,6 +312,7 @@ static u8 arasan_nand_get_addrcycle(struct mtd_info *mtd)
 static int arasan_nand_read_page(struct mtd_info *mtd, u8 *buf, u32 size)
 {
 	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct arasan_nand_info *nand = nand_get_controller_data(chip);
 	u32 reg_val, i, pktsize, pktnum;
 	u32 *bufptr = (u32 *)buf;
 	u32 timeout;
@@ -293,15 +341,17 @@ static int arasan_nand_read_page(struct mtd_info *mtd, u8 *buf, u32 size)
 		    pktsize;
 	writel(reg_val, &arasan_nand_base->pkt_reg);
 
-	arasan_nand_enable_ecc();
-	addr_cycles = arasan_nand_get_addrcycle(mtd);
-	if (addr_cycles == ARASAN_NAND_INVALID_ADDR_CYCL)
-		return ERR_ADDR_CYCLE;
+	if (!nand->on_die_ecc_enabled) {
+		arasan_nand_enable_ecc();
+		addr_cycles = arasan_nand_get_addrcycle(mtd);
+		if (addr_cycles == ARASAN_NAND_INVALID_ADDR_CYCL)
+			return ERR_ADDR_CYCLE;
 
-	writel((NAND_CMD_RNDOUTSTART << ARASAN_NAND_CMD_CMD2_SHIFT) |
-	       NAND_CMD_RNDOUT | (addr_cycles <<
-	       ARASAN_NAND_CMD_ADDR_CYCL_SHIFT),
-	       &arasan_nand_base->ecc_sprcmd_reg);
+		writel((NAND_CMD_RNDOUTSTART << ARASAN_NAND_CMD_CMD2_SHIFT) |
+		       NAND_CMD_RNDOUT | (addr_cycles <<
+		       ARASAN_NAND_CMD_ADDR_CYCL_SHIFT),
+		       &arasan_nand_base->ecc_sprcmd_reg);
+	}
 	writel(curr_cmd->pgm, &arasan_nand_base->pgm_reg);
 
 	while (rdcount < pktnum) {
@@ -363,17 +413,19 @@ static int arasan_nand_read_page(struct mtd_info *mtd, u8 *buf, u32 size)
 	writel(reg_val | ARASAN_NAND_INT_STS_XFR_CMPLT_MASK,
 	       &arasan_nand_base->intsts_reg);
 
-	if (readl(&arasan_nand_base->intsts_reg) &
-	    ARASAN_NAND_INT_STS_MUL_BIT_ERR_MASK) {
-		printf("arasan rd_page:sbiterror\n");
-		return -1;
-	}
+	if (!nand->on_die_ecc_enabled) {
+		if (readl(&arasan_nand_base->intsts_reg) &
+		    ARASAN_NAND_INT_STS_MUL_BIT_ERR_MASK) {
+			printf("arasan rd_page:sbiterror\n");
+			return -1;
+		}
 
-	if (readl(&arasan_nand_base->intsts_reg) &
-	    ARASAN_NAND_INT_STS_ERR_EN_MASK) {
-		mtd->ecc_stats.failed++;
-		printf("arasan rd_page:multibiterror\n");
-		return -1;
+		if (readl(&arasan_nand_base->intsts_reg) &
+		    ARASAN_NAND_INT_STS_ERR_EN_MASK) {
+			mtd->ecc_stats.failed++;
+			printf("arasan rd_page:multibiterror\n");
+			return -1;
+		}
 	}
 
 	return 0;
@@ -460,12 +512,14 @@ static int arasan_nand_write_page_hwecc(struct mtd_info *mtd,
 	reg_val |= (pktnum << ARASAN_NAND_PKT_REG_PKT_CNT_SHFT) | pktsize;
 	writel(reg_val, &arasan_nand_base->pkt_reg);
 
-	arasan_nand_enable_ecc();
-	column_addr_cycles = (chip->onfi_params.addr_cycles &
-			      ARASAN_NAND_COL_ADDR_CYCL_MASK) >>
-			      ARASAN_NAND_COL_ADDR_CYCL_SHIFT;
-	writel((NAND_CMD_RNDIN | (column_addr_cycles << 28)),
-	       &arasan_nand_base->ecc_sprcmd_reg);
+	if (!nand->on_die_ecc_enabled) {
+		arasan_nand_enable_ecc();
+		column_addr_cycles = (chip->onfi_params.addr_cycles &
+				      ARASAN_NAND_COL_ADDR_CYCL_MASK) >>
+				      ARASAN_NAND_COL_ADDR_CYCL_SHIFT;
+		writel((NAND_CMD_RNDIN | (column_addr_cycles << 28)),
+		       &arasan_nand_base->ecc_sprcmd_reg);
+	}
 	writel(curr_cmd->pgm, &arasan_nand_base->pgm_reg);
 
 	while (rdcount < pktnum) {
@@ -1032,6 +1086,50 @@ static void arasan_nand_cmd_function(struct mtd_info *mtd, unsigned int command,
 		printf("ERROR:%s:command:0x%x\n", __func__, curr_cmd->cmd1);
 }
 
+static void arasan_check_ondie(struct mtd_info *mtd)
+{
+	struct nand_chip *nand_chip = mtd_to_nand(mtd);
+	struct arasan_nand_info *nand = nand_get_controller_data(nand_chip);
+	u8 maf_id, dev_id;
+	u8 get_feature[4];
+	u8 set_feature[4] = {ENABLE_ONDIE_ECC, 0x00, 0x00, 0x00};
+	u32 i;
+
+	/* Send the command for reading device ID */
+	nand_chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
+	nand_chip->cmdfunc(mtd, NAND_CMD_READID, 0, -1);
+
+	/* Read manufacturer and device IDs */
+	maf_id = nand_chip->read_byte(mtd);
+	dev_id = nand_chip->read_byte(mtd);
+
+	if ((maf_id == NAND_MFR_MICRON) &&
+	    ((dev_id == 0xf1) || (dev_id == 0xa1) || (dev_id == 0xb1) ||
+	     (dev_id == 0xaa) || (dev_id == 0xba) || (dev_id == 0xda) ||
+	     (dev_id == 0xca) || (dev_id == 0xac) || (dev_id == 0xbc) ||
+	     (dev_id == 0xdc) || (dev_id == 0xcc) || (dev_id == 0xa3) ||
+	     (dev_id == 0xb3) || (dev_id == 0xd3) || (dev_id == 0xc3))) {
+		nand_chip->cmdfunc(mtd, NAND_CMD_SET_FEATURES,
+				   ONDIE_ECC_FEATURE_ADDR, -1);
+
+		nand_chip->write_buf(mtd, &set_feature[0], 4);
+		nand_chip->cmdfunc(mtd, NAND_CMD_GET_FEATURES,
+				   ONDIE_ECC_FEATURE_ADDR, -1);
+
+		for (i = 0; i < 4; i++)
+			get_feature[i] = nand_chip->read_byte(mtd);
+
+		if (get_feature[0] & ENABLE_ONDIE_ECC)
+			nand->on_die_ecc_enabled = true;
+		else
+			printf("%s: Unable to enable OnDie ECC\n", __func__);
+
+		/* Use the BBT pattern descriptors */
+		nand_chip->bbt_td = &bbt_main_descr;
+		nand_chip->bbt_md = &bbt_mirror_descr;
+	}
+}
+
 static int arasan_nand_ecc_init(struct mtd_info *mtd)
 {
 	int found = -1;
@@ -1126,9 +1224,22 @@ static int arasan_nand_init(struct nand_chip *nand_chip, int devnum)
 	nand_chip->ecc.read_oob = arasan_nand_read_oob;
 	nand_chip->ecc.write_oob = arasan_nand_write_oob;
 
-	if (arasan_nand_ecc_init(mtd)) {
-		printf("%s: nand_ecc_init failed\n", __func__);
-		goto fail;
+	arasan_check_ondie(mtd);
+
+	/*
+	 * If on die supported, then give priority to on-die ecc and use
+	 * it instead of controller ecc.
+	 */
+	if (nand->on_die_ecc_enabled) {
+		nand_chip->ecc.strength = 1;
+		nand_chip->ecc.size = mtd->writesize;
+		nand_chip->ecc.bytes = 0;
+		nand_chip->ecc.layout = &ondie_nand_oob_64;
+	} else {
+		if (arasan_nand_ecc_init(mtd)) {
+			printf("%s: nand_ecc_init failed\n", __func__);
+			goto fail;
+		}
 	}
 
 	if (nand_scan_tail(mtd)) {

commit 4eb19ef1456b6ddf3855a650af0e7f971084cb01
Author: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Date:   Thu Jan 4 16:04:20 2018 +0530

    UPSTREAM: nand: arasan_nfc: Move common ecc struct initialization init routine
    
    Move common part of ecc structure initialization to
    arasan_nand_init() routine.
    
    Change-Id: I78d78b0468f69a7c25101ddc224e9bbd60954cba
    Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
    Signed-off-by: Michal Simek <michal.simek@xilinx.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit b08fc34f3f778600bd2098f480f60674793dc0e2)

diff --git a/drivers/mtd/nand/arasan_nfc.c b/drivers/mtd/nand/arasan_nfc.c
index 14b27337b6..dc956f81e4 100644
--- a/drivers/mtd/nand/arasan_nfc.c
+++ b/drivers/mtd/nand/arasan_nfc.c
@@ -1038,13 +1038,6 @@ static int arasan_nand_ecc_init(struct mtd_info *mtd)
 	u32 regval, eccpos_start, i;
 	struct nand_chip *nand_chip = mtd_to_nand(mtd);
 
-	nand_chip->ecc.mode = NAND_ECC_HW;
-	nand_chip->ecc.hwctl = NULL;
-	nand_chip->ecc.read_page = arasan_nand_read_page_hwecc;
-	nand_chip->ecc.write_page = arasan_nand_write_page_hwecc;
-	nand_chip->ecc.read_oob = arasan_nand_read_oob;
-	nand_chip->ecc.write_oob = arasan_nand_write_oob;
-
 	for (i = 0; i < ARRAY_SIZE(ecc_matrix); i++) {
 		if ((ecc_matrix[i].pagesize == mtd->writesize) &&
 		    (ecc_matrix[i].ecc_codeword_size >=
@@ -1126,6 +1119,13 @@ static int arasan_nand_init(struct nand_chip *nand_chip, int devnum)
 		goto fail;
 	}
 
+	nand_chip->ecc.mode = NAND_ECC_HW;
+	nand_chip->ecc.hwctl = NULL;
+	nand_chip->ecc.read_page = arasan_nand_read_page_hwecc;
+	nand_chip->ecc.write_page = arasan_nand_write_page_hwecc;
+	nand_chip->ecc.read_oob = arasan_nand_read_oob;
+	nand_chip->ecc.write_oob = arasan_nand_write_oob;
+
 	if (arasan_nand_ecc_init(mtd)) {
 		printf("%s: nand_ecc_init failed\n", __func__);
 		goto fail;

commit a30d1fa551b24af9bae13327013951c731ae8699
Author: Mario Six <mario.six@gdsys.cc>
Date:   Fri Jan 26 14:43:56 2018 +0100

    UPSTREAM: cfi_flash: Always define cfi_flash_num_flash_banks
    
    The variable cfi_flash_num_flash_banks is defined iff
    CONFIG_SYS_MAX_FLASH_BANKS_DETECT is defined, but it is used
    unconditionally in the function cfi_flash_init_dm. This leads to a
    undefined variable compile error when CONFIG_SYS_MAX_FLASH_BANKS_DETECT
    is not defined, but DM is enabled.
    
    Fix this by always defining the cfi_flash_num_flash_banks variable.
    
    Change-Id: I72ddbb2d98a1d4df41317ed8c80b1340d30f4513
    Signed-off-by: Mario Six <mario.six@gdsys.cc>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit d9a356972b7504e2e1b0a2b61ddc25a4452502e6)

diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index 347382f529..da44e6184e 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -91,6 +91,8 @@ static u16 cfi_flash_config_reg(int i)
 
 #if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
 int cfi_flash_num_flash_banks = CONFIG_SYS_MAX_FLASH_BANKS_DETECT;
+#else
+int cfi_flash_num_flash_banks;
 #endif
 
 #ifdef CONFIG_CFI_FLASH /* for driver model */

commit 4360a4eebfa8ba3767cd40ec066f6b20bbc234ff
Author: Mario Six <mario.six@gdsys.cc>
Date:   Fri Jan 26 14:43:55 2018 +0100

    UPSTREAM: cfi_flash: Fix indention
    
    When long expressions surrounded by parentheses are split into multiple
    lines, each consecutive line should be aligned with the corresponding
    parenthesis. Fix all instances where this occurs.
    
    Change-Id: I4afe2615eaf3acd42bf8ced0fd393b63642b0e79
    Signed-off-by: Mario Six <mario.six@gdsys.cc>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit c0350fbf4c0e9f2d178d89aee49561ce2b4bf890)

diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index 88c47cad90..347382f529 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -213,7 +213,7 @@ flash_map(flash_info_t *info, flash_sect_t sect, uint offset)
 }
 
 static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
-		unsigned int offset, void *addr)
+			       unsigned int offset, void *addr)
 {
 }
 
@@ -329,7 +329,7 @@ static ulong flash_read_long (flash_info_t *info, flash_sect_t sect,
 
 #ifdef DEBUG
 	debug("long addr is at %p info->portwidth = %d\n", addr,
-	       info->portwidth);
+	      info->portwidth);
 	for (x = 0; x < 4 * info->portwidth; x++)
 		debug("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
 #endif
@@ -363,19 +363,19 @@ static void flash_write_cmd(flash_info_t *info, flash_sect_t sect,
 	switch (info->portwidth) {
 	case FLASH_CFI_8BIT:
 		debug("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
-		       cword.w8, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
+		      cword.w8, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 		flash_write8(cword.w8, addr);
 		break;
 	case FLASH_CFI_16BIT:
 		debug("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
-		       cmd, cword.w16,
-		       info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
+		      cmd, cword.w16,
+		      info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 		flash_write16(cword.w16, addr);
 		break;
 	case FLASH_CFI_32BIT:
 		debug("fwc addr %p cmd %x %8.8x 32bit x %d bit\n", addr,
-		       cmd, cword.w32,
-		       info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
+		      cmd, cword.w32,
+		      info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 		flash_write32(cword.w32, addr);
 		break;
 	case FLASH_CFI_64BIT:
@@ -386,8 +386,8 @@ static void flash_write_cmd(flash_info_t *info, flash_sect_t sect,
 			print_longlong(str, cword.w64);
 
 			debug("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
-			       addr, cmd, str,
-			       info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
+			      addr, cmd, str,
+			      info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 		}
 #endif
 		flash_write64(cword.w64, addr);
@@ -408,8 +408,8 @@ static void flash_unlock_seq(flash_info_t *info, flash_sect_t sect)
 
 /*-----------------------------------------------------------------------
  */
-static int flash_isequal(flash_info_t *info, flash_sect_t sect,
-			  uint offset, uchar cmd)
+static int flash_isequal(flash_info_t *info, flash_sect_t sect, uint offset,
+			 uchar cmd)
 {
 	void *addr;
 	cfiword_t cword;
@@ -456,8 +456,8 @@ static int flash_isequal(flash_info_t *info, flash_sect_t sect,
 
 /*-----------------------------------------------------------------------
  */
-static int flash_isset(flash_info_t *info, flash_sect_t sect,
-			uint offset, uchar cmd)
+static int flash_isset(flash_info_t *info, flash_sect_t sect, uint offset,
+		       uchar cmd)
 {
 	void *addr;
 	cfiword_t cword;
@@ -489,8 +489,8 @@ static int flash_isset(flash_info_t *info, flash_sect_t sect,
 
 /*-----------------------------------------------------------------------
  */
-static int flash_toggle(flash_info_t *info, flash_sect_t sect,
-			 uint offset, uchar cmd)
+static int flash_toggle(flash_info_t *info, flash_sect_t sect, uint offset,
+			uchar cmd)
 {
 	u8 *addr;
 	cfiword_t cword;
@@ -544,12 +544,12 @@ static int flash_is_busy(flash_info_t *info, flash_sect_t sect)
 #endif
 		if (info->sr_supported) {
 			flash_write_cmd(info, sect, info->addr_unlock1,
-					 FLASH_CMD_READ_STATUS);
+					FLASH_CMD_READ_STATUS);
 			retval = !flash_isset(info, sect, 0,
-					       FLASH_STATUS_DONE);
+					      FLASH_STATUS_DONE);
 		} else {
 			retval = flash_toggle(info, sect, 0,
-					       AMD_STATUS_TOGGLE);
+					      AMD_STATUS_TOGGLE);
 		}
 
 		break;
@@ -565,7 +565,7 @@ static int flash_is_busy(flash_info_t *info, flash_sect_t sect)
  *  This routine does not set the flash to read-array mode.
  */
 static int flash_status_check(flash_info_t *info, flash_sect_t sector,
-			       ulong tout, char *prompt)
+			      ulong tout, char *prompt)
 {
 	ulong start;
 
@@ -586,8 +586,8 @@ static int flash_status_check(flash_info_t *info, flash_sect_t sector,
 	while (flash_is_busy(info, sector)) {
 		if (get_timer(start) > tout) {
 			printf("Flash %s timeout at address %lx data %lx\n",
-				prompt, info->start[sector],
-				flash_read_long(info, sector, 0));
+			       prompt, info->start[sector],
+			       flash_read_long(info, sector, 0));
 			flash_write_cmd(info, sector, 0, info->cmd_reset);
 			udelay(1);
 			return ERR_TIMEOUT;
@@ -604,7 +604,7 @@ static int flash_status_check(flash_info_t *info, flash_sect_t sector,
  * This routine sets the flash to read-array mode.
  */
 static int flash_full_status_check(flash_info_t *info, flash_sect_t sector,
-				    ulong tout, char *prompt)
+				   ulong tout, char *prompt)
 {
 	int retcode;
 
@@ -614,10 +614,10 @@ static int flash_full_status_check(flash_info_t *info, flash_sect_t sector,
 	case CFI_CMDSET_INTEL_EXTENDED:
 	case CFI_CMDSET_INTEL_STANDARD:
 		if (retcode == ERR_OK &&
-			!flash_isset(info, sector, 0, FLASH_STATUS_DONE)) {
+		    !flash_isset(info, sector, 0, FLASH_STATUS_DONE)) {
 			retcode = ERR_INVAL;
 			printf("Flash %s error at address %lx\n", prompt,
-				info->start[sector]);
+			       info->start[sector]);
 			if (flash_isset(info, sector, 0, FLASH_STATUS_ECLBS |
 					 FLASH_STATUS_PSLBS)) {
 				puts("Command Sequence Error.\n");
@@ -765,7 +765,7 @@ static flash_sect_t find_sector(flash_info_t *info, ulong addr)
 		sector = 0;
 
 	while ((sector < info->sector_count - 1) &&
-		(info->start[sector] < addr))
+	       (info->start[sector] < addr))
 		sector++;
 	while ((info->start[sector] > addr) && (sector > 0))
 		/*
@@ -781,8 +781,7 @@ static flash_sect_t find_sector(flash_info_t *info, ulong addr)
 
 /*-----------------------------------------------------------------------
  */
-static int flash_write_cfiword(flash_info_t *info, ulong dest,
-				cfiword_t cword)
+static int flash_write_cfiword(flash_info_t *info, ulong dest, cfiword_t cword)
 {
 	void *dstaddr = (void *)dest;
 	int flag;
@@ -870,7 +869,7 @@ static int flash_write_cfiword(flash_info_t *info, ulong dest,
 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
 
 static int flash_write_cfibuffer(flash_info_t *info, ulong dest, uchar *cp,
-				  int len)
+				 int len)
 {
 	flash_sect_t sector;
 	int cnt;
@@ -946,8 +945,8 @@ static int flash_write_cfibuffer(flash_info_t *info, ulong dest, uchar *cp,
 		flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
 		flash_write_cmd(info, sector, 0, write_cmd);
 		retcode = flash_status_check(info, sector,
-					      info->buffer_write_tout,
-					      "write to buffer");
+					     info->buffer_write_tout,
+					     "write to buffer");
 		if (retcode == ERR_OK) {
 			/* reduce the number of loops by the width of
 			 * the port
@@ -978,7 +977,7 @@ static int flash_write_cfibuffer(flash_info_t *info, ulong dest, uchar *cp,
 				}
 			}
 			flash_write_cmd(info, sector, 0,
-					 FLASH_CMD_WRITE_BUFFER_CONFIRM);
+					FLASH_CMD_WRITE_BUFFER_CONFIRM);
 			retcode = flash_full_status_check(
 				info, sector, info->buffer_write_tout,
 				"buffer write");
@@ -1074,7 +1073,7 @@ int flash_erase(flash_info_t *info, int s_first, int s_last)
 			prot++;
 	if (prot) {
 		printf("- Warning: %d protected sectors will not be erased!\n",
-			prot);
+		       prot);
 	} else if (flash_verbose) {
 		putc('\n');
 	}
@@ -1117,11 +1116,11 @@ int flash_erase(flash_info_t *info, int s_first, int s_last)
 			case CFI_CMDSET_INTEL_STANDARD:
 			case CFI_CMDSET_INTEL_EXTENDED:
 				flash_write_cmd(info, sect, 0,
-						 FLASH_CMD_CLEAR_STATUS);
+						FLASH_CMD_CLEAR_STATUS);
 				flash_write_cmd(info, sect, 0,
-						 FLASH_CMD_BLOCK_ERASE);
+						FLASH_CMD_BLOCK_ERASE);
 				flash_write_cmd(info, sect, 0,
-						 FLASH_CMD_ERASE_CONFIRM);
+						FLASH_CMD_ERASE_CONFIRM);
 				break;
 			case CFI_CMDSET_AMD_STANDARD:
 			case CFI_CMDSET_AMD_EXTENDED:
@@ -1131,7 +1130,7 @@ int flash_erase(flash_info_t *info, int s_first, int s_last)
 						AMD_CMD_ERASE_START);
 				flash_unlock_seq(info, sect);
 				flash_write_cmd(info, sect, 0,
-						 info->cmd_erase_sector);
+						info->cmd_erase_sector);
 				break;
 #ifdef CONFIG_FLASH_CFI_LEGACY
 			case CFI_CMDSET_AMD_LEGACY:
@@ -1145,7 +1144,7 @@ int flash_erase(flash_info_t *info, int s_first, int s_last)
 #endif
 			default:
 				debug("Unknown flash vendor %d\n",
-				       info->vendor);
+				      info->vendor);
 				break;
 			}
 
@@ -1212,14 +1211,14 @@ void flash_print_info(flash_info_t *info)
 	}
 
 	printf("%s flash (%d x %d)",
-		info->name,
-		(info->portwidth << 3), (info->chipwidth << 3));
+	       info->name,
+	       (info->portwidth << 3), (info->chipwidth << 3));
 	if (info->size < 1024 * 1024)
 		printf("  Size: %ld kB in %d Sectors\n",
-			info->size >> 10, info->sector_count);
+		       info->size >> 10, info->sector_count);
 	else
 		printf("  Size: %ld MB in %d Sectors\n",
-			info->size >> 20, info->sector_count);
+		       info->size >> 20, info->sector_count);
 	printf("  ");
 	switch (info->vendor) {
 	case CFI_CMDSET_INTEL_PROG_REGIONS:
@@ -1247,21 +1246,20 @@ void flash_print_info(flash_info_t *info)
 		break;
 	}
 	printf(" command set, Manufacturer ID: 0x%02X, Device ID: 0x",
-		info->manufacturer_id);
+	       info->manufacturer_id);
 	printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
-		info->device_id);
+	       info->device_id);
 	if ((info->device_id & 0xff) == 0x7E) {
 		printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
-		info->device_id2);
+		       info->device_id2);
 	}
 	if (info->vendor == CFI_CMDSET_AMD_STANDARD && info->legacy_unlock)
 		printf("\n  Advanced Sector Protection (PPB) enabled");
 	printf("\n  Erase timeout: %ld ms, write timeout: %ld ms\n",
-		info->erase_blk_tout,
-		info->write_tout);
+	       info->erase_blk_tout, info->write_tout);
 	if (info->buffer_size > 1) {
 		printf("  Buffer write timeout: %ld ms, ",
-			info->buffer_write_tout);
+		       info->buffer_write_tout);
 		printf("buffer size: %d bytes\n", info->buffer_size);
 	}
 
@@ -1274,13 +1272,13 @@ void flash_print_info(flash_info_t *info)
 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
 		/* print empty and read-only info */
 		printf("  %08lX %c %s ",
-			info->start[i],
-			sector_erased(info, i) ? 'E' : ' ',
-			info->protect[i] ? "RO" : "  ");
+		       info->start[i],
+		       sector_erased(info, i) ? 'E' : ' ',
+		       info->protect[i] ? "RO" : "  ");
 #else	/* ! CONFIG_SYS_FLASH_EMPTY_INFO */
 		printf("  %08lX   %s ",
-			info->start[i],
-			info->protect[i] ? "RO" : "  ");
+		       info->start[i],
+		       info->protect[i] ? "RO" : "  ");
 #endif
 	}
 	putc('\n');
@@ -1446,7 +1444,7 @@ static inline int manufact_match(flash_info_t *info, u32 manu)
 static int cfi_protect_bugfix(flash_info_t *info, long sector, int prot)
 {
 	if (manufact_match(info, INTEL_MANUFACT) &&
-		info->device_id == NUMONYX_256MBIT) {
+	    info->device_id == NUMONYX_256MBIT) {
 		/*
 		 * see errata called
 		 * "Numonyx Axcell P33/P30 Specification Update" :)
@@ -1487,15 +1485,15 @@ int flash_real_protect(flash_info_t *info, long sector, int prot)
 	case CFI_CMDSET_INTEL_EXTENDED:
 		if (!cfi_protect_bugfix(info, sector, prot)) {
 			flash_write_cmd(info, sector, 0,
-				 FLASH_CMD_CLEAR_STATUS);
+					FLASH_CMD_CLEAR_STATUS);
 			flash_write_cmd(info, sector, 0,
-				FLASH_CMD_PROTECT);
+					FLASH_CMD_PROTECT);
 			if (prot)
 				flash_write_cmd(info, sector, 0,
-					FLASH_CMD_PROTECT_SET);
+						FLASH_CMD_PROTECT_SET);
 			else
 				flash_write_cmd(info, sector, 0,
-					FLASH_CMD_PROTECT_CLEAR);
+						FLASH_CMD_PROTECT_CLEAR);
 		}
 		break;
 	case CFI_CMDSET_AMD_EXTENDED:
@@ -1516,7 +1514,7 @@ int flash_real_protect(flash_info_t *info, long sector, int prot)
 						AMD_CMD_UNLOCK_START);
 				if (info->device_id == ATM_ID_BV6416)
 					flash_write_cmd(info, sector,
-						0, ATM_CMD_UNLOCK_SECT);
+							0, ATM_CMD_UNLOCK_SECT);
 			}
 		}
 		if (info->legacy_unlock) {
@@ -1530,29 +1528,29 @@ int flash_real_protect(flash_info_t *info, long sector, int prot)
 			if (prot) {
 				if (lock_flag) {
 					flash_write_cmd(info, sector, 0,
-						AMD_CMD_PPB_LOCK_BC1);
+							AMD_CMD_PPB_LOCK_BC1);
 					flash_write_cmd(info, sector, 0,
-						AMD_CMD_PPB_LOCK_BC2);
+							AMD_CMD_PPB_LOCK_BC2);
 				}
 				debug("sector %ld %slocked\n", sector,
-					lock_flag ? "" : "already ");
+				      lock_flag ? "" : "already ");
 			} else {
 				if (!lock_flag) {
 					debug("unlock %ld\n", sector);
 					flash_write_cmd(info, 0, 0,
-						AMD_CMD_PPB_UNLOCK_BC1);
+							AMD_CMD_PPB_UNLOCK_BC1);
 					flash_write_cmd(info, 0, 0,
-						AMD_CMD_PPB_UNLOCK_BC2);
+							AMD_CMD_PPB_UNLOCK_BC2);
 				}
 				debug("sector %ld %sunlocked\n", sector,
-					!lock_flag ? "" : "already ");
+				      !lock_flag ? "" : "already ");
 			}
 			if (flag)
 				enable_interrupts();
 
 			if (flash_status_check(info, sector,
-					info->erase_blk_tout,
-					prot ? "protect" : "unprotect"))
+					       info->erase_blk_tout,
+					       prot ? "protect" : "unprotect"))
 				printf("status check error\n");
 
 			flash_write_cmd(info, 0, 0,
@@ -1580,7 +1578,7 @@ int flash_real_protect(flash_info_t *info, long sector, int prot)
 	 */
 	flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
 	retcode = flash_full_status_check(info, sector, info->erase_blk_tout,
-				      prot ? "protect" : "unprotect");
+					  prot ? "protect" : "unprotect");
 	if (retcode == 0) {
 		info->protect[sector] = prot;
 
@@ -1604,7 +1602,7 @@ int flash_real_protect(flash_info_t *info, long sector, int prot)
  * flash_read_user_serial - read the OneTimeProgramming cells
  */
 void flash_read_user_serial(flash_info_t *info, void *buffer, int offset,
-			     int len)
+			    int len)
 {
 	uchar *src;
 	uchar *dst;
@@ -1622,7 +1620,7 @@ void flash_read_user_serial(flash_info_t *info, void *buffer, int offset,
  * flash_read_factory_serial - read the device Id from the protection area
  */
 void flash_read_factory_serial(flash_info_t *info, void *buffer, int offset,
-				int len)
+			       int len)
 {
 	uchar *src;
 
@@ -1667,7 +1665,7 @@ static void cmdset_intel_read_jedec_ids(flash_info_t *info)
 	flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
 	udelay(1000); /* some flash are slow to respond */
 	info->manufacturer_id = flash_read_uchar(info,
-					FLASH_OFFSET_MANUFACTURER_ID);
+						 FLASH_OFFSET_MANUFACTURER_ID);
 	info->device_id = (info->chipwidth == FLASH_CFI_16BIT) ?
 			flash_read_word(info, FLASH_OFFSET_DEVICE_ID) :
 			flash_read_uchar(info, FLASH_OFFSET_DEVICE_ID);
@@ -1684,8 +1682,8 @@ static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
 #ifdef CONFIG_SYS_FLASH_PROTECTION
 	/* read legacy lock/unlock bit from intel flash */
 	if (info->ext_addr) {
-		info->legacy_unlock = flash_read_uchar(info,
-				info->ext_addr + 5) & 0x08;
+		info->legacy_unlock =
+			flash_read_uchar(info, info->ext_addr + 5) & 0x08;
 	}
 #endif
 
@@ -1708,7 +1706,7 @@ static void cmdset_amd_read_jedec_ids(flash_info_t *info)
 	while (manu_id == FLASH_CONTINUATION_CODE && bank_id < 0x800) {
 		bank_id += 0x100;
 		manu_id = flash_read_uchar(info,
-			bank_id | FLASH_OFFSET_MANUFACTURER_ID);
+					   bank_id | FLASH_OFFSET_MANUFACTURER_ID);
 	}
 	info->manufacturer_id = manu_id;
 
@@ -1724,11 +1722,11 @@ static void cmdset_amd_read_jedec_ids(flash_info_t *info)
 	switch (info->chipwidth) {
 	case FLASH_CFI_8BIT:
 		info->device_id = flash_read_uchar(info,
-						FLASH_OFFSET_DEVICE_ID);
+						   FLASH_OFFSET_DEVICE_ID);
 		if (info->device_id == 0x7E) {
 			/* AMD 3-byte (expanded) device ids */
 			info->device_id2 = flash_read_uchar(info,
-						FLASH_OFFSET_DEVICE_ID2);
+							    FLASH_OFFSET_DEVICE_ID2);
 			info->device_id2 <<= 8;
 			info->device_id2 |= flash_read_uchar(info,
 						FLASH_OFFSET_DEVICE_ID3);
@@ -1736,11 +1734,11 @@ static void cmdset_amd_read_jedec_ids(flash_info_t *info)
 		break;
 	case FLASH_CFI_16BIT:
 		info->device_id = flash_read_word(info,
-						FLASH_OFFSET_DEVICE_ID);
+						  FLASH_OFFSET_DEVICE_ID);
 		if ((info->device_id & 0xff) == 0x7E) {
 			/* AMD 3-byte (expanded) device ids */
 			info->device_id2 = flash_read_uchar(info,
-						FLASH_OFFSET_DEVICE_ID2);
+							    FLASH_OFFSET_DEVICE_ID2);
 			info->device_id2 <<= 8;
 			info->device_id2 |= flash_read_uchar(info,
 						FLASH_OFFSET_DEVICE_ID3);
@@ -1821,7 +1819,7 @@ static int flash_detect_legacy(phys_addr_t base, int banknum)
 							   info->portwidth,
 							   MAP_NOCACHE);
 				if (info->portwidth == FLASH_CFI_8BIT &&
-					info->interface == FLASH_CFI_X8X16) {
+				    info->interface == FLASH_CFI_X8X16) {
 					info->addr_unlock1 = 0x2AAA;
 					info->addr_unlock2 = 0x5555;
 				} else {
@@ -1830,9 +1828,9 @@ static int flash_detect_legacy(phys_addr_t base, int banknum)
 				}
 				flash_read_jedec_ids(info);
 				debug("JEDEC PROBE: ID %x %x %x\n",
-						info->manufacturer_id,
-						info->device_id,
-						info->device_id2);
+				      info->manufacturer_id,
+				      info->device_id,
+				      info->device_id2);
 				if (jedec_flash_match(info, info->start[0]))
 					break;
 
@@ -1869,8 +1867,8 @@ static inline int flash_detect_legacy(phys_addr_t base, int banknum)
  * detect if flash is compatible with the Common Flash Interface (CFI)
  * http://www.jedec.org/download/search/jesd68.pdf
  */
-static void flash_read_cfi(flash_info_t *info, void *buf,
-		unsigned int start, size_t len)
+static void flash_read_cfi(flash_info_t *info, void *buf, unsigned int start,
+			   size_t len)
 {
 	u8 *p = buf;
 	unsigned int i;
@@ -1904,22 +1902,22 @@ static int __flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry)
 	for (cfi_offset = 0; cfi_offset < ARRAY_SIZE(flash_offset_cfi);
 	     cfi_offset++) {
 		flash_write_cmd(info, 0, flash_offset_cfi[cfi_offset],
-				 FLASH_CMD_CFI);
+				FLASH_CMD_CFI);
 		if (flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP, 'Q') &&
 		    flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') &&
 		    flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
-		    flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
-					sizeof(struct cfi_qry));
+			flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
+				       sizeof(struct cfi_qry));
 			info->interface	= le16_to_cpu(qry->interface_desc);
 
 			info->cfi_offset = flash_offset_cfi[cfi_offset];
 			debug("device interface is %d\n",
-			       info->interface);
+			      info->interface);
 			debug("found port %d chip %d ",
-			       info->portwidth, info->chipwidth);
+			      info->portwidth, info->chipwidth);
 			debug("port %d bits chip %d bits\n",
-			       info->portwidth << CFI_FLASH_SHIFT_WIDTH,
-			       info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
+			      info->portwidth << CFI_FLASH_SHIFT_WIDTH,
+			      info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 
 			/* calculate command offsets as in the Linux driver */
 			info->addr_unlock1 = 0x555;
@@ -2051,11 +2049,11 @@ static void flash_fixup_num(flash_info_t *info, struct cfi_qry *qry)
 	 * So adjust the buffer size for M29EW while operating in 8-bit mode
 	 */
 	if (qry->max_buf_write_size > 0x8 &&
-			info->device_id == 0x7E &&
-			(info->device_id2 == 0x2201 ||
-			info->device_id2 == 0x2301 ||
-			info->device_id2 == 0x2801 ||
-			info->device_id2 == 0x4801)) {
+	    info->device_id == 0x7E &&
+	    (info->device_id2 == 0x2201 ||
+	     info->device_id2 == 0x2301 ||
+	     info->device_id2 == 0x2801 ||
+	     info->device_id2 == 0x4801)) {
 		debug("Adjusted buffer size on Numonyx flash");
 		debug(" M29EW family in 8 bit mode\n");
 		qry->max_buf_write_size = 0x8;
@@ -2118,7 +2116,7 @@ ulong flash_get_size(phys_addr_t base, int banknum)
 			break;
 		default:
 			printf("CFI: Unknown command set 0x%x\n",
-					info->vendor);
+			       info->vendor);
 			/*
 			 * Unfortunately, this means we don't know how
 			 * to get the chip back to Read mode. Might
@@ -2157,12 +2155,12 @@ ulong flash_get_size(phys_addr_t base, int banknum)
 		size_ratio = info->portwidth / info->chipwidth;
 		/* if the chip is x8/x16 reduce the ratio by half */
 		if (info->interface == FLASH_CFI_X8X16 &&
-			info->chipwidth == FLASH_CFI_BY8) {
+		    info->chipwidth == FLASH_CFI_BY8) {
 			size_ratio >>= 1;
 		}
 		debug("size_ratio %d port %d bits chip %d bits\n",
-		       size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
-		       info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
+		      size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
+		      info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 		info->size = 1 << qry.dev_size;
 		/* multiply the size by the number of chips */
 		info->size *= size_ratio;
@@ -2177,7 +2175,7 @@ ulong flash_get_size(phys_addr_t base, int banknum)
 		for (i = 0; i < num_erase_regions; i++) {
 			if (i > NUM_ERASE_REGIONS) {
 				printf("%d erase regions found, only %d used\n",
-					num_erase_regions, NUM_ERASE_REGIONS);
+				       num_erase_regions, NUM_ERASE_REGIONS);
 				break;
 			}
 
@@ -2221,8 +2219,8 @@ ulong flash_get_size(phys_addr_t base, int banknum)
 							FLASH_CMD_READ_ID);
 					info->protect[sect_cnt] =
 						flash_isset(info, sect_cnt,
-							     FLASH_OFFSET_PROTECT,
-							     FLASH_STATUS_PROTECT);
+							    FLASH_OFFSET_PROTECT,
+							    FLASH_STATUS_PROTECT);
 					flash_write_cmd(info, sect_cnt, 0,
 							FLASH_CMD_RESET);
 					break;
@@ -2332,25 +2330,25 @@ static void flash_protect_default(void)
 #if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \
 	(!defined(CONFIG_MONITOR_IS_IN_RAM))
 	flash_protect(FLAG_PROTECT_SET,
-		       CONFIG_SYS_MONITOR_BASE,
-		       CONFIG_SYS_MONITOR_BASE + monitor_flash_len  - 1,
-		       flash_get_info(CONFIG_SYS_MONITOR_BASE));
+		      CONFIG_SYS_MONITOR_BASE,
+		      CONFIG_SYS_MONITOR_BASE + monitor_flash_len  - 1,
+		      flash_get_info(CONFIG_SYS_MONITOR_BASE));
 #endif
 
 	/* Environment protection ON by default */
 #ifdef CONFIG_ENV_IS_IN_FLASH
 	flash_protect(FLAG_PROTECT_SET,
-		       CONFIG_ENV_ADDR,
-		       CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
-		       flash_get_info(CONFIG_ENV_ADDR));
+		      CONFIG_ENV_ADDR,
+		      CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
+		      flash_get_info(CONFIG_ENV_ADDR));
 #endif
 
 	/* Redundant environment protection ON by default */
 #ifdef CONFIG_ENV_ADDR_REDUND
 	flash_protect(FLAG_PROTECT_SET,
-		       CONFIG_ENV_ADDR_REDUND,
-		       CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
-		       flash_get_info(CONFIG_ENV_ADDR_REDUND));
+		      CONFIG_ENV_ADDR_REDUND,
+		      CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
+		      flash_get_info(CONFIG_ENV_ADDR_REDUND));
 #endif
 
 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
@@ -2358,9 +2356,9 @@ static void flash_protect_default(void)
 		debug("autoprotecting from %08lx to %08lx\n",
 		      apl[i].start, apl[i].start + apl[i].size - 1);
 		flash_protect(FLAG_PROTECT_SET,
-			       apl[i].start,
-			       apl[i].start + apl[i].size - 1,
-			       flash_get_info(apl[i].start));
+			      apl[i].start,
+			      apl[i].start + apl[i].size - 1,
+			      flash_get_info(apl[i].start));
 	}
 #endif
 }
@@ -2396,8 +2394,8 @@ unsigned long flash_init(void)
 #ifndef CONFIG_SYS_FLASH_QUIET_TEST
 			printf("## Unknown flash on Bank %d ", i + 1);
 			printf("- Size = 0x%08lx = %ld MB\n",
-				flash_info[i].size,
-				flash_info[i].size >> 20);
+			       flash_info[i].size,
+			       flash_info[i].size >> 20);
 #endif /* CONFIG_SYS_FLASH_QUIET_TEST */
 		}
 #ifdef CONFIG_SYS_FLASH_PROTECTION
@@ -2441,10 +2439,10 @@ unsigned long flash_init(void)
 				 * No legancy unlocking -> unlock all sectors
 				 */
 				flash_protect(FLAG_PROTECT_CLEAR,
-					       flash_info[i].start[0],
-					       flash_info[i].start[0]
-					       + flash_info[i].size - 1,
-					       &flash_info[i]);
+					      flash_info[i].start[0],
+					      flash_info[i].start[0]
+					      + flash_info[i].size - 1,
+					      &flash_info[i]);
 			}
 		}
 #endif /* CONFIG_SYS_FLASH_PROTECTION */

commit e1eaec7f77b643c61318b00f2a7c2398fd509d6c
Author: Mario Six <mario.six@gdsys.cc>
Date:   Fri Jan 26 14:43:54 2018 +0100

    UPSTREAM: cfi_flash: Fix long lines
    
    Long lines (>80 characters) should be avoided where possible. Break up
    some long lines where it's not detrimental to readability.
    
    Change-Id: I61c2b555c290fd9142ed7f3558e7e6e7ce95660a
    Signed-off-by: Mario Six <mario.six@gdsys.cc>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit ddcf05403dc2524e6aa8503e55cf5dc85afa13da)

diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index 61c2e6379d..88c47cad90 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -175,7 +175,8 @@ __maybe_weak u64 flash_read64(void *addr)
 
 /*-----------------------------------------------------------------------
  */
-#if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
+#if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || \
+	(CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
 static flash_info_t *flash_get_info(ulong base)
 {
 	int i;
@@ -569,8 +570,9 @@ static int flash_status_check(flash_info_t *info, flash_sect_t sector,
 	ulong start;
 
 #if CONFIG_SYS_HZ != 1000
+	/* Avoid overflow for large HZ */
 	if ((ulong)CONFIG_SYS_HZ > 100000)
-		tout *= (ulong)CONFIG_SYS_HZ / 1000;  /* for a big HZ, avoid overflow */
+		tout *= (ulong)CONFIG_SYS_HZ / 1000;
 	else
 		tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
 #endif
@@ -661,8 +663,9 @@ static int flash_status_poll(flash_info_t *info, void *src, void *dst,
 	int ready;
 
 #if CONFIG_SYS_HZ != 1000
+	/* Avoid overflow for large HZ */
 	if ((ulong)CONFIG_SYS_HZ > 100000)
-		tout *= (ulong)CONFIG_SYS_HZ / 1000;  /* for a big HZ, avoid overflow */
+		tout *= (ulong)CONFIG_SYS_HZ / 1000;
 	else
 		tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
 #endif
@@ -937,7 +940,8 @@ static int flash_write_cfibuffer(flash_info_t *info, ulong dest, uchar *cp,
 	case CFI_CMDSET_INTEL_STANDARD:
 	case CFI_CMDSET_INTEL_EXTENDED:
 		write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
-					FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER;
+			    FLASH_CMD_WRITE_BUFFER_PROG :
+			    FLASH_CMD_WRITE_TO_BUFFER;
 		flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
 		flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
 		flash_write_cmd(info, sector, 0, write_cmd);
@@ -1152,7 +1156,8 @@ int flash_erase(flash_info_t *info, int s_first, int s_last)
 				cword.w64 = 0xffffffffffffffffULL;
 				dest = flash_map(info, sect, 0);
 				st = flash_status_poll(info, &cword, dest,
-						       info->erase_blk_tout, "erase");
+						       info->erase_blk_tout,
+						       "erase");
 				flash_unmap(info, sect, 0, dest);
 			} else {
 				st = flash_full_status_check(info, sect,
@@ -1561,9 +1566,11 @@ int flash_real_protect(flash_info_t *info, long sector, int prot)
 		flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
 		flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
 		if (prot)
-			flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_SET);
+			flash_write_cmd(info, sector, 0,
+					FLASH_CMD_PROTECT_SET);
 		else
-			flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
+			flash_write_cmd(info, sector, 0,
+					FLASH_CMD_PROTECT_CLEAR);
 #endif
 	};
 
@@ -1899,9 +1906,9 @@ static int __flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry)
 		flash_write_cmd(info, 0, flash_offset_cfi[cfi_offset],
 				 FLASH_CMD_CFI);
 		if (flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP, 'Q') &&
-			flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') &&
-			flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
-			flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
+		    flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') &&
+		    flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
+		    flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
 					sizeof(struct cfi_qry));
 			info->interface	= le16_to_cpu(qry->interface_desc);
 
@@ -2182,8 +2189,8 @@ ulong flash_get_size(phys_addr_t base, int banknum)
 			tmp >>= 16;
 			erase_region_size =
 				(tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
-			debug("erase_region_count = %d erase_region_size = %d\n",
-				erase_region_count, erase_region_size);
+			debug("erase_region_count = %d ", erase_region_count);
+			debug("erase_region_size = %d\n", erase_region_size);
 			for (j = 0; j < erase_region_count; j++) {
 				if (sector - base >= info->size)
 					break;

commit 73c05012bc461060d48a3ac059956130e2ce6354
Author: Mario Six <mario.six@gdsys.cc>
Date:   Fri Jan 26 14:43:53 2018 +0100

    UPSTREAM: cfi_flash: Bound-check index before array access
    
    In a while loop in cfi_flash.c the array "start" is accessed at the index
    "sector" before the index variable "sector" is bounds-checked, which
    might lead to accesses beyond the bounds of the array.
    
    Swap the order of the checks in the "&&" expression, so that the
    short-circuit evaluation prevents out-of-bounds array accesses.
    
    Change-Id: I3d527b92af4dc6b71d442d196ab051dbb46d98cb
    Signed-off-by: Mario Six <mario.six@gdsys.cc>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 5701ba82894d679eb42df5d0b93a2d44b3df695d)

diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index 5ba0c5fdec..61c2e6379d 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -761,8 +761,8 @@ static flash_sect_t find_sector(flash_info_t *info, ulong addr)
 	if (info != saved_info || sector >= info->sector_count)
 		sector = 0;
 
-	while ((info->start[sector] < addr) &&
-		(sector < info->sector_count - 1))
+	while ((sector < info->sector_count - 1) &&
+		(info->start[sector] < addr))
 		sector++;
 	while ((info->start[sector] > addr) && (sector > 0))
 		/*

commit 5acabbc59d20513a2d34ac787529e250d03978c3
Author: Mario Six <mario.six@gdsys.cc>
Date:   Fri Jan 26 14:43:52 2018 +0100

    UPSTREAM: flash: Fix spelling of "ERR_TIMOUT"
    
    checkpatch.pl complains about the spelling of ERR_TIMOUT. Since the
    error is only used in a handful of files, we rename the error to
    ERR_TIMEOUT.
    
    Change-Id: If99b9c4f75aa0582da432b748a723e477e22759c
    Signed-off-by: Mario Six <mario.six@gdsys.cc>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 9dbaebcf9f401c5dcea762e34a3dc8ed10760623)

diff --git a/board/cobra5272/flash.c b/board/cobra5272/flash.c
index 4fac6880f1..ca27b49a3b 100644
--- a/board/cobra5272/flash.c
+++ b/board/cobra5272/flash.c
@@ -216,7 +216,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last)
 				goto outahere;
 			}
 			if (chip1 == TMO) {
-				rc = ERR_TIMOUT;
+				rc = ERR_TIMEOUT;
 				goto outahere;
 			}
 
diff --git a/common/flash.c b/common/flash.c
index 587ef60158..876677493f 100644
--- a/common/flash.c
+++ b/common/flash.c
@@ -112,7 +112,7 @@ addr2info (ulong addr)
  * and no protected sectors are hit.
  * Returns:
  * ERR_OK          0 - OK
- * ERR_TIMOUT      1 - write timeout
+ * ERR_TIMEOUT     1 - write timeout
  * ERR_NOT_ERASED  2 - Flash not erased
  * ERR_PROTECTED   4 - target range includes protected sectors
  * ERR_INVAL       8 - target address not in Flash memory
@@ -185,7 +185,7 @@ void flash_perror (int err)
 	switch (err) {
 	case ERR_OK:
 		break;
-	case ERR_TIMOUT:
+	case ERR_TIMEOUT:
 		puts ("Timeout writing to Flash\n");
 		break;
 	case ERR_NOT_ERASED:
diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index e94a7269e1..5ba0c5fdec 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -588,7 +588,7 @@ static int flash_status_check(flash_info_t *info, flash_sect_t sector,
 				flash_read_long(info, sector, 0));
 			flash_write_cmd(info, sector, 0, info->cmd_reset);
 			udelay(1);
-			return ERR_TIMOUT;
+			return ERR_TIMEOUT;
 		}
 		udelay(1);		/* also triggers watchdog */
 	}
@@ -696,7 +696,7 @@ static int flash_status_poll(flash_info_t *info, void *src, void *dst,
 		if (get_timer(start) > tout) {
 			printf("Flash %s timeout at address %lx data %lx\n",
 			       prompt, (ulong)dst, (ulong)flash_read8(dst));
-			return ERR_TIMOUT;
+			return ERR_TIMEOUT;
 		}
 		udelay(1);		/* also triggers watchdog */
 	}
diff --git a/drivers/mtd/pic32_flash.c b/drivers/mtd/pic32_flash.c
index 8bbf2fa9a2..d908387866 100644
--- a/drivers/mtd/pic32_flash.c
+++ b/drivers/mtd/pic32_flash.c
@@ -69,7 +69,7 @@ static int flash_wait_till_busy(const char *func, ulong timeout)
 	int ret = wait_for_bit_le32(&nvm_regs_p->ctrl.raw,
 				    NVM_WR, false, timeout, false);
 
-	return ret ? ERR_TIMOUT : ERR_OK;
+	return ret ? ERR_TIMEOUT : ERR_OK;
 }
 
 static inline int flash_complete_operation(void)
@@ -99,7 +99,7 @@ static inline int flash_complete_operation(void)
  * Erase flash sectors, returns:
  * ERR_OK - OK
  * ERR_INVAL - invalid sector arguments
- * ERR_TIMOUT - write timeout
+ * ERR_TIMEOUT - write timeout
  * ERR_NOT_ERASED - Flash not erased
  * ERR_UNKNOWN_FLASH_VENDOR - incorrect flash
  */
@@ -217,7 +217,7 @@ static int write_word(flash_info_t *info, ulong dest, ulong word)
 /*
  * Copy memory to flash, returns:
  * ERR_OK - OK
- * ERR_TIMOUT - write timeout
+ * ERR_TIMEOUT - write timeout
  * ERR_NOT_ERASED - Flash not erased
  */
 int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
diff --git a/include/flash.h b/include/flash.h
index dc67cb2df6..1a4e879009 100644
--- a/include/flash.h
+++ b/include/flash.h
@@ -122,7 +122,7 @@ extern int jedec_flash_match(flash_info_t *info, ulong base);
  * return codes from flash_write():
  */
 #define ERR_OK				0
-#define ERR_TIMOUT			1
+#define ERR_TIMEOUT			1
 #define ERR_NOT_ERASED			2
 #define ERR_PROTECTED			4
 #define ERR_INVAL			8

commit c06cb860ce2be8bc09f3646d1fb91188c40ec414
Author: Mario Six <mario.six@gdsys.cc>
Date:   Fri Jan 26 14:43:51 2018 +0100

    UPSTREAM: cfi_flash: Rename camel-case variables
    
    Camel-case naming should be avoided. Rename two camel-case variables,
    and fix their usage accordingly.
    
    Change-Id: Iff7bf46bd2c0911314a7b3097ed34886a1ed7887
    Signed-off-by: Mario Six <mario.six@gdsys.cc>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit c8a9a82c10e0c55f6cfa71cb174968cb54acfa5d)

diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index 8040e43de7..e94a7269e1 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -1687,8 +1687,8 @@ static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
 
 static void cmdset_amd_read_jedec_ids(flash_info_t *info)
 {
-	ushort bankId = 0;
-	uchar  manuId;
+	ushort bank_id = 0;
+	uchar  manu_id;
 	uchar  feature;
 
 	flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
@@ -1696,14 +1696,14 @@ static void cmdset_amd_read_jedec_ids(flash_info_t *info)
 	flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
 	udelay(1000); /* some flash are slow to respond */
 
-	manuId = flash_read_uchar(info, FLASH_OFFSET_MANUFACTURER_ID);
+	manu_id = flash_read_uchar(info, FLASH_OFFSET_MANUFACTURER_ID);
 	/* JEDEC JEP106Z specifies ID codes up to bank 7 */
-	while (manuId == FLASH_CONTINUATION_CODE && bankId < 0x800) {
-		bankId += 0x100;
-		manuId = flash_read_uchar(info,
-			bankId | FLASH_OFFSET_MANUFACTURER_ID);
+	while (manu_id == FLASH_CONTINUATION_CODE && bank_id < 0x800) {
+		bank_id += 0x100;
+		manu_id = flash_read_uchar(info,
+			bank_id | FLASH_OFFSET_MANUFACTURER_ID);
 	}
-	info->manufacturer_id = manuId;
+	info->manufacturer_id = manu_id;
 
 	debug("info->ext_addr = 0x%x, cfi_version = 0x%x\n",
 	      info->ext_addr, info->cfi_version);

commit f832bdc433bea31e47a62b79bec04beed9e4fbad
Author: Mario Six <mario.six@gdsys.cc>
Date:   Fri Jan 26 14:43:50 2018 +0100

    UPSTREAM: cfi_flash: Fix strings split across lines
    
    Strings should not be split accross multiple lines. Where possible and
    not detrimental to readability, fix the instances where this occurs.
    
    Change-Id: I27b78724fcb8e6c77bd490d30792a39d1c819e5a
    Signed-off-by: Mario Six <mario.six@gdsys.cc>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 876c52f3c35738eab091c0ef2fad28d8cbaa2c5f)

diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index fced9847ef..8040e43de7 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -1255,10 +1255,9 @@ void flash_print_info(flash_info_t *info)
 		info->erase_blk_tout,
 		info->write_tout);
 	if (info->buffer_size > 1) {
-		printf("  Buffer write timeout: %ld ms, "
-			"buffer size: %d bytes\n",
-		info->buffer_write_tout,
-		info->buffer_size);
+		printf("  Buffer write timeout: %ld ms, ",
+			info->buffer_write_tout);
+		printf("buffer size: %d bytes\n", info->buffer_size);
 	}
 
 	puts("\n  Sector Start Addresses:");
@@ -2050,8 +2049,8 @@ static void flash_fixup_num(flash_info_t *info, struct cfi_qry *qry)
 			info->device_id2 == 0x2301 ||
 			info->device_id2 == 0x2801 ||
 			info->device_id2 == 0x4801)) {
-		debug("Adjusted buffer size on Numonyx flash"
-			" M29EW family in 8 bit mode\n");
+		debug("Adjusted buffer size on Numonyx flash");
+		debug(" M29EW family in 8 bit mode\n");
 		qry->max_buf_write_size = 0x8;
 	}
 }
@@ -2388,9 +2387,9 @@ unsigned long flash_init(void)
 		size += flash_info[i].size;
 		if (flash_info[i].flash_id == FLASH_UNKNOWN) {
 #ifndef CONFIG_SYS_FLASH_QUIET_TEST
-			printf("## Unknown flash on Bank %d "
-				"- Size = 0x%08lx = %ld MB\n",
-				i + 1, flash_info[i].size,
+			printf("## Unknown flash on Bank %d ", i + 1);
+			printf("- Size = 0x%08lx = %ld MB\n",
+				flash_info[i].size,
 				flash_info[i].size >> 20);
 #endif /* CONFIG_SYS_FLASH_QUIET_TEST */
 		}

commit f97a5a7d32eb1b5a8eedb973fee28a03838f8833
Author: Mario Six <mario.six@gdsys.cc>
Date:   Fri Jan 26 14:43:49 2018 +0100

    UPSTREAM: cfi_flash: Use u8 pointers instead of void pointers
    
    According to the C standard, pointer arithmetic for pointers of type
    void is undefined behavior (the assumption that they're 8-bit wide is a
    GCC-specific assumption). In the interest of keeping the code
    standards-compliant, and also better communicate intent, switch all
    void* variables where pointer arithmetic is used to u8* variables.
    
    Change-Id: Ie87afb412bb440dbbe374d65680ca1cf2467e02e
    Signed-off-by: Mario Six <mario.six@gdsys.cc>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 5312838dd5b3959907d6c4f0ec3e04954210fafc)

diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index 48086ded5c..fced9847ef 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -491,7 +491,7 @@ static int flash_isset(flash_info_t *info, flash_sect_t sect,
 static int flash_toggle(flash_info_t *info, flash_sect_t sect,
 			 uint offset, uchar cmd)
 {
-	void *addr;
+	u8 *addr;
 	cfiword_t cword;
 	int retval;
 
@@ -872,9 +872,9 @@ static int flash_write_cfibuffer(flash_info_t *info, ulong dest, uchar *cp,
 	flash_sect_t sector;
 	int cnt;
 	int retcode;
-	void *src = cp;
-	void *dst = (void *)dest;
-	void *dst2 = dst;
+	u8 *src = cp;
+	u8 *dst = (u8 *)dest;
+	u8 *dst2 = dst;
 	int flag = 1;
 	uint offset = 0;
 	unsigned int shift;

commit 157fef687832668328019f3becdd82f5be333bf3
Author: Mario Six <mario.six@gdsys.cc>
Date:   Fri Jan 26 14:43:48 2018 +0100

    UPSTREAM: cfi_flash: Remove assignments from if conditions
    
    The condition in if statements should not be used for variable
    assignment. Instead, the assignment should be done in a separate step
    beforehand. Fix all instances where this occurs.
    
    Change-Id: I66229554513321ab62f2e94e50e3dd64f322fc3a
    Signed-off-by: Mario Six <mario.six@gdsys.cc>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit d3525b6bb0c39de537f0d2e79bb9ab9ad8fd8bf5)

diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index d16357343f..48086ded5c 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -1339,7 +1339,8 @@ int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
 	wp = (addr & ~(info->portwidth - 1));
 
 	/* handle unaligned start */
-	if ((aln = addr - wp) != 0) {
+	aln = addr - wp;
+	if (aln != 0) {
 		cword.w32 = 0;
 		p = (uchar *)wp;
 		for (i = 0; i < aln; ++i)
@@ -1370,7 +1371,8 @@ int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
 			cword.w32 = 0;
 			for (i = 0; i < info->portwidth; i++)
 				flash_add_byte(info, &cword, *src++);
-			if ((rc = flash_write_cfiword(info, wp, cword)) != 0)
+			rc = flash_write_cfiword(info, wp, cword);
+			if (rc != 0)
 				return rc;
 			wp += info->portwidth;
 			cnt -= info->portwidth;
@@ -1381,7 +1383,8 @@ int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
 		i = buffered_size - (wp % buffered_size);
 		if (i > cnt)
 			i = cnt;
-		if ((rc = flash_write_cfibuffer(info, wp, src, i)) != ERR_OK)
+		rc = flash_write_cfibuffer(info, wp, src, i);
+		if (rc != ERR_OK)
 			return rc;
 		i -= i & (info->portwidth - 1);
 		wp += i;
@@ -1397,7 +1400,8 @@ int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
 		cword.w32 = 0;
 		for (i = 0; i < info->portwidth; i++)
 			flash_add_byte(info, &cword, *src++);
-		if ((rc = flash_write_cfiword(info, wp, cword)) != 0)
+		rc = flash_write_cfiword(info, wp, cword);
+		if (rc != 0)
 			return rc;
 		wp += info->portwidth;
 		cnt -= info->portwidth;
@@ -1569,9 +1573,9 @@ int flash_real_protect(flash_info_t *info, long sector, int prot)
 	 * flash_full_status_check() to work correctly
 	 */
 	flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
-	if ((retcode =
-	     flash_full_status_check(info, sector, info->erase_blk_tout,
-				      prot ? "protect" : "unprotect")) == 0) {
+	retcode = flash_full_status_check(info, sector, info->erase_blk_tout,
+				      prot ? "protect" : "unprotect");
+	if (retcode == 0) {
 		info->protect[sector] = prot;
 
 		/*

commit fbe2879c5d0f7e6200bf7d4f834569deaf29781c
Author: Mario Six <mario.six@gdsys.cc>
Date:   Fri Jan 26 14:43:47 2018 +0100

    UPSTREAM: cfi_flash: Remove return from void function
    
    void functions don't need an explicit return at the end.
    
    Change-Id: I40c15dde8c217b5357c1d94fa8268b26d56db098
    Signed-off-by: Mario Six <mario.six@gdsys.cc>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit ab61cfb857a14c4dd90a5d11c2f3064c28d5b3a1)

diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index 7aa379b0d8..d16357343f 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -1280,7 +1280,6 @@ void flash_print_info(flash_info_t *info)
 #endif
 	}
 	putc('\n');
-	return;
 }
 
 /*-----------------------------------------------------------------------

commit ee66e86483cfdabe52f39503ea350bcae982aed1
Author: Mario Six <mario.six@gdsys.cc>
Date:   Fri Jan 26 14:43:46 2018 +0100

    UPSTREAM: cfi_flash: Fix placement of brace
    
    The opening brace of block statements should be attached to the
    statement itself, and not be on a separate line.
    
    Change-Id: I3be9ccbb53b8362f1316ab905b0be8acb20652af
    Signed-off-by: Mario Six <mario.six@gdsys.cc>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 0cec0a12f9dba584ccf264329735819f8b04a66c)

diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index 5b3c071b30..7aa379b0d8 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -1925,8 +1925,7 @@ static int __flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry)
 				info->interface == FLASH_CFI_X8X16) ||
 			    /* x16/x32 in x16 mode */
 			    (info->chipwidth == FLASH_CFI_BY16 &&
-				info->interface == FLASH_CFI_X16X32))
-			{
+				info->interface == FLASH_CFI_X16X32)) {
 				info->addr_unlock1 = 0xaaa;
 				info->addr_unlock2 = 0x555;
 			}

commit 286741e5c32115e8901ab21e6e04081d0ef4cd40
Author: Mario Six <mario.six@gdsys.cc>
Date:   Fri Jan 26 14:43:45 2018 +0100

    UPSTREAM: cfi_flash: Fix else after break
    
    If in a loop, the if block in a if/else statement ends in a break, the
    statements in the else blockcan be extracted, since the break stops the
    execution.
    
    Change-Id: Iaed92e93ab451b38a6ea5cf0ed216d3fd39140cb
    Signed-off-by: Mario Six <mario.six@gdsys.cc>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 9860137fbcbacfb91069194f9635af0ed8288456)

diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index 4c5e1568e6..5b3c071b30 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -1826,9 +1826,9 @@ static int flash_detect_legacy(phys_addr_t base, int banknum)
 						info->device_id2);
 				if (jedec_flash_match(info, info->start[0]))
 					break;
-				else
-					unmap_physmem((void *)info->start[0],
-						      info->portwidth);
+
+				unmap_physmem((void *)info->start[0],
+					      info->portwidth);
 			}
 		}
 

commit 0b1895ab0e0481edb18c05d7d218c7cd41e4d3b7
Author: Mario Six <mario.six@gdsys.cc>
Date:   Fri Jan 26 14:43:44 2018 +0100

    UPSTREAM: cfi_flash: Fix spelling of "Unknown"
    
    "Unkown" should be spelled "Unknown".
    
    Change-Id: I413087b08c11f177b582d1b36ebe4a226deab0f9
    Signed-off-by: Mario Six <mario.six@gdsys.cc>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 9f720216b746f29606955baca9bf7211e35aaa53)

diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index 53842443eb..4c5e1568e6 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -1140,7 +1140,7 @@ int flash_erase(flash_info_t *info, int s_first, int s_last)
 				break;
 #endif
 			default:
-				debug("Unkown flash vendor %d\n",
+				debug("Unknown flash vendor %d\n",
 				       info->vendor);
 				break;
 			}

commit 55356386a14f7c2f58e871fc294d7aa7dabf2e6e
Author: Mario Six <mario.six@gdsys.cc>
Date:   Fri Jan 26 14:43:43 2018 +0100

    UPSTREAM: cfi_flash: Add missing braces in blocks
    
    In if/else statements, either both blocks (if and else) should have
    braces or both blocks should not have braces, but mixed configurations
    are discouraged. Fix all instances where this occurs.
    
    Change-Id: I1b0232befa41199646d4c39c4d9f574811f22e50
    Signed-off-by: Mario Six <mario.six@gdsys.cc>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 12d7fed9b9ea1ad6646fd4724ccffa27e043f09b)

diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index 0a24e9173a..53842443eb 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -1154,10 +1154,12 @@ int flash_erase(flash_info_t *info, int s_first, int s_last)
 				st = flash_status_poll(info, &cword, dest,
 						       info->erase_blk_tout, "erase");
 				flash_unmap(info, sect, 0, dest);
-			} else
+			} else {
 				st = flash_full_status_check(info, sect,
 							     info->erase_blk_tout,
 							     "erase");
+			}
+
 			if (st)
 				rcode = 1;
 			else if (flash_verbose)

commit 2c503658ff110b875668bbb485c103aa11cc0ede
Author: Mario Six <mario.six@gdsys.cc>
Date:   Fri Jan 26 14:43:42 2018 +0100

    UPSTREAM: cfi_flash: Remove unnecessary braces
    
    "==" and "!=" bind tighter than the boolean operators, so parentheses
    around them in compound logical statements are unnecessary. Fix all
    instances where this occurs.
    
    Change-Id: I0a65785c58aaf17b7544a844f3023f285854b7d7
    Signed-off-by: Mario Six <mario.six@gdsys.cc>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 4f89da49e728653fbf4ac5d9b741be4f61496b25)

diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index a21c407ed7..0a24e9173a 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -611,7 +611,7 @@ static int flash_full_status_check(flash_info_t *info, flash_sect_t sector,
 	case CFI_CMDSET_INTEL_PROG_REGIONS:
 	case CFI_CMDSET_INTEL_EXTENDED:
 	case CFI_CMDSET_INTEL_STANDARD:
-		if ((retcode == ERR_OK) &&
+		if (retcode == ERR_OK &&
 			!flash_isset(info, sector, 0, FLASH_STATUS_DONE)) {
 			retcode = ERR_INVAL;
 			printf("Flash %s error at address %lx\n", prompt,
@@ -758,7 +758,7 @@ static flash_sect_t find_sector(flash_info_t *info, ulong addr)
 	static flash_info_t *saved_info; /* previously used flash bank */
 	flash_sect_t sector = saved_sector;
 
-	if ((info != saved_info) || (sector >= info->sector_count))
+	if (info != saved_info || sector >= info->sector_count)
 		sector = 0;
 
 	while ((info->start[sector] < addr) &&
@@ -1059,7 +1059,7 @@ int flash_erase(flash_info_t *info, int s_first, int s_last)
 		puts("Can't erase unknown flash type - aborted\n");
 		return 1;
 	}
-	if ((s_first < 0) || (s_first > s_last)) {
+	if (s_first < 0 || s_first > s_last) {
 		puts("- no sectors to erase\n");
 		return 1;
 	}
@@ -1247,7 +1247,7 @@ void flash_print_info(flash_info_t *info)
 		printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
 		info->device_id2);
 	}
-	if ((info->vendor == CFI_CMDSET_AMD_STANDARD) && (info->legacy_unlock))
+	if (info->vendor == CFI_CMDSET_AMD_STANDARD && info->legacy_unlock)
 		printf("\n  Advanced Sector Protection (PPB) enabled");
 	printf("\n  Erase timeout: %ld ms, write timeout: %ld ms\n",
 		info->erase_blk_tout,
@@ -1291,7 +1291,7 @@ void flash_print_info(flash_info_t *info)
 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
 	if (flash_verbose) { \
 		dots -= dots_sub; \
-		if ((scale > 0) && (dots <= 0)) { \
+		if (scale > 0 && dots <= 0) { \
 			if ((digit % 5) == 0) \
 				printf("%d", digit / 5); \
 			else \
@@ -1577,7 +1577,7 @@ int flash_real_protect(flash_info_t *info, long sector, int prot)
 		 * On some of Intel's flash chips (marked via legacy_unlock)
 		 * unprotect unprotects all locking.
 		 */
-		if ((prot == 0) && (info->legacy_unlock)) {
+		if (prot == 0 && info->legacy_unlock) {
 			flash_sect_t i;
 
 			for (i = 0; i < info->sector_count; i++) {
@@ -1636,10 +1636,10 @@ static void cfi_reverse_geometry(struct cfi_qry *qry)
 	u32 tmp;
 
 	for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
-		tmp = get_unaligned(&(qry->erase_region_info[i]));
-		put_unaligned(get_unaligned(&(qry->erase_region_info[j])),
-			      &(qry->erase_region_info[i]));
-		put_unaligned(tmp, &(qry->erase_region_info[j]));
+		tmp = get_unaligned(&qry->erase_region_info[i]);
+		put_unaligned(get_unaligned(&qry->erase_region_info[j]),
+			      &qry->erase_region_info[i]);
+		put_unaligned(tmp, &qry->erase_region_info[j]);
 	}
 }
 
@@ -1919,11 +1919,11 @@ static int __flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry)
 			 * in compatibility mode
 			 */
 			if (/* x8/x16 in x8 mode */
-			    ((info->chipwidth == FLASH_CFI_BY8) &&
-				(info->interface == FLASH_CFI_X8X16)) ||
+			    (info->chipwidth == FLASH_CFI_BY8 &&
+				info->interface == FLASH_CFI_X8X16) ||
 			    /* x16/x32 in x16 mode */
-			    ((info->chipwidth == FLASH_CFI_BY16) &&
-				(info->interface == FLASH_CFI_X16X32)))
+			    (info->chipwidth == FLASH_CFI_BY16 &&
+				info->interface == FLASH_CFI_X16X32))
 			{
 				info->addr_unlock1 = 0xaaa;
 				info->addr_unlock2 = 0x555;
@@ -2040,8 +2040,8 @@ static void flash_fixup_num(flash_info_t *info, struct cfi_qry *qry)
 	 * There's an app note from Numonyx on this issue.
 	 * So adjust the buffer size for M29EW while operating in 8-bit mode
 	 */
-	if (((qry->max_buf_write_size) > 0x8) &&
-			(info->device_id == 0x7E) &&
+	if (qry->max_buf_write_size > 0x8 &&
+			info->device_id == 0x7E &&
 			(info->device_id2 == 0x2201 ||
 			info->device_id2 == 0x2301 ||
 			info->device_id2 == 0x2801 ||
@@ -2081,8 +2081,8 @@ ulong flash_get_size(phys_addr_t base, int banknum)
 	info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
 
 	if (flash_detect_cfi(info, &qry)) {
-		info->vendor = le16_to_cpu(get_unaligned(&(qry.p_id)));
-		info->ext_addr = le16_to_cpu(get_unaligned(&(qry.p_adr)));
+		info->vendor = le16_to_cpu(get_unaligned(&qry.p_id));
+		info->ext_addr = le16_to_cpu(get_unaligned(&qry.p_adr));
 		num_erase_regions = qry.num_erase_regions;
 
 		if (info->ext_addr) {
@@ -2146,8 +2146,8 @@ ulong flash_get_size(phys_addr_t base, int banknum)
 
 		size_ratio = info->portwidth / info->chipwidth;
 		/* if the chip is x8/x16 reduce the ratio by half */
-		if ((info->interface == FLASH_CFI_X8X16) &&
-			(info->chipwidth == FLASH_CFI_BY8)) {
+		if (info->interface == FLASH_CFI_X8X16 &&
+			info->chipwidth == FLASH_CFI_BY8) {
 			size_ratio >>= 1;
 		}
 		debug("size_ratio %d port %d bits chip %d bits\n",
@@ -2157,7 +2157,7 @@ ulong flash_get_size(phys_addr_t base, int banknum)
 		/* multiply the size by the number of chips */
 		info->size *= size_ratio;
 		max_size = cfi_flash_bank_size(banknum);
-		if (max_size && (info->size > max_size)) {
+		if (max_size && info->size > max_size) {
 			debug("[truncated from %ldMiB]", info->size >> 20);
 			info->size = max_size;
 		}
@@ -2172,7 +2172,7 @@ ulong flash_get_size(phys_addr_t base, int banknum)
 			}
 
 			tmp = le32_to_cpu(get_unaligned(
-						&(qry.erase_region_info[i])));
+						&qry.erase_region_info[i]));
 			debug("erase region %u: 0x%08lx\n", i, tmp);
 
 			erase_region_count = (tmp & 0xffff) + 1;
@@ -2261,8 +2261,8 @@ ulong flash_get_size(phys_addr_t base, int banknum)
 		/* round up when converting to ms */
 		info->write_tout = (tmp + 999) / 1000;
 		info->flash_id = FLASH_MAN_CFI;
-		if ((info->interface == FLASH_CFI_X8X16) &&
-		    (info->chipwidth == FLASH_CFI_BY8)) {
+		if (info->interface == FLASH_CFI_X8X16 &&
+		    info->chipwidth == FLASH_CFI_BY8) {
 			/* XXX - Need to test on x8/x16 in parallel. */
 			info->portwidth >>= 1;
 		}

commit 799ca3be036d2334b074961bdf83bb6001fe4078
Author: Mario Six <mario.six@gdsys.cc>
Date:   Fri Jan 26 14:43:41 2018 +0100

    UPSTREAM: cfi_flash: Fix comment style
    
    Comment blocks should end with a "*/" on a separate line, not with the
    "*/" attached to the end of the last line of text. Fix all instances
    where this occurs.
    
    Change-Id: If8d6a5d95f085adb021a661b18504f7bca729398
    Signed-off-by: Mario Six <mario.six@gdsys.cc>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit a6d18f27c330a3d548625401ba898ca4f9718d7a)

diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index 6ae1ac871f..a21c407ed7 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -946,7 +946,8 @@ static int flash_write_cfibuffer(flash_info_t *info, ulong dest, uchar *cp,
 					      "write to buffer");
 		if (retcode == ERR_OK) {
 			/* reduce the number of loops by the width of
-			 * the port */
+			 * the port
+			 */
 			cnt = len >> shift;
 			flash_write_cmd(info, sector, 0, cnt - 1);
 			while (cnt-- > 0) {
@@ -1793,7 +1794,8 @@ static int flash_detect_legacy(phys_addr_t base, int banknum)
 
 	if (board_flash_get_legacy(base, banknum, info)) {
 		/* board code may have filled info completely. If not, we
-		   use JEDEC ID probing. */
+		 * use JEDEC ID probing.
+		 */
 		if (!info->vendor) {
 			int modes[] = {
 				CFI_CMDSET_AMD_STANDARD,

commit 7b160f459feac7358a4d559e60b205f17951b523
Author: Mario Six <mario.six@gdsys.cc>
Date:   Fri Jan 26 14:43:40 2018 +0100

    UPSTREAM: cfi_flash: Use __func__ macro instead of function name
    
    printf/debug statements should not include the file name as a hardcoded
    string, but instead use the __func__ macro. Fix all instances where this
    occurs.
    
    Change-Id: Idf525ba89c83346ba836a078d8bc635e39393c80
    Signed-off-by: Mario Six <mario.six@gdsys.cc>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 38d2831d3b1bc618c36fcba855368e9ac239f3cc)

diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index eebd641e36..6ae1ac871f 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -555,7 +555,7 @@ static int flash_is_busy(flash_info_t *info, flash_sect_t sect)
 	default:
 		retval = 0;
 	}
-	debug("flash_is_busy: %d\n", retval);
+	debug("%s: %d\n", __func__, retval);
 	return retval;
 }
 

commit 396774bdb82cd63d567841be14fd17c93200a92e
Author: Mario Six <mario.six@gdsys.cc>
Date:   Fri Jan 26 14:43:39 2018 +0100

    UPSTREAM: cfi_flash: Fix logical continuations
    
    When splitting long logical statements across multiple lines, the
    logical operators should be at the end of the lines. Fix all instances
    where this occurs.
    
    Change-Id: I8f6945a4aca9d58297d4143507506504100968d9
    Signed-off-by: Mario Six <mario.six@gdsys.cc>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 88ecd8bf7cf04f2c08a1bcec862085e63f644efb)

diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index e2469055b8..eebd641e36 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -611,8 +611,8 @@ static int flash_full_status_check(flash_info_t *info, flash_sect_t sector,
 	case CFI_CMDSET_INTEL_PROG_REGIONS:
 	case CFI_CMDSET_INTEL_EXTENDED:
 	case CFI_CMDSET_INTEL_STANDARD:
-		if ((retcode == ERR_OK)
-		    && !flash_isset(info, sector, 0, FLASH_STATUS_DONE)) {
+		if ((retcode == ERR_OK) &&
+			!flash_isset(info, sector, 0, FLASH_STATUS_DONE)) {
 			retcode = ERR_INVAL;
 			printf("Flash %s error at address %lx\n", prompt,
 				info->start[sector]);
@@ -761,8 +761,8 @@ static flash_sect_t find_sector(flash_info_t *info, ulong addr)
 	if ((info != saved_info) || (sector >= info->sector_count))
 		sector = 0;
 
-	while ((info->start[sector] < addr)
-			&& (sector < info->sector_count - 1))
+	while ((info->start[sector] < addr) &&
+		(sector < info->sector_count - 1))
 		sector++;
 	while ((info->start[sector] > addr) && (sector > 0))
 		/*
@@ -1435,8 +1435,8 @@ static inline int manufact_match(flash_info_t *info, u32 manu)
 
 static int cfi_protect_bugfix(flash_info_t *info, long sector, int prot)
 {
-	if (manufact_match(info, INTEL_MANUFACT)
-	    && info->device_id == NUMONYX_256MBIT) {
+	if (manufact_match(info, INTEL_MANUFACT) &&
+		info->device_id == NUMONYX_256MBIT) {
 		/*
 		 * see errata called
 		 * "Numonyx Axcell P33/P30 Specification Update" :)
@@ -1807,8 +1807,8 @@ static int flash_detect_legacy(phys_addr_t base, int banknum)
 					(ulong)map_physmem(base,
 							   info->portwidth,
 							   MAP_NOCACHE);
-				if (info->portwidth == FLASH_CFI_8BIT
-					&& info->interface == FLASH_CFI_X8X16) {
+				if (info->portwidth == FLASH_CFI_8BIT &&
+					info->interface == FLASH_CFI_X8X16) {
 					info->addr_unlock1 = 0x2AAA;
 					info->addr_unlock2 = 0x5555;
 				} else {
@@ -1892,9 +1892,9 @@ static int __flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry)
 	     cfi_offset++) {
 		flash_write_cmd(info, 0, flash_offset_cfi[cfi_offset],
 				 FLASH_CMD_CFI);
-		if (flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
-		    && flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
-		    && flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
+		if (flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP, 'Q') &&
+			flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') &&
+			flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
 			flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
 					sizeof(struct cfi_qry));
 			info->interface	= le16_to_cpu(qry->interface_desc);
@@ -2144,8 +2144,8 @@ ulong flash_get_size(phys_addr_t base, int banknum)
 
 		size_ratio = info->portwidth / info->chipwidth;
 		/* if the chip is x8/x16 reduce the ratio by half */
-		if ((info->interface == FLASH_CFI_X8X16)
-		    && (info->chipwidth == FLASH_CFI_BY8)) {
+		if ((info->interface == FLASH_CFI_X8X16) &&
+			(info->chipwidth == FLASH_CFI_BY8)) {
 			size_ratio >>= 1;
 		}
 		debug("size_ratio %d port %d bits chip %d bits\n",

commit 8624e93c80557f12467aa18eff2f8e9a44325e3a
Author: Mario Six <mario.six@gdsys.cc>
Date:   Fri Jan 26 14:43:38 2018 +0100

    UPSTREAM: cfi_flash: Remove braces for single-statement blocks
    
    Blocks with a single statement should not be enclosed in braces. Fix all
    instances where this occurs.
    
    Change-Id: I90f3722a558c3fa7df4609e624c83926c1396180
    Signed-off-by: Mario Six <mario.six@gdsys.cc>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 0412e903e44eb18e689b8f11ab374146b3d5372a)

diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index 9cc1b2b16f..e2469055b8 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -329,9 +329,8 @@ static ulong flash_read_long (flash_info_t *info, flash_sect_t sect,
 #ifdef DEBUG
 	debug("long addr is at %p info->portwidth = %d\n", addr,
 	       info->portwidth);
-	for (x = 0; x < 4 * info->portwidth; x++) {
+	for (x = 0; x < 4 * info->portwidth; x++)
 		debug("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
-	}
 #endif
 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 	retval = ((flash_read8(addr) << 16) |
@@ -1065,11 +1064,9 @@ int flash_erase(flash_info_t *info, int s_first, int s_last)
 	}
 
 	prot = 0;
-	for (sect = s_first; sect <= s_last; ++sect) {
-		if (info->protect[sect]) {
+	for (sect = s_first; sect <= s_last; ++sect)
+		if (info->protect[sect])
 			prot++;
-		}
-	}
 	if (prot) {
 		printf("- Warning: %d protected sectors will not be erased!\n",
 			prot);
@@ -1396,9 +1393,8 @@ int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
 #else
 	while (cnt >= info->portwidth) {
 		cword.w32 = 0;
-		for (i = 0; i < info->portwidth; i++) {
+		for (i = 0; i < info->portwidth; i++)
 			flash_add_byte(info, &cword, *src++);
-		}
 		if ((rc = flash_write_cfiword(info, wp, cword)) != 0)
 			return rc;
 		wp += info->portwidth;
@@ -1410,9 +1406,8 @@ int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
 	}
 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
 
-	if (cnt == 0) {
+	if (cnt == 0)
 		return (0);
-	}
 
 	/*
 	 * handle unaligned tail bytes

commit 90d7c439e9d5e2633e0c39a10412ca694308356b
Author: Mario Six <mario.six@gdsys.cc>
Date:   Fri Jan 26 14:43:37 2018 +0100

    UPSTREAM: cfi_flash: Fix missing/superfluous lines
    
    There should be no consecutive blank lines, and no blank lines at the
    end of blocks. But there should be blank lines between variable
    declarations and code. Fix all instances where either occurs.
    
    Change-Id: I0828119320b42e426cd3a01096a62670a919de7c
    Signed-off-by: Mario Six <mario.six@gdsys.cc>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 7223a8cb2756cafd3842758877bf7d865e1c1ed1)

diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index 0d58914e44..9cc1b2b16f 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -269,6 +269,7 @@ static void flash_printqry(struct cfi_qry *qry)
 		debug(" ");
 		for (y = 0; y < 16; y++) {
 			unsigned char c = p[x + y];
+
 			if (c >= 0x20 && c <= 0x7e)
 				debug("%c", c);
 			else
@@ -279,7 +280,6 @@ static void flash_printqry(struct cfi_qry *qry)
 }
 #endif
 
-
 /*-----------------------------------------------------------------------
  * read a character at a port width address
  */
@@ -311,7 +311,6 @@ static inline ushort flash_read_word(flash_info_t *info, uint offset)
 	return retval;
 }
 
-
 /*-----------------------------------------------------------------------
  * read a long word by picking the least significant byte of each maximum
  * port size word. Swap for ppc format.
@@ -356,7 +355,6 @@ static ulong flash_read_long (flash_info_t *info, flash_sect_t sect,
 static void flash_write_cmd(flash_info_t *info, flash_sect_t sect,
 			    uint offset, u32 cmd)
 {
-
 	void *addr;
 	cfiword_t cword;
 
@@ -1048,7 +1046,6 @@ out_unmap:
 }
 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
 
-
 /*-----------------------------------------------------------------------
  */
 int flash_erase(flash_info_t *info, int s_first, int s_last)
@@ -1080,7 +1077,6 @@ int flash_erase(flash_info_t *info, int s_first, int s_last)
 		putc('\n');
 	}
 
-
 	for (sect = s_first; sect <= s_last; sect++) {
 		if (ctrlc()) {
 			printf("\n");
@@ -1154,6 +1150,7 @@ int flash_erase(flash_info_t *info, int s_first, int s_last)
 			if (use_flash_status_poll(info)) {
 				cfiword_t cword;
 				void *dest;
+
 				cword.w64 = 0xffffffffffffffffULL;
 				dest = flash_map(info, sect, 0);
 				st = flash_status_poll(info, &cword, dest,
@@ -1494,7 +1491,6 @@ int flash_real_protect(flash_info_t *info, long sector, int prot)
 			else
 				flash_write_cmd(info, sector, 0,
 					FLASH_CMD_PROTECT_CLEAR);
-
 		}
 		break;
 	case CFI_CMDSET_AMD_EXTENDED:
@@ -1579,7 +1575,6 @@ int flash_real_protect(flash_info_t *info, long sector, int prot)
 	if ((retcode =
 	     flash_full_status_check(info, sector, info->erase_blk_tout,
 				      prot ? "protect" : "unprotect")) == 0) {
-
 		info->protect[sector] = prot;
 
 		/*
@@ -1887,6 +1882,7 @@ static void __flash_cmd_reset(flash_info_t *info)
 	udelay(1);
 	flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
 }
+
 void flash_cmd_reset(flash_info_t *info)
 	__attribute__((weak, alias("__flash_cmd_reset")));
 
@@ -2370,6 +2366,7 @@ unsigned long flash_init(void)
 #ifdef CONFIG_SYS_FLASH_PROTECTION
 	/* read environment from EEPROM */
 	char s[64];
+
 	env_get_f("unlock", s, sizeof(s));
 #endif
 

commit 21d4f88a617339d9d89aad94b49975f54e6c78cf
Author: Mario Six <mario.six@gdsys.cc>
Date:   Fri Jan 26 14:43:36 2018 +0100

    UPSTREAM: cfi_flash: Fix spacing around casts/operators
    
    There should be spaces around operators, and no spaces between a cast
    and the variable its being applied to. Fix all instances where this
    occurs.
    
    Change-Id: I0c474d82a4e003ede5004fa4320fe7ebda799cb3
    Signed-off-by: Mario Six <mario.six@gdsys.cc>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 640f4e35deccbea377f543737594753ff5a44d95)

diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index b77fd3c0a2..0d58914e44 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -231,7 +231,7 @@ static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
 	uchar *cp = (uchar *) cmdbuf;
 
 	for (i = info->portwidth; i > 0; i--) {
-		cword_offset = (info->portwidth-i)%info->chipwidth;
+		cword_offset = (info->portwidth - i) % info->chipwidth;
 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 		cp_offset = info->portwidth - i;
 		val = *((uchar *)&cmd_le + cword_offset);
@@ -252,7 +252,7 @@ static void print_longlong(char *str, unsigned long long data)
 	int i;
 	char *cp;
 
-	cp = (char *) &data;
+	cp = (char *)&data;
 	for (i = 0; i < 8; i++)
 		sprintf(&str[i * 2], "%2.2x", *cp++);
 }
@@ -512,7 +512,7 @@ static int flash_toggle(flash_info_t *info, flash_sect_t sect,
 		break;
 	case FLASH_CFI_64BIT:
 		retval = ((flash_read32(addr) != flash_read32(addr)) ||
-			   (flash_read32(addr+4) != flash_read32(addr+4)));
+			   (flash_read32(addr + 4) != flash_read32(addr + 4)));
 		break;
 	default:
 		retval = 0;
@@ -1212,7 +1212,7 @@ void flash_print_info(flash_info_t *info)
 	printf("%s flash (%d x %d)",
 		info->name,
 		(info->portwidth << 3), (info->chipwidth << 3));
-	if (info->size < 1024*1024)
+	if (info->size < 1024 * 1024)
 		printf("  Size: %ld kB in %d Sectors\n",
 			info->size >> 10, info->sector_count);
 	else
@@ -1888,7 +1888,7 @@ static void __flash_cmd_reset(flash_info_t *info)
 	flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
 }
 void flash_cmd_reset(flash_info_t *info)
-	__attribute__((weak,alias("__flash_cmd_reset")));
+	__attribute__((weak, alias("__flash_cmd_reset")));
 
 static int __flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry)
 {
@@ -2035,7 +2035,7 @@ static void flash_fixup_sst(flash_info_t *info, struct cfi_qry *qry)
 	if (info->device_id == 0x5D23 || /* SST39VF3201B */
 	    info->device_id == 0x5C23) { /* SST39VF3202B */
 		/* set sector granularity to 4KB */
-		info->cmd_erase_sector=0x50;
+		info->cmd_erase_sector = 0x50;
 	}
 }
 
@@ -2093,9 +2093,9 @@ ulong flash_get_size(phys_addr_t base, int banknum)
 		num_erase_regions = qry.num_erase_regions;
 
 		if (info->ext_addr) {
-			info->cfi_version = (ushort) flash_read_uchar(info,
+			info->cfi_version = (ushort)flash_read_uchar(info,
 						info->ext_addr + 3) << 8;
-			info->cfi_version |= (ushort) flash_read_uchar(info,
+			info->cfi_version |= (ushort)flash_read_uchar(info,
 						info->ext_addr + 4);
 		}
 
@@ -2392,7 +2392,7 @@ unsigned long flash_init(void)
 #ifndef CONFIG_SYS_FLASH_QUIET_TEST
 			printf("## Unknown flash on Bank %d "
 				"- Size = 0x%08lx = %ld MB\n",
-				i+1, flash_info[i].size,
+				i + 1, flash_info[i].size,
 				flash_info[i].size >> 20);
 #endif /* CONFIG_SYS_FLASH_QUIET_TEST */
 		}

commit 19048a7fee6d1b875eedf73b6df39de6108428aa
Author: Mario Six <mario.six@gdsys.cc>
Date:   Fri Jan 26 14:43:35 2018 +0100

    UPSTREAM: cfi_flash: Fix indent of case statements
    
    case statements should be at the same level of indent as the switch
    keyword. Fix all instances where this occurs.
    
    Change-Id: Ib98387df0728416b1d2b0739fcd564656069b602
    Signed-off-by: Mario Six <mario.six@gdsys.cc>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit dde0913b8559a1bd049ac6e1d4086b930c5be845)

diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index 2dc6b09cd9..b77fd3c0a2 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -1220,29 +1220,29 @@ void flash_print_info(flash_info_t *info)
 			info->size >> 20, info->sector_count);
 	printf("  ");
 	switch (info->vendor) {
-		case CFI_CMDSET_INTEL_PROG_REGIONS:
-			printf("Intel Prog Regions");
-			break;
-		case CFI_CMDSET_INTEL_STANDARD:
-			printf("Intel Standard");
-			break;
-		case CFI_CMDSET_INTEL_EXTENDED:
-			printf("Intel Extended");
-			break;
-		case CFI_CMDSET_AMD_STANDARD:
-			printf("AMD Standard");
-			break;
-		case CFI_CMDSET_AMD_EXTENDED:
-			printf("AMD Extended");
-			break;
+	case CFI_CMDSET_INTEL_PROG_REGIONS:
+		printf("Intel Prog Regions");
+		break;
+	case CFI_CMDSET_INTEL_STANDARD:
+		printf("Intel Standard");
+		break;
+	case CFI_CMDSET_INTEL_EXTENDED:
+		printf("Intel Extended");
+		break;
+	case CFI_CMDSET_AMD_STANDARD:
+		printf("AMD Standard");
+		break;
+	case CFI_CMDSET_AMD_EXTENDED:
+		printf("AMD Extended");
+		break;
 #ifdef CONFIG_FLASH_CFI_LEGACY
-		case CFI_CMDSET_AMD_LEGACY:
-			printf("AMD Legacy");
-			break;
+	case CFI_CMDSET_AMD_LEGACY:
+		printf("AMD Legacy");
+		break;
 #endif
-		default:
-			printf("Unknown (%d)", info->vendor);
-			break;
+	default:
+		printf("Unknown (%d)", info->vendor);
+		break;
 	}
 	printf(" command set, Manufacturer ID: 0x%02X, Device ID: 0x",
 		info->manufacturer_id);
@@ -1480,94 +1480,94 @@ int flash_real_protect(flash_info_t *info, long sector, int prot)
 	int retcode = 0;
 
 	switch (info->vendor) {
-		case CFI_CMDSET_INTEL_PROG_REGIONS:
-		case CFI_CMDSET_INTEL_STANDARD:
-		case CFI_CMDSET_INTEL_EXTENDED:
-			if (!cfi_protect_bugfix(info, sector, prot)) {
+	case CFI_CMDSET_INTEL_PROG_REGIONS:
+	case CFI_CMDSET_INTEL_STANDARD:
+	case CFI_CMDSET_INTEL_EXTENDED:
+		if (!cfi_protect_bugfix(info, sector, prot)) {
+			flash_write_cmd(info, sector, 0,
+				 FLASH_CMD_CLEAR_STATUS);
+			flash_write_cmd(info, sector, 0,
+				FLASH_CMD_PROTECT);
+			if (prot)
 				flash_write_cmd(info, sector, 0,
-					 FLASH_CMD_CLEAR_STATUS);
+					FLASH_CMD_PROTECT_SET);
+			else
 				flash_write_cmd(info, sector, 0,
-					FLASH_CMD_PROTECT);
-				if (prot)
-					flash_write_cmd(info, sector, 0,
-						FLASH_CMD_PROTECT_SET);
-				else
-					flash_write_cmd(info, sector, 0,
-						FLASH_CMD_PROTECT_CLEAR);
+					FLASH_CMD_PROTECT_CLEAR);
 
+		}
+		break;
+	case CFI_CMDSET_AMD_EXTENDED:
+	case CFI_CMDSET_AMD_STANDARD:
+		/* U-Boot only checks the first byte */
+		if (manufact_match(info, ATM_MANUFACT)) {
+			if (prot) {
+				flash_unlock_seq(info, 0);
+				flash_write_cmd(info, 0,
+						info->addr_unlock1,
+						ATM_CMD_SOFTLOCK_START);
+				flash_unlock_seq(info, 0);
+				flash_write_cmd(info, sector, 0,
+						ATM_CMD_LOCK_SECT);
+			} else {
+				flash_write_cmd(info, 0,
+						info->addr_unlock1,
+						AMD_CMD_UNLOCK_START);
+				if (info->device_id == ATM_ID_BV6416)
+					flash_write_cmd(info, sector,
+						0, ATM_CMD_UNLOCK_SECT);
 			}
-			break;
-		case CFI_CMDSET_AMD_EXTENDED:
-		case CFI_CMDSET_AMD_STANDARD:
-			/* U-Boot only checks the first byte */
-			if (manufact_match(info, ATM_MANUFACT)) {
-				if (prot) {
-					flash_unlock_seq(info, 0);
-					flash_write_cmd(info, 0,
-							info->addr_unlock1,
-							ATM_CMD_SOFTLOCK_START);
-					flash_unlock_seq(info, 0);
+		}
+		if (info->legacy_unlock) {
+			int flag = disable_interrupts();
+			int lock_flag;
+
+			flash_unlock_seq(info, 0);
+			flash_write_cmd(info, 0, info->addr_unlock1,
+					AMD_CMD_SET_PPB_ENTRY);
+			lock_flag = flash_isset(info, sector, 0, 0x01);
+			if (prot) {
+				if (lock_flag) {
 					flash_write_cmd(info, sector, 0,
-							ATM_CMD_LOCK_SECT);
-				} else {
-					flash_write_cmd(info, 0,
-							info->addr_unlock1,
-							AMD_CMD_UNLOCK_START);
-					if (info->device_id == ATM_ID_BV6416)
-						flash_write_cmd(info, sector,
-							0, ATM_CMD_UNLOCK_SECT);
+						AMD_CMD_PPB_LOCK_BC1);
+					flash_write_cmd(info, sector, 0,
+						AMD_CMD_PPB_LOCK_BC2);
 				}
-			}
-			if (info->legacy_unlock) {
-				int flag = disable_interrupts();
-				int lock_flag;
-
-				flash_unlock_seq(info, 0);
-				flash_write_cmd(info, 0, info->addr_unlock1,
-						AMD_CMD_SET_PPB_ENTRY);
-				lock_flag = flash_isset(info, sector, 0, 0x01);
-				if (prot) {
-					if (lock_flag) {
-						flash_write_cmd(info, sector, 0,
-							AMD_CMD_PPB_LOCK_BC1);
-						flash_write_cmd(info, sector, 0,
-							AMD_CMD_PPB_LOCK_BC2);
-					}
-					debug("sector %ld %slocked\n", sector,
-						lock_flag ? "" : "already ");
-				} else {
-					if (!lock_flag) {
-						debug("unlock %ld\n", sector);
-						flash_write_cmd(info, 0, 0,
-							AMD_CMD_PPB_UNLOCK_BC1);
-						flash_write_cmd(info, 0, 0,
-							AMD_CMD_PPB_UNLOCK_BC2);
-					}
-					debug("sector %ld %sunlocked\n", sector,
-						!lock_flag ? "" : "already ");
+				debug("sector %ld %slocked\n", sector,
+					lock_flag ? "" : "already ");
+			} else {
+				if (!lock_flag) {
+					debug("unlock %ld\n", sector);
+					flash_write_cmd(info, 0, 0,
+						AMD_CMD_PPB_UNLOCK_BC1);
+					flash_write_cmd(info, 0, 0,
+						AMD_CMD_PPB_UNLOCK_BC2);
 				}
-				if (flag)
-					enable_interrupts();
-
-				if (flash_status_check(info, sector,
-						info->erase_blk_tout,
-						prot ? "protect" : "unprotect"))
-					printf("status check error\n");
-
-				flash_write_cmd(info, 0, 0,
-						AMD_CMD_SET_PPB_EXIT_BC1);
-				flash_write_cmd(info, 0, 0,
-						AMD_CMD_SET_PPB_EXIT_BC2);
+				debug("sector %ld %sunlocked\n", sector,
+					!lock_flag ? "" : "already ");
 			}
-			break;
+			if (flag)
+				enable_interrupts();
+
+			if (flash_status_check(info, sector,
+					info->erase_blk_tout,
+					prot ? "protect" : "unprotect"))
+				printf("status check error\n");
+
+			flash_write_cmd(info, 0, 0,
+					AMD_CMD_SET_PPB_EXIT_BC1);
+			flash_write_cmd(info, 0, 0,
+					AMD_CMD_SET_PPB_EXIT_BC2);
+		}
+		break;
 #ifdef CONFIG_FLASH_CFI_LEGACY
-		case CFI_CMDSET_AMD_LEGACY:
-			flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
-			flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
-			if (prot)
-				flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_SET);
-			else
-				flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
+	case CFI_CMDSET_AMD_LEGACY:
+		flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
+		flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
+		if (prot)
+			flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_SET);
+		else
+			flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
 #endif
 	};
 

commit 414bc35c355d5afe42bcc62934d4ce67695e9e5e
Author: Mario Six <mario.six@gdsys.cc>
Date:   Fri Jan 26 14:43:34 2018 +0100

    UPSTREAM: cfi_flash: Fix whitespace with casting
    
    When casting to a pointer type, the asterisk should be attached to the
    type name, not separated by a space. Fix all instances where this
    occurs.
    
    Change-Id: Idba3e3311f611f9efd31b333af3e6132f2efd11d
    Signed-off-by: Mario Six <mario.six@gdsys.cc>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit db91bb242f0e4d78c8309c8d81d7c25353cf068e)

diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index e8f1739254..2dc6b09cd9 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -234,10 +234,10 @@ static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
 		cword_offset = (info->portwidth-i)%info->chipwidth;
 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 		cp_offset = info->portwidth - i;
-		val = *((uchar*)&cmd_le + cword_offset);
+		val = *((uchar *)&cmd_le + cword_offset);
 #else
 		cp_offset = i - 1;
-		val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1);
+		val = *((uchar *)&cmd + sizeof(u32) - cword_offset - 1);
 #endif
 		cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
 	}

commit 2bec7b6e618ab6d7218a37d6f2e09d1db606089a
Author: Mario Six <mario.six@gdsys.cc>
Date:   Fri Jan 26 14:43:33 2018 +0100

    UPSTREAM: cfi_flash: Fix Parenthesis spacing
    
    There should not be additional spaces when nesting parentheses
    ("( (...) )"). Fix all instances where this occurs.
    
    Change-Id: Ibefb0101e211736ccf9e9baa8dcd2816162f04b9
    Signed-off-by: Mario Six <mario.six@gdsys.cc>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit b168386ba966f959fb183ceb200f11e4f6b3813f)

diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index a1b217cc0c..e8f1739254 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -230,7 +230,7 @@ static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
 	uchar val;
 	uchar *cp = (uchar *) cmdbuf;
 
-	for (i = info->portwidth; i > 0; i--){
+	for (i = info->portwidth; i > 0; i--) {
 		cword_offset = (info->portwidth-i)%info->chipwidth;
 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 		cp_offset = info->portwidth - i;
@@ -511,8 +511,8 @@ static int flash_toggle(flash_info_t *info, flash_sect_t sect,
 		retval = flash_read32(addr) != flash_read32(addr);
 		break;
 	case FLASH_CFI_64BIT:
-		retval = ( (flash_read32( addr ) != flash_read32( addr )) ||
-			   (flash_read32(addr+4) != flash_read32(addr+4)) );
+		retval = ((flash_read32(addr) != flash_read32(addr)) ||
+			   (flash_read32(addr+4) != flash_read32(addr+4)));
 		break;
 	default:
 		retval = 0;
@@ -1719,7 +1719,7 @@ static void cmdset_amd_read_jedec_ids(flash_info_t *info)
 		info->sr_supported = feature & 0x1;
 	}
 
-	switch (info->chipwidth){
+	switch (info->chipwidth) {
 	case FLASH_CFI_8BIT:
 		info->device_id = flash_read_uchar(info,
 						FLASH_OFFSET_DEVICE_ID);
@@ -1838,7 +1838,7 @@ static int flash_detect_legacy(phys_addr_t base, int banknum)
 			}
 		}
 
-		switch(info->vendor) {
+		switch (info->vendor) {
 		case CFI_CMDSET_INTEL_PROG_REGIONS:
 		case CFI_CMDSET_INTEL_STANDARD:
 		case CFI_CMDSET_INTEL_EXTENDED:
@@ -1925,12 +1925,12 @@ static int __flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry)
 			 * modify the unlock address if we are
 			 * in compatibility mode
 			 */
-			if (	/* x8/x16 in x8 mode */
-				((info->chipwidth == FLASH_CFI_BY8) &&
-					(info->interface == FLASH_CFI_X8X16)) ||
-				/* x16/x32 in x16 mode */
-				((info->chipwidth == FLASH_CFI_BY16) &&
-					(info->interface == FLASH_CFI_X16X32)))
+			if (/* x8/x16 in x8 mode */
+			    ((info->chipwidth == FLASH_CFI_BY8) &&
+				(info->interface == FLASH_CFI_X8X16)) ||
+			    /* x16/x32 in x16 mode */
+			    ((info->chipwidth == FLASH_CFI_BY16) &&
+				(info->interface == FLASH_CFI_X16X32)))
 			{
 				info->addr_unlock1 = 0xaaa;
 				info->addr_unlock2 = 0x555;

commit d6cdadc3676651eca620964c7a9613a04288b2a5
Author: Mario Six <mario.six@gdsys.cc>
Date:   Fri Jan 26 14:43:32 2018 +0100

    UPSTREAM: cfi_flash: Fix style of pointer declarations
    
    In a pointer declaration there should not be a space between the
    asterisk and the pointer name. Fix all instances where this occurs.
    
    Change-Id: Ic5e206a871fe4fa393066c1ce43c4f3731bdaf7f
    Signed-off-by: Mario Six <mario.six@gdsys.cc>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit ca2b07a8d4e0b90e3bbc369760ceb12968666c81)

diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index 0dc7f4a6ba..a1b217cc0c 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -204,7 +204,7 @@ unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
  * create an address based on the offset and the port width
  */
 static inline void *
-flash_map(flash_info_t * info, flash_sect_t sect, uint offset)
+flash_map(flash_info_t *info, flash_sect_t sect, uint offset)
 {
 	unsigned int byte_offset = offset * info->portwidth;
 
@@ -283,7 +283,7 @@ static void flash_printqry(struct cfi_qry *qry)
 /*-----------------------------------------------------------------------
  * read a character at a port width address
  */
-static inline uchar flash_read_uchar(flash_info_t * info, uint offset)
+static inline uchar flash_read_uchar(flash_info_t *info, uint offset)
 {
 	uchar *cp;
 	uchar retval;
@@ -301,7 +301,7 @@ static inline uchar flash_read_uchar(flash_info_t * info, uint offset)
 /*-----------------------------------------------------------------------
  * read a word at a port width address, assume 16bit bus
  */
-static inline ushort flash_read_word(flash_info_t * info, uint offset)
+static inline ushort flash_read_word(flash_info_t *info, uint offset)
 {
 	ushort *addr, retval;
 
@@ -316,7 +316,7 @@ static inline ushort flash_read_word(flash_info_t * info, uint offset)
  * read a long word by picking the least significant byte of each maximum
  * port size word. Swap for ppc format.
  */
-static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
+static ulong flash_read_long (flash_info_t *info, flash_sect_t sect,
 			      uint offset)
 {
 	uchar *addr;
@@ -402,7 +402,7 @@ static void flash_write_cmd(flash_info_t *info, flash_sect_t sect,
 	flash_unmap(info, sect, offset, addr);
 }
 
-static void flash_unlock_seq(flash_info_t * info, flash_sect_t sect)
+static void flash_unlock_seq(flash_info_t *info, flash_sect_t sect)
 {
 	flash_write_cmd(info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
 	flash_write_cmd(info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
@@ -410,7 +410,7 @@ static void flash_unlock_seq(flash_info_t * info, flash_sect_t sect)
 
 /*-----------------------------------------------------------------------
  */
-static int flash_isequal(flash_info_t * info, flash_sect_t sect,
+static int flash_isequal(flash_info_t *info, flash_sect_t sect,
 			  uint offset, uchar cmd)
 {
 	void *addr;
@@ -458,7 +458,7 @@ static int flash_isequal(flash_info_t * info, flash_sect_t sect,
 
 /*-----------------------------------------------------------------------
  */
-static int flash_isset(flash_info_t * info, flash_sect_t sect,
+static int flash_isset(flash_info_t *info, flash_sect_t sect,
 			uint offset, uchar cmd)
 {
 	void *addr;
@@ -491,7 +491,7 @@ static int flash_isset(flash_info_t * info, flash_sect_t sect,
 
 /*-----------------------------------------------------------------------
  */
-static int flash_toggle(flash_info_t * info, flash_sect_t sect,
+static int flash_toggle(flash_info_t *info, flash_sect_t sect,
 			 uint offset, uchar cmd)
 {
 	void *addr;
@@ -529,7 +529,7 @@ static int flash_toggle(flash_info_t * info, flash_sect_t sect,
  * This routine checks the status of the chip and returns true if the
  * chip is busy.
  */
-static int flash_is_busy(flash_info_t * info, flash_sect_t sect)
+static int flash_is_busy(flash_info_t *info, flash_sect_t sect)
 {
 	int retval;
 
@@ -566,7 +566,7 @@ static int flash_is_busy(flash_info_t * info, flash_sect_t sect)
  *  wait for XSR.7 to be set. Time out with an error if it does not.
  *  This routine does not set the flash to read-array mode.
  */
-static int flash_status_check(flash_info_t * info, flash_sect_t sector,
+static int flash_status_check(flash_info_t *info, flash_sect_t sector,
 			       ulong tout, char *prompt)
 {
 	ulong start;
@@ -604,7 +604,7 @@ static int flash_status_check(flash_info_t * info, flash_sect_t sector,
  *
  * This routine sets the flash to read-array mode.
  */
-static int flash_full_status_check(flash_info_t * info, flash_sect_t sector,
+static int flash_full_status_check(flash_info_t *info, flash_sect_t sector,
 				    ulong tout, char *prompt)
 {
 	int retcode;
@@ -709,7 +709,7 @@ static int flash_status_poll(flash_info_t *info, void *src, void *dst,
 
 /*-----------------------------------------------------------------------
  */
-static void flash_add_byte(flash_info_t * info, cfiword_t * cword, uchar c)
+static void flash_add_byte(flash_info_t *info, cfiword_t *cword, uchar c)
 {
 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 	unsigned short	w;
@@ -755,7 +755,7 @@ static void flash_add_byte(flash_info_t * info, cfiword_t * cword, uchar c)
  * Loop through the sector table starting from the previously found sector.
  * Searches forwards or backwards, dependent on the passed address.
  */
-static flash_sect_t find_sector(flash_info_t * info, ulong addr)
+static flash_sect_t find_sector(flash_info_t *info, ulong addr)
 {
 	static flash_sect_t saved_sector; /* previously found sector */
 	static flash_info_t *saved_info; /* previously used flash bank */
@@ -781,7 +781,7 @@ static flash_sect_t find_sector(flash_info_t * info, ulong addr)
 
 /*-----------------------------------------------------------------------
  */
-static int flash_write_cfiword(flash_info_t * info, ulong dest,
+static int flash_write_cfiword(flash_info_t *info, ulong dest,
 				cfiword_t cword)
 {
 	void *dstaddr = (void *)dest;
@@ -869,7 +869,7 @@ static int flash_write_cfiword(flash_info_t * info, ulong dest,
 
 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
 
-static int flash_write_cfibuffer(flash_info_t * info, ulong dest, uchar * cp,
+static int flash_write_cfibuffer(flash_info_t *info, ulong dest, uchar *cp,
 				  int len)
 {
 	flash_sect_t sector;
@@ -1051,7 +1051,7 @@ out_unmap:
 
 /*-----------------------------------------------------------------------
  */
-int flash_erase(flash_info_t * info, int s_first, int s_last)
+int flash_erase(flash_info_t *info, int s_first, int s_last)
 {
 	int rcode = 0;
 	int prot;
@@ -1200,7 +1200,7 @@ static int sector_erased(flash_info_t *info, int i)
 }
 #endif /* CONFIG_SYS_FLASH_EMPTY_INFO */
 
-void flash_print_info(flash_info_t * info)
+void flash_print_info(flash_info_t *info)
 {
 	int i;
 
@@ -1315,7 +1315,7 @@ void flash_print_info(flash_info_t * info)
  * 1 - write timeout
  * 2 - Flash not erased
  */
-int write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt)
+int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
 {
 	ulong wp;
 	uchar *p;
@@ -1475,7 +1475,7 @@ static int cfi_protect_bugfix(flash_info_t *info, long sector, int prot)
 	return 0;
 }
 
-int flash_real_protect(flash_info_t * info, long sector, int prot)
+int flash_real_protect(flash_info_t *info, long sector, int prot)
 {
 	int retcode = 0;
 
@@ -1601,7 +1601,7 @@ int flash_real_protect(flash_info_t * info, long sector, int prot)
 /*-----------------------------------------------------------------------
  * flash_read_user_serial - read the OneTimeProgramming cells
  */
-void flash_read_user_serial(flash_info_t * info, void *buffer, int offset,
+void flash_read_user_serial(flash_info_t *info, void *buffer, int offset,
 			     int len)
 {
 	uchar *src;
@@ -1619,7 +1619,7 @@ void flash_read_user_serial(flash_info_t * info, void *buffer, int offset,
 /*
  * flash_read_factory_serial - read the device Id from the protection area
  */
-void flash_read_factory_serial(flash_info_t * info, void *buffer, int offset,
+void flash_read_factory_serial(flash_info_t *info, void *buffer, int offset,
 				int len)
 {
 	uchar *src;
@@ -1771,7 +1771,7 @@ static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
 }
 
 #ifdef CONFIG_FLASH_CFI_LEGACY
-static void flash_read_jedec_ids(flash_info_t * info)
+static void flash_read_jedec_ids(flash_info_t *info)
 {
 	info->manufacturer_id = 0;
 	info->device_id       = 0;
@@ -1890,7 +1890,7 @@ static void __flash_cmd_reset(flash_info_t *info)
 void flash_cmd_reset(flash_info_t *info)
 	__attribute__((weak,alias("__flash_cmd_reset")));
 
-static int __flash_detect_cfi(flash_info_t * info, struct cfi_qry *qry)
+static int __flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry)
 {
 	int cfi_offset;
 
@@ -1944,7 +1944,7 @@ static int __flash_detect_cfi(flash_info_t * info, struct cfi_qry *qry)
 	return 0;
 }
 
-static int flash_detect_cfi(flash_info_t * info, struct cfi_qry *qry)
+static int flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry)
 {
 	debug("flash detect cfi\n");
 

commit ce70f017775817b7f6a41c6cf69cd19ff696a022
Author: Mario Six <mario.six@gdsys.cc>
Date:   Fri Jan 26 14:43:31 2018 +0100

    UPSTREAM: cfi_flash: Fix space between function name and parenthesis
    
    There should not be a space between a function name and a parenthesis
    ("func (...)"). Fix all instances where this occurs.
    
    Change-Id: I87b99a74975ff9378968ecfc1fa4b9c9169f6126
    Signed-off-by: Mario Six <mario.six@gdsys.cc>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 188a55651fc611aff4a0e9f3ed97d7585db0db38)

diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index f096e039cb..0dc7f4a6ba 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -204,7 +204,7 @@ unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
  * create an address based on the offset and the port width
  */
 static inline void *
-flash_map (flash_info_t * info, flash_sect_t sect, uint offset)
+flash_map(flash_info_t * info, flash_sect_t sect, uint offset)
 {
 	unsigned int byte_offset = offset * info->portwidth;
 
@@ -247,17 +247,17 @@ static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
 /*-----------------------------------------------------------------------
  * Debug support
  */
-static void print_longlong (char *str, unsigned long long data)
+static void print_longlong(char *str, unsigned long long data)
 {
 	int i;
 	char *cp;
 
 	cp = (char *) &data;
 	for (i = 0; i < 8; i++)
-		sprintf (&str[i * 2], "%2.2x", *cp++);
+		sprintf(&str[i * 2], "%2.2x", *cp++);
 }
 
-static void flash_printqry (struct cfi_qry *qry)
+static void flash_printqry(struct cfi_qry *qry)
 {
 	u8 *p = (u8 *)qry;
 	int x, y;
@@ -283,31 +283,31 @@ static void flash_printqry (struct cfi_qry *qry)
 /*-----------------------------------------------------------------------
  * read a character at a port width address
  */
-static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
+static inline uchar flash_read_uchar(flash_info_t * info, uint offset)
 {
 	uchar *cp;
 	uchar retval;
 
-	cp = flash_map (info, 0, offset);
+	cp = flash_map(info, 0, offset);
 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 	retval = flash_read8(cp);
 #else
 	retval = flash_read8(cp + info->portwidth - 1);
 #endif
-	flash_unmap (info, 0, offset, cp);
+	flash_unmap(info, 0, offset, cp);
 	return retval;
 }
 
 /*-----------------------------------------------------------------------
  * read a word at a port width address, assume 16bit bus
  */
-static inline ushort flash_read_word (flash_info_t * info, uint offset)
+static inline ushort flash_read_word(flash_info_t * info, uint offset)
 {
 	ushort *addr, retval;
 
-	addr = flash_map (info, 0, offset);
-	retval = flash_read16 (addr);
-	flash_unmap (info, 0, offset, addr);
+	addr = flash_map(info, 0, offset);
+	retval = flash_read16(addr);
+	flash_unmap(info, 0, offset, addr);
 	return retval;
 }
 
@@ -325,13 +325,13 @@ static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
 #ifdef DEBUG
 	int x;
 #endif
-	addr = flash_map (info, sect, offset);
+	addr = flash_map(info, sect, offset);
 
 #ifdef DEBUG
-	debug ("long addr is at %p info->portwidth = %d\n", addr,
+	debug("long addr is at %p info->portwidth = %d\n", addr,
 	       info->portwidth);
 	for (x = 0; x < 4 * info->portwidth; x++) {
-		debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
+		debug("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
 	}
 #endif
 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
@@ -360,22 +360,22 @@ static void flash_write_cmd(flash_info_t *info, flash_sect_t sect,
 	void *addr;
 	cfiword_t cword;
 
-	addr = flash_map (info, sect, offset);
-	flash_make_cmd (info, cmd, &cword);
+	addr = flash_map(info, sect, offset);
+	flash_make_cmd(info, cmd, &cword);
 	switch (info->portwidth) {
 	case FLASH_CFI_8BIT:
-		debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
+		debug("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
 		       cword.w8, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 		flash_write8(cword.w8, addr);
 		break;
 	case FLASH_CFI_16BIT:
-		debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
+		debug("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
 		       cmd, cword.w16,
 		       info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 		flash_write16(cword.w16, addr);
 		break;
 	case FLASH_CFI_32BIT:
-		debug ("fwc addr %p cmd %x %8.8x 32bit x %d bit\n", addr,
+		debug("fwc addr %p cmd %x %8.8x 32bit x %d bit\n", addr,
 		       cmd, cword.w32,
 		       info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 		flash_write32(cword.w32, addr);
@@ -385,9 +385,9 @@ static void flash_write_cmd(flash_info_t *info, flash_sect_t sect,
 		{
 			char str[20];
 
-			print_longlong (str, cword.w64);
+			print_longlong(str, cword.w64);
 
-			debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
+			debug("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
 			       addr, cmd, str,
 			       info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 		}
@@ -402,36 +402,36 @@ static void flash_write_cmd(flash_info_t *info, flash_sect_t sect,
 	flash_unmap(info, sect, offset, addr);
 }
 
-static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
+static void flash_unlock_seq(flash_info_t * info, flash_sect_t sect)
 {
-	flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
-	flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
+	flash_write_cmd(info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
+	flash_write_cmd(info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
 }
 
 /*-----------------------------------------------------------------------
  */
-static int flash_isequal (flash_info_t * info, flash_sect_t sect,
+static int flash_isequal(flash_info_t * info, flash_sect_t sect,
 			  uint offset, uchar cmd)
 {
 	void *addr;
 	cfiword_t cword;
 	int retval;
 
-	addr = flash_map (info, sect, offset);
-	flash_make_cmd (info, cmd, &cword);
+	addr = flash_map(info, sect, offset);
+	flash_make_cmd(info, cmd, &cword);
 
-	debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
+	debug("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
 	switch (info->portwidth) {
 	case FLASH_CFI_8BIT:
-		debug ("is= %x %x\n", flash_read8(addr), cword.w8);
+		debug("is= %x %x\n", flash_read8(addr), cword.w8);
 		retval = (flash_read8(addr) == cword.w8);
 		break;
 	case FLASH_CFI_16BIT:
-		debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w16);
+		debug("is= %4.4x %4.4x\n", flash_read16(addr), cword.w16);
 		retval = (flash_read16(addr) == cword.w16);
 		break;
 	case FLASH_CFI_32BIT:
-		debug ("is= %8.8x %8.8x\n", flash_read32(addr), cword.w32);
+		debug("is= %8.8x %8.8x\n", flash_read32(addr), cword.w32);
 		retval = (flash_read32(addr) == cword.w32);
 		break;
 	case FLASH_CFI_64BIT:
@@ -440,9 +440,9 @@ static int flash_isequal (flash_info_t * info, flash_sect_t sect,
 			char str1[20];
 			char str2[20];
 
-			print_longlong (str1, flash_read64(addr));
-			print_longlong (str2, cword.w64);
-			debug ("is= %s %s\n", str1, str2);
+			print_longlong(str1, flash_read64(addr));
+			print_longlong(str2, cword.w64);
+			debug("is= %s %s\n", str1, str2);
 		}
 #endif
 		retval = (flash_read64(addr) == cword.w64);
@@ -458,15 +458,15 @@ static int flash_isequal (flash_info_t * info, flash_sect_t sect,
 
 /*-----------------------------------------------------------------------
  */
-static int flash_isset (flash_info_t * info, flash_sect_t sect,
+static int flash_isset(flash_info_t * info, flash_sect_t sect,
 			uint offset, uchar cmd)
 {
 	void *addr;
 	cfiword_t cword;
 	int retval;
 
-	addr = flash_map (info, sect, offset);
-	flash_make_cmd (info, cmd, &cword);
+	addr = flash_map(info, sect, offset);
+	flash_make_cmd(info, cmd, &cword);
 	switch (info->portwidth) {
 	case FLASH_CFI_8BIT:
 		retval = ((flash_read8(addr) & cword.w8) == cword.w8);
@@ -491,15 +491,15 @@ static int flash_isset (flash_info_t * info, flash_sect_t sect,
 
 /*-----------------------------------------------------------------------
  */
-static int flash_toggle (flash_info_t * info, flash_sect_t sect,
+static int flash_toggle(flash_info_t * info, flash_sect_t sect,
 			 uint offset, uchar cmd)
 {
 	void *addr;
 	cfiword_t cword;
 	int retval;
 
-	addr = flash_map (info, sect, offset);
-	flash_make_cmd (info, cmd, &cword);
+	addr = flash_map(info, sect, offset);
+	flash_make_cmd(info, cmd, &cword);
 	switch (info->portwidth) {
 	case FLASH_CFI_8BIT:
 		retval = flash_read8(addr) != flash_read8(addr);
@@ -529,7 +529,7 @@ static int flash_toggle (flash_info_t * info, flash_sect_t sect,
  * This routine checks the status of the chip and returns true if the
  * chip is busy.
  */
-static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
+static int flash_is_busy(flash_info_t * info, flash_sect_t sect)
 {
 	int retval;
 
@@ -537,7 +537,7 @@ static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
 	case CFI_CMDSET_INTEL_PROG_REGIONS:
 	case CFI_CMDSET_INTEL_STANDARD:
 	case CFI_CMDSET_INTEL_EXTENDED:
-		retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
+		retval = !flash_isset(info, sect, 0, FLASH_STATUS_DONE);
 		break;
 	case CFI_CMDSET_AMD_STANDARD:
 	case CFI_CMDSET_AMD_EXTENDED:
@@ -545,12 +545,12 @@ static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
 	case CFI_CMDSET_AMD_LEGACY:
 #endif
 		if (info->sr_supported) {
-			flash_write_cmd (info, sect, info->addr_unlock1,
+			flash_write_cmd(info, sect, info->addr_unlock1,
 					 FLASH_CMD_READ_STATUS);
-			retval = !flash_isset (info, sect, 0,
+			retval = !flash_isset(info, sect, 0,
 					       FLASH_STATUS_DONE);
 		} else {
-			retval = flash_toggle (info, sect, 0,
+			retval = flash_toggle(info, sect, 0,
 					       AMD_STATUS_TOGGLE);
 		}
 
@@ -558,7 +558,7 @@ static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
 	default:
 		retval = 0;
 	}
-	debug ("flash_is_busy: %d\n", retval);
+	debug("flash_is_busy: %d\n", retval);
 	return retval;
 }
 
@@ -566,7 +566,7 @@ static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
  *  wait for XSR.7 to be set. Time out with an error if it does not.
  *  This routine does not set the flash to read-array mode.
  */
-static int flash_status_check (flash_info_t * info, flash_sect_t sector,
+static int flash_status_check(flash_info_t * info, flash_sect_t sector,
 			       ulong tout, char *prompt)
 {
 	ulong start;
@@ -582,18 +582,18 @@ static int flash_status_check (flash_info_t * info, flash_sect_t sector,
 #ifdef CONFIG_SYS_LOW_RES_TIMER
 	reset_timer();
 #endif
-	start = get_timer (0);
+	start = get_timer(0);
 	WATCHDOG_RESET();
-	while (flash_is_busy (info, sector)) {
-		if (get_timer (start) > tout) {
-			printf ("Flash %s timeout at address %lx data %lx\n",
+	while (flash_is_busy(info, sector)) {
+		if (get_timer(start) > tout) {
+			printf("Flash %s timeout at address %lx data %lx\n",
 				prompt, info->start[sector],
-				flash_read_long (info, sector, 0));
-			flash_write_cmd (info, sector, 0, info->cmd_reset);
+				flash_read_long(info, sector, 0));
+			flash_write_cmd(info, sector, 0, info->cmd_reset);
 			udelay(1);
 			return ERR_TIMOUT;
 		}
-		udelay (1);		/* also triggers watchdog */
+		udelay(1);		/* also triggers watchdog */
 	}
 	return ERR_OK;
 }
@@ -604,12 +604,12 @@ static int flash_status_check (flash_info_t * info, flash_sect_t sector,
  *
  * This routine sets the flash to read-array mode.
  */
-static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
+static int flash_full_status_check(flash_info_t * info, flash_sect_t sector,
 				    ulong tout, char *prompt)
 {
 	int retcode;
 
-	retcode = flash_status_check (info, sector, tout, prompt);
+	retcode = flash_status_check(info, sector, tout, prompt);
 	switch (info->vendor) {
 	case CFI_CMDSET_INTEL_PROG_REGIONS:
 	case CFI_CMDSET_INTEL_EXTENDED:
@@ -617,27 +617,27 @@ static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
 		if ((retcode == ERR_OK)
 		    && !flash_isset(info, sector, 0, FLASH_STATUS_DONE)) {
 			retcode = ERR_INVAL;
-			printf ("Flash %s error at address %lx\n", prompt,
+			printf("Flash %s error at address %lx\n", prompt,
 				info->start[sector]);
-			if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS |
+			if (flash_isset(info, sector, 0, FLASH_STATUS_ECLBS |
 					 FLASH_STATUS_PSLBS)) {
-				puts ("Command Sequence Error.\n");
-			} else if (flash_isset (info, sector, 0,
+				puts("Command Sequence Error.\n");
+			} else if (flash_isset(info, sector, 0,
 						FLASH_STATUS_ECLBS)) {
-				puts ("Block Erase Error.\n");
+				puts("Block Erase Error.\n");
 				retcode = ERR_NOT_ERASED;
-			} else if (flash_isset (info, sector, 0,
+			} else if (flash_isset(info, sector, 0,
 						FLASH_STATUS_PSLBS)) {
-				puts ("Locking Error\n");
+				puts("Locking Error\n");
 			}
-			if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
-				puts ("Block locked.\n");
+			if (flash_isset(info, sector, 0, FLASH_STATUS_DPS)) {
+				puts("Block locked.\n");
 				retcode = ERR_PROTECTED;
 			}
-			if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
-				puts ("Vpp Low Error.\n");
+			if (flash_isset(info, sector, 0, FLASH_STATUS_VPENS))
+				puts("Vpp Low Error.\n");
 		}
-		flash_write_cmd (info, sector, 0, info->cmd_reset);
+		flash_write_cmd(info, sector, 0, info->cmd_reset);
 		udelay(1);
 		break;
 	default:
@@ -709,7 +709,7 @@ static int flash_status_poll(flash_info_t *info, void *src, void *dst,
 
 /*-----------------------------------------------------------------------
  */
-static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
+static void flash_add_byte(flash_info_t * info, cfiword_t * cword, uchar c)
 {
 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 	unsigned short	w;
@@ -755,7 +755,7 @@ static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
  * Loop through the sector table starting from the previously found sector.
  * Searches forwards or backwards, dependent on the passed address.
  */
-static flash_sect_t find_sector (flash_info_t * info, ulong addr)
+static flash_sect_t find_sector(flash_info_t * info, ulong addr)
 {
 	static flash_sect_t saved_sector; /* previously found sector */
 	static flash_info_t *saved_info; /* previously used flash bank */
@@ -781,7 +781,7 @@ static flash_sect_t find_sector (flash_info_t * info, ulong addr)
 
 /*-----------------------------------------------------------------------
  */
-static int flash_write_cfiword (flash_info_t * info, ulong dest,
+static int flash_write_cfiword(flash_info_t * info, ulong dest,
 				cfiword_t cword)
 {
 	void *dstaddr = (void *)dest;
@@ -811,27 +811,27 @@ static int flash_write_cfiword (flash_info_t * info, ulong dest,
 		return ERR_NOT_ERASED;
 
 	/* Disable interrupts which might cause a timeout here */
-	flag = disable_interrupts ();
+	flag = disable_interrupts();
 
 	switch (info->vendor) {
 	case CFI_CMDSET_INTEL_PROG_REGIONS:
 	case CFI_CMDSET_INTEL_EXTENDED:
 	case CFI_CMDSET_INTEL_STANDARD:
-		flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
-		flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
+		flash_write_cmd(info, 0, 0, FLASH_CMD_CLEAR_STATUS);
+		flash_write_cmd(info, 0, 0, FLASH_CMD_WRITE);
 		break;
 	case CFI_CMDSET_AMD_EXTENDED:
 	case CFI_CMDSET_AMD_STANDARD:
 		sect = find_sector(info, dest);
-		flash_unlock_seq (info, sect);
-		flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE);
+		flash_unlock_seq(info, sect);
+		flash_write_cmd(info, sect, info->addr_unlock1, AMD_CMD_WRITE);
 		sect_found = 1;
 		break;
 #ifdef CONFIG_FLASH_CFI_LEGACY
 	case CFI_CMDSET_AMD_LEGACY:
 		sect = find_sector(info, dest);
-		flash_unlock_seq (info, 0);
-		flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE);
+		flash_unlock_seq(info, 0);
+		flash_write_cmd(info, 0, info->addr_unlock1, AMD_CMD_WRITE);
 		sect_found = 1;
 		break;
 #endif
@@ -854,10 +854,10 @@ static int flash_write_cfiword (flash_info_t * info, ulong dest,
 
 	/* re-enable interrupts if necessary */
 	if (flag)
-		enable_interrupts ();
+		enable_interrupts();
 
 	if (!sect_found)
-		sect = find_sector (info, dest);
+		sect = find_sector(info, dest);
 
 	if (use_flash_status_poll(info))
 		return flash_status_poll(info, &cword, dstaddr,
@@ -869,7 +869,7 @@ static int flash_write_cfiword (flash_info_t * info, ulong dest,
 
 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
 
-static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
+static int flash_write_cfibuffer(flash_info_t * info, ulong dest, uchar * cp,
 				  int len)
 {
 	flash_sect_t sector;
@@ -933,7 +933,7 @@ static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
 	}
 
 	src = cp;
-	sector = find_sector (info, dest);
+	sector = find_sector(info, dest);
 
 	switch (info->vendor) {
 	case CFI_CMDSET_INTEL_PROG_REGIONS:
@@ -941,17 +941,17 @@ static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
 	case CFI_CMDSET_INTEL_EXTENDED:
 		write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
 					FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER;
-		flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
-		flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS);
-		flash_write_cmd (info, sector, 0, write_cmd);
-		retcode = flash_status_check (info, sector,
+		flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
+		flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
+		flash_write_cmd(info, sector, 0, write_cmd);
+		retcode = flash_status_check(info, sector,
 					      info->buffer_write_tout,
 					      "write to buffer");
 		if (retcode == ERR_OK) {
 			/* reduce the number of loops by the width of
 			 * the port */
 			cnt = len >> shift;
-			flash_write_cmd (info, sector, 0, cnt - 1);
+			flash_write_cmd(info, sector, 0, cnt - 1);
 			while (cnt-- > 0) {
 				switch (info->portwidth) {
 				case FLASH_CFI_8BIT:
@@ -975,9 +975,9 @@ static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
 					goto out_unmap;
 				}
 			}
-			flash_write_cmd (info, sector, 0,
+			flash_write_cmd(info, sector, 0,
 					 FLASH_CMD_WRITE_BUFFER_CONFIRM);
-			retcode = flash_full_status_check (
+			retcode = flash_full_status_check(
 				info, sector, info->buffer_write_tout,
 				"buffer write");
 		}
@@ -1025,7 +1025,7 @@ static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
 			goto out_unmap;
 		}
 
-		flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
+		flash_write_cmd(info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
 		if (use_flash_status_poll(info))
 			retcode = flash_status_poll(info, src - (1 << shift),
 						    dst - (1 << shift),
@@ -1038,7 +1038,7 @@ static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
 		break;
 
 	default:
-		debug ("Unknown Command Set\n");
+		debug("Unknown Command Set\n");
 		retcode = ERR_INVAL;
 		break;
 	}
@@ -1051,7 +1051,7 @@ out_unmap:
 
 /*-----------------------------------------------------------------------
  */
-int flash_erase (flash_info_t * info, int s_first, int s_last)
+int flash_erase(flash_info_t * info, int s_first, int s_last)
 {
 	int rcode = 0;
 	int prot;
@@ -1059,11 +1059,11 @@ int flash_erase (flash_info_t * info, int s_first, int s_last)
 	int st;
 
 	if (info->flash_id != FLASH_MAN_CFI) {
-		puts ("Can't erase unknown flash type - aborted\n");
+		puts("Can't erase unknown flash type - aborted\n");
 		return 1;
 	}
 	if ((s_first < 0) || (s_first > s_last)) {
-		puts ("- no sectors to erase\n");
+		puts("- no sectors to erase\n");
 		return 1;
 	}
 
@@ -1074,10 +1074,10 @@ int flash_erase (flash_info_t * info, int s_first, int s_last)
 		}
 	}
 	if (prot) {
-		printf ("- Warning: %d protected sectors will not be erased!\n",
+		printf("- Warning: %d protected sectors will not be erased!\n",
 			prot);
 	} else if (flash_verbose) {
-		putc ('\n');
+		putc('\n');
 	}
 
 
@@ -1118,35 +1118,35 @@ int flash_erase (flash_info_t * info, int s_first, int s_last)
 			case CFI_CMDSET_INTEL_PROG_REGIONS:
 			case CFI_CMDSET_INTEL_STANDARD:
 			case CFI_CMDSET_INTEL_EXTENDED:
-				flash_write_cmd (info, sect, 0,
+				flash_write_cmd(info, sect, 0,
 						 FLASH_CMD_CLEAR_STATUS);
-				flash_write_cmd (info, sect, 0,
+				flash_write_cmd(info, sect, 0,
 						 FLASH_CMD_BLOCK_ERASE);
-				flash_write_cmd (info, sect, 0,
+				flash_write_cmd(info, sect, 0,
 						 FLASH_CMD_ERASE_CONFIRM);
 				break;
 			case CFI_CMDSET_AMD_STANDARD:
 			case CFI_CMDSET_AMD_EXTENDED:
-				flash_unlock_seq (info, sect);
-				flash_write_cmd (info, sect,
+				flash_unlock_seq(info, sect);
+				flash_write_cmd(info, sect,
 						info->addr_unlock1,
 						AMD_CMD_ERASE_START);
-				flash_unlock_seq (info, sect);
-				flash_write_cmd (info, sect, 0,
+				flash_unlock_seq(info, sect);
+				flash_write_cmd(info, sect, 0,
 						 info->cmd_erase_sector);
 				break;
 #ifdef CONFIG_FLASH_CFI_LEGACY
 			case CFI_CMDSET_AMD_LEGACY:
-				flash_unlock_seq (info, 0);
-				flash_write_cmd (info, 0, info->addr_unlock1,
+				flash_unlock_seq(info, 0);
+				flash_write_cmd(info, 0, info->addr_unlock1,
 						AMD_CMD_ERASE_START);
-				flash_unlock_seq (info, 0);
-				flash_write_cmd (info, sect, 0,
+				flash_unlock_seq(info, 0);
+				flash_write_cmd(info, sect, 0,
 						AMD_CMD_ERASE_SECTOR);
 				break;
 #endif
 			default:
-				debug ("Unkown flash vendor %d\n",
+				debug("Unkown flash vendor %d\n",
 				       info->vendor);
 				break;
 			}
@@ -1166,12 +1166,12 @@ int flash_erase (flash_info_t * info, int s_first, int s_last)
 			if (st)
 				rcode = 1;
 			else if (flash_verbose)
-				putc ('.');
+				putc('.');
 		}
 	}
 
 	if (flash_verbose)
-		puts (" done\n");
+		puts(" done\n");
 
 	return rcode;
 }
@@ -1200,53 +1200,53 @@ static int sector_erased(flash_info_t *info, int i)
 }
 #endif /* CONFIG_SYS_FLASH_EMPTY_INFO */
 
-void flash_print_info (flash_info_t * info)
+void flash_print_info(flash_info_t * info)
 {
 	int i;
 
 	if (info->flash_id != FLASH_MAN_CFI) {
-		puts ("missing or unknown FLASH type\n");
+		puts("missing or unknown FLASH type\n");
 		return;
 	}
 
-	printf ("%s flash (%d x %d)",
+	printf("%s flash (%d x %d)",
 		info->name,
 		(info->portwidth << 3), (info->chipwidth << 3));
 	if (info->size < 1024*1024)
-		printf ("  Size: %ld kB in %d Sectors\n",
+		printf("  Size: %ld kB in %d Sectors\n",
 			info->size >> 10, info->sector_count);
 	else
-		printf ("  Size: %ld MB in %d Sectors\n",
+		printf("  Size: %ld MB in %d Sectors\n",
 			info->size >> 20, info->sector_count);
-	printf ("  ");
+	printf("  ");
 	switch (info->vendor) {
 		case CFI_CMDSET_INTEL_PROG_REGIONS:
-			printf ("Intel Prog Regions");
+			printf("Intel Prog Regions");
 			break;
 		case CFI_CMDSET_INTEL_STANDARD:
-			printf ("Intel Standard");
+			printf("Intel Standard");
 			break;
 		case CFI_CMDSET_INTEL_EXTENDED:
-			printf ("Intel Extended");
+			printf("Intel Extended");
 			break;
 		case CFI_CMDSET_AMD_STANDARD:
-			printf ("AMD Standard");
+			printf("AMD Standard");
 			break;
 		case CFI_CMDSET_AMD_EXTENDED:
-			printf ("AMD Extended");
+			printf("AMD Extended");
 			break;
 #ifdef CONFIG_FLASH_CFI_LEGACY
 		case CFI_CMDSET_AMD_LEGACY:
-			printf ("AMD Legacy");
+			printf("AMD Legacy");
 			break;
 #endif
 		default:
-			printf ("Unknown (%d)", info->vendor);
+			printf("Unknown (%d)", info->vendor);
 			break;
 	}
-	printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x",
+	printf(" command set, Manufacturer ID: 0x%02X, Device ID: 0x",
 		info->manufacturer_id);
-	printf (info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
+	printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
 		info->device_id);
 	if ((info->device_id & 0xff) == 0x7E) {
 		printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
@@ -1254,17 +1254,17 @@ void flash_print_info (flash_info_t * info)
 	}
 	if ((info->vendor == CFI_CMDSET_AMD_STANDARD) && (info->legacy_unlock))
 		printf("\n  Advanced Sector Protection (PPB) enabled");
-	printf ("\n  Erase timeout: %ld ms, write timeout: %ld ms\n",
+	printf("\n  Erase timeout: %ld ms, write timeout: %ld ms\n",
 		info->erase_blk_tout,
 		info->write_tout);
 	if (info->buffer_size > 1) {
-		printf ("  Buffer write timeout: %ld ms, "
+		printf("  Buffer write timeout: %ld ms, "
 			"buffer size: %d bytes\n",
 		info->buffer_write_tout,
 		info->buffer_size);
 	}
 
-	puts ("\n  Sector Start Addresses:");
+	puts("\n  Sector Start Addresses:");
 	for (i = 0; i < info->sector_count; ++i) {
 		if (ctrlc())
 			break;
@@ -1272,17 +1272,17 @@ void flash_print_info (flash_info_t * info)
 			putc('\n');
 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
 		/* print empty and read-only info */
-		printf ("  %08lX %c %s ",
+		printf("  %08lX %c %s ",
 			info->start[i],
 			sector_erased(info, i) ? 'E' : ' ',
 			info->protect[i] ? "RO" : "  ");
 #else	/* ! CONFIG_SYS_FLASH_EMPTY_INFO */
-		printf ("  %08lX   %s ",
+		printf("  %08lX   %s ",
 			info->start[i],
 			info->protect[i] ? "RO" : "  ");
 #endif
 	}
-	putc ('\n');
+	putc('\n');
 	return;
 }
 
@@ -1298,9 +1298,9 @@ void flash_print_info (flash_info_t * info)
 		dots -= dots_sub; \
 		if ((scale > 0) && (dots <= 0)) { \
 			if ((digit % 5) == 0) \
-				printf ("%d", digit / 5); \
+				printf("%d", digit / 5); \
 			else \
-				putc ('.'); \
+				putc('.'); \
 			digit--; \
 			dots += scale; \
 		} \
@@ -1315,7 +1315,7 @@ void flash_print_info (flash_info_t * info)
  * 1 - write timeout
  * 2 - Flash not erased
  */
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
+int write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt)
 {
 	ulong wp;
 	uchar *p;
@@ -1347,16 +1347,16 @@ int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
 		cword.w32 = 0;
 		p = (uchar *)wp;
 		for (i = 0; i < aln; ++i)
-			flash_add_byte (info, &cword, flash_read8(p + i));
+			flash_add_byte(info, &cword, flash_read8(p + i));
 
 		for (; (i < info->portwidth) && (cnt > 0); i++) {
-			flash_add_byte (info, &cword, *src++);
+			flash_add_byte(info, &cword, *src++);
 			cnt--;
 		}
 		for (; (cnt == 0) && (i < info->portwidth); ++i)
-			flash_add_byte (info, &cword, flash_read8(p + i));
+			flash_add_byte(info, &cword, flash_read8(p + i));
 
-		rc = flash_write_cfiword (info, wp, cword);
+		rc = flash_write_cfiword(info, wp, cword);
 		if (rc != 0)
 			return rc;
 
@@ -1373,8 +1373,8 @@ int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
 		if (info->buffer_size == 1) {
 			cword.w32 = 0;
 			for (i = 0; i < info->portwidth; i++)
-				flash_add_byte (info, &cword, *src++);
-			if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
+				flash_add_byte(info, &cword, *src++);
+			if ((rc = flash_write_cfiword(info, wp, cword)) != 0)
 				return rc;
 			wp += info->portwidth;
 			cnt -= info->portwidth;
@@ -1385,7 +1385,7 @@ int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
 		i = buffered_size - (wp % buffered_size);
 		if (i > cnt)
 			i = cnt;
-		if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
+		if ((rc = flash_write_cfibuffer(info, wp, src, i)) != ERR_OK)
 			return rc;
 		i -= i & (info->portwidth - 1);
 		wp += i;
@@ -1400,9 +1400,9 @@ int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
 	while (cnt >= info->portwidth) {
 		cword.w32 = 0;
 		for (i = 0; i < info->portwidth; i++) {
-			flash_add_byte (info, &cword, *src++);
+			flash_add_byte(info, &cword, *src++);
 		}
-		if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
+		if ((rc = flash_write_cfiword(info, wp, cword)) != 0)
 			return rc;
 		wp += info->portwidth;
 		cnt -= info->portwidth;
@@ -1423,13 +1423,13 @@ int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
 	cword.w32 = 0;
 	p = (uchar *)wp;
 	for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
-		flash_add_byte (info, &cword, *src++);
+		flash_add_byte(info, &cword, *src++);
 		--cnt;
 	}
 	for (; i < info->portwidth; ++i)
-		flash_add_byte (info, &cword, flash_read8(p + i));
+		flash_add_byte(info, &cword, flash_read8(p + i));
 
-	return flash_write_cfiword (info, wp, cword);
+	return flash_write_cfiword(info, wp, cword);
 }
 
 static inline int manufact_match(flash_info_t *info, u32 manu)
@@ -1475,7 +1475,7 @@ static int cfi_protect_bugfix(flash_info_t *info, long sector, int prot)
 	return 0;
 }
 
-int flash_real_protect (flash_info_t * info, long sector, int prot)
+int flash_real_protect(flash_info_t * info, long sector, int prot)
 {
 	int retcode = 0;
 
@@ -1502,19 +1502,19 @@ int flash_real_protect (flash_info_t * info, long sector, int prot)
 			/* U-Boot only checks the first byte */
 			if (manufact_match(info, ATM_MANUFACT)) {
 				if (prot) {
-					flash_unlock_seq (info, 0);
-					flash_write_cmd (info, 0,
+					flash_unlock_seq(info, 0);
+					flash_write_cmd(info, 0,
 							info->addr_unlock1,
 							ATM_CMD_SOFTLOCK_START);
-					flash_unlock_seq (info, 0);
-					flash_write_cmd (info, sector, 0,
+					flash_unlock_seq(info, 0);
+					flash_write_cmd(info, sector, 0,
 							ATM_CMD_LOCK_SECT);
 				} else {
-					flash_write_cmd (info, 0,
+					flash_write_cmd(info, 0,
 							info->addr_unlock1,
 							AMD_CMD_UNLOCK_START);
 					if (info->device_id == ATM_ID_BV6416)
-						flash_write_cmd (info, sector,
+						flash_write_cmd(info, sector,
 							0, ATM_CMD_UNLOCK_SECT);
 				}
 			}
@@ -1562,12 +1562,12 @@ int flash_real_protect (flash_info_t * info, long sector, int prot)
 			break;
 #ifdef CONFIG_FLASH_CFI_LEGACY
 		case CFI_CMDSET_AMD_LEGACY:
-			flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
-			flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
+			flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
+			flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
 			if (prot)
-				flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
+				flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_SET);
 			else
-				flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
+				flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
 #endif
 	};
 
@@ -1577,7 +1577,7 @@ int flash_real_protect (flash_info_t * info, long sector, int prot)
 	 */
 	flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
 	if ((retcode =
-	     flash_full_status_check (info, sector, info->erase_blk_tout,
+	     flash_full_status_check(info, sector, info->erase_blk_tout,
 				      prot ? "protect" : "unprotect")) == 0) {
 
 		info->protect[sector] = prot;
@@ -1591,7 +1591,7 @@ int flash_real_protect (flash_info_t * info, long sector, int prot)
 
 			for (i = 0; i < info->sector_count; i++) {
 				if (info->protect[i])
-					flash_real_protect (info, i, 1);
+					flash_real_protect(info, i, 1);
 			}
 		}
 	}
@@ -1601,17 +1601,17 @@ int flash_real_protect (flash_info_t * info, long sector, int prot)
 /*-----------------------------------------------------------------------
  * flash_read_user_serial - read the OneTimeProgramming cells
  */
-void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
+void flash_read_user_serial(flash_info_t * info, void *buffer, int offset,
 			     int len)
 {
 	uchar *src;
 	uchar *dst;
 
 	dst = buffer;
-	src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION);
-	flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
-	memcpy (dst, src + offset, len);
-	flash_write_cmd (info, 0, 0, info->cmd_reset);
+	src = flash_map(info, 0, FLASH_OFFSET_USER_PROTECTION);
+	flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
+	memcpy(dst, src + offset, len);
+	flash_write_cmd(info, 0, 0, info->cmd_reset);
 	udelay(1);
 	flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
 }
@@ -1619,15 +1619,15 @@ void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
 /*
  * flash_read_factory_serial - read the device Id from the protection area
  */
-void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
+void flash_read_factory_serial(flash_info_t * info, void *buffer, int offset,
 				int len)
 {
 	uchar *src;
 
-	src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
-	flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
-	memcpy (buffer, src + offset, len);
-	flash_write_cmd (info, 0, 0, info->cmd_reset);
+	src = flash_map(info, 0, FLASH_OFFSET_INTEL_PROTECTION);
+	flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
+	memcpy(buffer, src + offset, len);
+	flash_write_cmd(info, 0, 0, info->cmd_reset);
 	udelay(1);
 	flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
 }
@@ -1664,11 +1664,11 @@ static void cmdset_intel_read_jedec_ids(flash_info_t *info)
 	udelay(1);
 	flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
 	udelay(1000); /* some flash are slow to respond */
-	info->manufacturer_id = flash_read_uchar (info,
+	info->manufacturer_id = flash_read_uchar(info,
 					FLASH_OFFSET_MANUFACTURER_ID);
 	info->device_id = (info->chipwidth == FLASH_CFI_16BIT) ?
-			flash_read_word (info, FLASH_OFFSET_DEVICE_ID) :
-			flash_read_uchar (info, FLASH_OFFSET_DEVICE_ID);
+			flash_read_word(info, FLASH_OFFSET_DEVICE_ID) :
+			flash_read_uchar(info, FLASH_OFFSET_DEVICE_ID);
 	flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
 }
 
@@ -1682,7 +1682,7 @@ static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
 #ifdef CONFIG_SYS_FLASH_PROTECTION
 	/* read legacy lock/unlock bit from intel flash */
 	if (info->ext_addr) {
-		info->legacy_unlock = flash_read_uchar (info,
+		info->legacy_unlock = flash_read_uchar(info,
 				info->ext_addr + 5) & 0x08;
 	}
 #endif
@@ -1701,11 +1701,11 @@ static void cmdset_amd_read_jedec_ids(flash_info_t *info)
 	flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
 	udelay(1000); /* some flash are slow to respond */
 
-	manuId = flash_read_uchar (info, FLASH_OFFSET_MANUFACTURER_ID);
+	manuId = flash_read_uchar(info, FLASH_OFFSET_MANUFACTURER_ID);
 	/* JEDEC JEP106Z specifies ID codes up to bank 7 */
 	while (manuId == FLASH_CONTINUATION_CODE && bankId < 0x800) {
 		bankId += 0x100;
-		manuId = flash_read_uchar (info,
+		manuId = flash_read_uchar(info,
 			bankId | FLASH_OFFSET_MANUFACTURER_ID);
 	}
 	info->manufacturer_id = manuId;
@@ -1721,26 +1721,26 @@ static void cmdset_amd_read_jedec_ids(flash_info_t *info)
 
 	switch (info->chipwidth){
 	case FLASH_CFI_8BIT:
-		info->device_id = flash_read_uchar (info,
+		info->device_id = flash_read_uchar(info,
 						FLASH_OFFSET_DEVICE_ID);
 		if (info->device_id == 0x7E) {
 			/* AMD 3-byte (expanded) device ids */
-			info->device_id2 = flash_read_uchar (info,
+			info->device_id2 = flash_read_uchar(info,
 						FLASH_OFFSET_DEVICE_ID2);
 			info->device_id2 <<= 8;
-			info->device_id2 |= flash_read_uchar (info,
+			info->device_id2 |= flash_read_uchar(info,
 						FLASH_OFFSET_DEVICE_ID3);
 		}
 		break;
 	case FLASH_CFI_16BIT:
-		info->device_id = flash_read_word (info,
+		info->device_id = flash_read_word(info,
 						FLASH_OFFSET_DEVICE_ID);
 		if ((info->device_id & 0xff) == 0x7E) {
 			/* AMD 3-byte (expanded) device ids */
-			info->device_id2 = flash_read_uchar (info,
+			info->device_id2 = flash_read_uchar(info,
 						FLASH_OFFSET_DEVICE_ID2);
 			info->device_id2 <<= 8;
-			info->device_id2 |= flash_read_uchar (info,
+			info->device_id2 |= flash_read_uchar(info,
 						FLASH_OFFSET_DEVICE_ID3);
 		}
 		break;
@@ -1771,7 +1771,7 @@ static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
 }
 
 #ifdef CONFIG_FLASH_CFI_LEGACY
-static void flash_read_jedec_ids (flash_info_t * info)
+static void flash_read_jedec_ids(flash_info_t * info)
 {
 	info->manufacturer_id = 0;
 	info->device_id       = 0;
@@ -1866,7 +1866,7 @@ static inline int flash_detect_legacy(phys_addr_t base, int banknum)
  * detect if flash is compatible with the Common Flash Interface (CFI)
  * http://www.jedec.org/download/search/jesd68.pdf
  */
-static void flash_read_cfi (flash_info_t *info, void *buf,
+static void flash_read_cfi(flash_info_t *info, void *buf,
 		unsigned int start, size_t len)
 {
 	u8 *p = buf;
@@ -1890,7 +1890,7 @@ static void __flash_cmd_reset(flash_info_t *info)
 void flash_cmd_reset(flash_info_t *info)
 	__attribute__((weak,alias("__flash_cmd_reset")));
 
-static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
+static int __flash_detect_cfi(flash_info_t * info, struct cfi_qry *qry)
 {
 	int cfi_offset;
 
@@ -1899,21 +1899,21 @@ static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
 
 	for (cfi_offset = 0; cfi_offset < ARRAY_SIZE(flash_offset_cfi);
 	     cfi_offset++) {
-		flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset],
+		flash_write_cmd(info, 0, flash_offset_cfi[cfi_offset],
 				 FLASH_CMD_CFI);
-		if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
-		    && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
-		    && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
+		if (flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
+		    && flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
+		    && flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
 			flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
 					sizeof(struct cfi_qry));
 			info->interface	= le16_to_cpu(qry->interface_desc);
 
 			info->cfi_offset = flash_offset_cfi[cfi_offset];
-			debug ("device interface is %d\n",
+			debug("device interface is %d\n",
 			       info->interface);
-			debug ("found port %d chip %d ",
+			debug("found port %d chip %d ",
 			       info->portwidth, info->chipwidth);
-			debug ("port %d bits chip %d bits\n",
+			debug("port %d bits chip %d bits\n",
 			       info->portwidth << CFI_FLASH_SHIFT_WIDTH,
 			       info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 
@@ -1944,9 +1944,9 @@ static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
 	return 0;
 }
 
-static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
+static int flash_detect_cfi(flash_info_t * info, struct cfi_qry *qry)
 {
-	debug ("flash detect cfi\n");
+	debug("flash detect cfi\n");
 
 	for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
 	     info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
@@ -1956,7 +1956,7 @@ static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
 			if (__flash_detect_cfi(info, qry))
 				return 1;
 	}
-	debug ("not found\n");
+	debug("not found\n");
 	return 0;
 }
 
@@ -2063,7 +2063,7 @@ static void flash_fixup_num(flash_info_t *info, struct cfi_qry *qry)
  * The following code cannot be run from FLASH!
  *
  */
-ulong flash_get_size (phys_addr_t base, int banknum)
+ulong flash_get_size(phys_addr_t base, int banknum)
 {
 	flash_info_t *info = &flash_info[banknum];
 	int i, j;
@@ -2087,20 +2087,20 @@ ulong flash_get_size (phys_addr_t base, int banknum)
 
 	info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
 
-	if (flash_detect_cfi (info, &qry)) {
+	if (flash_detect_cfi(info, &qry)) {
 		info->vendor = le16_to_cpu(get_unaligned(&(qry.p_id)));
 		info->ext_addr = le16_to_cpu(get_unaligned(&(qry.p_adr)));
 		num_erase_regions = qry.num_erase_regions;
 
 		if (info->ext_addr) {
-			info->cfi_version = (ushort) flash_read_uchar (info,
+			info->cfi_version = (ushort) flash_read_uchar(info,
 						info->ext_addr + 3) << 8;
-			info->cfi_version |= (ushort) flash_read_uchar (info,
+			info->cfi_version |= (ushort) flash_read_uchar(info,
 						info->ext_addr + 4);
 		}
 
 #ifdef DEBUG
-		flash_printqry (&qry);
+		flash_printqry(&qry);
 #endif
 
 		switch (info->vendor) {
@@ -2145,11 +2145,11 @@ ulong flash_get_size (phys_addr_t base, int banknum)
 			break;
 		}
 
-		debug ("manufacturer is %d\n", info->vendor);
-		debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
-		debug ("device id is 0x%x\n", info->device_id);
-		debug ("device id2 is 0x%x\n", info->device_id2);
-		debug ("cfi version is 0x%04x\n", info->cfi_version);
+		debug("manufacturer is %d\n", info->vendor);
+		debug("manufacturer id is 0x%x\n", info->manufacturer_id);
+		debug("device id is 0x%x\n", info->device_id);
+		debug("device id2 is 0x%x\n", info->device_id2);
+		debug("cfi version is 0x%04x\n", info->cfi_version);
 
 		size_ratio = info->portwidth / info->chipwidth;
 		/* if the chip is x8/x16 reduce the ratio by half */
@@ -2157,7 +2157,7 @@ ulong flash_get_size (phys_addr_t base, int banknum)
 		    && (info->chipwidth == FLASH_CFI_BY8)) {
 			size_ratio >>= 1;
 		}
-		debug ("size_ratio %d port %d bits chip %d bits\n",
+		debug("size_ratio %d port %d bits chip %d bits\n",
 		       size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
 		       info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 		info->size = 1 << qry.dev_size;
@@ -2168,12 +2168,12 @@ ulong flash_get_size (phys_addr_t base, int banknum)
 			debug("[truncated from %ldMiB]", info->size >> 20);
 			info->size = max_size;
 		}
-		debug ("found %d erase regions\n", num_erase_regions);
+		debug("found %d erase regions\n", num_erase_regions);
 		sect_cnt = 0;
 		sector = base;
 		for (i = 0; i < num_erase_regions; i++) {
 			if (i > NUM_ERASE_REGIONS) {
-				printf ("%d erase regions found, only %d used\n",
+				printf("%d erase regions found, only %d used\n",
 					num_erase_regions, NUM_ERASE_REGIONS);
 				break;
 			}
@@ -2186,7 +2186,7 @@ ulong flash_get_size (phys_addr_t base, int banknum)
 			tmp >>= 16;
 			erase_region_size =
 				(tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
-			debug ("erase_region_count = %d erase_region_size = %d\n",
+			debug("erase_region_count = %d erase_region_size = %d\n",
 				erase_region_count, erase_region_size);
 			for (j = 0; j < erase_region_count; j++) {
 				if (sector - base >= info->size)
@@ -2217,7 +2217,7 @@ ulong flash_get_size (phys_addr_t base, int banknum)
 					flash_write_cmd(info, sect_cnt, 0,
 							FLASH_CMD_READ_ID);
 					info->protect[sect_cnt] =
-						flash_isset (info, sect_cnt,
+						flash_isset(info, sect_cnt,
 							     FLASH_OFFSET_PROTECT,
 							     FLASH_STATUS_PROTECT);
 					flash_write_cmd(info, sect_cnt, 0,
@@ -2274,7 +2274,7 @@ ulong flash_get_size (phys_addr_t base, int banknum)
 			info->portwidth >>= 1;
 		}
 
-		flash_write_cmd (info, 0, 0, info->cmd_reset);
+		flash_write_cmd(info, 0, 0, info->cmd_reset);
 	}
 
 	return (info->size);
@@ -2362,7 +2362,7 @@ static void flash_protect_default(void)
 #endif
 }
 
-unsigned long flash_init (void)
+unsigned long flash_init(void)
 {
 	unsigned long size = 0;
 	int i;
@@ -2390,7 +2390,7 @@ unsigned long flash_init (void)
 		size += flash_info[i].size;
 		if (flash_info[i].flash_id == FLASH_UNKNOWN) {
 #ifndef CONFIG_SYS_FLASH_QUIET_TEST
-			printf ("## Unknown flash on Bank %d "
+			printf("## Unknown flash on Bank %d "
 				"- Size = 0x%08lx = %ld MB\n",
 				i+1, flash_info[i].size,
 				flash_info[i].size >> 20);
@@ -2422,7 +2422,7 @@ unsigned long flash_init (void)
 				 * unlock only one sector. This will
 				 * unlock all sectors.
 				 */
-				flash_real_protect (&flash_info[i], 0, 0);
+				flash_real_protect(&flash_info[i], 0, 0);
 
 				flash_info[i].legacy_unlock = 1;
 
@@ -2436,7 +2436,7 @@ unsigned long flash_init (void)
 				/*
 				 * No legancy unlocking -> unlock all sectors
 				 */
-				flash_protect (FLAG_PROTECT_CLEAR,
+				flash_protect(FLAG_PROTECT_CLEAR,
 					       flash_info[i].start[0],
 					       flash_info[i].start[0]
 					       + flash_info[i].size - 1,

commit 8a91194bf3d80eff071d9406b088b966b4e97076
Author: Mario Six <mario.six@gdsys.cc>
Date:   Mon Jan 15 11:08:42 2018 +0100

    UPSTREAM: sf_probe: Merge spi_flash_probe_tail into spi_flash_probe
    
    spi_flash_probe_tail is now only called from spi_flash_probe, hence we
    can merge its body into spi_flash_probe.
    
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Change-Id: Ic6703eeea65a8093339edabd02e1557711671b2b
    Signed-off-by: Mario Six <mario.six@gdsys.cc>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 36890ff0d00f6c44631a6453b355f8af1b5ddd53)

diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index 68009a6328..09143d7868 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -55,10 +55,16 @@ err_read_id:
 }
 
 #ifndef CONFIG_DM_SPI_FLASH
-static struct spi_flash *spi_flash_probe_tail(struct spi_slave *bus)
+struct spi_flash *spi_flash_probe(unsigned int busnum, unsigned int cs,
+				  unsigned int max_hz, unsigned int spi_mode)
 {
+	struct spi_slave *bus;
 	struct spi_flash *flash;
 
+	bus = spi_setup_slave(busnum, cs, max_hz, spi_mode);
+	if (!bus)
+		return NULL;
+
 	/* Allocate space if needed (not used by sf-uclass */
 	flash = calloc(1, sizeof(*flash));
 	if (!flash) {
@@ -76,17 +82,6 @@ static struct spi_flash *spi_flash_probe_tail(struct spi_slave *bus)
 	return flash;
 }
 
-struct spi_flash *spi_flash_probe(unsigned int busnum, unsigned int cs,
-				  unsigned int max_hz, unsigned int spi_mode)
-{
-	struct spi_slave *bus;
-
-	bus = spi_setup_slave(busnum, cs, max_hz, spi_mode);
-	if (!bus)
-		return NULL;
-	return spi_flash_probe_tail(bus);
-}
-
 void spi_flash_free(struct spi_flash *flash)
 {
 #ifdef CONFIG_SPI_FLASH_MTD

commit 91e5d9c00265134222dda15c7922c7b207864ec9
Author: Mario Six <mario.six@gdsys.cc>
Date:   Mon Jan 15 11:08:40 2018 +0100

    UPSTREAM: spi: sf_probe: Fix style violations
    
    Fix two indention-related style violations.
    
    Change-Id: I0cc90e1b0c387fcf9dc3b84c3e2caaa2bf0f417f
    Signed-off-by: Mario Six <mario.six@gdsys.cc>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit a3e32c5038aa674535ba1e48e994e9368ad47055)

diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index e25513b77a..68009a6328 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -77,7 +77,7 @@ static struct spi_flash *spi_flash_probe_tail(struct spi_slave *bus)
 }
 
 struct spi_flash *spi_flash_probe(unsigned int busnum, unsigned int cs,
-		unsigned int max_hz, unsigned int spi_mode)
+				  unsigned int max_hz, unsigned int spi_mode)
 {
 	struct spi_slave *bus;
 
@@ -107,7 +107,7 @@ static int spi_flash_std_read(struct udevice *dev, u32 offset, size_t len,
 }
 
 static int spi_flash_std_write(struct udevice *dev, u32 offset, size_t len,
-			const void *buf)
+			       const void *buf)
 {
 	struct spi_flash *flash = dev_get_uclass_priv(dev);
 

commit 3f3adc845798fde1e1a8d55a7317b1c17df76299
Author: Mario Six <mario.six@gdsys.cc>
Date:   Mon Jan 15 11:08:37 2018 +0100

    UPSTREAM: spi: Remove spi_flash_probe_fdt
    
    Commit ba45756 ("dm: x86: spi: Convert ICH SPI driver to driver model")
    removed the last usage of the spi_flash_probe_fdt function, rendering it
    obsolete.
    
    This patch removes the function.
    
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Change-Id: If44d06efea34ab54b4618c0d5ec45a1859ea5245
    Signed-off-by: Mario Six <mario.six@gdsys.cc>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 74ea6e82f8f626c8c3098dea72f008e8ec0357f9)

diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index 7b296378d2..e25513b77a 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -87,19 +87,6 @@ struct spi_flash *spi_flash_probe(unsigned int busnum, unsigned int cs,
 	return spi_flash_probe_tail(bus);
 }
 
-#ifdef CONFIG_OF_SPI_FLASH
-struct spi_flash *spi_flash_probe_fdt(const void *blob, int slave_node,
-				      int spi_node)
-{
-	struct spi_slave *bus;
-
-	bus = spi_setup_slave_fdt(blob, slave_node, spi_node);
-	if (!bus)
-		return NULL;
-	return spi_flash_probe_tail(bus);
-}
-#endif
-
 void spi_flash_free(struct spi_flash *flash)
 {
 #ifdef CONFIG_SPI_FLASH_MTD
diff --git a/include/spi_flash.h b/include/spi_flash.h
index be2fe3f84c..f3c4e83424 100644
--- a/include/spi_flash.h
+++ b/include/spi_flash.h
@@ -194,18 +194,6 @@ void sandbox_sf_unbind_emul(struct sandbox_state *state, int busnum, int cs);
 struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
 		unsigned int max_hz, unsigned int spi_mode);
 
-/**
- * Set up a new SPI flash from an fdt node
- *
- * @param blob		Device tree blob
- * @param slave_node	Pointer to this SPI slave node in the device tree
- * @param spi_node	Cached pointer to the SPI interface this node belongs
- *			to
- * @return 0 if ok, -1 on error
- */
-struct spi_flash *spi_flash_probe_fdt(const void *blob, int slave_node,
-				      int spi_node);
-
 void spi_flash_free(struct spi_flash *flash);
 
 static inline int spi_flash_read(struct spi_flash *flash, u32 offset,

commit d2a88c9182c7fdd714f75fae295d3f7c3c720079
Author: Álvaro Fernández Rojas <noltari@gmail.com>
Date:   Tue Jan 23 17:14:57 2018 +0100

    UPSTREAM: drivers: spi: consider command bytes when sending transfers
    
    Command bytes are part of the written bytes and they should be taken into
    account when sending a spi transfer.
    
    Change-Id: I8b38a1c15cbfc5bc5394ca59e386ddff413210fc
    Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 6c94bd12c4adca45033ef89daafa66fbfc9acd17)

diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 24d17e7ff9..152316b9e3 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -405,7 +405,7 @@ int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
 
 		if (spi->max_write_size)
 			chunk_len = min(chunk_len,
-					(size_t)spi->max_write_size);
+					spi->max_write_size - sizeof(cmd));
 
 		spi_flash_addr(write_addr, cmd);
 
diff --git a/include/spi.h b/include/spi.h
index d0fa5379ea..c4e1da68ab 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -89,7 +89,7 @@ struct dm_spi_slave_platdata {
  * @max_read_size:	If non-zero, the maximum number of bytes which can
  *			be read at once.
  * @max_write_size:	If non-zero, the maximum number of bytes which can
- *			be written at once, excluding command bytes.
+ *			be written at once.
  * @memory_map:		Address of read-only SPI flash access.
  * @flags:		Indication of SPI flags.
  */

commit d68b9b848230f192f04699e9d5932ee51413cc63
Author: Álvaro Fernández Rojas <noltari@gmail.com>
Date:   Tue Jan 23 17:14:56 2018 +0100

    UPSTREAM: drivers: spi: allow limiting reads
    
    For some SPI controllers it's not possible to keep the CS active between
    transfers and they are limited to a known number of bytes.
    This splits spi_flash reads into different iterations in order to respect
    the SPI controller limits.
    
    Change-Id: I9e5621b1939829ff8f9ed7d4dca50bb87d27b2ef
    Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 8af74edc30bb60a90a5c4d2769ff3129b187796e)

diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 9ec5252065..24d17e7ff9 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -516,6 +516,9 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
 		else
 			read_len = remain_len;
 
+		if (spi->max_read_size)
+			read_len = min(read_len, spi->max_read_size);
+
 		spi_flash_addr(read_addr, cmd);
 
 		ret = spi_flash_read_common(flash, cmd, cmdsz, data, read_len);
diff --git a/include/spi.h b/include/spi.h
index 8c4b882c54..d0fa5379ea 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -86,6 +86,8 @@ struct dm_spi_slave_platdata {
  * @cs:			ID of the chip select connected to the slave.
  * @mode:		SPI mode to use for this slave (see SPI mode flags)
  * @wordlen:		Size of SPI word in number of bits
+ * @max_read_size:	If non-zero, the maximum number of bytes which can
+ *			be read at once.
  * @max_write_size:	If non-zero, the maximum number of bytes which can
  *			be written at once, excluding command bytes.
  * @memory_map:		Address of read-only SPI flash access.
@@ -102,6 +104,7 @@ struct spi_slave {
 #endif
 	uint mode;
 	unsigned int wordlen;
+	unsigned int max_read_size;
 	unsigned int max_write_size;
 	void *memory_map;
 	u8 option;

commit b491b49882fc71838b46c47a860daf2978c80be4
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue Jun 18 09:50:49 2019 +0800

    UPSTREAM: wait_bit: use wait_for_bit_le32 and remove wait_for_bit
    
    wait_for_bit callers use the 32 bit LE version
    
    Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
    Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Change-Id: I638846de7db29711fb7c778cc8304b507de057fe
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 48263504c8d501678acaa90c075f3f7cda17c316)
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/mach-imx/mx6/ddr.c b/arch/arm/mach-imx/mx6/ddr.c
index 0cf391eb9c..256bd71e34 100644
--- a/arch/arm/mach-imx/mx6/ddr.c
+++ b/arch/arm/mach-imx/mx6/ddr.c
@@ -21,10 +21,10 @@ static void reset_read_data_fifos(void)
 
 	/* Reset data FIFOs twice. */
 	setbits_le32(&mmdc0->mpdgctrl0, 1 << 31);
-	wait_for_bit("MMDC", &mmdc0->mpdgctrl0, 1 << 31, 0, 100, 0);
+	wait_for_bit_le32(&mmdc0->mpdgctrl0, 1 << 31, 0, 100, 0);
 
 	setbits_le32(&mmdc0->mpdgctrl0, 1 << 31);
-	wait_for_bit("MMDC", &mmdc0->mpdgctrl0, 1 << 31, 0, 100, 0);
+	wait_for_bit_le32(&mmdc0->mpdgctrl0, 1 << 31, 0, 100, 0);
 }
 
 static void precharge_all(const bool cs0_enable, const bool cs1_enable)
@@ -39,12 +39,12 @@ static void precharge_all(const bool cs0_enable, const bool cs1_enable)
 	 */
 	if (cs0_enable) { /* CS0 */
 		writel(0x04008050, &mmdc0->mdscr);
-		wait_for_bit("MMDC", &mmdc0->mdscr, 1 << 14, 1, 100, 0);
+		wait_for_bit_le32(&mmdc0->mdscr, 1 << 14, 1, 100, 0);
 	}
 
 	if (cs1_enable) { /* CS1 */
 		writel(0x04008058, &mmdc0->mdscr);
-		wait_for_bit("MMDC", &mmdc0->mdscr, 1 << 14, 1, 100, 0);
+		wait_for_bit_le32(&mmdc0->mdscr, 1 << 14, 1, 100, 0);
 	}
 }
 
@@ -146,7 +146,7 @@ int mmdc_do_write_level_calibration(struct mx6_ddr_sysinfo const *sysinfo)
 	 * 7. Upon completion of this process the MMDC de-asserts
 	 * the MPWLGCR[HW_WL_EN]
 	 */
-	wait_for_bit("MMDC", &mmdc0->mpwlgcr, 1 << 0, 0, 100, 0);
+	wait_for_bit_le32(&mmdc0->mpwlgcr, 1 << 0, 0, 100, 0);
 
 	/*
 	 * 8. check for any errors: check both PHYs for x64 configuration,
@@ -278,7 +278,7 @@ int mmdc_do_dqs_calibration(struct mx6_ddr_sysinfo const *sysinfo)
 		writel(0x00008028, &mmdc0->mdscr);
 
 	/* poll to make sure the con_ack bit was asserted */
-	wait_for_bit("MMDC", &mmdc0->mdscr, 1 << 14, 1, 100, 0);
+	wait_for_bit_le32(&mmdc0->mdscr, 1 << 14, 1, 100, 0);
 
 	/*
 	 * Check MDMISC register CALIB_PER_CS to see which CS calibration
@@ -312,7 +312,7 @@ int mmdc_do_dqs_calibration(struct mx6_ddr_sysinfo const *sysinfo)
 	 * this bit until it clears to indicate completion of the write access.
 	 */
 	setbits_le32(&mmdc0->mpswdar0, 1);
-	wait_for_bit("MMDC", &mmdc0->mpswdar0, 1 << 0, 0, 100, 0);
+	wait_for_bit_le32(&mmdc0->mpswdar0, 1 << 0, 0, 100, 0);
 
 	/* Set the RD_DL_ABS# bits to their default values
 	 * (will be calibrated later in the read delay-line calibration).
@@ -359,7 +359,7 @@ int mmdc_do_dqs_calibration(struct mx6_ddr_sysinfo const *sysinfo)
 	setbits_le32(&mmdc0->mpdgctrl0, 5 << 28);
 
 	/* Poll for completion.  MPDGCTRL0[HW_DG_EN] should be 0 */
-	wait_for_bit("MMDC", &mmdc0->mpdgctrl0, 1 << 28, 0, 100, 0);
+	wait_for_bit_le32(&mmdc0->mpdgctrl0, 1 << 28, 0, 100, 0);
 
 	/*
 	 * Check to see if any errors were encountered during calibration
@@ -423,7 +423,7 @@ int mmdc_do_dqs_calibration(struct mx6_ddr_sysinfo const *sysinfo)
 	 * setting MPRDDLHWCTL[HW_RD_DL_EN] = 0.   Also, ensure that
 	 * no error bits were set.
 	 */
-	wait_for_bit("MMDC", &mmdc0->mprddlhwctl, 1 << 4, 0, 100, 0);
+	wait_for_bit_le32(&mmdc0->mprddlhwctl, 1 << 4, 0, 100, 0);
 
 	/* check both PHYs for x64 configuration, if x32, check only PHY0 */
 	if (readl(&mmdc0->mprddlhwctl) & 0x0000000f)
@@ -477,7 +477,7 @@ int mmdc_do_dqs_calibration(struct mx6_ddr_sysinfo const *sysinfo)
 	 * by setting MPWRDLHWCTL[HW_WR_DL_EN] = 0.
 	 * Also, ensure that no error bits were set.
 	 */
-	wait_for_bit("MMDC", &mmdc0->mpwrdlhwctl, 1 << 4, 0, 100, 0);
+	wait_for_bit_le32(&mmdc0->mpwrdlhwctl, 1 << 4, 0, 100, 0);
 
 	/* Check both PHYs for x64 configuration, if x32, check only PHY0 */
 	if (readl(&mmdc0->mpwrdlhwctl) & 0x0000000f)
@@ -526,7 +526,7 @@ int mmdc_do_dqs_calibration(struct mx6_ddr_sysinfo const *sysinfo)
 	writel(0x0, &mmdc0->mdscr);	/* CS0 */
 
 	/* Poll to make sure the con_ack bit is clear */
-	wait_for_bit("MMDC", &mmdc0->mdscr, 1 << 14, 0, 100, 0);
+	wait_for_bit_le32(&mmdc0->mdscr, 1 << 14, 0, 100, 0);
 
 	/*
 	 * Print out the registers that were updated as a result
diff --git a/arch/arm/mach-socfpga/clock_manager.c b/arch/arm/mach-socfpga/clock_manager.c
index cb6ae03696..c740c9f648 100644
--- a/arch/arm/mach-socfpga/clock_manager.c
+++ b/arch/arm/mach-socfpga/clock_manager.c
@@ -37,8 +37,8 @@ void cm_wait_for_lock(u32 mask)
 /* function to poll in the fsm busy bit */
 int cm_wait_for_fsm(void)
 {
-	return wait_for_bit(__func__, (const u32 *)&clock_manager_base->stat,
-			    CLKMGR_STAT_BUSY, false, 20000, false);
+	return wait_for_bit_le32(&clock_manager_base->stat,
+				 CLKMGR_STAT_BUSY, false, 20000, false);
 }
 
 int set_cpu_clk_info(void)
diff --git a/arch/arm/mach-socfpga/clock_manager_gen5.c b/arch/arm/mach-socfpga/clock_manager_gen5.c
index 31fd51097a..a23f3fc5d0 100644
--- a/arch/arm/mach-socfpga/clock_manager_gen5.c
+++ b/arch/arm/mach-socfpga/clock_manager_gen5.c
@@ -37,15 +37,13 @@ static int cm_write_with_phase(u32 value, u32 reg_address, u32 mask)
 	int ret;
 
 	/* poll until phase is zero */
-	ret = wait_for_bit(__func__, (const u32 *)reg_address, mask,
-			   false, 20000, false);
+	ret = wait_for_bit_le32(reg_address, mask, false, 20000, false);
 	if (ret)
 		return ret;
 
 	writel(value, reg_address);
 
-	return wait_for_bit(__func__, (const u32 *)reg_address, mask,
-			    false, 20000, false);
+	return wait_for_bit_le32(reg_address, mask, false, 20000, false);
 }
 
 /*
diff --git a/arch/arm/mach-socfpga/reset_manager_arria10.c b/arch/arm/mach-socfpga/reset_manager_arria10.c
index ae16897494..54f0ddb255 100644
--- a/arch/arm/mach-socfpga/reset_manager_arria10.c
+++ b/arch/arm/mach-socfpga/reset_manager_arria10.c
@@ -222,8 +222,8 @@ int socfpga_reset_deassert_bridges_handoff(void)
 	clrbits_le32(&reset_manager_base->brgmodrst, mask_rstmgr);
 
 	/* Poll until all idleack to 0, timeout at 1000ms */
-	return wait_for_bit(__func__, &sysmgr_regs->noc_idleack, mask_noc,
-			    false, 1000, false);
+	return wait_for_bit_le32(&sysmgr_regs->noc_idleack, mask_noc,
+				 false, 1000, false);
 }
 
 void socfpga_reset_assert_fpga_connected_peripherals(void)
@@ -343,26 +343,26 @@ int socfpga_bridges_reset(void)
 	writel(ALT_SYSMGR_NOC_TMO_EN_SET_MSK, &sysmgr_regs->noc_timeout);
 
 	/* Poll until all idleack to 1 */
-	ret = wait_for_bit(__func__, &sysmgr_regs->noc_idleack,
-		     ALT_SYSMGR_NOC_H2F_SET_MSK |
-		     ALT_SYSMGR_NOC_LWH2F_SET_MSK |
-		     ALT_SYSMGR_NOC_F2H_SET_MSK |
-		     ALT_SYSMGR_NOC_F2SDR0_SET_MSK |
-		     ALT_SYSMGR_NOC_F2SDR1_SET_MSK |
-		     ALT_SYSMGR_NOC_F2SDR2_SET_MSK,
-		     true, 10000, false);
+	ret = wait_for_bit_le32(&sysmgr_regs->noc_idleack,
+				ALT_SYSMGR_NOC_H2F_SET_MSK |
+				ALT_SYSMGR_NOC_LWH2F_SET_MSK |
+				ALT_SYSMGR_NOC_F2H_SET_MSK |
+				ALT_SYSMGR_NOC_F2SDR0_SET_MSK |
+				ALT_SYSMGR_NOC_F2SDR1_SET_MSK |
+				ALT_SYSMGR_NOC_F2SDR2_SET_MSK,
+				true, 10000, false);
 	if (ret)
 		return ret;
 
 	/* Poll until all idlestatus to 1 */
-	ret = wait_for_bit(__func__, &sysmgr_regs->noc_idlestatus,
-		     ALT_SYSMGR_NOC_H2F_SET_MSK |
-		     ALT_SYSMGR_NOC_LWH2F_SET_MSK |
-		     ALT_SYSMGR_NOC_F2H_SET_MSK |
-		     ALT_SYSMGR_NOC_F2SDR0_SET_MSK |
-		     ALT_SYSMGR_NOC_F2SDR1_SET_MSK |
-		     ALT_SYSMGR_NOC_F2SDR2_SET_MSK,
-		     true, 10000, false);
+	ret = wait_for_bit_le32(&sysmgr_regs->noc_idlestatus,
+				ALT_SYSMGR_NOC_H2F_SET_MSK |
+				ALT_SYSMGR_NOC_LWH2F_SET_MSK |
+				ALT_SYSMGR_NOC_F2H_SET_MSK |
+				ALT_SYSMGR_NOC_F2SDR0_SET_MSK |
+				ALT_SYSMGR_NOC_F2SDR1_SET_MSK |
+				ALT_SYSMGR_NOC_F2SDR2_SET_MSK,
+				true, 10000, false);
 	if (ret)
 		return ret;
 
diff --git a/arch/mips/mach-ath79/ar934x/clk.c b/arch/mips/mach-ath79/ar934x/clk.c
index 9b41d3de60..ba2243c9be 100644
--- a/arch/mips/mach-ath79/ar934x/clk.c
+++ b/arch/mips/mach-ath79/ar934x/clk.c
@@ -90,7 +90,7 @@ static void ar934x_srif_pll_cfg(void __iomem *pll_reg_base, const u32 srif_val)
 		setbits_be32(pll_reg_base + 0x8, BIT(30));
 		udelay(5);
 
-		wait_for_bit("clk", pll_reg_base + 0xc, BIT(3), 1, 10, 0);
+		wait_for_bit_le32(pll_reg_base + 0xc, BIT(3), 1, 10, 0);
 
 		clrbits_be32(pll_reg_base + 0x8, BIT(30));
 		udelay(5);
diff --git a/board/samtec/vining_2000/vining_2000.c b/board/samtec/vining_2000/vining_2000.c
index af1a3e75cb..cced08b8b8 100644
--- a/board/samtec/vining_2000/vining_2000.c
+++ b/board/samtec/vining_2000/vining_2000.c
@@ -378,7 +378,7 @@ static int read_adc(u32 *val)
 
 	/* start auto calibration */
 	setbits_le32(b + ADCx_GC, ADCx_GC_CAL);
-	ret = wait_for_bit("ADC", b + ADCx_GC, ADCx_GC_CAL, ADCx_GC_CAL, 10, 0);
+	ret = wait_for_bit_le32(b + ADCx_GC, ADCx_GC_CAL, ADCx_GC_CAL, 10, 0);
 	if (ret)
 		goto adc_exit;
 
@@ -386,7 +386,7 @@ static int read_adc(u32 *val)
 	writel(0, b + ADCx_HC0);
 
 	/* wait for conversion */
-	ret = wait_for_bit("ADC", b + ADCx_HS, ADCx_HS_C0, ADCx_HS_C0, 10, 0);
+	ret = wait_for_bit_le32(b + ADCx_HS, ADCx_HS_C0, ADCx_HS_C0, 10, 0);
 	if (ret)
 		goto adc_exit;
 
diff --git a/drivers/clk/clk_pic32.c b/drivers/clk/clk_pic32.c
index f6eef314ec..177803943d 100644
--- a/drivers/clk/clk_pic32.c
+++ b/drivers/clk/clk_pic32.c
@@ -197,8 +197,8 @@ static ulong pic32_set_refclk(struct pic32_clk_priv *priv, int periph,
 	writel(REFO_ON | REFO_OE, reg + _CLR_OFFSET);
 
 	/* wait till previous src change is active */
-	wait_for_bit(__func__, reg, REFO_DIVSW_EN | REFO_ACTIVE,
-		     false, CONFIG_SYS_HZ, false);
+	wait_for_bit_le32(reg, REFO_DIVSW_EN | REFO_ACTIVE,
+			  false, CONFIG_SYS_HZ, false);
 
 	/* parent_id */
 	v = readl(reg);
@@ -223,8 +223,8 @@ static ulong pic32_set_refclk(struct pic32_clk_priv *priv, int periph,
 	writel(REFO_DIVSW_EN, reg + _SET_OFFSET);
 
 	/* wait for divider switching to complete */
-	return wait_for_bit(__func__, reg, REFO_DIVSW_EN, false,
-			    CONFIG_SYS_HZ, false);
+	return wait_for_bit_le32(reg, REFO_DIVSW_EN, false,
+				 CONFIG_SYS_HZ, false);
 }
 
 static ulong pic32_get_refclk(struct pic32_clk_priv *priv, int periph)
@@ -311,8 +311,8 @@ static int pic32_mpll_init(struct pic32_clk_priv *priv)
 
 	/* Wait for ready */
 	mask = MPLL_RDY | MPLL_VREG_RDY;
-	return wait_for_bit(__func__, priv->syscfg_base + CFGMPLL, mask,
-			    true, get_tbclk(), false);
+	return wait_for_bit_le32(priv->syscfg_base + CFGMPLL, mask,
+				 true, get_tbclk(), false);
 }
 
 static void pic32_clk_init(struct udevice *dev)
diff --git a/drivers/clk/renesas/clk-rcar-gen3.c b/drivers/clk/renesas/clk-rcar-gen3.c
index 4e74856940..e520e53766 100644
--- a/drivers/clk/renesas/clk-rcar-gen3.c
+++ b/drivers/clk/renesas/clk-rcar-gen3.c
@@ -768,8 +768,8 @@ static int gen3_clk_endisable(struct clk *clk, bool enable)
 
 	if (enable) {
 		clrbits_le32(priv->base + SMSTPCR(reg), bitmask);
-		return wait_for_bit("MSTP", priv->base + MSTPSR(reg),
-				    bitmask, 0, 100, 0);
+		return wait_for_bit_le32(priv->base + MSTPSR(reg),
+					 bitmask, 0, 100, 0);
 	} else {
 		setbits_le32(priv->base + SMSTPCR(reg), bitmask);
 		return 0;
diff --git a/drivers/ddr/microchip/ddr2.c b/drivers/ddr/microchip/ddr2.c
index 6056418588..a52427c3d6 100644
--- a/drivers/ddr/microchip/ddr2.c
+++ b/drivers/ddr/microchip/ddr2.c
@@ -57,8 +57,8 @@ static int ddr2_phy_calib_start(void)
 	writel(SCL_START | SCL_EN, &ddr2_phy->scl_start);
 
 	/* Wait for SCL for data byte to pass */
-	return wait_for_bit(__func__, &ddr2_phy->scl_start, SCL_LUBPASS,
-			    true, CONFIG_SYS_HZ, false);
+	return wait_for_bit_le32(&ddr2_phy->scl_start, SCL_LUBPASS,
+				 true, CONFIG_SYS_HZ, false);
 }
 
 /* DDR2 Controller initialization */
@@ -256,8 +256,8 @@ void ddr2_ctrl_init(void)
 	writel(INIT_START, &ctrl->memcon);
 
 	/* wait for all host cmds to be transmitted */
-	wait_for_bit(__func__, &ctrl->cmdissue, CMD_VALID, false,
-		     CONFIG_SYS_HZ, false);
+	wait_for_bit_le32(&ctrl->cmdissue, CMD_VALID, false,
+			  CONFIG_SYS_HZ, false);
 
 	/* inform all cmds issued, ready for normal operation */
 	writel(INIT_START | INIT_DONE, &ctrl->memcon);
diff --git a/drivers/fpga/socfpga_arria10.c b/drivers/fpga/socfpga_arria10.c
index 5c1a68a009..d5763965dd 100644
--- a/drivers/fpga/socfpga_arria10.c
+++ b/drivers/fpga/socfpga_arria10.c
@@ -62,8 +62,7 @@ int is_fpgamgr_user_mode(void)
 
 static int wait_for_user_mode(void)
 {
-	return wait_for_bit(__func__,
-		&fpga_manager_base->imgcfg_stat,
+	return wait_for_bit_le32(&fpga_manager_base->imgcfg_stat,
 		ALT_FPGAMGR_IMGCFG_STAT_F2S_USERMODE_SET_MSK,
 		1, FPGA_TIMEOUT_MSEC, false);
 }
@@ -115,19 +114,17 @@ static int wait_for_nconfig_pin_and_nstatus_pin(void)
 	/* Poll until f2s_nconfig_pin and f2s_nstatus_pin; loop until de-asserted,
 	 * timeout at 1000ms
 	 */
-	return wait_for_bit(__func__,
-			    &fpga_manager_base->imgcfg_stat,
-			    mask,
-			    false, FPGA_TIMEOUT_MSEC, false);
+	return wait_for_bit_le32(&fpga_manager_base->imgcfg_stat,
+		mask,
+		false, FPGA_TIMEOUT_MSEC, false);
 }
 
 static int wait_for_f2s_nstatus_pin(unsigned long value)
 {
 	/* Poll until f2s to specific value, timeout at 1000ms */
-	return wait_for_bit(__func__,
-			    &fpga_manager_base->imgcfg_stat,
-			    ALT_FPGAMGR_IMGCFG_STAT_F2S_NSTATUS_PIN_SET_MSK,
-			    value, FPGA_TIMEOUT_MSEC, false);
+	return wait_for_bit_le32(&fpga_manager_base->imgcfg_stat,
+		ALT_FPGAMGR_IMGCFG_STAT_F2S_NSTATUS_PIN_SET_MSK,
+		value, FPGA_TIMEOUT_MSEC, false);
 }
 
 /* set CD ratio */
diff --git a/drivers/mmc/msm_sdhci.c b/drivers/mmc/msm_sdhci.c
index 9117ab6bf9..f0661bd96c 100644
--- a/drivers/mmc/msm_sdhci.c
+++ b/drivers/mmc/msm_sdhci.c
@@ -109,15 +109,15 @@ static int msm_sdc_probe(struct udevice *dev)
 
 
 	/* Wait for reset to be written to register */
-	if (wait_for_bit(__func__, prv->base + SDCC_MCI_STATUS2,
-			 SDCC_MCI_STATUS2_MCI_ACT, false, 10, false)) {
+	if (wait_for_bit_le32(prv->base + SDCC_MCI_STATUS2,
+			      SDCC_MCI_STATUS2_MCI_ACT, false, 10, false)) {
 		printf("msm_sdhci: reset request failed\n");
 		return -EIO;
 	}
 
 	/* SW reset can take upto 10HCLK + 15MCLK cycles. (min 40us) */
-	if (wait_for_bit(__func__, prv->base + SDCC_MCI_POWER,
-			 SDCC_MCI_POWER_SW_RST, false, 2, false)) {
+	if (wait_for_bit_le32(prv->base + SDCC_MCI_POWER,
+			      SDCC_MCI_POWER_SW_RST, false, 2, false)) {
 		printf("msm_sdhci: stuck in reset\n");
 		return -ETIMEDOUT;
 	}
diff --git a/drivers/mtd/pic32_flash.c b/drivers/mtd/pic32_flash.c
index e1a8d3bc4b..8bbf2fa9a2 100644
--- a/drivers/mtd/pic32_flash.c
+++ b/drivers/mtd/pic32_flash.c
@@ -66,8 +66,8 @@ static inline void flash_initiate_operation(u32 nvmop)
 
 static int flash_wait_till_busy(const char *func, ulong timeout)
 {
-	int ret = wait_for_bit(__func__, &nvm_regs_p->ctrl.raw,
-			       NVM_WR, false, timeout, false);
+	int ret = wait_for_bit_le32(&nvm_regs_p->ctrl.raw,
+				    NVM_WR, false, timeout, false);
 
 	return ret ? ERR_TIMOUT : ERR_OK;
 }
diff --git a/drivers/net/ag7xxx.c b/drivers/net/ag7xxx.c
index 00e6806892..f28187058e 100644
--- a/drivers/net/ag7xxx.c
+++ b/drivers/net/ag7xxx.c
@@ -164,8 +164,8 @@ static int ag7xxx_switch_read(struct mii_dev *bus, int addr, int reg, u16 *val)
 	writel(AG7XXX_ETH_MII_MGMT_CMD_READ,
 	       regs + AG7XXX_ETH_MII_MGMT_CMD);
 
-	ret = wait_for_bit("ag7xxx", regs + AG7XXX_ETH_MII_MGMT_IND,
-			   AG7XXX_ETH_MII_MGMT_IND_BUSY, 0, 1000, 0);
+	ret = wait_for_bit_le32(regs + AG7XXX_ETH_MII_MGMT_IND,
+				AG7XXX_ETH_MII_MGMT_IND_BUSY, 0, 1000, 0);
 	if (ret)
 		return ret;
 
@@ -185,8 +185,8 @@ static int ag7xxx_switch_write(struct mii_dev *bus, int addr, int reg, u16 val)
 	       regs + AG7XXX_ETH_MII_MGMT_ADDRESS);
 	writel(val, regs + AG7XXX_ETH_MII_MGMT_CTRL);
 
-	ret = wait_for_bit("ag7xxx", regs + AG7XXX_ETH_MII_MGMT_IND,
-			   AG7XXX_ETH_MII_MGMT_IND_BUSY, 0, 1000, 0);
+	ret = wait_for_bit_le32(regs + AG7XXX_ETH_MII_MGMT_IND,
+				AG7XXX_ETH_MII_MGMT_IND_BUSY, 0, 1000, 0);
 
 	return ret;
 }
@@ -510,13 +510,13 @@ static void ag7xxx_eth_stop(struct udevice *dev)
 
 	/* Stop the TX DMA. */
 	writel(0, priv->regs + AG7XXX_ETH_DMA_TX_CTRL);
-	wait_for_bit("ag7xxx", priv->regs + AG7XXX_ETH_DMA_TX_CTRL, ~0, 0,
-		     1000, 0);
+	wait_for_bit_le32(priv->regs + AG7XXX_ETH_DMA_TX_CTRL, ~0, 0,
+			  1000, 0);
 
 	/* Stop the RX DMA. */
 	writel(0, priv->regs + AG7XXX_ETH_DMA_RX_CTRL);
-	wait_for_bit("ag7xxx", priv->regs + AG7XXX_ETH_DMA_RX_CTRL, ~0, 0,
-		     1000, 0);
+	wait_for_bit_le32(priv->regs + AG7XXX_ETH_DMA_RX_CTRL, ~0, 0,
+			  1000, 0);
 }
 
 /*
diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index 00076cffbe..232e8034df 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -361,8 +361,9 @@ static void eqos_flush_buffer(void *buf, size_t size)
 
 static int eqos_mdio_wait_idle(struct eqos_priv *eqos)
 {
-	return wait_for_bit(__func__, &eqos->mac_regs->mdio_address,
-			    EQOS_MAC_MDIO_ADDRESS_GB, false, 1000000, true);
+	return wait_for_bit_le32(&eqos->mac_regs->mdio_address,
+				 EQOS_MAC_MDIO_ADDRESS_GB, false,
+				 1000000, true);
 }
 
 static int eqos_mdio_read(struct mii_dev *bus, int mdio_addr, int mdio_devad,
@@ -588,15 +589,15 @@ static int eqos_calibrate_pads_tegra186(struct udevice *dev)
 	setbits_le32(&eqos->tegra186_regs->auto_cal_config,
 		     EQOS_AUTO_CAL_CONFIG_START | EQOS_AUTO_CAL_CONFIG_ENABLE);
 
-	ret = wait_for_bit(__func__, &eqos->tegra186_regs->auto_cal_status,
-			   EQOS_AUTO_CAL_STATUS_ACTIVE, true, 10, false);
+	ret = wait_for_bit_le32(&eqos->tegra186_regs->auto_cal_status,
+				EQOS_AUTO_CAL_STATUS_ACTIVE, true, 10, false);
 	if (ret) {
 		pr_err("calibrate didn't start");
 		goto failed;
 	}
 
-	ret = wait_for_bit(__func__, &eqos->tegra186_regs->auto_cal_status,
-			   EQOS_AUTO_CAL_STATUS_ACTIVE, false, 10, false);
+	ret = wait_for_bit_le32(&eqos->tegra186_regs->auto_cal_status,
+				EQOS_AUTO_CAL_STATUS_ACTIVE, false, 10, false);
 	if (ret) {
 		pr_err("calibrate didn't finish");
 		goto failed;
@@ -862,8 +863,8 @@ static int eqos_start(struct udevice *dev)
 
 	eqos->reg_access_ok = true;
 
-	ret = wait_for_bit(__func__, &eqos->dma_regs->mode,
-			   EQOS_DMA_MODE_SWR, false, 10, false);
+	ret = wait_for_bit_le32(&eqos->dma_regs->mode,
+				EQOS_DMA_MODE_SWR, false, 10, false);
 	if (ret) {
 		pr_err("EQOS_DMA_MODE_SWR stuck");
 		goto err_stop_resets;
diff --git a/drivers/net/ethoc.c b/drivers/net/ethoc.c
index a6df950081..51a6c97550 100644
--- a/drivers/net/ethoc.c
+++ b/drivers/net/ethoc.c
@@ -548,8 +548,8 @@ static int ethoc_mdio_read(struct mii_dev *bus, int addr, int devad, int reg)
 	ethoc_write(priv, MIIADDRESS, MIIADDRESS_ADDR(addr, reg));
 	ethoc_write(priv, MIICOMMAND, MIICOMMAND_READ);
 
-	rc = wait_for_bit(__func__, ethoc_reg(priv, MIISTATUS),
-			  MIISTATUS_BUSY, false, CONFIG_SYS_HZ, false);
+	rc = wait_for_bit_le32(ethoc_reg(priv, MIISTATUS),
+			       MIISTATUS_BUSY, false, CONFIG_SYS_HZ, false);
 
 	if (rc == 0) {
 		u32 data = ethoc_read(priv, MIIRX_DATA);
@@ -571,8 +571,8 @@ static int ethoc_mdio_write(struct mii_dev *bus, int addr, int devad, int reg,
 	ethoc_write(priv, MIITX_DATA, val);
 	ethoc_write(priv, MIICOMMAND, MIICOMMAND_WRITE);
 
-	rc = wait_for_bit(__func__, ethoc_reg(priv, MIISTATUS),
-			  MIISTATUS_BUSY, false, CONFIG_SYS_HZ, false);
+	rc = wait_for_bit_le32(ethoc_reg(priv, MIISTATUS),
+			       MIISTATUS_BUSY, false, CONFIG_SYS_HZ, false);
 
 	if (rc == 0) {
 		/* reset MII command register */
diff --git a/drivers/net/pic32_eth.c b/drivers/net/pic32_eth.c
index 0b89911f04..7129372790 100644
--- a/drivers/net/pic32_eth.c
+++ b/drivers/net/pic32_eth.c
@@ -64,8 +64,8 @@ static int pic32_mii_init(struct pic32eth_dev *priv)
 	writel(ETHCON_ON | ETHCON_TXRTS | ETHCON_RXEN, &ectl_p->con1.clr);
 
 	/* wait till busy */
-	wait_for_bit(__func__, &ectl_p->stat.raw, ETHSTAT_BUSY, false,
-		     CONFIG_SYS_HZ, false);
+	wait_for_bit_le32(&ectl_p->stat.raw, ETHSTAT_BUSY, false,
+			  CONFIG_SYS_HZ, false);
 
 	/* turn controller ON to access PHY over MII */
 	writel(ETHCON_ON, &ectl_p->con1.set);
@@ -239,8 +239,8 @@ static void pic32_ctrl_reset(struct pic32eth_dev *priv)
 	writel(ETHCON_ON | ETHCON_TXRTS | ETHCON_RXEN, &ectl_p->con1.clr);
 
 	/* wait till busy */
-	wait_for_bit(__func__, &ectl_p->stat.raw, ETHSTAT_BUSY, false,
-		     CONFIG_SYS_HZ, false);
+	wait_for_bit_le32(&ectl_p->stat.raw, ETHSTAT_BUSY, false,
+			  CONFIG_SYS_HZ, false);
 	/* decrement received buffcnt to zero. */
 	while (readl(&ectl_p->stat.raw) & ETHSTAT_BUFCNT)
 		writel(ETHCON_BUFCDEC, &ectl_p->con1.set);
@@ -375,8 +375,8 @@ static void pic32_eth_stop(struct udevice *dev)
 	mdelay(10);
 
 	/* wait until everything is down */
-	wait_for_bit(__func__, &ectl_p->stat.raw, ETHSTAT_BUSY, false,
-		     2 * CONFIG_SYS_HZ, false);
+	wait_for_bit_le32(&ectl_p->stat.raw, ETHSTAT_BUSY, false,
+			  2 * CONFIG_SYS_HZ, false);
 
 	/* clear any existing interrupt event */
 	writel(0xffffffff, &ectl_p->irq.clr);
diff --git a/drivers/net/pic32_mdio.c b/drivers/net/pic32_mdio.c
index 578fc96905..6ae5c40fa3 100644
--- a/drivers/net/pic32_mdio.c
+++ b/drivers/net/pic32_mdio.c
@@ -22,8 +22,8 @@ static int pic32_mdio_write(struct mii_dev *bus,
 	struct pic32_mii_regs *mii_regs = bus->priv;
 
 	/* Wait for the previous operation to finish */
-	wait_for_bit(__func__, &mii_regs->mind.raw, MIIMIND_BUSY,
-		     false, CONFIG_SYS_HZ, true);
+	wait_for_bit_le32(&mii_regs->mind.raw, MIIMIND_BUSY,
+			  false, CONFIG_SYS_HZ, true);
 
 	/* Put phyaddr and regaddr into MIIMADD */
 	v = (addr << MIIMADD_PHYADDR_SHIFT) | (reg & MIIMADD_REGADDR);
@@ -36,8 +36,8 @@ static int pic32_mdio_write(struct mii_dev *bus,
 	udelay(12);
 
 	/* Wait for write to complete */
-	wait_for_bit(__func__, &mii_regs->mind.raw, MIIMIND_BUSY,
-		     false, CONFIG_SYS_HZ, true);
+	wait_for_bit_le32(&mii_regs->mind.raw, MIIMIND_BUSY,
+			  false, CONFIG_SYS_HZ, true);
 
 	return 0;
 }
@@ -48,8 +48,8 @@ static int pic32_mdio_read(struct mii_dev *bus, int addr, int devaddr, int reg)
 	struct pic32_mii_regs *mii_regs = bus->priv;
 
 	/* Wait for the previous operation to finish */
-	wait_for_bit(__func__, &mii_regs->mind.raw, MIIMIND_BUSY,
-		     false, CONFIG_SYS_HZ, true);
+	wait_for_bit_le32(&mii_regs->mind.raw, MIIMIND_BUSY,
+			  false, CONFIG_SYS_HZ, true);
 
 	/* Put phyaddr and regaddr into MIIMADD */
 	v = (addr << MIIMADD_PHYADDR_SHIFT) | (reg & MIIMADD_REGADDR);
@@ -62,9 +62,9 @@ static int pic32_mdio_read(struct mii_dev *bus, int addr, int devaddr, int reg)
 	udelay(12);
 
 	/* Wait for read to complete */
-	wait_for_bit(__func__, &mii_regs->mind.raw,
-		     MIIMIND_NOTVALID | MIIMIND_BUSY,
-		     false, CONFIG_SYS_HZ, false);
+	wait_for_bit_le32(&mii_regs->mind.raw,
+			  MIIMIND_NOTVALID | MIIMIND_BUSY,
+			  false, CONFIG_SYS_HZ, false);
 
 	/* Clear the command register */
 	writel(0, &mii_regs->mcmd.raw);
@@ -82,22 +82,22 @@ static int pic32_mdio_reset(struct mii_dev *bus)
 	writel(MIIMCFG_RSTMGMT, &mii_regs->mcfg.raw);
 
 	/* Wait for the operation to finish */
-	wait_for_bit(__func__, &mii_regs->mind.raw, MIIMIND_BUSY,
+	wait_for_bit_le32(&mii_regs->mind.raw, MIIMIND_BUSY,
 		     false, CONFIG_SYS_HZ, true);
 
 	/* Clear reset bit */
 	writel(0, &mii_regs->mcfg);
 
 	/* Wait for the operation to finish */
-	wait_for_bit(__func__, &mii_regs->mind.raw, MIIMIND_BUSY,
-		     false, CONFIG_SYS_HZ, true);
+	wait_for_bit_le32(&mii_regs->mind.raw, MIIMIND_BUSY,
+			  false, CONFIG_SYS_HZ, true);
 
 	/* Set the MII Management Clock (MDC) - no faster than 2.5 MHz */
 	writel(MIIMCFG_CLKSEL_DIV40, &mii_regs->mcfg.raw);
 
 	/* Wait for the operation to finish */
-	wait_for_bit(__func__, &mii_regs->mind.raw, MIIMIND_BUSY,
-		     false, CONFIG_SYS_HZ, true);
+	wait_for_bit_le32(&mii_regs->mind.raw, MIIMIND_BUSY,
+			  false, CONFIG_SYS_HZ, true);
 	return 0;
 }
 
diff --git a/drivers/net/ravb.c b/drivers/net/ravb.c
index 8db127ba06..0a6323ede8 100644
--- a/drivers/net/ravb.c
+++ b/drivers/net/ravb.c
@@ -220,8 +220,8 @@ static int ravb_reset(struct udevice *dev)
 	writel(CCC_OPC_CONFIG, eth->iobase + RAVB_REG_CCC);
 
 	/* Check the operating mode is changed to the config mode. */
-	return wait_for_bit(dev->name, (void *)eth->iobase + RAVB_REG_CSR,
-			    CSR_OPS_CONFIG, true, 100, true);
+	return wait_for_bit_le32(eth->iobase + RAVB_REG_CSR,
+				 CSR_OPS_CONFIG, true, 100, true);
 }
 
 static void ravb_base_desc_init(struct ravb_priv *eth)
diff --git a/drivers/net/xilinx_axi_emac.c b/drivers/net/xilinx_axi_emac.c
index 25c66c6098..315ad006d0 100644
--- a/drivers/net/xilinx_axi_emac.c
+++ b/drivers/net/xilinx_axi_emac.c
@@ -359,13 +359,19 @@ static int axi_ethernet_init(struct axidma_priv *priv)
 	 * will be valid until this bit is valid.
 	 * The bit is always a 1 for all other PHY interfaces.
 	 */
-	while (timeout && (!(in_be32(&regs->is) & XAE_INT_MGTRDY_MASK))) {
-		timeout--;
-		udelay(1);
-	}
-	if (!timeout) {
-		printf("%s: Timeout\n", __func__);
-		return 1;
+	if (!priv->eth_hasnobuf) {
+		err = wait_for_bit_le32(&regs->is, XAE_INT_MGTRDY_MASK,
+					true, 200, false);
+		if (err) {
+			printf("%s: Timeout\n", __func__);
+			return 1;
+		}
+
+		/*
+		 * Stop the device and reset HW
+		 * Disable interrupts
+		 */
+		writel(0, &regs->ie);
 	}
 
 	/* Stop the device and reset HW */
diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c
index f6bbcdc48e..a58a48de92 100644
--- a/drivers/net/zynq_gem.c
+++ b/drivers/net/zynq_gem.c
@@ -191,8 +191,8 @@ static u32 phy_setup_op(struct zynq_gem_priv *priv, u32 phy_addr, u32 regnum,
 	struct zynq_gem_regs *regs = priv->iobase;
 	int err;
 
-	err = wait_for_bit(__func__, &regs->nwsr, ZYNQ_GEM_NWSR_MDIOIDLE_MASK,
-			    true, 20000, false);
+	err = wait_for_bit_le32(&regs->nwsr, ZYNQ_GEM_NWSR_MDIOIDLE_MASK,
+				true, 20000, false);
 	if (err)
 		return err;
 
@@ -204,8 +204,8 @@ static u32 phy_setup_op(struct zynq_gem_priv *priv, u32 phy_addr, u32 regnum,
 	/* Write mgtcr and wait for completion */
 	writel(mgtcr, &regs->phymntnc);
 
-	err = wait_for_bit(__func__, &regs->nwsr, ZYNQ_GEM_NWSR_MDIOIDLE_MASK,
-			    true, 20000, false);
+	err = wait_for_bit_le32(&regs->nwsr, ZYNQ_GEM_NWSR_MDIOIDLE_MASK,
+				true, 20000, false);
 	if (err)
 		return err;
 
@@ -508,8 +508,8 @@ static int zynq_gem_send(struct udevice *dev, void *ptr, int len)
 	if (priv->tx_bd->status & ZYNQ_GEM_TXBUF_EXHAUSTED)
 		printf("TX buffers exhausted in mid frame\n");
 
-	return wait_for_bit(__func__, &regs->txsr, ZYNQ_GEM_TSR_DONE,
-			    true, 20000, true);
+	return wait_for_bit_le32(&regs->txsr, ZYNQ_GEM_TSR_DONE,
+				 true, 20000, true);
 }
 
 /* Do not check frame_recd flag in rx_status register 0x20 - just poll BD */
diff --git a/drivers/reset/sti-reset.c b/drivers/reset/sti-reset.c
index 024b996f0c..6616a58846 100644
--- a/drivers/reset/sti-reset.c
+++ b/drivers/reset/sti-reset.c
@@ -266,8 +266,8 @@ static int sti_reset_program_hw(struct reset_ctl *reset_ctl, int assert)
 		return 0;
 
 	reg = (void __iomem *)base + ch->ack_offset;
-	if (wait_for_bit(__func__, reg, BIT(ch->ack_bit), ctrl_val,
-			 1000, false)) {
+	if (wait_for_bit_le32(reg, BIT(ch->ack_bit), ctrl_val,
+			      1000, false)) {
 		pr_err("Stuck on waiting ack reset_ctl=%p dev=%p id=%lu\n",
 		      reset_ctl, reset_ctl->dev, reset_ctl->id);
 
diff --git a/drivers/serial/serial_pic32.c b/drivers/serial/serial_pic32.c
index b0e01aa0e5..0632d26211 100644
--- a/drivers/serial/serial_pic32.c
+++ b/drivers/serial/serial_pic32.c
@@ -51,8 +51,8 @@ static int pic32_serial_init(void __iomem *base, ulong clk, u32 baudrate)
 	u32 div = DIV_ROUND_CLOSEST(clk, baudrate * 16);
 
 	/* wait for TX FIFO to empty */
-	wait_for_bit(__func__, base + U_STA, UART_TX_EMPTY,
-		     true, CONFIG_SYS_HZ, false);
+	wait_for_bit_le32(base + U_STA, UART_TX_EMPTY,
+			  true, CONFIG_SYS_HZ, false);
 
 	/* send break */
 	writel(UART_TX_BRK, base + U_STASET);
diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c
index 228e714e09..8010ab434c 100644
--- a/drivers/spi/atmel_spi.c
+++ b/drivers/spi/atmel_spi.c
@@ -394,8 +394,8 @@ out:
 		 * Wait until the transfer is completely done before
 		 * we deactivate CS.
 		 */
-		wait_for_bit(__func__, &reg_base->sr,
-			     ATMEL_SPI_SR_TXEMPTY, true, 1000, false);
+		wait_for_bit_le32(&reg_base->sr,
+				  ATMEL_SPI_SR_TXEMPTY, true, 1000, false);
 
 		atmel_spi_cs_deactivate(dev);
 	}
diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c
index e02f2217f4..dca3fdfdea 100644
--- a/drivers/spi/cadence_qspi_apb.c
+++ b/drivers/spi/cadence_qspi_apb.c
@@ -675,8 +675,8 @@ int cadence_qspi_apb_indirect_read_execute(struct cadence_spi_platdata *plat,
 	}
 
 	/* Check indirect done status */
-	ret = wait_for_bit("QSPI", plat->regbase + CQSPI_REG_INDIRECTRD,
-			   CQSPI_REG_INDIRECTRD_DONE, 1, 10, 0);
+	ret = wait_for_bit_le32(plat->regbase + CQSPI_REG_INDIRECTRD,
+				CQSPI_REG_INDIRECTRD_DONE, 1, 10, 0);
 	if (ret) {
 		printf("Indirect read completion error (%i)\n", ret);
 		goto failrd;
@@ -762,9 +762,9 @@ int cadence_qspi_apb_indirect_write_execute(struct cadence_spi_platdata *plat,
 				bb_txbuf + rounddown(write_bytes, 4),
 				write_bytes % 4);
 
-		ret = wait_for_bit("QSPI", plat->regbase + CQSPI_REG_SDRAMLEVEL,
-				   CQSPI_REG_SDRAMLEVEL_WR_MASK <<
-				   CQSPI_REG_SDRAMLEVEL_WR_LSB, 0, 10, 0);
+		ret = wait_for_bit_le32(plat->regbase + CQSPI_REG_SDRAMLEVEL,
+					CQSPI_REG_SDRAMLEVEL_WR_MASK <<
+					CQSPI_REG_SDRAMLEVEL_WR_LSB, 0, 10, 0);
 		if (ret) {
 			printf("Indirect write timed out (%i)\n", ret);
 			goto failwr;
@@ -775,8 +775,8 @@ int cadence_qspi_apb_indirect_write_execute(struct cadence_spi_platdata *plat,
 	}
 
 	/* Check indirect done status */
-	ret = wait_for_bit("QSPI", plat->regbase + CQSPI_REG_INDIRECTWR,
-			   CQSPI_REG_INDIRECTWR_DONE, 1, 10, 0);
+	ret = wait_for_bit_le32(plat->regbase + CQSPI_REG_INDIRECTWR,
+				CQSPI_REG_INDIRECTWR_DONE, 1, 10, 0);
 	if (ret) {
 		printf("Indirect write completion error (%i)\n", ret);
 		goto failwr;
diff --git a/drivers/spi/fsl_qspi.c b/drivers/spi/fsl_qspi.c
index 1dfa89afc9..21d391add5 100644
--- a/drivers/spi/fsl_qspi.c
+++ b/drivers/spi/fsl_qspi.c
@@ -1011,6 +1011,18 @@ static int fsl_qspi_probe(struct udevice *bus)
 	priv->flash_num = plat->flash_num;
 	priv->num_chipselect = plat->num_chipselect;
 
+	/* make sure controller is not busy anywhere */
+	ret = wait_for_bit_le32(&priv->regs->sr,
+				QSPI_SR_BUSY_MASK |
+				QSPI_SR_AHB_ACC_MASK |
+				QSPI_SR_IP_ACC_MASK,
+				false, 100, false);
+
+	if (ret) {
+		debug("ERROR : The controller is busy\n");
+		return ret;
+	}
+
 	mcr_val = qspi_read32(priv->flags, &priv->regs->mcr);
 	qspi_write32(priv->flags, &priv->regs->mcr,
 		     QSPI_MCR_RESERVED_MASK | QSPI_MCR_MDIS_MASK |
@@ -1160,6 +1172,18 @@ static int fsl_qspi_claim_bus(struct udevice *dev)
 	bus = dev->parent;
 	priv = dev_get_priv(bus);
 
+	/* make sure controller is not busy anywhere */
+	ret = wait_for_bit_le32(&priv->regs->sr,
+				QSPI_SR_BUSY_MASK |
+				QSPI_SR_AHB_ACC_MASK |
+				QSPI_SR_IP_ACC_MASK,
+				false, 100, false);
+
+	if (ret) {
+		debug("ERROR : The controller is busy\n");
+		return ret;
+	}
+
 	priv->cur_amba_base = priv->amba_base[slave_plat->cs];
 
 	qspi_module_disable(priv, 0);
diff --git a/drivers/spi/mvebu_a3700_spi.c b/drivers/spi/mvebu_a3700_spi.c
index ec4907391c..d1708a8d56 100644
--- a/drivers/spi/mvebu_a3700_spi.c
+++ b/drivers/spi/mvebu_a3700_spi.c
@@ -95,8 +95,9 @@ static int spi_legacy_shift_byte(struct spi_reg *reg, unsigned int bytelen,
 	din_8 = din;
 
 	while (bytelen) {
-		ret = wait_for_bit(__func__, &reg->ctrl,
-				   MVEBU_SPI_A3700_XFER_RDY, true, 100, false);
+		ret = wait_for_bit_le32(&reg->ctrl,
+					MVEBU_SPI_A3700_XFER_RDY,
+					true,100, false);
 		if (ret)
 			return ret;
 
@@ -109,9 +110,9 @@ static int spi_legacy_shift_byte(struct spi_reg *reg, unsigned int bytelen,
 		writel(pending_dout, &reg->dout);
 
 		if (din) {
-			ret = wait_for_bit(__func__, &reg->ctrl,
-					   MVEBU_SPI_A3700_XFER_RDY,
-					   true, 100, false);
+			ret = wait_for_bit_le32(&reg->ctrl,
+						MVEBU_SPI_A3700_XFER_RDY,
+						true, 100, false);
 			if (ret)
 				return ret;
 
@@ -160,8 +161,9 @@ static int mvebu_spi_xfer(struct udevice *dev, unsigned int bitlen,
 
 	/* Deactivate CS */
 	if (flags & SPI_XFER_END) {
-		ret = wait_for_bit(__func__, &reg->ctrl,
-				   MVEBU_SPI_A3700_XFER_RDY, true, 100, false);
+		ret = wait_for_bit_le32(&reg->ctrl,
+					MVEBU_SPI_A3700_XFER_RDY,
+					true, 100, false);
 		if (ret)
 			return ret;
 
@@ -231,8 +233,8 @@ static int mvebu_spi_probe(struct udevice *bus)
 	/* Flush read/write FIFO */
 	data = readl(&reg->cfg);
 	writel(data | MVEBU_SPI_A3700_FIFO_FLUSH, &reg->cfg);
-	ret = wait_for_bit(__func__, &reg->cfg, MVEBU_SPI_A3700_FIFO_FLUSH,
-			   false, 1000, false);
+	ret = wait_for_bit_le32(&reg->cfg, MVEBU_SPI_A3700_FIFO_FLUSH,
+				false, 1000, false);
 	if (ret)
 		return ret;
 
diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
index d9aa2182f8..4b41662026 100644
--- a/drivers/usb/host/dwc2.c
+++ b/drivers/usb/host/dwc2.c
@@ -108,8 +108,8 @@ static void dwc_otg_flush_tx_fifo(struct dwc2_core_regs *regs, const int num)
 
 	writel(DWC2_GRSTCTL_TXFFLSH | (num << DWC2_GRSTCTL_TXFNUM_OFFSET),
 	       &regs->grstctl);
-	ret = wait_for_bit(__func__, &regs->grstctl, DWC2_GRSTCTL_TXFFLSH,
-			   false, 1000, false);
+	ret = wait_for_bit_le32(&regs->grstctl, DWC2_GRSTCTL_TXFFLSH,
+				false, 1000, false);
 	if (ret)
 		printf("%s: Timeout!\n", __func__);
 
@@ -127,8 +127,8 @@ static void dwc_otg_flush_rx_fifo(struct dwc2_core_regs *regs)
 	int ret;
 
 	writel(DWC2_GRSTCTL_RXFFLSH, &regs->grstctl);
-	ret = wait_for_bit(__func__, &regs->grstctl, DWC2_GRSTCTL_RXFFLSH,
-			   false, 1000, false);
+	ret = wait_for_bit_le32(&regs->grstctl, DWC2_GRSTCTL_RXFFLSH,
+				false, 1000, false);
 	if (ret)
 		printf("%s: Timeout!\n", __func__);
 
@@ -145,15 +145,15 @@ static void dwc_otg_core_reset(struct dwc2_core_regs *regs)
 	int ret;
 
 	/* Wait for AHB master IDLE state. */
-	ret = wait_for_bit(__func__, &regs->grstctl, DWC2_GRSTCTL_AHBIDLE,
-			   true, 1000, false);
+	ret = wait_for_bit_le32(&regs->grstctl, DWC2_GRSTCTL_AHBIDLE,
+				true, 1000, false);
 	if (ret)
 		printf("%s: Timeout!\n", __func__);
 
 	/* Core Soft Reset */
 	writel(DWC2_GRSTCTL_CSFTRST, &regs->grstctl);
-	ret = wait_for_bit(__func__, &regs->grstctl, DWC2_GRSTCTL_CSFTRST,
-			   false, 1000, false);
+	ret = wait_for_bit_le32(&regs->grstctl, DWC2_GRSTCTL_CSFTRST,
+				false, 1000, false);
 	if (ret)
 		printf("%s: Timeout!\n", __func__);
 
@@ -267,8 +267,8 @@ static void dwc_otg_core_host_init(struct udevice *dev,
 		clrsetbits_le32(&regs->hc_regs[i].hcchar,
 				DWC2_HCCHAR_EPDIR,
 				DWC2_HCCHAR_CHEN | DWC2_HCCHAR_CHDIS);
-		ret = wait_for_bit(__func__, &regs->hc_regs[i].hcchar,
-				   DWC2_HCCHAR_CHEN, false, 1000, false);
+		ret = wait_for_bit_le32(&regs->hc_regs[i].hcchar,
+					DWC2_HCCHAR_CHEN, false, 1000, false);
 		if (ret)
 			printf("%s: Timeout!\n", __func__);
 	}
@@ -783,8 +783,8 @@ int wait_for_chhltd(struct dwc2_hc_regs *hc_regs, uint32_t *sub, u8 *toggle)
 	int ret;
 	uint32_t hcint, hctsiz;
 
-	ret = wait_for_bit(__func__, &hc_regs->hcint, DWC2_HCINT_CHHLTD, true,
-			   1000, false);
+	ret = wait_for_bit_le32(&hc_regs->hcint, DWC2_HCINT_CHHLTD, true,
+				1000, false);
 	if (ret)
 		return ret;
 
diff --git a/drivers/usb/host/ehci-msm.c b/drivers/usb/host/ehci-msm.c
index 79f655889e..ea008bb184 100644
--- a/drivers/usb/host/ehci-msm.c
+++ b/drivers/usb/host/ehci-msm.c
@@ -133,8 +133,7 @@ static int ehci_usb_remove(struct udevice *dev)
 	setbits_le32(&ehci->usbcmd, CMD_RESET);
 
 	/* Wait for reset */
-	if (wait_for_bit(__func__, &ehci->usbcmd, CMD_RESET, false, 30,
-			 false)) {
+	if (wait_for_bit_le32(&ehci->usbcmd, CMD_RESET, false, 30, false)) {
 		printf("Stuck on USB reset.\n");
 		return -ETIMEDOUT;
 	}
diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c
index fe2627ea93..2c8fc3c4b1 100644
--- a/drivers/usb/host/ehci-mx6.c
+++ b/drivers/usb/host/ehci-mx6.c
@@ -142,13 +142,12 @@ static int usb_phy_enable(int index, struct usb_ehci *ehci)
 
 	/* Stop then Reset */
 	clrbits_le32(usb_cmd, UCMD_RUN_STOP);
-	ret = wait_for_bit(__func__, usb_cmd, UCMD_RUN_STOP, false, 10000,
-			   false);
+	ret = wait_for_bit_le32(usb_cmd, UCMD_RUN_STOP, false, 10000, false);
 	if (ret)
 		return ret;
 
 	setbits_le32(usb_cmd, UCMD_RESET);
-	ret = wait_for_bit(__func__, usb_cmd, UCMD_RESET, false, 10000, false);
+	ret = wait_for_bit_le32(usb_cmd, UCMD_RESET, false, 10000, false);
 	if (ret)
 		return ret;
 
diff --git a/drivers/usb/host/ehci-rcar_gen3.c b/drivers/usb/host/ehci-rcar_gen3.c
index 525e7f3573..16d4713bd4 100644
--- a/drivers/usb/host/ehci-rcar_gen3.c
+++ b/drivers/usb/host/ehci-rcar_gen3.c
@@ -59,7 +59,7 @@ int ehci_hcd_stop(int index)
 
 	/* Reset EHCI */
 	setbits_le32((uintptr_t)(base + EHCI_USBCMD), CMD_RESET);
-	ret = wait_for_bit("ehci-rcar", (void *)(uintptr_t)base + EHCI_USBCMD,
+	ret = wait_for_bit_le32((void *)(uintptr_t)base + EHCI_USBCMD,
 			   CMD_RESET, false, 10, true);
 	if (ret) {
 		printf("ehci-rcar: reset failed (index=%i, ret=%i).\n",
diff --git a/drivers/usb/host/ohci-lpc32xx.c b/drivers/usb/host/ohci-lpc32xx.c
index 2f2b4b90de..44a49807a4 100644
--- a/drivers/usb/host/ohci-lpc32xx.c
+++ b/drivers/usb/host/ohci-lpc32xx.c
@@ -143,8 +143,8 @@ static int usbpll_setup(void)
 	setbits_le32(&clk_pwr->usb_ctrl, CLK_USBCTRL_POSTDIV_2POW(0x01));
 	setbits_le32(&clk_pwr->usb_ctrl, CLK_USBCTRL_PLL_PWRUP);
 
-	ret = wait_for_bit(__func__, &clk_pwr->usb_ctrl, CLK_USBCTRL_PLL_STS,
-			   true, CONFIG_SYS_HZ, false);
+	ret = wait_for_bit_le32(&clk_pwr->usb_ctrl, CLK_USBCTRL_PLL_STS,
+				true, CONFIG_SYS_HZ, false);
 	if (ret)
 		return ret;
 
@@ -178,8 +178,8 @@ int usb_cpu_init(void)
 
 	/* enable I2C clock */
 	writel(OTG_CLK_I2C_EN, &otg->otg_clk_ctrl);
-	ret = wait_for_bit(__func__, &otg->otg_clk_sts, OTG_CLK_I2C_EN, true,
-			   CONFIG_SYS_HZ, false);
+	ret = wait_for_bit_le32(&otg->otg_clk_sts, OTG_CLK_I2C_EN, true,
+				CONFIG_SYS_HZ, false);
 	if (ret)
 		return ret;
 
@@ -199,8 +199,8 @@ int usb_cpu_init(void)
 			 OTG_CLK_I2C_EN | OTG_CLK_HOST_EN;
 	writel(mask, &otg->otg_clk_ctrl);
 
-	ret = wait_for_bit(__func__, &otg->otg_clk_sts, mask, true,
-			   CONFIG_SYS_HZ, false);
+	ret = wait_for_bit_le32(&otg->otg_clk_sts, mask, true,
+				CONFIG_SYS_HZ, false);
 	if (ret)
 		return ret;
 
diff --git a/drivers/usb/host/xhci-rcar.c b/drivers/usb/host/xhci-rcar.c
new file mode 100644
index 0000000000..71202d7b03
--- /dev/null
+++ b/drivers/usb/host/xhci-rcar.c
@@ -0,0 +1,159 @@
+/*
+ * Copyright (C) 2017 Marek Vasut <marek.vasut@gmail.com>
+ *
+ * Renesas RCar USB HOST xHCI Controller
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <fdtdec.h>
+#include <usb.h>
+#include <wait_bit.h>
+
+#include "xhci.h"
+#include "xhci-rcar-r8a779x_usb3_v3.h"
+
+/* Register Offset */
+#define RCAR_USB3_DL_CTRL	0x250	/* FW Download Control & Status */
+#define RCAR_USB3_FW_DATA0	0x258	/* FW Data0 */
+
+/* Register Settings */
+/* FW Download Control & Status */
+#define RCAR_USB3_DL_CTRL_ENABLE	BIT(0)
+#define RCAR_USB3_DL_CTRL_FW_SUCCESS	BIT(4)
+#define RCAR_USB3_DL_CTRL_FW_SET_DATA0	BIT(8)
+
+struct rcar_xhci_platdata {
+	fdt_addr_t	hcd_base;
+	struct clk	clk;
+};
+
+/**
+ * Contains pointers to register base addresses
+ * for the usb controller.
+ */
+struct rcar_xhci {
+	struct xhci_ctrl ctrl;	/* Needs to come first in this struct! */
+	struct usb_platdata usb_plat;
+	struct xhci_hccr *hcd;
+};
+
+static int xhci_rcar_download_fw(struct rcar_xhci *ctx, const u32 *fw_data,
+				 const size_t fw_array_size)
+{
+	void __iomem *regs = (void __iomem *)ctx->hcd;
+	int i, ret;
+
+	/* Download R-Car USB3.0 firmware */
+	setbits_le32(regs + RCAR_USB3_DL_CTRL, RCAR_USB3_DL_CTRL_ENABLE);
+
+	for (i = 0; i < fw_array_size; i++) {
+		writel(fw_data[i], regs + RCAR_USB3_FW_DATA0);
+		setbits_le32(regs + RCAR_USB3_DL_CTRL,
+			     RCAR_USB3_DL_CTRL_FW_SET_DATA0);
+
+		ret = wait_for_bit_le32(regs + RCAR_USB3_DL_CTRL,
+					RCAR_USB3_DL_CTRL_FW_SET_DATA0, false,
+					10, false);
+		if (ret)
+			break;
+	}
+
+	clrbits_le32(regs + RCAR_USB3_DL_CTRL, RCAR_USB3_DL_CTRL_ENABLE);
+
+	ret = wait_for_bit_le32(regs + RCAR_USB3_DL_CTRL,
+				RCAR_USB3_DL_CTRL_FW_SUCCESS, true,
+				10, false);
+
+	return ret;
+}
+
+static int xhci_rcar_probe(struct udevice *dev)
+{
+	struct rcar_xhci_platdata *plat = dev_get_platdata(dev);
+	struct rcar_xhci *ctx = dev_get_priv(dev);
+	struct xhci_hcor *hcor;
+	int len, ret;
+
+	ret = clk_get_by_index(dev, 0, &plat->clk);
+	if (ret < 0) {
+		dev_err(dev, "Failed to get USB3 clock\n");
+		return ret;
+	}
+
+	ret = clk_enable(&plat->clk);
+	if (ret) {
+		dev_err(dev, "Failed to enable USB3 clock\n");
+		goto err_clk;
+	}
+
+	ctx->hcd = (struct xhci_hccr *)plat->hcd_base;
+	len = HC_LENGTH(xhci_readl(&ctx->hcd->cr_capbase));
+	hcor = (struct xhci_hcor *)((uintptr_t)ctx->hcd + len);
+
+	ret = xhci_rcar_download_fw(ctx, firmware_r8a779x_usb3_v3,
+				    ARRAY_SIZE(firmware_r8a779x_usb3_v3));
+	if (ret) {
+		dev_err(dev, "Failed to download firmware\n");
+		goto err_fw;
+	}
+
+	ret = xhci_register(dev, ctx->hcd, hcor);
+	if (ret) {
+		dev_err(dev, "Failed to register xHCI\n");
+		goto err_fw;
+	}
+
+	return 0;
+
+err_fw:
+	clk_disable(&plat->clk);
+err_clk:
+	clk_free(&plat->clk);
+	return ret;
+}
+
+static int xhci_rcar_deregister(struct udevice *dev)
+{
+	struct rcar_xhci_platdata *plat = dev_get_platdata(dev);
+
+	clk_disable(&plat->clk);
+	clk_free(&plat->clk);
+
+	return xhci_deregister(dev);
+}
+
+static int xhci_rcar_ofdata_to_platdata(struct udevice *dev)
+{
+	struct rcar_xhci_platdata *plat = dev_get_platdata(dev);
+
+	plat->hcd_base = devfdt_get_addr(dev);
+	if (plat->hcd_base == FDT_ADDR_T_NONE) {
+		debug("Can't get the XHCI register base address\n");
+		return -ENXIO;
+	}
+
+	return 0;
+}
+
+static const struct udevice_id xhci_rcar_ids[] = {
+	{ .compatible = "renesas,xhci-r8a7795" },
+	{ .compatible = "renesas,xhci-r8a7796" },
+	{ }
+};
+
+U_BOOT_DRIVER(usb_xhci) = {
+	.name		= "xhci_rcar",
+	.id		= UCLASS_USB,
+	.probe		= xhci_rcar_probe,
+	.remove		= xhci_rcar_deregister,
+	.ops		= &xhci_usb_ops,
+	.of_match	= xhci_rcar_ids,
+	.ofdata_to_platdata = xhci_rcar_ofdata_to_platdata,
+	.platdata_auto_alloc_size = sizeof(struct rcar_xhci_platdata),
+	.priv_auto_alloc_size = sizeof(struct rcar_xhci),
+	.flags		= DM_FLAG_ALLOC_PRIV_DMA,
+};
diff --git a/drivers/video/atmel_hlcdfb.c b/drivers/video/atmel_hlcdfb.c
index f77da2ec97..c0dd689e7c 100644
--- a/drivers/video/atmel_hlcdfb.c
+++ b/drivers/video/atmel_hlcdfb.c
@@ -70,26 +70,26 @@ void lcd_ctrl_init(void *lcdbase)
 
 	/* Disable DISP signal */
 	writel(LCDC_LCDDIS_DISPDIS, &regs->lcdc_lcddis);
-	ret = wait_for_bit(__func__, &regs->lcdc_lcdsr, LCDC_LCDSR_DISPSTS,
-			   false, 1000, false);
+	ret = wait_for_bit_le32(&regs->lcdc_lcdsr, LCDC_LCDSR_DISPSTS,
+				false, 1000, false);
 	if (ret)
 		printf("%s: %d: Timeout!\n", __func__, __LINE__);
 	/* Disable synchronization */
 	writel(LCDC_LCDDIS_SYNCDIS, &regs->lcdc_lcddis);
-	ret = wait_for_bit(__func__, &regs->lcdc_lcdsr, LCDC_LCDSR_LCDSTS,
-			   false, 1000, false);
+	ret = wait_for_bit_le32(&regs->lcdc_lcdsr, LCDC_LCDSR_LCDSTS,
+				false, 1000, false);
 	if (ret)
 		printf("%s: %d: Timeout!\n", __func__, __LINE__);
 	/* Disable pixel clock */
 	writel(LCDC_LCDDIS_CLKDIS, &regs->lcdc_lcddis);
-	ret = wait_for_bit(__func__, &regs->lcdc_lcdsr, LCDC_LCDSR_CLKSTS,
-			   false, 1000, false);
+	ret = wait_for_bit_le32(&regs->lcdc_lcdsr, LCDC_LCDSR_CLKSTS,
+				false, 1000, false);
 	if (ret)
 		printf("%s: %d: Timeout!\n", __func__, __LINE__);
 	/* Disable PWM */
 	writel(LCDC_LCDDIS_PWMDIS, &regs->lcdc_lcddis);
-	ret = wait_for_bit(__func__, &regs->lcdc_lcdsr, LCDC_LCDSR_PWMSTS,
-			   false, 1000, false);
+	ret = wait_for_bit_le32(&regs->lcdc_lcdsr, LCDC_LCDSR_PWMSTS,
+				false, 1000, false);
 	if (ret)
 		printf("%s: %d: Timeout!\n", __func__, __LINE__);
 
@@ -215,26 +215,26 @@ void lcd_ctrl_init(void *lcdbase)
 	/* Enable LCD */
 	value = readl(&regs->lcdc_lcden);
 	writel(value | LCDC_LCDEN_CLKEN, &regs->lcdc_lcden);
-	ret = wait_for_bit(__func__, &regs->lcdc_lcdsr, LCDC_LCDSR_CLKSTS,
-			   true, 1000, false);
+	ret = wait_for_bit_le32(&regs->lcdc_lcdsr, LCDC_LCDSR_CLKSTS,
+				true, 1000, false);
 	if (ret)
 		printf("%s: %d: Timeout!\n", __func__, __LINE__);
 	value = readl(&regs->lcdc_lcden);
 	writel(value | LCDC_LCDEN_SYNCEN, &regs->lcdc_lcden);
-	ret = wait_for_bit(__func__, &regs->lcdc_lcdsr, LCDC_LCDSR_LCDSTS,
-			   true, 1000, false);
+	ret = wait_for_bit_le32(&regs->lcdc_lcdsr, LCDC_LCDSR_LCDSTS,
+				true, 1000, false);
 	if (ret)
 		printf("%s: %d: Timeout!\n", __func__, __LINE__);
 	value = readl(&regs->lcdc_lcden);
 	writel(value | LCDC_LCDEN_DISPEN, &regs->lcdc_lcden);
-	ret = wait_for_bit(__func__, &regs->lcdc_lcdsr, LCDC_LCDSR_DISPSTS,
-			   true, 1000, false);
+	ret = wait_for_bit_le32(&regs->lcdc_lcdsr, LCDC_LCDSR_DISPSTS,
+				true, 1000, false);
 	if (ret)
 		printf("%s: %d: Timeout!\n", __func__, __LINE__);
 	value = readl(&regs->lcdc_lcden);
 	writel(value | LCDC_LCDEN_PWMEN, &regs->lcdc_lcden);
-	ret = wait_for_bit(__func__, &regs->lcdc_lcdsr, LCDC_LCDSR_PWMSTS,
-			   true, 1000, false);
+	ret = wait_for_bit_le32(&regs->lcdc_lcdsr, LCDC_LCDSR_PWMSTS,
+				true, 1000, false);
 	if (ret)
 		printf("%s: %d: Timeout!\n", __func__, __LINE__);
 
@@ -299,26 +299,26 @@ static void atmel_hlcdc_init(struct udevice *dev)
 
 	/* Disable DISP signal */
 	writel(LCDC_LCDDIS_DISPDIS, &regs->lcdc_lcddis);
-	ret = wait_for_bit(__func__, &regs->lcdc_lcdsr, LCDC_LCDSR_DISPSTS,
-			   false, 1000, false);
+	ret = wait_for_bit_le32(&regs->lcdc_lcdsr, LCDC_LCDSR_DISPSTS,
+				false, 1000, false);
 	if (ret)
 		printf("%s: %d: Timeout!\n", __func__, __LINE__);
 	/* Disable synchronization */
 	writel(LCDC_LCDDIS_SYNCDIS, &regs->lcdc_lcddis);
-	ret = wait_for_bit(__func__, &regs->lcdc_lcdsr, LCDC_LCDSR_LCDSTS,
-			   false, 1000, false);
+	ret = wait_for_bit_le32(&regs->lcdc_lcdsr, LCDC_LCDSR_LCDSTS,
+				false, 1000, false);
 	if (ret)
 		printf("%s: %d: Timeout!\n", __func__, __LINE__);
 	/* Disable pixel clock */
 	writel(LCDC_LCDDIS_CLKDIS, &regs->lcdc_lcddis);
-	ret = wait_for_bit(__func__, &regs->lcdc_lcdsr, LCDC_LCDSR_CLKSTS,
-			   false, 1000, false);
+	ret = wait_for_bit_le32(&regs->lcdc_lcdsr, LCDC_LCDSR_CLKSTS,
+				false, 1000, false);
 	if (ret)
 		printf("%s: %d: Timeout!\n", __func__, __LINE__);
 	/* Disable PWM */
 	writel(LCDC_LCDDIS_PWMDIS, &regs->lcdc_lcddis);
-	ret = wait_for_bit(__func__, &regs->lcdc_lcdsr, LCDC_LCDSR_PWMSTS,
-			   false, 1000, false);
+	ret = wait_for_bit_le32(&regs->lcdc_lcdsr, LCDC_LCDSR_PWMSTS,
+				false, 1000, false);
 	if (ret)
 		printf("%s: %d: Timeout!\n", __func__, __LINE__);
 
@@ -451,26 +451,26 @@ static void atmel_hlcdc_init(struct udevice *dev)
 	/* Enable LCD */
 	value = readl(&regs->lcdc_lcden);
 	writel(value | LCDC_LCDEN_CLKEN, &regs->lcdc_lcden);
-	ret = wait_for_bit(__func__, &regs->lcdc_lcdsr, LCDC_LCDSR_CLKSTS,
-			   true, 1000, false);
+	ret = wait_for_bit_le32(&regs->lcdc_lcdsr, LCDC_LCDSR_CLKSTS,
+				true, 1000, false);
 	if (ret)
 		printf("%s: %d: Timeout!\n", __func__, __LINE__);
 	value = readl(&regs->lcdc_lcden);
 	writel(value | LCDC_LCDEN_SYNCEN, &regs->lcdc_lcden);
-	ret = wait_for_bit(__func__, &regs->lcdc_lcdsr, LCDC_LCDSR_LCDSTS,
-			   true, 1000, false);
+	ret = wait_for_bit_le32(&regs->lcdc_lcdsr, LCDC_LCDSR_LCDSTS,
+				true, 1000, false);
 	if (ret)
 		printf("%s: %d: Timeout!\n", __func__, __LINE__);
 	value = readl(&regs->lcdc_lcden);
 	writel(value | LCDC_LCDEN_DISPEN, &regs->lcdc_lcden);
-	ret = wait_for_bit(__func__, &regs->lcdc_lcdsr, LCDC_LCDSR_DISPSTS,
-			   true, 1000, false);
+	ret = wait_for_bit_le32(&regs->lcdc_lcdsr, LCDC_LCDSR_DISPSTS,
+				true, 1000, false);
 	if (ret)
 		printf("%s: %d: Timeout!\n", __func__, __LINE__);
 	value = readl(&regs->lcdc_lcden);
 	writel(value | LCDC_LCDEN_PWMEN, &regs->lcdc_lcden);
-	ret = wait_for_bit(__func__, &regs->lcdc_lcdsr, LCDC_LCDSR_PWMSTS,
-			   true, 1000, false);
+	ret = wait_for_bit_le32(&regs->lcdc_lcdsr, LCDC_LCDSR_PWMSTS,
+				true, 1000, false);
 	if (ret)
 		printf("%s: %d: Timeout!\n", __func__, __LINE__);
 }
diff --git a/include/wait_bit.h b/include/wait_bit.h
index 06ad43a122..bd021baa48 100644
--- a/include/wait_bit.h
+++ b/include/wait_bit.h
@@ -16,7 +16,7 @@
 #include <asm/io.h>
 
 /**
- * wait_for_bit()	waits for bit set/cleared in register
+ * wait_for_bit_x()	waits for bit set/cleared in register
  *
  * Function polls register waiting for specific bit(s) change
  * (either 0->1 or 1->0). It can fail under two conditions:
@@ -25,49 +25,60 @@
  * Function succeeds only if all bits of masked register are set/cleared
  * (depending on set option).
  *
- * @param prefix	Prefix added to timeout messagge (message visible only
- *			with debug enabled)
- * @param reg		Register that will be read (using readl())
+ * @param reg		Register that will be read (using read_x())
  * @param mask		Bit(s) of register that must be active
  * @param set		Selects wait condition (bit set or clear)
- * @param timeout_ms	Timeout (in miliseconds)
+ * @param timeout_ms	Timeout (in milliseconds)
  * @param breakable	Enables CTRL-C interruption
  * @return		0 on success, -ETIMEDOUT or -EINTR on failure
  */
-static inline int wait_for_bit(const char *prefix, const u32 *reg,
-			       const u32 mask, const bool set,
-			       const unsigned int timeout_ms,
-			       const bool breakable)
-{
-	u32 val;
-	unsigned long start = get_timer(0);
 
-	while (1) {
-		val = readl(reg);
-
-		if (!set)
-			val = ~val;
-
-		if ((val & mask) == mask)
-			return 0;
-
-		if (get_timer(start) > timeout_ms)
-			break;
-
-		if (breakable && ctrlc()) {
-			puts("Abort\n");
-			return -EINTR;
-		}
-
-		udelay(1);
-		WATCHDOG_RESET();
-	}
-
-	debug("%s: Timeout (reg=%p mask=%08x wait_set=%i)\n", prefix, reg, mask,
-	      set);
-
-	return -ETIMEDOUT;
+#define BUILD_WAIT_FOR_BIT(sfx, type, read)				\
+									\
+static inline int wait_for_bit_##sfx(const void *reg,			\
+				     const type mask,			\
+				     const bool set,			\
+				     const unsigned int timeout_ms,	\
+				     const bool breakable)		\
+{									\
+	type val;							\
+	unsigned long start = get_timer(0);				\
+									\
+	while (1) {							\
+		val = read(reg);					\
+									\
+		if (!set)						\
+			val = ~val;					\
+									\
+		if ((val & mask) == mask)				\
+			return 0;					\
+									\
+		if (get_timer(start) > timeout_ms)			\
+			break;						\
+									\
+		if (breakable && ctrlc()) {				\
+			puts("Abort\n");				\
+			return -EINTR;					\
+		}							\
+									\
+		udelay(1);						\
+		WATCHDOG_RESET();					\
+	}								\
+									\
+	debug("%s: Timeout (reg=%p mask=%x wait_set=%i)\n", __func__,	\
+	      reg, mask, set);						\
+									\
+	return -ETIMEDOUT;						\
 }
 
+BUILD_WAIT_FOR_BIT(8, u8, readb)
+BUILD_WAIT_FOR_BIT(le16, u16, readw)
+#ifdef readw_be
+BUILD_WAIT_FOR_BIT(be16, u16, readw_be)
+#endif
+BUILD_WAIT_FOR_BIT(le32, u32, readl)
+#ifdef readl_be
+BUILD_WAIT_FOR_BIT(be32, u32, readl_be)
+#endif
 
 #endif

commit 02621bf711b501b21497ebb1bfae5c7f351675d1
Author: Jagan Teki <jagan@amarulasolutions.com>
Date:   Fri Jan 5 12:34:23 2018 +0530

    UPSTREAM: mtd: nand: mxs_nand_spl: Remove nand size print
    
    It is not much needed to print nand size in SPL during nand boot,
    and most of nand spl drivers doesn't print the same.
    
    Change-Id: I1b7893d1cbd880b7e5640f5ecb12910dd7f40fae
    Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit ca9d211e2c7801bc3e194d325ece0d3b583b32d2)

diff --git a/drivers/mtd/nand/mxs_nand_spl.c b/drivers/mtd/nand/mxs_nand_spl.c
index b6c9208140..910f76dd9d 100644
--- a/drivers/mtd/nand/mxs_nand_spl.c
+++ b/drivers/mtd/nand/mxs_nand_spl.c
@@ -153,7 +153,6 @@ static int mxs_nand_init(void)
 	nand_chip.numchips = 1;
 
 	/* identify flash device */
-	puts(": ");
 	if (mxs_flash_ident(mtd)) {
 		printf("Failed to identify\n");
 		return -1;
@@ -167,7 +166,6 @@ static int mxs_nand_init(void)
 	mtd->size = nand_chip.chipsize;
 	nand_chip.scan_bbt(mtd);
 
-	printf("%llu MiB\n", (mtd->size / (1024 * 1024)));
 	return 0;
 }
 

commit d359f29f6b6070dfafff3c5d914ba743605766a3
Author: Sean Nyekjaer <sean.nyekjaer@prevas.dk>
Date:   Fri Dec 15 08:51:54 2017 +0100

    UPSTREAM: mtd/spi: fix block count for is25lq040b
    
    This spi-nor is 4Mbit/512KB
    
    Fixes: b4fbcbc5a5 ("mtd/spi: add support for is25lq040b")
    Change-Id: I0f7204f031a01c3954c1e2186e1b658c35048239
    Signed-off-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 065592b40b41b11ee66d8ff71a55156bf1b35088)

diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c
index 49009b8c45..9f493fff9a 100644
--- a/drivers/mtd/spi/spi_flash_ids.c
+++ b/drivers/mtd/spi/spi_flash_ids.c
@@ -68,10 +68,10 @@ const struct spi_flash_info spi_flash_ids[] = {
 	{"GD25Q256",       INFO(0xc84019, 0x0, 64 * 1024,   512, RD_FULL | WR_QPP | SECT_4K)},
 #endif
 #ifdef CONFIG_SPI_FLASH_ISSI		/* ISSI */
+	{"is25lq040b",	   INFO(0x9d4013, 0x0, 64 * 1024,    8, 0)  },
 	{"is25lp032",	   INFO(0x9d6016, 0x0, 64 * 1024,    64, 0) },
 	{"is25lp064",	   INFO(0x9d6017, 0x0, 64 * 1024,   128, 0) },
 	{"is25lp128",	   INFO(0x9d6018, 0x0, 64 * 1024,   256, 0) },
-	{"is25lq040b",	   INFO(0x9d4013, 0x0, 64 * 1024,    64, 0) },
 #endif
 #ifdef CONFIG_SPI_FLASH_MACRONIX	/* MACRONIX */
 	{"mx25l2006e",	   INFO(0xc22012, 0x0, 64 * 1024,     4, 0) },

commit 0cced741cfaf8e4d1ce5061febd1718bff75c375
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Wed Dec 6 13:51:50 2017 +0900

    UPSTREAM: mtd: nand: denali: make NAND_DENALI unconfigurable option
    
    denali.c has no driver entry in itself.  It makes sense only when
    compiled together with denali_dt.c
    
    Let NAND_DENALI_DT select NAND_DENALI, and hide NAND_DENALI from
    the Kconfig menu.
    
    Change-Id: I6b1299b7995b7f2481f0c3a69599ee11e7be3779
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit dc774e69bb72a3d8ff4c2af7a280a655f395530b)

diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 966096a96f..3217a27b82 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -10,15 +10,14 @@ config SYS_NAND_SELF_INIT
 	  NAND initialization process.
 
 config NAND_DENALI
-	bool "Support Denali NAND controller"
+	bool
 	select SYS_NAND_SELF_INIT
 	imply CMD_NAND
-	help
-	  Enable support for the Denali NAND controller.
 
 config NAND_DENALI_DT
 	bool "Support Denali NAND controller as a DT device"
-	depends on NAND_DENALI && OF_CONTROL && DM
+	select NAND_DENALI
+	depends on OF_CONTROL && DM
 	help
 	  Enable the driver for NAND flash on platforms using a Denali NAND
 	  controller as a DT device.

commit f03218eb8560654b1b8347bad5684e61ecc801aa
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Thu Nov 30 13:45:27 2017 +0900

    UPSTREAM: mtd: nand: denali: consolidate include directives
    
    Include necessary headers explicitly without relying on indirect
    header inclusion.
    
    <common.h>, <malloc.h> are unneeded.
    
    Change-Id: Iba154c7a088925f1aee9669c7433d1be05225004
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 0faef2eba946a95f9c78d2b3db47e15bac04b52e)

diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
index 8ff2d09422..3a67653cb9 100644
--- a/drivers/mtd/nand/denali.c
+++ b/drivers/mtd/nand/denali.c
@@ -6,14 +6,14 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
-#include <common.h>
-#include <malloc.h>
-#include <nand.h>
 #include <dm.h>
+#include <nand.h>
 #include <linux/bitfield.h>
 #include <linux/dma-direction.h>
 #include <linux/errno.h>
 #include <linux/io.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/rawnand.h>
 
 #include "denali.h"
 

commit 0e8b5665623fb52fd37cd5e630374f51c4529b9f
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Thu Nov 30 13:45:26 2017 +0900

    UPSTREAM: mtd: nand: denali_dt: replace printf() with pr_err()
    
    The Linux derived log functions can be used anywhere and easily
    turned on/off by CONFIG_LOGLEVEL.
    
    Change-Id: I74a94091a9eddd56567fff0b218f576b31d28d5e
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 681ed4d0d5096b16f81c54c3e5a5efdc9f5f0bc1)

diff --git a/drivers/mtd/nand/denali_dt.c b/drivers/mtd/nand/denali_dt.c
index 9d6cb09b42..c96512f2df 100644
--- a/drivers/mtd/nand/denali_dt.c
+++ b/drivers/mtd/nand/denali_dt.c
@@ -5,11 +5,11 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
-#include <common.h>
 #include <clk.h>
 #include <dm.h>
 #include <linux/io.h>
 #include <linux/ioport.h>
+#include <linux/printk.h>
 
 #include "denali.h"
 
@@ -118,6 +118,6 @@ void board_nand_init(void)
 					  DM_GET_DRIVER(denali_nand_dt),
 					  &dev);
 	if (ret && ret != -ENODEV)
-		printf("Failed to initialize Denali NAND controller. (error %d)\n",
+		pr_err("Failed to initialize Denali NAND controller. (error %d)\n",
 		       ret);
 }

commit 331c2375688d79920fb06b8f0c4c52a7df56fb29
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Thu Nov 30 13:45:24 2017 +0900

    UPSTREAM: mtd: nand: Rename nand.h into rawnand.h
    
    This header was renamed to rawnand.h in Linux.
    
    The following is the corresponding commit in Linux.
    
      commit d4092d76a4a4e57b65910899948a83cc8646c5a5
      Author: Boris Brezillon <boris.brezillon@free-electrons.com>
      Date:   Fri Aug 4 17:29:10 2017 +0200
    
          mtd: nand: Rename nand.h into rawnand.h
    
          We are planning to share more code between different NAND based
          devices (SPI NAND, OneNAND and raw NANDs), but before doing that
          we need to move the existing include/linux/mtd/nand.h file into
          include/linux/mtd/rawnand.h so we can later create a nand.h header
          containing all common structure and function prototypes.
    
    Change-Id: Ia387c26297c268a449e3451c7adfabcd6417b278
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 6ae3900a86b52429bf7a73ad832f0ad02acc2282)

diff --git a/arch/arm/include/asm/ti-common/davinci_nand.h b/arch/arm/include/asm/ti-common/davinci_nand.h
index f343ac2c0f..e26381c7fd 100644
--- a/arch/arm/include/asm/ti-common/davinci_nand.h
+++ b/arch/arm/include/asm/ti-common/davinci_nand.h
@@ -9,7 +9,7 @@
 #ifndef _DAVINCI_NAND_H_
 #define _DAVINCI_NAND_H_
 
-#include <linux/mtd/nand.h>
+#include <linux/mtd/rawnand.h>
 #include <asm/arch/hardware.h>
 
 #define NAND_READ_START  	0x00
diff --git a/arch/arm/mach-omap2/omap3/spl_id_nand.c b/arch/arm/mach-omap2/omap3/spl_id_nand.c
index 0e2f0a2f6d..5c9549c743 100644
--- a/arch/arm/mach-omap2/omap3/spl_id_nand.c
+++ b/arch/arm/mach-omap2/omap3/spl_id_nand.c
@@ -14,7 +14,7 @@
 
 #include <common.h>
 #include <jffs2/load_kernel.h>
-#include <linux/mtd/nand.h>
+#include <linux/mtd/rawnand.h>
 #include <linux/mtd/omap_gpmc.h>
 #include <asm/io.h>
 #include <asm/arch/sys_proto.h>
diff --git a/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c b/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
index 903732b23b..4fb55e8ca3 100644
--- a/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
+++ b/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
@@ -16,7 +16,7 @@
 #include <asm/arch/gpio.h>
 #include <asm/arch/clk.h>
 #include <lcd.h>
-#include <linux/mtd/nand.h>
+#include <linux/mtd/rawnand.h>
 #include <atmel_lcdc.h>
 #include <asm/mach-types.h>
 
diff --git a/board/isee/igep00x0/common.c b/board/isee/igep00x0/common.c
index e59516f612..d35afa5cad 100644
--- a/board/isee/igep00x0/common.c
+++ b/board/isee/igep00x0/common.c
@@ -8,7 +8,7 @@
 #include <asm/arch/mux.h>
 #include <asm/arch/sys_proto.h>
 #include <jffs2/load_kernel.h>
-#include <linux/mtd/nand.h>
+#include <linux/mtd/rawnand.h>
 #include "igep00x0.h"
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/isee/igep00x0/igep00x0.c b/board/isee/igep00x0/igep00x0.c
index 5c7f256711..01bb99fbb8 100644
--- a/board/isee/igep00x0/igep00x0.c
+++ b/board/isee/igep00x0/igep00x0.c
@@ -18,7 +18,7 @@
 #include <asm/arch/mux.h>
 #include <asm/arch/sys_proto.h>
 #include <linux/mtd/mtd.h>
-#include <linux/mtd/nand.h>
+#include <linux/mtd/rawnand.h>
 #include <linux/mtd/onenand.h>
 #include <jffs2/load_kernel.h>
 #include <mtd_node.h>
diff --git a/board/isee/igep00x0/spl.c b/board/isee/igep00x0/spl.c
index eb705cbe88..f1c99dd7cf 100644
--- a/board/isee/igep00x0/spl.c
+++ b/board/isee/igep00x0/spl.c
@@ -5,7 +5,7 @@
 #include <asm/arch/mem.h>
 #include <asm/arch/sys_proto.h>
 #include <jffs2/load_kernel.h>
-#include <linux/mtd/nand.h>
+#include <linux/mtd/rawnand.h>
 #include "igep00x0.h"
 
 /*
diff --git a/board/logicpd/omap3som/omap3logic.c b/board/logicpd/omap3som/omap3logic.c
index fe3f9e664f..30be982b4c 100644
--- a/board/logicpd/omap3som/omap3logic.c
+++ b/board/logicpd/omap3som/omap3logic.c
@@ -26,7 +26,7 @@
 #include <asm/arch/sys_proto.h>
 #include <asm/gpio.h>
 #include <asm/mach-types.h>
-#include <linux/mtd/nand.h>
+#include <linux/mtd/rawnand.h>
 #include <asm/omap_musb.h>
 #include <linux/errno.h>
 #include <linux/usb/ch9.h>
diff --git a/board/mini-box/picosam9g45/picosam9g45.c b/board/mini-box/picosam9g45/picosam9g45.c
index f3263eba6e..dd2db9a762 100644
--- a/board/mini-box/picosam9g45/picosam9g45.c
+++ b/board/mini-box/picosam9g45/picosam9g45.c
@@ -20,7 +20,7 @@
 #include <asm/arch/gpio.h>
 #include <asm/arch/clk.h>
 #include <lcd.h>
-#include <linux/mtd/nand.h>
+#include <linux/mtd/rawnand.h>
 #include <atmel_lcdc.h>
 #include <atmel_mci.h>
 #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
diff --git a/board/overo/overo.c b/board/overo/overo.c
index 140e34d4dd..7b44a37103 100644
--- a/board/overo/overo.c
+++ b/board/overo/overo.c
@@ -17,7 +17,7 @@
 #include <ns16550.h>
 #include <netdev.h>
 #include <twl4030.h>
-#include <linux/mtd/nand.h>
+#include <linux/mtd/rawnand.h>
 #include <asm/io.h>
 #include <asm/arch/mmc_host_def.h>
 #include <asm/arch/mux.h>
diff --git a/board/siemens/taurus/taurus.c b/board/siemens/taurus/taurus.c
index 8390bdd5f8..71541ba3a4 100644
--- a/board/siemens/taurus/taurus.c
+++ b/board/siemens/taurus/taurus.c
@@ -26,7 +26,7 @@
 #include <asm/arch/atmel_serial.h>
 #include <asm/arch/clk.h>
 #include <asm/gpio.h>
-#include <linux/mtd/nand.h>
+#include <linux/mtd/rawnand.h>
 #include <atmel_mci.h>
 #include <asm/arch/at91_spi.h>
 #include <spi.h>
diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
index 2f62fbec69..bdf84b0be8 100644
--- a/board/ti/beagle/beagle.c
+++ b/board/ti/beagle/beagle.c
@@ -20,7 +20,7 @@
 #include <status_led.h>
 #endif
 #include <twl4030.h>
-#include <linux/mtd/nand.h>
+#include <linux/mtd/rawnand.h>
 #include <asm/io.h>
 #include <asm/arch/mmc_host_def.h>
 #include <asm/arch/mux.h>
diff --git a/board/ti/evm/evm.c b/board/ti/evm/evm.c
index 1f0433dcc0..4d5ddff1e1 100644
--- a/board/ti/evm/evm.c
+++ b/board/ti/evm/evm.c
@@ -25,7 +25,7 @@
 #include <twl4030.h>
 #include <asm/mach-types.h>
 #include <asm/omap_musb.h>
-#include <linux/mtd/nand.h>
+#include <linux/mtd/rawnand.h>
 #include <linux/usb/ch9.h>
 #include <linux/usb/gadget.h>
 #include <linux/usb/musb.h>
diff --git a/cmd/jffs2.c b/cmd/jffs2.c
index aee2f4513d..13c533cf12 100644
--- a/cmd/jffs2.c
+++ b/cmd/jffs2.c
@@ -80,7 +80,7 @@
 #include <cramfs/cramfs_fs.h>
 
 #if defined(CONFIG_CMD_NAND)
-#include <linux/mtd/nand.h>
+#include <linux/mtd/rawnand.h>
 #include <nand.h>
 #endif
 
diff --git a/cmd/mtdparts.c b/cmd/mtdparts.c
index 3275eb919b..3169c33265 100644
--- a/cmd/mtdparts.c
+++ b/cmd/mtdparts.c
@@ -81,7 +81,7 @@
 #include <linux/mtd/mtd.h>
 
 #if defined(CONFIG_CMD_NAND)
-#include <linux/mtd/nand.h>
+#include <linux/mtd/rawnand.h>
 #include <nand.h>
 #endif
 
diff --git a/drivers/mtd/nand/arasan_nfc.c b/drivers/mtd/nand/arasan_nfc.c
index a8f795d957..14b27337b6 100644
--- a/drivers/mtd/nand/arasan_nfc.c
+++ b/drivers/mtd/nand/arasan_nfc.c
@@ -11,7 +11,7 @@
 #include <asm/io.h>
 #include <linux/errno.h>
 #include <linux/mtd/mtd.h>
-#include <linux/mtd/nand.h>
+#include <linux/mtd/rawnand.h>
 #include <linux/mtd/partitions.h>
 #include <linux/mtd/nand_ecc.h>
 #include <asm/arch/hardware.h>
diff --git a/drivers/mtd/nand/denali.h b/drivers/mtd/nand/denali.h
index 04b4ae2683..bdaea71f91 100644
--- a/drivers/mtd/nand/denali.h
+++ b/drivers/mtd/nand/denali.h
@@ -9,7 +9,7 @@
 #define __DENALI_H__
 
 #include <linux/bitops.h>
-#include <linux/mtd/nand.h>
+#include <linux/mtd/rawnand.h>
 #include <linux/types.h>
 
 #define DEVICE_RESET				0x0
diff --git a/drivers/mtd/nand/denali_spl.c b/drivers/mtd/nand/denali_spl.c
index 3cb9849735..1a59b937a6 100644
--- a/drivers/mtd/nand/denali_spl.c
+++ b/drivers/mtd/nand/denali_spl.c
@@ -8,7 +8,7 @@
 #include <common.h>
 #include <asm/io.h>
 #include <asm/unaligned.h>
-#include <linux/mtd/nand.h>
+#include <linux/mtd/rawnand.h>
 #include "denali.h"
 
 #define DENALI_MAP01		(1 << 26)	/* read/write pages in PIO */
diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_elbc_nand.c
index b3c23b0339..fc3720b3bd 100644
--- a/drivers/mtd/nand/fsl_elbc_nand.c
+++ b/drivers/mtd/nand/fsl_elbc_nand.c
@@ -13,7 +13,7 @@
 #include <nand.h>
 
 #include <linux/mtd/mtd.h>
-#include <linux/mtd/nand.h>
+#include <linux/mtd/rawnand.h>
 #include <linux/mtd/nand_ecc.h>
 
 #include <asm/io.h>
diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c
index a757a3be44..d1165f7d6b 100644
--- a/drivers/mtd/nand/fsl_ifc_nand.c
+++ b/drivers/mtd/nand/fsl_ifc_nand.c
@@ -12,7 +12,7 @@
 #include <nand.h>
 
 #include <linux/mtd/mtd.h>
-#include <linux/mtd/nand.h>
+#include <linux/mtd/rawnand.h>
 #include <linux/mtd/nand_ecc.h>
 
 #include <asm/io.h>
diff --git a/drivers/mtd/nand/fsl_ifc_spl.c b/drivers/mtd/nand/fsl_ifc_spl.c
index 4e49a4e154..59461945d3 100644
--- a/drivers/mtd/nand/fsl_ifc_spl.c
+++ b/drivers/mtd/nand/fsl_ifc_spl.c
@@ -10,7 +10,7 @@
 #include <common.h>
 #include <asm/io.h>
 #include <fsl_ifc.h>
-#include <linux/mtd/nand.h>
+#include <linux/mtd/rawnand.h>
 #ifdef CONFIG_CHAIN_OF_TRUST
 #include <fsl_validate.h>
 #endif
diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c
index d774ab8d82..bed9b65ef4 100644
--- a/drivers/mtd/nand/mxs_nand.c
+++ b/drivers/mtd/nand/mxs_nand.c
@@ -15,7 +15,7 @@
 
 #include <common.h>
 #include <linux/mtd/mtd.h>
-#include <linux/mtd/nand.h>
+#include <linux/mtd/rawnand.h>
 #include <linux/types.h>
 #include <malloc.h>
 #include <linux/errno.h>
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index aca32318d5..eb9f121f81 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -37,7 +37,7 @@
 #include <linux/err.h>
 #include <linux/compat.h>
 #include <linux/mtd/mtd.h>
-#include <linux/mtd/nand.h>
+#include <linux/mtd/rawnand.h>
 #include <linux/mtd/nand_ecc.h>
 #include <linux/mtd/nand_bch.h>
 #ifdef CONFIG_MTD_PARTITIONS
diff --git a/drivers/mtd/nand/nand_bbt.c b/drivers/mtd/nand/nand_bbt.c
index aa4cf30c3f..08444f94aa 100644
--- a/drivers/mtd/nand/nand_bbt.c
+++ b/drivers/mtd/nand/nand_bbt.c
@@ -62,7 +62,7 @@
 #include <linux/compat.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/bbm.h>
-#include <linux/mtd/nand.h>
+#include <linux/mtd/rawnand.h>
 #include <linux/bitops.h>
 #include <linux/string.h>
 
diff --git a/drivers/mtd/nand/nand_bch.c b/drivers/mtd/nand/nand_bch.c
index 6c20d53e7e..b7c1171d50 100644
--- a/drivers/mtd/nand/nand_bch.c
+++ b/drivers/mtd/nand/nand_bch.c
@@ -13,7 +13,7 @@
 
 #include <linux/bitops.h>
 #include <linux/mtd/mtd.h>
-#include <linux/mtd/nand.h>
+#include <linux/mtd/rawnand.h>
 #include <linux/mtd/nand_bch.h>
 #include <linux/bch.h>
 #include <malloc.h>
diff --git a/drivers/mtd/nand/nand_ids.c b/drivers/mtd/nand/nand_ids.c
index 7bd9f7d417..4f1de4da41 100644
--- a/drivers/mtd/nand/nand_ids.c
+++ b/drivers/mtd/nand/nand_ids.c
@@ -7,7 +7,7 @@
  *
  */
 #include <common.h>
-#include <linux/mtd/nand.h>
+#include <linux/mtd/rawnand.h>
 #include <linux/sizes.h>
 
 #define LP_OPTIONS NAND_SAMSUNG_LP_OPTIONS
diff --git a/drivers/mtd/nand/nand_timings.c b/drivers/mtd/nand/nand_timings.c
index 9935557291..c0545a4fb1 100644
--- a/drivers/mtd/nand/nand_timings.c
+++ b/drivers/mtd/nand/nand_timings.c
@@ -10,7 +10,7 @@
  */
 #include <common.h>
 #include <linux/kernel.h>
-#include <linux/mtd/nand.h>
+#include <linux/mtd/rawnand.h>
 
 static const struct nand_data_interface onfi_sdr_timings[] = {
 	/* Mode 0 */
diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index cedbb239b6..a3ca3373e4 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -15,7 +15,7 @@
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
 #include <linux/mtd/mtd.h>
-#include <linux/mtd/nand.h>
+#include <linux/mtd/rawnand.h>
 #include <linux/types.h>
 
 #include "pxa3xx_nand.h"
diff --git a/drivers/mtd/nand/sunxi_nand.c b/drivers/mtd/nand/sunxi_nand.c
index 8bc3828854..532e03cd84 100644
--- a/drivers/mtd/nand/sunxi_nand.c
+++ b/drivers/mtd/nand/sunxi_nand.c
@@ -32,7 +32,7 @@
 
 #include <linux/kernel.h>
 #include <linux/mtd/mtd.h>
-#include <linux/mtd/nand.h>
+#include <linux/mtd/rawnand.h>
 #include <linux/mtd/partitions.h>
 #include <linux/io.h>
 
diff --git a/drivers/mtd/nand/vf610_nfc.c b/drivers/mtd/nand/vf610_nfc.c
index f99bdaf94d..dd53f2bedb 100644
--- a/drivers/mtd/nand/vf610_nfc.c
+++ b/drivers/mtd/nand/vf610_nfc.c
@@ -26,7 +26,7 @@
 #include <malloc.h>
 
 #include <linux/mtd/mtd.h>
-#include <linux/mtd/nand.h>
+#include <linux/mtd/rawnand.h>
 #include <linux/mtd/partitions.h>
 
 #include <nand.h>
diff --git a/drivers/mtd/nand/zynq_nand.c b/drivers/mtd/nand/zynq_nand.c
index 076b878244..6494196049 100644
--- a/drivers/mtd/nand/zynq_nand.c
+++ b/drivers/mtd/nand/zynq_nand.c
@@ -13,7 +13,7 @@
 #include <linux/errno.h>
 #include <nand.h>
 #include <linux/mtd/mtd.h>
-#include <linux/mtd/nand.h>
+#include <linux/mtd/rawnand.h>
 #include <linux/mtd/partitions.h>
 #include <linux/mtd/nand_ecc.h>
 #include <asm/arch/hardware.h>
diff --git a/fs/yaffs2/yaffs_mtdif.c b/fs/yaffs2/yaffs_mtdif.c
index 636c7770e2..d338f9aa91 100644
--- a/fs/yaffs2/yaffs_mtdif.c
+++ b/fs/yaffs2/yaffs_mtdif.c
@@ -22,7 +22,7 @@
 #include <linux/mtd/mtd.h>
 #include <linux/types.h>
 #include <linux/time.h>
-#include <linux/mtd/nand.h>
+#include <linux/mtd/rawnand.h>
 
 
 static inline void translate_spare2oob(const struct yaffs_spare *spare, u8 *oob)
diff --git a/include/linux/mtd/fsl_upm.h b/include/linux/mtd/fsl_upm.h
index 0a949bca0d..a023860e7b 100644
--- a/include/linux/mtd/fsl_upm.h
+++ b/include/linux/mtd/fsl_upm.h
@@ -10,7 +10,7 @@
 #ifndef __LINUX_MTD_NAND_FSL_UPM
 #define __LINUX_MTD_NAND_FSL_UPM
 
-#include <linux/mtd/nand.h>
+#include <linux/mtd/rawnand.h>
 
 #define FSL_UPM_WAIT_RUN_PATTERN  0x1
 #define FSL_UPM_WAIT_WRITE_BYTE   0x2
diff --git a/include/linux/mtd/fsmc_nand.h b/include/linux/mtd/fsmc_nand.h
index f0f77270af..bc3db030d0 100644
--- a/include/linux/mtd/fsmc_nand.h
+++ b/include/linux/mtd/fsmc_nand.h
@@ -8,7 +8,7 @@
 #ifndef __FSMC_NAND_H__
 #define __FSMC_NAND_H__
 
-#include <linux/mtd/nand.h>
+#include <linux/mtd/rawnand.h>
 
 struct fsmc_regs {
 	u32 ctrl;			/* 0x00 */
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/rawnand.h
similarity index 99%
rename from include/linux/mtd/nand.h
rename to include/linux/mtd/rawnand.h
index 2708770029..e0c7681d27 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/rawnand.h
@@ -1,6 +1,4 @@
 /*
- *  linux/include/linux/mtd/nand.h
- *
  *  Copyright © 2000-2010 David Woodhouse <dwmw2@infradead.org>
  *                        Steven J. Hill <sjhill@realitydiluted.com>
  *		          Thomas Gleixner <tglx@linutronix.de>
@@ -13,8 +11,8 @@
  * Changelog:
  *	See git changelog.
  */
-#ifndef __LINUX_MTD_NAND_H
-#define __LINUX_MTD_NAND_H
+#ifndef __LINUX_MTD_RAWNAND_H
+#define __LINUX_MTD_RAWNAND_H
 
 #include <config.h>
 
@@ -1243,5 +1241,4 @@ int nand_maximize_ecc(struct nand_chip *chip,
 
 /* Reset and initialize a NAND device */
 int nand_reset(struct nand_chip *chip, int chipnr);
-
-#endif /* __LINUX_MTD_NAND_H */
+#endif /* __LINUX_MTD_RAWNAND_H */
diff --git a/include/nand.h b/include/nand.h
index 3279f43d9e..37001698bf 100644
--- a/include/nand.h
+++ b/include/nand.h
@@ -32,7 +32,7 @@ unsigned long nand_size(void);
 
 #include <linux/compat.h>
 #include <linux/mtd/mtd.h>
-#include <linux/mtd/nand.h>
+#include <linux/mtd/rawnand.h>
 
 int nand_mtd_to_devnum(struct mtd_info *mtd);
 

commit 7be88841ae249e4e93696ee0219c1d81c0c933f3
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Wed Nov 29 19:19:09 2017 +0900

    UPSTREAM: mtd: nand: denali: remove ad-hoc board_nand_init() entry
    
    This driver is highly dependent on the configuration from denali_dt.c
    Please enable CONFIG_NAND_DENALI_DT if you use this driver.
    
    Change-Id: I9c63239a11f0687332f71728ef2d45db9c3687f8
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 57f9bb9404e0578b4701ff900fdfa884d84c74b0)

diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
index 7a87adc378..8ff2d09422 100644
--- a/drivers/mtd/nand/denali.c
+++ b/drivers/mtd/nand/denali.c
@@ -1366,29 +1366,3 @@ free_buf:
 
 	return ret;
 }
-
-#ifndef CONFIG_NAND_DENALI_DT
-static int __board_nand_init(void)
-{
-	struct denali_nand_info *denali;
-
-	denali = kzalloc(sizeof(*denali), GFP_KERNEL);
-	if (!denali)
-		return -ENOMEM;
-
-	/*
-	 * In the future, these base addresses should be taken from
-	 * Device Tree or platform data.
-	 */
-	denali->reg = (void  __iomem *)CONFIG_SYS_NAND_REGS_BASE;
-	denali->host = (void  __iomem *)CONFIG_SYS_NAND_DATA_BASE;
-
-	return denali_init(denali);
-}
-
-void board_nand_init(void)
-{
-	if (__board_nand_init() < 0)
-		pr_warn("Failed to initialize Denali NAND controller.\n");
-}
-#endif

commit 9a0651a2639e30e9076d070312d456ee5f59e60b
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Wed Nov 29 19:18:18 2017 +0900

    UPSTREAM: mtd: nand: denali: remove bogus __maybe_unused
    
    denali_setup_data_interface() is always used.
    
    I put __maybe_unused for a temporal use, then forgot to delete it.
    
    Change-Id: I32d8161d39b8bf76331afafb797d47870475d852
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 1a7e176d27eb54cf75b2c54dfe1a351cc434d1d5)

diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
index b116d3a17c..7a87adc378 100644
--- a/drivers/mtd/nand/denali.c
+++ b/drivers/mtd/nand/denali.c
@@ -938,7 +938,7 @@ static int denali_erase(struct mtd_info *mtd, int page)
 	return irq_status & INTR__ERASE_COMP ? 0 : NAND_STATUS_FAIL;
 }
 
-static int __maybe_unused denali_setup_data_interface(struct mtd_info *mtd, int chipnr,
+static int denali_setup_data_interface(struct mtd_info *mtd, int chipnr,
 				       const struct nand_data_interface *conf)
 {
 	struct denali_nand_info *denali = mtd_to_denali(mtd);

commit 92266a11fad49b593ed7e3dce5c5cc7e0d8e4123
Author: York Sun <york.sun@nxp.com>
Date:   Sat Nov 18 11:09:08 2017 -0800

    UPSTREAM: mtd: cfi: Fix checking status register feature
    
    Commit 72443c7f7d21 ("mtd: cfi: Add support for status register
    polling") added a feature check to determine if status register
    is available for certain flash chips. The "lower software bits"
    register used to determine this feature is not backward compati-
    ble. Older flash chips without this feature has reserved value
    0xff. Instead of checking "lower software bits" register, use
    CFI primary vendor-specific extended query. Since CFI version
    1.4, software features can be read from offset 0x53 according to
    document AN201168 from Cypress.
    
    Change-Id: Ie494d8424da328f7977f0a2866ded473e7821f37
    Signed-off-by: York Sun <york.sun@nxp.com>
    CC: Marek Vasut <marek.vasut@gmail.com>
    Tested-by: Marek Vasut <marek.vasut@gmail.com>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 2544f47078635958bacb106684a2f81f57a4ed80)

diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index 8a5babea7b..f096e039cb 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -1694,7 +1694,7 @@ static void cmdset_amd_read_jedec_ids(flash_info_t *info)
 {
 	ushort bankId = 0;
 	uchar  manuId;
-	uchar  lsbits;
+	uchar  feature;
 
 	flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
 	flash_unlock_seq(info, 0);
@@ -1710,8 +1710,14 @@ static void cmdset_amd_read_jedec_ids(flash_info_t *info)
 	}
 	info->manufacturer_id = manuId;
 
-	lsbits = flash_read_uchar(info, FLASH_OFFSET_LOWER_SW_BITS);
-	info->sr_supported = lsbits & BIT(0);
+	debug("info->ext_addr = 0x%x, cfi_version = 0x%x\n",
+	      info->ext_addr, info->cfi_version);
+	if (info->ext_addr && info->cfi_version >= 0x3134) {
+		/* read software feature (at 0x53) */
+		feature = flash_read_uchar(info, info->ext_addr + 0x13);
+		debug("feature = 0x%x\n", feature);
+		info->sr_supported = feature & 0x1;
+	}
 
 	switch (info->chipwidth){
 	case FLASH_CFI_8BIT:

commit 3eefe4d1e48e83b57bf579da0a1b539289141d59
Author: Sean Nyekjaer <sean.nyekjaer@prevas.dk>
Date:   Wed Nov 22 13:39:08 2017 +0100

    UPSTREAM: fix: nand: pxa3xx: fix defined but not used warnings
    
    bbt_mirror_descr and bbt_main_descr is defined but not used
    when compiling without CONFIG_SYS_NAND_USE_FLASH_BBT set.
    
    Change-Id: Id43418ec556c803a7ddb85733e1ae18a5d52cef3
    Signed-off-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit e13921a9514be6a82f328a8633ab695f2d953b83)

diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index 6ab3c8a25a..cedbb239b6 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -233,6 +233,7 @@ static struct pxa3xx_nand_flash builtin_flash_types[] = {
 	{ 0xba20, 16, 16, &timing[3] },
 };
 
+#ifdef CONFIG_SYS_NAND_USE_FLASH_BBT
 static u8 bbt_pattern[] = {'M', 'V', 'B', 'b', 't', '0' };
 static u8 bbt_mirror_pattern[] = {'1', 't', 'b', 'B', 'V', 'M' };
 
@@ -255,6 +256,7 @@ static struct nand_bbt_descr bbt_mirror_descr = {
 	.maxblocks = 8,		/* Last 8 blocks in each chip */
 	.pattern = bbt_mirror_pattern
 };
+#endif
 
 static struct nand_ecclayout ecc_layout_2KB_bch4bit = {
 	.eccbytes = 32,

commit 40fb869c965baa769db7d87e67d02603981c3a49
Author: Joe Hershberger <joe.hershberger@ni.com>
Date:   Mon Nov 6 18:16:10 2017 -0800

    UPSTREAM: mtd: nand: zynq: Add support for the NAND lock/unlock operation
    
    Zynq NAND driver is not support for NAND lock or unlock operation.
    Hence, accidentally write into the critical NAND region might cause
    data corruption to occur.
    
    This commit is to add NAND lock/unlock command into NAND SMC register
    set for NAND lock/unlock operaion.
    
    Change-Id: Ia62c8d977f1b3e66790823a837e3faa021f0078a
    Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
    Signed-off-by: Keng Soon Cheah <keng.soon.cheah@ni.com>
    Cc: Chen Yee Chew <chen.yee.chew@ni.com>
    Cc: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
    Cc: Michal Simek <michal.simek@xilinx.com>
    Cc: Scott Wood <oss@buserror.net>
    Signed-off-by: Michal Simek <michal.simek@xilinx.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 6d3fa0dfdd3cc0e5067785fcb9ca6267b1501fa4)

diff --git a/drivers/mtd/nand/zynq_nand.c b/drivers/mtd/nand/zynq_nand.c
index e6c80b5b5c..076b878244 100644
--- a/drivers/mtd/nand/zynq_nand.c
+++ b/drivers/mtd/nand/zynq_nand.c
@@ -84,6 +84,13 @@
 #define ZYNQ_NAND_ECC_BUSY	(1 << 6)	/* ECC block is busy */
 #define ZYNQ_NAND_ECC_MASK	0x00FFFFFF	/* ECC value mask */
 
+#ifndef NAND_CMD_LOCK_TIGHT
+#define NAND_CMD_LOCK_TIGHT 0x2c
+#endif
+
+#ifndef NAND_CMD_LOCK_STATUS
+#define NAND_CMD_LOCK_STATUS 0x7a
+#endif
 
 /* SMC register set */
 struct zynq_nand_smc_regs {
@@ -144,6 +151,11 @@ static const struct zynq_nand_command_format zynq_nand_commands[] = {
 	{NAND_CMD_PARAM, NAND_CMD_NONE, 1, 0},
 	{NAND_CMD_GET_FEATURES, NAND_CMD_NONE, 1, 0},
 	{NAND_CMD_SET_FEATURES, NAND_CMD_NONE, 1, 0},
+	{NAND_CMD_LOCK, NAND_CMD_NONE, 0, 0},
+	{NAND_CMD_LOCK_TIGHT, NAND_CMD_NONE, 0, 0},
+	{NAND_CMD_UNLOCK1, NAND_CMD_NONE, 3, 0},
+	{NAND_CMD_UNLOCK2, NAND_CMD_NONE, 3, 0},
+	{NAND_CMD_LOCK_STATUS, NAND_CMD_NONE, 3, 0},
 	{NAND_CMD_NONE, NAND_CMD_NONE, 0, 0},
 	/* Add all the flash commands supported by the flash device */
 };

commit 113f18a18f21b2115aff9b46fb68fcf5c94e0acf
Author: Wilson Lee <wilson.lee@ni.com>
Date:   Wed Nov 15 01:14:35 2017 -0800

    UPSTREAM: mtd: zynq: nand: Move board_nand_init() function to board.c
    
    Putting board_nand_init() function inside NAND driver was not appropriate
    due to it doesn't allow board vendor to customise their NAND
    initialization code such as adding NAND lock/unlock code.
    
    This commit was to move the board_nand_init() function from NAND driver
    to board.c file. This allow customization of board_nand_init() function.
    
    Change-Id: Idb5c0dd35aa1368009f93b33c9d77ff44da4991b
    Signed-off-by: Wilson Lee <wilson.lee@ni.com>
    Cc: Joe Hershberger <joe.hershberger@ni.com>
    Cc: Keng Soon Cheah <keng.soon.cheah@ni.com>
    Cc: Chen Yee Chew <chen.yee.chew@ni.com>
    Cc: Albert Aribaud <albert.u.boot@aribaud.net>
    Cc: Michal Simek <michal.simek@xilinx.com>
    Cc: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
    Cc: Scott Wood <oss@buserror.net>
    Signed-off-by: Michal Simek <michal.simek@xilinx.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 310995d9f91ae56082b49be06fe8c3d01424f8f6)

diff --git a/arch/arm/mach-zynq/include/mach/nand.h b/arch/arm/mach-zynq/include/mach/nand.h
new file mode 100644
index 0000000000..61ef45f582
--- /dev/null
+++ b/arch/arm/mach-zynq/include/mach/nand.h
@@ -0,0 +1,9 @@
+/*
+ * Copyright (C) 2017 National Instruments Corp.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <nand.h>
+
+void zynq_nand_init(void);
diff --git a/drivers/mtd/nand/zynq_nand.c b/drivers/mtd/nand/zynq_nand.c
index 8d6a663d72..e6c80b5b5c 100644
--- a/drivers/mtd/nand/zynq_nand.c
+++ b/drivers/mtd/nand/zynq_nand.c
@@ -994,7 +994,7 @@ static int zynq_nand_device_ready(struct mtd_info *mtd)
 	return 0;
 }
 
-static int zynq_nand_init(struct nand_chip *nand_chip, int devnum)
+int zynq_nand_init(struct nand_chip *nand_chip, int devnum)
 {
 	struct zynq_nand_info *xnand;
 	struct mtd_info *mtd;
@@ -1180,12 +1180,14 @@ fail:
 	return err;
 }
 
+#ifdef CONFIG_SYS_NAND_SELF_INIT
 static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE];
 
-void board_nand_init(void)
+void __weak board_nand_init(void)
 {
 	struct nand_chip *nand = &nand_chip[0];
 
 	if (zynq_nand_init(nand, 0))
 		puts("ZYNQ NAND init failed\n");
 }
+#endif

commit d99779a74b3d3971a3637026bef86c4cbe44fa18
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Wed Nov 22 02:38:32 2017 +0900

    UPSTREAM: mtd: nand: denali: sync with Linux 4.15-rc1
    
    I largely reworked the Denali NAND controller driver in Linux.
    This commit imports the improvements from Linux.  The code is
    almost synced with Linux 4.15-rc1.
    
    Change-Id: I095cb46a2d500567e053196ff05061e16ca2dc98
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 350d052dab99986571c03951f0aed621dacfb9d9)

diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 218d3376e5..966096a96f 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -23,17 +23,6 @@ config NAND_DENALI_DT
 	  Enable the driver for NAND flash on platforms using a Denali NAND
 	  controller as a DT device.
 
-config SYS_NAND_DENALI_64BIT
-	bool "Use 64-bit variant of Denali NAND controller"
-	depends on NAND_DENALI
-	help
-	  The Denali NAND controller IP has some variations in terms of
-	  the bus interface.  The DMA setup sequence is completely differenct
-	  between 32bit / 64bit AXI bus variants.
-
-	  If your Denali NAND controller is the 64-bit variant, say Y.
-	  Otherwise (32 bit), say N.
-
 config NAND_DENALI_SPARE_AREA_SKIP_BYTES
 	int "Number of bytes skipped in OOB area"
 	depends on NAND_DENALI
diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
index 54718f418c..b116d3a17c 100644
--- a/drivers/mtd/nand/denali.c
+++ b/drivers/mtd/nand/denali.c
@@ -9,1144 +9,1076 @@
 #include <common.h>
 #include <malloc.h>
 #include <nand.h>
+#include <dm.h>
+#include <linux/bitfield.h>
+#include <linux/dma-direction.h>
 #include <linux/errno.h>
 #include <linux/io.h>
 
 #include "denali.h"
 
-#define NAND_DEFAULT_TIMINGS	-1
-
-static int onfi_timing_mode = NAND_DEFAULT_TIMINGS;
-
-/*
- * We define a macro here that combines all interrupts this driver uses into
- * a single constant value, for convenience.
- */
-#define DENALI_IRQ_ALL	(INTR_STATUS__DMA_CMD_COMP | \
-			INTR_STATUS__ECC_TRANSACTION_DONE | \
-			INTR_STATUS__ECC_ERR | \
-			INTR_STATUS__PROGRAM_FAIL | \
-			INTR_STATUS__LOAD_COMP | \
-			INTR_STATUS__PROGRAM_COMP | \
-			INTR_STATUS__TIME_OUT | \
-			INTR_STATUS__ERASE_FAIL | \
-			INTR_STATUS__RST_COMP | \
-			INTR_STATUS__ERASE_COMP | \
-			INTR_STATUS__ECC_UNCOR_ERR | \
-			INTR_STATUS__INT_ACT | \
-			INTR_STATUS__LOCKED_BLK)
+static dma_addr_t dma_map_single(void *dev, void *ptr, size_t size,
+				 enum dma_data_direction dir)
+{
+	unsigned long addr = (unsigned long)ptr;
 
-/*
- * indicates whether or not the internal value for the flash bank is
- * valid or not
- */
-#define CHIP_SELECT_INVALID	-1
+	if (dir == DMA_FROM_DEVICE)
+		invalidate_dcache_range(addr, addr + size);
+	else
+		flush_dcache_range(addr, addr + size);
 
-#define SUPPORT_8BITECC		1
+	return addr;
+}
 
-/*
- * this macro allows us to convert from an MTD structure to our own
- * device context (denali) structure.
- */
-static inline struct denali_nand_info *mtd_to_denali(struct mtd_info *mtd)
+static void dma_unmap_single(void *dev, dma_addr_t addr, size_t size,
+			     enum dma_data_direction dir)
 {
-	return container_of(mtd_to_nand(mtd), struct denali_nand_info, nand);
+	if (dir != DMA_TO_DEVICE)
+		invalidate_dcache_range(addr, addr + size);
 }
 
-/*
- * These constants are defined by the driver to enable common driver
- * configuration options.
- */
-#define SPARE_ACCESS		0x41
-#define MAIN_ACCESS		0x42
-#define MAIN_SPARE_ACCESS	0x43
-#define PIPELINE_ACCESS		0x2000
-
-#define DENALI_UNLOCK_START	0x10
-#define DENALI_UNLOCK_END	0x11
-#define DENALI_LOCK		0x21
-#define DENALI_LOCK_TIGHT	0x31
-#define DENALI_BUFFER_LOAD	0x60
-#define DENALI_BUFFER_WRITE	0x62
-
-#define DENALI_READ	0
-#define DENALI_WRITE	0x100
-
-/* types of device accesses. We can issue commands and get status */
-#define COMMAND_CYCLE	0
-#define ADDR_CYCLE	1
-#define STATUS_CYCLE	2
-
-/*
- * this is a helper macro that allows us to
- * format the bank into the proper bits for the controller
- */
-#define BANK(x) ((x) << 24)
-
-/* Interrupts are cleared by writing a 1 to the appropriate status bit */
-static inline void clear_interrupt(struct denali_nand_info *denali,
-							uint32_t irq_mask)
+static int dma_mapping_error(void *dev, dma_addr_t addr)
 {
-	uint32_t intr_status_reg;
-
-	intr_status_reg = INTR_STATUS(denali->flash_bank);
-
-	writel(irq_mask, denali->flash_reg + intr_status_reg);
+	return 0;
 }
 
-static uint32_t read_interrupt_status(struct denali_nand_info *denali)
-{
-	uint32_t intr_status_reg;
+#define DENALI_NAND_NAME    "denali-nand"
 
-	intr_status_reg = INTR_STATUS(denali->flash_bank);
+/* for Indexed Addressing */
+#define DENALI_INDEXED_CTRL	0x00
+#define DENALI_INDEXED_DATA	0x10
 
-	return readl(denali->flash_reg + intr_status_reg);
-}
+#define DENALI_MAP00		(0 << 26)	/* direct access to buffer */
+#define DENALI_MAP01		(1 << 26)	/* read/write pages in PIO */
+#define DENALI_MAP10		(2 << 26)	/* high-level control plane */
+#define DENALI_MAP11		(3 << 26)	/* direct controller access */
 
-static void clear_interrupts(struct denali_nand_info *denali)
-{
-	uint32_t status;
+/* MAP11 access cycle type */
+#define DENALI_MAP11_CMD	((DENALI_MAP11) | 0)	/* command cycle */
+#define DENALI_MAP11_ADDR	((DENALI_MAP11) | 1)	/* address cycle */
+#define DENALI_MAP11_DATA	((DENALI_MAP11) | 2)	/* data cycle */
 
-	status = read_interrupt_status(denali);
-	clear_interrupt(denali, status);
+/* MAP10 commands */
+#define DENALI_ERASE		0x01
 
-	denali->irq_status = 0;
-}
+#define DENALI_BANK(denali)	((denali)->active_bank << 24)
 
-static void denali_irq_enable(struct denali_nand_info *denali,
-							uint32_t int_mask)
-{
-	int i;
+#define DENALI_INVALID_BANK	-1
+#define DENALI_NR_BANKS		4
 
-	for (i = 0; i < denali->max_banks; ++i)
-		writel(int_mask, denali->flash_reg + INTR_EN(i));
-}
+/*
+ * The bus interface clock, clk_x, is phase aligned with the core clock.  The
+ * clk_x is an integral multiple N of the core clk.  The value N is configured
+ * at IP delivery time, and its available value is 4, 5, or 6.  We need to align
+ * to the largest value to make it work with any possible configuration.
+ */
+#define DENALI_CLK_X_MULT	6
 
-static uint32_t wait_for_irq(struct denali_nand_info *denali, uint32_t irq_mask)
+static inline struct denali_nand_info *mtd_to_denali(struct mtd_info *mtd)
 {
-	unsigned long timeout = 1000000;
-	uint32_t intr_status;
-
-	do {
-		intr_status = read_interrupt_status(denali) & DENALI_IRQ_ALL;
-		if (intr_status & irq_mask) {
-			denali->irq_status &= ~irq_mask;
-			/* our interrupt was detected */
-			break;
-		}
-		udelay(1);
-		timeout--;
-	} while (timeout != 0);
-
-	if (timeout == 0) {
-		/* timeout */
-		printf("Denali timeout with interrupt status %08x\n",
-		       read_interrupt_status(denali));
-		intr_status = 0;
-	}
-	return intr_status;
+	return container_of(mtd_to_nand(mtd), struct denali_nand_info, nand);
 }
 
 /*
- * Certain operations for the denali NAND controller use an indexed mode to
- * read/write data. The operation is performed by writing the address value
- * of the command to the device memory followed by the data. This function
- * abstracts this common operation.
+ * Direct Addressing - the slave address forms the control information (command
+ * type, bank, block, and page address).  The slave data is the actual data to
+ * be transferred.  This mode requires 28 bits of address region allocated.
  */
-static void index_addr(struct denali_nand_info *denali,
-				uint32_t address, uint32_t data)
+static u32 denali_direct_read(struct denali_nand_info *denali, u32 addr)
 {
-	writel(address, denali->flash_mem + INDEX_CTRL_REG);
-	writel(data, denali->flash_mem + INDEX_DATA_REG);
+	return ioread32(denali->host + addr);
 }
 
-/* Perform an indexed read of the device */
-static void index_addr_read_data(struct denali_nand_info *denali,
-				 uint32_t address, uint32_t *pdata)
+static void denali_direct_write(struct denali_nand_info *denali, u32 addr,
+				u32 data)
 {
-	writel(address, denali->flash_mem + INDEX_CTRL_REG);
-	*pdata = readl(denali->flash_mem + INDEX_DATA_REG);
+	iowrite32(data, denali->host + addr);
 }
 
 /*
- * We need to buffer some data for some of the NAND core routines.
- * The operations manage buffering that data.
+ * Indexed Addressing - address translation module intervenes in passing the
+ * control information.  This mode reduces the required address range.  The
+ * control information and transferred data are latched by the registers in
+ * the translation module.
  */
-static void reset_buf(struct denali_nand_info *denali)
+static u32 denali_indexed_read(struct denali_nand_info *denali, u32 addr)
 {
-	denali->buf.head = 0;
-	denali->buf.tail = 0;
+	iowrite32(addr, denali->host + DENALI_INDEXED_CTRL);
+	return ioread32(denali->host + DENALI_INDEXED_DATA);
 }
 
-static void write_byte_to_buf(struct denali_nand_info *denali, uint8_t byte)
+static void denali_indexed_write(struct denali_nand_info *denali, u32 addr,
+				 u32 data)
 {
-	denali->buf.buf[denali->buf.tail++] = byte;
+	iowrite32(addr, denali->host + DENALI_INDEXED_CTRL);
+	iowrite32(data, denali->host + DENALI_INDEXED_DATA);
 }
 
-/* resets a specific device connected to the core */
-static void reset_bank(struct denali_nand_info *denali)
+/*
+ * Use the configuration feature register to determine the maximum number of
+ * banks that the hardware supports.
+ */
+static void denali_detect_max_banks(struct denali_nand_info *denali)
 {
-	uint32_t irq_status;
-	uint32_t irq_mask = INTR_STATUS__RST_COMP | INTR_STATUS__TIME_OUT;
-
-	clear_interrupts(denali);
+	uint32_t features = ioread32(denali->reg + FEATURES);
 
-	writel(1 << denali->flash_bank, denali->flash_reg + DEVICE_RESET);
+	denali->max_banks = 1 << FIELD_GET(FEATURES__N_BANKS, features);
 
-	irq_status = wait_for_irq(denali, irq_mask);
-	if (irq_status & INTR_STATUS__TIME_OUT)
-		debug("reset bank failed.\n");
+	/* the encoding changed from rev 5.0 to 5.1 */
+	if (denali->revision < 0x0501)
+		denali->max_banks <<= 1;
 }
 
-/* Reset the flash controller */
-static uint32_t denali_nand_reset(struct denali_nand_info *denali)
+static void __maybe_unused denali_enable_irq(struct denali_nand_info *denali)
 {
 	int i;
 
-	for (i = 0; i < denali->max_banks; i++)
-		writel(INTR_STATUS__RST_COMP | INTR_STATUS__TIME_OUT,
-		       denali->flash_reg + INTR_STATUS(i));
+	for (i = 0; i < DENALI_NR_BANKS; i++)
+		iowrite32(U32_MAX, denali->reg + INTR_EN(i));
+	iowrite32(GLOBAL_INT_EN_FLAG, denali->reg + GLOBAL_INT_ENABLE);
+}
 
-	for (i = 0; i < denali->max_banks; i++) {
-		writel(1 << i, denali->flash_reg + DEVICE_RESET);
-		while (!(readl(denali->flash_reg + INTR_STATUS(i)) &
-			(INTR_STATUS__RST_COMP | INTR_STATUS__TIME_OUT)))
-			if (readl(denali->flash_reg + INTR_STATUS(i)) &
-				INTR_STATUS__TIME_OUT)
-				debug("NAND Reset operation timed out on bank"
-				      " %d\n", i);
-	}
+static void __maybe_unused denali_disable_irq(struct denali_nand_info *denali)
+{
+	int i;
 
-	for (i = 0; i < denali->max_banks; i++)
-		writel(INTR_STATUS__RST_COMP | INTR_STATUS__TIME_OUT,
-		       denali->flash_reg + INTR_STATUS(i));
+	for (i = 0; i < DENALI_NR_BANKS; i++)
+		iowrite32(0, denali->reg + INTR_EN(i));
+	iowrite32(0, denali->reg + GLOBAL_INT_ENABLE);
+}
 
-	return 0;
+static void denali_clear_irq(struct denali_nand_info *denali,
+			     int bank, uint32_t irq_status)
+{
+	/* write one to clear bits */
+	iowrite32(irq_status, denali->reg + INTR_STATUS(bank));
 }
 
-/*
- * this routine calculates the ONFI timing values for a given mode and
- * programs the clocking register accordingly. The mode is determined by
- * the get_onfi_nand_para routine.
- */
-static void nand_onfi_timing_set(struct denali_nand_info *denali,
-								uint16_t mode)
+static void denali_clear_irq_all(struct denali_nand_info *denali)
 {
-	uint32_t trea[6] = {40, 30, 25, 20, 20, 16};
-	uint32_t trp[6] = {50, 25, 17, 15, 12, 10};
-	uint32_t treh[6] = {30, 15, 15, 10, 10, 7};
-	uint32_t trc[6] = {100, 50, 35, 30, 25, 20};
-	uint32_t trhoh[6] = {0, 15, 15, 15, 15, 15};
-	uint32_t trloh[6] = {0, 0, 0, 0, 5, 5};
-	uint32_t tcea[6] = {100, 45, 30, 25, 25, 25};
-	uint32_t tadl[6] = {200, 100, 100, 100, 70, 70};
-	uint32_t trhw[6] = {200, 100, 100, 100, 100, 100};
-	uint32_t trhz[6] = {200, 100, 100, 100, 100, 100};
-	uint32_t twhr[6] = {120, 80, 80, 60, 60, 60};
-	uint32_t tcs[6] = {70, 35, 25, 25, 20, 15};
-
-	uint32_t data_invalid_rhoh, data_invalid_rloh, data_invalid;
-	uint32_t dv_window = 0;
-	uint32_t en_lo, en_hi;
-	uint32_t acc_clks;
-	uint32_t addr_2_data, re_2_we, re_2_re, we_2_re, cs_cnt;
-
-	en_lo = DIV_ROUND_UP(trp[mode], CLK_X);
-	en_hi = DIV_ROUND_UP(treh[mode], CLK_X);
-	if ((en_hi * CLK_X) < (treh[mode] + 2))
-		en_hi++;
-
-	if ((en_lo + en_hi) * CLK_X < trc[mode])
-		en_lo += DIV_ROUND_UP((trc[mode] - (en_lo + en_hi) * CLK_X),
-				      CLK_X);
-
-	if ((en_lo + en_hi) < CLK_MULTI)
-		en_lo += CLK_MULTI - en_lo - en_hi;
-
-	while (dv_window < 8) {
-		data_invalid_rhoh = en_lo * CLK_X + trhoh[mode];
-
-		data_invalid_rloh = (en_lo + en_hi) * CLK_X + trloh[mode];
-
-		data_invalid = data_invalid_rhoh < data_invalid_rloh ?
-					data_invalid_rhoh : data_invalid_rloh;
-
-		dv_window = data_invalid - trea[mode];
-
-		if (dv_window < 8)
-			en_lo++;
-	}
+	int i;
 
-	acc_clks = DIV_ROUND_UP(trea[mode], CLK_X);
+	for (i = 0; i < DENALI_NR_BANKS; i++)
+		denali_clear_irq(denali, i, U32_MAX);
+}
 
-	while (acc_clks * CLK_X - trea[mode] < 3)
-		acc_clks++;
+static void __denali_check_irq(struct denali_nand_info *denali)
+{
+	uint32_t irq_status;
+	int i;
 
-	if (data_invalid - acc_clks * CLK_X < 2)
-		debug("%s, Line %d: Warning!\n", __FILE__, __LINE__);
+	for (i = 0; i < DENALI_NR_BANKS; i++) {
+		irq_status = ioread32(denali->reg + INTR_STATUS(i));
+		denali_clear_irq(denali, i, irq_status);
 
-	addr_2_data = DIV_ROUND_UP(tadl[mode], CLK_X);
-	re_2_we = DIV_ROUND_UP(trhw[mode], CLK_X);
-	re_2_re = DIV_ROUND_UP(trhz[mode], CLK_X);
-	we_2_re = DIV_ROUND_UP(twhr[mode], CLK_X);
-	cs_cnt = DIV_ROUND_UP((tcs[mode] - trp[mode]), CLK_X);
-	if (cs_cnt == 0)
-		cs_cnt = 1;
+		if (i != denali->active_bank)
+			continue;
 
-	if (tcea[mode]) {
-		while (cs_cnt * CLK_X + trea[mode] < tcea[mode])
-			cs_cnt++;
+		denali->irq_status |= irq_status;
 	}
+}
 
-	/* Sighting 3462430: Temporary hack for MT29F128G08CJABAWP:B */
-	if (readl(denali->flash_reg + MANUFACTURER_ID) == 0 &&
-	    readl(denali->flash_reg + DEVICE_ID) == 0x88)
-		acc_clks = 6;
-
-	writel(acc_clks, denali->flash_reg + ACC_CLKS);
-	writel(re_2_we, denali->flash_reg + RE_2_WE);
-	writel(re_2_re, denali->flash_reg + RE_2_RE);
-	writel(we_2_re, denali->flash_reg + WE_2_RE);
-	writel(addr_2_data, denali->flash_reg + ADDR_2_DATA);
-	writel(en_lo, denali->flash_reg + RDWR_EN_LO_CNT);
-	writel(en_hi, denali->flash_reg + RDWR_EN_HI_CNT);
-	writel(cs_cnt, denali->flash_reg + CS_SETUP_CNT);
+static void denali_reset_irq(struct denali_nand_info *denali)
+{
+	denali->irq_status = 0;
+	denali->irq_mask = 0;
 }
 
-/* queries the NAND device to see what ONFI modes it supports. */
-static uint32_t get_onfi_nand_para(struct denali_nand_info *denali)
+static uint32_t denali_wait_for_irq(struct denali_nand_info *denali,
+				    uint32_t irq_mask)
 {
-	int i;
+	unsigned long time_left = 1000000;
 
-	/*
-	 * we needn't to do a reset here because driver has already
-	 * reset all the banks before
-	 */
-	if (!(readl(denali->flash_reg + ONFI_TIMING_MODE) &
-	    ONFI_TIMING_MODE__VALUE))
-		return -EIO;
+	while (time_left) {
+		__denali_check_irq(denali);
 
-	for (i = 5; i > 0; i--) {
-		if (readl(denali->flash_reg + ONFI_TIMING_MODE) &
-			(0x01 << i))
-			break;
+		if (irq_mask & denali->irq_status)
+			return denali->irq_status;
+		udelay(1);
+		time_left--;
 	}
 
-	nand_onfi_timing_set(denali, i);
-
-	/*
-	 * By now, all the ONFI devices we know support the page cache
-	 * rw feature. So here we enable the pipeline_rw_ahead feature
-	 */
+	if (!time_left) {
+		dev_err(denali->dev, "timeout while waiting for irq 0x%x\n",
+			irq_mask);
+		return 0;
+	}
 
-	return 0;
+	return denali->irq_status;
 }
 
-static void get_samsung_nand_para(struct denali_nand_info *denali,
-							uint8_t device_id)
+static uint32_t denali_check_irq(struct denali_nand_info *denali)
 {
-	if (device_id == 0xd3) { /* Samsung K9WAG08U1A */
-		/* Set timing register values according to datasheet */
-		writel(5, denali->flash_reg + ACC_CLKS);
-		writel(20, denali->flash_reg + RE_2_WE);
-		writel(12, denali->flash_reg + WE_2_RE);
-		writel(14, denali->flash_reg + ADDR_2_DATA);
-		writel(3, denali->flash_reg + RDWR_EN_LO_CNT);
-		writel(2, denali->flash_reg + RDWR_EN_HI_CNT);
-		writel(2, denali->flash_reg + CS_SETUP_CNT);
-	}
+	__denali_check_irq(denali);
+
+	return denali->irq_status;
 }
 
-static void get_toshiba_nand_para(struct denali_nand_info *denali)
+static void denali_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
 {
-	uint32_t tmp;
+	struct denali_nand_info *denali = mtd_to_denali(mtd);
+	u32 addr = DENALI_MAP11_DATA | DENALI_BANK(denali);
+	int i;
 
-	/*
-	 * Workaround to fix a controller bug which reports a wrong
-	 * spare area size for some kind of Toshiba NAND device
-	 */
-	if ((readl(denali->flash_reg + DEVICE_MAIN_AREA_SIZE) == 4096) &&
-	    (readl(denali->flash_reg + DEVICE_SPARE_AREA_SIZE) == 64)) {
-		writel(216, denali->flash_reg + DEVICE_SPARE_AREA_SIZE);
-		tmp = readl(denali->flash_reg + DEVICES_CONNECTED) *
-			readl(denali->flash_reg + DEVICE_SPARE_AREA_SIZE);
-		writel(tmp, denali->flash_reg + LOGICAL_PAGE_SPARE_SIZE);
-	}
+	for (i = 0; i < len; i++)
+		buf[i] = denali->host_read(denali, addr);
 }
 
-static void get_hynix_nand_para(struct denali_nand_info *denali,
-							uint8_t device_id)
+static void denali_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
 {
-	uint32_t main_size, spare_size;
-
-	switch (device_id) {
-	case 0xD5: /* Hynix H27UAG8T2A, H27UBG8U5A or H27UCG8VFA */
-	case 0xD7: /* Hynix H27UDG8VEM, H27UCG8UDM or H27UCG8V5A */
-		writel(128, denali->flash_reg + PAGES_PER_BLOCK);
-		writel(4096, denali->flash_reg + DEVICE_MAIN_AREA_SIZE);
-		writel(224, denali->flash_reg + DEVICE_SPARE_AREA_SIZE);
-		main_size = 4096 *
-			readl(denali->flash_reg + DEVICES_CONNECTED);
-		spare_size = 224 *
-			readl(denali->flash_reg + DEVICES_CONNECTED);
-		writel(main_size, denali->flash_reg + LOGICAL_PAGE_DATA_SIZE);
-		writel(spare_size, denali->flash_reg + LOGICAL_PAGE_SPARE_SIZE);
-		writel(0, denali->flash_reg + DEVICE_WIDTH);
-		break;
-	default:
-		debug("Spectra: Unknown Hynix NAND (Device ID: 0x%x).\n"
-		      "Will use default parameter values instead.\n",
-		      device_id);
-	}
+	struct denali_nand_info *denali = mtd_to_denali(mtd);
+	u32 addr = DENALI_MAP11_DATA | DENALI_BANK(denali);
+	int i;
+
+	for (i = 0; i < len; i++)
+		denali->host_write(denali, addr, buf[i]);
 }
 
-/*
- * determines how many NAND chips are connected to the controller. Note for
- * Intel CE4100 devices we don't support more than one device.
- */
-static void find_valid_banks(struct denali_nand_info *denali)
+static void denali_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len)
 {
-	uint32_t id[denali->max_banks];
+	struct denali_nand_info *denali = mtd_to_denali(mtd);
+	u32 addr = DENALI_MAP11_DATA | DENALI_BANK(denali);
+	uint16_t *buf16 = (uint16_t *)buf;
 	int i;
 
-	denali->total_used_banks = 1;
-	for (i = 0; i < denali->max_banks; i++) {
-		index_addr(denali, MODE_11 | (i << 24) | 0, 0x90);
-		index_addr(denali, MODE_11 | (i << 24) | 1, 0);
-		index_addr_read_data(denali, MODE_11 | (i << 24) | 2, &id[i]);
+	for (i = 0; i < len / 2; i++)
+		buf16[i] = denali->host_read(denali, addr);
+}
 
-		if (i == 0) {
-			if (!(id[i] & 0x0ff))
-				break;
-		} else {
-			if ((id[i] & 0x0ff) == (id[0] & 0x0ff))
-				denali->total_used_banks++;
-			else
-				break;
-		}
-	}
+static void denali_write_buf16(struct mtd_info *mtd, const uint8_t *buf,
+			       int len)
+{
+	struct denali_nand_info *denali = mtd_to_denali(mtd);
+	u32 addr = DENALI_MAP11_DATA | DENALI_BANK(denali);
+	const uint16_t *buf16 = (const uint16_t *)buf;
+	int i;
+
+	for (i = 0; i < len / 2; i++)
+		denali->host_write(denali, addr, buf16[i]);
 }
 
-/*
- * Use the configuration feature register to determine the maximum number of
- * banks that the hardware supports.
- */
-static void detect_max_banks(struct denali_nand_info *denali)
+static uint8_t denali_read_byte(struct mtd_info *mtd)
 {
-	uint32_t features = ioread32(denali->flash_reg + FEATURES);
+	uint8_t byte;
 
-	denali->max_banks = 1 << (features & FEATURES__N_BANKS);
+	denali_read_buf(mtd, &byte, 1);
 
-	/* the encoding changed from rev 5.0 to 5.1 */
-	if (denali->revision < 0x0501)
-		denali->max_banks <<= 1;
+	return byte;
 }
 
-static void detect_partition_feature(struct denali_nand_info *denali)
+static void denali_write_byte(struct mtd_info *mtd, uint8_t byte)
 {
-	/*
-	 * For MRST platform, denali->fwblks represent the
-	 * number of blocks firmware is taken,
-	 * FW is in protect partition and MTD driver has no
-	 * permission to access it. So let driver know how many
-	 * blocks it can't touch.
-	 */
-	if (readl(denali->flash_reg + FEATURES) & FEATURES__PARTITION) {
-		if ((readl(denali->flash_reg + PERM_SRC_ID(1)) &
-			PERM_SRC_ID__SRCID) == SPECTRA_PARTITION_ID) {
-			denali->fwblks =
-			    ((readl(denali->flash_reg + MIN_MAX_BANK(1)) &
-			      MIN_MAX_BANK__MIN_VALUE) *
-			     denali->blksperchip)
-			    +
-			    (readl(denali->flash_reg + MIN_BLK_ADDR(1)) &
-			    MIN_BLK_ADDR__VALUE);
-		} else {
-			denali->fwblks = SPECTRA_START_BLOCK;
-		}
-	} else {
-		denali->fwblks = SPECTRA_START_BLOCK;
-	}
+	denali_write_buf(mtd, &byte, 1);
 }
 
-static uint32_t denali_nand_timing_set(struct denali_nand_info *denali)
+static uint16_t denali_read_word(struct mtd_info *mtd)
 {
-	uint32_t id_bytes[8], addr;
-	uint8_t maf_id, device_id;
-	int i;
+	uint16_t word;
 
-	/*
-	 * Use read id method to get device ID and other params.
-	 * For some NAND chips, controller can't report the correct
-	 * device ID by reading from DEVICE_ID register
-	 */
-	addr = MODE_11 | BANK(denali->flash_bank);
-	index_addr(denali, addr | 0, 0x90);
-	index_addr(denali, addr | 1, 0);
-	for (i = 0; i < 8; i++)
-		index_addr_read_data(denali, addr | 2, &id_bytes[i]);
-	maf_id = id_bytes[0];
-	device_id = id_bytes[1];
-
-	if (readl(denali->flash_reg + ONFI_DEVICE_NO_OF_LUNS) &
-		ONFI_DEVICE_NO_OF_LUNS__ONFI_DEVICE) { /* ONFI 1.0 NAND */
-		if (get_onfi_nand_para(denali))
-			return -EIO;
-	} else if (maf_id == 0xEC) { /* Samsung NAND */
-		get_samsung_nand_para(denali, device_id);
-	} else if (maf_id == 0x98) { /* Toshiba NAND */
-		get_toshiba_nand_para(denali);
-	} else if (maf_id == 0xAD) { /* Hynix NAND */
-		get_hynix_nand_para(denali, device_id);
-	}
+	denali_read_buf16(mtd, (uint8_t *)&word, 2);
 
-	find_valid_banks(denali);
+	return word;
+}
 
-	detect_partition_feature(denali);
+static void denali_cmd_ctrl(struct mtd_info *mtd, int dat, unsigned int ctrl)
+{
+	struct denali_nand_info *denali = mtd_to_denali(mtd);
+	uint32_t type;
+
+	if (ctrl & NAND_CLE)
+		type = DENALI_MAP11_CMD;
+	else if (ctrl & NAND_ALE)
+		type = DENALI_MAP11_ADDR;
+	else
+		return;
 
 	/*
-	 * If the user specified to override the default timings
-	 * with a specific ONFI mode, we apply those changes here.
+	 * Some commands are followed by chip->dev_ready or chip->waitfunc.
+	 * irq_status must be cleared here to catch the R/B# interrupt later.
 	 */
-	if (onfi_timing_mode != NAND_DEFAULT_TIMINGS)
-		nand_onfi_timing_set(denali, onfi_timing_mode);
+	if (ctrl & NAND_CTRL_CHANGE)
+		denali_reset_irq(denali);
 
-	return 0;
+	denali->host_write(denali, DENALI_BANK(denali) | type, dat);
 }
 
-/*
- * validation function to verify that the controlling software is making
- * a valid request
- */
-static inline bool is_flash_bank_valid(int flash_bank)
-{
-	return flash_bank >= 0 && flash_bank < 4;
-}
-
-static void denali_irq_init(struct denali_nand_info *denali)
+static int denali_dev_ready(struct mtd_info *mtd)
 {
-	uint32_t int_mask;
-	int i;
-
-	/* Disable global interrupts */
-	writel(0, denali->flash_reg + GLOBAL_INT_ENABLE);
-
-	int_mask = DENALI_IRQ_ALL;
-
-	/* Clear all status bits */
-	for (i = 0; i < denali->max_banks; ++i)
-		writel(0xFFFF, denali->flash_reg + INTR_STATUS(i));
+	struct denali_nand_info *denali = mtd_to_denali(mtd);
 
-	denali_irq_enable(denali, int_mask);
+	return !!(denali_check_irq(denali) & INTR__INT_ACT);
 }
 
-/*
- * This helper function setups the registers for ECC and whether or not
- * the spare area will be transferred.
- */
-static void setup_ecc_for_xfer(struct denali_nand_info *denali, bool ecc_en,
-				bool transfer_spare)
+static int denali_check_erased_page(struct mtd_info *mtd,
+				    struct nand_chip *chip, uint8_t *buf,
+				    unsigned long uncor_ecc_flags,
+				    unsigned int max_bitflips)
 {
-	int ecc_en_flag, transfer_spare_flag;
+	uint8_t *ecc_code = chip->buffers->ecccode;
+	int ecc_steps = chip->ecc.steps;
+	int ecc_size = chip->ecc.size;
+	int ecc_bytes = chip->ecc.bytes;
+	int i, ret, stat;
+
+	ret = mtd_ooblayout_get_eccbytes(mtd, ecc_code, chip->oob_poi, 0,
+					 chip->ecc.total);
+	if (ret)
+		return ret;
+
+	for (i = 0; i < ecc_steps; i++) {
+		if (!(uncor_ecc_flags & BIT(i)))
+			continue;
+
+		stat = nand_check_erased_ecc_chunk(buf, ecc_size,
+						  ecc_code, ecc_bytes,
+						  NULL, 0,
+						  chip->ecc.strength);
+		if (stat < 0) {
+			mtd->ecc_stats.failed++;
+		} else {
+			mtd->ecc_stats.corrected += stat;
+			max_bitflips = max_t(unsigned int, max_bitflips, stat);
+		}
 
-	/* set ECC, transfer spare bits if needed */
-	ecc_en_flag = ecc_en ? ECC_ENABLE__FLAG : 0;
-	transfer_spare_flag = transfer_spare ? TRANSFER_SPARE_REG__FLAG : 0;
+		buf += ecc_size;
+		ecc_code += ecc_bytes;
+	}
 
-	/* Enable spare area/ECC per user's request. */
-	writel(ecc_en_flag, denali->flash_reg + ECC_ENABLE);
-	/* applicable for MAP01 only */
-	writel(transfer_spare_flag, denali->flash_reg + TRANSFER_SPARE_REG);
+	return max_bitflips;
 }
 
-/*
- * sends a pipeline command operation to the controller. See the Denali NAND
- * controller's user guide for more information (section 4.2.3.6).
- */
-static int denali_send_pipeline_cmd(struct denali_nand_info *denali,
-				    bool ecc_en, bool transfer_spare,
-				    int access_type, int op)
+static int denali_hw_ecc_fixup(struct mtd_info *mtd,
+			       struct denali_nand_info *denali,
+			       unsigned long *uncor_ecc_flags)
 {
-	uint32_t addr, cmd, irq_status;
-	static uint32_t page_count = 1;
-
-	setup_ecc_for_xfer(denali, ecc_en, transfer_spare);
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	int bank = denali->active_bank;
+	uint32_t ecc_cor;
+	unsigned int max_bitflips;
 
-	clear_interrupts(denali);
+	ecc_cor = ioread32(denali->reg + ECC_COR_INFO(bank));
+	ecc_cor >>= ECC_COR_INFO__SHIFT(bank);
 
-	addr = BANK(denali->flash_bank) | denali->page;
+	if (ecc_cor & ECC_COR_INFO__UNCOR_ERR) {
+		/*
+		 * This flag is set when uncorrectable error occurs at least in
+		 * one ECC sector.  We can not know "how many sectors", or
+		 * "which sector(s)".  We need erase-page check for all sectors.
+		 */
+		*uncor_ecc_flags = GENMASK(chip->ecc.steps - 1, 0);
+		return 0;
+	}
 
-	/* setup the acccess type */
-	cmd = MODE_10 | addr;
-	index_addr(denali, cmd, access_type);
+	max_bitflips = FIELD_GET(ECC_COR_INFO__MAX_ERRORS, ecc_cor);
 
-	/* setup the pipeline command */
-	index_addr(denali, cmd, 0x2000 | op | page_count);
+	/*
+	 * The register holds the maximum of per-sector corrected bitflips.
+	 * This is suitable for the return value of the ->read_page() callback.
+	 * Unfortunately, we can not know the total number of corrected bits in
+	 * the page.  Increase the stats by max_bitflips. (compromised solution)
+	 */
+	mtd->ecc_stats.corrected += max_bitflips;
 
-	cmd = MODE_01 | addr;
-	writel(cmd, denali->flash_mem + INDEX_CTRL_REG);
+	return max_bitflips;
+}
 
-	if (op == DENALI_READ) {
-		/* wait for command to be accepted */
-		irq_status = wait_for_irq(denali, INTR_STATUS__LOAD_COMP);
+static int denali_sw_ecc_fixup(struct mtd_info *mtd,
+			       struct denali_nand_info *denali,
+			       unsigned long *uncor_ecc_flags, uint8_t *buf)
+{
+	unsigned int ecc_size = denali->nand.ecc.size;
+	unsigned int bitflips = 0;
+	unsigned int max_bitflips = 0;
+	uint32_t err_addr, err_cor_info;
+	unsigned int err_byte, err_sector, err_device;
+	uint8_t err_cor_value;
+	unsigned int prev_sector = 0;
+	uint32_t irq_status;
 
-		if (irq_status == 0)
-			return -EIO;
-	}
+	denali_reset_irq(denali);
 
-	return 0;
-}
+	do {
+		err_addr = ioread32(denali->reg + ECC_ERROR_ADDRESS);
+		err_sector = FIELD_GET(ECC_ERROR_ADDRESS__SECTOR, err_addr);
+		err_byte = FIELD_GET(ECC_ERROR_ADDRESS__OFFSET, err_addr);
+
+		err_cor_info = ioread32(denali->reg + ERR_CORRECTION_INFO);
+		err_cor_value = FIELD_GET(ERR_CORRECTION_INFO__BYTE,
+					  err_cor_info);
+		err_device = FIELD_GET(ERR_CORRECTION_INFO__DEVICE,
+				       err_cor_info);
+
+		/* reset the bitflip counter when crossing ECC sector */
+		if (err_sector != prev_sector)
+			bitflips = 0;
+
+		if (err_cor_info & ERR_CORRECTION_INFO__UNCOR) {
+			/*
+			 * Check later if this is a real ECC error, or
+			 * an erased sector.
+			 */
+			*uncor_ecc_flags |= BIT(err_sector);
+		} else if (err_byte < ecc_size) {
+			/*
+			 * If err_byte is larger than ecc_size, means error
+			 * happened in OOB, so we ignore it. It's no need for
+			 * us to correct it err_device is represented the NAND
+			 * error bits are happened in if there are more than
+			 * one NAND connected.
+			 */
+			int offset;
+			unsigned int flips_in_byte;
+
+			offset = (err_sector * ecc_size + err_byte) *
+					denali->devs_per_cs + err_device;
+
+			/* correct the ECC error */
+			flips_in_byte = hweight8(buf[offset] ^ err_cor_value);
+			buf[offset] ^= err_cor_value;
+			mtd->ecc_stats.corrected += flips_in_byte;
+			bitflips += flips_in_byte;
+
+			max_bitflips = max(max_bitflips, bitflips);
+		}
 
-/* helper function that simply writes a buffer to the flash */
-static int write_data_to_flash_mem(struct denali_nand_info *denali,
-				   const uint8_t *buf, int len)
-{
-	uint32_t *buf32;
-	int i;
+		prev_sector = err_sector;
+	} while (!(err_cor_info & ERR_CORRECTION_INFO__LAST_ERR));
 
 	/*
-	 * verify that the len is a multiple of 4.
-	 * see comment in read_data_from_flash_mem()
+	 * Once handle all ECC errors, controller will trigger an
+	 * ECC_TRANSACTION_DONE interrupt.
 	 */
-	BUG_ON((len % 4) != 0);
+	irq_status = denali_wait_for_irq(denali, INTR__ECC_TRANSACTION_DONE);
+	if (!(irq_status & INTR__ECC_TRANSACTION_DONE))
+		return -EIO;
 
-	/* write the data to the flash memory */
-	buf32 = (uint32_t *)buf;
-	for (i = 0; i < len / 4; i++)
-		writel(*buf32++, denali->flash_mem + INDEX_DATA_REG);
-	return i * 4; /* intent is to return the number of bytes read */
+	return max_bitflips;
 }
 
-/* helper function that simply reads a buffer from the flash */
-static int read_data_from_flash_mem(struct denali_nand_info *denali,
-				    uint8_t *buf, int len)
+static void denali_setup_dma64(struct denali_nand_info *denali,
+			       dma_addr_t dma_addr, int page, int write)
 {
-	uint32_t *buf32;
-	int i;
+	uint32_t mode;
+	const int page_count = 1;
 
-	/*
-	 * we assume that len will be a multiple of 4, if not it would be nice
-	 * to know about it ASAP rather than have random failures...
-	 * This assumption is based on the fact that this function is designed
-	 * to be used to read flash pages, which are typically multiples of 4.
-	 */
-	BUG_ON((len % 4) != 0);
+	mode = DENALI_MAP10 | DENALI_BANK(denali) | page;
 
-	/* transfer the data from the flash */
-	buf32 = (uint32_t *)buf;
-	for (i = 0; i < len / 4; i++)
-		*buf32++ = readl(denali->flash_mem + INDEX_DATA_REG);
+	/* DMA is a three step process */
 
-	return i * 4; /* intent is to return the number of bytes read */
-}
+	/*
+	 * 1. setup transfer type, interrupt when complete,
+	 *    burst len = 64 bytes, the number of pages
+	 */
+	denali->host_write(denali, mode,
+			   0x01002000 | (64 << 16) | (write << 8) | page_count);
 
-static void denali_mode_main_access(struct denali_nand_info *denali)
-{
-	uint32_t addr, cmd;
+	/* 2. set memory low address */
+	denali->host_write(denali, mode, lower_32_bits(dma_addr));
 
-	addr = BANK(denali->flash_bank) | denali->page;
-	cmd = MODE_10 | addr;
-	index_addr(denali, cmd, MAIN_ACCESS);
+	/* 3. set memory high address */
+	denali->host_write(denali, mode, upper_32_bits(dma_addr));
 }
 
-static void denali_mode_main_spare_access(struct denali_nand_info *denali)
+static void denali_setup_dma32(struct denali_nand_info *denali,
+			       dma_addr_t dma_addr, int page, int write)
 {
-	uint32_t addr, cmd;
+	uint32_t mode;
+	const int page_count = 1;
 
-	addr = BANK(denali->flash_bank) | denali->page;
-	cmd = MODE_10 | addr;
-	index_addr(denali, cmd, MAIN_SPARE_ACCESS);
-}
+	mode = DENALI_MAP10 | DENALI_BANK(denali);
 
-/* writes OOB data to the device */
-static int write_oob_data(struct mtd_info *mtd, uint8_t *buf, int page)
-{
-	struct denali_nand_info *denali = mtd_to_denali(mtd);
-	uint32_t irq_status;
-	uint32_t irq_mask = INTR_STATUS__PROGRAM_COMP |
-						INTR_STATUS__PROGRAM_FAIL;
-	int status = 0;
+	/* DMA is a four step process */
 
-	denali->page = page;
+	/* 1. setup transfer type and # of pages */
+	denali->host_write(denali, mode | page,
+			   0x2000 | (write << 8) | page_count);
 
-	if (denali_send_pipeline_cmd(denali, false, true, SPARE_ACCESS,
-				     DENALI_WRITE) == 0) {
-		write_data_to_flash_mem(denali, buf, mtd->oobsize);
+	/* 2. set memory high address bits 23:8 */
+	denali->host_write(denali, mode | ((dma_addr >> 16) << 8), 0x2200);
 
-		/* wait for operation to complete */
-		irq_status = wait_for_irq(denali, irq_mask);
+	/* 3. set memory low address bits 23:8 */
+	denali->host_write(denali, mode | ((dma_addr & 0xffff) << 8), 0x2300);
 
-		if (irq_status == 0) {
-			dev_err(denali->dev, "OOB write failed\n");
-			status = -EIO;
-		}
-	} else {
-		printf("unable to send pipeline command\n");
-		status = -EIO;
-	}
-	return status;
+	/* 4. interrupt when complete, burst len = 64 bytes */
+	denali->host_write(denali, mode | 0x14000, 0x2400);
 }
 
-/* reads OOB data from the device */
-static void read_oob_data(struct mtd_info *mtd, uint8_t *buf, int page)
+static int denali_pio_read(struct denali_nand_info *denali, void *buf,
+			   size_t size, int page, int raw)
 {
-	struct denali_nand_info *denali = mtd_to_denali(mtd);
-	uint32_t irq_mask = INTR_STATUS__LOAD_COMP;
-	uint32_t irq_status, addr, cmd;
+	u32 addr = DENALI_MAP01 | DENALI_BANK(denali) | page;
+	uint32_t *buf32 = (uint32_t *)buf;
+	uint32_t irq_status, ecc_err_mask;
+	int i;
 
-	denali->page = page;
+	if (denali->caps & DENALI_CAP_HW_ECC_FIXUP)
+		ecc_err_mask = INTR__ECC_UNCOR_ERR;
+	else
+		ecc_err_mask = INTR__ECC_ERR;
 
-	if (denali_send_pipeline_cmd(denali, false, true, SPARE_ACCESS,
-				     DENALI_READ) == 0) {
-		read_data_from_flash_mem(denali, buf, mtd->oobsize);
+	denali_reset_irq(denali);
 
-		/*
-		 * wait for command to be accepted
-		 * can always use status0 bit as the
-		 * mask is identical for each bank.
-		 */
-		irq_status = wait_for_irq(denali, irq_mask);
+	for (i = 0; i < size / 4; i++)
+		*buf32++ = denali->host_read(denali, addr);
 
-		if (irq_status == 0)
-			printf("page on OOB timeout %d\n", denali->page);
+	irq_status = denali_wait_for_irq(denali, INTR__PAGE_XFER_INC);
+	if (!(irq_status & INTR__PAGE_XFER_INC))
+		return -EIO;
 
-		/*
-		 * We set the device back to MAIN_ACCESS here as I observed
-		 * instability with the controller if you do a block erase
-		 * and the last transaction was a SPARE_ACCESS. Block erase
-		 * is reliable (according to the MTD test infrastructure)
-		 * if you are in MAIN_ACCESS.
-		 */
-		addr = BANK(denali->flash_bank) | denali->page;
-		cmd = MODE_10 | addr;
-		index_addr(denali, cmd, MAIN_ACCESS);
-	}
+	if (irq_status & INTR__ERASED_PAGE)
+		memset(buf, 0xff, size);
+
+	return irq_status & ecc_err_mask ? -EBADMSG : 0;
 }
 
-/*
- * this function examines buffers to see if they contain data that
- * indicate that the buffer is part of an erased region of flash.
- */
-static bool is_erased(uint8_t *buf, int len)
+static int denali_pio_write(struct denali_nand_info *denali,
+			    const void *buf, size_t size, int page, int raw)
 {
+	u32 addr = DENALI_MAP01 | DENALI_BANK(denali) | page;
+	const uint32_t *buf32 = (uint32_t *)buf;
+	uint32_t irq_status;
 	int i;
 
-	for (i = 0; i < len; i++)
-		if (buf[i] != 0xFF)
-			return false;
-	return true;
+	denali_reset_irq(denali);
+
+	for (i = 0; i < size / 4; i++)
+		denali->host_write(denali, addr, *buf32++);
+
+	irq_status = denali_wait_for_irq(denali,
+				INTR__PROGRAM_COMP | INTR__PROGRAM_FAIL);
+	if (!(irq_status & INTR__PROGRAM_COMP))
+		return -EIO;
+
+	return 0;
 }
 
-/* programs the controller to either enable/disable DMA transfers */
-static void denali_enable_dma(struct denali_nand_info *denali, bool en)
+static int denali_pio_xfer(struct denali_nand_info *denali, void *buf,
+			   size_t size, int page, int raw, int write)
 {
-	writel(en ? DMA_ENABLE__FLAG : 0, denali->flash_reg + DMA_ENABLE);
-	readl(denali->flash_reg + DMA_ENABLE);
+	if (write)
+		return denali_pio_write(denali, buf, size, page, raw);
+	else
+		return denali_pio_read(denali, buf, size, page, raw);
 }
 
-/* setups the HW to perform the data DMA */
-static void denali_setup_dma(struct denali_nand_info *denali, int op)
+static int denali_dma_xfer(struct denali_nand_info *denali, void *buf,
+			   size_t size, int page, int raw, int write)
 {
-	uint32_t mode;
-	const int page_count = 1;
-	uint64_t addr = (unsigned long)denali->buf.dma_buf;
-
-	flush_dcache_range(addr, addr + sizeof(denali->buf.dma_buf));
-
-/* For Denali controller that is 64 bit bus IP core */
-#ifdef CONFIG_SYS_NAND_DENALI_64BIT
-	mode = MODE_10 | BANK(denali->flash_bank) | denali->page;
-
-	/* DMA is a three step process */
+	dma_addr_t dma_addr;
+	uint32_t irq_mask, irq_status, ecc_err_mask;
+	enum dma_data_direction dir = write ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
+	int ret = 0;
+
+	dma_addr = dma_map_single(denali->dev, buf, size, dir);
+	if (dma_mapping_error(denali->dev, dma_addr)) {
+		dev_dbg(denali->dev, "Failed to DMA-map buffer. Trying PIO.\n");
+		return denali_pio_xfer(denali, buf, size, page, raw, write);
+	}
 
-	/* 1. setup transfer type, interrupt when complete,
-	      burst len = 64 bytes, the number of pages */
-	index_addr(denali, mode, 0x01002000 | (64 << 16) | op | page_count);
+	if (write) {
+		/*
+		 * INTR__PROGRAM_COMP is never asserted for the DMA transfer.
+		 * We can use INTR__DMA_CMD_COMP instead.  This flag is asserted
+		 * when the page program is completed.
+		 */
+		irq_mask = INTR__DMA_CMD_COMP | INTR__PROGRAM_FAIL;
+		ecc_err_mask = 0;
+	} else if (denali->caps & DENALI_CAP_HW_ECC_FIXUP) {
+		irq_mask = INTR__DMA_CMD_COMP;
+		ecc_err_mask = INTR__ECC_UNCOR_ERR;
+	} else {
+		irq_mask = INTR__DMA_CMD_COMP;
+		ecc_err_mask = INTR__ECC_ERR;
+	}
 
-	/* 2. set memory low address bits 31:0 */
-	index_addr(denali, mode, addr);
+	iowrite32(DMA_ENABLE__FLAG, denali->reg + DMA_ENABLE);
 
-	/* 3. set memory high address bits 64:32 */
-	index_addr(denali, mode, addr >> 32);
-#else
-	mode = MODE_10 | BANK(denali->flash_bank);
+	denali_reset_irq(denali);
+	denali->setup_dma(denali, dma_addr, page, write);
 
-	/* DMA is a four step process */
+	irq_status = denali_wait_for_irq(denali, irq_mask);
+	if (!(irq_status & INTR__DMA_CMD_COMP))
+		ret = -EIO;
+	else if (irq_status & ecc_err_mask)
+		ret = -EBADMSG;
 
-	/* 1. setup transfer type and # of pages */
-	index_addr(denali, mode | denali->page, 0x2000 | op | page_count);
+	iowrite32(0, denali->reg + DMA_ENABLE);
 
-	/* 2. set memory high address bits 23:8 */
-	index_addr(denali, mode | (((addr >> 16) & 0xffff) << 8), 0x2200);
+	dma_unmap_single(denali->dev, dma_addr, size, dir);
 
-	/* 3. set memory low address bits 23:8 */
-	index_addr(denali, mode | ((addr & 0xffff) << 8), 0x2300);
+	if (irq_status & INTR__ERASED_PAGE)
+		memset(buf, 0xff, size);
 
-	/* 4. interrupt when complete, burst len = 64 bytes */
-	index_addr(denali, mode | 0x14000, 0x2400);
-#endif
+	return ret;
 }
 
-/* Common DMA function */
-static uint32_t denali_dma_configuration(struct denali_nand_info *denali,
-					 uint32_t ops, bool raw_xfer,
-					 uint32_t irq_mask, int oob_required)
+static int denali_data_xfer(struct denali_nand_info *denali, void *buf,
+			    size_t size, int page, int raw, int write)
 {
-	uint32_t irq_status = 0;
-	/* setup_ecc_for_xfer(bool ecc_en, bool transfer_spare) */
-	setup_ecc_for_xfer(denali, !raw_xfer, oob_required);
-
-	/* clear any previous interrupt flags */
-	clear_interrupts(denali);
-
-	/* enable the DMA */
-	denali_enable_dma(denali, true);
-
-	/* setup the DMA */
-	denali_setup_dma(denali, ops);
-
-	/* wait for operation to complete */
-	irq_status = wait_for_irq(denali, irq_mask);
+	iowrite32(raw ? 0 : ECC_ENABLE__FLAG, denali->reg + ECC_ENABLE);
+	iowrite32(raw ? TRANSFER_SPARE_REG__FLAG : 0,
+		  denali->reg + TRANSFER_SPARE_REG);
 
-	/* if ECC fault happen, seems we need delay before turning off DMA.
-	 * If not, the controller will go into non responsive condition */
-	if (irq_status & INTR_STATUS__ECC_UNCOR_ERR)
-		udelay(100);
-
-	/* disable the DMA */
-	denali_enable_dma(denali, false);
-
-	return irq_status;
+	if (denali->dma_avail)
+		return denali_dma_xfer(denali, buf, size, page, raw, write);
+	else
+		return denali_pio_xfer(denali, buf, size, page, raw, write);
 }
 
-static int write_page(struct mtd_info *mtd, struct nand_chip *chip,
-			const uint8_t *buf, bool raw_xfer, int oob_required)
+static void denali_oob_xfer(struct mtd_info *mtd, struct nand_chip *chip,
+			    int page, int write)
 {
 	struct denali_nand_info *denali = mtd_to_denali(mtd);
+	unsigned int start_cmd = write ? NAND_CMD_SEQIN : NAND_CMD_READ0;
+	unsigned int rnd_cmd = write ? NAND_CMD_RNDIN : NAND_CMD_RNDOUT;
+	int writesize = mtd->writesize;
+	int oobsize = mtd->oobsize;
+	uint8_t *bufpoi = chip->oob_poi;
+	int ecc_steps = chip->ecc.steps;
+	int ecc_size = chip->ecc.size;
+	int ecc_bytes = chip->ecc.bytes;
+	int oob_skip = denali->oob_skip_bytes;
+	size_t size = writesize + oobsize;
+	int i, pos, len;
+
+	/* BBM at the beginning of the OOB area */
+	chip->cmdfunc(mtd, start_cmd, writesize, page);
+	if (write)
+		chip->write_buf(mtd, bufpoi, oob_skip);
+	else
+		chip->read_buf(mtd, bufpoi, oob_skip);
+	bufpoi += oob_skip;
+
+	/* OOB ECC */
+	for (i = 0; i < ecc_steps; i++) {
+		pos = ecc_size + i * (ecc_size + ecc_bytes);
+		len = ecc_bytes;
+
+		if (pos >= writesize)
+			pos += oob_skip;
+		else if (pos + len > writesize)
+			len = writesize - pos;
+
+		chip->cmdfunc(mtd, rnd_cmd, pos, -1);
+		if (write)
+			chip->write_buf(mtd, bufpoi, len);
+		else
+			chip->read_buf(mtd, bufpoi, len);
+		bufpoi += len;
+		if (len < ecc_bytes) {
+			len = ecc_bytes - len;
+			chip->cmdfunc(mtd, rnd_cmd, writesize + oob_skip, -1);
+			if (write)
+				chip->write_buf(mtd, bufpoi, len);
+			else
+				chip->read_buf(mtd, bufpoi, len);
+			bufpoi += len;
+		}
+	}
 
-	uint32_t irq_status = 0;
-	uint32_t irq_mask = INTR_STATUS__DMA_CMD_COMP;
-
-	denali->status = 0;
-
-	/* copy buffer into DMA buffer */
-	memcpy(denali->buf.dma_buf, buf, mtd->writesize);
+	/* OOB free */
+	len = oobsize - (bufpoi - chip->oob_poi);
+	chip->cmdfunc(mtd, rnd_cmd, size - len, -1);
+	if (write)
+		chip->write_buf(mtd, bufpoi, len);
+	else
+		chip->read_buf(mtd, bufpoi, len);
+}
 
-	/* need extra memcpy for raw transfer */
-	if (raw_xfer)
-		memcpy(denali->buf.dma_buf + mtd->writesize,
-		       chip->oob_poi, mtd->oobsize);
+static int denali_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
+				uint8_t *buf, int oob_required, int page)
+{
+	struct denali_nand_info *denali = mtd_to_denali(mtd);
+	int writesize = mtd->writesize;
+	int oobsize = mtd->oobsize;
+	int ecc_steps = chip->ecc.steps;
+	int ecc_size = chip->ecc.size;
+	int ecc_bytes = chip->ecc.bytes;
+	void *tmp_buf = denali->buf;
+	int oob_skip = denali->oob_skip_bytes;
+	size_t size = writesize + oobsize;
+	int ret, i, pos, len;
+
+	ret = denali_data_xfer(denali, tmp_buf, size, page, 1, 0);
+	if (ret)
+		return ret;
+
+	/* Arrange the buffer for syndrome payload/ecc layout */
+	if (buf) {
+		for (i = 0; i < ecc_steps; i++) {
+			pos = i * (ecc_size + ecc_bytes);
+			len = ecc_size;
+
+			if (pos >= writesize)
+				pos += oob_skip;
+			else if (pos + len > writesize)
+				len = writesize - pos;
+
+			memcpy(buf, tmp_buf + pos, len);
+			buf += len;
+			if (len < ecc_size) {
+				len = ecc_size - len;
+				memcpy(buf, tmp_buf + writesize + oob_skip,
+				       len);
+				buf += len;
+			}
+		}
+	}
 
-	/* setting up DMA */
-	irq_status = denali_dma_configuration(denali, DENALI_WRITE, raw_xfer,
-					      irq_mask, oob_required);
+	if (oob_required) {
+		uint8_t *oob = chip->oob_poi;
+
+		/* BBM at the beginning of the OOB area */
+		memcpy(oob, tmp_buf + writesize, oob_skip);
+		oob += oob_skip;
+
+		/* OOB ECC */
+		for (i = 0; i < ecc_steps; i++) {
+			pos = ecc_size + i * (ecc_size + ecc_bytes);
+			len = ecc_bytes;
+
+			if (pos >= writesize)
+				pos += oob_skip;
+			else if (pos + len > writesize)
+				len = writesize - pos;
+
+			memcpy(oob, tmp_buf + pos, len);
+			oob += len;
+			if (len < ecc_bytes) {
+				len = ecc_bytes - len;
+				memcpy(oob, tmp_buf + writesize + oob_skip,
+				       len);
+				oob += len;
+			}
+		}
 
-	/* if timeout happen, error out */
-	if (!(irq_status & INTR_STATUS__DMA_CMD_COMP)) {
-		debug("DMA timeout for denali write_page\n");
-		denali->status = NAND_STATUS_FAIL;
-		return -EIO;
+		/* OOB free */
+		len = oobsize - (oob - chip->oob_poi);
+		memcpy(oob, tmp_buf + size - len, len);
 	}
 
-	if (irq_status & INTR_STATUS__LOCKED_BLK) {
-		debug("Failed as write to locked block\n");
-		denali->status = NAND_STATUS_FAIL;
-		return -EIO;
-	}
 	return 0;
 }
 
-/* NAND core entry points */
-
-/*
- * this is the callback that the NAND core calls to write a page. Since
- * writing a page with ECC or without is similar, all the work is done
- * by write_page above.
- */
-static int denali_write_page(struct mtd_info *mtd, struct nand_chip *chip,
-				const uint8_t *buf, int oob_required, int page)
+static int denali_read_oob(struct mtd_info *mtd, struct nand_chip *chip,
+			   int page)
 {
-	struct denali_nand_info *denali = mtd_to_denali(mtd);
-
-	/*
-	 * for regular page writes, we let HW handle all the ECC
-	 * data written to the device.
-	 */
-	if (oob_required)
-		/* switch to main + spare access */
-		denali_mode_main_spare_access(denali);
-	else
-		/* switch to main access only */
-		denali_mode_main_access(denali);
+	denali_oob_xfer(mtd, chip, page, 0);
 
-	return write_page(mtd, chip, buf, false, oob_required);
+	return 0;
 }
 
-/*
- * This is the callback that the NAND core calls to write a page without ECC.
- * raw access is similar to ECC page writes, so all the work is done in the
- * write_page() function above.
- */
-static int denali_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
-				 const uint8_t *buf, int oob_required,
-				 int page)
+static int denali_write_oob(struct mtd_info *mtd, struct nand_chip *chip,
+			    int page)
 {
 	struct denali_nand_info *denali = mtd_to_denali(mtd);
+	int status;
 
-	/*
-	 * for raw page writes, we want to disable ECC and simply write
-	 * whatever data is in the buffer.
-	 */
+	denali_reset_irq(denali);
 
-	if (oob_required)
-		/* switch to main + spare access */
-		denali_mode_main_spare_access(denali);
-	else
-		/* switch to main access only */
-		denali_mode_main_access(denali);
+	denali_oob_xfer(mtd, chip, page, 1);
 
-	return write_page(mtd, chip, buf, true, oob_required);
-}
+	chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
+	status = chip->waitfunc(mtd, chip);
 
-static int denali_write_oob(struct mtd_info *mtd, struct nand_chip *chip,
-				int page)
-{
-	return write_oob_data(mtd, chip->oob_poi, page);
+	return status & NAND_STATUS_FAIL ? -EIO : 0;
 }
 
-/* raw include ECC value and all the spare area */
-static int denali_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
-				uint8_t *buf, int oob_required, int page)
+static int denali_read_page(struct mtd_info *mtd, struct nand_chip *chip,
+			    uint8_t *buf, int oob_required, int page)
 {
 	struct denali_nand_info *denali = mtd_to_denali(mtd);
+	unsigned long uncor_ecc_flags = 0;
+	int stat = 0;
+	int ret;
 
-	uint32_t irq_status, irq_mask = INTR_STATUS__DMA_CMD_COMP;
+	ret = denali_data_xfer(denali, buf, mtd->writesize, page, 0, 0);
+	if (ret && ret != -EBADMSG)
+		return ret;
 
-	if (denali->page != page) {
-		debug("Missing NAND_CMD_READ0 command\n");
-		return -EIO;
-	}
+	if (denali->caps & DENALI_CAP_HW_ECC_FIXUP)
+		stat = denali_hw_ecc_fixup(mtd, denali, &uncor_ecc_flags);
+	else if (ret == -EBADMSG)
+		stat = denali_sw_ecc_fixup(mtd, denali, &uncor_ecc_flags, buf);
 
-	if (oob_required)
-		/* switch to main + spare access */
-		denali_mode_main_spare_access(denali);
-	else
-		/* switch to main access only */
-		denali_mode_main_access(denali);
+	if (stat < 0)
+		return stat;
 
-	/* setting up the DMA where ecc_enable is false */
-	irq_status = denali_dma_configuration(denali, DENALI_READ, true,
-					      irq_mask, oob_required);
+	if (uncor_ecc_flags) {
+		ret = denali_read_oob(mtd, chip, page);
+		if (ret)
+			return ret;
 
-	/* if timeout happen, error out */
-	if (!(irq_status & INTR_STATUS__DMA_CMD_COMP)) {
-		debug("DMA timeout for denali_read_page_raw\n");
-		return -EIO;
+		stat = denali_check_erased_page(mtd, chip, buf,
+						uncor_ecc_flags, stat);
 	}
 
-	/* splitting the content to destination buffer holder */
-	memcpy(chip->oob_poi, (denali->buf.dma_buf + mtd->writesize),
-	       mtd->oobsize);
-	memcpy(buf, denali->buf.dma_buf, mtd->writesize);
-
-	return 0;
+	return stat;
 }
 
-static int denali_read_page(struct mtd_info *mtd, struct nand_chip *chip,
-				uint8_t *buf, int oob_required, int page)
+static int denali_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
+				 const uint8_t *buf, int oob_required, int page)
 {
 	struct denali_nand_info *denali = mtd_to_denali(mtd);
-	uint32_t irq_status, irq_mask =	INTR_STATUS__DMA_CMD_COMP;
+	int writesize = mtd->writesize;
+	int oobsize = mtd->oobsize;
+	int ecc_steps = chip->ecc.steps;
+	int ecc_size = chip->ecc.size;
+	int ecc_bytes = chip->ecc.bytes;
+	void *tmp_buf = denali->buf;
+	int oob_skip = denali->oob_skip_bytes;
+	size_t size = writesize + oobsize;
+	int i, pos, len;
 
-	if (denali->page != page) {
-		debug("Missing NAND_CMD_READ0 command\n");
-		return -EIO;
+	/*
+	 * Fill the buffer with 0xff first except the full page transfer.
+	 * This simplifies the logic.
+	 */
+	if (!buf || !oob_required)
+		memset(tmp_buf, 0xff, size);
+
+	/* Arrange the buffer for syndrome payload/ecc layout */
+	if (buf) {
+		for (i = 0; i < ecc_steps; i++) {
+			pos = i * (ecc_size + ecc_bytes);
+			len = ecc_size;
+
+			if (pos >= writesize)
+				pos += oob_skip;
+			else if (pos + len > writesize)
+				len = writesize - pos;
+
+			memcpy(tmp_buf + pos, buf, len);
+			buf += len;
+			if (len < ecc_size) {
+				len = ecc_size - len;
+				memcpy(tmp_buf + writesize + oob_skip, buf,
+				       len);
+				buf += len;
+			}
+		}
 	}
 
-	if (oob_required)
-		/* switch to main + spare access */
-		denali_mode_main_spare_access(denali);
-	else
-		/* switch to main access only */
-		denali_mode_main_access(denali);
-
-	/* setting up the DMA where ecc_enable is true */
-	irq_status = denali_dma_configuration(denali, DENALI_READ, false,
-					      irq_mask, oob_required);
-
-	memcpy(buf, denali->buf.dma_buf, mtd->writesize);
-
-	/* check whether any ECC error */
-	if (irq_status & INTR_STATUS__ECC_UNCOR_ERR) {
-		/* is the ECC cause by erase page, check using read_page_raw */
-		debug("  Uncorrected ECC detected\n");
-		denali_read_page_raw(mtd, chip, buf, oob_required,
-				     denali->page);
-
-		if (is_erased(buf, mtd->writesize) == true &&
-		    is_erased(chip->oob_poi, mtd->oobsize) == true) {
-			debug("  ECC error cause by erased block\n");
-			/* false alarm, return the 0xFF */
-		} else {
-			return -EBADMSG;
+	if (oob_required) {
+		const uint8_t *oob = chip->oob_poi;
+
+		/* BBM at the beginning of the OOB area */
+		memcpy(tmp_buf + writesize, oob, oob_skip);
+		oob += oob_skip;
+
+		/* OOB ECC */
+		for (i = 0; i < ecc_steps; i++) {
+			pos = ecc_size + i * (ecc_size + ecc_bytes);
+			len = ecc_bytes;
+
+			if (pos >= writesize)
+				pos += oob_skip;
+			else if (pos + len > writesize)
+				len = writesize - pos;
+
+			memcpy(tmp_buf + pos, oob, len);
+			oob += len;
+			if (len < ecc_bytes) {
+				len = ecc_bytes - len;
+				memcpy(tmp_buf + writesize + oob_skip, oob,
+				       len);
+				oob += len;
+			}
 		}
+
+		/* OOB free */
+		len = oobsize - (oob - chip->oob_poi);
+		memcpy(tmp_buf + size - len, oob, len);
 	}
-	memcpy(buf, denali->buf.dma_buf, mtd->writesize);
-	return 0;
+
+	return denali_data_xfer(denali, tmp_buf, size, page, 1, 1);
 }
 
-static int denali_read_oob(struct mtd_info *mtd, struct nand_chip *chip,
-				int page)
+static int denali_write_page(struct mtd_info *mtd, struct nand_chip *chip,
+			     const uint8_t *buf, int oob_required, int page)
 {
-	read_oob_data(mtd, chip->oob_poi, page);
+	struct denali_nand_info *denali = mtd_to_denali(mtd);
 
-	return 0;
+	return denali_data_xfer(denali, (void *)buf, mtd->writesize,
+				page, 0, 1);
 }
 
-static uint8_t denali_read_byte(struct mtd_info *mtd)
+static void denali_select_chip(struct mtd_info *mtd, int chip)
 {
 	struct denali_nand_info *denali = mtd_to_denali(mtd);
-	uint32_t addr, result;
 
-	addr = (uint32_t)MODE_11 | BANK(denali->flash_bank);
-	index_addr_read_data(denali, addr | 2, &result);
-	return (uint8_t)result & 0xFF;
+	denali->active_bank = chip;
 }
 
-static void denali_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
+static int denali_waitfunc(struct mtd_info *mtd, struct nand_chip *chip)
 {
 	struct denali_nand_info *denali = mtd_to_denali(mtd);
-	uint32_t i, addr, result;
-
-	/* delay for tR (data transfer from Flash array to data register) */
-	udelay(25);
+	uint32_t irq_status;
 
-	/* ensure device completed else additional delay and polling */
-	wait_for_irq(denali, INTR_STATUS__INT_ACT);
+	/* R/B# pin transitioned from low to high? */
+	irq_status = denali_wait_for_irq(denali, INTR__INT_ACT);
 
-	addr = (uint32_t)MODE_11 | BANK(denali->flash_bank);
-	for (i = 0; i < len; i++) {
-		index_addr_read_data(denali, (uint32_t)addr | 2, &result);
-		write_byte_to_buf(denali, result);
-	}
-	memcpy(buf, denali->buf.buf, len);
+	return irq_status & INTR__INT_ACT ? 0 : NAND_STATUS_FAIL;
 }
 
-static void denali_select_chip(struct mtd_info *mtd, int chip)
+static int denali_erase(struct mtd_info *mtd, int page)
 {
 	struct denali_nand_info *denali = mtd_to_denali(mtd);
+	uint32_t irq_status;
 
-	denali->flash_bank = chip;
-}
+	denali_reset_irq(denali);
 
-static int denali_waitfunc(struct mtd_info *mtd, struct nand_chip *chip)
-{
-	struct denali_nand_info *denali = mtd_to_denali(mtd);
-	int status = denali->status;
+	denali->host_write(denali, DENALI_MAP10 | DENALI_BANK(denali) | page,
+			   DENALI_ERASE);
 
-	denali->status = 0;
+	/* wait for erase to complete or failure to occur */
+	irq_status = denali_wait_for_irq(denali,
+					 INTR__ERASE_COMP | INTR__ERASE_FAIL);
 
-	return status;
+	return irq_status & INTR__ERASE_COMP ? 0 : NAND_STATUS_FAIL;
 }
 
-static int denali_erase(struct mtd_info *mtd, int page)
+static int __maybe_unused denali_setup_data_interface(struct mtd_info *mtd, int chipnr,
+				       const struct nand_data_interface *conf)
 {
 	struct denali_nand_info *denali = mtd_to_denali(mtd);
+	const struct nand_sdr_timings *timings;
+	unsigned long t_clk;
+	int acc_clks, re_2_we, re_2_re, we_2_re, addr_2_data;
+	int rdwr_en_lo, rdwr_en_hi, rdwr_en_lo_hi, cs_setup;
+	int addr_2_data_mask;
+	uint32_t tmp;
 
-	uint32_t cmd, irq_status;
+	timings = nand_get_sdr_timings(conf);
+	if (IS_ERR(timings))
+		return PTR_ERR(timings);
 
-	clear_interrupts(denali);
+	/* clk_x period in picoseconds */
+	t_clk = DIV_ROUND_DOWN_ULL(1000000000000ULL, denali->clk_x_rate);
+	if (!t_clk)
+		return -EINVAL;
 
-	/* setup page read request for access type */
-	cmd = MODE_10 | BANK(denali->flash_bank) | page;
-	index_addr(denali, cmd, 0x1);
+	if (chipnr == NAND_DATA_IFACE_CHECK_ONLY)
+		return 0;
 
-	/* wait for erase to complete or failure to occur */
-	irq_status = wait_for_irq(denali, INTR_STATUS__ERASE_COMP |
-					INTR_STATUS__ERASE_FAIL);
+	/* tREA -> ACC_CLKS */
+	acc_clks = DIV_ROUND_UP(timings->tREA_max, t_clk);
+	acc_clks = min_t(int, acc_clks, ACC_CLKS__VALUE);
+
+	tmp = ioread32(denali->reg + ACC_CLKS);
+	tmp &= ~ACC_CLKS__VALUE;
+	tmp |= FIELD_PREP(ACC_CLKS__VALUE, acc_clks);
+	iowrite32(tmp, denali->reg + ACC_CLKS);
+
+	/* tRWH -> RE_2_WE */
+	re_2_we = DIV_ROUND_UP(timings->tRHW_min, t_clk);
+	re_2_we = min_t(int, re_2_we, RE_2_WE__VALUE);
+
+	tmp = ioread32(denali->reg + RE_2_WE);
+	tmp &= ~RE_2_WE__VALUE;
+	tmp |= FIELD_PREP(RE_2_WE__VALUE, re_2_we);
+	iowrite32(tmp, denali->reg + RE_2_WE);
+
+	/* tRHZ -> RE_2_RE */
+	re_2_re = DIV_ROUND_UP(timings->tRHZ_max, t_clk);
+	re_2_re = min_t(int, re_2_re, RE_2_RE__VALUE);
+
+	tmp = ioread32(denali->reg + RE_2_RE);
+	tmp &= ~RE_2_RE__VALUE;
+	tmp |= FIELD_PREP(RE_2_RE__VALUE, re_2_re);
+	iowrite32(tmp, denali->reg + RE_2_RE);
+
+	/*
+	 * tCCS, tWHR -> WE_2_RE
+	 *
+	 * With WE_2_RE properly set, the Denali controller automatically takes
+	 * care of the delay; the driver need not set NAND_WAIT_TCCS.
+	 */
+	we_2_re = DIV_ROUND_UP(max(timings->tCCS_min, timings->tWHR_min),
+			       t_clk);
+	we_2_re = min_t(int, we_2_re, TWHR2_AND_WE_2_RE__WE_2_RE);
+
+	tmp = ioread32(denali->reg + TWHR2_AND_WE_2_RE);
+	tmp &= ~TWHR2_AND_WE_2_RE__WE_2_RE;
+	tmp |= FIELD_PREP(TWHR2_AND_WE_2_RE__WE_2_RE, we_2_re);
+	iowrite32(tmp, denali->reg + TWHR2_AND_WE_2_RE);
+
+	/* tADL -> ADDR_2_DATA */
 
-	if (irq_status & INTR_STATUS__ERASE_FAIL ||
-	    irq_status & INTR_STATUS__LOCKED_BLK)
-		return NAND_STATUS_FAIL;
+	/* for older versions, ADDR_2_DATA is only 6 bit wide */
+	addr_2_data_mask = TCWAW_AND_ADDR_2_DATA__ADDR_2_DATA;
+	if (denali->revision < 0x0501)
+		addr_2_data_mask >>= 1;
+
+	addr_2_data = DIV_ROUND_UP(timings->tADL_min, t_clk);
+	addr_2_data = min_t(int, addr_2_data, addr_2_data_mask);
+
+	tmp = ioread32(denali->reg + TCWAW_AND_ADDR_2_DATA);
+	tmp &= ~TCWAW_AND_ADDR_2_DATA__ADDR_2_DATA;
+	tmp |= FIELD_PREP(TCWAW_AND_ADDR_2_DATA__ADDR_2_DATA, addr_2_data);
+	iowrite32(tmp, denali->reg + TCWAW_AND_ADDR_2_DATA);
+
+	/* tREH, tWH -> RDWR_EN_HI_CNT */
+	rdwr_en_hi = DIV_ROUND_UP(max(timings->tREH_min, timings->tWH_min),
+				  t_clk);
+	rdwr_en_hi = min_t(int, rdwr_en_hi, RDWR_EN_HI_CNT__VALUE);
+
+	tmp = ioread32(denali->reg + RDWR_EN_HI_CNT);
+	tmp &= ~RDWR_EN_HI_CNT__VALUE;
+	tmp |= FIELD_PREP(RDWR_EN_HI_CNT__VALUE, rdwr_en_hi);
+	iowrite32(tmp, denali->reg + RDWR_EN_HI_CNT);
+
+	/* tRP, tWP -> RDWR_EN_LO_CNT */
+	rdwr_en_lo = DIV_ROUND_UP(max(timings->tRP_min, timings->tWP_min),
+				  t_clk);
+	rdwr_en_lo_hi = DIV_ROUND_UP(max(timings->tRC_min, timings->tWC_min),
+				     t_clk);
+	rdwr_en_lo_hi = max(rdwr_en_lo_hi, DENALI_CLK_X_MULT);
+	rdwr_en_lo = max(rdwr_en_lo, rdwr_en_lo_hi - rdwr_en_hi);
+	rdwr_en_lo = min_t(int, rdwr_en_lo, RDWR_EN_LO_CNT__VALUE);
+
+	tmp = ioread32(denali->reg + RDWR_EN_LO_CNT);
+	tmp &= ~RDWR_EN_LO_CNT__VALUE;
+	tmp |= FIELD_PREP(RDWR_EN_LO_CNT__VALUE, rdwr_en_lo);
+	iowrite32(tmp, denali->reg + RDWR_EN_LO_CNT);
+
+	/* tCS, tCEA -> CS_SETUP_CNT */
+	cs_setup = max3((int)DIV_ROUND_UP(timings->tCS_min, t_clk) - rdwr_en_lo,
+			(int)DIV_ROUND_UP(timings->tCEA_max, t_clk) - acc_clks,
+			0);
+	cs_setup = min_t(int, cs_setup, CS_SETUP_CNT__VALUE);
+
+	tmp = ioread32(denali->reg + CS_SETUP_CNT);
+	tmp &= ~CS_SETUP_CNT__VALUE;
+	tmp |= FIELD_PREP(CS_SETUP_CNT__VALUE, cs_setup);
+	iowrite32(tmp, denali->reg + CS_SETUP_CNT);
 
 	return 0;
 }
 
-static void denali_cmdfunc(struct mtd_info *mtd, unsigned int cmd, int col,
-			   int page)
+static void denali_reset_banks(struct denali_nand_info *denali)
 {
-	struct denali_nand_info *denali = mtd_to_denali(mtd);
-	uint32_t addr;
-
-	switch (cmd) {
-	case NAND_CMD_PAGEPROG:
-		break;
-	case NAND_CMD_STATUS:
-		addr = MODE_11 | BANK(denali->flash_bank);
-		index_addr(denali, addr | 0, cmd);
-		break;
-	case NAND_CMD_READID:
-	case NAND_CMD_PARAM:
-		reset_buf(denali);
-		/*
-		 * sometimes ManufactureId read from register is not right
-		 * e.g. some of Micron MT29F32G08QAA MLC NAND chips
-		 * So here we send READID cmd to NAND insteand
-		 */
-		addr = MODE_11 | BANK(denali->flash_bank);
-		index_addr(denali, addr | 0, cmd);
-		index_addr(denali, addr | 1, col & 0xFF);
-		if (cmd == NAND_CMD_PARAM)
-			udelay(50);
-		break;
-	case NAND_CMD_RNDOUT:
-		addr = MODE_11 | BANK(denali->flash_bank);
-		index_addr(denali, addr | 0, cmd);
-		index_addr(denali, addr | 1, col & 0xFF);
-		index_addr(denali, addr | 1, col >> 8);
-		index_addr(denali, addr | 0, NAND_CMD_RNDOUTSTART);
-		break;
-	case NAND_CMD_READ0:
-	case NAND_CMD_SEQIN:
-		denali->page = page;
-		break;
-	case NAND_CMD_RESET:
-		reset_bank(denali);
-		break;
-	case NAND_CMD_READOOB:
-		/* TODO: Read OOB data */
-		break;
-	case NAND_CMD_ERASE1:
-		/*
-		 * supporting block erase only, not multiblock erase as
-		 * it will cross plane and software need complex calculation
-		 * to identify the block count for the cross plane
-		 */
-		denali_erase(mtd, page);
-		break;
-	case NAND_CMD_ERASE2:
-		/* nothing to do here as it was done during NAND_CMD_ERASE1 */
-		break;
-	case NAND_CMD_UNLOCK1:
-		addr = MODE_10 | BANK(denali->flash_bank) | page;
-		index_addr(denali, addr | 0, DENALI_UNLOCK_START);
-		break;
-	case NAND_CMD_UNLOCK2:
-		addr = MODE_10 | BANK(denali->flash_bank) | page;
-		index_addr(denali, addr | 0, DENALI_UNLOCK_END);
-		break;
-	case NAND_CMD_LOCK:
-		addr = MODE_10 | BANK(denali->flash_bank);
-		index_addr(denali, addr | 0, DENALI_LOCK);
-		break;
-	default:
-		printf(": unsupported command received 0x%x\n", cmd);
-		break;
+	u32 irq_status;
+	int i;
+
+	for (i = 0; i < denali->max_banks; i++) {
+		denali->active_bank = i;
+
+		denali_reset_irq(denali);
+
+		iowrite32(DEVICE_RESET__BANK(i),
+			  denali->reg + DEVICE_RESET);
+
+		irq_status = denali_wait_for_irq(denali,
+			INTR__RST_COMP | INTR__INT_ACT | INTR__TIME_OUT);
+		if (!(irq_status & INTR__INT_ACT))
+			break;
 	}
+
+	dev_dbg(denali->dev, "%d chips connected\n", i);
+	denali->max_banks = i;
 }
-/* end NAND core entry points */
 
-/* Initialization code to bring the device up to a known good state */
 static void denali_hw_init(struct denali_nand_info *denali)
 {
 	/*
@@ -1154,125 +1086,284 @@ static void denali_hw_init(struct denali_nand_info *denali)
 	 * override it.
 	 */
 	if (!denali->revision)
-		denali->revision = swab16(ioread32(denali->flash_reg + REVISION));
+		denali->revision = swab16(ioread32(denali->reg + REVISION));
 
 	/*
 	 * tell driver how many bit controller will skip before writing
 	 * ECC code in OOB. This is normally used for bad block marker
 	 */
-	writel(CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES,
-	       denali->flash_reg + SPARE_AREA_SKIP_BYTES);
-	detect_max_banks(denali);
-	denali_nand_reset(denali);
-	writel(0x0F, denali->flash_reg + RB_PIN_ENABLED);
-	writel(CHIP_EN_DONT_CARE__FLAG,
-	       denali->flash_reg + CHIP_ENABLE_DONT_CARE);
-	writel(0xffff, denali->flash_reg + SPARE_AREA_MARKER);
-
-	/* Should set value for these registers when init */
-	writel(0, denali->flash_reg + TWO_ROW_ADDR_CYCLES);
-	writel(1, denali->flash_reg + ECC_ENABLE);
-	denali_nand_timing_set(denali);
-	denali_irq_init(denali);
+	denali->oob_skip_bytes = CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES;
+	iowrite32(denali->oob_skip_bytes, denali->reg + SPARE_AREA_SKIP_BYTES);
+	denali_detect_max_banks(denali);
+	iowrite32(0x0F, denali->reg + RB_PIN_ENABLED);
+	iowrite32(CHIP_EN_DONT_CARE__FLAG, denali->reg + CHIP_ENABLE_DONT_CARE);
+
+	iowrite32(0xffff, denali->reg + SPARE_AREA_MARKER);
 }
 
-static struct nand_ecclayout nand_oob;
+int denali_calc_ecc_bytes(int step_size, int strength)
+{
+	/* BCH code.  Denali requires ecc.bytes to be multiple of 2 */
+	return DIV_ROUND_UP(strength * fls(step_size * 8), 16) * 2;
+}
+EXPORT_SYMBOL(denali_calc_ecc_bytes);
 
-int denali_init(struct denali_nand_info *denali)
+static int denali_ecc_setup(struct mtd_info *mtd, struct nand_chip *chip,
+			    struct denali_nand_info *denali)
 {
-	struct mtd_info *mtd = nand_to_mtd(&denali->nand);
+	int oobavail = mtd->oobsize - denali->oob_skip_bytes;
 	int ret;
 
-	denali_hw_init(denali);
+	/*
+	 * If .size and .strength are already set (usually by DT),
+	 * check if they are supported by this controller.
+	 */
+	if (chip->ecc.size && chip->ecc.strength)
+		return nand_check_ecc_caps(chip, denali->ecc_caps, oobavail);
+
+	/*
+	 * We want .size and .strength closest to the chip's requirement
+	 * unless NAND_ECC_MAXIMIZE is requested.
+	 */
+	if (!(chip->ecc.options & NAND_ECC_MAXIMIZE)) {
+		ret = nand_match_ecc_req(chip, denali->ecc_caps, oobavail);
+		if (!ret)
+			return 0;
+	}
+
+	/* Max ECC strength is the last thing we can do */
+	return nand_maximize_ecc(chip, denali->ecc_caps, oobavail);
+}
+
+static struct nand_ecclayout nand_oob;
+
+static int denali_ooblayout_ecc(struct mtd_info *mtd, int section,
+				struct mtd_oob_region *oobregion)
+{
+	struct denali_nand_info *denali = mtd_to_denali(mtd);
+	struct nand_chip *chip = mtd_to_nand(mtd);
+
+	if (section)
+		return -ERANGE;
+
+	oobregion->offset = denali->oob_skip_bytes;
+	oobregion->length = chip->ecc.total;
+
+	return 0;
+}
 
-	mtd->name = "denali-nand";
-	mtd->owner = THIS_MODULE;
+static int denali_ooblayout_free(struct mtd_info *mtd, int section,
+				 struct mtd_oob_region *oobregion)
+{
+	struct denali_nand_info *denali = mtd_to_denali(mtd);
+	struct nand_chip *chip = mtd_to_nand(mtd);
+
+	if (section)
+		return -ERANGE;
+
+	oobregion->offset = chip->ecc.total + denali->oob_skip_bytes;
+	oobregion->length = mtd->oobsize - oobregion->offset;
+
+	return 0;
+}
 
-	/* register the driver with the NAND core subsystem */
-	denali->nand.select_chip = denali_select_chip;
-	denali->nand.cmdfunc = denali_cmdfunc;
-	denali->nand.read_byte = denali_read_byte;
-	denali->nand.read_buf = denali_read_buf;
-	denali->nand.waitfunc = denali_waitfunc;
+static const struct mtd_ooblayout_ops denali_ooblayout_ops = {
+	.ecc = denali_ooblayout_ecc,
+	.free = denali_ooblayout_free,
+};
+
+static int denali_multidev_fixup(struct denali_nand_info *denali)
+{
+	struct nand_chip *chip = &denali->nand;
+	struct mtd_info *mtd = nand_to_mtd(chip);
 
 	/*
-	 * scan for NAND devices attached to the controller
-	 * this is the first stage in a two step process to register
-	 * with the nand subsystem
+	 * Support for multi device:
+	 * When the IP configuration is x16 capable and two x8 chips are
+	 * connected in parallel, DEVICES_CONNECTED should be set to 2.
+	 * In this case, the core framework knows nothing about this fact,
+	 * so we should tell it the _logical_ pagesize and anything necessary.
 	 */
-	if (nand_scan_ident(mtd, denali->max_banks, NULL)) {
-		ret = -ENXIO;
-		goto fail;
-	}
+	denali->devs_per_cs = ioread32(denali->reg + DEVICES_CONNECTED);
 
-#ifdef CONFIG_SYS_NAND_USE_FLASH_BBT
-	/* check whether flash got BBT table (located at end of flash). As we
-	 * use NAND_BBT_NO_OOB, the BBT page will start with
-	 * bbt_pattern. We will have mirror pattern too */
-	denali->nand.bbt_options |= NAND_BBT_USE_FLASH;
 	/*
-	 * We are using main + spare with ECC support. As BBT need ECC support,
-	 * we need to ensure BBT code don't write to OOB for the BBT pattern.
-	 * All BBT info will be stored into data area with ECC support.
+	 * On some SoCs, DEVICES_CONNECTED is not auto-detected.
+	 * For those, DEVICES_CONNECTED is left to 0.  Set 1 if it is the case.
 	 */
-	denali->nand.bbt_options |= NAND_BBT_NO_OOB;
-#endif
+	if (denali->devs_per_cs == 0) {
+		denali->devs_per_cs = 1;
+		iowrite32(1, denali->reg + DEVICES_CONNECTED);
+	}
+
+	if (denali->devs_per_cs == 1)
+		return 0;
+
+	if (denali->devs_per_cs != 2) {
+		dev_err(denali->dev, "unsupported number of devices %d\n",
+			denali->devs_per_cs);
+		return -EINVAL;
+	}
+
+	/* 2 chips in parallel */
+	mtd->size <<= 1;
+	mtd->erasesize <<= 1;
+	mtd->writesize <<= 1;
+	mtd->oobsize <<= 1;
+	chip->chipsize <<= 1;
+	chip->page_shift += 1;
+	chip->phys_erase_shift += 1;
+	chip->bbt_erase_shift += 1;
+	chip->chip_shift += 1;
+	chip->pagemask <<= 1;
+	chip->ecc.size <<= 1;
+	chip->ecc.bytes <<= 1;
+	chip->ecc.strength <<= 1;
+	denali->oob_skip_bytes <<= 1;
+
+	return 0;
+}
+
+int denali_init(struct denali_nand_info *denali)
+{
+	struct nand_chip *chip = &denali->nand;
+	struct mtd_info *mtd = nand_to_mtd(chip);
+	u32 features = ioread32(denali->reg + FEATURES);
+	int ret;
+
+	denali_hw_init(denali);
+
+	denali_clear_irq_all(denali);
 
-	denali->nand.ecc.mode = NAND_ECC_HW;
-	denali->nand.ecc.size = CONFIG_NAND_DENALI_ECC_SIZE;
+	denali_reset_banks(denali);
+
+	denali->active_bank = DENALI_INVALID_BANK;
+
+	chip->flash_node = dev_of_offset(denali->dev);
+	/* Fallback to the default name if DT did not give "label" property */
+	if (!mtd->name)
+		mtd->name = "denali-nand";
+
+	chip->select_chip = denali_select_chip;
+	chip->read_byte = denali_read_byte;
+	chip->write_byte = denali_write_byte;
+	chip->read_word = denali_read_word;
+	chip->cmd_ctrl = denali_cmd_ctrl;
+	chip->dev_ready = denali_dev_ready;
+	chip->waitfunc = denali_waitfunc;
+
+	if (features & FEATURES__INDEX_ADDR) {
+		denali->host_read = denali_indexed_read;
+		denali->host_write = denali_indexed_write;
+	} else {
+		denali->host_read = denali_direct_read;
+		denali->host_write = denali_direct_write;
+	}
+
+	/* clk rate info is needed for setup_data_interface */
+	if (denali->clk_x_rate)
+		chip->setup_data_interface = denali_setup_data_interface;
+
+	ret = nand_scan_ident(mtd, denali->max_banks, NULL);
+	if (ret)
+		return ret;
+
+	if (ioread32(denali->reg + FEATURES) & FEATURES__DMA)
+		denali->dma_avail = 1;
+
+	if (denali->dma_avail) {
+		chip->buf_align = 16;
+		if (denali->caps & DENALI_CAP_DMA_64BIT)
+			denali->setup_dma = denali_setup_dma64;
+		else
+			denali->setup_dma = denali_setup_dma32;
+	} else {
+		chip->buf_align = 4;
+	}
+
+	chip->options |= NAND_USE_BOUNCE_BUFFER;
+	chip->bbt_options |= NAND_BBT_USE_FLASH;
+	chip->bbt_options |= NAND_BBT_NO_OOB;
+	denali->nand.ecc.mode = NAND_ECC_HW_SYNDROME;
 
 	/* no subpage writes on denali */
-	denali->nand.options |= NAND_NO_SUBPAGE_WRITE;
+	chip->options |= NAND_NO_SUBPAGE_WRITE;
 
-	/*
-	 * Tell driver the ecc strength. This register may be already set
-	 * correctly. So we read this value out.
-	 */
-	denali->nand.ecc.strength = readl(denali->flash_reg + ECC_CORRECTION);
-	switch (denali->nand.ecc.size) {
-	case 512:
-		denali->nand.ecc.bytes =
-			(denali->nand.ecc.strength * 13 + 15) / 16 * 2;
-		break;
-	case 1024:
-		denali->nand.ecc.bytes =
-			(denali->nand.ecc.strength * 14 + 15) / 16 * 2;
-		break;
-	default:
-		pr_err("Unsupported ECC size\n");
-		ret = -EINVAL;
-		goto fail;
+	ret = denali_ecc_setup(mtd, chip, denali);
+	if (ret) {
+		dev_err(denali->dev, "Failed to setup ECC settings.\n");
+		return ret;
 	}
+
+	dev_dbg(denali->dev,
+		"chosen ECC settings: step=%d, strength=%d, bytes=%d\n",
+		chip->ecc.size, chip->ecc.strength, chip->ecc.bytes);
+
+	iowrite32(FIELD_PREP(ECC_CORRECTION__ERASE_THRESHOLD, 1) |
+		  FIELD_PREP(ECC_CORRECTION__VALUE, chip->ecc.strength),
+		  denali->reg + ECC_CORRECTION);
+	iowrite32(mtd->erasesize / mtd->writesize,
+		  denali->reg + PAGES_PER_BLOCK);
+	iowrite32(chip->options & NAND_BUSWIDTH_16 ? 1 : 0,
+		  denali->reg + DEVICE_WIDTH);
+	iowrite32(chip->options & NAND_ROW_ADDR_3 ? 0 : TWO_ROW_ADDR_CYCLES__FLAG,
+		  denali->reg + TWO_ROW_ADDR_CYCLES);
+	iowrite32(mtd->writesize, denali->reg + DEVICE_MAIN_AREA_SIZE);
+	iowrite32(mtd->oobsize, denali->reg + DEVICE_SPARE_AREA_SIZE);
+
+	iowrite32(chip->ecc.size, denali->reg + CFG_DATA_BLOCK_SIZE);
+	iowrite32(chip->ecc.size, denali->reg + CFG_LAST_DATA_BLOCK_SIZE);
+	/* chip->ecc.steps is set by nand_scan_tail(); not available here */
+	iowrite32(mtd->writesize / chip->ecc.size,
+		  denali->reg + CFG_NUM_DATA_BLOCKS);
+
+	mtd_set_ooblayout(mtd, &denali_ooblayout_ops);
+
 	nand_oob.eccbytes = denali->nand.ecc.bytes;
 	denali->nand.ecc.layout = &nand_oob;
 
-	writel(mtd->erasesize / mtd->writesize,
-	       denali->flash_reg + PAGES_PER_BLOCK);
-	writel(denali->nand.options & NAND_BUSWIDTH_16 ? 1 : 0,
-	       denali->flash_reg + DEVICE_WIDTH);
-	writel(mtd->writesize,
-	       denali->flash_reg + DEVICE_MAIN_AREA_SIZE);
-	writel(mtd->oobsize,
-	       denali->flash_reg + DEVICE_SPARE_AREA_SIZE);
-	if (readl(denali->flash_reg + DEVICES_CONNECTED) == 0)
-		writel(1, denali->flash_reg + DEVICES_CONNECTED);
-
-	/* override the default operations */
-	denali->nand.ecc.read_page = denali_read_page;
-	denali->nand.ecc.read_page_raw = denali_read_page_raw;
-	denali->nand.ecc.write_page = denali_write_page;
-	denali->nand.ecc.write_page_raw = denali_write_page_raw;
-	denali->nand.ecc.read_oob = denali_read_oob;
-	denali->nand.ecc.write_oob = denali_write_oob;
-
-	if (nand_scan_tail(mtd)) {
-		ret = -ENXIO;
-		goto fail;
+	if (chip->options & NAND_BUSWIDTH_16) {
+		chip->read_buf = denali_read_buf16;
+		chip->write_buf = denali_write_buf16;
+	} else {
+		chip->read_buf = denali_read_buf;
+		chip->write_buf = denali_write_buf;
 	}
+	chip->ecc.options |= NAND_ECC_CUSTOM_PAGE_ACCESS;
+	chip->ecc.read_page = denali_read_page;
+	chip->ecc.read_page_raw = denali_read_page_raw;
+	chip->ecc.write_page = denali_write_page;
+	chip->ecc.write_page_raw = denali_write_page_raw;
+	chip->ecc.read_oob = denali_read_oob;
+	chip->ecc.write_oob = denali_write_oob;
+	chip->erase = denali_erase;
+
+	ret = denali_multidev_fixup(denali);
+	if (ret)
+		return ret;
+
+	/*
+	 * This buffer is DMA-mapped by denali_{read,write}_page_raw.  Do not
+	 * use devm_kmalloc() because the memory allocated by devm_ does not
+	 * guarantee DMA-safe alignment.
+	 */
+	denali->buf = kmalloc(mtd->writesize + mtd->oobsize, GFP_KERNEL);
+	if (!denali->buf)
+		return -ENOMEM;
+
+	ret = nand_scan_tail(mtd);
+	if (ret)
+		goto free_buf;
 
 	ret = nand_register(0, mtd);
+	if (ret) {
+		dev_err(denali->dev, "Failed to register MTD: %d\n", ret);
+		goto free_buf;
+	}
+	return 0;
+
+free_buf:
+	kfree(denali->buf);
 
-fail:
 	return ret;
 }
 
@@ -1289,8 +1380,8 @@ static int __board_nand_init(void)
 	 * In the future, these base addresses should be taken from
 	 * Device Tree or platform data.
 	 */
-	denali->flash_reg = (void  __iomem *)CONFIG_SYS_NAND_REGS_BASE;
-	denali->flash_mem = (void  __iomem *)CONFIG_SYS_NAND_DATA_BASE;
+	denali->reg = (void  __iomem *)CONFIG_SYS_NAND_REGS_BASE;
+	denali->host = (void  __iomem *)CONFIG_SYS_NAND_DATA_BASE;
 
 	return denali_init(denali);
 }
diff --git a/drivers/mtd/nand/denali.h b/drivers/mtd/nand/denali.h
index f796f0dad1..04b4ae2683 100644
--- a/drivers/mtd/nand/denali.h
+++ b/drivers/mtd/nand/denali.h
@@ -8,466 +8,319 @@
 #ifndef __DENALI_H__
 #define __DENALI_H__
 
+#include <linux/bitops.h>
 #include <linux/mtd/nand.h>
+#include <linux/types.h>
 
 #define DEVICE_RESET				0x0
-#define     DEVICE_RESET__BANK0				0x0001
-#define     DEVICE_RESET__BANK1				0x0002
-#define     DEVICE_RESET__BANK2				0x0004
-#define     DEVICE_RESET__BANK3				0x0008
+#define     DEVICE_RESET__BANK(bank)			BIT(bank)
 
 #define TRANSFER_SPARE_REG			0x10
-#define     TRANSFER_SPARE_REG__FLAG			0x0001
+#define     TRANSFER_SPARE_REG__FLAG			BIT(0)
 
 #define LOAD_WAIT_CNT				0x20
-#define     LOAD_WAIT_CNT__VALUE			0xffff
+#define     LOAD_WAIT_CNT__VALUE			GENMASK(15, 0)
 
 #define PROGRAM_WAIT_CNT			0x30
-#define     PROGRAM_WAIT_CNT__VALUE			0xffff
+#define     PROGRAM_WAIT_CNT__VALUE			GENMASK(15, 0)
 
 #define ERASE_WAIT_CNT				0x40
-#define     ERASE_WAIT_CNT__VALUE			0xffff
+#define     ERASE_WAIT_CNT__VALUE			GENMASK(15, 0)
 
 #define INT_MON_CYCCNT				0x50
-#define     INT_MON_CYCCNT__VALUE			0xffff
+#define     INT_MON_CYCCNT__VALUE			GENMASK(15, 0)
 
 #define RB_PIN_ENABLED				0x60
-#define     RB_PIN_ENABLED__BANK0			0x0001
-#define     RB_PIN_ENABLED__BANK1			0x0002
-#define     RB_PIN_ENABLED__BANK2			0x0004
-#define     RB_PIN_ENABLED__BANK3			0x0008
+#define     RB_PIN_ENABLED__BANK(bank)			BIT(bank)
 
 #define MULTIPLANE_OPERATION			0x70
-#define     MULTIPLANE_OPERATION__FLAG			0x0001
+#define     MULTIPLANE_OPERATION__FLAG			BIT(0)
 
 #define MULTIPLANE_READ_ENABLE			0x80
-#define     MULTIPLANE_READ_ENABLE__FLAG		0x0001
+#define     MULTIPLANE_READ_ENABLE__FLAG		BIT(0)
 
 #define COPYBACK_DISABLE			0x90
-#define     COPYBACK_DISABLE__FLAG			0x0001
+#define     COPYBACK_DISABLE__FLAG			BIT(0)
 
 #define CACHE_WRITE_ENABLE			0xa0
-#define     CACHE_WRITE_ENABLE__FLAG			0x0001
+#define     CACHE_WRITE_ENABLE__FLAG			BIT(0)
 
 #define CACHE_READ_ENABLE			0xb0
-#define     CACHE_READ_ENABLE__FLAG			0x0001
+#define     CACHE_READ_ENABLE__FLAG			BIT(0)
 
 #define PREFETCH_MODE				0xc0
-#define     PREFETCH_MODE__PREFETCH_EN			0x0001
-#define     PREFETCH_MODE__PREFETCH_BURST_LENGTH	0xfff0
+#define     PREFETCH_MODE__PREFETCH_EN			BIT(0)
+#define     PREFETCH_MODE__PREFETCH_BURST_LENGTH	GENMASK(15, 4)
 
 #define CHIP_ENABLE_DONT_CARE			0xd0
-#define     CHIP_EN_DONT_CARE__FLAG			0x01
+#define     CHIP_EN_DONT_CARE__FLAG			BIT(0)
 
 #define ECC_ENABLE				0xe0
-#define     ECC_ENABLE__FLAG				0x0001
+#define     ECC_ENABLE__FLAG				BIT(0)
 
 #define GLOBAL_INT_ENABLE			0xf0
-#define     GLOBAL_INT_EN_FLAG				0x01
+#define     GLOBAL_INT_EN_FLAG				BIT(0)
 
-#define WE_2_RE					0x100
-#define     WE_2_RE__VALUE				0x003f
+#define TWHR2_AND_WE_2_RE			0x100
+#define     TWHR2_AND_WE_2_RE__WE_2_RE			GENMASK(5, 0)
+#define     TWHR2_AND_WE_2_RE__TWHR2			GENMASK(13, 8)
 
-#define ADDR_2_DATA				0x110
-#define     ADDR_2_DATA__VALUE				0x003f
+#define TCWAW_AND_ADDR_2_DATA			0x110
+/* The width of ADDR_2_DATA is 6 bit for old IP, 7 bit for new IP */
+#define     TCWAW_AND_ADDR_2_DATA__ADDR_2_DATA		GENMASK(6, 0)
+#define     TCWAW_AND_ADDR_2_DATA__TCWAW		GENMASK(13, 8)
 
 #define RE_2_WE					0x120
-#define     RE_2_WE__VALUE				0x003f
+#define     RE_2_WE__VALUE				GENMASK(5, 0)
 
 #define ACC_CLKS				0x130
-#define     ACC_CLKS__VALUE				0x000f
+#define     ACC_CLKS__VALUE				GENMASK(3, 0)
 
 #define NUMBER_OF_PLANES			0x140
-#define     NUMBER_OF_PLANES__VALUE			0x0007
+#define     NUMBER_OF_PLANES__VALUE			GENMASK(2, 0)
 
 #define PAGES_PER_BLOCK				0x150
-#define     PAGES_PER_BLOCK__VALUE			0xffff
+#define     PAGES_PER_BLOCK__VALUE			GENMASK(15, 0)
 
 #define DEVICE_WIDTH				0x160
-#define     DEVICE_WIDTH__VALUE				0x0003
+#define     DEVICE_WIDTH__VALUE				GENMASK(1, 0)
 
 #define DEVICE_MAIN_AREA_SIZE			0x170
-#define     DEVICE_MAIN_AREA_SIZE__VALUE		0xffff
+#define     DEVICE_MAIN_AREA_SIZE__VALUE		GENMASK(15, 0)
 
 #define DEVICE_SPARE_AREA_SIZE			0x180
-#define     DEVICE_SPARE_AREA_SIZE__VALUE		0xffff
+#define     DEVICE_SPARE_AREA_SIZE__VALUE		GENMASK(15, 0)
 
 #define TWO_ROW_ADDR_CYCLES			0x190
-#define     TWO_ROW_ADDR_CYCLES__FLAG			0x0001
+#define     TWO_ROW_ADDR_CYCLES__FLAG			BIT(0)
 
 #define MULTIPLANE_ADDR_RESTRICT		0x1a0
-#define     MULTIPLANE_ADDR_RESTRICT__FLAG		0x0001
+#define     MULTIPLANE_ADDR_RESTRICT__FLAG		BIT(0)
 
 #define ECC_CORRECTION				0x1b0
-#define     ECC_CORRECTION__VALUE			0x001f
+#define     ECC_CORRECTION__VALUE			GENMASK(4, 0)
+#define     ECC_CORRECTION__ERASE_THRESHOLD		GENMASK(31, 16)
 
 #define READ_MODE				0x1c0
-#define     READ_MODE__VALUE				0x000f
+#define     READ_MODE__VALUE				GENMASK(3, 0)
 
 #define WRITE_MODE				0x1d0
-#define     WRITE_MODE__VALUE				0x000f
+#define     WRITE_MODE__VALUE				GENMASK(3, 0)
 
 #define COPYBACK_MODE				0x1e0
-#define     COPYBACK_MODE__VALUE			0x000f
+#define     COPYBACK_MODE__VALUE			GENMASK(3, 0)
 
 #define RDWR_EN_LO_CNT				0x1f0
-#define     RDWR_EN_LO_CNT__VALUE			0x001f
+#define     RDWR_EN_LO_CNT__VALUE			GENMASK(4, 0)
 
 #define RDWR_EN_HI_CNT				0x200
-#define     RDWR_EN_HI_CNT__VALUE			0x001f
+#define     RDWR_EN_HI_CNT__VALUE			GENMASK(4, 0)
 
 #define MAX_RD_DELAY				0x210
-#define     MAX_RD_DELAY__VALUE				0x000f
+#define     MAX_RD_DELAY__VALUE				GENMASK(3, 0)
 
 #define CS_SETUP_CNT				0x220
-#define     CS_SETUP_CNT__VALUE				0x001f
+#define     CS_SETUP_CNT__VALUE				GENMASK(4, 0)
+#define     CS_SETUP_CNT__TWB				GENMASK(17, 12)
 
 #define SPARE_AREA_SKIP_BYTES			0x230
-#define     SPARE_AREA_SKIP_BYTES__VALUE		0x003f
+#define     SPARE_AREA_SKIP_BYTES__VALUE		GENMASK(5, 0)
 
 #define SPARE_AREA_MARKER			0x240
-#define     SPARE_AREA_MARKER__VALUE			0xffff
+#define     SPARE_AREA_MARKER__VALUE			GENMASK(15, 0)
 
 #define DEVICES_CONNECTED			0x250
-#define     DEVICES_CONNECTED__VALUE			0x0007
+#define     DEVICES_CONNECTED__VALUE			GENMASK(2, 0)
 
 #define DIE_MASK				0x260
-#define     DIE_MASK__VALUE				0x00ff
+#define     DIE_MASK__VALUE				GENMASK(7, 0)
 
 #define FIRST_BLOCK_OF_NEXT_PLANE		0x270
-#define     FIRST_BLOCK_OF_NEXT_PLANE__VALUE		0xffff
+#define     FIRST_BLOCK_OF_NEXT_PLANE__VALUE		GENMASK(15, 0)
 
 #define WRITE_PROTECT				0x280
-#define     WRITE_PROTECT__FLAG				0x0001
+#define     WRITE_PROTECT__FLAG				BIT(0)
 
 #define RE_2_RE					0x290
-#define     RE_2_RE__VALUE				0x003f
+#define     RE_2_RE__VALUE				GENMASK(5, 0)
 
 #define MANUFACTURER_ID				0x300
-#define     MANUFACTURER_ID__VALUE			0x00ff
+#define     MANUFACTURER_ID__VALUE			GENMASK(7, 0)
 
 #define DEVICE_ID				0x310
-#define     DEVICE_ID__VALUE				0x00ff
+#define     DEVICE_ID__VALUE				GENMASK(7, 0)
 
 #define DEVICE_PARAM_0				0x320
-#define     DEVICE_PARAM_0__VALUE			0x00ff
+#define     DEVICE_PARAM_0__VALUE			GENMASK(7, 0)
 
 #define DEVICE_PARAM_1				0x330
-#define     DEVICE_PARAM_1__VALUE			0x00ff
+#define     DEVICE_PARAM_1__VALUE			GENMASK(7, 0)
 
 #define DEVICE_PARAM_2				0x340
-#define     DEVICE_PARAM_2__VALUE			0x00ff
+#define     DEVICE_PARAM_2__VALUE			GENMASK(7, 0)
 
 #define LOGICAL_PAGE_DATA_SIZE			0x350
-#define     LOGICAL_PAGE_DATA_SIZE__VALUE		0xffff
+#define     LOGICAL_PAGE_DATA_SIZE__VALUE		GENMASK(15, 0)
 
 #define LOGICAL_PAGE_SPARE_SIZE			0x360
-#define     LOGICAL_PAGE_SPARE_SIZE__VALUE		0xffff
+#define     LOGICAL_PAGE_SPARE_SIZE__VALUE		GENMASK(15, 0)
 
 #define REVISION				0x370
-#define     REVISION__VALUE				0xffff
+#define     REVISION__VALUE				GENMASK(15, 0)
 
 #define ONFI_DEVICE_FEATURES			0x380
-#define     ONFI_DEVICE_FEATURES__VALUE			0x003f
+#define     ONFI_DEVICE_FEATURES__VALUE			GENMASK(5, 0)
 
 #define ONFI_OPTIONAL_COMMANDS			0x390
-#define     ONFI_OPTIONAL_COMMANDS__VALUE		0x003f
+#define     ONFI_OPTIONAL_COMMANDS__VALUE		GENMASK(5, 0)
 
 #define ONFI_TIMING_MODE			0x3a0
-#define     ONFI_TIMING_MODE__VALUE			0x003f
+#define     ONFI_TIMING_MODE__VALUE			GENMASK(5, 0)
 
 #define ONFI_PGM_CACHE_TIMING_MODE		0x3b0
-#define     ONFI_PGM_CACHE_TIMING_MODE__VALUE		0x003f
+#define     ONFI_PGM_CACHE_TIMING_MODE__VALUE		GENMASK(5, 0)
 
 #define ONFI_DEVICE_NO_OF_LUNS			0x3c0
-#define     ONFI_DEVICE_NO_OF_LUNS__NO_OF_LUNS		0x00ff
-#define     ONFI_DEVICE_NO_OF_LUNS__ONFI_DEVICE		0x0100
+#define     ONFI_DEVICE_NO_OF_LUNS__NO_OF_LUNS		GENMASK(7, 0)
+#define     ONFI_DEVICE_NO_OF_LUNS__ONFI_DEVICE		BIT(8)
 
 #define ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_L	0x3d0
-#define     ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_L__VALUE	0xffff
+#define     ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_L__VALUE	GENMASK(15, 0)
 
 #define ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_U	0x3e0
-#define     ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_U__VALUE	0xffff
-
-#define FEATURES					0x3f0
-#define     FEATURES__N_BANKS				0x0003
-#define     FEATURES__ECC_MAX_ERR			0x003c
-#define     FEATURES__DMA				0x0040
-#define     FEATURES__CMD_DMA				0x0080
-#define     FEATURES__PARTITION				0x0100
-#define     FEATURES__XDMA_SIDEBAND			0x0200
-#define     FEATURES__GPREG				0x0400
-#define     FEATURES__INDEX_ADDR			0x0800
+#define     ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_U__VALUE	GENMASK(15, 0)
+
+#define FEATURES				0x3f0
+#define     FEATURES__N_BANKS				GENMASK(1, 0)
+#define     FEATURES__ECC_MAX_ERR			GENMASK(5, 2)
+#define     FEATURES__DMA				BIT(6)
+#define     FEATURES__CMD_DMA				BIT(7)
+#define     FEATURES__PARTITION				BIT(8)
+#define     FEATURES__XDMA_SIDEBAND			BIT(9)
+#define     FEATURES__GPREG				BIT(10)
+#define     FEATURES__INDEX_ADDR			BIT(11)
 
 #define TRANSFER_MODE				0x400
-#define     TRANSFER_MODE__VALUE			0x0003
-
-#define INTR_STATUS(__bank)	(0x410 + ((__bank) * 0x50))
-#define INTR_EN(__bank)		(0x420 + ((__bank) * 0x50))
-
-/*
- * Some versions of the IP have the ECC fixup handled in hardware.  In this
- * configuration we only get interrupted when the error is uncorrectable.
- * Unfortunately this bit replaces INTR_STATUS__ECC_TRANSACTION_DONE from the
- * old IP.
- */
-#define     INTR_STATUS__ECC_UNCOR_ERR			0x0001
-#define     INTR_STATUS__ECC_TRANSACTION_DONE		0x0001
-#define     INTR_STATUS__ECC_ERR			0x0002
-#define     INTR_STATUS__DMA_CMD_COMP			0x0004
-#define     INTR_STATUS__TIME_OUT			0x0008
-#define     INTR_STATUS__PROGRAM_FAIL			0x0010
-#define     INTR_STATUS__ERASE_FAIL			0x0020
-#define     INTR_STATUS__LOAD_COMP			0x0040
-#define     INTR_STATUS__PROGRAM_COMP			0x0080
-#define     INTR_STATUS__ERASE_COMP			0x0100
-#define     INTR_STATUS__PIPE_CPYBCK_CMD_COMP		0x0200
-#define     INTR_STATUS__LOCKED_BLK			0x0400
-#define     INTR_STATUS__UNSUP_CMD			0x0800
-#define     INTR_STATUS__INT_ACT			0x1000
-#define     INTR_STATUS__RST_COMP			0x2000
-#define     INTR_STATUS__PIPE_CMD_ERR			0x4000
-#define     INTR_STATUS__PAGE_XFER_INC			0x8000
-
-#define     INTR_EN__ECC_TRANSACTION_DONE		0x0001
-#define     INTR_EN__ECC_ERR				0x0002
-#define     INTR_EN__DMA_CMD_COMP			0x0004
-#define     INTR_EN__TIME_OUT				0x0008
-#define     INTR_EN__PROGRAM_FAIL			0x0010
-#define     INTR_EN__ERASE_FAIL				0x0020
-#define     INTR_EN__LOAD_COMP				0x0040
-#define     INTR_EN__PROGRAM_COMP			0x0080
-#define     INTR_EN__ERASE_COMP				0x0100
-#define     INTR_EN__PIPE_CPYBCK_CMD_COMP		0x0200
-#define     INTR_EN__LOCKED_BLK				0x0400
-#define     INTR_EN__UNSUP_CMD				0x0800
-#define     INTR_EN__INT_ACT				0x1000
-#define     INTR_EN__RST_COMP				0x2000
-#define     INTR_EN__PIPE_CMD_ERR			0x4000
-#define     INTR_EN__PAGE_XFER_INC			0x8000
-
-#define PAGE_CNT(__bank)	(0x430 + ((__bank) * 0x50))
-#define ERR_PAGE_ADDR(__bank)	(0x440 + ((__bank) * 0x50))
-#define ERR_BLOCK_ADDR(__bank)	(0x450 + ((__bank) * 0x50))
-
-#define DATA_INTR				0x550
-#define     DATA_INTR__WRITE_SPACE_AV			0x0001
-#define     DATA_INTR__READ_DATA_AV			0x0002
-
-#define DATA_INTR_EN				0x560
-#define     DATA_INTR_EN__WRITE_SPACE_AV		0x0001
-#define     DATA_INTR_EN__READ_DATA_AV			0x0002
-
-#define GPREG_0					0x570
-#define     GPREG_0__VALUE				0xffff
-
-#define GPREG_1					0x580
-#define     GPREG_1__VALUE				0xffff
-
-#define GPREG_2					0x590
-#define     GPREG_2__VALUE				0xffff
-
-#define GPREG_3					0x5a0
-#define     GPREG_3__VALUE				0xffff
+#define     TRANSFER_MODE__VALUE			GENMASK(1, 0)
+
+#define INTR_STATUS(bank)			(0x410 + (bank) * 0x50)
+#define INTR_EN(bank)				(0x420 + (bank) * 0x50)
+/* bit[1:0] is used differently depending on IP version */
+#define     INTR__ECC_UNCOR_ERR				BIT(0)	/* new IP */
+#define     INTR__ECC_TRANSACTION_DONE			BIT(0)	/* old IP */
+#define     INTR__ECC_ERR				BIT(1)	/* old IP */
+#define     INTR__DMA_CMD_COMP				BIT(2)
+#define     INTR__TIME_OUT				BIT(3)
+#define     INTR__PROGRAM_FAIL				BIT(4)
+#define     INTR__ERASE_FAIL				BIT(5)
+#define     INTR__LOAD_COMP				BIT(6)
+#define     INTR__PROGRAM_COMP				BIT(7)
+#define     INTR__ERASE_COMP				BIT(8)
+#define     INTR__PIPE_CPYBCK_CMD_COMP			BIT(9)
+#define     INTR__LOCKED_BLK				BIT(10)
+#define     INTR__UNSUP_CMD				BIT(11)
+#define     INTR__INT_ACT				BIT(12)
+#define     INTR__RST_COMP				BIT(13)
+#define     INTR__PIPE_CMD_ERR				BIT(14)
+#define     INTR__PAGE_XFER_INC				BIT(15)
+#define     INTR__ERASED_PAGE				BIT(16)
+
+#define PAGE_CNT(bank)				(0x430 + (bank) * 0x50)
+#define ERR_PAGE_ADDR(bank)			(0x440 + (bank) * 0x50)
+#define ERR_BLOCK_ADDR(bank)			(0x450 + (bank) * 0x50)
 
 #define ECC_THRESHOLD				0x600
-#define     ECC_THRESHOLD__VALUE			0x03ff
+#define     ECC_THRESHOLD__VALUE			GENMASK(9, 0)
 
 #define ECC_ERROR_BLOCK_ADDRESS			0x610
-#define     ECC_ERROR_BLOCK_ADDRESS__VALUE		0xffff
+#define     ECC_ERROR_BLOCK_ADDRESS__VALUE		GENMASK(15, 0)
 
 #define ECC_ERROR_PAGE_ADDRESS			0x620
-#define     ECC_ERROR_PAGE_ADDRESS__VALUE		0x0fff
-#define     ECC_ERROR_PAGE_ADDRESS__BANK		0xf000
+#define     ECC_ERROR_PAGE_ADDRESS__VALUE		GENMASK(11, 0)
+#define     ECC_ERROR_PAGE_ADDRESS__BANK		GENMASK(15, 12)
 
 #define ECC_ERROR_ADDRESS			0x630
-#define     ECC_ERROR_ADDRESS__OFFSET			0x0fff
-#define     ECC_ERROR_ADDRESS__SECTOR_NR		0xf000
+#define     ECC_ERROR_ADDRESS__OFFSET			GENMASK(11, 0)
+#define     ECC_ERROR_ADDRESS__SECTOR			GENMASK(15, 12)
 
 #define ERR_CORRECTION_INFO			0x640
-#define     ERR_CORRECTION_INFO__BYTEMASK		0x00ff
-#define     ERR_CORRECTION_INFO__DEVICE_NR		0x0f00
-#define     ERR_CORRECTION_INFO__ERROR_TYPE		0x4000
-#define     ERR_CORRECTION_INFO__LAST_ERR_INFO		0x8000
+#define     ERR_CORRECTION_INFO__BYTE			GENMASK(7, 0)
+#define     ERR_CORRECTION_INFO__DEVICE			GENMASK(11, 8)
+#define     ERR_CORRECTION_INFO__UNCOR			BIT(14)
+#define     ERR_CORRECTION_INFO__LAST_ERR		BIT(15)
+
+#define ECC_COR_INFO(bank)			(0x650 + (bank) / 2 * 0x10)
+#define     ECC_COR_INFO__SHIFT(bank)			((bank) % 2 * 8)
+#define     ECC_COR_INFO__MAX_ERRORS			GENMASK(6, 0)
+#define     ECC_COR_INFO__UNCOR_ERR			BIT(7)
+
+#define CFG_DATA_BLOCK_SIZE			0x6b0
+
+#define CFG_LAST_DATA_BLOCK_SIZE		0x6c0
+
+#define CFG_NUM_DATA_BLOCKS			0x6d0
+
+#define CFG_META_DATA_SIZE			0x6e0
 
 #define DMA_ENABLE				0x700
-#define     DMA_ENABLE__FLAG				0x0001
+#define     DMA_ENABLE__FLAG				BIT(0)
 
 #define IGNORE_ECC_DONE				0x710
-#define     IGNORE_ECC_DONE__FLAG			0x0001
+#define     IGNORE_ECC_DONE__FLAG			BIT(0)
 
 #define DMA_INTR				0x720
-#define     DMA_INTR__TARGET_ERROR			0x0001
-#define     DMA_INTR__DESC_COMP_CHANNEL0		0x0002
-#define     DMA_INTR__DESC_COMP_CHANNEL1		0x0004
-#define     DMA_INTR__DESC_COMP_CHANNEL2		0x0008
-#define     DMA_INTR__DESC_COMP_CHANNEL3		0x0010
-#define     DMA_INTR__MEMCOPY_DESC_COMP		0x0020
-
 #define DMA_INTR_EN				0x730
-#define     DMA_INTR_EN__TARGET_ERROR			0x0001
-#define     DMA_INTR_EN__DESC_COMP_CHANNEL0		0x0002
-#define     DMA_INTR_EN__DESC_COMP_CHANNEL1		0x0004
-#define     DMA_INTR_EN__DESC_COMP_CHANNEL2		0x0008
-#define     DMA_INTR_EN__DESC_COMP_CHANNEL3		0x0010
-#define     DMA_INTR_EN__MEMCOPY_DESC_COMP		0x0020
+#define     DMA_INTR__TARGET_ERROR			BIT(0)
+#define     DMA_INTR__DESC_COMP_CHANNEL0		BIT(1)
+#define     DMA_INTR__DESC_COMP_CHANNEL1		BIT(2)
+#define     DMA_INTR__DESC_COMP_CHANNEL2		BIT(3)
+#define     DMA_INTR__DESC_COMP_CHANNEL3		BIT(4)
+#define     DMA_INTR__MEMCOPY_DESC_COMP			BIT(5)
 
 #define TARGET_ERR_ADDR_LO			0x740
-#define     TARGET_ERR_ADDR_LO__VALUE			0xffff
+#define     TARGET_ERR_ADDR_LO__VALUE			GENMASK(15, 0)
 
 #define TARGET_ERR_ADDR_HI			0x750
-#define     TARGET_ERR_ADDR_HI__VALUE			0xffff
+#define     TARGET_ERR_ADDR_HI__VALUE			GENMASK(15, 0)
 
 #define CHNL_ACTIVE				0x760
-#define     CHNL_ACTIVE__CHANNEL0			0x0001
-#define     CHNL_ACTIVE__CHANNEL1			0x0002
-#define     CHNL_ACTIVE__CHANNEL2			0x0004
-#define     CHNL_ACTIVE__CHANNEL3			0x0008
-
-#define ACTIVE_SRC_ID				0x800
-#define     ACTIVE_SRC_ID__VALUE			0x00ff
-
-#define PTN_INTR					0x810
-#define     PTN_INTR__CONFIG_ERROR			0x0001
-#define     PTN_INTR__ACCESS_ERROR_BANK0		0x0002
-#define     PTN_INTR__ACCESS_ERROR_BANK1		0x0004
-#define     PTN_INTR__ACCESS_ERROR_BANK2		0x0008
-#define     PTN_INTR__ACCESS_ERROR_BANK3		0x0010
-#define     PTN_INTR__REG_ACCESS_ERROR			0x0020
-
-#define PTN_INTR_EN				0x820
-#define     PTN_INTR_EN__CONFIG_ERROR			0x0001
-#define     PTN_INTR_EN__ACCESS_ERROR_BANK0		0x0002
-#define     PTN_INTR_EN__ACCESS_ERROR_BANK1		0x0004
-#define     PTN_INTR_EN__ACCESS_ERROR_BANK2		0x0008
-#define     PTN_INTR_EN__ACCESS_ERROR_BANK3		0x0010
-#define     PTN_INTR_EN__REG_ACCESS_ERROR		0x0020
-
-#define PERM_SRC_ID(__bank)	(0x830 + ((__bank) * 0x40))
-#define     PERM_SRC_ID__SRCID				0x00ff
-#define     PERM_SRC_ID__DIRECT_ACCESS_ACTIVE		0x0800
-#define     PERM_SRC_ID__WRITE_ACTIVE			0x2000
-#define     PERM_SRC_ID__READ_ACTIVE			0x4000
-#define     PERM_SRC_ID__PARTITION_VALID		0x8000
-
-#define MIN_BLK_ADDR(__bank)	(0x840 + ((__bank) * 0x40))
-#define     MIN_BLK_ADDR__VALUE				0xffff
-
-#define MAX_BLK_ADDR(__bank)	(0x850 + ((__bank) * 0x40))
-#define     MAX_BLK_ADDR__VALUE				0xffff
-
-#define MIN_MAX_BANK(__bank)	(0x860 + ((__bank) * 0x40))
-#define     MIN_MAX_BANK__MIN_VALUE			0x0003
-#define     MIN_MAX_BANK__MAX_VALUE			0x000c
-
-/* lld.h */
-#define GOOD_BLOCK 0
-#define DEFECTIVE_BLOCK 1
-#define READ_ERROR 2
-
-#define CLK_X  5
-#define CLK_MULTI 4
-
-/* spectraswconfig.h */
-#define CMD_DMA 0
-
-#define SPECTRA_PARTITION_ID    0
-/**** Block Table and Reserved Block Parameters *****/
-#define SPECTRA_START_BLOCK     3
-#define NUM_FREE_BLOCKS_GATE    30
-
-/* KBV - Updated to LNW scratch register address */
-#define SCRATCH_REG_ADDR    CONFIG_MTD_NAND_DENALI_SCRATCH_REG_ADDR
-#define SCRATCH_REG_SIZE    64
-
-#define GLOB_HWCTL_DEFAULT_BLKS    2048
-
-#define CUSTOM_CONF_PARAMS      0
-
-#define INDEX_CTRL_REG    0x0
-#define INDEX_DATA_REG    0x10
-
-#define MODE_00    0x00000000
-#define MODE_01    0x04000000
-#define MODE_10    0x08000000
-#define MODE_11    0x0C000000
-
-
-#define DATA_TRANSFER_MODE              0
-#define PROTECTION_PER_BLOCK            1
-#define LOAD_WAIT_COUNT                 2
-#define PROGRAM_WAIT_COUNT              3
-#define ERASE_WAIT_COUNT                4
-#define INT_MONITOR_CYCLE_COUNT         5
-#define READ_BUSY_PIN_ENABLED           6
-#define MULTIPLANE_OPERATION_SUPPORT    7
-#define PRE_FETCH_MODE                  8
-#define CE_DONT_CARE_SUPPORT            9
-#define COPYBACK_SUPPORT                10
-#define CACHE_WRITE_SUPPORT             11
-#define CACHE_READ_SUPPORT              12
-#define NUM_PAGES_IN_BLOCK              13
-#define ECC_ENABLE_SELECT               14
-#define WRITE_ENABLE_2_READ_ENABLE      15
-#define ADDRESS_2_DATA                  16
-#define READ_ENABLE_2_WRITE_ENABLE      17
-#define TWO_ROW_ADDRESS_CYCLES          18
-#define MULTIPLANE_ADDRESS_RESTRICT     19
-#define ACC_CLOCKS                      20
-#define READ_WRITE_ENABLE_LOW_COUNT     21
-#define READ_WRITE_ENABLE_HIGH_COUNT    22
-
-#define ECC_SECTOR_SIZE     512
-
-#define DENALI_BUF_SIZE		(NAND_MAX_PAGESIZE + NAND_MAX_OOBSIZE)
-
-struct nand_buf {
-	int head;
-	int tail;
-	/* seprating dma_buf as buf can be used for status read purpose */
-	uint8_t dma_buf[DENALI_BUF_SIZE]  __aligned(64);
-	uint8_t buf[DENALI_BUF_SIZE];
-};
+#define     CHNL_ACTIVE__CHANNEL0			BIT(0)
+#define     CHNL_ACTIVE__CHANNEL1			BIT(1)
+#define     CHNL_ACTIVE__CHANNEL2			BIT(2)
+#define     CHNL_ACTIVE__CHANNEL3			BIT(3)
 
-#define INTEL_CE4100	1
-#define INTEL_MRST	2
-#define DT		3
+struct udevice;
 
 struct denali_nand_info {
 	struct nand_chip nand;
 	unsigned long clk_x_rate;	/* bus interface clock rate */
-	int flash_bank; /* currently selected chip */
-	int status;
-	int platform;
-	struct nand_buf buf;
-	struct device *dev;
-	int total_used_banks;
-	uint32_t block;  /* stored for future use */
+	int active_bank;		/* currently selected bank */
+	struct udevice *dev;
 	uint32_t page;
-	void __iomem *flash_reg;  /* Mapped io reg base address */
-	void __iomem *flash_mem;  /* Mapped io reg base address */
-
-	/* elements used by ISR */
-	/*struct completion complete;*/
-
-	uint32_t irq_status;
-	int irq_debug_array[32];
-	int idx;
+	void __iomem *reg;		/* Register Interface */
+	void __iomem *host;		/* Host Data/Command Interface */
+	u32 irq_mask;			/* interrupts we are waiting for */
+	u32 irq_status;			/* interrupts that have happened */
 	int irq;
-
-	uint32_t devnum;	/* represent how many nands connected */
-	uint32_t fwblks; /* represent how many blocks FW used */
-	uint32_t totalblks;
-	uint32_t blksperchip;
-	uint32_t bbtskipbytes;
-	uint32_t max_banks;
-	unsigned int revision;
-	unsigned int caps;
+	void *buf;			/* for syndrome layout conversion */
+	dma_addr_t dma_addr;
+	int dma_avail;			/* can support DMA? */
+	int devs_per_cs;		/* devices connected in parallel */
+	int oob_skip_bytes;		/* number of bytes reserved for BBM */
+	int max_banks;
+	unsigned int revision;		/* IP revision */
+	unsigned int caps;		/* IP capability (or quirk) */
+	const struct nand_ecc_caps *ecc_caps;
+	u32 (*host_read)(struct denali_nand_info *denali, u32 addr);
+	void (*host_write)(struct denali_nand_info *denali, u32 addr, u32 data);
+	void (*setup_dma)(struct denali_nand_info *denali, dma_addr_t dma_addr,
+			  int page, int write);
 };
 
 #define DENALI_CAP_HW_ECC_FIXUP			BIT(0)
 #define DENALI_CAP_DMA_64BIT			BIT(1)
 
+int denali_calc_ecc_bytes(int step_size, int strength);
 int denali_init(struct denali_nand_info *denali);
 
 #endif /* __DENALI_H__ */
diff --git a/drivers/mtd/nand/denali_dt.c b/drivers/mtd/nand/denali_dt.c
index 805c066b40..9d6cb09b42 100644
--- a/drivers/mtd/nand/denali_dt.c
+++ b/drivers/mtd/nand/denali_dt.c
@@ -16,21 +16,31 @@
 struct denali_dt_data {
 	unsigned int revision;
 	unsigned int caps;
+	const struct nand_ecc_caps *ecc_caps;
 };
 
+NAND_ECC_CAPS_SINGLE(denali_socfpga_ecc_caps, denali_calc_ecc_bytes,
+		     512, 8, 15);
 static const struct denali_dt_data denali_socfpga_data = {
 	.caps = DENALI_CAP_HW_ECC_FIXUP,
+	.ecc_caps = &denali_socfpga_ecc_caps,
 };
 
+NAND_ECC_CAPS_SINGLE(denali_uniphier_v5a_ecc_caps, denali_calc_ecc_bytes,
+		     1024, 8, 16, 24);
 static const struct denali_dt_data denali_uniphier_v5a_data = {
 	.caps = DENALI_CAP_HW_ECC_FIXUP |
 		DENALI_CAP_DMA_64BIT,
+	.ecc_caps = &denali_uniphier_v5a_ecc_caps,
 };
 
+NAND_ECC_CAPS_SINGLE(denali_uniphier_v5b_ecc_caps, denali_calc_ecc_bytes,
+		     1024, 8, 16);
 static const struct denali_dt_data denali_uniphier_v5b_data = {
 	.revision = 0x0501,
 	.caps = DENALI_CAP_HW_ECC_FIXUP |
 		DENALI_CAP_DMA_64BIT,
+	.ecc_caps = &denali_uniphier_v5b_ecc_caps,
 };
 
 static const struct udevice_id denali_nand_dt_ids[] = {
@@ -61,19 +71,22 @@ static int denali_dt_probe(struct udevice *dev)
 	if (data) {
 		denali->revision = data->revision;
 		denali->caps = data->caps;
+		denali->ecc_caps = data->ecc_caps;
 	}
 
+	denali->dev = dev;
+
 	ret = dev_read_resource_byname(dev, "denali_reg", &res);
 	if (ret)
 		return ret;
 
-	denali->flash_reg = devm_ioremap(dev, res.start, resource_size(&res));
+	denali->reg = devm_ioremap(dev, res.start, resource_size(&res));
 
 	ret = dev_read_resource_byname(dev, "nand_data", &res);
 	if (ret)
 		return ret;
 
-	denali->flash_mem = devm_ioremap(dev, res.start, resource_size(&res));
+	denali->host = devm_ioremap(dev, res.start, resource_size(&res));
 
 	ret = clk_get_by_index(dev, 0, &clk);
 	if (ret)
diff --git a/drivers/mtd/nand/denali_spl.c b/drivers/mtd/nand/denali_spl.c
index c693032530..3cb9849735 100644
--- a/drivers/mtd/nand/denali_spl.c
+++ b/drivers/mtd/nand/denali_spl.c
@@ -11,6 +11,12 @@
 #include <linux/mtd/nand.h>
 #include "denali.h"
 
+#define DENALI_MAP01		(1 << 26)	/* read/write pages in PIO */
+#define DENALI_MAP10		(2 << 26)	/* high-level control plane */
+
+#define INDEX_CTRL_REG		0x0
+#define INDEX_DATA_REG		0x10
+
 #define SPARE_ACCESS		0x41
 #define MAIN_ACCESS		0x42
 #define PIPELINE_ACCESS		0x2000
@@ -39,7 +45,7 @@ static int wait_for_irq(uint32_t irq_mask)
 	do {
 		intr_status = readl(denali_flash_reg + INTR_STATUS(flash_bank));
 
-		if (intr_status & INTR_STATUS__ECC_UNCOR_ERR) {
+		if (intr_status & INTR__ECC_UNCOR_ERR) {
 			debug("Uncorrected ECC detected\n");
 			return -EBADMSG;
 		}
@@ -106,16 +112,16 @@ int denali_send_pipeline_cmd(int page, int ecc_en, int access_type)
 	addr = BANK(flash_bank) | page;
 
 	/* setup the acccess type */
-	cmd = MODE_10 | addr;
+	cmd = DENALI_MAP10 | addr;
 	index_addr(cmd, access_type);
 
 	/* setup the pipeline command */
 	index_addr(cmd, PIPELINE_ACCESS | page_count);
 
-	cmd = MODE_01 | addr;
+	cmd = DENALI_MAP01 | addr;
 	writel(cmd, denali_flash_mem + INDEX_CTRL_REG);
 
-	return wait_for_irq(INTR_STATUS__LOAD_COMP);
+	return wait_for_irq(INTR__LOAD_COMP);
 }
 
 static int nand_read_oob(void *buf, int page)

commit b48ce1006afd51904019cb897655afb7e54c9e7c
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Wed Nov 22 02:38:31 2017 +0900

    UPSTREAM: mtd: nand: introduce NAND_ROW_ADDR_3 flag
    
    Several drivers check ->chipsize to see if the third row address cycle
    is needed.  Instead of embedding magic sizes such as 32MB, 128MB in
    drivers, introduce a new flag NAND_ROW_ADDR_3 for clean-up.  Since
    nand_scan_ident() knows well about the device, it can handle this
    properly.  The flag is set if the row address bit width is greater
    than 16.
    
    Delete comments such as "One more address cycle for ..." because
    intention is now clear enough from the code.
    
    Change-Id: I46c6ce88e75faf27564297bcd8f69f34407feff7
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Acked-by: Wenyou Yang <wenyou.yang@microchip.com>
    Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
    [Linux commit: 14157f861437ebe2d624b0a845b91bbdf8ca9a2d]
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit e6001371d1603f00a98af9e6dd73abdbbffd2784)

diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 77a3f160e7..aca32318d5 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -634,8 +634,7 @@ static void nand_command(struct mtd_info *mtd, unsigned int command,
 		chip->cmd_ctrl(mtd, page_addr, ctrl);
 		ctrl &= ~NAND_CTRL_CHANGE;
 		chip->cmd_ctrl(mtd, page_addr >> 8, ctrl);
-		/* One more address cycle for devices > 32MiB */
-		if (chip->chipsize > (32 << 20))
+		if (chip->options & NAND_ROW_ADDR_3)
 			chip->cmd_ctrl(mtd, page_addr >> 16, ctrl);
 	}
 	chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
@@ -729,8 +728,7 @@ static void nand_command_lp(struct mtd_info *mtd, unsigned int command,
 			chip->cmd_ctrl(mtd, page_addr, ctrl);
 			chip->cmd_ctrl(mtd, page_addr >> 8,
 				       NAND_NCE | NAND_ALE);
-			/* One more address cycle for devices > 128MiB */
-			if (chip->chipsize > (128 << 20))
+			if (chip->options & NAND_ROW_ADDR_3)
 				chip->cmd_ctrl(mtd, page_addr >> 16,
 					       NAND_NCE | NAND_ALE);
 		}
@@ -3889,6 +3887,9 @@ ident_done:
 		chip->chip_shift += 32 - 1;
 	}
 
+	if (chip->chip_shift - chip->page_shift > 16)
+		chip->options |= NAND_ROW_ADDR_3;
+
 	chip->badblockbits = 8;
 	chip->erase = single_erase;
 
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 683100ee3f..2708770029 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -204,6 +204,9 @@ typedef enum {
  */
 #define NAND_NEED_SCRAMBLING	0x00002000
 
+/* Device needs 3rd row address cycle */
+#define NAND_ROW_ADDR_3		0x00004000
+
 /* Options valid for Samsung large page devices */
 #define NAND_SAMSUNG_LP_OPTIONS NAND_CACHEPRG
 

commit 2416d1a307b212c43cc7421e7609b613e14623c3
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Wed Nov 22 02:38:29 2017 +0900

    UPSTREAM: mtd: nand: add generic helpers to check, match, maximize ECC settings
    
    Driver are responsible for setting up ECC parameters correctly.
    Those include:
      - Check if ECC parameters specified (usually by DT) are valid
      - Meet the chip's ECC requirement
      - Maximize ECC strength if NAND_ECC_MAXIMIZE flag is set
    
    The logic can be generalized by factoring out common code.
    
    This commit adds 3 helpers to the NAND framework:
    nand_check_ecc_caps - Check if preset step_size and strength are valid
    nand_match_ecc_req - Match the chip's requirement
    nand_maximize_ecc - Maximize the ECC strength
    
    To use the helpers above, a driver needs to provide:
      - Data array of supported ECC step size and strength
      - A hook that calculates ECC bytes from the combination of
        step_size and strength.
    
    By using those helpers, code duplication among drivers will be
    reduced.
    
    Change-Id: I74551caae9c08de925327b8550221e5c75d123c2
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
    [Linux commit: 2c8f8afa7f92acb07641bf95b940d384ed1d0294]
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 470c29d1c28d23bdd86456bc431b8f26f8727903)

diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index e490c84e84..77a3f160e7 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -4077,6 +4077,226 @@ int nand_scan_ident(struct mtd_info *mtd, int maxchips,
 }
 EXPORT_SYMBOL(nand_scan_ident);
 
+/**
+ * nand_check_ecc_caps - check the sanity of preset ECC settings
+ * @chip: nand chip info structure
+ * @caps: ECC caps info structure
+ * @oobavail: OOB size that the ECC engine can use
+ *
+ * When ECC step size and strength are already set, check if they are supported
+ * by the controller and the calculated ECC bytes fit within the chip's OOB.
+ * On success, the calculated ECC bytes is set.
+ */
+int nand_check_ecc_caps(struct nand_chip *chip,
+			const struct nand_ecc_caps *caps, int oobavail)
+{
+	struct mtd_info *mtd = nand_to_mtd(chip);
+	const struct nand_ecc_step_info *stepinfo;
+	int preset_step = chip->ecc.size;
+	int preset_strength = chip->ecc.strength;
+	int nsteps, ecc_bytes;
+	int i, j;
+
+	if (WARN_ON(oobavail < 0))
+		return -EINVAL;
+
+	if (!preset_step || !preset_strength)
+		return -ENODATA;
+
+	nsteps = mtd->writesize / preset_step;
+
+	for (i = 0; i < caps->nstepinfos; i++) {
+		stepinfo = &caps->stepinfos[i];
+
+		if (stepinfo->stepsize != preset_step)
+			continue;
+
+		for (j = 0; j < stepinfo->nstrengths; j++) {
+			if (stepinfo->strengths[j] != preset_strength)
+				continue;
+
+			ecc_bytes = caps->calc_ecc_bytes(preset_step,
+							 preset_strength);
+			if (WARN_ON_ONCE(ecc_bytes < 0))
+				return ecc_bytes;
+
+			if (ecc_bytes * nsteps > oobavail) {
+				pr_err("ECC (step, strength) = (%d, %d) does not fit in OOB",
+				       preset_step, preset_strength);
+				return -ENOSPC;
+			}
+
+			chip->ecc.bytes = ecc_bytes;
+
+			return 0;
+		}
+	}
+
+	pr_err("ECC (step, strength) = (%d, %d) not supported on this controller",
+	       preset_step, preset_strength);
+
+	return -ENOTSUPP;
+}
+EXPORT_SYMBOL_GPL(nand_check_ecc_caps);
+
+/**
+ * nand_match_ecc_req - meet the chip's requirement with least ECC bytes
+ * @chip: nand chip info structure
+ * @caps: ECC engine caps info structure
+ * @oobavail: OOB size that the ECC engine can use
+ *
+ * If a chip's ECC requirement is provided, try to meet it with the least
+ * number of ECC bytes (i.e. with the largest number of OOB-free bytes).
+ * On success, the chosen ECC settings are set.
+ */
+int nand_match_ecc_req(struct nand_chip *chip,
+		       const struct nand_ecc_caps *caps, int oobavail)
+{
+	struct mtd_info *mtd = nand_to_mtd(chip);
+	const struct nand_ecc_step_info *stepinfo;
+	int req_step = chip->ecc_step_ds;
+	int req_strength = chip->ecc_strength_ds;
+	int req_corr, step_size, strength, nsteps, ecc_bytes, ecc_bytes_total;
+	int best_step, best_strength, best_ecc_bytes;
+	int best_ecc_bytes_total = INT_MAX;
+	int i, j;
+
+	if (WARN_ON(oobavail < 0))
+		return -EINVAL;
+
+	/* No information provided by the NAND chip */
+	if (!req_step || !req_strength)
+		return -ENOTSUPP;
+
+	/* number of correctable bits the chip requires in a page */
+	req_corr = mtd->writesize / req_step * req_strength;
+
+	for (i = 0; i < caps->nstepinfos; i++) {
+		stepinfo = &caps->stepinfos[i];
+		step_size = stepinfo->stepsize;
+
+		for (j = 0; j < stepinfo->nstrengths; j++) {
+			strength = stepinfo->strengths[j];
+
+			/*
+			 * If both step size and strength are smaller than the
+			 * chip's requirement, it is not easy to compare the
+			 * resulted reliability.
+			 */
+			if (step_size < req_step && strength < req_strength)
+				continue;
+
+			if (mtd->writesize % step_size)
+				continue;
+
+			nsteps = mtd->writesize / step_size;
+
+			ecc_bytes = caps->calc_ecc_bytes(step_size, strength);
+			if (WARN_ON_ONCE(ecc_bytes < 0))
+				continue;
+			ecc_bytes_total = ecc_bytes * nsteps;
+
+			if (ecc_bytes_total > oobavail ||
+			    strength * nsteps < req_corr)
+				continue;
+
+			/*
+			 * We assume the best is to meet the chip's requrement
+			 * with the least number of ECC bytes.
+			 */
+			if (ecc_bytes_total < best_ecc_bytes_total) {
+				best_ecc_bytes_total = ecc_bytes_total;
+				best_step = step_size;
+				best_strength = strength;
+				best_ecc_bytes = ecc_bytes;
+			}
+		}
+	}
+
+	if (best_ecc_bytes_total == INT_MAX)
+		return -ENOTSUPP;
+
+	chip->ecc.size = best_step;
+	chip->ecc.strength = best_strength;
+	chip->ecc.bytes = best_ecc_bytes;
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(nand_match_ecc_req);
+
+/**
+ * nand_maximize_ecc - choose the max ECC strength available
+ * @chip: nand chip info structure
+ * @caps: ECC engine caps info structure
+ * @oobavail: OOB size that the ECC engine can use
+ *
+ * Choose the max ECC strength that is supported on the controller, and can fit
+ * within the chip's OOB.  On success, the chosen ECC settings are set.
+ */
+int nand_maximize_ecc(struct nand_chip *chip,
+		      const struct nand_ecc_caps *caps, int oobavail)
+{
+	struct mtd_info *mtd = nand_to_mtd(chip);
+	const struct nand_ecc_step_info *stepinfo;
+	int step_size, strength, nsteps, ecc_bytes, corr;
+	int best_corr = 0;
+	int best_step = 0;
+	int best_strength, best_ecc_bytes;
+	int i, j;
+
+	if (WARN_ON(oobavail < 0))
+		return -EINVAL;
+
+	for (i = 0; i < caps->nstepinfos; i++) {
+		stepinfo = &caps->stepinfos[i];
+		step_size = stepinfo->stepsize;
+
+		/* If chip->ecc.size is already set, respect it */
+		if (chip->ecc.size && step_size != chip->ecc.size)
+			continue;
+
+		for (j = 0; j < stepinfo->nstrengths; j++) {
+			strength = stepinfo->strengths[j];
+
+			if (mtd->writesize % step_size)
+				continue;
+
+			nsteps = mtd->writesize / step_size;
+
+			ecc_bytes = caps->calc_ecc_bytes(step_size, strength);
+			if (WARN_ON_ONCE(ecc_bytes < 0))
+				continue;
+
+			if (ecc_bytes * nsteps > oobavail)
+				continue;
+
+			corr = strength * nsteps;
+
+			/*
+			 * If the number of correctable bits is the same,
+			 * bigger step_size has more reliability.
+			 */
+			if (corr > best_corr ||
+			    (corr == best_corr && step_size > best_step)) {
+				best_corr = corr;
+				best_step = step_size;
+				best_strength = strength;
+				best_ecc_bytes = ecc_bytes;
+			}
+		}
+	}
+
+	if (!best_corr)
+		return -ENOTSUPP;
+
+	chip->ecc.size = best_step;
+	chip->ecc.strength = best_strength;
+	chip->ecc.bytes = best_ecc_bytes;
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(nand_maximize_ecc);
+
 /*
  * Check if the chip configuration meet the datasheet requirements.
 
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 232fe4df0c..683100ee3f 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -487,6 +487,30 @@ struct nand_hw_control {
 	struct nand_chip *active;
 };
 
+/**
+ * struct nand_ecc_step_info - ECC step information of ECC engine
+ * @stepsize: data bytes per ECC step
+ * @strengths: array of supported strengths
+ * @nstrengths: number of supported strengths
+ */
+struct nand_ecc_step_info {
+	int stepsize;
+	const int *strengths;
+	int nstrengths;
+};
+
+/**
+ * struct nand_ecc_caps - capability of ECC engine
+ * @stepinfos: array of ECC step information
+ * @nstepinfos: number of ECC step information
+ * @calc_ecc_bytes: driver's hook to calculate ECC bytes per step
+ */
+struct nand_ecc_caps {
+	const struct nand_ecc_step_info *stepinfos;
+	int nstepinfos;
+	int (*calc_ecc_bytes)(int step_size, int strength);
+};
+
 /**
  * struct nand_ecc_ctrl - Control structure for ECC
  * @mode:	ECC mode
@@ -1205,6 +1229,15 @@ int nand_check_erased_ecc_chunk(void *data, int datalen,
 				void *extraoob, int extraooblen,
 				int threshold);
 
+int nand_check_ecc_caps(struct nand_chip *chip,
+			const struct nand_ecc_caps *caps, int oobavail);
+
+int nand_match_ecc_req(struct nand_chip *chip,
+		       const struct nand_ecc_caps *caps,  int oobavail);
+
+int nand_maximize_ecc(struct nand_chip *chip,
+		      const struct nand_ecc_caps *caps, int oobavail);
+
 /* Reset and initialize a NAND device */
 int nand_reset(struct nand_chip *chip, int chipnr);
 

commit 61083dd4cdd84bfbc8a3cc3651523ea0ca9dcbcf
Author: Boris Brezillon <boris.brezillon@free-electrons.com>
Date:   Wed Nov 22 02:38:28 2017 +0900

    UPSTREAM: mtd: nand: Pass the CS line to ->setup_data_interface()
    
    Some NAND controllers can assign different NAND timings to different
    CS lines. Pass the CS line information to ->setup_data_interface() so
    that the NAND controller driver knows which CS line is concerned by
    the setup_data_interface() request.
    
    Change-Id: I752cbd4374e56b0370bdbfa3ecb207f6ec1f5145
    Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
    [Linux commit: 104e442a67cfba4d0cc982384761befb917fb6a1]
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 52cde35b9645e60a0c8e4040136476c4f9804110)

diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index f3c515b6df..e490c84e84 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -904,12 +904,13 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip)
 /**
  * nand_reset_data_interface - Reset data interface and timings
  * @chip: The NAND chip
+ * @chipnr: Internal die id
  *
  * Reset the Data interface and timings to ONFI mode 0.
  *
  * Returns 0 for success or negative error code otherwise.
  */
-static int nand_reset_data_interface(struct nand_chip *chip)
+static int nand_reset_data_interface(struct nand_chip *chip, int chipnr)
 {
 	struct mtd_info *mtd = nand_to_mtd(chip);
 	const struct nand_data_interface *conf;
@@ -933,7 +934,7 @@ static int nand_reset_data_interface(struct nand_chip *chip)
 	 */
 
 	conf = nand_get_default_data_interface();
-	ret = chip->setup_data_interface(mtd, conf, false);
+	ret = chip->setup_data_interface(mtd, chipnr, conf);
 	if (ret)
 		pr_err("Failed to configure data interface to SDR timing mode 0\n");
 
@@ -943,6 +944,7 @@ static int nand_reset_data_interface(struct nand_chip *chip)
 /**
  * nand_setup_data_interface - Setup the best data interface and timings
  * @chip: The NAND chip
+ * @chipnr: Internal die id
  *
  * Find and configure the best data interface and NAND timings supported by
  * the chip and the driver.
@@ -952,7 +954,7 @@ static int nand_reset_data_interface(struct nand_chip *chip)
  *
  * Returns 0 for success or negative error code otherwise.
  */
-static int nand_setup_data_interface(struct nand_chip *chip)
+static int nand_setup_data_interface(struct nand_chip *chip, int chipnr)
 {
 	struct mtd_info *mtd = nand_to_mtd(chip);
 	int ret;
@@ -976,7 +978,7 @@ static int nand_setup_data_interface(struct nand_chip *chip)
 			goto err;
 	}
 
-	ret = chip->setup_data_interface(mtd, chip->data_interface, false);
+	ret = chip->setup_data_interface(mtd, chipnr, chip->data_interface);
 err:
 	return ret;
 }
@@ -1027,8 +1029,10 @@ static int nand_init_data_interface(struct nand_chip *chip)
 		if (ret)
 			continue;
 
-		ret = chip->setup_data_interface(mtd, chip->data_interface,
-						 true);
+		/* Pass -1 to only */
+		ret = chip->setup_data_interface(mtd,
+						 NAND_DATA_IFACE_CHECK_ONLY,
+						 chip->data_interface);
 		if (!ret) {
 			chip->onfi_timing_mode_default = mode;
 			break;
@@ -1055,7 +1059,7 @@ int nand_reset(struct nand_chip *chip, int chipnr)
 	struct mtd_info *mtd = nand_to_mtd(chip);
 	int ret;
 
-	ret = nand_reset_data_interface(chip);
+	ret = nand_reset_data_interface(chip, chipnr);
 	if (ret)
 		return ret;
 
@@ -1068,7 +1072,7 @@ int nand_reset(struct nand_chip *chip, int chipnr)
 	chip->select_chip(mtd, -1);
 
 	chip->select_chip(mtd, chipnr);
-	ret = nand_setup_data_interface(chip);
+	ret = nand_setup_data_interface(chip, chipnr);
 	chip->select_chip(mtd, -1);
 	if (ret)
 		return ret;
@@ -4037,7 +4041,7 @@ int nand_scan_ident(struct mtd_info *mtd, int maxchips,
 	 * For the other dies, nand_reset() will automatically switch to the
 	 * best mode for us.
 	 */
-	ret = nand_setup_data_interface(chip);
+	ret = nand_setup_data_interface(chip, 0);
 	if (ret)
 		return ret;
 
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index e693197973..232fe4df0c 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -124,6 +124,8 @@ extern void nand_wait_ready(struct mtd_info *mtd);
 #define NAND_STATUS_READY	0x40
 #define NAND_STATUS_WP		0x80
 
+#define NAND_DATA_IFACE_CHECK_ONLY	-1
+
 /*
  * Constants for ECC_MODES
  */
@@ -807,7 +809,10 @@ nand_get_sdr_timings(const struct nand_data_interface *conf)
  * @read_retries:	[INTERN] the number of read retry modes supported
  * @onfi_set_features:	[REPLACEABLE] set the features for ONFI nand
  * @onfi_get_features:	[REPLACEABLE] get the features for ONFI nand
- * @setup_data_interface: [OPTIONAL] setup the data interface and timing
+ * @setup_data_interface: [OPTIONAL] setup the data interface and timing. If
+ *			  chipnr is set to %NAND_DATA_IFACE_CHECK_ONLY this
+ *			  means the configuration should not be applied but
+ *			  only checked.
  * @bbt:		[INTERN] bad block table pointer
  * @bbt_td:		[REPLACEABLE] bad block table descriptor for flash
  *			lookup.
@@ -851,9 +856,8 @@ struct nand_chip {
 	int (*onfi_get_features)(struct mtd_info *mtd, struct nand_chip *chip,
 			int feature_addr, uint8_t *subfeature_para);
 	int (*setup_read_retry)(struct mtd_info *mtd, int retry_mode);
-	int (*setup_data_interface)(struct mtd_info *mtd,
-				    const struct nand_data_interface *conf,
-				    bool check_only);
+	int (*setup_data_interface)(struct mtd_info *mtd, int chipnr,
+				    const struct nand_data_interface *conf);
 
 
 	int chip_delay;

commit 206756d49131028676039ba349e65daf50e5c750
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Wed Nov 22 02:38:27 2017 +0900

    UPSTREAM: mtd: nand: allow drivers to request minimum alignment for passed buffer
    
    In some cases, nand_do_{read,write}_ops is passed with unaligned
    ops->datbuf.  Drivers using DMA will be unhappy about unaligned
    buffer.
    
    The new struct member, buf_align, represents the minimum alignment
    the driver require for the buffer.  If the buffer passed from the
    upper MTD layer does not have enough alignment, nand_do_*_ops will
    use bufpoi.
    
    Change-Id: I83feb4e3fe7d612b3fc2ec46008f540834f2c185
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
    [Linux commit: 477544c62a84d3bacd9f90ba75ffc16c04d78071]
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 436fb2b84dc24853298f1768c596f7ee02d582d7)

diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 16d4554fae..f3c515b6df 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -1720,6 +1720,9 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,
 
 		if (!aligned)
 			use_bufpoi = 1;
+		else if (chip->options & NAND_USE_BOUNCE_BUFFER)
+			use_bufpoi = !IS_ALIGNED((unsigned long)buf,
+						 chip->buf_align);
 		else
 			use_bufpoi = 0;
 
@@ -2575,6 +2578,9 @@ static int nand_do_write_ops(struct mtd_info *mtd, loff_t to,
 
 		if (part_pagewr)
 			use_bufpoi = 1;
+		else if (chip->options & NAND_USE_BOUNCE_BUFFER)
+			use_bufpoi = !IS_ALIGNED((unsigned long)buf,
+						 chip->buf_align);
 		else
 			use_bufpoi = 0;
 
@@ -3119,6 +3125,8 @@ static void nand_set_defaults(struct nand_chip *chip, int busw)
 		init_waitqueue_head(&chip->controller->wq);
 	}
 
+	if (!chip->buf_align)
+		chip->buf_align = 1;
 }
 
 /* Sanitize ONFI strings so we can safely print them */
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 31de19f5b3..e693197973 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -752,6 +752,7 @@ nand_get_sdr_timings(const struct nand_data_interface *conf)
  *			setting the read-retry mode. Mostly needed for MLC NAND.
  * @ecc:		[BOARDSPECIFIC] ECC control structure
  * @buffers:		buffer structure for read/write
+ * @buf_align:		minimum buffer alignment required by a platform
  * @hwcontrol:		platform-specific hardware control structure
  * @erase:		[REPLACEABLE] erase function
  * @scan_bbt:		[REPLACEABLE] function to scan bad block table
@@ -895,6 +896,7 @@ struct nand_chip {
 
 	struct nand_ecc_ctrl ecc;
 	struct nand_buffers *buffers;
+	unsigned long buf_align;
 	struct nand_hw_control hwcontrol;
 
 	uint8_t *bbt;

commit 3ef7242b804236cde4a4894fb18d39138be1dc01
Author: Boris Brezillon <boris.brezillon@free-electrons.com>
Date:   Wed Nov 22 02:38:26 2017 +0900

    UPSTREAM: mtd: nand: Wait for PAGEPROG to finish in drivers setting NAND_ECC_CUSTOM_PAGE_ACCESS
    
    Drivers setting NAND_ECC_CUSTOM_PAGE_ACCESS are supposed to handle the
    full read/write page sequence, and waiting for a page to actually be
    programmed is part of this write-page sequence.
    This is also what is done in ->write_oob_xxx() hooks, so let's do that in
    ->write_page_xxx() as well to make it consistent.
    
    Change-Id: I7e9aeeaa5e17440bcd501f48bb0f6927ff001d66
    Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
    [Linux commit: 41145649f4acb30249b636b945053db50c9331c5]
    [masahiro:
     There is no driver setting NAND_ECC_CUSTOM_PAGE_ACCESS in U-Boot.
     No driver is affected by this change.]
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit c7c553f249f99ae282f1fa5c0e314aae0bce8a26)

diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 91afa47f87..16d4554fae 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -2439,12 +2439,13 @@ static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip,
 	if (status < 0)
 		return status;
 
-	if (nand_standard_page_accessors(&chip->ecc))
+	if (nand_standard_page_accessors(&chip->ecc)) {
 		chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
-	status = chip->waitfunc(mtd, chip);
 
-	if (status & NAND_STATUS_FAIL)
-		return -EIO;
+		status = chip->waitfunc(mtd, chip);
+		if (status & NAND_STATUS_FAIL)
+			return -EIO;
+	}
 
 	return 0;
 }

commit 7939380356e17caf7927b4a737ac42d0d4b49be0
Author: Boris Brezillon <boris.brezillon@free-electrons.com>
Date:   Wed Nov 22 02:38:25 2017 +0900

    UPSTREAM: mtd: nand: Drop the ->errstat() hook
    
    The ->errstat() hook is no longer implemented NAND controller drivers.
    Get rid of it before someone starts abusing it.
    
    Change-Id: I6920981bf0c7c0fad9b017f83a3a075ad898d9be
    Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
    [Linux commit: 7d135bcced20be2b50128432c5426a7278ec4f6d]
    [masahiro: modify davinci_nand.c for U-Boot]
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 94b50a8aae1a6e1514cb39ecb2d2aec0824582f6)

diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c
index 1e1f4b5f3f..65104c6cf4 100644
--- a/drivers/mtd/nand/davinci_nand.c
+++ b/drivers/mtd/nand/davinci_nand.c
@@ -394,13 +394,6 @@ static int nand_davinci_write_page(struct mtd_info *mtd, struct nand_chip *chip,
 	chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
 	status = chip->waitfunc(mtd, chip);
 
-	/*
-	 * See if operation failed and additional status checks are
-	 * available.
-	 */
-	if ((status & NAND_STATUS_FAIL) && (chip->errstat))
-		status = chip->errstat(mtd, chip, FL_WRITING, status, page);
-
 	if (status & NAND_STATUS_FAIL) {
 		ret = -EIO;
 		goto err;
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 0be427f923..91afa47f87 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -2442,13 +2442,6 @@ static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip,
 	if (nand_standard_page_accessors(&chip->ecc))
 		chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
 	status = chip->waitfunc(mtd, chip);
-	/*
-	 * See if operation failed and additional status checks are
-	 * available.
-	 */
-	if ((status & NAND_STATUS_FAIL) && (chip->errstat))
-		status = chip->errstat(mtd, chip, FL_WRITING, status,
-				       page);
 
 	if (status & NAND_STATUS_FAIL)
 		return -EIO;
@@ -2924,14 +2917,6 @@ int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr,
 
 		status = chip->erase(mtd, page & chip->pagemask);
 
-		/*
-		 * See if operation failed and additional status checks are
-		 * available
-		 */
-		if ((status & NAND_STATUS_FAIL) && (chip->errstat))
-			status = chip->errstat(mtd, chip, FL_ERASING,
-					       status, page);
-
 		/* See if block erase succeeded */
 		if (status & NAND_STATUS_FAIL) {
 			pr_debug("%s: failed erase, page 0x%08x\n",
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index cd9a78c5a2..31de19f5b3 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -817,9 +817,6 @@ nand_get_sdr_timings(const struct nand_data_interface *conf)
  *			structure which is shared among multiple independent
  *			devices.
  * @priv:		[OPTIONAL] pointer to private chip data
- * @errstat:		[OPTIONAL] hardware specific function to perform
- *			additional error status checks (determine if errors are
- *			correctable).
  * @write_page:		[REPLACEABLE] High-level page write function
  */
 
@@ -845,8 +842,6 @@ struct nand_chip {
 	int(*waitfunc)(struct mtd_info *mtd, struct nand_chip *this);
 	int (*erase)(struct mtd_info *mtd, int page);
 	int (*scan_bbt)(struct mtd_info *mtd);
-	int (*errstat)(struct mtd_info *mtd, struct nand_chip *this, int state,
-			int status, int page);
 	int (*write_page)(struct mtd_info *mtd, struct nand_chip *chip,
 			uint32_t offset, int data_len, const uint8_t *buf,
 			int oob_required, int page, int raw);

commit 271c54fdadc9cb7eaeeaf20d554ed82cf1850532
Author: Boris Brezillon <boris.brezillon@free-electrons.com>
Date:   Wed Nov 22 02:38:24 2017 +0900

    UPSTREAM: mtd: nand: Drop unused cached programming support
    
    Cached programming is always skipped, so drop the associated code until
    we decide to really support it.
    
    Change-Id: Ife766710fad3e88ccc2e156aeb7f46924c44fd2d
    Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
    [Linux commit: 0b4773fd1649e0d418275557723a7ef54f769dc9]
    [masahiro: modify davinci_nand.c for U-Boot]
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 4d75596e6d27315a05253d85e870d28cda972d45)

diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c
index 2a01fd34e9..1e1f4b5f3f 100644
--- a/drivers/mtd/nand/davinci_nand.c
+++ b/drivers/mtd/nand/davinci_nand.c
@@ -358,13 +358,12 @@ static struct nand_ecclayout nand_keystone_rbl_4bit_layout_oobfirst = {
  * @buf: the data to write
  * @oob_required: must write chip->oob_poi to OOB
  * @page: page number to write
- * @cached: cached programming
  * @raw: use _raw version of write_page
  */
 static int nand_davinci_write_page(struct mtd_info *mtd, struct nand_chip *chip,
 				   uint32_t offset, int data_len,
 				   const uint8_t *buf, int oob_required,
-				   int page, int cached, int raw)
+				   int page, int raw)
 {
 	int status;
 	int ret = 0;
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index d9f0a752b5..0be427f923 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -2409,12 +2409,11 @@ static int nand_write_page_syndrome(struct mtd_info *mtd,
  * @buf: the data to write
  * @oob_required: must write chip->oob_poi to OOB
  * @page: page number to write
- * @cached: cached programming
  * @raw: use _raw version of write_page
  */
 static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip,
 		uint32_t offset, int data_len, const uint8_t *buf,
-		int oob_required, int page, int cached, int raw)
+		int oob_required, int page, int raw)
 {
 	int status, subpage;
 
@@ -2440,31 +2439,19 @@ static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip,
 	if (status < 0)
 		return status;
 
+	if (nand_standard_page_accessors(&chip->ecc))
+		chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
+	status = chip->waitfunc(mtd, chip);
 	/*
-	 * Cached progamming disabled for now. Not sure if it's worth the
-	 * trouble. The speed gain is not very impressive. (2.3->2.6Mib/s).
+	 * See if operation failed and additional status checks are
+	 * available.
 	 */
-	cached = 0;
-
-	if (!cached || !NAND_HAS_CACHEPROG(chip)) {
-
-		if (nand_standard_page_accessors(&chip->ecc))
-			chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
-		status = chip->waitfunc(mtd, chip);
-		/*
-		 * See if operation failed and additional status checks are
-		 * available.
-		 */
-		if ((status & NAND_STATUS_FAIL) && (chip->errstat))
-			status = chip->errstat(mtd, chip, FL_WRITING, status,
-					       page);
+	if ((status & NAND_STATUS_FAIL) && (chip->errstat))
+		status = chip->errstat(mtd, chip, FL_WRITING, status,
+				       page);
 
-		if (status & NAND_STATUS_FAIL)
-			return -EIO;
-	} else {
-		chip->cmdfunc(mtd, NAND_CMD_CACHEDPROG, -1, -1);
-		status = chip->waitfunc(mtd, chip);
-	}
+	if (status & NAND_STATUS_FAIL)
+		return -EIO;
 
 	return 0;
 }
@@ -2538,7 +2525,7 @@ static uint8_t *nand_fill_oob(struct mtd_info *mtd, uint8_t *oob, size_t len,
 static int nand_do_write_ops(struct mtd_info *mtd, loff_t to,
 			     struct mtd_oob_ops *ops)
 {
-	int chipnr, realpage, page, blockmask, column;
+	int chipnr, realpage, page, column;
 	struct nand_chip *chip = mtd_to_nand(mtd);
 	uint32_t writelen = ops->len;
 
@@ -2574,7 +2561,6 @@ static int nand_do_write_ops(struct mtd_info *mtd, loff_t to,
 
 	realpage = (int)(to >> chip->page_shift);
 	page = realpage & chip->pagemask;
-	blockmask = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1;
 
 	/* Invalidate the page cache, when we write to the cached page */
 	if (to <= ((loff_t)chip->pagebuf << chip->page_shift) &&
@@ -2589,7 +2575,6 @@ static int nand_do_write_ops(struct mtd_info *mtd, loff_t to,
 
 	while (1) {
 		int bytes = mtd->writesize;
-		int cached = writelen > bytes && page != blockmask;
 		uint8_t *wbuf = buf;
 		int use_bufpoi;
 		int part_pagewr = (column || writelen < mtd->writesize);
@@ -2604,7 +2589,6 @@ static int nand_do_write_ops(struct mtd_info *mtd, loff_t to,
 		if (use_bufpoi) {
 			pr_debug("%s: using write bounce buffer for buf@%p\n",
 					 __func__, buf);
-			cached = 0;
 			if (part_pagewr)
 				bytes = min_t(int, bytes - column, writelen);
 			chip->pagebuf = -1;
@@ -2622,7 +2606,7 @@ static int nand_do_write_ops(struct mtd_info *mtd, loff_t to,
 			memset(chip->oob_poi, 0xff, mtd->oobsize);
 		}
 		ret = chip->write_page(mtd, chip, column, bytes, wbuf,
-					oob_required, page, cached,
+					oob_required, page,
 					(ops->mode == MTD_OPS_RAW));
 		if (ret)
 			break;
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 411c5e8d7e..cd9a78c5a2 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -849,7 +849,7 @@ struct nand_chip {
 			int status, int page);
 	int (*write_page)(struct mtd_info *mtd, struct nand_chip *chip,
 			uint32_t offset, int data_len, const uint8_t *buf,
-			int oob_required, int page, int cached, int raw);
+			int oob_required, int page, int raw);
 	int (*onfi_set_features)(struct mtd_info *mtd, struct nand_chip *chip,
 			int feature_addr, uint8_t *subfeature_para);
 	int (*onfi_get_features)(struct mtd_info *mtd, struct nand_chip *chip,

commit c44c4cceac9c673b4b47ba94a6a0fe20051aa3e8
Author: Boris Brezillon <boris.brezillon@free-electrons.com>
Date:   Wed Nov 22 02:38:23 2017 +0900

    UPSTREAM: mtd: add mtd_ooblayout_xxx() helper functions
    
    In order to make the ecclayout definition completely dynamic we need to
    rework the way the OOB layout are defined and iterated.
    
    Create a few mtd_ooblayout_xxx() helpers to ease OOB bytes manipulation
    and hide ecclayout internals to their users.
    
    Change-Id: I6248b25d56d8ac9074bfb8e76140a78f0803a433
    Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
    [Linux commit: 75eb2cec251fda33c9bb716ecc372819abb9278a]
    [masahiro:
     cherry-pick more code from adbbc3bc827eb1f43a932d783f09ba55c8ec8379]
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 13f3b04f61aa6a0ec61bf01bb404f21c10b48bd0)

diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c
index e3f56e5424..2cda0511e8 100644
--- a/drivers/mtd/mtdcore.c
+++ b/drivers/mtd/mtdcore.c
@@ -1005,6 +1005,366 @@ int mtd_read_oob(struct mtd_info *mtd, loff_t from, struct mtd_oob_ops *ops)
 }
 EXPORT_SYMBOL_GPL(mtd_read_oob);
 
+/**
+ * mtd_ooblayout_ecc - Get the OOB region definition of a specific ECC section
+ * @mtd: MTD device structure
+ * @section: ECC section. Depending on the layout you may have all the ECC
+ *	     bytes stored in a single contiguous section, or one section
+ *	     per ECC chunk (and sometime several sections for a single ECC
+ *	     ECC chunk)
+ * @oobecc: OOB region struct filled with the appropriate ECC position
+ *	    information
+ *
+ * This function returns ECC section information in the OOB area. If you want
+ * to get all the ECC bytes information, then you should call
+ * mtd_ooblayout_ecc(mtd, section++, oobecc) until it returns -ERANGE.
+ *
+ * Returns zero on success, a negative error code otherwise.
+ */
+int mtd_ooblayout_ecc(struct mtd_info *mtd, int section,
+		      struct mtd_oob_region *oobecc)
+{
+	memset(oobecc, 0, sizeof(*oobecc));
+
+	if (!mtd || section < 0)
+		return -EINVAL;
+
+	if (!mtd->ooblayout || !mtd->ooblayout->ecc)
+		return -ENOTSUPP;
+
+	return mtd->ooblayout->ecc(mtd, section, oobecc);
+}
+EXPORT_SYMBOL_GPL(mtd_ooblayout_ecc);
+
+/**
+ * mtd_ooblayout_free - Get the OOB region definition of a specific free
+ *			section
+ * @mtd: MTD device structure
+ * @section: Free section you are interested in. Depending on the layout
+ *	     you may have all the free bytes stored in a single contiguous
+ *	     section, or one section per ECC chunk plus an extra section
+ *	     for the remaining bytes (or other funky layout).
+ * @oobfree: OOB region struct filled with the appropriate free position
+ *	     information
+ *
+ * This function returns free bytes position in the OOB area. If you want
+ * to get all the free bytes information, then you should call
+ * mtd_ooblayout_free(mtd, section++, oobfree) until it returns -ERANGE.
+ *
+ * Returns zero on success, a negative error code otherwise.
+ */
+int mtd_ooblayout_free(struct mtd_info *mtd, int section,
+		       struct mtd_oob_region *oobfree)
+{
+	memset(oobfree, 0, sizeof(*oobfree));
+
+	if (!mtd || section < 0)
+		return -EINVAL;
+
+	if (!mtd->ooblayout || !mtd->ooblayout->free)
+		return -ENOTSUPP;
+
+	return mtd->ooblayout->free(mtd, section, oobfree);
+}
+EXPORT_SYMBOL_GPL(mtd_ooblayout_free);
+
+/**
+ * mtd_ooblayout_find_region - Find the region attached to a specific byte
+ * @mtd: mtd info structure
+ * @byte: the byte we are searching for
+ * @sectionp: pointer where the section id will be stored
+ * @oobregion: used to retrieve the ECC position
+ * @iter: iterator function. Should be either mtd_ooblayout_free or
+ *	  mtd_ooblayout_ecc depending on the region type you're searching for
+ *
+ * This function returns the section id and oobregion information of a
+ * specific byte. For example, say you want to know where the 4th ECC byte is
+ * stored, you'll use:
+ *
+ * mtd_ooblayout_find_region(mtd, 3, &section, &oobregion, mtd_ooblayout_ecc);
+ *
+ * Returns zero on success, a negative error code otherwise.
+ */
+static int mtd_ooblayout_find_region(struct mtd_info *mtd, int byte,
+				int *sectionp, struct mtd_oob_region *oobregion,
+				int (*iter)(struct mtd_info *,
+					    int section,
+					    struct mtd_oob_region *oobregion))
+{
+	int pos = 0, ret, section = 0;
+
+	memset(oobregion, 0, sizeof(*oobregion));
+
+	while (1) {
+		ret = iter(mtd, section, oobregion);
+		if (ret)
+			return ret;
+
+		if (pos + oobregion->length > byte)
+			break;
+
+		pos += oobregion->length;
+		section++;
+	}
+
+	/*
+	 * Adjust region info to make it start at the beginning at the
+	 * 'start' ECC byte.
+	 */
+	oobregion->offset += byte - pos;
+	oobregion->length -= byte - pos;
+	*sectionp = section;
+
+	return 0;
+}
+
+/**
+ * mtd_ooblayout_find_eccregion - Find the ECC region attached to a specific
+ *				  ECC byte
+ * @mtd: mtd info structure
+ * @eccbyte: the byte we are searching for
+ * @sectionp: pointer where the section id will be stored
+ * @oobregion: OOB region information
+ *
+ * Works like mtd_ooblayout_find_region() except it searches for a specific ECC
+ * byte.
+ *
+ * Returns zero on success, a negative error code otherwise.
+ */
+int mtd_ooblayout_find_eccregion(struct mtd_info *mtd, int eccbyte,
+				 int *section,
+				 struct mtd_oob_region *oobregion)
+{
+	return mtd_ooblayout_find_region(mtd, eccbyte, section, oobregion,
+					 mtd_ooblayout_ecc);
+}
+EXPORT_SYMBOL_GPL(mtd_ooblayout_find_eccregion);
+
+/**
+ * mtd_ooblayout_get_bytes - Extract OOB bytes from the oob buffer
+ * @mtd: mtd info structure
+ * @buf: destination buffer to store OOB bytes
+ * @oobbuf: OOB buffer
+ * @start: first byte to retrieve
+ * @nbytes: number of bytes to retrieve
+ * @iter: section iterator
+ *
+ * Extract bytes attached to a specific category (ECC or free)
+ * from the OOB buffer and copy them into buf.
+ *
+ * Returns zero on success, a negative error code otherwise.
+ */
+static int mtd_ooblayout_get_bytes(struct mtd_info *mtd, u8 *buf,
+				const u8 *oobbuf, int start, int nbytes,
+				int (*iter)(struct mtd_info *,
+					    int section,
+					    struct mtd_oob_region *oobregion))
+{
+	struct mtd_oob_region oobregion;
+	int section, ret;
+
+	ret = mtd_ooblayout_find_region(mtd, start, &section,
+					&oobregion, iter);
+
+	while (!ret) {
+		int cnt;
+
+		cnt = min_t(int, nbytes, oobregion.length);
+		memcpy(buf, oobbuf + oobregion.offset, cnt);
+		buf += cnt;
+		nbytes -= cnt;
+
+		if (!nbytes)
+			break;
+
+		ret = iter(mtd, ++section, &oobregion);
+	}
+
+	return ret;
+}
+
+/**
+ * mtd_ooblayout_set_bytes - put OOB bytes into the oob buffer
+ * @mtd: mtd info structure
+ * @buf: source buffer to get OOB bytes from
+ * @oobbuf: OOB buffer
+ * @start: first OOB byte to set
+ * @nbytes: number of OOB bytes to set
+ * @iter: section iterator
+ *
+ * Fill the OOB buffer with data provided in buf. The category (ECC or free)
+ * is selected by passing the appropriate iterator.
+ *
+ * Returns zero on success, a negative error code otherwise.
+ */
+static int mtd_ooblayout_set_bytes(struct mtd_info *mtd, const u8 *buf,
+				u8 *oobbuf, int start, int nbytes,
+				int (*iter)(struct mtd_info *,
+					    int section,
+					    struct mtd_oob_region *oobregion))
+{
+	struct mtd_oob_region oobregion;
+	int section, ret;
+
+	ret = mtd_ooblayout_find_region(mtd, start, &section,
+					&oobregion, iter);
+
+	while (!ret) {
+		int cnt;
+
+		cnt = min_t(int, nbytes, oobregion.length);
+		memcpy(oobbuf + oobregion.offset, buf, cnt);
+		buf += cnt;
+		nbytes -= cnt;
+
+		if (!nbytes)
+			break;
+
+		ret = iter(mtd, ++section, &oobregion);
+	}
+
+	return ret;
+}
+
+/**
+ * mtd_ooblayout_count_bytes - count the number of bytes in a OOB category
+ * @mtd: mtd info structure
+ * @iter: category iterator
+ *
+ * Count the number of bytes in a given category.
+ *
+ * Returns a positive value on success, a negative error code otherwise.
+ */
+static int mtd_ooblayout_count_bytes(struct mtd_info *mtd,
+				int (*iter)(struct mtd_info *,
+					    int section,
+					    struct mtd_oob_region *oobregion))
+{
+	struct mtd_oob_region oobregion;
+	int section = 0, ret, nbytes = 0;
+
+	while (1) {
+		ret = iter(mtd, section++, &oobregion);
+		if (ret) {
+			if (ret == -ERANGE)
+				ret = nbytes;
+			break;
+		}
+
+		nbytes += oobregion.length;
+	}
+
+	return ret;
+}
+
+/**
+ * mtd_ooblayout_get_eccbytes - extract ECC bytes from the oob buffer
+ * @mtd: mtd info structure
+ * @eccbuf: destination buffer to store ECC bytes
+ * @oobbuf: OOB buffer
+ * @start: first ECC byte to retrieve
+ * @nbytes: number of ECC bytes to retrieve
+ *
+ * Works like mtd_ooblayout_get_bytes(), except it acts on ECC bytes.
+ *
+ * Returns zero on success, a negative error code otherwise.
+ */
+int mtd_ooblayout_get_eccbytes(struct mtd_info *mtd, u8 *eccbuf,
+			       const u8 *oobbuf, int start, int nbytes)
+{
+	return mtd_ooblayout_get_bytes(mtd, eccbuf, oobbuf, start, nbytes,
+				       mtd_ooblayout_ecc);
+}
+EXPORT_SYMBOL_GPL(mtd_ooblayout_get_eccbytes);
+
+/**
+ * mtd_ooblayout_set_eccbytes - set ECC bytes into the oob buffer
+ * @mtd: mtd info structure
+ * @eccbuf: source buffer to get ECC bytes from
+ * @oobbuf: OOB buffer
+ * @start: first ECC byte to set
+ * @nbytes: number of ECC bytes to set
+ *
+ * Works like mtd_ooblayout_set_bytes(), except it acts on ECC bytes.
+ *
+ * Returns zero on success, a negative error code otherwise.
+ */
+int mtd_ooblayout_set_eccbytes(struct mtd_info *mtd, const u8 *eccbuf,
+			       u8 *oobbuf, int start, int nbytes)
+{
+	return mtd_ooblayout_set_bytes(mtd, eccbuf, oobbuf, start, nbytes,
+				       mtd_ooblayout_ecc);
+}
+EXPORT_SYMBOL_GPL(mtd_ooblayout_set_eccbytes);
+
+/**
+ * mtd_ooblayout_get_databytes - extract data bytes from the oob buffer
+ * @mtd: mtd info structure
+ * @databuf: destination buffer to store ECC bytes
+ * @oobbuf: OOB buffer
+ * @start: first ECC byte to retrieve
+ * @nbytes: number of ECC bytes to retrieve
+ *
+ * Works like mtd_ooblayout_get_bytes(), except it acts on free bytes.
+ *
+ * Returns zero on success, a negative error code otherwise.
+ */
+int mtd_ooblayout_get_databytes(struct mtd_info *mtd, u8 *databuf,
+				const u8 *oobbuf, int start, int nbytes)
+{
+	return mtd_ooblayout_get_bytes(mtd, databuf, oobbuf, start, nbytes,
+				       mtd_ooblayout_free);
+}
+EXPORT_SYMBOL_GPL(mtd_ooblayout_get_databytes);
+
+/**
+ * mtd_ooblayout_get_eccbytes - set data bytes into the oob buffer
+ * @mtd: mtd info structure
+ * @eccbuf: source buffer to get data bytes from
+ * @oobbuf: OOB buffer
+ * @start: first ECC byte to set
+ * @nbytes: number of ECC bytes to set
+ *
+ * Works like mtd_ooblayout_get_bytes(), except it acts on free bytes.
+ *
+ * Returns zero on success, a negative error code otherwise.
+ */
+int mtd_ooblayout_set_databytes(struct mtd_info *mtd, const u8 *databuf,
+				u8 *oobbuf, int start, int nbytes)
+{
+	return mtd_ooblayout_set_bytes(mtd, databuf, oobbuf, start, nbytes,
+				       mtd_ooblayout_free);
+}
+EXPORT_SYMBOL_GPL(mtd_ooblayout_set_databytes);
+
+/**
+ * mtd_ooblayout_count_freebytes - count the number of free bytes in OOB
+ * @mtd: mtd info structure
+ *
+ * Works like mtd_ooblayout_count_bytes(), except it count free bytes.
+ *
+ * Returns zero on success, a negative error code otherwise.
+ */
+int mtd_ooblayout_count_freebytes(struct mtd_info *mtd)
+{
+	return mtd_ooblayout_count_bytes(mtd, mtd_ooblayout_free);
+}
+EXPORT_SYMBOL_GPL(mtd_ooblayout_count_freebytes);
+
+/**
+ * mtd_ooblayout_count_freebytes - count the number of ECC bytes in OOB
+ * @mtd: mtd info structure
+ *
+ * Works like mtd_ooblayout_count_bytes(), except it count ECC bytes.
+ *
+ * Returns zero on success, a negative error code otherwise.
+ */
+int mtd_ooblayout_count_eccbytes(struct mtd_info *mtd)
+{
+	return mtd_ooblayout_count_bytes(mtd, mtd_ooblayout_ecc);
+}
+EXPORT_SYMBOL_GPL(mtd_ooblayout_count_eccbytes);
+
 /*
  * Method to access the protection register area, present in some flash
  * devices. The user data is one time programmable but the factory data is read
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index 3e1694b3a5..0b5e1649bc 100644
--- a/include/linux/mtd/mtd.h
+++ b/include/linux/mtd/mtd.h
@@ -103,6 +103,36 @@ struct mtd_oob_ops {
 #else
 #define MTD_MAX_ECCPOS_ENTRIES_LARGE	680
 #endif
+/**
+ * struct mtd_oob_region - oob region definition
+ * @offset: region offset
+ * @length: region length
+ *
+ * This structure describes a region of the OOB area, and is used
+ * to retrieve ECC or free bytes sections.
+ * Each section is defined by an offset within the OOB area and a
+ * length.
+ */
+struct mtd_oob_region {
+	u32 offset;
+	u32 length;
+};
+
+/*
+ * struct mtd_ooblayout_ops - NAND OOB layout operations
+ * @ecc: function returning an ECC region in the OOB area.
+ *	 Should return -ERANGE if %section exceeds the total number of
+ *	 ECC sections.
+ * @free: function returning a free region in the OOB area.
+ *	  Should return -ERANGE if %section exceeds the total number of
+ *	  free sections.
+ */
+struct mtd_ooblayout_ops {
+	int (*ecc)(struct mtd_info *mtd, int section,
+		   struct mtd_oob_region *oobecc);
+	int (*free)(struct mtd_info *mtd, int section,
+		    struct mtd_oob_region *oobfree);
+};
 
 /*
  * Internal ECC layout control structure. For historical reasons, there is a
@@ -179,6 +209,9 @@ struct mtd_info {
 #endif
 	int index;
 
+	/* OOB layout description */
+	const struct mtd_ooblayout_ops *ooblayout;
+
 	/* ECC layout structure pointer - read only! */
 	struct nand_ecclayout *ecclayout;
 
@@ -278,6 +311,30 @@ struct mtd_info {
 	int usecount;
 };
 
+int mtd_ooblayout_ecc(struct mtd_info *mtd, int section,
+		      struct mtd_oob_region *oobecc);
+int mtd_ooblayout_find_eccregion(struct mtd_info *mtd, int eccbyte,
+				 int *section,
+				 struct mtd_oob_region *oobregion);
+int mtd_ooblayout_get_eccbytes(struct mtd_info *mtd, u8 *eccbuf,
+			       const u8 *oobbuf, int start, int nbytes);
+int mtd_ooblayout_set_eccbytes(struct mtd_info *mtd, const u8 *eccbuf,
+			       u8 *oobbuf, int start, int nbytes);
+int mtd_ooblayout_free(struct mtd_info *mtd, int section,
+		       struct mtd_oob_region *oobfree);
+int mtd_ooblayout_get_databytes(struct mtd_info *mtd, u8 *databuf,
+				const u8 *oobbuf, int start, int nbytes);
+int mtd_ooblayout_set_databytes(struct mtd_info *mtd, const u8 *databuf,
+				u8 *oobbuf, int start, int nbytes);
+int mtd_ooblayout_count_freebytes(struct mtd_info *mtd);
+int mtd_ooblayout_count_eccbytes(struct mtd_info *mtd);
+
+static inline void mtd_set_ooblayout(struct mtd_info *mtd,
+				     const struct mtd_ooblayout_ops *ooblayout)
+{
+	mtd->ooblayout = ooblayout;
+}
+
 static inline int mtd_oobavail(struct mtd_info *mtd, struct mtd_oob_ops *ops)
 {
 	return ops->mode == MTD_OPS_AUTO_OOB ? mtd->oobavail : mtd->oobsize;

commit 5f649222edcbf88eadda61317279baa2b2769c1a
Author: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
Date:   Wed Nov 22 02:38:22 2017 +0900

    UPSTREAM: mtd: nand: Support controllers with custom page
    
    If your controller already sends the required NAND commands when
    reading or writing a page, then the framework is not supposed to
    send READ0 and SEQIN/PAGEPROG respectively.
    
    Change-Id: I55b5e5f4fbe1f417b60794c234ffdb48c7900d70
    Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
    Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
    [Linux commit: 3371d663bb4579f1b2003a92162edd6d90edd089]
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 1fb87de83dd6e76307e110100f265deb2d8d8163)

diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 5054c0e7ab..d9f0a752b5 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -1732,7 +1732,8 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,
 						 __func__, buf);
 
 read_retry:
-			chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);
+			if (nand_standard_page_accessors(&chip->ecc))
+				chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);
 
 			/*
 			 * Now read the page into the buffer.  Absent an error,
@@ -2423,7 +2424,8 @@ static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip,
 	else
 		subpage = 0;
 
-	chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page);
+	if (nand_standard_page_accessors(&chip->ecc))
+		chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page);
 
 	if (unlikely(raw))
 		status = chip->ecc.write_page_raw(mtd, chip, buf,
@@ -2446,7 +2448,8 @@ static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip,
 
 	if (!cached || !NAND_HAS_CACHEPROG(chip)) {
 
-		chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
+		if (nand_standard_page_accessors(&chip->ecc))
+			chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
 		status = chip->waitfunc(mtd, chip);
 		/*
 		 * See if operation failed and additional status checks are
@@ -4126,6 +4129,26 @@ static bool nand_ecc_strength_good(struct mtd_info *mtd)
 	return corr >= ds_corr && ecc->strength >= chip->ecc_strength_ds;
 }
 
+static bool invalid_ecc_page_accessors(struct nand_chip *chip)
+{
+	struct nand_ecc_ctrl *ecc = &chip->ecc;
+
+	if (nand_standard_page_accessors(ecc))
+		return false;
+
+	/*
+	 * NAND_ECC_CUSTOM_PAGE_ACCESS flag is set, make sure the NAND
+	 * controller driver implements all the page accessors because
+	 * default helpers are not suitable when the core does not
+	 * send the READ0/PAGEPROG commands.
+	 */
+	return (!ecc->read_page || !ecc->write_page ||
+		!ecc->read_page_raw || !ecc->write_page_raw ||
+		(NAND_HAS_SUBPAGE_READ(chip) && !ecc->read_subpage) ||
+		(NAND_HAS_SUBPAGE_WRITE(chip) && !ecc->write_subpage &&
+		 ecc->hwctl && ecc->calculate));
+}
+
 /**
  * nand_scan_tail - [NAND Interface] Scan for the NAND device
  * @mtd: MTD device structure
@@ -4145,6 +4168,11 @@ int nand_scan_tail(struct mtd_info *mtd)
 	BUG_ON((chip->bbt_options & NAND_BBT_NO_OOB_BBM) &&
 			!(chip->bbt_options & NAND_BBT_USE_FLASH));
 
+	if (invalid_ecc_page_accessors(chip)) {
+		pr_err("Invalid ECC page accessors setup\n");
+		return -EINVAL;
+	}
+
 	if (!(chip->options & NAND_OWN_BUFFERS)) {
 		nbuf = kzalloc(sizeof(struct nand_buffers), GFP_KERNEL);
 		chip->buffers = nbuf;
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 4685dedfbb..411c5e8d7e 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -154,6 +154,12 @@ typedef enum {
  */
 #define NAND_ECC_GENERIC_ERASED_CHECK	BIT(0)
 #define NAND_ECC_MAXIMIZE		BIT(1)
+/*
+ * If your controller already sends the required NAND commands when
+ * reading or writing a page, then the framework is not supposed to
+ * send READ0 and SEQIN/PAGEPROG respectively.
+ */
+#define NAND_ECC_CUSTOM_PAGE_ACCESS	BIT(2)
 
 /* Bit mask for flags passed to do_nand_read_ecc */
 #define NAND_GET_DEVICE		0x80
@@ -202,6 +208,7 @@ typedef enum {
 /* Macros to identify the above */
 #define NAND_HAS_CACHEPROG(chip) ((chip->options & NAND_CACHEPRG))
 #define NAND_HAS_SUBPAGE_READ(chip) ((chip->options & NAND_SUBPAGE_READ))
+#define NAND_HAS_SUBPAGE_WRITE(chip) !((chip)->options & NAND_NO_SUBPAGE_WRITE)
 
 /* Non chip related options */
 /* This option skips the bbt scan during initialization. */
@@ -568,6 +575,11 @@ struct nand_ecc_ctrl {
 			int page);
 };
 
+static inline int nand_standard_page_accessors(struct nand_ecc_ctrl *ecc)
+{
+	return !(ecc->options & NAND_ECC_CUSTOM_PAGE_ACCESS);
+}
+
 /**
  * struct nand_buffers - buffer structure for read/write
  * @ecccalc:	buffer pointer for calculated ECC, size is oobsize.

commit c47e7cbb07a2ac90e18d505063b6d2824766ff01
Author: Boris Brezillon <boris.brezillon@free-electrons.com>
Date:   Wed Nov 22 02:38:21 2017 +0900

    UPSTREAM: mtd: nand: Add a few more timings to nand_sdr_timings
    
    Add the tR_max, tBERS_max, tPROG_max and tCCS_min timings to the
    nand_sdr_timings struct.
    Assign default/safe values for the statically defined timings, and
    extract them from the ONFI parameter table if the NAND is ONFI
    compliant.
    
    Change-Id: Id5d29cfbab072d3500f23a997e63b1ba6e5b64ff
    Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
    Tested-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
    [Linux commit: 204e7ecd47e26cc12d9e8e8a7e7a2eeb9573f0ba
     Fixup commit: 6d29231000bbe0fb9e4893a9c68151ffdd3b5469]
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 6f84b26b53afa207092a8906fa08f4c78d65afb6)

diff --git a/drivers/mtd/nand/nand_timings.c b/drivers/mtd/nand/nand_timings.c
index ba4f22f12d..9935557291 100644
--- a/drivers/mtd/nand/nand_timings.c
+++ b/drivers/mtd/nand/nand_timings.c
@@ -17,6 +17,8 @@ static const struct nand_data_interface onfi_sdr_timings[] = {
 	{
 		.type = NAND_SDR_IFACE,
 		.timings.sdr = {
+			.tCCS_min = 500000,
+			.tR_max = 200000000,
 			.tADL_min = 400000,
 			.tALH_min = 20000,
 			.tALS_min = 50000,
@@ -57,6 +59,8 @@ static const struct nand_data_interface onfi_sdr_timings[] = {
 	{
 		.type = NAND_SDR_IFACE,
 		.timings.sdr = {
+			.tCCS_min = 500000,
+			.tR_max = 200000000,
 			.tADL_min = 400000,
 			.tALH_min = 10000,
 			.tALS_min = 25000,
@@ -97,6 +101,8 @@ static const struct nand_data_interface onfi_sdr_timings[] = {
 	{
 		.type = NAND_SDR_IFACE,
 		.timings.sdr = {
+			.tCCS_min = 500000,
+			.tR_max = 200000000,
 			.tADL_min = 400000,
 			.tALH_min = 10000,
 			.tALS_min = 15000,
@@ -137,6 +143,8 @@ static const struct nand_data_interface onfi_sdr_timings[] = {
 	{
 		.type = NAND_SDR_IFACE,
 		.timings.sdr = {
+			.tCCS_min = 500000,
+			.tR_max = 200000000,
 			.tADL_min = 400000,
 			.tALH_min = 5000,
 			.tALS_min = 10000,
@@ -177,6 +185,8 @@ static const struct nand_data_interface onfi_sdr_timings[] = {
 	{
 		.type = NAND_SDR_IFACE,
 		.timings.sdr = {
+			.tCCS_min = 500000,
+			.tR_max = 200000000,
 			.tADL_min = 400000,
 			.tALH_min = 5000,
 			.tALS_min = 10000,
@@ -217,6 +227,8 @@ static const struct nand_data_interface onfi_sdr_timings[] = {
 	{
 		.type = NAND_SDR_IFACE,
 		.timings.sdr = {
+			.tCCS_min = 500000,
+			.tR_max = 200000000,
 			.tADL_min = 400000,
 			.tALH_min = 5000,
 			.tALS_min = 10000,
@@ -289,10 +301,22 @@ int onfi_init_data_interface(struct nand_chip *chip,
 	*iface = onfi_sdr_timings[timing_mode];
 
 	/*
-	 * TODO: initialize timings that cannot be deduced from timing mode:
+	 * Initialize timings that cannot be deduced from timing mode:
 	 * tR, tPROG, tCCS, ...
 	 * These information are part of the ONFI parameter page.
 	 */
+	if (chip->onfi_version) {
+		struct nand_onfi_params *params = &chip->onfi_params;
+		struct nand_sdr_timings *timings = &iface->timings.sdr;
+
+		/* microseconds -> picoseconds */
+		timings->tPROG_max = 1000000ULL * le16_to_cpu(params->t_prog);
+		timings->tBERS_max = 1000000ULL * le16_to_cpu(params->t_bers);
+		timings->tR_max = 1000000ULL * le16_to_cpu(params->t_r);
+
+		/* nanoseconds -> picoseconds */
+		timings->tCCS_min = 1000UL * le16_to_cpu(params->t_ccs);
+	}
 
 	return 0;
 }
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 05358f0522..4685dedfbb 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -595,6 +595,10 @@ struct nand_buffers {
  *
  * All these timings are expressed in picoseconds.
  *
+ * @tBERS_max: Block erase time
+ * @tCCS_min: Change column setup time
+ * @tPROG_max: Page program time
+ * @tR_max: Page read time
  * @tALH_min: ALE hold time
  * @tADL_min: ALE to data loading time
  * @tALS_min: ALE setup time
@@ -632,6 +636,10 @@ struct nand_buffers {
  * @tWW_min: WP# transition to WE# low
  */
 struct nand_sdr_timings {
+	u64 tBERS_max;
+	u32 tCCS_min;
+	u64 tPROG_max;
+	u64 tR_max;
 	u32 tALH_min;
 	u32 tADL_min;
 	u32 tALS_min;

commit 36efa0ccf7bfab786cebc814b540360a72947b44
Author: Boris Brezillon <boris.brezillon@free-electrons.com>
Date:   Wed Nov 22 02:38:20 2017 +0900

    UPSTREAM: mtd: nand: Fix data interface configuration logic
    
    When changing from one data interface setting to another, one has to
    ensure a specific sequence which is described in the ONFI spec.
    
    One of these constraints is that the CE line has go high after a reset
    before a command can be sent with the new data interface setting, which
    is not guaranteed by the current implementation.
    
    Rework the nand_reset() function and all the call sites to make sure the
    CE line is asserted and released when required.
    
    Also make sure to actually apply the new data interface setting on the
    first die.
    
    Change-Id: I5c8bd5b3342823510771c9fbb9fa637208cce037
    Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
    Fixes: d8e725dd8311 ("mtd: nand: automate NAND timings selection")
    Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
    Tested-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
    [Linux commit: 73f907fd5fa56b0066d199bdd7126bbd04f6cd7b]
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 3d841b3214565640ada80baa0f73885cddd216be)

diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index f452f59c7c..5054c0e7ab 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -1046,10 +1046,11 @@ static void __maybe_unused nand_release_data_interface(struct nand_chip *chip)
 /**
  * nand_reset - Reset and initialize a NAND device
  * @chip: The NAND chip
+ * @chipnr: Internal die id
  *
  * Returns 0 for success or negative error code otherwise
  */
-int nand_reset(struct nand_chip *chip)
+int nand_reset(struct nand_chip *chip, int chipnr)
 {
 	struct mtd_info *mtd = nand_to_mtd(chip);
 	int ret;
@@ -1058,9 +1059,17 @@ int nand_reset(struct nand_chip *chip)
 	if (ret)
 		return ret;
 
+	/*
+	 * The CS line has to be released before we can apply the new NAND
+	 * interface settings, hence this weird ->select_chip() dance.
+	 */
+	chip->select_chip(mtd, chipnr);
 	chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
+	chip->select_chip(mtd, -1);
 
+	chip->select_chip(mtd, chipnr);
 	ret = nand_setup_data_interface(chip);
+	chip->select_chip(mtd, -1);
 	if (ret)
 		return ret;
 
@@ -2746,10 +2755,6 @@ static int nand_do_write_oob(struct mtd_info *mtd, loff_t to,
 	}
 
 	chipnr = (int)(to >> chip->chip_shift);
-	chip->select_chip(mtd, chipnr);
-
-	/* Shift to get page */
-	page = (int)(to >> chip->page_shift);
 
 	/*
 	 * Reset the chip. Some chips (like the Toshiba TC5832DC found in one
@@ -2757,7 +2762,12 @@ static int nand_do_write_oob(struct mtd_info *mtd, loff_t to,
 	 * if we don't do this. I have no clue why, but I seem to have 'fixed'
 	 * it in the doc2000 driver in August 1999.  dwmw2.
 	 */
-	nand_reset(chip);
+	nand_reset(chip, chipnr);
+
+	chip->select_chip(mtd, chipnr);
+
+	/* Shift to get page */
+	page = (int)(to >> chip->page_shift);
 
 	/* Check, if it is write protected */
 	if (nand_check_wp(mtd)) {
@@ -3771,14 +3781,14 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
 	int i, maf_idx;
 	u8 id_data[8];
 
-	/* Select the device */
-	chip->select_chip(mtd, 0);
-
 	/*
 	 * Reset the chip, required by some chips (e.g. Micron MT29FxGxxxxx)
 	 * after power-up.
 	 */
-	nand_reset(chip);
+	nand_reset(chip, 0);
+
+	/* Select the device */
+	chip->select_chip(mtd, 0);
 
 	/* Send the command for reading device ID */
 	chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
@@ -4033,17 +4043,31 @@ int nand_scan_ident(struct mtd_info *mtd, int maxchips,
 		return PTR_ERR(type);
 	}
 
+	/* Initialize the ->data_interface field. */
 	ret = nand_init_data_interface(chip);
 	if (ret)
 		return ret;
 
+	/*
+	 * Setup the data interface correctly on the chip and controller side.
+	 * This explicit call to nand_setup_data_interface() is only required
+	 * for the first die, because nand_reset() has been called before
+	 * ->data_interface and ->default_onfi_timing_mode were set.
+	 * For the other dies, nand_reset() will automatically switch to the
+	 * best mode for us.
+	 */
+	ret = nand_setup_data_interface(chip);
+	if (ret)
+		return ret;
+
 	chip->select_chip(mtd, -1);
 
 	/* Check for a chip array */
 	for (i = 1; i < maxchips; i++) {
-		chip->select_chip(mtd, i);
 		/* See comment in nand_get_flash_type for reset */
-		nand_reset(chip);
+		nand_reset(chip, i);
+
+		chip->select_chip(mtd, i);
 		/* Send the command for reading device ID */
 		chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
 		/* Read manufacturer and device IDs */
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 72015ebaad..05358f0522 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -1185,6 +1185,6 @@ int nand_check_erased_ecc_chunk(void *data, int datalen,
 				int threshold);
 
 /* Reset and initialize a NAND device */
-int nand_reset(struct nand_chip *chip);
+int nand_reset(struct nand_chip *chip, int chipnr);
 
 #endif /* __LINUX_MTD_NAND_H */

commit 38657f6e0f13dbc965ee944088105e5d247ba047
Author: Boris Brezillon <boris.brezillon@free-electrons.com>
Date:   Wed Nov 22 02:38:19 2017 +0900

    UPSTREAM: mtd: nand: automate NAND timings selection
    
    The NAND framework provides several helpers to query timing modes supported
    by a NAND chip, but this implies that all NAND controller drivers have
    to implement the same timings selection dance. Also currently NAND
    devices can be resetted at arbitrary places which also resets the timing
    for ONFI chips to timing mode 0.
    
    Provide a common logic to select the best timings based on ONFI or
    ->onfi_timing_mode_default information. Hook this into nand_reset()
    to make sure the new timing is applied each time during a reset.
    
    NAND controller willing to support timings adjustment should just
    implement the ->setup_data_interface() method.
    
    Change-Id: I9a70d62e3e7144d348ee98bb15cc70f2d229eb65
    Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
    Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
    [Linux commit: d8e725dd831186a3595036b2b1df9f68cbc6efa3]
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 27c4792cd233ba68fa15aaa885d0f53db7b5728a)

diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 77da6fa9a1..f452f59c7c 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -901,6 +901,148 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip)
 	return status;
 }
 
+/**
+ * nand_reset_data_interface - Reset data interface and timings
+ * @chip: The NAND chip
+ *
+ * Reset the Data interface and timings to ONFI mode 0.
+ *
+ * Returns 0 for success or negative error code otherwise.
+ */
+static int nand_reset_data_interface(struct nand_chip *chip)
+{
+	struct mtd_info *mtd = nand_to_mtd(chip);
+	const struct nand_data_interface *conf;
+	int ret;
+
+	if (!chip->setup_data_interface)
+		return 0;
+
+	/*
+	 * The ONFI specification says:
+	 * "
+	 * To transition from NV-DDR or NV-DDR2 to the SDR data
+	 * interface, the host shall use the Reset (FFh) command
+	 * using SDR timing mode 0. A device in any timing mode is
+	 * required to recognize Reset (FFh) command issued in SDR
+	 * timing mode 0.
+	 * "
+	 *
+	 * Configure the data interface in SDR mode and set the
+	 * timings to timing mode 0.
+	 */
+
+	conf = nand_get_default_data_interface();
+	ret = chip->setup_data_interface(mtd, conf, false);
+	if (ret)
+		pr_err("Failed to configure data interface to SDR timing mode 0\n");
+
+	return ret;
+}
+
+/**
+ * nand_setup_data_interface - Setup the best data interface and timings
+ * @chip: The NAND chip
+ *
+ * Find and configure the best data interface and NAND timings supported by
+ * the chip and the driver.
+ * First tries to retrieve supported timing modes from ONFI information,
+ * and if the NAND chip does not support ONFI, relies on the
+ * ->onfi_timing_mode_default specified in the nand_ids table.
+ *
+ * Returns 0 for success or negative error code otherwise.
+ */
+static int nand_setup_data_interface(struct nand_chip *chip)
+{
+	struct mtd_info *mtd = nand_to_mtd(chip);
+	int ret;
+
+	if (!chip->setup_data_interface || !chip->data_interface)
+		return 0;
+
+	/*
+	 * Ensure the timing mode has been changed on the chip side
+	 * before changing timings on the controller side.
+	 */
+	if (chip->onfi_version) {
+		u8 tmode_param[ONFI_SUBFEATURE_PARAM_LEN] = {
+			chip->onfi_timing_mode_default,
+		};
+
+		ret = chip->onfi_set_features(mtd, chip,
+				ONFI_FEATURE_ADDR_TIMING_MODE,
+				tmode_param);
+		if (ret)
+			goto err;
+	}
+
+	ret = chip->setup_data_interface(mtd, chip->data_interface, false);
+err:
+	return ret;
+}
+
+/**
+ * nand_init_data_interface - find the best data interface and timings
+ * @chip: The NAND chip
+ *
+ * Find the best data interface and NAND timings supported by the chip
+ * and the driver.
+ * First tries to retrieve supported timing modes from ONFI information,
+ * and if the NAND chip does not support ONFI, relies on the
+ * ->onfi_timing_mode_default specified in the nand_ids table. After this
+ * function nand_chip->data_interface is initialized with the best timing mode
+ * available.
+ *
+ * Returns 0 for success or negative error code otherwise.
+ */
+static int nand_init_data_interface(struct nand_chip *chip)
+{
+	struct mtd_info *mtd = nand_to_mtd(chip);
+	int modes, mode, ret;
+
+	if (!chip->setup_data_interface)
+		return 0;
+
+	/*
+	 * First try to identify the best timings from ONFI parameters and
+	 * if the NAND does not support ONFI, fallback to the default ONFI
+	 * timing mode.
+	 */
+	modes = onfi_get_async_timing_mode(chip);
+	if (modes == ONFI_TIMING_MODE_UNKNOWN) {
+		if (!chip->onfi_timing_mode_default)
+			return 0;
+
+		modes = GENMASK(chip->onfi_timing_mode_default, 0);
+	}
+
+	chip->data_interface = kzalloc(sizeof(*chip->data_interface),
+				       GFP_KERNEL);
+	if (!chip->data_interface)
+		return -ENOMEM;
+
+	for (mode = fls(modes) - 1; mode >= 0; mode--) {
+		ret = onfi_init_data_interface(chip, chip->data_interface,
+					       NAND_SDR_IFACE, mode);
+		if (ret)
+			continue;
+
+		ret = chip->setup_data_interface(mtd, chip->data_interface,
+						 true);
+		if (!ret) {
+			chip->onfi_timing_mode_default = mode;
+			break;
+		}
+	}
+
+	return 0;
+}
+
+static void __maybe_unused nand_release_data_interface(struct nand_chip *chip)
+{
+	kfree(chip->data_interface);
+}
+
 /**
  * nand_reset - Reset and initialize a NAND device
  * @chip: The NAND chip
@@ -910,9 +1052,18 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip)
 int nand_reset(struct nand_chip *chip)
 {
 	struct mtd_info *mtd = nand_to_mtd(chip);
+	int ret;
+
+	ret = nand_reset_data_interface(chip);
+	if (ret)
+		return ret;
 
 	chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
 
+	ret = nand_setup_data_interface(chip);
+	if (ret)
+		return ret;
+
 	return 0;
 }
 
@@ -3882,6 +4033,10 @@ int nand_scan_ident(struct mtd_info *mtd, int maxchips,
 		return PTR_ERR(type);
 	}
 
+	ret = nand_init_data_interface(chip);
+	if (ret)
+		return ret;
+
 	chip->select_chip(mtd, -1);
 
 	/* Check for a chip array */
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 0c6be05709..72015ebaad 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -764,10 +764,9 @@ nand_get_sdr_timings(const struct nand_data_interface *conf)
  *                      also from the datasheet. It is the recommended ECC step
  *			size, if known; if unknown, set to zero.
  * @onfi_timing_mode_default: [INTERN] default ONFI timing mode. This field is
- *			      either deduced from the datasheet if the NAND
- *			      chip is not ONFI compliant or set to 0 if it is
- *			      (an ONFI chip is always configured in mode 0
- *			      after a NAND reset)
+ *			      set to the actually used ONFI mode if the chip is
+ *			      ONFI compliant or deduced from the datasheet if
+ *			      the NAND chip is not ONFI compliant.
  * @numchips:		[INTERN] number of physical chips
  * @chipsize:		[INTERN] the size of one chip for multichip arrays
  * @pagemask:		[INTERN] page number mask = number of (pages / chip) - 1
@@ -787,6 +786,7 @@ nand_get_sdr_timings(const struct nand_data_interface *conf)
  * @read_retries:	[INTERN] the number of read retry modes supported
  * @onfi_set_features:	[REPLACEABLE] set the features for ONFI nand
  * @onfi_get_features:	[REPLACEABLE] get the features for ONFI nand
+ * @setup_data_interface: [OPTIONAL] setup the data interface and timing
  * @bbt:		[INTERN] bad block table pointer
  * @bbt_td:		[REPLACEABLE] bad block table descriptor for flash
  *			lookup.
@@ -835,6 +835,10 @@ struct nand_chip {
 	int (*onfi_get_features)(struct mtd_info *mtd, struct nand_chip *chip,
 			int feature_addr, uint8_t *subfeature_para);
 	int (*setup_read_retry)(struct mtd_info *mtd, int retry_mode);
+	int (*setup_data_interface)(struct mtd_info *mtd,
+				    const struct nand_data_interface *conf,
+				    bool check_only);
+
 
 	int chip_delay;
 	unsigned int options;
@@ -864,6 +868,8 @@ struct nand_chip {
 #endif
 	struct nand_jedec_params jedec_params;
  
+	struct nand_data_interface *data_interface;
+
 	int read_retries;
 
 	flstate_t state;

commit 0f9f2da379f50e84bb35abf5bf36fa2681648e3d
Author: Sascha Hauer <s.hauer@pengutronix.de>
Date:   Wed Nov 22 02:38:18 2017 +0900

    UPSTREAM: mtd: nand: Expose data interface for ONFI mode 0
    
    The nand layer will need ONFI mode 0 to use it as timing mode
    before and right after reset.
    
    Change-Id: If79882c9ae5256c817f331157bf108148b214b39
    Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
    Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
    [Linux commit: 6e1f9708dbf3c50a8da93c1952a01a7a2acb5e66]
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit b893e83330662393ff40d4dc8cb2733599beb26a)

diff --git a/drivers/mtd/nand/nand_timings.c b/drivers/mtd/nand/nand_timings.c
index b055d27654..ba4f22f12d 100644
--- a/drivers/mtd/nand/nand_timings.c
+++ b/drivers/mtd/nand/nand_timings.c
@@ -297,3 +297,14 @@ int onfi_init_data_interface(struct nand_chip *chip,
 	return 0;
 }
 EXPORT_SYMBOL(onfi_init_data_interface);
+
+/**
+ * nand_get_default_data_interface - [NAND Interface] Retrieve NAND
+ * data interface for mode 0. This is used as default timing after
+ * reset.
+ */
+const struct nand_data_interface *nand_get_default_data_interface(void)
+{
+	return &onfi_sdr_timings[0];
+}
+EXPORT_SYMBOL(nand_get_default_data_interface);
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index ec6085f6a1..0c6be05709 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -1170,6 +1170,8 @@ uint8_t nand_read_byte(struct mtd_info *mtd);
 
 /* get timing characteristics from ONFI timing mode. */
 const struct nand_sdr_timings *onfi_async_timing_mode_to_sdr_timings(int mode);
+/* get data interface from ONFI timing mode 0, used after reset. */
+const struct nand_data_interface *nand_get_default_data_interface(void);
 
 int nand_check_erased_ecc_chunk(void *data, int datalen,
 				void *ecc, int ecclen,

commit e56ea81c677f325960f0956285b0553223664dbb
Author: Sascha Hauer <s.hauer@pengutronix.de>
Date:   Wed Nov 22 02:38:17 2017 +0900

    UPSTREAM: mtd: nand: convert ONFI mode into data interface
    
    struct nand_data_interface is the designated type to pass to
    the NAND drivers to configure the timing. To simplify further
    patches convert the onfi_sdr_timings array from type struct
    nand_sdr_timings nand_data_interface.
    
    Change-Id: I9c9422bf02986844e3f6b57381ca62ed9c5a66b7
    Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
    Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
    [Linux commit: b1dd3ca203fccd111926c3f6ac59bf903ec62b05]
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 46deff57da190fee1a902ecfbf951cd4cfe8494e)

diff --git a/drivers/mtd/nand/nand_timings.c b/drivers/mtd/nand/nand_timings.c
index 53dcbd323d..b055d27654 100644
--- a/drivers/mtd/nand/nand_timings.c
+++ b/drivers/mtd/nand/nand_timings.c
@@ -12,228 +12,246 @@
 #include <linux/kernel.h>
 #include <linux/mtd/nand.h>
 
-static const struct nand_sdr_timings onfi_sdr_timings[] = {
+static const struct nand_data_interface onfi_sdr_timings[] = {
 	/* Mode 0 */
 	{
-		.tADL_min = 200000,
-		.tALH_min = 20000,
-		.tALS_min = 50000,
-		.tAR_min = 25000,
-		.tCEA_max = 100000,
-		.tCEH_min = 20000,
-		.tCH_min = 20000,
-		.tCHZ_max = 100000,
-		.tCLH_min = 20000,
-		.tCLR_min = 20000,
-		.tCLS_min = 50000,
-		.tCOH_min = 0,
-		.tCS_min = 70000,
-		.tDH_min = 20000,
-		.tDS_min = 40000,
-		.tFEAT_max = 1000000,
-		.tIR_min = 10000,
-		.tITC_max = 1000000,
-		.tRC_min = 100000,
-		.tREA_max = 40000,
-		.tREH_min = 30000,
-		.tRHOH_min = 0,
-		.tRHW_min = 200000,
-		.tRHZ_max = 200000,
-		.tRLOH_min = 0,
-		.tRP_min = 50000,
-		.tRST_max = 250000000000ULL,
-		.tWB_max = 200000,
-		.tRR_min = 40000,
-		.tWC_min = 100000,
-		.tWH_min = 30000,
-		.tWHR_min = 120000,
-		.tWP_min = 50000,
-		.tWW_min = 100000,
+		.type = NAND_SDR_IFACE,
+		.timings.sdr = {
+			.tADL_min = 400000,
+			.tALH_min = 20000,
+			.tALS_min = 50000,
+			.tAR_min = 25000,
+			.tCEA_max = 100000,
+			.tCEH_min = 20000,
+			.tCH_min = 20000,
+			.tCHZ_max = 100000,
+			.tCLH_min = 20000,
+			.tCLR_min = 20000,
+			.tCLS_min = 50000,
+			.tCOH_min = 0,
+			.tCS_min = 70000,
+			.tDH_min = 20000,
+			.tDS_min = 40000,
+			.tFEAT_max = 1000000,
+			.tIR_min = 10000,
+			.tITC_max = 1000000,
+			.tRC_min = 100000,
+			.tREA_max = 40000,
+			.tREH_min = 30000,
+			.tRHOH_min = 0,
+			.tRHW_min = 200000,
+			.tRHZ_max = 200000,
+			.tRLOH_min = 0,
+			.tRP_min = 50000,
+			.tRR_min = 40000,
+			.tRST_max = 250000000000ULL,
+			.tWB_max = 200000,
+			.tWC_min = 100000,
+			.tWH_min = 30000,
+			.tWHR_min = 120000,
+			.tWP_min = 50000,
+			.tWW_min = 100000,
+		},
 	},
 	/* Mode 1 */
 	{
-		.tADL_min = 100000,
-		.tALH_min = 10000,
-		.tALS_min = 25000,
-		.tAR_min = 10000,
-		.tCEA_max = 45000,
-		.tCEH_min = 20000,
-		.tCH_min = 10000,
-		.tCHZ_max = 50000,
-		.tCLH_min = 10000,
-		.tCLR_min = 10000,
-		.tCLS_min = 25000,
-		.tCOH_min = 15000,
-		.tCS_min = 35000,
-		.tDH_min = 10000,
-		.tDS_min = 20000,
-		.tFEAT_max = 1000000,
-		.tIR_min = 0,
-		.tITC_max = 1000000,
-		.tRC_min = 50000,
-		.tREA_max = 30000,
-		.tREH_min = 15000,
-		.tRHOH_min = 15000,
-		.tRHW_min = 100000,
-		.tRHZ_max = 100000,
-		.tRLOH_min = 0,
-		.tRP_min = 25000,
-		.tRR_min = 20000,
-		.tRST_max = 500000000,
-		.tWB_max = 100000,
-		.tWC_min = 45000,
-		.tWH_min = 15000,
-		.tWHR_min = 80000,
-		.tWP_min = 25000,
-		.tWW_min = 100000,
+		.type = NAND_SDR_IFACE,
+		.timings.sdr = {
+			.tADL_min = 400000,
+			.tALH_min = 10000,
+			.tALS_min = 25000,
+			.tAR_min = 10000,
+			.tCEA_max = 45000,
+			.tCEH_min = 20000,
+			.tCH_min = 10000,
+			.tCHZ_max = 50000,
+			.tCLH_min = 10000,
+			.tCLR_min = 10000,
+			.tCLS_min = 25000,
+			.tCOH_min = 15000,
+			.tCS_min = 35000,
+			.tDH_min = 10000,
+			.tDS_min = 20000,
+			.tFEAT_max = 1000000,
+			.tIR_min = 0,
+			.tITC_max = 1000000,
+			.tRC_min = 50000,
+			.tREA_max = 30000,
+			.tREH_min = 15000,
+			.tRHOH_min = 15000,
+			.tRHW_min = 100000,
+			.tRHZ_max = 100000,
+			.tRLOH_min = 0,
+			.tRP_min = 25000,
+			.tRR_min = 20000,
+			.tRST_max = 500000000,
+			.tWB_max = 100000,
+			.tWC_min = 45000,
+			.tWH_min = 15000,
+			.tWHR_min = 80000,
+			.tWP_min = 25000,
+			.tWW_min = 100000,
+		},
 	},
 	/* Mode 2 */
 	{
-		.tADL_min = 100000,
-		.tALH_min = 10000,
-		.tALS_min = 15000,
-		.tAR_min = 10000,
-		.tCEA_max = 30000,
-		.tCEH_min = 20000,
-		.tCH_min = 10000,
-		.tCHZ_max = 50000,
-		.tCLH_min = 10000,
-		.tCLR_min = 10000,
-		.tCLS_min = 15000,
-		.tCOH_min = 15000,
-		.tCS_min = 25000,
-		.tDH_min = 5000,
-		.tDS_min = 15000,
-		.tFEAT_max = 1000000,
-		.tIR_min = 0,
-		.tITC_max = 1000000,
-		.tRC_min = 35000,
-		.tREA_max = 25000,
-		.tREH_min = 15000,
-		.tRHOH_min = 15000,
-		.tRHW_min = 100000,
-		.tRHZ_max = 100000,
-		.tRLOH_min = 0,
-		.tRR_min = 20000,
-		.tRST_max = 500000000,
-		.tWB_max = 100000,
-		.tRP_min = 17000,
-		.tWC_min = 35000,
-		.tWH_min = 15000,
-		.tWHR_min = 80000,
-		.tWP_min = 17000,
-		.tWW_min = 100000,
+		.type = NAND_SDR_IFACE,
+		.timings.sdr = {
+			.tADL_min = 400000,
+			.tALH_min = 10000,
+			.tALS_min = 15000,
+			.tAR_min = 10000,
+			.tCEA_max = 30000,
+			.tCEH_min = 20000,
+			.tCH_min = 10000,
+			.tCHZ_max = 50000,
+			.tCLH_min = 10000,
+			.tCLR_min = 10000,
+			.tCLS_min = 15000,
+			.tCOH_min = 15000,
+			.tCS_min = 25000,
+			.tDH_min = 5000,
+			.tDS_min = 15000,
+			.tFEAT_max = 1000000,
+			.tIR_min = 0,
+			.tITC_max = 1000000,
+			.tRC_min = 35000,
+			.tREA_max = 25000,
+			.tREH_min = 15000,
+			.tRHOH_min = 15000,
+			.tRHW_min = 100000,
+			.tRHZ_max = 100000,
+			.tRLOH_min = 0,
+			.tRR_min = 20000,
+			.tRST_max = 500000000,
+			.tWB_max = 100000,
+			.tRP_min = 17000,
+			.tWC_min = 35000,
+			.tWH_min = 15000,
+			.tWHR_min = 80000,
+			.tWP_min = 17000,
+			.tWW_min = 100000,
+		},
 	},
 	/* Mode 3 */
 	{
-		.tADL_min = 100000,
-		.tALH_min = 5000,
-		.tALS_min = 10000,
-		.tAR_min = 10000,
-		.tCEA_max = 25000,
-		.tCEH_min = 20000,
-		.tCH_min = 5000,
-		.tCHZ_max = 50000,
-		.tCLH_min = 5000,
-		.tCLR_min = 10000,
-		.tCLS_min = 10000,
-		.tCOH_min = 15000,
-		.tCS_min = 25000,
-		.tDH_min = 5000,
-		.tDS_min = 10000,
-		.tFEAT_max = 1000000,
-		.tIR_min = 0,
-		.tITC_max = 1000000,
-		.tRC_min = 30000,
-		.tREA_max = 20000,
-		.tREH_min = 10000,
-		.tRHOH_min = 15000,
-		.tRHW_min = 100000,
-		.tRHZ_max = 100000,
-		.tRLOH_min = 0,
-		.tRP_min = 15000,
-		.tRR_min = 20000,
-		.tRST_max = 500000000,
-		.tWB_max = 100000,
-		.tWC_min = 30000,
-		.tWH_min = 10000,
-		.tWHR_min = 80000,
-		.tWP_min = 15000,
-		.tWW_min = 100000,
+		.type = NAND_SDR_IFACE,
+		.timings.sdr = {
+			.tADL_min = 400000,
+			.tALH_min = 5000,
+			.tALS_min = 10000,
+			.tAR_min = 10000,
+			.tCEA_max = 25000,
+			.tCEH_min = 20000,
+			.tCH_min = 5000,
+			.tCHZ_max = 50000,
+			.tCLH_min = 5000,
+			.tCLR_min = 10000,
+			.tCLS_min = 10000,
+			.tCOH_min = 15000,
+			.tCS_min = 25000,
+			.tDH_min = 5000,
+			.tDS_min = 10000,
+			.tFEAT_max = 1000000,
+			.tIR_min = 0,
+			.tITC_max = 1000000,
+			.tRC_min = 30000,
+			.tREA_max = 20000,
+			.tREH_min = 10000,
+			.tRHOH_min = 15000,
+			.tRHW_min = 100000,
+			.tRHZ_max = 100000,
+			.tRLOH_min = 0,
+			.tRP_min = 15000,
+			.tRR_min = 20000,
+			.tRST_max = 500000000,
+			.tWB_max = 100000,
+			.tWC_min = 30000,
+			.tWH_min = 10000,
+			.tWHR_min = 80000,
+			.tWP_min = 15000,
+			.tWW_min = 100000,
+		},
 	},
 	/* Mode 4 */
 	{
-		.tADL_min = 70000,
-		.tALH_min = 5000,
-		.tALS_min = 10000,
-		.tAR_min = 10000,
-		.tCEA_max = 25000,
-		.tCEH_min = 20000,
-		.tCH_min = 5000,
-		.tCHZ_max = 30000,
-		.tCLH_min = 5000,
-		.tCLR_min = 10000,
-		.tCLS_min = 10000,
-		.tCOH_min = 15000,
-		.tCS_min = 20000,
-		.tDH_min = 5000,
-		.tDS_min = 10000,
-		.tFEAT_max = 1000000,
-		.tIR_min = 0,
-		.tITC_max = 1000000,
-		.tRC_min = 25000,
-		.tREA_max = 20000,
-		.tREH_min = 10000,
-		.tRHOH_min = 15000,
-		.tRHW_min = 100000,
-		.tRHZ_max = 100000,
-		.tRLOH_min = 5000,
-		.tRP_min = 12000,
-		.tRR_min = 20000,
-		.tRST_max = 500000000,
-		.tWB_max = 100000,
-		.tWC_min = 25000,
-		.tWH_min = 10000,
-		.tWHR_min = 80000,
-		.tWP_min = 12000,
-		.tWW_min = 100000,
+		.type = NAND_SDR_IFACE,
+		.timings.sdr = {
+			.tADL_min = 400000,
+			.tALH_min = 5000,
+			.tALS_min = 10000,
+			.tAR_min = 10000,
+			.tCEA_max = 25000,
+			.tCEH_min = 20000,
+			.tCH_min = 5000,
+			.tCHZ_max = 30000,
+			.tCLH_min = 5000,
+			.tCLR_min = 10000,
+			.tCLS_min = 10000,
+			.tCOH_min = 15000,
+			.tCS_min = 20000,
+			.tDH_min = 5000,
+			.tDS_min = 10000,
+			.tFEAT_max = 1000000,
+			.tIR_min = 0,
+			.tITC_max = 1000000,
+			.tRC_min = 25000,
+			.tREA_max = 20000,
+			.tREH_min = 10000,
+			.tRHOH_min = 15000,
+			.tRHW_min = 100000,
+			.tRHZ_max = 100000,
+			.tRLOH_min = 5000,
+			.tRP_min = 12000,
+			.tRR_min = 20000,
+			.tRST_max = 500000000,
+			.tWB_max = 100000,
+			.tWC_min = 25000,
+			.tWH_min = 10000,
+			.tWHR_min = 80000,
+			.tWP_min = 12000,
+			.tWW_min = 100000,
+		},
 	},
 	/* Mode 5 */
 	{
-		.tADL_min = 70000,
-		.tALH_min = 5000,
-		.tALS_min = 10000,
-		.tAR_min = 10000,
-		.tCEA_max = 25000,
-		.tCEH_min = 20000,
-		.tCH_min = 5000,
-		.tCHZ_max = 30000,
-		.tCLH_min = 5000,
-		.tCLR_min = 10000,
-		.tCLS_min = 10000,
-		.tCOH_min = 15000,
-		.tCS_min = 15000,
-		.tDH_min = 5000,
-		.tDS_min = 7000,
-		.tFEAT_max = 1000000,
-		.tIR_min = 0,
-		.tITC_max = 1000000,
-		.tRC_min = 20000,
-		.tREA_max = 16000,
-		.tREH_min = 7000,
-		.tRHOH_min = 15000,
-		.tRHW_min = 100000,
-		.tRHZ_max = 100000,
-		.tRLOH_min = 5000,
-		.tRP_min = 10000,
-		.tRR_min = 20000,
-		.tRST_max = 500000000,
-		.tWB_max = 100000,
-		.tWC_min = 20000,
-		.tWH_min = 7000,
-		.tWHR_min = 80000,
-		.tWP_min = 10000,
-		.tWW_min = 100000,
+		.type = NAND_SDR_IFACE,
+		.timings.sdr = {
+			.tADL_min = 400000,
+			.tALH_min = 5000,
+			.tALS_min = 10000,
+			.tAR_min = 10000,
+			.tCEA_max = 25000,
+			.tCEH_min = 20000,
+			.tCH_min = 5000,
+			.tCHZ_max = 30000,
+			.tCLH_min = 5000,
+			.tCLR_min = 10000,
+			.tCLS_min = 10000,
+			.tCOH_min = 15000,
+			.tCS_min = 15000,
+			.tDH_min = 5000,
+			.tDS_min = 7000,
+			.tFEAT_max = 1000000,
+			.tIR_min = 0,
+			.tITC_max = 1000000,
+			.tRC_min = 20000,
+			.tREA_max = 16000,
+			.tREH_min = 7000,
+			.tRHOH_min = 15000,
+			.tRHW_min = 100000,
+			.tRHZ_max = 100000,
+			.tRLOH_min = 5000,
+			.tRP_min = 10000,
+			.tRR_min = 20000,
+			.tRST_max = 500000000,
+			.tWB_max = 100000,
+			.tWC_min = 20000,
+			.tWH_min = 7000,
+			.tWHR_min = 80000,
+			.tWP_min = 10000,
+			.tWW_min = 100000,
+		},
 	},
 };
 
@@ -247,6 +265,35 @@ const struct nand_sdr_timings *onfi_async_timing_mode_to_sdr_timings(int mode)
 	if (mode < 0 || mode >= ARRAY_SIZE(onfi_sdr_timings))
 		return ERR_PTR(-EINVAL);
 
-	return &onfi_sdr_timings[mode];
+	return &onfi_sdr_timings[mode].timings.sdr;
 }
 EXPORT_SYMBOL(onfi_async_timing_mode_to_sdr_timings);
+
+/**
+ * onfi_init_data_interface - [NAND Interface] Initialize a data interface from
+ * given ONFI mode
+ * @iface: The data interface to be initialized
+ * @mode: The ONFI timing mode
+ */
+int onfi_init_data_interface(struct nand_chip *chip,
+			     struct nand_data_interface *iface,
+			     enum nand_data_interface_type type,
+			     int timing_mode)
+{
+	if (type != NAND_SDR_IFACE)
+		return -EINVAL;
+
+	if (timing_mode < 0 || timing_mode >= ARRAY_SIZE(onfi_sdr_timings))
+		return -EINVAL;
+
+	*iface = onfi_sdr_timings[timing_mode];
+
+	/*
+	 * TODO: initialize timings that cannot be deduced from timing mode:
+	 * tR, tPROG, tCCS, ...
+	 * These information are part of the ONFI parameter page.
+	 */
+
+	return 0;
+}
+EXPORT_SYMBOL(onfi_init_data_interface);
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index e3841da1cf..ec6085f6a1 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -584,6 +584,123 @@ struct nand_buffers {
 			      ARCH_DMA_MINALIGN)];
 };
 
+/**
+ * struct nand_sdr_timings - SDR NAND chip timings
+ *
+ * This struct defines the timing requirements of a SDR NAND chip.
+ * These information can be found in every NAND datasheets and the timings
+ * meaning are described in the ONFI specifications:
+ * www.onfi.org/~/media/ONFI/specs/onfi_3_1_spec.pdf (chapter 4.15 Timing
+ * Parameters)
+ *
+ * All these timings are expressed in picoseconds.
+ *
+ * @tALH_min: ALE hold time
+ * @tADL_min: ALE to data loading time
+ * @tALS_min: ALE setup time
+ * @tAR_min: ALE to RE# delay
+ * @tCEA_max: CE# access time
+ * @tCEH_min: CE# high hold time
+ * @tCH_min:  CE# hold time
+ * @tCHZ_max: CE# high to output hi-Z
+ * @tCLH_min: CLE hold time
+ * @tCLR_min: CLE to RE# delay
+ * @tCLS_min: CLE setup time
+ * @tCOH_min: CE# high to output hold
+ * @tCS_min: CE# setup time
+ * @tDH_min: Data hold time
+ * @tDS_min: Data setup time
+ * @tFEAT_max: Busy time for Set Features and Get Features
+ * @tIR_min: Output hi-Z to RE# low
+ * @tITC_max: Interface and Timing Mode Change time
+ * @tRC_min: RE# cycle time
+ * @tREA_max: RE# access time
+ * @tREH_min: RE# high hold time
+ * @tRHOH_min: RE# high to output hold
+ * @tRHW_min: RE# high to WE# low
+ * @tRHZ_max: RE# high to output hi-Z
+ * @tRLOH_min: RE# low to output hold
+ * @tRP_min: RE# pulse width
+ * @tRR_min: Ready to RE# low (data only)
+ * @tRST_max: Device reset time, measured from the falling edge of R/B# to the
+ *	      rising edge of R/B#.
+ * @tWB_max: WE# high to SR[6] low
+ * @tWC_min: WE# cycle time
+ * @tWH_min: WE# high hold time
+ * @tWHR_min: WE# high to RE# low
+ * @tWP_min: WE# pulse width
+ * @tWW_min: WP# transition to WE# low
+ */
+struct nand_sdr_timings {
+	u32 tALH_min;
+	u32 tADL_min;
+	u32 tALS_min;
+	u32 tAR_min;
+	u32 tCEA_max;
+	u32 tCEH_min;
+	u32 tCH_min;
+	u32 tCHZ_max;
+	u32 tCLH_min;
+	u32 tCLR_min;
+	u32 tCLS_min;
+	u32 tCOH_min;
+	u32 tCS_min;
+	u32 tDH_min;
+	u32 tDS_min;
+	u32 tFEAT_max;
+	u32 tIR_min;
+	u32 tITC_max;
+	u32 tRC_min;
+	u32 tREA_max;
+	u32 tREH_min;
+	u32 tRHOH_min;
+	u32 tRHW_min;
+	u32 tRHZ_max;
+	u32 tRLOH_min;
+	u32 tRP_min;
+	u32 tRR_min;
+	u64 tRST_max;
+	u32 tWB_max;
+	u32 tWC_min;
+	u32 tWH_min;
+	u32 tWHR_min;
+	u32 tWP_min;
+	u32 tWW_min;
+};
+
+/**
+ * enum nand_data_interface_type - NAND interface timing type
+ * @NAND_SDR_IFACE:	Single Data Rate interface
+ */
+enum nand_data_interface_type {
+	NAND_SDR_IFACE,
+};
+
+/**
+ * struct nand_data_interface - NAND interface timing
+ * @type:	type of the timing
+ * @timings:	The timing, type according to @type
+ */
+struct nand_data_interface {
+	enum nand_data_interface_type type;
+	union {
+		struct nand_sdr_timings sdr;
+	} timings;
+};
+
+/**
+ * nand_get_sdr_timings - get SDR timing from data interface
+ * @conf:	The data interface
+ */
+static inline const struct nand_sdr_timings *
+nand_get_sdr_timings(const struct nand_data_interface *conf)
+{
+	if (conf->type != NAND_SDR_IFACE)
+		return ERR_PTR(-EINVAL);
+
+	return &conf->timings.sdr;
+}
+
 /**
  * struct nand_chip - NAND Private Flash Chip Data
  * @mtd:		MTD device registered to the MTD framework
@@ -1004,6 +1121,11 @@ static inline int onfi_get_sync_timing_mode(struct nand_chip *chip)
 }
 #endif
 
+int onfi_init_data_interface(struct nand_chip *chip,
+			     struct nand_data_interface *iface,
+			     enum nand_data_interface_type type,
+			     int timing_mode);
+
 /*
  * Check if it is a SLC nand.
  * The !nand_is_slc() can be used to check the MLC/TLC nand chips.
@@ -1046,55 +1168,6 @@ void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len);
 void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len);
 uint8_t nand_read_byte(struct mtd_info *mtd);
 
-/*
- * struct nand_sdr_timings - SDR NAND chip timings
- *
- * This struct defines the timing requirements of a SDR NAND chip.
- * These informations can be found in every NAND datasheets and the timings
- * meaning are described in the ONFI specifications:
- * www.onfi.org/~/media/ONFI/specs/onfi_3_1_spec.pdf (chapter 4.15 Timing
- * Parameters)
- *
- * All these timings are expressed in picoseconds.
- */
-
-struct nand_sdr_timings {
-	u32 tALH_min;
-	u32 tADL_min;
-	u32 tALS_min;
-	u32 tAR_min;
-	u32 tCEA_max;
-	u32 tCEH_min;
-	u32 tCH_min;
-	u32 tCHZ_max;
-	u32 tCLH_min;
-	u32 tCLR_min;
-	u32 tCLS_min;
-	u32 tCOH_min;
-	u32 tCS_min;
-	u32 tDH_min;
-	u32 tDS_min;
-	u32 tFEAT_max;
-	u32 tIR_min;
-	u32 tITC_max;
-	u32 tRC_min;
-	u32 tREA_max;
-	u32 tREH_min;
-	u32 tRHOH_min;
-	u32 tRHW_min;
-	u32 tRHZ_max;
-	u32 tRLOH_min;
-	u32 tRP_min;
-	u32 tRR_min;
-	u64 tRST_max;
-	u32 tWB_max;
-	u32 tWC_min;
-	u32 tWH_min;
-	u32 tWHR_min;
-	u32 tWP_min;
-	u32 tWW_min;
-};
-
 /* get timing characteristics from ONFI timing mode. */
 const struct nand_sdr_timings *onfi_async_timing_mode_to_sdr_timings(int mode);
 

commit 2b17534304ae9125efcb8a01d23884ac012541e3
Author: Sascha Hauer <s.hauer@pengutronix.de>
Date:   Wed Nov 22 02:38:15 2017 +0900

    UPSTREAM: mtd: nand: Create a NAND reset function
    
    When NAND devices are resetted some initialization may have to be done,
    like for example they have to be configured for the timing mode that
    shall be used. To get a common place where this initialization can be
    implemented create a nand_reset() function. This currently only issues
    a NAND_CMD_RESET to the NAND device. The places issuing this command
    manually are replaced with a call to nand_reset().
    
    Change-Id: Id5e060d521d5f7835e928633515e6f4a02ba72fa
    Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
    Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
    [Linux commit: 2f94abfe35b210e7711af9202a3dcfc9e779219a]
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 1728eb577dc1de459196ca45068f3feced77a198)

diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 18f4169988..77da6fa9a1 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -901,6 +901,21 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip)
 	return status;
 }
 
+/**
+ * nand_reset - Reset and initialize a NAND device
+ * @chip: The NAND chip
+ *
+ * Returns 0 for success or negative error code otherwise
+ */
+int nand_reset(struct nand_chip *chip)
+{
+	struct mtd_info *mtd = nand_to_mtd(chip);
+
+	chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
+
+	return 0;
+}
+
 /**
  * nand_check_erased_buf - check if a buffer contains (almost) only 0xff data
  * @buf: buffer to test
@@ -2591,7 +2606,7 @@ static int nand_do_write_oob(struct mtd_info *mtd, loff_t to,
 	 * if we don't do this. I have no clue why, but I seem to have 'fixed'
 	 * it in the doc2000 driver in August 1999.  dwmw2.
 	 */
-	chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
+	nand_reset(chip);
 
 	/* Check, if it is write protected */
 	if (nand_check_wp(mtd)) {
@@ -3612,7 +3627,7 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
 	 * Reset the chip, required by some chips (e.g. Micron MT29FxGxxxxx)
 	 * after power-up.
 	 */
-	chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
+	nand_reset(chip);
 
 	/* Send the command for reading device ID */
 	chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
@@ -3873,7 +3888,7 @@ int nand_scan_ident(struct mtd_info *mtd, int maxchips,
 	for (i = 1; i < maxchips; i++) {
 		chip->select_chip(mtd, i);
 		/* See comment in nand_get_flash_type for reset */
-		chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
+		nand_reset(chip);
 		/* Send the command for reading device ID */
 		chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
 		/* Read manufacturer and device IDs */
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 04a645015d..e3841da1cf 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -1102,4 +1102,8 @@ int nand_check_erased_ecc_chunk(void *data, int datalen,
 				void *ecc, int ecclen,
 				void *extraoob, int extraooblen,
 				int threshold);
+
+/* Reset and initialize a NAND device */
+int nand_reset(struct nand_chip *chip);
+
 #endif /* __LINUX_MTD_NAND_H */

commit 5e8564cf419797f9095431e6eb6f0c00dfa423d2
Author: Boris Brezillon <boris.brezillon@free-electrons.com>
Date:   Wed Nov 22 02:38:13 2017 +0900

    UPSTREAM: mtd: nand: Add an option to maximize the ECC strength
    
    The generic NAND DT bindings allows one to tweak the ECC strength and
    step size to their need. It can be used to lower the ECC strength to
    match a bootloader/firmware config, but might also be used to get a better
    reliability.
    
    In the latter case, the user might want to use the maximum ECC strength
    without having to explicitly calculate the exact value (this value not
    only depends on the OOB size, but also on the NAND controller, and can
    be tricky to extract).
    
    Add a generic 'nand-ecc-maximize' DT property and the associated
    NAND_ECC_MAXIMIZE flag, to let ECC controller drivers select the best
    ECC strength and step-size on their own.
    
    Change-Id: I9303c1f99c9abc0656cf25825bb2d70b40aaf00d
    Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
    Acked-by: Rob Herring <robh@kernel.org>
    [Linux commit: ba78ee00e1ff84de9b3ad33edbd3ec599099ee82]
    [masahiro: of_property_read_bool -> fdt_getprop for U-Boot]
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 19d30ded88fb8b89c8426e6d95ded19ba900f314)

diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index efe3e4fe7b..18f4169988 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -3817,6 +3817,9 @@ static int nand_dt_init(struct mtd_info *mtd, struct nand_chip *chip, int node)
 	if (ecc_step > 0)
 		chip->ecc.size = ecc_step;
 
+	if (fdt_getprop(blob, node, "nand-ecc-maximize", NULL))
+		chip->ecc.options |= NAND_ECC_MAXIMIZE;
+
 	return 0;
 }
 #else
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index d55807b2e2..04a645015d 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -153,6 +153,7 @@ typedef enum {
  * pages and you want to rely on the default implementation.
  */
 #define NAND_ECC_GENERIC_ERASED_CHECK	BIT(0)
+#define NAND_ECC_MAXIMIZE		BIT(1)
 
 /* Bit mask for flags passed to do_nand_read_ecc */
 #define NAND_GET_DEVICE		0x80

commit b0f1578d3b7ecc4959b2d90e3ee09baf1a1370e1
Author: Jeff Westfahl <jeff.westfahl@ni.com>
Date:   Mon Nov 6 00:34:46 2017 -0800

    UPSTREAM: mtd: nand: zynq: Add a config option to use 1st stage bootloader timing
    
    In legacy method, 1st stage bootloader was used to configure the HW
    setting such as NAND timing. Hence, adding a config option in Zynq
    NAND driver for the compatibility of device that using 1st stage
    bootloder instead of U-boot SPL.
    
    This commit is to add config option
    CONFIG_NAND_ZYNQ_USE_BOOTLOADER1_TIMINGS that allow NAND driver use
    timing values set by the 1st stage bootloader, instead of the hard-coded
    values in the Zynq NAND driver.
    
    Change-Id: Ib0558453a4cdac2baf7f4441eccf6e42a0a3d175
    Signed-off-by: Jeff Westfahl <jeff.westfahl@ni.com>
    Signed-off-by: Wilson Lee <wilson.lee@ni.com>
    Cc: Joe Hershberger <joe.hershberger@ni.com>
    Cc: Keng Soon Cheah <keng.soon.cheah@ni.com>
    Cc: Chen Yee Chew <chen.yee.chew@ni.com>
    Cc: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
    Cc: Michal Simek <michal.simek@xilinx.com>
    Cc: Scott Wood <oss@buserror.net>
    Signed-off-by: Michal Simek <michal.simek@xilinx.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 8000d6ea3fc99fba43e84d870632ebde3117bb35)

diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index ec837e7819..218d3376e5 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -188,6 +188,13 @@ config NAND_ZYNQ
 	  This enables Nand driver support for Nand flash controller
 	  found on Zynq SoC.
 
+config NAND_ZYNQ_USE_BOOTLOADER1_TIMINGS
+	bool "Enable use of 1st stage bootloader timing for NAND"
+	depends on NAND_ZYNQ
+	help
+	  This flag prevent U-boot reconfigure NAND flash controller and reuse
+	  the NAND timing from 1st stage bootloader.
+
 comment "Generic NAND options"
 
 # Enhance depends when converting drivers to Kconfig which use this config
diff --git a/drivers/mtd/nand/zynq_nand.c b/drivers/mtd/nand/zynq_nand.c
index 948f05984c..8d6a663d72 100644
--- a/drivers/mtd/nand/zynq_nand.c
+++ b/drivers/mtd/nand/zynq_nand.c
@@ -35,6 +35,8 @@
 				(0x1 << 4)   |	/* Clear interrupt */ \
 				(0x1 << 6))	/* Disable ECC interrupt */
 
+#ifndef CONFIG_NAND_ZYNQ_USE_BOOTLOADER1_TIMINGS
+
 /* Assuming 50MHz clock (20ns cycle time) and 3V operation */
 #define ZYNQ_NAND_SET_CYCLES	((0x2 << 20) |	/* t_rr from nand_cycles */ \
 				(0x2 << 17)  |	/* t_ar from nand_cycles */ \
@@ -43,6 +45,7 @@
 				(0x2 << 8)   |	/* t_rea from nand_cycles */ \
 				(0x5 << 4)   |	/* t_wc from nand_cycles */ \
 				(0x5 << 0))	/* t_rc from nand_cycles */
+#endif
 
 
 #define ZYNQ_NAND_DIRECT_CMD	((0x4 << 23) |	/* Chip 0 from interface 1 */ \
@@ -245,8 +248,10 @@ static int zynq_nand_init_nand_flash(int option)
 
 	/* disable interrupts */
 	writel(ZYNQ_NAND_CLR_CONFIG, &zynq_nand_smc_base->cfr);
+#ifndef CONFIG_NAND_ZYNQ_USE_BOOTLOADER1_TIMINGS
 	/* Initialize the NAND interface by setting cycles and operation mode */
 	writel(ZYNQ_NAND_SET_CYCLES, &zynq_nand_smc_base->scr);
+#endif
 	if (option & NAND_BUSWIDTH_16)
 		writel(ZYNQ_NAND_SET_OPMODE_16BIT, &zynq_nand_smc_base->sor);
 	else

commit c79991b2aba705d9b00eebf2238e0ca122ec9e26
Author: Sean Nyekjaer <sean.nyekjaer@prevas.dk>
Date:   Mon Nov 20 11:53:38 2017 +0100

    UPSTREAM: mtd/spi: add support for is25lq040b
    
    Change-Id: I7714af2a6f097459e4d92b0abd7701629a7f918a
    Signed-off-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit b4fbcbc5a5e406731cccf62102e383f9dac62398)

diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c
index 9499af6e8d..49009b8c45 100644
--- a/drivers/mtd/spi/spi_flash_ids.c
+++ b/drivers/mtd/spi/spi_flash_ids.c
@@ -71,6 +71,7 @@ const struct spi_flash_info spi_flash_ids[] = {
 	{"is25lp032",	   INFO(0x9d6016, 0x0, 64 * 1024,    64, 0) },
 	{"is25lp064",	   INFO(0x9d6017, 0x0, 64 * 1024,   128, 0) },
 	{"is25lp128",	   INFO(0x9d6018, 0x0, 64 * 1024,   256, 0) },
+	{"is25lq040b",	   INFO(0x9d4013, 0x0, 64 * 1024,    64, 0) },
 #endif
 #ifdef CONFIG_SPI_FLASH_MACRONIX	/* MACRONIX */
 	{"mx25l2006e",	   INFO(0xc22012, 0x0, 64 * 1024,     4, 0) },

commit e0206ffd13810f72d62e9c85bf19d57483c89b8c
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Wed Nov 8 22:30:59 2017 +0100

    UPSTREAM: ubi: no NULL check needed before kmem_cache_destroy
    
    kmem_cache_destroy calls free which checks for NULL.
    
    Problem was indicated by coccinelle.
    
    Change-Id: I84963a558e12e43e0f63827861069f758164d4d3
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit cd5f33e5fc832effd70866fccd629046a6dac265)

diff --git a/drivers/mtd/ubi/attach.c b/drivers/mtd/ubi/attach.c
index 90fb74a5c9..33c176a77b 100644
--- a/drivers/mtd/ubi/attach.c
+++ b/drivers/mtd/ubi/attach.c
@@ -1205,8 +1205,7 @@ static void destroy_ai(struct ubi_attach_info *ai)
 		}
 	}
 
-	if (ai->aeb_slab_cache)
-		kmem_cache_destroy(ai->aeb_slab_cache);
+	kmem_cache_destroy(ai->aeb_slab_cache);
 
 	kfree(ai);
 }

commit c6f9c0388b4dfd1fb0f4d3cba3d3ba538e4fd550
Author: Tom Rini <trini@konsulko.com>
Date:   Fri Oct 20 16:55:51 2017 -0400

    UPSTREAM: omap2: nand: Make NAND_OMAP_GPMC_PREFETCH default
    
    This option provides better performance and should really always be
    enabled.  Make this be default y.
    
    Change-Id: Iecc4f7b97e6769ea01cb0a69c708efc98a6ccbc3
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Acked-by: Jeroen Hofstee <jeroen@myspectrum.nl>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 39e709611df05505ada013a37c5254b4c671b847)

diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 33af5c73d5..ec837e7819 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -55,6 +55,7 @@ config NAND_OMAP_GPMC
 config NAND_OMAP_GPMC_PREFETCH
 	bool "Enable GPMC Prefetch"
 	depends on NAND_OMAP_GPMC
+	default y
 	help
 	  On OMAP platforms that use the GPMC controller
 	  (CONFIG_NAND_OMAP_GPMC_PREFETCH), this options enables the code that

commit 66857eee684dea07b47ac673fb26ada005edc536
Author: Kurt Kanzenbach <kurt@linutronix.de>
Date:   Fri Oct 20 11:44:25 2017 +0200

    UPSTREAM: mtd: nand: fsl-ifc: fix support of multiple NAND devices
    
    Currently the chipselect used to identify the corresponding NAND chip
    is stored at the controller and only set during fsl_ifc_chip_init().
    This way, only the last NAND chip is working, as the previous value
    of cs_nand gets overwritten.
    
    In order to solve this issue the chipselect is computed on demand by
    evaluating the bank variable. Thus, the correct chipselect for each
    NAND chip operation is used.
    
    Tested on hardware with two NAND chips connected to the IFC
    controller.
    
    Change-Id: I13b556b8c9364811b5fc8d6e55a0c99f373e7c05
    Signed-off-by: Kurt Kanzenbach <kurt@linutronix.de>
    Acked-by: Scott Wood <oss@buserror.net>
    [YS: reformatted commit message]
    Reviewed-by: York Sun <york.sun@nxp.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 99145c488f782efd9175cec50775ea6c1023b2c2)

diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c
index bc6bdc9b2c..a757a3be44 100644
--- a/drivers/mtd/nand/fsl_ifc_nand.c
+++ b/drivers/mtd/nand/fsl_ifc_nand.c
@@ -48,7 +48,6 @@ struct fsl_ifc_ctrl {
 	/* device info */
 	struct fsl_ifc regs;
 	void __iomem *addr;      /* Address of assigned IFC buffer        */
-	unsigned int cs_nand;    /* On which chipsel NAND is connected	  */
 	unsigned int page;       /* Last page written to / read from      */
 	unsigned int read_bytes; /* Number of bytes read during command   */
 	unsigned int column;     /* Saved column from SEQIN               */
@@ -296,7 +295,7 @@ static int fsl_ifc_run_command(struct mtd_info *mtd)
 	int i;
 
 	/* set the chip select for NAND Transaction */
-	ifc_out32(&ifc->ifc_nand.nand_csel, ifc_ctrl->cs_nand);
+	ifc_out32(&ifc->ifc_nand.nand_csel, priv->bank << IFC_NAND_CSEL_SHIFT);
 
 	/* start read/write seq */
 	ifc_out32(&ifc->ifc_nand.nandseq_strt,
@@ -798,7 +797,7 @@ static void fsl_ifc_select_chip(struct mtd_info *mtd, int chip)
 {
 }
 
-static int fsl_ifc_sram_init(uint32_t ver)
+static int fsl_ifc_sram_init(struct fsl_ifc_mtd *priv, uint32_t ver)
 {
 	struct fsl_ifc_runtime *ifc = ifc_ctrl->regs.rregs;
 	uint32_t cs = 0, csor = 0, csor_8k = 0, csor_ext = 0;
@@ -823,7 +822,7 @@ static int fsl_ifc_sram_init(uint32_t ver)
 		return 1;
 	}
 
-	cs = ifc_ctrl->cs_nand >> IFC_NAND_CSEL_SHIFT;
+	cs = priv->bank;
 
 	/* Save CSOR and CSOR_ext */
 	csor = ifc_in32(&ifc_ctrl->regs.gregs->csor_cs[cs].csor);
@@ -850,7 +849,7 @@ static int fsl_ifc_sram_init(uint32_t ver)
 	ifc_out32(&ifc->ifc_nand.col0, 0x0);
 
 	/* set the chip select for NAND Transaction */
-	ifc_out32(&ifc->ifc_nand.nand_csel, ifc_ctrl->cs_nand);
+	ifc_out32(&ifc->ifc_nand.nand_csel, priv->bank << IFC_NAND_CSEL_SHIFT);
 
 	/* start read seq */
 	ifc_out32(&ifc->ifc_nand.nandseq_strt, IFC_NAND_SEQ_STRT_FIR_STRT);
@@ -911,10 +910,8 @@ static int fsl_ifc_chip_init(int devnum, u8 *addr)
 		csor = ifc_in32(&gregs->csor_cs[priv->bank].csor);
 
 		if ((cspr & CSPR_V) && (cspr & CSPR_MSEL) == CSPR_MSEL_NAND &&
-		    (cspr & CSPR_BA) == CSPR_PHYS_ADDR(phys_addr)) {
-			ifc_ctrl->cs_nand = priv->bank << IFC_NAND_CSEL_SHIFT;
+		    (cspr & CSPR_BA) == CSPR_PHYS_ADDR(phys_addr))
 			break;
-		}
 	}
 
 	if (priv->bank >= MAX_BANKS) {
@@ -1029,7 +1026,7 @@ static int fsl_ifc_chip_init(int devnum, u8 *addr)
 
 	ver = ifc_in32(&gregs->ifc_rev);
 	if (ver >= FSL_IFC_V1_1_0)
-		ret = fsl_ifc_sram_init(ver);
+		ret = fsl_ifc_sram_init(priv, ver);
 	if (ret)
 		return ret;
 

commit 0123fcdbfd1b9f1d17e879e97eaedda38fc95313
Author: Andre Przywara <andre.przywara@arm.com>
Date:   Thu Oct 5 00:27:21 2017 +0100

    UPSTREAM: SPL: SPI: select SPL_SPI_FLASH_SUPPORT on SPL_SPI_SUNXI
    
    The Allwinner SPI flash SPL boot support is guarded by the SPL_SPI_SUNXI
    symbol. But despite its generic name, the actual only use case for this
    is to provide SPI flash support to the SPL, which requires
    CONFIG_SPL_SPI_FLASH_SUPPORT to be defined.
    Select this symbol from the SPL_SPI_SUNXI Kconfig definition. This
    avoids doing this explicitly in the defconfig, and fixes SPI booting on
    the Pine64 SoPine (and -LTS version) and the OrangePi Win board (both with
    SPI flash).
    
    Change-Id: Ia1f73a4a0bcdd27a987609289f5b475ddbe92e8e
    Signed-off-by: Andre Przywara <andre.przywara@arm.com>
    Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit a722359de4e1f68ad2392b2eb88cfca55f129637)

diff --git a/configs/orangepi_pc2_defconfig b/configs/orangepi_pc2_defconfig
index 61b2d98705..ae732a8ee3 100644
--- a/configs/orangepi_pc2_defconfig
+++ b/configs/orangepi_pc2_defconfig
@@ -1,6 +1,5 @@
 CONFIG_ARM=y
 CONFIG_ARCH_SUNXI=y
-CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_MACH_SUN50I_H5=y
 CONFIG_DRAM_CLK=672
 CONFIG_DRAM_ZQ=3881977
diff --git a/configs/orangepi_zero_defconfig b/configs/orangepi_zero_defconfig
index 4d8d9262cb..64290ddd8f 100644
--- a/configs/orangepi_zero_defconfig
+++ b/configs/orangepi_zero_defconfig
@@ -1,6 +1,5 @@
 CONFIG_ARM=y
 CONFIG_ARCH_SUNXI=y
-CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_MACH_SUN8I_H3=y
 CONFIG_DRAM_CLK=624
 CONFIG_DRAM_ZQ=3881979
diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig
index 5700859ff2..6ba255d676 100644
--- a/drivers/mtd/spi/Kconfig
+++ b/drivers/mtd/spi/Kconfig
@@ -140,6 +140,7 @@ if SPL
 config SPL_SPI_SUNXI
 	bool "Support for SPI Flash on Allwinner SoCs in SPL"
 	depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUNXI_H3_H5 || MACH_SUN50I
+	select SPL_SPI_FLASH_SUPPORT
 	---help---
 	Enable support for SPI Flash. This option allows SPL to read from
 	sunxi SPI Flash. It uses the same method as the boot ROM, so does

commit 2c191464a150b84ed11f5f5e99b10212f80a6d8d
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Wed Oct 18 00:10:48 2017 +0900

    UPSTREAM: mtd: replace MTDDEBUG() with pr_debug()
    
    In old days, the MTD subsystem in Linux had debug facility like
    DEBUG(MTD_DEBUG_LEVEL1, ...).
    
    They were all replaced with pr_debug() until Linux 3.2.  See Linux
    commit 289c05222172 ("mtd: replace DEBUG() with pr_debug()").
    
    U-Boot still uses similar macros.  Covert all of them for easier sync.
    
    Done with the help of Coccinelle.
    
    The semantic patch I used is as follows:
    
    // <smpl>
    @@
    expression e1, e2;
    @@
    -MTDDEBUG(e1, e2)
    +pr_debug(e2)
    @@
    expression e1, e2;
    @@
    -MTDDEBUG(e1, e2,
    +pr_debug(e2,
     ...)
    // </smpl>
    
    Change-Id: Ibacb18e06c109869fac9f6ed950d3aa2194ed7d8
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 166cae20dd797dcb25fc550269792f15704d9c58)

diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index 7c10bfedc6..65dd83eced 100644
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@ -702,7 +702,7 @@ static int pmecc_choose_ecc(struct atmel_nand_host *host,
 	if (chip->onfi_version) {
 		*cap = chip->ecc_strength_ds;
 		*sector_size = chip->ecc_step_ds;
-		MTDDEBUG(MTD_DEBUG_LEVEL1, "ONFI params, minimum required ECC: %d bits in %d bytes\n",
+		pr_debug("ONFI params, minimum required ECC: %d bits in %d bytes\n",
 			 *cap, *sector_size);
 	}
 
@@ -863,9 +863,8 @@ static int atmel_pmecc_nand_init_params(struct nand_chip *nand,
 		host->pmecc_index_table_offset = ATMEL_PMECC_INDEX_OFFSET_1024;
 #endif
 
-	MTDDEBUG(MTD_DEBUG_LEVEL1,
-		"Initialize PMECC params, cap: %d, sector: %d\n",
-		cap, sector_size);
+	pr_debug("Initialize PMECC params, cap: %d, sector: %d\n",
+		 cap, sector_size);
 
 	host->pmecc = (struct pmecc_regs __iomem *) ATMEL_BASE_PMECC;
 	host->pmerrloc = (struct pmecc_errloc_regs __iomem *)
diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c
index 0624644581..2a01fd34e9 100644
--- a/drivers/mtd/nand/davinci_nand.c
+++ b/drivers/mtd/nand/davinci_nand.c
@@ -238,7 +238,7 @@ static int nand_davinci_correct_data(struct mtd_info *mtd, u_char *dat,
 				uint32_t find_byte = diff >> (12 + 3);
 
 				dat[find_byte] ^= find_bit;
-				MTDDEBUG(MTD_DEBUG_LEVEL0, "Correcting single "
+				pr_debug("Correcting single "
 					 "bit ECC error at offset: %d, bit: "
 					 "%d\n", find_byte, find_bit);
 				return 1;
@@ -248,12 +248,11 @@ static int nand_davinci_correct_data(struct mtd_info *mtd, u_char *dat,
 		} else if (!(diff & (diff - 1))) {
 			/* Single bit ECC error in the ECC itself,
 			   nothing to fix */
-			MTDDEBUG(MTD_DEBUG_LEVEL0, "Single bit ECC error in "
-				 "ECC.\n");
+			pr_debug("Single bit ECC error in " "ECC.\n");
 			return 1;
 		} else {
 			/* Uncorrectable error */
-			MTDDEBUG(MTD_DEBUG_LEVEL0, "ECC UNCORRECTED_ERROR 1\n");
+			pr_debug("ECC UNCORRECTED_ERROR 1\n");
 			return -EBADMSG;
 		}
 	}
diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
index 7221d0ba0d..764391c8d2 100644
--- a/drivers/mtd/nand/mxc_nand.c
+++ b/drivers/mtd/nand/mxc_nand.c
@@ -132,7 +132,7 @@ static void wait_op_done(struct mxc_nand_host *host, int max_retries,
 		udelay(1);
 	}
 	if (max_retries < 0) {
-		MTDDEBUG(MTD_DEBUG_LEVEL0, "%s(%d): INT not set\n",
+		pr_debug("%s(%d): INT not set\n",
 				__func__, param);
 	}
 }
@@ -143,7 +143,7 @@ static void wait_op_done(struct mxc_nand_host *host, int max_retries,
  */
 static void send_cmd(struct mxc_nand_host *host, uint16_t cmd)
 {
-	MTDDEBUG(MTD_DEBUG_LEVEL3, "send_cmd(host, 0x%x)\n", cmd);
+	pr_debug("send_cmd(host, 0x%x)\n", cmd);
 
 	writenfc(cmd, &host->regs->flash_cmd);
 	writenfc(NFC_CMD, &host->regs->operation);
@@ -159,7 +159,7 @@ static void send_cmd(struct mxc_nand_host *host, uint16_t cmd)
  */
 static void send_addr(struct mxc_nand_host *host, uint16_t addr)
 {
-	MTDDEBUG(MTD_DEBUG_LEVEL3, "send_addr(host, 0x%x)\n", addr);
+	pr_debug("send_addr(host, 0x%x)\n", addr);
 
 	writenfc(addr, &host->regs->flash_addr);
 	writenfc(NFC_ADDR, &host->regs->operation);
@@ -176,7 +176,7 @@ static void send_prog_page(struct mxc_nand_host *host, uint8_t buf_id,
 			int spare_only)
 {
 	if (spare_only)
-		MTDDEBUG(MTD_DEBUG_LEVEL1, "send_prog_page (%d)\n", spare_only);
+		pr_debug("send_prog_page (%d)\n", spare_only);
 
 	if (is_mxc_nfc_21() || is_mxc_nfc_32()) {
 		int i;
@@ -226,7 +226,7 @@ static void send_prog_page(struct mxc_nand_host *host, uint8_t buf_id,
 static void send_read_page(struct mxc_nand_host *host, uint8_t buf_id,
 		int spare_only)
 {
-	MTDDEBUG(MTD_DEBUG_LEVEL3, "send_read_page (%d)\n", spare_only);
+	pr_debug("send_read_page (%d)\n", spare_only);
 
 #if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
 	writenfc(buf_id, &host->regs->buf_addr);
@@ -392,8 +392,7 @@ static int mxc_nand_read_oob_syndrome(struct mtd_info *mtd,
 	uint8_t *bufpoi = buf;
 	int i, toread;
 
-	MTDDEBUG(MTD_DEBUG_LEVEL0,
-			"%s: Reading OOB area of page %u to oob %p\n",
+	pr_debug("%s: Reading OOB area of page %u to oob %p\n",
 			 __func__, page, buf);
 
 	chip->cmdfunc(mtd, NAND_CMD_READOOB, mtd->writesize, page);
@@ -493,8 +492,8 @@ static int mxc_nand_read_page_syndrome(struct mtd_info *mtd,
 	uint8_t *p = buf;
 	uint8_t *oob = chip->oob_poi;
 
-	MTDDEBUG(MTD_DEBUG_LEVEL1, "Reading page %u to buf %p oob %p\n",
-	      page, buf, oob);
+	pr_debug("Reading page %u to buf %p oob %p\n",
+		 page, buf, oob);
 
 	/* first read the data area and the available portion of OOB */
 	for (n = 0; eccsteps; n++, eccsteps--, p += eccsize) {
@@ -710,8 +709,7 @@ static int mxc_nand_correct_data(struct mtd_info *mtd, u_char *dat,
 	uint16_t ecc_status = readnfc(&host->regs->ecc_status_result);
 
 	if (((ecc_status & 0x3) == 2) || ((ecc_status >> 2) == 2)) {
-		MTDDEBUG(MTD_DEBUG_LEVEL0,
-		      "MXC_NAND: HWECC uncorrectable 2-bit ECC error\n");
+		pr_debug("MXC_NAND: HWECC uncorrectable 2-bit ECC error\n");
 		return -EBADMSG;
 	}
 
@@ -773,8 +771,7 @@ static uint16_t mxc_nand_read_word(struct mtd_info *mtd)
 	uint16_t col, ret;
 	uint16_t __iomem *p;
 
-	MTDDEBUG(MTD_DEBUG_LEVEL3,
-	      "mxc_nand_read_word(col = %d)\n", host->col_addr);
+	pr_debug("mxc_nand_read_word(col = %d)\n", host->col_addr);
 
 	col = host->col_addr;
 	/* Adjust saved column address */
@@ -824,9 +821,8 @@ static void mxc_nand_write_buf(struct mtd_info *mtd,
 	struct mxc_nand_host *host = nand_get_controller_data(nand_chip);
 	int n, col, i = 0;
 
-	MTDDEBUG(MTD_DEBUG_LEVEL3,
-	      "mxc_nand_write_buf(col = %d, len = %d)\n", host->col_addr,
-	      len);
+	pr_debug("mxc_nand_write_buf(col = %d, len = %d)\n", host->col_addr,
+		 len);
 
 	col = host->col_addr;
 
@@ -837,8 +833,7 @@ static void mxc_nand_write_buf(struct mtd_info *mtd,
 	n = mtd->writesize + mtd->oobsize - col;
 	n = min(len, n);
 
-	MTDDEBUG(MTD_DEBUG_LEVEL3,
-	      "%s:%d: col = %d, n = %d\n", __func__, __LINE__, col, n);
+	pr_debug("%s:%d: col = %d, n = %d\n", __func__, __LINE__, col, n);
 
 	while (n > 0) {
 		void __iomem *p;
@@ -850,8 +845,8 @@ static void mxc_nand_write_buf(struct mtd_info *mtd,
 						mtd->writesize + (col & ~3);
 		}
 
-		MTDDEBUG(MTD_DEBUG_LEVEL3, "%s:%d: p = %p\n", __func__,
-		      __LINE__, p);
+		pr_debug("%s:%d: p = %p\n", __func__,
+			 __LINE__, p);
 
 		if (((col | (unsigned long)&buf[i]) & 3) || n < 4) {
 			union {
@@ -873,9 +868,8 @@ static void mxc_nand_write_buf(struct mtd_info *mtd,
 
 			m = min(n, m) & ~3;
 
-			MTDDEBUG(MTD_DEBUG_LEVEL3,
-			      "%s:%d: n = %d, m = %d, i = %d, col = %d\n",
-			      __func__,  __LINE__, n, m, i, col);
+			pr_debug("%s:%d: n = %d, m = %d, i = %d, col = %d\n",
+				 __func__,  __LINE__, n, m, i, col);
 
 			mxc_nand_memcpy32(p, (uint32_t *)&buf[i], m);
 			col += m;
@@ -898,8 +892,8 @@ static void mxc_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
 	struct mxc_nand_host *host = nand_get_controller_data(nand_chip);
 	int n, col, i = 0;
 
-	MTDDEBUG(MTD_DEBUG_LEVEL3,
-	      "mxc_nand_read_buf(col = %d, len = %d)\n", host->col_addr, len);
+	pr_debug("mxc_nand_read_buf(col = %d, len = %d)\n", host->col_addr,
+		 len);
 
 	col = host->col_addr;
 
@@ -984,9 +978,8 @@ void mxc_nand_command(struct mtd_info *mtd, unsigned command,
 	struct nand_chip *nand_chip = mtd_to_nand(mtd);
 	struct mxc_nand_host *host = nand_get_controller_data(nand_chip);
 
-	MTDDEBUG(MTD_DEBUG_LEVEL3,
-	      "mxc_nand_command (cmd = 0x%x, col = 0x%x, page = 0x%x)\n",
-	      command, column, page_addr);
+	pr_debug("mxc_nand_command (cmd = 0x%x, col = 0x%x, page = 0x%x)\n",
+		 command, column, page_addr);
 
 	/* Reset command state information */
 	host->status_request = false;
diff --git a/drivers/mtd/nand/nand_bch.c b/drivers/mtd/nand/nand_bch.c
index c14520380e..6c20d53e7e 100644
--- a/drivers/mtd/nand/nand_bch.c
+++ b/drivers/mtd/nand/nand_bch.c
@@ -81,8 +81,8 @@ int nand_bch_correct_data(struct mtd_info *mtd, unsigned char *buf,
 				buf[errloc[i] >> 3] ^= (1 << (errloc[i] & 7));
 			/* else error in ecc, no action needed */
 
-			MTDDEBUG(MTD_DEBUG_LEVEL0, "%s: corrected bitflip %u\n",
-			      __func__, errloc[i]);
+			pr_debug("%s: corrected bitflip %u\n",
+				 __func__, errloc[i]);
 		}
 	} else if (count < 0) {
 		printk(KERN_ERR "ecc unrecoverable error\n");
diff --git a/drivers/mtd/onenand/onenand_base.c b/drivers/mtd/onenand/onenand_base.c
index 8282f683a5..86b1640357 100644
--- a/drivers/mtd/onenand/onenand_base.c
+++ b/drivers/mtd/onenand/onenand_base.c
@@ -858,7 +858,8 @@ static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from,
 	int ret = 0, boundary = 0;
 	int writesize = this->writesize;
 
-	MTDDEBUG(MTD_DEBUG_LEVEL3, "onenand_read_ops_nolock: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
+	pr_debug("onenand_read_ops_nolock: from = 0x%08x, len = %i\n",
+		 (unsigned int) from, (int) len);
 
 	if (ops->mode == MTD_OPS_AUTO_OOB)
 		oobsize = this->ecclayout->oobavail;
@@ -1007,7 +1008,8 @@ static int onenand_read_oob_nolock(struct mtd_info *mtd, loff_t from,
 
 	from += ops->ooboffs;
 
-	MTDDEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob_nolock: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
+	pr_debug("onenand_read_oob_nolock: from = 0x%08x, len = %i\n",
+		 (unsigned int) from, (int) len);
 
 	/* Initialize return length value */
 	ops->oobretlen = 0;
@@ -1214,7 +1216,8 @@ int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from,
 	size_t len = ops->ooblen;
 	u_char *buf = ops->oobbuf;
 
-	MTDDEBUG(MTD_DEBUG_LEVEL3, "onenand_bbt_read_oob: from = 0x%08x, len = %zi\n", (unsigned int) from, len);
+	pr_debug("onenand_bbt_read_oob: from = 0x%08x, len = %zi\n",
+		 (unsigned int) from, len);
 
 	readcmd = ONENAND_IS_4KB_PAGE(this) ?
 		ONENAND_CMD_READ : ONENAND_CMD_READOOB;
@@ -1417,7 +1420,8 @@ static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to,
 	u_char *oobbuf;
 	int ret = 0;
 
-	MTDDEBUG(MTD_DEBUG_LEVEL3, "onenand_write_ops_nolock: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
+	pr_debug("onenand_write_ops_nolock: to = 0x%08x, len = %i\n",
+		 (unsigned int) to, (int) len);
 
 	/* Initialize retlen, in case of early exit */
 	ops->retlen = 0;
@@ -1538,7 +1542,8 @@ static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to,
 
 	to += ops->ooboffs;
 
-	MTDDEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob_nolock: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
+	pr_debug("onenand_write_oob_nolock: to = 0x%08x, len = %i\n",
+		 (unsigned int) to, (int) len);
 
 	/* Initialize retlen, in case of early exit */
 	ops->oobretlen = 0;
@@ -1730,7 +1735,7 @@ int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
 	struct mtd_erase_region_info *region = NULL;
 	unsigned int region_end = 0;
 
-	MTDDEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n",
+	pr_debug("onenand_erase: start = 0x%08x, len = %i\n",
 			(unsigned int) addr, len);
 
 	if (FLEXONENAND(this)) {
@@ -1746,8 +1751,7 @@ int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
 		 * Erase region's start offset is always block start address.
 		 */
 		if (unlikely((addr - region->offset) & (block_size - 1))) {
-			MTDDEBUG(MTD_DEBUG_LEVEL0, "onenand_erase:"
-				" Unaligned address\n");
+			pr_debug("onenand_erase:" " Unaligned address\n");
 			return -EINVAL;
 		}
 	} else {
@@ -1755,16 +1759,14 @@ int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
 
 		/* Start address must align on block boundary */
 		if (unlikely(addr & (block_size - 1))) {
-			MTDDEBUG(MTD_DEBUG_LEVEL0, "onenand_erase:"
-						"Unaligned address\n");
+			pr_debug("onenand_erase:" "Unaligned address\n");
 			return -EINVAL;
 		}
 	}
 
 	/* Length must align on block boundary */
 	if (unlikely(len & (block_size - 1))) {
-		MTDDEBUG (MTD_DEBUG_LEVEL0,
-			 "onenand_erase: Length not block aligned\n");
+		pr_debug("onenand_erase: Length not block aligned\n");
 		return -EINVAL;
 	}
 
@@ -1793,12 +1795,12 @@ int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
 		/* Check, if it is write protected */
 		if (ret) {
 			if (ret == -EPERM)
-				MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_erase: "
-					  "Device is write protected!!!\n");
+				pr_debug("onenand_erase: "
+					 "Device is write protected!!!\n");
 			else
-				MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_erase: "
-					  "Failed erase, block %d\n",
-					onenand_block(this, addr));
+				pr_debug("onenand_erase: "
+					 "Failed erase, block %d\n",
+					 onenand_block(this, addr));
 			instr->state = MTD_ERASE_FAILED;
 			instr->fail_addr = addr;
 
@@ -1849,7 +1851,7 @@ erase_exit:
  */
 void onenand_sync(struct mtd_info *mtd)
 {
-	MTDDEBUG (MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
+	pr_debug("onenand_sync: called\n");
 
 	/* Grab the lock and see if the device is available */
 	onenand_get_device(mtd, FL_SYNCING);
diff --git a/drivers/mtd/onenand/onenand_bbt.c b/drivers/mtd/onenand/onenand_bbt.c
index 20507004ed..cde342aaec 100644
--- a/drivers/mtd/onenand/onenand_bbt.c
+++ b/drivers/mtd/onenand/onenand_bbt.c
@@ -160,9 +160,8 @@ static int onenand_isbad_bbt(struct mtd_info *mtd, loff_t offs, int allowbbt)
 	block = (int) (onenand_block(this, offs) << 1);
 	res = (bbm->bbt[block >> 3] >> (block & 0x06)) & 0x03;
 
-	MTDDEBUG (MTD_DEBUG_LEVEL2,
-		"onenand_isbad_bbt: bbt info for offs 0x%08x: (block %d) 0x%02x\n",
-		(unsigned int)offs, block >> 1, res);
+	pr_debug("onenand_isbad_bbt: bbt info for offs 0x%08x: (block %d) 0x%02x\n",
+		 (unsigned int)offs, block >> 1, res);
 
 	switch ((int)res) {
 	case 0x00:

commit 157f8461d468ad7bcd19ad9563b16c824c63bcd4
Author: Adam Ford <aford173@gmail.com>
Date:   Mon Oct 16 14:08:26 2017 -0500

    UPSTREAM: Convert CONFIG_NAND_OMAP_GPMC et al and CONFIG_NAND_MXC to Kconfig
    
    This converts the following to Kconfig:
       CONFIG_NAND_MXC
       CONFIG_NAND_OMAP_GPMC
       CONFIG_NAND_OMAP_GPMC_PREFETCH
       CONFIG_NAND_OMAP_ELM
       CONFIG_SPL_NAND_AM33XX_BCH
       CONFIG_SPL_NAND_SIMPLE
       CONFIG_SYS_NAND_BUSWIDTH_16BIT
    
    Change-Id: Ic2238bb7ba18d9ae37dfef7ac7593fd42e34ef7d
    Signed-off-by: Adam Ford <aford173@gmail.com>
    Reviewed-by: Heiko Schocher <hs@denx.de>
    [trini: Finish migration of CONFIG_SPL_NAND_SIMPLE, fix some build issues,
            add CONFIG_NAND_MXC so we can do CONFIG_SYS_NAND_BUSWIDTH_16BIT]
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 0a9ef45158d586017839d4b6fccd7f8f16672156)

diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 7efef6b84b..abd1aa7fe1 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -11,6 +11,7 @@ config OMAP34XX
 	select ARM_ERRATA_621766
 	select ARM_ERRATA_725233
 	select USE_TINY_PRINTF
+	imply NAND_OMAP_GPMC
 	imply SPL_EXT_SUPPORT
 	imply SPL_FAT_SUPPORT
 	imply SPL_GPIO_SUPPORT
@@ -30,6 +31,8 @@ config OMAP34XX
 config OMAP44XX
 	bool "OMAP44XX SoC"
 	select USE_TINY_PRINTF
+	imply NAND_OMAP_ELM
+	imply NAND_OMAP_GPMC
 	imply SPL_DISPLAY_PRINT
 	imply SPL_EXT_SUPPORT
 	imply SPL_FAT_SUPPORT
@@ -39,6 +42,7 @@ config OMAP44XX
 	imply SPL_LIBDISK_SUPPORT
 	imply SPL_LIBGENERIC_SUPPORT
 	imply SPL_MMC_SUPPORT
+	imply SPL_NAND_SIMPLE
 	imply SPL_NAND_SUPPORT
 	imply SPL_POWER_SUPPORT
 	imply SPL_SERIAL_SUPPORT
@@ -49,6 +53,8 @@ config OMAP54XX
 	bool "OMAP54XX SoC"
 	select ARM_ERRATA_798870
 	select SYS_THUMB_BUILD
+	imply NAND_OMAP_ELM
+	imply NAND_OMAP_GPMC
 	imply SPL_DISPLAY_PRINT
 	imply SPL_ENV_SUPPORT
 	imply SPL_EXT_SUPPORT
@@ -59,6 +65,8 @@ config OMAP54XX
 	imply SPL_LIBDISK_SUPPORT
 	imply SPL_LIBGENERIC_SUPPORT
 	imply SPL_MMC_SUPPORT
+	imply SPL_NAND_AM33XX_BCH
+	imply SPL_NAND_AM33XX_BCH
 	imply SPL_NAND_SUPPORT
 	imply SPL_POWER_SUPPORT
 	imply SPL_SERIAL_SUPPORT
@@ -73,6 +81,8 @@ config TI814X
 
 config TI816X
 	bool "TI816X SoC"
+	imply NAND_OMAP_ELM
+	imply NAND_OMAP_GPMC
 	help
 	  Support for AM335x SOC from Texas Instruments.
 	  The AM335x high performance SOC features a Cortex-A8
@@ -80,8 +90,12 @@ config TI816X
 
 config AM43XX
 	bool "AM43XX SoC"
+	imply NAND_OMAP_ELM
+	imply NAND_OMAP_GPMC
 	imply SPL_DM
 	imply SPL_DM_SEQ_ALIAS
+	imply SPL_NAND_AM33XX_BCH
+	imply SPL_NAND_SUPPORT
 	imply SPL_OF_CONTROL
 	imply SPL_OF_TRANSLATE
 	imply SPL_SEPARATE_BSS
@@ -97,6 +111,10 @@ config AM43XX
 
 config AM33XX
 	bool "AM33XX SoC"
+	imply NAND_OMAP_ELM
+	imply NAND_OMAP_GPMC
+	imply SPL_NAND_AM33XX_BCH
+	imply SPL_NAND_SUPPORT
 	imply SYS_I2C_OMAP24XX
 	imply SYS_THUMB_BUILD
 	imply USE_TINY_PRINTF
diff --git a/configs/am335x_baltos_defconfig b/configs/am335x_baltos_defconfig
index eb8338f0f1..1f328aacb8 100644
--- a/configs/am335x_baltos_defconfig
+++ b/configs/am335x_baltos_defconfig
@@ -8,7 +8,6 @@ CONFIG_TARGET_AM335X_BALTOS=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_LIBDISK_SUPPORT=y
-CONFIG_SPL_NAND_SUPPORT=y
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_SPL_STACK_R_ADDR=0x82000000
 CONFIG_SPL_FAT_SUPPORT=y
@@ -51,6 +50,7 @@ CONFIG_CMD_UBI=y
 CONFIG_ISO_PARTITION=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_NAND=y
+CONFIG_NAND_OMAP_GPMC_PREFETCH=y
 CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_OMAP3_SPI=y
diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig
index 00c1af4344..4c3aacbced 100644
--- a/configs/am335x_evm_defconfig
+++ b/configs/am335x_evm_defconfig
@@ -34,6 +34,7 @@ CONFIG_MISC=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_NAND=y
+CONFIG_NAND_OMAP_GPMC_PREFETCH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_PHYLIB=y
diff --git a/configs/am335x_evm_nor_defconfig b/configs/am335x_evm_nor_defconfig
index 9f08edff4c..f68fbd9d29 100644
--- a/configs/am335x_evm_nor_defconfig
+++ b/configs/am335x_evm_nor_defconfig
@@ -27,6 +27,7 @@ CONFIG_DFU_RAM=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_NAND=y
+CONFIG_NAND_OMAP_GPMC_PREFETCH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_PHYLIB=y
diff --git a/configs/am335x_evm_usbspl_defconfig b/configs/am335x_evm_usbspl_defconfig
index 7c351382d9..e6d83accab 100644
--- a/configs/am335x_evm_usbspl_defconfig
+++ b/configs/am335x_evm_usbspl_defconfig
@@ -31,6 +31,7 @@ CONFIG_DFU_NAND=y
 CONFIG_DFU_RAM=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_NAND=y
+CONFIG_NAND_OMAP_GPMC_PREFETCH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_PHYLIB=y
diff --git a/configs/am335x_hs_evm_defconfig b/configs/am335x_hs_evm_defconfig
index acdd56b435..dab5ba510d 100644
--- a/configs/am335x_hs_evm_defconfig
+++ b/configs/am335x_hs_evm_defconfig
@@ -38,6 +38,7 @@ CONFIG_MISC=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_NAND=y
+CONFIG_NAND_OMAP_GPMC_PREFETCH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_PHYLIB=y
diff --git a/configs/am335x_hs_evm_uart_defconfig b/configs/am335x_hs_evm_uart_defconfig
new file mode 100644
index 0000000000..4e5f64961e
--- /dev/null
+++ b/configs/am335x_hs_evm_uart_defconfig
@@ -0,0 +1,60 @@
+CONFIG_ARM=y
+CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_TI_COMMON_CMD_OPTIONS=y
+CONFIG_AM33XX=y
+CONFIG_TI_SECURE_DEVICE=y
+CONFIG_ISW_ENTRY_ADDR=0x40301950
+# CONFIG_SPL_MMC_SUPPORT is not set
+# CONFIG_SPL_LIBDISK_SUPPORT is not set
+# CONFIG_SPL_NAND_SUPPORT is not set
+# CONFIG_SPL_FAT_SUPPORT is not set
+CONFIG_DEFAULT_DEVICE_TREE="am335x-evm"
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_FIT_IMAGE_POST_PROCESS=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+CONFIG_VERSION_VARIABLE=y
+CONFIG_ARCH_MISC_INIT=y
+CONFIG_SPL=y
+# CONFIG_SPL_ENV_SUPPORT is not set
+# CONFIG_SPL_EXT_SUPPORT is not set
+CONFIG_SPL_MTD_SUPPORT=y
+# CONFIG_SPL_YMODEM_SUPPORT is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_NAND=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_MTDPARTS=y
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_OF_CONTROL=y
+CONFIG_OF_LIST="am335x-evm am335x-bone am335x-boneblack am335x-evmsk am335x-bonegreen am335x-icev2"
+# CONFIG_BLK is not set
+CONFIG_DFU_MMC=y
+CONFIG_DFU_NAND=y
+CONFIG_DFU_RAM=y
+CONFIG_DM_I2C=y
+CONFIG_MISC=y
+CONFIG_DM_MMC=y
+CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
+CONFIG_NAND_OMAP_GPMC_PREFETCH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHYLIB=y
+CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
+CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
+CONFIG_TIMER=y
+CONFIG_OMAP_TIMER=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_MUSB_HOST=y
+CONFIG_USB_MUSB_GADGET=y
+CONFIG_USB_MUSB_TI=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_RSA=y
+CONFIG_LZO=y
+CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/configs/am335x_shc_defconfig b/configs/am335x_shc_defconfig
index c63e388ff5..391155924e 100644
--- a/configs/am335x_shc_defconfig
+++ b/configs/am335x_shc_defconfig
@@ -8,6 +8,7 @@ CONFIG_TARGET_AM335X_SHC=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_LIBDISK_SUPPORT=y
+# CONFIG_SPL_NAND_SUPPORT is not set
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_SPL_STACK_R_ADDR=0x82000000
 CONFIG_SPL_FAT_SUPPORT=y
diff --git a/configs/am335x_shc_ict_defconfig b/configs/am335x_shc_ict_defconfig
index 1bcf683e35..7915e85c13 100644
--- a/configs/am335x_shc_ict_defconfig
+++ b/configs/am335x_shc_ict_defconfig
@@ -8,6 +8,7 @@ CONFIG_TARGET_AM335X_SHC=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_LIBDISK_SUPPORT=y
+# CONFIG_SPL_NAND_SUPPORT is not set
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_SPL_STACK_R_ADDR=0x82000000
 CONFIG_SPL_FAT_SUPPORT=y
diff --git a/configs/am335x_shc_netboot_defconfig b/configs/am335x_shc_netboot_defconfig
index 9528a8cd5c..131e70317f 100644
--- a/configs/am335x_shc_netboot_defconfig
+++ b/configs/am335x_shc_netboot_defconfig
@@ -8,6 +8,7 @@ CONFIG_TARGET_AM335X_SHC=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_LIBDISK_SUPPORT=y
+# CONFIG_SPL_NAND_SUPPORT is not set
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_SPL_STACK_R_ADDR=0x82000000
 CONFIG_SPL_FAT_SUPPORT=y
diff --git a/configs/am335x_shc_prompt_defconfig b/configs/am335x_shc_prompt_defconfig
index 8519282ecf..7a9b847cf7 100644
--- a/configs/am335x_shc_prompt_defconfig
+++ b/configs/am335x_shc_prompt_defconfig
@@ -8,6 +8,7 @@ CONFIG_TARGET_AM335X_SHC=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_LIBDISK_SUPPORT=y
+# CONFIG_SPL_NAND_SUPPORT is not set
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_SPL_STACK_R_ADDR=0x82000000
 CONFIG_SPL_FAT_SUPPORT=y
diff --git a/configs/am335x_shc_sdboot_defconfig b/configs/am335x_shc_sdboot_defconfig
index b00d6f6b22..06e848e50e 100644
--- a/configs/am335x_shc_sdboot_defconfig
+++ b/configs/am335x_shc_sdboot_defconfig
@@ -8,6 +8,7 @@ CONFIG_TARGET_AM335X_SHC=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_LIBDISK_SUPPORT=y
+# CONFIG_SPL_NAND_SUPPORT is not set
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_SPL_STACK_R_ADDR=0x82000000
 CONFIG_SPL_FAT_SUPPORT=y
diff --git a/configs/am335x_shc_sdboot_prompt_defconfig b/configs/am335x_shc_sdboot_prompt_defconfig
index b00d6f6b22..06e848e50e 100644
--- a/configs/am335x_shc_sdboot_prompt_defconfig
+++ b/configs/am335x_shc_sdboot_prompt_defconfig
@@ -8,6 +8,7 @@ CONFIG_TARGET_AM335X_SHC=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_LIBDISK_SUPPORT=y
+# CONFIG_SPL_NAND_SUPPORT is not set
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_SPL_STACK_R_ADDR=0x82000000
 CONFIG_SPL_FAT_SUPPORT=y
diff --git a/configs/am335x_sl50_defconfig b/configs/am335x_sl50_defconfig
index 3fa5d5e5cc..a39ff702a5 100644
--- a/configs/am335x_sl50_defconfig
+++ b/configs/am335x_sl50_defconfig
@@ -8,6 +8,7 @@ CONFIG_TARGET_AM335X_SL50=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_LIBDISK_SUPPORT=y
+# CONFIG_SPL_NAND_SUPPORT is not set
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_SPL_STACK_R_ADDR=0x82000000
 CONFIG_SPL_FAT_SUPPORT=y
diff --git a/configs/am3517_crane_defconfig b/configs/am3517_crane_defconfig
index 42260b1db2..78c1675431 100644
--- a/configs/am3517_crane_defconfig
+++ b/configs/am3517_crane_defconfig
@@ -26,6 +26,9 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_JFFS2=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
+CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
+CONFIG_SPL_NAND_SIMPLE=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/am3517_evm_defconfig b/configs/am3517_evm_defconfig
index 27ea7a44df..e7c6019557 100644
--- a/configs/am3517_evm_defconfig
+++ b/configs/am3517_evm_defconfig
@@ -37,6 +37,9 @@ CONFIG_SPL_PARTITION_UUIDS=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_NAND=y
+CONFIG_NAND_OMAP_GPMC_PREFETCH=y
+CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
+CONFIG_SPL_NAND_SIMPLE=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_HOST=y
diff --git a/configs/apf27_defconfig b/configs/apf27_defconfig
index 6533d851fb..0deb318019 100644
--- a/configs/apf27_defconfig
+++ b/configs/apf27_defconfig
@@ -17,7 +17,6 @@ CONFIG_CMD_EEPROM=y
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
 CONFIG_CMD_NAND_TRIMFFS=y
 CONFIG_CMD_NAND_LOCK_UNLOCK=y
 CONFIG_CMD_DHCP=y
@@ -32,4 +31,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_UBI=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_MMC_MXC=y
+CONFIG_NAND=y
+CONFIG_NAND_MXC=y
+CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/birdland_bav335a_defconfig b/configs/birdland_bav335a_defconfig
index 44f4eac6f6..3bb64d8b7a 100644
--- a/configs/birdland_bav335a_defconfig
+++ b/configs/birdland_bav335a_defconfig
@@ -8,6 +8,7 @@ CONFIG_TARGET_BAV335X=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_LIBDISK_SUPPORT=y
+# CONFIG_SPL_NAND_SUPPORT is not set
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_SPL_FAT_SUPPORT=y
 CONFIG_BAV_VERSION=1
diff --git a/configs/birdland_bav335b_defconfig b/configs/birdland_bav335b_defconfig
index 1dffd1a195..fd81dad3f3 100644
--- a/configs/birdland_bav335b_defconfig
+++ b/configs/birdland_bav335b_defconfig
@@ -8,6 +8,7 @@ CONFIG_TARGET_BAV335X=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_LIBDISK_SUPPORT=y
+# CONFIG_SPL_NAND_SUPPORT is not set
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_SPL_FAT_SUPPORT=y
 CONFIG_BAV_VERSION=2
diff --git a/configs/brppt1_mmc_defconfig b/configs/brppt1_mmc_defconfig
index a8fa471836..bcd390c8bd 100644
--- a/configs/brppt1_mmc_defconfig
+++ b/configs/brppt1_mmc_defconfig
@@ -7,6 +7,7 @@ CONFIG_AM33XX=y
 CONFIG_TARGET_BRPPT1=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
+# CONFIG_SPL_NAND_SUPPORT is not set
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,EMMC_BOOT"
diff --git a/configs/brppt1_spi_defconfig b/configs/brppt1_spi_defconfig
index 580b90da4d..9839ca4c49 100644
--- a/configs/brppt1_spi_defconfig
+++ b/configs/brppt1_spi_defconfig
@@ -7,6 +7,7 @@ CONFIG_AM33XX=y
 CONFIG_TARGET_BRPPT1=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
+# CONFIG_SPL_NAND_SUPPORT is not set
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
 CONFIG_SPL_WATCHDOG_SUPPORT=y
diff --git a/configs/brxre1_defconfig b/configs/brxre1_defconfig
index 101cd90c93..8af09ecbf6 100644
--- a/configs/brxre1_defconfig
+++ b/configs/brxre1_defconfig
@@ -7,6 +7,7 @@ CONFIG_AM33XX=y
 CONFIG_TARGET_BRXRE1=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
+# CONFIG_SPL_NAND_SUPPORT is not set
 CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1"
 CONFIG_BOOTDELAY=-2
 # CONFIG_CONSOLE_MUX is not set
diff --git a/configs/cairo_defconfig b/configs/cairo_defconfig
index 2a1b0f9917..8a027ff267 100644
--- a/configs/cairo_defconfig
+++ b/configs/cairo_defconfig
@@ -40,6 +40,7 @@ CONFIG_EFI_PARTITION=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_NAND=y
+CONFIG_SPL_NAND_SIMPLE=y
 CONFIG_SYS_NS16550=y
 CONFIG_OMAP3_SPI=y
 CONFIG_FAT_WRITE=y
diff --git a/configs/chiliboard_defconfig b/configs/chiliboard_defconfig
index ea729b0155..f74095d9a6 100644
--- a/configs/chiliboard_defconfig
+++ b/configs/chiliboard_defconfig
@@ -7,7 +7,6 @@ CONFIG_TARGET_CHILIBOARD=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_LIBDISK_SUPPORT=y
-CONFIG_SPL_NAND_SUPPORT=y
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_SPL_STACK_R_ADDR=0x82000000
 CONFIG_SPL_FAT_SUPPORT=y
@@ -41,6 +40,7 @@ CONFIG_ENV_IS_IN_MMC=y
 CONFIG_DM_GPIO=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_NAND=y
+CONFIG_NAND_OMAP_GPMC_PREFETCH=y
 CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_OMAP3_SPI=y
diff --git a/configs/cm_t3517_defconfig b/configs/cm_t3517_defconfig
index ba7d813d7e..46b5c1c11e 100644
--- a/configs/cm_t3517_defconfig
+++ b/configs/cm_t3517_defconfig
@@ -37,6 +37,7 @@ CONFIG_LED_STATUS_STATE=2
 CONFIG_LED_STATUS_BOOT_ENABLE=y
 CONFIG_LED_STATUS_BOOT=0
 CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
 CONFIG_SYS_NS16550=y
 CONFIG_OMAP3_SPI=y
 CONFIG_USB=y
diff --git a/configs/cm_t35_defconfig b/configs/cm_t35_defconfig
index 382fc1ab3e..db8c836963 100644
--- a/configs/cm_t35_defconfig
+++ b/configs/cm_t35_defconfig
@@ -39,6 +39,8 @@ CONFIG_LED_STATUS_STATE=2
 CONFIG_LED_STATUS_BOOT_ENABLE=y
 CONFIG_LED_STATUS_BOOT=0
 CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
+CONFIG_SPL_NAND_SIMPLE=y
 CONFIG_SYS_NS16550=y
 CONFIG_OMAP3_SPI=y
 CONFIG_USB=y
diff --git a/configs/cm_t43_defconfig b/configs/cm_t43_defconfig
index 27d9063a49..4c6274219b 100644
--- a/configs/cm_t43_defconfig
+++ b/configs/cm_t43_defconfig
@@ -7,6 +7,7 @@ CONFIG_TARGET_CM_T43=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_LIBDISK_SUPPORT=y
+# CONFIG_SPL_NAND_SUPPORT is not set
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
 CONFIG_SPL_FAT_SUPPORT=y
diff --git a/configs/devkit3250_defconfig b/configs/devkit3250_defconfig
index b46de7d6b9..97922a1d03 100644
--- a/configs/devkit3250_defconfig
+++ b/configs/devkit3250_defconfig
@@ -32,6 +32,8 @@ CONFIG_SPL_DM=y
 CONFIG_DM_GPIO=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
+CONFIG_SPL_NAND_SIMPLE=y
 CONFIG_PHYLIB=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
diff --git a/configs/devkit8000_defconfig b/configs/devkit8000_defconfig
index 8f3888a6b8..497d83b24c 100644
--- a/configs/devkit8000_defconfig
+++ b/configs/devkit8000_defconfig
@@ -32,5 +32,7 @@ CONFIG_EFI_PARTITION=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_NAND=y
+CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
+CONFIG_SPL_NAND_SIMPLE=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/eco5pk_defconfig b/configs/eco5pk_defconfig
index ed329307b1..fd274879d7 100644
--- a/configs/eco5pk_defconfig
+++ b/configs/eco5pk_defconfig
@@ -26,6 +26,9 @@ CONFIG_CMD_UBI=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_NAND=y
+CONFIG_NAND_OMAP_GPMC_PREFETCH=y
+CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
+CONFIG_SPL_NAND_SIMPLE=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/flea3_defconfig b/configs/flea3_defconfig
index ba3cd06434..87f54f3b22 100644
--- a/configs/flea3_defconfig
+++ b/configs/flea3_defconfig
@@ -8,7 +8,6 @@ CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="flea3 U-Boot > "
 CONFIG_CMD_I2C=y
-CONFIG_CMD_NAND=y
 CONFIG_CMD_SPI=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_DHCP=y
@@ -19,6 +18,8 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_FLASH=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
+CONFIG_NAND_MXC=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/igep0032_defconfig b/configs/igep0032_defconfig
index 6e3dcb08ca..757f3c39ab 100644
--- a/configs/igep0032_defconfig
+++ b/configs/igep0032_defconfig
@@ -31,6 +31,8 @@ CONFIG_CMD_UBI=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_NAND=y
+CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
+CONFIG_SPL_NAND_SIMPLE=y
 CONFIG_SYS_NS16550=y
 CONFIG_OMAP3_SPI=y
 CONFIG_FAT_WRITE=y
diff --git a/configs/igep00x0_defconfig b/configs/igep00x0_defconfig
index c504e75ad8..1ef1c6920a 100644
--- a/configs/igep00x0_defconfig
+++ b/configs/igep00x0_defconfig
@@ -31,6 +31,8 @@ CONFIG_CMD_UBI=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_NAND=y
+CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
+CONFIG_SPL_NAND_SIMPLE=y
 CONFIG_MTD_UBI_FASTMAP=y
 CONFIG_SYS_NS16550=y
 CONFIG_OMAP3_SPI=y
diff --git a/configs/m53evk_defconfig b/configs/m53evk_defconfig
index 3e001919fa..f2fe37dcbb 100644
--- a/configs/m53evk_defconfig
+++ b/configs/m53evk_defconfig
@@ -25,7 +25,6 @@ CONFIG_CMD_GREPENV=y
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
 CONFIG_CMD_NAND_TRIMFFS=y
 CONFIG_CMD_SATA=y
 CONFIG_CMD_USB=y
@@ -40,6 +39,8 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_CMD_UBI=y
 CONFIG_ENV_IS_IN_NAND=y
+CONFIG_NAND=y
+CONFIG_NAND_MXC=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
 CONFIG_USB=y
diff --git a/configs/mcx_defconfig b/configs/mcx_defconfig
index c36cef8fd4..f833df513b 100644
--- a/configs/mcx_defconfig
+++ b/configs/mcx_defconfig
@@ -35,6 +35,9 @@ CONFIG_CMD_UBI=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_NAND=y
+CONFIG_NAND_OMAP_GPMC_PREFETCH=y
+CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
+CONFIG_SPL_NAND_SIMPLE=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/mt_ventoux_defconfig b/configs/mt_ventoux_defconfig
index 09580e7b32..2d707df2cd 100644
--- a/configs/mt_ventoux_defconfig
+++ b/configs/mt_ventoux_defconfig
@@ -32,6 +32,9 @@ CONFIG_CMD_UBI=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_NAND=y
+CONFIG_NAND_OMAP_GPMC_PREFETCH=y
+CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
+CONFIG_SPL_NAND_SIMPLE=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/mx31pdk_defconfig b/configs/mx31pdk_defconfig
index 2b70da564e..3fcc0c0b5a 100644
--- a/configs/mx31pdk_defconfig
+++ b/configs/mx31pdk_defconfig
@@ -8,8 +8,6 @@ CONFIG_SPL_NAND_SUPPORT=y
 CONFIG_BOOTDELAY=1
 CONFIG_SPL=y
 CONFIG_CMD_BOOTZ=y
-# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_NAND=y
 CONFIG_CMD_SPI=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_DHCP=y
@@ -18,3 +16,5 @@ CONFIG_CMD_PING=y
 CONFIG_CMD_DATE=y
 CONFIG_ENV_IS_IN_NAND=y
 # CONFIG_MMC is not set
+CONFIG_NAND=y
+CONFIG_NAND_MXC=y
diff --git a/configs/mx35pdk_defconfig b/configs/mx35pdk_defconfig
index 3b9d10f411..2ba24d2819 100644
--- a/configs/mx35pdk_defconfig
+++ b/configs/mx35pdk_defconfig
@@ -7,7 +7,6 @@ CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
@@ -23,6 +22,8 @@ CONFIG_EFI_PARTITION=y
 # CONFIG_PARTITION_UUIDS is not set
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
+CONFIG_NAND_MXC=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/mx53ard_defconfig b/configs/mx53ard_defconfig
index 20da6e2f3c..c6e9e9dad3 100644
--- a/configs/mx53ard_defconfig
+++ b/configs/mx53ard_defconfig
@@ -10,10 +10,11 @@ CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_FAT=y
 CONFIG_ENV_IS_IN_MMC=y
+CONFIG_NAND=y
+CONFIG_NAND_MXC=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/omap3_beagle_defconfig b/configs/omap3_beagle_defconfig
index cf888f3491..e57af82a6d 100644
--- a/configs/omap3_beagle_defconfig
+++ b/configs/omap3_beagle_defconfig
@@ -41,6 +41,8 @@ CONFIG_LED_STATUS_GREEN=2
 CONFIG_LED_STATUS_CMD=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_NAND=y
+CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
+CONFIG_SPL_NAND_SIMPLE=y
 CONFIG_SYS_NS16550=y
 CONFIG_OMAP3_SPI=y
 CONFIG_USB=y
diff --git a/configs/omap3_evm_defconfig b/configs/omap3_evm_defconfig
index 962ffa0729..1c19198519 100644
--- a/configs/omap3_evm_defconfig
+++ b/configs/omap3_evm_defconfig
@@ -45,6 +45,8 @@ CONFIG_DM_GPIO=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_MTD=y
 CONFIG_NAND=y
+CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
+CONFIG_SPL_NAND_SIMPLE=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
 CONFIG_OMAP3_SPI=y
diff --git a/configs/omap3_ha_defconfig b/configs/omap3_ha_defconfig
index 5e35efa417..97943339d2 100644
--- a/configs/omap3_ha_defconfig
+++ b/configs/omap3_ha_defconfig
@@ -25,6 +25,9 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
+CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
+CONFIG_SPL_NAND_SIMPLE=y
 CONFIG_SYS_NS16550=y
 CONFIG_OMAP3_SPI=y
 CONFIG_USB=y
diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconfig
index 8d0a4d48e4..2dc6cfff19 100644
--- a/configs/omap3_logic_defconfig
+++ b/configs/omap3_logic_defconfig
@@ -38,8 +38,10 @@ CONFIG_DM_MMC=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_MMC_OMAP36XX_PINS=y
 CONFIG_NAND=y
+CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
 CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
+CONFIG_SPL_NAND_SIMPLE=y
 CONFIG_SYS_NS16550=y
 CONFIG_OMAP3_SPI=y
 CONFIG_USB=y
diff --git a/configs/omap3_overo_defconfig b/configs/omap3_overo_defconfig
index 5d1cbe993a..864dd637c7 100644
--- a/configs/omap3_overo_defconfig
+++ b/configs/omap3_overo_defconfig
@@ -44,6 +44,8 @@ CONFIG_EFI_PARTITION=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_NAND=y
+CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
+CONFIG_SPL_NAND_SIMPLE=y
 CONFIG_SYS_NS16550=y
 CONFIG_OMAP3_SPI=y
 CONFIG_USB=y
diff --git a/configs/omap3_pandora_defconfig b/configs/omap3_pandora_defconfig
index ae534a2c3e..5cf4bdff37 100644
--- a/configs/omap3_pandora_defconfig
+++ b/configs/omap3_pandora_defconfig
@@ -26,6 +26,7 @@ CONFIG_CMD_UBI=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_NAND=y
+CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 CONFIG_SYS_NS16550=y
 CONFIG_OMAP3_SPI=y
 CONFIG_FAT_WRITE=y
diff --git a/configs/omap3_zoom1_defconfig b/configs/omap3_zoom1_defconfig
index e0aa04b8bb..2b67735ef5 100644
--- a/configs/omap3_zoom1_defconfig
+++ b/configs/omap3_zoom1_defconfig
@@ -33,6 +33,7 @@ CONFIG_EFI_PARTITION=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_NAND=y
+CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 CONFIG_SYS_NS16550=y
 CONFIG_OMAP3_SPI=y
 CONFIG_FAT_WRITE=y
diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig
index c95134bcf9..58b46d7c5a 100644
--- a/configs/omapl138_lcdk_defconfig
+++ b/configs/omapl138_lcdk_defconfig
@@ -28,8 +28,10 @@ CONFIG_CMD_UBI=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_NAND=y
+CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
 CONFIG_SYS_NAND_U_BOOT_OFFS=0x28000
+CONFIG_SPL_NAND_SIMPLE=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
diff --git a/configs/pcm051_rev1_defconfig b/configs/pcm051_rev1_defconfig
index 1683f88b69..897f1ceeb3 100644
--- a/configs/pcm051_rev1_defconfig
+++ b/configs/pcm051_rev1_defconfig
@@ -8,6 +8,7 @@ CONFIG_TARGET_PCM051=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_LIBDISK_SUPPORT=y
+# CONFIG_SPL_NAND_SUPPORT is not set
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_SPL_FAT_SUPPORT=y
 CONFIG_SYS_EXTRA_OPTIONS="REV1"
diff --git a/configs/pcm051_rev3_defconfig b/configs/pcm051_rev3_defconfig
index d082bb4af2..6462733f0a 100644
--- a/configs/pcm051_rev3_defconfig
+++ b/configs/pcm051_rev3_defconfig
@@ -8,6 +8,7 @@ CONFIG_TARGET_PCM051=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_LIBDISK_SUPPORT=y
+# CONFIG_SPL_NAND_SUPPORT is not set
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_SPL_FAT_SUPPORT=y
 CONFIG_SYS_EXTRA_OPTIONS="REV3"
diff --git a/configs/pepper_defconfig b/configs/pepper_defconfig
index 7ca5fcc353..012e45cdd9 100644
--- a/configs/pepper_defconfig
+++ b/configs/pepper_defconfig
@@ -8,6 +8,7 @@ CONFIG_TARGET_PEPPER=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_LIBDISK_SUPPORT=y
+# CONFIG_SPL_NAND_SUPPORT is not set
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_SPL_FAT_SUPPORT=y
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
diff --git a/configs/tao3530_defconfig b/configs/tao3530_defconfig
index 31153acb30..ee3d19af9a 100644
--- a/configs/tao3530_defconfig
+++ b/configs/tao3530_defconfig
@@ -25,6 +25,9 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
+CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
+CONFIG_SPL_NAND_SIMPLE=y
 CONFIG_SYS_NS16550=y
 CONFIG_OMAP3_SPI=y
 CONFIG_USB=y
diff --git a/configs/ti816x_evm_defconfig b/configs/ti816x_evm_defconfig
index 4341d8d01f..289908c198 100644
--- a/configs/ti816x_evm_defconfig
+++ b/configs/ti816x_evm_defconfig
@@ -43,6 +43,8 @@ CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_OMAP24XX=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_NAND=y
+CONFIG_NAND_OMAP_GPMC_PREFETCH=y
+CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 CONFIG_SYS_NS16550=y
 CONFIG_OMAP3_SPI=y
 # CONFIG_USE_PRIVATE_LIBGCC is not set
diff --git a/configs/tricorder_defconfig b/configs/tricorder_defconfig
index d7313ee948..7b77f1cba9 100644
--- a/configs/tricorder_defconfig
+++ b/configs/tricorder_defconfig
@@ -35,6 +35,8 @@ CONFIG_LED_STATUS_BIT2=4
 CONFIG_LED_STATUS_STATE2=2
 CONFIG_LED_STATUS_CMD=y
 CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
+CONFIG_SPL_NAND_SIMPLE=y
 CONFIG_SYS_NS16550=y
 CONFIG_BCH=y
 CONFIG_PANIC_HANG=y
diff --git a/configs/tricorder_flash_defconfig b/configs/tricorder_flash_defconfig
index fe1994bb56..34f6c1af76 100644
--- a/configs/tricorder_flash_defconfig
+++ b/configs/tricorder_flash_defconfig
@@ -34,6 +34,8 @@ CONFIG_LED_STATUS_BIT2=4
 CONFIG_LED_STATUS_STATE2=2
 CONFIG_LED_STATUS_CMD=y
 CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
+CONFIG_SPL_NAND_SIMPLE=y
 CONFIG_SYS_NS16550=y
 CONFIG_BCH=y
 CONFIG_PANIC_HANG=y
diff --git a/configs/twister_defconfig b/configs/twister_defconfig
index 7bbf78188d..824270b845 100644
--- a/configs/twister_defconfig
+++ b/configs/twister_defconfig
@@ -31,6 +31,9 @@ CONFIG_CMD_UBI=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_NAND=y
+CONFIG_NAND_OMAP_GPMC_PREFETCH=y
+CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
+CONFIG_SPL_NAND_SIMPLE=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/woodburn_defconfig b/configs/woodburn_defconfig
index 5139e40002..27bf798e15 100644
--- a/configs/woodburn_defconfig
+++ b/configs/woodburn_defconfig
@@ -8,7 +8,6 @@ CONFIG_SYS_PROMPT="woodburn U-Boot > "
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
 CONFIG_CMD_SPI=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_DHCP=y
@@ -23,5 +22,7 @@ CONFIG_EFI_PARTITION=y
 # CONFIG_PARTITION_UUIDS is not set
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
+CONFIG_NAND_MXC=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
diff --git a/configs/woodburn_sd_defconfig b/configs/woodburn_sd_defconfig
index 7518cea968..6d423ebe6e 100644
--- a/configs/woodburn_sd_defconfig
+++ b/configs/woodburn_sd_defconfig
@@ -18,7 +18,6 @@ CONFIG_SYS_PROMPT="woodburn U-Boot > "
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
 CONFIG_CMD_SPI=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_DHCP=y
@@ -34,5 +33,7 @@ CONFIG_EFI_PARTITION=y
 # CONFIG_SPL_PARTITION_UUIDS is not set
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
+CONFIG_NAND_MXC=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index bf0895604f..33af5c73d5 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -43,6 +43,34 @@ config NAND_DENALI_SPARE_AREA_SKIP_BYTES
 	  of OOB area before last ECC sector data starts.  This is potentially
 	  used to preserve the bad block marker in the OOB area.
 
+config NAND_OMAP_GPMC
+	bool "Support OMAP GPMC NAND controller"
+	depends on ARCH_OMAP2PLUS
+	help
+	  Enables omap_gpmc.c driver for OMAPx and AMxxxx platforms.
+	  GPMC controller is used for parallel NAND flash devices, and can
+	  do ECC calculation (not ECC error detection) for HAM1, BCH4, BCH8
+	  and BCH16 ECC algorithms.
+
+config NAND_OMAP_GPMC_PREFETCH
+	bool "Enable GPMC Prefetch"
+	depends on NAND_OMAP_GPMC
+	help
+	  On OMAP platforms that use the GPMC controller
+	  (CONFIG_NAND_OMAP_GPMC_PREFETCH), this options enables the code that
+	  uses the prefetch mode to speed up read operations.
+
+config NAND_OMAP_ELM
+	bool "Enable ELM driver for OMAPxx and AMxx platforms."
+	depends on NAND_OMAP_GPMC && !OMAP34XX
+	help
+	  ELM controller is used for ECC error detection (not ECC calculation)
+	  of BCH4, BCH8 and BCH16 ECC algorithms.
+	  Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
+	  thus such SoC platforms need to depend on software library for ECC error
+	  detection. However ECC calculation on such plaforms would still be
+	  done by GPMC controller.
+
 config NAND_VF610_NFC
 	bool "Support for Freescale NFC for VF610"
 	select SYS_NAND_SELF_INIT
@@ -135,6 +163,14 @@ config NAND_ARASAN
 	  controller. This uses the hardware ECC for read and
 	  write operations.
 
+config NAND_MXC
+	bool "MXC NAND support"
+	depends on CPU_ARM926EJS || CPU_ARM1136 || MX5
+	imply CMD_NAND
+	help
+	  This enables the NAND driver for the NAND flash controller on the
+	  i.MX27 / i.MX31 / i.MX5 rocessors.
+
 config NAND_MXS
 	bool "MXS NAND support"
 	depends on MX6 || MX7
@@ -157,7 +193,7 @@ comment "Generic NAND options"
 # option (mxc_nand, ndfc, omap_gpmc).
 config SYS_NAND_BUSWIDTH_16BIT
 	bool "Use 16-bit NAND interface"
-	depends on NAND_VF610_NFC
+	depends on NAND_VF610_NFC || NAND_OMAP_GPMC || NAND_MXC || ARCH_DAVINCI
 	help
 	  Indicates that NAND device has 16-bit wide data-bus. In absence of this
 	  config, bus-width of NAND device is assumed to be either 8-bit and later
@@ -198,12 +234,29 @@ config SYS_NAND_U_BOOT_OFFS_REDUND
 	Set the offset from the start of the nand where the redundant u-boot
 	should be loaded from.
 
+config SPL_NAND_AM33XX_BCH
+	bool "Enables SPL-NAND driver which supports ELM based"
+	depends on NAND_OMAP_GPMC && !OMAP34XX
+	default y
+        help
+	  Hardware ECC correction. This is useful for platforms which have ELM
+	  hardware engine and use NAND boot mode.
+	  Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
+	  so those platforms should use CONFIG_SPL_NAND_SIMPLE for enabling
+          SPL-NAND driver with software ECC correction support.
+
 config SPL_NAND_DENALI
 	bool "Support Denali NAND controller for SPL"
 	help
 	  This is a small implementation of the Denali NAND controller
 	  for use on SPL.
 
+config SPL_NAND_SIMPLE
+	bool "Use simple SPL NAND driver"
+	depends on !SPL_NAND_AM33XX_BCH
+	help
+	  Support for NAND boot using simple NAND drivers that
+	  expose the cmd_ctrl() interface.
 endif
 
 endif   # if NAND
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index 415ce46e0d..66f7a3f604 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -202,9 +202,6 @@
 #define CONFIG_SYS_NAND_OOBSIZE		64
 #define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
 /* NAND: driver related configs */
-#define CONFIG_NAND_OMAP_GPMC
-#define CONFIG_NAND_OMAP_GPMC_PREFETCH
-#define CONFIG_NAND_OMAP_ELM
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
 #define CONFIG_SYS_NAND_ECCPOS		{ 2, 3, 4, 5, 6, 7, 8, 9, \
 					 10, 11, 12, 13, 14, 15, 16, 17, \
@@ -232,9 +229,6 @@
 					"-(NAND.file-system)"
 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x000c0000
 /* NAND: SPL related configs */
-#ifdef CONFIG_SPL_NAND_SUPPORT
-#define CONFIG_SPL_NAND_AM33XX_BCH
-#endif
 #ifdef CONFIG_SPL_OS_BOOT
 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	0x00200000 /* kernel offset */
 #endif
diff --git a/include/configs/am335x_igep003x.h b/include/configs/am335x_igep003x.h
index 9b14603918..2400eee390 100644
--- a/include/configs/am335x_igep003x.h
+++ b/include/configs/am335x_igep003x.h
@@ -113,7 +113,6 @@
 #define CONFIG_PHY_SMSC
 
 /* NAND support */
-#define CONFIG_NAND_OMAP_ELM
 #define CONFIG_SYS_NAND_ONFI_DETECTION	1
 
 #define CONFIG_MTD_PARTITIONS
diff --git a/include/configs/am3517_crane.h b/include/configs/am3517_crane.h
index edaa384213..c4901616f0 100644
--- a/include/configs/am3517_crane.h
+++ b/include/configs/am3517_crane.h
@@ -206,9 +206,6 @@
 /* Monitor at start of flash */
 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
 
-#define CONFIG_NAND_OMAP_GPMC
-#define SMNAND_ENV_OFFSET		0x260000 /* environment starts here */
-
 #define CONFIG_SYS_ENV_SECT_SIZE	(128 << 10)	/* 128 KiB sector */
 #define CONFIG_ENV_OFFSET		SMNAND_ENV_OFFSET
 #define CONFIG_ENV_ADDR			SMNAND_ENV_OFFSET
@@ -237,7 +234,6 @@
 
 /* Defines for SPL */
 #define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_NAND_SIMPLE
 #define CONFIG_SPL_TEXT_BASE		0x40200800
 #define CONFIG_SPL_MAX_SIZE		(SRAM_SCRATCH_SPACE_ADDR - \
 					 CONFIG_SPL_TEXT_BASE)
@@ -253,7 +249,6 @@
 #define CONFIG_SPL_NAND_ECC
 
 /* NAND boot config */
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_COUNT	64
 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h
index 5435ca8f4e..ef0157b7fd 100644
--- a/include/configs/am3517_evm.h
+++ b/include/configs/am3517_evm.h
@@ -103,16 +103,8 @@
 
 /* Board NAND Info. */
 #ifdef CONFIG_NAND
-#define CONFIG_NAND_OMAP_GPMC
-#define CONFIG_NAND_OMAP_GPMC_PREFETCH
 #define CONFIG_SYS_NAND_ADDR		NAND_BASE	/* physical address */
 							/* to access nand */
-#define CONFIG_SYS_NAND_BASE		NAND_BASE	/* physical address */
-							/* to access */
-							/* nand at CS0 */
-#define CONFIG_SYS_MAX_NAND_DEVICE	1		/* Max number of */
-							/* NAND devices */
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_COUNT	64
 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h
index b84f6e3480..4ae10bd8ba 100644
--- a/include/configs/am43xx_evm.h
+++ b/include/configs/am43xx_evm.h
@@ -256,8 +256,6 @@
 					 CONFIG_SYS_NAND_PAGE_SIZE)
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 /* NAND: driver related configs */
-#define CONFIG_NAND_OMAP_GPMC
-#define CONFIG_NAND_OMAP_ELM
 #define CONFIG_SYS_NAND_ONFI_DETECTION
 #define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_BCH16_CODE_HW
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
@@ -299,9 +297,6 @@
 					"-(NAND.file-system)"
 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x00180000
 /* NAND: SPL related configs */
-#ifdef CONFIG_SPL_NAND_SUPPORT
-#define CONFIG_SPL_NAND_AM33XX_BCH
-#endif
 /* NAND: SPL falcon mode configs */
 #ifdef CONFIG_SPL_OS_BOOT
 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	0x00300000 /* kernel offset */
diff --git a/include/configs/apf27.h b/include/configs/apf27.h
index c8eacdd7f8..99a96d9767 100644
--- a/include/configs/apf27.h
+++ b/include/configs/apf27.h
@@ -192,7 +192,6 @@
 /*
  * NAND
  */
-#define CONFIG_NAND_MXC
 
 #define CONFIG_MXC_NAND_REGS_BASE	0xD8000000
 #define CONFIG_SYS_NAND_BASE		CONFIG_MXC_NAND_REGS_BASE
@@ -200,7 +199,6 @@
 
 #define CONFIG_MXC_NAND_HWECC
 #define CONFIG_SYS_NAND_LARGEPAGE
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
 #define CONFIG_SYS_NAND_BLOCK_SIZE	(128 * 1024)
 #define CONFIG_SYS_NAND_PAGE_COUNT	CONFIG_SYS_NAND_BLOCK_SIZE / \
diff --git a/include/configs/baltos.h b/include/configs/baltos.h
index 185c749d78..059cf4a766 100644
--- a/include/configs/baltos.h
+++ b/include/configs/baltos.h
@@ -242,9 +242,6 @@
 #define CONFIG_SPL_NET_VCI_STRING	"AM335x U-Boot SPL"*/
 
 #ifdef CONFIG_NAND
-#define CONFIG_NAND_OMAP_GPMC
-#define CONFIG_NAND_OMAP_GPMC_PREFETCH
-#define CONFIG_NAND_OMAP_ELM
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_COUNT	(CONFIG_SYS_NAND_BLOCK_SIZE / \
 					 CONFIG_SYS_NAND_PAGE_SIZE)
diff --git a/include/configs/bav335x.h b/include/configs/bav335x.h
index 062c99c7ab..e7770b69db 100644
--- a/include/configs/bav335x.h
+++ b/include/configs/bav335x.h
@@ -355,8 +355,6 @@ DEFAULT_LINUX_BOOT_ENV \
 #define CONFIG_SYS_NAND_OOBSIZE		64
 #define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
 /* NAND: driver related configs */
-#define CONFIG_NAND_OMAP_GPMC
-#define CONFIG_NAND_OMAP_ELM
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
 #define CONFIG_SYS_NAND_ECCPOS	{ \
 	2, 3, 4, 5, 6, 7, 8, 9, \
@@ -389,9 +387,6 @@ DEFAULT_LINUX_BOOT_ENV \
 #define CONFIG_ENV_OFFSET_REDUND	0x001e0000
 #define CONFIG_SYS_ENV_SECT_SIZE	CONFIG_SYS_NAND_BLOCK_SIZE
 /* NAND: SPL related configs */
-#ifdef CONFIG_SPL_NAND_SUPPORT
-#define CONFIG_SPL_NAND_AM33XX_BCH
-#endif
 #ifdef CONFIG_SPL_OS_BOOT
 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	0x00200000 /* kernel offset */
 #endif
diff --git a/include/configs/brppt1.h b/include/configs/brppt1.h
index 07a173ff14..2af575a138 100644
--- a/include/configs/brppt1.h
+++ b/include/configs/brppt1.h
@@ -71,7 +71,6 @@
 #endif /* CONFIG_SPL_OS_BOOT */
 
 #ifdef CONFIG_NAND
-#define CONFIG_SPL_NAND_AM33XX_BCH	/* OMAP4 and later ELM support */
 #define CONFIG_SPL_NAND_BASE
 #define CONFIG_SPL_NAND_DRIVERS
 #define CONFIG_SPL_NAND_ECC
@@ -184,9 +183,7 @@ MMCARGS
  */
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #define CONFIG_SYS_NAND_BASE		0x8000000
-#define CONFIG_NAND_OMAP_GPMC
 /* don't change OMAP_ELM, ECCSCHEME. ROM code only supports this */
-#define CONFIG_NAND_OMAP_ELM
 #define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_BCH8_CODE_HW
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
diff --git a/include/configs/chiliboard.h b/include/configs/chiliboard.h
index b7887d90d4..80d4e49f6d 100644
--- a/include/configs/chiliboard.h
+++ b/include/configs/chiliboard.h
@@ -135,9 +135,6 @@
 #define CONFIG_SYS_NAND_OOBSIZE		64
 #define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
 /* NAND: driver related configs */
-#define CONFIG_NAND_OMAP_GPMC
-#define CONFIG_NAND_OMAP_GPMC_PREFETCH
-#define CONFIG_NAND_OMAP_ELM
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
 #define CONFIG_SYS_NAND_ECCPOS		{ 2, 3, 4, 5, 6, 7, 8, 9, \
 					 10, 11, 12, 13, 14, 15, 16, 17, \
@@ -165,9 +162,6 @@
 					"-(NAND.file-system)"
 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x000c0000
 /* NAND: SPL related configs */
-#ifdef CONFIG_SPL_NAND_SUPPORT
-#define CONFIG_SPL_NAND_AM33XX_BCH
-#endif
 
 /* USB configuration */
 #define CONFIG_USB_MUSB_DSPS
diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h
index d30b783a4c..5c14885019 100644
--- a/include/configs/cm_t35.h
+++ b/include/configs/cm_t35.h
@@ -106,7 +106,6 @@
 /*
  * Board NAND Info.
  */
-#define CONFIG_NAND_OMAP_GPMC
 #define CONFIG_SYS_NAND_ADDR		NAND_BASE	/* physical address */
 							/* to access nand */
 #define CONFIG_SYS_NAND_BASE		NAND_BASE	/* physical address */
@@ -243,7 +242,6 @@
 
 /* Defines for SPL */
 #define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_NAND_SIMPLE
 
 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	"u-boot.img"
diff --git a/include/configs/cm_t3517.h b/include/configs/cm_t3517.h
index 282b7ae10c..382e11740f 100644
--- a/include/configs/cm_t3517.h
+++ b/include/configs/cm_t3517.h
@@ -109,7 +109,6 @@
 /*
  * Board NAND Info.
  */
-#define CONFIG_NAND_OMAP_GPMC
 #define CONFIG_SYS_NAND_ADDR		NAND_BASE	/* physical address */
 							/* to access nand */
 #define CONFIG_SYS_NAND_BASE		NAND_BASE	/* physical address */
diff --git a/include/configs/cm_t43.h b/include/configs/cm_t43.h
index bbc455a244..7012a95fd7 100644
--- a/include/configs/cm_t43.h
+++ b/include/configs/cm_t43.h
@@ -25,7 +25,6 @@
 #endif
 
 /* NAND support */
-#define CONFIG_NAND_OMAP_ELM
 #define CONFIG_SYS_NAND_ONFI_DETECTION
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h
index c05c64cad7..4def7d1919 100644
--- a/include/configs/da850evm.h
+++ b/include/configs/da850evm.h
@@ -200,7 +200,6 @@
 #define CONFIG_SPL_NAND_BASE
 #define CONFIG_SPL_NAND_DRIVERS
 #define CONFIG_SPL_NAND_ECC
-#define CONFIG_SPL_NAND_SIMPLE
 #define CONFIG_SPL_NAND_LOAD
 #endif
 
diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h
index 4ad4570caa..526a81a382 100644
--- a/include/configs/devkit3250.h
+++ b/include/configs/devkit3250.h
@@ -179,7 +179,6 @@
 /* SPL will use serial */
 
 /* SPL loads an image from NAND */
-#define CONFIG_SPL_NAND_SIMPLE
 #define CONFIG_SPL_NAND_RAW_ONLY
 #define CONFIG_SPL_NAND_DRIVERS
 
diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h
index 2bf0983e37..066c4a5f26 100644
--- a/include/configs/devkit8000.h
+++ b/include/configs/devkit8000.h
@@ -188,7 +188,6 @@
 #define CONFIG_SPL_TEXT_BASE		0x40200000 /*CONFIG_SYS_SRAM_START*/
 
 /* NAND boot config */
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_COUNT	64
 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h
index f618fa7260..e25eef8df5 100644
--- a/include/configs/dra7xx_evm.h
+++ b/include/configs/dra7xx_evm.h
@@ -160,13 +160,10 @@
 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
 #define CONFIG_SYS_NAND_OOBSIZE		64
 #define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
 #define CONFIG_SYS_NAND_PAGE_COUNT	(CONFIG_SYS_NAND_BLOCK_SIZE / \
 					 CONFIG_SYS_NAND_PAGE_SIZE)
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 /* NAND: driver related configs */
-#define CONFIG_NAND_OMAP_GPMC
-#define CONFIG_NAND_OMAP_ELM
 #define CONFIG_SYS_NAND_ONFI_DETECTION
 #define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_BCH8_CODE_HW
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
@@ -193,9 +190,6 @@
 					"-(NAND.file-system)"
 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x000c0000
 /* NAND: SPL related configs */
-#ifdef CONFIG_SPL_NAND_SUPPORT
-#define CONFIG_SPL_NAND_AM33XX_BCH
-#endif
 /* NAND: SPL falcon mode configs */
 #ifdef CONFIG_SPL_OS_BOOT
 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	0x00200000 /* kernel offset */
diff --git a/include/configs/flea3.h b/include/configs/flea3.h
index 3560611081..df8169e410 100644
--- a/include/configs/flea3.h
+++ b/include/configs/flea3.h
@@ -162,7 +162,6 @@
 /*
  * NAND FLASH driver setup
  */
-#define CONFIG_NAND_MXC
 #define CONFIG_MXC_NAND_REGS_BASE	(NFC_BASE_ADDR)
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #define CONFIG_SYS_NAND_BASE		(NFC_BASE_ADDR)
diff --git a/include/configs/imx27lite-common.h b/include/configs/imx27lite-common.h
index 7c680954cb..962856e101 100644
--- a/include/configs/imx27lite-common.h
+++ b/include/configs/imx27lite-common.h
@@ -125,7 +125,6 @@
 /*
  * NAND
  */
-#define CONFIG_NAND_MXC
 #define CONFIG_MXC_NAND_REGS_BASE	0xd8000000
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #define CONFIG_SYS_NAND_BASE		0xd8000000
diff --git a/include/configs/ipam390.h b/include/configs/ipam390.h
index 1899732e5f..2bb7d079f6 100644
--- a/include/configs/ipam390.h
+++ b/include/configs/ipam390.h
@@ -176,7 +176,6 @@
 #define CONFIG_SPL_NAND_BASE
 #define CONFIG_SPL_NAND_DRIVERS
 #define CONFIG_SPL_NAND_ECC
-#define CONFIG_SPL_NAND_SIMPLE
 #define CONFIG_SPL_NAND_LOAD
 
 /*
diff --git a/include/configs/m53evk.h b/include/configs/m53evk.h
index 74b627c31e..d94b82ae42 100644
--- a/include/configs/m53evk.h
+++ b/include/configs/m53evk.h
@@ -75,7 +75,6 @@
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #define CONFIG_SYS_NAND_BASE		NFC_BASE_ADDR_AXI
-#define CONFIG_NAND_MXC
 #define CONFIG_MXC_NAND_REGS_BASE	NFC_BASE_ADDR_AXI
 #define CONFIG_MXC_NAND_IP_REGS_BASE	NFC_BASE_ADDR
 #define CONFIG_SYS_NAND_LARGEPAGE
diff --git a/include/configs/mcx.h b/include/configs/mcx.h
index 1057b936ce..b05877e400 100644
--- a/include/configs/mcx.h
+++ b/include/configs/mcx.h
@@ -241,10 +241,6 @@
  */
 
 /* **** PISMO SUPPORT *** */
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
-#define CONFIG_NAND_OMAP_GPMC
-#define CONFIG_NAND_OMAP_GPMC_PREFETCH
-#define SMNAND_ENV_OFFSET		0x180000 /* environment starts here */
 
 /* Redundant Environment */
 #define CONFIG_SYS_ENV_SECT_SIZE	(128 << 10)	/* 128 KiB */
@@ -271,7 +267,6 @@
 
 /* Defines for SPL */
 #define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_NAND_SIMPLE
 
 #define CONFIG_SPL_NAND_BASE
 #define CONFIG_SPL_NAND_DRIVERS
diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h
index 3867f7a091..a9bfec2c49 100644
--- a/include/configs/mx31pdk.h
+++ b/include/configs/mx31pdk.h
@@ -122,7 +122,6 @@
 /*
  * NAND driver
  */
-#define CONFIG_NAND_MXC
 #define CONFIG_MXC_NAND_REGS_BASE      NFC_BASE_ADDR
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_BASE           NFC_BASE_ADDR
diff --git a/include/configs/mx35pdk.h b/include/configs/mx35pdk.h
index f16bfb98e4..18695d2686 100644
--- a/include/configs/mx35pdk.h
+++ b/include/configs/mx35pdk.h
@@ -182,7 +182,6 @@
 /*
  * NAND FLASH driver setup
  */
-#define CONFIG_NAND_MXC
 #define CONFIG_MXC_NAND_REGS_BASE	(NFC_BASE_ADDR)
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #define CONFIG_SYS_NAND_BASE		(NFC_BASE_ADDR)
diff --git a/include/configs/mx53ard.h b/include/configs/mx53ard.h
index 2417a1ab9c..d1d5ae523f 100644
--- a/include/configs/mx53ard.h
+++ b/include/configs/mx53ard.h
@@ -27,7 +27,6 @@
 
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #define CONFIG_SYS_NAND_BASE		NFC_BASE_ADDR_AXI
-#define CONFIG_NAND_MXC
 #define CONFIG_MXC_NAND_REGS_BASE	NFC_BASE_ADDR_AXI
 #define CONFIG_MXC_NAND_IP_REGS_BASE	NFC_BASE_ADDR
 #define CONFIG_SYS_NAND_LARGEPAGE
diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
index ee22f4fc1b..4d86b00687 100644
--- a/include/configs/omap3_beagle.h
+++ b/include/configs/omap3_beagle.h
@@ -69,7 +69,6 @@
 /*
  * Board NAND Info.
  */
-#define CONFIG_NAND_OMAP_GPMC
 #define CONFIG_SYS_MAX_NAND_DEVICE	1		/* Max number of NAND */
 							/* devices */
 
@@ -247,7 +246,6 @@
 /* Defines for SPL */
 
 /* NAND boot config */
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_COUNT	64
 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
diff --git a/include/configs/omap3_cairo.h b/include/configs/omap3_cairo.h
index b4d7f17131..552b0ac5a8 100644
--- a/include/configs/omap3_cairo.h
+++ b/include/configs/omap3_cairo.h
@@ -57,7 +57,6 @@
 /*
  * Board NAND Info.
  */
-#define CONFIG_NAND_OMAP_GPMC
 #define CONFIG_SYS_MAX_NAND_DEVICE	1		/* Max number of NAND */
 							/* devices */
 #define CONFIG_EXTRA_ENV_SETTINGS \
diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h
index af99e8b5cb..2edeee554f 100644
--- a/include/configs/omap3_evm.h
+++ b/include/configs/omap3_evm.h
@@ -48,10 +48,8 @@
 
 /* NAND */
 #if defined(CONFIG_NAND)
-#define CONFIG_NAND_OMAP_GPMC
 #define CONFIG_SYS_FLASH_BASE		NAND_BASE
 #define CONFIG_SYS_MAX_NAND_DEVICE      1
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_COUNT      64
 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h
index 5118b93446..123de88711 100644
--- a/include/configs/omap3_igep00x0.h
+++ b/include/configs/omap3_igep00x0.h
@@ -119,7 +119,6 @@
 #define CONFIG_SYS_ONENAND_BLOCK_SIZE	(128*1024)
 
 /* NAND config */
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_COUNT	64
 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
@@ -136,7 +135,6 @@
 #define CONFIG_SYS_NAND_ECCSIZE		512
 #define CONFIG_SYS_NAND_ECCBYTES	14
 #define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
-#define CONFIG_NAND_OMAP_GPMC
 
 /* UBI configuration */
 #define CONFIG_SPL_UBI			1
diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h
index 5fba35668b..d7fd9b449e 100644
--- a/include/configs/omap3_logic.h
+++ b/include/configs/omap3_logic.h
@@ -64,13 +64,10 @@
 
 /* Board NAND Info. */
 #ifdef CONFIG_NAND
-#define CONFIG_NAND_OMAP_GPMC
-
 #define CONFIG_SYS_NAND_ADDR		NAND_BASE /* physical address */
 						  /* to access nand */
 #define CONFIG_SYS_MAX_NAND_DEVICE	1	  /* Max number of */
 						  /* NAND devices */
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_COUNT	64
 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h
index d53657f916..622b32aa7d 100644
--- a/include/configs/omap3_overo.h
+++ b/include/configs/omap3_overo.h
@@ -193,7 +193,6 @@
 #define CONFIG_SYS_INIT_RAM_SIZE	0x800
 
 /* NAND boot config */
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
 #define CONFIG_SYS_NAND_MAX_ECCPOS  56
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_COUNT	64
diff --git a/include/configs/omap3_pandora.h b/include/configs/omap3_pandora.h
index 7f1b571267..2d5f40e09c 100644
--- a/include/configs/omap3_pandora.h
+++ b/include/configs/omap3_pandora.h
@@ -48,7 +48,6 @@
  */
 #define CONFIG_SYS_NAND_ADDR		NAND_BASE	/* physical address */
 							/* to access nand */
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
 #define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_HAM1_CODE_SW
 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
 #define CONFIG_SYS_NAND_OOBSIZE		64
diff --git a/include/configs/omap3_zoom1.h b/include/configs/omap3_zoom1.h
index c6db88a4a2..f8787900e4 100644
--- a/include/configs/omap3_zoom1.h
+++ b/include/configs/omap3_zoom1.h
@@ -73,7 +73,6 @@
 #define CONFIG_SYS_NAND_BASE		NAND_BASE	/* physical address */
 							/* to access nand at */
 							/* CS0 */
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
 
 /* Environment information */
 
diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h
index 58b683a481..5dba7d279a 100644
--- a/include/configs/omapl138_lcdk.h
+++ b/include/configs/omapl138_lcdk.h
@@ -160,7 +160,6 @@
 #define	CONFIG_SYS_NAND_USE_FLASH_BBT
 #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
 #define	CONFIG_SYS_NAND_PAGE_2K
-#define	CONFIG_SYS_NAND_BUSWIDTH_16BIT
 #define CONFIG_SYS_NAND_CS		3
 #define CONFIG_SYS_NAND_BASE		DAVINCI_ASYNC_EMIF_DATA_CE3_BASE
 #define CONFIG_SYS_NAND_MASK_CLE	0x10
@@ -192,7 +191,6 @@
 #define CONFIG_SPL_NAND_BASE
 #define CONFIG_SPL_NAND_DRIVERS
 #define CONFIG_SPL_NAND_ECC
-#define CONFIG_SPL_NAND_SIMPLE
 #define CONFIG_SPL_NAND_LOAD
 #endif
 
diff --git a/include/configs/pengwyn.h b/include/configs/pengwyn.h
index 242a13912b..570c375cdc 100644
--- a/include/configs/pengwyn.h
+++ b/include/configs/pengwyn.h
@@ -113,8 +113,6 @@
 /* SPL */
 
 /* NAND support */
-#define CONFIG_NAND_OMAP_GPMC
-#define CONFIG_NAND_OMAP_ELM
 
 /* NAND Configuration. */
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h
index 2314a2d2ef..ff7bade632 100644
--- a/include/configs/siemens-am33x-common.h
+++ b/include/configs/siemens-am33x-common.h
@@ -115,7 +115,6 @@
 #define CONFIG_SPL_SPI_LOAD
 #define CONFIG_SYS_SPI_U_BOOT_OFFS	0x20000
 
-#define CONFIG_SPL_NAND_AM33XX_BCH
 #define CONFIG_SPL_NAND_BASE
 #define CONFIG_SPL_NAND_DRIVERS
 #define CONFIG_SPL_NAND_ECC
@@ -507,8 +506,6 @@
 					"512k(mtdoops),"	\
 					"-(configuration)"
 
-#define CONFIG_NAND_OMAP_GPMC
-#define CONFIG_NAND_OMAP_ELM
 #define CONFIG_SYS_NAND_BASE		(0x08000000)	/* physical address */
 							/* to access nand at */
 							/* CS0 */
diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h
index 05399092fe..3e9803e86e 100644
--- a/include/configs/tam3517-common.h
+++ b/include/configs/tam3517-common.h
@@ -125,8 +125,6 @@
  */
 
 /* **** PISMO SUPPORT *** */
-#define CONFIG_NAND_OMAP_GPMC
-#define SMNAND_ENV_OFFSET		0x180000 /* environment starts here */
 
 /* Redundant Environment */
 #define CONFIG_SYS_ENV_SECT_SIZE	(128 << 10)	/* 128 KiB */
@@ -158,7 +156,6 @@
 /* Defines for SPL */
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_CONSOLE
-#define CONFIG_SPL_NAND_SIMPLE
 #define CONFIG_SPL_NAND_SOFTECC
 #define CONFIG_SPL_NAND_WORKSPACE	0x8f07f000 /* below BSS */
 
@@ -189,7 +186,6 @@
 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	0x80	/* 64KiB */
 
 /* NAND boot config */
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
 #define CONFIG_SYS_NAND_PAGE_COUNT	64
 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
 #define CONFIG_SYS_NAND_OOBSIZE		64
@@ -202,7 +198,6 @@
 #define CONFIG_SYS_NAND_ECCSIZE		256
 #define CONFIG_SYS_NAND_ECCBYTES	3
 #define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_HAM1_CODE_SW
-#define CONFIG_NAND_OMAP_GPMC_PREFETCH
 
 #define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
 
diff --git a/include/configs/tao3530.h b/include/configs/tao3530.h
index 11b909b7dd..743e23cd7f 100644
--- a/include/configs/tao3530.h
+++ b/include/configs/tao3530.h
@@ -81,7 +81,6 @@
 /*
  * Board NAND Info.
  */
-#define CONFIG_NAND_OMAP_GPMC
 #define CONFIG_SYS_NAND_ADDR		NAND_BASE	/* physical address */
 							/* to access nand */
 #define CONFIG_SYS_NAND_BASE		NAND_BASE	/* physical address */
@@ -90,7 +89,6 @@
 
 #define CONFIG_SYS_MAX_NAND_DEVICE	1		/* Max number of NAND */
 							/* devices */
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
 /* Environment information */
 
 #define CONFIG_EXTRA_ENV_SETTINGS \
@@ -219,7 +217,6 @@
 
 /* Defines for SPL */
 #define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_NAND_SIMPLE
 
 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	"u-boot.img"
diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h
index e2225cd812..d6d6f98de2 100644
--- a/include/configs/tegra-common.h
+++ b/include/configs/tegra-common.h
@@ -87,7 +87,6 @@
 
 /* Defines for SPL */
 #define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_NAND_SIMPLE
 #define CONFIG_SPL_MAX_FOOTPRINT	(CONFIG_SYS_TEXT_BASE - \
 						CONFIG_SPL_TEXT_BASE)
 #define CONFIG_SYS_SPL_MALLOC_SIZE	0x00010000
diff --git a/include/configs/ti816x_evm.h b/include/configs/ti816x_evm.h
index 1898a82356..ddeef6007d 100644
--- a/include/configs/ti816x_evm.h
+++ b/include/configs/ti816x_evm.h
@@ -66,19 +66,15 @@
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 
 /* NAND: SPL related configs */
-#define CONFIG_SPL_NAND_AM33XX_BCH
 
 /* NAND: device related configs */
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
 #define CONFIG_SYS_NAND_PAGE_COUNT	(CONFIG_SYS_NAND_BLOCK_SIZE / \
 					 CONFIG_SYS_NAND_PAGE_SIZE)
 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
 #define CONFIG_SYS_NAND_OOBSIZE		64
 #define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
 /* NAND: driver related configs */
-#define CONFIG_NAND_OMAP_GPMC_PREFETCH
-#define CONFIG_NAND_OMAP_ELM
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
 #define CONFIG_SYS_NAND_ECCPOS		{ 2, 3, 4, 5, 6, 7, 8, 9, \
 					 10, 11, 12, 13, 14, 15, 16, 17, \
@@ -111,7 +107,6 @@
 
 /* SPL */
 /* Defines for SPL */
-#define CONFIG_SPL_NAND_AM33XX_BCH	/* ELM support */
 #define CONFIG_SPL_TEXT_BASE    0x40400000
 #define CONFIG_SPL_MAX_SIZE		(SRAM_SCRATCH_SPACE_ADDR - \
 					 CONFIG_SPL_TEXT_BASE)
diff --git a/include/configs/ti_am335x_common.h b/include/configs/ti_am335x_common.h
index bf44121a0f..66cacdf347 100644
--- a/include/configs/ti_am335x_common.h
+++ b/include/configs/ti_am335x_common.h
@@ -74,10 +74,6 @@
  * s_init when we have SPL used.
  */
 
-#ifdef CONFIG_NAND
-#define CONFIG_SPL_NAND_AM33XX_BCH	/* ELM support */
-#endif
-
 /* Now bring in the rest of the common code. */
 #include <configs/ti_armv7_omap.h>
 
diff --git a/include/configs/ti_armv7_omap.h b/include/configs/ti_armv7_omap.h
index 306f503d9e..da5fc8108f 100644
--- a/include/configs/ti_armv7_omap.h
+++ b/include/configs/ti_armv7_omap.h
@@ -21,7 +21,6 @@
  * access CS0 at is 0x8000000.
  */
 #ifdef CONFIG_NAND
-#define CONFIG_NAND_OMAP_GPMC
 #ifndef CONFIG_SYS_NAND_BASE
 #define CONFIG_SYS_NAND_BASE		0x8000000
 #endif
diff --git a/include/configs/ti_omap3_common.h b/include/configs/ti_omap3_common.h
index 938136c946..f9a051c639 100644
--- a/include/configs/ti_omap3_common.h
+++ b/include/configs/ti_omap3_common.h
@@ -64,7 +64,6 @@
 					 (64 << 20))
 
 #ifdef CONFIG_NAND
-#define CONFIG_SPL_NAND_SIMPLE
 #define CONFIG_SYS_NAND_BASE		0x30000000
 #endif
 
diff --git a/include/configs/ti_omap4_common.h b/include/configs/ti_omap4_common.h
index 018e4c2512..8994400de9 100644
--- a/include/configs/ti_omap4_common.h
+++ b/include/configs/ti_omap4_common.h
@@ -142,10 +142,6 @@
 #define CONFIG_SYS_SPL_ARGS_ADDR	(CONFIG_SYS_SDRAM_BASE + \
 					 (128 << 20))
 
-#ifdef CONFIG_NAND
-#define CONFIG_SPL_NAND_AM33XX_BCH	/* ELM support */
-#endif
-
 #ifdef CONFIG_SPL_BUILD
 /* No need for i2c in SPL mode as we will use SRI2C for PMIC access on OMAP4 */
 #undef CONFIG_SYS_I2C
diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h
index 73c1d8f66e..539164177b 100644
--- a/include/configs/ti_omap5_common.h
+++ b/include/configs/ti_omap5_common.h
@@ -103,10 +103,6 @@
 #define CONFIG_SYS_SPL_ARGS_ADDR	(CONFIG_SYS_SDRAM_BASE + \
 					 (128 << 20))
 
-#ifdef CONFIG_NAND
-#define CONFIG_SPL_NAND_AM33XX_BCH	/* ELM support */
-#endif
-
 #ifdef CONFIG_SPL_BUILD
 #undef CONFIG_TIMER
 #endif
diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h
index b6574eaa52..a2bf4220e0 100644
--- a/include/configs/tricorder.h
+++ b/include/configs/tricorder.h
@@ -84,7 +84,6 @@
 						"2m(fdt)," \
 						"-(ubi)"
 
-#define CONFIG_NAND_OMAP_GPMC
 #define CONFIG_SYS_NAND_ADDR		NAND_BASE	/* physical address */
 							/* to access nand */
 #define CONFIG_SYS_NAND_BASE		NAND_BASE	/* physical address */
@@ -245,7 +244,6 @@
 
 /* Defines for SPL */
 #define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_NAND_SIMPLE
 
 #define CONFIG_SPL_NAND_BASE
 #define CONFIG_SPL_NAND_DRIVERS
diff --git a/include/configs/woodburn_common.h b/include/configs/woodburn_common.h
index 15b21ef32b..8ea5e48483 100644
--- a/include/configs/woodburn_common.h
+++ b/include/configs/woodburn_common.h
@@ -171,7 +171,6 @@
 /*
  * NAND FLASH driver setup
  */
-#define CONFIG_NAND_MXC
 #define CONFIG_NAND_MXC_V1_1
 #define CONFIG_MXC_NAND_REGS_BASE	(NFC_BASE_ADDR)
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index de92384d40..d80cfe3509 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -1565,13 +1565,9 @@ CONFIG_NAND_KMETER1
 CONFIG_NAND_LPC32XX_MLC
 CONFIG_NAND_LPC32XX_SLC
 CONFIG_NAND_MODE_REG
-CONFIG_NAND_MXC
 CONFIG_NAND_MXC_V1_1
 CONFIG_NAND_NDFC
 CONFIG_NAND_OMAP_ECCSCHEME
-CONFIG_NAND_OMAP_ELM
-CONFIG_NAND_OMAP_GPMC
-CONFIG_NAND_OMAP_GPMC_PREFETCH
 CONFIG_NAND_OMAP_GPMC_WSCFG
 CONFIG_NAND_SECBOOT
 CONFIG_NAND_SPL
@@ -2200,7 +2196,6 @@ CONFIG_SPL_MMC_LOAD
 CONFIG_SPL_MMC_MINIMAL
 CONFIG_SPL_MPC83XX_WAIT_FOR_NAND
 CONFIG_SPL_MXS_PSWITCH_WAIT
-CONFIG_SPL_NAND_AM33XX_BCH
 CONFIG_SPL_NAND_BASE
 CONFIG_SPL_NAND_BOOT
 CONFIG_SPL_NAND_DRIVERS
@@ -2209,7 +2204,6 @@ CONFIG_SPL_NAND_INIT
 CONFIG_SPL_NAND_LOAD
 CONFIG_SPL_NAND_MINIMAL
 CONFIG_SPL_NAND_RAW_ONLY
-CONFIG_SPL_NAND_SIMPLE
 CONFIG_SPL_NAND_SOFTECC
 CONFIG_SPL_NAND_WORKSPACE
 CONFIG_SPL_NO_CPU_SUPPORT_CODE

commit 4aa0b5b7853eb7f1f83f7a4b824c54f341cfe43d
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Sat Oct 14 02:21:18 2017 +0900

    UPSTREAM: mtd: nand: denali_dt: add clock support
    
    Enable clock in the probe hook.  The clock rate will be necessary
    when setup_data_interface hook is supported.
    
    Change-Id: Iaeddd7e3b407d2142c65a71bec58c438d4baf911
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit a89b9bc0950b7dd5f43a88e211be4b2acd58dad7)

diff --git a/drivers/mtd/nand/denali.h b/drivers/mtd/nand/denali.h
index 08db48843d..f796f0dad1 100644
--- a/drivers/mtd/nand/denali.h
+++ b/drivers/mtd/nand/denali.h
@@ -435,6 +435,7 @@ struct nand_buf {
 
 struct denali_nand_info {
 	struct nand_chip nand;
+	unsigned long clk_x_rate;	/* bus interface clock rate */
 	int flash_bank; /* currently selected chip */
 	int status;
 	int platform;
diff --git a/drivers/mtd/nand/denali_dt.c b/drivers/mtd/nand/denali_dt.c
index 4afd679a04..805c066b40 100644
--- a/drivers/mtd/nand/denali_dt.c
+++ b/drivers/mtd/nand/denali_dt.c
@@ -6,6 +6,7 @@
  */
 
 #include <common.h>
+#include <clk.h>
 #include <dm.h>
 #include <linux/io.h>
 #include <linux/ioport.h>
@@ -52,6 +53,7 @@ static int denali_dt_probe(struct udevice *dev)
 {
 	struct denali_nand_info *denali = dev_get_priv(dev);
 	const struct denali_dt_data *data;
+	struct clk clk;
 	struct resource res;
 	int ret;
 
@@ -73,6 +75,16 @@ static int denali_dt_probe(struct udevice *dev)
 
 	denali->flash_mem = devm_ioremap(dev, res.start, resource_size(&res));
 
+	ret = clk_get_by_index(dev, 0, &clk);
+	if (ret)
+		return ret;
+
+	ret = clk_enable(&clk);
+	if (ret)
+		return ret;
+
+	denali->clk_x_rate = clk_get_rate(&clk);
+
 	return denali_init(denali);
 }
 

commit 5a03037fabb6effb6a9c68b411156abe70e45923
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Fri Sep 15 21:44:59 2017 +0900

    UPSTREAM: mtd: nand: do not check R/B# for CMD_SET_FEATURES in nand_command(_lp)
    
    Set Features (0xEF) command toggles the R/B# pin after 4 sub feature
    parameters are written.
    
    Currently, nand_command(_lp) calls chip->dev_ready immediately after
    the address cycle because NAND_CMD_SET_FEATURES falls into default:
    label.  No wait is needed at this point.
    
    If you see nand_onfi_set_features(), R/B# is already cared by the
    chip->waitfunc call.
    
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
    
    [ Linux commit: c5d664aa5a4c4b257a54eb35045031630d105f49 ]
    Change-Id: Id27009bf1ccca742f36bff34dfec9a3477b5688f
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit fe3fddfad71aa228eedcc78a58b34d056724b2c9)

diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 51b4163506..efe3e4fe7b 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -652,6 +652,7 @@ static void nand_command(struct mtd_info *mtd, unsigned int command,
 	case NAND_CMD_SEQIN:
 	case NAND_CMD_STATUS:
 	case NAND_CMD_READID:
+	case NAND_CMD_SET_FEATURES:
 		return;
 
 	case NAND_CMD_RESET:
@@ -750,6 +751,7 @@ static void nand_command_lp(struct mtd_info *mtd, unsigned int command,
 	case NAND_CMD_RNDIN:
 	case NAND_CMD_STATUS:
 	case NAND_CMD_READID:
+	case NAND_CMD_SET_FEATURES:
 		return;
 
 	case NAND_CMD_RESET:

commit 8abe5efa060fe542adf574c2f5d1b555155dcf5b
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Fri Sep 15 21:44:58 2017 +0900

    UPSTREAM: mtd: nand: do not check R/B# for CMD_READID in nand_command(_lp)
    
    Read ID (0x90) command does not toggle the R/B# pin.  Without this
    patch, NAND_CMD_READID falls into the default: label, then R/B# is
    checked by chip->dev_ready().
    
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
    
    [ Linux commit: 3158fa0e739615769cc047d2428f30f4c3b6640e ]
    
    Change-Id: Id5bf75ce480c18888aeefc090af5fbb7c4ebab4b
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 6f29c7a8f1fa8abef167d9017947cf090e39d60e)

diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index c66c33d3c2..51b4163506 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -651,6 +651,7 @@ static void nand_command(struct mtd_info *mtd, unsigned int command,
 	case NAND_CMD_ERASE2:
 	case NAND_CMD_SEQIN:
 	case NAND_CMD_STATUS:
+	case NAND_CMD_READID:
 		return;
 
 	case NAND_CMD_RESET:
@@ -748,6 +749,7 @@ static void nand_command_lp(struct mtd_info *mtd, unsigned int command,
 	case NAND_CMD_SEQIN:
 	case NAND_CMD_RNDIN:
 	case NAND_CMD_STATUS:
+	case NAND_CMD_READID:
 		return;
 
 	case NAND_CMD_RESET:

commit 2e1c78b4d6369317c4474c9d907739dca2b4da36
Author: Lukasz Majewski <lukma@denx.de>
Date:   Mon Sep 25 12:40:08 2017 +0200

    UPSTREAM: sf: bar: Clean BA24 Bank Address Register bit after read/write/erase operation
    
    The content of Bank Address Register (BAR) is volatile. It is cleared
    after power cycle or reset command (RESET F0h).
    
    Some memories (like e.g. s25fl256s) use it to access memory larger than
    0x1000000 (16 MiB).
    
    The problem shows up when one:
    
    1. Reads/writes/erases memory > 16 MiB
    2. Calls "reset" u-boot command (which is not causing BAR to be cleared)
    
    In the above scenario, the SoC ROM sends 0x000000 address to read SPL.
    Unfortunately, the BA24 bit is still set and hence it receives content
    from 0x1000000 (16 MiB) memory address.
    As a result the SoC aborts and we hang. Only power cycle can take the
    SoC out of this state.
    
    How to reproduce/test:
    
    sf probe; sf erase 0x1200000 0x800000; reset
    sf probe; sf erase 0x1200000 0x800000; sf write 0x11000000 0x1200000 0x800000; reset
    sf probe; sf read 0x11000000 0x1200000 0x800000; reset
    
    Change-Id: I9483ea18defb28635f951ff6a4c788f54859ac37
    Signed-off-by: Lukasz Majewski <lukma@denx.de>
    [Fixed comment text on clean_bar function]
    Signed-off-by: Jagan Teki <jagan@openedev.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit ca1ac16da097bf0ab176b1a201653553160dc042)

diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index d39c24251d..9ec5252065 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -113,6 +113,27 @@ static int write_cr(struct spi_flash *flash, u8 wc)
 #endif
 
 #ifdef CONFIG_SPI_FLASH_BAR
+/*
+ * This "clean_bar" is necessary in a situation when one was accessing
+ * spi flash memory > 16 MiB by using Bank Address Register's BA24 bit.
+ *
+ * After it the BA24 bit shall be cleared to allow access to correct
+ * memory region after SW reset (by calling "reset" command).
+ *
+ * Otherwise, the BA24 bit may be left set and then after reset, the
+ * ROM would read/write/erase SPL from 16 MiB * bank_sel address.
+ */
+static int clean_bar(struct spi_flash *flash)
+{
+	u8 cmd, bank_sel = 0;
+
+	if (flash->bank_curr == 0)
+		return 0;
+	cmd = flash->bank_write_cmd;
+
+	return spi_flash_write_common(flash, &cmd, 1, &bank_sel, 1);
+}
+
 static int write_bar(struct spi_flash *flash, u32 offset)
 {
 	u8 cmd, bank_sel;
@@ -339,6 +360,10 @@ int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len)
 		len -= erase_size;
 	}
 
+#ifdef CONFIG_SPI_FLASH_BAR
+	ret = clean_bar(flash);
+#endif
+
 	return ret;
 }
 
@@ -397,6 +422,10 @@ int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
 		offset += chunk_len;
 	}
 
+#ifdef CONFIG_SPI_FLASH_BAR
+	ret = clean_bar(flash);
+#endif
+
 	return ret;
 }
 
@@ -500,6 +529,10 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
 		data += read_len;
 	}
 
+#ifdef CONFIG_SPI_FLASH_BAR
+	ret = clean_bar(flash);
+#endif
+
 	free(cmd);
 	return ret;
 }

commit 002d8af35d5f66bafd62f5508a486e6eee90012d
Author: Andre Przywara <andre.przywara@arm.com>
Date:   Fri Sep 22 22:57:22 2017 +0100

    UPSTREAM: SPL: SPI: sunxi: add SPL FIT image support
    
    The sunxi-specific SPI load routine only knows how to load a legacy
    U-Boot image.
    Teach it how to handle FIT images as well, simply by providing the
    existing SPL FIT loader with the right loader routine to access the SPI
    NOR flash.
    
    Change-Id: I5191e247142685b19f2aab194baef4a1d20bd220
    Signed-off-by: Andre Przywara <andre.przywara@arm.com>
    Reported-by: Peter Kosa <kope@madnet.sk>
    Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit ba09440131a707c4fabf2875b14521bcf2b86938)

diff --git a/drivers/mtd/spi/sunxi_spi_spl.c b/drivers/mtd/spi/sunxi_spi_spl.c
index 852abd41de..35835c2798 100644
--- a/drivers/mtd/spi/sunxi_spi_spl.c
+++ b/drivers/mtd/spi/sunxi_spi_spl.c
@@ -8,6 +8,7 @@
 #include <spl.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
+#include <libfdt.h>
 
 #ifdef CONFIG_SPL_OS_BOOT
 #error CONFIG_SPL_OS_BOOT is not supported yet
@@ -261,27 +262,51 @@ static void spi0_read_data(void *buf, u32 addr, u32 len)
 	}
 }
 
+static ulong spi_load_read(struct spl_load_info *load, ulong sector,
+			   ulong count, void *buf)
+{
+	spi0_read_data(buf, sector, count);
+
+	return count;
+}
+
 /*****************************************************************************/
 
 static int spl_spi_load_image(struct spl_image_info *spl_image,
 			      struct spl_boot_device *bootdev)
 {
-	int err;
+	int ret = 0;
 	struct image_header *header;
 	header = (struct image_header *)(CONFIG_SYS_TEXT_BASE);
 
 	spi0_init();
 
 	spi0_read_data((void *)header, CONFIG_SYS_SPI_U_BOOT_OFFS, 0x40);
-	err = spl_parse_image_header(spl_image, header);
-	if (err)
-		return err;
 
-	spi0_read_data((void *)spl_image->load_addr, CONFIG_SYS_SPI_U_BOOT_OFFS,
-		       spl_image->size);
+        if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
+		image_get_magic(header) == FDT_MAGIC) {
+		struct spl_load_info load;
+
+		debug("Found FIT image\n");
+		load.dev = NULL;
+		load.priv = NULL;
+		load.filename = NULL;
+		load.bl_len = 1;
+		load.read = spi_load_read;
+		ret = spl_load_simple_fit(spl_image, &load,
+					  CONFIG_SYS_SPI_U_BOOT_OFFS, header);
+	} else {
+		ret = spl_parse_image_header(spl_image, header);
+		if (ret)
+			return ret;
+
+		spi0_read_data((void *)spl_image->load_addr,
+			       CONFIG_SYS_SPI_U_BOOT_OFFS, spl_image->size);
+	}
 
 	spi0_deinit();
-	return 0;
+
+	return ret;
 }
 /* Use priorty 0 to override the default if it happens to be linked in */
 SPL_LOAD_IMAGE_METHOD("sunxi SPI", 0, BOOT_DEVICE_SPI, spl_spi_load_image);

commit cae74a6a1be6f9c9eeeb930cac1b9cc5e7afbed4
Author: Marek Vasut <marek.vasut@gmail.com>
Date:   Tue Sep 12 19:09:31 2017 +0200

    UPSTREAM: mtd: cfi: Add support for status register polling
    
    The status register is optional in the AMD command sets, but it's
    presence can be checked by reading out CFI table entry 0xc bit 0.
    If the register is present, prefer using it's bit 7 to determine
    if the flash is busy over reading the flash ; this is needed ie.
    on Hyperflash memories.
    
    Change-Id: If82e42e5320123ef0cf5b436e4f6f0d68393f2b3
    Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 72443c7f7d2174903e73ee88dcb4364e0387bbb2)

diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index df04a425e2..8a5babea7b 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -544,7 +544,16 @@ static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
 #ifdef CONFIG_FLASH_CFI_LEGACY
 	case CFI_CMDSET_AMD_LEGACY:
 #endif
-		retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
+		if (info->sr_supported) {
+			flash_write_cmd (info, sect, info->addr_unlock1,
+					 FLASH_CMD_READ_STATUS);
+			retval = !flash_isset (info, sect, 0,
+					       FLASH_STATUS_DONE);
+		} else {
+			retval = flash_toggle (info, sect, 0,
+					       AMD_STATUS_TOGGLE);
+		}
+
 		break;
 	default:
 		retval = 0;
@@ -1685,6 +1694,7 @@ static void cmdset_amd_read_jedec_ids(flash_info_t *info)
 {
 	ushort bankId = 0;
 	uchar  manuId;
+	uchar  lsbits;
 
 	flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
 	flash_unlock_seq(info, 0);
@@ -1700,6 +1710,9 @@ static void cmdset_amd_read_jedec_ids(flash_info_t *info)
 	}
 	info->manufacturer_id = manuId;
 
+	lsbits = flash_read_uchar(info, FLASH_OFFSET_LOWER_SW_BITS);
+	info->sr_supported = lsbits & BIT(0);
+
 	switch (info->chipwidth){
 	case FLASH_CFI_8BIT:
 		info->device_id = flash_read_uchar (info,
diff --git a/include/flash.h b/include/flash.h
index 0eedb1efa8..dc67cb2df6 100644
--- a/include/flash.h
+++ b/include/flash.h
@@ -42,6 +42,7 @@ typedef struct {
 	ushort	cfi_offset;		/* offset for cfi query			*/
 	ulong   addr_unlock1;		/* unlock address 1 for AMD flash roms  */
 	ulong   addr_unlock2;		/* unlock address 2 for AMD flash roms  */
+	uchar   sr_supported;		/* status register supported            */
 	const char *name;		/* human-readable name	                */
 #endif
 #ifdef CONFIG_MTD
diff --git a/include/mtd/cfi_flash.h b/include/mtd/cfi_flash.h
index eade2b3614..095725a805 100644
--- a/include/mtd/cfi_flash.h
+++ b/include/mtd/cfi_flash.h
@@ -62,6 +62,7 @@
 
 #define FLASH_OFFSET_MANUFACTURER_ID	0x00
 #define FLASH_OFFSET_DEVICE_ID		0x01
+#define FLASH_OFFSET_LOWER_SW_BITS	0x0C
 #define FLASH_OFFSET_DEVICE_ID2		0x0E
 #define FLASH_OFFSET_DEVICE_ID3		0x0F
 #define FLASH_OFFSET_CFI		0x55

commit ff43c4a0a50227772c97c7877679980b3c669c43
Author: Marek Vasut <marek.vasut@gmail.com>
Date:   Tue Sep 12 19:09:08 2017 +0200

    UPSTREAM: mtd: cfi: Zap cfi_flash_base in DM case
    
    Embed the flash base into struct flash_info instead of having ad-hoc
    static array in the code. This does not only remove static variable,
    but also allows CFI-like controllers, ie. HyperFlash ones, to use most
    of the CFI flash code by populating the flash_info with matching base
    address.
    
    Change-Id: I546d35309d7af8e7fe7d7b20a55ff3bc2eee1fbf
    Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
    Signed-off-by: Stefan Roese <sr@denx.de>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 1ec0a37e1cf2add5680b8d7305922c8210c3e2ed)

diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index f3bb72788a..df04a425e2 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -111,11 +111,9 @@ static void cfi_flash_init_dm(void)
 	}
 }
 
-static phys_addr_t cfi_flash_base[CFI_MAX_FLASH_BANKS];
-
 phys_addr_t cfi_flash_bank_addr(int i)
 {
-	return cfi_flash_base[i];
+	return flash_info[i].base;
 }
 #else
 __weak phys_addr_t cfi_flash_bank_addr(int i)
@@ -2458,10 +2456,12 @@ static int cfi_flash_probe(struct udevice *dev)
 	while (idx < len) {
 		addr = fdt_translate_address((void *)blob,
 					     node, cell + idx);
-		cfi_flash_base[cfi_flash_num_flash_banks++] = addr;
+		flash_info[cfi_flash_num_flash_banks].dev = dev;
+		flash_info[cfi_flash_num_flash_banks].base = addr;
+		cfi_flash_num_flash_banks++;
 		idx += addrc + sizec;
 	}
-	gd->bd->bi_flashstart = cfi_flash_base[0];
+	gd->bd->bi_flashstart = flash_info[0].base;
 
 	return 0;
 }
diff --git a/include/flash.h b/include/flash.h
index f53fe91349..0eedb1efa8 100644
--- a/include/flash.h
+++ b/include/flash.h
@@ -47,6 +47,10 @@ typedef struct {
 #ifdef CONFIG_MTD
 	struct mtd_info *mtd;
 #endif
+#ifdef CONFIG_CFI_FLASH			/* DM-specific parts */
+	struct udevice *dev;
+	phys_addr_t base;
+#endif
 } flash_info_t;
 
 extern flash_info_t flash_info[]; /* info for FLASH chips	*/

commit aab298f9ad02fed9b77d70180f79723895137055
Author: Vsevolod Gribov <vgribov@larch-networks.com>
Date:   Fri Sep 15 17:21:07 2017 +0300

    UPSTREAM: Fix s25fl256s position in spi_flash_ids list
    
    Spansion S25FS256S and S25FL256S flashes have equal JEDEC ID and ext ID.
    As far as S25FL256S occures in spi_flash_ids before S25FS256S, U-Boot
    incorrectly detects FS flash as FL. Thus its better to compare with
    S25FS256S first.
    
    Change-Id: Iaf2ba1c7e89d9452fb6134dbfe336dc18473273c
    Signed-off-by: Vsevolod Gribov <vgribov@larch-networks.com>
    [Added S-o-b]
    Signed-off-by: Jagan Teki <jagan@openedev.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit db10809c17c7cd8960d0c45248bbef6e76251ad7)

diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c
index bd505aac1e..9499af6e8d 100644
--- a/drivers/mtd/spi/spi_flash_ids.c
+++ b/drivers/mtd/spi/spi_flash_ids.c
@@ -102,8 +102,8 @@ const struct spi_flash_info spi_flash_ids[] = {
 	{"s25fl128s_256k", INFO(0x012018, 0x4d00, 256 * 1024,    64, RD_FULL | WR_QPP) },
 	{"s25fl128s_64k",  INFO(0x012018, 0x4d01,  64 * 1024,   256, RD_FULL | WR_QPP) },
 	{"s25fl256s_256k", INFO(0x010219, 0x4d00, 256 * 1024,   128, RD_FULL | WR_QPP) },
-	{"s25fl256s_64k",  INFO(0x010219, 0x4d01,  64 * 1024,   512, RD_FULL | WR_QPP) },
 	{"s25fs256s_64k",  INFO6(0x010219, 0x4d0181, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) },
+	{"s25fl256s_64k",  INFO(0x010219, 0x4d01,  64 * 1024,   512, RD_FULL | WR_QPP) },
 	{"s25fs512s",      INFO6(0x010220, 0x4d0081, 128 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) },
 	{"s25fl512s_256k", INFO(0x010220, 0x4d00, 256 * 1024,   256, RD_FULL | WR_QPP) },
 	{"s25fl512s_64k",  INFO(0x010220, 0x4d01,  64 * 1024,  1024, RD_FULL | WR_QPP) },

commit 735c490987fec9fdf0754a144fb2da027002c765
Author: Marek Vasut <marex@denx.de>
Date:   Thu Sep 14 23:15:10 2017 +0200

    UPSTREAM: sf: Fix S25FL116K entry
    
    The flash chip is 2 MiB , organized as 32 x 64 kiB sectors .
    Rectify the entry to match the datasheet, reality and Linux SNOR IDs.
    
    Change-Id: Ibaa80d3b07c122965b27bceb6171ba9f201a8e8e
    Signed-off-by: Marek Vasut <marex@denx.de>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 545a43822226d151701f3bf9b668298a124fefc0)

diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c
index c9cd8cba06..bd505aac1e 100644
--- a/drivers/mtd/spi/spi_flash_ids.c
+++ b/drivers/mtd/spi/spi_flash_ids.c
@@ -93,7 +93,7 @@ const struct spi_flash_info spi_flash_ids[] = {
 	{"s25fl016a",	   INFO(0x010214, 0x0, 64 * 1024,    32, 0) },
 	{"s25fl032a",	   INFO(0x010215, 0x0, 64 * 1024,    64, 0) },
 	{"s25fl064a",	   INFO(0x010216, 0x0, 64 * 1024,   128, 0) },
-	{"s25fl116k",	   INFO(0x014015, 0x0, 64 * 1024,   128, 0) },
+	{"s25fl116k",	   INFO(0x014015, 0x0, 64 * 1024,    32, 0) },
 	{"s25fl164k",	   INFO(0x014017, 0x0140,  64 * 1024,   128, 0) },
 	{"s25fl128p_256k", INFO(0x012018, 0x0300, 256 * 1024,    64, RD_FULL | WR_QPP) },
 	{"s25fl128p_64k",  INFO(0x012018, 0x0301,  64 * 1024,   256, RD_FULL | WR_QPP) },

commit 8f7ecd6e54da8a70df3aeb268d05c867cd6e3ca2
Author: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
Date:   Thu Aug 31 10:26:31 2017 +0530

    UPSTREAM: mtd/spi: Add MT35XU512ABA1G12 NOR flash support
    
    Add MT35XU512ABA1G12 parameters to NOR flash parameters array.
    
    The MT35XU512ABA1G12 only supports 1 bit mode and 8 bits. It can't support
    dual and quad. Supports subsector erase with 4KB granularity, have support
    of FSR(flag status register) and flash size is 64MB.
    
    Change-Id: Ia753825a18b14215b35a557a55e891cad757e6ce
    Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 811b6be166ee4d9eaba73ff1ae5b648d4c98b30e)

diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c
index 939ae5d583..c9cd8cba06 100644
--- a/drivers/mtd/spi/spi_flash_ids.c
+++ b/drivers/mtd/spi/spi_flash_ids.c
@@ -136,6 +136,7 @@ const struct spi_flash_info spi_flash_ids[] = {
 	{"n25q1024a",	   INFO(0x20bb21, 0x0,  64 * 1024,  2048, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
 	{"mt25qu02g",	   INFO(0x20bb22, 0x0,  64 * 1024,  4096, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
 	{"mt25ql02g",	   INFO(0x20ba22, 0x0,  64 * 1024,  4096, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
+	{"mt35xu512g",	   INFO6(0x2c5b1a, 0x104100,  128 * 1024,  512, E_FSR | SECT_4K) },
 #endif
 #ifdef CONFIG_SPI_FLASH_SST		/* SST */
 	{"sst25vf040b",	   INFO(0xbf258d, 0x0,	64 * 1024,     8, SECT_4K | SST_WR) },

commit dd9a02099608b79c783557d628bace556f5b7b9c
Author: rick <rick@andestech.com>
Date:   Mon Aug 28 10:09:01 2017 +0800

    UPSTREAM: nds32: mtd: add spi flash id MX25U16335E.
    
    To support MACRONIX MX25U1635E 16M-BIT flash.
    
    Change-Id: I80437215d617841a9c21cd7208ac415421eba0a6
    Signed-off-by: rick <rick@andestech.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 6d3cb0fdcd7d29ef54651576c3d0c5fb8c789a16)

diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c
index bb43231b16..939ae5d583 100644
--- a/drivers/mtd/spi/spi_flash_ids.c
+++ b/drivers/mtd/spi/spi_flash_ids.c
@@ -84,6 +84,7 @@ const struct spi_flash_info spi_flash_ids[] = {
 	{"mx25l51235f",	   INFO(0xc2201a, 0x0, 64 * 1024,  1024, RD_FULL | WR_QPP) },
 	{"mx25u6435f",	   INFO(0xc22537, 0x0, 64 * 1024,   128, RD_FULL | WR_QPP) },
 	{"mx25l12855e",	   INFO(0xc22618, 0x0, 64 * 1024,   256, RD_FULL | WR_QPP) },
+	{"mx25u1635e",     INFO(0xc22535, 0x0, 64 * 1024,  32, SECT_4K) },
 	{"mx66u51235f",    INFO(0xc2253a, 0x0, 64 * 1024,  1024, RD_FULL | WR_QPP) },
 	{"mx66l1g45g",     INFO(0xc2201b, 0x0, 64 * 1024,  2048, RD_FULL | WR_QPP) },
 #endif

commit 0a9dba2a43355a707f4e195ae5b087eda9865aa5
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Fri Sep 15 21:43:19 2017 +0900

    UPSTREAM: mtd: nand: denali: allow to override corrupted revision register
    
    The Denali IP does not update the revision register properly.
    Allow to override it with SoC data associated with compatible.
    
    Linux had already finished big surgery of this driver, but I need
    to prepare the NAND core before the full sync of the driver.
    For now, I am fixing the most fatal problem on UniPhier platform.
    
    Change-Id: I690175ba7a1f389bcbc7665cbfdd4521750cf009
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
    (cherry picked from commit 6c71b6f45474e58cb85370951f4c144495778e0b)

diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
index 47cf37d1d9..54718f418c 100644
--- a/drivers/mtd/nand/denali.c
+++ b/drivers/mtd/nand/denali.c
@@ -10,7 +10,7 @@
 #include <malloc.h>
 #include <nand.h>
 #include <linux/errno.h>
-#include <asm/io.h>
+#include <linux/io.h>
 
 #include "denali.h"
 
@@ -433,17 +433,13 @@ static void find_valid_banks(struct denali_nand_info *denali)
  */
 static void detect_max_banks(struct denali_nand_info *denali)
 {
-	uint32_t features = readl(denali->flash_reg + FEATURES);
-	/*
-	 * Read the revision register, so we can calculate the max_banks
-	 * properly: the encoding changed from rev 5.0 to 5.1
-	 */
-	u32 revision = MAKE_COMPARABLE_REVISION(
-				readl(denali->flash_reg + REVISION));
-	if (revision < REVISION_5_1)
-		denali->max_banks = 2 << (features & FEATURES__N_BANKS);
-	else
-		denali->max_banks = 1 << (features & FEATURES__N_BANKS);
+	uint32_t features = ioread32(denali->flash_reg + FEATURES);
+
+	denali->max_banks = 1 << (features & FEATURES__N_BANKS);
+
+	/* the encoding changed from rev 5.0 to 5.1 */
+	if (denali->revision < 0x0501)
+		denali->max_banks <<= 1;
 }
 
 static void detect_partition_feature(struct denali_nand_info *denali)
@@ -1153,6 +1149,13 @@ static void denali_cmdfunc(struct mtd_info *mtd, unsigned int cmd, int col,
 /* Initialization code to bring the device up to a known good state */
 static void denali_hw_init(struct denali_nand_info *denali)
 {
+	/*
+	 * The REVISION register may not be reliable.  Platforms are allowed to
+	 * override it.
+	 */
+	if (!denali->revision)
+		denali->revision = swab16(ioread32(denali->flash_reg + REVISION));
+
 	/*
 	 * tell driver how many bit controller will skip before writing
 	 * ECC code in OOB. This is normally used for bad block marker
diff --git a/drivers/mtd/nand/denali.h b/drivers/mtd/nand/denali.h
index 694bce53a9..08db48843d 100644
--- a/drivers/mtd/nand/denali.h
+++ b/drivers/mtd/nand/denali.h
@@ -166,8 +166,6 @@
 
 #define REVISION				0x370
 #define     REVISION__VALUE				0xffff
-#define MAKE_COMPARABLE_REVISION(x)		swab16((x) & REVISION__VALUE)
-#define REVISION_5_1				0x00000501
 
 #define ONFI_DEVICE_FEATURES			0x380
 #define     ONFI_DEVICE_FEATURES__VALUE			0x003f
@@ -462,8 +460,13 @@ struct denali_nand_info {
 	uint32_t blksperchip;
 	uint32_t bbtskipbytes;
 	uint32_t max_banks;
+	unsigned int revision;
+	unsigned int caps;
 };
 
+#define DENALI_CAP_HW_ECC_FIXUP			BIT(0)
+#define DENALI_CAP_DMA_64BIT			BIT(1)
+
 int denali_init(struct denali_nand_info *denali);
 
 #endif /* __DENALI_H__ */
diff --git a/drivers/mtd/nand/denali_dt.c b/drivers/mtd/nand/denali_dt.c
index 0a6155c748..4afd679a04 100644
--- a/drivers/mtd/nand/denali_dt.c
+++ b/drivers/mtd/nand/denali_dt.c
@@ -12,15 +12,38 @@
 
 #include "denali.h"
 
+struct denali_dt_data {
+	unsigned int revision;
+	unsigned int caps;
+};
+
+static const struct denali_dt_data denali_socfpga_data = {
+	.caps = DENALI_CAP_HW_ECC_FIXUP,
+};
+
+static const struct denali_dt_data denali_uniphier_v5a_data = {
+	.caps = DENALI_CAP_HW_ECC_FIXUP |
+		DENALI_CAP_DMA_64BIT,
+};
+
+static const struct denali_dt_data denali_uniphier_v5b_data = {
+	.revision = 0x0501,
+	.caps = DENALI_CAP_HW_ECC_FIXUP |
+		DENALI_CAP_DMA_64BIT,
+};
+
 static const struct udevice_id denali_nand_dt_ids[] = {
 	{
 		.compatible = "altr,socfpga-denali-nand",
+		.data = (unsigned long)&denali_socfpga_data,
 	},
 	{
 		.compatible = "socionext,uniphier-denali-nand-v5a",
+		.data = (unsigned long)&denali_uniphier_v5a_data,
 	},
 	{
 		.compatible = "socionext,uniphier-denali-nand-v5b",
+		.data = (unsigned long)&denali_uniphier_v5b_data,
 	},
 	{ /* sentinel */ }
 };
@@ -28,9 +51,16 @@ static const struct udevice_id denali_nand_dt_ids[] = {
 static int denali_dt_probe(struct udevice *dev)
 {
 	struct denali_nand_info *denali = dev_get_priv(dev);
+	const struct denali_dt_data *data;
 	struct resource res;
 	int ret;
 
+	data = (void *)dev_get_driver_data(dev);
+	if (data) {
+		denali->revision = data->revision;
+		denali->caps = data->caps;
+	}
+
 	ret = dev_read_resource_byname(dev, "denali_reg", &res);
 	if (ret)
 		return ret;

commit 83d287f57fc4785f638cd62b4a16cb26eab68d69
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 26 14:23:39 2019 +0800

    common: Makefile: optimize compile rules for TPL/SPL/U-Boot
    
    This patch avoids useless files to be compiled.
    
    Change-Id: I48f9430aa98742013b96da0eb0d5c0068d731242
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/Makefile b/common/Makefile
index 1ea451c8ee..2a446867dc 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -66,18 +66,21 @@ endif # !CONFIG_SPL_BUILD
 obj-$(CONFIG_$(SPL_TPL_)BOOTSTAGE) += bootstage.o
 
 ifdef CONFIG_SPL_BUILD
+ifndef CONFIG_TPL_BUILD
 obj-$(CONFIG_SPL_DFU_SUPPORT) += dfu.o
 obj-$(CONFIG_SPL_DFU_SUPPORT) += cli_hush.o
 obj-$(CONFIG_SPL_HASH_SUPPORT) += hash.o
 obj-$(CONFIG_SPL_YMODEM_SUPPORT) += xyzModem.o
 obj-$(CONFIG_SPL_LOAD_FIT) += common_fit.o
 obj-$(CONFIG_SPL_NET_SUPPORT) += miiphyutil.o
+endif
 obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += fdt_support.o
 ifdef CONFIG_SPL_USB_HOST_SUPPORT
 obj-$(CONFIG_SPL_USB_SUPPORT) += usb.o usb_hub.o
 obj-$(CONFIG_USB_STORAGE) += usb_storage.o
 endif
 endif
+
 #others
 obj-$(CONFIG_DDR_SPD) += ddr_spd.o
 obj-$(CONFIG_SPD_EEPROM) += ddr_spd.o
@@ -99,15 +102,22 @@ ifneq ($(CONFIG_$(SPL_)SYS_MALLOC_F_LEN),0)
 obj-y += malloc_simple.o
 endif
 endif
+
+ifndef CONFIG_TPL_BUILD
 obj-y += image.o
+endif
 obj-$(CONFIG_$(SPL_TPL_)ANDROID_AB) += android_ab.o
 obj-$(CONFIG_$(SPL_TPL_)ANDROID_BOOT_IMAGE) += image-android.o
 obj-$(CONFIG_$(SPL_TPL_)ANDROID_BOOTLOADER) += android_bootloader.o
+
 obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += image-fdt.o
+ifndef CONFIG_TPL_BUILD
 obj-$(CONFIG_$(SPL_TPL_)FIT) += image-fit.o
 obj-$(CONFIG_$(SPL_)MULTI_DTB_FIT) += boot_fit.o common_fit.o
 obj-$(CONFIG_$(SPL_TPL_)FIT_SIGNATURE) += image-sig.o
+endif
 obj-$(CONFIG_IO_TRACE) += iotrace.o
+
 obj-y += memsize.o
 obj-y += stdio.o
 
@@ -115,7 +125,11 @@ ifdef CONFIG_CMD_DTIMG
 obj-y += image-android-dt.o
 endif
 
+ifndef CONFIG_TPL_BUILD
 obj-$(CONFIG_RKIMG_BOOTLOADER) += boot_rkimg.o
+endif
+
+ifndef CONFIG_SPL_BUILD
 # This option is not just y/n - it can have a numeric value
 ifdef CONFIG_FASTBOOT_FLASH
 obj-y += image-sparse.o
@@ -130,6 +144,7 @@ endif
 ifneq ($(or $(CONFIG_USB_FUNCTION_FASTBOOT),$(CONFIG_UDP_FUNCTION_FASTBOOT)),)
 obj-y += fb_common.o
 endif
+endif
 
 ifdef CONFIG_CMD_EEPROM_LAYOUT
 obj-y += eeprom/eeprom_field.o eeprom/eeprom_layout.o
@@ -144,6 +159,8 @@ obj-$(CONFIG_$(SPL_)LOG_CONSOLE) += log_console.o
 obj-y += s_record.o
 obj-y += xyzModem.o
 
+ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_ANDROID_WRITE_KEYBOX) += write_keybox.o
 obj-$(CONFIG_ANDROID_KEYMASTER_CA) += keymaster.o
 obj-$(CONFIG_ANDROID_KEYMASTER_CA) += attestation_key.o
+endif

commit 63a580aed38e234c5243297affbb38aee35d4f03
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Jul 2 21:47:56 2019 +0800

    lib: avb: the rsa_key.c is used when enable CONFIG_ROCKCHIP_CRYPTO_V1
    
    Change-Id: If266df70d0969d5a3556e505f39b853cf818a338
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/lib/avb/libavb_atx/avb_atx_validate.c b/lib/avb/libavb_atx/avb_atx_validate.c
index b11ed88d5f..3384da5e68 100644
--- a/lib/avb/libavb_atx/avb_atx_validate.c
+++ b/lib/avb/libavb_atx/avb_atx_validate.c
@@ -109,7 +109,9 @@ static bool verify_permanent_attributes(
   rsa_key.algo = CRYPTO_RSA2048;
   rsa_key.n = (u32 *)&pub_key.rsa_n;
   rsa_key.e = (u32 *)&pub_key.rsa_e;
+#ifdef CONFIG_ROCKCHIP_CRYPTO_V1
   rsa_key.c = (u32 *)&pub_key.rsa_c;
+#endif
   ret = crypto_rsa_verify(dev, &rsa_key, (u8 *)rsa_hash_revert, (u8 *)rsaResult_temp);
   if (ret) {
     avb_error("Hardware verify error!\n");

commit 9f879ce9957931121cf387495196b4295a2c46bb
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Jul 2 20:02:34 2019 +0800

    rockchip: dts: rk1808: add and enable crypto node
    
    Change-Id: I662097163bdbb61ccee784bc07afabbd8267c50c
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/dts/rk1808-evb.dts b/arch/arm/dts/rk1808-evb.dts
index d857a0b5f2..59d004b6d7 100644
--- a/arch/arm/dts/rk1808-evb.dts
+++ b/arch/arm/dts/rk1808-evb.dts
@@ -40,6 +40,10 @@
 	};
 };
 
+&crypto {
+	status = "okay";
+};
+
 &emmc {
 	fifo-mode;
 	bus-width = <8>;
diff --git a/arch/arm/dts/rk1808-u-boot.dtsi b/arch/arm/dts/rk1808-u-boot.dtsi
index 6ec0c68a5d..c1c1bbbf43 100644
--- a/arch/arm/dts/rk1808-u-boot.dtsi
+++ b/arch/arm/dts/rk1808-u-boot.dtsi
@@ -25,6 +25,10 @@
 
 };
 
+&crypto {
+	u-boot,dm-pre-reloc;
+};
+
 &dmc {
 	u-boot,dm-pre-reloc;
 };
diff --git a/arch/arm/dts/rk1808.dtsi b/arch/arm/dts/rk1808.dtsi
index 47e1975660..8e333a0bc3 100644
--- a/arch/arm/dts/rk1808.dtsi
+++ b/arch/arm/dts/rk1808.dtsi
@@ -861,6 +861,15 @@
 		status = "disabled";
 	};
 
+	crypto: crypto@ff630000 {
+		compatible = "rockchip,rk1808-crypto";
+		reg = <0x0 0xff630000 0x0 0x10000>;
+		clock-names = "sclk_crypto", "sclk_crypto_apk";
+		clocks = <&cru SCLK_CRYPTO>, <&cru SCLK_CRYPTO_APK>;
+		clock-frequency = <200000000>, <300000000>;
+		status = "disabled";
+	};
+
 	i2s0: i2s@ff7e0000 {
 		compatible = "rockchip,rk1808-i2s-tdm";
 		reg = <0x0 0xff7e0000 0x0 0x1000>;

commit 32f0452dd74b825eef3c8a5d105fd95393e89699
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Mon Jul 1 15:37:24 2019 +0800

    clk: rockchip: rk1808: support crypto clk get/set rate
    
    Change-Id: Id09bd7e6a303bc3e72421aeef277a16805e95761
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk1808.h b/arch/arm/include/asm/arch-rockchip/cru_rk1808.h
index c6515a391c..9e12f805e4 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk1808.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk1808.h
@@ -219,6 +219,18 @@ enum {
 	LSCLK_BUS_DIV_CON_SHIFT		= 0,
 	LSCLK_BUS_DIV_CON_MASK		= 0x1f << LSCLK_BUS_DIV_CON_SHIFT,
 
+	/* CRU_CLK_SEL29_CON */
+	CRYPTO_APK_SEL_SHIFT	= 15,
+	CRYPTO_APK_PLL_SEL_MASK	= 1 << CRYPTO_APK_SEL_SHIFT,
+	CRYPTO_PLL_SEL_GPLL	= 0,
+	CRYPTO_PLL_SEL_CPLL,
+	CRYPTO_APK_DIV_SHIFT	= 8,
+	CRYPTO_APK_DIV_MASK	= 0x1f << CRYPTO_APK_DIV_SHIFT,
+	CRYPTO_PLL_SEL_SHIFT	= 7,
+	CRYPTO_PLL_SEL_MASK	= 1 << CRYPTO_PLL_SEL_SHIFT,
+	CRYPTO_DIV_SHIFT	= 0,
+	CRYPTO_DIV_MASK		= 0x1f << CRYPTO_DIV_SHIFT,
+
 	/* CRU_CLK_SEL59_CON */
 	CLK_I2C_PLL_SEL_GPLL		= 0,
 	CLK_I2C_PLL_SEL_24M,
diff --git a/drivers/clk/rockchip/clk_rk1808.c b/drivers/clk/rockchip/clk_rk1808.c
index 10ff010438..51223f93fa 100644
--- a/drivers/clk/rockchip/clk_rk1808.c
+++ b/drivers/clk/rockchip/clk_rk1808.c
@@ -625,6 +625,63 @@ static int rk1808_mac_set_speed_clk(struct clk *clk, ulong clk_id, uint hz)
 	}
 	return 0;
 }
+
+static ulong rk1808_crypto_get_clk(struct rk1808_clk_priv *priv, ulong clk_id)
+{
+	struct rk1808_cru *cru = priv->cru;
+	u32 div, con, parent;
+
+	switch (clk_id) {
+	case SCLK_CRYPTO:
+		con = readl(&cru->clksel_con[29]);
+		div = (con & CRYPTO_DIV_MASK) >> CRYPTO_DIV_SHIFT;
+		parent = priv->gpll_hz;
+		break;
+	case SCLK_CRYPTO_APK:
+		con = readl(&cru->clksel_con[29]);
+		div = (con & CRYPTO_APK_DIV_MASK) >> CRYPTO_APK_DIV_SHIFT;
+		parent = priv->gpll_hz;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rk1808_crypto_set_clk(struct rk1808_clk_priv *priv, ulong clk_id,
+				   ulong hz)
+{
+	struct rk1808_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+	assert(src_clk_div - 1 <= 31);
+
+	/*
+	 * select gpll as crypto clock source and
+	 * set up dependent divisors for crypto clocks.
+	 */
+	switch (clk_id) {
+	case SCLK_CRYPTO:
+		rk_clrsetreg(&cru->clksel_con[29],
+			     CRYPTO_PLL_SEL_MASK | CRYPTO_DIV_MASK,
+			     CRYPTO_PLL_SEL_GPLL << CRYPTO_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << CRYPTO_DIV_SHIFT);
+		break;
+	case SCLK_CRYPTO_APK:
+		rk_clrsetreg(&cru->clksel_con[29],
+			     CRYPTO_APK_PLL_SEL_MASK | CRYPTO_APK_DIV_MASK,
+			     CRYPTO_PLL_SEL_GPLL << CRYPTO_APK_SEL_SHIFT |
+			     (src_clk_div - 1) << CRYPTO_APK_DIV_SHIFT);
+		break;
+	default:
+		printf("do not support this peri freq\n");
+		return -EINVAL;
+	}
+
+	return rk1808_crypto_get_clk(priv, clk_id);
+}
 #endif
 
 static ulong rk1808_bus_get_clk(struct rk1808_clk_priv *priv, ulong clk_id)
@@ -880,6 +937,10 @@ static ulong rk1808_clk_get_rate(struct clk *clk)
 	case DCLK_VOPLITE:
 		rate = rk1808_vop_get_clk(priv, clk->id);
 		break;
+	case SCLK_CRYPTO:
+	case SCLK_CRYPTO_APK:
+		rate = rk1808_crypto_get_clk(priv, clk->id);
+		break;
 #endif
 	case HSCLK_BUS_PRE:
 	case MSCLK_BUS_PRE:
@@ -985,6 +1046,10 @@ static ulong rk1808_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_GMAC_RGMII_SPEED:
 		ret = rk1808_mac_set_speed_clk(clk, clk->id, rate);
 		break;
+	case SCLK_CRYPTO:
+	case SCLK_CRYPTO_APK:
+		ret = rk1808_crypto_set_clk(priv, clk->id, rate);
+		break;
 #endif
 	case HSCLK_BUS_PRE:
 	case MSCLK_BUS_PRE:

commit fafc7e6361f4164d7807c91e333a1e2f5f467287
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Jul 2 19:57:47 2019 +0800

    crypto: add rk1808 compatible
    
    Change-Id: Ia75829183f99f688d7b749b19755c401e54f9a1d
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/crypto/rockchip/crypto_v2.c b/drivers/crypto/rockchip/crypto_v2.c
index fa49694515..05edd10669 100644
--- a/drivers/crypto/rockchip/crypto_v2.c
+++ b/drivers/crypto/rockchip/crypto_v2.c
@@ -644,6 +644,7 @@ static int rockchip_crypto_probe(struct udevice *dev)
 
 static const struct udevice_id rockchip_crypto_ids[] = {
 	{ .compatible = "rockchip,px30-crypto" },
+	{ .compatible = "rockchip,rk1808-crypto" },
 	{ }
 };
 

commit 3a72f5033d35aa488cca94e0411865ca49863de2
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Jul 2 17:48:15 2019 +0800

    crypto: remove platform dependency configuration
    
    Change-Id: I801509d19417a1f4e88e430220e624ab6d4757d1
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/crypto/rockchip/Kconfig b/drivers/crypto/rockchip/Kconfig
index d65abdb445..3e21935c3d 100644
--- a/drivers/crypto/rockchip/Kconfig
+++ b/drivers/crypto/rockchip/Kconfig
@@ -1,15 +1,13 @@
 config ROCKCHIP_CRYPTO_V1
 	bool "Enable rockchip crypto v1 support"
-	depends on DM_CRYPTO && (ROCKCHIP_RK3399 || ROCKCHIP_RK3368 || \
-				 ROCKCHIP_RK3328 || ROCKCHIP_RK3229 || \
-				 ROCKCHIP_RK3288 || ROCKCHIP_RK3128)
+	depends on DM_CRYPTO
 	help
 	  This enable MD5/SHA1/SHA256/RSA512/RSA1024/RSA2048 algorithm support for
 	  rockchip crypto v1 on platforms: rk3399/rk3368/rk3328/rk3229/rk3288/rk3128.
 
 config ROCKCHIP_CRYPTO_V2
 	bool "Enable rockchip crypto v2 support"
-	depends on DM_CRYPTO && (ROCKCHIP_RK3326 || ROCKCHIP_PX30)
+	depends on DM_CRYPTO
 	help
 	  This enable MD5/SHA1/SHA256/RSA512/RSA1024/RSA2048 algorithm support for
-	  rockchip crypto v2 on platforms: px30/rk3326.
+	  rockchip crypto v2 on platforms: px30/rk3326/rk1808/rk3308.

commit 064a6fd5eecb498d24e349e26ed1b872cb7f5a3a
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Jul 2 09:51:32 2019 +0800

    rockchip: dts: rk3288: add and enable crypto node
    
    Change-Id: Ibd66a01886ccab352dcf0345e4df1324b02d0880
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/dts/rk3288-evb.dts b/arch/arm/dts/rk3288-evb.dts
index 9c6ac001c9..64f0184e01 100644
--- a/arch/arm/dts/rk3288-evb.dts
+++ b/arch/arm/dts/rk3288-evb.dts
@@ -13,6 +13,10 @@
 	compatible = "evb-rk3288,evb-rk3288", "rockchip,rk3288";
 };
 
+&crypto {
+	status = "okay";
+};
+
 &dmc {
 	rockchip,pctl-timing = <0x215 0xc8 0x0 0x35 0x26 0x2 0x70 0x2000d
 		0x6 0x0 0x8 0x4 0x17 0x24 0xd 0x6
diff --git a/arch/arm/dts/rk3288-u-boot.dtsi b/arch/arm/dts/rk3288-u-boot.dtsi
index e51e5e0373..c98e3917e9 100644
--- a/arch/arm/dts/rk3288-u-boot.dtsi
+++ b/arch/arm/dts/rk3288-u-boot.dtsi
@@ -33,6 +33,10 @@
 	u-boot,dm-pre-reloc;
 };
 
+&crypto {
+	u-boot,dm-pre-reloc;
+};
+
 &cru {
 	u-boot,dm-pre-reloc;
 };
diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index 10249bcbc9..c00699bb98 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -697,6 +697,14 @@
 		status = "disabled";
 	};
 
+	crypto: crypto@ff8a0000 {
+		compatible = "rockchip,rk3288-crypto";
+		reg = <0xff8a0000 0x10000>;
+		clock-names = "sclk_crypto";
+		clocks = <&cru SCLK_CRYPTO>;
+		status = "disabled";
+	};
+
 	vopb: vop@ff930000 {
 		compatible = "rockchip,rk3288-vop-big";
 		reg = <0xff930000 0x19c>;

commit c46b3f6d965d45d69d4287f8935e0540f7fa0417
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jun 28 15:28:36 2019 +0800

    lib: add stdlib.c
    
    Since we need to realize standard library function other than use them
    with gcc tool chain in U-Boot. So add standard library function here.
    
    Change-Id: I10009c5bbe31fabacd929df3c44218ae9c6a885f
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/stdlib.h b/include/stdlib.h
index 6bc7fbb3c4..5b87ea0237 100644
--- a/include/stdlib.h
+++ b/include/stdlib.h
@@ -9,4 +9,6 @@
 
 #include <malloc.h>
 
+int atoi(const char *nptr);
+
 #endif /* __STDLIB_H_ */
diff --git a/lib/Makefile b/lib/Makefile
index 30f195b66f..d62b97caf0 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -90,6 +90,7 @@ obj-y += linux_string.o
 obj-y += membuff.o
 obj-$(CONFIG_REGEX) += slre.o
 obj-y += string.o
+obj-y += stdlib.o
 obj-y += tables_csum.o
 obj-y += time.o
 obj-$(CONFIG_TRACE) += trace.o
diff --git a/lib/stdlib.c b/lib/stdlib.c
new file mode 100644
index 0000000000..e4f15f91a3
--- /dev/null
+++ b/lib/stdlib.c
@@ -0,0 +1,39 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <linux/ctype.h>
+#include <linux/types.h>
+
+long atol(const char *nptr)
+{
+	int c;
+	long total;
+	int sign;
+
+	while (isspace((int)(unsigned char)*nptr))
+		++nptr;
+
+	c = (int)(unsigned char)*nptr++;
+	sign = c;
+	if (c == '-' || c == '+')
+		c = (int)(unsigned char)*nptr++;
+
+	total = 0;
+
+	while (isdigit(c)) {
+		total = 10 * total + (c - '0');
+		c = (int)(unsigned char)*nptr++;
+	}
+
+	if (sign == '-')
+		return -total;
+	else
+		return total;
+}
+
+int atoi(const char *nptr)
+{
+	return (int)atol(nptr);
+}

commit d6d708d1a329a6369143e8dd34cf4e2c81d5d92f
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Thu Jun 27 18:09:47 2019 +0800

    rockchip: drivers: mtd: nand: modify the bad block detection process
    
    Change-Id: I97c99e91516f34a270684cbb77820b4078f1cf03
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/drivers/mtd/nand/rockchip_nand.c b/drivers/mtd/nand/rockchip_nand.c
index 2b9bde9604..0f3c5ff2c4 100644
--- a/drivers/mtd/nand/rockchip_nand.c
+++ b/drivers/mtd/nand/rockchip_nand.c
@@ -539,7 +539,7 @@ static int rockchip_nand_ecc_init(struct mtd_info *mtd,
 
 static int rockchip_nand_block_bad(struct mtd_info *mtd, loff_t ofs)
 {
-	int page, res = 0, i;
+	int page, res = 0;
 	struct nand_chip *chip = mtd_to_nand(mtd);
 	u16 bad = 0xff;
 	int chipnr = (int)(ofs >> chip->chip_shift);
@@ -549,13 +549,23 @@ static int rockchip_nand_block_bad(struct mtd_info *mtd, loff_t ofs)
 	chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);
 	if(rockchip_nand_hw_syndrome_pio_read_page(mtd,
 	   chip, chip->buffers->databuf, 0, page) == -1) {
+		/* first page of the block*/
 		chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos, page);
-		for (i = 0; i < 8; i++) {
-			bad = chip->read_byte(mtd);
-			if (bad)
-				break;
-		}
-		if (i >= 8)
+		bad = chip->read_byte(mtd);
+		if (bad != 0xFF)
+			res = 1;
+		/* second page of the block*/
+		chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos,
+			      page + 1);
+		bad = chip->read_byte(mtd);
+		if (bad != 0xFF)
+			res = 1;
+		/* last page of the block */
+		page += ((mtd->erasesize - mtd->writesize) >> chip->chip_shift);
+		page--;
+		chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos, page);
+		bad = chip->read_byte(mtd);
+		if (bad != 0xFF)
 			res = 1;
 	}
 	chip->select_chip(mtd, -1);

commit 0bc19640076f7547105e0e2a19812cebb2cfde2d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jun 27 20:28:20 2019 +0800

    common: rkimg: clear boot mode register when its value is not reboot reason
    
    It's not safe to drop clear operation, example: using "reboot fastboot" from
    kernel to enter U-Boot fastboot mode and finally reset system by fastboot
    command "fastboot reboot", the system reboot and enter U-Boot fastboot mode
    again but not boot to kernel.
    
    Take back the clear operation which was dropped on:
    (9d2bc40 boot_rkimg: don't override BOOT_MODE_REG)
    
    Change-Id: I5e17e19e53700ec5244660122d837efc9cd30d4f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index e0d64bcae0..f0d210009c 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -393,6 +393,7 @@ int rockchip_get_boot_mode(void)
 	int ret;
 	uint32_t reg_boot_mode;
 	char *env_reboot_mode;
+	int clear_boot_reg = 0;
 
 	/*
 	 * Here, we mainly check for:
@@ -446,29 +447,44 @@ fallback:
 	if (reg_boot_mode == BOOT_LOADER) {
 		printf("boot mode: loader\n");
 		boot_mode = BOOT_MODE_LOADER;
+		clear_boot_reg = 1;
 	} else if (reg_boot_mode == BOOT_FASTBOOT) {
 		printf("boot mode: bootloader\n");
 		boot_mode = BOOT_MODE_BOOTLOADER;
+		clear_boot_reg = 1;
 	} else if (bmsg && !strcmp(bmsg->command, "boot-recovery")) {
 		printf("boot mode: recovery\n");
 		boot_mode = BOOT_MODE_RECOVERY;
+		clear_boot_reg = 1;
 	} else {
 		switch (reg_boot_mode) {
 		case BOOT_NORMAL:
 			printf("boot mode: normal\n");
 			boot_mode = BOOT_MODE_NORMAL;
+			clear_boot_reg = 1;
 			break;
 		case BOOT_RECOVERY:
 			/* printf("boot mode: recovery\n"); */
 			boot_mode = BOOT_MODE_RECOVERY;
+			clear_boot_reg = 1;
 			break;
 		case BOOT_UMS:
 			printf("boot mode: ums\n");
 			boot_mode = BOOT_MODE_UMS;
+			clear_boot_reg = 1;
 			break;
 		case BOOT_CHARGING:
 			printf("boot mode: charging\n");
 			boot_mode = BOOT_MODE_CHARGING;
+			clear_boot_reg = 1;
+			break;
+		case BOOT_PANIC:
+			printf("boot mode: panic\n");
+			boot_mode = BOOT_MODE_PANIC;
+			break;
+		case BOOT_WATCHDOG:
+			printf("boot mode: watchdog\n");
+			boot_mode = BOOT_MODE_WATCHDOG;
 			break;
 		default:
 			printf("boot mode: None\n");
@@ -476,6 +492,13 @@ fallback:
 		}
 	}
 
+	/*
+	 * We don't clear boot mode reg when its value stands for the reboot
+	 * reason or others(in the future), the kernel will need and clear it.
+	 */
+	if (clear_boot_reg)
+		writel(BOOT_NORMAL, (void *)CONFIG_ROCKCHIP_BOOT_MODE_REG);
+
 	return boot_mode;
 }
 
diff --git a/include/boot_rkimg.h b/include/boot_rkimg.h
index 795ad62901..954c8fec09 100644
--- a/include/boot_rkimg.h
+++ b/include/boot_rkimg.h
@@ -16,6 +16,8 @@ enum _boot_mode {
 	BOOT_MODE_CHARGING,
 	BOOT_MODE_UMS,
 	BOOT_MODE_BROM_DOWNLOAD,
+	BOOT_MODE_PANIC,
+	BOOT_MODE_WATCHDOG,
 	BOOT_MODE_UNDEFINE,
 };
 

commit 791112ddc08d07e2f8e03ee269c2e1963dac4f64
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jun 28 17:29:06 2019 +0800

    rockchip: boot mode: sync reboot reason flags from kernel
    
    Change-Id: I6d0ec7eadfa7ae0455e53bb21072d5836a09c64e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/boot_mode.h b/arch/arm/include/asm/arch-rockchip/boot_mode.h
index 16ec54bb7c..970a3249da 100644
--- a/arch/arm/include/asm/arch-rockchip/boot_mode.h
+++ b/arch/arm/include/asm/arch-rockchip/boot_mode.h
@@ -9,6 +9,10 @@
 #define BOOT_LOADER		(REBOOT_FLAG + 1)
 /* enter recovery */
 #define BOOT_RECOVERY		(REBOOT_FLAG + 3)
+/* reboot by panic */
+#define BOOT_PANIC		(REBOOT_FLAG + 7)
+/* reboot by watchdog */
+#define BOOT_WATCHDOG		(REBOOT_FLAG + 8)
 /* enter fastboot mode */
 #define BOOT_FASTBOOT		(REBOOT_FLAG + 9)
 /* enter charging mode */

commit 579a09e344c0a2000a54147cc84b99f8653f449f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jun 28 17:43:05 2019 +0800

    configs: rk1808: enable CONFIG_REGULATOR_FAN53555
    
    Change-Id: I0afe69c938a6b59ea6d6cd8cfaedc2f56048b7d8
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk1808_defconfig b/configs/rk1808_defconfig
index 834776a53d..0cba656691 100644
--- a/configs/rk1808_defconfig
+++ b/configs/rk1808_defconfig
@@ -62,6 +62,7 @@ CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_FAN53555=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_REGULATOR_RK8XX=y

commit 1bca07a1ff24a92d23e0dcef5969ef670ac4510a
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Fri Jun 28 11:12:39 2019 +0800

    usb: gadget: composite: add null pointer check
    
    The cdev->config means the currently active configuration and
    it might be null, fix it by adding null pointer check.
    
    Change-Id: I18261653436186c342b447c24ef46a8acc42825f
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c
index 90cbdddd28..eddb45bf27 100644
--- a/drivers/usb/gadget/composite.c
+++ b/drivers/usb/gadget/composite.c
@@ -958,10 +958,14 @@ unknown:
 		 */
 		switch (ctrl->bRequestType & USB_RECIP_MASK) {
 		case USB_RECIP_INTERFACE:
+			if (!cdev->config)
+				break;
 			f = cdev->config->interface[intf];
 			break;
 
 		case USB_RECIP_ENDPOINT:
+			if (!cdev->config)
+				break;
 			endp = ((w_index & 0x80) >> 3) | (w_index & 0x0f);
 			list_for_each_entry(f, &cdev->config->functions, list) {
 				if (test_bit(endp, f->endpoints))

commit 87f9541a897790acf69f9c6ea8c600740649c91f
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Jun 27 15:10:33 2019 +0800

    common: android: fix tries_remaining minus twice in avb & ab system
    
    Change-Id: I422cb3c2f7e28849772a65b8060a0d8e26313d47
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index d7e497fa1b..20bbad5049 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -675,7 +675,11 @@ static AvbSlotVerifyResult android_slot_verify(char *boot_partname,
 	}
 
 out:
-#ifdef CONFIG_ANDROID_AB
+#if defined(CONFIG_ANDROID_AB) && !defined(CONFIG_ANDROID_AVB)
+	/*
+	 * In ab & avb process, the tries_remaining minus one in function
+	 * android_slot_verify, shield this function here.
+	 */
 	/* ... and decrement tries remaining, if applicable. */
 	if (!ab_data.slots[slot_index_to_boot].successful_boot &&
 	    ab_data.slots[slot_index_to_boot].tries_remaining > 0) {

commit c9289edddb6dac0ab309a1bc98b62a743dd6d565
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jun 26 20:40:05 2019 +0800

    mtd: mtd_blk: reserve one block space for gpt table
    
    Reserve one block space for gpt table in mtd part info,
    otherwise gpt table will be erased by user program.
    
    Change-Id: I0545c55f7da2b5518ab766ed763b074b7558fd4f
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index fb4aa283f0..81f4b137e5 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -25,6 +25,7 @@ char *mtd_part_parse(void)
 	struct blk_desc *dev_desc;
 	disk_partition_t info;
 	char *mtd_part_info_p;
+	struct mtd_info *mtd;
 	char *mtd_part_info;
 	int ret;
 	int p;
@@ -33,6 +34,7 @@ char *mtd_part_parse(void)
 	if (!dev_desc)
 		return NULL;
 
+	mtd = (struct mtd_info *)dev_desc->bdev->priv;
 	mtd_part_info = (char *)calloc(MTD_PART_INFO_MAX_SIZE, sizeof(char));
 	if (!mtd_part_info) {
 		printf("%s: Fail to malloc!", __func__);
@@ -65,7 +67,15 @@ char *mtd_part_parse(void)
 			 info.name);
 		strcat(mtd_part_info, ",");
 		if (part_get_info(dev_desc, p + 1, &info)) {
-			snprintf(mtd_part_info_p, data_len - 1, "-@0x%x(%s)",
+			/* Nand flash is erased by block and gpt table just
+			 * resserve 33 sectors for the last partition. This
+			 * will erase the backup gpt table by user program,
+			 * so reserve one block.
+			 */
+			snprintf(mtd_part_info_p, data_len - 1, "0x%x@0x%x(%s)",
+				 (int)(size_t)(info.size -
+				 (info.size - 1) %
+				 (mtd->erasesize >> 9) - 1) << 9,
 				 (int)(size_t)info.start << 9,
 				 info.name);
 			break;
@@ -144,6 +154,7 @@ static int mtd_blk_probe(struct udevice *udev)
 	struct blk_desc *desc = dev_get_uclass_platdata(udev);
 	struct mtd_info *mtd = dev_get_priv(udev->parent);
 
+	desc->bdev->priv = mtd;
 	sprintf(desc->vendor, "0x%.4x", 0x2207);
 	memcpy(desc->product, mtd->name, strlen(mtd->name));
 	memcpy(desc->revision, "V1.00", sizeof("V1.00"));

commit 06c1e1b3ae61762c1e2da34cd2bd92dd8234af3f
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jun 26 14:42:06 2019 +0800

    cmd: rockusb: fix usb serial number bug
    
    Some special characters will be treated as a path in windows environment,
    such as '\\' and '/'. If the usb upload its serial number with these
    special characters, the usb drive will unwork. So use '_' to replace them.
    
    Change-Id: Ic249316f2b03b0dcb73680078f122e23003e6e3d
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/cmd/rockusb.c b/cmd/rockusb.c
index c25df454a9..804adb05ab 100644
--- a/cmd/rockusb.c
+++ b/cmd/rockusb.c
@@ -175,8 +175,23 @@ static int do_rkusb(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 	}
 
 	s = env_get("serial#");
-	if (s)
-		g_dnl_set_serialnumber((char *)s);
+	if (s) {
+		char *sn = (char *)calloc(strlen(s) + 1, sizeof(char));
+		char *sn_p = sn;
+
+		if (!sn)
+			goto cleanup_board;
+
+		memcpy(sn, s, strlen(s));
+		while (*sn_p) {
+			if (*sn_p == '\\' || *sn_p == '/')
+				*sn_p = '_';
+			sn_p++;
+		}
+
+		g_dnl_set_serialnumber(sn);
+		free(sn);
+	}
 
 	rc = g_dnl_register("rkusb_ums_dnl");
 	if (rc) {

commit 4d432d92ae5a77719609ebd4d4a1160c156e7e0d
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jun 26 16:14:52 2019 +0800

    common: android: fix missing "root=" with linux a/b & avb system
    
    Change-Id: I2f8320eb4f81f88e7ba1f2d62eee55010f243df5
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index c8803524a3..d7e497fa1b 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -50,7 +50,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define OEM_UNLOCK_ARG_SIZE 30
 #define UUID_SIZE 37
 
-#if defined(CONFIG_ANDROID_AB) && !defined(CONFIG_ANDROID_AVB)
+#ifdef CONFIG_ANDROID_AB
 static int get_partition_unique_uuid(char *partition,
 				     char *guid_buf,
 				     size_t guid_buf_size)
@@ -1055,20 +1055,6 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 		 * "skip_initramfs" to the cmdline to make it ignore the
 		 * recovery initramfs in the boot partition.
 		 */
-#if (defined(CONFIG_ANDROID_AB) && !defined(CONFIG_ANDROID_AVB))
-	{
-		char root_partition[20] = {0};
-		char guid_buf[UUID_SIZE] = {0};
-		char root_partuuid[70] = "root=PARTUUID=";
-
-		strcat(root_partition, ANDROID_PARTITION_SYSTEM);
-		strcat(root_partition, slot_suffix);
-		get_partition_unique_uuid(root_partition, guid_buf, UUID_SIZE);
-		strcat(root_partuuid, guid_buf);
-		env_update("bootargs", root_partuuid);
-	}
-#endif
-
 #ifdef CONFIG_ANDROID_AB
 		mode_cmdline = "skip_initramfs";
 #endif
@@ -1141,6 +1127,26 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	}
 #endif
 
+#ifdef CONFIG_ANDROID_AB
+	/* In android a/b & avb process, the "root=" will be add which parameter
+	 * is in vbmeta.In linux a/b & avb process, the "root=" must be add by
+	 * follow code. To be compatible with the above two processes, test it
+	 * is necessary to add "root=".
+	 */
+	char root_partition[20] = {0};
+	char guid_buf[UUID_SIZE] = {0};
+	char root_partuuid[70] = "root=PARTUUID=";
+	char *boot_args = env_get("bootargs");
+
+	if (!strstr(boot_args, "root=")) {
+		strcat(root_partition, ANDROID_PARTITION_SYSTEM);
+		strcat(root_partition, slot_suffix);
+		get_partition_unique_uuid(root_partition, guid_buf, UUID_SIZE);
+		strcat(root_partuuid, guid_buf);
+		env_update("bootargs", root_partuuid);
+	}
+#endif
+
 	/* Set Android root variables. */
 	env_set_ulong("android_root_devnum", dev_desc->devnum);
 	env_set("android_slotsufix", slot_suffix);

commit 139d645e197c33b6ffa7e3fc08cd14760ab76c8d
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jun 26 16:51:06 2019 +0800

    rockchip: dts: rk3308: fix compile warning
    
    The warning message is ""reg" property in /nandc@ff4b0000/nand@0
    has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)".
    
    Change-Id: I06d4eca600e29d3c00a7888055c7526f9f5cd779
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-u-boot.dtsi b/arch/arm/dts/rk3308-u-boot.dtsi
index 98ebde2b9a..22ae949a19 100644
--- a/arch/arm/dts/rk3308-u-boot.dtsi
+++ b/arch/arm/dts/rk3308-u-boot.dtsi
@@ -31,6 +31,9 @@
 &nandc {
 	u-boot,dm-pre-reloc;
 	status = "okay";
+	#address-cells = <1>;
+	#size-cells = <0>;
+
 	nand@0 {
 		u-boot,dm-spl;
 		reg = <0>;
@@ -93,4 +96,4 @@
 
 &route_rgb {
 	status = "disabled";
-};
\ No newline at end of file
+};

commit edf8d43c0e7530bfbfed35ca5c7b736e3bd461e7
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Mon Jun 24 15:35:25 2019 +0800

    drm/rockchip: vop: use win1 for ui instead of win0 in rk3399 vopl
    
    RK3399's VOPL has win0 and win1 layers.The formats they support as below:
    Win0:  XR24 AR24 XB24 AB24 RG24 BG24 RG16 BG16 NV12 NV16 NV24 NA12 NA16 NA24
    Win1:  XR24 AR24 XB24 AB24 RG24 BG24 RG16 BG16
    
    Only the win0 layer supports NV12 format(for video decode).
    So change to use win0 for video overlay layer and win1 for ui layer.
    
    Change-Id: I2168b48d78e2a27fd93b12646952518d7bb529f2
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index fab350ba25..12b7bd7b6d 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -203,6 +203,19 @@ const struct vop_data rk3288_vop_lit = {
 	.reg_len = RK3288_DSP_VACT_ST_END_F1 * 4,
 };
 
+static const struct vop_win rk3368_win23_data = {
+	.enable = VOP_REG(RK3368_WIN2_CTRL0, 0x1, 4),
+	.format = VOP_REG(RK3368_WIN2_CTRL0, 0x3, 5),
+	.ymirror = VOP_REG(RK3368_WIN2_CTRL1, 0x1, 15),
+	.rb_swap = VOP_REG(RK3368_WIN2_CTRL0, 0x1, 20),
+	.dsp_info = VOP_REG(RK3368_WIN2_DSP_INFO0, 0x0fff0fff, 0),
+	.dsp_st = VOP_REG(RK3368_WIN2_DSP_ST0, 0x1fff1fff, 0),
+	.yrgb_mst = VOP_REG(RK3368_WIN2_MST0, 0xffffffff, 0),
+	.yrgb_vir = VOP_REG(RK3368_WIN2_VIR0_1, 0x1fff, 0),
+	.src_alpha_ctl = VOP_REG(RK3368_WIN2_SRC_ALPHA_CTRL, 0xffff, 0),
+	.dst_alpha_ctl = VOP_REG(RK3368_WIN2_DST_ALPHA_CTRL, 0xffffffff, 0),
+};
+
 static const struct vop_line_flag rk3368_vop_line_flag = {
 	.line_flag_num[0] = VOP_REG(RK3368_LINE_FLAG, 0xffff, 0),
 	.line_flag_num[1] = VOP_REG(RK3368_LINE_FLAG, 0xffff, 16),
@@ -288,7 +301,7 @@ const struct vop_data rk3399_vop_lit = {
 	.version = VOP_VERSION(3, 6),
 	.max_output = {2560, 1600},
 	.ctrl = &rk3288_ctrl_data,
-	.win = &rk3288_win01_data,
+	.win = &rk3368_win23_data,
 	.line_flag = &rk3366_vop_line_flag,
 	.csc_table = &rk3399_csc_table,
 	.win_csc = &rk3399_win0_csc,

commit 5fc2a70c781a061ba5b2e88f8a1bd6ca1fa931ca
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 26 13:09:42 2019 +0800

    power: charge animation: allow ctrl+c to exit extrem low charging
    
    Change-Id: I736c2617a4d51085bc91377f1013d7f4b198c9fc
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 563ddf38e6..074cfe9066 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -400,6 +400,11 @@ static int charge_extrem_low_power(struct udevice *dev)
 			printf("get voltage failed: %d\n", voltage);
 			continue;
 		}
+
+		if (ctrlc()) {
+			printf("Extrem low charge: exit by ctrl+c\n");
+			break;
+		}
 	}
 
 	autowakeup_timer_uninit();

commit 8526ae77a4f8e53b1beb06459b9321d42b2d0d2f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 26 10:59:15 2019 +0800

    rockchip: board: ignore cru phandle fix for miss match phandle
    
    This miss match phandle maybe "&pmucru" phandle.
    (fixes: 3e45175 rockchip: board: fixup cru phandle for all U-Boot node.)
    
    Change-Id: If053c1d329264967b1d0f1d3dce8f62aea3b69c7
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 4533069e0d..5540749f4f 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -263,10 +263,12 @@ static int phandles_fixup(void *fdt)
 					if (first_phandle == -1)
 						first_phandle = clocks[j];
 
-					if (clocks[j] != first_phandle)
-						printf("WARN: %s: first cru phandle=%d, this=%d\n",
-						       dev_read_name(dev),
-						       first_phandle, clocks[j]);
+					if (clocks[j] != first_phandle) {
+						debug("WARN: %s: first cru phandle=%d, this=%d\n",
+						      dev_read_name(dev),
+						      first_phandle, clocks[j]);
+						continue;
+					}
 
 					clocks[j] = phandle;
 				}

commit 8d9f99d87be031c67373355b2e75cf434c15afac
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 26 10:57:36 2019 +0800

    rockchip: atags: atags_get_tag() is useless for TPL
    
    TPL only needs atags_set_tag(), remove atags_get_tag() to
    decrease u-boot-tpl.bin size.
    
    Change-Id: If5301db7aa5e4436863741257be617b1d7dcb56a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk_atags.c b/arch/arm/mach-rockchip/rk_atags.c
index be5dfecad7..43fb4b0eaa 100644
--- a/arch/arm/mach-rockchip/rk_atags.c
+++ b/arch/arm/mach-rockchip/rk_atags.c
@@ -228,6 +228,7 @@ int atags_set_tag(u32 magic, void *tagdata)
 	return 0;
 }
 
+#ifndef CONFIG_TPL_BUILD
 struct tag *atags_get_tag(u32 magic)
 {
 	u32 *hash, calc_hash, size;
@@ -266,6 +267,9 @@ struct tag *atags_get_tag(u32 magic)
 
 	return NULL;
 }
+#else
+struct tag *atags_get_tag(u32 magic) { return NULL; }
+#endif
 
 void atags_destroy(void)
 {

commit 9a3dcb5be4bca5f9ac86334c8dd323a3c11f523b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 24 15:01:56 2019 +0800

    rockchip: board: add hotkey "ctrl+s" to enter cli loop
    
    Right after "Starting kernel..." and before jumpping to kernel.
    
    Change-Id: I59bec92b0727b6ff62d2c4f461e99c5a7f6f5426
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 187d4cd730..4533069e0d 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -578,6 +578,7 @@ int board_initr_caches_fixup(void)
 void board_quiesce_devices(void)
 {
 	hotkey_run(HK_CMDLINE);
+	hotkey_run(HK_CLI);
 
 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
 	/* Destroy atags makes next warm boot safer */

commit 4fe75b5b95efdd8669908a3529d2869f71319d82
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 26 09:16:33 2019 +0800

    rockchip: hotkey: add comments for hotkey definitions
    
    Change-Id: I710bd7f2a1c393397f8e5536528a6fe5817fa392
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/hotkey.c b/arch/arm/mach-rockchip/hotkey.c
index 9d65ef137d..32e6b1e513 100644
--- a/arch/arm/mach-rockchip/hotkey.c
+++ b/arch/arm/mach-rockchip/hotkey.c
@@ -12,13 +12,13 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define CTRL_B		0x02
-#define CTRL_D		0x04
-#define CTRL_F		0x06
-#define CTRL_I		0x09
-#define CTRL_M		0x0d
-#define CTRL_P		0x10
-#define CTRL_S		0x13
+#define CTRL_B		0x02	/* bootrom mode */
+#define CTRL_D		0x04	/* download mde */
+#define CTRL_F		0x06	/* fastboot mode */
+#define CTRL_I		0x09	/* inicall debug for kernel */
+#define CTRL_M		0x0d	/* memory(sysmem/bidram) */
+#define CTRL_P		0x10	/* parameter(cmdline) dump */
+#define CTRL_S		0x13	/* shell(cli) */
 
 bool is_hotkey(enum hotkey_t id)
 {

commit 9b78eaa402249d32e9021d6a109fe038b637069f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 24 15:01:01 2019 +0800

    rockchip: hotkey: support ctrl+s enter cli loop
    
    Change-Id: I4e0bc24c38f9bada07bc09a563cfd4385c6265f2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/hotkey.h b/arch/arm/include/asm/arch-rockchip/hotkey.h
index cd2764612a..8d0709e290 100644
--- a/arch/arm/include/asm/arch-rockchip/hotkey.h
+++ b/arch/arm/include/asm/arch-rockchip/hotkey.h
@@ -9,6 +9,7 @@
 enum hotkey_t {
 	HK_INVAL,
 	HK_BROM_DNL,
+	HK_CLI,
 	HK_CMDLINE,
 	HK_FASTBOOT,
 	HK_INITCALL,
diff --git a/arch/arm/mach-rockchip/hotkey.c b/arch/arm/mach-rockchip/hotkey.c
index 478c9f9e19..9d65ef137d 100644
--- a/arch/arm/mach-rockchip/hotkey.c
+++ b/arch/arm/mach-rockchip/hotkey.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <bidram.h>
+#include <cli.h>
 #include <console.h>
 #include <sysmem.h>
 #include <asm/arch/hotkey.h>
@@ -17,6 +18,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define CTRL_I		0x09
 #define CTRL_M		0x0d
 #define CTRL_P		0x10
+#define CTRL_S		0x13
 
 bool is_hotkey(enum hotkey_t id)
 {
@@ -57,6 +59,15 @@ void hotkey_run(enum hotkey_t id)
 		if (gd->console_evt == CTRL_I)
 			env_update("bootargs", "initcall_debug debug");
 		break;
+	case HK_CLI:
+		/* Disable enter cli by hotkey*/
+#if defined(CONFIG_CONSOLE_DISABLE_CTRLC) && \
+    defined(CONFIG_BOOTDELAY) && (CONFIG_BOOTDELAY <= 0)
+		break;
+#endif
+		if (gd->console_evt == CTRL_S)
+			cli_loop();
+		break;
 	default:
 		break;
 	}

commit 266906806d575639cc921e88920a370d72ef9448
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Wed Jun 26 10:15:31 2019 +0800

    lib: optee_client: init rpmb before find_mmc_device
    
    Change-Id: I1f2c3d76c9015f1a59822314df5e92b6355c7827
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/OpteeClientRPC.c b/lib/optee_clientApi/OpteeClientRPC.c
index 5fb9eeb6c4..948c88f501 100644
--- a/lib/optee_clientApi/OpteeClientRPC.c
+++ b/lib/optee_clientApi/OpteeClientRPC.c
@@ -408,7 +408,21 @@ TEEC_Result OpteeRpcCmdRpmb(t_teesmc32_arg *TeeSmc32Arg)
 	}
 
 	case TEE_RPC_RPMB_CMD_GET_DEV_INFO: {
+		if (init_rpmb()) {
+			TeecResult = TEEC_ERROR_GENERIC;
+			goto Exit;
+		}
+
 		mmc = do_returnmmc();
+		if (finish_rpmb()) {
+			TeecResult = TEEC_ERROR_GENERIC;
+			goto Exit;
+		}
+
+		if (mmc == NULL) {
+			TeecResult = TEEC_ERROR_GENERIC;
+			goto Exit;
+		}
 
 		DevInfo = (struct tee_rpc_rpmb_dev_info *)(size_t)
 		TeeSmc32Param[1].u.memref.buf_ptr;

commit 6d5e65664316b8fb1ebdcc98f976299b7562cb99
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 25 21:04:59 2019 +0800

    common: android: add sysmem overflow check
    
    Change-Id: I263bbc9f9f2a71322591ef3528b8fa6039eb3509
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 313d80ed71..c8803524a3 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -422,6 +422,9 @@ int android_bootloader_boot_kernel(unsigned long kernel_address)
 				       comp_type))
 		return -1;
 
+	/* Check sysmem overflow */
+	sysmem_overflow_check();
+
 	do_bootm(NULL, 0, 4, bootm_args);
 
 	return -1;

commit 0c4b2feaa336cb59b67fbdbb411ad7c470116afd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 25 21:04:01 2019 +0800

    common: rkimg: add sysmem overflow check
    
    Change-Id: I9892482f672290dbc65cda7734b52bffba06996f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index ba28da4ae2..e0d64bcae0 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -561,6 +561,9 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 	fdt_ramdisk_skip_relocation();
 	hotkey_run(HK_SYSMEM);
 
+	/* Check sysmem overflow */
+	sysmem_overflow_check();
+
 #if defined(CONFIG_ARM64)
 	char cmdbuf[64];
 	sprintf(cmdbuf, "booti 0x%lx 0x%lx:0x%x 0x%lx",
@@ -587,6 +590,9 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 
 	hotkey_run(HK_SYSMEM);
 
+	/* Check sysmem overflow */
+	sysmem_overflow_check();
+
 	boot_lmb_init(&images);
 	images.ep = kernel_addr_r;
 	images.initrd_start = ramdisk_addr_r;

commit 2c66f6f37e202feb856b17b93ee024e0fe082e56
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 25 21:03:36 2019 +0800

    lib: sysmem: add sysmem overflow check support
    
    Change-Id: Ifcb6e8cd59656b133f56115d104a1bba017c7c1b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/sysmem.h b/include/sysmem.h
index 2a51898388..6c869746b3 100644
--- a/include/sysmem.h
+++ b/include/sysmem.h
@@ -113,10 +113,15 @@ bool sysmem_can_alloc(phys_size_t base, phys_size_t size);
 int sysmem_free(phys_addr_t base);
 
 /**
- * sysmem_dump() - Dump all sysmem region state and check overflow
+ * sysmem_dump() - Dump all sysmem region state
  */
 void sysmem_dump(void);
 
+/**
+ * sysmem_overflow_check() - Sysmem regions overflow check
+ */
+void sysmem_overflow_check(void);
+
 /**
  * board_sysmem_reserve() - Weak function for board to implement
  *
@@ -131,6 +136,8 @@ static inline int sysmem_init(void) { return 0; }
 static inline int sysmem_initr(void) { return 0; }
 static inline int sysmem_free(phys_addr_t base) { return 0; }
 static inline void sysmem_dump(void) {}
+void sysmem_overflow_check(void) {}
+
 __weak int board_sysmem_reserve(struct sysmem *sysmem) { return 0; }
 
 static inline void *sysmem_alloc(enum memblk_id id, phys_size_t size)
diff --git a/lib/sysmem.c b/lib/sysmem.c
index 430ba7e684..76ef3b280a 100644
--- a/lib/sysmem.c
+++ b/lib/sysmem.c
@@ -123,6 +123,41 @@ void sysmem_dump(void)
 	printf("    --------------------------------------------------------------------\n\n");
 }
 
+void sysmem_overflow_check(void)
+{
+	struct sysmem *sysmem = &plat_sysmem;
+	struct list_head *node;
+	struct memcheck *check;
+	struct memblock *mem;
+	int overflow;
+
+	if (!sysmem_has_init())
+		return;
+
+	list_for_each(node, &sysmem->allocated_head) {
+		mem = list_entry(node, struct memblock, node);
+		if (mem->attr.flags & M_ATTR_OFC) {
+			check = (struct memcheck *)
+				(mem->base + mem->size - sizeof(*check));
+			overflow = (check->magic != SYSMEM_MAGIC);
+		} else if (mem->attr.flags & M_ATTR_HOFC) {
+			check = (struct memcheck *)
+				(mem->base - sizeof(*check));
+			overflow = (check->magic != SYSMEM_MAGIC);
+		} else {
+			overflow = 0;
+		}
+
+		if (overflow)
+			break;
+	}
+
+	if (overflow) {
+		SYSMEM_E("Found there is region overflow!\n");
+		sysmem_dump();
+	}
+}
+
 static inline int sysmem_is_overlap(phys_addr_t base1, phys_size_t size1,
 				    phys_addr_t base2, phys_size_t size2)
 {

commit c7c0bd59567b5478ce7c15ca5f8dcef8712575da
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 26 08:52:54 2019 +0800

    rockchip: memblk: add M_ATTR_CACHELINE_ALIGN for AVB memblk
    
    The alloc region for storage read/write should be aligned to
    cacheline size.
    
    Change-Id: Ib529a5f62d3937b66b0d325a49feb22eacb04317
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/memblk.c b/arch/arm/mach-rockchip/memblk.c
index cec5be6fdb..d9f92a2626 100644
--- a/arch/arm/mach-rockchip/memblk.c
+++ b/arch/arm/mach-rockchip/memblk.c
@@ -67,7 +67,7 @@ const static struct memblk_attr plat_mem_attr[MEMBLK_ID_MAX] = {
 	},
 	[MEMBLK_ID_AVB_ANDROID]  =	{
 		.name = "AVB_ANDROID",
-		.flags = M_ATTR_OFC,
+		.flags = M_ATTR_OFC | M_ATTR_CACHELINE_ALIGN,
 	},
 };
 

commit 556bbbe4367a4bc302d7b99160ecfc4eefa35414
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 25 21:01:02 2019 +0800

    lib: sysmem: add M_ATTR_CACHELINE_ALIGN support
    
    If alloc buffer for storage read/write should be aligned to
    cacheline size, please add the M_ATTR_CACHELINE_ALIGN flag
    for this region.
    
    Change-Id: I1e5d46405ddacfadd1cdb4670f943996d9b66426
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/memblk.h b/include/memblk.h
index 90429caad2..eccfbcd508 100644
--- a/include/memblk.h
+++ b/include/memblk.h
@@ -63,5 +63,7 @@ extern const struct memblk_attr *mem_attr;
 #define M_ATTR_OVERLAP		(1 << 2)
 /* Just peek, always return success */
 #define M_ATTR_PEEK		(1 << 3)
+/* The region start address should be aligned to cacheline size */
+#define M_ATTR_CACHELINE_ALIGN	(1 << 4)
 
 #endif /* _MEMBLK_H */
diff --git a/lib/sysmem.c b/lib/sysmem.c
index ae7e331f07..430ba7e684 100644
--- a/lib/sysmem.c
+++ b/lib/sysmem.c
@@ -276,6 +276,19 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 		goto out;
 	}
 
+	/*
+	 * Some modules use "sysmem_alloc()" to alloc region for storage
+	 * read/write buffer, it should be aligned to cacheline size. eg: AVB.
+	 *
+	 * Aligned down to cacheline size if not aligned, otherwise the tail
+	 * of region maybe overflow.
+	 */
+	if (attr.flags & M_ATTR_CACHELINE_ALIGN &&
+	    !IS_ALIGNED(base, ARCH_DMA_MINALIGN)) {
+		base = ALIGN(base, ARCH_DMA_MINALIGN);
+		base -= ARCH_DMA_MINALIGN;
+	}
+
 	if (!IS_ALIGNED(base, 4)) {
 		SYSMEM_E("\"%s\" base=0x%08lx is not 4-byte aligned\n",
 			 name, (ulong)base);

commit 3bce84dba85402c44b91f769739fb82e2e0f92f4
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Thu Jun 20 14:58:59 2019 +0800

    rockchip: dts: rk3308: add nandc config for mtd nand drivers
    
    Change-Id: I50657ce5d9f021d42471d0e0b15471b7b6788cef
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-u-boot.dtsi b/arch/arm/dts/rk3308-u-boot.dtsi
index 4da226322c..98ebde2b9a 100644
--- a/arch/arm/dts/rk3308-u-boot.dtsi
+++ b/arch/arm/dts/rk3308-u-boot.dtsi
@@ -8,6 +8,7 @@
 
 	chosen {
 		stdout-path = &uart2;
+		u-boot,spl-boot-order = &nandc, &emmc;
 	};
 };
 
@@ -30,6 +31,13 @@
 &nandc {
 	u-boot,dm-pre-reloc;
 	status = "okay";
+	nand@0 {
+		u-boot,dm-spl;
+		reg = <0>;
+		nand-ecc-mode = "hw_syndrome";
+		nand-ecc-strength = <16>;
+		nand-ecc-step-size = <1024>;
+	};
 };
 
 &sfc {

commit b75a3992f51dfe87495f9eaf962c28a0fe9591b8
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Jun 25 21:59:03 2019 +0800

    cmd: mmc: find current device first before find mmc device
    
    Find the current device before find mmc device, otherwise '-1'
    will be use as curr_device and error occur. The error log is
    "MMC Device -1 not found".
    
    Change-Id: Id6157f73d006f4bbe1c4d105244eb59ca7290c13
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/cmd/mmc.c b/cmd/mmc.c
index f802f6b9e1..0813330c07 100644
--- a/cmd/mmc.c
+++ b/cmd/mmc.c
@@ -188,6 +188,15 @@ int init_rpmb(void)
 {
 	struct mmc *mmc;
 
+	if (curr_device < 0) {
+		if (get_mmc_num() > 0) {
+			curr_device = 0;
+		} else {
+			printf("No MMC device available\n");
+			return CMD_RET_FAILURE;
+		}
+	}
+
 	mmc = init_mmc_device(curr_device, false);
 	if (!mmc)
 		return CMD_RET_FAILURE;

commit 278b570da47f73b08c435440ffd32a6711e871a1
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Jun 25 17:53:27 2019 +0800

    common: fdt_support: correct function part_mtd_parse to mtd_part_parse
    
    Change-Id: I935696c9aff9f464e5e625dd96f0acde67f60c8c
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/fdt_support.c b/common/fdt_support.c
index c13287e574..4d3547c452 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -323,7 +323,7 @@ int fdt_chosen(void *fdt)
 				env_update("bootargs", bootargs);
 #endif
 #ifdef CONFIG_MTD_BLK
-				char *mtd_par_info = part_mtd_parse();
+				char *mtd_par_info = mtd_part_parse();
 
 				if (mtd_par_info) {
 					if (memcmp(env_get("devtype"), "mtd", 3) == 0)

commit 059ed03284aea1a35c7f54a0119d9f0a3ec6707d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 24 12:06:07 2019 +0800

    disk: rkparm: fix get partition issue
    
    Without this patch, it always returns the last partition when
    "idx" is larger than the last partititon.
    
    Change-Id: I1d126861327c02cab7dd8cc00dd0800651f7da3c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/disk/part_rkparm.c b/disk/part_rkparm.c
index 8383b641de..15ec243852 100644
--- a/disk/part_rkparm.c
+++ b/disk/part_rkparm.c
@@ -271,8 +271,8 @@ static int part_get_info_rkparm(struct blk_desc *dev_desc, int idx,
 		part_num ++;
 	}
 
-	if (part_num > idx) {
-		printf("%s Invalid partition no.%d\n", __func__, idx);
+	if (part_num < idx) {
+		debug("%s Invalid partition no.%d\n", __func__, idx);
 		return -EINVAL;
 	}
 

commit e91ae64f65ce5df6e5f4321828aefcc9d0034dc0
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Tue Jun 25 11:21:58 2019 +0800

    lib: rockchip: nand: modify udevice_id to compatible with NAND driver include FTL
    
    Modify the opensource nandc driver to compatible with
    the NAND driver include FTL，which used udevice_id
    "rockchip,rk-nandc".
    
    Change-Id: I67b9beb43b9935f88c98802f6df3507248324a12
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 863d6142e7..a6e3bccb0a 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -71,7 +71,7 @@ static const char * const compat_names[COMPAT_COUNT] = {
 	COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
 	COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
 	COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
-	COMPAT(ROCKCHIP_NANDC, "rockchip,nandc"),
+	COMPAT(ROCKCHIP_NANDC, "rockchip,rk-nandc"),
 };
 
 const char *fdtdec_get_compatible(enum fdt_compat_id id)

commit 8623fa54b3c007618cdc9f26bfb7b0ae1e8f89c4
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Thu Jun 20 14:49:56 2019 +0800

    rockchip: nand: modify udevice_id to compatible with NAND driver include FTL
    
    Modify the opensource nandc driver to compatible with
    the NAND driver include FTL，which used udevice_id
    "rockchip,rk-nandc".
    
    Change-Id: I8dda456aed89e15b2b9885e8d9d723f2d2e84ccb
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/drivers/mtd/nand/rockchip_nand.c b/drivers/mtd/nand/rockchip_nand.c
index 1d0c27b7cc..2b9bde9604 100644
--- a/drivers/mtd/nand/rockchip_nand.c
+++ b/drivers/mtd/nand/rockchip_nand.c
@@ -639,7 +639,7 @@ static int rockchip_nand_chips_init(int node, struct rk_nand *rknand)
 
 #ifdef CONFIG_NAND_ROCKCHIP_DT
 static const struct udevice_id rockchip_nandc_ids[] = {
-	{ .compatible = "rockchip,nandc" },
+	{ .compatible = "rockchip,rk-nandc" },
 	{ }
 };
 
diff --git a/drivers/mtd/nand/rockchip_nand_v9.c b/drivers/mtd/nand/rockchip_nand_v9.c
index 76b36032b5..aa4cd1c4df 100644
--- a/drivers/mtd/nand/rockchip_nand_v9.c
+++ b/drivers/mtd/nand/rockchip_nand_v9.c
@@ -640,7 +640,7 @@ static int rockchip_nand_chips_init(int node, struct rk_nand *rknand)
 
 #ifdef CONFIG_NAND_ROCKCHIP_DT
 static const struct udevice_id rockchip_nandc_ids[] = {
-	{ .compatible = "rockchip,nandc" },
+	{ .compatible = "rockchip,rk-nandc" },
 	{ }
 };
 

commit 6a20f1c71f36fae15a116ae9a4fab2a6de0ee437
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 24 12:05:21 2019 +0800

    disk: rkparm: check return value only when do initialization
    
    Change-Id: Id2f9e6a7c5843e5d277a70797c4a3a2768230c14
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/disk/part_rkparm.c b/disk/part_rkparm.c
index 6d9221f6b6..8383b641de 100644
--- a/disk/part_rkparm.c
+++ b/disk/part_rkparm.c
@@ -256,12 +256,12 @@ static int part_get_info_rkparm(struct blk_desc *dev_desc, int idx,
 	}
 
 	if (list_empty(&parts_head) ||
-	    (dev_num != ((dev_desc->if_type << 8) + dev_desc->devnum)))
+	    (dev_num != ((dev_desc->if_type << 8) + dev_desc->devnum))) {
 		ret = rkparm_init_param(dev_desc, &parts_head);
-
-	if (ret) {
-		printf("%s Invalid rkparm partition\n", __func__);
-		return -1;
+		if (ret) {
+			printf("%s Invalid rkparm partition\n", __func__);
+			return -1;
+		}
 	}
 
 	list_for_each(node, &parts_head) {

commit 24f9e652a5e0459a0a66e0502e4b47654759b2e7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 24 10:26:29 2019 +0800

    tools: rockchip: boot_merger: add option to enable rc4 flag
    
    The legacy chips like rk3188 maskrom require all IDB data with RC4,
    the boot_merger pack the loader with a rc4 flag in header,
    and the upgrade_tool will write the data with rc4 to IDB area.
    
    usage:
    boot_merger --rc4 RKBOOT/RK310BMINIALL.ini
    
    and you can see log below if success with RC4:
    * enable RC4 for IDB data(both ddr and preloader)
    
    Test on rk3188.
    
    Change-Id: If221a32a462bb43bef67aae802adff5e1e8436ac
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/tools/rockchip/boot_merger.c b/tools/rockchip/boot_merger.c
index eec0b3c2c3..48c87530c9 100644
--- a/tools/rockchip/boot_merger.c
+++ b/tools/rockchip/boot_merger.c
@@ -26,6 +26,7 @@ char gSubfix[MAX_LINE_LEN] = OUT_SUBFIX;
 char gEat[MAX_LINE_LEN];
 char *gConfigPath;
 uint8_t *gBuf;
+bool enableRC4 = false;
 
 static uint32_t g_merge_max_size = MAX_MERGE_SIZE;
 
@@ -770,9 +771,8 @@ static inline void getBoothdr(rk_boot_header *hdr)
 	hdr->loaderNum = gOpts.loaderNum;
 	hdr->loaderOffset = hdr->code472Offset + gOpts.code472Num * hdr->code472Size;
 	hdr->loaderSize = sizeof(rk_boot_entry);
-#ifndef USE_P_RC4
-	hdr->rc4Flag = 1;
-#endif
+	if (!enableRC4)
+		hdr->rc4Flag = 1;
 }
 
 static inline uint32_t getCrc(const char *path)
@@ -1021,6 +1021,9 @@ int main(int argc, char **argv)
 			merge = true;
 		} else if (!strcmp(OPT_UNPACK, argv[i])) {
 			merge = false;
+		} else if (!strcmp(OPT_RC4, argv[i])) {
+			printf("enable RC4 for IDB data(both ddr and preloader)\n");
+			enableRC4 = true;
 		} else if (!strcmp(OPT_SUBFIX, argv[i])) {
 			i++;
 			snprintf(gSubfix, sizeof(gSubfix), "%s", argv[i]);
diff --git a/tools/rockchip/boot_merger.h b/tools/rockchip/boot_merger.h
index 97586d7cba..3c31b782b1 100644
--- a/tools/rockchip/boot_merger.h
+++ b/tools/rockchip/boot_merger.h
@@ -188,6 +188,7 @@ typedef struct {
 #define OPT_REPLACE         "--replace"
 #define OPT_PREPATH         "--prepath"
 #define OPT_SIZE	    "--size"
+#define OPT_RC4		    "--rc4"
 
 #define OPT_CHIP	"-c"
 #define OPT_471		"-1"

commit 52243bce1370e760206595b1222fa0bf7757f0a1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 24 10:29:01 2019 +0800

    tools: rockchip: loaderimage: add "--prepath" support
    
    Add prefix path of binary path.
    
    Change-Id: I30fe03e0614c7724f452ad8b9d3800acd92db02c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/tools/rockchip/loaderimage.c b/tools/rockchip/loaderimage.c
index 534dd05149..43cdaa18df 100644
--- a/tools/rockchip/loaderimage.c
+++ b/tools/rockchip/loaderimage.c
@@ -21,6 +21,7 @@ extern uint32_t crc32_rk(uint32_t, const unsigned char *, uint32_t);
 #define OPT_SIZE "--size"
 #define OPT_VERSION "--version"
 #define OPT_INFO "--info"
+#define OPT_PREPATH             "--prepath"
 
 /* pack or unpack */
 #define MODE_PACK 0
@@ -123,6 +124,8 @@ int main(int argc, char *argv[])
 	char *buf = 0;
 	uint32_t in_size = 0, in_num = 0;
 	char *file_in = NULL, *file_out = NULL;
+	char			*prepath = NULL;
+	char			file_name[1024];
 	uint32_t curr_version = 0;
 
 	if (argc < 3) {
@@ -170,6 +173,8 @@ int main(int argc, char *argv[])
 		} else if (!strcmp(argv[i], OPT_INFO)) {
 			mode = MODE_INFO;
 			file_in = argv[++i];
+		} else if (!strcmp(argv[i], OPT_PREPATH)) {
+			prepath = argv[++i];
 		} else {
 			usage(argv[0]);
 			exit(EXIT_FAILURE);
@@ -206,6 +211,14 @@ int main(int argc, char *argv[])
 			exit(EXIT_FAILURE);
 		}
 		printf("\n load addr is 0x%x!\n", loader_addr);
+
+		/* Add prepath for file_in name */
+		if (prepath && strncmp(prepath, file_in, strlen(prepath))) {
+			strcpy(file_name, prepath);
+			strcat(file_name, file_in);
+			file_in = file_name;
+		}
+
 		if (!file_in || !file_out) {
 			usage(argv[0]);
 			exit(EXIT_FAILURE);

commit 5f0203b77289c3caf17f3dd22395382ad0d3ce57
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 24 10:14:47 2019 +0800

    tools: rockchip: boot_merger: ignore "--prepath" for output path
    
    Change-Id: I89335926cc161c484e813fbd8a699935762f1a34
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/tools/rockchip/boot_merger.c b/tools/rockchip/boot_merger.c
index e8ccea3828..eec0b3c2c3 100644
--- a/tools/rockchip/boot_merger.c
+++ b/tools/rockchip/boot_merger.c
@@ -149,7 +149,8 @@ static inline void fixPath(char *path)
 			strcpy(path, gNewPath);
 			strcat(path, tmp);
 		}
-	} else if (gPrePath && strncmp(path, gPrePath, strlen(gPrePath))) {
+	} else if ((ulong)path != (ulong)gOpts.outPath && /* ignore output */
+		    gPrePath && strncmp(path, gPrePath, strlen(gPrePath))) {
 		strcpy(tmp, path);
 		strcpy(path, gPrePath);
 		strcat(path, tmp);
@@ -318,6 +319,7 @@ static bool parseOut(FILE *file)
 	}
 	if (fscanf(file, OPT_OUT_PATH "=%[^\r^\n]", gOpts.outPath) != 1)
 		return false;
+	/* fixPath(gOpts.outPath); */
 	printf("out:%s\n", gOpts.outPath);
 	return true;
 }
diff --git a/tools/rockchip/trust_merger.c b/tools/rockchip/trust_merger.c
index 601d33f9d4..f36b5c8008 100644
--- a/tools/rockchip/trust_merger.c
+++ b/tools/rockchip/trust_merger.c
@@ -110,7 +110,8 @@ static inline void fixPath(char *path)
 			strcpy(path, gNewPath);
 			strcat(path, tmp);
 		}
-	} else if (gPrePath && strncmp(path, gPrePath, strlen(gPrePath))) {
+	} else if ((ulong)path != (ulong)gOpts.outPath && /* ignore output */
+		   gPrePath && strncmp(path, gPrePath, strlen(gPrePath))) {
 		strcpy(tmp, path);
 		strcpy(path, gPrePath);
 		strcat(path, tmp);
@@ -220,6 +221,7 @@ static bool parseOut(FILE *file)
 	}
 	if (fscanf(file, OPT_OUT_PATH "=%[^\r^\n]", gOpts.outPath) != 1)
 		return false;
+	/* fixPath(gOpts.outPath); */
 	printf("out:%s\n", gOpts.outPath);
 
 	return true;

commit 29cdb6910002352a04942c2bfa35878be1059bff
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jun 21 17:24:52 2019 +0800

    common: image-android: print separate load fail message
    
    Change-Id: I2bb06d24ce7cfa22a7c197932b67d6bd2055a03d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/image-android.c b/common/image-android.c
index f14ad7d960..67ba1820c0 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -286,7 +286,7 @@ int android_image_load_separate(struct andr_img_hdr *hdr,
 			ret = blk_dread(dev_desc, blk_start,
 					blk_cnt, load_address);
 			if (ret != blk_cnt) {
-				debug("%s: read kernel failed, ret=%d\n",
+				printf("%s: read kernel failed, ret=%d\n",
 				      __func__, ret);
 				return -1;
 			}
@@ -315,7 +315,7 @@ int android_image_load_separate(struct andr_img_hdr *hdr,
 			ret = blk_dread(dev_desc, blk_start,
 					blk_cnt, (void *)ramdisk_addr_r);
 			if (ret != blk_cnt) {
-				debug("%s: read ramdisk failed, ret=%d\n",
+				printf("%s: read ramdisk failed, ret=%d\n",
 				      __func__, ret);
 				return -1;
 			}
@@ -362,7 +362,7 @@ int android_image_load_separate(struct andr_img_hdr *hdr,
 			ret = blk_dread(dev_desc, blk_start, blk_cnt,
 					(void *)fdt_addr_r);
 			if (ret != blk_cnt) {
-				debug("%s: read dtb failed, ret=%d\n",
+				printf("%s: read dtb failed, ret=%d\n",
 				      __func__, ret);
 				return -1;
 			}

commit dd884e9de95bba76222c19284443cf80c8cc3e36
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Jun 24 16:36:16 2019 +0800

    configs: rk3368: enable CONFIG_DRM_ROCKCHIP_ANALOGIX_DP
    
    Change-Id: Ice335cd1535cf4318629d2943b372eb4c030b902
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/configs/rk3368_defconfig b/configs/rk3368_defconfig
index 9dcdda9185..42f42d239f 100644
--- a/configs/rk3368_defconfig
+++ b/configs/rk3368_defconfig
@@ -92,6 +92,7 @@ CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_LCD=y

commit 4a7c178034f30a79ca419022bd272761af648ae8
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jun 17 14:23:41 2019 +0800

    lib: avb: change the hardware rsa verified interface
    
    Change-Id: Id42cf3a829a35514b75f3c5990ce7e00b94f712e
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/lib/avb/libavb_atx/avb_atx_validate.c b/lib/avb/libavb_atx/avb_atx_validate.c
index 9695d1b17a..b11ed88d5f 100644
--- a/lib/avb/libavb_atx/avb_atx_validate.c
+++ b/lib/avb/libavb_atx/avb_atx_validate.c
@@ -32,8 +32,8 @@
 #include <android_avb/rk_avb_ops_user.h>
 #include <malloc.h>
 #include <common.h>
-#ifdef CONFIG_CRYPTO_ROCKCHIP
-#include <rockchip_crypto/rockchip_crypto.h>
+#ifdef CONFIG_DM_CRYPTO
+#include <crypto.h>
 #endif
 
 /* The most recent unlock challenge generated. */
@@ -72,19 +72,18 @@ static bool verify_permanent_attributes(
     const uint8_t expected_hash[AVB_SHA256_DIGEST_SIZE]) {
   uint8_t hash[AVB_SHA256_DIGEST_SIZE];
 #ifdef CONFIG_ROCKCHIP_PRELOADER_PUB_KEY
-#ifdef CONFIG_CRYPTO_ROCKCHIP
-  struct rk_pub_key pub_key;
-  int i;
+#ifdef CONFIG_DM_CRYPTO
+  u32 cap = CRYPTO_MD5 | CRYPTO_SHA1 | CRYPTO_SHA256 | CRYPTO_RSA2048;
   uint8_t rsa_hash[256] = {0};
   uint8_t rsa_hash_revert[256] = {0};
   unsigned int rsaResult_temp[8];
   unsigned char rsaResult[32] = {0};
+  struct rk_pub_key pub_key;
+  struct udevice *dev;
+  rsa_key rsa_key;
   char *temp;
-  struct rk_crypto_desc crypto_desc;
   int ret = 0;
-
-  if (rk_crypto_probe())
-    return false;
+  int i;
 
   memset(&pub_key, 0, sizeof(struct rk_pub_key));
   ret = rk_avb_get_pub_key(&pub_key);
@@ -100,28 +99,20 @@ static bool verify_permanent_attributes(
   for (i = 0; i < 256; i++)
     rsa_hash_revert[255-i] = rsa_hash[i];
 
-  ret = get_rk_crypto_desc(&crypto_desc);
-  if (ret) {
-    avb_error("get_rk_crypto_desc error\n");
-    return false;
-  }
-
-  ret = rk_crypto_rsa_init(&crypto_desc);
-  if (ret) {
-    avb_error("rk_crypto_rsa_init error\n");
-    return false;
-  }
-
-  ret = rk_crypto_rsa_start(&crypto_desc, (u32 *)(rsa_hash_revert),
-                            pub_key.rsa_n, pub_key.rsa_e, pub_key.rsa_c);
-  if (ret) {
-    avb_error("rk_crypto_rsa_start error\n");
+  dev = crypto_get_device(cap);
+  if (!dev) {
+    avb_error("Can't find crypto device for expected capability\n");
     return false;
   }
 
-  ret = rk_crypto_rsa_end(&crypto_desc, rsaResult_temp);
+  memset(&rsa_key, 0x00, sizeof(rsa_key));
+  rsa_key.algo = CRYPTO_RSA2048;
+  rsa_key.n = (u32 *)&pub_key.rsa_n;
+  rsa_key.e = (u32 *)&pub_key.rsa_e;
+  rsa_key.c = (u32 *)&pub_key.rsa_c;
+  ret = crypto_rsa_verify(dev, &rsa_key, (u8 *)rsa_hash_revert, (u8 *)rsaResult_temp);
   if (ret) {
-    avb_error("rk_crypto_rsa_end error\n");
+    avb_error("Hardware verify error!\n");
     return false;
   }
 

commit 5a1674a738d139ac6dcaa59d5712a85abb83c8cd
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jun 21 18:00:40 2019 +0800

    drivers: core: do not use mtd node from kernel dtb
    
    Do not use mtd node from kernel dtb, otherwise the driver will
    be initialized twice.
    
    Change-Id: I6f3dca8fd8c3e05475f4359fe6c3c5312c0984cd
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/core/device.c b/drivers/core/device.c
index ea224c22e5..7b8f0e3e1c 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -54,7 +54,7 @@ static int device_bind_common(struct udevice *parent, const struct driver *drv,
 	if (gd->flags & GD_FLG_RELOC) {
 		/* For mmc/nand/spiflash, just update from kernel dtb instead bind again*/
 		if (drv->id == UCLASS_MMC || drv->id == UCLASS_RKNAND ||
-		    drv->id == UCLASS_SPI_FLASH) {
+		    drv->id == UCLASS_SPI_FLASH || drv->id == UCLASS_MTD) {
 			list_for_each_entry(dev, &uc->dev_head, uclass_node) {
 				if (!strcmp(name, dev->name)) {
 					debug("%s do not bind dev already in list %s\n",

commit 57b5e70433b52aa13503093c82062cd85c1f8420
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jun 24 14:59:29 2019 +0800

    common: fdt_support: support parse mtd part info
    
    Parse the mtd part info and pass it to kernel by bootargs if
    the device is mtd.
    
    Change-Id: I746081c58d797b8dbd63c47915c6d88a314e1a90
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/fdt_support.c b/common/fdt_support.c
index 4b8641d48c..c13287e574 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -8,16 +8,19 @@
  */
 
 #include <common.h>
+#include <exports.h>
+#include <fdt_support.h>
+#include <fdtdec.h>
 #include <inttypes.h>
+#ifdef CONFIG_MTD_BLK
+#include <mtd_blk.h>
+#endif
 #include <stdio_dev.h>
-#include <linux/ctype.h>
-#include <linux/types.h>
+#include <asm/arch/hotkey.h>
 #include <asm/global_data.h>
+#include <linux/ctype.h>
 #include <linux/libfdt.h>
-#include <fdt_support.h>
-#include <exports.h>
-#include <fdtdec.h>
-#include <asm/arch/hotkey.h>
+#include <linux/types.h>
 
 /**
  * fdt_getprop_u32_default_node - Return a node's property or a default
@@ -318,6 +321,14 @@ int fdt_chosen(void *fdt)
 				env_update_filter("bootargs", bootargs, "root=");
 #else
 				env_update("bootargs", bootargs);
+#endif
+#ifdef CONFIG_MTD_BLK
+				char *mtd_par_info = part_mtd_parse();
+
+				if (mtd_par_info) {
+					if (memcmp(env_get("devtype"), "mtd", 3) == 0)
+						env_update("bootargs", mtd_par_info);
+				}
 #endif
 				/*
 				 * Initrd fixup: remove unused "initrd=0x...,0x...",

commit 22dccd112283e533c5f8628b28ee780d92aa7791
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jun 24 14:35:39 2019 +0800

    mtd: mtd_blk: parse the block part info to mtd part info
    
    Change-Id: Ib4117bf22d1c91a5b2d69a45b6584e8d0cb47021
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index d4ce7de077..fb4aa283f0 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -5,11 +5,80 @@
  */
 
 #include <common.h>
+#include <blk.h>
+#include <boot_rkimg.h>
 #include <dm.h>
 #include <errno.h>
+#include <malloc.h>
 #include <nand.h>
+#include <part.h>
 #include <dm/device-internal.h>
 
+#define MTD_PART_NAND_HEAD		"mtdparts="
+#define MTD_PART_INFO_MAX_SIZE		512
+#define MTD_SINGLE_PART_INFO_MAX_SIZE	40
+
+char *mtd_part_parse(void)
+{
+	char mtd_part_info_temp[MTD_SINGLE_PART_INFO_MAX_SIZE] = {0};
+	u32 length, data_len = MTD_PART_INFO_MAX_SIZE;
+	struct blk_desc *dev_desc;
+	disk_partition_t info;
+	char *mtd_part_info_p;
+	char *mtd_part_info;
+	int ret;
+	int p;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc)
+		return NULL;
+
+	mtd_part_info = (char *)calloc(MTD_PART_INFO_MAX_SIZE, sizeof(char));
+	if (!mtd_part_info) {
+		printf("%s: Fail to malloc!", __func__);
+		return NULL;
+	}
+
+	mtd_part_info_p = mtd_part_info;
+	snprintf(mtd_part_info_p, data_len - 1, "%s%s:",
+		 MTD_PART_NAND_HEAD,
+		 dev_desc->product);
+	data_len -= strlen(mtd_part_info_p);
+	mtd_part_info_p = mtd_part_info_p + strlen(mtd_part_info_p);
+
+	for (p = 1; p < MAX_SEARCH_PARTITIONS; p++) {
+		ret = part_get_info(dev_desc, p, &info);
+		if (ret)
+			break;
+
+		debug("name is %s, start addr is %x\n", info.name,
+		      (int)(size_t)info.start);
+
+		snprintf(mtd_part_info_p, data_len - 1, "0x%x@0x%x(%s)",
+			 (int)(size_t)info.size << 9,
+			 (int)(size_t)info.start << 9,
+			 info.name);
+		snprintf(mtd_part_info_temp, MTD_SINGLE_PART_INFO_MAX_SIZE - 1,
+			 "0x%x@0x%x(%s)",
+			 (int)(size_t)info.size << 9,
+			 (int)(size_t)info.start << 9,
+			 info.name);
+		strcat(mtd_part_info, ",");
+		if (part_get_info(dev_desc, p + 1, &info)) {
+			snprintf(mtd_part_info_p, data_len - 1, "-@0x%x(%s)",
+				 (int)(size_t)info.start << 9,
+				 info.name);
+			break;
+		}
+		length = strlen(mtd_part_info_temp);
+		data_len -= length;
+		mtd_part_info_p = mtd_part_info_p + length + 1;
+		memset(mtd_part_info_temp, 0, MTD_SINGLE_PART_INFO_MAX_SIZE);
+	}
+
+	return mtd_part_info;
+}
+
 ulong mtd_dread(struct udevice *udev, lbaint_t start,
 		lbaint_t blkcnt, void *dst)
 {
diff --git a/include/mtd_blk.h b/include/mtd_blk.h
new file mode 100644
index 0000000000..35ab58ef63
--- /dev/null
+++ b/include/mtd_blk.h
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _MTD_BLK_H_
+#define _MTD_BLK_H_
+
+/**
+ * mtd_part_parse() - Parse the block part info to mtd part info
+ *
+ * @return mtd part info. If fail, return NULL
+ */
+char *mtd_part_parse(void);
+
+#endif

commit 73251fc230443bd6a87cc32bad8d8bf7089ad8fe
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jun 20 14:47:18 2019 +0800

    scripts: stacktrace: support parse spl/tpl stacktrace info
    
    Usage:
            ./scripts/stacktrace.sh ./dump.txt
            ./scripts/stacktrace.sh ./dump.txt tpl
            ./scripts/stacktrace.sh ./dump.txt spl
    
    Change-Id: I6a496109206d26917d5677c076aa770388c36ae6
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/scripts/stacktrace.sh b/scripts/stacktrace.sh
index 39699499ef..70b4dd68e2 100755
--- a/scripts/stacktrace.sh
+++ b/scripts/stacktrace.sh
@@ -8,21 +8,42 @@
 set -e
 ARGS_N=$#
 INPUT_FILE=$1
-SYMBOL_FILE=`find -name u-boot.sym`
+TPL_SPL=$2
+
+
+if [ "$TPL_SPL" = "tpl" ]; then
+	SYMBOL_FILE=`find -name u-boot-tpl.sym`
+elif [ "$TPL_SPL" = "spl" ]; then
+	SYMBOL_FILE=`find -name u-boot-spl.sym`
+else
+	SYMBOL_FILE=`find -name u-boot.sym`
+fi
 
 echo
 if [ $ARGS_N -eq 0 ]; then
 	echo "Usage: "
-	echo "	./scripts/stacktrace.sh <file>  // u-boot stacktrace info file"
+	echo "	./scripts/stacktrace.sh <file> <type>"
+	echo
+	echo "Param:"
+	echo "	<file>: stacktrace info file"
+	echo "	<type>: none, spl, tpl"
+	echo
+	echo "Example:"
+	echo "	./scripts/stacktrace.sh ./dump.txt"
+	echo "	./scripts/stacktrace.sh ./dump.txt tpl"
+	echo "	./scripts/stacktrace.sh ./dump.txt spl"
+	echo
 	exit 1
 elif [ ! -f $INPUT_FILE ]; then
 	echo "Can't find input file: $INPUT_FILE"
 	exit 1
 elif [ "$SYMBOL_FILE" = '' ] || [ ! -f $SYMBOL_FILE ]; then
-	echo "Can't find symbol file: u-boot.sym"
+	echo "Can't find symbol file: ${SYMBOL_FILE}"
 	exit 1
 fi
 
+echo "SYMBOL File: ${SYMBOL_FILE}"
+echo
 # Parse PC and LR
 echo "Call trace:"
 sed -n "/:   \[</p" $INPUT_FILE | while read line
@@ -33,12 +54,12 @@ do
 	frame_pc_dec=`echo $line | awk '{ print strtonum("0x"$3); }'`
 	frame_pc_hex=`echo "obase=16;${frame_pc_dec}"|bc |tr '[A-Z]' '[a-z]'`
 
-	f_pc_dec=`cat u-boot.sym | sort | awk '/\.text/ { if (strtonum("0x"$1) > '$frame_pc_str') { print fpc; exit; } fpc=strtonum("0x"$1); }'`
+	f_pc_dec=`cat ${SYMBOL_FILE} | sort | awk '/\.text/ { if (strtonum("0x"$1) > '$frame_pc_str') { print fpc; exit; } fpc=strtonum("0x"$1); }'`
 	f_pc_hex=`echo "obase=16;${f_pc_dec}"|bc |tr '[A-Z]' '[a-z]'`
 	f_offset_dec=$((frame_pc_dec-f_pc_dec))
 	f_offset_hex=`echo "obase=16;${f_offset_dec}"|bc |tr '[A-Z]' '[a-z]'`
 
-	cat u-boot.sym | sort |
+	cat ${SYMBOL_FILE} | sort |
 	awk -v foffset=$f_offset_hex '/\.text/ {
 		if (strtonum("0x"$1) > '$frame_pc_str') {
 			printf("%s+0x%s/0x%x      ", fname, foffset, fsize);
@@ -65,12 +86,12 @@ do
 	frame_pc_dec=`echo $line | awk '{ print strtonum("0x"$2); }'`
 	frame_pc_hex=`echo "obase=16;${frame_pc_dec}"|bc |tr '[A-Z]' '[a-z]'`
 
-	f_pc_dec=`cat u-boot.sym | sort | awk '/\.text/ { if (strtonum("0x"$1) > '$frame_pc_str') { print fpc; exit; } fpc=strtonum("0x"$1); }'`
+	f_pc_dec=`cat ${SYMBOL_FILE} | sort | awk '/\.text/ { if (strtonum("0x"$1) > '$frame_pc_str') { print fpc; exit; } fpc=strtonum("0x"$1); }'`
 	f_pc_hex=`echo "obase=16;${f_pc_dec}"|bc |tr '[A-Z]' '[a-z]'`
 	f_offset_dec=$((frame_pc_dec-f_pc_dec))
 	f_offset_hex=`echo "obase=16;${f_offset_dec}"|bc |tr '[A-Z]' '[a-z]'`
 
-	cat u-boot.sym | sort |
+	cat ${SYMBOL_FILE} | sort |
 	awk -v foffset=$f_offset_hex '/\.text/ {
 		if (strtonum("0x"$1) > '$frame_pc_str') {
 			printf("%s+0x%s/0x%x\n", fname, foffset, fsize);

commit 1b4592b5382f527bb3b8d924b88ea10ef40db558
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jun 20 12:32:21 2019 +0800

    scripts: Makefile.spl: generate symbol file for spl and tpl
    
    u-boot-tpl.sym and u-boot-spl.sym are required by stacktrace scripts
    
    Change-Id: Ie408332eaff71c3ed244016adb9f75401ca35845
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index 0e34a46c00..97b10d82c5 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -348,7 +348,8 @@ quiet_cmd_u-boot-spl ?= LD      $@
 		       $(patsubst $(obj)/%,%,$(u-boot-spl-main))  \
 		       $(patsubst $(obj)/%,%,$(u-boot-spl-platdata)) \
 		       --end-group \
-		       $(PLATFORM_LIBS) -Map $(SPL_BIN).map -o $(SPL_BIN))
+		       $(PLATFORM_LIBS) -Map $(SPL_BIN).map -o $(SPL_BIN) && \
+		       $(OBJDUMP) -t $(SPL_BIN) > $(SPL_BIN).sym)
 
 $(obj)/$(SPL_BIN): $(u-boot-spl-platdata) $(u-boot-spl-init) \
 		$(u-boot-spl-main) $(obj)/u-boot-spl.lds FORCE

commit 34bdfea0a0b76e056513ef244e5e1a445f617157
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jun 20 11:56:14 2019 +0800

    make.sh: support objdump tpl/spl elf file
    
    Example:
            ./make.sh elf tpl  --- objdump u-boot-tpl
            ./make.sh elf spl  --- objdump u-boot-spl
            ./make.sh elf      --- objdump u-boot
    
    Change-Id: I8dca1cfce207b98e755db8841f3d614cfad9bfb4
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index f6c44cf35f..8fb8cd1549 100755
--- a/make.sh
+++ b/make.sh
@@ -230,18 +230,25 @@ select_toolchain()
 sub_commands()
 {
 	local cmd=${SUBCMD%-*} opt=${SUBCMD#*-}
+	local elf=${OUTDIR}/u-boot map=${OUTDIR}/u-boot.map sym=${OUTDIR}/u-boot.sym
+
+	if [ "$FILE" == "tpl" -o "$FILE" == "spl" ]; then
+		elf=`find -name u-boot-${FILE}`
+		map=`find -name u-boot-${FILE}.map`
+		sym=`find -name u-boot-${FILE}.sym`
+	fi
 
 	case $cmd in
 		elf)
-		if [ ! -f ${OUTDIR}/u-boot ]; then
-			echo "Can't find elf file: ${OUTDIR}/u-boot"
+		if [ -o ! -f ${elf} ]; then
+			echo "Can't find elf file: ${elf}"
 			exit 1
 		else
 			# default 'cmd' without option, use '-D'
 			if [ "${cmd}" = 'elf' -a "${opt}" = 'elf' ]; then
 				opt=D
 			fi
-			${TOOLCHAIN_OBJDUMP} -${opt} ${OUTDIR}/u-boot | less
+			${TOOLCHAIN_OBJDUMP} -${opt} ${elf} | less
 			exit 0
 		fi
 		;;
@@ -252,12 +259,12 @@ sub_commands()
 		;;
 
 		map)
-		cat ${OUTDIR}/u-boot.map | less
+		cat ${map} | less
 		exit 0
 		;;
 
 		sym)
-		cat ${OUTDIR}/u-boot.sym | less
+		cat ${sym} | less
 		exit 0
 		;;
 
@@ -311,8 +318,8 @@ sub_commands()
 			fi
 
 			echo
-			sed -n "/${FUNCADDR}/p" ${OUTDIR}/u-boot.sym
-			${TOOLCHAIN_ADDR2LINE} -e ${OUTDIR}/u-boot ${FUNCADDR}
+			sed -n "/${FUNCADDR}/p" ${sym}
+			${TOOLCHAIN_ADDR2LINE} -e ${elf} ${FUNCADDR}
 			exit 0
 		fi
 		;;

commit 89514e0a47b5b7941cc6c47693c90f2291bd3c35
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 19 21:48:26 2019 +0800

    configs: evb-rk3229: spl increase stack_r malloc size
    
    Fix the SPL boot issue:
    
    U-Boot TPL 2017.09-02983-ga891458 (Jun 19 2019 - 21:50:08)
    Returning to boot ROM...
    U-Boot SPL board init
    U-Boot SPL 2017.09-02983-ga891458 (Jun 19 2019 - 21:50:08)
    Trying to boot from MMC2
    mmc fail to send stop cmd
    
    Change-Id: I2f47ff906eacfd51af1ec5145331349167c55166
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index a8274a65aa..43a92f340c 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -26,7 +26,7 @@ CONFIG_ANDROID_BOOTLOADER=y
 # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
 CONFIG_TPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x6000
 CONFIG_SPL_OPTEE=y
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y

commit c88a887aa9acdf1ad49d35262783b70b83cc449c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 19 21:47:04 2019 +0800

    configs: evb-rk3229: update by make savedefconfig
    
    Change-Id: Iac13ed18452db14f41dc8bc1e4a2736392f35330
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index 99a232f563..a8274a65aa 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -3,34 +3,31 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x1000
-CONFIG_ROCKCHIP_RK322X=y
 CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl.lds"
 CONFIG_TPL_TEXT_BASE=0x10081000
 CONFIG_TPL_MAX_SIZE=28672
+CONFIG_ROCKCHIP_RK322X=y
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
 CONFIG_TPL_STACK=0x10088000
-CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
-CONFIG_TPL_TINY_MEMSET=y
-CONFIG_USE_TINY_PRINTF=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_TARGET_EVB_RK3229=y
 CONFIG_SPL_STACK_R_ADDR=0x60600000
 CONFIG_DEFAULT_DEVICE_TREE="rk3229-evb"
-CONFIG_BOOTDELAY=0
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
+CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_TPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 CONFIG_SPL_OPTEE=y
-CONFIG_FASTBOOT_BUF_ADDR=0x60800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
@@ -47,8 +44,8 @@ CONFIG_SPL_OF_CONTROL=y
 CONFIG_TPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_ENV_IS_IN_MMC=y
-CONFIG_TPL_DM=y
 CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_TPL_DM=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_TPL_REGMAP=y
@@ -75,9 +72,7 @@ CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0x11030000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
-CONFIG_TPL_SYS_MALLOC_SIMPLE=y
 CONFIG_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_GADGET=y
@@ -86,6 +81,8 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Rockchip"
 CONFIG_G_DNL_VENDOR_NUM=0x18d1
 CONFIG_G_DNL_PRODUCT_NUM=0xd00d
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_TPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
 CONFIG_AVB_LIBAVB=y
 CONFIG_AVB_LIBAVB_AB=y

commit e8048e8f0a19c66c39b56f1578835ec14f83d970
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 19 08:43:06 2019 +0800

    rockchip: dts: rk3229-evb: update "u-boot,dm-xxx" prop for some nodes
    
    Change-Id: If9fcdae550c967712e8b9a0be73bb661481d171b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3229-evb.dts b/arch/arm/dts/rk3229-evb.dts
index 5b4c97befc..62acc7f5a2 100644
--- a/arch/arm/dts/rk3229-evb.dts
+++ b/arch/arm/dts/rk3229-evb.dts
@@ -36,12 +36,12 @@
 	};
 
 	gpio-keys {
-		u-boot,dm-pre-reloc;
+		u-boot,dm-spl;
 		compatible = "gpio-keys";
 		status = "okay";
 
 		volume-up {
-			u-boot,dm-pre-reloc;
+			u-boot,dm-spl;
 			linux,code = <KEY_VOLUMEUP>;
 			label = "Volume Up";
 			gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
diff --git a/arch/arm/dts/rk322x-u-boot.dtsi b/arch/arm/dts/rk322x-u-boot.dtsi
index 3d73382141..90f709dc3e 100644
--- a/arch/arm/dts/rk322x-u-boot.dtsi
+++ b/arch/arm/dts/rk322x-u-boot.dtsi
@@ -32,46 +32,46 @@
 };
 
 &emmc {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 };
 
 &nandc {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 };
 
 &sdmmc {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 };
 
 &uart2 {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 };
 
 &u2phy0 {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 	status = "okay";
 };
 
 &u2phy0_otg {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 	status = "okay";
 };
 
 &usb20_otg {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 	status = "okay";
 };
 
 &pinctrl {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 	status = "okay";
 };
 
 &gpio1 {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 };
 
 &gpio3 {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 	status = "okay";
 };

commit 8dd9db5d1cd5826638c3cdb5f681300ff2f29f3b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 19 08:34:33 2019 +0800

    Makefile: tpl: u-boot-tpl.dtb support include node with prop "u-boot,dm-tpl"
    
    Without this patch, u-boot-tpl.dtb is always copy from u-boot-spl.dtb which
    doesn't apply fdtgrep with "-b u-boot,dm-tpl".
    
    Sometimes, the platform with critical sram size requires u-boot-tpl.dtb as
    smaller as possible, so we use "u-boot,dm-tpl" prop to idendify what the
    tpl really needs.
    
    Rules:
    "u-boot,dm-tpl": include node with prop for u-boot-tpl.dtb;
    "u-boot,dm-spl": include node with prop for u-boot-spl.dtb;
    "u-boot,pre-reloc": include node with prop for u-boot-tpl.dtb and u-boot-spl.dtb;
    
    Change-Id: I29c2464d285174f4d0a4a1f8b91a84238ed82384
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/dts/Makefile b/dts/Makefile
index c9b2a89441..0e77a283ce 100644
--- a/dts/Makefile
+++ b/dts/Makefile
@@ -38,13 +38,23 @@ quiet_cmd_fdtgrep = FDTGREP $@
 	$(objtree)/tools/fdtgrep -r -O dtb - -o $@ \
 		$(addprefix -P ,$(subst $\",,$(CONFIG_OF_SPL_REMOVE_PROPS)))
 
+fdtgrep_tpl_props := -b u-boot,dm-pre-reloc -b u-boot,dm-tpl
+quiet_cmd_fdtgrep_tpl = FDTGREP $@
+      cmd_fdtgrep_tpl = $(objtree)/tools/fdtgrep $(fdtgrep_tpl_props) -RT $< \
+                -n /config -O dtb | \
+        $(objtree)/tools/fdtgrep -r -O dtb - -o $@ \
+                $(addprefix -P ,$(subst $\",,$(CONFIG_OF_SPL_REMOVE_PROPS)))
+
+$(obj)/dt-tpl.dtb: $(DTB) $(objtree)/tools/fdtgrep FORCE
+	$(call if_changed,fdtgrep_tpl)
+
 $(obj)/dt-spl.dtb: $(DTB) $(objtree)/tools/fdtgrep FORCE
 	$(call if_changed,fdtgrep)
 
 $(obj)/dt.dtb: $(DTB) FORCE
 	$(call if_changed,shipped)
 
-targets += dt.dtb dt-spl.dtb
+targets += dt.dtb dt-spl.dtb dt-tpl.dtb
 
 $(DTB): $(dtb_depends)
 ifeq ($(EXT_DTB),)
@@ -61,22 +71,25 @@ endif
 arch-dtbs:
 	$(Q)$(MAKE) $(build)=$(ARCH_PATH) dtbs
 
-.SECONDARY: $(obj)/dt.dtb.S $(obj)/dt-spl.dtb.S
+.SECONDARY: $(obj)/dt.dtb.S $(obj)/dt-spl.dtb.S $(obj)/dt-tpl.dtb.S
 
 
 ifeq ($(CONFIG_SPL_BUILD),y)
 obj-$(CONFIG_OF_EMBED) := dt-spl.dtb.o
 # support "out-of-tree" build for dtb-spl
+$(obj)/dt-tpl.dtb.o: $(obj)/dt-tpl.dtb.S FORCE
+	$(call if_changed_dep,as_o_S)
+
 $(obj)/dt-spl.dtb.o: $(obj)/dt-spl.dtb.S FORCE
 	$(call if_changed_dep,as_o_S)
 else
 obj-$(CONFIG_OF_EMBED) := dt.dtb.o
 endif
 
-dtbs: $(obj)/dt.dtb $(obj)/dt-spl.dtb
+dtbs: $(obj)/dt.dtb $(obj)/dt-spl.dtb $(obj)/dt-tpl.dtb
 	@:
 
-clean-files := dt.dtb.S dt-spl.dtb.S
+clean-files := dt.dtb.S dt-spl.dtb.S dt-tpl.dtb.S
 
 # Let clean descend into dts directories
 subdir- += ../arch/arm/dts ../arch/microblaze/dts ../arch/mips/dts ../arch/sandbox/dts ../arch/x86/dts
diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index e2f0741db6..0e34a46c00 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -246,8 +246,13 @@ $(obj)/$(SPL_BIN)-pad.bin: $(obj)/$(SPL_BIN)
 	@bss_size_str=$(shell $(NM) $< | awk 'BEGIN {size = 0} /__bss_size/ {size = $$1} END {print "ibase=16; " toupper(size)}' | bc); \
 	dd if=/dev/zero of=$@ bs=1 count=$${bss_size_str} 2>/dev/null;
 
+ifeq ($(CONFIG_TPL_BUILD),y)
+$(obj)/$(SPL_BIN).dtb: dts/dt-tpl.dtb FORCE
+	$(call if_changed,copy)
+else
 $(obj)/$(SPL_BIN).dtb: dts/dt-spl.dtb FORCE
 	$(call if_changed,copy)
+endif
 
 pythonpath = PYTHONPATH=scripts/dtc/pylibfdt
 

commit df5ff5a374bc87d44d01aa9319009bce4f4eff1e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 19 18:09:32 2019 +0800

    common: spl: atf: disable and clean-invalidate icache/dcache
    
    Refer to cleanup_before_linux().
    
    Change-Id: Ia738f2816ab8c6fa09776aebd83f775697117d8c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/spl/spl_atf.c b/common/spl/spl_atf.c
index a98a4e99a9..1de602c5e1 100644
--- a/common/spl/spl_atf.c
+++ b/common/spl/spl_atf.c
@@ -104,7 +104,19 @@ void bl31_entry(uintptr_t bl31_entry, uintptr_t bl32_entry,
 	bl31_params = bl2_plat_get_bl31_params(bl32_entry, bl33_entry);
 
 	raw_write_daif(SPSR_EXCEPTION_MASK);
+
+	/*
+	 * Turn off I-cache and invalidate it
+	 */
+	icache_disable();
+	invalidate_icache_all();
+
+	/*
+	 * turn off D-cache
+	 * dcache_disable() in turn flushes the d-cache and disables MMU
+	 */
 	dcache_disable();
+	invalidate_dcache_all();
 
 	atf_entry((void *)bl31_params, (void *)fdt_addr);
 }

commit e6482de4e5bfec4f9a5b2f9a94eb78c320705f1e
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jun 21 10:21:57 2019 +0800

    mtd: mtd_blk: get desc->product by mtd->name
    
    Change-Id: I9c089032db87de20fa9a57a9637247df8fac2fbb
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index 0d2bd247b2..d4ce7de077 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -76,7 +76,7 @@ static int mtd_blk_probe(struct udevice *udev)
 	struct mtd_info *mtd = dev_get_priv(udev->parent);
 
 	sprintf(desc->vendor, "0x%.4x", 0x2207);
-	memcpy(desc->product, "MTD", sizeof("MTD"));
+	memcpy(desc->product, mtd->name, strlen(mtd->name));
 	memcpy(desc->revision, "V1.00", sizeof("V1.00"));
 	if (mtd->type == MTD_NANDFLASH) {
 		/* Reserve 4 blocks for BBT(Bad Block Table) */

commit d2e692d26497d4b9ff4aa52c587224ff078c6f2c
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Fri Jun 21 08:37:57 2019 +0800

    drivers: mtd: nand: rockchip: the mtd name used the same as kenrel drivers
    
    Change-Id: Ib3c6d70896f6bb5acb3ea506d01facc5ca465ba2
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/drivers/mtd/nand/rockchip_nand.c b/drivers/mtd/nand/rockchip_nand.c
index bf0bddcb7b..1d0c27b7cc 100644
--- a/drivers/mtd/nand/rockchip_nand.c
+++ b/drivers/mtd/nand/rockchip_nand.c
@@ -592,7 +592,6 @@ static int rockchip_nand_chip_init(int node, struct rk_nand *rknand, int devnum)
 		return -EINVAL;
 
 	mtd = nand_to_mtd(chip);
-	mtd->name = "rknand";
 	mtd->dev = rknand->dev;
 	if (rknand->dev)
 		rknand->dev->priv = mtd;
@@ -618,7 +617,7 @@ static int rockchip_nand_chip_init(int node, struct rk_nand *rknand, int devnum)
 		debug("Failed to register mtd device: %d\n", ret);
 		return ret;
 	}
-
+	mtd->name = "rk-nand";
 	return 0;
 }
 
diff --git a/drivers/mtd/nand/rockchip_nand_v9.c b/drivers/mtd/nand/rockchip_nand_v9.c
index 32711bbd6c..76b36032b5 100644
--- a/drivers/mtd/nand/rockchip_nand_v9.c
+++ b/drivers/mtd/nand/rockchip_nand_v9.c
@@ -593,7 +593,6 @@ static int rockchip_nand_chip_init(int node, struct rk_nand *rknand, int devnum)
 		return -EINVAL;
 
 	mtd = nand_to_mtd(chip);
-	mtd->name = "rknand";
 	mtd->dev = rknand->dev;
 	if (rknand->dev)
 		rknand->dev->priv = mtd;
@@ -619,7 +618,7 @@ static int rockchip_nand_chip_init(int node, struct rk_nand *rknand, int devnum)
 		debug("Failed to register mtd device: %d\n", ret);
 		return ret;
 	}
-
+	mtd->name = "rk-nand";
 	return 0;
 }
 

commit 774966068a8c6100b3da251278f4f8e14607c214
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Wed Jun 19 17:03:55 2019 +0800

    rockchip: include: configs: rk3308 reconfig default nand flash size
    
    Change-Id: I3d912a217fce065442c036b9405364b8f9169f5e
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h
index 72b3c9895a..3bfa3222e2 100644
--- a/include/configs/rk3308_common.h
+++ b/include/configs/rk3308_common.h
@@ -15,7 +15,7 @@
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
 #define CONFIG_SYS_NAND_PAGE_COUNT	64
-#define CONFIG_SYS_NAND_SIZE		(64 * 1024)
+#define CONFIG_SYS_NAND_SIZE		(256 * 1024 * 1024)
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_TEXT_BASE		0x00000000
 #define CONFIG_SPL_MAX_SIZE		0x20000

commit fe5b67570a83e16308a892f507092cc75531214f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 19 18:03:11 2019 +0800

    common: image-android: don't print fdt load addr/size info
    
    The fdt load addr doesn't make any sense from android hdr,
    and it's easy to make user to be confused with "fdt_addr_r".
    
    Change-Id: I20c9047a1a3cef6987d3a1a1c85b6a0f3af15ad2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/image-android.c b/common/image-android.c
index 0237565343..f14ad7d960 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -251,8 +251,8 @@ int android_image_get_fdt(const struct andr_img_hdr *hdr,
 	*rd_data += ALIGN(hdr->ramdisk_size, hdr->page_size);
 #endif
 
-	printf("FDT load addr 0x%08x size %u KiB\n",
-	       hdr->second_addr, DIV_ROUND_UP(hdr->second_size, 1024));
+	debug("FDT load addr 0x%08x size %u KiB\n",
+	      hdr->second_addr, DIV_ROUND_UP(hdr->second_size, 1024));
 
 	return 0;
 }

commit 0d0d4395c1a7b09ab7edad43124ac752846972d4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 19 21:46:22 2019 +0800

    make.sh: support pack u-boot.itb for 32-bit platform
    
    Change-Id: I4e7a8f0b334ba39034943f6c1667259d446ea5d4
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 34e2d2219e..f6c44cf35f 100755
--- a/make.sh
+++ b/make.sh
@@ -558,19 +558,43 @@ pack_uboot_image()
 
 pack_uboot_itb_image()
 {
-	local ini=${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST.ini
+	local ini
 
-	if [ ! -f ${ini} ]; then
-		echo "pack trust failed! Can't find: ${ini}"
-		return
-	fi
+	# ARM64
+	if grep -Eq ''^CONFIG_ARM64=y'|'^CONFIG_ARM64_BOOT_AARCH32=y'' ${OUTDIR}/.config ; then
+		ini=${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST.ini
+		if [ ! -f ${ini} ]; then
+			echo "pack trust failed! Can't find: ${ini}"
+			return
+		fi
 
-	bl31=`sed -n '/_bl31_/s/PATH=//p' ${ini} |tr -d '\r'`
+		bl31=`sed -n '/_bl31_/s/PATH=//p' ${ini} |tr -d '\r'`
 
-	cp ${RKBIN}/${bl31} bl31.elf
-	make CROSS_COMPILE=${TOOLCHAIN_GCC} u-boot.itb
+		cp ${RKBIN}/${bl31} bl31.elf
+		make CROSS_COMPILE=${TOOLCHAIN_GCC} u-boot.itb
+		echo "pack u-boot.itb okay! Input: ${ini}"
+	else
+		ini=${RKBIN}/RKTRUST/${RKCHIP_TRUST}TOS.ini
+		if [ ! -f ${ini} ]; then
+			echo "pack trust failed! Can't find: ${ini}"
+			return
+		fi
+
+		TOS=`sed -n "/TOS=/s/TOS=//p" ${ini} |tr -d '\r'`
+		TOS_TA=`sed -n "/TOSTA=/s/TOSTA=//p" ${ini} |tr -d '\r'`
+
+		if [ $TOS_TA ]; then
+			cp ${RKBIN}/${TOS_TA} tee.bin
+		elif [ $TOS ]; then
+			cp ${RKBIN}/${TOS} tee.bin
+		else
+			echo "Can't find any tee bin"
+			exit 1
+		fi
 
-	echo "pack u-boot.itb okay! Input: ${ini}"
+		make CROSS_COMPILE=${TOOLCHAIN_GCC} u-boot.itb
+		echo "pack u-boot.itb okay! Input: ${ini}"
+	fi
 }
 
 pack_spl_loader_image()

commit dd590c9364ebf54364f44db29d997d2bd1c958cd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 18 17:39:34 2019 +0800

    make.sh: support assign ini file for packing loader/trust/spl-s
    
    Example:
            ./make.sh loader ~/rkbin/RKBOOT/RK3399MINIALL_SPINOR.ini
            ./make.sh loader ~/rkbin/RKTRUST/RK3308AARCH32TRUST.ini
            ./make.sh spl-s ~/rkbin/RKBOOT/RK3399MINIALL_SPINOR.ini
    
    Change-Id: Ie373857befdf030a1b816de629dd38d6be1fc920
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index a148e8863d..34e2d2219e 100755
--- a/make.sh
+++ b/make.sh
@@ -9,6 +9,7 @@ set -e
 BOARD=$1
 SUBCMD=$1
 FUNCADDR=$1
+FILE=$2
 JOB=`sed -n "N;/processor/p" /proc/cpuinfo|wc -l`
 SUPPORT_LIST=`ls configs/*[r,p][x,v,k][0-9][0-9]*_defconfig`
 
@@ -578,6 +579,10 @@ pack_spl_loader_image()
 	local ini=${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL.ini
 	local temp_ini=${RKBIN}/.temp/${RKCHIP_LOADER}MINIALL.ini
 
+	if [ "$FILE" != "" ]; then
+		ini=$FILE;
+	fi
+
 	if [ ! -f ${ini} ]; then
 		echo "pack TPL+SPL loader failed! Can't find: ${ini}"
 		return
@@ -591,7 +596,7 @@ pack_spl_loader_image()
 	fi
 	cp ${OUTDIR}/spl/u-boot-spl.bin ${RKBIN}/.temp/
 	cp ${OUTDIR}/tpl/u-boot-tpl.bin ${RKBIN}/.temp/
-	cp ${ini} ${RKBIN}/.temp/
+	cp ${ini} ${RKBIN}/.temp/${RKCHIP_LOADER}MINIALL.ini -f
 
 	cd ${RKBIN}
 	if [ "$mode" = 'spl' ]; then	# pack tpl+spl
@@ -618,6 +623,10 @@ pack_loader_image()
 {
 	local mode=$1 files ini=${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL.ini
 
+	if [ "$FILE" != "" ]; then
+		ini=$FILE;
+	fi
+
 	if [ ! -f $ini ]; then
 		echo "pack loader failed! Can't find: $ini"
 		return
@@ -716,6 +725,10 @@ pack_trust_image()
 	# ARM64 uses trust_merger
 	if grep -Eq ''^CONFIG_ARM64=y'|'^CONFIG_ARM64_BOOT_AARCH32=y'' ${OUTDIR}/.config ; then
 		ini=${RKBIN}/RKTRUST/${RKCHIP_TRUST}TRUST.ini
+		if [ "$FILE" != "" ]; then
+			ini=$FILE;
+		fi
+
 		if [ "${mode}" = 'all' ]; then
 			files=`ls ${RKBIN}/RKTRUST/${RKCHIP_TRUST}TRUST*.ini`
 			for ini in $files
@@ -728,6 +741,9 @@ pack_trust_image()
 	# ARM uses loaderimage
 	else
 		ini=${RKBIN}/RKTRUST/${RKCHIP_TRUST}TOS.ini
+		if [ "$FILE" != "" ]; then
+			ini=$FILE;
+		fi
 		if [ "${mode}" = 'all' ]; then
 			files=`ls ${RKBIN}/RKTRUST/${RKCHIP_TRUST}TOS*.ini`
 			for ini in $files

commit f1892190deb701c41b5727da5250f4a4ddbb6483
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Jun 18 17:24:58 2019 +0800

    mtd: add desc->lba to mtd block device
    
    The desc->lba is based on mtd->size: desc->lba = mtd->size >> 9;
    
    If the mtd storage is spi nand or nand flash, reserve 4 blocks
    for BBT(Bad Block Table). Then desc->lba is
    desc->lba = (mtd->size >> 9) - (mtd->erasesize >> 9) * 4;
    
    Change-Id: I70702623895fe05cec614c4c3ca5f3f6c41d26ca
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index 1b23cee92f..0d2bd247b2 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -73,10 +73,17 @@ ulong mtd_derase(struct udevice *udev, lbaint_t start,
 static int mtd_blk_probe(struct udevice *udev)
 {
 	struct blk_desc *desc = dev_get_uclass_platdata(udev);
+	struct mtd_info *mtd = dev_get_priv(udev->parent);
 
 	sprintf(desc->vendor, "0x%.4x", 0x2207);
 	memcpy(desc->product, "MTD", sizeof("MTD"));
 	memcpy(desc->revision, "V1.00", sizeof("V1.00"));
+	if (mtd->type == MTD_NANDFLASH) {
+		/* Reserve 4 blocks for BBT(Bad Block Table) */
+		desc->lba = (mtd->size >> 9) - (mtd->erasesize >> 9) * 4;
+	} else {
+		desc->lba = mtd->size >> 9;
+	}
 
 	return 0;
 }

commit 346e1f7dd107c0be2c40fa42a01ef80fe4e39c94
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Mar 15 20:46:52 2019 +0800

    rockchip: config: add mtd dev scan
    
    Change-Id: Icda4764ad41292685bd3f35c970fb2edf080e013
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index e8bd45396b..cfec67e118 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -115,6 +115,8 @@
 		"setenv devtype mmc; setenv devnum 1; echo Boot from SDcard;" \
 	"elif mmc dev 0; then " \
 		"setenv devtype mmc; setenv devnum 0;" \
+	"elif mtd dev 0; then " \
+		"setenv devtype mtd; setenv devnum 0;" \
 	"elif rknand dev 0; then " \
 		"setenv devtype rknand; setenv devnum 0;" \
 	"elif rksfc dev 0; then " \

commit de8452aebf0f69a50a2f63ac68cbc3d9879fe3ae
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Mar 15 20:32:25 2019 +0800

    cmd: mtd: support mtd command
    
    Change-Id: I5d5548e97535c6d928d2ff84f055de259577c11a
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 6e23561996..b5b6b36943 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1498,6 +1498,11 @@ config CMD_MTDPARTS
 	help
 	  MTD partition support
 
+config CMD_MTD
+	bool "MTD support"
+	help
+	  MTD support
+
 config MTDIDS_DEFAULT
 	string "Default MTD IDs"
 	depends on CMD_MTDPARTS
diff --git a/cmd/Makefile b/cmd/Makefile
index 7ff83c2524..853643bfb2 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -100,6 +100,7 @@ obj-$(CONFIG_CMD_MMC) += mmc.o
 obj-$(CONFIG_CMD_MMC_SPI) += mmc_spi.o
 obj-$(CONFIG_MP) += mp.o
 obj-$(CONFIG_CMD_MTDPARTS) += mtdparts.o
+obj-$(CONFIG_CMD_MTD) += mtd.o
 obj-$(CONFIG_CMD_NAND) += nand.o
 obj-$(CONFIG_CMD_NET) += net.o
 obj-$(CONFIG_CMD_ONENAND) += onenand.o
diff --git a/cmd/mtd.c b/cmd/mtd.c
new file mode 100644
index 0000000000..3ca1122dff
--- /dev/null
+++ b/cmd/mtd.c
@@ -0,0 +1,31 @@
+/*
+ * Copyright (C) (C) Copyright 2016-2019 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <command.h>
+#include <dm.h>
+
+static int mtd_curr_dev = -1;
+
+static int do_mtd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+	if (argc == 2) {
+		return CMD_RET_FAILURE;
+	}
+
+	return blk_common_cmd(argc, argv, IF_TYPE_MTD, &mtd_curr_dev);
+}
+
+U_BOOT_CMD(
+	mtd, 8, 1, do_mtd,
+	"MTD device sub-system",
+	"mtd dev [dev] - show or set current MTD device\n"
+	"mtd part [dev] - print partition table of one or all MTD devices\n"
+	"mtd read addr blk# cnt - read `cnt' blocks starting at block\n"
+	"     `blk#' to memory address `addr'\n"
+	"mtd write addr blk# cnt - write `cnt' blocks starting at block\n"
+	"     `blk#' from memory address `addr'"
+);

commit b102334f1eef7c833cfcb3386bd451304f60106e
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Mar 15 20:26:43 2019 +0800

    common: rkimg: support mtd block
    
    Change-Id: Iff8b6d7913a33fb90c05402bacab3173283fe672
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 57e590686a..ba28da4ae2 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -198,6 +198,9 @@ int get_bootdev_type(void)
 	} else if (!strcmp(devtype, "ramdisk")) {
 		type = IF_TYPE_RAMDISK;
 		boot_media = "ramdisk";
+	} else if (!strcmp(devtype, "mtd")) {
+		type = IF_TYPE_MTD;
+		boot_media = "mtd";
 	} else {
 		/* Add new to support */
 	}

commit 02445819f5479a0923f45bf4198635f25f68a1c2
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Mar 15 20:24:18 2019 +0800

    disk: part: support mtd block part
    
    Change-Id: I1f34cca448e007cc734042121a9f31dcea96fc41
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/disk/part.c b/disk/part.c
index 097e4e7e0e..81c1972fe2 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -143,6 +143,7 @@ void dev_print (struct blk_desc *dev_desc)
 		break;
 	case IF_TYPE_SD:
 	case IF_TYPE_MMC:
+	case IF_TYPE_MTD:
 	case IF_TYPE_USB:
 	case IF_TYPE_NVME:
 	case IF_TYPE_RKNAND:
@@ -278,6 +279,9 @@ static void print_part_header(const char *type, struct blk_desc *dev_desc)
 	case IF_TYPE_MMC:
 		puts ("MMC");
 		break;
+	case IF_TYPE_MTD:
+		puts("MTD");
+		break;
 	case IF_TYPE_HOST:
 		puts ("HOST");
 		break;

commit 411568d7eb6a16c311dd02054073cbb0e43c298c
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Thu May 30 17:24:48 2019 +0800

    drivers: mtd: nand: support rockchip nand driver as a DT device
    
    Change-Id: I0023502f5121354863ed63fefa380643ec49b1e1
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index f3372d65f7..bf0895604f 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -90,6 +90,15 @@ config NAND_ROCKCHIP_V9
 	---help---
 	Enable support for Rockchip nand v9.
 
+if NAND_ROCKCHIP || NAND_ROCKCHIP_V9
+config NAND_ROCKCHIP_DT
+        bool "Support Rockchip NAND controller as a DT device"
+	default y
+        help
+          Enable the driver for Rockchip NAND flash on platforms
+	  using device tree.
+endif
+
 config NAND_SUNXI
 	bool "Support for NAND on Allwinner SoCs"
 	depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
diff --git a/drivers/mtd/nand/rockchip_nand.c b/drivers/mtd/nand/rockchip_nand.c
index b8607c82ee..bf0bddcb7b 100644
--- a/drivers/mtd/nand/rockchip_nand.c
+++ b/drivers/mtd/nand/rockchip_nand.c
@@ -6,14 +6,16 @@
  */
 
 #include <common.h>
+#include <dm.h>
 #include <fdtdec.h>
 #include <inttypes.h>
 #include <nand.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
 #include <linux/kernel.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/nand.h>
 #include <linux/mtd/partitions.h>
-#include <linux/io.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -83,6 +85,7 @@ struct rk_nand {
 	bool bootromblocks;
 	void __iomem *regs;
 	int selected_bank;
+	struct udevice *dev;
 };
 
 static struct nand_ecclayout nand_oob_fix = {
@@ -445,7 +448,7 @@ static int rockchip_nand_ecc_max_strength(struct mtd_info *mtd,
 					  struct nand_ecc_ctrl *ecc)
 {
 	uint32_t max_strength, index;
-	
+
 	max_strength = ((mtd->oobsize / ecc->steps) - ecc->prepad) * 8 / 14;
 
 	for (index = 0; index < ARRAY_SIZE(strengths); index++)
@@ -590,6 +593,9 @@ static int rockchip_nand_chip_init(int node, struct rk_nand *rknand, int devnum)
 
 	mtd = nand_to_mtd(chip);
 	mtd->name = "rknand";
+	mtd->dev = rknand->dev;
+	if (rknand->dev)
+		rknand->dev->priv = mtd;
 
 	ret = nand_scan_ident(mtd, 1, NULL);
 	if (ret)
@@ -632,6 +638,81 @@ static int rockchip_nand_chips_init(int node, struct rk_nand *rknand)
 	return 0;
 }
 
+#ifdef CONFIG_NAND_ROCKCHIP_DT
+static const struct udevice_id rockchip_nandc_ids[] = {
+	{ .compatible = "rockchip,nandc" },
+	{ }
+};
+
+static int rockchip_nandc_probe(struct udevice *dev)
+{
+	const void *blob = gd->fdt_blob;
+	struct rk_nand *rknand = dev_get_priv(dev);
+	fdt_addr_t regs;
+	int ret = 0, node;
+
+	node = fdtdec_next_compatible(blob, 0, COMPAT_ROCKCHIP_NANDC);
+
+	rknand->dev = dev;
+
+	regs = dev_read_addr(dev);
+	if (regs == FDT_ADDR_T_NONE) {
+		debug("Nand address not found\n");
+		return ret;
+	}
+
+	rknand->regs = (void *)regs;
+
+	spin_lock_init(&rknand->controller.lock);
+	init_waitqueue_head(&rknand->controller.wq);
+
+	rockchip_nand_init(rknand);
+
+	ret = rockchip_nand_chips_init(node, rknand);
+	if (ret)
+		debug("Failed to init nand chips\n");
+
+	return ret;
+}
+
+static int rockchip_nandc_bind(struct udevice *udev)
+{
+	int ret = 0;
+
+#ifdef CONFIG_MTD_BLK
+	struct udevice *bdev;
+
+	ret = blk_create_devicef(udev, "mtd_blk", "blk", IF_TYPE_MTD,
+				 0, 512, 0, &bdev);
+	if (ret)
+		printf("Cannot create block device\n");
+#endif
+	return ret;
+}
+
+U_BOOT_DRIVER(rk_nandc_v6) = {
+	.name           = "rk_nandc_v6",
+	.id             = UCLASS_MTD,
+	.of_match       = rockchip_nandc_ids,
+	.bind		= rockchip_nandc_bind,
+	.probe          = rockchip_nandc_probe,
+	.priv_auto_alloc_size = sizeof(struct rk_nand),
+};
+
+void board_nand_init(void)
+{
+	struct udevice *dev;
+	int ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_MTD,
+					  DM_GET_DRIVER(rk_nandc_v6),
+					  &dev);
+	if (ret && ret != -ENODEV)
+		pr_err("Failed to initialize NAND controller. (error %d)\n",
+		       ret);
+}
+#else
+
 void board_nand_init(void)
 {
 	const void *blob = gd->fdt_blob;
@@ -678,6 +759,8 @@ err:
 	kfree(rknand);
 }
 
+#endif
+
 int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst)
 {
 	struct mtd_info *mtd;
diff --git a/drivers/mtd/nand/rockchip_nand_v9.c b/drivers/mtd/nand/rockchip_nand_v9.c
index b2ff609d33..32711bbd6c 100644
--- a/drivers/mtd/nand/rockchip_nand_v9.c
+++ b/drivers/mtd/nand/rockchip_nand_v9.c
@@ -6,14 +6,16 @@
  */
 
 #include <common.h>
+#include <dm.h>
 #include <fdtdec.h>
 #include <inttypes.h>
 #include <nand.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
 #include <linux/kernel.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/nand.h>
 #include <linux/mtd/partitions.h>
-#include <linux/io.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -81,6 +83,7 @@ struct rk_nand {
 	bool bootromblocks;
 	void __iomem *regs;
 	int selected_bank;
+	struct udevice *dev;
 };
 
 static struct nand_ecclayout nand_oob_fix = {
@@ -591,6 +594,9 @@ static int rockchip_nand_chip_init(int node, struct rk_nand *rknand, int devnum)
 
 	mtd = nand_to_mtd(chip);
 	mtd->name = "rknand";
+	mtd->dev = rknand->dev;
+	if (rknand->dev)
+		rknand->dev->priv = mtd;
 
 	ret = nand_scan_ident(mtd, 1, NULL);
 	if (ret)
@@ -633,6 +639,81 @@ static int rockchip_nand_chips_init(int node, struct rk_nand *rknand)
 	return 0;
 }
 
+#ifdef CONFIG_NAND_ROCKCHIP_DT
+static const struct udevice_id rockchip_nandc_ids[] = {
+	{ .compatible = "rockchip,nandc" },
+	{ }
+};
+
+static int rockchip_nandc_probe(struct udevice *dev)
+{
+	const void *blob = gd->fdt_blob;
+	struct rk_nand *rknand = dev_get_priv(dev);
+	fdt_addr_t regs;
+	int ret = 0, node;
+
+	node = fdtdec_next_compatible(blob, 0, COMPAT_ROCKCHIP_NANDC);
+
+	rknand->dev = dev;
+
+	regs = dev_read_addr(dev);
+	if (regs == FDT_ADDR_T_NONE) {
+		debug("Nand address not found\n");
+		return ret;
+	}
+
+	rknand->regs = (void *)regs;
+
+	spin_lock_init(&rknand->controller.lock);
+	init_waitqueue_head(&rknand->controller.wq);
+
+	rockchip_nand_init(rknand);
+
+	ret = rockchip_nand_chips_init(node, rknand);
+	if (ret)
+		debug("Failed to init nand chips\n");
+
+	return ret;
+}
+
+static int rockchip_nandc_bind(struct udevice *udev)
+{
+	int ret = 0;
+
+#ifdef CONFIG_MTD_BLK
+	struct udevice *bdev;
+
+	ret = blk_create_devicef(udev, "mtd_blk", "blk", IF_TYPE_MTD,
+				 0, 512, 0, &bdev);
+	if (ret)
+		printf("Cannot create block device\n");
+#endif
+	return ret;
+}
+
+U_BOOT_DRIVER(rk_nandc_v9) = {
+	.name           = "rk_nandc_v9",
+	.id             = UCLASS_MTD,
+	.of_match       = rockchip_nandc_ids,
+	.bind		= rockchip_nandc_bind,
+	.probe          = rockchip_nandc_probe,
+	.priv_auto_alloc_size = sizeof(struct rk_nand),
+};
+
+void board_nand_init(void)
+{
+	struct udevice *dev;
+	int ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_MTD,
+					  DM_GET_DRIVER(rk_nandc_v9),
+					  &dev);
+	if (ret && ret != -ENODEV)
+		pr_err("Failed to initialize NAND controller. (error %d)\n",
+		       ret);
+}
+#else
+
 void board_nand_init(void)
 {
 	const void *blob = gd->fdt_blob;
@@ -679,6 +760,8 @@ err:
 	kfree(rknand);
 }
 
+#endif
+
 int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst)
 {
 	struct mtd_info *mtd;

commit 124f23c66ca2d71c2633c5b6b879e863832c9219
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 5 11:21:55 2019 +0800

    rockchip: board: fixup "ramdisk_addr_r" when bl32 is enlarged
    
    Only when ramdisk addr is overlap with bl32 region works.
    
    Change-Id: Ie5f4bce4f60b22cf58f0c07b9151550193a6150d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 9328a9f114..187d4cd730 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -326,7 +326,11 @@ int init_kernel_dtb(void)
 
 void board_env_fixup(void)
 {
+	struct memblock mem;
+	ulong u_addr_r;
+	phys_size_t end;
 	char *addr_r;
+
 #ifdef ENV_MEM_LAYOUT_SETTINGS1
 	const char *env_addr0[] = {
 		"scriptaddr", "pxefile_addr_r",
@@ -353,6 +357,13 @@ void board_env_fixup(void)
 		addr_r = env_get("kernel_addr_no_bl32_r");
 		if (addr_r)
 			env_set("kernel_addr_r", addr_r);
+	/* If bl32 is enlarged, we move ramdisk addr right behind it */
+	} else {
+		mem = param_parse_optee_mem();
+		end = mem.base + mem.size;
+		u_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0);
+		if (u_addr_r >= mem.base && u_addr_r < end)
+			env_set_hex("ramdisk_addr_r", end);
 	}
 }
 

commit cd2cb2c22ff0f5e3251e605e99c68936da9db942
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 3 18:22:53 2019 +0800

    common: fdt_support: add hotkey initcall debug
    
    Change-Id: Iafb024773c6dc6e744c2d669bcfa4a8567f34e45
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/fdt_support.c b/common/fdt_support.c
index 28caaf0d51..4b8641d48c 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -17,6 +17,7 @@
 #include <fdt_support.h>
 #include <exports.h>
 #include <fdtdec.h>
+#include <asm/arch/hotkey.h>
 
 /**
  * fdt_getprop_u32_default_node - Return a node's property or a default
@@ -312,6 +313,7 @@ int fdt_chosen(void *fdt)
 				 * high priority system to boot and add its UUID
 				 * to cmdline. The format is "roo=PARTUUID=xxxx...".
 				 */
+				hotkey_run(HK_INITCALL);
 #ifdef CONFIG_ANDROID_AB
 				env_update_filter("bootargs", bootargs, "root=");
 #else

commit 15c8c8db16fc1a3f4bea0a5f8d8b7ab32c1119fb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 3 18:22:40 2019 +0800

    rockchip: board: add hotkey dump cmdline
    
    Change-Id: Ifbb61ae429462e037a23682077a5367da511869c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 2076dce73d..9328a9f114 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -368,6 +368,9 @@ static void early_download_init(void)
 		return;
 
 	gd->console_evt = getc();
+	if (gd->console_evt <= 0x1a) /* 'z' */
+		printf("Hotkey: ctrl+%c\n", (gd->console_evt + 'a' - 1));
+
 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0)
 	/* ctrl+b */
 	if (is_hotkey(HK_BROM_DNL)) {
@@ -563,6 +566,8 @@ int board_initr_caches_fixup(void)
 
 void board_quiesce_devices(void)
 {
+	hotkey_run(HK_CMDLINE);
+
 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
 	/* Destroy atags makes next warm boot safer */
 	atags_destroy();

commit 866ecb69e8cb1422418857074bb11e13d5c32160
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 3 18:18:17 2019 +0800

    rockchip: hotkey: add ctrl+i and ctrl+p
    
    ctrl+i: enable initcall debug;
    ctrl+p: dump cmdline;
    
    Change-Id: Ie31f67a2a3fcb87c4057d56b62fbc1cc59397b86
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/hotkey.h b/arch/arm/include/asm/arch-rockchip/hotkey.h
index 3559e71904..cd2764612a 100644
--- a/arch/arm/include/asm/arch-rockchip/hotkey.h
+++ b/arch/arm/include/asm/arch-rockchip/hotkey.h
@@ -9,7 +9,9 @@
 enum hotkey_t {
 	HK_INVAL,
 	HK_BROM_DNL,
+	HK_CMDLINE,
 	HK_FASTBOOT,
+	HK_INITCALL,
 	HK_ROCKUSB_DNL,
 	HK_SYSMEM,
 };
diff --git a/arch/arm/mach-rockchip/hotkey.c b/arch/arm/mach-rockchip/hotkey.c
index cc5f3845dd..478c9f9e19 100644
--- a/arch/arm/mach-rockchip/hotkey.c
+++ b/arch/arm/mach-rockchip/hotkey.c
@@ -14,15 +14,21 @@ DECLARE_GLOBAL_DATA_PTR;
 #define CTRL_B		0x02
 #define CTRL_D		0x04
 #define CTRL_F		0x06
+#define CTRL_I		0x09
 #define CTRL_M		0x0d
+#define CTRL_P		0x10
 
 bool is_hotkey(enum hotkey_t id)
 {
 	switch (id) {
 	case HK_BROM_DNL:
 		return gd->console_evt == CTRL_B;
+	case HK_CMDLINE:
+		return gd->console_evt == CTRL_P;
 	case HK_FASTBOOT:
 		return gd->console_evt == CTRL_F;
+	case HK_INITCALL:
+		return gd->console_evt == CTRL_I;
 	case HK_ROCKUSB_DNL:
 		return gd->console_evt == CTRL_D;
 	case HK_SYSMEM:
@@ -43,6 +49,14 @@ void hotkey_run(enum hotkey_t id)
 			sysmem_dump();
 		}
 		break;
+	case HK_CMDLINE:
+		if (gd->console_evt == CTRL_P)
+			printf("cmdline: %s\n", env_get("bootargs"));
+		break;
+	case HK_INITCALL:
+		if (gd->console_evt == CTRL_I)
+			env_update("bootargs", "initcall_debug debug");
+		break;
 	default:
 		break;
 	}

commit 7397b9613e8a1b18d0ed3f29f5c26d15d8e77df0
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu May 30 18:09:48 2019 +0800

    rockchip: board: add pwrkey download mode init
    
    Change-Id: I105cf370c69a2bd60c553623e8256862e8459d0c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index bd6634a0e8..2076dce73d 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -9,6 +9,7 @@
 #include <bidram.h>
 #include <dm.h>
 #include <debug_uart.h>
+#include <key.h>
 #include <memblk.h>
 #include <ram.h>
 #include <syscon.h>
@@ -355,8 +356,14 @@ void board_env_fixup(void)
 	}
 }
 
-static void early_bootrom_download(void)
+static void early_download_init(void)
 {
+#if defined(CONFIG_PWRKEY_DNL_TRIGGER_NUM) && \
+		(CONFIG_PWRKEY_DNL_TRIGGER_NUM > 0)
+	if (pwrkey_download_init())
+		printf("Pwrkey download init failed\n");
+#endif
+
 	if (!tstc())
 		return;
 
@@ -378,11 +385,12 @@ int board_init(void)
 	int ret;
 
 	board_debug_uart_init();
-	early_bootrom_download();
 
 #ifdef CONFIG_USING_KERNEL_DTB
 	init_kernel_dtb();
 #endif
+	early_download_init();
+
 	/*
 	 * pmucru isn't referenced on some platforms, so pmucru driver can't
 	 * probe that the "assigned-clocks" is unused.

commit 1a9c8b1b4c273c620c56503a6a59992b6207dcbb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 11 10:25:01 2019 +0800

    dm: key: add pwrkey download support
    
    User can press and release pwrkey for times to enter download mode,
    set it disabled by default.
    
    Change-Id: Id2fd9d12756bb1584a4d25b6df0c16a8a85d1e9a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig
index e49f23c2d2..8a70723626 100644
--- a/drivers/input/Kconfig
+++ b/drivers/input/Kconfig
@@ -68,3 +68,11 @@ config RK_KEY
 	depends on DM_KEY
 	help
 	  This adds a driver for the rk keys support.
+
+config PWRKEY_DNL_TRIGGER_NUM
+	int "Enter download mode by pwrkey trigger count"
+	default 0
+	depends on DM_KEY && IRQ
+	help
+	  This support enter download mode by press and release pwrkey for times
+	  over the trigger count. The default value 0 means disabled.
diff --git a/drivers/input/key-uclass.c b/drivers/input/key-uclass.c
index 6e3c8ad882..5c74ca1c6a 100644
--- a/drivers/input/key-uclass.c
+++ b/drivers/input/key-uclass.c
@@ -163,6 +163,31 @@ try_again:
 }
 
 #ifdef CONFIG_IRQ
+#if defined(CONFIG_PWRKEY_DNL_TRIGGER_NUM) && \
+		(CONFIG_PWRKEY_DNL_TRIGGER_NUM > 0)
+static void power_key_download(struct dm_key_uclass_platdata *uc_key)
+{
+	int trig_cnt = CONFIG_PWRKEY_DNL_TRIGGER_NUM;
+	static u64 old_rise_ms;
+
+	if (uc_key->code == KEY_POWER && old_rise_ms != uc_key->rise_ms) {
+		old_rise_ms = uc_key->rise_ms;
+		uc_key->trig_cnt++;
+		if (uc_key->trig_cnt >= trig_cnt) {
+			printf("\nEnter download mode by pwrkey\n");
+			irq_handler_disable(uc_key->irq);
+			run_command("rockusb 0 $devtype $devnum", 0);
+			run_command("rbrom", 0);
+		}
+	}
+}
+
+int pwrkey_download_init(void)
+{
+	return (KEY_NOT_EXIST == key_read(KEY_POWER));
+}
+#endif
+
 static void gpio_irq_handler(int irq, void *data)
 {
 	struct udevice *dev = data;
@@ -188,6 +213,12 @@ static void gpio_irq_handler(int irq, void *data)
 		mdelay(10);
 		irq_revert_irq_type(irq);
 	}
+
+	/* Hook event: enter download mode by pwrkey */
+#if defined(CONFIG_PWRKEY_DNL_TRIGGER_NUM) && \
+		(CONFIG_PWRKEY_DNL_TRIGGER_NUM > 0)
+	power_key_download(uc_key);
+#endif
 }
 #endif
 
diff --git a/include/key.h b/include/key.h
index b50593b89e..ad7bc1ad49 100644
--- a/include/key.h
+++ b/include/key.h
@@ -45,6 +45,8 @@ struct dm_key_uclass_platdata {
 	u64 rise_ms;
 	u64 fall_ms;
 
+	u32 trig_cnt;
+
 	/* Only for pwrkey gpio irq */
 	void (*irq_thread)(int irq, struct udevice *dev);
 };
@@ -55,6 +57,9 @@ uint64_t key_timer(uint64_t base);
 /* Confirm if your key value is a press event */
 int key_is_pressed(int keyval);
 
+/* Pwrkey download mode init */
+int pwrkey_download_init(void);
+
 /* Read key */
 int key_read(int code);
 

commit 868ca499ba61688f51d6674cadde7a729f385634
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 11 10:21:56 2019 +0800

    input: rk8xx_pwrkey: register irq thread into key framework
    
    Change-Id: Idbc90a55af76001afba218c7cfe0eb750dd24629
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/rk8xx_pwrkey.c b/drivers/input/rk8xx_pwrkey.c
index 14fe5bce3f..6294aa88b4 100644
--- a/drivers/input/rk8xx_pwrkey.c
+++ b/drivers/input/rk8xx_pwrkey.c
@@ -101,9 +101,8 @@ static struct reg_data rk805_init_reg[] = {
 	{ RK805_INT_STS_REG, 0xff },
 };
 
-static void pwrkey_irq_handler(int irq, void *data)
+static void pwrkey_irq_handler(int irq, struct udevice *dev)
 {
-	struct udevice *dev = data;
 	struct rk8xx_key_priv *priv = dev_get_priv(dev);
 	struct dm_key_uclass_platdata *uc_key = dev_get_uclass_platdata(dev);
 	int ret, val, i;
@@ -164,7 +163,7 @@ static int pwrkey_interrupt_init(struct udevice *dev)
 {
 	struct dm_key_uclass_platdata *uc_key = dev_get_uclass_platdata(dev);
 	u32 interrupt[2], phandle;
-	int irq, ret;
+	int ret;
 
 	phandle = dev_read_u32_default(dev->parent, "interrupt-parent", -1);
 	if (phandle < 0) {
@@ -181,15 +180,9 @@ static int pwrkey_interrupt_init(struct udevice *dev)
 	uc_key->name = "rk8xx_pwr";
 	uc_key->type = GPIO_KEY;
 	uc_key->code = KEY_POWER;
-	irq = phandle_gpio_to_irq(phandle, interrupt[0]);
-	if (irq < 0) {
-		printf("%s: request irq failed, ret=%d\n", uc_key->name, irq);
-		return irq;
-	}
-	uc_key->irq = irq;
-	irq_install_handler(irq, pwrkey_irq_handler, dev);
-	irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);
-	irq_handler_enable(irq);
+	uc_key->gpios[0] = phandle;
+	uc_key->gpios[1] = interrupt[0];
+	uc_key->irq_thread = pwrkey_irq_handler;
 
 	return 0;
 }

commit c2e7a0d48362ac5b8288265bb0bcebd6dc80e187
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 11 10:15:38 2019 +0800

    dm: key: add irq thread for key drivers
    
    - only power key can request irq thread;
    - this makes key framework be able to manage all key interrupt event;
    
    Change-Id: I9f99607ed7ff9bcd261d3918150e4a4489e0f472
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/key-uclass.c b/drivers/input/key-uclass.c
index 1a370a5fa9..6e3c8ad882 100644
--- a/drivers/input/key-uclass.c
+++ b/drivers/input/key-uclass.c
@@ -165,22 +165,29 @@ try_again:
 #ifdef CONFIG_IRQ
 static void gpio_irq_handler(int irq, void *data)
 {
-	struct dm_key_uclass_platdata *uc_key = data;
+	struct udevice *dev = data;
+	struct dm_key_uclass_platdata *uc_key = dev_get_uclass_platdata(dev);
 
 	if (uc_key->irq != irq)
 		return;
 
-	if (irq_get_gpio_level(irq)) {
-		uc_key->rise_ms = key_timer(0);
-		KEY_DBG("%s: key dn: %llu ms\n", uc_key->name, uc_key->fall_ms);
+	if (uc_key->irq_thread) {
+		uc_key->irq_thread(irq, data);
 	} else {
-		uc_key->fall_ms = key_timer(0);
-		KEY_DBG("%s: key up: %llu ms\n", uc_key->name, uc_key->rise_ms);
-	}
+		if (irq_get_gpio_level(irq)) {
+			uc_key->rise_ms = key_timer(0);
+			KEY_DBG("%s: key dn: %llu ms\n",
+				uc_key->name, uc_key->fall_ms);
+		} else {
+			uc_key->fall_ms = key_timer(0);
+			KEY_DBG("%s: key up: %llu ms\n",
+				uc_key->name, uc_key->rise_ms);
+		}
 
-	/* Must delay */
-	mdelay(10);
-	irq_revert_irq_type(irq);
+		/* Must delay */
+		mdelay(10);
+		irq_revert_irq_type(irq);
+	}
 }
 #endif
 
@@ -233,9 +240,6 @@ static int key_post_probe(struct udevice *dev)
 					uc_key->adcval - margin : 0;
 	} else {
 		if (uc_key->code == KEY_POWER) {
-			/* The gpio irq has been setup by key driver */
-			if (uc_key->irq)
-				goto finish;
 #ifdef CONFIG_IRQ
 			int irq;
 
@@ -247,8 +251,14 @@ static int key_post_probe(struct udevice *dev)
 				return irq;
 			}
 
+			if (uc_key->code != KEY_POWER && uc_key->irq_thread) {
+				KEY_WARN("%s: only power key can request irq thread\n",
+					 uc_key->name);
+				return -EINVAL;
+			}
+
 			uc_key->irq = irq;
-			irq_install_handler(irq, gpio_irq_handler, uc_key);
+			irq_install_handler(irq, gpio_irq_handler, dev);
 			irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);
 			irq_handler_enable(irq);
 #else
@@ -265,7 +275,6 @@ static int key_post_probe(struct udevice *dev)
 		}
 	}
 
-finish:
 #ifdef DEBUG
 	printf("[%s] (%s, %s, %s):\n", uc_key->name,
 	       uc_key->type == ADC_KEY ? "ADC" : "GPIO",
diff --git a/include/key.h b/include/key.h
index c9e11bd874..b50593b89e 100644
--- a/include/key.h
+++ b/include/key.h
@@ -39,11 +39,14 @@ struct dm_key_uclass_platdata {
 
 	/* GPIO key */
 	u32 irq;
-	u32 gpios[2];
+	u32 gpios[2];	/* gpios[0]: gpio controller phandle, gpios[1]: pin */
 	struct gpio_desc gpio;
 
 	u64 rise_ms;
 	u64 fall_ms;
+
+	/* Only for pwrkey gpio irq */
+	void (*irq_thread)(int irq, struct udevice *dev);
 };
 
 /* Use it instead of get_timer() in key interrupt handler */

commit 176ca189929c8f9306ef7163b186f679b4577d2b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 17 17:31:32 2019 +0800

    configs: rk3308: enable stack relocate
    
    Clean up defconfig by make savedefconfig.
    
    Change-Id: I8e70413fce92bfa14bf6c12902f09f4b405800f7
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index f01e80bc6a..d06e0978ba 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -13,6 +13,7 @@ CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_TARGET_EVB_RK3308=y
+CONFIG_SPL_STACK_R_ADDR=0xc00000
 CONFIG_DEFAULT_DEVICE_TREE="rk3308-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_ANDROID_BOOT_IMAGE=y
@@ -24,6 +25,7 @@ CONFIG_BOOTDELAY=0
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_SPL_STACK_R=y
 # CONFIG_SPL_SKIP_RELOCATE is not set
 CONFIG_SPL_RELOC_TEXT_BASE=0x3001000
 CONFIG_SPL_ATF=y
@@ -62,11 +64,11 @@ CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_PHY=y
-CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
 CONFIG_REGULATOR_PWM=y
diff --git a/configs/rk3308_defconfig b/configs/rk3308_defconfig
index c1bffce56f..e0c6888218 100644
--- a/configs/rk3308_defconfig
+++ b/configs/rk3308_defconfig
@@ -12,6 +12,7 @@ CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_TARGET_EVB_RK3308=y
+CONFIG_SPL_STACK_R_ADDR=0xc00000
 CONFIG_DEFAULT_DEVICE_TREE="rk3308-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_ANDROID_BOOT_IMAGE=y
@@ -23,10 +24,11 @@ CONFIG_BOOTDELAY=0
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
-CONFIG_SPL_ATF=y
-CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_SPL_STACK_R=y
 # CONFIG_SPL_SKIP_RELOCATE is not set
 CONFIG_SPL_RELOC_TEXT_BASE=0x3001000
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
 # CONFIG_FASTBOOT is not set
 # CONFIG_CMD_BDI is not set

commit 0a7b5ce23b1a28dacec37c908ae70e36d2eae4b7
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Jun 11 09:01:30 2019 +0800

    common: rkimg: add "androidboot.storagemedia" variable to cmdline
    
    1. "storagemedia": This is a legacy variable to indicate board
       storage media for kernel and android.
    
    2. "androidboot.storagemedia": The same purpose as "storagemedia",
       but the android framework will auto create property by
       variable with format "androidboot.xxx", eg:
    
       "androidboot.storagemedia" => "ro.boot.storagemedia".
    
       So, U-Boot pass this new variable is only for the convenience
       to Android.
    
    Change-Id: I59fc7156c15e4eb925c7d5e7a0bc9b07e4f223da
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 32234ca625..57e590686a 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -230,13 +230,28 @@ int get_bootdev_type(void)
 				 "storagemedia=%s androidboot.mode=%s",
 				 boot_media, boot_media);
 #else
+		/*
+		 * 1. "storagemedia": This is a legacy variable to indicate board
+		 *    storage media for kernel and android.
+		 *
+		 * 2. "androidboot.storagemedia": The same purpose as "storagemedia",
+		 *    but the android framework will auto create property by
+		 *    variable with format "androidboot.xxx", eg:
+		 *
+		 *    "androidboot.storagemedia" => "ro.boot.storagemedia".
+		 *
+		 *    So, U-Boot pass this new variable is only for the convenience
+		 *    to Android.
+		 */
 		if (env_exist("bootargs", "androidboot.mode=charger"))
 			snprintf(boot_options, sizeof(boot_options),
-				 "storagemedia=%s", boot_media);
+				 "storagemedia=%s androidboot.storagemedia=%s",
+				 boot_media, boot_media);
 		else
 			snprintf(boot_options, sizeof(boot_options),
-				 "storagemedia=%s androidboot.mode=normal",
-				 boot_media);
+				 "storagemedia=%s androidboot.storagemedia=%s "
+				 "androidboot.mode=normal ",
+				 boot_media, boot_media);
 #endif
 		env_update("bootargs", boot_options);
 	}

commit 8d5781e9e3634084fe958269075427678a85cd8c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 17 09:58:45 2019 +0800

    arm: lib: crt0_64: spl enables sctlr_el3 A/SA/I bits
    
    A:  Alignment check enable;
    I:  Instruction cache enable;
    SA: Stack Alignment Check Enable;
    
    Change-Id: Ic2a25dd23bc586540e177ea7e7927c24074180cc
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/lib/crt0_64.S b/arch/arm/lib/crt0_64.S
index c29ba899c7..8ed3087ed1 100644
--- a/arch/arm/lib/crt0_64.S
+++ b/arch/arm/lib/crt0_64.S
@@ -65,7 +65,7 @@
  */
 
 ENTRY(_main)
-#if defined(CONFIG_SPL_BUILD) && defined(DEBUG)
+#if defined(CONFIG_SPL_BUILD)
 	.equ SCTLR_A_BIT,		(1 << 1)
 	.equ SCTLR_SA_BIT,		(1 << 3)
 	.equ SCTLR_I_BIT,		(1 << 12)

commit 9d985d6e9311026de0e5717d92b505f8b6ca5a90
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jun 14 19:14:39 2019 +0800

    power: fg_cw201x: add capability callback
    
    This is only a fuel gauge IC.
    
    Change-Id: I003dee494aa89b388f5ef68381ce16227d7f9c65
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_cw201x.c b/drivers/power/fuel_gauge/fg_cw201x.c
index eb14c116f0..83bf41c6e5 100755
--- a/drivers/power/fuel_gauge/fg_cw201x.c
+++ b/drivers/power/fuel_gauge/fg_cw201x.c
@@ -301,7 +301,13 @@ static bool cw201x_update_get_chrg_online(struct udevice *dev)
 	return cw201x_check_charge(cw201x);
 }
 
+static int cw201x_capability(struct udevice *dev)
+{
+	return FG_CAP_FUEL_GAUGE;
+}
+
 static struct dm_fuel_gauge_ops cw201x_fg_ops = {
+	.capability = cw201x_capability,
 	.get_soc = cw201x_update_get_soc,
 	.get_voltage = cw201x_update_get_voltage,
 	.get_chrg_online = cw201x_update_get_chrg_online,

commit 8d8025afc0ea5636f688ba782ad9d4a9bc2c13de
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jun 14 18:52:12 2019 +0800

    common: rkimg: print MMC speed and mode
    
    refer to: print_mmcinfo() in ./cmd/mmc.c
    
    Change-Id: I652132417e7df96b3a286f6ceeb66e60150b435b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index afab6b26a0..32234ca625 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <bootm.h>
+#include <mmc.h>
 #include <linux/list.h>
 #include <linux/libfdt.h>
 #include <malloc.h>
@@ -262,6 +263,20 @@ struct blk_desc *rockchip_get_bootdev(void)
 		return NULL;
 	}
 
+#ifdef CONFIG_MMC
+	if (dev_type == IF_TYPE_MMC) {
+		struct mmc *mmc;
+		const char *timing[] = {
+			"Legacy", "High Speed", "High Speed", "SDR12",
+			"SDR25", "SDR50", "SDR104", "DDR50",
+			"DDR52", "HS200", "HS400", "HS400 Enhanced Strobe"};
+
+		mmc = find_mmc_device(devnum);
+		printf("MMC%d: %s, %dMhz\n", devnum,
+		        timing[mmc->timing], mmc->clock / 1000000);
+	}
+#endif
+
 	printf("PartType: %s\n", part_get_type(dev_desc));
 
 	return dev_desc;

commit fa93589458811662487b885185429af40a68c801
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Fri Jun 14 10:45:32 2019 +0800

    rockchip: configs: rk3308: add nand flash sys config
    
    Change-Id: I6d2363b4e79a216fde4ace26f1eccb29767a5ac0
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h
index 98cceefdd8..72b3c9895a 100644
--- a/include/configs/rk3308_common.h
+++ b/include/configs/rk3308_common.h
@@ -12,7 +12,10 @@
 #define CONFIG_SYS_MALLOC_LEN		(10 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
-
+#define CONFIG_SYS_MAX_NAND_DEVICE	1
+#define CONFIG_SYS_NAND_PAGE_SIZE	2048
+#define CONFIG_SYS_NAND_PAGE_COUNT	64
+#define CONFIG_SYS_NAND_SIZE		(64 * 1024)
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_TEXT_BASE		0x00000000
 #define CONFIG_SPL_MAX_SIZE		0x20000

commit 332967ae48c1da1f36b0154dd3d30956c1402cf0
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Fri Jun 14 14:31:45 2019 +0800

    common: spl: nand: support load rockchip images
    
    Change-Id: Idd71eda22b4aabde695d69fbd06c0a3fdb554495
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/spl-boot-order.c b/arch/arm/mach-rockchip/spl-boot-order.c
index c00a68a9fa..6720ba2527 100644
--- a/arch/arm/mach-rockchip/spl-boot-order.c
+++ b/arch/arm/mach-rockchip/spl-boot-order.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <dm.h>
 #include <mmc.h>
+#include <nand.h>
 #include <spl.h>
 
 #if CONFIG_IS_ENABLED(OF_CONTROL) && ! CONFIG_IS_ENABLED(OF_PLATDATA)
@@ -33,6 +34,11 @@ static int spl_node_to_boot_device(int node)
 {
 	struct udevice *parent;
 
+#ifdef CONFIG_SPL_NAND_SUPPORT
+	if (!rk_nand_init())
+		return BOOT_DEVICE_NAND;
+#endif
+
 	/*
 	 * This should eventually move into the SPL code, once SPL becomes
 	 * aware of the block-device layer.  Until then (and to avoid unneeded
diff --git a/common/spl/spl_nand.c b/common/spl/spl_nand.c
index d075985374..4ca363a822 100644
--- a/common/spl/spl_nand.c
+++ b/common/spl/spl_nand.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <config.h>
 #include <spl.h>
+#include <spl_rkfw.h>
 #include <asm/io.h>
 #include <nand.h>
 #include <linux/libfdt_env.h>
@@ -40,11 +41,42 @@ static ulong spl_nand_fit_read(struct spl_load_info *load, ulong offs,
 		return 0;
 }
 
+#ifdef CONFIG_SPL_LOAD_RKFW
+static ulong spl_nand_rkfw_read(struct spl_load_info *load, ulong offs,
+				ulong size, void *dst)
+{
+	int ret;
+
+	ret = nand_spl_load_image(offs * 512, size * 512, dst);
+	if (!ret)
+		return size;
+	else
+		return 0;
+}
+#endif
+
 static int spl_nand_load_element(struct spl_image_info *spl_image,
 				 int offset, struct image_header *header)
 {
 	int err;
 
+#ifdef CONFIG_SPL_LOAD_RKFW
+	struct spl_load_info load;
+	int ret;
+
+	load.dev = NULL;
+	load.priv = NULL;
+	load.filename = NULL;
+	load.bl_len = 1;
+	load.read = spl_nand_rkfw_read;
+
+	ret = spl_load_rkfw_image(spl_image, &load,
+				  CONFIG_RKFW_TRUST_SECTOR,
+				  CONFIG_RKFW_U_BOOT_SECTOR);
+	if (!ret || ret != -EAGAIN)
+		return ret;
+#endif
+
 	err = nand_spl_load_image(offset, sizeof(*header), (void *)header);
 	if (err)
 		return err;

commit dedb7deff0f4658fee6123890dd9476a40563a15
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Fri Jun 14 10:40:21 2019 +0800

    drivers: mtd: nand: add nand driver for spl
    
    Change-Id: Ic4cd26fb670eaef7778caf045bb4be3ce89ebf29
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index de8675d227..ffc6f42fb7 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -77,6 +77,7 @@ obj-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_spl.o
 obj-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_spl.o
 obj-$(CONFIG_NAND_MXC) += mxc_nand_spl.o
 obj-$(CONFIG_NAND_MXS) += mxs_nand_spl.o mxs_nand.o
+obj-$(CONFIG_NAND_ROCKCHIP) += rockchip_nand_spl.o
 obj-$(CONFIG_NAND_SUNXI) += sunxi_nand_spl.o
 
 endif # drivers
diff --git a/drivers/mtd/nand/rockchip_nand_spl.c b/drivers/mtd/nand/rockchip_nand_spl.c
new file mode 100644
index 0000000000..7559c593ac
--- /dev/null
+++ b/drivers/mtd/nand/rockchip_nand_spl.c
@@ -0,0 +1,348 @@
+/*
+ * Copyright (c) 2017 Yifeng Zhao <yifeng.zhao@rock-chips.com>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <fdtdec.h>
+#include <inttypes.h>
+#include <nand.h>
+#include <linux/kernel.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/partitions.h>
+#include <linux/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define NANDC_V6_BOOTROM_ECC	24
+#define NANDC_V6_NUM_BANKS	4
+#define NANDC_V6_DEF_TIMEOUT	20000
+#define NANDC_V6_READ		0
+#define NANDC_V6_WRITE		1
+
+#define	NANDC_REG_V6_FMCTL	0x00
+#define	NANDC_REG_V6_FMWAIT	0x04
+#define	NANDC_REG_V6_FLCTL	0x08
+#define	NANDC_REG_V6_BCHCTL	0x0c
+#define	NANDC_REG_V6_DMA_CFG	0x10
+#define	NANDC_REG_V6_DMA_BUF0	0x14
+#define	NANDC_REG_V6_DMA_BUF1	0x18
+#define	NANDC_REG_V6_DMA_ST	0x1C
+#define	NANDC_REG_V6_BCHST	0x20
+#define	NANDC_REG_V6_RANDMZ	0x150
+#define	NANDC_REG_V6_VER	0x160
+#define	NANDC_REG_V6_INTEN	0x16C
+#define	NANDC_REG_V6_INTCLR	0x170
+#define	NANDC_REG_V6_INTST	0x174
+#define	NANDC_REG_V6_SPARE0	0x200
+#define	NANDC_REG_V6_SPARE1	0x230
+#define	NANDC_REG_V6_BANK0	0x800
+#define	NANDC_REG_V6_SRAM0	0x1000
+#define	NANDC_REG_V6_SRAM_SIZE	0x400
+
+#define NANDC_REG_V6_DATA	0x00
+#define NANDC_REG_V6_ADDR	0x04
+#define NANDC_REG_V6_CMD	0x08
+
+/* FMCTL */
+#define NANDC_V6_FM_WP		BIT(8)
+#define NANDC_V6_FM_CE_SEL_M	0xFF
+#define NANDC_V6_FM_CE_SEL(x)	(1 << (x))
+#define NANDC_V6_FM_FREADY	BIT(9)
+
+/* FLCTL */
+#define NANDC_V6_FL_RST		BIT(0)
+#define NANDC_V6_FL_DIR_S	0x1
+#define NANDC_V6_FL_XFER_START	BIT(2)
+#define NANDC_V6_FL_XFER_EN	BIT(3)
+#define NANDC_V6_FL_ST_BUF_S	0x4
+#define NANDC_V6_FL_XFER_COUNT	BIT(5)
+#define NANDC_V6_FL_ACORRECT	BIT(10)
+#define NANDC_V6_FL_XFER_READY	BIT(20)
+
+/* BCHCTL */
+#define NAND_V6_BCH_REGION_S	0x5
+#define NAND_V6_BCH_REGION_M	0x7
+
+/* BCHST */
+#define NANDC_V6_BCH0_ST_ERR	BIT(2)
+#define NANDC_V6_BCH1_ST_ERR	BIT(15)
+#define NANDC_V6_ECC_ERR_CNT0(x) ((((x & (0x1F << 3)) >> 3) \
+				| ((x & (1 << 27)) >> 22)) & 0x3F)
+#define NANDC_V6_ECC_ERR_CNT1(x) ((((x & (0x1F << 16)) >> 16) \
+				| ((x & (1 << 29)) >> 24)) & 0x3F)
+
+struct rk_nand {
+	void __iomem *regs;
+	u8 chipnr;
+	u8 id[5];
+	u8 *databuf;
+};
+
+struct rk_nand *g_rk_nand;
+
+static void nandc_init(struct rk_nand *rknand)
+{
+	writel(0x1081, rknand->regs + NANDC_REG_V6_FMWAIT);
+}
+
+static void rockchip_nand_wait_dev_ready(void __iomem *regs)
+{
+	u32 reg;
+	u32 timeout = NANDC_V6_DEF_TIMEOUT;
+
+	while (timeout--) {
+		udelay(1);
+		reg = readl(regs + NANDC_REG_V6_FMCTL);
+
+		if ((reg & NANDC_V6_FM_FREADY))
+			break;
+	}
+}
+
+static void rockchip_nand_select_chip(void __iomem *regs, int chipnr)
+{
+	u32 reg;
+
+	reg = readl(regs + NANDC_REG_V6_FMCTL);
+	reg &= ~NANDC_V6_FM_CE_SEL_M;
+	if (chipnr != -1)
+		reg |= 1 << chipnr;
+	writel(reg, regs + NANDC_REG_V6_FMCTL);
+}
+
+static void rockchip_nand_read_page(void __iomem *regs,
+				    int page, int col)
+{
+	void __iomem *bank_base = regs + NANDC_REG_V6_BANK0;
+
+	writeb(0x00, bank_base + NANDC_REG_V6_CMD);
+	writeb(col, bank_base + NANDC_REG_V6_ADDR);
+	writeb(col >> 8, bank_base + NANDC_REG_V6_ADDR);
+	writeb(page, bank_base + NANDC_REG_V6_ADDR);
+	writeb(page >> 8, bank_base + NANDC_REG_V6_ADDR);
+	writeb(page >> 16, bank_base + NANDC_REG_V6_ADDR);
+	writeb(0x30, bank_base + NANDC_REG_V6_CMD);
+}
+
+static void rockchip_nand_pio_xfer_start(struct rk_nand *rknand,
+					 u8 dir,
+					 u8 st_buf)
+{
+	u32 reg;
+
+	reg = readl(rknand->regs + NANDC_REG_V6_BCHCTL);
+	reg = (reg & (~(NAND_V6_BCH_REGION_M << NAND_V6_BCH_REGION_S)));
+	writel(reg, rknand->regs + NANDC_REG_V6_BCHCTL);
+
+	reg = (dir << NANDC_V6_FL_DIR_S) | (st_buf << NANDC_V6_FL_ST_BUF_S) |
+		  NANDC_V6_FL_XFER_EN | NANDC_V6_FL_XFER_COUNT |
+		  NANDC_V6_FL_ACORRECT;
+	writel(reg, rknand->regs + NANDC_REG_V6_FLCTL);
+
+	reg |= NANDC_V6_FL_XFER_START;
+	writel(reg, rknand->regs + NANDC_REG_V6_FLCTL);
+}
+
+static int rockchip_nand_wait_pio_xfer_done(struct rk_nand *rknand)
+{
+	int timeout = NANDC_V6_DEF_TIMEOUT;
+	int reg;
+
+	while (timeout--) {
+		reg = readl(rknand->regs + NANDC_REG_V6_FLCTL);
+
+		if ((reg & NANDC_V6_FL_XFER_READY) != 0)
+			break;
+
+		udelay(1);
+	}
+
+	if (timeout == 0)
+		return -1;
+
+	return 0;
+}
+
+static int nandc_read_page(unsigned int page, uint8_t *buf)
+{
+	void __iomem *sram_base = g_rk_nand->regs + NANDC_REG_V6_SRAM0;
+	unsigned int max_bitflips = 0;
+	int ret, step, bch_st, ecc_step;
+
+	ecc_step = CONFIG_SYS_NAND_PAGE_SIZE / 1024;
+	rockchip_nand_select_chip(g_rk_nand->regs, 0);
+	rockchip_nand_read_page(g_rk_nand->regs, page, 0);
+	rockchip_nand_wait_dev_ready(g_rk_nand->regs);
+	rockchip_nand_pio_xfer_start(g_rk_nand, NANDC_V6_READ, 0);
+
+	for (step = 0; step < ecc_step; step++) {
+		int data_off = step * 1024;
+		u8 *data = buf + data_off;
+
+		ret = rockchip_nand_wait_pio_xfer_done(g_rk_nand);
+		if (ret)
+			return ret;
+
+		bch_st = readl(g_rk_nand->regs + NANDC_REG_V6_BCHST);
+
+		if (bch_st & NANDC_V6_BCH0_ST_ERR) {
+			max_bitflips = -1;
+		} else {
+			ret = NANDC_V6_ECC_ERR_CNT0(bch_st);
+			max_bitflips = max_t(unsigned int, max_bitflips, ret);
+		}
+
+		if ((step + 1) < ecc_step)
+			rockchip_nand_pio_xfer_start(g_rk_nand, NANDC_V6_READ,
+						     (step + 1) & 0x1);
+
+		memcpy_fromio(data, sram_base + NANDC_REG_V6_SRAM_SIZE *
+			      (step & 1), 1024);
+	}
+	rockchip_nand_select_chip(g_rk_nand->regs, -1);
+
+	return max_bitflips;
+}
+
+static int is_badblock(unsigned int page)
+{
+	int res = 0, i;
+	u16 bad = 0xff;
+	void __iomem *regs = g_rk_nand->regs;
+	void __iomem *bank_base = regs + NANDC_REG_V6_BANK0;
+
+	if (nandc_read_page(page, g_rk_nand->databuf) == -1) {
+		rockchip_nand_select_chip(regs, 0);
+		rockchip_nand_read_page(regs, page,
+					CONFIG_SYS_NAND_PAGE_SIZE);
+		rockchip_nand_wait_dev_ready(regs);
+		for (i = 0; i < 8; i++) {
+			bad = readb(bank_base);
+			if (bad)
+				break;
+		}
+		if (i >= 8)
+			res = 1;
+		rockchip_nand_select_chip(regs, 0);
+	}
+	if (res)
+		printf("%s 0x%x %x %x\n", __func__, page, res, bad);
+	return res;
+}
+
+static void read_flash_id(struct rk_nand *rknand, uint8_t *id)
+{
+	void __iomem *bank_base = rknand->regs + NANDC_REG_V6_BANK0;
+
+	rockchip_nand_wait_dev_ready(g_rk_nand->regs);
+	writeb(0x90, bank_base + NANDC_REG_V6_CMD);
+	writeb(0x00, bank_base + NANDC_REG_V6_ADDR);
+	udelay(1);
+	id[0] = readb(bank_base);
+	id[1] = readb(bank_base);
+	id[2] = readb(bank_base);
+	id[3] = readb(bank_base);
+	id[4] = readb(bank_base);
+	rockchip_nand_select_chip(rknand->regs, -1);
+	printf("%s %x %x %x %x %x\n", __func__, id[0], id[1], id[2], id[3],
+	       id[4]);
+}
+
+void board_nand_init(void)
+{
+	const void *blob = gd->fdt_blob;
+	fdt_addr_t regs;
+	int node;
+
+	if (g_rk_nand)
+		return;
+
+	node = fdtdec_next_compatible(blob, 0, COMPAT_ROCKCHIP_NANDC);
+
+	if (node < 0) {
+		printf("Nand node not found\n");
+		goto err;
+	}
+
+	if (!fdtdec_get_is_enabled(blob, node)) {
+		debug("Nand disabled in device tree\n");
+		goto err;
+	}
+
+	regs = fdt_get_base_address(blob, node);
+	if (regs == FDT_ADDR_T_NONE) {
+		debug("Nand address not found\n");
+		goto err;
+	}
+
+	g_rk_nand = kzalloc(sizeof(*g_rk_nand), GFP_KERNEL);
+	g_rk_nand->regs = (void *)regs;
+	g_rk_nand->databuf = kzalloc(CONFIG_SYS_NAND_PAGE_SIZE, GFP_KERNEL);
+	nandc_init(g_rk_nand);
+	read_flash_id(g_rk_nand, g_rk_nand->id);
+	if (g_rk_nand->id[0] != 0xFF && g_rk_nand->id[1] != 0xFF &&
+	    g_rk_nand->id[0] != 0x00 && g_rk_nand->id[1] != 0x00)
+		g_rk_nand->chipnr = 1;
+	return;
+err:
+	kfree(g_rk_nand);
+}
+
+int nand_spl_load_image(u32 offs, u32 size, void *buf)
+{
+	int i;
+	unsigned int page;
+	unsigned int maxpages = CONFIG_SYS_NAND_SIZE /
+				CONFIG_SYS_NAND_PAGE_SIZE;
+
+	/* Convert to page number */
+	page = offs / CONFIG_SYS_NAND_PAGE_SIZE;
+	i = 0;
+
+	size = roundup(size, CONFIG_SYS_NAND_PAGE_SIZE);
+	while (i < size / CONFIG_SYS_NAND_PAGE_SIZE) {
+		/*
+		 * Check if we have crossed a block boundary, and if so
+		 * check for bad block.
+		 */
+		if (!(page % CONFIG_SYS_NAND_PAGE_COUNT)) {
+			/*
+			 * Yes, new block. See if this block is good. If not,
+			 * loop until we find a good block.
+			 */
+			while (is_badblock(page)) {
+				page = page + CONFIG_SYS_NAND_PAGE_COUNT;
+				/* Check i we've reached the end of flash. */
+				if (page >= maxpages)
+					return -EIO;
+			}
+		}
+
+		if (nandc_read_page(page, buf) < 0)
+			return -EIO;
+
+		page++;
+		i++;
+		buf = buf + CONFIG_SYS_NAND_PAGE_SIZE;
+	}
+	return 0;
+}
+
+void nand_init(void)
+{
+	board_nand_init();
+}
+
+int rk_nand_init(void)
+{
+	board_nand_init();
+	if (g_rk_nand && g_rk_nand->chipnr)
+		return 0;
+	else
+		return -ENODEV;
+}
+
+void nand_deselect(void) {}
diff --git a/include/nand.h b/include/nand.h
index c1c1d8cce6..3279f43d9e 100644
--- a/include/nand.h
+++ b/include/nand.h
@@ -153,4 +153,7 @@ void sunxi_nand_init(void);
  */
 struct mtd_info *get_nand_dev_by_index(int dev);
 
+/* rockchip platform specific init functions */
+int rk_nand_init(void);
+
 #endif /* _NAND_H_ */

commit 19652be07ea78b9c5581d76ecf6fecd511d46eb0
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Thu Apr 11 16:05:31 2019 +0800

    gadget: rockusb: fix cmd exception for r/w vendor storage
    
    It should be marked sense_data error when r/w vendor storage failed.
    
    Change-Id: I7e298d4f700ac3ca9648e973258cff521c41ec03
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index 39e0a30c3a..25900ce6b2 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -358,15 +358,19 @@ static int rkusb_do_vs_write(struct fsg_common *common)
 				rc = vendor_storage_write(vhead->id,
 							  (char __user *)data,
 							  vhead->size);
-				if (rc < 0)
+				if (rc < 0) {
+					curlun->sense_data = SS_WRITE_ERROR;
 					return -EIO;
+				}
 			} else {
 				/* RPMB */
 				rc =
 				write_keybox_to_secure_storage((u8 *)data,
 							       vhead->size);
-				if (rc < 0)
+				if (rc < 0) {
+					curlun->sense_data = SS_WRITE_ERROR;
 					return -EIO;
+				}
 			}
 
 			common->residue -= common->data_size;
@@ -427,16 +431,20 @@ static int rkusb_do_vs_read(struct fsg_common *common)
 			rc = vendor_storage_read(vhead->id,
 						 (char __user *)data,
 						 common->data_size);
-			if (!rc)
+			if (!rc) {
+				curlun->sense_data = SS_UNRECOVERED_READ_ERROR;
 				return -EIO;
+			}
 			vhead->size = rc;
 		} else {
 			/* RPMB */
 			rc =
 			read_raw_data_from_secure_storage((u8 *)data,
 							  common->data_size);
-			if (!rc)
+			if (!rc) {
+				curlun->sense_data = SS_UNRECOVERED_READ_ERROR;
 				return -EIO;
+			}
 			vhead->size = rc;
 		}
 

commit 3e45175eaebcaae3c7977e921790ee3587c8b97f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 3 14:13:38 2019 +0800

    rockchip: board: fixup cru phandle for all U-Boot node.
    
    There is a phandle miss match between U-Boot and kernel dtb node,
    the typical is cru phandle, we fixup it in all U-Boot live dt nodes
    which has property "clocks" or "assigned-clocks".
    
    Change-Id: Id5769195ad54a7ba1cc06ed5cfb68ebcddfd3382
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 4137b6998e..bd6634a0e8 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -17,6 +17,7 @@
 #include <asm/arch/vendor.h>
 #include <misc.h>
 #include <asm/gpio.h>
+#include <dm/uclass-internal.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/periph.h>
@@ -180,6 +181,110 @@ int board_late_init(void)
 #ifdef CONFIG_USING_KERNEL_DTB
 #include <asm/arch/resource_img.h>
 
+/* Here, only fixup cru phandle, pmucru is not included */
+static int phandles_fixup(void *fdt)
+{
+	const char *props[] = { "clocks", "assigned-clocks" };
+	struct udevice *dev;
+	struct uclass *uc;
+	const char *comp;
+	u32 id, nclocks;
+	u32 *clocks;
+	int phandle, ncells;
+	int off, offset;
+	int ret, length;
+	int i, j;
+	int first_phandle = -1;
+
+	phandle = -ENODATA;
+	ncells = -ENODATA;
+
+	/* fdt points to kernel dtb, getting cru phandle and "#clock-cells" */
+	for (offset = fdt_next_node(fdt, 0, NULL);
+	     offset >= 0;
+	     offset = fdt_next_node(fdt, offset, NULL)) {
+		comp = fdt_getprop(fdt, offset, "compatible", NULL);
+		if (!comp)
+			continue;
+
+		/* Actually, this is not a good method to get cru node */
+		off = strlen(comp) - strlen("-cru");
+		if (off > 0 && !strncmp(comp + off, "-cru", 4)) {
+			phandle = fdt_get_phandle(fdt, offset);
+			ncells = fdtdec_get_int(fdt, offset,
+						"#clock-cells", -ENODATA);
+			break;
+		}
+	}
+
+	if (phandle == -ENODATA || ncells == -ENODATA)
+		return 0;
+
+	debug("%s: target cru: clock-cells:%d, phandle:0x%x\n",
+	      __func__, ncells, fdt32_to_cpu(phandle));
+
+	/* Try to fixup all cru phandle from U-Boot dtb nodes */
+	for (id = 0; id < UCLASS_COUNT; id++) {
+		ret = uclass_get(id, &uc);
+		if (ret)
+			continue;
+
+		if (list_empty(&uc->dev_head))
+			continue;
+
+		list_for_each_entry(dev, &uc->dev_head, uclass_node) {
+			/* Only U-Boot node go further */
+			if (!dev_read_bool(dev, "u-boot,dm-pre-reloc"))
+				continue;
+
+			for (i = 0; i < ARRAY_SIZE(props); i++) {
+				if (!dev_read_prop(dev, props[i], &length))
+					continue;
+
+				clocks = malloc(length);
+				if (!clocks)
+					return -ENOMEM;
+
+				/* Read "props[]" which contains cru phandle */
+				nclocks = length / sizeof(u32);
+				if (dev_read_u32_array(dev, props[i],
+						       clocks, nclocks)) {
+					free(clocks);
+					continue;
+				}
+
+				/* Fixup with kernel cru phandle */
+				for (j = 0; j < nclocks; j += (ncells + 1)) {
+					/*
+					 * Check: update pmucru phandle with cru
+					 * phandle by mistake.
+					 */
+					if (first_phandle == -1)
+						first_phandle = clocks[j];
+
+					if (clocks[j] != first_phandle)
+						printf("WARN: %s: first cru phandle=%d, this=%d\n",
+						       dev_read_name(dev),
+						       first_phandle, clocks[j]);
+
+					clocks[j] = phandle;
+				}
+
+				/*
+				 * Override live dt nodes but not fdt nodes,
+				 * because all U-Boot nodes has been imported
+				 * to live dt nodes, should use "dev_xxx()".
+				 */
+				dev_write_u32_array(dev, props[i],
+						    clocks, nclocks);
+				free(clocks);
+			}
+		}
+	}
+
+	return 0;
+}
+
 int init_kernel_dtb(void)
 {
 	int ret = 0;
@@ -197,6 +302,12 @@ int init_kernel_dtb(void)
 		return 0;
 	}
 
+	/*
+	 * There is a phandle miss match between U-Boot and kernel dtb node,
+	 * the typical is cru phandle, we fixup it in U-Boot live dt nodes.
+	 */
+	phandles_fixup((void *)fdt_addr);
+
 	of_live_build((void *)fdt_addr, (struct device_node **)&gd->of_root);
 
 	dm_scan_fdt((void *)fdt_addr, false);

commit 04539b46d521a675e53806a7cc0164ad191203b0
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 3 12:55:59 2019 +0800

    dm: core: add function dev_write_u32_array() to write u32 array values
    
    Change-Id: I6633395c7704eefff59c2145562fe239e21f3b35
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/core/of_access.c b/drivers/core/of_access.c
index 863f6ecc47..cfaee4e4d6 100644
--- a/drivers/core/of_access.c
+++ b/drivers/core/of_access.c
@@ -485,6 +485,25 @@ int of_read_u32_array(const struct device_node *np, const char *propname,
 	return 0;
 }
 
+int of_write_u32_array(const struct device_node *np, const char *propname,
+		       u32 *values, size_t sz)
+{
+	__be32 *val;
+
+	debug("%s: %s: ", __func__, propname);
+	val = of_find_property_value_of_size(np, propname,
+					     sz * sizeof(*values));
+
+	if (IS_ERR(val))
+		return PTR_ERR(val);
+
+	debug("size %zd\n", sz);
+	while (sz--)
+		*val++ = cpu_to_be32p(values++);
+
+	return 0;
+}
+
 int of_property_match_string(const struct device_node *np, const char *propname,
 			     const char *string)
 {
diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index 3f51b6d74b..992dd573a2 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -160,6 +160,21 @@ int ofnode_read_u32_array(ofnode node, const char *propname,
 	}
 }
 
+int ofnode_write_u32_array(ofnode node, const char *propname,
+			   u32 *values, size_t sz)
+{
+	assert(ofnode_valid(node));
+	debug("%s: %s: ", __func__, propname);
+
+	if (ofnode_is_np(node)) {
+		return of_write_u32_array(ofnode_to_np(node), propname,
+					 values, sz);
+	} else {
+		return fdt_setprop((void *)gd->fdt_blob, ofnode_to_offset(node),
+				   propname, values, sz);
+	}
+}
+
 ofnode ofnode_first_subnode(ofnode node)
 {
 	assert(ofnode_valid(node));
diff --git a/drivers/core/read.c b/drivers/core/read.c
index 9f4d8c72c4..9b216726ac 100644
--- a/drivers/core/read.c
+++ b/drivers/core/read.c
@@ -175,6 +175,14 @@ int dev_read_u32_array(struct udevice *dev, const char *propname,
 	return ofnode_read_u32_array(dev_ofnode(dev), propname, out_values, sz);
 }
 
+int dev_write_u32_array(struct udevice *dev, const char *propname,
+			u32 *values, size_t sz)
+{
+	if (!dev_of_valid(dev))
+		return -EINVAL;
+	return ofnode_write_u32_array(dev_ofnode(dev), propname, values, sz);
+}
+
 const uint8_t *dev_read_u8_array_ptr(struct udevice *dev, const char *propname,
 				     size_t sz)
 {
diff --git a/include/dm/of_access.h b/include/dm/of_access.h
index 035f0c8d65..48baad5ef9 100644
--- a/include/dm/of_access.h
+++ b/include/dm/of_access.h
@@ -251,6 +251,22 @@ int of_property_read_u64(const struct device_node *np, const char *propname,
 int of_read_u32_array(const struct device_node *np, const char *propname,
 		      u32 *out_values, size_t sz);
 
+/**
+ * of_write_u32_array() - Find and write an array of 32 bit integers
+ *
+ * Search for a property in a device node and write 32-bit value(s) to
+ * it.
+ *
+ * @np:		device node from which the property value is to be read.
+ * @propname:	name of the property to be searched.
+ * @values:	pointer to update value, modified only if return value is 0.
+ * @sz:		number of array elements to read
+ * @return 0 on success, -EINVAL if the property does not exist, -ENODATA
+ * if property does not have a value, and -EOVERFLOW is longer than sz.
+ */
+int of_write_u32_array(const struct device_node *np, const char *propname,
+		       u32 *values, size_t sz);
+
 /**
  * of_property_match_string() - Find string in a list and return index
  *
diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index f90ce33ea9..8a4291a6ad 100644
--- a/include/dm/ofnode.h
+++ b/include/dm/ofnode.h
@@ -274,6 +274,19 @@ const char *ofnode_read_string(ofnode node, const char *propname);
 int ofnode_read_u32_array(ofnode node, const char *propname,
 			  u32 *out_values, size_t sz);
 
+/**
+ * ofnode_write_u32_array() - Find and write an array of 32 bit integers
+ *
+ * @node:	valid node reference to read property from
+ * @propname:	name of the property to read
+ * @values:	pointer to update value, modified only if return value is 0
+ * @sz:		number of array elements to read
+ * @return 0 on success, -EINVAL if the property does not exist, -ENODATA
+ * if property does not have a value, and -EOVERFLOW is longer than sz.
+ */
+int ofnode_write_u32_array(ofnode node, const char *propname,
+			   u32 *values, size_t sz);
+
 /**
  * ofnode_read_bool() - read a boolean value from a property
  *
diff --git a/include/dm/read.h b/include/dm/read.h
index 77c9ae6fcd..71b128ff10 100644
--- a/include/dm/read.h
+++ b/include/dm/read.h
@@ -341,6 +341,25 @@ int dev_read_alias_seq(struct udevice *dev, int *devnump);
 int dev_read_u32_array(struct udevice *dev, const char *propname,
 		       u32 *out_values, size_t sz);
 
+/**
+ * dev_write_u32_array() - Find and write an array of 32 bit integers
+ *
+ * Search for a property in a device node and write 32-bit value(s) to
+ * it.
+ *
+ * The out_values is modified only if a valid u32 value can be decoded.
+ *
+ * @dev: device to look up
+ * @propname:	name of the property to read
+ * @values:	pointer to update value, modified only if return value is 0
+ * @sz:		number of array elements to read
+ * @return 0 on success, -EINVAL if the property does not exist, -ENODATA if
+ * property does not have a value, and -EOVERFLOW if the property data isn't
+ * large enough.
+ */
+int dev_write_u32_array(struct udevice *dev, const char *propname,
+			u32 *values, size_t sz);
+
 /**
  * dev_read_first_subnode() - find the first subnode of a device's node
  *

commit 7b4692447bb0246e5b815fb821e3a6d728d96fa1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 31 09:55:12 2019 +0800

    common: rkimg: set download boot mode as the highest priority
    
    Anyway, we should promise the user can enter download mode by
    kernel command: reboot bootloader/loader/fastboot.
    
    Change-Id: I23181a2f672774070f93478a338622be622900a0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 56e18ba571..afab6b26a0 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -402,27 +402,29 @@ int rockchip_get_boot_mode(void)
 	}
 
 fallback:
-	/* Mode from misc partition */
-	if (bmsg && !strcmp(bmsg->command, "boot-recovery")) {
-		boot_mode = BOOT_MODE_RECOVERY;
+	/*
+	 * Boot mode priority
+	 *
+	 * Anyway, we should set download boot mode as the highest priority, so:
+	 *
+	 * reboot loader/bootloader/fastboot > misc partition "recovery" > reboot xxx.
+	 */
+	reg_boot_mode = readl((void *)CONFIG_ROCKCHIP_BOOT_MODE_REG);
+	if (reg_boot_mode == BOOT_LOADER) {
+		printf("boot mode: loader\n");
+		boot_mode = BOOT_MODE_LOADER;
+	} else if (reg_boot_mode == BOOT_FASTBOOT) {
+		printf("boot mode: bootloader\n");
+		boot_mode = BOOT_MODE_BOOTLOADER;
+	} else if (bmsg && !strcmp(bmsg->command, "boot-recovery")) {
 		printf("boot mode: recovery\n");
+		boot_mode = BOOT_MODE_RECOVERY;
 	} else {
-		/* Mode from boot mode register */
-		reg_boot_mode = readl((void *)CONFIG_ROCKCHIP_BOOT_MODE_REG);
-
 		switch (reg_boot_mode) {
 		case BOOT_NORMAL:
 			printf("boot mode: normal\n");
 			boot_mode = BOOT_MODE_NORMAL;
 			break;
-		case BOOT_FASTBOOT:
-			printf("boot mode: bootloader\n");
-			boot_mode = BOOT_MODE_BOOTLOADER;
-			break;
-		case BOOT_LOADER:
-			printf("boot mode: loader\n");
-			boot_mode = BOOT_MODE_LOADER;
-			break;
 		case BOOT_RECOVERY:
 			/* printf("boot mode: recovery\n"); */
 			boot_mode = BOOT_MODE_RECOVERY;

commit 224307fea301069b1dab2976ec10ddaa7c3399d2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jun 13 10:50:36 2019 +0800

    make.sh: fix "ls: cannot access *_loader_*.bin: No such file or directory"
    
    Change-Id: I46885f5a59a4ecfa25ad2ab95965732edbb722fe
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 8ea193ec10..a148e8863d 100755
--- a/make.sh
+++ b/make.sh
@@ -623,7 +623,7 @@ pack_loader_image()
 		return
 	fi
 
-	ls *_loader_*.bin >/dev/null && rm *_loader_*.bin
+	ls *_loader_*.bin >/dev/null 2>&1 && rm *_loader_*.bin
 	cd ${RKBIN}
 
 	if [ "${mode}" = 'all' ]; then

commit daa3bef505a406fa121901b85faddda2a2020cd8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 12 10:19:51 2019 +0800

    make.sh: support pack spl/tpl loader and u-boot.itb
    
    Usage:
            ./make.sh spl           --- pack tpl+spl
            ./make.sh spl-s         --- pack spl
            ./make.sh itb           --- pack u-boot.itb
    
    itb: Only support pack bl31 into u-boot.itb on 64-bit platform.
    
    Change-Id: I2279ec8c961208160c324a6ade8afe9b8f2713f8
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index fad2993f92..8ea193ec10 100755
--- a/make.sh
+++ b/make.sh
@@ -119,7 +119,7 @@ prepare()
 	else
 		case $BOARD in
 			# Parse from exit .config
-			''|elf*|loader*|debug*|trust*|uboot|map|sym)
+			''|elf*|loader*|spl*|itb|debug*|trust|uboot|map|sym)
 			count=`find -name .config | wc -l`
 			dir=`find -name .config`
 			# Good, find only one .config
@@ -159,7 +159,7 @@ prepare()
 		;;
 
 		#Subcmd
-		''|elf*|loader*|debug*|trust*|uboot|map|sym)
+		''|elf*|loader*|spl*|itb|debug*|trust*|uboot|map|sym)
 		;;
 
 		*)
@@ -270,6 +270,16 @@ sub_commands()
 		exit 0
 		;;
 
+		spl)
+		pack_spl_loader_image ${opt}
+		exit 0
+		;;
+
+		itb)
+		pack_uboot_itb_image
+		exit 0
+		;;
+
 		uboot)
 		pack_uboot_image ${opt}
 		exit 0
@@ -545,6 +555,65 @@ pack_uboot_image()
 	echo "pack uboot okay! Input: ${OUTDIR}/u-boot.bin"
 }
 
+pack_uboot_itb_image()
+{
+	local ini=${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST.ini
+
+	if [ ! -f ${ini} ]; then
+		echo "pack trust failed! Can't find: ${ini}"
+		return
+	fi
+
+	bl31=`sed -n '/_bl31_/s/PATH=//p' ${ini} |tr -d '\r'`
+
+	cp ${RKBIN}/${bl31} bl31.elf
+	make CROSS_COMPILE=${TOOLCHAIN_GCC} u-boot.itb
+
+	echo "pack u-boot.itb okay! Input: ${ini}"
+}
+
+pack_spl_loader_image()
+{
+	local header label="SPL" mode=$1
+	local ini=${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL.ini
+	local temp_ini=${RKBIN}/.temp/${RKCHIP_LOADER}MINIALL.ini
+
+	if [ ! -f ${ini} ]; then
+		echo "pack TPL+SPL loader failed! Can't find: ${ini}"
+		return
+	fi
+
+	# Copy to .temp folder
+	if [ -d ${RKBIN}/.temp ]; then
+		rm ${RKBIN}/.temp -rf
+	else
+		mkdir ${RKBIN}/.temp
+	fi
+	cp ${OUTDIR}/spl/u-boot-spl.bin ${RKBIN}/.temp/
+	cp ${OUTDIR}/tpl/u-boot-tpl.bin ${RKBIN}/.temp/
+	cp ${ini} ${RKBIN}/.temp/
+
+	cd ${RKBIN}
+	if [ "$mode" = 'spl' ]; then	# pack tpl+spl
+		# Update ini
+		label="TPL+SPL"
+		header=`sed -n '/NAME=/s/NAME=//p' ${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL.ini`
+		dd if=${RKBIN}/.temp/u-boot-tpl.bin of=${RKBIN}/.temp/tpl.bin bs=1 skip=4
+		sed -i "1s/^/${header:0:4}/" ${RKBIN}/.temp/tpl.bin
+		sed -i "s/FlashData=.*$/FlashData=.\/.temp\/tpl.bin/"     ${temp_ini}
+	fi
+
+	sed -i "s/FlashBoot=.*$/FlashBoot=.\/.temp\/u-boot-spl.bin/"  ${temp_ini}
+
+	${RKTOOLS}/boot_merger ${BIN_PATH_FIXUP} ${temp_ini}
+	rm ${RKBIN}/.temp -rf
+	cd -
+	ls *_loader_*.bin >/dev/null 2>&1 && rm *_loader_*.bin
+	mv ${RKBIN}/*_loader_*.bin ./
+	echo "pack loader(${label}) okay! Input: ${ini}"
+	ls ./*_loader_*.bin
+}
+
 pack_loader_image()
 {
 	local mode=$1 files ini=${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL.ini

commit 3e15af6d1a342c995b45265a71459c7b368b0715
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Tue Apr 30 10:23:37 2019 +0800

    rockchip: rk3308: enable spl relocation
    
    Relocate spl to a high address(48M + 4KB) to avoid
    overlap wit ATF.
    
    Change-Id: Iae767d7e5b18b24872d2a6975ef25b2146f05095
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index 537f68b408..f01e80bc6a 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -24,6 +24,8 @@ CONFIG_BOOTDELAY=0
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
+# CONFIG_SPL_SKIP_RELOCATE is not set
+CONFIG_SPL_RELOC_TEXT_BASE=0x3001000
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
diff --git a/configs/rk3308_defconfig b/configs/rk3308_defconfig
index 171b978f04..c1bffce56f 100644
--- a/configs/rk3308_defconfig
+++ b/configs/rk3308_defconfig
@@ -25,6 +25,8 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+# CONFIG_SPL_SKIP_RELOCATE is not set
+CONFIG_SPL_RELOC_TEXT_BASE=0x3001000
 CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
 # CONFIG_FASTBOOT is not set
 # CONFIG_CMD_BDI is not set

commit 4f2858296bf38852f0a875746bfb5167f807433b
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Fri Apr 19 17:35:19 2019 +0800

    rockchip: rk3308: Enable SPL loading U-Boot as a FIT
    
    Change-Id: Ide8f42aeb5ba9fd80bb66540d9e39cd04b04f9e0
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index c2dc32005d..537f68b408 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_RK3308=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_RKIMG_BOOTLOADER=y
@@ -17,11 +18,14 @@ CONFIG_DEBUG_UART=y
 CONFIG_ANDROID_BOOT_IMAGE=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
 # CONFIG_PASS_DEVICE_SERIAL_BY_FDT is not set
 CONFIG_BOOTDELAY=0
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
 # CONFIG_FASTBOOT is not set
 # CONFIG_CMD_BDI is not set
diff --git a/configs/rk3308_defconfig b/configs/rk3308_defconfig
index d501298a4a..171b978f04 100644
--- a/configs/rk3308_defconfig
+++ b/configs/rk3308_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_RK3308=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_RKIMG_BOOTLOADER=y
@@ -16,11 +17,14 @@ CONFIG_DEBUG_UART=y
 CONFIG_ANDROID_BOOT_IMAGE=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
 # CONFIG_PASS_DEVICE_SERIAL_BY_FDT is not set
 CONFIG_BOOTDELAY=0
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
 # CONFIG_FASTBOOT is not set
 # CONFIG_CMD_BDI is not set

commit 951488b02bb8d1a6997c19ec732407e359a70765
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Fri Mar 1 11:13:48 2019 +0800

    rockchip: rk3308: enable spl build
    
    As rk3308 is a aarch64 based soc, we only let
    it run spl on aarch64 excution state. But for
    u-boot stage, it may run on aarch32 or aarch64
    state.
    
    Change-Id: I592375aef19a35f10555f7c5b991445cf02c4543
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 7e08cc11f1..55eae9054b 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -215,6 +215,17 @@ config ROCKCHIP_RK3308
 	select DEBUG_UART_BOARD_INIT
 	select ARM_SMCCC
 	select GICV2
+	select SUPPORT_SPL if !ARM64_BOOT_AARCH32
+	select SUPPORT_TPL if !ARM64_BOOT_AARCH32
+	select SPL if !ARM64_BOOT_AARCH32
+	select TPL if !ARM64_BOOT_AARCH32
+	imply SPL_CLK
+	imply SPL_REGMAP
+	imply SPL_SYSCON
+	imply SPL_RAM
+	imply SPL_SERIAL_SUPPORT
+	imply TPL_SERIAL_SUPPORT
+	imply SPL_SEPARATE_BSS
 	help
 	  The Rockchip RK3308 is a ARM-based Soc which embeded with quad
 	  Cortex-A35 and highly integrated audio interfaces.
diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index 979823ec75..c2dc32005d 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -1,11 +1,16 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3308=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 # CONFIG_USING_KERNEL_DTB is not set
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_TARGET_EVB_RK3308=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3308-evb"
 CONFIG_DEBUG_UART=y
@@ -17,6 +22,7 @@ CONFIG_BOOTDELAY=0
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
 # CONFIG_FASTBOOT is not set
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_CONSOLE is not set
@@ -38,8 +44,11 @@ CONFIG_CMD_MMC=y
 # CONFIG_DOS_PARTITION is not set
 # CONFIG_ISO_PARTITION is not set
 CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_TPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_TPL_DM=y
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_CLK=y
diff --git a/configs/rk3308_defconfig b/configs/rk3308_defconfig
index 84b02619d3..d501298a4a 100644
--- a/configs/rk3308_defconfig
+++ b/configs/rk3308_defconfig
@@ -1,10 +1,15 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3308=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_TARGET_EVB_RK3308=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3308-evb"
 CONFIG_DEBUG_UART=y
@@ -16,6 +21,7 @@ CONFIG_BOOTDELAY=0
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
 # CONFIG_FASTBOOT is not set
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_CONSOLE is not set
@@ -38,8 +44,11 @@ CONFIG_CMD_MMC=y
 CONFIG_CMD_PMIC=y
 # CONFIG_ISO_PARTITION is not set
 CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_TPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_TPL_DM=y
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_CLK=y
@@ -52,11 +61,11 @@ CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_PHY=y
-CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
 CONFIG_POWER_FG_RK816=y
diff --git a/include/configs/evb_rk3308.h b/include/configs/evb_rk3308.h
index a09a18271f..d3cd205bec 100644
--- a/include/configs/evb_rk3308.h
+++ b/include/configs/evb_rk3308.h
@@ -19,7 +19,9 @@
 #undef CONFIG_CONSOLE_SCROLL_LINES
 #define CONFIG_CONSOLE_SCROLL_LINES            10
 
+#ifndef CONFIG_SPL_BUILD
 #undef CONFIG_BOOTCOMMAND
 #define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
+#endif
 
 #endif
diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h
index 50b931322d..98cceefdd8 100644
--- a/include/configs/rk3308_common.h
+++ b/include/configs/rk3308_common.h
@@ -14,6 +14,10 @@
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
 #define CONFIG_SPL_FRAMEWORK
+#define CONFIG_SPL_TEXT_BASE		0x00000000
+#define CONFIG_SPL_MAX_SIZE		0x20000
+#define CONFIG_SPL_BSS_START_ADDR	0x00400000
+#define CONFIG_SPL_BSS_MAX_SIZE		0x2000
 
 #define CONFIG_SYS_NS16550_MEM32
 

commit 4807f529b80878fad43b8e122a2759247f4d9c44
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 11 20:05:47 2019 +0800

    common: spl: mmc: support load rockchip images
    
    Change-Id: I200c052f61e8c3fdda91ed5447ca54452080d641
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c
index b57e0b04e4..435fe06196 100644
--- a/common/spl/spl_mmc.c
+++ b/common/spl/spl_mmc.c
@@ -9,6 +9,7 @@
 #include <common.h>
 #include <dm.h>
 #include <spl.h>
+#include <spl_rkfw.h>
 #include <linux/compiler.h>
 #include <errno.h>
 #include <asm/u-boot.h>
@@ -60,6 +61,23 @@ int mmc_load_image_raw_sector(struct spl_image_info *spl_image,
 	struct image_header *header;
 	int ret = 0;
 
+#ifdef CONFIG_SPL_LOAD_RKFW
+	struct spl_load_info load;
+
+	load.dev = mmc;
+	load.priv = NULL;
+	load.filename = NULL;
+	load.bl_len = mmc->read_bl_len;
+	load.read = h_spl_load_read;
+
+	ret = spl_load_rkfw_image(spl_image, &load,
+				  CONFIG_RKFW_TRUST_SECTOR,
+				  CONFIG_RKFW_U_BOOT_SECTOR);
+	/* If boot successfully or can't try others, just go end */
+	if (!ret || ret != -EAGAIN)
+		goto end;
+#endif
+
 	header = (struct image_header *)(CONFIG_SYS_TEXT_BASE -
 					 sizeof(struct image_header));
 

commit d3992738952fd9a61e3dc6834fe99087d5203738
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jun 13 11:21:23 2019 +0800

    Makefile: u-boot.itb: call "mkfitimage" when kernel dtb enabled
    
    This was a careless mistake.
    
    fixes: 510e4046a63fe6607bf328aeeb06ec2e36b56b0d
    (Makefile: u-boot.itb: use dt-spl.dtb if using kernel dtb)
    
    Change-Id: Ifc8ad908356db55007ddd8e125543a6501cbe5da
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/Makefile b/Makefile
index 28e3e70001..a2e1a09674 100644
--- a/Makefile
+++ b/Makefile
@@ -1041,8 +1041,8 @@ ifeq ($(CONFIG_USING_KERNEL_DTB),y)
 u-boot.itb: u-boot-nodtb.bin dts/dt-spl.dtb $(U_BOOT_ITS) FORCE
 else
 u-boot.itb: u-boot-nodtb.bin dts/dt.dtb $(U_BOOT_ITS) FORCE
-	$(call if_changed,mkfitimage)
 endif
+	$(call if_changed,mkfitimage)
 
 u-boot-spl.kwb: u-boot.img spl/u-boot-spl.bin FORCE
 	$(call if_changed,mkimage)

commit 13c5d8ec8c484a5e8a612e9533011423832164af
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 11 20:04:47 2019 +0800

    rockchip: spl: add rockchip image load support
    
    This patch add SPL support to load rockchip images(trust and U-Boot).
    
    Change-Id: I4f66dbd26af051feb93dfaca57062fd31b3dc695
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index e3fae4b806..317547792c 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -758,6 +758,24 @@ config SPL_OPTEE
 	  OP-TEE is an open source Trusted OS  which is loaded by SPL.
 	  More detail at: https://github.com/OP-TEE/optee_os
 
+config SPL_LOAD_RKFW
+	bool "SPL support load rockchip firmware images"
+	depends on SPL
+	help
+	  This enables SPL support load rockchip firmware images.
+	  Please define both RKFW_TRUST_SECTOR and RKFW_U_BOOT_SECTOR
+	  for trust and U-Boot images.
+
+config RKFW_TRUST_SECTOR
+	hex "rockchip trust image load sector"
+	depends on SPL_LOAD_RKFW
+	default 0x6000
+
+config RKFW_U_BOOT_SECTOR
+	hex "rockchip uboot image load sector"
+	depends on SPL_LOAD_RKFW
+	default 0x4000
+
 config TPL
 	bool
 	depends on SUPPORT_TPL
diff --git a/common/spl/Makefile b/common/spl/Makefile
index 3e33f3138b..713faa3a76 100644
--- a/common/spl/Makefile
+++ b/common/spl/Makefile
@@ -33,6 +33,7 @@ obj-$(CONFIG_$(SPL_TPL_)NET_SUPPORT) += spl_net.o
 obj-$(CONFIG_$(SPL_TPL_)MMC_SUPPORT) += spl_mmc.o
 obj-$(CONFIG_$(SPL_TPL_)ATF) += spl_atf.o
 obj-$(CONFIG_$(SPL_TPL_)OPTEE) += spl_optee.o
+obj-$(CONFIG_$(SPL_TPL_)LOAD_RKFW) += spl_rkfw.o
 obj-$(CONFIG_$(SPL_TPL_)USB_SUPPORT) += spl_usb.o
 obj-$(CONFIG_$(SPL_TPL_)FAT_SUPPORT) += spl_fat.o
 obj-$(CONFIG_$(SPL_TPL_)EXT_SUPPORT) += spl_ext.o
diff --git a/common/spl/spl_rkfw.c b/common/spl/spl_rkfw.c
new file mode 100644
index 0000000000..906ba12c6d
--- /dev/null
+++ b/common/spl/spl_rkfw.c
@@ -0,0 +1,276 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <malloc.h>
+#include <spl_rkfw.h>
+
+static const __aligned(16) struct s_fip_name_id fip_name_id[] = {
+	{ BL30_IMAGE_NAME, UUID_SCP_FIRMWARE_BL30 },		/* optional */
+	{ BL31_IMAGE_NAME, UUID_EL3_RUNTIME_FIRMWARE_BL31 },	/* mandatory */
+	{ BL32_IMAGE_NAME, UUID_SECURE_PAYLOAD_BL32 },		/* optional */
+};
+
+static int file2comp_id(const char *file_name, u32 *comp_id)
+{
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(fip_name_id); i++) {
+		if (!strcmp(file_name, fip_name_id[i].name)) {
+			*comp_id = fip_name_id[i].id;
+			return 0;
+		}
+	}
+
+	return -ENOENT;
+}
+
+static int open_image(const char *image_name, tboot_entry *entry,
+		      struct tag_tboot_header_2k *hdr)
+{
+	u32 i, component_num, sign_offset;
+	component_data *pcompdata;
+	boot_component *pcomp;
+	int n_found = 0;
+	u32 comp_id;
+	int ret;
+
+	ret = file2comp_id(image_name, &comp_id);
+	if (ret) {
+		printf("Can't find unknown image: %s\n", image_name);
+		return ret;
+	}
+
+	component_num = (hdr->size >> 16) & 0xffff;
+	sign_offset = (hdr->size & 0xffff) << 2;
+	pcompdata = (component_data *)((char *)hdr + sizeof(tboot_header));
+	pcomp = (boot_component *)((char *)hdr + sign_offset + SIGNATURE_SIZE);
+
+	for (i = 0; i < component_num; i++) {
+		if (comp_id == pcomp->component_id) {
+			if (n_found < MAX_BL_CODE_NUM) {
+				memcpy(&entry[n_found].component, pcomp,
+				       sizeof(boot_component));
+				memcpy(&entry[n_found].compdata, pcompdata,
+				       sizeof(component_data));
+				n_found++;
+			} else {
+				printf("Image num excess max: %d!\n",
+				       MAX_BL_CODE_NUM);
+				return -EINVAL;
+			}
+		} else {
+			if (n_found > 0)
+				break;
+		}
+
+		pcomp++;
+		pcompdata++;
+	}
+
+	if (!n_found) {
+		printf("No find %s\n", image_name);
+		return -ENONET;
+	}
+
+	return n_found;
+}
+
+static int check_image(struct tag_tboot_header_2k *hdr)
+{
+	u32 hash_format[] = { 0, 160, 256, 256 };
+
+	/* HASH format identifier */
+	return (hash_format[hdr->flags & 0x3] == 0) ? -EINVAL : 0;
+}
+
+static int load_image(struct spl_load_info *info,
+		      struct tag_tboot_header_2k *hdr,
+		      u32 image_sector,
+		      const char *image_name,
+		      uintptr_t *entry_point)
+{
+	tboot_entry entry[MAX_BL_CODE_NUM];
+	void *image_buf = NULL;
+	ulong load_addr;
+	u32 sect_off;
+	u32 sect_cnt;
+	int image_num;
+	int i, ret;
+
+	/* Parse components from image header */
+	image_num = open_image(image_name, entry, hdr);
+	if (image_num < 0)
+		return image_num;
+
+	/* Get all component */
+	for (i = 0; i < image_num; i++) {
+		load_addr = entry[i].compdata.load_addr;
+		sect_cnt = entry[i].component.image_size;
+		sect_off = entry[i].component.storage_addr;
+
+		printf("%s[%d]: addr=0x%lx, size=0x%lx\n",
+		       image_name, i, load_addr, (ulong)sect_cnt * 512);
+
+		/*
+		 * MMC/NAND controller DMA can't access sram region, so:
+		 * data -> ddr buffer -> memcpy to sram region.
+		 */
+		if (load_addr >= SDRAM_MAX_SIZE) {
+			image_buf = memalign(ARCH_DMA_MINALIGN, sect_cnt * 512);
+			if (!image_buf) {
+				printf("%s: malloc failed\n", __func__);
+				return -ENOMEM;
+			}
+		} else {
+			image_buf = (void *)load_addr;
+		}
+
+		ret = info->read(info, image_sector + sect_off,
+				 sect_cnt, image_buf);
+		if (ret != sect_cnt) {
+			printf("Read '%s' failed at sector: %ld, ret=%d\n",
+			       image_name, (ulong)image_sector + sect_off, ret);
+			return -EIO;
+		}
+
+		/* Verify component */
+		ret = check_image(hdr);
+		if (ret) {
+			printf("%s[%d]: verify image fail!\n", image_name, i);
+			return ret;
+		}
+
+		/* Handle sram region */
+		if ((ulong)image_buf != load_addr) {
+			memcpy((void *)load_addr, image_buf, sect_cnt << 9);
+			free(image_buf);
+		}
+
+		/* Fill entry_point by first component */
+		if (i == 0)
+			*entry_point = (uintptr_t)load_addr;
+	}
+
+	return ret;
+}
+
+static int rkfw_load_trust(struct spl_load_info *info, u32 image_sector,
+			   uintptr_t *bl31_entry, uintptr_t *bl32_entry,
+			   int *found_rkfw, u32 try_count)
+{
+	struct tag_tboot_header_2k hdr;
+	u32 sect_addr = image_sector;
+	int blkcnt = 4;	/* header sectors, 2KB */
+	int i, ret = 0;
+
+	/* Find valid image header */
+	for (i = 0; i < try_count; i++) {
+		sect_addr = image_sector + (i * RKFW_RETRY_SECTOR_SIZE);
+		if (blkcnt != info->read(info, sect_addr, blkcnt, &hdr))
+			continue;
+
+		if (hdr.tag == TBOOT_HEAD_TAG) {
+			/* Mark it */
+			*found_rkfw = 1;
+
+			/* bl31 is mandatory */
+			ret = load_image(info, &hdr, sect_addr,
+					 BL31_IMAGE_NAME, bl31_entry);
+			if (ret)
+				continue;
+
+			/* bl32 is optional */
+			ret = load_image(info, &hdr, sect_addr,
+					 BL32_IMAGE_NAME, bl32_entry);
+			if (ret) {
+				if (ret == -ENONET) {
+					*bl32_entry = -1;	/* Not exist */
+					ret = 0;
+				} else {
+					continue;
+				}
+			}
+			break;
+		}
+	}
+
+	return ret;
+}
+
+static int rkfw_load_uboot(struct spl_load_info *info, u32 image_sector,
+			   uintptr_t *bl33_entry, u32 try_count)
+{
+	struct tag_second_loader_hdr hdr;
+	int i, ret, blkcnt = 4;	/* header sectors, 2KB */
+	char *load_addr;
+	u32 sect_addr;
+
+	/* Detect valid image header */
+	for (i = 0; i < try_count; i++) {
+		sect_addr = image_sector + (i * RKFW_RETRY_SECTOR_SIZE);
+		ret = info->read(info, sect_addr, blkcnt, &hdr);
+		if (ret != blkcnt)
+			continue;
+
+		if (!memcmp(hdr.magic, LOADER_HARD_STR, 6)) {
+			/* Load full binary image(right behind header) */
+			sect_addr += blkcnt;
+			load_addr = (char *)((size_t)hdr.loader_load_addr);
+			blkcnt = DIV_ROUND_UP(hdr.loader_load_size, 512);
+
+			printf("u-boot.bin: addr=0x%lx, size=0x%lx\n",
+			       (ulong)load_addr, (ulong)blkcnt * 512);
+			ret = info->read(info, sect_addr, blkcnt, load_addr);
+			if (ret != blkcnt)
+				continue;
+
+			break;
+		}
+	}
+
+	if (i == try_count) {
+		printf("Can not find usable uboot\n");
+		return -ENONET;
+	}
+
+	/* Fill entry point */
+	*bl33_entry = (uintptr_t)hdr.loader_load_addr;
+
+	return 0;
+}
+
+int spl_load_rkfw_image(struct spl_image_info *spl_image,
+			struct spl_load_info *info,
+			u32 trust_sector, u32 uboot_sector)
+{
+	int ret, try_count = RKFW_RETRY_SECTOR_TIMES;
+	int found_rkfw = 0;
+
+	ret = rkfw_load_trust(info, trust_sector,
+			      &spl_image->entry_point,
+			      &spl_image->entry_point_bl32,
+			      &found_rkfw, try_count);
+	if (ret) {
+		printf("Load trust image failed! ret=%d\n", ret);
+		goto out;
+	}
+
+	ret = rkfw_load_uboot(info, uboot_sector,
+			      &spl_image->entry_point_bl33, try_count);
+	if (ret) {
+		printf("Load uboot image failed! ret=%d\n", ret);
+		goto out;
+	}
+
+#if CONFIG_IS_ENABLED(LOAD_FIT)
+	spl_image->fdt_addr = 0;
+#endif
+	spl_image->os = IH_OS_ARM_TRUSTED_FIRMWARE;
+
+out:
+	/* If not found rockchip firmware, try others outside */
+	return found_rkfw ? ret : -EAGAIN;
+}
diff --git a/include/spl_rkfw.h b/include/spl_rkfw.h
new file mode 100644
index 0000000000..c4c8e34205
--- /dev/null
+++ b/include/spl_rkfw.h
@@ -0,0 +1,103 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _SPL_RKFW_H_
+#define _SPL_RKFW_H_
+
+#include <spl.h>
+
+#define LOADER_HARD_STR			"LOADER"
+#define TBOOT_HEAD_TAG			0x58334c42 /* 'B', 'L', '3', 'X' */
+
+#define BL30_IMAGE_NAME			"bl30.bin" /* SCP Firmware BL3-0 */
+#define BL31_IMAGE_NAME			"bl31.bin" /* EL3 Runtime Firmware BL31 */
+#define BL32_IMAGE_NAME			"bl32.bin" /* Secure Payload BL32 (Trusted OS) */
+
+#define UUID_SCP_FIRMWARE_BL30		0x30334c42 /* "BL30" */
+#define UUID_EL3_RUNTIME_FIRMWARE_BL31	0x31334c42 /* "BL31" */
+#define UUID_SECURE_PAYLOAD_BL32	0x32334c42 /* "BL32" */
+
+/* Signature size, unit is byte */
+#define SIGNATURE_SIZE			256
+#define MAX_BL_CODE_NUM			6
+#define LOADER_MAGIC_SIZE		8
+#define LOADER_HASH_SIZE		32
+
+/* Special value used to verify platform parameters from BL2 to BL3-1 */
+#define RK_BL31_PLAT_PARAM_VAL		0x0f1e2d3c4b5a6978ULL
+
+#define RKFW_RETRY_SECTOR_SIZE		1024
+#define RKFW_RETRY_SECTOR_TIMES		8
+
+struct s_fip_name_id {
+	const char *name;
+	const u32 id;
+};
+
+typedef struct tag_tboot_header_2k {
+	u32 tag;
+	u32 version;
+	u32 flags;
+	u32 size;
+	u32 reserved1[4];
+	u32 rsa_n[64];
+	u32 rsa_e[64];
+	u32 rsa_c[64];
+	u32 reserved2[312];
+} tboot_header_2k, *ptboot_header_2k;
+
+typedef struct tag_tboot_header {
+	u32 tag;
+	u32 version;
+	u32 flags;
+	u32 size;
+	u32 reserved[4];
+	u32 rsa_n[64];
+	u32 rsa_e[64];
+	u32 rsa_c[64];
+} tboot_header, *ptboot_header;
+
+typedef struct tag_boot_component {
+	u32 component_id;
+	u32 storage_addr;
+	u32 image_size;
+	u32 reserved;
+} boot_component, *pboot_component;
+
+typedef struct tag_component_data {
+	u32 hash_data[8];
+	u32 load_addr;
+	u32 reserved[3];
+} component_data, *pcomponent_data;
+
+typedef struct tag_tboot_entry {
+	boot_component component;
+	component_data compdata;
+} tboot_entry, *ptboot_entry;
+
+typedef struct tag_second_loader_hdr {
+	unsigned char magic[LOADER_MAGIC_SIZE];
+	unsigned int version;
+	unsigned int reserved0;
+	unsigned int loader_load_addr;		/* physical load addr ,default is 0x60000000 */
+	unsigned int loader_load_size;		/* size in bytes */
+	unsigned int crc32;			/* crc32 */
+	unsigned int hash_len;			/* 20 or 32 , 0 is no hash */
+	unsigned char hash[LOADER_HASH_SIZE];	/* sha */
+	unsigned int js_hash;			/* js hsah */
+	unsigned char reserved[1024-32-32-4];
+	unsigned int sign_tag;			/* 0x4E474953, 'N' 'G' 'I' 'S' */
+	unsigned int sign_len;			/* 256 */
+	unsigned char rsa_hash[256];
+	unsigned char reserved2[2048-1024-256-8];
+} second_loader_hdr;				/* Size:2K */
+
+/**
+ * spl_load_rkfw_image - Load rockchip image(trust and U-Boot) and jump to bl31.
+ */
+int spl_load_rkfw_image(struct spl_image_info *spl_image,
+			struct spl_load_info *info,
+			u32 trust_sector, u32 uboot_sector);
+#endif

commit dfcfb4f4f7099135e114609e25374ea72c48f643
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jun 14 09:17:11 2019 +0800

    common: spl: printf message when jump to ATF
    
    Change-Id: Ibd970ffc3078c3bbe93cbd65698052cd913a31f6
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/spl/spl.c b/common/spl/spl.c
index 9e2fe27f1d..84b4e9be00 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -485,7 +485,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 		break;
 #if CONFIG_IS_ENABLED(ATF)
 	case IH_OS_ARM_TRUSTED_FIRMWARE:
-		debug("Jumping to U-Boot via ARM Trusted Firmware\n");
+		printf("Jumping to U-Boot via ARM Trusted Firmware\n\n");
 		spl_invoke_atf(&spl_image);
 		break;
 #endif

commit 1620aad4c92296bfc154d88b46118eb71f193404
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 12 18:02:04 2019 +0800

    common: spl: atf: add bl32/bl33 entry point to struct spl_image_info
    
    This allows other booting device to initial other firmware entry
    point, but not only FIT.
    
    Change-Id: I73b08d594079ce0842b68f1c9d222f58e171b555
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/spl/spl.c b/common/spl/spl.c
index 982d7fe35c..9e2fe27f1d 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -455,6 +455,16 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 #endif
 
 	memset(&spl_image, '\0', sizeof(spl_image));
+
+#if CONFIG_IS_ENABLED(ATF)
+	/*
+	 * Bl32 ep is optional, initial it as an invalid value.
+	 * BL33 ep is mandatory, but initial it as a default value is better.
+	 */
+	spl_image.entry_point_bl32 = -1;
+	spl_image.entry_point_bl33 = CONFIG_SYS_TEXT_BASE;
+#endif
+
 #ifdef CONFIG_SYS_SPL_ARGS_ADDR
 	spl_image.arg = (void *)CONFIG_SYS_SPL_ARGS_ADDR;
 #endif
diff --git a/common/spl/spl_atf.c b/common/spl/spl_atf.c
index 45f3de2a8f..a98a4e99a9 100644
--- a/common/spl/spl_atf.c
+++ b/common/spl/spl_atf.c
@@ -152,15 +152,22 @@ uintptr_t spl_fit_images_get_entry(void *blob, int node)
 
 void spl_invoke_atf(struct spl_image_info *spl_image)
 {
-	uintptr_t  bl32_entry = -1;
-	uintptr_t  bl33_entry = CONFIG_SYS_TEXT_BASE;
+	uintptr_t bl32_entry, bl33_entry;
 	void *blob = spl_image->fdt_addr;
 	uintptr_t platform_param = (uintptr_t)blob;
 	int node;
 
+	/*
+	 * Find the OP-TEE binary (in /fit-images) load address or
+	 * entry point (if different) and pass it as the BL3-2 entry
+	 * point, this is optional.
+	 * This will need to be extended to support Falcon mode.
+	 */
 	node = spl_fit_images_find(blob, IH_OS_OP_TEE);
 	if (node >= 0)
 		bl32_entry = spl_fit_images_get_entry(blob, node);
+	else
+		bl32_entry = spl_image->entry_point_bl32; /* optional */
 
 	/*
 	 * Find the U-Boot binary (in /fit-images) load addreess or
@@ -168,10 +175,11 @@ void spl_invoke_atf(struct spl_image_info *spl_image)
 	 * point.
 	 * This will need to be extended to support Falcon mode.
 	 */
-
 	node = spl_fit_images_find(blob, IH_OS_U_BOOT);
 	if (node >= 0)
 		bl33_entry = spl_fit_images_get_entry(blob, node);
+	else
+		bl33_entry = spl_image->entry_point_bl33;
 
 	/*
 	 * If ATF_NO_PLATFORM_PARAM is set, we override the platform
diff --git a/include/spl.h b/include/spl.h
index f714e051fe..9135e320e7 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -24,7 +24,11 @@ struct spl_image_info {
 	const char *name;
 	u8 os;
 	uintptr_t load_addr;
-	uintptr_t entry_point;
+	uintptr_t entry_point;		/* Next stage entry point */
+#if CONFIG_IS_ENABLED(ATF)
+	uintptr_t entry_point_bl32;
+	uintptr_t entry_point_bl33;
+#endif
 #if CONFIG_IS_ENABLED(LOAD_FIT)
 	void *fdt_addr;
 #endif

commit 64d1b263e75127d1783f99b1fbfee8b755559817
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 11 20:05:18 2019 +0800

    common: spl: atf: export bl31_entry()
    
    Change-Id: I7c628ba567ca554caa5902e6aa6592282ccf167d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/spl/spl_atf.c b/common/spl/spl_atf.c
index e1e7f43f9f..45f3de2a8f 100644
--- a/common/spl/spl_atf.c
+++ b/common/spl/spl_atf.c
@@ -95,8 +95,8 @@ static inline void raw_write_daif(unsigned int daif)
 
 typedef void (*atf_entry_t)(struct bl31_params *params, void *plat_params);
 
-static void bl31_entry(uintptr_t bl31_entry, uintptr_t bl32_entry,
-		       uintptr_t bl33_entry, uintptr_t fdt_addr)
+void bl31_entry(uintptr_t bl31_entry, uintptr_t bl32_entry,
+		uintptr_t bl33_entry, uintptr_t fdt_addr)
 {
 	struct bl31_params *bl31_params;
 	atf_entry_t  atf_entry = (atf_entry_t)bl31_entry;
diff --git a/include/spl.h b/include/spl.h
index 1475bb0e8c..f714e051fe 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -276,6 +276,12 @@ int spl_mmc_load_image(struct spl_image_info *spl_image,
  */
 void spl_invoke_atf(struct spl_image_info *spl_image);
 
+/**
+ * bl31_entry - Fill bl31_params structure, and jump to bl31
+ */
+void bl31_entry(uintptr_t bl31_entry, uintptr_t bl32_entry,
+		uintptr_t bl33_entry, uintptr_t fdt_addr);
+
 /**
  * spl_optee_entry - entry function for optee
  *
@@ -298,4 +304,5 @@ void spl_optee_entry(void *arg0, void *arg1, void *arg2, void *arg3);
  * can implement 'board_return_to_bootrom'.
  */
 void board_return_to_bootrom(void);
+
 #endif

commit c8d12fd617760dfd2ef6e820bf768c2ae2fcf29c
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Wed May 29 11:55:36 2019 +0800

    drivers: rknand: zftl fix cache flush misaligned range
    
    bug:
    CACHE: Misaligned operation at range [71e1eb80, 71e1eba0]
    CACHE: Misaligned operation at range [71e1eb80, 71e1eba0]
    CACHE: Misaligned operation at range [71e1eb80, 71e1eba0]
    
    Change-Id: Id77a8f8df8e014e8de5dc0845ee0e3dd5d945f97
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/drivers/rknand/rk_zftl_arm_v7.S b/drivers/rknand/rk_zftl_arm_v7.S
index c934ade82e..acf4621f3e 100644
--- a/drivers/rknand/rk_zftl_arm_v7.S
+++ b/drivers/rknand/rk_zftl_arm_v7.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2019-05-22
+ * date: 2019-06-03
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -1398,7 +1398,7 @@ flash_wait_device_ready_raw:
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r0
 	bhi	.L276
-	movw	r2, #677
+	movw	r2, #678
 	ldr	r1, .L281+4
 	ldr	r0, .L281+8
 	bl	printf
@@ -1745,7 +1745,7 @@ flash_start_page_read:
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r4
 	bhi	.L354
-	movw	r2, #845
+	movw	r2, #846
 	ldr	r1, .L361+4
 	ldr	r0, .L361+8
 	bl	printf
@@ -2058,7 +2058,7 @@ flash_erase_duplane_block:
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r0
 	bhi	.L390
-	mov	r2, #588
+	movw	r2, #589
 	ldr	r1, .L403+4
 	ldr	r0, .L403+8
 	bl	printf
@@ -2171,7 +2171,7 @@ flash_erase_block_en:
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r0
 	bhi	.L406
-	movw	r2, #633
+	movw	r2, #634
 	ldr	r1, .L417+4
 	ldr	r0, .L417+8
 	bl	printf
@@ -2337,7 +2337,7 @@ flash_start_plane_read:
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r4
 	bhi	.L428
-	mov	r2, #940
+	movw	r2, #941
 	ldr	r1, .L446+4
 	ldr	r0, .L446+8
 	bl	printf
@@ -3052,9 +3052,9 @@ nandc_xfer_start:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r7, r0
+	mov	r6, r0
 	ldr	r0, .L563
-	adds	r6, r1, #1
+	adds	r7, r1, #1
 	ldr	r5, .L563+4
 	ldrb	r0, [r0]	@ zero_extendqisi2
 	ldr	r10, .L563+24
@@ -3062,8 +3062,8 @@ nandc_xfer_start:
 	bne	.L548
 	movs	r4, #0
 	movs	r1, #1
-	bfi	r4, r7, #1, #1
-	asrs	r6, r6, r1
+	bfi	r4, r6, #1, #1
+	asrs	r7, r7, r1
 	orr	r4, r4, #8
 	bfi	r4, r1, #5, #2
 	ldr	r1, .L563+8
@@ -3071,7 +3071,7 @@ nandc_xfer_start:
 	orr	r4, r4, #1024
 	ldrb	r1, [r1]	@ zero_extendqisi2
 	bfc	r4, #4, #1
-	bfi	r4, r6, #22, #6
+	bfi	r4, r7, #22, #6
 	orr	r4, r4, #128
 	cbz	r1, .L549
 	ldr	r1, .L563+12
@@ -3080,22 +3080,22 @@ nandc_xfer_start:
 	orr	r4, r4, #512
 .L549:
 	add	r1, r2, #63
-	and	r6, r6, #63
+	and	r7, r7, #63
 	bic	r1, r1, #63
 	bic	r0, r2, #63
-	add	r1, r1, r6, lsl #10
+	add	r1, r1, r7, lsl #10
 	str	r2, [r5, #4]
 	str	r3, [r5, #8]
-	clz	r7, r7
+	clz	r6, r6
 	str	r2, [r5, #12]
-	lsrs	r7, r7, #5
+	lsrs	r6, r6, #5
 	str	r3, [r5, #16]
 	bl	flush_dcache_range
 	ldr	r0, [r5, #8]
 	add	r1, r0, #63
 	bic	r0, r0, #63
 	bic	r1, r1, #63
-	add	r1, r1, r6, lsl #2
+	adds	r1, r1, #64
 	bl	flush_dcache_range
 	movs	r3, #1
 	ldr	r2, [r10]
@@ -3112,7 +3112,7 @@ nandc_xfer_start:
 	bfi	r3, r1, #3, #3
 	ldr	r1, .L563+16
 	orr	r3, r3, #4
-	bfi	r3, r7, #1, #1
+	bfi	r3, r6, #1, #1
 	ldrh	r1, [r1]
 	orr	r3, r3, #1
 	bfi	r3, r1, #16, #11
@@ -3127,22 +3127,22 @@ nandc_xfer_start:
 .L548:
 	ldr	r0, [r10]
 	movs	r4, #0
-	bfi	r4, r7, #1, #1
+	bfi	r4, r6, #1, #1
 	orr	r4, r4, #8
 	ldr	r8, [r0, #12]
 	movs	r0, #16
 	bfi	r8, r0, #8, #8
 	movs	r0, #1
 	bfi	r4, r0, #5, #2
-	asrs	r6, r6, r0
+	asrs	r7, r7, r0
 	orr	r4, r4, #536870912
 	orr	r4, r4, #1024
 	bfc	r8, #3, #1
 	bfc	r4, #4, #1
 	bfc	r8, #5, #3
-	str	r6, [sp]
-	bfi	r4, r6, #22, #6
-	cmp	r7, #0
+	str	r7, [sp]
+	bfi	r4, r7, #22, #6
+	cmp	r6, #0
 	beq	.L551
 	ldr	r0, .L563+20
 	lsrs	r1, r1, #1
@@ -3158,11 +3158,11 @@ nandc_xfer_start:
 	str	r0, [sp, #4]
 	mov	r0, r1
 .L553:
-	ldr	r6, [sp, #4]
+	ldr	r7, [sp, #4]
 	add	fp, r3, r0, lsl #2
-	add	lr, r6, r1
-	ldr	r6, [sp, #8]
-	cmp	r0, r6
+	add	lr, r7, r1
+	ldr	r7, [sp, #8]
+	cmp	r0, r7
 	blt	.L554
 .L555:
 	ldr	r3, [r5]
@@ -3170,20 +3170,20 @@ nandc_xfer_start:
 	bic	r1, r1, #63
 	bic	r0, r2, #63
 	str	r2, [r5, #4]
-	clz	r7, r7
+	clz	r6, r6
 	str	r3, [r5, #8]
-	lsrs	r7, r7, #5
+	lsrs	r6, r6, #5
 	str	r3, [r5, #16]
 	ldr	r3, [sp]
 	str	r2, [r5, #12]
-	and	r6, r3, #63
-	add	r1, r1, r6, lsl #10
+	and	r7, r3, #63
+	add	r1, r1, r7, lsl #10
 	bl	flush_dcache_range
 	ldr	r0, [r5, #8]
 	add	r1, r0, #63
 	bic	r0, r0, #63
 	bic	r1, r1, #63
-	add	r1, r1, r6, lsl #7
+	add	r1, r1, r7, lsl #7
 	bl	flush_dcache_range
 	movs	r3, #1
 	ldr	r2, [r10]
@@ -3199,7 +3199,7 @@ nandc_xfer_start:
 	orr	r3, r3, #448
 	bfi	r3, r1, #3, #3
 	orr	r3, r3, #4
-	bfi	r3, r7, #1, #1
+	bfi	r3, r6, #1, #1
 	orr	r3, r3, #1
 	str	r3, [r2, #16]
 	str	r8, [r2, #12]
@@ -3212,9 +3212,9 @@ nandc_xfer_start:
 	bic	r1, r1, #3
 	ldrh	fp, [fp, #2]
 	adds	r0, r0, #1
-	ldr	r6, [sp, #12]
+	ldr	r7, [sp, #12]
 	orr	ip, ip, fp, lsl #16
-	str	ip, [r6, r1]
+	str	ip, [r7, r1]
 	mov	r1, lr
 	b	.L553
 .L551:
@@ -3957,7 +3957,7 @@ gc_add_sblk:
 	ldrh	r3, [r3]
 	cmp	r3, r0
 	bhi	.L680
-	movw	r2, #339
+	mov	r2, #338
 	ldr	r1, .L712+4
 	ldr	r0, .L712+8
 	bl	printf
@@ -3995,7 +3995,7 @@ gc_add_sblk:
 	bne	.L682
 	cmp	r7, #0
 	beq	.L702
-	mov	r2, #344
+	movw	r2, #343
 	ldr	r1, .L712+4
 	ldr	r0, .L712+8
 	bl	printf
@@ -4257,7 +4257,7 @@ gc_write_completed:
 	ldr	r0, .L752+12
 	str	r2, [r3, #320]
 	bl	printf
-	movw	r2, #673
+	mov	r2, #672
 	ldr	r1, .L752+16
 	ldr	r0, .L752+20
 	bl	printf
@@ -4295,7 +4295,7 @@ gc_write_completed:
 	ldrb	r3, [r3, #1]	@ zero_extendqisi2
 	cmp	r2, r3
 	beq	.L729
-	movw	r2, #682
+	movw	r2, #681
 	ldr	r1, .L752+16
 	ldr	r0, .L752+20
 	bl	printf
@@ -7271,7 +7271,7 @@ gc_free_src_blk:
 	tst	r3, #192
 	bne	.L1182
 .L1181:
-	mov	r2, #932
+	movw	r2, #931
 	ldr	r1, .L1214+24
 	ldr	r0, .L1214+28
 	bl	printf
@@ -10336,10 +10336,10 @@ buf_init:
 	movs	r5, #0
 	ldr	r4, .L1655
 	mov	r6, r5
-	ldr	r7, .L1655+4
-	mov	r8, r4
+	ldr	r8, .L1655+12
+	mov	r7, r4
 .L1653:
-	ldrb	r0, [r7]	@ zero_extendqisi2
+	ldrb	r0, [r8]	@ zero_extendqisi2
 	uxtb	r3, r5
 	strb	r6, [r4, #2]
 	adds	r5, r5, #1
@@ -10351,26 +10351,25 @@ buf_init:
 	lsls	r0, r0, #9
 	bl	ftl_malloc
 	str	r0, [r4, #-44]
-	ldrb	r0, [r7]	@ zero_extendqisi2
-	lsls	r0, r0, #1
+	movs	r0, #64
 	bl	ftl_malloc
 	cmp	r5, #32
 	str	r0, [r4, #-36]
 	bne	.L1653
 	movs	r3, #255
-	strb	r3, [r8, #1488]
-	ldr	r3, .L1655+8
+	strb	r3, [r7, #1488]
+	ldr	r3, .L1655+4
 	strb	r6, [r3]
-	ldr	r3, .L1655+12
+	ldr	r3, .L1655+8
 	strb	r5, [r3]
 	pop	{r4, r5, r6, r7, r8, pc}
 .L1656:
 	.align	2
 .L1655:
 	.word	.LANCHOR50
-	.word	.LANCHOR123
 	.word	.LANCHOR51
 	.word	.LANCHOR52
+	.word	.LANCHOR123
 	.size	buf_init, .-buf_init
 	.section	.text.gc_init,"ax",%progbits
 	.align	1
@@ -12679,7 +12678,7 @@ flash_read_page_en:
 	mov	fp, r3
 	cmp	r2, r0
 	bhi	.L2035
-	mov	r2, #398
+	movw	r2, #399
 	ldr	r1, .L2061+4
 	ldr	r0, .L2061+8
 	bl	printf
@@ -13010,7 +13009,7 @@ flash_complete_plane_page_read:
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r4
 	bhi	.L2087
-	movw	r2, #886
+	movw	r2, #887
 	ldr	r1, .L2100+4
 	ldr	r0, .L2100+8
 	bl	printf
@@ -13127,7 +13126,7 @@ flash_complete_page_read:
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r6
 	bhi	.L2103
-	mov	r2, #1008
+	movw	r2, #1009
 	ldr	r1, .L2132+4
 	ldr	r0, .L2132+8
 	bl	printf
@@ -15055,7 +15054,7 @@ flash_start_tlc_page_prog:
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, fp
 	bhi	.L2449
-	movw	r2, #726
+	movw	r2, #727
 	ldr	r1, .L2454+4
 	ldr	r0, .L2454+8
 	bl	printf
@@ -15428,7 +15427,7 @@ flash_start_3d_mlc_page_prog:
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r1
 	bhi	.L2473
-	mov	r2, #756
+	movw	r2, #757
 	ldr	r1, .L2474+4
 	ldr	r0, .L2474+8
 	bl	printf
@@ -15614,7 +15613,7 @@ flash_start_page_prog:
 	str	r3, [sp]
 	cmp	r1, r7
 	bhi	.L2485
-	movw	r2, #803
+	mov	r2, #804
 	ldr	r1, .L2493+4
 	ldr	r0, .L2493+8
 	bl	printf
@@ -15950,7 +15949,7 @@ flash_prog_page_en:
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r0
 	bhi	.L2542
-	movw	r2, #546
+	movw	r2, #547
 	ldr	r1, .L2574+4
 	ldr	r0, .L2574+8
 	bl	printf
@@ -16057,7 +16056,7 @@ flash_prog_page_en:
 	mov	r1, r4
 	ldr	r0, .L2574+56
 	bl	printf
-	movw	r2, #577
+	movw	r2, #578
 	ldr	r1, .L2574+4
 	ldr	r0, .L2574+8
 	bl	printf
@@ -18829,7 +18828,7 @@ nand_flash_init:
 	lsls	r7, r3, #19
 	bpl	.L2974
 	ldr	r2, .L3055+4
-	movw	r1, #2490
+	movw	r1, #2491
 	ldr	r0, .L3055+8
 	bl	printf
 .L2974:
@@ -18950,7 +18949,7 @@ nand_flash_init:
 	lsls	r5, r3, #19
 	bpl	.L2988
 	ldr	r2, .L3055+4
-	movw	r1, #2515
+	movw	r1, #2516
 	ldr	r0, .L3055+8
 	bl	printf
 .L2988:
@@ -19056,7 +19055,7 @@ nand_flash_init:
 	lsls	r0, r3, #19
 	bpl	.L3004
 	ldr	r2, .L3055+4
-	movw	r1, #2573
+	movw	r1, #2574
 	ldr	r0, .L3055+8
 	bl	printf
 .L3004:
@@ -19082,7 +19081,7 @@ nand_flash_init:
 	lsls	r1, r3, #19
 	bpl	.L3008
 	ldr	r2, .L3055+4
-	movw	r1, #2605
+	movw	r1, #2606
 	ldr	r0, .L3055+8
 	bl	printf
 .L3008:
@@ -19095,7 +19094,7 @@ nand_flash_init:
 .L2981:
 	adds	r5, r5, #1
 	adds	r7, r7, #32
-	cmp	r5, #38
+	cmp	r5, #39
 	bne	.L2983
 	b	.L2978
 .L2994:
@@ -19225,7 +19224,7 @@ nand_flash_init:
 	lsls	r3, r3, #19
 	bpl	.L3013
 	ldr	r2, .L3057+12
-	movw	r1, #2671
+	mov	r1, #2672
 	ldr	r0, .L3057+16
 	bl	printf
 .L3013:
@@ -20166,25 +20165,23 @@ gc_recovery:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r3, .L3216
+	ldr	r7, .L3216
 	sub	sp, sp, #64
-	ldr	r7, .L3216+4
-	strb	r4, [r3]
-	ldr	r3, .L3216+8
+	ldr	r3, .L3216+4
 	ldr	r5, [r7]
 	strb	r4, [r3]
-	bl	gc_init
+	ldr	r3, .L3216+8
 	ldrh	r6, [r5, #80]
+	strb	r4, [r3]
 	movw	r3, #65535
 	cmp	r6, r3
 	beq	.L3161
-	ldr	r2, [r7]
+	strh	r3, [r5, #130]	@ movhi
 	movs	r0, #1
-	ldr	r6, .L3216+12
-	strh	r3, [r2, #130]	@ movhi
 	bl	buf_alloc
 	ldrb	r3, [r5, #89]	@ zero_extendqisi2
 	mov	r4, r0
+	ldr	r6, .L3216+12
 	add	r3, r5, r3, lsl #1
 	ldrh	r2, [r3, #94]
 	ldr	r3, .L3216+16
@@ -20259,7 +20256,7 @@ gc_recovery:
 	strh	r4, [r5, #80]	@ movhi
 	bl	pm_flush
 	bl	ftl_ext_info_flush
-	ldr	r3, .L3216+4
+	ldr	r3, .L3216
 	ldr	r2, [r3]
 	ldrh	r0, [r2, #130]
 	cmp	r0, r4
@@ -20385,7 +20382,7 @@ gc_recovery:
 	ldrh	r2, [r5, #80]
 	ldr	r3, [r3]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L3216+4
+	ldr	r3, .L3216
 	ldr	r3, [r3]
 	b	.L3215
 .L3170:
@@ -20445,8 +20442,8 @@ gc_recovery:
 .L3217:
 	.align	2
 .L3216:
-	.word	.LANCHOR76
 	.word	.LANCHOR10
+	.word	.LANCHOR76
 	.word	.LANCHOR150
 	.word	.LANCHOR71
 	.word	.LANCHOR103
@@ -20576,8 +20573,7 @@ gc_recovery:
 	bl	zftl_insert_data_list
 	b	.L3166
 .L3161:
-	ldr	r3, [r7]
-	ldrh	r3, [r3, #130]
+	ldrh	r3, [r5, #130]
 	cmp	r3, r6
 	beq	.L3160
 	ldr	r5, .L3218+32
@@ -21157,7 +21153,7 @@ gc_update_l2p_map_new:
 	ldrh	r3, [r3, r2, lsl #1]
 	cmp	r6, r3
 	beq	.L3307
-	movw	r2, #617
+	mov	r2, #616
 	ldr	r1, .L3328+24
 	ldr	r0, .L3328+28
 	bl	printf
@@ -21462,7 +21458,7 @@ gc_scan_src_blk:
 	ldrh	r2, [r4]
 	cmp	r2, r3
 	bne	.L3359
-	movw	r2, #1052
+	movw	r2, #1051
 	ldr	r1, .L3399+4
 	ldr	r0, .L3399+8
 	bl	printf
@@ -21527,7 +21523,7 @@ gc_scan_src_blk:
 	ldr	r1, [r5]
 	ldrh	r3, [r1, r3, lsl #1]
 	cbz	r3, .L3366
-	mov	r2, #1072
+	movw	r2, #1071
 	ldr	r1, .L3399+4
 	ldr	r0, .L3399+8
 	bl	printf
@@ -21543,7 +21539,7 @@ gc_scan_src_blk:
 	ldrh	r6, [r0, #34]
 	cmp	r6, r3
 	bne	.L3367
-	mov	r2, #1080
+	movw	r2, #1079
 	ldr	r1, .L3399+4
 	ldr	r0, .L3399+8
 	bl	printf
@@ -21617,7 +21613,7 @@ gc_scan_src_blk:
 	ldr	r3, .L3399+52
 	cmp	r2, r3
 	beq	.L3372
-	movw	r2, #1113
+	mov	r2, #1112
 	ldr	r1, .L3399+4
 	ldr	r0, .L3399+8
 	bl	printf
@@ -21779,7 +21775,7 @@ gc_scan_static_data:
 	ldr	r3, [r3, #544]
 	cmp	r2, r3
 	beq	.L3405
-	mov	r2, #1552
+	movw	r2, #1551
 	mov	r1, r6
 	mov	r0, r7
 	bl	printf
@@ -22649,7 +22645,7 @@ gc_check_data_one_wl:
 .L3517:
 	ldr	r5, [r4, #8]
 	cbnz	r5, .L3518
-	movw	r2, #495
+	mov	r2, #494
 	ldr	r1, .L3541+8
 	ldr	r0, .L3541+12
 	bl	printf
@@ -23469,7 +23465,7 @@ gc_do_copy_back:
 	cmp	r3, #512
 	bne	.L3649
 .L3648:
-	mov	r2, #732
+	movw	r2, #731
 	ldr	r1, .L3742+8
 	ldr	r0, .L3742+12
 	bl	printf
@@ -23991,7 +23987,7 @@ gc_do_copy_back:
 	cmp	r3, #512
 	bne	.L3674
 .L3673:
-	movw	r2, #847
+	movw	r2, #846
 	ldr	r1, .L3744+72
 	ldr	r0, .L3744+76
 	bl	printf
@@ -24300,7 +24296,7 @@ zftl_do_gc:
 	str	r1, [sp, #12]
 	ldrh	r1, [r3, #120]
 	str	r1, [sp, #8]
-	movw	r1, #1983
+	movw	r1, #1982
 	ldrh	r3, [r3, #124]
 	str	r7, [sp]
 	str	r3, [sp, #4]
@@ -24336,7 +24332,7 @@ zftl_do_gc:
 	tst	r2, #256
 	beq	.L3769
 	ldr	r3, .L3924+72
-	movw	r1, #1995
+	movw	r1, #1994
 	ldr	r0, .L3924+68
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	ldr	r3, [sp, #32]
@@ -24389,7 +24385,7 @@ zftl_do_gc:
 	lsls	r4, r3, #23
 	bpl	.L3748
 	ldrh	r3, [r0, #122]
-	movw	r1, #2085
+	movw	r1, #2084
 	str	r3, [sp, #12]
 	ldrh	r3, [r0, #120]
 	stm	sp, {r7, fp}
@@ -24612,7 +24608,7 @@ zftl_do_gc:
 	bpl	.L3792
 	ldrh	r3, [r0, #122]
 	mov	r2, r7
-	movw	r1, #2115
+	movw	r1, #2114
 	str	r3, [sp, #12]
 	ldrh	r3, [r0, #120]
 	str	r7, [sp, #4]
@@ -24850,7 +24846,7 @@ zftl_do_gc:
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r1, lsl #1]
 	cbz	r3, .L3816
-	movw	r2, #2348
+	movw	r2, #2347
 	ldr	r1, .L3928+28
 	ldr	r0, .L3928+32
 	bl	printf
@@ -24895,7 +24891,7 @@ zftl_do_gc:
 	ldr	r1, [r4]
 	ldrh	r2, [r1, r2, lsl #1]
 	cbz	r2, .L3819
-	movw	r2, #2376
+	movw	r2, #2375
 	ldr	r1, .L3928+28
 	ldr	r0, .L3928+32
 	bl	printf
@@ -24958,7 +24954,7 @@ zftl_do_gc:
 	ldrh	r3, [r5, #20]
 	cmp	r2, r3
 	beq	.L3825
-	movw	r2, #2410
+	movw	r2, #2409
 	ldr	r1, .L3928+28
 	ldr	r0, .L3928+32
 	bl	printf
@@ -24990,7 +24986,7 @@ zftl_do_gc:
 	tst	r3, #192
 	bne	.L3828
 .L3827:
-	movw	r2, #2420
+	movw	r2, #2419
 	ldr	r1, .L3928+28
 	ldr	r0, .L3928+32
 	bl	printf
@@ -25055,7 +25051,7 @@ zftl_do_gc:
 	ldrb	r3, [r7, #2]	@ zero_extendqisi2
 	tst	r3, #224
 	beq	.L3834
-	movw	r2, #2449
+	mov	r2, #2448
 	ldr	r1, .L3930+12
 	ldr	r0, .L3930+16
 	bl	printf
@@ -25166,7 +25162,7 @@ zftl_do_gc:
 	ldr	r2, [r4]
 	ldrh	r2, [r2, r1, lsl #1]
 	cbz	r2, .L3841
-	movw	r2, #2524
+	movw	r2, #2523
 	ldr	r1, .L3930+12
 	ldr	r0, .L3930+16
 	bl	printf
@@ -25213,7 +25209,7 @@ zftl_do_gc:
 	movs	r5, #0
 	str	r5, [r6, #8]
 	bl	flt_sys_flush
-	movw	r2, #2562
+	movw	r2, #2561
 	ldr	r1, .L3930+12
 	ldr	r0, .L3930+16
 	strb	r5, [r4]
@@ -25320,7 +25316,7 @@ zftl_do_gc:
 	movs	r3, #0
 	b	.L3922
 .L3833:
-	movw	r2, #2455
+	movw	r2, #2454
 	ldr	r1, .L3930+12
 	ldr	r0, .L3930+16
 	bl	printf
@@ -27970,7 +27966,7 @@ zftl_debug:
 	.align	1
 	.set	.LANCHOR198,. + 0
 	.type	zftl_nand_flash_para_tbl, %object
-	.size	zftl_nand_flash_para_tbl, 1216
+	.size	zftl_nand_flash_para_tbl, 1248
 zftl_nand_flash_para_tbl:
 	.byte	6
 	.byte	-104
@@ -28784,6 +28780,34 @@ zftl_nand_flash_para_tbl:
 	.byte	0
 	.byte	0
 	.byte	0
+	.byte	5
+	.byte	44
+	.byte	-124
+	.byte	100
+	.byte	60
+	.byte	-87
+	.byte	4
+	.byte	4
+	.byte	1
+	.byte	32
+	.short	512
+	.byte	2
+	.byte	2
+	.short	1024
+	.short	479
+	.byte	3
+	.byte	17
+	.byte	40
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.short	512
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
 	.byte	6
 	.byte	-83
 	.byte	-34
@@ -29036,389 +29060,389 @@ zftl_nand_flash_para_tbl:
 	.byte	0
 	.byte	0
 	.byte	0
-	.section	.rodata.__func__.10115,"a",%progbits
+	.section	.rodata.__func__.10151,"a",%progbits
 	.set	.LANCHOR139,. + 0
-	.type	__func__.10115, %object
-	.size	__func__.10115, 20
-__func__.10115:
+	.type	__func__.10151, %object
+	.size	__func__.10151, 20
+__func__.10151:
 	.ascii	"flash_die_info_init\000"
-	.section	.rodata.__func__.10125,"a",%progbits
+	.section	.rodata.__func__.10161,"a",%progbits
 	.set	.LANCHOR15,. + 0
-	.type	__func__.10125, %object
-	.size	__func__.10125, 22
-__func__.10125:
+	.type	__func__.10161, %object
+	.size	__func__.10161, 22
+__func__.10161:
 	.ascii	"nand_flash_print_info\000"
-	.section	.rodata.__func__.10170,"a",%progbits
+	.section	.rodata.__func__.10206,"a",%progbits
 	.set	.LANCHOR197,. + 0
-	.type	__func__.10170, %object
-	.size	__func__.10170, 16
-__func__.10170:
+	.type	__func__.10206, %object
+	.size	__func__.10206, 16
+__func__.10206:
 	.ascii	"nand_flash_init\000"
-	.section	.rodata.__func__.10193,"a",%progbits
+	.section	.rodata.__func__.10229,"a",%progbits
 	.set	.LANCHOR149,. + 0
-	.type	__func__.10193, %object
-	.size	__func__.10193, 11
-__func__.10193:
+	.type	__func__.10229, %object
+	.size	__func__.10229, 11
+__func__.10229:
 	.ascii	"nandc_init\000"
-	.section	.rodata.__func__.10362,"a",%progbits
+	.section	.rodata.__func__.10398,"a",%progbits
 	.set	.LANCHOR53,. + 0
-	.type	__func__.10362, %object
-	.size	__func__.10362, 13
-__func__.10362:
+	.type	__func__.10398, %object
+	.size	__func__.10398, 13
+__func__.10398:
 	.ascii	"buf_add_tail\000"
-	.section	.rodata.__func__.10375,"a",%progbits
+	.section	.rodata.__func__.10411,"a",%progbits
 	.set	.LANCHOR55,. + 0
-	.type	__func__.10375, %object
-	.size	__func__.10375, 10
-__func__.10375:
+	.type	__func__.10411, %object
+	.size	__func__.10411, 10
+__func__.10411:
 	.ascii	"buf_alloc\000"
-	.section	.rodata.__func__.10389,"a",%progbits
+	.section	.rodata.__func__.10425,"a",%progbits
 	.set	.LANCHOR56,. + 0
-	.type	__func__.10389, %object
-	.size	__func__.10389, 16
-__func__.10389:
+	.type	__func__.10425, %object
+	.size	__func__.10425, 16
+__func__.10425:
 	.ascii	"buf_remove_free\000"
-	.section	.rodata.__func__.10402,"a",%progbits
+	.section	.rodata.__func__.10438,"a",%progbits
 	.set	.LANCHOR196,. + 0
-	.type	__func__.10402, %object
-	.size	__func__.10402, 20
-__func__.10402:
+	.type	__func__.10438, %object
+	.size	__func__.10438, 20
+__func__.10438:
 	.ascii	"flash_info_blk_init\000"
-	.section	.rodata.__func__.10413,"a",%progbits
+	.section	.rodata.__func__.10449,"a",%progbits
 	.set	.LANCHOR148,. + 0
-	.type	__func__.10413, %object
-	.size	__func__.10413, 21
-__func__.10413:
+	.type	__func__.10449, %object
+	.size	__func__.10449, 21
+__func__.10449:
 	.ascii	"flash_info_data_init\000"
-	.section	.rodata.__func__.10435,"a",%progbits
+	.section	.rodata.__func__.10471,"a",%progbits
 	.set	.LANCHOR193,. + 0
-	.type	__func__.10435, %object
-	.size	__func__.10435, 17
-__func__.10435:
+	.type	__func__.10471, %object
+	.size	__func__.10471, 17
+__func__.10471:
 	.ascii	"flash_info_flush\000"
-	.section	.rodata.__func__.10511,"a",%progbits
+	.section	.rodata.__func__.10547,"a",%progbits
 	.set	.LANCHOR143,. + 0
-	.type	__func__.10511, %object
-	.size	__func__.10511, 17
-__func__.10511:
+	.type	__func__.10547, %object
+	.size	__func__.10547, 17
+__func__.10547:
 	.ascii	"lpa_rebuild_hash\000"
-	.section	.rodata.__func__.10558,"a",%progbits
+	.section	.rodata.__func__.10594,"a",%progbits
 	.set	.LANCHOR216,. + 0
-	.type	__func__.10558, %object
-	.size	__func__.10558, 17
-__func__.10558:
+	.type	__func__.10594, %object
+	.size	__func__.10594, 17
+__func__.10594:
 	.ascii	"ftl_write_commit\000"
-	.section	.rodata.__func__.10576,"a",%progbits
+	.section	.rodata.__func__.10612,"a",%progbits
 	.set	.LANCHOR122,. + 0
-	.type	__func__.10576, %object
-	.size	__func__.10576, 14
-__func__.10576:
+	.type	__func__.10612, %object
+	.size	__func__.10612, 14
+__func__.10612:
 	.ascii	"ftl_write_buf\000"
-	.section	.rodata.__func__.10621,"a",%progbits
+	.section	.rodata.__func__.10657,"a",%progbits
 	.set	.LANCHOR125,. + 0
-	.type	__func__.10621, %object
-	.size	__func__.10621, 18
-__func__.10621:
+	.type	__func__.10657, %object
+	.size	__func__.10657, 18
+__func__.10657:
 	.ascii	"zftl_add_read_buf\000"
-	.section	.rodata.__func__.10654,"a",%progbits
+	.section	.rodata.__func__.10690,"a",%progbits
 	.set	.LANCHOR213,. + 0
-	.type	__func__.10654, %object
-	.size	__func__.10654, 10
-__func__.10654:
+	.type	__func__.10690, %object
+	.size	__func__.10690, 10
+__func__.10690:
 	.ascii	"zftl_read\000"
-	.section	.rodata.__func__.10685,"a",%progbits
+	.section	.rodata.__func__.10721,"a",%progbits
 	.set	.LANCHOR222,. + 0
-	.type	__func__.10685, %object
-	.size	__func__.10685, 13
-__func__.10685:
+	.type	__func__.10721, %object
+	.size	__func__.10721, 13
+__func__.10721:
 	.ascii	"_ftl_discard\000"
-	.section	.rodata.__func__.10832,"a",%progbits
+	.section	.rodata.__func__.10868,"a",%progbits
 	.set	.LANCHOR61,. + 0
-	.type	__func__.10832, %object
-	.size	__func__.10832, 12
-__func__.10832:
+	.type	__func__.10868, %object
+	.size	__func__.10868, 12
+__func__.10868:
 	.ascii	"gc_add_sblk\000"
-	.section	.rodata.__func__.10879,"a",%progbits
+	.section	.rodata.__func__.10915,"a",%progbits
 	.set	.LANCHOR214,. + 0
-	.type	__func__.10879, %object
-	.size	__func__.10879, 21
-__func__.10879:
+	.type	__func__.10915, %object
+	.size	__func__.10915, 21
+__func__.10915:
 	.ascii	"gc_check_data_one_wl\000"
-	.section	.rodata.__func__.10913,"a",%progbits
+	.section	.rodata.__func__.10949,"a",%progbits
 	.set	.LANCHOR209,. + 0
-	.type	__func__.10913, %object
-	.size	__func__.10913, 22
-__func__.10913:
+	.type	__func__.10949, %object
+	.size	__func__.10949, 22
+__func__.10949:
 	.ascii	"gc_update_l2p_map_new\000"
-	.section	.rodata.__func__.10926,"a",%progbits
+	.section	.rodata.__func__.10962,"a",%progbits
 	.set	.LANCHOR70,. + 0
-	.type	__func__.10926, %object
-	.size	__func__.10926, 19
-__func__.10926:
+	.type	__func__.10962, %object
+	.size	__func__.10962, 19
+__func__.10962:
 	.ascii	"gc_write_completed\000"
-	.section	.rodata.__func__.10955,"a",%progbits
+	.section	.rodata.__func__.10991,"a",%progbits
 	.set	.LANCHOR218,. + 0
-	.type	__func__.10955, %object
-	.size	__func__.10955, 16
-__func__.10955:
+	.type	__func__.10991, %object
+	.size	__func__.10991, 16
+__func__.10991:
 	.ascii	"gc_do_copy_back\000"
-	.section	.rodata.__func__.10977,"a",%progbits
+	.section	.rodata.__func__.11013,"a",%progbits
 	.set	.LANCHOR119,. + 0
-	.type	__func__.10977, %object
-	.size	__func__.10977, 16
-__func__.10977:
+	.type	__func__.11013, %object
+	.size	__func__.11013, 16
+__func__.11013:
 	.ascii	"gc_free_src_blk\000"
-	.section	.rodata.__func__.11021,"a",%progbits
+	.section	.rodata.__func__.11057,"a",%progbits
 	.set	.LANCHOR210,. + 0
-	.type	__func__.11021, %object
-	.size	__func__.11021, 16
-__func__.11021:
+	.type	__func__.11057, %object
+	.size	__func__.11057, 16
+__func__.11057:
 	.ascii	"gc_scan_src_blk\000"
-	.section	.rodata.__func__.11079,"a",%progbits
+	.section	.rodata.__func__.11115,"a",%progbits
 	.set	.LANCHOR211,. + 0
-	.type	__func__.11079, %object
-	.size	__func__.11079, 20
-__func__.11079:
+	.type	__func__.11115, %object
+	.size	__func__.11115, 20
+__func__.11115:
 	.ascii	"gc_scan_static_data\000"
-	.section	.rodata.__func__.11146,"a",%progbits
+	.section	.rodata.__func__.11182,"a",%progbits
 	.set	.LANCHOR220,. + 0
-	.type	__func__.11146, %object
-	.size	__func__.11146, 11
-__func__.11146:
+	.type	__func__.11182, %object
+	.size	__func__.11182, 11
+__func__.11182:
 	.ascii	"zftl_do_gc\000"
-	.section	.rodata.__func__.11239,"a",%progbits
+	.section	.rodata.__func__.11275,"a",%progbits
 	.set	.LANCHOR5,. + 0
-	.type	__func__.11239, %object
-	.size	__func__.11239, 18
-__func__.11239:
+	.type	__func__.11275, %object
+	.size	__func__.11275, 18
+__func__.11275:
 	.ascii	"_list_remove_node\000"
-	.section	.rodata.__func__.11264,"a",%progbits
+	.section	.rodata.__func__.11300,"a",%progbits
 	.set	.LANCHOR11,. + 0
-	.type	__func__.11264, %object
-	.size	__func__.11264, 23
-__func__.11264:
+	.type	__func__.11300, %object
+	.size	__func__.11300, 23
+__func__.11300:
 	.ascii	"_list_update_data_list\000"
-	.section	.rodata.__func__.11372,"a",%progbits
+	.section	.rodata.__func__.11408,"a",%progbits
 	.set	.LANCHOR180,. + 0
-	.type	__func__.11372, %object
-	.size	__func__.11372, 15
-__func__.11372:
+	.type	__func__.11408, %object
+	.size	__func__.11408, 15
+__func__.11408:
 	.ascii	"ftl_info_flush\000"
-	.section	.rodata.__func__.11404,"a",%progbits
+	.section	.rodata.__func__.11440,"a",%progbits
 	.set	.LANCHOR128,. + 0
-	.type	__func__.11404, %object
-	.size	__func__.11404, 15
-__func__.11404:
+	.type	__func__.11440, %object
+	.size	__func__.11440, 15
+__func__.11440:
 	.ascii	"ftl_alloc_sblk\000"
-	.section	.rodata.__func__.11446,"a",%progbits
+	.section	.rodata.__func__.11482,"a",%progbits
 	.set	.LANCHOR105,. + 0
-	.type	__func__.11446, %object
-	.size	__func__.11446, 18
-__func__.11446:
+	.type	__func__.11482, %object
+	.size	__func__.11482, 18
+__func__.11482:
 	.ascii	"ftl_alloc_sys_blk\000"
-	.section	.rodata.__func__.11456,"a",%progbits
+	.section	.rodata.__func__.11492,"a",%progbits
 	.set	.LANCHOR106,. + 0
-	.type	__func__.11456, %object
-	.size	__func__.11456, 17
-__func__.11456:
+	.type	__func__.11492, %object
+	.size	__func__.11492, 17
+__func__.11492:
 	.ascii	"ftl_free_sys_blk\000"
-	.section	.rodata.__func__.11491,"a",%progbits
+	.section	.rodata.__func__.11527,"a",%progbits
 	.set	.LANCHOR212,. + 0
-	.type	__func__.11491, %object
-	.size	__func__.11491, 14
-__func__.11491:
+	.type	__func__.11527, %object
+	.size	__func__.11527, 14
+__func__.11527:
 	.ascii	"ftl_sblk_dump\000"
-	.section	.rodata.__func__.11515,"a",%progbits
+	.section	.rodata.__func__.11551,"a",%progbits
 	.set	.LANCHOR201,. + 0
-	.type	__func__.11515, %object
-	.size	__func__.11515, 16
-__func__.11515:
+	.type	__func__.11551, %object
+	.size	__func__.11551, 16
+__func__.11551:
 	.ascii	"ftl_sysblk_dump\000"
-	.section	.rodata.__func__.11537,"a",%progbits
+	.section	.rodata.__func__.11573,"a",%progbits
 	.set	.LANCHOR189,. + 0
-	.type	__func__.11537, %object
-	.size	__func__.11537, 23
-__func__.11537:
+	.type	__func__.11573, %object
+	.size	__func__.11573, 23
+__func__.11573:
 	.ascii	"ftl_open_sblk_recovery\000"
-	.section	.rodata.__func__.11567,"a",%progbits
+	.section	.rodata.__func__.11603,"a",%progbits
 	.set	.LANCHOR107,. + 0
-	.type	__func__.11567, %object
-	.size	__func__.11567, 23
-__func__.11567:
+	.type	__func__.11603, %object
+	.size	__func__.11603, 23
+__func__.11603:
 	.ascii	"ftl_get_ppa_from_index\000"
-	.section	.rodata.__func__.11588,"a",%progbits
+	.section	.rodata.__func__.11624,"a",%progbits
 	.set	.LANCHOR215,. + 0
-	.type	__func__.11588, %object
-	.size	__func__.11588, 19
-__func__.11588:
+	.type	__func__.11624, %object
+	.size	__func__.11624, 19
+__func__.11624:
 	.ascii	"ftl_update_l2p_map\000"
-	.section	.rodata.__func__.11607,"a",%progbits
+	.section	.rodata.__func__.11643,"a",%progbits
 	.set	.LANCHOR111,. + 0
-	.type	__func__.11607, %object
-	.size	__func__.11607, 22
-__func__.11607:
+	.type	__func__.11643, %object
+	.size	__func__.11643, 22
+__func__.11643:
 	.ascii	"ftl_get_new_free_page\000"
-	.section	.rodata.__func__.11618,"a",%progbits
+	.section	.rodata.__func__.11654,"a",%progbits
 	.set	.LANCHOR112,. + 0
-	.type	__func__.11618, %object
-	.size	__func__.11618, 22
-__func__.11618:
+	.type	__func__.11654, %object
+	.size	__func__.11654, 22
+__func__.11654:
 	.ascii	"ftl_ext_alloc_new_blk\000"
-	.section	.rodata.__func__.11643,"a",%progbits
+	.section	.rodata.__func__.11679,"a",%progbits
 	.set	.LANCHOR184,. + 0
-	.type	__func__.11643, %object
-	.size	__func__.11643, 19
-__func__.11643:
+	.type	__func__.11679, %object
+	.size	__func__.11679, 19
+__func__.11679:
 	.ascii	"ftl_ext_info_flush\000"
-	.section	.rodata.__func__.11655,"a",%progbits
+	.section	.rodata.__func__.11691,"a",%progbits
 	.set	.LANCHOR185,. + 0
-	.type	__func__.11655, %object
-	.size	__func__.11655, 18
-__func__.11655:
+	.type	__func__.11691, %object
+	.size	__func__.11691, 18
+__func__.11691:
 	.ascii	"ftl_ext_info_init\000"
-	.section	.rodata.__func__.11694,"a",%progbits
+	.section	.rodata.__func__.11730,"a",%progbits
 	.set	.LANCHOR186,. + 0
-	.type	__func__.11694, %object
-	.size	__func__.11694, 25
-__func__.11694:
+	.type	__func__.11730, %object
+	.size	__func__.11730, 25
+__func__.11730:
 	.ascii	"ftl_low_format_data_init\000"
-	.section	.rodata.__func__.11709,"a",%progbits
+	.section	.rodata.__func__.11745,"a",%progbits
 	.set	.LANCHOR188,. + 0
-	.type	__func__.11709, %object
-	.size	__func__.11709, 15
-__func__.11709:
+	.type	__func__.11745, %object
+	.size	__func__.11745, 15
+__func__.11745:
 	.ascii	"ftl_low_format\000"
-	.section	.rodata.__func__.11757,"a",%progbits
+	.section	.rodata.__func__.11793,"a",%progbits
 	.set	.LANCHOR177,. + 0
-	.type	__func__.11757, %object
-	.size	__func__.11757, 14
-__func__.11757:
+	.type	__func__.11793, %object
+	.size	__func__.11793, 14
+__func__.11793:
 	.ascii	"ftl_prog_page\000"
-	.section	.rodata.__func__.11879,"a",%progbits
+	.section	.rodata.__func__.11915,"a",%progbits
 	.set	.LANCHOR167,. + 0
-	.type	__func__.11879, %object
-	.size	__func__.11879, 31
-__func__.11879:
+	.type	__func__.11915, %object
+	.size	__func__.11915, 31
+__func__.11915:
 	.ascii	"queue_wait_first_req_completed\000"
-	.section	.rodata.__func__.11933,"a",%progbits
+	.section	.rodata.__func__.11969,"a",%progbits
 	.set	.LANCHOR173,. + 0
-	.type	__func__.11933, %object
-	.size	__func__.11933, 15
-__func__.11933:
+	.type	__func__.11969, %object
+	.size	__func__.11969, 15
+__func__.11969:
 	.ascii	"sblk_prog_page\000"
-	.section	.rodata.__func__.11960,"a",%progbits
+	.section	.rodata.__func__.11996,"a",%progbits
 	.set	.LANCHOR169,. + 0
-	.type	__func__.11960, %object
-	.size	__func__.11960, 15
-__func__.11960:
+	.type	__func__.11996, %object
+	.size	__func__.11996, 15
+__func__.11996:
 	.ascii	"sblk_read_page\000"
-	.section	.rodata.__func__.12020,"a",%progbits
+	.section	.rodata.__func__.12056,"a",%progbits
 	.set	.LANCHOR202,. + 0
-	.type	__func__.12020, %object
-	.size	__func__.12020, 16
-__func__.12020:
+	.type	__func__.12056, %object
+	.size	__func__.12056, 16
+__func__.12056:
 	.ascii	"load_l2p_region\000"
-	.section	.rodata.__func__.12034,"a",%progbits
+	.section	.rodata.__func__.12070,"a",%progbits
 	.set	.LANCHOR147,. + 0
-	.type	__func__.12034, %object
-	.size	__func__.12034, 13
-__func__.12034:
+	.type	__func__.12070, %object
+	.size	__func__.12070, 13
+__func__.12070:
 	.ascii	"pm_free_sblk\000"
-	.section	.rodata.__func__.12054,"a",%progbits
+	.section	.rodata.__func__.12090,"a",%progbits
 	.set	.LANCHOR204,. + 0
-	.type	__func__.12054, %object
-	.size	__func__.12054, 6
-__func__.12054:
+	.type	__func__.12090, %object
+	.size	__func__.12090, 6
+__func__.12090:
 	.ascii	"pm_gc\000"
-	.section	.rodata.__func__.12070,"a",%progbits
+	.section	.rodata.__func__.12106,"a",%progbits
 	.set	.LANCHOR131,. + 0
-	.type	__func__.12070, %object
-	.size	__func__.12070, 17
-__func__.12070:
+	.type	__func__.12106, %object
+	.size	__func__.12106, 17
+__func__.12106:
 	.ascii	"pm_alloc_new_blk\000"
-	.section	.rodata.__func__.12080,"a",%progbits
+	.section	.rodata.__func__.12116,"a",%progbits
 	.set	.LANCHOR190,. + 0
-	.type	__func__.12080, %object
-	.size	__func__.12080, 14
-__func__.12080:
+	.type	__func__.12116, %object
+	.size	__func__.12116, 14
+__func__.12116:
 	.ascii	"pm_write_page\000"
-	.section	.rodata.__func__.12098,"a",%progbits
+	.section	.rodata.__func__.12134,"a",%progbits
 	.set	.LANCHOR134,. + 0
-	.type	__func__.12098, %object
-	.size	__func__.12098, 21
-__func__.12098:
+	.type	__func__.12134, %object
+	.size	__func__.12134, 21
+__func__.12134:
 	.ascii	"pm_select_ram_region\000"
-	.section	.rodata.__func__.9598,"a",%progbits
+	.section	.rodata.__func__.9634,"a",%progbits
 	.set	.LANCHOR161,. + 0
-	.type	__func__.9598, %object
-	.size	__func__.9598, 19
-__func__.9598:
+	.type	__func__.9634, %object
+	.size	__func__.9634, 19
+__func__.9634:
 	.ascii	"flash_read_page_en\000"
-	.section	.rodata.__func__.9640,"a",%progbits
+	.section	.rodata.__func__.9676,"a",%progbits
 	.set	.LANCHOR175,. + 0
-	.type	__func__.9640, %object
-	.size	__func__.9640, 19
-__func__.9640:
+	.type	__func__.9676, %object
+	.size	__func__.9676, 19
+__func__.9676:
 	.ascii	"flash_prog_page_en\000"
-	.section	.rodata.__func__.9656,"a",%progbits
+	.section	.rodata.__func__.9692,"a",%progbits
 	.set	.LANCHOR38,. + 0
-	.type	__func__.9656, %object
-	.size	__func__.9656, 26
-__func__.9656:
+	.type	__func__.9692, %object
+	.size	__func__.9692, 26
+__func__.9692:
 	.ascii	"flash_erase_duplane_block\000"
-	.section	.rodata.__func__.9667,"a",%progbits
+	.section	.rodata.__func__.9703,"a",%progbits
 	.set	.LANCHOR40,. + 0
-	.type	__func__.9667, %object
-	.size	__func__.9667, 21
-__func__.9667:
+	.type	__func__.9703, %object
+	.size	__func__.9703, 21
+__func__.9703:
 	.ascii	"flash_erase_block_en\000"
-	.section	.rodata.__func__.9681,"a",%progbits
+	.section	.rodata.__func__.9717,"a",%progbits
 	.set	.LANCHOR29,. + 0
-	.type	__func__.9681, %object
-	.size	__func__.9681, 28
-__func__.9681:
+	.type	__func__.9717, %object
+	.size	__func__.9717, 28
+__func__.9717:
 	.ascii	"flash_wait_device_ready_raw\000"
-	.section	.rodata.__func__.9705,"a",%progbits
+	.section	.rodata.__func__.9741,"a",%progbits
 	.set	.LANCHOR170,. + 0
-	.type	__func__.9705, %object
-	.size	__func__.9705, 26
-__func__.9705:
+	.type	__func__.9741, %object
+	.size	__func__.9741, 26
+__func__.9741:
 	.ascii	"flash_start_tlc_page_prog\000"
-	.section	.rodata.__func__.9716,"a",%progbits
+	.section	.rodata.__func__.9752,"a",%progbits
 	.set	.LANCHOR171,. + 0
-	.type	__func__.9716, %object
-	.size	__func__.9716, 29
-__func__.9716:
+	.type	__func__.9752, %object
+	.size	__func__.9752, 29
+__func__.9752:
 	.ascii	"flash_start_3d_mlc_page_prog\000"
-	.section	.rodata.__func__.9734,"a",%progbits
+	.section	.rodata.__func__.9770,"a",%progbits
 	.set	.LANCHOR172,. + 0
-	.type	__func__.9734, %object
-	.size	__func__.9734, 22
-__func__.9734:
+	.type	__func__.9770, %object
+	.size	__func__.9770, 22
+__func__.9770:
 	.ascii	"flash_start_page_prog\000"
-	.section	.rodata.__func__.9745,"a",%progbits
+	.section	.rodata.__func__.9781,"a",%progbits
 	.set	.LANCHOR33,. + 0
-	.type	__func__.9745, %object
-	.size	__func__.9745, 22
-__func__.9745:
+	.type	__func__.9781, %object
+	.size	__func__.9781, 22
+__func__.9781:
 	.ascii	"flash_start_page_read\000"
-	.section	.rodata.__func__.9758,"a",%progbits
+	.section	.rodata.__func__.9794,"a",%progbits
 	.set	.LANCHOR165,. + 0
-	.type	__func__.9758, %object
-	.size	__func__.9758, 31
-__func__.9758:
+	.type	__func__.9794, %object
+	.size	__func__.9794, 31
+__func__.9794:
 	.ascii	"flash_complete_plane_page_read\000"
-	.section	.rodata.__func__.9770,"a",%progbits
+	.section	.rodata.__func__.9806,"a",%progbits
 	.set	.LANCHOR41,. + 0
-	.type	__func__.9770, %object
-	.size	__func__.9770, 23
-__func__.9770:
+	.type	__func__.9806, %object
+	.size	__func__.9806, 23
+__func__.9806:
 	.ascii	"flash_start_plane_read\000"
-	.section	.rodata.__func__.9783,"a",%progbits
+	.section	.rodata.__func__.9819,"a",%progbits
 	.set	.LANCHOR166,. + 0
-	.type	__func__.9783, %object
-	.size	__func__.9783, 25
-__func__.9783:
+	.type	__func__.9819, %object
+	.size	__func__.9819, 25
+__func__.9819:
 	.ascii	"flash_complete_page_read\000"
 	.section	.rodata._list_remove_node.str1.1,"aMS",%progbits,1
 .LC0:
@@ -30702,7 +30726,7 @@ toshiba_ref_value:
 	.ascii	"swl_slc_free_mini_ec_blk alloc sblk %x\012\000"
 	.section	.rodata.zftl_init.str1.1,"aMS",%progbits,1
 .LC196:
-	.ascii	"FTL version: 6.0.16 20190427\000"
+	.ascii	"FTL version: 6.0.16 20190603\000"
 .LC197:
 	.ascii	"_c_user_data_density := %d\012\000"
 .LC198:
diff --git a/drivers/rknand/rk_zftl_arm_v8.S b/drivers/rknand/rk_zftl_arm_v8.S
index 344fb75b7b..ad5090cdd5 100644
--- a/drivers/rknand/rk_zftl_arm_v8.S
+++ b/drivers/rknand/rk_zftl_arm_v8.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2019-04-27
+ * date: 2019-06-03
  */
 	.arch armv8-a
 	.file	"rk_zftl_arm_v8.S"
@@ -1152,7 +1152,7 @@ flash_wait_device_ready_raw:
 	bhi	.L256
 	adrp	x1, .LANCHOR29
 	adrp	x0, .LC0
-	mov	w2, 677
+	mov	w2, 678
 	add	x1, x1, :lo12:.LANCHOR29
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -1438,7 +1438,7 @@ flash_start_page_read:
 	bhi	.L330
 	adrp	x1, .LANCHOR33
 	adrp	x0, .LC0
-	mov	w2, 845
+	mov	w2, 846
 	add	x1, x1, :lo12:.LANCHOR33
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -1706,7 +1706,7 @@ flash_erase_duplane_block:
 	bhi	.L362
 	adrp	x1, .LANCHOR38
 	adrp	x0, .LC0
-	mov	w2, 588
+	mov	w2, 589
 	add	x1, x1, :lo12:.LANCHOR38
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -1815,7 +1815,7 @@ flash_erase_block_en:
 	bhi	.L377
 	adrp	x1, .LANCHOR40
 	adrp	x0, .LC0
-	mov	w2, 633
+	mov	w2, 634
 	add	x1, x1, :lo12:.LANCHOR40
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -1966,7 +1966,7 @@ flash_start_plane_read:
 	bhi	.L397
 	adrp	x1, .LANCHOR41
 	adrp	x0, .LC0
-	mov	w2, 940
+	mov	w2, 941
 	add	x1, x1, :lo12:.LANCHOR41
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -2575,21 +2575,19 @@ nandc_xfer_start:
 	csel	w19, w0, w19, ne
 .L499:
 	add	x21, x4, :lo12:.LANCHOR47
-	add	x0, x2, 63
-	and	w20, w20, 63
-	and	x0, x0, -64
-	ubfiz	x1, x20, 10, 6
-	ubfiz	x20, x20, 2, 6
-	add	x1, x0, x1
-	stp	x2, x3, [x21, 8]
+	add	x1, x2, 63
+	and	x1, x1, -64
+	ubfiz	x20, x20, 10, 6
 	and	x0, x2, -64
+	add	x1, x1, x20
+	stp	x2, x3, [x21, 8]
 	stp	w2, w3, [x21, 24]
 	bl	flush_dcache_range
 	ldr	x0, [x21, 16]
 	add	x1, x0, 63
 	and	x0, x0, -64
 	and	x1, x1, -64
-	add	x1, x1, x20
+	add	x1, x1, 64
 	bl	flush_dcache_range
 	ldr	x1, [x24, #:lo12:.LANCHOR13]
 	mov	w0, 1
@@ -3250,7 +3248,7 @@ gc_add_sblk:
 	bhi	.L606
 	adrp	x1, .LANCHOR61
 	adrp	x0, .LC0
-	mov	w2, 339
+	mov	w2, 338
 	add	x1, x1, :lo12:.LANCHOR61
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -3287,7 +3285,7 @@ gc_add_sblk:
 	cbz	w21, .L628
 	adrp	x1, .LANCHOR61
 	adrp	x0, .LC0
-	mov	w2, 344
+	mov	w2, 343
 	add	x1, x1, :lo12:.LANCHOR61
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -3530,7 +3528,7 @@ gc_write_completed:
 	bl	printf
 	adrp	x1, .LANCHOR70
 	adrp	x0, .LC0
-	mov	w2, 673
+	mov	w2, 672
 	add	x1, x1, :lo12:.LANCHOR70
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -3569,7 +3567,7 @@ gc_write_completed:
 	beq	.L651
 	adrp	x1, .LANCHOR70
 	adrp	x0, .LC0
-	mov	w2, 682
+	mov	w2, 681
 	add	x1, x1, :lo12:.LANCHOR70
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -6160,7 +6158,7 @@ gc_free_src_blk:
 .L1062:
 	adrp	x1, .LANCHOR119
 	adrp	x0, .LC0
-	mov	w2, 932
+	mov	w2, 931
 	add	x1, x1, :lo12:.LANCHOR119
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -8884,8 +8882,7 @@ buf_init:
 	lsl	w0, w0, 9
 	bl	ftl_malloc
 	str	x0, [x19, -56]
-	ldrb	w0, [x22]
-	lsl	w0, w0, 1
+	mov	w0, 64
 	bl	ftl_malloc
 	str	x0, [x19, -40]
 	cmp	w21, 32
@@ -11041,7 +11038,7 @@ flash_read_page_en:
 	bhi	.L1866
 	adrp	x1, .LANCHOR161
 	adrp	x0, .LC0
-	mov	w2, 398
+	mov	w2, 399
 	add	x1, x1, :lo12:.LANCHOR161
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -11328,7 +11325,7 @@ flash_complete_plane_page_read:
 	bhi	.L1913
 	adrp	x1, .LANCHOR165
 	adrp	x0, .LC0
-	mov	w2, 886
+	mov	w2, 887
 	add	x1, x1, :lo12:.LANCHOR165
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -11439,7 +11436,7 @@ flash_complete_page_read:
 	bhi	.L1928
 	adrp	x1, .LANCHOR166
 	adrp	x0, .LC0
-	mov	w2, 1008
+	mov	w2, 1009
 	add	x1, x1, :lo12:.LANCHOR166
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -13253,7 +13250,7 @@ flash_start_tlc_page_prog:
 	bhi	.L2254
 	adrp	x1, .LANCHOR170
 	adrp	x0, .LC0
-	mov	w2, 726
+	mov	w2, 727
 	add	x1, x1, :lo12:.LANCHOR170
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -13576,7 +13573,7 @@ flash_start_3d_mlc_page_prog:
 	bhi	.L2275
 	adrp	x1, .LANCHOR171
 	adrp	x0, .LC0
-	mov	w2, 756
+	mov	w2, 757
 	add	x1, x1, :lo12:.LANCHOR171
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -13745,7 +13742,7 @@ flash_start_page_prog:
 	bhi	.L2284
 	adrp	x1, .LANCHOR172
 	adrp	x0, .LC0
-	mov	w2, 803
+	mov	w2, 804
 	add	x1, x1, :lo12:.LANCHOR172
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -14055,7 +14052,7 @@ flash_prog_page_en:
 	bhi	.L2337
 	adrp	x1, .LANCHOR175
 	adrp	x0, .LC0
-	mov	w2, 546
+	mov	w2, 547
 	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -14166,7 +14163,7 @@ flash_prog_page_en:
 	adrp	x0, .LC141
 	add	x0, x0, :lo12:.LC141
 	bl	printf
-	mov	w2, 577
+	mov	w2, 578
 	adrp	x1, .LANCHOR175
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR175
@@ -16749,7 +16746,7 @@ nand_flash_init:
 	adrp	x2, .LANCHOR197
 	adrp	x0, .LC90
 	add	x2, x2, :lo12:.LANCHOR197
-	mov	w1, 2490
+	mov	w1, 2491
 	add	x0, x0, :lo12:.LC90
 	bl	printf
 .L2740:
@@ -16887,7 +16884,7 @@ nand_flash_init:
 	adrp	x2, .LANCHOR197
 	adrp	x0, .LC90
 	add	x2, x2, :lo12:.LANCHOR197
-	mov	w1, 2515
+	mov	w1, 2516
 	add	x0, x0, :lo12:.LC90
 	bl	printf
 .L2753:
@@ -16992,7 +16989,7 @@ nand_flash_init:
 .L2747:
 	add	x10, x10, 1
 	add	x8, x8, 32
-	cmp	x10, 38
+	cmp	x10, 39
 	bne	.L2749
 	b	.L2744
 .L2759:
@@ -17045,7 +17042,7 @@ nand_flash_init:
 	adrp	x2, .LANCHOR197
 	adrp	x0, .LC90
 	add	x2, x2, :lo12:.LANCHOR197
-	mov	w1, 2573
+	mov	w1, 2574
 	add	x0, x0, :lo12:.LC90
 	bl	printf
 .L2766:
@@ -17069,7 +17066,7 @@ nand_flash_init:
 	adrp	x2, .LANCHOR197
 	adrp	x0, .LC90
 	add	x2, x2, :lo12:.LANCHOR197
-	mov	w1, 2605
+	mov	w1, 2606
 	add	x0, x0, :lo12:.LC90
 	bl	printf
 .L2770:
@@ -17130,7 +17127,7 @@ nand_flash_init:
 	adrp	x2, .LANCHOR197
 	adrp	x0, .LC90
 	add	x2, x2, :lo12:.LANCHOR197
-	mov	w1, 2671
+	mov	w1, 2672
 	add	x0, x0, :lo12:.LC90
 	bl	printf
 .L2775:
@@ -17975,18 +17972,16 @@ gc_recovery:
 	adrp	x0, .LANCHOR150
 	stp	x23, x24, [sp, 80]
 	strb	wzr, [x0, #:lo12:.LANCHOR150]
-	stp	x25, x26, [sp, 96]
-	stp	x27, x28, [sp, 112]
-	bl	gc_init
 	add	x0, x20, 80
 	ldrh	w1, [x20, 80]
 	str	x0, [x29, 176]
 	mov	w0, 65535
+	stp	x25, x26, [sp, 96]
 	cmp	w1, w0
-	ldr	x0, [x21, #:lo12:.LANCHOR10]
+	stp	x27, x28, [sp, 112]
 	beq	.L2901
-	mov	w1, -1
-	strh	w1, [x0, 130]
+	mov	w0, -1
+	strh	w0, [x20, 130]
 	mov	w0, 1
 	bl	buf_alloc
 	mov	x26, x0
@@ -18383,7 +18378,7 @@ gc_recovery:
 	bl	zftl_insert_data_list
 	b	.L2906
 .L2901:
-	ldrh	w0, [x0, 130]
+	ldrh	w0, [x20, 130]
 	cmp	w0, w1
 	beq	.L2900
 	adrp	x19, .LANCHOR102
@@ -18855,7 +18850,7 @@ gc_update_l2p_map_new:
 	beq	.L3035
 	adrp	x1, .LANCHOR209
 	adrp	x0, .LC0
-	mov	w2, 617
+	mov	w2, 616
 	add	x1, x1, :lo12:.LANCHOR209
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -19143,7 +19138,7 @@ gc_scan_src_blk:
 	bne	.L3081
 	adrp	x1, .LANCHOR210
 	adrp	x0, .LC0
-	mov	w2, 1052
+	mov	w2, 1051
 	add	x1, x1, :lo12:.LANCHOR210
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -19214,7 +19209,7 @@ gc_scan_src_blk:
 	cbz	w1, .L3088
 	adrp	x1, .LANCHOR210
 	adrp	x0, .LC0
-	mov	w2, 1072
+	mov	w2, 1071
 	add	x1, x1, :lo12:.LANCHOR210
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -19233,7 +19228,7 @@ gc_scan_src_blk:
 	bne	.L3089
 	adrp	x1, .LANCHOR210
 	adrp	x0, .LC0
-	mov	w2, 1080
+	mov	w2, 1079
 	add	x1, x1, :lo12:.LANCHOR210
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -19314,7 +19309,7 @@ gc_scan_src_blk:
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
 	beq	.L3093
-	mov	w2, 1113
+	mov	w2, 1112
 	adrp	x1, .LANCHOR210
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR210
@@ -19459,7 +19454,7 @@ gc_scan_static_data:
 	ldr	w1, [x1, 4]
 	cmp	w1, w0
 	beq	.L3122
-	mov	w2, 1552
+	mov	w2, 1551
 	mov	x1, x21
 	mov	x0, x22
 	bl	printf
@@ -20250,7 +20245,7 @@ gc_check_data_one_wl:
 	cbnz	x22, .L3223
 	adrp	x1, .LANCHOR214
 	adrp	x0, .LC0
-	mov	w2, 495
+	mov	w2, 494
 	add	x1, x1, :lo12:.LANCHOR214
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -20997,7 +20992,7 @@ gc_do_copy_back:
 	bne	.L3347
 	adrp	x1, .LANCHOR218
 	adrp	x0, .LC0
-	mov	w2, 732
+	mov	w2, 731
 	add	x1, x1, :lo12:.LANCHOR218
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -21448,7 +21443,7 @@ gc_do_copy_back:
 	bne	.L3369
 	adrp	x1, .LANCHOR218
 	adrp	x0, .LC0
-	mov	w2, 847
+	mov	w2, 846
 	add	x1, x1, :lo12:.LANCHOR218
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -21747,7 +21742,7 @@ zftl_do_gc:
 	mov	w4, w22
 	ldrb	w2, [x25, #:lo12:.LANCHOR76]
 	mov	w3, w21
-	mov	w1, 1983
+	mov	w1, 1982
 	ldrh	w7, [x0, 122]
 	ldrh	w6, [x0, 120]
 	ldrh	w5, [x0, 124]
@@ -21790,7 +21785,7 @@ zftl_do_gc:
 	ldrh	w5, [x20, 124]
 	mov	w3, w21
 	ldrb	w2, [x0, #:lo12:.LANCHOR76]
-	mov	w1, 1995
+	mov	w1, 1994
 	str	w25, [sp]
 	adrp	x0, .LC236
 	add	x0, x0, :lo12:.LC236
@@ -21832,7 +21827,7 @@ zftl_do_gc:
 	mov	w3, w21
 	adrp	x0, .LC237
 	mov	w2, 0
-	mov	w1, 2085
+	mov	w1, 2084
 	add	x0, x0, :lo12:.LC237
 	bl	printf
 .L3436:
@@ -22025,7 +22020,7 @@ zftl_do_gc:
 	adrp	x0, .LC237
 	mov	w3, w21
 	mov	w2, 0
-	mov	w1, 2115
+	mov	w1, 2114
 	add	x0, x0, :lo12:.LC237
 	bl	printf
 .L3480:
@@ -22253,7 +22248,7 @@ zftl_do_gc:
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, x4, lsl 1]
 	cbz	w0, .L3504
-	mov	w2, 2348
+	mov	w2, 2347
 	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR220
@@ -22293,7 +22288,7 @@ zftl_do_gc:
 	cbz	w1, .L3507
 	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
-	mov	w2, 2376
+	mov	w2, 2375
 	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -22360,7 +22355,7 @@ zftl_do_gc:
 	beq	.L3513
 	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
-	mov	w2, 2410
+	mov	w2, 2409
 	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -22395,7 +22390,7 @@ zftl_do_gc:
 .L3515:
 	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
-	mov	w2, 2420
+	mov	w2, 2419
 	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -22448,7 +22443,7 @@ zftl_do_gc:
 	beq	.L3522
 	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
-	mov	w2, 2449
+	mov	w2, 2448
 	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -22569,7 +22564,7 @@ zftl_do_gc:
 	cbz	w1, .L3529
 	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
-	mov	w2, 2524
+	mov	w2, 2523
 	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -22617,7 +22612,7 @@ zftl_do_gc:
 	add	x24, x24, :lo12:.LANCHOR63
 	str	xzr, [x24, 8]
 	bl	flt_sys_flush
-	mov	w2, 2562
+	mov	w2, 2561
 	strb	wzr, [x19, #:lo12:.LANCHOR150]
 	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
@@ -22725,7 +22720,7 @@ zftl_do_gc:
 	strb	wzr, [x19, #:lo12:.LANCHOR150]
 	b	.L3544
 .L3521:
-	mov	w2, 2455
+	mov	w2, 2454
 	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR220
@@ -25284,7 +25279,7 @@ zftl_debug:
 	.align	3
 	.set	.LANCHOR198,. + 0
 	.type	zftl_nand_flash_para_tbl, %object
-	.size	zftl_nand_flash_para_tbl, 1216
+	.size	zftl_nand_flash_para_tbl, 1248
 zftl_nand_flash_para_tbl:
 	.byte	6
 	.byte	-104
@@ -26098,6 +26093,34 @@ zftl_nand_flash_para_tbl:
 	.byte	0
 	.byte	0
 	.byte	0
+	.byte	5
+	.byte	44
+	.byte	-124
+	.byte	100
+	.byte	60
+	.byte	-87
+	.byte	4
+	.byte	4
+	.byte	1
+	.byte	32
+	.hword	512
+	.byte	2
+	.byte	2
+	.hword	1024
+	.hword	479
+	.byte	3
+	.byte	17
+	.byte	40
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.hword	512
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
 	.byte	6
 	.byte	-83
 	.byte	-34
@@ -26350,453 +26373,453 @@ zftl_nand_flash_para_tbl:
 	.byte	0
 	.byte	0
 	.byte	0
-	.section	.rodata.__func__.10034,"a",@progbits
+	.section	.rodata.__func__.10032,"a",@progbits
 	.align	3
 	.set	.LANCHOR211,. + 0
-	.type	__func__.10034, %object
-	.size	__func__.10034, 20
-__func__.10034:
+	.type	__func__.10032, %object
+	.size	__func__.10032, 20
+__func__.10032:
 	.string	"gc_scan_static_data"
-	.section	.rodata.__func__.10101,"a",@progbits
+	.section	.rodata.__func__.10099,"a",@progbits
 	.align	3
 	.set	.LANCHOR220,. + 0
-	.type	__func__.10101, %object
-	.size	__func__.10101, 11
-__func__.10101:
+	.type	__func__.10099, %object
+	.size	__func__.10099, 11
+__func__.10099:
 	.string	"zftl_do_gc"
-	.section	.rodata.__func__.10194,"a",@progbits
+	.section	.rodata.__func__.10192,"a",@progbits
 	.align	3
 	.set	.LANCHOR5,. + 0
-	.type	__func__.10194, %object
-	.size	__func__.10194, 18
-__func__.10194:
+	.type	__func__.10192, %object
+	.size	__func__.10192, 18
+__func__.10192:
 	.string	"_list_remove_node"
-	.section	.rodata.__func__.10219,"a",@progbits
+	.section	.rodata.__func__.10217,"a",@progbits
 	.align	3
 	.set	.LANCHOR11,. + 0
-	.type	__func__.10219, %object
-	.size	__func__.10219, 23
-__func__.10219:
+	.type	__func__.10217, %object
+	.size	__func__.10217, 23
+__func__.10217:
 	.string	"_list_update_data_list"
-	.section	.rodata.__func__.10327,"a",@progbits
+	.section	.rodata.__func__.10325,"a",@progbits
 	.align	3
 	.set	.LANCHOR180,. + 0
-	.type	__func__.10327, %object
-	.size	__func__.10327, 15
-__func__.10327:
+	.type	__func__.10325, %object
+	.size	__func__.10325, 15
+__func__.10325:
 	.string	"ftl_info_flush"
-	.section	.rodata.__func__.10359,"a",@progbits
+	.section	.rodata.__func__.10357,"a",@progbits
 	.align	3
 	.set	.LANCHOR128,. + 0
-	.type	__func__.10359, %object
-	.size	__func__.10359, 15
-__func__.10359:
+	.type	__func__.10357, %object
+	.size	__func__.10357, 15
+__func__.10357:
 	.string	"ftl_alloc_sblk"
-	.section	.rodata.__func__.10401,"a",@progbits
+	.section	.rodata.__func__.10399,"a",@progbits
 	.align	3
 	.set	.LANCHOR105,. + 0
-	.type	__func__.10401, %object
-	.size	__func__.10401, 18
-__func__.10401:
+	.type	__func__.10399, %object
+	.size	__func__.10399, 18
+__func__.10399:
 	.string	"ftl_alloc_sys_blk"
-	.section	.rodata.__func__.10411,"a",@progbits
+	.section	.rodata.__func__.10409,"a",@progbits
 	.align	3
 	.set	.LANCHOR106,. + 0
-	.type	__func__.10411, %object
-	.size	__func__.10411, 17
-__func__.10411:
+	.type	__func__.10409, %object
+	.size	__func__.10409, 17
+__func__.10409:
 	.string	"ftl_free_sys_blk"
-	.section	.rodata.__func__.10446,"a",@progbits
+	.section	.rodata.__func__.10444,"a",@progbits
 	.align	3
 	.set	.LANCHOR212,. + 0
-	.type	__func__.10446, %object
-	.size	__func__.10446, 14
-__func__.10446:
+	.type	__func__.10444, %object
+	.size	__func__.10444, 14
+__func__.10444:
 	.string	"ftl_sblk_dump"
-	.section	.rodata.__func__.10470,"a",@progbits
+	.section	.rodata.__func__.10468,"a",@progbits
 	.align	3
 	.set	.LANCHOR201,. + 0
-	.type	__func__.10470, %object
-	.size	__func__.10470, 16
-__func__.10470:
+	.type	__func__.10468, %object
+	.size	__func__.10468, 16
+__func__.10468:
 	.string	"ftl_sysblk_dump"
-	.section	.rodata.__func__.10492,"a",@progbits
+	.section	.rodata.__func__.10490,"a",@progbits
 	.align	3
 	.set	.LANCHOR189,. + 0
-	.type	__func__.10492, %object
-	.size	__func__.10492, 23
-__func__.10492:
+	.type	__func__.10490, %object
+	.size	__func__.10490, 23
+__func__.10490:
 	.string	"ftl_open_sblk_recovery"
-	.section	.rodata.__func__.10522,"a",@progbits
+	.section	.rodata.__func__.10520,"a",@progbits
 	.align	3
 	.set	.LANCHOR107,. + 0
-	.type	__func__.10522, %object
-	.size	__func__.10522, 23
-__func__.10522:
+	.type	__func__.10520, %object
+	.size	__func__.10520, 23
+__func__.10520:
 	.string	"ftl_get_ppa_from_index"
-	.section	.rodata.__func__.10543,"a",@progbits
+	.section	.rodata.__func__.10541,"a",@progbits
 	.align	3
 	.set	.LANCHOR215,. + 0
-	.type	__func__.10543, %object
-	.size	__func__.10543, 19
-__func__.10543:
+	.type	__func__.10541, %object
+	.size	__func__.10541, 19
+__func__.10541:
 	.string	"ftl_update_l2p_map"
-	.section	.rodata.__func__.10562,"a",@progbits
+	.section	.rodata.__func__.10560,"a",@progbits
 	.align	3
 	.set	.LANCHOR111,. + 0
-	.type	__func__.10562, %object
-	.size	__func__.10562, 22
-__func__.10562:
+	.type	__func__.10560, %object
+	.size	__func__.10560, 22
+__func__.10560:
 	.string	"ftl_get_new_free_page"
-	.section	.rodata.__func__.10573,"a",@progbits
+	.section	.rodata.__func__.10571,"a",@progbits
 	.align	3
 	.set	.LANCHOR112,. + 0
-	.type	__func__.10573, %object
-	.size	__func__.10573, 22
-__func__.10573:
+	.type	__func__.10571, %object
+	.size	__func__.10571, 22
+__func__.10571:
 	.string	"ftl_ext_alloc_new_blk"
-	.section	.rodata.__func__.10598,"a",@progbits
+	.section	.rodata.__func__.10596,"a",@progbits
 	.align	3
 	.set	.LANCHOR184,. + 0
-	.type	__func__.10598, %object
-	.size	__func__.10598, 19
-__func__.10598:
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+	.size	__func__.10596, 19
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 	.string	"ftl_ext_info_flush"
-	.section	.rodata.__func__.10610,"a",@progbits
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 	.align	3
 	.set	.LANCHOR185,. + 0
-	.type	__func__.10610, %object
-	.size	__func__.10610, 18
-__func__.10610:
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+	.size	__func__.10608, 18
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 	.string	"ftl_ext_info_init"
-	.section	.rodata.__func__.10649,"a",@progbits
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 	.align	3
 	.set	.LANCHOR186,. + 0
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-	.size	__func__.10649, 25
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 	.string	"ftl_low_format_data_init"
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 	.align	3
 	.set	.LANCHOR188,. + 0
-	.type	__func__.10664, %object
-	.size	__func__.10664, 15
-__func__.10664:
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+	.size	__func__.10662, 15
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 	.string	"ftl_low_format"
-	.section	.rodata.__func__.10712,"a",@progbits
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 	.align	3
 	.set	.LANCHOR177,. + 0
-	.type	__func__.10712, %object
-	.size	__func__.10712, 14
-__func__.10712:
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 	.string	"ftl_prog_page"
-	.section	.rodata.__func__.10834,"a",@progbits
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 	.align	3
 	.set	.LANCHOR167,. + 0
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 	.string	"queue_wait_first_req_completed"
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 	.align	3
 	.set	.LANCHOR173,. + 0
-	.type	__func__.10888, %object
-	.size	__func__.10888, 15
-__func__.10888:
+	.type	__func__.10886, %object
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 	.string	"sblk_prog_page"
-	.section	.rodata.__func__.10915,"a",@progbits
+	.section	.rodata.__func__.10913,"a",@progbits
 	.align	3
 	.set	.LANCHOR169,. + 0
-	.type	__func__.10915, %object
-	.size	__func__.10915, 15
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+	.type	__func__.10913, %object
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 	.string	"sblk_read_page"
-	.section	.rodata.__func__.10975,"a",@progbits
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 	.align	3
 	.set	.LANCHOR202,. + 0
-	.type	__func__.10975, %object
-	.size	__func__.10975, 16
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 	.string	"load_l2p_region"
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 	.align	3
 	.set	.LANCHOR147,. + 0
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 	.string	"pm_free_sblk"
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 	.align	3
 	.set	.LANCHOR204,. + 0
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-__func__.11009:
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 	.string	"pm_gc"
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 	.align	3
 	.set	.LANCHOR131,. + 0
-	.type	__func__.11025, %object
-	.size	__func__.11025, 17
-__func__.11025:
+	.type	__func__.11023, %object
+	.size	__func__.11023, 17
+__func__.11023:
 	.string	"pm_alloc_new_blk"
-	.section	.rodata.__func__.11035,"a",@progbits
+	.section	.rodata.__func__.11033,"a",@progbits
 	.align	3
 	.set	.LANCHOR190,. + 0
-	.type	__func__.11035, %object
-	.size	__func__.11035, 14
-__func__.11035:
+	.type	__func__.11033, %object
+	.size	__func__.11033, 14
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 	.string	"pm_write_page"
-	.section	.rodata.__func__.11053,"a",@progbits
+	.section	.rodata.__func__.11051,"a",@progbits
 	.align	3
 	.set	.LANCHOR134,. + 0
-	.type	__func__.11053, %object
-	.size	__func__.11053, 21
-__func__.11053:
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+	.size	__func__.11051, 21
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 	.string	"pm_select_ram_region"
-	.section	.rodata.__func__.8553,"a",@progbits
+	.section	.rodata.__func__.8551,"a",@progbits
 	.align	3
 	.set	.LANCHOR161,. + 0
-	.type	__func__.8553, %object
-	.size	__func__.8553, 19
-__func__.8553:
+	.type	__func__.8551, %object
+	.size	__func__.8551, 19
+__func__.8551:
 	.string	"flash_read_page_en"
-	.section	.rodata.__func__.8595,"a",@progbits
+	.section	.rodata.__func__.8593,"a",@progbits
 	.align	3
 	.set	.LANCHOR175,. + 0
-	.type	__func__.8595, %object
-	.size	__func__.8595, 19
-__func__.8595:
+	.type	__func__.8593, %object
+	.size	__func__.8593, 19
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 	.string	"flash_prog_page_en"
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+	.section	.rodata.__func__.8609,"a",@progbits
 	.align	3
 	.set	.LANCHOR38,. + 0
-	.type	__func__.8611, %object
-	.size	__func__.8611, 26
-__func__.8611:
+	.type	__func__.8609, %object
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 	.string	"flash_erase_duplane_block"
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 	.align	3
 	.set	.LANCHOR40,. + 0
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 	.string	"flash_erase_block_en"
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 	.align	3
 	.set	.LANCHOR29,. + 0
-	.type	__func__.8636, %object
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-__func__.8636:
+	.type	__func__.8634, %object
+	.size	__func__.8634, 28
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 	.string	"flash_wait_device_ready_raw"
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 	.align	3
 	.set	.LANCHOR170,. + 0
-	.type	__func__.8660, %object
-	.size	__func__.8660, 26
-__func__.8660:
+	.type	__func__.8658, %object
+	.size	__func__.8658, 26
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 	.string	"flash_start_tlc_page_prog"
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+	.section	.rodata.__func__.8669,"a",@progbits
 	.align	3
 	.set	.LANCHOR171,. + 0
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-	.size	__func__.8671, 29
-__func__.8671:
+	.type	__func__.8669, %object
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 	.string	"flash_start_3d_mlc_page_prog"
-	.section	.rodata.__func__.8689,"a",@progbits
+	.section	.rodata.__func__.8687,"a",@progbits
 	.align	3
 	.set	.LANCHOR172,. + 0
-	.type	__func__.8689, %object
-	.size	__func__.8689, 22
-__func__.8689:
+	.type	__func__.8687, %object
+	.size	__func__.8687, 22
+__func__.8687:
 	.string	"flash_start_page_prog"
-	.section	.rodata.__func__.8700,"a",@progbits
+	.section	.rodata.__func__.8698,"a",@progbits
 	.align	3
 	.set	.LANCHOR33,. + 0
-	.type	__func__.8700, %object
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-__func__.8700:
+	.type	__func__.8698, %object
+	.size	__func__.8698, 22
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 	.string	"flash_start_page_read"
-	.section	.rodata.__func__.8713,"a",@progbits
+	.section	.rodata.__func__.8711,"a",@progbits
 	.align	3
 	.set	.LANCHOR165,. + 0
-	.type	__func__.8713, %object
-	.size	__func__.8713, 31
-__func__.8713:
+	.type	__func__.8711, %object
+	.size	__func__.8711, 31
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 	.string	"flash_complete_plane_page_read"
-	.section	.rodata.__func__.8725,"a",@progbits
+	.section	.rodata.__func__.8723,"a",@progbits
 	.align	3
 	.set	.LANCHOR41,. + 0
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-	.size	__func__.8725, 23
-__func__.8725:
+	.type	__func__.8723, %object
+	.size	__func__.8723, 23
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 	.string	"flash_start_plane_read"
-	.section	.rodata.__func__.8738,"a",@progbits
+	.section	.rodata.__func__.8736,"a",@progbits
 	.align	3
 	.set	.LANCHOR166,. + 0
-	.type	__func__.8738, %object
-	.size	__func__.8738, 25
-__func__.8738:
+	.type	__func__.8736, %object
+	.size	__func__.8736, 25
+__func__.8736:
 	.string	"flash_complete_page_read"
-	.section	.rodata.__func__.9070,"a",@progbits
+	.section	.rodata.__func__.9068,"a",@progbits
 	.align	3
 	.set	.LANCHOR139,. + 0
-	.type	__func__.9070, %object
-	.size	__func__.9070, 20
-__func__.9070:
+	.type	__func__.9068, %object
+	.size	__func__.9068, 20
+__func__.9068:
 	.string	"flash_die_info_init"
-	.section	.rodata.__func__.9080,"a",@progbits
+	.section	.rodata.__func__.9078,"a",@progbits
 	.align	3
 	.set	.LANCHOR15,. + 0
-	.type	__func__.9080, %object
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+	.type	__func__.9078, %object
+	.size	__func__.9078, 22
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 	.string	"nand_flash_print_info"
-	.section	.rodata.__func__.9125,"a",@progbits
+	.section	.rodata.__func__.9123,"a",@progbits
 	.align	3
 	.set	.LANCHOR197,. + 0
-	.type	__func__.9125, %object
-	.size	__func__.9125, 16
-__func__.9125:
+	.type	__func__.9123, %object
+	.size	__func__.9123, 16
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 	.string	"nand_flash_init"
-	.section	.rodata.__func__.9148,"a",@progbits
+	.section	.rodata.__func__.9146,"a",@progbits
 	.align	3
 	.set	.LANCHOR149,. + 0
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-	.size	__func__.9148, 11
-__func__.9148:
+	.type	__func__.9146, %object
+	.size	__func__.9146, 11
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 	.string	"nandc_init"
-	.section	.rodata.__func__.9317,"a",@progbits
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 	.align	3
 	.set	.LANCHOR53,. + 0
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-__func__.9317:
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+	.size	__func__.9315, 13
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 	.string	"buf_add_tail"
-	.section	.rodata.__func__.9330,"a",@progbits
+	.section	.rodata.__func__.9328,"a",@progbits
 	.align	3
 	.set	.LANCHOR55,. + 0
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-	.size	__func__.9330, 10
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+	.size	__func__.9328, 10
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 	.string	"buf_alloc"
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 	.align	3
 	.set	.LANCHOR56,. + 0
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+	.size	__func__.9342, 16
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 	.string	"buf_remove_free"
-	.section	.rodata.__func__.9357,"a",@progbits
+	.section	.rodata.__func__.9355,"a",@progbits
 	.align	3
 	.set	.LANCHOR196,. + 0
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-	.size	__func__.9357, 20
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+	.type	__func__.9355, %object
+	.size	__func__.9355, 20
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 	.string	"flash_info_blk_init"
-	.section	.rodata.__func__.9368,"a",@progbits
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 	.align	3
 	.set	.LANCHOR148,. + 0
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-	.size	__func__.9368, 21
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+	.size	__func__.9366, 21
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 	.string	"flash_info_data_init"
-	.section	.rodata.__func__.9390,"a",@progbits
+	.section	.rodata.__func__.9388,"a",@progbits
 	.align	3
 	.set	.LANCHOR193,. + 0
-	.type	__func__.9390, %object
-	.size	__func__.9390, 17
-__func__.9390:
+	.type	__func__.9388, %object
+	.size	__func__.9388, 17
+__func__.9388:
 	.string	"flash_info_flush"
-	.section	.rodata.__func__.9466,"a",@progbits
+	.section	.rodata.__func__.9464,"a",@progbits
 	.align	3
 	.set	.LANCHOR143,. + 0
-	.type	__func__.9466, %object
-	.size	__func__.9466, 17
-__func__.9466:
+	.type	__func__.9464, %object
+	.size	__func__.9464, 17
+__func__.9464:
 	.string	"lpa_rebuild_hash"
-	.section	.rodata.__func__.9513,"a",@progbits
+	.section	.rodata.__func__.9511,"a",@progbits
 	.align	3
 	.set	.LANCHOR216,. + 0
-	.type	__func__.9513, %object
-	.size	__func__.9513, 17
-__func__.9513:
+	.type	__func__.9511, %object
+	.size	__func__.9511, 17
+__func__.9511:
 	.string	"ftl_write_commit"
-	.section	.rodata.__func__.9531,"a",@progbits
+	.section	.rodata.__func__.9529,"a",@progbits
 	.align	3
 	.set	.LANCHOR122,. + 0
-	.type	__func__.9531, %object
-	.size	__func__.9531, 14
-__func__.9531:
+	.type	__func__.9529, %object
+	.size	__func__.9529, 14
+__func__.9529:
 	.string	"ftl_write_buf"
-	.section	.rodata.__func__.9576,"a",@progbits
+	.section	.rodata.__func__.9574,"a",@progbits
 	.align	3
 	.set	.LANCHOR125,. + 0
-	.type	__func__.9576, %object
-	.size	__func__.9576, 18
-__func__.9576:
+	.type	__func__.9574, %object
+	.size	__func__.9574, 18
+__func__.9574:
 	.string	"zftl_add_read_buf"
-	.section	.rodata.__func__.9609,"a",@progbits
+	.section	.rodata.__func__.9607,"a",@progbits
 	.align	3
 	.set	.LANCHOR213,. + 0
-	.type	__func__.9609, %object
-	.size	__func__.9609, 10
-__func__.9609:
+	.type	__func__.9607, %object
+	.size	__func__.9607, 10
+__func__.9607:
 	.string	"zftl_read"
-	.section	.rodata.__func__.9640,"a",@progbits
+	.section	.rodata.__func__.9638,"a",@progbits
 	.align	3
 	.set	.LANCHOR222,. + 0
-	.type	__func__.9640, %object
-	.size	__func__.9640, 13
-__func__.9640:
+	.type	__func__.9638, %object
+	.size	__func__.9638, 13
+__func__.9638:
 	.string	"_ftl_discard"
-	.section	.rodata.__func__.9787,"a",@progbits
+	.section	.rodata.__func__.9785,"a",@progbits
 	.align	3
 	.set	.LANCHOR61,. + 0
-	.type	__func__.9787, %object
-	.size	__func__.9787, 12
-__func__.9787:
+	.type	__func__.9785, %object
+	.size	__func__.9785, 12
+__func__.9785:
 	.string	"gc_add_sblk"
-	.section	.rodata.__func__.9834,"a",@progbits
+	.section	.rodata.__func__.9832,"a",@progbits
 	.align	3
 	.set	.LANCHOR214,. + 0
-	.type	__func__.9834, %object
-	.size	__func__.9834, 21
-__func__.9834:
+	.type	__func__.9832, %object
+	.size	__func__.9832, 21
+__func__.9832:
 	.string	"gc_check_data_one_wl"
-	.section	.rodata.__func__.9868,"a",@progbits
+	.section	.rodata.__func__.9866,"a",@progbits
 	.align	3
 	.set	.LANCHOR209,. + 0
-	.type	__func__.9868, %object
-	.size	__func__.9868, 22
-__func__.9868:
+	.type	__func__.9866, %object
+	.size	__func__.9866, 22
+__func__.9866:
 	.string	"gc_update_l2p_map_new"
-	.section	.rodata.__func__.9881,"a",@progbits
+	.section	.rodata.__func__.9879,"a",@progbits
 	.align	3
 	.set	.LANCHOR70,. + 0
-	.type	__func__.9881, %object
-	.size	__func__.9881, 19
-__func__.9881:
+	.type	__func__.9879, %object
+	.size	__func__.9879, 19
+__func__.9879:
 	.string	"gc_write_completed"
-	.section	.rodata.__func__.9910,"a",@progbits
+	.section	.rodata.__func__.9908,"a",@progbits
 	.align	3
 	.set	.LANCHOR218,. + 0
-	.type	__func__.9910, %object
-	.size	__func__.9910, 16
-__func__.9910:
+	.type	__func__.9908, %object
+	.size	__func__.9908, 16
+__func__.9908:
 	.string	"gc_do_copy_back"
-	.section	.rodata.__func__.9932,"a",@progbits
+	.section	.rodata.__func__.9930,"a",@progbits
 	.align	3
 	.set	.LANCHOR119,. + 0
-	.type	__func__.9932, %object
-	.size	__func__.9932, 16
-__func__.9932:
+	.type	__func__.9930, %object
+	.size	__func__.9930, 16
+__func__.9930:
 	.string	"gc_free_src_blk"
-	.section	.rodata.__func__.9976,"a",@progbits
+	.section	.rodata.__func__.9974,"a",@progbits
 	.align	3
 	.set	.LANCHOR210,. + 0
-	.type	__func__.9976, %object
-	.size	__func__.9976, 16
-__func__.9976:
+	.type	__func__.9974, %object
+	.size	__func__.9974, 16
+__func__.9974:
 	.string	"gc_scan_src_blk"
 	.section	.rodata._list_remove_node.str1.1,"aMS",@progbits,1
 .LC0:
@@ -28054,7 +28077,7 @@ toshiba_ref_value:
 	.string	"swl_slc_free_mini_ec_blk alloc sblk %x\n"
 	.section	.rodata.zftl_init.str1.1,"aMS",@progbits,1
 .LC196:
-	.string	"FTL version: 6.0.16 20190427"
+	.string	"FTL version: 6.0.16 20190603"
 .LC197:
 	.string	"_c_user_data_density := %d\n"
 .LC198:

commit ffa55e18238b8457fb51fce46a63ef28dfbc33ce
Author: Shixiang Zheng <shixiang.zheng@rock-chips.com>
Date:   Fri May 31 11:18:34 2019 +0800

    video/drm: add panel node parameters for screen rotate
    
    Change-Id: I83112f8a05bd301327d7d1ca21eda97594d95823
    Signed-off-by: Shixiang Zheng <shixiang.zheng@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 65378c6db4..7af5bdf54b 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -294,6 +294,9 @@ static int display_get_timing_from_dts(struct panel_state *panel_state,
 		return -ENXIO; \
 	}
 
+#define FDT_GET_INT_DEFAULT(val, name, default) \
+	val = ofnode_read_s32_default(native_mode, name, default);
+
 	FDT_GET_INT(hactive, "hactive");
 	FDT_GET_INT(vactive, "vactive");
 	FDT_GET_INT(pixelclock, "clock-frequency");
@@ -310,6 +313,15 @@ static int display_get_timing_from_dts(struct panel_state *panel_state,
 	FDT_GET_INT(val, "pixelclk-active");
 	flags |= val ? DRM_MODE_FLAG_PPIXDATA : 0;
 
+	FDT_GET_INT_DEFAULT(val, "screen-rotate", 0);
+	if (val == DRM_MODE_FLAG_XMIRROR) {
+		flags |= DRM_MODE_FLAG_XMIRROR;
+	} else if (val == DRM_MODE_FLAG_YMIRROR) {
+		flags |= DRM_MODE_FLAG_YMIRROR;
+	} else if (val == DRM_MODE_FLAG_XYMIRROR) {
+		flags |= DRM_MODE_FLAG_XMIRROR;
+		flags |= DRM_MODE_FLAG_YMIRROR;
+	}
 	mode->hdisplay = hactive;
 	mode->hsync_start = mode->hdisplay + hfront_porch;
 	mode->hsync_end = mode->hsync_start + hsync_len;
diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index c46b705cc9..4ed3892c90 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -653,6 +653,7 @@ static int rockchip_vop_set_plane(struct display_state *state)
 	int crtc_w = crtc_state->crtc_w;
 	int crtc_h = crtc_state->crtc_h;
 	int xvir = crtc_state->xvir;
+	int x_mirror = 0, y_mirror = 0;
 
 	act_info = (src_h - 1) << 16;
 	act_info |= (src_w - 1) & 0xffff;
@@ -664,13 +665,27 @@ static int rockchip_vop_set_plane(struct display_state *state)
 	dsp_sty = crtc_y + mode->crtc_vtotal - mode->crtc_vsync_start;
 	dsp_st = dsp_sty << 16 | (dsp_stx & 0xffff);
 
-	if (crtc_state->ymirror) {
-		if (VOP_WIN_SUPPORT(vop, vop->win, ymirror))
+	if (mode->flags & DRM_MODE_FLAG_YMIRROR)
+		y_mirror = 1;
+	else
+		y_mirror = 0;
+	if (mode->flags & DRM_MODE_FLAG_XMIRROR)
+		x_mirror = 1;
+	else
+		x_mirror = 0;
+	if (crtc_state->ymirror ^ y_mirror)
+		y_mirror = 1;
+	else
+		y_mirror = 0;
+	if (y_mirror) {
+		if (VOP_CTRL_SUPPORT(vop, ymirror))
 			crtc_state->dma_addr += (src_h - 1) * xvir * 4;
 		else
-			crtc_state->ymirror = 0;
-	}
-	VOP_WIN_SET(vop, ymirror, crtc_state->ymirror);
+			y_mirror = 0;
+		}
+	VOP_CTRL_SET(vop, ymirror, y_mirror);
+	VOP_CTRL_SET(vop, xmirror, x_mirror);
+
 	VOP_WIN_SET(vop, format, crtc_state->format);
 	VOP_WIN_SET(vop, yrgb_vir, xvir);
 	VOP_WIN_SET(vop, yrgb_mst, crtc_state->dma_addr);
diff --git a/include/drm_modes.h b/include/drm_modes.h
index 36d5641dbb..337f59ee30 100644
--- a/include/drm_modes.h
+++ b/include/drm_modes.h
@@ -38,6 +38,11 @@
 #define DRM_MODE_FLAG_CLKDIV2			(1 << 13)
 #define DRM_MODE_FLAG_PPIXDATA                  BIT(31)
 
+/* Panel Mirror control */
+#define DRM_MODE_FLAG_XMIRROR			(1<<28)
+#define DRM_MODE_FLAG_YMIRROR			(1<<29)
+#define DRM_MODE_FLAG_XYMIRROR			(DRM_MODE_FLAG_XMIRROR | DRM_MODE_FLAG_YMIRROR)
+
 #define DRM_MODE_CONNECTOR_Unknown	0
 #define DRM_MODE_CONNECTOR_VGA		1
 #define DRM_MODE_CONNECTOR_DVII		2
diff --git a/include/linux/media-bus-format.h b/include/linux/media-bus-format.h
index 56265cf85b..d8622ebd19 100644
--- a/include/linux/media-bus-format.h
+++ b/include/linux/media-bus-format.h
@@ -145,4 +145,9 @@
 /* HSV - next is	0x6002 */
 #define MEDIA_BUS_FMT_AHSV8888_1X32		0x6001
 
+/* Panel Mirror control */
+#define DRM_MODE_FLAG_XMIRROR 			(1<<28)
+#define DRM_MODE_FLAG_YMIRROR 			(1<<29)
+#define DRM_MODE_FLAG_XYMIRROR			(DRM_MODE_FLAG_XMIRROR | DRM_MODE_FLAG_YMIRROR)
+
 #endif /* __LINUX_MEDIA_BUS_FORMAT_H */

commit cb0376d1acea586b26080b72f6becda2fd6f6e63
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Oct 17 16:46:20 2018 +0800

    rockchip: test: emmc: add read/write count for emmc test
    
    Usually, we test the eMMC speed by reading and writing several times
    and then taking the average. So add parameter count.
    
    Change-Id: I0a01804b4b35b4a6d9dc8c96ac2bce6a4607301b
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/test/rockchip/test-emmc.c b/test/rockchip/test-emmc.c
index 383998b663..82d9cd2349 100644
--- a/test/rockchip/test-emmc.c
+++ b/test/rockchip/test-emmc.c
@@ -4,9 +4,9 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 
+#include <common.h>
 #include <asm/io.h>
 #include <cli.h>
-#include <common.h>
 #include <linux/compat.h>
 #include <malloc.h>
 #include "test-rockchip.h"
@@ -14,13 +14,13 @@
 int board_emmc_test(int argc, char * const argv[])
 {
 	u8 *write_buffer, *read_buffer;
-	u32 i, blocks = 0, lba;
+	u32 i, blocks = 0, count = 0, lba;
 	unsigned long ts;
 	int err = 0;
 	char cmd_mmc[512] = {0};
 
-	if (argc < 4) {
-		printf("Usage: rktest emmc start_lba blocks\n");
+	if (argc < 5) {
+		printf("Usage: rktest emmc start_lba blocks count\n");
 		printf("blocks should be from 8129 to 30000\n");
 		err = -EINVAL;
 		goto err_wb;
@@ -28,23 +28,13 @@ int board_emmc_test(int argc, char * const argv[])
 
 	lba = simple_strtoul(argv[2], NULL, 0);
 	blocks = simple_strtoul(argv[3], NULL, 0);
+	count = simple_strtoul(argv[4], NULL, 0);
 
 	if (blocks % 2)
 		/* Round up */
 		blocks += 1;
 
-	if (blocks < 8192) {
-		printf("Round up to 8192 blocks compulsively\n");
-		blocks = 8192;
-	}
-
-	if (blocks > 30000) {
-		printf("Round down to 30000 blocks compulsively\n");
-		blocks = 30000;
-	}
-
 	/* 1. Prepare memory */
-
 	write_buffer = (u8 *)kmalloc(sizeof(u8) * blocks * 512, GFP_KERNEL);
 	if (!write_buffer) {
 		printf("No memory for write_buffer!\n");
@@ -64,29 +54,31 @@ int board_emmc_test(int argc, char * const argv[])
 		read_buffer[i] = 0;
 	}
 
-	/* 2. Prepare and start cli command */
-
+	/* 2. Prepare and start mmc write/read */
 	snprintf(cmd_mmc, sizeof(cmd_mmc), "mmc write 0x%x 0x%x 0x%x",
 		 (u32)(ulong)write_buffer, lba, blocks);
 	ts = get_timer(0);
-	err = cli_simple_run_command(cmd_mmc, 0);
-	ts = get_timer(0) - ts;
-	if (!err)
-		goto err_mw;
+	for (i = 0; i < count; i++) {
+		err = cli_simple_run_command(cmd_mmc, 0);
+		if (!err)
+			goto err_mw;
+	}
 
+	ts = get_timer(0) - ts;
 	printf("eMMC write: size %dMB, used %ldms, speed %ldMB/s\n",
-		blocks / 2048, ts, (blocks >> 1) / ts);
+		blocks * count / 2048, ts, (blocks * count >> 1) / ts);
 
 	snprintf(cmd_mmc, sizeof(cmd_mmc), "mmc read 0x%x 0x%x 0x%x",
 		 (u32)(ulong)read_buffer, lba, blocks);
 	ts = get_timer(0);
-	err = cli_simple_run_command(cmd_mmc, 0);
+	for (i = 0; i < count; i++) {
+		err = cli_simple_run_command(cmd_mmc, 0);
+		if (!err)
+			goto err_mw;
+	}
 	ts = get_timer(0) - ts;
-	if (!err)
-		goto err_mw;
-
 	printf("eMMC read: size %dMB, used %ldms, speed %ldMB/s\n",
-		blocks / 2048, ts, (blocks >> 1) / ts);
+		blocks * count / 2048, ts, (blocks * count >> 1) / ts);
 
 	/* 3. Verify the context */
 

commit 5d8287bf264672b085e66d60b1f06231d78f7651
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Wed May 22 15:08:25 2019 +0800

    dm: crypto: support crypto v2 test
    
    Change-Id: Ia6247f9d91780cebf7806a3c7fb606fe0a2de004
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/cmd/crypto.c b/cmd/crypto.c
index 8a5c19dbb4..c465ded797 100644
--- a/cmd/crypto.c
+++ b/cmd/crypto.c
@@ -137,6 +137,7 @@ static u8 rsa2048_e[] = {
 	0x00, 0x00, 0x00, 0x00,
 };
 
+#ifdef CONFIG_ROCKCHIP_CRYPTO_V1
 static u8 rsa2048_c[] = {
 	0xa5, 0x0d, 0xc2, 0xc6, 0xf1, 0x08, 0x95, 0x55, 0x1d, 0xb3, 0xf9, 0x43,
 	0xb0, 0x7b, 0x5b, 0x96, 0xa0, 0x72, 0xe8, 0xd6, 0x95, 0xd6, 0x98, 0xec,
@@ -161,6 +162,7 @@ static u8 rsa2048_c[] = {
 	0x20, 0xa2, 0xda, 0x0e, 0x8e, 0xd4, 0x41, 0xdc, 0x1e, 0x75, 0x32, 0xf8,
 	0x73, 0xfa, 0x22, 0x7b,
 };
+#endif
 
 /* RSA2048-SHA256 sign data of foo_data[] */
 static u8 rsa2048_sha256_sign[] = {
@@ -220,7 +222,7 @@ static int do_crypto(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	u8 sha256_out1[32];
 	u8 sha1_out0[20];
 	u8 sha1_out1[20];
-	u8 rsa_out[32];
+	u8 rsa_out[256];
 	u8 md5_out0[16];
 	u8 md5_out1[16];
 	u32 cap;
@@ -262,10 +264,13 @@ static int do_crypto(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	     crypto_algo_nbits(csha_ctx.algo));
 
 	/* RSA2048-SHA256 */
+	memset(&rsa_key, 0x00, sizeof(rsa_key));
 	rsa_key.algo = CRYPTO_RSA2048;
 	rsa_key.n = (u32 *)&rsa2048_n;
 	rsa_key.e = (u32 *)&rsa2048_e;
+#ifdef CONFIG_ROCKCHIP_CRYPTO_V1
 	rsa_key.c = (u32 *)&rsa2048_c;
+#endif
 	crypto_rsa_verify(dev, &rsa_key, rsa2048_sha256_sign, rsa_out);
 	dump("RSA2048-SHA256", rsa_out,
 	     sha256_out1, crypto_algo_nbits(csha_ctx.algo));

commit b353a43c9e441e8665efd1cc47824714ad67ed3f
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Wed May 22 14:46:09 2019 +0800

    crypto: add rockchip crypto v2 driver
    
    Crypto v2 driver implements algorithm below.
    Hash: MD5/SHA1/SHA256
    RSA : RSA512/RSA1024/RSA2048/RSA3072/RSA4096
    for the platforms: px30/rk3326.
    
    Change-Id: Ia3b3233f3d17db1c98da60aa8dd1cd26aed7b260
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/drivers/crypto/crypto-uclass.c b/drivers/crypto/crypto-uclass.c
index 9e5cfbea24..775b31f0ce 100644
--- a/drivers/crypto/crypto-uclass.c
+++ b/drivers/crypto/crypto-uclass.c
@@ -23,6 +23,10 @@ u32 crypto_algo_nbits(u32 algo)
 		return 1024;
 	case CRYPTO_RSA2048:
 		return 2048;
+	case CRYPTO_RSA3072:
+		return 3072;
+	case CRYPTO_RSA4096:
+		return 4096;
 	}
 
 	printf("Unknown crypto algorithm: 0x%x\n", algo);
diff --git a/drivers/crypto/rockchip/Kconfig b/drivers/crypto/rockchip/Kconfig
index 6cb003b417..d65abdb445 100644
--- a/drivers/crypto/rockchip/Kconfig
+++ b/drivers/crypto/rockchip/Kconfig
@@ -6,3 +6,10 @@ config ROCKCHIP_CRYPTO_V1
 	help
 	  This enable MD5/SHA1/SHA256/RSA512/RSA1024/RSA2048 algorithm support for
 	  rockchip crypto v1 on platforms: rk3399/rk3368/rk3328/rk3229/rk3288/rk3128.
+
+config ROCKCHIP_CRYPTO_V2
+	bool "Enable rockchip crypto v2 support"
+	depends on DM_CRYPTO && (ROCKCHIP_RK3326 || ROCKCHIP_PX30)
+	help
+	  This enable MD5/SHA1/SHA256/RSA512/RSA1024/RSA2048 algorithm support for
+	  rockchip crypto v2 on platforms: px30/rk3326.
diff --git a/drivers/crypto/rockchip/Makefile b/drivers/crypto/rockchip/Makefile
index f9ba12f967..c818d1921d 100644
--- a/drivers/crypto/rockchip/Makefile
+++ b/drivers/crypto/rockchip/Makefile
@@ -5,3 +5,4 @@
 #
 
 obj-$(CONFIG_ROCKCHIP_CRYPTO_V1) += crypto_v1.o
+obj-$(CONFIG_ROCKCHIP_CRYPTO_V2) += crypto_v2.o crypto_v2_pka.o crypto_v2_util.o
\ No newline at end of file
diff --git a/drivers/crypto/rockchip/crypto_v2.c b/drivers/crypto/rockchip/crypto_v2.c
new file mode 100644
index 0000000000..fa49694515
--- /dev/null
+++ b/drivers/crypto/rockchip/crypto_v2.c
@@ -0,0 +1,658 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <crypto.h>
+#include <dm.h>
+#include <asm/io.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/clock.h>
+#include <rockchip/crypto_v2.h>
+#include <rockchip/crypto_v2_pka.h>
+
+struct rockchip_crypto_priv {
+	fdt_addr_t reg;
+	struct clk clk;
+	u32 frequency;
+	char *clocks;
+	u32 *frequencies;
+	u32 nclocks;
+	u32 length;
+	void *hw_ctx;
+};
+
+#define LLI_ADDR_ALIGIN_SIZE	8
+#define DATA_ADDR_ALIGIN_SIZE	8
+#define RK_CRYPTO_TIME_OUT	50000  /* max 50ms */
+
+#define RK_WHILE_TIME_OUT(condition, timeout, ret) { \
+			u32 time_out = timeout; \
+			while (condition) { \
+				if (time_out-- == 0) { \
+					printf("[%s] %d: time out!", __func__, \
+						__LINE__); \
+					ret = -ETIME; \
+					break; \
+				} \
+				udelay(1); \
+			} \
+			ret = 0; \
+		} while (0)
+
+typedef u32 paddr_t;
+#define virt_to_phys(addr)		(((unsigned long)addr) & 0xffffffff)
+#define phys_to_virt(addr, area)	((unsigned long)addr)
+
+static const u8 null_hash_sha1_value[] = {
+	0xda, 0x39, 0xa3, 0xee, 0x5e, 0x6b, 0x4b, 0x0d,
+	0x32, 0x55, 0xbf, 0xef, 0x95, 0x60, 0x18, 0x90,
+	0xaf, 0xd8, 0x07, 0x09
+};
+
+static const u8 null_hash_md5_value[] = {
+	0xd4, 0x1d, 0x8c, 0xd9, 0x8f, 0x00, 0xb2, 0x04,
+	0xe9, 0x80, 0x09, 0x98, 0xec, 0xf8, 0x42, 0x7e
+};
+
+static const u8 null_hash_sha256_value[] = {
+	0xe3, 0xb0, 0xc4, 0x42, 0x98, 0xfc, 0x1c, 0x14,
+	0x9a, 0xfb, 0xf4, 0xc8, 0x99, 0x6f, 0xb9, 0x24,
+	0x27, 0xae, 0x41, 0xe4, 0x64, 0x9b, 0x93, 0x4c,
+	0xa4, 0x95, 0x99, 0x1b, 0x78, 0x52, 0xb8, 0x55
+};
+
+fdt_addr_t crypto_base;
+
+static void word2byte(u32 word, u8 *ch, u32 endian)
+{
+	/* 0: Big-Endian 1: Little-Endian */
+	if (endian == BIG_ENDIAN) {
+		ch[0] = (word >> 24) & 0xff;
+		ch[1] = (word >> 16) & 0xff;
+		ch[2] = (word >> 8) & 0xff;
+		ch[3] = (word >> 0) & 0xff;
+	} else if (endian == LITTLE_ENDIAN) {
+		ch[0] = (word >> 0) & 0xff;
+		ch[1] = (word >> 8) & 0xff;
+		ch[2] = (word >> 16) & 0xff;
+		ch[3] = (word >> 24) & 0xff;
+	} else {
+		ch[0] = 0;
+		ch[1] = 0;
+		ch[2] = 0;
+		ch[3] = 0;
+	}
+}
+
+static inline void clear_hash_out_reg(void)
+{
+	int i;
+
+	/*clear out register*/
+	for (i = 0; i < 16; i++)
+		crypto_write(0, CRYPTO_HASH_DOUT_0 + 4 * i);
+}
+
+static int hw_crypto_reset(void)
+{
+	u32 tmp = 0, tmp_mask = 0;
+	int ret;
+
+	tmp = CRYPTO_SW_PKA_RESET | CRYPTO_SW_CC_RESET;
+	tmp_mask = tmp << CRYPTO_WRITE_MASK_SHIFT;
+
+	/* reset pka and crypto modules*/
+	crypto_write(tmp | tmp_mask, CRYPTO_RST_CTL);
+
+	/* wait reset compelete */
+	RK_WHILE_TIME_OUT(crypto_read(CRYPTO_RST_CTL),
+			  RK_CRYPTO_TIME_OUT, ret);
+	return ret;
+}
+
+static void hw_hash_common_clean_ctx(struct rk_hash_ctx *ctx)
+{
+	crypto_write(CRYPTO_WRITE_MASK_ALL | 0, CRYPTO_HASH_CTL);
+
+	if (ctx->free_data_lli)
+		free(ctx->free_data_lli);
+
+	if (ctx->cur_data_lli)
+		free(ctx->cur_data_lli);
+
+	if (ctx->vir_src_addr)
+		free(ctx->vir_src_addr);
+	memset(ctx, 0x00, sizeof(*ctx));
+}
+
+static void hw_hash_clean_ctx(struct rk_hash_ctx *ctx)
+{
+	/* clear hash status */
+	crypto_write(CRYPTO_WRITE_MASK_ALL | 0, CRYPTO_HASH_CTL);
+
+	/* free tmp buff */
+	if (ctx && ctx->magic == RK_HASH_CTX_MAGIC)
+		hw_hash_common_clean_ctx(ctx);
+}
+
+int rk_hash_init(void *hw_ctx, u32 algo)
+{
+	struct rk_hash_ctx *tmp_ctx = (struct rk_hash_ctx *)hw_ctx;
+	u32 reg_ctrl = 0;
+	int ret;
+
+	if (!tmp_ctx)
+		return -EINVAL;
+
+	memset(tmp_ctx, 0x00, sizeof(*tmp_ctx));
+
+	tmp_ctx->algo = algo;
+	switch (algo) {
+	case CRYPTO_MD5:
+		reg_ctrl |= CRYPTO_MODE_MD5;
+		tmp_ctx->digest_size = 16;
+		tmp_ctx->null_hash = null_hash_md5_value;
+		break;
+	case CRYPTO_SHA1:
+		reg_ctrl |= CRYPTO_MODE_SHA1;
+		tmp_ctx->digest_size = 20;
+		tmp_ctx->null_hash = null_hash_sha1_value;
+		break;
+	case CRYPTO_SHA256:
+		reg_ctrl |= CRYPTO_MODE_SHA256;
+		tmp_ctx->digest_size = 32;
+		tmp_ctx->null_hash = null_hash_sha256_value;
+		break;
+	default:
+		ret = -EINVAL;
+		goto exit;
+	}
+
+	clear_hash_out_reg();
+
+	/* enable hardware padding */
+	reg_ctrl |= CRYPTO_HW_PAD_ENABLE;
+	crypto_write(reg_ctrl | CRYPTO_WRITE_MASK_ALL, CRYPTO_HASH_CTL);
+
+	/* FIFO input and output data byte swap */
+	/* such as B0, B1, B2, B3 -> B3, B2, B1, B0 */
+	reg_ctrl = CRYPTO_DOUT_BYTESWAP | CRYPTO_DOIN_BYTESWAP;
+	crypto_write(reg_ctrl | CRYPTO_WRITE_MASK_ALL, CRYPTO_FIFO_CTL);
+
+	/* disable all interrupt */
+	crypto_write(0x0, CRYPTO_DMA_INT_EN);
+
+	tmp_ctx->magic = RK_HASH_CTX_MAGIC;
+
+	return 0;
+exit:
+	/* clear hash setting if init failed */
+	crypto_write(CRYPTO_WRITE_MASK_ALL | 0, CRYPTO_HASH_CTL);
+
+	return ret;
+}
+
+int rk_hash_update(void *ctx, const u8 *data, u32 data_len)
+{
+	struct rk_hash_ctx *tmp_ctx = (struct rk_hash_ctx *)ctx;
+	struct crypto_lli_desc *free_lli_desp = NULL;
+	struct crypto_lli_desc *lli_desp = NULL;
+	u32 tmp, temp_data_len = 0;
+	u8 *vir_src_addr = NULL;
+	int ret = -EINVAL;
+
+	if (!tmp_ctx || !data)
+		goto error;
+
+	if (tmp_ctx->digest_size == 0 || tmp_ctx->magic != RK_HASH_CTX_MAGIC)
+		goto error;
+
+	/* update will keep cache one calculate request in memmory */
+	/* because last calculate request should calculate in final */
+	if (!tmp_ctx->cur_data_lli) {
+		lli_desp = (struct crypto_lli_desc *)
+				memalign(DATA_ADDR_ALIGIN_SIZE,
+					 sizeof(struct crypto_lli_desc));
+		if (!lli_desp)
+			goto error;
+
+		free_lli_desp = (struct crypto_lli_desc *)
+				memalign(DATA_ADDR_ALIGIN_SIZE,
+					 sizeof(struct crypto_lli_desc));
+		if (!free_lli_desp) {
+			free(lli_desp);
+			goto error;
+		}
+
+		memset(lli_desp, 0x00, sizeof(*lli_desp));
+		vir_src_addr = (u8 *)memalign(DATA_ADDR_ALIGIN_SIZE,
+						HASH_MAX_SIZE);
+		if (!vir_src_addr) {
+			free(lli_desp);
+			free(free_lli_desp);
+			printf("[%s] %d: memalign fail!", __func__, __LINE__);
+			goto error;
+		}
+
+		lli_desp->src_addr = (u32)virt_to_phys(vir_src_addr);
+		lli_desp->user_define = LLI_USER_CPIHER_START |
+					LLI_USER_STRING_START;
+		tmp_ctx->cur_data_lli = lli_desp;
+		tmp_ctx->free_data_lli = free_lli_desp;
+		tmp_ctx->vir_src_addr = vir_src_addr;
+
+		/* write first lli dma address to reg */
+		crypto_write((u32)virt_to_phys(tmp_ctx->cur_data_lli),
+			     CRYPTO_DMA_LLI_ADDR);
+	}
+
+	ret = 0;
+	while (data_len) {
+		lli_desp = (struct crypto_lli_desc *)tmp_ctx->cur_data_lli;
+		vir_src_addr = (u8 *)phys_to_virt((paddr_t)lli_desp->src_addr,
+						MEM_AREA_TEE_RAM);
+		if (data_len + lli_desp->src_len > HASH_MAX_SIZE) {
+			temp_data_len = HASH_MAX_SIZE - lli_desp->src_len;
+			memcpy(vir_src_addr + lli_desp->src_len, data,
+			       temp_data_len);
+			data_len -= temp_data_len;
+			data += temp_data_len;
+
+			free_lli_desp = tmp_ctx->free_data_lli;
+
+			memset(free_lli_desp, 0x00, sizeof(*free_lli_desp));
+			lli_desp->src_len = HASH_MAX_SIZE;
+			lli_desp->next_addr = (u32)virt_to_phys(free_lli_desp);
+			/* item done and  pause */
+			lli_desp->dma_ctrl = LLI_DMA_CTRL_PAUSE |
+					     LLI_DMA_CTRL_SRC_DONE;
+
+			if (tmp_ctx->dma_started == 0) {
+				/* start calculate */
+				crypto_write((CRYPTO_HASH_ENABLE <<
+						CRYPTO_WRITE_MASK_SHIFT) |
+						CRYPTO_HASH_ENABLE,
+						CRYPTO_HASH_CTL);
+				tmp = CRYPTO_DMA_START;
+				tmp_ctx->dma_started = 1;
+			} else {
+				/* restart calculate */
+				tmp = CRYPTO_DMA_RESTART;
+			}
+
+			/* flush cache */
+			cache_op_inner(DCACHE_AREA_CLEAN, lli_desp,
+				       sizeof(*lli_desp));
+			cache_op_inner(DCACHE_AREA_CLEAN, vir_src_addr,
+				       lli_desp->src_len);
+
+			/* start calculate */
+			crypto_write(tmp << CRYPTO_WRITE_MASK_SHIFT | tmp,
+				     CRYPTO_DMA_CTL);
+
+			/* wait calc ok */
+			RK_WHILE_TIME_OUT(!crypto_read(CRYPTO_DMA_INT_ST),
+					  RK_CRYPTO_TIME_OUT, ret);
+
+			/* clear interrupt status */
+			tmp = crypto_read(CRYPTO_DMA_INT_ST);
+			crypto_write(tmp, CRYPTO_DMA_INT_ST);
+
+			if (tmp != CRYPTO_SRC_ITEM_DONE_INT_ST &&
+			    tmp != CRYPTO_ZERO_LEN_INT_ST) {
+				printf("[%s] %d: CRYPTO_DMA_INT_ST = 0x%x",
+				       __func__, __LINE__, tmp);
+				goto error;
+			}
+
+			/* after calc one block, swap free lli and cur lli */
+			free_lli_desp->src_addr = lli_desp->src_addr;
+			tmp_ctx->free_data_lli = tmp_ctx->cur_data_lli;
+			tmp_ctx->cur_data_lli = free_lli_desp;
+			free_lli_desp = NULL;
+		} else {
+			/* cache first calculate request to buff */
+			memcpy(vir_src_addr + lli_desp->src_len,
+			       data, data_len);
+			lli_desp->src_len += data_len;
+			data_len = 0;
+		}
+	}
+
+	return ret;
+
+error:
+	/* free lli list */
+	hw_hash_clean_ctx(tmp_ctx);
+
+	return ret;
+}
+
+int rk_hash_final(void *ctx, u8 *digest, size_t len)
+{
+	struct rk_hash_ctx *tmp_ctx = (struct rk_hash_ctx *)ctx;
+	struct crypto_lli_desc *lli_desp = NULL;
+	int ret = -EINVAL;
+	u32 i, tmp;
+
+	if (!digest)
+		goto exit;
+
+	if (!tmp_ctx ||
+	    !tmp_ctx->cur_data_lli ||
+	    tmp_ctx->digest_size == 0 ||
+	    len > tmp_ctx->digest_size ||
+	    tmp_ctx->magic != RK_HASH_CTX_MAGIC) {
+		goto exit;
+	}
+
+	/* to find the last block */
+	lli_desp = (struct crypto_lli_desc *)tmp_ctx->cur_data_lli;
+	if (lli_desp->next_addr != 0)
+		goto exit;
+
+	/* if data len is zero, return null hash value immediately*/
+	if (tmp_ctx->dma_started == 0 &&
+	    lli_desp->src_len == 0 &&
+	    !tmp_ctx->null_hash) {
+		memcpy(digest, tmp_ctx->null_hash, len);
+		ret = 0;
+		goto exit;
+	}
+
+	/* set LLI_USER_STRING_LAST to tell crypto this block is last one */
+	lli_desp->user_define |= LLI_USER_STRING_LAST;
+	lli_desp->dma_ctrl = LLI_DMA_CTRL_LIST_DONE | LLI_DMA_CTRL_LAST;
+	cache_op_inner(DCACHE_AREA_CLEAN, lli_desp, sizeof(*lli_desp));
+	cache_op_inner(DCACHE_AREA_CLEAN, tmp_ctx->vir_src_addr,
+		       lli_desp->src_len);
+
+	if (tmp_ctx->dma_started == 0) {
+		crypto_write((CRYPTO_HASH_ENABLE << CRYPTO_WRITE_MASK_SHIFT) |
+				CRYPTO_HASH_ENABLE, CRYPTO_HASH_CTL);
+		crypto_write((CRYPTO_DMA_START << CRYPTO_WRITE_MASK_SHIFT) |
+				CRYPTO_DMA_START, CRYPTO_DMA_CTL);
+	} else {
+		crypto_write((CRYPTO_DMA_RESTART << CRYPTO_WRITE_MASK_SHIFT) |
+				CRYPTO_DMA_RESTART, CRYPTO_DMA_CTL);
+		tmp_ctx->dma_started = 1;
+	}
+
+	/* wait dma trans ok */
+	RK_WHILE_TIME_OUT(!crypto_read(CRYPTO_DMA_INT_ST),
+			  RK_CRYPTO_TIME_OUT, ret);
+
+	/* clear interrupt status */
+	tmp = crypto_read(CRYPTO_DMA_INT_ST);
+	crypto_write(tmp, CRYPTO_DMA_INT_ST);
+
+	if (tmp != CRYPTO_LIST_DONE_INT_ST) {
+		ret = -EIO;
+		goto exit;
+	}
+
+	/* wait hash value ok */
+	RK_WHILE_TIME_OUT(!crypto_read(CRYPTO_HASH_VALID),
+			  RK_CRYPTO_TIME_OUT, ret);
+
+	for (i = 0; i < len / 4; i++)
+		word2byte(crypto_read(CRYPTO_HASH_DOUT_0 + i * 4),
+			  digest + i * 4, BIG_ENDIAN);
+
+	if (len % 4) {
+		u8 tmp_buf[4];
+
+		word2byte(crypto_read(CRYPTO_HASH_DOUT_0 + i * 4),
+			  tmp_buf, BIG_ENDIAN);
+		memcpy(digest + i * 4, tmp_buf, len % 4);
+	}
+
+	/* clear hash status */
+	crypto_write(CRYPTO_HASH_IS_VALID, CRYPTO_HASH_VALID);
+	crypto_write(CRYPTO_WRITE_MASK_ALL | 0, CRYPTO_HASH_CTL);
+
+exit:
+	/* free lli list */
+	hw_hash_clean_ctx(tmp_ctx);
+
+	return ret;
+}
+
+static u32 rockchip_crypto_capability(struct udevice *dev)
+{
+	return CRYPTO_MD5 |
+	       CRYPTO_SHA1 |
+	       CRYPTO_SHA256 |
+	       CRYPTO_RSA512 |
+	       CRYPTO_RSA1024 |
+	       CRYPTO_RSA2048 |
+	       CRYPTO_RSA3072 |
+	       CRYPTO_RSA4096;
+}
+
+static int rockchip_crypto_sha_init(struct udevice *dev, sha_context *ctx)
+{
+	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
+
+	if (!ctx)
+		return -EINVAL;
+
+	priv->hw_ctx = malloc(sizeof(struct rk_hash_ctx));
+	if (!priv->hw_ctx)
+		return -ENOMEM;
+
+	memset(priv->hw_ctx, 0x00, sizeof(struct rk_hash_ctx));
+
+	return rk_hash_init(priv->hw_ctx, ctx->algo);
+}
+
+static int rockchip_crypto_sha_update(struct udevice *dev,
+				      u32 *input, u32 len)
+{
+	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
+
+	if (!len)
+		return -EINVAL;
+
+	return rk_hash_update(priv->hw_ctx, (u8 *)input, len);
+}
+
+static int rockchip_crypto_sha_final(struct udevice *dev,
+				     sha_context *ctx, u8 *output)
+{
+	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
+	u32 nbits;
+	int ret;
+
+	nbits = crypto_algo_nbits(ctx->algo);
+
+	ret = rk_hash_final(priv->hw_ctx, (u8 *)output, BITS2BYTE(nbits));
+	if (priv->hw_ctx) {
+		free(priv->hw_ctx);
+		priv->hw_ctx = 0;
+	}
+
+	return ret;
+}
+
+static int rockchip_crypto_rsa_verify(struct udevice *dev, rsa_key *ctx,
+				      u8 *sign, u8 *output)
+{
+	struct mpa_num *mpa_m = NULL, *mpa_e = NULL, *mpa_n = NULL;
+	struct mpa_num *mpa_c = NULL, *mpa_result = NULL;
+	u32 n_bits, n_words;
+	u32 *rsa_result;
+	int ret;
+
+	if (!ctx)
+		return -EINVAL;
+
+	if (ctx->algo != CRYPTO_RSA512 &&
+	    ctx->algo != CRYPTO_RSA1024 &&
+	    ctx->algo != CRYPTO_RSA2048 &&
+	    ctx->algo != CRYPTO_RSA3072 &&
+	    ctx->algo != CRYPTO_RSA4096)
+		return -EINVAL;
+
+	n_bits = crypto_algo_nbits(ctx->algo);
+	n_words = BITS2WORD(n_bits);
+
+	rsa_result = malloc(BITS2BYTE(n_bits));
+	if (!rsa_result)
+		return -ENOMEM;
+
+	memset(rsa_result, 0x00, BITS2BYTE(n_bits));
+
+	ret = rk_mpa_alloc(&mpa_m);
+	ret |= rk_mpa_alloc(&mpa_e);
+	ret |= rk_mpa_alloc(&mpa_n);
+	ret |= rk_mpa_alloc(&mpa_c);
+	ret |= rk_mpa_alloc(&mpa_result);
+	if (ret)
+		goto exit;
+
+	mpa_m->d = (void *)sign;
+	mpa_e->d = (void *)ctx->e;
+	mpa_n->d = (void *)ctx->n;
+	mpa_c->d = (void *)ctx->c;
+	mpa_result->d = (void *)rsa_result;
+
+	mpa_m->size = n_words;
+	mpa_e->size = n_words;
+	mpa_n->size = n_words;
+	mpa_c->size = n_words;
+	mpa_result->size = n_words;
+
+	ret = rk_exptmod_np(mpa_m, mpa_e, mpa_n, mpa_c, mpa_result);
+	if (!ret)
+		memcpy(output, rsa_result, BITS2BYTE(n_bits));
+
+exit:
+	free(rsa_result);
+	rk_mpa_free(&mpa_m);
+	rk_mpa_free(&mpa_e);
+	rk_mpa_free(&mpa_n);
+	rk_mpa_free(&mpa_c);
+	rk_mpa_free(&mpa_result);
+
+	return ret;
+}
+
+static const struct dm_crypto_ops rockchip_crypto_ops = {
+	.capability = rockchip_crypto_capability,
+	.sha_init   = rockchip_crypto_sha_init,
+	.sha_update = rockchip_crypto_sha_update,
+	.sha_final  = rockchip_crypto_sha_final,
+	.rsa_verify = rockchip_crypto_rsa_verify,
+};
+
+/*
+ * Only use "clocks" to parse crypto clock id and use rockchip_get_clk().
+ * Because we always add crypto node in U-Boot dts, when kernel dtb enabled :
+ *
+ *   1. There is cru phandle mismatch between U-Boot and kernel dtb;
+ *   2. CONFIG_OF_SPL_REMOVE_PROPS removes clock property;
+ */
+static int rockchip_crypto_ofdata_to_platdata(struct udevice *dev)
+{
+	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
+	int len, ret = -EINVAL;
+
+	if (!dev_read_prop(dev, "clocks", &len)) {
+		printf("Can't find \"clocks\" property\n");
+		return -EINVAL;
+	}
+
+	memset(priv, 0x00, sizeof(*priv));
+	priv->clocks = malloc(len);
+	if (!priv->clocks)
+		return -ENOMEM;
+
+	priv->nclocks = len / sizeof(u32);
+	if (dev_read_u32_array(dev, "clocks", (u32 *)priv->clocks,
+			       priv->nclocks)) {
+		printf("Can't read \"clocks\" property\n");
+		ret = -EINVAL;
+		goto exit;
+	}
+
+	if (!dev_read_prop(dev, "clock-frequency", &len)) {
+		printf("Can't find \"clock-frequency\" property\n");
+		ret = -EINVAL;
+		goto exit;
+	}
+
+	priv->frequencies = malloc(len);
+	if (!priv->frequencies) {
+		ret = -ENOMEM;
+		goto exit;
+	}
+
+	priv->nclocks = len / sizeof(u32);
+	if (dev_read_u32_array(dev, "clock-frequency", priv->frequencies,
+			       priv->nclocks)) {
+		printf("Can't read \"clock-frequency\" property\n");
+		ret = -EINVAL;
+		goto exit;
+	}
+
+	priv->reg = (fdt_addr_t)dev_read_addr_ptr(dev);
+
+	crypto_base = priv->reg;
+
+	return 0;
+exit:
+	if (priv->clocks)
+		free(priv->clocks);
+
+	if (priv->frequencies)
+		free(priv->frequencies);
+
+	return ret;
+}
+
+static int rockchip_crypto_probe(struct udevice *dev)
+{
+	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
+	int i, ret = 0;
+	u32* clocks;
+
+	ret = rockchip_get_clk(&priv->clk.dev);
+	if (ret) {
+		printf("Failed to get clk device, ret=%d\n", ret);
+		return ret;
+	}
+
+	clocks = (u32 *)priv->clocks;
+	for (i = 0; i < priv->nclocks; i++) {
+		priv->clk.id = clocks[i * 2 + 1];
+		ret = clk_set_rate(&priv->clk, priv->frequencies[i]);
+		if (ret < 0) {
+			printf("%s: Failed to set clk(%ld): ret=%d\n",
+			       __func__, priv->clk.id, ret);
+			return ret;
+		}
+	}
+
+	hw_crypto_reset();
+
+	return 0;
+}
+
+static const struct udevice_id rockchip_crypto_ids[] = {
+	{ .compatible = "rockchip,px30-crypto" },
+	{ }
+};
+
+U_BOOT_DRIVER(rockchip_crypto_v2) = {
+	.name		= "rockchip_crypto_v2",
+	.id		= UCLASS_CRYPTO,
+	.of_match	= rockchip_crypto_ids,
+	.ops		= &rockchip_crypto_ops,
+	.probe		= rockchip_crypto_probe,
+	.ofdata_to_platdata = rockchip_crypto_ofdata_to_platdata,
+	.priv_auto_alloc_size = sizeof(struct rockchip_crypto_priv),
+};
diff --git a/drivers/crypto/rockchip/crypto_v2_pka.c b/drivers/crypto/rockchip/crypto_v2_pka.c
new file mode 100644
index 0000000000..8b7535e17f
--- /dev/null
+++ b/drivers/crypto/rockchip/crypto_v2_pka.c
@@ -0,0 +1,1098 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <crypto.h>
+#include <dm.h>
+#include <linux/errno.h>
+#include <rockchip/crypto_v2.h>
+#include <rockchip/crypto_v2_pka.h>
+
+#define CRYPT_OK	(0)
+#define CRYPT_ERROR	(-1)
+
+void rk_pka_ram_ctrl_enable(void)
+{
+	crypto_write((CRYPTO_RAM_PKA_RDY << CRYPTO_WRITE_MASK_SHIFT) |
+		     CRYPTO_RAM_PKA_RDY, CRYPTO_RAM_CTL);
+}
+
+void rk_pka_ram_ctrl_disable(void)
+{
+	crypto_write((CRYPTO_RAM_PKA_RDY << CRYPTO_WRITE_MASK_SHIFT),
+		     CRYPTO_RAM_CTL);
+}
+
+void rk_pka_wait_on_ram_ready(void)
+{
+	u32 output_reg_val;
+
+	do {
+		output_reg_val = crypto_read(CRYPTO_RAM_ST);
+	} while ((output_reg_val & 0x01) != CRYPTO_CLK_RAM_RDY);
+}
+
+void rk_pka_wait_on_pipe_ready(void)
+{
+	u32 output_reg_val;
+
+	do {
+		output_reg_val = crypto_read(CRYPTO_PKA_PIPE_RDY);
+	} while ((output_reg_val & 0x01) != RK_PKA_PIPE_READY);
+}
+
+void rk_pka_wait_on_done(void)
+{
+	u32 output_reg_val;
+
+	do {
+		output_reg_val = crypto_read(CRYPTO_PKA_DONE);
+	} while ((output_reg_val & 0x01) != RK_PKA_OP_DONE);
+}
+
+void rk_pka_set_startmemaddr_reg(u32 start_mem_addr)
+{
+	crypto_write(start_mem_addr, CRYPTO_PKA_MON_READ);
+}
+
+void rk_pka_set_N_NP_T0_T1_reg(u32 N, u32 NP, u32 T0,
+			       u32 T1)
+{
+	rk_pka_wait_on_done();
+	crypto_write((u32)((N) << RK_PKA_N_NP_T0_T1_REG_N_POS |
+				(NP) << RK_PKA_N_NP_T0_T1_REG_NP_POS |
+				(T0) << RK_PKA_N_NP_T0_T1_REG_T0_POS |
+				(T1) << RK_PKA_N_NP_T0_T1_REG_T1_POS),
+				CRYPTO_N_NP_T0_T1_ADDR);
+}
+
+void rk_pka_set_default_N_NP_T0_T1_reg(void)
+{
+	crypto_write(RK_PKA_N_NP_T0_T1_REG_DEFAULT_VAL, CRYPTO_N_NP_T0_T1_ADDR);
+}
+
+void rk_pka_get_status(u32 *status)
+{
+	rk_pka_wait_on_done();
+	*status = crypto_read(CRYPTO_PKA_STATUS);
+}
+
+void rk_pka_get_status_alu_outzero(u32 *status)
+{
+	rk_pka_wait_on_done();
+	*status = crypto_read(CRYPTO_PKA_STATUS);
+	*status = ((*status) >> RK_PKA_STATUS_ALU_OUT_ZERO_POS) & 1UL;
+}
+
+void rk_pka_get_status_mod_overfl(u32 *status)
+{
+	rk_pka_wait_on_done();
+	*status = crypto_read(CRYPTO_PKA_STATUS);
+	*status = ((*status) >> RK_PKA_STATUS_ALU_MODOVRFLW_POS) & 1;
+}
+
+void rk_pka_get_status_div_byzero(u32 *status)
+{
+	rk_pka_wait_on_done();
+	*status = crypto_read(CRYPTO_PKA_STATUS);
+	*status = ((*status) >> RK_PKA_STATUS_DIV_BY_ZERO_POS) & 1;
+}
+
+void rk_pka_get_status_carry(u32 *status)
+{
+	rk_pka_wait_on_done();
+	*status = crypto_read(CRYPTO_PKA_STATUS);
+	*status = ((*status) >> RK_PKA_STATUS_ALU_CARRY_POS) & 1;
+}
+
+void rk_pka_get_status_alu_signout(u32 *status)
+{
+	rk_pka_wait_on_done();
+	*status = crypto_read(CRYPTO_PKA_STATUS);
+	*status = ((*status) >> RK_PKA_STATUS_ALU_SIGN_OUT_POS) & 1;
+}
+
+void rk_pka_get_status_modinv_ofzero(u32 *status)
+{
+	rk_pka_wait_on_done();
+	*status = crypto_read(CRYPTO_PKA_STATUS);
+	*status = ((*status) >> RK_PKA_STATUS_MODINV_OF_ZERO_POS) & 1;
+}
+
+void rk_pka_get_status_opcode(u32 *status)
+{
+	rk_pka_wait_on_done();
+	*status = crypto_read(CRYPTO_PKA_STATUS);
+	*status = ((*status) >> RK_PKA_STATUS_OPCODE_POS) &
+			  RK_PKA_STATUS_OPCODE_MASK;
+}
+
+void rk_pka_get_status_tag(u32 *status)
+{
+	rk_pka_wait_on_done();
+	*status = crypto_read(CRYPTO_PKA_STATUS);
+	*status = ((*status) >> RK_PKA_STATUS_TAG_POS) & RK_PKA_STATUS_TAG_MASK;
+}
+
+void rk_pka_set_regsize(u32 size_bits, u32 entry_num)
+{
+	rk_pka_wait_on_done();
+	crypto_write(size_bits, CRYPTO_PKA_L0 + 4 * (entry_num));
+}
+
+void rk_pka_read_regsize(u32 *size_bits, u32 entry_num)
+{
+	rk_pka_wait_on_done();
+	*size_bits = crypto_read(CRYPTO_PKA_L0 + 4 * (entry_num));
+}
+
+void rk_pka_set_regaddr(u32 vir_reg, u32 phys_addr)
+{
+	rk_pka_wait_on_done();
+	crypto_write(phys_addr, CRYPTO_MEMORY_MAP0 + 4 * (vir_reg));
+}
+
+void rk_pka_get_regaddr(u32 vir_reg, u32 *phys_addr)
+{
+	*phys_addr = crypto_read(CRYPTO_MEMORY_MAP0 + 4 * (vir_reg));
+}
+
+void rk_pka_read_regaddr(u32 vir_reg, u32 *phys_addr)
+{
+	rk_pka_wait_on_done();
+	*phys_addr = crypto_read(CRYPTO_MEMORY_MAP0 + 4 * (vir_reg));
+}
+
+u32 rk_pka_make_full_opcode(u32 opcode, u32 len_id,
+			    u32 is_a_immed, u32 op_a,
+			    u32 is_b_immed, u32 op_b,
+			    u32 res_discard, u32 res,
+			    u32 tag)
+{
+	u32 full_opcode;
+
+	full_opcode =
+		(((u32)(opcode) & 31) << RK_PKA_OPCODE_OPERATION_ID_POS |
+		((u32)(len_id) & 7) << RK_PKA_OPCODE_LEN_POS |
+		((u32)(is_a_immed) & 1) << RK_PKA_OPCODE_OPERAND_1_IMMED_POS |
+		((u32)(op_a) & 31)	<< RK_PKA_OPCODE_OPERAND_1_POS	|
+		((u32)(is_b_immed) & 1) << RK_PKA_OPCODE_OPERAND_2_IMMED_POS |
+		((u32)(op_b) & 31) << RK_PKA_OPCODE_OPERAND_2_POS	|
+		((u32)(res_discard) & 1) << RK_PKA_OPCODE_R_DISCARD_POS	|
+		((u32)(res) & 31) << RK_PKA_OPCODE_RESULT_POS |
+		((u32)(tag) & 31) << RK_PKA_OPCODE_TAG_POS);
+	return full_opcode;
+}
+
+void rk_pka_hw_load_value2pka_mem(u32 addr, u32 val)
+{
+	u32 *vaddr;
+
+	vaddr = (u32 *)((addr) + RK_PKA_DATA_REGS_MEMORY_OFFSET_ADDR);
+	rk_pka_ram_ctrl_disable();
+	rk_pka_wait_on_ram_ready();
+	*vaddr = val;
+	rk_pka_ram_ctrl_enable();
+}
+
+void rk_pka_hw_load_block2pka_mem(u32 addr, u32 *ptr,
+				  u32 size_words)
+{
+	u8 *vaddr =
+		(u8 *)((addr) + RK_PKA_DATA_REGS_MEMORY_OFFSET_ADDR);
+
+	rk_pka_ram_ctrl_disable();
+	rk_pka_wait_on_ram_ready();
+	RK_PKA_FastMemCpy(vaddr, (u8 *)ptr, size_words);
+	rk_pka_ram_ctrl_enable();
+}
+
+void rk_pka_hw_reverse_load_block2pka_mem(u32 addr, u32 *ptr,
+					  u32 size_words)
+{
+	u8 *vaddr =
+		(u8 *)((addr) + RK_PKA_DATA_REGS_MEMORY_OFFSET_ADDR);
+
+	rk_pka_ram_ctrl_disable();
+	rk_pka_wait_on_ram_ready();
+	RK_PKA_ReverseMemcpy(vaddr, (u8 *)ptr, size_words);
+	rk_pka_ram_ctrl_enable();
+}
+
+void rk_pka_hw_clear_pka_mem(u32 addr, u32 size_words)
+{
+	u8 *vaddr =
+		(u8 *)((addr) + RK_PKA_DATA_REGS_MEMORY_OFFSET_ADDR);
+
+	rk_pka_ram_ctrl_disable();
+	rk_pka_wait_on_ram_ready();
+	RK_PKA_MemSetZero(vaddr, size_words);
+	rk_pka_ram_ctrl_enable();
+}
+
+void rk_pka_hw_read_value_from_pka_mem(u32 addr, u32 *val)
+{
+	u32 *vaddr;
+
+	vaddr = (u32 *)((addr) + RK_PKA_DATA_REGS_MEMORY_OFFSET_ADDR);
+	rk_pka_ram_ctrl_disable();
+	rk_pka_wait_on_ram_ready();
+	*val = *vaddr;
+	rk_pka_ram_ctrl_enable();
+}
+
+void rk_pka_hw_read_block_from_pka_mem(u32 addr, u32 *ptr,
+				       u32 size_words)
+{
+	u8 *vaddr =
+		(u8 *)((addr) + RK_PKA_DATA_REGS_MEMORY_OFFSET_ADDR);
+
+	rk_pka_ram_ctrl_disable();
+	rk_pka_wait_on_ram_ready();
+	RK_PKA_FastMemCpy((u8 *)(ptr), vaddr, size_words);
+	rk_pka_ram_ctrl_enable();
+}
+
+void rk_pka_hw_reverse_read_block_from_pka_mem(u32 addr, u32 *ptr,
+					       u32 size_words)
+{
+	u8 *vaddr =
+		(u8 *)((addr) + RK_PKA_DATA_REGS_MEMORY_OFFSET_ADDR);
+
+	rk_pka_ram_ctrl_disable();
+	rk_pka_wait_on_ram_ready();
+	RK_PKA_ReverseMemcpy((u8 *)(ptr), vaddr,
+			     size_words * sizeof(u32));
+	rk_pka_ram_ctrl_enable();
+}
+
+u32 rk_pka_exec_operation(u32 opcode, u8 len_id,
+			  u8 is_a_immed, s8 op_a,
+			  u8 is_b_immed, s8 op_b,
+			  u8 res_discard, s8 res, u8 tag)
+{
+	u32 status;
+	u32 full_opcode;
+	u32 error = CRYPT_OK;
+
+	if (res == RES_DISCARD) {
+		res_discard = 1;
+		res = 0;
+	}
+
+	full_opcode = rk_pka_make_full_opcode(opcode, len_id,
+					      is_a_immed, op_a,
+					      is_b_immed, op_b,
+					      res_discard, res, tag);
+
+	/* write full opcode into PKA CRYPTO_OPCODE register */
+	crypto_write(full_opcode, CRYPTO_OPCODE);
+
+	/*************************************************/
+	/* finishing operations for different cases      */
+	/*************************************************/
+	switch (opcode) {
+	case PKA_Div:
+		/* for Div operation check, that op_b != 0*/
+		rk_pka_get_status_div_byzero(&status);
+		if (status == 1) {
+			error = RK_PKA_DIVIDER_IS_NULL_ERROR;
+			goto end;
+		}
+		break;
+	case PKA_Terminate:
+		/* wait for PKA done bit */
+		rk_pka_wait_on_done();
+		break;
+	default:
+		/* wait for PKA pipe ready bit */
+		rk_pka_wait_on_pipe_ready();
+	}
+
+end:
+	return error;
+}
+
+u32 rk_pka_set_sizes_tab(u32 regs_sizes_ptr[RK_PKA_MAX_REGS_COUNT],
+			 u32 count_of_sizes, u32 max_size_bits,
+			 u32 is_default_map)
+{
+	u32 i;
+	u32 error;
+	u32 max_size, min_size, maxsize_words;
+
+	error = CRYPT_OK;
+	max_size = 0;
+	min_size = 0xFFFFFFFF;
+
+	if (is_default_map > 1)
+		return  RK_PKA_SET_MAP_MODE_ERROR;
+
+	/* 1. Case of user defined settings */
+	if (is_default_map == 0) {
+		/* find maximal and minimal sizes  */
+		for (i = 0; i < count_of_sizes; i++) {
+			if (max_size < regs_sizes_ptr[i] &&
+			    regs_sizes_ptr[i] != 0xFFFFFFFF)
+				max_size = regs_sizes_ptr[i];
+
+			if (min_size > regs_sizes_ptr[i])
+				min_size = regs_sizes_ptr[i];
+		}
+
+		/* set sizes into PKA registers sizes table */
+		for (i = 0; i < count_of_sizes; i++)
+			crypto_write(regs_sizes_ptr[i], CRYPTO_PKA_L0 + 4 * i);
+	} else {
+		/* 2. Case of default settings */
+		maxsize_words = (max_size_bits + 31) / 32;
+		/* write exact size into first table entry */
+		crypto_write(max_size_bits, CRYPTO_PKA_L0);
+
+		/* write size with extra word into tab[1] = tab[0] + 32 */
+		crypto_write(32 * maxsize_words + 32, CRYPTO_PKA_L0 + 4);
+
+		/* count of entries, which was set */
+		count_of_sizes = 2;
+	}
+
+	for (i = count_of_sizes; i < 8; i++)
+		crypto_write(0xFFFFFFFF, CRYPTO_PKA_L0 + 4 * i);
+
+	return error;
+}
+
+u32 rk_pka_set_map_tab(struct rk_pka_regs_map *regs_map_ptr,
+		       u32 *count_of_regs, u32 maxsize_words,
+		       u32 N_NP_T0_T1, u32 is_default_map)
+{
+	u32 i;
+	u32 error;
+	u32 cur_addr;
+	u32 default_max_size, default_count_of_regs;
+
+	error = CRYPT_OK;
+	cur_addr = 0;
+
+	if (is_default_map == 1) {
+		default_max_size = 32 * maxsize_words;
+		default_count_of_regs =
+			min(32, (8 * RK_PKA_MAX_REGS_MEM_SIZE_BYTES) /
+				default_max_size);
+
+		for (i = 0; i < 32 - 2; i++) {
+			if (i < default_count_of_regs - 2) {
+				crypto_write(cur_addr,
+					     CRYPTO_MEMORY_MAP0 + 4 * i);
+				cur_addr = cur_addr + default_max_size / 8;
+			} else {
+				crypto_write(0xFFC, CRYPTO_MEMORY_MAP0 + 4 * i);
+			}
+		}
+		crypto_write(cur_addr, CRYPTO_MEMORY_MAP0 + 4 * 30);
+		cur_addr = cur_addr + default_max_size / 8;
+		crypto_write(cur_addr, CRYPTO_MEMORY_MAP0 + 4 * 31);
+		*count_of_regs = default_count_of_regs;
+		crypto_write((u32)RK_PKA_N_NP_T0_T1_REG_DEFAULT_VAL,
+			     CRYPTO_N_NP_T0_T1_ADDR);
+	}
+
+	if (is_default_map == 0) {
+		for (i = 0; i < *count_of_regs; i++)
+			crypto_write(regs_map_ptr->regs_addr[i],
+				     CRYPTO_MEMORY_MAP0 +
+				     4 * regs_map_ptr->reges_num[i]);
+
+		crypto_write(N_NP_T0_T1, CRYPTO_N_NP_T0_T1_ADDR);
+	}
+
+	return error;
+}
+
+u32 rk_pka_clear_block_of_regs(u8 first_reg, u8 count_of_regs,
+			       u8 len_id)
+{
+	u32 i;
+	u32 size, addr;
+	s32 count_temps;
+
+	rk_pka_read_regsize(&size, len_id);
+
+	count_temps = 0;
+
+	if (first_reg + count_of_regs > 30) {
+		count_temps = min((count_of_regs + first_reg - 30), 2);
+		count_of_regs = 30;
+	} else {
+		count_temps = 2;
+	}
+
+	/* clear ordinary registers */
+	for (i = 0; i < count_of_regs; i++)
+		RK_PKA_Clr(len_id, first_reg + i/*regNum*/, 0/*tag*/);
+
+	/* clear PKA temp registers using macros (without PKA operations */
+	if (count_temps > 0) {
+		/* calculate size of register in words */
+		size = (size + 31) / 32;
+		rk_pka_wait_on_done();
+		rk_pka_get_regaddr(30/*vir_reg*/, &addr/*phys_addr*/);
+		rk_pka_hw_clear_pka_mem(addr, size);
+
+		if (count_temps > 1) {
+			rk_pka_get_regaddr(31/*vir_reg*/, &addr/*phys_addr*/);
+			rk_pka_hw_clear_pka_mem(addr, size);
+		}
+	}
+	return CRYPT_OK;
+}
+
+u32 rk_pka_init(u32 regs_sizes_ptr[RK_PKA_MAX_REGS_COUNT], u32 count_of_sizes,
+		struct rk_pka_regs_map *regs_map_ptr, u32 count_of_regs,
+		u32 op_size_bits, u32 regsize_words,
+		u32 N_NP_T0_T1, u32 is_default_map)
+{
+	u32 addr;
+	u32 error;
+
+	error = CRYPT_OK;
+
+	PKA_CLK_ENABLE();
+	rk_pka_ram_ctrl_enable();
+
+	error = rk_pka_set_sizes_tab(regs_sizes_ptr, count_of_sizes,
+				     op_size_bits, is_default_map);
+
+	if (error != CRYPT_OK)
+		return error;
+
+	error = rk_pka_set_map_tab(regs_map_ptr, &count_of_regs, regsize_words,
+				   N_NP_T0_T1, is_default_map);
+
+	if (error != CRYPT_OK)
+		return error;
+
+	/* set size of register into RegsSizesTable */
+	crypto_write(32 * regsize_words, CRYPTO_PKA_L0 + 3 * 4);
+
+	/* clean PKA data memory */
+	rk_pka_clear_block_of_regs(0, count_of_regs - 2, 3);
+
+	/* clean temp PKA registers 30,31 */
+	rk_pka_wait_on_done();
+	rk_pka_get_regaddr(30/*vir_reg*/, &addr/*phys_addr*/);
+	rk_pka_hw_clear_pka_mem(addr, regsize_words);
+	rk_pka_get_regaddr(31/*vir_reg*/, &addr/*phys_addr*/);
+	rk_pka_hw_clear_pka_mem(addr, regsize_words);
+
+	return error;
+}
+
+void rk_pka_finish(void)
+{
+	RK_PKA_Terminate(0);
+	PKA_CLK_DISABLE();
+}
+
+void rk_pka_copy_data_into_reg(s8 dst_reg, u8 len_id,
+			       u32 *src_ptr, u32 size_words)
+{
+	u32 cur_addr;
+	u32 reg_size;
+
+	RK_PKA_Terminate(0);
+
+	rk_pka_read_regaddr(dst_reg, &cur_addr);
+
+	rk_pka_read_regsize(&reg_size, len_id);
+	reg_size = (reg_size + 31) / 32;
+
+	rk_pka_hw_load_block2pka_mem(cur_addr, src_ptr, size_words);
+	cur_addr = cur_addr + sizeof(u32) * size_words;
+
+	rk_pka_hw_clear_pka_mem(cur_addr, reg_size - size_words);
+}
+
+void rk_pka_copy_data_from_reg(u32 *dst_ptr, u32 size_words,
+			       s8 src_reg)
+{
+	u32 cur_addr;
+
+	crypto_write(0, CRYPTO_OPCODE);
+
+	rk_pka_wait_on_done();
+
+	rk_pka_read_regaddr(src_reg, &cur_addr);
+
+	rk_pka_hw_read_block_from_pka_mem(cur_addr, dst_ptr, size_words);
+}
+
+u32 rk_pka_calcNp_and_initmodop(u32 len_id, u32 mod_size_bits,
+				s8 r_t0, s8 r_t1, s8 r_t2)
+{
+	u32 i;
+	u32 s;
+	u32 error;
+	u32 num_bits, num_words;
+
+	/* Set s = 132 */
+	s = 132;
+
+	/*-------------------------------------------------------------------*/
+	/* Step 1,2. Set registers: Set op_a = 2^(sizeN+32)                  */
+	/*           Registers using: 0 - N (is set in register 0,           */
+	/*           1 - NP, temp regs: r_t0 (A), r_t1, r_t2.                */
+	/*           len_id: 0 - exact size, 1 - exact+32 bit                */
+	/*-------------------------------------------------------------------*/
+
+	/* set register r_t0 = 0 */
+	RK_PKA_Clr(len_id + 1, r_t0/*op_a*/, 0/*tag*/); /* r2 = 0 */
+
+	/* calculate bit position of said bit in the word */
+	num_bits = mod_size_bits % 32;
+	num_words = mod_size_bits / 32;
+
+	/* set 1 into register r_t0 */
+	RK_PKA_Set0(len_id + 1, r_t0/*op_a*/, r_t0/*res*/, 0/*tag*/);
+
+	/* shift 1 to num_bits+31 position */
+	if (num_bits > 0)
+		RK_PKA_SHL0(len_id + 1, r_t0/*op_a*/, num_bits - 1/*s*/,
+			    r_t0/*res*/, 0/*tag*/);
+
+	/* shift to word position */
+	for (i = 0; i < num_words; i++)
+		RK_PKA_SHL0(len_id + 1, r_t0/*op_a*/, 31/*s*/,
+			    r_t0/*res*/, 0/*tag*/);
+
+	/*-------------------------------------------------------------------*/
+	/* Step 3.  Dividing:  (op_a * 2**s) / N                             */
+	/*-------------------------------------------------------------------*/
+	error = rk_pka_div_long_num(len_id,        /*len_id*/
+				    r_t0,          /*op_a*/
+				    s,            /*shift*/
+				    0,            /*op_b = N*/
+				    1,            /*res NP*/
+				    r_t1,          /*temp reg*/
+				    r_t2           /*temp reg*/);
+
+	return error;
+
+}  /* END OF LLF_PKI_PKA_ExecCalcNpAndInitModOp */
+
+/***********   LLF_PKI_PKA_DivLongNum function      **********************/
+/**
+ * @brief The function divides long number A*(2^S) by B:
+ *            res =  A*(2^S) / B,  remainder A = A*(2^S) % B.
+ *        where: A,B - are numbers of size, which is not grate than,
+ *		 maximal operands size,
+ *		 and B > 2^S;
+ *               S  - exponent of binary factor of A.
+ *               ^  - exponentiation operator.
+ *
+ *        The function algorithm:
+ *
+ *        1. Let nWords = S/32; nBits = S % 32;
+ *        2. Set res = 0, r_t1 = op_a;
+ *        3. for(i=0; i<=nWords; i++) do:
+ *            3.1. if(i < nWords )
+ *                   s1 = 32;
+ *                 else
+ *                   s1 = nBits;
+ *            3.2. r_t1 = r_t1 << s1;
+ *            3.3. call PKA_div for calculating the quotient and remainder:
+ *                      r_t2 = floor(r_t1/op_b) //quotient;
+ *                      r_t1 = r_t1 % op_b   //remainder (is in r_t1 register);
+ *            3.4. res = (res << s1) + r_t2;
+ *           end do;
+ *        4. Exit.
+ *
+ *        Assuming:
+ *                  - 5 PKA registers are used: op_a, op_b, res, r_t1, r_t2.
+ *                  - The registers sizes and mapping tables are set on
+ *                    default mode according to operands size.
+ *                  - The PKA clocks are initialized.
+ *        NOTE !   Operand op_a shall be overwritten by remainder.
+ *
+ * @param[in] len_id    - ID of operation size (modSize+32).
+ * @param[in] op_a      - Operand A: virtual register pointer of A.
+ * @param[in] S        - exponent of binary factor of A.
+ * @param[in] op_b      - Operand B: virtual register pointer of B.
+ * @param[in] res      - Virtual register pointer for result quotient.
+ * @param[in] r_t1      - Virtual pointer to remainder.
+ * @param[in] r_t2      - Virtual pointer of temp register.
+ * @param[in] VirtualHwBaseAddr -  Virtual HW base address, passed by user.
+ *
+ * @return CRYSError_t - On success CRYPT_OK is returned:
+ *
+ */
+u32 rk_pka_div_long_num(u8 len_id, s8 op_a, u32 s,
+			s8 op_b, s8 res, s8 r_t1, s8 r_t2)
+{
+	s8 s1;
+	u32  i;
+	u32  n_bits, n_words;
+
+	/* calculate shifting parameters (words and bits ) */
+	n_words = ((u32)s + 31) / 32;
+	n_bits = (u32)s % 32;
+
+	/* copy operand op_a (including extra word) into temp reg r_t1 */
+	RK_PKA_Copy(len_id + 1, r_t1/*dst*/, op_a/*src*/, 0 /*tag*/);
+
+	/* set res = 0 (including extra word) */
+	RK_PKA_Clear(len_id + 1, res/*dst*/, 0 /*tag*/);
+
+	/* set s1 = 0 for first dividing in loop */
+	s1 = 0;
+
+	/*----------------------------------------------------*/
+	/* Step 1.  Shifting and dividing loop                */
+	/*----------------------------------------------------*/
+	for (i = 0; i < n_words; i++) {
+		/* 3.1 set shift value s1  */
+		if (i > 0)
+			s1 = 32;
+		else
+			s1 = n_bits;
+
+		/* 3.2. shift: r_t1 = r_t1 * 2**s1 (in code (s1-1),
+		 * because PKA performs s+1 shifts)
+		 */
+		if (s1 > 0)
+			RK_PKA_SHL0(len_id + 1, r_t1/*op_a*/, (s1 - 1)/*s*/,
+				    r_t1/*res*/, 0/*tag*/);
+
+		/* 3.3. perform PKA_Div for calculating a quotient
+		 * r_t2 = floor(r_t1 / N)
+		and remainder r_t1 = r_t1 % op_b
+		 */
+		RK_PKA_Div(len_id + 1, r_t1/*op_a*/, op_b/*B*/, r_t2/*res*/,
+			   0/*tag*/);
+
+		/* 3.4. res = res * 2**s1 + res;   */
+		if (s1 > 0)
+			RK_PKA_SHL0(len_id + 1, res /*op_a*/, (s1 - 1)/*s*/,
+				    res /*res*/, 0 /*tag*/);
+
+		RK_PKA_Add(len_id + 1, res/*op_a*/, r_t2/*op_b*/, res/*res*/,
+			   0/*tag*/);
+	}
+
+	rk_pka_wait_on_done();
+	return CRYPT_OK;
+}  /* END OF LLF_PKI_PKA_DivLongNum */
+
+/******LLF_PKI_CalcNpAndInitModOp function (physical pointers)***************/
+/**
+ * @brief The function initializes  modulus and Barret tag NP,
+ *	      used in modular PKA operations.
+ *
+ *        The function does the following:
+ *          - calculates mod size in bits and sets it into PKA table sizes;
+ *          - if parameter NpCreateFlag = PKA_CreateNP, then the function
+ *            writes the modulus and the tag into registers
+ *            r0 and r1 accordingly;
+ *          - if NpCreateFlag= PKA_SetNP, the function calls the
+ *            LLF_PKI_PKA_ExecCalcNpAndInitModOp, which calculates the Barret
+ *            tag NP and initializes PKA registers; then the function outputs
+ *            calcu1lated NP value.
+ *
+ *       Assumings: - The registers mapping table is set on default mode,
+ *            according to modulus size:
+ *         -- count of allowed registers is not less, than 7 (including 3
+ *            registers r_t0,r_t2,rT3 for internal calculations and 4 default
+ *            special registers N,NP,T0,T1);
+ *         -- modulus exact and exact+32 bit sizes should be set into first
+ *            two entries of sizes-table accordingly.
+ *
+ * @param[in]  N_ptr        - The pointer to the buffer, containing modulus N,
+ * @param[in]  N_sizeBits   - The size of modulus in bytes, must be
+ *				16 <= N_sizeBytes <= 264.
+ * @param[out] NP_ptr       - The pointer to the buffer, containing
+ *				result - modulus tag NP.
+ * @param[in]  NpCreateFlag - Parameter, defining whether the NP shall be
+ *				taken from NP buffer and set into
+ *                            PKA register NP ( NpCreateFlag= PKA_CreateNP= 1 )
+ *                            or it shall be calculated and send to
+ *                            NP buffer ( NpCreateFlag= PKA_SetNP= 0 ).
+ * @param[in]  r_t0,r_t1,r_t2  - Virtual pointers to temp registers
+ *						  (sequence numbers).
+ * @param[in]  VirtualHwBaseAddr -  Virtual HW base address, passed by user.
+ *
+ * @return CRYSError_t - On success CRYPT_OK is returned,
+ *				on failure an error code:
+ *				LLF_PKI_PKA_ILLEGAL_PTR_ERROR
+ *				LLF_PKI_PKA_ILLEGAL_OPERAND_LEN_ERROR
+ *
+ */
+u32 rk_calcNp_and_initmodop(u32 *N_ptr, u32 N_size_bits,
+			    u32 *NP_ptr, u8 np_create_flag,
+			    s8 r_t0, s8 r_t1, s8 r_t2)
+{
+	u32 N_size_words;
+	u32 error = CRYPT_OK;
+
+	/* calculate size of modulus in bytes and in words */
+	N_size_words = (N_size_bits + 31) / 32;
+
+	/* copy modulus N into r0 register */
+	rk_pka_copy_data_into_reg(0/*dst_reg*/, 1/*len_id*/, N_ptr/*src_ptr*/,
+				  N_size_words);
+
+	/* if np_create_flag == PKA_SetNP, then set NP into PKA register r1 */
+	if (np_create_flag == RK_PKA_SET_NP) {
+		/* copy the NP into r1 register NP */
+		rk_pka_copy_data_into_reg(1/*dst_reg*/, 1/*len_id*/,
+					  NP_ptr/*src_ptr*/,
+					  RK_PKA_BARRETT_IN_WORDS);
+	} else {
+		/*---------------------------------------------------------*/
+		/*     execute calculation of NP and initialization of PKA */
+		/*---------------------------------------------------------*/
+
+		rk_pka_calcNp_and_initmodop(0/*len_id*/, N_size_bits,
+					    r_t0, r_t1, r_t2);
+
+		/* output of NP value */
+		rk_pka_copy_data_from_reg(NP_ptr/*dst_ptr*/,
+					  RK_PKA_BARRETT_IN_WORDS,
+					  1/*srcReg*/);
+	}
+	/* End of the function */
+	return error;
+} /* END OF LLF_PKI_CalcNpAndInitModOp */
+
+#define RK_NEG_SIGN -1
+#define RK_POS_SIGN  1
+
+#define RK_WORD_SIZE                  32
+
+#define rk_mpanum_is_zero(x) ((x)->size == 0)
+#define rk_mpanum_neg(x) ((x)->size = -((x)->size))
+#define rk_mpanum_size(x) ((int)((x)->size >= 0 ? \
+				 (x)->size : -(x)->size))
+#define rk_mpanum_sign(x) ((x)->size >= 0 ? RK_POS_SIGN : RK_NEG_SIGN)
+#define rk_mpanum_msw(x) ((x)->d[rk_mpanum_size(x) - 1])
+
+/*  --------------------------------------------------------------------
+ *  Function:  mpa_highest_bit_index
+ *  Returns the index of the highest 1 in |src|.
+ *  The index starts at 0 for the least significant bit.
+ *  If src == zero, it will return -1
+ *
+ */
+static int mpa_highest_bit_index(const struct mpa_num *src)
+{
+	u32 w;
+	u32 b;
+
+	if (rk_mpanum_is_zero(src))
+		return -1;
+
+	w = rk_mpanum_msw(src);
+
+	for (b = 0; b < RK_WORD_SIZE; b++) {
+		w >>= 1;
+		if (w == 0)
+			break;
+	}
+	return (int)(rk_mpanum_size(src) - 1) * RK_WORD_SIZE + b;
+}
+
+/*get bignum data length*/
+static int rk_check_size(u32 *data, u32 max_word_size)
+{
+	for (int i = (max_word_size - 1); i >= 0; i--) {
+		if (data[i] == 0)
+			continue;
+		else
+			return (i + 1);
+	}
+	return 0;
+}
+
+int rk_mpa_alloc(struct mpa_num **mpa)
+{
+	if (!mpa)
+		return -EINVAL;
+
+	*mpa = malloc(sizeof(**mpa));
+	if (!(*mpa))
+		return -ENOMEM;
+
+	memset(*mpa, 0x00, sizeof(**mpa));
+
+	return 0;
+}
+
+void rk_mpa_free(struct mpa_num **mpa)
+{
+	if (mpa && (*mpa))
+		free(*mpa);
+}
+
+/* c = |a| + |b| */
+int rk_abs_add(void *a, void *b, void *c)
+{
+	int max_word_size;
+	u32 error = CRYPT_OK;
+	struct mpa_num *m_a, *m_b, *m_c;
+
+	m_a = (struct mpa_num *)a;
+	m_b = (struct mpa_num *)b;
+	m_c = (struct mpa_num *)c;
+
+	max_word_size = rk_mpanum_size(m_a);
+	if (max_word_size < rk_mpanum_size(m_b))
+		max_word_size = rk_mpanum_size(m_b);
+
+	error = RK_PKA_DefaultInitPKA(max_word_size * 32, max_word_size + 1);
+	if (error != CRYPT_OK)
+		goto exit;
+
+	rk_pka_copy_data_into_reg(2/*dst_reg*/, 1/*len_id*/, m_a->d,
+				  rk_mpanum_size(m_a));
+	rk_pka_copy_data_into_reg(3/*dst_reg*/, 1/*len_id*/, m_b->d,
+				  rk_mpanum_size(m_b));
+	RK_PKA_Add(1/*len_id*/, 2/*op_a*/, 3/*op_b*/, 4/*res*/, 0/*tag*/);
+	rk_pka_copy_data_from_reg(m_c->d, max_word_size + 1,
+				  4/*srcReg*/);
+
+	m_c->size = rk_check_size(m_c->d,  max_word_size + 1);
+
+	rk_pka_clear_block_of_regs(0/*FirstReg*/, 5/*Count*/, 1/*len_id*/);
+	rk_pka_clear_block_of_regs(30/*FirstReg*/, 2/*Count*/, 1/*len_id*/);
+	rk_pka_finish();
+
+exit:
+	return error;
+}
+
+/*c = a % b*/
+int rk_mod(void *a, void *b, void *c)
+{
+	int max_word_size;
+	u32 error = CRYPT_OK;
+	struct mpa_num *m_a, *m_b, *m_c;
+
+	m_a = (struct mpa_num *)a;
+	m_b = (struct mpa_num *)b;
+	m_c = (struct mpa_num *)c;
+
+	if (!a || !b || !c || rk_mpanum_size(m_b) == 0) {
+		error = CRYPT_ERROR;
+		goto exit;
+	}
+
+	max_word_size = rk_mpanum_size(m_a);
+	if (max_word_size < rk_mpanum_size(m_b))
+		max_word_size = rk_mpanum_size(m_b);
+
+	error = RK_PKA_DefaultInitPKA(max_word_size * 32, max_word_size + 1);
+	if (error != CRYPT_OK)
+		goto exit;
+
+	rk_pka_copy_data_into_reg(2/*dst_reg*/, 1/*len_id*/,
+				  m_a->d/*src_ptr*/,
+				  rk_mpanum_size(m_a));
+	rk_pka_copy_data_into_reg(3/*dst_reg*/, 1/*len_id*/,
+				  m_b->d/*src_ptr*/,
+				  rk_mpanum_size(m_b));
+	RK_PKA_Div(0/*len_id*/, 2/*op_a*/, 3/*op_b*/, 4/*res*/, 0/*tag*/);
+	rk_pka_copy_data_from_reg(m_c->d,  max_word_size, 2/*srcReg*/);
+	m_c->size = rk_check_size(m_c->d, max_word_size);
+
+	rk_pka_clear_block_of_regs(0/*FirstReg*/, 5/*Count*/, 1/*len_id*/);
+	rk_pka_clear_block_of_regs(30/*FirstReg*/, 2/*Count*/, 1/*len_id*/);
+	rk_pka_finish();
+
+exit:
+	return error;
+}
+
+/*d = (a ^ b) % c*/
+int rk_exptmod(void *a, void *b, void *c, void *d)
+{
+	struct mpa_num *tmpa;
+	u32 op_Np[5];
+	u32 error = CRYPT_OK;
+	int max_word_size, exact_size;
+	struct mpa_num *m_b, *m_c, *m_d;
+
+	m_b = (struct mpa_num *)b;
+	m_c = (struct mpa_num *)c;
+	m_d = (struct mpa_num *)d;
+
+	if (rk_mpa_alloc(&tmpa) != 0)
+		return CRYPT_ERROR;
+
+	tmpa->d = malloc(RK_MAX_RSA_NCHARS);
+	if (!tmpa->d) {
+		error = -ENOMEM;
+		goto exit;
+	}
+
+	rk_mod(a, c, tmpa);
+
+	if (!a || !b || !c || !d || rk_mpanum_size(m_c) == 0) {
+		error = CRYPT_ERROR;
+		goto exit;
+	}
+
+	max_word_size = rk_mpanum_size(tmpa);
+	if (max_word_size < rk_mpanum_size(m_b))
+		max_word_size = rk_mpanum_size(m_b);
+	if (max_word_size < rk_mpanum_size(m_c))
+		max_word_size = rk_mpanum_size(m_c);
+
+	error = RK_PKA_DefaultInitPKA(max_word_size * 32, max_word_size + 1);
+	if (error != CRYPT_OK)
+		goto exit;
+
+	/* write exact size into first table entry */
+	exact_size = mpa_highest_bit_index(m_c) + 1;
+	crypto_write(exact_size, CRYPTO_PKA_L0);
+
+	/* write size with extra word into tab[1] = tab[0] + 32 */
+	crypto_write(exact_size + 32, CRYPTO_PKA_L0 + 4);
+
+	/* calculate NP by initialization PKA for modular operations */
+	error = rk_calcNp_and_initmodop(
+					(m_c)->d, /*in N*/
+					exact_size, /*in N size*/
+					op_Np, /*out NP*/
+					RK_PKA_CREATE_NP, /*in caculate NP*/
+					2, /*in *r_t0*/
+					3, /*in r_t1*/
+					4 /*in r_t2*/);
+	if (error != CRYPT_OK) {
+		printf("rk_calcNp_and_initmodop fail");
+		goto exit;
+	}
+	rk_pka_clear_block_of_regs(2/* FirstReg*/, 3, 1/*len_id*/);
+
+	rk_pka_copy_data_into_reg(2/*dst_reg*/, 1/*len_id*/,
+				  tmpa->d/*src_ptr*/,
+				  rk_mpanum_size(tmpa));
+	rk_pka_copy_data_into_reg(3/*dst_reg*/, 1/*len_id*/,
+				  (m_b)->d/*src_ptr*/,
+				  rk_mpanum_size(m_b));
+	rk_pka_copy_data_into_reg(0/*dst_reg*/, 1/*len_id*/,
+				  m_c->d/*src_ptr*/,
+				  rk_mpanum_size(m_c));
+	RK_PKA_ModExp(0, 2, 3, 4, 0);
+	rk_pka_copy_data_from_reg(m_d->d,  max_word_size, 4/*srcReg*/);
+
+	m_d->size = rk_check_size(m_d->d, max_word_size);
+
+	rk_pka_clear_block_of_regs(0/*FirstReg*/, 5/*Count*/, 1/*len_id*/);
+	rk_pka_clear_block_of_regs(30/*FirstReg*/, 2/*Count*/, 1/*len_id*/);
+	rk_pka_finish();
+
+exit:
+	if (tmpa->d)
+		free(tmpa->d);
+
+	rk_mpa_free(&tmpa);
+	return error;
+}
+
+/*d = (a ^ b) % c*/
+int rk_exptmod_np(void *m, void *e, void *n, void *np, void *d)
+{
+	struct mpa_num *tmpa;
+	u32 op_Np[5];
+	u32 error = CRYPT_OK;
+	int max_word_size, exact_size;
+	struct mpa_num *m_e, *m_n, *m_np, *m_d;
+
+	m_e = (struct mpa_num *)e;
+	m_n = (struct mpa_num *)n;
+	m_np = (struct mpa_num *)np;
+	m_d = (struct mpa_num *)d;
+
+	if (rk_mpa_alloc(&tmpa) != 0)
+		return CRYPT_ERROR;
+
+	tmpa->d = malloc(RK_MAX_RSA_NCHARS);
+	if (!tmpa->d) {
+		error = -ENOMEM;
+		goto exit;
+	}
+
+	memset(tmpa->d, 0x00, sizeof(RK_MAX_RSA_NCHARS));
+	rk_mod(m, n, tmpa);
+
+	if (!m || !e || !n || !d || rk_mpanum_size(m_n) == 0) {
+		error = CRYPT_ERROR;
+		goto exit;
+	}
+
+	max_word_size = rk_mpanum_size(tmpa);
+	if (max_word_size < rk_mpanum_size(m_e))
+		max_word_size = rk_mpanum_size(m_e);
+	if (max_word_size < rk_mpanum_size(m_n))
+		max_word_size = rk_mpanum_size(m_n);
+
+	error = RK_PKA_DefaultInitPKA(max_word_size * 32, max_word_size + 1);
+	if (error != CRYPT_OK)
+		goto exit;
+
+	/* write exact size into first table entry */
+	exact_size = mpa_highest_bit_index(m_n) + 1;
+	crypto_write(exact_size, CRYPTO_PKA_L0);
+
+	/* write size with extra word into tab[1] = tab[0] + 32 */
+	crypto_write(exact_size + 32, CRYPTO_PKA_L0 + 4);
+
+	/* calculate NP by initialization PKA for modular operations */
+	if (m_np->d)
+		error = rk_calcNp_and_initmodop((m_n)->d, /*in N*/
+						exact_size,	/*in N size*/
+						np,	/*out NP*/
+						RK_PKA_SET_NP, /*in set NP*/
+						2,	/*in *r_t0*/
+						3,	/*in r_t1*/
+						4	/*in r_t2*/);
+	else
+		error = rk_calcNp_and_initmodop((m_n)->d,/*in N*/
+						exact_size,	/*in N size*/
+						op_Np,	/*out NP*/
+						RK_PKA_CREATE_NP,
+						2,	/*in *r_t0*/
+						3,	/*in r_t1*/
+						4	/*in r_t2*/);
+	if (error != CRYPT_OK) {
+		printf("rk_calcNp_and_initmodop fail");
+		goto exit;
+	}
+	rk_pka_clear_block_of_regs(2/* FirstReg*/, 3, 1/*len_id*/);
+
+	rk_pka_copy_data_into_reg(2/*dst_reg*/, 1/*len_id*/,
+				  (tmpa)->d/*src_ptr*/,
+				  rk_mpanum_size(tmpa));
+	rk_pka_copy_data_into_reg(3/*dst_reg*/, 1/*len_id*/,
+				  m_e->d/*src_ptr*/,
+				  rk_mpanum_size(m_e));
+	rk_pka_copy_data_into_reg(0/*dst_reg*/, 1/*len_id*/,
+				  (m_n)->d/*src_ptr*/,
+				  rk_mpanum_size(m_n));
+	RK_PKA_ModExp(0, 2, 3, 4, 0);
+	rk_pka_copy_data_from_reg(m_d->d, max_word_size, 4/*srcReg*/);
+
+	m_d->size = rk_check_size(m_d->d, max_word_size);
+
+	rk_pka_clear_block_of_regs(0/*FirstReg*/, 5/*Count*/, 1/*len_id*/);
+	rk_pka_clear_block_of_regs(30/*FirstReg*/, 2/*Count*/, 1/*len_id*/);
+	rk_pka_finish();
+
+exit:
+	if (tmpa->d)
+		free(tmpa->d);
+
+	rk_mpa_free(&tmpa);
+	return error;
+}
diff --git a/drivers/crypto/rockchip/crypto_v2_util.c b/drivers/crypto/rockchip/crypto_v2_util.c
new file mode 100644
index 0000000000..97ed1578f1
--- /dev/null
+++ b/drivers/crypto/rockchip/crypto_v2_util.c
@@ -0,0 +1,155 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <rockchip/crypto_v2_util.h>
+
+/* ------------------------------------------------------------
+ **
+ * @brief This function executes a reversed words copy on a specified buffer.
+ *
+ *        on a 6 words buffer:
+ *
+ *        buff[5] <---> buff[0]
+ *        buff[4] <---> buff[1]
+ *        buff[3] <---> buff[2]
+ *
+ * @param[in] dst_ptr - The counter buffer.
+ * @param[in] size    - The counter size in words.
+ *
+ */
+void util_reverse_words_buff(u32 *buff_ptr, u32 size_words)
+{
+	u32 i;
+	u32 temp;
+	u32 *high_swap_ptr, *low_swap_ptr;
+
+	/* initialize the source and the destination poision */
+	high_swap_ptr = buff_ptr + size_words - 1;
+	low_swap_ptr  = buff_ptr;
+
+	/* execute the reverse memcpoy */
+	for (i = 0; i < (size_words / 2); i++) {
+		temp				= *high_swap_ptr;
+		*(high_swap_ptr--)	= *low_swap_ptr;
+		*(low_swap_ptr++)	= temp;
+	}
+} /* END OF util_reverse_words_buff */
+
+/* ------------------------------------------------------------
+ **
+ * @brief This function executes a reversed byte copy on a specified buffer.
+ *
+ *        on a 6 byte buffer:
+ *
+ *        buff[5] <---> buff[0]
+ *        buff[4] <---> buff[1]
+ *        buff[3] <---> buff[2]
+ *
+ * @param[in] dst_ptr - The counter buffer.
+ * @param[in] src_ptr - The counter size in bytes.
+ *
+ */
+void util_reverse_buff(u8 *buff_ptr, u32 size)
+{
+	u32 i;
+	u32 temp;
+	u8 *high_swap_ptr, *low_swap_ptr;
+
+	/* initialize the source and the destination poision */
+	high_swap_ptr = buff_ptr + size - 1;
+	low_swap_ptr  = buff_ptr;
+
+	/* execute the reverse memcpoy */
+	for (i = 0; i < (size / 2); i++) {
+		temp			= *high_swap_ptr;
+		*(high_swap_ptr--)	= *low_swap_ptr;
+		*(low_swap_ptr++)	= temp;
+	}
+} /* END OF util_reverse_buff */
+
+/* ------------------------------------------------------------
+ **
+ * @brief This function executes a reverse bytes copying from one buffer to
+ * another buffer.
+ *
+ * @param[in] dst_ptr - The pointer to destination buffer.
+ * @param[in] src_ptr - The pointer to source buffer.
+ * @param[in] size    - The size in bytes.
+ *
+ */
+void util_reverse_memcpy(u8 *dst_ptr, const u8 *src_ptr, u32 size)
+{
+	u32 i;
+	u32 buff_dst_pos, buff_src_pos;
+
+	/* execute the reverse copy in case of different buffers */
+	/* initialize the source and the destination position */
+	buff_dst_pos = size - 1;
+	buff_src_pos = 0;
+
+	for (i = 0; i < size; i++)
+		dst_ptr[buff_dst_pos--] = src_ptr[buff_src_pos++];
+} /* END OF util_reverse_memcpy */
+
+/* ------------------------------------------------------------
+ **
+ * @brief This function executes a memory copy between 2 buffers.
+ *
+ * @param[in] dst_ptr - The first counter buffer.
+ * @param[in] src_ptr - The second counter buffer.
+ * @param[in] size    - the first counter size in words.
+ *
+ */
+void util_word_memcpy(u32 *dst_ptr, u32 *src_ptr, u32 size)
+{
+	u32 i;
+
+	/* execute the reverse memcpoy */
+	for (i = 0; i < size; i++)
+		dst_ptr[i] = src_ptr[i];
+} /* END OF util_memcpy */
+
+/* ------------------------------------------------------------
+ **
+ * @brief This function executes a reverse bytes copying from one buffer
+ * to another buffer.
+ *
+ * @param[in] dst_ptr - The pointer to destination buffer.
+ * @param[in] src_ptr - The pointer to source buffer.
+ * @param[in] size    - The size in words.
+ *
+ */
+void util_reverse_word_memcpy(u32 *dst_ptr, u32 *src_ptr, u32 size)
+{
+	u32 i;
+	u32 buff_dst_pos, buff_src_pos;
+
+	/* execute the reverse copy in case of different buffers */
+	/* initialize the source and the destination position */
+	buff_dst_pos = size - 1;
+	buff_src_pos = 0;
+
+	for (i = 0; i < size; i++)
+		dst_ptr[buff_dst_pos--] = src_ptr[buff_src_pos++];
+} /* END OF util_reverse_memcpy */
+
+/* ------------------------------------------------------------
+ **
+ * @brief This function executes a memory set operation on a buffer.
+ *
+ * @param[in] buff_ptr - the buffer.
+ * @param[in] val      - The value to set the buffer.
+ * @param[in] size     - the buffers size in words.
+ *
+ */
+void util_word_memset(u32 *buff_ptr, u32 val, u32 size)
+{
+	u32 i;
+
+	/* execute the reverse memcpoy */
+	for (i = 0; i < size; i++)
+		buff_ptr[i] = val;
+} /* END OF util_memcpy */
diff --git a/include/crypto.h b/include/crypto.h
index d5dcb5d274..487079dcb2 100644
--- a/include/crypto.h
+++ b/include/crypto.h
@@ -13,6 +13,8 @@
 #define CRYPTO_RSA512		BIT(3)
 #define CRYPTO_RSA1024		BIT(4)
 #define CRYPTO_RSA2048		BIT(5)
+#define CRYPTO_RSA3072		BIT(6)
+#define CRYPTO_RSA4096		BIT(7)
 
 #define BYTE2WORD(bytes)	((bytes) / 4)
 #define BITS2BYTE(nbits)	((nbits) / 8)
diff --git a/include/rockchip/crypto_v2.h b/include/rockchip/crypto_v2.h
new file mode 100644
index 0000000000..bcbaf0788c
--- /dev/null
+++ b/include/rockchip/crypto_v2.h
@@ -0,0 +1,608 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _ROCKCHIP_CRYPTO_V2_H_
+#define _ROCKCHIP_CRYPTO_V2_H_
+
+#include <asm/io.h>
+
+#define	cache_op_inner(area, addr, size) \
+		flush_cache((unsigned long)addr, (unsigned long)size)
+
+#define	RK_CRYPTO_KEY_ROOT		   0x00010000
+#define	RK_CRYPTO_KEY_PRIVATE		   0x00020000
+#define	RK_CRYPTO_MODE_MASK		   0x0000ffff
+#define	RK_GET_CRYPTO_MODE(mode)	   (mode & RK_CRYPTO_MODE_MASK)
+#define	RK_IS_CRYPTO_USE_ROOT_KEY(mode)    (!!(mode & RK_CRYPTO_KEY_ROOT))
+#define	RK_IS_CRYPTO_USE_PRIVATE_KEY(mode) (!!(mode & RK_CRYPTO_KEY_PRIVATE)
+
+#define	RK_AES_HASH_RX	0
+#define	RK_AES_HASH_TX	1
+
+enum rk_hash_algo {
+	TEE_ALG_SHA1 = 1,
+	TEE_ALG_MD5,
+	TEE_ALG_SHA256,
+	TEE_ALG_SHA224,
+	TEE_ALG_SHA512,
+	TEE_ALG_SHA384,
+	TEE_ALG_SHA512_224,
+	TEE_ALG_SHA512_256,
+};
+
+#define	_SBF(s,	v)			((v) <<	(s))
+#define	_BIT(b)				_SBF(b,	1)
+
+#define	DES_KEYSIZE			8
+#define	TDES_EDE_KEYSIZE		24
+#define	AES_KEYSIZE_128			16
+#define	AES_KEYSIZE_192			24
+#define	AES_KEYSIZE_256			32
+
+#define	DES_BLOCK_SIZE			8
+#define	AES_BLOCK_SIZE			16
+
+#define	RK_MODE_ENCRYPT			0
+#define	RK_MODE_DECRYPT			1
+
+#define	HASH_MAX_SIZE			8192
+#define	CIPHER_MAX_SIZE			8192
+
+#define	_SBF(s,	v)			((v) <<	(s))
+#define	_BIT(b)				_SBF(b,	1)
+
+#define	DES_KEYSIZE			8
+#define	TDES_EDE_KEYSIZE		24
+#define	AES_KEYSIZE_128			16
+#define	AES_KEYSIZE_192			24
+#define	AES_KEYSIZE_256			32
+
+#define	DES_BLOCK_SIZE			8
+#define	AES_BLOCK_SIZE			16
+
+#define	RK_MODE_ENCRYPT			0
+#define	RK_MODE_DECRYPT			1
+
+#define	CRYPTO_WRITE_MASK_SHIFT		(16)
+#define	CRYPTO_WRITE_MASK_ALL		((0xffffu << CRYPTO_WRITE_MASK_SHIFT))
+
+#define	WRITE_MASK			(16)
+
+#define	CRU_CLKGATE_CON8_ALLCLK_EN	_SBF(12, 0x0F)
+#define	CRU_CLKGATE_CON9_ALLCLK_EN	_SBF(2,	0x0F)
+
+#define	CRYPTO_MST_NON_SECURE		_SBF(0,	0x03)
+#define	CRYPTO_SLV_SECURE		_BIT(8)
+
+/* Crypto control registers*/
+#define	CRYPTO_CLK_CTL			0x0000
+#define	CRYPTO_AUTO_CLKGATE_EN		_BIT(0)
+
+#define	CRYPTO_RST_CTL			0x0004
+#define	CRYPTO_SW_PKA_RESET		_BIT(2)
+#define	CRYPTO_SW_RNG_RESET		_BIT(1)
+#define	CRYPTO_SW_CC_RESET		_BIT(0)
+
+/* Crypto DMA control registers*/
+#define	CRYPTO_DMA_INT_EN		0x0008
+#define	CRYPTO_ZERO_ERR_INT_EN		_BIT(6)
+#define	CRYPTO_LIST_ERR_INT_EN		_BIT(5)
+#define	CRYPTO_SRC_ERR_INT_EN		_BIT(4)
+#define	CRYPTO_DST_ERR_INT_EN		_BIT(3)
+#define	CRYPTO_SRC_ITEM_INT_EN		_BIT(2)
+#define	CRYPTO_DST_ITEM_DONE_INT_EN	_BIT(1)
+#define	CRYPTO_LIST_DONE_INT_EN		_BIT(0)
+
+#define	CRYPTO_DMA_INT_ST		0x000C
+#define	CRYPTO_ZERO_LEN_INT_ST		_BIT(6)
+#define	CRYPTO_LIST_ERR_INT_ST		_BIT(5)
+#define	CRYPTO_SRC_ERR_INT_ST		_BIT(4)
+#define	CRYPTO_DST_ERR_INT_ST		_BIT(3)
+#define	CRYPTO_SRC_ITEM_DONE_INT_ST	_BIT(2)
+#define	CRYPTO_DST_ITEM_DONE_INT_ST _BIT(1)
+#define	CRYPTO_LIST_DONE_INT_ST		_BIT(0)
+
+#define	CRYPTO_DMA_CTL			0x0010
+#define	CRYPTO_DMA_RESTART		_BIT(1)
+#define	CRYPTO_DMA_START		_BIT(0)
+
+/* DMA LIST Start Address Register */
+#define	CRYPTO_DMA_LLI_ADDR		0x0014
+
+#define	CRYPTO_DMA_ST			0x0018
+#define	CRYPTO_DMA_BUSY			_BIT(0)
+
+#define	CRYPTO_DMA_STATE		0x001C
+#define	CRYPTO_LLI_IDLE_STATE		_SBF(4,	0x00)
+#define	CRYPTO_LLI_FETCH_STATE		_SBF(4,	0x01)
+#define	CRYPTO_LLI_WORK_STATE		_SBF(4,	0x02)
+#define	CRYPTO_SRC_IDLE_STATE		_SBF(2,	0x00)
+#define	CRYPTO_SRC_LOAD_STATE		_SBF(2,	0x01)
+#define	CRYPTO_SRC_WORK_STATE		_SBF(2,	0x02)
+#define	CRYPTO_DST_IDLE_STATE		_SBF(0,	0x00)
+#define	CRYPTO_DST_LOAD_STATE		_SBF(0,	0x01)
+#define	CRYPTO_DST_WORK_STATE		_SBF(0,	0x02)
+
+/* DMA LLI Read	Address	Register */
+#define	CRYPTO_DMA_LLI_RADDR		0x0020
+
+/* DMA Source Data Read	Address	Register */
+#define	CRYPTO_DMA_SRC_RADDR		0x0024
+
+/* DMA Destination Data	Read Address Register */
+#define	CRYPTO_DMA_DST_RADDR		0x0028
+
+#define	CRYPTO_DMA_ITEM_ID		0x002C
+
+#define	CRYPTO_FIFO_CTL			0x0040
+#define	CRYPTO_DOUT_BYTESWAP		_BIT(1)
+#define	CRYPTO_DOIN_BYTESWAP		_BIT(0)
+
+/* Block Cipher	Control	Register */
+#define	CRYPTO_BC_CTL			0x0044
+#define	CRYPTO_BC_AES			_SBF(8,	0x00)
+#define	CRYPTO_BC_DES			_SBF(8,	0x02)
+#define	CRYPTO_BC_TDES			_SBF(8,	0x03)
+#define	CRYPTO_BC_ECB			_SBF(4,	0x00)
+#define	CRYPTO_BC_CBC			_SBF(4,	0x01)
+#define	CRYPTO_BC_CTS			_SBF(4,	0x02)
+#define	CRYPTO_BC_CTR			_SBF(4,	0x03)
+#define	CRYPTO_BC_CFB			_SBF(4,	0x04)
+#define	CRYPTO_BC_OFB			_SBF(4,	0x05)
+#define	CRYPTO_BC_XTS			_SBF(4,	0x06)
+#define	CRYPTO_BC_CCM			_SBF(4,	0x07)
+#define	CRYPTO_BC_GCM			_SBF(4,	0x08)
+#define	CRYPTO_BC_CMAC			_SBF(4,	0x09)
+#define	CRYPTO_BC_CBC_MAC		_SBF(4,	0x0A)
+#define	CRYPTO_BC_128_bit_key		_SBF(2,	0x00)
+#define	CRYPTO_BC_192_bit_key		_SBF(2,	0x01)
+#define	CRYPTO_BC_256_bit_key		_SBF(2,	0x02)
+#define	CRYPTO_BC_DECRYPT		_BIT(1)
+#define	CRYPTO_BC_ENABLE		_BIT(0)
+
+/* Hash	Control	Register */
+#define	CRYPTO_HASH_CTL			0x0048
+#define	CRYPTO_MODE_SHA1		_SBF(4,	0x00)
+#define	CRYPTO_MODE_MD5			_SBF(4,	0x01)
+#define	CRYPTO_MODE_SHA256		_SBF(4,	0x02)
+#define	CRYPTO_MODE_SHA224		_SBF(4,	0x03)
+#define	CRYPTO_MODE_SHA512		_SBF(4,	0x08)
+#define	CRYPTO_MODE_SHA384		_SBF(4,	0x09)
+#define	CRYPTO_MODE_SHA512_224		_SBF(4,	0x0A)
+#define	CRYPTO_MODE_SHA512_256		_SBF(4,	0x0B)
+#define	CRYPTO_HMAC_ENABLE		_BIT(3)
+#define	CRYPTO_HW_PAD_ENABLE		_BIT(2)
+#define	CRYPTO_HASH_SRC_SEL		_BIT(1)
+#define	CRYPTO_HASH_ENABLE		_BIT(0)
+
+/* Cipher Status Register */
+#define	CRYPTO_CIPHER_ST		0x004C
+#define	CRYPTO_OTP_KEY_VALID		_BIT(2)
+#define	CRYPTO_HASH_BUSY		_BIT(1)
+#define	CRYPTO_BLOCK_CIPHER_BUSY	_BIT(0)
+
+#define	CRYPTO_CIPHER_STATE		0x0050
+#define	CRYPTO_HASH_IDLE_STATE		_SBF(10, 0x01)
+#define	CRYPTO_HASH_IPAD_STATE		_SBF(10, 0x02)
+#define	CRYPTO_HASH_TEXT_STATE		_SBF(10, 0x04)
+#define	CRYPTO_HASH_OPAD_STATE		_SBF(10, 0x08)
+#define	CRYPTO_HASH_OPAD_EXT_STATE	_SBF(10, 0x10)
+#define	CRYPTO_GCM_IDLE_STATE		_SBF(8,	0x00)
+#define	CRYPTO_GCM_PRE_STATE		_SBF(8,	0x01)
+#define	CRYPTO_GCM_NA_STATE		_SBF(8,	0x02)
+#define	CRYPTO_GCM_PC_STATE		_SBF(8,	0x03)
+#define	CRYPTO_CCM_IDLE_STATE		_SBF(6,	0x00)
+#define	CRYPTO_CCM_PRE_STATE		_SBF(6,	0x01)
+#define	CRYPTO_CCM_NA_STATE		_SBF(6,	0x02)
+#define	CRYPTO_CCM_PC_STATE		_SBF(6,	0x03)
+#define	CRYPTO_PARALLEL_IDLE_STATE	_SBF(4,	0x00)
+#define	CRYPTO_PARALLEL_PRE_STATE	_SBF(4,	0x01)
+#define	CRYPTO_PARALLEL_BULK_STATE	_SBF(4,	0x02)
+#define	CRYPTO_MAC_IDLE_STATE		_SBF(2,	0x00)
+#define	CRYPTO_MAC_PRE_STATE		_SBF(2,	0x01)
+#define	CRYPTO_MAC_BULK_STATE		_SBF(2,	0x02)
+#define	CRYPTO_SERIAL_IDLE_STATE	_SBF(0,	0x00)
+#define	CRYPTO_SERIAL_PRE_STATE		_SBF(0,	0x01)
+#define	CRYPTO_SERIAL_BULK_STATE	_SBF(0,	0x02)
+
+#define	CRYPTO_CH0_IV_0			0x0100
+#define	CRYPTO_CH0_IV_1			0x0104
+#define	CRYPTO_CH0_IV_2			0x0108
+#define	CRYPTO_CH0_IV_3			0x010c
+#define	CRYPTO_CH1_IV_0			0x0110
+#define	CRYPTO_CH1_IV_1			0x0114
+#define	CRYPTO_CH1_IV_2			0x0118
+#define	CRYPTO_CH1_IV_3			0x011c
+#define	CRYPTO_CH2_IV_0			0x0120
+#define	CRYPTO_CH2_IV_1			0x0124
+#define	CRYPTO_CH2_IV_2			0x0128
+#define	CRYPTO_CH2_IV_3			0x012c
+#define	CRYPTO_CH3_IV_0			0x0130
+#define	CRYPTO_CH3_IV_1			0x0134
+#define	CRYPTO_CH3_IV_2			0x0138
+#define	CRYPTO_CH3_IV_3			0x013c
+#define	CRYPTO_CH4_IV_0			0x0140
+#define	CRYPTO_CH4_IV_1			0x0144
+#define	CRYPTO_CH4_IV_2			0x0148
+#define	CRYPTO_CH4_IV_3			0x014c
+#define	CRYPTO_CH5_IV_0			0x0150
+#define	CRYPTO_CH5_IV_1			0x0154
+#define	CRYPTO_CH5_IV_2			0x0158
+#define	CRYPTO_CH5_IV_3			0x015c
+#define	CRYPTO_CH6_IV_0			0x0160
+#define	CRYPTO_CH6_IV_1			0x0164
+#define	CRYPTO_CH6_IV_2			0x0168
+#define	CRYPTO_CH6_IV_3			0x016c
+#define	CRYPTO_CH7_IV_0			0x0170
+#define	CRYPTO_CH7_IV_1			0x0174
+#define	CRYPTO_CH7_IV_2			0x0178
+#define	CRYPTO_CH7_IV_3			0x017c
+
+#define	CRYPTO_CH0_KEY_0		0x0180
+#define	CRYPTO_CH0_KEY_1		0x0184
+#define	CRYPTO_CH0_KEY_2		0x0188
+#define	CRYPTO_CH0_KEY_3		0x018c
+#define	CRYPTO_CH1_KEY_0		0x0190
+#define	CRYPTO_CH1_KEY_1		0x0194
+#define	CRYPTO_CH1_KEY_2		0x0198
+#define	CRYPTO_CH1_KEY_3		0x019c
+#define	CRYPTO_CH2_KEY_0		0x01a0
+#define	CRYPTO_CH2_KEY_1		0x01a4
+#define	CRYPTO_CH2_KEY_2		0x01a8
+#define	CRYPTO_CH2_KEY_3		0x01ac
+#define	CRYPTO_CH3_KEY_0		0x01b0
+#define	CRYPTO_CH3_KEY_1		0x01b4
+#define	CRYPTO_CH3_KEY_2		0x01b8
+#define	CRYPTO_CH3_KEY_3		0x01bc
+#define	CRYPTO_CH4_KEY_0		0x01c0
+#define	CRYPTO_CH4_KEY_1		0x01c4
+#define	CRYPTO_CH4_KEY_2		0x01c8
+#define	CRYPTO_CH4_KEY_3		0x01cc
+#define	CRYPTO_CH5_KEY_0		0x01d0
+#define	CRYPTO_CH5_KEY_1		0x01d4
+#define	CRYPTO_CH5_KEY_2		0x01d8
+#define	CRYPTO_CH5_KEY_3		0x01dc
+#define	CRYPTO_CH6_KEY_0		0x01e0
+#define	CRYPTO_CH6_KEY_1		0x01e4
+#define	CRYPTO_CH6_KEY_2		0x01e8
+#define	CRYPTO_CH6_KEY_3		0x01ec
+#define	CRYPTO_CH7_KEY_0		0x01f0
+#define	CRYPTO_CH7_KEY_1		0x01f4
+#define	CRYPTO_CH7_KEY_2		0x01f8
+#define	CRYPTO_CH7_KEY_3		0x01fc
+#define	CRYPTO_KEY_CHANNLE_NUM		8
+
+#define	CRYPTO_CH0_PKEY_0		0x0200
+#define	CRYPTO_CH0_PKEY_1		0x0204
+#define	CRYPTO_CH0_PKEY_2		0x0208
+#define	CRYPTO_CH0_PKEY_3		0x020c
+#define	CRYPTO_CH1_PKEY_0		0x0210
+#define	CRYPTO_CH1_PKEY_1		0x0214
+#define	CRYPTO_CH1_PKEY_2		0x0218
+#define	CRYPTO_CH1_PKEY_3		0x021c
+#define	CRYPTO_CH2_PKEY_0		0x0220
+#define	CRYPTO_CH2_PKEY_1		0x0224
+#define	CRYPTO_CH2_PKEY_2		0x0228
+#define	CRYPTO_CH2_PKEY_3		0x022c
+#define	CRYPTO_CH3_PKEY_0		0x0230
+#define	CRYPTO_CH3_PKEY_1		0x0234
+#define	CRYPTO_CH3_PKEY_2		0x0238
+#define	CRYPTO_CH3_PKEY_3		0x023c
+#define	CRYPTO_CH4_PKEY_0		0x0240
+#define	CRYPTO_CH4_PKEY_1		0x0244
+#define	CRYPTO_CH4_PKEY_2		0x0248
+#define	CRYPTO_CH4_PKEY_3		0x024c
+#define	CRYPTO_CH5_PKEY_0		0x0250
+#define	CRYPTO_CH5_PKEY_1		0x0254
+#define	CRYPTO_CH5_PKEY_2		0x0258
+#define	CRYPTO_CH5_PKEY_3		0x025c
+#define	CRYPTO_CH6_PKEY_0		0x0260
+#define	CRYPTO_CH6_PKEY_1		0x0264
+#define	CRYPTO_CH6_PKEY_2		0x0268
+#define	CRYPTO_CH6_PKEY_3		0x026c
+#define	CRYPTO_CH7_PKEY_0		0x0270
+#define	CRYPTO_CH7_PKEY_1		0x0274
+#define	CRYPTO_CH7_PKEY_2		0x0278
+#define	CRYPTO_CH7_PKEY_3		0x027c
+#define	CRYPTO_PKEY_CHANNLE_NUM		8
+
+#define	CRYPTO_CH0_PC_LEN_0		0x0280
+#define	CRYPTO_CH0_PC_LEN_1		0x0284
+#define	CRYPTO_CH1_PC_LEN_0		0x0288
+#define	CRYPTO_CH1_PC_LEN_1		0x028c
+#define	CRYPTO_CH2_PC_LEN_0		0x0290
+#define	CRYPTO_CH2_PC_LEN_1		0x0294
+#define	CRYPTO_CH3_PC_LEN_0		0x0298
+#define	CRYPTO_CH3_PC_LEN_1		0x029c
+#define	CRYPTO_CH4_PC_LEN_0		0x02a0
+#define	CRYPTO_CH4_PC_LEN_1		0x02a4
+#define	CRYPTO_CH5_PC_LEN_0		0x02a8
+#define	CRYPTO_CH5_PC_LEN_1		0x02ac
+#define	CRYPTO_CH6_PC_LEN_0		0x02b0
+#define	CRYPTO_CH6_PC_LEN_1		0x02b4
+#define	CRYPTO_CH7_PC_LEN_0		0x02b8
+#define	CRYPTO_CH7_PC_LEN_1		0x02bc
+
+#define	CRYPTO_CH0_AAD_LEN_0		0x02c0
+#define	CRYPTO_CH0_AAD_LEN_1		0x02c4
+#define	CRYPTO_CH1_AAD_LEN_0		0x02c8
+#define	CRYPTO_CH1_AAD_LEN_1		0x02cc
+#define	CRYPTO_CH2_AAD_LEN_0		0x02d0
+#define	CRYPTO_CH2_AAD_LEN_1		0x02d4
+#define	CRYPTO_CH3_AAD_LEN_0		0x02d8
+#define	CRYPTO_CH3_AAD_LEN_1		0x02dc
+#define	CRYPTO_CH4_AAD_LEN_0		0x02e0
+#define	CRYPTO_CH4_AAD_LEN_1		0x02e4
+#define	CRYPTO_CH5_AAD_LEN_0		0x02e8
+#define	CRYPTO_CH5_AAD_LEN_1		0x02ec
+#define	CRYPTO_CH6_AAD_LEN_0		0x02f0
+#define	CRYPTO_CH6_AAD_LEN_1		0x02f4
+#define	CRYPTO_CH7_AAD_LEN_0		0x02f8
+#define	CRYPTO_CH7_AAD_LEN_1		0x02fc
+
+#define	CRYPTO_CH0_IV_LEN_0		0x0300
+#define	CRYPTO_CH1_IV_LEN_0		0x0304
+#define	CRYPTO_CH2_IV_LEN_0		0x0308
+#define	CRYPTO_CH3_IV_LEN_0		0x030c
+#define	CRYPTO_CH4_IV_LEN_0		0x0310
+#define	CRYPTO_CH5_IV_LEN_0		0x0314
+#define	CRYPTO_CH6_IV_LEN_0		0x0318
+#define	CRYPTO_CH7_IV_LEN_0		0x031c
+
+#define	CRYPTO_CH0_TAG_0		0x0320
+#define	CRYPTO_CH0_TAG_1		0x0324
+#define	CRYPTO_CH0_TAG_2		0x0328
+#define	CRYPTO_CH0_TAG_3		0x032c
+#define	CRYPTO_CH1_TAG_0		0x0330
+#define	CRYPTO_CH1_TAG_1		0x0334
+#define	CRYPTO_CH1_TAG_2		0x0338
+#define	CRYPTO_CH1_TAG_3		0x033c
+#define	CRYPTO_CH2_TAG_0		0x0340
+#define	CRYPTO_CH2_TAG_1		0x0344
+#define	CRYPTO_CH2_TAG_2		0x0348
+#define	CRYPTO_CH2_TAG_3		0x034c
+#define	CRYPTO_CH3_TAG_0		0x0350
+#define	CRYPTO_CH3_TAG_1		0x0354
+#define	CRYPTO_CH3_TAG_2		0x0358
+#define	CRYPTO_CH3_TAG_3		0x035c
+#define	CRYPTO_CH4_TAG_0		0x0360
+#define	CRYPTO_CH4_TAG_1		0x0364
+#define	CRYPTO_CH4_TAG_2		0x0368
+#define	CRYPTO_CH4_TAG_3		0x036c
+#define	CRYPTO_CH5_TAG_0		0x0370
+#define	CRYPTO_CH5_TAG_1		0x0374
+#define	CRYPTO_CH5_TAG_2		0x0378
+#define	CRYPTO_CH5_TAG_3		0x037c
+#define	CRYPTO_CH6_TAG_0		0x0380
+#define	CRYPTO_CH6_TAG_1		0x0384
+#define	CRYPTO_CH6_TAG_2		0x0388
+#define	CRYPTO_CH6_TAG_3		0x038c
+#define	CRYPTO_CH7_TAG_0		0x0390
+#define	CRYPTO_CH7_TAG_1		0x0394
+#define	CRYPTO_CH7_TAG_2		0x0398
+#define	CRYPTO_CH7_TAG_3		0x039c
+
+#define	CRYPTO_HASH_DOUT_0		0x03a0
+#define	CRYPTO_HASH_DOUT_1		0x03a4
+#define	CRYPTO_HASH_DOUT_2		0x03a8
+#define	CRYPTO_HASH_DOUT_3		0x03ac
+#define	CRYPTO_HASH_DOUT_4		0x03b0
+#define	CRYPTO_HASH_DOUT_5		0x03b4
+#define	CRYPTO_HASH_DOUT_6		0x03b8
+#define	CRYPTO_HASH_DOUT_7		0x03bc
+#define	CRYPTO_HASH_DOUT_8		0x03c0
+#define	CRYPTO_HASH_DOUT_9		0x03c4
+#define	CRYPTO_HASH_DOUT_10		0x03c8
+#define	CRYPTO_HASH_DOUT_11		0x03cc
+#define	CRYPTO_HASH_DOUT_12		0x03d0
+#define	CRYPTO_HASH_DOUT_13		0x03d4
+#define	CRYPTO_HASH_DOUT_14		0x03d8
+#define	CRYPTO_HASH_DOUT_15		0x03dc
+
+#define	CRYPTO_TAG_VALID		0x03e0
+#define	CRYPTO_CH7_TAG_VALID		_BIT(7)
+#define	CRYPTO_CH6_TAG_VALID		_BIT(6)
+#define	CRYPTO_CH5_TAG_VALID		_BIT(5)
+#define	CRYPTO_CH4_TAG_VALID		_BIT(4)
+#define	CRYPTO_CH3_TAG_VALID		_BIT(3)
+#define	CRYPTO_CH2_TAG_VALID		_BIT(2)
+#define	CRYPTO_CH1_TAG_VALID		_BIT(1)
+#define	CRYPTO_CH0_TAG_VALID		_BIT(0)
+
+#define	CRYPTO_HASH_VALID		0x03e4
+#define	CRYPTO_HASH_IS_VALID		_BIT(0)
+
+#define	CRYPTO_VERSION			0x03f0
+
+#define	CRYPTO_RNG_CTL			0x0400
+#define	CRYPTO_RNG_64_bit_len		_SBF(4,	0x00)
+#define	CRYPTO_RNG_128_bit_len		_SBF(4,	0x01)
+#define	CRYPTO_RNG_192_bit_len		_SBF(4,	0x02)
+#define	CRYPTO_RNG_256_bit_len		_SBF(4,	0x03)
+#define	CRYPTO_RNG_FATESY_SOC_RING	_SBF(2,	0x00)
+#define	CRYPTO_RNG_SLOWER_SOC_RING_0	_SBF(2,	0x01)
+#define	CRYPTO_RNG_SLOWER_SOC_RING_1	_SBF(2,	0x02)
+#define	CRYPTO_RNG_SLOWEST_SOC_RING	_SBF(2,	0x03)
+#define	CRYPTO_RNG_ENABLE		_BIT(1)
+#define	CRYPTO_RNG_START		_BIT(0)
+
+#define	CRYPTO_RNG_SAMPLE_CNT		0x0404
+#define	CRYPTO_RNG_DOUT_0		0x0410
+#define	CRYPTO_RNG_DOUT_1		0x0414
+#define	CRYPTO_RNG_DOUT_2		0x0418
+#define	CRYPTO_RNG_DOUT_3		0x041c
+#define	CRYPTO_RNG_DOUT_4		0x0420
+#define	CRYPTO_RNG_DOUT_5		0x0424
+#define	CRYPTO_RNG_DOUT_6		0x0428
+#define	CRYPTO_RNG_DOUT_7		0x042c
+
+#define	CRYPTO_RAM_CTL			0x0480
+#define	CRYPTO_RAM_PKA_RDY		_BIT(0)
+
+#define	CRYPTO_RAM_ST			0x0484
+#define	CRYPTO_CLK_RAM_RDY		_BIT(0)
+
+#define	CRYPTO_DEBUG_CTL		0x04a0
+#define	CRYPTO_DEBUG_MODE		_BIT(0)
+
+#define	CRYPTO_DEBUG_ST			0x04a4
+#define	CRYPTO_PKA_DEBUG_CLK_EN		_BIT(0)
+
+#define	CRYPTO_DEBUG_MONITOR		0x04a8
+
+#define	CRYPTO_MEMORY_MAP0		0x00800
+#define	CRYPTO_MEMORY_MAP1		0x00804
+#define	CRYPTO_MEMORY_MAP2		0x00808
+#define	CRYPTO_MEMORY_MAP3		0x0080C
+#define	CRYPTO_MEMORY_MAP4		0x00810
+#define	CRYPTO_MEMORY_MAP5		0x00814
+#define	CRYPTO_MEMORY_MAP6		0x00818
+#define	CRYPTO_MEMORY_MAP7		0x0081C
+#define	CRYPTO_MEMORY_MAP8		0x00820
+#define	CRYPTO_MEMORY_MAP9		0x00824
+#define	CRYPTO_MEMORY_MAP10		0x00828
+#define	CRYPTO_MEMORY_MAP11		0x0082C
+#define	CRYPTO_MEMORY_MAP12		0x00830
+#define	CRYPTO_MEMORY_MAP13		0x00834
+#define	CRYPTO_MEMORY_MAP14		0x00838
+#define	CRYPTO_MEMORY_MAP15		0x0083C
+#define	CRYPTO_MEMORY_MAP16		0x00840
+#define	CRYPTO_MEMORY_MAP17		0x00844
+#define	CRYPTO_MEMORY_MAP18		0x00848
+#define	CRYPTO_MEMORY_MAP19		0x0084C
+#define	CRYPTO_MEMORY_MAP20		0x00850
+#define	CRYPTO_MEMORY_MAP21		0x00854
+#define	CRYPTO_MEMORY_MAP22		0x00858
+#define	CRYPTO_MEMORY_MAP23		0x0085C
+#define	CRYPTO_MEMORY_MAP24		0x00860
+#define	CRYPTO_MEMORY_MAP25		0x00864
+#define	CRYPTO_MEMORY_MAP26		0x00868
+#define	CRYPTO_MEMORY_MAP27		0x0086C
+#define	CRYPTO_MEMORY_MAP28		0x00870
+#define	CRYPTO_MEMORY_MAP29		0x00874
+#define	CRYPTO_MEMORY_MAP30		0x00878
+#define	CRYPTO_MEMORY_MAP31		0x0087C
+
+#define	CRYPTO_OPCODE			0x00880
+#define	CRYPTO_OPCODE_REG_TAG_SHIFT	0
+#define	CRYPTO_OPCODE_TAG_MASK		0x0000003f
+#define	CRYPTO_OPCODE_REG_R_SHIFT	6
+#define	CRYPTO_OPCODE_REG_R_MASK	0x00000fc0
+#define	CRYPTO_OPCODE_REG_B_SHIFT	12
+#define	CRYPTO_OPCODE_REG_B_MASK	0x0003f000
+#define	CRYPTO_OPCODE_REG_A_SHIFT	18
+#define	CRYPTO_OPCODE_REG_A_MASK	0x00fc0000
+#define	CRYPTO_OPCODE_LEN_SHIFT		24
+#define	CRYPTO_OPCODE_LEN_MASK		0x03000000
+#define	CRYPTO_OPCODE_CODE_SHIFT	27
+#define	CRYPTO_OPCODE_CODE_MASK		0xfc000000
+
+#define	CRYPTO_N_NP_T0_T1_ADDR		0x00884
+#define	CRYPTO_N_VIRTUAL_ADDR_SHIFT	0
+#define	CRYPTO_N_VIRTUAL_ADDR_MASK	0x0000001f
+#define	CRYPTO_NP_VIRTUAL_ADDR_SHIFT	5
+#define	CRYPTO_NP_VIRTUAL_ADDR_MASK	0x000003e0
+#define	CRYPTO_T0_VIRTUAL_ADDR_SHIFT	10
+#define	CRYPTO_T0_VIRTUAL_ADDR_MASK	0x00007c00
+#define	CRYPTO_T1_VIRTUAL_ADDR_SHIFT	15
+#define	CRYPTO_T1_VIRTUAL_ADDR_MASK	0x000f8000
+
+#define	CRYPTO_PKA_STATUS		0x00888
+#define	CRYPTO_PKA_PIPE_IS_RDY		_BIT(0)
+#define	CRYPTO_PKA_BUSY				_BIT(1)
+#define	CRYPTO_PKA_ALU_OUT_ZERO		_BIT(2)
+#define	CRYPTO_PKA_ALU_MODOVRFLW	_BIT(3)
+#define	CRYPTO_PKA_DIV_BY_ZERO		_BIT(4)
+#define	CRYPTO_PKA_ALU_CARRY		_BIT(5)
+#define	CRYPTO_PKA_ALU_SIGN_OUT		_BIT(6)
+#define	CRYPTO_PKA_MODINV_OF_ZERO	_BIT(7)
+#define	CRYPTO_PKA_CPU_BUSY		_BIT(8)
+#define	CRYPTO_PKA_OPCODE_STATUS_SHIFT	9
+#define	CRYPTO_PKA_OPCODE_STATUS_MASK	0x00003e00
+#define	CRYPTO_PKA_TAG_STATUS_SHIFT	14
+#define	CRYPTO_PKA_TAG_STATUS_MASK	0x0003c000
+
+#define	CRYPTO_PKA_SW_RESET		0x0088C
+#define	CRYPTO_PKA_L0			0x00890
+#define	CRYPTO_PKA_L1			0x00894
+#define	CRYPTO_PKA_L2			0x00898
+#define	CRYPTO_PKA_L3			0x0089C
+#define	CRYPTO_PKA_L4			0x008A0
+#define	CRYPTO_PKA_L5			0x008A4
+#define	CRYPTO_PKA_L6			0x008A8
+#define	CRYPTO_PKA_L7			0x008AC
+#define	CRYPTO_PKA_PIPE_RDY		0x008B0
+#define	CRYPTO_PKA_DONE			0x008B4
+#define	CRYPTO_PKA_MON_SELECT		0x008B8
+#define	CRYPTO_PKA_DEBUG_REG_EN		0x008BC
+#define	CRYPTO_DEBUG_CNT_ADDR		0x008C0
+#define	CRYPTO_DEBUG_EXT_ADDR		0x008C4
+#define	CRYPTO_PKA_DEBUG_HALT		0x008C8
+#define	CRYPTO_PKA_MON_READ		0x008D0
+#define	CRYPTO_PKA_INT_ENA		0x008D4
+#define	CRYPTO_PKA_INT_ST		0x008D8
+#define	CRYPTO_SRAM_ADDR		0x01000
+#define	CRYPTO_SRAM_BASE		0x1000
+
+#define	LLI_DMA_CTRL_LAST		_BIT(0)
+#define	LLI_DMA_CTRL_PAUSE		_BIT(1)
+#define	LLI_DMA_CTRL_LIST_DONE		_BIT(8)
+#define	LLI_DMA_CTRL_DST_DONE		_BIT(9)
+#define	LLI_DMA_CTRL_SRC_DONE		_BIT(10)
+
+#define LLI_USER_CPIHER_START		_BIT(0)
+#define LLI_USER_STRING_START		_BIT(1)
+#define LLI_USER_STRING_LAST		_BIT(2)
+#define LLI_USER_STRING_ADA		_BIT(3)
+#define LLI_USER_PRIVACY_KEY		_BIT(7)
+#define LLI_USER_ROOT_KEY		_BIT(8)
+
+enum endian_mode {
+	BIG_ENDIAN = 0,
+	LITTLE_ENDIAN
+};
+
+enum clk_type {
+	CLK = 0,
+	HCLK
+};
+
+struct crypto_lli_desc {
+	u32 src_addr;
+	u32 src_len;
+	u32 dst_addr;
+	u32 dst_len;
+	u32 user_define;
+	u32 reserve;
+	u32 dma_ctrl;
+	u32 next_addr;
+};
+
+struct rk_hash_ctx {
+	const	u8 *null_hash;	/* when hash is null or length is zero */
+	void	*cur_data_lli;	/* to recored the lli that not computed	*/
+	void	*free_data_lli;	/* free lli that can use for next lli */
+	void	*vir_src_addr;	/* virt addr for hash src data*/
+	u32	magic;		/* to check whether the ctx is correct */
+	u32	algo;		/* hash algo */
+	u32	digest_size;	/* hash out length according to hash algo*/
+	u32	dma_started;	/* choose use start or restart */
+};
+
+#define	RK_HASH_CTX_MAGIC		0x1A1A1A1A
+
+extern fdt_addr_t crypto_base;
+
+static inline u32 crypto_read(u32 offset)
+{
+	return readl(crypto_base + offset);
+}
+
+static inline void crypto_write(u32 val, u32 offset)
+{
+	writel(val, crypto_base + offset);
+}
+
+#endif
diff --git a/include/rockchip/crypto_v2_pka.h b/include/rockchip/crypto_v2_pka.h
new file mode 100644
index 0000000000..84652bd037
--- /dev/null
+++ b/include/rockchip/crypto_v2_pka.h
@@ -0,0 +1,553 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _ROCKCHIP_CRYPTO_V2_PKA_H_
+#define _ROCKCHIP_CRYPTO_V2_PKA_H_
+#include <common.h>
+#include <rockchip/crypto_v2.h>
+#include <rockchip/crypto_v2_util.h>
+
+#define CRYPTO_BASE crypto_base
+
+struct mpa_num {
+	u32 alloc;
+	s32 size;
+	u32 *d;
+};
+
+#define RK_MAX_RSA_NBITS	4096
+#define RK_MAX_RSA_NCHARS	((RK_MAX_RSA_NBITS) / 8)
+#define RK_MAX_RSA_BWORDS	((RK_MAX_RSA_NBITS) / 32)
+
+/* define NpCreateFlag values */
+#define RK_PKA_CREATE_NP		1
+#define RK_PKA_SET_NP		0
+/* size of buffer for Barrett modulus tag NP, used in PKI algorithms */
+#define RK_PKA_BARRETT_IN_WORDS	5
+/* Barrett modulus tag type - 5 words size array */
+typedef u32 RK_PKA_NP_t[RK_PKA_BARRETT_IN_WORDS];
+
+#define RK_PKA_MemSetZero(buf, size) \
+			util_word_memset((void *)buf, 0x00, size)
+
+#define RK_PKA_FastMemCpy(dst, src, size) \
+			util_word_memcpy((void *)dst, (void *)src, size)
+
+#define RK_PKA_ReverseMemcpy(dst, src, size) \
+			util_reverse_word_memcpy((void *)dst, (void *)src, size)
+
+#define RES_DISCARD 0x3F
+
+/* base address -  0x00F10B00 */
+#define RK_PKI_ERROR_BASE			0x00F10B00
+#define RK_PKI_HW_VER_INCORRECT_ERROR		(RK_PKI_ERROR_BASE + 0x0UL)
+#define RK_PKI_HW_DECRYPED_ERROR		(RK_PKI_ERROR_BASE + 0x1UL)
+#define RK_PKI_KEY_SIZE_ERROR			(RK_PKI_ERROR_BASE + 0x2UL)
+
+/* Error definitions for PKA using */
+#define RK_PKA_ILLEGAL_PTR_ERROR		(RK_PKI_ERROR_BASE + 0x20UL)
+#define RK_PKA_ENTRIES_COUNT_ERROR		(RK_PKI_ERROR_BASE + 0x21UL)
+#define RK_PKA_REGISTER_SIZES_ERROR		(RK_PKI_ERROR_BASE + 0x22UL)
+#define RK_PKA_SET_MAP_MODE_ERROR		(RK_PKI_ERROR_BASE + 0x23UL)
+
+#define RK_PKA_DIVIDER_IS_NULL_ERROR		(RK_PKI_ERROR_BASE + 0x2EUL)
+#define RK_PKA_MODULUS_IS_NULL_ERROR		(RK_PKI_ERROR_BASE + 0x2FUL)
+#define RK_PKA_DATA_SIZE_ERROR			(RK_PKI_ERROR_BASE + 0x30UL)
+#define RK_PKA_OPERATION_SIZE_ERROR		(RK_PKI_ERROR_BASE + 0x31UL)
+
+#define RK_PKA_MAX_REGS_COUNT			8
+#define RK_PKA_MAX_PHYS_MEM_REGS_COUNT		32
+#define RK_PKA_MAX_REGS_MEM_SIZE_BYTES		4096
+
+/* PKA control values  */
+#define RK_PKA_PIPE_READY			1
+#define RK_PKA_OP_DONE				1
+#define RK_PKA_SW_REST				1
+
+/* PKA N_NP_T0_T1 register fields positions (low bit position) */
+#define RK_PKA_N_NP_T0_T1_REG_N_POS		CRYPTO_N_VIRTUAL_ADDR_SHIFT
+#define RK_PKA_N_NP_T0_T1_REG_NP_POS		CRYPTO_NP_VIRTUAL_ADDR_SHIFT
+#define RK_PKA_N_NP_T0_T1_REG_T0_POS		CRYPTO_T0_VIRTUAL_ADDR_SHIFT
+#define RK_PKA_N_NP_T0_T1_REG_T1_POS		CRYPTO_T1_VIRTUAL_ADDR_SHIFT
+
+/* PKA N_NP_T0_T1 register default (reset) value: N=0, NP=1, T0=30, T1=31 */
+#define PKA_N					0UL
+#define PKA_NP					1UL
+#define PKA_T0					30UL
+#define PKA_T1					31UL
+#define RK_PKA_N_NP_T0_T1_REG_DEFAULT_VAL \
+				(PKA_N  << RK_PKA_N_NP_T0_T1_REG_N_POS | \
+				PKA_NP << RK_PKA_N_NP_T0_T1_REG_NP_POS | \
+				PKA_T0 << RK_PKA_N_NP_T0_T1_REG_T0_POS | \
+				PKA_T1 << RK_PKA_N_NP_T0_T1_REG_T1_POS)
+
+/* PKA STATUS register fields positions (low bit position) */
+#define RK_PKA_STATUS_PIPE_IS_REDY_POS		0
+#define RK_PKA_STATUS_PKA_BUSY_POS		1
+#define RK_PKA_STATUS_ALU_OUT_ZERO_POS		2
+#define RK_PKA_STATUS_ALU_MODOVRFLW_POS		3
+#define RK_PKA_STATUS_DIV_BY_ZERO_POS		4
+#define RK_PKA_STATUS_ALU_CARRY_POS		5
+#define RK_PKA_STATUS_ALU_SIGN_OUT_POS		6
+#define RK_PKA_STATUS_MODINV_OF_ZERO_POS	7
+#define RK_PKA_STATUS_PKA_CPU_BUSY_POS		8
+#define RK_PKA_STATUS_OPCODE_POS		9
+#define RK_PKA_STATUS_TAG_POS			14
+
+#define RK_PKA_STATUS_OPCODE_MASK		0x1FUl
+#define RK_PKA_STATUS_TAG_MASK			0x3FUl
+
+/* PKA OPCODE register fields positions (low bit position) */
+#define RK_PKA_OPCODE_TAG_POS			0
+#define RK_PKA_OPCODE_RESULT_POS		6
+#define RK_PKA_OPCODE_R_DISCARD_POS		11
+#define RK_PKA_OPCODE_OPERAND_2_POS		12
+#define RK_PKA_OPCODE_OPERAND_2_IMMED_POS	17
+#define RK_PKA_OPCODE_OPERAND_1_POS		18
+#define RK_PKA_OPCODE_OPERAND_1_IMMED_POS	23
+#define RK_PKA_OPCODE_LEN_POS			24
+#define RK_PKA_OPCODE_OPERATION_ID_POS		27
+
+/* PKA data registers base address
+ *should be always zero since it's the offset
+ * from the start of the PKA memory and not from the HOST memory
+ */
+#define RK_PKA_DATA_REGS_BASE_ADDR		(CRYPTO_BASE + CRYPTO_SRAM_BASE)
+#define RK_PKA_DATA_REGS_MEMORY_OFFSET_ADDR	(CRYPTO_BASE + CRYPTO_SRAM_BASE)
+
+/* Machine Opcodes definitions (according to HW CRS ) */
+#define   RK_PKA_MIN_OPCODE			0x00
+
+#define PKA_Add					0x04
+#define PKA_AddIm				0x04
+#define PKA_Sub					0x05
+#define PKA_SubIm				0x05
+#define PKA_Neg					0x05
+#define PKA_ModAdd				0x06
+#define PKA_ModAddIm				0x06
+#define PKA_ModSub				0x07
+#define PKA_ModSubIm				0x07
+#define PKA_ModNeg				0x07
+#define PKA_AND					0x08
+#define PKA_Test0				0x08
+#define PKA_Clr0				0x08
+#define PKA_Clr					0x08
+#define PKA_OR					0x09
+#define PKA_Copy				0x09
+#define PKA_SetBit0				0x09
+#define PKA_XOR					0x0A
+#define PKA_Flip0				0x0A
+#define PKA_InvertBits				0x0A
+#define PKA_Compare				0x0A
+#define PKA_SHR0				0x0C
+#define PKA_SHR1				0x0D
+#define PKA_SHL0				0x0E
+#define PKA_SHL1				0x0F
+#define PKA_LMul				0x10
+#define PKA_ModMul				0x11
+#define PKA_ModMulNR				0x12
+#define PKA_ModExp				0x13
+#define PKA_Div					0x14
+#define PKA_ModInv				0x15
+#define PKA_ModDiv				0x16
+#define PKA_HMul				0x17
+#define PKA_Terminate				0x00
+
+#define RK_PKA_MAX_OPCODE			0x17
+
+/*************************************************************/
+/* Macros for waiting PKA machine ready states               */
+/*************************************************************/
+
+void rk_pka_ram_ctrl_enable(void);
+
+void rk_pka_ram_ctrl_disable(void);
+
+void rk_pka_wait_on_ram_ready(void);
+
+void rk_pka_wait_on_pipe_ready(void);
+
+void rk_pka_wait_on_done(void);
+
+/*****************************************************
+ *  Macros for controlling PKA machine and changing  *
+ *  PKA sizes table and mapping table settings.      *
+ *****************************************************/
+#define PKA_CLK_ENABLE()
+
+#define PKA_CLK_DISABLE()
+
+void rk_pka_set_startmemaddr_reg(u32 start_mem_addr);
+
+void rk_pka_set_N_NP_T0_T1_reg(u32 N, u32 NP, u32 T0, u32 T1);
+
+void rk_pka_set_default_N_NP_T0_T1_reg(void);
+
+void rk_pka_get_status(u32 *status);
+
+void rk_pka_get_status_alu_outzero(u32 *status);
+
+void rk_pka_get_status_mod_overfl(u32 *status);
+
+void rk_pka_get_status_div_byzero(u32 *status);
+
+void rk_pka_get_status_carry(u32 *status);
+
+void rk_pka_get_status_alu_signout(u32 *status);
+
+void rk_pka_get_status_modinv_ofzero(u32 *status);
+
+void rk_pka_get_status_opcode(u32 *status);
+
+void rk_pka_get_status_tag(u32 *status);
+
+/******************************************************************
+ * Macros for setting and reading sizes from PKA regsSizesTable   *
+ ******************************************************************/
+void rk_pka_set_regsize(u32 size_bits, u32 entry_num);
+
+void rk_pka_read_regsize(u32 *size_bits, u32 entry_num);
+
+/******************************************************************
+ * Macros for setting and reading addresses of PKA data registers *
+ ******************************************************************/
+void rk_pka_set_regaddr(u32 vir_reg, u32 phys_addr);
+
+void rk_pka_get_regaddr(u32 vir_reg, u32 *phys_addr);
+
+void rk_pka_read_regaddr(u32 vir_reg, u32 *phys_addr);
+
+/**********************************************
+ *    Macros for setting Full PKI opcode      *
+ **********************************************/
+u32 rk_pka_make_full_opcode(u32 opcode, u32 len_id,
+			    u32 is_a_immed, u32 op_a,
+			    u32 is_b_immed, u32 op_b,
+			    u32 res_discard, u32 res,
+			    u32 tag);
+
+/******************************************************
+ * Macros for reading and loading PKA memory data     *
+ ******************************************************/
+void rk_pka_hw_load_value2pka_mem(u32 addr, u32 val);
+
+void rk_pka_hw_load_block2pka_mem(u32 addr, u32 *ptr,
+				  u32 size_words);
+
+void rk_pka_hw_reverse_load_block2pka_mem(u32 addr, u32 *ptr,
+					  u32 size_words);
+
+void rk_pka_hw_clear_pka_mem(u32 addr, u32 size_words);
+
+void rk_pka_hw_read_value_from_pka_mem(u32 addr, u32 *val);
+
+void rk_pka_hw_read_block_from_pka_mem(u32 addr, u32 *ptr,
+				       u32 size_words);
+
+void rk_pka_hw_reverse_read_block_from_pka_mem(u32 addr, u32 *ptr,
+					       u32 size_words);
+
+u32 rk_pka_exec_operation(u32 opcode, u8 len_id,
+			  u8 is_a_immed, s8 op_a,
+			  u8 is_b_immed, s8 op_b,
+			  u8	res_discard, s8 res, u8 tag);
+
+/*************************************************************************
+ * Macros for calling PKA operations (names according to operation issue *
+ *************************************************************************/
+
+/*--------------------------------------*/
+/*	 1.  ADD - SUBTRACT operations	*/
+/*--------------------------------------*/
+/*	Add:   res =  op_a + op_b	*/
+#define   RK_PKA_Add(len_id, op_a, op_b, res, tag)   \
+			rk_pka_exec_operation(PKA_Add, (len_id), 0, (op_a),\
+					      0, (op_b), 0, (res), (tag))
+
+/*	AddIm:	res =  op_a + op_b_im	*/
+#define   RK_PKA_AddIm(len_id, op_a, op_b_im, res, tag)   \
+			rk_pka_exec_operation(PKA_Add, (len_id), 0, (op_a), \
+					      1, (op_b_im), 0, (res), (tag))
+
+/*	Sub:  res =  op_a - op_b	*/
+#define   RK_PKA_Sub(len_id, op_a, op_b, res, tag)   \
+			rk_pka_exec_operation(PKA_Sub, (len_id), 0, (op_a), \
+					      0, (op_b), 0, (res), (tag))
+
+/*	SubIm:	res =  op_a - op_b_im	*/
+#define   RK_PKA_SubIm(len_id, op_a, op_b_im, res, tag)   \
+			rk_pka_exec_operation(PKA_Sub, (len_id), 0, (op_a), \
+					      1, (op_b_im), 0, (res), (tag))
+
+/*	Neg:  res =  0 - op_b  */
+#define   RK_PKA_Neg(len_id, op_b, res, tag)   \
+			rk_pka_exec_operation(PKA_Sub, (len_id), 1, 0, \
+					      0, (op_b), 0, (res), (tag))
+
+/*	ModAdd:  res =	(op_a + op_b) mod N  */
+#define   RK_PKA_ModAdd(len_id, op_a, op_b, res, tag)   \
+			rk_pka_exec_operation(PKA_ModAdd, (len_id), 0, (op_a), \
+					      0, (op_b), 0, (res), (tag))
+
+/*	ModAddIm:  res =  (op_a + op_b_im) mod N  */
+#define   RK_PKA_ModAddIm(len_id, op_a, op_b_im, res, tag)   \
+			rk_pka_exec_operation(PKA_ModAdd, (len_id), 0, (op_a), \
+					      1, (op_b_im), 0, (res), (tag))
+
+/*	ModSub:  res =	(op_a - op_b) mod N  */
+#define   RK_PKA_ModSub(len_id, op_a, op_b, res, tag)   \
+			rk_pka_exec_operation(PKA_ModSub, (len_id), 0, (op_a), \
+					      0, (op_b), 0, (res), (tag))
+
+/*	ModSubIm:  res =  (op_a - op_b_im) mod N  */
+#define   RK_PKA_ModSubIm(len_id, op_a, op_b_im, res, tag)   \
+			rk_pka_exec_operation(PKA_ModSub, (len_id), 0, (op_a), \
+					      1, (op_b_im), 0, (res), (tag))
+
+/*	ModNeg:  res =	(0 - op_b) mod N  */
+#define   RK_PKA_ModNeg(len_id, op_b, res, tag)   \
+			rk_pka_exec_operation(PKA_ModSub, (len_id), 1, 0, \
+					      0, (op_b), 0, (res), (tag))
+
+/*--------------------------------------*/
+/*	 2.  Logical   operations	*/
+/*--------------------------------------*/
+
+/*	AND:  res =  op_a & op_b	*/
+#define   RK_PKA_AND(len_id, op_a, op_b, res, tag)   \
+			rk_pka_exec_operation(PKA_AND, (len_id), 0, (op_a), \
+					      0, (op_b), 0, (res), (tag))
+
+/*	AndIm:	res =  op_a & op_b  */
+#define   RK_PKA_AndIm(len_id, op_a, op_b, res, tag)   \
+			rk_pka_exec_operation(PKA_AND, (len_id), 0, (op_a), \
+					      1, (op_b), 0, (res), (tag))
+
+/*	Tst0:  op_a & 0x1 - tests the bit 0 of operand A. */
+/*	If bit0 = 0, then ZeroOfStatus = 1, else 0  */
+#define   RK_PKA_Tst0(len_id, op_a, tag)   \
+			rk_pka_exec_operation(PKA_AND, (len_id), 0, (op_a), \
+					      1, 0x01, 1, RES_DISCARD, (tag))
+
+/*	Clr0:  res =  op_a & (-2)  - clears the bit 0 of operand A. */
+/*	Note:  -2 = 0x1E  for 5-bit size */
+#define   RK_PKA_Clr0(len_id, op_a, res, tag)   \
+			rk_pka_exec_operation(PKA_AND, (len_id), 0, (op_a), \
+					      1, 0x1E, 0, (res), (tag))
+
+/*	Clr:  res =  op_a & 0  - clears the operand A.  */
+#define   RK_PKA_Clr(len_id, op_a, tag)   \
+			rk_pka_exec_operation(PKA_AND, (len_id), 0, (op_a), \
+					      1, 0x00, 0, (op_a), (tag))
+
+/*	Clear:	for full clearing the actual register op_a,
+ *	this macro calls Clr operation twice.
+ */
+#define   RK_PKA_Clear(len_id, op_a, tag)   \
+		       RK_PKA_Clr(len_id, op_a, tag)
+
+/*	OR:  res =	op_a || op_b	*/
+#define   RK_PKA_OR(len_id, op_a, op_b, res, tag)   \
+			rk_pka_exec_operation(PKA_OR, (len_id), 0, (op_a), \
+					      0, (op_b), 0, (res), (tag))
+
+/*	OrIm:  res =  op_a || op_b  */
+#define   RK_PKA_OrIm(len_id, op_a, op_b, res, tag)   \
+			rk_pka_exec_operation(PKA_OR, (len_id), 0, (op_a), \
+					      1, (op_b), 0, (res), (tag))
+
+/*	Copy:  OpDest =  OpSrc || 0  */
+#define   RK_PKA_Copy(len_id, op_dest, op_src, tag)   \
+			rk_pka_exec_operation(PKA_OR, (len_id), 0, (op_src), \
+					      1, 0x00, 0, (op_dest), (tag))
+
+/*	Set0:  res =  op_a || 1	: set bit0 = 1, other bits are not changed */
+#define   RK_PKA_Set0(len_id, op_a, res, tag)   \
+			rk_pka_exec_operation(PKA_OR, (len_id), 0, (op_a), \
+					      1, 0x01, 0, (res), (tag))
+
+/*	Xor:  res =  op_a ^ op_b	*/
+#define   RK_PKA_Xor(len_id, op_a, op_b, res, tag)   \
+			rk_pka_exec_operation(PKA_XOR, (len_id), 0, (op_a), \
+					      0, (op_b), 0, (res), (tag))
+
+/*	XorIm:	res =  op_a ^ op_b  */
+#define   RK_PKA_XorIm(len_id, op_a, op_b, res, tag)   \
+			rk_pka_exec_operation(PKA_XOR, (len_id), 0, (op_a), \
+					      1, (op_b), 0, (res), (tag))
+
+/*	Flip0:	res =  op_a || 1  - inverts the bit 0 of operand A  */
+#define   RK_PKA_Flip0(len_id, op_a, res, tag)   \
+			rk_pka_exec_operation(PKA_XOR, (len_id), 0, (op_a), \
+					      1, 0x01, 0, (res), (tag))
+
+/*	Invert:  res =	op_a ^ 0xFFF.FF	:  inverts all bits of op_a . */
+/* Note: 0xFFFFF =  0x1F for 5 bits size of second operand */
+#define   RK_PKA_Invert(len_id, op_a, res, tag)   \
+			rk_pka_exec_operation(PKA_XOR, (len_id), 0, (op_a), \
+					      1, 0x1F, 0, (res), (tag))
+
+/*	Compare:  op_a ^ op_b . Rsult of compare in ZeroBitOfStatus: */
+/*	If op_a == op_b then Z = 1 */
+#define   RK_PKA_Compare(len_id, op_a, op_b, tag)   \
+			rk_pka_exec_operation(PKA_XOR, (len_id), 0, (op_a), \
+					      0, (op_b), 1, (0), (tag))
+
+/*	CompareImmediate:  op_a ^ op_b . Rsult of compare in ZeroBitOfStatus: */
+/*	If op_a == op_b then status Z = 1 */
+#define   RK_PKA_CompareIm(len_id, op_a, op_b, tag)   \
+			rk_pka_exec_operation(PKA_XOR, (len_id), 0, (op_a), \
+					      1, (op_b), 1, (0), (tag))
+
+/*----------------------------------------------*/
+/*	 3.  SHIFT	  operations		*/
+/*----------------------------------------------*/
+
+/*	SHR0:  res =  op_a >> (S+1) :
+ *	shifts right operand A by S+1 bits, insert 0 to left most bits
+ */
+#define   RK_PKA_SHR0(len_id, op_a, S, res, tag)   \
+			rk_pka_exec_operation(PKA_SHR0, (len_id), 0, (op_a), \
+					      0, (S), 0, (res), (tag))
+
+/*	SHR1:  res =  op_a >> (S+1) :
+ *	shifts right operand A by S+1 bits, insert 1 to left most bits
+ */
+#define   RK_PKA_SHR1(len_id, op_a, S, res, tag)   \
+			rk_pka_exec_operation(PKA_SHR1, (len_id), 0, (op_a), \
+					      0, (S), 0, (res), (tag))
+
+/*	SHL0:  res =  op_a << (S+1) :
+ *	shifts left operand A by S+1 bits, insert 0 to right most bits
+ */
+#define   RK_PKA_SHL0(len_id, op_a, S, res, tag)   \
+			rk_pka_exec_operation(PKA_SHL0, (len_id), 0, (op_a), \
+					      0, (S), 0, (res), (tag))
+
+/*	SHL1:  res =  op_a << (S+1) :
+ *	shifts left operand A by S+1 bits, insert 1 to right most bits
+ */
+#define   RK_PKA_SHL1(len_id, op_a, S, res, tag)   \
+			rk_pka_exec_operation(PKA_SHL1, (len_id), 0, (op_a), \
+					      0, (S), 0, (res), (tag))
+
+/*--------------------------------------------------------------*/
+/*	 2.  Multiplication and other	operations		*/
+/*		 Note:	See notes to RK_PKAExecOperation	*/
+/*--------------------------------------------------------------*/
+
+/*	RMul:  res =  LowHalfOf(op_a * op_b), where size of operands and result
+ *	is equaled to operation size, defined by len_id. Note: for receiving
+ *	full result, the len_id must be set according to (sizeA + sizeB) and
+ *	leading not significant bits of operands must be zeroed
+ */
+#define   RK_PKA_LMul(len_id, op_a, op_b, res, tag)   \
+			rk_pka_exec_operation(PKA_LMul, (len_id), 0, (op_a), \
+					      0, (op_b), 0, (res), (tag))
+
+/*	HMul:  res =  HighHalfOf(op_a * op_b) + one high word of low half of
+ *	(op_a * op_b), where size of operands is equaled to operation size,
+ *	defined by len_id. Note: Size of operation result is by one word large,
+ *	than operation size
+ */
+#define   RK_PKA_HMul(len_id, op_a, op_b, res, tag)   \
+			rk_pka_exec_operation(PKA_HMul, (len_id), 0, (op_a), \
+					      0, (op_b), 0, (res), (tag))
+
+/*	ModMul:  res =	op_a * op_b  mod N - modular multiplication */
+#define   RK_PKA_ModMul(len_id, op_a, op_b, res, tag)   \
+			rk_pka_exec_operation(PKA_ModMul, (len_id), 0, (op_a), \
+					      0, (op_b), 0, (res), (tag))
+
+/*	ModMulN:  res =  op_a * op_b	mod N
+ *	- modular multiplication (final reduction is omitted)
+ */
+#define   RK_PKA_ModMulN(len_id, op_a, op_b, res, tag)   \
+			rk_pka_exec_operation(PKA_ModMulNR, (len_id), 0, \
+					      (op_a), 0, (op_b), 0, \
+					      (res), (tag))
+
+/*	ModExp:  res =	op_a ** op_b	mod N - modular exponentiation */
+#define   RK_PKA_ModExp(len_id, op_a, op_b, res, tag)   \
+			rk_pka_exec_operation(PKA_ModExp, (len_id), 0, (op_a), \
+					      0, (op_b), 0, (res), (tag))
+
+/*	Divide:  res =	op_a / op_b , op_a = op_a mod op_b - division,  */
+#define   RK_PKA_Div(len_id, op_a, op_b, res, tag)   \
+			rk_pka_exec_operation(PKA_Div, (len_id), 0, (op_a), \
+					      0, (op_b), 0, (res), (tag))
+
+/*	ModInv:  Modular inversion: calculates	 res = 1/op_b mod N	*/
+#define   RK_PKA_ModInv(len_id, op_b, res, tag)   \
+			rk_pka_exec_operation(PKA_ModInv, (len_id), 0, 1, \
+					      0, (op_b), 0, (res), (tag))
+#define   RK_PKA_ModDiv(len_id, op_a, op_b, res, tag)   \
+			rk_pka_exec_operation(PKA_ModDiv, (len_id), 0, (op_a), \
+					      0, (op_b), 0, (res), (tag))
+
+/*	Terminate  - special operation, which allows HOST access */
+/*	to PKA data memory registers after end of PKA operations */
+#define   RK_PKA_Terminate(tag)   \
+			rk_pka_exec_operation(PKA_Terminate, 0, 0, 0, 0, \
+					      0, 0, 0, (tag))
+
+struct rk_pka_regs_map {
+	u32 reges_num[RK_PKA_MAX_PHYS_MEM_REGS_COUNT];
+	u32 regs_addr[RK_PKA_MAX_PHYS_MEM_REGS_COUNT];
+};
+
+u32 rk_pka_set_sizes_tab(u32 regs_sizes_ptr[RK_PKA_MAX_REGS_COUNT],
+			 u32 count_of_sizes,
+			 u32 max_size_bits,
+			 u32 is_default_map);
+
+#define RK_PKA_DefaultSetRegsSizesTab(max_size_bits) \
+			rk_pka_set_sizes_tab(0, 0, (max_size_bits), 1)
+u32 rk_pka_set_map_tab(struct rk_pka_regs_map *regs_map_ptr, u32 *count_of_regs,
+		       u32 maxsize_words, u32 N_NP_T0_T1,
+		       u32 is_default_map);
+
+#define RK_PKA_DefaultSetRegsMapTab(maxsize_words, count_of_regs) \
+			rk_pka_set_map_tab(NULL, (count_of_regs), \
+					   (maxsize_words), 0, 1)
+
+u32 rk_pka_clear_block_of_regs(u8 first_reg, u8 count_of_regs, u8 len_id);
+
+u32 rk_pka_init(u32 regs_sizes_ptr[RK_PKA_MAX_REGS_COUNT],
+		u32 count_of_sizes,
+		struct rk_pka_regs_map *regs_map_ptr,
+		u32 count_of_regs,
+		u32 op_size_bits,
+		u32 regsize_words,
+		u32 N_NP_T0_T1,
+		u32 is_default_map);
+#define RK_PKA_DefaultInitPKA(max_size_bits, regsize_words) \
+			rk_pka_init(0, 0, 0, 0, (max_size_bits), \
+				    (regsize_words), 0, 1)
+
+void rk_pka_finish(void);
+u32 rk_pka_calcNp_and_initmodop(u32 len_id, u32 mod_size_bits,
+				s8 r_t0, s8 r_t1, s8 r_t2);
+
+u32 rk_pka_div_long_num(u8 len_id, s8 op_a, u32 s, s8 op_b,
+			s8 res, s8 r_t1, s8 r_t2);
+
+u32 rk_calcNp_and_initmodop(u32 *N_ptr, u32 N_size_bits,
+			    u32 *NP_ptr, u8 np_create_flag,
+			    s8 r_t0, s8 r_t1, s8 r_t2);
+
+void rk_pka_copy_data_into_reg(s8 dst_reg, u8 len_id, u32 *src_ptr,
+			       u32 size_words);
+void rk_pka_copy_data_from_reg(u32 *dst_ptr, u32  size_words,
+			       s8 src_reg);
+int test_rk3326_rsa(void);
+int rk_mpa_alloc(struct mpa_num **mpa);
+void rk_mpa_free(struct mpa_num **mpa);
+int rk_abs_add(void *a, void *b, void *c);
+int rk_mod(void *a, void *b, void *c);
+int rk_exptmod(void *a, void *b, void *c, void *d);
+int rk_exptmod_np(void *m, void *e, void *n, void *np, void *d);
+
+#endif
diff --git a/include/rockchip/crypto_v2_util.h b/include/rockchip/crypto_v2_util.h
new file mode 100644
index 0000000000..7edeb04272
--- /dev/null
+++ b/include/rockchip/crypto_v2_util.h
@@ -0,0 +1,135 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _ROCKCHIP_CRYPTO_V2_UTIL_H_
+#define _ROCKCHIP_CRYPTO_V2_UTIL_H_
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/************************ Defines ******************************/
+
+/* invers the bytes on a word- used for output from HASH */
+#ifdef BIG__ENDIAN
+#define UTIL_INVERSE_UINT32_BYTES(val)	(val)
+#else
+#define UTIL_INVERSE_UINT32_BYTES(val) \
+	(((val) >> 24) | (((val) & 0x00FF0000) >> 8) | \
+	(((val) & 0x0000FF00) << 8) | (((val) & 0x000000FF) << 24))
+#endif
+
+/* invers the bytes on a word - used for input data for HASH */
+#ifdef BIG__ENDIAN
+#define UTIL_REVERT_UINT32_BYTES(val) \
+	(((val) >> 24) | (((val) & 0x00FF0000) >> 8) | \
+	(((val) & 0x0000FF00) << 8) | (((val) & 0x000000FF) << 24))
+#else
+#define UTIL_REVERT_UINT32_BYTES(val)	(val)
+#endif
+
+/* the minimum and maximum macros */
+#undef min
+#define min(a, b) (((a) < (b)) ? (a) : (b))
+
+#undef max
+#define max(a, b) (((a) > (b)) ? (a) : (b))
+
+/* MACRO to count one bits */
+#define COUNT_ONE_BITS(number, bit_count) \
+do { \
+	u32 tmp_num = number; \
+	bit_count = 0; \
+	while (tmp_num) { \
+		tmp_num = tmp_num & (tmp_num - 1); \
+	bit_count = bit_count + 1; \
+	} \
+} while (0)
+
+/* ------------------------------------------------------------
+ **
+ * @brief This function executes a reversed words copy on a specified buffer.
+ *
+ *        on a 6 words byffer:
+ *
+ *        buff[5] <---> buff[0]
+ *        buff[4] <---> buff[1]
+ *        buff[3] <---> buff[2]
+ *
+ * @param[in] dst_ptr - The counter buffer.
+ * @param[in] size    - The counter size in words.
+ *
+ */
+void util_reverse_words_buff(u32 *buff_ptr, u32 size_words);
+
+/* ------------------------------------------------------------
+ **
+ * @brief This function executes a reversed byte copy on a specified buffer.
+ *
+ *        on a 6 byte byffer:
+ *
+ *        buff[5] <---> buff[0]
+ *        buff[4] <---> buff[1]
+ *        buff[3] <---> buff[2]
+ *
+ * @param[in] dst_ptr - The counter buffer.
+ * @param[in] src_ptr - The counter size in bytes.
+ *
+ */
+void util_reverse_buff(u8 *buff_ptr, u32 size);
+
+/* ------------------------------------------------------------
+ **
+ * @brief This function executes a memory copy between 2 buffers.
+ *
+ * @param[in] dst_ptr - The first counter buffer.
+ * @param[in] src_ptr - The second counter buffer.
+ * @param[in] size    - The counter size in words.
+ *
+ */
+void util_word_memcpy(u32 *dst_ptr, u32 *src_ptr, u32 size);
+
+/* ------------------------------------------------------------
+ **
+ * @brief This function executes a memory set operation on a buffer.
+ *
+ * @param[in] buff_ptr - the buffer.
+ * @param[in] val		- The value to set the buffer.
+ * @param[in] size		- the buffers size in words.
+ *
+ */
+void util_word_memset(u32 *buff_ptr, u32 val, u32 size);
+
+/* ------------------------------------------------------------
+ **
+ * @brief This function executes a reverse bytes copying from one buffer
+ *	  to another buffer.
+ *
+ * @param[in] dst_ptr - The pointer to destination buffer.
+ * @param[in] src_ptr - The pointer to source buffer.
+ * @param[in] size    - The size in words.
+ *
+ */
+void util_reverse_word_memcpy(u32 *dst_ptr, u32 *src_ptr, u32 size);
+
+/* ------------------------------------------------------------
+ **
+ * @brief This function executes a reverse bytes copying from one buffer
+ *	  to another buffer.
+ *
+ * @param[in] dst_ptr - The pointer to destination buffer.
+ * @param[in] src_ptr - The pointer to source buffer.
+ * @param[in] size    - The size in bytes.
+ *
+ */
+void util_reverse_memcpy(u8 *dst_ptr, const u8 *src_ptr, u32 size);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+

commit f8681eaa25c6e2d36b10b30723a7ccff818b4175
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Tue May 21 15:08:21 2019 +0800

    rockchip: dts: px30: add and enable crypto node
    
    Change-Id: Ie8945a1e693e4673ea8863ef5a579e730c32ba66
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/arch/arm/dts/px30-u-boot.dtsi b/arch/arm/dts/px30-u-boot.dtsi
index ae3e4f973a..fe208f29db 100644
--- a/arch/arm/dts/px30-u-boot.dtsi
+++ b/arch/arm/dts/px30-u-boot.dtsi
@@ -45,6 +45,10 @@
 	u-boot,dm-pre-reloc;
 };
 
+&crypto {
+	u-boot,dm-pre-reloc;
+};
+
 &pmucru {
 	u-boot,dm-pre-reloc;
 };
diff --git a/arch/arm/dts/px30.dtsi b/arch/arm/dts/px30.dtsi
index b2ef14584f..e7c864d128 100644
--- a/arch/arm/dts/px30.dtsi
+++ b/arch/arm/dts/px30.dtsi
@@ -279,6 +279,15 @@
 		status = "disabled";
 	};
 
+	crypto: crypto@ff0b0000 {
+		compatible = "rockchip,px30-crypto";
+		reg = <0x0 0xff0b0000 0x0 0x4000>;
+		clock-names = "sclk_crypto", "apkclk_crypto";
+		clocks = <&cru SCLK_CRYPTO>, <&cru SCLK_CRYPTO_APK>;
+		clock-frequency = <200000000>, <300000000>;
+		status = "disabled";
+	};
+
 	gic: interrupt-controller@ff131000 {
 		compatible = "arm,gic-400";
 		#interrupt-cells = <3>;
diff --git a/arch/arm/dts/rk3326-evb.dts b/arch/arm/dts/rk3326-evb.dts
index 6427423c0e..acc51eccb9 100644
--- a/arch/arm/dts/rk3326-evb.dts
+++ b/arch/arm/dts/rk3326-evb.dts
@@ -430,3 +430,7 @@
 &uart2 {
 	status = "okay";
 };
+
+&crypto {
+	status = "okay";
+};

commit b07f31ddba1c0de6b15dac4057d2ff3ece48107d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 4 14:40:24 2019 +0800

    core: dump: add "*" for node from U-Boot dtb
    
    This is useful for debugging.
    
    Change-Id: If6a6e29053c1519ec40ccbcb183e35ffd81c64e8
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/core/dump.c b/drivers/core/dump.c
index 1cc929203b..89162641f2 100644
--- a/drivers/core/dump.c
+++ b/drivers/core/dump.c
@@ -34,7 +34,8 @@ static void show_devices(struct udevice *dev, int depth, int last_flag)
 		}
 	}
 
-	printf("%s\n", dev->name);
+	printf("%s %s\n", dev->name,
+	       dev_read_bool(dev, "u-boot,dm-pre-reloc") ? "*" : "");
 
 	list_for_each_entry(child, &dev->child_head, sibling_node) {
 		is_last = list_is_last(&child->sibling_node, &dev->child_head);

commit 054229abb7911ae7a8b16bb31f9047cf96a3a21e
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Mar 14 16:10:02 2019 +0800

    mtd: support mtd block model
    
    Attach the mtd driver to block device, then we can call common interface
    (blk_dread & blk_dwrite) to operate storage in application layer.
    
    Usage:
    Open CONFIG_MTD_BLK & CONFIG_MTD.
    
    Change-Id: I47a969322e2d20c12d46898bdc88f4104e1a15bf
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
index f258206e88..3400d1d922 100644
--- a/drivers/block/blk-uclass.c
+++ b/drivers/block/blk-uclass.c
@@ -28,7 +28,7 @@ static const char *if_typename_str[IF_TYPE_COUNT] = {
 	[IF_TYPE_SPINAND]	= "spinand",
 	[IF_TYPE_SPINOR]	= "spinor",
 	[IF_TYPE_RAMDISK]	= "ramdisk",
-
+	[IF_TYPE_MTD]		= "mtd",
 };
 
 static enum uclass_id if_type_uclass_id[IF_TYPE_COUNT] = {
@@ -46,6 +46,7 @@ static enum uclass_id if_type_uclass_id[IF_TYPE_COUNT] = {
 	[IF_TYPE_SPINAND]	= UCLASS_SPI_FLASH,
 	[IF_TYPE_SPINOR]	= UCLASS_SPI_FLASH,
 	[IF_TYPE_RAMDISK]	= UCLASS_RAMDISK,
+	[IF_TYPE_MTD]		= UCLASS_MTD,
 	[IF_TYPE_SYSTEMACE]	= UCLASS_INVALID,
 };
 
diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig
index 19579801d2..658197a864 100644
--- a/drivers/mtd/Kconfig
+++ b/drivers/mtd/Kconfig
@@ -8,6 +8,12 @@ config MTD
 	  flash, RAM and similar chips, often used for solid state file
 	  systems on embedded devices.
 
+config MTD_BLK
+	bool "Enable mtd block model for MTD drivers"
+	depends on MTD
+	help
+	  Enable mtd block model for Memory Technology Devices (MTD).
+
 config MTD_NOR_FLASH
 	bool "Enable parallel NOR flash support"
 	help
diff --git a/drivers/mtd/Makefile b/drivers/mtd/Makefile
index 20c0d0af44..3a3b54bdd1 100644
--- a/drivers/mtd/Makefile
+++ b/drivers/mtd/Makefile
@@ -9,6 +9,7 @@ ifneq (,$(findstring y,$(CONFIG_MTD_DEVICE)$(CONFIG_CMD_NAND)$(CONFIG_CMD_ONENAN
 obj-y += mtdcore.o mtd_uboot.o
 endif
 obj-$(CONFIG_MTD) += mtd-uclass.o
+obj-$(CONFIG_MTD_BLK) += mtd_blk.o
 obj-$(CONFIG_MTD_PARTITIONS) += mtdpart.o
 obj-$(CONFIG_MTD_CONCAT) += mtdconcat.o
 obj-$(CONFIG_ALTERA_QSPI) += altera_qspi.o
diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
new file mode 100644
index 0000000000..1b23cee92f
--- /dev/null
+++ b/drivers/mtd/mtd_blk.c
@@ -0,0 +1,97 @@
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <nand.h>
+#include <dm/device-internal.h>
+
+ulong mtd_dread(struct udevice *udev, lbaint_t start,
+		lbaint_t blkcnt, void *dst)
+{
+	struct blk_desc *desc = dev_get_uclass_platdata(udev);
+
+	if (!desc)
+		return 0;
+
+	if (blkcnt == 0)
+		return 0;
+
+	if (desc->devnum == BLK_MTD_NAND) {
+		int ret = 0;
+		size_t rwsize = blkcnt * 512;
+		struct mtd_info *mtd = dev_get_priv(udev->parent);
+		struct nand_chip *chip = mtd_to_nand(mtd);
+		loff_t off = (loff_t)(start * 512);
+
+		if (!mtd) {
+			puts("\nno mtd available\n");
+			return 0;
+		}
+
+		if (!chip) {
+			puts("\nno chip available\n");
+			return 0;
+		}
+
+		ret = nand_read_skip_bad(&chip->mtd, off, &rwsize,
+					 NULL, chip->mtd.size,
+					 (u_char *)(dst));
+		if (ret)
+			return 0;
+		else
+			return blkcnt;
+	} else if (desc->devnum == BLK_MTD_SPI_NAND) {
+		/* Not implemented */
+		return 0;
+	} else if (desc->devnum == BLK_MTD_SPI_NOR) {
+		/* Not implemented */
+		return 0;
+	} else {
+		return 0;
+	}
+}
+
+ulong mtd_dwrite(struct udevice *udev, lbaint_t start,
+		 lbaint_t blkcnt, const void *src)
+{
+	/* Not implemented */
+	return 0;
+}
+
+ulong mtd_derase(struct udevice *udev, lbaint_t start,
+		 lbaint_t blkcnt)
+{
+	/* Not implemented */
+	return 0;
+}
+
+static int mtd_blk_probe(struct udevice *udev)
+{
+	struct blk_desc *desc = dev_get_uclass_platdata(udev);
+
+	sprintf(desc->vendor, "0x%.4x", 0x2207);
+	memcpy(desc->product, "MTD", sizeof("MTD"));
+	memcpy(desc->revision, "V1.00", sizeof("V1.00"));
+
+	return 0;
+}
+
+static const struct blk_ops mtd_blk_ops = {
+	.read	= mtd_dread,
+#ifndef CONFIG_SPL_BUILD
+	.write	= mtd_dwrite,
+	.erase	= mtd_derase,
+#endif
+};
+
+U_BOOT_DRIVER(mtd_blk) = {
+	.name		= "mtd_blk",
+	.id		= UCLASS_BLK,
+	.ops		= &mtd_blk_ops,
+	.probe		= mtd_blk_probe,
+};
diff --git a/include/blk.h b/include/blk.h
index d1e82f574c..215929c945 100644
--- a/include/blk.h
+++ b/include/blk.h
@@ -38,10 +38,15 @@ enum if_type {
 	IF_TYPE_SPINAND,
 	IF_TYPE_SPINOR,
 	IF_TYPE_RAMDISK,
-
+	IF_TYPE_MTD,
 	IF_TYPE_COUNT,			/* Number of interface types */
 };
 
+/* define mtd device devnum */
+#define BLK_MTD_NAND		0
+#define BLK_MTD_SPI_NAND	1
+#define BLK_MTD_SPI_NOR		2
+
 #define BLK_VEN_SIZE		40
 #define BLK_PRD_SIZE		20
 #define BLK_REV_SIZE		8

commit 4b7e9c7e37b5532b0b43b2cfc56ac7cb557934fa
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri May 31 14:52:07 2019 +0800

    nand: delete useless conditional statement
    
    The alignment operation is always done by nand driver，so there is
    no need to do alignment operation in nand logical level.
    
    Change-Id: Ic08652e7a9574a5c8eebd505c66dc55b1e0ddce3
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mtd/nand/nand_util.c b/drivers/mtd/nand/nand_util.c
index 9c8a373970..9cc5f3357a 100644
--- a/drivers/mtd/nand/nand_util.c
+++ b/drivers/mtd/nand/nand_util.c
@@ -712,14 +712,6 @@ int nand_read_skip_bad(struct mtd_info *mtd, loff_t offset, size_t *length,
 	u_char *p_buffer = buffer;
 	int need_skip;
 
-	if ((offset & (mtd->writesize - 1)) != 0) {
-		printf("Attempt to read non page-aligned data\n");
-		*length = 0;
-		if (actual)
-			*actual = 0;
-		return -EINVAL;
-	}
-
 	need_skip = check_skip_len(mtd, offset, *length, &used_for_read);
 
 	if (actual)

commit d47d99649ef47fdc81ee4e8d70da68412f45d98e
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Fri May 31 17:58:43 2019 +0800

    lib: optee_client: v1 add security partition offset when backup data
    
    Change-Id: I331b95c1df8c0124568aad5ee7351bc270946af6
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/OpteeClientRkFs.c b/lib/optee_clientApi/OpteeClientRkFs.c
index 90d547622f..f211372905 100644
--- a/lib/optee_clientApi/OpteeClientRkFs.c
+++ b/lib/optee_clientApi/OpteeClientRkFs.c
@@ -241,7 +241,7 @@ static int rkss_begin_commit(void)
 	memset(data, 0, sizeof(data));
 	memcpy(data, &p, sizeof(p));
 
-	ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+	ret = blk_dwrite(dev_desc, part_info.start + RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
 		printf("TEEC: blk_dwrite fail\n");
 		return -1;
@@ -260,7 +260,7 @@ static int rkss_finish_commit(void)
 	debug("TEEC: %s\n", __func__);
 	memset(data, 0, sizeof(data));
 
-	ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+	ret = blk_dwrite(dev_desc, part_info.start + RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
 		printf("TEEC: blk_dwrite fail\n");
 		return -1;
@@ -279,7 +279,7 @@ static int rkss_backup_sections(unsigned long index, unsigned int num)
 	if (check_security_exist(1) < 0)
 		return -1;
 
-	ret = blk_dread(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+	ret = blk_dread(dev_desc, part_info.start + RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
 		printf("TEEC: blk_dread fail\n");
 		return -1;
@@ -318,13 +318,13 @@ static int rkss_backup_sections(unsigned long index, unsigned int num)
 			goto error;
 		}
 
-		ret = blk_dread(dev_desc, index, num, backup_data);
+		ret = blk_dread(dev_desc, part_info.start + index, num, backup_data);
 		if (ret != num) {
 			printf("TEEC: blk_dread fail\n");
 			return -1;
 		}
 
-		ret = blk_dwrite(dev_desc, info_current.backup_data_index,
+		ret = blk_dwrite(dev_desc, part_info.start + info_current.backup_data_index,
 				 num, backup_data);
 		if (ret != num) {
 			printf("TEEC: blk_dwrite fail\n");
@@ -340,7 +340,7 @@ static int rkss_backup_sections(unsigned long index, unsigned int num)
 		       (p.backup_count - 1) * sizeof(info_current),
 		       &info_current, sizeof(info_current));
 
-		ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+		ret = blk_dwrite(dev_desc, part_info.start + RKSS_BACKUP_INDEX, 1, data);
 		if (ret != 1) {
 			printf("TEEC: blk_dwrite fail\n");
 			return -1;
@@ -366,7 +366,7 @@ static int rkss_resume(void)
 	if (check_security_exist(1) < 0)
 		return -1;
 
-	ret = blk_dread(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+	ret = blk_dread(dev_desc, part_info.start + RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
 		printf("TEEC: blk_dread fail\n");
 		return -1;
@@ -407,7 +407,7 @@ static int rkss_resume(void)
 				}
 
 				ret = blk_dread(dev_desc,
-						info_current.backup_data_index,
+						part_info.start + info_current.backup_data_index,
 						info_current.backup_num,
 						backup_data);
 				if (ret != info_current.backup_num) {
@@ -416,7 +416,7 @@ static int rkss_resume(void)
 				}
 
 				ret = blk_dwrite(dev_desc,
-						 info_current.backup_index,
+						 part_info.start + info_current.backup_index,
 						 info_current.backup_num,
 						 backup_data);
 				if (ret != info_current.backup_num) {
@@ -429,7 +429,7 @@ static int rkss_resume(void)
 		}
 	}
 	memset(data, 0, sizeof(data));
-	ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+	ret = blk_dwrite(dev_desc, part_info.start + RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
 		printf("TEEC: blk_dwrite fail\n");
 		return -1;

commit e8c34540a61ba8ec3ef255e3e8a72e7d3409f5f5
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Fri May 31 17:21:52 2019 +0800

    lib: optee_client: v2 add security partition offset when backup data
    
    Change-Id: I9abbef68e56c0b2870426e91138bb110240ed69c
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/OpteeClientRkFs-v2.c b/lib/optee_clientApi/OpteeClientRkFs-v2.c
index f06f24cd01..2ebc238256 100644
--- a/lib/optee_clientApi/OpteeClientRkFs-v2.c
+++ b/lib/optee_clientApi/OpteeClientRkFs-v2.c
@@ -229,7 +229,7 @@ static int rkss_begin_commit(void)
 	memset(data, 0, sizeof(data));
 	memcpy(data, &p, sizeof(p));
 
-	ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+	ret = blk_dwrite(dev_desc, part_info.start + RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
 		printf("TEEC: blk_dwrite fail\n");
 		return -1;
@@ -248,7 +248,7 @@ static int rkss_finish_commit(void)
 	debug("TEEC: %s\n", __func__);
 	memset(data, 0, sizeof(data));
 
-	ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+	ret = blk_dwrite(dev_desc, part_info.start + RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
 		printf("TEEC: blk_dwrite fail\n");
 		return -1;
@@ -267,7 +267,7 @@ static int rkss_backup_sections(unsigned long index, unsigned int num)
 	if (check_security_exist(1) < 0)
 		return -1;
 
-	ret = blk_dread(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+	ret = blk_dread(dev_desc, part_info.start + RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
 		printf("TEEC: blk_dread fail\n");
 		return -1;
@@ -306,13 +306,13 @@ static int rkss_backup_sections(unsigned long index, unsigned int num)
 			goto error;
 		}
 
-		ret = blk_dread(dev_desc, index, num, backup_data);
+		ret = blk_dread(dev_desc, part_info.start + index, num, backup_data);
 		if (ret != num) {
 			printf("TEEC: blk_dread fail\n");
 			return -1;
 		}
 
-		ret = blk_dwrite(dev_desc, info_current.backup_data_index,
+		ret = blk_dwrite(dev_desc, part_info.start + info_current.backup_data_index,
 				 num, backup_data);
 		if (ret != num) {
 			printf("TEEC: blk_dwrite fail\n");
@@ -328,7 +328,7 @@ static int rkss_backup_sections(unsigned long index, unsigned int num)
 		       (p.backup_count - 1) * sizeof(info_current),
 		       &info_current, sizeof(info_current));
 
-		ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+		ret = blk_dwrite(dev_desc, part_info.start + RKSS_BACKUP_INDEX, 1, data);
 		if (ret != 1) {
 			printf("TEEC: blk_dwrite fail\n");
 			return -1;
@@ -354,7 +354,7 @@ static int rkss_resume(void)
 	if (check_security_exist(1) < 0)
 		return -1;
 
-	ret = blk_dread(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+	ret = blk_dread(dev_desc, part_info.start + RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
 		printf("TEEC: blk_dread fail\n");
 		return -1;
@@ -395,7 +395,7 @@ static int rkss_resume(void)
 				}
 
 				ret = blk_dread(dev_desc,
-						info_current.backup_data_index,
+						part_info.start + info_current.backup_data_index,
 						info_current.backup_num,
 						backup_data);
 				if (ret != info_current.backup_num) {
@@ -404,7 +404,7 @@ static int rkss_resume(void)
 				}
 
 				ret = blk_dwrite(dev_desc,
-						 info_current.backup_index,
+						 part_info.start + info_current.backup_index,
 						 info_current.backup_num,
 						 backup_data);
 				if (ret != info_current.backup_num) {
@@ -417,7 +417,7 @@ static int rkss_resume(void)
 		}
 	}
 	memset(data, 0, sizeof(data));
-	ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+	ret = blk_dwrite(dev_desc, part_info.start + RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
 		printf("TEEC: blk_dwrite fail\n");
 		return -1;

commit 6999767bb24a1de9544f7d5740cd5bb7069de68b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 26 10:46:45 2019 +0800

    dm: regulator: add "regulator-loader-ignore" property support
    
    The property indicates this regulator should skip init setting
    sequence, usually for saving boot time.
    
    Change-Id: I40a81c84b0696c70b16ddba50aeb457412287116
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/regulator-uclass.c b/drivers/power/regulator/regulator-uclass.c
index e902571c2c..0041c6a72a 100644
--- a/drivers/power/regulator/regulator-uclass.c
+++ b/drivers/power/regulator/regulator-uclass.c
@@ -265,6 +265,9 @@ int regulator_autoset(struct udevice *dev)
 
 	uc_pdata = dev_get_uclass_platdata(dev);
 
+	if (uc_pdata->ignore)
+		return ret;
+
 	if (uc_pdata->ramp_delay != -ENODATA)
 		regulator_set_ramp_delay(dev, uc_pdata->ramp_delay);
 
@@ -437,6 +440,7 @@ static int regulator_pre_probe(struct udevice *dev)
 						-ENODATA);
 	uc_pdata->always_on = dev_read_bool(dev, "regulator-always-on");
 	uc_pdata->boot_on = dev_read_bool(dev, "regulator-boot-on");
+	uc_pdata->ignore = dev_read_bool(dev, "regulator-loader-ignore");
 	uc_pdata->ramp_delay = dev_read_u32_default(dev, "regulator-ramp-delay",
 						    -ENODATA);
 	node = dev_read_subnode(dev, "regulator-state-mem");
diff --git a/include/power/regulator.h b/include/power/regulator.h
index a6a942bb90..8f45d7203a 100644
--- a/include/power/regulator.h
+++ b/include/power/regulator.h
@@ -178,6 +178,7 @@ struct dm_regulator_uclass_platdata {
 	u8 ctrl_reg;
 	u8 volt_reg;
 	bool suspend_on;
+	bool ignore;
 	u32 suspend_uV;
 	u32 ramp_delay;
 };

commit ea4b8016c13aa6f6c0d0a68f88c9970a5fcf1213
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed May 29 09:47:37 2019 +0800

    core: device_bind_common: always use crypto node from U-Boot dtb
    
    There is not crypto node in kernel dtb for early platform(such as
    rk322x/rk3288/rk3368/rk3399, etc), so we decide to add crypto node
    always in U-Boot dtb and ignore crypto node from kernel dtb.
    
    This is a way to compatible with early platforms. Actually, we
    need crypto during secure boot sequence, the crypto had better
    not depends on kernel dtb.
    
    Change-Id: Ibab4fca0741b45042b8d0868240449fb6b52aa14
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/core/device.c b/drivers/core/device.c
index 5d7ec56c82..ea224c22e5 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -71,7 +71,7 @@ static int device_bind_common(struct udevice *parent, const struct driver *drv,
 		list_for_each_entry_safe(dev, n, &uc->dev_head, uclass_node) {
 			if (!strcmp(name, dev->name) &&
 			    dev_read_bool(dev, "u-boot,dm-pre-reloc")) {
-				if (drv->id == UCLASS_SERIAL) {
+				if (drv->id == UCLASS_SERIAL || drv->id == UCLASS_CRYPTO) {
 					/* Always use serial node from U-Boot dtb */
 					debug("%s do not delete uboot dev: %s\n",
 					      __func__, dev->name);

commit 48802b420ed64314c357b48219c791ec7c6eb8f8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu May 30 14:18:15 2019 +0800

    env: Kconfig: fix typo
    
    Change-Id: I02f0d7e83ab216e8cecba9d8f3e3a9b223afaed4
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/env/Kconfig b/env/Kconfig
index 2a35c08090..48cec9b8f8 100644
--- a/env/Kconfig
+++ b/env/Kconfig
@@ -360,7 +360,7 @@ config ENV_IS_IN_UBI
 
 config ENV_IS_IN_BLK_DEV
 	bool "Environment in a block device"
-	depends on !CHAIN_OF_TRUST && CONFIG_BLK
+	depends on !CHAIN_OF_TRUST && BLK
 	help
 	  Define this if you have an Block device which you want to use for the
 	  environment.

commit ce7f8a11466c91eae324e3d8eb1a2f26f834cf52
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Apr 16 11:07:24 2019 +0800

    arm: rockchip: rk3308: grf: add more register
    
    Change-Id: I008a22e3dccd61b928a0f565791f1abef4d279de
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3308.h b/arch/arm/include/asm/arch-rockchip/grf_rk3308.h
index f0f1bb541d..bf241a4bd5 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rk3308.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3308.h
@@ -169,7 +169,13 @@ struct rk3308_grf {
 	unsigned int os_reg9;
 	unsigned int os_reg10;
 	unsigned int os_reg11;
-	unsigned int reserved38[(0x800 - 0x52C) / 4 - 1];
+	unsigned int reserved38[(0x600 - 0x52c) / 4 - 1];
+	unsigned int soc_con12;
+	unsigned int reserved39;
+	unsigned int soc_con13;
+	unsigned int soc_con14;
+	unsigned int soc_con15;
+	unsigned int reserved40[(0x800 - 0x610) / 4 - 1];
 	unsigned int chip_id;
 };
 check_member(rk3308_grf, gpio0a_p, 0xa0);

commit f9ebf7a1deba3da5e8597b6f9a84d0201ee8f0e7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 24 12:50:09 2019 +0800

    crypto: rockchip: v1: use BITS2WORD() for sha final
    
    Adding error message for missing total data length when sha init.
    
    Change-Id: Ibbd266a36ba1498ab4ab5c85ecbb68c548a89a86
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/crypto/rockchip/crypto_v1.c b/drivers/crypto/rockchip/crypto_v1.c
index de9ef078a2..c3d2d2791b 100644
--- a/drivers/crypto/rockchip/crypto_v1.c
+++ b/drivers/crypto/rockchip/crypto_v1.c
@@ -39,9 +39,15 @@ static int rockchip_crypto_sha_init(struct udevice *dev, sha_context *ctx)
 	struct rk_crypto_reg *reg = priv->reg;
 	u32 val;
 
-	if (!ctx || !ctx->length)
+	if (!ctx)
 		return -EINVAL;
 
+	if (!ctx->length) {
+		printf("%s: Err: crypto v1 request total data "
+		       "length when sha init\n", __func__);
+		return -EINVAL;
+	}
+
 	priv->length = 0;
 	writel(ctx->length, &reg->crypto_hash_msg_len);
 	if (ctx->algo == CRYPTO_SHA256) {
@@ -140,7 +146,7 @@ static int rockchip_crypto_sha_final(struct udevice *dev,
 
 	/* Read hash data, per-data 32-bit */
 	nbits = crypto_algo_nbits(ctx->algo);
-	for (i = 0; i < BYTE2WORD(nbits); i++)
+	for (i = 0; i < BITS2WORD(nbits); i++)
 		buf[i] = readl(&reg->crypto_hash_dout[i]);
 
 	return 0;

commit d7a244f923dcdd383b5eefaf7a412493fe977b79
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue May 28 15:30:06 2019 +0800

    core: device_bind_common: only delete U-Boot existance node
    
    Use "u-boot,dm-pre-reloc" to identify whether the existance
    node is from U-Boot or not. This avoids deleting the same name
    nodes from kernel dtb.
    
    Change-Id: I6503965c0013053feefad7e93f98b01b5af71f44
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/core/device.c b/drivers/core/device.c
index 21eb2527a0..5d7ec56c82 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -69,7 +69,8 @@ static int device_bind_common(struct udevice *parent, const struct driver *drv,
 		struct udevice *n;
 
 		list_for_each_entry_safe(dev, n, &uc->dev_head, uclass_node) {
-			if (!strcmp(name, dev->name)) {
+			if (!strcmp(name, dev->name) &&
+			    dev_read_bool(dev, "u-boot,dm-pre-reloc")) {
 				if (drv->id == UCLASS_SERIAL) {
 					/* Always use serial node from U-Boot dtb */
 					debug("%s do not delete uboot dev: %s\n",

commit 039bc38d48725a7cd15d60efec1aaae28c30249f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu May 23 10:21:11 2019 +0800

    make.sh: add rk3326 aarch32 build support
    
    Change-Id: Ibfc6a40b5d0decbffdbf4e797459da189484ce88
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index bdd345fb57..fad2993f92 100755
--- a/make.sh
+++ b/make.sh
@@ -413,10 +413,13 @@ fixup_platform_configure()
 	fi
 
 # <*> Fixup AARCH32 for ARM64 cpu platforms
-	if [ $RKCHIP = "RK3308" ]; then
-		if grep -q '^CONFIG_ARM64_BOOT_AARCH32=y' ${OUTDIR}/.config ; then
+	if grep -q '^CONFIG_ARM64_BOOT_AARCH32=y' ${OUTDIR}/.config ; then
+		if [ $RKCHIP = "RK3308" ]; then
 			RKCHIP_LABEL=${RKCHIP_LABEL}"AARCH32"
 			RKCHIP_TRUST=${RKCHIP_TRUST}"AARCH32"
+		elif [ $RKCHIP = "RK3326" ]; then
+			RKCHIP_LABEL=${RKCHIP_LABEL}"AARCH32"
+			RKCHIP_LOADER=${RKCHIP_LOADER}"AARCH32"
 		fi
 	fi
 }

commit 5202fe1fb45f2c3f53825d5cbdc0b2f124218a52
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu May 23 10:20:25 2019 +0800

    make.sh: improve aarch32 build
    
    Change-Id: I7e39b0cb71a534cf073d38f2bab28069dbad1b26
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index e1fad7b138..bdd345fb57 100755
--- a/make.sh
+++ b/make.sh
@@ -66,7 +66,6 @@ PLATFORM_RSA=
 PLATFORM_SHA=
 PLATFORM_UBOOT_IMG_SIZE=
 PLATFORM_TRUST_IMG_SIZE=
-PLATFORM_AARCH32=
 
 # Out env param
 PACK_IGNORE_BL32=$TRUST_PACK_IGNORE_BL32	# Value only: "--ignore-bl32"
@@ -413,10 +412,11 @@ fixup_platform_configure()
 		PLATFORM_TRUST_IMG_SIZE="--size 1024 2"
 	fi
 
-# <*> Fixup PLATFORM_AARCH32 for ARM64 cpu platforms
+# <*> Fixup AARCH32 for ARM64 cpu platforms
 	if [ $RKCHIP = "RK3308" ]; then
 		if grep -q '^CONFIG_ARM64_BOOT_AARCH32=y' ${OUTDIR}/.config ; then
-			PLATFORM_AARCH32="AARCH32"
+			RKCHIP_LABEL=${RKCHIP_LABEL}"AARCH32"
+			RKCHIP_TRUST=${RKCHIP_TRUST}"AARCH32"
 		fi
 	fi
 }
@@ -643,9 +643,9 @@ pack_trust_image()
 	ls trust*.img >/dev/null && rm trust*.img
 	# ARM64 uses trust_merger
 	if grep -Eq ''^CONFIG_ARM64=y'|'^CONFIG_ARM64_BOOT_AARCH32=y'' ${OUTDIR}/.config ; then
-		ini=${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST.ini
+		ini=${RKBIN}/RKTRUST/${RKCHIP_TRUST}TRUST.ini
 		if [ "${mode}" = 'all' ]; then
-			files=`ls ${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST*.ini`
+			files=`ls ${RKBIN}/RKTRUST/${RKCHIP_TRUST}TRUST*.ini`
 			for ini in $files
 			do
 				__pack_64bit_trust_image ${ini}
@@ -672,9 +672,9 @@ finish()
 {
 	echo
 	if [ "$BOARD" = '' ]; then
-		echo "Platform ${RKCHIP_LABEL}${PLATFORM_AARCH32} is build OK, with exist .config"
+		echo "Platform ${RKCHIP_LABEL} is build OK, with exist .config"
 	else
-		echo "Platform ${RKCHIP_LABEL}${PLATFORM_AARCH32} is build OK, with new .config(make ${BOARD}_defconfig)"
+		echo "Platform ${RKCHIP_LABEL} is build OK, with new .config(make ${BOARD}_defconfig)"
 	fi
 }
 

commit 9ad51843bf9cad5be313c69cd7e73494d11b7d08
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed May 22 10:42:17 2019 +0800

    configs: add rk3326-aarch32_defconfig
    
    Enable using kernel dtb.
    
    Change-Id: I2a450300509c81f9cc41af7f57fe40d87d8419be
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3326-aarch32_defconfig b/configs/rk3326-aarch32_defconfig
new file mode 100644
index 0000000000..06eda5d7a2
--- /dev/null
+++ b/configs/rk3326-aarch32_defconfig
@@ -0,0 +1,120 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_ROCKCHIP_PX30=y
+CONFIG_ROCKCHIP_RK3326=y
+CONFIG_ARM64_BOOT_AARCH32=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_TARGET_EVB_PX30=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3326-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_ANDROID_AVB=y
+CONFIG_FASTBOOT_BUF_ADDR=0x800800
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_OEM_UNLOCK=y
+# CONFIG_CMD_BOOTD is not set
+CONFIG_CMD_DTIMG=y
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPT=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_ITEST is not set
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_MISC is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
+CONFIG_RKPARM_PARTITION=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_RK8XX_PWRKEY=y
+CONFIG_ADC_KEY=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PINCTRL=y
+CONFIG_DM_FUEL_GAUGE=y
+CONFIG_POWER_FG_RK817=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_DM_CHARGE_DISPLAY=y
+CONFIG_CHARGE_ANIMATION=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_TPL_RAM=y
+CONFIG_ROCKCHIP_SDRAM_COMMON=y
+CONFIG_SDRAM_COMMON_CAP_DETECT=y
+CONFIG_SDRAM_COMMON_OSREG=y
+CONFIG_SDRAM_COMMON_MSCH_PX30=y
+CONFIG_DM_RESET=y
+CONFIG_RKNAND=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0xFF160000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x330d
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_DRM_ROCKCHIP_LVDS=y
+CONFIG_DRM_ROCKCHIP_RGB=y
+CONFIG_LCD=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_LZ4=y
+CONFIG_LZO=y
+CONFIG_ERRNO_STR=y
+# CONFIG_EFI_LOADER is not set
+CONFIG_AVB_LIBAVB=y
+CONFIG_AVB_LIBAVB_AB=y
+CONFIG_AVB_LIBAVB_ATX=y
+CONFIG_AVB_LIBAVB_USER=y
+CONFIG_RK_AVB_LIBAVB_USER=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V2=y
+CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
+CONFIG_TEST_ROCKCHIP=y

commit 6db22b33e71b19e6828d45ab978748627ff3cabd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed May 22 10:41:36 2019 +0800

    rockchip: rk3326: add AArch32 execution state support
    
    Support boot ARMv8 based RK3326 on AARCH32 state
    
    Change-Id: Ifb788ba71057f4f72dba9e1071c3609308644a9b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 040a117dec..7e08cc11f1 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -2,13 +2,13 @@ if ARCH_ROCKCHIP
 
 config ROCKCHIP_PX30
 	bool "Support Rockchip PX30"
-	select ARM64
+	select ARM64 if !ARM64_BOOT_AARCH32
 	select GICV2
 	select ARM_SMCCC
 	select SUPPORT_SPL
 	select SUPPORT_TPL
-	select SPL
-	select TPL
+	select SPL if !ARM64_BOOT_AARCH32
+	select TPL if !ARM64_BOOT_AARCH32
 	select TPL_TINY_FRAMEWORK if TPL
 
 	imply SPL_SERIAL_SUPPORT
diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c
index 84bf8cb7a6..61ddf63e3e 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -11,7 +11,6 @@
 #include <asm/arch/grf_px30.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/uart.h>
-#include <asm/armv8/mmu.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/cru_px30.h>
 #include <dt-bindings/clock/px30-cru.h>
@@ -26,6 +25,9 @@
 
 #define QOS_PRIORITY_LEVEL(h, l)	((((h) & 3) << 8) | ((l) & 3))
 
+#ifdef CONFIG_ARM64
+#include <asm/armv8/mmu.h>
+
 static struct mm_region px30_mem_map[] = {
 	{
 		.virt = 0x0UL,
@@ -47,6 +49,7 @@ static struct mm_region px30_mem_map[] = {
 };
 
 struct mm_region *mem_map = px30_mem_map;
+#endif
 
 int arch_cpu_init(void)
 {
diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index 4a4e72ba75..2569a5cb0f 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -52,6 +52,7 @@
 #define CONFIG_USB_FUNCTION_MASS_STORAGE
 #define CONFIG_ROCKUSB_G_DNL_PID        0x330d
 
+#ifdef CONFIG_ARM64
 #define ENV_MEM_LAYOUT_SETTINGS \
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
@@ -59,6 +60,14 @@
 	"kernel_addr_r=0x00280000\0" \
 	"kernel_addr_c=0x03e80000\0" \
 	"ramdisk_addr_r=0x0a200000\0"
+#else
+#define ENV_MEM_LAYOUT_SETTINGS \
+	"scriptaddr=0x00000000\0" \
+	"pxefile_addr_r=0x00100000\0" \
+	"fdt_addr_r=0x08300000\0" \
+	"kernel_addr_r=0x02008000\0" \
+	"ramdisk_addr_r=0x0a200000\0"
+#endif
 
 #include <config_distro_bootcmd.h>
 #define CONFIG_EXTRA_ENV_SETTINGS \

commit 39c46c24efcc88fe5498f593330d43911b70efe6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon May 27 10:03:55 2019 +0800

    common: android: correct kernel memcpy size when load separate
    
    The hdr->page_size should be included.
    
    fixes: 503a892f5a3eec2c981d9247e68efcfb94321d13
    (common: android: avb support load android image separate)
    
    Change-Id: I2de2c9957fd47c7f95bf863f7b0c679cc64633d9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/image-android.c b/common/image-android.c
index 4e1e185b27..0237565343 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -280,8 +280,7 @@ int android_image_load_separate(struct andr_img_hdr *hdr,
 
 		if (ram_src) {
 			start = (ulong)ram_src;
-			memcpy((char *)load_address,
-			       (char *)start, hdr->kernel_size);
+			memcpy((char *)load_address, (char *)start, size);
 		} else {
 			blk_start = part->start;
 			ret = blk_dread(dev_desc, blk_start,

commit 459505b3345ca13836a1bf632f67258e6d10b7a6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 24 11:16:27 2019 +0800

    common: rkimg: fix uncompress region check issue
    
    kernel_addr_r is defined in the function entry, we should not
    define it agin, otherwise the behind code is someting wrong.
    (images.ep = kernel_addr_r;)
    
    Change-Id: If6a4c01e8ecdf130b800bd3884a5cfbe158d8f9a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 2f196ad668..56e18ba571 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -533,16 +533,16 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 	run_command(cmdbuf, 0);
 #else
 	/* We asume it's always zImage on 32-bit platform */
-	ulong kernel_addr_c = env_get_ulong("kernel_addr_c", 16, 0);
-	ulong kaddr, ksize;
+	ulong kaddr_c = env_get_ulong("kaddr_c", 16, 0);
+	ulong kaddr_r, kaddr, ksize;
 
-	if (kernel_addr_r && !kernel_addr_c) {
-		kernel_addr_c = kernel_addr_r;
-		kernel_addr_r = CONFIG_SYS_SDRAM_BASE;
+	if (kernel_addr_r && !kaddr_c) {
+		kaddr_c = kernel_addr_r;
+		kaddr_r = CONFIG_SYS_SDRAM_BASE;
 	}
 
-	if (!sysmem_free((phys_addr_t)kernel_addr_c)) {
-		kaddr = kernel_addr_r;
+	if (!sysmem_free((phys_addr_t)kaddr_c)) {
+		kaddr = kaddr_r;
 		ksize = kernel_size * 100 / 45 ; /* Ratio: 45% */
 		ksize = ALIGN(ksize, dev_desc->blksz);
 		if (!sysmem_alloc_base(MEMBLK_ID_UNCOMP_KERNEL,

commit 160c99aa45f26fb476b78fd57c8a91f469546c97
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 24 09:50:01 2019 +0800

    rockchip: param: add common memory reserve for most AArch32 mode
    
    The ARMv8 platform enabling AArch32 mode should reserve memory the same
    as AArch64 mode(because there is no difference about ATF), only some
    platform has special request, they are: RK3308.
    
    Change-Id: I0ffbfac7ddaff50ef53128dccd5b7dc2d02b560a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/param.c b/arch/arm/mach-rockchip/param.c
index c488a92fa4..6c944eb4d8 100644
--- a/arch/arm/mach-rockchip/param.c
+++ b/arch/arm/mach-rockchip/param.c
@@ -145,7 +145,15 @@ struct memblock param_parse_common_resv_mem(void)
 {
 	struct memblock mem;
 
-#ifdef CONFIG_ARM64
+#if defined(CONFIG_ARM64)
+	mem.base = SDRAM_OFFSET(SZ_1M);
+	mem.size = SZ_1M;
+/*
+ * The ARMv8 platform enabling AArch32 mode should reserve memory the same
+ * as AArch64 mode(because there is no difference about ATF), only some
+ * platform has special request, they are: RK3308.
+ */
+#elif defined(CONFIG_ARM64_BOOT_AARCH32) && !defined(CONFIG_ROCKCHIP_RK3308)
 	mem.base = SDRAM_OFFSET(SZ_1M);
 	mem.size = SZ_1M;
 #else

commit 598774ec05b47f88be38ab860fe4c09a875499f3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 24 11:12:59 2019 +0800

    lib: sysmem: add optimization for input base and M_ATTR_PEEK
    
    - handle the case: the input base is 0;
    - ignore the head region which can't visible for M_ATTR_PEEK;
    
    Change-Id: I2c3609b9457a5e2e429e849228301bfee0e4c9b0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/lib/sysmem.c b/lib/sysmem.c
index 0f382c95f4..ae7e331f07 100644
--- a/lib/sysmem.c
+++ b/lib/sysmem.c
@@ -12,8 +12,10 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 #define SYSMEM_MAGIC		0x4D454D53	/* "SMEM" */
-#define SYSMEM_ALLOC_ANYWHERE	0
+
+#define LMB_ALLOC_ANYWHERE	0		/* sync with lmb.c */
 #define SYSMEM_ALLOC_NO_ALIGN	1
+#define SYSMEM_ALLOC_ANYWHERE	2
 
 #define SYSMEM_I(fmt, args...)	printf("Sysmem: "fmt, ##args)
 #define SYSMEM_W(fmt, args...)	printf("Sysmem Warn: "fmt, ##args)
@@ -251,9 +253,19 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 		 * of space(4KB) maybe safer.
 		 */
 		if ((id == MEMBLK_ID_AVB_ANDROID) &&
-		    (base == SYSMEM_ALLOC_ANYWHERE))
+		    (base == SYSMEM_ALLOC_ANYWHERE)) {
 			base = gd->start_addr_sp -
 					CONFIG_SYS_STACK_SIZE - size - 0x1000;
+		/*
+		 * So far, we use M_ATTR_PEEK for uncompress kernel alloc, and
+		 * for ARMv8 enabling AArch32 mode, the ATF is still AArch64
+		 * and ocuppies 0~1MB and shmem 1~2M. So let's ignore the region
+		 * which overlap with them.
+		 */
+		} else if (attr.flags & M_ATTR_PEEK) {
+			if (base <= gd->bd->bi_dram[0].start)
+				base = gd->bd->bi_dram[0].start;
+		}
 	} else {
 		SYSMEM_E("Unsupport memblk id %d for alloc sysmem\n", id);
 		goto out;
@@ -321,7 +333,7 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 
 	/* Alloc anywhere ? */
 	if (base == SYSMEM_ALLOC_ANYWHERE)
-		alloc_base = base;
+		alloc_base = LMB_ALLOC_ANYWHERE;
 	else
 		alloc_base = base + alloc_size;	/* LMB is align down alloc mechanism */
 
@@ -371,6 +383,13 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 	return (void *)paddr;
 
 out:
+	/*
+	 * Why: base + sizeof(ulong) ?
+	 * It's a not standard way to handle the case: the input base is 0.
+	 */
+	if (base == 0)
+		base = base + sizeof(ulong);
+
 	return (attr.flags & M_ATTR_PEEK) ? (void *)base : NULL;
 }
 

commit 7328d2324ed09f6a9d87cb4caf8e03a6991a0cbd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu May 23 09:51:04 2019 +0800

    ram: rockchip: fix AArch32 compile issue
    
    error: cast to pointer from integer of different size [-Werror=int-to-pointer-cast]
    
    Change-Id: Iadcf7065f02ee779d3eeee1cb70fd3e9905e1b3f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram_share.c b/drivers/ram/rockchip/sdram_share.c
index 09bce9d972..9ec9906c60 100644
--- a/drivers/ram/rockchip/sdram_share.c
+++ b/drivers/ram/rockchip/sdram_share.c
@@ -403,7 +403,7 @@ int sdram_detect_cs1_row(struct sdram_cap_info *cap_info, u32 dram_type)
 {
 	void __iomem *test_addr;
 	u32 row = 0, bktmp, coltmp, bw;
-	u64 cs0_cap;
+	ulong cs0_cap;
 	u32 byte_mask;
 
 	if (cap_info->rank == 2) {

commit a7784f29953d4b6b07ef3c0037090b2edb315f44
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Wed May 22 17:46:21 2019 +0800

    drivers: rknand: add slc nand and some new MLC nand support
    
    Change-Id: I13c9d56c80c6e817f591b55ea31672681565d274
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/drivers/rknand/rk_ftl_arm_v7.S b/drivers/rknand/rk_ftl_arm_v7.S
index ff3d230ed4..afdb29731e 100644
--- a/drivers/rknand/rk_ftl_arm_v7.S
+++ b/drivers/rknand/rk_ftl_arm_v7.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2019-01-07
+ * date: 2019-05-08
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -17,7 +17,50 @@
 	.eabi_attribute 30, 4
 	.eabi_attribute 34, 0
 	.eabi_attribute 18, 2
-	.file	"rk_ftl_arm_v7.c"
+	.file	"rk_ftl_arm_v7.S"
+	.section	.text.flash_read_ecc,"ax",%progbits
+	.align	1
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_read_ecc, %function
+flash_read_ecc:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2
+	push	{r4, lr}
+	ldr	r4, [r3, r0, lsl #3]
+	add	r3, r3, r0, lsl #3
+	movs	r0, #80
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+	add	r4, r4, r3, lsl #8
+	movs	r3, #122
+	str	r3, [r4, #2056]
+	bl	udelay
+	ldr	r3, [r4, #2048]
+	ldr	r0, [r4, #2048]
+	and	r3, r3, #15
+	and	r0, r0, #15
+	cmp	r0, r3
+	it	cc
+	movcc	r0, r3
+	ldr	r3, [r4, #2048]
+	and	r3, r3, #15
+	cmp	r3, r0
+	it	cc
+	movcc	r3, r0
+	ldr	r0, [r4, #2048]
+	and	r0, r0, #15
+	cmp	r0, r3
+	it	cc
+	movcc	r0, r3
+	pop	{r4, pc}
+.L3:
+	.align	2
+.L2:
+	.word	.LANCHOR0
+	.size	flash_read_ecc, .-flash_read_ecc
 	.section	.text.ftl_set_blk_mode.part.10,"ax",%progbits
 	.align	1
 	.syntax unified
@@ -29,7 +72,7 @@ ftl_set_blk_mode.part.10:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L2
+	ldr	r3, .L5
 	lsrs	r1, r0, #5
 	and	r0, r0, #31
 	ldr	r2, [r3]
@@ -39,10 +82,10 @@ ftl_set_blk_mode.part.10:
 	orrs	r3, r3, r0
 	str	r3, [r2, r1, lsl #2]
 	bx	lr
-.L3:
+.L6:
 	.align	2
-.L2:
-	.word	.LANCHOR0
+.L5:
+	.word	.LANCHOR1
 	.size	ftl_set_blk_mode.part.10, .-ftl_set_blk_mode.part.10
 	.section	.text.FlashMemCmp8,"ax",%progbits
 	.align	1
@@ -55,33 +98,33 @@ ftl_set_blk_mode.part.10:
 FlashMemCmp8:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L12
+	ldr	r3, .L15
 	push	{r4, r5, lr}
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L7
+	cbz	r3, .L10
 	ldrb	r4, [r0, #1]	@ zero_extendqisi2
 	ldrb	r3, [r1, #1]	@ zero_extendqisi2
 	cmp	r4, r3
-	beq	.L11
+	beq	.L14
 	movs	r3, #0
-.L7:
+.L10:
 	cmp	r3, r2
-	bne	.L9
-.L11:
+	bne	.L12
+.L14:
 	movs	r0, #0
 	pop	{r4, r5, pc}
-.L9:
+.L12:
 	ldrb	r5, [r0, r3]	@ zero_extendqisi2
 	ldrb	r4, [r1, r3]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	cmp	r5, r4
-	beq	.L7
+	beq	.L10
 	mov	r0, r3
 	pop	{r4, r5, pc}
-.L13:
+.L16:
 	.align	2
-.L12:
-	.word	.LANCHOR1
+.L15:
+	.word	.LANCHOR2
 	.size	FlashMemCmp8, .-FlashMemCmp8
 	.section	.text.FlashRsvdBlkChk,"ax",%progbits
 	.align	1
@@ -95,25 +138,25 @@ FlashRsvdBlkChk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L17
+	ldr	r3, .L20
 	ldrb	r2, [r3]	@ zero_extendqisi2
-	ldr	r3, .L17+4
+	ldr	r3, .L20+4
 	ldr	r3, [r3]
 	muls	r3, r2, r3
 	cmp	r3, r1
-	bls	.L16
+	bls	.L19
 	adds	r0, r0, #0
 	it	ne
 	movne	r0, #1
 	bx	lr
-.L16:
+.L19:
 	movs	r0, #1
 	bx	lr
-.L18:
+.L21:
 	.align	2
-.L17:
-	.word	.LANCHOR2
+.L20:
 	.word	.LANCHOR3
+	.word	.LANCHOR4
 	.size	FlashRsvdBlkChk, .-FlashRsvdBlkChk
 	.section	.text.FlashGetRandomizer,"ax",%progbits
 	.align	1
@@ -126,24 +169,24 @@ FlashRsvdBlkChk:
 FlashGetRandomizer:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L27
+	ldr	r3, .L30
 	and	r2, r1, #127
 	push	{r4, lr}
 	ldrh	r4, [r3, r2, lsl #1]
-	ldr	r3, .L27+4
+	ldr	r3, .L30+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L19
+	cbz	r3, .L22
 	bl	FlashRsvdBlkChk
-	cbz	r0, .L19
+	cbz	r0, .L22
 	orr	r4, r4, #-1073741824
-.L19:
+.L22:
 	mov	r0, r4
 	pop	{r4, pc}
-.L28:
+.L31:
 	.align	2
-.L27:
-	.word	.LANCHOR4
+.L30:
 	.word	.LANCHOR5
+	.word	.LANCHOR6
 	.size	FlashGetRandomizer, .-FlashGetRandomizer
 	.section	.text.FlashSetRandomizer,"ax",%progbits
 	.align	1
@@ -158,26 +201,26 @@ FlashSetRandomizer:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	and	r2, r1, #127
-	ldr	r3, .L37
+	ldr	r3, .L40
 	mov	r5, r0
 	ldrh	r4, [r3, r2, lsl #1]
-	ldr	r3, .L37+4
+	ldr	r3, .L40+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L30
+	cbz	r3, .L33
 	bl	FlashRsvdBlkChk
-	cbz	r0, .L30
+	cbz	r0, .L33
 	orr	r4, r4, #-1073741824
-.L30:
-	ldr	r3, .L37+8
+.L33:
+	ldr	r3, .L40+8
 	ldr	r3, [r3, r5, lsl #3]
 	str	r4, [r3, #336]
 	pop	{r3, r4, r5, pc}
-.L38:
+.L41:
 	.align	2
-.L37:
-	.word	.LANCHOR4
+.L40:
 	.word	.LANCHOR5
 	.word	.LANCHOR6
+	.word	.LANCHOR0
 	.size	FlashSetRandomizer, .-FlashSetRandomizer
 	.section	.text.FlashBlockAlignInit,"ax",%progbits
 	.align	1
@@ -192,24 +235,24 @@ FlashBlockAlignInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	cmp	r0, #256
-	ldr	r3, .L44
-	bls	.L40
+	ldr	r3, .L47
+	bls	.L43
 	mov	r2, #512
-.L43:
+.L46:
 	str	r2, [r3]
 	bx	lr
-.L40:
+.L43:
 	cmp	r0, #128
-	bhi	.L42
+	bhi	.L45
 	str	r0, [r3]
 	bx	lr
-.L42:
-	mov	r2, #256
-	b	.L43
 .L45:
+	mov	r2, #256
+	b	.L46
+.L48:
 	.align	2
-.L44:
-	.word	.LANCHOR3
+.L47:
+	.word	.LANCHOR4
 	.size	FlashBlockAlignInit, .-FlashBlockAlignInit
 	.section	.text.FlashReadCmd,"ax",%progbits
 	.align	1
@@ -225,7 +268,7 @@ FlashReadCmd:
 	@ link register save eliminated.
 	push	{r4, r5}
 	lsrs	r2, r1, #16
-	ldr	r4, .L47
+	ldr	r4, .L50
 	ldr	r3, [r4, r0, lsl #3]
 	add	r4, r4, r0, lsl #3
 	ldrb	r4, [r4, #4]	@ zero_extendqisi2
@@ -243,10 +286,10 @@ FlashReadCmd:
 	str	r2, [r3, #2056]
 	pop	{r4, r5}
 	b	FlashSetRandomizer
-.L48:
+.L51:
 	.align	2
-.L47:
-	.word	.LANCHOR6
+.L50:
+	.word	.LANCHOR0
 	.size	FlashReadCmd, .-FlashReadCmd
 	.section	.text.FlashReadDpDataOutCmd,"ax",%progbits
 	.align	1
@@ -260,10 +303,10 @@ FlashReadDpDataOutCmd:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L53
+	ldr	r2, .L56
 	push	{r4, r5, r6}
 	uxtb	r6, r1
-	ldr	r4, .L53+4
+	ldr	r4, .L56+4
 	lsrs	r5, r1, #8
 	ldr	r3, [r2, r0, lsl #3]
 	add	r2, r2, r0, lsl #3
@@ -273,7 +316,7 @@ FlashReadDpDataOutCmd:
 	lsr	r4, r1, #16
 	lsl	r2, r2, #8
 	add	r3, r3, r2
-	bne	.L50
+	bne	.L53
 	movs	r2, #6
 	str	r2, [r3, #2056]
 	movs	r2, #0
@@ -282,12 +325,12 @@ FlashReadDpDataOutCmd:
 	str	r6, [r3, #2052]
 	str	r5, [r3, #2052]
 	str	r4, [r3, #2052]
-.L52:
+.L55:
 	movs	r2, #224
 	str	r2, [r3, #2056]
 	pop	{r4, r5, r6}
 	b	FlashSetRandomizer
-.L50:
+.L53:
 	movs	r2, #0
 	str	r2, [r3, #2056]
 	str	r2, [r3, #2052]
@@ -299,11 +342,11 @@ FlashReadDpDataOutCmd:
 	str	r4, [r3, #2056]
 	str	r2, [r3, #2052]
 	str	r2, [r3, #2052]
-	b	.L52
-.L54:
+	b	.L55
+.L57:
 	.align	2
-.L53:
-	.word	.LANCHOR6
+.L56:
+	.word	.LANCHOR0
 	.word	.LANCHOR7
 	.size	FlashReadDpDataOutCmd, .-FlashReadDpDataOutCmd
 	.section	.text.FlashProgFirstCmd,"ax",%progbits
@@ -320,7 +363,7 @@ FlashProgFirstCmd:
 	@ link register save eliminated.
 	push	{r4, r5}
 	lsrs	r2, r1, #16
-	ldr	r4, .L56
+	ldr	r4, .L59
 	ldr	r3, [r4, r0, lsl #3]
 	add	r4, r4, r0, lsl #3
 	ldrb	r4, [r4, #4]	@ zero_extendqisi2
@@ -337,10 +380,10 @@ FlashProgFirstCmd:
 	str	r2, [r3, #2052]
 	pop	{r4, r5}
 	b	FlashSetRandomizer
-.L57:
+.L60:
 	.align	2
-.L56:
-	.word	.LANCHOR6
+.L59:
+	.word	.LANCHOR0
 	.size	FlashProgFirstCmd, .-FlashProgFirstCmd
 	.section	.text.FlashEraseCmd,"ax",%progbits
 	.align	1
@@ -354,12 +397,12 @@ FlashEraseCmd:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
-	ldr	r4, .L63
+	ldr	r4, .L66
 	ldr	r3, [r4, r0, lsl #3]
 	add	r4, r4, r0, lsl #3
 	ldrb	r0, [r4, #4]	@ zero_extendqisi2
 	lsls	r0, r0, #8
-	cbz	r2, .L59
+	cbz	r2, .L62
 	adds	r2, r3, r0
 	movs	r4, #96
 	str	r4, [r2, #2056]
@@ -369,10 +412,10 @@ FlashEraseCmd:
 	str	r4, [r2, #2052]
 	lsrs	r4, r1, #16
 	str	r4, [r2, #2052]
-	ldr	r2, .L63+4
+	ldr	r2, .L66+4
 	ldr	r2, [r2]
 	add	r1, r1, r2
-.L59:
+.L62:
 	add	r3, r3, r0
 	movs	r2, #96
 	str	r2, [r3, #2056]
@@ -385,11 +428,11 @@ FlashEraseCmd:
 	str	r1, [r3, #2052]
 	str	r2, [r3, #2056]
 	pop	{r4, pc}
-.L64:
+.L67:
 	.align	2
-.L63:
-	.word	.LANCHOR6
-	.word	.LANCHOR3
+.L66:
+	.word	.LANCHOR0
+	.word	.LANCHOR4
 	.size	FlashEraseCmd, .-FlashEraseCmd
 	.section	.text.FlashProgDpSecondCmd,"ax",%progbits
 	.align	1
@@ -405,11 +448,11 @@ FlashProgDpSecondCmd:
 	@ link register save eliminated.
 	push	{r4, r5}
 	lsrs	r2, r1, #16
-	ldr	r4, .L66
+	ldr	r4, .L69
 	ldr	r3, [r4, r0, lsl #3]
 	add	r4, r4, r0, lsl #3
 	ldrb	r5, [r4, #4]	@ zero_extendqisi2
-	ldr	r4, .L66+4
+	ldr	r4, .L69+4
 	ldrb	r4, [r4, #11]	@ zero_extendqisi2
 	add	r3, r3, r5, lsl #8
 	str	r4, [r3, #2056]
@@ -423,10 +466,10 @@ FlashProgDpSecondCmd:
 	str	r2, [r3, #2052]
 	pop	{r4, r5}
 	b	FlashSetRandomizer
-.L67:
+.L70:
 	.align	2
-.L66:
-	.word	.LANCHOR6
+.L69:
+	.word	.LANCHOR0
 	.word	.LANCHOR7
 	.size	FlashProgDpSecondCmd, .-FlashProgDpSecondCmd
 	.section	.text.FlashProgSecondCmd,"ax",%progbits
@@ -441,7 +484,7 @@ FlashProgSecondCmd:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L69
+	ldr	r3, .L72
 	ldr	r2, [r3, r0, lsl #3]
 	add	r3, r3, r0, lsl #3
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
@@ -449,10 +492,10 @@ FlashProgSecondCmd:
 	movs	r2, #16
 	str	r2, [r3, #2056]
 	bx	lr
-.L70:
+.L73:
 	.align	2
-.L69:
-	.word	.LANCHOR6
+.L72:
+	.word	.LANCHOR0
 	.size	FlashProgSecondCmd, .-FlashProgSecondCmd
 	.section	.text.FlashProgDpFirstCmd,"ax",%progbits
 	.align	1
@@ -466,8 +509,8 @@ FlashProgDpFirstCmd:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L72
-	ldr	r1, .L72+4
+	ldr	r3, .L75
+	ldr	r1, .L75+4
 	ldr	r2, [r3, r0, lsl #3]
 	add	r3, r3, r0, lsl #3
 	ldrb	r1, [r1, #10]	@ zero_extendqisi2
@@ -475,10 +518,10 @@ FlashProgDpFirstCmd:
 	add	r3, r2, r3, lsl #8
 	str	r1, [r3, #2056]
 	bx	lr
-.L73:
+.L76:
 	.align	2
-.L72:
-	.word	.LANCHOR6
+.L75:
+	.word	.LANCHOR0
 	.word	.LANCHOR7
 	.size	FlashProgDpFirstCmd, .-FlashProgDpFirstCmd
 	.section	.text.FlashReadStatus,"ax",%progbits
@@ -494,7 +537,7 @@ FlashReadStatus:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r2, #112
-	ldr	r3, .L75
+	ldr	r3, .L78
 	ldr	r5, [r3, r0, lsl #3]
 	add	r3, r3, r0, lsl #3
 	movs	r0, #80
@@ -506,10 +549,10 @@ FlashReadStatus:
 	bl	udelay
 	ldr	r0, [r5, r4]
 	pop	{r3, r4, r5, pc}
-.L76:
+.L79:
 	.align	2
-.L75:
-	.word	.LANCHOR6
+.L78:
+	.word	.LANCHOR0
 	.size	FlashReadStatus, .-FlashReadStatus
 	.section	.text.js_hash,"ax",%progbits
 	.align	1
@@ -522,24 +565,24 @@ FlashReadStatus:
 js_hash:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L80
+	ldr	r3, .L83
 	add	r1, r1, r0
 	push	{r4, lr}
-.L78:
+.L81:
 	cmp	r0, r1
-	bne	.L79
+	bne	.L82
 	mov	r0, r3
 	pop	{r4, pc}
-.L79:
+.L82:
 	lsrs	r2, r3, #2
 	ldrb	r4, [r0], #1	@ zero_extendqisi2
 	add	r2, r2, r3, lsl #5
 	add	r2, r2, r4
 	eors	r3, r3, r2
-	b	.L78
-.L81:
+	b	.L81
+.L84:
 	.align	2
-.L80:
+.L83:
 	.word	1204201446
 	.size	js_hash, .-js_hash
 	.section	.text.FlashLoadIdbInfo,"ax",%progbits
@@ -584,49 +627,49 @@ ToshibaSetRRPara:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
 	add	r7, r1, r1, lsl #2
-	ldr	r10, .L92+12
+	ldr	r10, .L95+12
 	mov	r5, r0
 	mov	r6, r1
 	movs	r4, #0
-	ldr	r8, .L92+16
-.L85:
+	ldr	r8, .L95+16
+.L88:
 	ldrb	r3, [r10]	@ zero_extendqisi2
 	cmp	r4, r3
-	bcc	.L89
+	bcc	.L92
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L89:
+.L92:
 	movs	r3, #85
 	movs	r0, #200
 	str	r3, [r5, #8]
 	ldrsb	r3, [r4, r8]
 	str	r3, [r5, #4]
 	bl	udelay
-	ldr	r3, .L92
+	ldr	r3, .L95
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #34
-	bne	.L86
+	bne	.L89
 	adds	r3, r4, r7
 	add	r3, r3, r8
-.L91:
+.L94:
 	ldrsb	r3, [r3, #5]
-.L90:
+.L93:
 	str	r3, [r5]
 	adds	r4, r4, #1
-	b	.L85
-.L86:
+	b	.L88
+.L89:
 	cmp	r3, #35
-	bne	.L88
-	ldr	r3, .L92+4
+	bne	.L91
+	ldr	r3, .L95+4
 	adds	r2, r4, r7
 	add	r3, r3, r2
-	b	.L91
-.L88:
-	ldr	r3, .L92+8
+	b	.L94
+.L91:
+	ldr	r3, .L95+8
 	ldrsb	r3, [r3, r6]
-	b	.L90
-.L93:
+	b	.L93
+.L96:
 	.align	2
-.L92:
+.L95:
 	.word	.LANCHOR9
 	.word	.LANCHOR10
 	.word	.LANCHOR11
@@ -646,18 +689,18 @@ SamsungSetRRPara:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
 	mov	r6, r0
-	ldr	r7, .L97
+	ldr	r7, .L100
 	movs	r4, #0
 	mov	r10, #161
-	ldr	r8, .L97+4
+	ldr	r8, .L100+4
 	add	r1, r7, r1, lsl #2
 	adds	r5, r1, #3
-.L95:
+.L98:
 	ldrb	r3, [r8]	@ zero_extendqisi2
 	cmp	r4, r3
-	bcc	.L96
+	bcc	.L99
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L96:
+.L99:
 	movs	r3, #0
 	str	r10, [r6, #8]
 	str	r3, [r6]
@@ -668,10 +711,10 @@ SamsungSetRRPara:
 	ldrsb	r3, [r5, #1]!
 	str	r3, [r6]
 	bl	udelay
-	b	.L95
-.L98:
+	b	.L98
+.L101:
 	.align	2
-.L97:
+.L100:
 	.word	.LANCHOR13
 	.word	.LANCHOR12
 	.size	SamsungSetRRPara, .-SamsungSetRRPara
@@ -690,17 +733,17 @@ LogAddr2PhyAddr:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r6, r3
-	ldr	r3, .L104
+	ldr	r3, .L107
 	mov	r8, r1
 	mov	r7, r2
 	mov	r5, r0
 	ldrh	r4, [r3, #14]
 	ldrh	r3, [r3, #12]
 	smulbb	r4, r4, r3
-	ldr	r3, .L104+4
+	ldr	r3, .L107+4
 	ldrh	fp, [r3]
 	uxth	r4, r4
-	ldr	r3, .L104+8
+	ldr	r3, .L107+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #1
 	ldr	r3, [r0, #4]
@@ -723,14 +766,14 @@ LogAddr2PhyAddr:
 	cmp	r8, #1
 	uxth	r1, r1
 	ubfx	r3, r3, #0, #10
-	bne	.L101
-	ldr	r2, .L104+12
+	bne	.L104
+	ldr	r2, .L107+12
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbnz	r2, .L101
-	ldr	r2, .L104+16
+	cbnz	r2, .L104
+	ldr	r2, .L107+16
 	ldrh	r3, [r2, r3, lsl #1]
-.L101:
-	ldr	r2, .L104+20
+.L104:
+	ldr	r2, .L107+20
 	ldr	r2, [r2, r10, lsl #2]
 	mla	r1, fp, r1, r2
 	add	r1, r1, r3
@@ -738,26 +781,26 @@ LogAddr2PhyAddr:
 	str	r1, [r7]
 	str	r10, [r6]
 	cmp	r3, #1
-	bls	.L103
+	bls	.L106
 	ldr	r0, [r5, #4]
 	ldr	r3, [r5, #40]
 	add	r0, r0, #1024
 	subs	r3, r0, r3
 	rsbs	r0, r3, #0
 	adcs	r0, r0, r3
-.L102:
+.L105:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L103:
+.L106:
 	movs	r0, #0
-	b	.L102
-.L105:
+	b	.L105
+.L108:
 	.align	2
-.L104:
+.L107:
 	.word	.LANCHOR14
-	.word	.LANCHOR3
-	.word	.LANCHOR1
+	.word	.LANCHOR4
+	.word	.LANCHOR2
 	.word	.LANCHOR15
 	.word	.LANCHOR16
 	.word	.LANCHOR17
@@ -773,57 +816,57 @@ LogAddr2PhyAddr:
 FlashReadStatusEN:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L118
+	ldr	r3, .L121
 	push	{r4, r5, r6, lr}
 	ldr	r5, [r3, r0, lsl #3]
 	add	r3, r3, r0, lsl #3
 	ldrb	r4, [r3, #4]	@ zero_extendqisi2
-	ldr	r3, .L118+4
+	ldr	r3, .L121+4
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #8]	@ zero_extendqisi2
 	cmp	r3, #2
 	lsl	r3, r4, #8
 	add	r4, r4, #8
-	bne	.L107
-	ldr	r0, .L118+8
-	cbnz	r2, .L108
+	bne	.L110
+	ldr	r0, .L121+8
+	cbnz	r2, .L111
 	ldrb	r2, [r0, #13]	@ zero_extendqisi2
-.L117:
+.L120:
 	add	r3, r3, r5
 	str	r2, [r3, #2056]
 	ldrb	r0, [r0, #15]	@ zero_extendqisi2
-	cbz	r0, .L112
+	cbz	r0, .L115
 	add	r6, r5, r4, lsl #8
 	movs	r2, #0
-.L111:
+.L114:
 	cmp	r2, r0
-	bcc	.L113
-.L112:
+	bcc	.L116
+.L115:
 	lsls	r4, r4, #8
 	movs	r0, #80
 	bl	udelay
 	ldr	r0, [r5, r4]
 	uxtb	r0, r0
 	pop	{r4, r5, r6, pc}
-.L108:
+.L111:
 	ldrb	r2, [r0, #14]	@ zero_extendqisi2
-	b	.L117
-.L113:
+	b	.L120
+.L116:
 	lsls	r3, r2, #3
 	adds	r2, r2, #1
 	lsr	r3, r1, r3
 	uxtb	r3, r3
 	str	r3, [r6, #4]
-	b	.L111
-.L107:
+	b	.L114
+.L110:
 	add	r3, r3, r5
 	movs	r2, #112
 	str	r2, [r3, #2056]
-	b	.L112
-.L119:
+	b	.L115
+.L122:
 	.align	2
-.L118:
-	.word	.LANCHOR6
+.L121:
+	.word	.LANCHOR0
 	.word	.LANCHOR18
 	.word	.LANCHOR7
 	.size	FlashReadStatusEN, .-FlashReadStatusEN
@@ -842,16 +885,16 @@ FlashWaitReadyEN:
 	mov	r4, r0
 	mov	r5, r1
 	mov	r6, r2
-.L124:
+.L127:
 	mov	r2, r6
 	mov	r1, r5
 	mov	r0, r4
 	bl	FlashReadStatusEN
 	cmp	r0, #255
 	mov	r3, r0
-	beq	.L124
+	beq	.L127
 	lsls	r3, r3, #25
-	bpl	.L124
+	bpl	.L127
 	pop	{r4, r5, r6, pc}
 	.size	FlashWaitReadyEN, .-FlashWaitReadyEN
 	.section	.text.NandcReadDontCaseBusyEn,"ax",%progbits
@@ -880,17 +923,17 @@ NandcGetChipIf:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L129
+	ldr	r2, .L132
 	add	r3, r2, r0, lsl #3
 	ldr	r0, [r2, r0, lsl #3]
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	add	r0, r0, r3, lsl #8
 	bx	lr
-.L130:
+.L133:
 	.align	2
-.L129:
-	.word	.LANCHOR6
+.L132:
+	.word	.LANCHOR0
 	.size	NandcGetChipIf, .-NandcGetChipIf
 	.section	.text.NandcSetDdrPara,"ax",%progbits
 	.align	1
@@ -904,16 +947,16 @@ NandcSetDdrPara:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L132
+	ldr	r3, .L135
 	ldr	r2, [r3]
 	lsls	r3, r0, #8
 	orr	r0, r3, r0, lsl #16
 	orr	r0, r0, #1
 	str	r0, [r2, #304]
 	bx	lr
-.L133:
+.L136:
 	.align	2
-.L132:
+.L135:
 	.word	.LANCHOR19
 	.size	NandcSetDdrPara, .-NandcSetDdrPara
 	.section	.text.NandcSetDdrDiv,"ax",%progbits
@@ -928,14 +971,14 @@ NandcSetDdrDiv:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L135
+	ldr	r3, .L138
 	orr	r0, r0, #16640
 	ldr	r3, [r3]
 	str	r0, [r3, #344]
 	bx	lr
-.L136:
+.L139:
 	.align	2
-.L135:
+.L138:
 	.word	.LANCHOR19
 	.size	NandcSetDdrDiv, .-NandcSetDdrDiv
 	.section	.text.NandcSetDdrMode,"ax",%progbits
@@ -950,20 +993,20 @@ NandcSetDdrMode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L140
+	ldr	r3, .L143
 	ldr	r2, [r3]
 	ldr	r3, [r2]
-	cbnz	r0, .L138
+	cbnz	r0, .L141
 	bfi	r3, r0, #13, #1
-.L139:
+.L142:
 	str	r3, [r2]
 	bx	lr
-.L138:
-	orr	r3, r3, #253952
-	b	.L139
 .L141:
+	orr	r3, r3, #253952
+	b	.L142
+.L144:
 	.align	2
-.L140:
+.L143:
 	.word	.LANCHOR19
 	.size	NandcSetDdrMode, .-NandcSetDdrMode
 	.section	.text.NandcSetMode,"ax",%progbits
@@ -978,16 +1021,16 @@ NandcSetMode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L149
+	ldr	r3, .L152
 	ands	r1, r0, #6
 	ldr	r2, [r3]
 	ldr	r3, [r2]
-	beq	.L143
+	beq	.L146
 	lsls	r1, r0, #29
 	movw	r1, #16641
 	str	r1, [r2, #344]
 	orr	r3, r3, #24576
-	ldr	r1, .L149+4
+	ldr	r1, .L152+4
 	bfc	r3, #15, #1
 	orr	r3, r3, #196608
 	it	mi
@@ -997,16 +1040,16 @@ NandcSetMode:
 	str	r1, [r2, #308]
 	movs	r1, #39
 	str	r1, [r2, #308]
-.L145:
+.L148:
 	str	r3, [r2]
 	movs	r0, #0
 	bx	lr
-.L143:
+.L146:
 	bfi	r3, r1, #13, #1
-	b	.L145
-.L150:
+	b	.L148
+.L153:
 	.align	2
-.L149:
+.L152:
 	.word	.LANCHOR19
 	.word	1710595
 	.size	NandcSetMode, .-NandcSetMode
@@ -1022,7 +1065,7 @@ NandcFlashCs:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L152
+	ldr	r3, .L155
 	movs	r2, #1
 	ldr	r1, [r3, r0, lsl #3]
 	add	r0, r3, r0, lsl #3
@@ -1032,10 +1075,10 @@ NandcFlashCs:
 	bfi	r3, r2, #0, #8
 	str	r3, [r1]
 	bx	lr
-.L153:
+.L156:
 	.align	2
-.L152:
-	.word	.LANCHOR6
+.L155:
+	.word	.LANCHOR0
 	.size	NandcFlashCs, .-NandcFlashCs
 	.section	.text.NandcFlashDeCs,"ax",%progbits
 	.align	1
@@ -1049,17 +1092,17 @@ NandcFlashDeCs:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L155
+	ldr	r3, .L158
 	ldr	r2, [r3, r0, lsl #3]
 	ldr	r3, [r2]
 	bfc	r3, #0, #8
 	bfc	r3, #17, #1
 	str	r3, [r2]
 	bx	lr
-.L156:
+.L159:
 	.align	2
-.L155:
-	.word	.LANCHOR6
+.L158:
+	.word	.LANCHOR0
 	.size	NandcFlashDeCs, .-NandcFlashDeCs
 	.section	.text.HynixSetRRPara,"ax",%progbits
 	.align	1
@@ -1074,23 +1117,23 @@ HynixSetRRPara:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r6, r3
-	ldr	r3, .L166
+	ldr	r3, .L169
 	mov	r5, r0
 	mov	r7, r1
 	mov	r10, r2
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	cmp	r3, #6
-	bne	.L158
+	bne	.L161
 	movs	r4, #20
 	add	r4, r4, r0, lsl #6
 	add	r3, r4, r6, lsl #2
-.L164:
-	ldr	r4, .L166+4
-.L165:
+.L167:
+	ldr	r4, .L169+4
+.L168:
 	add	r4, r4, r3
-.L159:
-	ldr	r3, .L166+8
+.L162:
+	ldr	r3, .L169+8
 	mov	r0, r5
 	subs	r7, r7, #1
 	subs	r4, r4, #1
@@ -1105,42 +1148,42 @@ HynixSetRRPara:
 	str	r3, [r0, #2056]
 	add	r3, r10, #-1
 	mov	r10, r0
-.L162:
+.L165:
 	cmp	r3, r7
-	bne	.L163
+	bne	.L166
 	movs	r3, #22
 	add	r8, r8, fp
 	str	r3, [r8, #2056]
 	mov	r0, r5
 	bl	NandcFlashDeCs
-	ldr	r3, .L166+12
+	ldr	r3, .L169+12
 	strb	r6, [r3, r5]
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L158:
+.L161:
 	cmp	r3, #7
-	bne	.L160
+	bne	.L163
 	movs	r4, #28
 	movs	r3, #160
 	smlabb	r3, r3, r0, r4
 	movs	r4, #10
 	smlabb	r3, r4, r6, r3
-	b	.L164
-.L160:
+	b	.L167
+.L163:
 	cmp	r3, #8
-	bne	.L161
+	bne	.L164
 	add	r4, r6, r6, lsl #2
-	ldr	r3, .L166+16
-	b	.L165
-.L161:
+	ldr	r3, .L169+16
+	b	.L168
+.L164:
 	adds	r4, r6, #2
 	add	r3, r4, r0, lsl #3
-	ldr	r4, .L166+4
+	ldr	r4, .L169+4
 	add	r4, r4, r3, lsl #3
 	adds	r4, r4, #4
-	b	.L159
-.L163:
+	b	.L162
+.L166:
 	ldrb	r2, [r3, #1]!	@ zero_extendqisi2
 	movs	r0, #200
 	str	r2, [r10, #2052]
@@ -1149,13 +1192,13 @@ HynixSetRRPara:
 	ldrsb	r2, [r4, #1]!
 	ldr	r3, [sp, #4]
 	str	r2, [r10, #2048]
-	b	.L162
-.L167:
+	b	.L165
+.L170:
 	.align	2
-.L166:
+.L169:
 	.word	.LANCHOR18
 	.word	.LANCHOR20
-	.word	.LANCHOR6
+	.word	.LANCHOR0
 	.word	.LANCHOR21
 	.word	.LANCHOR20+28
 	.size	HynixSetRRPara, .-HynixSetRRPara
@@ -1170,35 +1213,35 @@ HynixSetRRPara:
 FlashSetReadRetryDefault:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L174
+	ldr	r3, .L177
 	push	{r4, r5, r6, lr}
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	cmp	r3, #7
-	bhi	.L168
-	ldr	r5, .L174+4
+	bhi	.L171
+	ldr	r5, .L177+4
 	movs	r4, #0
 	adds	r6, r5, #4
-.L171:
-	ldr	r3, .L174+8
+.L174:
+	ldr	r3, .L177+8
 	uxtb	r0, r4
 	ldrb	r3, [r3, r4, lsl #3]	@ zero_extendqisi2
 	cmp	r3, #173
-	bne	.L170
+	bne	.L173
 	movs	r3, #0
 	mov	r2, r6
 	ldrb	r1, [r5, #1]	@ zero_extendqisi2
 	bl	HynixSetRRPara
-.L170:
+.L173:
 	adds	r4, r4, #1
 	cmp	r4, #4
-	bne	.L171
-.L168:
+	bne	.L174
+.L171:
 	pop	{r4, r5, r6, pc}
-.L175:
+.L178:
 	.align	2
-.L174:
+.L177:
 	.word	.LANCHOR18
 	.word	.LANCHOR20
 	.word	.LANCHOR22
@@ -1214,17 +1257,17 @@ FlashSetReadRetryDefault:
 FlashWaitCmdDone:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L183
+	ldr	r2, .L186
 	lsls	r3, r0, #4
 	push	{r4, r5, r6, lr}
 	mov	r6, r0
 	adds	r4, r2, r3
 	ldr	r1, [r4, #8]
-	cbz	r1, .L178
+	cbz	r1, .L181
 	ldrb	r5, [r2, r3]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	NandcFlashCs
-	ldr	r3, .L183+4
+	ldr	r3, .L186+4
 	mov	r0, r5
 	ldr	r1, [r4, #4]
 	ldr	r2, [r3, r6, lsl #2]
@@ -1241,15 +1284,15 @@ FlashWaitCmdDone:
 	str	r1, [r3]
 	movs	r3, #0
 	str	r3, [r4, #8]
-	cbz	r2, .L178
+	cbz	r2, .L181
 	str	r1, [r2]
 	str	r3, [r4, #12]
-.L178:
+.L181:
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L184:
+.L187:
 	.align	2
-.L183:
+.L186:
 	.word	.LANCHOR23
 	.word	.LANCHOR17
 	.size	FlashWaitCmdDone, .-FlashWaitCmdDone
@@ -1280,32 +1323,32 @@ NandcDelayns:
 NandcWaitFlashReadyNoDelay:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L191
+	ldr	r3, .L194
 	push	{r0, r1, r2, r4, r5, lr}
-	ldr	r4, .L191+4
+	ldr	r4, .L194+4
 	ldr	r5, [r3, r0, lsl #3]
-.L188:
+.L191:
 	ldr	r3, [r5]
 	str	r3, [sp, #4]
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #22
-	bmi	.L189
+	bmi	.L192
 	movs	r0, #10
 	bl	udelay
 	subs	r4, r4, #1
-	bne	.L188
+	bne	.L191
 	mov	r0, #-1
-.L186:
+.L189:
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, pc}
-.L189:
-	movs	r0, #0
-	b	.L186
 .L192:
+	movs	r0, #0
+	b	.L189
+.L195:
 	.align	2
-.L191:
-	.word	.LANCHOR6
+.L194:
+	.word	.LANCHOR0
 	.word	100000
 	.size	NandcWaitFlashReadyNoDelay, .-NandcWaitFlashReadyNoDelay
 	.section	.text.NandcWaitFlashReady,"ax",%progbits
@@ -1320,33 +1363,33 @@ NandcWaitFlashReady:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r4, r5, lr}
-	ldr	r3, .L198
-	ldr	r4, .L198+4
+	ldr	r3, .L201
+	ldr	r4, .L201+4
 	ldr	r5, [r3, r0, lsl #3]
 	movs	r0, #150
 	bl	udelay
-.L195:
+.L198:
 	ldr	r3, [r5]
 	str	r3, [sp, #4]
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #22
-	bmi	.L196
+	bmi	.L199
 	movs	r0, #10
 	bl	udelay
 	subs	r4, r4, #1
-	bne	.L195
+	bne	.L198
 	mov	r0, #-1
-.L193:
+.L196:
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, pc}
-.L196:
-	movs	r0, #0
-	b	.L193
 .L199:
+	movs	r0, #0
+	b	.L196
+.L202:
 	.align	2
-.L198:
-	.word	.LANCHOR6
+.L201:
+	.word	.LANCHOR0
 	.word	100000
 	.size	NandcWaitFlashReady, .-NandcWaitFlashReady
 	.section	.text.FlashReset,"ax",%progbits
@@ -1360,7 +1403,7 @@ NandcWaitFlashReady:
 FlashReset:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L201
+	ldr	r3, .L204
 	push	{r4, r5, r6, lr}
 	mov	r4, r0
 	ldr	r5, [r3, r0, lsl #3]
@@ -1375,10 +1418,10 @@ FlashReset:
 	mov	r0, r4
 	pop	{r4, r5, r6, lr}
 	b	NandcFlashDeCs
-.L202:
+.L205:
 	.align	2
-.L201:
-	.word	.LANCHOR6
+.L204:
+	.word	.LANCHOR0
 	.size	FlashReset, .-FlashReset
 	.section	.text.flash_enter_slc_mode,"ax",%progbits
 	.align	1
@@ -1393,11 +1436,11 @@ flash_enter_slc_mode:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	mov	r5, r0
-	ldr	r3, .L205
+	ldr	r3, .L208
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L203
+	cbz	r3, .L206
 	bl	NandcFlashCs
-	ldr	r3, .L205+4
+	ldr	r3, .L208+4
 	movs	r0, #100
 	ldr	r4, [r3, r5, lsl #3]
 	add	r3, r3, r5, lsl #3
@@ -1423,13 +1466,13 @@ flash_enter_slc_mode:
 	str	r3, [r4, #2056]
 	pop	{r3, r4, r5, lr}
 	b	NandcWaitFlashReady
-.L203:
-	pop	{r3, r4, r5, pc}
 .L206:
+	pop	{r3, r4, r5, pc}
+.L209:
 	.align	2
-.L205:
+.L208:
 	.word	.LANCHOR15
-	.word	.LANCHOR6
+	.word	.LANCHOR0
 	.size	flash_enter_slc_mode, .-flash_enter_slc_mode
 	.section	.text.flash_exit_slc_mode,"ax",%progbits
 	.align	1
@@ -1444,11 +1487,11 @@ flash_exit_slc_mode:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	mov	r5, r0
-	ldr	r3, .L209
+	ldr	r3, .L212
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L207
+	cbz	r3, .L210
 	bl	NandcFlashCs
-	ldr	r3, .L209+4
+	ldr	r3, .L212+4
 	movs	r0, #100
 	ldr	r4, [r3, r5, lsl #3]
 	add	r3, r3, r5, lsl #3
@@ -1475,13 +1518,13 @@ flash_exit_slc_mode:
 	str	r3, [r4, #2056]
 	pop	{r3, r4, r5, lr}
 	b	NandcWaitFlashReady
-.L207:
-	pop	{r3, r4, r5, pc}
 .L210:
+	pop	{r3, r4, r5, pc}
+.L213:
 	.align	2
-.L209:
+.L212:
 	.word	.LANCHOR15
-	.word	.LANCHOR6
+	.word	.LANCHOR0
 	.size	flash_exit_slc_mode, .-flash_exit_slc_mode
 	.section	.text.FlashEraseBlock,"ax",%progbits
 	.align	1
@@ -1527,7 +1570,7 @@ FlashEraseBlock:
 FlashSetInterfaceMode:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L240
+	ldr	r3, .L243
 	mov	ip, #128
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r5, #0
@@ -1541,36 +1584,36 @@ FlashSetInterfaceMode:
 	str	r2, [sp, #4]
 	mov	r2, r5
 	str	r3, [sp]
-.L222:
-	ldr	r3, .L240+4
+.L225:
+	ldr	r3, .L243+4
 	ldrb	r4, [r5, r3]	@ zero_extendqisi2
 	cmp	r4, #152
-	beq	.L213
+	beq	.L216
 	cmp	r4, #69
-	beq	.L213
+	beq	.L216
 	cmp	r4, #173
-	beq	.L213
+	beq	.L216
 	cmp	r4, #44
-	bne	.L214
-.L213:
-	ldr	r3, .L240+8
+	bne	.L217
+.L216:
+	ldr	r3, .L243+8
 	cmp	r0, #1
 	ldr	r1, [r5, r3]
 	add	r3, r3, r5
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-	bne	.L215
+	bne	.L218
 	ldr	r6, [sp]
-	cbz	r6, .L214
+	cbz	r6, .L217
 	lsls	r3, r3, #8
 	cmp	r4, #173
 	add	fp, r1, r3
 	str	r7, [fp, #2056]
-	bne	.L216
+	bne	.L219
 	str	r0, [fp, #2052]
-.L239:
+.L242:
 	str	r2, [fp, #2048]
-	b	.L220
-.L216:
+	b	.L223
+.L219:
 	cmp	r4, #44
 	ittet	eq
 	moveq	r4, #5
@@ -1579,48 +1622,48 @@ FlashSetInterfaceMode:
 	streq	r4, [fp, #2048]
 	it	ne
 	strne	r0, [fp, #2048]
-.L220:
+.L223:
 	add	r3, r3, r1
 	str	r2, [r3, #2048]
 	str	r2, [r3, #2048]
 	str	r2, [r3, #2048]
-.L214:
+.L217:
 	adds	r5, r5, #8
 	cmp	r5, #32
-	bne	.L222
+	bne	.L225
 	movs	r0, #0
 	bl	NandcWaitFlashReady
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L215:
+.L218:
 	ldr	r6, [sp, #4]
 	cmp	r6, #0
-	beq	.L214
+	beq	.L217
 	lsls	r3, r3, #8
 	cmp	r4, #173
 	add	fp, r1, r3
 	str	r7, [fp, #2056]
-	bne	.L219
+	bne	.L222
 	str	lr, [fp, #2052]
 	str	r10, [fp, #2048]
-	b	.L220
-.L219:
+	b	.L223
+.L222:
 	cmp	r4, #44
-	bne	.L221
+	bne	.L224
 	str	lr, [fp, #2052]
 	str	r8, [fp, #2048]
-	b	.L220
-.L221:
+	b	.L223
+.L224:
 	str	ip, [fp, #2052]
-	b	.L239
-.L241:
+	b	.L242
+.L244:
 	.align	2
-.L240:
+.L243:
 	.word	.LANCHOR24
 	.word	.LANCHOR22
-	.word	.LANCHOR6
+	.word	.LANCHOR0
 	.size	FlashSetInterfaceMode, .-FlashSetInterfaceMode
 	.section	.text.SandiskSetRRPara,"ax",%progbits
 	.align	1
@@ -1642,21 +1685,21 @@ SandiskSetRRPara:
 	str	r3, [r0, #4]
 	movs	r0, #200
 	bl	udelay
-	ldr	r3, .L248
+	ldr	r3, .L251
 	add	r4, r4, r4, lsl #2
-	ldr	r6, .L248+4
+	ldr	r6, .L251+4
 	movs	r2, #0
-	ldr	r7, .L248+8
+	ldr	r7, .L251+8
 	ldrb	r1, [r3]	@ zero_extendqisi2
-	ldr	r3, .L248+12
+	ldr	r3, .L251+12
 	ldrb	r0, [r3]	@ zero_extendqisi2
-.L243:
+.L246:
 	cmp	r2, r1
-	bcc	.L246
+	bcc	.L249
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, lr}
 	b	NandcWaitFlashReady
-.L246:
+.L249:
 	adds	r3, r2, r4
 	cmp	r0, #67
 	ite	eq
@@ -1665,10 +1708,10 @@ SandiskSetRRPara:
 	ldrsb	r3, [r3, #5]
 	adds	r2, r2, #1
 	str	r3, [r5]
-	b	.L243
-.L249:
+	b	.L246
+.L252:
 	.align	2
-.L248:
+.L251:
 	.word	.LANCHOR12
 	.word	.LANCHOR10
 	.word	.LANCHOR8
@@ -1689,7 +1732,7 @@ micron_auto_read_calibration_config:
 	mov	r5, r0
 	mov	r6, r1
 	bl	NandcWaitFlashReady
-	ldr	r0, .L251
+	ldr	r0, .L254
 	ldr	r4, [r0, r5, lsl #3]
 	add	r0, r0, r5, lsl #3
 	ldrb	r3, [r0, #4]	@ zero_extendqisi2
@@ -1706,10 +1749,10 @@ micron_auto_read_calibration_config:
 	str	r3, [r4, #2048]
 	str	r3, [r4, #2048]
 	pop	{r4, r5, r6, pc}
-.L252:
+.L255:
 	.align	2
-.L251:
-	.word	.LANCHOR6
+.L254:
+	.word	.LANCHOR0
 	.size	micron_auto_read_calibration_config, .-micron_auto_read_calibration_config
 	.section	.text.FlashEraseSLc2KBlocks,"ax",%progbits
 	.align	1
@@ -1724,19 +1767,19 @@ FlashEraseSLc2KBlocks:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, lr}
 	mov	r7, r1
-	ldr	r8, .L263+12
+	ldr	r8, .L266+12
 	sub	sp, sp, #20
 	mov	r5, r0
 	movs	r6, #0
-	ldr	r10, .L263+16
-.L254:
+	ldr	r10, .L266+16
+.L257:
 	cmp	r6, r7
-	bne	.L259
+	bne	.L262
 	movs	r0, #0
 	add	sp, sp, #20
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L259:
+.L262:
 	subs	r3, r7, r6
 	add	r2, sp, #8
 	uxtb	r3, r3
@@ -1748,17 +1791,17 @@ FlashEraseSLc2KBlocks:
 	ldr	r3, [sp, #12]
 	ldrb	r2, [r8]	@ zero_extendqisi2
 	cmp	r2, r3
-	bhi	.L255
+	bhi	.L258
 	mov	r3, #-1
 	str	r3, [r5]
-.L256:
+.L259:
 	adds	r6, r6, #1
 	adds	r5, r5, #36
-	b	.L254
-.L255:
+	b	.L257
+.L258:
 	ldrb	r4, [r10, r3]	@ zero_extendqisi2
 	lsls	r3, r3, #4
-	ldr	r2, .L263
+	ldr	r2, .L266
 	mov	r0, r4
 	strb	r4, [r2, r3]
 	bl	NandcWaitFlashReady
@@ -1773,7 +1816,7 @@ FlashEraseSLc2KBlocks:
 	ldr	r1, [sp, #8]
 	mov	r0, r4
 	bl	FlashReadStatus
-	ldr	r3, .L263+4
+	ldr	r3, .L266+4
 	sbfx	r0, r0, #0, #1
 	str	r0, [r5]
 	movs	r2, #0
@@ -1793,19 +1836,19 @@ FlashEraseSLc2KBlocks:
 	strmi	r3, [r5]
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	bne	.L258
+	bne	.L261
 	ldr	r1, [sp, #8]
-	ldr	r0, .L263+8
+	ldr	r0, .L266+8
 	bl	printf
-.L258:
+.L261:
 	mov	r0, r4
 	bl	NandcFlashDeCs
-	b	.L256
-.L264:
+	b	.L259
+.L267:
 	.align	2
-.L263:
+.L266:
 	.word	.LANCHOR23
-	.word	.LANCHOR3
+	.word	.LANCHOR4
 	.word	.LC1
 	.word	.LANCHOR25
 	.word	.LANCHOR26
@@ -1821,41 +1864,41 @@ FlashEraseSLc2KBlocks:
 FlashEraseBlocks:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L296
+	ldr	r3, .L299
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r8, r0
 	sub	sp, sp, #24
 	mov	fp, r1
 	mov	r7, r2
 	ldrb	r4, [r3]	@ zero_extendqisi2
-	cbnz	r4, .L266
-	ldr	r10, .L296+8
-.L267:
+	cbnz	r4, .L269
+	ldr	r10, .L299+8
+.L270:
 	cmp	r4, r7
-	bcc	.L276
-	ldr	r5, .L296+4
+	bcc	.L279
+	ldr	r5, .L299+4
 	movs	r4, #0
-	ldr	r6, .L296+8
-.L277:
-	ldr	r3, .L296+12
+	ldr	r6, .L299+8
+.L280:
+	ldr	r3, .L299+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r4, r3
-	bcc	.L279
-	ldr	r3, .L296+16
+	bcc	.L282
+	ldr	r3, .L299+16
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L280
-.L281:
+	bne	.L283
+.L284:
 	movs	r0, #0
-	b	.L265
-.L266:
+	b	.L268
+.L269:
 	mov	r1, r2
 	bl	FlashEraseSLc2KBlocks
-.L265:
+.L268:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L276:
+.L279:
 	movs	r5, #36
 	add	r2, sp, #16
 	muls	r5, r4, r5
@@ -1868,29 +1911,29 @@ FlashEraseBlocks:
 	str	r3, [sp]
 	add	r3, sp, #20
 	bl	LogAddr2PhyAddr
-	ldr	r3, .L296+12
+	ldr	r3, .L299+12
 	mov	r6, r0
 	ldr	r0, [sp, #20]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r0
-	bhi	.L269
+	bhi	.L272
 	mov	r3, #-1
 	str	r3, [r8, r5]
-.L270:
+.L273:
 	adds	r4, r4, #1
-	b	.L267
-.L269:
-	ldr	r3, .L296+20
+	b	.L270
+.L272:
+	ldr	r3, .L299+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
 	add	r3, r10, r0, lsl #4
 	it	eq
 	moveq	r6, #0
 	ldr	r3, [r3, #8]
-	cbz	r3, .L272
+	cbz	r3, .L275
 	uxtb	r0, r0
 	bl	FlashWaitCmdDone
-.L272:
+.L275:
 	ldr	r1, [sp, #20]
 	ldr	r0, [sp, #12]
 	lsls	r2, r1, #4
@@ -1900,25 +1943,25 @@ FlashEraseBlocks:
 	str	r0, [r3, #12]
 	ldr	r0, [sp, #16]
 	str	r0, [r3, #4]
-	cbz	r6, .L273
+	cbz	r6, .L276
 	adds	r5, r5, #36
 	add	r5, r5, r8
 	str	r5, [r3, #12]
-.L273:
-	ldr	r3, .L296+24
+.L276:
+	ldr	r3, .L299+24
 	ldrb	r5, [r3, r1]	@ zero_extendqisi2
 	mov	r0, r5
 	strb	r5, [r10, r2]
 	bl	NandcFlashCs
 	cmp	fp, #1
 	mov	r0, r5
-	bne	.L274
-	ldr	r3, .L296+4
+	bne	.L277
+	ldr	r3, .L299+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L274
+	cbz	r3, .L277
 	bl	flash_enter_slc_mode
-.L275:
-	ldr	r3, .L296+28
+.L278:
+	ldr	r3, .L299+28
 	mov	r0, r5
 	ldr	r2, [sp, #20]
 	add	r4, r4, r6
@@ -1934,42 +1977,42 @@ FlashEraseBlocks:
 	bl	FlashEraseCmd
 	mov	r0, r5
 	bl	NandcFlashDeCs
-	b	.L270
-.L274:
+	b	.L273
+.L277:
 	bl	flash_exit_slc_mode
-	b	.L275
-.L279:
+	b	.L278
+.L282:
 	uxtb	r0, r4
 	bl	FlashWaitCmdDone
 	cmp	fp, #1
-	bne	.L278
+	bne	.L281
 	ldrb	r3, [r5]	@ zero_extendqisi2
-	cbz	r3, .L278
+	cbz	r3, .L281
 	lsls	r3, r4, #4
 	ldrb	r0, [r6, r3]	@ zero_extendqisi2
 	bl	flash_exit_slc_mode
-.L278:
+.L281:
 	adds	r4, r4, #1
-	b	.L277
-.L280:
-	ldr	r3, .L296+32
+	b	.L280
+.L283:
+	ldr	r3, .L299+32
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #69
-	bne	.L281
+	bne	.L284
 	movs	r3, #0
 	movs	r2, #36
 	mov	r1, r3
-.L282:
+.L285:
 	cmp	r3, r7
-	beq	.L281
+	beq	.L284
 	mul	r0, r2, r3
 	adds	r3, r3, #1
 	str	r1, [r8, r0]
-	b	.L282
-.L297:
+	b	.L285
+.L300:
 	.align	2
-.L296:
-	.word	.LANCHOR1
+.L299:
+	.word	.LANCHOR2
 	.word	.LANCHOR15
 	.word	.LANCHOR23
 	.word	.LANCHOR25
@@ -1992,7 +2035,7 @@ FlashReadDpCmd:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
 	mov	r5, r2
-	ldr	r3, .L302
+	ldr	r3, .L305
 	mov	r6, r1
 	uxtb	lr, r1
 	mov	r7, r0
@@ -2001,7 +2044,7 @@ FlashReadDpCmd:
 	ldr	r10, [r3, r0, lsl #3]
 	add	r3, r3, r0, lsl #3
 	ldrb	r4, [r3, #4]	@ zero_extendqisi2
-	ldr	r3, .L302+4
+	ldr	r3, .L305+4
 	ldrb	r2, [r3, #16]	@ zero_extendqisi2
 	lsls	r4, r4, #8
 	ldrb	ip, [r3, #8]	@ zero_extendqisi2
@@ -2010,7 +2053,7 @@ FlashReadDpCmd:
 	cmp	r2, #1
 	lsr	r2, r6, #16
 	str	ip, [r4, #2056]
-	bne	.L299
+	bne	.L302
 	mov	r10, #0
 	str	r10, [r4, #2052]
 	str	r10, [r4, #2052]
@@ -2022,7 +2065,7 @@ FlashReadDpCmd:
 	str	r10, [r4, #2056]
 	str	r10, [r4, #2052]
 	str	r10, [r4, #2052]
-.L301:
+.L304:
 	lsrs	r3, r5, #8
 	lsrs	r5, r5, #16
 	str	r8, [r4, #2052]
@@ -2034,16 +2077,16 @@ FlashReadDpCmd:
 	mov	r0, r7
 	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
 	b	FlashSetRandomizer
-.L299:
+.L302:
 	str	lr, [r4, #2052]
 	str	r1, [r4, #2052]
 	str	r2, [r4, #2052]
 	str	r3, [r4, #2056]
-	b	.L301
-.L303:
+	b	.L304
+.L306:
 	.align	2
-.L302:
-	.word	.LANCHOR6
+.L305:
+	.word	.LANCHOR0
 	.word	.LANCHOR7
 	.size	FlashReadDpCmd, .-FlashReadDpCmd
 	.section	.text.FlashDeInit,"ax",%progbits
@@ -2061,41 +2104,41 @@ FlashDeInit:
 	movs	r0, #0
 	bl	NandcWaitFlashReady
 	bl	FlashSetReadRetryDefault
-	ldr	r3, .L314
+	ldr	r3, .L317
 	ldr	r0, [r3]
-	cbz	r0, .L305
+	cbz	r0, .L308
 	movs	r0, #0
 	bl	flash_enter_slc_mode
-.L306:
-	ldr	r4, .L314+4
+.L309:
+	ldr	r4, .L317+4
 	ldrb	r3, [r4]	@ zero_extendqisi2
-	cbz	r3, .L307
-	ldr	r3, .L314+8
+	cbz	r3, .L310
+	ldr	r3, .L317+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	lsls	r3, r3, #31
-	bpl	.L307
+	bpl	.L310
 	movs	r0, #1
 	bl	FlashSetInterfaceMode
 	movs	r0, #1
 	bl	NandcSetMode
 	movs	r3, #0
 	strb	r3, [r4]
-.L307:
-	ldr	r3, .L314+12
+.L310:
+	ldr	r3, .L317+12
 	movs	r0, #0
 	ldr	r3, [r3]
 	str	r0, [r3, #336]
 	pop	{r4, pc}
-.L305:
+.L308:
 	bl	flash_exit_slc_mode
-	b	.L306
-.L315:
+	b	.L309
+.L318:
 	.align	2
-.L314:
+.L317:
 	.word	.LANCHOR29
 	.word	.LANCHOR30
 	.word	.LANCHOR24
-	.word	.LANCHOR6
+	.word	.LANCHOR0
 	.size	FlashDeInit, .-FlashDeInit
 	.section	.text.NandcRandmzSel,"ax",%progbits
 	.align	1
@@ -2109,14 +2152,14 @@ NandcRandmzSel:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L317
+	ldr	r3, .L320
 	ldr	r3, [r3, r0, lsl #3]
 	str	r1, [r3, #336]
 	bx	lr
-.L318:
+.L321:
 	.align	2
-.L317:
-	.word	.LANCHOR6
+.L320:
+	.word	.LANCHOR0
 	.size	NandcRandmzSel, .-NandcRandmzSel
 	.section	.text.NandcTimeCfg,"ax",%progbits
 	.align	1
@@ -2130,23 +2173,23 @@ NandcTimeCfg:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L324
+	ldr	r3, .L327
 	cmp	r0, #35
 	ldr	r3, [r3]
-	bhi	.L320
+	bhi	.L323
 	movw	r2, #4193
-.L323:
+.L326:
 	str	r2, [r3, #4]
 	bx	lr
-.L320:
+.L323:
 	cmp	r0, #99
 	ite	hi
 	movwhi	r2, #8322
 	movwls	r2, #4225
-	b	.L323
-.L325:
+	b	.L326
+.L328:
 	.align	2
-.L324:
+.L327:
 	.word	.LANCHOR19
 	.size	NandcTimeCfg, .-NandcTimeCfg
 	.section	.text.FlashTimingCfg,"ax",%progbits
@@ -2161,12 +2204,12 @@ FlashTimingCfg:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L327
+	ldr	r3, .L330
 	ldrb	r0, [r3, #21]	@ zero_extendqisi2
 	b	NandcTimeCfg
-.L328:
+.L331:
 	.align	2
-.L327:
+.L330:
 	.word	.LANCHOR31
 	.size	FlashTimingCfg, .-FlashTimingCfg
 	.section	.text.NandcBchSel,"ax",%progbits
@@ -2180,7 +2223,7 @@ FlashTimingCfg:
 NandcBchSel:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L337
+	ldr	r3, .L340
 	movs	r1, #0
 	push	{r4, lr}
 	movs	r4, #16
@@ -2188,32 +2231,32 @@ NandcBchSel:
 	ldr	r2, [r3]
 	mov	r3, #1
 	str	r3, [r2, #8]
-	ldr	r3, .L337+4
+	ldr	r3, .L340+4
 	str	r0, [r3]
 	mov	r3, r1
 	bfi	r3, r4, #8, #8
 	bfi	r3, r1, #18, #1
-	bne	.L330
-.L333:
+	bne	.L333
+.L336:
 	bfc	r3, #4, #1
-.L331:
+.L334:
 	orr	r3, r3, #1
 	str	r3, [r2, #12]
 	pop	{r4, pc}
-.L330:
+.L333:
 	cmp	r0, #24
-	bne	.L332
+	bne	.L335
 	orr	r3, r3, #16
-	b	.L331
-.L332:
+	b	.L334
+.L335:
 	cmp	r0, #40
 	orr	r3, r3, #262144
 	orr	r3, r3, #16
-	bne	.L331
-	b	.L333
-.L338:
+	bne	.L334
+	b	.L336
+.L341:
 	.align	2
-.L337:
+.L340:
 	.word	.LANCHOR19
 	.word	.LANCHOR32
 	.size	NandcBchSel, .-NandcBchSel
@@ -2229,12 +2272,12 @@ FlashBchSel:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L340
+	ldr	r3, .L343
 	strb	r0, [r3]
 	b	NandcBchSel
-.L341:
+.L344:
 	.align	2
-.L340:
+.L343:
 	.word	.LANCHOR33
 	.size	FlashBchSel, .-FlashBchSel
 	.section	.text.NandCIrqEnable,"ax",%progbits
@@ -2336,7 +2379,7 @@ NandcSendDumpDataStart:
 	@ link register save eliminated.
 	ldr	r2, [r0, #16]
 	sub	sp, sp, #8
-	ldr	r3, .L349
+	ldr	r3, .L352
 	str	r2, [sp, #4]
 	ldr	r2, [sp, #4]
 	bfc	r2, #2, #1
@@ -2349,9 +2392,9 @@ NandcSendDumpDataStart:
 	add	sp, sp, #8
 	@ sp needed
 	bx	lr
-.L350:
+.L353:
 	.align	2
-.L349:
+.L352:
 	.word	538969130
 	.size	NandcSendDumpDataStart, .-NandcSendDumpDataStart
 	.section	.text.NandcSendDumpDataDone,"ax",%progbits
@@ -2367,12 +2410,12 @@ NandcSendDumpDataDone:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	sub	sp, sp, #8
-.L352:
+.L355:
 	ldr	r3, [r0, #8]
 	str	r3, [sp, #4]
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #11
-	bpl	.L352
+	bpl	.L355
 	add	sp, sp, #8
 	@ sp needed
 	bx	lr
@@ -2395,12 +2438,12 @@ NandcXferStart:
 	str	r2, [sp, #4]
 	ldr	fp, [sp, #56]
 	cmp	r1, #0
-	bne	.L369
+	bne	.L372
 	adds	r5, fp, #0
 	it	ne
 	movne	r5, #1
-.L356:
-	ldr	r1, .L374
+.L359:
+	ldr	r1, .L377
 	movs	r4, #0
 	ldr	r6, [r1, r0, lsl #3]
 	add	r1, r1, r0, lsl #3
@@ -2418,29 +2461,29 @@ NandcXferStart:
 	orr	r4, r4, #536870912
 	orr	r4, r4, #1024
 	bfi	r4, r3, #4, #1
-	ldr	r3, .L374+4
+	ldr	r3, .L377+4
 	ldr	r3, [r3]
 	cmp	r3, #3
-	bls	.L357
+	bls	.L360
 	ldr	r3, [r6, #16]
 	str	r3, [sp, #20]
 	ldr	r3, [sp, #20]
 	bfc	r3, #2, #1
 	str	r3, [sp, #20]
 	cmp	r5, #0
-	beq	.L358
-	ldr	r5, .L374+8
+	beq	.L361
+	ldr	r5, .L377+8
 	cmp	r7, #0
-	bne	.L359
-.L367:
+	bne	.L362
+.L370:
 	ldr	r2, [sp, #4]
 	adds	r2, r2, #1
 	asrs	r2, r2, #1
 	bfi	r4, r2, #22, #6
 	cmp	fp, #0
-	beq	.L360
+	beq	.L363
 	mov	r0, fp
-.L361:
+.L364:
 	ldr	r3, [r5, #4]
 	add	r1, r0, #63
 	ubfx	r10, r4, #22, #5
@@ -2491,10 +2534,10 @@ NandcXferStart:
 	ldr	r3, [sp, #20]
 	orr	r3, r3, #1
 	str	r3, [sp, #20]
-.L358:
+.L361:
 	ldr	r3, [sp, #20]
 	str	r3, [r6, #16]
-.L357:
+.L360:
 	str	r8, [r6, #12]
 	str	r4, [r6, #8]
 	orr	r4, r4, #4
@@ -2502,11 +2545,11 @@ NandcXferStart:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L369:
+.L372:
 	movs	r5, #1
-	b	.L356
-.L359:
-	ldr	r3, .L374+12
+	b	.L359
+.L362:
+	ldr	r3, .L377+12
 	movs	r1, #0
 	ldr	lr, [r5, #4]
 	mov	r0, r1
@@ -2520,35 +2563,35 @@ NandcXferStart:
 	lsrs	r3, r3, #1
 	str	r3, [sp, #12]
 	ldr	r3, [sp, #60]
-.L363:
+.L366:
 	ldr	r2, [sp, #12]
 	cmp	r0, r2
-	bcs	.L367
+	bcs	.L370
 	ldr	r2, [sp, #60]
 	bic	r10, r1, #3
-	cbz	r2, .L364
+	cbz	r2, .L367
 	ldrh	ip, [r3]
 	adds	r3, r3, #4
 	ldrh	r2, [r3, #-2]
 	orr	ip, ip, r2, lsl #16
 	str	ip, [lr, r10]
-.L365:
+.L368:
 	ldr	r2, [sp, #8]
 	adds	r0, r0, #1
 	add	r1, r1, r2
-	b	.L363
-.L364:
+	b	.L366
+.L367:
 	mov	r2, #-1
 	str	r2, [lr, r10]
-	b	.L365
-.L360:
-	ldr	r3, .L374+8
+	b	.L368
+.L363:
+	ldr	r3, .L377+8
 	ldr	r0, [r3]
-	b	.L361
-.L375:
+	b	.L364
+.L378:
 	.align	2
-.L374:
-	.word	.LANCHOR6
+.L377:
+	.word	.LANCHOR0
 	.word	.LANCHOR34
 	.word	.LANCHOR35
 	.word	.LANCHOR32
@@ -2564,76 +2607,76 @@ NandcXferStart:
 NandcXferComp:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L404
+	ldr	r3, .L407
 	push	{r0, r1, r4, lr}
 	ldr	r1, [r3, r0, lsl #3]
-	ldr	r3, .L404+4
+	ldr	r3, .L407+4
 	ldr	r0, [r3]
 	cmp	r0, #3
-	bls	.L397
+	bls	.L400
 	ldr	r3, [r1, #16]
 	lsls	r2, r3, #29
-	bpl	.L397
+	bpl	.L400
 	ldr	r3, [r1, #16]
 	tst	r3, #2
 	ldr	r3, [r1, #8]
 	str	r3, [sp]
-	beq	.L384
-.L380:
+	beq	.L387
+.L383:
 	ldr	r2, [r1, #28]
 	ldr	r3, [sp]
 	ubfx	r2, r2, #16, #5
 	ubfx	r3, r3, #22, #6
 	cmp	r2, r3
-	bge	.L381
+	bge	.L384
 	cmp	r0, #5
-	bls	.L380
+	bls	.L383
 	ldr	r3, [r1]
 	str	r3, [sp, #4]
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #18
-	bpl	.L380
+	bpl	.L383
 	ldr	r3, [sp, #4]
 	lsls	r4, r3, #14
-	bpl	.L380
-.L381:
-	ldr	r3, .L404+8
+	bpl	.L383
+.L384:
+	ldr	r3, .L407+8
 	movs	r2, #0
 	str	r2, [r3, #24]
-.L376:
+.L379:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, pc}
-.L385:
+.L388:
 	ldr	r3, [r1, #8]
 	str	r3, [sp]
-.L384:
+.L387:
 	ldr	r3, [sp]
 	lsls	r2, r3, #11
-	bpl	.L385
-	ldr	r4, .L404+12
+	bpl	.L388
+	ldr	r4, .L407+12
 	ldr	r2, [r4]
-	cbz	r2, .L386
+	cbz	r2, .L389
 	mov	r0, r1
 	bl	NandcSendDumpDataStart
-.L386:
+.L389:
 	ldr	r3, [r4]
 	cmp	r3, #0
-	beq	.L381
+	beq	.L384
 	mov	r0, r1
 	bl	NandcSendDumpDataDone
-	b	.L381
-.L397:
+	b	.L384
+.L400:
 	ldr	r3, [r1, #8]
 	str	r3, [sp]
 	ldr	r3, [sp]
 	lsls	r3, r3, #11
-	bpl	.L397
-	b	.L376
-.L405:
+	bpl	.L400
+	b	.L379
+.L408:
 	.align	2
-.L404:
-	.word	.LANCHOR6
+.L407:
+	.word	.LANCHOR0
 	.word	.LANCHOR34
 	.word	.LANCHOR35
 	.word	.LANCHOR36
@@ -2652,17 +2695,17 @@ Ftl_log2:
 	@ link register save eliminated.
 	movs	r1, #0
 	movs	r2, #1
-.L407:
+.L410:
 	cmp	r2, r0
 	uxth	r3, r1
 	add	r1, r1, #1
-	bls	.L408
+	bls	.L411
 	subs	r0, r3, #1
 	uxth	r0, r0
 	bx	lr
-.L408:
+.L411:
 	lsls	r2, r2, #1
-	b	.L407
+	b	.L410
 	.size	Ftl_log2, .-Ftl_log2
 	.section	.text.FtlPrintInfo,"ax",%progbits
 	.align	1
@@ -2690,31 +2733,31 @@ FtlSysBlkNumInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L411
+	ldr	r3, .L414
 	cmp	r0, #24
 	it	cc
 	movcc	r0, #24
-	ldr	r2, .L411+4
+	ldr	r2, .L414+4
 	str	r0, [r3]
-	ldr	r3, .L411+8
+	ldr	r3, .L414+8
 	ldrh	r3, [r3]
 	muls	r3, r0, r3
 	str	r3, [r2]
-	ldr	r2, .L411+12
+	ldr	r2, .L414+12
 	ldrh	r2, [r2]
 	subs	r0, r2, r0
-	ldr	r2, .L411+16
+	ldr	r2, .L414+16
 	strh	r0, [r2]	@ movhi
 	movs	r0, #0
-	ldr	r2, .L411+20
+	ldr	r2, .L414+20
 	ldr	r2, [r2]
 	subs	r3, r2, r3
-	ldr	r2, .L411+24
+	ldr	r2, .L414+24
 	str	r3, [r2]
 	bx	lr
-.L412:
+.L415:
 	.align	2
-.L411:
+.L414:
 	.word	.LANCHOR37
 	.word	.LANCHOR39
 	.word	.LANCHOR38
@@ -2739,30 +2782,30 @@ FtlConstantsInit:
 	mov	r10, r0
 	ldrh	r7, [r0, #8]
 	sub	sp, sp, #24
-	ldr	r3, .L440
+	ldr	r3, .L443
 	ldrh	r2, [r0, #10]
 	ldrh	r6, [r0, #14]
 	strh	r7, [r3]	@ movhi
 	ldrh	r3, [r0, #12]
-	ldr	r0, .L440+4
-	ldr	r1, .L440+8
-	ldr	r4, .L440+12
+	ldr	r0, .L443+4
+	ldr	r1, .L443+8
+	ldr	r4, .L443+12
 	strh	r6, [r0]	@ movhi
 	str	r0, [sp, #20]
-	ldr	r0, .L440+16
+	ldr	r0, .L443+16
 	strh	r3, [r1]	@ movhi
 	movs	r1, #0
 	strh	r2, [r4]	@ movhi
 	str	r4, [sp, #8]
-.L414:
+.L417:
 	strb	r1, [r1, r0]
 	adds	r1, r1, #1
 	cmp	r1, #32
-	bne	.L414
+	bne	.L417
 	ldrh	r0, [r10, #14]
 	ldrh	r1, [r10, #20]
 	cmp	r1, r0, lsr #8
-	bcs	.L415
+	bcs	.L418
 	uxtb	r8, r3
 	lsl	r1, r8, #1
 	uxtb	r1, r1
@@ -2771,22 +2814,22 @@ FtlConstantsInit:
 	muls	r1, r3, r1
 	str	r1, [sp, #12]
 	movs	r1, #0
-.L416:
+.L419:
 	cmp	r1, r3
-	bcs	.L418
+	bcs	.L421
 	ldr	r4, [sp, #12]
 	sub	fp, r1, r3
 	uxtb	r0, r1
 	adds	r5, r1, r4
-	ldr	r4, .L440+16
+	ldr	r4, .L443+16
 	add	r4, r4, r5
 	movs	r5, #0
 	mov	lr, r4
-	ldr	r4, .L440+16
+	ldr	r4, .L443+16
 	mov	ip, r5
 	add	fp, fp, r4
-	b	.L419
-.L417:
+	b	.L422
+.L420:
 	add	r4, r8, r0
 	strb	r0, [fp, r5]
 	str	r4, [sp, #16]
@@ -2796,47 +2839,47 @@ FtlConstantsInit:
 	ldr	r4, [sp, #4]
 	add	r0, r0, r4
 	uxtb	r0, r0
-.L419:
+.L422:
 	cmp	ip, r2
 	add	r5, r5, r3
-	bcc	.L417
+	bcc	.L420
 	adds	r1, r1, #1
-	b	.L416
-.L418:
+	b	.L419
+.L421:
 	ldr	r1, [sp, #8]
 	lsls	r2, r2, #1
 	lsrs	r6, r6, #1
 	strh	r2, [r1]	@ movhi
-	ldr	r2, .L440+4
+	ldr	r2, .L443+4
 	strh	r6, [r2]	@ movhi
-.L415:
-	ldr	r1, .L440+20
+.L418:
+	ldr	r1, .L443+20
 	movs	r2, #5
 	cmp	r7, #1
 	mov	r0, #0
 	strh	r2, [r1]	@ movhi
-	ldr	r2, .L440+24
+	ldr	r2, .L443+24
 	it	eq
 	strheq	r7, [r1]	@ movhi
-	ldr	r1, .L440+28
+	ldr	r1, .L443+28
 	strh	r0, [r2]	@ movhi
 	mov	r0, #4352
 	strh	r0, [r1]	@ movhi
-	ldr	r0, .L440+32
+	ldr	r0, .L443+32
 	ldrb	r0, [r0]	@ zero_extendqisi2
 	str	r0, [sp, #4]
-	cbz	r0, .L421
+	cbz	r0, .L424
 	mov	r0, #384
 	strh	r0, [r1]	@ movhi
-.L421:
+.L424:
 	str	r2, [sp, #16]
 	ldr	r2, [sp, #8]
-	ldr	r1, .L440+36
+	ldr	r1, .L443+36
 	ldrh	r6, [r10, #16]
 	ldrh	r5, [r2]
 	ldr	r2, [sp, #20]
-	ldr	fp, .L440+116
-	ldr	r8, .L440+120
+	ldr	fp, .L443+116
+	ldr	r8, .L443+120
 	smulbb	r5, r5, r3
 	ldrh	r4, [r2]
 	strh	r6, [fp]	@ movhi
@@ -2844,13 +2887,13 @@ FtlConstantsInit:
 	smulbb	r3, r3, r4
 	strh	r5, [r1]	@ movhi
 	smulbb	r0, r5, r6
-	ldr	r1, .L440+40
+	ldr	r1, .L443+40
 	strh	r3, [r1]	@ movhi
 	ldrh	r1, [r10, #18]
-	ldr	r3, .L440+44
+	ldr	r3, .L443+44
 	str	r1, [sp, #12]
 	strh	r1, [r3]	@ movhi
-	ldr	r3, .L440+48
+	ldr	r3, .L443+48
 	strh	r0, [r3]	@ movhi
 	ldrh	r3, [r10, #20]
 	mov	r0, r3
@@ -2859,9 +2902,9 @@ FtlConstantsInit:
 	bl	Ftl_log2
 	ldr	r3, [sp, #8]
 	mov	r7, r0
-	ldr	ip, .L440+124
+	ldr	ip, .L443+124
 	cmp	r4, #1024
-	ldr	lr, .L440+128
+	ldr	lr, .L443+128
 	ldr	r2, [sp, #16]
 	strh	r0, [ip]	@ movhi
 	lsl	r0, r3, #9
@@ -2869,15 +2912,15 @@ FtlConstantsInit:
 	uxth	r0, r0
 	strh	r0, [lr]	@ movhi
 	lsr	r0, r0, #8
-	ldr	lr, .L440+132
+	ldr	lr, .L443+132
 	mul	r1, r3, r1
 	strh	r0, [lr]	@ movhi
 	ldrh	lr, [r10, #26]
 	mov	r10, ip
-	ldr	r0, .L440+52
+	ldr	r0, .L443+52
 	strh	lr, [r0]	@ movhi
 	mul	lr, r4, r5
-	ldr	r0, .L440+56
+	ldr	r0, .L443+56
 	str	lr, [r0]
 	itt	hi
 	uxtbhi	r0, r4
@@ -2887,16 +2930,16 @@ FtlConstantsInit:
 	muls	r2, r5, r2
 	muls	r2, r3, r2
 	muls	r6, r2, r6
-	ldr	r2, .L440+60
+	ldr	r2, .L443+60
 	asrs	r6, r6, #11
 	str	r6, [r2]
-	ldr	r6, .L440+28
+	ldr	r6, .L443+28
 	ldrh	r0, [r6]
 	lsls	r0, r0, #3
 	bl	__aeabi_idiv
 	uxth	r0, r0
 	mov	r3, r6
-	ldr	r6, .L440+64
+	ldr	r6, .L443+64
 	cmp	r0, #4
 	itt	ls
 	movls	r2, #4
@@ -2904,22 +2947,22 @@ FtlConstantsInit:
 	ldr	r2, [sp, #4]
 	it	hi
 	strhhi	r0, [r6]	@ movhi
-	cbz	r2, .L425
+	cbz	r2, .L428
 	mov	r2, #640
 	strh	r2, [r3]	@ movhi
-.L425:
+.L428:
 	ldrh	r3, [r3]
 	lsls	r4, r4, #6
-	ldr	r2, .L440+68
+	ldr	r2, .L443+68
 	mov	r1, r5
 	ldrh	r0, [r6]
 	asrs	r3, r3, r7
 	adds	r7, r7, #9
 	asrs	r4, r4, r7
-	ldr	r7, .L440+72
+	ldr	r7, .L443+72
 	adds	r3, r3, #2
 	strh	r3, [r2]	@ movhi
-	ldr	r3, .L440+76
+	ldr	r3, .L443+76
 	strh	r4, [r3]	@ movhi
 	uxth	r4, r4
 	mul	r3, r4, r5
@@ -2927,9 +2970,9 @@ FtlConstantsInit:
 	str	r3, [r7]
 	bl	__aeabi_uidiv
 	uxtah	r0, r4, r0
-	ldr	r4, .L440+80
+	ldr	r4, .L443+80
 	cmp	r5, #1
-	ldr	r5, .L440+84
+	ldr	r5, .L443+84
 	it	eq
 	addeq	r0, r0, #4
 	str	r0, [r4]
@@ -2937,10 +2980,10 @@ FtlConstantsInit:
 	bl	FtlSysBlkNumInit
 	ldr	r2, [r4]
 	movs	r0, #24
-	ldr	r3, .L440+88
+	ldr	r3, .L443+88
 	ldrb	r5, [r5]	@ zero_extendqisi2
 	str	r2, [r3]
-	ldr	r3, .L440+92
+	ldr	r3, .L443+92
 	ldr	r2, [r3]
 	ldrh	r3, [fp]
 	lsls	r2, r2, #2
@@ -2948,14 +2991,14 @@ FtlConstantsInit:
 	ldrh	r2, [r10]
 	adds	r2, r2, #9
 	lsrs	r3, r3, r2
-	ldr	r2, .L440+96
+	ldr	r2, .L443+96
 	adds	r3, r3, #2
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L440+100
+	ldr	r2, .L443+100
 	strh	r0, [r2]	@ movhi
 	movs	r0, #0
-	ldr	r2, .L440+104
+	ldr	r2, .L443+104
 	str	r0, [r2]
 	ldrh	r0, [r6]
 	adds	r2, r0, #3
@@ -2963,17 +3006,17 @@ FtlConstantsInit:
 	ldr	r2, [r7]
 	adds	r4, r2, #3
 	str	r4, [r7]
-	cbz	r5, .L428
+	cbz	r5, .L431
 	adds	r2, r2, #5
 	adds	r0, r0, #4
 	strh	r0, [r6]	@ movhi
-.L439:
+.L442:
 	str	r2, [r7]
-.L429:
-	ldr	r1, .L440+108
+.L432:
+	ldr	r1, .L443+108
 	movs	r2, #0
 	strh	r2, [r1]	@ movhi
-	ldr	r2, .L440+112
+	ldr	r2, .L443+112
 	ldrh	r0, [r2]
 	lsrs	r2, r0, #3
 	add	r2, r2, r0, lsl #1
@@ -2988,14 +3031,14 @@ FtlConstantsInit:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L428:
+.L431:
 	cmp	r4, #7
-	bhi	.L429
+	bhi	.L432
 	movs	r2, #8
-	b	.L439
-.L441:
+	b	.L442
+.L444:
 	.align	2
-.L440:
+.L443:
 	.word	.LANCHOR44
 	.word	.LANCHOR41
 	.word	.LANCHOR46
@@ -3004,7 +3047,7 @@ FtlConstantsInit:
 	.word	.LANCHOR48
 	.word	.LANCHOR49
 	.word	.LANCHOR50
-	.word	.LANCHOR1
+	.word	.LANCHOR2
 	.word	.LANCHOR38
 	.word	.LANCHOR51
 	.word	.LANCHOR53
@@ -3043,29 +3086,29 @@ IsBlkInVendorPart:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L449
+	ldr	r3, .L452
 	ldrh	r3, [r3]
-	cbz	r3, .L448
-	ldr	r3, .L449+4
-	ldr	r2, .L449+8
+	cbz	r3, .L451
+	ldr	r3, .L452+4
+	ldr	r2, .L452+8
 	ldr	r3, [r3]
 	ldrh	r2, [r2]
 	add	r2, r3, r2, lsl #1
-.L444:
+.L447:
 	cmp	r3, r2
-	bne	.L445
-.L448:
+	bne	.L448
+.L451:
 	movs	r0, #0
 	bx	lr
-.L445:
+.L448:
 	ldrh	r1, [r3], #2
 	cmp	r0, r1
-	bne	.L444
+	bne	.L447
 	movs	r0, #1
 	bx	lr
-.L450:
+.L453:
 	.align	2
-.L449:
+.L452:
 	.word	.LANCHOR70
 	.word	.LANCHOR71
 	.word	.LANCHOR61
@@ -3082,12 +3125,12 @@ FtlGetCap:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L452
+	ldr	r3, .L455
 	ldr	r0, [r3]
 	bx	lr
-.L453:
+.L456:
 	.align	2
-.L452:
+.L455:
 	.word	.LANCHOR68
 	.size	FtlGetCap, .-FtlGetCap
 	.section	.text.FtlGetCapacity,"ax",%progbits
@@ -3102,12 +3145,12 @@ FtlGetCapacity:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L455
+	ldr	r3, .L458
 	ldr	r0, [r3]
 	bx	lr
-.L456:
+.L459:
 	.align	2
-.L455:
+.L458:
 	.word	.LANCHOR68
 	.size	FtlGetCapacity, .-FtlGetCapacity
 	.section	.text.ftl_get_density,"ax",%progbits
@@ -3122,12 +3165,12 @@ ftl_get_density:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L458
+	ldr	r3, .L461
 	ldr	r0, [r3]
 	bx	lr
-.L459:
+.L462:
 	.align	2
-.L458:
+.L461:
 	.word	.LANCHOR68
 	.size	ftl_get_density, .-ftl_get_density
 	.section	.text.FtlGetLpn,"ax",%progbits
@@ -3142,12 +3185,12 @@ FtlGetLpn:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L461
+	ldr	r3, .L464
 	ldr	r0, [r3]
 	bx	lr
-.L462:
+.L465:
 	.align	2
-.L461:
+.L464:
 	.word	.LANCHOR72
 	.size	FtlGetLpn, .-FtlGetLpn
 	.section	.text.FtlGetCurEraseBlock,"ax",%progbits
@@ -3162,15 +3205,15 @@ FtlGetCurEraseBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L464
-	ldr	r3, .L464+4
+	ldr	r2, .L467
+	ldr	r3, .L467+4
 	ldr	r0, [r2]
 	ldrh	r3, [r3]
 	muls	r0, r3, r0
 	bx	lr
-.L465:
+.L468:
 	.align	2
-.L464:
+.L467:
 	.word	.LANCHOR73
 	.word	.LANCHOR38
 	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
@@ -3186,15 +3229,15 @@ FtlGetAllBlockNum:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L467
-	ldr	r3, .L467+4
+	ldr	r2, .L470
+	ldr	r3, .L470+4
 	ldrh	r0, [r2]
 	ldrh	r3, [r3]
 	muls	r0, r3, r0
 	bx	lr
-.L468:
+.L471:
 	.align	2
-.L467:
+.L470:
 	.word	.LANCHOR38
 	.word	.LANCHOR41
 	.size	FtlGetAllBlockNum, .-FtlGetAllBlockNum
@@ -3209,14 +3252,14 @@ FtlGetAllBlockNum:
 FtlBbmMapBadBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L470
+	ldr	r3, .L473
 	push	{r0, r1, r2, r4, r5, r6, r7, lr}
 	mov	r5, r0
 	ldrh	r4, [r3]
 	mov	r1, r4
 	bl	__aeabi_uidiv
 	mov	r1, r4
-	ldr	r4, .L470+4
+	ldr	r4, .L473+4
 	uxth	r6, r0
 	mov	r0, r5
 	bl	__aeabi_uidivmod
@@ -3233,7 +3276,7 @@ FtlBbmMapBadBlock:
 	mov	r2, r6
 	str	r0, [sp]
 	mov	r1, r5
-	ldr	r0, .L470+8
+	ldr	r0, .L473+8
 	bl	printf
 	ldrh	r3, [r4, #6]
 	movs	r0, #0
@@ -3242,9 +3285,9 @@ FtlBbmMapBadBlock:
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, pc}
-.L471:
+.L474:
 	.align	2
-.L470:
+.L473:
 	.word	.LANCHOR51
 	.word	.LANCHOR74
 	.word	.LC2
@@ -3260,7 +3303,7 @@ FtlBbmMapBadBlock:
 FtlBbmIsBadBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L473
+	ldr	r3, .L476
 	push	{r4, r5, r6, lr}
 	mov	r6, r0
 	ldrh	r5, [r3]
@@ -3270,7 +3313,7 @@ FtlBbmIsBadBlock:
 	uxth	r4, r1
 	mov	r1, r5
 	bl	__aeabi_uidiv
-	ldr	r3, .L473+4
+	ldr	r3, .L476+4
 	uxth	r0, r0
 	lsrs	r2, r4, #5
 	and	r4, r4, #31
@@ -3280,9 +3323,9 @@ FtlBbmIsBadBlock:
 	lsrs	r0, r0, r4
 	and	r0, r0, #1
 	pop	{r4, r5, r6, pc}
-.L474:
+.L477:
 	.align	2
-.L473:
+.L476:
 	.word	.LANCHOR51
 	.word	.LANCHOR74
 	.size	FtlBbmIsBadBlock, .-FtlBbmIsBadBlock
@@ -3313,12 +3356,12 @@ V2P_block:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r5, r1
-	ldr	r3, .L477
+	ldr	r3, .L480
 	mov	r7, r0
 	ldrh	r6, [r3]
 	mov	r1, r6
 	bl	__aeabi_uidiv
-	ldr	r3, .L477+4
+	ldr	r3, .L480+4
 	smulbb	r5, r6, r5
 	mov	r1, r6
 	ldrh	r4, [r3]
@@ -3329,9 +3372,9 @@ V2P_block:
 	add	r0, r0, r4
 	uxth	r0, r0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L478:
+.L481:
 	.align	2
-.L477:
+.L480:
 	.word	.LANCHOR46
 	.word	.LANCHOR51
 	.size	V2P_block, .-V2P_block
@@ -3346,11 +3389,11 @@ V2P_block:
 P2V_plane:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L480
+	ldr	r3, .L483
 	push	{r4, r5, r6, lr}
 	mov	r6, r0
 	ldrh	r5, [r3]
-	ldr	r3, .L480+4
+	ldr	r3, .L483+4
 	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
 	smulbb	r4, r0, r5
@@ -3360,9 +3403,9 @@ P2V_plane:
 	add	r1, r1, r4
 	uxth	r0, r1
 	pop	{r4, r5, r6, pc}
-.L481:
+.L484:
 	.align	2
-.L480:
+.L483:
 	.word	.LANCHOR46
 	.word	.LANCHOR51
 	.size	P2V_plane, .-P2V_plane
@@ -3378,18 +3421,18 @@ P2V_block_in_plane:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L483
+	ldr	r3, .L486
 	ldrh	r1, [r3]
 	bl	__aeabi_uidivmod
-	ldr	r3, .L483+4
+	ldr	r3, .L486+4
 	uxth	r0, r1
 	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
 	uxth	r0, r0
 	pop	{r3, pc}
-.L484:
+.L487:
 	.align	2
-.L483:
+.L486:
 	.word	.LANCHOR51
 	.word	.LANCHOR46
 	.size	P2V_block_in_plane, .-P2V_block_in_plane
@@ -3406,14 +3449,14 @@ ftl_cmp_data_ver:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	cmp	r0, r1
-	bls	.L486
+	bls	.L489
 	subs	r0, r0, r1
 	cmp	r0, #-2147483648
 	ite	hi
 	movhi	r0, #0
 	movls	r0, #1
 	bx	lr
-.L486:
+.L489:
 	subs	r0, r1, r0
 	cmp	r0, #-2147483648
 	ite	ls
@@ -3433,14 +3476,14 @@ FtlFreeSysBlkQueueEmpty:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L489
+	ldr	r3, .L492
 	ldrh	r0, [r3, #6]
 	clz	r0, r0
 	lsrs	r0, r0, #5
 	bx	lr
-.L490:
+.L493:
 	.align	2
-.L489:
+.L492:
 	.word	.LANCHOR75
 	.size	FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty
 	.section	.text.FtlFreeSysBlkQueueFull,"ax",%progbits
@@ -3455,15 +3498,15 @@ FtlFreeSysBlkQueueFull:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L492
+	ldr	r3, .L495
 	ldrh	r0, [r3, #6]
 	sub	r3, r0, #1024
 	rsbs	r0, r3, #0
 	adcs	r0, r0, r3
 	bx	lr
-.L493:
+.L496:
 	.align	2
-.L492:
+.L495:
 	.word	.LANCHOR75
 	.size	FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull
 	.section	.text.FtlFreeSysBlkQueueIn,"ax",%progbits
@@ -3483,17 +3526,17 @@ FtlFreeSysBlkQueueIn:
 	push	{r4, r5, r6, lr}
 	mov	r5, r0
 	cmp	r3, r2
-	bhi	.L494
-	ldr	r4, .L503
+	bhi	.L497
+	ldr	r4, .L506
 	ldrh	r3, [r4, #6]
 	cmp	r3, #1024
-	beq	.L494
-	cbz	r1, .L496
-	ldr	r3, .L503+4
+	beq	.L497
+	cbz	r1, .L499
+	ldr	r3, .L506+4
 	ldr	r3, [r3]
-	cbnz	r3, .L496
+	cbnz	r3, .L499
 	bl	P2V_block_in_plane
-	ldr	r3, .L503+8
+	ldr	r3, .L506+8
 	mov	r6, r0
 	movs	r2, #1
 	mov	r1, r2
@@ -3501,16 +3544,16 @@ FtlFreeSysBlkQueueIn:
 	lsls	r3, r5, #10
 	str	r3, [r0, #4]
 	bl	FlashEraseBlocks
-	ldr	r3, .L503+12
+	ldr	r3, .L506+12
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r6, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r6, lsl #1]	@ movhi
-	ldr	r2, .L503+16
+	ldr	r2, .L506+16
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
-.L496:
+.L499:
 	ldrh	r3, [r4, #6]
 	adds	r3, r3, #1
 	strh	r3, [r4, #6]	@ movhi
@@ -3520,11 +3563,11 @@ FtlFreeSysBlkQueueIn:
 	ubfx	r3, r3, #0, #10
 	strh	r5, [r4, r2, lsl #1]	@ movhi
 	strh	r3, [r4, #4]	@ movhi
-.L494:
+.L497:
 	pop	{r4, r5, r6, pc}
-.L504:
+.L507:
 	.align	2
-.L503:
+.L506:
 	.word	.LANCHOR75
 	.word	.LANCHOR76
 	.word	.LANCHOR77
@@ -3542,28 +3585,28 @@ FtlFreeSysBlkQueueIn:
 FtlFreeSysBLkSort:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L514
+	ldr	r3, .L517
 	push	{r4, r5, r6, lr}
 	ldrh	r2, [r3, #6]
-	cbz	r2, .L505
-	ldr	r2, .L514+4
+	cbz	r2, .L508
+	ldr	r2, .L517+4
 	movs	r6, #0
 	ldrh	r1, [r3, #2]
 	mov	r5, r6
 	ldrh	r4, [r2, #28]
 	ldrh	r2, [r3, #4]
 	and	r4, r4, #31
-.L507:
+.L510:
 	uxth	r0, r6
 	adds	r6, r6, #1
 	cmp	r4, r0
-	bgt	.L508
-	cbz	r5, .L505
+	bgt	.L511
+	cbz	r5, .L508
 	strh	r1, [r3, #2]	@ movhi
 	strh	r2, [r3, #4]	@ movhi
-.L505:
-	pop	{r4, r5, r6, pc}
 .L508:
+	pop	{r4, r5, r6, pc}
+.L511:
 	adds	r0, r1, #4
 	adds	r1, r1, #1
 	ldrh	r5, [r3, r0, lsl #1]
@@ -3573,10 +3616,10 @@ FtlFreeSysBLkSort:
 	movs	r5, #1
 	add	r2, r2, r5
 	ubfx	r2, r2, #0, #10
-	b	.L507
-.L515:
+	b	.L510
+.L518:
 	.align	2
-.L514:
+.L517:
 	.word	.LANCHOR75
 	.word	.LANCHOR80
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
@@ -3592,12 +3635,12 @@ FtlFreeSysBlkQueueOut:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	ldr	r4, .L526
+	ldr	r4, .L529
 	mov	r6, r4
-.L517:
+.L520:
 	ldrh	r1, [r4, #6]
 	cmp	r1, #0
-	beq	.L518
+	beq	.L521
 	ldrh	r3, [r4, #2]
 	subs	r1, r1, #1
 	strh	r1, [r4, #6]	@ movhi
@@ -3606,59 +3649,59 @@ FtlFreeSysBlkQueueOut:
 	ubfx	r3, r3, #0, #10
 	ldrh	r5, [r4, r2, lsl #1]
 	strh	r3, [r4, #2]	@ movhi
-	ldr	r3, .L526+4
+	ldr	r3, .L529+4
 	ldr	r10, [r3]
 	cmp	r10, #0
-	bne	.L519
-	ldr	r8, .L526+28
+	bne	.L522
+	ldr	r8, .L529+28
 	mov	r0, r5
 	bl	P2V_block_in_plane
 	mov	r7, r0
 	lsls	r3, r5, #10
 	ldr	r0, [r8]
 	str	r3, [r0, #4]
-	ldr	r3, .L526+8
+	ldr	r3, .L529+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L520
+	cbz	r3, .L523
 	movs	r2, #1
 	mov	r1, r10
 	bl	FlashEraseBlocks
-.L520:
+.L523:
 	movs	r2, #1
 	ldr	r0, [r8]
 	mov	r1, r2
 	bl	FlashEraseBlocks
-	ldr	r3, .L526+12
+	ldr	r3, .L529+12
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r7, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r7, lsl #1]	@ movhi
-	ldr	r2, .L526+16
+	ldr	r2, .L529+16
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
-.L519:
+.L522:
 	subs	r3, r5, #1
 	movw	r2, #65533
 	uxth	r3, r3
 	cmp	r3, r2
-	bls	.L522
+	bls	.L525
 	ldrh	r2, [r6, #6]
 	mov	r1, r5
-	ldr	r0, .L526+20
-	bl	printf
-	b	.L517
-.L518:
-	ldr	r0, .L526+24
+	ldr	r0, .L529+20
 	bl	printf
+	b	.L520
 .L521:
-	b	.L521
-.L522:
+	ldr	r0, .L529+24
+	bl	printf
+.L524:
+	b	.L524
+.L525:
 	mov	r0, r5
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L527:
+.L530:
 	.align	2
-.L526:
+.L529:
 	.word	.LANCHOR75
 	.word	.LANCHOR76
 	.word	.LANCHOR15
@@ -3679,34 +3722,34 @@ FtlFreeSysBlkQueueOut:
 test_node_in_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L533
+	ldr	r3, .L536
 	push	{r4, r5, lr}
 	movw	r5, #65535
 	ldr	r2, [r0]
 	ldr	r4, [r3]
 	subs	r3, r2, r4
 	asrs	r0, r3, #1
-	ldr	r3, .L533+4
+	ldr	r3, .L536+4
 	muls	r3, r0, r3
 	movs	r0, #6
 	uxth	r3, r3
-.L530:
+.L533:
 	cmp	r3, r1
-	beq	.L531
+	beq	.L534
 	ldrh	r3, [r2]
 	cmp	r3, r5
-	beq	.L532
+	beq	.L535
 	mla	r2, r0, r3, r4
-	b	.L530
-.L531:
+	b	.L533
+.L534:
 	movs	r0, #1
 	pop	{r4, r5, pc}
-.L532:
+.L535:
 	movs	r0, #0
 	pop	{r4, r5, pc}
-.L534:
+.L537:
 	.align	2
-.L533:
+.L536:
 	.word	.LANCHOR81
 	.word	-1431655765
 	.size	test_node_in_list, .-test_node_in_list
@@ -3722,11 +3765,11 @@ insert_data_list:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L551
+	ldr	r3, .L554
 	ldrh	lr, [r3]
 	cmp	lr, r0
-	bls	.L537
-	ldr	r3, .L551+4
+	bls	.L540
+	ldr	r3, .L554+4
 	movs	r5, #6
 	ldr	r4, [r3]
 	mul	r3, r5, r0
@@ -3736,102 +3779,102 @@ insert_data_list:
 	movw	r3, #65535
 	strh	r3, [r1, #2]	@ movhi
 	strh	r3, [r4, r2]	@ movhi
-	ldr	r3, .L551+8
+	ldr	r3, .L554+8
 	ldr	ip, [r3]
 	cmp	ip, #0
-	bne	.L538
-.L550:
+	bne	.L541
+.L553:
 	str	r1, [r3]
-.L537:
+.L540:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L538:
-	ldr	r3, .L551+12
+.L541:
+	ldr	r3, .L554+12
 	lsls	r2, r0, #1
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
 	ldrh	r6, [r3, r0, lsl #1]
 	ldrh	r3, [r1, #4]
-	cbz	r3, .L548
+	cbz	r3, .L551
 	mul	fp, r3, r6
-.L539:
+.L542:
 	sub	r3, ip, r4
 	asrs	r6, r3, #1
-	ldr	r3, .L551+16
+	ldr	r3, .L554+16
 	muls	r3, r6, r3
-	ldr	r6, .L551+20
+	ldr	r6, .L554+20
 	ldr	r8, [r6]
 	movs	r6, #0
 	uxth	r3, r3
 	add	r2, r8, r2
 	str	r2, [sp, #12]
 	mov	r2, ip
-.L546:
+.L549:
 	adds	r6, r6, #1
 	uxth	r6, r6
 	cmp	lr, r6
-	bcc	.L537
+	bcc	.L540
 	cmp	r3, r0
-	beq	.L537
+	beq	.L540
 	ldr	r7, [sp, #8]
 	lsl	r10, r3, #1
 	ldrh	r7, [r7, r3, lsl #1]
 	mov	r5, r7
 	ldrh	r7, [r2, #4]
-	cbz	r7, .L549
+	cbz	r7, .L552
 	muls	r7, r5, r7
-.L541:
+.L544:
 	cmp	fp, r7
-	bne	.L542
+	bne	.L545
 	ldr	r5, [sp, #12]
 	ldrh	r10, [r8, r10]
 	ldrh	r7, [r5]
 	cmp	r10, r7
-	bcc	.L544
-.L543:
+	bcc	.L547
+.L546:
 	ldr	r5, [sp, #4]
 	cmp	r2, ip
 	strh	r3, [r4, r5]	@ movhi
 	ldrh	r3, [r2, #2]
 	strh	r3, [r1, #2]	@ movhi
-	bne	.L547
+	bne	.L550
 	strh	r0, [r2, #2]	@ movhi
-	ldr	r3, .L551+8
-	b	.L550
-.L548:
+	ldr	r3, .L554+8
+	b	.L553
+.L551:
 	mov	fp, #-1
-	b	.L539
-.L549:
+	b	.L542
+.L552:
 	mov	r7, #-1
-	b	.L541
-.L542:
-	bcc	.L543
-.L544:
+	b	.L544
+.L545:
+	bcc	.L546
+.L547:
 	ldrh	r7, [r2]
 	movw	r5, #65535
 	cmp	r7, r5
-	bne	.L545
+	bne	.L548
 	strh	r3, [r1, #2]	@ movhi
 	strh	r0, [r2]	@ movhi
-	ldr	r3, .L551+24
-	b	.L550
-.L545:
+	ldr	r3, .L554+24
+	b	.L553
+.L548:
 	movs	r3, #6
 	mla	r2, r3, r7, r4
 	mov	r3, r7
-	b	.L546
-.L547:
+	b	.L549
+.L550:
 	ldrh	r1, [r2, #2]
 	movs	r3, #6
 	muls	r3, r1, r3
 	strh	r0, [r4, r3]	@ movhi
 	strh	r0, [r2, #2]	@ movhi
-	b	.L537
-.L552:
+	b	.L540
+.L555:
 	.align	2
-.L551:
+.L554:
 	.word	.LANCHOR40
 	.word	.LANCHOR81
 	.word	.LANCHOR82
@@ -3853,28 +3896,28 @@ INSERT_DATA_LIST:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	insert_data_list
-	ldr	r2, .L555
+	ldr	r2, .L558
 	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L555+4
+	ldr	r2, .L558+4
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bcs	.L553
-	ldr	r1, .L555+8
+	bcs	.L556
+	ldr	r1, .L558+8
 	movs	r2, #210
-	ldr	r0, .L555+12
+	ldr	r0, .L558+12
 	bl	printf
-	ldr	r1, .L555+16
-	ldr	r0, .L555+20
+	ldr	r1, .L558+16
+	ldr	r0, .L558+20
 	pop	{r3, lr}
 	b	printf
-.L553:
-	pop	{r3, pc}
 .L556:
+	pop	{r3, pc}
+.L559:
 	.align	2
-.L555:
+.L558:
 	.word	.LANCHOR85
 	.word	.LANCHOR40
 	.word	.LANCHOR86
@@ -3896,48 +3939,48 @@ insert_free_list:
 	movw	r1, #65535
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	cmp	r0, r1
-	beq	.L558
-	ldr	r3, .L564
+	beq	.L561
+	ldr	r3, .L567
 	mov	r10, #6
 	mul	r7, r10, r0
 	ldr	r4, [r3]
-	ldr	r3, .L564+4
+	ldr	r3, .L567+4
 	adds	r5, r4, r7
 	ldr	r6, [r3]
 	mov	lr, r3
 	strh	r1, [r5, #2]	@ movhi
 	strh	r1, [r4, r7]	@ movhi
-	cbnz	r6, .L559
+	cbnz	r6, .L562
 	str	r5, [r3]
-.L558:
+.L561:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L559:
-	ldr	r3, .L564+8
+.L562:
+	ldr	r3, .L567+8
 	subs	r2, r6, r4
 	mov	fp, r1
 	ldr	ip, [r3]
 	asrs	r3, r2, #1
-	ldr	r2, .L564+12
+	ldr	r2, .L567+12
 	ldrh	r8, [ip, r0, lsl #1]
 	muls	r2, r3, r2
 	mov	r3, r6
 	uxth	r2, r2
-.L562:
+.L565:
 	ldrh	r1, [ip, r2, lsl #1]
 	cmp	r1, r8
-	bcs	.L560
+	bcs	.L563
 	ldrh	r1, [r3]
 	cmp	r1, fp
-	bne	.L561
+	bne	.L564
 	strh	r2, [r5, #2]	@ movhi
 	strh	r0, [r3]	@ movhi
-	b	.L558
-.L561:
+	b	.L561
+.L564:
 	mla	r3, r10, r1, r4
 	mov	r2, r1
-	b	.L562
-.L560:
+	b	.L565
+.L563:
 	ldrh	r1, [r3, #2]
 	cmp	r3, r6
 	strh	r1, [r5, #2]	@ movhi
@@ -3952,10 +3995,10 @@ insert_free_list:
 	itt	ne
 	strhne	r0, [r4, r2]	@ movhi
 	strhne	r0, [r3, #2]	@ movhi
-	b	.L558
-.L565:
+	b	.L561
+.L568:
 	.align	2
-.L564:
+.L567:
 	.word	.LANCHOR81
 	.word	.LANCHOR87
 	.word	.LANCHOR78
@@ -3974,28 +4017,28 @@ INSERT_FREE_LIST:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	insert_free_list
-	ldr	r2, .L568
+	ldr	r2, .L571
 	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L568+4
+	ldr	r2, .L571+4
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bcs	.L566
-	ldr	r1, .L568+8
+	bcs	.L569
+	ldr	r1, .L571+8
 	movs	r2, #203
-	ldr	r0, .L568+12
+	ldr	r0, .L571+12
 	bl	printf
-	ldr	r1, .L568+16
-	ldr	r0, .L568+20
+	ldr	r1, .L571+16
+	ldr	r0, .L571+20
 	pop	{r3, lr}
 	b	printf
-.L566:
-	pop	{r3, pc}
 .L569:
+	pop	{r3, pc}
+.L572:
 	.align	2
-.L568:
+.L571:
 	.word	.LANCHOR88
 	.word	.LANCHOR40
 	.word	.LANCHOR89
@@ -4016,7 +4059,7 @@ List_remove_node:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r6, #6
-	ldr	r5, .L576
+	ldr	r5, .L579
 	muls	r6, r1, r6
 	movw	r3, #65535
 	mov	r8, r0
@@ -4024,23 +4067,23 @@ List_remove_node:
 	adds	r4, r7, r6
 	ldrh	r2, [r4, #2]
 	cmp	r2, r3
-	bne	.L571
+	bne	.L574
 	ldr	r3, [r0]
 	cmp	r4, r3
-	beq	.L571
-	ldr	r1, .L576+4
+	beq	.L574
+	ldr	r1, .L579+4
 	mov	r2, #386
-	ldr	r0, .L576+8
+	ldr	r0, .L579+8
 	bl	printf
-	ldr	r1, .L576+12
-	ldr	r0, .L576+16
+	ldr	r1, .L579+12
+	ldr	r0, .L579+16
 	bl	printf
-.L571:
+.L574:
 	ldr	r3, [r8]
 	movw	r1, #65535
 	cmp	r4, r3
 	ldrh	r3, [r7, r6]
-	bne	.L572
+	bne	.L575
 	cmp	r3, r1
 	ittee	ne
 	ldrne	r0, [r5]
@@ -4051,24 +4094,24 @@ List_remove_node:
 	mlane	r3, r2, r3, r0
 	strne	r3, [r8]
 	strhne	r1, [r3, #2]	@ movhi
-.L574:
+.L577:
 	movw	r3, #65535
 	movs	r0, #0
 	strh	r3, [r7, r6]	@ movhi
 	strh	r3, [r4, #2]	@ movhi
 	pop	{r4, r5, r6, r7, r8, pc}
-.L572:
+.L575:
 	cmp	r3, r1
 	ldrh	r1, [r4, #2]
-	bne	.L575
+	bne	.L578
 	cmp	r1, r3
-	beq	.L574
+	beq	.L577
 	movs	r2, #6
 	ldr	r0, [r5]
 	muls	r1, r2, r1
 	strh	r3, [r0, r1]	@ movhi
-	b	.L574
-.L575:
+	b	.L577
+.L578:
 	ldr	r0, [r5]
 	movs	r2, #6
 	mla	r5, r2, r3, r0
@@ -4076,10 +4119,10 @@ List_remove_node:
 	ldrh	r1, [r4, #2]
 	muls	r2, r1, r2
 	strh	r3, [r0, r2]	@ movhi
-	b	.L574
-.L577:
+	b	.L577
+.L580:
 	.align	2
-.L576:
+.L579:
 	.word	.LANCHOR81
 	.word	.LANCHOR90
 	.word	.LC5
@@ -4099,15 +4142,15 @@ List_pop_index_node:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	ldr	r3, [r0]
 	push	{r4, r5, r6, lr}
-	cbz	r3, .L584
-	ldr	r2, .L585
+	cbz	r3, .L587
+	ldr	r2, .L588
 	movw	r5, #65535
 	movs	r6, #6
 	ldr	r2, [r2]
-.L580:
-	cbnz	r1, .L581
 .L583:
-	ldr	r4, .L585+4
+	cbnz	r1, .L584
+.L586:
+	ldr	r4, .L588+4
 	subs	r3, r3, r2
 	asrs	r3, r3, #1
 	muls	r4, r3, r4
@@ -4115,20 +4158,20 @@ List_pop_index_node:
 	bl	List_remove_node
 	uxth	r0, r4
 	pop	{r4, r5, r6, pc}
-.L581:
+.L584:
 	ldrh	r4, [r3]
 	cmp	r4, r5
-	beq	.L583
+	beq	.L586
 	subs	r1, r1, #1
 	mla	r3, r6, r4, r2
 	uxth	r1, r1
-	b	.L580
-.L584:
+	b	.L583
+.L587:
 	movw	r0, #65535
 	pop	{r4, r5, r6, pc}
-.L586:
+.L589:
 	.align	2
-.L585:
+.L588:
 	.word	.LANCHOR81
 	.word	-1431655765
 	.size	List_pop_index_node, .-List_pop_index_node
@@ -4143,37 +4186,37 @@ List_pop_index_node:
 List_get_gc_head_node:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L593
+	ldr	r3, .L596
 	push	{r4, lr}
 	ldr	r3, [r3]
-	cbz	r3, .L592
-	ldr	r2, .L593+4
+	cbz	r3, .L595
+	ldr	r2, .L596+4
 	movs	r4, #6
 	ldr	r1, [r2]
 	movw	r2, #65535
-.L589:
-	cbz	r0, .L590
+.L592:
+	cbz	r0, .L593
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bne	.L591
-.L592:
+	bne	.L594
+.L595:
 	movw	r0, #65535
 	pop	{r4, pc}
-.L591:
+.L594:
 	subs	r0, r0, #1
 	mla	r3, r4, r3, r1
 	uxth	r0, r0
-	b	.L589
-.L590:
-	ldr	r0, .L593+8
+	b	.L592
+.L593:
+	ldr	r0, .L596+8
 	subs	r3, r3, r1
 	asrs	r3, r3, #1
 	muls	r3, r0, r3
 	uxth	r0, r3
 	pop	{r4, pc}
-.L594:
+.L597:
 	.align	2
-.L593:
+.L596:
 	.word	.LANCHOR82
 	.word	.LANCHOR81
 	.word	-1431655765
@@ -4189,64 +4232,64 @@ List_get_gc_head_node:
 List_update_data_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L606
+	ldr	r3, .L609
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L597
-	ldr	r3, .L606+4
+	beq	.L600
+	ldr	r3, .L609+4
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L597
-	ldr	r3, .L606+8
+	beq	.L600
+	ldr	r3, .L609+8
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L597
-	ldr	r7, .L606+12
+	beq	.L600
+	ldr	r7, .L609+12
 	movs	r6, #6
-	ldr	r3, .L606+16
+	ldr	r3, .L609+16
 	muls	r6, r0, r6
 	ldr	fp, [r7]
 	ldr	r3, [r3]
 	add	r10, fp, r6
 	cmp	r10, r3
-	beq	.L597
-	ldr	r3, .L606+20
+	beq	.L600
+	ldr	r3, .L609+20
 	ldrh	r5, [r10, #4]
 	ldr	r2, [r3]
 	mov	r8, r3
 	ldrh	r2, [r2, r0, lsl #1]
 	cmp	r5, #0
-	beq	.L604
+	beq	.L607
 	muls	r5, r2, r5
-.L599:
+.L602:
 	ldrh	r3, [r10, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L600
+	bne	.L603
 	ldrh	r2, [fp, r6]
 	cmp	r2, r3
-	bne	.L600
-	ldr	r1, .L606+24
+	bne	.L603
+	ldr	r1, .L609+24
 	mov	r2, #504
-	ldr	r0, .L606+28
+	ldr	r0, .L609+28
 	bl	printf
-	ldr	r1, .L606+32
-	ldr	r0, .L606+36
+	ldr	r1, .L609+32
+	ldr	r0, .L609+36
 	bl	printf
-.L600:
+.L603:
 	ldrh	r3, [r10, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L601
+	bne	.L604
 	ldrh	r2, [fp, r6]
 	cmp	r2, r3
-	beq	.L597
-.L601:
+	beq	.L600
+.L604:
 	movs	r2, #6
 	muls	r2, r3, r2
-	ldr	r3, .L606+40
+	ldr	r3, .L609+40
 	asrs	r1, r2, #1
 	muls	r3, r1, r3
 	ldr	r1, [r8]
@@ -4254,42 +4297,42 @@ List_update_data_list:
 	ldr	r1, [r7]
 	add	r2, r2, r1
 	ldrh	r3, [r2, #4]
-	cbz	r3, .L605
+	cbz	r3, .L608
 	muls	r3, r0, r3
-.L602:
+.L605:
 	cmp	r5, r3
-	bcs	.L597
-	ldr	r5, .L606+44
+	bcs	.L600
+	ldr	r5, .L609+44
 	mov	r1, r4
-	ldr	r0, .L606+16
+	ldr	r0, .L609+16
 	bl	List_remove_node
 	ldrh	r3, [r5]
-	cbnz	r3, .L603
-	ldr	r1, .L606+24
+	cbnz	r3, .L606
+	ldr	r1, .L609+24
 	movw	r2, #515
-	ldr	r0, .L606+28
+	ldr	r0, .L609+28
 	bl	printf
-	ldr	r1, .L606+32
-	ldr	r0, .L606+36
+	ldr	r1, .L609+32
+	ldr	r0, .L609+36
 	bl	printf
-.L603:
+.L606:
 	ldrh	r3, [r5]
 	mov	r0, r4
 	subs	r3, r3, #1
 	strh	r3, [r5]	@ movhi
 	bl	INSERT_DATA_LIST
-.L597:
+.L600:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L604:
+.L607:
 	mov	r5, #-1
-	b	.L599
-.L605:
-	mov	r3, #-1
 	b	.L602
-.L607:
+.L608:
+	mov	r3, #-1
+	b	.L605
+.L610:
 	.align	2
-.L606:
+.L609:
 	.word	.LANCHOR91
 	.word	.LANCHOR92
 	.word	.LANCHOR93
@@ -4319,16 +4362,16 @@ ftl_map_blk_alloc_new_blk:
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r4, r0
 	movs	r3, #0
-.L609:
+.L612:
 	uxth	r5, r3
 	cmp	r5, r1
-	bcs	.L612
+	bcs	.L615
 	mov	r7, r2
 	adds	r3, r3, #1
 	ldrh	r6, [r7]
 	adds	r2, r2, #2
 	cmp	r6, #0
-	bne	.L609
+	bne	.L612
 	bl	FtlFreeSysBlkQueueOut
 	subs	r3, r0, #1
 	movw	r2, #65533
@@ -4336,14 +4379,14 @@ ftl_map_blk_alloc_new_blk:
 	mov	r1, r0
 	strh	r0, [r7]	@ movhi
 	cmp	r3, r2
-	bls	.L610
-	ldr	r3, .L616
-	ldr	r0, .L616+4
+	bls	.L613
+	ldr	r3, .L619
+	ldr	r0, .L619+4
 	ldrh	r2, [r3, #6]
 	bl	printf
-.L611:
-	b	.L611
-.L610:
+.L614:
+	b	.L614
+.L613:
 	ldr	r3, [r4, #28]
 	strh	r6, [r4, #2]	@ movhi
 	strh	r5, [r4]	@ movhi
@@ -4352,23 +4395,23 @@ ftl_map_blk_alloc_new_blk:
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-.L612:
+.L615:
 	ldrh	r3, [r4, #10]
 	cmp	r3, r5
-	bhi	.L614
-	ldr	r1, .L616+8
+	bhi	.L617
+	ldr	r1, .L619+8
 	movw	r2, #629
-	ldr	r0, .L616+12
+	ldr	r0, .L619+12
 	bl	printf
-	ldr	r1, .L616+16
-	ldr	r0, .L616+20
+	ldr	r1, .L619+16
+	ldr	r0, .L619+20
 	bl	printf
-.L614:
+.L617:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L617:
+.L620:
 	.align	2
-.L616:
+.L619:
 	.word	.LANCHOR75
 	.word	.LC8
 	.word	.LANCHOR95
@@ -4389,82 +4432,82 @@ select_l2p_ram_region:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r1, #0
-	ldr	r3, .L628
+	ldr	r3, .L631
 	movs	r0, #12
 	movw	r5, #65535
 	ldrh	r2, [r3]
-	ldr	r3, .L628+4
+	ldr	r3, .L631+4
 	ldr	r3, [r3]
-.L619:
+.L622:
 	uxth	r4, r1
 	cmp	r4, r2
-	bcc	.L621
+	bcc	.L624
 	mov	r4, r2
 	movs	r1, #0
 	mov	r6, #-2147483648
 	movs	r7, #12
-.L622:
+.L625:
 	uxth	r5, r1
 	cmp	r5, r2
-	bcc	.L624
+	bcc	.L627
 	cmp	r4, r2
-	bcc	.L620
-	ldr	r1, .L628+8
+	bcc	.L623
+	ldr	r1, .L631+8
 	mov	r4, r2
 	mov	r0, #-1
 	ldrh	r7, [r1]
 	movs	r1, #0
-.L625:
+.L628:
 	uxth	r5, r1
 	cmp	r5, r2
-	bcc	.L627
+	bcc	.L630
 	cmp	r4, r2
-	bcc	.L620
+	bcc	.L623
 	movw	r2, #859
-	ldr	r1, .L628+12
-	ldr	r0, .L628+16
+	ldr	r1, .L631+12
+	ldr	r0, .L631+16
 	bl	printf
-	ldr	r1, .L628+20
-	ldr	r0, .L628+24
+	ldr	r1, .L631+20
+	ldr	r0, .L631+24
 	bl	printf
-	b	.L620
-.L621:
+	b	.L623
+.L624:
 	adds	r1, r1, #1
 	mla	r6, r0, r1, r3
 	ldrh	r6, [r6, #-12]
 	cmp	r6, r5
-	bne	.L619
-.L620:
+	bne	.L622
+.L623:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, pc}
-.L624:
+.L627:
 	mla	r0, r7, r1, r3
 	ldr	r0, [r0, #4]
 	cmp	r0, #0
-	blt	.L623
+	blt	.L626
 	cmp	r6, r0
 	itt	hi
 	movhi	r6, r0
 	movhi	r4, r5
-.L623:
+.L626:
 	adds	r1, r1, #1
-	b	.L622
-.L627:
+	b	.L625
+.L630:
 	ldr	r6, [r3, #4]
 	cmp	r0, r6
-	bls	.L626
+	bls	.L629
 	ldrh	ip, [r3]
 	cmp	ip, r7
 	itt	ne
 	movne	r0, r6
 	movne	r4, r5
-.L626:
+.L629:
 	adds	r1, r1, #1
 	adds	r3, r3, #12
-	b	.L625
-.L629:
+	b	.L628
+.L632:
 	.align	2
-.L628:
+.L631:
 	.word	.LANCHOR67
 	.word	.LANCHOR96
 	.word	.LANCHOR97
@@ -4484,45 +4527,45 @@ select_l2p_ram_region:
 FtlUpdateVaildLpn:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L640
+	ldr	r2, .L643
 	push	{r4, r5, r6, lr}
 	mov	r1, r2
 	ldrh	r3, [r2]
 	cmp	r3, #4
-	bhi	.L631
-	cbnz	r0, .L631
+	bhi	.L634
+	cbnz	r0, .L634
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
 	pop	{r4, r5, r6, pc}
-.L631:
+.L634:
 	movs	r3, #0
-	ldr	r0, .L640+4
+	ldr	r0, .L643+4
 	strh	r3, [r1]	@ movhi
 	movw	r6, #65535
-	ldr	r1, .L640+8
+	ldr	r1, .L643+8
 	ldrh	r4, [r0]
 	mov	r0, r3
-	ldr	r2, .L640+12
+	ldr	r2, .L643+12
 	ldr	r1, [r1]
 	str	r3, [r2]
 	add	r4, r1, r4, lsl #1
-.L632:
+.L635:
 	cmp	r1, r4
-	bne	.L634
-	cbz	r3, .L630
+	bne	.L637
+	cbz	r3, .L633
 	str	r0, [r2]
-.L630:
+.L633:
 	pop	{r4, r5, r6, pc}
-.L634:
+.L637:
 	ldrh	r5, [r1], #2
 	cmp	r5, r6
 	itt	ne
 	addne	r0, r0, r5
 	movne	r3, #1
-	b	.L632
-.L641:
+	b	.L635
+.L644:
 	.align	2
-.L640:
+.L643:
 	.word	.LANCHOR99
 	.word	.LANCHOR40
 	.word	.LANCHOR83
@@ -4541,10 +4584,10 @@ ftl_set_blk_mode:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	mov	r3, r0
-	cbz	r1, .L643
+	cbz	r1, .L646
 	b	ftl_set_blk_mode.part.10
-.L643:
-	ldr	r2, .L644
+.L646:
+	ldr	r2, .L647
 	lsrs	r0, r0, #5
 	and	r3, r3, #31
 	ldr	r1, [r2]
@@ -4554,10 +4597,10 @@ ftl_set_blk_mode:
 	bic	r2, r2, r3
 	str	r2, [r1, r0, lsl #2]
 	bx	lr
-.L645:
+.L648:
 	.align	2
-.L644:
-	.word	.LANCHOR0
+.L647:
+	.word	.LANCHOR1
 	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
 	.section	.text.ftl_get_blk_mode,"ax",%progbits
 	.align	1
@@ -4571,7 +4614,7 @@ ftl_get_blk_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L647
+	ldr	r3, .L650
 	lsrs	r2, r0, #5
 	and	r0, r0, #31
 	ldr	r3, [r3]
@@ -4579,10 +4622,10 @@ ftl_get_blk_mode:
 	lsr	r0, r3, r0
 	and	r0, r0, #1
 	bx	lr
-.L648:
+.L651:
 	.align	2
-.L647:
-	.word	.LANCHOR0
+.L650:
+	.word	.LANCHOR1
 	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
 	.section	.text.ftl_sb_update_avl_pages,"ax",%progbits
 	.align	1
@@ -4599,14 +4642,14 @@ ftl_sb_update_avl_pages:
 	push	{r4, r5, r6, lr}
 	strh	r3, [r0, #4]	@ movhi
 	movw	r6, #65535
-	ldr	r3, .L656
+	ldr	r3, .L659
 	ldrh	r4, [r3]
 	add	r3, r0, r2, lsl #1
 	adds	r3, r3, #14
-.L650:
+.L653:
 	cmp	r2, r4
-	bcc	.L652
-	ldr	r3, .L656+4
+	bcc	.L655
+	ldr	r3, .L659+4
 	add	r5, r0, #16
 	movw	r6, #65535
 	ldrh	r3, [r3]
@@ -4614,12 +4657,12 @@ ftl_sb_update_avl_pages:
 	subs	r1, r3, r1
 	movs	r3, #0
 	uxth	r1, r1
-.L653:
+.L656:
 	uxth	r2, r3
 	cmp	r4, r2
-	bhi	.L655
+	bhi	.L658
 	pop	{r4, r5, r6, pc}
-.L652:
+.L655:
 	ldrh	r5, [r3, #2]!
 	adds	r2, r2, #1
 	uxth	r2, r2
@@ -4628,8 +4671,8 @@ ftl_sb_update_avl_pages:
 	ldrhne	r5, [r0, #4]
 	addne	r5, r5, #1
 	strhne	r5, [r0, #4]	@ movhi
-	b	.L650
-.L655:
+	b	.L653
+.L658:
 	ldrh	r2, [r5], #2
 	adds	r3, r3, #1
 	cmp	r2, r6
@@ -4637,10 +4680,10 @@ ftl_sb_update_avl_pages:
 	ldrhne	r2, [r0, #4]
 	addne	r2, r2, r1
 	strhne	r2, [r0, #4]	@ movhi
-	b	.L653
-.L657:
+	b	.L656
+.L660:
 	.align	2
-.L656:
+.L659:
 	.word	.LANCHOR38
 	.word	.LANCHOR52
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
@@ -4655,44 +4698,44 @@ ftl_sb_update_avl_pages:
 make_superblock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L671
+	ldr	r3, .L674
 	ldrh	r2, [r0]
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L659
-	ldr	r1, .L671+4
-	movw	r2, #2575
-	ldr	r0, .L671+8
+	bcc	.L662
+	ldr	r1, .L674+4
+	movw	r2, #2577
+	ldr	r0, .L674+8
 	bl	printf
-	ldr	r1, .L671+12
-	ldr	r0, .L671+16
+	ldr	r1, .L674+12
+	ldr	r0, .L674+16
 	bl	printf
-.L659:
-	ldr	r3, .L671+20
+.L662:
+	ldr	r3, .L674+20
 	add	r6, r4, #16
-	ldr	r10, .L671+40
+	ldr	r10, .L674+40
 	movw	r7, #65535
 	movs	r5, #0
 	ldrh	r8, [r3]
 	strh	r5, [r4, #4]	@ movhi
 	strb	r5, [r4, #7]
-.L660:
+.L663:
 	uxth	r3, r5
 	cmp	r8, r3
-	bhi	.L662
-	ldr	r2, .L671+24
+	bhi	.L665
+	ldr	r2, .L674+24
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r2]
 	smulbb	r3, r3, r2
 	strh	r3, [r4, #4]	@ movhi
 	movs	r3, #0
 	strb	r3, [r4, #9]
-	ldr	r3, .L671+28
+	ldr	r3, .L674+28
 	ldr	r3, [r3]
-	cbz	r3, .L663
-	ldr	r3, .L671+32
+	cbz	r3, .L666
+	ldr	r3, .L674+32
 	ldrh	r2, [r4]
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r2, lsl #1]
@@ -4700,34 +4743,34 @@ make_superblock:
 	itt	ls
 	movls	r3, #1
 	strbls	r3, [r4, #9]
-.L663:
-	ldr	r3, .L671+36
+.L666:
+	ldr	r3, .L674+36
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L664
+	cbz	r3, .L667
 	movs	r3, #1
 	strb	r3, [r4, #9]
-.L664:
+.L667:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L662:
+.L665:
 	ldrh	r1, [r4]
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
 	strh	r7, [r6]	@ movhi
 	mov	fp, r0
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L661
+	cbnz	r0, .L664
 	strh	fp, [r6]	@ movhi
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	strb	r3, [r4, #7]
-.L661:
+.L664:
 	adds	r5, r5, #1
 	adds	r6, r6, #2
-	b	.L660
-.L672:
+	b	.L663
+.L675:
 	.align	2
-.L671:
+.L674:
 	.word	.LANCHOR40
 	.word	.LANCHOR101
 	.word	.LC5
@@ -4737,7 +4780,7 @@ make_superblock:
 	.word	.LANCHOR52
 	.word	.LANCHOR28
 	.word	.LANCHOR78
-	.word	.LANCHOR1
+	.word	.LANCHOR2
 	.word	.LANCHOR47
 	.size	make_superblock, .-make_superblock
 	.section	.text.update_multiplier_value,"ax",%progbits
@@ -4753,46 +4796,46 @@ update_multiplier_value:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
 	movs	r5, #0
-	ldr	r3, .L679
+	ldr	r3, .L682
 	mov	r6, r0
 	mov	r4, r5
-	ldr	r10, .L679+12
+	ldr	r10, .L682+12
 	ldrh	r7, [r3]
-	ldr	r3, .L679+4
+	ldr	r3, .L682+4
 	ldrh	r8, [r3]
-.L674:
+.L677:
 	uxth	r3, r5
 	cmp	r7, r3
-	bhi	.L676
-	cbz	r4, .L678
+	bhi	.L679
+	cbz	r4, .L681
 	mov	r1, r4
 	mov	r0, #32768
 	bl	__aeabi_idiv
-.L677:
-	ldr	r3, .L679+8
+.L680:
+	ldr	r3, .L682+8
 	movs	r2, #6
 	ldr	r3, [r3]
 	mla	r6, r2, r6, r3
 	strh	r0, [r6, #4]	@ movhi
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L676:
+.L679:
 	mov	r1, r6
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L675
+	cbnz	r0, .L678
 	add	r4, r4, r8
 	uxth	r4, r4
-.L675:
-	adds	r5, r5, #1
-	b	.L674
 .L678:
-	mov	r0, r4
+	adds	r5, r5, #1
 	b	.L677
-.L680:
+.L681:
+	mov	r0, r4
+	b	.L680
+.L683:
 	.align	2
-.L679:
+.L682:
 	.word	.LANCHOR38
 	.word	.LANCHOR52
 	.word	.LANCHOR81
@@ -4810,24 +4853,24 @@ GetFreeBlockMinEraseCount:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L684
+	ldr	r3, .L687
 	ldr	r0, [r3]
-	cbz	r0, .L682
-	ldr	r3, .L684+4
+	cbz	r0, .L685
+	ldr	r3, .L687+4
 	ldr	r3, [r3]
 	subs	r0, r0, r3
-	ldr	r3, .L684+8
+	ldr	r3, .L687+8
 	asrs	r0, r0, #1
 	muls	r0, r3, r0
-	ldr	r3, .L684+12
+	ldr	r3, .L687+12
 	ldr	r3, [r3]
 	uxth	r0, r0
 	ldrh	r0, [r3, r0, lsl #1]
-.L682:
-	bx	lr
 .L685:
+	bx	lr
+.L688:
 	.align	2
-.L684:
+.L687:
 	.word	.LANCHOR87
 	.word	.LANCHOR81
 	.word	-1431655765
@@ -4844,11 +4887,11 @@ GetFreeBlockMinEraseCount:
 GetFreeBlockMaxEraseCount:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L694
+	ldr	r3, .L697
 	push	{r4, r5, r6, lr}
 	ldr	r3, [r3]
-	cbz	r3, .L692
-	ldr	r2, .L694+4
+	cbz	r3, .L695
+	ldr	r2, .L697+4
 	movs	r5, #6
 	movw	r6, #65535
 	ldrh	r2, [r2]
@@ -4857,37 +4900,37 @@ GetFreeBlockMaxEraseCount:
 	cmp	r0, r2
 	it	gt
 	uxthgt	r0, r2
-	ldr	r2, .L694+8
+	ldr	r2, .L697+8
 	ldr	r1, [r2]
-	ldr	r2, .L694+12
+	ldr	r2, .L697+12
 	subs	r3, r3, r1
 	asrs	r3, r3, #1
 	muls	r3, r2, r3
 	movs	r2, #0
 	uxth	r3, r3
-.L689:
+.L692:
 	uxth	r4, r2
 	cmp	r0, r4
-	bls	.L691
+	bls	.L694
 	mul	r4, r5, r3
 	adds	r2, r2, #1
 	ldrh	r4, [r1, r4]
 	cmp	r4, r6
-	bne	.L693
-.L691:
-	ldr	r2, .L694+16
+	bne	.L696
+.L694:
+	ldr	r2, .L697+16
 	ldr	r2, [r2]
 	ldrh	r0, [r2, r3, lsl #1]
 	pop	{r4, r5, r6, pc}
-.L693:
+.L696:
 	mov	r3, r4
-	b	.L689
-.L692:
+	b	.L692
+.L695:
 	mov	r0, r3
 	pop	{r4, r5, r6, pc}
-.L695:
+.L698:
 	.align	2
-.L694:
+.L697:
 	.word	.LANCHOR87
 	.word	.LANCHOR88
 	.word	.LANCHOR81
@@ -4908,18 +4951,18 @@ free_data_superblock:
 	movw	r2, #65535
 	push	{r3, lr}
 	cmp	r0, r2
-	beq	.L697
-	ldr	r2, .L698
+	beq	.L700
+	ldr	r2, .L701
 	movs	r1, #0
 	ldr	r2, [r2]
 	strh	r1, [r2, r0, lsl #1]	@ movhi
 	bl	INSERT_FREE_LIST
-.L697:
+.L700:
 	movs	r0, #0
 	pop	{r3, pc}
-.L699:
+.L702:
 	.align	2
-.L698:
+.L701:
 	.word	.LANCHOR83
 	.size	free_data_superblock, .-free_data_superblock
 	.section	.text.FtlGcBufInit,"ax",%progbits
@@ -4935,54 +4978,54 @@ FtlGcBufInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #0
-	ldr	r1, .L705
+	ldr	r1, .L708
 	mov	fp, #1
-	ldr	r2, .L705+4
+	ldr	r2, .L708+4
 	ldr	r5, [r1]
-	ldr	r1, .L705+8
+	ldr	r1, .L708+8
 	str	r3, [r2]
-	ldr	r2, .L705+12
+	ldr	r2, .L708+12
 	mov	r0, r5
 	ldr	r1, [r1]
 	ldrh	r2, [r2]
 	str	r1, [sp, #4]
-	ldr	r1, .L705+16
+	ldr	r1, .L708+16
 	ldrh	r1, [r1]
 	str	r1, [sp]
-	ldr	r1, .L705+20
+	ldr	r1, .L708+20
 	ldr	r10, [r1]
-	ldr	r1, .L705+24
+	ldr	r1, .L708+24
 	ldrh	r7, [r1]
-	ldr	r1, .L705+28
+	ldr	r1, .L708+28
 	ldr	r4, [r1]
 	movs	r1, #12
 	mla	r1, r2, r1, r1
 	adds	r4, r4, #8
 	add	r8, r5, r1
 	mov	r1, r3
-.L701:
+.L704:
 	adds	r0, r0, #12
 	ldr	r6, [sp]
 	cmp	r0, r8
 	add	ip, r3, r7
 	add	r4, r4, #36
 	add	lr, r1, r6
-	bne	.L702
-	ldr	r3, .L705+32
+	bne	.L705
+	ldr	r3, .L708+32
 	mov	lr, #12
 	mov	r8, #0
 	ldr	r0, [r3]
-	ldr	r3, .L705+8
+	ldr	r3, .L708+8
 	ldr	r4, [r3]
-	ldr	r3, .L705+20
+	ldr	r3, .L708+20
 	ldr	ip, [r3]
-.L703:
+.L706:
 	cmp	r2, r0
-	bcc	.L704
+	bcc	.L707
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L702:
+.L705:
 	bic	r1, r1, #3
 	bic	r3, r3, #3
 	mov	r6, r1
@@ -4996,8 +5039,8 @@ FtlGcBufInit:
 	str	r3, [r4, #-32]
 	mov	r3, ip
 	str	r6, [r4, #-36]
-	b	.L701
-.L704:
+	b	.L704
+.L707:
 	ldr	r3, [sp]
 	mul	r10, lr, r2
 	muls	r3, r2, r3
@@ -5012,10 +5055,10 @@ FtlGcBufInit:
 	bic	r3, r3, #3
 	add	r3, r3, ip
 	str	r3, [r1, #4]
-	b	.L703
-.L706:
+	b	.L706
+.L709:
 	.align	2
-.L705:
+.L708:
 	.word	.LANCHOR103
 	.word	.LANCHOR102
 	.word	.LANCHOR104
@@ -5037,41 +5080,41 @@ FtlGcBufInit:
 FtlGcBufFree:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L714
+	ldr	r3, .L717
 	mov	ip, #12
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
 	mov	fp, #36
 	mov	lr, r4
 	ldr	r7, [r3]
-	ldr	r3, .L714+4
+	ldr	r3, .L717+4
 	ldr	r5, [r3]
-.L708:
+.L711:
 	uxth	r3, r4
 	cmp	r1, r3
-	bls	.L707
+	bls	.L710
 	mla	r8, fp, r3, r0
 	movs	r2, #0
-.L709:
+.L712:
 	uxth	r3, r2
 	cmp	r7, r3
-	bls	.L710
+	bls	.L713
 	mul	r3, ip, r3
 	ldr	r6, [r8, #8]
 	adds	r2, r2, #1
 	add	r10, r5, r3
 	ldr	r3, [r5, r3]
 	cmp	r3, r6
-	bne	.L709
+	bne	.L712
 	str	lr, [r10, #8]
-.L710:
+.L713:
 	adds	r4, r4, #1
-	b	.L708
-.L707:
+	b	.L711
+.L710:
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L715:
+.L718:
 	.align	2
-.L714:
+.L717:
 	.word	.LANCHOR107
 	.word	.LANCHOR103
 	.size	FtlGcBufFree, .-FtlGcBufFree
@@ -5086,43 +5129,43 @@ FtlGcBufFree:
 FtlGcBufAlloc:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L723
+	ldr	r3, .L726
 	movs	r2, #0
 	push	{r4, r5, r6, r7, r8, r10, lr}
 	mov	ip, #12
 	movs	r7, #1
 	mov	lr, #36
 	ldr	r4, [r3]
-	ldr	r3, .L723+4
+	ldr	r3, .L726+4
 	ldr	r5, [r3]
-.L717:
+.L720:
 	uxth	r8, r2
 	cmp	r1, r8
-	bhi	.L721
+	bhi	.L724
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L721:
+.L724:
 	mov	r10, #0
-.L718:
+.L721:
 	uxth	r3, r10
 	cmp	r4, r3
-	bls	.L719
+	bls	.L722
 	mla	r3, ip, r3, r5
 	add	r10, r10, #1
 	ldr	r6, [r3, #8]
 	cmp	r6, #0
-	bne	.L718
+	bne	.L721
 	mla	r8, lr, r8, r0
 	str	r7, [r3, #8]
 	ldr	r6, [r3]
 	ldr	r3, [r3, #4]
 	str	r6, [r8, #8]
 	str	r3, [r8, #12]
-.L719:
+.L722:
 	adds	r2, r2, #1
-	b	.L717
-.L724:
+	b	.L720
+.L727:
 	.align	2
-.L723:
+.L726:
 	.word	.LANCHOR107
 	.word	.LANCHOR103
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
@@ -5138,25 +5181,25 @@ IsBlkInGcList:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L730
-	ldr	r2, .L730+4
+	ldr	r3, .L733
+	ldr	r2, .L733+4
 	ldr	r3, [r3]
 	ldrh	r2, [r2]
 	add	r2, r3, r2, lsl #1
-.L726:
+.L729:
 	cmp	r3, r2
-	bne	.L728
+	bne	.L731
 	movs	r0, #0
 	bx	lr
-.L728:
+.L731:
 	ldrh	r1, [r3], #2
 	cmp	r1, r0
-	bne	.L726
+	bne	.L729
 	movs	r0, #1
 	bx	lr
-.L731:
+.L734:
 	.align	2
-.L730:
+.L733:
 	.word	.LANCHOR108
 	.word	.LANCHOR109
 	.size	IsBlkInGcList, .-IsBlkInGcList
@@ -5173,35 +5216,35 @@ FtlGcUpdatePage:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r5, r0
-	ldr	r4, .L736
+	ldr	r4, .L739
 	ubfx	r0, r0, #10, #16
 	mov	r6, r1
 	mov	r7, r2
 	bl	P2V_block_in_plane
-	ldr	r3, .L736+4
+	ldr	r3, .L739+4
 	ldrh	r1, [r4]
 	ldr	r2, [r3]
 	movs	r3, #0
-.L733:
+.L736:
 	uxth	ip, r3
 	cmp	ip, r1
-	bcc	.L735
-	bne	.L734
+	bcc	.L738
+	bne	.L737
 	strh	r0, [r2, ip, lsl #1]	@ movhi
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	b	.L734
-.L735:
+	b	.L737
+.L738:
 	adds	r3, r3, #1
 	add	ip, r2, r3, lsl #1
 	ldrh	ip, [ip, #-2]
 	cmp	ip, r0
-	bne	.L733
-.L734:
-	ldr	r2, .L736+8
+	bne	.L736
+.L737:
+	ldr	r2, .L739+8
 	movs	r0, #12
-	ldr	r1, .L736+12
+	ldr	r1, .L739+12
 	ldrh	r3, [r2]
 	ldr	r1, [r1]
 	muls	r0, r3, r0
@@ -5212,9 +5255,9 @@ FtlGcUpdatePage:
 	str	r5, [r1, r0]
 	strh	r3, [r2]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.L737:
+.L740:
 	.align	2
-.L736:
+.L739:
 	.word	.LANCHOR109
 	.word	.LANCHOR108
 	.word	.LANCHOR110
@@ -5231,48 +5274,48 @@ FtlGcUpdatePage:
 FtlGcRefreshOpenBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	ip, .L743+12
+	ldr	ip, .L746+12
 	push	{r4, r5, r6, r7, lr}
 	ldrh	lr, [ip]
 	cmp	lr, r0
-	beq	.L739
-	ldr	r6, .L743
+	beq	.L742
+	ldr	r6, .L746
 	ldrh	r7, [r6]
 	cmp	r0, r7
-	beq	.L739
-	ldr	r4, .L743+4
+	beq	.L742
+	ldr	r4, .L746+4
 	ldrh	r5, [r4]
 	cmp	r0, r5
-	beq	.L739
-	ldr	r2, .L743+8
+	beq	.L742
+	ldr	r2, .L746+8
 	ldrh	r1, [r2]
 	cmp	r0, r1
-	beq	.L739
+	beq	.L742
 	movw	r3, #65535
 	cmp	lr, r3
-	bne	.L740
+	bne	.L743
 	strh	r0, [ip]	@ movhi
-.L739:
+.L742:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, pc}
-.L740:
+.L743:
 	cmp	r7, r3
-	bne	.L741
+	bne	.L744
 	strh	r0, [r6]	@ movhi
-	b	.L739
-.L741:
+	b	.L742
+.L744:
 	cmp	r5, r3
-	bne	.L742
+	bne	.L745
 	strh	r0, [r4]	@ movhi
-	b	.L739
-.L742:
+	b	.L742
+.L745:
 	cmp	r1, r3
 	it	eq
 	strheq	r0, [r2]	@ movhi
-	b	.L739
-.L744:
+	b	.L742
+.L747:
 	.align	2
-.L743:
+.L746:
 	.word	.LANCHOR113
 	.word	.LANCHOR114
 	.word	.LANCHOR115
@@ -5289,51 +5332,51 @@ FtlGcRefreshOpenBlock:
 FtlGcRefreshBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	ip, .L755+12
+	ldr	ip, .L758+12
 	push	{r4, r5, r6, r7, lr}
 	ldrh	lr, [ip]
 	cmp	lr, r0
-	beq	.L753
-	ldr	r6, .L755
+	beq	.L756
+	ldr	r6, .L758
 	ldrh	r7, [r6]
 	cmp	r0, r7
-	beq	.L753
-	ldr	r4, .L755+4
+	beq	.L756
+	ldr	r4, .L758+4
 	ldrh	r5, [r4]
 	cmp	r0, r5
-	beq	.L753
-	ldr	r2, .L755+8
+	beq	.L756
+	ldr	r2, .L758+8
 	ldrh	r1, [r2]
 	cmp	r0, r1
-	beq	.L753
+	beq	.L756
 	movw	r3, #65535
 	cmp	lr, r3
-	bne	.L747
+	bne	.L750
 	strh	r0, [ip]	@ movhi
-.L753:
+.L756:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, pc}
-.L747:
+.L750:
 	cmp	r7, r3
-	bne	.L748
+	bne	.L751
 	strh	r0, [r6]	@ movhi
-	b	.L753
-.L748:
+	b	.L756
+.L751:
 	cmp	r5, r3
-	bne	.L749
+	bne	.L752
 	strh	r0, [r4]	@ movhi
-	b	.L753
-.L749:
+	b	.L756
+.L752:
 	cmp	r1, r3
-	bne	.L754
+	bne	.L757
 	strh	r0, [r2]	@ movhi
-	b	.L753
-.L754:
+	b	.L756
+.L757:
 	mov	r0, #-1
 	pop	{r4, r5, r6, r7, pc}
-.L756:
+.L759:
 	.align	2
-.L755:
+.L758:
 	.word	.LANCHOR113
 	.word	.LANCHOR114
 	.word	.LANCHOR115
@@ -5355,44 +5398,44 @@ FtlGcMarkBadPhyBlk:
 	bl	P2V_block_in_plane
 	mov	r5, r0
 	bl	FtlGcRefreshBlock
-	ldr	r3, .L765
+	ldr	r3, .L768
 	ldr	r3, [r3]
-	cbz	r3, .L758
-	ldr	r3, .L765+4
+	cbz	r3, .L761
+	ldr	r3, .L768+4
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r5, lsl #1]
 	cmp	r3, #39
 	itt	hi
 	subhi	r3, r3, #40
 	strhhi	r3, [r2, r5, lsl #1]	@ movhi
-.L758:
-	ldr	r2, .L765+8
+.L761:
+	ldr	r2, .L768+8
 	movs	r1, #0
-	ldr	r5, .L765+12
+	ldr	r5, .L768+12
 	ldrh	r3, [r2]
-.L759:
+.L762:
 	uxth	r0, r1
 	cmp	r3, r0
-	bhi	.L761
+	bhi	.L764
 	cmp	r3, #15
 	itttt	ls
 	addls	r1, r3, #1
 	strhls	r1, [r2]	@ movhi
-	ldrls	r2, .L765+12
+	ldrls	r2, .L768+12
 	strhls	r4, [r2, r3, lsl #1]	@ movhi
-	b	.L760
-.L761:
+	b	.L763
+.L764:
 	adds	r1, r1, #1
 	add	r0, r5, r1, lsl #1
 	ldrh	r0, [r0, #-2]
 	cmp	r0, r4
-	bne	.L759
-.L760:
+	bne	.L762
+.L763:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L766:
+.L769:
 	.align	2
-.L765:
+.L768:
 	.word	.LANCHOR28
 	.word	.LANCHOR78
 	.word	.LANCHOR116
@@ -5409,22 +5452,22 @@ FtlGcMarkBadPhyBlk:
 FtlGcReFreshBadBlk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L773
+	ldr	r3, .L776
 	push	{r4, lr}
 	ldrh	r3, [r3]
-	cbz	r3, .L768
-	ldr	r2, .L773+4
+	cbz	r3, .L771
+	ldr	r2, .L776+4
 	ldrh	r1, [r2]
 	movw	r2, #65535
 	cmp	r1, r2
-	bne	.L768
-	ldr	r4, .L773+8
+	bne	.L771
+	ldr	r4, .L776+8
 	ldrh	r2, [r4]
 	cmp	r2, r3
 	itt	cs
 	movcs	r3, #0
 	strhcs	r3, [r4]	@ movhi
-	ldr	r3, .L773+12
+	ldr	r3, .L776+12
 	ldrh	r2, [r4]
 	ldrh	r0, [r3, r2, lsl #1]
 	bl	P2V_block_in_plane
@@ -5432,12 +5475,12 @@ FtlGcReFreshBadBlk:
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-.L768:
+.L771:
 	movs	r0, #0
 	pop	{r4, pc}
-.L774:
+.L777:
 	.align	2
-.L773:
+.L776:
 	.word	.LANCHOR116
 	.word	.LANCHOR112
 	.word	.LANCHOR118
@@ -5455,17 +5498,17 @@ flash_boot_enter_slc_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L777
+	ldr	r3, .L780
 	ldr	r2, [r3]
-	ldr	r3, .L777+4
+	ldr	r3, .L780+4
 	cmp	r2, r3
-	bne	.L775
+	bne	.L778
 	b	flash_enter_slc_mode
-.L775:
-	bx	lr
 .L778:
+	bx	lr
+.L781:
 	.align	2
-.L777:
+.L780:
 	.word	.LANCHOR119
 	.word	1446522928
 	.size	flash_boot_enter_slc_mode, .-flash_boot_enter_slc_mode
@@ -5481,17 +5524,17 @@ flash_boot_exit_slc_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L781
+	ldr	r3, .L784
 	ldr	r2, [r3]
-	ldr	r3, .L781+4
+	ldr	r3, .L784+4
 	cmp	r2, r3
-	bne	.L779
+	bne	.L782
 	b	flash_exit_slc_mode
-.L779:
-	bx	lr
 .L782:
+	bx	lr
+.L785:
 	.align	2
-.L781:
+.L784:
 	.word	.LANCHOR119
 	.word	1446522928
 	.size	flash_boot_exit_slc_mode, .-flash_boot_exit_slc_mode
@@ -5507,7 +5550,7 @@ FW_FlashBlockErase.constprop.41:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	mov	r4, r0
-	ldr	r3, .L784
+	ldr	r3, .L787
 	movs	r0, #0
 	ldr	r3, [r3]
 	ldrb	r5, [r3, #9]	@ zero_extendqisi2
@@ -5524,9 +5567,9 @@ FW_FlashBlockErase.constprop.41:
 	bl	flash_boot_exit_slc_mode
 	uxtb	r0, r4
 	pop	{r3, r4, r5, pc}
-.L785:
+.L788:
 	.align	2
-.L784:
+.L787:
 	.word	.LANCHOR18
 	.size	FW_FlashBlockErase.constprop.41, .-FW_FlashBlockErase.constprop.41
 	.section	.text.ftl_memset,"ax",%progbits
@@ -5556,54 +5599,54 @@ BuildFlashLsbPageTable:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
 	mov	r4, r1
-	cbnz	r0, .L788
-	ldr	r3, .L828
-.L789:
+	cbnz	r0, .L791
+	ldr	r3, .L831
+.L792:
 	strh	r0, [r3, r0, lsl #1]	@ movhi
 	adds	r0, r0, #1
 	cmp	r0, #256
-	bne	.L789
-.L795:
+	bne	.L792
+.L798:
 	movs	r1, #255
 	mov	r2, #1024
-	ldr	r0, .L828+4
+	ldr	r0, .L831+4
 	uxth	r4, r4
 	bl	ftl_memset
-	ldr	r1, .L828
+	ldr	r1, .L831
 	movs	r3, #0
-	ldr	r0, .L828+4
-.L790:
+	ldr	r0, .L831+4
+.L793:
 	uxth	r2, r3
 	cmp	r4, r2
-	bhi	.L814
+	bhi	.L817
 	pop	{r4, pc}
-.L788:
+.L791:
 	cmp	r0, #1
-	bne	.L791
-	ldr	r1, .L828
+	bne	.L794
+	ldr	r1, .L831
 	movs	r3, #0
-.L794:
+.L797:
 	cmp	r3, #3
 	uxth	r2, r3
-	bls	.L792
+	bls	.L795
 	tst	r2, #1
 	ite	ne
 	movne	r0, #3
 	moveq	r0, #2
 	rsb	r2, r0, r2, lsl #1
 	uxth	r2, r2
-.L792:
+.L795:
 	strh	r2, [r1, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	cmp	r3, #256
-	bne	.L794
-	b	.L795
-.L791:
+	bne	.L797
+	b	.L798
+.L794:
 	cmp	r0, #2
-	bne	.L796
-	ldr	r1, .L828
+	bne	.L799
+	ldr	r1, .L831
 	movs	r2, #0
-.L798:
+.L801:
 	uxth	r3, r2
 	cmp	r2, #1
 	ittt	hi
@@ -5613,34 +5656,34 @@ BuildFlashLsbPageTable:
 	strh	r3, [r1, r2, lsl #1]	@ movhi
 	adds	r2, r2, #1
 	cmp	r2, #256
-	bne	.L798
-	b	.L795
-.L796:
+	bne	.L801
+	b	.L798
+.L799:
 	cmp	r0, #3
-	bne	.L799
-	ldr	r1, .L828
+	bne	.L802
+	ldr	r1, .L831
 	movs	r3, #0
-.L802:
+.L805:
 	cmp	r3, #5
 	uxth	r2, r3
-	bls	.L800
+	bls	.L803
 	tst	r2, #1
 	ite	ne
 	movne	r0, #5
 	moveq	r0, #4
 	rsb	r2, r0, r2, lsl #1
 	uxth	r2, r2
-.L800:
+.L803:
 	strh	r2, [r1, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	cmp	r3, #256
-	bne	.L802
-	b	.L795
-.L799:
+	bne	.L805
+	b	.L798
+.L802:
 	cmp	r0, #4
 	mov	r3, #0
-	bne	.L803
-	ldr	r2, .L828
+	bne	.L806
+	ldr	r2, .L831
 	strh	r3, [r2]	@ movhi
 	movs	r3, #1
 	strh	r3, [r2, #2]	@ movhi
@@ -5655,7 +5698,7 @@ BuildFlashLsbPageTable:
 	movs	r3, #8
 	strh	r0, [r2, #8]	@ movhi
 	strh	r3, [r2, #14]!	@ movhi
-.L805:
+.L808:
 	tst	r3, #1
 	ite	ne
 	movne	r1, #7
@@ -5665,52 +5708,52 @@ BuildFlashLsbPageTable:
 	uxth	r3, r3
 	strh	r1, [r2, #2]!	@ movhi
 	cmp	r3, #256
-	bne	.L805
-	b	.L795
-.L803:
+	bne	.L808
+	b	.L798
+.L806:
 	cmp	r0, #5
-	bne	.L806
-	ldr	r2, .L828
-.L807:
+	bne	.L809
+	ldr	r2, .L831
+.L810:
 	strh	r3, [r2, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	cmp	r3, #16
-	bne	.L807
-	ldr	r2, .L828+8
-.L808:
+	bne	.L810
+	ldr	r2, .L831+8
+.L811:
 	strh	r3, [r2, #2]!	@ movhi
 	adds	r3, r3, #2
 	uxth	r3, r3
 	cmp	r3, #496
-	bne	.L808
-	b	.L795
-.L806:
+	bne	.L811
+	b	.L798
+.L809:
 	cmp	r0, #6
-	bne	.L809
-	ldr	r0, .L828
+	bne	.L812
+	ldr	r0, .L831
 	mov	r1, r3
-.L812:
+.L815:
 	cmp	r1, #5
 	uxth	r2, r1
-	bls	.L810
+	bls	.L813
 	tst	r2, #1
 	ite	ne
 	movne	r2, #12
 	moveq	r2, #10
 	subs	r2, r3, r2
 	uxth	r2, r2
-.L810:
+.L813:
 	strh	r2, [r0, r1, lsl #1]	@ movhi
 	adds	r1, r1, #1
 	cmp	r1, #256
 	add	r3, r3, #3
 	uxth	r3, r3
-	bne	.L812
-	b	.L795
-.L809:
+	bne	.L815
+	b	.L798
+.L812:
 	cmp	r0, #9
-	bne	.L795
-	ldr	r2, .L828
+	bne	.L798
+	ldr	r2, .L831
 	movw	r1, #509
 	strh	r3, [r2]	@ movhi
 	movs	r3, #1
@@ -5719,21 +5762,21 @@ BuildFlashLsbPageTable:
 	movs	r2, #2
 	strh	r2, [r3, #4]!	@ movhi
 	movs	r2, #3
-.L813:
+.L816:
 	strh	r2, [r3, #2]!	@ movhi
 	adds	r2, r2, #2
 	uxth	r2, r2
 	cmp	r2, r1
-	bne	.L813
-	b	.L795
-.L814:
+	bne	.L816
+	b	.L798
+.L817:
 	ldrh	r2, [r1, r3, lsl #1]
 	adds	r3, r3, #1
 	strh	r2, [r0, r2, lsl #1]	@ movhi
-	b	.L790
-.L829:
+	b	.L793
+.L832:
 	.align	2
-.L828:
+.L831:
 	.word	.LANCHOR16
 	.word	.LANCHOR120
 	.word	.LANCHOR16+30
@@ -5749,82 +5792,82 @@ BuildFlashLsbPageTable:
 FlashDieInfoInit:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L844
+	ldr	r3, .L847
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r5, .L844+4
-	ldr	fp, .L844+36
+	ldr	r5, .L847+4
+	ldr	fp, .L847+36
 	ldrh	r0, [r3, #10]
 	strb	r4, [r5]
 	strb	r4, [fp]
 	bl	FlashBlockAlignInit
 	movs	r2, #8
 	mov	r1, r4
-	ldr	r0, .L844+8
+	ldr	r0, .L847+8
 	bl	ftl_memset
 	movs	r2, #32
 	mov	r1, r4
-	ldr	r0, .L844+12
+	ldr	r0, .L847+12
 	bl	ftl_memset
 	movs	r2, #128
 	mov	r1, r4
-	ldr	r0, .L844+16
+	ldr	r0, .L847+16
 	bl	ftl_memset
-	ldr	r3, .L844+20
-	ldr	r10, .L844+32
+	ldr	r3, .L847+20
+	ldr	r10, .L847+32
 	ldr	r6, [r3]
-	ldr	r3, .L844+8
+	ldr	r3, .L847+8
 	ldrb	r8, [r6]	@ zero_extendqisi2
 	adds	r7, r6, #1
-.L832:
+.L835:
 	mov	r2, r8
 	add	r1, r10, r4, lsl #3
 	mov	r0, r7
 	str	r3, [sp, #4]
 	bl	FlashMemCmp8
 	ldr	r3, [sp, #4]
-	cbnz	r0, .L831
+	cbnz	r0, .L834
 	ldrb	r2, [r5]	@ zero_extendqisi2
-	ldr	r1, .L844+12
+	ldr	r1, .L847+12
 	strb	r4, [r3, r2]
 	str	r0, [r1, r2, lsl #2]
 	adds	r1, r2, #1
 	strb	r1, [r5]
-.L831:
+.L834:
 	adds	r4, r4, #1
 	cmp	r4, #4
-	bne	.L832
+	bne	.L835
 	ldrb	r3, [r5]	@ zero_extendqisi2
 	strb	r3, [fp]
 	ldrb	r3, [r6, #8]	@ zero_extendqisi2
 	cmp	r3, #2
-	beq	.L833
-.L837:
+	beq	.L836
+.L840:
 	ldrh	r2, [r6, #14]
 	ldrb	r3, [r5]	@ zero_extendqisi2
 	smulbb	r3, r3, r2
 	ldrb	r2, [r6, #13]	@ zero_extendqisi2
 	smulbb	r3, r3, r2
-	ldr	r2, .L844+24
+	ldr	r2, .L847+24
 	strh	r3, [r2]	@ movhi
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L833:
-	ldr	r3, .L844+28
+.L836:
+	ldr	r3, .L847+28
 	movs	r4, #0
-	ldr	r10, .L844+12
+	ldr	r10, .L847+12
 	ldr	fp, [r3]
-	ldr	r3, .L844+8
-.L836:
+	ldr	r3, .L847+8
+.L839:
 	str	r3, [sp, #4]
 	mov	r2, r8
-	ldr	r3, .L844+32
+	ldr	r3, .L847+32
 	mov	r0, r7
 	add	r1, r3, r4, lsl #3
 	bl	FlashMemCmp8
 	ldr	r3, [sp, #4]
-	cbnz	r0, .L834
+	cbnz	r0, .L837
 	ldrh	r2, [r6, #14]
 	ldrb	r1, [r5]	@ zero_extendqisi2
 	and	r0, r2, #65280
@@ -5833,21 +5876,21 @@ FlashDieInfoInit:
 	muls	r2, r0, r2
 	str	r2, [r10, r1, lsl #2]
 	ldrb	r0, [r6, #23]	@ zero_extendqisi2
-	cbz	r0, .L835
+	cbz	r0, .L838
 	lsls	r2, r2, #1
 	str	r2, [r10, r1, lsl #2]
-.L835:
+.L838:
 	adds	r2, r1, #1
 	strb	r4, [r3, r1]
 	strb	r2, [r5]
-.L834:
+.L837:
 	adds	r4, r4, #1
 	cmp	r4, #4
-	bne	.L836
-	b	.L837
-.L845:
+	bne	.L839
+	b	.L840
+.L848:
 	.align	2
-.L844:
+.L847:
 	.word	.LANCHOR31
 	.word	.LANCHOR25
 	.word	.LANCHOR26
@@ -5855,7 +5898,7 @@ FlashDieInfoInit:
 	.word	.LANCHOR23
 	.word	.LANCHOR18
 	.word	.LANCHOR122
-	.word	.LANCHOR3
+	.word	.LANCHOR4
 	.word	.LANCHOR22
 	.word	.LANCHOR121
 	.size	FlashDieInfoInit, .-FlashDieInfoInit
@@ -5875,10 +5918,10 @@ ReadFlashInfo:
 	movs	r1, #0
 	mov	r4, r0
 	bl	ftl_memset
-	ldr	r3, .L849
+	ldr	r3, .L852
 	movs	r2, #0
 	ldr	r1, [r3]
-	ldr	r3, .L849+4
+	ldr	r3, .L852+4
 	ldrb	r0, [r1, #9]	@ zero_extendqisi2
 	ldr	r3, [r3]
 	smulbb	r3, r3, r0
@@ -5886,10 +5929,10 @@ ReadFlashInfo:
 	strb	r3, [r4, #4]
 	lsrs	r3, r3, #8
 	strb	r3, [r4, #5]
-	ldr	r3, .L849+8
+	ldr	r3, .L852+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	strb	r3, [r4, #7]
-	ldr	r3, .L849+12
+	ldr	r3, .L852+12
 	ldrb	r5, [r3]	@ zero_extendqisi2
 	strb	r5, [r4]
 	ldrb	r5, [r3, #1]	@ zero_extendqisi2
@@ -5903,30 +5946,30 @@ ReadFlashInfo:
 	movs	r3, #32
 	strb	r3, [r4, #8]
 	ldrb	r3, [r1, #7]	@ zero_extendqisi2
-	ldr	r0, .L849+16
+	ldr	r0, .L852+16
 	strb	r2, [r4, #10]
 	strb	r3, [r4, #9]
-	ldr	r3, .L849+20
+	ldr	r3, .L852+20
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	mov	r3, r2
-.L847:
+.L850:
 	uxtb	r2, r3
 	cmp	r1, r2
-	bhi	.L848
+	bhi	.L851
 	pop	{r4, r5, r6, pc}
-.L848:
+.L851:
 	ldrb	r2, [r3, r0]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	ldrb	r6, [r4, #10]	@ zero_extendqisi2
 	lsl	r2, r5, r2
 	orrs	r2, r2, r6
 	strb	r2, [r4, #10]
-	b	.L847
-.L850:
+	b	.L850
+.L853:
 	.align	2
-.L849:
+.L852:
 	.word	.LANCHOR18
-	.word	.LANCHOR3
+	.word	.LANCHOR4
 	.word	.LANCHOR33
 	.word	.LANCHOR68
 	.word	.LANCHOR26
@@ -5943,35 +5986,35 @@ ReadFlashInfo:
 FtlBbt2Bitmap:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L857
+	ldr	r3, .L860
 	push	{r4, r5, r6, r7, r8, lr}
 	mov	r5, r0
-	ldr	r7, .L857+4
+	ldr	r7, .L860+4
 	mov	r6, r1
 	subs	r4, r5, #2
 	addw	r5, r5, #1022
 	ldrh	r2, [r3]
 	movs	r1, #0
-	ldr	r8, .L857+20
+	ldr	r8, .L860+20
 	mov	r0, r6
 	lsls	r2, r2, #2
 	bl	ftl_memset
-.L854:
+.L857:
 	ldrh	r3, [r4, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L851
+	beq	.L854
 	ldrh	r2, [r7]
 	cmp	r2, r3
-	bhi	.L853
+	bhi	.L856
 	mov	r1, r8
 	movs	r2, #79
-	ldr	r0, .L857+8
+	ldr	r0, .L860+8
 	bl	printf
-	ldr	r1, .L857+12
-	ldr	r0, .L857+16
+	ldr	r1, .L860+12
+	ldr	r0, .L860+16
 	bl	printf
-.L853:
+.L856:
 	ldrh	r3, [r4, #2]!
 	movs	r2, #1
 	cmp	r5, r4
@@ -5981,12 +6024,12 @@ FtlBbt2Bitmap:
 	ldr	r2, [r6, r1, lsl #2]
 	orr	r2, r2, r3
 	str	r2, [r6, r1, lsl #2]
-	bne	.L854
-.L851:
+	bne	.L857
+.L854:
 	pop	{r4, r5, r6, r7, r8, pc}
-.L858:
+.L861:
 	.align	2
-.L857:
+.L860:
 	.word	.LANCHOR123
 	.word	.LANCHOR51
 	.word	.LC5
@@ -6006,7 +6049,7 @@ FtlBbtMemInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r0, .L860
+	ldr	r0, .L863
 	movw	r3, #65535
 	movs	r2, #16
 	movs	r1, #255
@@ -6015,9 +6058,9 @@ FtlBbtMemInit:
 	strh	r3, [r0, #6]	@ movhi
 	adds	r0, r0, #12
 	b	ftl_memset
-.L861:
+.L864:
 	.align	2
-.L860:
+.L863:
 	.word	.LANCHOR74
 	.size	FtlBbtMemInit, .-FtlBbtMemInit
 	.section	.text.FtlFreeSysBlkQueueInit,"ax",%progbits
@@ -6031,7 +6074,7 @@ FtlBbtMemInit:
 FtlFreeSysBlkQueueInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L863
+	ldr	r3, .L866
 	mov	r2, #2048
 	push	{r4, lr}
 	movs	r4, #0
@@ -6044,9 +6087,9 @@ FtlFreeSysBlkQueueInit:
 	bl	ftl_memset
 	mov	r0, r4
 	pop	{r4, pc}
-.L864:
+.L867:
 	.align	2
-.L863:
+.L866:
 	.word	.LANCHOR75
 	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
 	.section	.text.ftl_free_no_use_map_blk,"ax",%progbits
@@ -6071,12 +6114,12 @@ ftl_free_no_use_map_blk:
 	mov	r0, r5
 	bl	ftl_memset
 	movs	r3, #0
-.L866:
+.L869:
 	ldrh	r1, [r4, #6]
 	uxth	r2, r3
 	cmp	r1, r2
-	bhi	.L870
-	ldr	r3, .L885
+	bhi	.L873
+	ldr	r3, .L888
 	movs	r6, #0
 	mov	r10, r6
 	ldrh	r2, [r3]
@@ -6084,59 +6127,59 @@ ftl_free_no_use_map_blk:
 	strh	r2, [r5, r3, lsl #1]	@ movhi
 	mov	r2, r6
 	ldrh	fp, [r5]
-.L871:
+.L874:
 	ldrh	r3, [r4, #10]
 	uxth	ip, r6
 	cmp	r3, ip
-	bhi	.L875
+	bhi	.L878
 	mov	r0, r10
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L870:
+.L873:
 	uxth	r2, r3
 	ldr	r1, [r6, r2, lsl #2]
 	movs	r2, #0
 	ubfx	r1, r1, #10, #16
-.L867:
+.L870:
 	ldrh	ip, [r4, #10]
 	uxth	r0, r2
 	cmp	ip, r0
-	bhi	.L869
+	bhi	.L872
 	adds	r3, r3, #1
-	b	.L866
-.L869:
+	b	.L869
+.L872:
 	uxth	r0, r2
 	ldrh	ip, [r7, r0, lsl #1]
 	cmp	ip, r1
-	bne	.L868
-	cbz	r1, .L868
+	bne	.L871
+	cbz	r1, .L871
 	ldrh	ip, [r5, r0, lsl #1]
 	add	ip, ip, #1
 	strh	ip, [r5, r0, lsl #1]	@ movhi
-.L868:
+.L871:
 	adds	r2, r2, #1
-	b	.L867
-.L875:
+	b	.L870
+.L878:
 	uxth	r1, r6
 	ldrh	r3, [r5, r1, lsl #1]
 	lsl	r8, r1, #1
 	cmp	fp, r3
-	bls	.L872
+	bls	.L875
 	ldrh	r0, [r7, r1, lsl #1]
 	add	r8, r8, r7
-	cbnz	r0, .L873
-.L874:
+	cbnz	r0, .L876
+.L877:
 	adds	r6, r6, #1
-	b	.L871
-.L872:
+	b	.L874
+.L875:
 	cmp	r3, #0
-	bne	.L874
+	bne	.L877
 	ldrh	r0, [r7, r1, lsl #1]
 	add	r8, r8, r7
 	cmp	r0, #0
-	beq	.L874
-.L876:
+	beq	.L877
+.L879:
 	movs	r1, #1
 	str	r2, [sp, #4]
 	bl	FtlFreeSysBlkQueueIn
@@ -6145,16 +6188,16 @@ ftl_free_no_use_map_blk:
 	ldrh	r3, [r4, #8]
 	subs	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	b	.L874
-.L873:
+	b	.L877
+.L876:
 	mov	r10, ip
 	mov	fp, r3
 	cmp	r3, #0
-	beq	.L876
-	b	.L874
-.L886:
+	beq	.L879
+	b	.L877
+.L889:
 	.align	2
-.L885:
+.L888:
 	.word	.LANCHOR53
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.section	.text.FtlL2PDataInit,"ax",%progbits
@@ -6170,14 +6213,14 @@ FtlL2PDataInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r1, #0
-	ldr	r5, .L890
-	ldr	r4, .L890+4
+	ldr	r5, .L893
+	ldr	r4, .L893+4
 	ldr	r2, [r5]
-	ldr	r7, .L890+8
-	ldr	r6, .L890+12
+	ldr	r7, .L893+8
+	ldr	r6, .L893+12
 	ldr	r0, [r4]
 	lsls	r2, r2, #1
-	ldr	r8, .L890+44
+	ldr	r8, .L893+44
 	bl	ftl_memset
 	ldrh	r3, [r7]
 	movs	r1, #255
@@ -6185,7 +6228,7 @@ FtlL2PDataInit:
 	ldr	r0, [r8]
 	muls	r2, r3, r2
 	bl	ftl_memset
-	ldr	r3, .L890+16
+	ldr	r3, .L893+16
 	movw	r0, #65535
 	ldrh	r1, [r6]
 	ldr	ip, [r8]
@@ -6196,47 +6239,47 @@ FtlL2PDataInit:
 	adds	r1, r2, r3
 	movs	r3, #0
 	mov	lr, r3
-.L888:
+.L891:
 	adds	r2, r2, #12
 	adds	r6, r3, r7
 	cmp	r2, r1
-	bne	.L889
-	ldr	r3, .L890+20
+	bne	.L892
+	ldr	r3, .L893+20
 	ldr	r2, [r5]
 	strh	r0, [r3, #2]	@ movhi
 	strh	r2, [r3, #10]	@ movhi
 	movw	r2, #61634
 	strh	r2, [r3, #4]	@ movhi
-	ldr	r2, .L890+24
+	ldr	r2, .L893+24
 	strh	r0, [r3]	@ movhi
 	ldrh	r2, [r2]
 	strh	r2, [r3, #8]	@ movhi
-	ldr	r2, .L890+28
+	ldr	r2, .L893+28
 	ldrh	r2, [r2]
 	strh	r2, [r3, #6]	@ movhi
-	ldr	r2, .L890+32
+	ldr	r2, .L893+32
 	ldr	r2, [r2]
 	str	r2, [r3, #12]
-	ldr	r2, .L890+36
+	ldr	r2, .L893+36
 	ldr	r2, [r2]
 	str	r2, [r3, #16]
 	ldr	r2, [r4]
 	str	r2, [r3, #20]
-	ldr	r2, .L890+40
+	ldr	r2, .L893+40
 	ldr	r2, [r2]
 	str	r2, [r3, #24]
 	pop	{r4, r5, r6, r7, r8, pc}
-.L889:
+.L892:
 	bic	r3, r3, #3
 	str	lr, [r2, #-8]
 	add	r3, r3, ip
 	strh	r0, [r2, #-12]	@ movhi
 	str	r3, [r2, #-4]
 	mov	r3, r6
-	b	.L888
-.L891:
+	b	.L891
+.L894:
 	.align	2
-.L890:
+.L893:
 	.word	.LANCHOR64
 	.word	.LANCHOR125
 	.word	.LANCHOR57
@@ -6263,57 +6306,57 @@ FtlVariablesInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #0
-	ldr	r3, .L893
+	ldr	r3, .L896
 	movw	r2, #65535
 	mov	r1, r4
-	ldr	r5, .L893+4
+	ldr	r5, .L896+4
 	str	r4, [r3]
-	ldr	r3, .L893+8
+	ldr	r3, .L896+8
 	strh	r2, [r3]	@ movhi
 	mov	r2, #-1
-	ldr	r3, .L893+12
+	ldr	r3, .L896+12
 	str	r4, [r3]
-	ldr	r3, .L893+16
+	ldr	r3, .L896+16
 	str	r4, [r3]
-	ldr	r3, .L893+20
+	ldr	r3, .L896+20
 	str	r2, [r3]
-	ldr	r3, .L893+24
+	ldr	r3, .L896+24
 	str	r4, [r3]
-	ldr	r3, .L893+28
+	ldr	r3, .L896+28
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L893+32
+	ldr	r3, .L896+32
 	ldrh	r2, [r3]
-	ldr	r3, .L893+36
+	ldr	r3, .L896+36
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L893+40
+	ldr	r3, .L896+40
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L893+44
+	ldr	r3, .L896+44
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	mov	r1, r4
 	movs	r2, #48
-	ldr	r0, .L893+48
+	ldr	r0, .L896+48
 	bl	ftl_memset
 	mov	r2, #512
 	mov	r1, r4
-	ldr	r0, .L893+52
+	ldr	r0, .L896+52
 	bl	ftl_memset
 	bl	FtlGcBufInit
 	bl	FtlL2PDataInit
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L894:
+.L897:
 	.align	2
-.L893:
+.L896:
 	.word	.LANCHOR132
 	.word	.LANCHOR41
 	.word	.LANCHOR133
@@ -6340,11 +6383,11 @@ FtlVariablesInit:
 SupperBlkListInit:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L906
+	ldr	r3, .L909
 	movs	r2, #6
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r1, #0
-	ldr	r6, .L906+4
+	ldr	r6, .L909+4
 	sub	sp, sp, #24
 	movs	r4, #0
 	ldrh	r3, [r3]
@@ -6354,39 +6397,39 @@ SupperBlkListInit:
 	mov	r10, r6
 	muls	r2, r3, r2
 	bl	ftl_memset
-	ldr	r3, .L906+8
-	ldr	r2, .L906+12
-	ldr	r1, .L906+16
+	ldr	r3, .L909+8
+	ldr	r2, .L909+12
+	ldr	r1, .L909+16
 	str	r4, [r3]
-	ldr	r3, .L906+20
+	ldr	r3, .L909+20
 	strh	r4, [r2]	@ movhi
 	strh	r4, [r1]	@ movhi
 	str	r4, [r3]
-	ldr	r3, .L906+24
+	ldr	r3, .L909+24
 	str	r2, [sp, #8]
 	str	r4, [r3]
-	ldr	r3, .L906+28
+	ldr	r3, .L909+28
 	mov	fp, r3
 	strh	r4, [r3]	@ movhi
-.L896:
-	ldr	r3, .L906+32
+.L899:
+	ldr	r3, .L909+32
 	sxth	r7, r4
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	bge	.L903
-	ldr	r3, .L906+36
+	bge	.L906
+	ldr	r3, .L909+36
 	uxth	r1, r4
 	str	r1, [sp, #12]
 	ldrh	r2, [r3]
-	ldr	r3, .L906+40
+	ldr	r3, .L909+40
 	ldrh	r3, [r3]
 	str	r3, [sp, #4]
 	movs	r3, #0
 	mov	r6, r3
-	b	.L904
-.L898:
+	b	.L907
+.L901:
 	str	r3, [sp, #20]
-	ldr	r3, .L906+44
+	ldr	r3, .L909+44
 	ldr	r1, [sp, #12]
 	str	r2, [sp, #16]
 	ldrb	r0, [r3, r0]	@ zero_extendqisi2
@@ -6394,85 +6437,85 @@ SupperBlkListInit:
 	bl	FtlBbmIsBadBlock
 	ldr	r2, [sp, #16]
 	ldr	r3, [sp, #20]
-	cbnz	r0, .L897
+	cbnz	r0, .L900
 	ldr	r1, [sp, #4]
 	add	r6, r6, r1
 	sxth	r6, r6
-.L897:
+.L900:
 	adds	r3, r3, #1
-.L904:
+.L907:
 	sxth	r0, r3
 	cmp	r0, r2
-	blt	.L898
+	blt	.L901
 	lsls	r3, r7, #1
-	cbz	r6, .L899
+	cbz	r6, .L902
 	mov	r1, r6
 	str	r3, [sp, #4]
 	mov	r0, #32768
 	bl	__aeabi_idiv
 	ldr	r3, [sp, #4]
 	sxth	r6, r0
-.L900:
+.L903:
 	ldr	r2, [r10]
 	add	r3, r3, r7
 	add	r2, r2, r3, lsl #1
-	ldr	r3, .L906+48
+	ldr	r3, .L909+48
 	strh	r6, [r2, #4]	@ movhi
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	beq	.L901
-	ldr	r3, .L906+52
+	beq	.L904
+	ldr	r3, .L909+52
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	beq	.L901
-	ldr	r3, .L906+56
+	beq	.L904
+	ldr	r3, .L909+56
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	beq	.L901
-	ldr	r3, .L906+60
+	beq	.L904
+	ldr	r3, .L909+60
 	uxth	r0, r4
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r7, lsl #1]
-	cbnz	r3, .L902
+	cbnz	r3, .L905
 	add	r8, r8, #1
 	uxth	r8, r8
 	bl	INSERT_FREE_LIST
-.L901:
+.L904:
 	adds	r4, r4, #1
-	b	.L896
-.L899:
-	ldr	r2, .L906+60
+	b	.L899
+.L902:
+	ldr	r2, .L909+60
 	movw	r1, #65535
 	ldr	r2, [r2]
 	strh	r1, [r2, r7, lsl #1]	@ movhi
-	b	.L900
-.L902:
+	b	.L903
+.L905:
 	adds	r5, r5, #1
 	uxth	r5, r5
 	bl	INSERT_DATA_LIST
-	b	.L901
-.L903:
+	b	.L904
+.L906:
 	ldr	r2, [sp, #8]
 	strh	r8, [fp]	@ movhi
 	strh	r5, [r2]	@ movhi
 	add	r5, r5, r8
 	cmp	r3, r5
-	bge	.L905
-	ldr	r1, .L906+64
-	movw	r2, #2645
-	ldr	r0, .L906+68
+	bge	.L908
+	ldr	r1, .L909+64
+	movw	r2, #2647
+	ldr	r0, .L909+68
 	bl	printf
-	ldr	r1, .L906+72
-	ldr	r0, .L906+76
+	ldr	r1, .L909+72
+	ldr	r0, .L909+76
 	bl	printf
-.L905:
+.L908:
 	movs	r0, #0
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L907:
+.L910:
 	.align	2
-.L906:
+.L909:
 	.word	.LANCHOR41
 	.word	.LANCHOR81
 	.word	.LANCHOR87
@@ -6505,16 +6548,16 @@ SupperBlkListInit:
 FtlGcPageVarInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L909
+	ldr	r2, .L912
 	movs	r3, #0
 	push	{r4, lr}
 	movs	r1, #255
-	ldr	r4, .L909+4
+	ldr	r4, .L912+4
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L909+8
+	ldr	r2, .L912+8
 	strh	r3, [r2]	@ movhi
 	ldrh	r2, [r4]
-	ldr	r3, .L909+12
+	ldr	r3, .L912+12
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
@@ -6522,14 +6565,14 @@ FtlGcPageVarInit:
 	movs	r2, #12
 	movs	r1, #255
 	muls	r2, r3, r2
-	ldr	r3, .L909+16
+	ldr	r3, .L912+16
 	ldr	r0, [r3]
 	bl	ftl_memset
 	pop	{r4, lr}
 	b	FtlGcBufInit
-.L910:
+.L913:
 	.align	2
-.L909:
+.L912:
 	.word	.LANCHOR109
 	.word	.LANCHOR54
 	.word	.LANCHOR110
@@ -6550,13 +6593,13 @@ idb_init:
 	push	{r3, lr}
 	mov	r2, #262144
 	movs	r1, #0
-	ldr	r0, .L912
+	ldr	r0, .L915
 	bl	ftl_memset
 	movs	r0, #0
 	pop	{r3, pc}
-.L913:
+.L916:
 	.align	2
-.L912:
+.L915:
 	.word	idb_buf
 	.size	idb_init, .-idb_init
 	.section	.text.ftl_memcpy,"ax",%progbits
@@ -6586,13 +6629,13 @@ FlashReadIdbData:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	mov	r2, #2048
-	ldr	r1, .L916
+	ldr	r1, .L919
 	bl	ftl_memcpy
 	movs	r0, #0
 	pop	{r3, pc}
-.L917:
+.L920:
 	.align	2
-.L916:
+.L919:
 	.word	.LANCHOR141
 	.size	FlashReadIdbData, .-FlashReadIdbData
 	.section	.text.FlashLoadPhyInfoInRam,"ax",%progbits
@@ -6608,35 +6651,35 @@ FlashLoadPhyInfoInRam:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r6, #0
-	ldr	r7, .L926
-	ldr	r5, .L926+4
-.L921:
+	ldr	r7, .L929
+	ldr	r5, .L929+4
+.L924:
 	ldrb	r2, [r7, #-1]	@ zero_extendqisi2
 	mov	r1, r5
 	mov	r0, r7
 	lsl	r8, r6, #5
 	bl	FlashMemCmp8
 	mov	r4, r0
-	cbnz	r0, .L919
-	ldr	r5, .L926+8
+	cbnz	r0, .L922
+	ldr	r5, .L929+8
 	mov	r3, r4
-	ldr	r2, .L926+12
+	ldr	r2, .L929+12
 	add	r5, r5, r8
 	ldrb	r0, [r5, #22]	@ zero_extendqisi2
 	mov	r1, r2
-.L920:
+.L923:
 	lsls	r6, r3, #5
 	ldrb	r6, [r6, r2]	@ zero_extendqisi2
 	cmp	r6, r0
-	beq	.L923
+	beq	.L926
 	adds	r3, r3, #1
 	cmp	r3, #4
-	bne	.L920
-.L923:
-	ldr	r6, .L926+16
+	bne	.L923
+.L926:
+	ldr	r6, .L929+16
 	add	r1, r1, r3, lsl #5
 	movs	r2, #32
-	ldr	r0, .L926+20
+	ldr	r0, .L929+20
 	bl	ftl_memcpy
 	movs	r2, #32
 	mov	r1, r5
@@ -6644,19 +6687,19 @@ FlashLoadPhyInfoInRam:
 	bl	ftl_memcpy
 	ldrh	r0, [r6, #10]
 	bl	FlashBlockAlignInit
-	b	.L918
-.L919:
+	b	.L921
+.L922:
 	adds	r6, r6, #1
 	adds	r7, r7, #32
 	cmp	r6, #81
-	bne	.L921
+	bne	.L924
 	mov	r4, #-1
-.L918:
+.L921:
 	mov	r0, r4
 	pop	{r4, r5, r6, r7, r8, pc}
-.L927:
+.L930:
 	.align	2
-.L926:
+.L929:
 	.word	.LANCHOR142+1
 	.word	.LANCHOR22
 	.word	.LANCHOR142
@@ -6677,15 +6720,15 @@ ftl_memcpy32:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	movs	r3, #0
 	push	{r4, lr}
-.L929:
+.L932:
 	cmp	r3, r2
-	bne	.L930
+	bne	.L933
 	pop	{r4, pc}
-.L930:
+.L933:
 	ldr	r4, [r1, r3, lsl #2]
 	str	r4, [r0, r3, lsl #2]
 	adds	r3, r3, #1
-	b	.L929
+	b	.L932
 	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.NandcCopy1KB,"ax",%progbits
 	.align	1
@@ -6705,15 +6748,15 @@ NandcCopy1KB:
 	add	r6, r0, #512
 	add	r0, r2, r4, lsl #9
 	ldr	r5, [sp, #16]
-	bne	.L932
-	cbz	r3, .L933
+	bne	.L935
+	cbz	r3, .L936
 	lsls	r1, r3, #30
-	bne	.L934
+	bne	.L937
 	mov	r2, #256
 	mov	r1, r3
 	bl	ftl_memcpy32
-.L933:
-	cbz	r5, .L931
+.L936:
+	cbz	r5, .L934
 	ldrb	r2, [r5, #1]	@ zero_extendqisi2
 	lsrs	r4, r4, #1
 	ldrb	r3, [r5]	@ zero_extendqisi2
@@ -6726,21 +6769,21 @@ NandcCopy1KB:
 	orr	r3, r3, r2, lsl #24
 	str	r3, [r6, r4]
 	pop	{r4, r5, r6, pc}
-.L934:
+.L937:
 	mov	r2, #1024
 	mov	r1, r3
 	bl	ftl_memcpy
-	b	.L933
-.L932:
-	cbz	r3, .L937
+	b	.L936
+.L935:
+	cbz	r3, .L940
 	lsls	r2, r3, #30
-	bne	.L938
+	bne	.L941
 	mov	r1, r0
 	mov	r2, #256
 	mov	r0, r3
 	bl	ftl_memcpy32
-.L937:
-	cbz	r5, .L931
+.L940:
+	cbz	r5, .L934
 	lsrs	r4, r4, #1
 	add	r4, r4, r4, lsl #1
 	lsls	r4, r4, #4
@@ -6752,14 +6795,14 @@ NandcCopy1KB:
 	lsrs	r3, r3, #24
 	strb	r2, [r5, #2]
 	strb	r3, [r5, #3]
-.L931:
+.L934:
 	pop	{r4, r5, r6, pc}
-.L938:
+.L941:
 	mov	r1, r0
 	mov	r2, #1024
 	mov	r0, r3
 	bl	ftl_memcpy
-	b	.L937
+	b	.L940
 	.size	NandcCopy1KB, .-NandcCopy1KB
 	.section	.text.NandcXferData,"ax",%progbits
 	.align	1
@@ -6774,7 +6817,7 @@ NandcXferData:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r7, r3
-	ldr	r3, .L985
+	ldr	r3, .L988
 	sub	sp, sp, #96
 	mov	r6, r0
 	mov	r10, r2
@@ -6782,14 +6825,14 @@ NandcXferData:
 	ldr	r5, [r3, r0, lsl #3]
 	lsls	r3, r7, #26
 	ldr	r4, [sp, #128]
-	bne	.L950
-	cbnz	r4, .L951
+	bne	.L953
+	cbnz	r4, .L954
 	add	r4, sp, #32
 	movs	r2, #64
 	movs	r1, #255
 	add	r0, sp, #32
 	bl	ftl_memset
-.L951:
+.L954:
 	movs	r3, #0
 	mov	r2, r10
 	ldr	r1, [sp, #12]
@@ -6801,10 +6844,10 @@ NandcXferData:
 	bl	NandcXferComp
 	ldr	r3, [sp, #12]
 	cmp	r3, #0
-	bne	.L975
-	ldr	r2, .L985+4
+	bne	.L978
+	ldr	r2, .L988+4
 	lsr	r0, r10, #1
-	ldr	ip, .L985+12
+	ldr	ip, .L988+12
 	ldr	r3, [r2]
 	cmp	r3, #25
 	ldr	r3, [sp, #12]
@@ -6812,31 +6855,31 @@ NandcXferData:
 	movcc	r7, #64
 	movcs	r7, #128
 	mov	r1, r3
-.L954:
+.L957:
 	cmp	r1, r0
 	add	r4, r4, #4
 	add	r6, r7, r3
-	bcc	.L955
-	ldr	r3, .L985+8
+	bcc	.L958
+	ldr	r3, .L988+8
 	lsr	r4, r10, #2
 	ldr	r0, [r2]
 	movs	r2, #0
 	mov	r8, r2
 	ldr	r1, [r3]
-.L956:
+.L959:
 	cmp	r2, r4
-	bcs	.L952
-	cbnz	r0, .L962
-.L952:
+	bcs	.L955
+	cbnz	r0, .L965
+.L955:
 	movs	r3, #0
 	str	r3, [r5, #16]
-.L963:
-	ldr	r3, .L985+8
+.L966:
+	ldr	r3, .L988+8
 	ldr	r3, [r3]
 	cmp	r3, #5
-	bls	.L949
+	bls	.L952
 	ldr	r3, [sp, #12]
-	cbnz	r3, .L949
+	cbnz	r3, .L952
 	ldr	r3, [r5]
 	and	r2, r3, #139264
 	cmp	r2, #139264
@@ -6844,12 +6887,12 @@ NandcXferData:
 	moveq	r8, #-1
 	orreq	r3, r3, #131072
 	streq	r3, [r5]
-.L949:
+.L952:
 	mov	r0, r8
 	add	sp, sp, #96
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L955:
+.L958:
 	bic	lr, r3, #3
 	ldr	r3, [ip, #4]
 	adds	r1, r1, #1
@@ -6862,20 +6905,20 @@ NandcXferData:
 	strb	lr, [r4, #-2]
 	strb	r3, [r4, #-1]
 	mov	r3, r6
-	b	.L954
-.L962:
+	b	.L957
+.L965:
 	add	r3, r2, #8
 	ldr	r3, [r5, r3, lsl #2]
 	str	r3, [sp, #28]
 	ldr	r3, [sp, #28]
 	lsls	r6, r3, #29
-	bmi	.L978
+	bmi	.L981
 	ldr	r3, [sp, #28]
 	ubfx	r3, r3, #15, #1
 	cmp	r3, #0
-	bne	.L978
+	bne	.L981
 	cmp	r1, #5
-	bls	.L958
+	bls	.L961
 	ldr	r6, [sp, #28]
 	ldr	r3, [sp, #28]
 	ubfx	r6, r6, #3, #5
@@ -6896,18 +6939,18 @@ NandcXferData:
 	ite	hi
 	ubfxhi	r6, r6, #27, #1
 	ubfxls	r6, r6, #29, #1
-.L984:
+.L987:
 	orr	r3, r3, r6, lsl #5
-.L960:
+.L963:
 	cmp	r8, r3
 	it	cc
 	movcc	r8, r3
-.L957:
+.L960:
 	adds	r2, r2, #1
-	b	.L956
-.L958:
+	b	.L959
+.L961:
 	cmp	r1, #3
-	bls	.L960
+	bls	.L963
 	ldr	r6, [sp, #28]
 	ldr	r3, [sp, #28]
 	ubfx	r6, r6, #3, #5
@@ -6928,33 +6971,33 @@ NandcXferData:
 	ite	hi
 	ubfxhi	r6, r6, #28, #1
 	ubfxls	r6, r6, #30, #1
-	b	.L984
-.L978:
+	b	.L987
+.L981:
 	mov	r8, #-1
-	b	.L957
-.L975:
+	b	.L960
+.L978:
 	mov	r8, #0
-	b	.L952
-.L950:
+	b	.L955
+.L953:
 	ldr	r3, [sp, #12]
 	cmp	r3, #1
-	bne	.L964
+	bne	.L967
 	cmp	r4, #0
 	mov	r8, #0
 	ite	ne
 	movne	r3, #4
 	moveq	r3, #0
 	str	r3, [sp, #16]
-.L965:
+.L968:
 	cmp	r8, r10
-	bcc	.L967
+	bcc	.L970
 	mov	r8, #0
-	b	.L963
-.L967:
+	b	.L966
+.L970:
 	and	fp, r8, #3
-	cbz	r7, .L980
+	cbz	r7, .L983
 	add	r3, r7, r8, lsl #9
-.L966:
+.L969:
 	str	r4, [sp]
 	mov	r2, fp
 	movs	r1, #1
@@ -6973,11 +7016,11 @@ NandcXferData:
 	bl	NandcXferComp
 	ldr	r3, [sp, #16]
 	add	r4, r4, r3
-	b	.L965
-.L980:
+	b	.L968
+.L983:
 	mov	r3, r7
-	b	.L966
-.L964:
+	b	.L969
+.L967:
 	mov	r8, #0
 	movs	r2, #2
 	mov	r3, r8
@@ -6993,16 +7036,16 @@ NandcXferData:
 	movne	r3, #4
 	moveq	r3, r8
 	str	r3, [sp, #20]
-.L968:
+.L971:
 	cmp	r4, r10
-	bcs	.L963
+	bcs	.L966
 	mov	r0, r6
 	adds	r4, r4, #2
 	bl	NandcXferComp
 	ldr	r3, [r5, #32]
 	cmp	r10, r4
 	str	r3, [sp, #28]
-	bls	.L969
+	bls	.L972
 	movs	r3, #0
 	movs	r2, #2
 	str	r3, [sp, #4]
@@ -7011,10 +7054,10 @@ NandcXferData:
 	mov	r0, r6
 	and	r3, r4, #3
 	bl	NandcXferStart
-.L969:
+.L972:
 	ldr	r3, [sp, #28]
 	lsls	r3, r3, #29
-	bmi	.L981
+	bmi	.L984
 	ldr	r3, [sp, #28]
 	ldr	r2, [sp, #28]
 	ubfx	r3, r3, #3, #5
@@ -7023,7 +7066,7 @@ NandcXferData:
 	cmp	r8, r3
 	it	cc
 	movcc	r8, r3
-.L970:
+.L973:
 	ldr	r3, [sp, #16]
 	cmp	r7, #0
 	sub	r2, r4, #2
@@ -7040,14 +7083,14 @@ NandcXferData:
 	ldr	r2, [sp, #20]
 	add	r3, r3, r2
 	str	r3, [sp, #16]
-	b	.L968
-.L981:
+	b	.L971
+.L984:
 	mov	r8, #-1
-	b	.L970
-.L986:
+	b	.L973
+.L989:
 	.align	2
-.L985:
-	.word	.LANCHOR6
+.L988:
+	.word	.LANCHOR0
 	.word	.LANCHOR32
 	.word	.LANCHOR34
 	.word	.LANCHOR35
@@ -7065,21 +7108,21 @@ FlashReadRawPage:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r8, r3
-	ldr	r3, .L989
+	ldr	r3, .L992
 	mov	r6, r1
 	mov	r7, r2
 	mov	r4, r0
 	ldrb	r5, [r3, #9]	@ zero_extendqisi2
-	cbnz	r0, .L988
-	ldr	r3, .L989+4
-	ldr	r2, .L989+8
+	cbnz	r0, .L991
+	ldr	r3, .L992+4
+	ldr	r2, .L992+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	ldr	r0, [r2]
 	muls	r0, r3, r0
 	cmp	r0, r1
 	it	hi
 	movhi	r5, #4
-.L988:
+.L991:
 	mov	r0, r4
 	bl	NandcWaitFlashReady
 	mov	r0, r4
@@ -7102,12 +7145,12 @@ FlashReadRawPage:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L990:
+.L993:
 	.align	2
-.L989:
+.L992:
 	.word	.LANCHOR31
-	.word	.LANCHOR2
 	.word	.LANCHOR3
+	.word	.LANCHOR4
 	.size	FlashReadRawPage, .-FlashReadRawPage
 	.section	.text.FlashDdrTunningRead,"ax",%progbits
 	.align	1
@@ -7122,7 +7165,7 @@ FlashDdrTunningRead:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r7, r3
-	ldr	r3, .L1016
+	ldr	r3, .L1019
 	sub	sp, sp, #24
 	str	r0, [sp, #8]
 	ldr	r3, [r3]
@@ -7130,7 +7173,7 @@ FlashDdrTunningRead:
 	str	r2, [sp, #4]
 	ldr	r3, [r3, #304]
 	str	r3, [sp, #20]
-	ldr	r3, .L1016+4
+	ldr	r3, .L1019+4
 	ldr	r3, [r3]
 	cmp	r3, #8
 	ldr	r3, [sp, #56]
@@ -7138,9 +7181,9 @@ FlashDdrTunningRead:
 	movcc	fp, #6
 	movcs	fp, #12
 	cmp	r3, #0
-	beq	.L1005
+	beq	.L1008
 	movs	r0, #1
-	ldr	r4, .L1016+8
+	ldr	r4, .L1019+8
 	bl	FlashSetInterfaceMode
 	movs	r0, #1
 	bl	NandcSetMode
@@ -7157,37 +7200,37 @@ FlashDdrTunningRead:
 	ldrb	r0, [r4]	@ zero_extendqisi2
 	bl	NandcSetMode
 	adds	r3, r6, #1
-	bne	.L994
-.L1003:
+	bne	.L997
+.L1006:
 	mov	r6, #-1
-.L991:
+.L994:
 	mov	r0, r6
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L994:
+.L997:
 	mov	r2, r6
 	ldr	r1, [sp, #12]
-	ldr	r0, .L1016+12
+	ldr	r0, .L1019+12
 	bl	printf
-	ldr	r2, .L1016+16
+	ldr	r2, .L1019+16
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	cmp	r3, #2048
-	bcs	.L996
+	bcs	.L999
 	str	r3, [r2]
-	b	.L991
-.L996:
+	b	.L994
+.L999:
 	movs	r7, #0
 	str	r7, [r2]
 	str	r7, [sp, #4]
-.L993:
+.L996:
 	mov	r10, #0
 	mov	r8, #-1
 	mov	r5, r10
 	mov	r4, r10
 	str	r10, [sp, #16]
-.L1001:
+.L1004:
 	uxtb	r0, fp
 	bl	NandcSetDdrPara
 	mov	r3, r7
@@ -7197,72 +7240,72 @@ FlashDdrTunningRead:
 	bl	FlashReadRawPage
 	adds	r3, r6, #1
 	cmp	r0, r3
-	bhi	.L997
+	bhi	.L1000
 	cmp	r0, #2
-	bhi	.L1007
+	bhi	.L1010
 	adds	r4, r4, #1
 	cmp	r4, #9
-	bls	.L1007
+	bls	.L1010
 	mov	r3, r5
 	mov	r6, r0
 	sub	r5, fp, r4
 	mov	r8, #0
-.L999:
+.L1002:
 	ldr	r2, [sp, #16]
 	cmp	r4, r2
 	it	ls
 	movls	r5, r3
-.L1000:
-	cbz	r5, .L1002
+.L1003:
+	cbz	r5, .L1005
 	mov	r1, r5
-	ldr	r0, .L1016+20
+	ldr	r0, .L1019+20
 	bl	printf
 	uxtb	r0, r5
 	bl	NandcSetDdrPara
-.L1002:
+.L1005:
 	cmp	r8, #0
-	beq	.L991
+	beq	.L994
 	ldr	r2, [sp, #12]
 	ldr	r1, [sp, #8]
-	ldr	r0, .L1016+24
+	ldr	r0, .L1019+24
 	bl	printf
 	ldr	r3, [sp, #56]
 	cmp	r3, #0
-	beq	.L1003
+	beq	.L1006
 	ldr	r3, [sp, #20]
 	ubfx	r0, r3, #8, #8
 	bl	NandcSetDdrPara
-	b	.L991
-.L1005:
+	b	.L994
+.L1008:
 	mov	r6, #1024
-	b	.L993
-.L997:
+	b	.L996
+.L1000:
 	ldr	r3, [sp, #16]
 	cmp	r4, r3
-	bls	.L1008
+	bls	.L1011
 	cmp	r4, #7
 	sub	r5, r10, r4
-	bhi	.L1000
+	bhi	.L1003
 	str	r4, [sp, #16]
-.L1008:
+.L1011:
 	movs	r4, #0
-	b	.L998
-.L1007:
+	b	.L1001
+.L1010:
 	mov	r8, #0
 	mov	r10, fp
 	mov	r6, r0
 	mov	r7, r8
 	str	r8, [sp, #4]
-.L998:
+.L1001:
 	add	fp, fp, #2
 	cmp	fp, #69
-	bls	.L1001
+	bls	.L1004
 	mov	r3, r5
 	mov	r5, r10
-	b	.L999
-.L1017:
+	b	.L1002
+.L1020:
 	.align	2
-.L1016:
+.L1019:
 	.word	.LANCHOR19
 	.word	.LANCHOR34
 	.word	.LANCHOR24
@@ -7290,16 +7333,16 @@ FlashReadPage:
 	bl	FlashReadRawPage
 	adds	r2, r0, #1
 	mov	r4, r0
-	bne	.L1019
-	ldr	r10, .L1037+20
+	bne	.L1022
+	ldr	r10, .L1040+20
 	ldrb	fp, [r10]	@ zero_extendqisi2
 	cmp	fp, #0
-	bne	.L1020
-.L1022:
-	ldr	r3, .L1037
+	bne	.L1023
+.L1025:
+	ldr	r3, .L1040
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1019
-	ldr	r3, .L1037+4
+	cbz	r3, .L1022
+	ldr	r3, .L1040+4
 	mov	r1, r6
 	mov	r2, r7
 	mov	r0, r5
@@ -7311,16 +7354,16 @@ FlashReadPage:
 	bl	FlashDdrTunningRead
 	adds	r1, r0, #1
 	mov	r4, r0
-	beq	.L1023
-	ldr	r3, .L1037+8
+	beq	.L1026
+	ldr	r3, .L1040+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r0, r3, lsr #1
-	bls	.L1019
-.L1023:
+	bls	.L1022
+.L1026:
 	ubfx	r0, r10, #8, #8
 	bl	NandcSetDdrPara
-	b	.L1019
-.L1020:
+	b	.L1022
+.L1023:
 	movs	r3, #0
 	mov	r2, r7
 	strb	r3, [r10]
@@ -7330,15 +7373,15 @@ FlashReadPage:
 	bl	FlashReadRawPage
 	adds	r3, r0, #1
 	strb	fp, [r10]
-	beq	.L1022
+	beq	.L1025
 	mov	r4, r0
-.L1019:
-	ldr	r10, .L1037+24
+.L1022:
+	ldr	r10, .L1040+24
 	ldr	fp, [r10]
 	cmp	fp, #0
-	beq	.L1018
+	beq	.L1021
 	adds	r2, r4, #1
-	bne	.L1018
+	bne	.L1021
 	mov	r3, r8
 	mov	r2, r7
 	mov	r1, r6
@@ -7348,13 +7391,13 @@ FlashReadPage:
 	mov	r4, r0
 	mov	r1, r0
 	mov	r2, r5
-	ldr	r0, .L1037+12
+	ldr	r0, .L1040+12
 	bl	printf
 	adds	r3, r4, #1
-	bne	.L1018
-	ldr	r3, .L1037+16
+	bne	.L1021
+	ldr	r3, .L1040+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1018
+	cbz	r3, .L1021
 	mov	r0, r5
 	bl	flash_enter_slc_mode
 	ldr	r4, [r10]
@@ -7366,20 +7409,20 @@ FlashReadPage:
 	mov	r4, r0
 	mov	r0, r5
 	bl	flash_exit_slc_mode
-.L1018:
+.L1021:
 	mov	r0, r4
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1038:
+.L1041:
 	.align	2
-.L1037:
+.L1040:
 	.word	.LANCHOR30
 	.word	.LANCHOR19
 	.word	.LANCHOR33
 	.word	.LC12
 	.word	.LANCHOR15
-	.word	.LANCHOR5
+	.word	.LANCHOR6
 	.word	.LANCHOR145
 	.size	FlashReadPage, .-FlashReadPage
 	.section	.text.FlashDdrParaScan,"ax",%progbits
@@ -7395,7 +7438,7 @@ FlashDdrParaScan:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r6, r0
-	ldr	r4, .L1050
+	ldr	r4, .L1053
 	movs	r5, #0
 	mov	r7, r1
 	ldrb	r0, [r4]	@ zero_extendqisi2
@@ -7413,33 +7456,33 @@ FlashDdrParaScan:
 	mov	r8, r0
 	mov	r1, r7
 	mov	r0, r6
-	ldr	r5, .L1050+4
+	ldr	r5, .L1053+4
 	bl	FlashReadRawPage
 	adds	r0, r0, #1
-	beq	.L1040
+	beq	.L1043
 	cmp	r8, #-1
-	bne	.L1041
-.L1040:
+	bne	.L1044
+.L1043:
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	lsls	r3, r3, #31
-	bpl	.L1041
+	bpl	.L1044
 	movs	r0, #1
 	bl	FlashSetInterfaceMode
 	movs	r0, #1
 	bl	NandcSetMode
 	movs	r3, #0
-.L1049:
+.L1052:
 	movs	r0, #0
 	strb	r3, [r5]
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1041:
+.L1044:
 	movs	r3, #1
-	b	.L1049
-.L1051:
+	b	.L1052
+.L1054:
 	.align	2
-.L1050:
+.L1053:
 	.word	.LANCHOR24
 	.word	.LANCHOR30
 	.size	FlashDdrParaScan, .-FlashDdrParaScan
@@ -7457,7 +7500,7 @@ FlashLoadPhyInfo:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #60
 	sub	sp, sp, #24
-	ldr	fp, .L1066+32
+	ldr	fp, .L1069+32
 	movs	r4, #0
 	movs	r7, #4
 	strb	r3, [sp, #20]
@@ -7470,21 +7513,21 @@ FlashLoadPhyInfo:
 	mov	r0, r4
 	ldr	r3, [fp]
 	mov	r6, #-1
-	ldr	r8, .L1066+36
-	ldr	r10, .L1066+40
+	ldr	r8, .L1069+36
+	ldr	r10, .L1069+40
 	str	r3, [sp, #4]
-	ldr	r5, .L1066
+	ldr	r5, .L1069
 	ldr	r3, [r8]
 	str	r4, [r10]
 	str	r3, [r5]
 	bl	flash_enter_slc_mode
 	str	r10, [sp, #12]
 	mov	r10, r8
-.L1053:
+.L1056:
 	mov	r8, #0
 	adds	r3, r4, #1
 	str	r3, [sp, #8]
-.L1055:
+.L1058:
 	add	r3, sp, #20
 	ldrb	r0, [r3, r8]	@ zero_extendqisi2
 	bl	FlashBchSel
@@ -7494,58 +7537,58 @@ FlashLoadPhyInfo:
 	mov	r0, r3
 	bl	FlashReadRawPage
 	adds	r0, r0, #1
-	bne	.L1054
+	bne	.L1057
 	movs	r3, #0
 	ldr	r2, [r10]
 	ldr	r1, [sp, #8]
 	mov	r0, r3
 	bl	FlashReadRawPage
 	adds	r0, r0, #1
-	bne	.L1054
+	bne	.L1057
 	add	r8, r8, #1
 	cmp	r8, #4
-	bne	.L1055
-.L1056:
+	bne	.L1058
+.L1059:
 	ldr	r3, [sp, #4]
 	subs	r7, r7, #1
 	add	r4, r4, r3
-	bne	.L1053
+	bne	.L1056
 	mov	r0, r7
-	b	.L1065
-.L1057:
+	b	.L1068
+.L1060:
 	movw	r1, #2036
 	add	r0, r8, #12
 	bl	js_hash
 	ldr	r3, [r8, #8]
 	cmp	r3, r0
-	bne	.L1063
-	ldr	r6, .L1066+4
+	bne	.L1066
+	ldr	r6, .L1069+4
 	movs	r2, #32
 	add	r1, r8, #160
 	mov	r0, r6
 	bl	ftl_memcpy
 	ldr	r1, [r5]
 	movs	r2, #32
-	ldr	r0, .L1066+8
+	ldr	r0, .L1069+8
 	adds	r1, r1, #192
 	bl	ftl_memcpy
 	ldr	r1, [r5]
 	mov	r2, #852
-	ldr	r0, .L1066+12
+	ldr	r0, .L1069+12
 	adds	r1, r1, #224
 	bl	ftl_memcpy
 	ldrh	r0, [r6, #10]
 	bl	FlashBlockAlignInit
 	ldr	r6, [r5]
 	mov	r0, r4
-	ldr	r3, .L1066+16
+	ldr	r3, .L1069+16
 	ldr	r1, [fp]
 	ldr	r2, [r6, #1076]
 	strb	r2, [r3]
 	ldr	r3, [sp, #12]
 	str	r4, [r3]
 	bl	__aeabi_uidiv
-	ldr	r3, .L1066+20
+	ldr	r3, .L1069+20
 	adds	r0, r0, #1
 	cmp	r0, #1
 	itte	ls
@@ -7554,36 +7597,36 @@ FlashLoadPhyInfo:
 	strhi	r0, [r3]
 	ldrh	r2, [r6, #14]
 	movs	r6, #0
-	ldr	r3, .L1066+24
+	ldr	r3, .L1069+24
 	strb	r2, [r3]
-	b	.L1056
-.L1063:
+	b	.L1059
+.L1066:
 	mov	r6, #-1
-	b	.L1056
-.L1054:
+	b	.L1059
+.L1057:
 	ldr	r8, [r5]
-	ldr	r2, .L1066+28
+	ldr	r2, .L1069+28
 	ldr	r3, [r8]
 	cmp	r3, r2
-	bne	.L1056
+	bne	.L1059
 	cmp	r6, #0
-	bne	.L1057
+	bne	.L1060
 	ldr	r1, [fp]
 	mov	r0, r4
 	bl	__aeabi_uidiv
-	ldr	r3, .L1066+20
+	ldr	r3, .L1069+20
 	adds	r0, r0, #1
 	str	r0, [r3]
 	mov	r0, r6
-.L1065:
+.L1068:
 	bl	flash_exit_slc_mode
 	mov	r0, r6
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1067:
+.L1070:
 	.align	2
-.L1066:
+.L1069:
 	.word	.LANCHOR146
 	.word	.LANCHOR31
 	.word	.LANCHOR7
@@ -7592,7 +7635,7 @@ FlashLoadPhyInfo:
 	.word	.LANCHOR149
 	.word	.LANCHOR150
 	.word	1312902724
-	.word	.LANCHOR3
+	.word	.LANCHOR4
 	.word	.LANCHOR147
 	.word	.LANCHOR148
 	.size	FlashLoadPhyInfo, .-FlashLoadPhyInfo
@@ -7614,8 +7657,8 @@ ToshibaReadRetrial:
 	mov	fp, r3
 	str	r1, [sp, #20]
 	bl	NandcWaitFlashReady
-	ldr	r3, .L1095
-	ldr	r2, .L1095+4
+	ldr	r3, .L1098
+	ldr	r2, .L1098+4
 	ldr	r4, [r3, r6, lsl #3]
 	add	r3, r3, r6, lsl #3
 	str	r2, [sp, #16]
@@ -7625,83 +7668,83 @@ ToshibaReadRetrial:
 	subs	r3, r3, #67
 	add	r5, r4, r5, lsl #8
 	cmp	r3, #1
-	bls	.L1085
-	ldr	r3, .L1095+8
+	bls	.L1088
+	ldr	r3, .L1098+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1086
+	cbz	r3, .L1089
 	movs	r0, #0
 	bl	NandcSetDdrMode
 	movs	r3, #1
-.L1086:
+.L1089:
 	str	r3, [sp, #8]
 	add	r3, r4, r7, lsl #8
 	movs	r2, #92
 	str	r2, [r3, #2056]
 	movs	r2, #197
 	str	r2, [r3, #2056]
-.L1069:
+.L1072:
 	mov	r8, #1
 	mov	r3, #-1
 	str	r3, [sp, #4]
-.L1071:
-	ldr	r3, .L1095+12
+.L1074:
+	ldr	r3, .L1098+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	cmp	r8, r3
-	bcc	.L1080
+	bcc	.L1083
 	ldr	r10, [sp, #4]
-.L1079:
+.L1082:
 	ldr	r3, [sp, #16]
 	movs	r1, #0
 	mov	r0, r5
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	subs	r2, r2, #67
 	cmp	r2, #1
-	bhi	.L1081
+	bhi	.L1084
 	bl	SandiskSetRRPara
-.L1082:
+.L1085:
 	add	r4, r4, r7, lsl #8
 	movs	r2, #255
 	str	r2, [r4, #2056]
-	ldr	r2, .L1095+16
+	ldr	r2, .L1098+16
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	add	r2, r2, r2, lsl #1
 	cmp	r10, r2, asr #2
-	bcc	.L1083
+	bcc	.L1086
 	cmp	r10, #-1
 	it	ne
 	movne	r10, #256
-.L1083:
+.L1086:
 	mov	r0, r6
 	bl	NandcWaitFlashReady
 	ldr	r3, [sp, #8]
-	cbz	r3, .L1068
+	cbz	r3, .L1071
 	movs	r0, #4
 	bl	NandcSetDdrMode
-.L1068:
+.L1071:
 	mov	r0, r10
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1085:
+.L1088:
 	movs	r3, #0
 	str	r3, [sp, #8]
-	b	.L1069
-.L1080:
+	b	.L1072
+.L1083:
 	ldr	r3, [sp, #16]
 	mov	r0, r5
 	uxtb	r1, r8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	subs	r3, r3, #67
 	cmp	r3, #1
-	bhi	.L1072
+	bhi	.L1075
 	bl	SandiskSetRRPara
-.L1073:
+.L1076:
 	ldr	r3, [sp, #16]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #34
-	bne	.L1074
-	ldr	r3, .L1095+12
+	bne	.L1077
+	ldr	r3, .L1098+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	subs	r3, r3, #3
 	cmp	r8, r3
@@ -7709,14 +7752,14 @@ ToshibaReadRetrial:
 	addeq	r3, r4, r7, lsl #8
 	moveq	r2, #179
 	streq	r2, [r3, #2056]
-.L1074:
+.L1077:
 	add	r3, r4, r7, lsl #8
 	movs	r2, #38
 	str	r2, [r3, #2056]
 	movs	r2, #93
 	str	r2, [r3, #2056]
 	ldr	r3, [sp, #8]
-	cbz	r3, .L1075
+	cbz	r3, .L1078
 	movs	r0, #4
 	bl	NandcSetDdrMode
 	mov	r3, fp
@@ -7727,10 +7770,10 @@ ToshibaReadRetrial:
 	mov	r10, r0
 	movs	r0, #0
 	bl	NandcSetDdrMode
-.L1076:
+.L1079:
 	cmp	r10, #-1
-	beq	.L1077
-	ldr	r2, .L1095+16
+	beq	.L1080
+	ldr	r2, .L1098+16
 	ldr	r3, [sp, #4]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r3, #-1
@@ -7739,30 +7782,30 @@ ToshibaReadRetrial:
 	str	r3, [sp, #4]
 	add	r2, r2, r2, lsl #1
 	cmp	r10, r2, asr #2
-	bcc	.L1079
+	bcc	.L1082
 	mov	fp, #0
 	str	fp, [sp, #12]
-.L1077:
+.L1080:
 	add	r8, r8, #1
-	b	.L1071
-.L1072:
-	bl	ToshibaSetRRPara
-	b	.L1073
+	b	.L1074
 .L1075:
+	bl	ToshibaSetRRPara
+	b	.L1076
+.L1078:
 	mov	r3, fp
 	ldr	r2, [sp, #12]
 	ldr	r1, [sp, #20]
 	mov	r0, r6
 	bl	FlashReadRawPage
 	mov	r10, r0
-	b	.L1076
-.L1081:
+	b	.L1079
+.L1084:
 	bl	ToshibaSetRRPara
-	b	.L1082
-.L1096:
+	b	.L1085
+.L1099:
 	.align	2
-.L1095:
-	.word	.LANCHOR6
+.L1098:
+	.word	.LANCHOR0
 	.word	.LANCHOR9
 	.word	.LANCHOR30
 	.word	.LANCHOR151
@@ -7786,35 +7829,35 @@ SamsungReadRetrial:
 	mov	fp, r1
 	movs	r6, #1
 	bl	NandcWaitFlashReady
-	ldr	r2, .L1110
+	ldr	r2, .L1113
 	mov	r4, #-1
 	add	r3, r2, r7, lsl #3
 	ldrb	r5, [r3, #4]	@ zero_extendqisi2
 	add	r3, r5, #8
 	ldr	r5, [r2, r7, lsl #3]
 	add	r5, r5, r3, lsl #8
-.L1098:
-	ldr	r3, .L1110+4
+.L1101:
+	ldr	r3, .L1113+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	cmp	r6, r3
-	bcc	.L1102
-.L1101:
+	bcc	.L1105
+.L1104:
 	movs	r1, #0
 	mov	r0, r5
 	bl	SamsungSetRRPara
-	ldr	r3, .L1110+8
+	ldr	r3, .L1113+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, asr #2
-	bcc	.L1097
+	bcc	.L1100
 	adds	r3, r4, #1
 	it	ne
 	movne	r4, #256
-.L1097:
+.L1100:
 	mov	r0, r4
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1102:
+.L1105:
 	uxtb	r1, r6
 	mov	r0, r5
 	bl	SamsungSetRRPara
@@ -7824,27 +7867,27 @@ SamsungReadRetrial:
 	mov	r0, r7
 	bl	FlashReadRawPage
 	adds	r2, r0, #1
-	beq	.L1099
-	ldr	r3, .L1110+8
+	beq	.L1102
+	ldr	r3, .L1113+8
 	cmp	r4, #-1
 	it	eq
 	moveq	r4, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r0, r3, asr #2
-	bcc	.L1105
+	bcc	.L1108
 	mov	r8, #0
 	mov	r10, r8
-.L1099:
+.L1102:
 	adds	r6, r6, #1
-	b	.L1098
-.L1105:
-	mov	r4, r0
 	b	.L1101
-.L1111:
+.L1108:
+	mov	r4, r0
+	b	.L1104
+.L1114:
 	.align	2
-.L1110:
-	.word	.LANCHOR6
+.L1113:
+	.word	.LANCHOR0
 	.word	.LANCHOR151
 	.word	.LANCHOR33
 	.size	SamsungReadRetrial, .-SamsungReadRetrial
@@ -7861,28 +7904,28 @@ MicronReadRetrial:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r7, r3
-	ldr	r3, .L1137
+	ldr	r3, .L1140
 	sub	sp, sp, #40
 	mov	r5, r0
 	str	r2, [sp, #16]
 	ldrb	r2, [r3]	@ zero_extendqisi2
-	ldr	r3, .L1137+4
+	ldr	r3, .L1140+4
 	str	r1, [sp, #28]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1113
+	bne	.L1116
 	add	r2, r2, r2, lsl #1
 	asrs	r3, r2, #2
-.L1136:
-.L1114:
+.L1139:
+.L1117:
 	mov	r8, #0
 	str	r3, [sp, #12]
 	mov	r6, r8
-.L1124:
+.L1127:
 	mov	r0, r5
 	mov	r10, #0
 	bl	NandcWaitFlashReady
-	ldr	r3, .L1137+8
+	ldr	r3, .L1140+8
 	mov	r4, #-1
 	ldr	r2, [r3, r5, lsl #3]
 	add	r3, r3, r5, lsl #3
@@ -7890,12 +7933,12 @@ MicronReadRetrial:
 	str	r2, [sp, #24]
 	lsl	r3, fp, #8
 	str	r3, [sp, #32]
-.L1115:
-	ldr	r3, .L1137+12
+.L1118:
+	ldr	r3, .L1140+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r10, r3
-	bcc	.L1119
-.L1118:
+	bcc	.L1122
+.L1121:
 	ldr	r3, [sp, #24]
 	movs	r0, #200
 	add	fp, r3, fp, lsl #8
@@ -7910,7 +7953,7 @@ MicronReadRetrial:
 	cmp	r4, r3
 	str	r6, [fp, #2048]
 	str	r6, [fp, #2048]
-	bcc	.L1120
+	bcc	.L1123
 	adds	r1, r4, #1
 	mov	r3, r10
 	it	ne
@@ -7918,26 +7961,26 @@ MicronReadRetrial:
 	ldr	r2, [sp, #28]
 	str	r4, [sp]
 	mov	r1, r10
-	ldr	r0, .L1137+16
+	ldr	r0, .L1140+16
 	bl	printf
 	cmp	r8, #0
-	bne	.L1122
-	ldr	r3, .L1137+4
+	bne	.L1125
+	ldr	r3, .L1140+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1112
+	beq	.L1115
 	adds	r2, r4, #1
-	bne	.L1112
+	bne	.L1115
 	movs	r1, #3
 	mov	r0, r5
 	bl	micron_auto_read_calibration_config
 	mov	r8, #1
-	b	.L1124
-.L1113:
-	ldr	r3, .L1137+20
+	b	.L1127
+.L1116:
+	ldr	r3, .L1140+20
 	smull	r2, r3, r2, r3
-	b	.L1136
-.L1119:
+	b	.L1139
+.L1122:
 	ldr	r2, [sp, #32]
 	movs	r0, #200
 	ldr	r3, [sp, #24]
@@ -7962,49 +8005,49 @@ MicronReadRetrial:
 	mov	r3, r7
 	bl	FlashReadRawPage
 	adds	r3, r0, #1
-	beq	.L1116
+	beq	.L1119
 	ldr	r3, [sp, #12]
 	cmp	r4, #-1
 	it	eq
 	moveq	r4, r0
 	cmp	r0, r3
-	bcc	.L1126
+	bcc	.L1129
 	movs	r7, #0
 	str	r7, [sp, #16]
-.L1116:
+.L1119:
 	ldr	r10, [sp, #20]
-	b	.L1115
-.L1126:
+	b	.L1118
+.L1129:
 	movs	r7, #0
 	mov	r4, r0
 	str	r7, [sp, #16]
-	b	.L1118
-.L1122:
+	b	.L1121
+.L1125:
 	movs	r1, #0
 	mov	r0, r5
 	bl	micron_auto_read_calibration_config
 	adds	r3, r4, #1
 	it	ne
 	movne	r4, #256
-.L1112:
+.L1115:
 	mov	r0, r4
 	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1120:
+.L1123:
 	cmp	r8, #0
-	beq	.L1112
+	beq	.L1115
 	movs	r1, #0
 	mov	r0, r5
 	bl	micron_auto_read_calibration_config
 	mov	r4, #256
-	b	.L1112
-.L1138:
+	b	.L1115
+.L1141:
 	.align	2
-.L1137:
+.L1140:
 	.word	.LANCHOR33
 	.word	.LANCHOR15
-	.word	.LANCHOR6
+	.word	.LANCHOR0
 	.word	.LANCHOR151
 	.word	.LC13
 	.word	1431655766
@@ -8022,7 +8065,7 @@ HynixReadRetrial:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, r3
-	ldr	r4, .L1156
+	ldr	r4, .L1159
 	mov	r8, #0
 	mov	r6, #-1
 	mov	fp, r2
@@ -8032,7 +8075,7 @@ HynixReadRetrial:
 	adds	r2, r4, r0
 	ldrb	r5, [r2, #12]	@ zero_extendqisi2
 	str	r3, [sp]
-	ldr	r3, .L1156+4
+	ldr	r3, .L1159+4
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r3, #7
@@ -8040,38 +8083,38 @@ HynixReadRetrial:
 	it	ls
 	ldrbls	r5, [r2, #20]	@ zero_extendqisi2
 	bl	NandcWaitFlashReady
-.L1141:
+.L1144:
 	ldr	r3, [sp]
 	cmp	r8, r3
-	bcc	.L1146
-.L1145:
-	ldr	r3, .L1156+4
+	bcc	.L1149
+.L1148:
+	ldr	r3, .L1159+4
 	add	r4, r4, r7
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r3, #7
 	cmp	r3, #1
-	ldr	r3, .L1156+8
+	ldr	r3, .L1159+8
 	ite	ls
 	strbls	r5, [r4, #20]
 	strbhi	r5, [r4, #12]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r6, r3, asr #2
-	bcc	.L1139
+	bcc	.L1142
 	adds	r3, r6, #1
 	it	ne
 	movne	r6, #256
-.L1139:
+.L1142:
 	mov	r0, r6
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1146:
+.L1149:
 	ldr	r3, [sp]
 	adds	r5, r5, #1
 	uxtb	r5, r5
-	ldr	r2, .L1156+12
+	ldr	r2, .L1159+12
 	ldrb	r1, [r4, #1]	@ zero_extendqisi2
 	mov	r0, r7
 	cmp	r3, r5
@@ -8085,26 +8128,26 @@ HynixReadRetrial:
 	mov	r0, r7
 	bl	FlashReadRawPage
 	adds	r2, r0, #1
-	beq	.L1143
-	ldr	r3, .L1156+8
+	beq	.L1146
+	ldr	r3, .L1159+8
 	cmp	r6, #-1
 	it	eq
 	moveq	r6, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r0, r3, asr #2
-	bcc	.L1150
+	bcc	.L1153
 	mov	r10, #0
 	mov	fp, r10
-.L1143:
+.L1146:
 	add	r8, r8, #1
-	b	.L1141
-.L1150:
+	b	.L1144
+.L1153:
 	mov	r6, r0
-	b	.L1145
-.L1157:
+	b	.L1148
+.L1160:
 	.align	2
-.L1156:
+.L1159:
 	.word	.LANCHOR20
 	.word	.LANCHOR18
 	.word	.LANCHOR33
@@ -8123,24 +8166,24 @@ FlashProgPage:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r8, r3
-	ldr	r3, .L1161
+	ldr	r3, .L1164
 	mov	r5, r1
 	mov	r7, r2
 	mov	r4, r0
 	ldrb	r6, [r3, #9]	@ zero_extendqisi2
-	cbnz	r0, .L1159
-	ldr	r3, .L1161+4
-	ldr	r2, .L1161+8
+	cbnz	r0, .L1162
+	ldr	r3, .L1164+4
+	ldr	r2, .L1164+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	ldr	r1, [r2]
 	muls	r1, r3, r1
 	cmp	r1, r5
-	bls	.L1159
-	ldr	r3, .L1161+12
+	bls	.L1162
+	ldr	r3, .L1164+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L1160
+	cbnz	r3, .L1163
 	subs	r6, r6, #2
-.L1159:
+.L1162:
 	mov	r0, r4
 	bl	NandcWaitFlashReady
 	mov	r0, r4
@@ -8169,16 +8212,16 @@ FlashProgPage:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1160:
+.L1163:
 	movs	r6, #4
-	b	.L1159
-.L1162:
+	b	.L1162
+.L1165:
 	.align	2
-.L1161:
+.L1164:
 	.word	.LANCHOR31
-	.word	.LANCHOR2
 	.word	.LANCHOR3
-	.word	.LANCHOR1
+	.word	.LANCHOR4
+	.word	.LANCHOR2
 	.size	FlashProgPage, .-FlashProgPage
 	.section	.text.FlashSavePhyInfo,"ax",%progbits
 	.align	1
@@ -8192,14 +8235,14 @@ FlashSavePhyInfo:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r7, .L1172
-	ldr	r4, .L1172+4
+	ldr	r7, .L1175
+	ldr	r4, .L1175+4
 	ldr	r3, [r7]
-	ldr	r10, .L1172+56
-	ldr	fp, .L1172+60
+	ldr	r10, .L1175+56
+	ldr	fp, .L1175+60
 	str	r3, [r4]
-	ldr	r3, .L1172+8
-	ldr	r8, .L1172+64
+	ldr	r3, .L1175+8
+	ldr	r8, .L1175+64
 	ldrb	r0, [r3]	@ zero_extendqisi2
 	bl	FlashBchSel
 	mov	r2, #2048
@@ -8208,42 +8251,42 @@ FlashSavePhyInfo:
 	bl	ftl_memset
 	ldr	r0, [r4]
 	movs	r2, #32
-	ldr	r3, .L1172+12
-	ldr	r1, .L1172+16
+	ldr	r3, .L1175+12
+	ldr	r1, .L1175+16
 	str	r10, [r0]
 	adds	r0, r0, #16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	strh	r3, [r0, #-4]	@ movhi
-	ldr	r3, .L1172+20
+	ldr	r3, .L1175+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	strh	r3, [r0, #-2]	@ movhi
-	ldr	r3, .L1172+24
+	ldr	r3, .L1175+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r3, [r0, #1060]
 	bl	ftl_memcpy
 	ldr	r0, [r4]
 	movs	r2, #8
-	ldr	r1, .L1172+28
+	ldr	r1, .L1175+28
 	adds	r0, r0, #80
 	bl	ftl_memcpy
 	ldr	r0, [r4]
 	movs	r2, #32
-	ldr	r1, .L1172+32
+	ldr	r1, .L1175+32
 	adds	r0, r0, #96
 	bl	ftl_memcpy
 	ldr	r0, [r4]
 	movs	r2, #32
-	ldr	r1, .L1172+36
+	ldr	r1, .L1175+36
 	adds	r0, r0, #160
 	bl	ftl_memcpy
 	ldr	r0, [r4]
 	movs	r2, #32
-	ldr	r1, .L1172+40
+	ldr	r1, .L1175+40
 	adds	r0, r0, #192
 	bl	ftl_memcpy
 	ldr	r0, [r4]
 	mov	r2, #852
-	ldr	r1, .L1172+44
+	ldr	r1, .L1175+44
 	adds	r0, r0, #224
 	bl	ftl_memcpy
 	ldr	r5, [r4]
@@ -8259,7 +8302,7 @@ FlashSavePhyInfo:
 	movs	r0, #0
 	str	r3, [r4]
 	bl	flash_enter_slc_mode
-.L1166:
+.L1169:
 	ldr	r1, [r8]
 	movs	r2, #0
 	mov	r0, r2
@@ -8286,11 +8329,11 @@ FlashSavePhyInfo:
 	bl	FlashReadRawPage
 	adds	r0, r0, #1
 	add	r2, r6, #1
-	beq	.L1164
+	beq	.L1167
 	ldr	r3, [r4]
 	ldr	r1, [r3]
 	cmp	r1, r10
-	bne	.L1164
+	bne	.L1167
 	add	r0, r3, #12
 	movw	r1, #2036
 	str	r2, [sp, #4]
@@ -8300,21 +8343,21 @@ FlashSavePhyInfo:
 	ldr	r2, [sp, #4]
 	ldr	r3, [r3, #8]
 	cmp	r3, r0
-	bne	.L1164
-	ldr	r3, .L1172+48
+	bne	.L1167
+	ldr	r3, .L1175+48
 	cmp	r5, #1
 	str	r2, [r3]
 	ldr	r3, [r8]
 	mul	r6, r6, r3
-	ldr	r3, .L1172+52
+	ldr	r3, .L1175+52
 	str	r6, [r3]
-	beq	.L1167
+	beq	.L1170
 	movs	r5, #1
-.L1164:
+.L1167:
 	cmp	r2, #4
 	mov	r6, r2
-	bne	.L1166
-.L1165:
+	bne	.L1169
+.L1168:
 	movs	r0, #0
 	bl	flash_exit_slc_mode
 	clz	r0, r5
@@ -8323,18 +8366,18 @@ FlashSavePhyInfo:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1167:
+.L1170:
 	movs	r5, #2
-	b	.L1165
-.L1173:
+	b	.L1168
+.L1176:
 	.align	2
-.L1172:
+.L1175:
 	.word	.LANCHOR147
 	.word	.LANCHOR146
 	.word	.LANCHOR152
 	.word	.LANCHOR25
 	.word	.LANCHOR22
-	.word	.LANCHOR2
+	.word	.LANCHOR3
 	.word	.LANCHOR30
 	.word	.LANCHOR26
 	.word	.LANCHOR17
@@ -8345,7 +8388,7 @@ FlashSavePhyInfo:
 	.word	.LANCHOR148
 	.word	1312902724
 	.word	.LANCHOR153
-	.word	.LANCHOR3
+	.word	.LANCHOR4
 	.size	FlashSavePhyInfo, .-FlashSavePhyInfo
 	.section	.text.FlashReadIdbDataRaw,"ax",%progbits
 	.align	1
@@ -8368,45 +8411,45 @@ FlashReadIdbDataRaw:
 	strb	r3, [sp, #14]
 	movs	r3, #16
 	strb	r3, [sp, #15]
-	ldr	r3, .L1192
+	ldr	r3, .L1195
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r3, [sp]
-	ldr	r3, .L1192+4
+	ldr	r3, .L1195+4
 	ldr	r2, [r3]
 	str	r3, [sp, #4]
-	cbz	r2, .L1175
+	cbz	r2, .L1178
 	movs	r0, #0
 	bl	flash_enter_slc_mode
-.L1175:
+.L1178:
 	mov	r7, #-1
 	movs	r4, #2
 	mov	r2, #2048
 	movs	r1, #0
 	mov	r0, r10
 	bl	ftl_memset
-.L1176:
-	ldr	r3, .L1192+8
+.L1179:
+	ldr	r3, .L1195+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r4, r3
-	bcc	.L1181
-.L1180:
+	bcc	.L1184
+.L1183:
 	ldr	r0, [sp]
 	bl	FlashBchSel
 	ldr	r3, [sp, #4]
 	ldr	r3, [r3]
-	cbz	r3, .L1174
+	cbz	r3, .L1177
 	movs	r0, #0
 	bl	flash_exit_slc_mode
-.L1174:
+.L1177:
 	mov	r0, r7
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1181:
-	ldr	r5, .L1192+12
+.L1184:
+	ldr	r5, .L1195+12
 	movs	r6, #0
-	ldr	fp, .L1192+28
-.L1178:
+	ldr	fp, .L1195+28
+.L1181:
 	add	r3, sp, #12
 	ldrb	r8, [r6, r3]	@ zero_extendqisi2
 	mov	r0, r8
@@ -8418,52 +8461,52 @@ FlashReadIdbDataRaw:
 	muls	r1, r4, r1
 	bl	FlashReadRawPage
 	adds	r0, r0, #1
-	bne	.L1177
+	bne	.L1180
 	adds	r6, r6, #1
 	cmp	r6, #4
-	bne	.L1178
-.L1179:
+	bne	.L1181
+.L1182:
 	adds	r4, r4, #1
-	b	.L1176
-.L1184:
+	b	.L1179
+.L1187:
 	movs	r7, #0
-	b	.L1180
-.L1177:
+	b	.L1183
+.L1180:
 	ldr	r3, [r5]
 	ldr	r2, [r3]
-	ldr	r3, .L1192+16
+	ldr	r3, .L1195+16
 	cmp	r2, r3
-	bne	.L1179
+	bne	.L1182
 	mov	r1, r8
-	ldr	r0, .L1192+20
+	ldr	r0, .L1195+20
 	bl	printf
 	mov	r2, #2048
 	ldr	r1, [r5]
 	mov	r0, r10
 	bl	ftl_memcpy
 	ldr	r3, [r5]
-	ldr	r2, .L1192+8
+	ldr	r2, .L1195+8
 	ldr	r3, [r3, #512]
 	strb	r3, [r2]
-	ldr	r3, .L1192+24
+	ldr	r3, .L1195+24
 	ldr	r2, [r3]
 	cmp	r4, r2
-	bcs	.L1184
+	bcs	.L1187
 	str	r4, [r3]
 	movs	r7, #0
 	bl	FlashSavePhyInfo
-	b	.L1179
-.L1193:
+	b	.L1182
+.L1196:
 	.align	2
-.L1192:
+.L1195:
 	.word	.LANCHOR33
 	.word	.LANCHOR29
-	.word	.LANCHOR2
+	.word	.LANCHOR3
 	.word	.LANCHOR147
 	.word	-52655045
 	.word	.LC14
 	.word	.LANCHOR149
-	.word	.LANCHOR3
+	.word	.LANCHOR4
 	.size	FlashReadIdbDataRaw, .-FlashReadIdbDataRaw
 	.section	.text.FlashPageProgMsbFFData,"ax",%progbits
 	.align	1
@@ -8476,35 +8519,35 @@ FlashReadIdbDataRaw:
 FlashPageProgMsbFFData:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1210
+	ldr	r3, .L1213
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r7, r0
 	mov	r8, r1
 	mov	r4, r2
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1195
-	ldr	r3, .L1210+4
+	cbz	r3, .L1198
+	ldr	r3, .L1213+4
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L1194
-.L1195:
-	ldr	r5, .L1210+8
+	bne	.L1197
+.L1198:
+	ldr	r5, .L1213+8
 	ldr	r3, [r5]
 	ldrb	r6, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r6, #5
 	uxtb	r3, r3
 	cmp	r3, #30
-	bhi	.L1196
-	ldr	r2, .L1210+12
+	bhi	.L1199
+	ldr	r2, .L1213+12
 	lsr	r3, r2, r3
 	lsls	r3, r3, #31
-	bmi	.L1198
+	bmi	.L1201
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1201:
+.L1204:
 	ldrh	r2, [fp, r4, lsl #1]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1194
+	bne	.L1197
 	cmp	r6, #8
 	mov	r2, #32768
 	ite	eq
@@ -8519,24 +8562,24 @@ FlashPageProgMsbFFData:
 	uxth	r4, r4
 	mov	r2, r3
 	bl	FlashProgPage
-.L1202:
+.L1205:
 	ldr	r3, [r5]
 	ldrh	r3, [r3, #10]
 	cmp	r3, r4
-	bhi	.L1201
+	bhi	.L1204
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1196:
+.L1199:
 	cmp	r6, #68
-	bne	.L1194
-.L1198:
-	ldr	fp, .L1210+16
-	ldr	r10, .L1210+20
-	b	.L1202
-.L1194:
+	bne	.L1197
+.L1201:
+	ldr	fp, .L1213+16
+	ldr	r10, .L1213+20
+	b	.L1205
+.L1197:
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1211:
+.L1214:
 	.align	2
-.L1210:
+.L1213:
 	.word	.LANCHOR15
 	.word	.LANCHOR29
 	.word	.LANCHOR18
@@ -8561,45 +8604,45 @@ idb_write_data:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	cmp	r2, #63
 	sub	sp, sp, #104
-	bls	.L1213
+	bls	.L1216
 	cmp	r0, #576
-	bcs	.L1214
-	ldr	r2, .L1265
+	bcs	.L1217
+	ldr	r2, .L1268
 	cmp	r0, #64
 	mov	r4, #1
 	str	r4, [r2]
-	bhi	.L1215
+	bhi	.L1218
 	rsb	r0, r0, #64
 	subs	r2, r3, r0
 	add	r1, r1, r0, lsl #9
-	ldr	r0, .L1265+4
+	ldr	r0, .L1268+4
 	lsls	r2, r2, #9
-.L1264:
+.L1267:
 	bl	ftl_memcpy
-.L1253:
+.L1256:
 	movs	r0, #0
 	add	sp, sp, #104
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1215:
+.L1218:
 	rsb	r2, r0, #576
 	subs	r0, r0, #64
 	cmp	r2, r3
 	it	cs
 	movcs	r2, r3
-	ldr	r3, .L1265+4
+	ldr	r3, .L1268+4
 	lsls	r2, r2, #9
 	add	r0, r3, r0, lsl #9
-	b	.L1264
-.L1213:
+	b	.L1267
+.L1216:
 	cmp	r0, #576
-	bcc	.L1253
-.L1214:
-	ldr	r3, .L1265
+	bcc	.L1256
+.L1217:
+	ldr	r3, .L1268
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L1253
-	ldr	r3, .L1265+8
+	beq	.L1256
+	ldr	r3, .L1268+8
 	ldr	r2, [r3]
 	ldrb	r3, [r2, #9]	@ zero_extendqisi2
 	ldrh	r2, [r2, #10]
@@ -8609,14 +8652,14 @@ idb_write_data:
 	addw	r0, r3, #511
 	str	r3, [sp, #8]
 	bl	__aeabi_uidiv
-	ldr	r1, .L1265+4
+	ldr	r1, .L1268+4
 	movs	r3, #0
 	str	r0, [sp, #20]
 	movw	r2, #65535
 	mov	r0, r1
-.L1219:
+.L1222:
 	ldr	r4, [r1, r2, lsl #2]
-	cbnz	r4, .L1217
+	cbnz	r4, .L1220
 	ldr	r4, [r1, r3, lsl #2]
 	adds	r3, r3, #1
 	cmp	r3, #4096
@@ -8625,13 +8668,13 @@ idb_write_data:
 	str	r4, [r1, r2, lsl #2]
 	subs	r2, r2, #1
 	cmp	r2, #4096
-	bne	.L1219
-.L1217:
+	bne	.L1222
+.L1220:
 	ldr	r1, [r0, r2, lsl #2]
 	mov	r3, #512
-	ldr	r0, .L1265+12
+	ldr	r0, .L1268+12
 	bl	printf
-	ldr	r3, .L1265+16
+	ldr	r3, .L1268+16
 	ldr	r2, [sp, #8]
 	ldr	r3, [r3]
 	str	r3, [sp, #16]
@@ -8642,35 +8685,35 @@ idb_write_data:
 	mul	r4, r3, r2
 	movs	r3, #0
 	str	r3, [sp, #12]
-.L1220:
+.L1223:
 	ldr	r3, [sp, #16]
 	cmp	r3, #15
-	bls	.L1237
+	bls	.L1240
 	ldr	r3, [sp, #12]
-	cbnz	r3, .L1239
+	cbnz	r3, .L1242
 	mov	r1, r3
-	ldr	r0, .L1265+20
+	ldr	r0, .L1268+20
 	bl	printf
-.L1239:
-	ldr	r3, .L1265
+.L1242:
+	ldr	r3, .L1268
 	movs	r2, #0
 	str	r2, [r3]
-	b	.L1253
-.L1266:
+	b	.L1256
+.L1269:
 	.align	2
-.L1265:
+.L1268:
 	.word	.LANCHOR154
 	.word	idb_buf
 	.word	.LANCHOR18
 	.word	.LC15
 	.word	.LANCHOR149
 	.word	.LC17
-.L1237:
+.L1240:
 	mov	r2, #512
 	movs	r1, #0
-	ldr	r0, .L1267
+	ldr	r0, .L1270
 	bl	memset
-	ldr	r3, .L1267+4
+	ldr	r3, .L1270+4
 	mov	r0, r4
 	ldr	r3, [r3]
 	ldrb	fp, [r3, #9]	@ zero_extendqisi2
@@ -8679,61 +8722,61 @@ idb_write_data:
 	smulbb	r5, r5, fp
 	uxth	r5, r5
 	cmp	r5, #512
-	bcs	.L1221
+	bcs	.L1224
 	adds	r0, r5, r4
 	bl	FW_FlashBlockErase.constprop.41
-.L1221:
-	ldr	r7, .L1267+8
+.L1224:
+	ldr	r7, .L1270+8
 	mov	r1, r5
-	ldr	r10, .L1267+36
+	ldr	r10, .L1270+36
 	mov	r0, r4
 	bl	__aeabi_uidivmod
 	mov	r6, r1
 	subs	r3, r4, r1
 	str	r3, [sp, #24]
-.L1225:
+.L1228:
 	lsrs	r2, r6, #2
-	beq	.L1222
-	ldr	r0, .L1267+12
+	beq	.L1225
+	ldr	r0, .L1270+12
 	adds	r1, r2, #1
-	ldr	r3, .L1267+16
+	ldr	r3, .L1270+16
 	ldrb	r0, [r0]	@ zero_extendqisi2
 	ldrh	r3, [r3, r1, lsl #1]
-	cbz	r0, .L1223
+	cbz	r0, .L1226
 	ldr	r0, [r10]
-	ldr	r5, .L1267+20
+	ldr	r5, .L1270+20
 	cmp	r0, r5
 	it	eq
 	moveq	r3, r1
-.L1223:
+.L1226:
 	add	r3, r3, #1073741824
 	subs	r3, r3, #1
 	lsls	r3, r3, #2
 	str	r3, [sp, #40]
-.L1222:
+.L1225:
 	movw	r3, #61424
 	str	r3, [sp, #44]
-	ldr	r3, .L1267+16
+	ldr	r3, .L1270+16
 	ldrh	r5, [r3, r2, lsl #1]
-	ldr	r3, .L1267+12
+	ldr	r3, .L1270+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1224
+	cbz	r3, .L1227
 	ldr	r3, [r10]
-	ldr	r1, .L1267+20
+	ldr	r1, .L1270+20
 	cmp	r3, r1
 	it	eq
 	moveq	r5, r2
-.L1224:
+.L1227:
 	ldr	r3, [sp, #24]
 	adds	r6, r6, #4
-	ldr	r2, .L1267+24
-	ldr	r8, .L1267+4
+	ldr	r2, .L1270+24
+	ldr	r8, .L1270+4
 	mla	r3, r5, fp, r3
 	adds	r5, r5, #1
 	uxth	r5, r5
 	str	r3, [sp, #32]
 	ldrb	r3, [r2]	@ zero_extendqisi2
-	ldr	r2, .L1267+28
+	ldr	r2, .L1270+28
 	str	r3, [sp, #28]
 	ldrb	r0, [r2]	@ zero_extendqisi2
 	bl	FlashBchSel
@@ -8761,12 +8804,12 @@ idb_write_data:
 	mov	r1, r0
 	movs	r0, #0
 	bl	FlashPageProgMsbFFData
-	ldr	r3, .L1267+32
+	ldr	r3, .L1270+32
 	cmp	r7, r3
-	bne	.L1225
+	bne	.L1228
 	ldr	r3, [r8]
 	mov	r0, r4
-	ldr	r7, .L1267
+	ldr	r7, .L1270
 	movs	r6, #0
 	ldrb	r8, [r3, #9]	@ zero_extendqisi2
 	ldrh	r1, [r3, #10]
@@ -8778,47 +8821,47 @@ idb_write_data:
 	subs	r3, r4, r1
 	str	r3, [sp, #28]
 	ubfx	r5, r5, #2, #2
-.L1226:
+.L1229:
 	cmp	r6, #512
-	bcs	.L1233
-	ldr	r1, .L1267+12
+	bcs	.L1236
+	ldr	r1, .L1270+12
 	rsb	r3, r5, #4
 	uxth	r3, r3
-	ldr	r2, .L1267+16
+	ldr	r2, .L1270+16
 	ldrb	r1, [r1]	@ zero_extendqisi2
 	str	r3, [sp, #24]
 	add	r3, r10, r6
 	lsrs	r3, r3, #2
 	ldrh	r2, [r2, r3, lsl #1]
-	cbz	r1, .L1227
-	ldr	r1, .L1267+36
-	ldr	r0, .L1267+20
+	cbz	r1, .L1230
+	ldr	r1, .L1270+36
+	ldr	r0, .L1270+20
 	ldr	r1, [r1]
 	cmp	r1, r0
 	it	eq
 	moveq	r2, r3
-.L1227:
+.L1230:
 	ldr	r3, [sp, #28]
 	add	r5, r5, r3
-	ldr	r3, .L1267+24
+	ldr	r3, .L1270+24
 	mla	r5, r2, r8, r5
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r3, [sp, #32]
-	ldr	r3, .L1267+4
+	ldr	r3, .L1270+4
 	ldr	r3, [r3]
 	ldrb	fp, [r3, #9]	@ zero_extendqisi2
-	ldr	r3, .L1267+40
+	ldr	r3, .L1270+40
 	ldrh	r2, [r3, #26]
-	ldr	r3, .L1267+44
+	ldr	r3, .L1270+44
 	ldr	r3, [r3]
 	muls	r3, r2, r3
 	mul	r3, fp, r3
 	cmp	r5, r3
-	bcs	.L1228
-	ldr	r3, .L1267+28
+	bcs	.L1231
+	ldr	r3, .L1270+28
 	ldrb	r0, [r3]	@ zero_extendqisi2
 	bl	FlashBchSel
-.L1228:
+.L1231:
 	movs	r0, #0
 	bl	flash_boot_enter_slc_mode
 	mov	r1, fp
@@ -8832,11 +8875,11 @@ idb_write_data:
 	bl	FlashReadPage
 	adds	r3, r0, #1
 	mov	r5, r0
-	bne	.L1229
-	ldr	r3, .L1267+28
+	bne	.L1232
+	ldr	r3, .L1270+28
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #40
-	beq	.L1229
+	beq	.L1232
 	movs	r0, #40
 	bl	FlashBchSel
 	add	r3, sp, #40
@@ -8845,7 +8888,7 @@ idb_write_data:
 	movs	r0, #0
 	bl	FlashReadPage
 	mov	r5, r0
-.L1229:
+.L1232:
 	movs	r0, #0
 	bl	flash_boot_exit_slc_mode
 	ldr	r0, [sp, #32]
@@ -8854,63 +8897,63 @@ idb_write_data:
 	mov	r5, #-1
 	it	ne
 	movne	r5, #0
-	cbz	r5, .L1230
-.L1233:
-	ldr	r3, .L1267+8
+	cbz	r5, .L1233
+.L1236:
+	ldr	r3, .L1270+8
 	movs	r5, #0
-	ldr	r6, .L1267
-.L1231:
+	ldr	r6, .L1270
+.L1234:
 	mov	r7, r3
 	ldr	r1, [r6, r5, lsl #2]
 	ldr	r2, [r7]
 	adds	r3, r3, #4
 	cmp	r1, r2
-	beq	.L1234
+	beq	.L1237
 	mov	r2, #512
 	movs	r1, #0
-	ldr	r0, .L1267
+	ldr	r0, .L1270
 	bl	memset
 	str	r5, [sp]
 	mov	r1, r4
 	ldr	r3, [r7]
 	ldr	r2, [r6, r5, lsl #2]
-	ldr	r0, .L1267+48
+	ldr	r0, .L1270+48
 	bl	printf
 	mov	r0, r4
 	bl	FW_FlashBlockErase.constprop.41
 	ldr	r3, [sp, #20]
 	cmp	r3, #1
-	bls	.L1235
+	bls	.L1238
 	ldr	r3, [sp, #8]
 	adds	r0, r3, r4
 	bl	FW_FlashBlockErase.constprop.41
-.L1235:
+.L1238:
 	ldr	r3, [sp, #16]
 	ldr	r2, [sp, #20]
 	add	r3, r3, r2
 	str	r3, [sp, #16]
 	ldr	r3, [sp, #36]
 	add	r4, r4, r3
-	b	.L1220
-.L1230:
+	b	.L1223
+.L1233:
 	ldr	r3, [sp, #24]
 	add	r6, r6, r3
 	add	r7, r7, r3, lsl #9
 	uxth	r6, r6
-	b	.L1226
-.L1234:
+	b	.L1229
+.L1237:
 	adds	r5, r5, #1
 	cmp	r5, #65536
-	bne	.L1231
+	bne	.L1234
 	ldr	r3, [sp, #12]
 	adds	r3, r3, #1
 	cmp	r3, #5
 	str	r3, [sp, #12]
-	bls	.L1235
-	b	.L1239
-.L1268:
+	bls	.L1238
+	b	.L1242
+.L1271:
 	.align	2
-.L1267:
+.L1270:
 	.word	gp_flash_check_buf
 	.word	.LANCHOR18
 	.word	idb_buf
@@ -8922,7 +8965,7 @@ idb_write_data:
 	.word	idb_buf+262144
 	.word	.LANCHOR119
 	.word	.LANCHOR14
-	.word	.LANCHOR3
+	.word	.LANCHOR4
 	.word	.LC16
 	.size	idb_write_data, .-idb_write_data
 	.section	.text.ftl_memcmp,"ax",%progbits
@@ -8951,11 +8994,11 @@ rknand_get_clk_rate:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r0, .L1271
+	ldr	r0, .L1274
 	bx	lr
-.L1272:
+.L1275:
 	.align	2
-.L1271:
+.L1274:
 	.word	148000000
 	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
 	.section	.text.ftl_malloc,"ax",%progbits
@@ -8986,9 +9029,9 @@ NandcInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r2, #1
-	ldr	r3, .L1276
+	ldr	r3, .L1279
 	movs	r4, #0
-	ldr	r5, .L1276+4
+	ldr	r5, .L1279+4
 	str	r2, [r3, #12]
 	movs	r2, #2
 	str	r2, [r3, #20]
@@ -8998,8 +9041,8 @@ NandcInit:
 	str	r0, [r3, #16]
 	str	r2, [r3, #28]
 	str	r0, [r3, #24]
-	ldr	r3, .L1276+8
-	ldr	r2, .L1276+12
+	ldr	r3, .L1279+8
+	ldr	r2, .L1279+12
 	str	r0, [r3]
 	ldr	r3, [r0]
 	and	r3, r3, #253952
@@ -9008,7 +9051,7 @@ NandcInit:
 	str	r1, [r2]
 	orr	r3, r3, #256
 	ldr	r2, [r0, #352]
-	ldr	r1, .L1276+16
+	ldr	r1, .L1279+16
 	ubfx	r2, r2, #16, #4
 	str	r2, [r1]
 	ldr	r2, [r0, #352]
@@ -9024,24 +9067,24 @@ NandcInit:
 	str	r3, [r0, #4]
 	movw	r3, #8322
 	str	r3, [r0, #344]
-	ldr	r3, .L1276+20
+	ldr	r3, .L1279+20
 	str	r3, [r0, #304]
 	mov	r0, #36864
 	bl	ftl_malloc
-	ldr	r3, .L1276+24
+	ldr	r3, .L1279+24
 	str	r0, [r3]
-	ldr	r3, .L1276+28
+	ldr	r3, .L1279+28
 	str	r0, [r3]
 	add	r0, r0, #32768
 	str	r0, [r3, #4]
 	str	r4, [r3, #24]
-	ldr	r3, .L1276+32
+	ldr	r3, .L1279+32
 	str	r4, [r3]
 	pop	{r3, r4, r5, pc}
-.L1277:
+.L1280:
 	.align	2
-.L1276:
-	.word	.LANCHOR6
+.L1279:
+	.word	.LANCHOR0
 	.word	.LANCHOR119
 	.word	.LANCHOR19
 	.word	.LANCHOR155
@@ -9062,114 +9105,114 @@ NandcInit:
 FtlMemInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1283
+	ldr	r3, .L1286
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r2, .L1283+4
+	ldr	r2, .L1286+4
 	movs	r6, #12
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L1283+8
-	ldr	r5, .L1283+12
-	ldr	r10, .L1283+304
+	ldr	r3, .L1286+8
+	ldr	r5, .L1286+12
+	ldr	r10, .L1286+304
 	str	r4, [r3]
-	ldr	r3, .L1283+16
-	ldr	r8, .L1283+308
-	ldr	fp, .L1283+312
+	ldr	r3, .L1286+16
+	ldr	r8, .L1286+308
+	ldr	fp, .L1286+312
 	str	r4, [r3]
-	ldr	r3, .L1283+20
+	ldr	r3, .L1286+20
 	str	r4, [r3]
-	ldr	r3, .L1283+24
+	ldr	r3, .L1286+24
 	str	r4, [r3]
-	ldr	r3, .L1283+28
+	ldr	r3, .L1286+28
 	str	r4, [r3]
-	ldr	r3, .L1283+32
+	ldr	r3, .L1286+32
 	str	r4, [r3]
-	ldr	r3, .L1283+36
+	ldr	r3, .L1286+36
 	str	r4, [r3]
-	ldr	r3, .L1283+40
+	ldr	r3, .L1286+40
 	str	r4, [r3]
-	ldr	r3, .L1283+44
+	ldr	r3, .L1286+44
 	str	r4, [r3]
-	ldr	r3, .L1283+48
+	ldr	r3, .L1286+48
 	str	r4, [r3]
-	ldr	r3, .L1283+52
+	ldr	r3, .L1286+52
 	str	r4, [r3]
-	ldr	r3, .L1283+56
+	ldr	r3, .L1286+56
 	str	r4, [r3]
-	ldr	r3, .L1283+60
+	ldr	r3, .L1286+60
 	str	r4, [r3]
-	ldr	r3, .L1283+64
+	ldr	r3, .L1286+64
 	str	r4, [r3]
-	ldr	r3, .L1283+68
+	ldr	r3, .L1286+68
 	str	r4, [r3]
-	ldr	r3, .L1283+72
+	ldr	r3, .L1286+72
 	str	r4, [r3]
-	ldr	r3, .L1283+76
+	ldr	r3, .L1286+76
 	str	r4, [r3]
 	movw	r3, #65535
 	str	r3, [r2]
-	ldr	r2, .L1283+80
+	ldr	r2, .L1286+80
 	str	r4, [r2]
-	ldr	r2, .L1283+84
+	ldr	r2, .L1286+84
 	str	r4, [r2]
-	ldr	r2, .L1283+88
+	ldr	r2, .L1286+88
 	str	r4, [r2]
-	ldr	r2, .L1283+92
+	ldr	r2, .L1286+92
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L1283+96
+	ldr	r2, .L1286+96
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L1283+100
+	ldr	r2, .L1286+100
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L1283+104
+	ldr	r2, .L1286+104
 	strh	r3, [r2]	@ movhi
 	movs	r2, #32
-	ldr	r3, .L1283+108
+	ldr	r3, .L1286+108
 	strh	r2, [r3]	@ movhi
 	movs	r2, #128
-	ldr	r3, .L1283+112
+	ldr	r3, .L1286+112
 	strh	r2, [r3]	@ movhi
-	ldr	r3, .L1283+116
+	ldr	r3, .L1286+116
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L1283+120
+	ldr	r3, .L1286+120
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L1283+124
+	ldr	r3, .L1286+124
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L1283+128
+	ldr	r3, .L1286+128
 	strh	r4, [r3]	@ movhi
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L1283+132
+	ldr	r3, .L1286+132
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	movs	r5, #36
 	muls	r0, r6, r0
 	bl	ftl_malloc
-	ldr	r3, .L1283+136
+	ldr	r3, .L1286+136
 	str	r0, [r3]
 	ldrh	r3, [r10]
 	muls	r5, r3, r5
 	lsls	r7, r5, #2
 	mov	r0, r7
 	bl	ftl_malloc
-	ldr	r3, .L1283+140
+	ldr	r3, .L1286+140
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1283+144
+	ldr	r3, .L1286+144
 	str	r0, [r3]
 	mov	r0, r7
 	bl	ftl_malloc
-	ldr	r3, .L1283+148
-	ldr	r7, .L1283+152
+	ldr	r3, .L1286+148
+	ldr	r7, .L1286+152
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1283+156
+	ldr	r3, .L1286+156
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1283+160
+	ldr	r3, .L1286+160
 	ldrh	r5, [r7]
 	str	r0, [r3]
 	ldrh	r3, [r10]
@@ -9178,157 +9221,157 @@ FtlMemInit:
 	adds	r3, r3, #1
 	str	r3, [r8]
 	bl	ftl_malloc
-	ldr	r3, .L1283+164
+	ldr	r3, .L1286+164
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1283+168
+	ldr	r3, .L1286+168
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1283+172
+	ldr	r3, .L1286+172
 	str	r0, [r3]
 	ldr	r0, [r8]
 	muls	r0, r5, r0
 	bl	ftl_malloc
-	ldr	r3, .L1283+176
+	ldr	r3, .L1286+176
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1283+180
+	ldr	r3, .L1286+180
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1283+184
+	ldr	r3, .L1286+184
 	str	r0, [r3]
 	ldr	r0, [r8]
 	muls	r0, r6, r0
 	bl	ftl_malloc
-	ldr	r3, .L1283+188
+	ldr	r3, .L1286+188
 	ldrh	r5, [r10]
-	ldr	r10, .L1283+316
+	ldr	r10, .L1286+316
 	str	r0, [r3]
 	ldrh	r3, [fp]
 	muls	r5, r3, r5
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1283+192
+	ldr	r3, .L1286+192
 	str	r0, [r3]
 	lsls	r0, r5, #2
-	ldr	r5, .L1283+196
+	ldr	r5, .L1286+196
 	bl	ftl_malloc
-	ldr	r3, .L1283+200
+	ldr	r3, .L1286+200
 	str	r0, [r3]
 	ldrh	r3, [fp]
 	ldr	r0, [r8]
-	ldr	r8, .L1283+320
+	ldr	r8, .L1286+320
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L1283+204
+	ldr	r3, .L1286+204
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	uxth	r0, r0
 	strh	r0, [r8]	@ movhi
 	bl	ftl_malloc
-	ldr	r3, .L1283+208
+	ldr	r3, .L1286+208
 	str	r0, [r3]
 	ldrh	r3, [r8]
-	ldr	r0, .L1283+212
+	ldr	r0, .L1286+212
 	addw	r3, r3, #547
 	lsrs	r3, r3, #9
 	and	r0, r0, r3, lsl #9
 	strh	r3, [r8]	@ movhi
 	bl	ftl_malloc
-	ldr	r3, .L1283+216
+	ldr	r3, .L1286+216
 	str	r0, [r3]
 	adds	r0, r0, #32
-	ldr	r3, .L1283+220
+	ldr	r3, .L1286+220
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L1283+224
+	ldr	r3, .L1286+224
 	str	r0, [r3]
 	ldr	r3, [r10]
 	lsl	r8, r3, #1
 	mov	r0, r8
 	bl	ftl_malloc
-	ldr	r3, .L1283+228
+	ldr	r3, .L1286+228
 	str	r0, [r3]
 	mov	r0, r8
 	bl	ftl_malloc
-	ldr	r3, .L1283+232
-	ldr	r8, .L1283+324
+	ldr	r3, .L1286+232
+	ldr	r8, .L1286+324
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	lsrs	r0, r0, #3
 	adds	r0, r0, #4
 	bl	ftl_malloc
-	ldr	r3, .L1283+236
+	ldr	r3, .L1286+236
 	str	r0, [r3]
 	ldrh	r0, [r8]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L1283+240
+	ldr	r3, .L1286+240
 	str	r0, [r3]
 	ldrh	r0, [r8]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L1283+244
+	ldr	r3, .L1286+244
 	str	r0, [r3]
 	ldrh	r0, [r8]
-	ldr	r8, .L1283+328
+	ldr	r8, .L1286+328
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L1283+248
+	ldr	r3, .L1286+248
 	str	r0, [r3]
 	ldrh	r0, [r8]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
 	ldrh	r2, [r8]
 	mov	r1, r4
-	ldr	r3, .L1283+252
+	ldr	r3, .L1286+252
 	lsls	r2, r2, #2
 	str	r0, [r3]
 	bl	ftl_memset
-	ldr	r3, .L1283+256
+	ldr	r3, .L1286+256
 	ldrh	r4, [r3]
 	lsls	r4, r4, #2
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L1283+260
+	ldr	r3, .L1286+260
 	str	r0, [r3]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L1283+264
-	ldr	r4, .L1283+268
+	ldr	r3, .L1286+264
+	ldr	r4, .L1286+268
 	str	r0, [r3]
 	ldr	r0, [r10]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L1283+272
+	ldr	r3, .L1286+272
 	str	r0, [r3]
 	ldrh	r0, [r4]
 	muls	r0, r6, r0
-	ldr	r6, .L1283+276
+	ldr	r6, .L1286+276
 	bl	ftl_malloc
-	ldr	r3, .L1283+280
+	ldr	r3, .L1286+280
 	str	r0, [r3]
 	ldrh	r3, [r4]
 	ldrh	r0, [r7]
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L1283+284
+	ldr	r3, .L1286+284
 	str	r0, [r3]
 	movs	r0, #6
 	ldrh	r3, [r5]
-	ldr	r5, .L1283+288
+	ldr	r5, .L1286+288
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L1283+292
+	ldr	r3, .L1286+292
 	str	r0, [r3]
-	ldr	r3, .L1283+296
+	ldr	r3, .L1286+296
 	ldrh	r0, [r3]
 	ldrh	r3, [r6]
 	adds	r0, r0, #31
@@ -9339,15 +9382,15 @@ FtlMemInit:
 	bl	ftl_malloc
 	ldrh	r1, [r5]
 	movs	r2, #1
-	ldr	r3, .L1283+300
+	ldr	r3, .L1286+300
 	ldrh	r6, [r6]
 	lsls	r1, r1, #2
 	mov	r4, r3
 	str	r0, [r4, #28]!
-	b	.L1284
-.L1285:
+	b	.L1287
+.L1288:
 	.align	2
-.L1283:
+.L1286:
 	.word	.LANCHOR139
 	.word	.LANCHOR173
 	.word	.LANCHOR157
@@ -9407,7 +9450,7 @@ FtlMemInit:
 	.word	.LANCHOR83
 	.word	.LANCHOR129
 	.word	.LANCHOR125
-	.word	.LANCHOR0
+	.word	.LANCHOR1
 	.word	.LANCHOR71
 	.word	.LANCHOR192
 	.word	.LANCHOR193
@@ -9431,33 +9474,33 @@ FtlMemInit:
 	.word	.LANCHOR190
 	.word	.LANCHOR61
 	.word	.LANCHOR62
-.L1284:
+.L1287:
 	mov	r0, r1
-.L1279:
+.L1282:
 	cmp	r2, r6
-	bcc	.L1280
+	bcc	.L1283
 	add	r3, r3, r2, lsl #2
-	ldr	r2, .L1286
+	ldr	r2, .L1289
 	movs	r1, #0
 	adds	r3, r3, #24
-.L1281:
+.L1284:
 	cmp	r3, r2
-	bne	.L1282
+	bne	.L1285
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1280:
+.L1283:
 	ldr	r5, [r3, #28]
 	adds	r2, r2, #1
 	add	r5, r5, r0
 	add	r0, r0, r1
 	str	r5, [r4, #4]!
-	b	.L1279
-.L1282:
+	b	.L1282
+.L1285:
 	str	r1, [r3, #4]!
-	b	.L1281
-.L1287:
+	b	.L1284
+.L1290:
 	.align	2
-.L1286:
+.L1289:
 	.word	.LANCHOR74+56
 	.size	FtlMemInit, .-FtlMemInit
 	.section	.text.ftl_free,"ax",%progbits
@@ -9557,12 +9600,12 @@ rk_ftl_get_capacity:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L1294
+	ldr	r3, .L1297
 	ldr	r0, [r3]
 	bx	lr
-.L1295:
+.L1298:
 	.align	2
-.L1294:
+.L1297:
 	.word	.LANCHOR68
 	.size	rk_ftl_get_capacity, .-rk_ftl_get_capacity
 	.section	.text.rknand_print_hex,"ax",%progbits
@@ -9578,51 +9621,51 @@ rknand_print_hex:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r5, #0
-	ldr	r7, .L1305
+	ldr	r7, .L1308
 	mov	fp, r0
 	mov	r6, r1
 	mov	r8, r2
 	mov	r10, r3
 	mov	r4, r5
-.L1297:
+.L1300:
 	cmp	r4, r10
-	bne	.L1303
-	ldr	r1, .L1305+4
-	ldr	r0, .L1305+8
+	bne	.L1306
+	ldr	r1, .L1308+4
+	ldr	r0, .L1308+8
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
 	b	printf
-.L1303:
-	cbnz	r5, .L1298
+.L1306:
+	cbnz	r5, .L1301
 	mov	r2, r4
 	mov	r1, fp
-	ldr	r0, .L1305+12
+	ldr	r0, .L1308+12
 	bl	printf
-.L1298:
+.L1301:
 	cmp	r8, #4
-	bne	.L1299
+	bne	.L1302
 	ldr	r1, [r6, r4, lsl #2]
-.L1304:
+.L1307:
 	mov	r0, r7
 	adds	r5, r5, #1
 	bl	printf
 	cmp	r5, #15
-	bls	.L1302
+	bls	.L1305
 	movs	r5, #0
-	ldr	r1, .L1305+4
-	ldr	r0, .L1305+8
+	ldr	r1, .L1308+4
+	ldr	r0, .L1308+8
 	bl	printf
-.L1302:
+.L1305:
 	adds	r4, r4, #1
-	b	.L1297
-.L1299:
+	b	.L1300
+.L1302:
 	cmp	r8, #2
 	ite	eq
 	ldrsheq	r1, [r6, r4, lsl #1]
 	ldrbne	r1, [r6, r4]	@ zero_extendqisi2
-	b	.L1304
-.L1306:
+	b	.L1307
+.L1309:
 	.align	2
-.L1305:
+.L1308:
 	.word	.LC19
 	.word	.LC20
 	.word	.LC7
@@ -9641,7 +9684,7 @@ HynixGetReadRetryDefault:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #172
-	ldr	r5, .L1425
+	ldr	r5, .L1428
 	cmp	r0, #2
 	mov	r1, #173
 	mov	r2, #174
@@ -9653,19 +9696,19 @@ HynixGetReadRetryDefault:
 	strb	r1, [r5, #5]
 	strb	r2, [r5, #6]
 	strb	r3, [r5, #7]
-	bne	.L1308
+	bne	.L1311
 	movs	r3, #167
 	mov	fp, #7
 	strb	r3, [r5, #4]
 	movs	r2, #247
-	ldr	r3, .L1425+4
+	ldr	r3, .L1428+4
 	strb	r2, [r3, #17]
-.L1418:
+.L1421:
 	mov	r10, #4
-	b	.L1309
-.L1308:
+	b	.L1312
+.L1311:
 	cmp	r0, #3
-	bne	.L1310
+	bne	.L1313
 	movs	r3, #176
 	strb	r3, [r5, #4]
 	movs	r3, #177
@@ -9681,31 +9724,31 @@ HynixGetReadRetryDefault:
 	movs	r3, #182
 	strb	r3, [r5, #10]
 	movs	r3, #183
-.L1419:
+.L1422:
 	mov	fp, #8
 	strb	r3, [r5, #11]
 	mov	r10, fp
-.L1309:
+.L1312:
 	subs	r3, r4, #1
 	cmp	r3, #1
-	bhi	.L1315
+	bhi	.L1318
 	mov	r8, #0
-.L1316:
-	ldr	r3, .L1425+8
+.L1319:
+	ldr	r3, .L1428+8
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	uxtb	r3, r8
 	cmp	r2, r3
-	bhi	.L1322
-.L1323:
-	ldr	r3, .L1425
+	bhi	.L1325
+.L1326:
+	ldr	r3, .L1428
 	strb	r10, [r3, #1]
 	strb	fp, [r3, #2]
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1310:
+.L1313:
 	cmp	r0, #4
-	bne	.L1311
+	bne	.L1314
 	movs	r0, #204
 	strb	r1, [r5, #9]
 	strb	r0, [r5, #4]
@@ -9718,10 +9761,10 @@ HynixGetReadRetryDefault:
 	movs	r0, #205
 	strb	r0, [r5, #8]
 	strb	r2, [r5, #10]
-	b	.L1419
-.L1311:
+	b	.L1422
+.L1314:
 	cmp	r0, #5
-	bne	.L1312
+	bne	.L1315
 	movs	r3, #56
 	mov	fp, #8
 	strb	r3, [r5, #4]
@@ -9731,10 +9774,10 @@ HynixGetReadRetryDefault:
 	strb	r3, [r5, #6]
 	movs	r3, #59
 	strb	r3, [r5, #7]
-	b	.L1418
-.L1312:
+	b	.L1421
+.L1315:
 	cmp	r0, #6
-	bne	.L1313
+	bne	.L1316
 	movs	r3, #14
 	mov	fp, #12
 	strb	r3, [r5, #4]
@@ -9744,10 +9787,10 @@ HynixGetReadRetryDefault:
 	strb	r3, [r5, #6]
 	movs	r3, #17
 	strb	r3, [r5, #7]
-	b	.L1418
-.L1313:
+	b	.L1421
+.L1316:
 	cmp	r0, #7
-	bne	.L1314
+	bne	.L1317
 	movs	r3, #176
 	mov	fp, #12
 	strb	r3, [r5, #4]
@@ -9770,11 +9813,11 @@ HynixGetReadRetryDefault:
 	movs	r3, #213
 	strb	r3, [r5, #13]
 	mov	r10, #10
-	b	.L1309
-.L1314:
+	b	.L1312
+.L1317:
 	cmp	r0, #8
 	mov	r3, #7
-	bne	.L1373
+	bne	.L1376
 	strb	r3, [r5, #5]
 	movs	r3, #9
 	movs	r2, #6
@@ -9785,15 +9828,15 @@ HynixGetReadRetryDefault:
 	mov	fp, #50
 	strb	r3, [r5, #8]
 	mov	r10, #5
-	b	.L1309
-.L1373:
+	b	.L1312
+.L1376:
 	mov	fp, r3
-	b	.L1418
-.L1322:
-	ldr	r2, .L1425+12
+	b	.L1421
+.L1325:
+	ldr	r2, .L1428+12
 	movs	r6, #0
 	ldrb	r2, [r2, r3]	@ zero_extendqisi2
-	ldr	r3, .L1425+16
+	ldr	r3, .L1428+16
 	ldr	r7, [r3, r2, lsl #3]
 	add	r4, r5, r2, lsl #6
 	add	r3, r3, r2, lsl #3
@@ -9802,7 +9845,7 @@ HynixGetReadRetryDefault:
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
 	add	r7, r7, r3, lsl #8
 	addw	r3, r7, #2056
-.L1317:
+.L1320:
 	adds	r1, r5, r6
 	str	r2, [r3]
 	ldrb	r1, [r1, #4]	@ zero_extendqisi2
@@ -9818,25 +9861,25 @@ HynixGetReadRetryDefault:
 	adds	r6, r6, #1
 	uxtb	r1, r6
 	cmp	r10, r1
-	bhi	.L1317
-	ldr	r7, .L1425+4
+	bhi	.L1320
+	ldr	r7, .L1428+4
 	mov	r1, r4
 	movs	r2, #0
-.L1320:
+.L1323:
 	movs	r3, #1
 	adds	r6, r7, r2
-.L1319:
+.L1322:
 	ldrb	r0, [r6, r3, lsl #2]	@ zero_extendqisi2
 	ldrb	ip, [r1]	@ zero_extendqisi2
 	add	r0, r0, ip
 	strb	r0, [r1, r3, lsl #3]
 	adds	r3, r3, #1
 	cmp	r3, #7
-	bne	.L1319
+	bne	.L1322
 	adds	r2, r2, #1
 	adds	r1, r1, #1
 	cmp	r2, #4
-	bne	.L1320
+	bne	.L1323
 	movs	r3, #0
 	add	r8, r8, #1
 	strb	r3, [r4, #16]
@@ -9846,11 +9889,11 @@ HynixGetReadRetryDefault:
 	strb	r3, [r4, #48]
 	strb	r3, [r4, #41]
 	strb	r3, [r4, #49]
-	b	.L1316
-.L1315:
+	b	.L1319
+.L1318:
 	subs	r3, r4, #3
 	cmp	r3, #5
-	bhi	.L1323
+	bhi	.L1326
 	smulbb	r3, fp, r10
 	asrs	r2, r3, #1
 	lsls	r3, r3, #4
@@ -9861,19 +9904,19 @@ HynixGetReadRetryDefault:
 	lsls	r3, r2, #1
 	str	r3, [sp, #32]
 	movs	r3, #0
-.L1424:
+.L1427:
 	str	r3, [sp, #28]
 	ldrb	r3, [sp, #28]	@ zero_extendqisi2
 	str	r3, [sp, #16]
-	ldr	r3, .L1425+8
+	ldr	r3, .L1428+8
 	ldr	r2, [sp, #16]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r2
-	bls	.L1323
+	bls	.L1326
 	ldr	r2, [sp, #16]
-	ldr	r3, .L1425+12
+	ldr	r3, .L1428+12
 	ldrb	r8, [r3, r2]	@ zero_extendqisi2
-	ldr	r3, .L1425+16
+	ldr	r3, .L1428+16
 	mov	r0, r8
 	ldr	r2, [r3, r8, lsl #3]
 	add	r3, r3, r8, lsl #3
@@ -9887,12 +9930,12 @@ HynixGetReadRetryDefault:
 	str	r3, [r5, #2056]
 	bl	NandcWaitFlashReady
 	cmp	r4, #7
-	bne	.L1325
-	ldr	r3, .L1425
+	bne	.L1328
+	ldr	r3, .L1428
 	movs	r0, #160
 	mla	r0, r0, r8, r3
 	add	r3, r0, #28
-.L1420:
+.L1423:
 	ldr	r2, [sp, #4]
 	cmp	r4, #4
 	str	r3, [sp, #20]
@@ -9900,42 +9943,42 @@ HynixGetReadRetryDefault:
 	add	r3, r3, r2, lsl #8
 	mov	r2, #54
 	str	r2, [r3, #2056]
-	bne	.L1328
+	bne	.L1331
 	movs	r2, #255
 	str	r2, [r3, #2052]
 	movs	r2, #64
 	str	r2, [r3, #2048]
 	movs	r2, #204
-.L1421:
+.L1424:
 	str	r2, [r3, #2052]
 	movs	r2, #77
-	b	.L1422
-.L1325:
+	b	.L1425
+.L1328:
 	cmp	r4, #8
-	beq	.L1327
-	ldr	r0, .L1425
+	beq	.L1330
+	ldr	r0, .L1428
 	add	r0, r0, r8, lsl #6
 	add	r3, r0, #20
-	b	.L1420
-.L1426:
+	b	.L1423
+.L1429:
 	.align	2
-.L1425:
+.L1428:
 	.word	.LANCHOR20
 	.word	.LANCHOR196
 	.word	.LANCHOR25
 	.word	.LANCHOR26
-	.word	.LANCHOR6
-.L1328:
+	.word	.LANCHOR0
+.L1331:
 	subs	r2, r4, #5
 	cmp	r2, #1
-	bhi	.L1330
-	ldr	r2, .L1427
+	bhi	.L1333
+	ldr	r2, .L1430
 	ldrb	r2, [r2, #4]	@ zero_extendqisi2
 	str	r2, [r3, #2052]
 	movs	r2, #82
-.L1422:
+.L1425:
 	str	r2, [r3, #2048]
-.L1329:
+.L1332:
 	ldr	r2, [sp, #4]
 	cmp	r4, #6
 	ldr	r3, [sp]
@@ -9959,7 +10002,7 @@ HynixGetReadRetryDefault:
 	str	r2, [r3, #2052]
 	movs	r2, #0
 	str	r2, [r3, #2052]
-.L1372:
+.L1375:
 	ldr	r2, [sp, #4]
 	mov	r0, r8
 	ldr	r3, [sp]
@@ -9970,15 +10013,15 @@ HynixGetReadRetryDefault:
 	subs	r3, r4, #5
 	cmp	r3, #1
 	str	r3, [sp, #36]
-	bls	.L1375
+	bls	.L1378
 	cmp	r4, #8
-	beq	.L1375
+	beq	.L1378
 	cmp	r4, #7
 	ite	eq
 	moveq	r2, #32
 	movne	r2, #2
-.L1333:
-	ldr	r3, .L1427+4
+.L1336:
+	ldr	r3, .L1430+4
 	subs	r2, r2, #1
 	ldm	sp, {r5, r6}
 	ldr	r3, [r3]
@@ -9987,83 +10030,83 @@ HynixGetReadRetryDefault:
 	uxtab	r2, r3, r2
 	mov	r0, r1
 	str	r5, [sp, #8]
-.L1334:
+.L1337:
 	ldr	r5, [sp, #8]
 	ldr	r5, [r5, #2048]
 	strb	r5, [r0, #1]!
 	cmp	r0, r2
-	bne	.L1334
+	bne	.L1337
 	cmp	r4, #8
-	bne	.L1335
+	bne	.L1338
 	movs	r2, #0
-.L1337:
+.L1340:
 	ldrb	r0, [r3, r2, lsl #2]	@ zero_extendqisi2
 	uxtb	r1, r2
 	cmp	r0, #50
-	beq	.L1336
+	beq	.L1339
 	add	r0, r3, r2, lsl #2
 	ldrb	r0, [r0, #1]	@ zero_extendqisi2
 	cmp	r0, #5
-	beq	.L1336
+	beq	.L1339
 	adds	r2, r2, #1
 	cmp	r2, #8
-	bne	.L1337
-.L1338:
+	bne	.L1340
+.L1341:
 	movs	r1, #0
-	ldr	r0, .L1427+8
+	ldr	r0, .L1430+8
 	bl	printf
-.L1340:
-	b	.L1340
-.L1330:
+.L1343:
+	b	.L1343
+.L1333:
 	cmp	r4, #7
-	bne	.L1329
+	bne	.L1332
 	movs	r2, #174
 	str	r2, [r3, #2052]
 	movs	r2, #0
 	str	r2, [r3, #2048]
 	movs	r2, #176
-	b	.L1421
-.L1375:
+	b	.L1424
+.L1378:
 	movs	r2, #16
-	b	.L1333
-.L1336:
-	cmp	r1, #6
-	bhi	.L1338
+	b	.L1336
 .L1339:
-	ldr	r3, .L1427+4
+	cmp	r1, #6
+	bhi	.L1341
+.L1342:
+	ldr	r3, .L1430+4
 	ldr	r2, [r3]
 	mov	r3, r2
-.L1349:
+.L1352:
 	ldr	r0, [sp, #48]
 	subs	r1, r3, r2
 	cmp	r1, r0
-	blt	.L1350
-	ldr	r3, .L1427+4
+	blt	.L1353
+	ldr	r3, .L1430+4
 	ldr	r1, [r3]
 	ldr	r3, [sp, #32]
 	adds	r0, r1, r3
 	movs	r3, #8
-.L1352:
+.L1355:
 	mov	r6, r0
 	movs	r5, #0
-.L1351:
+.L1354:
 	ldrh	r7, [r6]
 	adds	r5, r5, #1
 	mvns	r7, r7
 	strh	r7, [r6], #2	@ movhi
 	ldr	r7, [sp, #12]
 	cmp	r7, r5
-	bgt	.L1351
+	bgt	.L1354
 	ldr	r5, [sp, #44]
 	subs	r3, r3, #1
 	add	r0, r0, r5
-	bne	.L1352
+	bne	.L1355
 	mov	r7, r1
 	str	r3, [sp, #24]
-.L1358:
+.L1361:
 	movs	r5, #0
 	mov	r0, r5
-.L1357:
+.L1360:
 	movs	r3, #1
 	mov	ip, #0
 	lsl	r6, r3, r0
@@ -10071,7 +10114,7 @@ HynixGetReadRetryDefault:
 	str	r3, [sp, #40]
 	mov	lr, r6
 	mov	r6, r7
-.L1355:
+.L1358:
 	ldrh	r3, [r6]
 	str	r3, [sp, #52]
 	ldr	r3, [sp, #52]
@@ -10083,7 +10126,7 @@ HynixGetReadRetryDefault:
 	ldr	r3, [sp, #40]
 	subs	r3, r3, #1
 	str	r3, [sp, #40]
-	bne	.L1355
+	bne	.L1358
 	cmp	ip, #8
 	add	r0, r0, #1
 	ittt	hi
@@ -10091,7 +10134,7 @@ HynixGetReadRetryDefault:
 	orrhi	r5, r5, r3
 	uxthhi	r5, r5
 	cmp	r0, #16
-	bne	.L1357
+	bne	.L1360
 	ldr	r3, [sp, #24]
 	strh	r5, [r7], #2	@ movhi
 	adds	r3, r3, #1
@@ -10099,107 +10142,107 @@ HynixGetReadRetryDefault:
 	ldr	r0, [sp, #24]
 	ldr	r3, [sp, #12]
 	cmp	r3, r0
-	bgt	.L1358
+	bgt	.L1361
 	subs	r0, r1, #4
 	add	r5, r1, #28
 	movs	r3, #0
-.L1361:
+.L1364:
 	ldr	r6, [r0, #4]!
-	cbnz	r6, .L1360
+	cbnz	r6, .L1363
 	adds	r3, r3, #1
-.L1360:
+.L1363:
 	cmp	r5, r0
-	bne	.L1361
+	bne	.L1364
 	cmp	r3, #7
-	ble	.L1362
-	ldr	r0, .L1427+12
+	ble	.L1365
+	ldr	r0, .L1430+12
 	mov	r3, #1024
 	movs	r2, #1
 	bl	rknand_print_hex
 	movs	r1, #0
-	ldr	r0, .L1427+8
+	ldr	r0, .L1430+8
 	bl	printf
-.L1363:
-	b	.L1363
-.L1335:
+.L1366:
+	b	.L1366
+.L1338:
 	cmp	r4, #7
-	bne	.L1341
+	bne	.L1344
 	movs	r2, #0
-.L1343:
+.L1346:
 	ldrb	r0, [r3, r2, lsl #2]	@ zero_extendqisi2
 	uxtb	r1, r2
 	cmp	r0, #12
-	beq	.L1342
+	beq	.L1345
 	add	r0, r3, r2, lsl #2
 	ldrb	r0, [r0, #1]	@ zero_extendqisi2
 	cmp	r0, #10
-	beq	.L1342
+	beq	.L1345
 	adds	r2, r2, #1
 	cmp	r2, #8
-	bne	.L1343
-.L1344:
+	bne	.L1346
+.L1347:
 	movs	r1, #0
-	ldr	r0, .L1427+8
+	ldr	r0, .L1430+8
 	bl	printf
+.L1348:
+	b	.L1348
 .L1345:
-	b	.L1345
-.L1342:
 	cmp	r1, #6
-	bls	.L1339
-	b	.L1344
-.L1341:
+	bls	.L1342
+	b	.L1347
+.L1344:
 	cmp	r4, #6
-	bne	.L1339
+	bne	.L1342
 	adds	r3, r3, #7
-.L1346:
+.L1349:
 	ldrb	r2, [r1, #1]!	@ zero_extendqisi2
 	cmp	r2, #12
-	beq	.L1339
+	beq	.L1342
 	ldrb	r2, [r1, #8]	@ zero_extendqisi2
 	cmp	r2, #4
-	beq	.L1339
+	beq	.L1342
 	cmp	r1, r3
-	bne	.L1346
+	bne	.L1349
 	movs	r1, #0
-	ldr	r0, .L1427+8
+	ldr	r0, .L1430+8
 	bl	printf
-.L1348:
-	b	.L1348
-.L1350:
+.L1351:
+	b	.L1351
+.L1353:
 	ldr	r1, [sp, #8]
 	ldr	r1, [r1, #2048]
 	strb	r1, [r3], #1
-	b	.L1349
-.L1362:
+	b	.L1352
+.L1365:
 	cmp	r4, #6
-	beq	.L1377
+	beq	.L1380
 	cmp	r4, #7
-	beq	.L1378
+	beq	.L1381
 	cmp	r4, #8
 	ite	eq
 	moveq	r6, #5
 	movne	r6, #8
-.L1364:
+.L1367:
 	add	r3, r10, #-1
 	ldr	r0, [sp, #20]
 	uxtb	r3, r3
 	movs	r5, #0
 	adds	r3, r3, #1
-.L1365:
+.L1368:
 	mov	ip, r0
 	mov	r1, r2
-.L1366:
+.L1369:
 	ldrb	r7, [r1], #1	@ zero_extendqisi2
 	strb	r7, [ip], #1
 	subs	r7, r1, r2
 	uxtb	r7, r7
 	cmp	r10, r7
-	bhi	.L1366
+	bhi	.L1369
 	adds	r5, r5, #1
 	add	r2, r2, r3
 	cmp	fp, r5
 	add	r0, r0, r6
-	bgt	.L1365
+	bgt	.L1368
 	ldr	r3, [sp]
 	mov	r0, r8
 	ldr	r2, [sp, #4]
@@ -10209,12 +10252,12 @@ HynixGetReadRetryDefault:
 	bl	NandcWaitFlashReady
 	ldr	r3, [sp, #36]
 	cmp	r3, #1
-	bhi	.L1368
+	bhi	.L1371
 	movs	r3, #54
 	ldr	r2, [sp, #8]
 	str	r3, [r5, #2056]
 	mov	r1, #-1
-	ldr	r3, .L1427
+	ldr	r3, .L1430
 	ldr	r0, [sp, #16]
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
 	str	r3, [r2, #2052]
@@ -10223,26 +10266,26 @@ HynixGetReadRetryDefault:
 	movs	r3, #22
 	str	r3, [r5, #2056]
 	bl	FlashReadCmd
-.L1369:
+.L1372:
 	mov	r0, r8
 	bl	NandcWaitFlashReady
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
-	b	.L1424
-.L1377:
+	b	.L1427
+.L1380:
 	movs	r6, #4
-	b	.L1364
-.L1378:
+	b	.L1367
+.L1381:
 	movs	r6, #10
-	b	.L1364
-.L1368:
+	b	.L1367
+.L1371:
 	cmp	r4, #8
 	ite	eq
 	moveq	r3, #190
 	movne	r3, #56
 	str	r3, [r5, #2056]
-	b	.L1369
-.L1327:
+	b	.L1372
+.L1330:
 	movs	r3, #120
 	movs	r2, #23
 	str	r3, [r5, #2056]
@@ -10264,12 +10307,12 @@ HynixGetReadRetryDefault:
 	str	r1, [r5, #2052]
 	str	r2, [r5, #2052]
 	str	r3, [r5, #2052]
-	ldr	r3, .L1427+16
+	ldr	r3, .L1430+16
 	str	r3, [sp, #20]
-	b	.L1372
-.L1428:
+	b	.L1375
+.L1431:
 	.align	2
-.L1427:
+.L1430:
 	.word	.LANCHOR20
 	.word	.LANCHOR147
 	.word	.LC21
@@ -10289,72 +10332,72 @@ FlashGetReadRetryDefault:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	mov	r3, r0
-	cbz	r0, .L1429
+	cbz	r0, .L1432
 	subs	r2, r0, #1
 	cmp	r2, #7
-	bhi	.L1431
+	bhi	.L1434
 	b	HynixGetReadRetryDefault
-.L1431:
+.L1434:
 	cmp	r0, #49
-	bne	.L1432
-	ldr	r0, .L1452
+	bne	.L1435
+	ldr	r0, .L1455
 	movs	r2, #64
-	ldr	r1, .L1452+4
+	ldr	r1, .L1455+4
 	strb	r3, [r0]
 	movs	r3, #4
 	strb	r3, [r0, #1]
 	movs	r3, #15
 	strb	r3, [r0, #2]
-.L1450:
+.L1453:
 	adds	r0, r0, #4
 	b	ftl_memcpy
-.L1432:
+.L1435:
 	cmp	r0, #33
-	beq	.L1433
+	beq	.L1436
 	sub	r2, r0, #65
 	cmp	r2, #1
-	bhi	.L1434
-.L1433:
-	ldr	r0, .L1452
+	bhi	.L1437
+.L1436:
+	ldr	r0, .L1455
 	strb	r3, [r0]
 	movs	r3, #4
-.L1451:
+.L1454:
 	strb	r3, [r0, #1]
 	movs	r3, #7
 	strb	r3, [r0, #2]
 	movs	r2, #45
-	ldr	r1, .L1452+8
-	b	.L1450
-.L1434:
+	ldr	r1, .L1455+8
+	b	.L1453
+.L1437:
 	cmp	r0, #34
-	beq	.L1435
+	beq	.L1438
 	cmp	r0, #67
-	bne	.L1436
-.L1435:
-	ldr	r0, .L1452
+	bne	.L1439
+.L1438:
+	ldr	r0, .L1455
 	strb	r3, [r0]
 	movs	r3, #5
-	b	.L1451
-.L1436:
+	b	.L1454
+.L1439:
 	cmp	r0, #35
-	beq	.L1437
+	beq	.L1440
 	cmp	r0, #68
-	bne	.L1429
-.L1437:
-	ldr	r0, .L1452
+	bne	.L1432
+.L1440:
+	ldr	r0, .L1455
 	movs	r2, #95
-	ldr	r1, .L1452+12
+	ldr	r1, .L1455+12
 	strb	r3, [r0]
 	movs	r3, #5
 	strb	r3, [r0, #1]
 	movs	r3, #17
 	strb	r3, [r0, #2]
-	b	.L1450
-.L1429:
+	b	.L1453
+.L1432:
 	bx	lr
-.L1453:
+.L1456:
 	.align	2
-.L1452:
+.L1455:
 	.word	.LANCHOR20
 	.word	.LANCHOR13
 	.word	.LANCHOR8
@@ -10369,82 +10412,85 @@ FlashGetReadRetryDefault:
 	.fpu softvfp
 	.type	FlashInit, %function
 FlashInit:
-	@ args = 0, pretend = 0, frame = 16
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-	sub	sp, sp, #32
+	sub	sp, sp, #40
 	mov	r0, #32768
 	movs	r5, #0
 	bl	ftl_malloc
-	ldr	r3, .L1554
-	ldr	r10, .L1554+120
-	ldr	r8, .L1554+124
+	ldr	r3, .L1560
+	ldr	fp, .L1560+124
+	ldr	r10, .L1560+128
 	str	r0, [r3]
 	mov	r0, #32768
 	bl	ftl_malloc
-	ldr	r3, .L1554+4
-	ldr	r6, .L1554+8
-	ldr	r7, .L1554+12
+	ldr	r3, .L1560+4
+	ldr	r8, .L1560+132
+	ldr	r6, .L1560+8
 	str	r0, [r3]
 	mov	r0, #4096
 	bl	ftl_malloc
-	ldr	r3, .L1554+16
+	ldr	r3, .L1560+12
+	ldr	r7, .L1560+16
 	str	r0, [r3]
 	mov	r0, #32768
 	bl	ftl_malloc
-	ldr	r3, .L1554+20
+	ldr	r3, .L1560+20
 	str	r0, [r3]
 	mov	r0, #4096
 	bl	ftl_malloc
-	ldr	r3, .L1554+24
-	ldr	r2, .L1554+28
-	strb	r5, [r8]
+	ldr	r3, .L1560+24
+	ldr	r2, .L1560+28
+	strb	r5, [r10]
 	str	r0, [r3]
 	movs	r3, #50
-	strb	r3, [r10]
-	mov	r0, r4
 	strb	r3, [r2]
 	movs	r2, #128
-	ldr	r3, .L1554+32
-	ldr	r4, .L1554+36
-	strb	r5, [r7]
+	strb	r3, [fp]
+	mov	r0, r4
+	ldr	r3, .L1560+32
+	ldr	r4, .L1560+36
+	strb	r5, [r8]
 	str	r5, [r3]
-	ldr	r3, .L1554+40
+	ldr	r3, .L1560+40
+	strb	r5, [r7]
 	str	r2, [r3]
-	ldr	r3, .L1554+44
+	ldr	r3, .L1560+44
 	str	r5, [r3]
 	movs	r3, #60
 	strb	r3, [r6]
 	bl	NandcInit
 	str	r10, [sp, #20]
-	ldr	r10, .L1554+128
-	str	r8, [sp, #16]
+	ldr	r10, .L1560+136
+	str	r8, [sp, #28]
 	mov	r8, r6
 	mov	r6, r4
-.L1459:
+	str	fp, [sp, #24]
+.L1462:
 	add	r1, r10, r5, lsl #3
 	uxtb	r2, r5
 	ldr	r3, [r10, r5, lsl #3]
 	ldrb	r1, [r1, #4]	@ zero_extendqisi2
 	mov	fp, r2
 	mov	r0, r2
-	str	r3, [sp, #28]
-	str	r1, [sp, #24]
+	str	r3, [sp, #36]
+	str	r1, [sp, #32]
 	bl	FlashReset
 	mov	r0, fp
 	bl	NandcFlashCs
-	ldr	r1, [sp, #24]
+	ldr	r1, [sp, #32]
 	movs	r0, #200
-	ldr	r3, [sp, #28]
+	ldr	r3, [sp, #36]
 	add	r3, r3, r1, lsl #8
 	movs	r1, #144
 	str	r1, [r3, #2056]
 	movs	r1, #0
 	str	r1, [r3, #2052]
-	str	r3, [sp, #24]
+	str	r3, [sp, #32]
 	bl	udelay
-	ldr	r3, [sp, #24]
+	ldr	r3, [sp, #32]
 	mov	r0, fp
 	ldr	r1, [r3, #2048]
 	strb	r1, [r4]
@@ -10463,10 +10509,10 @@ FlashInit:
 	subs	r3, r2, #1
 	uxtb	r3, r3
 	cmp	r3, #253
-	bhi	.L1455
+	bhi	.L1458
 	ldrb	r1, [r4, #5]	@ zero_extendqisi2
 	ldrb	r3, [r4, #1]	@ zero_extendqisi2
-	ldr	r0, .L1554+48
+	ldr	r0, .L1560+48
 	str	r1, [sp, #12]
 	ldrb	r1, [r4, #4]	@ zero_extendqisi2
 	str	r1, [sp, #8]
@@ -10476,17 +10522,17 @@ FlashInit:
 	str	r1, [sp]
 	adds	r1, r5, #1
 	bl	printf
-.L1455:
-	cbnz	r5, .L1456
+.L1458:
+	cbnz	r5, .L1459
 	ldrb	r3, [r6]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, #253
-	bhi	.L1503
+	bhi	.L1509
 	ldrb	r3, [r6, #1]	@ zero_extendqisi2
 	cmp	r3, #255
-	beq	.L1503
-.L1456:
+	beq	.L1509
+.L1459:
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	adds	r5, r5, #1
 	adds	r4, r4, #8
@@ -10495,330 +10541,333 @@ FlashInit:
 	moveq	r3, #44
 	strbeq	r3, [r4, #-8]
 	cmp	r5, #4
-	bne	.L1459
+	bne	.L1462
 	ldrb	r3, [r6]	@ zero_extendqisi2
 	cmp	r3, #173
-	beq	.L1460
-	ldr	r3, .L1554+52
+	beq	.L1463
+	ldr	r3, .L1560+52
 	ldr	r0, [r3]
 	bl	NandcSetDdrMode
-.L1460:
+.L1463:
 	mov	r2, #852
 	movs	r1, #0
-	ldr	r0, .L1554+56
+	ldr	r0, .L1560+56
 	bl	ftl_memset
-	ldr	r4, .L1554+60
-	movs	r2, #0
-	ldr	r3, .L1554+64
-	ldr	r5, .L1554+68
+	ldr	r4, .L1560+60
+	ldr	r3, .L1560+64
+	ldr	r5, .L1560+68
 	str	r3, [r4]
-	ldr	r3, .L1554+72
-	strb	r2, [r3]
+	movs	r3, #0
+	strb	r3, [r5]
+	ldr	r3, .L1560+72
+	str	r5, [sp, #32]
+	ldr	r1, [r3]
+	ldr	r3, .L1560+76
+	cmp	r1, r3
 	mov	r10, r3
-	ldr	r2, .L1554+76
-	ldr	r1, [r2]
-	cmp	r1, r5
 	ittt	eq
-	ldreq	r3, .L1554+80
+	ldreq	r3, .L1560+80
 	moveq	r2, #1
 	streq	r2, [r3]
 	ldrb	r3, [r6, #1]	@ zero_extendqisi2
 	cmp	r3, #161
-	beq	.L1462
+	beq	.L1465
 	cmp	r3, #241
-	beq	.L1462
+	beq	.L1465
 	cmp	r3, #218
-	beq	.L1462
+	beq	.L1465
 	and	r2, r3, #253
 	cmp	r2, #209
-	beq	.L1462
+	beq	.L1465
 	cmp	r3, #220
-	bne	.L1463
+	bne	.L1466
 	ldrb	r2, [r6, #3]	@ zero_extendqisi2
 	cmp	r2, #149
-	bne	.L1463
-.L1462:
-	ldr	r0, [sp, #16]
-	movs	r2, #1
-	strb	r2, [r0]
+	bne	.L1466
+.L1465:
+	ldr	r2, [sp, #20]
+	movs	r0, #1
+	ldr	r5, [sp, #24]
+	ldrb	ip, [r6]	@ zero_extendqisi2
+	strb	r0, [r2]
 	movs	r2, #16
-	ldr	r0, [sp, #20]
+	strb	r2, [r5]
 	strb	r2, [r8]
-	strb	r2, [r0]
-	ldrb	r0, [r6]	@ zero_extendqisi2
-	ldr	r2, .L1554+84
-	cmp	r0, #152
-	strb	r0, [r2, #1]
+	cmp	ip, #152
+	ldr	r2, .L1560+84
+	strb	ip, [r2, #1]
 	strb	r3, [r2, #2]
-	bne	.L1464
-	ldrsb	r0, [r6, #4]
-	cmp	r0, #0
-	itt	ge
-	movge	r0, #24
-	strbge	r0, [r8]
-.L1464:
-	cmp	r1, r5
-	beq	.L1465
+	bne	.L1468
+	ldrsb	ip, [r6, #4]
+	cmp	ip, #0
+	blt	.L1469
+	movs	r0, #24
+	strb	r0, [r8]
+.L1468:
+	cmp	r1, r10
+	beq	.L1471
 	movw	r0, #2049
 	cmp	r1, r0
-	bne	.L1466
-.L1465:
+	bne	.L1472
+.L1471:
 	movs	r1, #16
 	strb	r1, [r8]
-.L1466:
+.L1472:
 	cmp	r3, #218
-	bne	.L1467
+	bne	.L1473
 	mov	r1, #2048
-.L1550:
+.L1556:
 	strh	r1, [r2, #14]	@ movhi
 	strb	r3, [r2, #2]
-.L1468:
+.L1474:
 	movs	r2, #32
-	ldr	r1, .L1554+88
-	ldr	r0, .L1554+92
+	ldr	r1, .L1560+88
+	ldr	r0, .L1560+92
 	bl	ftl_memcpy
 	movs	r2, #32
-	ldr	r1, .L1554+84
-	ldr	r0, .L1554+64
+	ldr	r1, .L1560+84
+	ldr	r0, .L1560+64
 	bl	ftl_memcpy
-.L1463:
-	ldr	r3, [sp, #16]
-	ldr	r8, .L1554+132
+.L1466:
+	ldr	r3, [sp, #20]
+	ldr	r8, .L1560+140
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1471
+	bne	.L1477
 	bl	FlashLoadPhyInfoInRam
-	cbnz	r0, .L1473
+	cbnz	r0, .L1479
 	ldr	r3, [r4]
-	ldr	fp, .L1554+104
+	ldr	fp, .L1560+104
 	ldrh	r3, [r3, #16]
 	lsrs	r3, r3, #8
 	lsls	r1, r3, #31
 	and	r0, r3, #7
 	strb	r0, [fp]
-	bmi	.L1473
+	bmi	.L1479
 	movs	r3, #1
 	strb	r3, [r7]
 	bl	FlashSetInterfaceMode
 	ldrb	r0, [fp]	@ zero_extendqisi2
 	bl	NandcSetMode
-.L1473:
+.L1479:
 	ldr	r3, [r4]
 	ldrb	r3, [r3, #26]	@ zero_extendqisi2
 	strb	r3, [r8]
 	bl	FlashLoadPhyInfo
 	cmp	r0, #0
-	beq	.L1471
+	beq	.L1477
 	ldr	r3, [r4]
-	ldr	r0, .L1554+96
+	ldr	r0, .L1560+96
 	ldrh	r1, [r3, #14]
 	bl	printf
 	bl	FlashLoadPhyInfoInRam
 	adds	r2, r0, #1
-	beq	.L1454
+	beq	.L1457
 	bl	FlashDieInfoInit
 	ldr	r3, [r4]
 	ldrb	r0, [r3, #19]	@ zero_extendqisi2
 	bl	FlashGetReadRetryDefault
 	ldr	r3, [r4]
-	ldr	r2, .L1554+100
+	ldr	r2, .L1560+100
 	ldrb	r1, [r3, #9]	@ zero_extendqisi2
 	ldrh	r2, [r2]
 	addw	r2, r2, #4095
 	cmp	r1, r2, asr #12
-	blt	.L1476
+	blt	.L1482
 	ldrh	r2, [r3, #14]
 	adds	r2, r2, #255
 	cmp	r1, r2, asr #8
-	bge	.L1477
-.L1476:
+	bge	.L1483
+.L1482:
 	ldrh	r2, [r3, #14]
 	bic	r2, r2, #255
 	strh	r2, [r3, #14]	@ movhi
-.L1477:
-	ldr	r3, .L1554+104
+.L1483:
+	ldr	r3, .L1560+104
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	tst	r3, #6
-	beq	.L1478
+	beq	.L1484
 	bl	FlashSavePhyInfo
-	ldr	r3, .L1554+108
+	ldr	r3, .L1560+108
 	movs	r0, #0
 	ldr	r1, [r3]
 	bl	FlashDdrParaScan
-.L1478:
+.L1484:
 	bl	FlashSavePhyInfo
-.L1471:
+.L1477:
 	ldr	fp, [r4]
+	ldr	r1, [sp, #32]
+	ldr	r5, .L1560+112
 	ldrh	r2, [fp, #16]
 	ldrb	r3, [fp, #26]	@ zero_extendqisi2
 	ldrh	r0, [fp, #10]
-	ubfx	r1, r2, #3, #1
 	strb	r3, [r8]
 	ubfx	r3, r2, #7, #1
-	strb	r3, [r10]
-	ldr	r3, .L1554+112
-	ldr	r10, .L1554+136
+	strb	r3, [r1]
+	ubfx	r1, r2, #3, #1
+	ldr	r3, .L1560+116
 	strb	r1, [r3]
 	ubfx	r1, r2, #4, #1
-	ldr	r3, .L1554+116
+	ldr	r3, .L1560+120
 	ubfx	r2, r2, #8, #3
 	strb	r1, [r3]
-	ldr	r3, .L1554+104
+	ldr	r3, .L1560+104
 	ldrb	r1, [fp, #12]	@ zero_extendqisi2
 	strb	r2, [r3]
 	movs	r2, #0
-	str	r2, [r10]
-	str	r3, [sp, #24]
+	str	r2, [r5]
+	str	r3, [sp, #28]
 	bl	__aeabi_idiv
 	mov	r1, r0
 	ldrb	r0, [fp, #18]	@ zero_extendqisi2
 	bl	BuildFlashLsbPageTable
-	bl	FlashDieInfoInit
-	ldr	r2, [r4]
-	ldr	r3, [sp, #24]
-	ldrh	r1, [r2, #16]
-	mov	fp, r3
-	tst	r1, #64
-	mov	r1, r10
-	b	.L1555
-.L1556:
+	b	.L1561
+.L1562:
 	.align	2
-.L1554:
+.L1560:
 	.word	.LANCHOR147
 	.word	.LANCHOR153
 	.word	.LANCHOR152
-	.word	.LANCHOR30
 	.word	.LANCHOR197
+	.word	.LANCHOR30
 	.word	.LANCHOR198
 	.word	.LANCHOR199
 	.word	.LANCHOR150
 	.word	.LANCHOR149
 	.word	.LANCHOR22
-	.word	.LANCHOR3
+	.word	.LANCHOR4
 	.word	.LANCHOR144
 	.word	.LC23
 	.word	.LANCHOR155
 	.word	.LANCHOR20
 	.word	.LANCHOR18
 	.word	.LANCHOR31
-	.word	1446522928
-	.word	.LANCHOR5
+	.word	.LANCHOR6
 	.word	.LANCHOR119
+	.word	1446522928
 	.word	.LANCHOR29
-	.word	.LANCHOR200
+	.word	.LANCHOR201
 	.word	.LANCHOR143+32
 	.word	.LANCHOR7
 	.word	.LC24
 	.word	.LANCHOR122
 	.word	.LANCHOR24
 	.word	.LANCHOR148
-	.word	.LANCHOR201
+	.word	.LANCHOR145
+	.word	.LANCHOR202
 	.word	.LANCHOR27
+	.word	.LANCHOR3
 	.word	.LANCHOR2
-	.word	.LANCHOR1
-	.word	.LANCHOR6
+	.word	.LANCHOR200
+	.word	.LANCHOR0
 	.word	.LANCHOR15
-	.word	.LANCHOR145
-.L1555:
-	beq	.L1480
+.L1561:
+	bl	FlashDieInfoInit
+	ldr	r2, [r4]
+	ldr	r3, [sp, #28]
+	ldrh	r1, [r2, #16]
+	mov	fp, r3
+	tst	r1, #64
+	mov	r1, r5
+	beq	.L1486
 	ldrb	r0, [r2, #19]	@ zero_extendqisi2
-	ldr	r3, .L1557
-	ldr	ip, .L1557+56
+	ldr	r3, .L1563
+	ldr	ip, .L1563+60
 	strb	r0, [r3]
 	ldrb	r2, [ip, #1]	@ zero_extendqisi2
-	ldr	r3, .L1557+4
+	ldr	r3, .L1563+4
 	ldrb	ip, [ip, #2]	@ zero_extendqisi2
 	strb	r2, [r3]
-	ldr	r2, .L1557+8
+	ldr	r2, .L1563+8
 	strb	ip, [r2]
 	add	ip, r0, #-1
 	cmp	ip, #7
 	mov	ip, r2
-	bhi	.L1481
-	ldr	r3, .L1557+12
-	str	r3, [r10]
+	bhi	.L1487
+	ldr	r3, .L1563+12
+	str	r3, [r5]
 	subs	r3, r0, #5
 	cmp	r3, #1
-	bls	.L1482
+	bls	.L1488
 	cmp	r0, #8
-	bne	.L1483
-.L1482:
-	ldr	r3, .L1557+16
+	bne	.L1489
+.L1488:
+	ldr	r3, .L1563+16
 	movs	r2, #1
 	str	r2, [r3]
-.L1483:
+.L1489:
 	cmp	r0, #7
-	ldr	r3, .L1557+20
-	beq	.L1484
+	ldr	r3, .L1563+20
+	beq	.L1490
 	sub	r2, r3, #8
 	cmp	r0, #8
 	it	ne
 	movne	r3, r2
-.L1484:
+.L1490:
 	subs	r1, r3, #1
 	movs	r2, #0
 	adds	r3, r3, #31
-.L1486:
-	ldrsb	ip, [r1, #1]!
-	cmp	ip, #0
-	bne	.L1485
+.L1492:
+	ldrsb	r5, [r1, #1]!
+	cbnz	r5, .L1491
 	adds	r2, r2, #1
-.L1485:
+.L1491:
 	cmp	r3, r1
-	bne	.L1486
+	bne	.L1492
 	cmp	r2, #27
-	bls	.L1480
+	bls	.L1486
 	bl	FlashGetReadRetryDefault
 	bl	FlashSavePhyInfo
-.L1480:
-	ldr	r3, .L1557+24
+.L1486:
+	ldr	r3, .L1563+24
 	ldr	r3, [r3]
-	cmp	r3, r5
-	bne	.L1497
+	cmp	r3, r10
+	bne	.L1503
 	ldrb	r3, [r8]	@ zero_extendqisi2
-	cbz	r3, .L1497
-	ldr	r3, [r4]
+	cbz	r3, .L1503
+	ldr	r3, .L1563+28
 	movs	r2, #0
+	ldr	r3, [r3]
 	strb	r2, [r3, #18]
-.L1497:
+.L1503:
 	ldrb	r3, [r6]	@ zero_extendqisi2
 	cmp	r3, #44
-	bne	.L1498
+	bne	.L1504
 	ldrb	r3, [r7]	@ zero_extendqisi2
-	cbz	r3, .L1498
+	cbz	r3, .L1504
 	movs	r3, #0
 	movs	r0, #1
 	strb	r3, [r7]
 	bl	FlashSetInterfaceMode
 	movs	r0, #1
 	bl	NandcSetMode
-.L1498:
+.L1504:
 	ldrb	r3, [fp]	@ zero_extendqisi2
 	tst	r3, #6
-	beq	.L1499
+	beq	.L1505
 	ldrb	r2, [r7]	@ zero_extendqisi2
-	cbnz	r2, .L1500
+	cbnz	r2, .L1506
 	lsls	r3, r3, #31
-	bmi	.L1499
-.L1500:
+	bmi	.L1505
+.L1506:
 	movs	r0, #0
 	bl	flash_enter_slc_mode
-	ldr	r3, .L1557+28
+	ldr	r3, .L1563+32
 	movs	r0, #0
 	ldr	r1, [r3]
 	bl	FlashDdrParaScan
 	movs	r0, #0
 	bl	flash_exit_slc_mode
-.L1499:
+.L1505:
 	ldr	r3, [r4]
 	movs	r7, #16
 	ldrb	r0, [r3, #20]	@ zero_extendqisi2
 	bl	FlashBchSel
-	ldr	r0, .L1557+32
+	ldr	r0, .L1563+36
 	bl	FlashReadIdbDataRaw
 	ldr	r8, [r4]
-	ldr	r3, [sp, #20]
-	ldr	r4, .L1557+36
+	ldr	r3, [sp, #24]
+	ldr	r4, .L1563+40
 	ldrb	r1, [r8, #12]	@ zero_extendqisi2
 	strb	r7, [r3]
 	ldrh	r5, [r8, #10]
@@ -10829,7 +10878,7 @@ FlashInit:
 	ldr	r3, [r6]
 	ldrh	r6, [r8, #14]
 	str	r3, [r4]
-	ldr	r3, .L1557+40
+	ldr	r3, .L1563+44
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	strh	r3, [r4, #10]	@ movhi
 	ldrb	r3, [r8, #13]	@ zero_extendqisi2
@@ -10841,7 +10890,7 @@ FlashInit:
 	strh	r0, [r4, #18]	@ movhi
 	ldrb	r3, [r8, #9]	@ zero_extendqisi2
 	strh	r2, [r4, #24]	@ movhi
-	ldr	r2, [sp, #16]
+	ldr	r2, [sp, #20]
 	strh	r3, [r4, #20]	@ movhi
 	smulbb	r5, r5, r3
 	strh	r7, [r4, #26]	@ movhi
@@ -10849,7 +10898,7 @@ FlashInit:
 	uxth	r5, r5
 	cmp	r2, #1
 	strh	r5, [r4, #22]	@ movhi
-	bne	.L1501
+	bne	.L1507
 	lsls	r3, r3, #1
 	lsrs	r2, r6, #1
 	lsls	r5, r5, #1
@@ -10858,93 +10907,97 @@ FlashInit:
 	strh	r2, [r4, #14]	@ movhi
 	strh	r5, [r4, #22]	@ movhi
 	strh	r3, [r4, #26]	@ movhi
-.L1501:
+.L1507:
 	ldrb	r0, [r8, #20]	@ zero_extendqisi2
 	bl	FlashBchSel
 	movs	r0, #0
-.L1454:
-	add	sp, sp, #32
+.L1457:
+	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1467:
+.L1473:
 	cmp	r3, #220
-	bne	.L1469
+	bne	.L1475
 	mov	r1, #4096
-	b	.L1550
-.L1469:
+	b	.L1556
+.L1475:
 	cmp	r3, #211
 	itttt	eq
 	moveq	r3, #4096
 	strheq	r3, [r2, #14]	@ movhi
 	moveq	r3, #2
 	strbeq	r3, [r2, #13]
-	b	.L1468
-.L1481:
+	b	.L1474
+.L1487:
 	sub	lr, r0, #17
 	cmp	lr, #2
-	bhi	.L1488
-	ldr	r3, .L1557+44
+	bhi	.L1494
+	ldr	r3, .L1563+48
 	cmp	r0, #19
-	str	r3, [r10]
+	str	r3, [r5]
 	ite	ne
 	movne	r3, #7
 	moveq	r3, #15
 	strb	r3, [r2]
-	b	.L1480
-.L1488:
+	b	.L1486
+.L1494:
 	cmp	r0, #33
-	beq	.L1490
+	beq	.L1496
 	sub	r2, r0, #65
 	cmp	r2, #1
-	bhi	.L1491
-.L1490:
-	ldr	r2, .L1557+48
+	bhi	.L1497
+.L1496:
+	ldr	r2, .L1563+52
 	str	r2, [r1]
 	movs	r2, #4
 	strb	r2, [r3]
 	movs	r3, #7
 	strb	r3, [ip]
-	b	.L1480
-.L1491:
+	b	.L1486
+.L1497:
 	sub	r2, r0, #67
 	uxtb	r2, r2
 	cmp	r2, #1
-	bls	.L1492
+	bls	.L1498
 	sub	ip, r0, #34
 	cmp	ip, #1
-	bhi	.L1493
-.L1492:
-	ldr	ip, .L1557+48
+	bhi	.L1499
+.L1498:
+	ldr	r5, .L1563+52
 	cmp	r0, #35
-	str	ip, [r1]
-	ldr	r1, .L1557+8
-	beq	.L1494
+	str	r5, [r1]
+	ldr	r1, .L1563+8
+	beq	.L1500
 	cmp	r0, #68
-	beq	.L1494
+	beq	.L1500
 	movs	r0, #7
-.L1551:
+.L1557:
 	cmp	r2, #1
 	strb	r0, [r1]
 	ite	ls
 	movls	r2, #4
 	movhi	r2, #5
 	strb	r2, [r3]
-	b	.L1480
-.L1494:
+	b	.L1486
+.L1500:
 	movs	r0, #17
-	b	.L1551
-.L1493:
+	b	.L1557
+.L1499:
 	cmp	r0, #49
 	itt	eq
-	ldreq	r3, .L1557+52
-	streq	r3, [r10]
-	b	.L1480
-.L1503:
+	ldreq	r3, .L1563+56
+	streq	r3, [r5]
+	b	.L1486
+.L1509:
 	mvn	r0, #1
-	b	.L1454
-.L1558:
+	b	.L1457
+.L1469:
+	ldr	r5, [sp, #28]
+	strb	r0, [r5]
+	b	.L1468
+.L1564:
 	.align	2
-.L1557:
+.L1563:
 	.word	.LANCHOR9
 	.word	.LANCHOR12
 	.word	.LANCHOR151
@@ -10952,6 +11005,7 @@ FlashInit:
 	.word	.LANCHOR36
 	.word	.LANCHOR20+28
 	.word	.LANCHOR119
+	.word	.LANCHOR18
 	.word	.LANCHOR148
 	.word	.LANCHOR141
 	.word	.LANCHOR14
@@ -10970,142 +11024,199 @@ FlashInit:
 	.fpu softvfp
 	.type	FlashReadSlc2KPages, %function
 FlashReadSlc2KPages:
-	@ args = 0, pretend = 0, frame = 8
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r8, r1
-	ldr	r3, .L1588
-	mov	fp, r2
+	ldr	r3, .L1622
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	movs	r7, #0
-	ldrb	r10, [r3, #9]	@ zero_extendqisi2
-.L1560:
-	cmp	r7, r8
-	bne	.L1573
+	sub	sp, sp, #24
+	ldrb	fp, [r3, #9]	@ zero_extendqisi2
+	str	r1, [sp, #8]
+	str	r2, [sp, #12]
+.L1566:
+	ldr	r3, [sp, #8]
+	cmp	r7, r3
+	bne	.L1590
 	movs	r0, #0
-	add	sp, sp, #16
+	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1573:
-	sub	r3, r8, r7
-	add	r2, sp, #12
-	uxtb	r3, r3
-	mov	r1, fp
+.L1590:
+	ldr	r3, [sp, #8]
+	add	r2, sp, #20
+	ldr	r1, [sp, #12]
 	mov	r0, r4
+	subs	r3, r3, r7
+	uxtb	r3, r3
 	str	r3, [sp]
-	add	r3, sp, #8
+	add	r3, sp, #16
 	bl	LogAddr2PhyAddr
-	ldr	r2, .L1588+4
-	ldr	r3, [sp, #8]
+	ldr	r2, .L1622+4
+	ldr	r3, [sp, #16]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, r3
-	bhi	.L1561
+	bhi	.L1567
 	mov	r3, #-1
 	str	r3, [r4]
-.L1562:
+.L1568:
 	adds	r7, r7, #1
 	adds	r4, r4, #36
-	b	.L1560
-.L1561:
-	ldr	r2, .L1588+8
+	b	.L1566
+.L1567:
+	ldr	r2, .L1622+8
+	mov	r8, #0
 	ldrb	r5, [r2, r3]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	NandcWaitFlashReady
 	mov	r0, r5
 	bl	NandcFlashCs
-	ldr	r1, [sp, #12]
+.L1569:
+	ldr	r1, [sp, #20]
 	mov	r0, r5
 	bl	FlashReadCmd
 	mov	r0, r5
 	bl	NandcWaitFlashReady
 	ldr	r3, [r4, #12]
-	mov	r2, r10
+	mov	r2, fp
 	movs	r1, #0
 	mov	r0, r5
 	str	r3, [sp]
 	ldr	r3, [r4, #8]
 	bl	NandcXferData
-	ldr	r3, .L1588+12
+	ldr	r3, .L1622+12
 	mov	r6, r0
-	ldr	r1, [sp, #12]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L1570
+.L1573:
+	adds	r3, r6, #1
+	beq	.L1571
+.L1572:
+	cmp	r8, #0
+	beq	.L1575
+.L1574:
+	mov	r6, #256
+.L1575:
+	mov	r8, #0
+.L1576:
+	ldr	r3, .L1622+16
 	mov	r0, r5
+	ldr	r1, [sp, #20]
 	ldr	r3, [r3]
 	add	r1, r1, r3
 	bl	FlashReadCmd
+	mov	r0, r5
+	bl	NandcWaitFlashReady
 	ldr	r3, [r4, #8]
-	cbz	r3, .L1563
+	cbz	r3, .L1577
 	add	r3, r3, #2048
-.L1563:
+.L1577:
 	ldr	r2, [r4, #12]
-	cbz	r2, .L1564
+	cbz	r2, .L1578
 	adds	r2, r2, #8
-.L1564:
+.L1578:
 	str	r2, [sp]
 	movs	r1, #0
-	mov	r2, r10
+	mov	r2, fp
 	mov	r0, r5
 	bl	NandcXferData
-	mov	r1, r0
+	ldr	r3, .L1622+12
+	mov	r10, r0
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	cmp	r2, #0
+	bne	.L1579
+.L1582:
+	cmp	r10, #-1
+	beq	.L1580
+.L1581:
+	cmp	r8, #0
+	beq	.L1584
+.L1583:
+	mov	r10, #256
+.L1584:
 	mov	r0, r5
 	bl	NandcFlashDeCs
-	ldr	r3, .L1588+16
-	cmp	r6, r1
+	ldr	r2, .L1622+20
+	cmp	r6, r10
 	it	cc
-	movcc	r6, r1
-	ldrb	r2, [r3]	@ zero_extendqisi2
+	movcc	r6, r10
+	ldrb	r2, [r2]	@ zero_extendqisi2
 	add	r3, r2, r2, lsl #1
 	cmp	r6, r3, asr #2
-	bls	.L1565
-	adds	r5, r6, #1
-	it	ne
-	movne	r6, #256
-	str	r6, [r4]
-.L1568:
+	bhi	.L1585
+	movs	r3, #0
+.L1621:
+	str	r3, [r4]
 	ldr	r3, [r4, #12]
-	cbz	r3, .L1569
+	cbz	r3, .L1586
 	ldr	r1, [r3, #12]
 	adds	r1, r1, #1
-	bne	.L1569
+	bne	.L1586
 	ldr	r1, [r3, #8]
 	adds	r0, r1, #1
-	bne	.L1569
+	bne	.L1586
 	ldr	r3, [r3]
 	adds	r3, r3, #1
 	it	ne
 	strne	r1, [r4]
-.L1569:
+.L1586:
 	ldr	r3, [r4]
 	adds	r1, r3, #1
-	bne	.L1562
+	bne	.L1568
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1588+20
+	ldr	r0, .L1622+24
 	bl	printf
 	ldr	r1, [r4, #8]
-	cbz	r1, .L1571
+	cbz	r1, .L1588
 	movs	r3, #8
 	movs	r2, #4
-	ldr	r0, .L1588+24
+	ldr	r0, .L1622+28
 	bl	rknand_print_hex
-.L1571:
+.L1588:
 	ldr	r1, [r4, #12]
 	cmp	r1, #0
-	beq	.L1562
+	beq	.L1568
 	movs	r3, #4
-	ldr	r0, .L1588+28
+	ldr	r0, .L1622+32
 	mov	r2, r3
 	bl	rknand_print_hex
-	b	.L1562
-.L1565:
-	movs	r3, #0
-	str	r3, [r4]
 	b	.L1568
-.L1589:
+.L1570:
+	mov	r0, r5
+	bl	flash_read_ecc
+	cmp	r0, #5
+	bls	.L1573
+	mov	r6, #256
+	b	.L1572
+.L1571:
+	cmp	r8, #10
+	beq	.L1574
+	add	r8, r8, #1
+	b	.L1569
+.L1579:
+	mov	r0, r5
+	bl	flash_read_ecc
+	cmp	r0, #5
+	bls	.L1582
+	mov	r10, #256
+	b	.L1581
+.L1580:
+	cmp	r8, #10
+	beq	.L1583
+	add	r8, r8, #1
+	b	.L1576
+.L1585:
+	mov	r3, #256
+	b	.L1621
+.L1623:
 	.align	2
-.L1588:
+.L1622:
 	.word	.LANCHOR31
 	.word	.LANCHOR25
 	.word	.LANCHOR26
-	.word	.LANCHOR3
+	.word	.LANCHOR200
+	.word	.LANCHOR4
 	.word	.LANCHOR33
 	.word	.LC25
 	.word	.LC26
@@ -11122,36 +11233,36 @@ FlashReadSlc2KPages:
 FlashReadPages:
 	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1681
+	ldr	r3, .L1715
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #40
 	mov	r10, r0
 	str	r1, [sp, #24]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r2, [sp, #12]
-	cbnz	r3, .L1591
-	ldr	r2, .L1681+4
+	cbnz	r3, .L1625
+	ldr	r2, .L1715+4
 	mov	r8, r3
 	str	r3, [sp, #8]
 	ldrb	r2, [r2, #9]	@ zero_extendqisi2
 	str	r2, [sp, #20]
-	ldr	r2, .L1681+8
+	ldr	r2, .L1715+8
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	str	r2, [sp, #28]
-.L1592:
+.L1626:
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #24]
 	cmp	r3, r2
-	bcc	.L1630
+	bcc	.L1664
 	movs	r0, #0
-	b	.L1590
-.L1591:
+	b	.L1624
+.L1625:
 	bl	FlashReadSlc2KPages
-.L1590:
+.L1624:
 	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1630:
+.L1664:
 	ldr	r2, [sp, #8]
 	movs	r3, #36
 	ldr	r1, [sp, #12]
@@ -11167,86 +11278,86 @@ FlashReadPages:
 	str	r3, [sp]
 	add	r3, sp, #32
 	bl	LogAddr2PhyAddr
-	ldr	r2, .L1681+12
+	ldr	r2, .L1715+12
 	mov	r5, r0
 	ldr	r3, [sp, #32]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, r3
-	bhi	.L1594
+	bhi	.L1628
 	mov	r3, #-1
 	str	r3, [r10, fp]
-.L1595:
+.L1629:
 	ldr	r3, [sp, #8]
 	adds	r3, r3, #1
 	str	r3, [sp, #8]
-	b	.L1592
-.L1594:
-	ldr	r2, .L1681+16
+	b	.L1626
+.L1628:
+	ldr	r2, .L1715+16
 	ldrb	r4, [r2, r3]	@ zero_extendqisi2
-	ldr	r3, .L1681+20
+	ldr	r3, .L1715+20
 	mov	r0, r4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
 	it	eq
 	moveq	r5, #0
 	bl	NandcWaitFlashReady
-	ldr	r3, .L1681+24
+	ldr	r3, .L1715+24
 	ldr	r3, [r3]
 	ldrb	r2, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r2, #1
 	cmp	r3, #7
-	bhi	.L1597
-	ldr	r3, .L1681+28
+	bhi	.L1631
+	ldr	r3, .L1715+28
 	subs	r2, r2, #7
 	cmp	r2, #1
-	ldr	r2, .L1681+32
+	ldr	r2, .L1715+32
 	add	r1, r3, r4
 	ldrb	r3, [r1, #12]	@ zero_extendqisi2
 	ldrb	r2, [r2, r4]	@ zero_extendqisi2
 	it	ls
 	ldrbls	r3, [r1, #20]	@ zero_extendqisi2
 	cmp	r2, r3
-	beq	.L1597
-	ldr	r2, .L1681+36
+	beq	.L1631
+	ldr	r2, .L1715+36
 	mov	r0, r4
 	ldrb	r1, [r2, #-3]	@ zero_extendqisi2
 	bl	HynixSetRRPara
-.L1597:
+.L1631:
 	mov	r0, r4
 	bl	NandcFlashCs
 	ldr	r3, [sp, #12]
 	cmp	r3, #1
-	beq	.L1599
+	beq	.L1633
 	ldr	r3, [sp, #16]
 	cmp	r3, #0
-	bge	.L1600
-.L1599:
-	ldr	r3, .L1681+40
+	bge	.L1634
+.L1633:
+	ldr	r3, .L1715+40
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1600
+	cbz	r3, .L1634
 	mov	r0, r4
 	bl	flash_enter_slc_mode
-.L1607:
+.L1641:
 	ldr	r1, [sp, #36]
 	adds	r6, r1, #1
-	bne	.L1602
+	bne	.L1636
 	cmp	r4, #255
-	beq	.L1632
-.L1602:
-	cbz	r5, .L1604
-	ldr	r3, .L1681+44
+	beq	.L1666
+.L1636:
+	cbz	r5, .L1638
+	ldr	r3, .L1715+44
 	mov	r0, r4
 	ldr	r2, [r3]
 	add	r2, r2, r1
 	bl	FlashReadDpCmd
-.L1605:
+.L1639:
 	mov	r0, r4
 	bl	NandcWaitFlashReady
-	cbz	r5, .L1603
+	cbz	r5, .L1637
 	ldr	r1, [sp, #36]
 	mov	r0, r4
 	bl	FlashReadDpDataOutCmd
-.L1603:
+.L1637:
 	ldr	r3, [r7, #12]
 	movs	r1, #0
 	ldr	r2, [sp, #20]
@@ -11254,30 +11365,30 @@ FlashReadPages:
 	str	r3, [sp]
 	ldr	r3, [r7, #8]
 	bl	NandcXferData
-	ldr	r3, .L1681+8
+	ldr	r3, .L1715+8
 	mov	r6, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1606
+	cbz	r3, .L1640
 	adds	r0, r0, #1
-	bne	.L1606
-	ldr	r3, .L1681+8
+	bne	.L1640
+	ldr	r3, .L1715+8
 	movs	r5, #0
 	strb	r5, [r3]
-	b	.L1607
-.L1600:
+	b	.L1641
+.L1634:
 	mov	r0, r4
 	bl	flash_exit_slc_mode
-	b	.L1607
-.L1604:
+	b	.L1641
+.L1638:
 	mov	r0, r4
 	bl	FlashReadCmd
-	b	.L1605
-.L1632:
+	b	.L1639
+.L1666:
 	movs	r5, #0
-	b	.L1603
-.L1606:
-	cbz	r5, .L1608
-	ldr	r3, .L1681+44
+	b	.L1637
+.L1640:
+	cbz	r5, .L1642
+	ldr	r3, .L1715+44
 	mov	r0, r4
 	ldr	r1, [sp, #36]
 	ldr	r3, [r3]
@@ -11296,30 +11407,30 @@ FlashReadPages:
 	mov	r8, r0
 	it	eq
 	moveq	r5, #0
-.L1608:
+.L1642:
 	mov	r0, r4
 	bl	NandcFlashDeCs
-	ldr	r3, .L1681+8
+	ldr	r3, .L1715+8
 	adds	r1, r6, #1
 	ldrb	r2, [sp, #28]	@ zero_extendqisi2
 	strb	r2, [r3]
-	bne	.L1609
-	ldr	r3, .L1681+48
+	bne	.L1643
+	ldr	r3, .L1715+48
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L1610
-.L1614:
-	ldr	r3, .L1681+52
+	cbnz	r3, .L1644
+.L1648:
+	ldr	r3, .L1715+52
 	ldr	r5, [r3]
 	cmp	r5, #0
-	bne	.L1611
+	bne	.L1645
 	ldr	r3, [r7, #12]
 	mov	r0, r4
 	ldr	r2, [r7, #8]
 	ldr	r1, [sp, #36]
 	bl	FlashReadRawPage
-	b	.L1680
-.L1610:
-	ldr	r3, .L1681+56
+	b	.L1714
+.L1644:
+	ldr	r3, .L1715+56
 	mov	r0, r4
 	ldr	r1, [sp, #36]
 	ldr	r3, [r3]
@@ -11331,50 +11442,50 @@ FlashReadPages:
 	bl	FlashDdrTunningRead
 	adds	r2, r0, #1
 	mov	r6, r0
-	beq	.L1613
-	ldr	r3, .L1681+60
+	beq	.L1647
+	ldr	r3, .L1715+60
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r0, r3, lsr #1
-	bls	.L1633
-.L1613:
+	bls	.L1667
+.L1647:
 	ubfx	r0, r5, #8, #8
 	bl	NandcSetDdrPara
 	adds	r3, r6, #1
-	beq	.L1614
-.L1633:
+	beq	.L1648
+.L1667:
 	movs	r5, #0
-.L1609:
-	ldr	r3, .L1681+60
+.L1643:
+	ldr	r3, .L1715+60
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r6, r3, asr #2
-	bls	.L1622
-	ldr	r3, .L1681+52
+	bls	.L1656
+	ldr	r3, .L1715+52
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L1622
+	bne	.L1656
 	mov	r6, #256
-	b	.L1617
-.L1682:
+	b	.L1651
+.L1716:
 	.align	2
-.L1681:
-	.word	.LANCHOR1
+.L1715:
+	.word	.LANCHOR2
 	.word	.LANCHOR31
-	.word	.LANCHOR5
+	.word	.LANCHOR6
 	.word	.LANCHOR25
 	.word	.LANCHOR26
-	.word	.LANCHOR201
+	.word	.LANCHOR202
 	.word	.LANCHOR18
 	.word	.LANCHOR20
 	.word	.LANCHOR21
 	.word	.LANCHOR20+4
 	.word	.LANCHOR15
-	.word	.LANCHOR3
+	.word	.LANCHOR4
 	.word	.LANCHOR30
 	.word	.LANCHOR145
 	.word	.LANCHOR19
 	.word	.LANCHOR33
-.L1611:
+.L1645:
 	ldr	r3, [r7, #12]
 	mov	r0, r4
 	ldr	r2, [r7, #8]
@@ -11382,128 +11493,128 @@ FlashReadPages:
 	blx	r5
 	adds	r5, r0, #1
 	mov	r6, r0
-	bne	.L1615
-	ldr	r3, .L1683
+	bne	.L1649
+	ldr	r3, .L1717
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	cmp	r3, #7
-	bhi	.L1616
-	ldr	r2, .L1683+4
+	bhi	.L1650
+	ldr	r2, .L1717+4
 	movs	r3, #0
 	mov	r0, r4
 	ldrb	r1, [r2, #-3]	@ zero_extendqisi2
 	bl	HynixSetRRPara
-.L1616:
+.L1650:
 	ldr	r3, [r7, #12]
 	mov	r0, r4
 	ldr	r2, [r7, #8]
 	ldr	r1, [sp, #36]
 	bl	FlashReadRawPage
-	ldr	r2, .L1683+8
+	ldr	r2, .L1717+8
 	mov	r6, r0
 	mov	r3, r0
 	ldr	r1, [r7, #4]
-	ldr	r0, .L1683+12
+	ldr	r0, .L1717+12
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	bl	printf
 	adds	r0, r6, #1
-	bne	.L1615
-	ldr	r3, .L1683+16
+	bne	.L1649
+	ldr	r3, .L1717+16
 	ldrb	r5, [r3]	@ zero_extendqisi2
-	cbz	r5, .L1617
+	cbz	r5, .L1651
 	ldr	r3, [sp, #12]
 	mov	r0, r4
 	cmp	r3, #1
-	beq	.L1618
+	beq	.L1652
 	ldr	r3, [sp, #16]
 	cmp	r3, #0
-	bge	.L1619
-.L1618:
+	bge	.L1653
+.L1652:
 	bl	flash_enter_slc_mode
-.L1620:
-	ldr	r3, .L1683+20
+.L1654:
+	ldr	r3, .L1717+20
 	mov	r0, r4
 	ldr	r2, [r7, #8]
 	ldr	r1, [sp, #36]
 	ldr	r5, [r3]
 	ldr	r3, [r7, #12]
 	blx	r5
-.L1680:
+.L1714:
 	adds	r1, r0, #1
 	mov	r6, r0
 	mov	r5, #0
-	bne	.L1622
-.L1617:
+	bne	.L1656
+.L1651:
 	str	r6, [r10, fp]
-.L1623:
+.L1657:
 	ldr	r3, [r10, fp]
 	adds	r2, r3, #1
-	bne	.L1625
-	ldr	r2, .L1683+8
+	bne	.L1659
+	ldr	r2, .L1717+8
 	ldr	r1, [r7, #4]
-	ldr	r0, .L1683+24
+	ldr	r0, .L1717+24
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	bl	printf
 	ldr	r1, [r7, #12]
-	cbz	r1, .L1625
+	cbz	r1, .L1659
 	movs	r3, #4
-	ldr	r0, .L1683+28
+	ldr	r0, .L1717+28
 	mov	r2, r3
 	bl	rknand_print_hex
-.L1625:
-	cbz	r5, .L1627
-	ldr	r3, .L1683+8
+.L1659:
+	cbz	r5, .L1661
+	ldr	r3, .L1717+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r8, r3, asr #2
-	bls	.L1628
-	ldr	r3, .L1683+20
+	bls	.L1662
+	ldr	r3, .L1717+20
 	ldr	r3, [r3]
 	cmp	r3, #0
 	it	eq
 	moveq	r8, #256
-.L1628:
+.L1662:
 	cmp	r8, #-1
 	add	r3, fp, #36
 	str	r8, [r10, r3]
-	beq	.L1627
+	beq	.L1661
 	cmp	r8, #256
 	itt	ne
 	movne	r2, #0
 	strne	r2, [r10, r3]
-.L1627:
+.L1661:
 	ldr	r3, [sp, #8]
 	add	r3, r3, r5
 	str	r3, [sp, #8]
 	ldr	r3, [sp, #12]
 	cmp	r3, #1
-	beq	.L1629
+	beq	.L1663
 	ldr	r3, [sp, #16]
 	cmp	r3, #0
-	bge	.L1595
-.L1629:
-	ldr	r3, .L1683+16
+	bge	.L1629
+.L1663:
+	ldr	r3, .L1717+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1595
+	beq	.L1629
 	mov	r0, r4
 	bl	flash_exit_slc_mode
-	b	.L1595
-.L1619:
+	b	.L1629
+.L1653:
 	bl	flash_exit_slc_mode
-	b	.L1620
-.L1615:
+	b	.L1654
+.L1649:
 	movs	r5, #0
-.L1622:
+.L1656:
 	cmp	r6, #256
-	beq	.L1617
+	beq	.L1651
 	movs	r3, #0
 	str	r3, [r10, fp]
-	b	.L1623
-.L1684:
+	b	.L1657
+.L1718:
 	.align	2
-.L1683:
+.L1717:
 	.word	.LANCHOR18
 	.word	.LANCHOR20+4
 	.word	.LANCHOR33
@@ -11530,23 +11641,23 @@ FlashProgSlc2KPages:
 	mov	r8, r1
 	mov	r4, r0
 	mov	r6, r0
-	ldr	r3, .L1714
+	ldr	r3, .L1748
 	movs	r7, #0
-	ldr	fp, .L1714+28
+	ldr	fp, .L1748+28
 	str	r2, [sp, #8]
 	ldrb	r10, [r3, #9]	@ zero_extendqisi2
-.L1686:
+.L1720:
 	cmp	r7, r8
-	bne	.L1692
+	bne	.L1726
 	ldr	r3, [sp, #12]
 	cmp	r3, #0
-	bne	.L1703
-.L1713:
+	bne	.L1737
+.L1747:
 	movs	r0, #0
 	add	sp, sp, #64
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1692:
+.L1726:
 	sub	r3, r8, r7
 	add	r2, sp, #20
 	uxtb	r3, r3
@@ -11555,19 +11666,19 @@ FlashProgSlc2KPages:
 	str	r3, [sp]
 	add	r3, sp, #24
 	bl	LogAddr2PhyAddr
-	ldr	r2, .L1714+4
+	ldr	r2, .L1748+4
 	ldr	r3, [sp, #24]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, r3
-	bhi	.L1687
+	bhi	.L1721
 	mov	r3, #-1
 	str	r3, [r6]
-.L1688:
+.L1722:
 	adds	r7, r7, #1
 	adds	r6, r6, #36
-	b	.L1686
-.L1687:
-	ldr	r2, .L1714+8
+	b	.L1720
+.L1721:
+	ldr	r2, .L1748+8
 	ldrb	r5, [r2, r3]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	NandcWaitFlashReady
@@ -11599,13 +11710,13 @@ FlashProgSlc2KPages:
 	add	r1, r1, r3
 	bl	FlashProgFirstCmd
 	ldr	r3, [r6, #8]
-	cbz	r3, .L1689
+	cbz	r3, .L1723
 	add	r3, r3, #2048
-.L1689:
+.L1723:
 	ldr	r2, [r6, #12]
-	cbz	r2, .L1690
+	cbz	r2, .L1724
 	adds	r2, r2, #8
-.L1690:
+.L1724:
 	str	r2, [sp]
 	movs	r1, #1
 	mov	r2, r10
@@ -11627,24 +11738,24 @@ FlashProgSlc2KPages:
 	movmi	r3, #-1
 	strmi	r3, [r6]
 	bl	NandcFlashDeCs
-	b	.L1688
-.L1699:
+	b	.L1722
+.L1733:
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	bne	.L1694
+	bne	.L1728
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1714+12
+	ldr	r0, .L1748+12
 	bl	printf
-.L1695:
+.L1729:
 	add	r8, r8, #1
 	adds	r4, r4, #36
-.L1693:
+.L1727:
 	cmp	r7, r8
-	bne	.L1699
-	b	.L1713
-.L1694:
+	bne	.L1733
+	b	.L1747
+.L1728:
 	sub	r3, r7, r8
-	ldr	fp, .L1714+32
+	ldr	fp, .L1748+32
 	uxtb	r3, r3
 	add	r2, sp, #20
 	ldr	r1, [sp, #8]
@@ -11673,46 +11784,46 @@ FlashProgSlc2KPages:
 	bl	FlashReadPages
 	ldr	r5, [sp, #28]
 	adds	r3, r5, #1
-	bne	.L1696
+	bne	.L1730
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1714+16
+	ldr	r0, .L1748+16
 	bl	printf
 	str	r5, [r4]
-.L1696:
+.L1730:
 	ldr	r3, [r4, #12]
-	cbz	r3, .L1697
+	cbz	r3, .L1731
 	ldr	r2, [r3]
 	ldr	r3, [fp]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L1697
+	beq	.L1731
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1714+20
+	ldr	r0, .L1748+20
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4]
-.L1697:
+.L1731:
 	ldr	r3, [r4, #8]
 	cmp	r3, #0
-	beq	.L1695
+	beq	.L1729
 	ldr	r2, [r3]
 	ldr	r3, [r10]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L1695
+	beq	.L1729
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1714+24
+	ldr	r0, .L1748+24
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4]
-	b	.L1695
-.L1703:
+	b	.L1729
+.L1737:
 	mov	r8, #0
-	ldr	r10, .L1714+36
-	b	.L1693
-.L1715:
+	ldr	r10, .L1748+36
+	b	.L1727
+.L1749:
 	.align	2
-.L1714:
+.L1748:
 	.word	.LANCHOR31
 	.word	.LANCHOR25
 	.word	.LANCHOR26
@@ -11720,7 +11831,7 @@ FlashProgSlc2KPages:
 	.word	.LC30
 	.word	.LC31
 	.word	.LC32
-	.word	.LANCHOR3
+	.word	.LANCHOR4
 	.word	.LANCHOR199
 	.word	.LANCHOR198
 	.size	FlashProgSlc2KPages, .-FlashProgSlc2KPages
@@ -11737,7 +11848,7 @@ FlashProgPages:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #72
-	ldr	r5, .L1768
+	ldr	r5, .L1802
 	mov	r4, r0
 	mov	r8, r2
 	str	r1, [sp, #8]
@@ -11745,36 +11856,36 @@ FlashProgPages:
 	str	r3, [sp, #20]
 	ldrb	r5, [r5, #19]	@ zero_extendqisi2
 	str	r5, [sp, #16]
-	ldr	r5, .L1768+4
+	ldr	r5, .L1802+4
 	ldrb	r7, [r5]	@ zero_extendqisi2
-	cbnz	r7, .L1717
-	ldr	r3, .L1768+8
+	cbnz	r7, .L1751
+	ldr	r3, .L1802+8
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
 	str	r3, [sp, #12]
-.L1718:
+.L1752:
 	ldr	r3, [sp, #8]
 	cmp	r7, r3
-	bcc	.L1731
-	ldr	r6, .L1768+12
+	bcc	.L1765
+	ldr	r6, .L1802+12
 	movs	r5, #0
-	ldr	r7, .L1768+16
-.L1732:
+	ldr	r7, .L1802+16
+.L1766:
 	ldrb	r3, [r6]	@ zero_extendqisi2
 	cmp	r5, r3
-	bcc	.L1734
+	bcc	.L1768
 	ldr	r3, [sp, #20]
 	cmp	r3, #0
-	bne	.L1735
-.L1743:
+	bne	.L1769
+.L1777:
 	movs	r0, #0
-	b	.L1716
-.L1717:
+	b	.L1750
+.L1751:
 	bl	FlashProgSlc2KPages
-.L1716:
+.L1750:
 	add	sp, sp, #72
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1731:
+.L1765:
 	ldr	r3, [sp, #8]
 	movs	r6, #36
 	muls	r6, r7, r6
@@ -11787,81 +11898,81 @@ FlashProgPages:
 	mov	r0, fp
 	add	r3, sp, #32
 	bl	LogAddr2PhyAddr
-	ldr	r3, .L1768+12
+	ldr	r3, .L1802+12
 	mov	r10, r0
 	ldr	r0, [sp, #32]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r0
-	bhi	.L1720
+	bhi	.L1754
 	mov	r3, #-1
 	str	r3, [r4, r6]
-.L1721:
+.L1755:
 	adds	r7, r7, #1
-	b	.L1718
-.L1720:
-	ldr	r3, .L1768+20
+	b	.L1752
+.L1754:
+	ldr	r3, .L1802+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	ldr	r3, .L1768+24
+	ldr	r3, .L1802+24
 	it	eq
 	moveq	r10, #0
 	add	r3, r3, r0, lsl #4
 	ldr	r3, [r3, #8]
-	cbz	r3, .L1723
+	cbz	r3, .L1757
 	uxtb	r0, r0
 	bl	FlashWaitCmdDone
-.L1723:
+.L1757:
 	ldr	r3, [sp, #32]
 	movs	r1, #0
-	ldr	r2, .L1768+24
+	ldr	r2, .L1802+24
 	add	r2, r2, r3, lsl #4
 	str	r1, [r2, #12]
 	ldr	r1, [sp, #28]
 	str	fp, [r2, #8]
 	str	r1, [r2, #4]
 	cmp	r10, #0
-	beq	.L1724
+	beq	.L1758
 	add	r1, r6, #36
 	add	r1, r1, r4
 	str	r1, [r2, #12]
-.L1724:
-	ldr	r2, .L1768+28
+.L1758:
+	ldr	r2, .L1802+28
 	ldrb	r5, [r2, r3]	@ zero_extendqisi2
 	lsls	r3, r3, #4
-	ldr	r2, .L1768+24
+	ldr	r2, .L1802+24
 	mov	r0, r5
 	strb	r5, [r2, r3]
-	ldr	r3, .L1768+12
+	ldr	r3, .L1802+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1725
+	bne	.L1759
 	bl	NandcWaitFlashReady
-.L1726:
+.L1760:
 	ldr	r3, [sp, #16]
 	subs	r3, r3, #1
 	cmp	r3, #7
-	bhi	.L1727
-	ldr	r3, .L1768+32
+	bhi	.L1761
+	ldr	r3, .L1802+32
 	ldrb	r3, [r3, r5]	@ zero_extendqisi2
-	cbz	r3, .L1727
-	ldr	r1, .L1768+36
+	cbz	r3, .L1761
+	ldr	r1, .L1802+36
 	movs	r3, #0
 	mov	r0, r5
 	adds	r2, r1, #4
 	ldrb	r1, [r1, #1]	@ zero_extendqisi2
 	bl	HynixSetRRPara
-.L1727:
+.L1761:
 	mov	r0, r5
 	bl	NandcFlashCs
 	cmp	r8, #1
 	mov	r0, r5
-	bne	.L1728
-	ldr	r3, .L1768+16
+	bne	.L1762
+	ldr	r3, .L1802+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1728
+	beq	.L1762
 	bl	flash_enter_slc_mode
-.L1729:
+.L1763:
 	ldr	r1, [sp, #28]
 	mov	r0, r5
 	bl	FlashProgFirstCmd
@@ -11873,11 +11984,11 @@ FlashProgPages:
 	ldr	r3, [fp, #8]
 	bl	NandcXferData
 	cmp	r10, #0
-	beq	.L1730
+	beq	.L1764
 	ldr	r1, [sp, #28]
 	mov	r0, r5
 	bl	FlashProgDpFirstCmd
-	ldr	r3, .L1768+40
+	ldr	r3, .L1802+40
 	mov	r0, r5
 	ldr	r2, [sp, #32]
 	adds	r6, r6, #36
@@ -11888,7 +11999,7 @@ FlashProgPages:
 	it	ne
 	movne	r2, #1
 	bl	FlashWaitReadyEN
-	ldr	r3, .L1768+44
+	ldr	r3, .L1802+44
 	mov	r0, r5
 	ldr	r1, [sp, #28]
 	ldr	r3, [r3]
@@ -11901,19 +12012,19 @@ FlashProgPages:
 	str	r3, [sp]
 	ldr	r3, [r6, #8]
 	bl	NandcXferData
-.L1730:
+.L1764:
 	ldr	r1, [sp, #28]
 	mov	r0, r5
 	bl	FlashProgSecondCmd
 	mov	r0, r5
 	add	r7, r7, r10
 	bl	NandcFlashDeCs
-	b	.L1721
-.L1725:
+	b	.L1755
+.L1759:
 	bl	NandcFlashCs
 	ldr	r2, [sp, #32]
 	mov	r0, r5
-	ldr	r3, .L1768+40
+	ldr	r3, .L1802+40
 	ldr	r1, [sp, #28]
 	ldr	r2, [r3, r2, lsl #2]
 	adds	r2, r2, #0
@@ -11922,45 +12033,45 @@ FlashProgPages:
 	bl	FlashWaitReadyEN
 	mov	r0, r5
 	bl	NandcFlashDeCs
-	b	.L1726
-.L1728:
+	b	.L1760
+.L1762:
 	bl	flash_exit_slc_mode
-	b	.L1729
-.L1734:
+	b	.L1763
+.L1768:
 	uxtb	r0, r5
 	bl	FlashWaitCmdDone
 	cmp	r8, #1
-	bne	.L1733
+	bne	.L1767
 	ldrb	r3, [r7]	@ zero_extendqisi2
-	cbz	r3, .L1733
-	ldr	r2, .L1768+24
+	cbz	r3, .L1767
+	ldr	r2, .L1802+24
 	lsls	r3, r5, #4
 	ldrb	r0, [r2, r3]	@ zero_extendqisi2
 	bl	flash_exit_slc_mode
-.L1733:
+.L1767:
 	adds	r5, r5, #1
-	b	.L1732
-.L1735:
-	ldr	r10, .L1768+64
+	b	.L1766
+.L1769:
+	ldr	r10, .L1802+64
 	movs	r7, #0
-.L1736:
+.L1770:
 	ldr	r3, [sp, #8]
 	cmp	r7, r3
-	beq	.L1743
+	beq	.L1777
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	bne	.L1737
+	bne	.L1771
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1768+48
+	ldr	r0, .L1802+48
 	bl	printf
-.L1738:
+.L1772:
 	adds	r7, r7, #1
 	adds	r4, r4, #36
-	b	.L1736
-.L1737:
+	b	.L1770
+.L1771:
 	ldr	r3, [sp, #8]
 	add	r2, sp, #28
-	ldr	fp, .L1768+68
+	ldr	fp, .L1802+68
 	mov	r1, r8
 	mov	r0, r4
 	mov	r6, r4
@@ -11989,44 +12100,44 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	r5, [sp, #36]
 	adds	r3, r5, #1
-	bne	.L1739
+	bne	.L1773
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1768+52
+	ldr	r0, .L1802+52
 	bl	printf
 	str	r5, [r4]
-.L1739:
+.L1773:
 	ldr	r3, [r4, #12]
-	cbz	r3, .L1740
+	cbz	r3, .L1774
 	ldr	r2, [r3]
 	ldr	r3, [fp]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L1740
+	beq	.L1774
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1768+56
+	ldr	r0, .L1802+56
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4]
-.L1740:
+.L1774:
 	ldr	r3, [r4, #8]
 	cmp	r3, #0
-	beq	.L1738
+	beq	.L1772
 	ldr	r2, [r3]
 	ldr	r3, [r10]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L1738
+	beq	.L1772
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1768+60
+	ldr	r0, .L1802+60
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4]
-	b	.L1738
-.L1769:
+	b	.L1772
+.L1803:
 	.align	2
-.L1768:
+.L1802:
 	.word	.LANCHOR18
-	.word	.LANCHOR1
+	.word	.LANCHOR2
 	.word	.LANCHOR31
 	.word	.LANCHOR25
 	.word	.LANCHOR15
@@ -12036,7 +12147,7 @@ FlashProgPages:
 	.word	.LANCHOR21
 	.word	.LANCHOR20
 	.word	.LANCHOR17
-	.word	.LANCHOR3
+	.word	.LANCHOR4
 	.word	.LC29
 	.word	.LC30
 	.word	.LC31
@@ -12055,14 +12166,14 @@ FlashProgPages:
 FlashTestBlk:
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1773
+	ldr	r3, .L1807
 	push	{r4, r5, lr}
 	mov	r4, r0
 	sub	sp, sp, #108
 	ldr	r3, [r3]
 	cmp	r0, r3
-	bcc	.L1772
-	ldr	r5, .L1773+4
+	bcc	.L1806
+	ldr	r5, .L1807+4
 	add	r0, sp, #40
 	movs	r2, #32
 	movs	r1, #165
@@ -12094,17 +12205,17 @@ FlashTestBlk:
 	movne	r4, #1
 	negs	r4, r4
 	bl	FlashEraseBlocks
-.L1770:
+.L1804:
 	mov	r0, r4
 	add	sp, sp, #108
 	@ sp needed
 	pop	{r4, r5, pc}
-.L1772:
+.L1806:
 	movs	r4, #0
-	b	.L1770
-.L1774:
+	b	.L1804
+.L1808:
 	.align	2
-.L1773:
+.L1807:
 	.word	.LANCHOR149
 	.word	.LANCHOR153
 	.size	FlashTestBlk, .-FlashTestBlk
@@ -12119,48 +12230,48 @@ FlashTestBlk:
 FtlLowFormatEraseBlock:
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1820
+	ldr	r3, .L1854
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #40
 	str	r0, [sp, #8]
 	ldr	r3, [r3]
 	str	r1, [sp, #4]
 	cmp	r3, #0
-	bne	.L1802
-	ldr	r2, .L1820+4
+	bne	.L1836
+	ldr	r2, .L1854+4
 	mov	r10, r3
 	mov	r5, r3
 	mov	r4, r3
 	mov	r8, #36
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	str	r2, [sp, #20]
-	ldr	r2, .L1820+8
+	ldr	r2, .L1854+8
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	str	r2, [sp, #12]
-	ldr	r2, .L1820+12
+	ldr	r2, .L1854+12
 	str	r0, [r2]
-	ldr	r2, .L1820+16
+	ldr	r2, .L1854+16
 	ldrh	fp, [r2]
-	ldr	r2, .L1820+20
+	ldr	r2, .L1854+20
 	ldr	r7, [r2]
-	ldr	r2, .L1820+24
+	ldr	r2, .L1854+24
 	ldr	r2, [r2]
 	str	r2, [sp, #16]
-	ldr	r2, .L1820+28
+	ldr	r2, .L1854+28
 	ldrh	r2, [r2]
 	str	r2, [sp, #24]
-.L1777:
+.L1811:
 	uxth	r2, r10
 	cmp	fp, r2
-	bhi	.L1781
+	bhi	.L1815
 	cmp	r5, #0
-	beq	.L1775
+	beq	.L1809
 	ldr	r3, [sp, #12]
 	mov	r0, r7
-	ldr	r10, .L1820+4
+	ldr	r10, .L1854+4
 	mov	r8, #0
 	mov	r2, r5
-	ldr	r7, .L1820+20
+	ldr	r7, .L1854+20
 	adds	r6, r3, #0
 	it	ne
 	movne	r6, #1
@@ -12170,44 +12281,44 @@ FtlLowFormatEraseBlock:
 	ldrb	r3, [sp, #20]	@ zero_extendqisi2
 	strb	r3, [r10]
 	mov	r10, #36
-.L1783:
+.L1817:
 	uxth	r3, r8
 	cmp	r5, r3
-	bhi	.L1785
+	bhi	.L1819
 	ldr	r3, [sp, #4]
 	cmp	r3, #0
-	bne	.L1786
+	bne	.L1820
 	uxth	r6, r6
 	movs	r3, #6
 	str	r3, [sp, #16]
 	movs	r3, #1
 	str	r3, [sp, #12]
-.L1787:
+.L1821:
 	mov	r8, #0
-.L1796:
-	ldr	r3, .L1820+16
+.L1830:
+	ldr	r3, .L1854+16
 	mov	fp, #0
 	mov	r5, fp
 	ldrh	r3, [r3]
 	str	r3, [sp, #24]
-	ldr	r3, .L1820+20
+	ldr	r3, .L1854+20
 	ldr	r10, [r3]
-	ldr	r3, .L1820+32
+	ldr	r3, .L1854+32
 	ldr	r3, [r3]
 	str	r3, [sp, #28]
-	ldr	r3, .L1820+36
+	ldr	r3, .L1854+36
 	ldr	r3, [r3]
 	str	r3, [sp, #32]
-	ldr	r3, .L1820+28
+	ldr	r3, .L1854+28
 	ldrh	r3, [r3]
 	str	r3, [sp, #36]
-.L1788:
+.L1822:
 	ldr	r3, [sp, #24]
 	uxth	r2, fp
 	cmp	r3, r2
-	bhi	.L1791
-	cbz	r5, .L1775
-	ldr	fp, .L1820+4
+	bhi	.L1825
+	cbz	r5, .L1809
+	ldr	fp, .L1854+4
 	movs	r3, #1
 	mov	r0, r10
 	movs	r7, #0
@@ -12216,59 +12327,59 @@ FtlLowFormatEraseBlock:
 	strb	r7, [fp]
 	bl	FlashProgPages
 	ldrb	r3, [sp, #20]	@ zero_extendqisi2
-	ldr	r10, .L1820+20
+	ldr	r10, .L1854+20
 	strb	r3, [fp]
 	mov	fp, #36
-.L1793:
+.L1827:
 	uxth	r3, r7
 	cmp	r5, r3
-	bhi	.L1795
+	bhi	.L1829
 	ldr	r3, [sp, #16]
 	add	r8, r8, r3
 	ldr	r3, [sp, #12]
 	uxth	r8, r8
 	cmp	r3, r8
-	bhi	.L1796
-	ldr	r8, .L1820+20
+	bhi	.L1830
+	ldr	r8, .L1854+20
 	movs	r7, #0
 	mov	r10, #36
-.L1797:
+.L1831:
 	uxth	r3, r7
 	cmp	r5, r3
-	bhi	.L1799
+	bhi	.L1833
 	ldr	r3, [sp, #8]
 	cmp	r3, #63
-	bls	.L1800
+	bls	.L1834
 	ldr	r3, [sp, #4]
-	cbz	r3, .L1775
-.L1800:
-	ldr	r3, .L1820+20
+	cbz	r3, .L1809
+.L1834:
+	ldr	r3, .L1854+20
 	mov	r2, r5
 	mov	r1, r6
 	ldr	r0, [r3]
 	bl	FlashEraseBlocks
-.L1775:
+.L1809:
 	mov	r0, r4
 	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1781:
+.L1815:
 	mul	r2, r8, r10
 	movs	r3, #0
 	ldr	r1, [sp, #8]
 	str	r3, [r7, r2]
-	ldr	r3, .L1820+40
+	ldr	r3, .L1854+40
 	ldrb	r0, [r3, r10]	@ zero_extendqisi2
 	bl	V2P_block
 	ldr	r3, [sp, #4]
 	mov	r6, r0
-	cbz	r3, .L1778
+	cbz	r3, .L1812
 	bl	IsBlkInVendorPart
-	cbnz	r0, .L1779
-.L1778:
+	cbnz	r0, .L1813
+.L1812:
 	mov	r0, r6
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L1780
+	cbnz	r0, .L1814
 	ldr	r3, [sp, #24]
 	mla	r1, r8, r5, r7
 	lsls	r6, r6, #10
@@ -12281,62 +12392,62 @@ FtlLowFormatEraseBlock:
 	bic	r2, r2, #3
 	add	r2, r2, r3
 	str	r2, [r1, #12]
-.L1779:
+.L1813:
 	add	r10, r10, #1
-	b	.L1777
-.L1780:
+	b	.L1811
+.L1814:
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L1779
-.L1785:
+	b	.L1813
+.L1819:
 	mul	r3, r10, r8
 	ldr	r2, [r7]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
 	adds	r3, r3, #1
-	bne	.L1784
+	bne	.L1818
 	ldr	r0, [r1, #4]
 	adds	r4, r4, #1
 	uxth	r4, r4
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.L1784:
+.L1818:
 	add	r8, r8, #1
-	b	.L1783
-.L1786:
-	ldr	r3, .L1820+44
+	b	.L1817
+.L1820:
+	ldr	r3, .L1854+44
 	ldrh	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L1820+8
+	ldr	r3, .L1854+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L1803
+	cbnz	r3, .L1837
 	ldr	r3, [sp, #12]
 	movs	r6, #1
 	lsrs	r3, r3, #2
 	str	r3, [sp, #16]
-	b	.L1787
-.L1803:
+	b	.L1821
+.L1837:
 	movs	r6, #1
 	str	r6, [sp, #16]
-	b	.L1787
-.L1791:
+	b	.L1821
+.L1825:
 	movs	r3, #36
 	ldr	r1, [sp, #8]
 	mul	r2, r3, fp
 	movs	r3, #0
 	str	r3, [r10, r2]
-	ldr	r3, .L1820+40
+	ldr	r3, .L1854+40
 	ldrb	r0, [r3, fp]	@ zero_extendqisi2
 	bl	V2P_block
 	ldr	r3, [sp, #4]
 	mov	r7, r0
-	cbz	r3, .L1789
+	cbz	r3, .L1823
 	bl	IsBlkInVendorPart
-	cbnz	r0, .L1790
-.L1789:
+	cbnz	r0, .L1824
+.L1823:
 	mov	r0, r7
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L1790
+	cbnz	r0, .L1824
 	movs	r3, #36
 	add	r7, r8, r7, lsl #10
 	mla	r1, r3, r5, r10
@@ -12351,44 +12462,44 @@ FtlLowFormatEraseBlock:
 	bic	r2, r2, #3
 	add	r2, r2, r3
 	str	r2, [r1, #12]
-.L1790:
+.L1824:
 	add	fp, fp, #1
-	b	.L1788
-.L1795:
+	b	.L1822
+.L1829:
 	mul	r3, fp, r7
 	ldr	r2, [r10]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
-	cbz	r3, .L1794
+	cbz	r3, .L1828
 	ldr	r0, [r1, #4]
 	adds	r4, r4, #1
 	uxth	r4, r4
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.L1794:
+.L1828:
 	adds	r7, r7, #1
-	b	.L1793
-.L1799:
+	b	.L1827
+.L1833:
 	ldr	r3, [sp, #4]
-	cbz	r3, .L1798
+	cbz	r3, .L1832
 	mul	r3, r10, r7
 	ldr	r2, [r8]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
-	cbnz	r3, .L1798
+	cbnz	r3, .L1832
 	ldr	r0, [r1, #4]
 	movs	r1, #1
 	ubfx	r0, r0, #10, #16
 	bl	FtlFreeSysBlkQueueIn
-.L1798:
+.L1832:
 	adds	r7, r7, #1
-	b	.L1797
-.L1802:
+	b	.L1831
+.L1836:
 	movs	r4, #0
-	b	.L1775
-.L1821:
+	b	.L1809
+.L1855:
 	.align	2
-.L1820:
+.L1854:
 	.word	.LANCHOR76
 	.word	.LANCHOR27
 	.word	.LANCHOR15
@@ -12414,42 +12525,42 @@ FtlBbmTblFlush:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L1833
+	ldr	r3, .L1872
 	ldr	r4, [r3]
 	str	r3, [sp, #12]
 	cmp	r4, #0
-	bne	.L1824
-	ldr	r3, .L1833+4
+	bne	.L1858
+	ldr	r3, .L1872+4
 	mov	r1, r4
-	ldr	r7, .L1833+8
-	ldr	r5, .L1833+12
+	ldr	r7, .L1872+8
+	ldr	r5, .L1872+12
 	ldr	r3, [r3]
 	ldr	r0, [r7]
-	mov	r8, r7
-	ldr	r6, .L1833+16
+	mov	fp, r7
+	ldr	r6, .L1872+16
 	str	r3, [r5, #12]
-	ldr	r7, .L1833+20
-	ldr	r3, .L1833+24
-	ldr	r10, .L1833+56
+	ldr	r7, .L1872+20
+	ldr	r3, .L1872+24
+	ldr	r8, .L1872+56
 	str	r0, [r5, #8]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-.L1825:
+.L1859:
 	ldrh	r3, [r7]
 	cmp	r4, r3
-	blt	.L1826
+	blt	.L1860
 	ldr	r6, [r5, #12]
 	movs	r2, #16
-	ldr	r4, .L1833+28
+	ldr	r4, .L1872+28
 	movs	r1, #255
 	movs	r7, #0
 	mov	r0, r6
+	mov	r8, r7
 	bl	ftl_memset
 	movw	r3, #61649
 	mov	r10, r4
 	strh	r3, [r6]	@ movhi
 	ldr	r3, [r4, #8]
-	str	r7, [sp, #8]
 	str	r3, [r6, #4]
 	ldrh	r3, [r4]
 	strh	r3, [r6, #2]	@ movhi
@@ -12457,42 +12568,43 @@ FtlBbmTblFlush:
 	strh	r3, [r6, #8]	@ movhi
 	ldrh	r3, [r4, #6]
 	strh	r3, [r6, #10]	@ movhi
-	ldr	r3, .L1833+32
+	ldr	r3, .L1872+32
 	ldr	r3, [r3]
 	strh	r3, [r6, #12]	@ movhi
-.L1827:
-	ldr	r3, [r8]
-	mov	fp, #0
+.L1861:
+	ldr	r3, [fp]
 	ldrh	r2, [r4, #2]
 	ldrh	r1, [r4]
 	str	r3, [r5, #8]
-	ldr	r3, .L1833+4
+	ldr	r3, .L1872+4
 	ldrh	r0, [r6, #10]
-	str	fp, [r5]
 	ldr	r3, [r3]
 	str	r3, [r5, #12]
+	movs	r3, #0
+	str	r3, [r5]
 	orr	r3, r2, r1, lsl #10
 	str	r3, [r5, #4]
 	ldrh	r3, [r4, #4]
 	str	r0, [sp]
-	ldr	r0, .L1833+36
+	ldr	r0, .L1872+36
 	bl	printf
-	ldr	r3, .L1833+40
+	ldr	r3, .L1872+40
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1828
+	blt	.L1862
 	ldr	r3, [r4, #8]
+	mov	r1, #0	@ movhi
 	ldrh	r2, [r4]
-	strh	fp, [r4, #2]	@ movhi
+	strh	r1, [r4, #2]	@ movhi
 	adds	r3, r3, #1
 	str	r3, [r4, #8]
 	str	r3, [r6, #4]
 	strh	r2, [r6, #8]	@ movhi
 	ldrh	r3, [r4, #4]
 	strh	r2, [r4, #4]	@ movhi
-	ldr	r2, .L1833+44
+	ldr	r2, .L1872+44
 	strh	r3, [r4]	@ movhi
 	lsls	r3, r3, #10
 	ldr	r0, [r2]
@@ -12501,9 +12613,9 @@ FtlBbmTblFlush:
 	mov	r1, r2
 	str	r3, [r0, #4]
 	bl	FlashEraseBlocks
-.L1828:
+.L1862:
 	movs	r3, #1
-	ldr	r0, .L1833+12
+	ldr	r0, .L1872+12
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
@@ -12511,29 +12623,29 @@ FtlBbmTblFlush:
 	adds	r3, r3, #1
 	strh	r3, [r10, #2]	@ movhi
 	ldr	r3, [r5]
-	adds	r3, r3, #1
-	bne	.L1829
+	adds	r2, r3, #1
+	bne	.L1863
 	adds	r7, r7, #1
 	ldr	r1, [r5, #4]
 	uxth	r7, r7
-	ldr	r0, .L1833+48
+	ldr	r0, .L1872+48
 	bl	printf
 	cmp	r7, #3
-	bls	.L1827
+	bls	.L1861
 	mov	r2, r7
 	ldr	r1, [r5, #4]
-	ldr	r0, .L1833+52
+	ldr	r0, .L1872+52
 	bl	printf
 	ldr	r2, [sp, #12]
 	movs	r3, #1
 	str	r3, [r2]
-.L1824:
+.L1858:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1826:
-	ldrh	r2, [r10]
+.L1860:
+	ldrh	r2, [r8]
 	ldr	r3, [r5, #8]
 	ldr	r1, [r6, #4]!
 	mul	r0, r4, r2
@@ -12541,21 +12653,21 @@ FtlBbmTblFlush:
 	adds	r4, r4, #1
 	add	r0, r3, r0, lsl #2
 	bl	ftl_memcpy
-	b	.L1825
-.L1829:
-	ldr	r3, [sp, #8]
-	cmp	r3, #0
-	bne	.L1824
-	movs	r3, #1
-	str	r3, [sp, #8]
-	b	.L1827
-.L1834:
+	b	.L1859
+.L1863:
+	add	r8, r8, #1
+	cmp	r8, #1
+	beq	.L1861
+	cmp	r3, #256
+	beq	.L1861
+	b	.L1858
+.L1873:
 	.align	2
-.L1833:
+.L1872:
 	.word	.LANCHOR76
 	.word	.LANCHOR188
 	.word	.LANCHOR183
-	.word	.LANCHOR202
+	.word	.LANCHOR203
 	.word	.LANCHOR74+24
 	.word	.LANCHOR45
 	.word	.LANCHOR57
@@ -12579,153 +12691,153 @@ FtlBbmTblFlush:
 allocate_data_superblock:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1900
+	ldr	r3, .L1939
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L1837
-.L1836:
-	ldr	r3, .L1900+4
-	ldr	r8, .L1900+60
-	ldr	r7, .L1900+8
+	bne	.L1876
+.L1875:
+	ldr	r3, .L1939+4
+	ldr	r8, .L1939+60
+	ldr	r7, .L1939+8
 	ldrh	r3, [r3]
 	ldrh	r2, [r8]
 	add	r3, r3, r2
 	ldrh	r2, [r7]
 	cmp	r3, r2
-	ble	.L1838
-	ldr	r1, .L1900+12
-	movw	r2, #3139
-	ldr	r0, .L1900+16
+	ble	.L1877
+	ldr	r1, .L1939+12
+	movw	r2, #3165
+	ldr	r0, .L1939+16
 	bl	printf
-	ldr	r1, .L1900+20
-	ldr	r0, .L1900+24
+	ldr	r1, .L1939+20
+	ldr	r0, .L1939+24
 	bl	printf
-.L1838:
-	ldr	r3, .L1900+28
+.L1877:
+	ldr	r3, .L1939+28
 	ldrb	r2, [r4, #8]	@ zero_extendqisi2
 	cmp	r4, r3
-	bne	.L1839
-	ldr	r3, .L1900+4
+	bne	.L1878
+	ldr	r3, .L1939+4
 	ldrh	r5, [r3]
-	ldr	r3, .L1900+32
+	ldr	r3, .L1939+32
 	ldr	r3, [r3]
 	lsrs	r0, r5, #1
 	adds	r1, r0, #1
 	mul	r6, r3, r5
 	add	r1, r1, r6, lsr #2
-	ldr	r6, .L1900+36
+	ldr	r6, .L1939+36
 	uxth	r1, r1
 	ldr	r6, [r6]
-	cbz	r6, .L1840
-	ldr	r6, .L1900+40
+	cbz	r6, .L1879
+	ldr	r6, .L1939+40
 	ldr	r6, [r6]
 	cmp	r6, #39
-	bhi	.L1840
+	bhi	.L1879
 	cmp	r6, #2
-	bls	.L1874
+	bls	.L1913
 	lsls	r1, r5, #31
-	bpl	.L1870
+	bpl	.L1909
 	cmp	r3, #0
-	beq	.L1874
-.L1870:
+	beq	.L1913
+.L1909:
 	mov	r1, r0
-	b	.L1840
-.L1839:
+	b	.L1879
+.L1878:
 	cmp	r2, #1
-	bne	.L1874
-	ldr	r3, .L1900+44
+	bne	.L1913
+	ldr	r3, .L1939+44
 	ldrh	r3, [r3]
 	cmp	r3, #1
-	beq	.L1874
-	ldr	r3, .L1900+48
+	beq	.L1913
+	ldr	r3, .L1939+48
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1874
-	ldr	r3, .L1900+4
-	ldr	r0, .L1900+36
+	bne	.L1913
+	ldr	r3, .L1939+4
+	ldr	r0, .L1939+36
 	ldrh	r3, [r3]
 	ldr	r0, [r0]
 	lsrs	r1, r3, #3
-	cbz	r0, .L1840
-	ldr	r0, .L1900+40
+	cbz	r0, .L1879
+	ldr	r0, .L1939+40
 	ldr	r0, [r0]
 	cmp	r0, #1
-	bhi	.L1840
+	bhi	.L1879
 	rsb	r3, r3, r3, lsl #3
 	ubfx	r1, r3, #3, #16
-.L1840:
-	cbz	r1, .L1841
+.L1879:
+	cbz	r1, .L1880
 	subs	r1, r1, #1
 	uxth	r1, r1
-.L1841:
-	ldr	r0, .L1900+52
+.L1880:
+	ldr	r0, .L1939+52
 	bl	List_pop_index_node
-	ldr	r3, .L1900+4
+	ldr	r3, .L1939+4
 	mov	r5, r0
 	uxth	r10, r0
 	ldrh	r3, [r3]
-	cbnz	r3, .L1842
-	ldr	r1, .L1900+12
-	movw	r2, #3159
-	ldr	r0, .L1900+16
+	cbnz	r3, .L1881
+	ldr	r1, .L1939+12
+	movw	r2, #3185
+	ldr	r0, .L1939+16
 	bl	printf
-	ldr	r1, .L1900+20
-	ldr	r0, .L1900+24
+	ldr	r1, .L1939+20
+	ldr	r0, .L1939+24
 	bl	printf
-.L1842:
-	ldr	r3, .L1900+4
-	ldr	r2, .L1900+4
+.L1881:
+	ldr	r3, .L1939+4
+	ldr	r2, .L1939+4
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	strh	r3, [r2]	@ movhi
 	ldrh	r3, [r7]
 	cmp	r3, r10
-	bls	.L1836
+	bls	.L1875
 	uxth	r5, r5
 	lsls	r3, r5, #1
 	str	r3, [sp]
-	ldr	r3, .L1900+56
+	ldr	r3, .L1939+56
 	ldr	r3, [r3]
 	ldrh	r6, [r3, r5, lsl #1]
 	cmp	r6, #0
-	bne	.L1836
+	bne	.L1875
 	strh	r10, [r4]	@ movhi
 	mov	r0, r4
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1844
-	ldr	r3, .L1900+56
+	bne	.L1883
+	ldr	r3, .L1939+56
 	movw	r2, #65535
 	ldr	r3, [r3]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
-	ldr	r3, .L1900+4
+	ldr	r3, .L1939+4
 	ldrh	r2, [r8]
 	ldrh	r3, [r3]
 	add	r3, r3, r2
 	ldrh	r2, [r7]
 	cmp	r3, r2
-	ble	.L1836
-	movw	r2, #3175
-	ldr	r1, .L1900+12
-	ldr	r0, .L1900+16
+	ble	.L1875
+	movw	r2, #3201
+	ldr	r1, .L1939+12
+	ldr	r0, .L1939+16
 	bl	printf
-	ldr	r1, .L1900+20
-	ldr	r0, .L1900+24
+	ldr	r1, .L1939+20
+	ldr	r0, .L1939+24
 	bl	printf
-	b	.L1836
-.L1874:
+	b	.L1875
+.L1913:
 	movs	r1, #0
-	b	.L1841
-.L1901:
+	b	.L1880
+.L1940:
 	.align	2
-.L1900:
+.L1939:
 	.word	.LANCHOR76
 	.word	.LANCHOR88
 	.word	.LANCHOR40
-	.word	.LANCHOR203
+	.word	.LANCHOR204
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
@@ -12738,82 +12850,82 @@ allocate_data_superblock:
 	.word	.LANCHOR87
 	.word	.LANCHOR83
 	.word	.LANCHOR85
-.L1844:
-	ldr	r3, .L1902
+.L1883:
+	ldr	r3, .L1941
 	ldrh	r2, [r8]
 	ldrh	r3, [r3]
 	add	r3, r3, r2
 	ldrh	r2, [r7]
 	cmp	r3, r2
-	ble	.L1846
-	ldr	r1, .L1902+4
-	movw	r2, #3178
-	ldr	r0, .L1902+8
+	ble	.L1885
+	ldr	r1, .L1941+4
+	movw	r2, #3204
+	ldr	r0, .L1941+8
 	bl	printf
-	ldr	r1, .L1902+12
-	ldr	r0, .L1902+16
+	ldr	r1, .L1941+12
+	ldr	r0, .L1941+16
 	bl	printf
-.L1846:
-	ldr	r3, .L1902+20
+.L1885:
+	ldr	r3, .L1941+20
 	add	lr, r4, #16
-	ldr	r2, .L1902+24
+	ldr	r2, .L1941+24
 	mov	r8, #0
 	ldr	ip, [r3]
 	ldrh	r0, [r2]
 	movs	r2, #36
 	mov	r3, ip
 	mla	r0, r2, r0, ip
-.L1847:
+.L1886:
 	cmp	r0, r3
-	bne	.L1849
-	cbnz	r6, .L1850
-	ldr	r1, .L1902+4
-	movw	r2, #3190
-	ldr	r0, .L1902+8
+	bne	.L1888
+	cbnz	r6, .L1889
+	ldr	r1, .L1941+4
+	mov	r2, #3216
+	ldr	r0, .L1941+8
 	bl	printf
-	ldr	r1, .L1902+12
-	ldr	r0, .L1902+16
+	ldr	r1, .L1941+12
+	ldr	r0, .L1941+16
 	bl	printf
-.L1850:
-	ldr	r3, .L1902+28
-	ldr	r8, .L1902+80
+.L1889:
+	ldr	r3, .L1941+28
+	ldr	r8, .L1941+80
 	ldr	r3, [r3]
-	cbz	r3, .L1851
-	ldr	r3, .L1902+32
+	cbz	r3, .L1890
+	ldr	r3, .L1941+32
 	cmp	r4, r3
-	bne	.L1851
+	bne	.L1890
 	ldr	r3, [r8]
 	ldrh	r3, [r3, r5, lsl #1]
 	cmp	r3, #40
 	itt	hi
 	movhi	r3, #0
 	strbhi	r3, [r4, #8]
-.L1851:
-	ldr	r3, .L1902+36
+.L1890:
+	ldr	r3, .L1941+36
 	ldrh	r3, [r3]
 	cmp	r3, r10
-	bne	.L1852
-	ldr	r1, .L1902+4
-	movw	r2, #3197
-	ldr	r0, .L1902+8
+	bne	.L1891
+	ldr	r1, .L1941+4
+	movw	r2, #3223
+	ldr	r0, .L1941+8
 	bl	printf
-	ldr	r1, .L1902+12
-	ldr	r0, .L1902+16
+	ldr	r1, .L1941+12
+	ldr	r0, .L1941+16
 	bl	printf
-.L1852:
+.L1891:
 	ldrb	r2, [r4, #8]	@ zero_extendqisi2
-	ldr	r3, .L1902+40
-	ldr	fp, .L1902+84
+	ldr	r3, .L1941+40
+	ldr	fp, .L1941+84
 	cmp	r2, #0
-	bne	.L1853
+	bne	.L1892
 	ldr	r1, [r8]
 	ldrh	r2, [r1, r5, lsl #1]
 	cmp	r2, #0
-	beq	.L1854
-	ldr	r0, .L1902+44
+	beq	.L1893
+	ldr	r0, .L1941+44
 	ldrh	r0, [r0]
 	add	r2, r2, r0
-.L1897:
+.L1936:
 	strh	r2, [r1, r5, lsl #1]	@ movhi
 	mov	r0, r10
 	ldr	r2, [r3]
@@ -12822,43 +12934,43 @@ allocate_data_superblock:
 	adds	r2, r2, #1
 	str	r2, [r3]
 	bl	ftl_set_blk_mode
-.L1898:
+.L1937:
 	ldr	r2, [r8]
 	ldr	r3, [sp, #4]
 	ldrh	r0, [r2, r5, lsl #1]
-	ldr	r2, .L1902+48
+	ldr	r2, .L1941+48
 	ldr	r1, [r2]
 	cmp	r0, r1
 	ldrh	r1, [r7]
 	it	hi
 	strhi	r0, [r2]
-	ldr	r2, .L1902+44
+	ldr	r2, .L1941+44
 	ldr	r0, [r3]
 	ldr	r3, [fp]
 	ldrh	r2, [r2]
-	ldr	r7, .L1902+52
+	ldr	r7, .L1941+52
 	mla	r0, r0, r2, r3
 	bl	__aeabi_uidiv
-	ldr	r3, .L1902+56
+	ldr	r3, .L1941+56
 	str	r0, [r3]
-	ldr	r3, .L1902+60
+	ldr	r3, .L1941+60
 	ldr	r2, [r3]
 	ldr	r3, [r2, #16]
 	adds	r3, r3, #1
 	str	r3, [r2, #16]
-	ldr	r3, .L1902+20
+	ldr	r3, .L1941+20
 	ldr	r0, [r3]
 	movs	r3, #36
 	adds	r1, r0, #4
 	mla	r3, r3, r6, r0
 	adds	r3, r3, #40
-.L1858:
+.L1897:
 	adds	r1, r1, #36
 	cmp	r3, r1
-	bne	.L1859
-	ldr	r3, .L1902+64
+	bne	.L1898
+	ldr	r3, .L1941+64
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1860
+	cbz	r3, .L1899
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	mov	r2, r6
 	cmp	r3, #1
@@ -12866,8 +12978,8 @@ allocate_data_superblock:
 	moveq	r1, #0
 	movne	r1, #1
 	bl	FlashEraseBlocks
-.L1860:
-	ldr	r3, .L1902+20
+.L1899:
+	ldr	r3, .L1941+20
 	movs	r7, #0
 	mov	r8, r7
 	mov	fp, #36
@@ -12875,43 +12987,43 @@ allocate_data_superblock:
 	ldrb	r1, [r4, #8]	@ zero_extendqisi2
 	ldr	r0, [r3]
 	bl	FlashEraseBlocks
-.L1862:
+.L1901:
 	uxth	r3, r7
 	cmp	r6, r3
-	bhi	.L1864
+	bhi	.L1903
 	cmp	r8, #0
-	beq	.L1865
+	beq	.L1904
 	mov	r0, r10
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L1865:
+.L1904:
 	ldrb	r2, [r4, #7]	@ zero_extendqisi2
 	cmp	r2, #0
-	bne	.L1866
-	ldr	r3, .L1902+68
+	bne	.L1905
+	ldr	r3, .L1941+68
 	movw	r2, #65535
 	ldr	r3, [r3]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
-	b	.L1836
-.L1849:
+	b	.L1875
+.L1888:
 	ldrh	r1, [lr], #2
 	movw	fp, #65535
 	str	r8, [r3, #8]
 	str	r8, [r3, #12]
 	cmp	r1, fp
-	beq	.L1848
+	beq	.L1887
 	mla	fp, r2, r6, ip
 	adds	r6, r6, #1
 	lsls	r1, r1, #10
 	uxth	r6, r6
 	str	r1, [fp, #4]
-.L1848:
+.L1887:
 	adds	r3, r3, #36
-	b	.L1847
-.L1854:
+	b	.L1886
+.L1893:
 	movs	r2, #2
-	b	.L1897
-.L1853:
+	b	.L1936
+.L1892:
 	ldr	r1, [r8]
 	mov	r0, r10
 	str	r3, [sp, #4]
@@ -12922,20 +13034,20 @@ allocate_data_superblock:
 	adds	r2, r2, #1
 	str	r2, [fp]
 	bl	ftl_set_blk_mode.part.10
-	b	.L1898
-.L1859:
+	b	.L1937
+.L1898:
 	ldr	r2, [r1, #-36]
 	ands	r2, r2, r7
 	str	r2, [r1, #-36]
-	b	.L1858
-.L1864:
-	ldr	r2, .L1902+20
+	b	.L1897
+.L1903:
+	ldr	r2, .L1941+20
 	mul	r3, fp, r7
 	ldr	r2, [r2]
 	adds	r1, r2, r3
 	ldr	r2, [r2, r3]
 	adds	r3, r2, #1
-	bne	.L1863
+	bne	.L1902
 	ldr	r0, [r1, #4]
 	add	r8, r8, #1
 	str	r2, [sp, #4]
@@ -12947,12 +13059,12 @@ allocate_data_superblock:
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	strb	r3, [r4, #7]
-.L1863:
+.L1902:
 	adds	r7, r7, #1
-	b	.L1862
-.L1866:
-	ldr	r3, .L1902+72
-	ldr	r1, .L1902+76
+	b	.L1901
+.L1905:
+	ldr	r3, .L1941+72
+	ldr	r1, .L1941+76
 	ldrh	r3, [r3]
 	strh	r10, [r4]	@ movhi
 	smulbb	r3, r3, r2
@@ -12965,32 +13077,32 @@ allocate_data_superblock:
 	str	r2, [r4, #12]
 	adds	r2, r2, #1
 	str	r2, [r1]
-	ldr	r2, .L1902+68
+	ldr	r2, .L1941+68
 	ldr	r1, [sp]
 	ldr	r2, [r2]
 	strh	r3, [r2, r1]	@ movhi
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L1867
+	cbz	r3, .L1906
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1837
-.L1867:
-	ldr	r1, .L1902+4
-	movw	r2, #3256
-	ldr	r0, .L1902+8
+	cbnz	r3, .L1876
+.L1906:
+	ldr	r1, .L1941+4
+	movw	r2, #3282
+	ldr	r0, .L1941+8
 	bl	printf
-	ldr	r1, .L1902+12
-	ldr	r0, .L1902+16
+	ldr	r1, .L1941+12
+	ldr	r0, .L1941+16
 	bl	printf
-.L1837:
+.L1876:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1903:
+.L1942:
 	.align	2
-.L1902:
+.L1941:
 	.word	.LANCHOR88
-	.word	.LANCHOR203
+	.word	.LANCHOR204
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
@@ -12998,12 +13110,12 @@ allocate_data_superblock:
 	.word	.LANCHOR38
 	.word	.LANCHOR28
 	.word	.LANCHOR91
-	.word	.LANCHOR204
+	.word	.LANCHOR205
 	.word	.LANCHOR167
 	.word	.LANCHOR48
 	.word	.LANCHOR169
 	.word	-1024
-	.word	.LANCHOR205
+	.word	.LANCHOR206
 	.word	.LANCHOR191
 	.word	.LANCHOR15
 	.word	.LANCHOR83
@@ -13025,43 +13137,43 @@ FtlGcFreeBadSuperBlk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, r0
-	ldr	r4, .L1916
+	ldr	r4, .L1955
 	ldrh	r3, [r4]
-	cbz	r3, .L1905
-	ldr	r8, .L1916+12
+	cbz	r3, .L1944
+	ldr	r8, .L1955+12
 	movs	r7, #0
-.L1906:
-	ldr	r3, .L1916+4
+.L1945:
+	ldr	r3, .L1955+4
 	ldrh	r2, [r3]
 	uxth	r3, r7
 	cmp	r2, r3
-	bhi	.L1912
+	bhi	.L1951
 	bl	FtlGcReFreshBadBlk
-.L1905:
+.L1944:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1912:
-	ldr	r2, .L1916+8
+.L1951:
+	ldr	r2, .L1955+8
 	uxth	r3, r7
 	mov	r1, r10
 	mov	fp, #0
 	ldrb	r0, [r2, r3]	@ zero_extendqisi2
 	bl	V2P_block
 	mov	r1, r0
-.L1907:
+.L1946:
 	ldrh	r3, [r4]
 	uxth	r5, fp
 	cmp	r3, r5
-	bhi	.L1911
+	bhi	.L1950
 	adds	r7, r7, #1
-	b	.L1906
-.L1911:
+	b	.L1945
+.L1950:
 	uxth	r6, fp
 	ldrh	r3, [r8, r6, lsl #1]
 	cmp	r3, r1
-	bne	.L1908
+	bne	.L1947
 	mov	r0, r1
 	str	r1, [sp, #4]
 	bl	FtlBbmMapBadBlock
@@ -13069,23 +13181,23 @@ FtlGcFreeBadSuperBlk:
 	ldrh	r2, [r4]
 	add	r3, r8, r6, lsl #1
 	ldr	r1, [sp, #4]
-.L1909:
+.L1948:
 	cmp	r5, r2
-	bcc	.L1910
+	bcc	.L1949
 	subs	r2, r2, #1
 	strh	r2, [r4]	@ movhi
-.L1908:
+.L1947:
 	add	fp, fp, #1
-	b	.L1907
-.L1910:
+	b	.L1946
+.L1949:
 	ldrh	r0, [r3, #2]!
 	adds	r5, r5, #1
 	uxth	r5, r5
 	strh	r0, [r3, #-2]	@ movhi
-	b	.L1909
-.L1917:
+	b	.L1948
+.L1956:
 	.align	2
-.L1916:
+.L1955:
 	.word	.LANCHOR116
 	.word	.LANCHOR38
 	.word	.LANCHOR47
@@ -13104,32 +13216,32 @@ update_vpc_list:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	mov	r4, r0
-	ldr	r3, .L1928
+	ldr	r3, .L1967
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	bne	.L1919
-	ldr	r2, .L1928+4
+	bne	.L1958
+	ldr	r2, .L1967+4
 	ldrh	r1, [r2]
 	cmp	r1, r0
-	bne	.L1920
+	bne	.L1959
 	movw	r3, #65535
 	strh	r3, [r2]	@ movhi
-.L1921:
-	ldr	r5, .L1928+8
+.L1960:
+	ldr	r5, .L1967+8
 	mov	r1, r4
-	ldr	r0, .L1928+12
+	ldr	r0, .L1967+12
 	bl	List_remove_node
 	ldrh	r3, [r5]
-	cbnz	r3, .L1923
-	ldr	r1, .L1928+16
-	movw	r2, #3367
-	ldr	r0, .L1928+20
+	cbnz	r3, .L1962
+	ldr	r1, .L1967+16
+	movw	r2, #3393
+	ldr	r0, .L1967+20
 	bl	printf
-	ldr	r1, .L1928+24
-	ldr	r0, .L1928+28
+	ldr	r1, .L1967+24
+	ldr	r0, .L1967+28
 	bl	printf
-.L1923:
+.L1962:
 	ldrh	r3, [r5]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -13137,52 +13249,52 @@ update_vpc_list:
 	bl	free_data_superblock
 	mov	r0, r4
 	bl	FtlGcFreeBadSuperBlk
-	ldr	r3, .L1928+32
+	ldr	r3, .L1967+32
 	ldrh	r2, [r5]
 	ldrh	r3, [r3]
 	add	r3, r3, r2
-	ldr	r2, .L1928+36
+	ldr	r2, .L1967+36
 	ldrh	r2, [r2]
 	cmp	r3, r2
-	ble	.L1927
-	ldr	r1, .L1928+16
-	movw	r2, #3370
-	ldr	r0, .L1928+20
+	ble	.L1966
+	ldr	r1, .L1967+16
+	movw	r2, #3396
+	ldr	r0, .L1967+20
 	bl	printf
-	ldr	r1, .L1928+24
-	ldr	r0, .L1928+28
+	ldr	r1, .L1967+24
+	ldr	r0, .L1967+28
 	bl	printf
-.L1927:
+.L1966:
 	movs	r3, #1
-	b	.L1918
-.L1920:
-	ldr	r2, .L1928+40
+	b	.L1957
+.L1959:
+	ldr	r2, .L1967+40
 	ldrh	r2, [r2]
 	cmp	r2, r0
-	beq	.L1918
-	ldr	r2, .L1928+44
+	beq	.L1957
+	ldr	r2, .L1967+44
 	ldrh	r2, [r2]
 	cmp	r2, r0
-	beq	.L1918
-	ldr	r2, .L1928+48
+	beq	.L1957
+	ldr	r2, .L1967+48
 	ldrh	r2, [r2]
 	cmp	r2, r0
-	bne	.L1921
-.L1918:
+	bne	.L1960
+.L1957:
 	mov	r0, r3
 	pop	{r3, r4, r5, pc}
-.L1919:
+.L1958:
 	bl	List_update_data_list
 	movs	r3, #0
-	b	.L1918
-.L1929:
+	b	.L1957
+.L1968:
 	.align	2
-.L1928:
+.L1967:
 	.word	.LANCHOR83
-	.word	.LANCHOR204
+	.word	.LANCHOR205
 	.word	.LANCHOR85
 	.word	.LANCHOR82
-	.word	.LANCHOR206
+	.word	.LANCHOR207
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
@@ -13207,47 +13319,47 @@ decrement_vpc_count:
 	push	{r4, r5, r6, lr}
 	cmp	r0, r3
 	mov	r4, r0
-	beq	.L1931
-	ldr	r5, .L1942
+	beq	.L1970
+	ldr	r5, .L1981
 	ldr	r3, [r5]
 	ldrh	r2, [r3, r0, lsl #1]
 	cmp	r2, #0
-	bne	.L1932
+	bne	.L1971
 	mov	r1, r0
-	ldr	r0, .L1942+4
+	ldr	r0, .L1981+4
 	bl	printf
 	ldr	r3, [r5]
 	ldrh	r3, [r3, r4, lsl #1]
-	cbnz	r3, .L1933
-	ldr	r1, .L1942+8
-	movw	r2, #3385
-	ldr	r0, .L1942+12
+	cbnz	r3, .L1972
+	ldr	r1, .L1981+8
+	movw	r2, #3411
+	ldr	r0, .L1981+12
 	bl	printf
-	ldr	r1, .L1942+16
-	ldr	r0, .L1942+20
+	ldr	r1, .L1981+16
+	ldr	r0, .L1981+20
 	bl	printf
-.L1933:
+.L1972:
 	ldr	r3, [r5]
 	movs	r2, #32
 	mov	r1, r4
-	ldr	r0, .L1942+24
+	ldr	r0, .L1981+24
 	strh	r2, [r3, r4, lsl #1]	@ movhi
 	bl	test_node_in_list
-	cbz	r0, .L1934
-	ldr	r6, .L1942+28
+	cbz	r0, .L1973
+	ldr	r6, .L1981+28
 	mov	r1, r4
-	ldr	r0, .L1942+24
+	ldr	r0, .L1981+24
 	bl	List_remove_node
 	ldrh	r3, [r6]
-	cbnz	r3, .L1935
-	ldr	r1, .L1942+8
-	movw	r2, #3389
-	ldr	r0, .L1942+12
+	cbnz	r3, .L1974
+	ldr	r1, .L1981+8
+	movw	r2, #3415
+	ldr	r0, .L1981+12
 	bl	printf
-	ldr	r1, .L1942+16
-	ldr	r0, .L1942+20
+	ldr	r1, .L1981+16
+	ldr	r0, .L1981+20
 	bl	printf
-.L1935:
+.L1974:
 	ldrh	r3, [r6]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -13255,33 +13367,33 @@ decrement_vpc_count:
 	bl	INSERT_DATA_LIST
 	ldr	r3, [r5]
 	mov	r1, r4
-	ldr	r0, .L1942+32
+	ldr	r0, .L1981+32
 	ldrh	r2, [r3, r4, lsl #1]
 	bl	printf
-.L1934:
+.L1973:
 	mov	r0, r4
 	bl	FtlGcRefreshBlock
-.L1938:
+.L1977:
 	movs	r5, #0
-	b	.L1930
-.L1932:
+	b	.L1969
+.L1971:
 	subs	r2, r2, #1
 	strh	r2, [r3, r0, lsl #1]	@ movhi
-.L1931:
-	ldr	r6, .L1942+36
+.L1970:
+	ldr	r6, .L1981+36
 	movw	r3, #65535
 	ldrh	r0, [r6]
 	cmp	r0, r3
-	bne	.L1937
+	bne	.L1976
 	strh	r4, [r6]	@ movhi
-	b	.L1938
-.L1937:
+	b	.L1977
+.L1976:
 	cmp	r4, r0
-	beq	.L1938
+	beq	.L1977
 	bl	update_vpc_list
-	ldr	r3, .L1942+40
+	ldr	r3, .L1981+40
 	adds	r5, r0, #0
-	ldr	r2, .L1942+44
+	ldr	r2, .L1981+44
 	it	ne
 	movne	r5, #1
 	strh	r4, [r6]	@ movhi
@@ -13289,31 +13401,31 @@ decrement_vpc_count:
 	ldr	r2, [r2]
 	subs	r3, r3, r2
 	asrs	r2, r3, #1
-	ldr	r3, .L1942+48
+	ldr	r3, .L1981+48
 	muls	r3, r2, r3
-	ldr	r2, .L1942
+	ldr	r2, .L1981
 	ldr	r2, [r2]
 	uxth	r1, r3
 	ldrh	r2, [r2, r1, lsl #1]
-	cbnz	r2, .L1930
+	cbnz	r2, .L1969
 	cmp	r4, r1
-	beq	.L1930
-	ldr	r1, .L1942+8
-	movw	r2, #3410
-	ldr	r0, .L1942+12
+	beq	.L1969
+	ldr	r1, .L1981+8
+	movw	r2, #3436
+	ldr	r0, .L1981+12
 	bl	printf
-	ldr	r1, .L1942+16
-	ldr	r0, .L1942+20
+	ldr	r1, .L1981+16
+	ldr	r0, .L1981+20
 	bl	printf
-.L1930:
+.L1969:
 	mov	r0, r5
 	pop	{r4, r5, r6, pc}
-.L1943:
+.L1982:
 	.align	2
-.L1942:
+.L1981:
 	.word	.LANCHOR83
 	.word	.LC36
-	.word	.LANCHOR207
+	.word	.LANCHOR208
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
@@ -13340,71 +13452,71 @@ FtlSlcSuperblockCheck:
 	push	{r4, r5, r6, lr}
 	mov	r4, r0
 	cmp	r3, #0
-	beq	.L1944
+	beq	.L1983
 	ldrh	r2, [r0]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1944
+	beq	.L1983
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
-	ldr	r5, .L1955
-	ldr	r6, .L1955+4
+	ldr	r5, .L1994
+	ldr	r6, .L1994+4
 	adds	r3, r3, #8
 	ldrh	r3, [r0, r3, lsl #1]
-.L1948:
+.L1987:
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L1950
+	beq	.L1989
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1951
+	bne	.L1990
 	ldrb	r1, [r5]	@ zero_extendqisi2
-	cbnz	r1, .L1951
+	cbnz	r1, .L1990
 	ldrh	r1, [r4, #2]
 	ldrh	r1, [r6, r1, lsl #1]
 	cmp	r1, r2
-	bne	.L1951
+	bne	.L1990
 	ldrh	r3, [r4, #4]
 	ldrh	r0, [r4]
 	subs	r3, r3, #1
 	strh	r3, [r4, #4]	@ movhi
 	bl	decrement_vpc_count
 	ldrh	r2, [r4, #4]
-	cbnz	r2, .L1950
+	cbnz	r2, .L1989
 	ldrh	r3, [r4, #2]
 	strb	r2, [r4, #6]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	pop	{r4, r5, r6, pc}
-.L1950:
+.L1989:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	ldr	r2, .L1955+8
+	ldr	r2, .L1994+8
 	adds	r3, r3, #1
 	ldrh	r2, [r2]
 	uxtb	r3, r3
 	strb	r3, [r4, #6]
 	cmp	r2, r3
-	bne	.L1949
+	bne	.L1988
 	ldrh	r3, [r4, #2]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [r4, #6]
-.L1949:
+.L1988:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r3, [r4, r3, lsl #1]
-	b	.L1948
-.L1951:
+	b	.L1987
+.L1990:
 	ldrb	r2, [r5]	@ zero_extendqisi2
-	cbz	r2, .L1944
+	cbz	r2, .L1983
 	cmp	r3, #1
-	bne	.L1944
-	ldr	r3, .L1955+12
+	bne	.L1983
+	ldr	r3, .L1994+12
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1944
-	ldr	r3, .L1955+16
+	bcc	.L1983
+	ldr	r3, .L1994+16
 	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
 	ldr	r2, [r3]
@@ -13412,16 +13524,16 @@ FtlSlcSuperblockCheck:
 	subs	r3, r3, r0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
 	movs	r3, #0
-	ldr	r2, .L1955+20
+	ldr	r2, .L1994+20
 	strh	r3, [r4, #4]	@ movhi
 	strb	r3, [r4, #6]
 	ldrh	r2, [r2]
 	strh	r2, [r4, #2]	@ movhi
-.L1944:
+.L1983:
 	pop	{r4, r5, r6, pc}
-.L1956:
+.L1995:
 	.align	2
-.L1955:
+.L1994:
 	.word	.LANCHOR15
 	.word	.LANCHOR120
 	.word	.LANCHOR38
@@ -13445,93 +13557,93 @@ get_new_active_ppa:
 	push	{r4, r5, r6, r7, r8, lr}
 	mov	r4, r0
 	cmp	r2, r3
-	bne	.L1958
-	ldr	r1, .L1979
-	movw	r2, #3307
-	ldr	r0, .L1979+4
+	bne	.L1997
+	ldr	r1, .L2018
+	movw	r2, #3333
+	ldr	r0, .L2018+4
 	bl	printf
-	ldr	r1, .L1979+8
-	ldr	r0, .L1979+12
+	ldr	r1, .L2018+8
+	ldr	r0, .L2018+12
 	bl	printf
-.L1958:
-	ldr	r5, .L1979+16
+.L1997:
+	ldr	r5, .L2018+16
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5]
 	cmp	r2, r3
-	bne	.L1959
-	ldr	r1, .L1979
-	movw	r2, #3308
-	ldr	r0, .L1979+4
+	bne	.L1998
+	ldr	r1, .L2018
+	movw	r2, #3334
+	ldr	r0, .L2018+4
 	bl	printf
-	ldr	r1, .L1979+8
-	ldr	r0, .L1979+12
+	ldr	r1, .L2018+8
+	ldr	r0, .L2018+12
 	bl	printf
-.L1959:
+.L1998:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1960
-	ldr	r1, .L1979
-	movw	r2, #3309
-	ldr	r0, .L1979+4
+	cbnz	r3, .L1999
+	ldr	r1, .L2018
+	movw	r2, #3335
+	ldr	r0, .L2018+4
 	bl	printf
-	ldr	r1, .L1979+8
-	ldr	r0, .L1979+12
+	ldr	r1, .L2018+8
+	ldr	r0, .L2018+12
 	bl	printf
-.L1960:
+.L1999:
 	movs	r3, #0
-	ldr	r7, .L1979+20
+	ldr	r7, .L2018+20
 	strb	r3, [r4, #10]
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	ldr	r6, .L1979+24
+	ldr	r6, .L2018+24
 	adds	r3, r3, #8
 	ldrh	r2, [r4, r3, lsl #1]
-.L1961:
+.L2000:
 	movw	r0, #65535
 	cmp	r2, r0
-	beq	.L1962
+	beq	.L2001
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	ldrh	r1, [r4, #2]
 	cmp	r3, #1
 	ldrh	r3, [r4, #4]
-	bne	.L1964
+	bne	.L2003
 	ldrb	ip, [r6]	@ zero_extendqisi2
 	cmp	ip, #0
-	bne	.L1964
-	ldr	ip, .L1979+28
+	bne	.L2003
+	ldr	ip, .L2018+28
 	ldrh	ip, [ip, r1, lsl #1]
 	cmp	ip, r0
-	bne	.L1964
+	bne	.L2003
 	subs	r3, r3, #1
 	ldrh	r0, [r4]
 	strh	r3, [r4, #4]	@ movhi
 	bl	decrement_vpc_count
-.L1962:
+.L2001:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	ldrh	r2, [r7]
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r2, r3
 	strb	r3, [r4, #6]
-	bne	.L1963
+	bne	.L2002
 	ldrh	r3, [r4, #2]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [r4, #6]
-.L1963:
+.L2002:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r2, [r4, r3, lsl #1]
-	b	.L1961
-.L1964:
-	ldr	r8, .L1979+24
+	b	.L2000
+.L2003:
+	ldr	r8, .L2018+24
 	orr	r6, r1, r2, lsl #10
 	subs	r3, r3, #1
 	strh	r3, [r4, #4]	@ movhi
-.L1965:
+.L2004:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	movw	r2, #65535
 	ldrh	r0, [r7]
-.L1967:
+.L2006:
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, r0
@@ -13543,31 +13655,31 @@ get_new_active_ppa:
 	add	r1, r3, #8
 	ldrh	r1, [r4, r1, lsl #1]
 	cmp	r1, r2
-	beq	.L1967
+	beq	.L2006
 	strb	r3, [r4, #6]
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1968
+	bne	.L2007
 	ldrb	r1, [r8]	@ zero_extendqisi2
 	ldrh	r3, [r4, #2]
-	cbnz	r1, .L1969
-	ldr	r1, .L1979+28
+	cbnz	r1, .L2008
+	ldr	r1, .L2018+28
 	ldrh	r3, [r1, r3, lsl #1]
 	cmp	r3, r2
-	bne	.L1968
+	bne	.L2007
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L1968
+	cbz	r3, .L2007
 	subs	r3, r3, #1
 	ldrh	r0, [r4]
 	strh	r3, [r4, #4]	@ movhi
 	bl	decrement_vpc_count
-	b	.L1965
-.L1969:
-	ldr	r2, .L1979+32
+	b	.L2004
+.L2008:
+	ldr	r2, .L2018+32
 	ldrh	r2, [r2]
 	cmp	r3, r2
-	bcc	.L1968
-	ldr	r3, .L1979+36
+	bcc	.L2007
+	ldr	r3, .L2018+36
 	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
 	ldr	r2, [r3]
@@ -13579,27 +13691,27 @@ get_new_active_ppa:
 	strh	r3, [r4, #4]	@ movhi
 	strb	r3, [r4, #6]
 	strh	r2, [r4, #2]	@ movhi
-.L1968:
+.L2007:
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5]
 	cmp	r2, r3
-	bne	.L1957
+	bne	.L1996
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L1957
-	ldr	r1, .L1979
-	movw	r2, #3353
-	ldr	r0, .L1979+4
+	cbz	r3, .L1996
+	ldr	r1, .L2018
+	movw	r2, #3379
+	ldr	r0, .L2018+4
 	bl	printf
-	ldr	r1, .L1979+8
-	ldr	r0, .L1979+12
+	ldr	r1, .L2018+8
+	ldr	r0, .L2018+12
 	bl	printf
-.L1957:
+.L1996:
 	mov	r0, r6
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1980:
+.L2019:
 	.align	2
-.L1979:
-	.word	.LANCHOR208
+.L2018:
+	.word	.LANCHOR209
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
@@ -13621,38 +13733,38 @@ get_new_active_ppa:
 FtlVpcTblFlush:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L2001
+	ldr	r2, .L2044
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	ldr	r3, [r2]
 	str	r2, [sp, #4]
 	cmp	r3, #0
-	bne	.L1983
-	ldr	r4, .L2001+4
-	ldr	fp, .L2001+108
-	ldr	r8, .L2001+112
-	ldr	r5, .L2001+8
-	ldr	r0, [fp]
-	ldr	r6, [r8]
+	bne	.L2022
+	ldr	r4, .L2044+4
+	ldr	r8, .L2044+112
+	ldr	fp, .L2044+116
+	ldr	r5, .L2044+8
+	ldr	r0, [r8]
+	ldr	r6, [fp]
 	ldrh	r2, [r4]
 	str	r0, [r5, #8]
 	str	r6, [r5, #12]
 	strh	r2, [r6, #2]	@ movhi
 	movw	r2, #61604
-	ldr	r7, .L2001+12
+	ldr	r7, .L2044+12
 	strh	r2, [r6]	@ movhi
 	str	r3, [r6, #12]
-	ldr	ip, .L2001+116
+	ldr	ip, .L2044+120
 	ldr	r2, [r4, #8]
 	str	r3, [r6, #8]
-	ldr	r3, .L2001+16
+	ldr	r3, .L2044+16
 	str	r2, [r6, #4]
 	stm	r7, {r3, ip}
 	ldrh	r3, [r4, #6]
 	strh	r3, [r7, #8]	@ movhi
-	ldr	r3, .L2001+20
+	ldr	r3, .L2044+20
 	ldrh	r3, [r3]
 	strb	r3, [r7, #10]
-	ldr	r3, .L2001+24
+	ldr	r3, .L2044+24
 	ldrh	r2, [r3]
 	ldrh	r1, [r3, #2]
 	strh	r2, [r7, #14]	@ movhi
@@ -13660,7 +13772,7 @@ FtlVpcTblFlush:
 	ldrb	r3, [r3, #8]	@ zero_extendqisi2
 	strb	r3, [r7, #11]
 	orr	r2, r2, r1, lsl #6
-	ldr	r3, .L2001+28
+	ldr	r3, .L2044+28
 	strh	r2, [r7, #16]	@ movhi
 	ldrh	r2, [r3]
 	ldrh	r1, [r3, #2]
@@ -13669,7 +13781,7 @@ FtlVpcTblFlush:
 	ldrb	r3, [r3, #8]	@ zero_extendqisi2
 	strb	r3, [r7, #12]
 	orr	r2, r2, r1, lsl #6
-	ldr	r3, .L2001+32
+	ldr	r3, .L2044+32
 	strh	r2, [r7, #20]	@ movhi
 	ldrh	r2, [r3]
 	strh	r2, [r7, #22]	@ movhi
@@ -13678,33 +13790,33 @@ FtlVpcTblFlush:
 	ldrb	r3, [r3, #8]	@ zero_extendqisi2
 	strb	r3, [r7, #13]
 	orr	r2, r2, r1, lsl #6
-	ldr	r3, .L2001+36
+	ldr	r3, .L2044+36
 	movs	r1, #255
 	strh	r2, [r7, #24]	@ movhi
 	ldr	r3, [r3]
 	str	r3, [r7, #32]
-	ldr	r3, .L2001+40
+	ldr	r3, .L2044+40
 	ldr	r3, [r3]
 	str	r3, [r7, #40]
-	ldr	r3, .L2001+44
+	ldr	r3, .L2044+44
 	ldr	r3, [r3]
 	str	r3, [r7, #36]
-	ldr	r3, .L2001+48
+	ldr	r3, .L2044+48
 	ldrh	r3, [r3]
 	strh	r3, [r7, #44]	@ movhi
-	ldr	r3, .L2001+52
+	ldr	r3, .L2044+52
 	ldrh	r3, [r3]
 	strh	r3, [r7, #46]	@ movhi
-	ldr	r3, .L2001+56
+	ldr	r3, .L2044+56
 	ldrh	r2, [r3]
 	bl	ftl_memset
 	mov	r1, r7
-	ldr	r7, .L2001+60
+	ldr	r7, .L2044+60
 	movs	r2, #48
 	ldr	r0, [r5, #8]
 	bl	ftl_memcpy
 	ldrh	r2, [r7]
-	ldr	r3, .L2001+64
+	ldr	r3, .L2044+64
 	ldr	r0, [r5, #8]
 	ldr	r1, [r3]
 	lsls	r2, r2, #1
@@ -13712,7 +13824,7 @@ FtlVpcTblFlush:
 	bl	ftl_memcpy
 	ldrh	r0, [r7]
 	ldr	r3, [r5, #8]
-	ldr	r1, .L2001+68
+	ldr	r1, .L2044+68
 	lsrs	r2, r0, #3
 	adds	r0, r0, #24
 	lsls	r0, r0, #1
@@ -13721,12 +13833,12 @@ FtlVpcTblFlush:
 	bic	r0, r0, #3
 	add	r0, r0, r3
 	bl	ftl_memcpy
-	ldr	r3, .L2001+72
+	ldr	r3, .L2044+72
 	ldrh	r3, [r3]
-	cbz	r3, .L1984
+	cbz	r3, .L2023
 	ldrh	r0, [r7]
-	ldr	r3, .L2001+76
-	ldr	r1, .L2001+80
+	ldr	r3, .L2044+76
+	ldr	r1, .L2044+80
 	ldrh	r2, [r3]
 	lsrs	r3, r0, #3
 	ldr	r1, [r1]
@@ -13737,32 +13849,32 @@ FtlVpcTblFlush:
 	ubfx	r3, r3, #2, #14
 	add	r0, r0, r3, lsl #2
 	bl	ftl_memcpy
-.L1984:
+.L2023:
 	movs	r7, #0
 	movw	r10, #65535
 	movs	r0, #0
 	bl	FtlUpdateVaildLpn
-.L1985:
-	ldr	r3, [fp]
+.L2024:
+	ldr	r3, [r8]
 	ldrh	r1, [r4, #2]
 	ldrh	r2, [r4]
 	str	r3, [r5, #8]
-	ldr	r3, [r8]
+	ldr	r3, [fp]
 	str	r3, [r5, #12]
 	orr	r3, r1, r2, lsl #10
 	str	r3, [r5, #4]
-	ldr	r3, .L2001+84
+	ldr	r3, .L2044+84
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r1, r3
-	blt	.L1986
+	blt	.L2025
 	movs	r3, #0
 	ldrh	r10, [r4, #4]
 	strh	r3, [r4, #2]	@ movhi
 	strh	r2, [r4, #4]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L2001+40
-	ldr	r1, .L2001+40
+	ldr	r3, .L2044+40
+	ldr	r1, .L2044+40
 	strh	r0, [r4]	@ movhi
 	ldr	r3, [r3]
 	adds	r2, r3, #1
@@ -13772,9 +13884,18 @@ FtlVpcTblFlush:
 	str	r2, [r5, #4]
 	str	r3, [r6, #4]
 	strh	r0, [r6, #2]	@ movhi
-.L1986:
+.L2025:
+	ldr	r3, .L2044+88
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2026
+	ldr	r3, .L2044+56
+	ldr	r0, [r8]
+	ldrh	r1, [r3]
+	bl	js_hash
+	str	r0, [r6, #12]
+.L2026:
 	movs	r3, #1
-	ldr	r0, .L2001+8
+	ldr	r0, .L2044+8
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
@@ -13784,58 +13905,58 @@ FtlVpcTblFlush:
 	uxth	r3, r3
 	adds	r1, r2, #1
 	strh	r3, [r4, #2]	@ movhi
-	bne	.L1987
+	bne	.L2027
 	cmp	r3, #1
-	bne	.L1988
-	ldr	r1, .L2001+88
-	movw	r2, #1217
-	ldr	r0, .L2001+92
+	bne	.L2028
+	ldr	r1, .L2044+92
+	movw	r2, #1219
+	ldr	r0, .L2044+96
 	bl	printf
-	ldr	r1, .L2001+96
-	ldr	r0, .L2001+100
+	ldr	r1, .L2044+100
+	ldr	r0, .L2044+104
 	bl	printf
-.L1988:
+.L2028:
 	ldrh	r3, [r4, #2]
 	adds	r7, r7, #1
 	uxth	r7, r7
 	cmp	r3, #1
 	itttt	eq
-	ldreq	r3, .L2001+84
+	ldreq	r3, .L2044+84
 	ldrheq	r3, [r3]
 	addeq	r3, r3, #-1
 	strheq	r3, [r4, #2]	@ movhi
 	cmp	r7, #3
-	bls	.L1985
+	bls	.L2024
 	mov	r2, r7
 	ldr	r1, [r5, #4]
-	ldr	r0, .L2001+104
+	ldr	r0, .L2044+108
 	bl	printf
 	ldr	r2, [sp, #4]
 	movs	r3, #1
 	str	r3, [r2]
-.L1983:
+.L2022:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1987:
+.L2027:
 	cmp	r3, #1
-	beq	.L1985
+	beq	.L2024
 	cmp	r2, #256
-	beq	.L1985
+	beq	.L2024
 	movw	r3, #65535
 	cmp	r10, r3
-	beq	.L1983
+	beq	.L2022
 	movs	r1, #1
 	mov	r0, r10
 	bl	FtlFreeSysBlkQueueIn
-	b	.L1983
-.L2002:
+	b	.L2022
+.L2045:
 	.align	2
-.L2001:
+.L2044:
 	.word	.LANCHOR76
-	.word	.LANCHOR209
-	.word	.LANCHOR202
+	.word	.LANCHOR210
+	.word	.LANCHOR203
 	.word	.LANCHOR80
 	.word	1179929683
 	.word	.LANCHOR45
@@ -13850,19 +13971,20 @@ FtlVpcTblFlush:
 	.word	.LANCHOR57
 	.word	.LANCHOR40
 	.word	.LANCHOR83
-	.word	.LANCHOR0
+	.word	.LANCHOR1
 	.word	.LANCHOR69
 	.word	.LANCHOR66
 	.word	.LANCHOR131
 	.word	.LANCHOR53
-	.word	.LANCHOR210
+	.word	.LANCHOR2
+	.word	.LANCHOR211
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
 	.word	.LC38
 	.word	.LANCHOR183
 	.word	.LANCHOR188
-	.word	1342177363
+	.word	1342177366
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
 	.section	.text.FtlSuperblockPowerLostFix,"ax",%progbits
 	.align	1
@@ -13875,31 +13997,31 @@ FtlVpcTblFlush:
 FtlSuperblockPowerLostFix:
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2018
+	ldr	r3, .L2061
 	push	{r4, r5, r6, r7, r8, r10, lr}
 	mov	r4, r0
 	sub	sp, sp, #44
 	ldr	r8, [r3]
 	cmp	r8, #0
-	bne	.L2003
-	ldr	r3, .L2018+4
+	bne	.L2046
+	ldr	r3, .L2061+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L2014
+	beq	.L2057
 	ldrb	r3, [r0, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L2014
+	bne	.L2057
 	ldrh	r6, [r0, #4]
 	mov	r8, r3
-.L2005:
+.L2048:
 	mov	r3, #-1
-	ldr	r2, .L2018+8
+	ldr	r2, .L2061+8
 	str	r3, [sp, #20]
 	movs	r7, #0
-	ldr	r3, .L2018+12
+	ldr	r3, .L2061+12
 	ldr	r5, [r2]
 	mvn	r2, #2
-	ldr	r10, .L2018+24
+	ldr	r10, .L2061+24
 	ldr	r3, [r3]
 	str	r5, [sp, #16]
 	str	r3, [sp, #12]
@@ -13915,38 +14037,38 @@ FtlSuperblockPowerLostFix:
 	add	r2, r2, #1269760
 	addw	r2, r2, #1507
 	str	r2, [r3, #4]
-.L2006:
+.L2049:
 	adds	r6, r6, #-1
-	bcc	.L2009
+	bcc	.L2052
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L2007
-.L2009:
-	ldr	r3, .L2018+16
+	cbnz	r3, .L2050
+.L2052:
+	ldr	r3, .L2061+16
 	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
-	ldr	r3, .L2018+20
+	ldr	r3, .L2061+20
 	ldrh	r3, [r3]
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [r4, #6]
 	strh	r3, [r4, #4]	@ movhi
-.L2003:
+.L2046:
 	add	sp, sp, #44
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L2014:
+.L2057:
 	movs	r6, #12
-	b	.L2005
-.L2007:
+	b	.L2048
+.L2050:
 	mov	r0, r4
 	bl	get_new_active_ppa
 	str	r0, [sp, #8]
 	adds	r0, r0, #1
-	beq	.L2009
+	beq	.L2052
 	ldr	r3, [r10]
 	movs	r1, #1
 	add	r0, sp, #4
@@ -13961,10 +14083,10 @@ FtlSuperblockPowerLostFix:
 	bl	FlashProgPages
 	ldrh	r0, [r4]
 	bl	decrement_vpc_count
-	b	.L2006
-.L2019:
+	b	.L2049
+.L2062:
 	.align	2
-.L2018:
+.L2061:
 	.word	.LANCHOR76
 	.word	.LANCHOR15
 	.word	.LANCHOR188
@@ -13984,36 +14106,36 @@ FtlSuperblockPowerLostFix:
 FtlLoadFactoryBbt:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2030
+	ldr	r3, .L2073
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r6, #0
-	ldr	r5, .L2030+4
+	ldr	r5, .L2073+4
 	ldr	r3, [r3]
-	ldr	r7, .L2030+8
-	ldr	r10, .L2030+20
+	ldr	r7, .L2073+8
+	ldr	r10, .L2073+20
 	str	r3, [r5, #8]
-	ldr	r3, .L2030+12
+	ldr	r3, .L2073+12
 	ldr	r8, [r3]
 	str	r8, [r5, #12]
-.L2021:
-	ldr	r3, .L2030+16
+.L2064:
+	ldr	r3, .L2073+16
 	ldrh	r3, [r3]
 	cmp	r6, r3
-	bcc	.L2026
+	bcc	.L2069
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2026:
+.L2069:
 	ldrh	r4, [r10]
 	movw	r3, #65535
-	ldr	fp, .L2030+4
+	ldr	fp, .L2073+4
 	strh	r3, [r7, #2]!	@ movhi
 	subs	r4, r4, #1
 	uxth	r4, r4
-.L2022:
+.L2065:
 	ldrh	r3, [r10]
 	sub	r2, r3, #15
 	cmp	r2, r4
-	bgt	.L2024
+	bgt	.L2067
 	mla	r3, r6, r3, r4
 	movs	r2, #1
 	mov	r1, r2
@@ -14023,24 +14145,24 @@ FtlLoadFactoryBbt:
 	bl	FlashReadPages
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L2023
+	beq	.L2066
 	ldrh	r2, [r8]
 	movw	r3, #61664
 	cmp	r2, r3
-	bne	.L2023
+	bne	.L2066
 	strh	r4, [r7]	@ movhi
-.L2024:
+.L2067:
 	adds	r6, r6, #1
-	b	.L2021
-.L2023:
+	b	.L2064
+.L2066:
 	subs	r4, r4, #1
 	uxth	r4, r4
-	b	.L2022
-.L2031:
+	b	.L2065
+.L2074:
 	.align	2
-.L2030:
+.L2073:
 	.word	.LANCHOR183
-	.word	.LANCHOR202
+	.word	.LANCHOR203
 	.word	.LANCHOR74+10
 	.word	.LANCHOR188
 	.word	.LANCHOR45
@@ -14060,12 +14182,12 @@ FtlGetLastWrittenPage:
 	cmp	r1, #1
 	push	{r4, r5, r6, r7, r8, lr}
 	it	eq
-	ldreq	r3, .L2044
+	ldreq	r3, .L2087
 	sub	sp, sp, #104
 	lsl	r7, r0, #10
 	mov	r2, r1
 	it	ne
-	ldrne	r3, .L2044+4
+	ldrne	r3, .L2087+4
 	mov	r8, r1
 	movs	r6, #0
 	movs	r1, #1
@@ -14081,16 +14203,16 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	r3, [sp, #40]
 	adds	r3, r3, #1
-	bne	.L2035
-.L2036:
+	bne	.L2078
+.L2079:
 	cmp	r6, r5
-	ble	.L2039
-.L2035:
+	ble	.L2082
+.L2078:
 	mov	r0, r5
 	add	sp, sp, #104
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L2039:
+.L2082:
 	adds	r3, r6, r5
 	mov	r2, r8
 	add	r3, r3, r3, lsr #31
@@ -14103,23 +14225,23 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	r3, [sp, #40]
 	adds	r3, r3, #1
-	bne	.L2037
+	bne	.L2080
 	ldr	r3, [sp, #44]
 	adds	r3, r3, #1
-	bne	.L2037
+	bne	.L2080
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
-	beq	.L2037
+	beq	.L2080
 	subs	r4, r4, #1
 	sxth	r5, r4
-	b	.L2036
-.L2037:
+	b	.L2079
+.L2080:
 	adds	r4, r4, #1
 	sxth	r6, r4
-	b	.L2036
-.L2045:
+	b	.L2079
+.L2088:
 	.align	2
-.L2044:
+.L2087:
 	.word	.LANCHOR53
 	.word	.LANCHOR52
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
@@ -14135,24 +14257,24 @@ FtlLoadBbt:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	ldr	r8, .L2075+48
-	ldr	r4, .L2075
+	ldr	r8, .L2118+48
+	ldr	r4, .L2118
 	ldr	r3, [r8]
-	ldr	r7, .L2075+4
+	ldr	r7, .L2118+4
 	mov	r10, r4
 	str	r3, [r4, #8]
-	ldr	r3, .L2075+8
+	ldr	r3, .L2118+8
 	ldr	r6, [r3]
 	str	r6, [r4, #12]
 	bl	FtlBbtMemInit
 	ldrh	r5, [r7]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L2047:
+.L2090:
 	ldrh	r3, [r7]
 	subs	r3, r3, #47
 	cmp	r3, r5
-	bgt	.L2050
+	bgt	.L2093
 	lsls	r3, r5, #10
 	movs	r2, #1
 	mov	r1, r2
@@ -14161,7 +14283,7 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	bne	.L2048
+	bne	.L2091
 	ldr	r3, [r4, #4]
 	movs	r2, #1
 	mov	r1, r2
@@ -14169,104 +14291,104 @@ FtlLoadBbt:
 	adds	r3, r3, #1
 	str	r3, [r4, #4]
 	bl	FlashReadPages
-.L2048:
+.L2091:
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L2049
+	beq	.L2092
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L2049
-	ldr	r3, .L2075+12
+	bne	.L2092
+	ldr	r3, .L2118+12
 	ldr	r2, [r6, #4]
 	strh	r5, [r3]	@ movhi
 	str	r2, [r3, #8]
 	ldrh	r2, [r6, #8]
 	strh	r2, [r3, #4]	@ movhi
-.L2050:
-	ldr	r5, .L2075+12
+.L2093:
+	ldr	r5, .L2118+12
 	movw	r2, #65535
 	ldrh	r3, [r5]
 	cmp	r3, r2
-	beq	.L2064
+	beq	.L2107
 	ldrh	r3, [r5, #4]
 	cmp	r3, r2
-	beq	.L2054
+	beq	.L2097
 	lsls	r3, r3, #10
 	movs	r2, #1
 	mov	r1, r2
-	ldr	r0, .L2075
+	ldr	r0, .L2118
 	str	r3, [r4, #4]
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L2054
+	beq	.L2097
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L2054
+	bne	.L2097
 	ldr	r3, [r6, #4]
 	ldr	r2, [r5, #8]
 	cmp	r3, r2
-	bls	.L2054
+	bls	.L2097
 	ldrh	r2, [r5, #4]
 	str	r3, [r5, #8]
 	ldrh	r3, [r6, #8]
 	strh	r2, [r5]	@ movhi
 	strh	r3, [r5, #4]	@ movhi
-.L2054:
-	ldr	r10, .L2075
+.L2097:
+	ldr	r10, .L2118
 	movs	r1, #1
 	ldrh	r0, [r5]
 	bl	FtlGetLastWrittenPage
 	sxth	r7, r0
 	adds	r0, r0, #1
 	strh	r0, [r5, #2]	@ movhi
-.L2056:
+.L2099:
 	cmp	r7, #0
-	bge	.L2059
-	ldr	r1, .L2075+16
-	movw	r2, #335
-	ldr	r0, .L2075+20
+	bge	.L2102
+	ldr	r1, .L2118+16
+	mov	r2, #334
+	ldr	r0, .L2118+20
 	bl	printf
-	ldr	r1, .L2075+24
-	ldr	r0, .L2075+28
+	ldr	r1, .L2118+24
+	ldr	r0, .L2118+28
 	bl	printf
-.L2058:
+.L2101:
 	ldrh	r3, [r6, #10]
 	ldrh	r0, [r6, #12]
 	strh	r3, [r5, #6]	@ movhi
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L2061
-	ldr	r3, .L2075+32
+	beq	.L2104
+	ldr	r3, .L2118+32
 	ldr	r2, [r3]
 	cmp	r0, r2
-	beq	.L2061
-	ldr	r3, .L2075+36
+	beq	.L2104
+	ldr	r3, .L2118+36
 	ldrh	r3, [r3]
 	lsrs	r3, r3, #2
 	cmp	r2, r3
-	bcs	.L2061
+	bcs	.L2104
 	cmp	r0, r3
-	bcs	.L2061
+	bcs	.L2104
 	bl	FtlSysBlkNumInit
-.L2061:
-	ldr	r6, .L2075+40
+.L2104:
+	ldr	r6, .L2118+40
 	movs	r5, #0
-	ldr	r7, .L2075+44
-	ldr	r8, .L2075+52
-.L2062:
+	ldr	r7, .L2118+44
+	ldr	r8, .L2118+52
+.L2105:
 	ldrh	r3, [r7]
 	cmp	r5, r3
-	bcc	.L2063
+	bcc	.L2106
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L2049:
+.L2092:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L2047
-.L2059:
+	b	.L2090
+.L2102:
 	ldrh	r3, [r5]
 	movs	r2, #1
 	mov	r1, r2
@@ -14278,16 +14400,16 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L2057
+	beq	.L2100
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	beq	.L2058
-.L2057:
+	beq	.L2101
+.L2100:
 	subs	r7, r7, #1
 	sxth	r7, r7
-	b	.L2056
-.L2063:
+	b	.L2099
+.L2106:
 	ldrh	r2, [r8]
 	ldr	r1, [r4, #8]
 	ldr	r0, [r6, #4]!
@@ -14295,18 +14417,18 @@ FtlLoadBbt:
 	mla	r1, r5, r2, r1
 	adds	r5, r5, #1
 	bl	ftl_memcpy
-	b	.L2062
-.L2064:
+	b	.L2105
+.L2107:
 	mov	r0, #-1
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L2076:
+.L2119:
 	.align	2
-.L2075:
-	.word	.LANCHOR202
+.L2118:
+	.word	.LANCHOR203
 	.word	.LANCHOR51
 	.word	.LANCHOR188
 	.word	.LANCHOR74
-	.word	.LANCHOR211
+	.word	.LANCHOR212
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
@@ -14338,13 +14460,13 @@ ftl_map_blk_gc:
 	ldrh	r2, [r4, #8]
 	subs	r3, r3, #4
 	cmp	r2, r3
-	blt	.L2078
+	blt	.L2121
 	uxth	r0, r0
 	ldrh	r8, [r5, r0, lsl #1]
 	cmp	r8, #0
-	beq	.L2078
+	beq	.L2121
 	ldr	r3, [r4, #32]
-	cbnz	r3, .L2078
+	cbnz	r3, .L2121
 	movs	r2, #1
 	str	r2, [r4, #32]
 	strh	r3, [r5, r0, lsl #1]	@ movhi
@@ -14352,35 +14474,35 @@ ftl_map_blk_gc:
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	ldr	r3, .L2090
+	ldr	r3, .L2133
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L2079
+	bcc	.L2122
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L2079:
-	ldr	r5, .L2090+4
+.L2122:
+	ldr	r5, .L2133+4
 	movs	r6, #0
-.L2080:
+.L2123:
 	ldrh	r3, [r4, #6]
 	uxth	r10, r6
 	cmp	r3, r10
-	bhi	.L2086
+	bhi	.L2129
 	movs	r1, #1
 	mov	r0, r8
 	bl	FtlFreeSysBlkQueueIn
 	movs	r3, #0
 	str	r3, [r4, #32]
-.L2078:
-	ldr	r3, .L2090
+.L2121:
+	ldr	r3, .L2133
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L2084
+	bcc	.L2127
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-	b	.L2084
-.L2086:
+	b	.L2127
+.L2129:
 	ldr	r3, [sp]
 	uxth	fp, r6
 	add	r3, r3, fp, lsl #2
@@ -14388,70 +14510,70 @@ ftl_map_blk_gc:
 	ldr	r3, [sp]
 	ldr	r2, [r3, fp, lsl #2]
 	cmp	r8, r2, lsr #10
-	bne	.L2081
-	ldr	r3, .L2090+8
+	bne	.L2124
+	ldr	r3, .L2133+8
 	str	r2, [r5, #4]
 	movs	r2, #1
-	ldr	r0, .L2090+4
+	ldr	r0, .L2133+4
 	ldr	r1, [r3]
 	str	r1, [r5, #8]
-	ldr	r1, .L2090+12
+	ldr	r1, .L2133+12
 	ldr	r7, [r1]
 	mov	r1, r2
 	str	r7, [r5, #12]
 	bl	FlashReadPages
 	ldrh	r2, [r7, #8]
 	cmp	r2, r10
-	beq	.L2082
-	ldr	r1, .L2090+16
+	beq	.L2125
+	ldr	r1, .L2133+16
 	movw	r2, #661
-	ldr	r0, .L2090+20
+	ldr	r0, .L2133+20
 	bl	printf
-	ldr	r1, .L2090+24
-	ldr	r0, .L2090+28
+	ldr	r1, .L2133+24
+	ldr	r0, .L2133+28
 	bl	printf
-.L2082:
+.L2125:
 	ldr	r2, [r5]
 	adds	r2, r2, #1
 	ldrh	r2, [r7, #8]
-	bne	.L2083
-.L2085:
+	bne	.L2126
+.L2128:
 	ldr	r1, [sp, #4]
 	movs	r3, #0
-	ldr	r0, .L2090+32
+	ldr	r0, .L2133+32
 	str	r3, [r1]
 	ldr	r1, [r5, #4]
 	bl	printf
-	ldr	r3, .L2090+36
+	ldr	r3, .L2133+36
 	movs	r2, #1
 	str	r2, [r3]
-.L2084:
+.L2127:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2083:
+.L2126:
 	cmp	r2, r10
-	bne	.L2085
+	bne	.L2128
 	ldrh	r0, [r7]
 	ldrh	r1, [r4, #4]
 	cmp	r0, r1
-	bne	.L2085
+	bne	.L2128
 	ldr	r2, [r5, #8]
 	mov	r1, fp
 	mov	r0, r4
 	bl	FtlMapWritePage
-.L2081:
+.L2124:
 	adds	r6, r6, #1
-	b	.L2080
-.L2091:
+	b	.L2123
+.L2134:
 	.align	2
-.L2090:
+.L2133:
 	.word	.LANCHOR53
-	.word	.LANCHOR202
+	.word	.LANCHOR203
 	.word	.LANCHOR184
 	.word	.LANCHOR188
-	.word	.LANCHOR212
+	.word	.LANCHOR213
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
@@ -14469,26 +14591,26 @@ ftl_map_blk_gc:
 Ftl_write_map_blk_to_last_page:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2106
+	ldr	r3, .L2149
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	ldr	r5, [r3]
-	cbnz	r5, .L2093
+	cbnz	r5, .L2136
 	ldrh	r3, [r0]
 	movw	r2, #65535
 	ldr	r6, [r0, #12]
 	cmp	r3, r2
-	bne	.L2094
+	bne	.L2137
 	ldrh	r3, [r0, #8]
-	cbz	r3, .L2095
-	ldr	r1, .L2106+4
+	cbz	r3, .L2138
+	ldr	r1, .L2149+4
 	movw	r2, #697
-	ldr	r0, .L2106+8
+	ldr	r0, .L2149+8
 	bl	printf
-	ldr	r1, .L2106+12
-	ldr	r0, .L2106+16
+	ldr	r1, .L2149+12
+	ldr	r0, .L2149+16
 	bl	printf
-.L2095:
+.L2138:
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
@@ -14500,20 +14622,20 @@ Ftl_write_map_blk_to_last_page:
 	ldr	r3, [r4, #28]
 	adds	r3, r3, #1
 	str	r3, [r4, #28]
-.L2093:
+.L2136:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2094:
+.L2137:
 	ldrh	r8, [r6, r3, lsl #1]
 	movs	r1, #255
 	ldrh	r3, [r0, #2]
-	ldr	r7, .L2106+20
-	ldr	fp, .L2106+40
+	ldr	r7, .L2149+20
+	ldr	fp, .L2149+40
 	ldr	r10, [r0, #24]
 	orr	r3, r3, r8, lsl #10
 	ldr	r0, [fp]
 	str	r3, [r7, #4]
-	ldr	r3, .L2106+24
+	ldr	r3, .L2149+24
 	str	r0, [r7, #8]
 	ldr	r6, [r3]
 	ldr	r3, [r4, #28]
@@ -14524,7 +14646,7 @@ Ftl_write_map_blk_to_last_page:
 	ldrh	r3, [r4, #4]
 	strh	r8, [r6, #2]	@ movhi
 	strh	r3, [r6]	@ movhi
-	ldr	r3, .L2106+28
+	ldr	r3, .L2149+28
 	ldrh	r2, [r3]
 	lsls	r2, r2, #3
 	bl	ftl_memset
@@ -14532,55 +14654,55 @@ Ftl_write_map_blk_to_last_page:
 	mov	r3, r5
 	ldr	r1, [fp]
 	mov	r2, r5
-.L2096:
+.L2139:
 	uxth	r0, r3
 	cmp	ip, r0
-	bhi	.L2098
-	ldr	r3, .L2106+32
+	bhi	.L2141
+	ldr	r3, .L2149+32
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2099
-	ldr	r3, .L2106+36
+	cbz	r3, .L2142
+	ldr	r3, .L2149+36
 	ldr	r0, [r7, #8]
 	ldrh	r1, [r3]
 	bl	js_hash
 	str	r0, [r6, #12]
-.L2099:
+.L2142:
 	movs	r2, #1
 	movs	r3, #0
 	mov	r1, r2
-	ldr	r0, .L2106+20
+	ldr	r0, .L2149+20
 	bl	FlashProgPages
 	ldrh	r3, [r4, #2]
 	mov	r0, r4
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	bl	ftl_map_blk_gc
-	b	.L2093
-.L2098:
+	b	.L2136
+.L2141:
 	ldr	r0, [r10, r3, lsl #2]
 	cmp	r8, r0, lsr #10
-	bne	.L2097
+	bne	.L2140
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r3, [r1, r2, lsl #3]
 	add	r5, r1, r2, lsl #3
 	ldr	r0, [r10, r3, lsl #2]
 	str	r0, [r5, #4]
-.L2097:
+.L2140:
 	adds	r3, r3, #1
-	b	.L2096
-.L2107:
+	b	.L2139
+.L2150:
 	.align	2
-.L2106:
+.L2149:
 	.word	.LANCHOR76
-	.word	.LANCHOR213
+	.word	.LANCHOR214
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LANCHOR202
+	.word	.LANCHOR203
 	.word	.LANCHOR188
 	.word	.LANCHOR53
-	.word	.LANCHOR1
+	.word	.LANCHOR2
 	.word	.LANCHOR57
 	.word	.LANCHOR183
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
@@ -14597,12 +14719,12 @@ FtlMapWritePage:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-	ldr	r10, .L2134+44
+	ldr	r10, .L2177+44
 	mov	r8, r1
 	movs	r6, #0
 	str	r2, [sp, #4]
-.L2109:
-	ldr	r2, .L2134
+.L2152:
+	ldr	r2, .L2177
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
@@ -14610,48 +14732,48 @@ FtlMapWritePage:
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	bge	.L2110
+	bge	.L2153
 	ldrh	r2, [r4]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L2111
-.L2110:
+	bne	.L2154
+.L2153:
 	mov	r0, r4
 	bl	Ftl_write_map_blk_to_last_page
-.L2111:
-	ldr	r3, .L2134+4
+.L2154:
+	ldr	r3, .L2177+4
 	ldr	r2, [r3]
 	str	r3, [sp, #8]
 	cmp	r2, #0
-	bne	.L2129
+	bne	.L2172
 	ldrh	r2, [r4]
 	ldr	r3, [r4, #12]
 	ldrh	r3, [r3, r2, lsl #1]
-	cbnz	r3, .L2113
-	ldr	r1, .L2134+8
+	cbnz	r3, .L2156
+	ldr	r1, .L2177+8
 	movw	r2, #759
-	ldr	r0, .L2134+12
+	ldr	r0, .L2177+12
 	bl	printf
-	ldr	r1, .L2134+16
-	ldr	r0, .L2134+20
+	ldr	r1, .L2177+16
+	ldr	r0, .L2177+20
 	bl	printf
-.L2113:
+.L2156:
 	ldrh	r2, [r4]
 	ldrh	r3, [r4, #10]
 	cmp	r2, r3
-	bcc	.L2114
-	ldr	r1, .L2134+8
+	bcc	.L2157
+	ldr	r1, .L2177+8
 	mov	r2, #760
-	ldr	r0, .L2134+12
+	ldr	r0, .L2177+12
 	bl	printf
-	ldr	r1, .L2134+16
-	ldr	r0, .L2134+20
+	ldr	r1, .L2177+16
+	ldr	r0, .L2177+20
 	bl	printf
-.L2114:
+.L2157:
 	ldrh	r2, [r4]
 	movs	r1, #0
 	ldr	r3, [r4, #12]
-	ldr	r5, .L2134+24
+	ldr	r5, .L2177+24
 	ldrh	r7, [r3, r2, lsl #1]
 	movs	r2, #16
 	ldrh	r3, [r4, #2]
@@ -14660,7 +14782,7 @@ FtlMapWritePage:
 	str	r3, [r5, #4]
 	ldr	r3, [sp, #4]
 	str	r3, [r5, #8]
-	ldr	r3, .L2134+28
+	ldr	r3, .L2177+28
 	ldr	r0, [r3]
 	str	r0, [r5, #12]
 	bl	ftl_memset
@@ -14672,18 +14794,18 @@ FtlMapWritePage:
 	strh	r8, [r3, #8]	@ movhi
 	strh	r7, [r3, #2]	@ movhi
 	strh	r2, [r3]	@ movhi
-	ldr	r2, .L2134+32
+	ldr	r2, .L2177+32
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbz	r2, .L2115
-	ldr	r2, .L2134+36
+	cbz	r2, .L2158
+	ldr	r2, .L2177+36
 	ldr	r0, [r5, #8]
 	ldrh	r1, [r2]
 	bl	js_hash
 	ldr	r3, [sp, #12]
 	str	r0, [r3, #12]
-.L2115:
+.L2158:
 	movs	r3, #1
-	ldr	r0, .L2134+24
+	ldr	r0, .L2177+24
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
@@ -14693,68 +14815,68 @@ FtlMapWritePage:
 	uxth	r3, r3
 	adds	r1, r2, #1
 	strh	r3, [r4, #2]	@ movhi
-	bne	.L2116
+	bne	.L2159
 	ldr	r1, [r5, #4]
 	adds	r6, r6, #1
-	ldr	r0, .L2134+40
+	ldr	r0, .L2177+40
 	uxth	r6, r6
 	bl	printf
 	ldrh	r3, [r4, #2]
 	cmp	r3, #2
 	itttt	ls
-	ldrls	r3, .L2134+44
+	ldrls	r3, .L2177+44
 	ldrhls	r3, [r3]
 	addls	r3, r3, #-1
 	strhls	r3, [r4, #2]	@ movhi
 	cmp	r6, #3
-	bls	.L2109
+	bls	.L2152
 	mov	r2, r6
 	ldr	r1, [fp, #4]
-	ldr	r0, .L2134+48
+	ldr	r0, .L2177+48
 	bl	printf
 	ldr	r2, [sp, #8]
 	movs	r3, #1
 	str	r3, [r2]
-.L2129:
+.L2172:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2116:
-	cbz	r2, .L2119
+.L2159:
+	cbz	r2, .L2162
 	cmp	r3, #1
 	strh	r7, [r4, #40]	@ movhi
-	bne	.L2120
-.L2121:
+	bne	.L2163
+.L2164:
 	movs	r3, #0
 	str	r3, [r4, #36]
-	b	.L2109
-.L2120:
+	b	.L2152
+.L2163:
 	cmp	r2, #256
-.L2133:
-	beq	.L2121
+.L2176:
+	beq	.L2164
 	ldr	r3, [r4, #36]
 	cmp	r3, #0
-	bne	.L2121
+	bne	.L2164
 	ldr	r2, [fp, #4]
 	ldr	r3, [r4, #24]
 	str	r2, [r3, r8, lsl #2]
-	b	.L2129
-.L2119:
+	b	.L2172
+.L2162:
 	cmp	r3, #1
-	b	.L2133
-.L2135:
+	b	.L2176
+.L2178:
 	.align	2
-.L2134:
+.L2177:
 	.word	.LANCHOR165
 	.word	.LANCHOR76
-	.word	.LANCHOR214
+	.word	.LANCHOR215
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LANCHOR202
+	.word	.LANCHOR203
 	.word	.LANCHOR188
-	.word	.LANCHOR1
+	.word	.LANCHOR2
 	.word	.LANCHOR57
 	.word	.LC40
 	.word	.LANCHOR53
@@ -14773,9 +14895,9 @@ flush_l2p_region:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #12
-	ldr	r5, .L2137
+	ldr	r5, .L2180
 	muls	r4, r0, r4
-	ldr	r0, .L2137+4
+	ldr	r0, .L2180+4
 	ldr	r3, [r5]
 	adds	r2, r3, r4
 	ldrh	r1, [r3, r4]
@@ -14788,9 +14910,9 @@ flush_l2p_region:
 	bic	r3, r3, #-2147483648
 	str	r3, [r4, #4]
 	pop	{r3, r4, r5, pc}
-.L2138:
+.L2181:
 	.align	2
-.L2137:
+.L2180:
 	.word	.LANCHOR96
 	.word	.LANCHOR127
 	.size	flush_l2p_region, .-flush_l2p_region
@@ -14807,30 +14929,30 @@ l2p_flush:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
 	movs	r4, #0
-	ldr	r5, .L2143
-	ldr	r6, .L2143+4
-.L2140:
+	ldr	r5, .L2186
+	ldr	r6, .L2186+4
+.L2183:
 	ldrh	r3, [r5]
 	uxth	r0, r4
 	cmp	r3, r0
-	bhi	.L2142
+	bhi	.L2185
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L2142:
+.L2185:
 	ldr	r2, [r6]
 	uxth	r3, r4
 	movs	r1, #12
 	mla	r3, r1, r3, r2
 	ldr	r3, [r3, #4]
 	cmp	r3, #0
-	bge	.L2141
+	bge	.L2184
 	bl	flush_l2p_region
-.L2141:
+.L2184:
 	adds	r4, r4, #1
-	b	.L2140
-.L2144:
+	b	.L2183
+.L2187:
 	.align	2
-.L2143:
+.L2186:
 	.word	.LANCHOR67
 	.word	.LANCHOR96
 	.size	l2p_flush, .-l2p_flush
@@ -14845,7 +14967,7 @@ l2p_flush:
 FtlVendorPartWrite:
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2157
+	ldr	r3, .L2200
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #56
 	str	r2, [sp]
@@ -14854,26 +14976,26 @@ FtlVendorPartWrite:
 	mov	r5, r1
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L2153
-	ldr	r3, .L2157+4
+	bhi	.L2196
+	ldr	r3, .L2200+4
 	mov	r8, #0
 	ldrh	r6, [r3]
 	lsr	r6, r0, r6
 	lsl	fp, r6, #2
-.L2147:
-	cbnz	r5, .L2152
-.L2145:
+.L2190:
+	cbnz	r5, .L2195
+.L2188:
 	mov	r0, r8
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2152:
-	ldr	r3, .L2157+8
+.L2195:
+	ldr	r3, .L2200+8
 	mov	r0, r7
-	ldr	r10, .L2157+24
+	ldr	r10, .L2200+24
 	ldr	r3, [r3]
 	ldr	r2, [r3, fp]
-	ldr	r3, .L2157+12
+	ldr	r3, .L2200+12
 	str	r2, [sp, #12]
 	ldrh	r3, [r3]
 	mov	r1, r3
@@ -14887,9 +15009,9 @@ FtlVendorPartWrite:
 	cmp	r5, r4
 	it	cc
 	uxthcc	r4, r5
-	cbz	r2, .L2149
+	cbz	r2, .L2192
 	cmp	r4, r3
-	beq	.L2149
+	beq	.L2192
 	ldr	r3, [r10]
 	add	r0, sp, #20
 	str	r2, [sp, #24]
@@ -14899,7 +15021,7 @@ FtlVendorPartWrite:
 	movs	r3, #0
 	str	r3, [sp, #32]
 	bl	FlashReadPages
-.L2150:
+.L2193:
 	lsls	r3, r4, #9
 	ldr	r0, [r10]
 	subs	r5, r5, r4
@@ -14912,7 +15034,7 @@ FtlVendorPartWrite:
 	bl	ftl_memcpy
 	ldr	r2, [r10]
 	mov	r1, r6
-	ldr	r0, .L2157+16
+	ldr	r0, .L2200+16
 	adds	r6, r6, #1
 	bl	FtlMapWritePage
 	ldr	r3, [sp]
@@ -14923,25 +15045,25 @@ FtlVendorPartWrite:
 	ldr	r3, [sp, #8]
 	add	r2, r2, r3
 	str	r2, [sp]
-	b	.L2147
-.L2149:
-	ldr	r3, .L2157+20
+	b	.L2190
+.L2192:
+	ldr	r3, .L2200+20
 	movs	r1, #0
 	ldr	r0, [r10]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-	b	.L2150
-.L2153:
+	b	.L2193
+.L2196:
 	mov	r8, #-1
-	b	.L2145
-.L2158:
+	b	.L2188
+.L2201:
 	.align	2
-.L2157:
+.L2200:
 	.word	.LANCHOR50
 	.word	.LANCHOR56
 	.word	.LANCHOR194
 	.word	.LANCHOR55
-	.word	.LANCHOR215
+	.word	.LANCHOR216
 	.word	.LANCHOR57
 	.word	.LANCHOR185
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
@@ -14957,68 +15079,68 @@ Ftl_save_ext_data:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L2161
-	ldr	r3, .L2161+4
+	ldr	r2, .L2204
+	ldr	r3, .L2204+4
 	ldr	r1, [r2]
 	cmp	r1, r3
-	bne	.L2159
-	ldr	r3, .L2161+8
+	bne	.L2202
+	ldr	r3, .L2204+8
 	movs	r1, #1
 	movs	r0, #0
 	str	r3, [r2, #4]
-	ldr	r3, .L2161+12
+	ldr	r3, .L2204+12
 	ldr	r3, [r3]
 	str	r3, [r2, #88]
-	ldr	r3, .L2161+16
+	ldr	r3, .L2204+16
 	ldr	r3, [r3]
 	str	r3, [r2, #92]
-	ldr	r3, .L2161+20
+	ldr	r3, .L2204+20
 	ldr	r3, [r3]
 	str	r3, [r2, #8]
-	ldr	r3, .L2161+24
+	ldr	r3, .L2204+24
 	ldr	r3, [r3]
 	str	r3, [r2, #12]
-	ldr	r3, .L2161+28
+	ldr	r3, .L2204+28
 	ldr	r3, [r3]
 	str	r3, [r2, #16]
-	ldr	r3, .L2161+32
+	ldr	r3, .L2204+32
 	ldr	r3, [r3]
 	str	r3, [r2, #20]
-	ldr	r3, .L2161+36
+	ldr	r3, .L2204+36
 	ldr	r3, [r3]
 	str	r3, [r2, #28]
-	ldr	r3, .L2161+40
+	ldr	r3, .L2204+40
 	ldr	r3, [r3]
 	str	r3, [r2, #32]
-	ldr	r3, .L2161+44
+	ldr	r3, .L2204+44
 	ldr	r3, [r3]
 	str	r3, [r2, #36]
-	ldr	r3, .L2161+48
+	ldr	r3, .L2204+48
 	ldr	r3, [r3]
 	str	r3, [r2, #40]
-	ldr	r3, .L2161+52
+	ldr	r3, .L2204+52
 	ldr	r3, [r3]
 	str	r3, [r2, #44]
-	ldr	r3, .L2161+56
+	ldr	r3, .L2204+56
 	ldr	r3, [r3]
 	str	r3, [r2, #48]
-	ldr	r3, .L2161+60
+	ldr	r3, .L2204+60
 	ldr	r3, [r3]
 	str	r3, [r2, #60]
-	ldr	r3, .L2161+64
+	ldr	r3, .L2204+64
 	ldr	r3, [r3]
 	str	r3, [r2, #64]
 	b	FtlVendorPartWrite
-.L2159:
+.L2202:
 	bx	lr
-.L2162:
+.L2205:
 	.align	2
-.L2161:
+.L2204:
 	.word	.LANCHOR138
 	.word	1179929683
-	.word	1342177363
-	.word	.LANCHOR216
+	.word	1342177366
 	.word	.LANCHOR217
+	.word	.LANCHOR218
 	.word	.LANCHOR161
 	.word	.LANCHOR162
 	.word	.LANCHOR166
@@ -15044,40 +15166,40 @@ FtlEctTblFlush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L2170
+	ldr	r3, .L2213
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L2168
-	ldr	r3, .L2170+4
+	beq	.L2211
+	ldr	r3, .L2213+4
 	ldr	r3, [r3]
 	cmp	r3, #39
 	ite	hi
 	movhi	r3, #32
 	movls	r3, #4
-.L2164:
-	ldr	r1, .L2170+8
+.L2207:
+	ldr	r1, .L2213+8
 	ldrh	r2, [r1]
 	cmp	r2, #31
 	ittt	ls
 	addls	r2, r2, #1
 	movls	r3, #1
 	strhls	r2, [r1]	@ movhi
-	ldr	r2, .L2170+12
-	cbnz	r0, .L2166
+	ldr	r2, .L2213+12
+	cbnz	r0, .L2209
 	ldr	r1, [r2]
 	ldr	r0, [r1, #20]
 	ldr	r1, [r1, #16]
 	add	r3, r3, r0
 	cmp	r1, r3
-	bcc	.L2167
-.L2166:
+	bcc	.L2210
+.L2209:
 	ldr	r2, [r2]
 	movs	r0, #64
 	ldr	r3, [r2, #16]
 	str	r3, [r2, #20]
-	ldr	r3, .L2170+16
+	ldr	r3, .L2213+16
 	str	r3, [r2]
-	ldr	r3, .L2170+20
+	ldr	r3, .L2213+20
 	ldrh	r1, [r3]
 	lsls	r3, r1, #9
 	str	r3, [r2, #12]
@@ -15088,18 +15210,18 @@ FtlEctTblFlush:
 	str	r3, [r2, #4]
 	bl	FtlVendorPartWrite
 	bl	Ftl_save_ext_data
-.L2167:
+.L2210:
 	movs	r0, #0
 	pop	{r3, pc}
-.L2168:
+.L2211:
 	movs	r3, #32
-	b	.L2164
-.L2171:
+	b	.L2207
+.L2214:
 	.align	2
-.L2170:
+.L2213:
 	.word	.LANCHOR28
 	.word	.LANCHOR170
-	.word	.LANCHOR218
+	.word	.LANCHOR219
 	.word	.LANCHOR191
 	.word	1112818501
 	.word	.LANCHOR190
@@ -15115,110 +15237,110 @@ FtlEctTblFlush:
 allocate_new_data_superblock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2199
+	ldr	r3, .L2242
 	push	{r4, r5, r6, lr}
 	mov	r4, r0
 	ldrh	r5, [r0]
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	bcs	.L2173
-	ldr	r1, .L2199+4
-	mov	r2, #3264
-	ldr	r0, .L2199+8
+	bcs	.L2216
+	ldr	r1, .L2242+4
+	movw	r2, #3290
+	ldr	r0, .L2242+8
 	bl	printf
-	ldr	r1, .L2199+12
-	ldr	r0, .L2199+16
+	ldr	r1, .L2242+12
+	ldr	r0, .L2242+16
 	bl	printf
-.L2173:
-	ldr	r3, .L2199+20
+.L2216:
+	ldr	r3, .L2242+20
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L2174
+	bne	.L2217
 	movw	r3, #65535
 	cmp	r5, r3
-	beq	.L2175
-	ldr	r3, .L2199+24
+	beq	.L2218
+	ldr	r3, .L2242+24
 	mov	r0, r5
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r5, lsl #1]
-	cbz	r3, .L2176
+	cbz	r3, .L2219
 	bl	INSERT_DATA_LIST
-.L2175:
+.L2218:
 	movs	r3, #0
 	strb	r3, [r4, #8]
-	ldr	r3, .L2199+28
+	ldr	r3, .L2242+28
 	cmp	r4, r3
-	beq	.L2177
-	ldr	r3, .L2199+32
+	beq	.L2220
+	ldr	r3, .L2242+32
 	ldrh	r2, [r3]
 	cmp	r2, #1
-	beq	.L2177
-	ldr	r3, .L2199+36
+	beq	.L2220
+	ldr	r3, .L2242+36
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2178
-.L2177:
+	cbz	r3, .L2221
+.L2220:
 	movs	r3, #1
 	strb	r3, [r4, #8]
-.L2179:
-	ldr	r6, .L2199+40
+.L2222:
+	ldr	r6, .L2242+40
 	movw	r2, #65535
 	ldrh	r0, [r6]
 	cmp	r0, r2
-	beq	.L2184
+	beq	.L2227
 	cmp	r5, r0
-	bne	.L2185
-	ldr	r3, .L2199+24
+	bne	.L2228
+	ldr	r3, .L2242+24
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L2186
-.L2185:
+	cbz	r3, .L2229
+.L2228:
 	bl	update_vpc_list
-.L2186:
+.L2229:
 	movw	r3, #65535
 	strh	r3, [r6]	@ movhi
-.L2184:
+.L2227:
 	mov	r0, r4
 	bl	allocate_data_superblock
 	bl	l2p_flush
 	movs	r0, #0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L2174:
+.L2217:
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L2176:
+.L2219:
 	bl	INSERT_FREE_LIST
-	b	.L2175
-.L2178:
-	ldr	r3, .L2199+44
+	b	.L2218
+.L2221:
+	ldr	r3, .L2242+44
 	cmp	r4, r3
-	bne	.L2179
+	bne	.L2222
 	cmp	r2, #3
-	beq	.L2181
-	ldr	r2, .L2199+48
+	beq	.L2224
+	ldr	r2, .L2242+48
 	ldr	r2, [r2]
 	cmp	r2, #1
-	bne	.L2182
-.L2181:
+	bne	.L2225
+.L2224:
 	movs	r2, #1
 	strb	r2, [r3, #8]
-.L2182:
-	ldr	r2, .L2199+52
+.L2225:
+	ldr	r2, .L2242+52
 	ldr	r2, [r2]
 	cmp	r2, #0
-	beq	.L2179
-	ldr	r2, .L2199+56
+	beq	.L2222
+	ldr	r2, .L2242+56
 	ldr	r2, [r2]
 	cmp	r2, #39
 	itt	ls
 	movls	r2, #1
 	strbls	r2, [r3, #8]
-	b	.L2179
-.L2200:
+	b	.L2222
+.L2243:
 	.align	2
-.L2199:
+.L2242:
 	.word	.LANCHOR40
-	.word	.LANCHOR219
+	.word	.LANCHOR220
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
@@ -15244,7 +15366,7 @@ allocate_new_data_superblock:
 FtlVendorPartRead:
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2211
+	ldr	r3, .L2254
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, r2
 	adds	r2, r0, r1
@@ -15253,28 +15375,28 @@ FtlVendorPartRead:
 	mov	r6, r1
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L2210
-	ldr	r3, .L2211+4
+	bhi	.L2253
+	ldr	r3, .L2254+4
 	mov	r8, #0
-	ldr	fp, .L2211+28
+	ldr	fp, .L2254+28
 	ldrh	r5, [r3]
 	lsr	r5, r0, r5
 	lsls	r3, r5, #2
 	str	r3, [sp]
-.L2203:
-	cbnz	r6, .L2209
-.L2201:
+.L2246:
+	cbnz	r6, .L2252
+.L2244:
 	mov	r0, r8
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2209:
-	ldr	r3, .L2211+8
+.L2252:
+	ldr	r3, .L2254+8
 	mov	r0, r7
 	ldr	r2, [sp]
 	ldr	r3, [r3]
 	ldr	r3, [r3, r2]
-	ldr	r2, .L2211+12
+	ldr	r2, .L2254+12
 	str	r3, [sp, #8]
 	ldrh	r4, [r2]
 	mov	r1, r4
@@ -15289,7 +15411,7 @@ FtlVendorPartRead:
 	lsls	r2, r4, #9
 	str	r2, [sp, #8]
 	cmp	r3, #0
-	beq	.L2205
+	beq	.L2248
 	ldr	r2, [fp]
 	add	r0, sp, #20
 	str	r3, [sp, #24]
@@ -15303,28 +15425,28 @@ FtlVendorPartRead:
 	ldr	r2, [sp, #20]
 	ldr	r3, [sp, #12]
 	adds	r2, r2, #1
-	ldr	r2, .L2211+16
+	ldr	r2, .L2254+16
 	it	eq
 	moveq	r8, #-1
 	ldr	r2, [r2]
 	cmp	r2, #256
-	bne	.L2207
+	bne	.L2250
 	mov	r2, r3
 	mov	r1, r5
-	ldr	r0, .L2211+20
+	ldr	r0, .L2254+20
 	bl	printf
 	ldr	r2, [fp]
 	mov	r1, r5
-	ldr	r0, .L2211+24
+	ldr	r0, .L2254+24
 	bl	FtlMapWritePage
-.L2207:
+.L2250:
 	ldr	r1, [fp]
 	lsls	r2, r4, #9
 	ldr	r3, [sp, #4]
 	mov	r0, r10
 	add	r1, r1, r3, lsl #9
 	bl	ftl_memcpy
-.L2208:
+.L2251:
 	ldr	r3, [sp, #8]
 	adds	r5, r5, #1
 	subs	r6, r6, r4
@@ -15333,26 +15455,26 @@ FtlVendorPartRead:
 	ldr	r3, [sp]
 	adds	r3, r3, #4
 	str	r3, [sp]
-	b	.L2203
-.L2205:
+	b	.L2246
+.L2248:
 	lsls	r2, r4, #9
 	mov	r1, r3
 	mov	r0, r10
 	bl	ftl_memset
-	b	.L2208
-.L2210:
+	b	.L2251
+.L2253:
 	mov	r8, #-1
-	b	.L2201
-.L2212:
+	b	.L2244
+.L2255:
 	.align	2
-.L2211:
+.L2254:
 	.word	.LANCHOR50
 	.word	.LANCHOR56
 	.word	.LANCHOR194
 	.word	.LANCHOR55
-	.word	.LANCHOR202
+	.word	.LANCHOR203
 	.word	.LC42
-	.word	.LANCHOR215
+	.word	.LANCHOR216
 	.word	.LANCHOR185
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
 	.section	.text.FtlLoadEctTbl,"ax",%progbits
@@ -15368,30 +15490,30 @@ FtlLoadEctTbl:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r0, #64
-	ldr	r4, .L2215
-	ldr	r5, .L2215+4
+	ldr	r4, .L2258
+	ldr	r5, .L2258+4
 	ldr	r2, [r4]
 	ldrh	r1, [r5]
 	bl	FtlVendorPartRead
 	ldr	r3, [r4]
 	ldr	r2, [r3]
-	ldr	r3, .L2215+8
+	ldr	r3, .L2258+8
 	cmp	r2, r3
-	beq	.L2214
-	ldr	r1, .L2215+12
-	ldr	r0, .L2215+16
+	beq	.L2257
+	ldr	r1, .L2258+12
+	ldr	r0, .L2258+16
 	bl	printf
 	ldrh	r2, [r5]
 	movs	r1, #0
 	ldr	r0, [r4]
 	lsls	r2, r2, #9
 	bl	ftl_memset
-.L2214:
+.L2257:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L2216:
+.L2259:
 	.align	2
-.L2215:
+.L2258:
 	.word	.LANCHOR191
 	.word	.LANCHOR190
 	.word	1112818501
@@ -15411,97 +15533,97 @@ Ftl_load_ext_data:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r1, #1
-	ldr	r4, .L2221
+	ldr	r4, .L2264
 	movs	r0, #0
-	ldr	r5, .L2221+4
+	ldr	r5, .L2264+4
 	mov	r2, r4
 	bl	FtlVendorPartRead
 	ldr	r3, [r4]
 	cmp	r3, r5
-	beq	.L2218
+	beq	.L2261
 	mov	r2, #512
 	movs	r1, #0
 	mov	r0, r4
 	bl	ftl_memset
 	str	r5, [r4]
-.L2218:
+.L2261:
 	ldr	r3, [r4]
 	cmp	r3, r5
-	ldr	r5, .L2221+8
-	bne	.L2219
+	ldr	r5, .L2264+8
+	bne	.L2262
 	ldr	r2, [r4, #88]
-	ldr	r3, .L2221+12
+	ldr	r3, .L2264+12
 	str	r2, [r3]
 	ldr	r2, [r4, #92]
-	ldr	r3, .L2221+16
+	ldr	r3, .L2264+16
 	str	r2, [r3]
 	ldr	r2, [r4, #8]
-	ldr	r3, .L2221+20
+	ldr	r3, .L2264+20
 	str	r2, [r3]
 	ldr	r2, [r4, #12]
-	ldr	r3, .L2221+24
+	ldr	r3, .L2264+24
 	str	r2, [r3]
 	ldr	r2, [r4, #16]
-	ldr	r3, .L2221+28
+	ldr	r3, .L2264+28
 	str	r2, [r3]
 	ldr	r2, [r4, #20]
-	ldr	r3, .L2221+32
+	ldr	r3, .L2264+32
 	str	r2, [r3]
 	ldr	r3, [r4, #28]
 	ldr	r2, [r4, #32]
 	str	r3, [r5]
-	ldr	r3, .L2221+36
+	ldr	r3, .L2264+36
 	str	r2, [r3]
 	ldr	r2, [r4, #36]
-	ldr	r3, .L2221+40
+	ldr	r3, .L2264+40
 	str	r2, [r3]
 	ldr	r2, [r4, #40]
-	ldr	r3, .L2221+44
+	ldr	r3, .L2264+44
 	str	r2, [r3]
 	ldr	r2, [r4, #44]
-	ldr	r3, .L2221+48
+	ldr	r3, .L2264+48
 	str	r2, [r3]
 	ldr	r2, [r4, #48]
-	ldr	r3, .L2221+52
+	ldr	r3, .L2264+52
 	str	r2, [r3]
 	ldr	r2, [r4, #60]
-	ldr	r3, .L2221+56
+	ldr	r3, .L2264+56
 	str	r2, [r3]
-.L2219:
-	ldr	r3, .L2221+60
+.L2262:
+	ldr	r3, .L2264+60
 	movs	r2, #0
 	str	r2, [r3]
 	ldr	r2, [r4, #68]
-	ldr	r3, .L2221+64
+	ldr	r3, .L2264+64
 	cmp	r2, r3
-	bne	.L2220
-	ldr	r3, .L2221+68
+	bne	.L2263
+	ldr	r3, .L2264+68
 	movs	r2, #1
-	ldr	r1, .L2221+72
-	ldr	r0, .L2221+76
+	ldr	r1, .L2264+72
+	ldr	r0, .L2264+76
 	str	r2, [r3]
 	bl	printf
-.L2220:
-	ldr	r3, .L2221+80
-	ldr	r1, .L2221+84
+.L2263:
+	ldr	r3, .L2264+80
+	ldr	r1, .L2264+84
 	ldrh	r2, [r3]
-	ldr	r3, .L2221+88
+	ldr	r3, .L2264+88
 	ldrh	r1, [r1]
 	ldr	r0, [r3]
 	ldr	r3, [r5]
 	mla	r0, r0, r2, r3
 	bl	__aeabi_uidiv
-	ldr	r3, .L2221+92
+	ldr	r3, .L2264+92
 	str	r0, [r3]
 	pop	{r3, r4, r5, pc}
-.L2222:
+.L2265:
 	.align	2
-.L2221:
+.L2264:
 	.word	.LANCHOR138
 	.word	1179929683
 	.word	.LANCHOR168
-	.word	.LANCHOR216
 	.word	.LANCHOR217
+	.word	.LANCHOR218
 	.word	.LANCHOR161
 	.word	.LANCHOR162
 	.word	.LANCHOR166
@@ -15520,7 +15642,7 @@ Ftl_load_ext_data:
 	.word	.LANCHOR48
 	.word	.LANCHOR40
 	.word	.LANCHOR167
-	.word	.LANCHOR205
+	.word	.LANCHOR206
 	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
 	.section	.text.ftl_vendor_read,"ax",%progbits
 	.align	1
@@ -15567,34 +15689,34 @@ FtlMapBlkWriteDumpData:
 	mov	r4, r0
 	ldr	r3, [r0, #36]
 	cmp	r3, #0
-	beq	.L2225
+	beq	.L2268
 	movs	r3, #0
 	ldrh	r6, [r0, #6]
 	str	r3, [r0, #36]
-	ldr	r3, .L2239
+	ldr	r3, .L2282
 	ldr	r10, [r0, #24]
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L2225
-	ldr	r3, .L2239+4
-	ldr	r5, .L2239+8
+	bne	.L2268
+	ldr	r3, .L2282+4
+	ldr	r5, .L2282+8
 	ldr	r3, [r3]
 	mov	r7, r5
 	str	r3, [r5, #8]
-	ldr	r3, .L2239+12
+	ldr	r3, .L2282+12
 	ldr	r8, [r3]
 	ldrh	r3, [r0, #2]
 	str	r8, [r5, #12]
-	cbz	r3, .L2229
-	ldr	r2, .L2239+16
+	cbz	r3, .L2272
+	ldr	r2, .L2282+16
 	ldrh	r2, [r2]
 	subs	r2, r2, #1
 	cmp	r3, r2
-	bge	.L2229
+	bge	.L2272
 	ldrh	r2, [r0]
 	movw	r1, #65535
 	cmp	r2, r1
-	beq	.L2229
+	beq	.L2272
 	ldr	r1, [r0, #12]
 	subs	r3, r3, #1
 	mov	r0, r5
@@ -15606,47 +15728,47 @@ FtlMapBlkWriteDumpData:
 	bl	FlashReadPages
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L2229
+	beq	.L2272
 	ldr	r3, [r4, #24]
 	ldrh	r1, [r8, #8]
 	ldr	r2, [r3, r1, lsl #2]
 	ldr	r3, [r5, #4]
 	cmp	r2, r3
-	bne	.L2229
+	bne	.L2272
 	ldr	r2, [r5, #8]
-.L2238:
+.L2281:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
 	b	FtlMapWritePage
-.L2229:
+.L2272:
 	subs	r6, r6, #1
 	uxth	r6, r6
 	ldr	r3, [r10, r6, lsl #2]
 	str	r3, [r7, #4]
-	cbz	r3, .L2230
+	cbz	r3, .L2273
 	movs	r2, #1
-	ldr	r0, .L2239+8
+	ldr	r0, .L2282+8
 	mov	r1, r2
 	bl	FlashReadPages
-.L2231:
+.L2274:
 	ldr	r2, [r7, #8]
 	mov	r1, r6
-	b	.L2238
-.L2230:
-	ldr	r3, .L2239+20
+	b	.L2281
+.L2273:
+	ldr	r3, .L2282+20
 	movs	r1, #255
 	ldr	r0, [r7, #8]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-	b	.L2231
-.L2225:
+	b	.L2274
+.L2268:
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L2240:
+.L2283:
 	.align	2
-.L2239:
+.L2282:
 	.word	.LANCHOR76
 	.word	.LANCHOR184
-	.word	.LANCHOR202
+	.word	.LANCHOR203
 	.word	.LANCHOR188
 	.word	.LANCHOR53
 	.word	.LANCHOR57
@@ -15664,69 +15786,69 @@ FtlScanSysBlk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r5, .L2323
+	ldr	r5, .L2366
 	sub	sp, sp, #32
 	mov	r1, r4
-	ldr	r3, .L2323+4
+	ldr	r3, .L2366+4
 	ldr	r2, [r5]
-	ldr	r6, .L2323+8
+	ldr	r6, .L2366+8
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L2323+12
+	ldr	r3, .L2366+12
 	lsls	r2, r2, #2
 	strh	r4, [r6]	@ movhi
-	ldr	r7, .L2323+16
+	ldr	r7, .L2366+16
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldr	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L2323+20
+	ldr	r3, .L2366+20
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r7]
 	mov	r1, r4
-	ldr	r3, .L2323+24
+	ldr	r3, .L2366+24
 	lsls	r2, r2, #2
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r7]
 	mov	r1, r4
-	ldr	r3, .L2323+28
+	ldr	r3, .L2366+28
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	movs	r2, #16
 	movs	r1, #255
-	ldr	r0, .L2323+32
+	ldr	r0, .L2366+32
 	bl	ftl_memset
-	ldr	r3, .L2323+36
+	ldr	r3, .L2366+36
 	str	r6, [sp, #12]
 	str	r5, [sp, #16]
 	ldrh	r3, [r3]
 	str	r3, [sp, #4]
-.L2242:
-	ldr	r3, .L2323+40
+.L2285:
+	ldr	r3, .L2366+40
 	ldr	r2, [sp, #4]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bls	.L2284
-	ldr	r3, .L2323+44
+	bls	.L2327
+	ldr	r3, .L2366+44
 	movs	r5, #0
-	ldr	r1, .L2323+48
+	ldr	r1, .L2366+48
 	mov	fp, r5
 	movs	r7, #36
 	ldrh	r8, [r3]
-	ldr	r3, .L2323+52
+	ldr	r3, .L2366+52
 	ldr	r2, [r1]
-	ldr	r1, .L2323+56
+	ldr	r1, .L2366+56
 	ldr	r6, [r3]
-	ldr	r3, .L2323+60
+	ldr	r3, .L2366+60
 	str	r2, [sp, #8]
 	ldrh	r10, [r1]
 	ldr	r3, [r3]
-	ldr	r2, .L2323+64
-	b	.L2285
-.L2244:
+	ldr	r2, .L2366+64
+	b	.L2328
+.L2287:
 	ldrb	r0, [r2, r5]	@ zero_extendqisi2
 	ldr	r1, [sp, #4]
 	str	r3, [sp, #28]
@@ -15736,7 +15858,7 @@ FtlScanSysBlk:
 	bl	FtlBbmIsBadBlock
 	ldr	r2, [sp, #24]
 	ldr	r3, [sp, #28]
-	cbnz	r0, .L2243
+	cbnz	r0, .L2286
 	ldr	r1, [sp, #20]
 	mla	r0, r7, fp, r6
 	ldr	r4, [sp, #8]
@@ -15749,31 +15871,31 @@ FtlScanSysBlk:
 	str	r1, [r0, #12]
 	add	r1, fp, #1
 	uxth	fp, r1
-.L2243:
+.L2286:
 	adds	r5, r5, #1
-.L2285:
+.L2328:
 	uxth	r1, r5
 	cmp	r8, r1
-	bhi	.L2244
+	bhi	.L2287
 	cmp	fp, #0
-	bne	.L2245
-.L2283:
+	bne	.L2288
+.L2326:
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	str	r3, [sp, #4]
-	b	.L2242
-.L2245:
+	b	.L2285
+.L2288:
 	movs	r7, #0
 	movs	r2, #1
 	mov	r1, fp
 	mov	r0, r6
 	bl	FlashReadPages
-.L2246:
+.L2289:
 	uxth	r3, r7
 	cmp	fp, r3
-	bls	.L2283
-	ldr	r3, .L2323+52
+	bls	.L2326
+	ldr	r3, .L2366+52
 	mov	r8, #36
 	mul	r8, r8, r7
 	ldr	r3, [r3]
@@ -15783,10 +15905,10 @@ FtlScanSysBlk:
 	ldr	r6, [r2, #12]
 	adds	r3, r3, #1
 	ubfx	r5, r5, #10, #16
-	bne	.L2249
+	bne	.L2292
 	mov	r10, #16
-.L2251:
-	ldr	r3, .L2323+52
+.L2294:
+	ldr	r3, .L2366+52
 	movs	r2, #1
 	mov	r1, r2
 	ldr	r0, [r3]
@@ -15798,88 +15920,88 @@ FtlScanSysBlk:
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	ldr	r3, .L2323+52
+	ldr	r3, .L2366+52
 	ldr	r3, [r3]
-	bne	.L2248
+	bne	.L2291
 	mov	r2, #-1
 	str	r2, [r3, r8]
-	ldr	r3, .L2323+52
+	ldr	r3, .L2366+52
 	ldr	r3, [r3]
 	ldr	r3, [r3, r8]
 	cmp	r3, r2
-	beq	.L2250
-.L2249:
-	ldr	r3, .L2323+68
+	beq	.L2293
+.L2292:
+	ldr	r3, .L2366+68
 	ldr	r2, [r3]
 	ldr	r3, [r6, #4]
 	adds	r1, r2, #1
-	beq	.L2252
+	beq	.L2295
 	cmp	r2, r3
-	bhi	.L2253
-.L2252:
+	bhi	.L2296
+.L2295:
 	adds	r2, r3, #1
 	ittt	ne
-	ldrne	r1, .L2323+68
+	ldrne	r1, .L2366+68
 	addne	r2, r3, #1
 	strne	r2, [r1]
-.L2253:
+.L2296:
 	ldrh	r2, [r6]
 	movw	r1, #61604
 	cmp	r2, r1
-	beq	.L2255
-	bhi	.L2256
+	beq	.L2298
+	bhi	.L2299
 	movw	r3, #61574
 	cmp	r2, r3
-	beq	.L2257
-.L2254:
+	beq	.L2300
+.L2297:
 	adds	r7, r7, #1
-	b	.L2246
-.L2248:
+	b	.L2289
+.L2291:
 	ldr	r3, [r3, r8]
 	adds	r3, r3, #1
-	bne	.L2249
+	bne	.L2292
 	add	r10, r10, #-1
 	uxth	r10, r10
 	cmp	r10, #0
-	bne	.L2251
-.L2250:
-	ldr	r3, .L2323+72
+	bne	.L2294
+.L2293:
+	ldr	r3, .L2366+72
 	ldrb	r1, [r3]	@ zero_extendqisi2
-	cbnz	r1, .L2322
-.L2281:
+	cbnz	r1, .L2365
+.L2324:
 	mov	r0, r5
 	bl	FtlFreeSysBlkQueueIn
-	b	.L2254
-.L2256:
+	b	.L2297
+.L2299:
 	movw	r3, #61634
 	cmp	r2, r3
-	beq	.L2258
+	beq	.L2301
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L2254
-.L2322:
+	bne	.L2297
+.L2365:
 	movs	r1, #0
-	b	.L2281
-.L2258:
-	ldr	r3, .L2323+8
+	b	.L2324
+.L2301:
+	ldr	r3, .L2366+8
 	ldrh	r2, [r3]
-	ldr	r3, .L2323
+	ldr	r3, .L2366
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bls	.L2260
-	ldr	r1, .L2323+76
-	movw	r2, #1305
-	ldr	r0, .L2323+80
+	bls	.L2303
+	ldr	r1, .L2366+76
+	movw	r2, #1307
+	ldr	r0, .L2366+80
 	bl	printf
-	ldr	r1, .L2323+84
-	ldr	r0, .L2323+88
+	ldr	r1, .L2366+84
+	ldr	r0, .L2366+88
 	bl	printf
-.L2260:
+.L2303:
 	ldr	r3, [sp, #16]
 	ldr	r2, [sp, #12]
 	ldr	r1, [r3]
 	ldrh	r0, [r2]
-	ldr	r2, .L2323+12
+	ldr	r2, .L2366+12
 	uxth	r10, r1
 	ldr	ip, [r2]
 	add	r3, r10, #-1
@@ -15887,61 +16009,61 @@ FtlScanSysBlk:
 	add	r10, r10, #-1
 	sxth	r3, r3
 	sxth	r10, r10
-.L2261:
+.L2304:
 	cmp	r3, r10
-	bgt	.L2267
+	bgt	.L2310
 	cmp	r3, #0
-	bge	.L2300
-	b	.L2254
-.L2267:
+	bge	.L2343
+	b	.L2297
+.L2310:
 	ldr	r2, [ip, r3, lsl #2]
 	add	r8, ip, r3, lsl #2
 	ldr	r4, [r6, #4]
 	cmp	r4, r2
-	bls	.L2262
+	bls	.L2305
 	ldr	r2, [ip]
-	cbnz	r2, .L2263
+	cbnz	r2, .L2306
 	cmp	r1, r0
 	ittt	ne
-	ldrne	r2, .L2323+8
+	ldrne	r2, .L2366+8
 	addne	r0, r0, #1
 	strhne	r0, [r2]	@ movhi
-.L2263:
-	ldr	r2, .L2323+20
+.L2306:
+	ldr	r2, .L2366+20
 	uxth	r10, r3
 	ldr	r0, [r2]
 	movs	r2, #0
-.L2264:
+.L2307:
 	uxth	lr, r2
 	sxth	r1, r2
 	cmp	r10, lr
-	bhi	.L2265
+	bhi	.L2308
 	ldr	r2, [r6, #4]
 	cmp	r3, #0
 	str	r2, [r8]
 	strh	r5, [r0, r3, lsl #1]	@ movhi
-	blt	.L2254
-	ldr	r2, .L2323+8
+	blt	.L2297
+	ldr	r2, .L2366+8
 	ldrh	r0, [r2]
-	ldr	r2, .L2323
+	ldr	r2, .L2366
 	ldr	r2, [r2]
 	subs	r2, r2, r0
 	subs	r2, r2, #1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L2254
-.L2300:
-	ldr	r2, .L2323+8
+	bgt	.L2297
+.L2343:
+	ldr	r2, .L2366+8
 	adds	r0, r0, #1
 	strh	r0, [r2]	@ movhi
 	ldr	r2, [r6, #4]
 	str	r2, [ip, r3, lsl #2]
-	ldr	r2, .L2323+20
-.L2320:
+	ldr	r2, .L2366+20
+.L2363:
 	ldr	r2, [r2]
 	strh	r5, [r2, r3, lsl #1]	@ movhi
-	b	.L2254
-.L2265:
+	b	.L2297
+.L2308:
 	add	lr, ip, r1, lsl #2
 	adds	r2, r2, #1
 	ldr	r4, [lr, #4]
@@ -15949,14 +16071,14 @@ FtlScanSysBlk:
 	ldrh	lr, [lr, #2]
 	str	r4, [ip, r1, lsl #2]
 	strh	lr, [r0, r1, lsl #1]	@ movhi
-	b	.L2264
-.L2262:
+	b	.L2307
+.L2305:
 	subs	r3, r3, #1
 	sxth	r3, r3
-	b	.L2261
-.L2324:
+	b	.L2304
+.L2367:
 	.align	2
-.L2323:
+.L2366:
 	.word	.LANCHOR64
 	.word	.LANCHOR70
 	.word	.LANCHOR128
@@ -15965,7 +16087,7 @@ FtlScanSysBlk:
 	.word	.LANCHOR129
 	.word	.LANCHOR193
 	.word	.LANCHOR71
-	.word	.LANCHOR209
+	.word	.LANCHOR210
 	.word	.LANCHOR40
 	.word	.LANCHOR41
 	.word	.LANCHOR38
@@ -15976,79 +16098,79 @@ FtlScanSysBlk:
 	.word	.LANCHOR47
 	.word	.LANCHOR159
 	.word	.LANCHOR15
-	.word	.LANCHOR220
+	.word	.LANCHOR221
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-.L2257:
-	ldr	r8, .L2325+20
-	ldr	r10, .L2325+28
+.L2300:
+	ldr	r8, .L2368+20
+	ldr	r10, .L2368+28
 	ldrh	r2, [r8]
 	ldrh	r3, [r10]
 	cmp	r2, r3
-	bls	.L2270
-	ldr	r1, .L2325
-	mov	r2, #1352
-	ldr	r0, .L2325+4
+	bls	.L2313
+	ldr	r1, .L2368
+	movw	r2, #1354
+	ldr	r0, .L2368+4
 	bl	printf
-	ldr	r1, .L2325+8
-	ldr	r0, .L2325+12
+	ldr	r1, .L2368+8
+	ldr	r0, .L2368+12
 	bl	printf
-.L2270:
-	ldr	r2, .L2325+16
+.L2313:
+	ldr	r2, .L2368+16
 	ldrh	lr, [r10]
 	ldrh	ip, [r8]
 	ldr	r0, [r2]
 	add	r10, lr, #-1
 	sxth	r3, r10
 	sub	r10, r10, ip
-.L2271:
+.L2314:
 	cmp	r3, r10
-	ble	.L2276
+	ble	.L2319
 	ldr	r1, [r6, #4]
 	add	r8, r0, r3, lsl #2
 	ldr	r2, [r0, r3, lsl #2]
 	cmp	r1, r2
-	bls	.L2272
+	bls	.L2315
 	ldr	r2, [r0]
-	cbnz	r2, .L2273
+	cbnz	r2, .L2316
 	cmp	lr, ip
 	ittt	ne
-	ldrne	r2, .L2325+20
+	ldrne	r2, .L2368+20
 	addne	ip, ip, #1
 	strhne	ip, [r2]	@ movhi
-.L2273:
-	ldr	r2, .L2325+24
+.L2316:
+	ldr	r2, .L2368+24
 	uxth	r10, r3
 	ldr	ip, [r2]
 	movs	r2, #0
-.L2274:
+.L2317:
 	uxth	lr, r2
 	sxth	r1, r2
 	cmp	r10, lr
-	bhi	.L2275
+	bhi	.L2318
 	ldr	r2, [r6, #4]
 	str	r2, [r8]
 	strh	r5, [ip, r3, lsl #1]	@ movhi
-.L2276:
+.L2319:
 	cmp	r3, #0
-	blt	.L2254
-	ldr	r2, .L2325+28
-	ldr	ip, .L2325+20
+	blt	.L2297
+	ldr	r2, .L2368+28
+	ldr	ip, .L2368+20
 	ldrh	r2, [r2]
 	ldrh	r1, [ip]
 	subs	r2, r2, #1
 	subs	r2, r2, r1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L2254
+	bgt	.L2297
 	ldr	r2, [r6, #4]
 	adds	r1, r1, #1
 	strh	r1, [ip]	@ movhi
 	str	r2, [r0, r3, lsl #2]
-	ldr	r2, .L2325+24
-	b	.L2320
-.L2275:
+	ldr	r2, .L2368+24
+	b	.L2363
+.L2318:
 	add	lr, r0, r1, lsl #2
 	adds	r2, r2, #1
 	ldr	r4, [lr, #4]
@@ -16056,91 +16178,91 @@ FtlScanSysBlk:
 	ldrh	lr, [lr, #2]
 	str	r4, [r0, r1, lsl #2]
 	strh	lr, [ip, r1, lsl #1]	@ movhi
-	b	.L2274
-.L2272:
+	b	.L2317
+.L2315:
 	subs	r3, r3, #1
 	sxth	r3, r3
-	b	.L2271
-.L2255:
-	ldr	r8, .L2325+48
+	b	.L2314
+.L2298:
+	ldr	r8, .L2368+48
 	movw	r2, #65535
 	ldrh	r1, [r8]
 	cmp	r1, r2
-	bne	.L2278
-.L2321:
+	bne	.L2321
+.L2364:
 	strh	r5, [r8]	@ movhi
 	str	r3, [r8, #8]
-	b	.L2254
-.L2278:
+	b	.L2297
+.L2321:
 	ldrh	r0, [r8, #4]
 	cmp	r0, r2
-	beq	.L2279
+	beq	.L2322
 	movs	r1, #1
 	bl	FtlFreeSysBlkQueueIn
-.L2279:
+.L2322:
 	ldr	r3, [r6, #4]
 	ldr	r2, [r8, #8]
 	cmp	r2, r3
-	bcs	.L2280
+	bcs	.L2323
 	ldrh	r2, [r8]
 	strh	r2, [r8, #4]	@ movhi
-	b	.L2321
-.L2280:
+	b	.L2364
+.L2323:
 	strh	r5, [r8, #4]	@ movhi
-	b	.L2254
-.L2284:
-	ldr	r3, .L2325+32
+	b	.L2297
+.L2327:
+	ldr	r3, .L2368+32
 	ldr	r2, [r3]
 	ldrh	r3, [r2]
-	cbz	r3, .L2286
-.L2289:
-	ldr	r3, .L2325+24
+	cbz	r3, .L2329
+.L2332:
+	ldr	r3, .L2368+24
 	ldr	r4, [r3]
 	ldrh	r2, [r4]
 	cmp	r2, #0
-	beq	.L2287
-.L2288:
-	ldr	r3, .L2325+36
+	beq	.L2330
+.L2331:
+	ldr	r3, .L2368+36
 	ldrh	r2, [r3]
-	ldr	r3, .L2325+40
+	ldr	r3, .L2368+40
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bls	.L2319
-	ldr	r1, .L2325
-	movw	r2, #1486
-	ldr	r0, .L2325+4
+	bls	.L2362
+	ldr	r1, .L2368
+	mov	r2, #1488
+	ldr	r0, .L2368+4
 	bl	printf
-	ldr	r1, .L2325+8
-	ldr	r0, .L2325+12
+	ldr	r1, .L2368+8
+	ldr	r0, .L2368+12
 	bl	printf
-.L2319:
+.L2362:
 	movs	r0, #0
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2286:
-	ldr	r1, .L2325+36
+.L2329:
+	ldr	r1, .L2368+36
 	ldrh	r1, [r1]
 	cmp	r1, #0
-	beq	.L2289
-	ldr	r5, .L2325+40
+	beq	.L2332
+	ldr	r5, .L2368+40
 	ldr	r0, [r5]
-.L2290:
+.L2333:
 	sxth	r1, r3
 	cmp	r1, r0
-	bcs	.L2289
+	bcs	.L2332
 	ldrh	r4, [r2, r1, lsl #1]
 	adds	r3, r3, #1
 	cmp	r4, #0
-	beq	.L2290
-	ldr	r3, .L2325+44
+	beq	.L2333
+	ldr	r3, .L2368+44
 	movs	r6, #0
 	ldr	r0, [r3]
 	mov	r3, r1
-.L2291:
+.L2334:
 	ldr	r4, [r5]
 	cmp	r3, r4
-	bcs	.L2289
+	bcs	.L2332
 	ldrh	r7, [r2, r3, lsl #1]
 	subs	r4, r3, r1
 	strh	r7, [r2, r4, lsl #1]	@ movhi
@@ -16149,30 +16271,30 @@ FtlScanSysBlk:
 	strh	r6, [r2, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	sxth	r3, r3
-	b	.L2291
-.L2287:
-	ldr	r3, .L2325+20
+	b	.L2334
+.L2330:
+	ldr	r3, .L2368+20
 	ldrh	r3, [r3]
 	cmp	r3, #0
-	beq	.L2288
-	ldr	r5, .L2325+28
+	beq	.L2331
+	ldr	r5, .L2368+28
 	ldrh	r1, [r5]
-.L2296:
+.L2339:
 	sxth	r3, r2
 	cmp	r3, r1
 	mov	r6, r3
-	bge	.L2288
+	bge	.L2331
 	ldrh	r0, [r4, r3, lsl #1]
 	adds	r2, r2, #1
 	cmp	r0, #0
-	beq	.L2296
-	ldr	r2, .L2325+16
+	beq	.L2339
+	ldr	r2, .L2368+16
 	movs	r0, #0
 	ldr	r2, [r2]
-.L2297:
+.L2340:
 	ldrh	r1, [r5]
 	cmp	r3, r1
-	bge	.L2288
+	bge	.L2331
 	ldrh	r7, [r4, r3, lsl #1]
 	subs	r1, r3, r6
 	strh	r7, [r4, r1, lsl #1]	@ movhi
@@ -16181,11 +16303,11 @@ FtlScanSysBlk:
 	adds	r1, r3, #1
 	strh	r0, [r4, r3, lsl #1]	@ movhi
 	sxth	r3, r1
-	b	.L2297
-.L2326:
+	b	.L2340
+.L2369:
 	.align	2
-.L2325:
-	.word	.LANCHOR220
+.L2368:
+	.word	.LANCHOR221
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
@@ -16197,7 +16319,7 @@ FtlScanSysBlk:
 	.word	.LANCHOR128
 	.word	.LANCHOR64
 	.word	.LANCHOR130
-	.word	.LANCHOR209
+	.word	.LANCHOR210
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
 	.section	.text.FtlLoadSysInfo,"ax",%progbits
 	.align	1
@@ -16212,15 +16334,15 @@ FtlLoadSysInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r1, #0
-	ldr	r8, .L2361+164
-	ldr	r6, .L2361
+	ldr	r8, .L2404+164
+	ldr	r6, .L2404
 	ldr	r3, [r8]
-	ldr	r4, .L2361+4
-	ldr	r10, .L2361+168
+	ldr	r4, .L2404+4
+	ldr	r10, .L2404+168
 	ldrh	r2, [r6]
-	ldr	r5, .L2361+8
+	ldr	r5, .L2404+8
 	str	r3, [r4, #8]
-	ldr	r7, .L2361+12
+	ldr	r7, .L2404+12
 	ldr	r3, [r10]
 	lsls	r2, r2, #1
 	ldr	r0, [r5]
@@ -16230,100 +16352,100 @@ FtlLoadSysInfo:
 	movw	r3, #65535
 	str	r5, [sp]
 	cmp	r0, r3
-	bne	.L2328
-.L2340:
+	bne	.L2371
+.L2383:
 	mov	r0, #-1
-.L2327:
+.L2370:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2328:
+.L2371:
 	movs	r1, #1
 	bl	FtlGetLastWrittenPage
 	ldrsh	fp, [r7]
 	sxth	r5, r0
 	adds	r0, r0, #1
 	strh	r0, [r7, #2]	@ movhi
-.L2330:
+.L2373:
 	cmp	r5, #0
-	bge	.L2336
-	movw	r2, #1555
-	ldr	r1, .L2361+16
-	ldr	r0, .L2361+20
+	bge	.L2379
+	movw	r2, #1557
+	ldr	r1, .L2404+16
+	ldr	r0, .L2404+20
 	bl	printf
-	ldr	r1, .L2361+24
-	ldr	r0, .L2361+28
+	ldr	r1, .L2404+24
+	ldr	r0, .L2404+28
 	bl	printf
-	b	.L2335
-.L2336:
+	b	.L2378
+.L2379:
 	orr	r2, r5, fp, lsl #10
-	ldr	r0, .L2361+4
+	ldr	r0, .L2404+4
 	str	r2, [r4, #4]
 	ldr	r2, [r8]
 	str	r2, [r4, #8]
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-	ldr	r2, .L2361+32
+	ldr	r2, .L2404+32
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbz	r2, .L2331
+	cbz	r2, .L2374
 	ldr	r2, [r4, #12]
 	ldr	r2, [r2, #12]
 	str	r2, [sp, #4]
-	cbz	r2, .L2331
-	ldr	r1, .L2361+36
+	cbz	r2, .L2374
+	ldr	r1, .L2404+36
 	ldr	r0, [r4, #8]
 	ldrh	r1, [r1]
 	bl	js_hash
 	ldr	r2, [sp, #4]
 	cmp	r2, r0
-	beq	.L2331
-	cbnz	r5, .L2332
+	beq	.L2374
+	cbnz	r5, .L2375
 	ldrh	r2, [r7, #4]
 	cmp	fp, r2
-	beq	.L2332
+	beq	.L2375
 	sxth	fp, r2
-	ldr	r2, .L2361+40
+	ldr	r2, .L2404+40
 	ldrh	r5, [r2]
-.L2334:
+.L2377:
 	subs	r5, r5, #1
 	sxth	r5, r5
-	b	.L2330
-.L2332:
+	b	.L2373
+.L2375:
 	mov	r2, #-1
 	str	r2, [r4]
-.L2331:
+.L2374:
 	ldr	r2, [r4]
 	adds	r2, r2, #1
-	beq	.L2334
+	beq	.L2377
 	ldr	r2, [r8]
-	ldr	r3, .L2361+44
+	ldr	r3, .L2404+44
 	ldr	r2, [r2]
 	cmp	r2, r3
-	bne	.L2334
+	bne	.L2377
 	ldr	r2, [r10]
 	ldrh	r1, [r2]
 	movw	r2, #61604
 	cmp	r1, r2
-	bne	.L2334
-.L2335:
-	ldr	r2, .L2361+36
+	bne	.L2377
+.L2378:
+	ldr	r2, .L2404+36
 	ldrh	r3, [r6]
 	ldrh	r2, [r2]
 	adds	r3, r3, #24
 	cmp	r2, r3, lsl #1
-	bcs	.L2338
-	ldr	r1, .L2361+16
-	movw	r2, #1557
-	ldr	r0, .L2361+20
+	bcs	.L2381
+	ldr	r1, .L2404+16
+	movw	r2, #1559
+	ldr	r0, .L2404+20
 	bl	printf
-	ldr	r1, .L2361+24
-	ldr	r0, .L2361+28
+	ldr	r1, .L2404+24
+	ldr	r0, .L2404+28
 	bl	printf
-.L2338:
+.L2381:
 	movs	r2, #48
 	ldr	r1, [r4, #8]
-	ldr	r0, .L2361+48
+	ldr	r0, .L2404+48
 	bl	ftl_memcpy
 	ldrh	r2, [r6]
 	ldr	r3, [sp]
@@ -16340,14 +16462,14 @@ FtlLoadSysInfo:
 	adds	r2, r2, #4
 	bic	r1, r1, #3
 	add	r1, r1, r3
-	ldr	r3, .L2361+52
+	ldr	r3, .L2404+52
 	ldr	r0, [r3]
 	bl	ftl_memcpy
-	ldr	r3, .L2361+56
+	ldr	r3, .L2404+56
 	ldrh	r3, [r3]
-	cbz	r3, .L2339
+	cbz	r3, .L2382
 	ldrh	r1, [r6]
-	ldr	r3, .L2361+60
+	ldr	r3, .L2404+60
 	ldrh	r2, [r3]
 	lsrs	r3, r1, #3
 	add	r3, r3, r1, lsl #1
@@ -16356,65 +16478,65 @@ FtlLoadSysInfo:
 	lsls	r2, r2, #2
 	ubfx	r3, r3, #2, #14
 	add	r1, r1, r3, lsl #2
-	ldr	r3, .L2361+64
+	ldr	r3, .L2404+64
 	ldr	r0, [r3]
 	bl	ftl_memcpy
-.L2339:
-	ldr	r4, .L2361+48
-	ldr	r3, .L2361+44
+.L2382:
+	ldr	r4, .L2404+48
+	ldr	r3, .L2404+44
 	ldr	r2, [r4]
 	cmp	r2, r3
-	bne	.L2340
-	ldr	r3, .L2361+68
+	bne	.L2383
+	ldr	r3, .L2404+68
 	ldrb	r2, [r4, #10]	@ zero_extendqisi2
 	ldrh	r5, [r4, #8]
 	ldrh	r3, [r3]
 	strh	r5, [r7, #6]	@ movhi
 	cmp	r2, r3
-	bne	.L2340
-	ldr	r3, .L2361+72
-	ldr	r2, .L2361+76
+	bne	.L2383
+	ldr	r3, .L2404+72
+	ldr	r2, .L2404+76
 	str	r5, [r3]
-	ldr	r3, .L2361+80
+	ldr	r3, .L2404+80
 	ldrh	r3, [r3]
 	muls	r3, r5, r3
 	str	r3, [r2]
-	ldr	r2, .L2361+84
+	ldr	r2, .L2404+84
 	ldrh	r2, [r2]
 	muls	r3, r2, r3
-	ldr	r2, .L2361+88
+	ldr	r2, .L2404+88
 	str	r3, [r2]
-	ldr	r3, .L2361+92
+	ldr	r3, .L2404+92
 	ldr	r6, [r3]
-	ldr	r3, .L2361+96
+	ldr	r3, .L2404+96
 	ldrh	r0, [r3, #6]
-	ldr	r3, .L2361+100
+	ldr	r3, .L2404+100
 	subs	r0, r6, r0
 	ldrh	r1, [r3]
 	subs	r0, r0, r5
 	bl	__aeabi_uidiv
-	ldr	r3, .L2361+104
+	ldr	r3, .L2404+104
 	cmp	r5, r6
 	strh	r0, [r3]	@ movhi
-	bls	.L2341
-	ldr	r1, .L2361+16
-	mov	r2, #1584
-	ldr	r0, .L2361+20
+	bls	.L2384
+	ldr	r1, .L2404+16
+	movw	r2, #1586
+	ldr	r0, .L2404+20
 	bl	printf
-	ldr	r1, .L2361+24
-	ldr	r0, .L2361+28
+	ldr	r1, .L2404+24
+	ldr	r0, .L2404+28
 	bl	printf
-.L2341:
+.L2384:
 	ldrh	r2, [r4, #16]
-	ldr	r3, .L2361+108
+	ldr	r3, .L2404+108
 	ldrh	ip, [r4, #14]
-	ldr	r7, .L2361+112
+	ldr	r7, .L2404+112
 	lsrs	r1, r2, #6
 	and	r2, r2, #63
 	strb	r2, [r3, #6]
 	ldrb	r2, [r4, #11]	@ zero_extendqisi2
 	strh	r1, [r3, #2]	@ movhi
-	ldr	r1, .L2361+116
+	ldr	r1, .L2404+116
 	strb	r2, [r3, #8]
 	ldrh	r2, [r4, #18]
 	strh	ip, [r3]	@ movhi
@@ -16433,7 +16555,7 @@ FtlLoadSysInfo:
 	strh	r5, [r1, #2]	@ movhi
 	ldrh	r5, [r4, #22]
 	strb	r2, [r1, #8]
-	ldr	r2, .L2361+120
+	ldr	r2, .L2404+120
 	strh	r5, [r2]	@ movhi
 	ldrh	r5, [r4, #24]
 	lsrs	r6, r5, #6
@@ -16443,31 +16565,31 @@ FtlLoadSysInfo:
 	strh	r6, [r2, #2]	@ movhi
 	ldr	r6, [r4, #32]
 	strb	r5, [r2, #8]
-	ldr	r5, .L2361+124
+	ldr	r5, .L2404+124
 	str	r3, [r5]
-	ldr	r5, .L2361+128
+	ldr	r5, .L2404+128
 	str	r3, [r5]
-	ldr	r5, .L2361+132
+	ldr	r5, .L2404+132
 	str	r3, [r5]
-	ldr	r5, .L2361+136
+	ldr	r5, .L2404+136
 	str	r3, [r5]
-	ldr	r5, .L2361+140
+	ldr	r5, .L2404+140
 	str	r6, [r5]
 	mov	r6, r1
-	ldr	r5, .L2361+144
+	ldr	r5, .L2404+144
 	str	r3, [r5]
-	ldr	r5, .L2361+148
+	ldr	r5, .L2404+148
 	str	r3, [r5]
-	ldr	r5, .L2361+152
+	ldr	r5, .L2404+152
 	ldr	lr, [r4, #40]
 	str	r3, [r5]
-	ldr	r3, .L2361+156
+	ldr	r3, .L2404+156
 	ldr	r5, [r3]
 	cmp	lr, r5
 	mov	r5, r2
 	it	hi
 	strhi	lr, [r3]
-	ldr	r3, .L2361+160
+	ldr	r3, .L2404+160
 	ldr	r2, [r4, #36]
 	ldr	r1, [r3]
 	cmp	r2, r1
@@ -16475,55 +16597,55 @@ FtlLoadSysInfo:
 	strhi	r2, [r3]
 	movw	r3, #65535
 	cmp	ip, r3
-	beq	.L2344
-	ldr	r0, .L2361+108
+	beq	.L2387
+	ldr	r0, .L2404+108
 	bl	make_superblock
-.L2344:
+.L2387:
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2345
-	ldr	r0, .L2361+116
+	beq	.L2388
+	ldr	r0, .L2404+116
 	bl	make_superblock
-.L2345:
+.L2388:
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2346
-	ldr	r0, .L2361+120
+	beq	.L2389
+	ldr	r0, .L2404+120
 	bl	make_superblock
-.L2346:
+.L2389:
 	ldrh	r2, [r7]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2347
-	ldr	r0, .L2361+112
+	beq	.L2390
+	ldr	r0, .L2404+112
 	bl	make_superblock
-.L2347:
+.L2390:
 	movs	r0, #0
-	b	.L2327
-.L2362:
+	b	.L2370
+.L2405:
 	.align	2
-.L2361:
+.L2404:
 	.word	.LANCHOR40
-	.word	.LANCHOR202
+	.word	.LANCHOR203
 	.word	.LANCHOR83
-	.word	.LANCHOR209
-	.word	.LANCHOR221
+	.word	.LANCHOR210
+	.word	.LANCHOR222
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LANCHOR1
+	.word	.LANCHOR2
 	.word	.LANCHOR57
 	.word	.LANCHOR53
 	.word	1179929683
 	.word	.LANCHOR80
-	.word	.LANCHOR0
+	.word	.LANCHOR1
 	.word	.LANCHOR69
 	.word	.LANCHOR66
 	.word	.LANCHOR195
 	.word	.LANCHOR45
-	.word	.LANCHOR222
+	.word	.LANCHOR223
 	.word	.LANCHOR72
 	.word	.LANCHOR52
 	.word	.LANCHOR55
@@ -16531,9 +16653,9 @@ FtlLoadSysInfo:
 	.word	.LANCHOR42
 	.word	.LANCHOR74
 	.word	.LANCHOR38
-	.word	.LANCHOR223
+	.word	.LANCHOR224
 	.word	.LANCHOR91
-	.word	.LANCHOR204
+	.word	.LANCHOR205
 	.word	.LANCHOR92
 	.word	.LANCHOR93
 	.word	.LANCHOR161
@@ -16562,97 +16684,97 @@ FtlDumpBlockInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	ubfx	r0, r0, #10, #16
-	ldr	r4, .L2375
+	ldr	r4, .L2418
 	sub	sp, sp, #88
 	mov	r8, r1
 	ldrh	r3, [r4]
 	str	r3, [sp, #24]
 	bl	P2V_block_in_plane
-	ldr	r1, .L2375+4
+	ldr	r1, .L2418+4
 	mov	r6, r0
-	ldr	r0, .L2375+8
+	ldr	r0, .L2418+8
 	bl	printf
-	ldr	r3, .L2375+12
+	ldr	r3, .L2418+12
 	mov	r1, r6
-	ldr	r0, .L2375+16
+	ldr	r0, .L2418+16
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r6, lsl #1]
 	bl	printf
 	add	r0, sp, #88
 	strh	r6, [r0, #-48]!	@ movhi
 	bl	make_superblock
-	ldr	r3, .L2375+20
+	ldr	r3, .L2418+20
 	ldrb	r5, [r3]	@ zero_extendqisi2
-	cbz	r5, .L2364
+	cbz	r5, .L2407
 	cmp	r8, #0
-	bne	.L2373
+	bne	.L2416
 	mov	r0, r6
 	bl	ftl_get_blk_mode
 	cmp	r0, #1
 	mov	r5, r0
-	bne	.L2364
-	ldr	r3, .L2375+24
+	bne	.L2407
+	ldr	r3, .L2418+24
 	ldrh	r3, [r3]
 	str	r3, [sp, #24]
-.L2364:
+.L2407:
 	movs	r6, #0
 	ldrh	r3, [r4]
 	ldr	r2, [sp, #24]
 	mov	r1, r5
-	ldr	r0, .L2375+28
+	ldr	r0, .L2418+28
 	bl	printf
-.L2365:
-	ldr	r3, .L2375+32
+.L2408:
+	ldr	r3, .L2418+32
 	movs	r2, #0
 	add	ip, sp, #54
 	mov	r4, r2
 	movw	r10, #65535
 	mov	fp, #36
 	ldrh	lr, [r3]
-	ldr	r3, .L2375+36
+	ldr	r3, .L2418+36
 	ldr	r0, [r3]
-	ldr	r3, .L2375+40
+	ldr	r3, .L2418+40
 	ldr	r3, [r3]
 	str	r3, [sp, #28]
-	ldr	r3, .L2375+44
+	ldr	r3, .L2418+44
 	ldrh	r3, [r3]
 	str	r3, [sp, #32]
-	ldr	r3, .L2375+48
+	ldr	r3, .L2418+48
 	ldr	r3, [r3]
 	str	r3, [sp, #36]
-	ldr	r3, .L2375+52
+	ldr	r3, .L2418+52
 	ldrh	r8, [r3]
-.L2366:
+.L2409:
 	uxth	r3, r2
 	cmp	lr, r3
-	bhi	.L2368
-	ldr	fp, .L2375+56
+	bhi	.L2411
+	ldr	fp, .L2418+56
 	mov	r8, #0
 	mov	r10, #36
 	mov	r2, r5
 	mov	r1, r4
 	bl	FlashReadPages
-.L2369:
+.L2412:
 	uxth	r3, r8
 	cmp	r4, r3
-	bhi	.L2370
+	bhi	.L2413
 	adds	r6, r6, #1
 	ldr	r3, [sp, #24]
 	uxth	r6, r6
 	cmp	r3, r6
-	bne	.L2365
-.L2371:
+	bne	.L2408
+.L2414:
 	movs	r0, #0
 	add	sp, sp, #88
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2373:
+.L2416:
 	movs	r5, #0
-	b	.L2364
-.L2368:
+	b	.L2407
+.L2411:
 	ldrh	r3, [ip, #2]!
 	cmp	r3, r10
-	beq	.L2367
+	beq	.L2410
 	mla	r1, fp, r4, r0
 	ldr	r7, [sp, #28]
 	orr	r3, r6, r3, lsl #10
@@ -16669,11 +16791,11 @@ FtlDumpBlockInfo:
 	bic	r3, r3, #3
 	add	r3, r3, r7
 	str	r3, [r1, #12]
-.L2367:
+.L2410:
 	adds	r2, r2, #1
-	b	.L2366
-.L2370:
-	ldr	r3, .L2375+36
+	b	.L2409
+.L2413:
+	ldr	r3, .L2418+36
 	mul	r0, r10, r8
 	ldrh	r1, [sp, #40]
 	add	r8, r8, #1
@@ -16697,12 +16819,12 @@ FtlDumpBlockInfo:
 	ldr	r2, [ip, r0]
 	mov	r0, fp
 	bl	printf
-	b	.L2369
-.L2376:
+	b	.L2412
+.L2419:
 	.align	2
-.L2375:
+.L2418:
 	.word	.LANCHOR52
-	.word	.LANCHOR224
+	.word	.LANCHOR225
 	.word	.LC45
 	.word	.LANCHOR83
 	.word	.LC46
@@ -16730,86 +16852,86 @@ FtlScanAllBlock:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #88
-	ldr	r6, .L2387
-	ldr	r1, .L2387+4
-	ldr	r0, .L2387+8
+	ldr	r6, .L2430
+	ldr	r1, .L2430+4
+	ldr	r0, .L2430+8
 	bl	printf
 	movs	r3, #0
 	str	r3, [sp, #28]
-.L2378:
-	ldr	r3, .L2387+12
+.L2421:
+	ldr	r3, .L2430+12
 	ldrh	r0, [sp, #28]
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bhi	.L2386
+	bhi	.L2429
 	movs	r0, #0
 	add	sp, sp, #88
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2386:
+.L2429:
 	add	r4, sp, #88
 	add	r7, sp, #54
 	strh	r0, [r4, #-48]!	@ movhi
 	movw	r10, #65535
 	bl	ftl_get_blk_mode
-	ldr	r3, .L2387+16
+	ldr	r3, .L2430+16
 	mov	fp, #36
 	ldrh	r1, [sp, #28]
 	ldr	r2, [r3]
 	mov	r3, r0
-	ldr	r0, .L2387+20
+	ldr	r0, .L2430+20
 	ldrh	r2, [r2, r1, lsl #1]
 	bl	printf
 	mov	r0, r4
 	bl	make_superblock
-	ldr	r3, .L2387+24
+	ldr	r3, .L2430+24
 	movs	r2, #0
 	ldr	r0, [r6]
 	mov	r4, r2
 	ldrh	lr, [r3]
-	ldr	r3, .L2387+28
+	ldr	r3, .L2430+28
 	ldr	r3, [r3]
 	str	r3, [sp, #32]
-	ldr	r3, .L2387+32
+	ldr	r3, .L2430+32
 	ldrh	ip, [r3]
-	ldr	r3, .L2387+36
+	ldr	r3, .L2430+36
 	ldr	r3, [r3]
 	str	r3, [sp, #36]
-	ldr	r3, .L2387+40
+	ldr	r3, .L2430+40
 	ldrh	r8, [r3]
-.L2379:
+.L2422:
 	uxth	r3, r2
 	cmp	lr, r3
-	bhi	.L2381
-	ldr	r10, .L2387+44
+	bhi	.L2424
+	ldr	r10, .L2430+44
 	movs	r7, #0
 	mov	r8, #36
 	movs	r2, #0
 	mov	r1, r4
 	bl	FlashReadPages
-.L2382:
+.L2425:
 	uxth	r3, r7
 	cmp	r4, r3
-	bhi	.L2383
-	ldr	r10, .L2387+48
+	bhi	.L2426
+	ldr	r10, .L2430+48
 	movs	r7, #0
 	mov	r8, #36
 	movs	r2, #1
 	mov	r1, r4
 	ldr	r0, [r6]
 	bl	FlashReadPages
-.L2384:
+.L2427:
 	uxth	r3, r7
 	cmp	r4, r3
-	bhi	.L2385
+	bhi	.L2428
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
 	str	r3, [sp, #28]
-	b	.L2378
-.L2381:
+	b	.L2421
+.L2424:
 	ldrh	r3, [r7, #2]!
 	cmp	r3, r10
-	beq	.L2380
+	beq	.L2423
 	mla	r1, fp, r4, r0
 	ldr	r5, [sp, #32]
 	lsls	r3, r3, #10
@@ -16825,10 +16947,10 @@ FtlScanAllBlock:
 	bic	r3, r3, #3
 	add	r3, r3, r5
 	str	r3, [r1, #12]
-.L2380:
+.L2423:
 	adds	r2, r2, #1
-	b	.L2379
-.L2383:
+	b	.L2422
+.L2426:
 	mul	r2, r8, r7
 	ldr	r0, [r6]
 	ldrh	r1, [sp, #40]
@@ -16852,8 +16974,8 @@ FtlScanAllBlock:
 	mov	r0, r10
 	ldr	r3, [lr, #4]
 	bl	printf
-	b	.L2382
-.L2385:
+	b	.L2425
+.L2428:
 	mul	r2, r8, r7
 	ldr	r0, [r6]
 	ldrh	r1, [sp, #40]
@@ -16877,12 +16999,12 @@ FtlScanAllBlock:
 	mov	r0, r10
 	ldr	r3, [lr, #4]
 	bl	printf
-	b	.L2384
-.L2388:
+	b	.L2427
+.L2431:
 	.align	2
-.L2387:
+.L2430:
 	.word	.LANCHOR180
-	.word	.LANCHOR225
+	.word	.LANCHOR226
 	.word	.LC45
 	.word	.LANCHOR41
 	.word	.LANCHOR83
@@ -16922,15 +17044,15 @@ FtlMapTblRecovery:
 	ldr	r0, [sp]
 	str	r3, [sp, #4]
 	bl	ftl_memset
-	ldr	r2, .L2430
-	ldr	r3, .L2430+4
+	ldr	r2, .L2473
+	ldr	r3, .L2473+4
 	str	r6, [r4, #32]
 	ldr	r1, [r2]
 	mov	fp, r3
 	str	r6, [r4, #28]
 	str	r2, [sp, #8]
 	str	r1, [r3, #8]
-	ldr	r1, .L2430+8
+	ldr	r1, .L2473+8
 	ldr	r5, [r1]
 	movw	r1, #65535
 	str	r5, [r3, #12]
@@ -16938,16 +17060,16 @@ FtlMapTblRecovery:
 	strh	r1, [r4, #2]	@ movhi
 	movs	r1, #1
 	str	r1, [r4, #36]
-.L2390:
+.L2433:
 	ldr	r2, [sp, #4]
 	sxth	r3, r6
 	cmp	r3, r2
-	bge	.L2409
+	bge	.L2452
 	ldr	r2, [sp, #4]
 	lsl	r8, r3, #1
 	subs	r2, r2, #1
 	cmp	r3, r2
-	bne	.L2391
+	bne	.L2434
 	ldrh	r0, [r10, r3, lsl #1]
 	movs	r1, #1
 	str	r3, [sp, #4]
@@ -16957,28 +17079,28 @@ FtlMapTblRecovery:
 	add	r8, r8, r10
 	strh	r6, [r4]	@ movhi
 	sxth	r10, r0
-	ldr	r6, .L2430+4
+	ldr	r6, .L2473+4
 	adds	r0, r0, #1
 	mov	r2, r3
 	ldr	r3, [sp, #4]
 	strh	r0, [r4, #2]	@ movhi
 	ldr	r3, [r2, r3, lsl #2]
 	str	r3, [r4, #28]
-.L2392:
+.L2435:
 	sxth	r2, fp
 	cmp	r2, r10
-	ble	.L2395
-.L2409:
+	ble	.L2438
+.L2452:
 	mov	r0, r4
 	bl	ftl_free_no_use_map_blk
-	ldr	r3, .L2430+12
+	ldr	r3, .L2473+12
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L2397
+	bne	.L2440
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L2397:
+.L2440:
 	mov	r0, r4
 	bl	ftl_map_blk_gc
 	mov	r0, r4
@@ -16987,22 +17109,22 @@ FtlMapTblRecovery:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2395:
+.L2438:
 	ldrh	r1, [r8]
-	ldr	r0, .L2430+4
+	ldr	r0, .L2473+4
 	orr	r2, r2, r1, lsl #10
 	str	r2, [r6, #4]
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-	ldr	r3, .L2430+16
+	ldr	r3, .L2473+16
 	ldrb	r2, [r3]	@ zero_extendqisi2
-	cbz	r2, .L2393
+	cbz	r2, .L2436
 	ldr	r2, [r6, #12]
 	ldr	r2, [r2, #12]
 	str	r2, [sp, #4]
-	cbz	r2, .L2393
-	ldr	r1, .L2430+20
+	cbz	r2, .L2436
+	ldr	r1, .L2473+20
 	ldr	r0, [r6, #8]
 	ldrh	r1, [r1]
 	bl	js_hash
@@ -17011,13 +17133,13 @@ FtlMapTblRecovery:
 	itt	ne
 	movne	r2, #-1
 	strne	r2, [r6]
-.L2393:
+.L2436:
 	ldr	r2, [r6]
 	adds	r2, r2, #1
-	beq	.L2394
+	beq	.L2437
 	ldrh	r2, [r5, #8]
 	cmp	r7, r2
-	bls	.L2394
+	bls	.L2437
 	ldrh	r1, [r4, #4]
 	ldrh	r0, [r5]
 	cmp	r0, r1
@@ -17025,16 +17147,16 @@ FtlMapTblRecovery:
 	ldreq	r1, [r6, #4]
 	ldreq	r3, [sp]
 	streq	r1, [r3, r2, lsl #2]
-.L2394:
+.L2437:
 	add	fp, fp, #1
-	b	.L2392
-.L2391:
+	b	.L2435
+.L2434:
 	ldr	r2, [sp, #8]
-	ldr	r0, .L2430+4
+	ldr	r0, .L2473+4
 	ldr	r2, [r2]
 	str	r2, [fp, #8]
 	add	r2, r10, r8
-	ldr	r8, .L2430+12
+	ldr	r8, .L2473+12
 	str	r2, [sp, #16]
 	ldrh	r2, [r10, r3, lsl #1]
 	ldrh	r3, [r8]
@@ -17046,39 +17168,39 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	r3, [fp]
 	adds	r3, r3, #1
-	beq	.L2411
+	beq	.L2454
 	ldrh	r2, [r5]
 	ldrh	r3, [r4, #4]
 	cmp	r2, r3
-	bne	.L2411
+	bne	.L2454
 	ldrh	r2, [r5, #8]
 	movw	r3, #64245
 	cmp	r2, r3
-	beq	.L2399
-.L2411:
+	beq	.L2442
+.L2454:
 	mov	r8, #0
-.L2400:
-	ldr	r2, .L2430+12
+.L2443:
+	ldr	r2, .L2473+12
 	sxth	r3, r8
 	ldrh	r2, [r2]
 	cmp	r3, r2
-	bge	.L2407
+	bge	.L2450
 	ldr	r2, [sp, #16]
-	ldr	r0, .L2430+4
+	ldr	r0, .L2473+4
 	ldrh	r2, [r2]
 	orr	r3, r3, r2, lsl #10
 	movs	r2, #1
 	mov	r1, r2
 	str	r3, [fp, #4]
 	bl	FlashReadPages
-	ldr	r3, .L2430+16
+	ldr	r3, .L2473+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2404
+	cbz	r3, .L2447
 	ldr	r3, [fp, #12]
 	ldr	r3, [r3, #12]
 	str	r3, [sp, #20]
-	cbz	r3, .L2404
-	ldr	r2, .L2430+20
+	cbz	r3, .L2447
+	ldr	r2, .L2473+20
 	ldr	r0, [fp, #8]
 	ldrh	r1, [r2]
 	bl	js_hash
@@ -17087,13 +17209,13 @@ FtlMapTblRecovery:
 	itt	ne
 	movne	r3, #-1
 	strne	r3, [fp]
-.L2404:
+.L2447:
 	ldr	r3, [fp]
 	adds	r3, r3, #1
-	beq	.L2405
+	beq	.L2448
 	ldrh	r3, [r5, #8]
 	cmp	r7, r3
-	bls	.L2405
+	bls	.L2448
 	ldrh	r1, [r5]
 	ldrh	r2, [r4, #4]
 	cmp	r1, r2
@@ -17101,23 +17223,23 @@ FtlMapTblRecovery:
 	ldreq	r2, [fp, #4]
 	ldreq	r1, [sp]
 	streq	r2, [r1, r3, lsl #2]
-.L2405:
+.L2448:
 	add	r8, r8, #1
-	b	.L2400
-.L2399:
+	b	.L2443
+.L2442:
 	ldr	r3, [sp, #8]
 	movs	r1, #0
 	ldrh	r2, [r8]
 	ldr	ip, [r3]
 	subs	r2, r2, #1
-.L2401:
+.L2444:
 	sxth	r3, r1
 	cmp	r3, r2
-	blt	.L2403
-.L2407:
+	blt	.L2446
+.L2450:
 	adds	r6, r6, #1
-	b	.L2390
-.L2403:
+	b	.L2433
+.L2446:
 	lsls	r0, r3, #3
 	ldr	r3, [ip, r3, lsl #3]
 	adds	r1, r1, #1
@@ -17128,15 +17250,15 @@ FtlMapTblRecovery:
 	ldrhi	r3, [sp]
 	ldrhi	r0, [r0, #4]
 	strhi	r0, [r3, lr, lsl #2]
-	b	.L2401
-.L2431:
+	b	.L2444
+.L2474:
 	.align	2
-.L2430:
+.L2473:
 	.word	.LANCHOR183
-	.word	.LANCHOR202
+	.word	.LANCHOR203
 	.word	.LANCHOR188
 	.word	.LANCHOR53
-	.word	.LANCHOR1
+	.word	.LANCHOR2
 	.word	.LANCHOR57
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
 	.section	.text.FtlLoadVonderInfo,"ax",%progbits
@@ -17151,38 +17273,38 @@ FtlLoadVonderInfo:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L2433
-	ldr	r0, .L2433+4
+	ldr	r3, .L2476
+	ldr	r0, .L2476+4
 	ldrh	r3, [r3]
 	strh	r3, [r0, #10]	@ movhi
 	movw	r3, #61574
 	strh	r3, [r0, #4]	@ movhi
-	ldr	r3, .L2433+8
+	ldr	r3, .L2476+8
 	ldrh	r3, [r3]
 	strh	r3, [r0, #8]	@ movhi
-	ldr	r3, .L2433+12
+	ldr	r3, .L2476+12
 	ldrh	r3, [r3]
 	strh	r3, [r0, #6]	@ movhi
-	ldr	r3, .L2433+16
+	ldr	r3, .L2476+16
 	ldr	r3, [r3]
 	str	r3, [r0, #12]
-	ldr	r3, .L2433+20
+	ldr	r3, .L2476+20
 	ldr	r3, [r3]
 	str	r3, [r0, #16]
-	ldr	r3, .L2433+24
+	ldr	r3, .L2476+24
 	ldr	r3, [r3]
 	str	r3, [r0, #20]
-	ldr	r3, .L2433+28
+	ldr	r3, .L2476+28
 	ldr	r3, [r3]
 	str	r3, [r0, #24]
 	bl	FtlMapTblRecovery
 	movs	r0, #0
 	pop	{r3, pc}
-.L2434:
+.L2477:
 	.align	2
-.L2433:
+.L2476:
 	.word	.LANCHOR61
-	.word	.LANCHOR215
+	.word	.LANCHOR216
 	.word	.LANCHOR70
 	.word	.LANCHOR62
 	.word	.LANCHOR71
@@ -17203,15 +17325,102 @@ FtlLoadMapInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	FtlL2PDataInit
-	ldr	r0, .L2436
+	ldr	r0, .L2479
 	bl	FtlMapTblRecovery
 	movs	r0, #0
 	pop	{r3, pc}
-.L2437:
+.L2480:
 	.align	2
-.L2436:
+.L2479:
 	.word	.LANCHOR127
 	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
+	.section	.text.ftl_scan_all_ppa,"ax",%progbits
+	.align	1
+	.global	ftl_scan_all_ppa
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_scan_all_ppa, %function
+ftl_scan_all_ppa:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r6, #0
+	ldr	r4, .L2486
+	sub	sp, sp, #24
+	ldr	r7, .L2486+4
+	ldrh	r1, [r4]
+	mov	r8, r4
+	ldr	r4, .L2486+8
+	ldrh	r2, [r7]
+	ldr	r0, .L2486+12
+	bl	printf
+.L2482:
+	ldrh	r3, [r8]
+	cmp	r6, r3
+	bcs	.L2484
+	lsl	fp, r6, #10
+	movs	r5, #0
+	ldr	r10, .L2486+32
+	b	.L2485
+.L2483:
+	add	r3, r5, fp
+	movs	r2, #0
+	str	r3, [r4, #4]
+	movs	r1, #1
+	ldr	r3, [r10]
+	mov	r0, r4
+	str	r2, [r4]
+	adds	r5, r5, #1
+	str	r3, [r4, #8]
+	ldr	r3, .L2486+16
+	ldr	r3, [r3]
+	str	r3, [r4, #12]
+	bl	FlashReadPages
+	ldr	r2, [r4, #8]
+	ldr	r3, [r4, #12]
+	ldr	r0, .L2486+20
+	ldr	r1, [r2, #4]
+	str	r1, [sp, #16]
+	ldr	r2, [r2]
+	str	r2, [sp, #12]
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	ldr	r2, [r3, #8]
+	str	r2, [sp, #4]
+	ldr	r2, [r3, #4]
+	str	r2, [sp]
+	ldr	r3, [r3]
+	ldr	r2, [r4]
+	ldr	r1, [r4, #4]
+	bl	printf
+.L2485:
+	ldrh	r3, [r7]
+	cmp	r5, r3
+	bcc	.L2483
+	adds	r6, r6, #1
+	b	.L2482
+.L2484:
+	ldr	r1, .L2486+24
+	ldr	r0, .L2486+28
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	printf
+.L2487:
+	.align	2
+.L2486:
+	.word	.LANCHOR51
+	.word	.LANCHOR52
+	.word	.LANCHOR203
+	.word	.LC52
+	.word	.LANCHOR188
+	.word	.LC53
+	.word	.LANCHOR227
+	.word	.LC54
+	.word	.LANCHOR183
+	.size	ftl_scan_all_ppa, .-ftl_scan_all_ppa
 	.section	.text.FlashReadFacBbtData,"ax",%progbits
 	.align	1
 	.global	FlashReadFacBbtData
@@ -17225,18 +17434,18 @@ FlashReadFacBbtData:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	fp, r2
-	ldr	r2, .L2451
+	ldr	r2, .L2501
 	sub	sp, sp, #48
 	mov	r6, r1
 	mov	r4, r0
-	ldr	r7, .L2451+4
+	ldr	r7, .L2501+4
 	ldrh	r3, [r2, #14]
 	ldrh	r2, [r2, #12]
 	smulbb	r3, r3, r2
 	ldr	r2, [r7]
 	uxth	r3, r3
 	str	r2, [sp, #20]
-	ldr	r2, .L2451+8
+	ldr	r2, .L2501+8
 	subs	r5, r3, #1
 	mul	r10, r6, r3
 	uxth	r5, r5
@@ -17244,12 +17453,12 @@ FlashReadFacBbtData:
 	ldr	r1, [r2]
 	mov	r8, r2
 	str	r1, [sp, #24]
-.L2439:
+.L2489:
 	cmp	r3, r5
-	ble	.L2446
+	ble	.L2496
 	mov	r0, #-1
-	b	.L2438
-.L2446:
+	b	.L2488
+.L2496:
 	add	r2, r5, r10
 	add	r0, sp, #12
 	lsls	r2, r2, #10
@@ -17261,60 +17470,60 @@ FlashReadFacBbtData:
 	ldr	r2, [sp, #12]
 	ldr	r3, [sp, #4]
 	adds	r2, r2, #1
-	beq	.L2440
+	beq	.L2490
 	ldr	r2, [r8]
 	ldrh	r1, [r2]
 	movw	r2, #61664
 	cmp	r1, r2
-	bne	.L2440
-	cbz	r4, .L2447
-	cbz	r6, .L2442
-.L2445:
+	bne	.L2490
+	cbz	r4, .L2497
+	cbz	r6, .L2492
+.L2495:
 	mov	r2, fp
 	ldr	r1, [r7]
 	mov	r0, r4
 	bl	ftl_memcpy
 	movs	r3, #4
-	ldr	r0, .L2451+12
+	ldr	r0, .L2501+12
 	mov	r2, r3
 	mov	r1, r4
 	bl	rknand_print_hex
 	movs	r0, #0
-.L2438:
+.L2488:
 	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2442:
+.L2492:
 	ldr	r1, [r7]
 	mov	ip, #1
-	ldr	r5, .L2451+16
-.L2443:
+	ldr	r5, .L2501+16
+.L2493:
 	ldr	r0, [r5]
 	uxth	r3, r6
 	adds	r6, r6, #1
 	cmp	r3, r0
-	bcs	.L2445
+	bcs	.L2495
 	lsrs	r0, r3, #5
 	and	r3, r3, #31
 	lsl	r3, ip, r3
 	ldr	r2, [r1, r0, lsl #2]
 	orrs	r3, r3, r2
 	str	r3, [r1, r0, lsl #2]
-	b	.L2443
-.L2440:
+	b	.L2493
+.L2490:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L2439
-.L2447:
+	b	.L2489
+.L2497:
 	mov	r0, r4
-	b	.L2438
-.L2452:
+	b	.L2488
+.L2502:
 	.align	2
-.L2451:
+.L2501:
 	.word	.LANCHOR14
 	.word	.LANCHOR147
 	.word	.LANCHOR197
-	.word	.LC52
+	.word	.LC55
 	.word	.LANCHOR149
 	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
 	.section	.text.FlashGetBadBlockList,"ax",%progbits
@@ -17330,8 +17539,8 @@ FlashGetBadBlockList:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r5, r0
-	ldr	r3, .L2463
-	ldr	r6, .L2463+4
+	ldr	r3, .L2513
+	ldr	r6, .L2513+4
 	ldr	r3, [r3]
 	ldr	r0, [r6]
 	ldrb	r4, [r3, #13]	@ zero_extendqisi2
@@ -17342,25 +17551,25 @@ FlashGetBadBlockList:
 	asrs	r2, r2, #3
 	bl	FlashReadFacBbtData
 	adds	r0, r0, #1
-	bne	.L2454
-.L2458:
+	bne	.L2504
+.L2508:
 	movs	r3, #0
-.L2455:
+.L2505:
 	movw	r2, #65535
 	movs	r0, #0
 	strh	r2, [r5, r3, lsl #1]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.L2454:
+.L2504:
 	ldr	r7, [r6]
 	movs	r2, #0
 	lsr	ip, r4, #4
 	mov	r3, r2
 	subs	r4, r4, #1
 	mov	lr, #1
-.L2456:
+.L2506:
 	uxth	r1, r2
 	cmp	r1, r4
-	bge	.L2455
+	bge	.L2505
 	lsrs	r6, r1, #5
 	and	r0, r1, #31
 	lsl	r0, lr, r0
@@ -17372,11 +17581,11 @@ FlashGetBadBlockList:
 	strhne	r1, [r5, r3, lsl #1]	@ movhi
 	uxthne	r3, r0
 	cmp	r3, ip
-	bcc	.L2456
-	b	.L2458
-.L2464:
+	bcc	.L2506
+	b	.L2508
+.L2514:
 	.align	2
-.L2463:
+.L2513:
 	.word	.LANCHOR18
 	.word	.LANCHOR153
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
@@ -17391,66 +17600,66 @@ FlashGetBadBlockList:
 FtlMakeBbt:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2485
+	ldr	r3, .L2535
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	ldr	r7, [r3]
 	cmp	r7, #0
-	bne	.L2466
-	ldr	r8, .L2485+40
-	ldr	r4, .L2485+4
+	bne	.L2516
+	ldr	r8, .L2535+40
+	ldr	r4, .L2535+4
 	bl	FtlBbtMemInit
 	sub	r10, r8, #18
 	bl	FtlLoadFactoryBbt
-.L2467:
-	ldr	r3, .L2485+8
+.L2517:
+	ldr	r3, .L2535+8
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	bcc	.L2473
-	ldr	r5, .L2485+12
+	bcc	.L2523
+	ldr	r5, .L2535+12
 	movs	r4, #0
-.L2474:
+.L2524:
 	ldrh	r3, [r5]
 	uxth	r0, r4
 	adds	r4, r4, #1
 	cmp	r3, r0
-	bhi	.L2475
-	ldr	r4, .L2485+16
+	bhi	.L2525
+	ldr	r4, .L2535+16
 	movw	r6, #65535
 	ldrh	r5, [r4, #12]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L2476:
+.L2526:
 	ldrh	r3, [r4, #12]
 	subs	r3, r3, #47
 	cmp	r3, r5
-	bgt	.L2480
+	bgt	.L2530
 	mov	r0, r5
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L2477
+	beq	.L2527
 	mov	r0, r5
 	bl	FlashTestBlk
 	cmp	r0, #0
-	beq	.L2478
+	beq	.L2528
 	mov	r0, r5
 	bl	FtlBbmMapBadBlock
-.L2477:
+.L2527:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L2476
-.L2473:
-	ldr	r3, .L2485+20
+	b	.L2526
+.L2523:
+	ldr	r3, .L2535+20
 	movw	r1, #65535
 	ldrh	r2, [r10, #2]!
 	ldr	r0, [r3]
-	ldr	r3, .L2485+24
+	ldr	r3, .L2535+24
 	cmp	r2, r1
 	str	r0, [r4, #8]
 	ldr	fp, [r3]
 	str	r3, [sp, #4]
-	ldr	r3, .L2485+28
+	ldr	r3, .L2535+28
 	str	fp, [r4, #12]
-	beq	.L2468
+	beq	.L2518
 	ldrh	r6, [r3]
 	mov	r0, r4
 	str	r3, [sp]
@@ -17467,13 +17676,13 @@ FtlMakeBbt:
 	adds	r2, r2, #7
 	asrs	r2, r2, #3
 	bl	ftl_memcpy
-.L2469:
+.L2519:
 	uxth	r0, r6
 	adds	r7, r7, #1
 	add	r8, r8, #4
 	bl	FtlBbmMapBadBlock
-	b	.L2467
-.L2468:
+	b	.L2517
+.L2518:
 	mov	r1, r7
 	str	r3, [sp]
 	bl	FlashGetBadBlockList
@@ -17482,17 +17691,17 @@ FtlMakeBbt:
 	bl	FtlBbt2Bitmap
 	ldr	r3, [sp]
 	ldrh	r5, [r3]
-.L2471:
+.L2521:
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L2470:
+.L2520:
 	ldr	r3, [sp]
 	ldrh	r0, [r3]
 	smlabb	r0, r0, r7, r5
 	uxth	r0, r0
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L2471
+	beq	.L2521
 	ldr	r3, [sp, #4]
 	movs	r2, #16
 	movs	r1, #0
@@ -17512,7 +17721,7 @@ FtlMakeBbt:
 	mla	r6, r7, r6, r3
 	lsls	r3, r6, #10
 	str	r3, [r4, #4]
-	ldr	r3, .L2485+32
+	ldr	r3, .L2535+32
 	ldrh	r2, [r3]
 	lsls	r2, r2, #2
 	bl	ftl_memcpy
@@ -17527,23 +17736,23 @@ FtlMakeBbt:
 	bl	FlashProgPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	bne	.L2469
+	bne	.L2519
 	uxth	r0, r6
 	bl	FtlBbmMapBadBlock
-	b	.L2470
-.L2475:
+	b	.L2520
+.L2525:
 	bl	FtlBbmMapBadBlock
-	b	.L2474
-.L2478:
+	b	.L2524
+.L2528:
 	ldrh	r3, [r4]
 	cmp	r3, r6
-	bne	.L2479
+	bne	.L2529
 	strh	r5, [r4]	@ movhi
-	b	.L2477
-.L2479:
+	b	.L2527
+.L2529:
 	strh	r5, [r4, #4]	@ movhi
-.L2480:
-	ldr	r3, .L2485+36
+.L2530:
+	ldr	r3, .L2535+36
 	movs	r5, #0
 	str	r5, [r4, #8]
 	movs	r2, #2
@@ -17571,16 +17780,16 @@ FtlMakeBbt:
 	strh	r2, [r4]	@ movhi
 	strh	r3, [r4, #4]	@ movhi
 	bl	FtlBbmTblFlush
-.L2466:
+.L2516:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2486:
+.L2536:
 	.align	2
-.L2485:
+.L2535:
 	.word	.LANCHOR76
-	.word	.LANCHOR202
+	.word	.LANCHOR203
 	.word	.LANCHOR45
 	.word	.LANCHOR59
 	.word	.LANCHOR74
@@ -17604,40 +17813,40 @@ log2phys:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #24
-	ldr	r4, .L2505
+	ldr	r4, .L2555
 	mov	fp, r0
 	str	r2, [sp, #16]
 	ldr	r2, [r4]
-	ldr	r3, .L2505+4
+	ldr	r3, .L2555+4
 	str	r1, [sp, #4]
 	cmp	r0, r2
 	ldrh	r5, [r3]
-	bcc	.L2488
-	ldr	r1, .L2505+8
+	bcc	.L2538
+	ldr	r1, .L2555+8
 	mov	r2, #884
-	ldr	r0, .L2505+12
+	ldr	r0, .L2555+12
 	bl	printf
-	ldr	r1, .L2505+16
-	ldr	r0, .L2505+20
+	ldr	r1, .L2555+16
+	ldr	r0, .L2555+20
 	bl	printf
-.L2488:
+.L2538:
 	ldr	r3, [r4]
 	cmp	fp, r3
-	bcs	.L2489
+	bcs	.L2539
 	adds	r3, r5, #7
-	ldr	r5, .L2505+24
+	ldr	r5, .L2555+24
 	lsr	r7, fp, r3
 	str	r3, [sp, #8]
-	ldr	r3, .L2505+28
+	ldr	r3, .L2555+28
 	movs	r4, #12
 	ldr	r1, [r5]
 	uxth	r6, r7
 	ldrh	r2, [r3]
 	movs	r3, #0
-.L2490:
+.L2540:
 	uxth	r10, r3
 	cmp	r10, r2
-	bcc	.L2495
+	bcc	.L2545
 	bl	select_l2p_ram_region
 	muls	r4, r0, r4
 	ldr	r3, [r5]
@@ -17646,35 +17855,35 @@ log2phys:
 	adds	r2, r3, r4
 	movw	r3, #65535
 	cmp	r1, r3
-	beq	.L2496
+	beq	.L2546
 	ldr	r3, [r2, #4]
 	cmp	r3, #0
-	bge	.L2496
+	bge	.L2546
 	bl	flush_l2p_region
-.L2496:
-	ldr	r3, .L2505+32
+.L2546:
+	ldr	r3, .L2555+32
 	ldrh	r3, [r3]
 	cmp	r3, r6
-	bcs	.L2497
-	ldr	r1, .L2505+36
+	bcs	.L2547
+	ldr	r1, .L2555+36
 	movw	r2, #526
-	ldr	r0, .L2505+12
+	ldr	r0, .L2555+12
 	bl	printf
-	ldr	r1, .L2505+16
-	ldr	r0, .L2505+20
+	ldr	r1, .L2555+16
+	ldr	r0, .L2555+20
 	bl	printf
-.L2497:
-	ldr	r3, .L2505+40
+.L2547:
+	ldr	r3, .L2555+40
 	uxth	r7, r7
 	ldr	r3, [r3]
 	ldr	r3, [r3, r7, lsl #2]
 	cmp	r3, #0
-	bne	.L2498
+	bne	.L2548
 	ldr	r2, [r5]
 	movs	r1, #255
 	str	r3, [sp, #12]
 	adds	r0, r2, r4
-	ldr	r2, .L2505+44
+	ldr	r2, .L2555+44
 	ldr	r0, [r0, #8]
 	ldrh	r2, [r2]
 	bl	ftl_memset
@@ -17683,53 +17892,53 @@ log2phys:
 	adds	r1, r2, r4
 	strh	r6, [r2, r4]	@ movhi
 	str	r3, [r1, #4]
-	b	.L2492
-.L2489:
+	b	.L2542
+.L2539:
 	ldr	r3, [sp, #16]
 	mov	r0, #-1
-	cbnz	r3, .L2487
+	cbnz	r3, .L2537
 	ldr	r3, [sp, #4]
 	str	r0, [r3]
-.L2487:
+.L2537:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2495:
+.L2545:
 	adds	r3, r3, #1
 	mla	r0, r4, r3, r1
 	ldrh	r0, [r0, #-12]
 	cmp	r0, r6
-	bne	.L2490
-.L2492:
+	bne	.L2540
+.L2542:
 	ldr	r2, [sp, #8]
 	movs	r3, #1
 	ldr	r0, [sp, #16]
-	ldr	r1, .L2505+24
+	ldr	r1, .L2555+24
 	lsls	r3, r3, r2
 	movs	r2, #12
 	subs	r3, r3, #1
 	and	r3, r3, fp
 	uxth	r3, r3
-	cbnz	r0, .L2493
+	cbnz	r0, .L2543
 	ldr	r0, [r1]
 	mla	r2, r2, r10, r0
 	ldr	r2, [r2, #8]
 	ldr	r3, [r2, r3, lsl #2]
 	ldr	r2, [sp, #4]
 	str	r3, [r2]
-.L2494:
+.L2544:
 	ldr	r2, [r1]
 	movs	r3, #12
 	mla	r10, r3, r10, r2
 	ldr	r3, [r10, #4]
 	adds	r2, r3, #1
-	beq	.L2503
+	beq	.L2553
 	adds	r3, r3, #1
 	str	r3, [r10, #4]
-.L2503:
+.L2553:
 	movs	r0, #0
-	b	.L2487
-.L2493:
+	b	.L2537
+.L2543:
 	ldr	r0, [r1]
 	mla	r2, r2, r10, r0
 	ldr	r0, [sp, #4]
@@ -17739,19 +17948,19 @@ log2phys:
 	ldr	r3, [r2, #4]
 	orr	r3, r3, #-2147483648
 	str	r3, [r2, #4]
-	ldr	r3, .L2505+48
+	ldr	r3, .L2555+48
 	strh	r6, [r3]	@ movhi
-	b	.L2494
-.L2498:
+	b	.L2544
+.L2548:
 	ldr	r2, [r5]
-	ldr	r8, .L2505+80
+	ldr	r8, .L2555+80
 	str	r3, [sp, #20]
 	add	r2, r2, r4
 	ldr	r2, [r2, #8]
 	mov	r0, r8
 	str	r3, [r8, #4]
 	str	r2, [r8, #8]
-	ldr	r2, .L2505+52
+	ldr	r2, .L2555+52
 	ldr	r2, [r2]
 	str	r2, [r8, #12]
 	movs	r2, #1
@@ -17762,85 +17971,85 @@ log2phys:
 	str	r3, [sp, #12]
 	ldr	r3, [sp, #20]
 	cmp	r2, r6
-	beq	.L2499
+	beq	.L2549
 	mov	r2, r3
 	mov	r1, r7
-	ldr	r0, .L2505+56
+	ldr	r0, .L2555+56
 	bl	printf
 	movs	r3, #4
 	ldr	r1, [r8, #12]
 	mov	r2, r3
-	ldr	r0, .L2505+60
+	ldr	r0, .L2555+60
 	bl	rknand_print_hex
-	ldr	r3, .L2505+32
+	ldr	r3, .L2555+32
 	movs	r2, #4
-	ldr	r1, .L2505+40
-	ldr	r0, .L2505+64
+	ldr	r1, .L2555+40
+	ldr	r0, .L2555+64
 	ldrh	r3, [r3]
 	ldr	r1, [r1]
 	bl	rknand_print_hex
-	ldr	r3, .L2505+68
+	ldr	r3, .L2555+68
 	movs	r2, #1
 	str	r2, [r3]
-.L2500:
+.L2550:
 	ldr	r3, [sp, #12]
 	ldrh	r3, [r3, #8]
 	cmp	r3, r6
-	beq	.L2501
-	ldr	r1, .L2505+36
+	beq	.L2551
+	ldr	r1, .L2555+36
 	mov	r2, #552
-	ldr	r0, .L2505+12
+	ldr	r0, .L2555+12
 	bl	printf
-	ldr	r1, .L2505+16
-	ldr	r0, .L2505+20
+	ldr	r1, .L2555+16
+	ldr	r0, .L2555+20
 	bl	printf
-.L2501:
-	ldr	r3, .L2505+24
+.L2551:
+	ldr	r3, .L2555+24
 	movs	r1, #0
 	ldr	r3, [r3]
 	adds	r2, r3, r4
 	str	r1, [r2, #4]
 	strh	r6, [r3, r4]	@ movhi
-	b	.L2492
-.L2499:
+	b	.L2542
+.L2549:
 	ldr	r2, [r8]
 	cmp	r2, #256
-	bne	.L2500
+	bne	.L2550
 	mov	r2, r3
 	mov	r1, r7
-	ldr	r0, .L2505+72
+	ldr	r0, .L2555+72
 	bl	printf
 	ldr	r3, [r5]
 	mov	r1, r7
-	ldr	r0, .L2505+76
+	ldr	r0, .L2555+76
 	add	r3, r3, r4
 	ldr	r2, [r3, #8]
 	bl	FtlMapWritePage
-	b	.L2500
-.L2506:
+	b	.L2550
+.L2556:
 	.align	2
-.L2505:
+.L2555:
 	.word	.LANCHOR72
 	.word	.LANCHOR56
-	.word	.LANCHOR226
+	.word	.LANCHOR228
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
 	.word	.LANCHOR96
 	.word	.LANCHOR67
 	.word	.LANCHOR66
-	.word	.LANCHOR227
+	.word	.LANCHOR229
 	.word	.LANCHOR131
 	.word	.LANCHOR57
 	.word	.LANCHOR97
 	.word	.LANCHOR188
-	.word	.LC53
+	.word	.LC56
 	.word	.LC27
-	.word	.LC54
+	.word	.LC57
 	.word	.LANCHOR76
-	.word	.LC55
+	.word	.LC58
 	.word	.LANCHOR127
-	.word	.LANCHOR202
+	.word	.LANCHOR203
 	.size	log2phys, .-log2phys
 	.section	.text.FtlProgPages,"ax",%progbits
 	.align	1
@@ -17855,73 +18064,73 @@ FtlProgPages:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r3
-	ldr	r3, .L2527
+	ldr	r3, .L2577
 	mov	r5, r0
 	mov	r10, r1
 	ldr	r7, [r3]
 	mov	r8, r3
-	cbnz	r7, .L2507
-	ldr	r3, .L2527+4
+	cbnz	r7, .L2557
+	ldr	r3, .L2577+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2522
+	cbz	r3, .L2572
 	ldrb	r6, [r4, #8]	@ zero_extendqisi2
 	subs	r3, r6, #1
 	rsbs	r6, r3, #0
 	adcs	r6, r6, r3
-.L2509:
-	ldr	fp, .L2527+40
+.L2559:
+	ldr	fp, .L2577+40
 	mov	r2, r6
 	ldrb	r3, [r4, #9]	@ zero_extendqisi2
 	mov	r1, r10
 	mov	r0, r5
 	bl	FlashProgPages
-.L2510:
+.L2560:
 	cmp	r7, r10
-	bne	.L2520
-	ldr	r3, .L2527+8
+	bne	.L2570
+	ldr	r3, .L2577+8
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L2507
-	ldr	r1, .L2527+12
-	mov	r2, #1600
-	ldr	r0, .L2527+16
+	bcc	.L2557
+	ldr	r1, .L2577+12
+	movw	r2, #1605
+	ldr	r0, .L2577+16
 	bl	printf
-	ldr	r1, .L2527+20
-	ldr	r0, .L2527+24
+	ldr	r1, .L2577+20
+	ldr	r0, .L2577+24
 	bl	printf
-.L2507:
+.L2557:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2522:
+.L2572:
 	mov	r6, r7
-	b	.L2509
-.L2513:
+	b	.L2559
+.L2563:
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r4]
 	cmp	r3, r0
-	bne	.L2511
+	bne	.L2561
 	ldr	r1, [fp]
 	ldrh	r0, [r4, #4]
 	ldrh	r2, [r1, r3, lsl #1]
 	subs	r2, r2, r0
 	strh	r2, [r1, r3, lsl #1]	@ movhi
-	ldr	r3, .L2527+28
+	ldr	r3, .L2577+28
 	ldrh	r3, [r3]
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [r4, #6]
 	strh	r3, [r4, #4]	@ movhi
-.L2511:
+.L2561:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L2512
+	cbnz	r3, .L2562
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-.L2512:
-	ldr	r2, .L2527+32
+.L2562:
+	ldr	r2, .L2577+32
 	ldr	r3, [r2, #96]
 	adds	r3, r3, #1
 	str	r3, [r2, #96]
@@ -17939,27 +18148,27 @@ FtlProgPages:
 	bl	FlashProgPages
 	ldr	r3, [r8]
 	cmp	r3, #0
-	bne	.L2507
-.L2520:
+	bne	.L2557
+.L2570:
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L2513
-	ldr	r3, .L2527+8
+	beq	.L2563
+	ldr	r3, .L2577+8
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L2514
-	ldr	r1, .L2527+12
-	movw	r2, #1583
-	ldr	r0, .L2527+16
+	bcc	.L2564
+	ldr	r1, .L2577+12
+	movw	r2, #1588
+	ldr	r0, .L2577+16
 	bl	printf
-	ldr	r1, .L2527+20
-	ldr	r0, .L2527+24
+	ldr	r1, .L2577+20
+	ldr	r0, .L2577+24
 	bl	printf
-.L2514:
+.L2564:
 	ldr	r3, [r5, #4]
-	cbnz	r6, .L2515
-.L2526:
+	cbnz	r6, .L2565
+.L2576:
 	movs	r2, #1
 	add	r1, sp, #12
 	ldr	r0, [r5, #16]
@@ -17973,38 +18182,38 @@ FtlProgPages:
 	ldr	r2, [sp, #4]
 	mov	r3, r0
 	adds	r2, r2, #1
-	beq	.L2517
+	beq	.L2567
 	ldr	r2, [fp]
 	ldrh	r2, [r2, r0, lsl #1]
-	cbnz	r2, .L2518
+	cbnz	r2, .L2568
 	mov	r1, r0
 	str	r0, [sp, #4]
-	ldr	r0, .L2527+36
+	ldr	r0, .L2577+36
 	bl	printf
 	ldr	r3, [sp, #4]
-.L2518:
+.L2568:
 	mov	r0, r3
 	bl	decrement_vpc_count
-.L2517:
+.L2567:
 	adds	r7, r7, #1
 	adds	r5, r5, #36
-	b	.L2510
-.L2515:
+	b	.L2560
+.L2565:
 	orr	r3, r3, #-2147483648
-	b	.L2526
-.L2528:
+	b	.L2576
+.L2578:
 	.align	2
-.L2527:
+.L2577:
 	.word	.LANCHOR76
 	.word	.LANCHOR15
 	.word	.LANCHOR38
-	.word	.LANCHOR228
+	.word	.LANCHOR230
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
 	.word	.LANCHOR52
 	.word	.LANCHOR138
-	.word	.LC56
+	.word	.LC59
 	.word	.LANCHOR83
 	.size	FtlProgPages, .-FtlProgPages
 	.section	.text.FtlCacheWriteBack,"ax",%progbits
@@ -18019,27 +18228,27 @@ FtlCacheWriteBack:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	ldr	r3, .L2534
+	ldr	r3, .L2584
 	ldr	r4, [r3]
-	cbnz	r4, .L2530
-	ldr	r5, .L2534+4
+	cbnz	r4, .L2580
+	ldr	r5, .L2584+4
 	ldr	r0, [r5]
-	cbz	r0, .L2530
-	ldr	r3, .L2534+8
+	cbz	r0, .L2580
+	ldr	r3, .L2584+8
 	mov	r2, r4
 	movs	r1, #1
 	ldr	r3, [r3]
 	bl	FtlProgPages
 	str	r4, [r5]
-.L2530:
+.L2580:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L2535:
+.L2585:
 	.align	2
-.L2534:
+.L2584:
 	.word	.LANCHOR76
 	.word	.LANCHOR132
-	.word	.LANCHOR229
+	.word	.LANCHOR231
 	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
 	.section	.text.FtlSysFlush,"ax",%progbits
 	.align	1
@@ -18053,20 +18262,20 @@ FtlSysFlush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L2538
+	ldr	r3, .L2588
 	ldr	r3, [r3]
-	cbnz	r3, .L2537
+	cbnz	r3, .L2587
 	bl	FtlCacheWriteBack
 	bl	l2p_flush
 	movs	r0, #1
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L2537:
+.L2587:
 	movs	r0, #0
 	pop	{r3, pc}
-.L2539:
+.L2589:
 	.align	2
-.L2538:
+.L2588:
 	.word	.LANCHOR76
 	.size	FtlSysFlush, .-FtlSysFlush
 	.section	.text.FtlDeInit,"ax",%progbits
@@ -18081,18 +18290,18 @@ FtlDeInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L2542
+	ldr	r3, .L2592
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L2541
+	bne	.L2591
 	bl	FtlSysFlush
-.L2541:
+.L2591:
 	movs	r0, #0
 	pop	{r3, pc}
-.L2543:
+.L2593:
 	.align	2
-.L2542:
-	.word	.LANCHOR230
+.L2592:
+	.word	.LANCHOR232
 	.size	FtlDeInit, .-FtlDeInit
 	.section	.text.rk_ftl_de_init,"ax",%progbits
 	.align	1
@@ -18122,28 +18331,28 @@ rk_ftl_de_init:
 ftl_discard:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2560
+	ldr	r3, .L2610
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r5, r2
 	adds	r2, r1, r2
 	mov	r6, r1
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L2553
+	bhi	.L2603
 	cmp	r5, #31
-	bhi	.L2547
-.L2548:
+	bhi	.L2597
+.L2598:
 	movs	r0, #0
-.L2545:
+.L2595:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L2547:
-	ldr	r3, .L2560+4
+.L2597:
+	ldr	r3, .L2610+4
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L2548
-	ldr	r8, .L2560+16
+	bne	.L2598
+	ldr	r8, .L2610+16
 	bl	FtlCacheWriteBack
 	mov	r0, r6
 	ldrh	r4, [r8]
@@ -18153,7 +18362,7 @@ ftl_discard:
 	mov	r7, r0
 	subs	r6, r6, r3
 	uxth	r6, r6
-	cbz	r6, .L2549
+	cbz	r6, .L2599
 	subs	r4, r4, r6
 	adds	r7, r7, #1
 	cmp	r4, r5
@@ -18161,32 +18370,32 @@ ftl_discard:
 	movcs	r4, r5
 	uxth	r4, r4
 	subs	r5, r5, r4
-.L2549:
-	ldr	r4, .L2560+8
+.L2599:
+	ldr	r4, .L2610+8
 	mov	r3, #-1
-	ldr	r6, .L2560+12
+	ldr	r6, .L2610+12
 	str	r3, [sp, #4]
-.L2550:
+.L2600:
 	ldrh	r3, [r8]
 	cmp	r5, r3
-	bcs	.L2552
-	ldr	r3, .L2560+8
+	bcs	.L2602
+	ldr	r3, .L2610+8
 	ldr	r2, [r3]
 	cmp	r2, #32
-	bls	.L2548
+	bls	.L2598
 	movs	r4, #0
 	str	r4, [r3]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L2548
-.L2552:
+	b	.L2598
+.L2602:
 	movs	r2, #0
 	mov	r1, sp
 	mov	r0, r7
 	bl	log2phys
 	ldr	r3, [sp]
 	adds	r3, r3, #1
-	beq	.L2551
+	beq	.L2601
 	ldr	r3, [r4]
 	movs	r2, #1
 	add	r1, sp, #4
@@ -18201,23 +18410,165 @@ ftl_discard:
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L2551:
+.L2601:
 	ldrh	r3, [r8]
 	adds	r7, r7, #1
 	subs	r5, r5, r3
-	b	.L2550
-.L2553:
+	b	.L2600
+.L2603:
 	mov	r0, #-1
-	b	.L2545
-.L2561:
+	b	.L2595
+.L2611:
 	.align	2
-.L2560:
+.L2610:
 	.word	.LANCHOR68
 	.word	.LANCHOR76
-	.word	.LANCHOR231
+	.word	.LANCHOR233
 	.word	.LANCHOR163
 	.word	.LANCHOR55
 	.size	ftl_discard, .-ftl_discard
+	.section	.text.FtlCheckVpc,"ax",%progbits
+	.align	1
+	.global	FtlCheckVpc
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlCheckVpc, %function
+FtlCheckVpc:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #0
+	ldr	r6, .L2636
+	ldr	r5, .L2636+4
+	ldr	r1, .L2636+8
+	ldr	r0, .L2636+12
+	bl	printf
+	mov	r2, #8192
+	movs	r1, #0
+	ldr	r0, .L2636+4
+	bl	memset
+.L2613:
+	ldr	r3, [r6]
+	cmp	r4, r3
+	bcc	.L2615
+	ldr	r10, .L2636+56
+	movs	r4, #0
+	ldr	r7, .L2636+16
+	mov	r6, r4
+.L2616:
+	ldrh	r2, [r10]
+	uxth	r3, r4
+	cmp	r2, r3
+	bhi	.L2618
+	ldr	r3, .L2636+20
+	ldr	r4, [r3]
+	cbz	r4, .L2619
+	ldr	r3, .L2636+24
+	mov	r8, #0
+	ldr	r5, .L2636+28
+	ldr	r10, .L2636+16
+	ldrh	r7, [r3]
+	ldr	r3, [r5]
+	ldr	fp, .L2636+4
+	subs	r4, r4, r3
+	ldr	r3, .L2636+32
+	asrs	r4, r4, #1
+	muls	r4, r3, r4
+	uxth	r4, r4
+.L2620:
+	uxth	r3, r8
+	cmp	r7, r3
+	bls	.L2619
+	ldr	r3, [r10]
+	ldrh	r2, [r3, r4, lsl #1]
+	cbz	r2, .L2621
+	movs	r6, #1
+	ldrh	r3, [fp, r4, lsl #1]
+	mov	r1, r4
+	ldr	r0, .L2636+36
+	bl	printf
+.L2621:
+	movs	r3, #6
+	ldr	r2, [r5]
+	muls	r4, r3, r4
+	movw	r3, #65535
+	add	r8, r8, #1
+	ldrh	r4, [r2, r4]
+	cmp	r4, r3
+	bne	.L2620
+.L2619:
+	cbz	r6, .L2612
+	ldr	r1, .L2636+8
+	mov	r2, #1688
+	ldr	r0, .L2636+40
+	bl	printf
+	ldr	r1, .L2636+44
+	ldr	r0, .L2636+48
+	bl	printf
+.L2612:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2615:
+	movs	r2, #0
+	add	r1, sp, #4
+	mov	r0, r4
+	bl	log2phys
+	ldr	r0, [sp, #4]
+	adds	r3, r0, #1
+	beq	.L2614
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	ldrh	r3, [r5, r0, lsl #1]
+	adds	r3, r3, #1
+	strh	r3, [r5, r0, lsl #1]	@ movhi
+.L2614:
+	adds	r4, r4, #1
+	b	.L2613
+.L2618:
+	ldr	r3, [r7]
+	uxth	r5, r4
+	ldr	r8, .L2636+4
+	ldrh	r2, [r3, r5, lsl #1]
+	ldrh	r3, [r8, r5, lsl #1]
+	cmp	r2, r3
+	beq	.L2617
+	mov	r1, r5
+	ldr	r0, .L2636+52
+	bl	printf
+	ldr	r3, [r7]
+	movw	r2, #65535
+	ldrh	r3, [r3, r5, lsl #1]
+	cmp	r3, r2
+	beq	.L2617
+	ldrh	r2, [r8, r5, lsl #1]
+	cmp	r2, r3
+	it	hi
+	movhi	r6, #1
+.L2617:
+	adds	r4, r4, #1
+	b	.L2616
+.L2637:
+	.align	2
+.L2636:
+	.word	.LANCHOR72
+	.word	check_valid_page_count_table
+	.word	.LANCHOR234
+	.word	.LC45
+	.word	.LANCHOR83
+	.word	.LANCHOR87
+	.word	.LANCHOR88
+	.word	.LANCHOR81
+	.word	-1431655765
+	.word	.LC61
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LC60
+	.word	.LANCHOR40
+	.size	FtlCheckVpc, .-FtlCheckVpc
 	.section	.text.Ftlscanalldata,"ax",%progbits
 	.align	1
 	.global	Ftlscanalldata
@@ -18231,60 +18582,60 @@ Ftlscanalldata:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r5, #0
-	ldr	r7, .L2576
+	ldr	r7, .L2652
 	sub	sp, sp, #32
 	movs	r1, #0
-	ldr	r8, .L2576+24
-	ldr	r0, .L2576+4
+	ldr	r8, .L2652+24
+	ldr	r0, .L2652+4
 	bl	printf
-.L2563:
+.L2639:
 	ldr	r3, [r7]
 	cmp	r5, r3
-	bcc	.L2569
+	bcc	.L2645
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L2569:
+.L2645:
 	movs	r2, #0
 	add	r1, sp, #28
 	mov	r0, r5
 	bl	log2phys
 	ubfx	r3, r5, #0, #11
-	cbnz	r3, .L2564
+	cbnz	r3, .L2640
 	ldr	r2, [sp, #28]
 	mov	r1, r5
 	mov	r0, r8
 	bl	printf
-.L2564:
+.L2640:
 	ldr	r3, [sp, #28]
 	adds	r2, r3, #1
-	beq	.L2566
-	ldr	r4, .L2576+8
+	beq	.L2642
+	ldr	r4, .L2652+8
 	movs	r2, #0
 	movs	r1, #1
 	str	r3, [r4, #4]
 	mov	r0, r4
-	ldr	r3, .L2576+12
+	ldr	r3, .L2652+12
 	str	r5, [r4, #16]
 	str	r2, [r4]
 	ldr	r3, [r3]
 	str	r3, [r4, #8]
-	ldr	r3, .L2576+16
+	ldr	r3, .L2652+16
 	ldr	r6, [r3]
 	str	r6, [r4, #12]
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	cmp	r3, #256
-	beq	.L2567
+	beq	.L2643
 	adds	r3, r3, #1
-	beq	.L2567
+	beq	.L2643
 	ldr	r3, [r6, #8]
 	cmp	r5, r3
-	beq	.L2566
-.L2567:
+	beq	.L2642
+.L2643:
 	ldr	r2, [r4, #8]
 	ldr	r3, [r4, #12]
-	ldr	r0, .L2576+20
+	ldr	r0, .L2652+20
 	ldr	r1, [r2, #4]
 	str	r1, [sp, #16]
 	mov	r1, r5
@@ -18299,19 +18650,19 @@ Ftlscanalldata:
 	ldr	r2, [r4, #4]
 	ldr	r3, [r3]
 	bl	printf
-.L2566:
+.L2642:
 	adds	r5, r5, #1
-	b	.L2563
-.L2577:
+	b	.L2639
+.L2653:
 	.align	2
-.L2576:
+.L2652:
 	.word	.LANCHOR72
-	.word	.LC57
-	.word	.LANCHOR202
+	.word	.LC62
+	.word	.LANCHOR203
 	.word	.LANCHOR183
 	.word	.LANCHOR188
-	.word	.LC59
-	.word	.LC58
+	.word	.LC64
+	.word	.LC63
 	.size	Ftlscanalldata, .-Ftlscanalldata
 	.section	.text.FtlReUsePrevPpa,"ax",%progbits
 	.align	1
@@ -18326,7 +18677,7 @@ FtlReUsePrevPpa:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r6, r0
-	ldr	r5, .L2588
+	ldr	r5, .L2664
 	ubfx	r0, r1, #10, #16
 	str	r1, [sp, #4]
 	bl	P2V_block_in_plane
@@ -18334,15 +18685,15 @@ FtlReUsePrevPpa:
 	mov	r7, r0
 	ldrh	r3, [r2, r0, lsl #1]
 	cmp	r3, #0
-	bne	.L2579
-	ldr	r2, .L2588+4
+	bne	.L2655
+	ldr	r2, .L2664+4
 	ldr	r4, [r2]
 	cmp	r4, #0
-	beq	.L2580
-	ldr	r2, .L2588+8
+	beq	.L2656
+	ldr	r2, .L2664+8
 	movw	lr, #65535
-	ldr	ip, .L2588+32
-	ldr	r0, .L2588+12
+	ldr	ip, .L2664+32
+	ldr	r0, .L2664+12
 	ldr	r2, [r2]
 	ldrh	r1, [r0]
 	mov	r8, r0
@@ -18351,25 +18702,25 @@ FtlReUsePrevPpa:
 	mul	r4, ip, r4
 	mov	ip, #6
 	uxth	r4, r4
-.L2581:
+.L2657:
 	uxth	r0, r3
 	cmp	r1, r0
-	bls	.L2580
+	bls	.L2656
 	cmp	r4, r7
-	bne	.L2582
+	bne	.L2658
 	mov	r1, r4
-	ldr	r0, .L2588+4
+	ldr	r0, .L2664+4
 	bl	List_remove_node
 	ldrh	r3, [r8]
-	cbnz	r3, .L2583
-	ldr	r1, .L2588+16
-	movw	r2, #2097
-	ldr	r0, .L2588+20
+	cbnz	r3, .L2659
+	ldr	r1, .L2664+16
+	movw	r2, #2099
+	ldr	r0, .L2664+20
 	bl	printf
-	ldr	r1, .L2588+24
-	ldr	r0, .L2588+28
+	ldr	r1, .L2664+24
+	ldr	r0, .L2664+28
 	bl	printf
-.L2583:
+.L2659:
 	ldrh	r3, [r8]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -18377,17 +18728,17 @@ FtlReUsePrevPpa:
 	bl	INSERT_DATA_LIST
 	ldr	r2, [r5]
 	ldrh	r3, [r2, r7, lsl #1]
-.L2579:
+.L2655:
 	adds	r3, r3, #1
 	strh	r3, [r2, r7, lsl #1]	@ movhi
-	b	.L2580
-.L2582:
+	b	.L2656
+.L2658:
 	mul	r4, ip, r4
 	adds	r3, r3, #1
 	ldrh	r4, [r2, r4]
 	cmp	r4, lr
-	bne	.L2581
-.L2580:
+	bne	.L2657
+.L2656:
 	movs	r2, #1
 	add	r1, sp, #4
 	mov	r0, r6
@@ -18395,14 +18746,14 @@ FtlReUsePrevPpa:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L2589:
+.L2665:
 	.align	2
-.L2588:
+.L2664:
 	.word	.LANCHOR83
 	.word	.LANCHOR87
 	.word	.LANCHOR81
 	.word	.LANCHOR88
-	.word	.LANCHOR232
+	.word	.LANCHOR235
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
@@ -18425,181 +18776,181 @@ FtlRecoverySuperblock:
 	mov	r10, r0
 	sub	sp, sp, #56
 	cmp	r3, r2
-	beq	.L2751
+	beq	.L2827
 	ldrh	r3, [r0, #2]
 	str	r3, [sp, #12]
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	ldr	r1, [sp, #12]
 	str	r3, [sp, #28]
-	ldr	r3, .L2760
+	ldr	r3, .L2836
 	ldrh	r3, [r3]
 	cmp	r3, r1
 	mov	r3, #0
-	bne	.L2593
+	bne	.L2669
 	strh	r3, [r0, #4]	@ movhi
-.L2758:
+.L2834:
 	strb	r3, [r10, #6]
-.L2751:
+.L2827:
 	movs	r0, #0
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2593:
+.L2669:
 	ldrh	r0, [r0, #16]
-.L2594:
+.L2670:
 	cmp	r0, r2
 	uxth	r5, r3
 	add	r3, r3, #1
-	beq	.L2595
+	beq	.L2671
 	ldrb	r1, [r10, #8]	@ zero_extendqisi2
 	cmp	r1, #1
-	bne	.L2596
+	bne	.L2672
 	bl	FtlGetLastWrittenPage
 	adds	r6, r0, #1
 	mov	r4, r0
-	beq	.L2597
-	ldr	r3, .L2760+4
+	beq	.L2673
+	ldr	r3, .L2836+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L2675
-	ldr	r3, .L2760+8
+	bne	.L2751
+	ldr	r3, .L2836+8
 	ldrh	r5, [r3, r0, lsl #1]
-.L2598:
-	ldr	r3, .L2760+12
+.L2674:
+	ldr	r3, .L2836+12
 	movw	r8, #65535
 	mov	fp, #36
 	ldrh	ip, [r3]
-	ldr	r3, .L2760+16
+	ldr	r3, .L2836+16
 	ldr	r0, [r3]
-	ldr	r3, .L2760+20
+	ldr	r3, .L2836+20
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
-	ldr	r3, .L2760+24
+	ldr	r3, .L2836+24
 	ldrh	lr, [r3]
 	add	r3, r10, #16
 	str	r3, [sp, #20]
 	str	r3, [sp, #4]
 	movs	r3, #0
 	mov	r6, r3
-.L2599:
+.L2675:
 	uxth	r2, r3
 	cmp	ip, r2
-	bhi	.L2603
+	bhi	.L2679
 	ldrb	r3, [r10, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L2676
-	ldr	r3, .L2760+4
+	bne	.L2752
+	ldr	r3, .L2836+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	adds	r3, r3, #0
 	it	ne
 	movne	r3, #1
-.L2752:
+.L2828:
 	str	r3, [sp, #36]
 	mov	r1, r6
 	ldr	r2, [sp, #36]
 	movs	r7, #0
 	bl	FlashReadPages
-	ldr	r3, .L2760+28
+	ldr	r3, .L2836+28
 	movw	fp, #65535
-	ldr	r8, .L2760+16
+	ldr	r8, .L2836+16
 	ldr	r3, [r3]
 	subs	r3, r3, #1
 	str	r3, [sp, #4]
-.L2605:
+.L2681:
 	uxth	r3, r7
 	cmp	r6, r3
-	bhi	.L2610
-	bne	.L2608
+	bhi	.L2686
+	bne	.L2684
 	adds	r4, r4, #1
 	uxth	r3, r4
 	str	r3, [sp, #8]
 	ldr	r3, [r8]
 	ldr	r0, [r3, #4]
-.L2753:
+.L2829:
 	ubfx	r0, r0, #10, #16
 	bl	P2V_plane
 	ldrb	r3, [r10, #8]	@ zero_extendqisi2
 	str	r0, [sp, #16]
 	cmp	r3, #1
-	bne	.L2612
-	ldr	r2, .L2760+4
+	bne	.L2688
+	ldr	r2, .L2836+4
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbnz	r2, .L2612
+	cbnz	r2, .L2688
 	ldr	r1, [sp, #8]
-	ldr	r2, .L2760+8
+	ldr	r2, .L2836+8
 	ldrh	r2, [r2, r1, lsl #1]
 	str	r2, [sp, #8]
-.L2612:
-	ldr	r2, .L2760
+.L2688:
+	ldr	r2, .L2836
 	ldr	r1, [sp, #8]
 	ldrh	r2, [r2]
 	cmp	r2, r1
-	bne	.L2613
+	bne	.L2689
 	ldrh	r2, [sp, #8]
 	strh	r2, [r10, #2]	@ movhi
 	movs	r2, #0
 	strb	r2, [r10, #6]
 	strh	r2, [r10, #4]	@ movhi
-.L2613:
+.L2689:
 	ldr	r2, [sp, #8]
 	ldr	r1, [sp, #12]
 	cmp	r2, r1
-	bne	.L2614
+	bne	.L2690
 	ldr	r2, [sp, #16]
 	ldr	r1, [sp, #28]
 	cmp	r2, r1
-	bne	.L2614
-.L2759:
+	bne	.L2690
+.L2835:
 	ldr	r1, [sp, #8]
 	mov	r0, r10
 	bl	ftl_sb_update_avl_pages
-	b	.L2751
-.L2595:
+	b	.L2827
+.L2671:
 	uxth	r1, r3
 	adds	r1, r1, #8
 	ldrh	r0, [r10, r1, lsl #1]
-	b	.L2594
-.L2596:
+	b	.L2670
+.L2672:
 	movs	r1, #0
 	bl	FtlGetLastWrittenPage
 	mov	r4, r0
 	adds	r0, r0, #1
-	beq	.L2597
-.L2675:
+	beq	.L2673
+.L2751:
 	mov	r5, r4
-	b	.L2598
-.L2597:
+	b	.L2674
+.L2673:
 	ldr	r3, [sp, #12]
-	cbz	r3, .L2600
-	ldr	r1, .L2760+32
-	movw	r2, #2168
-	ldr	r0, .L2760+36
+	cbz	r3, .L2676
+	ldr	r1, .L2836+32
+	movw	r2, #2170
+	ldr	r0, .L2836+36
 	bl	printf
-	ldr	r1, .L2760+40
-	ldr	r0, .L2760+44
+	ldr	r1, .L2836+40
+	ldr	r0, .L2836+44
 	bl	printf
-.L2600:
+.L2676:
 	ldr	r3, [sp, #28]
-	cbz	r3, .L2601
+	cbz	r3, .L2677
 	cmp	r5, r3
-	beq	.L2601
-	ldr	r1, .L2760+32
-	movw	r2, #2169
-	ldr	r0, .L2760+36
+	beq	.L2677
+	ldr	r1, .L2836+32
+	movw	r2, #2171
+	ldr	r0, .L2836+36
 	bl	printf
-	ldr	r1, .L2760+40
-	ldr	r0, .L2760+44
+	ldr	r1, .L2836+40
+	ldr	r0, .L2836+44
 	bl	printf
-.L2601:
+.L2677:
 	movs	r3, #0
 	strh	r3, [r10, #2]	@ movhi
-	b	.L2758
-.L2603:
+	b	.L2834
+.L2679:
 	ldr	r1, [sp, #4]
 	ldrh	r2, [r1], #2
 	cmp	r2, r8
 	str	r1, [sp, #4]
-	beq	.L2602
+	beq	.L2678
 	mla	r1, fp, r6, r0
 	orr	r2, r5, r2, lsl #10
 	str	r2, [r1, #4]
@@ -18613,36 +18964,36 @@ FtlRecoverySuperblock:
 	ldr	r2, [sp, #8]
 	add	r7, r7, r2
 	str	r7, [r1, #12]
-.L2602:
+.L2678:
 	adds	r3, r3, #1
-	b	.L2599
-.L2676:
+	b	.L2675
+.L2752:
 	movs	r3, #0
-	b	.L2752
-.L2610:
+	b	.L2828
+.L2686:
 	movs	r3, #36
 	ldr	r1, [r8]
 	muls	r3, r7, r3
 	adds	r2, r1, r3
 	ldr	r3, [r1, r3]
-	cbnz	r3, .L2606
+	cbnz	r3, .L2682
 	ldr	r2, [r2, #12]
 	ldr	r3, [r2, #4]
 	adds	r1, r3, #1
-	beq	.L2607
-	ldr	r1, .L2760+28
+	beq	.L2683
+	ldr	r1, .L2836+28
 	mov	r0, r3
 	ldr	r1, [r1]
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L2607
-	ldr	r1, .L2760+28
+	cbz	r0, .L2683
+	ldr	r1, .L2836+28
 	adds	r3, r3, #1
 	str	r3, [r1]
-.L2607:
+.L2683:
 	ldr	r3, [r2]
 	adds	r3, r3, #1
-	bne	.L2609
-.L2608:
+	bne	.L2685
+.L2684:
 	uxth	r3, r4
 	uxth	r7, r7
 	str	r3, [sp, #8]
@@ -18650,26 +19001,26 @@ FtlRecoverySuperblock:
 	ldr	r3, [r8]
 	mla	r7, r2, r7, r3
 	ldr	r0, [r7, #4]
-	b	.L2753
-.L2606:
+	b	.L2829
+.L2682:
 	ldr	r1, [r2, #4]
 	uxth	fp, r5
-	ldr	r0, .L2760+48
+	ldr	r0, .L2836+48
 	bl	printf
 	ldrh	r2, [r10]
-	ldr	r3, .L2760+52
+	ldr	r3, .L2836+52
 	strh	r2, [r3]	@ movhi
-.L2609:
+.L2685:
 	adds	r7, r7, #1
-	b	.L2605
-.L2614:
+	b	.L2681
+.L2690:
 	movw	r2, #65535
 	cmp	fp, r2
-	bne	.L2615
+	bne	.L2691
 	cmp	r3, #0
-	bne	.L2616
-.L2615:
-	ldr	r3, .L2760+56
+	bne	.L2692
+.L2691:
+	ldr	r3, .L2836+56
 	uxth	fp, r5
 	uxth	r5, r5
 	mov	r7, #-1
@@ -18688,63 +19039,63 @@ FtlRecoverySuperblock:
 	subgt	r4, fp, #7
 	ldrle	r4, [sp, #12]
 	uxthgt	r4, r4
-.L2619:
+.L2695:
 	cmp	r4, fp
-	bhi	.L2634
-	ldr	r3, .L2760+12
+	bhi	.L2710
+	ldr	r3, .L2836+12
 	movw	lr, #65535
 	mov	ip, #36
 	ldrh	r8, [r3]
-	ldr	r3, .L2760+16
+	ldr	r3, .L2836+16
 	ldr	r0, [r3]
 	ldr	r3, [sp, #20]
 	str	r3, [sp, #32]
 	movs	r3, #0
 	mov	r5, r3
-	b	.L2635
-.L2621:
+	b	.L2711
+.L2697:
 	ldr	r1, [sp, #32]
 	ldrh	r2, [r1], #2
 	cmp	r2, lr
 	str	r1, [sp, #32]
-	beq	.L2620
+	beq	.L2696
 	mla	r1, ip, r5, r0
 	adds	r5, r5, #1
 	orr	r2, r4, r2, lsl #10
 	uxth	r5, r5
 	str	r2, [r1, #4]
-.L2620:
+.L2696:
 	adds	r3, r3, #1
-.L2635:
+.L2711:
 	uxth	r2, r3
 	cmp	r8, r2
-	bhi	.L2621
+	bhi	.L2697
 	mov	r1, r5
 	ldr	r2, [sp, #36]
 	bl	FlashReadPages
-	ldr	r2, .L2760+4
+	ldr	r2, .L2836+4
 	movs	r1, #36
-	ldr	r3, .L2760+56
+	ldr	r3, .L2836+56
 	movs	r0, #0
 	movw	ip, #65535
 	ldrb	lr, [r2]	@ zero_extendqisi2
-	ldr	r2, .L2760+16
+	ldr	r2, .L2836+16
 	ldr	r3, [r3]
 	ldr	r2, [r2]
 	mla	r5, r1, r5, r2
-.L2622:
+.L2698:
 	cmp	r5, r2
-	bne	.L2632
-	cbz	r0, .L2633
-	ldr	r2, .L2760+56
+	bne	.L2708
+	cbz	r0, .L2709
+	ldr	r2, .L2836+56
 	str	r3, [r2]
-.L2633:
+.L2709:
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L2619
-.L2761:
+	b	.L2695
+.L2837:
 	.align	2
-.L2760:
+.L2836:
 	.word	.LANCHOR52
 	.word	.LANCHOR15
 	.word	.LANCHOR16
@@ -18753,128 +19104,128 @@ FtlRecoverySuperblock:
 	.word	.LANCHOR105
 	.word	.LANCHOR58
 	.word	.LANCHOR160
-	.word	.LANCHOR233
+	.word	.LANCHOR236
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC60
-	.word	.LANCHOR234
+	.word	.LC65
+	.word	.LANCHOR237
 	.word	.LANCHOR136
-.L2632:
+.L2708:
 	ldr	r1, [r2]
-	cbnz	r1, .L2623
+	cbnz	r1, .L2699
 	ldr	r1, [r2, #12]
 	ldrh	r8, [r1]
 	cmp	r8, ip
-	beq	.L2679
+	beq	.L2755
 	ldr	r1, [r1, #4]
 	cmp	r1, #-1
-	beq	.L2679
+	beq	.L2755
 	adds	r0, r7, #1
-	bne	.L2681
-	ldr	r0, .L2762
+	bne	.L2757
+	ldr	r0, .L2838
 	ldrh	r0, [r0, r4, lsl #1]
 	cmp	r0, ip
-	bne	.L2625
+	bne	.L2701
 	cmp	lr, #0
-	beq	.L2681
-.L2625:
+	beq	.L2757
+.L2701:
 	ldr	r0, [sp, #4]
 	cmp	r0, r3
 	it	ne
 	movne	r7, r3
-.L2681:
+.L2757:
 	movs	r0, #1
-	b	.L2624
-.L2623:
-	cbz	r0, .L2626
-	ldr	r2, .L2762+4
+	b	.L2700
+.L2699:
+	cbz	r0, .L2702
+	ldr	r2, .L2838+4
 	str	r3, [r2]
-.L2626:
-	ldr	r3, .L2762+8
+.L2702:
+	ldr	r3, .L2838+8
 	ldrh	r2, [r10]
 	strh	r2, [r3]	@ movhi
 	ldrb	r3, [r10, #8]	@ zero_extendqisi2
-	cbnz	r3, .L2616
-	ldr	r3, .L2762
+	cbnz	r3, .L2692
+	ldr	r3, .L2838
 	ldrh	r2, [r3, r4, lsl #1]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L2628
+	bne	.L2704
 	adds	r1, r7, #1
-	ldr	r3, .L2762+4
-	beq	.L2629
+	ldr	r3, .L2838+4
+	beq	.L2705
 	str	r7, [r3]
-.L2616:
+.L2692:
 	ldr	fp, [sp, #12]
 	movs	r2, #1
-	ldr	r6, .L2762+12
-	ldr	r3, .L2762+16
+	ldr	r6, .L2838+12
+	ldr	r3, .L2838+16
 	strh	r2, [r3]	@ movhi
-.L2636:
-	ldr	r3, .L2762+20
+.L2712:
+	ldr	r3, .L2838+20
 	movw	ip, #65535
 	ldr	r0, [r6]
 	mov	lr, #36
 	ldr	r1, [sp, #20]
 	movs	r2, #0
 	ldrh	r5, [r3]
-	ldr	r3, .L2762+24
+	ldr	r3, .L2838+24
 	str	r2, [sp, #24]
 	ldrb	r7, [r3]	@ zero_extendqisi2
-.L2637:
+.L2713:
 	uxth	r3, r2
 	cmp	r3, r5
-	bcc	.L2640
+	bcc	.L2716
 	ldr	r2, [sp, #36]
 	ldr	r1, [sp, #24]
 	bl	FlashReadPages
 	movs	r3, #0
-.L2757:
+.L2833:
 	str	r3, [sp, #32]
 	ldr	r2, [sp, #24]
 	ldrh	r3, [sp, #32]
 	cmp	r2, r3
-	bhi	.L2669
+	bhi	.L2745
 	ldrb	r3, [r10, #8]	@ zero_extendqisi2
 	add	fp, fp, #1
 	uxth	fp, fp
 	cmp	r3, #1
-	bne	.L2670
-	ldr	r3, .L2762+24
+	bne	.L2746
+	ldr	r3, .L2838+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2670
-	ldr	r3, .L2762+28
+	cbz	r3, .L2746
+	ldr	r3, .L2838+28
 	ldrh	r3, [r3]
 	cmp	r3, fp
-	bne	.L2670
+	bne	.L2746
 	ldr	r3, [sp, #8]
 	cmp	r3, fp
-	beq	.L2645
-.L2670:
-	ldr	r3, .L2762+32
+	beq	.L2721
+.L2746:
+	ldr	r3, .L2838+32
 	ldrh	r3, [r3]
 	cmp	r3, fp
-	bne	.L2636
-	ldr	r2, .L2762+20
+	bne	.L2712
+	ldr	r2, .L2838+20
 	movw	r0, #65535
 	movs	r3, #0
 	strh	fp, [r10, #2]	@ movhi
 	strh	r3, [r10, #4]	@ movhi
 	ldrh	r2, [r2]
-.L2671:
+.L2747:
 	uxth	r1, r3
 	cmp	r1, r2
-	bcs	.L2751
+	bcs	.L2827
 	ldr	r1, [sp, #20]
 	ldrh	r4, [r1], #2
 	cmp	r4, r0
 	str	r1, [sp, #20]
 	add	r1, r3, #1
-	bne	.L2758
+	bne	.L2834
 	mov	r3, r1
-	b	.L2671
-.L2629:
+	b	.L2747
+.L2705:
 	ldr	r2, [sp, #4]
 	ldr	r1, [sp, #24]
 	cmp	r2, r1
@@ -18882,62 +19233,62 @@ FtlRecoverySuperblock:
 	ldreq	r2, [r3]
 	movne	r2, r1
 	addeq	r2, r2, #-1
-.L2754:
+.L2830:
 	str	r2, [r3]
-	b	.L2616
-.L2628:
+	b	.L2692
+.L2704:
 	ldr	r3, [sp, #4]
 	cmp	r6, r3
-	beq	.L2631
+	beq	.L2707
 	adds	r2, r6, #1
-	beq	.L2616
-	ldr	r3, .L2762+4
+	beq	.L2692
+	ldr	r3, .L2838+4
 	str	r6, [r3]
-	b	.L2616
-.L2631:
-	ldr	r2, .L2762+4
+	b	.L2692
+.L2707:
+	ldr	r2, .L2838+4
 	ldr	r1, [sp, #4]
 	ldr	r3, [r2]
 	cmp	r1, r3
-	beq	.L2616
+	beq	.L2692
 	subs	r3, r3, #1
 	str	r3, [r2]
-	b	.L2616
-.L2679:
+	b	.L2692
+.L2755:
 	mov	r1, r3
 	mov	r3, r6
-.L2624:
+.L2700:
 	mov	r6, r3
 	adds	r2, r2, #36
 	mov	r3, r1
-	b	.L2622
-.L2634:
+	b	.L2698
+.L2710:
 	mov	r2, #-1
-	ldr	r3, .L2762+4
-	b	.L2754
-.L2640:
+	ldr	r3, .L2838+4
+	b	.L2830
+.L2716:
 	ldrh	r3, [r1], #2
 	cmp	r3, ip
-	beq	.L2638
+	beq	.L2714
 	ldr	r4, [sp, #24]
 	orr	r3, fp, r3, lsl #10
 	mla	r4, lr, r4, r0
 	str	r3, [r4, #4]
 	ldrb	r8, [r10, #8]	@ zero_extendqisi2
 	cmp	r8, #1
-	bne	.L2639
-	cbz	r7, .L2639
+	bne	.L2715
+	cbz	r7, .L2715
 	orr	r3, r3, #-2147483648
 	str	r3, [r4, #4]
-.L2639:
+.L2715:
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	str	r3, [sp, #24]
-.L2638:
+.L2714:
 	adds	r2, r2, #1
-	b	.L2637
-.L2669:
+	b	.L2713
+.L2745:
 	ldr	r3, [sp, #32]
 	movs	r5, #36
 	ldr	r8, [r6]
@@ -18949,45 +19300,45 @@ FtlRecoverySuperblock:
 	bl	P2V_plane
 	ldr	r3, [sp, #12]
 	cmp	fp, r3
-	bcc	.L2642
-	bne	.L2643
+	bcc	.L2718
+	bne	.L2719
 	ldr	r3, [sp, #28]
 	cmp	r3, r0
-	bhi	.L2642
-.L2643:
+	bhi	.L2718
+.L2719:
 	ldr	r3, [sp, #8]
 	cmp	fp, r3
-	bne	.L2644
+	bne	.L2720
 	ldr	r3, [sp, #16]
 	cmp	r3, r0
-	beq	.L2645
-.L2644:
+	beq	.L2721
+.L2720:
 	ldr	r3, [r8, r5]
 	adds	r3, r3, #1
-	beq	.L2646
+	beq	.L2722
 	ldr	r3, [r7, #12]
 	movw	r2, #61589
 	ldrh	r1, [r3]
 	cmp	r1, r2
-	beq	.L2647
+	beq	.L2723
 	ldrh	r0, [r10]
-.L2755:
+.L2831:
 	bl	decrement_vpc_count
-	b	.L2642
-.L2647:
+	b	.L2718
+.L2723:
 	ldr	r2, [r3, #4]
 	str	r2, [sp, #4]
 	adds	r2, r2, #1
-	beq	.L2648
-	ldr	r2, .L2762+36
+	beq	.L2724
+	ldr	r2, .L2838+36
 	ldr	r0, [sp, #4]
 	ldr	r1, [r2]
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L2648
+	cbz	r0, .L2724
 	ldr	r1, [sp, #4]
 	adds	r1, r1, #1
 	str	r1, [r2]
-.L2648:
+.L2724:
 	ldr	r4, [r3, #8]
 	add	r1, sp, #48
 	ldr	r3, [r3, #12]
@@ -18995,17 +19346,17 @@ FtlRecoverySuperblock:
 	mov	r0, r4
 	str	r3, [sp, #44]
 	bl	log2phys
-	ldr	r3, .L2762+4
+	ldr	r3, .L2838+4
 	ldr	r1, [r3]
 	adds	r3, r1, #1
-	beq	.L2649
+	beq	.L2725
 	ldr	r0, [sp, #4]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L2649
+	beq	.L2725
 	ldr	r3, [sp, #44]
 	adds	r7, r3, #1
-	beq	.L2650
+	beq	.L2726
 	ldr	r0, [r6]
 	movs	r2, #0
 	movs	r1, #1
@@ -19017,160 +19368,160 @@ FtlRecoverySuperblock:
 	ldr	r1, [r2, r5]
 	adds	r3, r2, r5
 	adds	r1, r1, #1
-	bne	.L2651
-.L2652:
+	bne	.L2727
+.L2728:
 	mov	r3, #-1
 	str	r3, [sp, #44]
-.L2659:
+.L2735:
 	ldr	r7, [sp, #44]
 	adds	r0, r7, #1
-	beq	.L2642
-.L2674:
+	beq	.L2718
+.L2750:
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L2762+40
+	ldr	r3, .L2838+40
 	mov	r4, r0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bhi	.L2665
-	ldr	r1, .L2762+44
-	movw	r2, #2456
-	ldr	r0, .L2762+48
+	bhi	.L2741
+	ldr	r1, .L2838+44
+	movw	r2, #2458
+	ldr	r0, .L2838+48
 	bl	printf
-	ldr	r1, .L2762+52
-	ldr	r0, .L2762+56
+	ldr	r1, .L2838+52
+	ldr	r0, .L2838+56
 	bl	printf
-.L2665:
-	ldr	r3, .L2762+60
+.L2741:
+	ldr	r3, .L2838+60
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
 	cmp	r3, #0
-	beq	.L2666
+	beq	.L2742
 	mov	r0, r4
-	b	.L2755
-.L2650:
+	b	.L2831
+.L2726:
 	ldr	r3, [sp, #52]
 	ldr	r2, [sp, #48]
 	cmp	r2, r3
-	bne	.L2642
+	bne	.L2718
 	movs	r2, #1
 	add	r1, sp, #44
 	mov	r0, r4
 	bl	log2phys
-.L2642:
+.L2718:
 	ldr	r3, [sp, #32]
 	adds	r3, r3, #1
-	b	.L2757
-.L2651:
+	b	.L2833
+.L2727:
 	ldr	r1, [r7, #8]
 	cmp	r4, r1
-	bne	.L2652
+	bne	.L2728
 	ldr	r8, [r7, #4]
-	ldr	r0, .L2762+4
+	ldr	r0, .L2838+4
 	mov	r1, r8
 	ldr	r0, [r0]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L2652
+	beq	.L2728
 	ldr	r1, [sp, #48]
 	ldr	r0, [sp, #52]
 	cmp	r1, r0
-	bne	.L2654
-.L2657:
+	bne	.L2730
+.L2733:
 	ldr	r1, [sp, #44]
 	mov	r0, r4
 	bl	FtlReUsePrevPpa
-	b	.L2652
-.L2763:
+	b	.L2728
+.L2839:
 	.align	2
-.L2762:
+.L2838:
 	.word	.LANCHOR120
 	.word	.LANCHOR136
-	.word	.LANCHOR234
+	.word	.LANCHOR237
 	.word	.LANCHOR180
-	.word	.LANCHOR235
+	.word	.LANCHOR238
 	.word	.LANCHOR38
 	.word	.LANCHOR15
 	.word	.LANCHOR53
 	.word	.LANCHOR52
 	.word	.LANCHOR160
 	.word	.LANCHOR40
-	.word	.LANCHOR233
+	.word	.LANCHOR236
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
 	.word	.LANCHOR83
-.L2654:
+.L2730:
 	ldr	r0, [sp, #44]
 	cmp	r1, r0
-	beq	.L2652
+	beq	.L2728
 	adds	r0, r1, #1
-	beq	.L2655
+	beq	.L2731
 	str	r1, [r3, #4]
 	movs	r2, #0
 	movs	r1, #1
 	mov	r0, r3
 	ldr	r7, [r3, #12]
 	bl	FlashReadPages
-.L2656:
+.L2732:
 	ldr	r3, [r6]
 	ldr	r3, [r3, r5]
 	adds	r3, r3, #1
-	beq	.L2657
+	beq	.L2733
 	ldr	r3, [r7, #4]
-	ldr	r2, .L2764
+	ldr	r2, .L2840
 	mov	r1, r3
 	ldr	r0, [r2]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L2657
+	beq	.L2733
 	mov	r1, r3
 	mov	r0, r8
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L2652
-	b	.L2657
-.L2655:
+	beq	.L2728
+	b	.L2733
+.L2731:
 	str	r1, [r2, r5]
-	b	.L2656
-.L2649:
+	b	.L2732
+.L2725:
 	ldr	r3, [sp, #52]
 	ldr	r2, [sp, #48]
 	cmp	r2, r3
-	beq	.L2659
-	ldr	r2, .L2764+4
+	beq	.L2735
+	ldr	r2, .L2840+4
 	ldr	r3, [sp, #44]
 	ldr	r2, [r2]
 	cmp	r2, r3, lsr #10
-	bhi	.L2661
+	bhi	.L2737
 	adds	r3, r3, #1
-	bne	.L2642
-.L2661:
+	bne	.L2718
+.L2737:
 	movs	r2, #1
 	add	r1, sp, #52
 	mov	r0, r4
 	bl	log2phys
 	ldr	r7, [sp, #48]
 	adds	r5, r7, #1
-	beq	.L2659
+	beq	.L2735
 	ldr	r3, [sp, #44]
 	cmp	r7, r3
-	beq	.L2674
+	beq	.L2750
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L2764+8
+	ldr	r3, .L2840+8
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L2664
-	ldr	r3, .L2764+12
+	beq	.L2740
+	ldr	r3, .L2840+12
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L2664
-	ldr	r3, .L2764+16
+	beq	.L2740
+	ldr	r3, .L2840+16
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L2659
-.L2664:
+	bne	.L2735
+.L2740:
 	ldr	r0, [r6]
 	movs	r2, #0
 	movs	r1, #1
@@ -19180,76 +19531,76 @@ FtlRecoverySuperblock:
 	ldr	r3, [r6]
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L2659
+	beq	.L2735
 	ldr	r1, [r5, #4]
 	ldr	r0, [sp, #4]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	bne	.L2659
+	bne	.L2735
 	movs	r2, #1
 	add	r1, sp, #48
 	mov	r0, r4
 	bl	log2phys
-	b	.L2659
-.L2666:
+	b	.L2735
+.L2742:
 	mov	r1, r4
-	ldr	r0, .L2764+20
+	ldr	r0, .L2840+20
 	bl	printf
-	b	.L2642
-.L2646:
+	b	.L2718
+.L2722:
 	ldrh	r3, [r10]
 	mov	r1, r4
-	ldr	r2, .L2764+24
-	ldr	r0, .L2764+28
+	ldr	r2, .L2840+24
+	ldr	r0, .L2840+28
 	strh	r3, [r2]	@ movhi
 	ldr	r2, [sp, #4]
 	bl	printf
-	ldr	r2, .L2764+32
+	ldr	r2, .L2840+32
 	ldr	r3, [r2]
 	cmp	r3, #31
-	bhi	.L2667
+	bhi	.L2743
 	ldr	r0, [sp, #52]
-	ldr	r1, .L2764+36
+	ldr	r1, .L2840+36
 	str	r0, [r1, r3, lsl #2]
 	adds	r3, r3, #1
 	str	r3, [r2]
-.L2667:
+.L2743:
 	ldrh	r0, [r10]
 	bl	decrement_vpc_count
-	ldr	r3, .L2764
+	ldr	r3, .L2840
 	ldr	r2, [r3]
 	adds	r1, r2, #1
-	bne	.L2668
+	bne	.L2744
 	ldr	r2, [sp, #4]
-.L2756:
+.L2832:
 	str	r2, [r3]
-	b	.L2642
-.L2668:
+	b	.L2718
+.L2744:
 	ldr	r1, [sp, #4]
 	cmp	r1, r2
-	bcs	.L2642
+	bcs	.L2718
 	mov	r2, r1
-	b	.L2756
-.L2645:
+	b	.L2832
+.L2721:
 	ldrb	r3, [sp, #16]	@ zero_extendqisi2
 	ldr	r2, [sp, #16]
 	strb	r3, [r10, #6]
 	ldrh	r3, [sp, #8]
 	strh	r3, [r10, #2]	@ movhi
-	b	.L2759
-.L2765:
+	b	.L2835
+.L2841:
 	.align	2
-.L2764:
+.L2840:
 	.word	.LANCHOR136
 	.word	.LANCHOR43
 	.word	.LANCHOR91
 	.word	.LANCHOR92
 	.word	.LANCHOR93
-	.word	.LC61
-	.word	.LANCHOR234
-	.word	.LC62
-	.word	.LANCHOR236
+	.word	.LC66
 	.word	.LANCHOR237
+	.word	.LC67
+	.word	.LANCHOR239
+	.word	.LANCHOR240
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
 	.section	.text.FtlGcScanTempBlk,"ax",%progbits
 	.align	1
@@ -19262,77 +19613,77 @@ FtlRecoverySuperblock:
 FtlGcScanTempBlk:
 	@ args = 0, pretend = 0, frame = 64
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2804
+	ldr	r3, .L2881
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	sub	sp, sp, #64
 	ldrh	r5, [r3]
 	movw	r3, #65535
 	cmp	r5, r3
-	beq	.L2792
-	cbnz	r5, .L2767
-.L2768:
+	beq	.L2868
+	cbnz	r5, .L2843
+.L2844:
 	bl	FtlGcPageVarInit
-	b	.L2769
-.L2792:
+	b	.L2845
+.L2868:
 	movs	r5, #0
-.L2767:
-	ldr	r3, .L2804+4
+.L2843:
+	ldr	r3, .L2881+4
 	ldrh	r3, [r3]
 	cmp	r3, r1
-	beq	.L2768
-.L2769:
-	ldr	r8, .L2804+72
+	beq	.L2844
+.L2845:
+	ldr	r8, .L2881+76
 	mov	r3, #-1
 	str	r3, [sp, #8]
-.L2770:
+.L2846:
 	ldrh	r2, [r4]
 	movs	r3, #0
 	strb	r3, [r4, #8]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2771
-.L2791:
-	ldr	r3, .L2804+8
+	beq	.L2847
+.L2867:
+	ldr	r3, .L2881+8
 	movs	r2, #0
 	ldr	r0, [r8]
 	mov	fp, r2
 	movw	ip, #65535
 	mov	lr, #36
 	ldrh	r10, [r3]
-	ldr	r3, .L2804+12
+	ldr	r3, .L2881+12
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L2804+16
+	ldr	r3, .L2881+16
 	ldrh	r3, [r3]
 	str	r3, [sp, #16]
-	ldr	r3, .L2804+20
+	ldr	r3, .L2881+20
 	ldr	r3, [r3]
 	str	r3, [sp, #20]
-	ldr	r3, .L2804+24
+	ldr	r3, .L2881+24
 	ldrh	r7, [r3]
 	add	r3, r4, #16
 	str	r3, [sp, #4]
-.L2772:
+.L2848:
 	uxth	r3, r2
 	cmp	r10, r3
-	bhi	.L2774
+	bhi	.L2850
 	mov	r10, #0
 	movs	r2, #0
 	mov	r1, fp
 	bl	FlashReadPages
-.L2775:
+.L2851:
 	uxth	r3, r10
 	cmp	fp, r3
-	bhi	.L2790
-	ldr	r3, .L2804+4
+	bhi	.L2866
+	ldr	r3, .L2881+4
 	adds	r5, r5, #1
 	uxth	r5, r5
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	bhi	.L2791
-.L2771:
-	ldr	r3, .L2804
+	bhi	.L2867
+.L2847:
+	ldr	r3, .L2881
 	movw	r2, #65535
 	mov	r0, r4
 	strh	r5, [r4, #2]	@ movhi
@@ -19345,12 +19696,12 @@ FtlGcScanTempBlk:
 	add	sp, sp, #64
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2774:
+.L2850:
 	ldr	r1, [sp, #4]
 	ldrh	r3, [r1], #2
 	cmp	r3, ip
 	str	r1, [sp, #4]
-	beq	.L2773
+	beq	.L2849
 	mla	r1, lr, fp, r0
 	ldr	r6, [sp, #12]
 	orr	r3, r5, r3, lsl #10
@@ -19367,55 +19718,57 @@ FtlGcScanTempBlk:
 	str	r3, [r1, #12]
 	add	r3, fp, #1
 	uxth	fp, r3
-.L2773:
+.L2849:
 	adds	r2, r2, #1
-	b	.L2772
-.L2790:
+	b	.L2848
+.L2866:
 	movs	r7, #36
 	ldr	r2, [r8]
 	mul	r7, r7, r10
 	adds	r3, r2, r7
 	ldr	r6, [r2, r7]
 	ldr	r1, [r3, #4]
+	ldr	r3, [r3, #12]
 	str	r1, [sp, #4]
 	cmp	r6, #0
-	bne	.L2776
-	ldr	r3, [r3, #12]
-	movw	r2, #65535
+	bne	.L2852
 	ldrh	r1, [r3]
+	movw	r2, #65535
 	cmp	r1, r2
-	beq	.L2803
-	ldr	r2, .L2804+28
+	beq	.L2880
+	ldr	r2, .L2881+28
 	ldr	r0, [r3, #8]
 	ldr	r2, [r2]
 	cmp	r0, r2
-	bls	.L2778
-.L2803:
-	ldrh	r2, [r4]
-.L2789:
-	ldr	r3, .L2804+32
+	bls	.L2854
+.L2880:
+	ldr	r3, .L2881+32
 	movs	r1, #0
-	movs	r5, #0
+	ldrh	r2, [r4]
 	ldr	r3, [r3]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
 	ldrh	r0, [r4]
 	bl	INSERT_FREE_LIST
+	ldr	r2, .L2881+36
 	movw	r3, #65535
 	strh	r3, [r4]	@ movhi
+	strh	r3, [r2]	@ movhi
+.L2879:
 	bl	FtlGcPageVarInit
-	b	.L2770
-.L2778:
-	ldr	r2, .L2804+36
+	movs	r5, #0
+	b	.L2846
+.L2854:
+	ldr	r2, .L2881+40
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbnz	r2, .L2780
-.L2781:
+	cbnz	r2, .L2856
+.L2857:
 	ldr	r2, [r3, #8]
 	add	r10, r10, #1
 	ldr	r1, [sp, #4]
 	ldr	r0, [r3, #12]
 	bl	FtlGcUpdatePage
-	b	.L2775
-.L2780:
+	b	.L2851
+.L2856:
 	mov	r2, r6
 	add	r1, sp, #24
 	str	r3, [sp, #12]
@@ -19424,76 +19777,85 @@ FtlGcScanTempBlk:
 	ldr	r1, [sp, #24]
 	ldr	r2, [r3, #12]
 	cmp	r2, r1
-	bne	.L2781
+	bne	.L2857
 	adds	r1, r2, #1
-	beq	.L2781
+	beq	.L2857
 	str	r2, [sp, #32]
 	movs	r1, #1
-	ldr	r2, .L2804+40
+	ldr	r2, .L2881+44
 	add	r0, sp, #28
 	ldr	r2, [r2]
 	str	r2, [sp, #36]
-	ldr	r2, .L2804+44
+	ldr	r2, .L2881+48
 	ldr	r2, [r2]
 	str	r2, [sp, #40]
 	mov	r2, r6
 	bl	FlashReadPages
-	ldr	r2, .L2804+48
+	ldr	r2, .L2881+52
 	ldr	r1, [r8]
 	ldr	r0, [sp, #36]
 	ldrh	r2, [r2]
 	ldr	r3, [sp, #12]
 	add	r7, r7, r1
 	lsl	ip, r2, #7
-.L2782:
+.L2858:
 	cmp	r6, ip
-	beq	.L2781
+	beq	.L2857
 	ldr	r1, [r7, #8]
 	ldr	r2, [r0, r6, lsl #2]
 	ldr	r1, [r1, r6, lsl #2]
 	cmp	r1, r2
-	beq	.L2783
+	beq	.L2859
 	ldr	r2, [sp, #32]
 	ldrh	r1, [r4]
-	ldr	r0, .L2804+52
+	ldr	r0, .L2881+56
 	bl	printf
-	b	.L2803
-.L2783:
+	b	.L2880
+.L2859:
 	adds	r6, r6, #1
-	b	.L2782
-.L2776:
+	b	.L2858
+.L2852:
 	ldr	r2, [sp, #4]
 	ldrh	r1, [r4]
-	ldr	r0, .L2804+56
+	ldr	r0, .L2881+60
 	bl	printf
-	ldr	r3, .L2804+60
+	ldr	r3, .L2881+64
 	ldrh	r2, [r4]
 	ldr	r3, [r3]
-	cbnz	r3, .L2786
-	ldr	r3, .L2804+64
+	cbnz	r3, .L2862
+	ldr	r3, .L2881+68
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2787
-.L2786:
-	ldr	r3, .L2804+68
+	cbz	r3, .L2863
+.L2862:
+	ldr	r3, .L2881+72
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r2, lsl #1]
 	cmp	r3, #159
-	bls	.L2788
-.L2787:
+	bls	.L2864
+.L2863:
 	ldr	r3, [r8]
 	ldr	r3, [r3, r7]
 	adds	r3, r3, #1
-	bne	.L2789
-.L2788:
+	bne	.L2865
+.L2864:
 	ldr	r3, [r8]
 	add	r7, r7, r3
 	ldr	r3, [r7, #4]
 	str	r3, [sp, #8]
-	b	.L2789
-.L2805:
+.L2865:
+	ldr	r3, .L2881+32
+	movs	r1, #0
+	ldr	r3, [r3]
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	ldrh	r0, [r4]
+	bl	INSERT_FREE_LIST
+	movw	r3, #65535
+	strh	r3, [r4]	@ movhi
+	b	.L2879
+.L2882:
 	.align	2
-.L2804:
-	.word	.LANCHOR238
+.L2881:
+	.word	.LANCHOR241
 	.word	.LANCHOR52
 	.word	.LANCHOR38
 	.word	.LANCHOR104
@@ -19502,12 +19864,13 @@ FtlGcScanTempBlk:
 	.word	.LANCHOR58
 	.word	.LANCHOR72
 	.word	.LANCHOR83
-	.word	.LANCHOR1
+	.word	.LANCHOR205
+	.word	.LANCHOR2
 	.word	.LANCHOR187
 	.word	.LANCHOR189
 	.word	.LANCHOR55
-	.word	.LC63
-	.word	.LC64
+	.word	.LC68
+	.word	.LC69
 	.word	.LANCHOR28
 	.word	.LANCHOR15
 	.word	.LANCHOR78
@@ -19525,42 +19888,42 @@ FtlGcFreeTempBlock:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L2829
+	ldr	r3, .L2907
 	ldr	r3, [r3]
-	cbz	r3, .L2807
-.L2812:
+	cbz	r3, .L2884
+.L2889:
 	movs	r0, #0
-.L2806:
+.L2883:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2807:
-	ldr	r0, .L2829+4
+.L2884:
+	ldr	r0, .L2907+4
 	movw	r3, #65535
-	ldr	r5, .L2829+8
+	ldr	r5, .L2907+8
 	ldrh	r6, [r0]
 	mov	r4, r0
 	cmp	r6, r3
-	beq	.L2809
-	ldr	r3, .L2829+12
+	beq	.L2886
+	ldr	r3, .L2907+12
 	ldrh	r1, [r3]
 	bl	FtlGcScanTempBlk
 	str	r0, [sp, #12]
 	adds	r0, r0, #1
-	beq	.L2809
-	ldr	r3, .L2829+16
+	beq	.L2886
+	ldr	r3, .L2907+16
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r6, lsl #1]
 	cmp	r3, #4
-	bls	.L2810
+	bls	.L2887
 	subs	r3, r3, #5
 	movs	r0, #1
 	strh	r3, [r2, r6, lsl #1]	@ movhi
 	bl	FtlEctTblFlush
-.L2810:
+.L2887:
 	ldr	r3, [r5]
-	cbnz	r3, .L2811
-	ldr	r2, .L2829+20
+	cbnz	r3, .L2888
+	ldr	r2, .L2907+20
 	ldr	r0, [sp, #12]
 	ldr	r3, [r2, #96]
 	ubfx	r0, r0, #10, #16
@@ -19568,73 +19931,72 @@ FtlGcFreeTempBlock:
 	str	r3, [r2, #96]
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
-.L2811:
+.L2888:
 	movs	r3, #0
 	movs	r0, #1
 	str	r3, [r5]
-	b	.L2806
-.L2809:
+	b	.L2883
+.L2886:
 	ldrh	r2, [r4]
 	movs	r3, #0
 	str	r3, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2812
-	ldr	r6, .L2829+12
+	beq	.L2889
+	ldr	r6, .L2907+12
 	bl	FtlCacheWriteBack
 	ldrb	r0, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r6]
-	ldr	r5, .L2829+24
+	ldr	r5, .L2907+24
 	muls	r2, r0, r2
 	ldrh	r1, [r5]
 	cmp	r1, r2
-	beq	.L2813
-	ldr	r1, .L2829+28
+	beq	.L2890
+	ldr	r1, .L2907+28
 	movs	r2, #163
-	ldr	r0, .L2829+32
+	ldr	r0, .L2907+32
 	bl	printf
-	ldr	r1, .L2829+36
-	ldr	r0, .L2829+40
+	ldr	r1, .L2907+36
+	ldr	r0, .L2907+40
 	bl	printf
-.L2813:
+.L2890:
 	ldrh	r6, [r6]
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	ldr	r2, .L2829+44
+	ldr	r2, .L2907+44
 	ldrh	r0, [r4]
-	ldr	fp, .L2829+84
+	ldr	fp, .L2907+84
 	smulbb	r3, r3, r6
 	ldr	r1, [r2]
 	movs	r6, #0
-	str	r2, [sp, #4]
+	mov	r10, r2
 	strh	r3, [r1, r0, lsl #1]	@ movhi
-	ldr	r1, .L2829+48
+	ldr	r1, .L2907+48
 	ldrh	r3, [r5]
 	ldr	r0, [r1]
 	add	r3, r3, r0
 	str	r3, [r1]
-.L2814:
+.L2891:
 	ldrh	r2, [r5]
 	uxth	r3, r6
 	cmp	r2, r3
-	bhi	.L2818
+	bhi	.L2895
 	movw	r0, #65535
 	bl	decrement_vpc_count
-	ldr	r3, .L2829+52
+	ldr	r3, .L2907+52
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2819
+	cbz	r3, .L2896
 	ldrh	r1, [r4]
-	ldr	r0, .L2829+56
+	ldr	r0, .L2907+56
 	bl	printf
-.L2819:
-	ldr	r3, [sp, #4]
+.L2896:
 	ldrh	r0, [r4]
-	ldr	r3, [r3]
+	ldr	r3, [r10]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	beq	.L2820
+	beq	.L2897
 	bl	INSERT_DATA_LIST
-.L2821:
-	ldr	r3, .L2829+60
+.L2898:
+	ldr	r3, .L2907+60
 	movw	r6, #65535
 	strh	r6, [r4]	@ movhi
 	movs	r4, #0
@@ -19642,72 +20004,68 @@ FtlGcFreeTempBlock:
 	strh	r4, [r3]	@ movhi
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	ldr	r3, .L2829+64
+	ldr	r3, .L2907+64
 	strh	r6, [r3]	@ movhi
-	ldr	r3, .L2829+68
+	ldr	r3, .L2907+68
 	ldrh	r2, [r3]
-	ldr	r3, .L2829+72
+	ldr	r3, .L2907+72
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, asr #2
-	ble	.L2812
-	ldr	r3, .L2829+76
+	ble	.L2889
+	ldr	r3, .L2907+76
 	movs	r2, #20
 	mov	r0, r4
 	strh	r2, [r3]	@ movhi
-	b	.L2806
-.L2818:
+	b	.L2883
+.L2895:
 	uxth	r3, r6
-	movs	r7, #12
+	mov	r8, #12
 	ldr	r2, [fp]
-	muls	r7, r3, r7
-	ldr	r3, .L2829+80
-	ldr	r8, [r3]
-	add	r10, r8, r7
-	ldr	r1, [r10, #8]
-	cmp	r1, r2
-	bcc	.L2815
-	ldr	r1, .L2829+28
-	movs	r2, #168
-	ldr	r0, .L2829+32
-	bl	printf
-	ldr	r1, .L2829+36
-	ldr	r0, .L2829+40
-	bl	printf
-.L2815:
+	mul	r8, r8, r3
+	ldr	r3, .L2907+80
+	ldr	r3, [r3]
+	add	r7, r3, r8
+	ldr	r0, [r7, #8]
+	cmp	r0, r2
+	bcc	.L2892
+.L2905:
+	ldrh	r0, [r4]
+	b	.L2906
+.L2892:
 	movs	r2, #0
 	add	r1, sp, #12
-	ldr	r0, [r10, #8]
+	str	r3, [sp, #4]
 	bl	log2phys
+	ldr	r3, [sp, #4]
 	ldr	r2, [sp, #12]
-	ldr	r0, [r8, r7]
+	ldr	r0, [r3, r8]
 	cmp	r0, r2
-	bne	.L2816
+	bne	.L2894
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	movs	r2, #1
-	mov	r7, r0
-	add	r1, r10, #4
-	ldr	r0, [r10, #8]
+	mov	r8, r0
+	adds	r1, r7, #4
+	ldr	r0, [r7, #8]
 	bl	log2phys
-	mov	r0, r7
-.L2828:
+	mov	r0, r8
+.L2906:
 	bl	decrement_vpc_count
-.L2817:
-	adds	r6, r6, #1
-	b	.L2814
-.L2816:
-	ldr	r3, [r10, #4]
+	b	.L2893
+.L2894:
+	ldr	r3, [r7, #4]
 	cmp	r2, r3
-	beq	.L2817
-	ldrh	r0, [r4]
-	b	.L2828
-.L2820:
+	bne	.L2905
+.L2893:
+	adds	r6, r6, #1
+	b	.L2891
+.L2897:
 	bl	INSERT_FREE_LIST
-	b	.L2821
-.L2830:
+	b	.L2898
+.L2908:
 	.align	2
-.L2829:
+.L2907:
 	.word	.LANCHOR76
 	.word	.LANCHOR93
 	.word	.LANCHOR135
@@ -19715,18 +20073,18 @@ FtlGcFreeTempBlock:
 	.word	.LANCHOR78
 	.word	.LANCHOR138
 	.word	.LANCHOR110
-	.word	.LANCHOR239
+	.word	.LANCHOR242
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
 	.word	.LANCHOR83
 	.word	.LANCHOR161
 	.word	.LANCHOR15
-	.word	.LC65
+	.word	.LC70
 	.word	.LANCHOR109
-	.word	.LANCHOR204
+	.word	.LANCHOR205
 	.word	.LANCHOR88
-	.word	.LANCHOR223
+	.word	.LANCHOR224
 	.word	.LANCHOR176
 	.word	.LANCHOR111
 	.word	.LANCHOR72
@@ -19744,35 +20102,35 @@ Ftl_get_new_temp_ppa:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movw	r3, #65535
-	ldr	r4, .L2834
+	ldr	r4, .L2912
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	beq	.L2832
+	beq	.L2910
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L2833
-.L2832:
+	cbnz	r3, .L2911
+.L2910:
 	bl	FtlCacheWriteBack
 	movs	r0, #0
 	movs	r5, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r0, .L2834
+	ldr	r0, .L2912
 	strb	r5, [r4, #8]
 	bl	allocate_data_superblock
-	ldr	r3, .L2834+4
+	ldr	r3, .L2912+4
 	strh	r5, [r3]	@ movhi
-	ldr	r3, .L2834+8
+	ldr	r3, .L2912+8
 	strh	r5, [r3]	@ movhi
 	bl	l2p_flush
 	mov	r0, r5
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L2833:
-	ldr	r0, .L2834
+.L2911:
+	ldr	r0, .L2912
 	pop	{r3, r4, r5, lr}
 	b	get_new_active_ppa
-.L2835:
+.L2913:
 	.align	2
-.L2834:
+.L2912:
 	.word	.LANCHOR93
 	.word	.LANCHOR109
 	.word	.LANCHOR110
@@ -19789,26 +20147,26 @@ Ftl_gc_temp_data_write_back:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
-	ldr	r3, .L2851
+	ldr	r3, .L2929
 	ldr	r3, [r3]
-	cbz	r3, .L2837
-.L2840:
+	cbz	r3, .L2915
+.L2918:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L2837:
-	ldr	r3, .L2851+4
-	ldr	r5, .L2851+8
+.L2915:
+	ldr	r3, .L2929+4
+	ldr	r5, .L2929+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2839
+	cbz	r3, .L2917
 	ldr	r3, [r5]
 	lsls	r2, r3, #31
-	bpl	.L2839
-	ldr	r3, .L2851+12
+	bpl	.L2917
+	ldr	r3, .L2929+12
 	ldrh	r3, [r3, #4]
 	cmp	r3, #0
-	bne	.L2840
-.L2839:
-	ldr	r4, .L2851+16
+	bne	.L2918
+.L2917:
+	ldr	r4, .L2929+16
 	movs	r3, #0
 	movs	r6, #0
 	movs	r7, #36
@@ -19816,38 +20174,39 @@ Ftl_gc_temp_data_write_back:
 	ldr	r1, [r5]
 	ldr	r0, [r4]
 	bl	FlashProgPages
-.L2841:
+.L2919:
 	ldr	r1, [r5]
 	uxth	r3, r6
 	cmp	r3, r1
-	bcc	.L2843
+	bcc	.L2921
 	ldr	r0, [r4]
 	bl	FtlGcBufFree
 	movs	r3, #0
 	str	r3, [r5]
-	ldr	r3, .L2851+12
+	ldr	r3, .L2929+12
 	ldrh	r3, [r3, #4]
 	cmp	r3, #0
-	bne	.L2840
+	bne	.L2918
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
-	b	.L2850
-.L2843:
+	b	.L2928
+.L2921:
 	muls	r3, r7, r3
 	ldr	r2, [r4]
 	adds	r6, r6, #1
 	adds	r1, r2, r3
 	ldr	r2, [r2, r3]
+	ldr	r0, [r1, #12]
 	adds	r3, r2, #1
-	bne	.L2842
-	ldr	r3, .L2851+12
+	bne	.L2920
+	ldr	r3, .L2929+12
 	movs	r5, #0
-	ldr	r0, .L2851+20
+	ldr	r0, .L2929+20
 	ldrh	r4, [r3]
 	ldr	r0, [r0]
 	strh	r5, [r0, r4, lsl #1]	@ movhi
 	strh	r2, [r3]	@ movhi
-	ldr	r2, .L2851+24
+	ldr	r2, .L2929+24
 	ldr	r0, [r1, #4]
 	ldr	r3, [r2, #96]
 	ubfx	r0, r0, #10, #16
@@ -19856,19 +20215,18 @@ Ftl_gc_temp_data_write_back:
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
 	bl	FtlGcPageVarInit
-.L2850:
+.L2928:
 	movs	r0, #1
 	pop	{r3, r4, r5, r6, r7, pc}
-.L2842:
-	ldr	r3, [r1, #12]
+.L2920:
+	ldr	r2, [r0, #8]
 	ldr	r1, [r1, #4]
-	ldr	r2, [r3, #8]
-	ldr	r0, [r3, #12]
+	ldr	r0, [r0, #12]
 	bl	FtlGcUpdatePage
-	b	.L2841
-.L2852:
+	b	.L2919
+.L2930:
 	.align	2
-.L2851:
+.L2929:
 	.word	.LANCHOR76
 	.word	.LANCHOR15
 	.word	.LANCHOR102
@@ -19889,27 +20247,27 @@ FtlGcPageRecovery:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	ldr	r4, .L2855
-	ldr	r5, .L2855+4
+	ldr	r4, .L2933
+	ldr	r5, .L2933+4
 	ldrh	r1, [r4]
 	mov	r0, r5
 	bl	FtlGcScanTempBlk
 	ldrh	r2, [r5, #2]
 	ldrh	r3, [r4]
 	cmp	r2, r3
-	bcc	.L2853
-	ldr	r0, .L2855+8
+	bcc	.L2931
+	ldr	r0, .L2933+8
 	bl	FtlMapBlkWriteDumpData
 	movs	r0, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r3, .L2855+12
+	ldr	r3, .L2933+12
 	movs	r2, #0
 	str	r2, [r3]
-.L2853:
+.L2931:
 	pop	{r3, r4, r5, pc}
-.L2856:
+.L2934:
 	.align	2
-.L2855:
+.L2933:
 	.word	.LANCHOR52
 	.word	.LANCHOR93
 	.word	.LANCHOR127
@@ -19928,13 +20286,13 @@ FtlPowerLostRecovery:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #0
-	ldr	r5, .L2858
-	ldr	r3, .L2858+4
+	ldr	r5, .L2936
+	ldr	r3, .L2936+4
 	mov	r0, r5
 	str	r4, [r3]
 	bl	FtlRecoverySuperblock
 	mov	r0, r5
-	ldr	r5, .L2858+8
+	ldr	r5, .L2936+8
 	bl	FtlSlcSuperblockCheck
 	mov	r0, r5
 	bl	FtlRecoverySuperblock
@@ -19945,11 +20303,11 @@ FtlPowerLostRecovery:
 	bl	decrement_vpc_count
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L2859:
+.L2937:
 	.align	2
-.L2858:
+.L2936:
 	.word	.LANCHOR91
-	.word	.LANCHOR236
+	.word	.LANCHOR239
 	.word	.LANCHOR92
 	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
 	.section	.text.FtlSysBlkInit,"ax",%progbits
@@ -19965,30 +20323,30 @@ FtlSysBlkInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r3, #0
-	ldr	r4, .L2869
+	ldr	r4, .L2951
 	movw	r5, #65535
 	strh	r3, [r4]	@ movhi
-	ldr	r3, .L2869+4
+	ldr	r3, .L2951+4
 	strh	r5, [r3]	@ movhi
-	ldr	r3, .L2869+8
+	ldr	r3, .L2951+8
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlScanSysBlk
-	ldr	r3, .L2869+12
+	ldr	r3, .L2951+12
 	ldrh	r3, [r3]
 	cmp	r3, r5
 	mov	r5, r4
-	bne	.L2861
-.L2863:
+	bne	.L2939
+.L2941:
 	mov	r4, #-1
-.L2860:
+.L2938:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, pc}
-.L2861:
+.L2939:
 	bl	FtlLoadSysInfo
 	mov	r4, r0
 	cmp	r0, #0
-	bne	.L2863
+	bne	.L2941
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -19998,34 +20356,42 @@ FtlSysBlkInit:
 	bl	FtlPowerLostRecovery
 	movs	r0, #1
 	bl	FtlUpdateVaildLpn
-	ldr	r3, .L2869+16
+	ldr	r3, .L2951+16
 	movs	r0, #12
-	ldrh	r2, [r3]
-	ldr	r3, .L2869+20
-	ldr	r1, [r3]
+	ldrh	r1, [r3]
+	ldr	r3, .L2951+20
+	ldr	r2, [r3]
 	mov	r3, r4
-.L2864:
-	cmp	r3, r2
-	blt	.L2866
-	ldrh	r3, [r5]
-	cmp	r3, #0
-	beq	.L2867
-.L2865:
-	ldr	r3, .L2869+24
+.L2942:
+	cmp	r3, r1
+	bge	.L2947
+	mla	r6, r0, r3, r2
+	ldr	r6, [r6, #4]
+	cmp	r6, #0
+	bge	.L2943
+.L2947:
+	ldr	r0, .L2951+24
+	cmp	r3, r1
+	ldr	r2, [r0]
+	add	r2, r2, #32
+	str	r2, [r0]
+	bge	.L2949
+.L2944:
+	ldr	r3, .L2951+28
 	ldr	r1, [r3]
-	ldr	r3, .L2869+28
+	ldr	r3, .L2951+32
 	ldrh	r0, [r3]
 	ldrh	r5, [r3, #4]
 	ldrh	r2, [r1, r0, lsl #1]
 	subs	r2, r2, r5
-	ldr	r5, .L2869+32
+	ldr	r5, .L2951+36
 	strh	r2, [r1, r0, lsl #1]	@ movhi
 	ldrh	r2, [r5]
 	strh	r2, [r3, #2]	@ movhi
 	movs	r2, #0
 	strh	r2, [r3, #4]	@ movhi
 	strb	r2, [r3, #6]
-	ldr	r3, .L2869+36
+	ldr	r3, .L2951+40
 	ldrh	r6, [r3]
 	ldrh	r7, [r3, #4]
 	ldrh	r0, [r1, r6, lsl #1]
@@ -20034,35 +20400,35 @@ FtlSysBlkInit:
 	strb	r2, [r3, #6]
 	ldrh	r1, [r5]
 	strh	r2, [r3, #4]	@ movhi
-	ldr	r2, .L2869+40
+	ldr	r2, .L2951+44
 	strh	r1, [r3, #2]	@ movhi
 	ldrh	r3, [r2, #30]
 	adds	r3, r3, #1
 	strh	r3, [r2, #30]	@ movhi
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L2868:
+.L2950:
 	bl	FtlVpcTblFlush
-	b	.L2860
-.L2866:
-	mla	r6, r0, r3, r1
-	ldr	r6, [r6, #4]
-	cmp	r6, #0
-	blt	.L2865
+	b	.L2938
+.L2943:
 	adds	r3, r3, #1
-	b	.L2864
-.L2867:
+	b	.L2942
+.L2949:
+	ldrh	r3, [r5]
+	cmp	r3, #0
+	bne	.L2944
 	bl	l2p_flush
-	b	.L2868
-.L2870:
+	b	.L2950
+.L2952:
 	.align	2
-.L2869:
-	.word	.LANCHOR235
-	.word	.LANCHOR234
+.L2951:
+	.word	.LANCHOR238
+	.word	.LANCHOR237
 	.word	.LANCHOR39
-	.word	.LANCHOR209
+	.word	.LANCHOR210
 	.word	.LANCHOR67
 	.word	.LANCHOR96
+	.word	.LANCHOR160
 	.word	.LANCHOR83
 	.word	.LANCHOR91
 	.word	.LANCHOR52
@@ -20080,87 +20446,87 @@ FtlSysBlkInit:
 FtlLowFormat:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2902
+	ldr	r3, .L2984
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #24
 	ldr	r4, [r3]
 	cmp	r4, #0
-	bne	.L2873
-	ldr	r5, .L2902+4
+	bne	.L2955
+	ldr	r5, .L2984+4
 	mov	r1, r4
-	ldr	r3, .L2902+8
-	ldr	r6, .L2902+12
+	ldr	r3, .L2984+8
+	ldr	r6, .L2984+12
 	ldrh	r2, [r5]
 	ldr	r0, [r3]
 	lsls	r2, r2, #2
 	bl	ftl_memset
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L2902+16
-	ldr	r5, .L2902+20
+	ldr	r3, .L2984+16
+	ldr	r5, .L2984+20
 	lsls	r2, r2, #2
 	ldr	r0, [r3]
 	bl	ftl_memset
-	ldr	r3, .L2902+24
+	ldr	r3, .L2984+24
 	ldrh	r0, [r6]
 	str	r4, [r5]
 	str	r4, [r3]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	r0, .L2874
+	cbz	r0, .L2956
 	bl	FtlMakeBbt
-.L2874:
-	ldr	r3, .L2902+28
-	ldr	r2, .L2902+32
-	ldr	ip, .L2902+112
+.L2956:
+	ldr	r3, .L2984+28
+	ldr	r2, .L2984+32
+	ldr	ip, .L2984+112
 	ldrh	r1, [r3]
 	ldr	r4, [r2]
-	ldr	r2, .L2902+36
+	ldr	r2, .L2984+36
 	str	r3, [sp, #12]
 	lsls	r1, r1, #7
 	ldr	r7, [r2]
 	movs	r2, #0
-.L2875:
+.L2957:
 	uxth	r3, r2
 	adds	r2, r2, #1
 	cmp	r3, r1
-	blt	.L2876
-	ldr	r3, .L2902+40
+	blt	.L2958
+	ldr	r3, .L2984+40
 	movs	r7, #0
-	ldr	fp, .L2902+116
+	ldr	fp, .L2984+116
 	ldrh	r4, [r3]
 	mov	r8, r3
 	mov	r10, fp
-.L2877:
+.L2959:
 	ldrh	r3, [fp]
 	cmp	r3, r4
-	bhi	.L2878
-	ldr	r4, .L2902+44
+	bhi	.L2960
+	ldr	r4, .L2984+44
 	subs	r3, r7, #2
 	ldrh	r1, [r4]
 	cmp	r3, r1, lsl #1
-	bgt	.L2879
-.L2883:
+	bgt	.L2961
+.L2965:
 	movs	r7, #0
 	mov	r6, r7
-.L2880:
+.L2962:
 	ldrh	r3, [r8]
 	uxth	r0, r7
 	adds	r7, r7, #1
 	cmp	r3, r0
-	bhi	.L2884
+	bhi	.L2966
 	ldrh	r2, [r10]
-	ldr	r3, .L2902+48
+	ldr	r3, .L2984+48
 	ldrh	r4, [r4]
-	ldr	r7, .L2902+52
+	ldr	r7, .L2984+52
 	str	r2, [r3]
-	ldr	r3, .L2902+56
+	ldr	r3, .L2984+56
 	mov	r1, r4
 	ldr	r3, [r3]
 	mov	r0, r3
 	str	r3, [sp, #16]
 	bl	__aeabi_uidiv
-	ldr	r1, .L2902+60
+	ldr	r1, .L2984+60
 	ubfx	r3, r0, #5, #16
 	add	r2, r3, #36
 	mov	fp, r0
@@ -20171,7 +20537,7 @@ FtlLowFormat:
 	str	r3, [sp, #4]
 	str	r1, [sp, #8]
 	cmp	r6, r2
-	ble	.L2885
+	ble	.L2967
 	ldr	r3, [sp, #16]
 	mov	r1, r4
 	subs	r0, r3, r6
@@ -20181,12 +20547,12 @@ FtlLowFormat:
 	lsrs	r0, r0, #5
 	adds	r0, r0, #24
 	strh	r0, [r3]	@ movhi
-.L2885:
-	ldr	r3, .L2902+64
+.L2967:
+	ldr	r3, .L2984+64
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L2886
-	ldr	r2, .L2902+60
+	bne	.L2968
+	ldr	r2, .L2984+60
 	mov	r1, r4
 	mov	r0, r6
 	ldrh	r3, [r2]
@@ -20198,11 +20564,11 @@ FtlLowFormat:
 	uxtah	r0, r3, r0
 	add	r3, r3, r0, asr #2
 	strh	r3, [r2]	@ movhi
-.L2886:
-	ldr	r3, .L2902+68
+.L2968:
+	ldr	r3, .L2984+68
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2887
-	ldr	r2, .L2902+60
+	cbz	r3, .L2969
+	ldr	r2, .L2984+60
 	mov	r1, r4
 	mov	r0, r6
 	ldrh	r3, [r2]
@@ -20214,55 +20580,55 @@ FtlLowFormat:
 	uxtah	r0, r3, r0
 	add	r3, r3, r0, asr #2
 	strh	r3, [r2]	@ movhi
-.L2887:
-	ldr	r3, .L2902+72
+.L2969:
+	ldr	r3, .L2984+72
 	ldrh	r3, [r3]
-	cbz	r3, .L2889
-	ldr	r2, .L2902+60
+	cbz	r3, .L2971
+	ldr	r2, .L2984+60
 	ldrh	r1, [r2]
 	add	r1, r1, r3, lsr #1
 	strh	r1, [r2]	@ movhi
 	mul	r1, r4, r3
 	cmp	r6, r1
-	bge	.L2889
+	bge	.L2971
 	ldr	r1, [sp, #4]
 	adds	r3, r3, #32
 	str	fp, [r7]
 	add	r1, r1, r3
 	strh	r1, [r2]	@ movhi
-.L2889:
+.L2971:
 	ldr	r3, [sp, #8]
-	ldr	r6, .L2902+76
+	ldr	r6, .L2984+76
 	ldrh	r2, [r3]
 	ldr	r3, [r7]
 	subs	r3, r3, r2
 	muls	r4, r3, r4
-	ldr	r3, .L2902+80
+	ldr	r3, .L2984+80
 	ldrh	r3, [r3]
 	str	r4, [r6]
 	muls	r4, r3, r4
 	ldr	r3, [sp, #12]
 	ldrh	r3, [r3]
 	str	r4, [r7]
-	ldr	r7, .L2902+84
+	ldr	r7, .L2984+84
 	muls	r4, r3, r4
-	ldr	r3, .L2902+88
+	ldr	r3, .L2984+88
 	str	r4, [r3]
 	movw	r4, #65535
 	bl	FtlBbmTblFlush
 	ldrh	r2, [r10]
 	movs	r1, #0
-	ldr	r10, .L2902+120
+	ldr	r10, .L2984+120
 	lsls	r2, r2, #1
 	ldr	r0, [r10]
 	bl	ftl_memset
-	ldr	r2, .L2902+92
+	ldr	r2, .L2984+92
 	movs	r3, #0
 	strh	r3, [r7, #2]	@ movhi
 	movs	r1, #255
 	strb	r3, [r7, #6]
 	str	r3, [r2]
-	ldr	r2, .L2902+96
+	ldr	r2, .L2984+96
 	strh	r3, [r7]	@ movhi
 	strh	r3, [r2, #2]	@ movhi
 	strb	r3, [r2, #6]
@@ -20273,30 +20639,30 @@ FtlLowFormat:
 	mov	r8, r10
 	strb	r3, [r7, #8]
 	mov	r10, r7
-	ldr	r3, .L2902+100
+	ldr	r3, .L2984+100
 	lsrs	r2, r2, #3
 	ldr	r0, [r3]
 	bl	ftl_memset
-.L2891:
+.L2973:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r7, #7]	@ zero_extendqisi2
 	ldrh	r2, [r7]
 	cmp	r3, #0
-	bne	.L2892
+	bne	.L2974
 	ldr	r3, [r8]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r7]
 	adds	r3, r3, #1
 	strh	r3, [r7]	@ movhi
-	b	.L2891
-.L2876:
+	b	.L2973
+.L2958:
 	mvns	r0, r3
 	orr	r0, r3, r0, lsl #16
 	str	r0, [r4, r3, lsl #2]
 	str	ip, [r7, r3, lsl #2]
-	b	.L2875
-.L2878:
+	b	.L2957
+.L2960:
 	mov	r0, r4
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
@@ -20304,11 +20670,11 @@ FtlLowFormat:
 	add	r7, r7, r0
 	uxth	r7, r7
 	uxth	r4, r4
-	b	.L2877
-.L2879:
+	b	.L2959
+.L2961:
 	mov	r0, r7
 	bl	__aeabi_uidiv
-	ldr	r3, .L2902+104
+	ldr	r3, .L2984+104
 	ldr	r3, [r3]
 	add	r0, r0, r3
 	uxth	r0, r0
@@ -20316,26 +20682,26 @@ FtlLowFormat:
 	ldrh	r0, [r6]
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	r6, [r8]
-.L2881:
+.L2963:
 	ldrh	r3, [r10]
 	cmp	r3, r6
-	bls	.L2883
+	bls	.L2965
 	mov	r0, r6
 	movs	r1, #1
 	adds	r6, r6, #1
 	bl	FtlLowFormatEraseBlock
 	uxth	r6, r6
-	b	.L2881
-.L2884:
+	b	.L2963
+.L2966:
 	movs	r1, #0
 	bl	FtlLowFormatEraseBlock
 	add	r6, r6, r0
 	uxth	r6, r6
-	b	.L2880
-.L2892:
+	b	.L2962
+.L2974:
 	ldr	r3, [r5]
 	ldrh	r1, [r7, #4]
-	ldr	r4, .L2902+108
+	ldr	r4, .L2984+108
 	str	r3, [r7, #12]
 	adds	r3, r3, #1
 	str	r3, [r5]
@@ -20351,22 +20717,22 @@ FtlLowFormat:
 	strh	r3, [r4]	@ movhi
 	movs	r3, #1
 	strb	r3, [r4, #8]
-.L2893:
+.L2975:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r4]
 	cmp	r3, #0
-	bne	.L2894
+	bne	.L2976
 	ldr	r3, [r8]
 	strh	r7, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	b	.L2893
-.L2903:
+	b	.L2975
+.L2985:
 	.align	2
-.L2902:
+.L2984:
 	.word	.LANCHOR76
 	.word	.LANCHOR66
 	.word	.LANCHOR195
@@ -20382,23 +20748,23 @@ FtlLowFormat:
 	.word	.LANCHOR73
 	.word	.LANCHOR72
 	.word	.LANCHOR42
-	.word	.LANCHOR223
+	.word	.LANCHOR224
 	.word	.LANCHOR28
 	.word	.LANCHOR15
 	.word	.LANCHOR49
-	.word	.LANCHOR222
+	.word	.LANCHOR223
 	.word	.LANCHOR52
 	.word	.LANCHOR91
 	.word	.LANCHOR68
 	.word	.LANCHOR100
-	.word	.LANCHOR204
-	.word	.LANCHOR0
+	.word	.LANCHOR205
+	.word	.LANCHOR1
 	.word	.LANCHOR65
 	.word	.LANCHOR92
 	.word	168778952
 	.word	.LANCHOR41
 	.word	.LANCHOR83
-.L2894:
+.L2976:
 	ldr	r3, [r5]
 	ldrh	r1, [r4, #4]
 	str	r3, [r4, #12]
@@ -20407,10 +20773,10 @@ FtlLowFormat:
 	movw	r4, #65535
 	ldr	r3, [r8]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L2904
+	ldr	r3, .L2986
 	strh	r4, [r3]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L2904+4
+	ldr	r3, .L2986+4
 	movs	r2, #0
 	strh	r2, [r3, #2]	@ movhi
 	ldr	r2, [r6]
@@ -20423,21 +20789,21 @@ FtlLowFormat:
 	str	r2, [r5]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	r0, .L2873
-	ldr	r3, .L2904+8
+	cbnz	r0, .L2955
+	ldr	r3, .L2986+8
 	movs	r2, #1
 	str	r2, [r3]
-.L2873:
+.L2955:
 	movs	r0, #0
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2905:
+.L2987:
 	.align	2
-.L2904:
+.L2986:
 	.word	.LANCHOR93
-	.word	.LANCHOR209
-	.word	.LANCHOR230
+	.word	.LANCHOR210
+	.word	.LANCHOR232
 	.size	FtlLowFormat, .-FtlLowFormat
 	.section	.text.rk_ftl_garbage_collect,"ax",%progbits
 	.align	1
@@ -20450,34 +20816,34 @@ FtlLowFormat:
 rk_ftl_garbage_collect:
 	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2996
+	ldr	r3, .L3087
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #40
+	sub	sp, sp, #32
 	ldr	r2, [r3]
 	cmp	r2, #0
-	bne	.L2958
-	ldr	r3, .L2996+4
+	bne	.L3047
+	ldr	r3, .L3087+4
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L2958
-	ldr	r2, .L2996+8
+	bne	.L3047
+	ldr	r2, .L3087+8
 	ldrh	r2, [r2]
 	cmp	r2, #47
-	bls	.L2960
-	ldr	r5, .L2996+12
+	bls	.L3049
+	ldr	r5, .L3087+12
 	movw	r2, #65535
 	ldrh	ip, [r5]
 	cmp	ip, r2
-	beq	.L2908
-	ldr	r7, .L2996+16
+	beq	.L2990
+	ldr	r7, .L3087+16
 	ldrh	r3, [r7]
 	cmp	r3, r2
-	bne	.L2908
-	ldr	r1, .L2996+20
+	bne	.L2990
+	ldr	r1, .L3087+20
 	ldrh	r6, [r1]
 	cmp	r6, r3
-	beq	.L2908
-	ldr	r2, .L2996+24
+	beq	.L2990
+	ldr	r2, .L3087+24
 	ldrh	r4, [r2]
 	cmp	r4, r3
 	itttt	ne
@@ -20485,164 +20851,172 @@ rk_ftl_garbage_collect:
 	strhne	r6, [r5]	@ movhi
 	strhne	r4, [r1]	@ movhi
 	strhne	r3, [r2]	@ movhi
-.L2908:
+.L2990:
 	cmp	r0, #0
-	bne	.L2961
-	ldr	r3, .L2996+28
+	bne	.L3050
+	ldr	r3, .L3087+28
 	ldrh	r3, [r3]
 	cmp	r3, #24
-	bhi	.L2962
-	ldr	r2, .L2996+32
+	bhi	.L3051
+	ldr	r2, .L3087+32
 	cmp	r3, #16
 	ldrh	r4, [r2]
-	bls	.L2911
+	bls	.L2993
 	lsrs	r4, r4, #5
-.L2910:
-	ldr	r2, .L2996+36
+.L2992:
+	ldr	r2, .L3087+36
 	ldrh	r1, [r2]
 	cmp	r1, r3
 	mov	r1, r2
-	bcs	.L2914
-	ldr	r3, .L2996+40
+	bcs	.L2996
+	ldr	r3, .L3087+40
 	movw	r0, #65535
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L2915
-	ldr	r0, .L2996+16
+	bne	.L2997
+	ldr	r0, .L3087+16
 	ldrh	r0, [r0]
 	cmp	r0, r3
-	bne	.L2915
-	ldr	r3, .L2996+44
+	bne	.L2997
+	ldr	r3, .L3087+44
 	ldrh	r0, [r3]
-	cbnz	r0, .L2916
-	ldr	r3, .L2996+48
-	ldr	r4, .L2996+52
+	cbnz	r0, .L2998
+	ldr	r3, .L3087+48
+	ldr	r4, .L3087+52
 	ldr	r3, [r3]
 	ldr	r4, [r4]
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, lsr #2
-	bcs	.L2917
-.L2916:
-	ldr	r3, .L2996+56
+	bcs	.L2999
+.L2998:
+	ldr	r3, .L3087+56
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r1]	@ movhi
-.L2918:
-	ldr	r3, .L2996+60
+.L3000:
+	ldr	r3, .L3087+60
 	movs	r2, #0
 	str	r2, [r3]
-.L2906:
-	add	sp, sp, #40
+.L2988:
+	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2911:
+.L2993:
 	cmp	r3, #12
-	bls	.L2912
+	bls	.L2994
 	lsrs	r4, r4, #4
-	b	.L2910
-.L2912:
+	b	.L2992
+.L2994:
 	cmp	r3, #8
-	bls	.L2910
+	bls	.L2992
 	lsrs	r4, r4, #2
-	b	.L2910
-.L2962:
+	b	.L2992
+.L3051:
 	movs	r4, #1
-	b	.L2910
-.L2917:
+	b	.L2992
+.L2999:
 	movs	r3, #18
 	strh	r3, [r2]	@ movhi
-	b	.L2918
-.L2915:
-	ldr	r3, .L2996+56
+	b	.L3000
+.L2997:
+	ldr	r3, .L3087+56
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r1]	@ movhi
-.L2914:
-	ldr	r3, .L2996+64
+.L2996:
+	ldr	r3, .L3087+64
 	ldrh	r3, [r3]
-	cbz	r3, .L2909
+	cbz	r3, .L2991
 	adds	r4, r4, #32
 	uxth	r4, r4
-.L2909:
-	ldr	r5, .L2996+68
+.L2991:
+	ldr	r5, .L3087+68
 	movw	r3, #65535
 	ldrh	r2, [r5]
 	cmp	r2, r3
-	bne	.L2921
-	ldr	r3, .L2996+16
+	bne	.L3003
+	ldr	r3, .L3087+16
 	ldrh	r1, [r3]
 	cmp	r1, r2
-	beq	.L2922
-	ldr	r0, .L2996+72
+	beq	.L3004
+	ldr	r0, .L3087+72
 	ldr	r0, [r0]
 	ldrh	r1, [r0, r1, lsl #1]
-	cbnz	r1, .L2923
+	cbnz	r1, .L3005
 	strh	r2, [r3]	@ movhi
-.L2923:
+.L3005:
 	ldrh	r2, [r3]
 	strh	r2, [r5]	@ movhi
 	movw	r2, #65535
 	strh	r2, [r3]	@ movhi
-.L2922:
+.L3004:
 	ldrh	r0, [r5]
 	movw	r6, #65535
 	movs	r3, #0
 	strb	r3, [r5, #8]
 	cmp	r0, r6
-	beq	.L2921
+	beq	.L3003
 	bl	IsBlkInGcList
-	cbz	r0, .L2925
+	cbz	r0, .L3007
 	strh	r6, [r5]	@ movhi
-.L2925:
-	ldr	r3, .L2996+76
+.L3007:
+	ldr	r3, .L3087+76
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2926
+	cbz	r3, .L3008
 	ldrh	r0, [r5]
 	bl	ftl_get_blk_mode
 	strb	r0, [r5, #8]
-.L2926:
+.L3008:
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2921
-	ldr	r0, .L2996+68
+	beq	.L3003
+	ldr	r0, .L3087+68
 	bl	make_superblock
-	ldr	r2, .L2996+80
+	ldr	r2, .L3087+80
 	movs	r3, #0
 	strh	r3, [r5, #2]	@ movhi
 	strb	r3, [r5, #6]
 	strh	r3, [r2]	@ movhi
-	ldr	r3, .L2996+72
+	ldr	r3, .L3087+72
 	ldrh	r2, [r5]
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r2, lsl #1]
-	ldr	r3, .L2996+84
+	ldr	r3, .L3087+84
 	strh	r2, [r3]	@ movhi
-.L2921:
-	ldr	r2, .L2996+88
+.L3003:
+	ldr	r2, .L3087+88
 	ldrh	r3, [r5]
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L2927
-	ldr	r2, .L2996+92
+	beq	.L3009
+	ldr	r2, .L3087+92
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L2927
-	ldr	r5, .L2996+68
+	beq	.L3009
+	ldr	r2, .L3087+40
+	ldrh	r2, [r2]
+	cmp	r2, r3
+	bne	.L3010
+.L3009:
+	movw	r3, #65535
+	strh	r3, [r5]	@ movhi
+.L3010:
+	ldr	r5, .L3087+68
 	mov	r6, r5
-.L2928:
+.L3046:
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L2929
-	ldr	r10, .L2996+100
+	bne	.L3011
+	ldr	r10, .L3087+100
 	movs	r2, #0
-	ldr	r3, .L2996+60
+	ldr	r3, .L3087+60
 	mov	r7, r10
 	str	r2, [r3]
-.L2930:
+.L3012:
 	ldrh	r8, [r10]
 	mov	r0, r8
 	bl	List_get_gc_head_node
@@ -20650,36 +21024,29 @@ rk_ftl_garbage_collect:
 	movw	r3, #65535
 	cmp	fp, r3
 	strh	fp, [r6]	@ movhi
-	bne	.L2931
+	bne	.L3013
 	movs	r3, #0
 	movs	r0, #8
 	strh	r3, [r10]	@ movhi
-	b	.L2906
-.L2961:
+	b	.L2988
+.L3050:
 	movs	r4, #1
-	b	.L2909
-.L2927:
-	movw	r3, #65535
-	strh	r3, [r5]	@ movhi
-.L2994:
-	ldr	r3, .L2996+44
-	ldrh	r0, [r3]
-	b	.L2906
-.L2931:
-	str	r0, [sp, #8]
+	b	.L2991
+.L3013:
+	str	r0, [sp]
 	mov	r0, fp
 	bl	IsBlkInGcList
 	add	r3, r8, #1
-	ldr	r2, [sp, #8]
-	cbz	r0, .L2932
+	ldr	r2, [sp]
+	cbz	r0, .L3014
 	strh	r3, [r10]	@ movhi
-	b	.L2930
-.L2932:
-	ldr	r1, .L2996+32
+	b	.L3012
+.L3014:
+	ldr	r1, .L3087+32
 	uxth	r3, r3
-	ldr	lr, .L2996+104
+	ldr	lr, .L3087+104
 	uxth	r2, r2
-	ldr	r8, .L2996+72
+	ldr	r8, .L3087+72
 	ldrh	r1, [r1]
 	ldrh	lr, [lr]
 	ldr	r0, [r8]
@@ -20687,42 +21054,45 @@ rk_ftl_garbage_collect:
 	mul	r1, lr, r1
 	ldrh	ip, [r0, r2, lsl #1]
 	cmp	ip, r1, asr #1
-	bgt	.L2934
+	bgt	.L3016
 	cmp	r3, #48
-	bls	.L2935
+	bls	.L3017
 	cmp	ip, #8
-	bls	.L2935
-	ldr	r3, .L2996+96
+	bls	.L3017
+	ldr	r3, .L3087+96
 	ldrh	r3, [r3]
 	cmp	r3, #35
-	bhi	.L2935
-.L2934:
+	bhi	.L3017
+.L3016:
 	movs	r3, #0
 	strh	r3, [r7]	@ movhi
-.L2935:
+.L3017:
 	ldrh	r3, [r0, r2, lsl #1]
 	cmp	r1, r3
-	bgt	.L2936
+	bgt	.L3018
 	ldrh	r2, [r7]
 	cmp	r2, #3
-	bhi	.L2936
+	bhi	.L3018
 	movw	r3, #65535
 	strh	r3, [r6]	@ movhi
 	movs	r3, #0
 	strh	r3, [r7]	@ movhi
-	b	.L2994
-.L2936:
+.L3086:
+	ldr	r3, .L3087+44
+	ldrh	r0, [r3]
+	b	.L2988
+.L3018:
 	cmp	r3, #0
-	bne	.L2937
+	bne	.L3019
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	ldrh	r3, [r7]
 	adds	r3, r3, #1
 	strh	r3, [r7]	@ movhi
-	b	.L2930
-.L2997:
+	b	.L3012
+.L3088:
 	.align	2
-.L2996:
+.L3087:
 	.word	.LANCHOR76
 	.word	.LANCHOR171
 	.word	.LANCHOR85
@@ -20734,102 +21104,102 @@ rk_ftl_garbage_collect:
 	.word	.LANCHOR52
 	.word	.LANCHOR176
 	.word	.LANCHOR93
-	.word	.LANCHOR240
+	.word	.LANCHOR243
 	.word	.LANCHOR72
 	.word	.LANCHOR100
-	.word	.LANCHOR223
+	.word	.LANCHOR224
 	.word	.LANCHOR172
 	.word	.LANCHOR116
-	.word	.LANCHOR204
+	.word	.LANCHOR205
 	.word	.LANCHOR83
 	.word	.LANCHOR15
-	.word	.LANCHOR241
-	.word	.LANCHOR242
+	.word	.LANCHOR244
+	.word	.LANCHOR245
 	.word	.LANCHOR91
 	.word	.LANCHOR92
 	.word	.LANCHOR109
 	.word	.LANCHOR178
 	.word	.LANCHOR38
-.L2937:
+.L3019:
 	movs	r3, #0
 	strb	r3, [r6, #8]
-	ldr	r3, .L2998
+	ldr	r3, .L3089
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2938
+	cbz	r3, .L3020
 	mov	r0, fp
 	bl	ftl_get_blk_mode
 	strb	r0, [r6, #8]
-.L2938:
-	ldr	r3, .L2998+4
+.L3020:
+	ldr	r3, .L3089+4
 	ldrh	r3, [r3]
 	cmp	r3, fp
-	bne	.L2939
-	ldr	r1, .L2998+8
-	movw	r2, #893
-	ldr	r0, .L2998+12
+	bne	.L3021
+	ldr	r1, .L3089+8
+	movw	r2, #902
+	ldr	r0, .L3089+12
 	bl	printf
-	ldr	r1, .L2998+16
-	ldr	r0, .L2998+20
+	ldr	r1, .L3089+16
+	ldr	r0, .L3089+20
 	bl	printf
-.L2939:
-	ldr	r3, .L2998+24
+.L3021:
+	ldr	r3, .L3089+24
 	ldrh	r2, [r6]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L2940
-	ldr	r1, .L2998+8
-	movw	r2, #894
-	ldr	r0, .L2998+12
+	bne	.L3022
+	ldr	r1, .L3089+8
+	movw	r2, #903
+	ldr	r0, .L3089+12
 	bl	printf
-	ldr	r1, .L2998+16
-	ldr	r0, .L2998+20
+	ldr	r1, .L3089+16
+	ldr	r0, .L3089+20
 	bl	printf
-.L2940:
-	ldr	r3, .L2998+28
+.L3022:
+	ldr	r3, .L3089+28
 	ldrh	r2, [r6]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L2941
-	ldr	r1, .L2998+8
-	movw	r2, #895
-	ldr	r0, .L2998+12
+	bne	.L3023
+	ldr	r1, .L3089+8
+	mov	r2, #904
+	ldr	r0, .L3089+12
 	bl	printf
-	ldr	r1, .L2998+16
-	ldr	r0, .L2998+20
+	ldr	r1, .L3089+16
+	ldr	r0, .L3089+20
 	bl	printf
-.L2941:
+.L3023:
 	mov	r0, r5
 	bl	make_superblock
-	ldr	r2, .L2998+32
+	ldr	r2, .L3089+32
 	movs	r3, #0
 	ldrh	r1, [r6]
 	strh	r3, [r2]	@ movhi
 	ldr	r2, [r8]
 	ldrh	r1, [r2, r1, lsl #1]
-	ldr	r2, .L2998+36
+	ldr	r2, .L3089+36
 	strh	r3, [r6, #2]	@ movhi
 	strb	r3, [r6, #6]
 	strh	r1, [r2]	@ movhi
-.L2929:
-	ldr	r3, .L2998+40
+.L3011:
+	ldr	r3, .L3089+40
 	movs	r2, #1
 	str	r2, [r3]
-	ldr	r3, .L2998+44
+	ldr	r3, .L3089+44
 	ldrh	r3, [r3]
-	str	r3, [sp, #12]
-	ldr	r3, .L2998
+	str	r3, [sp, #4]
+	ldr	r3, .L3089
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2942
+	cbz	r3, .L3024
 	ldrb	r3, [r6, #8]	@ zero_extendqisi2
 	cmp	r3, r2
 	ittt	eq
-	ldreq	r3, .L2998+48
+	ldreq	r3, .L3089+48
 	ldrheq	r3, [r3]
-	streq	r3, [sp, #12]
-.L2942:
+	streq	r3, [sp, #4]
+.L3024:
 	ldrh	r3, [r6, #2]
-	ldr	r1, [sp, #12]
-	ldr	fp, .L2998+84
+	ldr	r1, [sp, #4]
+	ldr	fp, .L3089+76
 	adds	r2, r3, r4
 	cmp	r2, r1
 	itt	gt
@@ -20838,99 +21208,99 @@ rk_ftl_garbage_collect:
 	mov	r3, #0
 	it	gt
 	uxthgt	r4, r4
-	str	r3, [sp, #20]
-.L2944:
-	ldrh	r3, [sp, #20]
+	str	r3, [sp, #12]
+.L3026:
+	ldrh	r3, [sp, #12]
 	cmp	r4, r3
-	bls	.L2952
-	ldr	r3, .L2998+52
+	bls	.L3034
+	ldr	r3, .L3089+52
 	movw	r8, #65535
 	ldrh	lr, [r5, #2]
 	mov	r10, #36
 	ldr	r0, [fp]
 	ldrh	r7, [r3]
-	ldr	r3, [sp, #20]
+	ldr	r3, [sp, #12]
 	add	lr, lr, r3
-	ldr	r3, .L2998+56
-	str	r3, [sp, #16]
-	movs	r3, #0
+	ldr	r3, .L3089+56
 	str	r3, [sp, #8]
-	b	.L2953
-.L2946:
-	ldr	r1, [sp, #16]
+	movs	r3, #0
+	str	r3, [sp]
+	b	.L3035
+.L3028:
+	ldr	r1, [sp, #8]
 	ldrh	r2, [r1, #2]!
 	cmp	r2, r8
-	str	r1, [sp, #16]
-	beq	.L2945
-	ldr	r1, [sp, #8]
+	str	r1, [sp, #8]
+	beq	.L3027
+	ldr	r1, [sp]
 	orr	r2, lr, r2, lsl #10
 	mla	ip, r10, r1, r0
 	str	r2, [ip, #4]
 	mov	r2, r1
 	adds	r2, r2, #1
 	uxth	r2, r2
-	str	r2, [sp, #8]
-.L2945:
+	str	r2, [sp]
+.L3027:
 	adds	r3, r3, #1
-.L2953:
+.L3035:
 	uxth	r2, r3
-	cmp	r2, r7
-	bcc	.L2946
+	cmp	r7, r2
+	bhi	.L3028
 	ldrb	r2, [r5, #8]	@ zero_extendqisi2
-	ldr	r1, [sp, #8]
+	ldr	r1, [sp]
 	bl	FlashReadPages
 	movs	r3, #0
-.L2993:
-	str	r3, [sp, #16]
-	ldr	r2, [sp, #8]
-	ldrh	r3, [sp, #16]
+.L3085:
+	str	r3, [sp, #8]
+	ldr	r2, [sp]
+	ldrh	r3, [sp, #8]
 	cmp	r2, r3
-	bhi	.L2951
-	ldr	r3, [sp, #20]
+	bhi	.L3033
+	ldr	r3, [sp, #12]
 	adds	r3, r3, #1
-	str	r3, [sp, #20]
-	b	.L2944
-.L2951:
-	ldr	r3, [sp, #16]
+	str	r3, [sp, #12]
+	b	.L3026
+.L3033:
+	ldr	r3, [sp, #8]
 	movs	r7, #36
 	muls	r7, r3, r7
 	ldr	r3, [fp]
 	adds	r2, r3, r7
 	ldr	r3, [r3, r7]
 	adds	r3, r3, #1
-	beq	.L2948
+	beq	.L3030
 	ldr	r8, [r2, #12]
 	movw	r3, #61589
 	ldrh	r2, [r8]
 	cmp	r2, r3
-	bne	.L2948
+	bne	.L3030
 	ldr	r10, [r8, #8]
 	cmp	r10, #-1
-	bne	.L2949
-	ldr	r1, .L2998+8
-	movw	r2, #934
-	ldr	r0, .L2998+12
+	bne	.L3031
+	ldr	r1, .L3089+8
+	movw	r2, #943
+	ldr	r0, .L3089+12
 	bl	printf
-	ldr	r1, .L2998+16
-	ldr	r0, .L2998+20
+	ldr	r1, .L3089+16
+	ldr	r0, .L3089+20
 	bl	printf
-.L2949:
+.L3031:
 	movs	r2, #0
-	add	r1, sp, #36
+	add	r1, sp, #24
 	mov	r0, r10
 	bl	log2phys
 	ldr	r0, [fp]
-	ldr	r3, [sp, #36]
+	ldr	r3, [sp, #24]
 	add	r0, r0, r7
 	ldr	r2, [r0, #4]
 	bic	r3, r3, #-2147483648
 	cmp	r3, r2
-	bne	.L2948
-	ldr	r2, .L2998+32
-	ldr	r1, .L2998+60
-	ldr	r10, .L2998+68
+	bne	.L3030
+	ldr	r2, .L3089+32
+	ldr	r1, .L3089+60
+	ldr	r10, .L3089+72
 	ldrh	r3, [r2]
-	str	r1, [sp, #28]
+	str	r1, [sp, #20]
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
 	ldr	r2, [r1]
@@ -20939,10 +21309,10 @@ rk_ftl_garbage_collect:
 	mla	r3, r1, r3, r2
 	ldr	r2, [r0, #16]
 	str	r2, [r3, #16]
-	str	r3, [sp, #24]
+	str	r3, [sp, #16]
 	bl	Ftl_get_new_temp_ppa
-	ldr	r3, [sp, #24]
-	ldr	r1, [sp, #28]
+	ldr	r3, [sp, #16]
+	ldr	r1, [sp, #20]
 	str	r0, [r3, #4]
 	ldr	r2, [r1]
 	movs	r1, #36
@@ -20950,130 +21320,160 @@ rk_ftl_garbage_collect:
 	ldr	r0, [fp]
 	mla	r2, r1, r3, r2
 	add	r0, r0, r7
-	ldr	r7, .L2998+28
+	ldr	r7, .L3089+28
 	ldr	r1, [r0, #8]
 	adds	r3, r3, #1
 	str	r1, [r2, #8]
 	ldr	r1, [r0, #12]
 	str	r1, [r2, #12]
 	movs	r1, #1
-	ldr	r2, [sp, #36]
+	ldr	r2, [sp, #24]
 	str	r2, [r8, #12]
 	ldrh	r2, [r7]
 	strh	r2, [r8, #2]	@ movhi
-	ldr	r2, .L2998+64
+	ldr	r2, .L3089+64
 	str	r3, [r10]
 	ldr	r2, [r2]
 	str	r2, [r8, #4]
 	bl	FtlGcBufAlloc
-	ldr	r3, .L2998
+	ldr	r3, .L3089
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L2950
+	cbnz	r3, .L3032
 	ldrb	r2, [r7, #7]	@ zero_extendqisi2
 	ldr	r3, [r10]
 	cmp	r2, r3
-	beq	.L2950
+	beq	.L3032
 	ldrh	r3, [r7, #4]
-	cbnz	r3, .L2948
-.L2950:
+	cbnz	r3, .L3030
+.L3032:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	r0, .L2948
-.L2995:
-	ldr	r3, .L2998+40
+	cbz	r0, .L3030
+	ldr	r3, .L3089+40
 	movs	r2, #0
+	movw	r1, #65535
 	str	r2, [r3]
-	b	.L2994
-.L2948:
-	ldr	r3, [sp, #16]
+	ldr	r3, .L3089+68
+	strh	r1, [r3]	@ movhi
+	strh	r2, [r3, #2]	@ movhi
+	b	.L3086
+.L3030:
+	ldr	r3, [sp, #8]
 	adds	r3, r3, #1
-	b	.L2993
-.L2952:
+	b	.L3085
+.L3034:
 	ldrh	r3, [r5, #2]
 	add	r4, r4, r3
-	ldr	r3, [sp, #12]
+	ldr	r3, [sp, #4]
 	uxth	r4, r4
 	cmp	r3, r4
 	strh	r4, [r5, #2]	@ movhi
-	bhi	.L2954
-	ldr	r3, .L2998+68
+	bhi	.L3036
+	ldr	r3, .L3089+72
 	ldr	r3, [r3]
-	cbz	r3, .L2955
+	cbz	r3, .L3037
 	bl	Ftl_gc_temp_data_write_back
-	cmp	r0, #0
-	bne	.L2995
-.L2955:
-	ldr	r3, .L2998+32
-	ldrh	r4, [r3]
-	cbnz	r4, .L2956
-	ldr	r7, .L2998+72
-	ldrh	r1, [r5]
-	ldr	r3, [r7]
-	ldrh	r3, [r3, r1, lsl #1]
-	cbz	r3, .L2956
-	ldr	r0, .L2998+36
-	ldrh	r2, [r5, #2]
-	ldrh	r0, [r0]
-	str	r3, [sp]
-	mov	r3, r4
-	str	r0, [sp, #4]
-	ldr	r0, .L2998+76
-	bl	printf
-	ldrh	r2, [r5]
-	ldr	r3, [r7]
-	strh	r4, [r3, r2, lsl #1]	@ movhi
-	ldrh	r0, [r5]
-	bl	update_vpc_list
-	bl	FtlCacheWriteBack
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
-.L2956:
-	movw	r3, #65535
-	strh	r3, [r5]	@ movhi
-.L2954:
-	ldr	r3, .L2998+80
-	ldrh	r0, [r3]
-	cmp	r0, #2
-	bhi	.L2957
-	ldr	r3, .L2998+44
-	ldrh	r4, [r3]
-	b	.L2928
-.L2957:
-	ldr	r3, .L2998+40
+	cbz	r0, .L3037
+	ldr	r3, .L3089+40
 	movs	r2, #0
-	adds	r0, r0, #1
 	str	r2, [r3]
-	b	.L2906
-.L2999:
+	b	.L3086
+.L3090:
 	.align	2
-.L2998:
+.L3089:
 	.word	.LANCHOR15
 	.word	.LANCHOR91
-	.word	.LANCHOR243
+	.word	.LANCHOR246
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
 	.word	.LANCHOR92
 	.word	.LANCHOR93
-	.word	.LANCHOR241
-	.word	.LANCHOR242
+	.word	.LANCHOR244
+	.word	.LANCHOR245
 	.word	.LANCHOR171
 	.word	.LANCHOR52
 	.word	.LANCHOR53
 	.word	.LANCHOR38
-	.word	.LANCHOR204+14
+	.word	.LANCHOR205+14
 	.word	.LANCHOR181
 	.word	.LANCHOR160
+	.word	.LANCHOR205
 	.word	.LANCHOR102
-	.word	.LANCHOR83
-	.word	.LC66
-	.word	.LANCHOR88
 	.word	.LANCHOR106
-.L2958:
+.L3037:
+	ldr	r3, .L3091
+	ldrh	r7, [r3]
+	cbnz	r7, .L3038
+	ldr	r8, .L3091+20
+	ldrh	r2, [r5]
+	ldr	r3, [r8]
+	ldrh	r3, [r3, r2, lsl #1]
+	cbz	r3, .L3038
+	ldr	r4, .L3091+4
+.L3039:
+	ldr	r3, [r4]
+	cmp	r7, r3
+	bcs	.L3044
+	movs	r2, #0
+	add	r1, sp, #28
+	mov	r0, r7
+	bl	log2phys
+	ldr	r0, [sp, #28]
+	adds	r3, r0, #1
+	beq	.L3040
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	ldrh	r3, [r5]
+	cmp	r3, r0
+	bne	.L3040
+.L3044:
+	ldr	r3, [r4]
+	cmp	r7, r3
+	bcc	.L3038
+	ldrh	r2, [r5]
+	movs	r1, #0
+	ldr	r3, [r8]
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	ldrh	r0, [r5]
+	bl	update_vpc_list
+	bl	FtlCacheWriteBack
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+.L3038:
+	movw	r3, #65535
+	strh	r3, [r5]	@ movhi
+.L3036:
+	ldr	r3, .L3091+8
+	ldrh	r0, [r3]
+	cmp	r0, #2
+	bhi	.L3045
+	ldr	r3, .L3091+12
+	ldrh	r4, [r3]
+	b	.L3046
+.L3040:
+	adds	r7, r7, #1
+	b	.L3039
+.L3045:
+	ldr	r3, .L3091+16
+	movs	r2, #0
+	adds	r0, r0, #1
+	str	r2, [r3]
+	b	.L2988
+.L3047:
 	movs	r0, #0
-	b	.L2906
-.L2960:
+	b	.L2988
+.L3049:
 	mov	r0, r3
-	b	.L2906
+	b	.L2988
+.L3092:
+	.align	2
+.L3091:
+	.word	.LANCHOR244
+	.word	.LANCHOR72
+	.word	.LANCHOR88
+	.word	.LANCHOR52
+	.word	.LANCHOR171
+	.word	.LANCHOR83
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
 	.section	.text.FtlInit,"ax",%progbits
 	.align	1
@@ -21086,70 +21486,91 @@ rk_ftl_garbage_collect:
 FtlInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
+	push	{r4, r5, r6, r7, r8, lr}
 	mov	r3, #-1
-	ldr	r4, .L3009
-	mov	r5, r0
-	ldr	r2, .L3009+4
-	str	r3, [r4]
+	ldr	r5, .L3103
+	mov	r4, r0
+	ldr	r2, .L3103+4
+	str	r3, [r5]
 	movs	r3, #0
-	ldr	r1, .L3009+8
+	ldr	r1, .L3103+8
 	str	r3, [r2]
-	ldr	r2, .L3009+12
-	ldr	r0, .L3009+16
+	ldr	r2, .L3103+12
+	ldr	r0, .L3103+16
 	str	r3, [r2]
 	bl	printf
-	mov	r0, r5
+	mov	r0, r4
 	bl	FtlConstantsInit
 	bl	FtlMemInit
 	bl	FtlVariablesInit
-	ldr	r3, .L3009+20
+	ldr	r3, .L3103+20
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	r0, .L3001
-	ldr	r1, .L3009+24
-	ldr	r0, .L3009+28
-.L3008:
+	cbz	r0, .L3094
+	ldr	r1, .L3103+24
+	ldr	r0, .L3103+28
+.L3102:
 	bl	printf
-.L3002:
+.L3095:
 	movs	r0, #0
-	pop	{r3, r4, r5, pc}
-.L3001:
+	pop	{r4, r5, r6, r7, r8, pc}
+.L3094:
 	bl	FtlSysBlkInit
-	cbz	r0, .L3003
-	ldr	r1, .L3009+24
-	ldr	r0, .L3009+32
-	b	.L3008
-.L3003:
+	mov	r4, r0
+	cbz	r0, .L3096
+	ldr	r1, .L3103+24
+	ldr	r0, .L3103+32
+	b	.L3102
+.L3096:
 	movs	r1, #1
-	str	r1, [r4]
+	str	r1, [r5]
+	ldr	r5, .L3103+36
 	bl	rk_ftl_garbage_collect
-	ldr	r3, .L3009+36
-	ldrh	r3, [r3]
-	cmp	r3, #15
-	bhi	.L3002
-	mov	r4, #1024
-.L3005:
+	ldrh	r6, [r5]
+	cmp	r6, #15
+	bhi	.L3095
+	ldr	r7, .L3103+40
+	ldr	r8, .L3103+44
+.L3100:
+	ldrh	r3, [r7]
+	movw	r2, #65535
+	cmp	r3, r2
+	bne	.L3098
+	ldrh	r2, [r8]
+	cmp	r2, r3
+	bne	.L3098
+	and	r0, r4, #7
+	bl	List_get_gc_head_node
+	uxth	r0, r0
+	bl	FtlGcRefreshBlock
+.L3098:
 	movs	r1, #1
 	mov	r0, r1
 	bl	rk_ftl_garbage_collect
-	subs	r4, r4, #1
-	bne	.L3005
-	b	.L3002
-.L3010:
+	ldrh	r2, [r5]
+	adds	r3, r6, #2
+	cmp	r2, r3
+	bhi	.L3095
+	adds	r4, r4, #1
+	cmp	r4, #1024
+	bne	.L3100
+	b	.L3095
+.L3104:
 	.align	2
-.L3009:
-	.word	.LANCHOR230
-	.word	.LANCHOR244
-	.word	.LC67
+.L3103:
+	.word	.LANCHOR232
+	.word	.LANCHOR247
+	.word	.LC71
 	.word	.LANCHOR76
 	.word	.LC7
 	.word	.LANCHOR39
-	.word	.LANCHOR245
-	.word	.LC68
-	.word	.LC69
+	.word	.LANCHOR248
+	.word	.LC72
+	.word	.LC73
 	.word	.LANCHOR88
+	.word	.LANCHOR205
+	.word	.LANCHOR112
 	.size	FtlInit, .-FtlInit
 	.section	.text.rk_ftl_init,"ax",%progbits
 	.align	1
@@ -21165,21 +21586,21 @@ rk_ftl_init:
 	push	{r4, lr}
 	bl	FlashInit
 	mov	r4, r0
-	cbnz	r0, .L3012
-	ldr	r0, .L3013
+	cbnz	r0, .L3106
+	ldr	r0, .L3107
 	bl	FtlInit
-.L3012:
+.L3106:
 	bl	idb_init
 	mov	r1, r4
-	ldr	r0, .L3013+4
+	ldr	r0, .L3107+4
 	bl	printf
 	mov	r0, r4
 	pop	{r4, pc}
-.L3014:
+.L3108:
 	.align	2
-.L3013:
+.L3107:
 	.word	.LANCHOR14
-	.word	.LC70
+	.word	.LC74
 	.size	rk_ftl_init, .-rk_ftl_init
 	.section	.text.ftl_fix_nand_power_lost_error,"ax",%progbits
 	.align	1
@@ -21192,20 +21613,20 @@ rk_ftl_init:
 ftl_fix_nand_power_lost_error:
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L3029
+	ldr	r3, .L3123
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #56
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L3015
-	ldr	r7, .L3029+4
-	ldr	r6, .L3029+8
-	ldr	r10, .L3029+32
+	beq	.L3109
+	ldr	r7, .L3123+4
+	ldr	r6, .L3123+8
+	ldr	r10, .L3123+32
 	ldrh	r5, [r7]
 	ldr	r3, [r6]
-	ldr	r4, .L3029+12
+	ldr	r4, .L3123+12
 	mov	r1, r5
-	ldr	r0, .L3029+16
+	ldr	r0, .L3123+16
 	ldrh	r2, [r3, r5, lsl #1]
 	lsl	r8, r5, #1
 	bl	printf
@@ -21219,44 +21640,44 @@ ftl_fix_nand_power_lost_error:
 	movw	r4, #4097
 	bl	allocate_new_data_superblock
 	str	r7, [sp, #4]
-.L3017:
+.L3111:
 	subs	r4, r4, #1
-	beq	.L3021
+	beq	.L3115
 	movs	r1, #1
 	mov	r0, r1
 	bl	rk_ftl_garbage_collect
 	ldr	r3, [r6]
 	ldrh	r3, [r3, r8]
 	cmp	r3, #0
-	bne	.L3017
-.L3021:
+	bne	.L3111
+.L3115:
 	ldr	r3, [r6]
 	mov	r1, r5
-	ldr	r0, .L3029+16
+	ldr	r0, .L3123+16
 	ldrh	r2, [r3, r5, lsl #1]
 	bl	printf
 	ldr	r3, [r6]
 	ldrh	r4, [r3, r5, lsl #1]
-	cbnz	r4, .L3019
+	cbnz	r4, .L3113
 	add	r0, sp, #56
-	ldr	r7, .L3029+20
+	ldr	r7, .L3123+20
 	strh	r5, [r0, #-48]!	@ movhi
 	movw	r10, #65535
 	bl	make_superblock
-	ldr	r3, .L3029+24
+	ldr	r3, .L3123+24
 	add	r0, sp, #22
 	ldr	r8, [r7]
 	mov	r2, r4
 	mov	fp, #36
 	mov	ip, r4
 	ldrh	lr, [r3]
-.L3022:
+.L3116:
 	uxth	r3, r2
 	cmp	lr, r3
-	bhi	.L3024
+	bhi	.L3118
 	ldr	r3, [r6]
 	mov	r1, r5
-	ldr	r0, .L3029+28
+	ldr	r0, .L3123+28
 	ldrh	r2, [r3, r5, lsl #1]
 	bl	printf
 	mov	r2, r4
@@ -21267,18 +21688,18 @@ ftl_fix_nand_power_lost_error:
 	movs	r1, #1
 	ldr	r0, [r7]
 	bl	FlashEraseBlocks
-.L3019:
+.L3113:
 	ldr	r2, [sp, #4]
 	movw	r3, #65535
 	strh	r3, [r2]	@ movhi
-.L3015:
+.L3109:
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3024:
+.L3118:
 	ldrh	r3, [r0, #2]!
 	cmp	r3, r10
-	beq	.L3023
+	beq	.L3117
 	mla	r1, fp, r4, r8
 	adds	r4, r4, #1
 	lsls	r3, r3, #10
@@ -21286,20 +21707,20 @@ ftl_fix_nand_power_lost_error:
 	str	r3, [r1, #4]
 	str	ip, [r1, #8]
 	str	ip, [r1, #12]
-.L3023:
+.L3117:
 	adds	r2, r2, #1
-	b	.L3022
-.L3030:
+	b	.L3116
+.L3124:
 	.align	2
-.L3029:
+.L3123:
 	.word	.LANCHOR15
-	.word	.LANCHOR234
+	.word	.LANCHOR237
 	.word	.LANCHOR83
 	.word	.LANCHOR92
-	.word	.LC71
+	.word	.LC75
 	.word	.LANCHOR77
 	.word	.LANCHOR38
-	.word	.LC72
+	.word	.LC76
 	.word	.LANCHOR91
 	.size	ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error
 	.section	.text.ftl_read,"ax",%progbits
@@ -21319,34 +21740,34 @@ ftl_read:
 	mov	r6, r1
 	mov	r7, r3
 	str	r2, [sp, #52]
-	bne	.L3032
+	bne	.L3126
 	mov	r2, r3
 	ldr	r1, [sp, #52]
 	add	r0, r6, #256
 	bl	FtlVendorPartRead
 	str	r0, [sp, #32]
-.L3031:
+.L3125:
 	ldr	r0, [sp, #32]
 	add	sp, sp, #88
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3032:
+.L3126:
 	ldr	r3, [sp, #52]
 	adds	r3, r1, r3
 	str	r3, [sp, #36]
-	ldr	r3, .L3070
+	ldr	r3, .L3164
 	ldr	r2, [sp, #36]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L3055
-	ldr	r3, .L3070+4
+	bhi	.L3149
+	ldr	r3, .L3164+4
 	ldr	r3, [r3]
 	adds	r4, r3, #1
-	beq	.L3056
+	beq	.L3150
 	bl	FtlCacheWriteBack
-	ldr	r3, .L3070+8
+	ldr	r3, .L3164+8
 	mov	r0, r6
-	ldr	r10, .L3070+52
+	ldr	r10, .L3164+52
 	ldrh	r4, [r3]
 	mov	r1, r4
 	bl	__aeabi_uidiv
@@ -21356,7 +21777,7 @@ ftl_read:
 	subs	r0, r3, #1
 	bl	__aeabi_uidiv
 	ldr	r3, [sp, #40]
-	ldr	r2, .L3070+12
+	ldr	r2, .L3164+12
 	ldr	r4, [sp, #40]
 	rsb	r3, r3, #1
 	str	r0, [sp, #44]
@@ -21371,44 +21792,44 @@ ftl_read:
 	str	r3, [sp, #24]
 	str	r3, [sp, #48]
 	str	r3, [sp, #32]
-.L3034:
+.L3128:
 	ldr	r3, [sp, #28]
-	cbnz	r3, .L3054
-	ldr	r3, .L3070+16
+	cbnz	r3, .L3148
+	ldr	r3, .L3164+16
 	ldrh	r3, [r3]
 	cmp	r3, #0
-	beq	.L3031
+	beq	.L3125
 	movs	r1, #1
 	ldr	r0, [sp, #28]
 	bl	rk_ftl_garbage_collect
-	b	.L3031
-.L3054:
+	b	.L3125
+.L3148:
 	movs	r2, #0
 	add	r1, sp, #84
 	mov	r0, r4
 	bl	log2phys
 	ldr	r3, [sp, #84]
 	adds	r0, r3, #1
-	bne	.L3035
-	ldr	fp, .L3070+8
+	bne	.L3129
+	ldr	fp, .L3164+8
 	mov	r8, #0
-.L3036:
+.L3130:
 	ldrh	r0, [fp]
 	cmp	r8, r0
-	bcc	.L3038
-.L3039:
+	bcc	.L3132
+.L3133:
 	ldr	r3, [sp, #28]
 	adds	r4, r4, #1
 	subs	r3, r3, #1
 	str	r3, [sp, #28]
-	beq	.L3043
-	ldr	r3, .L3070+20
+	beq	.L3137
+	ldr	r3, .L3164+20
 	ldrh	r3, [r3]
 	cmp	r5, r3, lsl #2
-	bne	.L3034
-.L3043:
+	bne	.L3128
+.L3137:
 	cmp	r5, #0
-	beq	.L3034
+	beq	.L3128
 	movs	r2, #0
 	mov	r1, r5
 	ldr	r0, [r10]
@@ -21423,7 +21844,7 @@ ftl_read:
 	ldr	r3, [sp, #48]
 	lsls	r3, r3, #9
 	str	r3, [sp, #64]
-.L3053:
+.L3147:
 	mov	r8, #36
 	ldr	r3, [r10]
 	mul	r8, r8, fp
@@ -21431,27 +21852,27 @@ ftl_read:
 	add	r3, r3, r8
 	ldr	r2, [r3, #16]
 	cmp	r1, r2
-	bne	.L3045
+	bne	.L3139
 	ldr	r1, [r3, #8]
-	ldr	r3, .L3070+24
+	ldr	r3, .L3164+24
 	ldr	r3, [r3]
 	cmp	r1, r3
-	bne	.L3046
+	bne	.L3140
 	ldr	r3, [sp, #60]
 	mov	r0, r7
 	ldr	r2, [sp, #64]
 	add	r1, r1, r3
-.L3069:
+.L3163:
 	bl	ftl_memcpy
-.L3046:
+.L3140:
 	ldr	r2, [r10]
 	add	r2, r2, r8
 	ldr	r3, [r2, #12]
 	ldr	lr, [r2, #16]
 	ldr	r0, [r3, #8]
 	cmp	lr, r0
-	beq	.L3047
-	ldr	ip, .L3070+32
+	beq	.L3141
+	ldr	ip, .L3164+32
 	ldr	r0, [ip, #72]
 	adds	r0, r0, #1
 	str	r0, [ip, #72]
@@ -21467,52 +21888,52 @@ ftl_read:
 	str	r0, [sp, #4]
 	ldr	r0, [r3, #4]
 	str	r0, [sp]
-	ldr	r0, .L3070+28
+	ldr	r0, .L3164+28
 	ldr	r3, [r3]
 	ldr	r2, [r2, #4]
 	bl	printf
-.L3047:
+.L3141:
 	ldr	r3, [r10]
 	add	r2, r3, r8
 	ldr	r3, [r3, r8]
 	adds	r1, r3, #1
-	bne	.L3048
-	ldr	r1, .L3070+32
+	bne	.L3142
+	ldr	r1, .L3164+32
 	str	r3, [sp, #32]
 	ldr	r2, [r1, #72]
 	adds	r2, r2, #1
 	str	r2, [r1, #72]
-.L3049:
+.L3143:
 	add	fp, fp, #1
 	cmp	r5, fp
-	bne	.L3053
+	bne	.L3147
 	movs	r5, #0
-	b	.L3034
-.L3038:
+	b	.L3128
+.L3132:
 	mla	r0, r0, r4, r8
 	cmp	r6, r0
-	bhi	.L3037
+	bhi	.L3131
 	ldr	r3, [sp, #36]
 	cmp	r3, r0
-	bls	.L3037
+	bls	.L3131
 	subs	r0, r0, r6
 	mov	r2, #512
 	movs	r1, #0
 	add	r0, r7, r0, lsl #9
 	bl	ftl_memset
-.L3037:
+.L3131:
 	add	r8, r8, #1
-	b	.L3036
-.L3035:
+	b	.L3130
+.L3129:
 	ldr	r2, [r10]
 	mov	r8, #36
 	mla	r8, r8, r5, r2
 	str	r3, [r8, #4]
 	ldr	r3, [sp, #40]
 	cmp	r4, r3
-	ldr	r3, .L3070+8
-	bne	.L3040
-	ldr	r2, .L3070+24
+	ldr	r3, .L3164+8
+	bne	.L3134
+	ldr	r2, .L3164+24
 	mov	r0, r6
 	ldrh	fp, [r3]
 	ldr	r2, [r2]
@@ -21527,11 +21948,11 @@ ftl_read:
 	movcs	r3, r2
 	cmp	fp, r3
 	str	r3, [sp, #48]
-	bne	.L3041
+	bne	.L3135
 	str	r7, [r8, #8]
-.L3041:
-	ldr	r3, .L3070+36
-	ldr	r2, .L3070+40
+.L3135:
+	ldr	r3, .L3164+36
+	ldr	r2, .L3164+40
 	str	r4, [r8, #16]
 	ldrh	r3, [r3]
 	ldr	r2, [r2]
@@ -21540,12 +21961,12 @@ ftl_read:
 	bic	r3, r3, #3
 	add	r3, r3, r2
 	str	r3, [r8, #12]
-	b	.L3039
-.L3040:
+	b	.L3133
+.L3134:
 	ldr	r2, [sp, #44]
 	cmp	r4, r2
-	bne	.L3042
-	ldr	r2, .L3070+44
+	bne	.L3136
+	ldr	r2, .L3164+44
 	ldr	r1, [sp, #36]
 	ldr	r2, [r2]
 	str	r2, [r8, #8]
@@ -21554,50 +21975,50 @@ ftl_read:
 	subs	r1, r1, r3
 	cmp	r2, r1
 	str	r1, [sp, #24]
-	bne	.L3041
-.L3068:
+	bne	.L3135
+.L3162:
 	subs	r3, r3, r6
 	add	r3, r7, r3, lsl #9
 	str	r3, [r8, #8]
-	b	.L3041
-.L3042:
+	b	.L3135
+.L3136:
 	ldrh	r3, [r3]
 	muls	r3, r4, r3
-	b	.L3068
-.L3045:
+	b	.L3162
+.L3139:
 	ldr	r1, [sp, #44]
 	cmp	r1, r2
-	bne	.L3046
+	bne	.L3140
 	ldr	r1, [r3, #8]
-	ldr	r3, .L3070+44
+	ldr	r3, .L3164+44
 	ldr	r3, [r3]
 	cmp	r1, r3
-	bne	.L3046
-	ldr	r3, .L3070+8
+	bne	.L3140
+	ldr	r3, .L3164+8
 	ldr	r2, [sp, #68]
 	ldrh	r0, [r3]
 	ldr	r3, [sp, #44]
 	muls	r0, r3, r0
 	subs	r0, r0, r6
 	add	r0, r7, r0, lsl #9
-	b	.L3069
-.L3048:
+	b	.L3163
+.L3142:
 	cmp	r3, #256
-	bne	.L3049
+	bne	.L3143
 	ldr	r0, [r2, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	mov	r8, r0
 	bl	FtlGcRefreshBlock
-	ldr	r2, .L3070+48
+	ldr	r2, .L3164+48
 	movw	r3, #2049
-.L3051:
+.L3145:
 	subs	r3, r3, #1
-	bne	.L3050
-.L3052:
+	bne	.L3144
+.L3146:
 	bl	FtlSysFlush
-	b	.L3049
-.L3050:
+	b	.L3143
+.L3144:
 	movs	r1, #1
 	str	r2, [sp, #76]
 	mov	r0, r1
@@ -21607,29 +22028,29 @@ ftl_read:
 	ldr	r3, [sp, #72]
 	ldrh	r1, [r2]
 	cmp	r1, r8
-	beq	.L3051
-	b	.L3052
-.L3055:
+	beq	.L3145
+	b	.L3146
+.L3149:
 	mov	r3, #-1
-.L3056:
+.L3150:
 	str	r3, [sp, #32]
-	b	.L3031
-.L3071:
+	b	.L3125
+.L3165:
 	.align	2
-.L3070:
+.L3164:
 	.word	.LANCHOR68
-	.word	.LANCHOR230
+	.word	.LANCHOR232
 	.word	.LANCHOR55
 	.word	.LANCHOR166
 	.word	.LANCHOR116
 	.word	.LANCHOR38
 	.word	.LANCHOR186
-	.word	.LC59
+	.word	.LC64
 	.word	.LANCHOR138
 	.word	.LANCHOR58
 	.word	.LANCHOR189
 	.word	.LANCHOR187
-	.word	.LANCHOR204
+	.word	.LANCHOR205
 	.word	.LANCHOR180
 	.size	ftl_read, .-ftl_read
 	.section	.text.FtlWrite,"ax",%progbits
@@ -21645,39 +22066,39 @@ FtlWrite:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, r3
-	ldr	r3, .L3120
+	ldr	r3, .L3214
 	sub	sp, sp, #80
 	mov	r6, r1
 	str	r2, [sp, #12]
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L3105
+	bne	.L3199
 	cmp	r0, #16
-	bne	.L3074
+	bne	.L3168
 	mov	r2, r10
 	ldr	r1, [sp, #12]
 	add	r0, r6, #256
 	bl	FtlVendorPartWrite
-.L3072:
+.L3166:
 	add	sp, sp, #80
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3074:
+.L3168:
 	ldr	r3, [sp, #12]
 	adds	r5, r1, r3
-	ldr	r3, .L3120+4
+	ldr	r3, .L3214+4
 	ldr	r3, [r3]
 	cmp	r5, r3
-	bhi	.L3106
-	ldr	r3, .L3120+8
+	bhi	.L3200
+	ldr	r3, .L3214+8
 	ldr	r0, [r3]
 	adds	r4, r0, #1
-	beq	.L3072
-	ldr	r3, .L3120+12
+	beq	.L3166
+	ldr	r3, .L3214+12
 	mov	r2, #2048
 	mov	r0, r6
 	str	r2, [r3]
-	ldr	r3, .L3120+16
+	ldr	r3, .L3214+16
 	ldrh	r4, [r3]
 	mov	r1, r4
 	bl	__aeabi_uidiv
@@ -21685,7 +22106,7 @@ FtlWrite:
 	mov	r8, r0
 	subs	r0, r5, #1
 	bl	__aeabi_uidiv
-	ldr	r2, .L3120+20
+	ldr	r2, .L3214+20
 	sub	r5, r0, r8
 	adds	r3, r5, #1
 	adds	r1, r5, #1
@@ -21694,29 +22115,29 @@ FtlWrite:
 	str	r0, [sp, #16]
 	add	r3, r3, r1
 	str	r3, [r2]
-	ldr	r3, .L3120+24
+	ldr	r3, .L3214+24
 	ldr	fp, [r3]
 	cmp	fp, #0
-	beq	.L3076
+	beq	.L3170
 	ldr	r3, [fp, #16]
 	cmp	r8, r3
-	beq	.L3077
+	beq	.L3171
 	bl	FtlCacheWriteBack
-.L3076:
-	ldr	r7, .L3120+28
+.L3170:
+	ldr	r7, .L3214+28
 	mov	r4, r8
-.L3078:
+.L3172:
 	ldr	r3, [sp, #4]
-	cbnz	r3, .L3104
+	cbnz	r3, .L3198
 	ldr	r3, [sp, #16]
 	ldr	r0, [sp, #4]
 	sub	r1, r3, r8
 	bl	rk_ftl_garbage_collect
-.L3105:
+.L3199:
 	movs	r0, #0
-	b	.L3072
-.L3077:
-	ldr	r2, .L3120+32
+	b	.L3166
+.L3171:
+	ldr	r2, .L3214+32
 	mov	r1, r4
 	mov	r0, r6
 	ldr	r3, [r2]
@@ -21736,7 +22157,7 @@ FtlWrite:
 	mov	r2, r7
 	bl	ftl_memcpy
 	cmp	r5, #0
-	beq	.L3105
+	beq	.L3199
 	ldr	r3, [sp, #12]
 	add	r6, r6, r4
 	add	r10, r10, r7
@@ -21745,27 +22166,27 @@ FtlWrite:
 	str	r3, [sp, #12]
 	bl	FtlCacheWriteBack
 	str	r5, [sp, #4]
-	b	.L3076
-.L3104:
-	ldr	r5, .L3120+36
+	b	.L3170
+.L3198:
+	ldr	r5, .L3214+36
 	ldrb	r2, [r7, #6]	@ zero_extendqisi2
 	ldrh	r3, [r5]
 	cmp	r2, r3
-	bcc	.L3079
-	ldr	r1, .L3120+40
-	movw	r2, #1668
-	ldr	r0, .L3120+44
+	bcc	.L3173
+	ldr	r1, .L3214+40
+	movw	r2, #1673
+	ldr	r0, .L3214+44
 	bl	printf
-	ldr	r1, .L3120+48
-	ldr	r0, .L3120+52
+	ldr	r1, .L3214+48
+	ldr	r0, .L3214+52
 	bl	printf
-.L3079:
+.L3173:
 	ldrh	r3, [r7, #4]
-	cbnz	r3, .L3080
+	cbnz	r3, .L3174
 	bl	FtlCacheWriteBack
 	mov	r0, r7
 	bl	allocate_new_data_superblock
-.L3080:
+.L3174:
 	ldrb	r3, [r7, #7]	@ zero_extendqisi2
 	ldrh	r2, [r7, #4]
 	lsls	r3, r3, #2
@@ -21780,24 +22201,24 @@ FtlWrite:
 	str	r3, [sp, #36]
 	ldrh	r3, [r5]
 	cmp	r2, r3
-	bcc	.L3081
-	ldr	r1, .L3120+40
-	movw	r2, #1701
-	ldr	r0, .L3120+44
+	bcc	.L3175
+	ldr	r1, .L3214+40
+	movw	r2, #1706
+	ldr	r0, .L3214+44
 	bl	printf
-	ldr	r1, .L3120+48
-	ldr	r0, .L3120+52
+	ldr	r1, .L3214+48
+	ldr	r0, .L3214+52
 	bl	printf
-.L3081:
+.L3175:
 	movs	r3, #0
-.L3119:
+.L3213:
 	str	r3, [sp, #8]
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #36]
 	cmp	r3, r2
-	bne	.L3102
-.L3083:
-	ldr	r0, .L3120+56
+	bne	.L3196
+.L3177:
+	ldr	r0, .L3214+56
 	mov	r3, r7
 	movs	r2, #0
 	ldr	r1, [sp, #8]
@@ -21806,24 +22227,24 @@ FtlWrite:
 	ldr	r3, [sp, #4]
 	ldr	r2, [sp, #8]
 	cmp	r3, r2
-	bcs	.L3103
-	ldr	r1, .L3120+40
-	movw	r2, #1790
-	ldr	r0, .L3120+44
+	bcs	.L3197
+	ldr	r1, .L3214+40
+	movw	r2, #1795
+	ldr	r0, .L3214+44
 	bl	printf
-	ldr	r1, .L3120+48
-	ldr	r0, .L3120+52
+	ldr	r1, .L3214+48
+	ldr	r0, .L3214+52
 	bl	printf
-.L3103:
+.L3197:
 	ldr	r3, [sp, #4]
 	ldr	r2, [sp, #8]
 	subs	r3, r3, r2
 	str	r3, [sp, #4]
-	b	.L3078
-.L3102:
+	b	.L3172
+.L3196:
 	ldrh	r3, [r7, #4]
 	cmp	r3, #0
-	beq	.L3083
+	beq	.L3177
 	movs	r2, #0
 	add	r1, sp, #40
 	mov	r0, r4
@@ -21832,9 +22253,9 @@ FtlWrite:
 	mov	r0, r7
 	bl	get_new_active_ppa
 	ldr	r3, [sp, #8]
-	ldr	r2, .L3120+60
+	ldr	r2, .L3214+60
 	muls	r5, r3, r5
-	ldr	r3, .L3120+56
+	ldr	r3, .L3214+56
 	ldrh	r2, [r2]
 	ldr	r1, [r3]
 	str	r3, [sp, #20]
@@ -21844,7 +22265,7 @@ FtlWrite:
 	str	r4, [r1, #16]
 	mul	r0, r2, r3
 	bic	r3, r0, #3
-	ldr	r0, .L3120+64
+	ldr	r0, .L3214+64
 	str	r3, [sp, #28]
 	ldr	r3, [r0]
 	ldr	r0, [sp, #28]
@@ -21855,12 +22276,12 @@ FtlWrite:
 	movs	r1, #0
 	bl	ftl_memset
 	cmp	r4, r8
-	ldr	r1, .L3120+16
-	beq	.L3084
+	ldr	r1, .L3214+16
+	beq	.L3178
 	ldr	r3, [sp, #16]
 	cmp	r3, r4
 	ldr	r3, [sp, #20]
-	bne	.L3115
+	bne	.L3209
 	ldr	r3, [sp, #12]
 	adds	r2, r6, r3
 	ldrh	r3, [r1]
@@ -21871,8 +22292,8 @@ FtlWrite:
 	str	r3, [sp, #20]
 	movs	r3, #0
 	str	r3, [sp, #24]
-	b	.L3087
-.L3084:
+	b	.L3181
+.L3178:
 	ldrh	r2, [r1]
 	mov	r0, r6
 	mov	r1, r2
@@ -21887,14 +22308,14 @@ FtlWrite:
 	it	cs
 	movcs	r3, r1
 	str	r3, [sp, #20]
-.L3087:
-	ldr	r3, .L3120+16
+.L3181:
+	ldr	r3, .L3214+16
 	ldr	r2, [sp, #20]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	ldr	r3, .L3120+56
+	ldr	r3, .L3214+56
 	ldr	r3, [r3]
-	bne	.L3088
+	bne	.L3182
 	cmp	r4, r8
 	add	r5, r5, r3
 	itett	ne
@@ -21905,25 +22326,25 @@ FtlWrite:
 	itt	ne
 	addne	r2, r10, r2, lsl #9
 	strne	r2, [r5, #8]
-.L3090:
-	ldr	r3, .L3120+36
+.L3184:
+	ldr	r3, .L3214+36
 	ldrb	r2, [r7, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L3099
-	ldr	r1, .L3120+40
-	movw	r2, #1775
-	ldr	r0, .L3120+44
+	bcc	.L3193
+	ldr	r1, .L3214+40
+	movw	r2, #1780
+	ldr	r0, .L3214+44
 	bl	printf
-	ldr	r1, .L3120+48
-	ldr	r0, .L3120+52
+	ldr	r1, .L3214+48
+	ldr	r0, .L3214+52
 	bl	printf
-.L3099:
+.L3193:
 	ldr	r2, [sp, #32]
 	movw	r3, #61589
 	ldr	r1, [sp, #28]
 	strh	r3, [r2, r1]	@ movhi
-	ldr	r2, .L3120+68
+	ldr	r2, .L3214+68
 	str	r4, [fp, #8]
 	adds	r4, r4, #1
 	ldr	r3, [r2]
@@ -21939,21 +22360,21 @@ FtlWrite:
 	strh	r3, [fp, #2]	@ movhi
 	ldr	r3, [sp, #8]
 	adds	r3, r3, #1
-	b	.L3119
-.L3121:
+	b	.L3213
+.L3215:
 	.align	2
-.L3120:
+.L3214:
 	.word	.LANCHOR76
 	.word	.LANCHOR68
-	.word	.LANCHOR230
-	.word	.LANCHOR246
+	.word	.LANCHOR232
+	.word	.LANCHOR249
 	.word	.LANCHOR55
 	.word	.LANCHOR162
 	.word	.LANCHOR132
 	.word	.LANCHOR91
 	.word	.LANCHOR164
 	.word	.LANCHOR38
-	.word	.LANCHOR247
+	.word	.LANCHOR250
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
@@ -21961,18 +22382,18 @@ FtlWrite:
 	.word	.LANCHOR58
 	.word	.LANCHOR189
 	.word	.LANCHOR160
-.L3088:
+.L3182:
 	cmp	r4, r8
 	add	r3, r3, r5
 	ite	eq
-	ldreq	r2, .L3122
-	ldrne	r2, .L3122+4
+	ldreq	r2, .L3216
+	ldrne	r2, .L3216+4
 	ldr	r2, [r2]
 	str	r2, [r3, #8]
 	ldr	r2, [sp, #40]
-	ldr	r3, .L3122+8
+	ldr	r3, .L3216+8
 	adds	r0, r2, #1
-	beq	.L3093
+	beq	.L3187
 	ldr	r3, [r3]
 	movs	r1, #1
 	str	r2, [sp, #48]
@@ -21987,60 +22408,60 @@ FtlWrite:
 	bl	FlashReadPages
 	ldr	r3, [sp, #44]
 	adds	r3, r3, #1
-	bne	.L3094
-	ldr	r2, .L3122+12
+	bne	.L3188
+	ldr	r2, .L3216+12
 	ldr	r3, [r2, #72]
 	adds	r3, r3, #1
 	str	r3, [r2, #72]
-.L3097:
+.L3191:
 	ldr	r2, [sp, #20]
 	cmp	r4, r8
-	ldr	r3, .L3122+8
+	ldr	r3, .L3216+8
 	lsl	r2, r2, #9
-	bne	.L3098
+	bne	.L3192
 	ldr	r3, [r3]
 	mov	r1, r10
 	add	r5, r5, r3
 	ldr	r3, [sp, #24]
 	ldr	r0, [r5, #8]
 	add	r0, r0, r3, lsl #9
-.L3117:
+.L3211:
 	bl	ftl_memcpy
-	b	.L3090
-.L3094:
+	b	.L3184
+.L3188:
 	ldr	r1, [fp, #8]
 	cmp	r4, r1
-	beq	.L3096
-	ldr	r2, .L3122+12
-	ldr	r0, .L3122+16
+	beq	.L3190
+	ldr	r2, .L3216+12
+	ldr	r0, .L3216+16
 	ldr	r3, [r2, #72]
 	adds	r3, r3, #1
 	str	r3, [r2, #72]
 	mov	r2, r4
 	bl	printf
-.L3096:
+.L3190:
 	ldr	r3, [fp, #8]
 	cmp	r4, r3
-	beq	.L3097
-	movw	r2, #1754
-	ldr	r1, .L3122+20
-	ldr	r0, .L3122+24
+	beq	.L3191
+	movw	r2, #1759
+	ldr	r1, .L3216+20
+	ldr	r0, .L3216+24
 	bl	printf
-	ldr	r1, .L3122+28
-	ldr	r0, .L3122+32
+	ldr	r1, .L3216+28
+	ldr	r0, .L3216+32
 	bl	printf
-	b	.L3097
-.L3093:
+	b	.L3191
+.L3187:
 	ldr	r3, [r3]
 	movs	r1, #0
-	ldr	r2, .L3122+36
+	ldr	r2, .L3216+36
 	add	r3, r3, r5
 	ldrh	r2, [r2]
 	ldr	r0, [r3, #8]
 	bl	ftl_memset
-	b	.L3097
-.L3098:
-	ldr	r1, .L3122+40
+	b	.L3191
+.L3192:
+	ldr	r1, .L3216+40
 	ldr	r3, [r3]
 	ldrh	r1, [r1]
 	add	r5, r5, r3
@@ -22048,8 +22469,8 @@ FtlWrite:
 	muls	r1, r4, r1
 	subs	r1, r1, r6
 	add	r1, r10, r1, lsl #9
-	b	.L3117
-.L3115:
+	b	.L3211
+.L3209:
 	ldr	r3, [r3]
 	add	r5, r5, r3
 	ldrh	r3, [r1]
@@ -22057,19 +22478,19 @@ FtlWrite:
 	subs	r3, r3, r6
 	add	r3, r10, r3, lsl #9
 	str	r3, [r5, #8]
-	b	.L3090
-.L3106:
+	b	.L3184
+.L3200:
 	mov	r0, #-1
-	b	.L3072
-.L3123:
+	b	.L3166
+.L3217:
 	.align	2
-.L3122:
+.L3216:
 	.word	.LANCHOR186
 	.word	.LANCHOR187
 	.word	.LANCHOR182
 	.word	.LANCHOR138
-	.word	.LC73
-	.word	.LANCHOR247
+	.word	.LC77
+	.word	.LANCHOR250
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
@@ -22134,204 +22555,48 @@ StorageSysDataStore:
 	.align	1
 	.global	FlashBootVendorWrite
 	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FlashBootVendorWrite, %function
-FlashBootVendorWrite:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	mov	r3, r2
-	mov	r1, r0
-	movs	r2, #1
-	movs	r0, #16
-	b	FtlWrite
-	.size	FlashBootVendorWrite, .-FlashBootVendorWrite
-	.section	.text.ftl_write,"ax",%progbits
-	.align	1
-	.global	ftl_write
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_write, %function
-ftl_write:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, lr}
-	mov	r7, r1
-	mov	r4, r2
-	mov	r5, r3
-	mov	r6, r0
-	cbnz	r0, .L3129
-	mov	r3, r2
-	mov	r2, r5
-	bl	idb_write_data
-.L3129:
-	mov	r3, r5
-	mov	r2, r4
-	mov	r1, r7
-	mov	r0, r6
-	pop	{r4, r5, r6, r7, r8, lr}
-	b	FtlWrite
-	.size	ftl_write, .-ftl_write
-	.section	.text.FtlCheckVpc,"ax",%progbits
-	.align	1
-	.global	FtlCheckVpc
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlCheckVpc, %function
-FtlCheckVpc:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r4, #0
-	ldr	r6, .L3154
-	ldr	r5, .L3154+4
-	ldr	r1, .L3154+8
-	ldr	r0, .L3154+12
-	bl	printf
-	mov	r2, #8192
-	movs	r1, #0
-	ldr	r0, .L3154+4
-	bl	memset
-.L3131:
-	ldr	r3, [r6]
-	cmp	r4, r3
-	bcc	.L3133
-	ldr	r7, .L3154+16
-	movs	r4, #0
-	ldr	r5, .L3154+20
-	movs	r2, #2
-	ldr	r10, .L3154+4
-	mov	r6, r4
-	ldr	fp, .L3154+60
-	mov	r8, r7
-	ldrh	r3, [r7]
-	ldr	r1, [r5]
-	ldr	r0, .L3154+24
-	bl	rknand_print_hex
-	ldrh	r3, [r7]
-	movs	r2, #2
-	ldr	r1, .L3154+4
-	ldr	r0, .L3154+28
-	bl	rknand_print_hex
-.L3134:
-	ldrh	r2, [r8]
-	uxth	r3, r4
-	cmp	r2, r3
-	bhi	.L3136
-	ldr	r3, .L3154+32
-	ldr	r4, [r3]
-	cbz	r4, .L3137
-	ldr	r3, .L3154+36
-	mov	r8, #0
-	ldr	r7, .L3154+40
-	ldr	fp, .L3154+64
-	ldrh	r10, [r3]
-	ldr	r3, [r7]
-	subs	r4, r4, r3
-	ldr	r3, .L3154+44
-	asrs	r4, r4, #1
-	muls	r4, r3, r4
-	uxth	r4, r4
-.L3138:
-	uxth	r3, r8
-	cmp	r10, r3
-	bls	.L3137
-	ldr	r3, [r5]
-	ldrh	r2, [r3, r4, lsl #1]
-	cbz	r2, .L3139
-	ldr	r3, .L3154+4
-	movs	r6, #1
-	mov	r1, r4
-	mov	r0, fp
-	ldrh	r3, [r3, r4, lsl #1]
-	bl	printf
-.L3139:
-	movs	r3, #6
-	ldr	r2, [r7]
-	muls	r4, r3, r4
-	movw	r3, #65535
-	add	r8, r8, #1
-	ldrh	r4, [r2, r4]
-	cmp	r4, r3
-	bne	.L3138
-.L3137:
-	cbz	r6, .L3130
-	ldr	r1, .L3154+8
-	movw	r2, #1686
-	ldr	r0, .L3154+48
-	bl	printf
-	ldr	r1, .L3154+52
-	ldr	r0, .L3154+56
-	bl	printf
-.L3130:
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3133:
-	movs	r2, #0
-	add	r1, sp, #4
-	mov	r0, r4
-	bl	log2phys
-	ldr	r0, [sp, #4]
-	adds	r3, r0, #1
-	beq	.L3132
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-	ldrh	r3, [r5, r0, lsl #1]
-	adds	r3, r3, #1
-	strh	r3, [r5, r0, lsl #1]	@ movhi
-.L3132:
-	adds	r4, r4, #1
-	b	.L3131
-.L3136:
-	ldr	r3, [r5]
-	uxth	r7, r4
-	ldrh	r2, [r3, r7, lsl #1]
-	ldrh	r3, [r10, r7, lsl #1]
-	cmp	r2, r3
-	beq	.L3135
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashBootVendorWrite, %function
+FlashBootVendorWrite:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r3, r2
+	mov	r1, r0
+	movs	r2, #1
+	movs	r0, #16
+	b	FtlWrite
+	.size	FlashBootVendorWrite, .-FlashBootVendorWrite
+	.section	.text.ftl_write,"ax",%progbits
+	.align	1
+	.global	ftl_write
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_write, %function
+ftl_write:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r7, r1
+	mov	r4, r2
+	mov	r5, r3
+	mov	r6, r0
+	cbnz	r0, .L3223
+	mov	r3, r2
+	mov	r2, r5
+	bl	idb_write_data
+.L3223:
+	mov	r3, r5
+	mov	r2, r4
 	mov	r1, r7
-	mov	r0, fp
-	bl	printf
-	ldr	r3, [r5]
-	movw	r2, #65535
-	ldrh	r3, [r3, r7, lsl #1]
-	cmp	r3, r2
-	beq	.L3135
-	ldrh	r2, [r10, r7, lsl #1]
-	cmp	r2, r3
-	it	hi
-	movhi	r6, #1
-.L3135:
-	adds	r4, r4, #1
-	b	.L3134
-.L3155:
-	.align	2
-.L3154:
-	.word	.LANCHOR72
-	.word	check_valid_page_count_table
-	.word	.LANCHOR248
-	.word	.LC45
-	.word	.LANCHOR40
-	.word	.LANCHOR83
-	.word	.LC74
-	.word	.LC75
-	.word	.LANCHOR87
-	.word	.LANCHOR88
-	.word	.LANCHOR81
-	.word	-1431655765
-	.word	.LC5
-	.word	.LC6
-	.word	.LC7
-	.word	.LC76
-	.word	.LC77
-	.size	FtlCheckVpc, .-FtlCheckVpc
+	mov	r0, r6
+	pop	{r4, r5, r6, r7, r8, lr}
+	b	FtlWrite
+	.size	ftl_write, .-ftl_write
 	.section	.text.FtlDumpSysBlock,"ax",%progbits
 	.align	1
 	.global	FtlDumpSysBlock
@@ -22345,27 +22610,27 @@ FtlDumpSysBlock:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	lsl	r10, r0, #10
-	ldr	r5, .L3163
+	ldr	r5, .L3231
 	sub	sp, sp, #24
 	mov	r7, r0
 	movs	r6, #0
-	ldr	r4, .L3163+4
+	ldr	r4, .L3231+4
 	ldr	r3, [r5]
-	ldr	r8, .L3163+20
+	ldr	r8, .L3231+20
 	mov	fp, r4
 	str	r3, [r4, #8]
-	ldr	r3, .L3163+8
+	ldr	r3, .L3231+8
 	ldr	r3, [r3]
 	str	r3, [r4, #12]
-.L3157:
+.L3225:
 	ldrh	r2, [r8]
 	sxth	r3, r6
 	cmp	r3, r2
-	blt	.L3159
+	blt	.L3227
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3159:
+.L3227:
 	movs	r2, #1
 	orr	r3, r3, r10
 	mov	r1, r2
@@ -22375,7 +22640,7 @@ FtlDumpSysBlock:
 	ldr	r2, [r4, #8]
 	mov	r1, r7
 	ldr	r3, [r4, #12]
-	ldr	r0, .L3163+12
+	ldr	r0, .L3231+12
 	ldr	r2, [r2]
 	str	r2, [sp, #16]
 	ldr	r2, [r3, #12]
@@ -22391,20 +22656,20 @@ FtlDumpSysBlock:
 	ldr	r3, [r4, #12]
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L3158
+	beq	.L3226
 	mov	r3, #768
 	movs	r2, #4
 	ldr	r1, [r5]
-	ldr	r0, .L3163+16
+	ldr	r0, .L3231+16
 	bl	rknand_print_hex
-.L3158:
+.L3226:
 	adds	r6, r6, #1
-	b	.L3157
-.L3164:
+	b	.L3225
+.L3232:
 	.align	2
-.L3163:
+.L3231:
 	.word	.LANCHOR183
-	.word	.LANCHOR202
+	.word	.LANCHOR203
 	.word	.LANCHOR188
 	.word	.LC78
 	.word	.LC79
@@ -22421,32 +22686,32 @@ FtlDumpSysBlock:
 dump_map_info:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L3179
+	ldr	r3, .L3247
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #40
-	ldr	r8, .L3179+72
+	ldr	r8, .L3247+72
 	ldrh	r5, [r3]
-.L3166:
-	ldr	r3, .L3179+4
+.L3234:
+	ldr	r3, .L3247+4
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	bhi	.L3173
-	ldr	r4, .L3179+8
+	bhi	.L3241
+	ldr	r4, .L3247+8
 	movs	r7, #0
-.L3174:
-	ldr	r3, .L3179+12
+.L3242:
+	ldr	r3, .L3247+12
 	sxth	r5, r7
 	ldrh	r3, [r3]
 	cmp	r5, r3
-	bge	.L3177
+	bge	.L3245
 	lsls	r5, r5, #1
 	movs	r6, #0
-	ldr	r8, .L3179+76
-	b	.L3178
-.L3168:
+	ldr	r8, .L3247+76
+	b	.L3246
+.L3236:
 	str	r3, [sp, #36]
 	mov	r1, r5
-	ldr	r3, .L3179+16
+	ldr	r3, .L3247+16
 	str	r2, [sp, #32]
 	ldrb	r0, [r3, r6]	@ zero_extendqisi2
 	bl	V2P_block
@@ -22454,7 +22719,7 @@ dump_map_info:
 	bl	FtlBbmIsBadBlock
 	ldr	r2, [sp, #32]
 	ldr	r3, [sp, #36]
-	cbnz	r0, .L3167
+	cbnz	r0, .L3235
 	ldr	r1, [sp, #28]
 	mla	r0, fp, r4, r7
 	lsls	r1, r1, #10
@@ -22467,29 +22732,29 @@ dump_map_info:
 	ldr	r1, [sp, #24]
 	add	r1, r1, ip
 	str	r1, [r0, #12]
-.L3167:
+.L3235:
 	adds	r6, r6, #1
-.L3175:
+.L3243:
 	uxth	r1, r6
 	cmp	r2, r1
-	bhi	.L3168
-	cbnz	r4, .L3169
-.L3172:
+	bhi	.L3236
+	cbnz	r4, .L3237
+.L3240:
 	adds	r5, r5, #1
 	uxth	r5, r5
-	b	.L3166
-.L3169:
-	ldr	r10, .L3179+80
+	b	.L3234
+.L3237:
+	ldr	r10, .L3247+80
 	mov	r0, r7
 	movs	r6, #0
 	movs	r7, #36
 	movs	r2, #1
 	mov	r1, r4
 	bl	FlashReadPages
-.L3170:
+.L3238:
 	uxth	r3, r6
 	cmp	r4, r3
-	bls	.L3172
+	bls	.L3240
 	ldr	r3, [r8]
 	mla	r3, r7, r6, r3
 	adds	r6, r6, #1
@@ -22510,24 +22775,24 @@ dump_map_info:
 	ldr	r3, [r1]
 	ubfx	r1, r2, #10, #16
 	bl	printf
-	b	.L3170
-.L3173:
-	ldr	r1, .L3179+20
+	b	.L3238
+.L3241:
+	ldr	r1, .L3247+20
 	movs	r6, #0
-	ldr	r3, .L3179+24
+	ldr	r3, .L3247+24
 	mov	r4, r6
 	ldr	r7, [r8]
 	mov	fp, #36
 	ldr	r1, [r1]
 	ldrh	r2, [r3]
-	ldr	r3, .L3179+28
+	ldr	r3, .L3247+28
 	str	r1, [sp, #24]
-	ldr	r1, .L3179+32
+	ldr	r1, .L3247+32
 	ldr	r3, [r3]
 	ldrh	r10, [r1]
-	b	.L3175
-.L3176:
-	ldr	r10, .L3179+44
+	b	.L3243
+.L3244:
+	ldr	r10, .L3247+44
 	mov	r0, r4
 	ldr	r2, [r10]
 	ldrh	r2, [r2, r5]
@@ -22543,7 +22808,7 @@ dump_map_info:
 	ldrh	r1, [r1, r5]
 	str	r0, [sp, #20]
 	ldr	r2, [r2]
-	ldr	r0, .L3179+36
+	ldr	r0, .L3247+36
 	str	r2, [sp, #16]
 	ldr	r2, [r3, #12]
 	str	r2, [sp, #12]
@@ -22555,44 +22820,44 @@ dump_map_info:
 	str	r3, [sp]
 	ldm	r4, {r2, r3}
 	bl	printf
-.L3178:
+.L3246:
 	ldrh	r2, [r8]
 	sxth	r3, r6
 	adds	r6, r6, #1
 	cmp	r3, r2
-	blt	.L3176
+	blt	.L3244
 	adds	r7, r7, #1
-	b	.L3174
-.L3177:
-	ldr	r3, .L3179+40
+	b	.L3242
+.L3245:
+	ldr	r3, .L3247+40
 	movs	r2, #2
-	ldr	r1, .L3179+44
-	ldr	r0, .L3179+48
+	ldr	r1, .L3247+44
+	ldr	r0, .L3247+48
 	ldr	r3, [r3]
 	ldr	r1, [r1]
 	bl	rknand_print_hex
-	ldr	r4, .L3179+52
+	ldr	r4, .L3247+52
 	movs	r2, #4
-	ldr	r1, .L3179+56
-	ldr	r0, .L3179+60
+	ldr	r1, .L3247+56
+	ldr	r0, .L3247+60
 	ldrh	r3, [r4]
 	ldr	r1, [r1]
 	bl	rknand_print_hex
-	ldr	r1, .L3179+64
+	ldr	r1, .L3247+64
 	movs	r2, #4
 	ldrh	r3, [r4]
-	ldr	r0, .L3179+68
+	ldr	r0, .L3247+68
 	ldr	r1, [r1]
 	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
 	b	rknand_print_hex
-.L3180:
+.L3248:
 	.align	2
-.L3179:
+.L3247:
 	.word	.LANCHOR40
 	.word	.LANCHOR41
-	.word	.LANCHOR202
+	.word	.LANCHOR203
 	.word	.LANCHOR128
 	.word	.LANCHOR47
 	.word	.LANCHOR105
@@ -22805,6 +23070,7 @@ dump_map_info:
 	.global	gReadRetryInfo
 	.global	gpNandParaInfo
 	.global	gNandOptPara
+	.global	g_nand_ecc_en
 	.global	g_slc2KBNand
 	.global	g_maxRetryCount
 	.global	g_maxRegNum
@@ -22935,7 +23201,7 @@ c_ftl_nand_data_blks_per_plane:
 	.space	2
 	.section	.bss.c_ftl_nand_data_op_blks_per_plane,"aw",%nobits
 	.align	1
-	.set	.LANCHOR223,. + 0
+	.set	.LANCHOR224,. + 0
 	.type	c_ftl_nand_data_op_blks_per_plane, %object
 	.size	c_ftl_nand_data_op_blks_per_plane, 2
 c_ftl_nand_data_op_blks_per_plane:
@@ -23137,7 +23403,7 @@ gBbtInfo:
 	.space	60
 	.section	.bss.gBlockPageAlignSize,"aw",%nobits
 	.align	2
-	.set	.LANCHOR3,. + 0
+	.set	.LANCHOR4,. + 0
 	.type	gBlockPageAlignSize, %object
 	.size	gBlockPageAlignSize, 4
 gBlockPageAlignSize:
@@ -23247,14 +23513,14 @@ gMasterTempBuf:
 gMultiPageProgEn:
 	.space	1
 	.section	.bss.gMultiPageReadEn,"aw",%nobits
-	.set	.LANCHOR201,. + 0
+	.set	.LANCHOR202,. + 0
 	.type	gMultiPageReadEn, %object
 	.size	gMultiPageReadEn, 1
 gMultiPageReadEn:
 	.space	1
 	.section	.bss.gNandChipMap,"aw",%nobits
 	.align	2
-	.set	.LANCHOR6,. + 0
+	.set	.LANCHOR0,. + 0
 	.type	gNandChipMap, %object
 	.size	gNandChipMap, 32
 gNandChipMap:
@@ -23297,7 +23563,7 @@ gNandFlashInfoBlockEcc:
 gNandFlashResEndPageAddr:
 	.space	4
 	.section	.bss.gNandIDBResBlkNum,"aw",%nobits
-	.set	.LANCHOR2,. + 0
+	.set	.LANCHOR3,. + 0
 	.type	gNandIDBResBlkNum, %object
 	.size	gNandIDBResBlkNum, 1
 gNandIDBResBlkNum:
@@ -23341,7 +23607,7 @@ gNandOptPara:
 gNandPhyInfo:
 	.space	28
 	.section	.bss.gNandRandomizer,"aw",%nobits
-	.set	.LANCHOR5,. + 0
+	.set	.LANCHOR6,. + 0
 	.type	gNandRandomizer, %object
 	.size	gNandRandomizer, 1
 gNandRandomizer:
@@ -23382,7 +23648,7 @@ gSysFreeQueue:
 	.space	2056
 	.section	.bss.gSysInfo,"aw",%nobits
 	.align	2
-	.set	.LANCHOR209,. + 0
+	.set	.LANCHOR210,. + 0
 	.type	gSysInfo, %object
 	.size	gSysInfo, 16
 gSysInfo:
@@ -23402,7 +23668,7 @@ gTotleBlock:
 	.space	2
 	.section	.bss.gVendorBlkInfo,"aw",%nobits
 	.align	2
-	.set	.LANCHOR215,. + 0
+	.set	.LANCHOR216,. + 0
 	.type	gVendorBlkInfo, %object
 	.size	gVendorBlkInfo, 44
 gVendorBlkInfo:
@@ -23423,7 +23689,7 @@ g_GlobalSysVersion:
 	.space	4
 	.section	.bss.g_LowFormat,"aw",%nobits
 	.align	2
-	.set	.LANCHOR244,. + 0
+	.set	.LANCHOR247,. + 0
 	.type	g_LowFormat, %object
 	.size	g_LowFormat, 4
 g_LowFormat:
@@ -23437,7 +23703,7 @@ g_MaxLbaSector:
 	.space	4
 	.section	.bss.g_MaxLbn,"aw",%nobits
 	.align	2
-	.set	.LANCHOR222,. + 0
+	.set	.LANCHOR223,. + 0
 	.type	g_MaxLbn, %object
 	.size	g_MaxLbn, 4
 g_MaxLbn:
@@ -23500,7 +23766,7 @@ g_ect_tbl_info_size:
 	.space	2
 	.section	.bss.g_ect_tbl_power_up_flush,"aw",%nobits
 	.align	1
-	.set	.LANCHOR218,. + 0
+	.set	.LANCHOR219,. + 0
 	.type	g_ect_tbl_power_up_flush, %object
 	.size	g_ect_tbl_power_up_flush, 2
 g_ect_tbl_power_up_flush:
@@ -23521,7 +23787,7 @@ g_free_slc_blk_num:
 	.space	2
 	.section	.bss.g_ftl_nand_free_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR246,. + 0
+	.set	.LANCHOR249,. + 0
 	.type	g_ftl_nand_free_count, %object
 	.size	g_ftl_nand_free_count, 4
 g_ftl_nand_free_count:
@@ -23563,14 +23829,14 @@ g_gc_blk_num:
 	.space	2
 	.section	.bss.g_gc_cur_blk_max_valid_pages,"aw",%nobits
 	.align	1
-	.set	.LANCHOR242,. + 0
+	.set	.LANCHOR245,. + 0
 	.type	g_gc_cur_blk_max_valid_pages, %object
 	.size	g_gc_cur_blk_max_valid_pages, 2
 g_gc_cur_blk_max_valid_pages:
 	.space	2
 	.section	.bss.g_gc_cur_blk_valid_pages,"aw",%nobits
 	.align	1
-	.set	.LANCHOR241,. + 0
+	.set	.LANCHOR244,. + 0
 	.type	g_gc_cur_blk_valid_pages, %object
 	.size	g_gc_cur_blk_valid_pages, 2
 g_gc_cur_blk_valid_pages:
@@ -23667,7 +23933,7 @@ g_gc_skip_write_count:
 	.space	4
 	.section	.bss.g_gc_superblock,"aw",%nobits
 	.align	2
-	.set	.LANCHOR204,. + 0
+	.set	.LANCHOR205,. + 0
 	.type	g_gc_superblock, %object
 	.size	g_gc_superblock, 48
 g_gc_superblock:
@@ -23733,6 +23999,12 @@ g_max_erase_count:
 	.size	g_min_erase_count, 4
 g_min_erase_count:
 	.space	4
+	.section	.bss.g_nand_ecc_en,"aw",%nobits
+	.set	.LANCHOR200,. + 0
+	.type	g_nand_ecc_en, %object
+	.size	g_nand_ecc_en, 1
+g_nand_ecc_en:
+	.space	1
 	.section	.bss.g_nandc_version_data,"aw",%nobits
 	.align	2
 	.set	.LANCHOR119,. + 0
@@ -23763,14 +24035,14 @@ g_page_map_check_enable:
 	.space	2
 	.section	.bss.g_power_lost_ecc_error_blk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR234,. + 0
+	.set	.LANCHOR237,. + 0
 	.type	g_power_lost_ecc_error_blk, %object
 	.size	g_power_lost_ecc_error_blk, 2
 g_power_lost_ecc_error_blk:
 	.space	2
 	.section	.bss.g_power_lost_recovery_flag,"aw",%nobits
 	.align	1
-	.set	.LANCHOR235,. + 0
+	.set	.LANCHOR238,. + 0
 	.type	g_power_lost_recovery_flag, %object
 	.size	g_power_lost_recovery_flag, 2
 g_power_lost_recovery_flag:
@@ -23784,14 +24056,14 @@ g_recovery_page_min_ver:
 	.space	4
 	.section	.bss.g_recovery_page_num,"aw",%nobits
 	.align	2
-	.set	.LANCHOR236,. + 0
+	.set	.LANCHOR239,. + 0
 	.type	g_recovery_page_num, %object
 	.size	g_recovery_page_num, 4
 g_recovery_page_num:
 	.space	4
 	.section	.bss.g_recovery_ppa_tbl,"aw",%nobits
 	.align	2
-	.set	.LANCHOR237,. + 0
+	.set	.LANCHOR240,. + 0
 	.type	g_recovery_ppa_tbl, %object
 	.size	g_recovery_ppa_tbl, 128
 g_recovery_ppa_tbl:
@@ -23810,7 +24082,7 @@ g_req_cache:
 g_retryMode:
 	.space	1
 	.section	.bss.g_slc2KBNand,"aw",%nobits
-	.set	.LANCHOR1,. + 0
+	.set	.LANCHOR2,. + 0
 	.type	g_slc2KBNand, %object
 	.size	g_slc2KBNand, 1
 g_slc2KBNand:
@@ -23838,7 +24110,7 @@ g_tmp_data_superblock_id:
 	.space	2
 	.section	.bss.g_totle_avg_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR205,. + 0
+	.set	.LANCHOR206,. + 0
 	.type	g_totle_avg_erase_count, %object
 	.size	g_totle_avg_erase_count, 4
 g_totle_avg_erase_count:
@@ -23894,7 +24166,7 @@ g_totle_read_page_count:
 	.space	4
 	.section	.bss.g_totle_read_sector,"aw",%nobits
 	.align	2
-	.set	.LANCHOR217,. + 0
+	.set	.LANCHOR218,. + 0
 	.type	g_totle_read_sector, %object
 	.size	g_totle_read_sector, 4
 g_totle_read_sector:
@@ -23936,21 +24208,21 @@ g_totle_write_page_count:
 	.space	4
 	.section	.bss.g_totle_write_sector,"aw",%nobits
 	.align	2
-	.set	.LANCHOR216,. + 0
+	.set	.LANCHOR217,. + 0
 	.type	g_totle_write_sector, %object
 	.size	g_totle_write_sector, 4
 g_totle_write_sector:
 	.space	4
 	.section	.bss.gc_discard_updated,"aw",%nobits
 	.align	2
-	.set	.LANCHOR231,. + 0
+	.set	.LANCHOR233,. + 0
 	.type	gc_discard_updated, %object
 	.size	gc_discard_updated, 4
 gc_discard_updated:
 	.space	4
 	.section	.bss.gc_ink_free_return_value,"aw",%nobits
 	.align	1
-	.set	.LANCHOR240,. + 0
+	.set	.LANCHOR243,. + 0
 	.type	gc_ink_free_return_value, %object
 	.size	gc_ink_free_return_value, 2
 gc_ink_free_return_value:
@@ -24011,7 +24283,7 @@ gp_gc_page_buf_info:
 	.space	4
 	.section	.bss.gp_last_act_superblock,"aw",%nobits
 	.align	2
-	.set	.LANCHOR229,. + 0
+	.set	.LANCHOR231,. + 0
 	.type	gp_last_act_superblock, %object
 	.size	gp_last_act_superblock, 4
 gp_last_act_superblock:
@@ -24045,7 +24317,7 @@ mlcPageToSlcPageTbl:
 	.space	1024
 	.section	.bss.p_blk_mode_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR0,. + 0
+	.set	.LANCHOR1,. + 0
 	.type	p_blk_mode_table, %object
 	.size	p_blk_mode_table, 4
 p_blk_mode_table:
@@ -24308,7 +24580,7 @@ req_read:
 	.space	4
 	.section	.bss.req_sys,"aw",%nobits
 	.align	2
-	.set	.LANCHOR202,. + 0
+	.set	.LANCHOR203,. + 0
 	.type	req_sys, %object
 	.size	req_sys, 36
 req_sys:
@@ -26759,14 +27031,14 @@ ToshibaRefValue:
 	.byte	112
 	.section	.data.ftl_gc_temp_block_bops_scan_page_addr,"aw",%progbits
 	.align	1
-	.set	.LANCHOR238,. + 0
+	.set	.LANCHOR241,. + 0
 	.type	ftl_gc_temp_block_bops_scan_page_addr, %object
 	.size	ftl_gc_temp_block_bops_scan_page_addr, 2
 ftl_gc_temp_block_bops_scan_page_addr:
 	.short	-1
 	.section	.data.gFtlInitStatus,"aw",%progbits
 	.align	2
-	.set	.LANCHOR230,. + 0
+	.set	.LANCHOR232,. + 0
 	.type	gFtlInitStatus, %object
 	.size	gFtlInitStatus, 4
 gFtlInitStatus:
@@ -26801,7 +27073,7 @@ gNandParaInfo:
 	.space	4
 	.section	.data.gSlcNandParaInfo,"aw",%progbits
 	.align	1
-	.set	.LANCHOR200,. + 0
+	.set	.LANCHOR201,. + 0
 	.type	gSlcNandParaInfo, %object
 	.size	gSlcNandParaInfo, 32
 gSlcNandParaInfo:
@@ -26839,7 +27111,7 @@ power_up_flag:
 	.word	1
 	.section	.data.random_seed,"aw",%progbits
 	.align	1
-	.set	.LANCHOR4,. + 0
+	.set	.LANCHOR5,. + 0
 	.type	random_seed, %object
 	.size	random_seed, 256
 random_seed:
@@ -27029,7 +27301,7 @@ refValueDefault:
 .LC32:
 	.ascii	"prog read d error: = %x %x %x\012\000"
 	.section	.rodata.FlashReadFacBbtData.str1.1,"aMS",%progbits,1
-.LC52:
+.LC55:
 	.ascii	"BBT:\000"
 	.section	.rodata.FlashReadIdbDataRaw.str1.1,"aMS",%progbits,1
 .LC14:
@@ -27059,13 +27331,9 @@ refValueDefault:
 .LC35:
 	.ascii	"FtlBbmTblFlush error = %x error count = %d\012\000"
 	.section	.rodata.FtlCheckVpc.str1.1,"aMS",%progbits,1
-.LC74:
-	.ascii	"vpc1\000"
-.LC75:
-	.ascii	"vpc2\000"
-.LC76:
+.LC60:
 	.ascii	"FtlCheckVpc2 %x = %x  %x\012\000"
-.LC77:
+.LC61:
 	.ascii	"free blk vpc error %x = %x  %x\012\000"
 	.section	.rodata.FtlDumpBlockInfo.str1.1,"aMS",%progbits,1
 .LC45:
@@ -27090,20 +27358,20 @@ refValueDefault:
 	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\012"
 	.ascii	"\000"
 	.section	.rodata.FtlGcFreeTempBlock.str1.1,"aMS",%progbits,1
-.LC65:
+.LC70:
 	.ascii	"GC des block %x done\012\000"
 	.section	.rodata.FtlGcScanTempBlk.str1.1,"aMS",%progbits,1
-.LC63:
+.LC68:
 	.ascii	"FtlGcScanTempBlk Error ID %x %x!!!!!!! \012\000"
-.LC64:
+.LC69:
 	.ascii	"FtlGcScanTempBlkError ID %x %x!!!!!!!\012\000"
 	.section	.rodata.FtlInit.str1.1,"aMS",%progbits,1
-.LC67:
-	.ascii	"FTL version: 5.0.53 20190107\000"
-.LC68:
+.LC71:
+	.ascii	"FTL version: 5.0.56 20190508\000"
+.LC72:
 	.ascii	"...%s: no bad block mapping table, format device\012"
 	.ascii	"\000"
-.LC69:
+.LC73:
 	.ascii	"...%s FtlSysBlkInit error ,format device!\012\000"
 	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",%progbits,1
 .LC43:
@@ -27114,14 +27382,14 @@ refValueDefault:
 .LC41:
 	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
 	.section	.rodata.FtlProgPages.str1.1,"aMS",%progbits,1
-.LC56:
+.LC59:
 	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
 	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",%progbits,1
-.LC60:
+.LC65:
 	.ascii	"RSB refresh addr %x\012\000"
-.LC61:
+.LC66:
 	.ascii	"spuer block %x vpn is 0\012 \000"
-.LC62:
+.LC67:
 	.ascii	"g_recovery_ppa %x ver %x\012 \000"
 	.section	.rodata.FtlScanAllBlock.str1.1,"aMS",%progbits,1
 .LC49:
@@ -27139,17 +27407,17 @@ refValueDefault:
 .LC38:
 	.ascii	"FtlVpcTblFlush error = %x error count = %d\012\000"
 	.section	.rodata.FtlWrite.str1.1,"aMS",%progbits,1
-.LC73:
+.LC77:
 	.ascii	"FtlWrite: lpa error:%x %x\012\000"
 	.section	.rodata.Ftl_load_ext_data.str1.1,"aMS",%progbits,1
 .LC44:
 	.ascii	"slc mode\000"
 	.section	.rodata.Ftlscanalldata.str1.1,"aMS",%progbits,1
-.LC57:
+.LC62:
 	.ascii	"Ftlscanalldata = %x\012\000"
-.LC58:
+.LC63:
 	.ascii	"scan lpa = %x ppa= %x\012\000"
-.LC59:
+.LC64:
 	.ascii	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\012"
 	.ascii	"\000"
 	.section	.rodata.HynixGetReadRetryDefault.str1.1,"aMS",%progbits,1
@@ -27167,203 +27435,209 @@ refValueDefault:
 	.section	.rodata.MicronReadRetrial.str1.1,"aMS",%progbits,1
 .LC13:
 	.ascii	"micron RR %d row=%x,count %d,status=%d\012\000"
-	.section	.rodata.__func__.10518,"a",%progbits
-	.set	.LANCHOR245,. + 0
-	.type	__func__.10518, %object
-	.size	__func__.10518, 8
-__func__.10518:
+	.section	.rodata.__func__.10524,"a",%progbits
+	.set	.LANCHOR248,. + 0
+	.type	__func__.10524, %object
+	.size	__func__.10524, 8
+__func__.10524:
 	.ascii	"FtlInit\000"
-	.section	.rodata.__func__.10578,"a",%progbits
-	.set	.LANCHOR228,. + 0
-	.type	__func__.10578, %object
-	.size	__func__.10578, 13
-__func__.10578:
+	.section	.rodata.__func__.10585,"a",%progbits
+	.set	.LANCHOR230,. + 0
+	.type	__func__.10585, %object
+	.size	__func__.10585, 13
+__func__.10585:
 	.ascii	"FtlProgPages\000"
-	.section	.rodata.__func__.10604,"a",%progbits
-	.set	.LANCHOR247,. + 0
-	.type	__func__.10604, %object
-	.size	__func__.10604, 9
-__func__.10604:
+	.section	.rodata.__func__.10611,"a",%progbits
+	.set	.LANCHOR250,. + 0
+	.type	__func__.10611, %object
+	.size	__func__.10611, 9
+__func__.10611:
 	.ascii	"FtlWrite\000"
-	.section	.rodata.__func__.10687,"a",%progbits
+	.section	.rodata.__func__.10694,"a",%progbits
 	.set	.LANCHOR124,. + 0
-	.type	__func__.10687, %object
-	.size	__func__.10687, 14
-__func__.10687:
+	.type	__func__.10694, %object
+	.size	__func__.10694, 14
+__func__.10694:
 	.ascii	"FtlBbt2Bitmap\000"
-	.section	.rodata.__func__.10733,"a",%progbits
-	.set	.LANCHOR211,. + 0
-	.type	__func__.10733, %object
-	.size	__func__.10733, 11
-__func__.10733:
+	.section	.rodata.__func__.10740,"a",%progbits
+	.set	.LANCHOR212,. + 0
+	.type	__func__.10740, %object
+	.size	__func__.10740, 11
+__func__.10740:
 	.ascii	"FtlLoadBbt\000"
-	.section	.rodata.__func__.10826,"a",%progbits
+	.section	.rodata.__func__.10833,"a",%progbits
 	.set	.LANCHOR89,. + 0
-	.type	__func__.10826, %object
-	.size	__func__.10826, 17
-__func__.10826:
+	.type	__func__.10833, %object
+	.size	__func__.10833, 17
+__func__.10833:
 	.ascii	"INSERT_FREE_LIST\000"
-	.section	.rodata.__func__.10830,"a",%progbits
+	.section	.rodata.__func__.10837,"a",%progbits
 	.set	.LANCHOR86,. + 0
-	.type	__func__.10830, %object
-	.size	__func__.10830, 17
-__func__.10830:
+	.type	__func__.10837, %object
+	.size	__func__.10837, 17
+__func__.10837:
 	.ascii	"INSERT_DATA_LIST\000"
-	.section	.rodata.__func__.10867,"a",%progbits
+	.section	.rodata.__func__.10874,"a",%progbits
 	.set	.LANCHOR90,. + 0
-	.type	__func__.10867, %object
-	.size	__func__.10867, 17
-__func__.10867:
+	.type	__func__.10874, %object
+	.size	__func__.10874, 17
+__func__.10874:
 	.ascii	"List_remove_node\000"
-	.section	.rodata.__func__.10897,"a",%progbits
-	.set	.LANCHOR94,. + 0
-	.type	__func__.10897, %object
-	.size	__func__.10897, 22
-__func__.10897:
-	.ascii	"List_update_data_list\000"
 	.section	.rodata.__func__.10904,"a",%progbits
-	.set	.LANCHOR227,. + 0
+	.set	.LANCHOR94,. + 0
 	.type	__func__.10904, %object
-	.size	__func__.10904, 20
+	.size	__func__.10904, 22
 __func__.10904:
+	.ascii	"List_update_data_list\000"
+	.section	.rodata.__func__.10911,"a",%progbits
+	.set	.LANCHOR229,. + 0
+	.type	__func__.10911, %object
+	.size	__func__.10911, 20
+__func__.10911:
 	.ascii	"ftl_load_l2p_region\000"
-	.section	.rodata.__func__.10935,"a",%progbits
+	.section	.rodata.__func__.10942,"a",%progbits
 	.set	.LANCHOR95,. + 0
-	.type	__func__.10935, %object
-	.size	__func__.10935, 26
-__func__.10935:
+	.type	__func__.10942, %object
+	.size	__func__.10942, 26
+__func__.10942:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.section	.rodata.__func__.10945,"a",%progbits
-	.set	.LANCHOR212,. + 0
-	.type	__func__.10945, %object
-	.size	__func__.10945, 15
-__func__.10945:
-	.ascii	"ftl_map_blk_gc\000"
-	.section	.rodata.__func__.10958,"a",%progbits
+	.section	.rodata.__func__.10952,"a",%progbits
 	.set	.LANCHOR213,. + 0
-	.type	__func__.10958, %object
-	.size	__func__.10958, 31
-__func__.10958:
-	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.section	.rodata.__func__.10971,"a",%progbits
+	.type	__func__.10952, %object
+	.size	__func__.10952, 15
+__func__.10952:
+	.ascii	"ftl_map_blk_gc\000"
+	.section	.rodata.__func__.10965,"a",%progbits
 	.set	.LANCHOR214,. + 0
-	.type	__func__.10971, %object
-	.size	__func__.10971, 16
-__func__.10971:
+	.type	__func__.10965, %object
+	.size	__func__.10965, 31
+__func__.10965:
+	.ascii	"Ftl_write_map_blk_to_last_page\000"
+	.section	.rodata.__func__.10978,"a",%progbits
+	.set	.LANCHOR215,. + 0
+	.type	__func__.10978, %object
+	.size	__func__.10978, 16
+__func__.10978:
 	.ascii	"FtlMapWritePage\000"
-	.section	.rodata.__func__.10991,"a",%progbits
+	.section	.rodata.__func__.10998,"a",%progbits
 	.set	.LANCHOR98,. + 0
-	.type	__func__.10991, %object
-	.size	__func__.10991, 22
-__func__.10991:
+	.type	__func__.10998, %object
+	.size	__func__.10998, 22
+__func__.10998:
 	.ascii	"select_l2p_ram_region\000"
-	.section	.rodata.__func__.11007,"a",%progbits
-	.set	.LANCHOR226,. + 0
-	.type	__func__.11007, %object
-	.size	__func__.11007, 9
-__func__.11007:
+	.section	.rodata.__func__.11014,"a",%progbits
+	.set	.LANCHOR228,. + 0
+	.type	__func__.11014, %object
+	.size	__func__.11014, 9
+__func__.11014:
 	.ascii	"log2phys\000"
-	.section	.rodata.__func__.11069,"a",%progbits
-	.set	.LANCHOR210,. + 0
-	.type	__func__.11069, %object
-	.size	__func__.11069, 15
-__func__.11069:
+	.section	.rodata.__func__.11076,"a",%progbits
+	.set	.LANCHOR211,. + 0
+	.type	__func__.11076, %object
+	.size	__func__.11076, 15
+__func__.11076:
 	.ascii	"FtlVpcTblFlush\000"
-	.section	.rodata.__func__.11088,"a",%progbits
-	.set	.LANCHOR220,. + 0
-	.type	__func__.11088, %object
-	.size	__func__.11088, 14
-__func__.11088:
-	.ascii	"FtlScanSysBlk\000"
-	.section	.rodata.__func__.11143,"a",%progbits
+	.section	.rodata.__func__.11095,"a",%progbits
 	.set	.LANCHOR221,. + 0
-	.type	__func__.11143, %object
-	.size	__func__.11143, 15
-__func__.11143:
+	.type	__func__.11095, %object
+	.size	__func__.11095, 14
+__func__.11095:
+	.ascii	"FtlScanSysBlk\000"
+	.section	.rodata.__func__.11150,"a",%progbits
+	.set	.LANCHOR222,. + 0
+	.type	__func__.11150, %object
+	.size	__func__.11150, 15
+__func__.11150:
 	.ascii	"FtlLoadSysInfo\000"
-	.section	.rodata.__func__.11154,"a",%progbits
-	.set	.LANCHOR248,. + 0
-	.type	__func__.11154, %object
-	.size	__func__.11154, 12
-__func__.11154:
+	.section	.rodata.__func__.11161,"a",%progbits
+	.set	.LANCHOR234,. + 0
+	.type	__func__.11161, %object
+	.size	__func__.11161, 12
+__func__.11161:
 	.ascii	"FtlCheckVpc\000"
-	.section	.rodata.__func__.11186,"a",%progbits
-	.set	.LANCHOR224,. + 0
-	.type	__func__.11186, %object
-	.size	__func__.11186, 17
-__func__.11186:
-	.ascii	"FtlDumpBlockInfo\000"
-	.section	.rodata.__func__.11205,"a",%progbits
+	.section	.rodata.__func__.11193,"a",%progbits
 	.set	.LANCHOR225,. + 0
-	.type	__func__.11205, %object
-	.size	__func__.11205, 16
-__func__.11205:
+	.type	__func__.11193, %object
+	.size	__func__.11193, 17
+__func__.11193:
+	.ascii	"FtlDumpBlockInfo\000"
+	.section	.rodata.__func__.11212,"a",%progbits
+	.set	.LANCHOR226,. + 0
+	.type	__func__.11212, %object
+	.size	__func__.11212, 16
+__func__.11212:
 	.ascii	"FtlScanAllBlock\000"
-	.section	.rodata.__func__.11310,"a",%progbits
-	.set	.LANCHOR232,. + 0
-	.type	__func__.11310, %object
-	.size	__func__.11310, 16
-__func__.11310:
+	.section	.rodata.__func__.11317,"a",%progbits
+	.set	.LANCHOR235,. + 0
+	.type	__func__.11317, %object
+	.size	__func__.11317, 16
+__func__.11317:
 	.ascii	"FtlReUsePrevPpa\000"
-	.section	.rodata.__func__.11343,"a",%progbits
-	.set	.LANCHOR233,. + 0
-	.type	__func__.11343, %object
-	.size	__func__.11343, 22
-__func__.11343:
+	.section	.rodata.__func__.11350,"a",%progbits
+	.set	.LANCHOR236,. + 0
+	.type	__func__.11350, %object
+	.size	__func__.11350, 22
+__func__.11350:
 	.ascii	"FtlRecoverySuperblock\000"
-	.section	.rodata.__func__.11397,"a",%progbits
+	.section	.rodata.__func__.11404,"a",%progbits
 	.set	.LANCHOR101,. + 0
-	.type	__func__.11397, %object
-	.size	__func__.11397, 16
-__func__.11397:
+	.type	__func__.11404, %object
+	.size	__func__.11404, 16
+__func__.11404:
 	.ascii	"make_superblock\000"
-	.section	.rodata.__func__.11417,"a",%progbits
+	.section	.rodata.__func__.11424,"a",%progbits
 	.set	.LANCHOR140,. + 0
-	.type	__func__.11417, %object
-	.size	__func__.11417, 18
-__func__.11417:
+	.type	__func__.11424, %object
+	.size	__func__.11424, 18
+__func__.11424:
 	.ascii	"SupperBlkListInit\000"
-	.section	.rodata.__func__.11494,"a",%progbits
-	.set	.LANCHOR203,. + 0
-	.type	__func__.11494, %object
-	.size	__func__.11494, 25
-__func__.11494:
+	.section	.rodata.__func__.11468,"a",%progbits
+	.set	.LANCHOR227,. + 0
+	.type	__func__.11468, %object
+	.size	__func__.11468, 17
+__func__.11468:
+	.ascii	"ftl_scan_all_ppa\000"
+	.section	.rodata.__func__.11513,"a",%progbits
+	.set	.LANCHOR204,. + 0
+	.type	__func__.11513, %object
+	.size	__func__.11513, 25
+__func__.11513:
 	.ascii	"allocate_data_superblock\000"
-	.section	.rodata.__func__.11508,"a",%progbits
-	.set	.LANCHOR219,. + 0
-	.type	__func__.11508, %object
-	.size	__func__.11508, 29
-__func__.11508:
+	.section	.rodata.__func__.11527,"a",%progbits
+	.set	.LANCHOR220,. + 0
+	.type	__func__.11527, %object
+	.size	__func__.11527, 29
+__func__.11527:
 	.ascii	"allocate_new_data_superblock\000"
-	.section	.rodata.__func__.11514,"a",%progbits
-	.set	.LANCHOR208,. + 0
-	.type	__func__.11514, %object
-	.size	__func__.11514, 19
-__func__.11514:
+	.section	.rodata.__func__.11533,"a",%progbits
+	.set	.LANCHOR209,. + 0
+	.type	__func__.11533, %object
+	.size	__func__.11533, 19
+__func__.11533:
 	.ascii	"get_new_active_ppa\000"
-	.section	.rodata.__func__.11525,"a",%progbits
-	.set	.LANCHOR206,. + 0
-	.type	__func__.11525, %object
-	.size	__func__.11525, 16
-__func__.11525:
-	.ascii	"update_vpc_list\000"
-	.section	.rodata.__func__.11530,"a",%progbits
+	.section	.rodata.__func__.11544,"a",%progbits
 	.set	.LANCHOR207,. + 0
-	.type	__func__.11530, %object
-	.size	__func__.11530, 20
-__func__.11530:
+	.type	__func__.11544, %object
+	.size	__func__.11544, 16
+__func__.11544:
+	.ascii	"update_vpc_list\000"
+	.section	.rodata.__func__.11549,"a",%progbits
+	.set	.LANCHOR208,. + 0
+	.type	__func__.11549, %object
+	.size	__func__.11549, 20
+__func__.11549:
 	.ascii	"decrement_vpc_count\000"
-	.section	.rodata.__func__.11598,"a",%progbits
-	.set	.LANCHOR239,. + 0
-	.type	__func__.11598, %object
-	.size	__func__.11598, 19
-__func__.11598:
+	.section	.rodata.__func__.11617,"a",%progbits
+	.set	.LANCHOR242,. + 0
+	.type	__func__.11617, %object
+	.size	__func__.11617, 19
+__func__.11617:
 	.ascii	"FtlGcFreeTempBlock\000"
-	.section	.rodata.__func__.11697,"a",%progbits
-	.set	.LANCHOR243,. + 0
-	.type	__func__.11697, %object
-	.size	__func__.11697, 23
-__func__.11697:
+	.section	.rodata.__func__.11717,"a",%progbits
+	.set	.LANCHOR246,. + 0
+	.type	__func__.11717, %object
+	.size	__func__.11717, 23
+__func__.11717:
 	.ascii	"rk_ftl_garbage_collect\000"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",%progbits,1
 .LC36:
@@ -27381,9 +27655,9 @@ __func__.11697:
 .LC83:
 	.ascii	"L2PC:\000"
 	.section	.rodata.ftl_fix_nand_power_lost_error.str1.1,"aMS",%progbits,1
-.LC71:
+.LC75:
 	.ascii	"fix power lost blk = %x vpc=%x\012\000"
-.LC72:
+.LC76:
 	.ascii	"erase power lost blk = %x vpc=%x\012\000"
 	.section	.rodata.ftl_map_blk_alloc_new_blk.str1.1,"aMS",%progbits,1
 .LC8:
@@ -27391,6 +27665,14 @@ __func__.11697:
 	.section	.rodata.ftl_map_blk_gc.str1.1,"aMS",%progbits,1
 .LC39:
 	.ascii	"page map lost: %x %x\012\000"
+	.section	.rodata.ftl_scan_all_ppa.str1.1,"aMS",%progbits,1
+.LC52:
+	.ascii	"ftl_scan_all_ppa blk %x page %x\012\000"
+.LC53:
+	.ascii	"addr= %x, status= %d,spare= %x %x %x %x data=%x %x\012"
+	.ascii	"\000"
+.LC54:
+	.ascii	"%s finished\012\000"
 	.section	.rodata.idb_write_data.str1.1,"aMS",%progbits,1
 .LC15:
 	.ascii	"1 write_idblock fix data %x %x %x\012\000"
@@ -27399,17 +27681,14 @@ __func__.11697:
 .LC17:
 	.ascii	"write_idblock fail! %x\012\000"
 	.section	.rodata.log2phys.str1.1,"aMS",%progbits,1
-.LC53:
+.LC56:
 	.ascii	"region_id = %x phyAddr = %x\012\000"
-.LC54:
+.LC57:
 	.ascii	"map_ppn:\000"
-.LC55:
+.LC58:
 	.ascii	"load_l2p_region refresh = %x phyAddr = %x\012\000"
-	.section	.rodata.rk_ftl_garbage_collect.str1.1,"aMS",%progbits,1
-.LC66:
-	.ascii	"g_gc_superblock_free %x %x %x %x %x\012\000"
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",%progbits,1
-.LC70:
+.LC74:
 	.ascii	"FtlInit %x\012\000"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",%progbits,1
 .LC18:
diff --git a/drivers/rknand/rk_ftl_arm_v8.S b/drivers/rknand/rk_ftl_arm_v8.S
index 06eaf15721..4b2ecaf29d 100644
--- a/drivers/rknand/rk_ftl_arm_v8.S
+++ b/drivers/rknand/rk_ftl_arm_v8.S
@@ -5,18 +5,54 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2019-01-07
+ * date: 2019-05-08
  */
 	.arch armv8-a
-	.file	"rk_ftl_arm_v8.c"
+	.file	"rk_ftl_arm_v8.S"
+	.section	.text.flash_read_ecc,"ax",@progbits
+	.align	2
+	.type	flash_read_ecc, %function
+flash_read_ecc:
+	ubfiz	x0, x0, 4, 8
+	adrp	x1, .LANCHOR0
+	add	x1, x1, :lo12:.LANCHOR0
+	stp	x29, x30, [sp, -32]!
+	add	x2, x1, x0
+	add	x29, sp, 0
+	ldr	x0, [x1, x0]
+	str	x19, [sp, 16]
+	ldrb	w19, [x2, 8]
+	add	x19, x0, x19, lsl 8
+	mov	w0, 122
+	str	w0, [x19, 2056]
+	mov	x0, 80
+	bl	udelay
+	ldr	w1, [x19, 2048]
+	ldr	w0, [x19, 2048]
+	and	w1, w1, 15
+	and	w0, w0, 15
+	cmp	w1, w0
+	csel	w1, w1, w0, cs
+	ldr	w0, [x19, 2048]
+	ldr	w2, [x19, 2048]
+	and	w0, w0, 15
+	ldr	x19, [sp, 16]
+	and	w2, w2, 15
+	cmp	w0, w2
+	csel	w0, w0, w2, cs
+	cmp	w0, w1
+	csel	w0, w0, w1, cs
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	flash_read_ecc, .-flash_read_ecc
 	.section	.text.ftl_set_blk_mode.part.10,"ax",@progbits
 	.align	2
 	.type	ftl_set_blk_mode.part.10, %function
 ftl_set_blk_mode.part.10:
 	and	w0, w0, 65535
-	adrp	x2, .LANCHOR0
+	adrp	x2, .LANCHOR1
 	ubfx	x1, x0, 5, 11
-	ldr	x3, [x2, #:lo12:.LANCHOR0]
+	ldr	x3, [x2, #:lo12:.LANCHOR1]
 	lsl	x1, x1, 2
 	and	w0, w0, 31
 	mov	w2, 1
@@ -31,29 +67,29 @@ ftl_set_blk_mode.part.10:
 	.global	FlashMemCmp8
 	.type	FlashMemCmp8, %function
 FlashMemCmp8:
-	adrp	x3, .LANCHOR1
-	ldrb	w3, [x3, #:lo12:.LANCHOR1]
-	cbz	w3, .L7
+	adrp	x3, .LANCHOR2
+	ldrb	w3, [x3, #:lo12:.LANCHOR2]
+	cbz	w3, .L9
 	ldrb	w4, [x0, 1]
 	ldrb	w3, [x1, 1]
 	cmp	w4, w3
-	beq	.L8
-.L7:
+	beq	.L10
+.L9:
 	mov	x3, 0
-.L5:
+.L7:
 	mov	w4, w3
 	cmp	w3, w2
-	bcc	.L6
-.L8:
+	bcc	.L8
+.L10:
 	mov	w0, 0
 	ret
-.L6:
+.L8:
 	ldrb	w5, [x0, x3]
 	add	x3, x3, 1
 	add	x6, x1, x3
 	ldrb	w6, [x6, -1]
 	cmp	w6, w5
-	beq	.L5
+	beq	.L7
 	add	w0, w4, 1
 	ret
 	.size	FlashMemCmp8, .-FlashMemCmp8
@@ -62,18 +98,18 @@ FlashMemCmp8:
 	.global	FlashRsvdBlkChk
 	.type	FlashRsvdBlkChk, %function
 FlashRsvdBlkChk:
-	adrp	x2, .LANCHOR2
-	adrp	x3, .LANCHOR3
+	adrp	x2, .LANCHOR3
+	adrp	x3, .LANCHOR4
 	and	w0, w0, 255
-	ldrb	w2, [x2, #:lo12:.LANCHOR2]
-	ldr	w3, [x3, #:lo12:.LANCHOR3]
+	ldrb	w2, [x2, #:lo12:.LANCHOR3]
+	ldr	w3, [x3, #:lo12:.LANCHOR4]
 	mul	w2, w2, w3
 	cmp	w2, w1
-	bls	.L12
+	bls	.L14
 	cmp	w0, 0
 	cset	w0, ne
 	ret
-.L12:
+.L14:
 	mov	w0, 1
 	ret
 	.size	FlashRsvdBlkChk, .-FlashRsvdBlkChk
@@ -83,12 +119,12 @@ FlashRsvdBlkChk:
 	.type	FlashGetRandomizer, %function
 FlashGetRandomizer:
 	and	x3, x1, 127
-	adrp	x2, .LANCHOR4
-	add	x2, x2, :lo12:.LANCHOR4
-	ldrh	w4, [x2, x3, lsl 1]
 	adrp	x2, .LANCHOR5
-	ldrb	w2, [x2, #:lo12:.LANCHOR5]
-	cbz	w2, .L21
+	add	x2, x2, :lo12:.LANCHOR5
+	ldrh	w4, [x2, x3, lsl 1]
+	adrp	x2, .LANCHOR6
+	ldrb	w2, [x2, #:lo12:.LANCHOR6]
+	cbz	w2, .L23
 	stp	x29, x30, [sp, -16]!
 	and	w0, w0, 255
 	add	x29, sp, 0
@@ -99,7 +135,7 @@ FlashGetRandomizer:
 	mov	w0, w4
 	ldp	x29, x30, [sp], 16
 	ret
-.L21:
+.L23:
 	mov	w0, w4
 	ret
 	.size	FlashGetRandomizer, .-FlashGetRandomizer
@@ -110,30 +146,30 @@ FlashGetRandomizer:
 FlashSetRandomizer:
 	and	w5, w0, 255
 	and	x2, x1, 127
-	adrp	x0, .LANCHOR4
-	add	x0, x0, :lo12:.LANCHOR4
-	ldrh	w4, [x0, x2, lsl 1]
 	adrp	x0, .LANCHOR5
-	ldrb	w0, [x0, #:lo12:.LANCHOR5]
-	cbz	w0, .L32
+	add	x0, x0, :lo12:.LANCHOR5
+	ldrh	w4, [x0, x2, lsl 1]
+	adrp	x0, .LANCHOR6
+	ldrb	w0, [x0, #:lo12:.LANCHOR6]
+	cbz	w0, .L34
 	stp	x29, x30, [sp, -16]!
 	mov	w0, w5
 	add	x29, sp, 0
 	bl	FlashRsvdBlkChk
 	cmp	w0, 0
 	sbfiz	x5, x5, 4, 32
-	adrp	x0, .LANCHOR6
-	add	x0, x0, :lo12:.LANCHOR6
+	adrp	x0, .LANCHOR0
+	add	x0, x0, :lo12:.LANCHOR0
 	orr	w1, w4, -1073741824
 	csel	w4, w1, w4, ne
 	ldr	x0, [x0, x5]
 	str	w4, [x0, 336]
 	ldp	x29, x30, [sp], 16
 	ret
-.L32:
+.L34:
 	sbfiz	x5, x5, 4, 32
-	adrp	x0, .LANCHOR6
-	add	x0, x0, :lo12:.LANCHOR6
+	adrp	x0, .LANCHOR0
+	add	x0, x0, :lo12:.LANCHOR0
 	ldr	x0, [x0, x5]
 	str	w4, [x0, 336]
 	ret
@@ -144,18 +180,18 @@ FlashSetRandomizer:
 	.type	FlashBlockAlignInit, %function
 FlashBlockAlignInit:
 	and	w0, w0, 65535
-	adrp	x1, .LANCHOR3
+	adrp	x1, .LANCHOR4
 	cmp	w0, 256
-	bls	.L36
+	bls	.L38
 	mov	w0, 512
-.L39:
-	str	w0, [x1, #:lo12:.LANCHOR3]
+.L41:
+	str	w0, [x1, #:lo12:.LANCHOR4]
 	ret
-.L36:
+.L38:
 	cmp	w0, 128
-	bls	.L39
+	bls	.L41
 	mov	w0, 256
-	b	.L39
+	b	.L41
 	.size	FlashBlockAlignInit, .-FlashBlockAlignInit
 	.section	.text.FlashReadCmd,"ax",@progbits
 	.align	2
@@ -163,9 +199,9 @@ FlashBlockAlignInit:
 	.type	FlashReadCmd, %function
 FlashReadCmd:
 	and	w0, w0, 255
-	adrp	x4, .LANCHOR6
+	adrp	x4, .LANCHOR0
 	sbfiz	x5, x0, 4, 32
-	add	x4, x4, :lo12:.LANCHOR6
+	add	x4, x4, :lo12:.LANCHOR0
 	add	x2, x4, x5
 	lsr	w3, w1, 16
 	ldr	x4, [x4, x5]
@@ -189,9 +225,9 @@ FlashReadCmd:
 	.type	FlashReadDpDataOutCmd, %function
 FlashReadDpDataOutCmd:
 	and	w0, w0, 255
-	adrp	x2, .LANCHOR6
+	adrp	x2, .LANCHOR0
 	sbfiz	x3, x0, 4, 32
-	add	x2, x2, :lo12:.LANCHOR6
+	add	x2, x2, :lo12:.LANCHOR0
 	add	x4, x2, x3
 	and	w5, w1, 255
 	ldr	x6, [x2, x3]
@@ -202,7 +238,7 @@ FlashReadDpDataOutCmd:
 	ldrb	w2, [x4, 8]
 	lsr	w4, w1, 8
 	add	x2, x6, x2, lsl 8
-	bne	.L42
+	bne	.L44
 	mov	w6, 6
 	str	w6, [x2, 2056]
 	str	wzr, [x2, 2052]
@@ -210,11 +246,11 @@ FlashReadDpDataOutCmd:
 	str	w5, [x2, 2052]
 	str	w4, [x2, 2052]
 	str	w3, [x2, 2052]
-.L44:
+.L46:
 	mov	w3, 224
 	str	w3, [x2, 2056]
 	b	FlashSetRandomizer
-.L42:
+.L44:
 	str	wzr, [x2, 2056]
 	str	wzr, [x2, 2052]
 	str	wzr, [x2, 2052]
@@ -225,7 +261,7 @@ FlashReadDpDataOutCmd:
 	str	w3, [x2, 2056]
 	str	wzr, [x2, 2052]
 	str	wzr, [x2, 2052]
-	b	.L44
+	b	.L46
 	.size	FlashReadDpDataOutCmd, .-FlashReadDpDataOutCmd
 	.section	.text.FlashProgFirstCmd,"ax",@progbits
 	.align	2
@@ -233,9 +269,9 @@ FlashReadDpDataOutCmd:
 	.type	FlashProgFirstCmd, %function
 FlashProgFirstCmd:
 	and	w0, w0, 255
-	adrp	x4, .LANCHOR6
+	adrp	x4, .LANCHOR0
 	sbfiz	x5, x0, 4, 32
-	add	x4, x4, :lo12:.LANCHOR6
+	add	x4, x4, :lo12:.LANCHOR0
 	add	x2, x4, x5
 	lsr	w3, w1, 16
 	ldr	x4, [x4, x5]
@@ -258,12 +294,12 @@ FlashProgFirstCmd:
 	.type	FlashEraseCmd, %function
 FlashEraseCmd:
 	ubfiz	x0, x0, 4, 8
-	adrp	x3, .LANCHOR6
-	add	x3, x3, :lo12:.LANCHOR6
+	adrp	x3, .LANCHOR0
+	add	x3, x3, :lo12:.LANCHOR0
 	add	x4, x3, x0
 	ldr	x3, [x3, x0]
 	ldrb	w0, [x4, 8]
-	cbz	w2, .L47
+	cbz	w2, .L49
 	add	x2, x3, x0, lsl 8
 	mov	w4, 96
 	str	w4, [x2, 2056]
@@ -273,10 +309,10 @@ FlashEraseCmd:
 	str	w4, [x2, 2052]
 	lsr	w4, w1, 16
 	str	w4, [x2, 2052]
-	adrp	x2, .LANCHOR3
-	ldr	w2, [x2, #:lo12:.LANCHOR3]
+	adrp	x2, .LANCHOR4
+	ldr	w2, [x2, #:lo12:.LANCHOR4]
 	add	w1, w1, w2
-.L47:
+.L49:
 	add	x0, x3, x0, lsl 8
 	mov	w2, 96
 	str	w2, [x0, 2056]
@@ -298,8 +334,8 @@ FlashProgDpSecondCmd:
 	and	w0, w0, 255
 	adrp	x2, .LANCHOR7+11
 	sbfiz	x5, x0, 4, 32
-	adrp	x4, .LANCHOR6
-	add	x4, x4, :lo12:.LANCHOR6
+	adrp	x4, .LANCHOR0
+	add	x4, x4, :lo12:.LANCHOR0
 	ldrb	w6, [x2, #:lo12:.LANCHOR7+11]
 	add	x2, x4, x5
 	lsr	w3, w1, 16
@@ -322,8 +358,8 @@ FlashProgDpSecondCmd:
 	.type	FlashProgSecondCmd, %function
 FlashProgSecondCmd:
 	ubfiz	x0, x0, 4, 8
-	adrp	x1, .LANCHOR6
-	add	x1, x1, :lo12:.LANCHOR6
+	adrp	x1, .LANCHOR0
+	add	x1, x1, :lo12:.LANCHOR0
 	add	x2, x1, x0
 	ldr	x1, [x1, x0]
 	ldrb	w0, [x2, 8]
@@ -339,8 +375,8 @@ FlashProgSecondCmd:
 	.type	FlashProgDpFirstCmd, %function
 FlashProgDpFirstCmd:
 	ubfiz	x0, x0, 4, 8
-	adrp	x1, .LANCHOR6
-	add	x1, x1, :lo12:.LANCHOR6
+	adrp	x1, .LANCHOR0
+	add	x1, x1, :lo12:.LANCHOR0
 	add	x3, x1, x0
 	ldr	x2, [x1, x0]
 	adrp	x0, .LANCHOR7+10
@@ -357,8 +393,8 @@ FlashProgDpFirstCmd:
 	.type	FlashReadStatus, %function
 FlashReadStatus:
 	ubfiz	x0, x0, 4, 8
-	adrp	x1, .LANCHOR6
-	add	x1, x1, :lo12:.LANCHOR6
+	adrp	x1, .LANCHOR0
+	add	x1, x1, :lo12:.LANCHOR0
 	stp	x29, x30, [sp, -32]!
 	add	x2, x1, x0
 	add	x29, sp, 0
@@ -384,18 +420,18 @@ js_hash:
 	mov	w0, 42982
 	mov	x3, 0
 	movk	w0, 0x47c6, lsl 16
-.L57:
+.L59:
 	cmp	w1, w3
-	bhi	.L58
+	bhi	.L60
 	ret
-.L58:
+.L60:
 	lsr	w2, w0, 2
 	ldrb	w5, [x4, x3]
 	add	w2, w2, w0, lsl 5
 	add	x3, x3, 1
 	add	w2, w2, w5
 	eor	w0, w0, w2
-	b	.L57
+	b	.L59
 	.size	js_hash, .-js_hash
 	.section	.text.FlashLoadIdbInfo,"ax",@progbits
 	.align	2
@@ -443,10 +479,10 @@ ToshibaSetRRPara:
 	add	x24, x24, x2
 	mov	x22, x0
 	mov	x19, 0
-.L62:
+.L64:
 	ldrb	w0, [x23]
 	cmp	w0, w19
-	bhi	.L66
+	bhi	.L68
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -454,7 +490,7 @@ ToshibaSetRRPara:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L66:
+.L68:
 	mov	w0, 85
 	str	w0, [x21, 8]
 	add	x0, x22, :lo12:.LANCHOR9
@@ -464,20 +500,20 @@ ToshibaSetRRPara:
 	bl	udelay
 	ldrb	w0, [x25]
 	cmp	w0, 34
-	bne	.L63
+	bne	.L65
 	ldrsb	w0, [x24, x19]
-.L68:
+.L70:
 	add	x19, x19, 1
 	str	w0, [x21]
-	b	.L62
-.L63:
+	b	.L64
+.L65:
 	cmp	w0, 35
-	bne	.L65
+	bne	.L67
 	ldrsb	w0, [x20, x19]
-	b	.L68
-.L65:
+	b	.L70
+.L67:
 	ldrsb	w0, [x26, w27, sxtw]
-	b	.L68
+	b	.L70
 	.size	ToshibaSetRRPara, .-ToshibaSetRRPara
 	.section	.text.SamsungSetRRPara,"ax",@progbits
 	.align	2
@@ -500,16 +536,16 @@ SamsungSetRRPara:
 	add	x23, x23, :lo12:.LANCHOR12
 	mov	x20, 0
 	mov	w24, 161
-.L70:
+.L72:
 	ldrb	w0, [x23]
 	cmp	w0, w20
-	bhi	.L71
+	bhi	.L73
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L71:
+.L73:
 	str	w24, [x22, 8]
 	str	wzr, [x22]
 	ldrsb	w0, [x20, x19]
@@ -519,7 +555,7 @@ SamsungSetRRPara:
 	str	w0, [x22]
 	mov	x0, 300
 	bl	udelay
-	b	.L70
+	b	.L72
 	.size	SamsungSetRRPara, .-SamsungSetRRPara
 	.section	.text.LogAddr2PhyAddr,"ax",@progbits
 	.align	2
@@ -533,10 +569,10 @@ LogAddr2PhyAddr:
 	ldrh	w5, [x6, 14]
 	mul	w5, w5, w8
 	and	w8, w5, 65535
-	adrp	x5, .LANCHOR3
-	ldrh	w7, [x5, #:lo12:.LANCHOR3]
-	adrp	x5, .LANCHOR1
-	ldrb	w6, [x5, #:lo12:.LANCHOR1]
+	adrp	x5, .LANCHOR4
+	ldrh	w7, [x5, #:lo12:.LANCHOR4]
+	adrp	x5, .LANCHOR2
+	ldrb	w6, [x5, #:lo12:.LANCHOR2]
 	ubfiz	w5, w7, 1, 15
 	cmp	w6, 1
 	ldr	w6, [x0, 4]
@@ -548,14 +584,14 @@ LogAddr2PhyAddr:
 	and	w10, w5, 65535
 	msub	w5, w5, w8, w11
 	and	w5, w5, 65535
-	bne	.L75
+	bne	.L77
 	adrp	x1, .LANCHOR15
 	ldrb	w1, [x1, #:lo12:.LANCHOR15]
-	cbnz	w1, .L75
+	cbnz	w1, .L77
 	adrp	x1, .LANCHOR16
 	add	x1, x1, :lo12:.LANCHOR16
 	ldrh	w6, [x1, w6, sxtw 1]
-.L75:
+.L77:
 	uxtw	x8, w10
 	adrp	x1, .LANCHOR17
 	add	x1, x1, :lo12:.LANCHOR17
@@ -565,14 +601,14 @@ LogAddr2PhyAddr:
 	add	w5, w5, w6
 	str	w5, [x2]
 	str	w10, [x3]
-	bls	.L77
+	bls	.L79
 	ldr	w1, [x0, 4]
 	ldr	w0, [x0, 60]
 	add	w1, w1, 1024
 	cmp	w1, w0
 	cset	w0, eq
 	ret
-.L77:
+.L79:
 	mov	w0, 0
 	ret
 	.size	LogAddr2PhyAddr, .-LogAddr2PhyAddr
@@ -583,8 +619,8 @@ LogAddr2PhyAddr:
 FlashReadStatusEN:
 	stp	x29, x30, [sp, -32]!
 	ubfiz	x0, x0, 4, 8
-	adrp	x3, .LANCHOR6
-	add	x3, x3, :lo12:.LANCHOR6
+	adrp	x3, .LANCHOR0
+	add	x3, x3, :lo12:.LANCHOR0
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	add	x4, x3, x0
@@ -594,26 +630,26 @@ FlashReadStatusEN:
 	ldrb	w19, [x4, 8]
 	ldrb	w0, [x0, 8]
 	cmp	w0, 2
-	bne	.L79
+	bne	.L81
 	and	w2, w2, 255
 	adrp	x0, .LANCHOR7
-	cbnz	w2, .L80
+	cbnz	w2, .L82
 	add	x2, x0, :lo12:.LANCHOR7
 	ldrb	w3, [x2, 13]
-.L90:
+.L92:
 	add	x2, x19, 8
 	add	x0, x0, :lo12:.LANCHOR7
 	add	x2, x20, x2, lsl 8
 	str	w3, [x2, 8]
 	ldrb	w4, [x0, 15]
-	cbz	w4, .L84
+	cbz	w4, .L86
 	add	x3, x19, 8
 	mov	w2, 0
 	add	x3, x20, x3, lsl 8
-.L83:
+.L85:
 	cmp	w2, w4
-	bcc	.L85
-.L84:
+	bcc	.L87
+.L86:
 	add	x19, x19, 8
 	mov	x0, 80
 	lsl	x19, x19, 8
@@ -623,23 +659,23 @@ FlashReadStatusEN:
 	and	w0, w0, 255
 	ldp	x29, x30, [sp], 32
 	ret
-.L80:
+.L82:
 	add	x2, x0, :lo12:.LANCHOR7
 	ldrb	w3, [x2, 14]
-	b	.L90
-.L85:
+	b	.L92
+.L87:
 	lsl	w0, w2, 3
 	add	w2, w2, 1
 	lsr	w0, w1, w0
 	and	w0, w0, 255
 	str	w0, [x3, 4]
-	b	.L83
-.L79:
+	b	.L85
+.L81:
 	add	x0, x19, 8
 	mov	w1, 112
 	add	x0, x20, x0, lsl 8
 	str	w1, [x0, 8]
-	b	.L84
+	b	.L86
 	.size	FlashReadStatusEN, .-FlashReadStatusEN
 	.section	.text.FlashWaitReadyEN,"ax",@progbits
 	.align	2
@@ -653,15 +689,15 @@ FlashWaitReadyEN:
 	str	x21, [sp, 32]
 	mov	w20, w1
 	and	w21, w2, 255
-.L95:
+.L97:
 	mov	w1, w20
 	mov	w2, w21
 	mov	w0, w19
 	bl	FlashReadStatusEN
 	mov	w1, w0
 	cmp	w0, 255
-	beq	.L95
-	tbz	x1, 6, .L95
+	beq	.L97
+	tbz	x1, 6, .L97
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -680,8 +716,8 @@ NandcReadDontCaseBusyEn:
 	.type	NandcGetChipIf, %function
 NandcGetChipIf:
 	ubfiz	x0, x0, 4, 8
-	adrp	x1, .LANCHOR6
-	add	x1, x1, :lo12:.LANCHOR6
+	adrp	x1, .LANCHOR0
+	add	x1, x1, :lo12:.LANCHOR0
 	add	x2, x1, x0
 	ldr	x0, [x1, x0]
 	ldrb	w2, [x2, 8]
@@ -741,7 +777,7 @@ NandcSetMode:
 	tst	w0, 6
 	ldr	x2, [x1, #:lo12:.LANCHOR19]
 	ldr	w1, [x2]
-	beq	.L107
+	beq	.L109
 	orr	w1, w1, 24576
 	tst	x0, 4
 	and	w1, w1, -32769
@@ -757,13 +793,13 @@ NandcSetMode:
 	str	w0, [x2, 308]
 	mov	w0, 39
 	str	w0, [x2, 308]
-.L109:
+.L111:
 	mov	w0, 0
 	str	w1, [x2]
 	ret
-.L107:
+.L109:
 	and	w1, w1, -8193
-	b	.L109
+	b	.L111
 	.size	NandcSetMode, .-NandcSetMode
 	.section	.text.NandcFlashCs,"ax",@progbits
 	.align	2
@@ -771,8 +807,8 @@ NandcSetMode:
 	.type	NandcFlashCs, %function
 NandcFlashCs:
 	ubfiz	x0, x0, 4, 8
-	adrp	x1, .LANCHOR6
-	add	x1, x1, :lo12:.LANCHOR6
+	adrp	x1, .LANCHOR0
+	add	x1, x1, :lo12:.LANCHOR0
 	add	x3, x1, x0
 	ldr	x2, [x1, x0]
 	mov	w1, 1
@@ -789,8 +825,8 @@ NandcFlashCs:
 	.type	NandcFlashDeCs, %function
 NandcFlashDeCs:
 	ubfiz	x0, x0, 4, 8
-	adrp	x1, .LANCHOR6
-	add	x1, x1, :lo12:.LANCHOR6
+	adrp	x1, .LANCHOR0
+	add	x1, x1, :lo12:.LANCHOR0
 	ldr	x1, [x1, x0]
 	ldr	w0, [x1]
 	and	w0, w0, -256
@@ -818,18 +854,18 @@ HynixSetRRPara:
 	adrp	x19, .LANCHOR20
 	ldrb	w0, [x0, 19]
 	cmp	w0, 6
-	bne	.L115
+	bne	.L117
 	add	x0, x19, :lo12:.LANCHOR20
 	ubfiz	x19, x22, 6, 8
 	add	x19, x19, 20
 	add	x19, x19, x21, uxtw 2
-.L122:
+.L124:
 	add	x19, x0, x19
-.L116:
+.L118:
 	sxtw	x25, w22
-	adrp	x0, .LANCHOR6
+	adrp	x0, .LANCHOR0
 	lsl	x1, x25, 4
-	add	x0, x0, :lo12:.LANCHOR6
+	add	x0, x0, :lo12:.LANCHOR0
 	add	x2, x0, x1
 	and	x26, x26, 255
 	mov	x24, 0
@@ -841,9 +877,9 @@ HynixSetRRPara:
 	add	x23, x23, x5
 	mov	w0, 54
 	str	w0, [x23, 2056]
-.L119:
+.L121:
 	cmp	x24, x26
-	bne	.L120
+	bne	.L122
 	mov	w0, 22
 	str	w0, [x23, 2056]
 	mov	w0, w22
@@ -857,33 +893,33 @@ HynixSetRRPara:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L115:
+.L117:
 	cmp	w0, 7
-	bne	.L117
+	bne	.L119
 	add	x0, x19, :lo12:.LANCHOR20
 	mov	x1, 28
 	mov	w19, 160
 	umaddl	x1, w19, w22, x1
 	mov	w19, 10
 	umaddl	x19, w21, w19, x1
-	b	.L122
-.L117:
+	b	.L124
+.L119:
 	cmp	w0, 8
-	bne	.L118
+	bne	.L120
 	add	x19, x19, :lo12:.LANCHOR20
 	add	x0, x19, 28
 	add	w19, w21, w21, lsl 2
 	add	x19, x0, x19, sxtw
-	b	.L116
-.L118:
+	b	.L118
+.L120:
 	add	x0, x19, :lo12:.LANCHOR20
 	and	x19, x21, 255
 	add	x19, x19, 2
 	add	x19, x19, x22, uxtw 3
 	add	x19, x0, x19, lsl 3
 	add	x19, x19, 4
-	b	.L116
-.L120:
+	b	.L118
+.L122:
 	ldrb	w0, [x20, x24]
 	str	w0, [x23, 2052]
 	mov	x0, 200
@@ -891,7 +927,7 @@ HynixSetRRPara:
 	ldrsb	w0, [x19, x24]
 	add	x24, x24, 1
 	str	w0, [x23, 2048]
-	b	.L119
+	b	.L121
 	.size	HynixSetRRPara, .-HynixSetRRPara
 	.section	.text.FlashSetReadRetryDefault,"ax",@progbits
 	.align	2
@@ -904,7 +940,7 @@ FlashSetReadRetryDefault:
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 7
-	bhi	.L130
+	bhi	.L132
 	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
@@ -915,25 +951,25 @@ FlashSetReadRetryDefault:
 	add	x22, x20, 4
 	add	x21, x21, :lo12:.LANCHOR22
 	mov	x19, 0
-.L126:
+.L128:
 	lsl	x1, x19, 3
 	and	w0, w19, 255
 	ldrb	w1, [x1, x21]
 	cmp	w1, 173
-	bne	.L125
+	bne	.L127
 	ldrb	w1, [x20, 1]
 	mov	w3, 0
 	mov	x2, x22
 	bl	HynixSetRRPara
-.L125:
+.L127:
 	add	x19, x19, 1
 	cmp	x19, 4
-	bne	.L126
+	bne	.L128
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L130:
+.L132:
 	ret
 	.size	FlashSetReadRetryDefault, .-FlashSetReadRetryDefault
 	.section	.text.FlashWaitCmdDone,"ax",@progbits
@@ -951,7 +987,7 @@ FlashWaitCmdDone:
 	stp	x19, x20, [sp, 16]
 	add	x19, x1, x0
 	ldr	x2, [x19, 8]
-	cbz	x2, .L135
+	cbz	x2, .L137
 	ldrb	w20, [x1, x0]
 	mov	w0, w20
 	bl	NandcFlashCs
@@ -971,10 +1007,10 @@ FlashWaitCmdDone:
 	str	w0, [x1]
 	ldr	x1, [x19, 16]
 	str	xzr, [x19, 8]
-	cbz	x1, .L135
+	cbz	x1, .L137
 	str	w0, [x1]
 	str	xzr, [x19, 16]
-.L135:
+.L137:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -1000,30 +1036,30 @@ NandcDelayns:
 NandcWaitFlashReadyNoDelay:
 	stp	x29, x30, [sp, -48]!
 	ubfiz	x0, x0, 4, 8
-	adrp	x1, .LANCHOR6
-	add	x1, x1, :lo12:.LANCHOR6
+	adrp	x1, .LANCHOR0
+	add	x1, x1, :lo12:.LANCHOR0
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w19, 34464
 	ldr	x20, [x1, x0]
 	movk	w19, 0x1, lsl 16
-.L145:
+.L147:
 	ldr	w0, [x20]
 	str	w0, [x29, 40]
 	ldr	w0, [x29, 40]
-	tbnz	x0, 9, .L146
+	tbnz	x0, 9, .L148
 	mov	x0, 10
 	bl	udelay
 	subs	w19, w19, #1
-	bne	.L145
+	bne	.L147
 	mov	w0, -1
-.L143:
+.L145:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L146:
+.L148:
 	mov	w0, 0
-	b	.L143
+	b	.L145
 	.size	NandcWaitFlashReadyNoDelay, .-NandcWaitFlashReadyNoDelay
 	.section	.text.NandcWaitFlashReady,"ax",@progbits
 	.align	2
@@ -1032,8 +1068,8 @@ NandcWaitFlashReadyNoDelay:
 NandcWaitFlashReady:
 	stp	x29, x30, [sp, -48]!
 	ubfiz	x0, x0, 4, 8
-	adrp	x1, .LANCHOR6
-	add	x1, x1, :lo12:.LANCHOR6
+	adrp	x1, .LANCHOR0
+	add	x1, x1, :lo12:.LANCHOR0
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w19, 34464
@@ -1041,23 +1077,23 @@ NandcWaitFlashReady:
 	ldr	x20, [x1, x0]
 	mov	x0, 150
 	bl	udelay
-.L151:
+.L153:
 	ldr	w0, [x20]
 	str	w0, [x29, 40]
 	ldr	w0, [x29, 40]
-	tbnz	x0, 9, .L152
+	tbnz	x0, 9, .L154
 	mov	x0, 10
 	bl	udelay
 	subs	w19, w19, #1
-	bne	.L151
+	bne	.L153
 	mov	w0, -1
-.L149:
+.L151:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L152:
+.L154:
 	mov	w0, 0
-	b	.L149
+	b	.L151
 	.size	NandcWaitFlashReady, .-NandcWaitFlashReady
 	.section	.text.FlashReset,"ax",@progbits
 	.align	2
@@ -1069,8 +1105,8 @@ FlashReset:
 	str	x19, [sp, 16]
 	and	w19, w0, 255
 	sbfiz	x1, x19, 4, 32
-	adrp	x0, .LANCHOR6
-	add	x0, x0, :lo12:.LANCHOR6
+	adrp	x0, .LANCHOR0
+	add	x0, x0, :lo12:.LANCHOR0
 	add	x2, x0, x1
 	ldr	x5, [x0, x1]
 	mov	w0, w19
@@ -1098,12 +1134,12 @@ flash_enter_slc_mode:
 	and	w20, w0, 255
 	adrp	x0, .LANCHOR15
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L157
+	cbz	w0, .L159
 	mov	w0, w20
 	bl	NandcFlashCs
 	sbfiz	x1, x20, 4, 32
-	adrp	x0, .LANCHOR6
-	add	x0, x0, :lo12:.LANCHOR6
+	adrp	x0, .LANCHOR0
+	add	x0, x0, :lo12:.LANCHOR0
 	add	x2, x0, x1
 	ldr	x0, [x0, x1]
 	ldrb	w19, [x2, 8]
@@ -1129,7 +1165,7 @@ flash_enter_slc_mode:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	NandcWaitFlashReady
-.L157:
+.L159:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -1145,12 +1181,12 @@ flash_exit_slc_mode:
 	and	w20, w0, 255
 	adrp	x0, .LANCHOR15
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L160
+	cbz	w0, .L162
 	mov	w0, w20
 	bl	NandcFlashCs
 	sbfiz	x1, x20, 4, 32
-	adrp	x0, .LANCHOR6
-	add	x0, x0, :lo12:.LANCHOR6
+	adrp	x0, .LANCHOR0
+	add	x0, x0, :lo12:.LANCHOR0
 	add	x2, x0, x1
 	ldr	x0, [x0, x1]
 	ldrb	w19, [x2, 8]
@@ -1177,7 +1213,7 @@ flash_exit_slc_mode:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	NandcWaitFlashReady
-.L160:
+.L162:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -1223,8 +1259,8 @@ FlashEraseBlock:
 FlashSetInterfaceMode:
 	stp	x29, x30, [sp, -16]!
 	adrp	x1, .LANCHOR24
-	adrp	x2, .LANCHOR6
-	add	x2, x2, :lo12:.LANCHOR6
+	adrp	x2, .LANCHOR0
+	add	x2, x2, :lo12:.LANCHOR0
 	add	x29, sp, 0
 	ldrb	w1, [x1, #:lo12:.LANCHOR24]
 	adrp	x7, .LANCHOR22
@@ -1241,71 +1277,71 @@ FlashSetInterfaceMode:
 	mov	w15, 32
 	mov	w16, 5
 	mov	w17, 44
-.L175:
+.L177:
 	ldrb	w3, [x5, x7]
 	ldrb	w4, [x2]
 	cmp	w3, 152
 	ccmp	w3, w13, 4, ne
-	beq	.L166
+	beq	.L168
 	cmp	w3, 173
 	ccmp	w3, w17, 4, ne
-	bne	.L167
-.L166:
+	bne	.L169
+.L168:
 	cmp	w0, 1
 	ldr	x1, [x2, -8]
-	bne	.L168
-	cbz	w6, .L167
+	bne	.L170
+	cbz	w6, .L169
 	ubfiz	x4, x4, 8, 8
 	cmp	w3, 173
 	add	x1, x1, x4
 	str	w8, [x1, 2056]
-	bne	.L169
+	bne	.L171
 	str	w0, [x1, 2052]
-.L187:
+.L189:
 	str	wzr, [x1, 2048]
-	b	.L173
-.L169:
+	b	.L175
+.L171:
 	cmp	w3, 44
-	bne	.L171
+	bne	.L173
 	str	w0, [x1, 2052]
 	str	w16, [x1, 2048]
-.L173:
+.L175:
 	str	wzr, [x1, 2048]
 	str	wzr, [x1, 2048]
 	str	wzr, [x1, 2048]
-.L167:
+.L169:
 	add	x5, x5, 8
 	add	x2, x2, 16
 	cmp	x5, 32
-	bne	.L175
+	bne	.L177
 	mov	w0, 0
 	bl	NandcWaitFlashReady
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L171:
+.L173:
 	str	w10, [x1, 2052]
 	str	w0, [x1, 2048]
-	b	.L173
-.L168:
-	cbz	w12, .L167
+	b	.L175
+.L170:
+	cbz	w12, .L169
 	ubfiz	x4, x4, 8, 8
 	cmp	w3, 173
 	add	x1, x1, x4
 	str	w8, [x1, 2056]
-	bne	.L172
+	bne	.L174
 	str	w11, [x1, 2052]
 	str	w15, [x1, 2048]
-	b	.L173
-.L172:
+	b	.L175
+.L174:
 	cmp	w3, 44
-	bne	.L174
+	bne	.L176
 	str	w11, [x1, 2052]
 	str	w14, [x1, 2048]
-	b	.L173
-.L174:
+	b	.L175
+.L176:
 	str	w10, [x1, 2052]
-	b	.L187
+	b	.L189
 	.size	FlashSetInterfaceMode, .-FlashSetInterfaceMode
 	.section	.text.SandiskSetRRPara,"ax",@progbits
 	.align	2
@@ -1337,24 +1373,24 @@ SandiskSetRRPara:
 	add	x2, x2, x1
 	add	x1, x0, x1
 	mov	x0, 0
-.L189:
+.L191:
 	cmp	w3, w0
-	bhi	.L192
+	bhi	.L194
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x29, x30, [sp], 32
 	b	NandcWaitFlashReady
-.L192:
+.L194:
 	cmp	w4, 67
-	bne	.L190
+	bne	.L192
 	ldrsb	w5, [x1, x0]
-.L194:
+.L196:
 	add	x0, x0, 1
 	str	w5, [x20]
-	b	.L189
-.L190:
+	b	.L191
+.L192:
 	ldrsb	w5, [x2, x0]
-	b	.L194
+	b	.L196
 	.size	SandiskSetRRPara, .-SandiskSetRRPara
 	.section	.text.micron_auto_read_calibration_config,"ax",@progbits
 	.align	2
@@ -1369,8 +1405,8 @@ micron_auto_read_calibration_config:
 	mov	w0, w19
 	bl	NandcWaitFlashReady
 	sbfiz	x0, x19, 4, 32
-	adrp	x2, .LANCHOR6
-	add	x2, x2, :lo12:.LANCHOR6
+	adrp	x2, .LANCHOR0
+	add	x2, x2, :lo12:.LANCHOR0
 	add	x1, x2, x0
 	ldr	x0, [x2, x0]
 	ldrb	w19, [x1, 8]
@@ -1406,16 +1442,16 @@ FlashEraseSLc2KBlocks:
 	mov	x20, x0
 	add	x23, x23, :lo12:.LANCHOR25
 	adrp	x24, .LANCHOR26
-.L198:
+.L200:
 	cmp	x20, x22
-	bne	.L203
+	bne	.L205
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L203:
+.L205:
 	mov	w1, 0
 	mov	w4, w21
 	add	x3, x29, 76
@@ -1425,15 +1461,15 @@ FlashEraseSLc2KBlocks:
 	ldrb	w1, [x23]
 	ldr	w0, [x29, 76]
 	cmp	w1, w0
-	bhi	.L199
+	bhi	.L201
 	mov	w0, -1
 	str	w0, [x20]
-.L200:
+.L202:
 	sub	w21, w21, #1
 	add	x20, x20, 56
 	and	w21, w21, 255
-	b	.L198
-.L199:
+	b	.L200
+.L201:
 	uxtw	x0, w0
 	add	x1, x24, :lo12:.LANCHOR26
 	ldrb	w19, [x1, x0]
@@ -1457,10 +1493,10 @@ FlashEraseSLc2KBlocks:
 	bl	FlashReadStatus
 	sbfx	x0, x0, 0, 1
 	str	w0, [x20]
-	adrp	x0, .LANCHOR3
+	adrp	x0, .LANCHOR4
 	ldr	w1, [x29, 72]
 	mov	w2, 0
-	ldr	w0, [x0, #:lo12:.LANCHOR3]
+	ldr	w0, [x0, #:lo12:.LANCHOR4]
 	add	w1, w1, w0
 	mov	w0, w19
 	bl	FlashEraseCmd
@@ -1469,21 +1505,21 @@ FlashEraseSLc2KBlocks:
 	ldr	w1, [x29, 72]
 	mov	w0, w19
 	bl	FlashReadStatus
-	tbz	x0, 0, .L201
+	tbz	x0, 0, .L203
 	mov	w0, -1
 	str	w0, [x20]
-.L201:
+.L203:
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L202
+	bne	.L204
 	ldr	w1, [x29, 72]
 	adrp	x0, .LC1
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L202:
+.L204:
 	mov	w0, w19
 	bl	NandcFlashDeCs
-	b	.L200
+	b	.L202
 	.size	FlashEraseSLc2KBlocks, .-FlashEraseSLc2KBlocks
 	.section	.text.FlashEraseBlocks,"ax",@progbits
 	.align	2
@@ -1494,48 +1530,48 @@ FlashEraseBlocks:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	mov	w24, w1
-	adrp	x1, .LANCHOR1
+	adrp	x1, .LANCHOR2
 	stp	x21, x22, [sp, 32]
 	stp	x19, x20, [sp, 16]
 	mov	w22, w2
-	ldrb	w1, [x1, #:lo12:.LANCHOR1]
+	ldrb	w1, [x1, #:lo12:.LANCHOR2]
 	stp	x25, x26, [sp, 64]
-	cbnz	w1, .L209
+	cbnz	w1, .L211
 	adrp	x25, .LANCHOR23
 	mov	x19, x0
 	add	x26, x25, :lo12:.LANCHOR23
 	mov	w20, 0
-.L210:
+.L212:
 	cmp	w20, w22
 	adrp	x13, .LANCHOR25
-	bcc	.L219
+	bcc	.L221
 	adrp	x21, .LANCHOR15
 	adrp	x23, .LANCHOR23
 	add	x25, x13, :lo12:.LANCHOR25
 	add	x21, x21, :lo12:.LANCHOR15
 	add	x23, x23, :lo12:.LANCHOR23
 	mov	x20, 0
-.L220:
+.L222:
 	ldrb	w0, [x25]
 	cmp	w0, w20
-	bhi	.L222
+	bhi	.L224
 	adrp	x0, .LANCHOR28
 	ldr	w0, [x0, #:lo12:.LANCHOR28]
-	cbnz	w0, .L223
-.L224:
+	cbnz	w0, .L225
+.L226:
 	mov	w0, 0
-	b	.L208
-.L209:
+	b	.L210
+.L211:
 	mov	w1, w2
 	bl	FlashEraseSLc2KBlocks
-.L208:
+.L210:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L219:
+.L221:
 	mov	w12, 56
 	mov	w1, 0
 	sub	w4, w22, w20
@@ -1549,13 +1585,13 @@ FlashEraseBlocks:
 	ldrb	w1, [x13, #:lo12:.LANCHOR25]
 	ldr	w0, [x29, 92]
 	cmp	w1, w0
-	bhi	.L212
+	bhi	.L214
 	mov	w0, -1
 	str	w0, [x19, x12]
-.L213:
+.L215:
 	add	w20, w20, 1
-	b	.L210
-.L212:
+	b	.L212
+.L214:
 	adrp	x1, .LANCHOR27
 	add	x2, x25, :lo12:.LANCHOR23
 	mov	x3, 24
@@ -1565,20 +1601,20 @@ FlashEraseBlocks:
 	csel	w23, w23, wzr, ne
 	madd	x1, x1, x3, x2
 	ldr	x1, [x1, 8]
-	cbz	x1, .L215
+	cbz	x1, .L217
 	bl	FlashWaitCmdDone
-.L215:
+.L217:
 	ldp	w2, w1, [x29, 88]
 	mov	x0, 24
 	madd	x0, x1, x0, x26
 	str	w2, [x0, 4]
 	stp	x21, xzr, [x0, 8]
-	cbz	w23, .L216
+	cbz	w23, .L218
 	add	w2, w20, 1
 	mov	w3, 56
 	umaddl	x2, w2, w3, x19
 	str	x2, [x0, 16]
-.L216:
+.L218:
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w21, [x0, x1]
@@ -1588,13 +1624,13 @@ FlashEraseBlocks:
 	strb	w21, [x26, x1]
 	bl	NandcFlashCs
 	cmp	w24, 1
-	bne	.L217
+	bne	.L219
 	adrp	x0, .LANCHOR15
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L217
+	cbz	w0, .L219
 	mov	w0, w21
 	bl	flash_enter_slc_mode
-.L218:
+.L220:
 	ldr	w1, [x29, 92]
 	adrp	x0, .LANCHOR17
 	add	x0, x0, :lo12:.LANCHOR17
@@ -1611,37 +1647,37 @@ FlashEraseBlocks:
 	bl	FlashEraseCmd
 	mov	w0, w21
 	bl	NandcFlashDeCs
-	b	.L213
-.L217:
+	b	.L215
+.L219:
 	mov	w0, w21
 	bl	flash_exit_slc_mode
-	b	.L218
-.L222:
+	b	.L220
+.L224:
 	mov	w0, w20
 	bl	FlashWaitCmdDone
 	cmp	w24, 1
-	bne	.L221
+	bne	.L223
 	ldrb	w0, [x21]
-	cbz	w0, .L221
+	cbz	w0, .L223
 	mov	x0, 24
 	mul	x0, x20, x0
 	ldrb	w0, [x0, x23]
 	bl	flash_exit_slc_mode
-.L221:
-	add	x20, x20, 1
-	b	.L220
 .L223:
+	add	x20, x20, 1
+	b	.L222
+.L225:
 	adrp	x0, .LANCHOR22
 	ldrb	w0, [x0, #:lo12:.LANCHOR22]
 	cmp	w0, 69
-	bne	.L224
+	bne	.L226
 	mov	w0, 56
 	umaddl	x22, w22, w0, x19
-.L225:
+.L227:
 	cmp	x22, x19
-	beq	.L224
+	beq	.L226
 	str	wzr, [x19], 56
-	b	.L225
+	b	.L227
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
 	.section	.text.FlashReadDpCmd,"ax",@progbits
 	.align	2
@@ -1653,9 +1689,9 @@ FlashReadDpCmd:
 	stp	x21, x22, [sp, 32]
 	and	w22, w0, 255
 	mov	w21, w1
-	adrp	x0, .LANCHOR6
+	adrp	x0, .LANCHOR0
 	sbfiz	x1, x22, 4, 32
-	add	x0, x0, :lo12:.LANCHOR6
+	add	x0, x0, :lo12:.LANCHOR0
 	add	x3, x0, x1
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
@@ -1675,7 +1711,7 @@ FlashReadDpCmd:
 	str	w5, [x19, 2056]
 	cmp	w1, 1
 	lsr	w1, w21, 16
-	bne	.L241
+	bne	.L243
 	str	wzr, [x19, 2052]
 	str	wzr, [x19, 2052]
 	str	w4, [x19, 2052]
@@ -1687,7 +1723,7 @@ FlashReadDpCmd:
 	str	wzr, [x19, 2056]
 	str	wzr, [x19, 2052]
 	str	wzr, [x19, 2052]
-.L244:
+.L246:
 	str	w24, [x19, 2052]
 	mov	w0, 48
 	str	w23, [x19, 2052]
@@ -1700,12 +1736,12 @@ FlashReadDpCmd:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	b	FlashSetRandomizer
-.L241:
+.L243:
 	str	w4, [x19, 2052]
 	str	w3, [x19, 2052]
 	str	w1, [x19, 2052]
 	str	w0, [x19, 2056]
-	b	.L244
+	b	.L246
 	.size	FlashReadDpCmd, .-FlashReadDpCmd
 	.section	.text.FlashDeInit,"ax",@progbits
 	.align	2
@@ -1720,33 +1756,33 @@ FlashDeInit:
 	bl	FlashSetReadRetryDefault
 	adrp	x0, .LANCHOR29
 	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	cbz	w0, .L246
+	cbz	w0, .L248
 	mov	w0, 0
 	bl	flash_enter_slc_mode
-.L247:
+.L249:
 	adrp	x19, .LANCHOR30
 	ldrb	w0, [x19, #:lo12:.LANCHOR30]
-	cbz	w0, .L248
+	cbz	w0, .L250
 	adrp	x0, .LANCHOR24
 	ldrb	w0, [x0, #:lo12:.LANCHOR24]
-	tbz	x0, 0, .L248
+	tbz	x0, 0, .L250
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
 	bl	NandcSetMode
 	strb	wzr, [x19, #:lo12:.LANCHOR30]
-.L248:
-	adrp	x0, .LANCHOR6
-	ldr	x0, [x0, #:lo12:.LANCHOR6]
+.L250:
+	adrp	x0, .LANCHOR0
+	ldr	x0, [x0, #:lo12:.LANCHOR0]
 	str	wzr, [x0, 336]
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L246:
+.L248:
 	mov	w0, 0
 	bl	flash_exit_slc_mode
-	b	.L247
+	b	.L249
 	.size	FlashDeInit, .-FlashDeInit
 	.section	.text.NandcRandmzSel,"ax",@progbits
 	.align	2
@@ -1754,8 +1790,8 @@ FlashDeInit:
 	.type	NandcRandmzSel, %function
 NandcRandmzSel:
 	ubfiz	x0, x0, 4, 8
-	adrp	x2, .LANCHOR6
-	add	x2, x2, :lo12:.LANCHOR6
+	adrp	x2, .LANCHOR0
+	add	x2, x2, :lo12:.LANCHOR0
 	ldr	x0, [x2, x0]
 	str	w1, [x0, 336]
 	ret
@@ -1767,21 +1803,21 @@ NandcRandmzSel:
 NandcTimeCfg:
 	cmp	w0, 35
 	adrp	x1, .LANCHOR19
-	bhi	.L258
+	bhi	.L260
 	ldr	x0, [x1, #:lo12:.LANCHOR19]
 	mov	w1, 4193
-.L261:
+.L263:
 	str	w1, [x0, 4]
 	ret
-.L258:
+.L260:
 	cmp	w0, 99
 	ldr	x0, [x1, #:lo12:.LANCHOR19]
-	bls	.L260
+	bls	.L262
 	mov	w1, 8322
-	b	.L261
-.L260:
+	b	.L263
+.L262:
 	mov	w1, 4225
-	b	.L261
+	b	.L263
 	.size	NandcTimeCfg, .-NandcTimeCfg
 	.section	.text.FlashTimingCfg,"ax",@progbits
 	.align	2
@@ -1806,24 +1842,24 @@ NandcBchSel:
 	adrp	x1, .LANCHOR32
 	str	w0, [x1, #:lo12:.LANCHOR32]
 	mov	w1, 4096
-	bne	.L264
-.L267:
+	bne	.L266
+.L269:
 	and	w1, w1, -17
-.L265:
+.L267:
 	orr	w1, w1, 1
 	str	w1, [x2, 12]
 	ret
-.L264:
+.L266:
 	cmp	w0, 24
-	bne	.L266
+	bne	.L268
 	orr	w1, w1, 16
-	b	.L265
-.L266:
+	b	.L267
+.L268:
 	orr	w1, w1, 262144
 	cmp	w0, 40
 	orr	w1, w1, 16
-	bne	.L265
-	b	.L267
+	bne	.L267
+	b	.L269
 	.size	NandcBchSel, .-NandcBchSel
 	.section	.text.FlashBchSel,"ax",@progbits
 	.align	2
@@ -1905,11 +1941,11 @@ NandcSendDumpDataStart:
 	.type	NandcSendDumpDataDone, %function
 NandcSendDumpDataDone:
 	sub	sp, sp, #16
-.L281:
+.L283:
 	ldr	w1, [x0, 8]
 	str	w1, [sp, 8]
 	ldr	w1, [sp, 8]
-	tbz	x1, 20, .L281
+	tbz	x1, 20, .L283
 	add	sp, sp, 16
 	ret
 	.size	NandcSendDumpDataDone, .-NandcSendDumpDataDone
@@ -1924,8 +1960,8 @@ NandcXferStart:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	w24, w1, 255
-	adrp	x1, .LANCHOR6
-	add	x1, x1, :lo12:.LANCHOR6
+	adrp	x1, .LANCHOR0
+	add	x1, x1, :lo12:.LANCHOR0
 	add	x6, x1, x0
 	stp	x21, x22, [sp, 32]
 	stp	x19, x20, [sp, 16]
@@ -1947,7 +1983,7 @@ NandcXferStart:
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	bfi	w19, w3, 4, 1
 	cmp	w0, 3
-	bls	.L286
+	bls	.L288
 	ldr	w0, [x21, 16]
 	cmp	x5, 0
 	str	w0, [x29, 88]
@@ -1955,11 +1991,11 @@ NandcXferStart:
 	ldr	w0, [x29, 88]
 	and	w0, w0, -5
 	str	w0, [x29, 88]
-	beq	.L287
+	beq	.L289
 	and	w2, w2, 255
 	adrp	x20, .LANCHOR35
-	cbnz	w24, .L288
-.L296:
+	cbnz	w24, .L290
+.L298:
 	ldr	x0, [x20, #:lo12:.LANCHOR35]
 	add	w2, w2, 1
 	cmp	x4, 0
@@ -2001,12 +2037,12 @@ NandcXferStart:
 	ldr	w0, [x29, 88]
 	orr	w0, w0, 448
 	str	w0, [x29, 88]
-	bne	.L297
+	bne	.L299
 	ldr	w0, [x29, 88]
 	mov	w1, 2
 	bfi	w0, w1, 3, 3
 	str	w0, [x29, 88]
-.L297:
+.L299:
 	ldr	w0, [x29, 88]
 	cmp	w24, 0
 	cset	w1, eq
@@ -2018,10 +2054,10 @@ NandcXferStart:
 	ldr	w0, [x29, 88]
 	orr	w0, w0, 1
 	str	w0, [x29, 88]
-.L287:
+.L289:
 	ldr	w0, [x29, 88]
 	str	w0, [x21, 16]
-.L286:
+.L288:
 	str	w22, [x21, 12]
 	str	w19, [x21, 8]
 	orr	w19, w19, 4
@@ -2032,7 +2068,7 @@ NandcXferStart:
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L288:
+.L290:
 	adrp	x0, .LANCHOR32
 	mov	w6, 64
 	lsr	w11, w2, 1
@@ -2046,24 +2082,24 @@ NandcXferStart:
 	csel	w6, w6, w0, cc
 	add	x0, x20, :lo12:.LANCHOR35
 	ldr	x10, [x0, 8]
-.L292:
+.L294:
 	cmp	w3, w11
-	bcs	.L296
+	bcs	.L298
 	lsr	w0, w7, 2
 	lsl	w0, w0, 2
-	cbz	x5, .L293
+	cbz	x5, .L295
 	ldrh	w13, [x1]
 	add	x1, x1, 4
 	ldrh	w8, [x1, -2]
 	orr	x8, x13, x8, lsl 16
 	str	w8, [x10, x0]
-.L294:
+.L296:
 	add	w3, w3, 1
 	add	w7, w7, w6
-	b	.L292
-.L293:
-	str	w12, [x10, x0]
 	b	.L294
+.L295:
+	str	w12, [x10, x0]
+	b	.L296
 	.size	NandcXferStart, .-NandcXferStart
 	.section	.text.NandcXferComp,"ax",@progbits
 	.align	2
@@ -2071,65 +2107,65 @@ NandcXferStart:
 	.type	NandcXferComp, %function
 NandcXferComp:
 	ubfiz	x0, x0, 4, 8
-	adrp	x1, .LANCHOR6
-	add	x1, x1, :lo12:.LANCHOR6
+	adrp	x1, .LANCHOR0
+	add	x1, x1, :lo12:.LANCHOR0
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	ldr	x3, [x1, x0]
 	adrp	x0, .LANCHOR34
 	ldr	w2, [x0, #:lo12:.LANCHOR34]
 	cmp	w2, 3
-	bls	.L325
+	bls	.L327
 	ldr	w0, [x3, 16]
-	tbz	x0, 2, .L325
+	tbz	x0, 2, .L327
 	ldr	w0, [x3, 16]
-	tbz	x0, 1, .L313
+	tbz	x0, 1, .L315
 	ldr	w0, [x3, 8]
 	str	w0, [x29, 16]
-.L308:
+.L310:
 	ldr	w1, [x3, 28]
 	ldr	w0, [x29, 16]
 	ubfx	x1, x1, 16, 5
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0
-	bge	.L309
+	bge	.L311
 	cmp	w2, 5
-	bls	.L308
+	bls	.L310
 	ldr	w0, [x3]
 	str	w0, [x29, 24]
 	ldr	w0, [x29, 24]
-	tbz	x0, 13, .L308
+	tbz	x0, 13, .L310
 	ldr	w0, [x29, 24]
-	tbz	x0, 17, .L308
-.L309:
+	tbz	x0, 17, .L310
+.L311:
 	adrp	x0, .LANCHOR35+40
 	str	wzr, [x0, #:lo12:.LANCHOR35+40]
-.L304:
+.L306:
 	ldp	x29, x30, [sp], 32
 	ret
-.L313:
+.L315:
 	ldr	w0, [x3, 8]
 	str	w0, [x29, 16]
 	ldr	w0, [x29, 16]
-	tbz	x0, 20, .L313
+	tbz	x0, 20, .L315
 	adrp	x0, .LANCHOR36
 	mov	x4, x0
 	ldr	w1, [x0, #:lo12:.LANCHOR36]
-	cbz	w1, .L314
+	cbz	w1, .L316
 	mov	x0, x3
 	bl	NandcSendDumpDataStart
-.L314:
+.L316:
 	ldr	w0, [x4, #:lo12:.LANCHOR36]
-	cbz	w0, .L309
+	cbz	w0, .L311
 	mov	x0, x3
 	bl	NandcSendDumpDataDone
-	b	.L309
-.L325:
+	b	.L311
+.L327:
 	ldr	w0, [x3, 8]
 	str	w0, [x29, 16]
 	ldr	w0, [x29, 16]
-	tbz	x0, 20, .L325
-	b	.L304
+	tbz	x0, 20, .L327
+	b	.L306
 	.size	NandcXferComp, .-NandcXferComp
 	.section	.text.Ftl_log2,"ax",@progbits
 	.align	2
@@ -2138,16 +2174,16 @@ NandcXferComp:
 Ftl_log2:
 	mov	w2, 1
 	mov	w1, 0
-.L334:
+.L336:
 	cmp	w2, w0
-	bls	.L335
+	bls	.L337
 	sub	w0, w1, #1
 	ret
-.L335:
+.L337:
 	add	w1, w1, 1
 	lsl	w2, w2, 1
 	and	w1, w1, 65535
-	b	.L334
+	b	.L336
 	.size	Ftl_log2, .-Ftl_log2
 	.section	.text.FtlPrintInfo,"ax",@progbits
 	.align	2
@@ -2210,28 +2246,28 @@ FtlConstantsInit:
 	strh	w2, [x4, #:lo12:.LANCHOR45]
 	strh	w8, [x6, #:lo12:.LANCHOR41]
 	str	x19, [sp, 16]
-.L339:
+.L341:
 	strb	w3, [x3, x7]
 	add	x3, x3, 1
 	cmp	x3, 32
-	bne	.L339
+	bne	.L341
 	ldrh	w7, [x5, 20]
 	ldrb	w3, [x5, 15]
 	cmp	w7, w3
-	bcs	.L340
+	bcs	.L342
 	and	w13, w0, 255
 	mul	w15, w0, w2
 	ubfiz	w14, w13, 1, 7
 	add	x1, x1, :lo12:.LANCHOR47
 	mov	w7, 0
-.L341:
+.L343:
 	cmp	w7, w0
-	bcs	.L343
+	bcs	.L345
 	and	w3, w7, 255
 	mov	w10, w7
 	mov	w12, 0
-	b	.L344
-.L342:
+	b	.L346
+.L344:
 	add	w16, w15, w10
 	strb	w3, [x1, w10, uxtw]
 	add	w17, w13, w3
@@ -2240,35 +2276,35 @@ FtlConstantsInit:
 	and	w3, w3, 255
 	add	w10, w10, w0
 	strb	w17, [x1, x16]
-.L344:
+.L346:
 	cmp	w12, w2
-	bcc	.L342
+	bcc	.L344
 	add	w7, w7, 1
-	b	.L341
-.L343:
+	b	.L343
+.L345:
 	ubfiz	w2, w2, 1, 15
 	lsr	w8, w8, 1
 	strh	w2, [x4, #:lo12:.LANCHOR45]
 	strh	w8, [x6, #:lo12:.LANCHOR41]
-.L340:
+.L342:
 	adrp	x1, .LANCHOR48
 	adrp	x13, .LANCHOR49
 	mov	w2, 5
 	cmp	w11, 1
 	strh	w2, [x1, #:lo12:.LANCHOR48]
 	strh	wzr, [x13, #:lo12:.LANCHOR49]
-	bne	.L345
+	bne	.L347
 	strh	w11, [x1, #:lo12:.LANCHOR48]
-.L345:
+.L347:
 	adrp	x8, .LANCHOR50
 	mov	w1, 4352
 	strh	w1, [x8, #:lo12:.LANCHOR50]
-	adrp	x1, .LANCHOR1
-	ldrb	w11, [x1, #:lo12:.LANCHOR1]
-	cbz	w11, .L346
+	adrp	x1, .LANCHOR2
+	ldrb	w11, [x1, #:lo12:.LANCHOR2]
+	cbz	w11, .L348
 	mov	w1, 384
 	strh	w1, [x8, #:lo12:.LANCHOR50]
-.L346:
+.L348:
 	ldrh	w4, [x4, #:lo12:.LANCHOR45]
 	adrp	x1, .LANCHOR38
 	ldrh	w3, [x6, #:lo12:.LANCHOR41]
@@ -2308,10 +2344,10 @@ FtlConstantsInit:
 	adrp	x0, .LANCHOR43
 	mul	w1, w4, w3
 	str	w1, [x0, #:lo12:.LANCHOR43]
-	bls	.L347
+	bls	.L349
 	and	w0, w3, 255
 	strh	w0, [x13, #:lo12:.LANCHOR49]
-.L347:
+.L349:
 	ldrh	w0, [x13, #:lo12:.LANCHOR49]
 	adrp	x1, .LANCHOR60
 	sub	w0, w3, w0
@@ -2327,13 +2363,13 @@ FtlConstantsInit:
 	sdiv	w0, w0, w1
 	and	w0, w0, 65535
 	cmp	w0, 4
-	bls	.L348
-.L364:
+	bls	.L350
+.L366:
 	strh	w0, [x10, #:lo12:.LANCHOR61]
-	cbz	w11, .L350
+	cbz	w11, .L352
 	mov	w0, 640
 	strh	w0, [x8, #:lo12:.LANCHOR50]
-.L350:
+.L352:
 	ldrh	w0, [x8, #:lo12:.LANCHOR50]
 	adrp	x1, .LANCHOR62
 	lsl	w3, w3, 6
@@ -2355,8 +2391,8 @@ FtlConstantsInit:
 	udiv	w0, w0, w4
 	mov	x4, x1
 	add	w3, w0, w3
-	beq	.L351
-.L365:
+	beq	.L353
+.L367:
 	str	w3, [x8, #:lo12:.LANCHOR37]
 	ldrh	w0, [x8, #:lo12:.LANCHOR37]
 	bl	FtlSysBlkNumInit
@@ -2388,13 +2424,13 @@ FtlConstantsInit:
 	ldr	w1, [x4, #:lo12:.LANCHOR64]
 	add	w3, w1, 3
 	str	w3, [x4, #:lo12:.LANCHOR64]
-	cbz	w6, .L353
+	cbz	w6, .L355
 	add	w1, w1, 5
 	add	w2, w2, 4
 	strh	w2, [x10, #:lo12:.LANCHOR61]
-.L366:
+.L368:
 	str	w1, [x4, #:lo12:.LANCHOR64]
-.L354:
+.L356:
 	adrp	x1, .LANCHOR40
 	adrp	x3, .LANCHOR69
 	ldrh	w1, [x1, #:lo12:.LANCHOR40]
@@ -2407,25 +2443,25 @@ FtlConstantsInit:
 	add	w0, w0, w1
 	ldrh	w1, [x15, #:lo12:.LANCHOR55]
 	cmp	w0, w1, lsl 9
-	bcs	.L355
+	bcs	.L357
 	mov	w0, 1
 	strh	w0, [x3, #:lo12:.LANCHOR69]
-.L355:
+.L357:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L348:
+.L350:
 	mov	w0, 4
-	b	.L364
-.L351:
-	add	w3, w3, 4
-	b	.L365
+	b	.L366
 .L353:
+	add	w3, w3, 4
+	b	.L367
+.L355:
 	cmp	w3, 7
-	bhi	.L354
+	bhi	.L356
 	mov	w1, 8
-	b	.L366
+	b	.L368
 	.size	FtlConstantsInit, .-FtlConstantsInit
 	.section	.text.IsBlkInVendorPart,"ax",@progbits
 	.align	2
@@ -2435,24 +2471,24 @@ IsBlkInVendorPart:
 	adrp	x1, .LANCHOR70
 	and	w0, w0, 65535
 	ldrh	w1, [x1, #:lo12:.LANCHOR70]
-	cbz	w1, .L371
+	cbz	w1, .L373
 	adrp	x1, .LANCHOR61
 	ldrh	w2, [x1, #:lo12:.LANCHOR61]
 	adrp	x1, .LANCHOR71
 	ldr	x3, [x1, #:lo12:.LANCHOR71]
 	mov	x1, 0
-.L369:
-	cmp	w2, w1, uxth
-	bhi	.L370
 .L371:
+	cmp	w2, w1, uxth
+	bhi	.L372
+.L373:
 	mov	w0, 0
 	ret
-.L370:
+.L372:
 	add	x1, x1, 1
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w0
-	bne	.L369
+	bne	.L371
 	mov	w0, 1
 	ret
 	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
@@ -2639,12 +2675,12 @@ P2V_block_in_plane:
 ftl_cmp_data_ver:
 	cmp	w0, w1
 	mov	w2, -2147483648
-	bls	.L387
+	bls	.L389
 	sub	w1, w0, w1
 	cmp	w1, w2
 	cset	w0, ls
 	ret
-.L387:
+.L389:
 	sub	w1, w1, w0
 	cmp	w1, w2
 	cset	w0, hi
@@ -2685,18 +2721,18 @@ FtlFreeSysBlkQueueIn:
 	sub	w2, w20, #1
 	mov	w0, 65533
 	cmp	w0, w2, uxth
-	bcc	.L391
+	bcc	.L393
 	adrp	x0, .LANCHOR75
 	add	x2, x0, :lo12:.LANCHOR75
 	mov	x19, x0
 	ldrh	w2, [x2, 6]
 	cmp	w2, 1024
-	beq	.L391
+	beq	.L393
 	and	w1, w1, 65535
-	cbz	w1, .L393
+	cbz	w1, .L395
 	adrp	x0, .LANCHOR76
 	ldr	w0, [x0, #:lo12:.LANCHOR76]
-	cbnz	w0, .L393
+	cbnz	w0, .L395
 	mov	w0, w20
 	bl	P2V_block_in_plane
 	and	w21, w0, 65535
@@ -2717,7 +2753,7 @@ FtlFreeSysBlkQueueIn:
 	ldr	w0, [x1, #:lo12:.LANCHOR79]
 	add	w0, w0, 1
 	str	w0, [x1, #:lo12:.LANCHOR79]
-.L393:
+.L395:
 	add	x0, x19, :lo12:.LANCHOR75
 	ldrh	w1, [x0, 6]
 	add	w1, w1, 1
@@ -2728,7 +2764,7 @@ FtlFreeSysBlkQueueIn:
 	and	w1, w1, 1023
 	strh	w1, [x0, 4]
 	strh	w20, [x2, 8]
-.L391:
+.L393:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -2742,7 +2778,7 @@ FtlFreeSysBLkSort:
 	adrp	x0, .LANCHOR75
 	add	x1, x0, :lo12:.LANCHOR75
 	ldrh	w2, [x1, 6]
-	cbz	w2, .L401
+	cbz	w2, .L403
 	adrp	x2, .LANCHOR80+28
 	ldrh	w3, [x1, 2]
 	mov	w6, 0
@@ -2750,16 +2786,16 @@ FtlFreeSysBLkSort:
 	ldrh	w5, [x2, #:lo12:.LANCHOR80+28]
 	ldrh	w2, [x1, 4]
 	and	w5, w5, 31
-.L403:
+.L405:
 	cmp	w5, w4
-	bgt	.L404
-	cbz	w6, .L401
+	bgt	.L406
+	cbz	w6, .L403
 	add	x0, x0, :lo12:.LANCHOR75
 	strh	w3, [x0, 2]
 	strh	w2, [x0, 4]
-.L401:
+.L403:
 	ret
-.L404:
+.L406:
 	add	x6, x1, x3, sxtw 1
 	add	w4, w4, 1
 	add	w3, w3, 1
@@ -2771,7 +2807,7 @@ FtlFreeSysBLkSort:
 	mov	w6, 1
 	add	w2, w2, w6
 	and	w2, w2, 1023
-	b	.L403
+	b	.L405
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
 	.section	.text.FtlFreeSysBlkQueueOut,"ax",@progbits
 	.align	2
@@ -2788,9 +2824,9 @@ FtlFreeSysBlkQueueOut:
 	adrp	x22, .LANCHOR76
 	mov	x23, x19
 	add	x22, x22, :lo12:.LANCHOR76
-.L411:
+.L413:
 	ldrh	w1, [x19, 6]
-	cbz	w1, .L412
+	cbz	w1, .L414
 	ldrh	w0, [x19, 2]
 	sub	w1, w1, #1
 	strh	w1, [x19, 6]
@@ -2800,7 +2836,7 @@ FtlFreeSysBlkQueueOut:
 	strh	w0, [x19, 2]
 	ldr	w0, [x22]
 	ldrh	w20, [x2, 8]
-	cbnz	w0, .L413
+	cbnz	w0, .L415
 	mov	w0, w20
 	bl	P2V_block_in_plane
 	adrp	x1, .LANCHOR77
@@ -2811,11 +2847,11 @@ FtlFreeSysBlkQueueOut:
 	str	w2, [x0, 4]
 	adrp	x2, .LANCHOR15
 	ldrb	w2, [x2, #:lo12:.LANCHOR15]
-	cbz	w2, .L414
+	cbz	w2, .L416
 	mov	w2, 1
 	mov	w1, 0
 	bl	FlashEraseBlocks
-.L414:
+.L416:
 	ldr	x0, [x24, #:lo12:.LANCHOR77]
 	mov	w2, 1
 	mov	w1, w2
@@ -2830,25 +2866,25 @@ FtlFreeSysBlkQueueOut:
 	ldr	w0, [x1, #:lo12:.LANCHOR79]
 	add	w0, w0, 1
 	str	w0, [x1, #:lo12:.LANCHOR79]
-.L413:
+.L415:
 	sub	w0, w20, #1
 	mov	w1, 65533
 	cmp	w1, w0, uxth
-	bcs	.L416
+	bcs	.L418
 	ldrh	w2, [x23, 6]
 	mov	w1, w20
 	adrp	x0, .LC4
 	add	x0, x0, :lo12:.LC4
 	bl	printf
-	b	.L411
-.L412:
+	b	.L413
+.L414:
 	adrp	x0, .LC3
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC3
 	bl	printf
-.L415:
-	b	.L415
-.L416:
+.L417:
+	b	.L417
+.L418:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -2873,18 +2909,18 @@ test_node_in_list:
 	mul	x0, x0, x4
 	mov	w4, 6
 	and	w0, w0, 65535
-.L423:
+.L425:
 	cmp	w0, w1
-	beq	.L424
+	beq	.L426
 	ldrh	w0, [x2]
 	cmp	w0, w5
-	beq	.L425
+	beq	.L427
 	umaddl	x2, w0, w4, x3
-	b	.L423
-.L424:
+	b	.L425
+.L426:
 	mov	w0, 1
 	ret
-.L425:
+.L427:
 	mov	w0, 0
 	ret
 	.size	test_node_in_list, .-test_node_in_list
@@ -2897,7 +2933,7 @@ insert_data_list:
 	and	w0, w0, 65535
 	ldrh	w14, [x1, #:lo12:.LANCHOR40]
 	cmp	w14, w0
-	bls	.L442
+	bls	.L444
 	adrp	x1, .LANCHOR81
 	mov	w3, 6
 	ldr	x6, [x1, #:lo12:.LANCHOR81]
@@ -2909,12 +2945,12 @@ insert_data_list:
 	adrp	x1, .LANCHOR82
 	mov	x15, x1
 	ldr	x12, [x1, #:lo12:.LANCHOR82]
-	cbnz	x12, .L429
+	cbnz	x12, .L431
 	str	x5, [x1, #:lo12:.LANCHOR82]
-.L442:
+.L444:
 	mov	w0, 0
 	ret
-.L429:
+.L431:
 	stp	x29, x30, [sp, -32]!
 	adrp	x1, .LANCHOR83
 	ubfiz	x2, x0, 1, 16
@@ -2941,13 +2977,13 @@ insert_data_list:
 	mov	x4, x12
 	add	x10, x17, x2
 	mov	w2, 0
-.L437:
+.L439:
 	add	w2, w2, 1
 	and	w2, w2, 65535
 	cmp	w14, w2
-	bcc	.L428
+	bcc	.L430
 	cmp	w1, w0
-	beq	.L428
+	beq	.L430
 	ubfiz	x30, x1, 1, 16
 	ldrh	w19, [x4, 4]
 	cmp	w19, 0
@@ -2955,46 +2991,46 @@ insert_data_list:
 	mul	w3, w3, w19
 	csel	w3, w3, w11, ne
 	cmp	w7, w3
-	bne	.L433
+	bne	.L435
 	ldrh	w19, [x17, x30]
 	ldrh	w3, [x10]
 	cmp	w19, w3
-	bcc	.L435
-.L434:
+	bcc	.L437
+.L436:
 	strh	w1, [x6, x13]
 	cmp	x4, x12
 	ldrh	w1, [x4, 2]
 	strh	w1, [x5, 2]
-	bne	.L438
+	bne	.L440
 	strh	w0, [x4, 2]
 	str	x5, [x15, #:lo12:.LANCHOR82]
-	b	.L428
-.L433:
-	bcc	.L434
+	b	.L430
 .L435:
+	bcc	.L436
+.L437:
 	ldrh	w3, [x4]
 	cmp	w3, w20
-	bne	.L436
+	bne	.L438
 	strh	w1, [x5, 2]
 	strh	w0, [x4]
 	adrp	x0, .LANCHOR84
 	str	x5, [x0, #:lo12:.LANCHOR84]
-.L428:
+.L430:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L436:
+.L438:
 	umaddl	x4, w3, w8, x6
 	mov	w1, w3
-	b	.L437
-.L438:
+	b	.L439
+.L440:
 	ldrh	w1, [x4, 2]
 	mov	w2, 6
 	umull	x1, w1, w2
 	strh	w0, [x6, x1]
 	strh	w0, [x4, 2]
-	b	.L428
+	b	.L430
 	.size	insert_data_list, .-insert_data_list
 	.section	.text.INSERT_DATA_LIST,"ax",@progbits
 	.align	2
@@ -3012,7 +3048,7 @@ INSERT_DATA_LIST:
 	adrp	x1, .LANCHOR40
 	ldrh	w1, [x1, #:lo12:.LANCHOR40]
 	cmp	w1, w0
-	bcs	.L444
+	bcs	.L446
 	mov	w2, 210
 	adrp	x1, .LANCHOR86
 	adrp	x0, .LC5
@@ -3025,7 +3061,7 @@ INSERT_DATA_LIST:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	b	printf
-.L444:
+.L446:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
@@ -3037,7 +3073,7 @@ insert_free_list:
 	and	w0, w0, 65535
 	mov	w7, 65535
 	cmp	w0, w7
-	beq	.L448
+	beq	.L450
 	adrp	x1, .LANCHOR81
 	mov	w6, 6
 	ldr	x3, [x1, #:lo12:.LANCHOR81]
@@ -3049,12 +3085,12 @@ insert_free_list:
 	adrp	x1, .LANCHOR87
 	mov	x12, x1
 	ldr	x5, [x1, #:lo12:.LANCHOR87]
-	cbnz	x5, .L449
+	cbnz	x5, .L451
 	str	x4, [x1, #:lo12:.LANCHOR87]
-.L448:
+.L450:
 	mov	w0, 0
 	ret
-.L449:
+.L451:
 	adrp	x1, .LANCHOR78
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
@@ -3066,37 +3102,37 @@ insert_free_list:
 	mul	x1, x1, x2
 	mov	x2, x5
 	and	w1, w1, 65535
-.L452:
+.L454:
 	ubfiz	x10, x1, 1, 16
 	ldrh	w10, [x11, x10]
 	cmp	w10, w13
-	bcs	.L450
+	bcs	.L452
 	ldrh	w10, [x2]
 	cmp	w10, w7
-	bne	.L451
+	bne	.L453
 	strh	w1, [x4, 2]
 	strh	w0, [x2]
-	b	.L448
-.L451:
+	b	.L450
+.L453:
 	umaddl	x2, w10, w6, x3
 	mov	w1, w10
-	b	.L452
-.L450:
+	b	.L454
+.L452:
 	ldrh	w6, [x2, 2]
 	cmp	x2, x5
 	strh	w6, [x4, 2]
 	strh	w1, [x3, x8]
-	bne	.L453
+	bne	.L455
 	strh	w0, [x2, 2]
 	str	x4, [x12, #:lo12:.LANCHOR87]
-	b	.L448
-.L453:
+	b	.L450
+.L455:
 	ldrh	w1, [x2, 2]
 	mov	w4, 6
 	umull	x1, w1, w4
 	strh	w0, [x3, x1]
 	strh	w0, [x2, 2]
-	b	.L448
+	b	.L450
 	.size	insert_free_list, .-insert_free_list
 	.section	.text.INSERT_FREE_LIST,"ax",@progbits
 	.align	2
@@ -3114,7 +3150,7 @@ INSERT_FREE_LIST:
 	adrp	x1, .LANCHOR40
 	ldrh	w1, [x1, #:lo12:.LANCHOR40]
 	cmp	w1, w0
-	bcs	.L454
+	bcs	.L456
 	mov	w2, 203
 	adrp	x1, .LANCHOR89
 	adrp	x0, .LC5
@@ -3127,7 +3163,7 @@ INSERT_FREE_LIST:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	b	printf
-.L454:
+.L456:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
@@ -3151,10 +3187,10 @@ List_remove_node:
 	add	x19, x23, x21
 	ldrh	w1, [x19, 2]
 	cmp	w1, w0
-	bne	.L458
+	bne	.L460
 	ldr	x0, [x22]
 	cmp	x19, x0
-	beq	.L458
+	beq	.L460
 	mov	w2, 386
 	adrp	x1, .LANCHOR90
 	adrp	x0, .LC5
@@ -3166,16 +3202,16 @@ List_remove_node:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L458:
+.L460:
 	ldr	x0, [x22]
 	mov	w1, 65535
 	cmp	x19, x0
 	ldrh	w0, [x23, x21]
-	bne	.L459
+	bne	.L461
 	cmp	w0, w1
-	bne	.L460
+	bne	.L462
 	str	xzr, [x22]
-.L461:
+.L463:
 	mov	w0, -1
 	strh	w0, [x23, x21]
 	strh	w0, [x19, 2]
@@ -3185,27 +3221,27 @@ List_remove_node:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L460:
+.L462:
 	ldr	x1, [x20, #:lo12:.LANCHOR81]
 	mov	w2, 6
 	umaddl	x0, w0, w2, x1
 	mov	w1, -1
 	str	x0, [x22]
 	strh	w1, [x0, 2]
-	b	.L461
-.L459:
+	b	.L463
+.L461:
 	cmp	w0, w1
 	ldrh	w1, [x19, 2]
-	bne	.L462
+	bne	.L464
 	cmp	w1, w0
-	beq	.L461
+	beq	.L463
 	mov	w0, 6
 	mov	w2, -1
 	umull	x1, w1, w0
 	ldr	x0, [x20, #:lo12:.LANCHOR81]
 	strh	w2, [x0, x1]
-	b	.L461
-.L462:
+	b	.L463
+.L464:
 	ldr	x2, [x20, #:lo12:.LANCHOR81]
 	mov	w3, 6
 	umaddl	x4, w0, w3, x2
@@ -3213,7 +3249,7 @@ List_remove_node:
 	ldrh	w1, [x19, 2]
 	umull	x1, w1, w3
 	strh	w0, [x2, x1]
-	b	.L461
+	b	.L463
 	.size	List_remove_node, .-List_remove_node
 	.section	.text.List_pop_index_node,"ax",@progbits
 	.align	2
@@ -3221,7 +3257,7 @@ List_remove_node:
 	.type	List_pop_index_node, %function
 List_pop_index_node:
 	ldr	x2, [x0]
-	cbz	x2, .L470
+	cbz	x2, .L472
 	stp	x29, x30, [sp, -32]!
 	adrp	x3, .LANCHOR81
 	and	w1, w1, 65535
@@ -3230,9 +3266,9 @@ List_pop_index_node:
 	str	x19, [sp, 16]
 	mov	w5, 6
 	ldr	x19, [x3, #:lo12:.LANCHOR81]
-.L466:
-	cbnz	w1, .L467
-.L469:
+.L468:
+	cbnz	w1, .L469
+.L471:
 	sub	x19, x2, x19
 	mov	x2, -6148914691236517206
 	asr	x19, x19, 1
@@ -3245,15 +3281,15 @@ List_pop_index_node:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L467:
+.L469:
 	ldrh	w3, [x2]
 	cmp	w3, w4
-	beq	.L469
+	beq	.L471
 	sub	w1, w1, #1
 	umaddl	x2, w3, w5, x19
 	and	w1, w1, 65535
-	b	.L466
-.L470:
+	b	.L468
+.L472:
 	mov	w0, 65535
 	ret
 	.size	List_pop_index_node, .-List_pop_index_node
@@ -3265,26 +3301,26 @@ List_get_gc_head_node:
 	and	w2, w0, 65535
 	adrp	x0, .LANCHOR82
 	ldr	x1, [x0, #:lo12:.LANCHOR82]
-	cbz	x1, .L480
+	cbz	x1, .L482
 	adrp	x0, .LANCHOR81
 	mov	w4, 6
 	ldr	x3, [x0, #:lo12:.LANCHOR81]
 	mov	w0, 65535
-.L477:
-	cbz	w2, .L478
+.L479:
+	cbz	w2, .L480
 	ldrh	w1, [x1]
 	cmp	w1, w0
-	bne	.L479
+	bne	.L481
 	ret
-.L479:
+.L481:
 	sub	w2, w2, #1
 	umaddl	x1, w1, w4, x3
 	and	w2, w2, 65535
-	b	.L477
-.L480:
+	b	.L479
+.L482:
 	mov	w0, 65535
 	ret
-.L478:
+.L480:
 	sub	x0, x1, x3
 	mov	x1, -6148914691236517206
 	asr	x0, x0, 1
@@ -3308,15 +3344,15 @@ List_update_data_list:
 	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	stp	x25, x26, [sp, 64]
 	cmp	w0, w19
-	beq	.L483
+	beq	.L485
 	adrp	x0, .LANCHOR92
 	ldrh	w0, [x0, #:lo12:.LANCHOR92]
 	cmp	w0, w19
-	beq	.L483
+	beq	.L485
 	adrp	x0, .LANCHOR93
 	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w0, w19
-	beq	.L483
+	beq	.L485
 	adrp	x0, .LANCHOR81
 	mov	w21, 6
 	adrp	x24, .LANCHOR82
@@ -3326,7 +3362,7 @@ List_update_data_list:
 	ldr	x1, [x24, #:lo12:.LANCHOR82]
 	add	x22, x23, x21
 	cmp	x22, x1
-	beq	.L483
+	beq	.L485
 	adrp	x1, .LANCHOR83
 	ubfiz	x0, x19, 1, 16
 	mov	x25, x1
@@ -3339,10 +3375,10 @@ List_update_data_list:
 	ldrh	w0, [x22, 2]
 	csinv	w20, w20, wzr, ne
 	cmp	w0, w1
-	bne	.L486
+	bne	.L488
 	ldrh	w1, [x23, x21]
 	cmp	w1, w0
-	bne	.L486
+	bne	.L488
 	mov	w2, 504
 	adrp	x1, .LANCHOR94
 	adrp	x0, .LC5
@@ -3354,15 +3390,15 @@ List_update_data_list:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L486:
+.L488:
 	ldrh	w0, [x22, 2]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L487
+	bne	.L489
 	ldrh	w1, [x23, x21]
 	cmp	w1, w0
-	beq	.L483
-.L487:
+	beq	.L485
+.L489:
 	mov	w1, 6
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
@@ -3378,13 +3414,13 @@ List_update_data_list:
 	mul	w0, w1, w2
 	csinv	w0, w0, wzr, ne
 	cmp	w20, w0
-	bcs	.L483
+	bcs	.L485
 	adrp	x20, .LANCHOR85
 	mov	w1, w19
 	add	x0, x24, :lo12:.LANCHOR82
 	bl	List_remove_node
 	ldrh	w0, [x20, #:lo12:.LANCHOR85]
-	cbnz	w0, .L489
+	cbnz	w0, .L491
 	mov	w2, 515
 	adrp	x1, .LANCHOR94
 	adrp	x0, .LC5
@@ -3396,13 +3432,13 @@ List_update_data_list:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L489:
+.L491:
 	ldrh	w0, [x20, #:lo12:.LANCHOR85]
 	sub	w0, w0, #1
 	strh	w0, [x20, #:lo12:.LANCHOR85]
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-.L483:
+.L485:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -3424,27 +3460,27 @@ ftl_map_blk_alloc_new_blk:
 	mov	w20, 0
 	ldr	x0, [x0, 16]
 	str	x21, [sp, 32]
-.L494:
+.L496:
 	cmp	w20, w1
-	beq	.L498
+	beq	.L500
 	mov	x21, x0
 	ldrh	w2, [x0], 2
-	cbnz	w2, .L495
+	cbnz	w2, .L497
 	bl	FtlFreeSysBlkQueueOut
 	and	w1, w0, 65535
 	strh	w0, [x21]
 	sub	w2, w1, #1
 	mov	w0, 65533
 	cmp	w0, w2, uxth
-	bcs	.L496
+	bcs	.L498
 	adrp	x0, .LANCHOR75+6
 	ldrh	w2, [x0, #:lo12:.LANCHOR75+6]
 	adrp	x0, .LC8
 	add	x0, x0, :lo12:.LC8
 	bl	printf
-.L497:
-	b	.L497
-.L496:
+.L499:
+	b	.L499
+.L498:
 	ldr	w0, [x19, 48]
 	strh	wzr, [x19, 2]
 	add	w0, w0, 1
@@ -3453,10 +3489,10 @@ ftl_map_blk_alloc_new_blk:
 	strh	w20, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
-.L498:
+.L500:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L500
+	bhi	.L502
 	mov	w2, 629
 	adrp	x1, .LANCHOR95
 	adrp	x0, .LC5
@@ -3468,16 +3504,16 @@ ftl_map_blk_alloc_new_blk:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L500:
+.L502:
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L495:
+.L497:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L494
+	b	.L496
 	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
 	.section	.text.select_l2p_ram_region,"ax",@progbits
 	.align	2
@@ -3493,29 +3529,29 @@ select_l2p_ram_region:
 	adrp	x0, .LANCHOR96
 	str	x19, [sp, 16]
 	ldr	x0, [x0, #:lo12:.LANCHOR96]
-.L503:
+.L505:
 	and	w19, w1, 65535
 	cmp	w19, w2
-	bcc	.L505
+	bcc	.L507
 	add	x3, x0, 4
 	mov	w19, w2
 	mov	w5, -2147483648
 	mov	w1, 0
-.L506:
+.L508:
 	cmp	w1, w2
-	bne	.L508
+	bne	.L510
 	cmp	w19, w2
-	bcc	.L504
+	bcc	.L506
 	adrp	x1, .LANCHOR97
 	mov	w19, w2
 	mov	w3, -1
 	ldrh	w4, [x1, #:lo12:.LANCHOR97]
 	mov	w1, 0
-.L509:
+.L511:
 	cmp	w1, w2
-	bne	.L511
+	bne	.L513
 	cmp	w19, w1
-	bcc	.L504
+	bcc	.L506
 	mov	w2, 859
 	adrp	x1, .LANCHOR98
 	adrp	x0, .LC5
@@ -3527,43 +3563,43 @@ select_l2p_ram_region:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-	b	.L504
-.L505:
+	b	.L506
+.L507:
 	add	x1, x1, 1
 	add	x4, x0, x1, lsl 4
 	ldrh	w4, [x4, -16]
 	cmp	w4, w3
-	bne	.L503
-.L504:
+	bne	.L505
+.L506:
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L508:
+.L510:
 	ldr	w4, [x3]
-	tbnz	w4, #31, .L507
+	tbnz	w4, #31, .L509
 	cmp	w5, w4
-	bls	.L507
+	bls	.L509
 	mov	w5, w4
 	mov	w19, w1
-.L507:
+.L509:
 	add	w1, w1, 1
 	add	x3, x3, 16
 	and	w1, w1, 65535
-	b	.L506
-.L511:
+	b	.L508
+.L513:
 	ldr	w6, [x0, 4]
 	cmp	w3, w6
-	bls	.L510
+	bls	.L512
 	ldrh	w5, [x0]
 	cmp	w5, w4
 	csel	w3, w3, w6, eq
 	csel	w19, w19, w1, eq
-.L510:
+.L512:
 	add	w1, w1, 1
 	add	x0, x0, 16
 	and	w1, w1, 65535
-	b	.L509
+	b	.L511
 	.size	select_l2p_ram_region, .-select_l2p_ram_region
 	.section	.text.FtlUpdateVaildLpn,"ax",@progbits
 	.align	2
@@ -3574,12 +3610,12 @@ FtlUpdateVaildLpn:
 	mov	x3, x2
 	ldrh	w1, [x2, #:lo12:.LANCHOR99]
 	cmp	w1, 4
-	bhi	.L514
-	cbnz	w0, .L514
+	bhi	.L516
+	cbnz	w0, .L516
 	add	w1, w1, 1
 	strh	w1, [x2, #:lo12:.LANCHOR99]
 	ret
-.L514:
+.L516:
 	adrp	x1, .LANCHOR40
 	adrp	x0, .LANCHOR100
 	strh	wzr, [x3, #:lo12:.LANCHOR99]
@@ -3591,22 +3627,22 @@ FtlUpdateVaildLpn:
 	ldr	x6, [x1, #:lo12:.LANCHOR83]
 	mov	w7, 65535
 	mov	x1, 0
-.L515:
+.L517:
 	cmp	w5, w1, uxth
-	bhi	.L517
-	cbz	w3, .L513
+	bhi	.L519
+	cbz	w3, .L515
 	str	w2, [x0, #:lo12:.LANCHOR100]
-.L513:
+.L515:
 	ret
-.L517:
+.L519:
 	ldrh	w4, [x6, x1, lsl 1]
 	cmp	w4, w7
-	beq	.L516
+	beq	.L518
 	add	w2, w2, w4
 	mov	w3, 1
-.L516:
+.L518:
 	add	x1, x1, 1
-	b	.L515
+	b	.L517
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
 	.section	.text.ftl_set_blk_mode,"ax",@progbits
 	.align	2
@@ -3614,13 +3650,13 @@ FtlUpdateVaildLpn:
 	.type	ftl_set_blk_mode, %function
 ftl_set_blk_mode:
 	and	w0, w0, 65535
-	cbz	w1, .L524
+	cbz	w1, .L526
 	b	ftl_set_blk_mode.part.10
-.L524:
-	adrp	x1, .LANCHOR0
+.L526:
+	adrp	x1, .LANCHOR1
 	ubfx	x2, x0, 5, 11
 	lsl	x2, x2, 2
-	ldr	x3, [x1, #:lo12:.LANCHOR0]
+	ldr	x3, [x1, #:lo12:.LANCHOR1]
 	and	w1, w0, 31
 	mov	w0, 1
 	lsl	w0, w0, w1
@@ -3634,9 +3670,9 @@ ftl_set_blk_mode:
 	.global	ftl_get_blk_mode
 	.type	ftl_get_blk_mode, %function
 ftl_get_blk_mode:
-	adrp	x1, .LANCHOR0
+	adrp	x1, .LANCHOR1
 	and	w0, w0, 65535
-	ldr	x1, [x1, #:lo12:.LANCHOR0]
+	ldr	x1, [x1, #:lo12:.LANCHOR1]
 	ubfx	x2, x0, 5, 11
 	and	w0, w0, 31
 	ldr	w1, [x1, x2, lsl 2]
@@ -3658,9 +3694,9 @@ ftl_sb_update_avl_pages:
 	add	x4, x0, x4
 	ldrh	w3, [x1, #:lo12:.LANCHOR38]
 	mov	w1, 65535
-.L527:
+.L529:
 	cmp	w2, w3
-	bcc	.L529
+	bcc	.L531
 	adrp	x1, .LANCHOR52
 	ubfiz	x3, x3, 1, 16
 	add	x3, x3, 16
@@ -3671,32 +3707,32 @@ ftl_sb_update_avl_pages:
 	sub	w1, w1, #1
 	and	w1, w1, 65535
 	sub	w1, w1, w6
-.L530:
+.L532:
 	cmp	x2, x3
-	bne	.L532
+	bne	.L534
 	ret
-.L529:
+.L531:
 	ldrh	w5, [x4]
 	cmp	w5, w1
-	beq	.L528
+	beq	.L530
 	ldrh	w5, [x0, 4]
 	add	w5, w5, 1
 	strh	w5, [x0, 4]
-.L528:
+.L530:
 	add	w2, w2, 1
 	add	x4, x4, 2
 	and	w2, w2, 65535
-	b	.L527
-.L532:
+	b	.L529
+.L534:
 	ldrh	w4, [x2]
 	cmp	w4, w5
-	beq	.L531
+	beq	.L533
 	ldrh	w4, [x0, 4]
 	add	w4, w1, w4
 	strh	w4, [x0, 4]
-.L531:
+.L533:
 	add	x2, x2, 2
-	b	.L530
+	b	.L532
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
 	.section	.text.make_superblock,"ax",@progbits
 	.align	2
@@ -3711,8 +3747,8 @@ make_superblock:
 	adrp	x0, .LANCHOR40
 	ldrh	w0, [x0, #:lo12:.LANCHOR40]
 	cmp	w1, w0
-	bcc	.L534
-	mov	w2, 2575
+	bcc	.L536
+	mov	w2, 2577
 	adrp	x1, .LANCHOR101
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR101
@@ -3723,7 +3759,7 @@ make_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L534:
+.L536:
 	adrp	x0, .LANCHOR38
 	adrp	x7, .LANCHOR47
 	add	x6, x19, 16
@@ -3733,9 +3769,9 @@ make_superblock:
 	strh	wzr, [x19, 4]
 	mov	w10, -1
 	strb	wzr, [x19, 7]
-.L535:
+.L537:
 	cmp	w8, w5, uxth
-	bhi	.L537
+	bhi	.L539
 	adrp	x1, .LANCHOR52
 	ldrb	w0, [x19, 7]
 	strb	wzr, [x19, 9]
@@ -3744,42 +3780,42 @@ make_superblock:
 	strh	w0, [x19, 4]
 	adrp	x0, .LANCHOR28
 	ldr	w0, [x0, #:lo12:.LANCHOR28]
-	cbz	w0, .L538
+	cbz	w0, .L540
 	adrp	x0, .LANCHOR78
 	ldrh	w1, [x19]
 	ldr	x0, [x0, #:lo12:.LANCHOR78]
 	ldrh	w0, [x0, x1, lsl 1]
 	cmp	w0, 79
-	bhi	.L538
+	bhi	.L540
 	mov	w0, 1
 	strb	w0, [x19, 9]
-.L538:
-	adrp	x0, .LANCHOR1
-	ldrb	w0, [x0, #:lo12:.LANCHOR1]
-	cbz	w0, .L539
+.L540:
+	adrp	x0, .LANCHOR2
+	ldrb	w0, [x0, #:lo12:.LANCHOR2]
+	cbz	w0, .L541
 	mov	w0, 1
 	strb	w0, [x19, 9]
-.L539:
+.L541:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L537:
+.L539:
 	ldrh	w1, [x19]
 	ldrb	w0, [x7, x5]
 	bl	V2P_block
 	mov	w4, w0
 	strh	w10, [x6]
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L536
+	cbnz	w0, .L538
 	strh	w4, [x6]
 	ldrb	w0, [x19, 7]
 	add	w0, w0, 1
 	strb	w0, [x19, 7]
-.L536:
+.L538:
 	add	x5, x5, 1
 	add	x6, x6, 2
-	b	.L535
+	b	.L537
 	.size	make_superblock, .-make_superblock
 	.section	.text.update_multiplier_value,"ax",@progbits
 	.align	2
@@ -3796,11 +3832,11 @@ update_multiplier_value:
 	add	x8, x8, :lo12:.LANCHOR47
 	ldrh	w11, [x0, #:lo12:.LANCHOR52]
 	cmp	w10, w7, uxth
-	bhi	.L559
-	cbz	w5, .L557
+	bhi	.L561
+	cbz	w5, .L559
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.L558:
+.L560:
 	adrp	x0, .LANCHOR81
 	mov	w1, 6
 	ldr	x0, [x0, #:lo12:.LANCHOR81]
@@ -3808,31 +3844,31 @@ update_multiplier_value:
 	mov	w0, 0
 	strh	w5, [x6, 4]
 	ret
-.L552:
+.L554:
 	mov	w5, 0
-	b	.L551
-.L557:
-	mov	w5, 0
-	b	.L558
+	b	.L553
 .L559:
+	mov	w5, 0
+	b	.L560
+.L561:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
-.L550:
+.L552:
 	ldrb	w0, [x8, x7]
 	mov	w1, w6
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L549
+	cbnz	w0, .L551
 	add	w5, w5, w11
 	and	w5, w5, 65535
-.L549:
+.L551:
 	add	x7, x7, 1
 	cmp	w10, w7, uxth
-	bhi	.L550
-	cbz	w5, .L552
+	bhi	.L552
+	cbz	w5, .L554
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.L551:
+.L553:
 	adrp	x0, .LANCHOR81
 	mov	w1, 6
 	ldr	x0, [x0, #:lo12:.LANCHOR81]
@@ -3849,7 +3885,7 @@ update_multiplier_value:
 GetFreeBlockMinEraseCount:
 	adrp	x0, .LANCHOR87
 	ldr	x0, [x0, #:lo12:.LANCHOR87]
-	cbz	x0, .L562
+	cbz	x0, .L564
 	adrp	x1, .LANCHOR81
 	ldr	x1, [x1, #:lo12:.LANCHOR81]
 	sub	x0, x0, x1
@@ -3862,7 +3898,7 @@ GetFreeBlockMinEraseCount:
 	and	x0, x0, 65535
 	ldrh	w0, [x1, x0, lsl 1]
 	ret
-.L562:
+.L564:
 	mov	w0, 0
 	ret
 	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
@@ -3874,7 +3910,7 @@ GetFreeBlockMaxEraseCount:
 	adrp	x1, .LANCHOR87
 	and	w0, w0, 65535
 	ldr	x1, [x1, #:lo12:.LANCHOR87]
-	cbz	x1, .L570
+	cbz	x1, .L572
 	adrp	x2, .LANCHOR88
 	mov	w3, 7
 	mov	w5, 6
@@ -3893,25 +3929,25 @@ GetFreeBlockMaxEraseCount:
 	mul	x1, x1, x2
 	mov	w2, 0
 	and	w1, w1, 65535
-.L566:
+.L568:
 	cmp	w0, w2
-	beq	.L569
+	beq	.L571
 	umull	x4, w1, w5
 	ldrh	w4, [x3, x4]
 	cmp	w4, w6
-	bne	.L567
-.L569:
+	bne	.L569
+.L571:
 	adrp	x0, .LANCHOR78
 	ubfiz	x1, x1, 1, 16
 	ldr	x0, [x0, #:lo12:.LANCHOR78]
 	ldrh	w0, [x0, x1]
 	ret
-.L567:
+.L569:
 	add	w2, w2, 1
 	mov	w1, w4
 	and	w2, w2, 65535
-	b	.L566
-.L570:
+	b	.L568
+.L572:
 	mov	w0, 0
 	ret
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
@@ -3923,7 +3959,7 @@ free_data_superblock:
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L574
+	beq	.L576
 	stp	x29, x30, [sp, -16]!
 	adrp	x2, .LANCHOR83
 	ubfiz	x1, x0, 1, 16
@@ -3934,7 +3970,7 @@ free_data_superblock:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L574:
+.L576:
 	mov	w0, 0
 	ret
 	.size	free_data_superblock, .-free_data_superblock
@@ -3967,21 +4003,21 @@ FtlGcBufInit:
 	add	x4, x4, 8
 	mov	w1, 0
 	mov	w16, 1
-.L578:
+.L580:
 	add	w13, w2, w10
 	add	w12, w1, w11
 	cmp	x3, x8
-	bne	.L579
+	bne	.L581
 	adrp	x1, .LANCHOR107
 	ldr	x7, [x7, #:lo12:.LANCHOR104]
 	ldr	x6, [x6, #:lo12:.LANCHOR105]
 	mov	w8, 24
 	ldr	w4, [x1, #:lo12:.LANCHOR107]
-.L580:
+.L582:
 	cmp	w0, w4
-	bcc	.L581
+	bcc	.L583
 	ret
-.L579:
+.L581:
 	asr	w2, w2, 2
 	asr	w1, w1, 2
 	add	x2, x14, x2, sxtw 2
@@ -3993,8 +4029,8 @@ FtlGcBufInit:
 	add	x4, x4, 56
 	mov	w1, w12
 	mov	w2, w13
-	b	.L578
-.L581:
+	b	.L580
+.L583:
 	umull	x3, w0, w8
 	mul	w1, w10, w0
 	add	x2, x5, x3
@@ -4008,7 +4044,7 @@ FtlGcBufInit:
 	asr	w1, w1, 2
 	add	x1, x6, x1, sxtw 2
 	str	x1, [x2, 8]
-	b	.L580
+	b	.L582
 	.size	FtlGcBufInit, .-FtlGcBufInit
 	.section	.text.FtlGcBufFree,"ax",@progbits
 	.align	2
@@ -4022,30 +4058,30 @@ FtlGcBufFree:
 	ldr	w8, [x2, #:lo12:.LANCHOR107]
 	adrp	x2, .LANCHOR103
 	ldr	x4, [x2, #:lo12:.LANCHOR103]
-.L583:
+.L585:
 	cmp	w3, w1
-	bcs	.L582
+	bcs	.L584
 	umaddl	x6, w3, w7, x0
 	mov	w2, 0
-	b	.L588
-.L584:
+	b	.L590
+.L586:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-.L588:
+.L590:
 	cmp	w2, w8
-	bcs	.L585
+	bcs	.L587
 	umull	x5, w2, w10
 	add	x11, x4, x5
 	ldr	x12, [x4, x5]
 	ldr	x5, [x6, 8]
 	cmp	x12, x5
-	bne	.L584
+	bne	.L586
 	str	wzr, [x11, 16]
-.L585:
+.L587:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L583
-.L582:
+	b	.L585
+.L584:
 	ret
 	.size	FtlGcBufFree, .-FtlGcBufFree
 	.section	.text.FtlGcBufAlloc,"ax",@progbits
@@ -4061,30 +4097,30 @@ FtlGcBufAlloc:
 	adrp	x2, .LANCHOR103
 	mov	w10, 56
 	ldr	x6, [x2, #:lo12:.LANCHOR103]
-.L590:
+.L592:
 	cmp	w3, w1
-	bcs	.L589
+	bcs	.L591
 	mov	w2, 0
-	b	.L595
-.L591:
+	b	.L597
+.L593:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-.L595:
+.L597:
 	cmp	w2, w5
-	bcs	.L592
+	bcs	.L594
 	umaddl	x4, w2, w7, x6
 	ldr	w11, [x4, 16]
-	cbnz	w11, .L591
+	cbnz	w11, .L593
 	umaddl	x2, w3, w10, x0
 	ldr	x11, [x4]
 	str	w8, [x4, 16]
 	ldr	x4, [x4, 8]
 	stp	x11, x4, [x2, 8]
-.L592:
+.L594:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L590
-.L589:
+	b	.L592
+.L591:
 	ret
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
 	.section	.text.IsBlkInGcList,"ax",@progbits
@@ -4098,17 +4134,17 @@ IsBlkInGcList:
 	adrp	x1, .LANCHOR109
 	ldr	x3, [x1, #:lo12:.LANCHOR109]
 	mov	x1, 0
-.L597:
+.L599:
 	cmp	w2, w1, uxth
-	bhi	.L599
+	bhi	.L601
 	mov	w0, 0
 	ret
-.L599:
+.L601:
 	add	x1, x1, 1
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w0
-	bne	.L597
+	bne	.L599
 	mov	w0, 1
 	ret
 	.size	IsBlkInGcList, .-IsBlkInGcList
@@ -4130,24 +4166,24 @@ FtlGcUpdatePage:
 	mov	x3, 0
 	ldrh	w1, [x4, #:lo12:.LANCHOR108]
 	ldr	x5, [x2, #:lo12:.LANCHOR109]
-.L602:
+.L604:
 	and	w2, w3, 65535
 	cmp	w2, w1
-	bcc	.L604
-	bne	.L603
+	bcc	.L606
+	bne	.L605
 	and	x3, x3, 65535
 	strh	w0, [x5, x3, lsl 1]
 	ldrh	w0, [x4, #:lo12:.LANCHOR108]
 	add	w0, w0, 1
 	strh	w0, [x4, #:lo12:.LANCHOR108]
-	b	.L603
-.L604:
+	b	.L605
+.L606:
 	add	x3, x3, 1
 	add	x2, x5, x3, lsl 1
 	ldrh	w2, [x2, -2]
 	cmp	w2, w7
-	bne	.L602
-.L603:
+	bne	.L604
+.L605:
 	adrp	x4, .LANCHOR110
 	adrp	x1, .LANCHOR111
 	mov	w3, 12
@@ -4171,41 +4207,41 @@ FtlGcRefreshOpenBlock:
 	and	w0, w0, 65535
 	ldrh	w10, [x8, #:lo12:.LANCHOR112]
 	cmp	w10, w0
-	beq	.L607
+	beq	.L609
 	adrp	x6, .LANCHOR113
 	ldrh	w7, [x6, #:lo12:.LANCHOR113]
 	cmp	w0, w7
-	beq	.L607
+	beq	.L609
 	adrp	x4, .LANCHOR114
 	ldrh	w5, [x4, #:lo12:.LANCHOR114]
 	cmp	w0, w5
-	beq	.L607
+	beq	.L609
 	adrp	x2, .LANCHOR115
 	ldrh	w3, [x2, #:lo12:.LANCHOR115]
 	cmp	w0, w3
-	beq	.L607
+	beq	.L609
 	mov	w1, 65535
 	cmp	w10, w1
-	bne	.L608
+	bne	.L610
 	strh	w0, [x8, #:lo12:.LANCHOR112]
-.L607:
+.L609:
 	mov	w0, 0
 	ret
-.L608:
+.L610:
 	cmp	w7, w1
-	bne	.L609
+	bne	.L611
 	strh	w0, [x6, #:lo12:.LANCHOR113]
-	b	.L607
-.L609:
+	b	.L609
+.L611:
 	cmp	w5, w1
-	bne	.L610
+	bne	.L612
 	strh	w0, [x4, #:lo12:.LANCHOR114]
-	b	.L607
-.L610:
+	b	.L609
+.L612:
 	cmp	w3, w1
-	bne	.L607
+	bne	.L609
 	strh	w0, [x2, #:lo12:.LANCHOR115]
-	b	.L607
+	b	.L609
 	.size	FtlGcRefreshOpenBlock, .-FtlGcRefreshOpenBlock
 	.section	.text.FtlGcRefreshBlock,"ax",@progbits
 	.align	2
@@ -4216,42 +4252,42 @@ FtlGcRefreshBlock:
 	and	w0, w0, 65535
 	ldrh	w10, [x8, #:lo12:.LANCHOR112]
 	cmp	w10, w0
-	beq	.L619
+	beq	.L621
 	adrp	x6, .LANCHOR113
 	ldrh	w7, [x6, #:lo12:.LANCHOR113]
 	cmp	w0, w7
-	beq	.L619
+	beq	.L621
 	adrp	x4, .LANCHOR114
 	ldrh	w5, [x4, #:lo12:.LANCHOR114]
 	cmp	w0, w5
-	beq	.L619
+	beq	.L621
 	adrp	x2, .LANCHOR115
 	ldrh	w3, [x2, #:lo12:.LANCHOR115]
 	cmp	w0, w3
-	beq	.L619
+	beq	.L621
 	mov	w1, 65535
 	cmp	w10, w1
-	bne	.L613
+	bne	.L615
 	strh	w0, [x8, #:lo12:.LANCHOR112]
-.L619:
+.L621:
 	mov	w0, 0
 	ret
-.L613:
+.L615:
 	cmp	w7, w1
-	bne	.L614
+	bne	.L616
 	strh	w0, [x6, #:lo12:.LANCHOR113]
-	b	.L619
-.L614:
+	b	.L621
+.L616:
 	cmp	w5, w1
-	bne	.L615
+	bne	.L617
 	strh	w0, [x4, #:lo12:.LANCHOR114]
-	b	.L619
-.L615:
+	b	.L621
+.L617:
 	cmp	w3, w1
-	bne	.L620
+	bne	.L622
 	strh	w0, [x2, #:lo12:.LANCHOR115]
-	b	.L619
-.L620:
+	b	.L621
+.L622:
 	mov	w0, -1
 	ret
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
@@ -4269,39 +4305,39 @@ FtlGcMarkBadPhyBlk:
 	bl	FtlGcRefreshBlock
 	adrp	x0, .LANCHOR28
 	ldr	w0, [x0, #:lo12:.LANCHOR28]
-	cbz	w0, .L622
+	cbz	w0, .L624
 	adrp	x1, .LANCHOR78
 	ubfiz	x0, x11, 1, 16
 	ldr	x2, [x1, #:lo12:.LANCHOR78]
 	ldrh	w1, [x2, x0]
 	cmp	w1, 39
-	bls	.L622
+	bls	.L624
 	sub	w1, w1, #40
 	strh	w1, [x2, x0]
-.L622:
+.L624:
 	adrp	x1, .LANCHOR116
 	adrp	x3, .LANCHOR117
 	add	x3, x3, :lo12:.LANCHOR117
 	mov	x2, 0
 	ldrh	w0, [x1, #:lo12:.LANCHOR116]
-.L623:
+.L625:
 	cmp	w0, w2, uxth
-	bhi	.L625
+	bhi	.L627
 	cmp	w0, 15
-	bhi	.L624
+	bhi	.L626
 	add	w2, w0, 1
 	strh	w2, [x1, #:lo12:.LANCHOR116]
 	adrp	x1, .LANCHOR117
 	add	x1, x1, :lo12:.LANCHOR117
 	strh	w12, [x1, w0, sxtw 1]
-	b	.L624
-.L625:
+	b	.L626
+.L627:
 	add	x2, x2, 1
 	add	x4, x3, x2, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w12
-	bne	.L623
-.L624:
+	bne	.L625
+.L626:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
@@ -4313,20 +4349,20 @@ FtlGcMarkBadPhyBlk:
 FtlGcReFreshBadBlk:
 	adrp	x0, .LANCHOR116
 	ldrh	w0, [x0, #:lo12:.LANCHOR116]
-	cbz	w0, .L637
+	cbz	w0, .L639
 	adrp	x1, .LANCHOR112
 	ldrh	w2, [x1, #:lo12:.LANCHOR112]
 	mov	w1, 65535
 	cmp	w2, w1
-	bne	.L637
+	bne	.L639
 	stp	x29, x30, [sp, -16]!
 	adrp	x11, .LANCHOR118
 	add	x29, sp, 0
 	ldrh	w1, [x11, #:lo12:.LANCHOR118]
 	cmp	w1, w0
-	bcc	.L632
+	bcc	.L634
 	strh	wzr, [x11, #:lo12:.LANCHOR118]
-.L632:
+.L634:
 	ldrh	w1, [x11, #:lo12:.LANCHOR118]
 	adrp	x0, .LANCHOR117
 	add	x0, x0, :lo12:.LANCHOR117
@@ -4339,7 +4375,7 @@ FtlGcReFreshBadBlk:
 	strh	w0, [x11, #:lo12:.LANCHOR118]
 	mov	w0, 0
 	ret
-.L637:
+.L639:
 	mov	w0, 0
 	ret
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
@@ -4354,9 +4390,9 @@ flash_boot_enter_slc_mode:
 	mov	w1, 12336
 	movk	w1, 0x5638, lsl 16
 	cmp	w2, w1
-	bne	.L640
+	bne	.L642
 	b	flash_enter_slc_mode
-.L640:
+.L642:
 	ret
 	.size	flash_boot_enter_slc_mode, .-flash_boot_enter_slc_mode
 	.section	.text.flash_boot_exit_slc_mode,"ax",@progbits
@@ -4370,9 +4406,9 @@ flash_boot_exit_slc_mode:
 	mov	w1, 12336
 	movk	w1, 0x5638, lsl 16
 	cmp	w2, w1
-	bne	.L642
+	bne	.L644
 	b	flash_exit_slc_mode
-.L642:
+.L644:
 	ret
 	.size	flash_boot_exit_slc_mode, .-flash_boot_exit_slc_mode
 	.section	.text.FW_FlashBlockErase.constprop.41,"ax",@progbits
@@ -4417,16 +4453,16 @@ BuildFlashLsbPageTable:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w20, w1
-	cbnz	w0, .L648
+	cbnz	w0, .L650
 	adrp	x1, .LANCHOR16
 	add	x1, x1, :lo12:.LANCHOR16
 	mov	x0, 0
-.L649:
+.L651:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 256
-	bne	.L649
-.L655:
+	bne	.L651
+.L657:
 	adrp	x19, .LANCHOR120
 	add	x19, x19, :lo12:.LANCHOR120
 	mov	w1, 255
@@ -4437,41 +4473,41 @@ BuildFlashLsbPageTable:
 	and	w20, w20, 65535
 	add	x1, x1, :lo12:.LANCHOR16
 	mov	x0, 0
-.L650:
+.L652:
 	cmp	w20, w0, uxth
-	bhi	.L674
+	bhi	.L676
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L648:
+.L650:
 	cmp	w0, 1
-	bne	.L651
+	bne	.L653
 	adrp	x2, .LANCHOR16
 	add	x2, x2, :lo12:.LANCHOR16
 	mov	x1, 0
-.L654:
+.L656:
 	and	w0, w1, 65535
 	cmp	x1, 3
-	bls	.L652
+	bls	.L654
 	ubfiz	w3, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 2
 	sub	w0, w3, w0
 	and	w0, w0, 65535
-.L652:
+.L654:
 	strh	w0, [x2, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L654
-	b	.L655
-.L651:
-	cmp	w0, 2
 	bne	.L656
+	b	.L657
+.L653:
+	cmp	w0, 2
+	bne	.L658
 	adrp	x2, .LANCHOR16
 	add	x2, x2, :lo12:.LANCHOR16
 	mov	w1, 65535
 	mov	x0, 0
-.L658:
+.L660:
 	cmp	x0, 2
 	and	w3, w0, 65535
 	csel	w3, w3, w1, cc
@@ -4480,32 +4516,32 @@ BuildFlashLsbPageTable:
 	add	x0, x0, 1
 	and	w1, w1, 65535
 	cmp	x0, 256
-	bne	.L658
-	b	.L655
-.L656:
+	bne	.L660
+	b	.L657
+.L658:
 	cmp	w0, 3
-	bne	.L659
+	bne	.L661
 	adrp	x2, .LANCHOR16
 	add	x2, x2, :lo12:.LANCHOR16
 	mov	x1, 0
-.L662:
+.L664:
 	and	w0, w1, 65535
 	cmp	x1, 5
-	bls	.L660
+	bls	.L662
 	ubfiz	w3, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 4
 	sub	w0, w3, w0
 	and	w0, w0, 65535
-.L660:
+.L662:
 	strh	w0, [x2, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L662
-	b	.L655
-.L659:
+	bne	.L664
+	b	.L657
+.L661:
 	cmp	w0, 4
-	bne	.L663
+	bne	.L665
 	adrp	x2, .LANCHOR16
 	add	x1, x2, :lo12:.LANCHOR16
 	add	x1, x1, 16
@@ -4524,7 +4560,7 @@ BuildFlashLsbPageTable:
 	strh	w2, [x1, -10]
 	strh	w0, [x1, -2]
 	mov	w0, 8
-.L665:
+.L667:
 	and	w3, w0, 1
 	ubfiz	w2, w0, 1, 15
 	add	w3, w3, 6
@@ -4533,55 +4569,55 @@ BuildFlashLsbPageTable:
 	strh	w2, [x1], 2
 	and	w0, w0, 65535
 	cmp	w0, 256
-	bne	.L665
-	b	.L655
-.L663:
+	bne	.L667
+	b	.L657
+.L665:
 	cmp	w0, 5
-	bne	.L666
+	bne	.L668
 	adrp	x1, .LANCHOR16
 	add	x1, x1, :lo12:.LANCHOR16
 	mov	x0, 0
-.L667:
+.L669:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 16
-	bne	.L667
+	bne	.L669
 	add	x1, x1, 32
-.L668:
+.L670:
 	strh	w0, [x1], 2
 	add	w0, w0, 2
 	and	w0, w0, 65535
 	cmp	w0, 496
-	bne	.L668
-	b	.L655
-.L666:
+	bne	.L670
+	b	.L657
+.L668:
 	cmp	w0, 6
-	bne	.L669
+	bne	.L671
 	adrp	x3, .LANCHOR16
 	add	x3, x3, :lo12:.LANCHOR16
 	mov	w1, 0
 	mov	x2, 0
 	mov	w4, 12
 	mov	w5, 10
-.L672:
+.L674:
 	and	w0, w2, 65535
 	cmp	x2, 5
-	bls	.L670
+	bls	.L672
 	tst	x0, 1
 	csel	w0, w4, w5, ne
 	sub	w0, w1, w0
 	and	w0, w0, 65535
-.L670:
+.L672:
 	strh	w0, [x3, x2, lsl 1]
 	add	w1, w1, 3
 	and	w1, w1, 65535
 	add	x2, x2, 1
 	cmp	w1, 768
-	bne	.L672
-	b	.L655
-.L669:
+	bne	.L674
+	b	.L657
+.L671:
 	cmp	w0, 9
-	bne	.L655
+	bne	.L657
 	adrp	x1, .LANCHOR16
 	add	x0, x1, :lo12:.LANCHOR16
 	strh	wzr, [x1, #:lo12:.LANCHOR16]
@@ -4591,18 +4627,18 @@ BuildFlashLsbPageTable:
 	strh	w1, [x0, 4]
 	add	x1, x0, 6
 	mov	w0, 3
-.L673:
+.L675:
 	strh	w0, [x1], 2
 	add	w0, w0, 2
 	and	w0, w0, 65535
 	cmp	w0, 509
-	bne	.L673
-	b	.L655
-.L674:
+	bne	.L675
+	b	.L657
+.L676:
 	ldrh	w2, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	strh	w2, [x19, w2, sxtw 1]
-	b	.L650
+	b	.L652
 	.size	BuildFlashLsbPageTable, .-BuildFlashLsbPageTable
 	.section	.text.FlashDieInfoInit,"ax",@progbits
 	.align	2
@@ -4647,27 +4683,27 @@ FlashDieInfoInit:
 	ldr	x7, [x0, #:lo12:.LANCHOR18]
 	add	x11, x7, 1
 	ldrb	w12, [x7]
-.L692:
+.L694:
 	mov	w2, w12
 	add	x1, x10, x22, lsl 3
 	mov	x0, x11
 	bl	FlashMemCmp8
-	cbnz	w0, .L691
+	cbnz	w0, .L693
 	ldrb	w1, [x15]
 	add	w0, w1, 1
 	strb	w0, [x15]
 	str	wzr, [x20, x1, lsl 2]
 	strb	w22, [x21, x1]
-.L691:
+.L693:
 	add	x22, x22, 1
 	cmp	x22, 4
-	bne	.L692
+	bne	.L694
 	ldrb	w0, [x25, #:lo12:.LANCHOR25]
 	strb	w0, [x19, #:lo12:.LANCHOR121]
 	ldrb	w0, [x7, 8]
 	cmp	w0, 2
-	beq	.L693
-.L697:
+	beq	.L695
+.L699:
 	ldrb	w0, [x25, #:lo12:.LANCHOR25]
 	ldrh	w1, [x7, 14]
 	ldp	x19, x20, [sp, 16]
@@ -4681,20 +4717,20 @@ FlashDieInfoInit:
 	ldp	x29, x30, [sp], 80
 	strh	w0, [x1, #:lo12:.LANCHOR122]
 	ret
-.L693:
-	adrp	x0, .LANCHOR3
+.L695:
+	adrp	x0, .LANCHOR4
 	add	x13, x13, :lo12:.LANCHOR22
 	add	x15, x25, :lo12:.LANCHOR25
 	add	x23, x23, :lo12:.LANCHOR17
-	ldr	w20, [x0, #:lo12:.LANCHOR3]
+	ldr	w20, [x0, #:lo12:.LANCHOR4]
 	add	x14, x24, :lo12:.LANCHOR26
 	mov	x19, 0
-.L696:
+.L698:
 	mov	w2, w12
 	add	x1, x13, x19, lsl 3
 	mov	x0, x11
 	bl	FlashMemCmp8
-	cbnz	w0, .L694
+	cbnz	w0, .L696
 	ldrb	w2, [x7, 13]
 	ldrh	w0, [x7, 14]
 	ldrb	w1, [x15]
@@ -4704,18 +4740,18 @@ FlashDieInfoInit:
 	sxtw	x2, w1
 	str	w0, [x23, x2, lsl 2]
 	ldrb	w3, [x7, 23]
-	cbz	w3, .L695
+	cbz	w3, .L697
 	lsl	w0, w0, 1
 	str	w0, [x23, x2, lsl 2]
-.L695:
+.L697:
 	add	w1, w1, 1
 	strb	w19, [x14, x2]
 	strb	w1, [x15]
-.L694:
+.L696:
 	add	x19, x19, 1
 	cmp	x19, 4
-	bne	.L696
-	b	.L697
+	bne	.L698
+	b	.L699
 	.size	FlashDieInfoInit, .-FlashDieInfoInit
 	.section	.text.ReadFlashInfo,"ax",@progbits
 	.align	2
@@ -4733,8 +4769,8 @@ ReadFlashInfo:
 	adrp	x3, .LANCHOR68
 	mov	w4, 1
 	ldr	x1, [x0, #:lo12:.LANCHOR18]
-	adrp	x0, .LANCHOR3
-	ldr	w0, [x0, #:lo12:.LANCHOR3]
+	adrp	x0, .LANCHOR4
+	ldr	w0, [x0, #:lo12:.LANCHOR4]
 	ldrb	w2, [x1, 9]
 	mul	w0, w0, w2
 	strb	w0, [x19, 4]
@@ -4763,20 +4799,20 @@ ReadFlashInfo:
 	adrp	x0, .LANCHOR25
 	strb	wzr, [x19, 10]
 	ldrb	w3, [x0, #:lo12:.LANCHOR25]
-.L706:
+.L708:
 	cmp	w3, w1, uxtb
-	bhi	.L707
+	bhi	.L709
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L707:
+.L709:
 	ldrb	w0, [x1, x2]
 	add	x1, x1, 1
 	ldrb	w5, [x19, 10]
 	lsl	w0, w4, w0
 	orr	w0, w0, w5
 	strb	w0, [x19, 10]
-	b	.L706
+	b	.L708
 	.size	ReadFlashInfo, .-ReadFlashInfo
 	.section	.text.FtlBbt2Bitmap,"ax",@progbits
 	.align	2
@@ -4802,13 +4838,13 @@ FtlBbt2Bitmap:
 	mov	w1, 0
 	mov	x0, x20
 	bl	ftl_memset
-.L712:
+.L714:
 	ldrh	w0, [x21, x19]
 	cmp	w0, w24
-	beq	.L709
+	beq	.L711
 	ldrh	w1, [x22]
 	cmp	w1, w0
-	bhi	.L711
+	bhi	.L713
 	mov	w2, 79
 	mov	x1, x23
 	adrp	x0, .LC5
@@ -4819,7 +4855,7 @@ FtlBbt2Bitmap:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L711:
+.L713:
 	ldrh	w1, [x21, x19]
 	mov	w2, 1
 	add	x19, x19, 2
@@ -4831,8 +4867,8 @@ FtlBbt2Bitmap:
 	ldr	w1, [x20, x0]
 	orr	w1, w1, w2
 	str	w1, [x20, x0]
-	bne	.L712
-.L709:
+	bne	.L714
+.L711:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -4895,10 +4931,10 @@ ftl_free_no_use_map_blk:
 	str	x25, [sp, 64]
 	bl	ftl_memset
 	mov	w0, 0
-.L720:
+.L722:
 	ldrh	w1, [x19, 6]
 	cmp	w1, w0
-	bhi	.L724
+	bhi	.L726
 	adrp	x0, .LANCHOR53
 	mov	w23, 0
 	mov	w20, 0
@@ -4906,10 +4942,10 @@ ftl_free_no_use_map_blk:
 	ldrh	w0, [x19]
 	strh	w1, [x21, x0, lsl 1]
 	ldrh	w24, [x21]
-.L725:
+.L727:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L729
+	bhi	.L731
 	mov	w0, w23
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -4917,64 +4953,64 @@ ftl_free_no_use_map_blk:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L724:
+.L726:
 	ubfiz	x1, x0, 2, 16
 	ldr	w2, [x20, x1]
 	mov	w1, 0
 	ubfx	x2, x2, 10, 16
-.L721:
+.L723:
 	ldrh	w3, [x19, 10]
 	cmp	w3, w1
-	bhi	.L723
+	bhi	.L725
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L720
-.L723:
+	b	.L722
+.L725:
 	ubfiz	x3, x1, 1, 16
 	ldrh	w4, [x22, x3]
 	cmp	w4, w2
-	bne	.L722
-	cbz	w2, .L722
+	bne	.L724
+	cbz	w2, .L724
 	ldrh	w4, [x21, x3]
 	add	w4, w4, 1
 	strh	w4, [x21, x3]
-.L722:
+.L724:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L721
-.L729:
+	b	.L723
+.L731:
 	ubfiz	x0, x20, 1, 16
 	ldrh	w1, [x21, x0]
 	cmp	w24, w1
-	bls	.L726
+	bls	.L728
 	add	x25, x22, x0
 	ldrh	w0, [x22, x0]
-	cbnz	w0, .L727
-.L728:
+	cbnz	w0, .L729
+.L730:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L725
-.L726:
-	cbnz	w1, .L728
+	b	.L727
+.L728:
+	cbnz	w1, .L730
 	add	x25, x22, x0
 	ldrh	w0, [x22, x0]
-	cbz	w0, .L728
-.L730:
+	cbz	w0, .L730
+.L732:
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
 	strh	wzr, [x25]
 	ldrh	w0, [x19, 8]
 	sub	w0, w0, #1
 	strh	w0, [x19, 8]
-	b	.L728
-.L731:
-	mov	w24, 0
 	b	.L730
-.L727:
+.L733:
+	mov	w24, 0
+	b	.L732
+.L729:
 	mov	w23, w20
-	cbz	w1, .L731
+	cbz	w1, .L733
 	mov	w24, w1
-	b	.L728
+	b	.L730
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.section	.text.FtlL2PDataInit,"ax",@progbits
 	.align	2
@@ -5010,10 +5046,10 @@ FtlL2PDataInit:
 	mov	w2, -1
 	ldrh	w5, [x22, #:lo12:.LANCHOR57]
 	add	x3, x0, x3, lsl 4
-.L741:
+.L743:
 	add	x4, x1, x5
 	cmp	x0, x3
-	bne	.L742
+	bne	.L744
 	adrp	x1, .LANCHOR127
 	add	x0, x1, :lo12:.LANCHOR127
 	ldp	x21, x22, [sp, 32]
@@ -5044,7 +5080,7 @@ FtlL2PDataInit:
 	str	x1, [x0, 40]
 	ldp	x29, x30, [sp], 64
 	ret
-.L742:
+.L744:
 	and	x1, x1, -4
 	strh	w2, [x0]
 	add	x1, x6, x1
@@ -5052,7 +5088,7 @@ FtlL2PDataInit:
 	str	x1, [x0, 8]
 	add	x0, x0, 16
 	mov	x1, x4
-	b	.L741
+	b	.L743
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
 	.section	.text.FtlVariablesInit,"ax",@progbits
 	.align	2
@@ -5155,35 +5191,35 @@ SupperBlkListInit:
 	str	xzr, [x0, #:lo12:.LANCHOR84]
 	adrp	x0, .LANCHOR139
 	strh	wzr, [x0, #:lo12:.LANCHOR139]
-.L747:
+.L749:
 	ldrh	w0, [x25]
 	cmp	w19, w0
-	bge	.L754
+	bge	.L756
 	adrp	x0, .LANCHOR52
 	ldrh	w8, [x27, #:lo12:.LANCHOR38]
 	mov	w5, 0
 	mov	w6, 0
 	ldrh	w7, [x0, #:lo12:.LANCHOR52]
-	b	.L755
-.L749:
+	b	.L757
+.L751:
 	ldrb	w0, [x26, w6, sxtw]
 	mov	w1, w19
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L748
+	cbnz	w0, .L750
 	add	w5, w7, w5
 	sxth	w5, w5
-.L748:
+.L750:
 	add	w6, w6, 1
 	sxth	w6, w6
-.L755:
+.L757:
 	cmp	w6, w8
-	blt	.L749
-	cbz	w5, .L750
+	blt	.L751
+	cbz	w5, .L752
 	mov	w0, 32768
 	sdiv	w5, w0, w5
 	sxth	w5, w5
-.L751:
+.L753:
 	ldr	x1, [x24, #:lo12:.LANCHOR81]
 	mov	w0, 6
 	smaddl	x0, w19, w0, x1
@@ -5191,46 +5227,46 @@ SupperBlkListInit:
 	adrp	x0, .LANCHOR91
 	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	cmp	w19, w0
-	beq	.L752
+	beq	.L754
 	adrp	x0, .LANCHOR92
 	ldrh	w0, [x0, #:lo12:.LANCHOR92]
 	cmp	w19, w0
-	beq	.L752
+	beq	.L754
 	adrp	x0, .LANCHOR93
 	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w19, w0
-	beq	.L752
+	beq	.L754
 	adrp	x0, .LANCHOR83
 	ldr	x0, [x0, #:lo12:.LANCHOR83]
 	ldrh	w0, [x0, w19, sxtw 1]
-	cbnz	w0, .L753
+	cbnz	w0, .L755
 	add	w21, w21, 1
 	mov	w0, w19
 	and	w21, w21, 65535
 	bl	INSERT_FREE_LIST
-.L752:
+.L754:
 	add	w19, w19, 1
 	sxth	w19, w19
-	b	.L747
-.L750:
+	b	.L749
+.L752:
 	adrp	x0, .LANCHOR83
 	mov	w1, -1
 	ldr	x0, [x0, #:lo12:.LANCHOR83]
 	strh	w1, [x0, w19, sxtw 1]
-	b	.L751
-.L753:
+	b	.L753
+.L755:
 	add	w20, w20, 1
 	mov	w0, w19
 	and	w20, w20, 65535
 	bl	INSERT_DATA_LIST
-	b	.L752
-.L754:
+	b	.L754
+.L756:
 	strh	w20, [x23, #:lo12:.LANCHOR85]
 	add	w20, w20, w21
 	strh	w21, [x22, #:lo12:.LANCHOR88]
 	cmp	w0, w20
-	bge	.L756
-	mov	w2, 2645
+	bge	.L758
+	mov	w2, 2647
 	adrp	x1, .LANCHOR140
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR140
@@ -5241,7 +5277,7 @@ SupperBlkListInit:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L756:
+.L758:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -5336,7 +5372,7 @@ FlashLoadPhyInfoInRam:
 	stp	x19, x20, [sp, 16]
 	mov	x10, 0
 	str	x21, [sp, 32]
-.L768:
+.L770:
 	ldrb	w2, [x8, -1]
 	mov	w12, w10
 	lsl	x21, x10, 5
@@ -5344,7 +5380,7 @@ FlashLoadPhyInfoInRam:
 	mov	x0, x8
 	bl	FlashMemCmp8
 	mov	w20, w0
-	cbnz	w0, .L766
+	cbnz	w0, .L768
 	add	x0, x7, :lo12:.LANCHOR142
 	ubfiz	x12, x12, 5, 32
 	add	x21, x0, x21
@@ -5353,17 +5389,17 @@ FlashLoadPhyInfoInRam:
 	add	x4, x1, :lo12:.LANCHOR143
 	ldrb	w3, [x0, 22]
 	mov	x0, 0
-.L767:
+.L769:
 	lsl	x5, x0, 5
 	mov	w2, w0
 	ldrb	w5, [x5, x4]
 	cmp	w5, w3
-	beq	.L770
+	beq	.L772
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L767
+	bne	.L769
 	mov	w2, w0
-.L770:
+.L772:
 	ubfiz	x0, x2, 5, 32
 	add	x1, x1, :lo12:.LANCHOR143
 	adrp	x19, .LANCHOR31
@@ -5379,14 +5415,14 @@ FlashLoadPhyInfoInRam:
 	bl	ftl_memcpy
 	ldrh	w0, [x19, 10]
 	bl	FlashBlockAlignInit
-	b	.L765
-.L766:
+	b	.L767
+.L768:
 	add	x10, x10, 1
 	add	x8, x8, 32
 	cmp	x10, 81
-	bne	.L768
+	bne	.L770
 	mov	w20, -1
-.L765:
+.L767:
 	mov	w0, w20
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
@@ -5399,15 +5435,15 @@ FlashLoadPhyInfoInRam:
 	.type	ftl_memcpy32, %function
 ftl_memcpy32:
 	mov	x3, 0
-.L775:
+.L777:
 	cmp	w2, w3
-	bhi	.L776
+	bhi	.L778
 	ret
-.L776:
+.L778:
 	ldr	w4, [x1, x3, lsl 2]
 	str	w4, [x0, x3, lsl 2]
 	add	x3, x3, 1
-	b	.L775
+	b	.L777
 	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.NandcCopy1KB,"ax",@progbits
 	.align	2
@@ -5426,15 +5462,15 @@ NandcCopy1KB:
 	ubfiz	x0, x19, 9, 8
 	mov	x20, x4
 	add	x0, x2, x0
-	bne	.L778
-	cbz	x3, .L779
-	tst	x3, 3
 	bne	.L780
+	cbz	x3, .L781
+	tst	x3, 3
+	bne	.L782
 	mov	w2, 256
 	mov	x1, x3
 	bl	ftl_memcpy32
-.L779:
-	cbz	x20, .L777
+.L781:
+	cbz	x20, .L779
 	ldrb	w0, [x20]
 	lsr	w19, w19, 1
 	ldrb	w1, [x20, 1]
@@ -5446,26 +5482,26 @@ NandcCopy1KB:
 	mov	w1, 12
 	mul	w19, w19, w1
 	str	w0, [x21, w19, sxtw 2]
-.L777:
+.L779:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L780:
+.L782:
 	mov	w2, 1024
 	mov	x1, x3
 	bl	ftl_memcpy
-	b	.L779
-.L778:
-	cbz	x3, .L783
+	b	.L781
+.L780:
+	cbz	x3, .L785
 	tst	x3, 3
-	bne	.L784
+	bne	.L786
 	mov	x1, x0
 	mov	w2, 256
 	mov	x0, x3
 	bl	ftl_memcpy32
-.L783:
-	cbz	x20, .L777
+.L785:
+	cbz	x20, .L779
 	lsr	w19, w19, 1
 	mov	w0, 12
 	mul	w19, w19, w0
@@ -5477,13 +5513,13 @@ NandcCopy1KB:
 	lsr	w0, w0, 24
 	strb	w1, [x20, 2]
 	strb	w0, [x20, 3]
-	b	.L777
-.L784:
+	b	.L779
+.L786:
 	mov	x1, x0
 	mov	w2, 1024
 	mov	x0, x3
 	bl	ftl_memcpy
-	b	.L783
+	b	.L785
 	.size	NandcCopy1KB, .-NandcCopy1KB
 	.section	.text.NandcXferData,"ax",@progbits
 	.align	2
@@ -5496,9 +5532,9 @@ NandcXferData:
 	stp	x25, x26, [sp, 64]
 	and	w25, w0, 255
 	stp	x19, x20, [sp, 16]
-	adrp	x0, .LANCHOR6
+	adrp	x0, .LANCHOR0
 	and	w20, w1, 255
-	add	x0, x0, :lo12:.LANCHOR6
+	add	x0, x0, :lo12:.LANCHOR0
 	sbfiz	x1, x25, 4, 32
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
@@ -5507,14 +5543,14 @@ NandcXferData:
 	and	w24, w2, 255
 	mov	x21, x4
 	ldr	x19, [x0, x1]
-	bne	.L797
-	cbnz	x4, .L798
+	bne	.L799
+	cbnz	x4, .L800
 	add	x21, x29, 128
 	mov	w2, 64
 	mov	w1, 255
 	add	x0, x29, 128
 	bl	ftl_memset
-.L798:
+.L800:
 	mov	x5, x21
 	mov	x4, x26
 	mov	w2, w24
@@ -5524,7 +5560,7 @@ NandcXferData:
 	bl	NandcXferStart
 	mov	w0, w25
 	bl	NandcXferComp
-	cbnz	w20, .L822
+	cbnz	w20, .L824
 	adrp	x0, .LANCHOR32
 	adrp	x4, .LANCHOR35
 	mov	x1, x0
@@ -5537,38 +5573,38 @@ NandcXferData:
 	add	x2, x21, x2, lsl 2
 	csel	w3, w3, w0, cc
 	mov	w0, 0
-.L801:
+.L803:
 	add	w5, w3, w0
 	cmp	x21, x2
-	bne	.L802
+	bne	.L804
 	adrp	x0, .LANCHOR34
 	ldr	w4, [x1, #:lo12:.LANCHOR32]
 	lsr	w24, w24, 2
 	mov	w2, 0
 	ldr	w3, [x0, #:lo12:.LANCHOR34]
 	mov	w22, 0
-.L803:
+.L805:
 	cmp	w2, w24
-	bcs	.L799
-	cbnz	w4, .L809
-.L799:
+	bcs	.L801
+	cbnz	w4, .L811
+.L801:
 	str	wzr, [x19, 16]
-.L810:
+.L812:
 	adrp	x0, .LANCHOR34
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	cmp	w0, 5
-	bls	.L796
-	cbnz	w20, .L796
+	bls	.L798
+	cbnz	w20, .L798
 	ldr	w0, [x19]
 	mov	w1, 8192
 	movk	w1, 0x2, lsl 16
 	and	w1, w0, w1
 	cmp	w1, 139264
-	bne	.L796
+	bne	.L798
 	orr	w0, w0, 131072
 	mov	w22, -1
 	str	w0, [x19]
-.L796:
+.L798:
 	mov	w0, w22
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -5577,7 +5613,7 @@ NandcXferData:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L802:
+.L804:
 	ldr	x6, [x4, 8]
 	and	x0, x0, 4294967292
 	add	x21, x21, 4
@@ -5590,18 +5626,18 @@ NandcXferData:
 	lsr	w0, w0, 24
 	strb	w0, [x21, -1]
 	mov	w0, w5
-	b	.L801
-.L809:
+	b	.L803
+.L811:
 	uxtw	x0, w2
 	add	x0, x0, 8
 	ldr	w0, [x19, x0, lsl 2]
 	str	w0, [x29, 120]
 	ldr	w0, [x29, 120]
-	tbnz	x0, 2, .L825
+	tbnz	x0, 2, .L827
 	ldr	w0, [x29, 120]
-	tbnz	x0, 15, .L825
+	tbnz	x0, 15, .L827
 	cmp	w3, 5
-	bls	.L805
+	bls	.L807
 	ldr	w1, [x29, 120]
 	ubfx	x6, x1, 3, 5
 	ldr	w1, [x29, 120]
@@ -5614,26 +5650,26 @@ NandcXferData:
 	orr	w0, w5, w0, lsl 5
 	cmp	w1, w0
 	ldr	w0, [x29, 120]
-	bls	.L806
+	bls	.L808
 	ubfx	x1, x0, 3, 5
 	ldr	w0, [x29, 120]
 	ubfx	x0, x0, 27, 1
-.L831:
+.L833:
 	orr	w0, w1, w0, lsl 5
-.L807:
+.L809:
 	cmp	w22, w0
 	csel	w22, w22, w0, cs
-.L804:
-	add	w2, w2, 1
-	b	.L803
 .L806:
+	add	w2, w2, 1
+	b	.L805
+.L808:
 	ubfx	x1, x0, 16, 5
 	ldr	w0, [x29, 120]
 	ubfx	x0, x0, 29, 1
-	b	.L831
-.L805:
+	b	.L833
+.L807:
 	cmp	w3, 3
-	bls	.L826
+	bls	.L828
 	ldr	w1, [x29, 120]
 	ubfx	x6, x1, 3, 5
 	ldr	w1, [x29, 120]
@@ -5646,45 +5682,45 @@ NandcXferData:
 	orr	w0, w5, w0, lsl 5
 	cmp	w1, w0
 	ldr	w0, [x29, 120]
-	bls	.L808
+	bls	.L810
 	ubfx	x1, x0, 3, 5
 	ldr	w0, [x29, 120]
 	ubfx	x0, x0, 28, 1
-	b	.L831
-.L808:
+	b	.L833
+.L810:
 	ubfx	x1, x0, 16, 5
 	ldr	w0, [x29, 120]
 	ubfx	x0, x0, 30, 1
-	b	.L831
-.L826:
+	b	.L833
+.L828:
 	mov	w0, 0
-	b	.L807
-.L825:
+	b	.L809
+.L827:
 	mov	w22, -1
-	b	.L804
-.L822:
+	b	.L806
+.L824:
 	mov	w22, 0
-	b	.L799
-.L797:
+	b	.L801
+.L799:
 	cmp	w20, 1
-	bne	.L811
+	bne	.L813
 	cmp	x4, 0
 	mov	w23, 2
 	csel	w23, w23, wzr, ne
 	mov	w27, 0
 	lsl	w23, w23, 1
 	mov	w22, 0
-.L812:
+.L814:
 	cmp	w22, w24
-	bcc	.L814
+	bcc	.L816
 	mov	w22, 0
-	b	.L810
-.L814:
+	b	.L812
+.L816:
 	and	w28, w22, 3
-	cbz	x26, .L827
+	cbz	x26, .L829
 	lsl	w3, w22, 9
 	add	x3, x26, x3
-.L813:
+.L815:
 	add	x4, x21, x27, uxtw
 	mov	w2, w28
 	mov	w1, 1
@@ -5701,11 +5737,11 @@ NandcXferData:
 	add	w27, w27, w23
 	mov	w0, w25
 	bl	NandcXferComp
-	b	.L812
-.L827:
+	b	.L814
+.L829:
 	mov	x3, 0
-	b	.L813
-.L811:
+	b	.L815
+.L813:
 	mov	w0, w25
 	mov	x5, 0
 	mov	x4, 0
@@ -5721,16 +5757,16 @@ NandcXferData:
 	lsl	w0, w27, 1
 	mov	w22, 0
 	str	w0, [x29, 108]
-.L815:
+.L817:
 	cmp	w24, w23
-	bls	.L810
+	bls	.L812
 	mov	w0, w25
 	bl	NandcXferComp
 	ldr	w0, [x19, 32]
 	add	w27, w23, 2
 	str	w0, [x29, 120]
 	cmp	w24, w27
-	bls	.L816
+	bls	.L818
 	mov	x5, 0
 	mov	x4, 0
 	and	w3, w27, 3
@@ -5738,9 +5774,9 @@ NandcXferData:
 	mov	w1, 0
 	mov	w0, w25
 	bl	NandcXferStart
-.L816:
+.L818:
 	ldr	w0, [x29, 120]
-	tbnz	x0, 2, .L828
+	tbnz	x0, 2, .L830
 	ldr	w0, [x29, 120]
 	ubfx	x1, x0, 3, 5
 	ldr	w0, [x29, 120]
@@ -5748,12 +5784,12 @@ NandcXferData:
 	orr	w0, w1, w0, lsl 5
 	cmp	w22, w0
 	csel	w22, w22, w0, cs
-.L817:
+.L819:
 	and	w2, w23, 3
-	cbz	x26, .L829
+	cbz	x26, .L831
 	lsl	w3, w23, 9
 	add	x3, x26, x3
-.L818:
+.L820:
 	add	x4, x21, x28, uxtw
 	mov	x0, x19
 	mov	w1, 0
@@ -5761,13 +5797,13 @@ NandcXferData:
 	ldr	w0, [x29, 108]
 	mov	w23, w27
 	add	w28, w28, w0
-	b	.L815
-.L828:
-	mov	w22, -1
 	b	.L817
-.L829:
+.L830:
+	mov	w22, -1
+	b	.L819
+.L831:
 	mov	x3, 0
-	b	.L818
+	b	.L820
 	.size	NandcXferData, .-NandcXferData
 	.section	.text.FlashReadRawPage,"ax",@progbits
 	.align	2
@@ -5785,16 +5821,16 @@ FlashReadRawPage:
 	mov	x22, x2
 	mov	x23, x3
 	ldrb	w20, [x1, #:lo12:.LANCHOR31+9]
-	bne	.L833
-	adrp	x0, .LANCHOR2
-	adrp	x1, .LANCHOR3
-	ldrb	w0, [x0, #:lo12:.LANCHOR2]
-	ldr	w1, [x1, #:lo12:.LANCHOR3]
+	bne	.L835
+	adrp	x0, .LANCHOR3
+	adrp	x1, .LANCHOR4
+	ldrb	w0, [x0, #:lo12:.LANCHOR3]
+	ldr	w1, [x1, #:lo12:.LANCHOR4]
 	mul	w0, w0, w1
 	cmp	w0, w21
 	mov	w0, 4
 	csel	w20, w20, w0, ls
-.L833:
+.L835:
 	mov	w0, w19
 	bl	NandcWaitFlashReady
 	mov	w0, w19
@@ -5847,7 +5883,7 @@ FlashDdrTunningRead:
 	cmp	w0, 8
 	mov	w0, 12
 	csel	w22, w22, w0, cc
-	cbz	w4, .L849
+	cbz	w4, .L851
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
@@ -5866,10 +5902,10 @@ FlashDdrTunningRead:
 	ldrb	w0, [x19, #:lo12:.LANCHOR24]
 	bl	NandcSetMode
 	cmn	w21, #1
-	bne	.L838
-.L847:
+	bne	.L840
+.L849:
 	mov	w21, -1
-.L835:
+.L837:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -5878,7 +5914,7 @@ FlashDdrTunningRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L838:
+.L840:
 	mov	w1, w25
 	mov	w2, w21
 	adrp	x0, .LC9
@@ -5888,20 +5924,20 @@ FlashDdrTunningRead:
 	ldr	w0, [x1, #:lo12:.LANCHOR144]
 	add	w0, w0, 1
 	cmp	w0, 2047
-	bhi	.L840
+	bhi	.L842
 	str	w0, [x1, #:lo12:.LANCHOR144]
-	b	.L835
-.L840:
+	b	.L837
+.L842:
 	str	wzr, [x1, #:lo12:.LANCHOR144]
 	mov	x28, 0
 	mov	x23, 0
-.L837:
+.L839:
 	mov	w5, 0
 	mov	w20, 0
 	mov	w6, 0
 	mov	w19, 0
 	mov	w27, -1
-.L845:
+.L847:
 	stp	w5, w6, [x29, 100]
 	mov	w0, w22
 	bl	NandcSetDdrPara
@@ -5913,65 +5949,65 @@ FlashDdrTunningRead:
 	add	w1, w21, 1
 	cmp	w0, w1
 	ldp	w5, w6, [x29, 100]
-	bhi	.L841
+	bhi	.L843
 	cmp	w0, 2
-	bhi	.L851
+	bhi	.L853
 	add	w19, w19, 1
 	cmp	w19, 9
-	bls	.L851
+	bls	.L853
 	mov	w1, w20
 	mov	w21, w0
 	sub	w20, w22, w19
 	mov	w27, 0
-.L843:
+.L845:
 	cmp	w19, w6
 	csel	w20, w20, w1, hi
-.L844:
-	cbz	w20, .L846
+.L846:
+	cbz	w20, .L848
 	mov	w1, w20
 	adrp	x0, .LC10
 	add	x0, x0, :lo12:.LC10
 	bl	printf
 	mov	w0, w20
 	bl	NandcSetDdrPara
-.L846:
-	cbz	w27, .L835
+.L848:
+	cbz	w27, .L837
 	adrp	x0, .LC11
 	mov	w2, w25
 	mov	w1, w24
 	add	x0, x0, :lo12:.LC11
 	bl	printf
-	cbz	w26, .L847
+	cbz	w26, .L849
 	ldr	w1, [x29, 108]
 	lsr	w0, w1, 8
 	bl	NandcSetDdrPara
-	b	.L835
-.L849:
-	mov	w21, 1024
 	b	.L837
-.L841:
+.L851:
+	mov	w21, 1024
+	b	.L839
+.L843:
 	cmp	w19, w6
-	bls	.L852
+	bls	.L854
 	sub	w20, w5, w19
 	cmp	w19, 7
-	bhi	.L844
+	bhi	.L846
 	mov	w6, w19
-.L852:
+.L854:
 	mov	w19, 0
-	b	.L842
-.L851:
+	b	.L844
+.L853:
 	mov	w5, w22
 	mov	w21, w0
 	mov	w27, 0
 	mov	x28, 0
 	mov	x23, 0
-.L842:
+.L844:
 	add	w22, w22, 2
 	cmp	w22, 69
-	bls	.L845
+	bls	.L847
 	mov	w1, w20
 	mov	w20, w5
-	b	.L843
+	b	.L845
 	.size	FlashDdrTunningRead, .-FlashDdrTunningRead
 	.section	.text.FlashReadPage,"ax",@progbits
 	.align	2
@@ -5992,14 +6028,14 @@ FlashReadPage:
 	bl	FlashReadRawPage
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L862
-	adrp	x24, .LANCHOR5
-	ldrb	w25, [x24, #:lo12:.LANCHOR5]
-	cbnz	w25, .L863
-.L865:
+	bne	.L864
+	adrp	x24, .LANCHOR6
+	ldrb	w25, [x24, #:lo12:.LANCHOR6]
+	cbnz	w25, .L865
+.L867:
 	adrp	x0, .LANCHOR30
 	ldrb	w0, [x0, #:lo12:.LANCHOR30]
-	cbz	w0, .L862
+	cbz	w0, .L864
 	adrp	x0, .LANCHOR19
 	mov	w4, 1
 	mov	x3, x23
@@ -6011,32 +6047,32 @@ FlashReadPage:
 	bl	FlashDdrTunningRead
 	mov	w19, w0
 	cmn	w0, #1
-	beq	.L866
+	beq	.L868
 	adrp	x0, .LANCHOR33
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	cmp	w19, w0, lsr 1
-	bls	.L862
-.L866:
+	bls	.L864
+.L868:
 	lsr	w0, w24, 8
 	bl	NandcSetDdrPara
-	b	.L862
-.L863:
-	strb	wzr, [x24, #:lo12:.LANCHOR5]
+	b	.L864
+.L865:
+	strb	wzr, [x24, #:lo12:.LANCHOR6]
 	mov	x3, x23
 	mov	x2, x22
 	mov	w1, w21
 	mov	w0, w20
 	bl	FlashReadRawPage
-	strb	w25, [x24, #:lo12:.LANCHOR5]
+	strb	w25, [x24, #:lo12:.LANCHOR6]
 	cmn	w0, #1
-	beq	.L865
+	beq	.L867
 	mov	w19, w0
-.L862:
+.L864:
 	adrp	x24, .LANCHOR145
 	ldr	x4, [x24, #:lo12:.LANCHOR145]
-	cbz	x4, .L861
+	cbz	x4, .L863
 	cmn	w19, #1
-	bne	.L861
+	bne	.L863
 	mov	x3, x23
 	mov	x2, x22
 	mov	w1, w21
@@ -6050,10 +6086,10 @@ FlashReadPage:
 	add	x0, x0, :lo12:.LC12
 	bl	printf
 	cmn	w19, #1
-	bne	.L861
+	bne	.L863
 	adrp	x0, .LANCHOR15
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L861
+	cbz	w0, .L863
 	mov	w0, w20
 	bl	flash_enter_slc_mode
 	ldr	x4, [x24, #:lo12:.LANCHOR145]
@@ -6065,7 +6101,7 @@ FlashReadPage:
 	mov	w19, w0
 	mov	w0, w20
 	bl	flash_exit_slc_mode
-.L861:
+.L863:
 	mov	w0, w19
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -6104,27 +6140,27 @@ FlashDdrParaScan:
 	adrp	x20, .LANCHOR30
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	beq	.L882
+	beq	.L884
 	cmn	w22, #1
-	bne	.L883
-.L882:
+	bne	.L885
+.L884:
 	ldrb	w0, [x19, #:lo12:.LANCHOR24]
-	tbz	x0, 0, .L883
+	tbz	x0, 0, .L885
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
 	bl	NandcSetMode
 	strb	wzr, [x20, #:lo12:.LANCHOR30]
-.L884:
+.L886:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L883:
+.L885:
 	mov	w0, 1
 	strb	w0, [x20, #:lo12:.LANCHOR30]
-	b	.L884
+	b	.L886
 	.size	FlashDdrParaScan, .-FlashDdrParaScan
 	.section	.text.FlashLoadPhyInfo,"ax",@progbits
 	.align	2
@@ -6135,7 +6171,7 @@ FlashLoadPhyInfo:
 	mov	w0, 60
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR3
+	adrp	x21, .LANCHOR4
 	adrp	x22, .LANCHOR147
 	stp	x19, x20, [sp, 16]
 	strb	w0, [x29, 120]
@@ -6146,7 +6182,7 @@ FlashLoadPhyInfo:
 	mov	w0, 16
 	strb	w0, [x29, 123]
 	adrp	x20, .LANCHOR146
-	ldr	w0, [x21, #:lo12:.LANCHOR3]
+	ldr	w0, [x21, #:lo12:.LANCHOR4]
 	mov	w19, 0
 	stp	x23, x24, [sp, 48]
 	adrp	x24, .LANCHOR148
@@ -6162,10 +6198,10 @@ FlashLoadPhyInfo:
 	str	wzr, [x24, #:lo12:.LANCHOR148]
 	mov	w0, 0
 	bl	flash_enter_slc_mode
-.L893:
+.L895:
 	add	w28, w19, 1
 	mov	x27, 0
-.L895:
+.L897:
 	add	x0, x29, 120
 	ldrb	w0, [x0, x27]
 	bl	FlashBchSel
@@ -6175,30 +6211,30 @@ FlashLoadPhyInfo:
 	mov	w0, 0
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	bne	.L894
+	bne	.L896
 	ldr	x2, [x22, #:lo12:.LANCHOR147]
 	mov	x3, 0
 	mov	w1, w28
 	mov	w0, 0
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	bne	.L894
+	bne	.L896
 	add	x27, x27, 1
 	cmp	x27, 4
-	bne	.L895
-.L896:
+	bne	.L897
+.L898:
 	ldr	w0, [x29, 108]
 	subs	w26, w26, #1
 	add	w19, w19, w0
-	bne	.L893
-	b	.L901
-.L897:
+	bne	.L895
+	b	.L903
+.L899:
 	mov	w1, 2036
 	add	x0, x6, 12
 	bl	js_hash
 	ldr	w1, [x6, 8]
 	cmp	w1, w0
-	bne	.L903
+	bne	.L905
 	add	x1, x6, 160
 	mov	w2, 32
 	mov	x0, x25
@@ -6222,39 +6258,39 @@ FlashLoadPhyInfo:
 	adrp	x0, .LANCHOR30
 	ldr	w2, [x1, 1076]
 	strb	w2, [x0, #:lo12:.LANCHOR30]
-	ldr	w0, [x21, #:lo12:.LANCHOR3]
+	ldr	w0, [x21, #:lo12:.LANCHOR4]
 	adrp	x2, .LANCHOR149
 	udiv	w0, w19, w0
 	add	w0, w0, 1
 	cmp	w0, 1
-	bls	.L899
-.L906:
+	bls	.L901
+.L908:
 	str	w0, [x2, #:lo12:.LANCHOR149]
 	adrp	x0, .LANCHOR150
 	ldrh	w1, [x1, 14]
 	mov	w23, 0
 	strb	w1, [x0, #:lo12:.LANCHOR150]
-	b	.L896
-.L899:
+	b	.L898
+.L901:
 	mov	w0, 2
-	b	.L906
-.L903:
+	b	.L908
+.L905:
 	mov	w23, -1
-	b	.L896
-.L894:
+	b	.L898
+.L896:
 	ldr	x6, [x20, #:lo12:.LANCHOR146]
 	mov	w1, 20036
 	movk	w1, 0x4e41, lsl 16
 	ldr	w0, [x6]
 	cmp	w0, w1
-	bne	.L896
-	cbnz	w23, .L897
-	ldr	w0, [x21, #:lo12:.LANCHOR3]
+	bne	.L898
+	cbnz	w23, .L899
+	ldr	w0, [x21, #:lo12:.LANCHOR4]
 	udiv	w19, w19, w0
 	adrp	x0, .LANCHOR149
 	add	w19, w19, 1
 	str	w19, [x0, #:lo12:.LANCHOR149]
-.L901:
+.L903:
 	mov	w0, 0
 	bl	flash_exit_slc_mode
 	mov	w0, w23
@@ -6285,8 +6321,8 @@ ToshibaReadRetrial:
 	stp	x23, x24, [sp, 48]
 	bl	NandcWaitFlashReady
 	sbfiz	x1, x21, 4, 32
-	adrp	x0, .LANCHOR6
-	add	x0, x0, :lo12:.LANCHOR6
+	adrp	x0, .LANCHOR0
+	add	x0, x0, :lo12:.LANCHOR0
 	add	x2, x0, x1
 	ldr	x22, [x0, x1]
 	adrp	x1, .LANCHOR10
@@ -6299,34 +6335,34 @@ ToshibaReadRetrial:
 	and	w0, w0, 255
 	add	x19, x22, x19, lsl 8
 	cmp	w0, 1
-	bls	.L924
+	bls	.L926
 	adrp	x0, .LANCHOR30
 	ldrb	w0, [x0, #:lo12:.LANCHOR30]
-	cbz	w0, .L925
+	cbz	w0, .L927
 	mov	w23, 1
 	mov	w0, 0
 	bl	NandcSetDdrMode
-.L909:
+.L911:
 	add	x0, x22, x27, lsl 8
 	mov	w1, 92
 	str	w1, [x0, 2056]
 	mov	w1, 197
 	str	w1, [x0, 2056]
-.L908:
+.L910:
 	ldrsw	x0, [x29, 124]
 	mov	w20, 1
 	mov	w24, -1
 	add	x0, x0, 8
 	add	x0, x22, x0, lsl 8
 	str	x0, [x29, 104]
-.L910:
+.L912:
 	adrp	x0, .LANCHOR151
 	ldrb	w0, [x0, #:lo12:.LANCHOR151]
 	add	w0, w0, 1
 	cmp	w20, w0
-	bcc	.L919
+	bcc	.L921
 	mov	w28, w24
-.L918:
+.L920:
 	ldr	x0, [x29, 112]
 	mov	w1, 0
 	ldrb	w0, [x0, #:lo12:.LANCHOR10]
@@ -6334,9 +6370,9 @@ ToshibaReadRetrial:
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x19
-	bhi	.L920
+	bhi	.L922
 	bl	SandiskSetRRPara
-.L921:
+.L923:
 	ldrsw	x0, [x29, 124]
 	add	x0, x0, 8
 	add	x22, x22, x0, lsl 8
@@ -6346,17 +6382,17 @@ ToshibaReadRetrial:
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L922
+	bcc	.L924
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L922:
+.L924:
 	mov	w0, w21
 	bl	NandcWaitFlashReady
-	cbz	w23, .L907
+	cbz	w23, .L909
 	mov	w0, 4
 	bl	NandcSetDdrMode
-.L907:
+.L909:
 	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6365,13 +6401,13 @@ ToshibaReadRetrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L925:
+.L927:
 	mov	w23, 0
-	b	.L909
-.L924:
+	b	.L911
+.L926:
 	mov	w23, 0
-	b	.L908
-.L919:
+	b	.L910
+.L921:
 	ldr	x0, [x29, 112]
 	mov	w1, w20
 	ldrb	w0, [x0, #:lo12:.LANCHOR10]
@@ -6379,28 +6415,28 @@ ToshibaReadRetrial:
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x19
-	bhi	.L911
+	bhi	.L913
 	bl	SandiskSetRRPara
-.L912:
+.L914:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0, #:lo12:.LANCHOR10]
 	cmp	w0, 34
-	bne	.L913
+	bne	.L915
 	adrp	x0, .LANCHOR151
 	ldrb	w0, [x0, #:lo12:.LANCHOR151]
 	sub	w0, w0, #3
 	cmp	w20, w0
-	bne	.L913
+	bne	.L915
 	ldr	x1, [x29, 104]
 	mov	w0, 179
 	str	w0, [x1, 8]
-.L913:
+.L915:
 	add	x0, x22, x27, lsl 8
 	mov	w1, 38
 	str	w1, [x0, 2056]
 	mov	w1, 93
 	str	w1, [x0, 2056]
-	cbz	w23, .L914
+	cbz	w23, .L916
 	mov	w0, 4
 	bl	NandcSetDdrMode
 	ldr	w1, [x29, 120]
@@ -6411,35 +6447,35 @@ ToshibaReadRetrial:
 	mov	w28, w0
 	mov	w0, 0
 	bl	NandcSetDdrMode
-.L915:
+.L917:
 	cmn	w28, #1
-	beq	.L916
+	beq	.L918
 	adrp	x0, .LANCHOR33
 	cmn	w24, #1
 	csel	w24, w24, w28, ne
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L918
+	bcc	.L920
 	mov	x26, 0
 	mov	x25, 0
-.L916:
+.L918:
 	add	w20, w20, 1
-	b	.L910
-.L911:
-	bl	ToshibaSetRRPara
 	b	.L912
-.L914:
+.L913:
+	bl	ToshibaSetRRPara
+	b	.L914
+.L916:
 	ldr	w1, [x29, 120]
 	mov	x3, x26
 	mov	x2, x25
 	mov	w0, w21
 	bl	FlashReadRawPage
 	mov	w28, w0
-	b	.L915
-.L920:
+	b	.L917
+.L922:
 	bl	ToshibaSetRRPara
-	b	.L921
+	b	.L923
 	.size	ToshibaReadRetrial, .-ToshibaReadRetrial
 	.section	.text.SamsungReadRetrial,"ax",@progbits
 	.align	2
@@ -6461,8 +6497,8 @@ SamsungReadRetrial:
 	bl	NandcWaitFlashReady
 	adrp	x26, .LANCHOR151
 	sbfiz	x1, x22, 4, 32
-	adrp	x0, .LANCHOR6
-	add	x0, x0, :lo12:.LANCHOR6
+	adrp	x0, .LANCHOR0
+	add	x0, x0, :lo12:.LANCHOR0
 	adrp	x27, .LANCHOR33
 	add	x2, x0, x1
 	add	x26, x26, :lo12:.LANCHOR151
@@ -6473,12 +6509,12 @@ SamsungReadRetrial:
 	ldrb	w20, [x2, 8]
 	add	x20, x20, 8
 	add	x20, x0, x20, lsl 8
-.L936:
+.L938:
 	ldrb	w0, [x26]
 	add	w0, w0, 1
 	cmp	w21, w0
-	bcc	.L940
-.L939:
+	bcc	.L942
+.L941:
 	mov	x0, x20
 	mov	w1, 0
 	bl	SamsungSetRRPara
@@ -6486,11 +6522,11 @@ SamsungReadRetrial:
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L935
+	bcc	.L937
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L935:
+.L937:
 	mov	w0, w19
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -6499,7 +6535,7 @@ SamsungReadRetrial:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L940:
+.L942:
 	mov	w1, w21
 	mov	x0, x20
 	bl	SamsungSetRRPara
@@ -6509,21 +6545,21 @@ SamsungReadRetrial:
 	mov	w0, w22
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	beq	.L937
+	beq	.L939
 	ldrb	w1, [x27]
 	cmn	w19, #1
 	csel	w19, w19, w0, ne
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L942
+	bcc	.L944
 	mov	x25, 0
 	mov	x24, 0
-.L937:
+.L939:
 	add	w21, w21, 1
-	b	.L936
-.L942:
+	b	.L938
+.L944:
 	mov	w19, w0
-	b	.L939
+	b	.L941
 	.size	SamsungReadRetrial, .-SamsungReadRetrial
 	.section	.text.MicronReadRetrial,"ax",@progbits
 	.align	2
@@ -6546,16 +6582,16 @@ MicronReadRetrial:
 	stp	x21, x22, [sp, 32]
 	stp	x27, x28, [sp, 80]
 	str	x0, [x29, 128]
-	cbnz	w1, .L950
+	cbnz	w1, .L952
 	add	w19, w19, w19, lsl 1
 	asr	w19, w19, 2
-.L951:
-	adrp	x21, .LANCHOR6
-	add	x21, x21, :lo12:.LANCHOR6
+.L953:
+	adrp	x21, .LANCHOR0
+	add	x21, x21, :lo12:.LANCHOR0
 	add	x21, x21, x20, sxtw 4
 	mov	w23, 0
 	mov	w28, 137
-.L961:
+.L963:
 	mov	w0, w20
 	bl	NandcWaitFlashReady
 	ldrb	w4, [x21, 8]
@@ -6565,11 +6601,11 @@ MicronReadRetrial:
 	mov	w22, 0
 	mov	w26, -1
 	add	x27, x8, x4, lsl 8
-.L952:
+.L954:
 	ldrb	w0, [x7]
 	cmp	w22, w0
-	bcc	.L956
-.L955:
+	bcc	.L958
+.L957:
 	add	x4, x8, x4, lsl 8
 	mov	w0, 239
 	str	x4, [x29, 120]
@@ -6583,14 +6619,14 @@ MicronReadRetrial:
 	str	wzr, [x4, 2048]
 	str	wzr, [x4, 2048]
 	str	wzr, [x4, 2048]
-	bcc	.L957
+	bcc	.L959
 	cmn	w26, #1
 	mov	w0, 256
 	csel	w26, w26, w0, eq
-.L957:
+.L959:
 	cmp	w26, 256
 	ccmn	w26, #1, 4, ne
-	bne	.L958
+	bne	.L960
 	ldr	w2, [x29, 140]
 	adrp	x0, .LC13
 	mov	w4, w26
@@ -6598,22 +6634,22 @@ MicronReadRetrial:
 	mov	w1, w22
 	add	x0, x0, :lo12:.LC13
 	bl	printf
-	cbnz	w23, .L959
+	cbnz	w23, .L961
 	ldr	x0, [x29, 128]
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L949
+	cbz	w0, .L951
 	cmn	w26, #1
-	bne	.L949
+	bne	.L951
 	mov	w1, 3
 	mov	w0, w20
 	mov	w23, 1
 	bl	micron_auto_read_calibration_config
-	b	.L961
-.L950:
+	b	.L963
+.L952:
 	mov	w0, 3
 	sdiv	w19, w19, w0
-	b	.L951
-.L956:
+	b	.L953
+.L958:
 	mov	w0, 239
 	str	w0, [x27, 2056]
 	str	w28, [x27, 2052]
@@ -6636,29 +6672,29 @@ MicronReadRetrial:
 	ldr	w10, [x29, 120]
 	ldp	x4, x7, [x29, 96]
 	ldr	x8, [x29, 112]
-	beq	.L953
+	beq	.L955
 	cmn	w26, #1
 	csel	w26, w26, w0, ne
 	cmp	w0, w19
-	bcc	.L963
+	bcc	.L965
 	mov	x25, 0
 	mov	x24, 0
-.L953:
+.L955:
 	mov	w22, w10
-	b	.L952
-.L963:
+	b	.L954
+.L965:
 	mov	w26, w0
 	mov	x25, 0
 	mov	x24, 0
-	b	.L955
-.L959:
+	b	.L957
+.L961:
 	mov	w0, w20
 	mov	w1, 0
 	bl	micron_auto_read_calibration_config
 	cmn	w26, #1
 	mov	w0, 256
 	csel	w26, w26, w0, eq
-.L949:
+.L951:
 	mov	w0, w26
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6667,13 +6703,13 @@ MicronReadRetrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L958:
-	cbz	w23, .L949
+.L960:
+	cbz	w23, .L951
 	mov	w1, 0
 	mov	w0, w20
 	mov	w26, 256
 	bl	micron_auto_read_calibration_config
-	b	.L949
+	b	.L951
 	.size	MicronReadRetrial, .-MicronReadRetrial
 	.section	.text.HynixReadRetrial,"ax",@progbits
 	.align	2
@@ -6703,9 +6739,9 @@ HynixReadRetrial:
 	sub	w0, w0, #7
 	and	w0, w0, 255
 	cmp	w0, 1
-	bhi	.L975
+	bhi	.L977
 	ldrb	w26, [x1, 20]
-.L975:
+.L977:
 	mov	w0, w20
 	bl	NandcWaitFlashReady
 	add	x6, x19, :lo12:.LANCHOR20
@@ -6714,10 +6750,10 @@ HynixReadRetrial:
 	add	x5, x5, :lo12:.LANCHOR33
 	mov	w4, 0
 	mov	w27, -1
-.L976:
+.L978:
 	cmp	w4, w21
-	bcc	.L981
-.L980:
+	bcc	.L983
+.L982:
 	ldr	x0, [x25, #:lo12:.LANCHOR18]
 	add	x19, x19, :lo12:.LANCHOR20
 	add	x19, x19, x28
@@ -6725,18 +6761,18 @@ HynixReadRetrial:
 	sub	w0, w0, #7
 	and	w0, w0, 255
 	cmp	w0, 1
-	bhi	.L982
+	bhi	.L984
 	strb	w26, [x19, 20]
-.L983:
+.L985:
 	adrp	x0, .LANCHOR33
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w27, w0, lsr 2
-	bcc	.L974
+	bcc	.L976
 	cmn	w27, #1
 	mov	w0, 256
 	csel	w27, w27, w0, eq
-.L974:
+.L976:
 	mov	w0, w27
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6745,7 +6781,7 @@ HynixReadRetrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L981:
+.L983:
 	add	w26, w26, 1
 	ldrb	w1, [x6, 1]
 	and	w26, w26, 255
@@ -6767,24 +6803,24 @@ HynixReadRetrial:
 	ldr	w4, [x29, 108]
 	ldr	x5, [x29, 96]
 	ldp	x7, x6, [x29, 112]
-	beq	.L978
+	beq	.L980
 	ldrb	w1, [x5]
 	cmn	w27, #1
 	csel	w27, w27, w0, ne
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L985
+	bcc	.L987
 	mov	x24, 0
 	mov	x23, 0
-.L978:
+.L980:
 	add	w4, w4, 1
-	b	.L976
-.L985:
+	b	.L978
+.L987:
 	mov	w27, w0
-	b	.L980
-.L982:
+	b	.L982
+.L984:
 	strb	w26, [x19, 12]
-	b	.L983
+	b	.L985
 	.size	HynixReadRetrial, .-HynixReadRetrial
 	.section	.text.FlashProgPage,"ax",@progbits
 	.align	2
@@ -6802,19 +6838,19 @@ FlashProgPage:
 	ldrb	w21, [x1, #:lo12:.LANCHOR31+9]
 	ands	w19, w0, 255
 	mov	x23, x3
-	bne	.L993
-	adrp	x0, .LANCHOR2
-	adrp	x1, .LANCHOR3
-	ldrb	w0, [x0, #:lo12:.LANCHOR2]
-	ldr	w1, [x1, #:lo12:.LANCHOR3]
+	bne	.L995
+	adrp	x0, .LANCHOR3
+	adrp	x1, .LANCHOR4
+	ldrb	w0, [x0, #:lo12:.LANCHOR3]
+	ldr	w1, [x1, #:lo12:.LANCHOR4]
 	mul	w0, w0, w1
 	cmp	w0, w20
-	bls	.L993
-	adrp	x0, .LANCHOR1
-	ldrb	w0, [x0, #:lo12:.LANCHOR1]
-	cbnz	w0, .L994
+	bls	.L995
+	adrp	x0, .LANCHOR2
+	ldrb	w0, [x0, #:lo12:.LANCHOR2]
+	cbnz	w0, .L996
 	sub	w21, w21, #2
-.L993:
+.L995:
 	mov	w0, w19
 	bl	NandcWaitFlashReady
 	mov	w0, w19
@@ -6845,9 +6881,9 @@ FlashProgPage:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L994:
+.L996:
 	mov	w21, 4
-	b	.L993
+	b	.L995
 	.size	FlashProgPage, .-FlashProgPage
 	.section	.text.FlashSavePhyInfo,"ax",@progbits
 	.align	2
@@ -6861,7 +6897,7 @@ FlashSavePhyInfo:
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR146
 	ldr	x0, [x22, #:lo12:.LANCHOR147]
-	adrp	x21, .LANCHOR3
+	adrp	x21, .LANCHOR4
 	str	x0, [x19, #:lo12:.LANCHOR146]
 	mov	w20, 0
 	adrp	x0, .LANCHOR152
@@ -6873,7 +6909,7 @@ FlashSavePhyInfo:
 	adrp	x24, .LANCHOR153
 	adrp	x26, .LANCHOR149
 	mov	w23, 0
-	add	x21, x21, :lo12:.LANCHOR3
+	add	x21, x21, :lo12:.LANCHOR4
 	add	x26, x26, :lo12:.LANCHOR149
 	bl	FlashBchSel
 	ldr	x0, [x22, #:lo12:.LANCHOR147]
@@ -6887,8 +6923,8 @@ FlashSavePhyInfo:
 	str	w25, [x0, -16]
 	ldrb	w1, [x1, #:lo12:.LANCHOR25]
 	strh	w1, [x0, -4]
-	adrp	x1, .LANCHOR2
-	ldrb	w1, [x1, #:lo12:.LANCHOR2]
+	adrp	x1, .LANCHOR3
+	ldrb	w1, [x1, #:lo12:.LANCHOR3]
 	strh	w1, [x0, -2]
 	adrp	x1, .LANCHOR30
 	ldrb	w1, [x1, #:lo12:.LANCHOR30]
@@ -6937,7 +6973,7 @@ FlashSavePhyInfo:
 	str	x0, [x19, #:lo12:.LANCHOR146]
 	mov	w0, 0
 	bl	flash_enter_slc_mode
-.L999:
+.L1001:
 	ldr	w1, [x21]
 	mov	w2, 0
 	mov	w0, 0
@@ -6964,30 +7000,30 @@ FlashSavePhyInfo:
 	bl	FlashReadRawPage
 	cmn	w0, #1
 	add	w7, w20, 1
-	beq	.L997
+	beq	.L999
 	ldr	x6, [x19, #:lo12:.LANCHOR146]
 	ldr	w0, [x6]
 	cmp	w0, w25
-	bne	.L997
+	bne	.L999
 	mov	w1, 2036
 	add	x0, x6, 12
 	bl	js_hash
 	ldr	w1, [x6, 8]
 	cmp	w1, w0
-	bne	.L997
+	bne	.L999
 	ldr	w0, [x21]
 	cmp	w23, 1
 	str	w7, [x26]
 	mul	w20, w0, w20
 	adrp	x0, .LANCHOR148
 	str	w20, [x0, #:lo12:.LANCHOR148]
-	beq	.L1000
+	beq	.L1002
 	mov	w23, 1
-.L997:
+.L999:
 	mov	w20, w7
 	cmp	w7, 4
-	bne	.L999
-.L998:
+	bne	.L1001
+.L1000:
 	mov	w0, 0
 	bl	flash_exit_slc_mode
 	cmp	w23, 0
@@ -6998,9 +7034,9 @@ FlashSavePhyInfo:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1000:
+.L1002:
 	mov	w23, 2
-	b	.L998
+	b	.L1000
 	.size	FlashSavePhyInfo, .-FlashSavePhyInfo
 	.section	.text.FlashReadIdbDataRaw,"ax",@progbits
 	.align	2
@@ -7028,34 +7064,34 @@ FlashReadIdbDataRaw:
 	ldr	w1, [x0, #:lo12:.LANCHOR29]
 	stp	x27, x28, [sp, 80]
 	str	x0, [x29, 120]
-	cbz	w1, .L1007
+	cbz	w1, .L1009
 	mov	w0, 0
 	bl	flash_enter_slc_mode
-.L1007:
-	adrp	x24, .LANCHOR2
-	adrp	x22, .LANCHOR3
+.L1009:
+	adrp	x24, .LANCHOR3
+	adrp	x22, .LANCHOR4
 	add	x27, x29, 136
-	add	x22, x22, :lo12:.LANCHOR3
-	add	x28, x24, :lo12:.LANCHOR2
+	add	x22, x22, :lo12:.LANCHOR4
+	add	x28, x24, :lo12:.LANCHOR3
 	mov	w20, -1
 	mov	w19, 2
 	mov	w2, 2048
 	mov	w1, 0
 	mov	x0, x23
 	bl	ftl_memset
-.L1008:
-	ldrb	w0, [x24, #:lo12:.LANCHOR2]
+.L1010:
+	ldrb	w0, [x24, #:lo12:.LANCHOR3]
 	cmp	w19, w0
-	bcc	.L1013
-.L1012:
+	bcc	.L1015
+.L1014:
 	mov	w0, w26
 	bl	FlashBchSel
 	ldr	x0, [x29, 120]
 	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	cbz	w0, .L1006
+	cbz	w0, .L1008
 	mov	w0, 0
 	bl	flash_exit_slc_mode
-.L1006:
+.L1008:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -7064,10 +7100,10 @@ FlashReadIdbDataRaw:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1013:
+.L1015:
 	mov	x4, 0
 	adrp	x25, .LANCHOR147
-.L1010:
+.L1012:
 	ldrb	w5, [x4, x27]
 	add	x21, x25, :lo12:.LANCHOR147
 	str	w5, [x29, 116]
@@ -7082,24 +7118,24 @@ FlashReadIdbDataRaw:
 	bl	FlashReadRawPage
 	cmn	w0, #1
 	ldr	w5, [x29, 116]
-	bne	.L1009
+	bne	.L1011
 	ldr	x4, [x29, 104]
 	add	x4, x4, 1
 	cmp	x4, 4
-	bne	.L1010
-.L1011:
+	bne	.L1012
+.L1013:
 	add	w19, w19, 1
-	b	.L1008
-.L1016:
+	b	.L1010
+.L1018:
 	mov	w20, 0
-	b	.L1012
-.L1009:
+	b	.L1014
+.L1011:
 	ldr	x0, [x21]
 	ldr	w1, [x0]
 	mov	w0, 35899
 	movk	w0, 0xfcdc, lsl 16
 	cmp	w1, w0
-	bne	.L1011
+	bne	.L1013
 	mov	w1, w5
 	adrp	x0, .LC14
 	add	x0, x0, :lo12:.LC14
@@ -7114,11 +7150,11 @@ FlashReadIdbDataRaw:
 	adrp	x0, .LANCHOR149
 	ldr	w1, [x0, #:lo12:.LANCHOR149]
 	cmp	w19, w1
-	bcs	.L1016
+	bcs	.L1018
 	str	w19, [x0, #:lo12:.LANCHOR149]
 	mov	w20, 0
 	bl	FlashSavePhyInfo
-	b	.L1011
+	b	.L1013
 	.size	FlashReadIdbDataRaw, .-FlashReadIdbDataRaw
 	.section	.text.FlashPageProgMsbFFData,"ax",@progbits
 	.align	2
@@ -7135,11 +7171,11 @@ FlashPageProgMsbFFData:
 	and	w19, w2, 65535
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
 	stp	x25, x26, [sp, 64]
-	cbz	w0, .L1026
+	cbz	w0, .L1028
 	adrp	x0, .LANCHOR29
 	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	cbnz	w0, .L1025
-.L1026:
+	cbnz	w0, .L1027
+.L1028:
 	adrp	x2, .LANCHOR18
 	mov	x25, x2
 	ldr	x0, [x2, #:lo12:.LANCHOR18]
@@ -7147,38 +7183,38 @@ FlashPageProgMsbFFData:
 	sub	w0, w23, #5
 	and	w3, w0, 255
 	cmp	w3, 63
-	bhi	.L1025
+	bhi	.L1027
 	mov	x2, 16399
 	movk	x2, 0x4000, lsl 16
 	movk	x2, 0x8000, lsl 48
 	lsr	x0, x2, x3
-	tbz	x0, 0, .L1025
+	tbz	x0, 0, .L1027
 	adrp	x20, .LANCHOR120
 	mov	w22, w1
 	add	x20, x20, :lo12:.LANCHOR120
 	mov	w26, 65535
 	adrp	x21, .LANCHOR153
-.L1028:
+.L1030:
 	ldr	x0, [x25, #:lo12:.LANCHOR18]
 	ldrh	w0, [x0, 10]
 	cmp	w0, w19
-	bhi	.L1031
-.L1025:
+	bhi	.L1033
+.L1027:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1031:
+.L1033:
 	ldrh	w0, [x20, w19, sxtw 1]
 	cmp	w0, w26
-	bne	.L1025
+	bne	.L1027
 	mov	w2, 32768
 	cmp	w23, 8
-	bne	.L1029
+	bne	.L1031
 	mov	w1, 0
-.L1036:
+.L1038:
 	ldr	x0, [x21, #:lo12:.LANCHOR153]
 	bl	ftl_memset
 	ldr	x3, [x21, #:lo12:.LANCHOR153]
@@ -7188,10 +7224,10 @@ FlashPageProgMsbFFData:
 	mov	x2, x3
 	and	w19, w19, 65535
 	bl	FlashProgPage
-	b	.L1028
-.L1029:
+	b	.L1030
+.L1031:
 	mov	w1, 255
-	b	.L1036
+	b	.L1038
 	.size	FlashPageProgMsbFFData, .-FlashPageProgMsbFFData
 	.section	.text.idb_write_data,"ax",@progbits
 	.align	2
@@ -7208,16 +7244,16 @@ idb_write_data:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	bls	.L1038
+	bls	.L1040
 	cmp	w1, 575
-	bhi	.L1039
+	bhi	.L1041
 	adrp	x0, .LANCHOR154
 	mov	x1, x2
 	mov	w2, 1
 	cmp	w4, 64
 	str	w2, [x0, #:lo12:.LANCHOR154]
 	adrp	x0, idb_buf
-	bhi	.L1040
+	bhi	.L1042
 	mov	w2, 64
 	sub	w4, w2, w4
 	sub	w2, w3, w4
@@ -7225,9 +7261,9 @@ idb_write_data:
 	lsl	w2, w2, 9
 	add	x1, x1, x4
 	add	x0, x0, :lo12:idb_buf
-.L1090:
+.L1092:
 	bl	ftl_memcpy
-.L1073:
+.L1075:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -7236,7 +7272,7 @@ idb_write_data:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 240
 	ret
-.L1040:
+.L1042:
 	mov	w2, 576
 	sub	w2, w2, w4
 	cmp	w3, w2
@@ -7246,15 +7282,15 @@ idb_write_data:
 	add	x0, x0, :lo12:idb_buf
 	lsl	w2, w2, 9
 	add	x0, x0, x4
-	b	.L1090
-.L1038:
+	b	.L1092
+.L1040:
 	cmp	w1, 575
-	bls	.L1073
-.L1039:
+	bls	.L1075
+.L1041:
 	adrp	x0, .LANCHOR154
 	str	x0, [x29, 104]
 	ldr	w1, [x0, #:lo12:.LANCHOR154]
-	cbz	w1, .L1073
+	cbz	w1, .L1075
 	adrp	x21, .LANCHOR18
 	adrp	x1, idb_buf+262140
 	adrp	x25, idb_buf
@@ -7271,9 +7307,9 @@ idb_write_data:
 	udiv	w0, w0, w20
 	str	w0, [x29, 172]
 	mov	w0, 0
-.L1044:
+.L1046:
 	ldr	w4, [x1]
-	cbnz	w4, .L1042
+	cbnz	w4, .L1044
 	ldr	w4, [x5, w0, uxtw 2]
 	add	w0, w0, 1
 	str	w4, [x1], -4
@@ -7281,8 +7317,8 @@ idb_write_data:
 	sub	w2, w2, #1
 	csel	w0, w0, wzr, cc
 	cmp	w2, 4096
-	bne	.L1044
-.L1042:
+	bne	.L1046
+.L1044:
 	add	x0, x25, :lo12:idb_buf
 	mov	w3, 512
 	mov	w23, 0
@@ -7299,19 +7335,19 @@ idb_write_data:
 	adrp	x0, .LANCHOR16
 	add	x0, x0, :lo12:.LANCHOR16
 	str	x0, [x29, 160]
-.L1045:
+.L1047:
 	cmp	w24, 15
-	bls	.L1063
-	cbnz	w23, .L1065
+	bls	.L1065
+	cbnz	w23, .L1067
 	adrp	x0, .LC17
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC17
 	bl	printf
-.L1065:
+.L1067:
 	ldr	x0, [x29, 104]
 	str	wzr, [x0, #:lo12:.LANCHOR154]
-	b	.L1073
-.L1063:
+	b	.L1075
+.L1065:
 	adrp	x27, gp_flash_check_buf
 	mov	x2, 512
 	mov	w1, 0
@@ -7326,21 +7362,21 @@ idb_write_data:
 	mul	w26, w22, w26
 	and	w26, w26, 65535
 	cmp	w26, 511
-	bhi	.L1046
+	bhi	.L1048
 	add	w0, w26, w19
 	bl	FW_FlashBlockErase.constprop.41
-.L1046:
+.L1048:
 	udiv	w4, w19, w26
 	adrp	x5, .LANCHOR15
 	add	x5, x5, :lo12:.LANCHOR15
 	mov	x28, 0
 	msub	w4, w4, w26, w19
 	sub	w26, w19, w4
-.L1047:
+.L1049:
 	add	x2, x25, :lo12:idb_buf
 	cmp	x28, 128
 	add	x2, x2, x28, lsl 11
-	bne	.L1051
+	bne	.L1053
 	ldr	x0, [x21, #:lo12:.LANCHOR18]
 	mov	w26, 0
 	ldr	x1, [x29, 128]
@@ -7358,9 +7394,9 @@ idb_write_data:
 	str	w0, [x29, 120]
 	mul	w0, w22, w28
 	ubfx	x0, x0, 2, 2
-.L1052:
+.L1054:
 	cmp	w26, 511
-	bhi	.L1059
+	bhi	.L1061
 	ldr	x3, [x29, 96]
 	mov	w1, 4
 	sub	w1, w1, w0
@@ -7371,18 +7407,18 @@ idb_write_data:
 	ldrb	w3, [x3]
 	lsr	w1, w1, 2
 	ldrh	w2, [x2, w1, sxtw 1]
-	cbz	w3, .L1053
+	cbz	w3, .L1055
 	adrp	x3, .LANCHOR119
 	mov	w4, 12336
 	movk	w4, 0x5638, lsl 16
 	ldr	w3, [x3, #:lo12:.LANCHOR119]
 	cmp	w3, w4
 	csel	w2, w2, w1, ne
-.L1053:
+.L1055:
 	ldr	w1, [x29, 120]
 	add	w0, w0, w1
-	adrp	x1, .LANCHOR3
-	ldr	w1, [x1, #:lo12:.LANCHOR3]
+	adrp	x1, .LANCHOR4
+	ldr	w1, [x1, #:lo12:.LANCHOR4]
 	madd	w0, w28, w2, w0
 	str	w0, [x29, 168]
 	adrp	x0, .LANCHOR33
@@ -7398,11 +7434,11 @@ idb_write_data:
 	mul	w0, w0, w1
 	ldr	w1, [x29, 168]
 	cmp	w1, w0
-	bcs	.L1054
+	bcs	.L1056
 	adrp	x0, .LANCHOR152
 	ldrb	w0, [x0, #:lo12:.LANCHOR152]
 	bl	FlashBchSel
-.L1054:
+.L1056:
 	mov	w0, 0
 	bl	flash_boot_enter_slc_mode
 	ldr	w0, [x29, 168]
@@ -7415,11 +7451,11 @@ idb_write_data:
 	bl	FlashReadPage
 	mov	w1, w0
 	cmn	w0, #1
-	bne	.L1055
+	bne	.L1057
 	adrp	x0, .LANCHOR152
 	ldrb	w0, [x0, #:lo12:.LANCHOR152]
 	cmp	w0, 40
-	beq	.L1055
+	beq	.L1057
 	mov	w0, 40
 	bl	FlashBchSel
 	ldr	w1, [x29, 168]
@@ -7428,7 +7464,7 @@ idb_write_data:
 	mov	w0, 0
 	bl	FlashReadPage
 	mov	w1, w0
-.L1055:
+.L1057:
 	str	w1, [x29, 168]
 	mov	w0, 0
 	bl	flash_boot_exit_slc_mode
@@ -7436,20 +7472,20 @@ idb_write_data:
 	bl	FlashBchSel
 	ldr	w1, [x29, 168]
 	cmn	w1, #1
-	bne	.L1056
-.L1059:
+	bne	.L1058
+.L1061:
 	ldr	x0, [x29, 128]
 	add	x1, x25, :lo12:idb_buf
 	mov	x22, 0
 	add	x26, x0, :lo12:gp_flash_check_buf
-.L1057:
+.L1059:
 	lsl	x0, x22, 2
 	mov	w27, w22
 	add	x28, x0, x1
 	ldr	w2, [x0, x26]
 	ldr	w0, [x0, x1]
 	cmp	w2, w0
-	beq	.L1060
+	beq	.L1062
 	mov	x2, 512
 	mov	w1, 0
 	mov	x0, x26
@@ -7465,48 +7501,48 @@ idb_write_data:
 	bl	FW_FlashBlockErase.constprop.41
 	ldr	w0, [x29, 172]
 	cmp	w0, 1
-	bls	.L1061
+	bls	.L1063
 	add	w0, w20, w19
 	bl	FW_FlashBlockErase.constprop.41
-.L1061:
+.L1063:
 	ldr	w0, [x29, 172]
 	add	w24, w24, w0
 	ldr	w0, [x29, 136]
 	add	w19, w19, w0
-	b	.L1045
-.L1051:
+	b	.L1047
+.L1053:
 	add	w1, w4, w28, lsl 2
 	lsr	w1, w1, 2
-	cbz	w1, .L1048
+	cbz	w1, .L1050
 	ldr	x0, [x29, 160]
 	add	w3, w1, 1
 	ldrb	w6, [x5]
 	ldrh	w0, [x0, w3, sxtw 1]
-	cbz	w6, .L1049
+	cbz	w6, .L1051
 	adrp	x6, .LANCHOR119
 	mov	w7, 12336
 	movk	w7, 0x5638, lsl 16
 	ldr	w6, [x6, #:lo12:.LANCHOR119]
 	cmp	w6, w7
 	csel	w0, w0, w3, ne
-.L1049:
+.L1051:
 	lsl	w0, w0, 2
 	sub	w0, w0, #4
 	str	w0, [x29, 176]
-.L1048:
+.L1050:
 	mov	w0, 61424
 	str	w0, [x29, 180]
 	ldr	x0, [x29, 160]
 	ldrh	w27, [x0, w1, sxtw 1]
 	ldrb	w0, [x5]
-	cbz	w0, .L1050
+	cbz	w0, .L1052
 	adrp	x0, .LANCHOR119
 	mov	w3, 12336
 	movk	w3, 0x5638, lsl 16
 	ldr	w0, [x0, #:lo12:.LANCHOR119]
 	cmp	w0, w3
 	csel	w27, w27, w1, ne
-.L1050:
+.L1052:
 	adrp	x0, .LANCHOR33
 	madd	w1, w22, w27, w26
 	stp	x5, x2, [x29, 112]
@@ -7538,8 +7574,8 @@ idb_write_data:
 	bl	FlashPageProgMsbFFData
 	ldr	w4, [x29, 140]
 	ldr	x5, [x29, 112]
-	b	.L1047
-.L1056:
+	b	.L1049
+.L1058:
 	ldr	x0, [x29, 144]
 	ubfiz	x0, x0, 9, 16
 	add	x27, x27, x0
@@ -7547,15 +7583,15 @@ idb_write_data:
 	add	w26, w0, w26
 	mov	w0, 0
 	and	w26, w26, 65535
-	b	.L1052
-.L1060:
+	b	.L1054
+.L1062:
 	add	x22, x22, 1
 	cmp	x22, 65536
-	bne	.L1057
+	bne	.L1059
 	add	w23, w23, 1
 	cmp	w23, 5
-	bls	.L1061
-	b	.L1065
+	bls	.L1063
+	b	.L1067
 	.size	idb_write_data, .-idb_write_data
 	.section	.text.ftl_memcmp,"ax",@progbits
 	.align	2
@@ -7589,11 +7625,11 @@ ftl_malloc:
 	.type	NandcInit, %function
 NandcInit:
 	stp	x29, x30, [sp, -16]!
-	adrp	x2, .LANCHOR6
-	add	x1, x2, :lo12:.LANCHOR6
+	adrp	x2, .LANCHOR0
+	add	x1, x2, :lo12:.LANCHOR0
 	adrp	x4, .LANCHOR119
 	add	x29, sp, 0
-	str	x0, [x2, #:lo12:.LANCHOR6]
+	str	x0, [x2, #:lo12:.LANCHOR0]
 	mov	w2, 1
 	str	w2, [x1, 24]
 	mov	w2, 2
@@ -7619,10 +7655,10 @@ NandcInit:
 	ldr	w2, [x0, 352]
 	str	w2, [x4, #:lo12:.LANCHOR119]
 	cmp	w2, 2049
-	bne	.L1095
+	bne	.L1097
 	mov	w2, 8
 	str	w2, [x3, #:lo12:.LANCHOR34]
-.L1095:
+.L1097:
 	str	w1, [x0]
 	mov	w1, 4225
 	str	wzr, [x0, 336]
@@ -7859,8 +7895,8 @@ FtlMemInit:
 	lsr	w0, w0, 3
 	add	w0, w0, 4
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR0
-	str	x0, [x1, #:lo12:.LANCHOR0]
+	adrp	x1, .LANCHOR1
+	str	x0, [x1, #:lo12:.LANCHOR1]
 	ldrh	w0, [x20, #:lo12:.LANCHOR61]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
@@ -7939,36 +7975,36 @@ FtlMemInit:
 	mov	w3, w5
 	str	x0, [x2, 32]
 	mov	x0, 1
-.L1098:
+.L1100:
 	cmp	w0, w7
-	bcc	.L1099
+	bcc	.L1101
 	mov	w2, 8
 	sub	w2, w2, w0
 	add	x2, x2, 1
 	add	x1, x1, :lo12:.LANCHOR74
 	mov	x3, 0
-.L1100:
+.L1102:
 	add	x3, x3, 1
 	cmp	x2, x3
-	bne	.L1101
+	bne	.L1103
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1099:
+.L1101:
 	ldr	x4, [x2, 32]
 	add	w0, w0, 1
 	add	x4, x4, x3, uxtw 2
 	add	w3, w3, w5
 	str	x4, [x6], 8
-	b	.L1098
-.L1101:
+	b	.L1100
+.L1103:
 	add	x4, x0, x3
 	add	x4, x1, x4, lsl 3
 	str	xzr, [x4, 24]
-	b	.L1100
+	b	.L1102
 	.size	FtlMemInit, .-FtlMemInit
 	.section	.text.ftl_free,"ax",@progbits
 	.align	2
@@ -8056,9 +8092,9 @@ rknand_print_hex:
 	mov	x19, 0
 	mov	w20, 0
 	adrp	x27, .LC20
-.L1111:
+.L1113:
 	cmp	x25, x19
-	bne	.L1117
+	bne	.L1119
 	ldp	x19, x20, [sp, 16]
 	adrp	x1, .LC20
 	ldp	x21, x22, [sp, 32]
@@ -8070,38 +8106,38 @@ rknand_print_hex:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	printf
-.L1117:
-	cbnz	w20, .L1112
+.L1119:
+	cbnz	w20, .L1114
 	mov	w2, w19
 	mov	x1, x26
 	mov	x0, x23
 	bl	printf
-.L1112:
+.L1114:
 	cmp	w24, 4
-	bne	.L1113
+	bne	.L1115
 	ldr	w1, [x22, x19, lsl 2]
-.L1119:
+.L1121:
 	mov	x0, x21
 	add	w20, w20, 1
 	bl	printf
 	cmp	w20, 15
-	bls	.L1116
+	bls	.L1118
 	mov	w20, 0
 	add	x1, x27, :lo12:.LC20
 	adrp	x0, .LC7
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1116:
+.L1118:
 	add	x19, x19, 1
-	b	.L1111
-.L1113:
+	b	.L1113
+.L1115:
 	cmp	w24, 2
-	bne	.L1115
+	bne	.L1117
 	ldrsh	w1, [x22, x19, lsl 1]
-	b	.L1119
-.L1115:
+	b	.L1121
+.L1117:
 	ldrb	w1, [x22, x19]
-	b	.L1119
+	b	.L1121
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.HynixGetReadRetryDefault,"ax",@progbits
 	.align	2
@@ -8128,18 +8164,18 @@ HynixGetReadRetryDefault:
 	strb	w4, [x0, 5]
 	strb	w3, [x0, 6]
 	strb	w1, [x0, 7]
-	bne	.L1121
+	bne	.L1123
 	mov	w1, -89
 	strb	w1, [x0, 4]
 	adrp	x0, .LANCHOR196+17
 	mov	w1, -9
 	strb	w1, [x0, #:lo12:.LANCHOR196+17]
-.L1186:
+.L1188:
 	mov	w27, 7
-	b	.L1230
-.L1121:
+	b	.L1232
+.L1123:
 	cmp	w26, 3
-	bne	.L1123
+	bne	.L1125
 	mov	w1, -80
 	strb	w1, [x0, 4]
 	mov	w1, -79
@@ -8155,26 +8191,26 @@ HynixGetReadRetryDefault:
 	mov	w1, -74
 	strb	w1, [x0, 10]
 	mov	w1, -73
-.L1229:
+.L1231:
 	mov	w27, 8
 	mov	w28, w27
 	strb	w1, [x0, 11]
-.L1122:
+.L1124:
 	sub	w0, w26, #1
 	cmp	w0, 1
-	bhi	.L1128
+	bhi	.L1130
 	adrp	x26, .LANCHOR25
 	adrp	x0, .LANCHOR26
-	adrp	x25, .LANCHOR6
+	adrp	x25, .LANCHOR0
 	add	x26, x26, :lo12:.LANCHOR25
 	add	x4, x0, :lo12:.LANCHOR26
-	add	x25, x25, :lo12:.LANCHOR6
+	add	x25, x25, :lo12:.LANCHOR0
 	mov	w24, 0
-.L1129:
+.L1131:
 	ldrb	w0, [x26]
 	cmp	w0, w24
-	bhi	.L1135
-.L1136:
+	bhi	.L1137
+.L1138:
 	add	x20, x20, :lo12:.LANCHOR20
 	ldp	x21, x22, [sp, 32]
 	strb	w28, [x20, 1]
@@ -8185,9 +8221,9 @@ HynixGetReadRetryDefault:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1123:
+.L1125:
 	cmp	w26, 4
-	bne	.L1124
+	bne	.L1126
 	mov	w5, -52
 	strb	w5, [x0, 4]
 	mov	w5, -65
@@ -8200,10 +8236,10 @@ HynixGetReadRetryDefault:
 	mov	w5, -51
 	strb	w3, [x0, 10]
 	strb	w5, [x0, 8]
-	b	.L1229
-.L1124:
+	b	.L1231
+.L1126:
 	cmp	w26, 5
-	bne	.L1125
+	bne	.L1127
 	mov	w1, 56
 	strb	w1, [x0, 4]
 	mov	w1, 57
@@ -8213,12 +8249,12 @@ HynixGetReadRetryDefault:
 	strb	w1, [x0, 6]
 	mov	w1, 59
 	strb	w1, [x0, 7]
-.L1230:
+.L1232:
 	mov	w28, 4
-	b	.L1122
-.L1125:
+	b	.L1124
+.L1127:
 	cmp	w26, 6
-	bne	.L1126
+	bne	.L1128
 	mov	w1, 14
 	strb	w1, [x0, 4]
 	mov	w1, 15
@@ -8228,10 +8264,10 @@ HynixGetReadRetryDefault:
 	strb	w1, [x0, 6]
 	mov	w1, 17
 	strb	w1, [x0, 7]
-	b	.L1230
-.L1126:
+	b	.L1232
+.L1128:
 	cmp	w26, 7
-	bne	.L1127
+	bne	.L1129
 	mov	w1, -80
 	strb	w1, [x0, 4]
 	mov	w1, -79
@@ -8254,10 +8290,10 @@ HynixGetReadRetryDefault:
 	mov	w28, 10
 	mov	w1, -43
 	strb	w1, [x0, 13]
-	b	.L1122
-.L1127:
+	b	.L1124
+.L1129:
 	cmp	w26, 8
-	bne	.L1186
+	bne	.L1188
 	mov	w1, 6
 	strb	w1, [x0, 4]
 	mov	w1, 7
@@ -8269,8 +8305,8 @@ HynixGetReadRetryDefault:
 	mov	w1, 10
 	mov	w28, 5
 	strb	w1, [x0, 8]
-	b	.L1122
-.L1135:
+	b	.L1124
+.L1137:
 	ldrb	w1, [x4, w24, sxtw]
 	add	x0, x20, :lo12:.LANCHOR20
 	mov	x21, x0
@@ -8284,7 +8320,7 @@ HynixGetReadRetryDefault:
 	ldrb	w23, [x2, 8]
 	add	x23, x1, x23, lsl 8
 	mov	w1, 55
-.L1130:
+.L1132:
 	add	x0, x21, x22
 	str	w1, [x23, 2056]
 	str	x4, [x29, 128]
@@ -8299,15 +8335,15 @@ HynixGetReadRetryDefault:
 	cmp	w28, w22, uxtb
 	ldr	w1, [x29, 140]
 	ldr	x4, [x29, 128]
-	bhi	.L1130
+	bhi	.L1132
 	adrp	x2, .LANCHOR196
 	add	x2, x2, :lo12:.LANCHOR196
 	mov	x0, 0
-.L1133:
+.L1135:
 	add	x7, x19, x0
 	add	x6, x2, x0
 	mov	x1, 1
-.L1132:
+.L1134:
 	lsl	x3, x1, 2
 	lsl	x8, x1, 3
 	ldrb	w10, [x19, x0]
@@ -8316,10 +8352,10 @@ HynixGetReadRetryDefault:
 	ldrb	w3, [x6, x3]
 	add	w3, w3, w10
 	strb	w3, [x7, x8]
-	bne	.L1132
+	bne	.L1134
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L1133
+	bne	.L1135
 	add	w24, w24, 1
 	strb	wzr, [x19, 16]
 	strb	wzr, [x19, 24]
@@ -8329,11 +8365,11 @@ HynixGetReadRetryDefault:
 	strb	wzr, [x19, 48]
 	strb	wzr, [x19, 41]
 	strb	wzr, [x19, 49]
-	b	.L1129
-.L1128:
+	b	.L1131
+.L1130:
 	sub	w0, w26, #3
 	cmp	w0, 5
-	bhi	.L1136
+	bhi	.L1138
 	mul	w24, w27, w28
 	adrp	x25, .LANCHOR25
 	sub	w22, w28, #1
@@ -8350,16 +8386,16 @@ HynixGetReadRetryDefault:
 	str	x0, [x29, 120]
 	add	x0, x22, 1
 	str	x0, [x29, 112]
-.L1137:
+.L1139:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, w21
-	bls	.L1136
+	bls	.L1138
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w22, [x0, w21, sxtw]
-	adrp	x0, .LANCHOR6
-	add	x0, x0, :lo12:.LANCHOR6
+	adrp	x0, .LANCHOR0
+	add	x0, x0, :lo12:.LANCHOR0
 	sbfiz	x1, x22, 4, 32
 	add	x3, x0, x1
 	ldr	x0, [x0, x1]
@@ -8370,43 +8406,43 @@ HynixGetReadRetryDefault:
 	mov	w0, w22
 	bl	NandcWaitFlashReady
 	cmp	w26, 7
-	bne	.L1138
+	bne	.L1140
 	mov	x1, 28
 	mov	w0, 160
 	add	x3, x20, :lo12:.LANCHOR20
 	umaddl	x0, w0, w22, x1
-.L1231:
+.L1233:
 	add	x3, x3, x0
 	mov	w0, 54
 	str	w0, [x19, 2056]
 	cmp	w26, 4
-	bne	.L1141
+	bne	.L1143
 	mov	w0, 255
 	str	w0, [x19, 2052]
 	mov	w0, 64
 	str	w0, [x19, 2048]
 	mov	w0, 204
-.L1232:
+.L1234:
 	str	w0, [x19, 2052]
 	mov	w0, 77
-	b	.L1233
-.L1138:
+	b	.L1235
+.L1140:
 	cmp	w26, 8
-	beq	.L1140
+	beq	.L1142
 	ubfiz	x0, x22, 6, 8
 	add	x3, x20, :lo12:.LANCHOR20
 	add	x0, x0, 20
-	b	.L1231
-.L1141:
+	b	.L1233
+.L1143:
 	cmp	w25, 1
-	bhi	.L1143
+	bhi	.L1145
 	add	x0, x20, :lo12:.LANCHOR20
 	ldrb	w0, [x0, 4]
 	str	w0, [x19, 2052]
 	mov	w0, 82
-.L1233:
+.L1235:
 	str	w0, [x19, 2048]
-.L1142:
+.L1144:
 	mov	w0, 22
 	str	w0, [x19, 2056]
 	mov	w0, 23
@@ -8419,14 +8455,14 @@ HynixGetReadRetryDefault:
 	cmp	w26, 6
 	str	wzr, [x19, 2052]
 	str	wzr, [x19, 2052]
-	bne	.L1144
+	bne	.L1146
 	mov	w0, 31
 	str	w0, [x19, 2052]
-.L1145:
+.L1147:
 	mov	w0, 2
 	str	w0, [x19, 2052]
 	str	wzr, [x19, 2052]
-.L1185:
+.L1187:
 	mov	w0, 48
 	str	w0, [x19, 2056]
 	str	x3, [x29, 104]
@@ -8435,124 +8471,124 @@ HynixGetReadRetryDefault:
 	cmp	w25, 1
 	ldr	x3, [x29, 104]
 	ccmp	w26, 8, 4, hi
-	beq	.L1187
+	beq	.L1189
 	cmp	w26, 7
 	mov	w0, 2
 	mov	w1, 32
 	csel	w1, w1, w0, eq
-.L1146:
+.L1148:
 	adrp	x8, .LANCHOR147
 	mov	x7, 0
 	ldr	x0, [x8, #:lo12:.LANCHOR147]
-.L1147:
+.L1149:
 	ldr	w10, [x19, 2048]
 	strb	w10, [x0, x7]
 	add	x7, x7, 1
 	cmp	w1, w7, uxtb
-	bhi	.L1147
+	bhi	.L1149
 	cmp	w26, 8
-	bne	.L1148
+	bne	.L1150
 	mov	w1, 0
-.L1150:
+.L1152:
 	ldrb	w7, [x0]
 	cmp	w7, 50
-	beq	.L1149
+	beq	.L1151
 	ldrb	w7, [x0, 1]
 	cmp	w7, 5
-	beq	.L1149
+	beq	.L1151
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 255
 	cmp	w1, 8
-	bne	.L1150
-.L1151:
+	bne	.L1152
+.L1153:
 	adrp	x0, .LC21
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC21
 	bl	printf
-.L1153:
-	b	.L1153
-.L1143:
+.L1155:
+	b	.L1155
+.L1145:
 	cmp	w26, 7
-	bne	.L1142
+	bne	.L1144
 	mov	w0, 174
 	str	w0, [x19, 2052]
 	str	wzr, [x19, 2048]
 	mov	w0, 176
-	b	.L1232
-.L1144:
+	b	.L1234
+.L1146:
 	str	wzr, [x19, 2052]
-	b	.L1145
-.L1187:
+	b	.L1147
+.L1189:
 	mov	w1, 16
-	b	.L1146
-.L1149:
+	b	.L1148
+.L1151:
 	cmp	w1, 6
-	bhi	.L1151
-.L1152:
+	bhi	.L1153
+.L1154:
 	ldr	x7, [x8, #:lo12:.LANCHOR147]
 	mov	x0, 0
-.L1162:
+.L1164:
 	ldr	w1, [x29, 128]
 	cmp	w1, w0
-	bgt	.L1163
+	bgt	.L1165
 	ldr	x1, [x8, #:lo12:.LANCHOR147]
 	mov	w10, 8
 	add	x8, x1, x24
-.L1165:
+.L1167:
 	mov	x0, 0
-.L1164:
+.L1166:
 	ldrh	w11, [x8, x0, lsl 1]
 	mvn	w11, w11
 	strh	w11, [x8, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	w23, w0
-	bgt	.L1164
+	bgt	.L1166
 	ldr	w0, [x29, 140]
 	subs	w10, w10, #1
 	add	x8, x8, x0, uxtw 1
-	bne	.L1165
+	bne	.L1167
 	mov	x10, x1
 	mov	w11, 0
 	mov	w16, 1
-.L1171:
+.L1173:
 	mov	w0, 0
 	mov	w8, 0
-.L1170:
+.L1172:
 	mov	x14, x10
 	lsl	w15, w16, w8
 	mov	w13, 16
 	mov	w12, 0
-.L1168:
+.L1170:
 	ldrh	w17, [x14]
 	add	x14, x14, x24
 	bics	wzr, w15, w17
 	cinc	w12, w12, eq
 	subs	w13, w13, #1
-	bne	.L1168
+	bne	.L1170
 	cmp	w12, 8
-	bls	.L1169
+	bls	.L1171
 	orr	w0, w0, w15
 	and	w0, w0, 65535
-.L1169:
+.L1171:
 	add	w8, w8, 1
 	cmp	w8, 16
-	bne	.L1170
+	bne	.L1172
 	strh	w0, [x10], 2
 	add	w11, w11, 1
 	cmp	w23, w11
-	bgt	.L1171
+	bgt	.L1173
 	mov	x0, 0
 	mov	w8, 0
-.L1174:
+.L1176:
 	ldr	w10, [x1, x0]
 	add	x0, x0, 4
 	cmp	w10, 0
 	cinc	w8, w8, eq
 	cmp	x0, 32
-	bne	.L1174
+	bne	.L1176
 	cmp	w8, 7
-	ble	.L1175
+	ble	.L1177
 	mov	w3, 1024
 	mov	w2, 1
 	adrp	x0, .LC22
@@ -8562,92 +8598,92 @@ HynixGetReadRetryDefault:
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC21
 	bl	printf
-.L1176:
-	b	.L1176
-.L1148:
+.L1178:
+	b	.L1178
+.L1150:
 	cmp	w26, 7
-	bne	.L1154
+	bne	.L1156
 	mov	w1, 0
-.L1156:
+.L1158:
 	ldrb	w7, [x0]
 	cmp	w7, 12
-	beq	.L1155
+	beq	.L1157
 	ldrb	w7, [x0, 1]
 	cmp	w7, 10
-	beq	.L1155
+	beq	.L1157
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 255
 	cmp	w1, 8
-	bne	.L1156
-.L1157:
+	bne	.L1158
+.L1159:
 	adrp	x0, .LC21
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC21
 	bl	printf
-.L1158:
-	b	.L1158
-.L1155:
+.L1160:
+	b	.L1160
+.L1157:
 	cmp	w1, 6
-	bls	.L1152
-	b	.L1157
-.L1154:
+	bls	.L1154
+	b	.L1159
+.L1156:
 	cmp	w26, 6
-	bne	.L1152
+	bne	.L1154
 	mov	x1, 0
-.L1159:
+.L1161:
 	ldrb	w7, [x0, x1]
 	cmp	w7, 12
-	beq	.L1152
+	beq	.L1154
 	add	x7, x0, x1
 	ldrb	w7, [x7, 8]
 	cmp	w7, 4
-	beq	.L1152
+	beq	.L1154
 	add	x1, x1, 1
 	cmp	x1, 8
-	bne	.L1159
+	bne	.L1161
 	adrp	x0, .LC21
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC21
 	bl	printf
-.L1161:
-	b	.L1161
 .L1163:
+	b	.L1163
+.L1165:
 	ldr	w1, [x19, 2048]
 	strb	w1, [x7, x0]
 	add	x0, x0, 1
-	b	.L1162
-.L1175:
+	b	.L1164
+.L1177:
 	cmp	w26, 6
-	beq	.L1189
+	beq	.L1191
 	cmp	w26, 7
-	beq	.L1190
+	beq	.L1192
 	cmp	w26, 8
 	mov	x1, 8
 	mov	x0, 5
 	csel	x0, x0, x1, eq
-.L1177:
+.L1179:
 	mov	w8, 0
-.L1178:
+.L1180:
 	mov	x1, 0
-.L1179:
+.L1181:
 	ldrb	w10, [x7, x1]
 	strb	w10, [x3, x1]
 	add	x1, x1, 1
 	cmp	w28, w1, uxtb
-	bhi	.L1179
+	bhi	.L1181
 	ldr	x1, [x29, 112]
 	add	w8, w8, 1
 	add	x3, x3, x0
 	cmp	w27, w8
 	add	x7, x7, x1
-	bgt	.L1178
+	bgt	.L1180
 	mov	w0, 255
 	str	w0, [x19, 2056]
 	mov	w0, w22
 	bl	NandcWaitFlashReady
 	cmp	w25, 1
-	bhi	.L1181
+	bhi	.L1183
 	mov	w0, 54
 	str	w0, [x19, 2056]
 	adrp	x0, .LANCHOR20+4
@@ -8659,29 +8695,29 @@ HynixGetReadRetryDefault:
 	str	w0, [x19, 2056]
 	mov	w0, w21
 	bl	FlashReadCmd
-.L1182:
+.L1184:
 	add	w21, w21, 1
 	mov	w0, w22
 	and	w21, w21, 255
 	bl	NandcWaitFlashReady
-	b	.L1137
-.L1189:
+	b	.L1139
+.L1191:
 	mov	x0, 4
-	b	.L1177
-.L1190:
+	b	.L1179
+.L1192:
 	mov	x0, 10
-	b	.L1177
-.L1181:
+	b	.L1179
+.L1183:
 	cmp	w26, 8
-	bne	.L1183
+	bne	.L1185
 	mov	w0, 190
-.L1234:
+.L1236:
 	str	w0, [x19, 2056]
-	b	.L1182
-.L1183:
+	b	.L1184
+.L1185:
 	mov	w0, 56
-	b	.L1234
-.L1140:
+	b	.L1236
+.L1142:
 	mov	w0, 120
 	str	w0, [x19, 2056]
 	str	wzr, [x19, 2052]
@@ -8704,7 +8740,7 @@ HynixGetReadRetryDefault:
 	str	w1, [x19, 2052]
 	str	w0, [x19, 2052]
 	str	wzr, [x19, 2052]
-	b	.L1185
+	b	.L1187
 	.size	HynixGetReadRetryDefault, .-HynixGetReadRetryDefault
 	.section	.text.FlashGetReadRetryDefault,"ax",@progbits
 	.align	2
@@ -8712,14 +8748,14 @@ HynixGetReadRetryDefault:
 	.type	FlashGetReadRetryDefault, %function
 FlashGetReadRetryDefault:
 	mov	w1, w0
-	cbz	w0, .L1235
+	cbz	w0, .L1237
 	sub	w2, w0, #1
 	cmp	w2, 7
-	bhi	.L1237
+	bhi	.L1239
 	b	HynixGetReadRetryDefault
-.L1237:
+.L1239:
 	cmp	w0, 49
-	bne	.L1238
+	bne	.L1240
 	adrp	x2, .LANCHOR20
 	add	x0, x2, :lo12:.LANCHOR20
 	strb	w1, [x2, #:lo12:.LANCHOR20]
@@ -8730,41 +8766,41 @@ FlashGetReadRetryDefault:
 	adrp	x1, .LANCHOR13
 	add	x1, x1, :lo12:.LANCHOR13
 	mov	w2, 64
-.L1247:
+.L1249:
 	add	x0, x0, 4
 	b	ftl_memcpy
-.L1238:
+.L1240:
 	sub	w0, w0, #65
 	cmp	w1, 33
 	ccmp	w0, 1, 0, ne
-	bhi	.L1239
+	bhi	.L1241
 	adrp	x2, .LANCHOR20
 	add	x0, x2, :lo12:.LANCHOR20
 	strb	w1, [x2, #:lo12:.LANCHOR20]
 	mov	w1, 4
-.L1248:
+.L1250:
 	strb	w1, [x0, 1]
 	mov	w1, 7
 	mov	w2, 45
 	strb	w1, [x0, 2]
 	adrp	x1, .LANCHOR9
 	add	x1, x1, :lo12:.LANCHOR9
-	b	.L1247
-.L1239:
+	b	.L1249
+.L1241:
 	cmp	w1, 34
 	mov	w0, 67
 	ccmp	w1, w0, 4, ne
-	bne	.L1240
+	bne	.L1242
 	adrp	x2, .LANCHOR20
 	add	x0, x2, :lo12:.LANCHOR20
 	strb	w1, [x2, #:lo12:.LANCHOR20]
 	mov	w1, 5
-	b	.L1248
-.L1240:
+	b	.L1250
+.L1242:
 	cmp	w1, 35
 	mov	w0, 68
 	ccmp	w1, w0, 4, ne
-	bne	.L1235
+	bne	.L1237
 	adrp	x2, .LANCHOR20
 	add	x0, x2, :lo12:.LANCHOR20
 	strb	w1, [x2, #:lo12:.LANCHOR20]
@@ -8775,8 +8811,8 @@ FlashGetReadRetryDefault:
 	strb	w1, [x0, 2]
 	adrp	x1, .LANCHOR8
 	add	x1, x1, :lo12:.LANCHOR8
-	b	.L1247
-.L1235:
+	b	.L1249
+.L1237:
 	ret
 	.size	FlashGetReadRetryDefault, .-FlashGetReadRetryDefault
 	.section	.text.FlashInit,"ax",@progbits
@@ -8786,26 +8822,27 @@ FlashGetReadRetryDefault:
 FlashInit:
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR30
+	mov	w0, 32768
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR2
+	adrp	x22, .LANCHOR2
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LANCHOR1
+	adrp	x25, .LANCHOR3
 	stp	x27, x28, [sp, 80]
-	adrp	x25, .LANCHOR152
-	stp	x19, x20, [sp, 16]
-	mov	x19, x0
-	mov	w0, 32768
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR147
-	adrp	x21, .LANCHOR22
-	adrp	x26, .LC23
-	mov	w28, 0
+	adrp	x26, .LANCHOR200
+	adrp	x23, .LANCHOR30
+	adrp	x24, .LANCHOR152
 	str	x0, [x1, #:lo12:.LANCHOR147]
 	mov	w0, 32768
 	bl	ftl_malloc
+	adrp	x20, .LC23
 	adrp	x1, .LANCHOR153
+	adrp	x21, .LANCHOR22
+	mov	w28, 0
 	str	x0, [x1, #:lo12:.LANCHOR153]
 	mov	w0, 4096
 	bl	ftl_malloc
@@ -8817,59 +8854,65 @@ FlashInit:
 	str	x0, [x1, #:lo12:.LANCHOR198]
 	mov	w0, 4096
 	bl	ftl_malloc
-	strb	wzr, [x22, #:lo12:.LANCHOR30]
+	strb	wzr, [x23, #:lo12:.LANCHOR30]
 	adrp	x1, .LANCHOR199
-	strb	wzr, [x23, #:lo12:.LANCHOR1]
+	strb	wzr, [x22, #:lo12:.LANCHOR2]
+	strb	wzr, [x26, #:lo12:.LANCHOR200]
 	str	x0, [x1, #:lo12:.LANCHOR199]
 	adrp	x1, .LANCHOR150
 	mov	w0, 50
-	strb	w0, [x24, #:lo12:.LANCHOR2]
+	strb	w0, [x25, #:lo12:.LANCHOR3]
 	strb	w0, [x1, #:lo12:.LANCHOR150]
 	adrp	x0, .LANCHOR149
 	mov	w1, 128
 	str	wzr, [x0, #:lo12:.LANCHOR149]
-	adrp	x0, .LANCHOR3
-	str	w1, [x0, #:lo12:.LANCHOR3]
+	adrp	x0, .LANCHOR4
+	str	w1, [x0, #:lo12:.LANCHOR4]
 	adrp	x0, .LANCHOR144
 	str	wzr, [x0, #:lo12:.LANCHOR144]
 	mov	w0, 60
-	strb	w0, [x25, #:lo12:.LANCHOR152]
+	strb	w0, [x24, #:lo12:.LANCHOR152]
 	mov	x0, x19
-	bl	NandcInit
 	add	x19, x21, :lo12:.LANCHOR22
-	adrp	x10, .LANCHOR6
-	add	x27, x10, :lo12:.LANCHOR6
-	add	x0, x26, :lo12:.LC23
-	stp	x0, x19, [x29, 112]
-.L1254:
-	ldrb	w2, [x27, 8]
-	and	w1, w28, 255
-	mov	w26, w1
-	mov	w0, w1
-	str	w2, [x29, 108]
-	ldr	x20, [x27]
+	bl	NandcInit
+	add	x0, x20, :lo12:.LC23
+	adrp	x10, .LANCHOR0
+	mov	x20, x19
+	add	x27, x10, :lo12:.LANCHOR0
+	stp	x0, x26, [x29, 112]
+.L1256:
+	ldrb	w3, [x27, 8]
+	and	w2, w28, 255
+	ldr	x1, [x27]
+	mov	w26, w2
+	mov	w0, w2
+	str	x1, [x29, 96]
+	str	w3, [x29, 104]
 	bl	FlashReset
 	mov	w0, w26
 	bl	NandcFlashCs
-	ldr	w2, [x29, 108]
+	ldr	w3, [x29, 104]
 	mov	w0, 144
-	ubfiz	x2, x2, 8, 8
-	add	x20, x20, x2
-	str	w0, [x20, 2056]
+	ldr	x1, [x29, 96]
+	ubfiz	x3, x3, 8, 8
+	add	x1, x1, x3
+	str	x1, [x29, 104]
+	str	w0, [x1, 2056]
 	mov	x0, 200
-	str	wzr, [x20, 2052]
+	str	wzr, [x1, 2052]
 	bl	udelay
-	ldr	w0, [x20, 2048]
+	ldr	x1, [x29, 104]
+	ldr	w0, [x1, 2048]
 	strb	w0, [x19]
-	ldr	w0, [x20, 2048]
+	ldr	w0, [x1, 2048]
 	strb	w0, [x19, 1]
-	ldr	w0, [x20, 2048]
+	ldr	w0, [x1, 2048]
 	strb	w0, [x19, 2]
-	ldr	w0, [x20, 2048]
+	ldr	w0, [x1, 2048]
 	strb	w0, [x19, 3]
-	ldr	w0, [x20, 2048]
+	ldr	w0, [x1, 2048]
 	strb	w0, [x19, 4]
-	ldr	w0, [x20, 2048]
+	ldr	w0, [x1, 2048]
 	strb	w0, [x19, 5]
 	mov	w0, w26
 	bl	NandcFlashDeCs
@@ -8877,7 +8920,7 @@ FlashInit:
 	sub	w0, w2, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bhi	.L1250
+	bhi	.L1252
 	ldrb	w7, [x19, 5]
 	add	w1, w28, 1
 	ldrb	w6, [x19, 4]
@@ -8886,153 +8929,151 @@ FlashInit:
 	ldrb	w3, [x19, 1]
 	ldr	x0, [x29, 112]
 	bl	printf
-.L1250:
-	cbnz	w28, .L1251
-	ldr	x0, [x29, 120]
-	ldrb	w0, [x0]
+.L1252:
+	cbnz	w28, .L1253
+	ldrb	w0, [x20]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bhi	.L1295
-	ldr	x0, [x29, 120]
-	ldrb	w0, [x0, 1]
+	bhi	.L1300
+	ldrb	w0, [x20, 1]
 	cmp	w0, 255
-	beq	.L1295
-.L1251:
+	beq	.L1300
+.L1253:
 	ldrb	w0, [x19]
 	cmp	w0, 181
-	bne	.L1253
+	bne	.L1255
 	mov	w0, 44
 	strb	w0, [x19]
-.L1253:
+.L1255:
 	add	w28, w28, 1
 	add	x27, x27, 16
 	add	x19, x19, 8
 	cmp	w28, 4
-	bne	.L1254
+	bne	.L1256
 	ldrb	w0, [x21, #:lo12:.LANCHOR22]
 	cmp	w0, 173
-	beq	.L1255
+	beq	.L1257
 	adrp	x0, .LANCHOR155
 	ldr	w0, [x0, #:lo12:.LANCHOR155]
 	bl	NandcSetDdrMode
-.L1255:
+.L1257:
 	adrp	x20, .LANCHOR18
-	adrp	x28, .LANCHOR5
-	adrp	x26, .LANCHOR119
+	adrp	x28, .LANCHOR6
+	adrp	x27, .LANCHOR119
 	adrp	x19, .LANCHOR20
 	mov	w2, 852
 	mov	w1, 0
 	add	x0, x19, :lo12:.LANCHOR20
 	bl	ftl_memset
-	adrp	x3, .LANCHOR31
-	ldr	w4, [x26, #:lo12:.LANCHOR119]
-	add	x0, x3, :lo12:.LANCHOR31
-	strb	wzr, [x28, #:lo12:.LANCHOR5]
+	adrp	x4, .LANCHOR31
+	ldr	w5, [x27, #:lo12:.LANCHOR119]
+	add	x0, x4, :lo12:.LANCHOR31
+	strb	wzr, [x28, #:lo12:.LANCHOR6]
 	str	x0, [x20, #:lo12:.LANCHOR18]
 	mov	w0, 12336
 	movk	w0, 0x5638, lsl 16
-	cmp	w4, w0
-	bne	.L1256
+	cmp	w5, w0
+	bne	.L1258
 	adrp	x0, .LANCHOR29
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR29]
-.L1256:
+.L1258:
 	add	x0, x21, :lo12:.LANCHOR22
-	ldrb	w1, [x0, 1]
-	add	w0, w1, 95
-	and	w2, w0, 255
+	ldrb	w2, [x0, 1]
+	add	w0, w2, 95
+	and	w1, w0, 255
 	mov	x0, 1
-	cmp	w2, 57
-	bhi	.L1257
+	cmp	w1, 57
+	bhi	.L1259
 	movk	x0, 0x205, lsl 48
-	lsr	x0, x0, x2
+	lsr	x0, x0, x1
 	mvn	x0, x0
-.L1257:
-	cmp	w1, 241
+.L1259:
+	cmp	w2, 241
 	and	w0, w0, 1
-	cset	w2, eq
+	cset	w1, eq
 	eor	w0, w0, 1
-	orr	w0, w2, w0
-	cbnz	w0, .L1258
-	cmp	w1, 220
-	bne	.L1259
+	orr	w0, w1, w0
+	cbnz	w0, .L1260
+	cmp	w2, 220
+	bne	.L1261
 	add	x0, x21, :lo12:.LANCHOR22
 	ldrb	w0, [x0, 3]
 	cmp	w0, 149
-	bne	.L1259
-.L1258:
+	bne	.L1261
+.L1260:
+	adrp	x3, .LANCHOR201
+	add	x6, x3, :lo12:.LANCHOR201
+	mov	w1, 16
+	strb	w1, [x25, #:lo12:.LANCHOR3]
+	strb	w1, [x24, #:lo12:.LANCHOR152]
 	mov	w0, 1
-	adrp	x27, .LANCHOR200
-	add	x2, x27, :lo12:.LANCHOR200
-	strb	w0, [x23, #:lo12:.LANCHOR1]
-	mov	w0, 16
-	strb	w0, [x24, #:lo12:.LANCHOR2]
-	strb	w0, [x25, #:lo12:.LANCHOR152]
-	add	x5, x21, :lo12:.LANCHOR22
-	ldrb	w0, [x21, #:lo12:.LANCHOR22]
-	strb	w0, [x2, 1]
-	strb	w1, [x2, 2]
-	cmp	w0, 152
-	bne	.L1260
-	ldrsb	w0, [x5, 4]
-	tbnz	w0, #31, .L1260
+	ldrb	w1, [x21, #:lo12:.LANCHOR22]
+	add	x7, x21, :lo12:.LANCHOR22
+	strb	w0, [x22, #:lo12:.LANCHOR2]
+	strb	w1, [x6, 1]
+	cmp	w1, 152
+	strb	w2, [x6, 2]
+	bne	.L1263
+	ldrsb	w1, [x7, 4]
+	tbnz	w1, #31, .L1264
 	mov	w0, 24
-	strb	w0, [x25, #:lo12:.LANCHOR152]
-.L1260:
-	cmp	w4, 2049
+	strb	w0, [x24, #:lo12:.LANCHOR152]
+.L1263:
+	cmp	w5, 2049
 	mov	w0, 12336
 	movk	w0, 0x5638, lsl 16
-	ccmp	w4, w0, 4, ne
-	bne	.L1261
+	ccmp	w5, w0, 4, ne
+	bne	.L1266
 	mov	w0, 16
-	strb	w0, [x25, #:lo12:.LANCHOR152]
-.L1261:
-	cmp	w1, 218
-	bne	.L1262
-	add	x0, x27, :lo12:.LANCHOR200
+	strb	w0, [x24, #:lo12:.LANCHOR152]
+.L1266:
+	cmp	w2, 218
+	bne	.L1267
+	add	x0, x3, :lo12:.LANCHOR201
 	mov	w1, 2048
 	strh	w1, [x0, 14]
 	mov	w1, -38
-.L1329:
+.L1334:
 	strb	w1, [x0, 2]
-.L1263:
+.L1268:
 	adrp	x1, .LANCHOR143
 	add	x1, x1, :lo12:.LANCHOR143
 	mov	w2, 32
 	add	x1, x1, 32
-	str	x3, [x29, 120]
+	stp	x3, x4, [x29, 112]
 	adrp	x0, .LANCHOR7
 	add	x0, x0, :lo12:.LANCHOR7
 	bl	ftl_memcpy
-	ldr	x3, [x29, 120]
+	ldp	x3, x4, [x29, 112]
 	mov	w2, 32
-	add	x1, x27, :lo12:.LANCHOR200
-	add	x0, x3, :lo12:.LANCHOR31
+	add	x1, x3, :lo12:.LANCHOR201
+	add	x0, x4, :lo12:.LANCHOR31
 	bl	ftl_memcpy
-.L1259:
-	ldrb	w0, [x23, #:lo12:.LANCHOR1]
-	adrp	x27, .LANCHOR15
-	cbnz	w0, .L1266
+.L1261:
+	ldrb	w0, [x22, #:lo12:.LANCHOR2]
+	adrp	x24, .LANCHOR15
+	cbnz	w0, .L1271
 	bl	FlashLoadPhyInfoInRam
-	cbnz	w0, .L1268
+	cbnz	w0, .L1273
 	ldr	x0, [x20, #:lo12:.LANCHOR18]
-	adrp	x25, .LANCHOR24
+	adrp	x26, .LANCHOR24
 	ldrb	w1, [x0, 17]
 	and	w0, w1, 7
-	strb	w0, [x25, #:lo12:.LANCHOR24]
-	tbnz	x1, 0, .L1268
+	strb	w0, [x26, #:lo12:.LANCHOR24]
+	tbnz	x1, 0, .L1273
 	mov	w1, 1
-	strb	w1, [x22, #:lo12:.LANCHOR30]
+	strb	w1, [x23, #:lo12:.LANCHOR30]
 	bl	FlashSetInterfaceMode
-	ldrb	w0, [x25, #:lo12:.LANCHOR24]
+	ldrb	w0, [x26, #:lo12:.LANCHOR24]
 	bl	NandcSetMode
-.L1268:
+.L1273:
 	ldr	x0, [x20, #:lo12:.LANCHOR18]
 	ldrb	w0, [x0, 26]
-	strb	w0, [x27, #:lo12:.LANCHOR15]
+	strb	w0, [x24, #:lo12:.LANCHOR15]
 	bl	FlashLoadPhyInfo
-	cbz	w0, .L1266
+	cbz	w0, .L1271
 	ldr	x0, [x20, #:lo12:.LANCHOR18]
 	ldrh	w1, [x0, 14]
 	adrp	x0, .LC24
@@ -9040,7 +9081,7 @@ FlashInit:
 	bl	printf
 	bl	FlashLoadPhyInfoInRam
 	cmn	w0, #1
-	beq	.L1249
+	beq	.L1251
 	bl	FlashDieInfoInit
 	ldr	x0, [x20, #:lo12:.LANCHOR18]
 	ldrb	w0, [x0, 19]
@@ -9051,44 +9092,44 @@ FlashInit:
 	ldrb	w2, [x0, 9]
 	add	w1, w1, 4095
 	cmp	w2, w1, lsr 12
-	blt	.L1271
+	blt	.L1276
 	ldrh	w1, [x0, 14]
 	add	w1, w1, 255
 	cmp	w2, w1, lsr 8
-	bge	.L1272
-.L1271:
+	bge	.L1277
+.L1276:
 	ldrh	w1, [x0, 14]
 	and	w1, w1, -256
 	strh	w1, [x0, 14]
-.L1272:
+.L1277:
 	adrp	x0, .LANCHOR24
 	ldrb	w0, [x0, #:lo12:.LANCHOR24]
 	tst	w0, 6
-	beq	.L1273
+	beq	.L1278
 	bl	FlashSavePhyInfo
 	adrp	x0, .LANCHOR148
 	ldr	w1, [x0, #:lo12:.LANCHOR148]
 	mov	w0, 0
 	bl	FlashDdrParaScan
-.L1273:
+.L1278:
 	bl	FlashSavePhyInfo
-.L1266:
+.L1271:
 	ldr	x2, [x20, #:lo12:.LANCHOR18]
-	adrp	x25, .LANCHOR24
+	adrp	x26, .LANCHOR24
 	ldrb	w0, [x2, 26]
-	strb	w0, [x27, #:lo12:.LANCHOR15]
+	strb	w0, [x24, #:lo12:.LANCHOR15]
 	ldrh	w0, [x2, 16]
 	ubfx	x1, x0, 7, 1
-	strb	w1, [x28, #:lo12:.LANCHOR5]
-	adrp	x1, .LANCHOR201
+	strb	w1, [x28, #:lo12:.LANCHOR6]
+	adrp	x1, .LANCHOR202
 	ubfx	x3, x0, 3, 1
 	adrp	x28, .LANCHOR145
-	strb	w3, [x1, #:lo12:.LANCHOR201]
+	strb	w3, [x1, #:lo12:.LANCHOR202]
 	adrp	x1, .LANCHOR27
 	ubfx	x3, x0, 4, 1
 	ubfx	x0, x0, 8, 3
 	strb	w3, [x1, #:lo12:.LANCHOR27]
-	strb	w0, [x25, #:lo12:.LANCHOR24]
+	strb	w0, [x26, #:lo12:.LANCHOR24]
 	ldrh	w1, [x2, 10]
 	ldrb	w0, [x2, 12]
 	str	xzr, [x28, #:lo12:.LANCHOR145]
@@ -9098,7 +9139,7 @@ FlashInit:
 	bl	FlashDieInfoInit
 	ldr	x0, [x20, #:lo12:.LANCHOR18]
 	ldrh	w1, [x0, 16]
-	tbz	x1, 6, .L1275
+	tbz	x1, 6, .L1280
 	add	x3, x19, :lo12:.LANCHOR20
 	adrp	x1, .LANCHOR10
 	ldrb	w0, [x0, 19]
@@ -9113,7 +9154,7 @@ FlashInit:
 	sub	w3, w0, #1
 	and	w3, w3, 255
 	cmp	w3, 7
-	bhi	.L1276
+	bhi	.L1281
 	adrp	x1, HynixReadRetrial
 	add	x1, x1, :lo12:HynixReadRetrial
 	str	x1, [x28, #:lo12:.LANCHOR145]
@@ -9121,61 +9162,61 @@ FlashInit:
 	and	w1, w1, 255
 	cmp	w1, 1
 	ccmp	w0, 8, 4, hi
-	bne	.L1277
+	bne	.L1282
 	adrp	x1, .LANCHOR36
 	mov	w2, 1
 	str	w2, [x1, #:lo12:.LANCHOR36]
-.L1277:
+.L1282:
 	add	x19, x19, :lo12:.LANCHOR20
 	cmp	w0, 7
-	beq	.L1330
+	beq	.L1335
 	cmp	w0, 8
-	bne	.L1298
-.L1330:
+	bne	.L1303
+.L1335:
 	add	x19, x19, 28
-.L1278:
+.L1283:
 	mov	x1, 0
 	mov	w2, 0
-.L1280:
+.L1285:
 	ldrsb	w3, [x19, x1]
 	add	x1, x1, 1
 	cmp	w3, 0
 	cinc	w2, w2, eq
 	cmp	x1, 32
-	bne	.L1280
+	bne	.L1285
 	cmp	w2, 27
-	bls	.L1275
+	bls	.L1280
 	bl	FlashGetReadRetryDefault
 	bl	FlashSavePhyInfo
-.L1275:
-	ldr	w1, [x26, #:lo12:.LANCHOR119]
+.L1280:
+	ldr	w1, [x27, #:lo12:.LANCHOR119]
 	mov	w0, 12336
 	movk	w0, 0x5638, lsl 16
 	cmp	w1, w0
-	bne	.L1289
-	ldrb	w0, [x27, #:lo12:.LANCHOR15]
-	cbz	w0, .L1289
+	bne	.L1294
+	ldrb	w0, [x24, #:lo12:.LANCHOR15]
+	cbz	w0, .L1294
 	ldr	x0, [x20, #:lo12:.LANCHOR18]
 	strb	wzr, [x0, 18]
-.L1289:
+.L1294:
 	ldrb	w0, [x21, #:lo12:.LANCHOR22]
 	cmp	w0, 44
-	bne	.L1290
-	ldrb	w0, [x22, #:lo12:.LANCHOR30]
-	cbz	w0, .L1290
-	strb	wzr, [x22, #:lo12:.LANCHOR30]
+	bne	.L1295
+	ldrb	w0, [x23, #:lo12:.LANCHOR30]
+	cbz	w0, .L1295
+	strb	wzr, [x23, #:lo12:.LANCHOR30]
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
 	bl	NandcSetMode
-.L1290:
-	ldrb	w0, [x25, #:lo12:.LANCHOR24]
+.L1295:
+	ldrb	w0, [x26, #:lo12:.LANCHOR24]
 	tst	w0, 6
-	beq	.L1291
-	ldrb	w1, [x22, #:lo12:.LANCHOR30]
-	cbnz	w1, .L1292
-	tbnz	x0, 0, .L1291
-.L1292:
+	beq	.L1296
+	ldrb	w1, [x23, #:lo12:.LANCHOR30]
+	cbnz	w1, .L1297
+	tbnz	x0, 0, .L1296
+.L1297:
 	mov	w0, 0
 	bl	flash_enter_slc_mode
 	adrp	x0, .LANCHOR148
@@ -9184,7 +9225,7 @@ FlashInit:
 	bl	FlashDdrParaScan
 	mov	w0, 0
 	bl	flash_exit_slc_mode
-.L1291:
+.L1296:
 	ldr	x0, [x20, #:lo12:.LANCHOR18]
 	ldrb	w0, [x0, 20]
 	bl	FlashBchSel
@@ -9194,7 +9235,7 @@ FlashInit:
 	ldr	x2, [x20, #:lo12:.LANCHOR18]
 	mov	w0, 16
 	adrp	x1, .LANCHOR14
-	strb	w0, [x24, #:lo12:.LANCHOR2]
+	strb	w0, [x25, #:lo12:.LANCHOR3]
 	add	x0, x1, :lo12:.LANCHOR14
 	ldrb	w3, [x2, 12]
 	strh	w3, [x0, 8]
@@ -9223,9 +9264,9 @@ FlashInit:
 	and	w1, w1, 65535
 	strh	w5, [x0, 26]
 	strh	w1, [x0, 22]
-	ldrb	w5, [x23, #:lo12:.LANCHOR1]
+	ldrb	w5, [x22, #:lo12:.LANCHOR2]
 	cmp	w5, 1
-	bne	.L1293
+	bne	.L1298
 	ubfiz	w1, w1, 1, 15
 	lsr	w4, w4, 1
 	ubfiz	w3, w3, 1, 15
@@ -9234,11 +9275,11 @@ FlashInit:
 	mov	w1, 8
 	strh	w3, [x0, 20]
 	strh	w1, [x0, 26]
-.L1293:
+.L1298:
 	ldrb	w0, [x2, 20]
 	bl	FlashBchSel
 	mov	w0, 0
-.L1249:
+.L1251:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9246,175 +9287,208 @@ FlashInit:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1262:
-	cmp	w1, 220
-	bne	.L1264
-	add	x0, x27, :lo12:.LANCHOR200
+.L1267:
+	cmp	w2, 220
+	bne	.L1269
+	add	x0, x3, :lo12:.LANCHOR201
 	mov	w1, 4096
 	strh	w1, [x0, 14]
 	mov	w1, -36
-	b	.L1329
-.L1264:
-	cmp	w1, 211
-	bne	.L1263
-	add	x0, x27, :lo12:.LANCHOR200
+	b	.L1334
+.L1269:
+	cmp	w2, 211
+	bne	.L1268
+	add	x0, x3, :lo12:.LANCHOR201
 	mov	w1, 4096
 	strh	w1, [x0, 14]
 	mov	w1, 2
 	strb	w1, [x0, 13]
-	b	.L1263
-.L1298:
+	b	.L1268
+.L1303:
 	add	x19, x19, 20
-	b	.L1278
-.L1276:
+	b	.L1283
+.L1281:
 	sub	w3, w0, #17
 	and	w3, w3, 255
 	cmp	w3, 2
-	bhi	.L1282
+	bhi	.L1287
 	adrp	x2, MicronReadRetrial
 	add	x2, x2, :lo12:MicronReadRetrial
 	str	x2, [x28, #:lo12:.LANCHOR145]
 	cmp	w0, 19
-	beq	.L1283
-.L1334:
+	beq	.L1288
+.L1339:
 	mov	w0, 7
-	b	.L1332
-.L1283:
+	b	.L1337
+.L1288:
 	mov	w0, 15
-.L1332:
+.L1337:
 	strb	w0, [x1, #:lo12:.LANCHOR151]
-	b	.L1275
-.L1282:
+	b	.L1280
+.L1287:
 	sub	w3, w0, #65
 	cmp	w0, 33
 	and	w3, w3, 255
 	ccmp	w3, 1, 0, ne
-	bhi	.L1284
+	bhi	.L1289
 	adrp	x0, ToshibaReadRetrial
 	add	x0, x0, :lo12:ToshibaReadRetrial
 	str	x0, [x28, #:lo12:.LANCHOR145]
 	mov	w0, 4
 	strb	w0, [x2, #:lo12:.LANCHOR12]
-	b	.L1334
-.L1284:
+	b	.L1339
+.L1289:
 	sub	w3, w0, #34
 	sub	w2, w0, #67
 	and	w3, w3, 255
 	and	w2, w2, 255
 	cmp	w3, 1
 	ccmp	w2, 1, 0, hi
-	bhi	.L1285
+	bhi	.L1290
 	adrp	x3, ToshibaReadRetrial
 	add	x3, x3, :lo12:ToshibaReadRetrial
 	str	x3, [x28, #:lo12:.LANCHOR145]
 	cmp	w0, 35
 	mov	w3, 68
 	ccmp	w0, w3, 4, ne
-	beq	.L1286
+	beq	.L1291
 	mov	w0, 7
-.L1331:
+.L1336:
 	strb	w0, [x1, #:lo12:.LANCHOR151]
 	cmp	w2, 1
-	bhi	.L1288
+	bhi	.L1293
 	mov	w0, 4
-.L1333:
+.L1338:
 	strb	w0, [x4, #:lo12:.LANCHOR12]
-	b	.L1275
-.L1286:
+	b	.L1280
+.L1291:
 	mov	w0, 17
-	b	.L1331
-.L1288:
+	b	.L1336
+.L1293:
 	mov	w0, 5
-	b	.L1333
-.L1285:
+	b	.L1338
+.L1290:
 	cmp	w0, 49
-	bne	.L1275
+	bne	.L1280
 	adrp	x0, SamsungReadRetrial
 	add	x0, x0, :lo12:SamsungReadRetrial
 	str	x0, [x28, #:lo12:.LANCHOR145]
-	b	.L1275
-.L1295:
+	b	.L1280
+.L1300:
 	mov	w0, -2
-	b	.L1249
+	b	.L1251
+.L1264:
+	ldr	x1, [x29, 120]
+	strb	w0, [x1, #:lo12:.LANCHOR200]
+	b	.L1263
 	.size	FlashInit, .-FlashInit
 	.section	.text.FlashReadSlc2KPages,"ax",@progbits
 	.align	2
 	.global	FlashReadSlc2KPages
 	.type	FlashReadSlc2KPages, %function
 FlashReadSlc2KPages:
-	stp	x29, x30, [sp, -112]!
+	stp	x29, x30, [sp, -144]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	mov	w22, 56
 	stp	x25, x26, [sp, 64]
-	mov	w25, w2
+	and	w21, w1, 255
+	str	w2, [x29, 116]
 	adrp	x2, .LANCHOR31+9
-	stp	x23, x24, [sp, 48]
-	nop // between mem op and mult-accumulate
-	umaddl	x22, w1, w22, x0
 	stp	x19, x20, [sp, 16]
-	ldrb	w24, [x2, #:lo12:.LANCHOR31+9]
-	adrp	x23, .LANCHOR25
 	mov	x19, x0
-	and	w21, w1, 255
-	add	x23, x23, :lo12:.LANCHOR25
-	adrp	x26, .LANCHOR26
-	str	x27, [sp, 80]
-.L1336:
-	cmp	x22, x19
-	bne	.L1348
+	ldrb	w25, [x2, #:lo12:.LANCHOR31+9]
+	nop // between mem op and mult-accumulate
+	umaddl	x0, w1, w22, x0
+	adrp	x26, .LANCHOR200
+	str	x0, [x29, 120]
+	stp	x23, x24, [sp, 48]
+	add	x0, x26, :lo12:.LANCHOR200
+	stp	x27, x28, [sp, 80]
+	str	x0, [x29, 104]
+.L1341:
+	ldr	x0, [x29, 120]
+	cmp	x19, x0
+	bne	.L1361
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldr	x27, [sp, 80]
-	ldp	x29, x30, [sp], 112
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 144
 	ret
-.L1348:
-	mov	w1, w25
+.L1361:
+	ldr	w1, [x29, 116]
 	mov	w4, w21
-	add	x3, x29, 104
-	add	x2, x29, 108
+	add	x3, x29, 136
+	add	x2, x29, 140
 	mov	x0, x19
 	bl	LogAddr2PhyAddr
-	ldrb	w1, [x23]
-	ldr	w0, [x29, 104]
-	cmp	w1, w0
-	bhi	.L1337
+	adrp	x0, .LANCHOR25
+	ldr	w1, [x29, 136]
+	ldrb	w0, [x0, #:lo12:.LANCHOR25]
+	cmp	w0, w1
+	bhi	.L1342
 	mov	w0, -1
 	str	w0, [x19]
-.L1338:
+.L1343:
 	sub	w21, w21, #1
 	add	x19, x19, 56
 	and	w21, w21, 255
-	b	.L1336
-.L1337:
-	add	x1, x26, :lo12:.LANCHOR26
-	ldrb	w27, [x1, w0, uxtw]
-	mov	w0, w27
+	b	.L1341
+.L1342:
+	adrp	x0, .LANCHOR26
+	add	x0, x0, :lo12:.LANCHOR26
+	add	x23, x26, :lo12:.LANCHOR200
+	mov	w22, 0
+	mov	w24, 256
+	ldrb	w20, [x0, w1, uxtw]
+	mov	w0, w20
 	bl	NandcWaitFlashReady
-	mov	w0, w27
+	mov	w0, w20
 	bl	NandcFlashCs
-	ldr	w1, [x29, 108]
-	mov	w0, w27
+.L1344:
+	ldr	w1, [x29, 140]
+	mov	w0, w20
 	bl	FlashReadCmd
-	mov	w0, w27
+	mov	w0, w20
 	bl	NandcWaitFlashReady
 	ldp	x3, x4, [x19, 8]
-	mov	w2, w24
+	mov	w2, w25
 	mov	w1, 0
-	mov	w0, w27
+	mov	w0, w20
 	bl	NandcXferData
-	mov	w20, w0
-	adrp	x0, .LANCHOR3
-	ldr	w1, [x29, 108]
-	ldr	w0, [x0, #:lo12:.LANCHOR3]
+	mov	w28, w0
+	ldrb	w0, [x23]
+	cbz	w0, .L1345
+	mov	w0, w20
+	bl	flash_read_ecc
+	cmp	w0, 5
+	csel	w28, w28, w24, ls
+.L1345:
+	cmp	w22, 9
+	ccmn	w28, #1, 0, ls
+	bne	.L1346
+	add	w22, w22, 1
+	b	.L1344
+.L1346:
+	cmp	w22, 0
+	mov	w23, 256
+	adrp	x24, .LANCHOR4
+	csel	w28, w28, w23, eq
+	add	x24, x24, :lo12:.LANCHOR4
+	mov	w22, 0
+.L1348:
+	ldr	w0, [x24]
+	ldr	w1, [x29, 140]
 	add	w1, w1, w0
-	mov	w0, w27
+	mov	w0, w20
 	bl	FlashReadCmd
+	mov	w0, w20
+	bl	NandcWaitFlashReady
 	ldr	x0, [x19, 8]
-	mov	w2, w24
+	mov	w2, w25
 	mov	w1, 0
 	cmp	x0, 0
 	add	x3, x0, 2048
@@ -9423,62 +9497,78 @@ FlashReadSlc2KPages:
 	cmp	x0, 0
 	add	x4, x0, 8
 	csel	x4, x4, xzr, ne
-	mov	w0, w27
+	mov	w0, w20
 	bl	NandcXferData
-	mov	w2, w0
-	mov	w0, w27
+	mov	w27, w0
+	ldr	x0, [x29, 104]
+	ldrb	w0, [x0]
+	cbz	w0, .L1351
+	mov	w0, w20
+	bl	flash_read_ecc
+	cmp	w0, 5
+	csel	w27, w27, w23, ls
+.L1351:
+	cmp	w22, 9
+	ccmn	w27, #1, 0, ls
+	bne	.L1352
+	add	w22, w22, 1
+	b	.L1348
+.L1352:
+	cmp	w22, 0
+	mov	w3, 256
+	mov	w0, w20
+	csel	w27, w27, w3, eq
 	bl	NandcFlashDeCs
-	cmp	w20, w2
-	adrp	x1, .LANCHOR33
-	csel	w0, w20, w2, cs
-	ldrb	w2, [x1, #:lo12:.LANCHOR33]
-	add	w1, w2, w2, lsl 1
-	cmp	w0, w1, lsr 2
-	bls	.L1341
-	cmn	w0, #1
-	mov	w1, 256
-	csel	w0, w0, w1, eq
-.L1341:
-	cmp	w0, 256
-	ccmn	w0, #1, 4, ne
-	csel	w0, w0, wzr, eq
-	str	w0, [x19]
+	adrp	x0, .LANCHOR33
+	cmp	w28, w27
+	csel	w5, w28, w27, cs
+	ldrb	w2, [x0, #:lo12:.LANCHOR33]
+	add	w0, w2, w2, lsl 1
+	cmp	w5, w0, lsr 2
+	bls	.L1354
+	cmn	w5, #1
+	csel	w5, w5, w3, eq
+.L1354:
+	cmp	w5, 256
 	ldr	x0, [x19, 16]
-	cbz	x0, .L1344
+	ccmn	w5, #1, 4, ne
+	csel	w5, w5, wzr, eq
+	str	w5, [x19]
+	cbz	x0, .L1357
 	ldr	w1, [x0, 12]
 	cmn	w1, #1
-	bne	.L1344
+	bne	.L1357
 	ldr	w1, [x0, 8]
 	cmn	w1, #1
-	bne	.L1344
+	bne	.L1357
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L1344
+	beq	.L1357
 	str	w1, [x19]
-.L1344:
+.L1357:
 	ldr	w3, [x19]
 	cmn	w3, #1
-	bne	.L1338
+	bne	.L1343
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC25
 	add	x0, x0, :lo12:.LC25
 	bl	printf
 	ldr	x1, [x19, 8]
-	cbz	x1, .L1346
+	cbz	x1, .L1359
 	adrp	x0, .LC26
 	mov	w3, 8
 	mov	w2, 4
 	add	x0, x0, :lo12:.LC26
 	bl	rknand_print_hex
-.L1346:
+.L1359:
 	ldr	x1, [x19, 16]
-	cbz	x1, .L1338
+	cbz	x1, .L1343
 	mov	w3, 4
 	adrp	x0, .LC27
 	mov	w2, w3
 	add	x0, x0, :lo12:.LC27
 	bl	rknand_print_hex
-	b	.L1338
+	b	.L1343
 	.size	FlashReadSlc2KPages, .-FlashReadSlc2KPages
 	.section	.text.FlashReadPages,"ax",@progbits
 	.align	2
@@ -9486,16 +9576,16 @@ FlashReadSlc2KPages:
 	.type	FlashReadPages, %function
 FlashReadPages:
 	stp	x29, x30, [sp, -176]!
-	adrp	x3, .LANCHOR1
+	adrp	x3, .LANCHOR2
 	add	x29, sp, 0
-	ldrb	w3, [x3, #:lo12:.LANCHOR1]
+	ldrb	w3, [x3, #:lo12:.LANCHOR2]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	stp	w2, w1, [x29, 148]
-	cbnz	w3, .L1367
+	cbnz	w3, .L1390
 	mov	x25, x0
 	adrp	x0, .LANCHOR31+9
 	adrp	x27, .LANCHOR20
@@ -9503,23 +9593,23 @@ FlashReadPages:
 	ldrb	w0, [x0, #:lo12:.LANCHOR31+9]
 	mov	w22, 0
 	str	w0, [x29, 156]
-	adrp	x0, .LANCHOR5
+	adrp	x0, .LANCHOR6
 	str	x0, [x29, 128]
-	ldrb	w1, [x0, #:lo12:.LANCHOR5]
+	ldrb	w1, [x0, #:lo12:.LANCHOR6]
 	add	x0, x27, :lo12:.LANCHOR20
 	str	w1, [x29, 144]
 	str	x0, [x29, 104]
 	add	x0, x0, 4
 	str	x0, [x29, 96]
-.L1368:
+.L1391:
 	ldr	w0, [x29, 152]
 	cmp	w22, w0
-	bcc	.L1402
+	bcc	.L1425
 	mov	w0, 0
-	b	.L1366
-.L1367:
+	b	.L1389
+.L1390:
 	bl	FlashReadSlc2KPages
-.L1366:
+.L1389:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9527,7 +9617,7 @@ FlashReadPages:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1402:
+.L1425:
 	mov	w26, 56
 	add	x3, x29, 168
 	ldp	w1, w0, [x29, 148]
@@ -9543,18 +9633,18 @@ FlashReadPages:
 	ldr	w1, [x29, 168]
 	ldrb	w0, [x0, #:lo12:.LANCHOR25]
 	cmp	w0, w1
-	bhi	.L1370
+	bhi	.L1393
 	mov	w0, -1
 	str	w0, [x25, x26]
-.L1371:
+.L1394:
 	add	w22, w22, 1
-	b	.L1368
-.L1370:
+	b	.L1391
+.L1393:
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w19, [x0, w1, uxtw]
-	adrp	x0, .LANCHOR201
-	ldrb	w0, [x0, #:lo12:.LANCHOR201]
+	adrp	x0, .LANCHOR202
+	ldrb	w0, [x0, #:lo12:.LANCHOR202]
 	cmp	w0, 0
 	mov	w0, w19
 	csel	w20, w20, wzr, ne
@@ -9566,7 +9656,7 @@ FlashReadPages:
 	sub	w0, w1, #1
 	and	w0, w0, 255
 	cmp	w0, 7
-	bhi	.L1373
+	bhi	.L1396
 	add	x0, x27, :lo12:.LANCHOR20
 	sxtw	x2, w19
 	add	x0, x0, x2
@@ -9574,59 +9664,59 @@ FlashReadPages:
 	and	w1, w1, 255
 	cmp	w1, 1
 	ldrb	w3, [x0, 12]
-	bhi	.L1374
+	bhi	.L1397
 	ldrb	w3, [x0, 20]
-.L1374:
+.L1397:
 	adrp	x0, .LANCHOR21
 	add	x0, x0, :lo12:.LANCHOR21
 	ldrb	w0, [x0, x2]
 	cmp	w0, w3
-	beq	.L1373
+	beq	.L1396
 	ldp	x2, x0, [x29, 96]
 	ldrb	w1, [x0, 1]
 	mov	w0, w19
 	bl	HynixSetRRPara
-.L1373:
+.L1396:
 	mov	w0, w19
 	bl	NandcFlashCs
 	ldr	w0, [x29, 148]
 	cmp	w0, 1
 	cset	w0, eq
 	orr	w24, w0, w24, lsr 31
-	cbz	w24, .L1375
+	cbz	w24, .L1398
 	adrp	x0, .LANCHOR15
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L1375
+	cbz	w0, .L1398
 	mov	w0, w19
 	bl	flash_enter_slc_mode
-.L1376:
-	adrp	x0, .LANCHOR3
-	add	x0, x0, :lo12:.LANCHOR3
+.L1399:
+	adrp	x0, .LANCHOR4
+	add	x0, x0, :lo12:.LANCHOR4
 	str	x0, [x29, 112]
 	ldr	x0, [x29, 128]
-	add	x0, x0, :lo12:.LANCHOR5
+	add	x0, x0, :lo12:.LANCHOR6
 	str	x0, [x29, 136]
-.L1382:
+.L1405:
 	ldr	w1, [x29, 172]
 	cmn	w1, #1
-	bne	.L1377
+	bne	.L1400
 	cmp	w19, 255
-	beq	.L1404
-.L1377:
-	cbz	w20, .L1379
+	beq	.L1427
+.L1400:
+	cbz	w20, .L1402
 	ldr	x0, [x29, 112]
 	ldr	w2, [x0]
 	mov	w0, w19
 	add	w2, w1, w2
 	bl	FlashReadDpCmd
-.L1380:
+.L1403:
 	mov	w0, w19
 	bl	NandcWaitFlashReady
-	cbz	w20, .L1378
+	cbz	w20, .L1401
 	ldr	w1, [x29, 172]
 	mov	w0, w19
 	bl	FlashReadDpDataOutCmd
-.L1378:
+.L1401:
 	ldrb	w2, [x29, 156]
 	mov	w1, 0
 	ldp	x3, x4, [x21, 8]
@@ -9635,29 +9725,29 @@ FlashReadPages:
 	mov	w28, w0
 	ldr	x0, [x29, 136]
 	ldrb	w0, [x0]
-	cbz	w0, .L1381
+	cbz	w0, .L1404
 	cmn	w28, #1
-	bne	.L1381
+	bne	.L1404
 	ldr	x0, [x29, 136]
 	mov	w20, 0
 	strb	wzr, [x0]
-	b	.L1382
-.L1375:
+	b	.L1405
+.L1398:
 	mov	w0, w19
 	bl	flash_exit_slc_mode
-	b	.L1376
-.L1379:
+	b	.L1399
+.L1402:
 	mov	w0, w19
 	bl	FlashReadCmd
-	b	.L1380
-.L1404:
+	b	.L1403
+.L1427:
 	mov	w20, 0
-	b	.L1378
-.L1381:
-	cbz	w20, .L1383
-	adrp	x0, .LANCHOR3
+	b	.L1401
+.L1404:
+	cbz	w20, .L1406
+	adrp	x0, .LANCHOR4
 	ldr	w1, [x29, 172]
-	ldr	w0, [x0, #:lo12:.LANCHOR3]
+	ldr	w0, [x0, #:lo12:.LANCHOR4]
 	add	w1, w1, w0
 	mov	w0, w19
 	bl	FlashReadDpDataOutCmd
@@ -9673,27 +9763,27 @@ FlashReadPages:
 	cmn	w0, #1
 	mov	w23, w0
 	csel	w20, w20, wzr, ne
-.L1383:
+.L1406:
 	mov	w0, w19
 	bl	NandcFlashDeCs
 	ldr	x0, [x29, 128]
 	cmn	w28, #1
 	ldrb	w1, [x29, 144]
-	strb	w1, [x0, #:lo12:.LANCHOR5]
-	bne	.L1384
+	strb	w1, [x0, #:lo12:.LANCHOR6]
+	bne	.L1407
 	adrp	x0, .LANCHOR30
 	ldrb	w0, [x0, #:lo12:.LANCHOR30]
-	cbnz	w0, .L1385
-.L1389:
+	cbnz	w0, .L1408
+.L1412:
 	adrp	x20, .LANCHOR145
 	ldr	x4, [x20, #:lo12:.LANCHOR145]
-	cbnz	x4, .L1386
+	cbnz	x4, .L1409
 	ldr	w1, [x29, 172]
 	mov	w0, w19
 	ldp	x2, x3, [x21, 8]
 	bl	FlashReadRawPage
-	b	.L1441
-.L1385:
+	b	.L1464
+.L1408:
 	adrp	x0, .LANCHOR19
 	ldr	w1, [x29, 172]
 	ldp	x2, x3, [x21, 8]
@@ -9704,36 +9794,36 @@ FlashReadPages:
 	bl	FlashDdrTunningRead
 	mov	w28, w0
 	cmn	w0, #1
-	beq	.L1388
+	beq	.L1411
 	adrp	x0, .LANCHOR33
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	cmp	w28, w0, lsr 1
-	bls	.L1405
-.L1388:
+	bls	.L1428
+.L1411:
 	lsr	w0, w20, 8
 	bl	NandcSetDdrPara
 	cmn	w28, #1
-	beq	.L1389
-.L1405:
+	beq	.L1412
+.L1428:
 	mov	w20, 0
-.L1384:
+.L1407:
 	adrp	x0, .LANCHOR33
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bls	.L1390
+	bls	.L1413
 	adrp	x0, .LANCHOR145
 	ldr	x0, [x0, #:lo12:.LANCHOR145]
 	cmp	x0, 0
 	mov	w0, 256
 	csel	w28, w28, w0, ne
-.L1390:
+.L1413:
 	cmp	w28, 256
 	ccmn	w28, #1, 4, ne
 	csel	w3, w28, wzr, eq
 	str	w3, [x25, x26]
 	cmn	w3, #1
-	bne	.L1397
+	bne	.L1420
 	adrp	x0, .LANCHOR33
 	ldr	w1, [x21, 4]
 	ldrb	w2, [x0, #:lo12:.LANCHOR33]
@@ -9741,25 +9831,25 @@ FlashReadPages:
 	add	x0, x0, :lo12:.LC25
 	bl	printf
 	ldr	x1, [x21, 16]
-	cbz	x1, .L1397
+	cbz	x1, .L1420
 	mov	w3, 4
 	adrp	x0, .LC27
 	mov	w2, w3
 	add	x0, x0, :lo12:.LC27
 	bl	rknand_print_hex
-.L1397:
-	cbz	w20, .L1399
+.L1420:
+	cbz	w20, .L1422
 	adrp	x0, .LANCHOR33
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w23, w0, lsr 2
-	bls	.L1400
+	bls	.L1423
 	adrp	x0, .LANCHOR145
 	ldr	x0, [x0, #:lo12:.LANCHOR145]
 	cmp	x0, 0
 	mov	w0, 256
 	csel	w23, w23, w0, ne
-.L1400:
+.L1423:
 	add	w0, w22, 1
 	mov	w1, 56
 	cmp	w23, 256
@@ -9767,37 +9857,37 @@ FlashReadPages:
 	umull	x0, w0, w1
 	csel	w1, w23, wzr, eq
 	str	w1, [x25, x0]
-.L1399:
+.L1422:
 	add	w22, w22, w20
-	cbz	w24, .L1371
+	cbz	w24, .L1394
 	adrp	x0, .LANCHOR15
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L1371
+	cbz	w0, .L1394
 	mov	w0, w19
 	bl	flash_exit_slc_mode
-	b	.L1371
-.L1386:
+	b	.L1394
+.L1409:
 	ldr	w1, [x29, 172]
 	mov	w0, w19
 	ldp	x2, x3, [x21, 8]
 	blr	x4
 	mov	w28, w0
 	cmn	w0, #1
-	bne	.L1408
+	bne	.L1431
 	ldr	x0, [x29, 120]
 	ldr	x0, [x0, #:lo12:.LANCHOR18]
 	ldrb	w0, [x0, 19]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 7
-	bhi	.L1391
+	bhi	.L1414
 	add	x0, x27, :lo12:.LANCHOR20
 	mov	w3, 0
 	add	x2, x0, 4
 	ldrb	w1, [x0, 1]
 	mov	w0, w19
 	bl	HynixSetRRPara
-.L1391:
+.L1414:
 	ldp	x2, x3, [x21, 8]
 	mov	w0, w19
 	ldr	w1, [x29, 172]
@@ -9811,27 +9901,27 @@ FlashReadPages:
 	add	x0, x0, :lo12:.LC28
 	bl	printf
 	cmn	w28, #1
-	bne	.L1408
+	bne	.L1431
 	adrp	x0, .LANCHOR15
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L1408
+	cbz	w0, .L1431
 	mov	w0, w19
-	cbz	w24, .L1392
+	cbz	w24, .L1415
 	bl	flash_enter_slc_mode
-.L1393:
+.L1416:
 	ldr	x4, [x20, #:lo12:.LANCHOR145]
 	mov	w0, w19
 	ldr	w1, [x29, 172]
 	ldp	x2, x3, [x21, 8]
 	blr	x4
-.L1441:
+.L1464:
 	mov	w28, w0
-.L1408:
+.L1431:
 	mov	w20, 0
-	b	.L1390
-.L1392:
+	b	.L1413
+.L1415:
 	bl	flash_exit_slc_mode
-	b	.L1393
+	b	.L1416
 	.size	FlashReadPages, .-FlashReadPages
 	.section	.text.FlashProgSlc2KPages,"ax",@progbits
 	.align	2
@@ -9850,20 +9940,20 @@ FlashProgSlc2KPages:
 	nop // between mem op and mult-accumulate
 	umaddl	x23, w1, w23, x0
 	ldrb	w25, [x2, #:lo12:.LANCHOR31+9]
-	adrp	x26, .LANCHOR3
+	adrp	x26, .LANCHOR4
 	stp	x27, x28, [sp, 80]
 	mov	w22, w21
 	stp	x19, x20, [sp, 16]
 	mov	x27, x0
 	mov	x20, x0
-	add	x28, x26, :lo12:.LANCHOR3
+	add	x28, x26, :lo12:.LANCHOR4
 	str	w3, [x29, 108]
-.L1443:
+.L1466:
 	cmp	x20, x23
-	bne	.L1449
+	bne	.L1472
 	ldr	w0, [x29, 108]
-	cbnz	w0, .L1450
-.L1469:
+	cbnz	w0, .L1473
+.L1492:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -9872,7 +9962,7 @@ FlashProgSlc2KPages:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1449:
+.L1472:
 	mov	w1, w24
 	mov	w4, w22
 	add	x3, x29, 116
@@ -9883,15 +9973,15 @@ FlashProgSlc2KPages:
 	ldr	w1, [x29, 116]
 	ldrb	w0, [x0, #:lo12:.LANCHOR25]
 	cmp	w0, w1
-	bhi	.L1444
+	bhi	.L1467
 	mov	w0, -1
 	str	w0, [x20]
-.L1445:
+.L1468:
 	sub	w22, w22, #1
 	add	x20, x20, 56
 	and	w22, w22, 255
-	b	.L1443
-.L1444:
+	b	.L1466
+.L1467:
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w19, [x0, w1, uxtw]
@@ -9918,7 +10008,7 @@ FlashProgSlc2KPages:
 	sbfx	x0, x0, 0, 1
 	str	w0, [x20]
 	ldr	w1, [x29, 112]
-	ldr	w0, [x26, #:lo12:.LANCHOR3]
+	ldr	w0, [x26, #:lo12:.LANCHOR4]
 	add	w1, w1, w0
 	mov	w0, w19
 	bl	FlashProgFirstCmd
@@ -9944,30 +10034,30 @@ FlashProgSlc2KPages:
 	ldr	w1, [x29, 112]
 	mov	w0, w19
 	bl	FlashReadStatus
-	tbz	x0, 0, .L1448
+	tbz	x0, 0, .L1471
 	mov	w0, -1
 	str	w0, [x20]
-.L1448:
+.L1471:
 	mov	w0, w19
 	bl	NandcFlashDeCs
-	b	.L1445
-.L1456:
+	b	.L1468
+.L1479:
 	ldr	w0, [x27]
 	cmn	w0, #1
-	bne	.L1451
+	bne	.L1474
 	ldr	w1, [x27, 4]
 	adrp	x0, .LC29
 	add	x0, x0, :lo12:.LC29
 	bl	printf
-.L1452:
+.L1475:
 	sub	w21, w21, #1
 	add	x27, x27, 56
 	and	w21, w21, 255
-.L1470:
+.L1493:
 	cmp	x27, x20
-	bne	.L1456
-	b	.L1469
-.L1451:
+	bne	.L1479
+	b	.L1492
+.L1474:
 	adrp	x19, .LANCHOR199
 	mov	w4, w21
 	add	x3, x29, 116
@@ -9990,45 +10080,45 @@ FlashProgSlc2KPages:
 	bl	FlashReadPages
 	ldr	w25, [x29, 120]
 	cmn	w25, #1
-	bne	.L1453
+	bne	.L1476
 	ldr	w1, [x27, 4]
 	adrp	x0, .LC30
 	add	x0, x0, :lo12:.LC30
 	bl	printf
 	str	w25, [x27]
-.L1453:
+.L1476:
 	ldr	x0, [x27, 16]
-	cbz	x0, .L1454
+	cbz	x0, .L1477
 	ldr	w2, [x0]
 	ldr	x0, [x19, #:lo12:.LANCHOR199]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1454
+	beq	.L1477
 	ldr	w1, [x27, 4]
 	adrp	x0, .LC31
 	add	x0, x0, :lo12:.LC31
 	bl	printf
 	mov	w0, -1
 	str	w0, [x27]
-.L1454:
+.L1477:
 	ldr	x0, [x27, 8]
-	cbz	x0, .L1452
+	cbz	x0, .L1475
 	ldr	w2, [x0]
 	ldr	x0, [x23, #:lo12:.LANCHOR198]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1452
+	beq	.L1475
 	ldr	w1, [x27, 4]
 	adrp	x0, .LC32
 	add	x0, x0, :lo12:.LC32
 	bl	printf
 	mov	w0, -1
 	str	w0, [x27]
-	b	.L1452
-.L1450:
+	b	.L1475
+.L1473:
 	adrp	x22, .LANCHOR198
 	mov	x23, x22
-	b	.L1470
+	b	.L1493
 	.size	FlashProgSlc2KPages, .-FlashProgSlc2KPages
 	.section	.text.FlashProgPages,"ax",@progbits
 	.align	2
@@ -10046,9 +10136,9 @@ FlashProgPages:
 	stp	x27, x28, [sp, 80]
 	ldrb	w4, [x4, 19]
 	stp	w3, w4, [x29, 100]
-	adrp	x4, .LANCHOR1
-	ldrb	w4, [x4, #:lo12:.LANCHOR1]
-	cbnz	w4, .L1473
+	adrp	x4, .LANCHOR2
+	ldrb	w4, [x4, #:lo12:.LANCHOR2]
+	cbnz	w4, .L1496
 	mov	x19, x0
 	adrp	x0, .LANCHOR31+9
 	adrp	x27, .LANCHOR23
@@ -10058,28 +10148,28 @@ FlashProgPages:
 	add	x28, x27, :lo12:.LANCHOR23
 	mov	w21, 0
 	str	w0, [x29, 108]
-.L1474:
+.L1497:
 	cmp	w21, w24
 	adrp	x26, .LANCHOR25
-	bcc	.L1487
+	bcc	.L1510
 	adrp	x21, .LANCHOR15
 	adrp	x23, .LANCHOR23
 	add	x25, x26, :lo12:.LANCHOR25
 	add	x21, x21, :lo12:.LANCHOR15
 	add	x23, x23, :lo12:.LANCHOR23
 	mov	x20, 0
-.L1488:
+.L1511:
 	ldrb	w0, [x25]
 	cmp	w0, w20
-	bhi	.L1490
+	bhi	.L1513
 	ldr	w0, [x29, 100]
-	cbnz	w0, .L1491
-.L1499:
+	cbnz	w0, .L1514
+.L1522:
 	mov	w0, 0
-	b	.L1472
-.L1473:
+	b	.L1495
+.L1496:
 	bl	FlashProgSlc2KPages
-.L1472:
+.L1495:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -10087,7 +10177,7 @@ FlashProgPages:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1487:
+.L1510:
 	mov	w12, 56
 	mov	w1, w22
 	sub	w4, w24, w21
@@ -10101,13 +10191,13 @@ FlashProgPages:
 	ldrb	w1, [x26, #:lo12:.LANCHOR25]
 	ldr	w0, [x29, 116]
 	cmp	w1, w0
-	bhi	.L1476
+	bhi	.L1499
 	mov	w0, -1
 	str	w0, [x19, x12]
-.L1477:
+.L1500:
 	add	w21, w21, 1
-	b	.L1474
-.L1476:
+	b	.L1497
+.L1499:
 	adrp	x1, .LANCHOR27
 	add	x2, x27, :lo12:.LANCHOR23
 	mov	x3, 24
@@ -10117,20 +10207,20 @@ FlashProgPages:
 	csel	w23, w23, wzr, ne
 	madd	x1, x1, x3, x2
 	ldr	x1, [x1, 8]
-	cbz	x1, .L1479
+	cbz	x1, .L1502
 	bl	FlashWaitCmdDone
-.L1479:
+.L1502:
 	ldp	w2, w1, [x29, 112]
 	mov	x0, 24
 	madd	x0, x1, x0, x28
 	str	w2, [x0, 4]
 	stp	x25, xzr, [x0, 8]
-	cbz	w23, .L1480
+	cbz	w23, .L1503
 	add	w2, w21, 1
 	mov	w3, 56
 	umaddl	x2, w2, w3, x19
 	str	x2, [x0, 16]
-.L1480:
+.L1503:
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w20, [x0, x1]
@@ -10140,17 +10230,17 @@ FlashProgPages:
 	cmp	w0, 1
 	mov	w0, w20
 	strb	w20, [x28, x1]
-	bne	.L1481
+	bne	.L1504
 	bl	NandcWaitFlashReady
-.L1482:
+.L1505:
 	ldr	w0, [x29, 104]
 	sub	w0, w0, #1
 	cmp	w0, 7
-	bhi	.L1483
+	bhi	.L1506
 	adrp	x0, .LANCHOR21
 	add	x0, x0, :lo12:.LANCHOR21
 	ldrb	w0, [x0, w20, sxtw]
-	cbz	w0, .L1483
+	cbz	w0, .L1506
 	adrp	x0, .LANCHOR20
 	add	x0, x0, :lo12:.LANCHOR20
 	add	x2, x0, 4
@@ -10158,17 +10248,17 @@ FlashProgPages:
 	ldrb	w1, [x0, 1]
 	mov	w0, w20
 	bl	HynixSetRRPara
-.L1483:
+.L1506:
 	mov	w0, w20
 	bl	NandcFlashCs
 	cmp	w22, 1
-	bne	.L1484
+	bne	.L1507
 	adrp	x0, .LANCHOR15
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L1484
+	cbz	w0, .L1507
 	mov	w0, w20
 	bl	flash_enter_slc_mode
-.L1485:
+.L1508:
 	ldr	w1, [x29, 112]
 	mov	w0, w20
 	bl	FlashProgFirstCmd
@@ -10177,7 +10267,7 @@ FlashProgPages:
 	ldp	x3, x4, [x25, 8]
 	mov	w0, w20
 	bl	NandcXferData
-	cbz	w23, .L1486
+	cbz	w23, .L1509
 	ldr	w1, [x29, 112]
 	mov	w0, w20
 	bl	FlashProgDpFirstCmd
@@ -10190,9 +10280,9 @@ FlashProgPages:
 	mov	w0, w20
 	cset	w2, ne
 	bl	FlashWaitReadyEN
-	adrp	x0, .LANCHOR3
+	adrp	x0, .LANCHOR4
 	ldr	w1, [x29, 112]
-	ldr	w0, [x0, #:lo12:.LANCHOR3]
+	ldr	w0, [x0, #:lo12:.LANCHOR4]
 	add	w1, w1, w0
 	mov	w0, w20
 	bl	FlashProgDpSecondCmd
@@ -10205,15 +10295,15 @@ FlashProgPages:
 	ldp	x3, x4, [x0, 8]
 	mov	w0, w20
 	bl	NandcXferData
-.L1486:
+.L1509:
 	ldr	w1, [x29, 112]
 	mov	w0, w20
 	add	w21, w21, w23
 	bl	FlashProgSecondCmd
 	mov	w0, w20
 	bl	NandcFlashDeCs
-	b	.L1477
-.L1481:
+	b	.L1500
+.L1504:
 	bl	NandcFlashCs
 	ldr	w1, [x29, 116]
 	adrp	x0, .LANCHOR17
@@ -10226,47 +10316,47 @@ FlashProgPages:
 	bl	FlashWaitReadyEN
 	mov	w0, w20
 	bl	NandcFlashDeCs
-	b	.L1482
-.L1484:
+	b	.L1505
+.L1507:
 	mov	w0, w20
 	bl	flash_exit_slc_mode
-	b	.L1485
-.L1490:
+	b	.L1508
+.L1513:
 	mov	w0, w20
 	bl	FlashWaitCmdDone
 	cmp	w22, 1
-	bne	.L1489
+	bne	.L1512
 	ldrb	w0, [x21]
-	cbz	w0, .L1489
+	cbz	w0, .L1512
 	mov	x0, 24
 	mul	x0, x20, x0
 	ldrb	w0, [x0, x23]
 	bl	flash_exit_slc_mode
-.L1489:
+.L1512:
 	add	x20, x20, 1
-	b	.L1488
-.L1491:
+	b	.L1511
+.L1514:
 	mov	w0, 56
 	and	w20, w24, 255
 	adrp	x23, .LANCHOR198
 	mov	x25, x23
 	umaddl	x24, w24, w0, x19
-.L1492:
+.L1515:
 	cmp	x24, x19
-	beq	.L1499
+	beq	.L1522
 	ldr	w0, [x19]
 	cmn	w0, #1
-	bne	.L1493
+	bne	.L1516
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC29
 	add	x0, x0, :lo12:.LC29
 	bl	printf
-.L1494:
+.L1517:
 	sub	w20, w20, #1
 	add	x19, x19, 56
 	and	w20, w20, 255
-	b	.L1492
-.L1493:
+	b	.L1515
+.L1516:
 	adrp	x21, .LANCHOR199
 	mov	w4, w20
 	add	x3, x29, 116
@@ -10289,41 +10379,41 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	w26, [x29, 120]
 	cmn	w26, #1
-	bne	.L1495
+	bne	.L1518
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC30
 	add	x0, x0, :lo12:.LC30
 	bl	printf
 	str	w26, [x19]
-.L1495:
+.L1518:
 	ldr	x0, [x19, 16]
-	cbz	x0, .L1496
+	cbz	x0, .L1519
 	ldr	w2, [x0]
 	ldr	x0, [x21, #:lo12:.LANCHOR199]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1496
+	beq	.L1519
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC31
 	add	x0, x0, :lo12:.LC31
 	bl	printf
 	mov	w0, -1
 	str	w0, [x19]
-.L1496:
+.L1519:
 	ldr	x0, [x19, 8]
-	cbz	x0, .L1494
+	cbz	x0, .L1517
 	ldr	w2, [x0]
 	ldr	x0, [x25, #:lo12:.LANCHOR198]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1494
+	beq	.L1517
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC32
 	add	x0, x0, :lo12:.LC32
 	bl	printf
 	mov	w0, -1
 	str	w0, [x19]
-	b	.L1494
+	b	.L1517
 	.size	FlashProgPages, .-FlashProgPages
 	.section	.text.FlashTestBlk,"ax",@progbits
 	.align	2
@@ -10337,7 +10427,7 @@ FlashTestBlk:
 	adrp	x0, .LANCHOR149
 	ldr	w0, [x0, #:lo12:.LANCHOR149]
 	cmp	w19, w0
-	bcc	.L1527
+	bcc	.L1550
 	adrp	x20, .LANCHOR153
 	mov	w2, 32
 	mov	w1, 165
@@ -10368,14 +10458,14 @@ FlashTestBlk:
 	add	x0, x29, 40
 	csetm	w19, ne
 	bl	FlashEraseBlocks
-.L1525:
+.L1548:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 160
 	ret
-.L1527:
+.L1550:
 	mov	w19, 0
-	b	.L1525
+	b	.L1548
 	.size	FlashTestBlk, .-FlashTestBlk
 	.section	.text.FtlLowFormatEraseBlock,"ax",@progbits
 	.align	2
@@ -10392,7 +10482,7 @@ FtlLowFormatEraseBlock:
 	ldr	w0, [x0, #:lo12:.LANCHOR76]
 	stp	x23, x24, [sp, 48]
 	stp	x27, x28, [sp, 80]
-	cbnz	w0, .L1552
+	cbnz	w0, .L1575
 	adrp	x23, .LANCHOR27
 	and	w25, w1, 255
 	adrp	x20, .LANCHOR15
@@ -10418,10 +10508,10 @@ FtlLowFormatEraseBlock:
 	mov	w19, 0
 	str	x1, [x29, 128]
 	str	x0, [x29, 120]
-.L1531:
+.L1554:
 	cmp	w11, w5, uxth
-	bhi	.L1535
-	cbz	w24, .L1529
+	bhi	.L1558
+	cbz	w24, .L1552
 	cmp	w10, 0
 	mov	w2, w24
 	cset	w22, ne
@@ -10434,31 +10524,31 @@ FtlLowFormatEraseBlock:
 	strb	w0, [x23, #:lo12:.LANCHOR27]
 	mov	w0, 56
 	umull	x24, w24, w0
-.L1538:
+.L1561:
 	ldr	x0, [x21, #:lo12:.LANCHOR77]
 	add	x1, x0, x27
 	ldr	w0, [x0, x27]
 	cmn	w0, #1
-	bne	.L1537
+	bne	.L1560
 	ldr	w0, [x1, 4]
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.L1537:
+.L1560:
 	add	x27, x27, 56
 	cmp	x27, x24
-	bne	.L1538
-	cbnz	w25, .L1539
+	bne	.L1561
+	cbnz	w25, .L1562
 	and	w22, w22, 65535
 	mov	w28, 6
 	mov	w27, 1
-.L1540:
+.L1563:
 	adrp	x0, .LANCHOR47
 	mov	w24, 0
 	add	x0, x0, :lo12:.LANCHOR47
 	str	x0, [x29, 112]
-.L1548:
+.L1571:
 	ldr	x0, [x29, 128]
 	mov	x5, 0
 	ldr	x6, [x21, #:lo12:.LANCHOR77]
@@ -10471,10 +10561,10 @@ FtlLowFormatEraseBlock:
 	ldr	x10, [x0, #:lo12:.LANCHOR187]
 	ldr	x0, [x29, 120]
 	ldrh	w11, [x0, #:lo12:.LANCHOR58]
-.L1541:
+.L1564:
 	cmp	w7, w5, uxth
-	bhi	.L1544
-	cbz	w20, .L1529
+	bhi	.L1567
+	cbz	w20, .L1552
 	mov	w2, w22
 	mov	w1, w20
 	strb	wzr, [x23, #:lo12:.LANCHOR27]
@@ -10486,11 +10576,11 @@ FtlLowFormatEraseBlock:
 	strb	w0, [x23, #:lo12:.LANCHOR27]
 	mov	x2, 0
 	umull	x1, w20, w1
-.L1547:
+.L1570:
 	ldr	x0, [x21, #:lo12:.LANCHOR77]
 	add	x3, x0, x2
 	ldr	w0, [x0, x2]
-	cbz	w0, .L1546
+	cbz	w0, .L1569
 	ldr	w0, [x3, 4]
 	add	w19, w19, 1
 	stp	x2, x1, [x29, 96]
@@ -10498,39 +10588,39 @@ FtlLowFormatEraseBlock:
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
 	ldp	x2, x1, [x29, 96]
-.L1546:
+.L1569:
 	add	x2, x2, 56
 	cmp	x1, x2
-	bne	.L1547
+	bne	.L1570
 	add	w24, w24, w28
 	and	w24, w24, 65535
 	cmp	w27, w24
-	bhi	.L1548
+	bhi	.L1571
 	mov	x23, 0
-.L1550:
-	cbz	w25, .L1549
+.L1573:
+	cbz	w25, .L1572
 	ldr	x0, [x21, #:lo12:.LANCHOR77]
 	add	x1, x0, x23
 	ldr	w0, [x0, x23]
-	cbnz	w0, .L1549
+	cbnz	w0, .L1572
 	ldr	w0, [x1, 4]
 	mov	w1, 1
 	str	x2, [x29, 136]
 	lsr	w0, w0, 10
 	bl	FtlFreeSysBlkQueueIn
 	ldr	x2, [x29, 136]
-.L1549:
+.L1572:
 	add	x23, x23, 56
 	cmp	x23, x2
-	bne	.L1550
+	bne	.L1573
 	cmp	w26, 63
 	ccmp	w25, 0, 0, hi
-	beq	.L1529
+	beq	.L1552
 	ldr	x0, [x21, #:lo12:.LANCHOR77]
 	mov	w2, w20
 	mov	w1, w22
 	bl	FlashEraseBlocks
-.L1529:
+.L1552:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10539,7 +10629,7 @@ FtlLowFormatEraseBlock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1535:
+.L1558:
 	mul	x0, x5, x8
 	mov	w1, w26
 	str	wzr, [x6, x0]
@@ -10547,13 +10637,13 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	and	w15, w0, 65535
 	mov	w22, w15
-	cbz	w25, .L1532
+	cbz	w25, .L1555
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L1533
-.L1532:
+	cbnz	w0, .L1556
+.L1555:
 	mov	w0, w22
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L1534
+	cbnz	w0, .L1557
 	umaddl	x1, w24, w14, x6
 	lsl	w15, w15, 10
 	mul	w0, w24, w13
@@ -10563,26 +10653,26 @@ FtlLowFormatEraseBlock:
 	str	w15, [x1, 4]
 	add	x0, x12, x0, sxtw 2
 	stp	xzr, x0, [x1, 8]
-.L1533:
+.L1556:
 	add	x5, x5, 1
-	b	.L1531
-.L1534:
+	b	.L1554
+.L1557:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1533
-.L1539:
+	b	.L1556
+.L1562:
 	adrp	x0, .LANCHOR53
 	ldrh	w27, [x0, #:lo12:.LANCHOR53]
 	ldrb	w0, [x20, #:lo12:.LANCHOR15]
-	cbnz	w0, .L1553
+	cbnz	w0, .L1576
 	lsr	w28, w27, 2
 	mov	w22, 1
-	b	.L1540
-.L1553:
+	b	.L1563
+.L1576:
 	mov	w22, 1
 	mov	w28, w22
-	b	.L1540
-.L1544:
+	b	.L1563
+.L1567:
 	mov	x0, 56
 	mov	w1, w26
 	mul	x0, x5, x0
@@ -10592,13 +10682,13 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	and	w13, w0, 65535
 	mov	w14, w13
-	cbz	w25, .L1542
+	cbz	w25, .L1565
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L1543
-.L1542:
+	cbnz	w0, .L1566
+.L1565:
 	mov	w0, w14
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L1543
+	cbnz	w0, .L1566
 	umaddl	x1, w20, w12, x6
 	add	w13, w24, w13, lsl 10
 	mul	w0, w20, w11
@@ -10608,12 +10698,12 @@ FtlLowFormatEraseBlock:
 	str	w13, [x1, 4]
 	add	x0, x10, x0, sxtw 2
 	stp	x8, x0, [x1, 8]
-.L1543:
+.L1566:
 	add	x5, x5, 1
-	b	.L1541
-.L1552:
+	b	.L1564
+.L1575:
 	mov	w19, 0
-	b	.L1529
+	b	.L1552
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
 	.section	.text.FtlBbmTblFlush,"ax",@progbits
 	.align	2
@@ -10629,11 +10719,11 @@ FtlBbmTblFlush:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w0, .L1576
+	cbnz	w0, .L1599
 	adrp	x24, .LANCHOR188
 	adrp	x23, .LANCHOR183
-	adrp	x20, .LANCHOR202
-	add	x19, x20, :lo12:.LANCHOR202
+	adrp	x20, .LANCHOR203
+	add	x19, x20, :lo12:.LANCHOR203
 	ldr	x1, [x24, #:lo12:.LANCHOR188]
 	adrp	x21, .LANCHOR74
 	ldr	x0, [x23, #:lo12:.LANCHOR183]
@@ -10649,20 +10739,20 @@ FtlBbmTblFlush:
 	add	x28, x28, :lo12:.LANCHOR123
 	mov	w1, 0
 	bl	ftl_memset
-.L1577:
+.L1600:
 	ldrh	w0, [x27]
 	cmp	w25, w0
-	blt	.L1578
-	add	x20, x20, :lo12:.LANCHOR202
+	blt	.L1601
+	add	x20, x20, :lo12:.LANCHOR203
 	add	x19, x21, :lo12:.LANCHOR74
 	mov	w2, 16
 	mov	w1, 255
-	adrp	x25, .LC33
+	adrp	x26, .LC33
 	adrp	x27, .LANCHOR53
 	ldr	x28, [x20, 16]
-	add	x25, x25, :lo12:.LC33
+	add	x26, x26, :lo12:.LC33
 	add	x27, x27, :lo12:.LANCHOR53
-	mov	w26, 0
+	mov	w25, 0
 	mov	x0, x28
 	bl	ftl_memset
 	mov	w0, -3887
@@ -10679,7 +10769,7 @@ FtlBbmTblFlush:
 	adrp	x0, .LANCHOR37
 	ldr	w0, [x0, #:lo12:.LANCHOR37]
 	strh	w0, [x28, 12]
-.L1579:
+.L1602:
 	ldrh	w1, [x19]
 	ldrh	w4, [x28, 10]
 	ldrh	w2, [x19, 2]
@@ -10691,13 +10781,13 @@ FtlBbmTblFlush:
 	orr	w0, w2, w1, lsl 10
 	str	wzr, [x20]
 	str	w0, [x20, 4]
-	mov	x0, x25
+	mov	x0, x26
 	bl	printf
 	ldrh	w0, [x27]
 	ldrh	w1, [x19, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L1580
+	blt	.L1603
 	ldr	w0, [x19, 8]
 	mov	w2, 1
 	ldrh	w1, [x19, 4]
@@ -10716,7 +10806,7 @@ FtlBbmTblFlush:
 	str	w1, [x0, 4]
 	mov	w1, w2
 	bl	FlashEraseBlocks
-.L1580:
+.L1603:
 	mov	w3, 1
 	mov	x0, x20
 	mov	w2, w3
@@ -10727,7 +10817,7 @@ FtlBbmTblFlush:
 	strh	w0, [x19, 2]
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L1581
+	bne	.L1604
 	ldr	w1, [x20, 4]
 	add	w21, w21, 1
 	adrp	x0, .LC34
@@ -10735,7 +10825,7 @@ FtlBbmTblFlush:
 	add	x0, x0, :lo12:.LC34
 	bl	printf
 	cmp	w21, 3
-	bls	.L1579
+	bls	.L1602
 	ldr	w1, [x20, 4]
 	mov	w2, w21
 	adrp	x0, .LC35
@@ -10743,7 +10833,7 @@ FtlBbmTblFlush:
 	bl	printf
 	mov	w0, 1
 	str	w0, [x22, #:lo12:.LANCHOR76]
-.L1576:
+.L1599:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10752,7 +10842,7 @@ FtlBbmTblFlush:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1578:
+.L1601:
 	ldrh	w2, [x28]
 	ldr	x1, [x26], 8
 	ldr	x0, [x19, 8]
@@ -10761,11 +10851,14 @@ FtlBbmTblFlush:
 	add	w25, w25, 1
 	add	x0, x0, x3, sxtw 2
 	bl	ftl_memcpy
-	b	.L1577
-.L1581:
-	cbnz	w26, .L1576
-	mov	w26, 1
-	b	.L1579
+	b	.L1600
+.L1604:
+	add	w25, w25, 1
+	cmp	w25, 1
+	beq	.L1602
+	cmp	w0, 256
+	beq	.L1602
+	b	.L1599
 	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
 	.section	.text.allocate_data_superblock,"ax",@progbits
 	.align	2
@@ -10774,7 +10867,7 @@ FtlBbmTblFlush:
 allocate_data_superblock:
 	adrp	x1, .LANCHOR76
 	ldr	w1, [x1, #:lo12:.LANCHOR76]
-	cbnz	w1, .L1650
+	cbnz	w1, .L1678
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
@@ -10788,7 +10881,7 @@ allocate_data_superblock:
 	add	x23, x0, :lo12:.LANCHOR88
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
-.L1641:
+.L1669:
 	ldr	x1, [x29, 120]
 	adrp	x0, .LANCHOR88
 	adrp	x24, .LANCHOR40
@@ -10797,11 +10890,11 @@ allocate_data_superblock:
 	add	w0, w0, w1
 	ldrh	w1, [x24, #:lo12:.LANCHOR40]
 	cmp	w0, w1
-	ble	.L1589
-	mov	w2, 3139
-	adrp	x1, .LANCHOR203
+	ble	.L1617
+	mov	w2, 3165
+	adrp	x1, .LANCHOR204
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR203
+	add	x1, x1, :lo12:.LANCHOR204
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -10809,11 +10902,11 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1589:
+.L1617:
 	adrp	x0, .LANCHOR93
 	add	x0, x0, :lo12:.LANCHOR93
 	cmp	x19, x0
-	bne	.L1590
+	bne	.L1618
 	adrp	x1, .LANCHOR172
 	ldrh	w2, [x23]
 	ldr	w3, [x1, #:lo12:.LANCHOR172]
@@ -10824,57 +10917,57 @@ allocate_data_superblock:
 	adrp	x4, .LANCHOR28
 	and	w1, w1, 65535
 	ldr	w4, [x4, #:lo12:.LANCHOR28]
-	cbz	w4, .L1591
+	cbz	w4, .L1619
 	adrp	x4, .LANCHOR170
 	ldr	w4, [x4, #:lo12:.LANCHOR170]
 	cmp	w4, 39
-	bhi	.L1591
+	bhi	.L1619
 	cmp	w4, 2
-	bls	.L1625
-	tbz	x2, 0, .L1621
-	cbz	w3, .L1625
-.L1621:
+	bls	.L1653
+	tbz	x2, 0, .L1649
+	cbz	w3, .L1653
+.L1649:
 	mov	w1, w0
-	b	.L1591
-.L1590:
+	b	.L1619
+.L1618:
 	ldrb	w0, [x19, 8]
 	cmp	w0, 1
-	bne	.L1625
+	bne	.L1653
 	adrp	x0, .LANCHOR44
 	ldrh	w0, [x0, #:lo12:.LANCHOR44]
 	cmp	w0, 1
-	beq	.L1625
+	beq	.L1653
 	adrp	x0, .LANCHOR15
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbnz	w0, .L1625
+	cbnz	w0, .L1653
 	adrp	x2, .LANCHOR28
 	ldrh	w0, [x23]
 	ldr	w2, [x2, #:lo12:.LANCHOR28]
 	lsr	w1, w0, 3
-	cbz	w2, .L1591
+	cbz	w2, .L1619
 	adrp	x2, .LANCHOR170
 	ldr	w2, [x2, #:lo12:.LANCHOR170]
 	cmp	w2, 1
-	bhi	.L1591
+	bhi	.L1619
 	mov	w1, 7
 	mul	w1, w0, w1
 	lsr	w1, w1, 3
-.L1591:
-	cbz	w1, .L1592
+.L1619:
+	cbz	w1, .L1620
 	sub	w1, w1, #1
 	and	w1, w1, 65535
-.L1592:
+.L1620:
 	ldrb	w2, [x19, 8]
 	adrp	x0, .LANCHOR87
 	add	x0, x0, :lo12:.LANCHOR87
 	bl	List_pop_index_node
 	and	w22, w0, 65535
 	ldrh	w0, [x23]
-	cbnz	w0, .L1593
-	mov	w2, 3159
-	adrp	x1, .LANCHOR203
+	cbnz	w0, .L1621
+	mov	w2, 3185
+	adrp	x1, .LANCHOR204
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR203
+	add	x1, x1, :lo12:.LANCHOR204
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -10882,23 +10975,23 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1593:
+.L1621:
 	ldrh	w0, [x23]
 	sub	w0, w0, #1
 	strh	w0, [x23]
 	ldrh	w0, [x24, #:lo12:.LANCHOR40]
 	cmp	w0, w22
-	bls	.L1641
+	bls	.L1669
 	adrp	x25, .LANCHOR83
 	ubfiz	x21, x22, 1, 16
 	ldr	x0, [x25, #:lo12:.LANCHOR83]
 	ldrh	w20, [x0, x21]
-	cbnz	w20, .L1641
+	cbnz	w20, .L1669
 	strh	w22, [x19]
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L1595
+	cbnz	w0, .L1623
 	ldr	x0, [x25, #:lo12:.LANCHOR83]
 	mov	w1, -1
 	strh	w1, [x0, x21]
@@ -10907,11 +11000,11 @@ allocate_data_superblock:
 	add	w0, w0, w1
 	ldrh	w1, [x24, #:lo12:.LANCHOR40]
 	cmp	w0, w1
-	ble	.L1641
-	mov	w2, 3175
-	adrp	x1, .LANCHOR203
+	ble	.L1669
+	mov	w2, 3201
+	adrp	x1, .LANCHOR204
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR203
+	add	x1, x1, :lo12:.LANCHOR204
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -10919,21 +11012,21 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-	b	.L1641
-.L1625:
+	b	.L1669
+.L1653:
 	mov	w1, 0
-	b	.L1592
-.L1595:
+	b	.L1620
+.L1623:
 	ldrh	w1, [x27, #:lo12:.LANCHOR85]
 	ldrh	w0, [x23]
 	add	w0, w0, w1
 	ldrh	w1, [x24, #:lo12:.LANCHOR40]
 	cmp	w0, w1
-	ble	.L1597
-	mov	w2, 3178
-	adrp	x1, .LANCHOR203
+	ble	.L1625
+	mov	w2, 3204
+	adrp	x1, .LANCHOR204
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR203
+	add	x1, x1, :lo12:.LANCHOR204
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -10941,7 +11034,7 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1597:
+.L1625:
 	adrp	x1, .LANCHOR38
 	adrp	x25, .LANCHOR77
 	mov	w2, 56
@@ -10954,14 +11047,14 @@ allocate_data_superblock:
 	add	x0, x4, 8
 	umaddl	x1, w2, w1, x3
 	add	x1, x4, x1
-.L1598:
+.L1626:
 	cmp	x1, x0
-	bne	.L1600
-	cbnz	w20, .L1601
-	mov	w2, 3190
-	adrp	x1, .LANCHOR203
+	bne	.L1628
+	cbnz	w20, .L1629
+	mov	w2, 3216
+	adrp	x1, .LANCHOR204
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR203
+	add	x1, x1, :lo12:.LANCHOR204
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -10969,29 +11062,29 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1601:
+.L1629:
 	adrp	x0, .LANCHOR28
 	adrp	x28, .LANCHOR78
 	ldr	w0, [x0, #:lo12:.LANCHOR28]
-	cbz	w0, .L1602
+	cbz	w0, .L1630
 	adrp	x0, .LANCHOR91
 	add	x0, x0, :lo12:.LANCHOR91
 	cmp	x19, x0
-	bne	.L1602
+	bne	.L1630
 	ldr	x0, [x28, #:lo12:.LANCHOR78]
 	ldrh	w0, [x0, x21]
 	cmp	w0, 40
-	bls	.L1602
+	bls	.L1630
 	strb	wzr, [x19, 8]
-.L1602:
-	adrp	x0, .LANCHOR204
-	ldrh	w0, [x0, #:lo12:.LANCHOR204]
+.L1630:
+	adrp	x0, .LANCHOR205
+	ldrh	w0, [x0, #:lo12:.LANCHOR205]
 	cmp	w0, w22
-	bne	.L1603
-	mov	w2, 3197
-	adrp	x1, .LANCHOR203
+	bne	.L1631
+	mov	w2, 3223
+	adrp	x1, .LANCHOR204
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR203
+	add	x1, x1, :lo12:.LANCHOR204
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -10999,18 +11092,18 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1603:
+.L1631:
 	ldrb	w0, [x19, 8]
 	adrp	x6, .LANCHOR48
 	adrp	x5, .LANCHOR167
 	adrp	x4, .LANCHOR168
 	ldr	x1, [x28, #:lo12:.LANCHOR78]
-	cbnz	w0, .L1604
+	cbnz	w0, .L1632
 	ldrh	w0, [x1, x21]
-	cbz	w0, .L1605
+	cbz	w0, .L1633
 	ldrh	w2, [x6, #:lo12:.LANCHOR48]
 	add	w0, w0, w2
-.L1653:
+.L1681:
 	strh	w0, [x1, x21]
 	mov	w1, 0
 	ldr	w0, [x5, #:lo12:.LANCHOR167]
@@ -11018,15 +11111,15 @@ allocate_data_superblock:
 	str	w0, [x5, #:lo12:.LANCHOR167]
 	mov	w0, w22
 	bl	ftl_set_blk_mode
-.L1607:
+.L1635:
 	ldr	x0, [x28, #:lo12:.LANCHOR78]
 	ldrh	w1, [x0, x21]
 	adrp	x0, .LANCHOR169
 	ldr	w2, [x0, #:lo12:.LANCHOR169]
 	cmp	w1, w2
-	bls	.L1608
+	bls	.L1636
 	str	w1, [x0, #:lo12:.LANCHOR169]
-.L1608:
+.L1636:
 	ldr	w2, [x5, #:lo12:.LANCHOR167]
 	mov	x3, 4
 	ldr	w1, [x4, #:lo12:.LANCHOR168]
@@ -11034,8 +11127,8 @@ allocate_data_superblock:
 	madd	w0, w0, w2, w1
 	ldrh	w1, [x24, #:lo12:.LANCHOR40]
 	udiv	w0, w0, w1
-	adrp	x1, .LANCHOR205
-	str	w0, [x1, #:lo12:.LANCHOR205]
+	adrp	x1, .LANCHOR206
+	str	w0, [x1, #:lo12:.LANCHOR206]
 	adrp	x0, .LANCHOR191
 	ldr	x1, [x0, #:lo12:.LANCHOR191]
 	ldr	w0, [x1, 16]
@@ -11047,20 +11140,20 @@ allocate_data_superblock:
 	umaddl	x1, w1, w20, x3
 	add	x2, x0, 4
 	add	x1, x0, x1
-.L1609:
+.L1637:
 	cmp	x1, x2
-	bne	.L1610
+	bne	.L1638
 	adrp	x1, .LANCHOR15
 	ldrb	w1, [x1, #:lo12:.LANCHOR15]
-	cbz	w1, .L1611
+	cbz	w1, .L1639
 	ldrb	w1, [x19, 8]
 	mov	w2, w20
 	cmp	w1, 1
-	bne	.L1612
+	bne	.L1640
 	mov	w1, 0
-.L1654:
+.L1682:
 	bl	FlashEraseBlocks
-.L1611:
+.L1639:
 	ldrb	w1, [x19, 8]
 	mov	w2, w20
 	ldr	x0, [x25, #:lo12:.LANCHOR77]
@@ -11068,39 +11161,39 @@ allocate_data_superblock:
 	bl	FlashEraseBlocks
 	mov	w1, 0
 	mov	x3, 56
-.L1613:
+.L1641:
 	cmp	w20, w24, uxth
-	bhi	.L1615
-	cbz	w1, .L1616
+	bhi	.L1643
+	cbz	w1, .L1644
 	mov	w0, w22
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L1616:
+.L1644:
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L1617
+	cbnz	w0, .L1645
 	adrp	x0, .LANCHOR83
 	mov	w1, -1
 	ldr	x0, [x0, #:lo12:.LANCHOR83]
 	strh	w1, [x0, x21]
-	b	.L1641
-.L1600:
+	b	.L1669
+.L1628:
 	ldrh	w3, [x5]
 	stp	xzr, xzr, [x0]
 	cmp	w3, w6
-	beq	.L1599
+	beq	.L1627
 	umaddl	x7, w20, w2, x4
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	lsl	w3, w3, 10
 	str	w3, [x7, 4]
-.L1599:
+.L1627:
 	add	x0, x0, 56
 	add	x5, x5, 2
-	b	.L1598
-.L1605:
+	b	.L1626
+.L1633:
 	mov	w0, 2
-	b	.L1653
-.L1604:
+	b	.L1681
+.L1632:
 	ldrh	w0, [x1, x21]
 	add	w0, w0, 1
 	strh	w0, [x1, x21]
@@ -11109,22 +11202,22 @@ allocate_data_superblock:
 	str	w0, [x4, #:lo12:.LANCHOR168]
 	mov	w0, w22
 	bl	ftl_set_blk_mode.part.10
-	b	.L1607
-.L1610:
+	b	.L1635
+.L1638:
 	ldr	w3, [x2]
 	and	w3, w3, -1024
 	str	w3, [x2], 56
-	b	.L1609
-.L1612:
+	b	.L1637
+.L1640:
 	mov	w1, 1
-	b	.L1654
-.L1615:
+	b	.L1682
+.L1643:
 	mul	x0, x24, x3
 	ldr	x2, [x25, #:lo12:.LANCHOR77]
 	add	x4, x2, x0
 	ldr	w2, [x2, x0]
 	cmn	w2, #1
-	bne	.L1614
+	bne	.L1642
 	add	w1, w1, 1
 	ldr	w0, [x4, 4]
 	str	x3, [x29, 104]
@@ -11137,11 +11230,11 @@ allocate_data_superblock:
 	ldrb	w0, [x19, 7]
 	sub	w0, w0, #1
 	strb	w0, [x19, 7]
-.L1614:
+.L1642:
 	add	x24, x24, 1
 	add	x26, x26, 2
-	b	.L1613
-.L1617:
+	b	.L1641
+.L1645:
 	adrp	x1, .LANCHOR52
 	adrp	x2, .LANCHOR159
 	strh	wzr, [x19, 2]
@@ -11159,14 +11252,14 @@ allocate_data_superblock:
 	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	strh	w0, [x1, x21]
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1618
+	cbz	w0, .L1646
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L1588
-.L1618:
-	mov	w2, 3256
-	adrp	x1, .LANCHOR203
+	cbnz	w0, .L1616
+.L1646:
+	mov	w2, 3282
+	adrp	x1, .LANCHOR204
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR203
+	add	x1, x1, :lo12:.LANCHOR204
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -11174,7 +11267,7 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1588:
+.L1616:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -11183,7 +11276,7 @@ allocate_data_superblock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1650:
+.L1678:
 	mov	w0, 0
 	ret
 	.size	allocate_data_superblock, .-allocate_data_superblock
@@ -11202,17 +11295,17 @@ FtlGcFreeBadSuperBlk:
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	str	x27, [sp, 80]
-	cbz	w0, .L1656
+	cbz	w0, .L1684
 	adrp	x23, .LANCHOR117
 	add	x24, x23, :lo12:.LANCHOR117
 	mov	w19, 0
-.L1657:
+.L1685:
 	adrp	x0, .LANCHOR38
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w0, w19
-	bhi	.L1663
+	bhi	.L1691
 	bl	FtlGcReFreshBadBlk
-.L1656:
+.L1684:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -11221,7 +11314,7 @@ FtlGcFreeBadSuperBlk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1663:
+.L1691:
 	adrp	x0, .LANCHOR47
 	add	x0, x0, :lo12:.LANCHOR47
 	mov	w1, w25
@@ -11230,19 +11323,19 @@ FtlGcFreeBadSuperBlk:
 	ldrb	w0, [x0, w19, sxtw]
 	bl	V2P_block
 	and	w26, w0, 65535
-.L1658:
+.L1686:
 	ldrh	w0, [x22]
 	cmp	w0, w20
-	bhi	.L1662
+	bhi	.L1690
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1657
-.L1662:
+	b	.L1685
+.L1690:
 	add	x0, x23, :lo12:.LANCHOR117
 	add	w27, w20, 1
 	ldrh	w0, [x0, w20, sxtw 1]
 	cmp	w0, w26
-	bne	.L1659
+	bne	.L1687
 	mov	w0, w26
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
@@ -11250,22 +11343,22 @@ FtlGcFreeBadSuperBlk:
 	sxtw	x3, w27
 	and	x4, x20, 65535
 	mov	x0, 0
-.L1660:
+.L1688:
 	add	w2, w20, w0
 	cmp	w1, w2, uxth
-	bhi	.L1661
+	bhi	.L1689
 	sub	w1, w1, #1
 	strh	w1, [x22]
-.L1659:
+.L1687:
 	and	w20, w27, 65535
-	b	.L1658
-.L1661:
+	b	.L1686
+.L1689:
 	add	x2, x3, x0
 	ldrh	w5, [x24, x2, lsl 1]
 	add	x2, x4, x0
 	add	x0, x0, 1
 	strh	w5, [x24, x2, lsl 1]
-	b	.L1660
+	b	.L1688
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
 	.section	.text.update_vpc_list,"ax",@progbits
 	.align	2
@@ -11280,25 +11373,25 @@ update_vpc_list:
 	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	ubfiz	x0, x19, 1, 16
 	ldrh	w0, [x1, x0]
-	cbnz	w0, .L1669
-	adrp	x0, .LANCHOR204
-	ldrh	w1, [x0, #:lo12:.LANCHOR204]
+	cbnz	w0, .L1697
+	adrp	x0, .LANCHOR205
+	ldrh	w1, [x0, #:lo12:.LANCHOR205]
 	cmp	w1, w19
-	bne	.L1670
+	bne	.L1698
 	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR204]
-.L1671:
+	strh	w1, [x0, #:lo12:.LANCHOR205]
+.L1699:
 	adrp	x20, .LANCHOR85
 	mov	w1, w19
 	adrp	x0, .LANCHOR82
 	add	x0, x0, :lo12:.LANCHOR82
 	bl	List_remove_node
 	ldrh	w0, [x20, #:lo12:.LANCHOR85]
-	cbnz	w0, .L1673
-	mov	w2, 3367
-	adrp	x1, .LANCHOR206
+	cbnz	w0, .L1701
+	mov	w2, 3393
+	adrp	x1, .LANCHOR207
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR206
+	add	x1, x1, :lo12:.LANCHOR207
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -11306,7 +11399,7 @@ update_vpc_list:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1673:
+.L1701:
 	ldrh	w0, [x20, #:lo12:.LANCHOR85]
 	sub	w0, w0, #1
 	strh	w0, [x20, #:lo12:.LANCHOR85]
@@ -11321,11 +11414,11 @@ update_vpc_list:
 	adrp	x1, .LANCHOR40
 	ldrh	w1, [x1, #:lo12:.LANCHOR40]
 	cmp	w0, w1
-	ble	.L1677
-	mov	w2, 3370
-	adrp	x1, .LANCHOR206
+	ble	.L1705
+	mov	w2, 3396
+	adrp	x1, .LANCHOR207
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR206
+	add	x1, x1, :lo12:.LANCHOR207
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -11333,32 +11426,32 @@ update_vpc_list:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1677:
+.L1705:
 	mov	w0, 1
-	b	.L1668
-.L1670:
+	b	.L1696
+.L1698:
 	adrp	x0, .LANCHOR91
 	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	cmp	w0, w19
-	beq	.L1676
+	beq	.L1704
 	adrp	x0, .LANCHOR92
 	ldrh	w0, [x0, #:lo12:.LANCHOR92]
 	cmp	w0, w19
-	beq	.L1676
+	beq	.L1704
 	adrp	x0, .LANCHOR93
 	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w0, w19
-	bne	.L1671
-.L1676:
+	bne	.L1699
+.L1704:
 	mov	w0, 0
-.L1668:
+.L1696:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1669:
+.L1697:
 	mov	w0, w19
 	bl	List_update_data_list
-	b	.L1676
+	b	.L1704
 	.size	update_vpc_list, .-update_vpc_list
 	.section	.text.decrement_vpc_count,"ax",@progbits
 	.align	2
@@ -11372,12 +11465,12 @@ decrement_vpc_count:
 	stp	x21, x22, [sp, 32]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1680
+	beq	.L1708
 	adrp	x20, .LANCHOR83
 	ubfiz	x21, x19, 1, 16
 	ldr	x1, [x20, #:lo12:.LANCHOR83]
 	ldrh	w0, [x1, x21]
-	cbnz	w0, .L1681
+	cbnz	w0, .L1709
 	mov	w2, 0
 	mov	w1, w19
 	adrp	x0, .LC36
@@ -11385,11 +11478,11 @@ decrement_vpc_count:
 	bl	printf
 	ldr	x0, [x20, #:lo12:.LANCHOR83]
 	ldrh	w0, [x0, x21]
-	cbnz	w0, .L1682
-	mov	w2, 3385
-	adrp	x1, .LANCHOR207
+	cbnz	w0, .L1710
+	mov	w2, 3411
+	adrp	x1, .LANCHOR208
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR207
+	add	x1, x1, :lo12:.LANCHOR208
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -11397,7 +11490,7 @@ decrement_vpc_count:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1682:
+.L1710:
 	ldr	x0, [x20, #:lo12:.LANCHOR83]
 	adrp	x6, .LANCHOR87
 	add	x6, x6, :lo12:.LANCHOR87
@@ -11406,17 +11499,17 @@ decrement_vpc_count:
 	mov	w1, w19
 	mov	x0, x6
 	bl	test_node_in_list
-	cbz	w0, .L1683
+	cbz	w0, .L1711
 	adrp	x22, .LANCHOR88
 	mov	w1, w19
 	mov	x0, x6
 	bl	List_remove_node
 	ldrh	w0, [x22, #:lo12:.LANCHOR88]
-	cbnz	w0, .L1684
-	mov	w2, 3389
-	adrp	x1, .LANCHOR207
+	cbnz	w0, .L1712
+	mov	w2, 3415
+	adrp	x1, .LANCHOR208
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR207
+	add	x1, x1, :lo12:.LANCHOR208
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -11424,7 +11517,7 @@ decrement_vpc_count:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1684:
+.L1712:
 	ldrh	w0, [x22, #:lo12:.LANCHOR88]
 	sub	w0, w0, #1
 	strh	w0, [x22, #:lo12:.LANCHOR88]
@@ -11436,26 +11529,26 @@ decrement_vpc_count:
 	adrp	x0, .LC37
 	add	x0, x0, :lo12:.LC37
 	bl	printf
-.L1683:
+.L1711:
 	mov	w0, w19
 	bl	FtlGcRefreshBlock
-.L1687:
+.L1715:
 	mov	w20, 0
-	b	.L1679
-.L1681:
+	b	.L1707
+.L1709:
 	sub	w0, w0, #1
 	strh	w0, [x1, x21]
-.L1680:
+.L1708:
 	adrp	x21, .LANCHOR133
 	mov	w1, 65535
 	ldrh	w0, [x21, #:lo12:.LANCHOR133]
 	cmp	w0, w1
-	bne	.L1686
+	bne	.L1714
 	strh	w19, [x21, #:lo12:.LANCHOR133]
-	b	.L1687
-.L1686:
+	b	.L1715
+.L1714:
 	cmp	w19, w0
-	beq	.L1687
+	beq	.L1715
 	bl	update_vpc_list
 	cmp	w0, 0
 	adrp	x1, .LANCHOR81
@@ -11473,13 +11566,13 @@ decrement_vpc_count:
 	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	and	x2, x0, 65535
 	ldrh	w1, [x1, x2, lsl 1]
-	cbnz	w1, .L1679
+	cbnz	w1, .L1707
 	cmp	w19, w0, uxth
-	beq	.L1679
-	mov	w2, 3410
-	adrp	x1, .LANCHOR207
+	beq	.L1707
+	mov	w2, 3436
+	adrp	x1, .LANCHOR208
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR207
+	add	x1, x1, :lo12:.LANCHOR208
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -11487,7 +11580,7 @@ decrement_vpc_count:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1679:
+.L1707:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11500,7 +11593,7 @@ decrement_vpc_count:
 	.type	FtlSlcSuperblockCheck, %function
 FtlSlcSuperblockCheck:
 	ldrh	w1, [x0, 4]
-	cbz	w1, .L1704
+	cbz	w1, .L1732
 	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
@@ -11509,7 +11602,7 @@ FtlSlcSuperblockCheck:
 	stp	x21, x22, [sp, 32]
 	str	x23, [sp, 48]
 	cmp	w1, w20
-	beq	.L1692
+	beq	.L1720
 	mov	x19, x0
 	ldrb	w0, [x0, 6]
 	adrp	x22, .LANCHOR15
@@ -11518,37 +11611,37 @@ FtlSlcSuperblockCheck:
 	add	x23, x22, :lo12:.LANCHOR15
 	add	x21, x21, :lo12:.LANCHOR120
 	ldrh	w0, [x19, x0, lsl 1]
-.L1696:
+.L1724:
 	cmp	w0, w20
-	beq	.L1698
+	beq	.L1726
 	ldrb	w0, [x19, 8]
 	cmp	w0, 1
-	bne	.L1699
+	bne	.L1727
 	ldrb	w1, [x23]
-	cbnz	w1, .L1699
+	cbnz	w1, .L1727
 	ldrh	w1, [x19, 2]
 	ldrh	w1, [x21, x1, lsl 1]
 	cmp	w1, w20
-	bne	.L1699
+	bne	.L1727
 	ldrh	w0, [x19, 4]
 	sub	w0, w0, #1
 	strh	w0, [x19, 4]
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1698
+	cbnz	w0, .L1726
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
-.L1707:
+.L1735:
 	strh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
-.L1692:
+.L1720:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1698:
+.L1726:
 	ldrb	w0, [x19, 6]
 	adrp	x1, .LANCHOR38
 	add	w0, w0, 1
@@ -11556,26 +11649,26 @@ FtlSlcSuperblockCheck:
 	and	w0, w0, 255
 	strb	w0, [x19, 6]
 	cmp	w1, w0
-	bne	.L1697
+	bne	.L1725
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L1697:
+.L1725:
 	ldrb	w0, [x19, 6]
 	add	x0, x0, 8
 	ldrh	w0, [x19, x0, lsl 1]
-	b	.L1696
-.L1699:
+	b	.L1724
+.L1727:
 	ldrb	w1, [x22, #:lo12:.LANCHOR15]
-	cbz	w1, .L1692
+	cbz	w1, .L1720
 	cmp	w0, 1
-	bne	.L1692
+	bne	.L1720
 	adrp	x0, .LANCHOR53
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bcc	.L1692
+	bcc	.L1720
 	ldrh	w0, [x19]
 	adrp	x1, .LANCHOR83
 	ldrh	w3, [x19, 4]
@@ -11587,8 +11680,8 @@ FtlSlcSuperblockCheck:
 	adrp	x0, .LANCHOR52
 	strh	wzr, [x19, 4]
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
-	b	.L1707
-.L1704:
+	b	.L1735
+.L1732:
 	ret
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
 	.section	.text.get_new_active_ppa,"ax",@progbits
@@ -11606,11 +11699,11 @@ get_new_active_ppa:
 	stp	x23, x24, [sp, 48]
 	cmp	w1, w0
 	str	x25, [sp, 64]
-	bne	.L1709
-	mov	w2, 3307
-	adrp	x1, .LANCHOR208
+	bne	.L1737
+	mov	w2, 3333
+	adrp	x1, .LANCHOR209
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR208
+	add	x1, x1, :lo12:.LANCHOR209
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -11618,16 +11711,16 @@ get_new_active_ppa:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1709:
+.L1737:
 	adrp	x20, .LANCHOR52
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bne	.L1710
-	mov	w2, 3308
-	adrp	x1, .LANCHOR208
+	bne	.L1738
+	mov	w2, 3334
+	adrp	x1, .LANCHOR209
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR208
+	add	x1, x1, :lo12:.LANCHOR209
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -11635,13 +11728,13 @@ get_new_active_ppa:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1710:
+.L1738:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1711
-	mov	w2, 3309
-	adrp	x1, .LANCHOR208
+	cbnz	w0, .L1739
+	mov	w2, 3335
+	adrp	x1, .LANCHOR209
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR208
+	add	x1, x1, :lo12:.LANCHOR209
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -11649,7 +11742,7 @@ get_new_active_ppa:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1711:
+.L1739:
 	ldrb	w0, [x19, 6]
 	adrp	x21, .LANCHOR38
 	strb	wzr, [x19, 10]
@@ -11660,42 +11753,42 @@ get_new_active_ppa:
 	add	x24, x24, :lo12:.LANCHOR120
 	add	x25, x21, :lo12:.LANCHOR38
 	ldrh	w22, [x19, x0, lsl 1]
-.L1712:
+.L1740:
 	mov	w2, 65535
 	cmp	w22, w2
-	beq	.L1713
+	beq	.L1741
 	ldrb	w0, [x19, 8]
 	ldrh	w1, [x19, 4]
 	cmp	w0, 1
 	ldrh	w0, [x19, 2]
-	bne	.L1715
+	bne	.L1743
 	ldrb	w3, [x23]
-	cbnz	w3, .L1715
+	cbnz	w3, .L1743
 	ldrh	w3, [x24, w0, sxtw 1]
 	cmp	w3, w2
-	bne	.L1715
+	bne	.L1743
 	ldrh	w0, [x19]
 	sub	w1, w1, #1
 	strh	w1, [x19, 4]
 	bl	decrement_vpc_count
-.L1713:
+.L1741:
 	ldrb	w0, [x19, 6]
 	ldrh	w1, [x25]
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x19, 6]
 	cmp	w1, w0
-	bne	.L1714
+	bne	.L1742
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L1714:
+.L1742:
 	ldrb	w0, [x19, 6]
 	add	x0, x0, 8
 	ldrh	w22, [x19, x0, lsl 1]
-	b	.L1712
-.L1715:
+	b	.L1740
+.L1743:
 	adrp	x23, .LANCHOR15
 	adrp	x24, .LANCHOR120
 	orr	w22, w0, w22, lsl 10
@@ -11703,46 +11796,46 @@ get_new_active_ppa:
 	add	x24, x24, :lo12:.LANCHOR120
 	sub	w1, w1, #1
 	strh	w1, [x19, 4]
-.L1716:
+.L1744:
 	ldrb	w0, [x19, 6]
 	mov	w1, 65535
 	ldrh	w3, [x21, #:lo12:.LANCHOR38]
-.L1718:
+.L1746:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	cmp	w0, w3
-	bne	.L1717
+	bne	.L1745
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
 	mov	w0, 0
-.L1717:
+.L1745:
 	add	x2, x19, x0, sxtw 1
 	ldrh	w2, [x2, 16]
 	cmp	w2, w1
-	beq	.L1718
+	beq	.L1746
 	strb	w0, [x19, 6]
 	ldrb	w0, [x19, 8]
 	cmp	w0, 1
-	bne	.L1719
+	bne	.L1747
 	ldrb	w2, [x23]
 	ldrh	w0, [x19, 2]
-	cbnz	w2, .L1720
+	cbnz	w2, .L1748
 	ldrh	w0, [x24, w0, sxtw 1]
 	cmp	w0, w1
-	bne	.L1719
+	bne	.L1747
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1719
+	cbz	w0, .L1747
 	sub	w0, w0, #1
 	strh	w0, [x19, 4]
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-	b	.L1716
-.L1720:
+	b	.L1744
+.L1748:
 	adrp	x1, .LANCHOR53
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	cmp	w0, w1
-	bcc	.L1719
+	bcc	.L1747
 	ldrh	w0, [x19]
 	adrp	x1, .LANCHOR83
 	ldrh	w3, [x19, 4]
@@ -11755,17 +11848,17 @@ get_new_active_ppa:
 	ldrh	w0, [x20, #:lo12:.LANCHOR52]
 	strh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
-.L1719:
+.L1747:
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bne	.L1708
+	bne	.L1736
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1708
-	mov	w2, 3353
-	adrp	x1, .LANCHOR208
+	cbz	w0, .L1736
+	mov	w2, 3379
+	adrp	x1, .LANCHOR209
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR208
+	add	x1, x1, :lo12:.LANCHOR209
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -11773,7 +11866,7 @@ get_new_active_ppa:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1708:
+.L1736:
 	mov	w0, w22
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -11787,112 +11880,111 @@ get_new_active_ppa:
 	.global	FtlVpcTblFlush
 	.type	FtlVpcTblFlush, %function
 FtlVpcTblFlush:
-	stp	x29, x30, [sp, -112]!
+	stp	x29, x30, [sp, -128]!
+	adrp	x0, .LANCHOR76
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR76
+	ldr	w1, [x0, #:lo12:.LANCHOR76]
 	stp	x19, x20, [sp, 16]
-	ldr	w0, [x24, #:lo12:.LANCHOR76]
 	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	str	x24, [x29, 104]
-	cbnz	w0, .L1733
-	adrp	x26, .LANCHOR188
-	adrp	x28, .LANCHOR202
-	adrp	x23, .LANCHOR209
-	add	x21, x28, :lo12:.LANCHOR202
-	ldr	x20, [x26, #:lo12:.LANCHOR188]
-	adrp	x25, .LANCHOR183
-	ldrh	w2, [x23, #:lo12:.LANCHOR209]
-	add	x1, x23, :lo12:.LANCHOR209
-	ldr	x0, [x25, #:lo12:.LANCHOR183]
+	str	x0, [x29, 112]
+	cbnz	w1, .L1761
+	adrp	x25, .LANCHOR188
+	adrp	x27, .LANCHOR210
+	adrp	x23, .LANCHOR183
+	adrp	x20, .LANCHOR203
+	ldr	x19, [x25, #:lo12:.LANCHOR188]
+	add	x22, x20, :lo12:.LANCHOR203
+	ldr	x0, [x23, #:lo12:.LANCHOR183]
+	add	x1, x27, :lo12:.LANCHOR210
+	ldrh	w2, [x27, #:lo12:.LANCHOR210]
 	mov	w3, 19539
-	stp	x0, x20, [x21, 8]
+	stp	x0, x19, [x22, 8]
 	movk	w3, 0x4654, lsl 16
-	strh	w2, [x20, 2]
+	strh	w2, [x19, 2]
 	mov	w2, -3932
-	strh	w2, [x20]
-	adrp	x22, .LANCHOR159
+	strh	w2, [x19]
+	adrp	x24, .LANCHOR159
 	ldr	w2, [x1, 8]
-	adrp	x27, .LANCHOR40
+	adrp	x26, .LANCHOR57
 	ldrh	w1, [x1, 6]
-	stp	w2, wzr, [x20, 4]
+	stp	w2, wzr, [x19, 4]
 	adrp	x2, .LANCHOR80
-	add	x19, x2, :lo12:.LANCHOR80
-	str	wzr, [x20, 12]
+	add	x21, x2, :lo12:.LANCHOR80
+	str	wzr, [x19, 12]
 	str	w3, [x2, #:lo12:.LANCHOR80]
-	mov	w2, 83
+	mov	w2, 86
 	movk	w2, 0x5000, lsl 16
-	strh	w1, [x19, 8]
+	strh	w1, [x21, 8]
 	adrp	x1, .LANCHOR45
-	str	w2, [x19, 4]
+	str	w2, [x21, 4]
 	adrp	x2, .LANCHOR91
 	ldrh	w1, [x1, #:lo12:.LANCHOR45]
-	strb	w1, [x19, 10]
+	strb	w1, [x21, 10]
 	add	x1, x2, :lo12:.LANCHOR91
 	ldrh	w2, [x2, #:lo12:.LANCHOR91]
-	strh	w2, [x19, 14]
+	strh	w2, [x21, 14]
 	ldrb	w3, [x1, 6]
 	ldrh	w2, [x1, 2]
 	ldrb	w1, [x1, 8]
-	strb	w1, [x19, 11]
+	strb	w1, [x21, 11]
 	orr	w2, w3, w2, lsl 6
-	strh	w2, [x19, 16]
+	strh	w2, [x21, 16]
 	adrp	x2, .LANCHOR92
 	add	x1, x2, :lo12:.LANCHOR92
 	ldrh	w2, [x2, #:lo12:.LANCHOR92]
 	ldrb	w3, [x1, 6]
-	strh	w2, [x19, 18]
+	strh	w2, [x21, 18]
 	ldrh	w2, [x1, 2]
 	ldrb	w1, [x1, 8]
-	strb	w1, [x19, 12]
+	strb	w1, [x21, 12]
 	orr	w2, w3, w2, lsl 6
-	strh	w2, [x19, 20]
+	strh	w2, [x21, 20]
 	adrp	x2, .LANCHOR93
 	add	x1, x2, :lo12:.LANCHOR93
 	ldrh	w2, [x2, #:lo12:.LANCHOR93]
-	strh	w2, [x19, 22]
+	strh	w2, [x21, 22]
 	ldrb	w3, [x1, 6]
 	ldrh	w2, [x1, 2]
 	ldrb	w1, [x1, 8]
-	strb	w1, [x19, 13]
+	strb	w1, [x21, 13]
 	adrp	x1, .LANCHOR167
 	orr	w2, w3, w2, lsl 6
-	strh	w2, [x19, 24]
+	strh	w2, [x21, 24]
 	ldr	w1, [x1, #:lo12:.LANCHOR167]
-	str	w1, [x19, 32]
-	ldr	w1, [x22, #:lo12:.LANCHOR159]
-	str	w1, [x19, 40]
+	str	w1, [x21, 32]
+	ldr	w1, [x24, #:lo12:.LANCHOR159]
+	str	w1, [x21, 40]
 	adrp	x1, .LANCHOR160
+	ldrh	w2, [x26, #:lo12:.LANCHOR57]
 	ldr	w1, [x1, #:lo12:.LANCHOR160]
-	str	w1, [x19, 36]
+	str	w1, [x21, 36]
 	adrp	x1, .LANCHOR112
 	ldrh	w1, [x1, #:lo12:.LANCHOR112]
-	strh	w1, [x19, 44]
+	strh	w1, [x21, 44]
 	adrp	x1, .LANCHOR113
 	ldrh	w1, [x1, #:lo12:.LANCHOR113]
-	strh	w1, [x19, 46]
-	adrp	x1, .LANCHOR57
-	ldrh	w2, [x1, #:lo12:.LANCHOR57]
+	strh	w1, [x21, 46]
 	mov	w1, 255
 	bl	ftl_memset
-	ldr	x0, [x21, 8]
-	mov	x1, x19
+	ldr	x0, [x22, 8]
+	mov	x1, x21
 	mov	w2, 48
-	mov	x19, x28
+	adrp	x21, .LANCHOR40
 	bl	ftl_memcpy
 	adrp	x1, .LANCHOR83
-	ldrh	w2, [x27, #:lo12:.LANCHOR40]
-	ldr	x0, [x21, 8]
+	ldrh	w2, [x21, #:lo12:.LANCHOR40]
+	ldr	x0, [x22, 8]
 	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	lsl	w2, w2, 1
 	add	x0, x0, 48
 	bl	ftl_memcpy
-	ldrh	w0, [x27, #:lo12:.LANCHOR40]
-	adrp	x1, .LANCHOR0
-	ldr	x3, [x21, 8]
-	ldr	x1, [x1, #:lo12:.LANCHOR0]
+	ldrh	w0, [x21, #:lo12:.LANCHOR40]
+	adrp	x1, .LANCHOR1
+	ldr	x3, [x22, 8]
+	ldr	x1, [x1, #:lo12:.LANCHOR1]
 	lsr	w2, w0, 3
 	ubfiz	x0, x0, 1, 16
 	add	x0, x0, 48
@@ -11901,11 +11993,12 @@ FtlVpcTblFlush:
 	add	x0, x3, x0
 	bl	ftl_memcpy
 	adrp	x0, .LANCHOR69
+	str	x26, [x29, 104]
 	ldrh	w0, [x0, #:lo12:.LANCHOR69]
-	cbz	w0, .L1734
-	ldrh	w0, [x27, #:lo12:.LANCHOR40]
+	cbz	w0, .L1762
+	ldrh	w0, [x21, #:lo12:.LANCHOR40]
 	adrp	x1, .LANCHOR66
-	ldr	x3, [x21, 8]
+	ldr	x3, [x22, 8]
 	ldrh	w2, [x1, #:lo12:.LANCHOR66]
 	lsr	w1, w0, 3
 	add	w0, w1, w0, lsl 1
@@ -11916,61 +12009,73 @@ FtlVpcTblFlush:
 	and	x0, x0, 65532
 	add	x0, x3, x0
 	bl	ftl_memcpy
-.L1734:
-	add	x28, x19, :lo12:.LANCHOR202
+.L1762:
 	mov	w0, 0
-	add	x24, x23, :lo12:.LANCHOR209
 	bl	FtlUpdateVaildLpn
-	adrp	x23, .LANCHOR53
+	adrp	x0, .LANCHOR2
+	add	x22, x20, :lo12:.LANCHOR203
+	add	x0, x0, :lo12:.LANCHOR2
+	add	x28, x27, :lo12:.LANCHOR210
+	str	x0, [x29, 120]
+	adrp	x27, .LANCHOR53
 	mov	w21, 0
-	add	x23, x23, :lo12:.LANCHOR53
-	mov	w27, 65535
-	str	x23, [x29, 96]
-.L1735:
-	ldrh	w2, [x24, 2]
-	ldrh	w1, [x24]
-	ldr	x0, [x25, #:lo12:.LANCHOR183]
-	str	x0, [x28, 8]
-	ldr	x0, [x26, #:lo12:.LANCHOR188]
-	str	x0, [x28, 16]
+	add	x0, x27, :lo12:.LANCHOR53
+	mov	w26, 65535
+	str	x0, [x29, 96]
+.L1763:
+	ldrh	w2, [x28, 2]
+	ldrh	w1, [x28]
+	ldr	x0, [x23, #:lo12:.LANCHOR183]
+	str	x0, [x22, 8]
+	ldr	x0, [x25, #:lo12:.LANCHOR188]
+	str	x0, [x22, 16]
 	orr	w0, w2, w1, lsl 10
-	str	w0, [x28, 4]
-	ldrh	w0, [x23]
+	str	w0, [x22, 4]
+	ldrh	w0, [x27, #:lo12:.LANCHOR53]
 	sub	w0, w0, #1
 	cmp	w2, w0
-	blt	.L1736
-	ldrh	w27, [x24, 4]
-	strh	wzr, [x24, 2]
-	strh	w1, [x24, 4]
+	blt	.L1764
+	ldrh	w26, [x28, 4]
+	strh	wzr, [x28, 2]
+	strh	w1, [x28, 4]
 	bl	FtlFreeSysBlkQueueOut
-	ldr	w1, [x22, #:lo12:.LANCHOR159]
-	str	w1, [x24, 8]
+	ldr	w1, [x24, #:lo12:.LANCHOR159]
+	str	w1, [x28, 8]
 	add	w2, w1, 1
-	str	w2, [x22, #:lo12:.LANCHOR159]
+	str	w2, [x24, #:lo12:.LANCHOR159]
 	ubfiz	w2, w0, 10, 16
-	str	w2, [x28, 4]
-	strh	w0, [x24]
-	strh	w0, [x20, 2]
-	str	w1, [x20, 4]
-.L1736:
+	str	w2, [x22, 4]
+	strh	w0, [x28]
+	strh	w0, [x19, 2]
+	str	w1, [x19, 4]
+.L1764:
+	ldr	x0, [x29, 120]
+	ldrb	w0, [x0]
+	cbz	w0, .L1765
+	ldr	x0, [x29, 104]
+	ldrh	w1, [x0, #:lo12:.LANCHOR57]
+	ldr	x0, [x23, #:lo12:.LANCHOR183]
+	bl	js_hash
+	str	w0, [x19, 12]
+.L1765:
 	mov	w3, 1
-	mov	x0, x28
+	mov	x0, x22
 	mov	w1, w3
 	mov	w2, w3
 	bl	FlashProgPages
-	ldrh	w0, [x24, 2]
-	ldr	w1, [x28]
+	ldrh	w0, [x28, 2]
+	ldr	w1, [x22]
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	strh	w0, [x24, 2]
+	strh	w0, [x28, 2]
 	cmn	w1, #1
-	bne	.L1737
+	bne	.L1766
 	cmp	w0, 1
-	bne	.L1738
-	mov	w2, 1217
-	adrp	x1, .LANCHOR210
+	bne	.L1767
+	mov	w2, 1219
+	adrp	x1, .LANCHOR211
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR210
+	add	x1, x1, :lo12:.LANCHOR211
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -11978,49 +12083,49 @@ FtlVpcTblFlush:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1738:
-	ldrh	w0, [x24, 2]
+.L1767:
+	ldrh	w0, [x28, 2]
 	cmp	w0, 1
-	bne	.L1739
+	bne	.L1768
 	ldr	x0, [x29, 96]
 	ldrh	w0, [x0]
 	sub	w0, w0, #1
-	strh	w0, [x24, 2]
-.L1739:
+	strh	w0, [x28, 2]
+.L1768:
 	add	w21, w21, 1
 	and	w21, w21, 65535
 	cmp	w21, 3
-	bls	.L1735
-	add	x19, x19, :lo12:.LANCHOR202
+	bls	.L1763
+	add	x20, x20, :lo12:.LANCHOR203
 	mov	w2, w21
 	adrp	x0, .LC38
 	add	x0, x0, :lo12:.LC38
-	ldr	w1, [x19, 4]
+	ldr	w1, [x20, 4]
 	bl	printf
-	ldr	x1, [x29, 104]
+	ldr	x1, [x29, 112]
 	mov	w0, 1
 	str	w0, [x1, #:lo12:.LANCHOR76]
-.L1733:
+.L1761:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 112
+	ldp	x29, x30, [sp], 128
 	ret
-.L1737:
+.L1766:
 	cmp	w0, 1
-	beq	.L1735
+	beq	.L1763
 	cmp	w1, 256
-	beq	.L1735
+	beq	.L1763
 	mov	w0, 65535
-	cmp	w27, w0
-	beq	.L1733
+	cmp	w26, w0
+	beq	.L1761
 	mov	w1, 1
-	mov	w0, w27
+	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-	b	.L1733
+	b	.L1761
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
 	.section	.text.FtlSuperblockPowerLostFix,"ax",@progbits
 	.align	2
@@ -12034,16 +12139,16 @@ FtlSuperblockPowerLostFix:
 	ldr	w23, [x1, #:lo12:.LANCHOR76]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	cbnz	w23, .L1752
+	cbnz	w23, .L1784
 	adrp	x1, .LANCHOR15
 	ldrb	w1, [x1, #:lo12:.LANCHOR15]
-	cbz	w1, .L1763
+	cbz	w1, .L1795
 	ldrb	w1, [x0, 8]
 	cmp	w1, 1
-	bne	.L1763
+	bne	.L1795
 	ldrh	w21, [x0, 4]
 	mov	w23, w1
-.L1754:
+.L1786:
 	adrp	x1, .LANCHOR188
 	mov	x19, x0
 	mov	w0, -1
@@ -12067,13 +12172,13 @@ FtlSuperblockPowerLostFix:
 	mov	w1, 22136
 	movk	w1, 0x1234, lsl 16
 	str	w1, [x0, 4]
-.L1755:
+.L1787:
 	sub	w21, w21, #1
 	cmn	w21, #1
-	beq	.L1758
+	beq	.L1790
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1756
-.L1758:
+	cbnz	w0, .L1788
+.L1790:
 	ldrh	w0, [x19]
 	adrp	x1, .LANCHOR83
 	ldrh	w3, [x19, 4]
@@ -12087,21 +12192,21 @@ FtlSuperblockPowerLostFix:
 	strh	wzr, [x19, 4]
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	strh	w0, [x19, 2]
-.L1752:
+.L1784:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1763:
+.L1795:
 	mov	w21, 12
-	b	.L1754
-.L1756:
+	b	.L1786
+.L1788:
 	mov	x0, x19
 	bl	get_new_active_ppa
 	str	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L1758
+	beq	.L1790
 	ldr	w0, [x22]
 	mov	w3, 0
 	str	w0, [x20, 4]
@@ -12115,7 +12220,7 @@ FtlSuperblockPowerLostFix:
 	bl	FlashProgPages
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-	b	.L1755
+	b	.L1787
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
 	.section	.text.FtlLoadFactoryBbt,"ax",@progbits
 	.align	2
@@ -12124,8 +12229,8 @@ FtlSuperblockPowerLostFix:
 FtlLoadFactoryBbt:
 	stp	x29, x30, [sp, -112]!
 	adrp	x2, .LANCHOR183
-	adrp	x0, .LANCHOR202
-	add	x1, x0, :lo12:.LANCHOR202
+	adrp	x0, .LANCHOR203
+	add	x1, x0, :lo12:.LANCHOR203
 	add	x29, sp, 0
 	ldr	x2, [x2, #:lo12:.LANCHOR183]
 	stp	x21, x22, [sp, 32]
@@ -12147,10 +12252,10 @@ FtlLoadFactoryBbt:
 	mov	w21, 0
 	mov	w27, -1
 	str	x25, [x1, 16]
-.L1769:
+.L1801:
 	ldrh	w0, [x23]
 	cmp	w21, w0
-	bcc	.L1774
+	bcc	.L1806
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -12159,18 +12264,18 @@ FtlLoadFactoryBbt:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1774:
+.L1806:
 	ldrh	w19, [x26, #:lo12:.LANCHOR51]
-	add	x24, x22, :lo12:.LANCHOR202
+	add	x24, x22, :lo12:.LANCHOR203
 	strh	w27, [x20]
 	mov	w3, 61664
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L1770:
+.L1802:
 	ldrh	w0, [x28]
 	sub	w1, w0, #15
 	cmp	w1, w19
-	bgt	.L1772
+	bgt	.L1804
 	madd	w0, w0, w21, w19
 	mov	w2, 1
 	str	w3, [x29, 108]
@@ -12182,19 +12287,19 @@ FtlLoadFactoryBbt:
 	ldr	w0, [x24]
 	ldr	w3, [x29, 108]
 	cmn	w0, #1
-	beq	.L1771
+	beq	.L1803
 	ldrh	w0, [x25]
 	cmp	w0, w3
-	bne	.L1771
+	bne	.L1803
 	strh	w19, [x20]
-.L1772:
+.L1804:
 	add	w21, w21, 1
 	add	x20, x20, 2
-	b	.L1769
-.L1771:
+	b	.L1801
+.L1803:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L1770
+	b	.L1802
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
 	.section	.text.FtlGetLastWrittenPage,"ax",@progbits
 	.align	2
@@ -12208,10 +12313,10 @@ FtlGetLastWrittenPage:
 	mov	w23, w1
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	bne	.L1780
+	bne	.L1812
 	adrp	x1, .LANCHOR53
 	ldrh	w19, [x1, #:lo12:.LANCHOR53]
-.L1781:
+.L1813:
 	sub	w19, w19, #1
 	lsl	w21, w0, 10
 	sxth	w19, w19
@@ -12225,24 +12330,24 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 128]
 	cmn	w0, #1
-	bne	.L1782
+	bne	.L1814
 	mov	w22, 0
 	mov	w24, 2
-.L1783:
+.L1815:
 	cmp	w22, w19
-	ble	.L1786
-.L1782:
+	ble	.L1818
+.L1814:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 192
 	ret
-.L1780:
+.L1812:
 	adrp	x1, .LANCHOR52
 	ldrh	w19, [x1, #:lo12:.LANCHOR52]
-	b	.L1781
-.L1786:
+	b	.L1813
+.L1818:
 	add	w20, w22, w19
 	mov	w2, w23
 	mov	w1, 1
@@ -12254,20 +12359,20 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 128]
 	cmn	w0, #1
-	bne	.L1784
+	bne	.L1816
 	ldr	w0, [x29, 132]
 	cmn	w0, #1
-	bne	.L1784
+	bne	.L1816
 	ldr	w0, [x29, 72]
 	cmn	w0, #1
-	beq	.L1784
+	beq	.L1816
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L1783
-.L1784:
+	b	.L1815
+.L1816:
 	add	w20, w20, 1
 	sxth	w22, w20
-	b	.L1783
+	b	.L1815
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
 	.section	.text.FtlLoadBbt,"ax",@progbits
 	.align	2
@@ -12281,8 +12386,8 @@ FtlLoadBbt:
 	stp	x19, x20, [sp, 16]
 	adrp	x24, .LANCHOR51
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR202
-	add	x20, x22, :lo12:.LANCHOR202
+	adrp	x22, .LANCHOR203
+	add	x20, x22, :lo12:.LANCHOR203
 	ldr	x0, [x23, #:lo12:.LANCHOR183]
 	str	x25, [sp, 64]
 	mov	w25, 61649
@@ -12295,11 +12400,11 @@ FtlLoadBbt:
 	add	x24, x24, :lo12:.LANCHOR51
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L1792:
+.L1824:
 	ldrh	w0, [x24]
 	sub	w0, w0, #47
 	cmp	w0, w19
-	bgt	.L1795
+	bgt	.L1827
 	lsl	w0, w19, 10
 	mov	w2, 1
 	str	w0, [x20, 4]
@@ -12308,7 +12413,7 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L1793
+	bne	.L1825
 	ldr	w0, [x20, 4]
 	mov	w2, 1
 	mov	w1, w2
@@ -12316,13 +12421,13 @@ FtlLoadBbt:
 	str	w0, [x20, 4]
 	mov	x0, x20
 	bl	FlashReadPages
-.L1793:
+.L1825:
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L1794
+	beq	.L1826
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	bne	.L1794
+	bne	.L1826
 	adrp	x1, .LANCHOR74
 	add	x0, x1, :lo12:.LANCHOR74
 	strh	w19, [x1, #:lo12:.LANCHOR74]
@@ -12330,39 +12435,39 @@ FtlLoadBbt:
 	str	w1, [x0, 8]
 	ldrh	w1, [x21, 8]
 	strh	w1, [x0, 4]
-.L1795:
+.L1827:
 	adrp	x19, .LANCHOR74
 	mov	w0, 65535
 	add	x20, x19, :lo12:.LANCHOR74
 	ldrh	w1, [x19, #:lo12:.LANCHOR74]
 	cmp	w1, w0
-	beq	.L1809
+	beq	.L1841
 	ldrh	w1, [x20, 4]
 	cmp	w1, w0
-	beq	.L1799
-	add	x0, x22, :lo12:.LANCHOR202
+	beq	.L1831
+	add	x0, x22, :lo12:.LANCHOR203
 	lsl	w1, w1, 10
 	mov	w2, 1
 	str	w1, [x0, 4]
 	mov	w1, w2
 	bl	FlashReadPages
-	ldr	w0, [x22, #:lo12:.LANCHOR202]
+	ldr	w0, [x22, #:lo12:.LANCHOR203]
 	cmn	w0, #1
-	beq	.L1799
+	beq	.L1831
 	ldrh	w1, [x21]
 	mov	w0, 61649
 	cmp	w1, w0
-	bne	.L1799
+	bne	.L1831
 	ldr	w1, [x20, 8]
 	ldr	w0, [x21, 4]
 	cmp	w0, w1
-	bls	.L1799
+	bls	.L1831
 	ldrh	w1, [x20, 4]
 	str	w0, [x20, 8]
 	ldrh	w0, [x21, 8]
 	strh	w1, [x19, #:lo12:.LANCHOR74]
 	strh	w0, [x20, 4]
-.L1799:
+.L1831:
 	ldrh	w0, [x19, #:lo12:.LANCHOR74]
 	add	x24, x19, :lo12:.LANCHOR74
 	mov	w1, 1
@@ -12371,13 +12476,13 @@ FtlLoadBbt:
 	sxth	w20, w0
 	add	w0, w0, 1
 	strh	w0, [x24, 2]
-	add	x24, x22, :lo12:.LANCHOR202
-.L1801:
-	tbz	w20, #31, .L1804
-	mov	w2, 335
-	adrp	x1, .LANCHOR211
+	add	x24, x22, :lo12:.LANCHOR203
+.L1833:
+	tbz	w20, #31, .L1836
+	mov	w2, 334
+	adrp	x1, .LANCHOR212
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR211
+	add	x1, x1, :lo12:.LANCHOR212
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -12385,52 +12490,52 @@ FtlLoadBbt:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1803:
+.L1835:
 	add	x0, x19, :lo12:.LANCHOR74
 	ldrh	w1, [x21, 10]
 	strh	w1, [x0, 6]
 	mov	w1, 65535
 	ldrh	w0, [x21, 12]
 	cmp	w0, w1
-	beq	.L1806
+	beq	.L1838
 	adrp	x1, .LANCHOR37
 	ldr	w2, [x1, #:lo12:.LANCHOR37]
 	cmp	w0, w2
-	beq	.L1806
+	beq	.L1838
 	adrp	x1, .LANCHOR41
 	ldrh	w1, [x1, #:lo12:.LANCHOR41]
 	lsr	w1, w1, 2
 	cmp	w2, w1
-	bcs	.L1806
+	bcs	.L1838
 	cmp	w0, w1
-	bcs	.L1806
+	bcs	.L1838
 	bl	FtlSysBlkNumInit
-.L1806:
+.L1838:
 	add	x19, x19, :lo12:.LANCHOR74
 	adrp	x21, .LANCHOR45
 	adrp	x23, .LANCHOR123
 	add	x19, x19, 32
 	add	x21, x21, :lo12:.LANCHOR45
 	add	x23, x23, :lo12:.LANCHOR123
-	add	x22, x22, :lo12:.LANCHOR202
+	add	x22, x22, :lo12:.LANCHOR203
 	mov	w20, 0
-.L1807:
+.L1839:
 	ldrh	w0, [x21]
 	cmp	w20, w0
-	bcc	.L1808
+	bcc	.L1840
 	mov	w0, 0
-.L1791:
+.L1823:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1794:
+.L1826:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L1792
-.L1804:
+	b	.L1824
+.L1836:
 	ldrh	w0, [x19, #:lo12:.LANCHOR74]
 	mov	w2, 1
 	mov	w1, w2
@@ -12442,15 +12547,15 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x24]
 	cmn	w0, #1
-	beq	.L1802
+	beq	.L1834
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	beq	.L1803
-.L1802:
+	beq	.L1835
+.L1834:
 	sub	w20, w20, #1
 	sxth	w20, w20
-	b	.L1801
-.L1808:
+	b	.L1833
+.L1840:
 	ldrh	w2, [x23]
 	ldr	x0, [x22, 8]
 	mul	w1, w2, w20
@@ -12459,10 +12564,10 @@ FtlLoadBbt:
 	add	x1, x0, x1, lsl 2
 	ldr	x0, [x19], 8
 	bl	ftl_memcpy
-	b	.L1807
-.L1809:
+	b	.L1839
+.L1841:
 	mov	w0, -1
-	b	.L1791
+	b	.L1823
 	.size	FtlLoadBbt, .-FtlLoadBbt
 	.section	.text.ftl_map_blk_gc,"ax",@progbits
 	.align	2
@@ -12485,12 +12590,12 @@ ftl_map_blk_gc:
 	ldrh	w2, [x19, 8]
 	sub	w1, w1, #4
 	cmp	w2, w1
-	blt	.L1822
+	blt	.L1854
 	ubfiz	x0, x0, 1, 16
 	ldrh	w21, [x20, x0]
-	cbz	w21, .L1822
+	cbz	w21, .L1854
 	ldr	w1, [x19, 52]
-	cbnz	w1, .L1822
+	cbnz	w1, .L1854
 	mov	w1, 1
 	str	w1, [x19, 52]
 	strh	wzr, [x20, x0]
@@ -12500,41 +12605,41 @@ ftl_map_blk_gc:
 	strh	w0, [x19, 8]
 	ldrh	w0, [x25, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bcc	.L1823
+	bcc	.L1855
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L1823:
-	adrp	x22, .LANCHOR202
-	adrp	x24, .LANCHOR212
+.L1855:
+	adrp	x22, .LANCHOR203
+	adrp	x24, .LANCHOR213
 	mov	x23, x22
-	add	x27, x22, :lo12:.LANCHOR202
-	add	x24, x24, :lo12:.LANCHOR212
+	add	x27, x22, :lo12:.LANCHOR203
+	add	x24, x24, :lo12:.LANCHOR213
 	mov	w20, 0
-.L1824:
+.L1856:
 	ldrh	w0, [x19, 6]
 	cmp	w0, w20
-	bhi	.L1830
+	bhi	.L1862
 	mov	w1, 1
 	mov	w0, w21
 	bl	FtlFreeSysBlkQueueIn
 	str	wzr, [x19, 52]
-.L1822:
+.L1854:
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x25, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bcc	.L1828
+	bcc	.L1860
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-	b	.L1828
-.L1830:
+	b	.L1860
+.L1862:
 	ubfiz	x0, x20, 2, 16
 	add	x1, x26, x0
 	str	x1, [x29, 104]
 	ldr	w1, [x26, x0]
 	cmp	w21, w1, lsr 10
-	bne	.L1825
+	bne	.L1857
 	adrp	x2, .LANCHOR184
-	add	x0, x22, :lo12:.LANCHOR202
+	add	x0, x22, :lo12:.LANCHOR203
 	ldr	x2, [x2, #:lo12:.LANCHOR184]
 	str	x2, [x0, 8]
 	adrp	x2, .LANCHOR188
@@ -12546,7 +12651,7 @@ ftl_map_blk_gc:
 	bl	FlashReadPages
 	ldrh	w0, [x28, 8]
 	cmp	w0, w20
-	beq	.L1826
+	beq	.L1858
 	mov	w2, 661
 	mov	x1, x24
 	adrp	x0, .LC5
@@ -12557,14 +12662,14 @@ ftl_map_blk_gc:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1826:
+.L1858:
 	ldr	w0, [x27]
 	ldrh	w2, [x28, 8]
 	cmn	w0, #1
-	bne	.L1827
-.L1829:
+	bne	.L1859
+.L1861:
 	ldr	x0, [x29, 104]
-	add	x23, x23, :lo12:.LANCHOR202
+	add	x23, x23, :lo12:.LANCHOR203
 	str	wzr, [x0]
 	adrp	x0, .LC39
 	add	x0, x0, :lo12:.LC39
@@ -12573,7 +12678,7 @@ ftl_map_blk_gc:
 	adrp	x0, .LANCHOR76
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR76]
-.L1828:
+.L1860:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -12582,21 +12687,21 @@ ftl_map_blk_gc:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1827:
+.L1859:
 	cmp	w2, w20
-	bne	.L1829
+	bne	.L1861
 	ldrh	w1, [x28]
 	ldrh	w0, [x19, 4]
 	cmp	w1, w0
-	bne	.L1829
+	bne	.L1861
 	ldr	x2, [x27, 8]
 	mov	w1, w20
 	mov	x0, x19
 	bl	FtlMapWritePage
-.L1825:
+.L1857:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L1824
+	b	.L1856
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
 	.section	.text.Ftl_write_map_blk_to_last_page,"ax",@progbits
 	.align	2
@@ -12605,7 +12710,7 @@ ftl_map_blk_gc:
 Ftl_write_map_blk_to_last_page:
 	adrp	x1, .LANCHOR76
 	ldr	w1, [x1, #:lo12:.LANCHOR76]
-	cbnz	w1, .L1850
+	cbnz	w1, .L1882
 	stp	x29, x30, [sp, -64]!
 	mov	w1, 65535
 	add	x29, sp, 0
@@ -12616,13 +12721,13 @@ Ftl_write_map_blk_to_last_page:
 	stp	x23, x24, [sp, 48]
 	cmp	w0, w1
 	ldr	x20, [x19, 16]
-	bne	.L1837
+	bne	.L1869
 	ldrh	w0, [x19, 8]
-	cbz	w0, .L1838
+	cbz	w0, .L1870
 	mov	w2, 697
-	adrp	x1, .LANCHOR213
+	adrp	x1, .LANCHOR214
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR213
+	add	x1, x1, :lo12:.LANCHOR214
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -12630,7 +12735,7 @@ Ftl_write_map_blk_to_last_page:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1838:
+.L1870:
 	ldrh	w0, [x19, 8]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
@@ -12641,18 +12746,18 @@ Ftl_write_map_blk_to_last_page:
 	add	w0, w0, 1
 	strh	wzr, [x19]
 	str	w0, [x19, 48]
-.L1836:
+.L1868:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1837:
+.L1869:
 	ubfiz	x0, x0, 1, 16
 	adrp	x2, .LANCHOR188
-	adrp	x21, .LANCHOR202
-	add	x1, x21, :lo12:.LANCHOR202
+	adrp	x21, .LANCHOR203
+	add	x1, x21, :lo12:.LANCHOR203
 	adrp	x24, .LANCHOR183
 	ldr	x23, [x19, 40]
 	ldrh	w22, [x20, x0]
@@ -12679,34 +12784,34 @@ Ftl_write_map_blk_to_last_page:
 	mov	x1, 0
 	ldr	x3, [x24, #:lo12:.LANCHOR183]
 	mov	w0, 0
-.L1839:
+.L1871:
 	cmp	w4, w1, uxth
-	bhi	.L1841
-	adrp	x0, .LANCHOR1
-	ldrb	w0, [x0, #:lo12:.LANCHOR1]
-	cbz	w0, .L1842
-	add	x0, x21, :lo12:.LANCHOR202
+	bhi	.L1873
+	adrp	x0, .LANCHOR2
+	ldrb	w0, [x0, #:lo12:.LANCHOR2]
+	cbz	w0, .L1874
+	add	x0, x21, :lo12:.LANCHOR203
 	adrp	x1, .LANCHOR57
 	ldrh	w1, [x1, #:lo12:.LANCHOR57]
 	ldr	x0, [x0, 8]
 	bl	js_hash
 	str	w0, [x20, 12]
-.L1842:
+.L1874:
 	mov	w2, 1
 	mov	w3, 0
 	mov	w1, w2
-	add	x0, x21, :lo12:.LANCHOR202
+	add	x0, x21, :lo12:.LANCHOR203
 	bl	FlashProgPages
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-	b	.L1836
-.L1841:
+	b	.L1868
+.L1873:
 	ldr	w2, [x23, x1, lsl 2]
 	cmp	w22, w2, lsr 10
-	bne	.L1840
+	bne	.L1872
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	ubfiz	x2, x0, 1, 16
@@ -12714,10 +12819,10 @@ Ftl_write_map_blk_to_last_page:
 	add	x2, x2, 1
 	ldr	w5, [x23, x1, lsl 2]
 	str	w5, [x3, x2, lsl 2]
-.L1840:
+.L1872:
 	add	x1, x1, 1
-	b	.L1839
-.L1850:
+	b	.L1871
+.L1882:
 	mov	w0, 0
 	ret
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
@@ -12736,13 +12841,13 @@ FtlMapWritePage:
 	mov	w25, w1
 	stp	x21, x22, [sp, 32]
 	mov	x27, x0
-	adrp	x22, .LANCHOR202
+	adrp	x22, .LANCHOR203
 	stp	x23, x24, [sp, 48]
 	mov	x20, x22
-	add	x23, x22, :lo12:.LANCHOR202
+	add	x23, x22, :lo12:.LANCHOR203
 	add	x28, x26, :lo12:.LANCHOR53
 	str	x2, [x29, 104]
-.L1854:
+.L1886:
 	adrp	x1, .LANCHOR165
 	ldr	w0, [x1, #:lo12:.LANCHOR165]
 	add	w0, w0, 1
@@ -12751,26 +12856,26 @@ FtlMapWritePage:
 	ldrh	w1, [x27, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	bge	.L1855
+	bge	.L1887
 	ldrh	w1, [x27]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1856
-.L1855:
+	bne	.L1888
+.L1887:
 	mov	x0, x27
 	bl	Ftl_write_map_blk_to_last_page
-.L1856:
+.L1888:
 	adrp	x21, .LANCHOR76
 	ldr	w0, [x21, #:lo12:.LANCHOR76]
-	cbnz	w0, .L1871
+	cbnz	w0, .L1903
 	ldrh	w1, [x27]
 	ldr	x0, [x27, 16]
 	ldrh	w0, [x0, x1, lsl 1]
-	cbnz	w0, .L1858
+	cbnz	w0, .L1890
 	mov	w2, 759
-	adrp	x1, .LANCHOR214
+	adrp	x1, .LANCHOR215
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR214
+	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -12778,15 +12883,15 @@ FtlMapWritePage:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1858:
+.L1890:
 	ldrh	w1, [x27]
 	ldrh	w0, [x27, 10]
 	cmp	w1, w0
-	bcc	.L1859
+	bcc	.L1891
 	mov	w2, 760
-	adrp	x1, .LANCHOR214
+	adrp	x1, .LANCHOR215
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR214
+	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -12794,9 +12899,9 @@ FtlMapWritePage:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1859:
+.L1891:
 	ldrh	w1, [x27]
-	add	x3, x22, :lo12:.LANCHOR202
+	add	x3, x22, :lo12:.LANCHOR203
 	ldr	x0, [x27, 16]
 	mov	w2, 16
 	str	x3, [x29, 96]
@@ -12817,17 +12922,17 @@ FtlMapWritePage:
 	str	w0, [x6, 4]
 	ldrh	w0, [x27, 4]
 	strh	w0, [x6]
-	adrp	x0, .LANCHOR1
+	adrp	x0, .LANCHOR2
 	strh	w25, [x6, 8]
 	strh	w24, [x6, 2]
-	ldrb	w0, [x0, #:lo12:.LANCHOR1]
-	cbz	w0, .L1860
+	ldrb	w0, [x0, #:lo12:.LANCHOR2]
+	cbz	w0, .L1892
 	adrp	x0, .LANCHOR57
 	ldrh	w1, [x0, #:lo12:.LANCHOR57]
 	ldr	x0, [x3, 8]
 	bl	js_hash
 	str	w0, [x6, 12]
-.L1860:
+.L1892:
 	mov	w3, 1
 	mov	x0, x23
 	mov	w1, w3
@@ -12839,7 +12944,7 @@ FtlMapWritePage:
 	and	w0, w0, 65535
 	strh	w0, [x27, 2]
 	cmn	w1, #1
-	bne	.L1861
+	bne	.L1893
 	ldr	w1, [x23, 4]
 	adrp	x0, .LC40
 	add	x0, x0, :lo12:.LC40
@@ -12848,14 +12953,14 @@ FtlMapWritePage:
 	bl	printf
 	ldrh	w0, [x27, 2]
 	cmp	w0, 2
-	bhi	.L1862
+	bhi	.L1894
 	ldrh	w0, [x28]
 	sub	w0, w0, #1
 	strh	w0, [x27, 2]
-.L1862:
+.L1894:
 	cmp	w19, 3
-	bls	.L1854
-	add	x20, x20, :lo12:.LANCHOR202
+	bls	.L1886
+	add	x20, x20, :lo12:.LANCHOR203
 	mov	w2, w19
 	adrp	x0, .LC41
 	add	x0, x0, :lo12:.LC41
@@ -12863,7 +12968,7 @@ FtlMapWritePage:
 	bl	printf
 	mov	w0, 1
 	str	w0, [x21, #:lo12:.LANCHOR76]
-.L1871:
+.L1903:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -12872,28 +12977,28 @@ FtlMapWritePage:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1861:
-	cbz	w1, .L1864
+.L1893:
+	cbz	w1, .L1896
 	strh	w24, [x27, 60]
 	cmp	w0, 1
-	bne	.L1865
-.L1866:
+	bne	.L1897
+.L1898:
 	str	wzr, [x27, 56]
-	b	.L1854
-.L1865:
+	b	.L1886
+.L1897:
 	cmp	w1, 256
-.L1879:
-	beq	.L1866
+.L1911:
+	beq	.L1898
 	ldr	w0, [x27, 56]
-	cbnz	w0, .L1866
-	add	x20, x20, :lo12:.LANCHOR202
+	cbnz	w0, .L1898
+	add	x20, x20, :lo12:.LANCHOR203
 	ldr	x0, [x27, 40]
 	ldr	w1, [x20, 4]
 	str	w1, [x0, w25, uxtw 2]
-	b	.L1871
-.L1864:
+	b	.L1903
+.L1896:
 	cmp	w0, 1
-	b	.L1879
+	b	.L1911
 	.size	FtlMapWritePage, .-FtlMapWritePage
 	.section	.text.flush_l2p_region,"ax",@progbits
 	.align	2
@@ -12935,27 +13040,27 @@ l2p_flush:
 	str	x21, [sp, 32]
 	mov	w19, 0
 	adrp	x21, .LANCHOR96
-.L1883:
+.L1915:
 	ldrh	w0, [x20]
 	cmp	w0, w19
-	bhi	.L1885
+	bhi	.L1917
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1885:
+.L1917:
 	ldr	x1, [x21, #:lo12:.LANCHOR96]
 	ubfiz	x0, x19, 4, 16
 	add	x0, x1, x0
 	ldr	w0, [x0, 4]
-	tbz	w0, #31, .L1884
+	tbz	w0, #31, .L1916
 	mov	w0, w19
 	bl	flush_l2p_region
-.L1884:
+.L1916:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1883
+	b	.L1915
 	.size	l2p_flush, .-l2p_flush
 	.section	.text.FtlVendorPartWrite,"ax",@progbits
 	.align	2
@@ -12975,7 +13080,7 @@ FtlVendorPartWrite:
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	cmp	w1, w0
-	bhi	.L1895
+	bhi	.L1927
 	adrp	x0, .LANCHOR56
 	adrp	x26, .LANCHOR55
 	adrp	x27, .LANCHOR57
@@ -12985,9 +13090,9 @@ FtlVendorPartWrite:
 	add	x27, x27, :lo12:.LANCHOR57
 	mov	w24, 0
 	lsr	w21, w22, w21
-.L1889:
-	cbnz	w20, .L1894
-.L1887:
+.L1921:
+	cbnz	w20, .L1926
+.L1919:
 	mov	w0, w24
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -12996,7 +13101,7 @@ FtlVendorPartWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1894:
+.L1926:
 	ldrh	w1, [x26]
 	adrp	x0, .LANCHOR194
 	adrp	x28, .LANCHOR185
@@ -13009,9 +13114,9 @@ FtlVendorPartWrite:
 	and	w19, w19, 65535
 	cmp	w20, w19
 	csel	w19, w0, w19, cc
-	cbz	w2, .L1891
+	cbz	w2, .L1923
 	cmp	w19, w1
-	beq	.L1891
+	beq	.L1923
 	ldr	x0, [x28, #:lo12:.LANCHOR185]
 	str	w2, [x29, 124]
 	mov	w2, 1
@@ -13019,7 +13124,7 @@ FtlVendorPartWrite:
 	mov	w1, w2
 	add	x0, x29, 120
 	bl	FlashReadPages
-.L1892:
+.L1924:
 	lsl	w3, w19, 9
 	ldr	x0, [x28, #:lo12:.LANCHOR185]
 	lsl	w23, w23, 7
@@ -13030,8 +13135,8 @@ FtlVendorPartWrite:
 	bl	ftl_memcpy
 	ldr	x2, [x28, #:lo12:.LANCHOR185]
 	mov	w1, w21
-	adrp	x0, .LANCHOR215
-	add	x0, x0, :lo12:.LANCHOR215
+	adrp	x0, .LANCHOR216
+	add	x0, x0, :lo12:.LANCHOR216
 	sub	w20, w20, w19
 	add	w22, w22, w19
 	add	w21, w21, 1
@@ -13040,16 +13145,16 @@ FtlVendorPartWrite:
 	ldr	w3, [x29, 108]
 	csinv	w24, w24, wzr, ne
 	add	x25, x25, x3, sxtw
-	b	.L1889
-.L1891:
+	b	.L1921
+.L1923:
 	ldrh	w2, [x27]
 	mov	w1, 0
 	ldr	x0, [x28, #:lo12:.LANCHOR185]
 	bl	ftl_memset
-	b	.L1892
-.L1895:
+	b	.L1924
+.L1927:
 	mov	w24, -1
-	b	.L1887
+	b	.L1919
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.section	.text.Ftl_save_ext_data,"ax",@progbits
 	.align	2
@@ -13062,16 +13167,16 @@ Ftl_save_ext_data:
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1900
-	mov	w0, 83
+	bne	.L1932
+	mov	w0, 86
 	mov	w1, 1
 	movk	w0, 0x5000, lsl 16
 	str	w0, [x2, 4]
-	adrp	x0, .LANCHOR216
-	ldr	w0, [x0, #:lo12:.LANCHOR216]
-	str	w0, [x2, 88]
 	adrp	x0, .LANCHOR217
 	ldr	w0, [x0, #:lo12:.LANCHOR217]
+	str	w0, [x2, 88]
+	adrp	x0, .LANCHOR218
+	ldr	w0, [x0, #:lo12:.LANCHOR218]
 	str	w0, [x2, 92]
 	adrp	x0, .LANCHOR161
 	ldr	w0, [x0, #:lo12:.LANCHOR161]
@@ -13111,7 +13216,7 @@ Ftl_save_ext_data:
 	str	w0, [x2, 64]
 	mov	w0, 0
 	b	FtlVendorPartWrite
-.L1900:
+.L1932:
 	ret
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
 	.section	.text.FtlEctTblFlush,"ax",@progbits
@@ -13121,31 +13226,31 @@ Ftl_save_ext_data:
 FtlEctTblFlush:
 	adrp	x1, .LANCHOR28
 	ldr	w1, [x1, #:lo12:.LANCHOR28]
-	cbz	w1, .L1907
+	cbz	w1, .L1939
 	adrp	x1, .LANCHOR170
 	mov	w2, 4
 	ldr	w1, [x1, #:lo12:.LANCHOR170]
 	cmp	w1, 39
 	mov	w1, 32
 	csel	w1, w1, w2, hi
-.L1903:
-	adrp	x3, .LANCHOR218
-	ldrh	w2, [x3, #:lo12:.LANCHOR218]
+.L1935:
+	adrp	x3, .LANCHOR219
+	ldrh	w2, [x3, #:lo12:.LANCHOR219]
 	cmp	w2, 31
-	bhi	.L1904
+	bhi	.L1936
 	add	w2, w2, 1
 	mov	w1, 1
-	strh	w2, [x3, #:lo12:.LANCHOR218]
-.L1904:
+	strh	w2, [x3, #:lo12:.LANCHOR219]
+.L1936:
 	adrp	x2, .LANCHOR191
-	cbnz	w0, .L1905
+	cbnz	w0, .L1937
 	ldr	x0, [x2, #:lo12:.LANCHOR191]
 	ldr	w3, [x0, 20]
 	ldr	w0, [x0, 16]
 	add	w1, w1, w3
 	cmp	w0, w1
-	bcc	.L1910
-.L1905:
+	bcc	.L1942
+.L1937:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	ldr	x2, [x2, #:lo12:.LANCHOR191]
@@ -13168,10 +13273,10 @@ FtlEctTblFlush:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1907:
+.L1939:
 	mov	w1, 32
-	b	.L1903
-.L1910:
+	b	.L1935
+.L1942:
 	mov	w0, 0
 	ret
 	.size	FtlEctTblFlush, .-FtlEctTblFlush
@@ -13189,11 +13294,11 @@ allocate_new_data_superblock:
 	str	x21, [sp, 32]
 	ldrh	w0, [x0, #:lo12:.LANCHOR40]
 	cmp	w0, w20
-	bcs	.L1913
-	mov	w2, 3264
-	adrp	x1, .LANCHOR219
+	bcs	.L1945
+	mov	w2, 3290
+	adrp	x1, .LANCHOR220
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR219
+	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -13201,99 +13306,99 @@ allocate_new_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1913:
+.L1945:
 	adrp	x0, .LANCHOR76
 	ldr	w0, [x0, #:lo12:.LANCHOR76]
-	cbnz	w0, .L1914
+	cbnz	w0, .L1946
 	mov	w0, 65535
 	cmp	w20, w0
-	beq	.L1915
+	beq	.L1947
 	adrp	x1, .LANCHOR83
 	ubfiz	x0, x20, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1916
+	cbz	w0, .L1948
 	mov	w0, w20
 	bl	INSERT_DATA_LIST
-.L1915:
+.L1947:
 	strb	wzr, [x19, 8]
 	adrp	x0, .LANCHOR92
 	add	x0, x0, :lo12:.LANCHOR92
 	cmp	x19, x0
-	beq	.L1917
+	beq	.L1949
 	adrp	x0, .LANCHOR44
 	ldrh	w1, [x0, #:lo12:.LANCHOR44]
 	cmp	w1, 1
-	beq	.L1917
+	beq	.L1949
 	adrp	x0, .LANCHOR15
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L1918
-.L1917:
+	cbz	w0, .L1950
+.L1949:
 	mov	w0, 1
 	strb	w0, [x19, 8]
-.L1919:
+.L1951:
 	adrp	x1, .LANCHOR133
 	mov	w2, 65535
 	mov	x21, x1
 	ldrh	w0, [x1, #:lo12:.LANCHOR133]
 	cmp	w0, w2
-	beq	.L1924
+	beq	.L1956
 	cmp	w20, w0
-	bne	.L1925
+	bne	.L1957
 	adrp	x2, .LANCHOR83
 	ubfiz	x1, x0, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR83]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1926
-.L1925:
+	cbz	w1, .L1958
+.L1957:
 	bl	update_vpc_list
-.L1926:
+.L1958:
 	mov	w0, -1
 	strh	w0, [x21, #:lo12:.LANCHOR133]
-.L1924:
+.L1956:
 	mov	x0, x19
 	bl	allocate_data_superblock
 	bl	l2p_flush
 	mov	w0, 0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1914:
+.L1946:
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1916:
+.L1948:
 	mov	w0, w20
 	bl	INSERT_FREE_LIST
-	b	.L1915
-.L1918:
+	b	.L1947
+.L1950:
 	adrp	x0, .LANCHOR91
 	add	x2, x0, :lo12:.LANCHOR91
 	cmp	x19, x2
-	bne	.L1919
+	bne	.L1951
 	cmp	w1, 3
-	beq	.L1921
+	beq	.L1953
 	adrp	x1, .LANCHOR158
 	ldr	w1, [x1, #:lo12:.LANCHOR158]
 	cmp	w1, 1
-	bne	.L1922
-.L1921:
+	bne	.L1954
+.L1953:
 	add	x1, x0, :lo12:.LANCHOR91
 	mov	w2, 1
 	strb	w2, [x1, 8]
-.L1922:
+.L1954:
 	adrp	x1, .LANCHOR28
 	ldr	w1, [x1, #:lo12:.LANCHOR28]
-	cbz	w1, .L1919
+	cbz	w1, .L1951
 	adrp	x1, .LANCHOR170
 	ldr	w1, [x1, #:lo12:.LANCHOR170]
 	cmp	w1, 39
-	bhi	.L1919
+	bhi	.L1951
 	add	x0, x0, :lo12:.LANCHOR91
 	mov	w1, 1
 	strb	w1, [x0, 8]
-	b	.L1919
+	b	.L1951
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
 	.section	.text.FtlVendorPartRead,"ax",@progbits
 	.align	2
@@ -13313,7 +13418,7 @@ FtlVendorPartRead:
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	cmp	w1, w0
-	bhi	.L1949
+	bhi	.L1981
 	adrp	x0, .LANCHOR56
 	adrp	x26, .LANCHOR185
 	mov	x25, x2
@@ -13324,9 +13429,9 @@ FtlVendorPartRead:
 	add	x0, x0, :lo12:.LANCHOR55
 	str	x0, [x29, 104]
 	lsr	w20, w22, w20
-.L1942:
-	cbnz	w21, .L1948
-.L1940:
+.L1974:
+	cbnz	w21, .L1980
+.L1972:
 	mov	w0, w24
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -13335,7 +13440,7 @@ FtlVendorPartRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1948:
+.L1980:
 	adrp	x0, .LANCHOR194
 	ldr	x0, [x0, #:lo12:.LANCHOR194]
 	ldr	w3, [x0, w20, uxtw 2]
@@ -13349,7 +13454,7 @@ FtlVendorPartRead:
 	cmp	w21, w19
 	csel	w19, w0, w19, cc
 	lsl	w27, w19, 9
-	cbz	w3, .L1944
+	cbz	w3, .L1976
 	ldr	x0, [x26, #:lo12:.LANCHOR185]
 	mov	w2, 1
 	str	w3, [x29, 100]
@@ -13361,43 +13466,43 @@ FtlVendorPartRead:
 	ldr	w0, [x29, 120]
 	ldr	w3, [x29, 100]
 	cmn	w0, #1
-	adrp	x0, .LANCHOR202
+	adrp	x0, .LANCHOR203
 	csinv	w24, w24, wzr, ne
-	ldr	w0, [x0, #:lo12:.LANCHOR202]
+	ldr	w0, [x0, #:lo12:.LANCHOR203]
 	cmp	w0, 256
-	bne	.L1946
+	bne	.L1978
 	mov	w2, w3
 	mov	w1, w20
 	adrp	x0, .LC42
 	add	x0, x0, :lo12:.LC42
 	bl	printf
 	ldr	x2, [x26, #:lo12:.LANCHOR185]
-	adrp	x0, .LANCHOR215
+	adrp	x0, .LANCHOR216
 	mov	w1, w20
-	add	x0, x0, :lo12:.LANCHOR215
+	add	x0, x0, :lo12:.LANCHOR216
 	bl	FtlMapWritePage
-.L1946:
+.L1978:
 	ldr	x1, [x28, #:lo12:.LANCHOR185]
 	lsl	w23, w23, 7
 	mov	w2, w27
 	mov	x0, x25
 	add	x1, x1, x23, sxtw 2
 	bl	ftl_memcpy
-.L1947:
+.L1979:
 	add	w20, w20, 1
 	sub	w21, w21, w19
 	add	w22, w22, w19
 	add	x25, x25, x27, sxtw
-	b	.L1942
-.L1944:
+	b	.L1974
+.L1976:
 	mov	w2, w27
 	mov	w1, 0
 	mov	x0, x25
 	bl	ftl_memset
-	b	.L1947
-.L1949:
+	b	.L1979
+.L1981:
 	mov	w24, -1
-	b	.L1940
+	b	.L1972
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
 	.section	.text.FtlLoadEctTbl,"ax",@progbits
 	.align	2
@@ -13418,7 +13523,7 @@ FtlLoadEctTbl:
 	mov	w0, 17221
 	movk	w0, 0x4254, lsl 16
 	cmp	w1, w0
-	beq	.L1952
+	beq	.L1984
 	adrp	x1, .LC43
 	adrp	x0, .LC7
 	add	x1, x1, :lo12:.LC43
@@ -13429,7 +13534,7 @@ FtlLoadEctTbl:
 	ldrh	w2, [x20, #:lo12:.LANCHOR190]
 	lsl	w2, w2, 9
 	bl	ftl_memset
-.L1952:
+.L1984:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -13454,24 +13559,24 @@ Ftl_load_ext_data:
 	mov	w20, 19539
 	movk	w20, 0x4654, lsl 16
 	cmp	w0, w20
-	beq	.L1955
+	beq	.L1987
 	mov	w2, 512
 	mov	w1, 0
 	mov	x0, x21
 	bl	ftl_memset
 	str	w20, [x19, #:lo12:.LANCHOR138]
-.L1955:
+.L1987:
 	ldr	w1, [x19, #:lo12:.LANCHOR138]
 	add	x0, x19, :lo12:.LANCHOR138
 	cmp	w1, w20
 	adrp	x20, .LANCHOR168
-	bne	.L1956
-	adrp	x1, .LANCHOR216
-	ldr	w2, [x0, 88]
-	str	w2, [x1, #:lo12:.LANCHOR216]
+	bne	.L1988
 	adrp	x1, .LANCHOR217
-	ldr	w2, [x0, 92]
+	ldr	w2, [x0, 88]
 	str	w2, [x1, #:lo12:.LANCHOR217]
+	adrp	x1, .LANCHOR218
+	ldr	w2, [x0, 92]
+	str	w2, [x1, #:lo12:.LANCHOR218]
 	adrp	x1, .LANCHOR161
 	ldr	w2, [x0, 8]
 	str	w2, [x1, #:lo12:.LANCHOR161]
@@ -13503,7 +13608,7 @@ Ftl_load_ext_data:
 	ldr	w1, [x0, 60]
 	adrp	x0, .LANCHOR158
 	str	w1, [x0, #:lo12:.LANCHOR158]
-.L1956:
+.L1988:
 	add	x19, x19, :lo12:.LANCHOR138
 	adrp	x0, .LANCHOR157
 	str	wzr, [x0, #:lo12:.LANCHOR157]
@@ -13511,7 +13616,7 @@ Ftl_load_ext_data:
 	ldr	w1, [x19, 68]
 	movk	w0, 0x1234, lsl 16
 	cmp	w1, w0
-	bne	.L1957
+	bne	.L1989
 	adrp	x0, .LANCHOR28
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR28]
@@ -13520,7 +13625,7 @@ Ftl_load_ext_data:
 	add	x1, x1, :lo12:.LC44
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1957:
+.L1989:
 	adrp	x1, .LANCHOR167
 	adrp	x0, .LANCHOR48
 	ldr	x21, [sp, 32]
@@ -13533,8 +13638,8 @@ Ftl_load_ext_data:
 	adrp	x1, .LANCHOR40
 	ldrh	w1, [x1, #:lo12:.LANCHOR40]
 	udiv	w0, w0, w1
-	adrp	x1, .LANCHOR205
-	str	w0, [x1, #:lo12:.LANCHOR205]
+	adrp	x1, .LANCHOR206
+	str	w0, [x1, #:lo12:.LANCHOR206]
 	ret
 	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
 	.section	.text.ftl_vendor_read,"ax",@progbits
@@ -13559,7 +13664,7 @@ ftl_sys_read:
 	.type	FtlMapBlkWriteDumpData, %function
 FtlMapBlkWriteDumpData:
 	ldr	w1, [x0, 56]
-	cbz	w1, .L1975
+	cbz	w1, .L2007
 	stp	x29, x30, [sp, -80]!
 	adrp	x1, .LANCHOR76
 	add	x29, sp, 0
@@ -13571,11 +13676,11 @@ FtlMapBlkWriteDumpData:
 	str	x25, [sp, 64]
 	str	wzr, [x0, 56]
 	ldr	x25, [x0, 40]
-	cbnz	w1, .L1961
+	cbnz	w1, .L1993
 	mov	x19, x0
 	adrp	x0, .LANCHOR184
-	adrp	x23, .LANCHOR202
-	add	x21, x23, :lo12:.LANCHOR202
+	adrp	x23, .LANCHOR203
+	add	x21, x23, :lo12:.LANCHOR203
 	ldr	x0, [x0, #:lo12:.LANCHOR184]
 	mov	x22, x23
 	str	x0, [x21, 8]
@@ -13583,16 +13688,16 @@ FtlMapBlkWriteDumpData:
 	ldr	x24, [x0, #:lo12:.LANCHOR188]
 	ldrh	w0, [x19, 2]
 	str	x24, [x21, 16]
-	cbz	w0, .L1965
+	cbz	w0, .L1997
 	adrp	x1, .LANCHOR53
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	sub	w1, w1, #1
 	cmp	w0, w1
-	bge	.L1965
+	bge	.L1997
 	ldrh	w1, [x19]
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L1965
+	beq	.L1997
 	ldr	x2, [x19, 16]
 	ubfiz	x1, x1, 1, 16
 	sub	w0, w0, #1
@@ -13603,18 +13708,18 @@ FtlMapBlkWriteDumpData:
 	str	w0, [x21, 4]
 	mov	x0, x21
 	bl	FlashReadPages
-	ldr	w0, [x23, #:lo12:.LANCHOR202]
+	ldr	w0, [x23, #:lo12:.LANCHOR203]
 	cmn	w0, #1
-	beq	.L1965
+	beq	.L1997
 	ldrh	w1, [x24, 8]
 	ldr	x2, [x19, 40]
 	ubfiz	x0, x1, 2, 16
 	ldr	w2, [x2, x0]
 	ldr	w0, [x21, 4]
 	cmp	w2, w0
-	bne	.L1965
+	bne	.L1997
 	ldr	x2, [x21, 8]
-.L1978:
+.L2010:
 	mov	x0, x19
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -13622,37 +13727,37 @@ FtlMapBlkWriteDumpData:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	b	FtlMapWritePage
-.L1965:
+.L1997:
 	sub	w20, w20, #1
 	and	w20, w20, 65535
 	ubfiz	x0, x20, 2, 16
 	ldr	w1, [x25, x0]
-	add	x0, x22, :lo12:.LANCHOR202
+	add	x0, x22, :lo12:.LANCHOR203
 	str	w1, [x0, 4]
-	cbz	w1, .L1966
+	cbz	w1, .L1998
 	mov	w2, 1
 	mov	w1, w2
 	bl	FlashReadPages
-.L1967:
-	add	x22, x22, :lo12:.LANCHOR202
+.L1999:
+	add	x22, x22, :lo12:.LANCHOR203
 	mov	w1, w20
 	ldr	x2, [x22, 8]
-	b	.L1978
-.L1966:
+	b	.L2010
+.L1998:
 	adrp	x1, .LANCHOR57
 	ldr	x0, [x0, 8]
 	ldrh	w2, [x1, #:lo12:.LANCHOR57]
 	mov	w1, 255
 	bl	ftl_memset
-	b	.L1967
-.L1961:
+	b	.L1999
+.L1993:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1975:
+.L2007:
 	ret
 	.size	FtlMapBlkWriteDumpData, .-FtlMapBlkWriteDumpData
 	.section	.text.FtlScanSysBlk,"ax",@progbits
@@ -13685,7 +13790,7 @@ FtlScanSysBlk:
 	ldr	w2, [x21, #:lo12:.LANCHOR64]
 	adrp	x19, .LANCHOR61
 	adrp	x28, .LANCHOR71
-	adrp	x24, .LANCHOR209
+	adrp	x24, .LANCHOR210
 	lsl	w2, w2, 1
 	bl	ftl_memset
 	ldr	x0, [x22, #:lo12:.LANCHOR193]
@@ -13700,7 +13805,7 @@ FtlScanSysBlk:
 	bl	ftl_memset
 	mov	w2, 16
 	mov	w1, 255
-	add	x0, x24, :lo12:.LANCHOR209
+	add	x0, x24, :lo12:.LANCHOR210
 	bl	ftl_memset
 	adrp	x0, .LANCHOR40
 	stp	x22, x25, [x29, 144]
@@ -13713,12 +13818,12 @@ FtlScanSysBlk:
 	adrp	x0, .LANCHOR159
 	add	x0, x0, :lo12:.LANCHOR159
 	str	x0, [x29, 112]
-.L1980:
+.L2012:
 	ldr	x0, [x29, 120]
 	ldr	w1, [x29, 172]
 	ldrh	w0, [x0]
 	cmp	w0, w1
-	bls	.L2021
+	bls	.L2053
 	adrp	x0, .LANCHOR38
 	adrp	x25, .LANCHOR180
 	adrp	x6, .LANCHOR47
@@ -13734,14 +13839,14 @@ FtlScanSysBlk:
 	ldr	x11, [x0, #:lo12:.LANCHOR105]
 	adrp	x0, .LANCHOR58
 	ldrh	w10, [x0, #:lo12:.LANCHOR58]
-	b	.L2022
-.L1982:
+	b	.L2054
+.L2014:
 	ldrh	w1, [x29, 172]
 	ldrb	w0, [x6, x5]
 	bl	V2P_block
 	and	w4, w0, 65535
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L1981
+	cbnz	w0, .L2013
 	umaddl	x1, w22, w8, x7
 	lsl	w4, w4, 10
 	mul	w0, w22, w10
@@ -13751,19 +13856,19 @@ FtlScanSysBlk:
 	str	w4, [x1, 4]
 	add	x0, x11, x0, sxtw 2
 	stp	x12, x0, [x1, 8]
-.L1981:
+.L2013:
 	add	x5, x5, 1
-.L2022:
+.L2054:
 	cmp	w13, w5, uxth
-	bhi	.L1982
-	cbnz	w22, .L1983
-.L2020:
+	bhi	.L2014
+	cbnz	w22, .L2015
+.L2052:
 	ldr	w0, [x29, 172]
 	add	w26, w0, 1
 	and	w0, w26, 65535
 	str	w0, [x29, 172]
-	b	.L1980
-.L1983:
+	b	.L2012
+.L2015:
 	mov	w1, w22
 	mov	w2, 1
 	mov	x0, x7
@@ -13772,10 +13877,10 @@ FtlScanSysBlk:
 	umull	x0, w22, w0
 	mov	x22, 0
 	str	x0, [x29, 128]
-	adrp	x0, .LANCHOR220
-	add	x0, x0, :lo12:.LANCHOR220
+	adrp	x0, .LANCHOR221
+	add	x0, x0, :lo12:.LANCHOR221
 	str	x0, [x29, 136]
-.L2019:
+.L2051:
 	ldr	x0, [x25, #:lo12:.LANCHOR180]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
@@ -13783,10 +13888,10 @@ FtlScanSysBlk:
 	cmn	w0, #1
 	ldr	x27, [x1, 16]
 	ubfx	x26, x3, 10, 16
-	bne	.L1986
+	bne	.L2018
 	mov	w5, 16
 	mov	w7, 65535
-.L1988:
+.L2020:
 	ldr	x0, [x25, #:lo12:.LANCHOR180]
 	add	x6, x25, :lo12:.LANCHOR180
 	mov	w2, 1
@@ -13804,71 +13909,71 @@ FtlScanSysBlk:
 	ldr	w5, [x29, 168]
 	cmp	w0, w7
 	ldr	x6, [x29, 104]
-	bne	.L1985
+	bne	.L2017
 	ldr	x0, [x6]
 	mov	w1, -1
 	str	w1, [x0, x22]
 	ldr	x0, [x6]
 	ldr	w0, [x0, x22]
 	cmp	w0, w1
-	beq	.L2058
-.L1986:
+	beq	.L2090
+.L2018:
 	adrp	x0, .LANCHOR159
 	ldr	w1, [x0, #:lo12:.LANCHOR159]
 	ldr	w0, [x27, 4]
 	cmn	w1, #1
-	beq	.L1989
+	beq	.L2021
 	cmp	w1, w0
-	bhi	.L1990
-.L1989:
+	bhi	.L2022
+.L2021:
 	cmn	w0, #1
-	beq	.L1990
+	beq	.L2022
 	ldr	x2, [x29, 112]
 	add	w1, w0, 1
 	str	w1, [x2]
-.L1990:
+.L2022:
 	ldrh	w1, [x27]
 	mov	w2, 61604
 	cmp	w1, w2
-	beq	.L1992
-	bhi	.L1993
+	beq	.L2024
+	bhi	.L2025
 	mov	w0, 61574
 	cmp	w1, w0
-	beq	.L1994
-.L1991:
+	beq	.L2026
+.L2023:
 	ldr	x0, [x29, 128]
 	add	x22, x22, 56
 	cmp	x0, x22
-	bne	.L2019
-	b	.L2020
-.L1985:
+	bne	.L2051
+	b	.L2052
+.L2017:
 	ldr	x0, [x25, #:lo12:.LANCHOR180]
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	bne	.L1986
+	bne	.L2018
 	sub	w5, w5, #1
 	ands	w5, w5, 65535
-	bne	.L1988
-.L2058:
+	bne	.L2020
+.L2090:
 	mov	w1, 0
 	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-	b	.L1991
-.L1993:
+	b	.L2023
+.L2025:
 	mov	w0, 61634
 	cmp	w1, w0
-	beq	.L1995
+	beq	.L2027
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L2058
-	b	.L1991
-.L1995:
+	beq	.L2090
+	b	.L2023
+.L2027:
 	ldrh	w1, [x20, #:lo12:.LANCHOR128]
 	ldr	w0, [x21, #:lo12:.LANCHOR64]
 	cmp	w1, w0
-	bls	.L1997
+	bls	.L2029
 	ldr	x1, [x29, 136]
-	mov	w2, 1305
+	mov	w2, 1307
 	adrp	x0, .LC5
 	add	x0, x0, :lo12:.LC5
 	bl	printf
@@ -13877,7 +13982,7 @@ FtlScanSysBlk:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1997:
+.L2029:
 	ldr	w6, [x21, #:lo12:.LANCHOR64]
 	ldr	x3, [x29, 152]
 	ldrh	w1, [x20, #:lo12:.LANCHOR128]
@@ -13888,53 +13993,53 @@ FtlScanSysBlk:
 	sub	w2, w2, #1
 	ldr	x5, [x3, #:lo12:.LANCHOR130]
 	sxth	w2, w2
-.L1998:
+.L2030:
 	cmp	w0, w2
-	bgt	.L2004
-	tbz	w0, #31, .L2039
-	b	.L1991
-.L2004:
+	bgt	.L2036
+	tbz	w0, #31, .L2071
+	b	.L2023
+.L2036:
 	sxtw	x8, w0
 	ldr	w11, [x27, 4]
 	lsl	x7, x8, 2
 	add	x10, x5, x7
 	ldr	w7, [x5, x7]
 	cmp	w11, w7
-	bls	.L1999
+	bls	.L2031
 	ldr	w2, [x5]
-	cbnz	w2, .L2000
+	cbnz	w2, .L2032
 	cmp	w6, w1
-	beq	.L2000
+	beq	.L2032
 	add	w1, w1, 1
 	strh	w1, [x20, #:lo12:.LANCHOR128]
-.L2000:
+.L2032:
 	ldr	x1, [x29, 160]
 	ldr	x6, [x1, #:lo12:.LANCHOR129]
 	mov	w1, 0
-.L2001:
+.L2033:
 	cmp	w1, w0
-	bne	.L2002
+	bne	.L2034
 	ldr	w1, [x27, 4]
 	str	w1, [x10]
 	strh	w26, [x6, x8, lsl 1]
-	tbnz	w0, #31, .L1991
+	tbnz	w0, #31, .L2023
 	ldrh	w1, [x20, #:lo12:.LANCHOR128]
 	ldr	w2, [x21, #:lo12:.LANCHOR64]
 	sub	w2, w2, w1
 	sub	w2, w2, #1
 	cmp	w0, w2, sxth
-	bgt	.L1991
-.L2039:
+	bgt	.L2023
+.L2071:
 	add	w1, w1, 1
 	strh	w1, [x20, #:lo12:.LANCHOR128]
 	ldr	w1, [x27, 4]
 	str	w1, [x5, x0, lsl 2]
 	ldr	x1, [x29, 160]
 	ldr	x1, [x1, #:lo12:.LANCHOR129]
-.L2057:
+.L2089:
 	strh	w26, [x1, x0, lsl 1]
-	b	.L1991
-.L2002:
+	b	.L2023
+.L2034:
 	sxtw	x2, w1
 	add	w1, w1, 1
 	lsl	x7, x2, 2
@@ -13946,18 +14051,18 @@ FtlScanSysBlk:
 	add	x7, x6, x2
 	ldrh	w7, [x7, 2]
 	strh	w7, [x6, x2]
-	b	.L2001
-.L1999:
+	b	.L2033
+.L2031:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L1998
-.L1994:
+	b	.L2030
+.L2026:
 	ldrh	w1, [x23, #:lo12:.LANCHOR70]
 	ldrh	w0, [x19, #:lo12:.LANCHOR61]
 	cmp	w1, w0
-	bls	.L2007
+	bls	.L2039
 	ldr	x1, [x29, 136]
-	mov	w2, 1352
+	mov	w2, 1354
 	adrp	x0, .LC5
 	add	x0, x0, :lo12:.LC5
 	bl	printf
@@ -13966,7 +14071,7 @@ FtlScanSysBlk:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2007:
+.L2039:
 	ldrh	w6, [x19, #:lo12:.LANCHOR61]
 	ldrh	w2, [x23, #:lo12:.LANCHOR70]
 	sub	w1, w6, #1
@@ -13974,46 +14079,46 @@ FtlScanSysBlk:
 	sub	w5, w1, w2
 	ldr	x1, [x29, 144]
 	ldr	x1, [x1, #:lo12:.LANCHOR193]
-.L2008:
+.L2040:
 	cmp	w0, w5
-	ble	.L2013
+	ble	.L2045
 	sxtw	x7, w0
 	ldr	w11, [x27, 4]
 	lsl	x8, x7, 2
 	add	x10, x1, x8
 	ldr	w8, [x1, x8]
 	cmp	w11, w8
-	bls	.L2009
+	bls	.L2041
 	ldr	w5, [x1]
-	cbnz	w5, .L2010
+	cbnz	w5, .L2042
 	cmp	w6, w2
-	beq	.L2010
+	beq	.L2042
 	add	w2, w2, 1
 	strh	w2, [x23, #:lo12:.LANCHOR70]
-.L2010:
+.L2042:
 	ldr	x6, [x28, #:lo12:.LANCHOR71]
 	mov	w2, 0
-.L2011:
+.L2043:
 	cmp	w2, w0
-	bne	.L2012
+	bne	.L2044
 	ldr	w2, [x27, 4]
 	str	w2, [x10]
 	strh	w26, [x6, x7, lsl 1]
-.L2013:
-	tbnz	w0, #31, .L1991
+.L2045:
+	tbnz	w0, #31, .L2023
 	ldrh	w2, [x19, #:lo12:.LANCHOR61]
 	ldrh	w5, [x23, #:lo12:.LANCHOR70]
 	sub	w2, w2, #1
 	sub	w2, w2, w5
 	cmp	w0, w2, sxth
-	bgt	.L1991
+	bgt	.L2023
 	add	w5, w5, 1
 	ldr	w2, [x27, 4]
 	strh	w5, [x23, #:lo12:.LANCHOR70]
 	str	w2, [x1, x0, lsl 2]
 	ldr	x1, [x28, #:lo12:.LANCHOR71]
-	b	.L2057
-.L2012:
+	b	.L2089
+.L2044:
 	sxtw	x5, w2
 	add	w2, w2, 1
 	lsl	x8, x5, 2
@@ -14025,58 +14130,58 @@ FtlScanSysBlk:
 	add	x8, x6, x5
 	ldrh	w8, [x8, 2]
 	strh	w8, [x6, x5]
-	b	.L2011
-.L2009:
+	b	.L2043
+.L2041:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L2008
-.L1992:
-	ldrh	w5, [x24, #:lo12:.LANCHOR209]
+	b	.L2040
+.L2024:
+	ldrh	w5, [x24, #:lo12:.LANCHOR210]
 	mov	w1, 65535
-	add	x2, x24, :lo12:.LANCHOR209
+	add	x2, x24, :lo12:.LANCHOR210
 	cmp	w5, w1
-	bne	.L2015
-	strh	w26, [x24, #:lo12:.LANCHOR209]
+	bne	.L2047
+	strh	w26, [x24, #:lo12:.LANCHOR210]
 	str	w0, [x2, 8]
-	b	.L1991
-.L2015:
+	b	.L2023
+.L2047:
 	ldrh	w0, [x2, 4]
 	cmp	w0, w1
-	beq	.L2016
+	beq	.L2048
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.L2016:
-	add	x0, x24, :lo12:.LANCHOR209
+.L2048:
+	add	x0, x24, :lo12:.LANCHOR210
 	ldr	w1, [x27, 4]
 	ldr	w2, [x0, 8]
 	cmp	w2, w1
-	bcs	.L2017
-	ldrh	w2, [x24, #:lo12:.LANCHOR209]
+	bcs	.L2049
+	ldrh	w2, [x24, #:lo12:.LANCHOR210]
 	strh	w2, [x0, 4]
-	strh	w26, [x24, #:lo12:.LANCHOR209]
+	strh	w26, [x24, #:lo12:.LANCHOR210]
 	str	w1, [x0, 8]
-	b	.L1991
-.L2017:
+	b	.L2023
+.L2049:
 	strh	w26, [x0, 4]
-	b	.L1991
-.L2021:
+	b	.L2023
+.L2053:
 	ldr	x0, [x29, 160]
 	ldr	x2, [x0, #:lo12:.LANCHOR129]
 	ldrh	w0, [x2]
-	cbz	w0, .L2023
-.L2026:
+	cbz	w0, .L2055
+.L2058:
 	ldr	x1, [x28, #:lo12:.LANCHOR71]
 	ldrh	w0, [x1]
-	cbz	w0, .L2024
-.L2025:
+	cbz	w0, .L2056
+.L2057:
 	ldrh	w1, [x20, #:lo12:.LANCHOR128]
 	ldr	w0, [x21, #:lo12:.LANCHOR64]
 	cmp	w1, w0
-	bls	.L2055
-	mov	w2, 1486
-	adrp	x1, .LANCHOR220
+	bls	.L2087
+	mov	w2, 1488
+	adrp	x1, .LANCHOR221
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR220
+	add	x1, x1, :lo12:.LANCHOR221
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -14084,7 +14189,7 @@ FtlScanSysBlk:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2055:
+.L2087:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -14093,24 +14198,24 @@ FtlScanSysBlk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L2023:
+.L2055:
 	ldrh	w0, [x20, #:lo12:.LANCHOR128]
-	cbz	w0, .L2026
+	cbz	w0, .L2058
 	ldr	w1, [x21, #:lo12:.LANCHOR64]
 	mov	w0, 0
-.L2027:
+.L2059:
 	cmp	w0, w1
-	bcs	.L2026
+	bcs	.L2058
 	ldrh	w3, [x2, w0, sxtw 1]
-	cbz	w3, .L2028
+	cbz	w3, .L2060
 	ldr	x1, [x29, 152]
 	add	x7, x21, :lo12:.LANCHOR64
 	ldr	x4, [x1, #:lo12:.LANCHOR130]
 	mov	w1, w0
-.L2029:
+.L2061:
 	ldr	w3, [x7]
 	cmp	w1, w3
-	bcs	.L2026
+	bcs	.L2058
 	sxtw	x6, w1
 	sub	w3, w1, w0
 	lsl	x5, x6, 1
@@ -14122,29 +14227,29 @@ FtlScanSysBlk:
 	strh	w8, [x2, x3, lsl 1]
 	str	w6, [x4, x3, lsl 2]
 	strh	wzr, [x2, x5]
-	b	.L2029
-.L2028:
+	b	.L2061
+.L2060:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L2027
-.L2024:
+	b	.L2059
+.L2056:
 	ldrh	w0, [x23, #:lo12:.LANCHOR70]
-	cbz	w0, .L2025
+	cbz	w0, .L2057
 	ldrh	w2, [x19, #:lo12:.LANCHOR61]
 	mov	w0, 0
-.L2034:
+.L2066:
 	mov	w6, w0
 	cmp	w0, w2
-	bge	.L2025
+	bge	.L2057
 	ldrh	w3, [x1, w0, sxtw 1]
-	cbz	w3, .L2035
+	cbz	w3, .L2067
 	ldr	x2, [x29, 144]
 	add	x19, x19, :lo12:.LANCHOR61
 	ldr	x3, [x2, #:lo12:.LANCHOR193]
-.L2036:
+.L2068:
 	ldrh	w2, [x19]
 	cmp	w0, w2
-	bge	.L2025
+	bge	.L2057
 	sxtw	x5, w0
 	sub	w2, w0, w6
 	lsl	x4, x5, 1
@@ -14156,11 +14261,11 @@ FtlScanSysBlk:
 	strh	w7, [x1, x2, lsl 1]
 	str	w5, [x3, x2, lsl 2]
 	strh	wzr, [x1, x4]
-	b	.L2036
-.L2035:
+	b	.L2068
+.L2067:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L2034
+	b	.L2066
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
 	.section	.text.FtlLoadSysInfo,"ax",@progbits
 	.align	2
@@ -14172,8 +14277,8 @@ FtlLoadSysInfo:
 	stp	x23, x24, [sp, 48]
 	adrp	x23, .LANCHOR183
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR202
-	add	x0, x19, :lo12:.LANCHOR202
+	adrp	x19, .LANCHOR203
+	add	x0, x19, :lo12:.LANCHOR203
 	stp	x25, x26, [sp, 64]
 	adrp	x25, .LANCHOR188
 	stp	x21, x22, [sp, 32]
@@ -14182,7 +14287,7 @@ FtlLoadSysInfo:
 	ldr	x1, [x23, #:lo12:.LANCHOR183]
 	adrp	x22, .LANCHOR40
 	str	x1, [x0, 8]
-	adrp	x21, .LANCHOR209
+	adrp	x21, .LANCHOR210
 	ldr	x1, [x25, #:lo12:.LANCHOR188]
 	str	x1, [x0, 16]
 	ldr	x0, [x24, #:lo12:.LANCHOR83]
@@ -14190,13 +14295,13 @@ FtlLoadSysInfo:
 	ldrh	w2, [x22, #:lo12:.LANCHOR40]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	ldrh	w0, [x21, #:lo12:.LANCHOR209]
+	ldrh	w0, [x21, #:lo12:.LANCHOR210]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L2060
-.L2072:
+	bne	.L2092
+.L2104:
 	mov	w0, -1
-.L2059:
+.L2091:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -14204,24 +14309,24 @@ FtlLoadSysInfo:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2060:
-	add	x26, x21, :lo12:.LANCHOR209
+.L2092:
+	add	x26, x21, :lo12:.LANCHOR210
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
-	ldrsh	w28, [x21, #:lo12:.LANCHOR209]
+	ldrsh	w28, [x21, #:lo12:.LANCHOR210]
 	sxth	w20, w0
 	adrp	x27, .LANCHOR57
 	add	w0, w0, 1
 	add	x27, x27, :lo12:.LANCHOR57
 	strh	w0, [x26, 2]
-	adrp	x26, .LANCHOR1
-	add	x26, x26, :lo12:.LANCHOR1
-.L2062:
-	tbz	w20, #31, .L2068
-	mov	w2, 1555
-	adrp	x1, .LANCHOR221
+	adrp	x26, .LANCHOR2
+	add	x26, x26, :lo12:.LANCHOR2
+.L2094:
+	tbz	w20, #31, .L2100
+	mov	w2, 1557
+	adrp	x1, .LANCHOR222
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR221
+	add	x1, x1, :lo12:.LANCHOR222
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -14229,9 +14334,9 @@ FtlLoadSysInfo:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-	b	.L2067
-.L2068:
-	add	x3, x19, :lo12:.LANCHOR202
+	b	.L2099
+.L2100:
+	add	x3, x19, :lo12:.LANCHOR203
 	orr	w0, w20, w28, lsl 10
 	mov	w2, 1
 	str	x3, [x29, 104]
@@ -14242,57 +14347,57 @@ FtlLoadSysInfo:
 	mov	x0, x3
 	bl	FlashReadPages
 	ldrb	w0, [x26]
-	cbz	w0, .L2063
+	cbz	w0, .L2095
 	ldr	x3, [x29, 104]
 	ldr	x0, [x3, 16]
 	ldr	w6, [x0, 12]
-	cbz	w6, .L2063
+	cbz	w6, .L2095
 	ldrh	w1, [x27]
 	ldr	x0, [x3, 8]
 	bl	js_hash
 	cmp	w6, w0
-	beq	.L2063
-	cbnz	w20, .L2064
-	add	x0, x21, :lo12:.LANCHOR209
+	beq	.L2095
+	cbnz	w20, .L2096
+	add	x0, x21, :lo12:.LANCHOR210
 	ldrh	w0, [x0, 4]
 	cmp	w28, w0
-	beq	.L2064
+	beq	.L2096
 	sxth	w28, w0
 	adrp	x0, .LANCHOR53
 	ldrh	w20, [x0, #:lo12:.LANCHOR53]
-.L2066:
+.L2098:
 	sub	w20, w20, #1
 	sxth	w20, w20
-	b	.L2062
-.L2064:
+	b	.L2094
+.L2096:
 	mov	w0, -1
-	str	w0, [x19, #:lo12:.LANCHOR202]
-.L2063:
-	ldr	w0, [x19, #:lo12:.LANCHOR202]
+	str	w0, [x19, #:lo12:.LANCHOR203]
+.L2095:
+	ldr	w0, [x19, #:lo12:.LANCHOR203]
 	cmn	w0, #1
-	beq	.L2066
+	beq	.L2098
 	ldr	x0, [x23, #:lo12:.LANCHOR183]
 	mov	w1, 19539
 	movk	w1, 0x4654, lsl 16
 	ldr	w0, [x0]
 	cmp	w0, w1
-	bne	.L2066
+	bne	.L2098
 	ldr	x0, [x25, #:lo12:.LANCHOR188]
 	ldrh	w1, [x0]
 	mov	w0, 61604
 	cmp	w1, w0
-	bne	.L2066
-.L2067:
+	bne	.L2098
+.L2099:
 	adrp	x1, .LANCHOR57
 	ldrh	w0, [x22, #:lo12:.LANCHOR40]
 	ldrh	w1, [x1, #:lo12:.LANCHOR57]
 	add	x0, x0, 24
 	cmp	x1, x0, lsl 1
-	bcs	.L2070
-	mov	w2, 1557
-	adrp	x1, .LANCHOR221
+	bcs	.L2102
+	mov	w2, 1559
+	adrp	x1, .LANCHOR222
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR221
+	add	x1, x1, :lo12:.LANCHOR222
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -14300,8 +14405,8 @@ FtlLoadSysInfo:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2070:
-	add	x19, x19, :lo12:.LANCHOR202
+.L2102:
+	add	x19, x19, :lo12:.LANCHOR203
 	mov	w2, 48
 	adrp	x20, .LANCHOR80
 	add	x0, x20, :lo12:.LANCHOR80
@@ -14321,12 +14426,12 @@ FtlLoadSysInfo:
 	add	w2, w2, 4
 	and	x1, x1, -4
 	add	x1, x0, x1
-	adrp	x0, .LANCHOR0
-	ldr	x0, [x0, #:lo12:.LANCHOR0]
+	adrp	x0, .LANCHOR1
+	ldr	x0, [x0, #:lo12:.LANCHOR1]
 	bl	ftl_memcpy
 	adrp	x0, .LANCHOR69
 	ldrh	w0, [x0, #:lo12:.LANCHOR69]
-	cbz	w0, .L2071
+	cbz	w0, .L2103
 	ldrh	w1, [x22, #:lo12:.LANCHOR40]
 	adrp	x0, .LANCHOR66
 	ldrh	w2, [x0, #:lo12:.LANCHOR66]
@@ -14340,25 +14445,25 @@ FtlLoadSysInfo:
 	adrp	x0, .LANCHOR195
 	ldr	x0, [x0, #:lo12:.LANCHOR195]
 	bl	ftl_memcpy
-.L2071:
+.L2103:
 	ldr	w2, [x20, #:lo12:.LANCHOR80]
 	mov	w1, 19539
 	movk	w1, 0x4654, lsl 16
 	add	x0, x20, :lo12:.LANCHOR80
 	cmp	w2, w1
-	bne	.L2072
-	add	x21, x21, :lo12:.LANCHOR209
+	bne	.L2104
+	add	x21, x21, :lo12:.LANCHOR210
 	ldrh	w1, [x0, 8]
 	ldrb	w2, [x0, 10]
 	adrp	x0, .LANCHOR45
 	strh	w1, [x21, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR45]
 	cmp	w2, w0
-	bne	.L2072
-	adrp	x0, .LANCHOR222
+	bne	.L2104
+	adrp	x0, .LANCHOR223
 	adrp	x2, .LANCHOR72
 	adrp	x3, .LANCHOR38
-	str	w1, [x0, #:lo12:.LANCHOR222]
+	str	w1, [x0, #:lo12:.LANCHOR223]
 	adrp	x0, .LANCHOR52
 	ldrh	w3, [x3, #:lo12:.LANCHOR38]
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
@@ -14377,13 +14482,13 @@ FtlLoadSysInfo:
 	sub	w0, w2, w0
 	sub	w0, w0, w1
 	udiv	w0, w0, w3
-	adrp	x3, .LANCHOR223
-	strh	w0, [x3, #:lo12:.LANCHOR223]
-	bls	.L2073
-	mov	w2, 1584
-	adrp	x1, .LANCHOR221
+	adrp	x3, .LANCHOR224
+	strh	w0, [x3, #:lo12:.LANCHOR224]
+	bls	.L2105
+	mov	w2, 1586
+	adrp	x1, .LANCHOR222
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR221
+	add	x1, x1, :lo12:.LANCHOR222
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -14391,11 +14496,11 @@ FtlLoadSysInfo:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2073:
+.L2105:
 	add	x4, x20, :lo12:.LANCHOR80
 	adrp	x0, .LANCHOR91
 	add	x2, x0, :lo12:.LANCHOR91
-	adrp	x5, .LANCHOR204
+	adrp	x5, .LANCHOR205
 	adrp	x19, .LANCHOR92
 	mov	x22, x5
 	ldrh	w1, [x4, 16]
@@ -14406,10 +14511,10 @@ FtlLoadSysInfo:
 	strb	w1, [x2, 6]
 	ldrb	w1, [x4, 11]
 	strb	w1, [x2, 8]
-	add	x1, x5, :lo12:.LANCHOR204
+	add	x1, x5, :lo12:.LANCHOR205
 	strh	w3, [x2, 2]
 	mov	w2, -1
-	strh	w2, [x5, #:lo12:.LANCHOR204]
+	strh	w2, [x5, #:lo12:.LANCHOR205]
 	add	x2, x19, :lo12:.LANCHOR92
 	strh	wzr, [x1, 2]
 	strb	wzr, [x1, 6]
@@ -14456,46 +14561,46 @@ FtlLoadSysInfo:
 	adrp	x1, .LANCHOR159
 	ldr	w4, [x1, #:lo12:.LANCHOR159]
 	cmp	w3, w4
-	bls	.L2074
+	bls	.L2106
 	str	w3, [x1, #:lo12:.LANCHOR159]
-.L2074:
+.L2106:
 	add	x20, x20, :lo12:.LANCHOR80
 	adrp	x1, .LANCHOR160
 	ldr	w3, [x1, #:lo12:.LANCHOR160]
 	ldr	w2, [x20, 36]
 	cmp	w2, w3
-	bls	.L2075
+	bls	.L2107
 	str	w2, [x1, #:lo12:.LANCHOR160]
-.L2075:
+.L2107:
 	mov	w1, 65535
 	cmp	w6, w1
-	beq	.L2076
+	beq	.L2108
 	add	x0, x0, :lo12:.LANCHOR91
 	bl	make_superblock
-.L2076:
+.L2108:
 	ldrh	w2, [x19, #:lo12:.LANCHOR92]
 	mov	w1, 65535
 	add	x0, x19, :lo12:.LANCHOR92
 	cmp	w2, w1
-	beq	.L2077
+	beq	.L2109
 	bl	make_superblock
-.L2077:
+.L2109:
 	ldrh	w2, [x21, #:lo12:.LANCHOR93]
 	mov	w1, 65535
 	add	x0, x21, :lo12:.LANCHOR93
 	cmp	w2, w1
-	beq	.L2078
+	beq	.L2110
 	bl	make_superblock
-.L2078:
-	ldrh	w2, [x22, #:lo12:.LANCHOR204]
+.L2110:
+	ldrh	w2, [x22, #:lo12:.LANCHOR205]
 	mov	w1, 65535
-	add	x0, x22, :lo12:.LANCHOR204
+	add	x0, x22, :lo12:.LANCHOR205
 	cmp	w2, w1
-	beq	.L2079
+	beq	.L2111
 	bl	make_superblock
-.L2079:
+.L2111:
 	mov	w0, 0
-	b	.L2059
+	b	.L2091
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
 	.section	.text.FtlDumpBlockInfo,"ax",@progbits
 	.align	2
@@ -14517,9 +14622,9 @@ FtlDumpBlockInfo:
 	bl	P2V_block_in_plane
 	ldrh	w25, [x19, #:lo12:.LANCHOR52]
 	and	w21, w0, 65535
-	adrp	x1, .LANCHOR224
+	adrp	x1, .LANCHOR225
 	adrp	x0, .LC45
-	add	x1, x1, :lo12:.LANCHOR224
+	add	x1, x1, :lo12:.LANCHOR225
 	add	x0, x0, :lo12:.LC45
 	bl	printf
 	adrp	x1, .LANCHOR83
@@ -14535,16 +14640,16 @@ FtlDumpBlockInfo:
 	bl	make_superblock
 	adrp	x0, .LANCHOR15
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L2104
-	cbnz	w22, .L2104
+	cbz	w0, .L2136
+	cbnz	w22, .L2136
 	mov	w0, w21
 	bl	ftl_get_blk_mode
 	mov	w21, w0
 	cmp	w0, 1
-	bne	.L2095
+	bne	.L2127
 	adrp	x0, .LANCHOR53
 	ldrh	w25, [x0, #:lo12:.LANCHOR53]
-.L2095:
+.L2127:
 	ldrh	w3, [x19, #:lo12:.LANCHOR52]
 	adrp	x26, .LC48
 	add	x26, x26, :lo12:.LC48
@@ -14555,7 +14660,7 @@ FtlDumpBlockInfo:
 	adrp	x0, .LC47
 	add	x0, x0, :lo12:.LC47
 	bl	printf
-.L2096:
+.L2128:
 	adrp	x1, .LANCHOR104
 	adrp	x0, .LANCHOR38
 	adrp	x24, .LANCHOR180
@@ -14572,22 +14677,22 @@ FtlDumpBlockInfo:
 	adrp	x1, .LANCHOR58
 	ldrh	w10, [x1, #:lo12:.LANCHOR58]
 	mov	w1, 0
-.L2097:
+.L2129:
 	cmp	w1, w5
-	bne	.L2099
+	bne	.L2131
 	mov	w1, w19
 	umull	x19, w19, w27
 	mov	x22, 0
 	mov	w2, w21
 	bl	FlashReadPages
-.L2100:
+.L2132:
 	cmp	x22, x19
-	bne	.L2101
+	bne	.L2133
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	cmp	w25, w20
-	bne	.L2096
-.L2102:
+	bne	.L2128
+.L2134:
 	ldp	x19, x20, [sp, 32]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 48]
@@ -14597,13 +14702,13 @@ FtlDumpBlockInfo:
 	ldr	x27, [sp, 96]
 	add	sp, sp, 160
 	ret
-.L2104:
+.L2136:
 	mov	w21, 0
-	b	.L2095
-.L2099:
+	b	.L2127
+.L2131:
 	ldrh	w2, [x3]
 	cmp	w2, w11
-	beq	.L2098
+	beq	.L2130
 	umaddl	x4, w19, w27, x0
 	orr	w2, w20, w2, lsl 10
 	str	w2, [x4, 4]
@@ -14617,12 +14722,12 @@ FtlDumpBlockInfo:
 	asr	w2, w2, 2
 	add	x2, x8, x2, sxtw 2
 	str	x2, [x4, 16]
-.L2098:
+.L2130:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	and	w1, w1, 65535
-	b	.L2097
-.L2101:
+	b	.L2129
+.L2133:
 	ldr	x8, [x24, #:lo12:.LANCHOR180]
 	ldrh	w1, [x29, 96]
 	add	x2, x8, x22
@@ -14638,7 +14743,7 @@ FtlDumpBlockInfo:
 	ldr	w2, [x8, x22]
 	add	x22, x22, 56
 	bl	printf
-	b	.L2100
+	b	.L2132
 	.size	FtlDumpBlockInfo, .-FtlDumpBlockInfo
 	.section	.text.FtlScanAllBlock,"ax",@progbits
 	.align	2
@@ -14646,9 +14751,9 @@ FtlDumpBlockInfo:
 	.type	FtlScanAllBlock, %function
 FtlScanAllBlock:
 	sub	sp, sp, #144
-	adrp	x1, .LANCHOR225
+	adrp	x1, .LANCHOR226
 	adrp	x0, .LC45
-	add	x1, x1, :lo12:.LANCHOR225
+	add	x1, x1, :lo12:.LANCHOR226
 	add	x0, x0, :lo12:.LC45
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
@@ -14662,10 +14767,10 @@ FtlScanAllBlock:
 	add	x24, x24, :lo12:.LC50
 	str	x25, [sp, 80]
 	bl	printf
-.L2108:
+.L2140:
 	ldrh	w0, [x23]
 	cmp	w0, w20
-	bhi	.L2116
+	bhi	.L2148
 	ldp	x19, x20, [sp, 32]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 48]
@@ -14674,7 +14779,7 @@ FtlScanAllBlock:
 	ldr	x25, [sp, 80]
 	add	sp, sp, 144
 	ret
-.L2116:
+.L2148:
 	strh	w20, [x29, 80]
 	mov	w0, w20
 	bl	ftl_get_blk_mode
@@ -14706,18 +14811,18 @@ FtlScanAllBlock:
 	adrp	x1, .LANCHOR58
 	ldrh	w10, [x1, #:lo12:.LANCHOR58]
 	mov	w1, 0
-.L2109:
+.L2141:
 	cmp	w1, w5
-	bne	.L2111
+	bne	.L2143
 	mov	w25, 56
 	mov	x21, 0
 	mov	w2, 0
 	mov	w1, w19
 	umull	x25, w19, w25
 	bl	FlashReadPages
-.L2112:
+.L2144:
 	cmp	x21, x25
-	bne	.L2113
+	bne	.L2145
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	adrp	x25, .LC51
 	add	x25, x25, :lo12:.LC51
@@ -14725,16 +14830,16 @@ FtlScanAllBlock:
 	mov	x19, 0
 	mov	w2, 1
 	bl	FlashReadPages
-.L2114:
+.L2146:
 	cmp	x21, x19
-	bne	.L2115
+	bne	.L2147
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2108
-.L2111:
+	b	.L2140
+.L2143:
 	ldrh	w2, [x3]
 	cmp	w2, w11
-	beq	.L2110
+	beq	.L2142
 	umaddl	x4, w19, w12, x0
 	lsl	w2, w2, 10
 	str	w2, [x4, 4]
@@ -14748,12 +14853,12 @@ FtlScanAllBlock:
 	asr	w2, w2, 2
 	add	x2, x8, x2, sxtw 2
 	str	x2, [x4, 16]
-.L2110:
+.L2142:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	and	w1, w1, 65535
-	b	.L2109
-.L2113:
+	b	.L2141
+.L2145:
 	ldr	x8, [x22, #:lo12:.LANCHOR180]
 	ldrh	w1, [x29, 80]
 	add	x2, x8, x21
@@ -14769,8 +14874,8 @@ FtlScanAllBlock:
 	ldr	w2, [x8, x21]
 	add	x21, x21, 56
 	bl	printf
-	b	.L2112
-.L2115:
+	b	.L2144
+.L2147:
 	ldr	x8, [x22, #:lo12:.LANCHOR180]
 	ldrh	w1, [x29, 80]
 	add	x2, x8, x19
@@ -14786,7 +14891,7 @@ FtlScanAllBlock:
 	ldr	w2, [x8, x19]
 	add	x19, x19, 56
 	bl	printf
-	b	.L2114
+	b	.L2146
 	.size	FtlScanAllBlock, .-FtlScanAllBlock
 	.section	.text.FtlMapTblRecovery,"ax",@progbits
 	.align	2
@@ -14816,8 +14921,8 @@ FtlMapTblRecovery:
 	mov	x0, x22
 	bl	ftl_memset
 	stp	wzr, wzr, [x28, 48]
-	adrp	x0, .LANCHOR202
-	add	x4, x0, :lo12:.LANCHOR202
+	adrp	x0, .LANCHOR203
+	add	x4, x0, :lo12:.LANCHOR203
 	ldr	x1, [x21, #:lo12:.LANCHOR183]
 	mov	x27, x4
 	str	x0, [x29, 128]
@@ -14835,14 +14940,14 @@ FtlMapTblRecovery:
 	add	x0, x25, :lo12:.LANCHOR53
 	str	w1, [x28, 56]
 	str	x0, [x29, 104]
-.L2119:
+.L2151:
 	ldr	w0, [x29, 156]
 	cmp	w19, w0
-	bge	.L2138
+	bge	.L2170
 	ldr	w0, [x29, 116]
 	sxtw	x26, w19
 	cmp	w19, w0
-	bne	.L2120
+	bne	.L2152
 	lsl	x0, x26, 1
 	mov	w1, 1
 	add	x21, x23, x0
@@ -14857,25 +14962,25 @@ FtlMapTblRecovery:
 	ldr	x0, [x29, 144]
 	strh	w19, [x28]
 	ldr	w0, [x0, x26, lsl 2]
-	adrp	x26, .LANCHOR1
+	adrp	x26, .LANCHOR2
 	str	w0, [x28, 48]
-	add	x26, x26, :lo12:.LANCHOR1
+	add	x26, x26, :lo12:.LANCHOR2
 	ldr	x0, [x29, 128]
-	add	x19, x0, :lo12:.LANCHOR202
-.L2121:
+	add	x19, x0, :lo12:.LANCHOR203
+.L2153:
 	cmp	w25, w23
-	ble	.L2124
-.L2138:
+	ble	.L2156
+.L2170:
 	mov	x0, x28
 	bl	ftl_free_no_use_map_blk
 	adrp	x0, .LANCHOR53
 	ldrh	w1, [x28, 2]
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L2126
+	bne	.L2158
 	mov	x0, x28
 	bl	ftl_map_blk_alloc_new_blk
-.L2126:
+.L2158:
 	mov	x0, x28
 	bl	ftl_map_blk_gc
 	mov	x0, x28
@@ -14888,7 +14993,7 @@ FtlMapTblRecovery:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L2124:
+.L2156:
 	ldrh	w0, [x21]
 	mov	w2, 1
 	mov	w1, w2
@@ -14897,39 +15002,39 @@ FtlMapTblRecovery:
 	mov	x0, x19
 	bl	FlashReadPages
 	ldrb	w0, [x26]
-	cbz	w0, .L2122
+	cbz	w0, .L2154
 	ldr	x0, [x19, 16]
 	ldr	w0, [x0, 12]
 	str	w0, [x29, 156]
 	uxtw	x0, w0
-	cbz	w0, .L2122
+	cbz	w0, .L2154
 	ldrh	w1, [x27]
 	ldr	x0, [x19, 8]
 	bl	js_hash
 	ldr	w1, [x29, 156]
 	cmp	w1, w0
-	beq	.L2122
+	beq	.L2154
 	mov	w0, -1
 	str	w0, [x19]
-.L2122:
+.L2154:
 	ldr	w0, [x19]
 	cmn	w0, #1
-	beq	.L2123
+	beq	.L2155
 	ldrh	w0, [x20, 8]
 	cmp	w24, w0
-	bls	.L2123
+	bls	.L2155
 	ldrh	w2, [x20]
 	ldrh	w1, [x28, 4]
 	cmp	w2, w1
-	bne	.L2123
+	bne	.L2155
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x19, 4]
 	str	w1, [x22, x0]
-.L2123:
+.L2155:
 	add	w25, w25, 1
 	sxth	w25, w25
-	b	.L2121
-.L2120:
+	b	.L2153
+.L2152:
 	lsl	x26, x26, 1
 	ldr	x0, [x21, #:lo12:.LANCHOR183]
 	str	x0, [x27, 8]
@@ -14946,27 +15051,27 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	w0, [x27]
 	cmn	w0, #1
-	beq	.L2140
+	beq	.L2172
 	ldrh	w1, [x20]
 	ldrh	w0, [x28, 4]
 	cmp	w1, w0
-	bne	.L2140
+	bne	.L2172
 	ldrh	w1, [x20, 8]
 	mov	w0, 64245
 	cmp	w1, w0
-	beq	.L2128
-.L2140:
+	beq	.L2160
+.L2172:
 	adrp	x26, .LANCHOR57
 	add	x26, x26, :lo12:.LANCHOR57
-	adrp	x0, .LANCHOR1
+	adrp	x0, .LANCHOR2
 	mov	w5, 0
-	add	x0, x0, :lo12:.LANCHOR1
+	add	x0, x0, :lo12:.LANCHOR2
 	str	x0, [x29, 120]
-.L2129:
+.L2161:
 	ldr	x0, [x29, 104]
 	ldrh	w0, [x0]
 	cmp	w5, w0
-	bge	.L2136
+	bge	.L2168
 	ldr	x0, [x29, 136]
 	mov	w2, 1
 	str	w5, [x29, 152]
@@ -14979,12 +15084,12 @@ FtlMapTblRecovery:
 	ldr	x0, [x29, 120]
 	ldr	w5, [x29, 152]
 	ldrb	w0, [x0]
-	cbz	w0, .L2133
+	cbz	w0, .L2165
 	ldr	x0, [x27, 16]
 	ldr	w0, [x0, 12]
 	str	w0, [x29, 152]
 	uxtw	x0, w0
-	cbz	w0, .L2133
+	cbz	w0, .L2165
 	ldrh	w1, [x26]
 	ldr	x0, [x27, 8]
 	str	w5, [x29, 112]
@@ -14992,54 +15097,54 @@ FtlMapTblRecovery:
 	ldr	w1, [x29, 152]
 	ldr	w5, [x29, 112]
 	cmp	w1, w0
-	beq	.L2133
+	beq	.L2165
 	mov	w0, -1
 	str	w0, [x27]
-.L2133:
+.L2165:
 	ldr	w0, [x27]
 	cmn	w0, #1
-	beq	.L2134
+	beq	.L2166
 	ldrh	w0, [x20, 8]
 	cmp	w24, w0
-	bls	.L2134
+	bls	.L2166
 	ldrh	w2, [x20]
 	ldrh	w1, [x28, 4]
 	cmp	w2, w1
-	bne	.L2134
+	bne	.L2166
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x27, 4]
 	str	w1, [x22, x0]
-.L2134:
+.L2166:
 	add	w5, w5, 1
 	sxth	w5, w5
-	b	.L2129
-.L2128:
+	b	.L2161
+.L2160:
 	ldrh	w5, [x25, #:lo12:.LANCHOR53]
 	mov	w0, 0
 	ldr	x6, [x21, #:lo12:.LANCHOR183]
 	sub	w5, w5, #1
-.L2130:
+.L2162:
 	cmp	w0, w5
-	blt	.L2132
-.L2136:
+	blt	.L2164
+.L2168:
 	add	w19, w19, 1
 	sxth	w19, w19
-	b	.L2119
-.L2132:
+	b	.L2151
+.L2164:
 	lsl	w2, w0, 1
 	sxtw	x2, w2
 	lsl	x1, x2, 2
 	ldrh	w1, [x6, x1]
 	cmp	w24, w1
-	bls	.L2131
+	bls	.L2163
 	add	x2, x2, 1
 	ubfiz	x1, x1, 2, 16
 	ldr	w2, [x6, x2, lsl 2]
 	str	w2, [x22, x1]
-.L2131:
+.L2163:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L2130
+	b	.L2162
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
 	.section	.text.FtlLoadVonderInfo,"ax",@progbits
 	.align	2
@@ -15048,8 +15153,8 @@ FtlMapTblRecovery:
 FtlLoadVonderInfo:
 	stp	x29, x30, [sp, -16]!
 	adrp	x1, .LANCHOR61
-	adrp	x0, .LANCHOR215
-	add	x0, x0, :lo12:.LANCHOR215
+	adrp	x0, .LANCHOR216
+	add	x0, x0, :lo12:.LANCHOR216
 	add	x29, sp, 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR61]
 	strh	w1, [x0, 10]
@@ -15093,10 +15198,84 @@ FtlLoadMapInfo:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
-	.section	.text.FlashReadFacBbtData,"ax",@progbits
+	.section	.text.ftl_scan_all_ppa,"ax",@progbits
 	.align	2
-	.global	FlashReadFacBbtData
-	.type	FlashReadFacBbtData, %function
+	.global	ftl_scan_all_ppa
+	.type	ftl_scan_all_ppa, %function
+ftl_scan_all_ppa:
+	sub	sp, sp, #96
+	adrp	x0, .LC52
+	add	x0, x0, :lo12:.LC52
+	stp	x29, x30, [sp, 16]
+	add	x29, sp, 16
+	stp	x21, x22, [sp, 48]
+	adrp	x22, .LANCHOR52
+	adrp	x21, .LANCHOR51
+	stp	x23, x24, [sp, 64]
+	ldrh	w2, [x22, #:lo12:.LANCHOR52]
+	adrp	x24, .LC53
+	ldrh	w1, [x21, #:lo12:.LANCHOR51]
+	add	x24, x24, :lo12:.LC53
+	stp	x19, x20, [sp, 32]
+	adrp	x19, .LANCHOR203
+	add	x19, x19, :lo12:.LANCHOR203
+	mov	w23, 0
+	stp	x25, x26, [sp, 80]
+	bl	printf
+.L2197:
+	ldrh	w0, [x21, #:lo12:.LANCHOR51]
+	cmp	w23, w0
+	bcs	.L2199
+	lsl	w26, w23, 10
+	mov	w20, 0
+	add	x25, x22, :lo12:.LANCHOR52
+	b	.L2200
+.L2198:
+	add	w0, w20, w26
+	stp	wzr, w0, [x19]
+	adrp	x0, .LANCHOR183
+	mov	w2, 0
+	mov	w1, 1
+	add	w20, w20, 1
+	ldr	x0, [x0, #:lo12:.LANCHOR183]
+	str	x0, [x19, 8]
+	adrp	x0, .LANCHOR188
+	ldr	x0, [x0, #:lo12:.LANCHOR188]
+	str	x0, [x19, 16]
+	mov	x0, x19
+	bl	FlashReadPages
+	ldp	x1, x0, [x19, 8]
+	ldr	w2, [x1, 4]
+	str	w2, [sp]
+	ldp	w3, w4, [x0]
+	ldp	w5, w6, [x0, 8]
+	mov	x0, x24
+	ldr	w7, [x1]
+	ldp	w2, w1, [x19]
+	bl	printf
+.L2200:
+	ldrh	w0, [x25]
+	cmp	w20, w0
+	bcc	.L2198
+	add	w23, w23, 1
+	b	.L2197
+.L2199:
+	ldp	x19, x20, [sp, 32]
+	adrp	x1, .LANCHOR227
+	ldp	x21, x22, [sp, 48]
+	add	x1, x1, :lo12:.LANCHOR227
+	ldp	x23, x24, [sp, 64]
+	adrp	x0, .LC54
+	ldp	x25, x26, [sp, 80]
+	add	x0, x0, :lo12:.LC54
+	ldp	x29, x30, [sp, 16]
+	add	sp, sp, 96
+	b	printf
+	.size	ftl_scan_all_ppa, .-ftl_scan_all_ppa
+	.section	.text.FlashReadFacBbtData,"ax",@progbits
+	.align	2
+	.global	FlashReadFacBbtData
+	.type	FlashReadFacBbtData, %function
 FlashReadFacBbtData:
 	stp	x29, x30, [sp, -160]!
 	add	x29, sp, 0
@@ -15126,11 +15305,11 @@ FlashReadFacBbtData:
 	mul	w26, w0, w25
 	mov	x22, x1
 	str	x2, [x29, 120]
-.L2165:
+.L2203:
 	cmp	w19, w20
-	ble	.L2172
+	ble	.L2210
 	mov	w0, -1
-.L2164:
+.L2202:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -15138,7 +15317,7 @@ FlashReadFacBbtData:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L2172:
+.L2210:
 	add	w0, w20, w26
 	mov	w2, 1
 	lsl	w0, w0, 10
@@ -15148,37 +15327,37 @@ FlashReadFacBbtData:
 	bl	FlashReadPages
 	ldr	w0, [x29, 104]
 	cmn	w0, #1
-	beq	.L2166
+	beq	.L2204
 	ldr	x0, [x22, #:lo12:.LANCHOR197]
 	ldrh	w0, [x0]
 	cmp	w0, w27
-	bne	.L2166
-	cbz	x23, .L2173
-	cbz	w25, .L2168
-.L2171:
+	bne	.L2204
+	cbz	x23, .L2211
+	cbz	w25, .L2206
+.L2209:
 	ldr	x1, [x21, #:lo12:.LANCHOR147]
 	mov	w2, w24
 	mov	x0, x23
 	bl	ftl_memcpy
 	mov	w3, 4
-	adrp	x0, .LC52
+	adrp	x0, .LC55
 	mov	w2, w3
 	mov	x1, x23
-	add	x0, x0, :lo12:.LC52
+	add	x0, x0, :lo12:.LC55
 	bl	rknand_print_hex
-.L2173:
+.L2211:
 	mov	w0, 0
-	b	.L2164
-.L2168:
+	b	.L2202
+.L2206:
 	ldr	x5, [x21, #:lo12:.LANCHOR147]
 	adrp	x2, .LANCHOR149
 	add	x2, x2, :lo12:.LANCHOR149
 	mov	w0, 0
 	mov	w6, 1
-.L2169:
+.L2207:
 	ldr	w1, [x2]
 	cmp	w0, w1
-	bcs	.L2171
+	bcs	.L2209
 	ubfx	x1, x0, 5, 11
 	and	w3, w0, 31
 	lsl	x1, x1, 2
@@ -15188,11 +15367,11 @@ FlashReadFacBbtData:
 	ldr	w3, [x5, x1]
 	orr	w3, w3, w4
 	str	w3, [x5, x1]
-	b	.L2169
-.L2166:
+	b	.L2207
+.L2204:
 	sub	w20, w20, #1
 	and	w20, w20, 65535
-	b	.L2165
+	b	.L2203
 	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
 	.section	.text.FlashGetBadBlockList,"ax",@progbits
 	.align	2
@@ -15216,10 +15395,10 @@ FlashGetBadBlockList:
 	lsr	w2, w2, 3
 	bl	FlashReadFacBbtData
 	cmn	w0, #1
-	bne	.L2179
-.L2183:
+	bne	.L2217
+.L2221:
 	mov	w0, 0
-.L2180:
+.L2218:
 	ubfiz	x0, x0, 1, 16
 	mov	w1, -1
 	ldr	x21, [sp, 32]
@@ -15228,32 +15407,32 @@ FlashGetBadBlockList:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L2179:
+.L2217:
 	ldr	x4, [x21, #:lo12:.LANCHOR153]
 	lsr	w5, w19, 4
 	sub	w19, w19, #1
 	mov	w1, 0
 	mov	w0, 0
 	mov	w6, 1
-.L2181:
+.L2219:
 	cmp	w1, w19
-	bge	.L2180
+	bge	.L2218
 	ubfx	x3, x1, 5, 11
 	and	w2, w1, 31
 	lsl	w2, w6, w2
 	ldr	w3, [x4, x3, lsl 2]
 	tst	w2, w3
-	beq	.L2182
+	beq	.L2220
 	add	w2, w0, 1
 	ubfiz	x0, x0, 1, 16
 	strh	w1, [x20, x0]
 	and	w0, w2, 65535
-.L2182:
+.L2220:
 	cmp	w0, w5
-	bcs	.L2183
+	bcs	.L2221
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L2181
+	b	.L2219
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
 	.section	.text.FtlMakeBbt,"ax",@progbits
 	.align	2
@@ -15269,57 +15448,57 @@ FtlMakeBbt:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w21, .L2190
+	cbnz	w21, .L2228
 	bl	FtlBbtMemInit
 	adrp	x20, .LANCHOR74
 	add	x22, x20, :lo12:.LANCHOR74
 	bl	FtlLoadFactoryBbt
 	add	x24, x22, 32
-	adrp	x28, .LANCHOR202
+	adrp	x28, .LANCHOR203
 	add	x22, x22, 12
-	add	x25, x28, :lo12:.LANCHOR202
+	add	x25, x28, :lo12:.LANCHOR203
 	adrp	x0, .LANCHOR45
 	add	x0, x0, :lo12:.LANCHOR45
 	str	x0, [x29, 120]
-.L2191:
+.L2229:
 	ldr	x0, [x29, 120]
 	ldrh	w0, [x0]
 	cmp	w21, w0
-	bcc	.L2197
+	bcc	.L2235
 	adrp	x21, .LANCHOR59
 	add	x21, x21, :lo12:.LANCHOR59
 	mov	w19, 0
-.L2198:
+.L2236:
 	ldrh	w0, [x21]
 	cmp	w0, w19
-	bhi	.L2199
+	bhi	.L2237
 	add	x21, x20, :lo12:.LANCHOR74
 	mov	w22, 65535
 	ldrh	w19, [x21, 12]
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L2200:
+.L2238:
 	ldrh	w0, [x21, 12]
 	sub	w0, w0, #47
 	cmp	w0, w19
-	bgt	.L2204
+	bgt	.L2242
 	mov	w0, w19
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L2201
+	beq	.L2239
 	mov	w0, w19
 	bl	FlashTestBlk
-	cbz	w0, .L2202
+	cbz	w0, .L2240
 	mov	w0, w19
 	bl	FtlBbmMapBadBlock
-.L2201:
+.L2239:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L2200
-.L2197:
+	b	.L2238
+.L2235:
 	adrp	x2, .LANCHOR188
 	adrp	x0, .LANCHOR183
-	add	x19, x28, :lo12:.LANCHOR202
+	add	x19, x28, :lo12:.LANCHOR203
 	ldrh	w1, [x22]
 	ldr	x0, [x0, #:lo12:.LANCHOR183]
 	mov	w3, 65535
@@ -15328,7 +15507,7 @@ FtlMakeBbt:
 	stp	x0, x26, [x19, 8]
 	adrp	x23, .LANCHOR51
 	str	x2, [x29, 112]
-	beq	.L2192
+	beq	.L2230
 	ldrh	w4, [x23, #:lo12:.LANCHOR51]
 	mov	w2, 1
 	madd	w27, w4, w21, w1
@@ -15343,14 +15522,14 @@ FtlMakeBbt:
 	add	w2, w2, 7
 	lsr	w2, w2, 3
 	bl	ftl_memcpy
-.L2193:
+.L2231:
 	mov	w0, w27
 	add	w21, w21, 1
 	bl	FtlBbmMapBadBlock
 	add	x24, x24, 8
 	add	x22, x22, 2
-	b	.L2191
-.L2192:
+	b	.L2229
+.L2230:
 	mov	w1, w21
 	bl	FlashGetBadBlockList
 	ldr	x0, [x19, 8]
@@ -15363,12 +15542,12 @@ FtlMakeBbt:
 	sub	w19, w19, #1
 	str	x0, [x29, 104]
 	and	w19, w19, 65535
-.L2194:
+.L2232:
 	ldrh	w0, [x23]
 	madd	w0, w21, w0, w19
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L2195
+	beq	.L2233
 	ldr	x0, [x29, 112]
 	mov	w2, 16
 	strh	w19, [x22]
@@ -15401,29 +15580,29 @@ FtlMakeBbt:
 	bl	FlashProgPages
 	ldr	w0, [x25]
 	cmn	w0, #1
-	bne	.L2193
+	bne	.L2231
 	mov	w0, w27
 	bl	FtlBbmMapBadBlock
-	b	.L2194
-.L2195:
+	b	.L2232
+.L2233:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L2194
-.L2199:
+	b	.L2232
+.L2237:
 	mov	w0, w19
 	add	w19, w19, 1
 	bl	FtlBbmMapBadBlock
 	and	w19, w19, 65535
-	b	.L2198
-.L2202:
+	b	.L2236
+.L2240:
 	ldrh	w0, [x21]
 	cmp	w0, w22
-	bne	.L2203
+	bne	.L2241
 	strh	w19, [x21]
-	b	.L2201
-.L2203:
+	b	.L2239
+.L2241:
 	strh	w19, [x21, 4]
-.L2204:
+.L2242:
 	adrp	x0, .LANCHOR77
 	add	x19, x20, :lo12:.LANCHOR74
 	ldrh	w1, [x20, #:lo12:.LANCHOR74]
@@ -15452,7 +15631,7 @@ FtlMakeBbt:
 	strh	w0, [x19, 4]
 	strh	w1, [x20, #:lo12:.LANCHOR74]
 	bl	FtlBbmTblFlush
-.L2190:
+.L2228:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -15483,11 +15662,11 @@ log2phys:
 	stp	x27, x28, [sp, 80]
 	str	w2, [x29, 116]
 	cmp	w25, w1
-	bcc	.L2211
+	bcc	.L2249
 	mov	w2, 884
-	adrp	x1, .LANCHOR226
+	adrp	x1, .LANCHOR228
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR226
+	add	x1, x1, :lo12:.LANCHOR228
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -15495,10 +15674,10 @@ log2phys:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2211:
+.L2249:
 	ldr	w0, [x19, #:lo12:.LANCHOR72]
 	cmp	w25, w0
-	bcs	.L2212
+	bcs	.L2250
 	adrp	x19, .LANCHOR96
 	add	w24, w24, 7
 	adrp	x0, .LANCHOR67
@@ -15507,10 +15686,10 @@ log2phys:
 	and	w22, w23, 65535
 	ldrh	w1, [x0, #:lo12:.LANCHOR67]
 	mov	x0, 0
-.L2213:
+.L2251:
 	and	x20, x0, 65535
 	cmp	w20, w1
-	bcc	.L2218
+	bcc	.L2256
 	bl	select_l2p_ram_region
 	and	x20, x0, 65535
 	ldr	x1, [x19, #:lo12:.LANCHOR96]
@@ -15519,20 +15698,20 @@ log2phys:
 	ldrh	w3, [x1, x21]
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L2219
+	beq	.L2257
 	ldr	w1, [x2, 4]
-	tbz	w1, #31, .L2219
+	tbz	w1, #31, .L2257
 	bl	flush_l2p_region
-.L2219:
+.L2257:
 	adrp	x0, .LANCHOR66
 	str	x0, [x29, 104]
 	ldrh	w1, [x0, #:lo12:.LANCHOR66]
 	cmp	w1, w22
-	bcs	.L2220
+	bcs	.L2258
 	mov	w2, 526
-	adrp	x1, .LANCHOR227
+	adrp	x1, .LANCHOR229
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR227
+	add	x1, x1, :lo12:.LANCHOR229
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -15540,12 +15719,12 @@ log2phys:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2220:
+.L2258:
 	adrp	x27, .LANCHOR131
 	ubfiz	x0, x22, 2, 16
 	ldr	x1, [x27, #:lo12:.LANCHOR131]
 	ldr	w3, [x1, x0]
-	cbnz	w3, .L2221
+	cbnz	w3, .L2259
 	ldr	x0, [x19, #:lo12:.LANCHOR96]
 	adrp	x1, .LANCHOR57
 	add	x0, x0, x21
@@ -15557,13 +15736,13 @@ log2phys:
 	add	x1, x0, x21
 	strh	w22, [x0, x21]
 	str	wzr, [x1, 4]
-	b	.L2215
-.L2212:
+	b	.L2253
+.L2250:
 	ldr	w1, [x29, 116]
 	mov	w0, -1
-	cbnz	w1, .L2210
+	cbnz	w1, .L2248
 	str	w0, [x26]
-.L2210:
+.L2248:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -15571,37 +15750,37 @@ log2phys:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2218:
+.L2256:
 	add	x0, x0, 1
 	add	x3, x2, x0, lsl 4
 	ldrh	w3, [x3, -16]
 	cmp	w3, w22
-	bne	.L2213
-.L2215:
+	bne	.L2251
+.L2253:
 	mov	x0, 1
 	lsl	x24, x0, x24
 	ldr	w0, [x29, 116]
 	sub	w24, w24, #1
 	and	w25, w24, w25
 	and	x25, x25, 65535
-	cbnz	w0, .L2216
+	cbnz	w0, .L2254
 	ldr	x0, [x19, #:lo12:.LANCHOR96]
 	add	x0, x0, x20, lsl 4
 	ldr	x0, [x0, 8]
 	ldr	w0, [x0, x25, lsl 2]
 	str	w0, [x26]
-.L2217:
+.L2255:
 	ldr	x0, [x19, #:lo12:.LANCHOR96]
 	add	x20, x0, x20, lsl 4
 	ldr	w0, [x20, 4]
 	cmn	w0, #1
-	beq	.L2226
+	beq	.L2264
 	add	w0, w0, 1
 	str	w0, [x20, 4]
-.L2226:
+.L2264:
 	mov	w0, 0
-	b	.L2210
-.L2216:
+	b	.L2248
+.L2254:
 	ldr	x0, [x19, #:lo12:.LANCHOR96]
 	ldr	w2, [x26]
 	add	x0, x0, x20, lsl 4
@@ -15612,11 +15791,11 @@ log2phys:
 	str	w1, [x0, 4]
 	adrp	x0, .LANCHOR97
 	strh	w22, [x0, #:lo12:.LANCHOR97]
-	b	.L2217
-.L2221:
+	b	.L2255
+.L2259:
 	ldr	x0, [x19, #:lo12:.LANCHOR96]
-	adrp	x5, .LANCHOR202
-	add	x28, x5, :lo12:.LANCHOR202
+	adrp	x5, .LANCHOR203
+	add	x28, x5, :lo12:.LANCHOR203
 	mov	w2, 1
 	add	x0, x0, x21
 	str	x5, [x29, 96]
@@ -15636,11 +15815,11 @@ log2phys:
 	ldr	x5, [x29, 96]
 	ldrh	w0, [x0, 8]
 	cmp	w0, w22
-	beq	.L2222
+	beq	.L2260
 	mov	w2, w3
 	and	w1, w23, 65535
-	adrp	x0, .LC53
-	add	x0, x0, :lo12:.LC53
+	adrp	x0, .LC56
+	add	x0, x0, :lo12:.LC56
 	bl	printf
 	ldr	x1, [x28, 16]
 	mov	w3, 4
@@ -15652,21 +15831,21 @@ log2phys:
 	mov	w2, 4
 	ldr	x1, [x27, #:lo12:.LANCHOR131]
 	ldrh	w3, [x0, #:lo12:.LANCHOR66]
-	adrp	x0, .LC54
-	add	x0, x0, :lo12:.LC54
+	adrp	x0, .LC57
+	add	x0, x0, :lo12:.LC57
 	bl	rknand_print_hex
 	adrp	x0, .LANCHOR76
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR76]
-.L2223:
+.L2261:
 	ldr	x0, [x29, 120]
 	ldrh	w0, [x0, 8]
 	cmp	w0, w22
-	beq	.L2224
+	beq	.L2262
 	mov	w2, 552
-	adrp	x1, .LANCHOR227
+	adrp	x1, .LANCHOR229
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR227
+	add	x1, x1, :lo12:.LANCHOR229
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -15674,21 +15853,21 @@ log2phys:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2224:
+.L2262:
 	ldr	x0, [x19, #:lo12:.LANCHOR96]
 	add	x1, x0, x21
 	str	wzr, [x1, 4]
 	strh	w22, [x0, x21]
-	b	.L2215
-.L2222:
-	ldr	w0, [x5, #:lo12:.LANCHOR202]
+	b	.L2253
+.L2260:
+	ldr	w0, [x5, #:lo12:.LANCHOR203]
 	cmp	w0, 256
-	bne	.L2223
+	bne	.L2261
 	and	w23, w23, 65535
 	mov	w2, w3
 	mov	w1, w23
-	adrp	x0, .LC55
-	add	x0, x0, :lo12:.LC55
+	adrp	x0, .LC58
+	add	x0, x0, :lo12:.LC58
 	bl	printf
 	ldr	x0, [x19, #:lo12:.LANCHOR96]
 	mov	w1, w23
@@ -15697,7 +15876,7 @@ log2phys:
 	adrp	x0, .LANCHOR127
 	add	x0, x0, :lo12:.LANCHOR127
 	bl	FtlMapWritePage
-	b	.L2223
+	b	.L2261
 	.size	log2phys, .-log2phys
 	.section	.text.FtlProgPages,"ax",@progbits
 	.align	2
@@ -15712,14 +15891,14 @@ FtlProgPages:
 	ldr	w2, [x23, #:lo12:.LANCHOR76]
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
-	cbnz	w2, .L2229
+	cbnz	w2, .L2267
 	adrp	x2, .LANCHOR15
 	ldrb	w2, [x2, #:lo12:.LANCHOR15]
-	cbz	w2, .L2244
+	cbz	w2, .L2282
 	ldrb	w2, [x3, 8]
 	cmp	w2, 1
 	cset	w22, eq
-.L2231:
+.L2269:
 	mov	x20, x3
 	ldrb	w3, [x3, 9]
 	mov	w21, w1
@@ -15732,21 +15911,21 @@ FtlProgPages:
 	add	x24, x24, :lo12:.LANCHOR138
 	mov	w1, 56
 	umaddl	x21, w21, w1, x19
-.L2232:
+.L2270:
 	cmp	x19, x21
-	beq	.L2241
+	beq	.L2279
 	adrp	x26, .LANCHOR83
-	b	.L2242
-.L2244:
+	b	.L2280
+.L2282:
 	mov	w22, 0
-	b	.L2231
-.L2235:
+	b	.L2269
+.L2273:
 	ldr	w0, [x19, 4]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	ldrh	w1, [x20]
 	cmp	w1, w0, uxth
-	bne	.L2233
+	bne	.L2271
 	ldr	x2, [x26, #:lo12:.LANCHOR83]
 	ubfiz	x1, x1, 1, 16
 	ldrh	w3, [x20, 4]
@@ -15757,12 +15936,12 @@ FtlProgPages:
 	ldrh	w0, [x25]
 	strh	w0, [x20, 2]
 	strh	wzr, [x20, 4]
-.L2233:
+.L2271:
 	ldrh	w0, [x20, 4]
-	cbnz	w0, .L2234
+	cbnz	w0, .L2272
 	mov	x0, x20
 	bl	allocate_new_data_superblock
-.L2234:
+.L2272:
 	ldr	w0, [x24, 96]
 	add	w0, w0, 1
 	str	w0, [x24, 96]
@@ -15779,20 +15958,20 @@ FtlProgPages:
 	mov	x0, x19
 	bl	FlashProgPages
 	ldr	w0, [x23, #:lo12:.LANCHOR76]
-	cbnz	w0, .L2229
-.L2242:
+	cbnz	w0, .L2267
+.L2280:
 	ldr	w0, [x19]
 	cmn	w0, #1
-	beq	.L2235
+	beq	.L2273
 	adrp	x0, .LANCHOR38
 	ldrb	w1, [x20, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w1, w0
-	bcc	.L2236
-	mov	w2, 1583
-	adrp	x1, .LANCHOR228
+	bcc	.L2274
+	mov	w2, 1588
+	adrp	x1, .LANCHOR230
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR228
+	add	x1, x1, :lo12:.LANCHOR230
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -15800,10 +15979,10 @@ FtlProgPages:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2236:
+.L2274:
 	ldr	w0, [x19, 4]
-	cbnz	w22, .L2237
-.L2249:
+	cbnz	w22, .L2275
+.L2287:
 	str	w0, [x29, 92]
 	add	x1, x29, 92
 	ldr	w0, [x19, 24]
@@ -15816,35 +15995,35 @@ FtlProgPages:
 	and	w1, w0, 65535
 	mov	w26, w1
 	cmn	w3, #1
-	beq	.L2239
+	beq	.L2277
 	adrp	x2, .LANCHOR83
 	ubfiz	x0, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR83]
 	ldrh	w0, [x2, x0]
-	cbnz	w0, .L2240
-	adrp	x0, .LC56
+	cbnz	w0, .L2278
+	adrp	x0, .LC59
 	mov	w2, 0
-	add	x0, x0, :lo12:.LC56
+	add	x0, x0, :lo12:.LC59
 	bl	printf
-.L2240:
+.L2278:
 	mov	w0, w26
 	bl	decrement_vpc_count
-.L2239:
+.L2277:
 	add	x19, x19, 56
-	b	.L2232
-.L2237:
+	b	.L2270
+.L2275:
 	orr	w0, w0, -2147483648
-	b	.L2249
-.L2241:
+	b	.L2287
+.L2279:
 	adrp	x0, .LANCHOR38
 	ldrb	w1, [x20, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w1, w0
-	bcc	.L2229
-	mov	w2, 1600
-	adrp	x1, .LANCHOR228
+	bcc	.L2267
+	mov	w2, 1605
+	adrp	x1, .LANCHOR230
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR228
+	add	x1, x1, :lo12:.LANCHOR230
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -15852,7 +16031,7 @@ FtlProgPages:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2229:
+.L2267:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -15867,25 +16046,25 @@ FtlProgPages:
 FtlCacheWriteBack:
 	adrp	x0, .LANCHOR76
 	ldr	w0, [x0, #:lo12:.LANCHOR76]
-	cbnz	w0, .L2256
+	cbnz	w0, .L2294
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	adrp	x19, .LANCHOR132
 	ldr	x0, [x19, #:lo12:.LANCHOR132]
-	cbz	x0, .L2251
-	adrp	x1, .LANCHOR229
+	cbz	x0, .L2289
+	adrp	x1, .LANCHOR231
 	mov	w2, 0
-	ldr	x3, [x1, #:lo12:.LANCHOR229]
+	ldr	x3, [x1, #:lo12:.LANCHOR231]
 	mov	w1, 1
 	bl	FtlProgPages
 	str	xzr, [x19, #:lo12:.LANCHOR132]
-.L2251:
+.L2289:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2256:
+.L2294:
 	mov	w0, 0
 	ret
 	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
@@ -15896,7 +16075,7 @@ FtlCacheWriteBack:
 FtlSysFlush:
 	adrp	x0, .LANCHOR76
 	ldr	w0, [x0, #:lo12:.LANCHOR76]
-	cbnz	w0, .L2262
+	cbnz	w0, .L2300
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	FtlCacheWriteBack
@@ -15907,7 +16086,7 @@ FtlSysFlush:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L2262:
+.L2300:
 	mov	w0, 0
 	ret
 	.size	FtlSysFlush, .-FtlSysFlush
@@ -15916,17 +16095,17 @@ FtlSysFlush:
 	.global	FtlDeInit
 	.type	FtlDeInit, %function
 FtlDeInit:
-	adrp	x0, .LANCHOR230
-	ldr	w0, [x0, #:lo12:.LANCHOR230]
+	adrp	x0, .LANCHOR232
+	ldr	w0, [x0, #:lo12:.LANCHOR232]
 	cmp	w0, 1
-	bne	.L2268
+	bne	.L2306
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	FtlSysFlush
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L2268:
+.L2306:
 	mov	w0, 0
 	ret
 	.size	FtlDeInit, .-FtlDeInit
@@ -15957,61 +16136,61 @@ ftl_discard:
 	stp	x21, x22, [sp, 32]
 	str	x23, [sp, 48]
 	cmp	w1, w0
-	bhi	.L2281
+	bhi	.L2319
 	mov	w19, w2
 	cmp	w2, 31
-	bhi	.L2275
-.L2289:
+	bhi	.L2313
+.L2327:
 	mov	w0, 0
-.L2273:
+.L2311:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2275:
+.L2313:
 	adrp	x0, .LANCHOR76
 	ldr	w0, [x0, #:lo12:.LANCHOR76]
-	cbnz	w0, .L2289
+	cbnz	w0, .L2327
 	adrp	x22, .LANCHOR55
 	bl	FtlCacheWriteBack
 	ldrh	w0, [x22, #:lo12:.LANCHOR55]
 	udiv	w21, w20, w0
 	msub	w20, w0, w21, w20
 	ands	w20, w20, 65535
-	beq	.L2277
+	beq	.L2315
 	sub	w0, w0, w20
 	add	w21, w21, 1
 	cmp	w0, w19
 	csel	w0, w0, w19, ls
 	sub	w19, w19, w0, uxth
-.L2277:
-	adrp	x20, .LANCHOR231
+.L2315:
+	adrp	x20, .LANCHOR233
 	adrp	x23, .LANCHOR163
-	add	x20, x20, :lo12:.LANCHOR231
+	add	x20, x20, :lo12:.LANCHOR233
 	add	x23, x23, :lo12:.LANCHOR163
 	mov	w0, -1
 	str	w0, [x29, 76]
-.L2278:
+.L2316:
 	ldrh	w0, [x22, #:lo12:.LANCHOR55]
 	cmp	w19, w0
-	bcs	.L2280
-	adrp	x0, .LANCHOR231
-	ldr	w1, [x0, #:lo12:.LANCHOR231]
+	bcs	.L2318
+	adrp	x0, .LANCHOR233
+	ldr	w1, [x0, #:lo12:.LANCHOR233]
 	cmp	w1, 32
-	bls	.L2289
-	str	wzr, [x0, #:lo12:.LANCHOR231]
+	bls	.L2327
+	str	wzr, [x0, #:lo12:.LANCHOR233]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L2289
-.L2280:
+	b	.L2327
+.L2318:
 	mov	w2, 0
 	add	x1, x29, 72
 	mov	w0, w21
 	bl	log2phys
 	ldr	w0, [x29, 72]
 	cmn	w0, #1
-	beq	.L2279
+	beq	.L2317
 	ldr	w0, [x20]
 	mov	w2, 1
 	add	x1, x29, 76
@@ -16026,63 +16205,209 @@ ftl_discard:
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L2279:
+.L2317:
 	ldrh	w0, [x22, #:lo12:.LANCHOR55]
 	add	w21, w21, 1
 	sub	w19, w19, w0
-	b	.L2278
-.L2281:
+	b	.L2316
+.L2319:
 	mov	w0, -1
-	b	.L2273
+	b	.L2311
 	.size	ftl_discard, .-ftl_discard
+	.section	.text.FtlCheckVpc,"ax",@progbits
+	.align	2
+	.global	FtlCheckVpc
+	.type	FtlCheckVpc, %function
+FtlCheckVpc:
+	stp	x29, x30, [sp, -112]!
+	adrp	x0, .LC45
+	add	x0, x0, :lo12:.LC45
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR72
+	add	x23, x23, :lo12:.LANCHOR72
+	stp	x21, x22, [sp, 32]
+	mov	w22, 0
+	stp	x19, x20, [sp, 16]
+	stp	x25, x26, [sp, 64]
+	adrp	x21, .LANCHOR234
+	stp	x27, x28, [sp, 80]
+	add	x1, x21, :lo12:.LANCHOR234
+	adrp	x20, check_valid_page_count_table
+	bl	printf
+	add	x19, x20, :lo12:check_valid_page_count_table
+	mov	x2, 8192
+	mov	w1, 0
+	mov	x0, x19
+	bl	memset
+.L2329:
+	ldr	w0, [x23]
+	cmp	w22, w0
+	bcc	.L2331
+	adrp	x22, .LANCHOR40
+	adrp	x24, .LC60
+	add	x22, x22, :lo12:.LANCHOR40
+	add	x26, x20, :lo12:check_valid_page_count_table
+	add	x24, x24, :lo12:.LC60
+	mov	w23, 0
+	mov	w19, 0
+	adrp	x25, .LANCHOR83
+.L2332:
+	ldrh	w0, [x22]
+	cmp	w0, w19
+	bhi	.L2334
+	adrp	x0, .LANCHOR87
+	ldr	x19, [x0, #:lo12:.LANCHOR87]
+	cbz	x19, .L2335
+	adrp	x0, .LANCHOR88
+	adrp	x25, .LC61
+	add	x20, x20, :lo12:check_valid_page_count_table
+	add	x25, x25, :lo12:.LC61
+	ldrh	w26, [x0, #:lo12:.LANCHOR88]
+	adrp	x0, .LANCHOR81
+	mov	x24, x0
+	mov	w22, 0
+	ldr	x1, [x0, #:lo12:.LANCHOR81]
+	adrp	x27, .LANCHOR83
+	mov	w28, 6
+	sub	x19, x19, x1
+	mov	x1, -6148914691236517206
+	asr	x19, x19, 1
+	movk	x1, 0xaaab, lsl 0
+	mul	x19, x19, x1
+	and	w19, w19, 65535
+.L2336:
+	cmp	w22, w26
+	bne	.L2338
+.L2335:
+	cbz	w23, .L2328
+	mov	w2, 1688
+	add	x1, x21, :lo12:.LANCHOR234
+	adrp	x0, .LC5
+	add	x0, x0, :lo12:.LC5
+	bl	printf
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
+	bl	printf
+.L2328:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L2331:
+	mov	w2, 0
+	add	x1, x29, 108
+	mov	w0, w22
+	bl	log2phys
+	ldr	w0, [x29, 108]
+	cmn	w0, #1
+	beq	.L2330
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+	and	x0, x0, 65535
+	ldrh	w1, [x19, x0, lsl 1]
+	add	w1, w1, 1
+	strh	w1, [x19, x0, lsl 1]
+.L2330:
+	add	w22, w22, 1
+	b	.L2329
+.L2334:
+	ldr	x0, [x25, #:lo12:.LANCHOR83]
+	ubfiz	x28, x19, 1, 16
+	sxtw	x27, w19
+	ldrh	w2, [x0, x28]
+	ldrh	w3, [x26, x27, lsl 1]
+	cmp	w2, w3
+	beq	.L2333
+	mov	w1, w19
+	mov	x0, x24
+	bl	printf
+	ldr	x0, [x25, #:lo12:.LANCHOR83]
+	mov	w1, 65535
+	ldrh	w0, [x0, x28]
+	cmp	w0, w1
+	beq	.L2333
+	ldrh	w1, [x26, x27, lsl 1]
+	cmp	w1, w0
+	csinc	w23, w23, wzr, ls
+.L2333:
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L2332
+.L2338:
+	ldr	x1, [x27, #:lo12:.LANCHOR83]
+	ubfiz	x0, x19, 1, 16
+	ldrh	w2, [x1, x0]
+	cbz	w2, .L2337
+	ldrh	w3, [x20, w19, sxtw 1]
+	mov	w23, 1
+	mov	w1, w19
+	mov	x0, x25
+	bl	printf
+.L2337:
+	ldr	x0, [x24, #:lo12:.LANCHOR81]
+	umull	x19, w19, w28
+	ldrh	w19, [x0, x19]
+	mov	w0, 65535
+	cmp	w19, w0
+	beq	.L2335
+	add	w22, w22, 1
+	and	w22, w22, 65535
+	b	.L2336
+	.size	FtlCheckVpc, .-FtlCheckVpc
 	.section	.text.Ftlscanalldata,"ax",@progbits
 	.align	2
 	.global	Ftlscanalldata
 	.type	Ftlscanalldata, %function
 Ftlscanalldata:
 	sub	sp, sp, #96
-	adrp	x0, .LC57
+	adrp	x0, .LC62
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC57
+	add	x0, x0, :lo12:.LC62
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x19, x20, [sp, 32]
-	adrp	x20, .LANCHOR202
+	adrp	x20, .LANCHOR203
 	stp	x21, x22, [sp, 48]
 	mov	w19, 0
 	adrp	x21, .LANCHOR72
-	add	x22, x20, :lo12:.LANCHOR202
+	add	x22, x20, :lo12:.LANCHOR203
 	add	x21, x21, :lo12:.LANCHOR72
 	str	x23, [sp, 64]
 	bl	printf
-.L2291:
+.L2354:
 	ldr	w0, [x21]
 	cmp	w19, w0
-	bcc	.L2297
+	bcc	.L2360
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x29, x30, [sp, 16]
 	ldr	x23, [sp, 64]
 	add	sp, sp, 96
 	ret
-.L2297:
+.L2360:
 	mov	w2, 0
 	add	x1, x29, 76
 	mov	w0, w19
 	bl	log2phys
 	tst	x19, 2047
-	bne	.L2292
+	bne	.L2355
 	ldr	w2, [x29, 76]
-	adrp	x0, .LC58
+	adrp	x0, .LC63
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC58
+	add	x0, x0, :lo12:.LC63
 	bl	printf
-.L2292:
+.L2355:
 	ldr	w1, [x29, 76]
 	cmn	w1, #1
-	beq	.L2294
-	add	x0, x20, :lo12:.LANCHOR202
-	str	wzr, [x20, #:lo12:.LANCHOR202]
+	beq	.L2357
+	add	x0, x20, :lo12:.LANCHOR203
+	str	wzr, [x20, #:lo12:.LANCHOR203]
 	mov	w2, 0
 	str	w1, [x0, 4]
 	adrp	x1, .LANCHOR183
@@ -16094,28 +16419,28 @@ Ftlscanalldata:
 	mov	w1, 1
 	str	x23, [x0, 16]
 	bl	FlashReadPages
-	ldr	w0, [x20, #:lo12:.LANCHOR202]
+	ldr	w0, [x20, #:lo12:.LANCHOR203]
 	cmp	w0, 256
 	ccmn	w0, #1, 4, ne
-	beq	.L2295
+	beq	.L2358
 	ldr	w0, [x23, 8]
 	cmp	w19, w0
-	beq	.L2294
-.L2295:
+	beq	.L2357
+.L2358:
 	ldp	x1, x0, [x22, 8]
 	ldr	w2, [x1, 4]
 	str	w2, [sp]
 	ldr	w2, [x22, 4]
 	ldp	w3, w4, [x0]
 	ldp	w5, w6, [x0, 8]
-	adrp	x0, .LC59
+	adrp	x0, .LC64
 	ldr	w7, [x1]
-	add	x0, x0, :lo12:.LC59
+	add	x0, x0, :lo12:.LC64
 	mov	w1, w19
 	bl	printf
-.L2294:
+.L2357:
 	add	w19, w19, 1
-	b	.L2291
+	b	.L2354
 	.size	Ftlscanalldata, .-Ftlscanalldata
 	.section	.text.FtlReUsePrevPpa,"ax",@progbits
 	.align	2
@@ -16136,10 +16461,10 @@ FtlReUsePrevPpa:
 	and	w3, w0, 65535
 	ubfiz	x20, x3, 1, 16
 	ldrh	w1, [x2, x20]
-	cbnz	w1, .L2300
+	cbnz	w1, .L2363
 	adrp	x0, .LANCHOR87
 	ldr	x19, [x0, #:lo12:.LANCHOR87]
-	cbz	x19, .L2301
+	cbz	x19, .L2364
 	adrp	x2, .LANCHOR81
 	mov	x5, -6148914691236517206
 	movk	x5, 0xaaab, lsl 0
@@ -16152,20 +16477,20 @@ FtlReUsePrevPpa:
 	mul	x19, x19, x5
 	mov	w5, 6
 	and	w19, w19, 65535
-.L2302:
+.L2365:
 	cmp	w1, w4
-	beq	.L2301
+	beq	.L2364
 	cmp	w19, w3
-	bne	.L2303
+	bne	.L2366
 	mov	w1, w19
 	add	x0, x0, :lo12:.LANCHOR87
 	bl	List_remove_node
 	ldrh	w0, [x23, #:lo12:.LANCHOR88]
-	cbnz	w0, .L2304
-	mov	w2, 2097
-	adrp	x1, .LANCHOR232
+	cbnz	w0, .L2367
+	mov	w2, 2099
+	adrp	x1, .LANCHOR235
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR232
+	add	x1, x1, :lo12:.LANCHOR235
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -16173,7 +16498,7 @@ FtlReUsePrevPpa:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2304:
+.L2367:
 	ldrh	w0, [x23, #:lo12:.LANCHOR88]
 	sub	w0, w0, #1
 	strh	w0, [x23, #:lo12:.LANCHOR88]
@@ -16183,7 +16508,7 @@ FtlReUsePrevPpa:
 	ldrh	w0, [x1, x20]
 	add	w0, w0, 1
 	strh	w0, [x1, x20]
-.L2301:
+.L2364:
 	add	x1, x29, 76
 	mov	w2, 1
 	mov	w0, w21
@@ -16193,18 +16518,18 @@ FtlReUsePrevPpa:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2303:
+.L2366:
 	umull	x19, w19, w5
 	ldrh	w19, [x2, x19]
 	cmp	w19, w6
-	beq	.L2301
+	beq	.L2364
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L2302
-.L2300:
+	b	.L2365
+.L2363:
 	add	w1, w1, 1
 	strh	w1, [x2, x20]
-	b	.L2301
+	b	.L2364
 	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
 	.section	.text.FtlRecoverySuperblock,"ax",@progbits
 	.align	2
@@ -16222,7 +16547,7 @@ FtlRecoverySuperblock:
 	stp	x25, x26, [sp, 64]
 	cmp	w0, w1
 	stp	x27, x28, [sp, 80]
-	beq	.L2469
+	beq	.L2532
 	ldrb	w0, [x19, 6]
 	str	w0, [x29, 180]
 	adrp	x0, .LANCHOR52
@@ -16230,11 +16555,11 @@ FtlRecoverySuperblock:
 	str	x0, [x29, 144]
 	ldrh	w2, [x0, #:lo12:.LANCHOR52]
 	cmp	w2, w26
-	bne	.L2313
+	bne	.L2376
 	strh	wzr, [x19, 4]
-.L2476:
+.L2539:
 	strb	wzr, [x19, 6]
-.L2469:
+.L2532:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -16243,26 +16568,26 @@ FtlRecoverySuperblock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 208
 	ret
-.L2313:
+.L2376:
 	ldrh	w0, [x19, 16]
 	mov	w21, 0
-.L2314:
+.L2377:
 	cmp	w0, w1
-	beq	.L2315
+	beq	.L2378
 	ldrb	w1, [x19, 8]
 	cmp	w1, 1
-	bne	.L2316
+	bne	.L2379
 	bl	FtlGetLastWrittenPage
 	mov	w20, w0
 	cmn	w0, #1
-	beq	.L2317
+	beq	.L2380
 	adrp	x0, .LANCHOR15
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbnz	w0, .L2394
+	cbnz	w0, .L2457
 	adrp	x0, .LANCHOR16
 	add	x0, x0, :lo12:.LANCHOR16
 	ldrh	w23, [x0, w20, sxtw 1]
-.L2318:
+.L2381:
 	adrp	x1, .LANCHOR105
 	adrp	x2, .LANCHOR38
 	adrp	x22, .LANCHOR180
@@ -16280,24 +16605,24 @@ FtlRecoverySuperblock:
 	str	x2, [x29, 160]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.L2319:
+.L2382:
 	cmp	x1, x4
-	bne	.L2323
+	bne	.L2386
 	ldrb	w1, [x19, 8]
 	cmp	w1, 1
-	bne	.L2395
+	bne	.L2458
 	adrp	x1, .LANCHOR15
 	ldrb	w1, [x1, #:lo12:.LANCHOR15]
 	cmp	w1, 0
 	cset	w1, ne
 	str	w1, [x29, 176]
-.L2324:
+.L2387:
 	ldr	w2, [x29, 176]
 	mov	w1, w27
-	adrp	x24, .LC60
-	adrp	x25, .LANCHOR234
-	add	x24, x24, :lo12:.LC60
-	add	x25, x25, :lo12:.LANCHOR234
+	adrp	x24, .LC65
+	adrp	x25, .LANCHOR237
+	add	x24, x24, :lo12:.LC65
+	add	x25, x25, :lo12:.LANCHOR237
 	mov	x28, 0
 	bl	FlashReadPages
 	adrp	x0, .LANCHOR160
@@ -16305,71 +16630,71 @@ FtlRecoverySuperblock:
 	str	x0, [x29, 168]
 	ldr	w21, [x0, #:lo12:.LANCHOR160]
 	sub	w21, w21, #1
-.L2325:
+.L2388:
 	and	w0, w28, 65535
 	cmp	w27, w0
-	bhi	.L2330
-	bne	.L2328
+	bhi	.L2393
+	bne	.L2391
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	ldr	w0, [x0, 4]
-.L2471:
+.L2534:
 	lsr	w0, w0, 10
 	bl	P2V_plane
 	ldrb	w1, [x19, 8]
 	and	w27, w0, 65535
 	cmp	w1, 1
-	bne	.L2332
+	bne	.L2395
 	adrp	x0, .LANCHOR15
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbnz	w0, .L2332
+	cbnz	w0, .L2395
 	adrp	x0, .LANCHOR16
 	add	x0, x0, :lo12:.LANCHOR16
 	ldrh	w20, [x0, w20, sxtw 1]
-.L2332:
+.L2395:
 	ldr	x0, [x29, 144]
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w20
-	bne	.L2333
+	bne	.L2396
 	strh	w20, [x19, 2]
 	strb	wzr, [x19, 6]
 	strh	wzr, [x19, 4]
-.L2333:
+.L2396:
 	ldr	w0, [x29, 180]
 	cmp	w20, w26
 	cset	w2, eq
 	cmp	w27, w0
 	cset	w0, eq
 	tst	w2, w0
-	beq	.L2334
-.L2477:
+	beq	.L2397
+.L2540:
 	mov	w2, w27
 	mov	w1, w20
 	mov	x0, x19
 	bl	ftl_sb_update_avl_pages
-	b	.L2469
-.L2315:
+	b	.L2532
+.L2378:
 	add	w21, w21, 1
 	and	w21, w21, 65535
 	add	x0, x19, x21, sxtw 1
 	ldrh	w0, [x0, 16]
-	b	.L2314
-.L2316:
+	b	.L2377
+.L2379:
 	mov	w1, 0
 	bl	FtlGetLastWrittenPage
 	mov	w20, w0
 	cmn	w0, #1
-	beq	.L2317
-.L2394:
+	beq	.L2380
+.L2457:
 	mov	w23, w20
-	b	.L2318
-.L2317:
-	cbz	w26, .L2320
-	mov	w2, 2168
-	adrp	x1, .LANCHOR233
+	b	.L2381
+.L2380:
+	cbz	w26, .L2383
+	mov	w2, 2170
+	adrp	x1, .LANCHOR236
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR233
+	add	x1, x1, :lo12:.LANCHOR236
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -16377,15 +16702,15 @@ FtlRecoverySuperblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2320:
+.L2383:
 	ldr	w0, [x29, 180]
 	cmp	w0, 0
 	ccmp	w21, w0, 4, ne
-	beq	.L2321
-	mov	w2, 2169
-	adrp	x1, .LANCHOR233
+	beq	.L2384
+	mov	w2, 2171
+	adrp	x1, .LANCHOR236
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR233
+	add	x1, x1, :lo12:.LANCHOR236
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -16393,13 +16718,13 @@ FtlRecoverySuperblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2321:
+.L2384:
 	strh	wzr, [x19, 2]
-	b	.L2476
-.L2323:
+	b	.L2539
+.L2386:
 	ldrh	w2, [x4]
 	cmp	w2, w8
-	beq	.L2322
+	beq	.L2385
 	umaddl	x5, w27, w10, x0
 	orr	w2, w23, w2, lsl 10
 	add	w3, w27, 1
@@ -16410,81 +16735,81 @@ FtlRecoverySuperblock:
 	asr	w2, w2, 2
 	add	x2, x6, x2, sxtw 2
 	str	x2, [x5, 16]
-.L2322:
+.L2385:
 	add	x4, x4, 2
-	b	.L2319
-.L2395:
+	b	.L2382
+.L2458:
 	str	wzr, [x29, 176]
-	b	.L2324
-.L2330:
+	b	.L2387
+.L2393:
 	mov	x0, 56
 	ldr	x2, [x22, #:lo12:.LANCHOR180]
 	mul	x0, x28, x0
 	add	x1, x2, x0
 	ldr	w0, [x2, x0]
-	cbnz	w0, .L2326
+	cbnz	w0, .L2389
 	ldr	x6, [x1, 16]
 	ldr	w4, [x6, 4]
 	cmn	w4, #1
-	beq	.L2327
+	beq	.L2390
 	ldr	x0, [x29, 168]
 	ldr	w1, [x0, #:lo12:.LANCHOR160]
 	mov	w0, w4
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2327
+	cbz	w0, .L2390
 	ldr	x0, [x29, 168]
 	add	w4, w4, 1
 	str	w4, [x0, #:lo12:.LANCHOR160]
-.L2327:
+.L2390:
 	ldr	w0, [x6]
 	cmn	w0, #1
-	bne	.L2329
-.L2328:
+	bne	.L2392
+.L2391:
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	and	x28, x28, 65535
 	mov	x1, 56
 	and	w20, w20, 65535
 	madd	x28, x28, x1, x0
 	ldr	w0, [x28, 4]
-	b	.L2471
-.L2326:
+	b	.L2534
+.L2389:
 	ldr	w1, [x1, 4]
 	mov	x0, x24
 	bl	printf
 	ldrh	w0, [x19]
 	and	w5, w23, 65535
 	strh	w0, [x25]
-.L2329:
+.L2392:
 	add	x28, x28, 1
-	b	.L2325
-.L2334:
+	b	.L2388
+.L2397:
 	mov	w0, 65535
 	cmp	w5, w0
-	bne	.L2335
-	cbnz	w1, .L2336
-.L2335:
+	bne	.L2398
+	cbnz	w1, .L2399
+.L2398:
 	adrp	x24, .LANCHOR136
 	and	w6, w23, 65535
 	ldr	w0, [x24, #:lo12:.LANCHOR136]
 	cmn	w0, #1
-	bne	.L2337
+	bne	.L2400
 	str	w21, [x24, #:lo12:.LANCHOR136]
-.L2337:
+.L2400:
 	add	w0, w26, 7
 	ldr	w7, [x24, #:lo12:.LANCHOR136]
 	cmp	w0, w23, uxth
-	bge	.L2396
+	bge	.L2459
 	sub	w23, w6, #7
 	and	w23, w23, 65535
-.L2338:
+.L2401:
 	mov	w3, -1
 	adrp	x5, .LANCHOR120
 	mov	w28, w3
 	add	x5, x5, :lo12:.LANCHOR120
 	mov	w4, 65535
-.L2339:
+.L2402:
 	cmp	w23, w6
-	bhi	.L2354
+	bhi	.L2417
 	ldr	x1, [x29, 160]
 	mov	w25, 0
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
@@ -16493,24 +16818,24 @@ FtlRecoverySuperblock:
 	ldrh	w1, [x1, #:lo12:.LANCHOR38]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-	b	.L2355
-.L2396:
+	b	.L2418
+.L2459:
 	mov	w23, w26
-	b	.L2338
-.L2341:
+	b	.L2401
+.L2404:
 	ldrh	w8, [x2]
 	cmp	w8, w4
-	beq	.L2340
+	beq	.L2403
 	umaddl	x11, w25, w10, x0
 	add	w25, w25, 1
 	and	w25, w25, 65535
 	orr	w8, w23, w8, lsl 10
 	str	w8, [x11, 4]
-.L2340:
+.L2403:
 	add	x2, x2, 2
-.L2355:
+.L2418:
 	cmp	x2, x1
-	bne	.L2341
+	bne	.L2404
 	ldr	w2, [x29, 176]
 	mov	w1, w25
 	str	x5, [x29, 112]
@@ -16534,67 +16859,67 @@ FtlRecoverySuperblock:
 	umaddl	x25, w25, w2, x1
 	ldr	x5, [x29, 112]
 	mov	w2, 0
-.L2342:
+.L2405:
 	cmp	x25, x1
-	bne	.L2352
-	cbz	w2, .L2353
+	bne	.L2415
+	cbz	w2, .L2416
 	str	w0, [x24, #:lo12:.LANCHOR136]
-.L2353:
+.L2416:
 	add	w23, w23, 1
 	and	w23, w23, 65535
-	b	.L2339
-.L2352:
+	b	.L2402
+.L2415:
 	ldr	w8, [x1]
-	cbnz	w8, .L2343
+	cbnz	w8, .L2406
 	ldr	x8, [x1, 16]
 	ldrh	w13, [x8]
 	cmp	w13, w4
-	beq	.L2398
+	beq	.L2461
 	ldr	w8, [x8, 4]
 	cmn	w8, #1
-	beq	.L2398
+	beq	.L2461
 	cmn	w3, #1
-	bne	.L2400
+	bne	.L2463
 	ldrh	w2, [x5, x12, lsl 1]
 	cmp	w2, w4
-	bne	.L2345
-	cbz	w10, .L2400
-.L2345:
+	bne	.L2408
+	cbz	w10, .L2463
+.L2408:
 	cmp	w21, w0
 	mov	w2, w11
 	csel	w3, w3, w0, eq
-.L2344:
+.L2407:
 	mov	w28, w0
 	add	x1, x1, 56
 	mov	w0, w8
-	b	.L2342
-.L2343:
-	cbz	w2, .L2346
+	b	.L2405
+.L2406:
+	cbz	w2, .L2409
 	str	w0, [x24, #:lo12:.LANCHOR136]
-.L2346:
-	adrp	x0, .LANCHOR234
+.L2409:
+	adrp	x0, .LANCHOR237
 	ldrh	w1, [x19]
-	strh	w1, [x0, #:lo12:.LANCHOR234]
+	strh	w1, [x0, #:lo12:.LANCHOR237]
 	ldrb	w0, [x19, 8]
-	cbnz	w0, .L2336
+	cbnz	w0, .L2399
 	adrp	x0, .LANCHOR120
 	add	x0, x0, :lo12:.LANCHOR120
 	ldrh	w1, [x0, w23, sxtw 1]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2348
+	bne	.L2411
 	cmn	w3, #1
-	beq	.L2349
+	beq	.L2412
 	str	w3, [x24, #:lo12:.LANCHOR136]
-.L2336:
-	adrp	x0, .LANCHOR235
+.L2399:
+	adrp	x0, .LANCHOR238
 	mov	w23, w26
 	mov	w1, 1
 	adrp	x28, .LANCHOR136
-	strh	w1, [x0, #:lo12:.LANCHOR235]
+	strh	w1, [x0, #:lo12:.LANCHOR238]
 	add	x0, x28, :lo12:.LANCHOR136
 	str	x0, [x29, 112]
-.L2356:
+.L2419:
 	ldr	x2, [x29, 160]
 	adrp	x1, .LANCHOR15
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
@@ -16606,9 +16931,9 @@ FtlRecoverySuperblock:
 	str	x1, [x29, 128]
 	add	x2, x2, 8
 	add	x2, x19, x2, lsl 1
-.L2357:
+.L2420:
 	cmp	x2, x3
-	bne	.L2360
+	bne	.L2423
 	ldr	w2, [x29, 176]
 	mov	w1, w24
 	mov	x25, 0
@@ -16616,103 +16941,103 @@ FtlRecoverySuperblock:
 	mov	w0, 56
 	umull	x0, w24, w0
 	str	x0, [x29, 136]
-	adrp	x0, .LANCHOR234
-	add	x0, x0, :lo12:.LANCHOR234
+	adrp	x0, .LANCHOR237
+	add	x0, x0, :lo12:.LANCHOR237
 	str	x0, [x29, 120]
-.L2361:
+.L2424:
 	ldr	x0, [x29, 136]
 	cmp	x25, x0
-	bne	.L2387
+	bne	.L2450
 	ldrb	w0, [x19, 8]
 	add	w23, w23, 1
 	and	w23, w23, 65535
 	cmp	w0, 1
-	bne	.L2388
+	bne	.L2451
 	ldr	x0, [x29, 128]
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L2388
+	cbz	w0, .L2451
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w23
-	bne	.L2388
+	bne	.L2451
 	cmp	w20, w23
-	beq	.L2363
-.L2388:
+	beq	.L2426
+.L2451:
 	ldr	x0, [x29, 144]
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w23
-	bne	.L2356
+	bne	.L2419
 	ldr	x0, [x29, 160]
 	mov	w2, 65535
 	strh	w23, [x19, 2]
 	strh	wzr, [x19, 4]
 	ldrh	w1, [x0, #:lo12:.LANCHOR38]
 	mov	w0, 0
-.L2389:
+.L2452:
 	cmp	w0, w1
-	beq	.L2469
+	beq	.L2532
 	ldr	x4, [x29, 184]
 	ldrh	w3, [x4], 2
 	str	x4, [x29, 184]
 	cmp	w3, w2
-	beq	.L2390
+	beq	.L2453
 	strb	w0, [x19, 6]
-	b	.L2469
-.L2349:
+	b	.L2532
+.L2412:
 	cmp	w21, w7
-	beq	.L2350
+	beq	.L2413
 	str	w7, [x24, #:lo12:.LANCHOR136]
-	b	.L2336
-.L2350:
+	b	.L2399
+.L2413:
 	ldr	w0, [x24, #:lo12:.LANCHOR136]
-.L2478:
+.L2541:
 	sub	w0, w0, #1
-.L2472:
+.L2535:
 	str	w0, [x24, #:lo12:.LANCHOR136]
-	b	.L2336
-.L2348:
+	b	.L2399
+.L2411:
 	cmp	w28, w21
-	beq	.L2351
+	beq	.L2414
 	cmn	w28, #1
-	beq	.L2336
+	beq	.L2399
 	str	w28, [x24, #:lo12:.LANCHOR136]
-	b	.L2336
-.L2351:
+	b	.L2399
+.L2414:
 	ldr	w0, [x24, #:lo12:.LANCHOR136]
 	cmp	w21, w0
-	bne	.L2478
-	b	.L2336
-.L2398:
+	bne	.L2541
+	b	.L2399
+.L2461:
 	mov	w8, w0
 	mov	w0, w28
-	b	.L2344
-.L2400:
+	b	.L2407
+.L2463:
 	mov	w2, 1
-	b	.L2344
-.L2354:
+	b	.L2407
+.L2417:
 	mov	w0, -1
-	b	.L2472
-.L2360:
+	b	.L2535
+.L2423:
 	ldrh	w1, [x3]
 	cmp	w1, w6
-	beq	.L2358
+	beq	.L2421
 	mov	w4, 56
 	orr	w1, w23, w1, lsl 10
 	umaddl	x4, w24, w4, x0
 	str	w1, [x4, 4]
 	ldrb	w7, [x19, 8]
 	cmp	w7, 1
-	bne	.L2359
-	cbz	w5, .L2359
+	bne	.L2422
+	cbz	w5, .L2422
 	orr	w1, w1, -2147483648
 	str	w1, [x4, 4]
-.L2359:
+.L2422:
 	add	w24, w24, 1
 	and	w24, w24, 65535
-.L2358:
+.L2421:
 	add	x3, x3, 2
-	b	.L2357
-.L2387:
+	b	.L2420
+.L2450:
 	ldr	x4, [x22, #:lo12:.LANCHOR180]
 	add	x4, x4, x25
 	ldr	w5, [x4, 4]
@@ -16721,38 +17046,38 @@ FtlRecoverySuperblock:
 	bl	P2V_plane
 	and	w0, w0, 65535
 	cmp	w23, w26
-	bcc	.L2362
+	bcc	.L2425
 	ldr	w1, [x29, 180]
 	ccmp	w1, w0, 0, eq
-	bhi	.L2362
+	bhi	.L2425
 	cmp	w23, w20
 	ccmp	w27, w0, 0, eq
-	beq	.L2363
+	beq	.L2426
 	ldr	w0, [x4]
 	cmn	w0, #1
-	beq	.L2364
+	beq	.L2427
 	ldr	x3, [x4, 16]
 	mov	w0, 61589
 	ldrh	w1, [x3]
 	cmp	w1, w0
-	beq	.L2365
+	beq	.L2428
 	ldrh	w0, [x19]
-.L2474:
+.L2537:
 	bl	decrement_vpc_count
-	b	.L2362
-.L2365:
+	b	.L2425
+.L2428:
 	ldr	w21, [x3, 4]
 	cmn	w21, #1
-	beq	.L2366
+	beq	.L2429
 	ldr	x0, [x29, 168]
 	ldr	w1, [x0, #:lo12:.LANCHOR160]
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2366
+	cbz	w0, .L2429
 	ldr	x1, [x29, 168]
 	add	w0, w21, 1
 	str	w0, [x1, #:lo12:.LANCHOR160]
-.L2366:
+.L2429:
 	ldp	w24, w0, [x3, 8]
 	add	x1, x29, 200
 	str	w0, [x29, 196]
@@ -16762,12 +17087,12 @@ FtlRecoverySuperblock:
 	ldr	w1, [x28, #:lo12:.LANCHOR136]
 	ldr	w3, [x29, 196]
 	cmn	w1, #1
-	beq	.L2367
+	beq	.L2430
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2367
+	cbz	w0, .L2430
 	cmn	w3, #1
-	beq	.L2368
+	beq	.L2431
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	mov	w2, 0
 	mov	w1, 1
@@ -16781,15 +17106,15 @@ FtlRecoverySuperblock:
 	add	x3, x0, x25
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	bne	.L2369
-.L2370:
+	bne	.L2432
+.L2433:
 	mov	w0, -1
 	str	w0, [x29, 196]
-.L2377:
+.L2440:
 	ldr	w3, [x29, 196]
 	cmn	w3, #1
-	beq	.L2362
-.L2393:
+	beq	.L2425
+.L2456:
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
 	and	w24, w0, 65535
@@ -16797,11 +17122,11 @@ FtlRecoverySuperblock:
 	mov	w3, w24
 	ldrh	w0, [x0, #:lo12:.LANCHOR40]
 	cmp	w0, w24
-	bhi	.L2383
-	mov	w2, 2456
-	adrp	x1, .LANCHOR233
+	bhi	.L2446
+	mov	w2, 2458
+	adrp	x1, .LANCHOR236
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR233
+	add	x1, x1, :lo12:.LANCHOR236
 	add	x0, x0, :lo12:.LC5
 	str	w24, [x29, 152]
 	bl	printf
@@ -16811,50 +17136,50 @@ FtlRecoverySuperblock:
 	add	x0, x0, :lo12:.LC7
 	bl	printf
 	ldr	w3, [x29, 152]
-.L2383:
+.L2446:
 	adrp	x1, .LANCHOR83
 	ubfiz	x0, x24, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L2384
+	cbz	w0, .L2447
 	mov	w0, w3
-	b	.L2474
-.L2368:
+	b	.L2537
+.L2431:
 	ldp	w1, w0, [x29, 200]
 	cmp	w1, w0
-	bne	.L2362
+	bne	.L2425
 	mov	w2, 1
 	add	x1, x29, 196
 	mov	w0, w24
 	bl	log2phys
-.L2362:
+.L2425:
 	add	x25, x25, 56
-	b	.L2361
-.L2369:
+	b	.L2424
+.L2432:
 	ldr	w0, [x4, 8]
 	cmp	w24, w0
-	bne	.L2370
+	bne	.L2433
 	ldr	w0, [x4, 4]
 	str	w0, [x29, 152]
 	str	x4, [x29, 104]
 	uxtw	x1, w0
 	ldr	w0, [x28, #:lo12:.LANCHOR136]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2370
+	cbz	w0, .L2433
 	ldp	w0, w1, [x29, 200]
 	ldr	x4, [x29, 104]
 	cmp	w0, w1
 	ldr	w1, [x29, 196]
-	bne	.L2372
-.L2473:
+	bne	.L2435
+.L2536:
 	mov	w0, w24
 	bl	FtlReUsePrevPpa
-	b	.L2370
-.L2372:
+	b	.L2433
+.L2435:
 	cmp	w0, w1
-	beq	.L2370
+	beq	.L2433
 	cmn	w0, #1
-	beq	.L2373
+	beq	.L2436
 	ldr	x4, [x3, 16]
 	mov	w2, 0
 	str	w0, [x3, 4]
@@ -16863,64 +17188,64 @@ FtlRecoverySuperblock:
 	mov	x0, x3
 	bl	FlashReadPages
 	ldr	x4, [x29, 104]
-.L2374:
+.L2437:
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	beq	.L2375
+	beq	.L2438
 	ldr	x0, [x29, 112]
 	ldr	w3, [x4, 4]
 	mov	w1, w3
 	ldr	w0, [x0]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2375
+	cbz	w0, .L2438
 	ldr	w0, [x29, 152]
 	mov	w1, w3
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2370
-.L2375:
+	cbz	w0, .L2433
+.L2438:
 	ldr	w1, [x29, 196]
-	b	.L2473
-.L2373:
+	b	.L2536
+.L2436:
 	str	w0, [x3]
-	b	.L2374
-.L2367:
+	b	.L2437
+.L2430:
 	ldp	w1, w0, [x29, 200]
 	cmp	w1, w0
-	beq	.L2377
+	beq	.L2440
 	adrp	x0, .LANCHOR43
 	ldr	w0, [x0, #:lo12:.LANCHOR43]
 	cmp	w0, w3, lsr 10
-	bhi	.L2379
+	bhi	.L2442
 	cmn	w3, #1
-	bne	.L2362
-.L2379:
+	bne	.L2425
+.L2442:
 	mov	w2, 1
 	add	x1, x29, 204
 	mov	w0, w24
 	bl	log2phys
 	ldr	w3, [x29, 200]
 	cmn	w3, #1
-	beq	.L2377
+	beq	.L2440
 	ldr	w0, [x29, 196]
 	cmp	w3, w0
-	beq	.L2393
+	beq	.L2456
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
 	adrp	x1, .LANCHOR91
 	and	w0, w0, 65535
 	ldrh	w1, [x1, #:lo12:.LANCHOR91]
 	cmp	w1, w0
-	beq	.L2382
+	beq	.L2445
 	adrp	x1, .LANCHOR92
 	ldrh	w1, [x1, #:lo12:.LANCHOR92]
 	cmp	w1, w0
-	beq	.L2382
+	beq	.L2445
 	adrp	x1, .LANCHOR93
 	ldrh	w1, [x1, #:lo12:.LANCHOR93]
 	cmp	w1, w0
-	bne	.L2377
-.L2382:
+	bne	.L2440
+.L2445:
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	mov	w2, 0
 	mov	w1, 1
@@ -16931,63 +17256,63 @@ FtlRecoverySuperblock:
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L2377
+	beq	.L2440
 	ldr	x4, [x29, 152]
 	mov	w0, w21
 	ldr	w1, [x4, 4]
 	bl	ftl_cmp_data_ver
-	cbnz	w0, .L2377
+	cbnz	w0, .L2440
 	mov	w2, 1
 	add	x1, x29, 200
 	mov	w0, w24
 	bl	log2phys
-	b	.L2377
-.L2384:
+	b	.L2440
+.L2447:
 	mov	w1, w24
-	adrp	x0, .LC61
-	add	x0, x0, :lo12:.LC61
+	adrp	x0, .LC66
+	add	x0, x0, :lo12:.LC66
 	bl	printf
-	b	.L2362
-.L2364:
+	b	.L2425
+.L2427:
 	ldr	x1, [x29, 120]
 	mov	w2, w21
 	ldrh	w0, [x19]
 	strh	w0, [x1]
 	mov	w1, w5
-	adrp	x0, .LC62
-	add	x0, x0, :lo12:.LC62
+	adrp	x0, .LC67
+	add	x0, x0, :lo12:.LC67
 	bl	printf
-	adrp	x2, .LANCHOR236
-	ldr	w0, [x2, #:lo12:.LANCHOR236]
+	adrp	x2, .LANCHOR239
+	ldr	w0, [x2, #:lo12:.LANCHOR239]
 	cmp	w0, 31
-	bhi	.L2385
-	adrp	x1, .LANCHOR237
-	add	x1, x1, :lo12:.LANCHOR237
+	bhi	.L2448
+	adrp	x1, .LANCHOR240
+	add	x1, x1, :lo12:.LANCHOR240
 	ldr	w3, [x29, 204]
 	str	w3, [x1, w0, uxtw 2]
 	add	w0, w0, 1
-	str	w0, [x2, #:lo12:.LANCHOR236]
-.L2385:
+	str	w0, [x2, #:lo12:.LANCHOR239]
+.L2448:
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
 	ldr	w0, [x28, #:lo12:.LANCHOR136]
 	cmn	w0, #1
-	bne	.L2386
-.L2475:
+	bne	.L2449
+.L2538:
 	str	w21, [x28, #:lo12:.LANCHOR136]
-	b	.L2362
-.L2386:
+	b	.L2425
+.L2449:
 	cmp	w21, w0
-	bcs	.L2362
-	b	.L2475
-.L2390:
+	bcs	.L2425
+	b	.L2538
+.L2453:
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L2389
-.L2363:
+	b	.L2452
+.L2426:
 	strb	w27, [x19, 6]
 	strh	w20, [x19, 2]
-	b	.L2477
+	b	.L2540
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
 	.section	.text.FtlGcScanTempBlk,"ax",@progbits
 	.align	2
@@ -16997,39 +17322,39 @@ FtlGcScanTempBlk:
 	stp	x29, x30, [sp, -176]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR238
+	adrp	x23, .LANCHOR241
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	ldrh	w20, [x23, #:lo12:.LANCHOR238]
+	ldrh	w20, [x23, #:lo12:.LANCHOR241]
 	mov	w0, 65535
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	cmp	w20, w0
 	stp	x27, x28, [sp, 80]
-	beq	.L2504
-	cbnz	w20, .L2480
-.L2481:
+	beq	.L2567
+	cbnz	w20, .L2543
+.L2544:
 	bl	FtlGcPageVarInit
-	b	.L2482
-.L2504:
+	b	.L2545
+.L2567:
 	mov	w20, 0
-.L2480:
+.L2543:
 	adrp	x0, .LANCHOR52
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w1
-	beq	.L2481
-.L2482:
+	beq	.L2544
+.L2545:
 	adrp	x24, .LANCHOR72
 	add	x24, x24, :lo12:.LANCHOR72
 	mov	w26, -1
-.L2483:
+.L2546:
 	ldrh	w1, [x19]
 	mov	w0, 65535
 	strb	wzr, [x19, 8]
 	cmp	w1, w0
-	beq	.L2484
+	beq	.L2547
 	mov	w27, 56
-.L2503:
+.L2566:
 	adrp	x1, .LANCHOR104
 	adrp	x22, .LANCHOR180
 	add	x3, x19, 16
@@ -17047,34 +17372,34 @@ FtlGcScanTempBlk:
 	ldrh	w1, [x1, #:lo12:.LANCHOR38]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.L2485:
+.L2548:
 	cmp	x3, x1
-	bne	.L2487
+	bne	.L2550
 	mov	w1, w21
 	mov	w2, 0
 	bl	FlashReadPages
-	adrp	x25, .LANCHOR1
+	adrp	x25, .LANCHOR2
 	umull	x0, w21, w27
 	mov	x21, 0
 	str	x0, [x29, 104]
-	add	x0, x25, :lo12:.LANCHOR1
+	add	x0, x25, :lo12:.LANCHOR2
 	str	x0, [x29, 96]
-.L2488:
+.L2551:
 	ldr	x0, [x29, 104]
 	cmp	x0, x21
-	bne	.L2502
+	bne	.L2565
 	adrp	x0, .LANCHOR52
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w20
-	bhi	.L2503
-.L2484:
+	bhi	.L2566
+.L2547:
 	strh	w20, [x19, 2]
 	mov	w0, -1
 	strb	wzr, [x19, 6]
 	mov	w1, w20
-	strh	w0, [x23, #:lo12:.LANCHOR238]
+	strh	w0, [x23, #:lo12:.LANCHOR241]
 	mov	w2, 0
 	mov	x0, x19
 	bl	ftl_sb_update_avl_pages
@@ -17086,10 +17411,10 @@ FtlGcScanTempBlk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L2487:
+.L2550:
 	ldrh	w2, [x3]
 	cmp	w2, w10
-	beq	.L2486
+	beq	.L2549
 	umaddl	x4, w21, w27, x0
 	orr	w2, w20, w2, lsl 10
 	str	w2, [x4, 4]
@@ -17103,57 +17428,59 @@ FtlGcScanTempBlk:
 	asr	w2, w2, 2
 	add	x2, x7, x2, sxtw 2
 	str	x2, [x4, 16]
-.L2486:
+.L2549:
 	add	x3, x3, 2
-	b	.L2485
-.L2502:
-	ldr	x1, [x22, #:lo12:.LANCHOR180]
-	add	x0, x1, x21
-	ldr	w1, [x1, x21]
-	ldr	w28, [x0, 4]
-	cbnz	w1, .L2489
-	ldr	x25, [x0, 16]
-	mov	w0, 65535
+	b	.L2548
+.L2565:
+	ldr	x0, [x22, #:lo12:.LANCHOR180]
+	add	x1, x0, x21
+	ldr	w0, [x0, x21]
+	ldr	w28, [x1, 4]
+	ldr	x25, [x1, 16]
+	cbnz	w0, .L2552
 	ldrh	w1, [x25]
+	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L2518
+	beq	.L2581
 	ldr	w1, [x24]
 	ldr	w0, [x25, 8]
 	cmp	w0, w1
-	bls	.L2491
-.L2518:
+	bls	.L2554
+.L2581:
 	adrp	x0, .LANCHOR83
 	ldrh	w1, [x19]
 	ldr	x0, [x0, #:lo12:.LANCHOR83]
 	strh	wzr, [x0, x1, lsl 1]
-.L2517:
 	ldrh	w0, [x19]
-	mov	w20, 0
 	bl	INSERT_FREE_LIST
+	adrp	x1, .LANCHOR205
 	mov	w0, -1
 	strh	w0, [x19]
+	strh	w0, [x1, #:lo12:.LANCHOR205]
+.L2580:
 	bl	FtlGcPageVarInit
-	b	.L2483
-.L2491:
+	mov	w20, 0
+	b	.L2546
+.L2554:
 	ldr	x1, [x29, 96]
 	ldrb	w1, [x1]
-	cbnz	w1, .L2493
-.L2494:
+	cbnz	w1, .L2556
+.L2557:
 	ldp	w2, w0, [x25, 8]
 	mov	w1, w28
 	add	x21, x21, 56
 	bl	FtlGcUpdatePage
-	b	.L2488
-.L2493:
+	b	.L2551
+.L2556:
 	add	x1, x29, 116
 	mov	w2, 0
 	bl	log2phys
 	ldr	w0, [x25, 12]
 	ldr	w1, [x29, 116]
 	cmp	w0, w1
-	bne	.L2494
+	bne	.L2557
 	cmn	w0, #1
-	beq	.L2494
+	beq	.L2557
 	str	w0, [x29, 124]
 	adrp	x0, .LANCHOR187
 	mov	w2, 0
@@ -17172,57 +17499,61 @@ FtlGcScanTempBlk:
 	add	x2, x2, x21
 	mov	x0, 0
 	ubfiz	x1, x1, 9, 16
-.L2495:
+.L2558:
 	cmp	x0, x1
-	beq	.L2494
+	beq	.L2557
 	ldr	x6, [x2, 8]
 	ldr	w7, [x6, x0]
 	add	x0, x0, 4
 	add	x6, x5, x0
 	ldr	w6, [x6, -4]
 	cmp	w7, w6
-	beq	.L2495
+	beq	.L2558
 	ldrh	w1, [x19]
-	adrp	x0, .LC63
+	adrp	x0, .LC68
 	ldr	w2, [x29, 124]
-	add	x0, x0, :lo12:.LC63
+	add	x0, x0, :lo12:.LC68
 	bl	printf
-	b	.L2518
-.L2489:
+	b	.L2581
+.L2552:
 	ldrh	w1, [x19]
 	mov	w2, w28
-	adrp	x0, .LC64
-	add	x0, x0, :lo12:.LC64
+	adrp	x0, .LC69
+	add	x0, x0, :lo12:.LC69
 	bl	printf
 	adrp	x0, .LANCHOR28
 	ldr	w1, [x0, #:lo12:.LANCHOR28]
 	ldrh	w0, [x19]
-	cbnz	w1, .L2498
+	cbnz	w1, .L2561
 	adrp	x1, .LANCHOR15
 	ldrb	w1, [x1, #:lo12:.LANCHOR15]
-	cbz	w1, .L2499
-.L2498:
+	cbz	w1, .L2562
+.L2561:
 	adrp	x2, .LANCHOR78
 	ubfiz	x1, x0, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR78]
 	ldrh	w1, [x2, x1]
 	cmp	w1, 159
-	bls	.L2500
-.L2499:
+	bls	.L2563
+.L2562:
 	ldr	x1, [x22, #:lo12:.LANCHOR180]
 	ldr	w1, [x1, x21]
 	cmn	w1, #1
-	bne	.L2501
-.L2500:
+	bne	.L2564
+.L2563:
 	ldr	x1, [x22, #:lo12:.LANCHOR180]
 	add	x3, x1, x21
 	ldr	w26, [x3, 4]
-.L2501:
+.L2564:
 	adrp	x1, .LANCHOR83
 	ubfiz	x0, x0, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	strh	wzr, [x1, x0]
-	b	.L2517
+	ldrh	w0, [x19]
+	bl	INSERT_FREE_LIST
+	mov	w0, -1
+	strh	w0, [x19]
+	b	.L2580
 	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
 	.section	.text.FtlGcFreeTempBlock,"ax",@progbits
 	.align	2
@@ -17231,10 +17562,10 @@ FtlGcScanTempBlk:
 FtlGcFreeTempBlock:
 	adrp	x0, .LANCHOR76
 	ldr	w0, [x0, #:lo12:.LANCHOR76]
-	cbz	w0, .L2520
+	cbz	w0, .L2583
 	mov	w0, 0
 	ret
-.L2520:
+.L2583:
 	stp	x29, x30, [sp, -112]!
 	mov	w1, 65535
 	add	x29, sp, 0
@@ -17247,27 +17578,27 @@ FtlGcFreeTempBlock:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w20, w1
-	str	x27, [sp, 80]
-	beq	.L2522
+	stp	x27, x28, [sp, 80]
+	beq	.L2585
 	adrp	x1, .LANCHOR52
 	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	bl	FtlGcScanTempBlk
 	str	w0, [x29, 108]
 	cmn	w0, #1
-	beq	.L2522
+	beq	.L2585
 	adrp	x0, .LANCHOR78
 	ubfiz	x20, x20, 1, 16
 	ldr	x1, [x0, #:lo12:.LANCHOR78]
 	ldrh	w0, [x1, x20]
 	cmp	w0, 4
-	bls	.L2523
+	bls	.L2586
 	sub	w0, w0, #5
 	strh	w0, [x1, x20]
 	mov	w0, 1
 	bl	FtlEctTblFlush
-.L2523:
+.L2586:
 	ldr	w0, [x21, #:lo12:.LANCHOR135]
-	cbnz	w0, .L2524
+	cbnz	w0, .L2587
 	adrp	x0, .LANCHOR138
 	add	x0, x0, :lo12:.LANCHOR138
 	ldr	w1, [x0, 96]
@@ -17277,24 +17608,24 @@ FtlGcFreeTempBlock:
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
-.L2524:
+.L2587:
 	str	wzr, [x21, #:lo12:.LANCHOR135]
 	mov	w0, 1
-.L2519:
+.L2582:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldr	x27, [sp, 80]
+	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2522:
+.L2585:
 	str	wzr, [x21, #:lo12:.LANCHOR135]
 	mov	w0, 65535
 	ldrh	w1, [x19, #:lo12:.LANCHOR93]
 	add	x21, x19, :lo12:.LANCHOR93
 	cmp	w1, w0
-	beq	.L2545
+	beq	.L2609
 	bl	FtlCacheWriteBack
 	adrp	x20, .LANCHOR110
 	adrp	x0, .LANCHOR52
@@ -17304,11 +17635,11 @@ FtlGcFreeTempBlock:
 	ldrh	w3, [x0, #:lo12:.LANCHOR52]
 	mul	w1, w1, w3
 	cmp	w2, w1
-	beq	.L2526
+	beq	.L2589
 	mov	w2, 163
-	adrp	x1, .LANCHOR239
+	adrp	x1, .LANCHOR242
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR239
+	add	x1, x1, :lo12:.LANCHOR242
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -17316,18 +17647,18 @@ FtlGcFreeTempBlock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2526:
+.L2589:
 	add	x0, x19, :lo12:.LANCHOR93
-	adrp	x23, .LANCHOR83
+	adrp	x22, .LANCHOR83
 	ldrh	w3, [x21, #:lo12:.LANCHOR52]
 	adrp	x25, .LANCHOR72
 	ldrh	w2, [x19, #:lo12:.LANCHOR93]
-	adrp	x26, .LANCHOR239
+	add	x26, x20, :lo12:.LANCHOR110
 	ldrb	w0, [x0, 7]
 	add	x25, x25, :lo12:.LANCHOR72
-	ldr	x1, [x23, #:lo12:.LANCHOR83]
-	add	x26, x26, :lo12:.LANCHOR239
+	ldr	x1, [x22, #:lo12:.LANCHOR83]
 	mov	w21, 0
+	adrp	x27, .LANCHOR111
 	mul	w0, w0, w3
 	strh	w0, [x1, x2, lsl 1]
 	adrp	x1, .LANCHOR161
@@ -17335,27 +17666,27 @@ FtlGcFreeTempBlock:
 	ldr	w2, [x1, #:lo12:.LANCHOR161]
 	add	w0, w0, w2
 	str	w0, [x1, #:lo12:.LANCHOR161]
-.L2527:
-	ldrh	w0, [x20, #:lo12:.LANCHOR110]
+.L2590:
+	ldrh	w0, [x26]
 	cmp	w0, w21
-	bhi	.L2531
+	bhi	.L2594
 	mov	w0, -1
 	bl	decrement_vpc_count
 	adrp	x0, .LANCHOR15
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L2532
+	cbz	w0, .L2595
 	ldrh	w1, [x19, #:lo12:.LANCHOR93]
-	adrp	x0, .LC65
-	add	x0, x0, :lo12:.LC65
+	adrp	x0, .LC70
+	add	x0, x0, :lo12:.LC70
 	bl	printf
-.L2532:
+.L2595:
 	ldrh	w0, [x19, #:lo12:.LANCHOR93]
-	ldr	x2, [x23, #:lo12:.LANCHOR83]
+	ldr	x2, [x22, #:lo12:.LANCHOR83]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L2533
+	cbz	w1, .L2596
 	bl	INSERT_DATA_LIST
-.L2534:
+.L2597:
 	adrp	x0, .LANCHOR108
 	mov	w21, -1
 	strh	wzr, [x20, #:lo12:.LANCHOR110]
@@ -17363,73 +17694,63 @@ FtlGcFreeTempBlock:
 	strh	wzr, [x0, #:lo12:.LANCHOR108]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	adrp	x0, .LANCHOR204
-	strh	w21, [x0, #:lo12:.LANCHOR204]
+	adrp	x0, .LANCHOR205
+	strh	w21, [x0, #:lo12:.LANCHOR205]
 	adrp	x0, .LANCHOR88
 	ldrh	w1, [x0, #:lo12:.LANCHOR88]
-	adrp	x0, .LANCHOR223
-	ldrh	w0, [x0, #:lo12:.LANCHOR223]
+	adrp	x0, .LANCHOR224
+	ldrh	w0, [x0, #:lo12:.LANCHOR224]
 	add	w0, w0, w0, lsl 1
 	cmp	w1, w0, lsr 2
-	ble	.L2545
+	ble	.L2609
 	adrp	x0, .LANCHOR176
 	mov	w1, 20
 	strh	w1, [x0, #:lo12:.LANCHOR176]
-.L2545:
+.L2609:
 	mov	w0, 0
-	b	.L2519
-.L2531:
-	adrp	x0, .LANCHOR111
+	b	.L2582
+.L2594:
 	mov	w24, 12
-	ldr	x27, [x0, #:lo12:.LANCHOR111]
+	ldr	x28, [x27, #:lo12:.LANCHOR111]
+	ldr	w1, [x25]
 	umull	x24, w21, w24
-	ldr	w0, [x25]
-	add	x22, x27, x24
-	ldr	w1, [x22, 8]
-	cmp	w1, w0
-	bcc	.L2528
-	mov	w2, 168
-	mov	x1, x26
-	adrp	x0, .LC5
-	add	x0, x0, :lo12:.LC5
-	bl	printf
-	adrp	x1, .LC6
-	adrp	x0, .LC7
-	add	x1, x1, :lo12:.LC6
-	add	x0, x0, :lo12:.LC7
-	bl	printf
-.L2528:
-	ldr	w0, [x22, 8]
+	add	x23, x28, x24
+	ldr	w0, [x23, 8]
+	cmp	w0, w1
+	bcc	.L2591
+.L2607:
+	ldrh	w0, [x19, #:lo12:.LANCHOR93]
+	b	.L2608
+.L2591:
 	add	x1, x29, 108
 	mov	w2, 0
 	bl	log2phys
-	ldr	w0, [x27, x24]
+	ldr	w0, [x28, x24]
 	ldr	w1, [x29, 108]
 	cmp	w0, w1
-	bne	.L2529
+	bne	.L2593
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	mov	w24, w0
-	ldr	w0, [x22, 8]
+	ldr	w0, [x23, 8]
 	mov	w2, 1
-	add	x1, x22, 4
+	add	x1, x23, 4
 	bl	log2phys
 	mov	w0, w24
-.L2544:
+.L2608:
 	bl	decrement_vpc_count
-.L2530:
+	b	.L2592
+.L2593:
+	ldr	w0, [x23, 4]
+	cmp	w1, w0
+	bne	.L2607
+.L2592:
 	add	w21, w21, 1
 	and	w21, w21, 65535
-	b	.L2527
-.L2529:
-	ldr	w0, [x22, 4]
-	cmp	w1, w0
-	beq	.L2530
-	ldrh	w0, [x19, #:lo12:.LANCHOR93]
-	b	.L2544
-.L2533:
+	b	.L2590
+.L2596:
 	bl	INSERT_FREE_LIST
-	b	.L2534
+	b	.L2597
 	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
 	.section	.text.Ftl_get_new_temp_ppa,"ax",@progbits
 	.align	2
@@ -17444,11 +17765,11 @@ Ftl_get_new_temp_ppa:
 	mov	x19, x0
 	ldrh	w3, [x0, #:lo12:.LANCHOR93]
 	cmp	w3, w2
-	beq	.L2547
+	beq	.L2611
 	add	x1, x0, :lo12:.LANCHOR93
 	ldrh	w0, [x1, 4]
-	cbnz	w0, .L2548
-.L2547:
+	cbnz	w0, .L2612
+.L2611:
 	bl	FtlCacheWriteBack
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
@@ -17463,7 +17784,7 @@ Ftl_get_new_temp_ppa:
 	mov	w0, 0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L2548:
+.L2612:
 	add	x0, x19, :lo12:.LANCHOR93
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -17476,29 +17797,29 @@ Ftl_get_new_temp_ppa:
 Ftl_gc_temp_data_write_back:
 	adrp	x0, .LANCHOR76
 	ldr	w0, [x0, #:lo12:.LANCHOR76]
-	cbz	w0, .L2551
+	cbz	w0, .L2615
 	mov	w0, 0
 	ret
-.L2554:
+.L2618:
 	mov	w0, 0
-.L2550:
+.L2614:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2551:
+.L2615:
 	stp	x29, x30, [sp, -32]!
 	adrp	x0, .LANCHOR15
 	add	x29, sp, 0
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR102
-	cbz	w0, .L2553
+	cbz	w0, .L2617
 	ldr	w0, [x19, #:lo12:.LANCHOR102]
-	tbz	x0, 0, .L2553
+	tbz	x0, 0, .L2617
 	adrp	x0, .LANCHOR93+4
 	ldrh	w0, [x0, #:lo12:.LANCHOR93+4]
-	cbnz	w0, .L2554
-.L2553:
+	cbnz	w0, .L2618
+.L2617:
 	adrp	x20, .LANCHOR181
 	ldr	w1, [x19, #:lo12:.LANCHOR102]
 	mov	w3, 0
@@ -17508,26 +17829,27 @@ Ftl_gc_temp_data_write_back:
 	bl	FlashProgPages
 	mov	w11, 0
 	mov	w12, 56
-.L2555:
+.L2619:
 	ldr	w1, [x19]
 	cmp	w11, w1
-	bcc	.L2557
+	bcc	.L2621
 	ldr	x0, [x20, #:lo12:.LANCHOR181]
 	bl	FtlGcBufFree
 	str	wzr, [x19]
 	adrp	x0, .LANCHOR93+4
 	ldrh	w0, [x0, #:lo12:.LANCHOR93+4]
-	cbnz	w0, .L2554
+	cbnz	w0, .L2618
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
-	b	.L2567
-.L2557:
+	b	.L2631
+.L2621:
 	umull	x0, w11, w12
 	ldr	x2, [x20, #:lo12:.LANCHOR181]
 	add	x1, x2, x0
 	ldr	w2, [x2, x0]
+	ldr	x3, [x1, 16]
 	cmn	w2, #1
-	bne	.L2556
+	bne	.L2620
 	adrp	x0, .LANCHOR93
 	adrp	x3, .LANCHOR83
 	ldrh	w4, [x0, #:lo12:.LANCHOR93]
@@ -17544,17 +17866,16 @@ Ftl_gc_temp_data_write_back:
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
 	bl	FtlGcPageVarInit
-.L2567:
+.L2631:
 	mov	w0, 1
-	b	.L2550
-.L2556:
-	ldr	x0, [x1, 16]
+	b	.L2614
+.L2620:
 	ldr	w1, [x1, 4]
-	ldp	w2, w0, [x0, 8]
+	ldp	w2, w0, [x3, 8]
 	bl	FtlGcUpdatePage
 	add	w11, w11, 1
 	and	w11, w11, 65535
-	b	.L2555
+	b	.L2619
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
 	.section	.text.FtlGcPageRecovery,"ax",@progbits
 	.align	2
@@ -17573,7 +17894,7 @@ FtlGcPageRecovery:
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bcc	.L2568
+	bcc	.L2632
 	adrp	x0, .LANCHOR127
 	add	x0, x0, :lo12:.LANCHOR127
 	bl	FtlMapBlkWriteDumpData
@@ -17581,7 +17902,7 @@ FtlGcPageRecovery:
 	bl	FtlGcFreeTempBlock
 	adrp	x0, .LANCHOR135
 	str	wzr, [x0, #:lo12:.LANCHOR135]
-.L2568:
+.L2632:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -17592,12 +17913,12 @@ FtlGcPageRecovery:
 	.type	FtlPowerLostRecovery, %function
 FtlPowerLostRecovery:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR236
+	adrp	x0, .LANCHOR239
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	adrp	x19, .LANCHOR91
 	add	x19, x19, :lo12:.LANCHOR91
-	str	wzr, [x0, #:lo12:.LANCHOR236]
+	str	wzr, [x0, #:lo12:.LANCHOR239]
 	mov	x0, x19
 	bl	FtlRecoverySuperblock
 	mov	x0, x19
@@ -17622,33 +17943,33 @@ FtlPowerLostRecovery:
 	.type	FtlSysBlkInit, %function
 FtlSysBlkInit:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR234
+	adrp	x0, .LANCHOR237
 	mov	w1, -1
 	add	x29, sp, 0
-	strh	w1, [x0, #:lo12:.LANCHOR234]
+	strh	w1, [x0, #:lo12:.LANCHOR237]
 	adrp	x0, .LANCHOR39
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR235
+	adrp	x20, .LANCHOR238
 	ldrh	w0, [x0, #:lo12:.LANCHOR39]
-	strh	wzr, [x20, #:lo12:.LANCHOR235]
+	strh	wzr, [x20, #:lo12:.LANCHOR238]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlScanSysBlk
-	adrp	x0, .LANCHOR209
-	ldrh	w1, [x0, #:lo12:.LANCHOR209]
+	adrp	x0, .LANCHOR210
+	ldrh	w1, [x0, #:lo12:.LANCHOR210]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2574
-.L2576:
+	bne	.L2638
+.L2640:
 	mov	w19, -1
-.L2573:
+.L2637:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2574:
+.L2638:
 	bl	FtlLoadSysInfo
 	mov	w19, w0
-	cbnz	w0, .L2576
+	cbnz	w0, .L2640
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -17658,25 +17979,25 @@ FtlSysBlkInit:
 	bl	FtlPowerLostRecovery
 	mov	w0, 1
 	bl	FtlUpdateVaildLpn
-	adrp	x2, .LANCHOR67
+	adrp	x0, .LANCHOR67
+	ldrh	w2, [x0, #:lo12:.LANCHOR67]
 	adrp	x0, .LANCHOR96
-	mov	x3, 4
-	ldrh	w2, [x2, #:lo12:.LANCHOR67]
-	ldr	x0, [x0, #:lo12:.LANCHOR96]
-	add	x2, x3, x2, uxtw 4
-	add	x1, x0, 4
-	add	x0, x0, x2
-.L2577:
-	cmp	x1, x0
-	bne	.L2579
-	ldrh	w0, [x20, #:lo12:.LANCHOR235]
-	cbnz	w0, .L2578
-	bl	l2p_flush
-	b	.L2582
-.L2579:
-	ldr	w2, [x1], 16
-	tbz	w2, #31, .L2577
-.L2578:
+	ldr	x1, [x0, #:lo12:.LANCHOR96]
+	mov	w0, 0
+	add	x1, x1, 4
+.L2641:
+	cmp	w0, w2
+	bge	.L2646
+	ldr	w3, [x1], 16
+	tbz	w3, #31, .L2642
+.L2646:
+	adrp	x3, .LANCHOR160
+	cmp	w0, w2
+	ldr	w1, [x3, #:lo12:.LANCHOR160]
+	add	w1, w1, 32
+	str	w1, [x3, #:lo12:.LANCHOR160]
+	bge	.L2648
+.L2643:
 	adrp	x0, .LANCHOR83
 	adrp	x1, .LANCHOR91
 	ldr	x2, [x0, #:lo12:.LANCHOR83]
@@ -17711,9 +18032,17 @@ FtlSysBlkInit:
 	strh	w1, [x0, 30]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L2582:
+.L2650:
 	bl	FtlVpcTblFlush
-	b	.L2573
+	b	.L2637
+.L2642:
+	add	w0, w0, 1
+	b	.L2641
+.L2648:
+	ldrh	w0, [x20, #:lo12:.LANCHOR238]
+	cbnz	w0, .L2643
+	bl	l2p_flush
+	b	.L2650
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.section	.text.FtlLowFormat,"ax",@progbits
 	.align	2
@@ -17722,7 +18051,7 @@ FtlSysBlkInit:
 FtlLowFormat:
 	adrp	x0, .LANCHOR76
 	ldr	w0, [x0, #:lo12:.LANCHOR76]
-	cbnz	w0, .L2615
+	cbnz	w0, .L2683
 	stp	x29, x30, [sp, -80]!
 	adrp	x0, .LANCHOR195
 	mov	w1, 0
@@ -17750,9 +18079,9 @@ FtlLowFormat:
 	ldrh	w0, [x25, #:lo12:.LANCHOR39]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	w0, .L2586
+	cbz	w0, .L2654
 	bl	FtlMakeBbt
-.L2586:
+.L2654:
 	adrp	x22, .LANCHOR55
 	adrp	x0, .LANCHOR186
 	mov	w6, 23752
@@ -17763,97 +18092,97 @@ FtlLowFormat:
 	lsl	w1, w1, 7
 	ldr	x5, [x0, #:lo12:.LANCHOR187]
 	mov	w0, 0
-.L2587:
+.L2655:
 	cmp	w0, w1
-	blt	.L2588
+	blt	.L2656
 	adrp	x21, .LANCHOR40
 	adrp	x19, .LANCHOR41
 	add	x26, x19, :lo12:.LANCHOR41
 	mov	w23, 0
 	ldrh	w24, [x21, #:lo12:.LANCHOR40]
-.L2589:
+.L2657:
 	ldrh	w0, [x26]
 	cmp	w0, w24
-	bhi	.L2590
+	bhi	.L2658
 	adrp	x24, .LANCHOR38
 	sub	w1, w23, #2
 	ldrh	w0, [x24, #:lo12:.LANCHOR38]
 	cmp	w1, w0, lsl 1
-	bgt	.L2591
-.L2595:
+	bgt	.L2659
+.L2663:
 	add	x26, x21, :lo12:.LANCHOR40
 	mov	w23, 0
 	mov	w25, 0
-.L2592:
+.L2660:
 	ldrh	w0, [x26]
 	cmp	w0, w25
-	bhi	.L2596
+	bhi	.L2664
 	adrp	x0, .LANCHOR73
 	ldrh	w1, [x19, #:lo12:.LANCHOR41]
 	ldrh	w3, [x24, #:lo12:.LANCHOR38]
 	str	w1, [x0, #:lo12:.LANCHOR73]
 	adrp	x0, .LANCHOR42
-	adrp	x1, .LANCHOR223
+	adrp	x1, .LANCHOR224
 	ldr	w2, [x0, #:lo12:.LANCHOR42]
 	adrp	x0, .LANCHOR72
 	udiv	w6, w2, w3
 	ubfx	x5, x6, 5, 16
 	str	w6, [x0, #:lo12:.LANCHOR72]
 	add	w4, w5, 36
-	strh	w4, [x1, #:lo12:.LANCHOR223]
+	strh	w4, [x1, #:lo12:.LANCHOR224]
 	mov	w4, 24
 	mul	w4, w3, w4
 	cmp	w23, w4
-	ble	.L2597
+	ble	.L2665
 	sub	w2, w2, w23
 	udiv	w2, w2, w3
 	str	w2, [x0, #:lo12:.LANCHOR72]
 	lsr	w2, w2, 5
 	add	w2, w2, 24
-	strh	w2, [x1, #:lo12:.LANCHOR223]
-.L2597:
+	strh	w2, [x1, #:lo12:.LANCHOR224]
+.L2665:
 	adrp	x2, .LANCHOR28
 	ldr	w2, [x2, #:lo12:.LANCHOR28]
 	cmp	w2, 1
-	bne	.L2598
+	bne	.L2666
 	udiv	w4, w23, w3
-	ldrh	w2, [x1, #:lo12:.LANCHOR223]
+	ldrh	w2, [x1, #:lo12:.LANCHOR224]
 	add	w4, w4, w2
 	add	w4, w2, w4, asr 2
-	strh	w4, [x1, #:lo12:.LANCHOR223]
-.L2598:
+	strh	w4, [x1, #:lo12:.LANCHOR224]
+.L2666:
 	adrp	x2, .LANCHOR15
 	ldrb	w2, [x2, #:lo12:.LANCHOR15]
-	cbz	w2, .L2599
+	cbz	w2, .L2667
 	udiv	w4, w23, w3
-	ldrh	w2, [x1, #:lo12:.LANCHOR223]
+	ldrh	w2, [x1, #:lo12:.LANCHOR224]
 	add	w4, w4, w2
 	add	w4, w2, w4, asr 2
-	strh	w4, [x1, #:lo12:.LANCHOR223]
-.L2599:
+	strh	w4, [x1, #:lo12:.LANCHOR224]
+.L2667:
 	adrp	x2, .LANCHOR49
 	ldrh	w2, [x2, #:lo12:.LANCHOR49]
-	cbz	w2, .L2601
-	ldrh	w4, [x1, #:lo12:.LANCHOR223]
+	cbz	w2, .L2669
+	ldrh	w4, [x1, #:lo12:.LANCHOR224]
 	add	w4, w4, w2, lsr 1
-	strh	w4, [x1, #:lo12:.LANCHOR223]
+	strh	w4, [x1, #:lo12:.LANCHOR224]
 	mul	w4, w2, w3
 	cmp	w23, w4
-	bge	.L2601
+	bge	.L2669
 	add	w2, w2, 32
 	str	w6, [x0, #:lo12:.LANCHOR72]
 	add	w2, w5, w2
-	strh	w2, [x1, #:lo12:.LANCHOR223]
-.L2601:
-	ldrh	w2, [x1, #:lo12:.LANCHOR223]
-	adrp	x25, .LANCHOR222
+	strh	w2, [x1, #:lo12:.LANCHOR224]
+.L2669:
+	ldrh	w2, [x1, #:lo12:.LANCHOR224]
+	adrp	x25, .LANCHOR223
 	ldr	w1, [x0, #:lo12:.LANCHOR72]
 	adrp	x24, .LANCHOR83
 	mov	w23, -1
 	sub	w1, w1, w2
 	mul	w3, w1, w3
 	adrp	x1, .LANCHOR52
-	str	w3, [x25, #:lo12:.LANCHOR222]
+	str	w3, [x25, #:lo12:.LANCHOR223]
 	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	mul	w3, w1, w3
 	str	w3, [x0, #:lo12:.LANCHOR72]
@@ -17868,11 +18197,11 @@ FtlLowFormat:
 	lsl	w2, w2, 1
 	bl	ftl_memset
 	adrp	x0, .LANCHOR100
-	adrp	x1, .LANCHOR204
+	adrp	x1, .LANCHOR205
 	ldrh	w2, [x21, #:lo12:.LANCHOR40]
 	str	wzr, [x0, #:lo12:.LANCHOR100]
-	add	x0, x1, :lo12:.LANCHOR204
-	strh	w23, [x1, #:lo12:.LANCHOR204]
+	add	x0, x1, :lo12:.LANCHOR205
+	strh	w23, [x1, #:lo12:.LANCHOR205]
 	mov	w1, 255
 	lsr	w2, w2, 3
 	strh	wzr, [x0, 2]
@@ -17883,25 +18212,25 @@ FtlLowFormat:
 	strh	wzr, [x0, #:lo12:.LANCHOR91]
 	mov	w0, 1
 	strb	w0, [x19, 8]
-	adrp	x0, .LANCHOR0
+	adrp	x0, .LANCHOR1
 	strh	wzr, [x19, 2]
-	ldr	x0, [x0, #:lo12:.LANCHOR0]
+	ldr	x0, [x0, #:lo12:.LANCHOR1]
 	strb	wzr, [x19, 6]
 	bl	ftl_memset
-.L2603:
+.L2671:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L2604
+	cbnz	w1, .L2672
 	ldr	x1, [x24, #:lo12:.LANCHOR83]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L2603
-.L2588:
+	b	.L2671
+.L2656:
 	ubfiz	x3, x0, 2, 16
 	mvn	w2, w0
 	orr	w2, w0, w2, lsl 16
@@ -17909,8 +18238,8 @@ FtlLowFormat:
 	and	w0, w0, 65535
 	str	w2, [x4, x3]
 	str	w6, [x5, x3]
-	b	.L2587
-.L2590:
+	b	.L2655
+.L2658:
 	mov	w0, w24
 	mov	w1, 1
 	add	w24, w24, 1
@@ -17918,8 +18247,8 @@ FtlLowFormat:
 	add	w23, w23, w0
 	and	w24, w24, 65535
 	and	w23, w23, 65535
-	b	.L2589
-.L2591:
+	b	.L2657
+.L2659:
 	udiv	w0, w23, w0
 	adrp	x1, .LANCHOR65
 	ldr	w23, [x1, #:lo12:.LANCHOR65]
@@ -17929,17 +18258,17 @@ FtlLowFormat:
 	add	x25, x19, :lo12:.LANCHOR41
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	w23, [x21, #:lo12:.LANCHOR40]
-.L2593:
+.L2661:
 	ldrh	w0, [x25]
 	cmp	w0, w23
-	bls	.L2595
+	bls	.L2663
 	mov	w0, w23
 	add	w23, w23, 1
 	mov	w1, 1
 	and	w23, w23, 65535
 	bl	FtlLowFormatEraseBlock
-	b	.L2593
-.L2596:
+	b	.L2661
+.L2664:
 	mov	w0, w25
 	mov	w1, 0
 	add	w25, w25, 1
@@ -17947,8 +18276,8 @@ FtlLowFormat:
 	add	w23, w23, w0
 	and	w25, w25, 65535
 	and	w23, w23, 65535
-	b	.L2592
-.L2604:
+	b	.L2660
+.L2672:
 	ldr	w1, [x20, #:lo12:.LANCHOR159]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
@@ -17968,20 +18297,20 @@ FtlLowFormat:
 	mov	w1, 1
 	strb	wzr, [x0, 6]
 	strb	w1, [x0, 8]
-.L2605:
+.L2673:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L2606
+	cbnz	w1, .L2674
 	ldr	x1, [x24, #:lo12:.LANCHOR83]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L2605
-.L2606:
+	b	.L2673
+.L2674:
 	ldr	w1, [x20, #:lo12:.LANCHOR159]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
@@ -17994,10 +18323,10 @@ FtlLowFormat:
 	adrp	x0, .LANCHOR93
 	strh	w19, [x0, #:lo12:.LANCHOR93]
 	bl	FtlFreeSysBlkQueueOut
-	adrp	x2, .LANCHOR209
-	add	x1, x2, :lo12:.LANCHOR209
-	strh	w0, [x2, #:lo12:.LANCHOR209]
-	ldr	w0, [x25, #:lo12:.LANCHOR222]
+	adrp	x2, .LANCHOR210
+	add	x1, x2, :lo12:.LANCHOR210
+	strh	w0, [x2, #:lo12:.LANCHOR210]
+	ldr	w0, [x25, #:lo12:.LANCHOR223]
 	strh	w0, [x1, 6]
 	ldr	w0, [x20, #:lo12:.LANCHOR159]
 	str	w0, [x1, 8]
@@ -18007,11 +18336,11 @@ FtlLowFormat:
 	str	w0, [x20, #:lo12:.LANCHOR159]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	w0, .L2585
-	adrp	x0, .LANCHOR230
+	cbnz	w0, .L2653
+	adrp	x0, .LANCHOR232
 	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR230]
-.L2585:
+	str	w1, [x0, #:lo12:.LANCHOR232]
+.L2653:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -18019,7 +18348,7 @@ FtlLowFormat:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2615:
+.L2683:
 	mov	w0, 0
 	ret
 	.size	FtlLowFormat, .-FtlLowFormat
@@ -18030,8 +18359,8 @@ FtlLowFormat:
 rk_ftl_garbage_collect:
 	adrp	x1, .LANCHOR76
 	ldr	w1, [x1, #:lo12:.LANCHOR76]
-	cbnz	w1, .L2670
-	stp	x29, x30, [sp, -192]!
+	cbnz	w1, .L2745
+	stp	x29, x30, [sp, -176]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	adrp	x21, .LANCHOR171
@@ -18040,228 +18369,228 @@ rk_ftl_garbage_collect:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w1, .L2672
+	cbnz	w1, .L2747
 	adrp	x1, .LANCHOR85
 	ldrh	w1, [x1, #:lo12:.LANCHOR85]
 	cmp	w1, 47
-	bls	.L2672
+	bls	.L2747
 	adrp	x5, .LANCHOR113
 	mov	w2, 65535
 	ldrh	w8, [x5, #:lo12:.LANCHOR113]
 	cmp	w8, w2
-	beq	.L2620
+	beq	.L2688
 	adrp	x7, .LANCHOR112
 	ldrh	w1, [x7, #:lo12:.LANCHOR112]
 	cmp	w1, w2
-	bne	.L2620
+	bne	.L2688
 	adrp	x3, .LANCHOR114
 	ldrh	w6, [x3, #:lo12:.LANCHOR114]
 	cmp	w6, w1
-	beq	.L2620
+	beq	.L2688
 	adrp	x2, .LANCHOR115
 	ldrh	w4, [x2, #:lo12:.LANCHOR115]
 	cmp	w4, w1
-	beq	.L2620
+	beq	.L2688
 	mov	w1, -1
 	strh	w8, [x7, #:lo12:.LANCHOR112]
 	strh	w6, [x5, #:lo12:.LANCHOR113]
 	strh	w4, [x3, #:lo12:.LANCHOR114]
 	strh	w1, [x2, #:lo12:.LANCHOR115]
-.L2620:
-	cbnz	w0, .L2673
+.L2688:
+	cbnz	w0, .L2748
 	adrp	x0, .LANCHOR88
 	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w0, 24
-	bhi	.L2674
+	bhi	.L2749
 	adrp	x1, .LANCHOR52
 	cmp	w0, 16
 	ldrh	w20, [x1, #:lo12:.LANCHOR52]
-	bls	.L2623
+	bls	.L2691
 	lsr	w20, w20, 5
-.L2622:
+.L2690:
 	adrp	x2, .LANCHOR176
 	mov	x3, x2
 	ldrh	w1, [x2, #:lo12:.LANCHOR176]
 	cmp	w1, w0
-	bcs	.L2626
+	bcs	.L2694
 	adrp	x0, .LANCHOR93
 	mov	w1, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w0, w1
-	bne	.L2627
+	bne	.L2695
 	adrp	x1, .LANCHOR112
 	ldrh	w1, [x1, #:lo12:.LANCHOR112]
 	cmp	w1, w0
-	bne	.L2627
-	adrp	x0, .LANCHOR240
-	ldrh	w0, [x0, #:lo12:.LANCHOR240]
-	cbnz	w0, .L2628
+	bne	.L2695
+	adrp	x0, .LANCHOR243
+	ldrh	w0, [x0, #:lo12:.LANCHOR243]
+	cbnz	w0, .L2696
 	adrp	x1, .LANCHOR72
 	adrp	x4, .LANCHOR100
 	ldr	w1, [x1, #:lo12:.LANCHOR72]
 	ldr	w4, [x4, #:lo12:.LANCHOR100]
 	add	w1, w1, w1, lsl 1
 	cmp	w4, w1, lsr 2
-	bcs	.L2629
-.L2628:
-	adrp	x1, .LANCHOR223
-	ldrh	w1, [x1, #:lo12:.LANCHOR223]
+	bcs	.L2697
+.L2696:
+	adrp	x1, .LANCHOR224
+	ldrh	w1, [x1, #:lo12:.LANCHOR224]
 	add	w1, w1, w1, lsl 1
 	asr	w1, w1, 2
 	strh	w1, [x3, #:lo12:.LANCHOR176]
-.L2630:
+.L2698:
 	adrp	x1, .LANCHOR172
 	str	wzr, [x1, #:lo12:.LANCHOR172]
-.L2618:
+.L2686:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 192
+	ldp	x29, x30, [sp], 176
 	ret
-.L2623:
+.L2691:
 	cmp	w0, 12
-	bls	.L2624
+	bls	.L2692
 	lsr	w20, w20, 4
-	b	.L2622
-.L2624:
+	b	.L2690
+.L2692:
 	cmp	w0, 8
-	bls	.L2622
+	bls	.L2690
 	lsr	w20, w20, 2
-	b	.L2622
-.L2674:
+	b	.L2690
+.L2749:
 	mov	w20, 1
-	b	.L2622
-.L2629:
+	b	.L2690
+.L2697:
 	mov	w1, 18
 	strh	w1, [x2, #:lo12:.LANCHOR176]
-	b	.L2630
-.L2627:
-	adrp	x0, .LANCHOR223
-	ldrh	w0, [x0, #:lo12:.LANCHOR223]
+	b	.L2698
+.L2695:
+	adrp	x0, .LANCHOR224
+	ldrh	w0, [x0, #:lo12:.LANCHOR224]
 	add	w0, w0, w0, lsl 1
 	asr	w0, w0, 2
 	strh	w0, [x3, #:lo12:.LANCHOR176]
-.L2626:
+.L2694:
 	adrp	x0, .LANCHOR116
 	ldrh	w0, [x0, #:lo12:.LANCHOR116]
-	cbz	w0, .L2621
+	cbz	w0, .L2689
 	add	w20, w20, 32
 	and	w20, w20, 65535
-.L2621:
-	adrp	x19, .LANCHOR204
+.L2689:
+	adrp	x19, .LANCHOR205
 	mov	w0, 65535
-	ldrh	w2, [x19, #:lo12:.LANCHOR204]
+	ldrh	w2, [x19, #:lo12:.LANCHOR205]
 	cmp	w2, w0
-	bne	.L2633
+	bne	.L2701
 	adrp	x0, .LANCHOR112
 	ldrh	w1, [x0, #:lo12:.LANCHOR112]
 	cmp	w1, w2
-	beq	.L2634
+	beq	.L2702
 	adrp	x2, .LANCHOR83
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR83]
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L2635
+	cbnz	w1, .L2703
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR112]
-.L2635:
+.L2703:
 	ldrh	w1, [x0, #:lo12:.LANCHOR112]
-	strh	w1, [x19, #:lo12:.LANCHOR204]
+	strh	w1, [x19, #:lo12:.LANCHOR205]
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR112]
-.L2634:
-	add	x0, x19, :lo12:.LANCHOR204
+.L2702:
+	add	x0, x19, :lo12:.LANCHOR205
 	mov	w1, 65535
 	strb	wzr, [x0, 8]
-	ldrh	w0, [x19, #:lo12:.LANCHOR204]
+	ldrh	w0, [x19, #:lo12:.LANCHOR205]
 	cmp	w0, w1
-	beq	.L2633
+	beq	.L2701
 	bl	IsBlkInGcList
-	cbz	w0, .L2637
+	cbz	w0, .L2705
 	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR204]
-.L2637:
+	strh	w0, [x19, #:lo12:.LANCHOR205]
+.L2705:
 	adrp	x0, .LANCHOR15
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L2638
-	ldrh	w0, [x19, #:lo12:.LANCHOR204]
-	add	x3, x19, :lo12:.LANCHOR204
+	cbz	w0, .L2706
+	ldrh	w0, [x19, #:lo12:.LANCHOR205]
+	add	x3, x19, :lo12:.LANCHOR205
 	bl	ftl_get_blk_mode
 	strb	w0, [x3, 8]
-.L2638:
-	ldrh	w1, [x19, #:lo12:.LANCHOR204]
+.L2706:
+	ldrh	w1, [x19, #:lo12:.LANCHOR205]
 	mov	w0, 65535
-	add	x22, x19, :lo12:.LANCHOR204
+	add	x22, x19, :lo12:.LANCHOR205
 	cmp	w1, w0
-	beq	.L2633
+	beq	.L2701
 	mov	x0, x22
 	bl	make_superblock
-	adrp	x0, .LANCHOR241
-	ldrh	w1, [x19, #:lo12:.LANCHOR204]
+	adrp	x0, .LANCHOR244
+	ldrh	w1, [x19, #:lo12:.LANCHOR205]
 	strh	wzr, [x22, 2]
-	strh	wzr, [x0, #:lo12:.LANCHOR241]
+	strh	wzr, [x0, #:lo12:.LANCHOR244]
 	adrp	x0, .LANCHOR83
 	strb	wzr, [x22, 6]
 	ldr	x0, [x0, #:lo12:.LANCHOR83]
 	ldrh	w1, [x0, x1, lsl 1]
-	adrp	x0, .LANCHOR242
-	strh	w1, [x0, #:lo12:.LANCHOR242]
-.L2633:
-	adrp	x0, .LANCHOR91
-	ldrh	w1, [x19, #:lo12:.LANCHOR204]
-	str	x0, [x29, 144]
-	ldrh	w2, [x0, #:lo12:.LANCHOR91]
-	cmp	w2, w1
-	beq	.L2639
-	adrp	x0, .LANCHOR92
-	str	x0, [x29, 136]
-	ldrh	w2, [x0, #:lo12:.LANCHOR92]
-	cmp	w2, w1
-	beq	.L2639
+	adrp	x0, .LANCHOR245
+	strh	w1, [x0, #:lo12:.LANCHOR245]
+.L2701:
+	adrp	x1, .LANCHOR91
+	ldrh	w0, [x19, #:lo12:.LANCHOR205]
+	str	x1, [x29, 128]
+	ldrh	w2, [x1, #:lo12:.LANCHOR91]
+	cmp	w2, w0
+	beq	.L2707
+	adrp	x1, .LANCHOR92
+	ldrh	w1, [x1, #:lo12:.LANCHOR92]
+	cmp	w1, w0
+	beq	.L2707
+	adrp	x1, .LANCHOR93
+	ldrh	w1, [x1, #:lo12:.LANCHOR93]
+	cmp	w1, w0
+	bne	.L2708
+.L2707:
+	mov	w0, -1
+	strh	w0, [x19, #:lo12:.LANCHOR205]
+.L2708:
 	adrp	x25, .LANCHOR178
 	add	x26, x25, :lo12:.LANCHOR178
-.L2640:
-	ldrh	w1, [x19, #:lo12:.LANCHOR204]
+.L2744:
+	ldrh	w1, [x19, #:lo12:.LANCHOR205]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2641
+	bne	.L2709
 	adrp	x0, .LANCHOR172
 	adrp	x22, .LANCHOR52
 	add	x22, x22, :lo12:.LANCHOR52
 	str	wzr, [x0, #:lo12:.LANCHOR172]
-.L2642:
+.L2710:
 	ldrh	w5, [x25, #:lo12:.LANCHOR178]
 	add	x7, x25, :lo12:.LANCHOR178
 	mov	w0, w5
 	bl	List_get_gc_head_node
 	and	w6, w0, 65535
-	strh	w6, [x19, #:lo12:.LANCHOR204]
+	strh	w6, [x19, #:lo12:.LANCHOR205]
 	mov	w0, 65535
 	cmp	w6, w0
-	bne	.L2643
+	bne	.L2711
 	strh	wzr, [x7]
 	mov	w0, 8
-	b	.L2618
-.L2673:
+	b	.L2686
+.L2748:
 	mov	w20, 1
-	b	.L2621
-.L2639:
-	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR204]
-.L2709:
-	adrp	x0, .LANCHOR240
-	ldrh	w0, [x0, #:lo12:.LANCHOR240]
-	b	.L2618
-.L2643:
+	b	.L2689
+.L2711:
 	mov	w0, w6
 	bl	IsBlkInGcList
 	add	w5, w5, 1
-	cbz	w0, .L2644
+	cbz	w0, .L2712
 	strh	w5, [x25, #:lo12:.LANCHOR178]
-	b	.L2642
-.L2644:
+	b	.L2710
+.L2712:
 	adrp	x23, .LANCHOR83
 	adrp	x4, .LANCHOR38
 	ldrh	w0, [x22]
@@ -18273,54 +18602,57 @@ rk_ftl_garbage_collect:
 	ldrh	w3, [x2, x1]
 	mul	w0, w0, w4
 	cmp	w3, w0, asr 1
-	bgt	.L2646
+	bgt	.L2714
 	cmp	w5, 48
-	bls	.L2647
+	bls	.L2715
 	cmp	w3, 8
-	bls	.L2647
+	bls	.L2715
 	adrp	x3, .LANCHOR108
 	ldrh	w3, [x3, #:lo12:.LANCHOR108]
 	cmp	w3, 35
-	bhi	.L2647
-.L2646:
+	bhi	.L2715
+.L2714:
 	strh	wzr, [x26]
-.L2647:
+.L2715:
 	ldrh	w1, [x2, x1]
 	cmp	w0, w1
-	bgt	.L2648
+	bgt	.L2716
 	ldrh	w0, [x26]
 	cmp	w0, 3
-	bhi	.L2648
+	bhi	.L2716
 	mov	w0, -1
 	strh	wzr, [x26]
-	strh	w0, [x19, #:lo12:.LANCHOR204]
-	b	.L2709
-.L2648:
-	cbnz	w1, .L2649
+	strh	w0, [x19, #:lo12:.LANCHOR205]
+.L2787:
+	adrp	x0, .LANCHOR243
+	ldrh	w0, [x0, #:lo12:.LANCHOR243]
+	b	.L2686
+.L2716:
+	cbnz	w1, .L2717
 	mov	w0, -1
 	bl	decrement_vpc_count
 	ldrh	w0, [x26]
 	add	w0, w0, 1
 	strh	w0, [x26]
-	b	.L2642
-.L2649:
+	b	.L2710
+.L2717:
 	adrp	x0, .LANCHOR15
-	add	x3, x19, :lo12:.LANCHOR204
+	add	x3, x19, :lo12:.LANCHOR205
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
 	strb	wzr, [x3, 8]
-	cbz	w0, .L2650
+	cbz	w0, .L2718
 	mov	w0, w6
 	bl	ftl_get_blk_mode
 	strb	w0, [x3, 8]
-.L2650:
-	ldr	x0, [x29, 144]
+.L2718:
+	ldr	x0, [x29, 128]
 	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	cmp	w0, w6
-	bne	.L2651
-	mov	w2, 893
-	adrp	x1, .LANCHOR243
+	bne	.L2719
+	mov	w2, 902
+	adrp	x1, .LANCHOR246
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR243
+	add	x1, x1, :lo12:.LANCHOR246
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -18328,16 +18660,16 @@ rk_ftl_garbage_collect:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2651:
-	ldr	x0, [x29, 136]
-	ldrh	w1, [x19, #:lo12:.LANCHOR204]
+.L2719:
+	adrp	x0, .LANCHOR92
+	ldrh	w1, [x19, #:lo12:.LANCHOR205]
 	ldrh	w0, [x0, #:lo12:.LANCHOR92]
 	cmp	w1, w0
-	bne	.L2652
-	mov	w2, 894
-	adrp	x1, .LANCHOR243
+	bne	.L2720
+	mov	w2, 903
+	adrp	x1, .LANCHOR246
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR243
+	add	x1, x1, :lo12:.LANCHOR246
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -18345,16 +18677,16 @@ rk_ftl_garbage_collect:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2652:
+.L2720:
 	adrp	x0, .LANCHOR93
-	ldrh	w1, [x19, #:lo12:.LANCHOR204]
+	ldrh	w1, [x19, #:lo12:.LANCHOR205]
 	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w1, w0
-	bne	.L2653
-	mov	w2, 895
-	adrp	x1, .LANCHOR243
+	bne	.L2721
+	mov	w2, 904
+	adrp	x1, .LANCHOR246
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR243
+	add	x1, x1, :lo12:.LANCHOR246
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -18362,55 +18694,55 @@ rk_ftl_garbage_collect:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2653:
-	add	x22, x19, :lo12:.LANCHOR204
+.L2721:
+	add	x22, x19, :lo12:.LANCHOR205
 	mov	x0, x22
 	bl	make_superblock
-	adrp	x0, .LANCHOR241
-	ldrh	w1, [x19, #:lo12:.LANCHOR204]
-	strh	wzr, [x0, #:lo12:.LANCHOR241]
+	adrp	x0, .LANCHOR244
+	ldrh	w1, [x19, #:lo12:.LANCHOR205]
+	strh	wzr, [x0, #:lo12:.LANCHOR244]
 	ldr	x0, [x23, #:lo12:.LANCHOR83]
 	ldrh	w1, [x0, x1, lsl 1]
-	adrp	x0, .LANCHOR242
+	adrp	x0, .LANCHOR245
 	strh	wzr, [x22, 2]
-	strh	w1, [x0, #:lo12:.LANCHOR242]
+	strh	w1, [x0, #:lo12:.LANCHOR245]
 	strb	wzr, [x22, 6]
-.L2641:
+.L2709:
 	adrp	x1, .LANCHOR52
 	mov	w0, 1
 	str	w0, [x21, #:lo12:.LANCHOR171]
 	ldrh	w0, [x1, #:lo12:.LANCHOR52]
-	str	w0, [x29, 172]
+	str	w0, [x29, 156]
 	adrp	x0, .LANCHOR15
-	str	x1, [x29, 128]
-	str	x0, [x29, 120]
+	str	x1, [x29, 120]
+	str	x0, [x29, 112]
 	ldrb	w2, [x0, #:lo12:.LANCHOR15]
-	cbz	w2, .L2654
-	add	x0, x19, :lo12:.LANCHOR204
+	cbz	w2, .L2722
+	add	x0, x19, :lo12:.LANCHOR205
 	ldrb	w0, [x0, 8]
 	cmp	w0, 1
-	bne	.L2654
+	bne	.L2722
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
-	str	w0, [x29, 172]
-.L2654:
-	add	x0, x19, :lo12:.LANCHOR204
-	ldr	w2, [x29, 172]
+	str	w0, [x29, 156]
+.L2722:
+	add	x0, x19, :lo12:.LANCHOR205
+	ldr	w2, [x29, 156]
 	ldrh	w0, [x0, 2]
 	add	w1, w0, w20
 	cmp	w1, w2
-	ble	.L2655
+	ble	.L2723
 	sub	w20, w2, w0
 	and	w20, w20, 65535
-.L2655:
-	adrp	x0, .LANCHOR241
+.L2723:
+	adrp	x0, .LANCHOR244
 	mov	w28, 0
-	add	x0, x0, :lo12:.LANCHOR241
-	str	x0, [x29, 160]
-.L2656:
+	add	x0, x0, :lo12:.LANCHOR244
+	str	x0, [x29, 144]
+.L2724:
 	cmp	w20, w28, uxth
-	bls	.L2664
-	add	x1, x19, :lo12:.LANCHOR204
+	bls	.L2732
+	add	x1, x19, :lo12:.LANCHOR205
 	adrp	x0, .LANCHOR38
 	adrp	x23, .LANCHOR106
 	add	x1, x1, 16
@@ -18422,24 +18754,24 @@ rk_ftl_garbage_collect:
 	mov	w6, 65535
 	add	w4, w4, w28
 	mov	w5, 56
-	b	.L2665
-.L2658:
+	b	.L2733
+.L2726:
 	ldrh	w3, [x1]
 	cmp	w3, w6
-	beq	.L2657
+	beq	.L2725
 	umaddl	x8, w22, w5, x0
 	add	w22, w22, 1
 	and	w22, w22, 65535
 	orr	w3, w4, w3, lsl 10
 	str	w3, [x8, 4]
-.L2657:
+.L2725:
 	add	w2, w2, 1
 	add	x1, x1, 2
 	and	w2, w2, 65535
-.L2665:
+.L2733:
 	cmp	w2, w7
-	bne	.L2658
-	add	x1, x19, :lo12:.LANCHOR204
+	bne	.L2726
+	add	x1, x19, :lo12:.LANCHOR205
 	adrp	x24, .LANCHOR102
 	add	x24, x24, :lo12:.LANCHOR102
 	ldrb	w2, [x1, 8]
@@ -18448,32 +18780,32 @@ rk_ftl_garbage_collect:
 	mov	w0, 56
 	umull	x0, w22, w0
 	mov	x22, 0
-	str	x0, [x29, 152]
-.L2659:
-	ldr	x0, [x29, 152]
-	cmp	x22, x0
-	bne	.L2663
+	str	x0, [x29, 136]
+.L2727:
+	ldr	x0, [x29, 136]
+	cmp	x0, x22
+	bne	.L2731
 	add	w28, w28, 1
-	b	.L2656
-.L2663:
+	b	.L2724
+.L2731:
 	ldr	x0, [x23, #:lo12:.LANCHOR106]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	beq	.L2660
+	beq	.L2728
 	ldr	x27, [x1, 16]
 	mov	w0, 61589
 	ldrh	w1, [x27]
 	cmp	w1, w0
-	bne	.L2660
+	bne	.L2728
 	ldr	w4, [x27, 8]
 	cmn	w4, #1
-	bne	.L2661
-	mov	w2, 934
-	str	w4, [x29, 112]
-	adrp	x1, .LANCHOR243
+	bne	.L2729
+	mov	w2, 943
+	str	w4, [x29, 104]
+	adrp	x1, .LANCHOR246
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR243
+	add	x1, x1, :lo12:.LANCHOR246
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -18481,22 +18813,22 @@ rk_ftl_garbage_collect:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-	ldr	w4, [x29, 112]
-.L2661:
+	ldr	w4, [x29, 104]
+.L2729:
 	mov	w2, 0
-	add	x1, x29, 188
+	add	x1, x29, 168
 	mov	w0, w4
 	bl	log2phys
 	ldr	x0, [x23, #:lo12:.LANCHOR106]
-	ldr	w1, [x29, 188]
+	ldr	w1, [x29, 168]
 	add	x0, x0, x22
 	and	w1, w1, 2147483647
 	ldr	w2, [x0, 4]
 	cmp	w1, w2
-	bne	.L2660
-	ldr	x1, [x29, 160]
+	bne	.L2728
+	ldr	x1, [x29, 144]
 	adrp	x4, .LANCHOR181
-	ldr	x2, [x29, 160]
+	ldr	x2, [x29, 144]
 	ldr	x5, [x4, #:lo12:.LANCHOR181]
 	ldr	w0, [x0, 24]
 	ldrh	w1, [x1]
@@ -18504,14 +18836,14 @@ rk_ftl_garbage_collect:
 	strh	w1, [x2]
 	ldr	w2, [x24]
 	mov	w1, 56
-	str	w1, [x29, 168]
+	str	w1, [x29, 152]
 	nop // between mem op and mult-accumulate
 	umaddl	x2, w2, w1, x5
-	stp	x4, x2, [x29, 104]
+	stp	x4, x2, [x29, 96]
 	str	w0, [x2, 24]
 	bl	Ftl_get_new_temp_ppa
-	ldp	x4, x2, [x29, 104]
-	ldr	w1, [x29, 168]
+	ldp	x4, x2, [x29, 96]
+	ldr	w1, [x29, 152]
 	str	w0, [x2, 4]
 	ldr	x0, [x4, #:lo12:.LANCHOR181]
 	ldr	w2, [x24]
@@ -18523,7 +18855,7 @@ rk_ftl_garbage_collect:
 	str	x4, [x1, 8]
 	ldr	x4, [x0, 16]
 	str	x4, [x1, 16]
-	ldr	w1, [x29, 188]
+	ldr	w1, [x29, 168]
 	str	w1, [x27, 12]
 	adrp	x1, .LANCHOR93
 	add	x12, x1, :lo12:.LANCHOR93
@@ -18535,103 +18867,127 @@ rk_ftl_garbage_collect:
 	str	w1, [x27, 4]
 	mov	w1, 1
 	bl	FtlGcBufAlloc
-	ldr	x0, [x29, 120]
+	ldr	x0, [x29, 112]
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbnz	w0, .L2662
+	cbnz	w0, .L2730
 	ldrb	w1, [x12, 7]
 	ldr	w0, [x24]
 	cmp	w1, w0
-	beq	.L2662
+	beq	.L2730
 	ldrh	w0, [x12, 4]
-	cbnz	w0, .L2660
-.L2662:
+	cbnz	w0, .L2728
+.L2730:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	w0, .L2660
-.L2710:
+	cbz	w0, .L2728
+	add	x0, x19, :lo12:.LANCHOR205
+	mov	w1, -1
 	str	wzr, [x21, #:lo12:.LANCHOR171]
-	b	.L2709
-.L2660:
+	strh	w1, [x19, #:lo12:.LANCHOR205]
+	strh	wzr, [x0, 2]
+	b	.L2787
+.L2728:
 	add	x22, x22, 56
-	b	.L2659
-.L2664:
-	add	x1, x19, :lo12:.LANCHOR204
+	b	.L2727
+.L2732:
+	add	x1, x19, :lo12:.LANCHOR205
 	ldrh	w0, [x1, 2]
 	add	w20, w20, w0
-	ldr	w0, [x29, 172]
+	ldr	w0, [x29, 156]
 	and	w20, w20, 65535
 	strh	w20, [x1, 2]
 	cmp	w0, w20
-	bhi	.L2666
+	bhi	.L2734
 	adrp	x0, .LANCHOR102
 	ldr	w0, [x0, #:lo12:.LANCHOR102]
-	cbz	w0, .L2667
+	cbz	w0, .L2735
 	bl	Ftl_gc_temp_data_write_back
-	cbnz	w0, .L2710
-.L2667:
-	adrp	x0, .LANCHOR241
-	ldrh	w0, [x0, #:lo12:.LANCHOR241]
-	cbnz	w0, .L2668
-	ldrh	w1, [x19, #:lo12:.LANCHOR204]
-	adrp	x20, .LANCHOR83
-	add	x0, x19, :lo12:.LANCHOR204
-	ldr	x3, [x20, #:lo12:.LANCHOR83]
-	ubfiz	x2, x1, 1, 16
-	ldrh	w4, [x3, x2]
-	cbz	w4, .L2668
-	adrp	x2, .LANCHOR242
-	mov	w3, 0
-	ldrh	w5, [x2, #:lo12:.LANCHOR242]
-	ldrh	w2, [x0, 2]
-	adrp	x0, .LC66
-	add	x0, x0, :lo12:.LC66
-	bl	printf
-	ldrh	w1, [x19, #:lo12:.LANCHOR204]
-	ldr	x0, [x20, #:lo12:.LANCHOR83]
+	cbz	w0, .L2735
+	str	wzr, [x21, #:lo12:.LANCHOR171]
+	b	.L2787
+.L2735:
+	adrp	x0, .LANCHOR244
+	ldrh	w0, [x0, #:lo12:.LANCHOR244]
+	cbnz	w0, .L2736
+	adrp	x22, .LANCHOR83
+	ldrh	w1, [x19, #:lo12:.LANCHOR205]
+	ldr	x0, [x22, #:lo12:.LANCHOR83]
+	ldrh	w0, [x0, x1, lsl 1]
+	cbz	w0, .L2736
+	adrp	x23, .LANCHOR72
+	add	x24, x23, :lo12:.LANCHOR72
+	mov	w20, 0
+.L2737:
+	ldr	w0, [x24]
+	cmp	w20, w0
+	bcs	.L2742
+	mov	w2, 0
+	add	x1, x29, 172
+	mov	w0, w20
+	bl	log2phys
+	ldr	w0, [x29, 172]
+	cmn	w0, #1
+	beq	.L2738
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+	ldrh	w1, [x19, #:lo12:.LANCHOR205]
+	cmp	w1, w0, uxth
+	bne	.L2738
+.L2742:
+	ldr	w0, [x23, #:lo12:.LANCHOR72]
+	cmp	w20, w0
+	bcc	.L2736
+	ldrh	w1, [x19, #:lo12:.LANCHOR205]
+	ldr	x0, [x22, #:lo12:.LANCHOR83]
 	strh	wzr, [x0, x1, lsl 1]
-	ldrh	w0, [x19, #:lo12:.LANCHOR204]
+	ldrh	w0, [x19, #:lo12:.LANCHOR205]
 	bl	update_vpc_list
 	bl	FtlCacheWriteBack
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L2668:
+.L2736:
 	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR204]
-.L2666:
+	strh	w0, [x19, #:lo12:.LANCHOR205]
+.L2734:
 	adrp	x0, .LANCHOR88
 	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w0, 2
-	bhi	.L2669
-	ldr	x0, [x29, 128]
+	bhi	.L2743
+	ldr	x0, [x29, 120]
 	ldrh	w20, [x0, #:lo12:.LANCHOR52]
-	b	.L2640
-.L2669:
+	b	.L2744
+.L2738:
+	add	w20, w20, 1
+	b	.L2737
+.L2743:
 	str	wzr, [x21, #:lo12:.LANCHOR171]
 	add	w0, w0, 1
-	b	.L2618
-.L2670:
+	b	.L2686
+.L2745:
 	mov	w0, 0
 	ret
-.L2672:
+.L2747:
 	mov	w0, 0
-	b	.L2618
+	b	.L2686
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
 	.section	.text.FtlInit,"ax",@progbits
 	.align	2
 	.global	FtlInit
 	.type	FtlInit, %function
 FtlInit:
-	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LC67
-	add	x1, x1, :lo12:.LC67
+	stp	x29, x30, [sp, -64]!
+	adrp	x1, .LC71
+	add	x1, x1, :lo12:.LC71
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR230
+	adrp	x19, .LANCHOR232
 	mov	x20, x0
 	mov	w0, -1
-	str	w0, [x19, #:lo12:.LANCHOR230]
-	adrp	x0, .LANCHOR244
-	str	wzr, [x0, #:lo12:.LANCHOR244]
+	str	w0, [x19, #:lo12:.LANCHOR232]
+	adrp	x0, .LANCHOR247
+	stp	x21, x22, [sp, 32]
+	str	wzr, [x0, #:lo12:.LANCHOR247]
 	adrp	x0, .LANCHOR76
+	stp	x23, x24, [sp, 48]
 	str	wzr, [x0, #:lo12:.LANCHOR76]
 	adrp	x0, .LC7
 	add	x0, x0, :lo12:.LC7
@@ -18644,42 +19000,64 @@ FtlInit:
 	ldrh	w0, [x0, #:lo12:.LANCHOR39]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	w0, .L2712
-	adrp	x1, .LANCHOR245
-	adrp	x0, .LC68
-	add	x1, x1, :lo12:.LANCHOR245
-	add	x0, x0, :lo12:.LC68
-.L2720:
+	cbz	w0, .L2789
+	adrp	x1, .LANCHOR248
+	adrp	x0, .LC72
+	add	x1, x1, :lo12:.LANCHOR248
+	add	x0, x0, :lo12:.LC72
+.L2798:
 	bl	printf
-.L2713:
+.L2790:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 32
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
 	ret
-.L2712:
+.L2789:
 	bl	FtlSysBlkInit
-	cbz	w0, .L2714
-	adrp	x1, .LANCHOR245
-	adrp	x0, .LC69
-	add	x1, x1, :lo12:.LANCHOR245
-	add	x0, x0, :lo12:.LC69
-	b	.L2720
-.L2714:
+	cbz	w0, .L2791
+	adrp	x1, .LANCHOR248
+	adrp	x0, .LC73
+	add	x1, x1, :lo12:.LANCHOR248
+	add	x0, x0, :lo12:.LC73
+	b	.L2798
+.L2791:
 	mov	w1, 1
-	str	w1, [x19, #:lo12:.LANCHOR230]
+	str	w1, [x19, #:lo12:.LANCHOR232]
 	bl	rk_ftl_garbage_collect
 	adrp	x0, .LANCHOR88
-	ldrh	w0, [x0, #:lo12:.LANCHOR88]
-	cmp	w0, 15
-	bhi	.L2713
-	mov	w19, 1024
-.L2716:
+	mov	x22, x0
+	ldrh	w23, [x0, #:lo12:.LANCHOR88]
+	cmp	w23, 15
+	bhi	.L2790
+	adrp	x20, .LANCHOR112
+	add	x20, x20, :lo12:.LANCHOR112
+	mov	w19, 0
+	adrp	x24, .LANCHOR205
+	mov	w21, 65535
+.L2795:
+	ldrh	w0, [x24, #:lo12:.LANCHOR205]
+	cmp	w0, w21
+	bne	.L2793
+	ldrh	w0, [x20]
+	cmp	w0, w21
+	bne	.L2793
+	and	w0, w19, 7
+	bl	List_get_gc_head_node
+	bl	FtlGcRefreshBlock
+.L2793:
 	mov	w1, 1
 	mov	w0, w1
 	bl	rk_ftl_garbage_collect
-	subs	w19, w19, #1
-	bne	.L2716
-	b	.L2713
+	ldrh	w1, [x22, #:lo12:.LANCHOR88]
+	add	w0, w23, 2
+	cmp	w1, w0
+	bhi	.L2790
+	add	w19, w19, 1
+	cmp	w19, 1024
+	bne	.L2795
+	b	.L2790
 	.size	FtlInit, .-FtlInit
 	.section	.text.rk_ftl_init,"ax",@progbits
 	.align	2
@@ -18691,15 +19069,15 @@ rk_ftl_init:
 	str	x19, [sp, 16]
 	bl	FlashInit
 	mov	w19, w0
-	cbnz	w0, .L2722
+	cbnz	w0, .L2800
 	adrp	x0, .LANCHOR14
 	add	x0, x0, :lo12:.LANCHOR14
 	bl	FtlInit
-.L2722:
+.L2800:
 	bl	idb_init
 	mov	w1, w19
-	adrp	x0, .LC70
-	add	x0, x0, :lo12:.LC70
+	adrp	x0, .LC74
+	add	x0, x0, :lo12:.LC74
 	bl	printf
 	mov	w0, w19
 	ldr	x19, [sp, 16]
@@ -18713,22 +19091,22 @@ rk_ftl_init:
 ftl_fix_nand_power_lost_error:
 	adrp	x0, .LANCHOR15
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L2739
+	cbz	w0, .L2817
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
 	str	x25, [sp, 64]
-	adrp	x25, .LANCHOR234
+	adrp	x25, .LANCHOR237
 	stp	x23, x24, [sp, 48]
 	stp	x21, x22, [sp, 32]
 	adrp	x21, .LANCHOR83
-	ldrh	w23, [x25, #:lo12:.LANCHOR234]
+	ldrh	w23, [x25, #:lo12:.LANCHOR237]
 	ldr	x0, [x21, #:lo12:.LANCHOR83]
 	mov	w1, w23
 	stp	x19, x20, [sp, 16]
 	ubfiz	x24, x23, 1, 16
-	adrp	x19, .LC71
+	adrp	x19, .LC75
 	ldrh	w2, [x0, x24]
-	add	x0, x19, :lo12:.LC71
+	add	x0, x19, :lo12:.LC75
 	bl	printf
 	adrp	x0, .LANCHOR91
 	add	x11, x0, :lo12:.LANCHOR91
@@ -18743,24 +19121,24 @@ ftl_fix_nand_power_lost_error:
 	mov	x0, x20
 	mov	w20, 4097
 	bl	allocate_new_data_superblock
-.L2726:
+.L2804:
 	subs	w20, w20, #1
-	beq	.L2730
+	beq	.L2808
 	mov	w1, 1
 	mov	w0, w1
 	bl	rk_ftl_garbage_collect
 	ldr	x0, [x21, #:lo12:.LANCHOR83]
 	ldrh	w0, [x0, x24]
-	cbnz	w0, .L2726
-.L2730:
+	cbnz	w0, .L2804
+.L2808:
 	ldr	x0, [x21, #:lo12:.LANCHOR83]
 	mov	w1, w23
 	ldrh	w2, [x0, x24]
-	add	x0, x19, :lo12:.LC71
+	add	x0, x19, :lo12:.LC75
 	bl	printf
 	ldr	x0, [x21, #:lo12:.LANCHOR83]
 	ldrh	w19, [x0, x24]
-	cbnz	w19, .L2728
+	cbnz	w19, .L2806
 	add	x20, x29, 128
 	adrp	x22, .LANCHOR77
 	strh	w23, [x20, -48]!
@@ -18773,14 +19151,14 @@ ftl_fix_nand_power_lost_error:
 	ldrh	w3, [x0, #:lo12:.LANCHOR38]
 	mov	w6, 56
 	mov	w0, 0
-.L2731:
+.L2809:
 	cmp	w0, w3
-	bne	.L2733
+	bne	.L2811
 	ldr	x0, [x21, #:lo12:.LANCHOR83]
 	mov	w1, w23
 	ldrh	w2, [x0, x24]
-	adrp	x0, .LC72
-	add	x0, x0, :lo12:.LC72
+	adrp	x0, .LC76
+	add	x0, x0, :lo12:.LC76
 	bl	printf
 	ldr	x0, [x22, #:lo12:.LANCHOR77]
 	mov	w2, w19
@@ -18790,31 +19168,31 @@ ftl_fix_nand_power_lost_error:
 	mov	w2, w19
 	mov	w1, 1
 	bl	FlashEraseBlocks
-.L2728:
+.L2806:
 	mov	w0, -1
-	strh	w0, [x25, #:lo12:.LANCHOR234]
+	strh	w0, [x25, #:lo12:.LANCHOR237]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2733:
+.L2811:
 	ldrh	w1, [x20]
 	cmp	w1, w5
-	beq	.L2732
+	beq	.L2810
 	umaddl	x2, w19, w6, x4
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	lsl	w1, w1, 10
 	stp	xzr, xzr, [x2, 8]
 	str	w1, [x2, 4]
-.L2732:
+.L2810:
 	add	w0, w0, 1
 	add	x20, x20, 2
 	and	w0, w0, 65535
-	b	.L2731
-.L2739:
+	b	.L2809
+.L2817:
 	ret
 	.size	ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error
 	.section	.text.ftl_read,"ax",@progbits
@@ -18835,13 +19213,13 @@ ftl_read:
 	mov	w27, w2
 	stp	x21, x22, [sp, 48]
 	stp	x25, x26, [sp, 80]
-	bne	.L2743
+	bne	.L2821
 	mov	x2, x3
 	mov	w1, w27
 	add	w0, w19, 256
 	bl	FtlVendorPartRead
 	mov	w21, w0
-.L2742:
+.L2820:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
@@ -18851,18 +19229,18 @@ ftl_read:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 208
 	ret
-.L2743:
+.L2821:
 	add	w0, w1, w2
 	str	w0, [x29, 148]
 	adrp	x0, .LANCHOR68
 	add	w1, w1, w2
 	ldr	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w1, w0
-	bhi	.L2766
-	adrp	x0, .LANCHOR230
-	ldr	w21, [x0, #:lo12:.LANCHOR230]
+	bhi	.L2844
+	adrp	x0, .LANCHOR232
+	ldr	w21, [x0, #:lo12:.LANCHOR232]
 	cmn	w21, #1
-	beq	.L2742
+	beq	.L2820
 	adrp	x22, .LANCHOR55
 	bl	FtlCacheWriteBack
 	adrp	x25, .LANCHOR138
@@ -18888,42 +19266,42 @@ ftl_read:
 	ldr	w2, [x29, 172]
 	add	w0, w0, w2
 	str	w0, [x1, #:lo12:.LANCHOR166]
-.L2745:
+.L2823:
 	ldr	w0, [x29, 172]
-	cbnz	w0, .L2765
+	cbnz	w0, .L2843
 	adrp	x0, .LANCHOR116
 	ldrh	w0, [x0, #:lo12:.LANCHOR116]
-	cbz	w0, .L2742
+	cbz	w0, .L2820
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-	b	.L2742
-.L2765:
+	b	.L2820
+.L2843:
 	add	x1, x29, 188
 	mov	w2, 0
 	mov	w0, w20
 	bl	log2phys
 	ldr	w1, [x29, 188]
 	cmn	w1, #1
-	bne	.L2746
+	bne	.L2824
 	add	x3, x22, :lo12:.LANCHOR55
 	mov	w28, 0
-.L2747:
+.L2825:
 	ldrh	w0, [x3]
 	cmp	w28, w0
-	bcc	.L2749
-.L2750:
+	bcc	.L2827
+.L2828:
 	ldr	w0, [x29, 172]
 	add	w20, w20, 1
 	subs	w0, w0, #1
 	str	w0, [x29, 172]
-	beq	.L2754
+	beq	.L2832
 	adrp	x0, .LANCHOR38
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w24, w0, lsl 2
-	bne	.L2745
-.L2754:
-	cbz	w24, .L2745
+	bne	.L2823
+.L2832:
+	cbz	w24, .L2823
 	ldr	x0, [x26, #:lo12:.LANCHOR180]
 	mov	w1, w24
 	mov	w2, 0
@@ -18942,35 +19320,35 @@ ftl_read:
 	umull	x0, w24, w0
 	mov	x24, 0
 	str	x0, [x29, 120]
-	adrp	x0, .LC59
-	add	x0, x0, :lo12:.LC59
+	adrp	x0, .LC64
+	add	x0, x0, :lo12:.LC64
 	str	x0, [x29, 112]
-.L2764:
+.L2842:
 	ldr	x0, [x26, #:lo12:.LANCHOR180]
 	ldr	w2, [x29, 168]
 	add	x0, x0, x24
 	ldr	w1, [x0, 24]
 	cmp	w2, w1
-	bne	.L2756
+	bne	.L2834
 	ldr	x1, [x0, 8]
 	adrp	x0, .LANCHOR186
 	ldr	x0, [x0, #:lo12:.LANCHOR186]
 	cmp	x1, x0
-	bne	.L2757
+	bne	.L2835
 	ldr	x0, [x29, 136]
 	ldr	w2, [x29, 144]
 	add	x1, x1, x0
 	mov	x0, x23
-.L2781:
+.L2859:
 	bl	ftl_memcpy
-.L2757:
+.L2835:
 	ldr	x0, [x26, #:lo12:.LANCHOR180]
 	add	x0, x0, x24
 	ldr	x2, [x0, 16]
 	ldr	w1, [x0, 24]
 	ldr	w3, [x2, 8]
 	cmp	w1, w3
-	beq	.L2758
+	beq	.L2836
 	ldr	w3, [x25, 72]
 	add	w3, w3, 1
 	str	w3, [x25, 72]
@@ -18984,30 +19362,30 @@ ftl_read:
 	ldr	w2, [x0, 4]
 	ldr	x0, [x29, 112]
 	bl	printf
-.L2758:
+.L2836:
 	ldr	x0, [x26, #:lo12:.LANCHOR180]
 	add	x1, x0, x24
 	ldr	w0, [x0, x24]
 	cmn	w0, #1
-	bne	.L2759
+	bne	.L2837
 	ldr	w1, [x25, 72]
 	mov	w21, w0
 	add	w1, w1, 1
 	str	w1, [x25, 72]
-.L2760:
+.L2838:
 	ldr	x0, [x29, 120]
 	add	x24, x24, 56
 	cmp	x0, x24
-	bne	.L2764
+	bne	.L2842
 	mov	w24, 0
-	b	.L2745
-.L2749:
+	b	.L2823
+.L2827:
 	madd	w0, w20, w0, w28
 	cmp	w19, w0
-	bhi	.L2748
+	bhi	.L2826
 	ldr	w1, [x29, 148]
 	cmp	w1, w0
-	bls	.L2748
+	bls	.L2826
 	sub	w0, w0, w19
 	str	x3, [x29, 136]
 	lsl	w0, w0, 9
@@ -19016,17 +19394,17 @@ ftl_read:
 	add	x0, x23, x0
 	bl	ftl_memset
 	ldr	x3, [x29, 136]
-.L2748:
+.L2826:
 	add	w28, w28, 1
-	b	.L2747
-.L2746:
+	b	.L2825
+.L2824:
 	ldr	x0, [x26, #:lo12:.LANCHOR180]
 	mov	w2, 56
 	umaddl	x0, w24, w2, x0
 	str	w1, [x0, 4]
 	ldr	w1, [x29, 168]
 	cmp	w20, w1
-	bne	.L2751
+	bne	.L2829
 	adrp	x1, .LANCHOR186
 	ldr	x1, [x1, #:lo12:.LANCHOR186]
 	str	x1, [x0, 8]
@@ -19039,9 +19417,9 @@ ftl_read:
 	csel	w2, w27, w2, ls
 	str	w2, [x29, 160]
 	cmp	w1, w2
-	bne	.L2752
+	bne	.L2830
 	str	x23, [x0, 8]
-.L2752:
+.L2830:
 	adrp	x1, .LANCHOR58
 	adrp	x2, .LANCHOR189
 	str	w20, [x0, 24]
@@ -19052,11 +19430,11 @@ ftl_read:
 	and	x1, x1, 4294967292
 	add	x1, x2, x1
 	str	x1, [x0, 16]
-	b	.L2750
-.L2751:
+	b	.L2828
+.L2829:
 	ldr	w1, [x29, 164]
 	cmp	w20, w1
-	bne	.L2753
+	bne	.L2831
 	ldrh	w2, [x22, #:lo12:.LANCHOR55]
 	adrp	x1, .LANCHOR187
 	ldr	w3, [x29, 148]
@@ -19066,35 +19444,35 @@ ftl_read:
 	sub	w3, w3, w1
 	str	w3, [x29, 156]
 	cmp	w2, w3
-	bne	.L2752
-.L2780:
+	bne	.L2830
+.L2858:
 	sub	w1, w1, w19
 	lsl	w1, w1, 9
 	add	x1, x23, x1
 	str	x1, [x0, 8]
-	b	.L2752
-.L2753:
+	b	.L2830
+.L2831:
 	ldrh	w1, [x22, #:lo12:.LANCHOR55]
 	mul	w1, w1, w20
-	b	.L2780
-.L2756:
+	b	.L2858
+.L2834:
 	ldr	w2, [x29, 164]
 	cmp	w2, w1
-	bne	.L2757
+	bne	.L2835
 	ldr	x1, [x0, 8]
 	ldr	x0, [x28, #:lo12:.LANCHOR187]
 	cmp	x1, x0
-	bne	.L2757
+	bne	.L2835
 	ldrh	w0, [x22, #:lo12:.LANCHOR55]
 	mul	w0, w0, w2
 	ldr	w2, [x29, 132]
 	sub	w0, w0, w19
 	lsl	w0, w0, 9
 	add	x0, x23, x0
-	b	.L2781
-.L2759:
+	b	.L2859
+.L2837:
 	cmp	w0, 256
-	bne	.L2760
+	bne	.L2838
 	ldr	w0, [x1, 4]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
@@ -19102,14 +19480,14 @@ ftl_read:
 	str	w1, [x29, 128]
 	bl	FtlGcRefreshBlock
 	mov	w2, 2049
-	adrp	x3, .LANCHOR204
-.L2762:
+	adrp	x3, .LANCHOR205
+.L2840:
 	subs	w2, w2, #1
-	bne	.L2761
-.L2763:
+	bne	.L2839
+.L2841:
 	bl	FtlSysFlush
-	b	.L2760
-.L2761:
+	b	.L2838
+.L2839:
 	mov	w1, 1
 	str	x3, [x29, 96]
 	mov	w0, w1
@@ -19118,13 +19496,13 @@ ftl_read:
 	ldr	x3, [x29, 96]
 	ldr	w1, [x29, 128]
 	ldr	w2, [x29, 108]
-	ldrh	w0, [x3, #:lo12:.LANCHOR204]
+	ldrh	w0, [x3, #:lo12:.LANCHOR205]
 	cmp	w0, w1
-	beq	.L2762
-	b	.L2763
-.L2766:
+	beq	.L2840
+	b	.L2841
+.L2844:
 	mov	w21, -1
-	b	.L2742
+	b	.L2820
 	.size	ftl_read, .-ftl_read
 	.section	.text.FtlWrite,"ax",@progbits
 	.align	2
@@ -19141,17 +19519,17 @@ FtlWrite:
 	ldr	w1, [x1, #:lo12:.LANCHOR76]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w1, .L2814
+	cbnz	w1, .L2892
 	and	w0, w0, 255
 	mov	w23, w2
 	mov	x24, x3
 	cmp	w0, 16
-	bne	.L2784
+	bne	.L2862
 	mov	x2, x3
 	mov	w1, w23
 	add	w0, w21, 256
 	bl	FtlVendorPartWrite
-.L2782:
+.L2860:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -19159,21 +19537,21 @@ FtlWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 240
 	ret
-.L2784:
+.L2862:
 	adrp	x0, .LANCHOR68
 	add	w2, w21, w2
 	ldr	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w2, w0
-	bhi	.L2815
-	adrp	x0, .LANCHOR230
-	ldr	w0, [x0, #:lo12:.LANCHOR230]
+	bhi	.L2893
+	adrp	x0, .LANCHOR232
+	ldr	w0, [x0, #:lo12:.LANCHOR232]
 	cmn	w0, #1
-	beq	.L2782
-	adrp	x0, .LANCHOR246
+	beq	.L2860
+	adrp	x0, .LANCHOR249
 	adrp	x26, .LANCHOR55
 	mov	w1, 2048
 	sub	w2, w2, #1
-	str	w1, [x0, #:lo12:.LANCHOR246]
+	str	w1, [x0, #:lo12:.LANCHOR249]
 	ldrh	w1, [x26, #:lo12:.LANCHOR55]
 	str	x26, [x29, 160]
 	udiv	w0, w2, w1
@@ -19187,25 +19565,25 @@ FtlWrite:
 	str	w0, [x2, #:lo12:.LANCHOR162]
 	adrp	x0, .LANCHOR132
 	ldr	x2, [x0, #:lo12:.LANCHOR132]
-	cbz	x2, .L2786
+	cbz	x2, .L2864
 	ldr	w0, [x2, 24]
 	cmp	w20, w0
-	beq	.L2787
+	beq	.L2865
 	bl	FtlCacheWriteBack
-.L2786:
+.L2864:
 	adrp	x0, .LANCHOR91
 	mov	w19, w20
 	add	x22, x0, :lo12:.LANCHOR91
-.L2788:
-	cbnz	w25, .L2813
+.L2866:
+	cbnz	w25, .L2891
 	ldr	w0, [x29, 152]
 	sub	w1, w0, w20
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-.L2814:
+.L2892:
 	mov	w0, 0
-	b	.L2782
-.L2787:
+	b	.L2860
+.L2865:
 	adrp	x3, .LANCHOR164
 	ldr	w0, [x3, #:lo12:.LANCHOR164]
 	add	w0, w0, 1
@@ -19221,15 +19599,15 @@ FtlWrite:
 	mov	x1, x24
 	mov	w2, w22
 	bl	ftl_memcpy
-	cbz	w27, .L2814
+	cbz	w27, .L2892
 	sub	w23, w23, w19
 	add	w21, w21, w19
 	add	x24, x24, x22
 	add	w20, w20, 1
 	bl	FtlCacheWriteBack
 	mov	w25, w27
-	b	.L2786
-.L2813:
+	b	.L2864
+.L2891:
 	adrp	x0, .LANCHOR91
 	add	x0, x0, :lo12:.LANCHOR91
 	adrp	x1, .LANCHOR38
@@ -19237,11 +19615,11 @@ FtlWrite:
 	ldrb	w2, [x0, 6]
 	ldrh	w0, [x1, #:lo12:.LANCHOR38]
 	cmp	w2, w0
-	bcc	.L2789
-	mov	w2, 1668
-	adrp	x1, .LANCHOR247
+	bcc	.L2867
+	mov	w2, 1673
+	adrp	x1, .LANCHOR250
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR247
+	add	x1, x1, :lo12:.LANCHOR250
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -19249,13 +19627,13 @@ FtlWrite:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2789:
+.L2867:
 	ldrh	w0, [x22, 4]
-	cbnz	w0, .L2790
+	cbnz	w0, .L2868
 	bl	FtlCacheWriteBack
 	mov	x0, x22
 	bl	allocate_new_data_superblock
-.L2790:
+.L2868:
 	ldrb	w0, [x22, 7]
 	ldrh	w1, [x22, 4]
 	lsl	w0, w0, 2
@@ -19268,11 +19646,11 @@ FtlWrite:
 	ldr	x0, [x29, 120]
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w1, w0
-	bcc	.L2791
-	mov	w2, 1701
-	adrp	x1, .LANCHOR247
+	bcc	.L2869
+	mov	w2, 1706
+	adrp	x1, .LANCHOR250
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR247
+	add	x1, x1, :lo12:.LANCHOR250
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -19280,7 +19658,7 @@ FtlWrite:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2791:
+.L2869:
 	adrp	x0, .LANCHOR58
 	add	x0, x0, :lo12:.LANCHOR58
 	str	xzr, [x29, 168]
@@ -19288,25 +19666,25 @@ FtlWrite:
 	adrp	x0, .LANCHOR57
 	add	x0, x0, :lo12:.LANCHOR57
 	str	x0, [x29, 104]
-.L2792:
+.L2870:
 	ldr	w1, [x29, 144]
 	adrp	x28, .LANCHOR182
 	ldr	w27, [x29, 168]
 	cmp	w27, w1
-	bcc	.L2811
+	bcc	.L2889
 	mov	x27, x1
-.L2793:
+.L2871:
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
 	mov	x3, x22
 	mov	w2, 0
 	mov	w1, w27
 	bl	FtlProgPages
 	cmp	w25, w27
-	bcs	.L2812
-	mov	w2, 1790
-	adrp	x1, .LANCHOR247
+	bcs	.L2890
+	mov	w2, 1795
+	adrp	x1, .LANCHOR250
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR247
+	add	x1, x1, :lo12:.LANCHOR250
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -19314,12 +19692,12 @@ FtlWrite:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2812:
+.L2890:
 	sub	w25, w25, w27
-	b	.L2788
-.L2811:
+	b	.L2866
+.L2889:
 	ldrh	w0, [x22, 4]
-	cbz	w0, .L2793
+	cbz	w0, .L2871
 	add	x1, x29, 180
 	mov	w2, 0
 	mov	w0, w19
@@ -19350,9 +19728,9 @@ FtlWrite:
 	ldr	w0, [x29, 152]
 	cmp	w19, w20
 	ccmp	w0, w19, 4, ne
-	bne	.L2794
+	bne	.L2872
 	cmp	w19, w20
-	bne	.L2795
+	bne	.L2873
 	ldr	x0, [x29, 160]
 	ldrh	w2, [x0, #:lo12:.LANCHOR55]
 	udiv	w0, w21, w2
@@ -19362,27 +19740,27 @@ FtlWrite:
 	cmp	w2, w23
 	csel	w0, w2, w23, ls
 	str	w0, [x29, 156]
-.L2796:
+.L2874:
 	ldr	x0, [x29, 160]
 	ldr	w1, [x29, 156]
 	ldrh	w0, [x0, #:lo12:.LANCHOR55]
 	cmp	w0, w1
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
-	bne	.L2797
+	bne	.L2875
 	add	x3, x0, x26
 	cmp	w19, w20
-	bne	.L2798
+	bne	.L2876
 	str	x24, [x3, 8]
-.L2799:
+.L2877:
 	ldr	x0, [x29, 120]
 	ldrb	w1, [x22, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w1, w0
-	bcc	.L2808
-	mov	w2, 1775
-	adrp	x1, .LANCHOR247
+	bcc	.L2886
+	mov	w2, 1780
+	adrp	x1, .LANCHOR250
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR247
+	add	x1, x1, :lo12:.LANCHOR250
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -19390,7 +19768,7 @@ FtlWrite:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2808:
+.L2886:
 	ldp	x1, x2, [x29, 128]
 	mov	w0, -3947
 	strh	w0, [x1, x2]
@@ -19409,8 +19787,8 @@ FtlWrite:
 	ldr	x0, [x29, 168]
 	add	x0, x0, 1
 	str	x0, [x29, 168]
-	b	.L2792
-.L2795:
+	b	.L2870
+.L2873:
 	ldr	x0, [x29, 160]
 	add	w2, w21, w23
 	str	wzr, [x29, 148]
@@ -19418,27 +19796,27 @@ FtlWrite:
 	msub	w2, w19, w0, w2
 	and	w0, w2, 65535
 	str	w0, [x29, 156]
-	b	.L2796
-.L2798:
+	b	.L2874
+.L2876:
 	ldr	w0, [x29, 156]
-.L2826:
+.L2904:
 	mul	w0, w0, w19
 	sub	w0, w0, w21
 	lsl	w0, w0, 9
 	add	x0, x24, x0
 	str	x0, [x3, 8]
-	b	.L2799
-.L2797:
+	b	.L2877
+.L2875:
 	add	x0, x0, x26
 	cmp	w19, w20
-	bne	.L2800
+	bne	.L2878
 	adrp	x1, .LANCHOR186
 	ldr	x1, [x1, #:lo12:.LANCHOR186]
-.L2825:
+.L2903:
 	str	x1, [x0, 8]
 	ldr	w0, [x29, 180]
 	cmn	w0, #1
-	beq	.L2802
+	beq	.L2880
 	str	w0, [x29, 188]
 	mov	w2, 0
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
@@ -19451,17 +19829,17 @@ FtlWrite:
 	bl	FlashReadPages
 	ldr	w0, [x29, 184]
 	cmn	w0, #1
-	bne	.L2803
+	bne	.L2881
 	adrp	x0, .LANCHOR138
 	add	x0, x0, :lo12:.LANCHOR138
 	ldr	w1, [x0, 72]
 	add	w1, w1, 1
 	str	w1, [x0, 72]
-.L2806:
+.L2884:
 	ldr	w0, [x29, 156]
 	cmp	w19, w20
 	lsl	w2, w0, 9
-	bne	.L2807
+	bne	.L2885
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
 	mov	x1, x24
 	add	x3, x0, x26
@@ -19469,34 +19847,34 @@ FtlWrite:
 	ldr	x3, [x3, 8]
 	lsl	w0, w0, 9
 	add	x0, x3, x0
-.L2827:
+.L2905:
 	bl	ftl_memcpy
-	b	.L2799
-.L2800:
+	b	.L2877
+.L2878:
 	adrp	x1, .LANCHOR187
 	ldr	x1, [x1, #:lo12:.LANCHOR187]
-	b	.L2825
-.L2803:
+	b	.L2903
+.L2881:
 	ldr	w1, [x27, 8]
 	cmp	w19, w1
-	beq	.L2805
+	beq	.L2883
 	adrp	x0, .LANCHOR138
 	add	x0, x0, :lo12:.LANCHOR138
 	ldr	w2, [x0, 72]
 	add	w2, w2, 1
 	str	w2, [x0, 72]
-	adrp	x0, .LC73
+	adrp	x0, .LC77
 	mov	w2, w19
-	add	x0, x0, :lo12:.LC73
+	add	x0, x0, :lo12:.LC77
 	bl	printf
-.L2805:
+.L2883:
 	ldr	w0, [x27, 8]
 	cmp	w19, w0
-	beq	.L2806
-	mov	w2, 1754
-	adrp	x1, .LANCHOR247
+	beq	.L2884
+	mov	w2, 1759
+	adrp	x1, .LANCHOR250
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR247
+	add	x1, x1, :lo12:.LANCHOR250
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -19504,8 +19882,8 @@ FtlWrite:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-	b	.L2806
-.L2802:
+	b	.L2884
+.L2880:
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
 	ldr	x1, [x29, 104]
 	add	x0, x0, x26
@@ -19513,8 +19891,8 @@ FtlWrite:
 	mov	w1, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	b	.L2806
-.L2807:
+	b	.L2884
+.L2885:
 	ldr	x0, [x29, 160]
 	ldrh	w1, [x0, #:lo12:.LANCHOR55]
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
@@ -19524,16 +19902,16 @@ FtlWrite:
 	ldr	x0, [x3, 8]
 	lsl	w1, w1, 9
 	add	x1, x24, x1
-	b	.L2827
-.L2794:
+	b	.L2905
+.L2872:
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
 	add	x3, x0, x26
 	ldr	x0, [x29, 160]
 	ldrh	w0, [x0, #:lo12:.LANCHOR55]
-	b	.L2826
-.L2815:
+	b	.L2904
+.L2893:
 	mov	w0, -1
-	b	.L2782
+	b	.L2860
 	.size	FtlWrite, .-FtlWrite
 	.section	.text.ftl_vendor_write,"ax",@progbits
 	.align	2
@@ -19587,187 +19965,26 @@ ftl_write:
 	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	mov	w19, w2
-	stp	x21, x22, [sp, 32]
-	mov	x20, x3
-	mov	w22, w1
-	ands	w21, w0, 255
-	bne	.L2833
-	mov	w3, w2
-	mov	w0, 0
-	mov	x2, x20
-	bl	idb_write_data
-.L2833:
-	mov	x3, x20
-	mov	w2, w19
-	mov	w1, w22
-	mov	w0, w21
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 48
-	b	FtlWrite
-	.size	ftl_write, .-ftl_write
-	.section	.text.FtlCheckVpc,"ax",@progbits
-	.align	2
-	.global	FtlCheckVpc
-	.type	FtlCheckVpc, %function
-FtlCheckVpc:
-	stp	x29, x30, [sp, -128]!
-	adrp	x0, .LC45
-	add	x0, x0, :lo12:.LC45
-	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR72
-	add	x23, x23, :lo12:.LANCHOR72
-	stp	x21, x22, [sp, 32]
-	mov	w21, 0
-	stp	x19, x20, [sp, 16]
-	stp	x25, x26, [sp, 64]
-	adrp	x22, .LANCHOR248
-	stp	x27, x28, [sp, 80]
-	add	x1, x22, :lo12:.LANCHOR248
-	adrp	x20, check_valid_page_count_table
-	bl	printf
-	add	x19, x20, :lo12:check_valid_page_count_table
-	mov	x2, 8192
-	mov	w1, 0
-	mov	x0, x19
-	bl	memset
-.L2836:
-	ldr	w0, [x23]
-	cmp	w21, w0
-	bcc	.L2838
-	adrp	x24, .LANCHOR40
-	adrp	x23, .LANCHOR83
-	mov	w2, 2
-	adrp	x0, .LC74
-	ldrh	w3, [x24, #:lo12:.LANCHOR40]
-	add	x0, x0, :lo12:.LC74
-	ldr	x1, [x23, #:lo12:.LANCHOR83]
-	add	x21, x20, :lo12:check_valid_page_count_table
-	adrp	x26, .LC76
-	add	x26, x26, :lo12:.LC76
-	mov	w25, 0
-	mov	w19, 0
-	bl	rknand_print_hex
-	ldrh	w3, [x24, #:lo12:.LANCHOR40]
-	mov	w2, 2
-	mov	x1, x21
-	adrp	x0, .LC75
-	add	x24, x24, :lo12:.LANCHOR40
-	add	x0, x0, :lo12:.LC75
-	bl	rknand_print_hex
-	mov	w4, 65535
-.L2839:
-	ldrh	w0, [x24]
-	cmp	w0, w19
-	bhi	.L2841
-	adrp	x0, .LANCHOR87
-	ldr	x19, [x0, #:lo12:.LANCHOR87]
-	cbz	x19, .L2842
-	adrp	x0, .LANCHOR88
-	adrp	x26, .LC77
-	add	x20, x20, :lo12:check_valid_page_count_table
-	add	x26, x26, :lo12:.LC77
-	ldrh	w27, [x0, #:lo12:.LANCHOR88]
-	adrp	x0, .LANCHOR81
-	mov	x24, x0
-	mov	w21, 0
-	ldr	x1, [x0, #:lo12:.LANCHOR81]
-	mov	w28, 6
-	mov	w4, 65535
-	sub	x19, x19, x1
-	mov	x1, -6148914691236517206
-	asr	x19, x19, 1
-	movk	x1, 0xaaab, lsl 0
-	mul	x19, x19, x1
-	and	w19, w19, 65535
-.L2843:
-	cmp	w21, w27
-	bne	.L2845
-.L2842:
-	cbz	w25, .L2835
-	mov	w2, 1686
-	add	x1, x22, :lo12:.LANCHOR248
-	adrp	x0, .LC5
-	add	x0, x0, :lo12:.LC5
-	bl	printf
-	adrp	x1, .LC6
-	adrp	x0, .LC7
-	add	x1, x1, :lo12:.LC6
-	add	x0, x0, :lo12:.LC7
-	bl	printf
-.L2835:
+	mov	w19, w2
+	stp	x21, x22, [sp, 32]
+	mov	x20, x3
+	mov	w22, w1
+	ands	w21, w0, 255
+	bne	.L2911
+	mov	w3, w2
+	mov	w0, 0
+	mov	x2, x20
+	bl	idb_write_data
+.L2911:
+	mov	x3, x20
+	mov	w2, w19
+	mov	w1, w22
+	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 128
-	ret
-.L2838:
-	mov	w2, 0
-	add	x1, x29, 124
-	mov	w0, w21
-	bl	log2phys
-	ldr	w0, [x29, 124]
-	cmn	w0, #1
-	beq	.L2837
-	lsr	w0, w0, 10
-	bl	P2V_block_in_plane
-	and	x0, x0, 65535
-	ldrh	w1, [x19, x0, lsl 1]
-	add	w1, w1, 1
-	strh	w1, [x19, x0, lsl 1]
-.L2837:
-	add	w21, w21, 1
-	b	.L2836
-.L2841:
-	ldr	x0, [x23, #:lo12:.LANCHOR83]
-	ubfiz	x28, x19, 1, 16
-	sxtw	x27, w19
-	ldrh	w2, [x0, x28]
-	ldrh	w3, [x21, x27, lsl 1]
-	cmp	w2, w3
-	beq	.L2840
-	str	w4, [x29, 108]
-	mov	w1, w19
-	mov	x0, x26
-	bl	printf
-	ldr	x0, [x23, #:lo12:.LANCHOR83]
-	ldr	w4, [x29, 108]
-	ldrh	w0, [x0, x28]
-	cmp	w0, w4
-	beq	.L2840
-	ldrh	w1, [x21, x27, lsl 1]
-	cmp	w1, w0
-	csinc	w25, w25, wzr, ls
-.L2840:
-	add	w19, w19, 1
-	and	w19, w19, 65535
-	b	.L2839
-.L2845:
-	ldr	x1, [x23, #:lo12:.LANCHOR83]
-	ubfiz	x0, x19, 1, 16
-	ldrh	w2, [x1, x0]
-	cbz	w2, .L2844
-	ldrh	w3, [x20, w19, sxtw 1]
-	mov	w1, w19
-	str	w4, [x29, 108]
-	mov	x0, x26
-	mov	w25, 1
-	bl	printf
-	ldr	w4, [x29, 108]
-.L2844:
-	umull	x19, w19, w28
-	ldr	x0, [x24, #:lo12:.LANCHOR81]
-	ldrh	w19, [x0, x19]
-	cmp	w19, w4
-	beq	.L2842
-	add	w21, w21, 1
-	and	w21, w21, 65535
-	b	.L2843
-	.size	FtlCheckVpc, .-FtlCheckVpc
+	ldp	x29, x30, [sp], 48
+	b	FtlWrite
+	.size	ftl_write, .-ftl_write
 	.section	.text.FtlDumpSysBlock,"ax",@progbits
 	.align	2
 	.global	FtlDumpSysBlock
@@ -19780,8 +19997,8 @@ FtlDumpSysBlock:
 	and	w25, w0, 65535
 	adrp	x0, .LANCHOR183
 	stp	x21, x22, [sp, 48]
-	adrp	x21, .LANCHOR202
-	add	x1, x21, :lo12:.LANCHOR202
+	adrp	x21, .LANCHOR203
+	add	x1, x21, :lo12:.LANCHOR203
 	ldr	x2, [x0, #:lo12:.LANCHOR183]
 	adrp	x22, .LANCHOR53
 	stp	x23, x24, [sp, 64]
@@ -19799,10 +20016,10 @@ FtlDumpSysBlock:
 	mov	x27, x0
 	mov	w19, 0
 	str	x2, [x1, 16]
-.L2861:
+.L2914:
 	ldrh	w0, [x22]
 	cmp	w19, w0
-	blt	.L2863
+	blt	.L2916
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -19811,8 +20028,8 @@ FtlDumpSysBlock:
 	ldr	x27, [sp, 96]
 	add	sp, sp, 112
 	ret
-.L2863:
-	add	x20, x21, :lo12:.LANCHOR202
+.L2916:
+	add	x20, x21, :lo12:.LANCHOR203
 	orr	w0, w19, w26
 	mov	w2, 1
 	mov	w1, w2
@@ -19820,7 +20037,7 @@ FtlDumpSysBlock:
 	mov	x0, x20
 	bl	FlashReadPages
 	ldp	x1, x0, [x20, 8]
-	ldr	w2, [x21, #:lo12:.LANCHOR202]
+	ldr	w2, [x21, #:lo12:.LANCHOR203]
 	ldr	w3, [x20, 4]
 	ldr	w1, [x1]
 	str	w1, [sp]
@@ -19832,16 +20049,16 @@ FtlDumpSysBlock:
 	ldr	x0, [x20, 16]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L2862
+	beq	.L2915
 	ldr	x1, [x27, #:lo12:.LANCHOR183]
 	mov	w3, 768
 	mov	w2, 4
 	mov	x0, x24
 	bl	rknand_print_hex
-.L2862:
+.L2915:
 	add	w19, w19, 1
 	sxth	w19, w19
-	b	.L2861
+	b	.L2914
 	.size	FtlDumpSysBlock, .-FtlDumpSysBlock
 	.section	.text.dump_map_info,"ax",@progbits
 	.align	2
@@ -19862,33 +20079,33 @@ dump_map_info:
 	add	x22, x22, :lo12:.LANCHOR41
 	stp	x25, x26, [sp, 80]
 	adrp	x24, .LANCHOR38
-.L2869:
+.L2922:
 	ldrh	w0, [x22]
 	cmp	w0, w20
-	bhi	.L2875
+	bhi	.L2928
 	adrp	x25, .LANCHOR128
-	adrp	x19, .LANCHOR202
+	adrp	x19, .LANCHOR203
 	add	x25, x25, :lo12:.LANCHOR128
-	add	x19, x19, :lo12:.LANCHOR202
+	add	x19, x19, :lo12:.LANCHOR203
 	mov	w26, 0
-.L2876:
+.L2929:
 	ldrh	w0, [x25]
 	cmp	w26, w0
-	bge	.L2879
+	bge	.L2932
 	adrp	x21, .LANCHOR53
 	adrp	x0, .LC48
 	sbfiz	x23, x26, 1, 32
 	mov	w20, 0
 	add	x21, x21, :lo12:.LANCHOR53
 	add	x24, x0, :lo12:.LC48
-	b	.L2880
-.L2871:
+	b	.L2933
+.L2924:
 	ldrb	w0, [x23, x5]
 	mov	w1, w20
 	bl	V2P_block
 	and	w4, w0, 65535
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L2870
+	cbnz	w0, .L2923
 	umaddl	x1, w19, w7, x6
 	lsl	w4, w4, 10
 	mul	w0, w19, w8
@@ -19898,17 +20115,17 @@ dump_map_info:
 	str	w4, [x1, 4]
 	add	x0, x10, x0, sxtw 2
 	stp	x11, x0, [x1, 8]
-.L2870:
+.L2923:
 	add	x5, x5, 1
-.L2877:
+.L2930:
 	cmp	w12, w5, uxth
-	bhi	.L2871
-	cbnz	w19, .L2872
-.L2874:
+	bhi	.L2924
+	cbnz	w19, .L2925
+.L2927:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2869
-.L2872:
+	b	.L2922
+.L2925:
 	mov	w1, w19
 	mov	w2, 1
 	mov	x0, x6
@@ -19918,7 +20135,7 @@ dump_map_info:
 	add	x26, x26, :lo12:.LC80
 	mov	x25, 0
 	umull	x19, w19, w0
-.L2873:
+.L2926:
 	ldr	x0, [x21, #:lo12:.LANCHOR180]
 	add	x0, x0, x25
 	add	x25, x25, 56
@@ -19934,9 +20151,9 @@ dump_map_info:
 	ubfx	x1, x2, 10, 16
 	bl	printf
 	cmp	x25, x19
-	bne	.L2873
-	b	.L2874
-.L2875:
+	bne	.L2926
+	b	.L2927
+.L2928:
 	adrp	x0, .LANCHOR104
 	adrp	x21, .LANCHOR180
 	ldrh	w12, [x24, #:lo12:.LANCHOR38]
@@ -19949,8 +20166,8 @@ dump_map_info:
 	adrp	x0, .LANCHOR58
 	mov	w7, 56
 	ldrh	w8, [x0, #:lo12:.LANCHOR58]
-	b	.L2877
-.L2878:
+	b	.L2930
+.L2931:
 	adrp	x22, .LANCHOR129
 	mov	w2, 1
 	mov	w1, w2
@@ -19974,14 +20191,14 @@ dump_map_info:
 	mov	x0, x24
 	ldp	w2, w3, [x19]
 	bl	printf
-.L2880:
+.L2933:
 	ldrh	w0, [x21]
 	cmp	w20, w0
-	blt	.L2878
+	blt	.L2931
 	add	w0, w26, 1
 	sxth	w26, w0
-	b	.L2876
-.L2879:
+	b	.L2929
+.L2932:
 	adrp	x0, .LANCHOR64
 	mov	w2, 2
 	adrp	x19, .LANCHOR66
@@ -20205,6 +20422,7 @@ dump_map_info:
 	.global	gReadRetryInfo
 	.global	gpNandParaInfo
 	.global	gNandOptPara
+	.global	g_nand_ecc_en
 	.global	g_slc2KBNand
 	.global	g_maxRetryCount
 	.global	g_maxRegNum
@@ -20335,7 +20553,7 @@ c_ftl_nand_data_blks_per_plane:
 	.zero	2
 	.section	.bss.c_ftl_nand_data_op_blks_per_plane,"aw",@nobits
 	.align	1
-	.set	.LANCHOR223,. + 0
+	.set	.LANCHOR224,. + 0
 	.type	c_ftl_nand_data_op_blks_per_plane, %object
 	.size	c_ftl_nand_data_op_blks_per_plane, 2
 c_ftl_nand_data_op_blks_per_plane:
@@ -20537,7 +20755,7 @@ gBbtInfo:
 	.zero	96
 	.section	.bss.gBlockPageAlignSize,"aw",@nobits
 	.align	2
-	.set	.LANCHOR3,. + 0
+	.set	.LANCHOR4,. + 0
 	.type	gBlockPageAlignSize, %object
 	.size	gBlockPageAlignSize, 4
 gBlockPageAlignSize:
@@ -20647,14 +20865,14 @@ gMasterTempBuf:
 gMultiPageProgEn:
 	.zero	1
 	.section	.bss.gMultiPageReadEn,"aw",@nobits
-	.set	.LANCHOR201,. + 0
+	.set	.LANCHOR202,. + 0
 	.type	gMultiPageReadEn, %object
 	.size	gMultiPageReadEn, 1
 gMultiPageReadEn:
 	.zero	1
 	.section	.bss.gNandChipMap,"aw",@nobits
 	.align	3
-	.set	.LANCHOR6,. + 0
+	.set	.LANCHOR0,. + 0
 	.type	gNandChipMap, %object
 	.size	gNandChipMap, 64
 gNandChipMap:
@@ -20697,7 +20915,7 @@ gNandFlashInfoBlockEcc:
 gNandFlashResEndPageAddr:
 	.zero	4
 	.section	.bss.gNandIDBResBlkNum,"aw",@nobits
-	.set	.LANCHOR2,. + 0
+	.set	.LANCHOR3,. + 0
 	.type	gNandIDBResBlkNum, %object
 	.size	gNandIDBResBlkNum, 1
 gNandIDBResBlkNum:
@@ -20742,7 +20960,7 @@ gNandOptPara:
 gNandPhyInfo:
 	.zero	28
 	.section	.bss.gNandRandomizer,"aw",@nobits
-	.set	.LANCHOR5,. + 0
+	.set	.LANCHOR6,. + 0
 	.type	gNandRandomizer, %object
 	.size	gNandRandomizer, 1
 gNandRandomizer:
@@ -20784,7 +21002,7 @@ gSysFreeQueue:
 	.zero	2056
 	.section	.bss.gSysInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR209,. + 0
+	.set	.LANCHOR210,. + 0
 	.type	gSysInfo, %object
 	.size	gSysInfo, 16
 gSysInfo:
@@ -20804,7 +21022,7 @@ gTotleBlock:
 	.zero	2
 	.section	.bss.gVendorBlkInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR215,. + 0
+	.set	.LANCHOR216,. + 0
 	.type	gVendorBlkInfo, %object
 	.size	gVendorBlkInfo, 64
 gVendorBlkInfo:
@@ -20825,7 +21043,7 @@ g_GlobalSysVersion:
 	.zero	4
 	.section	.bss.g_LowFormat,"aw",@nobits
 	.align	2
-	.set	.LANCHOR244,. + 0
+	.set	.LANCHOR247,. + 0
 	.type	g_LowFormat, %object
 	.size	g_LowFormat, 4
 g_LowFormat:
@@ -20839,7 +21057,7 @@ g_MaxLbaSector:
 	.zero	4
 	.section	.bss.g_MaxLbn,"aw",@nobits
 	.align	2
-	.set	.LANCHOR222,. + 0
+	.set	.LANCHOR223,. + 0
 	.type	g_MaxLbn, %object
 	.size	g_MaxLbn, 4
 g_MaxLbn:
@@ -20902,7 +21120,7 @@ g_ect_tbl_info_size:
 	.zero	2
 	.section	.bss.g_ect_tbl_power_up_flush,"aw",@nobits
 	.align	1
-	.set	.LANCHOR218,. + 0
+	.set	.LANCHOR219,. + 0
 	.type	g_ect_tbl_power_up_flush, %object
 	.size	g_ect_tbl_power_up_flush, 2
 g_ect_tbl_power_up_flush:
@@ -20923,7 +21141,7 @@ g_free_slc_blk_num:
 	.zero	2
 	.section	.bss.g_ftl_nand_free_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR246,. + 0
+	.set	.LANCHOR249,. + 0
 	.type	g_ftl_nand_free_count, %object
 	.size	g_ftl_nand_free_count, 4
 g_ftl_nand_free_count:
@@ -20965,14 +21183,14 @@ g_gc_blk_num:
 	.zero	2
 	.section	.bss.g_gc_cur_blk_max_valid_pages,"aw",@nobits
 	.align	1
-	.set	.LANCHOR242,. + 0
+	.set	.LANCHOR245,. + 0
 	.type	g_gc_cur_blk_max_valid_pages, %object
 	.size	g_gc_cur_blk_max_valid_pages, 2
 g_gc_cur_blk_max_valid_pages:
 	.zero	2
 	.section	.bss.g_gc_cur_blk_valid_pages,"aw",@nobits
 	.align	1
-	.set	.LANCHOR241,. + 0
+	.set	.LANCHOR244,. + 0
 	.type	g_gc_cur_blk_valid_pages, %object
 	.size	g_gc_cur_blk_valid_pages, 2
 g_gc_cur_blk_valid_pages:
@@ -21069,7 +21287,7 @@ g_gc_skip_write_count:
 	.zero	4
 	.section	.bss.g_gc_superblock,"aw",@nobits
 	.align	3
-	.set	.LANCHOR204,. + 0
+	.set	.LANCHOR205,. + 0
 	.type	g_gc_superblock, %object
 	.size	g_gc_superblock, 48
 g_gc_superblock:
@@ -21135,6 +21353,12 @@ g_max_erase_count:
 	.size	g_min_erase_count, 4
 g_min_erase_count:
 	.zero	4
+	.section	.bss.g_nand_ecc_en,"aw",@nobits
+	.set	.LANCHOR200,. + 0
+	.type	g_nand_ecc_en, %object
+	.size	g_nand_ecc_en, 1
+g_nand_ecc_en:
+	.zero	1
 	.section	.bss.g_nandc_version_data,"aw",@nobits
 	.align	2
 	.set	.LANCHOR119,. + 0
@@ -21165,14 +21389,14 @@ g_page_map_check_enable:
 	.zero	2
 	.section	.bss.g_power_lost_ecc_error_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR234,. + 0
+	.set	.LANCHOR237,. + 0
 	.type	g_power_lost_ecc_error_blk, %object
 	.size	g_power_lost_ecc_error_blk, 2
 g_power_lost_ecc_error_blk:
 	.zero	2
 	.section	.bss.g_power_lost_recovery_flag,"aw",@nobits
 	.align	1
-	.set	.LANCHOR235,. + 0
+	.set	.LANCHOR238,. + 0
 	.type	g_power_lost_recovery_flag, %object
 	.size	g_power_lost_recovery_flag, 2
 g_power_lost_recovery_flag:
@@ -21186,14 +21410,14 @@ g_recovery_page_min_ver:
 	.zero	4
 	.section	.bss.g_recovery_page_num,"aw",@nobits
 	.align	2
-	.set	.LANCHOR236,. + 0
+	.set	.LANCHOR239,. + 0
 	.type	g_recovery_page_num, %object
 	.size	g_recovery_page_num, 4
 g_recovery_page_num:
 	.zero	4
 	.section	.bss.g_recovery_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR237,. + 0
+	.set	.LANCHOR240,. + 0
 	.type	g_recovery_ppa_tbl, %object
 	.size	g_recovery_ppa_tbl, 128
 g_recovery_ppa_tbl:
@@ -21212,7 +21436,7 @@ g_req_cache:
 g_retryMode:
 	.zero	1
 	.section	.bss.g_slc2KBNand,"aw",@nobits
-	.set	.LANCHOR1,. + 0
+	.set	.LANCHOR2,. + 0
 	.type	g_slc2KBNand, %object
 	.size	g_slc2KBNand, 1
 g_slc2KBNand:
@@ -21240,7 +21464,7 @@ g_tmp_data_superblock_id:
 	.zero	2
 	.section	.bss.g_totle_avg_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR205,. + 0
+	.set	.LANCHOR206,. + 0
 	.type	g_totle_avg_erase_count, %object
 	.size	g_totle_avg_erase_count, 4
 g_totle_avg_erase_count:
@@ -21296,7 +21520,7 @@ g_totle_read_page_count:
 	.zero	4
 	.section	.bss.g_totle_read_sector,"aw",@nobits
 	.align	2
-	.set	.LANCHOR217,. + 0
+	.set	.LANCHOR218,. + 0
 	.type	g_totle_read_sector, %object
 	.size	g_totle_read_sector, 4
 g_totle_read_sector:
@@ -21338,21 +21562,21 @@ g_totle_write_page_count:
 	.zero	4
 	.section	.bss.g_totle_write_sector,"aw",@nobits
 	.align	2
-	.set	.LANCHOR216,. + 0
+	.set	.LANCHOR217,. + 0
 	.type	g_totle_write_sector, %object
 	.size	g_totle_write_sector, 4
 g_totle_write_sector:
 	.zero	4
 	.section	.bss.gc_discard_updated,"aw",@nobits
 	.align	2
-	.set	.LANCHOR231,. + 0
+	.set	.LANCHOR233,. + 0
 	.type	gc_discard_updated, %object
 	.size	gc_discard_updated, 4
 gc_discard_updated:
 	.zero	4
 	.section	.bss.gc_ink_free_return_value,"aw",@nobits
 	.align	1
-	.set	.LANCHOR240,. + 0
+	.set	.LANCHOR243,. + 0
 	.type	gc_ink_free_return_value, %object
 	.size	gc_ink_free_return_value, 2
 gc_ink_free_return_value:
@@ -21413,7 +21637,7 @@ gp_gc_page_buf_info:
 	.zero	8
 	.section	.bss.gp_last_act_superblock,"aw",@nobits
 	.align	3
-	.set	.LANCHOR229,. + 0
+	.set	.LANCHOR231,. + 0
 	.type	gp_last_act_superblock, %object
 	.size	gp_last_act_superblock, 8
 gp_last_act_superblock:
@@ -21447,7 +21671,7 @@ mlcPageToSlcPageTbl:
 	.zero	1024
 	.section	.bss.p_blk_mode_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR0,. + 0
+	.set	.LANCHOR1,. + 0
 	.type	p_blk_mode_table, %object
 	.size	p_blk_mode_table, 8
 p_blk_mode_table:
@@ -21712,7 +21936,7 @@ req_read:
 	.zero	8
 	.section	.bss.req_sys,"aw",@nobits
 	.align	3
-	.set	.LANCHOR202,. + 0
+	.set	.LANCHOR203,. + 0
 	.type	req_sys, %object
 	.size	req_sys, 56
 req_sys:
@@ -24168,14 +24392,14 @@ ToshibaRefValue:
 	.byte	112
 	.section	.data.ftl_gc_temp_block_bops_scan_page_addr,"aw",@progbits
 	.align	1
-	.set	.LANCHOR238,. + 0
+	.set	.LANCHOR241,. + 0
 	.type	ftl_gc_temp_block_bops_scan_page_addr, %object
 	.size	ftl_gc_temp_block_bops_scan_page_addr, 2
 ftl_gc_temp_block_bops_scan_page_addr:
 	.hword	-1
 	.section	.data.gFtlInitStatus,"aw",@progbits
 	.align	2
-	.set	.LANCHOR230,. + 0
+	.set	.LANCHOR232,. + 0
 	.type	gFtlInitStatus, %object
 	.size	gFtlInitStatus, 4
 gFtlInitStatus:
@@ -24210,7 +24434,7 @@ gNandParaInfo:
 	.zero	4
 	.section	.data.gSlcNandParaInfo,"aw",@progbits
 	.align	3
-	.set	.LANCHOR200,. + 0
+	.set	.LANCHOR201,. + 0
 	.type	gSlcNandParaInfo, %object
 	.size	gSlcNandParaInfo, 32
 gSlcNandParaInfo:
@@ -24248,7 +24472,7 @@ power_up_flag:
 	.word	1
 	.section	.data.random_seed,"aw",@progbits
 	.align	3
-	.set	.LANCHOR4,. + 0
+	.set	.LANCHOR5,. + 0
 	.type	random_seed, %object
 	.size	random_seed, 256
 random_seed:
@@ -24439,7 +24663,7 @@ refValueDefault:
 .LC32:
 	.string	"prog read d error: = %x %x %x\n"
 	.section	.rodata.FlashReadFacBbtData.str1.1,"aMS",@progbits,1
-.LC52:
+.LC55:
 	.string	"BBT:"
 	.section	.rodata.FlashReadIdbDataRaw.str1.1,"aMS",@progbits,1
 .LC14:
@@ -24468,13 +24692,9 @@ refValueDefault:
 .LC35:
 	.string	"FtlBbmTblFlush error = %x error count = %d\n"
 	.section	.rodata.FtlCheckVpc.str1.1,"aMS",@progbits,1
-.LC74:
-	.string	"vpc1"
-.LC75:
-	.string	"vpc2"
-.LC76:
+.LC60:
 	.string	"FtlCheckVpc2 %x = %x  %x\n"
-.LC77:
+.LC61:
 	.string	"free blk vpc error %x = %x  %x\n"
 	.section	.rodata.FtlDumpBlockInfo.str1.1,"aMS",@progbits,1
 .LC45:
@@ -24496,19 +24716,19 @@ refValueDefault:
 .LC4:
 	.string	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\n"
 	.section	.rodata.FtlGcFreeTempBlock.str1.1,"aMS",@progbits,1
-.LC65:
+.LC70:
 	.string	"GC des block %x done\n"
 	.section	.rodata.FtlGcScanTempBlk.str1.1,"aMS",@progbits,1
-.LC63:
+.LC68:
 	.string	"FtlGcScanTempBlk Error ID %x %x!!!!!!! \n"
-.LC64:
+.LC69:
 	.string	"FtlGcScanTempBlkError ID %x %x!!!!!!!\n"
 	.section	.rodata.FtlInit.str1.1,"aMS",@progbits,1
-.LC67:
-	.string	"FTL version: 5.0.53 20190107"
-.LC68:
+.LC71:
+	.string	"FTL version: 5.0.56 20190508"
+.LC72:
 	.string	"...%s: no bad block mapping table, format device\n"
-.LC69:
+.LC73:
 	.string	"...%s FtlSysBlkInit error ,format device!\n"
 	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",@progbits,1
 .LC43:
@@ -24519,14 +24739,14 @@ refValueDefault:
 .LC41:
 	.string	"FtlMapWritePage error = %x error count = %d\n"
 	.section	.rodata.FtlProgPages.str1.1,"aMS",@progbits,1
-.LC56:
+.LC59:
 	.string	"Ftlwrite decrement_vpc_count %x = %d\n"
 	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",@progbits,1
-.LC60:
+.LC65:
 	.string	"RSB refresh addr %x\n"
-.LC61:
+.LC66:
 	.string	"spuer block %x vpn is 0\n "
-.LC62:
+.LC67:
 	.string	"g_recovery_ppa %x ver %x\n "
 	.section	.rodata.FtlScanAllBlock.str1.1,"aMS",@progbits,1
 .LC49:
@@ -24542,17 +24762,17 @@ refValueDefault:
 .LC38:
 	.string	"FtlVpcTblFlush error = %x error count = %d\n"
 	.section	.rodata.FtlWrite.str1.1,"aMS",@progbits,1
-.LC73:
+.LC77:
 	.string	"FtlWrite: lpa error:%x %x\n"
 	.section	.rodata.Ftl_load_ext_data.str1.1,"aMS",@progbits,1
 .LC44:
 	.string	"slc mode"
 	.section	.rodata.Ftlscanalldata.str1.1,"aMS",@progbits,1
-.LC57:
+.LC62:
 	.string	"Ftlscanalldata = %x\n"
-.LC58:
+.LC63:
 	.string	"scan lpa = %x ppa= %x\n"
-.LC59:
+.LC64:
 	.string	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\n"
 	.section	.rodata.HynixGetReadRetryDefault.str1.1,"aMS",@progbits,1
 .LC21:
@@ -24569,236 +24789,243 @@ refValueDefault:
 	.section	.rodata.MicronReadRetrial.str1.1,"aMS",@progbits,1
 .LC13:
 	.string	"micron RR %d row=%x,count %d,status=%d\n"
-	.section	.rodata.__func__.10005,"a",@progbits
+	.section	.rodata.__func__.10012,"a",@progbits
 	.align	3
-	.set	.LANCHOR220,. + 0
-	.type	__func__.10005, %object
-	.size	__func__.10005, 14
-__func__.10005:
+	.set	.LANCHOR221,. + 0
+	.type	__func__.10012, %object
+	.size	__func__.10012, 14
+__func__.10012:
 	.string	"FtlScanSysBlk"
-	.section	.rodata.__func__.10060,"a",@progbits
+	.section	.rodata.__func__.10067,"a",@progbits
 	.align	3
-	.set	.LANCHOR221,. + 0
-	.type	__func__.10060, %object
-	.size	__func__.10060, 15
-__func__.10060:
+	.set	.LANCHOR222,. + 0
+	.type	__func__.10067, %object
+	.size	__func__.10067, 15
+__func__.10067:
 	.string	"FtlLoadSysInfo"
-	.section	.rodata.__func__.10071,"a",@progbits
+	.section	.rodata.__func__.10078,"a",@progbits
 	.align	3
-	.set	.LANCHOR248,. + 0
-	.type	__func__.10071, %object
-	.size	__func__.10071, 12
-__func__.10071:
+	.set	.LANCHOR234,. + 0
+	.type	__func__.10078, %object
+	.size	__func__.10078, 12
+__func__.10078:
 	.string	"FtlCheckVpc"
-	.section	.rodata.__func__.10103,"a",@progbits
+	.section	.rodata.__func__.10110,"a",@progbits
 	.align	3
-	.set	.LANCHOR224,. + 0
-	.type	__func__.10103, %object
-	.size	__func__.10103, 17
-__func__.10103:
+	.set	.LANCHOR225,. + 0
+	.type	__func__.10110, %object
+	.size	__func__.10110, 17
+__func__.10110:
 	.string	"FtlDumpBlockInfo"
-	.section	.rodata.__func__.10122,"a",@progbits
+	.section	.rodata.__func__.10129,"a",@progbits
 	.align	3
-	.set	.LANCHOR225,. + 0
-	.type	__func__.10122, %object
-	.size	__func__.10122, 16
-__func__.10122:
+	.set	.LANCHOR226,. + 0
+	.type	__func__.10129, %object
+	.size	__func__.10129, 16
+__func__.10129:
 	.string	"FtlScanAllBlock"
-	.section	.rodata.__func__.10227,"a",@progbits
+	.section	.rodata.__func__.10234,"a",@progbits
 	.align	3
-	.set	.LANCHOR232,. + 0
-	.type	__func__.10227, %object
-	.size	__func__.10227, 16
-__func__.10227:
+	.set	.LANCHOR235,. + 0
+	.type	__func__.10234, %object
+	.size	__func__.10234, 16
+__func__.10234:
 	.string	"FtlReUsePrevPpa"
-	.section	.rodata.__func__.10260,"a",@progbits
+	.section	.rodata.__func__.10267,"a",@progbits
 	.align	3
-	.set	.LANCHOR233,. + 0
-	.type	__func__.10260, %object
-	.size	__func__.10260, 22
-__func__.10260:
+	.set	.LANCHOR236,. + 0
+	.type	__func__.10267, %object
+	.size	__func__.10267, 22
+__func__.10267:
 	.string	"FtlRecoverySuperblock"
-	.section	.rodata.__func__.10314,"a",@progbits
+	.section	.rodata.__func__.10321,"a",@progbits
 	.align	3
 	.set	.LANCHOR101,. + 0
-	.type	__func__.10314, %object
-	.size	__func__.10314, 16
-__func__.10314:
+	.type	__func__.10321, %object
+	.size	__func__.10321, 16
+__func__.10321:
 	.string	"make_superblock"
-	.section	.rodata.__func__.10334,"a",@progbits
+	.section	.rodata.__func__.10341,"a",@progbits
 	.align	3
 	.set	.LANCHOR140,. + 0
-	.type	__func__.10334, %object
-	.size	__func__.10334, 18
-__func__.10334:
+	.type	__func__.10341, %object
+	.size	__func__.10341, 18
+__func__.10341:
 	.string	"SupperBlkListInit"
-	.section	.rodata.__func__.10411,"a",@progbits
+	.section	.rodata.__func__.10385,"a",@progbits
 	.align	3
-	.set	.LANCHOR203,. + 0
-	.type	__func__.10411, %object
-	.size	__func__.10411, 25
-__func__.10411:
+	.set	.LANCHOR227,. + 0
+	.type	__func__.10385, %object
+	.size	__func__.10385, 17
+__func__.10385:
+	.string	"ftl_scan_all_ppa"
+	.section	.rodata.__func__.10430,"a",@progbits
+	.align	3
+	.set	.LANCHOR204,. + 0
+	.type	__func__.10430, %object
+	.size	__func__.10430, 25
+__func__.10430:
 	.string	"allocate_data_superblock"
-	.section	.rodata.__func__.10425,"a",@progbits
+	.section	.rodata.__func__.10444,"a",@progbits
 	.align	3
-	.set	.LANCHOR219,. + 0
-	.type	__func__.10425, %object
-	.size	__func__.10425, 29
-__func__.10425:
+	.set	.LANCHOR220,. + 0
+	.type	__func__.10444, %object
+	.size	__func__.10444, 29
+__func__.10444:
 	.string	"allocate_new_data_superblock"
-	.section	.rodata.__func__.10431,"a",@progbits
+	.section	.rodata.__func__.10450,"a",@progbits
 	.align	3
-	.set	.LANCHOR208,. + 0
-	.type	__func__.10431, %object
-	.size	__func__.10431, 19
-__func__.10431:
+	.set	.LANCHOR209,. + 0
+	.type	__func__.10450, %object
+	.size	__func__.10450, 19
+__func__.10450:
 	.string	"get_new_active_ppa"
-	.section	.rodata.__func__.10442,"a",@progbits
+	.section	.rodata.__func__.10461,"a",@progbits
 	.align	3
-	.set	.LANCHOR206,. + 0
-	.type	__func__.10442, %object
-	.size	__func__.10442, 16
-__func__.10442:
+	.set	.LANCHOR207,. + 0
+	.type	__func__.10461, %object
+	.size	__func__.10461, 16
+__func__.10461:
 	.string	"update_vpc_list"
-	.section	.rodata.__func__.10447,"a",@progbits
+	.section	.rodata.__func__.10466,"a",@progbits
 	.align	3
-	.set	.LANCHOR207,. + 0
-	.type	__func__.10447, %object
-	.size	__func__.10447, 20
-__func__.10447:
+	.set	.LANCHOR208,. + 0
+	.type	__func__.10466, %object
+	.size	__func__.10466, 20
+__func__.10466:
 	.string	"decrement_vpc_count"
-	.section	.rodata.__func__.10515,"a",@progbits
+	.section	.rodata.__func__.10534,"a",@progbits
 	.align	3
-	.set	.LANCHOR239,. + 0
-	.type	__func__.10515, %object
-	.size	__func__.10515, 19
-__func__.10515:
+	.set	.LANCHOR242,. + 0
+	.type	__func__.10534, %object
+	.size	__func__.10534, 19
+__func__.10534:
 	.string	"FtlGcFreeTempBlock"
-	.section	.rodata.__func__.10614,"a",@progbits
+	.section	.rodata.__func__.10634,"a",@progbits
 	.align	3
-	.set	.LANCHOR243,. + 0
-	.type	__func__.10614, %object
-	.size	__func__.10614, 23
-__func__.10614:
+	.set	.LANCHOR246,. + 0
+	.type	__func__.10634, %object
+	.size	__func__.10634, 23
+__func__.10634:
 	.string	"rk_ftl_garbage_collect"
-	.section	.rodata.__func__.9435,"a",@progbits
+	.section	.rodata.__func__.9441,"a",@progbits
 	.align	3
-	.set	.LANCHOR245,. + 0
-	.type	__func__.9435, %object
-	.size	__func__.9435, 8
-__func__.9435:
+	.set	.LANCHOR248,. + 0
+	.type	__func__.9441, %object
+	.size	__func__.9441, 8
+__func__.9441:
 	.string	"FtlInit"
-	.section	.rodata.__func__.9495,"a",@progbits
+	.section	.rodata.__func__.9502,"a",@progbits
 	.align	3
-	.set	.LANCHOR228,. + 0
-	.type	__func__.9495, %object
-	.size	__func__.9495, 13
-__func__.9495:
+	.set	.LANCHOR230,. + 0
+	.type	__func__.9502, %object
+	.size	__func__.9502, 13
+__func__.9502:
 	.string	"FtlProgPages"
-	.section	.rodata.__func__.9521,"a",@progbits
+	.section	.rodata.__func__.9528,"a",@progbits
 	.align	3
-	.set	.LANCHOR247,. + 0
-	.type	__func__.9521, %object
-	.size	__func__.9521, 9
-__func__.9521:
+	.set	.LANCHOR250,. + 0
+	.type	__func__.9528, %object
+	.size	__func__.9528, 9
+__func__.9528:
 	.string	"FtlWrite"
-	.section	.rodata.__func__.9604,"a",@progbits
+	.section	.rodata.__func__.9611,"a",@progbits
 	.align	3
 	.set	.LANCHOR124,. + 0
-	.type	__func__.9604, %object
-	.size	__func__.9604, 14
-__func__.9604:
+	.type	__func__.9611, %object
+	.size	__func__.9611, 14
+__func__.9611:
 	.string	"FtlBbt2Bitmap"
-	.section	.rodata.__func__.9650,"a",@progbits
+	.section	.rodata.__func__.9657,"a",@progbits
 	.align	3
-	.set	.LANCHOR211,. + 0
-	.type	__func__.9650, %object
-	.size	__func__.9650, 11
-__func__.9650:
+	.set	.LANCHOR212,. + 0
+	.type	__func__.9657, %object
+	.size	__func__.9657, 11
+__func__.9657:
 	.string	"FtlLoadBbt"
-	.section	.rodata.__func__.9743,"a",@progbits
+	.section	.rodata.__func__.9750,"a",@progbits
 	.align	3
 	.set	.LANCHOR89,. + 0
-	.type	__func__.9743, %object
-	.size	__func__.9743, 17
-__func__.9743:
+	.type	__func__.9750, %object
+	.size	__func__.9750, 17
+__func__.9750:
 	.string	"INSERT_FREE_LIST"
-	.section	.rodata.__func__.9747,"a",@progbits
+	.section	.rodata.__func__.9754,"a",@progbits
 	.align	3
 	.set	.LANCHOR86,. + 0
-	.type	__func__.9747, %object
-	.size	__func__.9747, 17
-__func__.9747:
+	.type	__func__.9754, %object
+	.size	__func__.9754, 17
+__func__.9754:
 	.string	"INSERT_DATA_LIST"
-	.section	.rodata.__func__.9784,"a",@progbits
+	.section	.rodata.__func__.9791,"a",@progbits
 	.align	3
 	.set	.LANCHOR90,. + 0
-	.type	__func__.9784, %object
-	.size	__func__.9784, 17
-__func__.9784:
+	.type	__func__.9791, %object
+	.size	__func__.9791, 17
+__func__.9791:
 	.string	"List_remove_node"
-	.section	.rodata.__func__.9814,"a",@progbits
-	.align	3
-	.set	.LANCHOR94,. + 0
-	.type	__func__.9814, %object
-	.size	__func__.9814, 22
-__func__.9814:
-	.string	"List_update_data_list"
 	.section	.rodata.__func__.9821,"a",@progbits
 	.align	3
-	.set	.LANCHOR227,. + 0
+	.set	.LANCHOR94,. + 0
 	.type	__func__.9821, %object
-	.size	__func__.9821, 20
+	.size	__func__.9821, 22
 __func__.9821:
+	.string	"List_update_data_list"
+	.section	.rodata.__func__.9828,"a",@progbits
+	.align	3
+	.set	.LANCHOR229,. + 0
+	.type	__func__.9828, %object
+	.size	__func__.9828, 20
+__func__.9828:
 	.string	"ftl_load_l2p_region"
-	.section	.rodata.__func__.9852,"a",@progbits
+	.section	.rodata.__func__.9859,"a",@progbits
 	.align	3
 	.set	.LANCHOR95,. + 0
-	.type	__func__.9852, %object
-	.size	__func__.9852, 26
-__func__.9852:
+	.type	__func__.9859, %object
+	.size	__func__.9859, 26
+__func__.9859:
 	.string	"ftl_map_blk_alloc_new_blk"
-	.section	.rodata.__func__.9862,"a",@progbits
+	.section	.rodata.__func__.9869,"a",@progbits
 	.align	3
-	.set	.LANCHOR212,. + 0
-	.type	__func__.9862, %object
-	.size	__func__.9862, 15
-__func__.9862:
+	.set	.LANCHOR213,. + 0
+	.type	__func__.9869, %object
+	.size	__func__.9869, 15
+__func__.9869:
 	.string	"ftl_map_blk_gc"
-	.section	.rodata.__func__.9875,"a",@progbits
+	.section	.rodata.__func__.9882,"a",@progbits
 	.align	3
-	.set	.LANCHOR213,. + 0
-	.type	__func__.9875, %object
-	.size	__func__.9875, 31
-__func__.9875:
+	.set	.LANCHOR214,. + 0
+	.type	__func__.9882, %object
+	.size	__func__.9882, 31
+__func__.9882:
 	.string	"Ftl_write_map_blk_to_last_page"
-	.section	.rodata.__func__.9888,"a",@progbits
+	.section	.rodata.__func__.9895,"a",@progbits
 	.align	3
-	.set	.LANCHOR214,. + 0
-	.type	__func__.9888, %object
-	.size	__func__.9888, 16
-__func__.9888:
+	.set	.LANCHOR215,. + 0
+	.type	__func__.9895, %object
+	.size	__func__.9895, 16
+__func__.9895:
 	.string	"FtlMapWritePage"
-	.section	.rodata.__func__.9908,"a",@progbits
+	.section	.rodata.__func__.9915,"a",@progbits
 	.align	3
 	.set	.LANCHOR98,. + 0
-	.type	__func__.9908, %object
-	.size	__func__.9908, 22
-__func__.9908:
+	.type	__func__.9915, %object
+	.size	__func__.9915, 22
+__func__.9915:
 	.string	"select_l2p_ram_region"
-	.section	.rodata.__func__.9924,"a",@progbits
+	.section	.rodata.__func__.9931,"a",@progbits
 	.align	3
-	.set	.LANCHOR226,. + 0
-	.type	__func__.9924, %object
-	.size	__func__.9924, 9
-__func__.9924:
+	.set	.LANCHOR228,. + 0
+	.type	__func__.9931, %object
+	.size	__func__.9931, 9
+__func__.9931:
 	.string	"log2phys"
-	.section	.rodata.__func__.9986,"a",@progbits
+	.section	.rodata.__func__.9993,"a",@progbits
 	.align	3
-	.set	.LANCHOR210,. + 0
-	.type	__func__.9986, %object
-	.size	__func__.9986, 15
-__func__.9986:
+	.set	.LANCHOR211,. + 0
+	.type	__func__.9993, %object
+	.size	__func__.9993, 15
+__func__.9993:
 	.string	"FtlVpcTblFlush"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",@progbits,1
 .LC36:
@@ -24815,9 +25042,9 @@ __func__.9986:
 .LC83:
 	.string	"L2PC:"
 	.section	.rodata.ftl_fix_nand_power_lost_error.str1.1,"aMS",@progbits,1
-.LC71:
+.LC75:
 	.string	"fix power lost blk = %x vpc=%x\n"
-.LC72:
+.LC76:
 	.string	"erase power lost blk = %x vpc=%x\n"
 	.section	.rodata.ftl_map_blk_alloc_new_blk.str1.1,"aMS",@progbits,1
 .LC8:
@@ -24825,6 +25052,13 @@ __func__.9986:
 	.section	.rodata.ftl_map_blk_gc.str1.1,"aMS",@progbits,1
 .LC39:
 	.string	"page map lost: %x %x\n"
+	.section	.rodata.ftl_scan_all_ppa.str1.1,"aMS",@progbits,1
+.LC52:
+	.string	"ftl_scan_all_ppa blk %x page %x\n"
+.LC53:
+	.string	"addr= %x, status= %d,spare= %x %x %x %x data=%x %x\n"
+.LC54:
+	.string	"%s finished\n"
 	.section	.rodata.idb_write_data.str1.1,"aMS",@progbits,1
 .LC15:
 	.string	"1 write_idblock fix data %x %x %x\n"
@@ -24833,17 +25067,14 @@ __func__.9986:
 .LC17:
 	.string	"write_idblock fail! %x\n"
 	.section	.rodata.log2phys.str1.1,"aMS",@progbits,1
-.LC53:
+.LC56:
 	.string	"region_id = %x phyAddr = %x\n"
-.LC54:
+.LC57:
 	.string	"map_ppn:"
-.LC55:
+.LC58:
 	.string	"load_l2p_region refresh = %x phyAddr = %x\n"
-	.section	.rodata.rk_ftl_garbage_collect.str1.1,"aMS",@progbits,1
-.LC66:
-	.string	"g_gc_superblock_free %x %x %x %x %x\n"
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",@progbits,1
-.LC70:
+.LC74:
 	.string	"FtlInit %x\n"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
 .LC18:
diff --git a/drivers/rknand/rk_zftl_arm_v7.S b/drivers/rknand/rk_zftl_arm_v7.S
index 2b1d874c9e..c934ade82e 100644
--- a/drivers/rknand/rk_zftl_arm_v7.S
+++ b/drivers/rknand/rk_zftl_arm_v7.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2018-02-11
+ * date: 2019-05-22
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -44,21304 +44,27952 @@ flash_mem_cmp8:
 	mov	r0, r3
 	pop	{r4, r5, pc}
 	.size	flash_mem_cmp8, .-flash_mem_cmp8
-	.section	.text.nand_flash_print_info,"ax",%progbits
-	.align	1
-	.global	nand_flash_print_info
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	nand_flash_print_info, %function
-nand_flash_print_info:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	bx	lr
-	.size	nand_flash_print_info, .-nand_flash_print_info
-	.section	.text.FlashTimingCfg,"ax",%progbits
+	.global	__aeabi_uidiv
+	.global	__aeabi_uidivmod
+	.section	.text.slc_phy_page_address_calc,"ax",%progbits
 	.align	1
-	.global	FlashTimingCfg
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashTimingCfg, %function
-FlashTimingCfg:
+	.type	slc_phy_page_address_calc, %function
+slc_phy_page_address_calc:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	bx	lr
-	.size	FlashTimingCfg, .-FlashTimingCfg
-	.section	.text.timer_delay_ns,"ax",%progbits
-	.align	1
-	.global	timer_delay_ns
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	timer_delay_ns, %function
-timer_delay_ns:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	lsrs	r0, r0, #4
-	sub	sp, sp, #8
-	str	r0, [sp, #4]
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r4, r0
+	ldr	r3, .L16
+	ldr	r7, .L16+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L7
+	ldrb	r3, [r7]	@ zero_extendqisi2
+	cbz	r3, .L8
+.L7:
+	ldr	r3, .L16+8
+	mov	r0, r4
+	ldrh	r5, [r3]
+	mov	r1, r5
+	bl	__aeabi_uidiv
+	mov	r1, r5
+	mul	r6, r5, r0
+	mov	r0, r4
+	bl	__aeabi_uidivmod
+	ldrb	r3, [r7]	@ zero_extendqisi2
+	cbz	r3, .L9
+	add	r4, r6, r1, lsl #1
+.L8:
+	mov	r0, r4
+	pop	{r3, r4, r5, r6, r7, pc}
 .L9:
-	ldr	r3, [sp, #4]
-	subs	r2, r3, #1
-	str	r2, [sp, #4]
-	cmp	r3, #0
-	bne	.L9
-	add	sp, sp, #8
-	@ sp needed
-	bx	lr
-	.size	timer_delay_ns, .-timer_delay_ns
-	.section	.text.flash_read_status,"ax",%progbits
-	.align	1
-	.global	flash_read_status
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	flash_read_status, %function
-flash_read_status:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	movs	r3, #112
-	mov	r1, r0
-	str	r3, [r0, #8]
-	movs	r0, #120
-	bl	timer_delay_ns
-	ldr	r0, [r1]
-	uxtb	r0, r0
-	pop	{r3, pc}
-	.size	flash_read_status, .-flash_read_status
-	.section	.text.toshiba_set_rr_para,"ax",%progbits
-	.align	1
-	.global	toshiba_set_rr_para
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	toshiba_set_rr_para, %function
-toshiba_set_rr_para:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, lr}
-	add	r6, r1, r1, lsl #2
-	ldr	r8, .L20+16
-	mov	r5, r0
-	movs	r4, #0
-	ldr	r7, .L20
-.L13:
-	ldrb	r3, [r8]	@ zero_extendqisi2
-	cmp	r4, r3
-	bcc	.L17
-	pop	{r4, r5, r6, r7, r8, pc}
+	ldr	r3, .L16+12
+	ldrh	r4, [r3, r1, lsl #1]
+	add	r4, r4, r6
+	b	.L8
 .L17:
-	movs	r3, #85
-	movs	r0, #200
-	str	r3, [r5, #8]
-	ldrsb	r3, [r4, r7]
-	str	r3, [r5, #4]
-	bl	timer_delay_ns
-	ldr	r3, .L20+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #34
-	bne	.L14
-	adds	r3, r4, r6
-	add	r3, r3, r7
-.L19:
-	ldrsb	r3, [r3, #5]
-.L18:
-	str	r3, [r5]
-	adds	r4, r4, #1
-	b	.L13
-.L14:
-	cmp	r3, #35
-	bne	.L16
-	ldr	r3, .L20+8
-	adds	r2, r4, r6
-	add	r3, r3, r2
-	b	.L19
-.L16:
-	ldr	r3, .L20+12
-	ldrsb	r3, [r3, r1]
-	b	.L18
-.L21:
 	.align	2
-.L20:
+.L16:
 	.word	.LANCHOR0
 	.word	.LANCHOR1
 	.word	.LANCHOR2
 	.word	.LANCHOR3
-	.word	.LANCHOR4
-	.size	toshiba_set_rr_para, .-toshiba_set_rr_para
-	.section	.text.hynix_set_rr_para,"ax",%progbits
+	.size	slc_phy_page_address_calc, .-slc_phy_page_address_calc
+	.section	.text._list_remove_node,"ax",%progbits
 	.align	1
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	hynix_set_rr_para, %function
-hynix_set_rr_para:
+	.type	_list_remove_node, %function
+_list_remove_node:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L25
-	push	{r4, r5, r6, r7, r8, lr}
-	lsls	r7, r0, #8
-	ldr	r2, .L25+4
-	ldr	r3, [r3]
-	ldr	r5, [r2]
-	movs	r2, #54
-	ldrb	r4, [r3, #113]	@ zero_extendqisi2
-	add	r6, r3, #127
-	add	r8, r5, r7
-	str	r2, [r8, #2056]
-	movs	r2, #160
-	muls	r1, r4, r1
-	mla	r1, r2, r0, r1
-	add	r1, r1, r3
-	add	r3, r3, r4
-	adds	r1, r1, #143
-	add	r4, r3, #127
-.L23:
-	cmp	r6, r4
-	bne	.L24
-	add	r5, r5, r7
-	movs	r3, #22
-	str	r3, [r5, #2056]
-	pop	{r4, r5, r6, r7, r8, pc}
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	movs	r5, #6
+	ldr	r6, .L26
+	muls	r5, r1, r5
+	movw	r3, #65535
+	mov	r8, r2
+	mov	r10, r0
+	ldr	r7, [r6]
+	ldrh	r1, [r7, r5]
+	adds	r4, r7, r5
+	ldrh	r2, [r4, #2]
+	cmp	r1, r3
+	ldr	r3, [r0]
+	bne	.L19
+	cmp	r2, r1
+	bne	.L19
+	cmp	r4, r3
+	bne	.L18
+.L19:
+	movw	r1, #65535
+	cmp	r2, r1
+	bne	.L21
+	cmp	r4, r3
+	beq	.L21
+	movs	r2, #188
+	ldr	r1, .L26+4
+	ldr	r0, .L26+8
+	bl	printf
+.L21:
+	ldr	r3, [r10]
+	movw	r1, #65535
+	cmp	r4, r3
+	ldrh	r3, [r7, r5]
+	bne	.L22
+	cmp	r3, r1
+	ittee	ne
+	ldrne	r0, [r6]
+	movne	r2, #6
+	moveq	r3, #0
+	streq	r3, [r10]
+	ittt	ne
+	mlane	r3, r2, r3, r0
+	strne	r3, [r10]
+	strhne	r1, [r3, #2]	@ movhi
 .L24:
-	ldrb	r3, [r6, #1]!	@ zero_extendqisi2
-	movs	r0, #120
-	str	r3, [r8, #2052]
-	bl	timer_delay_ns
-	ldrsb	r3, [r1, #1]!
-	str	r3, [r8, #2048]
-	b	.L23
-.L26:
-	.align	2
-.L25:
-	.word	.LANCHOR5
-	.word	.LANCHOR6
-	.size	hynix_set_rr_para, .-hynix_set_rr_para
-	.section	.text.hynix_reconfig_rr_para,"ax",%progbits
-	.align	1
-	.global	hynix_reconfig_rr_para
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	hynix_reconfig_rr_para, %function
-hynix_reconfig_rr_para:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	mov	r4, r0
-	ldr	r3, .L32
-	ldrb	r3, [r3]	@ zero_extendqisi2
+	movw	r3, #65535
+	strh	r3, [r7, r5]	@ movhi
+	strh	r3, [r4, #2]	@ movhi
+	ldrh	r3, [r8]
 	subs	r3, r3, #1
-	cmp	r3, #6
-	bhi	.L27
-	ldr	r5, .L32+4
-	ldr	r3, [r5]
-	add	r3, r3, r0
-	ldrb	r3, [r3, #120]	@ zero_extendqisi2
-	cbz	r3, .L27
-	movs	r1, #0
-	bl	hynix_set_rr_para
-	ldr	r0, [r5]
-	movs	r3, #0
-	add	r0, r0, r4
-	strb	r3, [r0, #120]
+	strh	r3, [r8]	@ movhi
+.L18:
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L22:
+	cmp	r3, r1
+	ldrh	r1, [r4, #2]
+	bne	.L25
+	cmp	r1, r3
+	beq	.L24
+	movs	r2, #6
+	ldr	r0, [r6]
+	muls	r1, r2, r1
+	strh	r3, [r0, r1]	@ movhi
+	b	.L24
+.L25:
+	ldr	r0, [r6]
+	movs	r2, #6
+	mla	r6, r2, r3, r0
+	strh	r1, [r6, #2]	@ movhi
+	ldrh	r1, [r4, #2]
+	muls	r2, r1, r2
+	strh	r3, [r0, r2]	@ movhi
+	b	.L24
 .L27:
-	pop	{r3, r4, r5, pc}
-.L33:
 	.align	2
-.L32:
-	.word	.LANCHOR1
+.L26:
+	.word	.LANCHOR4
 	.word	.LANCHOR5
-	.size	hynix_reconfig_rr_para, .-hynix_reconfig_rr_para
-	.section	.text.nandc_set_ddr_para,"ax",%progbits
+	.word	.LC0
+	.size	_list_remove_node, .-_list_remove_node
+	.section	.text._list_pop_index_node,"ax",%progbits
 	.align	1
-	.global	nandc_set_ddr_para
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	nandc_set_ddr_para, %function
-nandc_set_ddr_para:
+	.type	_list_pop_index_node, %function
+_list_pop_index_node:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L37
-	ldr	r2, .L37+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	ldr	r2, [r2]
-	cmp	r3, #9
-	lsl	r3, r0, #16
-	lsl	r0, r0, #8
-	orr	r3, r3, r0
-	orr	r3, r3, #3
-	ite	eq
-	streq	r3, [r2, #80]
-	strne	r3, [r2, #304]
-	bx	lr
-.L38:
+	push	{r3, r4, r5, r6, r7, lr}
+	ldr	r5, [r0]
+	cbz	r5, .L34
+	ldr	r3, .L35
+	movw	r6, #65535
+	movs	r7, #6
+	ldr	r4, [r3]
+.L30:
+	cbnz	r1, .L31
+.L33:
+	subs	r4, r5, r4
+	asrs	r3, r4, #1
+	ldr	r4, .L35+4
+	muls	r4, r3, r4
+	uxth	r1, r4
+	bl	_list_remove_node
+	movw	r3, #65535
+	uxth	r0, r4
+	strh	r3, [r5]	@ movhi
+	strh	r3, [r5, #2]	@ movhi
+	pop	{r3, r4, r5, r6, r7, pc}
+.L31:
+	ldrh	r3, [r5]
+	cmp	r3, r6
+	beq	.L33
+	subs	r1, r1, #1
+	mla	r5, r7, r3, r4
+	uxth	r1, r1
+	b	.L30
+.L34:
+	movw	r0, #65535
+	pop	{r3, r4, r5, r6, r7, pc}
+.L36:
 	.align	2
-.L37:
-	.word	.LANCHOR7
-	.word	.LANCHOR6
-	.size	nandc_set_ddr_para, .-nandc_set_ddr_para
-	.section	.text.nandc_get_ddr_para,"ax",%progbits
+.L35:
+	.word	.LANCHOR4
+	.word	-1431655765
+	.size	_list_pop_index_node, .-_list_pop_index_node
+	.section	.text._insert_free_list,"ax",%progbits
 	.align	1
-	.global	nandc_get_ddr_para
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	nandc_get_ddr_para, %function
-nandc_get_ddr_para:
-	@ args = 0, pretend = 0, frame = 0
+	.type	_insert_free_list, %function
+_insert_free_list:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L43
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #9
-	ldr	r3, .L43+4
-	ldr	r3, [r3]
-	ite	eq
-	ldreq	r0, [r3, #80]
-	ldrne	r0, [r3, #304]
-	ubfx	r0, r0, #8, #8
-	bx	lr
+	ldr	r3, .L45
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldrh	r3, [r3]
+	cmp	r3, r1
+	bls	.L37
+	ldrh	r3, [r2]
+	movw	r10, #65535
+	ldr	r7, [r0]
+	adds	r3, r3, #1
+	strh	r3, [r2]	@ movhi
+	movs	r2, #6
+	ldr	r3, .L45+4
+	mul	lr, r2, r1
+	ldr	r5, [r3]
+	add	r6, r5, lr
+	strh	r10, [r6, #2]	@ movhi
+	strh	r10, [r5, lr]	@ movhi
+	cbnz	r7, .L39
 .L44:
-	.align	2
+	str	r6, [r0]
+	b	.L37
+.L39:
+	ldr	r3, .L45+8
+	str	r2, [sp, #4]
+	ldr	ip, [r3]
+	ldr	r3, .L45+12
+	ldrh	r4, [ip, r1, lsl #2]
+	ldrh	r8, [r3]
+	ldr	r3, [ip, r1, lsl #2]
+	ubfx	r4, r4, #0, #11
+	ubfx	r3, r3, #11, #8
+	smulbb	r3, r3, r8
+	add	r3, r3, r4
+	uxth	r3, r3
+	str	r3, [sp]
+	subs	r3, r7, r5
+	asrs	r4, r3, #1
+	ldr	r3, .L45+16
+	muls	r3, r4, r3
+	mov	r4, r7
+	uxth	r3, r3
+.L42:
+	ldr	r2, [ip, r3, lsl #2]
+	ldrh	fp, [ip, r3, lsl #2]
+	ubfx	r2, r2, #11, #8
+	smulbb	r2, r2, r8
+	ubfx	fp, fp, #0, #11
+	add	r2, r2, fp
+	uxth	fp, r2
+	ldr	r2, [sp]
+	cmp	r2, fp
+	bls	.L40
+	ldrh	r2, [r4]
+	cmp	r2, r10
+	bne	.L41
+	strh	r3, [r6, #2]	@ movhi
+	strh	r1, [r4]	@ movhi
+.L37:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L41:
+	ldr	r3, [sp, #4]
+	mla	r4, r3, r2, r5
+	mov	r3, r2
+	b	.L42
+.L40:
+	ldrh	r2, [r4, #2]
+	cmp	r7, r4
+	strh	r2, [r6, #2]	@ movhi
+	strh	r3, [r5, lr]	@ movhi
+	bne	.L43
+	strh	r1, [r7, #2]	@ movhi
+	b	.L44
 .L43:
-	.word	.LANCHOR7
-	.word	.LANCHOR6
-	.size	nandc_get_ddr_para, .-nandc_get_ddr_para
-	.section	.text.nandc_set_if_mode,"ax",%progbits
-	.align	1
-	.global	nandc_set_if_mode
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	nandc_set_if_mode, %function
-nandc_set_if_mode:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L53
-	ands	r1, r0, #6
-	ldr	r3, [r3]
-	ldr	r2, [r3]
-	beq	.L46
-	lsls	r1, r0, #29
-	ldr	r1, .L53+4
-	orr	r2, r2, #24576
-	bfc	r2, #15, #1
-	ldrb	r1, [r1]	@ zero_extendqisi2
-	orr	r2, r2, #196608
-	it	mi
-	orrmi	r2, r2, #32768
-	cmp	r1, #9
-	ldr	r1, .L53+8
-	bne	.L48
-	movw	r0, #8321
-	str	r0, [r3, #8]
-	str	r1, [r3, #80]
-	movs	r1, #38
-	str	r1, [r3, #84]
-	movs	r1, #39
-	str	r1, [r3, #84]
-.L49:
-	str	r2, [r3]
-	bx	lr
-.L48:
-	movw	r0, #8322
-	str	r0, [r3, #344]
-	str	r1, [r3, #304]
-	movs	r1, #38
-	str	r1, [r3, #308]
-	movs	r1, #39
-	str	r1, [r3, #308]
-	b	.L49
+	ldrh	r2, [r4, #2]
+	movs	r3, #6
+	muls	r3, r2, r3
+	strh	r1, [r5, r3]	@ movhi
+	strh	r1, [r4, #2]	@ movhi
+	b	.L37
 .L46:
-	bfi	r2, r1, #13, #1
-	b	.L49
-.L54:
 	.align	2
-.L53:
+.L45:
 	.word	.LANCHOR6
+	.word	.LANCHOR4
 	.word	.LANCHOR7
-	.word	1052675
-	.size	nandc_set_if_mode, .-nandc_set_if_mode
-	.section	.text.nandc_cs,"ax",%progbits
+	.word	.LANCHOR8
+	.word	-1431655765
+	.size	_insert_free_list, .-_insert_free_list
+	.section	.text._insert_data_list,"ax",%progbits
 	.align	1
-	.global	nandc_cs
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	nandc_cs, %function
-nandc_cs:
-	@ args = 0, pretend = 0, frame = 0
+	.type	_insert_data_list, %function
+_insert_data_list:
+	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L56
-	movs	r2, #1
-	lsl	r0, r2, r0
-	ldr	r1, [r3]
-	ldr	r3, [r1]
-	bfi	r3, r0, #0, #8
-	str	r3, [r1]
-	bx	lr
+	ldr	r3, .L67
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	lr, r0
+	sub	sp, sp, #32
+	ldrh	r3, [r3]
+	cmp	r3, r1
+	bls	.L47
+	ldrh	r3, [r2]
+	ldr	r0, [r0]
+	adds	r3, r3, #1
+	strh	r3, [r2]	@ movhi
+	ldr	r3, .L67+4
+	ldr	r6, [r3]
+	movs	r3, #6
+	muls	r3, r1, r3
+	str	r3, [sp, #8]
+	adds	r7, r6, r3
+	ldr	r2, [sp, #8]
+	movw	r3, #65535
+	strh	r3, [r7, #2]	@ movhi
+	strh	r3, [r6, r2]	@ movhi
+	cbnz	r0, .L50
+.L66:
+	str	r7, [lr]
+	b	.L47
+.L50:
+	ldr	r3, .L67+8
+	ldrh	r5, [r7, #4]
+	ldr	r3, [r3]
+	ldrh	r4, [r3, r1, lsl #1]
+	muls	r4, r5, r4
+	str	r3, [sp, #12]
+	ldr	r3, .L67+12
+	str	r4, [sp, #4]
+	ldr	ip, [r3]
+	ldr	r3, [ip, r1, lsl #2]
+	ubfx	r2, r3, #11, #8
+	ldr	r3, .L67+16
+	ldrh	r3, [r3]
+	str	r3, [sp, #16]
+	ldrh	r3, [ip, r1, lsl #2]
+	ubfx	r3, r3, #0, #11
+	beq	.L51
+	ldrh	r4, [sp, #16]
+	smulbb	r2, r2, r4
+	add	r3, r3, r2
+	ldr	r2, [sp, #4]
+	uxtah	r3, r2, r3
+	str	r3, [sp, #4]
+.L51:
+	ldr	r3, [sp, #4]
+	cmp	r5, #0
+	it	eq
+	moveq	r3, #-1
+	mov	r5, r0
+	mov	r8, #0
+	str	r3, [sp, #4]
+	subs	r3, r0, r6
+	asrs	r2, r3, #1
+	ldr	r3, .L67+20
+	muls	r3, r2, r3
+	ldr	r2, .L67
+	ldrh	r2, [r2]
+	uxth	r3, r3
+	str	r2, [sp, #20]
+.L58:
+	add	r2, r8, #1
+	uxth	r8, r2
+	ldr	r2, [sp, #20]
+	cmp	r8, r2
+	bhi	.L47
+	cmp	r1, r3
+	beq	.L47
+	ldr	r2, [sp, #12]
+	ldrh	fp, [r5, #4]
+	ldrh	r10, [r2, r3, lsl #1]
+	ldr	r2, [ip, r3, lsl #2]
+	mov	r4, fp
+	ubfx	r2, r2, #11, #8
+	str	r2, [sp, #24]
+	ldrh	r2, [ip, r3, lsl #2]
+	ubfx	r2, r2, #0, #11
+	str	r2, [sp, #28]
+	mov	r2, r10
+	muls	r2, r4, r2
+	mov	r10, r2
+	beq	.L54
+	cmp	fp, #0
+	beq	.L62
+	ldrh	r2, [sp, #24]
+	ldrh	r4, [sp, #16]
+	smulbb	fp, r2, r4
+	ldr	r2, [sp, #28]
+	add	fp, fp, r2
+	uxtah	r10, r10, fp
+.L55:
+	ldr	r2, [sp, #4]
+	cmp	r2, r10
+	bcc	.L56
+.L60:
+	ldrh	r2, [r5]
+	movw	r4, #65535
+	cmp	r2, r4
+	bne	.L57
+	strh	r3, [r7, #2]	@ movhi
+	strh	r1, [r5]	@ movhi
+.L47:
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
 .L57:
-	.align	2
+	movs	r3, #6
+	mla	r5, r3, r2, r6
+	mov	r3, r2
+	b	.L58
 .L56:
+	ldrh	r2, [r5, #2]
+	cmp	r0, r5
+	strh	r2, [r7, #2]	@ movhi
+	ldr	r2, [sp, #8]
+	strh	r3, [r6, r2]	@ movhi
+	bne	.L59
+	strh	r1, [r0, #2]	@ movhi
+	b	.L66
+.L59:
+	ldrh	r2, [r5, #2]
+	movs	r3, #6
+	muls	r3, r2, r3
+	strh	r1, [r6, r3]	@ movhi
+	strh	r1, [r5, #2]	@ movhi
+	b	.L47
+.L54:
+	cmp	fp, #0
+	bne	.L60
+.L62:
+	mov	r10, #-1
+	b	.L55
+.L68:
+	.align	2
+.L67:
 	.word	.LANCHOR6
-	.size	nandc_cs, .-nandc_cs
-	.section	.text.nandc_de_cs,"ax",%progbits
+	.word	.LANCHOR4
+	.word	.LANCHOR9
+	.word	.LANCHOR7
+	.word	.LANCHOR8
+	.word	-1431655765
+	.size	_insert_data_list, .-_insert_data_list
+	.section	.text._list_get_gc_head_node.isra.2,"ax",%progbits
 	.align	1
-	.global	nandc_de_cs
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	nandc_de_cs, %function
-nandc_de_cs:
+	.type	_list_get_gc_head_node.isra.2, %function
+_list_get_gc_head_node.isra.2:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L59
-	ldr	r2, [r3]
-	ldr	r3, [r2]
-	bfc	r3, #0, #8
-	bfc	r3, #17, #1
-	str	r3, [r2]
-	bx	lr
-.L60:
+	push	{r4, lr}
+	cbz	r0, .L74
+	ldr	r3, .L76
+	movw	r2, #65535
+	movs	r4, #6
+	ldr	r3, [r3]
+.L71:
+	cbz	r1, .L72
+	ldrh	r0, [r0]
+	cmp	r0, r2
+	bne	.L73
+	pop	{r4, pc}
+.L73:
+	subs	r1, r1, #1
+	mla	r0, r4, r0, r3
+	uxth	r1, r1
+	b	.L71
+.L74:
+	movw	r0, #65535
+	pop	{r4, pc}
+.L72:
+	subs	r0, r0, r3
+	asrs	r3, r0, #1
+	ldr	r0, .L76+4
+	muls	r0, r3, r0
+	uxth	r0, r0
+	pop	{r4, pc}
+.L77:
 	.align	2
-.L59:
-	.word	.LANCHOR6
-	.size	nandc_de_cs, .-nandc_de_cs
-	.section	.text.flash_wait_device_ready_raw,"ax",%progbits
+.L76:
+	.word	.LANCHOR4
+	.word	-1431655765
+	.size	_list_get_gc_head_node.isra.2, .-_list_get_gc_head_node.isra.2
+	.section	.text._list_update_data_list,"ax",%progbits
 	.align	1
-	.global	flash_wait_device_ready_raw
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_wait_device_ready_raw, %function
-flash_wait_device_ready_raw:
+	.type	_list_update_data_list, %function
+_list_update_data_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	mov	r5, r1
-	ldr	r3, .L70
-	mov	r7, r2
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, r0
-	bhi	.L62
-	mov	r2, #604
-	ldr	r1, .L70+4
-	ldr	r0, .L70+8
+	ldr	r3, .L88
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r6, r2
+	mov	r7, r0
+	mov	r4, r1
+	ldr	r3, [r3]
+	ldrh	r2, [r3, #16]
+	cmp	r2, r1
+	beq	.L78
+	ldrh	r2, [r3, #48]
+	cmp	r2, r1
+	beq	.L78
+	ldrh	r3, [r3, #80]
+	cmp	r3, r1
+	beq	.L78
+	ldr	r3, .L88+4
+	movs	r5, #6
+	muls	r5, r1, r5
+	ldr	r2, [r0]
+	ldr	fp, [r3]
+	mov	r8, r3
+	add	r10, fp, r5
+	cmp	r10, r2
+	beq	.L78
+	ldrh	r3, [r10, #2]
+	movw	r2, #65535
+	cmp	r3, r2
+	bne	.L82
+	ldrh	r2, [fp, r5]
+	cmp	r2, r3
+	bne	.L82
+	movs	r2, #255
+	ldr	r1, .L88+8
+	ldr	r0, .L88+12
 	bl	printf
-.L63:
-	b	.L63
-.L62:
-	ldr	r3, .L70+12
-	ldrb	r6, [r3, r0]	@ zero_extendqisi2
-	ldr	r3, .L70+16
-	mov	r0, r6
-	ldr	r4, [r3]
-	bl	nandc_cs
-	uxtb	r3, r5
-	movs	r0, #120
-	add	r4, r4, r6, lsl #8
-	str	r0, [r4, #2056]
-	str	r3, [r4, #2052]
-	lsrs	r3, r5, #8
-	lsrs	r5, r5, #16
-	str	r3, [r4, #2052]
-	str	r5, [r4, #2052]
-.L69:
-	bl	timer_delay_ns
-	ldr	r1, [r4, #2048]
-	uxtb	r1, r1
-	bics	r3, r7, r1
-	bne	.L65
-	cmp	r1, #255
-	beq	.L65
-	mov	r0, r6
-	bl	nandc_de_cs
-	mov	r0, r1
-	pop	{r3, r4, r5, r6, r7, pc}
-.L65:
-	movs	r0, #20
-	b	.L69
-.L71:
-	.align	2
-.L70:
-	.word	.LANCHOR8
-	.word	.LANCHOR9
-	.word	.LC0
-	.word	.LANCHOR10
-	.word	.LANCHOR6
-	.size	flash_wait_device_ready_raw, .-flash_wait_device_ready_raw
-	.global	__aeabi_uidiv
-	.global	__aeabi_uidivmod
-	.section	.text.flash_wait_device_ready,"ax",%progbits
-	.align	1
-	.global	flash_wait_device_ready
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	flash_wait_device_ready, %function
-flash_wait_device_ready:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	tst	r0, #50331648
-	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	mov	r10, r1
-	ubfx	r4, r0, #0, #21
-	ubfx	r8, r0, #21, #3
-	bne	.L73
-	ldr	r3, .L82
-	ldr	r6, .L82+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L74
-	ldrb	r3, [r6]	@ zero_extendqisi2
-	cbz	r3, .L73
-.L74:
-	ldr	r3, .L82+8
-	mov	r0, r4
-	ldrh	r5, [r3]
-	mov	r1, r5
-	bl	__aeabi_uidiv
-	mov	r1, r5
-	mul	r7, r5, r0
-	mov	r0, r4
-	bl	__aeabi_uidivmod
-	ldrb	r3, [r6]	@ zero_extendqisi2
-	cbz	r3, .L75
-	add	r4, r7, r1, lsl #1
-.L73:
-	mov	r2, r10
-	mov	r1, r4
-	mov	r0, r8
-	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
-	b	flash_wait_device_ready_raw
-.L75:
-	ldr	r3, .L82+12
-	ldrh	r4, [r3, r1, lsl #1]
-	add	r4, r4, r7
-	b	.L73
-.L83:
-	.align	2
 .L82:
-	.word	.LANCHOR11
-	.word	.LANCHOR12
-	.word	.LANCHOR13
-	.word	.LANCHOR14
-	.size	flash_wait_device_ready, .-flash_wait_device_ready
-	.section	.text.nandc_wait_flash_ready,"ax",%progbits
-	.align	1
-	.global	nandc_wait_flash_ready
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	nandc_wait_flash_ready, %function
-nandc_wait_flash_ready:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, lr}
-	ldr	r1, .L89
-	ldr	r4, .L89+4
-.L86:
-	movs	r0, #100
-	bl	timer_delay_ns
-	ldr	r3, [r4]
-	ldr	r3, [r3]
-	str	r3, [sp, #4]
-	ldr	r3, [sp, #4]
-	lsls	r3, r3, #22
-	bmi	.L87
-	subs	r1, r1, #1
-	bne	.L86
-	mov	r0, #-1
+	ldrh	r3, [r10, #2]
+	movw	r2, #65535
+	cmp	r3, r2
+	bne	.L83
+	ldrh	r2, [fp, r5]
+	cmp	r2, r3
+	beq	.L78
+.L83:
+	ldr	r2, .L88+16
+	ldr	r0, [r2]
+	ldrh	r2, [r10, #4]
+	ldrh	r1, [r0, r4, lsl #1]
+	cbz	r2, .L86
+	muls	r2, r1, r2
 .L84:
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, pc}
-.L87:
-	movs	r0, #0
+	movs	r1, #6
+	muls	r1, r3, r1
+	ldr	r3, .L88+20
+	asrs	r5, r1, #1
+	muls	r3, r5, r3
+	ldrh	r5, [r0, r3, lsl #1]
+	ldr	r0, [r8]
+	add	r1, r1, r0
+	ldrh	r3, [r1, #4]
+	cbz	r3, .L87
+	muls	r3, r5, r3
+.L85:
+	cmp	r2, r3
+	bcs	.L78
+	mov	r2, r6
+	mov	r1, r4
+	mov	r0, r7
+	bl	_list_remove_node
+	mov	r2, r6
+	mov	r1, r4
+	mov	r0, r7
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	_insert_data_list
+.L86:
+	mov	r2, #-1
 	b	.L84
-.L90:
-	.align	2
+.L87:
+	mov	r3, #-1
+	b	.L85
+.L78:
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
 .L89:
-	.word	100000
-	.word	.LANCHOR6
-	.size	nandc_wait_flash_ready, .-nandc_wait_flash_ready
-	.section	.text.sandisk_set_rr_para,"ax",%progbits
-	.align	1
-	.global	sandisk_set_rr_para
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	sandisk_set_rr_para, %function
-sandisk_set_rr_para:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	movs	r3, #239
-	str	r3, [r0, #8]
-	movs	r3, #17
-	mov	r4, r0
-	str	r3, [r0, #4]
-	movs	r0, #200
-	bl	timer_delay_ns
-	ldr	r3, .L97
-	add	r1, r1, r1, lsl #2
-	ldr	r6, .L97+4
-	movs	r2, #0
-	ldr	r7, .L97+8
-	ldrb	r0, [r3]	@ zero_extendqisi2
-	ldr	r3, .L97+12
-	ldrb	r5, [r3]	@ zero_extendqisi2
-.L92:
-	cmp	r2, r0
-	bcc	.L95
-	pop	{r3, r4, r5, r6, r7, lr}
-	b	nandc_wait_flash_ready
-.L95:
-	adds	r3, r2, r1
-	cmp	r5, #67
-	ite	eq
-	addeq	r3, r3, r7
-	addne	r3, r3, r6
-	ldrsb	r3, [r3, #5]
-	adds	r2, r2, #1
-	str	r3, [r4]
-	b	.L92
-.L98:
 	.align	2
-.L97:
+.L88:
+	.word	.LANCHOR10
 	.word	.LANCHOR4
-	.word	.LANCHOR2
-	.word	.LANCHOR0
-	.word	.LANCHOR1
-	.size	sandisk_set_rr_para, .-sandisk_set_rr_para
-	.section	.text.toshiba_3d_set_tlc_rr_para,"ax",%progbits
+	.word	.LANCHOR11
+	.word	.LC0
+	.word	.LANCHOR9
+	.word	-1431655765
+	.size	_list_update_data_list, .-_list_update_data_list
+	.section	.text.zftl_get_gc_node.part.9,"ax",%progbits
 	.align	1
-	.global	toshiba_3d_set_tlc_rr_para
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	toshiba_3d_set_tlc_rr_para, %function
-toshiba_3d_set_tlc_rr_para:
+	.type	zftl_get_gc_node.part.9, %function
+zftl_get_gc_node.part.9:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	movs	r6, #0
-	movs	r7, #213
-	mvn	r3, #118
-	adds	r1, r1, #1
-	mov	r4, r0
-	str	r7, [r0, #8]
-	rsb	r1, r1, r1, lsl #3
-	str	r6, [r0, #4]
-	str	r3, [r0, #4]
-	ldr	r3, .L100
-	adds	r5, r3, r1
-	ldrsb	r3, [r3, r1]
-	str	r3, [r0]
-	ldrsb	r3, [r5, #1]
-	str	r3, [r0]
-	ldrsb	r3, [r5, #2]
-	str	r3, [r0]
-	ldrsb	r3, [r5, #3]
-	str	r3, [r0]
-	bl	nandc_wait_flash_ready
-	mvn	r3, #117
-	str	r7, [r4, #8]
-	str	r6, [r4, #4]
-	str	r3, [r4, #4]
-	ldrsb	r3, [r5, #4]
-	str	r3, [r4]
-	ldrsb	r3, [r5, #5]
-	str	r3, [r4]
-	ldrsb	r3, [r5, #6]
-	str	r3, [r4]
-	str	r6, [r4]
-	pop	{r3, r4, r5, r6, r7, lr}
-	b	nandc_wait_flash_ready
-.L101:
+	@ link register save eliminated.
+	ldr	r3, .L91
+	mov	r1, r0
+	ldr	r0, [r3]
+	b	_list_get_gc_head_node.isra.2
+.L92:
 	.align	2
-.L100:
-	.word	.LANCHOR15
-	.size	toshiba_3d_set_tlc_rr_para, .-toshiba_3d_set_tlc_rr_para
-	.section	.text.toshiba_3d_set_slc_rr_para,"ax",%progbits
+.L91:
+	.word	.LANCHOR12
+	.size	zftl_get_gc_node.part.9, .-zftl_get_gc_node.part.9
+	.section	.text.nandc_de_cs.constprop.29,"ax",%progbits
 	.align	1
-	.global	toshiba_3d_set_slc_rr_para
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	toshiba_3d_set_slc_rr_para, %function
-toshiba_3d_set_slc_rr_para:
+	.type	nandc_de_cs.constprop.29, %function
+nandc_de_cs.constprop.29:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	movs	r3, #213
-	mvn	r2, #116
-	str	r3, [r0, #8]
-	movs	r3, #0
-	str	r3, [r0, #4]
-	str	r2, [r0, #4]
-	ldr	r2, .L103
-	add	r1, r1, r2
-	ldrsb	r2, [r1, #1]
-	str	r2, [r0]
-	str	r3, [r0]
-	str	r3, [r0]
-	str	r3, [r0]
-	b	nandc_wait_flash_ready
-.L104:
+	ldr	r3, .L94
+	ldr	r2, [r3]
+	ldr	r3, [r2]
+	bfc	r3, #0, #8
+	bfc	r3, #17, #1
+	str	r3, [r2]
+	bx	lr
+.L95:
 	.align	2
-.L103:
-	.word	.LANCHOR16
-	.size	toshiba_3d_set_slc_rr_para, .-toshiba_3d_set_slc_rr_para
-	.section	.text.toshiba_tlc_set_rr_para,"ax",%progbits
+.L94:
+	.word	.LANCHOR13
+	.size	nandc_de_cs.constprop.29, .-nandc_de_cs.constprop.29
+	.section	.text.nand_flash_print_info,"ax",%progbits
 	.align	1
-	.global	toshiba_tlc_set_rr_para
+	.global	nand_flash_print_info
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	toshiba_tlc_set_rr_para, %function
-toshiba_tlc_set_rr_para:
+	.type	nand_flash_print_info, %function
+nand_flash_print_info:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, lr}
-	movs	r6, #239
-	mov	r4, r0
-	str	r6, [r0, #8]
-	cbz	r2, .L106
-	movs	r3, #18
-	rsb	r1, r1, r1, lsl #3
-	str	r3, [r0, #4]
-	ldr	r3, .L108
-	adds	r5, r3, r1
-	ldrb	r3, [r3, r1]	@ zero_extendqisi2
-	str	r3, [r0]
-	ldrb	r3, [r5, #1]	@ zero_extendqisi2
-	str	r3, [r0]
-	ldrb	r3, [r5, #2]	@ zero_extendqisi2
-	str	r3, [r0]
-	ldrb	r3, [r5, #3]	@ zero_extendqisi2
-	str	r3, [r0]
-	bl	nandc_wait_flash_ready
-	movs	r3, #19
-	str	r6, [r4, #8]
-	str	r3, [r4, #4]
-	ldrb	r3, [r5, #4]	@ zero_extendqisi2
-	str	r3, [r4]
-	ldrb	r3, [r5, #5]	@ zero_extendqisi2
-	str	r3, [r4]
-	ldrb	r3, [r5, #6]	@ zero_extendqisi2
-	str	r3, [r4]
-	movs	r3, #0
-	str	r3, [r4]
-.L107:
-	pop	{r4, r5, r6, lr}
-	b	nandc_wait_flash_ready
+	push	{r4, r5, lr}
+	sub	sp, sp, #20
+	ldr	r4, .L218
+	ldr	r3, [r4]
+	lsls	r3, r3, #19
+	bpl	.L97
+	ldr	r1, .L218+4
+	ldr	r0, .L218+8
+	bl	printf
+.L97:
+	ldr	r3, [r4]
+	lsls	r5, r3, #19
+	bpl	.L98
+	ldr	r3, .L218+12
+	ldr	r0, [r3]
+	ldrb	r5, [r0, #6]	@ zero_extendqisi2
+	ldrb	r3, [r0, #3]	@ zero_extendqisi2
+	ldrb	r2, [r0, #2]	@ zero_extendqisi2
+	ldrb	r1, [r0, #1]	@ zero_extendqisi2
+	str	r5, [sp, #8]
+	ldrb	r5, [r0, #5]	@ zero_extendqisi2
+	str	r5, [sp, #4]
+	ldrb	r0, [r0, #4]	@ zero_extendqisi2
+	str	r0, [sp]
+	ldr	r0, .L218+16
+	bl	printf
+.L98:
+	ldr	r3, [r4]
+	lsls	r0, r3, #19
+	bpl	.L99
+	ldr	r3, .L218+12
+	ldr	r0, .L218+20
+	ldr	r3, [r3]
+	ldrb	r1, [r3, #8]	@ zero_extendqisi2
+	bl	printf
+.L99:
+	ldr	r3, [r4]
+	lsls	r1, r3, #19
+	bpl	.L100
+	ldr	r3, .L218+12
+	ldr	r0, .L218+24
+	ldr	r3, [r3]
+	ldrb	r1, [r3, #9]	@ zero_extendqisi2
+	bl	printf
+.L100:
+	ldr	r3, [r4]
+	lsls	r2, r3, #19
+	bpl	.L101
+	ldr	r3, .L218+12
+	ldr	r0, .L218+28
+	ldr	r3, [r3]
+	ldrh	r1, [r3, #10]
+	bl	printf
+.L101:
+	ldr	r3, [r4]
+	lsls	r3, r3, #19
+	bpl	.L102
+	ldr	r3, .L218+12
+	ldr	r0, .L218+32
+	ldr	r3, [r3]
+	ldrb	r1, [r3, #12]	@ zero_extendqisi2
+	bl	printf
+.L102:
+	ldr	r3, [r4]
+	lsls	r5, r3, #19
+	bpl	.L103
+	ldr	r3, .L218+12
+	ldr	r0, .L218+36
+	ldr	r3, [r3]
+	ldrb	r1, [r3, #13]	@ zero_extendqisi2
+	bl	printf
+.L103:
+	ldr	r3, [r4]
+	lsls	r0, r3, #19
+	bpl	.L104
+	ldr	r3, .L218+12
+	ldr	r0, .L218+40
+	ldr	r3, [r3]
+	ldrh	r1, [r3, #14]
+	bl	printf
+.L104:
+	ldr	r3, [r4]
+	lsls	r1, r3, #19
+	bpl	.L105
+	ldr	r3, .L218+12
+	ldr	r0, .L218+44
+	ldr	r3, [r3]
+	ldrb	r1, [r3, #23]	@ zero_extendqisi2
+	bl	printf
+.L105:
+	ldr	r3, [r4]
+	lsls	r2, r3, #19
+	bpl	.L106
+	ldr	r3, .L218+12
+	ldr	r0, .L218+48
+	ldr	r3, [r3]
+	ldrb	r1, [r3, #18]	@ zero_extendqisi2
+	bl	printf
 .L106:
-	movs	r3, #20
-	str	r3, [r0, #4]
-	ldr	r3, .L108+4
-	ldrb	r3, [r3, r1]	@ zero_extendqisi2
-	str	r3, [r0]
-	str	r2, [r0]
-	str	r2, [r0]
-	str	r2, [r0]
-	b	.L107
-.L109:
-	.align	2
+	ldr	r3, [r4]
+	lsls	r3, r3, #19
+	bpl	.L107
+	ldr	r3, .L218+12
+	ldr	r0, .L218+52
+	ldr	r3, [r3]
+	ldrb	r1, [r3, #19]	@ zero_extendqisi2
+	bl	printf
+.L107:
+	ldr	r3, [r4]
+	lsls	r5, r3, #19
+	bpl	.L108
+	ldr	r3, .L218+12
+	ldr	r0, .L218+56
+	ldr	r3, [r3]
+	ldrb	r1, [r3, #20]	@ zero_extendqisi2
+	bl	printf
 .L108:
-	.word	.LANCHOR17
-	.word	.LANCHOR18
-	.size	toshiba_tlc_set_rr_para, .-toshiba_tlc_set_rr_para
-	.section	.text.flash_enter_slc_mode,"ax",%progbits
-	.align	1
-	.global	flash_enter_slc_mode
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	flash_enter_slc_mode, %function
-flash_enter_slc_mode:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L122
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	cbz	r2, .L110
-	ldr	r3, .L122+4
-	cmp	r2, #1
+	ldr	r3, [r4]
+	lsls	r0, r3, #19
+	bpl	.L109
+	ldr	r3, .L218+60
+	ldr	r0, .L218+64
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	bl	printf
+.L109:
+	ldr	r3, [r4]
+	lsls	r1, r3, #19
+	bpl	.L110
+	ldr	r3, .L218+68
+	ldr	r0, .L218+72
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	bl	printf
+.L110:
+	ldr	r3, [r4]
+	lsls	r2, r3, #19
+	bpl	.L111
+	ldr	r3, .L218+12
+	ldr	r0, .L218+76
 	ldr	r3, [r3]
-	bne	.L112
-	ldr	r2, .L122+8
-	ldrb	r2, [r2, #29]	@ zero_extendqisi2
-	cbz	r2, .L110
-	add	r0, r3, r0, lsl #8
-	str	r2, [r0, #2056]
-	bx	lr
+	ldrb	r1, [r3, #22]	@ zero_extendqisi2
+	bl	printf
+.L111:
+	ldr	r3, [r4]
+	lsls	r3, r3, #19
+	bpl	.L112
+	ldr	r3, .L218+80
+	ldr	r0, .L218+84
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	bl	printf
 .L112:
-	cmp	r2, #2
-	bne	.L110
-	ldr	r1, .L122+12
-	ldrb	r2, [r1]	@ zero_extendqisi2
-	cbz	r2, .L110
-	add	r0, r3, r0, lsl #8
-	movs	r3, #239
-	movs	r2, #0
-	str	r3, [r0, #2056]
-	movs	r3, #145
-	str	r3, [r0, #2052]
-	movs	r3, #1
-	str	r2, [r0, #2048]
-	str	r3, [r0, #2048]
-	str	r2, [r0, #2048]
-	str	r2, [r0, #2048]
-	strb	r2, [r1]
-	b	nandc_wait_flash_ready
-.L110:
-	bx	lr
+	ldr	r3, [r4]
+	lsls	r5, r3, #19
+	bpl	.L113
+	ldr	r3, .L218+12
+	ldr	r0, .L218+88
+	ldr	r3, [r3]
+	ldrb	r1, [r3, #16]	@ zero_extendqisi2
+	and	r1, r1, #1
+	bl	printf
+.L113:
+	ldr	r3, [r4]
+	lsls	r0, r3, #19
+	bpl	.L114
+	ldr	r3, .L218+12
+	ldr	r0, .L218+92
+	ldr	r3, [r3]
+	ldrh	r1, [r3, #16]
+	ubfx	r1, r1, #1, #1
+	bl	printf
+.L114:
+	ldr	r3, [r4]
+	lsls	r1, r3, #19
+	bpl	.L115
+	ldr	r3, .L218+12
+	ldr	r0, .L218+96
+	ldr	r3, [r3]
+	ldrh	r1, [r3, #16]
+	ubfx	r1, r1, #2, #1
+	bl	printf
+.L115:
+	ldr	r3, [r4]
+	lsls	r2, r3, #19
+	bpl	.L116
+	ldr	r3, .L218+12
+	ldr	r0, .L218+100
+	ldr	r3, [r3]
+	ldrh	r1, [r3, #16]
+	ubfx	r1, r1, #3, #1
+	bl	printf
+.L116:
+	ldr	r3, [r4]
+	lsls	r3, r3, #19
+	bpl	.L117
+	ldr	r3, .L218+12
+	ldr	r0, .L218+104
+	ldr	r3, [r3]
+	ldrh	r1, [r3, #16]
+	ubfx	r1, r1, #4, #1
+	bl	printf
+.L117:
+	ldr	r3, [r4]
+	lsls	r5, r3, #19
+	bpl	.L118
+	ldr	r3, .L218+12
+	ldr	r0, .L218+108
+	ldr	r3, [r3]
+	ldrh	r1, [r3, #16]
+	ubfx	r1, r1, #5, #1
+	bl	printf
+.L118:
+	ldr	r3, [r4]
+	lsls	r0, r3, #19
+	bpl	.L119
+	ldr	r3, .L218+12
+	ldr	r0, .L218+112
+	ldr	r3, [r3]
+	ldrh	r1, [r3, #16]
+	ubfx	r1, r1, #6, #1
+	bl	printf
+.L119:
+	ldr	r3, [r4]
+	lsls	r1, r3, #19
+	bpl	.L120
+	ldr	r3, .L218+12
+	ldr	r0, .L218+116
+	ldr	r3, [r3]
+	ldrh	r1, [r3, #16]
+	ubfx	r1, r1, #7, #1
+	bl	printf
+.L120:
+	ldr	r3, [r4]
+	lsls	r2, r3, #19
+	bpl	.L121
+	ldr	r3, .L218+12
+	ldr	r0, .L218+120
+	ldr	r3, [r3]
+	ldrh	r1, [r3, #16]
+	ubfx	r1, r1, #8, #1
+	bl	printf
+.L121:
+	ldr	r3, [r4]
+	lsls	r3, r3, #19
+	bpl	.L122
+	ldr	r3, .L218+12
+	ldr	r0, .L218+124
+	ldr	r3, [r3]
+	ldrh	r1, [r3, #16]
+	ubfx	r1, r1, #9, #1
+	bl	printf
+.L122:
+	ldr	r3, [r4]
+	lsls	r5, r3, #19
+	bpl	.L123
+	ldr	r3, .L218+12
+	ldr	r0, .L218+128
+	ldr	r3, [r3]
+	ldrh	r1, [r3, #16]
+	ubfx	r1, r1, #10, #1
+	bl	printf
 .L123:
+	ldr	r3, [r4]
+	lsls	r0, r3, #19
+	bpl	.L124
+	ldr	r3, .L218+132
+	ldr	r0, .L218+136
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	ldr	r3, .L218+68
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	bl	printf
+.L124:
+	ldr	r3, [r4]
+	lsls	r1, r3, #19
+	bpl	.L125
+	ldr	r3, .L218+140
+	ldr	r0, .L218+144
+	ldrb	r2, [r3, #11]	@ zero_extendqisi2
+	ldrb	r1, [r3, #10]	@ zero_extendqisi2
+	bl	printf
+.L125:
+	ldr	r3, [r4]
+	lsls	r2, r3, #19
+	bpl	.L126
+	ldr	r3, .L218+140
+	ldr	r0, .L218+148
+	ldrb	r2, [r3, #9]	@ zero_extendqisi2
+	b	.L219
+.L220:
 	.align	2
-.L122:
-	.word	.LANCHOR11
-	.word	.LANCHOR6
+.L218:
+	.word	.LANCHOR14
+	.word	.LANCHOR15
+	.word	.LC1
+	.word	.LANCHOR16
+	.word	.LC2
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LC8
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LC12
+	.word	.LANCHOR17
+	.word	.LC13
+	.word	.LANCHOR0
+	.word	.LC14
+	.word	.LC15
+	.word	.LANCHOR18
+	.word	.LC16
+	.word	.LC17
+	.word	.LC18
+	.word	.LC19
+	.word	.LC20
+	.word	.LC21
+	.word	.LC22
+	.word	.LC23
+	.word	.LC24
+	.word	.LC25
+	.word	.LC26
+	.word	.LC27
 	.word	.LANCHOR19
+	.word	.LC28
 	.word	.LANCHOR20
-	.size	flash_enter_slc_mode, .-flash_enter_slc_mode
-	.section	.text.flash_exit_slc_mode,"ax",%progbits
+	.word	.LC29
+	.word	.LC30
+.L219:
+	ldrb	r1, [r3, #8]	@ zero_extendqisi2
+	bl	printf
+.L126:
+	ldr	r3, [r4]
+	lsls	r3, r3, #19
+	bpl	.L96
+	ldr	r3, .L221
+	ldr	r0, .L221+4
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	add	sp, sp, #20
+	@ sp needed
+	pop	{r4, r5, lr}
+	b	printf
+.L96:
+	add	sp, sp, #20
+	@ sp needed
+	pop	{r4, r5, pc}
+.L222:
+	.align	2
+.L221:
+	.word	.LANCHOR21
+	.word	.LC31
+	.size	nand_flash_print_info, .-nand_flash_print_info
+	.section	.text.timer_delay_ns,"ax",%progbits
 	.align	1
-	.global	flash_exit_slc_mode
+	.global	timer_delay_ns
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_exit_slc_mode, %function
-flash_exit_slc_mode:
-	@ args = 0, pretend = 0, frame = 0
+	.type	timer_delay_ns, %function
+timer_delay_ns:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L136
-	push	{r4}
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	cbz	r2, .L124
-	ldr	r3, .L136+4
-	cmp	r2, #1
-	ldr	r3, [r3]
-	bne	.L126
-	ldr	r2, .L136+8
-	ldrb	r2, [r2, #30]	@ zero_extendqisi2
-	cbz	r2, .L124
-	add	r0, r3, r0, lsl #8
-	str	r2, [r0, #2056]
-.L124:
-	pop	{r4}
+	lsrs	r0, r0, #4
+	sub	sp, sp, #8
+	str	r0, [sp, #4]
+.L224:
+	ldr	r3, [sp, #4]
+	subs	r2, r3, #1
+	str	r2, [sp, #4]
+	cmp	r3, #0
+	bne	.L224
+	add	sp, sp, #8
+	@ sp needed
 	bx	lr
-.L126:
-	cmp	r2, #2
-	bne	.L124
-	ldr	r4, .L136+12
-	ldrb	r1, [r4]	@ zero_extendqisi2
-	cmp	r1, #0
-	bne	.L124
-	ldr	r2, .L136+8
-	add	r0, r3, r0, lsl #8
-	movs	r3, #239
-	str	r3, [r0, #2056]
-	movs	r3, #145
-	ldrb	r2, [r2, #12]	@ zero_extendqisi2
-	str	r3, [r0, #2052]
-	movs	r3, #1
-	cmp	r2, #2
-	it	ne
-	movne	r2, #4
-	str	r2, [r0, #2048]
-	strb	r2, [r4]
-	str	r3, [r0, #2048]
-	pop	{r4}
-	str	r1, [r0, #2048]
-	str	r1, [r0, #2048]
-	b	nandc_wait_flash_ready
-.L137:
-	.align	2
-.L136:
-	.word	.LANCHOR11
-	.word	.LANCHOR6
-	.word	.LANCHOR19
-	.word	.LANCHOR20
-	.size	flash_exit_slc_mode, .-flash_exit_slc_mode
-	.section	.text.flash_erase_duplane_block,"ax",%progbits
+	.size	timer_delay_ns, .-timer_delay_ns
+	.section	.text.flash_read_status,"ax",%progbits
 	.align	1
-	.global	flash_erase_duplane_block
+	.global	flash_read_status
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_erase_duplane_block, %function
-flash_erase_duplane_block:
-	@ args = 0, pretend = 0, frame = 8
+	.type	flash_read_status, %function
+flash_read_status:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	fp, r1
-	ldr	r1, .L154
-	mov	r7, r2
-	mov	r6, r3
-	ldrb	r1, [r1]	@ zero_extendqisi2
-	cmp	r1, r0
-	bhi	.L139
-	movw	r2, #517
-	ldr	r1, .L154+4
-	ldr	r0, .L154+8
-	bl	printf
-.L140:
-	b	.L140
-.L139:
-	ldr	r1, .L154+12
-	ldrb	r4, [r1, r0]	@ zero_extendqisi2
-	ldr	r1, .L154+16
-	add	r8, r4, #8
-	ldr	r5, [r1]
-	ldr	r1, .L154+20
-	ldr	r1, [r1]
-	add	r8, r5, r8, lsl #8
-	lsls	r1, r1, #27
-	bpl	.L141
-	mov	r1, r4
-	ldr	r0, .L154+24
-	bl	printf
-.L141:
-	bl	nandc_wait_flash_ready
-	mov	r0, r4
-	bl	nandc_cs
-	mov	r0, r4
-	cmp	fp, #0
-	bne	.L142
-	bl	flash_enter_slc_mode
-.L143:
-	lsls	r2, r4, #8
-	movs	r1, #96
-	adds	r3, r5, r2
-	str	r1, [r3, #2056]
-	uxtb	r1, r7
-	str	r1, [r3, #2052]
-	lsrs	r1, r7, #8
-	str	r1, [r3, #2052]
-	lsrs	r1, r7, #16
-	str	r1, [r3, #2052]
-	ldr	r1, .L154+28
-	ldrb	r1, [r1]	@ zero_extendqisi2
-	cmp	r1, #0
-	bne	.L147
-	movs	r1, #208
-	str	r2, [sp, #4]
-	str	r1, [r3, #2056]
-	str	r3, [sp]
-	bl	nandc_wait_flash_ready
-	mov	r0, r8
-	bl	flash_read_status
-	ldr	r3, [sp]
-	and	r10, r0, #5
-	ldr	r2, [sp, #4]
-.L144:
-	add	r5, r5, r2
-	movs	r2, #96
-	str	r2, [r5, #2056]
-	uxtb	r2, r6
-	str	r2, [r3, #2052]
-	lsrs	r2, r6, #8
-	lsrs	r6, r6, #16
-	str	r2, [r3, #2052]
-	str	r6, [r3, #2052]
-	movs	r3, #208
-	str	r3, [r5, #2056]
-	bl	nandc_wait_flash_ready
-	mov	r0, r8
-	bl	flash_read_status
-	mov	r5, r0
-	cmp	fp, #0
-	bne	.L145
-	mov	r0, r4
-	bl	flash_exit_slc_mode
-.L145:
-	mov	r0, r4
-	bl	nandc_de_cs
-	and	r0, r5, #5
-	orrs	r10, r0, r10
-	beq	.L146
-	mov	r2, r5
-	mov	r1, r7
-	ldr	r0, .L154+32
-	bl	printf
-.L146:
-	mov	r0, r10
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L142:
-	bl	flash_exit_slc_mode
-	b	.L143
-.L147:
-	mov	r10, #0
-	b	.L144
-.L155:
-	.align	2
-.L154:
-	.word	.LANCHOR8
-	.word	.LANCHOR21
-	.word	.LC0
-	.word	.LANCHOR10
-	.word	.LANCHOR6
-	.word	.LANCHOR22
-	.word	.LC1
-	.word	.LANCHOR23
-	.word	.LC2
-	.size	flash_erase_duplane_block, .-flash_erase_duplane_block
-	.section	.text.flash_erase_block_en,"ax",%progbits
+	push	{r3, lr}
+	movs	r3, #112
+	mov	r1, r0
+	str	r3, [r0, #8]
+	movs	r0, #120
+	bl	timer_delay_ns
+	ldr	r0, [r1]
+	uxtb	r0, r0
+	pop	{r3, pc}
+	.size	flash_read_status, .-flash_read_status
+	.section	.text.toshiba_set_rr_para,"ax",%progbits
 	.align	1
-	.global	flash_erase_block_en
+	.global	toshiba_set_rr_para
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_erase_block_en, %function
-flash_erase_block_en:
+	.type	toshiba_set_rr_para, %function
+toshiba_set_rr_para:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L170
 	push	{r4, r5, r6, r7, r8, lr}
-	mov	r8, r1
-	mov	r6, r2
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, r0
-	bhi	.L157
-	movw	r2, #561
-	ldr	r1, .L170+4
-	ldr	r0, .L170+8
-	bl	printf
-.L158:
-	b	.L158
-.L157:
-	ldr	r3, .L170+12
-	ldrb	r4, [r3, r0]	@ zero_extendqisi2
-	ldr	r3, .L170+16
-	add	r7, r4, #8
-	ldr	r5, [r3]
-	ldr	r3, .L170+20
-	ldr	r3, [r3]
-	add	r7, r5, r7, lsl #8
-	lsls	r3, r3, #27
-	bpl	.L159
-	mov	r1, r4
-	ldr	r0, .L170+24
-	bl	printf
-.L159:
-	bl	nandc_wait_flash_ready
-	mov	r0, r4
-	bl	nandc_cs
-	mov	r0, r4
-	cmp	r8, #0
-	bne	.L160
-	bl	flash_enter_slc_mode
-.L161:
-	add	r3, r5, r4, lsl #8
-	movs	r1, #96
-	ubfx	r2, r6, #0, #21
-	str	r1, [r3, #2056]
-	uxtb	r1, r6
-	str	r1, [r3, #2052]
-	lsrs	r1, r2, #8
-	lsrs	r2, r2, #16
-	str	r1, [r3, #2052]
-	str	r2, [r3, #2052]
-	movs	r2, #208
-	str	r2, [r3, #2056]
-	bl	nandc_wait_flash_ready
-	mov	r0, r7
-	bl	flash_read_status
+	add	r6, r1, r1, lsl #2
+	ldr	r8, .L235+16
 	mov	r5, r0
-	cmp	r8, #0
-	bne	.L162
-	mov	r0, r4
-	bl	flash_exit_slc_mode
-.L162:
-	mov	r0, r4
-	bl	nandc_de_cs
-	ands	r5, r5, #5
-	beq	.L163
-	ldr	r3, .L170+28
-	mov	r0, r6
-	ldrh	r1, [r3]
-	bl	__aeabi_uidiv
-	mov	r2, r5
-	mov	r1, r0
-	ldr	r0, .L170+32
-	bl	printf
-.L163:
-	mov	r0, r5
+	movs	r4, #0
+	ldr	r7, .L235
+.L228:
+	ldrb	r3, [r8]	@ zero_extendqisi2
+	cmp	r4, r3
+	bcc	.L232
 	pop	{r4, r5, r6, r7, r8, pc}
-.L160:
-	bl	flash_exit_slc_mode
-	b	.L161
-.L171:
+.L232:
+	movs	r3, #85
+	movs	r0, #200
+	str	r3, [r5, #8]
+	ldrsb	r3, [r4, r7]
+	str	r3, [r5, #4]
+	bl	timer_delay_ns
+	ldr	r3, .L235+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #34
+	bne	.L229
+	adds	r3, r4, r6
+	add	r3, r3, r7
+.L234:
+	ldrsb	r3, [r3, #5]
+.L233:
+	str	r3, [r5]
+	adds	r4, r4, #1
+	b	.L228
+.L229:
+	cmp	r3, #35
+	bne	.L231
+	ldr	r3, .L235+8
+	adds	r2, r4, r6
+	add	r3, r3, r2
+	b	.L234
+.L231:
+	ldr	r3, .L235+12
+	ldrsb	r3, [r3, r1]
+	b	.L233
+.L236:
 	.align	2
-.L170:
-	.word	.LANCHOR8
-	.word	.LANCHOR24
-	.word	.LC0
-	.word	.LANCHOR10
-	.word	.LANCHOR6
+.L235:
 	.word	.LANCHOR22
-	.word	.LC3
-	.word	.LANCHOR13
-	.word	.LC4
-	.size	flash_erase_block_en, .-flash_erase_block_en
-	.section	.text.flash_erase_block,"ax",%progbits
+	.word	.LANCHOR23
+	.word	.LANCHOR24
+	.word	.LANCHOR25
+	.word	.LANCHOR26
+	.size	toshiba_set_rr_para, .-toshiba_set_rr_para
+	.section	.text.hynix_set_rr_para,"ax",%progbits
 	.align	1
-	.global	flash_erase_block
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_erase_block, %function
-flash_erase_block:
+	.type	hynix_set_rr_para, %function
+hynix_set_rr_para:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	mov	r2, r1
-	movs	r1, #0
-	b	flash_erase_block_en
-	.size	flash_erase_block, .-flash_erase_block
-	.section	.text.flash_erase_all,"ax",%progbits
+	ldr	r3, .L242
+	push	{r4, r5, r6, r7, r8, lr}
+	lsls	r6, r0, #8
+	ldr	r4, .L242+4
+	ldr	r3, [r3]
+	ldr	r7, [r4]
+	ldrb	r2, [r3, #113]	@ zero_extendqisi2
+	add	ip, r3, #128
+	ldrb	r5, [r3, #112]	@ zero_extendqisi2
+	mul	r4, r1, r2
+	cmp	r5, #8
+	it	ne
+	movne	r5, #160
+	add	r1, r3, #112
+	add	r2, r2, #-1
+	add	r8, ip, r2
+	add	r4, r4, #32
+	it	ne
+	smlabbne	r4, r5, r0, r4
+	add	r5, r3, #127
+	movs	r0, #54
+	add	r1, r1, r4
+	adds	r4, r7, r6
+	subs	r1, r1, #1
+	str	r0, [r4, #2056]
+.L240:
+	cmp	r5, r8
+	bne	.L241
+	add	r6, r6, r7
+	movs	r3, #22
+	str	r3, [r6, #2056]
+	pop	{r4, r5, r6, r7, r8, pc}
+.L241:
+	ldrb	r3, [r5, #1]!	@ zero_extendqisi2
+	movs	r0, #120
+	str	r3, [r4, #2052]
+	bl	timer_delay_ns
+	ldrsb	r3, [r1, #1]!
+	str	r3, [r4, #2048]
+	b	.L240
+.L243:
+	.align	2
+.L242:
+	.word	.LANCHOR27
+	.word	.LANCHOR13
+	.size	hynix_set_rr_para, .-hynix_set_rr_para
+	.section	.text.hynix_reconfig_rr_para,"ax",%progbits
 	.align	1
-	.global	flash_erase_all
+	.global	hynix_reconfig_rr_para
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_erase_all, %function
-flash_erase_all:
+	.type	hynix_reconfig_rr_para, %function
+hynix_reconfig_rr_para:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L178
-	push	{r4, r5, r6, r7, r8, lr}
-	movs	r5, #0
-	ldr	r7, .L178+4
-	ldrb	r4, [r3, #13]	@ zero_extendqisi2
-	ldrh	r3, [r3, #14]
-	smulbb	r4, r4, r3
-	uxth	r4, r4
-.L174:
-	ldr	r3, .L178+8
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	uxth	r3, r5
-	cmp	r2, r3
-	bhi	.L177
+	push	{r3, r4, r5, lr}
+	mov	r4, r0
+	ldr	r3, .L249
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	subs	r3, r3, #1
+	cmp	r3, #7
+	bhi	.L244
+	ldr	r5, .L249+4
+	ldr	r3, [r5]
+	add	r3, r3, r0
+	ldrb	r3, [r3, #120]	@ zero_extendqisi2
+	cbz	r3, .L244
 	movs	r1, #0
-	ldr	r0, .L178+12
-	pop	{r4, r5, r6, r7, r8, lr}
-	b	printf
-.L177:
-	ldr	r2, .L178+16
-	uxth	r3, r5
-	movs	r6, #0
-	ldrb	r8, [r2, r3]	@ zero_extendqisi2
-.L175:
-	uxth	r3, r6
-	cmp	r4, r3
-	bhi	.L176
-	adds	r5, r5, #1
-	b	.L174
-.L176:
-	ldrh	r1, [r7]
-	mov	r0, r8
-	muls	r1, r6, r1
-	adds	r6, r6, #1
-	bl	flash_erase_block
-	b	.L175
-.L179:
+	bl	hynix_set_rr_para
+	ldr	r0, [r5]
+	movs	r3, #0
+	add	r0, r0, r4
+	strb	r3, [r0, #120]
+.L244:
+	pop	{r3, r4, r5, pc}
+.L250:
 	.align	2
-.L178:
-	.word	.LANCHOR19
-	.word	.LANCHOR13
-	.word	.LANCHOR8
-	.word	.LC5
-	.word	.LANCHOR10
-	.size	flash_erase_all, .-flash_erase_all
-	.section	.text.flash_set_interface_mode,"ax",%progbits
+.L249:
+	.word	.LANCHOR23
+	.word	.LANCHOR27
+	.size	hynix_reconfig_rr_para, .-hynix_reconfig_rr_para
+	.section	.text.nandc_set_ddr_para,"ax",%progbits
 	.align	1
-	.global	flash_set_interface_mode
+	.global	nandc_set_ddr_para
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_set_interface_mode, %function
-flash_set_interface_mode:
-	@ args = 0, pretend = 0, frame = 8
+	.type	nandc_set_ddr_para, %function
+nandc_set_ddr_para:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L202
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r6, #239
-	ldr	ip, .L202+8
-	movs	r7, #128
-	mov	lr, #1
-	mov	r8, #35
-	ldr	r5, [r3]
-	mov	r10, #5
-	ldr	r3, .L202+4
+	@ link register save eliminated.
+	ldr	r3, .L254
+	ldr	r2, .L254+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	and	r2, r3, #4
-	and	r3, r3, #1
-	str	r3, [sp]
-	movs	r3, #0
-	str	r2, [sp, #4]
-	mov	r2, r3
-.L188:
-	ldrb	r4, [ip, r3, lsl #3]	@ zero_extendqisi2
-	cmp	r4, #152
-	beq	.L181
-	cmp	r4, #69
-	beq	.L181
-	cmp	r4, #44
-	bne	.L182
-.L181:
-	cmp	r0, #1
-	bne	.L183
-	ldr	r1, [sp]
-	cbz	r1, .L182
-	lsls	r1, r3, #8
-	cmp	r4, #44
-	add	fp, r5, r1
-	str	r6, [fp, #2056]
-	itete	eq
-	streq	r0, [fp, #2052]
-	strne	r7, [fp, #2052]
-	streq	r10, [fp, #2048]
-	strne	r0, [fp, #2048]
-.L187:
-	add	r1, r1, r5
-	str	r2, [r1, #2048]
-	str	r2, [r1, #2048]
-	str	r2, [r1, #2048]
-.L182:
-	adds	r3, r3, #1
-	cmp	r3, #4
-	bne	.L188
-	bl	nandc_wait_flash_ready
-	movs	r0, #0
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L183:
-	ldr	r1, [sp, #4]
-	cmp	r1, #0
-	beq	.L182
-	lsls	r1, r3, #8
-	cmp	r4, #44
-	add	fp, r5, r1
-	str	r6, [fp, #2056]
-	itete	eq
-	streq	lr, [fp, #2052]
-	strne	r7, [fp, #2052]
-	streq	r8, [fp, #2048]
-	strne	r2, [fp, #2048]
-	b	.L187
-.L203:
-	.align	2
-.L202:
-	.word	.LANCHOR6
-	.word	.LANCHOR25
-	.word	.LANCHOR26
-	.size	flash_set_interface_mode, .-flash_set_interface_mode
-	.section	.text.flash_reset,"ax",%progbits
+	ldr	r2, [r2]
+	cmp	r3, #9
+	lsl	r3, r0, #16
+	lsl	r0, r0, #8
+	orr	r3, r3, r0
+	orr	r3, r3, #3
+	ite	eq
+	streq	r3, [r2, #80]
+	strne	r3, [r2, #304]
+	bx	lr
+.L255:
+	.align	2
+.L254:
+	.word	.LANCHOR28
+	.word	.LANCHOR13
+	.size	nandc_set_ddr_para, .-nandc_set_ddr_para
+	.section	.text.nandc_get_ddr_para,"ax",%progbits
 	.align	1
-	.global	flash_reset
+	.global	nandc_get_ddr_para
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_reset, %function
-flash_reset:
+	.type	nandc_get_ddr_para, %function
+nandc_get_ddr_para:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L205
+	ldr	r3, .L260
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #9
+	ldr	r3, .L260+4
 	ldr	r3, [r3]
-	add	r0, r3, r0, lsl #8
-	movs	r3, #255
-	str	r3, [r0, #2056]
-	b	nandc_wait_flash_ready
-.L206:
+	ite	eq
+	ldreq	r0, [r3, #80]
+	ldrne	r0, [r3, #304]
+	ubfx	r0, r0, #8, #8
+	bx	lr
+.L261:
 	.align	2
-.L205:
-	.word	.LANCHOR6
-	.size	flash_reset, .-flash_reset
-	.section	.text.flash_read_id,"ax",%progbits
+.L260:
+	.word	.LANCHOR28
+	.word	.LANCHOR13
+	.size	nandc_get_ddr_para, .-nandc_get_ddr_para
+	.section	.text.nandc_set_if_mode,"ax",%progbits
 	.align	1
-	.global	flash_read_id
+	.global	nandc_set_if_mode
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_read_id, %function
-flash_read_id:
+	.type	nandc_set_if_mode, %function
+nandc_set_if_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L208
-	push	{r4, r5, r6, lr}
-	mov	r6, r0
-	mov	r5, r1
-	ldr	r4, [r3]
-	bl	flash_reset
-	mov	r0, r6
-	bl	nandc_cs
-	add	r4, r4, r6, lsl #8
-	movs	r3, #144
-	movs	r0, #200
-	str	r3, [r4, #2056]
-	movs	r3, #0
-	str	r3, [r4, #2052]
-	bl	timer_delay_ns
-	ldr	r3, [r4, #2048]
-	mov	r0, r6
-	strb	r3, [r5]
-	ldr	r3, [r4, #2048]
-	strb	r3, [r5, #1]
-	ldr	r3, [r4, #2048]
-	strb	r3, [r5, #2]
-	ldr	r3, [r4, #2048]
-	strb	r3, [r5, #3]
-	ldr	r3, [r4, #2048]
-	strb	r3, [r5, #4]
-	ldr	r3, [r4, #2048]
-	strb	r3, [r5, #5]
-	ldr	r3, [r4, #2048]
-	strb	r3, [r5, #6]
-	ldr	r3, [r4, #2048]
-	strb	r3, [r5, #7]
-	pop	{r4, r5, r6, lr}
-	b	nandc_de_cs
-.L209:
+	@ link register save eliminated.
+	ldr	r3, .L270
+	ands	r1, r0, #6
+	ldr	r3, [r3]
+	ldr	r2, [r3]
+	beq	.L263
+	lsls	r1, r0, #29
+	ldr	r1, .L270+4
+	orr	r2, r2, #24576
+	bfc	r2, #15, #1
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	orr	r2, r2, #196608
+	it	mi
+	orrmi	r2, r2, #32768
+	cmp	r1, #9
+	ldr	r1, .L270+8
+	bne	.L265
+	movw	r0, #8321
+	str	r0, [r3, #8]
+	str	r1, [r3, #80]
+	movs	r1, #38
+	str	r1, [r3, #84]
+	movs	r1, #39
+	str	r1, [r3, #84]
+.L266:
+	str	r2, [r3]
+	bx	lr
+.L265:
+	movw	r0, #8322
+	str	r0, [r3, #344]
+	str	r1, [r3, #304]
+	movs	r1, #38
+	str	r1, [r3, #308]
+	movs	r1, #39
+	str	r1, [r3, #308]
+	b	.L266
+.L263:
+	bfi	r2, r1, #13, #1
+	b	.L266
+.L271:
 	.align	2
-.L208:
-	.word	.LANCHOR6
-	.size	flash_read_id, .-flash_read_id
-	.section	.text.flash_read_spare,"ax",%progbits
+.L270:
+	.word	.LANCHOR13
+	.word	.LANCHOR28
+	.word	1052675
+	.size	nandc_set_if_mode, .-nandc_set_if_mode
+	.section	.text.nandc_cs,"ax",%progbits
 	.align	1
-	.global	flash_read_spare
+	.global	nandc_cs
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_read_spare, %function
-flash_read_spare:
+	.type	nandc_cs, %function
+nandc_cs:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	mov	r5, r2
-	ldr	r3, .L211
-	ldr	r2, .L211+4
-	ldrb	r3, [r3, #9]	@ zero_extendqisi2
-	ldr	r4, [r2]
-	movs	r2, #0
-	lsls	r3, r3, #9
-	add	r4, r4, r0, lsl #8
-	str	r2, [r4, #2056]
-	str	r3, [r4, #2052]
-	lsrs	r3, r3, #8
-	str	r3, [r4, #2052]
-	uxtb	r3, r1
-	str	r3, [r4, #2052]
-	lsrs	r3, r1, #8
-	lsrs	r1, r1, #16
-	str	r3, [r4, #2052]
-	movs	r3, #48
-	str	r1, [r4, #2052]
-	str	r3, [r4, #2056]
-	bl	nandc_wait_flash_ready
-	ldr	r3, [r4, #2048]
-	strb	r3, [r5]
-	pop	{r3, r4, r5, pc}
-.L212:
+	@ link register save eliminated.
+	ldr	r3, .L273
+	movs	r2, #1
+	lsl	r0, r2, r0
+	ldr	r1, [r3]
+	ldr	r3, [r1]
+	bfi	r3, r0, #0, #8
+	str	r3, [r1]
+	bx	lr
+.L274:
 	.align	2
-.L211:
-	.word	.LANCHOR19
-	.word	.LANCHOR6
-	.size	flash_read_spare, .-flash_read_spare
-	.section	.text.sandisk_prog_test_bad_block,"ax",%progbits
+.L273:
+	.word	.LANCHOR13
+	.size	nandc_cs, .-nandc_cs
+	.section	.text.flash_wait_device_ready_raw,"ax",%progbits
 	.align	1
-	.global	sandisk_prog_test_bad_block
+	.global	flash_wait_device_ready_raw
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	sandisk_prog_test_bad_block, %function
-sandisk_prog_test_bad_block:
+	.type	flash_wait_device_ready_raw, %function
+flash_wait_device_ready_raw:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	lsls	r0, r0, #8
-	ldr	r3, .L220
-	ldr	r5, .L220+4
+	ldr	r3, .L281
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r4, r0
+	mov	r5, r1
+	mov	r6, r2
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r0
+	bhi	.L276
+	movw	r2, #677
+	ldr	r1, .L281+4
+	ldr	r0, .L281+8
+	bl	printf
+.L276:
+	ldr	r3, .L281+12
+	lsrs	r7, r5, #16
+	ldrb	r8, [r3, r4]	@ zero_extendqisi2
+	ldr	r3, .L281+16
+	mov	r0, r8
 	ldr	r4, [r3]
-	ldrb	r3, [r5, #29]	@ zero_extendqisi2
-	cbz	r3, .L214
-	adds	r2, r4, r0
-	str	r3, [r2, #2056]
-.L215:
-	add	r4, r4, r0
-	movs	r3, #128
-	str	r3, [r4, #2056]
-	movs	r3, #0
-	str	r3, [r4, #2052]
-	str	r3, [r4, #2052]
-	uxtb	r3, r1
-	str	r3, [r4, #2052]
-	lsrs	r3, r1, #8
-	lsrs	r1, r1, #16
-	str	r3, [r4, #2052]
-	movs	r3, #16
+	bl	nandc_cs
+	lsrs	r1, r5, #8
+	uxtb	r5, r5
+	add	r4, r4, r8, lsl #8
+.L279:
+	movs	r0, #120
+	str	r0, [r4, #2056]
+	str	r5, [r4, #2052]
 	str	r1, [r4, #2052]
-	str	r3, [r4, #2056]
-	bl	nandc_wait_flash_ready
-	movs	r3, #112
-	movs	r0, #80
-	str	r3, [r4, #2056]
+	str	r7, [r4, #2052]
 	bl	timer_delay_ns
-	ldrb	r3, [r5, #30]	@ zero_extendqisi2
 	ldr	r0, [r4, #2048]
-	and	r0, r0, #5
-	cbz	r3, .L213
-	str	r3, [r4, #2056]
-.L213:
-	pop	{r3, r4, r5, pc}
-.L214:
-	adds	r3, r4, r0
-	movs	r2, #162
-	str	r2, [r3, #2056]
-	b	.L215
-.L221:
+	uxtb	r0, r0
+	bics	r3, r6, r0
+	bne	.L279
+	cmp	r0, #255
+	beq	.L279
+	bl	nandc_de_cs.constprop.29
+	pop	{r4, r5, r6, r7, r8, pc}
+.L282:
 	.align	2
-.L220:
-	.word	.LANCHOR6
-	.word	.LANCHOR19
-	.size	sandisk_prog_test_bad_block, .-sandisk_prog_test_bad_block
-	.section	.text.nandc_bch_sel,"ax",%progbits
+.L281:
+	.word	.LANCHOR18
+	.word	.LANCHOR29
+	.word	.LC0
+	.word	.LANCHOR30
+	.word	.LANCHOR13
+	.size	flash_wait_device_ready_raw, .-flash_wait_device_ready_raw
+	.section	.text.flash_wait_device_ready,"ax",%progbits
 	.align	1
-	.global	nandc_bch_sel
+	.global	flash_wait_device_ready
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	nandc_bch_sel, %function
-nandc_bch_sel:
+	.type	flash_wait_device_ready, %function
+flash_wait_device_ready:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r1, .L236
-	movs	r2, #0
-	push	{r4, lr}
-	movs	r3, #1
-	strb	r0, [r1]
-	ldr	r1, .L236+4
-	ldrb	r1, [r1]	@ zero_extendqisi2
-	cmp	r1, #9
-	ldr	r1, .L236+8
-	ldr	r1, [r1]
-	bne	.L223
-	cmp	r0, #70
-	str	r3, [r1, #16]
-	beq	.L224
-	cmp	r0, #60
-	beq	.L231
-	cmp	r0, #40
-	ite	eq
-	moveq	r2, #2
-	movne	r2, r3
-.L224:
-	lsls	r3, r2, #25
-	orr	r3, r3, #1
-	str	r3, [r1, #32]
-	pop	{r4, pc}
-.L231:
-	movs	r2, #3
-	b	.L224
-.L223:
-	movs	r4, #16
-	str	r3, [r1, #8]
-	cmp	r0, r4
-	mov	r3, r2
-	bfi	r3, r4, #8, #8
-	bfi	r3, r2, #18, #1
-	bne	.L226
-.L229:
-	bfc	r3, #4, #1
-.L227:
-	orr	r3, r3, #1
-	str	r3, [r1, #12]
-	pop	{r4, pc}
-.L226:
-	cmp	r0, #24
-	bne	.L228
-	orr	r3, r3, #16
-	b	.L227
-.L228:
-	cmp	r0, #40
-	orr	r3, r3, #262144
-	orr	r3, r3, #16
-	bne	.L227
-	b	.L229
-.L237:
+	tst	r0, #50331648
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	mov	r10, r1
+	ubfx	r4, r0, #0, #21
+	ubfx	r8, r0, #21, #3
+	bne	.L284
+	ldr	r3, .L293
+	ldr	r6, .L293+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L285
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	cbz	r3, .L284
+.L285:
+	ldr	r3, .L293+8
+	mov	r0, r4
+	ldrh	r5, [r3]
+	mov	r1, r5
+	bl	__aeabi_uidiv
+	mov	r1, r5
+	mul	r7, r5, r0
+	mov	r0, r4
+	bl	__aeabi_uidivmod
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	cbz	r3, .L286
+	add	r4, r7, r1, lsl #1
+.L284:
+	mov	r2, r10
+	mov	r1, r4
+	mov	r0, r8
+	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
+	b	flash_wait_device_ready_raw
+.L286:
+	ldr	r3, .L293+12
+	ldrh	r4, [r3, r1, lsl #1]
+	add	r4, r4, r7
+	b	.L284
+.L294:
 	.align	2
-.L236:
-	.word	.LANCHOR27
-	.word	.LANCHOR7
-	.word	.LANCHOR6
-	.size	nandc_bch_sel, .-nandc_bch_sel
-	.section	.text.NandCIrqEnable,"ax",%progbits
+.L293:
+	.word	.LANCHOR0
+	.word	.LANCHOR1
+	.word	.LANCHOR2
+	.word	.LANCHOR3
+	.size	flash_wait_device_ready, .-flash_wait_device_ready
+	.section	.text.nandc_de_cs,"ax",%progbits
 	.align	1
-	.global	NandCIrqEnable
+	.global	nandc_de_cs
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	NandCIrqEnable, %function
-NandCIrqEnable:
+	.type	nandc_de_cs, %function
+nandc_de_cs:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+	ldr	r3, .L296
+	ldr	r2, [r3]
+	ldr	r3, [r2]
+	bfc	r3, #0, #8
+	bfc	r3, #17, #1
+	str	r3, [r2]
 	bx	lr
-	.size	NandCIrqEnable, .-NandCIrqEnable
-	.section	.text.NandCIrqDisable,"ax",%progbits
+.L297:
+	.align	2
+.L296:
+	.word	.LANCHOR13
+	.size	nandc_de_cs, .-nandc_de_cs
+	.section	.text.nandc_wait_flash_ready_no_delay,"ax",%progbits
 	.align	1
-	.global	NandCIrqDisable
+	.global	nandc_wait_flash_ready_no_delay
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	NandCIrqDisable, %function
-NandCIrqDisable:
-	@ args = 0, pretend = 0, frame = 0
+	.type	nandc_wait_flash_ready_no_delay, %function
+nandc_wait_flash_ready_no_delay:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	bx	lr
-	.size	NandCIrqDisable, .-NandCIrqDisable
-	.section	.text.rk_nandc_get_irq_status,"ax",%progbits
+	push	{r0, r1, r4, lr}
+	ldr	r1, .L303
+	ldr	r4, .L303+4
+.L300:
+	ldr	r3, [r4]
+	ldr	r3, [r3]
+	str	r3, [sp, #4]
+	ldr	r3, [sp, #4]
+	lsls	r3, r3, #22
+	bmi	.L301
+	movs	r0, #10
+	bl	timer_delay_ns
+	subs	r1, r1, #1
+	bne	.L300
+	mov	r0, #-1
+.L298:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, pc}
+.L301:
+	movs	r0, #0
+	b	.L298
+.L304:
+	.align	2
+.L303:
+	.word	100000
+	.word	.LANCHOR13
+	.size	nandc_wait_flash_ready_no_delay, .-nandc_wait_flash_ready_no_delay
+	.section	.text.zftl_flash_enter_slc_mode,"ax",%progbits
 	.align	1
-	.global	rk_nandc_get_irq_status
+	.global	zftl_flash_enter_slc_mode
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	rk_nandc_get_irq_status, %function
-rk_nandc_get_irq_status:
+	.type	zftl_flash_enter_slc_mode, %function
+zftl_flash_enter_slc_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L243
+	ldr	r3, .L326
+	push	{r4, lr}
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #9
-	ite	eq
-	ldreq	r0, [r0, #296]
-	ldrne	r0, [r0, #372]
-	bx	lr
-.L244:
+	cmp	r3, #0
+	beq	.L305
+	ldr	r2, .L326+4
+	cmp	r3, #1
+	ldr	r4, [r2]
+	bne	.L308
+.L325:
+	ldr	r3, .L326+8
+	ldrb	r3, [r3, #29]	@ zero_extendqisi2
+	cbz	r3, .L305
+	add	r4, r4, r0, lsl #8
+	str	r3, [r4, #2056]
+	pop	{r4, pc}
+.L308:
+	cmp	r3, #2
+	bne	.L310
+	ldr	r3, .L326+12
+	ldrb	r2, [r3, r0]	@ zero_extendqisi2
+	cbz	r2, .L305
+	movs	r2, #0
+	strb	r2, [r3, r0]
+	b	.L325
+.L310:
+	cmp	r3, #3
+	bne	.L305
+	ldr	r3, .L326+12
+	ldrb	r2, [r3, r0]	@ zero_extendqisi2
+	cbz	r2, .L305
+	add	r4, r4, r0, lsl #8
+	movs	r1, #0
+	strb	r1, [r3, r0]
+	movs	r3, #239
+	str	r3, [r4, #2056]
+	movs	r3, #145
+	str	r3, [r4, #2052]
+	movs	r0, #50
+	bl	timer_delay_ns
+	movs	r3, #1
+	str	r1, [r4, #2048]
+	movs	r0, #150
+	str	r3, [r4, #2048]
+	str	r1, [r4, #2048]
+	str	r1, [r4, #2048]
+	bl	timer_delay_ns
+	bl	nandc_wait_flash_ready_no_delay
+	movs	r3, #218
+	movs	r0, #150
+	str	r3, [r4, #2056]
+	bl	timer_delay_ns
+	pop	{r4, lr}
+	b	nandc_wait_flash_ready_no_delay
+.L305:
+	pop	{r4, pc}
+.L327:
 	.align	2
-.L243:
-	.word	.LANCHOR7
-	.size	rk_nandc_get_irq_status, .-rk_nandc_get_irq_status
-	.section	.text.rk_nandc_flash_ready,"ax",%progbits
+.L326:
+	.word	.LANCHOR0
+	.word	.LANCHOR13
+	.word	.LANCHOR31
+	.word	.LANCHOR32
+	.size	zftl_flash_enter_slc_mode, .-zftl_flash_enter_slc_mode
+	.section	.text.zftl_flash_exit_slc_mode,"ax",%progbits
 	.align	1
-	.global	rk_nandc_flash_ready
+	.global	zftl_flash_exit_slc_mode
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	rk_nandc_flash_ready, %function
-rk_nandc_flash_ready:
+	.type	zftl_flash_exit_slc_mode, %function
+zftl_flash_exit_slc_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	bx	lr
-	.size	rk_nandc_flash_ready, .-rk_nandc_flash_ready
-	.section	.text.NandcIqrWaitFlashReady,"ax",%progbits
+	ldr	r3, .L351
+	mov	r1, r0
+	push	{r4, r5, r6, r7, r8, lr}
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L328
+	ldr	r2, .L351+4
+	cmp	r3, #1
+	ldr	r5, [r2]
+	bne	.L331
+	ldr	r3, .L351+8
+	ldrb	r3, [r3, #30]	@ zero_extendqisi2
+.L350:
+	cmp	r3, #0
+	beq	.L328
+	add	r1, r5, r1, lsl #8
+	str	r3, [r1, #2056]
+	pop	{r4, r5, r6, r7, r8, pc}
+.L331:
+	cmp	r3, #2
+	bne	.L333
+	ldr	r0, .L351+12
+	ldrb	r3, [r0, r1]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L328
+	ldr	r2, .L351+8
+	ldrb	r3, [r2, #12]	@ zero_extendqisi2
+	cmp	r3, #2
+	it	ne
+	movne	r3, #4
+	strb	r3, [r0, r1]
+	ldrb	r3, [r2, #30]	@ zero_extendqisi2
+	b	.L350
+.L333:
+	cmp	r3, #3
+	bne	.L328
+	ldr	r6, .L351+12
+	ldrb	r3, [r6, r0]	@ zero_extendqisi2
+	cbnz	r3, .L328
+	ldr	r8, .L351+8
+	lsls	r7, r0, #8
+	adds	r4, r5, r7
+	add	r5, r5, r7
+	ldrb	r3, [r8, #12]	@ zero_extendqisi2
+	cmp	r3, #2
+	it	ne
+	movne	r3, #4
+	strb	r3, [r6, r0]
+	movs	r3, #239
+	str	r3, [r4, #2056]
+	movs	r3, #145
+	str	r3, [r4, #2052]
+	movs	r0, #50
+	bl	timer_delay_ns
+	ldrb	r3, [r8, #7]	@ zero_extendqisi2
+	movs	r0, #150
+	cmp	r3, #9
+	mov	r3, #1
+	itet	ne
+	ldrbne	r2, [r6, r1]	@ zero_extendqisi2
+	streq	r3, [r4, #2048]
+	strne	r2, [r4, #2048]
+	str	r3, [r4, #2048]
+	movs	r3, #0
+	str	r3, [r4, #2048]
+	str	r3, [r4, #2048]
+	bl	timer_delay_ns
+	bl	nandc_wait_flash_ready_no_delay
+	movs	r3, #223
+	movs	r0, #150
+	str	r3, [r5, #2056]
+	bl	timer_delay_ns
+	pop	{r4, r5, r6, r7, r8, lr}
+	b	nandc_wait_flash_ready_no_delay
+.L328:
+	pop	{r4, r5, r6, r7, r8, pc}
+.L352:
+	.align	2
+.L351:
+	.word	.LANCHOR0
+	.word	.LANCHOR13
+	.word	.LANCHOR31
+	.word	.LANCHOR32
+	.size	zftl_flash_exit_slc_mode, .-zftl_flash_exit_slc_mode
+	.section	.text.flash_start_page_read,"ax",%progbits
 	.align	1
-	.global	NandcIqrWaitFlashReady
+	.global	flash_start_page_read
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	NandcIqrWaitFlashReady, %function
-NandcIqrWaitFlashReady:
+	.type	flash_start_page_read, %function
+flash_start_page_read:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	bx	lr
-	.size	NandcIqrWaitFlashReady, .-NandcIqrWaitFlashReady
-	.section	.text.rk_nandc_flash_xfer_completed,"ax",%progbits
-	.align	1
-	.global	rk_nandc_flash_xfer_completed
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	rk_nandc_flash_xfer_completed, %function
-rk_nandc_flash_xfer_completed:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	bx	lr
-	.size	rk_nandc_flash_xfer_completed, .-rk_nandc_flash_xfer_completed
-	.section	.text.nandc_xfer_start,"ax",%progbits
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	ubfx	r4, r1, #21, #3
+	ldr	r3, .L361
+	mov	r7, r0
+	ubfx	r5, r1, #0, #21
+	ubfx	r8, r1, #24, #2
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r4
+	bhi	.L354
+	movw	r2, #845
+	ldr	r1, .L361+4
+	ldr	r0, .L361+8
+	bl	printf
+.L354:
+	ldr	r3, .L361+12
+	ldrb	r6, [r3, r4]	@ zero_extendqisi2
+	ldr	r3, .L361+16
+	mov	r0, r6
+	ldr	r4, [r3]
+	lsl	r10, r6, #8
+	bl	nandc_cs
+	cmp	r8, #0
+	bne	.L355
+	mov	r0, r5
+	bl	slc_phy_page_address_calc
+	ldr	r3, .L361+20
+	mov	r5, r0
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L356
+	mov	r0, r6
+	bl	zftl_flash_enter_slc_mode
+.L356:
+	add	r3, r4, r10
+	movs	r2, #0
+	str	r2, [r3, #2056]
+	str	r2, [r3, #2052]
+	str	r2, [r3, #2052]
+	uxtb	r2, r5
+	str	r2, [r3, #2052]
+	lsrs	r2, r5, #8
+	lsrs	r5, r5, #16
+	str	r2, [r3, #2052]
+	str	r5, [r3, #2052]
+	str	r7, [r3, #2056]
+	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
+	b	nandc_de_cs.constprop.29
+.L355:
+	ldr	r3, .L361+24
+	ldr	r3, [r3]
+	ldrb	r3, [r3, #12]	@ zero_extendqisi2
+	cmp	r3, #3
+	bne	.L357
+	add	r3, r4, r10
+	str	r8, [r3, #2056]
+	b	.L356
+.L357:
+	mov	r0, r6
+	bl	zftl_flash_exit_slc_mode
+	b	.L356
+.L362:
+	.align	2
+.L361:
+	.word	.LANCHOR18
+	.word	.LANCHOR33
+	.word	.LC0
+	.word	.LANCHOR30
+	.word	.LANCHOR13
+	.word	.LANCHOR0
+	.word	.LANCHOR16
+	.size	flash_start_page_read, .-flash_start_page_read
+	.section	.text.nandc_wait_flash_ready,"ax",%progbits
 	.align	1
-	.global	nandc_xfer_start
+	.global	nandc_wait_flash_ready
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	nandc_xfer_start, %function
-nandc_xfer_start:
-	@ args = 0, pretend = 0, frame = 16
+	.type	nandc_wait_flash_ready, %function
+nandc_wait_flash_ready:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r7, r0
-	ldr	r0, .L264
-	adds	r6, r1, #1
-	ldr	r5, .L264+4
-	ldrb	r0, [r0]	@ zero_extendqisi2
-	ldr	r10, .L264+24
-	cmp	r0, #9
-	bne	.L249
-	movs	r4, #0
-	movs	r1, #1
-	bfi	r4, r7, #1, #1
-	asrs	r6, r6, r1
-	orr	r4, r4, #8
-	bfi	r4, r1, #5, #2
-	ldr	r1, .L264+8
-	orr	r4, r4, #536870912
-	orr	r4, r4, #1024
-	ldrb	r1, [r1]	@ zero_extendqisi2
-	bfc	r4, #4, #1
-	bfi	r4, r6, #22, #6
-	cbz	r1, .L250
-	ldr	r1, .L264+12
-	ldrb	r1, [r1]	@ zero_extendqisi2
-	cbz	r1, .L250
-	orr	r4, r4, #512
-.L250:
-	add	r1, r2, #63
-	and	r6, r6, #63
-	bic	r1, r1, #63
-	bic	r0, r2, #63
-	add	r1, r1, r6, lsl #10
-	str	r2, [r5, #4]
-	str	r3, [r5, #8]
-	clz	r7, r7
-	str	r2, [r5, #12]
-	lsrs	r7, r7, #5
-	str	r3, [r5, #16]
-	bl	flush_dcache_range
-	ldr	r0, [r5, #8]
-	add	r1, r0, #63
-	bic	r0, r0, #63
-	bic	r1, r1, #63
-	add	r1, r1, r6, lsl #2
-	bl	flush_dcache_range
-	movs	r3, #1
-	ldr	r2, [r10]
-	str	r3, [r5, #20]
-	movs	r1, #16
-	ldr	r3, [r5, #12]
-	str	r3, [r2, #52]
-	ldr	r3, [r5, #16]
-	str	r3, [r2, #56]
-	ldr	r3, [r2, #48]
-	bfi	r3, r1, #9, #5
-	movs	r1, #2
-	orr	r3, r3, #448
-	bfi	r3, r1, #3, #3
-	ldr	r1, .L264+16
-	orr	r3, r3, #4
-	bfi	r3, r7, #1, #1
-	ldrh	r1, [r1]
-	orr	r3, r3, #1
-	bfi	r3, r1, #16, #11
-	str	r3, [r2, #48]
-	str	r4, [r2, #16]
-	orr	r4, r4, #4
-	str	r4, [r2, #16]
-.L248:
-	add	sp, sp, #16
+	push	{r0, r1, r4, lr}
+	movs	r0, #150
+	bl	timer_delay_ns
+	ldr	r4, .L368
+	ldr	r1, .L368+4
+.L365:
+	ldr	r3, [r4]
+	ldr	r3, [r3]
+	str	r3, [sp, #4]
+	ldr	r3, [sp, #4]
+	lsls	r3, r3, #22
+	bmi	.L366
+	movs	r0, #10
+	bl	timer_delay_ns
+	subs	r1, r1, #1
+	bne	.L365
+	mov	r0, #-1
+.L363:
+	add	sp, sp, #8
 	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L249:
-	ldr	r0, [r10]
-	movs	r4, #0
-	bfi	r4, r7, #1, #1
-	orr	r4, r4, #8
-	ldr	r8, [r0, #12]
-	movs	r0, #16
-	bfi	r8, r0, #8, #8
-	movs	r0, #1
-	bfi	r4, r0, #5, #2
-	asrs	r6, r6, r0
-	orr	r4, r4, #536870912
-	orr	r4, r4, #1024
-	bfc	r8, #3, #1
-	bfc	r4, #4, #1
-	bfc	r8, #5, #3
-	str	r6, [sp]
-	bfi	r4, r6, #22, #6
-	cmp	r7, #0
-	beq	.L252
-	ldr	r0, .L264+20
-	lsrs	r1, r1, #1
-	str	r1, [sp, #8]
-	ldrb	r0, [r0]	@ zero_extendqisi2
-	ldr	r1, [r5]
-	cmp	r0, #24
-	ite	hi
-	movhi	r0, #128
-	movls	r0, #64
-	str	r1, [sp, #12]
-	movs	r1, #0
-	str	r0, [sp, #4]
-	mov	r0, r1
-.L254:
-	ldr	r6, [sp, #4]
-	add	fp, r3, r0, lsl #2
-	add	lr, r6, r1
-	ldr	r6, [sp, #8]
-	cmp	r0, r6
-	blt	.L255
-.L256:
-	ldr	r3, [r5]
-	add	r1, r2, #63
-	bic	r1, r1, #63
-	bic	r0, r2, #63
-	str	r2, [r5, #4]
-	clz	r7, r7
-	str	r3, [r5, #8]
-	lsrs	r7, r7, #5
-	str	r3, [r5, #16]
-	ldr	r3, [sp]
-	str	r2, [r5, #12]
-	and	r6, r3, #63
-	add	r1, r1, r6, lsl #10
-	bl	flush_dcache_range
-	ldr	r0, [r5, #8]
-	add	r1, r0, #63
-	bic	r0, r0, #63
-	bic	r1, r1, #63
-	add	r1, r1, r6, lsl #7
-	bl	flush_dcache_range
-	movs	r3, #1
-	ldr	r2, [r10]
-	str	r3, [r5, #20]
-	movs	r1, #16
-	ldr	r3, [r5, #12]
-	str	r3, [r2, #20]
-	ldr	r3, [r5, #16]
-	str	r3, [r2, #24]
-	movs	r3, #0
-	bfi	r3, r1, #9, #5
-	movs	r1, #2
-	orr	r3, r3, #448
-	bfi	r3, r1, #3, #3
-	orr	r3, r3, #4
-	bfi	r3, r7, #1, #1
-	orr	r3, r3, #1
-	str	r3, [r2, #16]
-	str	r8, [r2, #12]
-	str	r4, [r2, #8]
-	orr	r4, r4, #4
-	str	r4, [r2, #8]
-	b	.L248
-.L255:
-	ldrh	ip, [r3, r0, lsl #2]
-	bic	r1, r1, #3
-	ldrh	fp, [fp, #2]
-	adds	r0, r0, #1
-	ldr	r6, [sp, #12]
-	orr	ip, ip, fp, lsl #16
-	str	ip, [r6, r1]
-	mov	r1, lr
-	b	.L254
-.L252:
-	ldr	r3, [r5]
-	str	r0, [r3]
-	b	.L256
-.L265:
+	pop	{r4, pc}
+.L366:
+	movs	r0, #0
+	b	.L363
+.L369:
 	.align	2
-.L264:
-	.word	.LANCHOR7
-	.word	.LANCHOR30
-	.word	.LANCHOR28
-	.word	.LANCHOR29
-	.word	.LANCHOR31
-	.word	.LANCHOR27
-	.word	.LANCHOR6
-	.size	nandc_xfer_start, .-nandc_xfer_start
-	.section	.text.nandc_set_seed,"ax",%progbits
+.L368:
+	.word	.LANCHOR13
+	.word	100000
+	.size	nandc_wait_flash_ready, .-nandc_wait_flash_ready
+	.section	.text.sandisk_set_rr_para,"ax",%progbits
 	.align	1
-	.global	nandc_set_seed
+	.global	sandisk_set_rr_para
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	nandc_set_seed, %function
-nandc_set_seed:
+	.type	sandisk_set_rr_para, %function
+sandisk_set_rr_para:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r2, .L273
-	and	r0, r0, #127
-	ldr	r3, .L273+4
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r2, .L267
-	orr	r3, r3, #-1073741824
-.L267:
-	ldr	r2, .L273+8
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cmp	r2, #9
-	ldr	r2, .L273+12
-	ldr	r2, [r2]
-	ite	eq
-	streq	r3, [r2, #520]
-	strne	r3, [r2, #336]
-	bx	lr
-.L274:
+	push	{r3, r4, r5, r6, r7, lr}
+	movs	r3, #239
+	str	r3, [r0, #8]
+	movs	r3, #17
+	mov	r4, r0
+	str	r3, [r0, #4]
+	movs	r0, #200
+	bl	timer_delay_ns
+	ldr	r3, .L376
+	add	r1, r1, r1, lsl #2
+	ldr	r6, .L376+4
+	movs	r2, #0
+	ldr	r7, .L376+8
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	ldr	r3, .L376+12
+	ldrb	r5, [r3]	@ zero_extendqisi2
+.L371:
+	cmp	r2, r0
+	bcc	.L374
+	pop	{r3, r4, r5, r6, r7, lr}
+	b	nandc_wait_flash_ready
+.L374:
+	adds	r3, r2, r1
+	cmp	r5, #67
+	ite	eq
+	addeq	r3, r3, r7
+	addne	r3, r3, r6
+	ldrsb	r3, [r3, #5]
+	adds	r2, r2, #1
+	str	r3, [r4]
+	b	.L371
+.L377:
 	.align	2
-.L273:
-	.word	.LANCHOR29
-	.word	.LANCHOR32
-	.word	.LANCHOR7
-	.word	.LANCHOR6
-	.size	nandc_set_seed, .-nandc_set_seed
-	.section	.text.flash_start_page_read,"ax",%progbits
+.L376:
+	.word	.LANCHOR26
+	.word	.LANCHOR24
+	.word	.LANCHOR22
+	.word	.LANCHOR23
+	.size	sandisk_set_rr_para, .-sandisk_set_rr_para
+	.section	.text.toshiba_3d_set_tlc_rr_para,"ax",%progbits
 	.align	1
-	.global	flash_start_page_read
+	.global	toshiba_3d_set_tlc_rr_para
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_start_page_read, %function
-flash_start_page_read:
-	@ args = 0, pretend = 0, frame = 16
+	.type	toshiba_3d_set_tlc_rr_para, %function
+toshiba_3d_set_tlc_rr_para:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ubfx	r3, r1, #21, #3
-	ldr	r2, .L293
-	str	r0, [sp, #4]
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cmp	r2, r3
-	bhi	.L276
-	movw	r2, #738
-	ldr	r1, .L293+4
-	ldr	r0, .L293+8
-	bl	printf
-.L277:
-	b	.L277
-.L276:
-	ldr	r2, .L293+12
-	ubfx	r5, r1, #24, #2
-	ubfx	r4, r1, #0, #21
-	ldr	r10, .L293+36
-	ldrb	r7, [r2, r3]	@ zero_extendqisi2
-	ldr	r3, .L293+16
-	mov	r0, r7
-	ldr	r6, [r3]
-	lsl	fp, r7, #8
-	bl	nandc_cs
-	cmp	r5, #0
-	bne	.L278
-	ldr	r3, .L293+20
-	ldr	r2, .L293+24
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L279
-	ldrb	r3, [r2]	@ zero_extendqisi2
-	cbz	r3, .L280
-.L279:
-	ldr	r3, .L293+28
-	mov	r0, r4
-	str	r2, [sp, #12]
-	ldrh	r8, [r3]
-	mov	r1, r8
-	bl	__aeabi_uidiv
-	mul	r3, r8, r0
-	mov	r1, r8
-	mov	r0, r4
-	str	r3, [sp, #8]
-	bl	__aeabi_uidivmod
-	ldr	r2, [sp, #12]
-	ldr	r3, [sp, #8]
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbz	r2, .L281
-	add	r4, r3, r1, lsl #1
-.L280:
-	mov	r0, r7
-	bl	flash_enter_slc_mode
-	b	.L282
-.L281:
-	ldr	r2, .L293+32
-	ldrh	r4, [r2, r1, lsl #1]
-	add	r4, r4, r3
-.L282:
-	add	r6, r6, fp
-	movs	r3, #0
-	str	r3, [r6, #2056]
-	str	r3, [r6, #2052]
-	str	r3, [r6, #2052]
-	uxtb	r3, r4
-	str	r3, [r6, #2052]
-	lsrs	r3, r4, #8
-	str	r3, [r6, #2052]
-	lsrs	r3, r4, #16
-	str	r3, [r6, #2052]
-	ldr	r3, [sp, #4]
-	str	r3, [r6, #2056]
-	ldr	r3, [r10]
-	ldrb	r3, [r3, #12]	@ zero_extendqisi2
-	cmp	r3, #3
-	bne	.L284
-	cbz	r5, .L284
-	add	r4, r4, r4, lsl #1
-	subs	r5, r5, #1
-	adds	r0, r4, r5
-.L292:
-	bl	nandc_set_seed
-	movs	r0, #0
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
-	b	nandc_de_cs
-.L278:
-	ldr	r3, [r10]
-	ldrb	r3, [r3, #12]	@ zero_extendqisi2
-	cmp	r3, #3
-	bne	.L283
-	add	r3, r6, fp
-	str	r5, [r3, #2056]
-	b	.L282
-.L283:
-	mov	r0, r7
-	bl	flash_exit_slc_mode
-	b	.L282
-.L284:
-	mov	r0, r4
-	b	.L292
-.L294:
+	push	{r3, r4, r5, r6, r7, lr}
+	movs	r6, #0
+	movs	r7, #213
+	mvn	r3, #118
+	adds	r1, r1, #1
+	mov	r4, r0
+	str	r7, [r0, #8]
+	rsb	r1, r1, r1, lsl #3
+	str	r6, [r0, #4]
+	str	r3, [r0, #4]
+	ldr	r3, .L379
+	adds	r5, r3, r1
+	ldrsb	r3, [r3, r1]
+	str	r3, [r0]
+	ldrsb	r3, [r5, #1]
+	str	r3, [r0]
+	ldrsb	r3, [r5, #2]
+	str	r3, [r0]
+	ldrsb	r3, [r5, #3]
+	str	r3, [r0]
+	bl	nandc_wait_flash_ready
+	mvn	r3, #117
+	str	r7, [r4, #8]
+	str	r6, [r4, #4]
+	str	r3, [r4, #4]
+	ldrsb	r3, [r5, #4]
+	str	r3, [r4]
+	ldrsb	r3, [r5, #5]
+	str	r3, [r4]
+	ldrsb	r3, [r5, #6]
+	str	r3, [r4]
+	str	r6, [r4]
+	pop	{r3, r4, r5, r6, r7, lr}
+	b	nandc_wait_flash_ready
+.L380:
 	.align	2
-.L293:
-	.word	.LANCHOR8
-	.word	.LANCHOR33
-	.word	.LC0
-	.word	.LANCHOR10
-	.word	.LANCHOR6
-	.word	.LANCHOR11
-	.word	.LANCHOR12
-	.word	.LANCHOR13
-	.word	.LANCHOR14
+.L379:
 	.word	.LANCHOR34
-	.size	flash_start_page_read, .-flash_start_page_read
-	.section	.text.FlashDeInit,"ax",%progbits
+	.size	toshiba_3d_set_tlc_rr_para, .-toshiba_3d_set_tlc_rr_para
+	.section	.text.toshiba_3d_set_slc_rr_para,"ax",%progbits
 	.align	1
-	.global	FlashDeInit
+	.global	toshiba_3d_set_slc_rr_para
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashDeInit, %function
-FlashDeInit:
+	.type	toshiba_3d_set_slc_rr_para, %function
+toshiba_3d_set_slc_rr_para:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, lr}
-	ldr	r4, .L307
-	bl	nandc_wait_flash_ready
-	movs	r0, #0
-	bl	hynix_reconfig_rr_para
-	ldrb	r3, [r4]	@ zero_extendqisi2
-	cbz	r3, .L296
-	ldr	r3, .L307+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	lsls	r3, r3, #31
-	bpl	.L296
-	movs	r0, #1
-	bl	flash_set_interface_mode
-	movs	r0, #1
-	bl	nandc_set_if_mode
+	@ link register save eliminated.
+	movs	r3, #213
+	mvn	r2, #116
+	str	r3, [r0, #8]
 	movs	r3, #0
-	strb	r3, [r4]
-.L296:
-	ldr	r1, .L307+8
-	ldrb	r3, [r1]	@ zero_extendqisi2
-	cbz	r3, .L297
-	movs	r0, #0
-	strb	r0, [r1]
-	bl	nandc_set_seed
-	movs	r3, #1
-	strb	r3, [r1]
-.L297:
-	movs	r0, #0
-	pop	{r4, pc}
-.L308:
+	str	r3, [r0, #4]
+	str	r2, [r0, #4]
+	ldr	r2, .L382
+	add	r1, r1, r2
+	ldrsb	r2, [r1, #1]
+	str	r2, [r0]
+	str	r3, [r0]
+	str	r3, [r0]
+	str	r3, [r0]
+	b	nandc_wait_flash_ready
+.L383:
 	.align	2
-.L307:
+.L382:
 	.word	.LANCHOR35
-	.word	.LANCHOR25
-	.word	.LANCHOR29
-	.size	FlashDeInit, .-FlashDeInit
-	.section	.text.nandc_randomizer_enable,"ax",%progbits
+	.size	toshiba_3d_set_slc_rr_para, .-toshiba_3d_set_slc_rr_para
+	.section	.text.toshiba_tlc_set_rr_para,"ax",%progbits
 	.align	1
-	.global	nandc_randomizer_enable
+	.global	toshiba_tlc_set_rr_para
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	nandc_randomizer_enable, %function
-nandc_randomizer_enable:
+	.type	toshiba_tlc_set_rr_para, %function
+toshiba_tlc_set_rr_para:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L310
-	strb	r0, [r3]
-	bx	lr
-.L311:
+	push	{r4, r5, r6, lr}
+	movs	r6, #239
+	mov	r4, r0
+	str	r6, [r0, #8]
+	cbz	r2, .L385
+	movs	r3, #18
+	rsb	r1, r1, r1, lsl #3
+	str	r3, [r0, #4]
+	ldr	r3, .L387
+	adds	r5, r3, r1
+	ldrb	r3, [r3, r1]	@ zero_extendqisi2
+	str	r3, [r0]
+	ldrb	r3, [r5, #1]	@ zero_extendqisi2
+	str	r3, [r0]
+	ldrb	r3, [r5, #2]	@ zero_extendqisi2
+	str	r3, [r0]
+	ldrb	r3, [r5, #3]	@ zero_extendqisi2
+	str	r3, [r0]
+	bl	nandc_wait_flash_ready
+	movs	r3, #19
+	str	r6, [r4, #8]
+	str	r3, [r4, #4]
+	ldrb	r3, [r5, #4]	@ zero_extendqisi2
+	str	r3, [r4]
+	ldrb	r3, [r5, #5]	@ zero_extendqisi2
+	str	r3, [r4]
+	ldrb	r3, [r5, #6]	@ zero_extendqisi2
+	str	r3, [r4]
+	movs	r3, #0
+	str	r3, [r4]
+.L386:
+	pop	{r4, r5, r6, lr}
+	b	nandc_wait_flash_ready
+.L385:
+	movs	r3, #20
+	str	r3, [r0, #4]
+	ldr	r3, .L387+4
+	ldrb	r3, [r3, r1]	@ zero_extendqisi2
+	str	r3, [r0]
+	str	r2, [r0]
+	str	r2, [r0]
+	str	r2, [r0]
+	b	.L386
+.L388:
 	.align	2
-.L310:
-	.word	.LANCHOR29
-	.size	nandc_randomizer_enable, .-nandc_randomizer_enable
-	.section	.text.nandc_get_chip_if,"ax",%progbits
+.L387:
+	.word	.LANCHOR36
+	.word	.LANCHOR37
+	.size	toshiba_tlc_set_rr_para, .-toshiba_tlc_set_rr_para
+	.section	.text.flash_erase_duplane_block,"ax",%progbits
 	.align	1
-	.global	nandc_get_chip_if
+	.global	flash_erase_duplane_block
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	nandc_get_chip_if, %function
-nandc_get_chip_if:
+	.type	flash_erase_duplane_block, %function
+flash_erase_duplane_block:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L313
-	adds	r0, r0, #8
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r8, r3
+	ldr	r3, .L403
+	mov	r4, r0
+	mov	r5, r1
+	mov	r6, r2
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r0
+	bhi	.L390
+	mov	r2, #588
+	ldr	r1, .L403+4
+	ldr	r0, .L403+8
+	bl	printf
+.L390:
+	ldr	r3, .L403+12
+	ldrb	r4, [r3, r4]	@ zero_extendqisi2
+	ldr	r3, .L403+16
+	add	r7, r4, #8
+	ldr	r10, [r3]
+	ldr	r3, .L403+20
 	ldr	r3, [r3]
-	add	r0, r3, r0, lsl #8
-	bx	lr
-.L314:
+	add	r7, r10, r7, lsl #8
+	lsls	r3, r3, #27
+	bpl	.L391
+	mov	r3, r8
+	mov	r2, r6
+	mov	r1, r4
+	ldr	r0, .L403+24
+	bl	printf
+.L391:
+	bl	nandc_wait_flash_ready
+	mov	r0, r4
+	bl	nandc_cs
+	mov	r0, r4
+	cmp	r5, #0
+	bne	.L392
+	bl	zftl_flash_enter_slc_mode
+.L393:
+	lsls	r4, r4, #8
+	movs	r3, #96
+	add	r5, r10, r4
+	str	r3, [r5, #2056]
+	uxtb	r3, r6
+	str	r3, [r5, #2052]
+	lsrs	r3, r6, #8
+	str	r3, [r5, #2052]
+	lsrs	r3, r6, #16
+	str	r3, [r5, #2052]
+	ldr	r3, .L403+28
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L396
+	movs	r3, #208
+	str	r3, [r5, #2056]
+	bl	nandc_wait_flash_ready
+	mov	r0, r7
+	bl	flash_read_status
+	and	fp, r0, #5
+.L394:
+	add	r1, r10, r4
+	movs	r3, #96
+	str	r3, [r1, #2056]
+	uxtb	r3, r8
+	str	r3, [r5, #2052]
+	lsr	r3, r8, #8
+	str	r3, [r5, #2052]
+	lsr	r3, r8, #16
+	str	r3, [r5, #2052]
+	movs	r3, #208
+	str	r3, [r1, #2056]
+	bl	nandc_wait_flash_ready
+	mov	r0, r7
+	bl	flash_read_status
+	bl	nandc_de_cs.constprop.29
+	and	r3, r0, #5
+	orrs	fp, r3, fp
+	beq	.L395
+	mov	r2, r0
+	mov	r1, r6
+	ldr	r0, .L403+32
+	bl	printf
+.L395:
+	mov	r0, fp
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L392:
+	bl	zftl_flash_exit_slc_mode
+	b	.L393
+.L396:
+	mov	fp, #0
+	b	.L394
+.L404:
 	.align	2
-.L313:
-	.word	.LANCHOR6
-	.size	nandc_get_chip_if, .-nandc_get_chip_if
-	.section	.text.buf_reinit,"ax",%progbits
+.L403:
+	.word	.LANCHOR18
+	.word	.LANCHOR38
+	.word	.LC0
+	.word	.LANCHOR30
+	.word	.LANCHOR13
+	.word	.LANCHOR14
+	.word	.LC32
+	.word	.LANCHOR39
+	.word	.LC33
+	.size	flash_erase_duplane_block, .-flash_erase_duplane_block
+	.section	.text.flash_erase_block_en,"ax",%progbits
 	.align	1
-	.global	buf_reinit
+	.global	flash_erase_block_en
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	buf_reinit, %function
-buf_reinit:
+	.type	flash_erase_block_en, %function
+flash_erase_block_en:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L318
-	movs	r2, #0
-	push	{r4, r5, lr}
-	mov	r1, r2
-	mov	r4, r3
-.L316:
-	uxtb	r0, r2
-	adds	r2, r2, #1
-	cmp	r2, #32
-	strb	r1, [r3, #2]
-	add	r5, r0, #1
-	strb	r0, [r3, #1]
-	strb	r5, [r3]
-	add	r3, r3, #48
-	str	r1, [r3, #-40]
-	bne	.L316
-	movs	r3, #255
-	strb	r3, [r4, #1488]
-	ldr	r3, .L318+4
-	strb	r1, [r3]
-	ldr	r3, .L318+8
-	strb	r2, [r3]
-	pop	{r4, r5, pc}
-.L319:
+	ldr	r3, .L417
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r7, r0
+	mov	fp, r1
+	mov	r6, r2
+	ubfx	r8, r2, #0, #21
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r0
+	bhi	.L406
+	movw	r2, #633
+	ldr	r1, .L417+4
+	ldr	r0, .L417+8
+	bl	printf
+.L406:
+	ldr	r3, .L417+12
+	ldrb	r5, [r3, r7]	@ zero_extendqisi2
+	ldr	r3, .L417+16
+	add	r10, r5, #8
+	ldr	r4, [r3]
+	ldr	r3, .L417+20
+	ldr	r3, [r3]
+	add	r10, r4, r10, lsl #8
+	lsls	r3, r3, #27
+	bpl	.L407
+	mov	r3, fp
+	mov	r2, r6
+	mov	r1, r5
+	ldr	r0, .L417+24
+	bl	printf
+.L407:
+	bl	nandc_wait_flash_ready
+	mov	r0, r5
+	bl	nandc_cs
+	mov	r0, r5
+	cmp	fp, #0
+	bne	.L408
+	bl	zftl_flash_enter_slc_mode
+.L409:
+	add	r0, r4, r5, lsl #8
+	movs	r3, #96
+	str	r3, [r0, #2056]
+	uxtb	r3, r6
+	str	r3, [r0, #2052]
+	lsr	r3, r8, #8
+	str	r3, [r0, #2052]
+	lsr	r3, r8, #16
+	str	r3, [r0, #2052]
+	movs	r3, #208
+	str	r3, [r0, #2056]
+	bl	nandc_wait_flash_ready
+	mov	r0, r10
+	bl	flash_read_status
+	bl	nandc_de_cs.constprop.29
+	ands	r4, r0, #5
+	beq	.L410
+	ldr	r3, .L417+28
+	mov	r0, r6
+	ldrh	r1, [r3]
+	bl	__aeabi_uidiv
+	mov	r3, r4
+	mov	r2, r0
+	mov	r1, r7
+	ldr	r0, .L417+32
+	bl	printf
+.L410:
+	mov	r0, r4
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L408:
+	bl	zftl_flash_exit_slc_mode
+	b	.L409
+.L418:
 	.align	2
-.L318:
-	.word	.LANCHOR36
-	.word	.LANCHOR37
-	.word	.LANCHOR38
-	.size	buf_reinit, .-buf_reinit
-	.section	.text.buf_add_tail,"ax",%progbits
+.L417:
+	.word	.LANCHOR18
+	.word	.LANCHOR40
+	.word	.LC0
+	.word	.LANCHOR30
+	.word	.LANCHOR13
+	.word	.LANCHOR14
+	.word	.LC34
+	.word	.LANCHOR2
+	.word	.LC35
+	.size	flash_erase_block_en, .-flash_erase_block_en
+	.section	.text.flash_erase_block,"ax",%progbits
 	.align	1
-	.global	buf_add_tail
+	.global	flash_erase_block
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	buf_add_tail, %function
-buf_add_tail:
+	.type	flash_erase_block, %function
+flash_erase_block:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	movs	r3, #255
-	push	{r4, lr}
-	strb	r3, [r1]
-	ldrb	r2, [r0]	@ zero_extendqisi2
-	cmp	r2, r3
-	bne	.L321
-	ldrb	r3, [r1, #1]	@ zero_extendqisi2
-	cmp	r3, #255
-	bne	.L322
-	movs	r2, #74
-	ldr	r1, .L329
-	ldr	r0, .L329+4
-	bl	printf
-.L323:
-	b	.L323
-.L322:
-	strb	r3, [r0]
-	pop	{r4, pc}
-.L325:
-	muls	r3, r0, r3
-	strb	r2, [r4, r3]
-	pop	{r4, pc}
-.L321:
-	ldr	r4, .L329+8
-	movs	r3, #48
-.L328:
-	mov	r0, r2
-	muls	r2, r3, r2
-	ldrb	r2, [r4, r2]	@ zero_extendqisi2
-	cmp	r2, #255
-	bne	.L328
-	ldrb	r2, [r1, #1]	@ zero_extendqisi2
-	cmp	r2, #255
-	bne	.L325
-	movs	r2, #81
-	ldr	r1, .L329
-	ldr	r0, .L329+4
-	bl	printf
-.L326:
-	b	.L326
-.L330:
-	.align	2
-.L329:
-	.word	.LANCHOR39
-	.word	.LC0
-	.word	.LANCHOR36
-	.size	buf_add_tail, .-buf_add_tail
-	.section	.text.buf_free,"ax",%progbits
+	@ link register save eliminated.
+	mov	r2, r1
+	movs	r1, #0
+	b	flash_erase_block_en
+	.size	flash_erase_block, .-flash_erase_block
+	.section	.text.flash_erase_all,"ax",%progbits
 	.align	1
-	.global	buf_free
+	.global	flash_erase_all
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	buf_free, %function
-buf_free:
+	.type	flash_erase_all, %function
+flash_erase_all:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	mov	r1, r0
-	ldrb	r3, [r0, #2]	@ zero_extendqisi2
-	and	r3, r3, #8
-	strb	r3, [r0, #2]
-	cbz	r3, .L332
-	ldr	r0, .L334
-	bl	buf_add_tail
-.L333:
-	ldr	r2, .L334+4
-	ldrb	r3, [r2]	@ zero_extendqisi2
-	adds	r3, r3, #1
-	strb	r3, [r2]
-	pop	{r3, pc}
-.L332:
-	ldr	r3, .L334
+	ldr	r3, .L425
+	push	{r4, r5, r6, r7, r8, lr}
+	movs	r5, #0
+	ldr	r7, .L425+4
+	ldrb	r4, [r3, #13]	@ zero_extendqisi2
+	ldrh	r3, [r3, #14]
+	smulbb	r4, r4, r3
+	uxth	r4, r4
+.L421:
+	ldr	r3, .L425+8
 	ldrb	r2, [r3]	@ zero_extendqisi2
-	strb	r2, [r0]
-	ldrb	r2, [r0, #1]	@ zero_extendqisi2
-	strb	r2, [r3]
-	b	.L333
-.L335:
+	uxth	r3, r5
+	cmp	r2, r3
+	bhi	.L424
+	movs	r1, #0
+	ldr	r0, .L425+12
+	pop	{r4, r5, r6, r7, r8, lr}
+	b	printf
+.L424:
+	ldr	r2, .L425+16
+	uxth	r3, r5
+	movs	r6, #0
+	ldrb	r8, [r2, r3]	@ zero_extendqisi2
+.L422:
+	uxth	r3, r6
+	cmp	r4, r3
+	bhi	.L423
+	adds	r5, r5, #1
+	b	.L421
+.L423:
+	ldrh	r1, [r7]
+	mov	r0, r8
+	muls	r1, r6, r1
+	adds	r6, r6, #1
+	bl	flash_erase_block
+	b	.L422
+.L426:
 	.align	2
-.L334:
-	.word	.LANCHOR37
-	.word	.LANCHOR38
-	.size	buf_free, .-buf_free
-	.section	.text.buf_alloc,"ax",%progbits
+.L425:
+	.word	.LANCHOR31
+	.word	.LANCHOR2
+	.word	.LANCHOR18
+	.word	.LC36
+	.word	.LANCHOR30
+	.size	flash_erase_all, .-flash_erase_all
+	.section	.text.flash_start_plane_read,"ax",%progbits
 	.align	1
-	.global	buf_alloc
+	.global	flash_start_plane_read
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	buf_alloc, %function
-buf_alloc:
+	.type	flash_start_plane_read, %function
+flash_start_plane_read:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	mov	r2, r0
-	ldr	r7, .L342
-	ldrb	r1, [r7]	@ zero_extendqisi2
-	cbnz	r1, .L337
-	movs	r2, #121
-	ldr	r1, .L342+4
-	ldr	r0, .L342+8
-	bl	printf
-.L338:
-	b	.L338
-.L337:
-	ldr	r5, .L342+12
-	ldr	r3, .L342+16
-	ldrb	r6, [r5]	@ zero_extendqisi2
-	add	r0, r6, r6, lsl #1
-	add	r0, r3, r0, lsl #4
-	cbnz	r2, .L339
-	cmp	r1, #1
-	beq	.L341
-.L339:
-	movs	r2, #48
-	subs	r1, r1, #1
-	muls	r2, r6, r2
-	strb	r1, [r7]
-	movs	r1, #1
-	adds	r4, r3, r2
-	ldrb	r6, [r3, r2]	@ zero_extendqisi2
-	strb	r1, [r4, #2]
-	movs	r1, #255
-	strb	r1, [r3, r2]
-	mov	r3, #-1
-	str	r3, [r4, #20]
+	ldr	r3, .L446
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	ubfx	r4, r0, #21, #3
+	ubfx	r6, r0, #0, #21
+	ubfx	r5, r1, #0, #21
+	ubfx	r7, r0, #24, #2
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r4
+	bhi	.L428
+	mov	r2, #940
+	ldr	r1, .L446+4
+	ldr	r0, .L446+8
+	bl	printf
+.L428:
+	ldr	r3, .L446+12
+	ldr	fp, .L446+28
+	ldrb	r4, [r3, r4]	@ zero_extendqisi2
+	ldr	r3, .L446+16
+	mov	r0, r4
+	ldr	r8, [r3]
+	lsl	r10, r4, #8
+	bl	nandc_cs
+	cmp	r7, #0
+	bne	.L429
+	mov	r0, r6
+	bl	slc_phy_page_address_calc
+	mov	r6, r0
+	mov	r0, r5
+	bl	slc_phy_page_address_calc
+	ldr	r3, .L446+20
+	mov	r5, r0
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L430
+	mov	r0, r4
+	bl	zftl_flash_enter_slc_mode
+.L430:
+	ldr	r3, .L446+24
+	ldrb	r2, [r3, #16]	@ zero_extendqisi2
+	mov	r0, r3
+	ldrb	r1, [r3, #8]	@ zero_extendqisi2
+	cmp	r2, #1
+	uxtb	r2, r6
+	bne	.L432
+	add	r4, r8, r10
+	ldrb	r3, [r3, #9]	@ zero_extendqisi2
+	str	r1, [r4, #2056]
+	movs	r1, #0
+	str	r1, [r4, #2052]
+	str	r1, [r4, #2052]
+	str	r2, [r4, #2052]
+	lsrs	r2, r6, #8
+	lsrs	r6, r6, #16
+	str	r2, [r4, #2052]
+	str	r6, [r4, #2052]
+	str	r3, [r4, #2056]
+	bl	nandc_wait_flash_ready
+	ldr	r3, [fp]
+	ldrb	r3, [r3, #12]	@ zero_extendqisi2
+	cmp	r3, #3
+	bne	.L433
+	cbz	r7, .L433
+	str	r7, [r4, #2056]
+.L433:
 	movs	r3, #0
-	strb	r6, [r5]
-	strh	r3, [r4, #34]	@ movhi
-	str	r3, [r4, #8]
-	pop	{r3, r4, r5, r6, r7, pc}
-.L341:
-	mov	r0, r2
-	pop	{r3, r4, r5, r6, r7, pc}
-.L343:
+	add	r8, r8, r10
+	str	r3, [r8, #2056]
+	str	r3, [r4, #2052]
+	str	r3, [r4, #2052]
+	uxtb	r3, r5
+	str	r3, [r4, #2052]
+	lsrs	r3, r5, #8
+	lsrs	r5, r5, #16
+	str	r3, [r4, #2052]
+	str	r5, [r4, #2052]
+.L445:
+	movs	r3, #48
+	str	r3, [r8, #2056]
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	nandc_de_cs.constprop.29
+.L429:
+	ldr	r3, [fp]
+	ldrb	r3, [r3, #12]	@ zero_extendqisi2
+	cmp	r3, #3
+	bne	.L431
+	add	r3, r8, r10
+	str	r7, [r3, #2056]
+	b	.L430
+.L431:
+	mov	r0, r4
+	bl	zftl_flash_exit_slc_mode
+	b	.L430
+.L432:
+	add	r3, r8, r10
+	str	r1, [r3, #2056]
+	str	r2, [r3, #2052]
+	lsrs	r2, r6, #8
+	lsrs	r6, r6, #16
+	str	r2, [r3, #2052]
+	ldr	r2, [fp]
+	str	r6, [r3, #2052]
+	ldrb	r2, [r2, #12]	@ zero_extendqisi2
+	cmp	r2, #3
+	bne	.L435
+	cbz	r7, .L435
+	str	r7, [r3, #2056]
+.L435:
+	ldrb	r2, [r0, #9]	@ zero_extendqisi2
+	add	r8, r8, r10
+	str	r2, [r8, #2056]
+	uxtb	r2, r5
+	str	r2, [r3, #2052]
+	lsrs	r2, r5, #8
+	lsrs	r5, r5, #16
+	str	r2, [r3, #2052]
+	str	r5, [r3, #2052]
+	b	.L445
+.L447:
 	.align	2
-.L342:
-	.word	.LANCHOR38
-	.word	.LANCHOR40
+.L446:
+	.word	.LANCHOR18
+	.word	.LANCHOR41
 	.word	.LC0
-	.word	.LANCHOR37
-	.word	.LANCHOR36
-	.size	buf_alloc, .-buf_alloc
-	.section	.text.buf_remove_buf,"ax",%progbits
+	.word	.LANCHOR30
+	.word	.LANCHOR13
+	.word	.LANCHOR0
+	.word	.LANCHOR20
+	.word	.LANCHOR16
+	.size	flash_start_plane_read, .-flash_start_plane_read
+	.section	.text.flash_set_interface_mode,"ax",%progbits
 	.align	1
-	.global	buf_remove_buf
+	.global	flash_set_interface_mode
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	buf_remove_buf, %function
-buf_remove_buf:
+	.type	flash_set_interface_mode, %function
+flash_set_interface_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, lr}
-	ldrb	r4, [r1, #1]	@ zero_extendqisi2
-	ldrb	r3, [r0]	@ zero_extendqisi2
-	cmp	r4, r3
-	bne	.L345
-	ldrb	r3, [r1]	@ zero_extendqisi2
-	strb	r3, [r0]
-.L350:
-	movs	r0, #1
-	pop	{r4, r5, pc}
-.L348:
-	mov	r5, r3
-	muls	r3, r2, r3
-	ldrb	r3, [r0, r3]	@ zero_extendqisi2
-	cmp	r4, r3
-	bne	.L347
-	muls	r2, r5, r2
-	ldrb	r3, [r1]	@ zero_extendqisi2
-	strb	r3, [r0, r2]
-	movs	r3, #255
-	strb	r3, [r1]
-	b	.L350
-.L345:
-	ldr	r0, .L351
-	movs	r2, #48
-.L347:
-	cmp	r3, #255
-	bne	.L348
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	mov	r6, r0
+	ldr	r7, .L491
+	mov	r10, #0
+	ldr	r8, .L491+24
+.L462:
+	ldrb	r5, [r7, r10, lsl #3]	@ zero_extendqisi2
+	cmp	r5, #69
+	beq	.L449
+	cmp	r5, #44
+	beq	.L449
+	add	r3, r5, #119
+	uxtb	r3, r3
+	cmp	r3, #18
+	bhi	.L450
+	ldr	r2, .L491+4
+	lsr	r3, r2, r3
+	lsls	r2, r3, #31
+	bpl	.L450
+.L449:
+	ldr	r3, .L491+8
+	cmp	r6, #1
+	ldr	r4, [r8]
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	bne	.L451
+	lsls	r3, r1, #31
+	bpl	.L450
+	ldr	r3, .L491+12
+	ldr	r3, [r3]
+	lsls	r0, r3, #19
+	bpl	.L452
+	ldr	r0, .L491+16
+	bl	printf
+.L452:
+	lsl	r3, r10, #8
+	cmp	r5, #44
+	mov	r1, #239
+	add	r2, r4, r3
+	str	r1, [r2, #2056]
+	beq	.L453
+	cmp	r5, #137
+	bne	.L454
+.L453:
+	movs	r1, #1
+	adds	r2, r4, r3
+	str	r1, [r2, #2052]
+	movs	r1, #5
+.L488:
+	add	r4, r4, r3
+	str	r1, [r2, #2048]
+.L490:
+	movs	r3, #0
+	str	r3, [r4, #2048]
+	str	r3, [r4, #2048]
+	str	r3, [r4, #2048]
+.L450:
+	add	r10, r10, #1
+	cmp	r10, #4
+	bne	.L462
+	bl	nandc_wait_flash_ready
 	movs	r0, #0
-	pop	{r4, r5, pc}
-.L352:
-	.align	2
-.L351:
-	.word	.LANCHOR36
-	.size	buf_remove_buf, .-buf_remove_buf
-	.section	.text.buf_remove_free,"ax",%progbits
-	.align	1
-	.global	buf_remove_free
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	buf_remove_free, %function
-buf_remove_free:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	mov	r4, r0
-	ldr	r5, .L357
-	ldrb	r3, [r5]	@ zero_extendqisi2
-	cbnz	r3, .L354
-	movs	r2, #170
-	ldr	r1, .L357+4
-	ldr	r0, .L357+8
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L454:
+	cmp	r5, #155
+	itett	eq
+	moveq	r1, #1
+	movne	r1, #128
+	streq	r1, [r2, #2052]
+	moveq	r1, #3
+	itt	ne
+	strne	r1, [r2, #2052]
+	movne	r1, #1
+	b	.L488
+.L451:
+	lsls	r2, r1, #29
+	bpl	.L450
+	ldr	r3, .L491+12
+	ldr	r3, [r3]
+	lsls	r3, r3, #19
+	bpl	.L457
+	ldr	r0, .L491+20
 	bl	printf
-.L355:
-	b	.L355
-.L354:
-	mov	r1, r0
-	ldr	r0, .L357+12
-	bl	buf_remove_buf
-	cmp	r0, #1
-	bne	.L353
-	ldrb	r3, [r5]	@ zero_extendqisi2
-	subs	r3, r3, #1
-	strb	r3, [r5]
-	ldrb	r3, [r4, #2]	@ zero_extendqisi2
-	orr	r3, r3, #1
-	strb	r3, [r4, #2]
-.L353:
-	pop	{r3, r4, r5, pc}
-.L358:
+.L457:
+	lsl	r2, r10, #8
+	cmp	r5, #44
+	mov	r1, #239
+	add	r3, r4, r2
+	str	r1, [r3, #2056]
+	beq	.L458
+	cmp	r5, #137
+	bne	.L459
+.L458:
+	movs	r1, #1
+	adds	r3, r4, r2
+	str	r1, [r3, #2052]
+	movs	r1, #35
+.L489:
+	str	r1, [r3, #2048]
+	add	r4, r4, r2
+	b	.L490
+.L459:
+	cmp	r5, #155
+	itett	eq
+	moveq	r1, #1
+	movne	r1, #128
+	streq	r1, [r3, #2052]
+	moveq	r1, #37
+	itt	ne
+	strne	r1, [r3, #2052]
+	movne	r1, #0
+	b	.L489
+.L492:
 	.align	2
-.L357:
-	.word	.LANCHOR38
-	.word	.LANCHOR41
-	.word	.LC0
-	.word	.LANCHOR37
-	.size	buf_remove_free, .-buf_remove_free
-	.section	.text.flash_check_bad_block,"ax",%progbits
+.L491:
+	.word	.LANCHOR42
+	.word	294913
+	.word	.LANCHOR43
+	.word	.LANCHOR14
+	.word	.LC37
+	.word	.LC38
+	.word	.LANCHOR13
+	.size	flash_set_interface_mode, .-flash_set_interface_mode
+	.section	.text.flash_reset,"ax",%progbits
 	.align	1
-	.global	flash_check_bad_block
+	.global	flash_reset
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_check_bad_block, %function
-flash_check_bad_block:
+	.type	flash_reset, %function
+flash_reset:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L360
-	push	{r4, lr}
-	lsrs	r4, r1, #5
-	and	r1, r1, #31
-	ldrb	r3, [r2, #13]	@ zero_extendqisi2
-	ldrh	r2, [r2, #14]
-	smulbb	r3, r3, r2
-	ldr	r2, .L360+4
-	uxth	r3, r3
-	ldr	r2, [r2]
-	adds	r3, r3, #31
-	asrs	r3, r3, #5
-	add	r2, r2, r4, lsl #2
-	lsls	r3, r3, #2
-	uxth	r3, r3
-	mla	r0, r0, r3, r2
-	ldr	r0, [r0, #912]
-	lsrs	r0, r0, r1
-	and	r0, r0, #1
-	pop	{r4, pc}
-.L361:
+	@ link register save eliminated.
+	ldr	r3, .L494
+	ldr	r3, [r3]
+	add	r0, r3, r0, lsl #8
+	movs	r3, #255
+	str	r3, [r0, #2056]
+	b	nandc_wait_flash_ready
+.L495:
 	.align	2
-.L360:
-	.word	.LANCHOR19
-	.word	.LANCHOR5
-	.size	flash_check_bad_block, .-flash_check_bad_block
-	.section	.text.flash_mask_bad_block,"ax",%progbits
+.L494:
+	.word	.LANCHOR13
+	.size	flash_reset, .-flash_reset
+	.section	.text.flash_read_id,"ax",%progbits
 	.align	1
-	.global	flash_mask_bad_block
+	.global	flash_read_id
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_mask_bad_block, %function
-flash_mask_bad_block:
+	.type	flash_read_id, %function
+flash_read_id:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L363
-	mov	r2, r1
-	push	{r4, r5, r6, lr}
+	push	{r0, r1, r2, r3, r4, r5, r6, lr}
 	mov	r5, r0
-	mov	r6, r1
-	mov	r1, r0
-	ldrb	r4, [r3, #13]	@ zero_extendqisi2
-	ldrh	r3, [r3, #14]
-	ldr	r0, .L363+4
-	smulbb	r4, r4, r3
+	ldr	r3, .L498
+	mov	r4, r1
+	ldr	r6, [r3]
+	bl	flash_reset
+	mov	r0, r5
+	bl	nandc_cs
+	add	r6, r6, r5, lsl #8
+	movs	r3, #144
+	movs	r0, #200
+	str	r3, [r6, #2056]
+	movs	r3, #0
+	str	r3, [r6, #2052]
+	bl	timer_delay_ns
+	ldr	r3, [r6, #2048]
+	strb	r3, [r4]
+	ldr	r3, [r6, #2048]
+	strb	r3, [r4, #1]
+	ldr	r3, [r6, #2048]
+	strb	r3, [r4, #2]
+	ldr	r3, [r6, #2048]
+	strb	r3, [r4, #3]
+	ldr	r3, [r6, #2048]
+	strb	r3, [r4, #4]
+	ldr	r3, [r6, #2048]
+	strb	r3, [r4, #5]
+	ldr	r3, [r6, #2048]
+	strb	r3, [r4, #6]
+	ldr	r3, [r6, #2048]
+	strb	r3, [r4, #7]
+	bl	nandc_de_cs.constprop.29
+	ldrb	r2, [r4]	@ zero_extendqisi2
+	subs	r3, r2, #1
+	uxtb	r3, r3
+	cmp	r3, #253
+	bhi	.L496
+	ldrb	r1, [r4, #5]	@ zero_extendqisi2
+	ldrb	r3, [r4, #1]	@ zero_extendqisi2
+	ldr	r0, .L498+4
+	str	r1, [sp, #12]
+	ldrb	r1, [r4, #4]	@ zero_extendqisi2
+	str	r1, [sp, #8]
+	ldrb	r1, [r4, #3]	@ zero_extendqisi2
+	str	r1, [sp, #4]
+	ldrb	r1, [r4, #2]	@ zero_extendqisi2
+	str	r1, [sp]
+	adds	r1, r5, #1
 	bl	printf
-	uxth	r4, r4
-	ldr	r3, .L363+8
-	add	r0, r4, #31
-	asrs	r0, r0, #5
-	ldr	r2, [r3]
-	movs	r3, #1
-	lsls	r0, r0, #2
-	uxth	r0, r0
-	muls	r0, r5, r0
-	lsrs	r5, r6, #5
-	and	r6, r6, #31
-	lsl	r6, r3, r6
-	add	r0, r0, #912
-	add	r0, r0, r5, lsl #2
-	ldr	r3, [r2, r0]
-	orrs	r3, r3, r6
-	str	r3, [r2, r0]
+.L496:
+	add	sp, sp, #16
+	@ sp needed
 	pop	{r4, r5, r6, pc}
-.L364:
+.L499:
 	.align	2
-.L363:
-	.word	.LANCHOR19
-	.word	.LC6
-	.word	.LANCHOR5
-	.size	flash_mask_bad_block, .-flash_mask_bad_block
-	.section	.text.ftl_gc_write_buf,"ax",%progbits
+.L498:
+	.word	.LANCHOR13
+	.word	.LC39
+	.size	flash_read_id, .-flash_read_id
+	.section	.text.flash_read_spare,"ax",%progbits
 	.align	1
-	.global	ftl_gc_write_buf
+	.global	flash_read_spare
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_gc_write_buf, %function
-ftl_gc_write_buf:
+	.type	flash_read_spare, %function
+flash_read_spare:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	mov	r1, r0
-	ldrb	r3, [r0, #2]	@ zero_extendqisi2
-	orr	r3, r3, #2
-	strb	r3, [r0, #2]
-	ldr	r0, .L366
-	bl	buf_add_tail
-	ldr	r3, .L366+4
-	ldrb	r0, [r3]	@ zero_extendqisi2
-	adds	r0, r0, #1
-	uxtb	r0, r0
-	strb	r0, [r3]
-	pop	{r3, pc}
-.L367:
+	push	{r3, r4, r5, lr}
+	mov	r5, r2
+	ldr	r3, .L501
+	ldr	r2, .L501+4
+	ldrb	r3, [r3, #9]	@ zero_extendqisi2
+	ldr	r4, [r2]
+	movs	r2, #0
+	lsls	r3, r3, #9
+	add	r4, r4, r0, lsl #8
+	str	r2, [r4, #2056]
+	str	r3, [r4, #2052]
+	lsrs	r3, r3, #8
+	str	r3, [r4, #2052]
+	uxtb	r3, r1
+	str	r3, [r4, #2052]
+	lsrs	r3, r1, #8
+	lsrs	r1, r1, #16
+	str	r3, [r4, #2052]
+	movs	r3, #48
+	str	r1, [r4, #2052]
+	str	r3, [r4, #2056]
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r4, #2048]
+	strb	r3, [r5]
+	pop	{r3, r4, r5, pc}
+.L502:
 	.align	2
-.L366:
-	.word	.LANCHOR42
-	.word	.LANCHOR43
-	.size	ftl_gc_write_buf, .-ftl_gc_write_buf
-	.section	.text.ftl_write_buf,"ax",%progbits
+.L501:
+	.word	.LANCHOR31
+	.word	.LANCHOR13
+	.size	flash_read_spare, .-flash_read_spare
+	.section	.text.flash_read_otp_data,"ax",%progbits
 	.align	1
-	.global	ftl_write_buf
+	.global	flash_read_otp_data
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_write_buf, %function
-ftl_write_buf:
+	.type	flash_read_otp_data, %function
+flash_read_otp_data:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	mov	r4, r0
-	cbnz	r0, .L369
-	movw	r2, #539
-	ldr	r1, .L375
-	ldr	r0, .L375+4
+	ldr	r3, .L506
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r8, r0
+	lsl	r8, r8, #8
+	mov	r6, r1
+	mov	r5, r2
+	ldr	r7, [r3]
+	mov	fp, #144
+	bl	nandc_cs
+	movs	r3, #239
+	movs	r0, #50
+	add	r4, r7, r8
+	mov	r10, #0
+	str	r3, [r4, #2056]
+	str	fp, [r4, #2052]
+	bl	timer_delay_ns
+	movs	r3, #1
+	str	r3, [r4, #2048]
+	str	r10, [r4, #2048]
+	str	r10, [r4, #2048]
+	str	r10, [r4, #2048]
+	bl	nandc_wait_flash_ready
+	movs	r3, #238
+	ldr	r0, .L506+4
+	str	r3, [r4, #2056]
+	str	fp, [r4, #2052]
+	ldr	r2, [r4, #2048]
+	ldr	r3, [r4, #2048]
+	ldr	r1, [r4, #2048]
+	str	r1, [sp]
+	mov	r1, r6
 	bl	printf
-.L370:
-	b	.L370
-.L369:
-	ldr	r2, .L375+8
-	ldrb	r3, [r0, #40]	@ zero_extendqisi2
-	ldrb	r2, [r2]	@ zero_extendqisi2
+	bl	nandc_wait_flash_ready
+	uxtb	r3, r6
+	str	r10, [r4, #2056]
+	str	r10, [r4, #2052]
+	str	r10, [r4, #2052]
+	str	r3, [r4, #2052]
+	lsrs	r3, r6, #8
+	lsrs	r6, r6, #16
+	str	r3, [r4, #2052]
+	movs	r3, #48
+	str	r6, [r4, #2052]
+	str	r3, [r4, #2056]
+	bl	nandc_wait_flash_ready
+	add	r3, r5, #16384
+	mov	r2, r5
+.L504:
+	ldr	r1, [r4, #2048]
+	strb	r1, [r2], #1
 	cmp	r2, r3
-	bcs	.L371
-	mov	r2, #544
-	ldr	r1, .L375
-	ldr	r0, .L375+4
-	bl	printf
-.L372:
-	b	.L372
-.L371:
-	ldr	r5, .L375+12
-	cbnz	r3, .L373
-	bl	buf_free
-	ldrb	r0, [r5]	@ zero_extendqisi2
-	pop	{r3, r4, r5, pc}
-.L373:
-	mov	r1, r0
-	ldr	r0, .L375+16
-	bl	buf_add_tail
-	ldr	r3, .L375+20
-	ldrb	r1, [r4, #40]	@ zero_extendqisi2
-	ldrb	r0, [r5]	@ zero_extendqisi2
+	bne	.L504
+	add	r7, r7, r8
+	movs	r3, #239
+	str	r3, [r7, #2056]
+	movs	r3, #144
+	str	r3, [r4, #2052]
+	movs	r0, #50
+	bl	timer_delay_ns
+	movs	r3, #0
+	str	r3, [r4, #2048]
+	str	r3, [r4, #2048]
+	str	r3, [r4, #2048]
+	str	r3, [r4, #2048]
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	nandc_de_cs.constprop.29
+.L507:
+	.align	2
+.L506:
+	.word	.LANCHOR13
+	.word	.LC40
+	.size	flash_read_otp_data, .-flash_read_otp_data
+	.section	.text.sandisk_prog_test_bad_block,"ax",%progbits
+	.align	1
+	.global	sandisk_prog_test_bad_block
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sandisk_prog_test_bad_block, %function
+sandisk_prog_test_bad_block:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	lsls	r0, r0, #8
+	ldr	r3, .L518
+	mov	r5, r1
+	ldr	r4, [r3]
+	ldr	r3, .L518+4
+	ldrb	r3, [r3, #29]	@ zero_extendqisi2
+	cbz	r3, .L509
+	adds	r2, r4, r0
+	str	r3, [r2, #2056]
+.L510:
+	add	r4, r4, r0
+	movs	r3, #128
+	str	r3, [r4, #2056]
+	movs	r3, #0
+	str	r3, [r4, #2052]
+	str	r3, [r4, #2052]
+	uxtb	r3, r5
+	str	r3, [r4, #2052]
+	lsrs	r3, r5, #8
+	str	r3, [r4, #2052]
+	lsrs	r3, r5, #16
+	str	r3, [r4, #2052]
+	movs	r3, #16
+	str	r3, [r4, #2056]
+	bl	nandc_wait_flash_ready
+	movs	r3, #112
+	movs	r0, #80
+	str	r3, [r4, #2056]
+	bl	timer_delay_ns
+	ldr	r2, [r4, #2048]
+	ands	r4, r2, #5
+	beq	.L508
+	ldr	r3, .L518+8
 	ldr	r3, [r3]
-	adds	r0, r0, #1
-	ldr	r2, [r3, #16]
-	uxtb	r0, r0
-	strb	r0, [r5]
-	add	r2, r2, r1
-	str	r2, [r3, #16]
-	ldr	r2, [r3, #32]
-	adds	r2, r2, #1
-	str	r2, [r3, #32]
+	lsls	r3, r3, #19
+	bpl	.L508
+	mov	r1, r5
+	ldr	r0, .L518+12
+	bl	printf
+.L508:
+	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L376:
+.L509:
+	adds	r3, r4, r0
+	movs	r2, #162
+	str	r2, [r3, #2056]
+	b	.L510
+.L519:
 	.align	2
-.L375:
-	.word	.LANCHOR44
-	.word	.LC0
-	.word	.LANCHOR45
-	.word	.LANCHOR43
-	.word	.LANCHOR42
-	.word	.LANCHOR46
-	.size	ftl_write_buf, .-ftl_write_buf
-	.section	.text.ftl_cache_flush,"ax",%progbits
+.L518:
+	.word	.LANCHOR13
+	.word	.LANCHOR31
+	.word	.LANCHOR14
+	.word	.LC41
+	.size	sandisk_prog_test_bad_block, .-sandisk_prog_test_bad_block
+	.section	.text.nandc_rdy_status,"ax",%progbits
 	.align	1
-	.global	ftl_cache_flush
+	.global	nandc_rdy_status
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_cache_flush, %function
-ftl_cache_flush:
-	@ args = 0, pretend = 0, frame = 0
+	.type	nandc_rdy_status, %function
+nandc_rdy_status:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+	ldr	r3, .L521
+	sub	sp, sp, #8
+	ldr	r3, [r3]
+	ldr	r3, [r3]
+	str	r3, [sp, #4]
+	ldr	r0, [sp, #4]
+	ubfx	r0, r0, #9, #1
+	add	sp, sp, #8
+	@ sp needed
 	bx	lr
-	.size	ftl_cache_flush, .-ftl_cache_flush
-	.section	.text.ftl_read_buf,"ax",%progbits
+.L522:
+	.align	2
+.L521:
+	.word	.LANCHOR13
+	.size	nandc_rdy_status, .-nandc_rdy_status
+	.section	.text.nandc_bch_sel,"ax",%progbits
 	.align	1
-	.global	ftl_read_buf
+	.global	nandc_bch_sel
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_read_buf, %function
-ftl_read_buf:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	ldr	r3, .L389
-	ldr	r3, [r3]
-	cmp	r3, r0
-	bhi	.L379
-	movw	r2, #771
-	ldr	r1, .L389+4
-	ldr	r0, .L389+8
-	bl	printf
-.L380:
-	b	.L380
-.L379:
-	ldr	r3, .L389+12
-	movs	r4, #0
-	mov	r5, r3
-.L383:
-	ldr	r2, [r3, #20]
-	cmp	r0, r2
-	bne	.L381
-	ldrb	r2, [r3, #2]	@ zero_extendqisi2
-	tst	r2, #8
-	beq	.L381
-	movs	r3, #48
-	mla	r4, r3, r4, r5
-	orr	r3, r2, #4
-	strb	r3, [r4, #2]
-	lsls	r3, r2, #31
-	bmi	.L378
-	mov	r0, r4
-	bl	buf_remove_free
-.L378:
-	mov	r0, r4
-	pop	{r3, r4, r5, pc}
-.L381:
-	adds	r4, r4, #1
-	adds	r3, r3, #48
-	cmp	r4, #32
-	bne	.L383
-	ldr	r3, .L389+16
-	movs	r4, #0
-	ldr	r2, [r3]
-	adds	r2, r2, #1
-	ittt	eq
-	streq	r0, [r3]
-	ldreq	r3, .L389+20
-	streq	r1, [r3]
-	b	.L378
-.L390:
-	.align	2
-.L389:
-	.word	.LANCHOR47
-	.word	.LANCHOR48
-	.word	.LC0
-	.word	.LANCHOR36
-	.word	.LANCHOR49
-	.word	.LANCHOR50
-	.size	ftl_read_buf, .-ftl_read_buf
-	.section	.text.ftl_read_buf_free,"ax",%progbits
-	.align	1
-	.global	ftl_read_buf_free
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_read_buf_free, %function
-ftl_read_buf_free:
+	.type	nandc_bch_sel, %function
+nandc_bch_sel:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r1, .L537
+	movs	r2, #0
 	push	{r4, lr}
-	mov	r1, r0
-	mov	r4, r0
-	ldr	r0, .L395
-	bl	buf_remove_buf
-	ldrb	r3, [r4, #2]	@ zero_extendqisi2
-	lsls	r2, r3, #30
-	bpl	.L392
-	bic	r3, r3, #4
-	strb	r3, [r4, #2]
+	movs	r3, #1
+	strb	r0, [r1]
+	ldr	r1, .L537+4
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	cmp	r1, #9
+	ldr	r1, .L537+8
+	ldr	r1, [r1]
+	bne	.L524
+	cmp	r0, #70
+	str	r3, [r1, #16]
+	beq	.L525
+	cmp	r0, #60
+	beq	.L532
+	cmp	r0, #40
+	ite	eq
+	moveq	r2, #2
+	movne	r2, r3
+.L525:
+	lsls	r3, r2, #25
+	orr	r3, r3, #1
+	str	r3, [r1, #32]
 	pop	{r4, pc}
-.L392:
-	mov	r0, r4
-	pop	{r4, lr}
-	b	buf_free
-.L396:
+.L532:
+	movs	r2, #3
+	b	.L525
+.L524:
+	movs	r4, #16
+	str	r3, [r1, #8]
+	cmp	r0, r4
+	mov	r3, r2
+	bfi	r3, r4, #8, #8
+	bfi	r3, r2, #18, #1
+	bne	.L527
+.L530:
+	bfc	r3, #4, #1
+.L528:
+	orr	r3, r3, #1
+	str	r3, [r1, #12]
+	pop	{r4, pc}
+.L527:
+	cmp	r0, #24
+	bne	.L529
+	orr	r3, r3, #16
+	b	.L528
+.L529:
+	cmp	r0, #40
+	orr	r3, r3, #262144
+	orr	r3, r3, #16
+	bne	.L528
+	b	.L530
+.L538:
 	.align	2
-.L395:
-	.word	.LANCHOR51
-	.size	ftl_read_buf_free, .-ftl_read_buf_free
-	.section	.text.ftl_get_density,"ax",%progbits
+.L537:
+	.word	.LANCHOR44
+	.word	.LANCHOR28
+	.word	.LANCHOR13
+	.size	nandc_bch_sel, .-nandc_bch_sel
+	.section	.text.zftl_nandc_get_irq_status,"ax",%progbits
 	.align	1
-	.global	ftl_get_density
+	.global	zftl_nandc_get_irq_status
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_get_density, %function
-ftl_get_density:
+	.type	zftl_nandc_get_irq_status, %function
+zftl_nandc_get_irq_status:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	cbnz	r0, .L398
-	ldr	r3, .L401
-	ldr	r0, [r3]
-	bx	lr
-.L398:
-	cmp	r0, #4
-	ite	cc
-	movcc	r0, #8192
-	movcs	r0, #0
+	ldr	r3, .L542
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #9
+	ite	eq
+	ldreq	r0, [r0, #296]
+	ldrne	r0, [r0, #372]
 	bx	lr
-.L402:
+.L543:
 	.align	2
-.L401:
-	.word	.LANCHOR52
-	.size	ftl_get_density, .-ftl_get_density
-	.section	.text.gc_hook,"ax",%progbits
-	.align	1
-	.global	gc_hook
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	gc_hook, %function
-gc_hook:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	bx	lr
-	.size	gc_hook, .-gc_hook
-	.section	.text.FtlGetCurEraseBlock,"ax",%progbits
+.L542:
+	.word	.LANCHOR28
+	.size	zftl_nandc_get_irq_status, .-zftl_nandc_get_irq_status
+	.section	.text.rk_nandc_flash_ready,"ax",%progbits
 	.align	1
-	.global	FtlGetCurEraseBlock
+	.global	rk_nandc_flash_ready
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlGetCurEraseBlock, %function
-FtlGetCurEraseBlock:
+	.type	rk_nandc_flash_ready, %function
+rk_nandc_flash_ready:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L405
-	ldrh	r0, [r3]
 	bx	lr
-.L406:
-	.align	2
-.L405:
-	.word	.LANCHOR53
-	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
-	.section	.text.FtlGetAllBlockNum,"ax",%progbits
+	.size	rk_nandc_flash_ready, .-rk_nandc_flash_ready
+	.section	.text.nandc_iqr_wait_flash_ready,"ax",%progbits
 	.align	1
-	.global	FtlGetAllBlockNum
+	.global	nandc_iqr_wait_flash_ready
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlGetAllBlockNum, %function
-FtlGetAllBlockNum:
+	.type	nandc_iqr_wait_flash_ready, %function
+nandc_iqr_wait_flash_ready:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L408
-	ldrh	r0, [r3]
 	bx	lr
-.L409:
-	.align	2
-.L408:
-	.word	.LANCHOR54
-	.size	FtlGetAllBlockNum, .-FtlGetAllBlockNum
-	.section	.text.FtlLowFormat,"ax",%progbits
+	.size	nandc_iqr_wait_flash_ready, .-nandc_iqr_wait_flash_ready
+	.section	.text.rk_nandc_flash_xfer_completed,"ax",%progbits
 	.align	1
-	.global	FtlLowFormat
+	.global	rk_nandc_flash_xfer_completed
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlLowFormat, %function
-FtlLowFormat:
+	.type	rk_nandc_flash_xfer_completed, %function
+rk_nandc_flash_xfer_completed:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	movs	r0, #0
 	bx	lr
-	.size	FtlLowFormat, .-FtlLowFormat
-	.section	.text.gc_add_sblk,"ax",%progbits
-	.align	1
-	.global	gc_add_sblk
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	gc_add_sblk, %function
-gc_add_sblk:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L438
-	push	{r4, r5, r6, r7, r8, r10, lr}
-	mov	r5, r0
-	sub	sp, sp, #20
-	mov	r6, r1
-	mov	r7, r2
-	ldrh	r3, [r3]
-	cmp	r3, r0
-	bhi	.L412
-	movs	r2, #240
-	ldr	r1, .L438+4
-	ldr	r0, .L438+8
-	bl	printf
-.L413:
-	b	.L413
-.L412:
-	ldr	r3, .L438+12
-	lsl	r8, r0, #2
-	ldr	r10, .L438+36
-	ldr	r3, [r3]
-	ldrh	r4, [r3, r0, lsl #1]
-	ldr	r3, .L438+16
-	ldr	r3, [r3]
-	tst	r3, #256
-	beq	.L414
-	ldr	r2, .L438+20
-	ldr	r3, [r10]
-	ldrh	r2, [r2]
-	add	r3, r3, r8
-	ldrb	r3, [r3, #2]	@ zero_extendqisi2
-	str	r2, [sp, #8]
-	ldr	r2, .L438+24
-	lsrs	r3, r3, #5
-	ldrh	r2, [r2, #52]
-	str	r4, [sp]
-	str	r2, [sp, #4]
-	mov	r2, r1
-	mov	r1, r0
-	ldr	r0, .L438+28
-	bl	printf
-.L414:
-	ldr	r3, [r10]
-	add	r3, r3, r8
-	ldrb	r3, [r3, #2]	@ zero_extendqisi2
-	tst	r3, #224
-	bne	.L415
-	cmp	r4, #0
-	beq	.L429
-	movs	r2, #245
-	ldr	r1, .L438+4
-	ldr	r0, .L438+8
-	bl	printf
-.L417:
-	b	.L417
-.L415:
-	ldr	r3, .L438+24
-	ldrh	r2, [r3]
-	cmp	r2, r5
-	beq	.L429
-	ldr	r2, .L438+32
-	ldr	r2, [r2]
-	ldrh	r1, [r2, #48]
-	cmp	r1, r5
-	beq	.L429
-	ldrh	r1, [r2, #16]
-	cmp	r1, r5
-	beq	.L429
-	ldrh	r1, [r2, #80]
-	cmp	r1, r5
-	beq	.L429
-	ldrh	r0, [r3, #52]!
-	movs	r1, #0
-.L418:
-	cmp	r1, r0
-	bcc	.L419
-	add	r3, r2, r7, lsl #7
-	adds	r3, r3, #136
-	cbz	r6, .L420
-	add	r3, r2, #392
-.L420:
-	add	r0, r3, #128
-	movw	r4, #65535
-.L423:
-	mov	r1, r3
-	adds	r3, r3, #2
-	ldrh	ip, [r1]
-	cmp	ip, r4
-	bne	.L421
-	strh	r5, [r1]	@ movhi
-	cbz	r6, .L422
-	ldrh	r3, [r2, #124]
-	adds	r3, r3, #1
-	strh	r3, [r2, #124]	@ movhi
-.L437:
-	movs	r0, #1
-.L411:
-	add	sp, sp, #20
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L419:
-	ldrh	r4, [r3, #2]!
-	cmp	r4, r5
-	beq	.L429
-	adds	r1, r1, #1
-	b	.L418
-.L422:
-	add	r2, r2, r7, lsl #1
-	ldrh	r3, [r2, #120]
-	adds	r3, r3, #1
-	strh	r3, [r2, #120]	@ movhi
-	b	.L437
-.L421:
-	cmp	r0, r3
-	bne	.L423
-	b	.L437
-.L429:
-	movs	r0, #0
-	b	.L411
-.L439:
-	.align	2
-.L438:
-	.word	.LANCHOR54
-	.word	.LANCHOR55
-	.word	.LC0
-	.word	.LANCHOR56
-	.word	.LANCHOR22
-	.word	.LANCHOR58
-	.word	.LANCHOR59
-	.word	.LC7
-	.word	.LANCHOR60
-	.word	.LANCHOR57
-	.size	gc_add_sblk, .-gc_add_sblk
-	.section	.text.gc_get_src_ppa_from_index,"ax",%progbits
+	.size	rk_nandc_flash_xfer_completed, .-rk_nandc_flash_xfer_completed
+	.section	.text.nandc_xfer_start,"ax",%progbits
 	.align	1
-	.global	gc_get_src_ppa_from_index
+	.global	nandc_xfer_start
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	gc_get_src_ppa_from_index, %function
-gc_get_src_ppa_from_index:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L441
-	ldr	r3, [r3]
-	ldr	r0, [r3, r0, lsl #2]
-	bx	lr
-.L442:
-	.align	2
-.L441:
-	.word	.LANCHOR61
-	.size	gc_get_src_ppa_from_index, .-gc_get_src_ppa_from_index
-	.section	.text.gc_write_completed,"ax",%progbits
-	.align	1
-	.global	gc_write_completed
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	gc_write_completed, %function
-gc_write_completed:
-	@ args = 0, pretend = 0, frame = 8
+	.type	nandc_xfer_start, %function
+nandc_xfer_start:
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r6, .L465
-.L444:
-	ldr	r1, .L465+4
-	ldrb	r5, [r1]	@ zero_extendqisi2
-	cmp	r5, #255
-	bne	.L457
+	mov	r7, r0
+	ldr	r0, .L563
+	adds	r6, r1, #1
+	ldr	r5, .L563+4
+	ldrb	r0, [r0]	@ zero_extendqisi2
+	ldr	r10, .L563+24
+	cmp	r0, #9
+	bne	.L548
+	movs	r4, #0
+	movs	r1, #1
+	bfi	r4, r7, #1, #1
+	asrs	r6, r6, r1
+	orr	r4, r4, #8
+	bfi	r4, r1, #5, #2
+	ldr	r1, .L563+8
+	orr	r4, r4, #536870912
+	orr	r4, r4, #1024
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	bfc	r4, #4, #1
+	bfi	r4, r6, #22, #6
+	orr	r4, r4, #128
+	cbz	r1, .L549
+	ldr	r1, .L563+12
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	cbz	r1, .L549
+	orr	r4, r4, #512
+.L549:
+	add	r1, r2, #63
+	and	r6, r6, #63
+	bic	r1, r1, #63
+	bic	r0, r2, #63
+	add	r1, r1, r6, lsl #10
+	str	r2, [r5, #4]
+	str	r3, [r5, #8]
+	clz	r7, r7
+	str	r2, [r5, #12]
+	lsrs	r7, r7, #5
+	str	r3, [r5, #16]
+	bl	flush_dcache_range
+	ldr	r0, [r5, #8]
+	add	r1, r0, #63
+	bic	r0, r0, #63
+	bic	r1, r1, #63
+	add	r1, r1, r6, lsl #2
+	bl	flush_dcache_range
+	movs	r3, #1
+	ldr	r2, [r10]
+	str	r3, [r5, #20]
+	movs	r1, #16
+	ldr	r3, [r5, #12]
+	str	r3, [r2, #52]
+	ldr	r3, [r5, #16]
+	str	r3, [r2, #56]
+	ldr	r3, [r2, #48]
+	bfi	r3, r1, #9, #5
+	movs	r1, #2
+	orr	r3, r3, #448
+	bfi	r3, r1, #3, #3
+	ldr	r1, .L563+16
+	orr	r3, r3, #4
+	bfi	r3, r7, #1, #1
+	ldrh	r1, [r1]
+	orr	r3, r3, #1
+	bfi	r3, r1, #16, #11
+	str	r3, [r2, #48]
+	str	r4, [r2, #16]
+	orr	r4, r4, #4
+	str	r4, [r2, #16]
+.L547:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L457:
-	movs	r3, #48
-	muls	r3, r5, r3
-	adds	r2, r6, r3
-	ldrb	r3, [r6, r3]	@ zero_extendqisi2
-	ldrh	r4, [r2, #32]
-	strb	r3, [r1]
-	ldr	r1, [r2, #36]
-	cbz	r1, .L445
-	ldr	r3, .L465+8
+.L548:
+	ldr	r0, [r10]
+	movs	r4, #0
+	bfi	r4, r7, #1, #1
+	orr	r4, r4, #8
+	ldr	r8, [r0, #12]
+	movs	r0, #16
+	bfi	r8, r0, #8, #8
 	movs	r0, #1
-	ldr	r2, [r2, #24]
-	strh	r0, [r3, #314]	@ movhi
-	ldr	r0, .L465+12
-	str	r2, [r3, #316]
-	bl	printf
-	mov	r2, #502
-	ldr	r1, .L465+16
-	ldr	r0, .L465+20
-	bl	printf
-.L446:
-	b	.L446
-.L445:
-	ldr	fp, .L465+40
-	ldr	r10, .L465+44
-	ldrb	r3, [fp]	@ zero_extendqisi2
-	cmp	r3, #3
-	itett	eq
-	ldreq	r3, .L465+24
-	movne	r7, #1
-	ldreq	r3, [r3]
-	ldrbeq	r7, [r3, #89]	@ zero_extendqisi2
-	ldr	r3, .L465+28
-	ldr	r3, [r3]
-	it	eq
-	addeq	r7, r7, r7, lsl #1
-	tst	r3, #256
-	beq	.L448
-	movs	r3, #48
-	mov	r1, r4
-	mla	r3, r3, r5, r6
-	ldr	r0, .L465+32
-	ldrb	r2, [r3, #1]	@ zero_extendqisi2
-	ldr	r3, [r10]
-	ldrb	r3, [r3, r4]	@ zero_extendqisi2
-	str	r3, [sp]
-	mov	r3, r4
-	bl	printf
-.L448:
-	movs	r2, #48
-	ldr	r3, [r10]
-	mla	r5, r2, r5, r6
-	ldrb	r1, [r3, r4]	@ zero_extendqisi2
-	adds	r0, r3, r4
-	mov	r8, r4
-	ldrb	r3, [r5, #1]	@ zero_extendqisi2
-	cmp	r1, r3
-	beq	.L449
-	movw	r2, #509
-	ldr	r1, .L465+16
-	ldr	r0, .L465+20
-	bl	printf
-.L450:
-	b	.L450
-.L449:
-	ldrb	r3, [r5, #45]	@ zero_extendqisi2
-	cmp	r3, #3
-	beq	.L451
-	ldrb	r3, [fp]	@ zero_extendqisi2
-	cmp	r3, #3
-	bne	.L451
-	ldr	r3, .L465+36
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L451
-	mov	r4, r3
-.L452:
-	uxth	r1, r3
-	cmp	r7, r1
-	bls	.L444
-	ldrb	r1, [r0, r3]	@ zero_extendqisi2
-	adds	r3, r3, #1
-	mla	r1, r2, r1, r6
-	strb	r4, [r1, #45]
-	b	.L452
-.L451:
-	ldr	r5, .L465+8
-	mov	fp, #255
-	movs	r3, #48
-	strh	r4, [r5, #312]	@ movhi
-.L453:
-	sub	r2, r8, r4
-	uxth	r2, r2
-	cmp	r7, r2
-	bls	.L444
-	ldr	r2, [r10]
+	bfi	r4, r0, #5, #2
+	asrs	r6, r6, r0
+	orr	r4, r4, #536870912
+	orr	r4, r4, #1024
+	bfc	r8, #3, #1
+	bfc	r4, #4, #1
+	bfc	r8, #5, #3
+	str	r6, [sp]
+	bfi	r4, r6, #22, #6
+	cmp	r7, #0
+	beq	.L551
+	ldr	r0, .L563+20
+	lsrs	r1, r1, #1
+	str	r1, [sp, #8]
+	ldrb	r0, [r0]	@ zero_extendqisi2
+	ldr	r1, [r5]
+	cmp	r0, #24
+	ite	hi
+	movhi	r0, #128
+	movls	r0, #64
+	str	r1, [sp, #12]
 	movs	r1, #0
-	str	r3, [sp, #12]
-	ldrb	r0, [r2, r8]	@ zero_extendqisi2
-	strb	fp, [r2, r8]
-	add	r8, r8, #1
-	mla	r2, r3, r0, r6
-	add	r0, r0, r0, lsl #1
-	strb	r1, [r2, #45]
-	add	r0, r6, r0, lsl #4
-	bl	buf_free
-	ldrb	r2, [r5, #7]	@ zero_extendqisi2
-	ldr	r3, [sp, #12]
-	subs	r2, r2, #1
-	strb	r2, [r5, #7]
-	b	.L453
-.L466:
+	str	r0, [sp, #4]
+	mov	r0, r1
+.L553:
+	ldr	r6, [sp, #4]
+	add	fp, r3, r0, lsl #2
+	add	lr, r6, r1
+	ldr	r6, [sp, #8]
+	cmp	r0, r6
+	blt	.L554
+.L555:
+	ldr	r3, [r5]
+	add	r1, r2, #63
+	bic	r1, r1, #63
+	bic	r0, r2, #63
+	str	r2, [r5, #4]
+	clz	r7, r7
+	str	r3, [r5, #8]
+	lsrs	r7, r7, #5
+	str	r3, [r5, #16]
+	ldr	r3, [sp]
+	str	r2, [r5, #12]
+	and	r6, r3, #63
+	add	r1, r1, r6, lsl #10
+	bl	flush_dcache_range
+	ldr	r0, [r5, #8]
+	add	r1, r0, #63
+	bic	r0, r0, #63
+	bic	r1, r1, #63
+	add	r1, r1, r6, lsl #7
+	bl	flush_dcache_range
+	movs	r3, #1
+	ldr	r2, [r10]
+	str	r3, [r5, #20]
+	movs	r1, #16
+	ldr	r3, [r5, #12]
+	str	r3, [r2, #20]
+	ldr	r3, [r5, #16]
+	str	r3, [r2, #24]
+	movs	r3, #0
+	bfi	r3, r1, #9, #5
+	movs	r1, #2
+	orr	r3, r3, #448
+	bfi	r3, r1, #3, #3
+	orr	r3, r3, #4
+	bfi	r3, r7, #1, #1
+	orr	r3, r3, #1
+	str	r3, [r2, #16]
+	str	r8, [r2, #12]
+	str	r4, [r2, #8]
+	orr	r4, r4, #4
+	str	r4, [r2, #8]
+	b	.L547
+.L554:
+	ldrh	ip, [r3, r0, lsl #2]
+	bic	r1, r1, #3
+	ldrh	fp, [fp, #2]
+	adds	r0, r0, #1
+	ldr	r6, [sp, #12]
+	orr	ip, ip, fp, lsl #16
+	str	ip, [r6, r1]
+	mov	r1, lr
+	b	.L553
+.L551:
+	ldr	r3, [r5]
+	str	r0, [r3]
+	b	.L555
+.L564:
 	.align	2
-.L465:
-	.word	.LANCHOR36
-	.word	.LANCHOR62
-	.word	.LANCHOR59
-	.word	.LC8
-	.word	.LANCHOR63
-	.word	.LC0
-	.word	.LANCHOR60
-	.word	.LANCHOR22
-	.word	.LC9
-	.word	.LANCHOR66
-	.word	.LANCHOR64
-	.word	.LANCHOR65
-	.size	gc_write_completed, .-gc_write_completed
-	.section	.text.gc_get_src_blk,"ax",%progbits
+.L563:
+	.word	.LANCHOR28
+	.word	.LANCHOR47
+	.word	.LANCHOR45
+	.word	.LANCHOR46
+	.word	.LANCHOR48
+	.word	.LANCHOR44
+	.word	.LANCHOR13
+	.size	nandc_xfer_start, .-nandc_xfer_start
+	.section	.text.nandc_set_seed,"ax",%progbits
 	.align	1
-	.global	gc_get_src_blk
+	.global	nandc_set_seed
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	gc_get_src_blk, %function
-gc_get_src_blk:
+	.type	nandc_set_seed, %function
+nandc_set_seed:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L476
-	push	{r4, r5, r6, r7, lr}
-	ldr	r2, [r3]
-	ldr	r3, .L476+4
-	ldrh	r4, [r2, #124]
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	cbz	r4, .L468
-	add	r3, r2, #392
-	movs	r4, #1
-.L469:
-	add	r6, r3, #128
-	movw	r5, #65535
-.L473:
-	mov	r7, r3
-	ldrh	r0, [r3], #2
-	cmp	r0, r5
-	beq	.L471
-	strh	r5, [r7]	@ movhi
-	cbz	r4, .L472
-	ldrh	r3, [r2, #124]
-	subs	r3, r3, #1
-	strh	r3, [r2, #124]	@ movhi
-	pop	{r4, r5, r6, r7, pc}
-.L468:
-	add	r3, r1, #60
-	ldrh	r3, [r2, r3, lsl #1]
-	cbz	r3, .L474
-	add	r3, r2, r1, lsl #7
-	adds	r3, r3, #136
-	b	.L469
-.L472:
-	add	r2, r2, r1, lsl #1
-	ldrh	r3, [r2, #120]
-	subs	r3, r3, #1
-	strh	r3, [r2, #120]	@ movhi
-	pop	{r4, r5, r6, r7, pc}
-.L471:
-	cmp	r3, r6
-	bne	.L473
-	pop	{r4, r5, r6, r7, pc}
-.L474:
-	movw	r0, #65535
-	pop	{r4, r5, r6, r7, pc}
-.L477:
+	@ link register save eliminated.
+	ldr	r2, .L572
+	and	r0, r0, #127
+	ldr	r3, .L572+4
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	ldrh	r3, [r3, r0, lsl #1]
+	cbz	r2, .L566
+	orr	r3, r3, #-1073741824
+.L566:
+	ldr	r2, .L572+8
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r2, #9
+	ldr	r2, .L572+12
+	ldr	r2, [r2]
+	ite	eq
+	streq	r3, [r2, #520]
+	strne	r3, [r2, #336]
+	bx	lr
+.L573:
 	.align	2
-.L476:
-	.word	.LANCHOR60
-	.word	.LANCHOR67
-	.size	gc_get_src_blk, .-gc_get_src_blk
-	.section	.text.gc_free_temp_buf,"ax",%progbits
+.L572:
+	.word	.LANCHOR46
+	.word	.LANCHOR49
+	.word	.LANCHOR28
+	.word	.LANCHOR13
+	.size	nandc_set_seed, .-nandc_set_seed
+	.section	.text.zftl_flash_de_init,"ax",%progbits
 	.align	1
-	.global	gc_free_temp_buf
+	.global	zftl_flash_de_init
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	gc_free_temp_buf, %function
-gc_free_temp_buf:
+	.type	zftl_flash_de_init, %function
+zftl_flash_de_init:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	ldr	r5, .L492
-	ldrb	r0, [r5, #7]	@ zero_extendqisi2
-	cbz	r0, .L478
-	ldr	r3, .L492+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #1
-	bhi	.L485
-	ldr	r3, .L492+8
-	movs	r7, #48
-	ldrh	r4, [r5, #312]
-	ldr	r6, .L492+12
-	ldrh	r2, [r3]
-	ldr	r3, .L492+16
-	add	r1, r4, #24
-	ldr	r0, .L492+20
+	push	{r4, lr}
+	bl	nandc_wait_flash_ready
+	ldr	r3, .L590
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	muls	r2, r3, r2
-	cmp	r2, r1
-	it	cs
-	movcs	r2, r1
-	ldr	r1, [r6]
-.L480:
-	cmp	r4, r2
-	bcc	.L483
-.L485:
+	cbz	r3, .L575
+	ldr	r3, .L590+4
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	cbnz	r0, .L575
+	bl	zftl_flash_exit_slc_mode
+.L575:
+	ldr	r4, .L590+8
 	movs	r0, #0
-.L478:
-	pop	{r3, r4, r5, r6, r7, pc}
-.L483:
-	ldrb	r3, [r1, r4]	@ zero_extendqisi2
-	cmp	r3, #255
-	beq	.L481
-	mla	ip, r7, r3, r0
-	ldrb	ip, [ip, #45]	@ zero_extendqisi2
-	cmp	ip, #0
-	bne	.L481
-	add	r3, r3, r3, lsl #1
-	add	r0, r0, r3, lsl #4
-	bl	buf_free
-	ldr	r3, .L492+24
-	ldr	r3, [r3]
-	lsls	r3, r3, #23
-	bpl	.L482
-	ldr	r3, [r6]
-	mov	r1, r4
-	ldr	r0, .L492+28
-	ldrb	r2, [r3, r4]	@ zero_extendqisi2
-	bl	printf
-.L482:
-	ldr	r3, [r6]
-	movs	r2, #255
+	bl	hynix_reconfig_rr_para
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	cbz	r3, .L576
+	ldr	r3, .L590+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	lsls	r3, r3, #31
+	bpl	.L576
 	movs	r0, #1
-	strb	r2, [r3, r4]
-	ldrb	r3, [r5, #7]	@ zero_extendqisi2
-	subs	r3, r3, #1
-	strb	r3, [r5, #7]
-	pop	{r3, r4, r5, r6, r7, pc}
-.L481:
-	adds	r4, r4, #1
-	b	.L480
-.L493:
+	bl	flash_set_interface_mode
+	movs	r0, #1
+	bl	nandc_set_if_mode
+	movs	r3, #0
+	strb	r3, [r4]
+.L576:
+	ldr	r1, .L590+16
+	ldrb	r3, [r1]	@ zero_extendqisi2
+	cbz	r3, .L577
+	movs	r0, #0
+	strb	r0, [r1]
+	bl	nandc_set_seed
+	movs	r3, #1
+	strb	r3, [r1]
+.L577:
+	movs	r0, #0
+	pop	{r4, pc}
+.L591:
 	.align	2
-.L492:
-	.word	.LANCHOR59
-	.word	.LANCHOR38
-	.word	.LANCHOR68
-	.word	.LANCHOR65
-	.word	.LANCHOR69
-	.word	.LANCHOR36
-	.word	.LANCHOR22
-	.word	.LC10
-	.size	gc_free_temp_buf, .-gc_free_temp_buf
-	.section	.text.gc_static_wearleveling,"ax",%progbits
+.L590:
+	.word	.LANCHOR0
+	.word	.LANCHOR19
+	.word	.LANCHOR21
+	.word	.LANCHOR43
+	.word	.LANCHOR46
+	.size	zftl_flash_de_init, .-zftl_flash_de_init
+	.section	.text.nandc_randomizer_enable,"ax",%progbits
 	.align	1
-	.global	gc_static_wearleveling
+	.global	nandc_randomizer_enable
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	gc_static_wearleveling, %function
-gc_static_wearleveling:
-	@ args = 0, pretend = 0, frame = 8
+	.type	nandc_randomizer_enable, %function
+nandc_randomizer_enable:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L542
-	ldr	r4, [r3]
-	ldr	r3, [r4, #32]
-	cmp	r3, #20480
-	bls	.L495
-	ldr	r2, [r4, #36]
-	add	r2, r2, r3, lsr #10
-	ubfx	r3, r3, #0, #10
-	str	r3, [r4, #32]
-	str	r2, [r4, #36]
-.L495:
-	ldr	r3, .L542+4
-	ldr	r0, [r4, #36]
-	ldr	r3, [r3]
-	ldr	r2, [r3, #568]
-	ldr	r1, [r3, #12]
-	add	r2, r2, #12910592
-	add	r2, r2, #49408
-	cmp	r1, r2
-	bhi	.L496
-	ldr	r2, [r3, #572]
-	adds	r2, r2, #128
-	cmp	r0, r2
-	bls	.L494
-.L496:
-	str	r0, [r3, #572]
-	movw	r6, #65535
-	str	r1, [r3, #568]
-	movs	r0, #0
-	ldr	r3, .L542+8
-	mov	r2, r0
-	ldrh	ip, [r4, #134]
-	mov	r8, r0
-	mov	r10, r0
-	mov	fp, r0
-	ldrh	r3, [r3]
-	mov	r7, r0
-	mov	r5, r6
-	str	r3, [sp, #8]
-	ldr	r3, .L542+12
+	@ link register save eliminated.
+	ldr	r3, .L593
+	strb	r0, [r3]
+	bx	lr
+.L594:
+	.align	2
+.L593:
+	.word	.LANCHOR46
+	.size	nandc_randomizer_enable, .-nandc_randomizer_enable
+	.section	.text.nandc_get_chip_if,"ax",%progbits
+	.align	1
+	.global	nandc_get_chip_if
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	nandc_get_chip_if, %function
+nandc_get_chip_if:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L596
+	adds	r0, r0, #8
 	ldr	r3, [r3]
-	add	r3, r3, ip, lsl #2
-.L498:
-	ldr	r1, [sp, #8]
-	cmp	ip, r1
-	bcc	.L502
-	ldrh	r3, [r4, #96]
-	mov	r1, r10
-	str	r2, [sp, #12]
-	cmp	r3, fp
-	ldrh	r3, [r4, #98]
-	it	cc
-	strhcc	fp, [r4, #96]	@ movhi
-	cmp	r3, r7
-	it	cc
-	strhcc	r7, [r4, #98]	@ movhi
-	bl	__aeabi_uidiv
-	ldr	r2, [sp, #12]
-	mov	r1, r8
-	strh	r0, [r4, #88]	@ movhi
-	str	r0, [sp, #8]
-	mov	r0, r2
-	bl	__aeabi_uidiv
-	strh	r0, [r4, #90]	@ movhi
-	ldr	r4, .L542+16
-	ldr	r3, [sp, #8]
-	ldr	r2, [r4]
-	tst	r2, #256
-	beq	.L505
-	uxth	r0, r0
-	uxth	r3, r3
-	str	r0, [sp]
-	mov	r2, r8
-	mov	r1, r10
-	ldr	r0, .L542+20
-	bl	printf
-.L505:
-	ldr	r3, [r4]
-	lsls	r2, r3, #23
-	bpl	.L506
-	str	r7, [sp]
-	mov	r3, fp
-	mov	r2, r5
-	mov	r1, r6
-	ldr	r0, .L542+24
-	bl	printf
-.L506:
-	subs	r7, r7, r5
-	cmp	r7, #64
-	bgt	.L507
-.L513:
-	cmp	r5, #0
-	bne	.L508
-.L514:
-	cbz	r6, .L494
-	ldr	r3, .L542
-	ldr	r2, .L542+8
-	ldr	r1, [r3]
-	ldrh	r5, [r2]
-	ldr	r2, .L542+12
-	ldrh	r3, [r1, #134]
-	ldr	r2, [r2]
-	add	r2, r2, r3, lsl #2
-.L519:
-	cmp	r3, r5
-	bcc	.L521
-	ldrh	r3, [r1, #74]
-	add	r3, r3, r6
-	strh	r3, [r1, #74]	@ movhi
-	ldrh	r3, [r1, #96]
-	cmp	r6, r3
-	bcs	.L494
-	subs	r6, r3, r6
-	strh	r6, [r1, #96]	@ movhi
-.L494:
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L502:
-	ldrb	r1, [r3, #2]	@ zero_extendqisi2
-	tst	r1, #8
-	beq	.L499
-	ldrh	lr, [r3]
-	ldr	r1, [r3]
-	ubfx	lr, lr, #0, #11
-	ubfx	r1, r1, #11, #8
-.L500:
-	cmp	r6, lr
-	add	r0, r0, lr
-	it	cs
-	movcs	r6, lr
-	cmp	fp, lr
-	it	cc
-	movcc	fp, lr
-	movw	lr, #65535
-	cmp	r1, lr
-	add	r10, r10, #1
-	uxth	r10, r10
-	bne	.L522
-	b	.L523
-.L499:
-	tst	r1, #24
-	bne	.L501
-	ldrh	lr, [r3]
-	movw	r1, #65535
-	ubfx	lr, lr, #0, #11
-	b	.L500
-.L501:
-	ldr	r1, [r3]
-	ubfx	r1, r1, #11, #8
-.L522:
-	cmp	r5, r1
-	add	r8, r8, #1
-	it	cs
-	movcs	r5, r1
-	uxth	r8, r8
-	cmp	r7, r1
-	add	r2, r2, r1
-	it	cc
-	movcc	r7, r1
-.L523:
-	add	ip, ip, #1
-	adds	r3, r3, #4
-	uxth	ip, ip
-	b	.L498
-.L507:
-	ldr	r3, .L542
-	ldr	r7, .L542+8
-	ldr	r8, .L542+12
-	ldr	r3, [r3]
-	ldrh	r4, [r3, #134]
-.L510:
-	ldrh	r3, [r7]
-	cmp	r3, r4
-	bls	.L513
-	ldr	r1, [r8]
-	lsls	r2, r4, #2
-	adds	r3, r1, r2
-	ldrb	r3, [r3, #2]	@ zero_extendqisi2
-	tst	r3, #192
-	beq	.L511
-	and	r0, r3, #224
-	cmp	r0, #224
-	beq	.L511
-	ubfx	r3, r3, #3, #2
-	lsls	r3, r3, #30
-	bpl	.L511
-	ldr	r3, [r1, r2]
-	ubfx	r3, r3, #11, #8
-	cmp	r3, r5
-	bhi	.L511
-	movs	r2, #1
-	mov	r0, r4
+	add	r0, r3, r0, lsl #8
+	bx	lr
+.L597:
+	.align	2
+.L596:
+	.word	.LANCHOR13
+	.size	nandc_get_chip_if, .-nandc_get_chip_if
+	.section	.text.buf_reinit,"ax",%progbits
+	.align	1
+	.global	buf_reinit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	buf_reinit, %function
+buf_reinit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L601
+	movs	r2, #0
+	push	{r4, r5, lr}
 	mov	r1, r2
-	bl	gc_add_sblk
-.L511:
-	adds	r4, r4, #1
-	uxth	r4, r4
-	b	.L510
-.L508:
-	ldr	r3, .L542
-	ldr	r2, .L542+8
-	ldr	r1, [r3]
-	ldrh	r7, [r2]
-	ldr	r2, .L542+12
-	ldrh	r3, [r1, #134]
-	ldr	r2, [r2]
-	add	r2, r2, r3, lsl #2
-.L515:
-	cmp	r3, r7
-	bcc	.L517
-	ldrh	r3, [r1, #72]
-	add	r3, r3, r5
-	strh	r3, [r1, #72]	@ movhi
-	ldrh	r3, [r1, #98]
-	cmp	r5, r3
-	itt	cc
-	subcc	r5, r3, r5
-	strhcc	r5, [r1, #98]	@ movhi
-	b	.L514
-.L517:
-	ldr	r0, [r2]
-	adds	r3, r3, #1
-	uxth	r3, r3
-	adds	r2, r2, #4
-	ubfx	r4, r0, #11, #8
-	cmp	r5, r4
-	ittt	ls
-	subls	r4, r4, r5
-	bfils	r0, r4, #11, #8
-	strls	r0, [r2, #-4]
-	b	.L515
-.L521:
-	ldrh	r0, [r2]
-	adds	r3, r3, #1
-	uxth	r3, r3
-	adds	r2, r2, #4
-	ubfx	r4, r0, #0, #11
-	cmp	r4, r6
-	ittt	ge
-	subge	r4, r4, r6
-	bfige	r0, r4, #0, #11
-	strhge	r0, [r2, #-4]	@ movhi
-	b	.L519
-.L543:
+	mov	r4, r3
+.L599:
+	uxtb	r0, r2
+	adds	r2, r2, #1
+	cmp	r2, #32
+	strb	r1, [r3, #2]
+	add	r5, r0, #1
+	strb	r0, [r3, #1]
+	strb	r5, [r3]
+	add	r3, r3, #48
+	str	r1, [r3, #-40]
+	bne	.L599
+	movs	r3, #255
+	strb	r3, [r4, #1488]
+	ldr	r3, .L601+4
+	strb	r1, [r3]
+	ldr	r3, .L601+8
+	strb	r2, [r3]
+	pop	{r4, r5, pc}
+.L602:
 	.align	2
-.L542:
-	.word	.LANCHOR46
-	.word	.LANCHOR60
-	.word	.LANCHOR54
-	.word	.LANCHOR57
-	.word	.LANCHOR22
-	.word	.LC11
-	.word	.LC12
-	.size	gc_static_wearleveling, .-gc_static_wearleveling
-	.section	.text.print_gc_debug_info,"ax",%progbits
+.L601:
+	.word	.LANCHOR50
+	.word	.LANCHOR51
+	.word	.LANCHOR52
+	.size	buf_reinit, .-buf_reinit
+	.section	.text.buf_add_tail,"ax",%progbits
 	.align	1
-	.global	print_gc_debug_info
+	.global	buf_add_tail
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	print_gc_debug_info, %function
-print_gc_debug_info:
+	.type	buf_add_tail, %function
+buf_add_tail:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, lr}
-	ldr	r0, .L545
-	ldrh	r3, [r0, #310]
-	ldrh	r2, [r0, #2]
-	ldrh	r1, [r0]
-	ldrb	r0, [r0, #7]	@ zero_extendqisi2
-	str	r0, [sp, #4]
-	ldr	r0, .L545+4
-	ldrb	r0, [r0]	@ zero_extendqisi2
-	str	r0, [sp]
-	ldr	r0, .L545+8
+	movs	r3, #255
+	push	{r4, r5, r6, lr}
+	strb	r3, [r1]
+	mov	r5, r0
+	mov	r4, r1
+	ldrb	r3, [r0]	@ zero_extendqisi2
+	cmp	r3, #255
+	bne	.L604
+	ldrb	r3, [r1, #1]	@ zero_extendqisi2
+	cmp	r3, #255
+	bne	.L605
+	movs	r2, #74
+	ldr	r1, .L610
+	ldr	r0, .L610+4
 	bl	printf
-	add	sp, sp, #12
-	@ sp needed
-	ldr	pc, [sp], #4
-.L546:
+.L605:
+	ldrb	r3, [r4, #1]	@ zero_extendqisi2
+	strb	r3, [r5]
+	pop	{r4, r5, r6, pc}
+.L604:
+	ldr	r2, .L610+8
+	movs	r1, #48
+	mov	r6, r2
+.L609:
+	mov	r5, r3
+	muls	r3, r1, r3
+	ldrb	r3, [r2, r3]	@ zero_extendqisi2
+	cmp	r3, #255
+	bne	.L609
+	ldrb	r3, [r4, #1]	@ zero_extendqisi2
+	cmp	r3, #255
+	bne	.L607
+	movs	r2, #81
+	ldr	r1, .L610
+	ldr	r0, .L610+4
+	bl	printf
+.L607:
+	movs	r3, #48
+	ldrb	r2, [r4, #1]	@ zero_extendqisi2
+	muls	r3, r5, r3
+	strb	r2, [r6, r3]
+	pop	{r4, r5, r6, pc}
+.L611:
 	.align	2
-.L545:
-	.word	.LANCHOR59
-	.word	.LANCHOR38
-	.word	.LC13
-	.size	print_gc_debug_info, .-print_gc_debug_info
-	.global	__aeabi_idiv
-	.section	.text.ftl_get_blk_list_in_sblk,"ax",%progbits
+.L610:
+	.word	.LANCHOR53
+	.word	.LC0
+	.word	.LANCHOR50
+	.size	buf_add_tail, .-buf_add_tail
+	.section	.text.queue_read_cmd,"ax",%progbits
 	.align	1
-	.global	ftl_get_blk_list_in_sblk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_get_blk_list_in_sblk, %function
-ftl_get_blk_list_in_sblk:
-	@ args = 0, pretend = 0, frame = 8
+	.type	queue_read_cmd, %function
+queue_read_cmd:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L556
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r4, #0
-	mov	r7, r1
-	mov	r5, r4
-	ldr	r3, [r3]
-	add	r3, r3, r0, lsl #2
-	ldrb	fp, [r3, #3]	@ zero_extendqisi2
-	ldr	r3, .L556+4
-	ldrb	r10, [r3]	@ zero_extendqisi2
-	ldr	r3, .L556+8
-	ldrb	r8, [r3]	@ zero_extendqisi2
-	ldr	r3, .L556+12
-	smulbb	r0, r8, r0
-	uxth	r6, r0
-.L548:
-	cmp	r5, r10
-	blt	.L552
-	mov	r3, r4
-	movw	r2, #65535
-.L553:
-	cmp	r3, r10
-	blt	.L554
-	mov	r0, r4
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L552:
-	asr	r2, fp, r5
-	lsls	r2, r2, #31
-	bmi	.L549
-	mov	r1, r8
-	mov	r0, r5
-	str	r3, [sp, #4]
-	bl	__aeabi_idiv
-	ldr	r3, [sp, #4]
-	cmp	r8, #1
-	ldrh	r2, [r3]
-	rsb	r2, r2, #21
-	lsl	r0, r0, r2
-	it	hi
-	andhi	r2, r5, #1
-	add	r0, r0, r6
-	uxth	r0, r0
-	it	hi
-	addhi	r0, r0, r2
-	strh	r0, [r7, r4, lsl #1]	@ movhi
-	adds	r4, r4, #1
-.L549:
-	adds	r5, r5, #1
-	b	.L548
-.L554:
-	strh	r2, [r7, r3, lsl #1]	@ movhi
+	push	{r4, lr}
+	mov	r4, r0
+	ldr	r1, [r0, #24]
+	movs	r0, #48
+	bl	flash_start_page_read
+	movs	r3, #1
+	mov	r1, r4
+	strb	r3, [r4, #42]
+	movs	r3, #0
+	strb	r3, [r4, #43]
+	movs	r3, #255
+	strb	r3, [r4]
+	ldr	r0, .L613
+	pop	{r4, lr}
+	b	buf_add_tail
+.L614:
+	.align	2
+.L613:
+	.word	.LANCHOR54
+	.size	queue_read_cmd, .-queue_read_cmd
+	.section	.text.buf_free,"ax",%progbits
+	.align	1
+	.global	buf_free
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	buf_free, %function
+buf_free:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	mov	r1, r0
+	ldrb	r3, [r0, #2]	@ zero_extendqisi2
+	and	r3, r3, #8
+	strb	r3, [r0, #2]
+	cbz	r3, .L616
+	ldr	r3, [r0, #20]
 	adds	r3, r3, #1
-	b	.L553
-.L557:
+	beq	.L616
+	ldr	r0, .L624
+	bl	buf_add_tail
+.L617:
+	ldr	r2, .L624+4
+	ldrb	r3, [r2]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	strb	r3, [r2]
+	pop	{r3, pc}
+.L616:
+	ldr	r3, .L624
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	strb	r2, [r1]
+	ldrb	r2, [r1, #1]	@ zero_extendqisi2
+	strb	r2, [r3]
+	b	.L617
+.L625:
 	.align	2
-.L556:
-	.word	.LANCHOR57
-	.word	.LANCHOR69
-	.word	.LANCHOR70
-	.word	.LANCHOR71
-	.size	ftl_get_blk_list_in_sblk, .-ftl_get_blk_list_in_sblk
-	.section	.text.ftl_alloc_sblk,"ax",%progbits
+.L624:
+	.word	.LANCHOR51
+	.word	.LANCHOR52
+	.size	buf_free, .-buf_free
+	.section	.text.buf_alloc,"ax",%progbits
 	.align	1
-	.global	ftl_alloc_sblk
+	.global	buf_alloc
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_alloc_sblk, %function
-ftl_alloc_sblk:
-	@ args = 0, pretend = 0, frame = 16
+	.type	buf_alloc, %function
+buf_alloc:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.L559:
-	ldr	r3, .L580
-	cmp	r0, #5
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #24
-	movw	r4, #65535
-	mov	r5, r0
-	mov	lr, #0
-	mov	ip, r4
-	ldrh	r3, [r3]
-	str	r3, [sp, #8]
-	ite	ne
-	movne	r3, #0
-	moveq	r3, #2
-	ldr	r8, [sp, #8]
-	str	r3, [sp, #12]
-	ite	ne
-	movne	r3, #2
-	moveq	r3, #0
-	str	r3, [sp, #20]
-	ldr	r3, .L580+4
-	ldr	r2, [r3]
-	ldr	r3, .L580+8
-	ldr	r3, [r3]
-	str	r3, [sp, #16]
-.L574:
-	ldrh	r7, [r2, #132]
-	ldr	r1, [sp, #16]
-	mov	r3, r7
-	add	r1, r1, r7, lsl #2
-.L560:
-	cmp	r3, r8
-	blt	.L572
-	subs	r3, r3, r7
-	ldr	r1, [sp, #8]
-	add	lr, lr, r3
-	ldrh	r3, [r2, #134]
-	uxth	lr, lr
-	subs	r1, r1, r3
-	cmp	lr, r1
-	blt	.L573
-	movw	r1, #65535
-	cmp	r4, r1
-	beq	.L573
-	ldr	r3, [sp, #16]
-	add	r6, r3, r4, lsl #2
-	b	.L564
-.L572:
-	ldrb	r0, [r1, #2]	@ zero_extendqisi2
-	mov	r6, r1
-	tst	r0, #224
-	bne	.L561
-	ubfx	r10, r0, #3, #2
-	ldr	r0, [sp, #20]
-	cmp	r0, r10
-	beq	.L561
-	ldr	r0, [sp, #12]
-	cbz	r0, .L562
-	ldr	r0, [r1]
-	ldrh	fp, [r2, #72]
-	ldrh	r10, [r2, #90]
-	ubfx	r0, r0, #11, #8
-	add	fp, fp, r0
-	add	r10, r10, #1
-	cmp	fp, r10
-	ble	.L563
-	uxth	r0, r0
-	cmp	ip, r0
-	bls	.L561
-	uxth	r4, r3
-	mov	ip, r0
-.L561:
-	adds	r3, r3, #1
-	adds	r1, r1, #4
-	b	.L560
-.L562:
-	ldrh	r0, [r1]
-	ldrh	fp, [r2, #74]
-	ldrh	r10, [r2, #88]
-	ubfx	r0, r0, #0, #11
-	add	fp, fp, r0
-	add	r10, r10, #1
-	cmp	fp, r10
-	ble	.L563
-	cmp	r0, ip
-	bge	.L561
-	mov	ip, r0
-	uxth	r4, r3
-	b	.L561
-.L563:
-	uxth	r4, r3
-.L564:
-	ldr	r3, .L580+12
-	ldr	r3, [r3]
-	lsls	r1, r3, #19
-	bpl	.L565
-	ldrb	r3, [r6, #2]	@ zero_extendqisi2
-	mov	r1, r4
-	ldrb	r2, [r6, #3]	@ zero_extendqisi2
-	ldr	r0, .L580+16
-	str	r2, [sp]
-	lsrs	r3, r3, #5
-	mov	r2, r5
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r7, r0
+	ldr	r4, .L636
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	cbz	r3, .L627
+.L630:
+	ldr	r5, .L636+4
+	ldr	r2, .L636+8
+	ldrb	r6, [r5]	@ zero_extendqisi2
+	add	r0, r6, r6, lsl #1
+	add	r0, r2, r0, lsl #4
+	cbz	r7, .L628
+.L629:
+	movs	r1, #48
+	muls	r1, r6, r1
+	ldrb	r6, [r2, r1]	@ zero_extendqisi2
+	adds	r3, r2, r1
+	strb	r6, [r5]
+	ldrb	r5, [r4]	@ zero_extendqisi2
+	subs	r5, r5, #1
+	strb	r5, [r4]
+	movs	r4, #1
+	strb	r4, [r3, #2]
+	movs	r4, #255
+	strb	r4, [r2, r1]
+	mov	r2, #-1
+	str	r2, [r3, #20]
+	movs	r2, #0
+	strh	r2, [r3, #34]	@ movhi
+	str	r2, [r3, #8]
+	strb	r2, [r3, #40]
+	strb	r2, [r3, #41]
+	pop	{r3, r4, r5, r6, r7, pc}
+.L627:
+	movs	r2, #121
+	ldr	r1, .L636+12
+	ldr	r0, .L636+16
 	bl	printf
-.L565:
-	ldrb	r3, [r6, #2]	@ zero_extendqisi2
-	ldr	r1, [sp, #12]
-	bfi	r3, r5, #5, #3
-	uxtb	r3, r3
-	ubfx	r2, r3, #3, #2
-	orrs	r2, r2, r1
-	bfi	r3, r2, #3, #2
-	lsls	r2, r2, #31
-	strb	r3, [r6, #2]
-	ldr	r3, .L580+4
-	ldr	r3, [r3]
-	strh	r4, [r3, #132]	@ movhi
-	bpl	.L566
-	ldrh	r2, [r3, #116]
-	subs	r2, r2, #1
-	strh	r2, [r3, #116]	@ movhi
-.L567:
-	cmp	r5, #5
-	bne	.L569
-	ldrh	r2, [r3, #120]
-	adds	r2, r2, #1
-	strh	r2, [r3, #120]	@ movhi
-.L576:
-	mov	r0, r4
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L566:
-	ldrb	r2, [r6, #2]	@ zero_extendqisi2
-	tst	r2, #24
-	itete	eq
-	ldrheq	r2, [r3, #114]
-	ldrhne	r2, [r3, #118]
-	addeq	r2, r2, #-1
-	addne	r2, r2, #-1
-	ite	eq
-	strheq	r2, [r3, #114]	@ movhi
-	strhne	r2, [r3, #118]	@ movhi
-	b	.L567
-.L569:
-	cmp	r5, #2
-	bne	.L571
-	ldrh	r2, [r3, #122]
-	adds	r2, r2, #1
-	strh	r2, [r3, #122]	@ movhi
-	b	.L576
-.L571:
-	cmp	r5, #3
-	bne	.L576
-	ldrh	r2, [r3, #124]
-	adds	r2, r2, #1
-	strh	r2, [r3, #124]	@ movhi
-	b	.L576
-.L573:
-	strh	r3, [r2, #132]	@ movhi
-	mov	r8, r7
-	b	.L574
-.L581:
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L630
+.L632:
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, pc}
+.L628:
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	cmp	r3, #1
+	bne	.L629
+	b	.L632
+.L637:
 	.align	2
-.L580:
-	.word	.LANCHOR54
-	.word	.LANCHOR46
-	.word	.LANCHOR57
-	.word	.LANCHOR22
-	.word	.LC14
-	.size	ftl_alloc_sblk, .-ftl_alloc_sblk
-	.section	.text.ftl_free_sblk,"ax",%progbits
+.L636:
+	.word	.LANCHOR52
+	.word	.LANCHOR51
+	.word	.LANCHOR50
+	.word	.LANCHOR55
+	.word	.LC0
+	.size	buf_alloc, .-buf_alloc
+	.section	.text.buf_remove_buf,"ax",%progbits
 	.align	1
-	.global	ftl_free_sblk
+	.global	buf_remove_buf
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_free_sblk, %function
-ftl_free_sblk:
+	.type	buf_remove_buf, %function
+buf_remove_buf:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, lr}
+	ldrb	r4, [r1, #1]	@ zero_extendqisi2
+	ldrb	r3, [r0]	@ zero_extendqisi2
+	cmp	r4, r3
+	bne	.L639
+	ldrb	r3, [r1]	@ zero_extendqisi2
+	strb	r3, [r0]
+.L644:
+	movs	r0, #1
+	pop	{r4, r5, pc}
+.L642:
+	mov	r5, r3
+	muls	r3, r2, r3
+	ldrb	r3, [r0, r3]	@ zero_extendqisi2
+	cmp	r4, r3
+	bne	.L641
+	muls	r2, r5, r2
+	ldrb	r3, [r1]	@ zero_extendqisi2
+	strb	r3, [r0, r2]
+	movs	r3, #255
+	strb	r3, [r1]
+	b	.L644
+.L639:
+	ldr	r0, .L645
+	movs	r2, #48
+.L641:
+	cmp	r3, #255
+	bne	.L642
+	movs	r0, #0
+	pop	{r4, r5, pc}
+.L646:
+	.align	2
+.L645:
+	.word	.LANCHOR50
+	.size	buf_remove_buf, .-buf_remove_buf
+	.section	.text.buf_remove_free,"ax",%progbits
+	.align	1
+	.global	buf_remove_free
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	buf_remove_free, %function
+buf_remove_free:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	movw	r3, #65535
-	cmp	r0, r3
-	bne	.L583
-	movw	r2, #313
-	ldr	r1, .L593
-	ldr	r0, .L593+4
-	bl	printf
-.L584:
-	b	.L584
-.L583:
-	ldr	r3, .L593+8
-	ldr	r2, [r3]
-	add	r2, r2, r0, lsl #2
-	ldrb	r3, [r2, #2]	@ zero_extendqisi2
-	ands	r1, r3, #224
-	bne	.L585
-	mov	r2, #316
-	ldr	r1, .L593
-	ldr	r0, .L593+4
-	bl	printf
-.L586:
-	b	.L586
-.L585:
-	cmp	r1, #160
-	ubfx	r4, r3, #3, #2
-	ldr	r3, .L593+12
-	bne	.L587
-	ldr	r5, [r3]
-	ldrh	r1, [r5, #120]
-	subs	r1, r1, #1
-	strh	r1, [r5, #120]	@ movhi
-.L588:
-	ldr	r1, [r3]
-	lsls	r3, r4, #31
-	bpl	.L590
-	ldrh	r3, [r1, #116]
-	adds	r3, r3, #1
-	strh	r3, [r1, #116]	@ movhi
-.L591:
-	ldrb	r3, [r2, #2]	@ zero_extendqisi2
-	bfc	r3, #5, #3
-	strb	r3, [r2, #2]
-	movs	r2, #0
-	ldr	r3, .L593+16
-	ldr	r3, [r3]
-	strh	r2, [r3, r0, lsl #1]	@ movhi
+	mov	r5, r0
+	ldr	r4, .L652
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	cbnz	r3, .L648
+	movs	r2, #172
+	ldr	r1, .L652+4
+	ldr	r0, .L652+8
+	bl	printf
+.L648:
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	cbz	r3, .L647
+	mov	r1, r5
+	ldr	r0, .L652+12
+	bl	buf_remove_buf
+	cmp	r0, #1
+	bne	.L647
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	subs	r3, r3, #1
+	strb	r3, [r4]
+	ldrb	r3, [r5, #2]	@ zero_extendqisi2
+	orr	r3, r3, #1
+	strb	r3, [r5, #2]
+.L647:
 	pop	{r3, r4, r5, pc}
-.L587:
-	cmp	r1, #64
-	bne	.L589
-	ldr	r5, [r3]
-	ldrh	r1, [r5, #122]
-	subs	r1, r1, #1
-	strh	r1, [r5, #122]	@ movhi
-	b	.L588
-.L589:
-	cmp	r1, #96
-	itttt	eq
-	ldreq	r5, [r3]
-	ldrheq	r1, [r5, #124]
-	addeq	r1, r1, #-1
-	strheq	r1, [r5, #124]	@ movhi
-	b	.L588
-.L590:
-	cbnz	r4, .L592
-	ldrh	r3, [r1, #114]
-	adds	r3, r3, #1
-	strh	r3, [r1, #114]	@ movhi
-	b	.L591
-.L592:
-	ldrh	r3, [r1, #118]
-	adds	r3, r3, #1
-	strh	r3, [r1, #118]	@ movhi
-	b	.L591
-.L594:
+.L653:
 	.align	2
-.L593:
-	.word	.LANCHOR72
-	.word	.LC0
-	.word	.LANCHOR57
-	.word	.LANCHOR46
+.L652:
+	.word	.LANCHOR52
 	.word	.LANCHOR56
-	.size	ftl_free_sblk, .-ftl_free_sblk
-	.section	.text.gc_free_src_blk,"ax",%progbits
+	.word	.LC0
+	.word	.LANCHOR51
+	.size	buf_remove_free, .-buf_remove_free
+	.section	.text.flash_check_bad_block,"ax",%progbits
 	.align	1
-	.global	gc_free_src_blk
+	.global	flash_check_bad_block
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	gc_free_src_blk, %function
-gc_free_src_blk:
+	.type	flash_check_bad_block, %function
+flash_check_bad_block:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	movs	r5, #0
-	ldr	r6, .L634
-.L596:
-	uxth	r2, r5
-	ldr	r3, .L634+4
-	ldrh	r1, [r3, #52]
-	cmp	r1, r2
-	bhi	.L612
-	movs	r2, #0
-	strh	r2, [r3, #52]	@ movhi
-	pop	{r3, r4, r5, r6, r7, pc}
-.L612:
-	uxth	r2, r5
-	add	r3, r3, r2, lsl #1
-	ldrh	r4, [r3, #54]
-	ldr	r3, [r6]
-	ldrh	r2, [r3, r4, lsl #1]
-	cbz	r2, .L597
-	mov	r1, r4
-	ldr	r0, .L634+8
-	bl	printf
-.L597:
-	ldr	r3, [r6]
-	ldrh	r3, [r3, r4, lsl #1]
-	cmp	r3, #0
-	bne	.L598
-	ldr	r3, .L634+12
-	ldr	r7, [r3]
-	ldr	r3, .L634+16
-	ldr	r3, [r3]
-	add	r7, r7, r4, lsl #2
-	lsls	r3, r3, #23
-	bpl	.L599
-	ldrb	r2, [r7, #2]	@ zero_extendqisi2
-	mov	r1, r4
-	ldr	r0, .L634+20
-	lsrs	r2, r2, #5
-	bl	printf
-.L599:
-	ldrb	r3, [r7, #2]	@ zero_extendqisi2
-	and	r2, r3, #224
-	cmp	r2, #224
-	beq	.L600
-	tst	r3, #192
-	bne	.L601
-.L600:
-	movw	r2, #753
-	ldr	r1, .L634+24
-	ldr	r0, .L634+28
-	bl	printf
-.L602:
-	b	.L602
-.L601:
-	mov	r0, r4
-	bl	ftl_free_sblk
-	ldr	r3, .L634+32
-	ldr	r3, [r3]
-	ldrh	r1, [r3, #124]
-	cbz	r1, .L603
-	add	r0, r3, #392
-	movs	r2, #0
-.L605:
-	ldrh	r7, [r0], #2
-	cmp	r4, r7
-	bne	.L604
-	adds	r2, r2, #196
-	movw	r0, #65535
-	subs	r1, r1, #1
-	strh	r0, [r3, r2, lsl #1]	@ movhi
-	strh	r1, [r3, #124]	@ movhi
-.L603:
-	ldrh	r1, [r3, #120]
-	cbz	r1, .L606
-	add	r0, r3, #136
-	movs	r2, #0
-.L608:
-	ldrh	r7, [r0], #2
-	cmp	r4, r7
-	bne	.L607
-	adds	r2, r2, #68
-	movw	r0, #65535
-	subs	r1, r1, #1
-	strh	r0, [r3, r2, lsl #1]	@ movhi
-	strh	r1, [r3, #120]	@ movhi
-.L606:
-	ldrh	r1, [r3, #122]
-	cbz	r1, .L609
-	add	r0, r3, #264
-	movs	r2, #0
-.L611:
-	ldrh	r7, [r0], #2
-	cmp	r4, r7
-	bne	.L610
-	adds	r2, r2, #132
-	movw	r0, #65535
-	subs	r1, r1, #1
-	strh	r0, [r3, r2, lsl #1]	@ movhi
-	strh	r1, [r3, #122]	@ movhi
-.L609:
-	adds	r5, r5, #1
-	b	.L596
-.L604:
-	adds	r2, r2, #1
-	cmp	r2, #64
-	bne	.L605
-	b	.L603
-.L607:
-	adds	r2, r2, #1
-	cmp	r2, #64
-	bne	.L608
-	b	.L606
-.L610:
-	adds	r2, r2, #1
-	cmp	r2, #64
-	bne	.L611
-	b	.L609
-.L598:
-	movs	r2, #0
-	movs	r1, #1
-	mov	r0, r4
-	bl	gc_add_sblk
-	b	.L609
-.L635:
+	ldr	r2, .L655
+	push	{r4, lr}
+	lsrs	r4, r1, #5
+	and	r1, r1, #31
+	ldrb	r3, [r2, #13]	@ zero_extendqisi2
+	ldrh	r2, [r2, #14]
+	smulbb	r3, r3, r2
+	ldr	r2, .L655+4
+	uxth	r3, r3
+	ldr	r2, [r2]
+	adds	r3, r3, #31
+	asrs	r3, r3, #5
+	add	r2, r2, r4, lsl #2
+	lsls	r3, r3, #2
+	uxth	r3, r3
+	mla	r0, r0, r3, r2
+	ldr	r0, [r0, #912]
+	lsrs	r0, r0, r1
+	and	r0, r0, #1
+	pop	{r4, pc}
+.L656:
 	.align	2
-.L634:
-	.word	.LANCHOR56
-	.word	.LANCHOR59
-	.word	.LC15
-	.word	.LANCHOR57
-	.word	.LANCHOR22
-	.word	.LC16
-	.word	.LANCHOR73
-	.word	.LC0
-	.word	.LANCHOR60
-	.size	gc_free_src_blk, .-gc_free_src_blk
-	.section	.text.ftl_erase_phy_blk,"ax",%progbits
+.L655:
+	.word	.LANCHOR31
+	.word	.LANCHOR27
+	.size	flash_check_bad_block, .-flash_check_bad_block
+	.section	.text.flash_mask_bad_block,"ax",%progbits
 	.align	1
-	.global	ftl_erase_phy_blk
+	.global	flash_mask_bad_block
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_erase_phy_blk, %function
-ftl_erase_phy_blk:
+	.type	flash_mask_bad_block, %function
+flash_mask_bad_block:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
+	ldr	r3, .L658
+	mov	r2, r1
+	push	{r4, r5, r6, lr}
+	mov	r5, r0
 	mov	r6, r1
-	ldr	r3, .L641
-	ldr	r7, .L641+4
-	ldrh	r4, [r3]
-	rsb	r3, r4, #21
-	movs	r4, #1
-	asr	r5, r0, r3
-	lsls	r4, r4, r3
-	ldr	r3, .L641+8
-	subs	r4, r4, #1
-	uxtb	r5, r5
-	ands	r4, r4, r0
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	sxth	r4, r4
-	cbz	r3, .L637
-	ldrh	r2, [r7]
-	clz	r1, r1
-	lsrs	r1, r1, #5
-	mov	r0, r5
-	muls	r2, r4, r2
-	bl	flash_erase_block_en
-.L637:
-	ldrh	r2, [r7]
-	uxtb	r1, r6
-	mov	r0, r5
-	muls	r2, r4, r2
-	pop	{r3, r4, r5, r6, r7, lr}
-	b	flash_erase_block_en
-.L642:
+	mov	r1, r0
+	ldrb	r4, [r3, #13]	@ zero_extendqisi2
+	ldrh	r3, [r3, #14]
+	ldr	r0, .L658+4
+	smulbb	r4, r4, r3
+	bl	printf
+	uxth	r4, r4
+	ldr	r3, .L658+8
+	add	r0, r4, #31
+	asrs	r0, r0, #5
+	ldr	r2, [r3]
+	movs	r3, #1
+	lsls	r0, r0, #2
+	uxth	r0, r0
+	muls	r0, r5, r0
+	lsrs	r5, r6, #5
+	and	r6, r6, #31
+	lsl	r6, r3, r6
+	add	r0, r0, #912
+	add	r0, r0, r5, lsl #2
+	ldr	r3, [r2, r0]
+	orrs	r3, r3, r6
+	str	r3, [r2, r0]
+	pop	{r4, r5, r6, pc}
+.L659:
 	.align	2
-.L641:
-	.word	.LANCHOR71
-	.word	.LANCHOR75
-	.word	.LANCHOR74
-	.size	ftl_erase_phy_blk, .-ftl_erase_phy_blk
-	.section	.text.ftl_erase_sblk,"ax",%progbits
+.L658:
+	.word	.LANCHOR31
+	.word	.LC42
+	.word	.LANCHOR27
+	.size	flash_mask_bad_block, .-flash_mask_bad_block
+	.section	.text.ftl_gc_write_buf,"ax",%progbits
 	.align	1
-	.global	ftl_erase_sblk
+	.global	ftl_gc_write_buf
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_erase_sblk, %function
-ftl_erase_sblk:
-	@ args = 0, pretend = 0, frame = 64
+	.type	ftl_gc_write_buf, %function
+ftl_gc_write_buf:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r4, r0
-	ldr	r6, .L663
-	sub	sp, sp, #64
-	mov	r7, r1
-	movs	r5, #0
-	ldr	r3, [r6]
-	add	r3, r3, r0, lsl #2
-	ldrb	r8, [r3, #3]	@ zero_extendqisi2
-.L644:
-	ldr	r3, .L663+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r5, r3
-	bge	.L651
-	ldr	r3, .L663+8
+	push	{r3, lr}
+	mov	r1, r0
+	ldrb	r3, [r0, #2]	@ zero_extendqisi2
+	orr	r3, r3, #2
+	strb	r3, [r0, #2]
+	ldr	r0, .L661
+	bl	buf_add_tail
+	ldr	r3, .L661+4
 	ldrb	r0, [r3]	@ zero_extendqisi2
-	ldr	r3, .L663+12
-	ldrh	ip, [r3]
-	movs	r3, #0
-	mul	r10, r0, r5
-	mov	r2, r3
-	mul	lr, r0, r4
-	b	.L652
-.L646:
-	add	r1, r2, r10
-	asr	r1, r8, r1
-	lsls	r1, r1, #31
-	bmi	.L645
-	add	r1, sp, #64
-	add	fp, r1, r3, lsl #2
-	and	r1, r2, #1
-	add	r1, r1, lr
-	mul	r1, ip, r1
-	adds	r3, r3, #1
-	str	r1, [fp, #-64]
-.L645:
-	adds	r2, r2, #1
-.L652:
-	cmp	r2, r0
-	blt	.L646
-	cmp	r3, #2
-	bne	.L647
-	ldr	r3, .L663+16
-	uxtb	r10, r5
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L648
-	clz	r1, r7
-	ldm	sp, {r2, r3}
-	lsrs	r1, r1, #5
-	mov	r0, r10
-	bl	flash_erase_duplane_block
-.L648:
-	ldm	sp, {r2, r3}
-	uxtb	r1, r7
-	mov	r0, r10
-	bl	flash_erase_duplane_block
-.L649:
-	adds	r5, r5, #1
-	b	.L644
-.L647:
-	cmp	r3, #1
-	bne	.L649
-	ldr	r3, .L663+16
-	uxtb	r10, r5
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L650
-	clz	r1, r7
-	ldr	r2, [sp]
-	lsrs	r1, r1, #5
-	mov	r0, r10
-	bl	flash_erase_block_en
-.L650:
-	ldr	r2, [sp]
-	uxtb	r1, r7
-	mov	r0, r10
-	bl	flash_erase_block_en
-	b	.L649
-.L651:
-	ldr	r1, .L663+20
-	ldr	r0, [r6]
-	cbnz	r7, .L653
-	ldrh	r2, [r0, r4, lsl #2]
-	adds	r3, r2, #1
-	ubfx	r3, r3, #0, #11
-	bfi	r2, r3, #0, #11
-	strh	r2, [r0, r4, lsl #2]	@ movhi
-	ldr	r2, [r1]
-	ldr	r1, [r2, #84]
-	adds	r1, r1, #1
-	str	r1, [r2, #84]
-	ldrh	r1, [r2, #96]
-	cmp	r1, r3
-	bge	.L655
-	strh	r3, [r2, #96]	@ movhi
-.L655:
-	movs	r0, #0
-	add	sp, sp, #64
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L653:
-	ldr	r2, [r0, r4, lsl #2]
-	ubfx	r3, r2, #11, #8
-	adds	r3, r3, #1
-	uxtb	r3, r3
-	bfi	r2, r3, #11, #8
-	uxth	r3, r3
-	str	r2, [r0, r4, lsl #2]
-	ldr	r2, [r1]
-	ldr	r1, [r2, #80]
-	adds	r1, r1, #1
-	str	r1, [r2, #80]
-	ldrh	r1, [r2, #98]
-	cmp	r1, r3
-	it	cc
-	strhcc	r3, [r2, #98]	@ movhi
-	b	.L655
-.L664:
+	adds	r0, r0, #1
+	uxtb	r0, r0
+	strb	r0, [r3]
+	pop	{r3, pc}
+.L662:
 	.align	2
-.L663:
+.L661:
 	.word	.LANCHOR57
-	.word	.LANCHOR76
-	.word	.LANCHOR70
-	.word	.LANCHOR75
-	.word	.LANCHOR74
-	.word	.LANCHOR46
-	.size	ftl_erase_sblk, .-ftl_erase_sblk
-	.section	.text.ftl_alloc_sys_blk,"ax",%progbits
+	.word	.LANCHOR58
+	.size	ftl_gc_write_buf, .-ftl_gc_write_buf
+	.section	.text.zftl_cache_flush,"ax",%progbits
 	.align	1
-	.global	ftl_alloc_sys_blk
+	.global	zftl_cache_flush
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_alloc_sys_blk, %function
-ftl_alloc_sys_blk:
+	.type	zftl_cache_flush, %function
+zftl_cache_flush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	ldr	r3, .L675
-	ldr	r3, [r3]
-	ldrh	r2, [r3, #136]
-	ldrh	r1, [r3, #112]
-	cmp	r2, #63
-	itt	hi
-	movhi	r2, #0
-	strhhi	r2, [r3, #136]	@ movhi
-	cbnz	r1, .L667
-	mov	r2, #440
-	ldr	r1, .L675+4
-	ldr	r0, .L675+8
-	bl	printf
-.L668:
-	b	.L668
-.L667:
-	movw	r5, #65535
-	movs	r6, #0
-	mov	r7, r5
-.L673:
-	ldrh	r2, [r3, #136]
-	add	r4, r3, r2, lsl #1
-	adds	r4, r4, #158
+	@ link register save eliminated.
+	bx	lr
+	.size	zftl_cache_flush, .-zftl_cache_flush
+	.section	.text.zftl_get_density,"ax",%progbits
+	.align	1
+	.global	zftl_get_density
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	zftl_get_density, %function
+zftl_get_density:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	cbnz	r0, .L665
+	ldr	r3, .L668
+	ldr	r0, [r3]
+	bx	lr
+.L665:
+	cmp	r0, #4
+	ite	cc
+	movcc	r0, #8192
+	movcs	r0, #0
+	bx	lr
 .L669:
-	cmp	r2, #63
-	ble	.L671
-	strh	r6, [r3, #136]	@ movhi
-	b	.L673
-.L671:
-	ldrh	r0, [r4, #2]!
-	cmp	r0, r5
-	bne	.L674
-	adds	r2, r2, #1
-	b	.L669
-.L674:
-	add	r4, r2, #80
-	subs	r1, r1, #1
-	strh	r7, [r3, r4, lsl #1]	@ movhi
-	strh	r2, [r3, #136]	@ movhi
-	strh	r1, [r3, #112]	@ movhi
-	pop	{r3, r4, r5, r6, r7, pc}
-.L676:
 	.align	2
-.L675:
-	.word	.LANCHOR46
-	.word	.LANCHOR77
-	.word	.LC0
-	.size	ftl_alloc_sys_blk, .-ftl_alloc_sys_blk
-	.section	.text.ftl_free_sys_blk,"ax",%progbits
+.L668:
+	.word	.LANCHOR59
+	.size	zftl_get_density, .-zftl_get_density
+	.section	.text.gc_hook,"ax",%progbits
 	.align	1
-	.global	ftl_free_sys_blk
+	.global	gc_hook
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_free_sys_blk, %function
-ftl_free_sys_blk:
+	.type	gc_hook, %function
+gc_hook:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	ldr	r3, .L686
-	ldr	r3, [r3]
-	ldrh	r2, [r3, #138]
-	ldrh	r1, [r3, #112]
-	cmp	r2, #63
-	itt	hi
-	movhi	r2, #0
-	strhhi	r2, [r3, #138]	@ movhi
-	cmp	r1, #63
-	bls	.L679
-	mov	r2, #464
-	ldr	r1, .L686+4
-	ldr	r0, .L686+8
-	bl	printf
-.L680:
-	b	.L680
-.L679:
-	movw	r6, #65535
-	movs	r5, #0
-.L685:
-	ldrh	r2, [r3, #138]
-	add	r4, r3, r2, lsl #1
-	adds	r4, r4, #158
-.L681:
-	cmp	r2, #63
-	ble	.L683
-	strh	r5, [r3, #138]	@ movhi
-	b	.L685
-.L683:
-	ldrh	r7, [r4, #2]!
-	cmp	r7, r6
-	bne	.L682
-	add	r4, r2, #80
-	adds	r1, r1, #1
-	strh	r0, [r3, r4, lsl #1]	@ movhi
-	strh	r2, [r3, #138]	@ movhi
-	strh	r1, [r3, #112]	@ movhi
-	pop	{r3, r4, r5, r6, r7, pc}
-.L682:
-	adds	r2, r2, #1
-	b	.L681
-.L687:
-	.align	2
-.L686:
-	.word	.LANCHOR46
-	.word	.LANCHOR78
-	.word	.LC0
-	.size	ftl_free_sys_blk, .-ftl_free_sys_blk
-	.section	.text.ftl_info_data_recovery,"ax",%progbits
+	@ link register save eliminated.
+	bx	lr
+	.size	gc_hook, .-gc_hook
+	.section	.text.vpn_check,"ax",%progbits
 	.align	1
-	.global	ftl_info_data_recovery
+	.global	vpn_check
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_info_data_recovery, %function
-ftl_info_data_recovery:
+	.type	vpn_check, %function
+vpn_check:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldrh	r1, [r0]
-	movw	r3, #65535
-	push	{r4, r5, lr}
-	cmp	r1, r3
-	beq	.L688
-	ldr	r3, .L697
-	ldr	r4, [r3]
-	add	r2, r4, r1, lsl #2
-	ldrb	r3, [r2, #2]	@ zero_extendqisi2
-	tst	r3, #224
-	bne	.L688
-	ldrb	r0, [r0, #4]	@ zero_extendqisi2
-	bfi	r3, r0, #5, #3
-	strb	r3, [r2, #2]
-	uxtb	r3, r3
-	ldr	r2, .L697+4
-	tst	r3, #8
-	ldr	r5, [r2]
-	beq	.L692
-	ldrh	r0, [r5, #116]
-	subs	r0, r0, #1
-	strh	r0, [r5, #116]	@ movhi
-.L693:
-	and	r3, r3, #224
-	cmp	r3, #160
-	bne	.L695
-	ldr	r3, [r4, r1, lsl #2]
-	ldr	r2, [r2]
-	ubfx	r0, r3, #11, #8
-	adds	r0, r0, #1
-	bfi	r3, r0, #11, #8
-	str	r3, [r4, r1, lsl #2]
-	ldrh	r3, [r2, #120]
-	subs	r3, r3, #1
-	strh	r3, [r2, #120]	@ movhi
-	pop	{r4, r5, pc}
-.L692:
-	tst	r3, #24
-	itete	eq
-	ldrheq	r0, [r5, #114]
-	ldrhne	r0, [r5, #118]
-	addeq	r0, r0, #-1
-	addne	r0, r0, #-1
-	ite	eq
-	strheq	r0, [r5, #114]	@ movhi
-	strhne	r0, [r5, #118]	@ movhi
-	b	.L693
-.L695:
-	ldrh	r0, [r4, r1, lsl #2]
-	cmp	r3, #64
-	add	r5, r0, #1
-	bfi	r0, r5, #0, #11
-	strh	r0, [r4, r1, lsl #2]	@ movhi
-	bne	.L696
-	ldr	r2, [r2]
-	ldrh	r3, [r2, #122]
-	subs	r3, r3, #1
-	strh	r3, [r2, #122]	@ movhi
-	pop	{r4, r5, pc}
-.L696:
-	cmp	r3, #96
-	itttt	eq
-	ldreq	r2, [r2]
-	ldrheq	r3, [r2, #124]
-	addeq	r3, r3, #-1
-	strheq	r3, [r2, #124]	@ movhi
-.L688:
-	pop	{r4, r5, pc}
-.L698:
-	.align	2
-.L697:
-	.word	.LANCHOR57
-	.word	.LANCHOR46
-	.size	ftl_info_data_recovery, .-ftl_info_data_recovery
-	.section	.text.ftl_get_ppa_from_index,"ax",%progbits
+	@ link register save eliminated.
+	bx	lr
+	.size	vpn_check, .-vpn_check
+	.section	.text.FtlGetCurEraseBlock,"ax",%progbits
 	.align	1
-	.global	ftl_get_ppa_from_index
+	.global	FtlGetCurEraseBlock
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_get_ppa_from_index, %function
-ftl_get_ppa_from_index:
+	.type	FtlGetCurEraseBlock, %function
+FtlGetCurEraseBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L704
-	push	{r4, r5, r6, lr}
-	mov	r4, r0
-	ldr	r5, [r3]
-	ldr	r3, .L704+4
-	ldrh	r2, [r3]
-	ldr	r3, .L704+8
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	mul	r1, r3, r2
-	cmp	r0, r1
-	itet	ge
-	smulbbge	r3, r3, r2
-	addlt	r5, r5, #16
-	addge	r5, r5, #48
-	ldrb	r6, [r5, #9]	@ zero_extendqisi2
-	itt	ge
-	subge	r4, r0, r3
-	uxthge	r4, r4
-	mov	r1, r6
-	mov	r0, r4
-	bl	__aeabi_idiv
-	smulbb	r6, r0, r6
-	movw	r2, #65535
-	subs	r4, r4, r6
-	uxth	r4, r4
-	adds	r4, r4, #8
-	ldrh	r3, [r5, r4, lsl #1]
-	cmp	r3, r2
-	bne	.L702
-	movw	r2, #837
-	ldr	r1, .L704+12
-	ldr	r0, .L704+16
-	bl	printf
-.L703:
-	b	.L703
-.L702:
-	ldr	r2, .L704+20
-	ldrh	r2, [r2]
-	mla	r0, r3, r2, r0
-	pop	{r4, r5, r6, pc}
-.L705:
+	@ link register save eliminated.
+	ldr	r3, .L673
+	ldrh	r0, [r3]
+	bx	lr
+.L674:
 	.align	2
-.L704:
+.L673:
 	.word	.LANCHOR60
-	.word	.LANCHOR79
-	.word	.LANCHOR69
-	.word	.LANCHOR80
-	.word	.LC0
-	.word	.LANCHOR75
-	.size	ftl_get_ppa_from_index, .-ftl_get_ppa_from_index
-	.section	.text.lpa_hash_get_ppa,"ax",%progbits
+	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
+	.section	.text.FtlGetAllBlockNum,"ax",%progbits
 	.align	1
-	.global	lpa_hash_get_ppa
+	.global	FtlGetAllBlockNum
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	lpa_hash_get_ppa, %function
-lpa_hash_get_ppa:
+	.type	FtlGetAllBlockNum, %function
+FtlGetAllBlockNum:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L710
-	uxtb	r2, r0
-	push	{r4, r5}
-	ldrh	r3, [r3, r2, lsl #1]
-	ldr	r2, .L710+4
-	ldr	r1, [r2]
-	ldr	r2, .L710+8
-	ldr	r4, [r2]
-	movw	r2, #65535
-.L707:
-	cmp	r3, r2
-	bne	.L709
-	mov	r0, #-1
-	pop	{r4, r5}
+	ldr	r3, .L676
+	ldrh	r0, [r3]
 	bx	lr
-.L709:
-	ldr	r5, [r1, r3, lsl #2]
-	cmp	r0, r5
-	bne	.L708
-	mov	r0, r3
-	pop	{r4, r5}
-	b	ftl_get_ppa_from_index
-.L708:
-	ldrh	r3, [r4, r3, lsl #1]
-	b	.L707
-.L711:
+.L677:
 	.align	2
-.L710:
-	.word	.LANCHOR81
-	.word	.LANCHOR82
-	.word	.LANCHOR83
-	.size	lpa_hash_get_ppa, .-lpa_hash_get_ppa
-	.section	.text.ftl_get_new_free_page,"ax",%progbits
+.L676:
+	.word	.LANCHOR6
+	.size	FtlGetAllBlockNum, .-FtlGetAllBlockNum
+	.section	.text.FtlLowFormat,"ax",%progbits
 	.align	1
-	.global	ftl_get_new_free_page
+	.global	FtlLowFormat
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_get_new_free_page, %function
-ftl_get_new_free_page:
+	.type	FtlLowFormat, %function
+FtlLowFormat:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldrh	r1, [r0]
-	movw	r2, #65535
-	push	{r4, r5, r6, lr}
-	mov	r3, r0
-	cmp	r1, r2
-	bne	.L713
-	mov	r2, #948
-	ldr	r1, .L723
-	ldr	r0, .L723+4
-	bl	printf
-.L714:
-	b	.L714
-.L713:
-	ldr	r1, .L723+8
-	ldrh	r0, [r0, #2]
-	ldrh	r1, [r1]
-	cmp	r0, r1
-	bne	.L715
-	movw	r2, #949
-	ldr	r1, .L723
-	ldr	r0, .L723+4
+	@ link register save eliminated.
+	movs	r0, #0
+	bx	lr
+	.size	FtlLowFormat, .-FtlLowFormat
+	.section	.text.gc_add_sblk,"ax",%progbits
+	.align	1
+	.global	gc_add_sblk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_add_sblk, %function
+gc_add_sblk:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L712
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r5, r0
+	sub	sp, sp, #24
+	mov	r4, r1
+	mov	r8, r2
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bhi	.L680
+	movw	r2, #339
+	ldr	r1, .L712+4
+	ldr	r0, .L712+8
 	bl	printf
-.L716:
-	b	.L716
-.L715:
-	ldrh	r1, [r3, #6]
-	cbnz	r1, .L717
-	movw	r2, #950
-	ldr	r1, .L723
-	ldr	r0, .L723+4
+.L680:
+	ldr	r3, .L712+12
+	lsl	r10, r5, #2
+	ldr	r6, .L712+16
+	ldr	fp, .L712+44
+	ldr	r2, [r3]
+	str	r3, [sp, #20]
+	ldrh	r7, [r2, r5, lsl #1]
+	ldr	r2, [r6]
+	tst	r2, #256
+	beq	.L681
+	ldr	r2, .L712+20
+	mov	r1, r5
+	ldr	r3, [fp]
+	ldr	r0, .L712+24
+	ldrh	r2, [r2]
+	add	r3, r3, r10
+	ldrb	r3, [r3, #2]	@ zero_extendqisi2
+	str	r2, [sp, #8]
+	ldr	r2, .L712+28
+	lsrs	r3, r3, #5
+	ldrh	r2, [r2, #52]
+	str	r7, [sp]
+	str	r2, [sp, #4]
+	mov	r2, r4
 	bl	printf
-.L718:
-	b	.L718
-.L717:
-	ldrb	r0, [r3, #5]	@ zero_extendqisi2
-	movs	r6, #0
-	ldr	r4, .L723+12
-	adds	r0, r0, #8
-	ldrh	r0, [r3, r0, lsl #1]
-	ldrb	r5, [r4]	@ zero_extendqisi2
-	mov	r4, r2
-.L719:
-	cmp	r0, r4
-	ldrb	r2, [r3, #5]	@ zero_extendqisi2
-	beq	.L721
-	ldr	r6, .L723+16
-	adds	r2, r2, #1
-	uxtb	r2, r2
-	ldrh	r4, [r3, #2]
-	subs	r1, r1, #1
-	ldrh	r6, [r6]
-	cmp	r5, r2
-	strh	r1, [r3, #6]	@ movhi
-	ldrh	r1, [r3, #10]
-	strb	r2, [r3, #5]
-	it	eq
-	addeq	r2, r4, #1
-	mul	r0, r0, r6
-	it	eq
-	strheq	r2, [r3, #2]	@ movhi
-	add	r1, r1, #1
-	it	eq
-	moveq	r2, #0
-	strh	r1, [r3, #10]	@ movhi
-	it	eq
-	strbeq	r2, [r3, #5]
-	orrs	r0, r0, r4
-	pop	{r4, r5, r6, pc}
-.L721:
-	adds	r2, r2, #1
-	uxtb	r2, r2
-	cmp	r2, r5
-	strb	r2, [r3, #5]
-	itttt	eq
-	ldrheq	r2, [r3, #2]
-	strbeq	r6, [r3, #5]
-	addeq	r2, r2, #1
-	strheq	r2, [r3, #2]	@ movhi
-	ldrb	r2, [r3, #5]	@ zero_extendqisi2
-	adds	r2, r2, #8
-	ldrh	r0, [r3, r2, lsl #1]
-	b	.L719
-.L724:
+.L681:
+	ldr	r3, [fp]
+	add	r10, r10, r3
+	ldrb	r2, [r10, #2]	@ zero_extendqisi2
+	ands	r10, r2, #224
+	bne	.L682
+	cmp	r7, #0
+	beq	.L702
+	mov	r2, #344
+	ldr	r1, .L712+4
+	ldr	r0, .L712+8
+	bl	printf
+.L700:
+	movs	r0, #0
+	b	.L679
+.L682:
+	ldr	r1, .L712+28
+	ldrh	r3, [r1]
+	cmp	r3, r5
+	beq	.L700
+	ldr	r7, .L712+32
+	ldr	r3, [r7]
+	ldrh	r0, [r3, #48]
+	cmp	r0, r5
+	beq	.L700
+	ldrh	r0, [r3, #16]
+	cmp	r0, r5
+	beq	.L700
+	ldrh	r0, [r3, #80]
+	cmp	r0, r5
+	beq	.L700
+	ldrh	ip, [r1, #52]!
+	movs	r0, #0
+.L684:
+	cmp	r0, ip
+	bcc	.L685
+	cmp	r4, #0
+	bne	.L689
+	ldr	r1, .L712+36
+	ldrh	r0, [r1]
+	cmp	r5, r0
+	beq	.L700
+	ldr	lr, .L712+48
+	mov	r1, r4
+.L688:
+	ldrh	r10, [lr, r1, lsl #1]
+	cmp	r5, r10
+	bne	.L687
+	ldr	r7, [r6]
+	ands	r7, r7, #256
+	beq	.L702
+	ldr	r3, [sp, #20]
+	lsrs	r2, r2, #5
+	mov	r1, r5
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r5, lsl #1]
+	str	r0, [sp, #4]
+	str	r5, [sp]
+	ldr	r0, .L712+40
+	bl	printf
+	b	.L700
+.L685:
+	ldrh	lr, [r1, #2]!
+	cmp	lr, r5
+	beq	.L700
+	adds	r0, r0, #1
+	b	.L684
+.L687:
+	adds	r1, r1, #1
+	cmp	r1, #8
+	bne	.L688
+	add	r3, r3, r8, lsl #7
+	add	r10, r3, #136
+.L690:
+	ldr	r3, [r6]
+	lsls	r3, r3, #23
+	bpl	.L691
+	ldr	r3, .L712+20
+	mov	r1, r5
+	ldr	r0, .L712+24
+	ldrh	r3, [r3]
+	str	ip, [sp, #4]
+	str	r3, [sp, #8]
+	ldr	r3, [sp, #20]
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r5, lsl #1]
+	str	r3, [sp]
+	lsrs	r3, r2, #5
+	mov	r2, r4
+	bl	printf
+.L691:
+	mov	r3, r10
+	add	r1, r10, #128
+	movw	r0, #65535
+.L694:
+	mov	r2, r3
+	adds	r3, r3, #2
+	ldrh	r6, [r2]
+	cmp	r6, r0
+	bne	.L692
+	strh	r5, [r2]	@ movhi
+	cbz	r4, .L693
+	ldr	r2, [r7]
+	ldrh	r3, [r2, #124]
+	adds	r3, r3, #1
+	strh	r3, [r2, #124]	@ movhi
+.L711:
+	movs	r0, #1
+.L679:
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L689:
+	add	r10, r3, #392
+	b	.L690
+.L693:
+	ldr	r3, [r7]
+	add	r8, r3, r8, lsl #1
+	ldrh	r3, [r8, #120]
+	adds	r3, r3, #1
+	strh	r3, [r8, #120]	@ movhi
+	b	.L711
+.L692:
+	cmp	r1, r3
+	bne	.L694
+	b	.L711
+.L702:
+	mov	r0, r7
+	b	.L679
+.L713:
 	.align	2
-.L723:
-	.word	.LANCHOR84
+.L712:
+	.word	.LANCHOR6
+	.word	.LANCHOR61
 	.word	.LC0
-	.word	.LANCHOR79
-	.word	.LANCHOR69
-	.word	.LANCHOR75
-	.size	ftl_get_new_free_page, .-ftl_get_new_free_page
-	.section	.text.ftl_ext_alloc_new_blk,"ax",%progbits
+	.word	.LANCHOR9
+	.word	.LANCHOR14
+	.word	.LANCHOR62
+	.word	.LC43
+	.word	.LANCHOR63
+	.word	.LANCHOR10
+	.word	.LANCHOR64
+	.word	.LC44
+	.word	.LANCHOR7
+	.word	.LANCHOR65
+	.size	gc_add_sblk, .-gc_add_sblk
+	.section	.text.gc_mark_bad_ppa,"ax",%progbits
 	.align	1
-	.global	ftl_ext_alloc_new_blk
+	.global	gc_mark_bad_ppa
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_ext_alloc_new_blk, %function
-ftl_ext_alloc_new_blk:
+	.type	gc_mark_bad_ppa, %function
+gc_mark_bad_ppa:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	bl	ftl_alloc_sys_blk
-	subs	r3, r0, #1
-	movw	r2, #65533
-	uxth	r3, r3
-	mov	r4, r0
-	cmp	r3, r2
-	bls	.L726
-	movw	r2, #981
-	ldr	r1, .L728
-	ldr	r0, .L728+4
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	mov	r8, r0
+	ldr	r3, .L718
+	movs	r7, #1
+	ldr	r4, .L718+4
+	ldrh	r0, [r3]
+	ldr	r3, .L718+8
+	lsr	r6, r8, r0
+	rsb	r0, r0, #21
+	lsl	r0, r7, r0
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	uxth	r5, r6
+	subs	r0, r0, #1
+	ands	r0, r0, r6
+	bl	__aeabi_uidiv
+	uxth	r10, r0
+	mov	r3, r8
+	mov	r2, r5
+	ldr	r1, [r4, #324]
+	ldr	r0, .L718+12
 	bl	printf
-.L727:
-	b	.L727
-.L726:
-	ldr	r5, .L728+8
+	mov	r1, r7
+	movs	r2, #0
+	mov	r0, r10
+	bl	gc_add_sblk
+	ldr	r3, [r4, #324]
 	movs	r1, #0
-	bl	ftl_erase_phy_blk
-	ldr	r3, [r5]
-	ldrh	r0, [r3, #130]
-	bl	ftl_free_sys_blk
-	ldr	r3, [r5]
+.L715:
+	uxth	r2, r1
+	cmp	r3, r2
+	bhi	.L717
+	cmp	r3, #5
+	itttt	ls
+	addls	r2, r3, #1
+	addls	r3, r3, #164
+	strls	r2, [r4, #324]
+	strhls	r5, [r4, r3, lsl #1]	@ movhi
+	b	.L716
+.L717:
+	adds	r2, r2, #164
+	adds	r1, r1, #1
+	ldrh	r2, [r4, r2, lsl #1]
+	cmp	r5, r2
+	bne	.L715
+.L716:
 	movs	r0, #0
-	strh	r4, [r3, #130]	@ movhi
-	strh	r0, [r3, #140]	@ movhi
-	pop	{r3, r4, r5, pc}
-.L729:
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L719:
 	.align	2
-.L728:
-	.word	.LANCHOR85
-	.word	.LC0
-	.word	.LANCHOR46
-	.size	ftl_ext_alloc_new_blk, .-ftl_ext_alloc_new_blk
-	.section	.text.ftl_total_vpn_update,"ax",%progbits
+.L718:
+	.word	.LANCHOR66
+	.word	.LANCHOR63
+	.word	.LANCHOR67
+	.word	.LC45
+	.size	gc_mark_bad_ppa, .-gc_mark_bad_ppa
+	.section	.text.gc_get_src_ppa_from_index,"ax",%progbits
 	.align	1
-	.global	ftl_total_vpn_update
+	.global	gc_get_src_ppa_from_index
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_total_vpn_update, %function
-ftl_total_vpn_update:
+	.type	gc_get_src_ppa_from_index, %function
+gc_get_src_ppa_from_index:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L737
-	push	{r4, r5, r6, r7, lr}
-	mov	r1, r2
-	ldrh	r3, [r2]
-	cmp	r3, #4
-	bhi	.L731
-	cbnz	r0, .L731
-	adds	r3, r3, #1
-	strh	r3, [r2]	@ movhi
-	pop	{r4, r5, r6, r7, pc}
-.L731:
-	ldr	r2, .L737+4
-	movs	r3, #0
-	strh	r3, [r1]	@ movhi
-	movw	ip, #65535
-	mov	r1, r3
-	ldrh	r5, [r2]
-	ldr	r2, .L737+8
-	ldr	r6, [r2]
-	ldr	r2, .L737+12
-	ldr	r7, [r2]
-	mov	r2, r3
-.L733:
-	uxth	r0, r3
-	cmp	r5, r0
-	bhi	.L736
-	ldr	r3, .L737+16
+	@ link register save eliminated.
+	ldr	r3, .L721
 	ldr	r3, [r3]
-	str	r1, [r3, #524]
-	str	r2, [r3, #528]
-	pop	{r4, r5, r6, r7, pc}
-.L736:
-	ldrh	r0, [r6, r3, lsl #1]
-	cmp	r0, ip
-	beq	.L734
-	add	r4, r7, r3, lsl #2
-	ldrb	r4, [r4, #2]	@ zero_extendqisi2
-	and	r4, r4, #224
-	cmp	r4, #160
-	ite	eq
-	addeq	r2, r2, r0
-	addne	r1, r1, r0
-.L734:
+	ldr	r0, [r3, r0, lsl #2]
+	bx	lr
+.L722:
+	.align	2
+.L721:
+	.word	.LANCHOR68
+	.size	gc_get_src_ppa_from_index, .-gc_get_src_ppa_from_index
+	.section	.text.gc_write_completed,"ax",%progbits
+	.align	1
+	.global	gc_write_completed
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_write_completed, %function
+gc_write_completed:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r5, .L752
+.L724:
+	ldr	r1, .L752+4
+	ldrb	r7, [r1]	@ zero_extendqisi2
+	cmp	r7, #255
+	bne	.L737
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L737:
+	movs	r3, #48
+	muls	r3, r7, r3
+	adds	r2, r5, r3
+	ldrb	r3, [r5, r3]	@ zero_extendqisi2
+	ldrh	r6, [r2, #32]
+	strb	r3, [r1]
+	ldr	r1, [r2, #36]
+	cbz	r1, .L725
+	ldr	r3, .L752+8
+	movs	r0, #1
+	ldr	r2, [r2, #24]
+	strh	r0, [r3, #316]	@ movhi
+	ldr	r0, .L752+12
+	str	r2, [r3, #320]
+	bl	printf
+	movw	r2, #673
+	ldr	r1, .L752+16
+	ldr	r0, .L752+20
+	bl	printf
+.L725:
+	ldr	fp, .L752+48
+	ldrb	r3, [fp]	@ zero_extendqisi2
+	cmp	r3, #3
+	bne	.L726
+	ldr	r3, .L752+24
+	ldr	r3, [r3]
+	ldrb	r4, [r3, #89]	@ zero_extendqisi2
+	add	r4, r4, r4, lsl #1
+.L727:
+	ldr	r3, .L752+28
+	ldr	r10, .L752+52
+	ldr	r3, [r3]
+	tst	r3, #256
+	beq	.L728
+	movs	r3, #48
+	mov	r1, r6
+	mla	r3, r3, r7, r5
+	ldr	r0, .L752+32
+	ldrb	r2, [r3, #1]	@ zero_extendqisi2
+	ldr	r3, [r10]
+	ldrb	r3, [r3, r6]	@ zero_extendqisi2
+	str	r3, [sp]
+	mov	r3, r6
+	bl	printf
+.L728:
+	movs	r3, #48
+	ldr	r2, [r10]
+	mla	r3, r3, r7, r5
+	ldrb	r2, [r2, r6]	@ zero_extendqisi2
+	mov	r8, r6
+	ldrb	r3, [r3, #1]	@ zero_extendqisi2
+	cmp	r2, r3
+	beq	.L729
+	movw	r2, #682
+	ldr	r1, .L752+16
+	ldr	r0, .L752+20
+	bl	printf
+.L729:
+	movs	r3, #48
+	mla	r7, r3, r7, r5
+	ldrb	r3, [r7, #45]	@ zero_extendqisi2
+	cmp	r3, #3
+	beq	.L730
+	ldrb	r3, [fp]	@ zero_extendqisi2
+	cmp	r3, #3
+	bne	.L730
+	ldr	r3, .L752+36
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L730
+	ldr	r3, .L752+40
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L731
+	ldr	r3, .L752+44
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L730
+.L731:
+	ldr	r2, [r10]
+	movs	r3, #0
+	movs	r1, #48
+	mov	r0, r3
+	add	r6, r6, r2
+.L732:
+	uxth	r2, r3
+	cmp	r4, r2
+	bls	.L724
+	ldrb	r2, [r6, r3]	@ zero_extendqisi2
 	adds	r3, r3, #1
+	mla	r2, r1, r2, r5
+	strb	r0, [r2, #45]
+	b	.L732
+.L726:
+	ldr	r3, .L752+40
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L739
+	ldr	r3, .L752+44
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L739
+	ldr	r3, .L752+24
+	ldr	r3, [r3]
+	ldrb	r4, [r3, #89]	@ zero_extendqisi2
+	lsls	r4, r4, #1
+	b	.L727
+.L739:
+	movs	r4, #1
+	b	.L727
+.L730:
+	ldr	r7, .L752+8
+	mov	fp, #255
+	movs	r3, #48
+	strh	r6, [r7, #312]	@ movhi
+.L733:
+	sub	r2, r8, r6
+	uxth	r2, r2
+	cmp	r4, r2
+	bls	.L724
+	ldr	r2, [r10]
+	movs	r1, #0
+	str	r3, [sp, #12]
+	ldrb	r0, [r2, r8]	@ zero_extendqisi2
+	strb	fp, [r2, r8]
+	add	r8, r8, #1
+	mla	r2, r3, r0, r5
+	add	r0, r0, r0, lsl #1
+	strb	r1, [r2, #45]
+	add	r0, r5, r0, lsl #4
+	bl	buf_free
+	ldrb	r2, [r7, #7]	@ zero_extendqisi2
+	ldr	r3, [sp, #12]
+	subs	r2, r2, #1
+	strb	r2, [r7, #7]
 	b	.L733
-.L738:
+.L753:
 	.align	2
-.L737:
-	.word	.LANCHOR86
-	.word	.LANCHOR54
-	.word	.LANCHOR56
-	.word	.LANCHOR57
-	.word	.LANCHOR60
-	.size	ftl_total_vpn_update, .-ftl_total_vpn_update
-	.section	.text.ftl_debug_info_fill,"ax",%progbits
+.L752:
+	.word	.LANCHOR50
+	.word	.LANCHOR69
+	.word	.LANCHOR63
+	.word	.LC46
+	.word	.LANCHOR70
+	.word	.LC0
+	.word	.LANCHOR10
+	.word	.LANCHOR14
+	.word	.LC47
+	.word	.LANCHOR75
+	.word	.LANCHOR72
+	.word	.LANCHOR73
+	.word	.LANCHOR71
+	.word	.LANCHOR74
+	.size	gc_write_completed, .-gc_write_completed
+	.section	.text.gc_get_src_blk,"ax",%progbits
 	.align	1
-	.global	ftl_debug_info_fill
+	.global	gc_get_src_blk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_debug_info_fill, %function
-ftl_debug_info_fill:
+	.type	gc_get_src_blk, %function
+gc_get_src_blk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	movs	r0, #0
-	bx	lr
-	.size	ftl_debug_info_fill, .-ftl_debug_info_fill
-	.section	.text.ftl_vpn_update,"ax",%progbits
+	ldr	r3, .L763
+	push	{r4, r5, r6, r7, lr}
+	ldr	r2, [r3]
+	ldr	r3, .L763+4
+	ldrh	r4, [r2, #124]
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	cbz	r4, .L755
+	add	r3, r2, #392
+	movs	r4, #1
+.L756:
+	add	r6, r3, #128
+	movw	r5, #65535
+.L760:
+	mov	r7, r3
+	ldrh	r0, [r3], #2
+	cmp	r0, r5
+	beq	.L758
+	strh	r5, [r7]	@ movhi
+	cbz	r4, .L759
+	ldrh	r3, [r2, #124]
+	subs	r3, r3, #1
+	strh	r3, [r2, #124]	@ movhi
+	pop	{r4, r5, r6, r7, pc}
+.L755:
+	add	r3, r1, #60
+	ldrh	r3, [r2, r3, lsl #1]
+	cbz	r3, .L761
+	add	r3, r2, r1, lsl #7
+	adds	r3, r3, #136
+	b	.L756
+.L759:
+	add	r2, r2, r1, lsl #1
+	ldrh	r3, [r2, #120]
+	subs	r3, r3, #1
+	strh	r3, [r2, #120]	@ movhi
+	pop	{r4, r5, r6, r7, pc}
+.L758:
+	cmp	r3, r6
+	bne	.L760
+	pop	{r4, r5, r6, r7, pc}
+.L761:
+	movw	r0, #65535
+	pop	{r4, r5, r6, r7, pc}
+.L764:
+	.align	2
+.L763:
+	.word	.LANCHOR10
+	.word	.LANCHOR76
+	.size	gc_get_src_blk, .-gc_get_src_blk
+	.section	.text.gc_free_temp_buf,"ax",%progbits
 	.align	1
-	.global	ftl_vpn_update
+	.global	gc_free_temp_buf
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_vpn_update, %function
-ftl_vpn_update:
+	.type	gc_free_temp_buf, %function
+gc_free_temp_buf:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L741
+	push	{r3, r4, r5, r6, r7, lr}
+	ldr	r5, .L779
+	ldrb	r0, [r5, #7]	@ zero_extendqisi2
+	cbz	r0, .L765
+	ldr	r3, .L779+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #1
+	bhi	.L772
+	ldr	r3, .L779+8
+	movs	r7, #48
+	ldrh	r4, [r5, #312]
+	ldr	r6, .L779+12
+	ldrh	r2, [r3]
+	ldr	r3, .L779+16
+	add	r1, r4, #24
+	ldr	r0, .L779+20
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	muls	r2, r3, r2
+	cmp	r2, r1
+	it	cs
+	movcs	r2, r1
+	ldr	r1, [r6]
+.L767:
+	cmp	r4, r2
+	bcc	.L770
+.L772:
+	movs	r0, #0
+.L765:
+	pop	{r3, r4, r5, r6, r7, pc}
+.L770:
+	ldrb	r3, [r1, r4]	@ zero_extendqisi2
+	cmp	r3, #255
+	beq	.L768
+	mla	ip, r7, r3, r0
+	ldrb	ip, [ip, #45]	@ zero_extendqisi2
+	cmp	ip, #0
+	bne	.L768
+	add	r3, r3, r3, lsl #1
+	add	r0, r0, r3, lsl #4
+	bl	buf_free
+	ldr	r3, .L779+24
 	ldr	r3, [r3]
-	ldrh	r0, [r3, r0, lsl #1]
-	clz	r0, r0
-	lsrs	r0, r0, #5
-	bx	lr
-.L742:
+	lsls	r3, r3, #23
+	bpl	.L769
+	ldr	r3, [r6]
+	mov	r1, r4
+	ldr	r0, .L779+28
+	ldrb	r2, [r3, r4]	@ zero_extendqisi2
+	bl	printf
+.L769:
+	ldr	r3, [r6]
+	movs	r2, #255
+	movs	r0, #1
+	strb	r2, [r3, r4]
+	ldrb	r3, [r5, #7]	@ zero_extendqisi2
+	subs	r3, r3, #1
+	strb	r3, [r5, #7]
+	pop	{r3, r4, r5, r6, r7, pc}
+.L768:
+	adds	r4, r4, #1
+	b	.L767
+.L780:
 	.align	2
-.L741:
-	.word	.LANCHOR56
-	.size	ftl_vpn_update, .-ftl_vpn_update
-	.section	.text.ftl_vpn_decrement,"ax",%progbits
+.L779:
+	.word	.LANCHOR63
+	.word	.LANCHOR52
+	.word	.LANCHOR77
+	.word	.LANCHOR74
+	.word	.LANCHOR78
+	.word	.LANCHOR50
+	.word	.LANCHOR14
+	.word	.LC48
+	.size	gc_free_temp_buf, .-gc_free_temp_buf
+	.section	.text.print_gc_debug_info,"ax",%progbits
 	.align	1
-	.global	ftl_vpn_decrement
+	.global	print_gc_debug_info
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_vpn_decrement, %function
-ftl_vpn_decrement:
+	.type	print_gc_debug_info, %function
+print_gc_debug_info:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	movw	r3, #65535
-	push	{r4, lr}
-	cmp	r0, r3
-	mov	r1, r0
-	beq	.L744
-	ldr	r3, .L749
-	ldr	r3, [r3]
-	ldrh	r4, [r3, r0, lsl #1]
-	cbnz	r4, .L745
-	mov	r2, r4
-	ldr	r0, .L749+4
-	bl	printf
-.L748:
-	movs	r0, #0
-	pop	{r4, pc}
-.L745:
-	subs	r4, r4, #1
-	strh	r4, [r3, r0, lsl #1]	@ movhi
-.L744:
-	ldr	r2, .L749+8
-	ldrh	r0, [r2]
-	cmp	r1, r0
-	beq	.L748
-	movw	r3, #65535
-	cmp	r0, r3
-	bne	.L747
-	strh	r1, [r2]	@ movhi
-	b	.L748
-.L747:
-	bl	ftl_vpn_update
-	adds	r0, r0, #0
-	strh	r1, [r2]	@ movhi
-	it	ne
-	movne	r0, #1
+	push	{r0, r1, r2, r3, r4, lr}
+	ldr	r4, .L782
+	ldr	r0, .L782+4
+	ldrh	r4, [r4]
+	ldrh	r3, [r0, #310]
+	ldrh	r2, [r0, #2]
+	ldrh	r1, [r0]
+	str	r4, [sp, #8]
+	ldrb	r0, [r0, #7]	@ zero_extendqisi2
+	str	r0, [sp, #4]
+	ldr	r0, .L782+8
+	ldrb	r0, [r0]	@ zero_extendqisi2
+	str	r0, [sp]
+	ldr	r0, .L782+12
+	bl	printf
+	add	sp, sp, #16
+	@ sp needed
 	pop	{r4, pc}
-.L750:
+.L783:
 	.align	2
-.L749:
-	.word	.LANCHOR56
-	.word	.LC17
-	.word	.LANCHOR87
-	.size	ftl_vpn_decrement, .-ftl_vpn_decrement
-	.section	.text.lpa_hash_update_ppa,"ax",%progbits
+.L782:
+	.word	.LANCHOR79
+	.word	.LANCHOR63
+	.word	.LANCHOR52
+	.word	.LC49
+	.size	print_gc_debug_info, .-print_gc_debug_info
+	.section	.text.zftl_get_gc_node,"ax",%progbits
 	.align	1
-	.global	lpa_hash_update_ppa
+	.global	zftl_get_gc_node
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	lpa_hash_update_ppa, %function
-lpa_hash_update_ppa:
+	.type	zftl_get_gc_node, %function
+zftl_get_gc_node:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	uxtb	ip, r0
-	ldr	r4, .L762
-	movw	r6, #65535
-	mov	fp, r6
-	ldr	r5, .L762+4
-	ldr	lr, [r4]
-	ldr	r4, .L762+8
-	ldrh	r3, [r5, ip, lsl #1]
-	ldr	r4, [r4]
-.L752:
-	cmp	r3, fp
-	beq	.L756
-	ldr	r7, [lr, r3, lsl #2]
-	add	r8, lr, r3, lsl #2
-	cmp	r0, r7
-	bne	.L753
-	cmp	r6, fp
-	mov	r10, #-1
-	ite	eq
-	ldrheq	r6, [r4, r3, lsl #1]
-	ldrhne	r7, [r4, r3, lsl #1]
-	str	r10, [r8]
-	ite	eq
-	strheq	r6, [r5, ip, lsl #1]	@ movhi
-	strhne	r7, [r4, r6, lsl #1]	@ movhi
-	movw	r6, #65535
-	strh	r6, [r4, r3, lsl #1]	@ movhi
-.L756:
-	ldrh	r3, [r5, ip, lsl #1]
-	str	r0, [lr, r2, lsl #2]
-	strh	r2, [r5, ip, lsl #1]	@ movhi
-	strh	r3, [r4, r2, lsl #1]	@ movhi
-	adds	r3, r1, #1
-	beq	.L758
-	ldr	r3, .L762+12
-	ldrh	r0, [r3]
-	movs	r3, #1
-	rsb	r2, r0, #21
-	lsls	r3, r3, r2
-	ldr	r2, .L762+16
-	lsr	r0, r1, r0
-	subs	r3, r3, #1
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	ands	r0, r0, r3
-	bl	__aeabi_uidiv
-	uxth	r0, r0
-	bl	ftl_vpn_decrement
-.L758:
-	mov	r0, #-1
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L753:
-	mov	r6, r3
-	ldrh	r3, [r4, r3, lsl #1]
-	b	.L752
-.L763:
+	@ link register save eliminated.
+	cmp	r1, #5
+	bne	.L785
+	ldr	r3, .L788
+	mov	r1, r0
+.L787:
+	ldr	r0, [r3]
+	b	_list_get_gc_head_node.isra.2
+.L785:
+	cmp	r1, #2
+	bne	.L786
+	b	zftl_get_gc_node.part.9
+.L786:
+	mov	r1, r0
+	ldr	r3, .L788+4
+	b	.L787
+.L789:
 	.align	2
-.L762:
-	.word	.LANCHOR82
+.L788:
+	.word	.LANCHOR80
 	.word	.LANCHOR81
-	.word	.LANCHOR83
-	.word	.LANCHOR71
-	.word	.LANCHOR70
-	.size	lpa_hash_update_ppa, .-lpa_hash_update_ppa
-	.section	.text.ftl_write_completed,"ax",%progbits
+	.size	zftl_get_gc_node, .-zftl_get_gc_node
+	.section	.text.gc_search_src_blk,"ax",%progbits
 	.align	1
-	.global	ftl_write_completed
+	.global	gc_search_src_blk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_write_completed, %function
-ftl_write_completed:
-	@ args = 0, pretend = 0, frame = 0
+	.type	gc_search_src_blk, %function
+gc_search_src_blk:
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L889
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r7, .L772
-	ldr	r6, .L772+4
-.L765:
-	ldrb	r3, [r7]	@ zero_extendqisi2
-	cmp	r3, #255
-	bne	.L771
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L771:
-	movs	r2, #48
-	add	r5, r3, r3, lsl #1
-	muls	r3, r2, r3
-	add	r5, r6, r5, lsl #4
-	adds	r4, r6, r3
-	ldrb	r3, [r6, r3]	@ zero_extendqisi2
-	strb	r3, [r7]
-	ldr	r3, [r4, #36]
-	adds	r3, r3, #1
-	bne	.L766
-	ldr	r3, .L772+8
-	mov	r8, #1
-	ldr	r10, [r4, #24]
-	ldrh	r0, [r3]
-	ldr	r3, .L772+12
-	rsb	r2, r0, #21
-	lsl	r2, r8, r2
-	lsr	r0, r10, r0
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	subs	r2, r2, #1
-	ands	r0, r0, r2
-	bl	__aeabi_uidiv
-	uxth	fp, r0
-	mov	r3, r10
-	ldr	r2, [r4, #20]
-	mov	r1, fp
-	ldr	r0, .L772+16
-	bl	printf
-	movs	r2, #0
-	mov	r1, r8
-	mov	r0, fp
-	bl	gc_add_sblk
-	ldr	r3, .L772+20
+	sub	sp, sp, #32
+	str	r2, [sp, #12]
+	add	r2, r0, #60
+	mov	fp, r0
 	ldr	r3, [r3]
-	ldrh	r2, [r3, #16]
-	cmp	r2, fp
-	bne	.L767
-	movs	r2, #0
-	strh	r2, [r3, #22]	@ movhi
-.L768:
-	mov	r0, r5
-	bl	ftl_write_buf
-	b	.L765
-.L767:
-	ldrh	r2, [r3, #48]
-	cmp	r2, fp
-	itt	eq
-	moveq	r2, #0
-	strheq	r2, [r3, #54]	@ movhi
-	b	.L768
-.L766:
-	ldrh	r2, [r4, #32]
-	ldr	r1, [r4, #28]
-	ldr	r0, [r4, #20]
-	bl	lpa_hash_update_ppa
-	ldrb	r3, [r4, #2]	@ zero_extendqisi2
-	lsls	r2, r3, #29
-	bpl	.L770
-	bic	r3, r3, #2
-	strb	r3, [r4, #2]
-	b	.L765
-.L770:
+	str	r1, [sp, #16]
+	ldrh	r5, [r3, r2, lsl #1]
+	cbz	r5, .L791
 	mov	r0, r5
-	bl	buf_free
-	b	.L765
-.L773:
-	.align	2
-.L772:
-	.word	.LANCHOR88
-	.word	.LANCHOR36
-	.word	.LANCHOR71
-	.word	.LANCHOR70
-	.word	.LC18
-	.word	.LANCHOR60
-	.size	ftl_write_completed, .-ftl_write_completed
-	.section	.text.ftl_mask_bad_block,"ax",%progbits
-	.align	1
-	.global	ftl_mask_bad_block
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_mask_bad_block, %function
-ftl_mask_bad_block:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	ubfx	r4, r0, #21, #3
-	ldr	r3, .L780
-	ldrh	r2, [r3]
-	movs	r3, #1
-	rsb	r1, r2, #21
-	lsls	r3, r3, r1
-	lsrs	r0, r0, r2
-	ldr	r2, .L780+4
-	subs	r3, r3, #1
-	ands	r0, r0, r3
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	bl	__aeabi_uidiv
-	ldr	r3, .L780+8
-	uxtb	r5, r0
+.L790:
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L791:
+	cmp	r0, #0
+	bne	.L793
+	ldr	r10, .L889+28
+	mov	r4, r0
+	ldr	r6, .L889+4
+	mov	r8, r0
+	strh	r0, [r6]	@ movhi
+.L794:
+	ldrh	r5, [sp, #12]
+	uxth	r3, r8
+	cmp	r3, r5
+	bcs	.L799
+	ldrh	r2, [r6]
+	movs	r1, #3
+	mov	r0, r2
+	str	r2, [sp, #20]
+	bl	zftl_get_gc_node
+	ldr	r2, [sp, #20]
+	movw	r3, #65535
+	cmp	r0, r3
+	mov	r7, r0
+	add	r2, r2, #1
+	uxth	r2, r2
+	strh	r2, [r6]	@ movhi
+	beq	.L795
+	ldr	r3, .L889+8
 	ldr	r3, [r3]
-	lsls	r3, r3, #17
-	bpl	.L775
-	mov	r2, r5
-	mov	r1, r4
-	ldr	r0, .L780+12
+	lsls	r3, r3, #23
+	bpl	.L796
+	ldr	r3, [r10]
+	mov	r1, r0
+	ldrh	r3, [r3, r0, lsl #1]
+	ldr	r0, .L889+12
 	bl	printf
-.L775:
-	ldr	r3, .L780+16
+.L796:
+	ldr	r3, [r10]
+	ldrh	r2, [r3, r7, lsl #1]
+	ldr	r3, .L889+16
 	ldrh	r3, [r3]
-	cmp	r3, r5
-	bls	.L774
-	ldr	r3, .L780+20
-	ldr	r2, [r3]
-	movs	r3, #1
-	lsls	r3, r3, r4
-	add	r2, r2, r5, lsl #2
-	ldrb	r4, [r2, #3]	@ zero_extendqisi2
-	orrs	r4, r4, r3
-	strb	r4, [r2, #3]
-.L774:
-	pop	{r3, r4, r5, pc}
-.L781:
-	.align	2
-.L780:
-	.word	.LANCHOR71
-	.word	.LANCHOR70
-	.word	.LANCHOR22
-	.word	.LC19
-	.word	.LANCHOR54
-	.word	.LANCHOR57
-	.size	ftl_mask_bad_block, .-ftl_mask_bad_block
-	.section	.text.print_ftl_debug_info,"ax",%progbits
-	.align	1
-	.global	print_ftl_debug_info
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	print_ftl_debug_info, %function
-print_ftl_debug_info:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L783
-	push	{r4, r5, r6, lr}
-	sub	sp, sp, #32
-	ldr	r4, .L783+4
-	ldr	r5, [r3]
-	ldr	r0, [r4]
-	ldr	r6, [r5, #528]
-	ldrh	r3, [r0, #116]
-	ldrh	r2, [r0, #118]
-	ldrh	r1, [r0, #114]
-	str	r6, [sp, #16]
-	ldr	r5, [r5, #524]
-	str	r5, [sp, #12]
-	ldrh	r5, [r0, #120]
-	str	r5, [sp, #8]
-	ldrh	r5, [r0, #124]
-	str	r5, [sp, #4]
-	ldrh	r0, [r0, #122]
-	str	r0, [sp]
-	ldr	r0, .L783+8
-	bl	printf
-	ldr	r1, [r4]
-	ldr	r3, .L783+12
-	ldr	r0, .L783+16
-	ldr	r2, [r1, #64]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	str	r2, [sp, #4]
-	ldr	r2, [r1, #8]
-	str	r2, [sp]
-	ldr	r2, [r1, #28]
-	ldr	r1, [r1, #20]
-	bl	printf
-	ldr	r1, [r4]
-	ldr	r0, .L783+20
-	ldr	r3, [r1, #16]
-	ldr	r2, [r1, #60]
-	ldr	r1, [r1, #52]
-	lsrs	r3, r3, #11
-	bl	printf
-	ldr	r2, [r4]
-	ldrh	r0, [r2, #98]
-	ldrh	r3, [r2, #88]
-	ldrh	r1, [r2, #74]
-	str	r0, [sp, #24]
-	ldrh	r0, [r2, #94]
-	str	r0, [sp, #20]
-	ldrh	r0, [r2, #90]
-	str	r0, [sp, #16]
-	ldr	r0, [r2, #80]
-	str	r0, [sp, #12]
-	ldrh	r0, [r2, #72]
-	str	r0, [sp, #8]
-	ldrh	r0, [r2, #96]
-	str	r0, [sp, #4]
-	ldrh	r0, [r2, #92]
-	str	r0, [sp]
-	ldr	r0, .L783+24
-	ldr	r2, [r2, #84]
-	bl	printf
-	add	sp, sp, #32
-	@ sp needed
-	pop	{r4, r5, r6, pc}
-.L784:
-	.align	2
-.L783:
-	.word	.LANCHOR60
-	.word	.LANCHOR46
-	.word	.LC20
-	.word	.LANCHOR89
-	.word	.LC21
-	.word	.LC22
-	.word	.LC23
-	.size	print_ftl_debug_info, .-print_ftl_debug_info
-	.section	.text.sblk_init,"ax",%progbits
-	.align	1
-	.global	sblk_init
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	sblk_init, %function
-sblk_init:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r2, .L786
-	movs	r3, #255
-	movs	r0, #0
-	strb	r3, [r2]
-	ldr	r2, .L786+4
-	strb	r3, [r2]
-	ldr	r2, .L786+8
-	strb	r3, [r2]
-	ldr	r2, .L786+12
-	strb	r3, [r2]
-	bx	lr
-.L787:
-	.align	2
-.L786:
-	.word	.LANCHOR90
-	.word	.LANCHOR88
-	.word	.LANCHOR51
-	.word	.LANCHOR62
-	.size	sblk_init, .-sblk_init
-	.section	.text.dump_sblk_queue,"ax",%progbits
-	.align	1
-	.global	dump_sblk_queue
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	dump_sblk_queue, %function
-dump_sblk_queue:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, lr}
-	ldr	r4, .L797
-	ldr	r0, .L797+4
-	ldrb	r1, [r4]	@ zero_extendqisi2
-	bl	printf
-	ldrb	r4, [r4]	@ zero_extendqisi2
-	cmp	r4, #255
-	beq	.L788
-	ldr	r5, .L797+8
-	add	r4, r4, r4, lsl #1
-	ldr	r6, .L797+12
-	add	r4, r5, r4, lsl #4
-.L790:
-	ldr	r3, [r4, #24]
-	mov	r0, r6
-	ldrb	r2, [r4, #42]	@ zero_extendqisi2
-	ldrb	r1, [r4, #1]	@ zero_extendqisi2
-	bl	printf
-	ldrb	r4, [r4]	@ zero_extendqisi2
-	cmp	r4, #255
-	beq	.L788
-	add	r4, r4, r4, lsl #1
-	add	r4, r5, r4, lsl #4
-	b	.L790
-.L788:
-	pop	{r4, r5, r6, pc}
-.L798:
-	.align	2
-.L797:
-	.word	.LANCHOR90
-	.word	.LC24
-	.word	.LANCHOR36
-	.word	.LC25
-	.size	dump_sblk_queue, .-dump_sblk_queue
-	.section	.text.queue_lun_state,"ax",%progbits
-	.align	1
-	.global	queue_lun_state
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	queue_lun_state, %function
-queue_lun_state:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L816
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	ldrb	r5, [r3]	@ zero_extendqisi2
-	cmp	r5, #255
-	beq	.L808
-	ldr	r3, .L816+4
-	ubfx	r10, r0, #21, #3
-	ldr	lr, .L816+12
-	mov	ip, #48
-	ldrh	r7, [r3]
-	movs	r3, #1
-	mov	r8, lr
-	rsb	r2, r7, #21
-	lsls	r3, r3, r2
-	ldr	r2, .L816+8
-	subs	r3, r3, #1
-	ldrb	r6, [r2]	@ zero_extendqisi2
-	asr	r2, r0, r7
-	uxth	r3, r3
-	subs	r6, r6, #1
-	uxth	r6, r6
-	ands	r2, r2, r6
-	ands	r2, r2, r3
-.L807:
-	mla	r0, ip, r5, lr
-	ldr	r4, [r0, #24]
-	ubfx	fp, r4, #21, #3
-	cmp	r10, fp
-	bne	.L801
-	lsrs	r4, r4, r7
-	ldrb	r0, [r0, #42]	@ zero_extendqisi2
-	ands	r4, r4, r6
-	ands	r4, r4, r3
-	cmp	r2, r4
-	bne	.L802
-	cmp	r1, #1
-	bne	.L799
-	cmp	r0, #6
-	beq	.L801
-	cmp	r0, #8
-	beq	.L801
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+	cmp	r2, r3
+	bcs	.L795
+	movs	r2, #0
+	mov	r0, r7
+	mov	r1, r2
+	bl	gc_add_sblk
+	cmp	r0, #0
+	beq	.L798
+	adds	r4, r4, #1
+	uxth	r4, r4
+	cmp	r5, r4
+	bcs	.L798
+.L799:
+	ldr	r3, [sp, #16]
+	lsls	r0, r3, #30
+	bpl	.L801
+	ldr	r6, .L889+20
+	mov	r8, #0
+	ldr	r7, .L889+24
 .L802:
-	cmp	r1, #3
-	bhi	.L801
-	tbb	[pc, r1]
-.L804:
-	.byte	(.L803-.L804)/2
-	.byte	(.L805-.L804)/2
-	.byte	(.L806-.L804)/2
-	.byte	(.L799-.L804)/2
-	.p2align 1
-.L803:
-	cmp	r0, #2
-	beq	.L801
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L805:
-	cmp	r0, #6
-	beq	.L801
-	cmp	r0, #8
-	beq	.L801
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+	uxth	r3, r8
+	cmp	r5, r3
+	bls	.L806
+	ldrh	r10, [r7]
+	movs	r1, #5
+	mov	r0, r10
+	add	r10, r10, #1
+	bl	zftl_get_gc_node
+	movw	r2, #65535
+	strh	r10, [r7]	@ movhi
+	cmp	r0, r2
+	beq	.L803
+	ldr	r2, .L889+28
+	ldrh	r3, [r6]
+	ldr	r2, [r2]
+	ldrh	r2, [r2, r0, lsl #1]
+	cmp	r2, r3
+	bcs	.L803
+	movs	r2, #0
+	mov	r1, r2
+	bl	gc_add_sblk
+	cmp	r0, #0
+	beq	.L805
+	adds	r4, r4, #1
+	uxth	r4, r4
+	cmp	r5, r4
+	bcs	.L805
 .L806:
-	cmp	r0, #10
-	bne	.L799
+	cmp	r4, r5
+	ldr	r1, .L889+32
+	bcs	.L808
+	ldr	r3, .L889+36
+	ldrh	r1, [r1]
+	ldrh	r2, [r6]
+	ldrh	r0, [r3]
+	ldr	r3, .L889+40
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	muls	r3, r0, r3
+	sub	r3, r3, r1, lsr #2
+	cmp	r2, r3
+	bge	.L801
+	add	r2, r2, r1, lsr #3
+	strh	r2, [r6]	@ movhi
 .L801:
-	mul	r5, ip, r5
-	ldrb	r5, [r8, r5]	@ zero_extendqisi2
-	cmp	r5, #255
-	bne	.L807
+	ldr	r3, [sp, #16]
+	lsls	r1, r3, #31
+	bpl	.L809
+	cmp	r4, r5
+	bcs	.L809
+	ldr	r8, .L889+48
+	movs	r6, #0
+	movw	r7, #65535
+.L814:
+	ldrh	r10, [r8]
+	mov	r0, r10
+	add	r10, r10, #1
+	bl	zftl_get_gc_node.part.9
+	cmp	r0, r7
+	strh	r10, [r8]	@ movhi
+	beq	.L810
+	movs	r2, #0
+	mov	r1, r2
+	bl	gc_add_sblk
+	cmp	r0, #0
+	beq	.L811
+	adds	r4, r4, #1
+	uxth	r4, r4
+	cmp	r5, r4
+	bhi	.L811
+.L812:
+	ldr	r3, .L889+32
+	ldr	r2, .L889+16
+	ldrh	r1, [r3]
+	ldrh	r3, [r2]
+	cmp	r3, r1, lsr #1
+	bls	.L809
+	sub	r3, r3, r1, lsr #3
+	b	.L888
+.L795:
+	movs	r3, #0
+	strh	r3, [r6]	@ movhi
+	b	.L799
+.L798:
+	add	r8, r8, #1
+	b	.L794
+.L803:
+	movs	r3, #0
+	strh	r3, [r7]	@ movhi
+	b	.L806
+.L805:
+	add	r8, r8, #1
+	b	.L802
 .L808:
-	movs	r0, #0
-.L799:
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L817:
+	ldrh	r3, [r6]
+	ldrh	r2, [r1]
+	cmp	r3, r2
+	itt	hi
+	subhi	r3, r3, r2, lsr #3
+	strhhi	r3, [r6]	@ movhi
+	b	.L801
+.L810:
+	movs	r3, #0
+	strh	r3, [r8]	@ movhi
+.L813:
+	cmp	r4, r5
+	bcs	.L812
+	ldr	r2, .L889+16
+	ldr	r1, .L889+32
+	ldrh	r3, [r2]
+	ldrh	r1, [r1]
+	cmp	r3, r1
+	bcs	.L809
+	add	r3, r3, r1, lsr #3
+.L888:
+	strh	r3, [r2]	@ movhi
+.L809:
+	ldr	r3, .L889+8
+	ldr	r3, [r3]
+	lsls	r3, r3, #23
+	bpl	.L836
+	ldr	r3, [sp, #12]
+	mov	r1, fp
+	ldr	r2, [sp, #16]
+	ldr	r0, .L889+44
+	str	r3, [sp]
+	mov	r3, r4
+	bl	printf
+.L836:
+	mov	r0, r4
+	b	.L790
+.L811:
+	adds	r6, r6, #1
+	uxth	r3, r6
+	cmp	r5, r3
+	bhi	.L814
+	b	.L813
+.L890:
 	.align	2
-.L816:
-	.word	.LANCHOR90
-	.word	.LANCHOR71
-	.word	.LANCHOR70
-	.word	.LANCHOR36
-	.size	queue_lun_state, .-queue_lun_state
-	.section	.text.queue_remove_completed_req,"ax",%progbits
+.L889:
+	.word	.LANCHOR10
+	.word	.LANCHOR82
+	.word	.LANCHOR14
+	.word	.LC50
+	.word	.LANCHOR62
+	.word	.LANCHOR84
+	.word	.LANCHOR83
+	.word	.LANCHOR9
+	.word	.LANCHOR85
+	.word	.LANCHOR77
+	.word	.LANCHOR78
+	.word	.LC51
+	.word	.LANCHOR86
+.L793:
+	ldr	r3, .L891
+	strh	r5, [r3, #314]	@ movhi
+	ldr	r3, .L891+4
+	strh	r5, [r3]	@ movhi
+	ldr	r3, [sp, #16]
+	ands	r3, r3, #1
+	str	r3, [sp, #20]
+	beq	.L839
+	ldr	r1, .L891+8
+	ldr	r2, .L891+12
+	ldr	r6, .L891+16
+	ldrh	r3, [r1]
+	mov	r10, r1
+	ldrh	r0, [r2]
+	str	r2, [sp, #24]
+	cmp	r3, r0, lsr #2
+	bcc	.L816
+	ldrh	r2, [r6]
+	cmp	r2, r3
+	bls	.L840
+.L816:
+	ldrh	r3, [r6]
+	movs	r0, #0
+	ldr	r4, .L891+20
+	lsrs	r3, r3, #2
+	strh	r3, [r4]	@ movhi
+	bl	zftl_get_gc_node.part.9
+	movw	r2, #65535
+	cmp	r0, r2
+	beq	.L841
+	ldr	r2, .L891+24
+	ldr	r1, [r2]
+	ldr	r2, .L891+28
+	ldrh	r3, [r1, r0, lsl #1]
+	movs	r1, #0
+	ldrh	r2, [r2]
+	cmp	r3, r2, lsr #2
+	bcs	.L842
+	mov	r2, fp
+	strh	r1, [r4]	@ movhi
+	bl	gc_add_sblk
+	adds	r4, r0, #0
+	it	ne
+	movne	r4, #1
+.L818:
+	ldr	r7, .L891+20
+	mov	r8, #64
+.L820:
+	ldrh	r2, [r7]
+	mov	r0, r2
+	str	r2, [sp, #28]
+	bl	zftl_get_gc_node.part.9
+	ldr	r2, [sp, #28]
+	movw	r3, #65535
+	cmp	r0, r3
+	add	r2, r2, #1
+	strh	r2, [r7]	@ movhi
+	beq	.L817
+	mov	r2, fp
+	movs	r1, #0
+	bl	gc_add_sblk
+	cbz	r0, .L819
+	adds	r4, r4, #1
+	ldr	r3, [sp, #12]
+	uxth	r4, r4
+	cmp	r4, r3
+	bcs	.L817
+.L819:
+	add	r3, r8, #-1
+	uxth	r8, r3
+	cmp	r8, #0
+	bne	.L820
+.L817:
+	ldr	r3, [sp, #24]
+	ldrh	r2, [r10]
+	ldrh	r3, [r3]
+	cmp	r2, r3, lsr #3
+	bhi	.L837
+	ldrh	r3, [r6]
+	adds	r3, r3, #8
+	cmp	r2, r3
+	ble	.L815
+.L837:
+	ldr	r6, .L891+32
+	mov	r8, #64
+	movw	r7, #65535
+	movs	r3, #0
+	strh	r3, [r6]	@ movhi
+.L822:
+	ldrh	r10, [r6]
+	movs	r1, #3
+	mov	r0, r10
+	add	r10, r10, #1
+	bl	zftl_get_gc_node
+	cmp	r0, r7
+	strh	r10, [r6]	@ movhi
+	beq	.L815
+	mov	r2, fp
+	movs	r1, #0
+	bl	gc_add_sblk
+	cbz	r0, .L821
+	adds	r4, r4, #1
+	ldr	r3, [sp, #12]
+	uxth	r4, r4
+	cmp	r4, r3
+	bcs	.L815
+.L821:
+	add	r8, r8, #-1
+	uxth	r8, r8
+	cmp	r8, #0
+	bne	.L822
+.L815:
+	ldr	r3, [sp, #16]
+	lsls	r2, r3, #30
+	bpl	.L823
+	ldr	r6, .L891+36
+	mov	r10, #64
+	ldr	r7, .L891+40
+	movs	r3, #0
+	strh	r3, [r7]	@ movhi
+.L828:
+	ldrh	r8, [r7]
+	movs	r1, #5
+	mov	r0, r8
+	bl	zftl_get_gc_node
+	add	r3, r8, #1
+	strh	r3, [r7]	@ movhi
+	movw	r3, #65535
+	cmp	r0, r3
+	beq	.L824
+	ldr	r3, [sp, #12]
+	cmp	r3, #1
+	bne	.L825
+	ldr	r3, .L891+44
+	ldr	r2, .L891+48
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	ldrh	r2, [r2]
+	smulbb	r3, r3, r2
+	ldr	r2, .L891+28
+	ldrh	r2, [r2]
+	sub	r3, r3, r2, lsr #3
+	strh	r3, [r6]	@ movhi
+.L825:
+	ldr	r3, .L891+24
+	ldr	r3, [r3]
+	ldrh	r2, [r3, r0, lsl #1]
+	ldrh	r3, [r6]
+	cmp	r2, r3
+	bcs	.L826
+	mov	r2, fp
+	movs	r1, #0
+	bl	gc_add_sblk
+	cmp	r0, #0
+	beq	.L827
+	adds	r4, r4, #1
+	ldr	r3, [sp, #12]
+	uxth	r4, r4
+	adds	r5, r5, #1
+	uxth	r5, r5
+	cmp	r4, r3
+	bcc	.L827
+.L824:
+	ldr	r3, [sp, #12]
+	ldr	r1, .L891+28
+	ldr	r0, .L891+44
+	cmp	r4, r3
+	bcc	.L829
+	cmp	r5, #0
+	bne	.L830
+	ldr	r3, .L891+52
+	ldrh	r2, [r3]
+	ldr	r3, .L891+56
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bls	.L830
+.L829:
+	ldr	r3, .L891+48
+	ldrh	r1, [r1]
+	ldrh	r2, [r6]
+	ldrh	r5, [r3]
+	ldrb	r3, [r0]	@ zero_extendqisi2
+	lsrs	r1, r1, #3
+	muls	r3, r5, r3
+	subs	r3, r3, r1
+	cmp	r2, r3
+	bge	.L823
+	add	r2, r2, r1
+	strh	r2, [r6]	@ movhi
+.L823:
+	ldr	r3, [sp, #20]
+	cmp	r3, #0
+	beq	.L809
+	ldr	r5, .L891+60
+	mov	r8, #64
+	ldr	r7, .L891+24
+	movs	r3, #0
+	ldr	r6, .L891+32
+	strh	r3, [r6]	@ movhi
+.L834:
+	ldrh	r10, [r6]
+	movs	r1, #3
+	mov	r0, r10
+	add	r10, r10, #1
+	bl	zftl_get_gc_node
+	movw	r3, #65535
+	strh	r10, [r6]	@ movhi
+	cmp	r0, r3
+	beq	.L831
+	ldr	r3, [r7]
+	ldrh	r2, [r5]
+	ldrh	r3, [r3, r0, lsl #1]
+	cmp	r2, r3
+	bls	.L832
+	cmp	r3, #2
+	bls	.L832
+	ldr	r3, .L891+12
+	ldrh	r2, [r3]
+	ldr	r3, .L891+8
+	ldrh	r3, [r3]
+	cmp	r3, r2, lsr #1
+	bls	.L831
+.L832:
+	mov	r2, fp
+	movs	r1, #0
+	bl	gc_add_sblk
+	cbz	r0, .L833
+	adds	r4, r4, #1
+	ldr	r3, [sp, #12]
+	uxth	r4, r4
+	cmp	r4, r3
+	bcs	.L831
+.L833:
+	add	r8, r8, #-1
+	uxth	r8, r8
+	cmp	r8, #0
+	bne	.L834
+.L831:
+	ldr	r3, [sp, #12]
+	cmp	r4, r3
+	ldr	r3, .L891+28
+	bcs	.L835
+	ldrh	r2, [r3]
+	ldrh	r3, [r5]
+	cmp	r3, r2, lsr #1
+	bls	.L809
+	sub	r3, r3, r2, lsr #3
+	strh	r3, [r5]	@ movhi
+	b	.L809
+.L841:
+	movs	r4, #0
+	b	.L818
+.L842:
+	mov	r4, r1
+	b	.L818
+.L839:
+	ldr	r4, [sp, #20]
+	b	.L815
+.L826:
+	movs	r3, #0
+	strh	r3, [r7]	@ movhi
+	b	.L824
+.L827:
+	add	r10, r10, #-1
+	uxth	r10, r10
+	cmp	r10, #0
+	bne	.L828
+	b	.L824
+.L830:
+	ldrh	r1, [r1]
+	ldrb	r2, [r0]	@ zero_extendqisi2
+	ldrh	r3, [r6]
+	muls	r2, r1, r2
+	cmp	r3, r2
+	itt	gt
+	subgt	r3, r3, r1, lsr #3
+	strhgt	r3, [r6]	@ movhi
+	b	.L823
+.L835:
+	ldrh	r1, [r3]
+	ldr	r3, .L891+44
+	ldrh	r2, [r5]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	muls	r3, r1, r3
+	subs	r3, r3, #32
+	cmp	r2, r3
+	itt	lt
+	addlt	r2, r2, r1, lsr #3
+	strhlt	r2, [r5]	@ movhi
+	b	.L809
+.L840:
+	mov	r4, r5
+	b	.L817
+.L892:
+	.align	2
+.L891:
+	.word	.LANCHOR63
+	.word	.LANCHOR87
+	.word	.LANCHOR88
+	.word	.LANCHOR89
+	.word	.LANCHOR90
+	.word	.LANCHOR86
+	.word	.LANCHOR9
+	.word	.LANCHOR85
+	.word	.LANCHOR82
+	.word	.LANCHOR91
+	.word	.LANCHOR83
+	.word	.LANCHOR78
+	.word	.LANCHOR77
+	.word	.LANCHOR92
+	.word	.LANCHOR93
+	.word	.LANCHOR94
+	.size	gc_search_src_blk, .-gc_search_src_blk
+	.section	.text.zftl_insert_free_list,"ax",%progbits
 	.align	1
-	.global	queue_remove_completed_req
+	.global	zftl_insert_free_list
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	queue_remove_completed_req, %function
-queue_remove_completed_req:
+	.type	zftl_insert_free_list, %function
+zftl_insert_free_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, lr}
-	ldr	r5, .L834
-	ldrb	r0, [r5]	@ zero_extendqisi2
-	cmp	r0, #255
-	beq	.L818
-	movs	r1, #48
-	ldr	r2, .L834+4
-	muls	r1, r0, r1
-	adds	r3, r2, r1
-	ldrb	r4, [r3, #42]	@ zero_extendqisi2
-	subs	r4, r4, #11
-	cmp	r4, #1
-	bhi	.L818
-	ldrb	r4, [r2, r1]	@ zero_extendqisi2
-	strb	r4, [r5]
-	movs	r4, #255
-	strb	r4, [r2, r1]
-	ldrb	r1, [r3, #43]	@ zero_extendqisi2
-	cmp	r1, #1
-	bne	.L820
-	ldrh	r3, [r3, #34]
-	cbnz	r3, .L821
-	ldr	r3, .L834+8
-.L833:
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	cmp	r1, #255
-	bne	.L823
-	movs	r1, #48
-	mla	r2, r1, r0, r2
-	ldrb	r2, [r2, #1]	@ zero_extendqisi2
-	strb	r2, [r3]
-	pop	{r4, r5, pc}
-.L821:
-	ldr	r3, .L834+12
-	b	.L833
-.L820:
-	cbnz	r1, .L818
-	ldr	r3, [r3, #20]
-	adds	r3, r3, #1
-	beq	.L818
-	ldr	r3, .L834+16
-	b	.L833
-.L823:
-	movs	r3, #48
-.L826:
-	mov	r4, r1
-	muls	r1, r3, r1
-	ldrb	r1, [r2, r1]	@ zero_extendqisi2
-	cmp	r1, #255
-	bne	.L826
-	muls	r4, r3, r4
-	mla	r3, r3, r0, r2
-	ldrb	r3, [r3, #1]	@ zero_extendqisi2
-	strb	r3, [r2, r4]
-	pop	{r4, r5, pc}
-.L818:
-	pop	{r4, r5, pc}
-.L835:
+	@ link register save eliminated.
+	ldr	r3, .L897
+	mov	r1, r0
+	ldr	r3, [r3]
+	add	r3, r3, r0, lsl #2
+	ldrb	r3, [r3, #2]	@ zero_extendqisi2
+	ands	r3, r3, #24
+	bne	.L894
+	ldr	r2, .L897+4
+	ldr	r0, .L897+8
+.L896:
+	b	_insert_free_list
+.L894:
+	cmp	r3, #16
+	ittee	eq
+	ldreq	r2, .L897+12
+	ldreq	r0, .L897+16
+	ldrne	r2, .L897+20
+	ldrne	r0, .L897+24
+	b	.L896
+.L898:
 	.align	2
-.L834:
-	.word	.LANCHOR90
-	.word	.LANCHOR36
-	.word	.LANCHOR88
-	.word	.LANCHOR62
-	.word	.LANCHOR51
-	.size	queue_remove_completed_req, .-queue_remove_completed_req
-	.section	.text.pm_alloc_new_blk,"ax",%progbits
+.L897:
+	.word	.LANCHOR7
+	.word	.LANCHOR95
+	.word	.LANCHOR96
+	.word	.LANCHOR97
+	.word	.LANCHOR98
+	.word	.LANCHOR99
+	.word	.LANCHOR100
+	.size	zftl_insert_free_list, .-zftl_insert_free_list
+	.section	.text.zftl_insert_data_list,"ax",%progbits
 	.align	1
-	.global	pm_alloc_new_blk
+	.global	zftl_insert_data_list
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	pm_alloc_new_blk, %function
-pm_alloc_new_blk:
+	.type	zftl_insert_data_list, %function
+zftl_insert_data_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r4, r5, r6, r7, lr}
-	ldr	r4, .L854
-	ldr	r1, .L854+4
-	ldr	r2, [r4]
-	ldrb	r1, [r1]	@ zero_extendqisi2
-	ldrh	r3, [r2, #690]
-	adds	r3, r3, #1
-	uxth	r3, r3
-	cmp	r1, r3
-	strh	r3, [r2, #690]	@ movhi
-	bls	.L837
-	add	r3, r3, #336
-	ldrh	r2, [r2, r3, lsl #1]
-	movw	r3, #65535
-	cmp	r2, r3
-	bne	.L838
-.L837:
-	ldr	r7, .L854+8
-	ldr	r6, .L854+12
-.L852:
-	movs	r0, #1
-	bl	ftl_alloc_sblk
-	movs	r1, #0
+	@ link register save eliminated.
+	ldr	r3, .L904
+	mov	r1, r0
+	ldr	r3, [r3]
+	add	r3, r3, r0, lsl #2
+	ldrb	r3, [r3, #2]	@ zero_extendqisi2
+	and	r3, r3, #224
+	cmp	r3, #64
+	bne	.L900
+	ldr	r2, .L904+4
+	ldr	r0, .L904+8
+.L903:
+	b	_insert_data_list
+.L900:
+	cmp	r3, #96
+	bne	.L901
+	ldr	r2, .L904+12
+	ldr	r0, .L904+16
+	b	.L903
+.L901:
+	cmp	r3, #160
+	bne	.L899
+	ldr	r2, .L904+20
+	ldr	r0, .L904+24
+	b	.L903
+.L899:
+	bx	lr
+.L905:
+	.align	2
+.L904:
+	.word	.LANCHOR7
+	.word	.LANCHOR90
+	.word	.LANCHOR12
+	.word	.LANCHOR88
+	.word	.LANCHOR81
+	.word	.LANCHOR92
+	.word	.LANCHOR80
+	.size	zftl_insert_data_list, .-zftl_insert_data_list
+	.section	.text.zftl_gc_get_free_sblk,"ax",%progbits
+	.align	1
+	.global	zftl_gc_get_free_sblk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	zftl_gc_get_free_sblk, %function
+zftl_gc_get_free_sblk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, lr}
+	movw	r6, #65535
+	ldr	r8, .L923+48
 	mov	r5, r0
-	bl	ftl_erase_sblk
-	ldr	r1, [r4]
-	mov	r0, r5
-	add	r1, r1, #672
-	bl	ftl_get_blk_list_in_sblk
-	uxth	r0, r0
-	cbnz	r0, .L839
-	mov	r1, r5
-	mov	r0, r7
+	mov	r7, r1
+	ldr	r3, [r8]
+	ldrh	r4, [r3, #588]
+	cmp	r4, r6
+	beq	.L907
+	cbnz	r0, .L907
+	mov	r1, r4
+	ldr	r0, .L923
 	bl	printf
-	ldr	r3, [r6]
-	add	r5, r3, r5, lsl #2
-	ldrb	r3, [r5, #2]	@ zero_extendqisi2
-	orr	r3, r3, #224
-	strb	r3, [r5, #2]
-	b	.L852
-.L839:
-	ldr	r2, [r4]
-	movs	r0, #1
-	ldr	r1, .L854+16
-	movs	r3, #0
-	strh	r3, [r2, #690]	@ movhi
-	str	r0, [r1]
-	add	r1, r2, #416
-	movw	r0, #65535
-.L841:
-	ldrh	r6, [r1], #2
-	cmp	r6, r0
-	beq	.L840
-	adds	r3, r3, #1
-	cmp	r3, #128
-	bne	.L841
-	movs	r2, #188
-	ldr	r1, .L854+20
-	ldr	r0, .L854+24
+	ldr	r3, [r8]
+	strh	r6, [r3, #588]	@ movhi
+.L908:
+	mov	r0, r4
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L907:
+	ldr	r3, .L923+4
+	ldr	r6, .L923+8
+	ldrh	r1, [r3]
+	ldrh	r3, [r6]
+	cmp	r1, r3
+	bls	.L909
+	cmp	r5, #0
+	beq	.L915
+	lsrs	r1, r1, #3
+.L910:
+	ldr	r2, .L923+4
+	ldr	r0, .L923+12
+.L922:
+	bl	_list_pop_index_node
+	uxth	r4, r0
+	movw	r3, #65535
+	cmp	r4, r3
+	bne	.L914
+	ldrh	r3, [r6]
+	mov	r2, r7
+	mov	r1, r4
+	ldr	r0, .L923+16
+	str	r3, [sp, #4]
+	ldr	r3, .L923+20
+	ldrh	r3, [r3]
+	str	r3, [sp]
+	ldr	r3, .L923+24
+	ldr	r3, [r3]
 	bl	printf
-.L843:
-	b	.L843
-.L844:
-	movs	r2, #0
-	strh	r3, [r1, #692]	@ movhi
-	strh	r2, [r1, #696]	@ movhi
-	ldr	r2, .L854+28
-	ldrh	r2, [r2]
-	rsb	r2, r2, #21
-	asr	r0, r3, r2
-	strh	r0, [r1, #694]	@ movhi
-	ldr	r1, .L854+32
+.L914:
+	cmp	r5, #0
+	beq	.L908
+	ldr	r3, .L923+28
+	ldr	r3, [r3]
+	lsls	r3, r3, #23
+	bpl	.L908
+	ldr	r3, .L923+32
+	ldr	r1, .L923+36
+	ldr	r0, .L923+40
+	ldr	r3, [r3]
 	ldr	r1, [r1]
-	lsls	r1, r1, #19
-	bpl	.L849
-	movs	r1, #1
-	uxth	r0, r0
-	lsl	r2, r1, r2
-	mov	r1, r3
-	str	r0, [sp]
-	subs	r2, r2, #1
-	ldr	r0, .L854+36
-	bl	printf
-.L849:
-	movs	r0, #0
-	add	sp, sp, #12
-	@ sp needed
-	pop	{r4, r5, r6, r7, pc}
-.L840:
-	adds	r3, r3, #208
-	strh	r5, [r2, r3, lsl #1]	@ movhi
-	ldrh	r3, [r2, #688]
-	adds	r3, r3, #1
-	strh	r3, [r2, #688]	@ movhi
-.L838:
-	ldr	r1, [r4]
-	movw	r0, #65533
-	ldrh	r3, [r1, #690]
-	add	r3, r3, #336
-	ldrh	r3, [r1, r3, lsl #1]
-	subs	r2, r3, #1
-	uxth	r2, r2
-	cmp	r2, r0
-	bls	.L844
-	movs	r2, #193
-	ldr	r1, .L854+20
-	ldr	r0, .L854+24
+	ldrh	r1, [r1, r4, lsl #1]
+	add	r2, r3, r4, lsl #2
+	ldrb	r2, [r2, #2]	@ zero_extendqisi2
+	str	r1, [sp, #8]
+	ldrh	r1, [r3, r4, lsl #2]
+	ubfx	r1, r1, #0, #11
+	str	r1, [sp, #4]
+	mov	r1, r4
+	ldr	r3, [r3, r4, lsl #2]
+	ubfx	r3, r3, #11, #8
+	str	r3, [sp]
+	ubfx	r3, r2, #3, #2
+	lsrs	r2, r2, #5
 	bl	printf
-.L845:
-	b	.L845
-.L855:
+	b	.L908
+.L915:
+	mov	r1, r5
+	b	.L910
+.L909:
+	cbnz	r5, .L912
+	lsrs	r1, r3, #2
+.L913:
+	ldr	r2, .L923+8
+	ldr	r0, .L923+44
+	b	.L922
+.L912:
+	rsb	r1, r1, r1, lsl #3
+	ubfx	r1, r1, #3, #16
+	b	.L913
+.L924:
 	.align	2
-.L854:
-	.word	.LANCHOR46
-	.word	.LANCHOR69
-	.word	.LC26
-	.word	.LANCHOR57
-	.word	.LANCHOR91
-	.word	.LANCHOR92
-	.word	.LC0
-	.word	.LANCHOR71
-	.word	.LANCHOR22
-	.word	.LC27
-	.size	pm_alloc_new_blk, .-pm_alloc_new_blk
-	.section	.text.pm_select_ram_region,"ax",%progbits
+.L923:
+	.word	.LC52
+	.word	.LANCHOR97
+	.word	.LANCHOR99
+	.word	.LANCHOR98
+	.word	.LC53
+	.word	.LANCHOR95
+	.word	.LANCHOR96
+	.word	.LANCHOR14
+	.word	.LANCHOR7
+	.word	.LANCHOR9
+	.word	.LC54
+	.word	.LANCHOR100
+	.word	.LANCHOR10
+	.size	zftl_gc_get_free_sblk, .-zftl_gc_get_free_sblk
+	.section	.text.zftl_get_free_sblk,"ax",%progbits
 	.align	1
-	.global	pm_select_ram_region
+	.global	zftl_get_free_sblk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	pm_select_ram_region, %function
-pm_select_ram_region:
+	.type	zftl_get_free_sblk, %function
+zftl_get_free_sblk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L867
-	push	{r3, r4, r5, r6, r7, lr}
-	movs	r3, #0
-	movw	r4, #65535
-	mov	r1, r2
-.L858:
-	ldrh	r5, [r2, r3, lsl #3]
-	uxth	r0, r3
-	cmp	r5, r4
-	beq	.L857
-	adds	r3, r3, #1
-	cmp	r3, #32
-	bne	.L858
-	movs	r2, #0
-	mov	r4, #32768
-	mov	r0, r3
-.L860:
-	add	r3, r1, r2, lsl #3
-	uxth	r5, r2
-	ldrh	r3, [r3, #2]
-	lsls	r6, r3, #16
-	bmi	.L859
-	cmp	r3, r4
-	itt	cc
-	movcc	r4, r3
-	movcc	r0, r5
-.L859:
-	adds	r2, r2, #1
-	cmp	r2, #32
-	bne	.L860
-	cmp	r0, #32
-	bne	.L857
-	ldr	r3, .L867+4
-	mov	r2, #-1
-	ldrb	r5, [r3]	@ zero_extendqisi2
-	movs	r3, #0
-.L862:
-	add	r4, r1, r3, lsl #3
-	uxth	r6, r3
-	ldrh	r4, [r4, #2]
-	cmp	r4, r2
-	bcs	.L861
-	ldrh	r7, [r1, r3, lsl #3]
-	cmp	r7, r5
-	itt	ne
-	movne	r2, r4
-	movne	r0, r6
-.L861:
-	adds	r3, r3, #1
-	cmp	r3, #32
-	bne	.L862
-	cmp	r0, #32
-	bne	.L857
-	movw	r2, #289
-	ldr	r1, .L867+8
-	ldr	r0, .L867+12
-	bl	printf
-.L863:
-	b	.L863
-.L857:
-	pop	{r3, r4, r5, r6, r7, pc}
-.L868:
+	cmp	r1, #5
+	push	{r0, r1, r2, r4, r5, r6, r7, lr}
+	mov	r5, r1
+	bne	.L926
+	ldr	r3, .L947
+	ldr	r2, .L947+4
+	ldrh	r3, [r3]
+	ldrh	r1, [r2]
+	cmp	r3, r1
+	bcc	.L927
+	ldr	r2, .L947+8
+	ldrh	r2, [r2]
+	cmp	r2, r3
+	bls	.L928
+	cbz	r1, .L928
+.L927:
+	ldr	r2, .L947+4
+	lsrs	r1, r1, #1
+.L946:
+	ldr	r0, .L947+12
+	b	.L945
+.L928:
+	ldr	r2, .L947
+	movs	r1, #0
+	ldr	r0, .L947+16
+.L945:
+	bl	_list_pop_index_node
+	uxth	r4, r0
+	movw	r3, #65535
+	cmp	r4, r3
+	bne	.L931
+	ldr	r3, .L947+4
+	mov	r2, r5
+	mov	r1, r4
+	ldr	r0, .L947+20
+	ldrh	r3, [r3]
+	str	r3, [sp, #4]
+	ldr	r3, .L947+8
+	ldrh	r3, [r3]
+	str	r3, [sp]
+	ldr	r3, .L947+24
+	ldr	r3, [r3]
+	bl	printf
+	b	.L931
+.L926:
+	ldr	r7, .L947+28
+	movw	r6, #65535
+	ldr	r3, [r7]
+	ldrh	r4, [r3, #590]
+	cmp	r4, r6
+	beq	.L930
+	cmp	r1, #1
+	beq	.L930
+	mov	r1, r4
+	ldr	r0, .L947+32
+	bl	printf
+	ldr	r3, [r7]
+	strh	r6, [r3, #590]	@ movhi
+.L931:
+	mov	r0, r4
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, r6, r7, pc}
+.L930:
+	ldr	r3, .L947+8
+	ldr	r2, .L947+4
+	ldrh	r3, [r3]
+	ldrh	r2, [r2]
+	cmp	r3, r2
+	bcc	.L932
+	ldr	r1, .L947
+	ldrh	r1, [r1]
+	cmp	r1, r3
+	bls	.L933
+	cbz	r2, .L933
+.L932:
+	cmp	r5, #1
+	it	eq
+	lsreq	r0, r2, #1
+	ldr	r2, .L947+4
+	mov	r1, r0
+	b	.L946
+.L933:
+	cmp	r5, #1
+	ldr	r2, .L947+8
+	it	eq
+	lsreq	r0, r3, #1
+	mov	r1, r0
+	ldr	r0, .L947+24
+	b	.L945
+.L948:
 	.align	2
-.L867:
-	.word	.LANCHOR93
-	.word	.LANCHOR94
+.L947:
+	.word	.LANCHOR97
+	.word	.LANCHOR99
 	.word	.LANCHOR95
-	.word	.LC0
-	.size	pm_select_ram_region, .-pm_select_ram_region
-	.section	.text.ftl_memset,"ax",%progbits
+	.word	.LANCHOR100
+	.word	.LANCHOR98
+	.word	.LC53
+	.word	.LANCHOR96
+	.word	.LANCHOR10
+	.word	.LC55
+	.size	zftl_get_free_sblk, .-zftl_get_free_sblk
+	.section	.text.zftl_remove_data_node,"ax",%progbits
 	.align	1
-	.global	ftl_memset
+	.global	zftl_remove_data_node
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_memset, %function
-ftl_memset:
+	.type	zftl_remove_data_node, %function
+zftl_remove_data_node:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	b	memset
-	.size	ftl_memset, .-ftl_memset
-	.section	.text.flash_lsb_page_tbl_build,"ax",%progbits
-	.align	1
-	.global	flash_lsb_page_tbl_build
+	ldr	r3, .L954
+	mov	r1, r0
+	ldr	r3, [r3]
+	add	r3, r3, r0, lsl #2
+	ldrb	r3, [r3, #2]	@ zero_extendqisi2
+	and	r3, r3, #224
+	cmp	r3, #64
+	bne	.L950
+	ldr	r2, .L954+4
+	ldr	r0, .L954+8
+.L953:
+	b	_list_remove_node
+.L950:
+	cmp	r3, #96
+	bne	.L951
+	ldr	r2, .L954+12
+	ldr	r0, .L954+16
+	b	.L953
+.L951:
+	cmp	r3, #160
+	bne	.L949
+	ldr	r2, .L954+20
+	ldr	r0, .L954+24
+	b	.L953
+.L949:
+	bx	lr
+.L955:
+	.align	2
+.L954:
+	.word	.LANCHOR7
+	.word	.LANCHOR90
+	.word	.LANCHOR12
+	.word	.LANCHOR88
+	.word	.LANCHOR81
+	.word	.LANCHOR92
+	.word	.LANCHOR80
+	.size	zftl_remove_data_node, .-zftl_remove_data_node
+	.section	.text.zftl_remove_free_node,"ax",%progbits
+	.align	1
+	.global	zftl_remove_free_node
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_lsb_page_tbl_build, %function
-flash_lsb_page_tbl_build:
+	.type	zftl_remove_free_node, %function
+zftl_remove_free_node:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, lr}
-	ldr	r4, .L905
-	cbnz	r0, .L871
-.L872:
-	strh	r0, [r4, r0, lsl #1]	@ movhi
-	adds	r0, r0, #1
-	cmp	r0, #256
-	bne	.L872
-.L878:
-	movs	r1, #255
-	mov	r2, #1024
-	ldr	r0, .L905+4
-	bl	ftl_memset
-	ldr	r1, .L905+4
-	movs	r3, #0
-.L873:
-	ldrh	r2, [r4, r3, lsl #1]
-	adds	r3, r3, #1
-	cmp	r3, #256
-	strh	r2, [r1, r2, lsl #1]	@ movhi
-	bne	.L873
-	pop	{r4, pc}
-.L871:
-	cmp	r0, #1
-	bne	.L874
-	movs	r3, #0
-.L877:
-	cmp	r3, #3
-	uxth	r2, r3
-	bls	.L875
-	tst	r2, #1
-	ite	ne
-	movne	r1, #3
-	moveq	r1, #2
-	rsb	r2, r1, r2, lsl #1
-	uxth	r2, r2
-.L875:
-	strh	r2, [r4, r3, lsl #1]	@ movhi
-	adds	r3, r3, #1
-	cmp	r3, #256
-	bne	.L877
-	b	.L878
-.L874:
-	cmp	r0, #2
-	bne	.L879
-	movs	r2, #0
-.L881:
-	uxth	r3, r2
-	cmp	r2, #1
-	ittt	hi
-	lslhi	r3, r3, #1
-	addhi	r3, r3, #-1
-	uxthhi	r3, r3
-	strh	r3, [r4, r2, lsl #1]	@ movhi
-	adds	r2, r2, #1
-	cmp	r2, #256
-	bne	.L881
-	b	.L878
-.L879:
-	cmp	r0, #3
-	bne	.L882
-	movs	r3, #0
-.L885:
-	cmp	r3, #5
-	uxth	r2, r3
-	bls	.L883
-	tst	r2, #1
-	ite	ne
-	movne	r1, #5
-	moveq	r1, #4
-	rsb	r2, r1, r2, lsl #1
-	uxth	r2, r2
-.L883:
-	strh	r2, [r4, r3, lsl #1]	@ movhi
-	adds	r3, r3, #1
-	cmp	r3, #256
-	bne	.L885
-	b	.L878
-.L882:
-	cmp	r0, #4
-	mov	r3, #0
-	bne	.L886
-	strh	r3, [r4]	@ movhi
-	movs	r3, #1
-	strh	r3, [r4, #2]	@ movhi
-	movs	r3, #2
-	strh	r3, [r4, #4]	@ movhi
-	movs	r3, #3
-	strh	r3, [r4, #6]	@ movhi
-	movs	r3, #5
-	strh	r3, [r4, #10]	@ movhi
-	movs	r3, #7
-	strh	r3, [r4, #12]	@ movhi
-	mov	r2, r4
-	movs	r3, #8
-	strh	r0, [r4, #8]	@ movhi
-	strh	r3, [r2, #14]!	@ movhi
-.L888:
-	tst	r3, #1
-	ite	ne
-	movne	r1, #7
-	moveq	r1, #6
-	rsb	r1, r1, r3, lsl #1
-	adds	r3, r3, #1
-	uxth	r3, r3
-	strh	r1, [r2, #2]!	@ movhi
-	cmp	r3, #256
-	bne	.L888
-	b	.L878
-.L886:
-	cmp	r0, #5
-	bne	.L889
-.L890:
-	strh	r3, [r4, r3, lsl #1]	@ movhi
-	adds	r3, r3, #1
+	@ link register save eliminated.
+	ldr	r3, .L960
+	mov	r1, r0
+	ldr	r3, [r3]
+	add	r3, r3, r0, lsl #2
+	ldrb	r3, [r3, #2]	@ zero_extendqisi2
+	ands	r3, r3, #24
+	bne	.L957
+	ldr	r2, .L960+4
+	ldr	r0, .L960+8
+.L959:
+	b	_list_remove_node
+.L957:
 	cmp	r3, #16
-	bne	.L890
-	ldr	r2, .L905+8
-.L891:
-	strh	r3, [r2, #2]!	@ movhi
-	adds	r3, r3, #2
-	uxth	r3, r3
-	cmp	r3, #496
-	bne	.L891
-	b	.L878
-.L889:
-	cmp	r0, #8
-	bne	.L878
-.L892:
-	strh	r3, [r4, r3]	@ movhi
-	adds	r3, r3, #2
-	cmp	r3, #512
-	bne	.L892
-	b	.L878
-.L906:
+	ittee	eq
+	ldreq	r2, .L960+12
+	ldreq	r0, .L960+16
+	ldrne	r2, .L960+20
+	ldrne	r0, .L960+24
+	b	.L959
+.L961:
 	.align	2
-.L905:
-	.word	.LANCHOR14
+.L960:
+	.word	.LANCHOR7
+	.word	.LANCHOR95
 	.word	.LANCHOR96
-	.word	.LANCHOR14+30
-	.size	flash_lsb_page_tbl_build, .-flash_lsb_page_tbl_build
-	.section	.text.flash_die_info_init,"ax",%progbits
-	.align	1
-	.global	flash_die_info_init
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	flash_die_info_init, %function
-flash_die_info_init:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r5, #0
-	ldr	r4, .L920
-	ldr	r6, .L920+4
-	ldrh	r3, [r4, #26]
-	add	r10, r4, #1
-	ldr	r7, .L920+8
-	ldrb	r1, [r4, #12]	@ zero_extendqisi2
-	ldrh	r0, [r4, #10]
-	strh	r3, [r7]	@ movhi
-	strb	r5, [r6]
-	bl	__aeabi_idiv
-	ldr	r3, .L920+12
-	movs	r2, #8
-	mov	r1, r5
-	ldr	r8, .L920+32
-	ldr	fp, .L920+20
-	strh	r0, [r3]	@ movhi
-	ldr	r0, .L920+16
-	bl	ftl_memset
-	movs	r2, #32
-	mov	r1, r5
-	ldr	r0, .L920+20
-	bl	ftl_memset
-	ldrb	r3, [r4]	@ zero_extendqisi2
-	str	r3, [sp]
-	ldr	r3, .L920+16
-.L909:
-	ldr	r2, [sp]
-	add	r1, r8, r5, lsl #3
-	mov	r0, r10
-	str	r3, [sp, #4]
-	bl	flash_mem_cmp8
-	ldr	r3, [sp, #4]
-	cbnz	r0, .L908
-	ldrb	r2, [r6]	@ zero_extendqisi2
-	adds	r1, r2, #1
-	str	r0, [fp, r2, lsl #2]
-	strb	r1, [r6]
-	strb	r5, [r3, r2]
-.L908:
-	adds	r5, r5, #1
-	cmp	r5, #4
-	bne	.L909
-	ldrb	r3, [r4, #8]	@ zero_extendqisi2
-	cmp	r3, #2
-	beq	.L910
-.L914:
-	ldrb	r2, [r4, #13]	@ zero_extendqisi2
-	ldrb	r3, [r6]	@ zero_extendqisi2
-	smulbb	r3, r3, r2
-	ldrh	r2, [r4, #14]
-	smulbb	r3, r3, r2
-	ldr	r2, .L920+24
-	strh	r3, [r2]	@ movhi
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L910:
-	ldrh	r5, [r7]
-	movs	r7, #0
-	ldrb	r3, [r4, #13]	@ zero_extendqisi2
-	ldrb	r8, [r4, #23]	@ zero_extendqisi2
-	ldr	fp, .L920+16
-	muls	r3, r5, r3
-	ldrh	r5, [r4, #14]
-	and	r5, r5, #65280
-	muls	r5, r3, r5
-	ldr	r3, .L920+28
-	lsl	r10, r5, #1
-.L913:
-	ldr	r1, .L920+32
-	mov	r0, r3
-	ldr	r2, [sp]
-	str	r3, [sp, #4]
-	add	r1, r1, r7, lsl #3
-	bl	flash_mem_cmp8
-	ldr	r3, [sp, #4]
-	cbnz	r0, .L911
-	ldrb	r2, [r6]	@ zero_extendqisi2
-	cmp	r8, #0
-	ite	eq
-	moveq	r1, r5
-	movne	r1, r10
-	ldr	r0, .L920+20
-	strb	r7, [fp, r2]
-	str	r1, [r0, r2, lsl #2]
-	adds	r1, r2, #1
-	strb	r1, [r6]
-.L911:
-	adds	r7, r7, #1
-	cmp	r7, #4
-	bne	.L913
-	b	.L914
-.L921:
-	.align	2
-.L920:
-	.word	.LANCHOR19
-	.word	.LANCHOR8
-	.word	.LANCHOR13
 	.word	.LANCHOR97
-	.word	.LANCHOR10
 	.word	.LANCHOR98
 	.word	.LANCHOR99
-	.word	.LANCHOR19+1
-	.word	.LANCHOR26
-	.size	flash_die_info_init, .-flash_die_info_init
-	.section	.text.FlashReadFacBbtData,"ax",%progbits
+	.word	.LANCHOR100
+	.size	zftl_remove_free_node, .-zftl_remove_free_node
+	.section	.text.zftl_list_update_data_list,"ax",%progbits
 	.align	1
-	.global	FlashReadFacBbtData
+	.global	zftl_list_update_data_list
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashReadFacBbtData, %function
-FlashReadFacBbtData:
+	.type	zftl_list_update_data_list, %function
+zftl_list_update_data_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	lsrs	r2, r2, #3
-	movs	r1, #0
-	bl	ftl_memset
-	movs	r0, #0
-	pop	{r3, pc}
-	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
-	.section	.text.lpa_hash_init,"ax",%progbits
+	@ link register save eliminated.
+	ldr	r3, .L967
+	mov	r1, r0
+	ldr	r3, [r3]
+	add	r3, r3, r0, lsl #2
+	ldrb	r3, [r3, #2]	@ zero_extendqisi2
+	and	r3, r3, #224
+	cmp	r3, #64
+	bne	.L963
+	ldr	r2, .L967+4
+	ldr	r0, .L967+8
+.L966:
+	b	_list_update_data_list
+.L963:
+	cmp	r3, #96
+	bne	.L964
+	ldr	r2, .L967+12
+	ldr	r0, .L967+16
+	b	.L966
+.L964:
+	cmp	r3, #160
+	bne	.L962
+	ldr	r2, .L967+20
+	ldr	r0, .L967+24
+	b	.L966
+.L962:
+	bx	lr
+.L968:
+	.align	2
+.L967:
+	.word	.LANCHOR7
+	.word	.LANCHOR90
+	.word	.LANCHOR12
+	.word	.LANCHOR88
+	.word	.LANCHOR81
+	.word	.LANCHOR92
+	.word	.LANCHOR80
+	.size	zftl_list_update_data_list, .-zftl_list_update_data_list
+	.section	.text.print_list_info,"ax",%progbits
 	.align	1
-	.global	lpa_hash_init
+	.global	print_list_info
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	lpa_hash_init, %function
-lpa_hash_init:
+	.type	print_list_info, %function
+print_list_info:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	mov	r2, #512
-	movs	r1, #255
-	ldr	r0, .L924
-	bl	ftl_memset
-	ldr	r3, .L924+4
-	movs	r1, #255
-	ldr	r2, .L924+8
-	ldrh	r3, [r3]
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	muls	r2, r3, r2
-	ldr	r3, .L924+12
-	ldr	r0, [r3]
-	lsls	r2, r2, #2
-	pop	{r3, lr}
-	b	ftl_memset
-.L925:
-	.align	2
-.L924:
-	.word	.LANCHOR81
-	.word	.LANCHOR79
-	.word	.LANCHOR69
-	.word	.LANCHOR83
-	.size	lpa_hash_init, .-lpa_hash_init
-	.section	.text.lpa_rebuild_hash,"ax",%progbits
+	push	{r4, r5, r6, r7, lr}
+	mov	r4, r0
+	ldrh	r2, [r1]
+	sub	sp, sp, #36
+	ldr	r1, [r0]
+	ldr	r0, .L973
+	bl	printf
+	ldr	r4, [r4]
+	cmp	r4, #0
+	beq	.L969
+	ldr	r6, .L973+4
+	movs	r5, #0
+	ldr	r7, .L973+8
+.L972:
+	ldr	r2, [r6]
+	ldr	r0, .L973+12
+	ldr	r3, .L973+16
+	subs	r2, r4, r2
+	asrs	r2, r2, #1
+	ldr	r0, [r0]
+	ldr	r1, [r3]
+	muls	r2, r7, r2
+	ldrh	r3, [r4]
+	uxth	r2, r2
+	ldrh	r0, [r0, r2, lsl #1]
+	add	ip, r1, r2, lsl #2
+	str	r0, [sp, #24]
+	ldrh	r0, [r1, r2, lsl #2]
+	ubfx	r0, r0, #0, #11
+	str	r0, [sp, #20]
+	ldr	r1, [r1, r2, lsl #2]
+	ldr	r0, .L973+20
+	ubfx	r1, r1, #11, #8
+	str	r1, [sp, #16]
+	ldrb	r1, [ip, #2]	@ zero_extendqisi2
+	ubfx	r1, r1, #3, #2
+	str	r1, [sp, #12]
+	ldrb	r1, [ip, #2]	@ zero_extendqisi2
+	lsrs	r1, r1, #5
+	str	r1, [sp, #8]
+	ldrh	r1, [r4, #4]
+	str	r1, [sp, #4]
+	ldrh	r1, [r4, #2]
+	str	r1, [sp]
+	mov	r1, r5
+	bl	printf
+	ldrh	r4, [r4]
+	movw	r3, #65535
+	cmp	r4, r3
+	beq	.L969
+	ldr	r3, [r6]
+	movs	r2, #6
+	adds	r5, r5, #1
+	uxth	r5, r5
+	mla	r4, r2, r4, r3
+	ldr	r3, .L973+24
+	ldrh	r3, [r3]
+	cmp	r3, r5
+	bcs	.L972
+.L969:
+	add	sp, sp, #36
+	@ sp needed
+	pop	{r4, r5, r6, r7, pc}
+.L974:
+	.align	2
+.L973:
+	.word	.LC56
+	.word	.LANCHOR4
+	.word	-1431655765
+	.word	.LANCHOR9
+	.word	.LANCHOR7
+	.word	.LC57
+	.word	.LANCHOR101
+	.size	print_list_info, .-print_list_info
+	.section	.text.dump_all_list_info,"ax",%progbits
 	.align	1
-	.global	lpa_rebuild_hash
+	.global	dump_all_list_info
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	lpa_rebuild_hash, %function
-lpa_rebuild_hash:
+	.type	dump_all_list_info, %function
+dump_all_list_info:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	ldr	r3, .L937
-	ldr	r3, [r3]
-	lsls	r3, r3, #19
-	bpl	.L927
-	movs	r3, #0
-	movs	r2, #190
-	ldr	r1, .L937+4
-	ldr	r0, .L937+8
-	bl	printf
-.L927:
-	ldr	r6, .L937+12
-	mov	r2, #512
-	ldr	r4, .L937+16
-	movs	r1, #255
-	ldr	r0, .L937+20
-	bl	ftl_memset
-	ldrh	r3, [r4]
-	movs	r1, #255
-	ldrb	r2, [r6]	@ zero_extendqisi2
-	ldr	r5, .L937+24
-	muls	r2, r3, r2
-	ldr	r0, [r5]
-	lsls	r2, r2, #2
-	bl	ftl_memset
-	ldr	r3, .L937+28
-	movs	r2, #0
-	ldrb	r6, [r6]	@ zero_extendqisi2
-	ldr	ip, [r5]
-	ldr	r7, [r3]
-	ldr	r0, .L937+20
-.L928:
-	ldrh	r3, [r4]
-	uxth	r5, r2
-	mov	r1, r5
-	muls	r3, r6, r3
-	cmp	r5, r3, lsl #1
-	blt	.L930
-	pop	{r3, r4, r5, r6, r7, pc}
-.L930:
-	ldr	r3, [r7, r1, lsl #2]
-	adds	r2, r2, #1
-	cmp	r3, #-1
-	itttt	ne
-	uxtbne	r3, r3
-	ldrhne	lr, [r0, r3, lsl #1]
-	strhne	r5, [r0, r3, lsl #1]	@ movhi
-	strhne	lr, [ip, r1, lsl #1]	@ movhi
-	b	.L928
-.L938:
+	push	{r3, lr}
+	ldr	r1, .L976
+	ldr	r0, .L976+4
+	bl	print_list_info
+	ldr	r1, .L976+8
+	ldr	r0, .L976+12
+	bl	print_list_info
+	ldr	r1, .L976+16
+	ldr	r0, .L976+20
+	bl	print_list_info
+	ldr	r1, .L976+24
+	ldr	r0, .L976+28
+	bl	print_list_info
+	ldr	r1, .L976+32
+	ldr	r0, .L976+36
+	bl	print_list_info
+	ldr	r1, .L976+40
+	ldr	r0, .L976+44
+	pop	{r3, lr}
+	b	print_list_info
+.L977:
 	.align	2
-.L937:
-	.word	.LANCHOR22
+.L976:
+	.word	.LANCHOR95
+	.word	.LANCHOR96
+	.word	.LANCHOR97
+	.word	.LANCHOR98
+	.word	.LANCHOR99
 	.word	.LANCHOR100
-	.word	.LC28
-	.word	.LANCHOR69
-	.word	.LANCHOR79
+	.word	.LANCHOR90
+	.word	.LANCHOR12
+	.word	.LANCHOR88
 	.word	.LANCHOR81
-	.word	.LANCHOR83
-	.word	.LANCHOR82
-	.size	lpa_rebuild_hash, .-lpa_rebuild_hash
-	.section	.text.ftl_open_sblk_init,"ax",%progbits
+	.word	.LANCHOR92
+	.word	.LANCHOR80
+	.size	dump_all_list_info, .-dump_all_list_info
+	.section	.text.ftl_tmp_into_update,"ax",%progbits
 	.align	1
-	.global	ftl_open_sblk_init
+	.global	ftl_tmp_into_update
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_open_sblk_init, %function
-ftl_open_sblk_init:
+	.type	ftl_tmp_into_update, %function
+ftl_tmp_into_update:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	mov	r4, r0
-	ldr	r8, .L945+12
-	mov	r6, r1
-	movs	r7, #0
-.L940:
-.L943:
-	mov	r0, r6
-	ldr	r10, .L945+16
-	bl	ftl_alloc_sblk
-	movs	r1, #0
-	mov	r5, r0
-	bl	ftl_erase_sblk
-	add	r1, r4, #16
-	mov	r0, r5
-	bl	ftl_get_blk_list_in_sblk
-	ldr	r1, .L945
-	cmp	r6, #2
-	ldrh	r2, [r8]
-	uxtb	r0, r0
-	strh	r5, [r4]	@ movhi
-	ite	eq
-	moveq	r3, #0
-	ldrbne	r3, [r1]	@ zero_extendqisi2
-	ldrb	r1, [r1]	@ zero_extendqisi2
-	strb	r0, [r4, #9]
-	smulbb	r0, r0, r2
-	strh	r7, [r4, #2]	@ movhi
-	it	ne
-	smulbbne	r3, r3, r2
-	strb	r7, [r4, #5]
-	mul	r2, r2, r1
-	ldr	r1, .L945+4
-	strh	r0, [r4, #6]	@ movhi
-	it	ne
-	uxthne	r3, r3
-	strh	r7, [r4, #10]	@ movhi
-	ldr	r0, [r1]
-	movs	r1, #255
-	strh	r3, [r4, #12]	@ movhi
-	lsls	r2, r2, #2
-	strb	r6, [r4, #4]
-	add	r0, r0, r3, lsl #2
-	bl	ftl_memset
-	ldr	r3, [r10]
-	ldrh	r2, [r4, #6]
-	strh	r2, [r3, r5, lsl #1]	@ movhi
-	ldrb	r3, [r4, #9]	@ zero_extendqisi2
-	cbnz	r3, .L939
-	mov	r1, r5
-	ldr	r0, .L945+8
-	bl	printf
-	ldr	r3, [r10]
-	movw	r2, #65535
-	strh	r2, [r3, r5, lsl #1]	@ movhi
-	movs	r3, #7
-	strb	r3, [r4, #4]
-	b	.L943
-.L939:
-	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L946:
+	@ link register save eliminated.
+	ldr	r3, .L983
+	ldr	r3, [r3]
+	ldr	r2, [r3, #16]
+	cmp	r2, #2048
+	bls	.L979
+	ldr	r1, [r3, #20]
+	add	r1, r1, r2, lsr #11
+	ubfx	r2, r2, #0, #11
+	str	r2, [r3, #16]
+	str	r1, [r3, #20]
+.L979:
+	ldr	r2, [r3, #24]
+	cmp	r2, #2048
+	bls	.L980
+	ldr	r1, [r3, #28]
+	add	r1, r1, r2, lsr #11
+	ubfx	r2, r2, #0, #11
+	str	r2, [r3, #24]
+	str	r1, [r3, #28]
+.L980:
+	ldr	r2, [r3, #32]
+	cmp	r2, #1024
+	bls	.L981
+	ldr	r1, [r3, #36]
+	add	r1, r1, r2, lsr #10
+	ubfx	r2, r2, #0, #10
+	str	r2, [r3, #32]
+	str	r1, [r3, #36]
+.L981:
+	ldr	r2, [r3, #40]
+	cmp	r2, #1024
+	bls	.L978
+	ldr	r1, [r3, #44]
+	add	r1, r1, r2, lsr #10
+	ubfx	r2, r2, #0, #10
+	str	r2, [r3, #40]
+	str	r1, [r3, #44]
+.L978:
+	bx	lr
+.L984:
 	.align	2
-.L945:
-	.word	.LANCHOR69
-	.word	.LANCHOR82
-	.word	.LC26
-	.word	.LANCHOR79
-	.word	.LANCHOR56
-	.size	ftl_open_sblk_init, .-ftl_open_sblk_init
-	.section	.text.pm_free_sblk,"ax",%progbits
+.L983:
+	.word	.LANCHOR102
+	.size	ftl_tmp_into_update, .-ftl_tmp_into_update
+	.global	__aeabi_idiv
+	.section	.text.ftl_get_blk_list_in_sblk,"ax",%progbits
 	.align	1
-	.global	pm_free_sblk
+	.global	ftl_get_blk_list_in_sblk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	pm_free_sblk, %function
-pm_free_sblk:
-	@ args = 0, pretend = 0, frame = 280
+	.type	ftl_get_blk_list_in_sblk, %function
+ftl_get_blk_list_in_sblk:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L962
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #280
-	ldrh	r2, [r3]
-	str	r3, [sp, #4]
-	cmp	r2, #128
-	bls	.L948
-	movs	r2, #74
-	ldr	r1, .L962+4
-	ldr	r0, .L962+8
-	bl	printf
-.L949:
-	b	.L949
-.L948:
-	mov	r2, #256
-	movs	r1, #0
-	add	r0, sp, #24
-	movs	r4, #1
-	bl	ftl_memset
-	ldr	r3, .L962+12
-	add	r10, sp, #24
-	ldr	r0, .L962+16
-	ldr	r1, .L962+20
-	ldrh	r7, [r3]
-	ldr	r6, [r0]
-	ldr	r5, [sp, #4]
-	rsb	r3, r7, #21
-	str	r0, [sp, #8]
-	lsls	r4, r4, r3
-	ldrh	r2, [r6, #698]
-	ldrb	r3, [r1]	@ zero_extendqisi2
-	add	r8, r6, #704
-	ldrh	fp, [r5]
-	subs	r4, r4, #1
-	movs	r5, #0
-	str	r1, [sp, #12]
-.L950:
-	uxth	r1, r5
-	cmp	r2, r1
-	bhi	.L954
-	ldr	r6, .L962+24
-	movs	r5, #0
-	ldr	r7, .L962+28
-	mov	r10, r5
-	ldrb	r4, [r6]	@ zero_extendqisi2
-	ldrh	r3, [r7]
-	smulbb	r4, r4, r3
-	uxth	r4, r4
-.L955:
-	ldr	r3, [sp, #4]
-	uxth	r2, r5
-	ldrh	r3, [r3]
-	cmp	r3, r2
-	bhi	.L960
-	mov	r0, r10
-	add	sp, sp, #280
+	ldr	r2, .L994
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #0
+	ldr	r3, .L994+4
+	mov	r8, r1
+	mov	r5, r4
+	ldrb	fp, [r2]	@ zero_extendqisi2
+	ldr	r2, .L994+8
+	ldr	r3, [r3]
+	ldrb	r10, [r2]	@ zero_extendqisi2
+	ldr	r2, .L994+12
+	add	r3, r3, r0, lsl #2
+	uxth	r7, r10
+	ldrb	r3, [r3, #3]	@ zero_extendqisi2
+	smulbb	r0, r0, r7
+	subs	r7, r7, #1
+	sxth	r7, r7
+	uxth	r6, r0
+.L986:
+	cmp	r5, fp
+	blt	.L990
+	mov	r3, r4
+	movw	r2, #65535
+.L991:
+	cmp	r3, fp
+	blt	.L992
+	mov	r0, r4
+	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L954:
-	ldr	r0, [r8], #4
-	mov	r1, r3
-	str	r2, [sp, #20]
-	str	r3, [sp, #16]
-	lsrs	r0, r0, r7
-	ands	r0, r0, r4
-	bl	__aeabi_uidiv
-	ldr	r3, [sp, #16]
-	uxth	r0, r0
-	ldr	r2, [sp, #20]
-	add	lr, r6, #416
-	movs	r1, #0
-.L951:
-	uxth	ip, r1
-	cmp	fp, ip
-	bhi	.L953
-	adds	r5, r5, #1
-	b	.L950
-.L953:
-	ldrh	ip, [lr], #2
-	cmp	r0, ip
-	ittt	eq
-	ldrheq	ip, [r10, r1, lsl #1]
-	addeq	ip, ip, #1
-	strheq	ip, [r10, r1, lsl #1]	@ movhi
-	adds	r1, r1, #1
-	b	.L951
-.L960:
-	ldr	r3, [sp, #8]
-	str	r2, [sp, #20]
-	ldr	r0, [r3]
-	uxth	r3, r5
-	add	fp, r3, #208
-	str	r3, [sp, #16]
-	ldr	r3, [sp, #12]
-	ldrh	r8, [r0, fp, lsl #1]
-	ldrh	r0, [r0, #692]
-	ldrb	r1, [r3]	@ zero_extendqisi2
+.L990:
+	asr	r1, r3, r5
+	lsls	r1, r1, #31
+	bmi	.L987
+	mov	r1, r10
+	mov	r0, r5
+	str	r2, [sp, #4]
+	str	r3, [sp]
 	bl	__aeabi_idiv
-	cmp	r0, r8
-	ldr	r3, [sp, #16]
-	ldr	r2, [sp, #20]
-	bne	.L956
-	ldrh	r0, [r7]
-	ldrb	r1, [r6]	@ zero_extendqisi2
-	smulbb	r1, r1, r0
-	add	r0, sp, #24
-	strh	r1, [r0, r3, lsl #1]	@ movhi
-.L956:
-	add	r1, sp, #24
-	ldrh	r3, [r1, r3, lsl #1]
-	cmp	r4, r3
-	bls	.L957
-	cbnz	r3, .L961
-.L959:
-	movw	r3, #65535
-	cmp	r8, r3
-	str	r3, [sp, #16]
-	beq	.L958
-	mov	r0, r8
-	bl	ftl_free_sblk
-	ldr	r3, [sp, #8]
-	ldr	r2, [r3]
-	ldr	r3, [sp, #16]
-	strh	r3, [r2, fp, lsl #1]	@ movhi
-	ldrh	r3, [r2, #688]
-	subs	r3, r3, #1
-	strh	r3, [r2, #688]	@ movhi
-	b	.L958
-.L957:
-	cmp	r3, #0
-	beq	.L959
-.L958:
+	ldr	r2, [sp, #4]
+	cmp	r10, #1
+	ldr	r3, [sp]
+	ldrh	r1, [r2]
+	rsb	r1, r1, #21
+	lsl	r0, r0, r1
+	it	hi
+	andhi	r1, r7, r5
+	add	r0, r0, r6
+	uxth	r0, r0
+	it	hi
+	addhi	r0, r0, r1
+	strh	r0, [r8, r4, lsl #1]	@ movhi
+	adds	r4, r4, #1
+.L987:
 	adds	r5, r5, #1
-	b	.L955
-.L961:
-	mov	r10, r2
-	mov	r4, r3
-	b	.L958
-.L963:
+	b	.L986
+.L992:
+	strh	r2, [r8, r3, lsl #1]	@ movhi
+	adds	r3, r3, #1
+	b	.L991
+.L995:
 	.align	2
-.L962:
-	.word	.LANCHOR101
-	.word	.LANCHOR102
-	.word	.LC0
-	.word	.LANCHOR71
-	.word	.LANCHOR46
-	.word	.LANCHOR70
-	.word	.LANCHOR69
-	.word	.LANCHOR79
-	.size	pm_free_sblk, .-pm_free_sblk
-	.section	.text.ftl_memcpy,"ax",%progbits
-	.align	1
-	.global	ftl_memcpy
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_memcpy, %function
-ftl_memcpy:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	memcpy
-	.size	ftl_memcpy, .-ftl_memcpy
-	.section	.text.flash_into_data_init,"ax",%progbits
+.L994:
+	.word	.LANCHOR78
+	.word	.LANCHOR7
+	.word	.LANCHOR67
+	.word	.LANCHOR66
+	.size	ftl_get_blk_list_in_sblk, .-ftl_get_blk_list_in_sblk
+	.section	.text.ftl_erase_phy_blk,"ax",%progbits
 	.align	1
-	.global	flash_into_data_init
+	.global	ftl_erase_phy_blk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_into_data_init, %function
-flash_into_data_init:
+	.type	ftl_erase_phy_blk, %function
+ftl_erase_phy_blk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, lr}
-	mov	r2, #2048
-	ldr	r4, .L966
-	movs	r1, #0
-	ldr	r0, [r4]
-	bl	ftl_memset
-	ldr	r0, [r4]
-	movs	r2, #32
-	ldr	r3, .L966+4
-	ldr	r1, .L966+8
-	adds	r0, r0, #80
-	str	r3, [r0, #-80]
-	mov	r3, #2032
-	str	r3, [r0, #-72]
-	movs	r3, #1
-	strh	r3, [r0, #-64]	@ movhi
-	bl	ftl_memcpy
-	ldr	r0, [r4]
-	movs	r2, #32
-	ldr	r1, .L966+12
-	pop	{r4, lr}
-	adds	r0, r0, #48
-	b	ftl_memcpy
-.L967:
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r6, r1
+	ldr	r3, .L1001
+	ldr	r7, .L1001+4
+	ldrh	r4, [r3]
+	rsb	r3, r4, #21
+	movs	r4, #1
+	asr	r5, r0, r3
+	lsls	r4, r4, r3
+	ldr	r3, .L1001+8
+	subs	r4, r4, #1
+	uxtb	r5, r5
+	ands	r4, r4, r0
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	sxth	r4, r4
+	cbz	r3, .L997
+	ldr	r3, .L1001+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L997
+	ldrh	r2, [r7]
+	clz	r1, r1
+	lsrs	r1, r1, #5
+	mov	r0, r5
+	muls	r2, r4, r2
+	bl	flash_erase_block_en
+.L997:
+	ldrh	r2, [r7]
+	uxtb	r1, r6
+	mov	r0, r5
+	muls	r2, r4, r2
+	pop	{r3, r4, r5, r6, r7, lr}
+	b	flash_erase_block_en
+.L1002:
 	.align	2
-.L966:
-	.word	.LANCHOR5
-	.word	1398362953
+.L1001:
+	.word	.LANCHOR66
 	.word	.LANCHOR103
-	.word	.LANCHOR19
-	.size	flash_into_data_init, .-flash_into_data_init
-	.section	.text.ftl_memcpy32,"ax",%progbits
+	.word	.LANCHOR72
+	.word	.LANCHOR73
+	.size	ftl_erase_phy_blk, .-ftl_erase_phy_blk
+	.section	.text.ftl_erase_sblk,"ax",%progbits
 	.align	1
-	.global	ftl_memcpy32
+	.global	ftl_erase_sblk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_memcpy32, %function
-ftl_memcpy32:
-	@ args = 0, pretend = 0, frame = 0
+	.type	ftl_erase_sblk, %function
+ftl_erase_sblk:
+	@ args = 0, pretend = 0, frame = 72
 	@ frame_needed = 0, uses_anonymous_args = 0
-	movs	r3, #0
-	push	{r4, lr}
-.L969:
-	cmp	r3, r2
-	bne	.L970
-	pop	{r4, pc}
-.L970:
-	ldr	r4, [r1, r3, lsl #2]
-	str	r4, [r0, r3, lsl #2]
+	ldr	r2, .L1027
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r6, r0
+	mov	r7, r1
+	movs	r5, #0
+	mov	r8, r2
+	sub	sp, sp, #72
+	ldr	r3, [r2]
+	add	r3, r3, r0, lsl #2
+	ldrb	r3, [r3, #3]	@ zero_extendqisi2
+	str	r3, [sp, #4]
+.L1004:
+	ldr	r3, .L1027+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r5, r3
+	bge	.L1015
+	ldr	r3, .L1027+8
+	movs	r4, #0
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	ldr	r3, .L1027+12
+	add	ip, r2, #-1
+	ldrh	r0, [r3]
+	mul	r10, r2, r5
+	mov	r3, r4
+	mul	lr, r2, r6
+	b	.L1016
+.L1006:
+	ldr	r1, [sp, #4]
+	add	fp, r3, r10
+	asr	r1, r1, fp
+	lsls	r1, r1, #31
+	bmi	.L1005
+	add	r1, sp, #72
+	add	fp, r1, r4, lsl #2
+	and	r1, r3, ip
+	add	r1, r1, lr
+	muls	r1, r0, r1
+	adds	r4, r4, #1
+	str	r1, [fp, #-64]
+.L1005:
 	adds	r3, r3, #1
-	b	.L969
-	.size	ftl_memcpy32, .-ftl_memcpy32
-	.section	.text.ftl_memcmp,"ax",%progbits
-	.align	1
-	.global	ftl_memcmp
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_memcmp, %function
-ftl_memcmp:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	memcmp
-	.size	ftl_memcmp, .-ftl_memcmp
-	.section	.text.rknand_get_clk_rate,"ax",%progbits
-	.align	1
-	.global	rknand_get_clk_rate
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	rknand_get_clk_rate, %function
-rknand_get_clk_rate:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r0, .L973
-	bx	lr
-.L974:
-	.align	2
-.L973:
-	.word	148000000
-	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
-	.section	.text.ftl_malloc,"ax",%progbits
+.L1016:
+	cmp	r3, r2
+	blt	.L1006
+	cmp	r2, #4
+	bne	.L1007
+	uxtb	fp, r7
+	mov	r10, #0
+.L1008:
+	cmp	r10, r4
+	bne	.L1009
+.L1010:
+	adds	r5, r5, #1
+	b	.L1004
+.L1009:
+	add	r3, sp, #8
+	mov	r1, fp
+	ldr	r2, [r3, r10, lsl #2]
+	uxtb	r0, r5
+	add	r10, r10, #1
+	bl	flash_erase_block_en
+	b	.L1008
+.L1007:
+	cmp	r4, #2
+	bne	.L1011
+	ldr	r3, .L1027+16
+	uxtb	r4, r5
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L1012
+	ldr	r3, .L1027+20
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L1012
+	clz	r1, r7
+	ldr	r3, [sp, #12]
+	ldr	r2, [sp, #8]
+	lsrs	r1, r1, #5
+	mov	r0, r4
+	bl	flash_erase_duplane_block
+.L1012:
+	ldr	r3, [sp, #12]
+	uxtb	r1, r7
+	ldr	r2, [sp, #8]
+	mov	r0, r4
+	bl	flash_erase_duplane_block
+	b	.L1010
+.L1011:
+	cmp	r4, #1
+	bne	.L1010
+	ldr	r3, .L1027+16
+	uxtb	r4, r5
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L1014
+	ldr	r3, .L1027+20
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L1014
+	clz	r1, r7
+	ldr	r2, [sp, #8]
+	lsrs	r1, r1, #5
+	mov	r0, r4
+	bl	flash_erase_block_en
+.L1014:
+	ldr	r2, [sp, #8]
+	uxtb	r1, r7
+	mov	r0, r4
+	bl	flash_erase_block_en
+	b	.L1010
+.L1015:
+	ldr	r1, .L1027+24
+	ldr	r0, [r8]
+	cbnz	r7, .L1017
+	ldrh	r2, [r0, r6, lsl #2]
+	adds	r3, r2, #1
+	ubfx	r3, r3, #0, #11
+	bfi	r2, r3, #0, #11
+	strh	r2, [r0, r6, lsl #2]	@ movhi
+	ldr	r2, [r1]
+	ldr	r1, [r2, #84]
+	adds	r1, r1, #1
+	str	r1, [r2, #84]
+	ldrh	r1, [r2, #96]
+	cmp	r1, r3
+	bge	.L1019
+	strh	r3, [r2, #96]	@ movhi
+.L1019:
+	movs	r0, #0
+	add	sp, sp, #72
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1017:
+	ldr	r2, [r0, r6, lsl #2]
+	ubfx	r3, r2, #11, #8
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	bfi	r2, r3, #11, #8
+	uxth	r3, r3
+	str	r2, [r0, r6, lsl #2]
+	ldr	r2, [r1]
+	ldr	r1, [r2, #80]
+	adds	r1, r1, #1
+	str	r1, [r2, #80]
+	ldrh	r1, [r2, #98]
+	cmp	r1, r3
+	it	cc
+	strhcc	r3, [r2, #98]	@ movhi
+	b	.L1019
+.L1028:
+	.align	2
+.L1027:
+	.word	.LANCHOR7
+	.word	.LANCHOR104
+	.word	.LANCHOR67
+	.word	.LANCHOR103
+	.word	.LANCHOR72
+	.word	.LANCHOR73
+	.word	.LANCHOR102
+	.size	ftl_erase_sblk, .-ftl_erase_sblk
+	.section	.text.ftl_alloc_sys_blk,"ax",%progbits
 	.align	1
-	.global	ftl_malloc
+	.global	ftl_alloc_sys_blk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_malloc, %function
-ftl_malloc:
+	.type	ftl_alloc_sys_blk, %function
+ftl_alloc_sys_blk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	movs	r1, #0
-	b	kmalloc
-	.size	ftl_malloc, .-ftl_malloc
-	.section	.text.nandc_init,"ax",%progbits
+	push	{r4, r5, r6, lr}
+	ldr	r4, .L1038
+	ldr	r2, [r4]
+	ldrh	r1, [r2, #136]
+	cmp	r1, #63
+	itt	hi
+	movhi	r3, #0
+	strhhi	r3, [r2, #136]	@ movhi
+	ldrh	r3, [r2, #112]
+	cbnz	r3, .L1031
+	movw	r2, #1130
+	ldr	r1, .L1038+4
+	ldr	r0, .L1038+8
+	bl	printf
+.L1031:
+	ldr	r3, [r4]
+	movw	r4, #65535
+	mov	r6, r4
+	movs	r5, #0
+.L1035:
+	ldrh	r2, [r3, #136]
+	add	r1, r3, r2, lsl #1
+	adds	r1, r1, #158
+.L1032:
+	cmp	r2, #63
+	ble	.L1034
+	strh	r5, [r3, #136]	@ movhi
+	b	.L1035
+.L1034:
+	ldrh	r0, [r1, #2]!
+	cmp	r0, r4
+	bne	.L1037
+	adds	r2, r2, #1
+	b	.L1032
+.L1037:
+	add	r1, r2, #80
+	strh	r6, [r3, r1, lsl #1]	@ movhi
+	strh	r2, [r3, #136]	@ movhi
+	ldrh	r2, [r3, #112]
+	subs	r2, r2, #1
+	strh	r2, [r3, #112]	@ movhi
+	pop	{r4, r5, r6, pc}
+.L1039:
+	.align	2
+.L1038:
+	.word	.LANCHOR102
+	.word	.LANCHOR105
+	.word	.LC0
+	.size	ftl_alloc_sys_blk, .-ftl_alloc_sys_blk
+	.section	.text.ftl_free_sys_blk,"ax",%progbits
 	.align	1
-	.global	nandc_init
+	.global	ftl_free_sys_blk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	nandc_init, %function
-nandc_init:
-	@ args = 0, pretend = 0, frame = 8
+	.type	ftl_free_sys_blk, %function
+ftl_free_sys_blk:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	movs	r3, #0
-	push	{r0, r1, r2, lr}
-	str	r3, [sp, #4]
-	movs	r2, #6
-	ldr	r3, .L981
-	ldr	r1, [r0, #352]
-	strb	r2, [r3]
-	ldr	r2, .L981+4
-	str	r0, [r2]
-	ldr	r2, .L981+8
-	cmp	r1, r2
-	ldr	r1, [r0, #128]
-	itt	eq
-	moveq	r2, #8
-	strbeq	r2, [r3]
-	ldr	r2, .L981+12
-	cmp	r1, r2
-	itt	eq
-	moveq	r2, #9
-	strbeq	r2, [r3]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	ldr	r2, .L981+16
-	cmp	r3, #9
-	ldr	r3, .L981+20
-	bne	.L979
-	movs	r1, #1
-	strb	r1, [r3]
-	ldr	r3, [sp, #4]
-	orr	r3, r3, #256
-	str	r3, [sp, #4]
-	ldr	r3, [sp, #4]
-	str	r3, [r0]
-	movs	r3, #0
-	str	r3, [r0, #520]
-	movw	r3, #4225
-	str	r3, [r0, #4]
-	movw	r3, #8321
-	str	r3, [r0, #8]
-	movs	r3, #38
-	str	r2, [r0, #80]
-	str	r3, [r0, #84]
-	movs	r3, #39
-	str	r3, [r0, #84]
-.L980:
-	ldr	r3, .L981+24
-	movs	r2, #1
-	strb	r2, [r3]
-	movs	r3, #0
-	ldr	r2, .L981+28
-	strh	r3, [r2]	@ movhi
-	ldr	r2, .L981+32
-	strb	r3, [r2]
-	add	sp, sp, #12
-	@ sp needed
-	ldr	pc, [sp], #4
-.L979:
-	movs	r1, #0
-	strb	r1, [r3]
-	ldr	r3, [sp, #4]
-	orr	r3, r3, #256
-	str	r3, [sp, #4]
-	ldr	r3, [sp, #4]
-	str	r3, [r0]
-	movw	r3, #4225
-	str	r1, [r0, #336]
-	str	r3, [r0, #4]
-	movw	r3, #8321
-	str	r3, [r0, #344]
-	movs	r3, #38
-	str	r2, [r0, #304]
-	str	r3, [r0, #308]
-	movs	r3, #39
-	str	r3, [r0, #308]
-	mov	r0, #2048
-	bl	ftl_malloc
-	ldr	r3, .L981+36
-	str	r0, [r3]
-	b	.L980
-.L982:
+	push	{r4, r5, r6, lr}
+	mov	r5, r0
+	ldr	r4, .L1048
+	ldr	r2, [r4]
+	ldrh	r1, [r2, #138]
+	cmp	r1, #63
+	itt	hi
+	movhi	r3, #0
+	strhhi	r3, [r2, #138]	@ movhi
+	ldrh	r3, [r2, #112]
+	cmp	r3, #63
+	bls	.L1042
+	movw	r2, #1154
+	ldr	r1, .L1048+4
+	ldr	r0, .L1048+8
+	bl	printf
+.L1042:
+	ldr	r3, [r4]
+	movs	r0, #0
+	movw	r4, #65535
+.L1046:
+	ldrh	r2, [r3, #138]
+	add	r1, r3, r2, lsl #1
+	adds	r1, r1, #158
+.L1043:
+	cmp	r2, #63
+	ble	.L1045
+	strh	r0, [r3, #138]	@ movhi
+	b	.L1046
+.L1045:
+	ldrh	r6, [r1, #2]!
+	cmp	r6, r4
+	bne	.L1044
+	add	r1, r2, #80
+	strh	r5, [r3, r1, lsl #1]	@ movhi
+	strh	r2, [r3, #138]	@ movhi
+	ldrh	r2, [r3, #112]
+	adds	r2, r2, #1
+	strh	r2, [r3, #112]	@ movhi
+	pop	{r4, r5, r6, pc}
+.L1044:
+	adds	r2, r2, #1
+	b	.L1043
+.L1049:
 	.align	2
-.L981:
-	.word	.LANCHOR7
-	.word	.LANCHOR6
-	.word	1446522928
-	.word	1446588464
-	.word	1052675
-	.word	.LANCHOR28
-	.word	.LANCHOR29
-	.word	.LANCHOR31
-	.word	.LANCHOR27
-	.word	.LANCHOR30
-	.size	nandc_init, .-nandc_init
-	.section	.text.buf_init,"ax",%progbits
+.L1048:
+	.word	.LANCHOR102
+	.word	.LANCHOR106
+	.word	.LC0
+	.size	ftl_free_sys_blk, .-ftl_free_sys_blk
+	.section	.text.ftl_info_data_recovery,"ax",%progbits
 	.align	1
-	.global	buf_init
+	.global	ftl_info_data_recovery
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	buf_init, %function
-buf_init:
+	.type	ftl_info_data_recovery, %function
+ftl_info_data_recovery:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, lr}
-	movs	r5, #0
-	ldr	r4, .L986
-	mov	r6, r5
-	ldr	r7, .L986+4
-	mov	r8, r4
-.L984:
-	ldrb	r0, [r7]	@ zero_extendqisi2
-	uxtb	r3, r5
-	strb	r6, [r4, #2]
-	adds	r5, r5, #1
-	adds	r2, r3, #1
-	strb	r3, [r4, #1]
-	strb	r2, [r4]
-	adds	r4, r4, #48
-	str	r6, [r4, #-40]
-	lsls	r0, r0, #9
-	bl	ftl_malloc
-	str	r0, [r4, #-44]
-	ldrb	r0, [r7]	@ zero_extendqisi2
-	lsls	r0, r0, #1
-	bl	ftl_malloc
-	cmp	r5, #32
-	str	r0, [r4, #-36]
-	bne	.L984
-	movs	r3, #255
-	strb	r3, [r8, #1488]
-	ldr	r3, .L986+8
-	strb	r6, [r3]
-	ldr	r3, .L986+12
-	strb	r5, [r3]
-	pop	{r4, r5, r6, r7, r8, pc}
-.L987:
-	.align	2
-.L986:
-	.word	.LANCHOR36
-	.word	.LANCHOR45
-	.word	.LANCHOR37
-	.word	.LANCHOR38
-	.size	buf_init, .-buf_init
-	.section	.text.gc_init,"ax",%progbits
+	push	{r4, r5, r6, lr}
+	movw	r3, #65535
+	ldrh	r4, [r0]
+	cmp	r4, r3
+	beq	.L1050
+	ldr	r3, .L1059
+	ldr	r5, [r3]
+	add	r6, r5, r4, lsl #2
+	ldrb	r3, [r6, #2]	@ zero_extendqisi2
+	tst	r3, #224
+	bne	.L1050
+	ldrb	r2, [r0, #4]	@ zero_extendqisi2
+	mov	r0, r4
+	bfi	r3, r2, #5, #3
+	strb	r3, [r6, #2]
+	bl	zftl_remove_free_node
+	ldrb	r3, [r6, #2]	@ zero_extendqisi2
+	ldr	r2, .L1059+4
+	tst	r3, #8
+	ldr	r0, [r2]
+	beq	.L1054
+	ldrh	r1, [r0, #116]
+	subs	r1, r1, #1
+	strh	r1, [r0, #116]	@ movhi
+.L1055:
+	and	r3, r3, #224
+	cmp	r3, #160
+	bne	.L1057
+	ldr	r3, [r5, r4, lsl #2]
+	ldr	r2, [r2]
+	ubfx	r1, r3, #11, #8
+	adds	r1, r1, #1
+	bfi	r3, r1, #11, #8
+	str	r3, [r5, r4, lsl #2]
+	ldrh	r3, [r2, #120]
+	subs	r3, r3, #1
+	strh	r3, [r2, #120]	@ movhi
+	pop	{r4, r5, r6, pc}
+.L1054:
+	tst	r3, #24
+	itete	eq
+	ldrheq	r1, [r0, #114]
+	ldrhne	r1, [r0, #118]
+	addeq	r1, r1, #-1
+	addne	r1, r1, #-1
+	ite	eq
+	strheq	r1, [r0, #114]	@ movhi
+	strhne	r1, [r0, #118]	@ movhi
+	b	.L1055
+.L1057:
+	ldrh	r1, [r5, r4, lsl #2]
+	cmp	r3, #64
+	add	r0, r1, #1
+	bfi	r1, r0, #0, #11
+	strh	r1, [r5, r4, lsl #2]	@ movhi
+	bne	.L1058
+	ldr	r2, [r2]
+	ldrh	r3, [r2, #122]
+	subs	r3, r3, #1
+	strh	r3, [r2, #122]	@ movhi
+	pop	{r4, r5, r6, pc}
+.L1058:
+	cmp	r3, #96
+	itttt	eq
+	ldreq	r2, [r2]
+	ldrheq	r3, [r2, #124]
+	addeq	r3, r3, #-1
+	strheq	r3, [r2, #124]	@ movhi
+.L1050:
+	pop	{r4, r5, r6, pc}
+.L1060:
+	.align	2
+.L1059:
+	.word	.LANCHOR7
+	.word	.LANCHOR102
+	.size	ftl_info_data_recovery, .-ftl_info_data_recovery
+	.section	.text.ftl_get_ppa_from_index,"ax",%progbits
 	.align	1
-	.global	gc_init
+	.global	ftl_get_ppa_from_index
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	gc_init, %function
-gc_init:
+	.type	ftl_get_ppa_from_index, %function
+ftl_get_ppa_from_index:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	movs	r5, #0
-	ldr	r3, .L989
-	mov	r1, r5
-	mov	r2, #320
-	ldr	r4, .L989+4
-	strb	r5, [r3]
-	ldr	r3, .L989+8
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r4, r0
+	ldr	r3, .L1065
+	ldr	r5, [r3]
+	ldr	r3, .L1065+4
+	ldrh	r2, [r3]
+	ldr	r3, .L1065+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	mul	r1, r3, r2
+	cmp	r0, r1
+	itet	ge
+	smulbbge	r3, r3, r2
+	addlt	r5, r5, #16
+	addge	r5, r5, #48
+	ldrb	r6, [r5, #9]	@ zero_extendqisi2
+	itt	ge
+	subge	r4, r0, r3
+	uxthge	r4, r4
+	mov	r1, r6
 	mov	r0, r4
-	strb	r5, [r3]
-	bl	ftl_memset
+	bl	__aeabi_idiv
+	smulbb	r6, r0, r6
 	movw	r3, #65535
-	str	r5, [r4, #8]
-	strh	r3, [r4]	@ movhi
-	ldr	r3, .L989+12
-	ldr	r5, .L989+16
-	ldrh	r3, [r3]
-	lsrs	r2, r3, #2
-	lsrs	r1, r3, #1
-	strh	r2, [r4, #32]	@ movhi
-	strh	r1, [r4, #34]	@ movhi
-	ldr	r4, .L989+20
-	ldrb	r0, [r4]	@ zero_extendqisi2
-	smulbb	r3, r0, r3
-	subs	r3, r3, #32
-	strh	r3, [r5]	@ movhi
-	ldr	r3, .L989+24
-	ldr	r5, .L989+28
-	strh	r1, [r3]	@ movhi
-	ldr	r3, .L989+32
-	strh	r2, [r3]	@ movhi
-	ldrh	r3, [r5]
-	muls	r0, r3, r0
-	lsls	r0, r0, #2
-	bl	ftl_malloc
-	ldr	r3, .L989+36
-	str	r0, [r3]
-	ldrh	r3, [r5]
-	ldrb	r0, [r4]	@ zero_extendqisi2
-	muls	r0, r3, r0
-	lsls	r0, r0, #2
-	bl	ftl_malloc
-	ldr	r3, .L989+40
-	str	r0, [r3]
-	ldrh	r3, [r5]
-	ldrb	r0, [r4]	@ zero_extendqisi2
-	muls	r0, r3, r0
-	bl	ftl_malloc
-	ldr	r3, .L989+44
-	str	r0, [r3]
-	ldrh	r3, [r5]
-	ldrb	r0, [r4]	@ zero_extendqisi2
-	muls	r0, r3, r0
-	lsls	r0, r0, #2
-	bl	ftl_malloc
-	ldr	r3, .L989+48
-	str	r0, [r3]
-	ldrh	r3, [r5]
-	ldrb	r0, [r4]	@ zero_extendqisi2
-	muls	r0, r3, r0
-	lsls	r0, r0, #2
-	bl	ftl_malloc
-	ldr	r3, .L989+52
-	str	r0, [r3]
-	pop	{r3, r4, r5, pc}
-.L990:
+	mov	r7, r0
+	subs	r4, r4, r6
+	uxth	r4, r4
+	adds	r4, r4, #8
+	ldrh	r4, [r5, r4, lsl #1]
+	cmp	r4, r3
+	bne	.L1064
+	movw	r2, #1593
+	ldr	r1, .L1065+12
+	ldr	r0, .L1065+16
+	bl	printf
+.L1064:
+	ldr	r3, .L1065+20
+	ldrh	r0, [r3]
+	mla	r0, r4, r0, r7
+	pop	{r3, r4, r5, r6, r7, pc}
+.L1066:
 	.align	2
-.L989:
-	.word	.LANCHOR67
-	.word	.LANCHOR59
-	.word	.LANCHOR104
-	.word	.LANCHOR79
-	.word	.LANCHOR105
-	.word	.LANCHOR69
-	.word	.LANCHOR106
-	.word	.LANCHOR68
-	.word	.LANCHOR58
+.L1065:
+	.word	.LANCHOR10
+	.word	.LANCHOR85
+	.word	.LANCHOR78
 	.word	.LANCHOR107
-	.word	.LANCHOR108
-	.word	.LANCHOR65
-	.word	.LANCHOR61
-	.word	.LANCHOR109
-	.size	gc_init, .-gc_init
-	.section	.text.ftl_free,"ax",%progbits
+	.word	.LC0
+	.word	.LANCHOR103
+	.size	ftl_get_ppa_from_index, .-ftl_get_ppa_from_index
+	.section	.text.lpa_hash_get_ppa,"ax",%progbits
 	.align	1
-	.global	ftl_free
+	.global	lpa_hash_get_ppa
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_free, %function
-ftl_free:
+	.type	lpa_hash_get_ppa, %function
+lpa_hash_get_ppa:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	b	free
-	.size	ftl_free, .-ftl_free
-	.section	.text.js_hash,"ax",%progbits
+	ldr	r3, .L1071
+	uxtb	r2, r0
+	push	{r4, r5}
+	ldrh	r3, [r3, r2, lsl #1]
+	ldr	r2, .L1071+4
+	ldr	r1, [r2]
+	ldr	r2, .L1071+8
+	ldr	r4, [r2]
+	movw	r2, #65535
+.L1068:
+	cmp	r3, r2
+	bne	.L1070
+	mov	r0, #-1
+	pop	{r4, r5}
+	bx	lr
+.L1070:
+	ldr	r5, [r1, r3, lsl #2]
+	cmp	r0, r5
+	bne	.L1069
+	mov	r0, r3
+	pop	{r4, r5}
+	b	ftl_get_ppa_from_index
+.L1069:
+	ldrh	r3, [r4, r3, lsl #1]
+	b	.L1068
+.L1072:
+	.align	2
+.L1071:
+	.word	.LANCHOR108
+	.word	.LANCHOR109
+	.word	.LANCHOR110
+	.size	lpa_hash_get_ppa, .-lpa_hash_get_ppa
+	.section	.text.ftl_get_new_free_page,"ax",%progbits
 	.align	1
-	.global	js_hash
+	.global	ftl_get_new_free_page
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	js_hash, %function
-js_hash:
+	.type	ftl_get_new_free_page, %function
+ftl_get_new_free_page:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L995
-	add	r1, r1, r0
-	push	{r4, lr}
-.L993:
-	cmp	r0, r1
-	bne	.L994
-	mov	r0, r3
-	pop	{r4, pc}
-.L994:
-	lsrs	r2, r3, #2
-	ldrb	r4, [r0], #1	@ zero_extendqisi2
-	add	r2, r2, r3, lsl #5
-	add	r2, r2, r4
-	eors	r3, r3, r2
-	b	.L993
-.L996:
+	ldrh	r2, [r0]
+	push	{r3, r4, r5, lr}
+	movw	r3, #65535
+	mov	r4, r0
+	cmp	r2, r3
+	bne	.L1074
+	movw	r2, #1716
+	ldr	r1, .L1081
+	ldr	r0, .L1081+4
+	bl	printf
+.L1074:
+	ldr	r3, .L1081+8
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bne	.L1075
+	movw	r2, #1717
+	ldr	r1, .L1081
+	ldr	r0, .L1081+4
+	bl	printf
+.L1075:
+	ldrh	r3, [r4, #6]
+	cbnz	r3, .L1076
+	movw	r2, #1718
+	ldr	r1, .L1081
+	ldr	r0, .L1081+4
+	bl	printf
+.L1076:
+	ldrb	r3, [r4, #5]	@ zero_extendqisi2
+	movw	r2, #65535
+	movs	r1, #0
+	adds	r3, r3, #8
+	ldrh	r0, [r4, r3, lsl #1]
+	ldr	r3, .L1081+12
+	ldrb	r5, [r3]	@ zero_extendqisi2
+.L1077:
+	cmp	r0, r2
+	ldrb	r3, [r4, #5]	@ zero_extendqisi2
+	beq	.L1079
+	ldr	r1, .L1081+16
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	ldrh	r2, [r4, #2]
+	ldrh	r1, [r1]
+	cmp	r5, r3
+	strb	r3, [r4, #5]
+	itttt	eq
+	addeq	r3, r2, #1
+	strheq	r3, [r4, #2]	@ movhi
+	moveq	r3, #0
+	strbeq	r3, [r4, #5]
+	muls	r0, r1, r0
+	ldrh	r1, [r4, #6]
+	subs	r1, r1, #1
+	strh	r1, [r4, #6]	@ movhi
+	orrs	r0, r0, r2
+	ldrh	r1, [r4, #10]
+	adds	r1, r1, #1
+	strh	r1, [r4, #10]	@ movhi
+	pop	{r3, r4, r5, pc}
+.L1079:
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	cmp	r3, r5
+	strb	r3, [r4, #5]
+	itttt	eq
+	ldrheq	r3, [r4, #2]
+	strbeq	r1, [r4, #5]
+	addeq	r3, r3, #1
+	strheq	r3, [r4, #2]	@ movhi
+	ldrb	r3, [r4, #5]	@ zero_extendqisi2
+	adds	r3, r3, #8
+	ldrh	r0, [r4, r3, lsl #1]
+	b	.L1077
+.L1082:
 	.align	2
-.L995:
-	.word	1204201446
-	.size	js_hash, .-js_hash
-	.section	.text.timer_get_time,"ax",%progbits
+.L1081:
+	.word	.LANCHOR111
+	.word	.LC0
+	.word	.LANCHOR85
+	.word	.LANCHOR78
+	.word	.LANCHOR103
+	.size	ftl_get_new_free_page, .-ftl_get_new_free_page
+	.section	.text.ftl_ext_alloc_new_blk,"ax",%progbits
 	.align	1
-	.global	timer_get_time
+	.global	ftl_ext_alloc_new_blk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	timer_get_time, %function
-timer_get_time:
-	@ args = 0, pretend = 0, frame = 0
+	.type	ftl_ext_alloc_new_blk, %function
+ftl_ext_alloc_new_blk:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
+	push	{r3, r4, r5, lr}
+	bl	ftl_alloc_sys_blk
+	subs	r3, r0, #1
+	movw	r2, #65533
+	uxth	r3, r3
+	mov	r4, r0
+	cmp	r3, r2
+	bls	.L1084
+	movw	r2, #1749
+	ldr	r1, .L1085
+	ldr	r0, .L1085+4
+	bl	printf
+.L1084:
+	ldr	r5, .L1085+8
+	movs	r1, #0
+	mov	r0, r4
+	bl	ftl_erase_phy_blk
+	ldr	r3, [r5]
+	ldrh	r0, [r3, #130]
+	bl	ftl_free_sys_blk
+	ldr	r3, [r5]
 	movs	r0, #0
-	bx	lr
-	.size	timer_get_time, .-timer_get_time
-	.section	.text.FlashCs123Init,"ax",%progbits
+	strh	r4, [r3, #130]	@ movhi
+	strh	r0, [r3, #140]	@ movhi
+	pop	{r3, r4, r5, pc}
+.L1086:
+	.align	2
+.L1085:
+	.word	.LANCHOR112
+	.word	.LC0
+	.word	.LANCHOR102
+	.size	ftl_ext_alloc_new_blk, .-ftl_ext_alloc_new_blk
+	.section	.text.ftl_total_vpn_update,"ax",%progbits
 	.align	1
-	.global	FlashCs123Init
+	.global	ftl_total_vpn_update
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashCs123Init, %function
-FlashCs123Init:
+	.type	ftl_total_vpn_update, %function
+ftl_total_vpn_update:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	bx	lr
-	.size	FlashCs123Init, .-FlashCs123Init
-	.section	.text.rk_nand_de_init,"ax",%progbits
+	ldr	r2, .L1098
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r1, r2
+	ldrh	r3, [r2]
+	cmp	r3, #4
+	bhi	.L1088
+	cbnz	r0, .L1088
+	adds	r3, r3, #1
+	strh	r3, [r2]	@ movhi
+	pop	{r3, r4, r5, r6, r7, pc}
+.L1088:
+	ldr	r2, .L1098+4
+	movs	r3, #0
+	mov	r0, r3
+	movw	ip, #65535
+	strh	r3, [r1]	@ movhi
+	ldrh	r5, [r2]
+	ldr	r2, .L1098+8
+	ldr	r6, [r2]
+	ldr	r2, .L1098+12
+	ldr	r7, [r2]
+	mov	r2, r3
+.L1090:
+	uxth	r1, r3
+	cmp	r5, r1
+	bhi	.L1093
+	ldr	r3, .L1098+16
+	ldr	r4, [r3]
+	ldr	r3, .L1098+20
+	str	r2, [r4, #524]
+	ldr	r3, [r3]
+	str	r0, [r4, #528]
+	ldrh	r1, [r3, #120]
+	cbz	r1, .L1087
+	bl	__aeabi_uidiv
+	str	r0, [r4, #532]
+.L1087:
+	pop	{r3, r4, r5, r6, r7, pc}
+.L1093:
+	ldrh	r1, [r6, r3, lsl #1]
+	cmp	r1, ip
+	beq	.L1091
+	add	r4, r7, r3, lsl #2
+	ldrb	r4, [r4, #2]	@ zero_extendqisi2
+	and	r4, r4, #224
+	cmp	r4, #160
+	ite	eq
+	addeq	r0, r0, r1
+	addne	r2, r2, r1
+.L1091:
+	adds	r3, r3, #1
+	b	.L1090
+.L1099:
+	.align	2
+.L1098:
+	.word	.LANCHOR113
+	.word	.LANCHOR6
+	.word	.LANCHOR9
+	.word	.LANCHOR7
+	.word	.LANCHOR10
+	.word	.LANCHOR102
+	.size	ftl_total_vpn_update, .-ftl_total_vpn_update
+	.section	.text.ftl_debug_info_fill,"ax",%progbits
 	.align	1
-	.global	rk_nand_de_init
+	.global	ftl_debug_info_fill
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	rk_nand_de_init, %function
-rk_nand_de_init:
+	.type	ftl_debug_info_fill, %function
+ftl_debug_info_fill:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	b	FlashDeInit
-	.size	rk_nand_de_init, .-rk_nand_de_init
-	.section	.text.rk_ftl_get_capacity,"ax",%progbits
+	movs	r0, #0
+	bx	lr
+	.size	ftl_debug_info_fill, .-ftl_debug_info_fill
+	.section	.text.ftl_vpn_update,"ax",%progbits
 	.align	1
-	.global	rk_ftl_get_capacity
+	.global	ftl_vpn_update
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	rk_ftl_get_capacity, %function
-rk_ftl_get_capacity:
+	.type	ftl_vpn_update, %function
+ftl_vpn_update:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L1001
-	ldr	r0, [r3]
-	bx	lr
-.L1002:
+	push	{r4, lr}
+	mov	r4, r0
+	bl	zftl_list_update_data_list
+	ldr	r3, .L1104
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r4, lsl #1]
+	cbnz	r3, .L1103
+	ldr	r3, .L1104+4
+	movs	r0, #1
+	str	r0, [r3]
+	pop	{r4, pc}
+.L1103:
+	movs	r0, #0
+	pop	{r4, pc}
+.L1105:
 	.align	2
-.L1001:
-	.word	.LANCHOR52
-	.size	rk_ftl_get_capacity, .-rk_ftl_get_capacity
-	.section	.text.rknand_print_hex,"ax",%progbits
+.L1104:
+	.word	.LANCHOR9
+	.word	.LANCHOR114
+	.size	ftl_vpn_update, .-ftl_vpn_update
+	.section	.text.ftl_vpn_decrement,"ax",%progbits
 	.align	1
-	.global	rknand_print_hex
+	.global	ftl_vpn_decrement
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	rknand_print_hex, %function
-rknand_print_hex:
+	.type	ftl_vpn_decrement, %function
+ftl_vpn_decrement:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r5, #0
-	ldr	r7, .L1012
-	mov	fp, r0
-	mov	r6, r1
-	mov	r8, r2
-	mov	r10, r3
-	mov	r4, r5
-.L1004:
-	cmp	r4, r10
-	bne	.L1010
-	ldr	r1, .L1012+4
-	ldr	r0, .L1012+8
-	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
-	b	printf
-.L1010:
-	cbnz	r5, .L1005
+	push	{r3, r4, r5, lr}
+	movw	r3, #65535
+	cmp	r0, r3
+	mov	r5, r0
+	beq	.L1107
+	ldr	r3, .L1115
+	ldr	r3, [r3]
+	ldrh	r4, [r3, r0, lsl #1]
+	cbnz	r4, .L1108
+	ldr	r3, .L1115+4
+	mov	r1, r0
 	mov	r2, r4
-	mov	r1, fp
-	ldr	r0, .L1012+12
-	bl	printf
-.L1005:
-	cmp	r8, #4
-	bne	.L1006
-	ldr	r1, [r6, r4, lsl #2]
-.L1011:
-	mov	r0, r7
-	adds	r5, r5, #1
-	bl	printf
-	cmp	r5, #15
-	bls	.L1009
-	movs	r5, #0
-	ldr	r1, .L1012+4
-	ldr	r0, .L1012+8
+	ldr	r3, [r3]
+	add	r3, r3, r0, lsl #2
+	ldr	r0, .L1115+8
+	ldrb	r3, [r3, #2]	@ zero_extendqisi2
+	lsrs	r3, r3, #5
 	bl	printf
-.L1009:
-	adds	r4, r4, #1
-	b	.L1004
-.L1006:
-	cmp	r8, #2
-	ite	eq
-	ldrsheq	r1, [r6, r4, lsl #1]
-	ldrbne	r1, [r6, r4]	@ zero_extendqisi2
-	b	.L1011
-.L1013:
+.L1113:
+	movs	r0, #0
+	pop	{r3, r4, r5, pc}
+.L1108:
+	subs	r4, r4, #1
+	strh	r4, [r3, r0, lsl #1]	@ movhi
+.L1107:
+	ldr	r3, .L1115+12
+	ldrh	r0, [r3]
+	mov	r4, r3
+	cmp	r5, r0
+	beq	.L1113
+	movw	r2, #65535
+	cmp	r0, r2
+	bne	.L1110
+	strh	r5, [r3]	@ movhi
+	b	.L1113
+.L1110:
+	bl	ftl_vpn_update
+	ldr	r3, .L1115+16
+	adds	r0, r0, #0
+	it	ne
+	movne	r0, #1
+	ldrh	r1, [r4]
+	strh	r5, [r4]	@ movhi
+	ldrh	r2, [r3]
+	adds	r2, r2, #1
+	uxth	r2, r2
+	cmp	r2, #7
+	it	hi
+	movhi	r2, #0
+	strh	r2, [r3]	@ movhi
+	ldrh	r2, [r3]
+	ldr	r3, .L1115+20
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	pop	{r3, r4, r5, pc}
+.L1116:
 	.align	2
-.L1012:
-	.word	.LC30
-	.word	.LC31
-	.word	.LC32
-	.word	.LC29
-	.size	rknand_print_hex, .-rknand_print_hex
-	.section	.text.hynix_get_read_retry_default,"ax",%progbits
+.L1115:
+	.word	.LANCHOR9
+	.word	.LANCHOR7
+	.word	.LC58
+	.word	.LANCHOR64
+	.word	.LANCHOR115
+	.word	.LANCHOR65
+	.size	ftl_vpn_decrement, .-ftl_vpn_decrement
+	.section	.text.lpa_hash_update_ppa,"ax",%progbits
 	.align	1
-	.global	hynix_get_read_retry_default
+	.global	lpa_hash_update_ppa
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	hynix_get_read_retry_default, %function
-hynix_get_read_retry_default:
-	@ args = 0, pretend = 0, frame = 56
+	.type	lpa_hash_update_ppa, %function
+lpa_hash_update_ppa:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1107
-	cmp	r0, #2
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #56
-	mov	r1, #173
-	mov	r2, #174
-	mov	r6, r0
-	ldr	r4, [r3]
-	add	r3, r4, #128
-	strb	r0, [r4, #112]
-	str	r3, [sp, #8]
-	mov	r3, #172
-	strb	r3, [r4, #128]
-	mov	r3, #175
-	strb	r1, [r4, #129]
-	strb	r2, [r4, #130]
-	strb	r3, [r4, #131]
-	bne	.L1015
-	movs	r3, #167
-	movs	r2, #247
-	strb	r3, [r4, #128]
-	ldr	r3, .L1107+4
-	strb	r2, [r3, #17]
-.L1069:
-	mov	r10, #7
-	b	.L1101
-.L1015:
-	cmp	r0, #3
-	bne	.L1017
-	add	r2, r4, #127
-	movs	r3, #176
-.L1018:
-	strb	r3, [r2, #1]!
-	adds	r3, r3, #1
-	uxtb	r3, r3
-	cmp	r3, #184
-	bne	.L1018
-.L1102:
-	mov	r10, #8
-	mov	fp, r10
-.L1016:
-	subs	r3, r6, #1
-	cmp	r3, #1
-	bhi	.L1023
-	movs	r6, #0
-.L1024:
-	ldr	r3, .L1107+8
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	uxtb	r3, r6
-	cmp	r2, r3
-	bhi	.L1029
-.L1030:
-	strb	fp, [r4, #113]
-	strb	r10, [r4, #114]
-	add	sp, sp, #56
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1017:
-	cmp	r0, #4
-	bne	.L1019
-	movs	r0, #204
-	strb	r1, [r4, #133]
-	strb	r0, [r4, #128]
-	movs	r0, #191
-	strb	r0, [r4, #129]
-	movs	r0, #170
-	strb	r0, [r4, #130]
-	movs	r0, #171
-	strb	r0, [r4, #131]
-	movs	r0, #205
-	strb	r0, [r4, #132]
-	strb	r2, [r4, #134]
-	strb	r3, [r4, #135]
-	b	.L1102
-.L1019:
-	cmp	r0, #5
-	bne	.L1020
-	movs	r3, #56
-	mov	r10, #8
-	strb	r3, [r4, #128]
-	movs	r3, #57
-	strb	r3, [r4, #129]
-	movs	r3, #58
-	strb	r3, [r4, #130]
-	movs	r3, #59
-	strb	r3, [r4, #131]
-.L1101:
-	mov	fp, #4
-	b	.L1016
-.L1020:
-	cmp	r0, #6
-	bne	.L1021
-	movs	r3, #14
-	mov	r10, #12
-	strb	r3, [r4, #128]
-	movs	r3, #15
-	strb	r3, [r4, #129]
-	movs	r3, #16
-	strb	r3, [r4, #130]
-	movs	r3, #17
-	strb	r3, [r4, #131]
-	b	.L1101
-.L1021:
-	cmp	r0, #7
-	bne	.L1069
-	add	r2, r4, #127
-	movs	r3, #176
-.L1022:
-	strb	r3, [r2, #1]!
-	adds	r3, r3, #1
-	uxtb	r3, r3
-	cmp	r3, #184
-	bne	.L1022
-	movs	r3, #212
-	mov	r10, #12
-	strb	r3, [r4, #136]
-	movs	r3, #213
-	strb	r3, [r4, #137]
-	mov	fp, #10
-	b	.L1016
-.L1029:
-	ldr	r2, .L1107+12
-	movs	r1, #160
-	add	r8, fp, #-1
-	add	r7, r4, #127
-	ldrb	r3, [r2, r3]	@ zero_extendqisi2
-	mla	r1, r1, r3, r4
-	add	r2, r1, #144
-	ldr	r1, [sp, #8]
+	uxtb	ip, r0
+	ldr	r4, .L1128
+	movw	r6, #65535
+	mov	fp, r6
+	ldr	r5, .L1128+4
+	ldr	lr, [r4]
+	ldr	r4, .L1128+8
+	ldrh	r3, [r5, ip, lsl #1]
+	ldr	r4, [r4]
+.L1118:
+	cmp	r3, fp
+	beq	.L1122
+	ldr	r7, [lr, r3, lsl #2]
+	add	r8, lr, r3, lsl #2
+	cmp	r0, r7
+	bne	.L1119
+	cmp	r6, fp
+	mov	r10, #-1
+	ite	eq
+	ldrheq	r6, [r4, r3, lsl #1]
+	ldrhne	r7, [r4, r3, lsl #1]
+	str	r10, [r8]
+	ite	eq
+	strheq	r6, [r5, ip, lsl #1]	@ movhi
+	strhne	r7, [r4, r6, lsl #1]	@ movhi
+	movw	r6, #65535
+	strh	r6, [r4, r3, lsl #1]	@ movhi
+.L1122:
+	ldrh	r3, [r5, ip, lsl #1]
+	str	r0, [lr, r2, lsl #2]
+	strh	r2, [r5, ip, lsl #1]	@ movhi
+	strh	r3, [r4, r2, lsl #1]	@ movhi
+	adds	r3, r1, #1
+	beq	.L1124
+	ldr	r3, .L1128+12
+	ldrh	r0, [r3]
+	movs	r3, #1
+	rsb	r2, r0, #21
+	lsls	r3, r3, r2
+	ldr	r2, .L1128+16
+	lsr	r0, r1, r0
+	subs	r3, r3, #1
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	ands	r0, r0, r3
+	bl	__aeabi_uidiv
+	uxth	r0, r0
+	bl	ftl_vpn_decrement
+.L1124:
+	mov	r0, #-1
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1119:
+	mov	r6, r3
+	ldrh	r3, [r4, r3, lsl #1]
+	b	.L1118
+.L1129:
+	.align	2
+.L1128:
+	.word	.LANCHOR109
+	.word	.LANCHOR108
+	.word	.LANCHOR110
+	.word	.LANCHOR66
+	.word	.LANCHOR67
+	.size	lpa_hash_update_ppa, .-lpa_hash_update_ppa
+	.section	.text.ftl_mask_bad_block,"ax",%progbits
+	.align	1
+	.global	ftl_mask_bad_block
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_mask_bad_block, %function
+ftl_mask_bad_block:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1137
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
+	ubfx	r6, r0, #21, #3
+	ldrb	r4, [r3]	@ zero_extendqisi2
+	ldr	r3, .L1137+4
+	mov	r1, r4
+	smulbb	r2, r6, r4
+	uxtb	r8, r2
+	ldrh	r2, [r3]
+	lsr	r3, r0, r2
+	rsb	r2, r2, #21
+	movs	r0, #1
+	lsls	r0, r0, r2
+	subs	r0, r0, #1
+	ands	r0, r0, r3
+	uxth	r10, r0
+	bl	__aeabi_uidiv
+	ldr	r3, .L1137+8
+	cmp	r4, #1
+	it	hi
+	addhi	r2, r4, #-1
+	mov	r5, r0
+	it	hi
+	andhi	r2, r2, r10
+	uxth	r7, r0
+	ldr	r3, [r3]
+	itt	hi
+	addhi	r2, r2, r8
+	uxtbhi	r8, r2
+	lsls	r3, r3, #17
+	bpl	.L1132
+	uxth	r3, r0
+	str	r10, [sp]
+	mov	r2, r8
+	ldr	r0, .L1137+12
+	mov	r1, r6
+	bl	printf
+.L1132:
+	ldr	r3, .L1137+16
+	ldrh	r3, [r3]
+	cmp	r3, r7
+	bls	.L1130
+	ldr	r3, .L1137+20
+	uxth	r5, r5
+	movs	r2, #1
+	lsl	r8, r2, r8
+	ldr	r3, [r3]
+	add	r5, r3, r5, lsl #2
+	ldrb	r2, [r5, #3]	@ zero_extendqisi2
+	orr	r2, r2, r8
+	strb	r2, [r5, #3]
+.L1130:
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.L1138:
+	.align	2
+.L1137:
+	.word	.LANCHOR67
+	.word	.LANCHOR66
+	.word	.LANCHOR14
+	.word	.LC59
+	.word	.LANCHOR6
+	.word	.LANCHOR7
+	.size	ftl_mask_bad_block, .-ftl_mask_bad_block
+	.section	.text.gc_free_bad_sblk,"ax",%progbits
+	.align	1
+	.global	gc_free_bad_sblk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_free_bad_sblk, %function
+gc_free_bad_sblk:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r8, r0
+	ldr	r4, .L1153
+	ldr	r3, [r4, #324]
+	cbz	r3, .L1151
+	ldr	r7, .L1153+4
+	mov	r10, #0
+.L1141:
+	ldr	r3, .L1153+8
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	uxth	r3, r10
+	cmp	r2, r3
+	bhi	.L1148
+.L1151:
+	movs	r0, #0
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1148:
+	ldr	r3, .L1153+12
+	uxth	r0, r10
+	ldrb	fp, [r3]	@ zero_extendqisi2
+	mov	r1, fp
+	bl	__aeabi_idiv
+	ldrh	r5, [r7]
+	uxth	r6, fp
+	cmp	fp, #1
+	ldr	r2, .L1153+16
+	mov	fp, #0
+	rsb	r5, r5, #21
+	lsl	r0, r0, r5
+	smulbb	r5, r8, r6
+	itt	hi
+	addhi	r6, r6, #-1
+	andhi	r6, r6, r10
+	add	r5, r5, r0
+	uxth	r5, r5
+	itt	hi
+	addhi	r5, r5, r6
+	uxthhi	r5, r5
+.L1143:
+	ldr	r1, [r4, #324]
+	uxth	r6, fp
+	mov	r3, r6
+	cmp	r1, r6
+	bhi	.L1147
+	add	r10, r10, #1
+	b	.L1141
+.L1147:
+	adds	r3, r3, #164
+	ldrh	r3, [r4, r3, lsl #1]
+	cmp	r3, r5
+	bne	.L1144
+	mov	r0, r2
+	mov	r1, r5
 	str	r2, [sp, #4]
-	ldr	r2, .L1107+16
-	uxtab	r8, r1, r8
-	ldr	r5, [r2]
+	bl	printf
+	ldrh	r0, [r7]
+	lsl	r0, r5, r0
+	bl	ftl_mask_bad_block
+	ldr	r3, [r4, #324]
 	ldr	r2, [sp, #4]
-	add	r5, r5, r3, lsl #8
-	subs	r2, r2, #1
-	addw	r3, r5, #2056
-.L1025:
-	str	r2, [sp, #16]
-	movs	r2, #55
-	str	r2, [r3]
-	ldrb	r0, [r7, #1]!	@ zero_extendqisi2
+.L1145:
+	cmp	r6, r3
+	bcc	.L1146
+	subs	r3, r3, #1
+	str	r3, [r4, #324]
+.L1144:
+	add	fp, fp, #1
+	b	.L1143
+.L1146:
+	add	r1, r6, #165
+	ldrh	r0, [r4, r1, lsl #1]
+	add	r1, r6, #164
+	adds	r6, r6, #1
+	uxth	r6, r6
+	strh	r0, [r4, r1, lsl #1]	@ movhi
+	b	.L1145
+.L1154:
+	.align	2
+.L1153:
+	.word	.LANCHOR63
+	.word	.LANCHOR66
+	.word	.LANCHOR78
+	.word	.LANCHOR67
+	.word	.LC60
+	.size	gc_free_bad_sblk, .-gc_free_bad_sblk
+	.section	.text.ftl_free_sblk,"ax",%progbits
+	.align	1
+	.global	ftl_free_sblk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_free_sblk, %function
+ftl_free_sblk:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r6, r0
+	ldr	r3, .L1175
+	ldr	r10, [r3]
+	lsls	r3, r0, #2
+	add	r7, r10, r3
+	ldrb	r4, [r7, #2]	@ zero_extendqisi2
+	lsls	r2, r4, #28
+	lsr	r3, r4, #5
+	str	r3, [sp, #4]
+	bpl	.L1157
+	ldr	r2, .L1175+4
+	ldrh	r3, [r10, r0, lsl #2]
+	ldr	r5, [r10, r0, lsl #2]
+	ldr	r2, [r2]
+	ubfx	r3, r3, #0, #11
 	str	r3, [sp, #12]
-	str	r0, [r5, #2052]
-	movs	r0, #80
-	bl	timer_delay_ns
-	ldr	r0, [r5, #2048]
-	cmp	r8, r7
-	ldr	r2, [sp, #16]
+	ubfx	r5, r5, #11, #8
+	ldrh	fp, [r2, #74]
+	ldrh	r8, [r2, #72]
+	ldr	r2, .L1175+8
+	add	fp, fp, r3
+	uxth	fp, fp
+	add	r8, r8, r5
+	ldrh	r2, [r2]
+	uxth	r8, r8
+	mov	r0, fp
+	mov	r1, r2
+	str	r2, [sp, #8]
+	bl	__aeabi_uidiv
+	ldr	r1, .L1175+12
+	uxtah	r0, r8, r0
+	ldr	r2, [sp, #8]
 	ldr	r3, [sp, #12]
-	strb	r0, [r2, #1]!
-	bne	.L1025
-	ldr	r0, [sp, #4]
+	ldrh	r1, [r1]
+	cmp	r0, r1
+	ble	.L1158
+	ldr	r1, .L1175+16
+	ldr	ip, .L1175+52
+	ldrh	r0, [r1]
+	ldr	r1, .L1175+20
+	ldrh	ip, [ip]
+	adds	r0, r0, #7
+	ldrh	r1, [r1]
+	add	r1, r1, ip
+	cmp	r0, r1
+	blt	.L1159
+.L1174:
+	movs	r1, #2
+	bfi	r4, r1, #3, #2
+.L1172:
+	strb	r4, [r7, #2]
+.L1160:
+	ldrb	r1, [r7, #2]	@ zero_extendqisi2
+	ands	r1, r1, #24
+	bne	.L1164
+	muls	r5, r2, r5
+	ldrh	r2, [r10, r6, lsl #2]
+	add	r5, r5, r5, lsl #1
+	add	r3, r3, r5, asr #2
+	ubfx	r3, r3, #2, #9
+	bfi	r2, r3, #0, #11
+	strh	r2, [r10, r6, lsl #2]	@ movhi
+.L1157:
+	mov	r0, r6
+	bl	zftl_remove_data_node
+	ldr	r3, .L1175
+	lsls	r2, r6, #2
+	ldr	r3, [r3]
+	add	r3, r3, r2
+	ldrb	r2, [r3, #2]	@ zero_extendqisi2
+	bfc	r2, #5, #3
+	strb	r2, [r3, #2]
 	movs	r2, #0
-	ldr	ip, .L1107+4
-.L1026:
-	movs	r3, #1
-	add	r7, ip, r2
-.L1027:
-	ldrb	r5, [r7, r3, lsl #2]	@ zero_extendqisi2
-	ldrb	lr, [r0]	@ zero_extendqisi2
-	add	r5, r5, lr
-	strb	r5, [r0, r3, lsl #3]
-	adds	r3, r3, #1
-	cmp	r3, #7
-	bne	.L1027
-	adds	r2, r2, #1
-	adds	r0, r0, #1
-	cmp	r2, #4
-	bne	.L1026
-	ldr	r2, [sp, #4]
-	movs	r3, #0
-	adds	r6, r6, #1
-	strb	r3, [r2, #16]
-	strb	r3, [r2, #24]
-	strb	r3, [r2, #32]
-	strb	r3, [r2, #40]
-	strb	r3, [r2, #48]
-	strb	r3, [r2, #41]
-	strb	r3, [r2, #49]
-	b	.L1024
-.L1023:
-	subs	r3, r6, #3
+	ldr	r3, .L1175+24
+	ldr	r3, [r3]
+	strh	r2, [r3, r6, lsl #1]	@ movhi
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #6
+	and	r3, r3, #7
 	cmp	r3, #4
-	bhi	.L1030
-	smulbb	r3, r10, fp
-	asrs	r2, r3, #2
-	lsls	r3, r3, #4
-	str	r3, [sp, #48]
-	lsls	r3, r2, #3
-	str	r2, [sp, #8]
-	str	r3, [sp, #52]
-	lsls	r3, r2, #2
-	str	r3, [sp, #36]
-	movs	r3, #0
-.L1106:
-	str	r3, [sp, #24]
-	ldr	r3, .L1107+8
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	ldrb	r3, [sp, #24]	@ zero_extendqisi2
-	cmp	r2, r3
-	bls	.L1030
-	ldr	r2, .L1107+12
-	movs	r1, #160
-	movs	r7, #255
-	ldrb	r3, [r2, r3]	@ zero_extendqisi2
-	str	r3, [sp, #4]
-	mla	r1, r1, r3, r4
-	ldr	r2, [sp, #4]
-	add	r3, r1, #144
-	str	r3, [sp, #44]
-	ldr	r3, .L1107+16
-	ldr	r3, [r3]
-	str	r3, [sp, #12]
-	add	r5, r3, r2, lsl #8
-	str	r7, [r5, #2056]
-	bl	nandc_wait_flash_ready
-	cmp	r6, #4
-	mov	r3, #54
-	str	r3, [r5, #2056]
-	bne	.L1032
-	movs	r3, #64
-	str	r7, [r5, #2052]
-	str	r3, [r5, #2048]
-	movs	r3, #204
-.L1103:
-	str	r3, [r5, #2052]
-	movs	r3, #77
-	b	.L1104
-.L1032:
-	subs	r3, r6, #5
-	cmp	r3, #1
-	bhi	.L1034
-	ldrb	r3, [r4, #128]	@ zero_extendqisi2
-	str	r3, [r5, #2052]
-	movs	r3, #82
-.L1104:
-	str	r3, [r5, #2048]
-	cmp	r6, #6
-	ldr	r3, [sp, #12]
-	ldr	r2, [sp, #4]
-	add	r5, r3, r2, lsl #8
-	mov	r3, #22
-	ldr	r2, [sp, #4]
-	str	r3, [r5, #2056]
-	mov	r3, #23
-	str	r3, [r5, #2056]
-	mov	r3, #4
-	str	r3, [r5, #2056]
-	mov	r3, #25
-	str	r3, [r5, #2056]
-	mov	r3, #0
-	str	r3, [r5, #2056]
-	str	r3, [r5, #2052]
-	str	r3, [r5, #2052]
-	it	eq
-	moveq	r3, #31
-	str	r3, [r5, #2052]
-	movs	r3, #2
-	str	r3, [r5, #2052]
-	movs	r3, #0
-	str	r3, [r5, #2052]
-	ldr	r3, [sp, #12]
-	add	r3, r3, r2, lsl #8
-	movs	r2, #48
-	str	r2, [r3, #2056]
-	bl	nandc_wait_flash_ready
-	subs	r3, r6, #5
-	cmp	r3, #1
-	str	r3, [sp, #28]
-	bls	.L1070
-	cmp	r6, #7
-	ite	ne
-	movne	r2, #2
-	moveq	r2, #32
-.L1037:
-	ldr	r3, .L1107+20
-	subs	r2, r2, #1
+	bhi	.L1166
+	mov	r0, r6
+	bl	gc_free_bad_sblk
+.L1166:
+	ldrb	r3, [r7, #2]	@ zero_extendqisi2
+	lsls	r3, r3, #28
+	bpl	.L1167
+	ldr	r3, .L1175+28
 	ldr	r3, [r3]
-	subs	r1, r3, #1
-	uxtab	r2, r3, r2
-	mov	r0, r1
-.L1038:
-	ldr	r7, [r5, #2048]
-	strb	r7, [r0, #1]!
-	cmp	r0, r2
-	bne	.L1038
-	cmp	r6, #7
-	bne	.L1039
-	movs	r2, #0
-.L1041:
-	ldrb	r0, [r3, r2, lsl #2]	@ zero_extendqisi2
-	uxtb	r1, r2
-	cmp	r0, #12
-	beq	.L1040
-	add	r0, r3, r2, lsl #2
-	ldrb	r0, [r0, #1]	@ zero_extendqisi2
-	cmp	r0, #10
-	beq	.L1040
-	adds	r2, r2, #1
-	cmp	r2, #8
-	bne	.L1041
-.L1042:
-	movs	r1, #0
-	ldr	r0, .L1107+24
-	bl	printf
-.L1044:
-	b	.L1044
-.L1034:
-	movs	r3, #174
-	str	r3, [r5, #2052]
-	movs	r3, #0
-	str	r3, [r5, #2048]
-	movs	r3, #176
-	b	.L1103
-.L1070:
-	movs	r2, #16
-	b	.L1037
-.L1108:
+	ldrh	r2, [r3, #584]
+	cmp	r2, r6
+	bne	.L1168
+	ldrh	r1, [r3, #588]
+	movw	r2, #65535
+	strh	r2, [r3, #584]	@ movhi
+	cmp	r1, r2
+	bne	.L1167
+	ldr	r0, .L1175+32
+	mov	r1, r6
+	strh	r6, [r3, #588]	@ movhi
+.L1173:
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	printf
+.L1159:
+	ldr	r1, .L1175+36
+	ldr	ip, .L1175+56
+	ldrh	r0, [r1]
+	ldr	r1, .L1175+40
+	ldrh	ip, [ip]
+	adds	r0, r0, #7
+	ldrh	r1, [r1]
+	add	r1, r1, ip
+	ldr	ip, .L1175+60
+	ldrh	ip, [ip]
+	add	r1, r1, ip
+	cmp	r0, r1
+	blt	.L1174
+.L1163:
+	bfc	r4, #3, #2
+	b	.L1172
+.L1158:
+	ldr	r1, .L1175+44
+	mla	r8, r8, r2, fp
+	ldrh	r1, [r1]
+	cmp	r8, r1
+	ble	.L1160
+	ldr	r1, .L1175+36
+	ldr	ip, .L1175+56
+	ldrh	r0, [r1]
+	ldr	r1, .L1175+40
+	ldrh	ip, [ip]
+	adds	r0, r0, #7
+	ldrh	r1, [r1]
+	add	r1, r1, ip
+	ldr	ip, .L1175+60
+	ldrh	ip, [ip]
+	add	r1, r1, ip
+	cmp	r0, r1
+	bge	.L1163
+	ldr	r1, .L1175+16
+	ldr	ip, .L1175+52
+	ldrh	r0, [r1]
+	ldr	r1, .L1175+20
+	ldrh	ip, [ip]
+	adds	r0, r0, #7
+	ldrh	r1, [r1]
+	add	r1, r1, ip
+	cmp	r0, r1
+	blt	.L1163
+	b	.L1174
+.L1164:
+	cmp	r1, #16
+	bne	.L1157
+	mov	r0, r3
+	mov	r1, r2
+	bl	__aeabi_idiv
+	add	r0, r0, r0, lsl #1
+	ldr	r3, [r10, r6, lsl #2]
+	add	r5, r5, r0, asr #2
+	ubfx	r5, r5, #2, #6
+	bfi	r3, r5, #11, #8
+	str	r3, [r10, r6, lsl #2]
+	b	.L1157
+.L1168:
+	ldrh	r2, [r3, #586]
+	cmp	r2, r6
+	bne	.L1167
+	ldrh	r1, [r3, #590]
+	movw	r2, #65535
+	strh	r2, [r3, #586]	@ movhi
+	cmp	r1, r2
+	bne	.L1167
+	strh	r6, [r3, #590]	@ movhi
+	mov	r1, r6
+	ldr	r0, .L1175+48
+	b	.L1173
+.L1167:
+	mov	r0, r6
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	zftl_insert_free_list
+.L1176:
 	.align	2
-.L1107:
-	.word	.LANCHOR5
-	.word	.LANCHOR110
+.L1175:
+	.word	.LANCHOR7
+	.word	.LANCHOR102
 	.word	.LANCHOR8
+	.word	.LANCHOR116
+	.word	.LANCHOR93
+	.word	.LANCHOR92
+	.word	.LANCHOR9
 	.word	.LANCHOR10
-	.word	.LANCHOR6
-	.word	.LANCHOR111
-	.word	.LC33
-.L1040:
-	cmp	r1, #6
-	bhi	.L1042
-.L1043:
-	ldr	r3, .L1109
-	ldr	r8, [r3]
-	mov	r3, r8
-.L1048:
-	ldr	r1, [sp, #48]
-	sub	r2, r3, r8
+	.word	.LC61
+	.word	.LANCHOR117
+	.word	.LANCHOR90
+	.word	.LANCHOR118
+	.word	.LC62
+	.word	.LANCHOR97
+	.word	.LANCHOR95
+	.word	.LANCHOR88
+	.size	ftl_free_sblk, .-ftl_free_sblk
+	.section	.text.gc_free_src_blk,"ax",%progbits
+	.align	1
+	.global	gc_free_src_blk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_free_src_blk, %function
+gc_free_src_blk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	movs	r5, #0
+	ldr	r6, .L1214
+.L1178:
+	uxth	r2, r5
+	ldr	r3, .L1214+4
+	ldrh	r1, [r3, #52]
 	cmp	r1, r2
-	bgt	.L1049
-	ldr	r3, .L1109
-	ldr	r1, [r3]
-	ldr	r3, [sp, #36]
-	adds	r0, r1, r3
-	movs	r3, #8
-.L1051:
-	mov	ip, r0
-	movs	r7, #0
-.L1050:
-	ldr	r2, [ip]
-	adds	r7, r7, #1
-	mvns	r2, r2
-	str	r2, [ip], #4
-	ldr	r2, [sp, #8]
-	cmp	r2, r7
-	bgt	.L1050
-	ldr	r2, [sp, #52]
-	subs	r3, r3, #1
-	add	r0, r0, r2
-	bne	.L1051
-	mov	ip, r1
-	str	r3, [sp, #20]
-.L1052:
-	movs	r0, #0
-	mov	r2, r0
-.L1056:
-	movs	r3, #1
-	mov	lr, #0
-	lsl	r7, r3, r2
-	movs	r3, #16
-	str	ip, [sp, #16]
-	str	r7, [sp, #32]
-	str	r3, [sp, #40]
-.L1054:
-	ldr	r3, [sp, #32]
-	mov	r7, r3
-	ldr	r3, [sp, #16]
+	bhi	.L1192
+	movs	r2, #0
+	strh	r2, [r3, #52]	@ movhi
+	pop	{r3, r4, r5, r6, r7, pc}
+.L1192:
+	uxth	r2, r5
+	add	r3, r3, r2, lsl #1
+	ldrh	r4, [r3, #54]
+	ldr	r3, [r6]
+	ldrh	r2, [r3, r4, lsl #1]
+	cbz	r2, .L1179
+	mov	r1, r4
+	ldr	r0, .L1214+8
+	bl	printf
+.L1179:
+	ldr	r3, [r6]
+	movs	r2, #0
+	strh	r2, [r3, r4, lsl #1]	@ movhi
+	ldr	r3, .L1214+12
+	ldr	r7, [r3]
+	ldr	r3, .L1214+16
 	ldr	r3, [r3]
-	bics	r3, r7, r3
-	ldr	r3, [sp, #36]
-	ldr	r7, [sp, #16]
-	it	eq
-	addeq	lr, lr, #1
-	add	r7, r7, r3
-	ldr	r3, [sp, #40]
-	str	r7, [sp, #16]
-	subs	r3, r3, #1
-	str	r3, [sp, #40]
-	bne	.L1054
-	cmp	lr, #8
-	add	r2, r2, #1
-	itt	hi
-	ldrhi	r3, [sp, #32]
-	orrhi	r0, r0, r3
-	cmp	r2, #32
-	bne	.L1056
-	ldr	r3, [sp, #20]
-	str	r0, [ip], #4
-	adds	r3, r3, #1
-	str	r3, [sp, #20]
-	ldr	r2, [sp, #20]
-	ldr	r3, [sp, #8]
-	cmp	r3, r2
-	bgt	.L1052
-	subs	r2, r1, #4
-	add	r0, r1, #28
-	movs	r3, #0
-.L1059:
-	ldr	r7, [r2, #4]!
-	cbnz	r7, .L1058
-	adds	r3, r3, #1
-.L1058:
-	cmp	r0, r2
-	bne	.L1059
-	cmp	r3, #7
-	ble	.L1060
-	ldr	r0, .L1109+4
-	mov	r3, #1024
-	movs	r2, #1
-	bl	rknand_print_hex
-	movs	r1, #0
-	ldr	r0, .L1109+8
+	add	r7, r7, r4, lsl #2
+	lsls	r3, r3, #23
+	bpl	.L1180
+	ldrb	r2, [r7, #2]	@ zero_extendqisi2
+	mov	r1, r4
+	ldr	r0, .L1214+20
+	lsrs	r2, r2, #5
 	bl	printf
-.L1061:
-	b	.L1061
-.L1039:
-	cmp	r6, #6
-	bne	.L1043
-	adds	r3, r3, #7
-.L1045:
-	ldrb	r2, [r1, #1]!	@ zero_extendqisi2
-	cmp	r2, #12
-	beq	.L1043
-	ldrb	r2, [r1, #8]	@ zero_extendqisi2
-	cmp	r2, #4
-	beq	.L1043
-	cmp	r1, r3
-	bne	.L1045
-	movs	r1, #0
-	ldr	r0, .L1109+8
+.L1180:
+	ldrb	r3, [r7, #2]	@ zero_extendqisi2
+	and	r2, r3, #224
+	cmp	r2, #224
+	beq	.L1181
+	tst	r3, #192
+	bne	.L1182
+.L1181:
+	mov	r2, #932
+	ldr	r1, .L1214+24
+	ldr	r0, .L1214+28
 	bl	printf
-.L1047:
-	b	.L1047
-.L1049:
-	ldr	r2, [r5, #2048]
-	strb	r2, [r3], #1
-	b	.L1048
-.L1060:
-	cmp	r6, #6
-	beq	.L1072
-	cmp	r6, #7
-	ite	ne
-	movne	lr, #8
-	moveq	lr, #10
-.L1062:
-	add	r3, fp, #-1
-	ldr	r1, [sp, #44]
-	uxtb	r3, r3
-	movs	r0, #0
-	adds	r3, r3, #1
-.L1063:
-	mov	ip, r1
-	mov	r2, r8
-.L1064:
-	ldrb	r7, [r2], #1	@ zero_extendqisi2
-	strb	r7, [ip], #1
-	sub	r7, r2, r8
-	uxtb	r7, r7
-	cmp	fp, r7
-	bhi	.L1064
-	adds	r0, r0, #1
-	add	r8, r8, r3
-	cmp	r10, r0
-	add	r1, r1, lr
-	bgt	.L1063
-	ldr	r3, [sp, #12]
-	mov	r8, #255
-	ldr	r2, [sp, #4]
-	add	r7, r3, r2, lsl #8
-	str	r8, [r7, #2056]
-	bl	nandc_wait_flash_ready
-	ldr	r3, [sp, #28]
-	cmp	r3, #1
-	bhi	.L1066
-	movs	r3, #54
-	movs	r2, #22
-	str	r3, [r7, #2056]
-	ldrb	r3, [r4, #128]	@ zero_extendqisi2
-	str	r3, [r5, #2052]
-	movs	r3, #0
-	str	r3, [r5, #2048]
-	str	r2, [r7, #2056]
-	str	r3, [r7, #2056]
-	str	r3, [r5, #2052]
-	str	r3, [r5, #2052]
-	movs	r3, #48
-	str	r8, [r5, #2052]
-	str	r8, [r5, #2052]
-	str	r8, [r5, #2052]
-.L1105:
-	str	r3, [r7, #2056]
-	bl	nandc_wait_flash_ready
-	ldr	r3, [sp, #24]
-	adds	r3, r3, #1
-	b	.L1106
-.L1072:
-	mov	lr, #4
-	b	.L1062
-.L1066:
-	movs	r3, #56
-	b	.L1105
-.L1110:
+.L1182:
+	mov	r0, r4
+	bl	ftl_free_sblk
+	ldr	r3, .L1214+32
+	ldr	r3, [r3]
+	ldrh	r1, [r3, #124]
+	cbz	r1, .L1183
+	add	r0, r3, #392
+	movs	r2, #0
+.L1185:
+	ldrh	r7, [r0], #2
+	cmp	r4, r7
+	bne	.L1184
+	adds	r2, r2, #196
+	movw	r0, #65535
+	subs	r1, r1, #1
+	strh	r0, [r3, r2, lsl #1]	@ movhi
+	strh	r1, [r3, #124]	@ movhi
+.L1183:
+	ldrh	r1, [r3, #120]
+	cbz	r1, .L1186
+	add	r0, r3, #136
+	movs	r2, #0
+.L1188:
+	ldrh	r7, [r0], #2
+	cmp	r4, r7
+	bne	.L1187
+	adds	r2, r2, #68
+	movw	r0, #65535
+	subs	r1, r1, #1
+	strh	r0, [r3, r2, lsl #1]	@ movhi
+	strh	r1, [r3, #120]	@ movhi
+.L1186:
+	ldrh	r1, [r3, #122]
+	cbz	r1, .L1189
+	add	r0, r3, #264
+	movs	r2, #0
+.L1191:
+	ldrh	r7, [r0], #2
+	cmp	r4, r7
+	bne	.L1190
+	adds	r2, r2, #132
+	movw	r0, #65535
+	subs	r1, r1, #1
+	strh	r0, [r3, r2, lsl #1]	@ movhi
+	strh	r1, [r3, #122]	@ movhi
+.L1189:
+	adds	r5, r5, #1
+	b	.L1178
+.L1184:
+	adds	r2, r2, #1
+	cmp	r2, #64
+	bne	.L1185
+	b	.L1183
+.L1187:
+	adds	r2, r2, #1
+	cmp	r2, #64
+	bne	.L1188
+	b	.L1186
+.L1190:
+	adds	r2, r2, #1
+	cmp	r2, #64
+	bne	.L1191
+	b	.L1189
+.L1215:
 	.align	2
-.L1109:
-	.word	.LANCHOR111
-	.word	.LC34
-	.word	.LC33
-	.size	hynix_get_read_retry_default, .-hynix_get_read_retry_default
-	.section	.text.flash_get_read_retry_tbl,"ax",%progbits
+.L1214:
+	.word	.LANCHOR9
+	.word	.LANCHOR63
+	.word	.LC63
+	.word	.LANCHOR7
+	.word	.LANCHOR14
+	.word	.LC64
+	.word	.LANCHOR119
+	.word	.LC0
+	.word	.LANCHOR10
+	.size	gc_free_src_blk, .-gc_free_src_blk
+	.section	.text.print_ftl_debug_info,"ax",%progbits
 	.align	1
-	.global	flash_get_read_retry_tbl
+	.global	print_ftl_debug_info
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_get_read_retry_tbl, %function
-flash_get_read_retry_tbl:
+	.type	print_ftl_debug_info, %function
+print_ftl_debug_info:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L1113
-	ldrb	r0, [r3, #19]	@ zero_extendqisi2
-	subs	r3, r0, #1
-	cmp	r3, #6
-	bhi	.L1111
-	b	hynix_get_read_retry_default
-.L1111:
-	bx	lr
-.L1114:
+	push	{r4, r5, r6, lr}
+	sub	sp, sp, #32
+	ldr	r4, .L1217
+	ldr	r5, .L1217+4
+	ldr	r6, .L1217+8
+	ldr	r1, [r4]
+	ldr	r0, [r5]
+	ldr	r6, [r6]
+	ldr	r3, .L1217+12
+	ldrh	r2, [r1, #146]
+	ldrh	r1, [r1, #148]
+	ldrh	r3, [r3]
+	str	r6, [sp, #28]
+	ldr	r6, [r0, #528]
+	str	r6, [sp, #24]
+	ldr	r0, [r0, #524]
+	str	r0, [sp, #20]
+	ldr	r0, .L1217+16
+	ldrh	r0, [r0]
+	str	r0, [sp, #16]
+	ldr	r0, .L1217+20
+	ldrh	r0, [r0]
+	str	r0, [sp, #12]
+	ldr	r0, .L1217+24
+	ldrh	r0, [r0]
+	str	r0, [sp, #8]
+	ldr	r0, .L1217+28
+	ldrh	r0, [r0]
+	str	r0, [sp, #4]
+	ldr	r0, .L1217+32
+	ldrh	r0, [r0]
+	str	r0, [sp]
+	ldr	r0, .L1217+36
+	bl	printf
+	ldr	r1, [r4]
+	ldr	r3, .L1217+40
+	ldr	r0, .L1217+44
+	ldr	r2, [r1, #64]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r2, [sp, #4]
+	ldr	r2, [r1, #8]
+	str	r2, [sp]
+	ldr	r2, [r1, #28]
+	ldr	r1, [r1, #20]
+	bl	printf
+	ldr	r1, [r4]
+	ldr	r0, .L1217+48
+	ldr	r3, [r1, #16]
+	ldr	r2, [r1, #60]
+	ldr	r1, [r1, #52]
+	lsrs	r3, r3, #11
+	bl	printf
+	ldr	r2, [r4]
+	ldrh	r0, [r2, #98]
+	ldrh	r3, [r2, #88]
+	ldrh	r1, [r2, #74]
+	str	r0, [sp, #24]
+	ldrh	r0, [r2, #94]
+	str	r0, [sp, #20]
+	ldrh	r0, [r2, #90]
+	str	r0, [sp, #16]
+	ldr	r0, [r2, #80]
+	str	r0, [sp, #12]
+	ldrh	r0, [r2, #72]
+	str	r0, [sp, #8]
+	ldrh	r0, [r2, #96]
+	str	r0, [sp, #4]
+	ldrh	r0, [r2, #92]
+	str	r0, [sp]
+	ldr	r0, .L1217+52
+	ldr	r2, [r2, #84]
+	bl	printf
+	ldr	r0, .L1217+56
+	ldr	r3, .L1217+60
+	ldr	r2, .L1217+64
+	ldrh	r0, [r0]
+	ldr	r1, .L1217+68
+	ldrh	r3, [r3]
+	ldrh	r2, [r2]
+	ldrh	r1, [r1]
+	str	r0, [sp, #4]
+	ldr	r0, .L1217+72
+	ldrh	r0, [r0]
+	str	r0, [sp]
+	ldr	r0, .L1217+76
+	bl	printf
+	ldr	r0, [r5]
+	ldrh	r3, [r0, #588]
+	ldrh	r2, [r0, #586]
+	ldrh	r1, [r0, #584]
+	ldrh	r0, [r0, #590]
+	str	r0, [sp]
+	ldr	r0, .L1217+80
+	bl	printf
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, pc}
+.L1218:
 	.align	2
-.L1113:
-	.word	.LANCHOR19
-	.size	flash_get_read_retry_tbl, .-flash_get_read_retry_tbl
-	.section	.text.nandc_xfer_done,"ax",%progbits
+.L1217:
+	.word	.LANCHOR102
+	.word	.LANCHOR10
+	.word	.LANCHOR120
+	.word	.LANCHOR95
+	.word	.LANCHOR92
+	.word	.LANCHOR88
+	.word	.LANCHOR90
+	.word	.LANCHOR99
+	.word	.LANCHOR97
+	.word	.LC65
+	.word	.LANCHOR121
+	.word	.LC66
+	.word	.LC67
+	.word	.LC68
+	.word	.LANCHOR79
+	.word	.LANCHOR62
+	.word	.LANCHOR94
+	.word	.LANCHOR91
+	.word	.LANCHOR84
+	.word	.LC69
+	.word	.LC70
+	.size	print_ftl_debug_info, .-print_ftl_debug_info
+	.section	.text.ftl_write_buf,"ax",%progbits
 	.align	1
-	.global	nandc_xfer_done
+	.global	ftl_write_buf
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	nandc_xfer_done, %function
-nandc_xfer_done:
-	@ args = 0, pretend = 0, frame = 8
+	.type	ftl_write_buf, %function
+ftl_write_buf:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1149
-	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	ldr	r4, .L1149+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	ldr	r6, [r4]
-	cmp	r3, #9
-	bne	.L1116
-	ldr	r3, [r6, #16]
-	str	r3, [sp]
-	ldr	r5, [r6, #48]
-	ubfx	r5, r5, #1, #1
-	cbnz	r5, .L1117
-	ldr	r7, .L1149+8
-	ldr	r8, .L1149+24
-.L1118:
-	ldr	r3, [sp]
-	lsls	r0, r3, #11
-	bmi	.L1121
-	ldr	r3, [r4]
-	adds	r5, r5, #1
-	ldr	r3, [r3, #16]
-	str	r3, [sp]
-	bics	r3, r5, #-16777216
-	bne	.L1118
-	ldr	r2, [sp]
-	mov	r1, r5
-	ldr	r3, [r6, #64]
-	mov	r0, r7
-	ubfx	r3, r3, #16, #6
+	push	{r4, r5, r6, lr}
+	mov	r4, r0
+	cbnz	r0, .L1220
+	mov	r2, #668
+	ldr	r1, .L1229
+	ldr	r0, .L1229+4
 	bl	printf
-	mov	r3, #256
-	movs	r2, #4
-	ldr	r1, [r4]
-	mov	r0, r8
-	bl	rknand_print_hex
-	b	.L1118
-.L1117:
-	ldr	r7, .L1149+12
-	movs	r5, #0
-	ldr	r8, .L1149+24
-.L1119:
-	ldr	r2, [r6, #64]
-	ldr	r3, [sp]
-	ubfx	r2, r2, #16, #6
-	ubfx	r3, r3, #22, #6
-	cmp	r2, r3
-	blt	.L1123
-.L1121:
-	ldr	r3, .L1149+16
-	movs	r2, #0
-	str	r2, [r3, #20]
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, pc}
-.L1123:
-	ldr	r3, [r4]
+	bl	print_ftl_debug_info
+	mov	r0, #-1
+	pop	{r4, r5, r6, pc}
+.L1223:
+	mov	r1, r4
+	ldr	r0, .L1229+8
+	bl	buf_add_tail
+	ldr	r3, .L1229+12
+	ldrb	r1, [r4, #40]	@ zero_extendqisi2
+	ldrb	r0, [r6]	@ zero_extendqisi2
 	ldr	r3, [r3]
-	str	r3, [sp, #4]
-	ldr	r3, [sp, #4]
-	lsls	r2, r3, #18
-	bpl	.L1120
-	ldr	r3, [sp, #4]
-	lsls	r3, r3, #14
-	bmi	.L1121
-.L1120:
-	adds	r5, r5, #1
-	bics	r3, r5, #-16777216
-	bne	.L1119
-	ldr	r2, [r6, #64]
-	mov	r1, r5
-	ldr	r3, [sp]
-	mov	r0, r7
-	ubfx	r2, r2, #16, #5
-	ubfx	r3, r3, #22, #6
-	bl	printf
-	mov	r3, #256
-	movs	r2, #4
-	ldr	r1, [r4]
-	mov	r0, r8
-	bl	rknand_print_hex
-	b	.L1119
-.L1116:
-	ldr	r3, [r6, #8]
-	str	r3, [sp]
-	ldr	r5, [r6, #16]
-	ubfx	r5, r5, #1, #1
-	cbnz	r5, .L1127
-	ldr	r7, .L1149+8
-	ldr	r8, .L1149+24
-.L1128:
-	ldr	r3, [sp]
-	lsls	r3, r3, #11
-	bmi	.L1121
-	ldr	r3, [r4]
-	adds	r5, r5, #1
-	ldr	r3, [r3, #8]
-	str	r3, [sp]
-	bics	r3, r5, #-16777216
-	bne	.L1128
-	ldr	r2, [sp]
-	mov	r1, r5
-	ldr	r3, [r6, #28]
-	mov	r0, r7
-	ubfx	r3, r3, #16, #5
+	adds	r0, r0, #1
+	ldr	r2, [r3, #16]
+	uxtb	r0, r0
+	strb	r0, [r6]
+	add	r2, r2, r1
+	str	r2, [r3, #16]
+	ldr	r2, [r3, #32]
+	adds	r2, r2, #1
+	str	r2, [r3, #32]
+	pop	{r4, r5, r6, pc}
+.L1220:
+	ldr	r5, .L1229+16
+	ldrb	r1, [r0, #40]	@ zero_extendqisi2
+	ldrb	r2, [r5]	@ zero_extendqisi2
+	cmp	r1, r2
+	bls	.L1225
+	movw	r2, #673
+	ldr	r1, .L1229
+	ldr	r0, .L1229+4
 	bl	printf
-	mov	r3, #256
-	movs	r2, #4
-	ldr	r1, [r4]
-	mov	r0, r8
-	bl	rknand_print_hex
-	b	.L1128
-.L1127:
-	ldr	r7, .L1149+12
-	movs	r5, #0
-	ldr	r8, .L1149+24
-.L1129:
-	ldr	r2, [r6, #28]
-	ldr	r3, [sp]
-	ubfx	r2, r2, #16, #5
-	ubfx	r3, r3, #22, #6
+.L1225:
+	ldrb	r3, [r4, #40]	@ zero_extendqisi2
+	ldr	r6, .L1229+20
+	cbz	r3, .L1222
+	ldrb	r2, [r5]	@ zero_extendqisi2
 	cmp	r2, r3
-	bge	.L1121
-	ldr	r3, [r4]
-	ldr	r3, [r3]
-	str	r3, [sp, #4]
-	ldr	r3, [sp, #4]
-	lsls	r1, r3, #18
-	bpl	.L1130
-	ldr	r3, [sp, #4]
-	lsls	r2, r3, #14
-	bpl	.L1130
-	ldr	r1, [sp, #4]
-	ldr	r0, .L1149+20
-	bl	printf
-	b	.L1121
-.L1130:
-	adds	r5, r5, #1
-	bics	r3, r5, #-16777216
-	bne	.L1129
-	ldr	r2, [r6, #28]
-	mov	r1, r5
-	ldr	r3, [sp]
-	mov	r0, r7
-	ubfx	r2, r2, #16, #5
-	ubfx	r3, r3, #22, #6
-	bl	printf
-	mov	r3, #256
-	movs	r2, #4
-	ldr	r1, [r4]
-	mov	r0, r8
-	bl	rknand_print_hex
-	b	.L1129
-.L1150:
+	bcs	.L1223
+.L1222:
+	mov	r0, r4
+	bl	buf_free
+	ldrb	r0, [r6]	@ zero_extendqisi2
+	pop	{r4, r5, r6, pc}
+.L1230:
 	.align	2
-.L1149:
-	.word	.LANCHOR7
-	.word	.LANCHOR6
-	.word	.LC37
-	.word	.LC35
-	.word	.LANCHOR30
-	.word	.LC38
-	.word	.LC36
-	.size	nandc_xfer_done, .-nandc_xfer_done
-	.section	.text.nandc_xfer,"ax",%progbits
+.L1229:
+	.word	.LANCHOR122
+	.word	.LC0
+	.word	.LANCHOR57
+	.word	.LANCHOR102
+	.word	.LANCHOR123
+	.word	.LANCHOR58
+	.size	ftl_write_buf, .-ftl_write_buf
+	.section	.text.ftl_write_completed,"ax",%progbits
 	.align	1
-	.global	nandc_xfer
+	.global	ftl_write_completed
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	nandc_xfer, %function
-nandc_xfer:
-	@ args = 4, pretend = 0, frame = 8
+	.type	ftl_write_completed, %function
+ftl_write_completed:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	mov	r8, r1
-	ldr	r4, [sp, #32]
-	mov	r6, r2
-	mov	r5, r3
-	mov	r1, r6
-	mov	r2, r5
-	mov	r0, r8
-	mov	r3, r4
-	bl	nandc_xfer_start
-	bl	nandc_xfer_done
-	cmp	r8, #0
-	bne	.L1169
-	ldr	r3, .L1182
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #9
-	bne	.L1153
-	ldr	r5, .L1182+4
-	lsrs	r6, r6, #2
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	mov	r8, #0
+	ldr	r7, .L1241
+.L1232:
+	ldr	r2, .L1241+4
+	ldrb	r5, [r2]	@ zero_extendqisi2
+	cmp	r5, #255
+	bne	.L1240
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L1240:
+	movs	r3, #48
+	add	r6, r5, r5, lsl #1
+	muls	r3, r5, r3
+	add	r6, r7, r6, lsl #4
+	adds	r4, r7, r3
+	ldrb	r3, [r7, r3]	@ zero_extendqisi2
+	strb	r3, [r2]
+	ldr	r3, [r4, #36]
+	adds	r3, r3, #1
+	bne	.L1233
+	ldr	r3, .L1241+8
 	movs	r2, #1
-	mov	r1, r8
-	mov	r0, r8
-	ldr	r4, [r5]
-.L1154:
-	cmp	r1, r6
-	bcc	.L1158
-	ldr	r4, [r4]
-	cmp	r2, #0
-	it	ne
-	movne	r0, #512
-	and	r3, r4, #139264
-	cmp	r3, #139264
-	bne	.L1152
+	ldr	r10, [r4, #24]
+	ldr	r8, .L1241+24
+	ldrh	r0, [r3]
+	rsb	r3, r0, #21
+	lsls	r2, r2, r3
+	ldr	r3, .L1241+12
+	lsr	r0, r10, r0
+	subs	r2, r2, #1
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	ands	r0, r0, r2
+	bl	__aeabi_uidiv
+	ldr	r2, [r8]
+	movw	r1, #65535
+	uxth	r4, r0
+	ldr	r0, .L1241+16
+	ldr	r3, [r2, #560]
+	cmp	r3, r1
+	mov	r3, #48
+	mla	r5, r3, r5, r7
+	itt	eq
+	streq	r4, [r2, #560]
+	streq	r10, [r2, #564]
+	mov	r3, r10
 	mov	r1, r4
-	ldr	r0, .L1182+8
+	ldr	r2, [r5, #20]
 	bl	printf
-	ldr	r3, [r5]
-	orr	r4, r4, #131072
-.L1181:
-	mov	r0, #-1
-	str	r4, [r3]
-.L1152:
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, pc}
-.L1158:
-	add	r3, r1, #84
-	ldr	r3, [r4, r3, lsl #2]
-	str	r3, [sp, #4]
-	ldr	r7, [sp, #4]
-	ldr	r3, [sp, #4]
-	ubfx	r3, r3, #26, #1
-	and	r3, r3, r7, lsr #10
-	ands	r2, r2, r3
-	ldr	r3, [sp, #4]
-	lsls	r3, r3, #29
-	bmi	.L1171
-	ldr	r3, [sp, #4]
-	lsls	r7, r3, #13
-	bmi	.L1171
-	ldr	r7, [sp, #4]
-	ldr	r3, [sp, #4]
-	ubfx	r7, r7, #3, #7
-	ubfx	r3, r3, #19, #7
-	cmp	r7, r3
-	ldr	r3, [sp, #4]
-	ite	gt
-	ubfxgt	r3, r3, #3, #7
-	ubfxle	r3, r3, #19, #7
-	cmp	r0, r3
-	it	cc
-	movcc	r0, r3
-.L1155:
-	adds	r1, r1, #1
-	b	.L1154
-.L1171:
-	mov	r0, #-1
-	b	.L1155
-.L1153:
-	ldr	r3, .L1182+12
-	mov	r1, r8
-	mov	r0, r8
-	ldr	r8, .L1182+20
-	lsrs	r7, r6, #1
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #25
-	mov	r3, r4
-	ite	cc
-	movcc	lr, #64
-	movcs	lr, #128
-.L1161:
-	cmp	r0, r7
-	add	ip, lr, r1
-	add	r3, r3, #4
-	bcc	.L1162
-	lsrs	r7, r6, #2
-	ldr	r6, .L1182+4
+	ldr	r3, [r8]
+	ldr	r2, [r3, #556]
+	adds	r2, r2, #1
+	str	r2, [r3, #556]
+	ldrh	r2, [r3, #16]
+	cmp	r2, r4
+	bne	.L1235
 	movs	r2, #0
-	mov	r0, r2
-	ldr	r1, [r6]
-.L1163:
-	cmp	r2, r7
-	bcc	.L1167
-	movs	r3, #0
-	str	r3, [r1, #16]
-	adds	r3, r0, #1
-	beq	.L1168
-	ldr	r3, [r4]
-	adds	r3, r3, #1
-	bne	.L1168
-	ldr	r3, [r4, #4]
-	adds	r3, r3, #1
-	bne	.L1168
-	ldr	r3, [r5]
-	adds	r3, r3, #1
-	it	eq
-	moveq	r0, #512
-.L1168:
-	ldr	r4, [r1]
-	and	r3, r4, #139264
-	cmp	r3, #139264
-	bne	.L1152
-	mov	r1, r4
-	ldr	r0, .L1182+16
+	strh	r2, [r3, #22]	@ movhi
+.L1236:
+	mov	r0, r6
+	mov	r8, #1
+	bl	ftl_write_buf
+	b	.L1232
+.L1235:
+	ldrh	r2, [r3, #48]
+	cmp	r2, r4
+	itt	eq
+	moveq	r2, #0
+	strheq	r2, [r3, #54]	@ movhi
+	b	.L1236
+.L1233:
+	cmp	r8, #0
+	beq	.L1238
+	ldr	r2, [r4, #24]
+	ldr	r1, [r4, #20]
+	ldr	r0, .L1241+20
 	bl	printf
-	orr	r4, r4, #131072
-	ldr	r3, [r6]
-	b	.L1181
-.L1162:
-	ldr	r2, [r8]
-	bic	r1, r1, #3
-	adds	r0, r0, #1
-	ldr	r2, [r2, r1]
-	strb	r2, [r3, #-4]
-	lsrs	r1, r2, #8
-	strb	r1, [r3, #-3]
-	lsrs	r1, r2, #16
-	lsrs	r2, r2, #24
-	strb	r1, [r3, #-2]
-	mov	r1, ip
-	strb	r2, [r3, #-1]
-	b	.L1161
-.L1167:
-	add	r3, r2, #8
-	ldr	r3, [r1, r3, lsl #2]
-	str	r3, [sp, #4]
-	ldr	r3, [sp, #4]
-	lsls	r3, r3, #29
-	bmi	.L1174
-	ldr	r3, [sp, #4]
-	lsls	r3, r3, #16
-	bmi	.L1174
-	ldr	r3, [sp, #4]
-	ubfx	ip, r3, #3, #5
-	ldr	r3, [sp, #4]
-	ubfx	r8, r3, #27, #1
-	ldr	r3, [sp, #4]
-	ldr	lr, [sp, #4]
-	orr	ip, ip, r8, lsl #5
-	ubfx	r3, r3, #16, #5
-	ubfx	lr, lr, #29, #1
-	orr	r3, r3, lr, lsl #5
-	cmp	ip, r3
-	ldr	r3, [sp, #4]
-	itete	hi
-	ldrhi	ip, [sp, #4]
-	ldrls	ip, [sp, #4]
-	ubfxhi	r3, r3, #3, #5
-	ubfxls	r3, r3, #16, #5
-	ite	hi
-	ubfxhi	ip, ip, #27, #1
-	ubfxls	ip, ip, #29, #1
-	orr	r3, r3, ip, lsl #5
-	cmp	r0, r3
-	it	cc
-	movcc	r0, r3
-.L1164:
-	adds	r2, r2, #1
-	b	.L1163
-.L1174:
-	mov	r0, #-1
-	b	.L1164
-.L1169:
-	movs	r0, #0
-	b	.L1152
-.L1183:
+	mov	r0, r6
+	bl	ftl_write_buf
+	b	.L1232
+.L1238:
+	ldrh	r2, [r4, #32]
+	ldr	r1, [r4, #28]
+	ldr	r0, [r4, #20]
+	bl	lpa_hash_update_ppa
+	ldrb	r3, [r4, #2]	@ zero_extendqisi2
+	lsls	r2, r3, #29
+	bpl	.L1239
+	bic	r3, r3, #2
+	strb	r3, [r4, #2]
+	b	.L1232
+.L1239:
+	mov	r0, r6
+	bl	buf_free
+	b	.L1232
+.L1242:
 	.align	2
-.L1182:
-	.word	.LANCHOR7
-	.word	.LANCHOR6
-	.word	.LC39
-	.word	.LANCHOR27
-	.word	.LC40
-	.word	.LANCHOR30
-	.size	nandc_xfer, .-nandc_xfer
-	.section	.text.flash_read_page,"ax",%progbits
+.L1241:
+	.word	.LANCHOR50
+	.word	.LANCHOR124
+	.word	.LANCHOR66
+	.word	.LANCHOR67
+	.word	.LC71
+	.word	.LC72
+	.word	.LANCHOR10
+	.size	ftl_write_completed, .-ftl_write_completed
+	.section	.text.zftl_add_read_buf,"ax",%progbits
 	.align	1
-	.global	flash_read_page
+	.global	zftl_add_read_buf
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_read_page, %function
-flash_read_page:
-	@ args = 4, pretend = 0, frame = 16
+	.type	zftl_add_read_buf, %function
+zftl_add_read_buf:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #24
-	str	r3, [sp, #16]
+	push	{r4, lr}
+	mov	r4, r0
+	cbnz	r0, .L1244
+	mov	r2, #964
+	ldr	r1, .L1248
+	ldr	r0, .L1248+4
+	bl	printf
+	pop	{r4, lr}
+	b	print_ftl_debug_info
+.L1244:
+	ldr	r3, .L1248+8
+	ldrb	r2, [r0, #40]	@ zero_extendqisi2
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r2, r3
+	bls	.L1246
+	movw	r2, #969
+	ldr	r1, .L1248
+	ldr	r0, .L1248+4
+	bl	printf
+.L1246:
+	mov	r1, r4
+	ldr	r0, .L1248+12
+	bl	buf_add_tail
+	ldr	r2, .L1248+16
+	ldrb	r3, [r2]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	strb	r3, [r2]
+	pop	{r4, pc}
+.L1249:
+	.align	2
+.L1248:
+	.word	.LANCHOR125
+	.word	.LC0
+	.word	.LANCHOR123
+	.word	.LANCHOR126
+	.word	.LANCHOR127
+	.size	zftl_add_read_buf, .-zftl_add_read_buf
+	.section	.text.ftl_alloc_sblk,"ax",%progbits
+	.align	1
+	.global	ftl_alloc_sblk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_alloc_sblk, %function
+ftl_alloc_sblk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	uxth	r6, r0
+	cmp	r0, #5
 	mov	r5, r0
-	mov	r8, r1
-	ubfx	r4, r1, #0, #21
-	ldr	r3, .L1200
-	ubfx	r6, r1, #24, #2
-	str	r2, [sp, #12]
-	ldr	r7, [r3]
-	ldr	r3, .L1200+4
-	ldr	r3, [r3]
-	lsls	r3, r3, #27
-	bpl	.L1185
-	mov	r3, r1
-	mov	r2, r6
-	mov	r1, r0
-	ldr	r0, .L1200+8
+	mov	r1, r6
+	mov	r0, #0
+	ite	ne
+	movne	r7, #0
+	moveq	r7, #2
+	bl	zftl_get_free_sblk
+	movw	r3, #65535
+	mov	r4, r0
+	cmp	r0, r3
+	beq	.L1252
+	ldr	r3, .L1259
+	ldr	r6, [r3]
+	add	r6, r6, r0, lsl #2
+	ldrb	r3, [r6, #2]	@ zero_extendqisi2
+	tst	r3, #224
+	beq	.L1253
+	movw	r2, #833
+	ldr	r1, .L1259+4
+	ldr	r0, .L1259+8
 	bl	printf
-.L1185:
-	bl	nandc_wait_flash_ready
-	mov	r0, r5
-	lsl	r10, r5, #8
-	bl	nandc_cs
-	ldr	r1, .L1200+12
-	cbnz	r6, .L1186
-	mov	r0, r5
-	str	r1, [sp, #20]
-	bl	flash_enter_slc_mode
-.L1198:
-	ldr	r1, [sp, #20]
-	b	.L1187
-.L1186:
-	ldr	r3, [r1]
-	ldrb	r3, [r3, #12]	@ zero_extendqisi2
-	cmp	r3, #3
-	bne	.L1188
-	add	r3, r7, r10
-	str	r6, [r3, #2056]
-.L1187:
-	add	fp, r7, r10
-	movs	r2, #0
-	str	r2, [fp, #2056]
-	str	r2, [fp, #2052]
-	str	r2, [fp, #2052]
-	uxtb	r2, r8
-	str	r2, [fp, #2052]
-	lsrs	r2, r4, #8
-	str	r2, [fp, #2052]
-	lsrs	r2, r4, #16
-	str	r2, [fp, #2052]
-	movs	r2, #48
-	str	r2, [fp, #2056]
-	ldr	r2, [r1]
-	ldrb	r2, [r2, #12]	@ zero_extendqisi2
-	cmp	r2, #3
-	bne	.L1189
-	cbz	r6, .L1189
-	add	r4, r4, r4, lsl #1
-	subs	r0, r4, #1
-	add	r0, r0, r6
-.L1199:
-	bl	nandc_set_seed
-	add	r7, r7, r10
-	bl	nandc_wait_flash_ready
-	movs	r1, #0
-	movs	r2, #5
-	movs	r3, #224
-	str	r2, [r7, #2056]
-	str	r1, [fp, #2052]
-	mov	r0, r5
-	str	r1, [fp, #2052]
-	str	r3, [r7, #2056]
-	ldr	r3, [sp, #16]
-	ldrb	r2, [sp, #56]	@ zero_extendqisi2
-	str	r3, [sp]
-	ldr	r3, [sp, #12]
-	bl	nandc_xfer
+.L1253:
+	ldrb	r3, [r6, #2]	@ zero_extendqisi2
+	bfi	r3, r5, #5, #3
+	uxtb	r3, r3
+	ubfx	r2, r3, #3, #2
+	orrs	r7, r7, r2
+	bfi	r3, r7, #3, #2
+	strb	r3, [r6, #2]
+.L1254:
+	mov	r0, r4
+	pop	{r3, r4, r5, r6, r7, pc}
+.L1252:
+	bl	print_ftl_debug_info
+	mov	r2, r5
+	mov	r1, r4
+	ldr	r0, .L1259+12
+	bl	printf
+	mov	r1, r6
+	movs	r0, #0
+	bl	zftl_get_free_sblk
+	mov	r2, r5
+	mov	r1, r0
 	mov	r4, r0
-	cbnz	r6, .L1191
-	mov	r0, r5
-	bl	flash_exit_slc_mode
-.L1191:
+	ldr	r0, .L1259+12
+	bl	printf
+	bl	dump_all_list_info
+	movw	r2, #843
+	ldr	r1, .L1259+4
+	ldr	r0, .L1259+8
+	bl	printf
+	b	.L1254
+.L1260:
+	.align	2
+.L1259:
+	.word	.LANCHOR7
+	.word	.LANCHOR128
+	.word	.LC0
+	.word	.LC73
+	.size	ftl_alloc_sblk, .-ftl_alloc_sblk
+	.section	.text.sblk_init,"ax",%progbits
+	.align	1
+	.global	sblk_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sblk_init, %function
+sblk_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r2, .L1262
+	movs	r3, #255
 	movs	r0, #0
-	bl	nandc_de_cs
-	mov	r0, r4
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1188:
-	mov	r0, r5
-	str	r1, [sp, #20]
-	bl	flash_exit_slc_mode
-	b	.L1198
-.L1189:
-	mov	r0, r4
-	b	.L1199
-.L1201:
+	strb	r3, [r2]
+	ldr	r2, .L1262+4
+	strb	r3, [r2]
+	ldr	r2, .L1262+8
+	strb	r3, [r2]
+	ldr	r2, .L1262+12
+	strb	r3, [r2]
+	bx	lr
+.L1263:
 	.align	2
-.L1200:
-	.word	.LANCHOR6
-	.word	.LANCHOR22
-	.word	.LC41
-	.word	.LANCHOR34
-	.size	flash_read_page, .-flash_read_page
-	.section	.text.micron_read_retrial,"ax",%progbits
+.L1262:
+	.word	.LANCHOR54
+	.word	.LANCHOR124
+	.word	.LANCHOR129
+	.word	.LANCHOR69
+	.size	sblk_init, .-sblk_init
+	.section	.text.dump_sblk_queue,"ax",%progbits
 	.align	1
-	.global	micron_read_retrial
+	.global	dump_sblk_queue
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	micron_read_retrial, %function
-micron_read_retrial:
-	@ args = 8, pretend = 0, frame = 8
+	.type	dump_sblk_queue, %function
+dump_sblk_queue:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r8, r0
-	str	r3, [sp, #12]
-	mov	r7, r2
-	movs	r5, #0
-	mov	r4, #-1
-	ldr	r3, .L1215
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	asr	r10, r3, #2
-	bl	nandc_wait_flash_ready
-	ldr	r3, .L1215+4
-	ldr	r3, [r3]
-	str	r3, [sp, #8]
-.L1203:
-	ldr	r3, .L1215+8
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r5, r3
-	bcc	.L1207
-.L1206:
-	ldr	r3, [sp, #8]
-	movs	r0, #200
-	add	r8, r3, r8, lsl #8
-	movs	r3, #239
-	str	r3, [r8, #2056]
-	movs	r3, #137
-	str	r3, [r8, #2052]
-	bl	timer_delay_ns
-	cmp	r4, r10
-	mov	r3, #0
-	str	r3, [r8, #2048]
-	str	r3, [r8, #2048]
-	str	r3, [r8, #2048]
-	str	r3, [r8, #2048]
-	bcc	.L1202
-	adds	r3, r4, #1
-	mov	r2, r7
-	it	ne
-	movne	r4, #256
-	mov	r3, r5
-	str	r4, [sp]
-	mov	r1, r5
-	ldr	r0, .L1215+12
+	push	{r4, r5, r6, lr}
+	ldr	r4, .L1273
+	ldr	r0, .L1273+4
+	ldrb	r1, [r4]	@ zero_extendqisi2
 	bl	printf
-.L1202:
-	mov	r0, r4
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1207:
-	ldr	r3, [sp, #8]
-	movs	r0, #200
-	add	fp, r5, #1
-	add	r1, r3, r8, lsl #8
-	movs	r3, #239
-	str	r3, [r1, #2056]
-	movs	r3, #137
-	str	r3, [r1, #2052]
-	bl	timer_delay_ns
-	movs	r3, #0
-	str	fp, [r1, #2048]
-	str	r3, [r1, #2048]
-	mov	r0, r8
-	str	r3, [r1, #2048]
-	str	r3, [r1, #2048]
-	mov	r1, r7
-	ldr	r3, [sp, #52]
-	ldr	r2, [sp, #12]
-	str	r3, [sp]
-	ldr	r3, [sp, #48]
-	bl	flash_read_page
-	mov	r2, r7
-	mov	r6, r0
-	str	r4, [sp]
-	mov	r3, r5
-	mov	r1, r5
-	ldr	r0, .L1215+16
+	ldrb	r4, [r4]	@ zero_extendqisi2
+	cmp	r4, #255
+	beq	.L1264
+	ldr	r5, .L1273+8
+	add	r4, r4, r4, lsl #1
+	ldr	r6, .L1273+12
+	add	r4, r5, r4, lsl #4
+.L1266:
+	ldr	r3, [r4, #24]
+	mov	r0, r6
+	ldrb	r2, [r4, #42]	@ zero_extendqisi2
+	ldrb	r1, [r4, #1]	@ zero_extendqisi2
 	bl	printf
-	adds	r2, r6, #1
-	beq	.L1204
-	ldr	r3, .L1215+20
-	cmp	r4, #-1
-	it	eq
-	moveq	r4, r6
-	cmp	r6, r10
-	ldr	r3, [r3]
-	str	r3, [sp, #12]
-	ldr	r3, .L1215+24
-	ldr	r3, [r3]
-	str	r3, [sp, #48]
-	bcc	.L1210
-.L1204:
-	mov	r5, fp
-	b	.L1203
-.L1210:
-	mov	r4, r6
-	b	.L1206
-.L1216:
+	ldrb	r4, [r4]	@ zero_extendqisi2
+	cmp	r4, #255
+	beq	.L1264
+	add	r4, r4, r4, lsl #1
+	add	r4, r5, r4, lsl #4
+	b	.L1266
+.L1264:
+	pop	{r4, r5, r6, pc}
+.L1274:
 	.align	2
-.L1215:
-	.word	.LANCHOR27
-	.word	.LANCHOR6
-	.word	.LANCHOR113
-	.word	.LC43
-	.word	.LC42
-	.word	.LANCHOR111
-	.word	.LANCHOR112
-	.size	micron_read_retrial, .-micron_read_retrial
-	.section	.text.toshiba_3d_read_retrial,"ax",%progbits
+.L1273:
+	.word	.LANCHOR54
+	.word	.LC74
+	.word	.LANCHOR50
+	.word	.LC75
+	.size	dump_sblk_queue, .-dump_sblk_queue
+	.section	.text.queue_lun_state,"ax",%progbits
 	.align	1
-	.global	toshiba_3d_read_retrial
+	.global	queue_lun_state
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	toshiba_3d_read_retrial, %function
-toshiba_3d_read_retrial:
-	@ args = 8, pretend = 0, frame = 16
+	.type	queue_lun_state, %function
+queue_lun_state:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1291
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #24
-	mov	r10, r0
-	mov	r8, r2
-	mov	r4, r1
-	add	r7, r10, #8
-	str	r3, [sp, #12]
-	bl	nandc_wait_flash_ready
-	ldr	r3, .L1252
-	ldr	r6, [r3]
-	ldr	r3, .L1252+4
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	add	r7, r6, r7, lsl #8
-	cmp	r2, #36
-	ite	ne
-	movne	r2, #56
-	moveq	r2, #46
-	str	r2, [sp, #20]
-	ite	ne
-	movne	r2, #10
-	moveq	r2, #26
-	str	r2, [sp, #16]
-	cmp	r4, #0
-	bne	.L1219
-	mov	r4, #-1
-	movs	r5, #1
-	str	r3, [sp, #20]
-.L1225:
-	ldr	r3, [sp, #20]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #36
-	bne	.L1220
-	movs	r2, #0
-	mov	r1, r5
-	mov	r0, r7
-	bl	toshiba_tlc_set_rr_para
-	add	r3, r6, r10, lsl #8
-	movs	r2, #93
-	str	r2, [r3, #2056]
-.L1221:
-	ldr	r3, [sp, #60]
-	mov	r1, r8
-	ldr	r2, [sp, #12]
-	mov	r0, r10
-	str	r3, [sp]
-	ldr	r3, [sp, #56]
-	bl	flash_read_page
-	mov	r2, r8
-	mov	fp, r0
-	mov	r3, r0
-	mov	r1, r5
-	ldr	r0, .L1252+8
-	bl	printf
-	cmp	fp, #-1
-	beq	.L1222
-	ldr	r3, .L1252+12
-	cmp	r4, #-1
-	it	eq
-	moveq	r4, fp
-	ldr	r3, [r3]
-	str	r3, [sp, #12]
-	ldr	r3, .L1252+16
-	ldr	r3, [r3]
-	str	r3, [sp, #56]
-	ldr	r3, .L1252+20
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	fp, r3, asr #2
-	bcc	.L1238
-.L1222:
-	ldr	r3, [sp, #16]
-	adds	r5, r5, #1
-	cmp	r3, r5
-	bne	.L1225
-.L1224:
-	ldr	r3, .L1252+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #36
-	bne	.L1226
-	movs	r2, #0
-.L1251:
-	movs	r1, #0
-	mov	r0, r7
-	bl	toshiba_tlc_set_rr_para
-	b	.L1227
-.L1220:
-	uxtb	r1, r5
-	mov	r0, r7
-	bl	toshiba_3d_set_slc_rr_para
-	b	.L1221
-.L1238:
-	mov	r4, fp
-	b	.L1224
-.L1226:
-	movs	r1, #0
-	mov	r0, r7
-	bl	toshiba_3d_set_slc_rr_para
-.L1227:
-	ldr	r3, .L1252+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #36
-	bne	.L1235
-	add	r6, r6, r10, lsl #8
-	movs	r3, #85
-	str	r3, [r6, #2056]
-	movs	r3, #0
-	str	r3, [r6, #2052]
-	str	r3, [r6, #2048]
-	movs	r3, #255
-	str	r3, [r6, #2056]
-.L1235:
-	mov	r3, r5
-	str	r4, [sp]
-	mov	r2, r8
-	mov	r1, r5
-	ldr	r0, .L1252+24
-	bl	printf
-	ldr	r3, .L1252+20
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	r4, r3, asr #2
-	bcc	.L1236
-	adds	r3, r4, #1
-	it	ne
-	movne	r4, #256
-.L1236:
-	bl	nandc_wait_flash_ready
-	mov	r0, r4
-	add	sp, sp, #24
-	@ sp needed
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	cmp	r5, #255
+	beq	.L1283
+	ldr	r3, .L1291+4
+	ubfx	r10, r0, #21, #3
+	ldr	lr, .L1291+12
+	mov	ip, #48
+	ldrh	r7, [r3]
+	movs	r3, #1
+	mov	r8, lr
+	rsb	r2, r7, #21
+	lsls	r3, r3, r2
+	ldr	r2, .L1291+8
+	subs	r3, r3, #1
+	ldrb	r6, [r2]	@ zero_extendqisi2
+	asr	r2, r0, r7
+	uxth	r3, r3
+	subs	r6, r6, #1
+	uxth	r6, r6
+	ands	r2, r2, r6
+	ands	r2, r2, r3
+.L1282:
+	mla	r0, ip, r5, lr
+	ldr	r4, [r0, #24]
+	ubfx	fp, r4, #21, #3
+	cmp	r10, fp
+	bne	.L1277
+	lsrs	r4, r4, r7
+	ldrb	r0, [r0, #42]	@ zero_extendqisi2
+	ands	r4, r4, r6
+	ands	r4, r4, r3
+	cmp	r2, r4
+	bne	.L1278
+	cmp	r1, #1
+	bne	.L1275
+	cmp	r0, #7
+	beq	.L1277
+	cmp	r0, #9
+	beq	.L1277
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1219:
-	orr	r8, r8, r4, lsl #24
-	movs	r5, #1
-	mov	r4, #-1
-	str	r3, [sp, #16]
-.L1233:
-	ldr	r3, [sp, #16]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #36
-	bne	.L1228
-	movs	r2, #1
-	mov	r1, r5
-	mov	r0, r7
-	bl	toshiba_tlc_set_rr_para
-	add	r3, r6, r10, lsl #8
-	movs	r2, #93
-.L1250:
-	str	r2, [r3, #2056]
-	mov	r1, r8
-	ldr	r3, [sp, #60]
-	mov	r0, r10
-	ldr	r2, [sp, #12]
-	str	r3, [sp]
-	ldr	r3, [sp, #56]
-	bl	flash_read_page
-	mov	r2, r8
-	mov	fp, r0
-	mov	r3, r0
-	mov	r1, r5
-	ldr	r0, .L1252+28
-	bl	printf
-	cmp	fp, #-1
-	beq	.L1230
-	ldr	r3, .L1252+12
-	cmp	r4, #-1
-	it	eq
-	moveq	r4, fp
-	ldr	r3, [r3]
-	str	r3, [sp, #12]
-	ldr	r3, .L1252+16
-	ldr	r3, [r3]
-	str	r3, [sp, #56]
-	ldr	r3, .L1252+20
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	fp, r3, asr #2
-	bcc	.L1239
-.L1230:
-	ldr	r3, [sp, #20]
-	adds	r5, r5, #1
-	cmp	r3, r5
-	bne	.L1233
-.L1232:
-	ldr	r3, .L1252+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #36
-	bne	.L1234
-	movs	r2, #1
-	b	.L1251
-.L1228:
-	uxtb	r1, r5
-	mov	r0, r7
-	bl	toshiba_3d_set_tlc_rr_para
-	add	r3, r6, r10, lsl #8
-	movs	r2, #38
-	b	.L1250
-.L1239:
-	mov	r4, fp
-	b	.L1232
-.L1234:
-	movs	r1, #0
-	mov	r0, r7
-	bl	toshiba_3d_set_tlc_rr_para
-	b	.L1227
-.L1253:
+.L1278:
+	cmp	r1, #3
+	bhi	.L1277
+	tbb	[pc, r1]
+.L1279:
+	.byte	(.L1275-.L1279)/2
+	.byte	(.L1280-.L1279)/2
+	.byte	(.L1281-.L1279)/2
+	.byte	(.L1275-.L1279)/2
+	.p2align 1
+.L1280:
+	cmp	r0, #7
+	beq	.L1277
+	cmp	r0, #9
+	beq	.L1277
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1281:
+	cmp	r0, #11
+	bne	.L1275
+.L1277:
+	mul	r5, ip, r5
+	ldrb	r5, [r8, r5]	@ zero_extendqisi2
+	cmp	r5, #255
+	bne	.L1282
+.L1283:
+	movs	r0, #0
+.L1275:
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1292:
 	.align	2
-.L1252:
-	.word	.LANCHOR6
-	.word	.LANCHOR1
-	.word	.LC44
-	.word	.LANCHOR111
-	.word	.LANCHOR112
-	.word	.LANCHOR27
-	.word	.LC46
-	.word	.LC45
-	.size	toshiba_3d_read_retrial, .-toshiba_3d_read_retrial
-	.section	.text.toshiba_read_retrial,"ax",%progbits
+.L1291:
+	.word	.LANCHOR54
+	.word	.LANCHOR66
+	.word	.LANCHOR67
+	.word	.LANCHOR50
+	.size	queue_lun_state, .-queue_lun_state
+	.section	.text.queue_remove_completed_req,"ax",%progbits
 	.align	1
-	.global	toshiba_read_retrial
+	.global	queue_remove_completed_req
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	toshiba_read_retrial, %function
-toshiba_read_retrial:
-	@ args = 8, pretend = 0, frame = 16
+	.type	queue_remove_completed_req, %function
+queue_remove_completed_req:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #24
-	mov	r7, r0
-	str	r2, [sp, #12]
-	add	r10, r7, #8
-	str	r3, [sp, #16]
-	bl	nandc_wait_flash_ready
-	ldr	r3, .L1281
-	ldr	r2, .L1281+4
-	ldr	r6, [r3]
-	ldrb	r3, [r2]	@ zero_extendqisi2
-	str	r2, [sp, #20]
-	subs	r3, r3, #67
-	add	r10, r6, r10, lsl #8
-	cmp	r3, #1
-	bls	.L1272
-	ldr	r3, .L1281+8
-	ldrb	r5, [r3]	@ zero_extendqisi2
-	cbz	r5, .L1256
-	movs	r5, #1
-	movs	r0, #1
-	bl	nandc_set_if_mode
-.L1256:
-	add	r3, r6, r7, lsl #8
-	movs	r2, #92
-	str	r2, [r3, #2056]
-	movs	r2, #197
-	str	r2, [r3, #2056]
-.L1255:
-	mov	r8, #1
-	mov	fp, #-1
-.L1257:
-	ldr	r3, .L1281+12
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	adds	r3, r3, #1
-	cmp	r8, r3
-	bcc	.L1266
-	mov	r4, fp
-.L1265:
-	ldr	r3, .L1281+4
-	movs	r1, #0
-	mov	r0, r10
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	subs	r3, r3, #67
-	cmp	r3, #1
-	bhi	.L1267
-	bl	sandisk_set_rr_para
-.L1268:
-	add	r6, r6, r7, lsl #8
-	movs	r3, #255
-	str	r3, [r6, #2056]
-	ldr	r3, .L1281+16
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	r4, r3, asr #2
-	bcc	.L1269
-	adds	r3, r4, #1
-	ldr	r2, [sp, #12]
-	it	ne
-	movne	r4, #256
-	mov	r3, r8
-	str	r4, [sp]
-	mov	r1, r8
-	ldr	r0, .L1281+20
-	bl	printf
-.L1269:
-	bl	nandc_wait_flash_ready
-	cbz	r5, .L1254
-	movs	r0, #4
-	bl	nandc_set_if_mode
-.L1254:
-	mov	r0, r4
-	add	sp, sp, #24
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	ip, #0
+	ldr	r5, .L1318
+	movs	r4, #48
+	mov	fp, #255
+	ldr	r6, .L1318+4
+	ldrb	r3, [r5]	@ zero_extendqisi2
+	ldr	r1, .L1318+8
+	ldr	r7, .L1318+12
+	str	r3, [sp, #4]
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	ldrb	r2, [r1]	@ zero_extendqisi2
+	ldrb	r10, [r7]	@ zero_extendqisi2
+	str	r3, [sp]
+	ldr	r3, .L1318+16
+.L1294:
+	cmp	r2, #255
+	beq	.L1295
+	mul	r8, r4, r2
+	mov	r0, r2
+	add	lr, r3, r8
+	ldrb	lr, [lr, #42]	@ zero_extendqisi2
+	sub	lr, lr, #12
+	cmp	lr, #1
+	bls	.L1296
+.L1295:
+	cmp	ip, #0
+	beq	.L1293
+	strb	r2, [r1]
+	b	.L1293
+.L1296:
+	mul	lr, r4, r0
+	ldrb	r2, [r3, r8]	@ zero_extendqisi2
+	add	ip, r3, lr
+	strb	fp, [r3, lr]
+	ldrb	lr, [ip, #43]	@ zero_extendqisi2
+	cmp	lr, #1
+	bne	.L1299
+	ldrh	ip, [ip, #34]
+	cmp	ip, #0
+	bne	.L1307
+	mov	ip, r10
+	mov	lr, r7
+.L1300:
+	cmp	ip, #255
+	bne	.L1305
+	strb	r2, [r1]
+	movs	r2, #48
+	mla	r3, r2, r0, r3
+	ldrb	r3, [r3, #1]	@ zero_extendqisi2
+	strb	r3, [lr]
+.L1293:
+	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1272:
-	movs	r5, #0
-	b	.L1255
-.L1266:
-	ldr	r3, [sp, #20]
-	mov	r0, r10
-	uxtb	r1, r8
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	subs	r3, r3, #67
-	cmp	r3, #1
-	bhi	.L1258
-	bl	sandisk_set_rr_para
-.L1259:
-	ldr	r3, .L1281+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #34
-	bne	.L1260
-	ldr	r3, .L1281+12
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	subs	r3, r3, #3
-	cmp	r8, r3
-	ittt	eq
-	addeq	r3, r6, r7, lsl #8
-	moveq	r2, #179
-	streq	r2, [r3, #2056]
-.L1260:
-	add	r3, r6, r7, lsl #8
-	movs	r2, #38
-	ldr	r1, [sp, #12]
-	mov	r0, r7
-	str	r2, [r3, #2056]
-	movs	r2, #93
-	str	r2, [r3, #2056]
-	ldr	r3, [sp, #60]
-	ldr	r2, [sp, #16]
-	str	r3, [sp]
-	ldr	r3, [sp, #56]
-	bl	flash_read_page
-	adds	r2, r0, #1
-	mov	r4, r0
-	beq	.L1263
-	ldr	r3, .L1281+24
-	cmp	fp, #-1
-	it	eq
-	moveq	fp, r0
-	ldr	r3, [r3]
-	str	r3, [sp, #16]
-	ldr	r3, .L1281+28
-	ldr	r3, [r3]
-	str	r3, [sp, #56]
-	ldr	r3, .L1281+16
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	r0, r3, asr #2
-	bcc	.L1265
-.L1263:
-	add	r8, r8, #1
-	b	.L1257
-.L1258:
-	bl	toshiba_set_rr_para
-	b	.L1259
-.L1267:
-	bl	toshiba_set_rr_para
-	b	.L1268
-.L1282:
+.L1299:
+	cmp	lr, #0
+	bne	.L1301
+	ldr	ip, [ip, #20]
+	cmp	ip, #-1
+	beq	.L1301
+	ldr	ip, [sp, #4]
+	mov	lr, r5
+	b	.L1300
+.L1307:
+	ldr	ip, [sp]
+	mov	lr, r6
+	b	.L1300
+.L1305:
+	mov	lr, ip
+	mul	ip, r4, ip
+	ldrb	ip, [r3, ip]	@ zero_extendqisi2
+	cmp	ip, #255
+	bne	.L1305
+	mla	r0, r4, r0, r3
+	mul	lr, r4, lr
+	ldrb	r0, [r0, #1]	@ zero_extendqisi2
+	strb	r0, [r3, lr]
+.L1301:
+	mov	ip, #1
+	b	.L1294
+.L1319:
 	.align	2
-.L1281:
-	.word	.LANCHOR6
-	.word	.LANCHOR1
-	.word	.LANCHOR35
-	.word	.LANCHOR113
-	.word	.LANCHOR27
-	.word	.LC46
-	.word	.LANCHOR111
-	.word	.LANCHOR112
-	.size	toshiba_read_retrial, .-toshiba_read_retrial
-	.section	.text.hynix_read_retrial,"ax",%progbits
+.L1318:
+	.word	.LANCHOR129
+	.word	.LANCHOR69
+	.word	.LANCHOR54
+	.word	.LANCHOR124
+	.word	.LANCHOR50
+	.size	queue_remove_completed_req, .-queue_remove_completed_req
+	.section	.text.pm_alloc_new_blk,"ax",%progbits
 	.align	1
-	.global	hynix_read_retrial
+	.global	pm_alloc_new_blk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	hynix_read_retrial, %function
-hynix_read_retrial:
-	@ args = 8, pretend = 0, frame = 8
+	.type	pm_alloc_new_blk, %function
+pm_alloc_new_blk:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r6, #0
-	str	r3, [sp, #12]
-	mov	r4, #-1
-	mov	r7, r0
-	mov	r8, r2
-	ldr	r3, .L1297
-	ldr	r3, [r3]
-	add	fp, r3, r0
-	ldrb	r10, [r3, #114]	@ zero_extendqisi2
-	ldrb	r5, [fp, #120]	@ zero_extendqisi2
-	bl	nandc_wait_flash_ready
-.L1284:
-	cmp	r6, r10
-	bcc	.L1289
-.L1288:
-	ldr	r3, .L1297+4
-	strb	r5, [fp, #120]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	r4, r3, asr #2
-	bcc	.L1283
-	adds	r3, r4, #1
-	mov	r2, r8
-	it	ne
-	movne	r4, #256
-	mov	r3, r6
-	str	r4, [sp]
-	mov	r1, r6
-	ldr	r0, .L1297+8
-	bl	printf
-.L1283:
-	mov	r0, r4
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1289:
-	adds	r5, r5, #1
-	mov	r0, r7
-	uxtb	r5, r5
-	cmp	r10, r5
-	it	ls
-	movls	r5, #0
-	mov	r1, r5
-	bl	hynix_set_rr_para
-	ldr	r3, [sp, #52]
-	mov	r1, r8
-	ldr	r2, [sp, #12]
-	mov	r0, r7
-	str	r3, [sp]
-	ldr	r3, [sp, #48]
-	bl	flash_read_page
-	adds	r2, r0, #1
-	beq	.L1286
-	ldr	r3, .L1297+12
-	cmp	r4, #-1
-	it	eq
-	moveq	r4, r0
-	ldr	r3, [r3]
-	str	r3, [sp, #12]
-	ldr	r3, .L1297+16
-	ldr	r3, [r3]
-	str	r3, [sp, #48]
-	ldr	r3, .L1297+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	r0, r3, asr #2
-	bcc	.L1292
-.L1286:
-	adds	r6, r6, #1
-	b	.L1284
-.L1292:
-	mov	r4, r0
-	b	.L1288
-.L1298:
-	.align	2
-.L1297:
-	.word	.LANCHOR5
-	.word	.LANCHOR27
-	.word	.LC47
-	.word	.LANCHOR111
-	.word	.LANCHOR112
-	.size	hynix_read_retrial, .-hynix_read_retrial
-	.section	.text.flash_ddr_tunning_read,"ax",%progbits
-	.align	1
-	.global	flash_ddr_tunning_read
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	flash_ddr_tunning_read, %function
-flash_ddr_tunning_read:
-	@ args = 4, pretend = 0, frame = 24
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r8, #0
-	mov	r5, r8
-	mov	r4, r8
-	mov	r7, #1024
-	movs	r6, #6
-	mov	fp, #-1
-	sub	sp, sp, #32
-	str	r0, [sp, #16]
-	str	r1, [sp, #12]
-	str	r2, [sp, #20]
-	str	r3, [sp, #24]
-	bl	nandc_get_ddr_para
-	str	r8, [sp, #8]
-	str	r0, [sp, #28]
-.L1304:
-	uxtb	r0, r6
-	bl	nandc_set_ddr_para
-	ldr	r3, [sp, #64]
-	ldr	r2, [sp, #20]
-	ldr	r1, [sp, #12]
-	str	r3, [sp]
-	ldr	r0, [sp, #16]
-	ldr	r3, [sp, #24]
-	bl	flash_read_page
-	ldr	r2, [sp, #12]
-	mov	r3, r0
-	mov	r10, r0
+	push	{r0, r1, r2, r4, r5, r6, r7, lr}
+	ldr	r5, .L1336
+	ldr	r1, .L1336+4
+	ldr	r2, [r5]
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	ldrh	r3, [r2, #690]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	cmp	r1, r3
+	strh	r3, [r2, #690]	@ movhi
+	bls	.L1321
+	add	r3, r3, #336
+	ldrh	r2, [r2, r3, lsl #1]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L1322
+.L1321:
+	ldr	r7, .L1336+8
+	ldr	r4, .L1336+12
+.L1334:
+	movs	r0, #1
+	bl	ftl_alloc_sblk
+	movs	r1, #0
+	mov	r6, r0
+	bl	ftl_erase_sblk
+	ldr	r1, [r5]
+	mov	r0, r6
+	add	r1, r1, #672
+	bl	ftl_get_blk_list_in_sblk
+	uxth	r0, r0
+	cbnz	r0, .L1323
 	mov	r1, r6
-	ldr	r0, .L1316
+	mov	r0, r7
 	bl	printf
-	adds	r3, r7, #1
-	cmp	r10, r3
-	bhi	.L1300
-	ldr	r3, .L1316+4
-	cmp	r10, #2
-	ldr	r3, [r3]
-	str	r3, [sp, #20]
-	ldr	r3, .L1316+8
-	ldr	r3, [r3]
-	str	r3, [sp, #24]
-	bhi	.L1309
+	ldr	r3, [r4]
+	add	r6, r3, r6, lsl #2
+	ldrb	r3, [r6, #2]	@ zero_extendqisi2
+	orr	r3, r3, #224
+	strb	r3, [r6, #2]
+	b	.L1334
+.L1323:
+	ldr	r3, [r5]
+	movs	r1, #1
+	ldr	r2, .L1336+16
+	movs	r4, #0
+	strh	r4, [r3, #690]	@ movhi
+	add	r3, r3, #416
+	str	r1, [r2]
+	movw	r1, #65535
+.L1325:
+	ldrh	r0, [r3], #2
+	uxth	r2, r4
+	cmp	r0, r1
+	beq	.L1324
 	adds	r4, r4, #1
-	cmp	r4, #7
-	bls	.L1309
-	mov	r3, r5
-	mov	r7, r10
-	subs	r5, r6, r4
-	mov	fp, #0
-.L1302:
-	ldr	r2, [sp, #8]
-	cmp	r4, r2
-	it	ls
-	movls	r5, r3
-.L1303:
-	cbz	r5, .L1305
-	ldr	r3, .L1316+12
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	ldr	r3, .L1316+16
-	umull	r2, r3, r2, r3
-	ubfx	r3, r3, #1, #8
-	cmp	r3, r7
-	bls	.L1305
-	mov	r1, r5
-	ldr	r0, .L1316+20
+	cmp	r4, #128
+	bne	.L1325
+	movs	r2, #194
+	ldr	r1, .L1336+20
+	ldr	r0, .L1336+24
 	bl	printf
-	uxtb	r0, r5
-.L1315:
-	bl	nandc_set_ddr_para
-	cmp	fp, #0
-	beq	.L1299
-	mov	r7, fp
-	ldr	r2, [sp, #12]
-	ldr	r1, [sp, #16]
-	ldr	r0, .L1316+24
+	mov	r2, r4
+.L1324:
+	ldr	r3, [r5]
+	adds	r2, r2, #208
+	strh	r6, [r3, r2, lsl #1]	@ movhi
+	ldrh	r2, [r3, #688]
+	adds	r2, r2, #1
+	strh	r2, [r3, #688]	@ movhi
+.L1322:
+	ldr	r2, [r5]
+	ldrh	r3, [r2, #690]
+	add	r3, r3, #336
+	ldrh	r4, [r2, r3, lsl #1]
+	movw	r2, #65533
+	subs	r3, r4, #1
+	uxth	r3, r3
+	cmp	r3, r2
+	bls	.L1327
+	movs	r2, #199
+	ldr	r1, .L1336+20
+	ldr	r0, .L1336+24
 	bl	printf
-.L1299:
-	mov	r0, r7
-	add	sp, sp, #32
+.L1327:
+	ldr	r1, [r5]
+	movs	r3, #0
+	strh	r3, [r1, #696]	@ movhi
+	ldr	r3, .L1336+28
+	strh	r4, [r1, #692]	@ movhi
+	ldrh	r2, [r3]
+	rsb	r2, r2, #21
+	asr	r3, r4, r2
+	strh	r3, [r1, #694]	@ movhi
+	ldr	r1, .L1336+32
+	ldr	r1, [r1]
+	lsls	r1, r1, #19
+	bpl	.L1331
+	movs	r1, #1
+	uxth	r3, r3
+	lsl	r2, r1, r2
+	ldr	r0, .L1336+36
+	str	r3, [sp]
+	mov	r1, r4
+	mov	r3, r4
+	subs	r2, r2, #1
+	bl	printf
+.L1331:
+	movs	r0, #0
+	add	sp, sp, #12
 	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1300:
-	ldr	r3, [sp, #8]
-	cmp	r4, r3
-	bls	.L1310
-	cmp	r4, #7
-	sub	r5, r8, r4
-	bhi	.L1303
-	str	r4, [sp, #8]
-.L1310:
-	movs	r4, #0
-	b	.L1301
-.L1309:
-	mov	r8, r6
-	mov	r7, r10
-	mov	fp, #0
-.L1301:
-	adds	r6, r6, #2
-	cmp	r6, #50
-	bne	.L1304
-	mov	r3, r5
-	mov	r5, r8
-	b	.L1302
-.L1305:
-	ldrb	r0, [sp, #28]	@ zero_extendqisi2
-	b	.L1315
-.L1317:
+	pop	{r4, r5, r6, r7, pc}
+.L1337:
 	.align	2
-.L1316:
-	.word	.LC48
-	.word	.LANCHOR111
-	.word	.LANCHOR112
-	.word	.LANCHOR27
-	.word	-1431655765
-	.word	.LC49
-	.word	.LC50
-	.size	flash_ddr_tunning_read, .-flash_ddr_tunning_read
-	.section	.text.flash_read_page_en,"ax",%progbits
+.L1336:
+	.word	.LANCHOR102
+	.word	.LANCHOR78
+	.word	.LC76
+	.word	.LANCHOR7
+	.word	.LANCHOR130
+	.word	.LANCHOR131
+	.word	.LC0
+	.word	.LANCHOR66
+	.word	.LANCHOR14
+	.word	.LC77
+	.size	pm_alloc_new_blk, .-pm_alloc_new_blk
+	.section	.text.pm_select_ram_region,"ax",%progbits
 	.align	1
-	.global	flash_read_page_en
+	.global	pm_select_ram_region
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_read_page_en, %function
-flash_read_page_en:
-	@ args = 4, pretend = 0, frame = 8
+	.type	pm_select_ram_region, %function
+pm_select_ram_region:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r8, r3
-	ldr	r3, .L1347
-	mov	r4, r1
-	mov	r7, r2
-	ldr	r10, [sp, #48]
-	ldrb	r3, [r3]	@ zero_extendqisi2
+	ldr	r2, .L1348
+	movw	r0, #65535
+	push	{r3, r4, r5, r6, r7, lr}
+	movs	r3, #0
+	mov	r1, r2
+.L1340:
+	ldrh	r5, [r2, r3, lsl #3]
+	uxth	r4, r3
+	cmp	r5, r0
+	beq	.L1339
+	adds	r3, r3, #1
+	cmp	r3, #32
+	bne	.L1340
+	movs	r2, #0
+	mov	r4, r3
+	mov	r0, #32768
+.L1342:
+	add	r3, r1, r2, lsl #3
+	uxth	r5, r2
+	ldrh	r3, [r3, #2]
+	lsls	r6, r3, #16
+	bmi	.L1341
 	cmp	r3, r0
-	bhi	.L1319
-	mov	r2, #386
-	ldr	r1, .L1347+4
-	ldr	r0, .L1347+8
-	bl	printf
-.L1320:
-	b	.L1320
-.L1319:
-	ldr	r3, .L1347+12
-	ldrb	r5, [r3, r0]	@ zero_extendqisi2
-	ldr	r3, .L1347+16
-	ldr	r3, [r3]
-	lsls	r0, r3, #27
-	bpl	.L1321
-	mov	r2, r1
-	ldr	r0, .L1347+20
-	mov	r1, r5
+	itt	cc
+	movcc	r0, r3
+	movcc	r4, r5
+.L1341:
+	adds	r2, r2, #1
+	cmp	r2, #32
+	bne	.L1342
+	cmp	r4, #32
+	bne	.L1339
+	ldr	r3, .L1348+4
+	mov	r2, #-1
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	movs	r3, #0
+.L1344:
+	add	r0, r1, r3, lsl #3
+	uxth	r6, r3
+	ldrh	r0, [r0, #2]
+	cmp	r0, r2
+	bcs	.L1343
+	ldrh	r7, [r1, r3, lsl #3]
+	cmp	r7, r5
+	itt	ne
+	movne	r2, r0
+	movne	r4, r6
+.L1343:
+	adds	r3, r3, #1
+	cmp	r3, #32
+	bne	.L1344
+	cmp	r4, #32
+	bne	.L1339
+	movw	r2, #297
+	ldr	r1, .L1348+8
+	ldr	r0, .L1348+12
 	bl	printf
-.L1321:
-	tst	r4, #50331648
-	bne	.L1322
-	ldr	r3, .L1347+24
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	ldr	r3, .L1347+28
-	cbz	r2, .L1323
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	cbz	r2, .L1322
-.L1323:
-	ldr	r2, .L1347+32
-	mov	r0, r4
-	str	r3, [sp, #12]
-	ldrh	r6, [r2]
-	mov	r1, r6
-	bl	__aeabi_uidiv
-	mov	r1, r6
-	mul	fp, r6, r0
+.L1339:
 	mov	r0, r4
-	bl	__aeabi_uidivmod
-	ldr	r3, [sp, #12]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1324
-	add	r4, fp, r1, lsl #1
-.L1322:
-	mov	r1, r4
-	str	r10, [sp]
-	mov	r3, r8
-	mov	r2, r7
-	mov	r0, r5
-	bl	flash_read_page
-	adds	r1, r0, #1
-	mov	r6, r0
-	bne	.L1318
-	ldr	fp, .L1347+40
-	ldrb	r3, [fp]	@ zero_extendqisi2
-	str	r3, [sp, #12]
-	cbnz	r3, .L1326
-.L1329:
-	ldr	r3, .L1347+36
-	ldr	fp, [r3]
-	cmp	fp, #0
-	bne	.L1327
-.L1328:
-	ldr	r3, .L1347+40
-	mov	r2, r4
-	movs	r1, #0
-	ldr	r0, .L1347+44
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	str	r3, [sp]
-	mov	r3, #-1
-	bl	printf
-	ldr	r3, .L1347+48
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1318
-	str	r10, [sp, #48]
-	mov	r3, r8
-	mov	r2, r7
-	mov	r1, r4
-	mov	r0, r5
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
-	b	flash_ddr_tunning_read
-.L1324:
-	ldr	r3, .L1347+52
-	ldrh	r4, [r3, r1, lsl #1]
-	add	r4, r4, fp
-	b	.L1322
-.L1326:
-	movs	r3, #0
-	mov	r2, r7
-	strb	r3, [fp]
-	mov	r1, r4
-	mov	r3, r8
-	str	r10, [sp]
-	mov	r0, r5
-	bl	flash_read_page
-	ldrb	r3, [sp, #12]	@ zero_extendqisi2
-	adds	r2, r0, #1
-	strb	r3, [fp]
-	beq	.L1329
-.L1346:
-	mov	r6, r0
-.L1318:
-	mov	r0, r6
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1327:
-	mov	r3, r7
-	stm	sp, {r8, r10}
-	mov	r2, r4
-	movs	r1, #0
-	mov	r0, r5
-	blx	fp
-	adds	r3, r0, #1
-	bne	.L1346
-	b	.L1328
-.L1348:
+	pop	{r3, r4, r5, r6, r7, pc}
+.L1349:
 	.align	2
-.L1347:
-	.word	.LANCHOR8
-	.word	.LANCHOR114
+.L1348:
+	.word	.LANCHOR132
+	.word	.LANCHOR133
+	.word	.LANCHOR134
 	.word	.LC0
-	.word	.LANCHOR10
-	.word	.LANCHOR22
-	.word	.LC51
-	.word	.LANCHOR11
-	.word	.LANCHOR12
-	.word	.LANCHOR13
-	.word	.LANCHOR115
-	.word	.LANCHOR29
-	.word	.LC52
-	.word	.LANCHOR35
-	.word	.LANCHOR14
-	.size	flash_read_page_en, .-flash_read_page_en
-	.section	.text.flash_get_last_written_page,"ax",%progbits
+	.size	pm_select_ram_region, .-pm_select_ram_region
+	.section	.text.idb_init,"ax",%progbits
 	.align	1
-	.global	flash_get_last_written_page
+	.global	idb_init
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_get_last_written_page, %function
-flash_get_last_written_page:
-	@ args = 4, pretend = 0, frame = 0
+	.type	idb_init, %function
+idb_init:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r8, r0
-	ldr	r4, .L1355
-	mov	r10, r2
-	mov	fp, r3
-	ldrh	r5, [r4]
-	ldr	r4, .L1355+4
-	subs	r5, r5, #1
-	ldrh	r6, [r4, #26]
-	sxth	r5, r5
-	muls	r6, r1, r6
-	ldr	r1, [sp, #40]
-	str	r1, [sp]
-	adds	r1, r5, r6
-	bl	flash_read_page_en
-	cmp	r0, #512
-	bne	.L1350
-	movs	r7, #0
-.L1351:
-	cmp	r7, r5
-	ble	.L1354
-.L1350:
-	mov	r0, r5
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1354:
-	adds	r4, r7, r5
-	ldr	r3, [sp, #40]
-	add	r4, r4, r4, lsr #31
-	mov	r2, r10
-	mov	r0, r8
-	asrs	r4, r4, #1
-	str	r3, [sp]
-	mov	r3, fp
-	sxtah	r1, r6, r4
-	bl	flash_read_page_en
-	cmp	r0, #512
-	itete	eq
-	addeq	r4, r4, #-1
-	addne	r4, r4, #1
-	sxtheq	r5, r4
-	sxthne	r7, r4
-	b	.L1351
-.L1356:
+	@ link register save eliminated.
+	ldr	r3, .L1351
+	movs	r0, #0
+	str	r0, [r3]
+	ldr	r3, .L1351+4
+	str	r0, [r3]
+	ldr	r3, .L1351+8
+	str	r0, [r3]
+	bx	lr
+.L1352:
 	.align	2
-.L1355:
-	.word	.LANCHOR97
-	.word	.LANCHOR19
-	.size	flash_get_last_written_page, .-flash_get_last_written_page
-	.section	.text.flash_get_last_written_page_ext,"ax",%progbits
+.L1351:
+	.word	.LANCHOR135
+	.word	.LANCHOR136
+	.word	.LANCHOR137
+	.size	idb_init, .-idb_init
+	.section	.text.ftl_memset,"ax",%progbits
 	.align	1
-	.global	flash_get_last_written_page_ext
+	.global	ftl_memset
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_get_last_written_page_ext, %function
-flash_get_last_written_page_ext:
+	.type	ftl_memset, %function
+ftl_memset:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r4, r5, lr}
-	movs	r5, #1
-	ldr	r4, .L1358
-	ldrh	r4, [r4]
-	str	r3, [sp]
-	mov	r3, r2
-	mov	r2, r1
-	rsb	r4, r4, #21
-	lsls	r5, r5, r4
-	asr	r4, r0, r4
-	subs	r5, r5, #1
-	and	r1, r5, r0
-	uxtb	r0, r4
-	bl	flash_get_last_written_page
-	add	sp, sp, #12
-	@ sp needed
-	pop	{r4, r5, pc}
-.L1359:
-	.align	2
-.L1358:
-	.word	.LANCHOR71
-	.size	flash_get_last_written_page_ext, .-flash_get_last_written_page_ext
-	.section	.text.flash_info_blk_init,"ax",%progbits
+	@ link register save eliminated.
+	b	memset
+	.size	ftl_memset, .-ftl_memset
+	.section	.text.flash_lsb_page_tbl_build,"ax",%progbits
 	.align	1
-	.global	flash_info_blk_init
+	.global	flash_lsb_page_tbl_build
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_info_blk_init, %function
-flash_info_blk_init:
+	.type	flash_lsb_page_tbl_build, %function
+flash_lsb_page_tbl_build:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r4, #4
-	ldr	r10, .L1384+12
-.L1363:
-	movs	r5, #4
-	movs	r0, #0
-	ldr	r8, .L1384+16
-	ldr	fp, .L1384+20
-	ldr	r6, .L1384
-	ldrh	r1, [r8]
-	str	r5, [sp]
-	mov	r7, fp
-	ldr	r3, [r6]
-	ldr	r2, [fp]
-	muls	r1, r4, r1
-	bl	flash_read_page_en
+	push	{r4, lr}
+	ldr	r4, .L1392
+	cbnz	r0, .L1355
+.L1356:
+	strh	r0, [r4, r0, lsl #1]	@ movhi
 	adds	r0, r0, #1
-	beq	.L1361
-	ldr	r2, [fp]
-	ldr	r3, [r2]
-	cmp	r3, r10
-	beq	.L1362
+	cmp	r0, #256
+	bne	.L1356
+.L1362:
+	movs	r1, #255
+	mov	r2, #1024
+	ldr	r0, .L1392+4
+	bl	ftl_memset
+	ldr	r1, .L1392+4
+	movs	r3, #0
+.L1357:
+	ldrh	r2, [r4, r3, lsl #1]
+	adds	r3, r3, #1
+	cmp	r3, #256
+	strh	r2, [r1, r2, lsl #1]	@ movhi
+	bne	.L1357
+	pop	{r4, pc}
+.L1355:
+	cmp	r0, #1
+	bne	.L1358
+	movs	r3, #0
 .L1361:
-	adds	r4, r4, #1
-	cmp	r4, #16
+	cmp	r3, #3
+	uxth	r2, r3
+	bls	.L1359
+	tst	r2, #1
+	ite	ne
+	movne	r1, #3
+	moveq	r1, #2
+	rsb	r2, r1, r2, lsl #1
+	uxth	r2, r2
+.L1359:
+	strh	r2, [r4, r3, lsl #1]	@ movhi
+	adds	r3, r3, #1
+	cmp	r3, #256
+	bne	.L1361
+	b	.L1362
+.L1358:
+	cmp	r0, #2
 	bne	.L1363
-.L1383:
-	mov	r0, #-1
-.L1360:
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1371:
-	ldr	r3, [r7]
-	ldr	r2, [r3]
-	cmp	r2, r10
-	bne	.L1372
-	ldr	r4, [r3, #4]
+	movs	r2, #0
 .L1365:
-	ldrb	r1, [r5, #1]	@ zero_extendqisi2
-	movs	r3, #4
-	ldrh	r0, [r8]
-	str	r3, [sp]
-	ldr	r2, [r7]
-	ldr	r3, [r6]
-	muls	r1, r0, r1
-	movs	r0, #0
-	bl	flash_read_page_en
-	adds	r0, r0, #1
-	beq	.L1366
-	ldr	r3, [r7]
-	ldr	r2, [r3]
-	cmp	r2, r10
+	uxth	r3, r2
+	cmp	r2, #1
+	ittt	hi
+	lslhi	r3, r3, #1
+	addhi	r3, r3, #-1
+	uxthhi	r3, r3
+	strh	r3, [r4, r2, lsl #1]	@ movhi
+	adds	r2, r2, #1
+	cmp	r2, #256
+	bne	.L1365
+	b	.L1362
+.L1363:
+	cmp	r0, #3
 	bne	.L1366
-	ldr	r2, [r3, #4]
-	cmp	r4, r2
-	itttt	cc
-	ldrbcc	r2, [r3, #37]	@ zero_extendqisi2
-	ldrbcc	r3, [r3, #36]	@ zero_extendqisi2
-	strbcc	r2, [r5]
-	strbcc	r3, [r5, #1]
-.L1366:
-	mov	fp, #4
-	ldrb	r1, [r5]	@ zero_extendqisi2
-	str	fp, [sp]
-	movs	r0, #0
-	ldr	r3, [r6]
-	ldr	r2, [r7]
-	bl	flash_get_last_written_page
-	adds	r3, r0, #1
-	mov	r4, r0
-	strh	r3, [r5, #2]	@ movhi
-	ldrb	r5, [r5]	@ zero_extendqisi2
-	ldrh	r3, [r8]
-	mla	r5, r3, r5, r0
-.L1367:
-	cmp	r4, #0
-	bge	.L1369
-	adds	r4, r4, #1
-	bne	.L1370
-	ldr	r3, [r7]
-	ldr	r0, .L1384+4
-	ldr	r1, [r3]
-	bl	printf
-	b	.L1383
+	movs	r3, #0
 .L1369:
-	str	fp, [sp]
-	mov	r1, r5
-	ldr	r3, [r6]
-	movs	r0, #0
-	ldr	r2, [r7]
-	bl	flash_read_page_en
-	adds	r0, r0, #1
-	beq	.L1368
-	ldr	r3, [r7]
-	ldr	r3, [r3]
-	cmp	r3, r10
-	bne	.L1368
-.L1370:
-	movs	r0, #0
-	b	.L1360
-.L1368:
-	subs	r4, r4, #1
-	subs	r5, r5, #1
-	sxth	r4, r4
-	b	.L1367
-.L1362:
-	ldrb	r1, [r2, #36]	@ zero_extendqisi2
-	ldrh	r0, [r8]
-	ldrb	r3, [r2, #37]	@ zero_extendqisi2
-	ldr	r4, .L1384+8
-	strb	r1, [r4]
-	muls	r1, r0, r1
-	strb	r3, [r4, #1]
-	movs	r0, #0
-	str	r5, [sp]
-	mov	r5, r4
-	ldr	r3, [r6]
-	bl	flash_read_page_en
-	adds	r0, r0, #1
-	bne	.L1371
+	cmp	r3, #5
+	uxth	r2, r3
+	bls	.L1367
+	tst	r2, #1
+	ite	ne
+	movne	r1, #5
+	moveq	r1, #4
+	rsb	r2, r1, r2, lsl #1
+	uxth	r2, r2
+.L1367:
+	strh	r2, [r4, r3, lsl #1]	@ movhi
+	adds	r3, r3, #1
+	cmp	r3, #256
+	bne	.L1369
+	b	.L1362
+.L1366:
+	cmp	r0, #4
+	mov	r3, #0
+	bne	.L1370
+	strh	r3, [r4]	@ movhi
+	movs	r3, #1
+	strh	r3, [r4, #2]	@ movhi
+	movs	r3, #2
+	strh	r3, [r4, #4]	@ movhi
+	movs	r3, #3
+	strh	r3, [r4, #6]	@ movhi
+	movs	r3, #5
+	strh	r3, [r4, #10]	@ movhi
+	movs	r3, #7
+	strh	r3, [r4, #12]	@ movhi
+	mov	r2, r4
+	movs	r3, #8
+	strh	r0, [r4, #8]	@ movhi
+	strh	r3, [r2, #14]!	@ movhi
 .L1372:
-	movs	r4, #0
-	b	.L1365
-.L1385:
+	tst	r3, #1
+	ite	ne
+	movne	r1, #7
+	moveq	r1, #6
+	rsb	r1, r1, r3, lsl #1
+	adds	r3, r3, #1
+	uxth	r3, r3
+	strh	r1, [r2, #2]!	@ movhi
+	cmp	r3, #256
+	bne	.L1372
+	b	.L1362
+.L1370:
+	cmp	r0, #5
+	bne	.L1373
+.L1374:
+	strh	r3, [r4, r3, lsl #1]	@ movhi
+	adds	r3, r3, #1
+	cmp	r3, #16
+	bne	.L1374
+	ldr	r2, .L1392+8
+.L1375:
+	strh	r3, [r2, #2]!	@ movhi
+	adds	r3, r3, #2
+	uxth	r3, r3
+	cmp	r3, #496
+	bne	.L1375
+	b	.L1362
+.L1373:
+	cmp	r0, #8
+	bne	.L1376
+.L1377:
+	strh	r3, [r4, r3]	@ movhi
+	adds	r3, r3, #2
+	cmp	r3, #512
+	bne	.L1377
+	b	.L1362
+.L1376:
+	cmp	r0, #9
+	bne	.L1362
+	strh	r3, [r4]	@ movhi
+	movs	r3, #1
+	strh	r3, [r4, #2]	@ movhi
+	mov	r2, r4
+	movs	r3, #2
+	movw	r1, #509
+	strh	r3, [r2, #4]!	@ movhi
+	movs	r3, #3
+.L1378:
+	strh	r3, [r2, #2]!	@ movhi
+	adds	r3, r3, #2
+	uxth	r3, r3
+	cmp	r3, r1
+	bne	.L1378
+	b	.L1362
+.L1393:
 	.align	2
-.L1384:
-	.word	.LANCHOR116
-	.word	.LC53
-	.word	.LANCHOR117
-	.word	1398362953
-	.word	.LANCHOR13
-	.word	.LANCHOR5
-	.size	flash_info_blk_init, .-flash_info_blk_init
-	.section	.text.flash_ddr_para_scan,"ax",%progbits
+.L1392:
+	.word	.LANCHOR3
+	.word	.LANCHOR138
+	.word	.LANCHOR3+30
+	.size	flash_lsb_page_tbl_build, .-flash_lsb_page_tbl_build
+	.section	.text.flash_die_info_init,"ax",%progbits
 	.align	1
-	.global	flash_ddr_para_scan
+	.global	flash_die_info_init
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_ddr_para_scan, %function
-flash_ddr_para_scan:
-	@ args = 0, pretend = 0, frame = 0
+	.type	flash_die_info_init, %function
+flash_die_info_init:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1411
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r7, r0
-	ldr	r6, .L1392
-	movs	r5, #1
-	mov	r8, r1
-	ldr	r4, .L1392+4
-	ldr	fp, .L1392+8
-	ldr	r10, .L1392+12
-	ldrb	r0, [r6]	@ zero_extendqisi2
-	strb	r5, [r4]
-	bl	flash_set_interface_mode
-	ldrb	r0, [r6]	@ zero_extendqisi2
-	bl	nandc_set_if_mode
-	movs	r3, #4
-	ldr	r2, [r10]
-	str	r3, [sp]
-	mov	r1, r8
-	ldr	r3, [fp]
-	mov	r0, r7
-	bl	flash_ddr_tunning_read
-	movs	r3, #4
-	ldr	r2, [r10]
-	str	r3, [sp]
-	mov	r1, r8
-	ldr	r3, [fp]
-	mov	r0, r7
-	bl	flash_read_page
-	adds	r0, r0, #1
-	mov	r3, r4
-	bne	.L1387
-	ldrb	r2, [r6]	@ zero_extendqisi2
-	lsls	r2, r2, #31
-	bpl	.L1387
-	mov	r0, r5
-	bl	flash_set_interface_mode
-	mov	r0, r5
-	bl	nandc_set_if_mode
-	movs	r3, #0
-	strb	r3, [r4]
-.L1388:
-	movs	r0, #0
+	ldr	r3, [r3]
+	lsls	r3, r3, #19
+	bpl	.L1395
+	ldr	r1, .L1411+4
+	ldr	r0, .L1411+8
+	bl	printf
+.L1395:
+	ldr	r4, .L1411+12
+	movs	r6, #0
+	ldr	r5, .L1411+16
+	ldr	r7, .L1411+20
+	ldrh	r3, [r4, #26]
+	ldrb	r1, [r4, #12]	@ zero_extendqisi2
+	ldrh	r0, [r4, #10]
+	strh	r3, [r7]	@ movhi
+	strb	r6, [r5]
+	bl	__aeabi_idiv
+	ldr	r10, .L1411+48
+	movs	r2, #8
+	ldr	r3, .L1411+24
+	mov	r1, r6
+	mov	r8, r10
+	strh	r0, [r3]	@ movhi
+	ldr	r0, .L1411+28
+	bl	ftl_memset
+	movs	r2, #32
+	mov	r1, r6
+	ldr	r0, .L1411+32
+	bl	ftl_memset
+.L1397:
+	ldr	r3, .L1411+36
+	movs	r2, #2
+	add	r1, r10, r6, lsl #3
+	ldr	r0, .L1411+40
+	strb	r2, [r6, r3]
+	ldrb	r2, [r4]	@ zero_extendqisi2
+	bl	flash_mem_cmp8
+	cbnz	r0, .L1396
+	ldrb	r3, [r5]	@ zero_extendqisi2
+	ldr	r2, .L1411+32
+	str	r0, [r2, r3, lsl #2]
+	adds	r2, r3, #1
+	strb	r2, [r5]
+	uxtb	r0, r6
+	ldr	r2, .L1411+28
+	strb	r0, [r2, r3]
+	bl	zftl_flash_enter_slc_mode
+.L1396:
+	adds	r6, r6, #1
+	cmp	r6, #4
+	bne	.L1397
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	cmp	r3, #2
+	beq	.L1398
+.L1402:
+	ldrb	r2, [r4, #13]	@ zero_extendqisi2
+	ldrb	r3, [r5]	@ zero_extendqisi2
+	smulbb	r3, r3, r2
+	ldrh	r2, [r4, #14]
+	smulbb	r3, r3, r2
+	ldr	r2, .L1411+44
+	strh	r3, [r2]	@ movhi
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1387:
-	movs	r2, #1
-	strb	r2, [r3]
-	b	.L1388
-.L1393:
+.L1398:
+	ldrh	r6, [r7]
+	movs	r7, #0
+	ldrb	r3, [r4, #13]	@ zero_extendqisi2
+	ldrb	r10, [r4]	@ zero_extendqisi2
+	ldrb	fp, [r4, #23]	@ zero_extendqisi2
+	muls	r3, r6, r3
+	ldrh	r6, [r4, #14]
+	and	r6, r6, #65280
+	muls	r6, r3, r6
+	lsls	r3, r6, #1
+	str	r3, [sp]
+	ldr	r3, .L1411+28
+.L1401:
+	mov	r2, r10
+	add	r1, r8, r7, lsl #3
+	ldr	r0, .L1411+40
+	str	r3, [sp, #4]
+	bl	flash_mem_cmp8
+	ldr	r3, [sp, #4]
+	cbnz	r0, .L1399
+	ldr	r1, [sp]
+	ldrb	r2, [r5]	@ zero_extendqisi2
+	ldr	r0, .L1411+32
+	cmp	fp, #0
+	it	eq
+	moveq	r1, r6
+	strb	r7, [r3, r2]
+	str	r1, [r0, r2, lsl #2]
+	adds	r1, r2, #1
+	strb	r1, [r5]
+.L1399:
+	adds	r7, r7, #1
+	cmp	r7, #4
+	bne	.L1401
+	b	.L1402
+.L1412:
 	.align	2
-.L1392:
-	.word	.LANCHOR25
-	.word	.LANCHOR35
-	.word	.LANCHOR118
-	.word	.LANCHOR119
-	.size	flash_ddr_para_scan, .-flash_ddr_para_scan
-	.section	.text.flash_complete_page_read,"ax",%progbits
+.L1411:
+	.word	.LANCHOR14
+	.word	.LANCHOR139
+	.word	.LC1
+	.word	.LANCHOR31
+	.word	.LANCHOR18
+	.word	.LANCHOR2
+	.word	.LANCHOR140
+	.word	.LANCHOR30
+	.word	.LANCHOR141
+	.word	.LANCHOR32
+	.word	.LANCHOR31+1
+	.word	.LANCHOR142
+	.word	.LANCHOR42
+	.size	flash_die_info_init, .-flash_die_info_init
+	.section	.text.lpa_hash_init,"ax",%progbits
 	.align	1
-	.global	flash_complete_page_read
+	.global	lpa_hash_init
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_complete_page_read, %function
-flash_complete_page_read:
-	@ args = 0, pretend = 0, frame = 16
+	.type	lpa_hash_init, %function
+lpa_hash_init:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r7, r2
-	ldr	r2, .L1419
-	ubfx	r3, r0, #21, #3
-	sub	sp, sp, #24
-	str	r0, [sp, #12]
+	push	{r3, lr}
+	mov	r2, #512
+	movs	r1, #255
+	ldr	r0, .L1414
+	bl	ftl_memset
+	ldr	r3, .L1414+4
+	movs	r1, #255
+	ldr	r2, .L1414+8
+	ldrh	r3, [r3]
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	str	r1, [sp, #16]
-	cmp	r2, r3
-	bhi	.L1395
-	movw	r2, #791
-	ldr	r1, .L1419+4
-	ldr	r0, .L1419+8
-	bl	printf
-.L1396:
-	b	.L1396
-.L1395:
-	ldr	r2, [sp, #12]
-	ubfx	r4, r2, #0, #21
-	ubfx	r2, r2, #24, #2
-	str	r2, [sp, #8]
-	ldr	r2, .L1419+12
-	ldrb	r5, [r2, r3]	@ zero_extendqisi2
-	ldr	r3, .L1419+16
-	mov	r0, r5
-	ldr	r6, [r3]
-	bl	nandc_cs
-	ldr	r3, [sp, #8]
-	cbnz	r3, .L1397
-	ldr	r3, .L1419+20
-	ldr	fp, .L1419+52
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1398
-	ldrb	r3, [fp]	@ zero_extendqisi2
-	cbz	r3, .L1397
-.L1398:
-	ldr	r3, .L1419+24
-	mov	r0, r4
-	ldrh	r8, [r3]
-	mov	r1, r8
-	bl	__aeabi_uidiv
-	mov	r1, r8
-	mul	r10, r8, r0
-	mov	r0, r4
-	bl	__aeabi_uidivmod
-	ldrb	r3, [fp]	@ zero_extendqisi2
-	cmp	r3, #0
-	beq	.L1399
-	add	r4, r10, r1, lsl #1
-.L1397:
-	add	r6, r6, r5, lsl #8
-	movs	r3, #5
-	mov	r8, #0
-	ldr	fp, .L1419+44
-	str	r3, [r6, #2056]
-	uxtb	r3, r4
-	str	r8, [r6, #2052]
-	mov	r1, r8
-	str	r8, [r6, #2052]
-	mov	r0, r5
-	str	r3, [r6, #2052]
-	lsrs	r3, r4, #8
-	ldrb	r2, [fp, #9]	@ zero_extendqisi2
-	str	r3, [r6, #2052]
-	lsrs	r3, r4, #16
-	str	r3, [r6, #2052]
-	movs	r3, #224
-	str	r3, [r6, #2056]
-	str	r7, [sp]
-	ldr	r3, [sp, #16]
-	bl	nandc_xfer
-	adds	r1, r0, #1
-	mov	r6, r0
-	bne	.L1394
-	ldr	r10, .L1419+32
-	ldrb	r3, [r10]	@ zero_extendqisi2
-	str	r3, [sp, #20]
-	cbnz	r3, .L1401
-.L1404:
-	ldr	r3, .L1419+28
-	ldr	r8, [r3]
-	cmp	r8, #0
-	bne	.L1402
-.L1403:
-	ldr	r3, .L1419+32
-	movs	r1, #0
-	ldr	r2, [sp, #12]
-	ldr	r0, .L1419+36
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	str	r3, [sp]
-	mov	r3, #-1
+	muls	r2, r3, r2
+	ldr	r3, .L1414+12
+	ldr	r0, [r3]
+	lsls	r2, r2, #2
+	pop	{r3, lr}
+	b	ftl_memset
+.L1415:
+	.align	2
+.L1414:
+	.word	.LANCHOR108
+	.word	.LANCHOR85
+	.word	.LANCHOR78
+	.word	.LANCHOR110
+	.size	lpa_hash_init, .-lpa_hash_init
+	.section	.text.lpa_rebuild_hash,"ax",%progbits
+	.align	1
+	.global	lpa_rebuild_hash
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	lpa_rebuild_hash, %function
+lpa_rebuild_hash:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	ldr	r3, .L1427
+	ldr	r3, [r3]
+	lsls	r3, r3, #19
+	bpl	.L1417
+	movs	r3, #0
+	movs	r2, #224
+	ldr	r1, .L1427+4
+	ldr	r0, .L1427+8
 	bl	printf
-	ldr	r3, .L1419+40
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1394
-	ldr	r3, .L1419+44
-	mov	r0, r5
-	ldr	r1, [sp, #8]
-	ldr	r2, [sp, #16]
-	ldrb	r3, [r3, #9]	@ zero_extendqisi2
-	orr	r1, r4, r1, lsl #24
-	str	r3, [sp]
-	mov	r3, r7
-	bl	flash_ddr_tunning_read
-	b	.L1418
-.L1399:
-	ldr	r3, .L1419+48
-	ldrh	r4, [r3, r1, lsl #1]
-	add	r4, r4, r10
-	b	.L1397
-.L1401:
-	ldr	r1, [sp, #8]
-	mov	r0, r5
-	ldrb	r3, [fp, #9]	@ zero_extendqisi2
-	strb	r8, [r10]
-	ldr	r2, [sp, #16]
-	str	r3, [sp]
-	orr	r1, r4, r1, lsl #24
-	mov	r3, r7
-	bl	flash_read_page
-	ldrb	r3, [sp, #20]	@ zero_extendqisi2
-	adds	r2, r0, #1
-	strb	r3, [r10]
-	beq	.L1404
+.L1417:
+	ldr	r6, .L1427+12
+	mov	r2, #512
+	ldr	r4, .L1427+16
+	movs	r1, #255
+	ldr	r0, .L1427+20
+	bl	ftl_memset
+	ldrh	r3, [r4]
+	movs	r1, #255
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	ldr	r5, .L1427+24
+	muls	r2, r3, r2
+	ldr	r0, [r5]
+	lsls	r2, r2, #2
+	bl	ftl_memset
+	ldr	r3, .L1427+28
+	movs	r2, #0
+	ldrb	r6, [r6]	@ zero_extendqisi2
+	ldr	ip, [r5]
+	ldr	r7, [r3]
+	ldr	r0, .L1427+20
 .L1418:
-	mov	r6, r0
-.L1394:
-	mov	r0, r6
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1402:
-	ldr	r3, .L1419+44
-	mov	r2, r4
-	ldr	r1, [sp, #8]
-	mov	r0, r5
-	ldrb	r3, [r3, #9]	@ zero_extendqisi2
-	str	r7, [sp]
-	str	r3, [sp, #4]
-	ldr	r3, [sp, #16]
-	blx	r8
-	adds	r3, r0, #1
-	beq	.L1403
-	b	.L1418
+	ldrh	r3, [r4]
+	uxth	r5, r2
+	mov	r1, r5
+	muls	r3, r6, r3
+	cmp	r5, r3, lsl #1
+	blt	.L1420
+	pop	{r3, r4, r5, r6, r7, pc}
 .L1420:
+	ldr	r3, [r7, r1, lsl #2]
+	adds	r2, r2, #1
+	cmp	r3, #-1
+	itttt	ne
+	uxtbne	r3, r3
+	ldrhne	lr, [r0, r3, lsl #1]
+	strhne	r5, [r0, r3, lsl #1]	@ movhi
+	strhne	lr, [ip, r1, lsl #1]	@ movhi
+	b	.L1418
+.L1428:
 	.align	2
-.L1419:
-	.word	.LANCHOR8
-	.word	.LANCHOR120
-	.word	.LC0
-	.word	.LANCHOR10
-	.word	.LANCHOR6
-	.word	.LANCHOR11
-	.word	.LANCHOR13
-	.word	.LANCHOR115
-	.word	.LANCHOR29
-	.word	.LC54
-	.word	.LANCHOR35
-	.word	.LANCHOR19
+.L1427:
 	.word	.LANCHOR14
-	.word	.LANCHOR12
-	.size	flash_complete_page_read, .-flash_complete_page_read
-	.section	.text.queue_wait_first_req_completed,"ax",%progbits
+	.word	.LANCHOR143
+	.word	.LC78
+	.word	.LANCHOR78
+	.word	.LANCHOR85
+	.word	.LANCHOR108
+	.word	.LANCHOR110
+	.word	.LANCHOR109
+	.size	lpa_rebuild_hash, .-lpa_rebuild_hash
+	.section	.text.zftl_read_flash_info,"ax",%progbits
 	.align	1
+	.global	zftl_read_flash_info
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	queue_wait_first_req_completed, %function
-queue_wait_first_req_completed:
+	.type	zftl_read_flash_info, %function
+zftl_read_flash_info:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1458
-	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
-	ldrb	r5, [r3]	@ zero_extendqisi2
-	cmp	r5, #255
-	bne	.L1422
-.L1440:
-	movs	r4, #0
-	b	.L1421
-.L1422:
-	ldr	r6, .L1458+4
-	movs	r3, #48
-	mla	r3, r3, r5, r6
-	ldrb	r2, [r3, #42]	@ zero_extendqisi2
-	ldr	r4, [r3, #24]
-	subs	r3, r2, #1
-	cmp	r3, #9
-	bhi	.L1440
-	tbb	[pc, r3]
-.L1425:
-	.byte	(.L1424-.L1425)/2
-	.byte	(.L1424-.L1425)/2
-	.byte	(.L1426-.L1425)/2
-	.byte	(.L1426-.L1425)/2
-	.byte	(.L1426-.L1425)/2
-	.byte	(.L1427-.L1425)/2
-	.byte	(.L1428-.L1425)/2
-	.byte	(.L1429-.L1425)/2
-	.byte	(.L1426-.L1425)/2
-	.byte	(.L1429-.L1425)/2
-	.p2align 1
-.L1424:
-	movs	r1, #64
-	mov	r0, r4
-	bl	flash_wait_device_ready
-	lsls	r0, r0, #25
-	bpl	.L1440
-	movs	r3, #48
-	mov	r0, r4
-	mla	r5, r3, r5, r6
-	ldr	r3, [r5, #4]
-	ldr	r1, [r5, #8]
-	ldr	r2, [r5, #12]
-	cmp	r1, #0
-	it	eq
-	moveq	r1, r3
-	bl	flash_complete_page_read
-	movs	r3, #12
-	str	r0, [r5, #36]
-	strb	r3, [r5, #42]
-	ldrb	r3, [r5, #2]	@ zero_extendqisi2
-	orr	r3, r3, #8
-	strb	r3, [r5, #2]
-	b	.L1440
-.L1426:
-	movs	r1, #64
-	mov	r0, r4
-	bl	flash_wait_device_ready
-	lsls	r1, r0, #25
-	mov	r4, r0
-	bpl	.L1440
-	ands	r2, r0, #5
-	mov	r3, #48
-	mla	r5, r3, r5, r6
-	beq	.L1439
-	movs	r3, #11
-	ldrb	r1, [r5, #1]	@ zero_extendqisi2
-	strb	r3, [r5, #42]
-	ldr	r0, .L1458+8
-	str	r3, [sp]
-	ldr	r3, [r5, #24]
-	ldr	r2, [r5, #36]
-	bl	printf
-.L1457:
-	mov	r3, #-1
-	str	r3, [r5, #36]
-	b	.L1421
-.L1429:
-	add	r3, r5, r5, lsl #1
-	cmp	r2, #10
-	it	eq
-	moveq	r1, #9
-	add	r3, r6, r3, lsl #4
-	it	ne
-	movne	r1, #3
-	ubfx	r0, r4, #21, #3
-	movs	r7, #48
-.L1434:
-	ldrb	r8, [r3]	@ zero_extendqisi2
-	cmp	r8, #255
-	bne	.L1438
-	mov	r4, #-1
-	b	.L1421
-.L1438:
-	mla	r2, r7, r8, r6
-	add	r3, r8, r8, lsl #1
-	ldrb	ip, [r2, #42]	@ zero_extendqisi2
-	add	r3, r6, r3, lsl #4
-	cmp	ip, r1
-	bne	.L1434
-	ldr	r2, [r2, #24]
-	ubfx	r2, r2, #21, #3
-	cmp	r0, r2
-	bne	.L1434
-	mov	r0, r4
-	movs	r1, #64
-	bl	flash_wait_device_ready
-	ands	r4, r0, #64
-	mov	r10, r0
-	beq	.L1436
-	ands	r4, r0, #15
-	mul	r7, r7, r5
-	beq	.L1437
-	adds	r4, r6, r7
-	movs	r7, #11
-	ldrb	r1, [r4, #1]	@ zero_extendqisi2
-	ldr	r0, .L1458+8
-	str	r7, [sp]
-	ldr	r3, [r4, #24]
-	ldr	r2, [r4, #36]
-	bl	printf
-	mov	r3, #-1
-	strb	r7, [r4, #42]
-	str	r3, [r4, #36]
-	mov	r4, r10
-.L1436:
-	movs	r3, #48
-	mla	r5, r3, r5, r6
-	mla	r6, r3, r8, r6
-	ldrb	r2, [r5, #42]	@ zero_extendqisi2
-	ldr	r3, [r5, #36]
-	strb	r2, [r6, #42]
-	str	r3, [r6, #36]
-.L1421:
-	mov	r0, r4
-	add	sp, sp, #12
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L1437:
-	add	r7, r7, r6
-	movs	r3, #12
-	strb	r3, [r7, #42]
-	str	r4, [r7, #36]
-	b	.L1436
-.L1427:
-	mov	r0, r4
-	movs	r1, #32
-	bl	flash_wait_device_ready
-	lsls	r2, r0, #26
+	push	{r4, r5, r6, lr}
+	movs	r2, #11
+	movs	r1, #0
 	mov	r4, r0
-	bpl	.L1440
-	ands	r2, r0, #15
-	mov	r3, #48
-	mla	r5, r3, r5, r6
-	beq	.L1439
-	movs	r3, #11
-	strb	r3, [r5, #42]
-	b	.L1457
-.L1439:
-	movs	r3, #12
-	str	r2, [r5, #36]
-	strb	r3, [r5, #42]
-	b	.L1440
-.L1428:
-	movs	r1, #64
-	mov	r0, r4
-	bl	flash_wait_device_ready
-	lsls	r3, r0, #25
-	bpl	.L1440
-	movs	r3, #48
-	mla	r5, r3, r5, r6
-	movs	r3, #6
-	str	r0, [r5, #36]
-	strb	r3, [r5, #42]
-	b	.L1440
-.L1459:
-	.align	2
-.L1458:
-	.word	.LANCHOR90
-	.word	.LANCHOR36
-	.word	.LC55
-	.size	queue_wait_first_req_completed, .-queue_wait_first_req_completed
-	.section	.text.sblk_wait_write_queue_completed,"ax",%progbits
-	.align	1
-	.global	sblk_wait_write_queue_completed
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	sblk_wait_write_queue_completed, %function
-sblk_wait_write_queue_completed:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, lr}
-	ldr	r4, .L1463
-.L1461:
-	ldrb	r3, [r4]	@ zero_extendqisi2
-	cmp	r3, #255
-	bne	.L1462
-	pop	{r4, pc}
-.L1462:
-	bl	queue_wait_first_req_completed
-	bl	queue_remove_completed_req
-	b	.L1461
-.L1464:
+	bl	ftl_memset
+	ldr	r1, .L1432
+	movs	r2, #0
+	ldr	r3, .L1432+4
+	strb	r2, [r4, #10]
+	ldrb	r0, [r1, #9]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	smulbb	r3, r3, r0
+	uxth	r3, r3
+	strb	r3, [r4, #4]
+	lsrs	r3, r3, #8
+	strb	r3, [r4, #5]
+	ldr	r3, .L1432+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	strb	r3, [r4, #7]
+	ldr	r3, .L1432+12
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	strb	r5, [r4]
+	ldrb	r5, [r3, #1]	@ zero_extendqisi2
+	strb	r5, [r4, #1]
+	ldrb	r5, [r3, #2]	@ zero_extendqisi2
+	ldrb	r3, [r3, #3]	@ zero_extendqisi2
+	strb	r0, [r4, #6]
+	strb	r5, [r4, #2]
+	movs	r5, #1
+	strb	r3, [r4, #3]
+	movs	r3, #32
+	strb	r3, [r4, #8]
+	ldrb	r3, [r1, #7]	@ zero_extendqisi2
+	ldr	r0, .L1432+16
+	strb	r3, [r4, #9]
+	ldr	r3, .L1432+20
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	mov	r3, r2
+.L1430:
+	uxtb	r2, r3
+	cmp	r1, r2
+	bhi	.L1431
+	pop	{r4, r5, r6, pc}
+.L1431:
+	ldrb	r2, [r3, r0]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	ldrb	r6, [r4, #10]	@ zero_extendqisi2
+	lsl	r2, r5, r2
+	orrs	r2, r2, r6
+	strb	r2, [r4, #10]
+	b	.L1430
+.L1433:
 	.align	2
-.L1463:
-	.word	.LANCHOR90
-	.size	sblk_wait_write_queue_completed, .-sblk_wait_write_queue_completed
-	.section	.text.ftl_read_page,"ax",%progbits
-	.align	1
-	.global	ftl_read_page
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_read_page, %function
-ftl_read_page:
-	@ args = 4, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, lr}
-	mov	r4, r0
-	ldr	r8, [sp, #24]
-	mov	r5, r1
-	mov	r6, r2
-	mov	r7, r3
-	bl	sblk_wait_write_queue_completed
-	str	r8, [sp, #24]
-	mov	r3, r7
-	mov	r2, r6
-	mov	r1, r5
-	mov	r0, r4
-	pop	{r4, r5, r6, r7, r8, lr}
-	b	flash_read_page_en
-	.size	ftl_read_page, .-ftl_read_page
-	.section	.text.ftl_read_ppa_page,"ax",%progbits
-	.align	1
-	.global	ftl_read_ppa_page
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_read_ppa_page, %function
-ftl_read_ppa_page:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r4, r5, r6, r7, lr}
-	mov	r4, r0
-	mov	r5, r1
-	mov	r6, r2
-	mov	r7, r3
-	bl	sblk_wait_write_queue_completed
-	str	r7, [sp]
-	mov	r3, r6
-	mov	r2, r5
-	mov	r1, r4
-	ubfx	r0, r4, #21, #3
-	bl	flash_read_page_en
-	add	sp, sp, #12
-	@ sp needed
-	pop	{r4, r5, r6, r7, pc}
-	.size	ftl_read_ppa_page, .-ftl_read_ppa_page
-	.section	.text.ftl_open_sblk_read_test,"ax",%progbits
+.L1432:
+	.word	.LANCHOR31
+	.word	.LANCHOR2
+	.word	.LANCHOR44
+	.word	.LANCHOR59
+	.word	.LANCHOR30
+	.word	.LANCHOR18
+	.size	zftl_read_flash_info, .-zftl_read_flash_info
+	.section	.text.gc_static_wearleveling,"ax",%progbits
 	.align	1
-	.global	ftl_open_sblk_read_test
+	.global	gc_static_wearleveling
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_open_sblk_read_test, %function
-ftl_open_sblk_read_test:
-	@ args = 0, pretend = 0, frame = 32
+	.type	gc_static_wearleveling, %function
+gc_static_wearleveling:
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, lr}
+	ldr	r0, .L1550
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #40
+	ldr	r3, [r0]
+	ldr	r3, [r3, #32]
+	cmp	r3, #10240
+	bls	.L1435
+	bl	ftl_tmp_into_update
+.L1435:
+	ldr	r3, .L1550+4
+	ldr	r3, [r3]
+	ldr	r2, [r3, #568]
+	ldr	r1, [r3, #12]
+	add	r2, r2, #860160
+	add	r2, r2, #3840
+	cmp	r1, r2
+	bhi	.L1436
+	ldr	r4, [r0]
+	ldr	r2, [r3, #572]
+	ldr	r4, [r4, #36]
+	adds	r2, r2, #32
+	cmp	r4, r2
+	bls	.L1487
+.L1436:
+	ldr	r2, [r0]
 	movs	r5, #0
-	ldr	r8, .L1477+20
-	sub	sp, sp, #32
-	mov	r4, r0
-	add	r1, sp, #16
-	bl	ftl_get_blk_list_in_sblk
-	strh	r4, [sp]	@ movhi
-	strb	r0, [sp, #9]
-.L1468:
-	ldr	r3, .L1477
-	ldrh	r2, [r3]
-	uxth	r3, r5
-	cmp	r2, r3
-	bls	.L1467
-	movs	r4, #0
-	ldr	r7, .L1477+4
-	b	.L1470
-.L1473:
-	uxth	r3, r4
-	add	r2, sp, #32
-	add	r3, r2, r3, lsl #1
-	ldrh	r0, [r3, #-16]
-	movw	r3, #65535
-	cmp	r0, r3
-	bne	.L1469
-.L1472:
-	adds	r4, r4, #1
-.L1470:
-	ldrb	r2, [r7]	@ zero_extendqisi2
-	uxth	r3, r4
-	cmp	r2, r3
-	bhi	.L1473
-	adds	r5, r5, #1
-	b	.L1468
-.L1469:
-	ldr	r3, .L1477+8
-	uxth	r6, r5
-	ldr	r2, .L1477+12
-	ldr	r1, .L1477+16
-	ldrh	ip, [r3]
-	ldrb	r3, [r8]	@ zero_extendqisi2
-	mla	r0, r0, ip, r6
-	bl	ftl_read_ppa_page
-	cmp	r0, #512
-	bne	.L1472
-.L1467:
-	add	sp, sp, #32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, pc}
-.L1478:
-	.align	2
-.L1477:
-	.word	.LANCHOR79
-	.word	.LANCHOR69
-	.word	.LANCHOR75
-	.word	.LANCHOR121
-	.word	ftl_tmp_buffer
-	.word	.LANCHOR45
-	.size	ftl_open_sblk_read_test, .-ftl_open_sblk_read_test
-	.section	.text.sblk_read_page,"ax",%progbits
-	.align	1
-	.global	sblk_read_page
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	sblk_read_page, %function
-sblk_read_page:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r4, r0
-	ldr	r10, .L1493
-	mov	r5, r1
-	mov	r8, r0
-	mov	r6, r1
-.L1480:
-	cbnz	r6, .L1484
-.L1492:
-	ldr	r6, .L1493
-.L1485:
-	cbnz	r5, .L1488
-	mov	r0, r5
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1484:
-	ldrb	r7, [r8]	@ zero_extendqisi2
-	ldr	fp, [r8, #24]
-.L1481:
+	movw	r4, #65535
+	mov	r8, r5
+	mov	fp, r4
+	str	r5, [sp, #20]
+	ldrh	r6, [r2, #134]
+	ldr	r0, [r2, #36]
+	str	r5, [sp, #32]
+	str	r1, [r3, #568]
+	str	r0, [r3, #572]
+	str	r5, [sp, #36]
+	str	r5, [sp, #28]
+	str	r5, [sp, #24]
+	str	r5, [sp, #16]
+.L1438:
+	ldr	r3, .L1550+8
+	ldrh	r3, [r3]
+	cmp	r3, r6
+	bhi	.L1449
+	ldr	r6, .L1550+4
+	movs	r3, #0
+	movs	r2, #128
+	movs	r1, #255
+	ldr	r0, [r6]
+	strh	r3, [r0, #122]	@ movhi
+	add	r0, r0, #264
+	bl	ftl_memset
+	ldr	r3, [r6]
+	ldrh	r1, [r3, #586]
+	ldr	r3, .L1550+12
+	ldr	r2, [r3]
+	ldr	r3, .L1550+16
+	ldr	r3, [r3]
+	add	r6, r2, r1, lsl #2
+	lsls	r0, r3, #21
+	bpl	.L1450
+	ldr	r0, .L1550+20
+	ldr	r3, [r2, r1, lsl #2]
+	ldrh	r2, [r2, r1, lsl #2]
+	ldr	r0, [r0]
+	ubfx	r3, r3, #11, #8
+	ubfx	r2, r2, #0, #11
+	ldrh	r0, [r0, r1, lsl #1]
+	str	r0, [sp, #12]
+	ldrb	r0, [r6, #3]	@ zero_extendqisi2
+	str	r0, [sp, #8]
+	ldrb	r0, [r6, #2]	@ zero_extendqisi2
+	lsrs	r0, r0, #5
+	str	r0, [sp, #4]
+	ldrb	r0, [r6, #2]	@ zero_extendqisi2
+	ubfx	r0, r0, #3, #2
+	str	r0, [sp]
+	ldr	r0, .L1550+24
+	bl	printf
+.L1450:
+	ldrb	r3, [r6, #2]	@ zero_extendqisi2
+	lsls	r2, r3, #28
+	bpl	.L1451
+	and	r2, r3, #192
+	ldr	r6, .L1550+4
+	cmp	r2, #64
+	bne	.L1452
+	ldr	r3, [r6]
+	movs	r2, #1
 	movs	r1, #0
-	mov	r0, fp
-	bl	queue_lun_state
-	cbnz	r0, .L1482
+	ldrh	r0, [r3, #586]
+	bl	gc_add_sblk
+	ldr	r3, .L1550+28
+	movs	r2, #1
+	strh	r2, [r3, #314]	@ movhi
+.L1451:
+	ldr	r3, .L1550+4
+	ldr	r3, [r3]
+	ldrh	r1, [r3, #584]
+	ldr	r3, .L1550+12
+	ldr	r2, [r3]
+	ldr	r3, .L1550+16
+	ldr	r3, [r3]
+	add	r6, r2, r1, lsl #2
+	lsls	r7, r3, #21
+	bpl	.L1453
+	ldr	r0, .L1550+20
+	ldr	r3, [r2, r1, lsl #2]
+	ldrh	r2, [r2, r1, lsl #2]
+	ldr	r0, [r0]
+	ubfx	r3, r3, #11, #8
+	ubfx	r2, r2, #0, #11
+	ldrh	r0, [r0, r1, lsl #1]
+	str	r0, [sp, #12]
+	ldrb	r0, [r6, #3]	@ zero_extendqisi2
+	str	r0, [sp, #8]
+	ldrb	r0, [r6, #2]	@ zero_extendqisi2
+	lsrs	r0, r0, #5
 	str	r0, [sp, #4]
-	movs	r0, #48
-	ldr	r1, [r8, #24]
-	bl	flash_start_page_read
-	ldr	r2, [sp, #4]
-	movs	r1, #1
-	strb	r1, [r8, #42]
-	mov	r1, r8
-	ldr	r0, .L1493+4
-	strb	r2, [r8, #43]
-	movs	r2, #255
-	strb	r2, [r8]
-	bl	buf_add_tail
-	subs	r6, r6, #1
-	beq	.L1492
-	add	r7, r7, r7, lsl #1
-	add	r8, r10, r7, lsl #4
-	b	.L1480
-.L1482:
-	bl	queue_wait_first_req_completed
-	bl	queue_remove_completed_req
-	b	.L1481
-.L1488:
-	ldrb	r3, [r4, #42]	@ zero_extendqisi2
-	cmp	r3, #12
-	bne	.L1486
-	ldrb	r4, [r4]	@ zero_extendqisi2
-	subs	r5, r5, #1
-	add	r4, r4, r4, lsl #1
-	add	r4, r6, r4, lsl #4
-	b	.L1485
-.L1486:
-	bl	queue_wait_first_req_completed
-	bl	queue_remove_completed_req
-	b	.L1485
-.L1494:
-	.align	2
-.L1493:
-	.word	.LANCHOR36
-	.word	.LANCHOR90
-	.size	sblk_read_page, .-sblk_read_page
-	.section	.text.gc_check_data_one_wl,"ax",%progbits
-	.align	1
-	.global	gc_check_data_one_wl
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	gc_check_data_one_wl, %function
-gc_check_data_one_wl:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #24
-	ldr	r3, .L1520
-	ldr	r4, .L1520+4
-	ldr	r8, [r3]
-	ldr	r3, [r4, #8]
-	cbnz	r3, .L1496
-	movs	r0, #1
-	bl	buf_alloc
-	str	r0, [r4, #8]
-.L1496:
-	ldr	r5, [r4, #8]
-	cbz	r5, .L1497
-	ldr	fp, .L1520+40
-	add	r10, r8, #96
-	movs	r7, #0
-.L1498:
-	ldrb	r3, [r8, #89]	@ zero_extendqisi2
-	cmp	r7, r3
-	bge	.L1508
-	movs	r6, #1
-	b	.L1509
-.L1497:
-	movw	r2, #333
-	ldr	r1, .L1520+8
-	ldr	r0, .L1520+12
-	bl	printf
-.L1499:
-	b	.L1499
-.L1507:
-	ldrh	r3, [fp]
-	ldrh	r2, [r10]
-	muls	r2, r3, r2
-	ldr	r3, .L1520+16
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	ldrh	r3, [r4, #12]
-	cmp	r1, #3
-	bne	.L1500
-	add	r3, r3, r2
-	orr	r3, r3, r6, lsl #24
-.L1519:
-	movs	r1, #1
-	str	r3, [r5, #24]
-	mov	r0, r5
-	bl	sblk_read_page
-	ldr	r2, [r5, #36]
-	ldr	r1, .L1520+20
-	adds	r0, r2, #1
-	beq	.L1503
-	ldr	r3, [r1]
-	ldrh	ip, [r4, #18]
-	ldr	r0, [r5, #12]
-	ldr	lr, [r3, ip, lsl #2]
-	ldr	r3, [r0, #4]
-	cmp	lr, r3
-	bne	.L1503
-	ldr	r3, .L1520+24
-	ldr	r3, [r3]
-	ldr	ip, [r3, ip, lsl #2]
-	ldr	r3, [r0, #8]
-	cmp	ip, r3
-	beq	.L1504
-.L1503:
-	ldrh	r3, [r4, #18]
-	ldr	r1, [r1]
-	lsls	r0, r3, #2
-	ldr	r3, [r1, r3, lsl #2]
-	adds	r1, r3, #1
-	beq	.L1504
-	ldr	r1, .L1520+28
-	ldr	r1, [r1]
-	lsls	r1, r1, #21
-	bpl	.L1505
-	ldr	r1, [r5, #12]
-	ldr	r4, [r1, #12]
-	str	r4, [sp, #16]
-	ldr	r4, [r1, #8]
-	str	r4, [sp, #12]
-	ldr	r4, [r1, #4]
-	str	r4, [sp, #8]
-	ldr	r1, [r1]
-	str	r1, [sp, #4]
-	ldr	r1, .L1520+24
-	ldr	r1, [r1]
-	ldr	r1, [r1, r0]
-	ldr	r0, .L1520+32
-	str	r1, [sp]
-	ldr	r1, [r5, #24]
+	ldrb	r0, [r6, #2]	@ zero_extendqisi2
+	ubfx	r0, r0, #3, #2
+	str	r0, [sp]
+	ldr	r0, .L1550+32
 	bl	printf
-.L1505:
-	ldr	r3, .L1520+36
-	mov	r0, #-1
-	ldrh	r2, [r8, #80]
+.L1453:
+	ldrb	r3, [r6, #2]	@ zero_extendqisi2
+	lsls	r0, r3, #28
+	bpl	.L1454
+	and	r2, r3, #192
+	cmp	r2, #64
+	bne	.L1455
+	ldr	r3, .L1550+4
+	movs	r2, #1
 	movs	r1, #0
 	ldr	r3, [r3]
-	strh	r1, [r3, r2, lsl #1]	@ movhi
-.L1495:
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1500:
-	cmp	r1, #2
-	itett	eq
-	addeq	r3, r3, #-1
-	addne	r3, r3, r2
-	addeq	r3, r3, r2
-	addeq	r3, r3, r6
-	it	eq
-	orreq	r3, r3, #33554432
-	b	.L1519
-.L1504:
-	ldrh	r3, [r4, #18]
-	adds	r6, r6, #1
-	adds	r3, r3, #1
-	strh	r3, [r4, #18]	@ movhi
-.L1509:
-	ldrh	r3, [r4, #16]
-	cmp	r6, r3
-	ble	.L1507
-	adds	r7, r7, #1
-	add	r10, r10, #2
-	b	.L1498
-.L1508:
-.L1506:
-	ldrh	r3, [r4, #12]
-	movs	r0, #0
-	adds	r3, r3, #1
-	strh	r3, [r4, #12]	@ movhi
-	b	.L1495
-.L1521:
-	.align	2
-.L1520:
-	.word	.LANCHOR60
-	.word	.LANCHOR59
-	.word	.LANCHOR122
-	.word	.LC0
-	.word	.LANCHOR64
-	.word	.LANCHOR107
-	.word	.LANCHOR108
-	.word	.LANCHOR22
-	.word	.LC56
-	.word	.LANCHOR56
-	.word	.LANCHOR75
-	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
-	.section	.text.flash_prog_page,"ax",%progbits
-	.align	1
-	.global	flash_prog_page
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	flash_prog_page, %function
-flash_prog_page:
-	@ args = 4, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	fp, r3
-	ldr	r3, .L1530
-	mov	r5, r0
-	mov	r6, r1
-	mov	r10, r2
-	ubfx	r8, r1, #0, #21
-	ubfx	r7, r1, #24, #2
-	ldr	r4, [r3]
-	add	r3, r0, #8
-	add	r3, r4, r3, lsl #8
-	str	r3, [sp, #4]
-	ldr	r3, .L1530+4
+	ldrh	r0, [r3, #584]
+	bl	gc_add_sblk
+	ldr	r3, .L1550+28
+	movs	r2, #1
+	strh	r2, [r3, #314]	@ movhi
+.L1454:
+	ldr	r3, .L1550+16
 	ldr	r3, [r3]
-	lsls	r3, r3, #27
-	bpl	.L1523
-	ldr	r3, [sp, #40]
-	mov	r2, r7
-	ldr	r0, .L1530+8
-	bl	printf
-.L1523:
-	bl	nandc_wait_flash_ready
-	mov	r0, r5
-	bl	hynix_reconfig_rr_para
-	mov	r0, r5
-	bl	nandc_cs
-	mov	r0, r5
-	cbnz	r7, .L1524
-	bl	flash_enter_slc_mode
-.L1525:
-	add	r4, r4, r5, lsl #8
-	movs	r3, #128
-	uxtb	r6, r6
-	mov	r0, r8
-	str	r3, [r4, #2056]
-	movs	r3, #0
-	str	r3, [r4, #2052]
-	str	r3, [r4, #2052]
-	lsr	r3, r8, #8
-	str	r6, [r4, #2052]
-	str	r3, [r4, #2052]
-	lsr	r3, r8, #16
-	str	r3, [r4, #2052]
-	bl	nandc_set_seed
-	ldr	r1, .L1530+12
-	mov	r2, r10
-	mov	r3, fp
-	movs	r0, #1
-	ldrb	r1, [r1, #9]	@ zero_extendqisi2
-	bl	nandc_xfer_start
-	bl	nandc_xfer_done
-	movs	r3, #16
-	str	r3, [r4, #2056]
-	bl	nandc_wait_flash_ready
-	ldr	r0, [sp, #4]
-	bl	flash_read_status
-	mov	r4, r0
-	cbnz	r7, .L1526
-	mov	r0, r5
-	bl	flash_exit_slc_mode
-.L1526:
-	mov	r0, r5
-	bl	nandc_de_cs
-	and	r0, r4, #4
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1524:
-	bl	flash_exit_slc_mode
-	b	.L1525
-.L1531:
-	.align	2
-.L1530:
-	.word	.LANCHOR6
-	.word	.LANCHOR22
-	.word	.LC57
-	.word	.LANCHOR19
-	.size	flash_prog_page, .-flash_prog_page
-	.section	.text.flash_test_blk,"ax",%progbits
-	.align	1
-	.global	flash_test_blk
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	flash_test_blk, %function
-flash_test_blk:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	mov	r5, r1
-	mov	r4, r0
-	cbnz	r0, .L1533
-	ldr	r3, .L1550
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, r1
-	bhi	.L1537
-.L1533:
-	ldr	r6, .L1550+4
-	movs	r2, #32
-	ldr	r7, .L1550+8
-	movs	r1, #165
-	ldr	r0, [r6]
-	bl	ftl_memset
-	movs	r2, #8
-	movs	r1, #90
-	ldr	r0, [r7]
-	bl	ftl_memset
+	lsls	r1, r3, #21
+	bpl	.L1456
 	ldr	r3, .L1550+12
-	mov	r0, r4
-	ldrh	r3, [r3]
-	muls	r5, r3, r5
-	mov	r1, r5
-	bl	flash_erase_block
-	adds	r0, r0, #1
-	beq	.L1535
-	ldr	r8, .L1550+16
-	mov	r1, r5
-	mov	r0, r4
-	ldrb	r3, [r8, #9]	@ zero_extendqisi2
-	str	r3, [sp]
-	ldr	r2, [r7]
-	ldr	r3, [r6]
-	bl	flash_prog_page
-	adds	r0, r0, #1
-	beq	.L1535
-	ldrb	r3, [r8, #9]	@ zero_extendqisi2
+	ldr	r0, .L1550+20
+	ldr	r2, [r3]
+	ldr	r0, [r0]
+	ldr	r3, [r2, r5, lsl #2]
+	ldrh	r0, [r0, r5, lsl #1]
+	add	r1, r2, r5, lsl #2
+	ldrh	r2, [r2, r5, lsl #2]
+	ubfx	r3, r3, #11, #8
+	str	r0, [sp, #12]
+	ldrb	r0, [r1, #3]	@ zero_extendqisi2
+	ubfx	r2, r2, #0, #11
+	str	r0, [sp, #8]
+	ldrb	r0, [r1, #2]	@ zero_extendqisi2
+	lsrs	r0, r0, #5
+	str	r0, [sp, #4]
+	ldrb	r1, [r1, #2]	@ zero_extendqisi2
+	ldr	r0, .L1550+36
+	ubfx	r1, r1, #3, #2
+	str	r1, [sp]
 	mov	r1, r5
-	mov	r0, r4
-	str	r3, [sp]
-	ldr	r2, [r7]
-	ldr	r3, [r6]
-	bl	flash_read_page
-	cmp	r0, #-1
-	mov	r8, r0
-	beq	.L1535
-	ldr	r3, [r7]
-	ldr	r3, [r3]
-	cmp	r3, #1515870810
-	bne	.L1535
-	ldr	r3, [r6]
+	bl	printf
+.L1456:
+	ldr	r3, .L1550+16
 	ldr	r3, [r3]
-	cmp	r3, #-1515870811
-	beq	.L1536
-.L1535:
-	mov	r8, #-1
-.L1536:
+	lsls	r2, r3, #21
+	bpl	.L1457
+	ldr	r3, .L1550+12
+	ldr	r0, [sp, #20]
+	ldr	r5, [sp, #20]
+	ldr	r2, [r3]
+	ldr	r3, [sp, #20]
+	add	r1, r2, r3, lsl #2
+	ldr	r3, [r2, r3, lsl #2]
+	ldrh	r2, [r2, r0, lsl #2]
+	ldr	r0, .L1550+20
+	ubfx	r3, r3, #11, #8
+	ubfx	r2, r2, #0, #11
+	ldr	r0, [r0]
+	ldrh	r0, [r0, r5, lsl #1]
+	str	r0, [sp, #12]
+	ldrb	r0, [r1, #3]	@ zero_extendqisi2
+	str	r0, [sp, #8]
+	ldrb	r0, [r1, #2]	@ zero_extendqisi2
+	lsrs	r0, r0, #5
+	str	r0, [sp, #4]
+	ldrb	r1, [r1, #2]	@ zero_extendqisi2
+	ldr	r0, .L1550+40
+	ubfx	r1, r1, #3, #2
+	str	r1, [sp]
 	mov	r1, r5
-	mov	r0, r4
-	bl	flash_erase_block
-	mov	r0, r8
-.L1532:
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, pc}
-.L1537:
-	b	.L1532
-.L1551:
-	.align	2
-.L1550:
-	.word	.LANCHOR123
-	.word	.LANCHOR118
-	.word	.LANCHOR119
-	.word	.LANCHOR13
-	.word	.LANCHOR19
-	.size	flash_test_blk, .-flash_test_blk
-	.section	.text.flash_start_tlc_page_prog,"ax",%progbits
-	.align	1
-	.global	flash_start_tlc_page_prog
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	flash_start_tlc_page_prog, %function
-flash_start_tlc_page_prog:
-	@ args = 12, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r7, r2
-	ldr	r2, .L1559
-	add	r5, sp, #40
-	mov	r4, r0
-	mov	fp, r1
-	ldm	r5, {r5, r8, r10}
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cmp	r2, r3
-	bhi	.L1553
-	movw	r2, #655
-	ldr	r1, .L1559+4
-	ldr	r0, .L1559+8
 	bl	printf
-.L1554:
-	b	.L1554
-.L1553:
-	ldr	r2, .L1559+12
-	ldrb	r6, [r2, r3]	@ zero_extendqisi2
-	ldr	r3, .L1559+16
-	mov	r0, r6
-	ldr	r2, [r3]
-	str	r2, [sp, #4]
-	bl	nandc_cs
-	lsls	r3, r6, #8
-	ldr	r2, [sp, #4]
-	cbz	r4, .L1555
-	adds	r1, r2, r3
-	str	r4, [r1, #2056]
-.L1555:
-	adds	r4, r2, r3
-	movs	r3, #128
-	str	fp, [r4, #2056]
-	str	r3, [r4, #2056]
-	movs	r3, #0
-	str	r3, [r4, #2052]
-	str	r3, [r4, #2052]
-	uxtb	r3, r5
-	str	r3, [r4, #2052]
-	lsrs	r3, r5, #8
-	str	r3, [r4, #2052]
-	lsrs	r3, r5, #16
-	add	r5, r5, r5, lsl #1
-	str	r3, [r4, #2052]
-	subs	r0, r5, #1
-	add	r0, r0, fp
-	bl	nandc_set_seed
-	ldr	r1, .L1559+20
-	mov	r3, r10
-	mov	r2, r8
-	movs	r0, #1
-	ldrb	r1, [r1, #9]	@ zero_extendqisi2
-	bl	nandc_xfer_start
-	bl	nandc_xfer_done
-	str	r7, [r4, #2056]
-	mov	r0, r6
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
-	b	nandc_de_cs
-.L1560:
+.L1457:
+	ldr	r6, .L1550
+	ldrh	r3, [sp, #16]
+	ldr	r1, [sp, #24]
+	ldr	r5, [r6]
+	ldr	r0, [sp, #32]
+	strh	r3, [r5, #96]	@ movhi
+	strh	r8, [r5, #98]	@ movhi
+	strh	r4, [r5, #92]	@ movhi
+	strh	fp, [r5, #94]	@ movhi
+	bl	__aeabi_uidiv
+	ldr	r1, [sp, #28]
+	mov	r7, r0
+	strh	r0, [r5, #88]	@ movhi
+	ldr	r0, [sp, #36]
+	bl	__aeabi_uidiv
+	strh	r0, [r5, #90]	@ movhi
+	ldr	r5, .L1550+16
+	ldr	r3, [r5]
+	lsls	r3, r3, #21
+	bpl	.L1458
+	uxth	r0, r0
+	uxth	r3, r7
+	ldr	r2, [sp, #28]
+	str	r0, [sp]
+	ldr	r1, [sp, #24]
+	ldr	r0, .L1550+44
+	bl	printf
+.L1458:
+	ldr	r3, [r5]
+	ldr	r5, .L1550+48
+	tst	r3, #1024
+	beq	.L1459
+	ldrh	r3, [r5]
+	mov	r2, fp
+	mov	r1, r4
+	ldr	r0, .L1550+52
+	str	r3, [sp, #8]
+	ldr	r3, .L1550+56
+	ldrh	r3, [r3]
+	str	r8, [sp]
+	str	r3, [sp, #4]
+	ldr	r3, [sp, #16]
+	bl	printf
+.L1459:
+	sub	r3, r8, fp
+	str	r3, [sp, #20]
+	ldr	r2, [sp, #20]
+	ldrh	r3, [r5]
+	cmp	r2, r3
+	bgt	.L1460
+	ldr	r2, .L1550+56
+	ldr	r3, [sp, #16]
+	ldrh	r2, [r2]
+	subs	r3, r3, r4
+	cmp	r3, r2
+	ble	.L1488
+.L1460:
+	ldr	r3, .L1550+4
+	mov	r8, #0
+	mov	r7, r8
+	ldr	r3, [r3]
+	ldrh	r5, [r3, #580]
+	ldr	r3, [r6]
+	ldrh	r10, [r3, #134]
+.L1462:
+	ldr	r3, .L1550+8
+	ldrh	r3, [r3]
+	cmp	r10, r3
+	bcc	.L1472
+.L1471:
+	ldr	r3, .L1550+4
+	ldr	r3, [r3]
+	str	r5, [r3, #580]
+.L1461:
+	cmp	fp, #0
+	beq	.L1474
+	ldr	r3, .L1550
+	ldr	r1, [r3]
+	ldr	r3, .L1550+8
+	ldrh	r2, [r1, #134]
+	ldrh	r6, [r3]
+	ldr	r3, .L1550+12
+	ldr	r3, [r3]
+	add	r3, r3, r2, lsl #2
+	b	.L1551
+.L1552:
 	.align	2
-.L1559:
-	.word	.LANCHOR8
-	.word	.LANCHOR124
-	.word	.LC0
+.L1550:
+	.word	.LANCHOR102
 	.word	.LANCHOR10
 	.word	.LANCHOR6
-	.word	.LANCHOR19
-	.size	flash_start_tlc_page_prog, .-flash_start_tlc_page_prog
-	.section	.text.queue_tlc_prog_cmd,"ax",%progbits
-	.align	1
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	queue_tlc_prog_cmd, %function
-queue_tlc_prog_cmd:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, lr}
-	mov	r4, r0
-	ldr	r3, [r0]
-	movs	r1, #1
-	ldr	r2, [r3, #12]
-	ldr	r5, [r3, #24]
-	ldrb	r0, [r3, #44]	@ zero_extendqisi2
-	str	r2, [sp, #8]
-	movs	r2, #26
-	ldr	r3, [r3, #4]
-	ubfx	r6, r5, #0, #21
-	ubfx	r5, r5, #21, #3
-	str	r6, [sp]
-	str	r3, [sp, #4]
-	mov	r3, r5
-	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldm	r4, {r2, r3}
-	movs	r1, #2
-	ldrb	r0, [r2, #44]	@ zero_extendqisi2
-	ldr	r2, [r3, #12]
-	str	r2, [sp, #8]
-	movs	r2, #26
-	ldr	r3, [r3, #4]
-	str	r6, [sp]
-	str	r3, [sp, #4]
-	mov	r3, r5
-	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldr	r3, [r4, #8]
-	movs	r1, #3
-	ldr	r2, [r4]
-	ldrb	r0, [r2, #44]	@ zero_extendqisi2
-	ldr	r2, [r3, #12]
-	str	r2, [sp, #8]
-	movs	r2, #16
-	ldr	r3, [r3, #4]
-	str	r6, [sp]
-	str	r3, [sp, #4]
-	mov	r3, r5
-	bl	flash_start_tlc_page_prog
-	ldr	r1, [r4]
-	movs	r3, #4
-	ldr	r0, .L1562
-	strb	r3, [r1, #42]
-	movs	r3, #1
-	strb	r3, [r1, #43]
-	movs	r3, #255
-	strb	r3, [r1]
-	add	sp, sp, #16
+	.word	.LANCHOR7
+	.word	.LANCHOR14
+	.word	.LANCHOR9
+	.word	.LC80
+	.word	.LANCHOR63
+	.word	.LC81
+	.word	.LC82
+	.word	.LC83
+	.word	.LC84
+	.word	.LANCHOR144
+	.word	.LC85
+	.word	.LANCHOR145
+.L1551:
+.L1475:
+	cmp	r2, r6
+	bcc	.L1477
+	ldrh	r3, [r1, #72]
+	add	r3, r3, fp
+	strh	r3, [r1, #72]	@ movhi
+	ldrh	r3, [r1, #98]
+	cmp	fp, r3
+	itt	cc
+	subcc	r3, r3, fp
+	strhcc	r3, [r1, #98]	@ movhi
+.L1474:
+	cbz	r4, .L1480
+	ldr	r3, .L1553
+	ldr	r1, [r3]
+	ldr	r3, .L1553+4
+	ldrh	r2, [r1, #134]
+	ldrh	ip, [r3]
+	ldr	r3, .L1553+8
+	ldr	r3, [r3]
+	add	r3, r3, r2, lsl #2
+.L1481:
+	cmp	r2, ip
+	bcc	.L1483
+	ldrh	r3, [r1, #74]
+	add	r3, r3, r4
+	strh	r3, [r1, #74]	@ movhi
+	ldrh	r3, [r1, #96]
+	cmp	r4, r3
+	itt	cc
+	subcc	r4, r3, r4
+	strhcc	r4, [r1, #96]	@ movhi
+.L1480:
+	movs	r1, #5
+	movs	r0, #0
+	bl	zftl_get_gc_node
+	movw	r2, #65535
+	cmp	r0, r2
+	beq	.L1437
+	ldr	r2, .L1553+12
+	ldr	r3, .L1553+16
+	ldr	r2, [r2]
+	ldrh	r3, [r3]
+	ldrh	r2, [r2, r0, lsl #1]
+	cmp	r2, r3
+	bhi	.L1437
+	adds	r7, r7, #1
+	movs	r2, #1
+	movs	r1, #0
+	bl	gc_add_sblk
+.L1437:
+	add	r0, r7, r8
+	add	sp, sp, #40
 	@ sp needed
-	pop	{r4, r5, r6, lr}
-	b	buf_add_tail
-.L1563:
-	.align	2
-.L1562:
-	.word	.LANCHOR90
-	.size	queue_tlc_prog_cmd, .-queue_tlc_prog_cmd
-	.section	.text.sblk_tlc_prog_one_page,"ax",%progbits
-	.align	1
-	.global	sblk_tlc_prog_one_page
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	sblk_tlc_prog_one_page, %function
-sblk_tlc_prog_one_page:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, [r0]
-	push	{r4, r5, r6, lr}
-	mov	r5, r0
-	ldr	r6, [r3, #24]
-.L1565:
-	movs	r1, #1
-	mov	r0, r6
-	bl	queue_lun_state
-	mov	r4, r0
-	cbnz	r0, .L1566
-	mov	r0, r5
-	bl	queue_tlc_prog_cmd
-	mov	r0, r4
-	pop	{r4, r5, r6, pc}
-.L1566:
-	bl	queue_wait_first_req_completed
-	bl	queue_remove_completed_req
-	b	.L1565
-	.size	sblk_tlc_prog_one_page, .-sblk_tlc_prog_one_page
-	.section	.text.sblk_xlc_prog_pages,"ax",%progbits
-	.align	1
-	.global	sblk_xlc_prog_pages
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	sblk_xlc_prog_pages, %function
-sblk_xlc_prog_pages:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, [r0]
-	push	{r4, r5, r6, r7, r8, r10, lr}
-	mov	r4, r0
-	sub	sp, sp, #20
-	mov	r7, r1
-	mov	r10, r2
-	ldr	r5, [r3, #24]
-.L1568:
-	movs	r1, #1
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1449:
+	ldr	r3, .L1553+8
+	lsls	r1, r6, #2
+	ldr	r0, [r3]
+	add	ip, r0, r1
+	ldrb	r3, [ip, #2]	@ zero_extendqisi2
+	and	r2, r3, #224
+	cmp	r2, #224
+	beq	.L1439
+	ubfx	lr, r3, #3, #2
+	tst	lr, #1
+	beq	.L1440
+	ldrh	r3, [r0, r1]
+	ldr	r2, [r0, r1]
+	ubfx	r3, r3, #0, #11
+	ubfx	r2, r2, #11, #8
+.L1441:
+	ldr	r7, [sp, #24]
+	cmp	r4, r3
+	add	r10, r7, #1
+	uxth	r7, r10
+	str	r7, [sp, #24]
+	ldr	r7, [sp, #32]
+	add	r7, r7, r3
+	str	r7, [sp, #32]
+	bls	.L1486
+	ldr	r4, .L1553+20
+	ldr	r4, [r4]
+	strh	r6, [r4, #586]	@ movhi
+	mov	r4, r3
+.L1486:
+	ldr	r7, [sp, #16]
+	movw	r10, #65535
+	cmp	r7, r3
+	itt	cc
+	movcc	r5, r6
+	strcc	r3, [sp, #16]
+	cmp	r2, r10
+	bne	.L1443
+.L1445:
+	cmp	r3, #9
+	bls	.L1448
+.L1439:
+	adds	r6, r6, #1
+	uxth	r6, r6
+	b	.L1438
+.L1440:
+	tst	r3, #24
+	bne	.L1442
+	ldrh	r3, [r0, r1]
+	movw	r2, #65535
+	ubfx	r3, r3, #0, #11
+	b	.L1441
+.L1442:
+	ldr	r3, [r0, r1]
+	ubfx	r2, r3, #11, #8
+	movw	r3, #65535
+.L1443:
+	ldr	r7, [sp, #28]
+	cmp	fp, r2
+	it	hi
+	movhi	fp, r2
+	add	r10, r7, #1
+	uxth	r7, r10
+	it	hi
+	ldrhi	r10, .L1553+20
+	str	r7, [sp, #28]
+	it	hi
+	ldrhi	r10, [r10]
+	ldr	r7, [sp, #36]
+	it	hi
+	strhhi	r6, [r10, #584]	@ movhi
+	cmp	r8, r2
+	itt	cc
+	strcc	r6, [sp, #20]
+	movcc	r8, r2
+	cmp	r2, #9
+	add	r7, r7, r2
+	str	r7, [sp, #36]
+	bhi	.L1445
+.L1448:
+	ldr	r3, .L1553+24
+	ldr	r3, [r3]
+	lsls	r7, r3, #23
+	bpl	.L1439
+	ldr	r3, [r0, r1]
+	ldrh	r2, [r0, r1]
+	ldr	r1, .L1553+12
+	ubfx	r3, r3, #11, #8
+	ldr	r0, .L1553+28
+	ubfx	r2, r2, #0, #11
+	ldr	r1, [r1]
+	ldrh	r1, [r1, r6, lsl #1]
+	str	r1, [sp, #12]
+	ldrb	r1, [ip, #3]	@ zero_extendqisi2
+	str	r1, [sp, #8]
+	ldrb	r1, [ip, #2]	@ zero_extendqisi2
+	str	lr, [sp]
+	lsrs	r1, r1, #5
+	str	r1, [sp, #4]
+	mov	r1, r6
+	bl	printf
+	b	.L1439
+.L1452:
+	tst	r3, #224
+	bne	.L1451
+	ldr	r3, [r6]
+	movw	r2, #65535
+	ldrh	r10, [r3, #590]
+	cmp	r10, r2
+	bne	.L1451
+	ldrh	r0, [r3, #586]
+	ldrh	r3, [r3, #588]
+	cmp	r3, r0
+	beq	.L1451
+	bl	zftl_remove_free_node
+	ldr	r3, [r6]
+	ldrh	r2, [r3, #586]
+	strh	r10, [r3, #586]	@ movhi
+	strh	r2, [r3, #590]	@ movhi
+	b	.L1451
+.L1455:
+	tst	r3, #224
+	bne	.L1454
+	ldr	r10, .L1553+20
+	movw	r2, #65535
+	ldr	r3, [r10]
+	ldrh	r6, [r3, #588]
+	cmp	r6, r2
+	bne	.L1454
+	ldrh	r0, [r3, #584]
+	ldrh	r3, [r3, #590]
+	cmp	r3, r0
+	beq	.L1454
+	bl	zftl_remove_free_node
+	ldr	r3, [r10]
+	ldrh	r2, [r3, #584]
+	strh	r6, [r3, #584]	@ movhi
+	strh	r2, [r3, #588]	@ movhi
+	b	.L1454
+.L1472:
+	adds	r5, r5, #1
+	uxth	r5, r5
+	cmp	r3, r5
+	it	ls
+	movls	r5, #0
+	ldr	r3, .L1553+8
+	lsls	r6, r5, #2
+	ldr	r3, [r3]
+	adds	r2, r3, r6
+	ldrb	r2, [r2, #2]	@ zero_extendqisi2
+	tst	r2, #192
+	beq	.L1464
+	and	r0, r2, #224
+	cmp	r0, #224
+	beq	.L1464
+	ubfx	r2, r2, #3, #2
+	ands	r1, r2, #1
+	beq	.L1465
+	cmp	r0, #160
+.L1548:
+	bne	.L1467
+	ldr	r2, .L1553+32
+	ldr	r0, [sp, #20]
+	ldrh	r2, [r2]
+	cmp	r0, r2
+	ble	.L1468
+	ldr	r2, [r3, r6]
+	ubfx	r2, r2, #11, #8
+	cmp	r2, fp
+	bls	.L1469
+	cbz	r1, .L1468
+	ldrh	r2, [r3, r6]
+	ubfx	r2, r2, #0, #11
+	cmp	r2, r4
+	bgt	.L1468
+.L1469:
+	movs	r2, #1
+	movs	r1, #0
 	mov	r0, r5
-	bl	queue_lun_state
-	cmp	r0, #0
-	bne	.L1569
-	cmp	r10, #2
-	bne	.L1570
-	ldr	r2, [r7]
-	movs	r1, #1
-	ldr	r3, [r4]
-	ldr	r6, [r2, #24]
-	ldr	r2, [r3, #12]
-	ldr	r5, [r3, #24]
-	ldrb	r0, [r3, #44]	@ zero_extendqisi2
-	ubfx	r6, r6, #0, #21
-	str	r2, [sp, #8]
-	movs	r2, #17
-	ldr	r3, [r3, #4]
-	ubfx	r8, r5, #0, #21
-	ubfx	r5, r5, #21, #3
-	str	r8, [sp]
+	str	r3, [sp, #24]
+	bl	gc_add_sblk
+	ldr	r0, .L1553+36
+	movs	r2, #1
+	add	r7, r7, r2
+	ldr	r3, [sp, #24]
+	strh	r2, [r0, #314]	@ movhi
+	ldr	r2, .L1553+24
+	ldr	r2, [r2]
+	tst	r2, #1024
+	beq	.L1468
+	ldr	r2, .L1553+12
+	ldr	r1, [r3, r6]
+	ldr	r2, [r2]
+	ubfx	r1, r1, #11, #8
+	ldrh	ip, [r2, r5, lsl #1]
+	ldr	r2, .L1553+8
+	ldr	r2, [r2]
+	add	r2, r2, r6
+	ldrb	r2, [r2, #2]	@ zero_extendqisi2
+	str	r1, [sp, #8]
+	ldrh	r1, [r3, r6]
+	lsrs	r2, r2, #5
+	ubfx	r1, r1, #0, #11
+	str	r1, [sp, #4]
+	mov	r1, r5
+	ldrh	r3, [r0, #52]
+	ldr	r0, .L1553+40
+	str	r3, [sp]
+	mov	r3, ip
+.L1549:
+	bl	printf
+.L1468:
+	cmp	r7, #4
+	bhi	.L1471
+	cmp	r8, #4
+	bhi	.L1471
+.L1464:
+	add	r10, r10, #1
+	uxth	r10, r10
+	b	.L1462
+.L1465:
+	cmp	r2, #2
+	b	.L1548
+.L1554:
+	.align	2
+.L1553:
+	.word	.LANCHOR102
+	.word	.LANCHOR6
+	.word	.LANCHOR7
+	.word	.LANCHOR9
+	.word	.LANCHOR85
+	.word	.LANCHOR10
+	.word	.LANCHOR14
+	.word	.LC79
+	.word	.LANCHOR144
+	.word	.LANCHOR63
+	.word	.LC86
+.L1467:
+	ldr	r0, .L1555
+	ldr	r2, [sp, #16]
+	ldrh	r0, [r0]
+	subs	r2, r2, r4
+	cmp	r2, r0
+	ble	.L1468
+	ldrh	r2, [r3, r6]
+	add	r0, r4, #8
+	ubfx	r2, r2, #0, #11
+	cmp	r2, r0
+	ble	.L1470
+	cmp	r1, #0
+	beq	.L1468
+	ldr	r2, [r3, r6]
+	add	r1, fp, #4
+	ubfx	r2, r2, #11, #8
+	cmp	r2, r1
+	bgt	.L1468
+.L1470:
+	movs	r2, #1
+	movs	r1, #0
+	mov	r0, r5
+	str	r3, [sp, #24]
+	bl	gc_add_sblk
+	ldr	r0, .L1555+4
+	movs	r2, #1
+	add	r8, r8, r2
+	ldr	r3, [sp, #24]
+	strh	r2, [r0, #314]	@ movhi
+	ldr	r2, .L1555+8
+	ldr	r2, [r2]
+	tst	r2, #1024
+	beq	.L1468
+	ldr	r2, .L1555+12
+	ldr	r1, [r3, r6]
+	ldr	r2, [r2]
+	ubfx	r1, r1, #11, #8
+	ldrh	ip, [r2, r5, lsl #1]
+	ldr	r2, .L1555+16
+	ldr	r2, [r2]
+	add	r2, r2, r6
+	ldrb	r2, [r2, #2]	@ zero_extendqisi2
+	str	r1, [sp, #8]
+	ldrh	r1, [r3, r6]
+	lsrs	r2, r2, #5
+	ubfx	r1, r1, #0, #11
+	str	r1, [sp, #4]
+	mov	r1, r5
+	ldrh	r3, [r0, #52]
+	ldr	r0, .L1555+20
+	str	r3, [sp]
+	mov	r3, ip
+	b	.L1549
+.L1488:
+	mov	r8, #0
+	mov	r7, r8
+	b	.L1461
+.L1477:
+	ldr	r0, [r3]
+	ubfx	r5, r0, #11, #8
+	cmp	fp, r5
+	bhi	.L1476
+	ldrb	ip, [r3, #2]	@ zero_extendqisi2
+	tst	ip, #24
+	ittt	ne
+	subne	r5, r5, fp
+	bfine	r0, r5, #11, #8
+	strne	r0, [r3]
+.L1476:
+	adds	r2, r2, #1
+	adds	r3, r3, #4
+	uxth	r2, r2
+	b	.L1475
+.L1483:
+	ldrh	r0, [r3]
+	ubfx	r5, r0, #0, #11
+	cmp	r5, r4
+	blt	.L1482
+	ldrb	r6, [r3, #2]	@ zero_extendqisi2
+	and	r6, r6, #24
+	cmp	r6, #16
+	ittt	ne
+	subne	r5, r5, r4
+	bfine	r0, r5, #0, #11
+	strhne	r0, [r3]	@ movhi
+.L1482:
+	adds	r2, r2, #1
+	adds	r3, r3, #4
+	uxth	r2, r2
+	b	.L1481
+.L1487:
+	mov	r8, #0
+	mov	r7, r8
+	b	.L1437
+.L1556:
+	.align	2
+.L1555:
+	.word	.LANCHOR145
+	.word	.LANCHOR63
+	.word	.LANCHOR14
+	.word	.LANCHOR9
+	.word	.LANCHOR7
+	.word	.LC87
+	.size	gc_static_wearleveling, .-gc_static_wearleveling
+	.section	.text.zftl_sblk_list_init,"ax",%progbits
+	.align	1
+	.global	zftl_sblk_list_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	zftl_sblk_list_init, %function
+zftl_sblk_list_init:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r2, #6
+	ldr	r8, .L1585+76
+	sub	sp, sp, #24
+	movs	r1, #0
+	movs	r4, #0
+	ldr	fp, .L1585+80
+	ldrh	r3, [r8]
+	ldr	r5, .L1585
+	ldr	r0, [fp]
+	ldr	r10, .L1585+64
+	muls	r2, r3, r2
+	ldr	r7, .L1585+4
+	ldr	r6, .L1585+8
+	bl	ftl_memset
+	ldr	r3, .L1585+12
+	movs	r2, #16
+	ldr	r1, .L1585+16
+	mov	r0, #32768
+	strh	r4, [r10]	@ movhi
+	str	r4, [r3]
+	ldr	r3, .L1585+20
+	ldrh	r1, [r1]
+	strh	r4, [r7]	@ movhi
+	str	r4, [r3]
+	ldr	r3, .L1585+24
+	strh	r4, [r6]	@ movhi
+	str	r4, [r3]
+	ldr	r3, .L1585+28
+	str	r4, [r3]
+	ldr	r3, .L1585+32
+	str	r4, [r3]
+	ldr	r3, .L1585+36
+	str	r4, [r3]
+	ldr	r3, .L1585+40
+	strh	r2, [r3]	@ movhi
+	ldr	r2, .L1585+44
+	ldr	r3, .L1585+48
+	strh	r4, [r2]	@ movhi
+	ldr	r2, .L1585+52
+	strh	r4, [r3]	@ movhi
 	str	r3, [sp, #4]
-	mov	r3, r5
-	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldr	r3, [r7]
-	movs	r1, #1
-	ldr	r2, [r4]
-	ldrb	r0, [r2, #44]	@ zero_extendqisi2
-	ldr	r2, [r3, #12]
-	str	r2, [sp, #8]
-	movs	r2, #26
-	ldr	r3, [r3, #4]
-	str	r6, [sp]
+	strh	r4, [r2]	@ movhi
+	ldrb	r2, [r5]	@ zero_extendqisi2
+	muls	r1, r2, r1
+	bl	__aeabi_idiv
+	ldr	r2, .L1585+56
+	sxth	r3, r0
+	str	fp, [sp, #12]
+	mov	fp, r10
+	str	r3, [sp]
+	ldr	r1, [r2]
+	ldr	r3, [sp, #4]
+	ldr	r10, .L1585+84
+	strh	r4, [r1, #146]	@ movhi
+	ldrsh	r4, [r1, #134]
+	str	r8, [sp, #8]
+	mov	r8, r3
+	str	r2, [sp, #16]
+	str	r5, [sp, #20]
+.L1558:
+	ldr	r3, [sp, #8]
+	ldrh	r3, [r3]
+	cmp	r4, r3
+	blt	.L1574
+	ldr	r3, [sp, #16]
+	ldrh	r2, [r8]
+	ldr	r3, [r3]
+	strh	r2, [r3, #114]	@ movhi
+	ldrh	r2, [r7]
+	strh	r2, [r3, #118]	@ movhi
+	ldrh	r2, [r6]
+	strh	r2, [r3, #116]	@ movhi
+	ldrh	r2, [fp]
+	strh	r2, [r3, #122]	@ movhi
+	ldr	r2, .L1585+44
+	ldrh	r2, [r2]
+	strh	r2, [r3, #120]	@ movhi
+	ldr	r2, .L1585+52
+	ldrh	r2, [r2]
+	strh	r2, [r3, #124]	@ movhi
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1574:
+	ldr	r5, [r10]
+	add	r5, r5, r4, lsl #2
+	ldrb	r0, [r5, #3]	@ zero_extendqisi2
+	cmp	r0, #0
+	beq	.L1575
+	ldr	r3, [sp, #20]
+	ldrb	lr, [r3]	@ zero_extendqisi2
+	ldr	r3, .L1585+56
+	ldr	ip, [r3]
+	ldr	r3, .L1585+16
+	ldrh	r3, [r3]
 	str	r3, [sp, #4]
-	mov	r3, r5
-	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldm	r4, {r2, r3}
-	mov	r1, r10
-	ldrb	r0, [r2, #44]	@ zero_extendqisi2
-	ldr	r2, [r3, #12]
-	str	r2, [sp, #8]
-	movs	r2, #17
-	ldr	r3, [r3, #4]
-	str	r8, [sp]
-	str	r3, [sp, #4]
-	mov	r3, r5
-	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldr	r3, [r7, #4]
-	mov	r1, r10
-	ldr	r2, [r4]
-	ldrb	r0, [r2, #44]	@ zero_extendqisi2
-	ldr	r2, [r3, #12]
-	str	r2, [sp, #8]
-	movs	r2, #26
-	ldr	r3, [r3, #4]
-	str	r6, [sp]
-	str	r3, [sp, #4]
-	mov	r3, r5
-	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldr	r3, [r4, #8]
-	movs	r1, #3
-	ldr	r2, [r4]
-	ldrb	r0, [r2, #44]	@ zero_extendqisi2
-	ldr	r2, [r3, #12]
-	str	r2, [sp, #8]
-	movs	r2, #17
-	ldr	r3, [r3, #4]
-	str	r8, [sp]
-	str	r3, [sp, #4]
-	mov	r3, r5
-	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldr	r3, [r7, #8]
-	movs	r1, #3
-	ldr	r2, [r4]
-	ldrb	r0, [r2, #44]	@ zero_extendqisi2
-	ldr	r2, [r3, #12]
-	str	r2, [sp, #8]
-	movs	r2, #16
-	ldr	r3, [r3, #4]
-	str	r6, [sp]
-	str	r3, [sp, #4]
-	mov	r3, r5
-	bl	flash_start_tlc_page_prog
-	ldr	r1, [r4]
-	movs	r3, #5
-	ldr	r0, .L1572
-	strb	r3, [r1, #42]
-	movs	r3, #1
-	strb	r3, [r1, #43]
-	movs	r3, #255
-	strb	r3, [r1]
-	bl	buf_add_tail
-.L1571:
-	movs	r0, #0
-	add	sp, sp, #20
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, pc}
+	movs	r3, #0
+	mov	r1, r3
+.L1560:
+	cmp	r3, lr
+	blt	.L1563
+	cmp	r1, #0
+	beq	.L1564
+	mov	r0, #32768
+	bl	__aeabi_idiv
+	adds	r1, r0, #1
+	sxth	r1, r1
+.L1559:
+	ldr	r3, [sp, #12]
+	lsls	r0, r4, #1
+	adds	r2, r0, r4
+	ldr	r3, [r3]
+	add	ip, r3, r2, lsl #1
+	strh	r1, [ip, #4]	@ movhi
+	movw	r1, #65535
+	strh	r1, [ip, #2]	@ movhi
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	ldrb	r1, [r5, #2]	@ zero_extendqisi2
+	and	r3, r1, #224
+	cmp	r3, #32
+	beq	.L1565
+	cmp	r3, #224
+	beq	.L1565
+	ldr	r2, .L1585+60
+	ldr	r2, [r2]
+	ldrh	ip, [r2, #16]
+	cmp	r4, ip
+	beq	.L1565
+	ldrh	ip, [r2, #48]
+	cmp	r4, ip
+	beq	.L1565
+	ldrh	r2, [r2, #80]
+	cmp	r4, r2
+	beq	.L1565
+	cmp	r3, #64
+	bne	.L1566
+	ldr	r2, .L1585+64
+	uxth	r1, r4
+	ldr	r0, .L1585+32
+.L1583:
+	bl	_insert_data_list
+.L1565:
+	adds	r4, r4, #1
+	sxth	r4, r4
+	b	.L1558
+.L1563:
+	asr	r2, r0, r3
+	adds	r3, r3, #1
+	lsls	r2, r2, #31
+	itete	mi
+	ldrhmi	r2, [ip, #146]
+	ldrpl	r2, [sp, #4]
+	addmi	r2, r2, #1
+	addpl	r1, r1, r2
+	ite	mi
+	strhmi	r2, [ip, #146]	@ movhi
+	sxthpl	r1, r1
+	b	.L1560
+.L1564:
+	ldrb	r3, [r5, #2]	@ zero_extendqisi2
+	movw	r2, #65535
+	orr	r3, r3, #224
+	strb	r3, [r5, #2]
+	ldr	r3, .L1585+68
+	ldr	r3, [r3]
+	strh	r2, [r3, r4, lsl #1]	@ movhi
+	b	.L1559
+.L1575:
+	ldr	r1, [sp]
+	b	.L1559
+.L1566:
+	cmp	r3, #96
+	bne	.L1567
+	ldr	r2, .L1585+52
+	uxth	r1, r4
+	ldr	r0, .L1585+28
+	b	.L1583
+.L1567:
+	cmp	r3, #160
+	bne	.L1568
+	ldr	r2, .L1585+44
+	uxth	r1, r4
+	ldr	r0, .L1585+36
+	b	.L1583
+.L1568:
+	cmp	r3, #0
+	bne	.L1565
+	ldr	r3, .L1585+68
+	ldr	r3, [r3]
+	ldrh	r2, [r3, r0]
+	cbz	r2, .L1569
+	mov	r1, r4
+	ldr	r0, .L1585+72
+	bl	printf
+	ldrb	r3, [r5, #2]	@ zero_extendqisi2
+	movs	r1, #1
+	uxth	r0, r4
+	lsls	r2, r3, #27
+	ite	mi
+	movmi	r2, #5
+	movpl	r2, #2
+	bfi	r3, r2, #5, #3
+	movs	r2, #0
+	strb	r3, [r5, #2]
+	bl	gc_add_sblk
+	b	.L1565
 .L1569:
-	bl	queue_wait_first_req_completed
-	bl	queue_remove_completed_req
-	b	.L1568
-.L1570:
-	mov	r0, r4
-	bl	queue_tlc_prog_cmd
-	b	.L1571
-.L1573:
-	.align	2
+	ands	r3, r1, #24
+	uxth	r1, r4
+	bne	.L1572
+	ldr	r2, .L1585+48
+	ldr	r0, .L1585+12
+.L1584:
+	bl	_insert_free_list
+	b	.L1565
 .L1572:
-	.word	.LANCHOR90
-	.size	sblk_xlc_prog_pages, .-sblk_xlc_prog_pages
-	.section	.text.flash_start_page_prog,"ax",%progbits
-	.align	1
-	.global	flash_start_page_prog
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	flash_start_page_prog, %function
-flash_start_page_prog:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r8, r2
-	ldr	r2, .L1585
-	mov	r10, r3
-	ubfx	r3, r1, #21, #3
-	mov	r7, r0
-	mov	fp, r1
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cmp	r2, r3
-	bhi	.L1575
-	mov	r2, #692
-	ldr	r1, .L1585+4
-	ldr	r0, .L1585+8
-	bl	printf
-.L1576:
-	b	.L1576
-.L1575:
-	ldr	r2, .L1585+12
-	ubfx	r4, r1, #0, #21
-	ldrb	r6, [r2, r3]	@ zero_extendqisi2
-	ldr	r3, .L1585+16
-	mov	r0, r6
-	ldr	r5, [r3]
-	bl	hynix_reconfig_rr_para
-	mov	r0, r6
-	bl	nandc_cs
-	tst	fp, #50331648
-	bne	.L1577
-	ldr	r3, .L1585+20
-	ldr	r2, .L1585+24
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1578
-	ldrb	r3, [r2]	@ zero_extendqisi2
-	cbz	r3, .L1579
-.L1578:
-	ldr	r3, .L1585+28
-	mov	r0, r4
-	str	r2, [sp, #4]
-	ldrh	fp, [r3]
-	mov	r1, fp
-	bl	__aeabi_uidiv
-	mul	r3, fp, r0
-	mov	r1, fp
-	mov	r0, r4
-	str	r3, [sp]
-	bl	__aeabi_uidivmod
-	ldr	r2, [sp, #4]
-	ldr	r3, [sp]
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbz	r2, .L1580
-	add	r4, r3, r1, lsl #1
-.L1579:
-	mov	r0, r6
-	bl	flash_enter_slc_mode
-	b	.L1581
-.L1580:
-	ldr	r2, .L1585+32
-	ldrh	r4, [r2, r1, lsl #1]
-	add	r4, r4, r3
-.L1581:
-	add	r5, r5, r6, lsl #8
-	movs	r3, #128
-	mov	r0, r4
-	str	r3, [r5, #2056]
-	movs	r3, #0
-	str	r3, [r5, #2052]
-	str	r3, [r5, #2052]
-	uxtb	r3, r4
-	str	r3, [r5, #2052]
-	lsrs	r3, r4, #8
-	str	r3, [r5, #2052]
-	lsrs	r3, r4, #16
-	str	r3, [r5, #2052]
-	bl	nandc_set_seed
-	ldr	r1, .L1585+36
-	mov	r3, r10
-	mov	r2, r8
-	movs	r0, #1
-	ldrb	r1, [r1, #9]	@ zero_extendqisi2
-	bl	nandc_xfer_start
-	bl	nandc_xfer_done
-	str	r7, [r5, #2056]
-	mov	r0, r6
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
-	b	nandc_de_cs
-.L1577:
-	mov	r0, r6
-	bl	flash_exit_slc_mode
-	b	.L1581
+	cmp	r3, #16
+	ittee	eq
+	ldreq	r2, .L1585+4
+	ldreq	r0, .L1585+20
+	ldrne	r2, .L1585+8
+	ldrne	r0, .L1585+24
+	b	.L1584
 .L1586:
 	.align	2
 .L1585:
-	.word	.LANCHOR8
-	.word	.LANCHOR125
-	.word	.LC0
+	.word	.LANCHOR78
+	.word	.LANCHOR97
+	.word	.LANCHOR99
+	.word	.LANCHOR96
+	.word	.LANCHOR77
+	.word	.LANCHOR98
+	.word	.LANCHOR100
+	.word	.LANCHOR81
+	.word	.LANCHOR12
+	.word	.LANCHOR80
+	.word	.LANCHOR101
+	.word	.LANCHOR92
+	.word	.LANCHOR95
+	.word	.LANCHOR88
+	.word	.LANCHOR102
 	.word	.LANCHOR10
+	.word	.LANCHOR90
+	.word	.LANCHOR9
+	.word	.LC88
 	.word	.LANCHOR6
-	.word	.LANCHOR11
-	.word	.LANCHOR12
-	.word	.LANCHOR13
-	.word	.LANCHOR14
-	.word	.LANCHOR19
-	.size	flash_start_page_prog, .-flash_start_page_prog
-	.section	.text.queue_prog_cmd,"ax",%progbits
+	.word	.LANCHOR4
+	.word	.LANCHOR7
+	.size	zftl_sblk_list_init, .-zftl_sblk_list_init
+	.section	.text.ftl_open_sblk_init,"ax",%progbits
 	.align	1
+	.global	ftl_open_sblk_init
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	queue_prog_cmd, %function
-queue_prog_cmd:
+	.type	ftl_open_sblk_init, %function
+ftl_open_sblk_init:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
 	mov	r4, r0
-	ldr	r3, [r0, #12]
-	ldr	r2, [r0, #4]
-	ldr	r1, [r0, #24]
-	movs	r0, #16
-	bl	flash_start_page_prog
-	ldr	r3, .L1595
-	ldr	r2, [r4, #24]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #255
-	beq	.L1588
-	ldr	r6, .L1595+4
-	ubfx	r2, r2, #21, #3
-	movs	r5, #48
-	mov	r7, r6
-.L1590:
-	mla	r1, r5, r3, r6
-	ldr	r0, [r1, #24]
-	ubfx	r0, r0, #21, #3
-	cmp	r2, r0
-	bne	.L1589
-	add	r0, r1, #42
-	ldrb	r1, [r1, #42]	@ zero_extendqisi2
-	cmp	r1, #6
-	bne	.L1589
-	movs	r3, #3
-	strb	r3, [r0]
+	ldr	r8, .L1593+12
+	mov	r6, r1
+	movs	r7, #0
 .L1588:
-	movs	r3, #3
-	mov	r1, r4
-	strb	r3, [r4, #42]
-	movs	r3, #1
-	strb	r3, [r4, #43]
-	movs	r3, #255
-	strb	r3, [r4]
-	ldr	r0, .L1595
-	pop	{r3, r4, r5, r6, r7, lr}
-	b	buf_add_tail
-.L1589:
-	muls	r3, r5, r3
-	ldrb	r3, [r7, r3]	@ zero_extendqisi2
-	cmp	r3, #255
-	bne	.L1590
-	b	.L1588
-.L1596:
+.L1591:
+	mov	r0, r6
+	ldr	r10, .L1593+16
+	bl	ftl_alloc_sblk
+	movs	r1, #0
+	mov	r5, r0
+	bl	ftl_erase_sblk
+	add	r1, r4, #16
+	mov	r0, r5
+	bl	ftl_get_blk_list_in_sblk
+	ldr	r1, .L1593
+	cmp	r6, #2
+	ldrh	r2, [r8]
+	uxtb	r0, r0
+	strh	r5, [r4]	@ movhi
+	ite	eq
+	moveq	r3, #0
+	ldrbne	r3, [r1]	@ zero_extendqisi2
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	strb	r0, [r4, #9]
+	smulbb	r0, r0, r2
+	strh	r7, [r4, #2]	@ movhi
+	it	ne
+	smulbbne	r3, r3, r2
+	strb	r7, [r4, #5]
+	mul	r2, r2, r1
+	ldr	r1, .L1593+4
+	strh	r0, [r4, #6]	@ movhi
+	it	ne
+	uxthne	r3, r3
+	strh	r7, [r4, #10]	@ movhi
+	ldr	r0, [r1]
+	movs	r1, #255
+	strh	r3, [r4, #12]	@ movhi
+	lsls	r2, r2, #2
+	strb	r6, [r4, #4]
+	add	r0, r0, r3, lsl #2
+	bl	ftl_memset
+	ldr	r3, [r10]
+	ldrh	r2, [r4, #6]
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	cbnz	r3, .L1587
+	mov	r1, r5
+	ldr	r0, .L1593+8
+	bl	printf
+	ldr	r3, [r10]
+	movw	r2, #65535
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	movs	r3, #7
+	strb	r3, [r4, #4]
+	b	.L1591
+.L1587:
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L1594:
 	.align	2
-.L1595:
-	.word	.LANCHOR90
-	.word	.LANCHOR36
-	.size	queue_prog_cmd, .-queue_prog_cmd
-	.section	.text.sblk_prog_page,"ax",%progbits
+.L1593:
+	.word	.LANCHOR78
+	.word	.LANCHOR109
+	.word	.LC76
+	.word	.LANCHOR85
+	.word	.LANCHOR9
+	.size	ftl_open_sblk_init, .-ftl_open_sblk_init
+	.section	.text.pm_free_sblk,"ax",%progbits
 	.align	1
-	.global	sblk_prog_page
+	.global	pm_free_sblk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	sblk_prog_page, %function
-sblk_prog_page:
-	@ args = 0, pretend = 0, frame = 0
+	.type	pm_free_sblk, %function
+pm_free_sblk:
+	@ args = 0, pretend = 0, frame = 280
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldrh	r3, [r0, #34]
+	ldr	r3, .L1613
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r4, r0
-	mov	r5, r1
-	cbz	r3, .L1598
-	ldr	r3, .L1620
-	ldr	r3, [r3]
-	lsls	r3, r3, #23
-	bpl	.L1598
-	mov	r2, r1
-	ldr	r1, [r0, #24]
-	ldr	r0, .L1620+4
+	sub	sp, sp, #288
+	ldrh	r2, [r3]
+	str	r3, [sp, #12]
+	cmp	r2, #128
+	bls	.L1596
+	movs	r2, #78
+	ldr	r1, .L1613+4
+	ldr	r0, .L1613+8
 	bl	printf
-.L1598:
-	movs	r6, #0
-.L1599:
-	cbnz	r5, .L1610
-	mov	r0, r5
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1610:
-	ldrb	r7, [r4]	@ zero_extendqisi2
-	ldr	r10, [r4, #24]
-.L1600:
-	movs	r1, #1
-	mov	r0, r10
-	bl	queue_lun_state
+.L1596:
+	mov	r2, #256
+	movs	r1, #0
+	add	r0, sp, #32
+	movs	r4, #1
+	bl	ftl_memset
+	ldr	r3, .L1613+12
+	add	r10, sp, #32
+	ldr	r0, .L1613+16
+	ldr	r5, [sp, #12]
+	ldrh	r7, [r3]
+	ldr	r6, [r0]
 	mov	fp, r0
-	cbnz	r0, .L1601
-	cmp	r5, #1
-	beq	.L1602
-	ldr	r3, .L1620+8
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L1603
+	ldr	r1, .L1613+20
+	rsb	r3, r7, #21
+	ldrh	r5, [r5]
+	lsls	r4, r4, r3
+	ldrh	r2, [r6, #698]
+	ldrb	r3, [r1]	@ zero_extendqisi2
+	add	r8, r6, #704
+	str	r5, [sp, #16]
+	subs	r4, r4, #1
+	movs	r5, #0
+	str	r1, [sp, #20]
+.L1597:
+	uxth	r1, r5
+	cmp	r2, r1
+	bhi	.L1601
+	ldr	r3, .L1613+24
+	movs	r5, #0
+	ldr	r6, .L1613+28
+	str	r5, [sp, #8]
+	ldrb	r4, [r3]	@ zero_extendqisi2
+	ldrh	r2, [r6]
+	str	r3, [sp, #16]
+	smulbb	r4, r4, r2
+	uxth	r4, r4
 .L1602:
-	mov	r0, r4
-	bl	queue_prog_cmd
-.L1604:
-	ldr	r3, .L1620+12
-	add	r7, r7, r7, lsl #1
-	subs	r5, r5, #1
-	add	r4, r3, r7, lsl #4
-	b	.L1599
+	ldr	r3, [sp, #12]
+	uxth	r2, r5
+	ldrh	r3, [r3]
+	cmp	r3, r2
+	bhi	.L1608
+	ldr	r0, [sp, #8]
+	add	sp, sp, #288
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
 .L1601:
-	bl	queue_wait_first_req_completed
-	bl	queue_remove_completed_req
-	b	.L1600
+	ldr	r0, [r8], #4
+	mov	r1, r3
+	str	r2, [sp, #28]
+	str	r3, [sp, #24]
+	lsrs	r0, r0, r7
+	ands	r0, r0, r4
+	bl	__aeabi_uidiv
+	uxth	r3, r0
+	ldr	r2, [sp, #28]
+	add	lr, r6, #416
+	str	r3, [sp, #8]
+	movs	r1, #0
+	ldr	r3, [sp, #24]
+.L1598:
+	ldr	r0, [sp, #16]
+	uxth	ip, r1
+	cmp	r0, ip
+	bhi	.L1600
+	adds	r5, r5, #1
+	b	.L1597
+.L1600:
+	ldrh	ip, [lr], #2
+	ldr	r0, [sp, #8]
+	cmp	r0, ip
+	ittt	eq
+	ldrheq	ip, [r10, r1, lsl #1]
+	addeq	ip, ip, #1
+	strheq	ip, [r10, r1, lsl #1]	@ movhi
+	adds	r1, r1, #1
+	b	.L1598
+.L1608:
+	ldr	r3, [fp]
+	uxth	r7, r5
+	str	r2, [sp, #28]
+	add	r8, r7, #208
+	ldr	r2, [sp, #20]
+	ldrh	r10, [r3, r8, lsl #1]
+	ldrh	r0, [r3, #692]
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	str	r3, [sp, #24]
+	bl	__aeabi_idiv
+	cmp	r0, r10
+	ldr	r3, [sp, #24]
+	ldr	r2, [sp, #28]
+	bne	.L1603
+	ldr	r1, [sp, #16]
+	ldrh	r0, [r6]
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	smulbb	r1, r1, r0
+	add	r0, sp, #32
+	strh	r1, [r0, r7, lsl #1]	@ movhi
 .L1603:
-	ldrb	r3, [r4]	@ zero_extendqisi2
-	ubfx	r2, r10, #21, #3
-	cmp	r3, #255
-	bne	.L1605
-	mov	r2, #478
-	ldr	r1, .L1620+16
-	ldr	r0, .L1620+20
-	bl	printf
+	add	r1, sp, #32
+	ldrh	r1, [r1, r7, lsl #1]
+	cmp	r4, r1
+	bls	.L1604
+	cbnz	r1, .L1609
 .L1606:
-	b	.L1606
-.L1605:
-	ldr	r0, .L1620+12
-	movs	r1, #48
-	mla	r3, r1, r3, r0
-	ldr	ip, [r3, #24]
-	ubfx	r3, ip, #21, #3
-	cmp	r2, r3
-	bne	.L1607
-	ldr	r3, .L1620+24
-	mov	r8, #1
-	ldrh	r1, [r3]
-	ldr	r3, .L1620+28
-	lsl	r2, r8, r1
-	ldrb	r0, [r3]	@ zero_extendqisi2
-	rsb	r3, r1, #21
-	lsl	r3, r8, r3
-	subs	r2, r2, #1
-	uxth	r2, r2
-	subs	r0, r0, #1
-	subs	r3, r3, #1
-	ands	r3, r3, r0
-	and	lr, r2, r10
-	uxth	r3, r3
-	lsr	r10, r10, r1
-	lsr	r1, ip, r1
-	and	r10, r3, r10
-	ands	r1, r1, r3
-	and	r2, r2, ip
-	cmp	r10, r1
-	beq	.L1608
-	cmp	lr, r2
-	bne	.L1608
-	cmp	r6, r0
-	beq	.L1607
-	ldr	r3, [r4, #12]
-	movs	r0, #17
-	ldr	r2, [r4, #4]
-	add	r6, r6, r8
-	ldr	r1, [r4, #24]
-	bl	flash_start_page_prog
-	movs	r3, #8
-	strb	r8, [r4, #43]
-	strb	r3, [r4, #42]
-	movs	r3, #255
-	strb	r3, [r4]
-	mov	r1, r4
-	ldr	r0, .L1620+32
-	bl	buf_add_tail
-	b	.L1604
-.L1608:
-	mov	r0, r4
-	movs	r6, #0
-	bl	queue_prog_cmd
-	b	.L1604
+	movw	r2, #65535
+	cmp	r10, r2
+	beq	.L1605
+	ldr	r2, .L1613+32
+	ldr	r2, [r2]
+	lsls	r2, r2, #19
+	bpl	.L1607
+	ldrh	r3, [r3, #688]
+	movs	r2, #0
+	mov	r1, r7
+	ldr	r0, .L1613+36
+	str	r3, [sp]
+	mov	r3, r10
+	bl	printf
 .L1607:
-	mov	r0, r4
-	mov	r6, fp
-	bl	queue_prog_cmd
-	b	.L1604
-.L1621:
+	ldr	r3, [fp]
+	ldrh	r0, [r3, r8, lsl #1]
+	bl	ftl_free_sblk
+	ldr	r3, [fp]
+	movw	r2, #65535
+	strh	r2, [r3, r8, lsl #1]	@ movhi
+	ldrh	r2, [r3, #688]
+	subs	r2, r2, #1
+	strh	r2, [r3, #688]	@ movhi
+	b	.L1605
+.L1604:
+	cmp	r1, #0
+	beq	.L1606
+.L1605:
+	adds	r5, r5, #1
+	b	.L1602
+.L1609:
+	str	r2, [sp, #8]
+	mov	r4, r1
+	b	.L1605
+.L1614:
 	.align	2
-.L1620:
-	.word	.LANCHOR22
-	.word	.LC58
-	.word	.LANCHOR23
-	.word	.LANCHOR36
-	.word	.LANCHOR126
+.L1613:
+	.word	.LANCHOR146
+	.word	.LANCHOR147
 	.word	.LC0
-	.word	.LANCHOR71
-	.word	.LANCHOR70
-	.word	.LANCHOR90
-	.size	sblk_prog_page, .-sblk_prog_page
-	.section	.text.ftl_flush,"ax",%progbits
+	.word	.LANCHOR66
+	.word	.LANCHOR102
+	.word	.LANCHOR67
+	.word	.LANCHOR78
+	.word	.LANCHOR85
+	.word	.LANCHOR14
+	.word	.LC89
+	.size	pm_free_sblk, .-pm_free_sblk
+	.section	.text.ftl_memcpy,"ax",%progbits
 	.align	1
-	.global	ftl_flush
+	.global	ftl_memcpy
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_flush, %function
-ftl_flush:
+	.type	ftl_memcpy, %function
+ftl_memcpy:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	ldr	r4, .L1627
-	ldr	r5, .L1627+4
-	ldrb	r1, [r4]	@ zero_extendqisi2
-	cbz	r1, .L1623
-	ldrb	r0, [r5]	@ zero_extendqisi2
-	ldr	r3, .L1627+8
-	add	r0, r0, r0, lsl #1
-	add	r0, r3, r0, lsl #4
-	bl	sblk_prog_page
-.L1623:
-	movs	r3, #255
-	strb	r3, [r5]
-	movs	r3, #0
-	strb	r3, [r4]
-	bl	sblk_wait_write_queue_completed
-	bl	ftl_write_completed
-	movw	r0, #65535
-	pop	{r3, r4, r5, lr}
-	b	ftl_vpn_decrement
-.L1628:
-	.align	2
-.L1627:
-	.word	.LANCHOR89
-	.word	.LANCHOR127
-	.word	.LANCHOR36
-	.size	ftl_flush, .-ftl_flush
-	.section	.text.flash_prog_page_en,"ax",%progbits
+	@ link register save eliminated.
+	b	memcpy
+	.size	ftl_memcpy, .-ftl_memcpy
+	.section	.text.flash_info_data_init,"ax",%progbits
 	.align	1
-	.global	flash_prog_page_en
+	.global	flash_info_data_init
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_prog_page_en, %function
-flash_prog_page_en:
-	@ args = 8, pretend = 0, frame = 8
+	.type	flash_info_data_init, %function
+flash_info_data_init:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r8, r3
-	ldr	r3, .L1658
-	mov	r7, r0
-	mov	r5, r1
-	mov	r10, r2
-	ldrb	r6, [sp, #52]	@ zero_extendqisi2
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, r0
-	bhi	.L1630
-	mov	r2, #480
-	ldr	r1, .L1658+4
-	ldr	r0, .L1658+8
-	bl	printf
-.L1631:
-	b	.L1631
-.L1630:
-	ldr	r3, .L1658+12
-	tst	r1, #50331648
-	ldrb	fp, [r3, r0]	@ zero_extendqisi2
-	bne	.L1642
-	ldr	r3, .L1658+16
-	ldr	r2, .L1658+20
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1633
-	ldrb	r3, [r2]	@ zero_extendqisi2
-	cmp	r3, #0
-	beq	.L1642
-.L1633:
-	ldr	r3, .L1658+24
-	mov	r0, r5
-	str	r2, [sp, #12]
-	ldrh	r4, [r3]
-	mov	r1, r4
-	bl	__aeabi_uidiv
-	mul	r3, r4, r0
-	mov	r1, r4
-	mov	r0, r5
-	str	r3, [sp, #8]
-	bl	__aeabi_uidivmod
-	ldr	r2, [sp, #12]
-	ldr	r3, [sp, #8]
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cmp	r2, #0
-	beq	.L1634
-	add	r4, r3, r1, lsl #1
-.L1632:
-	ldr	r3, .L1658+28
-	ldr	r3, [r3]
-	lsls	r2, r3, #27
-	bpl	.L1635
-	mov	r2, r5
-	mov	r1, fp
-	ldr	r0, .L1658+32
-	bl	printf
-.L1635:
-	ldr	r3, [sp, #48]
-	mov	r0, fp
-	mov	r2, r10
-	mov	r1, r4
-	str	r3, [sp]
-	mov	r3, r8
-	bl	flash_prog_page
-	mov	fp, r0
-	cmp	r6, #0
-	beq	.L1636
-	ldr	r3, [sp, #48]
-	mov	r1, r5
-	ldr	r6, .L1658+36
-	mov	r0, r7
-	ldr	r4, .L1658+40
-	str	r3, [sp]
-	ldr	r3, [r6]
-	ldr	r2, [r4]
-	bl	flash_read_page_en
-	adds	r3, r0, #1
-	beq	.L1637
-	cmp	r0, #512
-	beq	.L1637
-	ldr	r3, [r4]
-	ldr	r2, [r10]
-	ldr	r3, [r3]
-	cmp	r2, r3
-	bne	.L1637
-	ldr	r3, [r6]
-	ldr	r2, [r8]
+	ldr	r3, .L1621
+	push	{r4, lr}
 	ldr	r3, [r3]
-	cmp	r2, r3
-	beq	.L1636
-.L1637:
-	movs	r3, #4
-	ldr	r1, [r6]
-	mov	r2, r3
-	ldr	r0, .L1658+44
-	bl	rknand_print_hex
-	movs	r3, #4
-	ldr	r1, [r4]
-	mov	r2, r3
-	ldr	r0, .L1658+48
-	bl	rknand_print_hex
-.L1638:
-	mov	r1, r5
-	ldr	r0, .L1658+52
-	bl	printf
-	mov	r2, #506
-	ldr	r1, .L1658+4
-	ldr	r0, .L1658+8
+	lsls	r3, r3, #19
+	bpl	.L1617
+	ldr	r2, .L1621+4
+	movs	r1, #105
+	ldr	r0, .L1621+8
 	bl	printf
-.L1640:
-	b	.L1640
-.L1634:
-	ldr	r2, .L1658+56
-	ldrh	r4, [r2, r1, lsl #1]
-	add	r4, r4, r3
-	b	.L1632
-.L1642:
-	mov	r4, r5
-	b	.L1632
-.L1636:
-	cmp	fp, #-1
-	beq	.L1638
-	mov	r0, fp
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1659:
+.L1617:
+	ldr	r4, .L1621+12
+	mov	r2, #2048
+	movs	r1, #0
+	ldr	r0, [r4]
+	bl	ftl_memset
+	ldr	r0, [r4]
+	movs	r2, #32
+	ldr	r3, .L1621+16
+	ldr	r1, .L1621+20
+	adds	r0, r0, #80
+	str	r3, [r0, #-80]
+	mov	r3, #2032
+	str	r3, [r0, #-72]
+	movs	r3, #1
+	strh	r3, [r0, #-64]	@ movhi
+	bl	ftl_memcpy
+	ldr	r0, [r4]
+	movs	r2, #32
+	ldr	r1, .L1621+24
+	pop	{r4, lr}
+	adds	r0, r0, #48
+	b	ftl_memcpy
+.L1622:
 	.align	2
-.L1658:
-	.word	.LANCHOR8
-	.word	.LANCHOR128
-	.word	.LC0
-	.word	.LANCHOR10
-	.word	.LANCHOR11
-	.word	.LANCHOR12
-	.word	.LANCHOR13
-	.word	.LANCHOR22
-	.word	.LC59
-	.word	.LANCHOR118
-	.word	.LANCHOR119
-	.word	.LC60
-	.word	.LC61
-	.word	.LC62
+.L1621:
 	.word	.LANCHOR14
-	.size	flash_prog_page_en, .-flash_prog_page_en
-	.section	.text.ftl_test_block,"ax",%progbits
+	.word	.LANCHOR148
+	.word	.LC90
+	.word	.LANCHOR27
+	.word	1398362953
+	.word	.LANCHOR20
+	.word	.LANCHOR31
+	.size	flash_info_data_init, .-flash_info_data_init
+	.section	.text.ftl_memcpy32,"ax",%progbits
 	.align	1
-	.global	ftl_test_block
+	.global	ftl_memcpy32
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_test_block, %function
-ftl_test_block:
-	@ args = 0, pretend = 0, frame = 8
+	.type	ftl_memcpy32, %function
+ftl_memcpy32:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r5, #0
-	ldr	r3, .L1677
-	mov	r10, r0
-	ldr	fp, .L1677+32
-	str	r5, [r3]
-	ldr	r3, .L1677+4
-	str	r5, [r3]
-.L1661:
-	uxth	r3, r5
-	str	r3, [sp, #12]
-	ldr	r3, .L1677+8
-	ldr	r2, [sp, #12]
-	ldrb	r3, [r3]	@ zero_extendqisi2
+	movs	r3, #0
+	push	{r4, lr}
+.L1624:
 	cmp	r3, r2
-	bls	.L1668
-	mov	r8, #0
-	b	.L1669
-.L1667:
-	ldr	r3, .L1677+12
-	ldr	r3, [r3]
-	lsls	r3, r3, #19
-	bpl	.L1662
-	mov	r1, r10
-	ldr	r0, .L1677+16
-	bl	printf
-.L1662:
-	ldrb	r4, [fp]	@ zero_extendqisi2
-	ldr	r3, [sp, #12]
-	smulbb	r4, r4, r10
-	add	r4, r4, r6
-	uxth	r4, r4
-	cbnz	r3, .L1663
-	ldr	r3, .L1677+20
-	ldr	r3, [r3]
-	ldrb	r3, [r3, #47]	@ zero_extendqisi2
-	cmp	r3, r4
-	bcs	.L1664
-.L1663:
-	uxtb	r6, r5
-	mov	r1, r4
-	mov	r0, r6
-	bl	flash_check_bad_block
-	cbnz	r0, .L1664
-	ldr	r3, .L1677+24
-	mov	r0, r6
-	ldrh	r7, [r3]
-	muls	r7, r4, r7
-	mov	r1, r7
-	bl	flash_erase_block
-	cbz	r0, .L1666
-.L1676:
-	mov	r1, r4
-	mov	r0, r6
-	bl	flash_mask_bad_block
-	b	.L1664
-.L1666:
-	movs	r3, #1
-	ldr	r2, .L1677
-	str	r3, [sp, #4]
-	mov	r1, r7
-	ldr	r3, .L1677+28
-	mov	r0, r6
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	str	r3, [sp]
-	ldr	r3, .L1677+4
-	bl	flash_prog_page_en
-	cmp	r0, #0
-	bne	.L1676
-.L1664:
-	add	r8, r8, #1
-.L1669:
-	ldrb	r3, [fp]	@ zero_extendqisi2
-	uxth	r6, r8
-	cmp	r3, r6
-	bhi	.L1667
-	adds	r5, r5, #1
-	b	.L1661
-.L1668:
-	movs	r0, #0
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1678:
-	.align	2
-.L1677:
-	.word	ftl_tmp_buffer
-	.word	.LANCHOR121
-	.word	.LANCHOR76
-	.word	.LANCHOR22
-	.word	.LC63
-	.word	.LANCHOR5
-	.word	.LANCHOR75
-	.word	.LANCHOR45
-	.word	.LANCHOR70
-	.size	ftl_test_block, .-ftl_test_block
-	.section	.text.ftl_prog_page,"ax",%progbits
+	bne	.L1625
+	pop	{r4, pc}
+.L1625:
+	ldr	r4, [r1, r3, lsl #2]
+	str	r4, [r0, r3, lsl #2]
+	adds	r3, r3, #1
+	b	.L1624
+	.size	ftl_memcpy32, .-ftl_memcpy32
+	.section	.text.ftl_memcmp,"ax",%progbits
 	.align	1
-	.global	ftl_prog_page
+	.global	ftl_memcmp
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_prog_page, %function
-ftl_prog_page:
-	@ args = 4, pretend = 0, frame = 0
+	.type	ftl_memcmp, %function
+ftl_memcmp:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r4, r5, r6, r7, lr}
-	mov	r7, r3
-	mov	r4, r0
-	mov	r5, r1
-	mov	r6, r2
-	bl	sblk_wait_write_queue_completed
-	movs	r3, #1
-	mov	r2, r6
-	str	r3, [sp, #4]
-	mov	r1, r5
-	ldr	r3, [sp, #32]
-	mov	r0, r4
-	str	r3, [sp]
-	mov	r3, r7
-	bl	flash_prog_page_en
-	adds	r3, r0, #1
-	bne	.L1679
-	movw	r2, #1414
-	ldr	r1, .L1682
-	ldr	r0, .L1682+4
-	bl	printf
-.L1681:
-	b	.L1681
-.L1679:
-	add	sp, sp, #12
-	@ sp needed
-	pop	{r4, r5, r6, r7, pc}
-.L1683:
+	@ link register save eliminated.
+	b	memcmp
+	.size	ftl_memcmp, .-ftl_memcmp
+	.section	.text.rknand_get_clk_rate,"ax",%progbits
+	.align	1
+	.global	rknand_get_clk_rate
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rknand_get_clk_rate, %function
+rknand_get_clk_rate:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r0, .L1628
+	bx	lr
+.L1629:
 	.align	2
-.L1682:
-	.word	.LANCHOR129
-	.word	.LC0
-	.size	ftl_prog_page, .-ftl_prog_page
-	.section	.text.ftl_info_flush,"ax",%progbits
+.L1628:
+	.word	148000000
+	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
+	.section	.text.ftl_malloc,"ax",%progbits
 	.align	1
-	.global	ftl_info_flush
+	.global	ftl_malloc
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_info_flush, %function
-ftl_info_flush:
-	@ args = 0, pretend = 0, frame = 8
+	.type	ftl_malloc, %function
+ftl_malloc:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r8, #0
-	ldr	r4, .L1721
-	movs	r1, #0
-	ldr	r6, .L1721+4
-	ldrb	r2, [r4]	@ zero_extendqisi2
-	mov	fp, r4
-	str	r0, [sp, #12]
-	mov	r4, r6
-	ldr	r0, .L1721+8
-	lsls	r2, r2, #1
-	bl	ftl_memset
-.L1685:
-	ldr	r7, .L1721+12
-	ldr	r1, [sp, #12]
-	ldrb	r10, [r6]	@ zero_extendqisi2
-	ldrh	r3, [r7]
-	ldrh	r5, [r6, #2]
-	str	r3, [sp, #8]
-	ldr	r3, .L1721+16
-	ldr	r2, [r3]
-	ldr	r3, [r2, #4]
-	adds	r3, r3, #1
-	str	r3, [r2, #4]
-	ldr	r2, .L1721+8
-	stm	r2, {r1, r3}
-	ldr	r2, .L1721+20
-	ldr	r2, [r2]
-	lsls	r2, r2, #19
-	bpl	.L1686
-	mov	r2, r5
-	mov	r1, r10
-	ldr	r0, .L1721+24
-	bl	printf
-.L1686:
-	ldr	r3, .L1721+28
-	ldrh	r0, [r4, #2]
-	ldrh	r3, [r3]
-	cmp	r3, r0
-	bhi	.L1687
-	ldr	r2, .L1721+32
-	movs	r0, #0
-	ldrb	r3, [r4, #1]	@ zero_extendqisi2
-	ldr	r5, [r2]
-	ldrb	r2, [r4]	@ zero_extendqisi2
-.L1694:
-	adds	r3, r3, #1
-	uxtb	r3, r3
-	cmp	r3, #7
-	bls	.L1688
-	add	lr, r5, #40
+	@ link register save eliminated.
 	movs	r1, #0
-.L1693:
-	ldrb	r8, [lr], #1	@ zero_extendqisi2
-	uxth	ip, r1
-	cmp	r8, #128
-	bls	.L1689
-	cmp	r8, #255
-	beq	.L1690
-	strb	r3, [r4, #1]
-	cbz	r0, .L1691
-	strb	r2, [r4]
-.L1691:
-	movs	r2, #156
-	ldr	r1, .L1721+36
-	ldr	r0, .L1721+40
-	bl	printf
-.L1692:
-	b	.L1692
-.L1690:
-	adds	r1, r1, #1
-	cmp	r1, #8
-	bne	.L1693
-	mov	ip, r1
-.L1689:
-	uxtb	r3, ip
-	mov	r8, #1
-.L1688:
-	adds	r2, r5, r3
-	ldrb	r2, [r2, #40]	@ zero_extendqisi2
-	movs	r0, #1
-	cmp	r2, #255
-	beq	.L1694
-	ldrh	r5, [r7]
-	movs	r0, #0
-	strb	r3, [r4, #1]
-	strb	r2, [r4]
-	muls	r5, r2, r5
-	mov	r1, r5
-	bl	flash_erase_block
-	ldrb	r3, [fp]	@ zero_extendqisi2
-	mov	r1, r5
-	ldr	r2, .L1721+44
-	movs	r0, #0
-	str	r3, [sp]
-	ldr	r3, .L1721+8
-	bl	ftl_prog_page
-	movs	r3, #1
-	add	r5, r5, r3
-	strh	r3, [r4, #2]	@ movhi
-.L1695:
-	ldrb	r3, [fp]	@ zero_extendqisi2
-	mov	r1, r5
-	ldr	r2, .L1721+44
-	movs	r0, #0
-	str	r3, [sp]
-	ldr	r3, .L1721+8
-	bl	ftl_prog_page
-	ldrh	r3, [r4, #2]
-	adds	r0, r0, #1
-	add	r3, r3, #1
-	strh	r3, [r4, #2]	@ movhi
-	beq	.L1685
-	cmp	r8, #0
-	bne	.L1696
-.L1704:
-	ldrb	r3, [r4]	@ zero_extendqisi2
-	cmp	r3, #255
-	bne	.L1720
-	movs	r2, #191
-	ldr	r1, .L1721+36
-	ldr	r0, .L1721+40
-	bl	printf
-.L1705:
-	b	.L1705
-.L1687:
-	ldr	r3, [sp, #8]
-	mla	r5, r10, r3, r5
-	cmp	r0, #0
-	bne	.L1695
-	mov	r1, r5
-	bl	flash_erase_block
-	b	.L1695
-.L1696:
-	ldrb	r5, [r4, #1]	@ zero_extendqisi2
-	ldr	r6, .L1721+32
-	adds	r5, r5, #1
-.L1699:
-	cmp	r5, #7
-	bhi	.L1704
-	ldr	r3, [r6]
-	add	r3, r3, r5
-	ldrb	r3, [r3, #40]	@ zero_extendqisi2
-	uxth	r2, r3
-	cmp	r2, #128
-	bls	.L1700
-	cmp	r2, #255
-	beq	.L1701
-	movs	r2, #184
-	ldr	r1, .L1721+36
-	ldr	r0, .L1721+40
-	bl	printf
-.L1702:
-	b	.L1702
-.L1700:
-	ldr	r2, .L1721+12
-	movs	r0, #0
-	ldrh	r1, [r2]
-	muls	r1, r3, r1
-	bl	flash_erase_block
-.L1701:
-	adds	r5, r5, #1
-	uxth	r5, r5
-	b	.L1699
-.L1720:
-	movs	r0, #0
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1722:
-	.align	2
-.L1721:
-	.word	.LANCHOR45
-	.word	.LANCHOR131
-	.word	.LANCHOR130
-	.word	.LANCHOR75
-	.word	.LANCHOR46
-	.word	.LANCHOR22
-	.word	.LC64
-	.word	.LANCHOR79
-	.word	.LANCHOR5
-	.word	.LANCHOR132
-	.word	.LC0
-	.word	ftl_info_data_buffer
-	.size	ftl_info_flush, .-ftl_info_flush
-	.section	.text.ftl_info_blk_init,"ax",%progbits
+	b	kmalloc
+	.size	ftl_malloc, .-ftl_malloc
+	.section	.text.nandc_init,"ax",%progbits
 	.align	1
-	.global	ftl_info_blk_init
+	.global	nandc_init
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_info_blk_init, %function
-ftl_info_blk_init:
+	.type	nandc_init, %function
+nandc_init:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r4, #0
-	ldr	r3, .L1755
-	mov	r1, r4
-	mov	r2, #16384
-	ldr	r0, .L1755+4
-	strb	r4, [r3]
-	ldr	r3, .L1755+8
-	ldr	r5, .L1755+12
-	ldr	r6, .L1755+16
-	str	r0, [r3]
-	ldr	r3, .L1755+20
-	ldrh	r3, [r3]
-	add	r3, r0, r3, lsl #2
-	str	r3, [r5]
-	bl	ftl_memset
-	mov	r2, #16384
-	mov	r1, r4
-	ldr	r0, .L1755+24
-	bl	ftl_memset
-	ldr	r2, [r6]
-	ldr	r3, .L1755+28
-	ldrb	r2, [r2, #40]	@ zero_extendqisi2
-	strb	r4, [r3, #1]
-	strh	r4, [r3, #2]	@ movhi
-	movs	r4, #7
-	strb	r2, [r3]
+	push	{r4, r5, r6, r7, lr}
+	movs	r3, #0
+	ldr	r6, .L1650
+	sub	sp, sp, #20
+	mov	r4, r0
 	str	r3, [sp, #12]
-.L1725:
 	ldr	r3, [r6]
-	sxth	r8, r4
-	add	r3, r3, r4
-	ldrb	r7, [r3, #40]	@ zero_extendqisi2
-	cmp	r7, #255
-	bne	.L1724
-.L1729:
-	adds	r4, r4, #-1
-	bcs	.L1725
-	mov	r8, #0
-.L1726:
-	ldr	r3, .L1755+32
-	ldr	r3, [r3]
+	lsls	r0, r3, #19
+	bpl	.L1632
+	mov	r2, r4
+	ldr	r1, .L1650+4
+	ldr	r0, .L1650+8
+	bl	printf
+.L1632:
+	ldr	r1, [r4, #352]
+	movs	r3, #6
+	ldr	r2, .L1650+12
+	ldr	r5, .L1650+16
+	ldr	r7, .L1650+20
+	cmp	r1, r2
+	ldr	r2, [r4, #128]
+	strb	r3, [r5]
+	itt	eq
+	moveq	r3, #8
+	strbeq	r3, [r5]
+	ldr	r3, .L1650+24
+	str	r4, [r7]
+	cmp	r2, r3
+	ldr	r2, .L1650+28
+	itt	eq
+	moveq	r3, #9
+	strbeq	r3, [r5]
+	ldrb	r3, [r5]	@ zero_extendqisi2
+	cmp	r3, #9
+	ldr	r3, .L1650+32
+	bne	.L1635
+	movs	r1, #1
+	strb	r1, [r3]
+	movs	r1, #2
+	ldr	r3, [sp, #12]
+	orr	r3, r3, #256
+	str	r3, [sp, #12]
+	ldr	r3, [sp, #12]
+	bfi	r3, r1, #18, #3
+	str	r3, [sp, #12]
+	ldr	r3, [sp, #12]
+	str	r3, [r4]
+	movs	r3, #0
+	str	r3, [r4, #520]
+	movw	r3, #4161
+	str	r3, [r4, #4]
+	movw	r3, #8321
+	str	r3, [r4, #8]
+	movs	r3, #38
+	str	r2, [r4, #80]
+	str	r3, [r4, #84]
+	movs	r3, #39
+	str	r3, [r4, #84]
+	ldr	r3, [r6]
 	lsls	r1, r3, #19
-	bpl	.L1730
-	ldr	r3, [r5]
-	mov	r2, #4800
-	mov	r1, r4
-	ldr	r0, .L1755+36
-	ldr	r3, [r3]
+	bpl	.L1637
+	ldr	r1, [r4]
+	ldr	r2, [r4, #8]
+	ldr	r3, [r4, #80]
+	ldr	r0, [r4, #84]
+	ldr	r4, [r4, #88]
+	stm	sp, {r0, r4}
+.L1649:
+	ldr	r0, .L1650+36
 	bl	printf
-.L1730:
-	adds	r2, r4, #1
-	bne	.L1731
-	mov	r2, #16384
-	movs	r1, #0
-	ldr	r0, .L1755+4
-	bl	ftl_memset
-	ldr	r3, [r5]
-	mov	r0, r4
-	ldr	r2, .L1755+40
-	str	r2, [r3]
-.L1723:
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1724:
-	ldr	r3, .L1755+44
-	movs	r0, #0
-	ldr	fp, .L1755+56
-	ldr	r2, .L1755+4
-	ldrh	r3, [r3]
-	muls	r7, r3, r7
-	ldrb	r3, [fp]	@ zero_extendqisi2
-	str	r3, [sp]
-	mov	r1, r7
-	ldr	r3, .L1755+48
-	bl	ftl_read_page
-	cmp	r0, #-1
-	mov	r10, r0
-	bne	.L1727
-	ldrb	r3, [fp]	@ zero_extendqisi2
-	adds	r1, r7, #1
-	ldr	r2, .L1755+4
-	movs	r0, #0
-	str	r3, [sp]
-	ldr	r3, .L1755+48
-	bl	ftl_read_page
-	mov	r10, r0
-.L1727:
-	ldr	r3, .L1755+32
-	ldr	r3, [r3]
-	lsls	r0, r3, #19
-	bpl	.L1728
-	ldr	r3, [r5]
-	mov	r2, r10
-	mov	r1, r4
-	ldr	r0, .L1755+52
-	ldr	r3, [r3]
-	str	r3, [sp]
-	movs	r3, #64
-	bl	printf
-.L1728:
-	cmp	r10, #-1
-	beq	.L1729
-	ldr	r3, [r5]
-	ldr	r2, .L1755+40
-	ldr	r3, [r3]
-	cmp	r3, r2
-	bne	.L1729
-	mov	r4, r8
-	b	.L1726
-.L1731:
+.L1637:
+	ldr	r3, .L1650+40
+	movs	r2, #1
+	strb	r2, [r3]
+	movs	r3, #0
+	ldr	r2, .L1650+44
+	strh	r3, [r2]	@ movhi
+	ldr	r2, .L1650+48
+	strb	r3, [r2]
 	ldr	r3, [r6]
-	movs	r0, #0
-	ldr	r2, .L1755+4
-	movs	r4, #0
-	ldr	r10, .L1755+40
-	add	r3, r3, r8
-	ldrb	r1, [r3, #40]	@ zero_extendqisi2
-	ldr	r3, [sp, #12]
-	strb	r8, [r3, #1]
+	lsls	r3, r3, #19
+	bpl	.L1631
+	ldrb	r1, [r5]	@ zero_extendqisi2
+	ldr	r0, .L1650+52
+	bl	printf
+.L1631:
+	add	sp, sp, #20
+	@ sp needed
+	pop	{r4, r5, r6, r7, pc}
+.L1635:
+	movs	r1, #0
+	movs	r0, #1
 	strb	r1, [r3]
-	movs	r3, #4
-	str	r3, [sp]
-	ldr	r3, .L1755+48
-	bl	flash_get_last_written_page
-	uxth	r6, r0
-	mov	r7, r0
-	adds	r3, r6, #1
-	uxth	r8, r3
 	ldr	r3, [sp, #12]
-	ldrb	fp, [r3]	@ zero_extendqisi2
-	ldr	r3, .L1755+44
-	ldrh	r3, [r3]
-	mul	fp, r3, fp
-.L1733:
-	subs	r3, r6, r4
-	lsls	r3, r3, #16
-	bmi	.L1738
-	ldr	r3, .L1755+56
-	add	r1, r7, fp
-	ldr	r2, .L1755+4
-	subs	r1, r1, r4
-	movs	r0, #0
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	str	r3, [sp]
-	ldr	r3, .L1755+48
-	bl	ftl_read_page
-	adds	r0, r0, #1
-	beq	.L1734
-	ldr	r3, [r5]
-	ldr	r3, [r3]
-	cmp	r3, r10
-	bne	.L1734
-.L1738:
+	orr	r3, r3, #256
+	str	r3, [sp, #12]
 	ldr	r3, [sp, #12]
-	strh	r8, [r3, #2]	@ movhi
-	ldr	r3, [r5]
-	ldr	r2, [r3, #16]
-	cmp	r2, #2048
-	bhi	.L1735
-.L1736:
-	ldr	r2, [r3, #24]
-	cmp	r2, #2048
-	bls	.L1739
-	ldr	r1, [r3, #28]
-	add	r1, r1, r2, lsr #11
-	ubfx	r2, r2, #0, #11
-	str	r2, [r3, #24]
-	str	r1, [r3, #28]
-.L1739:
-	ldr	r2, [r3, #32]
-	cmp	r2, #1024
-	bls	.L1740
-	ldr	r1, [r3, #36]
-	add	r1, r1, r2, lsr #10
-	ubfx	r2, r2, #0, #10
-	str	r2, [r3, #32]
-	str	r1, [r3, #36]
-.L1740:
-	ldr	r2, [r3, #40]
-	cmp	r2, #1024
-	bls	.L1741
-	ldr	r1, [r3, #44]
-	add	r1, r1, r2, lsr #10
-	ubfx	r2, r2, #0, #10
-	str	r2, [r3, #40]
-	str	r1, [r3, #44]
-.L1741:
-	ldr	r2, [r3, #64]
-	movs	r0, #0
-	adds	r2, r2, #1
-	str	r2, [r3, #64]
-	bl	ftl_info_flush
-	movs	r0, #0
-	bl	ftl_info_flush
-	movs	r0, #0
-	b	.L1723
-.L1734:
-	adds	r4, r4, #1
-	b	.L1733
-.L1735:
-	ldr	r1, [r3, #20]
-	add	r1, r1, r2, lsr #11
-	ubfx	r2, r2, #0, #11
-	str	r2, [r3, #16]
-	str	r1, [r3, #20]
-	b	.L1736
-.L1756:
+	bfi	r3, r0, #24, #3
+	mov	r0, #2048
+	str	r3, [sp, #12]
+	ldr	r3, [sp, #12]
+	str	r3, [r4]
+	movw	r3, #4193
+	str	r1, [r4, #336]
+	str	r3, [r4, #4]
+	movw	r3, #8321
+	str	r3, [r4, #344]
+	movs	r3, #38
+	str	r2, [r4, #304]
+	str	r3, [r4, #308]
+	movs	r3, #39
+	str	r3, [r4, #308]
+	bl	ftl_malloc
+	ldr	r3, .L1650+56
+	str	r0, [r3]
+	ldr	r3, [r6]
+	lsls	r2, r3, #19
+	bpl	.L1637
+	ldr	r0, [r7]
+	ldr	r1, [r0]
+	ldr	r2, [r0, #344]
+	ldr	r3, [r0, #304]
+	ldr	r4, [r0, #308]
+	ldr	r0, [r0, #312]
+	str	r4, [sp]
+	str	r0, [sp, #4]
+	b	.L1649
+.L1651:
 	.align	2
-.L1755:
-	.word	.LANCHOR133
-	.word	ftl_info_data_buffer
-	.word	.LANCHOR57
-	.word	.LANCHOR46
-	.word	.LANCHOR5
-	.word	.LANCHOR54
-	.word	ftl_ext_info_data_buffer
-	.word	.LANCHOR131
-	.word	.LANCHOR22
-	.word	.LC66
-	.word	1229739078
-	.word	.LANCHOR75
-	.word	.LANCHOR130
-	.word	.LC65
+.L1650:
+	.word	.LANCHOR14
+	.word	.LANCHOR149
+	.word	.LC91
+	.word	1446522928
+	.word	.LANCHOR28
+	.word	.LANCHOR13
+	.word	1446588464
+	.word	1052675
 	.word	.LANCHOR45
-	.size	ftl_info_blk_init, .-ftl_info_blk_init
-	.section	.text.ftl_ext_info_flush,"ax",%progbits
-	.align	1
-	.global	ftl_ext_info_flush
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_ext_info_flush, %function
-ftl_ext_info_flush:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1771
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, [r3]
-	ldr	r2, [r3, #520]
-	cbz	r2, .L1758
-	movs	r2, #0
-	str	r2, [r3, #520]
-.L1758:
-	ldr	r5, .L1771+4
-	movs	r0, #0
-	bl	ftl_total_vpn_update
-	mov	r4, r5
-.L1767:
-	ldr	r3, [r5]
-	ldr	r2, [r3, #56]
-	adds	r2, r2, #1
-	str	r2, [r3, #56]
-	ldrh	r2, [r3, #140]
-	ldr	r3, .L1771+8
-	ldrh	r3, [r3]
-	cmp	r2, r3
-	bcc	.L1759
-	bl	ftl_ext_alloc_new_blk
-.L1759:
-	ldr	r0, [r4]
-	movw	r3, #65535
-	ldrh	r1, [r0, #130]
-	cmp	r1, r3
-	bne	.L1760
-	mov	r2, #1048
-	ldr	r1, .L1771+12
-	ldr	r0, .L1771+16
-	bl	printf
-.L1761:
-	b	.L1761
-.L1760:
-	ldr	r3, .L1771+20
-	movs	r7, #0
-	ldr	fp, .L1771+32
-	ldr	r10, .L1771+36
-	ldrh	r3, [r3]
-	rsb	r2, r3, #21
-	movs	r3, #1
-	asr	r6, r1, r2
-	lsls	r3, r3, r2
-	ldr	r2, .L1771+24
-	subs	r3, r3, #1
-	ands	r3, r3, r1
-	movs	r1, #0
-	ldrh	r8, [r2]
-	ldrh	r2, [r0, #140]
-	mov	r0, r10
-	smlabb	r3, r8, r3, r2
-	ldrb	r2, [fp]	@ zero_extendqisi2
-	uxth	r8, r3
-	lsls	r2, r2, #1
-	bl	ftl_memset
-	ldr	r3, [r4]
-	mov	r1, r8
-	ldr	r2, .L1771+28
-	uxtb	r0, r6
-	str	r7, [r10]
-	ldr	r3, [r3, #56]
-	str	r3, [r10, #4]
-	ldrb	r3, [fp]	@ zero_extendqisi2
-	str	r3, [sp]
-	mov	r3, r10
-	bl	ftl_prog_page
-	ldr	r2, [r4]
-	ldrh	r3, [r2, #140]
-	adds	r3, r3, #1
-	uxth	r3, r3
-	cmp	r3, #1
-	strh	r3, [r2, #140]	@ movhi
-	beq	.L1767
-	adds	r0, r0, #1
-	beq	.L1767
-	mov	r0, r7
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1772:
-	.align	2
-.L1771:
-	.word	.LANCHOR60
+	.word	.LC92
 	.word	.LANCHOR46
-	.word	.LANCHOR79
-	.word	.LANCHOR134
-	.word	.LC0
-	.word	.LANCHOR71
-	.word	.LANCHOR75
-	.word	ftl_ext_info_data_buffer
-	.word	.LANCHOR45
-	.word	.LANCHOR130
-	.size	ftl_ext_info_flush, .-ftl_ext_info_flush
-	.section	.text.ftl_ext_info_init,"ax",%progbits
+	.word	.LANCHOR48
+	.word	.LANCHOR44
+	.word	.LC93
+	.word	.LANCHOR47
+	.size	nandc_init, .-nandc_init
+	.section	.text.buf_init,"ax",%progbits
 	.align	1
-	.global	ftl_ext_info_init
+	.global	buf_init
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_ext_info_init, %function
-ftl_ext_info_init:
+	.type	buf_init, %function
+buf_init:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r2, #0
-	ldr	r3, .L1790
-	ldr	r5, .L1790+4
-	strh	r2, [r3]	@ movhi
-	ldr	r2, .L1790+8
-	ldr	r3, [r5]
-	mov	r10, r5
-	ldrh	r4, [r3, #130]
-	ldr	r3, .L1790+12
-	ubfx	r8, r4, #0, #14
-	ldrh	r3, [r3]
-	mov	r1, r8
-	rsb	r3, r3, #21
-	asrs	r4, r4, r3
-	movs	r3, #4
-	str	r3, [sp]
-	uxtb	r4, r4
-	ldr	r3, .L1790+16
-	mov	r0, r4
-	bl	flash_get_last_written_page
-	ldr	r3, .L1790+20
-	mov	r6, r0
-	ldr	r3, [r3]
-	tst	r3, #4096
-	beq	.L1774
-	mov	r3, r0
-	movw	r2, #1091
-	ldr	r1, .L1790+24
-	ldr	r0, .L1790+28
-	bl	printf
-.L1774:
-	ldr	fp, .L1790+48
-	movs	r7, #0
-.L1775:
-	uxth	r5, r6
-	subs	r3, r5, r7
-	lsls	r3, r3, #16
-	bmi	.L1780
-	ldr	r3, .L1790+32
-	subs	r1, r6, r7
-	ldr	r2, .L1790+8
-	ldrh	r0, [r3]
-	ldr	r3, .L1790+36
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	mla	r1, r8, r0, r1
-	mov	r0, r4
-	str	r3, [sp]
-	ldr	r3, .L1790+16
-	bl	flash_read_page_en
-	adds	r2, r0, #1
-	beq	.L1776
-	cmp	r0, #512
-	beq	.L1776
-	ldr	r3, .L1790+40
-	ldr	r3, [r3]
-	ldr	r3, [r3]
-	cmp	r3, fp
-	bne	.L1776
-.L1780:
-	ldr	r3, [r10]
-	ldrh	r2, [r3, #140]
-	cmp	r2, r6
-	bgt	.L1778
+	push	{r4, r5, r6, r7, r8, lr}
+	movs	r5, #0
+	ldr	r4, .L1655
+	mov	r6, r5
+	ldr	r7, .L1655+4
+	mov	r8, r4
+.L1653:
+	ldrb	r0, [r7]	@ zero_extendqisi2
+	uxtb	r3, r5
+	strb	r6, [r4, #2]
 	adds	r5, r5, #1
-	strh	r5, [r3, #140]	@ movhi
-	bl	ftl_ext_info_flush
-.L1778:
-	ldr	r3, .L1790+40
-	movs	r0, #0
-	movw	r2, #65535
-	ldr	r3, [r3]
-	str	r0, [r3, #520]
-	ldr	r3, .L1790+44
-	strh	r2, [r3]	@ movhi
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1776:
-	adds	r7, r7, #1
-	b	.L1775
-.L1791:
+	adds	r2, r3, #1
+	strb	r3, [r4, #1]
+	strb	r2, [r4]
+	adds	r4, r4, #48
+	str	r6, [r4, #-40]
+	lsls	r0, r0, #9
+	bl	ftl_malloc
+	str	r0, [r4, #-44]
+	ldrb	r0, [r7]	@ zero_extendqisi2
+	lsls	r0, r0, #1
+	bl	ftl_malloc
+	cmp	r5, #32
+	str	r0, [r4, #-36]
+	bne	.L1653
+	movs	r3, #255
+	strb	r3, [r8, #1488]
+	ldr	r3, .L1655+8
+	strb	r6, [r3]
+	ldr	r3, .L1655+12
+	strb	r5, [r3]
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1656:
 	.align	2
-.L1790:
-	.word	.LANCHOR86
-	.word	.LANCHOR46
-	.word	ftl_ext_info_data_buffer
-	.word	.LANCHOR71
-	.word	.LANCHOR130
-	.word	.LANCHOR22
-	.word	.LANCHOR135
-	.word	.LC28
-	.word	.LANCHOR75
-	.word	.LANCHOR45
-	.word	.LANCHOR60
-	.word	.LANCHOR87
-	.word	1162432070
-	.size	ftl_ext_info_init, .-ftl_ext_info_init
-	.section	.text.ftl_low_format,"ax",%progbits
+.L1655:
+	.word	.LANCHOR50
+	.word	.LANCHOR123
+	.word	.LANCHOR51
+	.word	.LANCHOR52
+	.size	buf_init, .-buf_init
+	.section	.text.gc_init,"ax",%progbits
 	.align	1
-	.global	ftl_low_format
+	.global	gc_init
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_low_format, %function
-ftl_low_format:
-	@ args = 0, pretend = 0, frame = 32
+	.type	gc_init, %function
+gc_init:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r4, #8
-	ldr	r5, .L1829
-	sub	sp, sp, #40
-.L1796:
-	ldr	r3, [r5]
-	add	r3, r3, r4
-	ldrb	r3, [r3, #32]	@ zero_extendqisi2
-	cmp	r3, #128
-	ble	.L1793
-	cmp	r3, #255
-	beq	.L1794
-	movw	r2, #1228
-	ldr	r1, .L1829+4
-	ldr	r0, .L1829+8
-	bl	printf
-.L1795:
-	b	.L1795
-.L1793:
-	ldr	r2, .L1829+12
-	movs	r0, #0
-	ldrh	r1, [r2]
-	muls	r1, r3, r1
-	bl	flash_erase_block
-.L1794:
-	adds	r4, r4, #1
-	cmp	r4, #16
-	bne	.L1796
-	ldr	r4, .L1829+16
-	mov	r10, #0
-	bl	sblk_init
-	bl	ftl_info_blk_init
-	mov	r2, #16384
-	movs	r1, #0
-	ldr	r0, .L1829+20
+	ldr	r3, .L1658
+	mov	r2, #340
+	push	{r4, r5, r6, lr}
+	movs	r4, #0
+	ldr	r5, .L1658+4
+	mov	r1, r4
+	strb	r4, [r3]
+	ldr	r3, .L1658+8
+	mov	r0, r5
+	strb	r4, [r3]
+	ldr	r3, .L1658+12
+	str	r4, [r3]
+	ldr	r3, .L1658+16
+	strh	r4, [r3]	@ movhi
 	bl	ftl_memset
-	ldr	r3, [r4]
-	ldr	r2, .L1829+24
-	str	r2, [r3]
-.L1797:
-	ldr	r3, .L1829+28
-	uxth	r0, r10
-	ldr	r6, .L1829+32
+	movw	r3, #65535
+	str	r4, [r5, #8]
+	strh	r3, [r5]	@ movhi
+	ldr	r3, .L1658+20
 	ldrh	r3, [r3]
-	cmp	r3, r0
-	bhi	.L1804
-	ldr	r7, .L1829+36
-	mov	r2, #16384
-	movs	r1, #0
-	ldr	r0, .L1829+40
-	bl	ftl_memset
-	ldr	r3, [r7]
-	ldr	r2, .L1829+44
-	str	r2, [r3]
-	ldr	r3, .L1829+48
-	ldrb	r8, [r3]	@ zero_extendqisi2
-	ldr	r3, .L1829
-	mov	r1, r8
-	ldr	r3, [r3]
-	ldrb	r0, [r3, #47]	@ zero_extendqisi2
-	bl	__aeabi_uidiv
-	ldr	ip, [r6]
-	uxtb	r0, r0
-	cmp	r8, #1
-	str	r7, [sp, #8]
-	add	r5, r0, #1
-	mov	r3, #0
-	ite	eq
-	moveq	r0, #1
-	movne	r0, #3
-.L1805:
-	add	r1, ip, r3, lsl #2
-	adds	r3, r3, #1
-	ldrb	r2, [r1, #2]	@ zero_extendqisi2
-	strb	r0, [r1, #3]
-	orn	r2, r2, #31
-	bfc	r2, #3, #2
-	strb	r2, [r1, #2]
-	uxth	r2, r3
-	cmp	r5, r2
-	bhi	.L1805
-	mov	r1, r8
-	movs	r0, #16
-	bl	__aeabi_idiv
-	ldr	r3, [r4]
-	add	r0, r0, r5
-	uxth	r0, r0
-	strh	r0, [r3, #134]	@ movhi
-	ldr	r3, .L1829+52
-	ldr	r3, [r3]
-	lsls	r3, r3, #19
-	bpl	.L1806
-	str	r0, [sp]
-	mov	r3, r5
-	movs	r2, #128
-	movw	r1, #1265
-	ldr	r0, .L1829+56
-	bl	printf
-.L1806:
-	ldr	r0, [r4]
-	movs	r2, #128
-	movs	r1, #255
-	adds	r0, r0, #160
-	bl	ftl_memset
-	ldr	r3, [r6]
-	ldr	r0, [r4]
-	str	r3, [sp, #24]
-	ldr	r3, .L1829+60
-	ldrh	ip, [r0, #134]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	str	r3, [sp, #28]
-	ldr	r3, .L1829+48
-	ldrb	fp, [r3]	@ zero_extendqisi2
-	uxth	r3, fp
-	str	r3, [sp, #16]
-	ldrh	r3, [sp, #16]
-	smulbb	r2, r5, r3
-	ldr	r3, .L1829+64
-	ldrh	r1, [r3]
+	lsrs	r2, r3, #1
+	lsrs	r1, r3, #2
+	strh	r2, [r5, #34]	@ movhi
+	ldr	r2, .L1658+24
+	strh	r1, [r5, #32]	@ movhi
+	ldr	r5, .L1658+28
+	strh	r4, [r2]	@ movhi
+	ldr	r2, .L1658+32
+	strh	r4, [r2]	@ movhi
+	ldr	r2, .L1658+36
+	strh	r4, [r2]	@ movhi
+	ldr	r4, .L1658+40
+	ldrb	r0, [r4]	@ zero_extendqisi2
+	smulbb	r2, r0, r3
 	uxth	r2, r2
-	str	r3, [sp, #36]
-	rsb	r6, r1, #21
-	movs	r1, #1
-	lsls	r1, r1, r6
-	movs	r6, #0
-	uxth	r1, r1
-	str	r1, [sp, #32]
-.L1807:
-	cmp	r5, ip
-	bcc	.L1813
-	ldr	r3, .L1829+28
-	mov	r2, ip
-	mov	lr, #1
-	ldrh	r1, [r3]
-	ldr	r3, [sp, #24]
-	add	r3, r3, ip, lsl #2
-.L1814:
-	cmp	r2, r1
-	bcc	.L1815
-	sub	ip, r1, ip
-	movs	r5, #0
-	strh	ip, [r0, #116]	@ movhi
-	strh	r6, [r0, #112]	@ movhi
-	strh	r5, [r0, #114]	@ movhi
-	strh	r5, [r0, #118]	@ movhi
-	movs	r0, #1
-	bl	ftl_alloc_sblk
-	mov	r1, r5
-	mov	r6, r0
-	bl	ftl_erase_sblk
-	ldr	r1, [r4]
-	mov	r0, r6
-	add	r1, r1, #672
-	bl	ftl_get_blk_list_in_sblk
-	ldr	r0, [r4]
-	movw	r2, #65533
-	ldrh	r8, [r0, #672]
-	strh	r5, [r0, #690]	@ movhi
-	add	r3, r8, #-1
-	uxth	r3, r3
-	cmp	r3, r2
-	bls	.L1816
-	movw	r2, #1297
-	ldr	r1, .L1829+4
-	ldr	r0, .L1829+8
-	bl	printf
-.L1817:
-	b	.L1817
-.L1804:
-	ldr	r3, .L1829+68
-	strh	r0, [r3]	@ movhi
-	bl	ftl_test_block
-	ldr	r3, .L1829+60
-	uxth	r1, r10
-	ldr	r5, [r6]
-	movs	r6, #0
-	mov	fp, r6
-	mov	r7, r6
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	add	r5, r5, r1, lsl #2
-	str	r3, [sp, #8]
-	ldr	r3, .L1829+48
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	uxth	r2, r3
-	str	r2, [sp, #12]
-	mul	r2, r3, r1
-.L1798:
-	ldr	r0, [sp, #8]
-	uxth	r1, fp
-	cmp	r0, r1
-	bhi	.L1818
-	cbnz	r7, .L1803
-	ldrb	r3, [r5, #2]	@ zero_extendqisi2
-	orr	r3, r3, #224
-	strb	r3, [r5, #2]
-.L1803:
-	add	r10, r10, #1
-	b	.L1797
-.L1801:
-	add	r1, r8, r2
-	ldr	r0, [sp, #16]
-	str	r3, [sp, #24]
-	str	r2, [sp, #20]
-	bl	flash_check_bad_block
-	ldr	r2, [sp, #20]
-	ldr	r3, [sp, #24]
-	cbz	r0, .L1799
-	ldrb	r0, [r5, #3]	@ zero_extendqisi2
-	movs	r1, #1
-	lsl	r1, r1, r8
-	orrs	r1, r1, r0
-	strb	r1, [r5, #3]
-.L1800:
-	add	r8, r8, #1
-.L1802:
-	sub	r1, r8, r6
-	ldr	r0, [sp, #12]
-	uxth	r1, r1
-	cmp	r0, r1
-	bhi	.L1801
-	add	fp, fp, #1
-	add	r6, r6, r3
-	subs	r2, r2, r3
-	b	.L1798
-.L1799:
-	adds	r7, r7, #1
-	uxth	r7, r7
-	b	.L1800
-.L1818:
-	uxtb	r1, fp
-	mov	r8, r6
-	str	r1, [sp, #16]
-	b	.L1802
-.L1813:
-	ldr	r3, [sp, #24]
-	add	r3, r3, r5, lsl #2
-	str	r3, [sp, #12]
-	ldrb	r3, [r3, #2]	@ zero_extendqisi2
-	ldr	r1, [sp, #12]
-	orn	r3, r3, #31
-	bfc	r3, #3, #2
-	strb	r3, [r1, #2]
-	movs	r1, #0
-	mov	r8, r1
-	str	r1, [sp, #20]
-.L1808:
-	ldrh	r3, [sp, #20]
-	ldr	r7, [sp, #28]
-	cmp	r7, r3
-	bhi	.L1820
-	ldr	r3, [sp, #16]
-	adds	r5, r5, #1
-	uxth	r5, r5
-	add	r2, r2, r3
-	uxth	r2, r2
-	b	.L1807
-.L1811:
-	ldr	r7, [sp, #12]
-	ldrb	r10, [r7, #3]	@ zero_extendqisi2
-	add	r7, lr, r8
-	asr	r10, r10, r7
-	tst	r10, #1
-	bne	.L1809
-	cmp	fp, #1
-	add	r10, r6, #80
-	it	hi
-	andhi	r3, r3, #1
-	add	r6, r6, #1
-	it	hi
-	addhi	r3, r3, r2
-	uxth	r6, r6
-	ite	hi
-	uxthhi	r3, r3
-	movls	r3, r2
-	add	r3, r3, r1
-	strh	r3, [r0, r10, lsl #1]	@ movhi
-.L1809:
-	add	lr, lr, #1
-.L1812:
-	ldr	r7, [sp, #16]
-	uxth	r3, lr
-	cmp	r3, r7
-	bcc	.L1811
-	ldr	r3, [sp, #20]
-	add	r8, r8, fp
-	adds	r3, r3, #1
-	str	r3, [sp, #20]
-	ldr	r3, [sp, #32]
-	add	r1, r1, r3
-	uxth	r1, r1
-	b	.L1808
-.L1820:
-	mov	lr, #0
-	b	.L1812
-.L1815:
-	ldrb	r5, [r3, #2]	@ zero_extendqisi2
-	adds	r2, r2, #1
-	uxth	r2, r2
-	adds	r3, r3, #4
-	and	r5, r5, #31
-	bfi	r5, lr, #3, #2
-	strb	r5, [r3, #-2]
-	b	.L1814
-.L1830:
+	sub	r6, r2, #32
+	strh	r6, [r5]	@ movhi
+	ldr	r5, .L1658+44
+	strh	r2, [r5]	@ movhi
+	ldr	r2, .L1658+48
+	ldr	r5, .L1658+52
+	strh	r3, [r2]	@ movhi
+	ldr	r3, .L1658+56
+	strh	r1, [r3]	@ movhi
+	ldrh	r3, [r5]
+	muls	r0, r3, r0
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L1658+60
+	str	r0, [r3]
+	ldrh	r3, [r5]
+	ldrb	r0, [r4]	@ zero_extendqisi2
+	muls	r0, r3, r0
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L1658+64
+	str	r0, [r3]
+	ldrh	r3, [r5]
+	ldrb	r0, [r4]	@ zero_extendqisi2
+	muls	r0, r3, r0
+	bl	ftl_malloc
+	ldr	r3, .L1658+68
+	str	r0, [r3]
+	ldrh	r3, [r5]
+	ldrb	r0, [r4]	@ zero_extendqisi2
+	muls	r0, r3, r0
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L1658+72
+	str	r0, [r3]
+	ldrh	r3, [r5]
+	ldrb	r0, [r4]	@ zero_extendqisi2
+	muls	r0, r3, r0
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L1658+76
+	ldr	r2, .L1658+80
+	str	r0, [r3]
+	ldr	r3, .L1658+84
+	ldrh	r3, [r3]
+	lsrs	r3, r3, #2
+	strh	r3, [r2]	@ movhi
+	pop	{r4, r5, r6, pc}
+.L1659:
 	.align	2
-.L1829:
-	.word	.LANCHOR5
-	.word	.LANCHOR136
-	.word	.LC0
-	.word	.LANCHOR75
-	.word	.LANCHOR46
-	.word	ftl_info_data_buffer
-	.word	1229739078
-	.word	.LANCHOR54
-	.word	.LANCHOR57
-	.word	.LANCHOR60
-	.word	ftl_ext_info_data_buffer
-	.word	1162432070
-	.word	.LANCHOR70
-	.word	.LANCHOR22
-	.word	.LC67
+.L1658:
 	.word	.LANCHOR76
-	.word	.LANCHOR71
-	.word	.LANCHOR53
-.L1816:
-	strh	r5, [r0, #696]	@ movhi
-	movs	r1, #255
-	mov	r2, #256
-	add	r0, r0, #416
-	bl	ftl_memset
-	ldr	r2, [sp, #36]
-	ldr	r3, [r4]
-	ldrh	r2, [r2]
-	strh	r8, [r3, #692]	@ movhi
-	strh	r6, [r3, #416]	@ movhi
-	rsb	r2, r2, #21
-	asr	r2, r8, r2
-	strh	r2, [r3, #694]	@ movhi
-	movs	r2, #1
-	strh	r2, [r3, #688]	@ movhi
-	ldr	r2, .L1831
-	ldrh	r2, [r2]
-	strh	r2, [r3, #698]	@ movhi
-	bl	ftl_alloc_sys_blk
-	mov	r1, r5
-	mov	r6, r0
-	bl	ftl_erase_phy_blk
-	ldr	r3, [r4]
-	movs	r1, #2
-	strh	r6, [r3, #130]	@ movhi
-	ldr	r3, [sp, #8]
-	ldr	r0, [r3]
-	adds	r0, r0, #16
-	bl	ftl_open_sblk_init
-	ldr	r3, [sp, #8]
-	movs	r1, #3
-	ldr	r0, [r3]
-	adds	r0, r0, #48
-	bl	ftl_open_sblk_init
-	ldr	r3, [sp, #8]
-	movs	r1, #255
-	ldr	r0, [r3]
-	ldr	r3, [r4]
-	adds	r0, r0, #136
-	ldrh	r2, [r3, #134]
-	strh	r5, [r0, #-12]	@ movhi
-	strh	r5, [r0, #-16]	@ movhi
-	strh	r2, [r0, #-10]	@ movhi
-	movw	r2, #65535
-	strh	r2, [r0, #-56]	@ movhi
-	strh	r2, [r0, #-6]	@ movhi
-	mov	r2, #-1
-	strh	r5, [r0, #-14]	@ movhi
-	str	r2, [r0, #408]
-	strh	r2, [r3, #126]	@ movhi
-	mov	r2, #256
-	bl	ftl_memset
-	ldr	r3, [sp, #8]
-	movs	r2, #128
-	movs	r1, #255
-	ldr	r0, [r3]
-	add	r0, r0, #392
-	bl	ftl_memset
-	bl	ftl_ext_info_flush
-	mov	r0, r5
-	bl	ftl_info_flush
-	bl	ftl_info_blk_init
-	mov	r0, r5
-	add	sp, sp, #40
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1832:
+	.word	.LANCHOR63
+	.word	.LANCHOR150
+	.word	.LANCHOR151
+	.word	.LANCHOR87
+	.word	.LANCHOR85
+	.word	.LANCHOR86
+	.word	.LANCHOR94
+	.word	.LANCHOR82
+	.word	.LANCHOR83
+	.word	.LANCHOR78
+	.word	.LANCHOR91
+	.word	.LANCHOR84
+	.word	.LANCHOR77
+	.word	.LANCHOR62
+	.word	.LANCHOR152
+	.word	.LANCHOR153
+	.word	.LANCHOR74
+	.word	.LANCHOR68
+	.word	.LANCHOR154
+	.word	.LANCHOR79
+	.word	.LANCHOR89
+	.size	gc_init, .-gc_init
+	.section	.text.ftl_free,"ax",%progbits
+	.align	1
+	.global	ftl_free
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_free, %function
+ftl_free:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	free
+	.size	ftl_free, .-ftl_free
+	.section	.text.js_hash,"ax",%progbits
+	.align	1
+	.global	js_hash
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	js_hash, %function
+js_hash:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1664
+	add	r1, r1, r0
+	push	{r4, lr}
+.L1662:
+	cmp	r0, r1
+	bne	.L1663
+	mov	r0, r3
+	pop	{r4, pc}
+.L1663:
+	lsrs	r2, r3, #2
+	ldrb	r4, [r0], #1	@ zero_extendqisi2
+	add	r2, r2, r3, lsl #5
+	add	r2, r2, r4
+	eors	r3, r3, r2
+	b	.L1662
+.L1665:
 	.align	2
-.L1831:
-	.word	.LANCHOR137
-	.size	ftl_low_format, .-ftl_low_format
-	.section	.text.ftl_re_low_format_test,"ax",%progbits
+.L1664:
+	.word	1204201446
+	.size	js_hash, .-js_hash
+	.section	.text.timer_get_time,"ax",%progbits
 	.align	1
-	.global	ftl_re_low_format_test
+	.global	timer_get_time
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_re_low_format_test, %function
-ftl_re_low_format_test:
+	.type	timer_get_time, %function
+timer_get_time:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, lr}
-	movs	r1, #1
-	ldr	r5, .L1841
-	ldr	r0, .L1841+4
-	bl	printf
-	bl	sblk_init
-	bl	ftl_info_blk_init
-	bl	ftl_ext_info_init
-	ldr	r2, .L1841+8
-	ldr	r3, [r5]
-	ldr	r6, .L1841+12
-	ldr	r0, [r2]
-	movs	r2, #0
-	ldrh	r1, [r3, #134]
-	mov	r7, r2
-	ldrh	lr, [r6]
-	mov	ip, r2
-	add	r0, r0, r1, lsl #2
-.L1834:
-	cmp	r1, lr
-	bcc	.L1838
-	movs	r4, #0
-	strh	r7, [r3, #118]	@ movhi
-	strh	r2, [r3, #116]	@ movhi
-	movs	r0, #1
-	strh	ip, [r3, #114]	@ movhi
-	strh	r4, [r3, #122]	@ movhi
-	strh	r4, [r3, #120]	@ movhi
-	strh	r4, [r3, #124]	@ movhi
-	bl	ftl_alloc_sblk
-	mov	r1, r4
-	mov	r8, r0
-	bl	ftl_erase_sblk
-	ldr	r1, [r5]
-	mov	r0, r8
-	add	r1, r1, #672
-	bl	ftl_get_blk_list_in_sblk
-	ldr	r0, [r5]
-	movw	r2, #65533
-	ldrh	r7, [r0, #672]
-	strh	r4, [r0, #690]	@ movhi
-	subs	r3, r7, #1
-	uxth	r3, r3
-	cmp	r3, r2
-	bls	.L1839
-	movw	r2, #1366
-	ldr	r1, .L1841+16
-	ldr	r0, .L1841+20
-	bl	printf
-.L1840:
-	b	.L1840
-.L1838:
-	ldrb	r4, [r0, #2]	@ zero_extendqisi2
-	bfc	r4, #5, #3
-	strb	r4, [r0, #2]
-	ands	r4, r4, #24
-	bne	.L1835
-	add	ip, ip, #1
-	uxth	ip, ip
-.L1836:
-	adds	r1, r1, #1
-	uxth	r1, r1
-	adds	r0, r0, #4
-	b	.L1834
-.L1835:
-	cmp	r4, #16
-	itete	eq
-	addeq	r7, r7, #1
-	addne	r2, r2, #1
-	uxtheq	r7, r7
-	uxthne	r2, r2
-	b	.L1836
-.L1839:
-	strh	r4, [r0, #696]	@ movhi
-	mov	r2, #256
-	movs	r1, #255
-	add	r0, r0, #416
-	bl	ftl_memset
-	ldr	r0, [r5]
-	mov	r1, r4
-	mov	r2, #4096
-	add	r0, r0, #704
-	bl	ftl_memset
-	ldr	r3, [r5]
-	lsrs	r2, r7, #14
-	ubfx	r7, r7, #0, #14
-	mov	r1, r4
-	strh	r2, [r3, #694]	@ movhi
-	movs	r2, #1
-	strh	r2, [r3, #688]	@ movhi
-	ldr	r2, .L1841+24
-	strh	r7, [r3, #692]	@ movhi
-	strh	r8, [r3, #416]	@ movhi
-	ldrh	r2, [r2]
-	strh	r2, [r3, #698]	@ movhi
-	ldrh	r2, [r6]
-	ldr	r3, .L1841+28
-	ldr	r6, .L1841+32
-	lsls	r2, r2, #1
-	ldr	r0, [r3]
-	bl	ftl_memset
-	ldr	r0, [r6]
-	movs	r1, #2
-	adds	r0, r0, #16
-	bl	ftl_open_sblk_init
-	ldr	r0, [r6]
-	movs	r1, #3
-	adds	r0, r0, #48
-	bl	ftl_open_sblk_init
-	ldr	r3, [r5]
-	movs	r1, #255
-	ldr	r0, [r6]
-	ldrh	r2, [r3, #134]
-	adds	r0, r0, #136
-	strh	r4, [r0, #-12]	@ movhi
-	strh	r4, [r0, #-16]	@ movhi
-	strh	r2, [r0, #-10]	@ movhi
-	movw	r2, #65535
-	strh	r2, [r0, #-56]	@ movhi
-	strh	r2, [r0, #-6]	@ movhi
-	mov	r2, #-1
-	strh	r4, [r0, #-14]	@ movhi
-	str	r2, [r0, #408]
-	strh	r2, [r3, #126]	@ movhi
-	mov	r2, #256
-	bl	ftl_memset
-	ldr	r0, [r6]
-	movs	r2, #128
-	movs	r1, #255
-	add	r0, r0, #392
-	bl	ftl_memset
-	ldr	r3, [r6]
-	str	r4, [r3, #520]
-	str	r4, [r3, #524]
-	str	r4, [r3, #528]
-	bl	ftl_ext_info_flush
-	mov	r0, r4
-	bl	ftl_info_flush
-	bl	ftl_info_blk_init
-	mov	r0, r4
-	pop	{r4, r5, r6, r7, r8, pc}
-.L1842:
-	.align	2
-.L1841:
-	.word	.LANCHOR46
-	.word	.LC68
-	.word	.LANCHOR57
-	.word	.LANCHOR54
-	.word	.LANCHOR138
-	.word	.LC0
-	.word	.LANCHOR137
-	.word	.LANCHOR56
-	.word	.LANCHOR60
-	.size	ftl_re_low_format_test, .-ftl_re_low_format_test
-	.section	.text.ftl_prog_ppa_page,"ax",%progbits
+	@ link register save eliminated.
+	movs	r0, #0
+	bx	lr
+	.size	timer_get_time, .-timer_get_time
+	.section	.text.FlashCs123Init,"ax",%progbits
 	.align	1
-	.global	ftl_prog_ppa_page
+	.global	FlashCs123Init
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_prog_ppa_page, %function
-ftl_prog_ppa_page:
+	.type	FlashCs123Init, %function
+FlashCs123Init:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, lr}
-	str	r3, [sp]
-	mov	r3, r2
-	mov	r2, r1
-	ubfx	r1, r0, #0, #21
-	ubfx	r0, r0, #21, #3
-	bl	ftl_prog_page
-	add	sp, sp, #12
-	@ sp needed
-	ldr	pc, [sp], #4
-	.size	ftl_prog_ppa_page, .-ftl_prog_ppa_page
-	.section	.text.ftl_write_last_log_page,"ax",%progbits
+	@ link register save eliminated.
+	bx	lr
+	.size	FlashCs123Init, .-FlashCs123Init
+	.section	.text.rk_nand_de_init,"ax",%progbits
 	.align	1
-	.global	ftl_write_last_log_page
+	.global	rk_nand_de_init
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_write_last_log_page, %function
-ftl_write_last_log_page:
+	.type	rk_nand_de_init, %function
+rk_nand_de_init:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	mov	r5, r0
-	ldrh	r3, [r0, #6]
-	cmp	r3, #1
-	bne	.L1846
-	ldr	r3, .L1848
-	ldrh	r7, [r0, #12]
-	ldr	r4, [r3]
-	bl	ftl_get_new_free_page
-	adds	r3, r0, #1
-	mov	r6, r0
-	beq	.L1847
-	ldrh	r0, [r5]
-	add	r4, r4, r7, lsl #2
-	ldr	r5, .L1848+4
-	bl	ftl_vpn_decrement
-	ldr	r3, .L1848+8
-	mov	r0, r4
-	ldr	r2, .L1848+12
-	str	r3, [r5]
-	ldr	r3, .L1848+16
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	ldrh	r3, [r3]
-	muls	r1, r3, r1
-	lsls	r1, r1, #2
-	bl	js_hash
-	ldr	r3, .L1848+20
-	mov	r2, r5
-	str	r0, [r5, #4]
-	mov	r1, r4
-	mov	r0, r6
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	bl	ftl_prog_ppa_page
-.L1847:
-	movs	r0, #0
-	pop	{r3, r4, r5, r6, r7, pc}
-.L1846:
-	mov	r0, #-1
-	pop	{r3, r4, r5, r6, r7, pc}
-.L1849:
+	@ link register save eliminated.
+	b	zftl_flash_de_init
+	.size	rk_nand_de_init, .-rk_nand_de_init
+	.section	.text.ftl_get_density,"ax",%progbits
+	.align	1
+	.global	ftl_get_density
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_get_density, %function
+ftl_get_density:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	zftl_get_density
+	.size	ftl_get_density, .-ftl_get_density
+	.section	.text.ftl_get_capacity,"ax",%progbits
+	.align	1
+	.global	ftl_get_capacity
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_get_capacity, %function
+ftl_get_capacity:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L1671
+	ldr	r0, [r3]
+	bx	lr
+.L1672:
 	.align	2
-.L1848:
-	.word	.LANCHOR82
-	.word	.LANCHOR121
-	.word	-178307901
-	.word	.LANCHOR69
-	.word	.LANCHOR79
-	.word	.LANCHOR45
-	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
-	.section	.text.ftl_open_sblk_recovery,"ax",%progbits
+.L1671:
+	.word	.LANCHOR59
+	.size	ftl_get_capacity, .-ftl_get_capacity
+	.section	.text.rknand_print_hex,"ax",%progbits
 	.align	1
-	.global	ftl_open_sblk_recovery
+	.global	rknand_print_hex
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_open_sblk_recovery, %function
-ftl_open_sblk_recovery:
-	@ args = 0, pretend = 0, frame = 16
+	.type	rknand_print_hex, %function
+rknand_print_hex:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1922
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #56
-	mov	r4, r0
-	str	r1, [sp, #52]
+	movs	r5, #0
+	ldr	r7, .L1682
+	mov	fp, r0
+	mov	r6, r1
+	mov	r8, r2
 	mov	r10, r3
-	ldr	r2, [r3]
-	tst	r2, #4096
-	beq	.L1851
-	ldrh	r1, [r0, #2]
-	ldr	r0, .L1922+4
-	bl	printf
-.L1851:
-	ldr	r3, [r10]
-	lsls	r0, r3, #19
-	bpl	.L1852
-	ldrb	r1, [r4, #5]	@ zero_extendqisi2
-	ldr	r0, .L1922+8
+	mov	r4, r5
+.L1674:
+	cmp	r4, r10
+	bne	.L1680
+	ldr	r1, .L1682+4
+	ldr	r0, .L1682+8
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	printf
+.L1680:
+	cbnz	r5, .L1675
+	mov	r2, r4
+	mov	r1, fp
+	ldr	r0, .L1682+12
 	bl	printf
-.L1852:
-	ldr	r3, [r10]
-	lsls	r1, r3, #19
-	bpl	.L1853
-	ldrh	r1, [r4]
-	ldr	r0, .L1922+12
+.L1675:
+	cmp	r8, #4
+	bne	.L1676
+	ldr	r1, [r6, r4, lsl #2]
+.L1681:
+	mov	r0, r7
+	adds	r5, r5, #1
 	bl	printf
-.L1853:
-	ldr	r3, [r10]
-	lsls	r2, r3, #19
-	bpl	.L1854
-	ldrh	r2, [r4, #18]
-	ldrh	r1, [r4, #16]
-	ldr	r0, .L1922+16
+	cmp	r5, #15
+	bls	.L1679
+	movs	r5, #0
+	ldr	r1, .L1682+4
+	ldr	r0, .L1682+8
 	bl	printf
-.L1854:
-	ldrh	r3, [r4, #10]
-	movs	r0, #1
-	strh	r3, [r4, #14]	@ movhi
-	bl	buf_alloc
-	ldrh	r3, [r4, #2]
-	mov	r5, r0
-	ldrb	fp, [r4, #5]	@ zero_extendqisi2
-	str	r3, [sp, #44]
-	movs	r3, #0
-	str	r3, [sp, #48]
-.L1855:
-	ldr	r3, .L1922+20
-	ldr	r2, [sp, #44]
-	ldrh	r3, [r3]
-	cmp	r3, r2
-	bhi	.L1870
-.L1858:
-	ldrh	r3, [sp, #44]
-	movs	r7, #0
-	ldr	r6, .L1922+24
-	mov	r2, r7
-	ldrh	r0, [r4, #10]
-	strh	r3, [r4, #2]	@ movhi
-	ldr	r3, [r6]
-	strb	fp, [r4, #5]
-.L1871:
-	cmp	r2, r0
-	bcc	.L1873
-	ldr	r2, .L1922+20
-	ldrb	r3, [r4, #9]	@ zero_extendqisi2
-	ldr	r8, .L1922+72
-	ldrh	r2, [r2]
-	smulbb	r3, r3, r2
-	subs	r3, r3, r0
-	add	r7, r7, r3
-	ldr	r3, [r10]
-	uxth	r7, r7
-	tst	r3, #4096
-	beq	.L1874
-	ldrh	r1, [r4]
-	mov	r2, r7
-	ldr	r3, [r8]
-	ldr	r0, .L1922+28
-	ldrh	r3, [r3, r1, lsl #1]
-	bl	printf
-.L1874:
-	ldrh	r2, [r4]
-	mov	r0, r5
-	ldr	r3, [r8]
-	ldr	fp, .L1922+76
-	strh	r7, [r3, r2, lsl #1]	@ movhi
-	movs	r7, #0
-	bl	buf_free
-.L1875:
-	ldr	r3, .L1922+32
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r7, r3, lsl #1
-	bcc	.L1878
-	ldr	r3, .L1922+20
-	ldrh	r2, [r4, #12]
-	ldrb	r1, [r4, #9]	@ zero_extendqisi2
-	ldrh	r3, [r3]
-	mla	r3, r1, r3, r2
-	ldr	r2, [r6]
-	add	r3, r3, #1073741824
-	subs	r3, r3, #1
-	ldr	r3, [r2, r3, lsl #2]
-	adds	r3, r3, #1
-	beq	.L1879
-	movw	r2, #811
-	ldr	r1, .L1922+36
-	ldr	r0, .L1922+40
-	bl	printf
-.L1880:
-	b	.L1880
-.L1870:
-	ldrb	fp, [r4, #5]	@ zero_extendqisi2
-.L1856:
-	ldrb	r3, [r4, #9]	@ zero_extendqisi2
-	cmp	r3, fp
-	bhi	.L1869
-	movs	r3, #0
-	strb	r3, [r4, #5]
-	ldr	r3, [sp, #44]
-	adds	r3, r3, #1
-	uxth	r3, r3
-	str	r3, [sp, #44]
-	b	.L1855
-.L1869:
-	add	r3, fp, #8
-	ldrh	r8, [r4, r3, lsl #1]
-	movw	r3, #65535
-	cmp	r8, r3
-	beq	.L1857
-	ldr	r3, .L1922+44
-	ldr	r2, [r5, #12]
-	ldr	r1, [r5, #4]
-	ldrh	r6, [r3]
-	ldr	r3, [sp, #44]
-	mla	r6, r8, r6, r3
-	ldr	r3, .L1922+48
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	mov	r0, r6
-	bl	ftl_read_ppa_page
-	cmp	r0, #512
-	mov	r7, r0
-	beq	.L1858
-	ldr	r3, [r10]
-	lsls	r3, r3, #19
-	bpl	.L1859
-	ldr	r2, [r5, #12]
-	ldr	r3, [r5, #4]
-	ldr	r1, [r2, #12]
-	str	r1, [sp, #32]
-	ldr	r1, [r2, #8]
-	str	r1, [sp, #28]
-	ldr	r1, [r2, #4]
-	str	r1, [sp, #24]
-	mov	r1, r8
-	ldr	r2, [r2]
-	str	r2, [sp, #20]
-	ldr	r2, [r3, #12]
-	str	r2, [sp, #16]
-	ldr	r2, [r3, #8]
-	str	r2, [sp, #12]
-	ldr	r2, [r3, #4]
-	str	r2, [sp, #8]
-	ldr	r3, [r3]
-	ldr	r2, [sp, #44]
-	str	r0, [sp]
-	str	r3, [sp, #4]
-	mov	r3, r6
-	ldr	r0, .L1922+52
-	bl	printf
-.L1859:
-	ldr	r3, .L1922+56
-	mov	r8, #1
-	ldr	r2, [sp, #44]
-	ldrh	r1, [r4, #10]
-	strb	r8, [r3]
-	ldrb	r3, [r4, #9]	@ zero_extendqisi2
-	mla	r2, r3, r2, fp
-	cmp	r1, r2
-	beq	.L1860
-	movw	r2, #707
-	ldr	r1, .L1922+36
-	ldr	r0, .L1922+40
-	bl	printf
-.L1861:
-	b	.L1861
-.L1860:
-	ldrh	r2, [r4, #6]
-	add	r2, r2, r1
-	ldr	r1, .L1922+20
-	ldrh	r1, [r1]
-	muls	r3, r1, r3
-	cmp	r2, r3
-	beq	.L1862
-	mov	r2, #708
-	ldr	r1, .L1922+36
-	ldr	r0, .L1922+40
-	bl	printf
-.L1863:
-	b	.L1863
-.L1862:
-	adds	r7, r7, #1
-	beq	.L1865
-	ldr	r7, [r5, #12]
-	ldr	r0, [r7, #4]
-	adds	r6, r0, #1
-	beq	.L1865
-	bl	lpa_hash_get_ppa
-	ldr	r3, [sp, #52]
-	mov	r6, r0
-	cmp	r3, #0
-	beq	.L1867
-	ldr	r3, [r7, #8]
-	cmp	r0, r3
-	beq	.L1867
-	adds	r1, r0, #1
-	beq	.L1867
-	ldr	r3, .L1922+60
-	ldrh	r0, [r3]
-	rsb	r3, r0, #21
-	lsl	r8, r8, r3
-	ldr	r3, .L1922+64
-	lsr	r0, r6, r0
-	add	r8, r8, #-1
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	and	r0, r8, r0
-	bl	__aeabi_uidiv
-	ldr	r3, [sp, #52]
-	uxth	r0, r0
-	ldrh	r3, [r3]
-	cmp	r3, r0
-	bne	.L1867
-	ldr	r8, [r7]
-	mov	r0, r6
-	ldr	r7, .L1922+68
-	ldr	r3, .L1922+48
-	ldr	r1, [r5, #4]
-	mov	r2, r7
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	bl	ftl_read_ppa_page
-	ldr	r3, [r7]
-	cmp	r8, r3
-	bhi	.L1867
-	ldr	r3, [r5, #12]
-	ldr	r0, [r3, #8]
-	adds	r2, r0, #1
-	beq	.L1865
-	ldr	r3, .L1922+60
-	ldrh	r2, [r3]
-	movs	r3, #1
-	rsb	r1, r2, #21
-	lsls	r3, r3, r1
-	lsrs	r0, r0, r2
-	ldr	r2, .L1922+64
-	subs	r3, r3, #1
-	ands	r0, r0, r3
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	bl	__aeabi_uidiv
-	uxth	r0, r0
-	bl	ftl_vpn_decrement
-.L1865:
-	ldrh	r3, [r4, #6]
-	subs	r3, r3, #1
-	strh	r3, [r4, #6]	@ movhi
-	ldrh	r3, [r4, #10]
-	adds	r3, r3, #1
-	strh	r3, [r4, #10]	@ movhi
-	movs	r3, #1
-	str	r3, [sp, #48]
-.L1857:
-	add	fp, fp, #1
-	uxth	fp, fp
-	b	.L1856
-.L1873:
-	ldrh	r1, [r4, #12]
-	add	r1, r1, r2
-	adds	r2, r2, #1
-	ldr	r1, [r3, r1, lsl #2]
-	adds	r1, r1, #1
-	itt	ne
-	addne	r7, r7, #1
-	uxthne	r7, r7
-	b	.L1871
-.L1923:
-	.align	2
-.L1922:
-	.word	.LANCHOR22
-	.word	.LC69
-	.word	.LC70
-	.word	.LC71
-	.word	.LC72
-	.word	.LANCHOR79
-	.word	.LANCHOR82
-	.word	.LC74
-	.word	.LANCHOR69
-	.word	.LANCHOR139
-	.word	.LC0
-	.word	.LANCHOR75
-	.word	.LANCHOR45
-	.word	.LC73
-	.word	.LANCHOR133
-	.word	.LANCHOR71
-	.word	.LANCHOR70
-	.word	.LANCHOR130
-	.word	.LANCHOR56
-	.word	.LANCHOR46
-.L1878:
-	ldr	r3, [sp, #48]
-	cbz	r3, .L1876
-	ldrh	r3, [r4, #6]
-	cmp	r3, #1
-	bls	.L1876
-	mov	r0, r4
-	bl	ftl_get_new_free_page
-	ldr	r3, [r10]
-	mov	r8, r0
-	lsls	r3, r3, #19
-	bpl	.L1877
-	mov	r1, r0
-	ldr	r0, .L1924
-	bl	printf
-.L1877:
-	ldr	r3, [fp]
-	mov	r0, r8
-	ldr	r2, [r5, #12]
-	ldr	r1, [r5, #4]
-	ldr	r3, [r3, #8]
-	str	r3, [r2]
-	mov	r3, #-1
-	str	r3, [r2, #4]
-	str	r3, [r2, #8]
-	movs	r3, #0
-	str	r3, [r2, #12]
-	str	r3, [r1]
-	ldr	r3, .L1924+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	bl	ftl_prog_ppa_page
-	ldrh	r0, [r4]
-	bl	ftl_vpn_decrement
-.L1876:
-	adds	r7, r7, #1
-	b	.L1875
-.L1879:
-	ldrh	r3, [r4, #6]
-	cmp	r3, #1
-	bne	.L1850
-	mov	r0, r4
-	add	sp, sp, #56
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
-	b	ftl_write_last_log_page
-.L1867:
-	ldr	r0, [r5, #12]
-	ldr	r3, .L1924+8
-	ldr	r2, [r0, #4]
-	ldr	r3, [r3]
-	cmp	r2, r3
-	bcs	.L1865
-	ldr	r3, .L1924+12
-	ldrb	r1, [r4, #9]	@ zero_extendqisi2
-	ldrh	r2, [r4, #10]
-	ldrh	r3, [r3]
-	muls	r3, r1, r3
-	subs	r3, r3, #1
-	cmp	r2, r3
-	bge	.L1865
-	ldr	r3, .L1924+16
-	ldr	r6, [r0]
-	ldr	r3, [r3]
-	ldr	r1, [r3, #8]
-	cmp	r6, r1
-	it	hi
-	strhi	r6, [r3, #8]
-	ldrh	r3, [r4, #12]
-	ldr	r1, [r0, #8]
-	ldr	r0, [r0, #4]
-	add	r2, r2, r3
-	uxth	r2, r2
-	bl	lpa_hash_update_ppa
-	b	.L1865
-.L1850:
-	add	sp, sp, #56
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1925:
+.L1679:
+	adds	r4, r4, #1
+	b	.L1674
+.L1676:
+	cmp	r8, #2
+	ite	eq
+	ldrsheq	r1, [r6, r4, lsl #1]
+	ldrbne	r1, [r6, r4]	@ zero_extendqisi2
+	b	.L1681
+.L1683:
 	.align	2
-.L1924:
-	.word	.LC75
-	.word	.LANCHOR45
-	.word	.LANCHOR47
-	.word	.LANCHOR79
-	.word	.LANCHOR46
-	.size	ftl_open_sblk_recovery, .-ftl_open_sblk_recovery
-	.section	.text.pm_write_page,"ax",%progbits
+.L1682:
+	.word	.LC95
+	.word	.LC96
+	.word	.LC97
+	.word	.LC94
+	.size	rknand_print_hex, .-rknand_print_hex
+	.section	.text.hynix_get_read_retry_default,"ax",%progbits
 	.align	1
-	.global	pm_write_page
+	.global	hynix_get_read_retry_default
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	pm_write_page, %function
-pm_write_page:
-	@ args = 0, pretend = 0, frame = 0
+	.type	hynix_get_read_retry_default, %function
+hynix_get_read_retry_default:
+	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
+	ldr	r3, .L1795
+	cmp	r0, #2
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #56
+	mov	r1, #173
+	mov	r2, #174
 	mov	r4, r0
-	ldr	r7, .L1937
-	mov	r8, r1
-	mov	r6, r7
-.L1932:
-	ldr	r3, [r7]
-	ldr	r2, [r3, #48]
-	ldrh	r1, [r3, #696]
-	adds	r2, r2, #1
-	str	r2, [r3, #48]
-	ldr	r2, .L1937+4
-	ldrh	r2, [r2]
-	cmp	r1, r2
-	bcs	.L1928
-	ldrh	r2, [r3, #692]
-	movw	r3, #65535
-	cmp	r2, r3
-	bne	.L1929
-.L1928:
-	bl	pm_alloc_new_blk
-	movs	r0, #0
-	bl	ftl_info_flush
-.L1929:
-	ldr	r2, [r6]
-	movw	r1, #65535
-	ldrh	r3, [r2, #692]
-	cmp	r3, r1
-	bne	.L1930
-	movs	r2, #224
-	ldr	r1, .L1937+8
-	ldr	r0, .L1937+12
-	bl	printf
-.L1931:
-	b	.L1931
-.L1930:
-	ldr	r1, .L1937+16
-	ldrh	r2, [r2, #696]
-	ldr	r10, .L1937+28
-	ldrh	r5, [r1]
-	movs	r1, #0
-	ldr	r0, [r10]
-	mla	r5, r3, r5, r2
-	movs	r2, #64
-	bl	ftl_memset
-	ldr	r2, [r6]
-	ldr	r3, [r10]
-	ldrb	r0, [r2, #694]	@ zero_extendqisi2
-	str	r4, [r3]
-	ldr	r1, [r2, #48]
-	ldr	r2, .L1937+20
-	str	r1, [r3, #4]
-	mov	r1, r5
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	str	r2, [sp]
-	mov	r2, r8
-	bl	ftl_prog_page
-	ldr	r2, [r6]
-	ldrh	r3, [r2, #696]
+	ldr	fp, [r3]
+	add	r3, fp, #128
+	strb	r0, [fp, #112]
+	str	r3, [sp]
+	mov	r3, #172
+	strb	r3, [fp, #128]
+	mov	r3, #175
+	strb	r1, [fp, #129]
+	strb	r2, [fp, #130]
+	strb	r3, [fp, #131]
+	bne	.L1685
+	movs	r3, #167
+	mov	r8, #7
+	strb	r3, [fp, #128]
+	movs	r2, #247
+	ldr	r3, .L1795+4
+	strb	r2, [r3, #17]
+.L1789:
+	mov	r10, #4
+	b	.L1686
+.L1685:
+	cmp	r0, #3
+	bne	.L1687
+	add	r2, fp, #127
+	movs	r3, #176
+.L1688:
+	strb	r3, [r2, #1]!
 	adds	r3, r3, #1
-	uxth	r3, r3
+	uxtb	r3, r3
+	cmp	r3, #184
+	bne	.L1688
+.L1790:
+	mov	r8, #8
+	mov	r10, r8
+.L1686:
+	subs	r3, r4, #1
 	cmp	r3, #1
-	strh	r3, [r2, #696]	@ movhi
-	beq	.L1932
-	adds	r0, r0, #1
-	bne	.L1933
-.L1927:
-	mov	r1, r5
-	ldr	r0, .L1937+24
-	bl	printf
-	b	.L1932
-.L1933:
-	ldrh	r3, [r2, #698]
-	movs	r0, #0
-	cmp	r4, r3
-	itt	cc
-	addcc	r4, r4, #176
-	strcc	r5, [r2, r4, lsl #2]
-	add	sp, sp, #12
+	bhi	.L1694
+	movs	r5, #0
+.L1695:
+	ldr	r3, .L1795+8
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	uxtb	r3, r5
+	cmp	r2, r3
+	bhi	.L1700
+.L1701:
+	strb	r10, [fp, #113]
+	strb	r8, [fp, #114]
+	add	sp, sp, #56
 	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L1938:
-	.align	2
-.L1937:
-	.word	.LANCHOR46
-	.word	.LANCHOR79
-	.word	.LANCHOR140
-	.word	.LC0
-	.word	.LANCHOR75
-	.word	.LANCHOR45
-	.word	.LC76
-	.word	.LANCHOR141
-	.size	pm_write_page, .-pm_write_page
-	.section	.text.flash_info_flush,"ax",%progbits
-	.align	1
-	.global	flash_info_flush
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	flash_info_flush, %function
-flash_info_flush:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r2, #64
-	ldr	r5, .L1947
-	movs	r1, #0
-	movs	r7, #0
-	ldr	r6, .L1947+4
-	ldr	r0, [r5]
-	bl	ftl_memset
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1687:
+	cmp	r0, #4
+	bne	.L1689
+	movs	r0, #204
+	strb	r1, [fp, #133]
+	strb	r0, [fp, #128]
+	movs	r0, #191
+	strb	r0, [fp, #129]
+	movs	r0, #170
+	strb	r0, [fp, #130]
+	movs	r0, #171
+	strb	r0, [fp, #131]
+	movs	r0, #205
+	strb	r0, [fp, #132]
+	strb	r2, [fp, #134]
+	strb	r3, [fp, #135]
+	b	.L1790
+.L1689:
+	cmp	r0, #5
+	bne	.L1690
+	movs	r3, #56
+	mov	r8, #8
+	strb	r3, [fp, #128]
+	movs	r3, #57
+	strb	r3, [fp, #129]
+	movs	r3, #58
+	strb	r3, [fp, #130]
+	movs	r3, #59
+	strb	r3, [fp, #131]
+	b	.L1789
+.L1690:
+	cmp	r0, #6
+	bne	.L1691
+	movs	r3, #14
+	mov	r8, #12
+	strb	r3, [fp, #128]
+	movs	r3, #15
+	strb	r3, [fp, #129]
 	movs	r3, #16
-	movs	r2, #4
-	ldr	r1, [r6]
-	ldr	r0, .L1947+8
-	bl	rknand_print_hex
-	ldr	r4, [r6]
-	ldr	r1, [r4, #8]
-	add	r0, r4, #16
-	bl	js_hash
-	str	r5, [sp, #8]
-	ldr	r5, .L1947+12
-	str	r0, [r4, #12]
-	mov	r8, r5
-.L1940:
-	ldr	fp, .L1947+32
-	ldrb	r10, [r5]	@ zero_extendqisi2
-	ldrh	r4, [r5, #2]
-	ldrh	r3, [fp]
-	mov	r1, r10
-	ldr	r0, .L1947+16
-	mov	r2, r4
-	str	r3, [sp, #12]
-	bl	printf
-	ldr	r2, .L1947+20
-	ldrh	r0, [r5, #2]
-	ldr	r3, [sp, #12]
-	ldrh	r2, [r2]
-	subs	r2, r2, #1
-	cmp	r0, r2
-	blt	.L1941
-	ldr	r4, [r6]
-	mov	r10, #0
-	ldrb	r2, [r5]	@ zero_extendqisi2
-	strh	r10, [r5, #2]	@ movhi
-	ldr	r3, [r4, #4]
-	mov	r0, r4
-	ldr	r1, [r4, #8]
+	strb	r3, [fp, #130]
+	movs	r3, #17
+	strb	r3, [fp, #131]
+	b	.L1789
+.L1691:
+	cmp	r0, #7
+	bne	.L1692
+	add	r2, fp, #127
+	movs	r3, #176
+.L1693:
+	strb	r3, [r2, #1]!
 	adds	r3, r3, #1
-	str	r3, [r4, #4]
-	ldrb	r3, [r5, #1]	@ zero_extendqisi2
-	strb	r2, [r5, #1]
-	ldrh	r2, [r4, #16]
-	strb	r3, [r5]
-	str	r3, [sp, #12]
+	uxtb	r3, r3
+	cmp	r3, #184
+	bne	.L1693
+	movs	r3, #212
+	mov	r8, #12
+	strb	r3, [fp, #136]
+	movs	r3, #213
+	strb	r3, [fp, #137]
+	mov	r10, #10
+	b	.L1686
+.L1692:
+	cmp	r0, #8
+	mov	r3, #7
+	bne	.L1748
+	strb	r3, [fp, #129]
+	movs	r3, #9
+	movs	r2, #6
+	strb	r3, [fp, #131]
+	movs	r3, #10
+	strb	r2, [fp, #128]
+	strb	r0, [fp, #130]
+	mov	r8, #50
+	strb	r3, [fp, #132]
+	mov	r10, #5
+	b	.L1686
+.L1748:
+	mov	r8, r3
+	b	.L1789
+.L1700:
+	ldr	r2, .L1795+12
+	movs	r1, #160
+	ldr	r0, [sp]
+	add	r7, r10, #-1
+	add	r6, fp, #127
+	ldrb	r3, [r2, r3]	@ zero_extendqisi2
+	ldr	r2, .L1795+16
+	uxtab	r7, r0, r7
+	ldr	r4, [r2]
+	mla	r1, r1, r3, fp
+	add	r4, r4, r3, lsl #8
+	adds	r1, r1, #144
+	subs	r2, r1, #1
+	addw	r3, r4, #2056
+.L1696:
+	str	r2, [sp, #8]
+	movs	r2, #55
+	str	r2, [r3]
+	ldrb	r0, [r6, #1]!	@ zero_extendqisi2
+	str	r3, [sp, #4]
+	str	r0, [r4, #2052]
+	movs	r0, #80
+	bl	timer_delay_ns
+	ldr	r0, [r4, #2048]
+	cmp	r7, r6
+	ldr	r2, [sp, #8]
+	ldr	r3, [sp, #4]
+	strb	r0, [r2, #1]!
+	bne	.L1696
+	ldr	r7, .L1795+4
+	mov	r0, r1
+	movs	r2, #0
+.L1697:
+	movs	r3, #1
+	adds	r6, r7, r2
+.L1698:
+	ldrb	r4, [r6, r3, lsl #2]	@ zero_extendqisi2
+	ldrb	ip, [r0]	@ zero_extendqisi2
+	add	r4, r4, ip
+	strb	r4, [r0, r3, lsl #3]
+	adds	r3, r3, #1
+	cmp	r3, #7
+	bne	.L1698
 	adds	r2, r2, #1
-	strh	r2, [r0, #16]!	@ movhi
-	bl	js_hash
-	ldr	r3, [sp, #12]
-	str	r0, [r4, #12]
-	mov	r0, r10
-	ldrh	r4, [fp]
-	muls	r4, r3, r4
-	mov	r1, r4
-.L1946:
-	bl	flash_erase_block
-.L1942:
-	ldr	r2, [r6]
-	mov	r10, #1
-	ldr	r3, [sp, #8]
-	movs	r0, #0
-	ldr	r1, [r2, #4]
-	ldr	r3, [r3]
-	str	r1, [r3]
-	ldr	r1, .L1947+24
-	str	r1, [r3, #4]
-	movs	r1, #4
-	stm	sp, {r1, r10}
-	mov	r1, r4
-	bl	flash_prog_page_en
-	ldrh	r3, [r8, #2]
 	adds	r0, r0, #1
-	add	r3, r3, r10
-	strh	r3, [r8, #2]	@ movhi
-	bne	.L1943
-	mov	r1, r4
-	ldr	r0, .L1947+28
-	bl	printf
-	b	.L1940
-.L1945:
-	mov	r7, r10
-	b	.L1940
-.L1941:
-	mla	r4, r10, r3, r4
-	cmp	r0, #0
-	bne	.L1942
-	mov	r1, r4
-	b	.L1946
-.L1943:
-	cmp	r7, #0
-	beq	.L1945
-	movs	r0, #0
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1948:
-	.align	2
-.L1947:
-	.word	.LANCHOR116
-	.word	.LANCHOR5
-	.word	.LC77
-	.word	.LANCHOR117
-	.word	.LC78
-	.word	.LANCHOR97
-	.word	1398362953
-	.word	.LC79
-	.word	.LANCHOR13
-	.size	flash_info_flush, .-flash_info_flush
-	.section	.text.nand_flash_init,"ax",%progbits
-	.align	1
-	.global	nand_flash_init
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	nand_flash_init, %function
-nand_flash_init:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r5, #0
-	ldr	r8, .L2005+140
-	movs	r2, #2
-	ldr	r3, .L2005
-	ldr	r7, .L2005+4
-	mov	r6, r8
-	ldr	r4, .L2005+8
-	strb	r2, [r3]
-	bl	nandc_init
-	str	r4, [r7]
-.L1955:
-	lsl	r10, r5, #3
-	uxtb	r0, r5
-	add	r1, r8, r10
-	bl	flash_read_id
-	cbnz	r5, .L1950
-	ldrb	r3, [r8]	@ zero_extendqisi2
-	subs	r3, r3, #1
-	uxtb	r3, r3
-	cmp	r3, #253
-	bls	.L1951
-.L1953:
-	mvn	r0, #1
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1951:
-	ldrb	r3, [r8, #1]	@ zero_extendqisi2
-	cmp	r3, #255
-	beq	.L1953
-.L1950:
-	ldrb	r3, [r6, r10]	@ zero_extendqisi2
+	cmp	r2, #4
+	bne	.L1697
+	movs	r3, #0
 	adds	r5, r5, #1
-	cmp	r3, #181
-	itt	eq
-	moveq	r3, #44
-	strbeq	r3, [r6, r10]
-	cmp	r5, #4
-	bne	.L1955
-	ldr	r5, .L2005+12
-	mov	r8, #0
-	ldr	r10, .L2005+140
-.L1958:
-	ldrb	r2, [r5, #-1]	@ zero_extendqisi2
-	mov	r1, r10
-	mov	r0, r5
-	lsl	fp, r8, #5
-	bl	flash_mem_cmp8
-	cmp	r0, #0
-	bne	.L1956
-	ldr	r5, .L2005+16
-	ldr	r3, .L2005+20
-	add	r5, r5, fp
-	ldrb	r2, [r5, #22]	@ zero_extendqisi2
-	mov	r1, r3
-.L1957:
-	lsl	ip, r0, #5
-	ldrb	ip, [ip, r3]	@ zero_extendqisi2
-	cmp	ip, r2
-	beq	.L1959
-	adds	r0, r0, #1
-	cmp	r0, #4
-	bne	.L1957
-.L1959:
-	add	r1, r1, r0, lsl #5
-	movs	r2, #32
-	ldr	r0, .L2005+24
-	bl	ftl_memcpy
-	movs	r2, #32
-	mov	r1, r5
-	ldr	r0, .L2005+8
-	bl	ftl_memcpy
-	ldr	r2, .L2005+28
-	ldrb	r3, [r2]	@ zero_extendqisi2
-	mov	r8, r2
-	cmp	r3, #8
-	bhi	.L1960
-	ldrb	r2, [r4, #20]	@ zero_extendqisi2
-	cmp	r2, #60
-	bls	.L1961
-	movs	r2, #60
-	strb	r2, [r4, #20]
-.L1961:
-	cmp	r3, #8
-	bne	.L1960
-	ldrb	r3, [r6]	@ zero_extendqisi2
-	cmp	r3, #44
-	bne	.L1960
-	ldrb	r3, [r4, #28]	@ zero_extendqisi2
-	cmp	r3, #2
-	itt	eq
-	moveq	r3, #0
-	strbeq	r3, [r4, #28]
-.L1960:
-	mov	r0, #16384
-	ldr	r6, .L2005+32
-	bl	ftl_malloc
-	ldr	r3, .L2005+36
-	mov	r10, #0
-	str	r0, [r3]
-	mov	r0, #16384
-	bl	ftl_malloc
-	ldr	r3, .L2005+40
-	str	r0, [r3]
-	mov	r0, #2048
-	bl	ftl_malloc
-	str	r0, [r6]
-	movs	r0, #64
-	bl	ftl_malloc
-	ldr	r3, .L2005+44
-	str	r0, [r3]
-	movs	r0, #64
-	bl	ftl_malloc
-	ldr	r3, .L2005+48
-	str	r0, [r3]
-	movs	r0, #64
-	bl	ftl_malloc
-	ldr	r3, .L2005+52
-	str	r0, [r3]
-	ldr	r3, .L2005+56
-	strb	r10, [r3]
-	bl	flash_die_info_init
-	ldrb	r0, [r4, #18]	@ zero_extendqisi2
-	bl	flash_lsb_page_tbl_build
-	ldrb	r0, [r4, #20]	@ zero_extendqisi2
-	bl	nandc_bch_sel
-	ldr	r2, [r7]
-	ldr	r7, .L2005+60
-	ldrh	r3, [r2, #16]
-	ubfx	r5, r3, #3, #1
-	lsrs	r1, r3, #8
-	and	r0, r1, #7
-	strb	r0, [r7]
-	ldr	r0, .L2005+64
-	strb	r5, [r0]
-	ubfx	r5, r3, #4, #1
-	ldr	r0, .L2005+68
-	strb	r5, [r0]
-	ubfx	r5, r3, #12, #1
-	ldr	r0, .L2005+72
-	strb	r5, [r0]
-	ubfx	r5, r3, #13, #1
-	ldr	r0, .L2005+76
-	ubfx	r3, r3, #14, #1
-	strb	r5, [r0]
-	ldr	r0, .L2005+80
-	ldr	r5, .L2005+84
-	strb	r3, [r0]
-	movs	r0, #60
-	ldrb	r3, [r2, #28]	@ zero_extendqisi2
-	ldr	r2, .L2005+88
-	str	r10, [r5]
-	strb	r3, [r2]
-	ldr	r2, .L2005+92
-	strb	r0, [r2]
-	ldrb	r0, [r8]	@ zero_extendqisi2
-	cmp	r0, #9
-	itt	eq
-	moveq	r0, #70
-	strbeq	r0, [r2]
-	ldr	r2, .L2005+96
-	ldrh	r0, [r4, #16]
-	strb	r3, [r2]
-	ldrb	r3, [r4, #19]	@ zero_extendqisi2
-	tst	r0, #64
-	ldr	r2, .L2005+100
-	strb	r3, [r2]
-	mov	r4, r2
-	beq	.L1964
-	sub	r2, r3, #17
-	cmp	r2, #2
-	bhi	.L1965
-	ldr	r2, .L2005+104
-	cmp	r3, #19
-	ldr	r3, .L2005+108
-	str	r2, [r5]
-	ite	ne
-	movne	r2, #7
-	moveq	r2, #15
-.L2003:
-	strb	r2, [r3]
-.L1964:
-	ldr	r3, .L2005+112
-	tst	r1, #1
-	mov	r2, #0
-	mov	r0, #4
-	strb	r2, [r3]
-	mov	r8, r3
-	beq	.L1975
-	bl	nandc_set_if_mode
-	movs	r0, #1
-	bl	flash_set_interface_mode
-	movs	r0, #1
-.L1975:
-	bl	nandc_set_if_mode
-	bl	flash_info_blk_init
-	adds	r2, r0, #1
-	beq	.L1949
-	ldrb	r3, [r4]	@ zero_extendqisi2
-	subs	r3, r3, #1
-	cmp	r3, #6
-	itt	ls
-	ldrls	r3, .L2005+116
-	strls	r3, [r5]
-	ldrb	r3, [r7]	@ zero_extendqisi2
-	lsls	r3, r3, #29
-	bmi	.L1978
-.L1979:
-	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1956:
-	add	r8, r8, #1
-	adds	r5, r5, #32
-	cmp	r8, #24
-	bne	.L1958
-	b	.L1953
-.L1965:
-	cmp	r3, #33
-	beq	.L1968
-	sub	r2, r3, #65
-	cmp	r2, #1
-	bhi	.L1969
-.L1968:
-	ldr	r3, .L2005+120
+	strb	r3, [r1, #16]
+	strb	r3, [r1, #24]
+	strb	r3, [r1, #32]
+	strb	r3, [r1, #40]
+	strb	r3, [r1, #48]
+	strb	r3, [r1, #41]
+	strb	r3, [r1, #49]
+	b	.L1695
+.L1694:
+	subs	r3, r4, #3
+	cmp	r3, #5
+	bhi	.L1701
+	smulbb	r3, r8, r10
+	asrs	r2, r3, #1
+	lsls	r3, r3, #4
+	str	r3, [sp, #48]
+	lsls	r3, r2, #2
+	str	r2, [sp, #8]
+	str	r3, [sp, #44]
+	lsls	r3, r2, #1
+	str	r3, [sp, #24]
+	movs	r3, #0
+.L1794:
+	str	r3, [sp, #20]
+	ldr	r3, .L1795+8
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	ldrb	r3, [sp, #20]	@ zero_extendqisi2
+	cmp	r2, r3
+	bls	.L1701
+	ldr	r2, .L1795+12
+	movs	r6, #255
+	ldrb	r3, [r2, r3]	@ zero_extendqisi2
+	mov	r0, r3
+	str	r3, [sp]
+	bl	zftl_flash_exit_slc_mode
+	ldr	r3, [sp]
+	movs	r1, #160
+	ldr	r2, [sp]
+	mla	r1, r1, r3, fp
+	add	r3, r1, #144
+	str	r3, [sp, #40]
+	ldr	r3, .L1795+16
+	ldr	r3, [r3]
+	str	r3, [sp, #4]
+	add	r5, r3, r2, lsl #8
+	str	r6, [r5, #2056]
+	bl	nandc_wait_flash_ready
+	cmp	r4, #8
+	bne	.L1703
+	add	r3, fp, #144
+	movs	r2, #23
+	str	r3, [sp, #40]
+	movs	r3, #120
+	str	r3, [r5, #2056]
+	movs	r3, #0
+	str	r3, [r5, #2052]
+	movs	r1, #25
+	str	r3, [r5, #2052]
+	str	r3, [r5, #2052]
+	str	r2, [r5, #2056]
 	movs	r2, #4
-	str	r3, [r5]
-	ldr	r3, .L2005+124
-	strb	r2, [r3]
-.L2004:
-	movs	r2, #7
-	ldr	r3, .L2005+108
-	b	.L2003
-.L1969:
-	sub	r2, r3, #67
-	uxtb	r2, r2
-	cmp	r2, #1
-	bls	.L1970
-	sub	r0, r3, #34
-	cmp	r0, #1
-	bhi	.L1971
-.L1970:
-	ldr	r0, .L2005+120
-	cmp	r3, #35
-	str	r0, [r5]
-	ldr	r0, .L2005+108
-	beq	.L1972
-	cmp	r3, #68
-	beq	.L1972
-	movs	r3, #7
-.L2002:
-	cmp	r2, #1
-	strb	r3, [r0]
-	it	ls
-	movls	r2, #4
-	ldr	r3, .L2005+124
-	it	hi
-	movhi	r2, #5
-	b	.L2003
-.L1972:
-	movs	r3, #17
-	b	.L2002
-.L1971:
-	subs	r3, r3, #36
+	str	r2, [r5, #2056]
+	str	r1, [r5, #2056]
+	movs	r1, #218
+	str	r1, [r5, #2056]
+	movs	r1, #21
+	str	r3, [r5, #2056]
+	str	r3, [r5, #2052]
+	str	r3, [r5, #2052]
+	str	r1, [r5, #2052]
+	str	r2, [r5, #2052]
+	str	r3, [r5, #2052]
+.L1704:
+	ldm	sp, {r2, r3}
+	add	r3, r3, r2, lsl #8
+	movs	r2, #48
+	str	r2, [r3, #2056]
+	bl	nandc_wait_flash_ready
+	subs	r3, r4, #5
 	cmp	r3, #1
-	bhi	.L1964
-	ldr	r3, .L2005+128
-	str	r3, [r5]
-	b	.L2004
-.L1978:
-	ldr	r3, [r6]
-	ldrb	r3, [r3, #19]	@ zero_extendqisi2
-	cmp	r3, #0
-	beq	.L1979
-	ldr	r2, .L2005+132
-	movs	r0, #0
-	ldr	r3, .L2005+136
-	ldrh	r1, [r2]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	muls	r1, r3, r1
-	bl	flash_ddr_para_scan
-	ldrb	r4, [r8]	@ zero_extendqisi2
-	cmp	r4, #0
-	bne	.L1979
-	ldr	r3, [r6]
-	strb	r4, [r3, #19]
-	bl	flash_info_flush
-	b	.L1979
-.L1949:
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2006:
+	str	r3, [sp, #28]
+	bls	.L1750
+	cmp	r4, #8
+	beq	.L1750
+	cmp	r4, #7
+	ite	ne
+	movne	r2, #2
+	moveq	r2, #32
+.L1710:
+	ldr	r3, .L1795+20
+	subs	r2, r2, #1
+	ldr	r5, [sp, #4]
+	ldr	r6, [sp]
+	ldr	r3, [r3]
+	add	r7, r5, r6, lsl #8
+	subs	r1, r3, #1
+	uxtab	r2, r3, r2
+	mov	r0, r1
+.L1711:
+	ldr	r5, [r7, #2048]
+	strb	r5, [r0, #1]!
+	cmp	r2, r0
+	bne	.L1711
+	cmp	r4, #8
+	bne	.L1712
+	movs	r2, #0
+.L1714:
+	ldrb	r0, [r3, r2, lsl #2]	@ zero_extendqisi2
+	uxtb	r1, r2
+	cmp	r0, #50
+	beq	.L1713
+	add	r0, r3, r2, lsl #2
+	ldrb	r0, [r0, #1]	@ zero_extendqisi2
+	cmp	r0, #5
+	beq	.L1713
+	adds	r2, r2, #1
+	cmp	r2, #8
+	bne	.L1714
+.L1715:
+	movs	r1, #0
+	ldr	r0, .L1795+24
+	bl	printf
+.L1717:
+	b	.L1717
+.L1703:
+	cmp	r4, #4
+	mov	r3, #54
+	str	r3, [r5, #2056]
+	bne	.L1705
+	movs	r3, #64
+	str	r6, [r5, #2052]
+	str	r3, [r5, #2048]
+	movs	r3, #204
+.L1791:
+	str	r3, [r5, #2052]
+	movs	r3, #77
+	b	.L1792
+.L1796:
 	.align	2
-.L2005:
-	.word	.LANCHOR20
-	.word	.LANCHOR34
-	.word	.LANCHOR19
-	.word	.LANCHOR142+1
-	.word	.LANCHOR142
-	.word	.LANCHOR143
-	.word	.LANCHOR103
-	.word	.LANCHOR7
-	.word	.LANCHOR5
-	.word	.LANCHOR119
-	.word	.LANCHOR111
-	.word	.LANCHOR118
-	.word	.LANCHOR112
-	.word	.LANCHOR116
-	.word	.LANCHOR123
-	.word	.LANCHOR25
-	.word	.LANCHOR144
-	.word	.LANCHOR23
-	.word	.LANCHOR66
-	.word	.LANCHOR74
-	.word	.LANCHOR12
-	.word	.LANCHOR115
-	.word	.LANCHOR11
-	.word	.LANCHOR145
-	.word	.LANCHOR146
-	.word	.LANCHOR1
-	.word	micron_read_retrial
-	.word	.LANCHOR113
-	.word	.LANCHOR35
-	.word	hynix_read_retrial
-	.word	toshiba_read_retrial
-	.word	.LANCHOR4
-	.word	toshiba_3d_read_retrial
+.L1795:
+	.word	.LANCHOR27
+	.word	.LANCHOR155
+	.word	.LANCHOR18
+	.word	.LANCHOR30
 	.word	.LANCHOR13
-	.word	.LANCHOR117
-	.word	.LANCHOR26
-	.size	nand_flash_init, .-nand_flash_init
-	.section	.text.ftl_sysblk_dump,"ax",%progbits
+	.word	.LANCHOR156
+	.word	.LC98
+.L1705:
+	subs	r3, r4, #5
+	cmp	r3, #1
+	bhi	.L1707
+	ldrb	r3, [fp, #128]	@ zero_extendqisi2
+	str	r3, [r5, #2052]
+	movs	r3, #82
+.L1792:
+	str	r3, [r5, #2048]
+.L1706:
+	ldm	sp, {r2, r3}
+	cmp	r4, #6
+	add	r3, r3, r2, lsl #8
+	mov	r2, #22
+	str	r2, [r3, #2056]
+	mov	r2, #23
+	str	r2, [r3, #2056]
+	mov	r2, #4
+	str	r2, [r3, #2056]
+	mov	r2, #25
+	str	r2, [r3, #2056]
+	mov	r2, #0
+	str	r2, [r3, #2056]
+	str	r2, [r3, #2052]
+	str	r2, [r3, #2052]
+	it	eq
+	moveq	r2, #31
+	str	r2, [r3, #2052]
+	movs	r2, #2
+	str	r2, [r3, #2052]
+	movs	r2, #0
+	str	r2, [r3, #2052]
+	b	.L1704
+.L1707:
+	cmp	r4, #7
+	bne	.L1706
+	movs	r3, #174
+	str	r3, [r5, #2052]
+	movs	r3, #0
+	str	r3, [r5, #2048]
+	movs	r3, #176
+	b	.L1791
+.L1750:
+	movs	r2, #16
+	b	.L1710
+.L1713:
+	cmp	r1, #6
+	bhi	.L1715
+.L1716:
+	ldr	r3, .L1797
+	ldr	ip, [r3]
+	mov	r3, ip
+.L1726:
+	ldr	r1, [sp, #48]
+	sub	r2, r3, ip
+	cmp	r1, r2
+	bgt	.L1727
+	ldr	r3, .L1797
+	ldr	r1, [r3]
+	ldr	r3, [sp, #24]
+	adds	r2, r1, r3
+	movs	r3, #8
+.L1729:
+	mov	r5, r2
+	movs	r0, #0
+.L1728:
+	ldrh	r6, [r5]
+	adds	r0, r0, #1
+	mvns	r6, r6
+	strh	r6, [r5], #2	@ movhi
+	ldr	r6, [sp, #8]
+	cmp	r6, r0
+	bgt	.L1728
+	ldr	r0, [sp, #44]
+	subs	r3, r3, #1
+	add	r2, r2, r0
+	bne	.L1729
+	mov	r6, r1
+	str	r3, [sp, #16]
+.L1730:
+	movs	r0, #0
+	mov	r2, r0
+.L1734:
+	movs	r3, #1
+	mov	lr, r6
+	lsl	r5, r3, r2
+	movs	r3, #0
+	str	r3, [sp, #12]
+	str	r5, [sp, #32]
+	movs	r5, #16
+	str	r5, [sp, #36]
+.L1732:
+	ldrh	r3, [lr]
+	str	r3, [sp, #52]
+	ldr	r3, [sp, #32]
+	mov	r5, r3
+	ldr	r3, [sp, #52]
+	bics	r3, r5, r3
+	ittt	eq
+	ldreq	r3, [sp, #12]
+	addeq	r3, r3, #1
+	streq	r3, [sp, #12]
+	ldr	r3, [sp, #24]
+	add	lr, lr, r3
+	ldr	r3, [sp, #36]
+	subs	r3, r3, #1
+	str	r3, [sp, #36]
+	bne	.L1732
+	ldr	r3, [sp, #12]
+	adds	r2, r2, #1
+	cmp	r3, #8
+	ittt	hi
+	ldrhi	r3, [sp, #32]
+	orrhi	r0, r0, r3
+	uxthhi	r0, r0
+	cmp	r2, #16
+	bne	.L1734
+	ldr	r3, [sp, #16]
+	strh	r0, [r6], #2	@ movhi
+	adds	r3, r3, #1
+	str	r3, [sp, #16]
+	ldr	r2, [sp, #16]
+	ldr	r3, [sp, #8]
+	cmp	r3, r2
+	bgt	.L1730
+	subs	r2, r1, #4
+	add	r0, r1, #28
+	movs	r3, #0
+.L1737:
+	ldr	r5, [r2, #4]!
+	cbnz	r5, .L1736
+	adds	r3, r3, #1
+.L1736:
+	cmp	r0, r2
+	bne	.L1737
+	cmp	r3, #7
+	ble	.L1738
+	ldr	r0, .L1797+4
+	mov	r3, #1024
+	movs	r2, #1
+	bl	rknand_print_hex
+	movs	r1, #0
+	ldr	r0, .L1797+8
+	bl	printf
+.L1739:
+	b	.L1739
+.L1712:
+	cmp	r4, #7
+	bne	.L1718
+	movs	r2, #0
+.L1720:
+	ldrb	r0, [r3, r2, lsl #2]	@ zero_extendqisi2
+	uxtb	r1, r2
+	cmp	r0, #12
+	beq	.L1719
+	add	r0, r3, r2, lsl #2
+	ldrb	r0, [r0, #1]	@ zero_extendqisi2
+	cmp	r0, #10
+	beq	.L1719
+	adds	r2, r2, #1
+	cmp	r2, #8
+	bne	.L1720
+.L1721:
+	movs	r1, #0
+	ldr	r0, .L1797+8
+	bl	printf
+.L1722:
+	b	.L1722
+.L1719:
+	cmp	r1, #6
+	bls	.L1716
+	b	.L1721
+.L1718:
+	cmp	r4, #6
+	bne	.L1716
+	adds	r3, r3, #7
+.L1723:
+	ldrb	r2, [r1, #1]!	@ zero_extendqisi2
+	cmp	r2, #12
+	beq	.L1716
+	ldrb	r2, [r1, #8]	@ zero_extendqisi2
+	cmp	r2, #4
+	beq	.L1716
+	cmp	r3, r1
+	bne	.L1723
+	movs	r1, #0
+	ldr	r0, .L1797+8
+	bl	printf
+.L1725:
+	b	.L1725
+.L1727:
+	ldr	r2, [r7, #2048]
+	strb	r2, [r3], #1
+	b	.L1726
+.L1738:
+	cmp	r4, #6
+	beq	.L1752
+	cmp	r4, #7
+	beq	.L1753
+	cmp	r4, #8
+	ite	ne
+	movne	r0, #8
+	moveq	r0, #5
+.L1740:
+	add	r3, r10, #-1
+	ldr	r1, [sp, #40]
+	uxtb	r3, r3
+	movs	r5, #0
+	adds	r3, r3, #1
+.L1741:
+	mov	lr, r1
+	mov	r2, ip
+.L1742:
+	ldrb	r6, [r2], #1	@ zero_extendqisi2
+	strb	r6, [lr], #1
+	sub	r6, r2, ip
+	uxtb	r6, r6
+	cmp	r10, r6
+	bhi	.L1742
+	adds	r5, r5, #1
+	add	ip, ip, r3
+	cmp	r8, r5
+	add	r1, r1, r0
+	bgt	.L1741
+	ldm	sp, {r2, r3}
+	movs	r6, #255
+	add	r5, r3, r2, lsl #8
+	str	r6, [r5, #2056]
+	bl	nandc_wait_flash_ready
+	ldr	r3, [sp, #28]
+	cmp	r3, #1
+	bhi	.L1744
+	movs	r3, #54
+	movs	r2, #22
+	str	r3, [r5, #2056]
+	ldrb	r3, [fp, #128]	@ zero_extendqisi2
+	str	r3, [r7, #2052]
+	movs	r3, #0
+	str	r3, [r7, #2048]
+	str	r2, [r5, #2056]
+	str	r3, [r5, #2056]
+	str	r3, [r7, #2052]
+	str	r3, [r7, #2052]
+	movs	r3, #48
+	str	r6, [r7, #2052]
+	str	r6, [r7, #2052]
+	str	r6, [r7, #2052]
+.L1793:
+	str	r3, [r5, #2056]
+	bl	nandc_wait_flash_ready
+	ldr	r3, [sp, #20]
+	adds	r3, r3, #1
+	b	.L1794
+.L1752:
+	movs	r0, #4
+	b	.L1740
+.L1753:
+	movs	r0, #10
+	b	.L1740
+.L1744:
+	cmp	r4, #8
+	ite	eq
+	moveq	r3, #190
+	movne	r3, #56
+	b	.L1793
+.L1798:
+	.align	2
+.L1797:
+	.word	.LANCHOR156
+	.word	.LC99
+	.word	.LC98
+	.size	hynix_get_read_retry_default, .-hynix_get_read_retry_default
+	.section	.text.flash_get_read_retry_tbl,"ax",%progbits
 	.align	1
-	.global	ftl_sysblk_dump
+	.global	flash_get_read_retry_tbl
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_sysblk_dump, %function
-ftl_sysblk_dump:
+	.type	flash_get_read_retry_tbl, %function
+flash_get_read_retry_tbl:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L1801
+	ldrb	r0, [r3, #19]	@ zero_extendqisi2
+	subs	r3, r0, #1
+	cmp	r3, #7
+	bhi	.L1799
+	b	hynix_get_read_retry_default
+.L1799:
+	bx	lr
+.L1802:
+	.align	2
+.L1801:
+	.word	.LANCHOR31
+	.size	flash_get_read_retry_tbl, .-flash_get_read_retry_tbl
+	.section	.text.nandc_xfer_done,"ax",%progbits
+	.align	1
+	.global	nandc_xfer_done
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	nandc_xfer_done, %function
+nandc_xfer_done:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	fp, r0
-	sub	sp, sp, #48
-	movs	r0, #1
-	movs	r6, #0
-	bl	buf_alloc
-	ldr	r3, [r0, #4]
-	mov	r4, r0
-	mov	r5, r6
-	str	r3, [sp, #44]
-.L2008:
-	ldr	r3, .L2015
-	ldrh	r2, [r3]
-	uxth	r3, r6
-	cmp	r2, r3
-	bhi	.L2010
-	mov	r0, r4
-	bl	buf_free
-	cmp	r5, #0
-	beq	.L2011
-	movw	r2, #655
-	ldr	r1, .L2015+4
-	ldr	r0, .L2015+8
-	bl	printf
-.L2012:
-	b	.L2012
-.L2010:
-	ldr	r3, .L2015+12
-	uxth	r7, r6
-	ldr	r2, [r4, #12]
-	ldr	r1, [r4, #4]
-	ldrh	r8, [r3]
-	ldr	r3, .L2015+16
-	mla	r8, fp, r8, r7
+	ldr	r3, .L1841
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
+	movs	r4, #0
+	ldr	r7, .L1841+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	mov	r0, r8
-	bl	ftl_read_ppa_page
-	ldr	r2, [r4, #12]
-	mov	r10, r0
-	ldr	r3, [r4, #4]
-	ldr	r1, [r2, #12]
-	str	r1, [sp, #32]
-	ldr	r1, [r2, #8]
-	str	r1, [sp, #28]
-	ldr	r1, [r2, #4]
-	str	r1, [sp, #24]
-	mov	r1, fp
-	ldr	r2, [r2]
-	str	r2, [sp, #20]
-	ldr	r2, [r3, #12]
-	str	r2, [sp, #16]
-	ldr	r2, [r3, #8]
-	str	r2, [sp, #12]
-	ldr	r2, [r3, #4]
-	str	r2, [sp, #8]
-	mov	r2, r7
+	ldr	r5, .L1841+8
+	strb	r4, [r7]
+	cmp	r3, #9
+	ldr	r6, [r5]
+	bne	.L1804
+	ldr	r3, [r6, #16]
+	str	r3, [sp]
+	ldr	r3, [r6, #48]
+	ubfx	r3, r3, #1, #1
+	cbnz	r3, .L1805
+	ldr	r7, .L1841+12
+	mov	r4, r3
+	ldr	r8, .L1841+32
+.L1806:
+	ldr	r3, [sp]
+	lsls	r0, r3, #11
+	bmi	.L1809
+	ldr	r3, [r5]
+	adds	r4, r4, #1
+	ldr	r3, [r3, #16]
+	str	r3, [sp]
+	bics	r3, r4, #-16777216
+	bne	.L1806
+	ldr	r2, [sp]
+	mov	r1, r4
+	ldr	r3, [r6, #64]
+	mov	r0, r7
+	ubfx	r3, r3, #16, #6
+	bl	printf
+	movs	r3, #64
+	movs	r2, #4
+	ldr	r1, [r5]
+	mov	r0, r8
+	bl	rknand_print_hex
+	b	.L1806
+.L1805:
+	ldr	r8, .L1841+24
+	ldr	r10, .L1841+32
+.L1807:
+	ldr	r2, [r6, #64]
+	ldr	r3, [sp]
+	ubfx	r2, r2, #16, #6
+	ubfx	r3, r3, #22, #6
+	cmp	r2, r3
+	bge	.L1809
+	ldr	r3, [r5]
 	ldr	r3, [r3]
-	str	r0, [sp]
-	ldr	r0, .L2015+20
 	str	r3, [sp, #4]
-	mov	r3, r8
+	ldr	r3, [sp, #4]
+	lsls	r1, r3, #18
+	bpl	.L1808
+	ldr	r3, [sp, #4]
+	lsls	r2, r3, #14
+	bpl	.L1808
+	ldr	r1, [sp, #4]
+	ldr	r0, .L1841+16
+	ubfx	r1, r1, #17, #1
+.L1840:
 	bl	printf
-	ldr	r1, [sp, #44]
-	movs	r3, #32
+	b	.L1809
+.L1808:
+	ldr	r3, [sp]
+	adds	r4, r4, #1
+	ubfx	r3, r3, #22, #6
+	cmp	r4, r3, lsl #12
+	bne	.L1807
+	ldr	r2, [r6, #64]
+	mov	r1, r4
+	ldr	r3, [sp]
+	mov	r0, r8
+	ubfx	r2, r2, #16, #5
+	ubfx	r3, r3, #22, #6
+	bl	printf
+	movs	r3, #64
 	movs	r2, #4
-	ldr	r0, .L2015+24
-	add	r1, r1, #704
+	ldr	r1, [r5]
+	mov	r0, r10
 	bl	rknand_print_hex
-	cmp	r10, #-1
-	beq	.L2013
-	cmp	r10, #512
-	it	eq
-	moveq	r5, #1
-.L2009:
-	adds	r6, r6, #1
-	b	.L2008
-.L2013:
-	movs	r5, #1
-	b	.L2009
-.L2011:
-	mov	r0, r5
-	add	sp, sp, #48
+	ldr	r3, [sp, #4]
+	lsls	r3, r3, #18
+	bpl	.L1807
+	movs	r3, #1
+	strb	r3, [r7]
+.L1809:
+	ldr	r3, .L1841+20
+	movs	r2, #0
+	str	r2, [r3, #20]
+	add	sp, sp, #12
 	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2016:
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.L1804:
+	ldr	r3, [r6, #8]
+	str	r3, [sp]
+	ldr	r3, [r6, #16]
+	ubfx	r3, r3, #1, #1
+	cbnz	r3, .L1815
+	ldr	r7, .L1841+12
+	mov	r4, r3
+	ldr	r8, .L1841+32
+.L1816:
+	ldr	r3, [sp]
+	lsls	r3, r3, #11
+	bmi	.L1809
+	ldr	r3, [r5]
+	adds	r4, r4, #1
+	ldr	r3, [r3, #8]
+	str	r3, [sp]
+	bics	r3, r4, #-16777216
+	bne	.L1816
+	ldr	r2, [sp]
+	mov	r1, r4
+	ldr	r3, [r6, #28]
+	mov	r0, r7
+	ubfx	r3, r3, #16, #5
+	bl	printf
+	movs	r3, #64
+	movs	r2, #4
+	ldr	r1, [r5]
+	mov	r0, r8
+	bl	rknand_print_hex
+	b	.L1816
+.L1815:
+	ldr	r7, .L1841+24
+	ldr	r8, .L1841+32
+.L1817:
+	ldr	r2, [r6, #28]
+	ldr	r3, [sp]
+	ubfx	r2, r2, #16, #5
+	ubfx	r3, r3, #22, #6
+	cmp	r2, r3
+	bge	.L1809
+	ldr	r3, [r5]
+	ldr	r3, [r3]
+	str	r3, [sp, #4]
+	ldr	r3, [sp, #4]
+	lsls	r1, r3, #18
+	bpl	.L1818
+	ldr	r3, [sp, #4]
+	lsls	r2, r3, #14
+	bpl	.L1818
+	ldr	r1, [sp, #4]
+	ldr	r0, .L1841+28
+	b	.L1840
+.L1818:
+	adds	r4, r4, #1
+	bics	r3, r4, #-16777216
+	bne	.L1817
+	ldr	r2, [r6, #28]
+	mov	r1, r4
+	ldr	r3, [sp]
+	mov	r0, r7
+	ubfx	r2, r2, #16, #5
+	ubfx	r3, r3, #22, #6
+	bl	printf
+	movs	r3, #64
+	movs	r2, #4
+	ldr	r1, [r5]
+	mov	r0, r8
+	bl	rknand_print_hex
+	b	.L1817
+.L1842:
 	.align	2
-.L2015:
-	.word	.LANCHOR79
-	.word	.LANCHOR147
-	.word	.LC0
-	.word	.LANCHOR75
-	.word	.LANCHOR45
-	.word	.LC73
-	.word	.LC80
-	.size	ftl_sysblk_dump, .-ftl_sysblk_dump
-	.section	.text.dump_ftl_info,"ax",%progbits
+.L1841:
+	.word	.LANCHOR28
+	.word	.LANCHOR157
+	.word	.LANCHOR13
+	.word	.LC103
+	.word	.LC100
+	.word	.LANCHOR47
+	.word	.LC101
+	.word	.LC104
+	.word	.LC102
+	.size	nandc_xfer_done, .-nandc_xfer_done
+	.section	.text.nandc_xfer,"ax",%progbits
 	.align	1
-	.global	dump_ftl_info
+	.global	nandc_xfer
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	dump_ftl_info, %function
-dump_ftl_info:
-	@ args = 0, pretend = 0, frame = 0
+	.type	nandc_xfer, %function
+nandc_xfer:
+	@ args = 4, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r4, r5, r6, r7, lr}
-	ldr	r1, .L2018
-	ldr	r5, .L2018+4
-	ldrh	r3, [r1, #2]
-	ldrb	r2, [r1, #1]	@ zero_extendqisi2
-	ldr	r0, .L2018+8
-	ldrb	r1, [r1]	@ zero_extendqisi2
-	bl	printf
-	ldr	r3, [r5]
-	ldr	r4, .L2018+12
-	ldr	r0, .L2018+16
-	ldrh	r2, [r3, #140]
-	ldrh	r1, [r3, #130]
-	bl	printf
-	ldr	r0, [r4]
-	ldr	r7, .L2018+20
-	ldrh	r6, [r0, #26]
-	ldrb	r3, [r0, #21]	@ zero_extendqisi2
-	ldrh	r2, [r0, #18]
-	ldrh	r1, [r0, #16]
-	str	r6, [sp, #4]
-	ldrh	r0, [r0, #22]
-	str	r0, [sp]
-	ldr	r0, .L2018+24
-	bl	printf
-	ldr	r0, [r4]
-	ldrh	r6, [r0, #58]
-	ldrb	r3, [r0, #53]	@ zero_extendqisi2
-	ldrh	r2, [r0, #50]
-	ldrh	r1, [r0, #48]
-	str	r6, [sp, #4]
-	ldrh	r0, [r0, #54]
-	ldr	r6, .L2018+28
-	str	r0, [sp]
-	ldr	r0, .L2018+32
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	mov	r8, r1
+	ldr	r5, [sp, #32]
+	mov	r4, r2
+	mov	r6, r3
+	mov	r1, r4
+	mov	r2, r6
+	mov	r0, r8
+	mov	r3, r5
+	bl	nandc_xfer_start
+	bl	nandc_xfer_done
+	cmp	r8, #0
+	bne	.L1862
+	ldr	r3, .L1881
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #9
+	bne	.L1845
+	ldr	r7, .L1881+4
+	lsr	ip, r4, #2
+	movs	r2, #1
+	mov	r1, r8
+	mov	r0, r8
+	ldr	r4, [r7]
+.L1846:
+	cmp	r1, ip
+	bcc	.L1850
+	ldr	r4, [r4]
+	cmp	r2, #0
+	it	ne
+	movne	r0, #512
+	and	r3, r4, #139264
+	cmp	r3, #139264
+	bne	.L1852
+	mov	r1, r4
+	ldr	r0, .L1881+8
 	bl	printf
-	ldr	r0, [r4]
-	ldrh	r4, [r0, #90]
-	ldrb	r3, [r0, #85]	@ zero_extendqisi2
-	ldrh	r2, [r0, #82]
-	ldrh	r1, [r0, #80]
-	str	r4, [sp, #4]
-	ldrh	r0, [r0, #86]
-	ldr	r4, .L2018+36
-	str	r0, [sp]
-	ldr	r0, .L2018+40
+	ldr	r3, [r7]
+	mov	r0, #-1
+	orr	r4, r4, #131072
+	str	r4, [r3]
+.L1852:
+	lsls	r2, r4, #18
+	bpl	.L1853
+	ldr	r3, .L1881+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L1853
+	mov	r1, r4
+	ldr	r0, .L1881+16
 	bl	printf
-	ldrh	r2, [r6]
-	ldrb	r3, [r4]	@ zero_extendqisi2
-	ldr	r1, .L2018+44
-	ldr	r0, .L2018+48
-	muls	r3, r2, r3
-	ldr	r1, [r1]
-	movs	r2, #4
-	lsls	r3, r3, #1
-	bl	rknand_print_hex
-	ldr	r1, .L2018+52
-	movs	r2, #2
-	ldrh	r3, [r7]
-	ldr	r0, .L2018+56
-	ldr	r1, [r1]
-	bl	rknand_print_hex
-	ldr	r1, [r5]
-	movs	r3, #32
-	movs	r2, #4
-	ldr	r0, .L2018+60
-	add	r1, r1, #704
-	bl	rknand_print_hex
-	ldr	r1, .L2018+64
-	movs	r2, #4
-	ldrh	r3, [r7]
-	ldr	r0, .L2018+68
-	ldr	r1, [r1]
-	bl	rknand_print_hex
-	mov	r3, #256
-	movs	r2, #2
-	ldr	r1, .L2018+72
-	ldr	r0, .L2018+76
-	bl	rknand_print_hex
-	ldrh	r2, [r6]
-	ldrb	r3, [r4]	@ zero_extendqisi2
-	ldr	r1, .L2018+80
-	ldr	r0, .L2018+84
-	muls	r3, r2, r3
-	ldr	r1, [r1]
-	movs	r2, #2
-	lsls	r3, r3, #1
-	add	sp, sp, #12
+	ldr	r3, [r7]
+	movs	r2, #1
+	str	r2, [r3, #16]
+.L1880:
+	mov	r0, #-1
+.L1844:
+	add	sp, sp, #8
 	@ sp needed
-	pop	{r4, r5, r6, r7, lr}
-	b	rknand_print_hex
-.L2019:
-	.align	2
-.L2018:
-	.word	.LANCHOR131
-	.word	.LANCHOR46
-	.word	.LC81
-	.word	.LANCHOR60
-	.word	.LC82
-	.word	.LANCHOR54
-	.word	.LC83
-	.word	.LANCHOR79
-	.word	.LC84
-	.word	.LANCHOR69
-	.word	.LC85
-	.word	.LANCHOR82
-	.word	.LC86
-	.word	.LANCHOR56
-	.word	.LC87
-	.word	.LC80
-	.word	.LANCHOR57
-	.word	.LC88
-	.word	.LANCHOR81
-	.word	.LC89
-	.word	.LANCHOR83
-	.word	.LC90
-	.size	dump_ftl_info, .-dump_ftl_info
-	.section	.text.pm_ppa_update_check,"ax",%progbits
-	.align	1
-	.global	pm_ppa_update_check
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	pm_ppa_update_check, %function
-pm_ppa_update_check:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	mov	r5, r0
-	ldr	r3, .L2027
-	movs	r4, #1
-	mov	r6, r1
-	mov	r7, r2
-	ldrh	r0, [r3]
-	rsb	r3, r0, #21
-	lsls	r4, r4, r3
-	ldr	r3, .L2027+4
-	lsr	r0, r2, r0
-	subs	r4, r4, #1
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	ands	r0, r0, r4
-	bl	__aeabi_uidiv
-	ldr	r3, .L2027+8
-	uxth	r0, r0
-	ldr	r3, [r3]
-	add	r0, r3, r0, lsl #2
-	ldrb	r1, [r0, #2]	@ zero_extendqisi2
-	lsrs	r1, r1, #5
-	cmp	r1, #1
-	beq	.L2021
-	cmp	r1, #7
-	bne	.L2023
-.L2021:
-	mov	r3, r7
-	mov	r2, r6
-	mov	r1, r5
-	ldr	r0, .L2027+12
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1850:
+	add	r3, r1, #84
+	ldr	r3, [r4, r3, lsl #2]
+	str	r3, [sp, #4]
+	ldr	lr, [sp, #4]
+	ldr	r3, [sp, #4]
+	ubfx	r3, r3, #26, #1
+	and	r3, r3, lr, lsr #10
+	ands	r2, r2, r3
+	ldr	r3, [sp, #4]
+	lsls	r3, r3, #29
+	bmi	.L1864
+	ldr	r3, [sp, #4]
+	lsls	r3, r3, #13
+	bmi	.L1864
+	ldr	r3, [sp, #4]
+	ubfx	lr, r3, #3, #7
+	ldr	r3, [sp, #4]
+	ubfx	r3, r3, #19, #7
+	cmp	lr, r3
+	ldr	r3, [sp, #4]
+	ite	gt
+	ubfxgt	r3, r3, #3, #7
+	ubfxle	r3, r3, #19, #7
+	cmp	r0, r3
+	it	cc
+	movcc	r0, r3
+.L1847:
+	adds	r1, r1, #1
+	b	.L1846
+.L1864:
+	mov	r0, #-1
+	b	.L1847
+.L1845:
+	ldr	r3, .L1881+20
+	mov	r1, r8
+	mov	r0, r8
+	ldr	r8, .L1881+28
+	lsrs	r7, r4, #1
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #25
+	mov	r3, r5
+	ite	cc
+	movcc	lr, #64
+	movcs	lr, #128
+.L1855:
+	cmp	r0, r7
+	add	ip, lr, r1
+	add	r3, r3, #4
+	bcc	.L1856
+	ldr	r7, .L1881+4
+	movs	r2, #0
+	lsrs	r4, r4, #2
+	mov	r0, r2
+	ldr	r1, [r7]
+.L1857:
+	cmp	r2, r4
+	bcc	.L1861
+	movs	r3, #0
+	str	r3, [r1, #16]
+	ldr	r4, [r1]
+	and	r3, r4, #139264
+	cmp	r3, #139264
+	bne	.L1853
+	mov	r1, r4
+	ldr	r0, .L1881+24
 	bl	printf
-	bl	dump_ftl_info
+	ldr	r3, [r7]
+	orr	r4, r4, #131072
+	str	r4, [r3]
+	b	.L1880
+.L1856:
+	ldr	r2, [r8]
+	bic	r1, r1, #3
+	adds	r0, r0, #1
+	ldr	r2, [r2, r1]
+	strb	r2, [r3, #-4]
+	lsrs	r1, r2, #8
+	strb	r1, [r3, #-3]
+	lsrs	r1, r2, #16
+	lsrs	r2, r2, #24
+	strb	r1, [r3, #-2]
+	mov	r1, ip
+	strb	r2, [r3, #-1]
+	b	.L1855
+.L1861:
+	add	r3, r2, #8
+	ldr	r3, [r1, r3, lsl #2]
+	str	r3, [sp, #4]
+	ldr	r3, [sp, #4]
+	lsls	r3, r3, #29
+	bmi	.L1867
+	ldr	r3, [sp, #4]
+	lsls	r3, r3, #16
+	bmi	.L1867
+	ldr	r3, [sp, #4]
+	ubfx	ip, r3, #3, #5
+	ldr	r3, [sp, #4]
+	ubfx	r8, r3, #27, #1
+	ldr	r3, [sp, #4]
+	ldr	lr, [sp, #4]
+	orr	ip, ip, r8, lsl #5
+	ubfx	r3, r3, #16, #5
+	ubfx	lr, lr, #29, #1
+	orr	r3, r3, lr, lsl #5
+	cmp	ip, r3
+	ldr	r3, [sp, #4]
+	itete	hi
+	ldrhi	ip, [sp, #4]
+	ldrls	ip, [sp, #4]
+	ubfxhi	r3, r3, #3, #5
+	ubfxls	r3, r3, #16, #5
+	ite	hi
+	ubfxhi	ip, ip, #27, #1
+	ubfxls	ip, ip, #29, #1
+	orr	r3, r3, ip, lsl #5
+	cmp	r0, r3
+	it	cc
+	movcc	r0, r3
+.L1858:
+	adds	r2, r2, #1
+	b	.L1857
+.L1867:
 	mov	r0, #-1
-	pop	{r3, r4, r5, r6, r7, pc}
-.L2023:
+	b	.L1858
+.L1853:
+	adds	r3, r0, #1
+	beq	.L1844
+	ldr	r3, [r5]
+	adds	r3, r3, #1
+	bne	.L1844
+	ldr	r3, [r5, #4]
+	adds	r3, r3, #1
+	bne	.L1844
+	ldr	r3, [r6]
+	adds	r3, r3, #1
+	it	eq
+	moveq	r0, #512
+	b	.L1844
+.L1862:
 	movs	r0, #0
-	pop	{r3, r4, r5, r6, r7, pc}
-.L2028:
+	b	.L1844
+.L1882:
 	.align	2
-.L2027:
-	.word	.LANCHOR71
-	.word	.LANCHOR70
-	.word	.LANCHOR57
-	.word	.LC91
-	.size	pm_ppa_update_check, .-pm_ppa_update_check
-	.section	.text.load_l2p_region,"ax",%progbits
+.L1881:
+	.word	.LANCHOR28
+	.word	.LANCHOR13
+	.word	.LC105
+	.word	.LANCHOR157
+	.word	.LC106
+	.word	.LANCHOR44
+	.word	.LC107
+	.word	.LANCHOR47
+	.size	nandc_xfer, .-nandc_xfer
+	.section	.text.flash_read_page,"ax",%progbits
 	.align	1
-	.global	load_l2p_region
+	.global	flash_read_page
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	load_l2p_region, %function
-load_l2p_region:
-	@ args = 0, pretend = 0, frame = 0
+	.type	flash_read_page, %function
+flash_read_page:
+	@ args = 4, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	cmp	r1, #31
-	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
-	mov	r4, r0
-	bls	.L2030
-	movs	r2, #30
-	ldr	r1, .L2039
-	ldr	r0, .L2039+4
-	bl	printf
-.L2031:
-	b	.L2031
-.L2030:
-	ldr	r10, .L2039+52
-	ldr	r3, [r10]
-	ldrh	r2, [r3, #698]
-	cmp	r2, r0
-	bcs	.L2032
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #24
+	str	r3, [sp, #16]
+	mov	r5, r0
+	mov	r7, r1
+	ubfx	r4, r1, #0, #21
+	ldr	r3, .L1898
+	ubfx	r8, r1, #24, #2
+	str	r2, [sp, #12]
+	ldr	r6, [r3]
+	ldr	r3, .L1898+4
+	ldr	r3, [r3]
+	lsls	r3, r3, #27
+	bpl	.L1884
+	mov	r3, r1
+	mov	r2, r8
 	mov	r1, r0
-	ldr	r0, .L2039+8
+	ldr	r0, .L1898+8
 	bl	printf
-	ldr	r3, .L2039+12
-	movs	r1, #255
-	ldrh	r2, [r3]
-	movs	r3, #0
-	ldr	r0, [r3, #4]
-	bl	ftl_memset
-	ldr	r3, [r10]
-	ldrh	r3, [r3, #698]
-	cmp	r3, r4
-	bcs	.L2036
-	movs	r2, #34
-	ldr	r1, .L2039
-	ldr	r0, .L2039+4
-	bl	printf
-.L2034:
-	b	.L2034
-.L2032:
-	ldr	r5, .L2039+16
-	add	r2, r0, #176
-	ldr	r7, [r3, r2, lsl #2]
-	mov	r8, #0
-	strh	r0, [r5, r1, lsl #3]	@ movhi
-	add	r5, r5, r1, lsl #3
-	strh	r8, [r5, #2]	@ movhi
-	cbnz	r7, .L2035
-	ldr	r3, .L2039+12
-	movs	r1, #255
-	ldr	r0, [r5, #4]
-	ldrh	r2, [r3]
-	bl	ftl_memset
-.L2036:
-	movs	r0, #0
-	add	sp, sp, #12
+.L1884:
+	bl	nandc_wait_flash_ready
+	mov	r0, r5
+	lsl	r10, r5, #8
+	bl	nandc_cs
+	ldr	r2, .L1898+12
+	cmp	r8, #0
+	bne	.L1885
+	mov	r0, r5
+	str	r2, [sp, #20]
+	bl	zftl_flash_enter_slc_mode
+.L1896:
+	ldr	r2, [sp, #20]
+	b	.L1886
+.L1885:
+	ldr	r3, [r2]
+	ldrb	r3, [r3, #12]	@ zero_extendqisi2
+	cmp	r3, #3
+	bne	.L1887
+	add	r3, r6, r10
+	str	r8, [r3, #2056]
+.L1886:
+	add	fp, r6, r10
+	movs	r1, #0
+	str	r1, [fp, #2056]
+	uxtb	r7, r7
+	str	r1, [fp, #2052]
+	str	r1, [fp, #2052]
+	lsrs	r1, r4, #8
+	str	r7, [fp, #2052]
+	ldr	r2, [r2]
+	str	r1, [fp, #2052]
+	lsrs	r1, r4, #16
+	str	r1, [fp, #2052]
+	movs	r1, #48
+	str	r1, [fp, #2056]
+	ldrb	r2, [r2, #12]	@ zero_extendqisi2
+	cmp	r2, #3
+	bne	.L1888
+	cmp	r8, #0
+	beq	.L1888
+	add	r4, r4, r4, lsl #1
+	subs	r0, r4, #1
+	add	r0, r0, r8
+.L1897:
+	bl	nandc_set_seed
+	add	r6, r6, r10
+	bl	nandc_wait_flash_ready
+	movs	r1, #0
+	movs	r2, #5
+	movs	r3, #224
+	str	r2, [r6, #2056]
+	str	r1, [fp, #2052]
+	mov	r0, r5
+	str	r1, [fp, #2052]
+	str	r3, [r6, #2056]
+	ldr	r3, [sp, #16]
+	ldrb	r2, [sp, #56]	@ zero_extendqisi2
+	str	r3, [sp]
+	ldr	r3, [sp, #12]
+	bl	nandc_xfer
+	bl	nandc_de_cs.constprop.29
+	add	sp, sp, #24
 	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L2035:
-	ldr	r6, .L2039+20
-	mov	r0, r7
-	ldr	r3, .L2039+24
-	ldr	r1, [r5, #4]
-	ldr	r2, [r6]
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1887:
+	mov	r0, r5
+	str	r2, [sp, #20]
+	bl	zftl_flash_exit_slc_mode
+	b	.L1896
+.L1888:
+	mov	r0, r4
+	b	.L1897
+.L1899:
+	.align	2
+.L1898:
+	.word	.LANCHOR13
+	.word	.LANCHOR14
+	.word	.LC108
+	.word	.LANCHOR16
+	.size	flash_read_page, .-flash_read_page
+	.section	.text.micron_read_retrial,"ax",%progbits
+	.align	1
+	.global	micron_read_retrial
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	micron_read_retrial, %function
+micron_read_retrial:
+	@ args = 4, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	fp, r3
+	ldr	r3, .L1917
+	sub	sp, sp, #24
+	mov	r8, r0
+	mov	r7, r1
+	str	r2, [sp, #16]
+	movs	r5, #0
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	bl	ftl_read_ppa_page
-	ldr	r2, [r6]
-	mov	r3, r0
-	ldr	r2, [r2]
-	cmp	r2, r4
-	beq	.L2037
-	str	r7, [sp]
-	mov	r1, r4
-	ldr	r0, .L2039+28
+	mov	r4, #-1
+	add	r3, r3, r3, lsl #1
+	asr	r10, r3, #2
+	bl	nandc_wait_flash_ready
+	ldr	r3, .L1917+4
+	ldr	r3, [r3]
+	str	r3, [sp, #12]
+.L1901:
+	ldr	r3, .L1917+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r5, r3
+	bcc	.L1906
+.L1905:
+	ldr	r3, [sp, #12]
+	movs	r0, #200
+	add	r8, r3, r8, lsl #8
+	movs	r3, #239
+	str	r3, [r8, #2056]
+	movs	r3, #137
+	str	r3, [r8, #2052]
+	bl	timer_delay_ns
+	cmp	r4, r10
+	mov	r3, #0
+	str	r3, [r8, #2048]
+	str	r3, [r8, #2048]
+	str	r3, [r8, #2048]
+	str	r3, [r8, #2048]
+	bcc	.L1907
+	adds	r3, r4, #1
+	mov	r2, r7
+	it	ne
+	movne	r4, #256
+	mov	r3, r5
+	str	r4, [sp]
+	mov	r1, r5
+	ldr	r0, .L1917+12
 	bl	printf
-	ldr	r1, [r10]
-	movs	r2, #4
-	ldr	r0, .L2039+32
-	ldrh	r3, [r1, #698]
-	add	r1, r1, #704
-	bl	rknand_print_hex
-	movs	r3, #16
-	movs	r2, #4
-	ldr	r1, [r5, #4]
-	ldr	r0, .L2039+36
-	bl	rknand_print_hex
-	movs	r3, #16
-	movs	r2, #4
-	ldr	r1, [r6]
-	ldr	r0, .L2039+40
-	bl	rknand_print_hex
-	ldr	r3, .L2039+44
-	movs	r0, #1
-	ldrh	r3, [r3]
-	rsb	r2, r3, #21
-	lsls	r0, r0, r2
-	lsrs	r7, r7, r3
-	ldr	r3, .L2039+48
-	subs	r0, r0, #1
-	ands	r0, r0, r7
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	bl	__aeabi_uidiv
-	mov	r1, r8
-	uxth	r0, r0
-	bl	ftl_sblk_dump
-.L2037:
-	ldr	r3, [r6]
+.L1907:
+	bl	nandc_wait_flash_ready
+	mov	r0, r4
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1906:
+	ldr	r3, [sp, #12]
+	movs	r0, #200
+	add	r1, r3, r8, lsl #8
+	movs	r3, #239
+	str	r3, [r1, #2056]
+	movs	r3, #137
+	str	r3, [r1, #2052]
+	bl	timer_delay_ns
+	adds	r3, r5, #1
+	ldr	r2, [sp, #16]
+	str	r3, [r1, #2048]
+	mov	r0, r8
+	str	r3, [sp, #20]
+	movs	r3, #0
+	str	r3, [r1, #2048]
+	str	r3, [r1, #2048]
+	str	r3, [r1, #2048]
+	mov	r1, r7
+	ldr	r3, [sp, #56]
+	str	r3, [sp]
+	mov	r3, fp
+	bl	flash_read_page
+	ldr	r3, .L1917+16
+	mov	r6, r0
 	ldr	r3, [r3]
-	cmp	r4, r3
-	beq	.L2036
-	movs	r2, #55
-	ldr	r1, .L2039
-	ldr	r0, .L2039+4
+	lsls	r1, r3, #19
+	bpl	.L1902
+	str	r0, [sp]
+	mov	r3, r4
+	mov	r2, r7
+	mov	r1, r5
+	ldr	r0, .L1917+20
 	bl	printf
-.L2038:
-	b	.L2038
-.L2040:
+.L1902:
+	adds	r2, r6, #1
+	beq	.L1903
+	ldr	r3, .L1917+24
+	cmp	r4, #-1
+	it	eq
+	moveq	r4, r6
+	cmp	r6, r10
+	ldr	r3, [r3]
+	str	r3, [sp, #16]
+	ldr	r3, .L1917+28
+	ldr	fp, [r3]
+	bcc	.L1909
+.L1903:
+	ldr	r5, [sp, #20]
+	b	.L1901
+.L1909:
+	mov	r4, r6
+	b	.L1905
+.L1918:
 	.align	2
-.L2039:
-	.word	.LANCHOR148
-	.word	.LC0
-	.word	.LC92
-	.word	.LANCHOR149
-	.word	.LANCHOR93
-	.word	.LANCHOR141
-	.word	.LANCHOR45
-	.word	.LC93
-	.word	.LC94
-	.word	.LC95
-	.word	.LC96
-	.word	.LANCHOR71
-	.word	.LANCHOR70
-	.word	.LANCHOR46
-	.size	load_l2p_region, .-load_l2p_region
-	.section	.text.pm_gc,"ax",%progbits
+.L1917:
+	.word	.LANCHOR44
+	.word	.LANCHOR13
+	.word	.LANCHOR159
+	.word	.LC110
+	.word	.LANCHOR14
+	.word	.LC109
+	.word	.LANCHOR156
+	.word	.LANCHOR158
+	.size	micron_read_retrial, .-micron_read_retrial
+	.section	.text.toshiba_3d_read_retrial,"ax",%progbits
 	.align	1
-	.global	pm_gc
+	.global	toshiba_3d_read_retrial
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	pm_gc, %function
-pm_gc:
-	@ args = 0, pretend = 0, frame = 0
+	.type	toshiba_3d_read_retrial, %function
+toshiba_3d_read_retrial:
+	@ args = 4, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r4, .L2054
-	ldr	r5, .L2054+4
-	ldr	r3, [r4]
-	mov	r8, r4
-	ldrh	r2, [r3, #688]
-	ldrh	r3, [r5]
-	subs	r3, r3, #1
-	cmp	r2, r3
-	blt	.L2043
-	bl	pm_free_sblk
-	ldr	r2, [r4]
-	ldrh	r3, [r5]
-	ldrh	r1, [r2, #688]
-	subs	r3, r3, #1
-	cmp	r1, r3
-	blt	.L2043
-	uxth	r0, r0
-	movw	r7, #65535
-	adds	r0, r0, #208
-	ldrh	r6, [r2, r0, lsl #1]
-	cmp	r6, r7
-	bne	.L2045
-	movs	r2, #127
-	ldr	r1, .L2054+8
-	ldr	r0, .L2054+12
-	bl	printf
-.L2046:
-	b	.L2046
-.L2045:
-	ldr	r4, .L2054+16
-	bl	pm_select_ram_region
-	mov	r5, r0
-	ldrh	r0, [r4, r0, lsl #3]
-	cmp	r0, r7
-	beq	.L2047
-	add	r7, r4, r5, lsl #3
-	ldr	r1, [r7, #4]
-	cbz	r1, .L2047
-	ldrsh	r3, [r7, #2]
-	cmp	r3, #0
-	bge	.L2047
-	bl	pm_write_page
-	ldrh	r3, [r7, #2]
-	ubfx	r3, r3, #0, #15
-	strh	r3, [r7, #2]	@ movhi
-.L2047:
-	mov	fp, #0
-.L2048:
-	ldr	r1, [r8]
-	uxth	r10, fp
-	ldrh	r0, [r1, #698]
-	cmp	r0, r10
-	bhi	.L2050
-	bl	pm_free_sblk
-.L2043:
-	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2050:
-	ldr	r3, .L2054+20
-	uxth	r7, fp
-	add	ip, r7, #176
-	ldrh	r0, [r3]
-	ldr	r1, [r1, ip, lsl #2]
-	ldr	r3, .L2054+24
-	lsr	ip, r1, r0
-	rsb	r1, r0, #21
-	movs	r0, #1
-	lsls	r0, r0, r1
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	subs	r0, r0, #1
-	and	r0, ip, r0
-	bl	__aeabi_uidiv
-	uxth	r0, r0
-	cmp	r6, r0
-	bne	.L2049
+	sub	sp, sp, #24
+	mov	r7, r0
+	str	r2, [sp, #8]
+	mov	r8, r1
+	ubfx	r4, r1, #24, #2
+	str	r3, [sp, #12]
+	add	r6, r7, #8
+	bl	nandc_wait_flash_ready
+	ldr	r3, .L1962
+	ldr	fp, [r3]
+	ldr	r3, .L1962+4
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	add	r6, fp, r6, lsl #8
+	cmp	r2, #36
+	ite	ne
+	movne	r2, #56
+	moveq	r2, #46
+	str	r2, [sp, #20]
+	ite	ne
+	movne	r2, #10
+	moveq	r2, #26
+	str	r2, [sp, #16]
+	cmp	r4, #0
+	bne	.L1921
+	mov	r4, #-1
+	movs	r5, #1
+	str	r3, [sp, #20]
+.L1928:
+	ldr	r3, [sp, #20]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #36
+	bne	.L1922
+	movs	r2, #0
 	mov	r1, r5
-	mov	r0, r10
-	bl	load_l2p_region
-	add	r2, r4, r5, lsl #3
+	mov	r0, r6
+	bl	toshiba_tlc_set_rr_para
+	add	r3, fp, r7, lsl #8
+	movs	r2, #93
+	str	r2, [r3, #2056]
+.L1923:
+	ldr	r3, [sp, #56]
+	mov	r1, r8
+	ldr	r2, [sp, #8]
 	mov	r0, r7
-	ldr	r1, [r2, #4]
-	bl	pm_write_page
-.L2049:
-	add	fp, fp, #1
-	b	.L2048
-.L2055:
-	.align	2
-.L2054:
-	.word	.LANCHOR46
-	.word	.LANCHOR101
-	.word	.LANCHOR150
-	.word	.LC0
-	.word	.LANCHOR93
-	.word	.LANCHOR71
-	.word	.LANCHOR70
-	.size	pm_gc, .-pm_gc
-	.section	.text.pm_flush_id,"ax",%progbits
-	.align	1
-	.global	pm_flush_id
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	pm_flush_id, %function
-pm_flush_id:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2061
-	push	{r4, lr}
-	add	r4, r3, r0, lsl #3
-	ldrh	r0, [r3, r0, lsl #3]
-	ldr	r1, [r4, #4]
-	bl	pm_write_page
-	ldrh	r3, [r4, #2]
-	ubfx	r3, r3, #0, #15
-	strh	r3, [r4, #2]	@ movhi
-	ldr	r4, .L2061+4
-	ldr	r3, [r4]
-	cbz	r3, .L2057
-	bl	pm_gc
+	str	r3, [sp]
+	ldr	r3, [sp, #12]
+	bl	flash_read_page
+	ldr	r3, .L1962+8
+	mov	r10, r0
+	ldr	r3, [r3]
+	lsls	r1, r3, #27
+	bpl	.L1924
+	mov	r3, r0
+	mov	r2, r8
+	mov	r1, r5
+	ldr	r0, .L1962+12
+	bl	printf
+.L1924:
+	cmp	r10, #-1
+	beq	.L1925
+	ldr	r3, .L1962+16
+	cmp	r4, #-1
+	it	eq
+	moveq	r4, r10
+	ldr	r3, [r3]
+	str	r3, [sp, #8]
+	ldr	r3, .L1962+20
+	ldr	r3, [r3]
+	str	r3, [sp, #12]
+	ldr	r3, .L1962+24
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r10, r3, asr #2
+	bcc	.L1943
+.L1925:
+	ldr	r3, [sp, #16]
+	adds	r5, r5, #1
+	cmp	r3, r5
+	bne	.L1928
+.L1927:
+	ldr	r3, .L1962+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #36
+	bne	.L1929
+	movs	r2, #0
+.L1961:
+	movs	r1, #0
+	mov	r0, r6
+	bl	toshiba_tlc_set_rr_para
+	b	.L1930
+.L1922:
+	uxtb	r1, r5
+	mov	r0, r6
+	bl	toshiba_3d_set_slc_rr_para
+	b	.L1923
+.L1943:
+	mov	r4, r10
+	b	.L1927
+.L1929:
+	movs	r1, #0
+	mov	r0, r6
+	bl	toshiba_3d_set_slc_rr_para
+.L1930:
+	ldr	r3, .L1962+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #36
+	bne	.L1939
+	add	r7, fp, r7, lsl #8
+	movs	r3, #85
+	str	r3, [r7, #2056]
 	movs	r3, #0
-	str	r3, [r4]
-.L2057:
-	movs	r0, #0
-	pop	{r4, pc}
-.L2062:
+	str	r3, [r7, #2052]
+	str	r3, [r7, #2048]
+	movs	r3, #255
+	str	r3, [r7, #2056]
+.L1939:
+	ldr	r3, .L1962+24
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r4, r3, asr #2
+	bcc	.L1940
+	adds	r3, r4, #1
+	mov	r2, r8
+	it	ne
+	movne	r4, #256
+	mov	r3, r5
+	str	r4, [sp]
+	mov	r1, r5
+	ldr	r0, .L1962+28
+	bl	printf
+.L1940:
+	bl	nandc_wait_flash_ready
+	mov	r0, r4
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1921:
+	mov	r4, #-1
+	movs	r5, #1
+	str	r3, [sp, #16]
+.L1937:
+	ldr	r3, [sp, #16]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #36
+	bne	.L1931
+	movs	r2, #1
+	mov	r1, r5
+	mov	r0, r6
+	bl	toshiba_tlc_set_rr_para
+	add	r3, fp, r7, lsl #8
+	movs	r2, #93
+.L1960:
+	str	r2, [r3, #2056]
+	mov	r1, r8
+	ldr	r3, [sp, #56]
+	mov	r0, r7
+	ldr	r2, [sp, #8]
+	str	r3, [sp]
+	ldr	r3, [sp, #12]
+	bl	flash_read_page
+	ldr	r3, .L1962+8
+	mov	r10, r0
+	ldr	r3, [r3]
+	lsls	r2, r3, #27
+	bpl	.L1933
+	mov	r3, r0
+	mov	r2, r8
+	mov	r1, r5
+	ldr	r0, .L1962+32
+	bl	printf
+.L1933:
+	cmp	r10, #-1
+	beq	.L1934
+	ldr	r3, .L1962+16
+	cmp	r4, #-1
+	it	eq
+	moveq	r4, r10
+	ldr	r3, [r3]
+	str	r3, [sp, #8]
+	ldr	r3, .L1962+20
+	ldr	r3, [r3]
+	str	r3, [sp, #12]
+	ldr	r3, .L1962+24
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r10, r3, asr #2
+	bcc	.L1944
+.L1934:
+	ldr	r3, [sp, #20]
+	adds	r5, r5, #1
+	cmp	r3, r5
+	bne	.L1937
+.L1936:
+	ldr	r3, .L1962+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #36
+	bne	.L1938
+	movs	r2, #1
+	b	.L1961
+.L1931:
+	uxtb	r1, r5
+	mov	r0, r6
+	bl	toshiba_3d_set_tlc_rr_para
+	add	r3, fp, r7, lsl #8
+	movs	r2, #38
+	b	.L1960
+.L1944:
+	mov	r4, r10
+	b	.L1936
+.L1938:
+	movs	r1, #0
+	mov	r0, r6
+	bl	toshiba_3d_set_tlc_rr_para
+	b	.L1930
+.L1963:
 	.align	2
-.L2061:
-	.word	.LANCHOR93
-	.word	.LANCHOR91
-	.size	pm_flush_id, .-pm_flush_id
-	.section	.text.pm_flush,"ax",%progbits
+.L1962:
+	.word	.LANCHOR13
+	.word	.LANCHOR23
+	.word	.LANCHOR14
+	.word	.LC111
+	.word	.LANCHOR156
+	.word	.LANCHOR158
+	.word	.LANCHOR44
+	.word	.LC113
+	.word	.LC112
+	.size	toshiba_3d_read_retrial, .-toshiba_3d_read_retrial
+	.section	.text.toshiba_read_retrial,"ax",%progbits
 	.align	1
-	.global	pm_flush
+	.global	toshiba_read_retrial
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	pm_flush, %function
-pm_flush:
-	@ args = 0, pretend = 0, frame = 0
+	.type	toshiba_read_retrial, %function
+toshiba_read_retrial:
+	@ args = 4, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	movs	r4, #0
-	ldr	r5, .L2067
-.L2065:
-	add	r3, r5, r4, lsl #3
-	uxth	r0, r4
-	ldrsh	r3, [r3, #2]
-	cmp	r3, #0
-	bge	.L2064
-	bl	pm_flush_id
-.L2064:
-	adds	r4, r4, #1
-	cmp	r4, #32
-	bne	.L2065
-	movs	r0, #0
-	pop	{r3, r4, r5, pc}
-.L2068:
-	.align	2
-.L2067:
-	.word	.LANCHOR93
-	.size	pm_flush, .-pm_flush
-	.section	.text.flt_sys_flush,"ax",%progbits
-	.align	1
-	.global	flt_sys_flush
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	flt_sys_flush, %function
-flt_sys_flush:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	bl	ftl_flush
-	bl	pm_flush
-	bl	ftl_ext_info_flush
-	movs	r0, #0
-	pop	{r3, lr}
-	b	ftl_info_flush
-	.size	flt_sys_flush, .-flt_sys_flush
-	.section	.text.rk_ftl_de_init,"ax",%progbits
-	.align	1
-	.global	rk_ftl_de_init
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	rk_ftl_de_init, %function
-rk_ftl_de_init:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	bl	FlashDeInit
-	bl	flt_sys_flush
-	pop	{r3, lr}
-	b	FlashDeInit
-	.size	rk_ftl_de_init, .-rk_ftl_de_init
-	.section	.text.pm_init,"ax",%progbits
-	.align	1
-	.global	pm_init
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	pm_init, %function
-pm_init:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r8, r0
-	ldr	r5, .L2088
-	movs	r4, #0
-	movs	r0, #64
-	ldr	r3, .L2088+4
-	ldr	r7, .L2088+8
-	mov	r10, r5
-	str	r4, [r3]
-	bl	ftl_malloc
-	str	r0, [r7]
-.L2073:
-	movw	r3, #65535
-	adds	r6, r5, r4
-	strh	r3, [r4, r5]	@ movhi
-	movs	r3, #0
-	strh	r3, [r6, #2]	@ movhi
-	cmp	r8, #0
-	beq	.L2072
-	ldr	r3, .L2088+12
-	ldrb	r0, [r3]	@ zero_extendqisi2
-	lsls	r0, r0, #9
-	bl	ftl_malloc
-	str	r0, [r6, #4]
-.L2072:
-	adds	r4, r4, #8
-	cmp	r4, #256
-	bne	.L2073
-	ldr	r3, [r10, #4]
-	ldr	r4, .L2088+16
-	ldr	r8, [r7]
-	str	r3, [sp, #12]
-	ldr	r3, [r4]
-	ldr	r2, [sp, #12]
-	ldrh	r1, [r3, #692]
-	ldrb	r0, [r3, #694]	@ zero_extendqisi2
-	movs	r3, #4
-	str	r3, [sp]
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #24
+	mov	r7, r0
+	str	r2, [sp, #12]
+	add	r10, r7, #8
+	str	r3, [sp, #16]
+	str	r1, [sp, #8]
+	bl	nandc_wait_flash_ready
+	ldr	r3, .L1991
+	ldr	r2, .L1991+4
+	ldr	r6, [r3]
+	ldrb	r3, [r2]	@ zero_extendqisi2
+	str	r2, [sp, #20]
+	subs	r3, r3, #67
+	add	r10, r6, r10, lsl #8
+	cmp	r3, #1
+	bls	.L1982
+	ldr	r3, .L1991+8
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	cbz	r5, .L1966
+	movs	r5, #1
+	movs	r0, #1
+	bl	nandc_set_if_mode
+.L1966:
+	add	r3, r6, r7, lsl #8
+	movs	r2, #92
+	str	r2, [r3, #2056]
+	movs	r2, #197
+	str	r2, [r3, #2056]
+.L1965:
+	mov	r8, #1
+	mov	fp, #-1
+.L1967:
+	ldr	r3, .L1991+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	cmp	r8, r3
+	bcc	.L1976
+	mov	r4, fp
+.L1975:
+	ldr	r3, .L1991+4
+	movs	r1, #0
+	mov	r0, r10
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	subs	r3, r3, #67
+	cmp	r3, #1
+	bhi	.L1977
+	bl	sandisk_set_rr_para
+.L1978:
+	add	r6, r6, r7, lsl #8
+	movs	r3, #255
+	str	r3, [r6, #2056]
+	ldr	r3, .L1991+16
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r4, r3, asr #2
+	bcc	.L1979
+	adds	r3, r4, #1
+	ldr	r2, [sp, #8]
+	it	ne
+	movne	r4, #256
 	mov	r3, r8
-	bl	flash_get_last_written_page
-	ldr	r1, [r4]
-	mov	r5, r0
-	ldrh	r2, [r1, #696]
-	cmp	r2, r0
-	bgt	.L2074
-	mov	r3, r0
-	ldrh	r1, [r1, #692]
-	ldr	r0, .L2088+20
+	str	r4, [sp]
+	mov	r1, r8
+	ldr	r0, .L1991+20
 	bl	printf
-	ldr	r3, [r4]
-	ldrsh	r6, [r3, #696]
-.L2075:
-	cmp	r6, r5
-	ble	.L2077
-	ldr	r3, .L2088+24
-	movs	r2, #1
-	add	r5, r5, r2
-	strb	r2, [r3]
-	ldr	r3, [r4]
-	strh	r5, [r3, #696]	@ movhi
-	bl	pm_free_sblk
-	ldr	r1, [r10, #4]
-	mov	r0, #-1
-	bl	pm_write_page
-	ldr	r1, [r10, #4]
-	mov	r0, #-1
-	bl	pm_write_page
-.L2074:
-	bl	pm_free_sblk
-	bl	pm_gc
-	movs	r0, #0
-	add	sp, sp, #16
+.L1979:
+	bl	nandc_wait_flash_ready
+	cbz	r5, .L1964
+	movs	r0, #4
+	bl	nandc_set_if_mode
+.L1964:
+	mov	r0, r4
+	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2077:
-	ldr	r3, [r4]
-	ldr	r2, .L2088+28
-	ldrh	r7, [r3, #692]
-	ldrh	r2, [r2]
-	ldrb	r0, [r3, #694]	@ zero_extendqisi2
-	ldr	r3, .L2088+12
-	mla	r7, r2, r7, r6
-	ldr	r2, [sp, #12]
+.L1982:
+	movs	r5, #0
+	b	.L1965
+.L1976:
+	ldr	r3, [sp, #20]
+	mov	r0, r10
+	uxtb	r1, r8
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	mov	r1, r7
+	subs	r3, r3, #67
+	cmp	r3, #1
+	bhi	.L1968
+	bl	sandisk_set_rr_para
+.L1969:
+	ldr	r3, .L1991+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #34
+	bne	.L1970
+	ldr	r3, .L1991+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	subs	r3, r3, #3
+	cmp	r8, r3
+	ittt	eq
+	addeq	r3, r6, r7, lsl #8
+	moveq	r2, #179
+	streq	r2, [r3, #2056]
+.L1970:
+	add	r3, r6, r7, lsl #8
+	movs	r2, #38
+	add	r1, sp, #8
+	str	r2, [r3, #2056]
+	movs	r2, #93
+	str	r2, [r3, #2056]
+	mov	r0, r7
+	ldr	r3, [sp, #56]
 	str	r3, [sp]
-	mov	r3, r8
-	bl	flash_read_page_en
-	ldr	r3, [r4]
-	mov	fp, r0
-	ldr	r0, .L2088+32
-	ldr	r2, [r3, #48]
-	adds	r2, r2, #1
-	str	r2, [r3, #48]
-	mov	r2, r7
-	ldrh	r3, [r3, #694]
-	ldr	r1, [r8]
-	bl	printf
+	ldm	r1, {r1, r2, r3}
+	bl	flash_read_page
+	adds	r2, r0, #1
+	mov	r4, r0
+	beq	.L1973
+	ldr	r3, .L1991+24
 	cmp	fp, #-1
-	beq	.L2076
-	cmp	fp, #512
-	beq	.L2076
-	ldr	r2, [r4]
-	ldr	r3, [r8]
-	ldrh	r1, [r2, #698]
-	cmp	r3, r1
-	itt	cc
-	addcc	r3, r3, #176
-	strcc	r7, [r2, r3, lsl #2]
-.L2076:
-	adds	r6, r6, #1
-	sxth	r6, r6
-	b	.L2075
-.L2089:
+	it	eq
+	moveq	fp, r0
+	ldr	r3, [r3]
+	str	r3, [sp, #12]
+	ldr	r3, .L1991+28
+	ldr	r3, [r3]
+	str	r3, [sp, #16]
+	ldr	r3, .L1991+16
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r0, r3, asr #2
+	bcc	.L1975
+.L1973:
+	add	r8, r8, #1
+	b	.L1967
+.L1968:
+	bl	toshiba_set_rr_para
+	b	.L1969
+.L1977:
+	bl	toshiba_set_rr_para
+	b	.L1978
+.L1992:
 	.align	2
-.L2088:
-	.word	.LANCHOR93
-	.word	.LANCHOR91
-	.word	.LANCHOR141
-	.word	.LANCHOR45
-	.word	.LANCHOR46
-	.word	.LC97
-	.word	.LANCHOR133
-	.word	.LANCHOR75
-	.word	.LC98
-	.size	pm_init, .-pm_init
-	.section	.text.pm_log2phys,"ax",%progbits
+.L1991:
+	.word	.LANCHOR13
+	.word	.LANCHOR23
+	.word	.LANCHOR21
+	.word	.LANCHOR159
+	.word	.LANCHOR44
+	.word	.LC113
+	.word	.LANCHOR156
+	.word	.LANCHOR158
+	.size	toshiba_read_retrial, .-toshiba_read_retrial
+	.section	.text.hynix_read_retrial,"ax",%progbits
 	.align	1
-	.global	pm_log2phys
+	.global	hynix_read_retrial
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	pm_log2phys, %function
-pm_log2phys:
-	@ args = 0, pretend = 0, frame = 0
+	.type	hynix_read_retrial, %function
+hynix_read_retrial:
+	@ args = 4, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2104
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r7, r1
-	mov	r4, r0
-	mov	r8, r2
-	ldrb	r5, [r3]	@ zero_extendqisi2
-	lsls	r1, r5, #7
-	lsls	r5, r5, #7
-	bl	__aeabi_uidiv
-	ldr	r3, .L2104+4
-	uxth	r10, r0
-	mov	r6, r0
-	smulbb	r5, r5, r10
-	ldr	r2, [r3]
-	subs	r5, r4, r5
-	cmp	r4, r2
-	uxth	r5, r5
-	bcc	.L2091
-	mov	r1, r4
-	ldr	r0, .L2104+8
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r6, #0
+	str	r3, [sp, #12]
+	mov	r4, #-1
+	mov	r7, r0
+	mov	r8, r1
+	ldr	r3, .L2007
+	str	r2, [sp, #8]
+	ldr	r3, [r3]
+	add	r10, r3, r0
+	ldrb	fp, [r3, #114]	@ zero_extendqisi2
+	ldrb	r5, [r10, #120]	@ zero_extendqisi2
+	bl	nandc_wait_flash_ready
+.L1994:
+	cmp	r6, fp
+	bcc	.L1999
+.L1998:
+	ldr	r3, .L2007+4
+	strb	r5, [r10, #120]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r4, r3, asr #2
+	bcc	.L2000
+	adds	r3, r4, #1
+	mov	r2, r8
+	it	ne
+	movne	r4, #256
+	mov	r3, r6
+	str	r4, [sp]
+	mov	r1, r6
+	ldr	r0, .L2007+8
 	bl	printf
-	mov	r0, #-1
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2091:
-	ldr	r2, .L2104+12
-	movs	r3, #0
-	mov	fp, r2
-.L2097:
-	add	r1, r2, r3, lsl #3
-	uxth	r4, r3
-	ldr	r1, [r1, #4]
-	cbz	r1, .L2093
-	ldrh	r1, [r2, r3, lsl #3]
-	cmp	r1, r10
-	bne	.L2093
-.L2094:
-	lsls	r4, r4, #3
-	cmp	r8, #0
-	bne	.L2095
-	add	r3, fp, r4
-	ldr	r3, [r3, #4]
-	ldr	r3, [r3, r5, lsl #2]
-	str	r3, [r7]
-.L2096:
-	add	r4, r4, fp
-	movw	r2, #32767
-	ldrh	r3, [r4, #2]
-	ubfx	r1, r3, #0, #15
-	cmp	r1, r2
-	beq	.L2099
-	adds	r3, r3, #1
-	strh	r3, [r4, #2]	@ movhi
-.L2099:
-	movs	r0, #0
+.L2000:
+	bl	nandc_wait_flash_ready
+	mov	r0, r4
+	add	sp, sp, #16
+	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2095:
-	add	r2, fp, r4
-	ldr	r1, [r7]
-	ldr	r3, [r2, #4]
-	str	r1, [r3, r5, lsl #2]
-	ldrh	r3, [r2, #2]
-	mvn	r3, r3, lsl #17
-	mvn	r3, r3, lsr #17
-	strh	r3, [r2, #2]	@ movhi
-	ldr	r3, .L2104+16
-	strb	r6, [r3]
-	b	.L2096
-.L2093:
-	adds	r3, r3, #1
-	cmp	r3, #32
-	bne	.L2097
-	bl	pm_select_ram_region
-	ldrh	r2, [fp, r0, lsl #3]
-	movw	r3, #65535
+.L1999:
+	adds	r5, r5, #1
+	mov	r0, r7
+	uxtb	r5, r5
+	cmp	fp, r5
+	it	ls
+	movls	r5, #0
+	mov	r1, r5
+	bl	hynix_set_rr_para
+	ldr	r3, [sp, #48]
+	mov	r1, r8
+	ldr	r2, [sp, #8]
+	mov	r0, r7
+	str	r3, [sp]
+	ldr	r3, [sp, #12]
+	bl	flash_read_page
+	adds	r2, r0, #1
+	beq	.L1996
+	ldr	r3, .L2007+12
+	cmp	r4, #-1
+	it	eq
+	moveq	r4, r0
+	ldr	r3, [r3]
+	str	r3, [sp, #8]
+	ldr	r3, .L2007+16
+	ldr	r3, [r3]
+	str	r3, [sp, #12]
+	ldr	r3, .L2007+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r0, r3, asr #2
+	bcc	.L2002
+.L1996:
+	adds	r6, r6, #1
+	b	.L1994
+.L2002:
 	mov	r4, r0
-	cmp	r2, r3
-	beq	.L2098
-	add	r3, fp, r0, lsl #3
-	ldrsh	r3, [r3, #2]
-	cmp	r3, #0
-	bge	.L2098
-	bl	pm_flush_id
-.L2098:
-	ldr	r3, .L2104+20
-	mov	r1, r4
-	mov	r0, r10
-	strb	r4, [r3]
-	bl	load_l2p_region
-	b	.L2094
-.L2105:
+	b	.L1998
+.L2008:
 	.align	2
-.L2104:
-	.word	.LANCHOR45
-	.word	.LANCHOR47
-	.word	.LC99
-	.word	.LANCHOR93
-	.word	.LANCHOR94
-	.word	.LANCHOR151
-	.size	pm_log2phys, .-pm_log2phys
-	.section	.text.ftl_read_ahead,"ax",%progbits
+.L2007:
+	.word	.LANCHOR27
+	.word	.LANCHOR44
+	.word	.LC114
+	.word	.LANCHOR156
+	.word	.LANCHOR158
+	.size	hynix_read_retrial, .-hynix_read_retrial
+	.section	.text.flash_ddr_tuning_read,"ax",%progbits
 	.align	1
-	.global	ftl_read_ahead
+	.global	flash_ddr_tuning_read
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_read_ahead, %function
-ftl_read_ahead:
-	@ args = 0, pretend = 0, frame = 8
+	.type	flash_ddr_tuning_read, %function
+flash_ddr_tuning_read:
+	@ args = 4, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, lr}
-	sub	sp, sp, #28
-	ldr	r6, .L2119
-	ldr	r3, [r6]
-	adds	r3, r3, #1
-	beq	.L2107
-	movs	r0, #0
-	bl	buf_alloc
-	mov	r4, r0
-	mov	r0, #-1
-	cbz	r4, .L2106
-	ldr	r5, [r6]
-	str	r0, [r6]
-	ldr	r7, [r4, #4]
-	str	r5, [r4, #20]
-	mov	r0, r5
-	bl	lpa_hash_get_ppa
-	str	r0, [sp, #20]
-	adds	r0, r0, #1
-	ldr	r6, [r4, #12]
-	bne	.L2109
-	movs	r2, #0
-	add	r1, sp, #20
-	mov	r0, r5
-	bl	pm_log2phys
-.L2109:
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #0
+	sub	sp, sp, #32
+	mov	r5, r4
+	mov	r6, #1024
+	movs	r7, #6
+	str	r3, [sp, #20]
+	mov	r8, r0
+	mov	fp, r1
+	str	r2, [sp, #16]
+	bl	nandc_get_ddr_para
+	mov	r3, #-1
+	str	r0, [sp, #28]
+	str	r4, [sp, #24]
+	str	r4, [sp, #12]
+	str	r3, [sp, #8]
+.L2015:
+	uxtb	r0, r7
+	bl	nandc_set_ddr_para
+	ldr	r3, [sp, #64]
+	mov	r1, fp
+	ldr	r2, [sp, #16]
+	mov	r0, r8
+	str	r3, [sp]
 	ldr	r3, [sp, #20]
-	str	r3, [r4, #24]
-	str	r3, [r4, #28]
-	adds	r3, r3, #1
-	bne	.L2110
-	ldr	r3, .L2119+4
-	movs	r1, #0
-	mov	r0, r7
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	lsls	r2, r2, #9
-	bl	ftl_memset
-	ldrb	r3, [r4, #2]	@ zero_extendqisi2
-	orr	r3, r3, #8
-	strb	r3, [r4, #2]
-.L2107:
-	movs	r0, #0
-.L2106:
-	add	sp, sp, #28
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L2110:
-	movs	r1, #1
-	mov	r0, r4
-	bl	sblk_read_page
-	ldr	r7, [r4, #36]
-	cmp	r7, #256
-	bne	.L2111
-	ldr	r3, .L2119+8
-	mov	r8, #1
-	ldr	r0, [sp, #20]
-	ldrh	r2, [r3]
-	rsb	r3, r2, #21
-	lsrs	r0, r0, r2
-	lsl	r3, r8, r3
-	ldr	r2, .L2119+12
-	subs	r3, r3, #1
-	ands	r0, r0, r3
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	bl	__aeabi_uidiv
-	ldr	r2, [r4, #20]
-	uxth	r1, r0
+	bl	flash_read_page
+	ldr	r3, .L2032
 	mov	r10, r0
-	ldr	r3, [r4, #24]
-	ldr	r0, .L2119+16
+	ldr	r3, [r3]
+	lsls	r3, r3, #27
+	bpl	.L2010
+	mov	r3, r0
+	mov	r2, fp
+	mov	r1, r7
+	ldr	r0, .L2032+4
 	bl	printf
-	movs	r2, #0
+.L2010:
+	adds	r3, r6, #1
+	cmp	r10, r3
+	bhi	.L2011
+	ldr	r3, .L2032+8
+	ldr	r3, [r3]
+	str	r3, [sp, #16]
+	ldr	r3, .L2032+12
+	ldr	r3, [r3]
+	str	r3, [sp, #20]
+	ldr	r3, .L2032+16
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r10, r3, lsr #2
+	bcs	.L2021
+	adds	r5, r5, #1
+	cmp	r5, #7
+	bls	.L2021
+	subs	r4, r7, r5
+	mov	r6, r10
+	movs	r3, #0
+	str	r3, [sp, #8]
+.L2013:
+	ldr	r3, [sp, #24]
+	ldr	r2, [sp, #12]
+	cmp	r5, r2
+	it	cc
+	movcc	r4, r3
+.L2014:
+	cmp	r4, #0
+	beq	.L2016
+	ldr	r3, .L2032+16
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	ldr	r3, .L2032+20
+	umull	r2, r3, r2, r3
+	ubfx	r3, r3, #1, #8
+	cmp	r3, r6
+	bls	.L2016
+	mov	r1, r4
+	ldr	r0, .L2032+24
+	bl	printf
+	uxtb	r0, r4
+.L2031:
+	bl	nandc_set_ddr_para
+	ldr	r3, [sp, #8]
+	cbz	r3, .L2009
 	mov	r1, r8
-	uxth	r0, r10
-	bl	gc_add_sblk
-.L2111:
-	ldr	r3, [r6, #4]
-	cmp	r5, r3
-	beq	.L2112
-	ldr	r2, [r6, #12]
-	ldrb	r1, [r4, #1]	@ zero_extendqisi2
-	ldr	r0, .L2119+20
-	str	r2, [sp, #12]
-	ldr	r2, [r6, #8]
-	str	r3, [sp, #4]
-	str	r2, [sp, #8]
-	mov	r2, r5
-	ldr	r3, [r6]
+	mov	r2, fp
+	ldr	r0, .L2032+28
+	bl	printf
+	mov	r0, r8
+	bl	flash_reset
+	movs	r0, #1
+	bl	flash_set_interface_mode
+	movs	r0, #1
+	bl	nandc_set_if_mode
+	ldr	r3, .L2032+32
+	movs	r2, #2
+	mov	r0, r8
+	strb	r2, [r3, r8]
+	bl	zftl_flash_enter_slc_mode
+	ldr	r3, [sp, #64]
+	mov	r1, fp
+	ldr	r2, [sp, #16]
+	mov	r0, r8
 	str	r3, [sp]
 	ldr	r3, [sp, #20]
+	bl	flash_read_page
+	mov	r2, fp
+	mov	r3, r0
+	mov	r6, r0
+	mov	r1, r8
+	ldr	r0, .L2032+36
 	bl	printf
-.L2112:
-	ldr	r3, [r6, #4]
-	cmp	r5, r3
-	bne	.L2113
-	adds	r7, r7, #1
-	bne	.L2107
-.L2113:
-	movw	r2, #758
-	ldr	r1, .L2119+24
-	ldr	r0, .L2119+28
-	bl	printf
-.L2114:
-	b	.L2114
-.L2120:
-	.align	2
-.L2119:
-	.word	.LANCHOR49
-	.word	.LANCHOR45
-	.word	.LANCHOR71
-	.word	.LANCHOR70
-	.word	.LC100
-	.word	.LC101
-	.word	.LANCHOR152
-	.word	.LC0
-	.size	ftl_read_ahead, .-ftl_read_ahead
-	.section	.text.gc_update_l2p_map,"ax",%progbits
-	.align	1
-	.global	gc_update_l2p_map
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	gc_update_l2p_map, %function
-gc_update_l2p_map:
-	@ args = 0, pretend = 0, frame = 24
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2138
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r5, #0
-	sub	sp, sp, #24
-	mov	r4, r5
-	mov	r8, r5
-	ldr	fp, [r3]
-.L2122:
-	ldr	r3, .L2138+4
-	ldrh	r3, [r3]
-	cmp	r4, r3
-	bge	.L2132
-	lsls	r3, r4, #1
-	movs	r7, #0
-	subs	r3, r3, #1
-	str	r3, [sp, #8]
-	b	.L2133
-.L2129:
-	ldr	r3, .L2138+8
-	ldr	r3, [r3]
-	ldr	r10, [r3, r8, lsl #2]
-	cmp	r10, #-1
-	beq	.L2123
-	ldr	r2, .L2138+12
-	mov	r0, r10
-	ldr	r2, [r2]
-	ldr	r3, [r2, r8, lsl #2]
-	str	r3, [sp, #4]
-	bl	lpa_hash_get_ppa
-	str	r0, [sp, #20]
-	adds	r0, r0, #1
-	bne	.L2124
-	movs	r2, #0
-	add	r1, sp, #20
-	mov	r0, r10
-	bl	pm_log2phys
-.L2124:
-	ldr	r2, [sp, #20]
-	ldr	r3, [sp, #4]
-	cmp	r3, r2
-	bne	.L2125
-	ldr	r3, [sp, #12]
-	ldr	r2, .L2138+16
-	ldrh	r1, [r3, #96]
-	ldrh	r2, [r2]
-	ldr	r3, .L2138+20
-	muls	r2, r1, r2
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	cmp	r1, #3
-	bne	.L2126
-	add	r2, r2, r4
-	orr	r2, r2, r6, lsl #24
-.L2137:
-	str	r2, [sp, #16]
-	add	r1, sp, #16
-	movs	r2, #1
-	mov	r0, r10
-	bl	pm_log2phys
-	ldr	r3, .L2138+24
-	adds	r5, r5, #1
-	ldrh	r0, [r3]
-	movs	r3, #1
-	rsb	r2, r0, #21
-	lsls	r3, r3, r2
-	ldr	r2, [sp, #4]
-	subs	r3, r3, #1
-	lsrs	r2, r2, r0
-	mov	r0, r2
-	ldr	r2, .L2138+28
-	ands	r0, r0, r3
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	bl	__aeabi_uidiv
-	uxth	r0, r0
-	bl	ftl_vpn_decrement
-.L2125:
-	add	r8, r8, #1
-.L2123:
-	adds	r6, r6, #1
-.L2131:
-	ldr	r3, .L2138+20
+	ldr	r3, .L2032+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r6, r3
-	ble	.L2129
-	adds	r7, r7, #1
-.L2133:
-	ldrb	r3, [fp, #89]	@ zero_extendqisi2
-	cmp	r7, r3
-	bge	.L2130
-	add	r3, fp, r7, lsl #1
-	movs	r6, #1
-	str	r3, [sp, #12]
-	b	.L2131
-.L2126:
-	cmp	r1, #2
-	itett	eq
-	ldreq	r3, [sp, #8]
-	addne	r2, r2, r4
-	addeq	r2, r2, r3
-	addeq	r2, r2, r6
-	it	eq
-	orreq	r2, r2, #33554432
-	b	.L2137
-.L2130:
-	adds	r4, r4, #1
-	b	.L2122
-.L2132:
-	ldr	r3, .L2138+32
-	ldrh	r2, [fp, #80]
-	ldr	r3, [r3]
-	strh	r5, [r3, r2, lsl #1]	@ movhi
-	add	sp, sp, #24
+	bhi	.L2023
+	ldr	r2, .L2032+40
+	ldr	r3, [r2]
+	adds	r3, r3, #1
+	cmp	r3, #100
+	str	r3, [r2]
+	bls	.L2019
+	ldr	r3, .L2032+44
+	movs	r2, #0
+	strb	r2, [r3]
+.L2009:
+	mov	r0, r6
+	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2139:
+.L2011:
+	ldr	r3, [sp, #12]
+	cmp	r5, r3
+	bls	.L2022
+	cmp	r5, #7
+	sub	r3, r4, r5
+	str	r3, [sp, #24]
+	bhi	.L2014
+	str	r5, [sp, #12]
+.L2022:
+	movs	r5, #0
+	b	.L2012
+.L2021:
+	mov	r4, r7
+	mov	r6, r10
+	movs	r3, #0
+	str	r3, [sp, #8]
+.L2012:
+	adds	r7, r7, #2
+	cmp	r7, #50
+	bne	.L2015
+	b	.L2013
+.L2016:
+	ldrb	r0, [sp, #28]	@ zero_extendqisi2
+	b	.L2031
+.L2023:
+	ldr	r6, [sp, #8]
+.L2019:
+	ldr	r4, .L2032+48
+	ldrb	r0, [r4]	@ zero_extendqisi2
+	bl	flash_set_interface_mode
+	ldrb	r0, [r4]	@ zero_extendqisi2
+	bl	nandc_set_if_mode
+	b	.L2009
+.L2033:
 	.align	2
-.L2138:
-	.word	.LANCHOR60
-	.word	.LANCHOR79
-	.word	.LANCHOR107
-	.word	.LANCHOR108
-	.word	.LANCHOR75
-	.word	.LANCHOR64
-	.word	.LANCHOR71
-	.word	.LANCHOR70
-	.word	.LANCHOR56
-	.size	gc_update_l2p_map, .-gc_update_l2p_map
-	.section	.text.gc_update_l2p_map_new,"ax",%progbits
+.L2032:
+	.word	.LANCHOR14
+	.word	.LC115
+	.word	.LANCHOR156
+	.word	.LANCHOR158
+	.word	.LANCHOR44
+	.word	-1431655765
+	.word	.LC116
+	.word	.LC117
+	.word	.LANCHOR32
+	.word	.LC118
+	.word	.LANCHOR160
+	.word	.LANCHOR21
+	.word	.LANCHOR43
+	.size	flash_ddr_tuning_read, .-flash_ddr_tuning_read
+	.section	.text.flash_read_page_en,"ax",%progbits
 	.align	1
-	.global	gc_update_l2p_map_new
+	.global	flash_read_page_en
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	gc_update_l2p_map_new, %function
-gc_update_l2p_map_new:
-	@ args = 0, pretend = 0, frame = 32
+	.type	flash_read_page_en, %function
+flash_read_page_en:
+	@ args = 4, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2177
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #32
-	ldr	r2, .L2177+4
-	ldr	r4, [r3]
-	ldrh	r2, [r2]
-	str	r3, [sp, #16]
-	ldrb	r1, [r4, #89]	@ zero_extendqisi2
-	muls	r2, r1, r2
-	str	r2, [sp, #4]
-	ldr	r2, .L2177+8
-	ldr	r2, [r2]
-	tst	r2, #256
-	beq	.L2141
-	ldrh	r1, [r4, #80]
-	ldr	r0, .L2177+12
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r8, r3
+	ldr	r3, .L2061
+	mov	r7, r2
+	mov	r5, r0
+	mov	r4, r1
+	ldr	r10, [sp, #48]
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	mov	fp, r3
+	cmp	r2, r0
+	bhi	.L2035
+	mov	r2, #398
+	ldr	r1, .L2061+4
+	ldr	r0, .L2061+8
 	bl	printf
-.L2141:
-	ldr	r3, .L2177+16
-	movs	r7, #0
-	ldr	r1, [sp, #4]
-	mov	r5, r7
-	ldrh	r2, [r4, #80]
-	ldr	r3, [r3]
-	subs	r1, r1, #1
-	strh	r1, [r3, r2, lsl #1]	@ movhi
-.L2142:
-	ldr	r3, [sp, #4]
-	cmp	r5, r3
-	bne	.L2151
-	ldr	r3, .L2177+8
-	ldr	r5, .L2177+16
+.L2035:
+	ldr	r3, .L2061+12
+	ldrb	r6, [r3, r5]	@ zero_extendqisi2
+	ldrb	r3, [fp]	@ zero_extendqisi2
+	cmp	r3, r5
+	bcs	.L2036
+	ldr	r3, .L2061+16
 	ldr	r3, [r3]
-	tst	r3, #256
-	beq	.L2152
-	ldr	r3, [sp, #16]
-	ldrh	r0, [r4, #80]
-	ldr	r2, [r5]
-	ldr	r1, [r3]
-	mov	r3, r7
-	ldrh	r2, [r2, r0, lsl #1]
-	ldrh	r1, [r1, #80]
-	ldr	r0, .L2177+20
-	bl	printf
-.L2152:
-	ldrh	r2, [r4, #80]
-	ldr	r3, [r5]
-	ldrh	r1, [r3, r2, lsl #1]
-	cmp	r7, r1
-	beq	.L2153
-	mov	r2, #448
-	ldr	r1, .L2177+24
-	ldr	r0, .L2177+28
+	lsls	r0, r3, #25
+	bmi	.L2037
+.L2060:
+	mov	r0, #-1
+.L2034:
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2037:
+	mov	r3, r4
+	mov	r2, r5
+	mov	r1, r6
+	ldr	r0, .L2061+20
 	bl	printf
-.L2154:
-	b	.L2154
-.L2151:
-	ldr	r3, .L2177+32
-	lsl	r8, r5, #2
-	ldr	r3, [r3]
-	ldr	r6, [r3, r5, lsl #2]
-	adds	r2, r6, #1
-	beq	.L2143
-	ldr	r3, .L2177+36
-	mov	r0, r6
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	lsls	r1, r1, #7
-	bl	__aeabi_uidiv
-	uxth	r3, r0
+	b	.L2060
+.L2036:
+	tst	r4, #50331648
+	bne	.L2039
+	ldr	r3, .L2061+24
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	ldr	r3, .L2061+28
+	cbz	r2, .L2040
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	cbz	r2, .L2039
+.L2040:
+	ldr	r2, .L2061+32
+	mov	r0, r4
 	str	r3, [sp, #12]
-	ldr	r3, .L2177+8
-	ldr	r3, [r3]
-	lsls	r3, r3, #23
-	bpl	.L2144
-	mov	r3, r5
-	mov	r2, r6
-	ldr	r1, [sp, #12]
-	ldr	r0, .L2177+40
-	bl	printf
-.L2144:
-	ldr	fp, .L2177+32
-	str	r5, [sp, #8]
-.L2150:
-	ldr	r3, [fp]
-	ldr	r6, [r3, r8]
-	adds	r0, r6, #1
-	beq	.L2145
-	ldr	r3, .L2177+36
-	mov	r0, r6
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	lsls	r1, r1, #7
+	ldrh	r5, [r2]
+	mov	r1, r5
 	bl	__aeabi_uidiv
+	mov	r1, r5
+	mul	fp, r5, r0
+	mov	r0, r4
+	bl	__aeabi_uidivmod
 	ldr	r3, [sp, #12]
-	uxth	r0, r0
-	cmp	r3, r0
-	bne	.L2145
-	ldr	r3, .L2177+44
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2041
+	add	r4, fp, r1, lsl #1
+.L2039:
+	mov	r1, r4
+	str	r10, [sp]
+	mov	r3, r8
+	mov	r2, r7
 	mov	r0, r6
-	ldr	r3, [r3]
-	ldr	r10, [r3, r8]
-	bl	lpa_hash_get_ppa
-	str	r0, [sp, #28]
-	adds	r0, r0, #1
-	bne	.L2146
-	movs	r2, #0
-	add	r1, sp, #28
+	bl	flash_read_page
+	adds	r1, r0, #1
+	bne	.L2034
+	ldr	r5, .L2061+36
+	ldrb	fp, [r5]	@ zero_extendqisi2
+	cmp	fp, #0
+	bne	.L2042
+.L2045:
+	ldr	r3, .L2061+40
+	ldr	fp, [r3]
+	cmp	fp, #0
+	bne	.L2043
+.L2044:
+	ldrb	r3, [r5]	@ zero_extendqisi2
+	mov	r2, r4
+	movs	r1, #0
+	ldr	r0, .L2061+44
+	str	r3, [sp]
+	mov	r3, #-1
+	bl	printf
+	ldr	r3, .L2061+48
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L2060
+	str	r10, [sp, #48]
+	mov	r3, r8
+	mov	r2, r7
+	mov	r1, r4
 	mov	r0, r6
-	bl	pm_log2phys
-.L2146:
-	ldr	r3, [sp, #28]
-	cmp	r10, r3
-	bne	.L2147
-	ldr	r3, .L2177+48
-	add	r1, sp, #32
-	movs	r2, #1
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	flash_ddr_tuning_read
+.L2041:
+	ldr	r3, .L2061+52
+	ldrh	r4, [r3, r1, lsl #1]
+	add	r4, r4, fp
+	b	.L2039
+.L2042:
+	movs	r3, #0
+	mov	r2, r7
+	strb	r3, [r5]
+	mov	r1, r4
+	str	r10, [sp]
+	mov	r3, r8
 	mov	r0, r6
-	adds	r7, r7, #1
-	ldr	r3, [r3]
-	ldr	r3, [r3, r8]
-	str	r3, [r1, #-8]!
-	bl	pm_log2phys
-	ldr	r3, .L2177+52
-	ldrh	r0, [r3]
-	movs	r3, #1
-	rsb	r2, r0, #21
-	lsls	r3, r3, r2
-	ldr	r2, .L2177+56
-	lsr	r0, r10, r0
-	subs	r3, r3, #1
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	ands	r0, r0, r3
-	bl	__aeabi_uidiv
-	uxth	r3, r0
-	mov	r0, r3
-	str	r3, [sp, #20]
-	bl	ftl_vpn_decrement
-	ldrh	r2, [r4, #80]
-	ldr	r3, [sp, #20]
-	cmp	r2, r3
-	bne	.L2148
-	ldr	r3, .L2177+8
+	bl	flash_read_page
+	adds	r2, r0, #1
+	strb	fp, [r5]
+	beq	.L2045
+	b	.L2034
+.L2043:
+	mov	r3, r8
+	str	r10, [sp]
+	mov	r2, r7
+	mov	r1, r4
+	mov	r0, r6
+	blx	fp
+	adds	r3, r0, #1
+	beq	.L2044
+	b	.L2034
+.L2062:
+	.align	2
+.L2061:
+	.word	.LANCHOR18
+	.word	.LANCHOR161
+	.word	.LC0
+	.word	.LANCHOR30
+	.word	.LANCHOR14
+	.word	.LC119
+	.word	.LANCHOR0
+	.word	.LANCHOR1
+	.word	.LANCHOR2
+	.word	.LANCHOR46
+	.word	.LANCHOR162
+	.word	.LC120
+	.word	.LANCHOR21
+	.word	.LANCHOR3
+	.size	flash_read_page_en, .-flash_read_page_en
+	.section	.text.flash_get_last_written_page,"ax",%progbits
+	.align	1
+	.global	flash_get_last_written_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_get_last_written_page, %function
+flash_get_last_written_page:
+	@ args = 4, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r8, r1
+	ldr	r1, .L2073
+	mov	fp, r2
+	mov	r10, r3
+	str	r0, [sp, #12]
+	ldrh	r4, [r1]
+	ldr	r1, .L2073+4
+	subs	r4, r4, #1
+	ldrh	r6, [r1, #26]
+	sxth	r4, r4
+	ldr	r1, [sp, #48]
+	mul	r6, r8, r6
+	str	r1, [sp]
+	adds	r1, r4, r6
+	bl	flash_read_page_en
+	cmp	r0, #512
+	bne	.L2064
+	movs	r7, #0
+.L2065:
+	cmp	r7, r4
+	ble	.L2068
+.L2064:
+	ldr	r3, .L2073+8
 	ldr	r3, [r3]
-	lsls	r1, r3, #23
-	bpl	.L2148
-	ldr	r3, [sp, #28]
-	mov	r2, r10
-	mov	r1, r6
-	ldr	r0, .L2177+60
-	bl	printf
-.L2148:
-	ldr	r3, [fp]
-	mov	r2, #-1
-	str	r2, [r3, r8]
-.L2145:
-	ldr	r3, [sp, #8]
-	add	r8, r8, #4
-	adds	r3, r3, #1
-	str	r3, [sp, #8]
-	ldr	r2, [sp, #8]
-	ldr	r3, [sp, #4]
-	cmp	r3, r2
-	bne	.L2150
-.L2143:
-	adds	r5, r5, #1
-	b	.L2142
-.L2147:
-	ldr	r2, .L2177+8
-	ldr	r2, [r2]
-	lsls	r2, r2, #23
-	bpl	.L2149
-	mov	r2, r10
-	mov	r1, r6
-	ldr	r0, .L2177+64
+	lsls	r3, r3, #19
+	bpl	.L2069
+	ldr	r3, [r10]
+	mov	r2, r4
+	mov	r1, r8
+	ldr	r0, .L2073+12
 	bl	printf
-.L2149:
-	ldrh	r0, [r4, #80]
-	bl	ftl_vpn_decrement
-	b	.L2148
-.L2153:
-	strh	r7, [r3, r2, lsl #1]	@ movhi
-	add	sp, sp, #32
+.L2069:
+	mov	r0, r4
+	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2178:
+.L2068:
+	adds	r5, r7, r4
+	ldr	r3, [sp, #48]
+	add	r5, r5, r5, lsr #31
+	mov	r2, fp
+	ldr	r0, [sp, #12]
+	asrs	r5, r5, #1
+	str	r3, [sp]
+	mov	r3, r10
+	sxtah	r1, r6, r5
+	bl	flash_read_page_en
+	cmp	r0, #512
+	itete	eq
+	addeq	r4, r5, #-1
+	addne	r5, r5, #1
+	sxtheq	r4, r4
+	sxthne	r7, r5
+	b	.L2065
+.L2074:
 	.align	2
-.L2177:
-	.word	.LANCHOR60
-	.word	.LANCHOR68
-	.word	.LANCHOR22
-	.word	.LC102
-	.word	.LANCHOR56
-	.word	.LC106
-	.word	.LANCHOR153
-	.word	.LC0
-	.word	.LANCHOR107
-	.word	.LANCHOR45
-	.word	.LC103
-	.word	.LANCHOR108
-	.word	.LANCHOR109
-	.word	.LANCHOR71
-	.word	.LANCHOR70
-	.word	.LC104
-	.word	.LC105
-	.size	gc_update_l2p_map_new, .-gc_update_l2p_map_new
-	.section	.text.gc_scan_src_blk_one_page,"ax",%progbits
+.L2073:
+	.word	.LANCHOR140
+	.word	.LANCHOR31
+	.word	.LANCHOR14
+	.word	.LC121
+	.size	flash_get_last_written_page, .-flash_get_last_written_page
+	.section	.text.flash_get_last_written_page_ext,"ax",%progbits
 	.align	1
-	.global	gc_scan_src_blk_one_page
+	.global	flash_get_last_written_page_ext
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	gc_scan_src_blk_one_page, %function
-gc_scan_src_blk_one_page:
-	@ args = 0, pretend = 0, frame = 8
+	.type	flash_get_last_written_page_ext, %function
+flash_get_last_written_page_ext:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r4, r5, lr}
+	movs	r5, #1
+	ldr	r4, .L2076
+	ldrh	r4, [r4]
+	str	r3, [sp]
+	mov	r3, r2
+	mov	r2, r1
+	rsb	r4, r4, #21
+	lsls	r5, r5, r4
+	asr	r4, r0, r4
+	subs	r5, r5, #1
+	and	r1, r5, r0
+	uxtb	r0, r4
+	bl	flash_get_last_written_page
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, pc}
+.L2077:
+	.align	2
+.L2076:
+	.word	.LANCHOR66
+	.size	flash_get_last_written_page_ext, .-flash_get_last_written_page_ext
+	.section	.text.flash_ddr_para_scan,"ax",%progbits
+	.align	1
+	.global	flash_ddr_para_scan
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_ddr_para_scan, %function
+flash_ddr_para_scan:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r0, #0
-	ldr	r4, .L2214
-	mov	r6, r0
-	movw	r7, #65535
-	ldrb	r3, [r4, #4]	@ zero_extendqisi2
-	add	r2, r4, r3, lsl #1
-	ldrh	r5, [r2, #36]
-	ldr	r2, .L2214+4
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	ldrh	r2, [r4, #2]
-.L2180:
-	cmp	r5, r7
-	beq	.L2182
-	cbz	r6, .L2183
-	strb	r3, [r4, #4]
-.L2183:
-	cbz	r0, .L2184
-	strh	r2, [r4, #2]	@ movhi
-.L2184:
-	ldr	r3, .L2214+8
-	ldrh	r3, [r3]
-	muls	r5, r3, r5
-	ldr	r3, .L2214+12
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	mov	r8, r3
-	cmp	r2, #2
-	bne	.L2185
-	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	cmp	r3, #0
-	bne	.L2185
-	ldrh	r3, [r4, #2]
-	add	r5, r5, r3, lsl #1
-.L2186:
-	ldrb	r3, [r4, #4]	@ zero_extendqisi2
-	adds	r3, r3, #1
-	uxtb	r3, r3
-	cmp	r1, r3
-	strb	r3, [r4, #4]
-	bne	.L2187
-	ldrh	r3, [r4, #2]
-	adds	r3, r3, #1
-	strh	r3, [r4, #2]	@ movhi
-	movs	r3, #0
-	strb	r3, [r4, #4]
-.L2187:
-	ldr	r10, .L2214+16
-	movs	r0, #1
-	bl	buf_alloc
-	movs	r6, #0
 	mov	r7, r0
-.L2197:
-	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	cmp	r3, #3
-	bne	.L2188
-	cmp	r6, #0
-	beq	.L2189
-.L2188:
-	cmp	r3, r6
-	bgt	.L2190
-.L2198:
-	mov	r0, r7
-	bl	buf_free
+	ldr	r6, .L2084
+	movs	r5, #1
+	mov	r8, r1
+	ldr	r4, .L2084+4
+	ldr	fp, .L2084+8
+	ldr	r10, .L2084+12
+	ldrb	r0, [r6]	@ zero_extendqisi2
+	strb	r5, [r4]
+	bl	flash_set_interface_mode
+	ldrb	r0, [r6]	@ zero_extendqisi2
+	bl	nandc_set_if_mode
+	movs	r3, #4
+	ldr	r2, [r10]
+	str	r3, [sp]
+	mov	r1, r8
+	ldr	r3, [fp]
+	mov	r0, r7
+	bl	flash_ddr_tuning_read
+	movs	r3, #4
+	ldr	r2, [r10]
+	str	r3, [sp]
+	mov	r1, r8
+	ldr	r3, [fp]
+	mov	r0, r7
+	bl	flash_read_page
+	adds	r0, r0, #1
+	mov	r3, r4
+	bne	.L2079
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	lsls	r2, r2, #31
+	bpl	.L2079
+	mov	r0, r5
+	bl	flash_set_interface_mode
+	mov	r0, r5
+	bl	nandc_set_if_mode
+	movs	r3, #0
+	strb	r3, [r4]
+.L2080:
+	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2182:
-	adds	r3, r3, #1
-	movs	r6, #1
-	uxtb	r3, r3
-	cmp	r3, r1
-	itt	eq
-	moveq	r3, #0
-	addeq	r2, r2, #1
-	add	r5, r4, r3, lsl #1
-	itt	eq
-	uxtheq	r2, r2
-	moveq	r0, #1
-	ldrh	r5, [r5, #36]
-	b	.L2180
-.L2185:
-	ldrh	r3, [r4, #2]
-	add	r5, r5, r3
-	b	.L2186
-.L2190:
-	ldrb	r2, [r8]	@ zero_extendqisi2
-	cmp	r2, #2
-	bne	.L2191
-	cbnz	r3, .L2191
-	adds	r3, r6, r5
-	orr	r3, r3, #33554432
-.L2213:
-	str	r3, [r7, #24]
-	movs	r1, #1
-	mov	r0, r7
-	bl	sblk_read_page
-	ldr	r3, [r7, #36]
-	adds	r2, r3, #1
-	beq	.L2194
-	cmp	r3, #512
-	beq	.L2194
-	ldr	r3, [r7, #12]
-	ldr	fp, [r3, #4]
-	mov	r0, fp
-	bl	lpa_hash_get_ppa
-	str	r0, [sp, #4]
-	adds	r0, r0, #1
-	bne	.L2196
-	movs	r2, #0
-	add	r1, sp, #4
-	mov	r0, fp
-	bl	pm_log2phys
-.L2196:
-	ldr	r3, [sp, #4]
-	cmp	r5, r3
-	bne	.L2194
-	ldrh	r3, [r4, #20]
-	ldr	r2, [r10]
-	str	r5, [r2, r3, lsl #2]
-	adds	r3, r3, #1
-	strh	r3, [r4, #20]	@ movhi
-.L2194:
-	ldrh	r3, [r4, #22]
-	adds	r3, r3, #1
-	strh	r3, [r4, #22]	@ movhi
-.L2189:
-	adds	r6, r6, #1
-	cmp	r6, #4
-	bne	.L2197
-	b	.L2198
-.L2191:
-	orr	r3, r5, r6, lsl #24
-	b	.L2213
-.L2215:
-	.align	2
-.L2214:
-	.word	.LANCHOR59
-	.word	.LANCHOR69
-	.word	.LANCHOR75
-	.word	.LANCHOR64
-	.word	.LANCHOR61
-	.size	gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page
-	.section	.text.gc_scan_static_data,"ax",%progbits
+.L2079:
+	movs	r2, #1
+	strb	r2, [r3]
+	b	.L2080
+.L2085:
+	.align	2
+.L2084:
+	.word	.LANCHOR43
+	.word	.LANCHOR21
+	.word	.LANCHOR163
+	.word	.LANCHOR164
+	.size	flash_ddr_para_scan, .-flash_ddr_para_scan
+	.section	.text.flash_complete_plane_page_read,"ax",%progbits
 	.align	1
-	.global	gc_scan_static_data
+	.global	flash_complete_plane_page_read
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	gc_scan_static_data, %function
-gc_scan_static_data:
-	@ args = 0, pretend = 0, frame = 8
+	.type	flash_complete_plane_page_read, %function
+flash_complete_plane_page_read:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2100
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
-	ldr	r4, .L2234
-	ldr	r3, [r4]
-	ldr	r2, [r3, #544]
-	adds	r2, r2, #1
-	beq	.L2217
-	ldr	r6, .L2234+4
-	movs	r5, #11
-	ldr	r7, .L2234+8
-.L2226:
-	ldr	r3, [r4]
-	movs	r2, #0
-	add	r1, sp, #4
-	ldr	r0, [r3, #544]
-	bl	pm_log2phys
-	ldr	r3, [sp, #4]
-	adds	r3, r3, #1
-	beq	.L2218
-	movs	r0, #1
-	bl	buf_alloc
-	ldr	r3, [sp, #4]
-	mov	r8, r0
-	movs	r1, #1
-	str	r3, [r0, #24]
-	bl	sblk_read_page
-	ldr	r3, [r8, #36]
-	cmp	r3, #256
-	bne	.L2219
-	ldrh	r2, [r6]
-	mov	r10, #1
-	ldr	r0, [sp, #4]
-	ldrb	r1, [r7]	@ zero_extendqisi2
-	rsb	r3, r2, #21
-	lsl	r3, r10, r3
-	lsrs	r0, r0, r2
-	subs	r3, r3, #1
-	ands	r0, r0, r3
-	bl	__aeabi_uidiv
-	movs	r2, #0
-	mov	r1, r10
-	uxth	r0, r0
-	bl	gc_add_sblk
-.L2219:
-	ldr	r2, [r8, #12]
-	ldr	r3, [r4]
-	ldr	r2, [r2, #4]
-	ldr	r3, [r3, #544]
-	cmp	r2, r3
-	beq	.L2220
-	movw	r2, #1149
-	ldr	r1, .L2234+12
-	ldr	r0, .L2234+16
-	bl	printf
-.L2221:
-	b	.L2221
-.L2220:
-	mov	r0, r8
-	bl	buf_free
-.L2218:
-	ldr	r3, [r4]
-	ldr	r1, .L2234+20
-	ldr	r2, [r3, #544]
-	ldr	r1, [r1]
-	adds	r2, r2, #1
-	cmp	r2, r1
-	str	r2, [r3, #544]
-	bcc	.L2222
-	mov	r2, #-1
-	str	r2, [r3, #544]
-	ldr	r2, [r3, #548]
-	adds	r2, r2, #1
-	str	r2, [r3, #548]
-	bl	ftl_flush
-	bl	pm_flush
-	bl	ftl_ext_info_flush
-	movs	r0, #0
-	bl	ftl_info_flush
-.L2216:
+	ubfx	r4, r0, #21, #3
+	mov	r7, r1
+	mov	r8, r2
+	ubfx	r10, r0, #0, #21
+	ubfx	r5, r0, #24, #2
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r4
+	bhi	.L2087
+	movw	r2, #886
+	ldr	r1, .L2100+4
+	ldr	r0, .L2100+8
+	bl	printf
+.L2087:
+	ldr	r3, .L2100+12
+	ldrb	r6, [r3, r4]	@ zero_extendqisi2
+	ldr	r3, .L2100+16
+	mov	r0, r6
+	ldr	r4, [r3]
+	bl	nandc_cs
+	cbnz	r5, .L2088
+	mov	r0, r10
+	bl	slc_phy_page_address_calc
+	mov	r10, r0
+.L2088:
+	ldr	r3, .L2100+20
+	uxtb	ip, r10
+	lsr	r0, r10, #8
+	lsr	r2, r10, #16
+	ldr	lr, .L2100+28
+	ldrb	r3, [r3, #16]	@ zero_extendqisi2
+	cmp	r3, #1
+	lsl	r3, r6, #8
+	bne	.L2089
+	add	r3, r3, r4
+	movs	r1, #6
+.L2099:
+	str	r1, [r3, #2056]
+	movs	r1, #0
+	str	r1, [r3, #2052]
+	str	r1, [r3, #2052]
+	str	ip, [r3, #2052]
+	str	r0, [r3, #2052]
+	str	r2, [r3, #2052]
+.L2097:
+	movs	r2, #224
+	str	r2, [r3, #2056]
+	ldr	r3, [lr]
+	ldrb	r3, [r3, #12]	@ zero_extendqisi2
+	cmp	r3, #3
+	bne	.L2092
+	cbz	r5, .L2092
+	add	r10, r10, r10, lsl #1
+	subs	r5, r5, #1
+	add	r0, r10, r5
+.L2098:
+	bl	nandc_set_seed
+	ldr	r3, .L2100+24
+	movs	r1, #0
+	mov	r0, r6
+	ldrb	r2, [r3, #9]	@ zero_extendqisi2
+	mov	r3, r7
+	str	r8, [sp]
+	bl	nandc_xfer
+	bl	nandc_de_cs.constprop.29
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L2222:
-	ldr	r3, [sp, #4]
-	adds	r3, r3, #1
-	bne	.L2216
-	subs	r5, r5, #1
-	uxth	r5, r5
-	cmp	r5, #0
-	bne	.L2226
-	b	.L2216
-.L2217:
-	ldr	r2, .L2234+24
-	ldr	r2, [r2]
-	ldr	r1, [r2, #40]
-	cmp	r1, #20480
-	bls	.L2228
-	ldr	r0, [r2, #44]
-	add	r0, r0, r1, lsr #10
-	ubfx	r1, r1, #0, #10
-	str	r1, [r2, #40]
-	str	r0, [r2, #44]
-.L2228:
-	ldr	r1, [r3, #536]
-	ldr	r0, [r3, #12]
-	add	r1, r1, #12910592
-	add	r1, r1, #49408
-	cmp	r0, r1
-	ldr	r1, [r2, #44]
-	bhi	.L2229
-	ldr	r2, [r3, #540]
-	add	r2, r2, #99840
-	adds	r2, r2, #160
-	cmp	r1, r2
-	bls	.L2216
-.L2229:
-	movs	r2, #0
-	str	r1, [r3, #540]
-	str	r0, [r3, #536]
-	str	r2, [r3, #544]
-	b	.L2216
-.L2235:
+.L2089:
+	ldr	r1, [lr]
+	add	r3, r3, r4
+	ldrb	r1, [r1, #12]	@ zero_extendqisi2
+	cmp	r1, #3
+	bne	.L2091
+	movs	r1, #5
+	b	.L2099
+.L2091:
+	movs	r1, #0
+	str	r1, [r3, #2056]
+	str	r1, [r3, #2052]
+	str	r1, [r3, #2052]
+	str	ip, [r3, #2052]
+	str	r0, [r3, #2052]
+	str	r2, [r3, #2052]
+	movs	r2, #5
+	str	r2, [r3, #2056]
+	str	r1, [r3, #2052]
+	str	r1, [r3, #2052]
+	b	.L2097
+.L2092:
+	mov	r0, r10
+	b	.L2098
+.L2101:
 	.align	2
-.L2234:
-	.word	.LANCHOR60
-	.word	.LANCHOR71
-	.word	.LANCHOR70
-	.word	.LANCHOR154
+.L2100:
+	.word	.LANCHOR18
+	.word	.LANCHOR165
 	.word	.LC0
-	.word	.LANCHOR47
-	.word	.LANCHOR46
-	.size	gc_scan_static_data, .-gc_scan_static_data
-	.section	.text.ftl_sblk_dump,"ax",%progbits
+	.word	.LANCHOR30
+	.word	.LANCHOR13
+	.word	.LANCHOR20
+	.word	.LANCHOR31
+	.word	.LANCHOR16
+	.size	flash_complete_plane_page_read, .-flash_complete_plane_page_read
+	.section	.text.flash_complete_page_read,"ax",%progbits
 	.align	1
-	.global	ftl_sblk_dump
+	.global	flash_complete_page_read
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_sblk_dump, %function
-ftl_sblk_dump:
-	@ args = 0, pretend = 0, frame = 80
+	.type	flash_complete_page_read, %function
+flash_complete_page_read:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	movw	r3, #65535
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	cmp	r0, r3
-	sub	sp, sp, #120
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	ubfx	r6, r0, #21, #3
+	ldr	r3, .L2132
 	mov	r7, r0
-	str	r1, [sp, #64]
-	beq	.L2258
-	ldr	r5, .L2286
-	lsls	r4, r0, #2
-	add	r1, sp, #104
-	strh	r0, [sp, #88]	@ movhi
-	ldr	r3, [r5]
-	add	r3, r3, r4
-	ldrb	r3, [r3, #2]	@ zero_extendqisi2
-	and	r3, r3, #224
-	cmp	r3, #160
-	itet	eq
-	ldreq	r3, .L2286+4
-	movne	r3, #1
-	ldrbeq	r3, [r3]	@ zero_extendqisi2
-	str	r3, [sp, #44]
-	bl	ftl_get_blk_list_in_sblk
-	ldr	r3, .L2286+8
-	uxtb	r0, r0
-	movs	r2, #0
-	strb	r0, [sp, #97]
-	ldrh	r1, [r3]
-	ldr	r3, .L2286+12
-	strh	r2, [sp, #90]	@ movhi
-	strb	r2, [sp, #93]
-	ldr	r3, [r3]
-	smulbb	r1, r1, r0
-	strh	r2, [sp, #98]	@ movhi
-	lsls	r6, r3, #19
-	strh	r1, [sp, #94]	@ movhi
-	bpl	.L2239
-	ldr	r3, [r5]
-	mov	r1, r7
-	add	r3, r3, r4
-	ldrb	r2, [r3, #2]	@ zero_extendqisi2
-	str	r0, [sp]
-	ldr	r3, [sp, #44]
-	ldr	r0, .L2286+16
-	lsrs	r2, r2, #5
-	bl	printf
-.L2239:
-	movs	r6, #0
-	movs	r0, #1
-	bl	buf_alloc
-	mov	fp, r6
-	mov	r5, r0
-	str	r6, [sp, #52]
-	str	r6, [sp, #48]
-.L2240:
-	ldr	r3, .L2286+8
-	ldrh	r2, [r3]
-	uxth	r3, r6
-	cmp	r2, r3
-	bls	.L2255
-	str	r3, [sp, #68]
-	lsls	r3, r3, #1
-	ldr	r8, .L2286+12
-	subs	r3, r3, #1
-	str	r3, [sp, #72]
-	movs	r3, #0
-	str	r3, [sp, #56]
-	b	.L2256
-.L2252:
-	ldr	r3, [sp, #76]
-	add	r2, sp, #120
-	add	r3, r2, r3, lsl #1
-	ldrh	r10, [r3, #-32]
-	movw	r3, #65535
-	cmp	r10, r3
-	beq	.L2241
-	ldr	r3, .L2286+20
-	ldrh	r4, [r3]
-	ldr	r3, [sp, #44]
-	cmp	r3, #3
-	mul	r4, r10, r4
-	bne	.L2242
-	ldr	r3, [sp, #40]
-	uxtah	r4, r4, r6
-.L2284:
-	orr	r4, r4, r3, lsl #24
-.L2243:
-	movs	r1, #1
-	str	r4, [r5, #24]
-	mov	r0, r5
-	bl	sblk_read_page
-	ldr	r3, [r5, #36]
-	str	r3, [sp, #60]
-	ldr	r3, [r8]
-	lsls	r1, r3, #19
-	bpl	.L2245
-	ldr	r2, [r5, #12]
-	ldr	r3, [r5, #4]
-	ldr	r0, .L2286+24
-	ldr	r1, [r2, #12]
-	str	r1, [sp, #32]
-	ldr	r1, [r2, #8]
-	str	r1, [sp, #28]
-	ldr	r1, [r2, #4]
-	str	r1, [sp, #24]
-	mov	r1, r10
-	ldr	r2, [r2]
-	str	r2, [sp, #20]
-	ldr	r2, [r3, #12]
-	str	r2, [sp, #16]
-	ldr	r2, [r3, #8]
-	str	r2, [sp, #12]
-	ldr	r2, [r3, #4]
+	mov	r8, r1
+	ubfx	r4, r0, #0, #21
 	str	r2, [sp, #8]
-	ldr	r3, [r3]
-	ldr	r2, [sp, #68]
-	str	r3, [sp, #4]
-	ldr	r3, [sp, #60]
-	str	r3, [sp]
-	mov	r3, r4
+	ubfx	r5, r0, #24, #2
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r6
+	bhi	.L2103
+	mov	r2, #1008
+	ldr	r1, .L2132+4
+	ldr	r0, .L2132+8
 	bl	printf
-.L2245:
-	ldr	r3, [sp, #60]
-	adds	r2, r3, #1
-	beq	.L2260
-	cmp	r3, #512
-	ldr	r3, [sp, #48]
-	it	eq
-	moveq	r3, #1
-.L2285:
-	str	r3, [sp, #48]
-	ldr	r3, [r5, #12]
-	ldr	r10, [r3, #4]
-	mov	r0, r10
-	bl	lpa_hash_get_ppa
-	str	r0, [sp, #84]
-	adds	r0, r0, #1
-	bne	.L2247
+.L2103:
+	ldr	r3, .L2132+12
+	ldrb	r6, [r3, r6]	@ zero_extendqisi2
+	ldr	r3, .L2132+16
+	mov	r0, r6
+	ldr	fp, [r3]
+	bl	nandc_cs
+	cbnz	r5, .L2104
+	mov	r0, r4
+	bl	slc_phy_page_address_calc
+	mov	r4, r0
+.L2104:
+	add	r3, fp, r6, lsl #8
+	movs	r2, #5
+	str	r2, [r3, #2056]
 	movs	r2, #0
-	add	r1, sp, #84
-	mov	r0, r10
-	bl	pm_log2phys
-.L2247:
-	ldr	r3, [sp, #84]
-	cmp	r4, r3
-	bne	.L2248
-	ldr	r3, [sp, #52]
-	adds	r3, r3, #1
-	str	r3, [sp, #52]
-	ldr	r3, [r8]
-	lsls	r0, r3, #19
-	bpl	.L2248
-	ldr	r2, [r5, #12]
-	mov	r1, r4
-	ldr	r3, [sp, #52]
-	ldr	r0, .L2286+28
-	ldr	r2, [r2, #4]
-	bl	printf
-.L2248:
-	ldr	r3, [sp, #64]
-	cbz	r3, .L2249
-	ldr	r2, [r3, fp, lsl #2]
-	lsl	r4, fp, #2
-	ldr	r3, [r5, #12]
-	ldr	r3, [r3, #4]
-	cmp	r3, r2
-	beq	.L2250
-	ldr	r3, [r8]
-	lsls	r1, r3, #19
-	bpl	.L2250
-	mov	r1, fp
-	ldr	r0, .L2286+32
-	bl	printf
-.L2250:
-	ldr	r3, [sp, #64]
-	ldr	r2, [r5, #12]
-	ldr	r3, [r3, r4]
-	ldr	r2, [r2, #4]
-	cmp	r2, r3
-	beq	.L2249
-	adds	r3, r3, #1
-	beq	.L2249
-	mov	r2, #616
-	ldr	r1, .L2286+36
-	ldr	r0, .L2286+40
-	bl	printf
-.L2251:
-	b	.L2251
-.L2242:
-	ldr	r3, [sp, #44]
-	cmp	r3, #2
-	bne	.L2244
-	ldr	r3, [sp, #72]
-	add	r4, r4, r3
-	ldr	r3, [sp, #40]
-	add	r4, r4, r3
-	ldr	r3, .L2286+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	b	.L2284
-.L2244:
-	uxtah	r4, r4, r6
-	b	.L2243
-.L2260:
-	movs	r3, #1
-	b	.L2285
-.L2249:
-	add	fp, fp, #1
-.L2241:
-	ldr	r3, [sp, #40]
-	adds	r3, r3, #1
-	uxth	r3, r3
-	str	r3, [sp, #40]
-.L2254:
-	ldr	r3, [sp, #44]
-	ldr	r2, [sp, #40]
-	cmp	r3, r2
-	bcs	.L2252
-	ldr	r3, [sp, #56]
-	adds	r3, r3, #1
-	str	r3, [sp, #56]
-.L2256:
-	ldrb	r2, [sp, #97]	@ zero_extendqisi2
-	ldrh	r3, [sp, #56]
-	cmp	r2, r3
-	bls	.L2253
-	movs	r3, #1
-	str	r3, [sp, #40]
-	ldrh	r3, [sp, #56]
-	adds	r3, r3, #8
-	str	r3, [sp, #76]
-	b	.L2254
-.L2253:
-	adds	r6, r6, #1
-	b	.L2240
-.L2255:
-	mov	r0, r5
-	bl	buf_free
-	ldr	r3, .L2286+12
+	str	r2, [r3, #2052]
+	str	r2, [r3, #2052]
+	uxtb	r2, r4
+	str	r2, [r3, #2052]
+	lsrs	r2, r4, #8
+	str	r2, [r3, #2052]
+	lsrs	r2, r4, #16
+	str	r2, [r3, #2052]
+	movs	r2, #224
+	str	r2, [r3, #2056]
+	ldr	r3, .L2132+20
 	ldr	r3, [r3]
-	lsls	r3, r3, #19
-	bpl	.L2257
-	ldr	r3, .L2286+44
-	mov	r1, r7
-	ldr	r0, .L2286+48
-	ldr	r2, [r3]
-	ldr	r3, [sp, #52]
-	ldrh	r2, [r2, r7, lsl #1]
-	bl	printf
-.L2257:
-	ldr	r0, [sp, #48]
-.L2236:
-	add	sp, sp, #120
+	ldrb	r3, [r3, #12]	@ zero_extendqisi2
+	cmp	r3, #3
+	bne	.L2105
+	cmp	r5, #0
+	beq	.L2105
+	add	r3, r4, r4, lsl #1
+	subs	r0, r5, #1
+	add	r0, r0, r3
+.L2131:
+	bl	nandc_set_seed
+	ldr	r10, .L2132+48
+	movs	r1, #0
+	ldr	r3, [sp, #8]
+	mov	r0, r6
+	ldrb	r2, [r10, #9]	@ zero_extendqisi2
+	str	r3, [sp]
+	mov	r3, r8
+	bl	nandc_xfer
+	adds	r1, r0, #1
+	bne	.L2107
+	ldr	fp, .L2132+36
+	ldrb	r3, [fp]	@ zero_extendqisi2
+	str	r3, [sp, #12]
+	cmp	r3, #0
+	beq	.L2108
+	movs	r3, #0
+	mov	r2, r8
+	strb	r3, [fp]
+	orr	r1, r4, r5, lsl #24
+	ldrb	r3, [r10, #9]	@ zero_extendqisi2
+	mov	r0, r6
+	str	r3, [sp]
+	ldr	r3, [sp, #8]
+	bl	flash_read_page
+	ldrb	r3, [sp, #12]	@ zero_extendqisi2
+	strb	r3, [fp]
+	cbnz	r5, .L2109
+.L2114:
+	ldr	r3, .L2132+24
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2109
+	ldr	r3, .L2132+28
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r0, r3, asr #2
+	blt	.L2109
+	ldrb	r3, [r10, #19]	@ zero_extendqisi2
+	subs	r3, r3, #4
+	cmp	r3, #4
+	it	ls
+	movls	r0, #256
+.L2102:
+	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2258:
-	movs	r0, #0
-	b	.L2236
-.L2287:
+.L2105:
+	mov	r0, r4
+	b	.L2131
+.L2109:
+	adds	r2, r0, #1
+	bne	.L2102
+.L2115:
+	ldr	r3, .L2132+32
+	ldr	fp, [r3]
+	cmp	fp, #0
+	bne	.L2111
+.L2113:
+	ldr	r3, .L2132+36
+	mov	r2, r7
+	movs	r1, #0
+	ldr	r0, .L2132+40
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r3, [sp]
+	mov	r3, #-1
+	bl	printf
+	ldr	r3, .L2132+44
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L2112
+	mov	r0, #-1
+	b	.L2102
+.L2111:
+	ldrb	r3, [r10, #9]	@ zero_extendqisi2
+	mov	r2, r8
+	orr	r1, r4, r5, lsl #24
+	mov	r0, r6
+	str	r3, [sp]
+	ldr	r3, [sp, #8]
+	blx	fp
+	adds	r3, r0, #1
+	beq	.L2113
+	b	.L2102
+.L2112:
+	ldrb	r3, [r10, #9]	@ zero_extendqisi2
+	mov	r2, r8
+	orr	r1, r4, r5, lsl #24
+	mov	r0, r6
+	str	r3, [sp]
+	ldr	r3, [sp, #8]
+	bl	flash_ddr_tuning_read
+	b	.L2102
+.L2107:
+	cmp	r5, #0
+	beq	.L2114
+	b	.L2102
+.L2108:
+	cmp	r5, #0
+	bne	.L2115
+	b	.L2114
+.L2133:
 	.align	2
-.L2286:
-	.word	.LANCHOR57
-	.word	.LANCHOR64
-	.word	.LANCHOR79
-	.word	.LANCHOR22
-	.word	.LC107
-	.word	.LANCHOR75
-	.word	.LC73
-	.word	.LC108
-	.word	.LC109
-	.word	.LANCHOR155
-	.word	.LC0
-	.word	.LANCHOR56
-	.word	.LC110
-	.size	ftl_sblk_dump, .-ftl_sblk_dump
-	.section	.text.gc_search_src_blk,"ax",%progbits
+.L2132:
+	.word	.LANCHOR18
+	.word	.LANCHOR166
+	.word	.LC0
+	.word	.LANCHOR30
+	.word	.LANCHOR13
+	.word	.LANCHOR16
+	.word	.LANCHOR0
+	.word	.LANCHOR44
+	.word	.LANCHOR162
+	.word	.LANCHOR46
+	.word	.LC122
+	.word	.LANCHOR21
+	.word	.LANCHOR31
+	.size	flash_complete_page_read, .-flash_complete_page_read
+	.section	.text.queue_wait_first_req_completed,"ax",%progbits
 	.align	1
-	.global	gc_search_src_blk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	gc_search_src_blk, %function
-gc_search_src_blk:
-	@ args = 0, pretend = 0, frame = 24
+	.type	queue_wait_first_req_completed, %function
+queue_wait_first_req_completed:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2360
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #24
-	str	r2, [sp, #12]
-	mov	r7, r0
-	mov	fp, r3
-	ldr	r2, [r3]
-	str	r1, [sp, #16]
-	add	r1, r0, #60
-	ldrh	r5, [r2, r1, lsl #1]
-	cmp	r5, #0
-	bne	.L2288
-	ldr	r3, .L2360+4
-	ldr	r6, .L2360+8
-	ldr	r2, [r3]
-	mov	r10, r3
-	ldrh	r4, [r2, #134]
-	ldr	r2, [r6]
-	tst	r2, #256
-	beq	.L2291
-	mov	r1, r0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r3, .L2233
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	cmp	r5, #255
+	bne	.L2135
+.L2168:
+	movs	r6, #0
+	b	.L2134
+.L2135:
+	ldr	r4, .L2233+4
+	movs	r3, #48
+	mla	r3, r3, r5, r4
+	ldrb	r2, [r3, #42]	@ zero_extendqisi2
+	ldr	r6, [r3, #24]
+	subs	r3, r2, #1
+	cmp	r3, #10
+	bhi	.L2168
+	tbh	[pc, r3, lsl #1]
+.L2138:
+	.2byte	(.L2137-.L2138)/2
+	.2byte	(.L2139-.L2138)/2
+	.2byte	(.L2140-.L2138)/2
+	.2byte	(.L2140-.L2138)/2
+	.2byte	(.L2140-.L2138)/2
+	.2byte	(.L2140-.L2138)/2
+	.2byte	(.L2141-.L2138)/2
+	.2byte	(.L2142-.L2138)/2
+	.2byte	(.L2143-.L2138)/2
+	.2byte	(.L2140-.L2138)/2
+	.2byte	(.L2143-.L2138)/2
+	.p2align 1
+.L2137:
+	movs	r1, #64
+	mov	r0, r6
+	bl	flash_wait_device_ready
+	lsls	r0, r0, #25
+	bpl	.L2168
+	movs	r3, #48
+	mla	r3, r3, r5, r4
+	ldr	r2, [r3, #8]
+	ldr	r1, [r3, #4]
+	cbz	r2, .L2145
+	ldrb	r0, [r3, #40]	@ zero_extendqisi2
+	ldr	r3, .L2233+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r0, r3
+	it	eq
+	moveq	r1, r2
+.L2145:
+	movs	r3, #48
+	mov	r0, r6
+	mla	r4, r3, r5, r4
+	ldr	r2, [r4, #12]
+	bl	flash_complete_page_read
+	str	r0, [r4, #36]
+.L2232:
+	movs	r3, #13
+	strb	r3, [r4, #42]
+	ldrb	r3, [r4, #2]	@ zero_extendqisi2
+	orr	r3, r3, #8
+	strb	r3, [r4, #2]
+	b	.L2168
+.L2139:
+	movs	r1, #64
+	mov	r0, r6
+	bl	flash_wait_device_ready
+	lsls	r1, r0, #25
+	bpl	.L2168
+	movs	r3, #48
+	mul	r1, r3, r5
+	ldrb	r6, [r4, r1]	@ zero_extendqisi2
+	adds	r2, r4, r1
+	ldr	fp, [r2, #4]
+	mla	r3, r3, r6, r4
+	ldr	r10, [r3, #4]
+	ldr	r3, [r2, #8]
+	cbz	r3, .L2146
+	ldrb	r1, [r2, #40]	@ zero_extendqisi2
+	ldr	r2, .L2233+8
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r1, r2
+	it	eq
+	moveq	fp, r3
+.L2146:
+	movs	r3, #48
+	mla	r3, r3, r6, r4
+	ldr	r2, [r3, #8]
+	cbz	r2, .L2147
+	ldrb	r1, [r3, #40]	@ zero_extendqisi2
+	ldr	r3, .L2233+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r1, r3
+	it	eq
+	moveq	r10, r2
+.L2147:
+	movs	r3, #48
+	mov	r1, fp
+	mla	r7, r3, r5, r4
+	str	r3, [sp, #12]
+	ldr	r2, [r7, #12]
+	ldr	r0, [r7, #24]
+	bl	flash_complete_plane_page_read
 	ldr	r3, [sp, #12]
-	ldr	r2, [sp, #16]
-	ldr	r0, .L2360+12
-	bl	printf
-.L2291:
-	ldr	r3, [r6]
-	lsls	r2, r3, #23
-	bpl	.L2292
-	ldr	r2, [fp]
-	ldr	r1, [r10]
-	ldr	r3, .L2360+16
-	ldrh	r2, [r2, #126]
-	ldrh	r1, [r1, #134]
-	ldrh	r3, [r3]
-	ldr	r0, .L2360+12
+	mov	r8, r0
+	mov	r1, r10
+	mla	r3, r3, r6, r4
+	ldr	r2, [r3, #12]
+	ldr	r0, [r3, #24]
+	bl	flash_complete_plane_page_read
+	cmp	r8, #-1
+	str	r0, [sp, #12]
+	beq	.L2148
+	ldr	r3, [r7, #20]
+	adds	r2, r3, #1
+	beq	.L2149
+	ldr	r2, [r7, #12]
+	ldr	r2, [r2, #4]
+	cmp	r3, r2
+	beq	.L2149
+.L2148:
+	movs	r7, #48
+	ldr	r3, .L2233+8
+	mla	r7, r7, r5, r4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	mov	r2, fp
+	ldr	r0, [r7, #24]
+	str	r3, [sp]
+	ldr	r3, [r7, #12]
+	bic	r1, r0, #14680064
+	ubfx	r0, r0, #21, #3
+	bl	flash_read_page_en
+	ldr	r2, [r7, #20]
+	mov	r8, r0
+	adds	r3, r2, #1
+	beq	.L2150
+	ldr	r3, [r7, #12]
+	ldr	r1, [r3, #4]
+	cmp	r2, r1
+	beq	.L2150
+	ldr	r0, .L2233+12
+	ldr	r0, [r0]
+	lsls	r0, r0, #25
+	bpl	.L2150
+	str	r1, [sp]
+	ldr	r1, [r7, #24]
+	ldr	r3, [r3]
+	ldr	r0, .L2233+16
 	bl	printf
-.L2292:
-	ldr	r3, [sp, #12]
-	cmp	r3, #64
-	bls	.L2293
-	movw	r2, #1028
-	ldr	r1, .L2360+20
-	ldr	r0, .L2360+24
+.L2150:
+	movs	r3, #48
+	mla	r3, r3, r5, r4
+	ldr	r2, [r3, #20]
+	adds	r0, r2, #1
+	beq	.L2149
+	ldr	r3, [r3, #12]
+	ldr	r3, [r3, #4]
+	cmp	r2, r3
+	beq	.L2149
+	mov	r2, #360
+	ldr	r1, .L2233+20
+	ldr	r0, .L2233+24
 	bl	printf
-.L2294:
-	b	.L2294
-.L2293:
-	ldr	r3, .L2360+28
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	ldr	r3, .L2360+32
-	ldrh	r6, [r3]
-	ldr	r3, .L2360+36
-	ldrh	r3, [r3]
-	smulbb	r6, r6, r2
-	uxth	r6, r6
-	smulbb	r3, r3, r2
-	uxth	r3, r3
-	str	r3, [sp, #8]
-	ldr	r3, [r10]
-	ldrh	r3, [r3, #134]
-.L2357:
-	str	r3, [sp, #4]
-	ldr	r3, .L2360+40
-	ldr	r0, [sp, #4]
-	ldrh	r2, [r3]
-	ldr	r3, [r10]
-	ldrh	r3, [r3, #134]
-	subs	r1, r2, r3
-	cmp	r0, r1
-	blt	.L2307
-.L2304:
-	ldr	r3, [r10]
-	ldr	r2, [sp, #4]
-	ldrh	r1, [r3, #134]
-	ldr	r3, .L2360+40
-	ldrh	r3, [r3]
-	subs	r3, r3, r1
+.L2149:
+	movs	r3, #48
+	movs	r2, #13
+	mla	r5, r3, r5, r4
+	strb	r2, [r5, #42]
+	ldrb	r2, [r5, #2]	@ zero_extendqisi2
+	str	r8, [r5, #36]
+	orr	r2, r2, #8
+	strb	r2, [r5, #2]
+	ldr	r2, [sp, #12]
+	adds	r2, r2, #1
+	beq	.L2151
+	mla	r3, r3, r6, r4
+	ldr	r2, [r3, #20]
+	adds	r1, r2, #1
+	beq	.L2153
+	ldr	r3, [r3, #12]
+	ldr	r3, [r3, #4]
 	cmp	r2, r3
-	ldr	r2, .L2360+32
-	ldr	r3, [fp]
-	blt	.L2308
-	strh	r1, [r3, #126]	@ movhi
-	cmp	r7, #0
-	bne	.L2309
-	ldr	r3, .L2360+16
-	ldrh	r2, [r2]
-	ldrh	r1, [r3]
-	rsb	r0, r2, r2, lsl #3
-	cmp	r1, r6
-	it	cc
-	strhcc	r6, [r3]	@ movhi
-	ldrh	r1, [r3]
-	cmp	r1, r0, asr #3
-	bge	.L2312
-	add	r1, r1, r2, lsr #3
-	strh	r1, [r3]	@ movhi
-.L2312:
-	ldr	r3, .L2360+8
+	beq	.L2153
+.L2151:
+	movs	r5, #48
+	ldr	r3, .L2233+8
+	mla	r5, r5, r6, r4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	mov	r2, r10
+	ldr	r0, [r5, #24]
+	str	r3, [sp]
+	ldr	r3, [r5, #12]
+	bic	r1, r0, #14680064
+	ubfx	r0, r0, #21, #3
+	bl	flash_read_page_en
+	ldr	r2, [r5, #20]
+	adds	r3, r2, #1
+	beq	.L2155
+	ldr	r3, [r5, #12]
+	ldr	r1, [r3, #4]
+	cmp	r2, r1
+	beq	.L2155
+	ldr	r0, .L2233+12
+	ldr	r0, [r0]
+	lsls	r7, r0, #25
+	bpl	.L2155
+	str	r1, [sp]
+	ldr	r0, .L2233+16
 	ldr	r3, [r3]
-	lsls	r3, r3, #23
-	bpl	.L2318
-	mov	r1, r5
-	ldr	r0, .L2360+44
-	bl	printf
-.L2318:
-	bl	print_ftl_debug_info
-.L2288:
-	mov	r0, r5
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2307:
-	ldr	r1, [fp]
-	ldrh	r4, [r1, #126]
-	ldr	r1, [sp, #4]
-	add	r4, r4, r1
-	uxth	r4, r4
-	cmp	r2, r4
-	bhi	.L2296
-	subs	r3, r3, r2
-	add	r4, r4, r3
-	uxth	r4, r4
-	cmp	r2, r4
-	bhi	.L2296
-	movw	r2, #1038
-	ldr	r1, .L2360+20
-	ldr	r0, .L2360+24
+	ldr	r1, [r5, #24]
 	bl	printf
-.L2297:
-	b	.L2297
-.L2296:
-	ldr	r3, .L2360+48
-	ldr	r3, [r3]
-	add	r3, r3, r4, lsl #2
-	ldrb	r8, [r3, #2]	@ zero_extendqisi2
-	and	r8, r8, #224
-	cmp	r8, #32
-	beq	.L2298
-	cmp	r8, #224
-	beq	.L2298
-	ldr	r3, .L2360+52
-	cmp	r8, #0
-	bne	.L2299
-	lsls	r2, r4, #1
-	str	r2, [sp, #20]
-	ldr	r2, [r3]
-	ldrh	r1, [r2, r4, lsl #1]
-	cbz	r1, .L2300
-	mov	r2, r4
-	ldr	r0, .L2360+56
-	str	r3, [sp, #20]
+.L2155:
+	movs	r3, #48
+	mla	r3, r3, r6, r4
+	ldr	r2, [r3, #20]
+	adds	r0, r2, #1
+	beq	.L2153
+	ldr	r3, [r3, #12]
+	ldr	r3, [r3, #4]
+	cmp	r2, r3
+	beq	.L2153
+	movw	r2, #375
+	ldr	r1, .L2233+20
+	ldr	r0, .L2233+24
 	bl	printf
-	mov	r1, r8
-	mov	r0, r4
-	bl	ftl_sblk_dump
-	ldr	r3, [sp, #20]
-.L2300:
-	ldr	r2, [r3]
-	lsls	r3, r4, #1
-	ldrh	r3, [r2, r3]
-	cmp	r3, #0
-	beq	.L2298
-	movw	r2, #1047
-	ldr	r1, .L2360+20
-	ldr	r0, .L2360+24
+.L2153:
+	movs	r3, #48
+	mla	r4, r3, r6, r4
+	str	r8, [r4, #36]
+	b	.L2232
+.L2140:
+	movs	r1, #64
+	mov	r0, r6
+	bl	flash_wait_device_ready
+	lsls	r1, r0, #25
+	mov	r6, r0
+	bpl	.L2168
+	ands	r2, r0, #5
+	mov	r3, #48
+	beq	.L2156
+	mla	r4, r3, r5, r4
+	movs	r3, #12
+	mov	r2, r0
+	ldr	r0, .L2233+28
+	strb	r3, [r4, #42]
+	ldrb	r1, [r4, #1]	@ zero_extendqisi2
+	str	r3, [sp]
+	ldr	r3, [r4, #24]
 	bl	printf
-.L2301:
-	b	.L2301
-.L2299:
+.L2231:
+	mov	r3, #-1
+	str	r3, [r4, #36]
+	b	.L2134
+.L2234:
+	.align	2
+.L2233:
+	.word	.LANCHOR54
+	.word	.LANCHOR50
+	.word	.LANCHOR123
+	.word	.LANCHOR14
+	.word	.LC123
+	.word	.LANCHOR167
+	.word	.LC0
+	.word	.LC124
+.L2156:
+	mla	r6, r3, r5, r4
+	movs	r3, #13
+	strb	r3, [r6, #42]
+	ldr	r3, .L2235
+	str	r2, [r6, #36]
 	ldr	r3, [r3]
-	movw	r2, #65535
-	ldrh	r3, [r3, r4, lsl #1]
-	cmp	r3, r2
-	beq	.L2298
-	ldr	r1, [sp, #16]
-	cmp	r8, #160
-	ite	ne
-	movne	r2, #1
-	moveq	r2, #2
-	ands	r2, r2, r1
-	cbnz	r7, .L2303
-	cmp	r6, r3
-	it	cs
-	movcs	r6, r3
-	cbz	r2, .L2298
-	ldr	r2, .L2360+16
-	ldrh	r2, [r2]
-	cmp	r2, r3
-	bls	.L2298
-	mov	r2, r7
-	mov	r1, r7
-	mov	r0, r4
-	bl	gc_add_sblk
-	cbz	r0, .L2298
-.L2356:
-	adds	r5, r5, #1
-	uxth	r5, r5
-	b	.L2305
-.L2303:
-	cbz	r2, .L2305
-	cmp	r8, #160
-	bne	.L2306
-	ldr	r2, [sp, #8]
-	cmp	r2, r3
-	it	cs
-	movcs	r2, r3
-	str	r2, [sp, #8]
-	ldr	r2, .L2360+60
-	ldrh	r2, [r2]
-	cmp	r2, r3
-	bls	.L2305
-.L2359:
-	mov	r2, r7
-	movs	r1, #0
-	mov	r0, r4
-	bl	gc_add_sblk
-	cbz	r0, .L2305
-	b	.L2356
-.L2306:
-	ldr	r2, .L2360+64
-	cmp	r6, r3
-	it	cs
-	movcs	r6, r3
-	ldrh	r2, [r2]
+	ldr	r2, [r3, #156]
+	ldr	r3, .L2235+4
 	cmp	r2, r3
-	bls	.L2359
-.L2305:
-	ldr	r3, [sp, #12]
-	cmp	r5, r3
-	bhi	.L2304
-.L2298:
-	ldr	r3, [sp, #4]
-	adds	r3, r3, #1
-	uxth	r3, r3
-	b	.L2357
-.L2309:
-	ldr	r3, .L2360+36
-	ldrh	r1, [r3]
-	ldr	r3, .L2360+68
+	bne	.L2168
+	ldrh	r3, [r6, #34]
+	cmp	r3, #0
+	bne	.L2168
+	ldr	r3, .L2235+8
+	ldr	r0, [r6, #24]
+	ldr	r7, .L2235+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	muls	r3, r1, r3
-	ldr	r1, [sp, #8]
-	cmp	r1, r3
-	ldr	r1, .L2360+60
-	beq	.L2313
-	ldrh	r0, [r1]
-	ldr	r4, [sp, #8]
-	cmp	r0, r4
-	itt	cc
-	ldrhcc	r0, [sp, #8]
-	strhcc	r0, [r1]	@ movhi
-.L2313:
-	ldrh	r4, [r2]
-	ldrh	r0, [r1]
-	lsrs	r2, r4, #3
-	subs	r3, r3, r2
-	cmp	r0, r3
-	itt	lt
-	addlt	r0, r0, r2
-	strhlt	r0, [r1]	@ movhi
-	ldr	r1, .L2360+64
-	ldrh	r3, [r1]
-	cmp	r3, r4, lsr #1
-	bls	.L2312
-	subs	r3, r3, r2
-	strh	r3, [r1]	@ movhi
-	b	.L2312
-.L2308:
-	strh	r4, [r3, #126]	@ movhi
-	cbnz	r7, .L2316
-	ldrh	r1, [r2]
-	ldr	r2, .L2360+16
-	ldrh	r3, [r2]
-	cmp	r3, r1, lsr #2
-	bls	.L2312
-	sub	r3, r3, r1, lsr #3
-	strh	r3, [r2]	@ movhi
-	b	.L2312
-.L2316:
-	ldr	r1, .L2360+60
-	ldrh	r3, [r2]
-	ldr	r0, .L2360+68
-	ldrh	r2, [r1]
-	ldrb	r0, [r0]	@ zero_extendqisi2
-	cmp	r2, r3, lsr #1
-	it	hi
-	subhi	r2, r2, r3, lsr #3
-	mul	r3, r3, r0
-	it	hi
-	strhhi	r2, [r1]	@ movhi
-	ldr	r1, .L2360+64
-	subs	r3, r3, #32
-	ldrh	r2, [r1]
+	ldr	r2, .L2235+16
+	bic	r1, r0, #14680064
+	ubfx	r0, r0, #21, #3
+	str	r3, [sp]
+	ldr	r3, [r7]
+	ldr	r2, [r2]
+	bl	flash_read_page_en
+	adds	r2, r0, #1
+	mov	r3, r0
+	beq	.L2157
+	ldr	r1, [r6, #12]
+	ldr	r2, [r7]
+	ldr	r1, [r1]
+	ldr	r2, [r2]
+	cmp	r1, r2
+	beq	.L2168
+.L2157:
+	movs	r2, #48
+	ldr	r0, .L2235+20
+	mla	r4, r2, r5, r4
+	ldr	r2, .L2235+24
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	ldrb	r1, [r4, #1]	@ zero_extendqisi2
+	str	r2, [sp]
+	ldr	r2, [r4, #24]
+	bl	printf
+	mov	r3, #-1
+	str	r3, [r4, #36]
+	b	.L2168
+.L2143:
+	add	r3, r5, r5, lsl #1
+	cmp	r2, #11
+	it	eq
+	moveq	r1, #10
+	add	r3, r4, r3, lsl #4
+	it	ne
+	movne	r1, #3
+	ubfx	r0, r6, #21, #3
+	movs	r7, #48
+.L2159:
+	ldrb	r8, [r3]	@ zero_extendqisi2
+	cmp	r8, #255
+	bne	.L2166
+	mov	r6, #-1
+	b	.L2134
+.L2166:
+	mla	r2, r7, r8, r4
+	add	r3, r8, r8, lsl #1
+	ldrb	ip, [r2, #42]	@ zero_extendqisi2
+	add	r3, r4, r3, lsl #4
+	cmp	ip, r1
+	bne	.L2159
+	ldr	r2, [r2, #24]
+	ubfx	r2, r2, #21, #3
+	cmp	r0, r2
+	bne	.L2159
+	mov	r0, r6
+	movs	r1, #64
+	bl	flash_wait_device_ready
+	mov	r6, r0
+	lsls	r0, r6, #25
+	bmi	.L2161
+.L2230:
+	movs	r6, #0
+	b	.L2162
+.L2161:
+	ands	r2, r6, #15
+	mul	r3, r7, r5
+	beq	.L2163
+	adds	r7, r4, r3
+	mov	r10, #12
+	ldrb	r1, [r7, #1]	@ zero_extendqisi2
+	mov	r2, r6
+	str	r10, [sp]
+	ldr	r3, [r7, #24]
+	ldr	r0, .L2235+28
+	bl	printf
+	mov	r3, #-1
+	strb	r10, [r7, #42]
+	str	r3, [r7, #36]
+.L2162:
+	movs	r3, #48
+	mla	r5, r3, r5, r4
+	mla	r8, r3, r8, r4
+	ldrb	r2, [r5, #42]	@ zero_extendqisi2
+	ldr	r3, [r5, #36]
+	strb	r2, [r8, #42]
+	str	r3, [r8, #36]
+.L2134:
+	mov	r0, r6
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2163:
+	adds	r6, r4, r3
+	movs	r3, #13
+	strb	r3, [r6, #42]
+	ldr	r3, .L2235
+	str	r2, [r6, #36]
+	ldr	r3, [r3]
+	ldr	r2, [r3, #156]
+	ldr	r3, .L2235+4
 	cmp	r2, r3
-	itt	lt
-	addlt	r2, r2, #32
-	strhlt	r2, [r1]	@ movhi
-	b	.L2312
-.L2361:
+	bne	.L2230
+	ldrh	r3, [r6, #34]
+	cmp	r3, #0
+	bne	.L2230
+	ldr	r3, .L2235+8
+	ldr	r0, [r6, #24]
+	ldr	r7, .L2235+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	ldr	r2, .L2235+16
+	bic	r1, r0, #14680064
+	ubfx	r0, r0, #21, #3
+	str	r3, [sp]
+	ldr	r3, [r7]
+	ldr	r2, [r2]
+	bl	flash_read_page_en
+	adds	r1, r0, #1
+	mov	r3, r0
+	beq	.L2165
+	ldr	r1, [r6, #12]
+	ldr	r2, [r7]
+	ldr	r1, [r1]
+	ldr	r2, [r2]
+	cmp	r1, r2
+	beq	.L2230
+.L2165:
+	ldr	r2, .L2235+24
+	movs	r6, #48
+	mla	r6, r6, r5, r4
+	ldr	r0, .L2235+32
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	ldrb	r1, [r6, #1]	@ zero_extendqisi2
+	str	r2, [sp]
+	ldr	r2, [r6, #24]
+	bl	printf
+	mov	r3, #-1
+	str	r3, [r6, #36]
+	b	.L2230
+.L2141:
+	mov	r0, r6
+	movs	r1, #32
+	bl	flash_wait_device_ready
+	lsls	r2, r0, #26
+	mov	r6, r0
+	bpl	.L2168
+	ands	r2, r0, #15
+	mov	r3, #48
+	mla	r4, r3, r5, r4
+	beq	.L2167
+	movs	r3, #12
+	strb	r3, [r4, #42]
+	b	.L2231
+.L2167:
+	movs	r3, #13
+	str	r2, [r4, #36]
+	strb	r3, [r4, #42]
+	b	.L2168
+.L2142:
+	movs	r1, #64
+	mov	r0, r6
+	bl	flash_wait_device_ready
+	lsls	r3, r0, #25
+	bpl	.L2168
+	movs	r3, #48
+	mla	r4, r3, r5, r4
+	movs	r3, #7
+	str	r0, [r4, #36]
+	strb	r3, [r4, #42]
+	b	.L2168
+.L2236:
 	.align	2
-.L2360:
-	.word	.LANCHOR60
+.L2235:
+	.word	.LANCHOR102
+	.word	1145785929
+	.word	.LANCHOR123
+	.word	.LANCHOR163
+	.word	.LANCHOR164
+	.word	.LC125
 	.word	.LANCHOR46
-	.word	.LANCHOR22
-	.word	.LC111
-	.word	.LANCHOR58
-	.word	.LANCHOR156
-	.word	.LC0
-	.word	.LANCHOR69
-	.word	.LANCHOR79
-	.word	.LANCHOR68
+	.word	.LC126
+	.word	.LC127
+	.size	queue_wait_first_req_completed, .-queue_wait_first_req_completed
+	.section	.text.sblk_wait_write_queue_completed,"ax",%progbits
+	.align	1
+	.global	sblk_wait_write_queue_completed
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sblk_wait_write_queue_completed, %function
+sblk_wait_write_queue_completed:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, lr}
+	ldr	r4, .L2240
+.L2238:
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	cmp	r3, #255
+	bne	.L2239
+	pop	{r4, pc}
+.L2239:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L2238
+.L2241:
+	.align	2
+.L2240:
 	.word	.LANCHOR54
-	.word	.LC113
-	.word	.LANCHOR57
-	.word	.LANCHOR56
-	.word	.LC112
-	.word	.LANCHOR106
-	.word	.LANCHOR105
-	.word	.LANCHOR70
-	.size	gc_search_src_blk, .-gc_search_src_blk
-	.section	.text.ftl_read,"ax",%progbits
+	.size	sblk_wait_write_queue_completed, .-sblk_wait_write_queue_completed
+	.section	.text.ftl_read_page,"ax",%progbits
 	.align	1
-	.global	ftl_read
+	.global	ftl_read_page
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_read, %function
-ftl_read:
-	@ args = 0, pretend = 0, frame = 48
+	.type	ftl_read_page, %function
+ftl_read_page:
+	@ args = 4, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r10, r2
-	sub	sp, sp, #64
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r4, r0
+	ldr	r8, [sp, #24]
+	mov	r5, r1
+	mov	r6, r2
 	mov	r7, r3
-	cmp	r0, #0
-	bne	.L2363
-	ldr	r3, .L2395
-	mov	r0, #24576
-	ldr	r3, [r3]
-.L2364:
-	add	r2, r1, r10
-	cmp	r3, r2
-	bcc	.L2388
-	ldr	r4, .L2395+4
-	add	fp, r0, r1
-	ldr	r5, .L2395+8
-	mov	r0, fp
-	ldr	r2, [r4]
-	ldrb	r6, [r5]	@ zero_extendqisi2
-	ldr	r3, [r2, #24]
-	mov	r1, r6
-	add	r3, r3, r10
-	str	r3, [r2, #24]
-	bl	__aeabi_uidiv
-	add	r3, r10, fp
-	str	r0, [sp, #28]
-	mov	r1, r6
-	subs	r0, r3, #1
-	str	r3, [sp, #40]
-	bl	__aeabi_uidiv
-	ldr	r3, [sp, #28]
-	ldr	r6, [sp, #28]
-	str	r0, [sp, #44]
-	rsb	r3, r3, #1
-	str	r5, [sp, #32]
-	add	r3, r3, r0
-	str	r4, [sp, #52]
-	str	r3, [sp, #24]
-	movs	r3, #0
-	str	r3, [sp, #36]
-.L2366:
-	ldr	r3, [sp, #24]
-	cbnz	r3, .L2386
-	ldr	r0, [sp, #36]
-.L2362:
-	add	sp, sp, #64
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2363:
-	cmp	r0, #3
-	bhi	.L2388
-	lsls	r0, r0, #13
-	mov	r3, #8192
-	b	.L2364
-.L2386:
-	ldr	r3, [sp, #32]
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	ldr	r3, [sp, #28]
-	cmp	r6, r3
-	uxth	r5, r1
-	bne	.L2367
-	mov	r0, fp
-	bl	__aeabi_uidivmod
-	uxth	r8, r1
-	sub	r5, r5, r8
-	uxth	r5, r5
-	cmp	r10, r5
-	bcs	.L2368
-	uxth	r5, r10
-.L2368:
-	ldr	r2, .L2395+12
-	movs	r3, #0
-.L2371:
-	ldr	r1, [r2, #20]
-	cmp	r6, r1
-	bne	.L2369
-	ldrb	r1, [r2, #2]	@ zero_extendqisi2
-	lsls	r1, r1, #28
-	bpl	.L2369
-	ldr	r1, .L2395+12
-	movs	r2, #48
-	lsls	r5, r5, #9
-	mov	r0, r7
-	add	r7, r7, r5
-	mla	r3, r2, r3, r1
-	mov	r2, r5
-	ldr	r1, [r3, #4]
-	add	r1, r1, r8, lsl #9
-	bl	ftl_memcpy
-.L2370:
-	ldr	r3, [sp, #24]
-	adds	r6, r6, #1
-	subs	r3, r3, #1
-	str	r3, [sp, #24]
-	b	.L2366
-.L2367:
-	ldr	r3, [sp, #44]
-	mov	r8, #0
-	cmp	r6, r3
-	ittt	eq
-	addeq	r5, fp, r10
-	mlseq	r1, r6, r1, r5
-	uxtbeq	r5, r1
-	b	.L2368
-.L2369:
-	adds	r3, r3, #1
-	adds	r2, r2, #48
-	cmp	r3, #32
-	bne	.L2371
-	mov	r0, r6
-	bl	lpa_hash_get_ppa
-	str	r0, [sp, #60]
-	adds	r0, r0, #1
-	bne	.L2372
-	movs	r2, #0
-	add	r1, sp, #60
-	mov	r0, r6
-	bl	pm_log2phys
-.L2372:
-	ldr	r3, [sp, #60]
-	adds	r3, r3, #1
-	bne	.L2373
-	movs	r4, #0
-.L2374:
-	ldr	r3, [sp, #32]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r4, r3
-	bcs	.L2370
-	mla	r3, r3, r6, r4
-	cmp	fp, r3
-	bhi	.L2375
-	ldr	r2, [sp, #40]
-	cmp	r2, r3
-	bls	.L2375
-	mov	r0, r7
-	add	r7, r7, #512
-	mov	r2, #512
-	movs	r1, #0
-	bl	ftl_memset
-.L2375:
-	adds	r4, r4, #1
-	b	.L2374
-.L2373:
-	movs	r0, #0
-	bl	buf_alloc
-	mov	r4, r0
-	cbnz	r0, .L2377
-	bl	ftl_read_ahead
-	b	.L2366
-.L2377:
-	ldr	r3, [sp, #52]
-	movs	r1, #1
-	ldr	r2, [r3]
-	ldr	r3, [r2, #40]
-	adds	r3, r3, #1
-	str	r3, [r2, #40]
-	ldr	r3, [sp, #60]
-	str	r3, [r0, #24]
-	str	r3, [r0, #28]
-	ldr	r3, [sp, #32]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, r5
-	it	eq
-	streq	r7, [r0, #8]
-	bl	sblk_read_page
-	ldr	r3, [r4, #36]
-	adds	r2, r3, #1
-	str	r3, [sp, #20]
-	beq	.L2390
-	cmp	r3, #256
-	bne	.L2380
-	ldr	r3, .L2395+16
-	movs	r1, #1
-	ldr	r0, [sp, #60]
-	ldrh	r2, [r3]
-	rsb	r3, r2, #21
-	lsl	r3, r1, r3
-	lsrs	r0, r0, r2
-	ldr	r2, .L2395+20
-	subs	r3, r3, #1
-	ands	r0, r0, r3
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	bl	__aeabi_uidiv
-	ldr	r2, [r4, #20]
-	str	r0, [sp, #48]
-	ldr	r3, [r4, #24]
-	ldrh	r1, [sp, #48]
-	ldr	r0, .L2395+24
-	bl	printf
-	movs	r2, #0
-	movs	r1, #1
-	ldrh	r0, [sp, #48]
-	bl	gc_add_sblk
-.L2380:
-	ldr	r3, [r4, #12]
-	ldr	r2, [r3, #4]
-	cmp	r6, r2
-	beq	.L2381
-	ldr	r0, [r3, #12]
-	ldrb	r1, [r4, #1]	@ zero_extendqisi2
-	str	r0, [sp, #12]
-	ldr	r0, [r3, #8]
-	str	r2, [sp, #4]
+	bl	sblk_wait_write_queue_completed
+	str	r8, [sp, #24]
+	mov	r3, r7
 	mov	r2, r6
-	str	r0, [sp, #8]
-	ldr	r3, [r3]
-	ldr	r0, .L2395+28
-	str	r3, [sp]
-	ldr	r3, [sp, #60]
-	bl	printf
-	ldr	r3, .L2395+16
-	ldrh	r2, [r3]
-	movs	r3, #1
-	rsb	r0, r2, #21
-	lsls	r3, r3, r0
-	ldr	r0, [sp, #60]
-	subs	r3, r3, #1
-	lsrs	r0, r0, r2
-	ldr	r2, .L2395+20
-	ands	r0, r0, r3
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	bl	__aeabi_uidiv
-	movs	r1, #0
-	uxth	r0, r0
-	bl	ftl_sblk_dump
-.L2381:
-	ldr	r3, [r4, #12]
-	ldr	r3, [r3, #4]
-	cmp	r6, r3
-	bne	.L2382
-	ldr	r3, [sp, #20]
-	adds	r3, r3, #1
-	bne	.L2383
-.L2382:
-	movw	r2, #911
-	ldr	r1, .L2395+32
-	ldr	r0, .L2395+36
-	bl	printf
-.L2384:
-	b	.L2384
-.L2390:
-	ldr	r3, [sp, #20]
-	str	r3, [sp, #36]
-	b	.L2380
-.L2383:
-	ldr	r3, [r4, #8]
-	cbnz	r3, .L2385
-	ldr	r1, [r4, #4]
-	lsls	r2, r5, #9
-	mov	r0, r7
-	add	r1, r1, r8, lsl #9
-	bl	ftl_memcpy
-.L2385:
+	mov	r1, r5
 	mov	r0, r4
-	add	r7, r7, r5, lsl #9
-	bl	buf_free
-	b	.L2370
-.L2388:
-	mov	r0, #-1
-	b	.L2362
-.L2396:
-	.align	2
-.L2395:
-	.word	.LANCHOR52
-	.word	.LANCHOR46
-	.word	.LANCHOR45
-	.word	.LANCHOR36
-	.word	.LANCHOR71
-	.word	.LANCHOR70
-	.word	.LC114
-	.word	.LC101
-	.word	.LANCHOR157
-	.word	.LC0
-	.size	ftl_read, .-ftl_read
-	.section	.text.FtlRead,"ax",%progbits
+	pop	{r4, r5, r6, r7, r8, lr}
+	b	flash_read_page_en
+	.size	ftl_read_page, .-ftl_read_page
+	.section	.text.ftl_read_ppa_page,"ax",%progbits
 	.align	1
-	.global	FtlRead
+	.global	ftl_read_ppa_page
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlRead, %function
-FtlRead:
+	.type	ftl_read_ppa_page, %function
+ftl_read_ppa_page:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	ftl_read
-	.size	FtlRead, .-FtlRead
-	.section	.text.StorageSysDataLoad,"ax",%progbits
+	push	{r0, r1, r2, r4, r5, r6, r7, lr}
+	mov	r4, r0
+	mov	r5, r1
+	mov	r6, r2
+	mov	r7, r3
+	bl	sblk_wait_write_queue_completed
+	str	r7, [sp]
+	mov	r3, r6
+	mov	r2, r5
+	mov	r1, r4
+	ubfx	r0, r4, #21, #3
+	bl	flash_read_page_en
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, r6, r7, pc}
+	.size	ftl_read_ppa_page, .-ftl_read_ppa_page
+	.section	.text.sblk_read_page,"ax",%progbits
 	.align	1
-	.global	StorageSysDataLoad
+	.global	sblk_read_page
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	StorageSysDataLoad, %function
-StorageSysDataLoad:
-	@ args = 0, pretend = 0, frame = 0
+	.type	sblk_read_page, %function
+sblk_read_page:
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, lr}
-	mov	r4, r1
-	mov	r5, r0
-	mov	r2, #512
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r8, r0
+	ldr	r7, .L2269
+	sub	sp, sp, #24
+	mov	r6, r1
+	mov	r4, r0
+	mov	r5, r1
+.L2245:
+	cbnz	r5, .L2255
+.L2268:
+	ldr	r4, .L2269
+.L2256:
+	cmp	r6, #0
+	bne	.L2258
+	mov	r0, r6
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2255:
+	ldr	fp, [r4, #24]
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	str	r3, [sp, #8]
+.L2246:
 	movs	r1, #0
+	mov	r0, fp
+	bl	queue_lun_state
+	cbnz	r0, .L2247
+	cmp	r5, #1
+	beq	.L2252
+	ldr	r3, .L2269+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L2249
+.L2252:
 	mov	r0, r4
-	bl	ftl_memset
-	mov	r3, r4
-	mov	r1, r5
-	movs	r2, #1
-	movs	r0, #2
-	pop	{r4, r5, r6, lr}
-	b	ftl_read
-	.size	StorageSysDataLoad, .-StorageSysDataLoad
-	.section	.text.vpn_check,"ax",%progbits
-	.align	1
-	.global	vpn_check
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	vpn_check, %function
-vpn_check:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, lr}
-	ldr	r5, .L2430
-	bl	dump_ftl_info
-	ldr	r1, [r5]
-	ldr	r0, .L2430+4
-	ldr	r4, .L2430+8
-	ldrh	r3, [r1, #80]
-	ldrh	r2, [r1, #48]
-	ldrh	r1, [r1, #16]
-	bl	printf
-	ldr	r3, [r5]
-	ldr	r6, .L2430+12
-	ldrh	r1, [r3, #16]
-	ldrh	r2, [r3, #22]
-	ldr	r3, [r4]
-	ldrh	r3, [r3, r1, lsl #1]
-	subs	r0, r3, r2
-	str	r0, [sp]
-	ldr	r0, .L2430+16
-	bl	printf
-	ldr	r3, [r5]
-	movs	r5, #0
-	ldrh	r1, [r3, #48]
-	ldrh	r2, [r3, #54]
-	ldr	r3, [r4]
-	ldrh	r3, [r3, r1, lsl #1]
-	subs	r0, r3, r2
-	str	r0, [sp]
-	ldr	r0, .L2430+20
-	bl	printf
-	mov	r2, #4352
-	movs	r1, #0
-	ldr	r0, .L2430+24
-	bl	ftl_memset
-.L2400:
-	ldr	r3, .L2430+28
-	ldr	r3, [r3]
-	cmp	r5, r3
-	bcc	.L2408
-	ldr	r6, .L2430+12
-	movs	r5, #0
-	mov	r7, r6
-.L2409:
-	ldrh	r2, [r6]
-	uxth	r3, r5
-	cmp	r2, r3
-	bhi	.L2411
-	ldr	r8, .L2430+24
-	movs	r6, #0
-.L2412:
-	ldrh	r2, [r7]
-	uxth	r3, r6
-	cmp	r2, r3
-	bhi	.L2417
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, pc}
-.L2408:
-	mov	r0, r5
-	bl	lpa_hash_get_ppa
-	adds	r2, r0, #1
-	str	r0, [sp, #12]
-	bne	.L2401
-	movs	r2, #0
-	add	r1, sp, #12
-	mov	r0, r5
-	bl	pm_log2phys
-.L2402:
-	ldr	r7, [sp, #12]
-	adds	r3, r7, #1
-	beq	.L2404
-	ldr	r3, .L2430+32
-	ldrh	r0, [r3]
-	movs	r3, #1
-	rsb	r2, r0, #21
-	lsls	r3, r3, r2
-	ldr	r2, .L2430+36
-	lsr	r0, r7, r0
-	subs	r3, r3, #1
-	ands	r0, r0, r3
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	bl	__aeabi_uidiv
-	ldrh	r3, [r6]
-	uxth	r8, r0
-	cmp	r3, r8
-	mov	r3, r8
-	bls	.L2405
-	ldr	r1, .L2430+24
-	ldrh	r2, [r1, r8, lsl #1]
-	adds	r2, r2, #1
-	strh	r2, [r1, r8, lsl #1]	@ movhi
-.L2406:
-	ldrh	r3, [r6]
-	cmp	r3, r8
-	bhi	.L2404
-	movw	r2, #1111
-	ldr	r1, .L2430+40
-	ldr	r0, .L2430+44
-	bl	printf
-.L2407:
-	b	.L2407
-.L2401:
-	ldr	r3, .L2430+32
-	ldrh	r2, [r3]
-	movs	r3, #1
-	rsb	r1, r2, #21
-	lsls	r3, r3, r1
-	lsrs	r0, r0, r2
-	ldr	r2, .L2430+36
-	subs	r3, r3, #1
-	ands	r0, r0, r3
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	bl	__aeabi_uidiv
-	ldrh	r3, [r6]
-	uxth	r0, r0
-	cmp	r3, r0
-	bhi	.L2402
-	movw	r2, #1101
-	ldr	r1, .L2430+40
-	ldr	r0, .L2430+44
-	bl	printf
-.L2403:
-	b	.L2403
-.L2405:
-	mov	r2, r7
-	mov	r1, r5
-	ldr	r0, .L2430+48
+	bl	queue_read_cmd
+	b	.L2250
+.L2247:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L2246
+.L2249:
+	ldrb	r2, [r4]	@ zero_extendqisi2
+	ubfx	r3, fp, #21, #3
+	cmp	r2, #255
+	bne	.L2251
+	movw	r2, #661
+	ldr	r1, .L2269+8
+	ldr	r0, .L2269+12
+	str	r3, [sp, #4]
 	bl	printf
-	ldr	r3, .L2430+52
-	movs	r2, #4
-	ldr	r1, .L2430+56
-	ldr	r0, .L2430+60
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	ldr	r1, [r1, #4]
-	lsls	r3, r3, #7
-	bl	rknand_print_hex
-	b	.L2406
-.L2404:
-	adds	r5, r5, #1
-	b	.L2400
-.L2411:
-	ldr	r3, [r4]
-	uxth	r1, r5
-	ldr	r2, .L2430+24
-	ldrh	r3, [r3, r1, lsl #1]
-	ldrh	r2, [r2, r1, lsl #1]
+	ldr	r3, [sp, #4]
+.L2251:
+	ldrb	r2, [r4]	@ zero_extendqisi2
+	str	r2, [sp, #12]
+	movs	r2, #48
+	ldr	r1, [sp, #12]
+	muls	r2, r1, r2
+	add	r10, r7, r2
+	str	r2, [sp, #4]
+	ldr	r1, [r10, #24]
+	ubfx	r2, r1, #21, #3
 	cmp	r3, r2
-	beq	.L2410
-	ldr	r0, .L2430+64
-	ldr	r0, [r0]
-	add	r0, r0, r1, lsl #2
-	ldrb	r0, [r0, #2]	@ zero_extendqisi2
-	lsrs	r0, r0, #5
-	str	r0, [sp]
-	ldr	r0, .L2430+68
-	bl	printf
-.L2410:
-	adds	r5, r5, #1
-	b	.L2409
-.L2417:
-	ldr	r3, .L2430+64
-	uxth	r5, r6
-	ldr	r3, [r3]
-	add	r3, r3, r5, lsl #2
-	ldrb	r3, [r3, #2]	@ zero_extendqisi2
-	tst	r3, #224
-	bne	.L2413
-	ldrh	r3, [r8, r5, lsl #1]
-	cbnz	r3, .L2414
-	ldr	r3, [r4]
-	ldrh	r3, [r3, r5, lsl #1]
-	cbz	r3, .L2415
-	mov	r1, r5
-	ldr	r0, .L2430+72
-	bl	printf
-.L2415:
-	ldr	r3, [r4]
-	movs	r2, #0
-	strh	r2, [r3, r5, lsl #1]	@ movhi
-.L2414:
-	ldr	r3, [r4]
-	ldrh	r3, [r3, r5, lsl #1]
-	cbz	r3, .L2413
-	ldrh	r3, [r8, r5, lsl #1]
-	cbz	r3, .L2413
-	movw	r2, #1143
-	ldr	r1, .L2430+40
-	ldr	r0, .L2430+44
-	bl	printf
-.L2416:
-	b	.L2416
-.L2413:
-	adds	r6, r6, #1
-	b	.L2412
-.L2431:
+	bne	.L2252
+	ldr	r3, .L2269+16
+	ldrh	r3, [r3]
+	add	fp, fp, r3
+	cmp	r1, fp
+	bne	.L2252
+	ldr	r3, [sp, #4]
+	mov	fp, #255
+	ldr	r0, [r4, #24]
+	subs	r5, r5, #1
+	ldrb	r3, [r7, r3]	@ zero_extendqisi2
+	str	r3, [sp, #8]
+	bl	flash_start_plane_read
+	movs	r2, #2
+	movs	r3, #0
+	strb	r2, [r4, #42]
+	mov	r1, r4
+	strb	r3, [r4, #43]
+	ldr	r0, .L2269+20
+	strb	fp, [r4]
+	str	r2, [sp, #20]
+	str	r3, [sp, #16]
+	bl	buf_add_tail
+	ldr	r3, [sp, #16]
+	ldr	r2, [sp, #20]
+	ldr	r0, .L2269+20
+	strb	r3, [r10, #43]
+	ldr	r3, [sp, #4]
+	strb	r2, [r10, #42]
+	strb	fp, [r7, r3]
+	ldr	r3, [sp, #12]
+	add	r1, r3, r3, lsl #1
+	add	r1, r7, r1, lsl #4
+	bl	buf_add_tail
+.L2250:
+	subs	r5, r5, #1
+	beq	.L2268
+	ldr	r3, [sp, #8]
+	add	r4, r3, r3, lsl #1
+	add	r4, r7, r4, lsl #4
+	b	.L2245
+.L2258:
+	ldrb	r3, [r8, #42]	@ zero_extendqisi2
+	cmp	r3, #13
+	bne	.L2257
+	ldrb	r3, [r8]	@ zero_extendqisi2
+	subs	r6, r6, #1
+	cmp	r3, #255
+	itt	ne
+	addne	r3, r3, r3, lsl #1
+	addne	r8, r4, r3, lsl #4
+.L2257:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L2256
+.L2270:
 	.align	2
-.L2430:
-	.word	.LANCHOR60
-	.word	.LC115
-	.word	.LANCHOR56
-	.word	.LANCHOR54
-	.word	.LC116
-	.word	.LC117
-	.word	check_vpc_tbl
-	.word	.LANCHOR47
-	.word	.LANCHOR71
-	.word	.LANCHOR70
-	.word	.LANCHOR158
+.L2269:
+	.word	.LANCHOR50
+	.word	.LANCHOR168
+	.word	.LANCHOR169
 	.word	.LC0
-	.word	.LC118
-	.word	.LANCHOR45
-	.word	.LANCHOR93
-	.word	.LC119
-	.word	.LANCHOR57
-	.word	.LC120
-	.word	.LC121
-	.size	vpn_check, .-vpn_check
-	.section	.text.ftl_info_check,"ax",%progbits
+	.word	.LANCHOR103
+	.word	.LANCHOR54
+	.size	sblk_read_page, .-sblk_read_page
+	.section	.text.flash_prog_page,"ax",%progbits
 	.align	1
-	.global	ftl_info_check
+	.global	flash_prog_page
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_info_check, %function
-ftl_info_check:
-	@ args = 0, pretend = 0, frame = 16
+	.type	flash_prog_page, %function
+flash_prog_page:
+	@ args = 4, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r5, #0
-	ldr	r3, .L2467
-	mov	r8, r5
-	mov	r10, r5
-	mov	r6, r5
-	ldr	fp, .L2467+44
-	mov	r7, r5
-	ldr	r2, [r3]
-	str	r5, [sp, #4]
-	str	r3, [sp, #8]
-	ldrh	r4, [r2, #134]
-.L2433:
-	ldr	r2, .L2467+4
-	ldrh	r2, [r2]
-	cmp	r2, r4
-	bhi	.L2448
-	ldr	r3, [sp, #4]
-	mov	r2, r6
-	mov	r1, r7
-	ldr	r0, .L2467+8
-	bl	printf
-	mov	r3, r5
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	fp, r3
+	ldr	r3, .L2282
+	mov	r5, r0
+	mov	r6, r1
+	mov	r10, r2
+	ubfx	r7, r1, #0, #21
+	ubfx	r8, r1, #24, #2
+	ldr	r4, [r3]
+	add	r3, r0, #8
+	add	r3, r4, r3, lsl #8
+	str	r3, [sp, #4]
+	ldr	r3, .L2282+4
+	ldr	r3, [r3]
+	lsls	r3, r3, #27
+	bpl	.L2272
+	ldr	r3, [sp, #40]
 	mov	r2, r8
-	mov	r1, r10
-	ldr	r0, .L2467+12
+	ldr	r0, .L2282+8
 	bl	printf
-	ldr	r3, [sp, #8]
-	ldr	r1, [sp, #4]
-	ldr	r3, [r3]
-	ldrh	r2, [r3, #114]
-	cmp	r2, r10
-	ldrh	r2, [r3, #118]
-	it	ne
-	strhne	r10, [r3, #114]	@ movhi
-	cmp	r2, r8
-	ldrh	r2, [r3, #116]
-	it	ne
-	strhne	r8, [r3, #118]	@ movhi
-	cmp	r2, r5
-	ldrh	r2, [r3, #122]
-	it	ne
-	strhne	r5, [r3, #116]	@ movhi
-	cmp	r2, r7
-	ldrh	r2, [r3, #120]
-	it	ne
-	strhne	r7, [r3, #122]	@ movhi
-	cmp	r2, r6
-	ldrh	r2, [r3, #124]
-	it	ne
-	strhne	r6, [r3, #120]	@ movhi
-	cmp	r2, r1
-	itt	ne
-	ldrhne	r2, [sp, #4]
-	strhne	r2, [r3, #124]	@ movhi
-	add	sp, sp, #16
+.L2272:
+	bl	nandc_wait_flash_ready
+	mov	r0, r5
+	bl	hynix_reconfig_rr_para
+	mov	r0, r5
+	bl	nandc_cs
+	mov	r0, r5
+	cmp	r8, #0
+	bne	.L2273
+	bl	zftl_flash_enter_slc_mode
+.L2274:
+	add	r4, r4, r5, lsl #8
+	movs	r3, #128
+	mov	r0, r7
+	str	r3, [r4, #2056]
+	movs	r3, #0
+	str	r3, [r4, #2052]
+	str	r3, [r4, #2052]
+	uxtb	r3, r6
+	str	r3, [r4, #2052]
+	lsrs	r3, r7, #8
+	str	r3, [r4, #2052]
+	lsrs	r3, r7, #16
+	str	r3, [r4, #2052]
+	bl	nandc_set_seed
+	ldr	r1, .L2282+12
+	mov	r2, r10
+	mov	r3, fp
+	movs	r0, #1
+	ldrb	r1, [r1, #9]	@ zero_extendqisi2
+	bl	nandc_xfer_start
+	bl	nandc_xfer_done
+	movs	r3, #16
+	str	r3, [r4, #2056]
+	bl	nandc_wait_flash_ready
+	ldr	r0, [sp, #4]
+	bl	flash_read_status
+	bl	nandc_de_cs.constprop.29
+	ands	r4, r0, #4
+	beq	.L2271
+	mov	r2, r4
+	mov	r1, r6
+	ldr	r0, .L2282+16
+	bl	printf
+.L2271:
+	mov	r0, r4
+	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2448:
-	ldr	r2, .L2467+16
-	ldr	r3, [r2]
-	add	r3, r3, r4, lsl #2
-	ldrb	r2, [r3, #2]	@ zero_extendqisi2
-	and	r1, r2, #224
-	cmp	r1, #64
-	bne	.L2434
-	adds	r7, r7, #1
-	uxth	r7, r7
-.L2466:
-	ldr	r2, [fp]
-	ldrh	r1, [r2, r4, lsl #1]
-	cmp	r1, #15
-	bls	.L2440
-	ldr	r2, .L2467+20
-.L2463:
-	ldrh	r0, [r2]
-	ldr	r2, .L2467+24
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	muls	r2, r0, r2
-	cmp	r1, r2
-	bne	.L2436
-.L2440:
-	movs	r2, #0
-	movs	r1, #1
-	mov	r0, r4
-	bl	gc_add_sblk
-.L2436:
+.L2273:
+	bl	zftl_flash_exit_slc_mode
+	b	.L2274
+.L2283:
+	.align	2
+.L2282:
+	.word	.LANCHOR13
+	.word	.LANCHOR14
+	.word	.LC128
+	.word	.LANCHOR31
+	.word	.LC129
+	.size	flash_prog_page, .-flash_prog_page
+	.section	.text.flash_test_blk,"ax",%progbits
+	.align	1
+	.global	flash_test_blk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_test_blk, %function
+flash_test_blk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	movs	r2, #32
+	ldr	r7, .L2294
+	mov	r6, r0
+	mov	r4, r1
+	movs	r1, #165
+	ldr	r5, .L2294+4
+	ldr	r0, [r7]
+	bl	ftl_memset
+	movs	r2, #8
+	movs	r1, #90
+	ldr	r0, [r5]
+	bl	ftl_memset
+	ldr	r3, .L2294+8
+	mov	r0, r6
+	ldrh	r3, [r3]
+	muls	r4, r3, r4
+	mov	r1, r4
+	bl	flash_erase_block
+	adds	r0, r0, #1
+	bne	.L2285
+.L2287:
+	mov	r5, #-1
+.L2286:
+	mov	r1, r4
+	mov	r0, r6
+	bl	flash_erase_block
+	mov	r0, r5
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L2285:
+	ldr	r8, .L2294+12
+	mov	r1, r4
+	mov	r0, r6
+	ldrb	r3, [r8, #9]	@ zero_extendqisi2
+	str	r3, [sp]
+	ldr	r2, [r7]
+	ldr	r3, [r5]
+	bl	flash_prog_page
+	adds	r0, r0, #1
+	beq	.L2287
+	ldrb	r3, [r8, #9]	@ zero_extendqisi2
+	mov	r1, r4
+	mov	r0, r6
+	str	r3, [sp]
+	ldr	r2, [r7]
+	ldr	r3, [r5]
+	bl	flash_read_page
+	adds	r0, r0, #1
+	beq	.L2287
+	ldr	r3, [r7]
+	ldr	r3, [r3]
+	cmp	r3, #-1515870811
+	bne	.L2287
+	ldr	r3, [r5]
+	ldr	r5, [r3]
+	subs	r5, r5, #1515870810
+	it	ne
+	movne	r5, #-1
+	b	.L2286
+.L2295:
+	.align	2
+.L2294:
+	.word	.LANCHOR156
+	.word	.LANCHOR158
+	.word	.LANCHOR2
+	.word	.LANCHOR31
+	.size	flash_test_blk, .-flash_test_blk
+	.section	.text.id_block_prog_msb_ff_data,"ax",%progbits
+	.align	1
+	.global	id_block_prog_msb_ff_data
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	id_block_prog_msb_ff_data, %function
+id_block_prog_msb_ff_data:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2303
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
+	mov	r6, r0
+	mov	r7, r1
+	mov	r4, r2
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L2296
+	ldr	r5, .L2303+4
+	ldrb	r2, [r5, #19]	@ zero_extendqisi2
+	subs	r3, r2, #5
+	uxtb	r3, r3
+	cmp	r3, #30
+	bhi	.L2298
+	ldr	r2, .L2303+8
+	lsr	r3, r2, r3
+	lsls	r3, r3, #31
+	bmi	.L2300
+.L2296:
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.L2301:
+	ldrh	r2, [r10, r4, lsl #1]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L2296
+	mov	r2, #16384
+	movs	r1, #255
+	ldr	r0, [r8]
+	bl	ftl_memset
+	ldrb	r3, [r5, #9]	@ zero_extendqisi2
+	adds	r1, r4, r7
 	adds	r4, r4, #1
+	mov	r0, r6
 	uxth	r4, r4
-	b	.L2433
-.L2434:
-	cmp	r1, #96
-	bne	.L2437
-	ldr	r2, [sp, #4]
-	adds	r2, r2, #1
-	uxth	r3, r2
-	str	r3, [sp, #4]
-	b	.L2466
-.L2437:
-	cmp	r1, #160
-	bne	.L2439
-	ldr	r2, [fp]
-	adds	r6, r6, #1
-	uxth	r6, r6
-	ldrh	r1, [r2, r4, lsl #1]
-	cmp	r1, #15
-	bls	.L2440
-	ldr	r2, .L2467+28
-	b	.L2463
-.L2439:
-	cmp	r1, #0
-	bne	.L2436
-	ands	r2, r2, #24
-	bne	.L2441
-	add	r10, r10, #1
-	uxth	r10, r10
-.L2442:
-	lsls	r2, r4, #1
-	str	r2, [sp, #12]
-	ldr	r2, [fp]
-	ldrh	r2, [r2, r4, lsl #1]
-	cbz	r2, .L2444
-	mov	r1, r4
-	ldr	r0, .L2467+32
-	str	r3, [sp, #12]
-	bl	printf
-	ldr	r3, [sp, #12]
-	mov	r0, r4
-	ldrb	r2, [r3, #2]	@ zero_extendqisi2
-	lsls	r1, r2, #27
-	ite	mi
-	movmi	r1, #5
-	movpl	r1, #2
-	bfi	r2, r1, #5, #3
-	movs	r1, #1
-	strb	r2, [r3, #2]
-	movs	r2, #0
-	bl	gc_add_sblk
-	bl	vpn_check
-.L2444:
-	ldr	r2, [fp]
-	lsls	r3, r4, #1
-	ldrh	r2, [r2, r3]
-	cmp	r2, #0
-	beq	.L2436
-	movw	r2, #1202
-	ldr	r1, .L2467+36
-	ldr	r0, .L2467+40
-	bl	printf
-.L2447:
-	b	.L2447
-.L2441:
-	cmp	r2, #16
-	itete	eq
-	addeq	r8, r8, #1
-	addne	r5, r5, #1
-	uxtheq	r8, r8
-	uxthne	r5, r5
-	b	.L2442
-.L2468:
+	str	r3, [sp]
+	ldr	r3, [r8]
+	mov	r2, r3
+	bl	flash_prog_page
+.L2302:
+	ldrh	r3, [r5, #10]
+	cmp	r3, r4
+	bhi	.L2301
+	b	.L2296
+.L2298:
+	cmp	r2, #68
+	bne	.L2296
+.L2300:
+	ldr	r10, .L2303+12
+	ldr	r8, .L2303+16
+	b	.L2302
+.L2304:
 	.align	2
-.L2467:
-	.word	.LANCHOR46
-	.word	.LANCHOR54
-	.word	.LC123
-	.word	.LC124
-	.word	.LANCHOR57
-	.word	.LANCHOR79
-	.word	.LANCHOR69
-	.word	.LANCHOR68
-	.word	.LC122
-	.word	.LANCHOR159
-	.word	.LC0
-	.word	.LANCHOR56
-	.size	ftl_info_check, .-ftl_info_check
-	.section	.text.gc_scan_src_blk,"ax",%progbits
+.L2303:
+	.word	.LANCHOR19
+	.word	.LANCHOR31
+	.word	1073758215
+	.word	.LANCHOR138
+	.word	.LANCHOR156
+	.size	id_block_prog_msb_ff_data, .-id_block_prog_msb_ff_data
+	.section	.text.flash_dual_page_prog,"ax",%progbits
 	.align	1
-	.global	gc_scan_src_blk
+	.global	flash_dual_page_prog
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	gc_scan_src_blk, %function
-gc_scan_src_blk:
-	@ args = 0, pretend = 0, frame = 16
+	.type	flash_dual_page_prog, %function
+flash_dual_page_prog:
+	@ args = 12, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	movw	r3, #65535
-	ldr	r4, .L2511
-	ldrh	r1, [r4]
-	cmp	r1, r3
-	bne	.L2470
-	mov	r2, #880
-	ldr	r1, .L2511+4
-	ldr	r0, .L2511+8
+	mov	fp, r3
+	ldr	r3, .L2319
+	mov	r4, r0
+	mov	r6, r1
+	ubfx	r5, r1, #0, #21
+	str	r2, [sp, #8]
+	ubfx	r8, r1, #24, #2
+	ldr	r7, [r3]
+	add	r3, r0, #8
+	add	r3, r7, r3, lsl #8
+	str	r3, [sp, #4]
+	ldr	r3, .L2319+4
+	ldr	r2, [r3]
+	str	r3, [sp, #12]
+	tst	r2, #16
+	beq	.L2306
+	ldr	r3, [sp, #56]
+	mov	r2, r8
+	ldr	r0, .L2319+8
 	bl	printf
-.L2471:
-	b	.L2471
-.L2470:
-	ldr	r3, .L2511+12
-	ldr	r3, [r3]
-	lsls	r0, r3, #23
-	bpl	.L2472
-	ldr	r3, .L2511+16
-	ldr	r0, .L2511+20
+.L2306:
+	bl	nandc_wait_flash_ready
+	mov	r0, r4
+	bl	nandc_cs
+	mov	r0, r4
+	cmp	r8, #0
+	bne	.L2307
+	bl	zftl_flash_enter_slc_mode
+.L2308:
+	add	r4, r7, r4, lsl #8
+	uxtb	r3, r6
+	ldr	r8, .L2319+16
+	movs	r7, #0
+	mov	r10, #128
+	str	r10, [r4, #2056]
+	mov	r0, r5
+	str	r7, [r4, #2052]
+	str	r7, [r4, #2052]
+	str	r3, [r4, #2052]
+	lsrs	r3, r5, #8
+	str	r3, [r4, #2052]
+	lsrs	r3, r5, #16
+	str	r3, [r4, #2052]
+	bl	nandc_set_seed
+	mov	r3, fp
+	ldr	r2, [sp, #8]
+	ldrb	r1, [r8, #9]	@ zero_extendqisi2
+	movs	r0, #1
+	mov	fp, #16
+	bl	nandc_xfer_start
+	bl	nandc_xfer_done
+	str	fp, [r4, #2056]
+	bl	nandc_wait_flash_ready
+	adds	r0, r5, #1
+	str	r10, [r4, #2056]
+	uxtb	r3, r0
+	str	r7, [r4, #2052]
+	str	r7, [r4, #2052]
+	str	r3, [r4, #2052]
+	lsrs	r3, r0, #8
+	str	r3, [r4, #2052]
+	lsr	r3, r0, fp
+	str	r3, [r4, #2052]
+	bl	nandc_set_seed
+	ldr	r3, [sp, #52]
+	movs	r0, #1
+	ldr	r2, [sp, #48]
+	ldrb	r1, [r8, #9]	@ zero_extendqisi2
+	bl	nandc_xfer_start
+	bl	nandc_xfer_done
+	str	fp, [r4, #2056]
+	bl	nandc_wait_flash_ready
+	ldr	r0, [sp, #4]
+	bl	flash_read_status
+	bl	nandc_de_cs.constprop.29
+	ands	r4, r0, #4
+	beq	.L2305
+	ldr	r3, [sp, #12]
 	ldr	r3, [r3]
-	ldrh	r2, [r3, r1, lsl #1]
+	lsls	r3, r3, #19
+	bpl	.L2305
+	mov	r2, r4
+	mov	r1, r6
+	ldr	r0, .L2319+12
 	bl	printf
-.L2472:
-	ldr	r1, .L2511+24
-	ldrh	r0, [r4]
-	bl	ftl_get_blk_list_in_sblk
-	uxtb	r0, r0
-	strb	r0, [r4, #5]
-	cbnz	r0, .L2473
-	movw	r3, #65535
-	strh	r3, [r4]	@ movhi
-.L2469:
+.L2305:
+	mov	r0, r4
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2473:
-	ldr	r2, .L2511+28
-	ldrh	r3, [r4]
-	ldr	r2, [r2]
-	add	r2, r2, r3, lsl #2
-	ldrb	r2, [r2, #2]	@ zero_extendqisi2
-	and	r2, r2, #224
-	cmp	r2, #32
-	beq	.L2475
-	cmp	r2, #224
-	beq	.L2475
-	cbz	r2, .L2476
-	ldr	r1, .L2511+32
-	ldr	r1, [r1]
-	ldrh	r5, [r1, #16]
-	cmp	r5, r3
-	beq	.L2475
-	ldrh	r5, [r1, #48]
-	cmp	r5, r3
-	beq	.L2475
-	ldrh	r1, [r1, #80]
-	cmp	r1, r3
-	bne	.L2510
-.L2475:
-	movw	r3, #65535
-	movs	r0, #0
-	strh	r3, [r4]	@ movhi
-	strh	r0, [r4, #20]	@ movhi
-	b	.L2469
-.L2476:
-	ldr	r2, .L2511+16
-	ldr	r2, [r2]
-	ldrh	r3, [r2, r3, lsl #1]
-	cmp	r3, #0
-	beq	.L2475
-	mov	r2, #900
-	ldr	r1, .L2511+4
-	ldr	r0, .L2511+8
-	bl	printf
-.L2478:
-	b	.L2478
-.L2510:
-	add	r0, r4, r0, lsl #1
-	movw	r3, #65535
-	ldrh	r7, [r0, #34]
-	cmp	r7, r3
-	bne	.L2479
-	mov	r2, #908
-	ldr	r1, .L2511+4
-	ldr	r0, .L2511+8
-	bl	printf
-.L2480:
-	b	.L2480
-.L2479:
-	ldr	r1, .L2511+36
-	cmp	r2, #160
-	ldr	r0, .L2511+40
-	ldr	r8, .L2511+64
-	ldrh	r3, [r1]
-	mov	r10, r1
-	ldrh	r0, [r0]
-	add	r3, r3, #-1
-	uxth	r3, r3
-	mul	r7, r7, r0
-	bne	.L2494
-	ldr	r2, .L2511+44
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cmp	r2, #2
-	uxth	fp, r2
-	orr	r7, r7, r2, lsl #24
-	bne	.L2481
-	ldrh	r3, [r8]
-	mov	fp, #2
-	subs	r3, r3, #1
-	uxth	r3, r3
-.L2481:
-	orrs	r7, r7, r3
-	strb	fp, [r4, #6]
-	movs	r5, #0
-	movs	r0, #1
-	strh	r5, [r4, #2]	@ movhi
-	strb	r5, [r4, #4]
-	strh	r5, [r4, #22]	@ movhi
-	bl	buf_alloc
-	str	r7, [r0, #24]
-	movs	r1, #1
-	ldr	r7, .L2511+48
-	mov	r6, r0
-	bl	sblk_read_page
-	ldrh	r3, [r8]
+.L2307:
+	bl	zftl_flash_exit_slc_mode
+	b	.L2308
+.L2320:
+	.align	2
+.L2319:
+	.word	.LANCHOR13
+	.word	.LANCHOR14
+	.word	.LC128
+	.word	.LC129
+	.word	.LANCHOR31
+	.size	flash_dual_page_prog, .-flash_dual_page_prog
+	.section	.text.fw_flash_page_prog.constprop.26,"ax",%progbits
+	.align	1
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	fw_flash_page_prog.constprop.26, %function
+fw_flash_page_prog.constprop.26:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, lr}
+	mov	r5, r1
+	ldr	r7, .L2325
+	mov	r6, r2
+	ldrb	r1, [r7, #9]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	ldr	r3, .L2325+4
+	mov	r4, r0
+	ldrb	r8, [r3]	@ zero_extendqisi2
+	ldr	r3, .L2325+8
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	bl	nandc_bch_sel
+	ldrb	r3, [r7, #7]	@ zero_extendqisi2
+	cmp	r3, #9
+	bne	.L2322
+	ldr	r7, .L2325+12
+	mov	r2, #16384
 	movs	r1, #255
-	ldrb	r2, [r7]	@ zero_extendqisi2
-	ldr	r8, .L2511+68
-	muls	r2, r3, r2
-	ldr	r0, [r8]
-	lsls	r2, r2, #2
+	ldr	r0, [r7]
 	bl	ftl_memset
-	ldr	r3, [r6, #36]
-	strh	r5, [r4, #20]	@ movhi
-	adds	r2, r3, #1
-	bne	.L2482
-.L2483:
-	mov	r0, #-1
-	b	.L2469
-.L2494:
-	mov	fp, #1
-	b	.L2481
-.L2482:
-	cmp	r3, #512
-	beq	.L2483
-	ldr	r2, [r6, #12]
-	ldr	r3, .L2511+52
-	ldr	r2, [r2]
+	ldr	r3, [r7]
+	movs	r2, #4
+	str	r2, [sp, #8]
+	mov	r1, r4
+	mov	r2, r5
+	movs	r0, #0
 	str	r3, [sp, #4]
-	cmp	r2, r3
-	beq	.L2484
-	mov	r1, r5
-	ldrh	r0, [r4]
-	bl	ftl_sblk_dump
-	ldr	r2, [r6, #12]
-	ldr	r3, [sp, #4]
-	ldr	r2, [r2]
-	cmp	r2, r3
-	beq	.L2483
-	movw	r2, #937
-	ldr	r1, .L2511+4
-	ldr	r0, .L2511+8
-	bl	printf
-.L2485:
-	b	.L2485
-.L2484:
-	ldrb	r3, [r7]	@ zero_extendqisi2
-	ldrh	r2, [r10]
-	ldr	r7, [r6, #4]
-	ldr	r10, .L2511+72
-	smulbb	r3, r3, r2
-	subs	r7, r7, #4
-	smulbb	fp, r3, fp
-	uxth	fp, fp
-.L2486:
-	cmp	r5, fp
-	blt	.L2491
-	ldr	r5, .L2511+16
-	mov	r0, r6
-	bl	buf_free
-	ldrh	r1, [r4]
-	ldr	r3, [r5]
-	ldrh	r2, [r3, r1, lsl #1]
-	ldrh	r3, [r4, #20]
-	cmp	r2, r3
-	beq	.L2492
-	ldr	r0, .L2511+56
-	bl	printf
-.L2492:
-	ldr	r3, [r5]
-	ldrh	r2, [r4]
-	ldrh	r2, [r3, r2, lsl #1]
-	ldrh	r3, [r4, #20]
-	cmp	r2, r3
-	bcs	.L2493
-	bl	vpn_check
-.L2493:
-	ldr	r3, [r5]
-	ldrh	r1, [r4, #20]
-	ldrh	r2, [r4]
-	strh	r1, [r3, r2, lsl #1]	@ movhi
-	movs	r3, #0
-	strh	r3, [r4, #24]	@ movhi
-	ldrh	r0, [r4, #20]
-	b	.L2469
-.L2491:
-	ldr	r0, [r7, #4]!
-	adds	r3, r0, #1
-	beq	.L2488
-	bl	lpa_hash_get_ppa
-	str	r0, [sp, #12]
-	adds	r0, r0, #1
-	bne	.L2489
-	movs	r2, #0
-	add	r1, sp, #12
-	ldr	r0, [r7]
-	bl	pm_log2phys
-.L2489:
-	ldr	r2, [sp, #12]
-	movs	r3, #1
-	ldrh	r0, [r10]
-	str	r2, [sp, #4]
-	rsb	r1, r0, #21
-	lsls	r3, r3, r1
-	lsr	r0, r2, r0
-	ldr	r2, .L2511+60
-	subs	r3, r3, #1
-	ands	r0, r0, r3
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	bl	__aeabi_uidiv
-	ldrh	r3, [r4]
-	ldr	r2, [sp, #4]
-	cmp	r0, r3
-	bne	.L2488
-	ldrh	r3, [r4, #20]
-	ldr	r1, [r8]
-	str	r2, [r1, r3, lsl #2]
-	adds	r3, r3, #1
-	strh	r3, [r4, #20]	@ movhi
-.L2488:
-	adds	r5, r5, #1
-	b	.L2486
-.L2512:
+	str	r3, [sp]
+	mov	r3, r6
+	bl	flash_dual_page_prog
+.L2324:
+	mov	r4, r0
+	mov	r0, r8
+	bl	nandc_bch_sel
+	mov	r0, r4
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L2322:
+	movs	r3, #4
+	mov	r2, r5
+	str	r3, [sp]
+	mov	r1, r4
+	mov	r3, r6
+	movs	r0, #0
+	bl	flash_prog_page
+	b	.L2324
+.L2326:
 	.align	2
-.L2511:
-	.word	.LANCHOR59
-	.word	.LANCHOR160
-	.word	.LC0
-	.word	.LANCHOR22
-	.word	.LANCHOR56
-	.word	.LC125
-	.word	.LANCHOR59+36
-	.word	.LANCHOR57
-	.word	.LANCHOR60
-	.word	.LANCHOR79
-	.word	.LANCHOR75
-	.word	.LANCHOR64
-	.word	.LANCHOR69
-	.word	-178307901
-	.word	.LC126
-	.word	.LANCHOR70
-	.word	.LANCHOR68
-	.word	.LANCHOR61
-	.word	.LANCHOR71
-	.size	gc_scan_src_blk, .-gc_scan_src_blk
-	.section	.text.ftl_scan_all_data,"ax",%progbits
+.L2325:
+	.word	.LANCHOR31
+	.word	.LANCHOR44
+	.word	.LANCHOR17
+	.word	.LANCHOR156
+	.size	fw_flash_page_prog.constprop.26, .-fw_flash_page_prog.constprop.26
+	.section	.text.idb_write_data,"ax",%progbits
 	.align	1
-	.global	ftl_scan_all_data
+	.global	idb_write_data
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_scan_all_data, %function
-ftl_scan_all_data:
-	@ args = 0, pretend = 0, frame = 16
+	.type	idb_write_data, %function
+idb_write_data:
+	@ args = 0, pretend = 0, frame = 136
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r0, #0
-	ldr	r8, .L2542+20
-	sub	sp, sp, #40
-	movs	r5, #0
-	bl	buf_alloc
-	movs	r1, #0
-	mov	r4, r0
-	ldr	r0, .L2542
-	bl	printf
-.L2514:
-	ldr	r3, [r8]
-	cmp	r5, r3
-	bcc	.L2527
-	mov	r0, r4
-	bl	buf_free
-	add	sp, sp, #40
+	mov	r8, r3
+	ldr	r5, .L2444
+	adds	r3, r1, r3
+	cmp	r3, #63
+	sub	sp, sp, #144
+	mov	r4, r1
+	mov	r7, r2
+	ldr	r6, [r5]
+	bls	.L2328
+	cmp	r1, #576
+	bcs	.L2329
+	cbnz	r6, .L2330
+	mov	r0, #262144
+	bl	ftl_malloc
+	str	r0, [r5]
+	cbnz	r0, .L2331
+.L2336:
+	mov	r0, #-1
+.L2327:
+	add	sp, sp, #144
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2527:
-	mov	r3, #-1
-	str	r3, [r4, #20]
-	ubfx	r3, r5, #0, #12
-	cbnz	r3, .L2515
-	ldr	r2, [sp, #36]
-	mov	r1, r5
-	ldr	r0, .L2542+4
-	bl	printf
-.L2515:
-	mov	r0, r5
-	bl	lpa_hash_get_ppa
-	str	r0, [sp, #36]
-	adds	r0, r0, #1
-	bne	.L2516
-	movs	r2, #0
-	add	r1, sp, #36
-	mov	r0, r5
-	bl	pm_log2phys
-.L2516:
-	ldr	r3, [sp, #36]
-	str	r3, [r4, #24]
-	str	r3, [r4, #28]
+.L2331:
+	mov	r2, #262144
+	mov	r1, r6
+	bl	ftl_memset
+.L2330:
+	ldr	r6, .L2444+4
+	ldr	r3, [r6]
+	cbz	r3, .L2333
+.L2337:
+	ldr	r3, .L2444+8
+	cmp	r4, #64
+	mov	r2, #1
+	ldr	r0, [r5]
+	str	r2, [r3]
+	bhi	.L2438
+	rsb	r1, r4, #64
+	sub	r2, r8, r1
+	add	r1, r7, r1, lsl #9
+	lsls	r2, r2, #9
+.L2443:
+	bl	ftl_memcpy
+.L2338:
+	movs	r0, #0
+	b	.L2327
+.L2333:
+	mov	r0, #262144
+	bl	ftl_malloc
+	str	r0, [r6]
+	cmp	r0, #0
+	bne	.L2337
+	b	.L2336
+.L2438:
+	rsb	r2, r4, #576
+	subs	r4, r4, #64
+	cmp	r2, r8
+	mov	r1, r7
+	it	cs
+	movcs	r2, r8
+	add	r0, r0, r4, lsl #9
+	lsls	r2, r2, #9
+	b	.L2443
+.L2328:
+	cmp	r1, #576
+	bcc	.L2338
+.L2329:
+	ldr	r3, .L2444+8
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L2338
+	ldr	r7, .L2444+12
+	ldr	r2, .L2444+16
+	ldr	r10, .L2444+32
+	ldrb	r3, [r7]	@ zero_extendqisi2
+	ldrb	r4, [r2, #9]	@ zero_extendqisi2
+	mov	r8, r2
+	ldrh	r5, [r2, #26]
+	str	r3, [sp, #20]
+	cmp	r3, #0
+	beq	.L2390
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	clz	r3, r3
+	lsrs	r3, r3, #5
+.L2440:
+	movs	r0, #0
+	str	r3, [sp, #28]
+	bl	zftl_flash_exit_slc_mode
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	strb	r3, [r7]
+	ldr	r3, .L2444+20
+	ldr	r2, [r6]
+	cmp	r2, r3
+	bne	.L2341
+	ldrh	r0, [r8, #10]
+	ldrb	r1, [r8, #12]	@ zero_extendqisi2
+	lsls	r0, r0, #2
+	bl	__aeabi_idiv
+	cmp	r0, #512
+	mov	r3, r0
+	it	ge
+	movge	r3, #512
+	add	r1, r6, #260096
+	str	r3, [sp, #32]
+	movw	r2, #65023
+	movs	r3, #0
+.L2345:
+	ldr	r0, [r1, #-4]!
+	cbnz	r0, .L2343
+	ldr	r0, [r6, r3, lsl #2]
 	adds	r3, r3, #1
-	bne	.L2517
-.L2519:
-	adds	r5, r5, #1
-	b	.L2514
-.L2517:
-	movs	r1, #1
-	mov	r0, r4
-	bl	sblk_read_page
-	ldr	r3, [r4, #36]
-	ldr	r2, [r4, #12]
-	cmp	r3, #256
-	beq	.L2518
-	adds	r0, r3, #1
-	beq	.L2518
-	ldr	r1, [r2, #4]
-	cmp	r5, r1
-	beq	.L2519
-.L2518:
-	ldr	r1, [r4, #4]
-	ldr	r10, .L2542+24
-	ldr	r7, .L2542+8
-	ldr	r0, [r1, #4]
-	str	r0, [sp, #20]
-	ldr	r1, [r1]
-	ldr	r0, .L2542+12
-	str	r1, [sp, #16]
-	ldr	r1, [r2, #12]
-	str	r1, [sp, #12]
-	ldr	r1, [r2, #8]
-	str	r1, [sp, #8]
-	ldr	r1, [r2, #4]
-	str	r1, [sp, #4]
-	mov	r1, r5
-	ldr	r2, [r2]
-	str	r2, [sp]
-	ldr	r2, [r4, #24]
+	cmp	r3, #4096
+	add	r2, r2, #-1
+	it	hi
+	movhi	r3, #0
+	cmp	r2, #4096
+	str	r0, [r1, #2048]
+	bne	.L2345
+.L2343:
+	smulbb	r4, r4, r5
+	ldr	r3, [sp, #32]
+	ldr	r1, [r6, r2, lsl #2]
+	ldr	r0, .L2444+24
 	bl	printf
-	ldr	r2, [r4, #12]
-	ldr	r3, [r2, #8]
-	adds	r1, r3, #1
-	bne	.L2520
-.L2522:
-	ldrb	r6, [r10]	@ zero_extendqisi2
+	uxth	r3, r4
+	str	r3, [sp, #68]
+	movs	r3, #0
+	str	r3, [sp, #12]
+	str	r3, [sp, #24]
+.L2386:
+	ldr	r3, .L2444+4
+	mov	r2, #512
+	movs	r1, #0
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldr	r3, .L2444+28
+	ldr	r2, [sp, #24]
+	ldr	r3, [r3]
+	add	r3, r3, r2
+	ldrb	r3, [r3, #32]	@ zero_extendqisi2
+	cmp	r3, #255
+	beq	.L2346
+	ldr	r2, [sp, #68]
+	mul	r10, r2, r3
+	ldr	r3, [sp, #28]
+	cbz	r3, .L2347
+	ldr	r3, [sp, #24]
+	ldr	r5, .L2444+12
+	ldr	r4, .L2444+32
+	cmp	r3, #1
+	bne	.L2348
+	ldrb	r3, [sp, #20]	@ zero_extendqisi2
+.L2441:
+	strb	r3, [r5]
+	strb	r3, [r4]
+.L2347:
+	ldr	r8, .L2444+16
+	movs	r5, #0
+	ldr	r3, .L2444+36
+	mov	r0, r10
+	ldrb	r7, [r8, #9]	@ zero_extendqisi2
+	ldrh	r4, [r8, #26]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	mov	r1, r7
+	str	r3, [sp, #72]
+	smulbb	r4, r4, r7
+	ldr	r3, .L2444+36
+	uxth	r4, r4
+	strb	r5, [r3]
+	bl	__aeabi_uidiv
+	mov	r1, r0
 	mov	r0, r5
-	ldr	fp, .L2542+28
-	lsls	r1, r6, #7
+	bl	flash_erase_block
+	mov	r1, r4
+	mov	r0, r10
+	bl	__aeabi_uidivmod
+	ldrh	r0, [r8, #10]
+	sub	r3, r10, r1
+	str	r1, [sp, #40]
+	ldrb	r1, [r8, #12]	@ zero_extendqisi2
+	str	r3, [sp, #36]
+	lsls	r0, r0, #2
 	bl	__aeabi_idiv
-	uxth	r10, r0
-	mov	r0, r5
-	bl	lpa_hash_get_ppa
-	lsls	r3, r6, #7
-	str	r0, [sp]
-	mov	r2, r10
-	ldr	r0, .L2542+16
-	subs	r3, r3, #1
+	ldr	r3, [sp, #36]
+	str	r0, [sp, #44]
+	cmp	r10, r3
+	bne	.L2393
+	ldr	r3, .L2444+40
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #9
+	bne	.L2393
+	ldr	r3, .L2444+4
+	mov	r2, #1024
 	mov	r1, r5
-	ands	r3, r3, r5
-	movs	r6, #0
-	uxth	r3, r3
-	bl	printf
-	movs	r2, #0
-	add	r1, sp, #36
-	mov	r0, r5
-	bl	pm_log2phys
-.L2521:
-	adds	r3, r7, r6
-	ldr	r1, [r3, #4]
-	cbz	r1, .L2526
-	ldrh	r3, [r7, r6]
-	cmp	r3, r10
-	bne	.L2526
-	mov	r3, #4096
-	movs	r2, #4
-	mov	r0, fp
-	bl	rknand_print_hex
-.L2526:
-	adds	r6, r6, #8
-	cmp	r6, #256
-	bne	.L2521
-	b	.L2519
-.L2520:
-	ldr	r6, [r2, #4]
-	ldr	r2, .L2542+20
-	ldr	r2, [r2]
-	cmp	r6, r2
-	bcs	.L2522
-	str	r3, [r4, #24]
-	movs	r1, #1
+	ldr	r4, [r3]
 	mov	r0, r4
-	bl	sblk_read_page
-	ldr	r2, [r4, #4]
-	ldr	r3, [r4, #12]
-	ldr	r0, .L2542+12
-	ldr	r1, [r2, #4]
-	str	r1, [sp, #20]
-	mov	r1, r5
-	ldr	r2, [r2]
-	str	r2, [sp, #16]
-	ldr	r2, [r3, #12]
-	str	r2, [sp, #12]
-	ldr	r2, [r3, #8]
-	str	r2, [sp, #8]
-	ldr	r2, [r3, #4]
-	str	r2, [sp, #4]
-	ldr	r3, [r3]
-	str	r3, [sp]
-	ldr	r3, [r4, #36]
-	ldr	r2, [r4, #24]
-	bl	printf
-	mov	r0, r6
-	bl	lpa_hash_get_ppa
-	str	r0, [sp, #36]
-	adds	r0, r0, #1
-	bne	.L2523
-	movs	r2, #0
-	add	r1, sp, #36
-	mov	r0, r6
-	bl	pm_log2phys
-.L2523:
+	bl	ftl_memset
+	ldr	r2, .L2444+44
+	movs	r3, #12
+	str	r5, [r4, #12]
+	strb	r5, [r4, #16]
+	stm	r4, {r2, r3}
+	ldr	r3, .L2444+32
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2350
+	ldrb	r3, [r8, #29]	@ zero_extendqisi2
+	strb	r3, [r4, #16]
+.L2350:
+	movs	r3, #4
+	strb	r3, [r4, #17]
+	ldr	r3, .L2444+16
+	ldrb	r1, [r3, #12]	@ zero_extendqisi2
+	ldrh	r0, [r3, #10]
+	bl	__aeabi_idiv
+	cmp	r7, #8
+	mov	r3, #0
+	ite	hi
+	movhi	r2, #70
+	movls	r2, #16
+	movs	r1, #12
+	strh	r0, [r4, #18]	@ movhi
+	strb	r3, [r4, #20]
+	adds	r0, r4, r1
+	strh	r3, [r4, #22]	@ movhi
+	strb	r2, [r4, #21]
+	bl	js_hash
+	ldr	r3, [sp, #32]
+	str	r0, [r4, #8]
+	subs	r3, r3, #4
+	str	r3, [sp, #16]
+.L2349:
+	mov	r8, r6
+	mov	fp, #0
+.L2352:
+	ldr	r3, [sp, #44]
+	cmp	r3, fp
+	bhi	.L2363
+	ldr	r3, .L2444+4
+	movs	r4, #0
+	mov	r0, r10
+	movs	r7, #4
+	ldr	r5, [r3]
+	ldr	r3, .L2444+16
+	ldrb	r2, [r3, #9]	@ zero_extendqisi2
+	ldrh	r1, [r3, #26]
+	str	r2, [sp, #60]
+	ldrh	r3, [sp, #60]
+	smulbb	r1, r1, r3
+	ldr	r3, .L2444+36
+	uxth	r1, r1
+	strb	r4, [r3]
+	bl	__aeabi_uidivmod
+	sub	r3, r10, r1
+	str	r1, [sp, #36]
+	str	r3, [sp, #64]
+	and	r3, r1, #3
+	str	r3, [sp, #40]
+	ldr	r3, [sp, #16]
+	str	r4, [sp, #48]
+	str	r3, [sp, #52]
+.L2364:
+	ldr	r3, [sp, #52]
+	cmp	r4, r3
+	bcc	.L2380
+	ldr	r3, .L2444+36
+	ldrb	r2, [sp, #72]	@ zero_extendqisi2
+	strb	r2, [r3]
+	ldr	r3, [sp, #28]
+	cbz	r3, .L2381
+	movs	r0, #0
+	bl	zftl_flash_exit_slc_mode
+	ldr	r2, .L2444+12
+	movs	r3, #0
+	strb	r3, [r2]
+	ldr	r2, .L2444+32
+	strb	r3, [r2]
+.L2381:
+	ldr	r3, [sp, #16]
+	movs	r4, #0
+	lsls	r1, r3, #7
+	ldr	r3, .L2444+4
+	ldr	r0, [r3]
+.L2382:
+	cmp	r4, r1
+	bne	.L2384
+	ldr	r3, [sp, #12]
+	adds	r3, r3, #1
+	cmp	r3, #5
+	str	r3, [sp, #12]
+	bls	.L2346
+	b	.L2389
+.L2390:
+	ldr	r3, [sp, #20]
+	b	.L2440
+.L2348:
+	movs	r0, #0
+	bl	zftl_flash_exit_slc_mode
+	movs	r3, #0
+	b	.L2441
+.L2393:
+	ldr	r3, [sp, #32]
+	mov	r4, r5
+	str	r3, [sp, #16]
+	b	.L2349
+.L2445:
+	.align	2
+.L2444:
+	.word	.LANCHOR135
+	.word	.LANCHOR137
+	.word	.LANCHOR136
+	.word	.LANCHOR0
+	.word	.LANCHOR31
+	.word	-52655045
+	.word	.LC130
+	.word	.LANCHOR27
+	.word	.LANCHOR19
+	.word	.LANCHOR46
+	.word	.LANCHOR28
+	.word	1179535694
+.L2363:
+	ldr	r3, [sp, #40]
+	add	r5, r3, fp
+	ldr	r3, .L2446
+	lsrs	r5, r5, #2
+	adds	r2, r5, #1
+	ldrh	r0, [r3, r2, lsl #1]
+	ldr	r3, .L2446+4
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	cmp	r1, #0
+	bne	.L2353
+	mov	r2, r0
+.L2354:
+	ldr	r0, .L2446+8
+	ldr	r3, .L2446
+	ldrb	r0, [r0]	@ zero_extendqisi2
+	cmp	r0, #9
+	itt	ne
+	addne	r2, r2, #-1
+	lslne	r2, r2, #2
+	str	r2, [sp, #80]
+	movw	r2, #61424
+	str	r2, [sp, #84]
+	ldrh	r2, [r3, r5, lsl #1]
+	cbnz	r1, .L2358
+	mov	r5, r2
+.L2359:
+	mul	r0, r5, r7
+	add	r2, sp, #80
+	cbnz	r4, .L2360
 	ldr	r3, [sp, #36]
-	movs	r1, #1
-	mov	r0, r4
-	str	r3, [r4, #24]
-	bl	sblk_read_page
-	ldr	r2, [r4, #4]
-	ldr	r3, [r4, #12]
-	ldr	r0, .L2542+12
-	ldr	r1, [r2, #4]
-	str	r1, [sp, #20]
-	mov	r1, r6
-	ldr	r2, [r2]
-	str	r2, [sp, #16]
-	ldr	r2, [r3, #12]
-	str	r2, [sp, #12]
-	ldr	r2, [r3, #8]
-	str	r2, [sp, #8]
-	ldr	r2, [r3, #4]
-	str	r2, [sp, #4]
-	ldr	r3, [r3]
-	str	r3, [sp]
-	ldr	r2, [r4, #24]
-	ldr	r3, [r4, #36]
-	bl	printf
-	ldrb	fp, [r10]	@ zero_extendqisi2
-	mov	r0, r6
-	lsl	r1, fp, #7
+	mov	r1, r8
+	add	r0, r0, r3
+	bl	fw_flash_page_prog.constprop.26
+	ldr	r3, .L2446+4
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	cbnz	r2, .L2361
+	adds	r5, r5, #1
+	mov	r1, r7
+	uxth	r5, r5
+	ldr	r0, [sp, #36]
 	bl	__aeabi_uidiv
-	uxth	r3, r0
-	str	r0, [sp, #28]
-	mov	r0, r6
-	str	r3, [sp, #24]
-	bl	lpa_hash_get_ppa
-	lsl	r3, fp, #7
-	ldr	r2, [sp, #28]
-	ldr	fp, .L2542+32
-	mov	r1, r6
-	subs	r3, r3, #1
-	str	r0, [sp]
-	ands	r3, r3, r6
-	ldr	r0, .L2542+16
+	mov	r2, r5
+	mov	r1, r0
+	mov	r0, r4
+	bl	id_block_prog_msb_ff_data
+.L2361:
+	ldr	r3, [sp, #16]
+	add	r8, r8, #2048
+	add	r2, r3, #16
+	cmp	fp, r2
+	bcc	.L2362
+	add	r2, r3, #20
+	cmp	fp, r2
+	bcs	.L2362
+	add	r8, r6, #2048
+.L2362:
+	add	r3, fp, #4
+	movs	r4, #0
+	uxth	fp, r3
+	b	.L2352
+.L2353:
+	ldr	r0, .L2446+12
+	ldrb	r0, [r0]	@ zero_extendqisi2
+	cmp	r0, #0
+	beq	.L2354
+	lsls	r2, r2, #1
+	b	.L2354
+.L2358:
+	ldr	r2, .L2446+12
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r2, #0
+	beq	.L2359
+	lsls	r5, r5, #1
+	b	.L2359
+.L2360:
+	ldr	r3, [sp, #36]
+	mov	r1, r4
+	add	r0, r0, r3
+	bl	fw_flash_page_prog.constprop.26
+	b	.L2362
+.L2380:
+	ldr	r3, [sp, #40]
+	mov	r1, r7
+	subs	r3, r7, r3
 	uxth	r3, r3
-	uxth	r2, r2
+	str	r3, [sp, #44]
+	ldr	r3, [sp, #36]
+	adds	r0, r3, r4
+	bl	__aeabi_uidiv
+	ldr	r2, .L2446+4
+	uxth	r0, r0
+	ldr	r3, .L2446
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	ldrh	r3, [r3, r0, lsl #1]
+	cmp	r2, #0
+	bne	.L2365
+	mov	r0, r3
+.L2366:
+	ldr	r3, .L2446+16
+	ldr	r2, [sp, #64]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r3, [sp, #56]
+	ldr	r3, [sp, #40]
+	add	r3, r3, r2
+	ldr	r2, .L2446+20
+	ldrb	r1, [r2, #9]	@ zero_extendqisi2
+	ldr	r2, [sp, #60]
+	mla	r0, r0, r2, r3
+	bl	__aeabi_uidiv
+	ldr	r3, .L2446+24
+	mov	r8, r0
+	ldr	r0, [sp, #56]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r3, [sp, #76]
+	bl	nandc_bch_sel
+.L2367:
+	str	r7, [sp]
+	add	r3, sp, #80
+	mov	r2, r5
+	mov	r1, r8
+	movs	r0, #0
+	bl	flash_read_page
+	adds	r0, r0, #1
+	bne	.L2368
+	ldr	r3, .L2446+28
+	ldrb	fp, [r3]	@ zero_extendqisi2
+	cmp	fp, #0
+	bne	.L2369
+.L2372:
+	ldr	r3, .L2446+32
+	ldr	fp, [r3]
+	cmp	fp, #0
+	bne	.L2370
+.L2371:
+	ldr	r3, .L2446+36
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2374
+	str	r7, [sp]
+	add	r3, sp, #80
+	mov	r2, r5
+	mov	r1, r8
+	movs	r0, #0
+	bl	flash_ddr_tuning_read
+	adds	r0, r0, #1
+	bne	.L2368
+.L2374:
+	ldr	r3, [sp, #56]
+	cmp	r3, #16
+	bne	.L2375
+	mov	r8, #-1
+.L2376:
+	ldr	r0, [sp, #76]
+	bl	nandc_bch_sel
+	ldr	r3, [sp, #48]
+	cmp	r8, #0
+	it	ne
+	movne	r3, #-1
+	str	r3, [sp, #48]
+	ldr	r3, [sp, #64]
+	cmp	r10, r3
+	bne	.L2378
+	cmp	r4, #0
+	bne	.L2378
+	ldr	r3, [sp, #48]
+	cmp	r3, #0
+	bne	.L2378
+	ldr	r2, [r5]
+	ldr	r3, .L2446+40
+	cmp	r2, r3
+	bne	.L2378
+	ldr	r3, [sp, #52]
+	ldr	r2, [sp, #44]
+	ldrb	r7, [r5, #17]	@ zero_extendqisi2
+	add	r3, r3, r2
+	str	r3, [sp, #52]
+.L2379:
+	ldr	r3, [sp, #44]
+	add	r3, r3, r4
+	uxth	r4, r3
+	b	.L2364
+.L2365:
+	ldr	r3, .L2446+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L2366
+	lsls	r0, r0, #1
+	b	.L2366
+.L2369:
+	ldr	r3, .L2446+28
+	movs	r0, #0
+	mov	r2, r5
+	mov	r1, r8
+	strb	r0, [r3]
+	add	r3, sp, #80
+	str	r7, [sp]
+	bl	flash_read_page
+	ldr	r3, .L2446+28
+	adds	r0, r0, #1
+	strb	fp, [r3]
+	beq	.L2372
+.L2368:
+	mov	r8, #0
+	b	.L2376
+.L2370:
+	str	r7, [sp]
+	add	r3, sp, #80
+	mov	r2, r5
+	mov	r1, r8
+	movs	r0, #0
+	blx	fp
+	adds	r0, r0, #1
+	beq	.L2371
+	b	.L2368
+.L2375:
+	movs	r0, #16
+	bl	nandc_bch_sel
+	movs	r3, #16
+	str	r3, [sp, #56]
+	b	.L2367
+.L2378:
+	ldr	r3, [sp, #44]
+	add	r5, r5, r3, lsl #9
+	movs	r3, #0
+	str	r3, [sp, #40]
+	b	.L2379
+.L2384:
+	ldr	r2, [r0, r4, lsl #2]
+	ldr	r3, [r6, r4, lsl #2]
+	cmp	r2, r3
+	beq	.L2383
+	mov	r2, #512
+	movs	r1, #0
+	bl	ftl_memset
+	mov	r1, r4
+	ldr	r0, .L2446+44
 	bl	printf
-	mov	r0, r6
-	movs	r6, #0
-	movs	r2, #0
-	add	r1, sp, #36
-	bl	pm_log2phys
-.L2525:
-	adds	r3, r7, r6
-	ldr	r1, [r3, #4]
-	cbz	r1, .L2524
-	ldrh	r3, [r7, r6]
-	ldr	r2, [sp, #24]
-	cmp	r3, r2
-	bne	.L2524
-	mov	r3, #4096
-	movs	r2, #4
-	mov	r0, fp
-	bl	rknand_print_hex
-.L2524:
-	adds	r6, r6, #8
-	cmp	r6, #256
-	bne	.L2525
-	b	.L2522
-.L2543:
+	mov	r1, r10
+	movs	r0, #0
+	bl	flash_erase_block
+.L2346:
+	ldr	r3, [sp, #24]
+	adds	r3, r3, #1
+	cmp	r3, #4
+	str	r3, [sp, #24]
+	bne	.L2386
+.L2389:
+	ldrb	r2, [sp, #20]	@ zero_extendqisi2
+	movs	r0, #0
+	ldr	r3, .L2446+48
+	strb	r2, [r3]
+	movs	r2, #2
+	ldr	r3, .L2446+52
+	strb	r2, [r3]
+	bl	zftl_flash_enter_slc_mode
+	ldr	r3, [sp, #12]
+	cbnz	r3, .L2341
+	mov	r1, r3
+	ldr	r0, .L2446+56
+	bl	printf
+.L2341:
+	ldr	r4, .L2446+60
+	movs	r5, #0
+	ldr	r3, .L2446+64
+	ldr	r0, [r4]
+	str	r5, [r3]
+	cbz	r0, .L2388
+	bl	free
+	str	r5, [r4]
+.L2388:
+	ldr	r4, .L2446+68
+	ldr	r0, [r4]
+	cmp	r0, #0
+	beq	.L2338
+	bl	free
+	movs	r0, #0
+	str	r0, [r4]
+	b	.L2327
+.L2383:
+	adds	r4, r4, #1
+	b	.L2382
+.L2447:
 	.align	2
-.L2542:
-	.word	.LC127
-	.word	.LC128
-	.word	.LANCHOR93
-	.word	.LC129
-	.word	.LC130
-	.word	.LANCHOR47
-	.word	.LANCHOR45
-	.word	.LC132
+.L2446:
+	.word	.LANCHOR3
+	.word	.LANCHOR19
+	.word	.LANCHOR28
+	.word	.LANCHOR1
+	.word	.LANCHOR17
+	.word	.LANCHOR31
+	.word	.LANCHOR44
+	.word	.LANCHOR46
+	.word	.LANCHOR162
+	.word	.LANCHOR21
+	.word	1179535694
 	.word	.LC131
-	.size	ftl_scan_all_data, .-ftl_scan_all_data
-	.section	.text.gc_recovery,"ax",%progbits
+	.word	.LANCHOR0
+	.word	.LANCHOR32
+	.word	.LC132
+	.word	.LANCHOR135
+	.word	.LANCHOR136
+	.word	.LANCHOR137
+	.size	idb_write_data, .-idb_write_data
+	.section	.text.flash_start_tlc_page_prog,"ax",%progbits
 	.align	1
-	.global	gc_recovery
+	.global	flash_start_tlc_page_prog
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	gc_recovery, %function
-gc_recovery:
-	@ args = 0, pretend = 0, frame = 32
+	.type	flash_start_tlc_page_prog, %function
+flash_start_tlc_page_prog:
+	@ args = 12, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r4, #0
-	ldr	r3, .L2603
-	sub	sp, sp, #64
-	ldr	r7, .L2603+4
-	strb	r4, [r3]
-	ldr	r3, .L2603+8
-	ldr	r5, [r7]
-	strb	r4, [r3]
-	bl	gc_init
-	ldrh	r6, [r5, #80]
-	movw	r3, #65535
-	cmp	r6, r3
-	beq	.L2545
-	ldr	r2, [r7]
-	movs	r0, #1
-	ldr	r6, .L2603+12
-	strh	r3, [r2, #130]	@ movhi
-	bl	buf_alloc
-	ldrb	r3, [r5, #89]	@ zero_extendqisi2
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	fp, r3
+	ldr	r3, .L2454
+	add	r5, sp, #40
 	mov	r4, r0
-	add	r3, r5, r3, lsl #1
-	ldrh	r2, [r3, #94]
-	ldr	r3, .L2603+16
-	ldrh	r3, [r3]
-	muls	r3, r2, r3
-	ldrb	r2, [r6]	@ zero_extendqisi2
-	cmp	r2, #3
-	str	r3, [sp, #56]
-	bne	.L2546
-	ldr	r2, .L2603+20
-	ldrh	r2, [r2]
-	subs	r2, r2, #1
-	add	r3, r3, r2
-	orr	r3, r3, #50331648
-.L2598:
-	str	r3, [r4, #24]
-.L2547:
-	movs	r1, #1
-	mov	r0, r4
-	bl	sblk_read_page
-	ldr	r3, [r4, #36]
-	adds	r2, r3, #1
-	beq	.L2548
-	cmp	r3, #512
-	beq	.L2548
-	ldr	r3, [r4, #12]
-	ldr	r2, [r3]
-	ldr	r3, .L2603+24
-	cmp	r2, r3
-	beq	.L2549
-.L2548:
-	mov	r0, r4
-	bl	buf_free
-	ldr	r2, [r4, #12]
-	ldr	r3, [r4, #4]
-	ldr	r0, .L2603+28
-	ldr	r1, [r2, #12]
-	str	r1, [sp, #24]
-	ldr	r1, [r2, #8]
-	str	r1, [sp, #20]
-	ldr	r1, [r2, #4]
-	str	r1, [sp, #16]
-	ldr	r2, [r2]
-	str	r2, [sp, #12]
-	ldr	r2, [r3, #12]
-	str	r2, [sp, #8]
-	ldr	r2, [r3, #8]
-	str	r2, [sp, #4]
-	ldr	r2, [r3, #4]
-	str	r2, [sp]
-	ldr	r2, [r4, #36]
-	ldr	r3, [r3]
-	ldr	r1, [r4, #24]
-	movs	r4, #0
+	mov	r6, r1
+	mov	r7, r2
+	ldm	r5, {r5, r8, r10}
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, fp
+	bhi	.L2449
+	movw	r2, #726
+	ldr	r1, .L2454+4
+	ldr	r0, .L2454+8
 	bl	printf
-	ldr	r3, .L2603+32
-	ldrh	r2, [r5, #80]
+.L2449:
+	ldr	r3, .L2454+12
+	ldrb	fp, [r3, fp]	@ zero_extendqisi2
+	ldr	r3, .L2454+16
+	mov	r0, fp
 	ldr	r3, [r3]
-	strh	r4, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, [r7]
-.L2602:
-	ldrh	r2, [r5, #80]
-	strh	r2, [r3, #130]	@ movhi
-.L2550:
-	mov	r2, r4
-	ldrh	r1, [r5, #80]
-	movw	r4, #65535
-	ldr	r0, .L2603+36
-	bl	printf
-	strh	r4, [r5, #80]	@ movhi
-	bl	pm_flush
-	bl	ftl_ext_info_flush
-	ldr	r3, .L2603+4
-	ldr	r2, [r3]
-	ldrh	r0, [r2, #130]
-	cmp	r0, r4
-	mov	r4, r3
-	beq	.L2579
-	bl	ftl_free_sblk
-.L2579:
-	ldr	r3, .L2603+40
-	movs	r0, #0
-	ldr	r2, [r3]
-	movw	r3, #65535
-	strh	r3, [r2, #126]	@ movhi
+	lsl	fp, fp, #8
+	str	r3, [sp, #4]
+	bl	nandc_cs
+	ldr	r3, [sp, #4]
+	cbz	r4, .L2450
+	add	r2, r3, fp
+	str	r4, [r2, #2056]
+.L2450:
+	add	fp, fp, r3
+	movs	r3, #128
+	str	r6, [fp, #2056]
+	str	r3, [fp, #2056]
+	movs	r3, #0
+	str	r3, [fp, #2052]
+	str	r3, [fp, #2052]
+	uxtb	r3, r5
+	str	r3, [fp, #2052]
+	lsrs	r3, r5, #8
+	str	r3, [fp, #2052]
+	lsrs	r3, r5, #16
+	add	r5, r5, r5, lsl #1
+	str	r3, [fp, #2052]
+	subs	r0, r5, #1
+	add	r0, r0, r6
+	bl	nandc_set_seed
+	ldr	r1, .L2454+20
+	mov	r3, r10
+	mov	r2, r8
+	movs	r0, #1
+	ldrb	r1, [r1, #9]	@ zero_extendqisi2
+	bl	nandc_xfer_start
+	bl	nandc_xfer_done
+	str	r7, [fp, #2056]
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	nandc_de_cs.constprop.29
+.L2455:
+	.align	2
+.L2454:
+	.word	.LANCHOR18
+	.word	.LANCHOR170
+	.word	.LC0
+	.word	.LANCHOR30
+	.word	.LANCHOR13
+	.word	.LANCHOR31
+	.size	flash_start_tlc_page_prog, .-flash_start_tlc_page_prog
+	.section	.text.queue_tlc_prog_cmd,"ax",%progbits
+	.align	1
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	queue_tlc_prog_cmd, %function
+queue_tlc_prog_cmd:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, lr}
+	mov	r4, r0
+	ldr	r3, [r0]
+	movs	r1, #1
+	ldr	r2, [r3, #12]
+	ldr	r5, [r3, #24]
+	ldrb	r0, [r3, #44]	@ zero_extendqisi2
+	str	r2, [sp, #8]
+	movs	r2, #26
+	ldr	r3, [r3, #4]
+	ubfx	r6, r5, #0, #21
+	ubfx	r5, r5, #21, #3
+	str	r6, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r5
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldm	r4, {r2, r3}
+	movs	r1, #2
+	ldrb	r0, [r2, #44]	@ zero_extendqisi2
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	movs	r2, #26
+	ldr	r3, [r3, #4]
+	str	r6, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r5
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r4, #8]
+	movs	r1, #3
 	ldr	r2, [r4]
-	strh	r3, [r2, #130]	@ movhi
-	bl	ftl_info_flush
-.L2544:
-	add	sp, sp, #64
+	ldrb	r0, [r2, #44]	@ zero_extendqisi2
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	movs	r2, #16
+	ldr	r3, [r3, #4]
+	str	r6, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r5
+	bl	flash_start_tlc_page_prog
+	ldr	r1, [r4]
+	movs	r3, #4
+	ldr	r0, .L2457
+	strb	r3, [r1, #42]
+	movs	r3, #1
+	strb	r3, [r1, #43]
+	movs	r3, #255
+	strb	r3, [r1]
+	add	sp, sp, #16
 	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2546:
-	cmp	r2, #2
-	bne	.L2547
-	ldr	r2, .L2603+20
-	ldrh	r2, [r2]
-	add	r3, r3, r2, lsl #1
-	subs	r3, r3, #1
-	orr	r3, r3, #33554432
-	b	.L2598
-.L2549:
-	ldr	r8, .L2603+68
-	ldr	r7, .L2603+44
-	ldr	fp, .L2603+56
-	ldrh	r3, [r8]
-	ldrb	r2, [r7]	@ zero_extendqisi2
-	ldr	r1, [r4, #4]
-	ldr	r0, [fp]
-	ldr	r10, .L2603+60
-	muls	r2, r3, r2
-	lsls	r2, r2, #2
-	bl	ftl_memcpy
-	ldrh	r3, [r8]
-	ldrb	r2, [r7]	@ zero_extendqisi2
-	ldr	r1, [r4, #4]
-	ldr	r0, [r10]
-	muls	r2, r3, r2
-	lsls	r2, r2, #2
-	add	r1, r1, r2
-	bl	ftl_memcpy
-	ldrb	r2, [r7]	@ zero_extendqisi2
-	ldrh	r3, [r8]
-	ldr	r1, [fp]
-	ldr	r0, .L2603+48
-	muls	r3, r2, r3
-	movs	r2, #4
-	bl	rknand_print_hex
-	ldrb	r2, [r7]	@ zero_extendqisi2
-	ldrh	r3, [r8]
-	ldr	r1, [r10]
-	ldr	r0, .L2603+52
-	muls	r3, r2, r3
-	movs	r2, #4
-	bl	rknand_print_hex
-	ldr	r3, .L2603+20
-	ldrh	fp, [r3]
-	ldrb	r3, [r6]	@ zero_extendqisi2
-	cmp	r3, #2
-	itt	eq
-	moveq	r3, #1
-	lsleq	fp, fp, #1
-	str	r3, [sp, #44]
-	movs	r3, #0
-	mov	r10, r3
-	str	r3, [sp, #36]
-.L2553:
-	ldr	r3, [sp, #36]
-	cmp	r3, fp
-	beq	.L2562
-	mov	r8, #0
-	b	.L2563
-.L2559:
-	ldr	r3, [sp, #40]
-	ldrh	r2, [r3, #96]
-	ldr	r3, .L2603+16
-	ldrh	r3, [r3]
-	muls	r3, r2, r3
-	ldr	r2, .L2603+12
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	str	r3, [sp, #56]
-	cmp	r2, #3
-	bne	.L2554
-	ldr	r2, [sp, #36]
-	add	r3, r3, r2
-	orr	r3, r3, r7, lsl #24
-.L2600:
-	str	r3, [r4, #24]
+	pop	{r4, r5, r6, lr}
+	b	buf_add_tail
+.L2458:
+	.align	2
+.L2457:
+	.word	.LANCHOR54
+	.size	queue_tlc_prog_cmd, .-queue_tlc_prog_cmd
+	.section	.text.sblk_tlc_prog_one_page,"ax",%progbits
+	.align	1
+	.global	sblk_tlc_prog_one_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sblk_tlc_prog_one_page, %function
+sblk_tlc_prog_one_page:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, [r0]
+	push	{r4, r5, r6, lr}
+	mov	r5, r0
+	ldr	r6, [r3, #24]
+.L2460:
 	movs	r1, #1
+	mov	r0, r6
+	bl	queue_lun_state
+	mov	r4, r0
+	cbnz	r0, .L2461
+	mov	r0, r5
+	bl	queue_tlc_prog_cmd
 	mov	r0, r4
-	bl	sblk_read_page
-	ldr	r3, .L2603+56
-	ldr	r2, [r4, #12]
-	ldr	r3, [r3]
-	ldr	r1, [r2, #4]
-	ldr	r3, [r3, r6]
-	cmp	r3, r1
-	bne	.L2557
-	ldr	r0, .L2603+60
-	ldr	r0, [r0]
-	ldr	ip, [r0, r6]
-	ldr	r0, [r2, #8]
-	cmp	ip, r0
-	beq	.L2558
-.L2557:
-	ldr	r0, [r2, #12]
-	str	r0, [sp, #16]
-	ldr	r0, [r2, #8]
-	str	r1, [sp, #8]
-	str	r0, [sp, #12]
-	ldr	r2, [r2]
-	ldr	r0, .L2603+64
-	str	r2, [sp, #4]
-	ldr	r2, .L2603+60
-	ldr	r2, [r2]
-	ldr	r2, [r2, r6]
-	str	r2, [sp]
-	ldr	r2, [r4, #36]
-	ldr	r1, [r4, #24]
-	bl	printf
-	ldr	r3, .L2603+56
-	ldr	r3, [r3]
-	ldr	r3, [r3, r6]
-	adds	r3, r3, #1
-	beq	.L2558
-	mov	r0, r4
-	movs	r4, #0
-	bl	buf_free
-	ldr	r3, .L2603+32
-	ldrh	r2, [r5, #80]
-	ldr	r3, [r3]
-	strh	r4, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L2603+4
-	ldr	r3, [r3]
-	b	.L2602
-.L2554:
-	cmp	r2, #2
-	ldr	r2, [sp, #36]
-	itett	eq
-	addeq	r2, r2, #-1
-	addne	r3, r3, r2
-	addeq	r3, r3, r2
-	addeq	r3, r3, r7
-	it	eq
-	orreq	r3, r3, #33554432
-	b	.L2600
-.L2558:
-	add	r10, r10, #1
-	adds	r7, r7, #1
-	adds	r6, r6, #4
-.L2561:
-	ldr	r3, [sp, #44]
-	cmp	r3, r7
-	bcs	.L2559
-	add	r8, r8, #1
-.L2563:
-	ldrb	r3, [r5, #89]	@ zero_extendqisi2
-	cmp	r8, r3
-	bge	.L2560
-	add	r3, r5, r8, lsl #1
-	lsl	r6, r10, #2
-	str	r3, [sp, #40]
-	movs	r7, #1
-	b	.L2561
-.L2560:
-	ldr	r3, [sp, #36]
-	adds	r3, r3, #1
-	str	r3, [sp, #36]
-	b	.L2553
-.L2562:
-	mov	r0, r4
-	movs	r4, #0
-	bl	buf_free
-	ldr	r3, .L2603+32
-	mov	r6, r4
-	ldr	r0, .L2603+68
-	ldrh	r1, [r5, #80]
-	ldr	r2, [r3]
-	ldrh	r0, [r0]
-	ldrb	r3, [r5, #89]	@ zero_extendqisi2
-	str	r4, [sp, #40]
-	smulbb	r3, r3, r0
-	strh	r3, [r2, r1, lsl #1]	@ movhi
-.L2564:
-	ldr	r3, [sp, #36]
-	cmp	r3, r6
-	beq	.L2577
-	mov	fp, #0
-	b	.L2578
-.L2604:
-	.align	2
-.L2603:
-	.word	.LANCHOR67
-	.word	.LANCHOR60
-	.word	.LANCHOR104
-	.word	.LANCHOR64
-	.word	.LANCHOR75
-	.word	.LANCHOR79
-	.word	-178307901
-	.word	.LC133
-	.word	.LANCHOR56
-	.word	.LC138
-	.word	.LANCHOR46
-	.word	.LANCHOR69
-	.word	.LC134
-	.word	.LC135
-	.word	.LANCHOR107
-	.word	.LANCHOR108
-	.word	.LC136
-	.word	.LANCHOR68
-.L2574:
-	ldr	r3, .L2605
-	ldr	r2, [sp, #40]
-	ldr	r3, [r3]
-	ldr	r10, [r3, r2, lsl #2]
-	cmp	r10, #-1
-	beq	.L2565
-	ldr	r3, .L2605+4
-	mov	r0, r10
-	ldr	r3, [r3]
-	ldr	r3, [r3, r2, lsl #2]
-	str	r3, [sp, #48]
-	bl	lpa_hash_get_ppa
-	str	r0, [sp, #60]
-	adds	r0, r0, #1
-	bne	.L2566
-	movs	r2, #0
-	add	r1, sp, #60
-	mov	r0, r10
-	bl	pm_log2phys
-.L2566:
-	ldr	r3, [sp, #52]
-	ldrh	r2, [r3, #96]
-	ldr	r3, .L2605+8
-	ldrh	r3, [r3]
-	muls	r3, r2, r3
-	ldr	r2, .L2605+12
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cmp	r2, #3
-	bne	.L2567
-	add	r3, r3, r6
-	orr	r3, r3, r8, lsl #24
-.L2601:
-	str	r3, [sp, #56]
-	movs	r2, #1
-	ldr	r3, .L2605+16
-	ldrh	r0, [r3]
-	rsb	r3, r0, #21
-	lsl	r3, r2, r3
-	ldr	r2, [sp, #48]
-	subs	r3, r3, #1
-	lsr	r0, r2, r0
-	ldr	r2, .L2605+20
-	ands	r0, r0, r3
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	bl	__aeabi_uidiv
-	ldr	r2, [sp, #48]
-	mov	r7, r0
-	ldr	r3, [sp, #60]
-	cmp	r2, r3
-	ldr	r2, [sp, #56]
-	bne	.L2570
-	mov	r1, r10
-	ldr	r0, .L2605+24
-	bl	pm_ppa_update_check
-	cbz	r0, .L2571
-.L2597:
-	b	.L2597
-.L2567:
-	cmp	r2, #2
-	itett	eq
-	addeq	r2, r6, #-1
-	addne	r3, r3, r6
-	addeq	r3, r3, r2
-	addeq	r3, r3, r8
-	it	eq
-	orreq	r3, r3, #33554432
-	b	.L2601
-.L2571:
-	movs	r2, #1
-	add	r1, sp, #56
-	mov	r0, r10
-	adds	r4, r4, #1
-	bl	pm_log2phys
-	uxth	r0, r7
-	bl	ftl_vpn_decrement
-.L2573:
-	ldr	r3, [sp, #40]
-	uxth	r7, r7
-	adds	r3, r3, #1
-	str	r3, [sp, #40]
-	ldr	r3, .L2605+28
-	ldr	r3, [r3]
-	add	r3, r3, r7, lsl #2
-	ldrb	r3, [r3, #2]	@ zero_extendqisi2
-	ands	r3, r3, #224
-	bne	.L2565
-	ldr	r2, .L2605+32
-	ldr	r2, [r2]
-	ldrh	r1, [r2, r7, lsl #1]
-	cbz	r1, .L2565
-	strh	r3, [r2, r7, lsl #1]	@ movhi
-.L2565:
-	add	r8, r8, #1
-.L2576:
-	ldr	r3, [sp, #44]
-	cmp	r3, r8
-	bcs	.L2574
-	add	fp, fp, #1
-.L2578:
-	ldrb	r3, [r5, #89]	@ zero_extendqisi2
-	cmp	fp, r3
-	bge	.L2575
-	add	r3, r5, fp, lsl #1
-	mov	r8, #1
-	str	r3, [sp, #52]
-	b	.L2576
-.L2570:
-	cmp	r3, r2
-	it	eq
-	addeq	r4, r4, #1
-	b	.L2573
-.L2575:
-	adds	r6, r6, #1
-	b	.L2564
-.L2577:
-	ldr	r3, .L2605+32
-	ldrh	r2, [r5, #80]
-	ldr	r3, [r3]
-	strh	r4, [r3, r2, lsl #1]	@ movhi
-	b	.L2550
-.L2545:
-	ldr	r3, [r7]
-	ldrh	r3, [r3, #130]
-	cmp	r3, r6
-	beq	.L2544
-	ldr	r5, .L2605+36
-	ldr	r2, [r5]
-	ldrh	r2, [r2, #126]
-	cmp	r2, r3
-	bne	.L2581
-	bl	pm_flush
-	ldr	r3, [r7]
-	ldrh	r0, [r3, #130]
-	bl	ftl_free_sblk
-	ldr	r3, [r5]
-	mov	r0, r4
-	strh	r6, [r3, #126]	@ movhi
-	bl	ftl_info_flush
-.L2581:
-	ldr	r3, [r7]
-	movw	r2, #65535
-	strh	r2, [r3, #130]	@ movhi
-	b	.L2544
-.L2606:
-	.align	2
-.L2605:
-	.word	.LANCHOR107
-	.word	.LANCHOR108
-	.word	.LANCHOR75
-	.word	.LANCHOR64
-	.word	.LANCHOR71
-	.word	.LANCHOR70
-	.word	.LC137
-	.word	.LANCHOR57
-	.word	.LANCHOR56
-	.word	.LANCHOR46
-	.size	gc_recovery, .-gc_recovery
-	.section	.text.ftl_init,"ax",%progbits
+	pop	{r4, r5, r6, pc}
+.L2461:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L2460
+	.size	sblk_tlc_prog_one_page, .-sblk_tlc_prog_one_page
+	.section	.text.sblk_xlc_prog_pages,"ax",%progbits
 	.align	1
-	.global	ftl_init
+	.global	sblk_xlc_prog_pages
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_init, %function
-ftl_init:
-	@ args = 0, pretend = 0, frame = 16
+	.type	sblk_xlc_prog_pages, %function
+sblk_xlc_prog_pages:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r3, #255
-	ldr	r2, .L2619
-	movs	r5, #0
-	ldr	r6, .L2619+4
-	strb	r3, [r2]
-	ldr	r2, .L2619+8
-	ldr	r1, .L2619+12
-	ldr	r0, .L2619+16
-	strb	r5, [r2]
-	ldr	r2, .L2619+20
-	ldr	r8, .L2619+144
-	ldr	r7, .L2619+24
-	strb	r3, [r2]
-	mov	r2, #-1
-	ldr	r3, .L2619+28
-	strb	r5, [r3]
-	ldr	r3, .L2619+32
-	str	r2, [r3]
-	bl	printf
-	ldrb	r1, [r6, #12]	@ zero_extendqisi2
-	ldr	r3, .L2619+36
-	ldrb	r2, [r6, #9]	@ zero_extendqisi2
-	ldrh	r10, [r6, #10]
-	strb	r1, [r3]
-	ldr	r3, .L2619+40
-	mov	r0, r10
-	str	r2, [sp, #4]
-	strb	r2, [r3]
-	ldr	r3, .L2619+44
-	strh	r10, [r3]	@ movhi
-	bl	__aeabi_idiv
-	ldr	r1, .L2619+48
-	mov	r3, r0
-	strh	r0, [r8]	@ movhi
-	ldr	r0, .L2619+52
-	ldrb	r4, [r1]	@ zero_extendqisi2
-	ldr	r1, .L2619+56
-	ldr	r2, [sp, #4]
-	ldr	ip, .L2619+148
-	strb	r4, [r1]
-	ldrb	r1, [r6, #13]	@ zero_extendqisi2
-	lsl	fp, r2, #9
-	ldrh	r6, [r6, #14]
-	str	ip, [sp, #4]
-	strb	r1, [r0]
-	uxth	fp, fp
-	smulbb	r4, r4, r1
-	ldr	r1, .L2619+60
-	ldr	r0, .L2619+64
-	strh	r6, [ip]	@ movhi
-	ldrh	lr, [r1]
-	uxtb	r4, r4
-	ldr	r1, .L2619+68
-	strb	r4, [r7]
-	strh	fp, [r0]	@ movhi
-	strh	lr, [r1]	@ movhi
+	ldr	r3, [r0]
+	push	{r4, r5, r6, r7, r8, r10, lr}
+	mov	r4, r0
+	sub	sp, sp, #20
+	mov	r7, r1
+	mov	r10, r2
+	ldr	r5, [r3, #24]
+.L2463:
 	movs	r1, #1
-	str	r0, [sp, #8]
-.L2608:
-	cmp	lr, r1
-	uxth	r0, r5
-	add	r5, r5, #1
-	bcs	.L2609
-	mul	r10, r10, r2
-	subs	r1, r0, #1
-	ldr	r0, .L2619+72
-	mov	r5, #1892352
-	muls	r5, r4, r5
-	str	r3, [sp, #12]
-	strh	r1, [r0]	@ movhi
-	mul	r1, r6, r10
-	lsrs	r0, r1, #21
-	muls	r1, r4, r1
-	muls	r5, r0, r5
-	ldr	r0, .L2619+76
-	str	r5, [r0]
-	add	r5, r5, #24576
-	ldr	r0, .L2619+80
-	str	r1, [r0]
-	mov	r0, r5
-	ldr	r1, .L2619+84
-	str	r5, [r1]
-	mov	r1, r2
-	bl	__aeabi_uidiv
-	ldr	r2, .L2619+88
-	mov	r1, fp
-	str	r0, [r2]
-	add	r2, fp, #-1
-	add	r0, r2, r0, lsl #2
-	ldr	fp, .L2619+152
-	bl	__aeabi_uidiv
-	ldr	r3, [sp, #12]
-	strh	r0, [fp]	@ movhi
-	uxth	r0, r0
-	lsls	r0, r0, #4
-	mul	r1, r4, r3
-	bl	__aeabi_idiv
-	ldr	r3, .L2619+92
-	mul	r1, r4, r10
-	strh	r0, [r3]	@ movhi
 	mov	r0, r5
-	bl	__aeabi_uidiv
-	ldr	r3, .L2619+96
-	adds	r0, r0, #2
-	ldr	r2, .L2619+100
-	ldr	r5, .L2619+104
-	strh	r0, [r3]	@ movhi
-	add	r3, r6, r6, lsl #1
-	lsrs	r6, r6, #4
-	asrs	r3, r3, #2
-	strh	r3, [r2]	@ movhi
-	ldr	r3, .L2619+108
-	strh	r6, [r3]	@ movhi
-	bl	buf_init
-	ldrh	r3, [r8]
-	ldrb	r0, [r7]	@ zero_extendqisi2
-	muls	r0, r3, r0
-	lsls	r0, r0, #2
-	bl	ftl_malloc
-	ldr	r3, .L2619+112
-	ldrb	r1, [r7]	@ zero_extendqisi2
-	ldr	r2, .L2619+116
-	str	r0, [r3]
-	ldrh	r0, [r8]
-	ldr	r3, .L2619+120
-	muls	r0, r1, r0
-	ldr	r1, .L2619+124
-	str	r2, [r3]
-	add	r3, r2, r0, lsl #3
-	str	r3, [r1]
-	ldr	r1, [sp, #4]
-	ldrh	r1, [r1]
-	lsrs	r1, r1, #1
-	add	r1, r1, r0, lsl #1
-	ldr	r0, .L2619+128
-	add	r1, r2, r1, lsl #2
-	str	r1, [r5]
-	bl	printf
-	ldrh	r2, [r8]
-	ldrb	r4, [r7]	@ zero_extendqisi2
-	ldr	r3, [sp, #4]
-	ldr	r0, .L2619+132
-	ldrh	r3, [r3]
-	muls	r4, r2, r4
-	ldrh	r2, [fp]
-	add	r4, r3, r4, lsl #2
-	lsls	r6, r3, #2
-	ldr	r3, [sp, #8]
-	add	r6, r6, r2, lsl #2
-	lsls	r4, r4, #1
-	add	r6, r6, #704
-	add	r4, r4, #600
-	ldrh	r3, [r3]
-	mov	r2, r6
-	mov	r1, r4
-	bl	printf
-	ldr	r3, [sp, #8]
-	ldrh	r3, [r3]
-	cmp	r4, r3
-	bhi	.L2610
-	cmp	r6, r3
-	bls	.L2611
-.L2610:
-.L2618:
-	b	.L2618
-.L2609:
-	lsls	r1, r1, #1
-	b	.L2608
-.L2611:
-	bl	sblk_init
-	bl	ftl_info_blk_init
-	adds	r3, r0, #1
-	beq	.L2607
-	bl	ftl_ext_info_init
-	movs	r0, #1
-	ldr	r4, .L2619+136
-	bl	pm_init
-	bl	lpa_rebuild_hash
-	ldr	r0, [r5]
-	movs	r1, #0
-	adds	r0, r0, #16
-	bl	ftl_open_sblk_recovery
-	ldr	r0, [r5]
-	add	r1, r0, #16
-	adds	r0, r0, #48
-	bl	ftl_open_sblk_recovery
+	bl	queue_lun_state
+	cmp	r0, #0
+	bne	.L2464
+	cmp	r10, #2
+	bne	.L2465
+	ldr	r2, [r7]
+	movs	r1, #1
+	ldr	r3, [r4]
+	ldr	r6, [r2, #24]
+	ldr	r2, [r3, #12]
+	ldr	r5, [r3, #24]
+	ldrb	r0, [r3, #44]	@ zero_extendqisi2
+	ubfx	r6, r6, #0, #21
+	str	r2, [sp, #8]
+	movs	r2, #17
+	ldr	r3, [r3, #4]
+	ubfx	r8, r5, #0, #21
+	ubfx	r5, r5, #21, #3
+	str	r8, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r5
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r7]
+	movs	r1, #1
 	ldr	r2, [r4]
-	ldr	r0, [r5]
-	ldr	r3, [r2, #8]
-	adds	r0, r0, #16
-	adds	r3, r3, #16
-	str	r3, [r2, #8]
-	bl	ftl_info_data_recovery
-	ldr	r0, [r5]
-	adds	r0, r0, #48
-	bl	ftl_info_data_recovery
-	ldr	r0, [r5]
-	adds	r0, r0, #80
-	bl	ftl_info_data_recovery
-	bl	gc_recovery
-	bl	ftl_info_check
-	bl	pm_flush
-	movs	r0, #1
-	bl	ftl_total_vpn_update
-	ldr	r3, .L2619+140
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2613
+	ldrb	r0, [r2, #44]	@ zero_extendqisi2
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	movs	r2, #26
+	ldr	r3, [r3, #4]
+	str	r6, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r5
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldm	r4, {r2, r3}
+	mov	r1, r10
+	ldrb	r0, [r2, #44]	@ zero_extendqisi2
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	movs	r2, #17
+	ldr	r3, [r3, #4]
+	str	r8, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r5
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r7, #4]
+	mov	r1, r10
 	ldr	r2, [r4]
-	ldr	r3, [r2, #68]
-	adds	r3, r3, #1
-	str	r3, [r2, #68]
-.L2613:
-	bl	ftl_ext_info_flush
-	movs	r0, #0
-	bl	ftl_info_flush
-	bl	print_ftl_debug_info
+	ldrb	r0, [r2, #44]	@ zero_extendqisi2
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	movs	r2, #26
+	ldr	r3, [r3, #4]
+	str	r6, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r5
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r4, #8]
+	movs	r1, #3
+	ldr	r2, [r4]
+	ldrb	r0, [r2, #44]	@ zero_extendqisi2
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	movs	r2, #17
+	ldr	r3, [r3, #4]
+	str	r8, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r5
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r7, #8]
+	movs	r1, #3
+	ldr	r2, [r4]
+	ldrb	r0, [r2, #44]	@ zero_extendqisi2
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	movs	r2, #16
+	ldr	r3, [r3, #4]
+	str	r6, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r5
+	bl	flash_start_tlc_page_prog
+	ldr	r1, [r4]
+	movs	r3, #5
+	ldr	r0, .L2467
+	strb	r3, [r1, #42]
+	movs	r3, #1
+	strb	r3, [r1, #43]
+	movs	r3, #255
+	strb	r3, [r1]
+	bl	buf_add_tail
+.L2466:
 	movs	r0, #0
-.L2607:
-	add	sp, sp, #16
+	add	sp, sp, #20
 	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2620:
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.L2464:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L2463
+.L2465:
+	mov	r0, r4
+	bl	queue_tlc_prog_cmd
+	b	.L2466
+.L2468:
 	.align	2
-.L2619:
-	.word	.LANCHOR42
-	.word	.LANCHOR19
-	.word	.LANCHOR43
-	.word	.LC139
-	.word	.LC32
-	.word	.LANCHOR127
-	.word	.LANCHOR69
-	.word	.LANCHOR89
-	.word	.LANCHOR49
-	.word	.LANCHOR64
-	.word	.LANCHOR45
-	.word	.LANCHOR68
-	.word	.LANCHOR8
-	.word	.LANCHOR70
-	.word	.LANCHOR76
-	.word	.LANCHOR13
-	.word	.LANCHOR149
-	.word	.LANCHOR75
-	.word	.LANCHOR71
-	.word	.LANCHOR52
-	.word	.LANCHOR161
-	.word	.LANCHOR162
-	.word	.LANCHOR47
-	.word	.LANCHOR101
-	.word	.LANCHOR163
-	.word	.LANCHOR164
-	.word	.LANCHOR60
-	.word	.LANCHOR165
-	.word	.LANCHOR83
-	.word	ftl_ext_info_data_buffer
-	.word	.LANCHOR82
-	.word	.LANCHOR56
-	.word	.LC140
-	.word	.LC141
-	.word	.LANCHOR46
-	.word	.LANCHOR133
-	.word	.LANCHOR79
+.L2467:
 	.word	.LANCHOR54
-	.word	.LANCHOR137
-	.size	ftl_init, .-ftl_init
-	.section	.text.rk_ftl_init,"ax",%progbits
+	.size	sblk_xlc_prog_pages, .-sblk_xlc_prog_pages
+	.section	.text.sblk_3d_tlc_dump_prog,"ax",%progbits
 	.align	1
-	.global	rk_ftl_init
+	.global	sblk_3d_tlc_dump_prog
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	rk_ftl_init, %function
-rk_ftl_init:
+	.type	sblk_3d_tlc_dump_prog, %function
+sblk_3d_tlc_dump_prog:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, lr}
-	bl	nand_flash_init
-	mov	r4, r0
-	cbnz	r0, .L2622
-	bl	ftl_init
+	push	{r0, r1, r2, r3, r4, r5, r6, lr}
 	mov	r4, r0
-.L2622:
-	mov	r1, r4
-	ldr	r0, .L2623
+	ldr	r3, [r0, #24]
+	ldr	r0, .L2470
+	ubfx	r5, r3, #0, #21
+	mov	r2, r3
+	mov	r1, r5
+	ubfx	r6, r3, #21, #3
 	bl	printf
-	mov	r0, r4
-	pop	{r4, pc}
-.L2624:
+	ldr	r3, [r4, #12]
+	movs	r2, #26
+	movs	r1, #1
+	str	r5, [sp]
+	movs	r0, #0
+	str	r3, [sp, #8]
+	ldr	r3, [r4, #4]
+	str	r3, [sp, #4]
+	mov	r3, r6
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r4, #12]
+	movs	r2, #26
+	movs	r1, #2
+	str	r5, [sp]
+	movs	r0, #0
+	str	r3, [sp, #8]
+	ldr	r3, [r4, #4]
+	str	r3, [sp, #4]
+	mov	r3, r6
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r4, #12]
+	movs	r2, #16
+	movs	r1, #3
+	str	r5, [sp]
+	movs	r0, #0
+	str	r3, [sp, #8]
+	ldr	r3, [r4, #4]
+	str	r3, [sp, #4]
+	mov	r3, r6
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	movs	r1, #64
+	ldr	r0, [r4, #24]
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, lr}
+	b	flash_wait_device_ready
+.L2471:
 	.align	2
-.L2623:
-	.word	.LC142
-	.size	rk_ftl_init, .-rk_ftl_init
-	.global	__aeabi_idivmod
-	.section	.text.ftl_update_l2p_map,"ax",%progbits
+.L2470:
+	.word	.LC133
+	.size	sblk_3d_tlc_dump_prog, .-sblk_3d_tlc_dump_prog
+	.section	.text.flash_start_3d_mlc_page_prog,"ax",%progbits
 	.align	1
-	.global	ftl_update_l2p_map
+	.global	flash_start_3d_mlc_page_prog
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_update_l2p_map, %function
-ftl_update_l2p_map:
-	@ args = 0, pretend = 0, frame = 24
+	.type	flash_start_3d_mlc_page_prog, %function
+flash_start_3d_mlc_page_prog:
+	@ args = 4, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2650
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #24
-	ldrb	r7, [r0, #9]	@ zero_extendqisi2
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r7, r3
+	ldr	r3, .L2474
 	mov	r6, r0
-	ldrh	r3, [r3]
-	ldr	r2, .L2650+4
-	muls	r7, r3, r7
-	ldr	r4, [r2]
-	ldrh	r3, [r0, #12]
-	str	r2, [sp, #4]
-	add	r4, r4, r3, lsl #2
-	add	r3, r7, #1073741824
-	subs	r3, r3, #1
-	ldr	r3, [r4, r3, lsl #2]
-	adds	r3, r3, #1
-	bne	.L2626
-	movs	r5, #0
-	subs	r4, r4, #4
-	mov	r10, r5
-.L2627:
-	cmp	r10, r7
-	bne	.L2635
-	ldr	r3, .L2650+8
-	ldr	r4, .L2650+12
-	ldr	r3, [r3]
-	tst	r3, #4096
-	beq	.L2636
-	ldrh	r1, [r6]
-	mov	r2, r5
-	ldr	r3, [r4]
-	ldr	r0, .L2650+16
-	ldrh	r3, [r3, r1, lsl #1]
-	bl	printf
-.L2636:
-	ldrh	r2, [r6]
-	ldr	r3, [r4]
-	strh	r5, [r3, r2, lsl #1]	@ movhi
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2626:
-	movw	r2, #882
-	ldr	r1, .L2650+20
-	ldr	r0, .L2650+24
-	bl	printf
-.L2628:
-	b	.L2628
-.L2635:
-	ldr	r8, [r4, #4]!
-	cmp	r8, #-1
-	beq	.L2629
-	ldr	r3, .L2650+28
-	mov	r0, r8
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	lsls	r1, r1, #7
-	bl	__aeabi_uidiv
-	uxth	r3, r0
-	str	r3, [sp]
-	ldr	r3, .L2650+8
-	ldr	r3, [r3]
-	lsls	r2, r3, #19
-	bpl	.L2630
-	mov	r3, r10
-	mov	r2, r8
-	ldr	r1, [sp]
-	ldr	r0, .L2650+32
+	mov	r4, r1
+	mov	r5, r2
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r1
+	bhi	.L2473
+	mov	r2, #756
+	ldr	r1, .L2474+4
+	ldr	r0, .L2474+8
 	bl	printf
-.L2630:
-	mov	r8, r4
-	mov	fp, r10
-.L2634:
-	ldr	r0, [r8]
-	adds	r3, r0, #1
-	beq	.L2631
-	ldr	r3, .L2650+28
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	lsls	r1, r1, #7
-	bl	__aeabi_uidiv
-	ldr	r3, [sp]
-	uxth	r0, r0
-	cmp	r3, r0
-	bne	.L2631
-	ldrb	r3, [r6, #9]	@ zero_extendqisi2
-	mov	r0, fp
-	mov	r1, r3
-	str	r3, [sp, #12]
-	bl	__aeabi_idivmod
-	ldr	r3, .L2650+36
-	adds	r1, r1, #8
-	ldrh	r0, [r6, r1, lsl #1]
-	ldrh	r2, [r3]
-	ldr	r3, [sp, #12]
-	muls	r2, r0, r2
-	mov	r1, r3
-	mov	r0, fp
-	str	r2, [sp, #8]
-	bl	__aeabi_idiv
-	ldr	r2, [sp, #8]
-	add	r2, r2, r0
-	ldr	r0, .L2650+40
-	str	r2, [sp, #20]
-	ldr	r1, [r8]
-	bl	pm_ppa_update_check
-	cbz	r0, .L2632
-	ldr	r1, [sp, #4]
-	mov	r3, r7
-	movs	r2, #4
-	ldr	r0, .L2650+44
-	ldr	r1, [r1]
-	bl	rknand_print_hex
-.L2633:
-	b	.L2633
-.L2632:
-	adds	r5, r5, #1
-	movs	r2, #1
-	uxth	r5, r5
-	add	r1, sp, #20
-	ldr	r0, [r8]
-	bl	pm_log2phys
-	mov	r3, #-1
-	str	r3, [r8]
-.L2631:
-	add	fp, fp, #1
-	add	r8, r8, #4
-	cmp	r7, fp
-	bne	.L2634
-.L2629:
-	add	r10, r10, #1
-	b	.L2627
-.L2651:
+.L2473:
+	ldr	r3, .L2474+12
+	ldrb	r4, [r3, r4]	@ zero_extendqisi2
+	ldr	r3, .L2474+16
+	mov	r0, r4
+	ldr	r8, [r3]
+	bl	nandc_cs
+	movs	r3, #128
+	mov	r0, r5
+	add	r4, r8, r4, lsl #8
+	str	r3, [r4, #2056]
+	movs	r3, #0
+	str	r3, [r4, #2052]
+	str	r3, [r4, #2052]
+	uxtb	r3, r5
+	str	r3, [r4, #2052]
+	lsrs	r3, r5, #8
+	str	r3, [r4, #2052]
+	lsrs	r3, r5, #16
+	str	r3, [r4, #2052]
+	bl	nandc_set_seed
+	ldr	r1, .L2474+20
+	mov	r2, r7
+	ldr	r3, [sp, #24]
+	movs	r0, #1
+	ldrb	r1, [r1, #9]	@ zero_extendqisi2
+	bl	nandc_xfer_start
+	bl	nandc_xfer_done
+	str	r6, [r4, #2056]
+	pop	{r4, r5, r6, r7, r8, pc}
+.L2475:
 	.align	2
-.L2650:
-	.word	.LANCHOR79
-	.word	.LANCHOR82
-	.word	.LANCHOR22
-	.word	.LANCHOR56
-	.word	.LC146
-	.word	.LANCHOR166
+.L2474:
+	.word	.LANCHOR18
+	.word	.LANCHOR171
 	.word	.LC0
-	.word	.LANCHOR45
-	.word	.LC143
-	.word	.LANCHOR75
-	.word	.LC144
-	.word	.LC145
-	.size	ftl_update_l2p_map, .-ftl_update_l2p_map
-	.section	.text.ftl_alloc_new_data_sblk,"ax",%progbits
+	.word	.LANCHOR30
+	.word	.LANCHOR13
+	.word	.LANCHOR31
+	.size	flash_start_3d_mlc_page_prog, .-flash_start_3d_mlc_page_prog
+	.section	.text.sblk_3d_mlc_prog_pages,"ax",%progbits
 	.align	1
-	.global	ftl_alloc_new_data_sblk
+	.global	sblk_3d_mlc_prog_pages
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_alloc_new_data_sblk, %function
-ftl_alloc_new_data_sblk:
+	.type	sblk_3d_mlc_prog_pages, %function
+sblk_3d_mlc_prog_pages:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, lr}
-	mov	r4, r0
-	bl	ftl_update_l2p_map
-	bl	pm_flush
-	ldr	r3, .L2655
+	ldr	r3, [r0]
+	push	{r0, r1, r2, r4, r5, r6, r7, lr}
+	mov	r5, r0
+	ldr	r4, [r3, #24]
+.L2477:
+	movs	r1, #1
 	mov	r0, r4
-	ldr	r1, [r3]
-	adds	r1, r1, #16
-	cmp	r4, r1
-	ite	eq
-	moveq	r1, #2
-	movne	r1, #3
-	bl	ftl_open_sblk_init
-	bl	ftl_ext_info_flush
-	movs	r0, #0
-	bl	ftl_info_flush
-	bl	lpa_rebuild_hash
-	movs	r0, #0
-	pop	{r4, pc}
-.L2656:
+	bl	queue_lun_state
+	mov	r6, r0
+	cbnz	r0, .L2478
+	ldr	r3, [r5]
+	ldr	r4, [r3, #24]
+	ubfx	r7, r4, #0, #21
+	ubfx	r4, r4, #21, #3
+	mov	r0, r4
+	bl	zftl_flash_exit_slc_mode
+	ldr	r3, [r5]
+	mov	r1, r4
+	movs	r0, #16
+	ldr	r2, [r3, #12]
+	str	r2, [sp]
+	mov	r2, r7
+	ldr	r3, [r3, #4]
+	bl	flash_start_3d_mlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r5, #4]
+	mov	r1, r4
+	movs	r0, #16
+	ldr	r2, [r3, #12]
+	str	r2, [sp]
+	adds	r2, r7, #1
+	ldr	r3, [r3, #4]
+	bl	flash_start_3d_mlc_page_prog
+	bl	nandc_de_cs.constprop.29
+	ldr	r1, [r5]
+	movs	r3, #4
+	ldr	r0, .L2479
+	strb	r3, [r1, #42]
+	movs	r3, #1
+	strb	r3, [r1, #43]
+	movs	r3, #255
+	strb	r3, [r1]
+	bl	buf_add_tail
+	mov	r0, r6
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, r6, r7, pc}
+.L2478:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L2477
+.L2480:
 	.align	2
-.L2655:
-	.word	.LANCHOR60
-	.size	ftl_alloc_new_data_sblk, .-ftl_alloc_new_data_sblk
-	.section	.text.ftl_write_commit,"ax",%progbits
+.L2479:
+	.word	.LANCHOR54
+	.size	sblk_3d_mlc_prog_pages, .-sblk_3d_mlc_prog_pages
+	.section	.text.sblk_mlc_dump_prog,"ax",%progbits
 	.align	1
-	.global	ftl_write_commit
+	.global	sblk_mlc_dump_prog
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_write_commit, %function
-ftl_write_commit:
-	@ args = 0, pretend = 0, frame = 24
+	.type	sblk_mlc_dump_prog, %function
+sblk_mlc_dump_prog:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #32
-	ldr	r8, .L2717+24
-.L2658:
-	ldr	r0, .L2717
-	ldrb	r2, [r0]	@ zero_extendqisi2
-	cmp	r2, #0
-	beq	.L2660
-	ldr	r4, .L2717+4
-	movs	r1, #48
-	subs	r2, r2, #1
-	strb	r2, [r0]
-	ldrb	r3, [r4]	@ zero_extendqisi2
-	ldr	r2, .L2717+8
-	str	r3, [sp, #16]
-	add	r3, r3, r3, lsl #1
-	ldr	r2, [r2]
-	add	r3, r8, r3, lsl #4
-	str	r3, [sp, #20]
-	ldr	r3, [sp, #16]
-	muls	r1, r3, r1
-	add	r3, r8, r1
-	ldrb	r1, [r8, r1]	@ zero_extendqisi2
-	ldr	r7, [r3, #20]
-	strb	r1, [r4]
-	cmp	r7, r2
-	bcc	.L2662
-	ldr	r0, [sp, #20]
-	bl	buf_free
-	mov	r0, #-1
-.L2657:
-	add	sp, sp, #32
+	push	{r0, r1, r4, r5, r6, lr}
+	mov	r4, r0
+	ldr	r5, [r0, #24]
+	ubfx	r6, r5, #0, #21
+	ubfx	r5, r5, #21, #3
+	mov	r0, r5
+	bl	zftl_flash_exit_slc_mode
+	ldr	r2, [r4, #24]
+	mov	r1, r6
+	ldr	r0, .L2482
+	adds	r3, r2, #1
+	bl	printf
+	ldr	r3, [r4, #12]
+	mov	r2, r6
+	mov	r1, r5
+	movs	r0, #16
+	str	r3, [sp]
+	ldr	r3, [r4, #4]
+	bl	flash_start_3d_mlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r4, #12]
+	adds	r2, r6, #1
+	mov	r1, r5
+	movs	r0, #16
+	str	r3, [sp]
+	ldr	r3, [r4, #4]
+	bl	flash_start_3d_mlc_page_prog
+	bl	nandc_wait_flash_ready
+	movs	r1, #64
+	ldr	r0, [r4, #24]
+	bl	flash_wait_device_ready
+	bl	nandc_de_cs.constprop.29
+	add	sp, sp, #8
 	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2662:
-	ldr	r2, [r3, #12]
-	ldr	fp, [r3, #4]
-	ldrb	r4, [r3, #41]	@ zero_extendqisi2
-	ldrb	r3, [r3, #40]	@ zero_extendqisi2
-	str	r2, [sp, #8]
-	str	r3, [sp, #12]
-	ldr	r3, .L2717+12
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2664
-	ldr	r3, .L2717+16
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	add	r3, r8, r3, lsl #4
-.L2665:
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	cmp	r2, #255
-	bne	.L2666
-	ldr	r2, [r3, #20]
-	cmp	r7, r2
-	bne	.L2664
-	ldr	r0, [r3, #4]
-	lsls	r4, r4, #9
-	ldr	r3, [sp, #12]
-	add	r1, fp, r4
-	add	r0, r0, r4
-	lsls	r2, r3, #9
-	bl	ftl_memcpy
-	ldr	r0, [sp, #20]
-	bl	buf_free
-	b	.L2658
-.L2666:
-	add	r2, r2, r2, lsl #1
-	add	r3, r8, r2, lsl #4
-	b	.L2665
-.L2664:
-	mov	r0, r7
-	bl	lpa_hash_get_ppa
-	str	r0, [sp, #28]
-	adds	r0, r0, #1
-	bne	.L2668
-	movs	r2, #0
-	add	r1, sp, #28
-	mov	r0, r7
-	bl	pm_log2phys
-.L2668:
-	ldr	r3, .L2717+20
-	ldr	r2, .L2717+24
-	ldr	r0, [r3]
-	movs	r3, #0
-.L2671:
-	ldr	r1, [r2, #20]
-	cmp	r7, r1
-	bne	.L2669
-	ldrb	r1, [r2, #2]	@ zero_extendqisi2
-	lsls	r5, r1, #28
-	bpl	.L2669
-	movs	r2, #48
-	bic	r1, r1, #8
-	mla	r3, r2, r3, r8
-	strb	r1, [r3, #2]
-	ldr	r5, [r3, #4]
-	ldr	r3, [r3, #24]
-	str	r3, [sp, #28]
-.L2670:
-	ldr	r6, .L2717+28
-	ldr	r2, [sp, #12]
-	ldrb	r3, [r6]	@ zero_extendqisi2
-	cmp	r2, r3
-	bcc	.L2672
-	add	r6, r0, #16
-.L2716:
-	mov	r10, #0
-.L2673:
-	ldrh	r3, [r6, #6]
-	cbnz	r3, .L2688
-	bl	ftl_flush
-	mov	r0, r6
-	bl	ftl_alloc_new_data_sblk
-.L2688:
-	mov	r0, r6
-	ldr	r5, .L2717+12
-	bl	ftl_get_new_free_page
-	ldr	r2, [sp, #16]
-	movs	r3, #48
-	ldr	r4, [sp, #8]
-	muls	r3, r2, r3
-	add	r2, r8, r3
-	ldr	r1, [r2, #16]
-	str	r7, [r4, #4]
-	str	r10, [r4, #12]
-	str	r1, [r4]
-	ldr	r1, [sp, #28]
-	str	r1, [r4, #8]
-	str	r1, [r2, #28]
-	movs	r1, #255
-	strb	r1, [r8, r3]
-	ldrb	r3, [r2, #2]	@ zero_extendqisi2
-	ldrh	r1, [r6, #12]
-	str	r0, [r2, #24]
-	orr	r3, r3, #10
-	ldr	r0, .L2717+16
-	strb	r3, [r2, #2]
-	ldrh	r3, [r6, #10]
-	add	r3, r3, r1
-	ldr	r1, [sp, #20]
-	subs	r3, r3, #1
-	strh	r3, [r2, #32]	@ movhi
-	bl	buf_add_tail
-	ldrb	r3, [r5]	@ zero_extendqisi2
-	movs	r1, #0
-	ldr	r2, .L2717+32
-	adds	r3, r3, #1
-	uxtb	r3, r3
-	str	r1, [r2]
-	ldrh	r2, [r6, #6]
-	cmp	r3, #2
-	strb	r3, [r5]
-	bhi	.L2689
-	cmp	r2, #1
-	bne	.L2661
-.L2689:
-	ldr	r7, .L2717+16
-	mov	ip, #48
-	ldrb	r1, [r6, #5]	@ zero_extendqisi2
-	ldrb	r0, [r7]	@ zero_extendqisi2
-	cmp	r1, #0
-	mov	r1, #0
-	ite	ne
-	movne	r4, #2
-	moveq	r4, #1
+	pop	{r4, r5, r6, pc}
+.L2483:
+	.align	2
+.L2482:
+	.word	.LC134
+	.size	sblk_mlc_dump_prog, .-sblk_mlc_dump_prog
+	.section	.text.flash_start_page_prog,"ax",%progbits
+	.align	1
+	.global	flash_start_page_prog
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_start_page_prog, %function
+flash_start_page_prog:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	fp, r2
+	ldr	r2, .L2493
+	ubfx	r7, r1, #21, #3
+	mov	r10, r3
+	ubfx	r5, r1, #0, #21
+	ubfx	r3, r1, #24, #2
+	str	r0, [sp, #4]
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	mov	r8, r2
+	str	r3, [sp]
+	cmp	r1, r7
+	bhi	.L2485
+	movw	r2, #803
+	ldr	r1, .L2493+4
+	ldr	r0, .L2493+8
+	bl	printf
+.L2485:
+	ldr	r2, .L2493+12
+	ldrb	r6, [r2, r7]	@ zero_extendqisi2
+	ldr	r2, .L2493+16
+	ldr	r4, [r2]
+	bl	nandc_rdy_status
+	cbnz	r0, .L2486
+	ldrb	r2, [r8]	@ zero_extendqisi2
 	cmp	r2, #1
-	it	eq
-	moveq	r4, r3
-	mov	r2, r0
-.L2693:
-	cmp	r1, r4
-	bne	.L2694
-	uxtb	r1, r1
-	add	r0, r0, r0, lsl #1
-	strb	r2, [r7]
-	subs	r3, r3, r1
-	add	r0, r8, r0, lsl #4
-	strb	r3, [r5]
-	bl	sblk_prog_page
-	ldrh	r3, [r6, #6]
-	cmp	r3, #1
-	bne	.L2661
-	bl	sblk_wait_write_queue_completed
-	bl	ftl_write_completed
+	bne	.L2487
+	bl	nandc_wait_flash_ready
+.L2486:
 	mov	r0, r6
-	bl	ftl_write_last_log_page
+	bl	hynix_reconfig_rr_para
 	mov	r0, r6
-	bl	ftl_alloc_new_data_sblk
-.L2661:
-	ldr	r3, .L2717
+	bl	nandc_cs
+	ldr	r3, [sp]
+	cbnz	r3, .L2488
+	mov	r0, r5
+	bl	slc_phy_page_address_calc
+	ldr	r3, .L2493+20
+	mov	r5, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #0
-	bne	.L2658
-.L2660:
-	bl	ftl_write_completed
-	movs	r0, #0
-	b	.L2657
-.L2669:
-	adds	r3, r3, #1
-	adds	r2, r2, #48
-	cmp	r3, #32
-	bne	.L2671
-	movs	r5, #0
-	b	.L2670
-.L2672:
-	cbz	r5, .L2674
-	cbz	r4, .L2675
-	lsls	r2, r4, #9
-	mov	r1, r5
-	mov	r0, fp
-	bl	ftl_memcpy
-.L2675:
-	ldr	r2, [sp, #12]
-	ldr	r3, .L2717+20
-	add	r4, r4, r2
-	ldrb	r2, [r6]	@ zero_extendqisi2
-	ldr	r3, [r3]
-	cmp	r4, r2
-	bcc	.L2676
-	add	r6, r3, #16
-	b	.L2716
-.L2676:
-	lsls	r0, r4, #9
-	subs	r2, r2, r4
-	lsls	r2, r2, #9
-	add	r6, r3, #48
-	adds	r1, r5, r0
-	add	r0, r0, fp
-	bl	ftl_memcpy
-	b	.L2716
-.L2674:
-	ldr	r3, [sp, #28]
-	adds	r3, r3, #1
-	beq	.L2677
+	cbz	r3, .L2489
+	mov	r0, r6
+	bl	zftl_flash_enter_slc_mode
+.L2489:
+	add	r4, r4, r6, lsl #8
+	movs	r3, #128
+	mov	r0, r5
+	str	r3, [r4, #2056]
+	movs	r3, #0
+	str	r3, [r4, #2052]
+	str	r3, [r4, #2052]
+	uxtb	r3, r5
+	str	r3, [r4, #2052]
+	lsrs	r3, r5, #8
+	str	r3, [r4, #2052]
+	lsrs	r3, r5, #16
+	str	r3, [r4, #2052]
+	bl	nandc_set_seed
+	ldr	r1, .L2493+24
+	mov	r3, r10
+	mov	r2, fp
 	movs	r0, #1
-	bl	buf_alloc
-	ldr	r3, [sp, #28]
-	mov	r5, r0
-	str	r7, [r0, #20]
-	movs	r1, #1
-	str	r3, [r0, #24]
-	bl	sblk_read_page
-	ldr	r3, [r5, #12]
-	ldr	r2, [r3, #12]
-	ldr	r3, [r3, #4]
-	add	r10, r2, #1
-	cmp	r7, r3
-	ldr	r3, [r5, #36]
-	bne	.L2678
-	adds	r2, r3, #1
-	bne	.L2679
-.L2678:
-	ldrb	r1, [r5, #1]	@ zero_extendqisi2
-	ldr	r2, [sp, #28]
-	str	r3, [sp]
-	mov	r3, r7
-	ldr	r0, .L2717+36
-	bl	printf
-	movs	r3, #4
-	ldr	r1, [r5, #12]
-	mov	r2, r3
-	ldr	r0, .L2717+40
-	bl	rknand_print_hex
-	ldr	r3, .L2717+44
-	ldrh	r2, [r3]
-	movs	r3, #1
-	rsb	r0, r2, #21
-	lsls	r3, r3, r0
-	ldr	r0, [sp, #28]
-	subs	r3, r3, #1
-	lsrs	r0, r0, r2
-	ldr	r2, .L2717+48
-	ands	r0, r0, r3
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	bl	__aeabi_uidiv
-	movs	r1, #0
-	uxth	r0, r0
-	bl	ftl_sblk_dump
-.L2679:
-	ldr	r3, [r5, #12]
-	ldr	r3, [r3, #4]
-	cmp	r7, r3
-	bne	.L2680
-	ldr	r3, [r5, #36]
-	adds	r3, r3, #1
-	bne	.L2681
-.L2680:
-	movw	r2, #445
-	ldr	r1, .L2717+52
-	ldr	r0, .L2717+56
-	bl	printf
-.L2682:
-	b	.L2682
-.L2718:
+	ldrb	r1, [r1, #9]	@ zero_extendqisi2
+	bl	nandc_xfer_start
+	bl	nandc_xfer_done
+	ldr	r3, [sp, #4]
+	str	r3, [r4, #2056]
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	nandc_de_cs.constprop.29
+.L2487:
+	movs	r2, #64
+	mov	r1, r5
+	mov	r0, r7
+	bl	flash_wait_device_ready_raw
+	b	.L2486
+.L2488:
+	mov	r0, r6
+	bl	zftl_flash_exit_slc_mode
+	b	.L2489
+.L2494:
 	.align	2
-.L2717:
-	.word	.LANCHOR43
-	.word	.LANCHOR42
-	.word	.LANCHOR47
-	.word	.LANCHOR89
-	.word	.LANCHOR127
-	.word	.LANCHOR60
-	.word	.LANCHOR36
-	.word	.LANCHOR45
-	.word	.LANCHOR168
-	.word	.LC147
-	.word	.LC96
-	.word	.LANCHOR71
-	.word	.LANCHOR70
-	.word	.LANCHOR167
+.L2493:
+	.word	.LANCHOR18
+	.word	.LANCHOR172
 	.word	.LC0
-.L2681:
-	cbz	r4, .L2683
-	ldr	r3, [sp, #28]
-	lsls	r2, r4, #9
-	adds	r3, r3, #1
-	beq	.L2684
-	ldr	r1, [r5, #4]
-	mov	r0, fp
-	bl	ftl_memcpy
-.L2683:
-	ldr	r2, [sp, #12]
-	ldr	r3, .L2719
-	add	r4, r4, r2
-	ldr	r2, .L2719+4
-	ldr	r3, [r3]
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	add	r6, r3, #48
-	cmp	r4, r2
-	bcc	.L2685
-	add	r6, r3, #16
-.L2686:
-	cmp	r5, #0
-	beq	.L2673
-	ldrb	r3, [r5, #2]	@ zero_extendqisi2
-	mov	r1, r5
-	ldr	r0, .L2719+8
-	bic	r3, r3, #8
-	strb	r3, [r5, #2]
-	bl	buf_remove_buf
-	mov	r0, r5
-	bl	buf_free
-	b	.L2673
-.L2685:
-	ldr	r3, [sp, #28]
-	subs	r2, r2, r4
-	lsls	r2, r2, #9
-	lsls	r0, r4, #9
-	adds	r3, r3, #1
-	beq	.L2687
-	ldr	r1, [r5, #4]
-	add	r1, r1, r0
-	add	r0, r0, fp
-	bl	ftl_memcpy
-	b	.L2686
-.L2687:
-	movs	r1, #0
-	add	r0, r0, fp
-	bl	ftl_memset
-	b	.L2686
-.L2694:
-	mul	r2, ip, r2
-	adds	r1, r1, #1
-	ldrb	r2, [r8, r2]	@ zero_extendqisi2
-	b	.L2693
-.L2695:
-	lsls	r2, r4, #9
-	mov	r10, r5
-.L2684:
-	movs	r1, #0
-	mov	r0, fp
-	bl	ftl_memset
-	b	.L2683
-.L2677:
-	cmp	r4, #0
-	bne	.L2695
-	mov	r10, r4
-	mov	r5, r4
-	b	.L2683
-.L2720:
+	.word	.LANCHOR30
+	.word	.LANCHOR13
+	.word	.LANCHOR0
+	.word	.LANCHOR31
+	.size	flash_start_page_prog, .-flash_start_page_prog
+	.section	.text.queue_prog_cmd,"ax",%progbits
+	.align	1
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	queue_prog_cmd, %function
+queue_prog_cmd:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r4, r0
+	ldr	r3, [r0, #12]
+	ldr	r2, [r0, #4]
+	ldr	r1, [r0, #24]
+	movs	r0, #16
+	bl	flash_start_page_prog
+	ldr	r3, .L2503
+	ldr	r2, [r4, #24]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #255
+	beq	.L2496
+	ldr	r6, .L2503+4
+	ubfx	r2, r2, #21, #3
+	movs	r5, #48
+	mov	r7, r6
+.L2498:
+	mla	r1, r5, r3, r6
+	ldr	r0, [r1, #24]
+	ubfx	r0, r0, #21, #3
+	cmp	r2, r0
+	bne	.L2497
+	add	r0, r1, #42
+	ldrb	r1, [r1, #42]	@ zero_extendqisi2
+	cmp	r1, #7
+	bne	.L2497
+	movs	r3, #3
+	strb	r3, [r0]
+.L2496:
+	movs	r3, #3
+	mov	r1, r4
+	strb	r3, [r4, #42]
+	movs	r3, #1
+	strb	r3, [r4, #43]
+	movs	r3, #255
+	strb	r3, [r4]
+	ldr	r0, .L2503
+	pop	{r3, r4, r5, r6, r7, lr}
+	b	buf_add_tail
+.L2497:
+	muls	r3, r5, r3
+	ldrb	r3, [r7, r3]	@ zero_extendqisi2
+	cmp	r3, #255
+	bne	.L2498
+	b	.L2496
+.L2504:
 	.align	2
-.L2719:
-	.word	.LANCHOR60
-	.word	.LANCHOR45
-	.word	.LANCHOR51
-	.size	ftl_write_commit, .-ftl_write_commit
-	.section	.text.ftl_discard,"ax",%progbits
+.L2503:
+	.word	.LANCHOR54
+	.word	.LANCHOR50
+	.size	queue_prog_cmd, .-queue_prog_cmd
+	.section	.text.sblk_prog_page,"ax",%progbits
 	.align	1
-	.global	ftl_discard
+	.global	sblk_prog_page
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_discard, %function
-ftl_discard:
-	@ args = 0, pretend = 0, frame = 24
+	.type	sblk_prog_page, %function
+sblk_prog_page:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+	ldrh	r3, [r0, #34]
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r5, r2
-	sub	sp, sp, #32
-	mov	r10, r3
-	cmp	r0, #0
-	bne	.L2722
-	ldr	r3, .L2773
-	mov	fp, #24576
-	ldr	r3, [r3]
-.L2723:
-	adds	r2, r1, r5
-	cmp	r3, r2
-	bcc	.L2744
-	ldr	r3, .L2773+4
-	add	fp, fp, r1
+	mov	r4, r0
+	mov	r5, r1
+	cbz	r3, .L2506
+	ldr	r3, .L2532
 	ldr	r3, [r3]
-	lsls	r3, r3, #19
-	bpl	.L2725
-	mov	r1, r0
-	str	r10, [sp]
-	mov	r3, r5
-	mov	r2, fp
-	ldr	r0, .L2773+8
+	lsls	r3, r3, #23
+	bpl	.L2506
+	mov	r2, r1
+	ldr	r1, [r0, #24]
+	ldr	r0, .L2532+4
 	bl	printf
-.L2725:
-	ldr	r6, .L2773+12
-	mov	r0, fp
-	ldr	r7, .L2773+16
-	ldr	r3, [r6]
-	ldrb	r8, [r7]	@ zero_extendqisi2
-	ldr	r2, [r3, #8]
-	mov	r1, r8
-	str	r2, [sp, #12]
-	adds	r2, r2, #1
-	str	r2, [r3, #8]
-	bl	__aeabi_uidiv
-	mov	r1, r8
-	mov	r4, r0
-	mov	r0, fp
-	bl	__aeabi_uidivmod
-	mov	fp, r1
-	cmp	r1, #0
-	beq	.L2726
-	sub	r3, r8, r1
-	cmp	r3, r5
-	it	cs
-	movcs	r3, r5
-	cmp	r10, #1
-	mov	r8, r3
-	uxth	r3, r3
-	str	r3, [sp, #16]
-	bhi	.L2728
-	mov	r0, r4
-	bl	lpa_hash_get_ppa
-	str	r0, [sp, #24]
-	adds	r0, r0, #1
-	bne	.L2729
-	movs	r2, #0
-	add	r1, sp, #24
-	mov	r0, r4
-	bl	pm_log2phys
-.L2729:
-	ldr	r3, [sp, #24]
-	adds	r3, r3, #1
-	beq	.L2728
-	movs	r0, #0
-	bl	buf_alloc
-	mov	r3, r0
-	cbz	r0, .L2728
-	ldr	r2, [sp, #12]
-	movs	r1, #0
-	str	r4, [r0, #20]
-	strb	fp, [r0, #41]
-	str	r3, [sp, #20]
-	strb	r8, [r3, #40]
-	str	r2, [r0, #16]
-	ldr	r3, [sp, #16]
-	ldr	r0, [r0, #4]
-	lsls	r2, r3, #9
-	add	r0, r0, fp, lsl #9
-	bl	ftl_memset
-	ldr	r3, [sp, #20]
-	mov	r0, r3
-	bl	ftl_write_buf
-	bl	ftl_write_commit
-	ldr	r2, [r6]
-	ldr	r3, [r2, #76]
-	adds	r3, r3, #1
-	str	r3, [r2, #76]
-.L2728:
-	ldr	r3, [sp, #16]
-	adds	r4, r4, #1
-	subs	r5, r5, r3
-.L2726:
-	cbz	r5, .L2731
-	bl	ftl_flush
-.L2731:
-	ldr	fp, .L2773+32
-	mov	r3, #-1
-	str	r3, [sp, #28]
-.L2732:
-	ldrb	r3, [r7]	@ zero_extendqisi2
-	cmp	r5, r3
-	bcs	.L2737
-	cmp	r10, #1
-	bls	.L2738
-.L2739:
+.L2506:
+	ldr	fp, .L2532+32
+	movs	r7, #0
+.L2507:
+	cbnz	r5, .L2518
+.L2531:
 	movs	r0, #0
-.L2721:
-	add	sp, sp, #32
-	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2722:
-	cmp	r0, #3
-	bhi	.L2744
-	lsl	fp, r0, #13
-	mov	r3, #8192
-	b	.L2723
-.L2737:
-	mov	r0, r4
-	bl	lpa_hash_get_ppa
-	add	r1, sp, #32
-	movs	r2, #0
-	str	r0, [r1, #-8]!
-	adds	r0, r0, #1
-	mov	r0, r4
-	beq	.L2733
-	bl	pm_log2phys
-	ldr	r3, [sp, #24]
-	adds	r3, r3, #1
-	beq	.L2735
-	movs	r2, #1
-	add	r1, sp, #28
-	mov	r0, r4
-	bl	pm_log2phys
-.L2772:
-	ldr	r2, [r6]
-	ldr	r3, [r2, #76]
-	adds	r3, r3, #1
-	str	r3, [r2, #76]
-.L2735:
-	ldrb	r3, [r7]	@ zero_extendqisi2
-	adds	r4, r4, #1
-	subs	r5, r5, r3
-	b	.L2732
-.L2733:
-	bl	pm_log2phys
-	ldr	r3, [sp, #24]
-	adds	r3, r3, #1
-	beq	.L2735
-	add	r1, sp, #28
-	movs	r2, #1
+.L2518:
+	ldrb	r8, [r4]	@ zero_extendqisi2
+	ldr	r6, [r4, #24]
+.L2508:
+	movs	r1, #1
+	mov	r0, r6
+	bl	queue_lun_state
+	cbnz	r0, .L2509
+	cmp	r5, #1
+	beq	.L2510
+	ldr	r3, .L2532+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L2511
+.L2510:
 	mov	r0, r4
-	bl	pm_log2phys
-	ldr	r3, .L2773+20
-	ldrb	r1, [fp]	@ zero_extendqisi2
-	ldrh	r2, [r3]
-	movs	r3, #1
-	rsb	r0, r2, #21
-	lsls	r3, r3, r0
-	ldr	r0, [sp, #24]
-	subs	r3, r3, #1
-	lsrs	r0, r0, r2
-	ands	r0, r0, r3
-	bl	__aeabi_uidiv
-	uxth	r0, r0
-	bl	ftl_vpn_decrement
-	b	.L2772
-.L2738:
-	cmp	r5, #0
-	beq	.L2739
-	mov	r0, r4
-	bl	lpa_hash_get_ppa
-	str	r0, [sp, #24]
-	adds	r0, r0, #1
-	bne	.L2740
-	movs	r2, #0
-	add	r1, sp, #24
-	mov	r0, r4
-	bl	pm_log2phys
-.L2740:
-	ldr	r3, [sp, #24]
-	adds	r3, r3, #1
-	beq	.L2739
-	movs	r0, #0
-	bl	buf_alloc
-	mov	r10, r0
-	cmp	r0, #0
-	beq	.L2739
-	ldr	r3, [sp, #12]
-	str	r4, [r0, #20]
-	movs	r4, #0
-	strb	r4, [r0, #41]
-	str	r3, [r0, #16]
-	ldrb	r3, [r7]	@ zero_extendqisi2
-	strb	r5, [r0, #40]
-	cmp	r5, r3
-	bcc	.L2741
-	mov	r2, #1048
-	ldr	r1, .L2773+24
-	ldr	r0, .L2773+28
+	bl	queue_prog_cmd
+.L2512:
+	subs	r5, r5, #1
+	beq	.L2531
+	add	r8, r8, r8, lsl #1
+	add	r4, fp, r8, lsl #4
+	b	.L2507
+.L2509:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L2508
+.L2511:
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	ubfx	r10, r6, #21, #3
+	cmp	r3, #255
+	bne	.L2513
+	movw	r2, #583
+	ldr	r1, .L2532+12
+	ldr	r0, .L2532+16
 	bl	printf
-.L2742:
-	b	.L2742
-.L2741:
-	lsls	r2, r5, #9
+.L2513:
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	movs	r2, #48
+	mla	r3, r2, r3, fp
+	ldr	ip, [r3, #24]
+	ubfx	r3, ip, #21, #3
+	cmp	r10, r3
+	bne	.L2514
+	ldr	r3, .L2532+20
+	mov	r10, #1
+	ldrh	r1, [r3]
+	ldr	r3, .L2532+24
+	lsl	r2, r10, r1
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	rsb	r3, r1, #21
+	lsl	r3, r10, r3
+	subs	r2, r2, #1
+	uxth	r2, r2
+	subs	r0, r0, #1
+	subs	r3, r3, #1
+	ands	r3, r3, r0
+	and	lr, r2, r6
+	uxth	r3, r3
+	lsrs	r6, r6, r1
+	lsr	r1, ip, r1
+	ands	r6, r6, r3
+	ands	r1, r1, r3
+	and	r2, r2, ip
+	cmp	r6, r1
+	beq	.L2514
+	cmp	lr, r2
+	bne	.L2514
+	cmp	r7, r0
+	beq	.L2514
+	ldr	r3, [r4, #12]
+	movs	r0, #17
+	ldr	r2, [r4, #4]
+	add	r7, r7, r10
+	ldr	r1, [r4, #24]
+	bl	flash_start_page_prog
+	movs	r3, #9
+	strb	r10, [r4, #43]
+	strb	r3, [r4, #42]
+	movs	r3, #255
+	strb	r3, [r4]
 	mov	r1, r4
-	ldr	r0, [r0, #4]
-	bl	ftl_memset
-	mov	r0, r10
-	bl	ftl_write_buf
-	bl	ftl_write_commit
-	ldr	r2, [r6]
-	ldr	r3, [r2, #76]
-	adds	r3, r3, #1
-	str	r3, [r2, #76]
-	b	.L2739
-.L2744:
-	mov	r0, #-1
-	b	.L2721
-.L2774:
+	ldr	r0, .L2532+28
+	bl	buf_add_tail
+	b	.L2512
+.L2514:
+	mov	r0, r4
+	movs	r7, #0
+	bl	queue_prog_cmd
+	b	.L2512
+.L2533:
 	.align	2
-.L2773:
-	.word	.LANCHOR52
-	.word	.LANCHOR22
-	.word	.LC148
-	.word	.LANCHOR46
-	.word	.LANCHOR45
-	.word	.LANCHOR71
-	.word	.LANCHOR169
+.L2532:
+	.word	.LANCHOR14
+	.word	.LC135
+	.word	.LANCHOR39
+	.word	.LANCHOR173
 	.word	.LC0
-	.word	.LANCHOR70
-	.size	ftl_discard, .-ftl_discard
-	.section	.text.FtlDiscard,"ax",%progbits
+	.word	.LANCHOR66
+	.word	.LANCHOR67
+	.word	.LANCHOR54
+	.word	.LANCHOR50
+	.size	sblk_prog_page, .-sblk_prog_page
+	.section	.text.ftl_flush,"ax",%progbits
 	.align	1
-	.global	FtlDiscard
+	.global	ftl_flush
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlDiscard, %function
-FtlDiscard:
+	.type	ftl_flush, %function
+ftl_flush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
+	push	{r3, r4, r5, lr}
+	ldr	r4, .L2539
+	ldr	r5, .L2539+4
+	ldrb	r1, [r4]	@ zero_extendqisi2
+	cbz	r1, .L2535
+	ldrb	r0, [r5]	@ zero_extendqisi2
+	ldr	r3, .L2539+8
+	add	r0, r0, r0, lsl #1
+	add	r0, r3, r0, lsl #4
+	bl	sblk_prog_page
+.L2535:
+	movs	r3, #255
+	strb	r3, [r5]
 	movs	r3, #0
-	mov	r2, r1
-	mov	r1, r0
-	mov	r0, r3
-	b	ftl_discard
-	.size	FtlDiscard, .-FtlDiscard
-	.section	.text.gc_do_copy_back,"ax",%progbits
+	strb	r3, [r4]
+	bl	sblk_wait_write_queue_completed
+	bl	ftl_write_completed
+	movw	r0, #65535
+	pop	{r3, r4, r5, lr}
+	b	ftl_vpn_decrement
+.L2540:
+	.align	2
+.L2539:
+	.word	.LANCHOR121
+	.word	.LANCHOR174
+	.word	.LANCHOR50
+	.size	ftl_flush, .-ftl_flush
+	.section	.text.flash_prog_page_en,"ax",%progbits
 	.align	1
-	.global	gc_do_copy_back
+	.global	flash_prog_page_en
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	gc_do_copy_back, %function
-gc_do_copy_back:
-	@ args = 0, pretend = 0, frame = 48
+	.type	flash_prog_page_en, %function
+flash_prog_page_en:
+	@ args = 8, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2877
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #72
-	ldrb	r0, [r3]	@ zero_extendqisi2
-	cmp	r0, #0
-	bne	.L2777
-	bl	buf_alloc
-	mov	r4, r0
-	cmp	r0, #0
-	beq	.L2776
-	ldr	r6, .L2877+4
-	ldrh	r2, [r6, #22]
-	mov	r0, r2
-	bl	gc_get_src_ppa_from_index
-	movs	r1, #1
-	adds	r2, r2, #1
-	str	r0, [r4, #24]
-	mov	r7, r0
+	sub	sp, sp, #24
+	mov	r7, r3
+	ldrb	r3, [sp, #60]	@ zero_extendqisi2
+	mov	fp, r0
+	mov	r4, r1
+	mov	r8, r2
+	ubfx	r5, r1, #24, #2
+	str	r3, [sp, #20]
+	ldr	r3, .L2574
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r0
+	bhi	.L2542
+	movw	r2, #546
+	ldr	r1, .L2574+4
+	ldr	r0, .L2574+8
+	bl	printf
+.L2542:
+	ldr	r3, .L2574+12
+	ldrb	r3, [r3, fp]	@ zero_extendqisi2
+	str	r3, [sp, #12]
+	cmp	r5, #0
+	bne	.L2553
+	ldr	r3, .L2574+16
+	ldr	r10, .L2574+64
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2544
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L2553
+.L2544:
+	ldr	r3, .L2574+20
 	mov	r0, r4
-	strh	r2, [r6, #22]	@ movhi
-	bl	sblk_read_page
-	ldr	r3, [r4, #36]
-	adds	r0, r3, #1
-	beq	.L2779
-	cmp	r3, #512
-	bne	.L2780
-.L2779:
-	ldr	r3, .L2877+8
-	ldrh	r0, [r3]
-	movs	r3, #1
-	rsb	r2, r0, #21
-	lsls	r3, r3, r2
-	ldr	r2, .L2877+12
-	lsr	r0, r7, r0
-	subs	r3, r3, #1
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	ands	r0, r0, r3
+	ldrh	r6, [r3]
+	mov	r1, r6
 	bl	__aeabi_uidiv
-	movs	r1, #0
-	uxth	r0, r0
-	bl	ftl_sblk_dump
-.L2780:
-	ldr	r3, [r4, #36]
-	adds	r1, r3, #1
-	beq	.L2781
-	cmp	r3, #512
-	bne	.L2782
-.L2781:
-	mov	r2, #556
-	ldr	r1, .L2877+16
-	ldr	r0, .L2877+20
-	bl	printf
-.L2783:
-	b	.L2783
-.L2782:
-	ldr	r3, [r4, #12]
-	ldr	r5, [r3, #4]
-	mov	r0, r5
-	bl	lpa_hash_get_ppa
-	str	r0, [sp, #48]
-	adds	r0, r0, #1
-	bne	.L2784
-	movs	r2, #0
-	add	r1, sp, #48
-	mov	r0, r5
-	bl	pm_log2phys
-.L2784:
-	ldr	r8, [sp, #48]
-	cmp	r7, r8
-	bne	.L2785
-	ldr	r0, .L2877+24
-	movs	r3, #0
-.L2788:
-	adds	r2, r0, r3
-	ldr	r1, [r2, #20]
-	cmp	r5, r1
-	bne	.L2786
-	ldrb	r2, [r2, #2]	@ zero_extendqisi2
-	lsls	r2, r2, #30
-	bpl	.L2786
+	mov	r1, r6
+	mul	r5, r6, r0
 	mov	r0, r4
-	bl	buf_free
-	ldr	r3, .L2877+28
+	bl	__aeabi_uidivmod
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L2545
+	add	r5, r5, r1, lsl #1
+.L2549:
+	ldr	r3, .L2574+24
 	ldr	r3, [r3]
-	lsls	r1, r3, #23
-	bpl	.L2776
-	ldrh	r3, [r6, #22]
-	mov	r2, r7
-	mov	r1, r5
-	ldr	r0, .L2877+32
+	lsls	r1, r3, #27
+	bpl	.L2546
+	mov	r3, r5
+	mov	r2, r4
+	ldr	r1, [sp, #12]
+	ldr	r0, .L2574+28
 	bl	printf
-.L2776:
-	add	sp, sp, #72
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2786:
-	adds	r3, r3, #48
-	cmp	r3, #1536
-	bne	.L2788
-	movs	r3, #0
-	str	r5, [r4, #20]
-	strb	r3, [r4, #41]
-	ldr	r3, .L2877+36
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	strb	r3, [r4, #40]
-	ldrb	r3, [r4, #2]	@ zero_extendqisi2
-	orr	r3, r3, #10
-	strb	r3, [r4, #2]
-	ldr	r3, [r4, #12]
-	ldr	r3, [r3]
-	str	r3, [r4, #16]
-	ldr	r3, .L2877+28
-	ldr	r3, [r3]
-	lsls	r2, r3, #23
-	bpl	.L2789
-	mov	r0, r5
-	bl	lpa_hash_get_ppa
-	ldrh	r3, [r6, #22]
+.L2546:
+	ldr	r3, [sp, #56]
 	mov	r2, r8
-	str	r7, [sp]
 	mov	r1, r5
-	str	r3, [sp, #4]
-	mov	r3, r0
-	ldr	r0, .L2877+40
-	bl	printf
-.L2789:
-	mov	r0, r4
-	bl	ftl_gc_write_buf
-	bl	ftl_write_commit
-	ldr	r3, .L2877+44
-	ldr	r2, [r3]
-	ldr	r3, [r2, #60]
-	adds	r3, r3, #1
-	str	r3, [r2, #60]
-	ldrh	r3, [r6, #24]
-	adds	r3, r3, #1
-	strh	r3, [r6, #24]	@ movhi
-	b	.L2776
-.L2785:
-	ldr	r3, .L2877+28
+	ldr	r0, [sp, #12]
+	str	r3, [sp]
+	mov	r3, r7
+	bl	flash_prog_page
+	ldr	r3, [sp, #20]
+	str	r0, [sp, #16]
+	cmp	r3, #0
+	beq	.L2547
+	ldr	r3, [sp, #56]
+	mov	r1, r4
+	ldr	r10, .L2574+44
+	mov	r0, fp
+	ldr	r2, .L2574+32
+	str	r3, [sp]
+	ldr	r3, [r10]
+	ldr	r2, [r2]
+	bl	flash_read_page_en
+	adds	r2, r0, #1
+	mov	r6, r0
+	beq	.L2548
+	cmp	r0, #512
+	beq	.L2548
+	ldr	r3, .L2574+32
+	ldr	r2, [r8]
 	ldr	r3, [r3]
-	lsls	r3, r3, #23
-	bpl	.L2790
-	mov	r0, r5
-	bl	lpa_hash_get_ppa
-	ldrh	r3, [r6, #22]
-	mov	r2, r8
-	str	r7, [sp]
-	mov	r1, r5
-	str	r3, [sp, #4]
-	mov	r3, r0
-	ldr	r0, .L2877+40
-	bl	printf
-.L2790:
-	mov	r0, r4
-	bl	buf_free
-	b	.L2776
-.L2777:
-	ldr	r3, .L2877+48
-	ldr	r5, .L2877+4
 	ldr	r3, [r3]
-	str	r3, [sp, #28]
-	ldr	r3, .L2877+52
-	ldrb	r8, [r3]	@ zero_extendqisi2
-	ldr	r3, [sp, #28]
-	cmp	r8, #3
-	ldrb	r7, [r3, #89]	@ zero_extendqisi2
-	bne	.L2791
-	ldr	r3, .L2877+56
-	ldrh	r4, [r5, #310]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2792
-	add	r1, r7, r7, lsl #1
-	mov	r0, r4
-	bl	__aeabi_idiv
-	uxth	r10, r0
-	sub	r0, r7, r7, lsl #2
-	str	r8, [sp, #32]
-	smulbb	r0, r0, r10
-	add	r0, r0, r4
-	uxth	fp, r0
-.L2793:
-	ldr	r3, [sp, #32]
-	muls	r3, r7, r3
-	str	r3, [sp, #36]
-	ldr	r3, .L2877+60
-	ldrh	r1, [r3]
-	ldr	r3, .L2877+64
-	ldr	r8, [r3]
-	muls	r1, r7, r1
-	ldrh	r3, [r5, #20]
-	movs	r7, #0
-	str	r3, [sp, #40]
-	subs	r1, r1, #1
-	ldr	r3, .L2877+4
-.L2796:
-	ldr	r0, [sp, #36]
-	uxth	r2, r7
-	cmp	r2, r0
-	blt	.L2798
-.L2829:
-	movs	r6, #1
-	b	.L2794
-.L2792:
-	mov	r0, r4
+	cmp	r2, r3
+	bne	.L2548
+	ldr	r3, [r10]
+	ldr	r2, [r7]
+	ldr	r3, [r3]
+	cmp	r2, r3
+	beq	.L2547
+.L2548:
+	movs	r3, #4
+	mov	r1, r8
+	mov	r2, r3
+	ldr	r0, .L2574+36
+	bl	rknand_print_hex
+	movs	r3, #4
 	mov	r1, r7
-	bl	__aeabi_idiv
-	ldr	r3, .L2877+68
-	str	r8, [sp, #32]
-	ldrh	r6, [r3, r0, lsl #1]
-	smulbb	r0, r0, r7
-	subs	r0, r4, r0
-	lsr	r10, r6, #3
-	uxth	fp, r0
-	mla	r4, r7, r10, fp
-	and	r6, r6, #7
-	cmp	r6, #1
-	add	r4, r4, r4, lsl #1
-	uxth	r4, r4
-	beq	.L2793
-.L2794:
-	ldr	r3, .L2877+28
+	mov	r2, r3
+	ldr	r0, .L2574+40
+	bl	rknand_print_hex
+	ldr	r1, .L2574+44
+	movs	r3, #4
+	mov	r2, r3
+	ldr	r0, .L2574+48
+	ldr	r1, [r1]
+	bl	rknand_print_hex
+	ldr	r1, .L2574+32
+	movs	r3, #4
+	mov	r2, r3
+	ldr	r0, .L2574+52
+	ldr	r1, [r1]
+	bl	rknand_print_hex
+	cmp	r6, #512
+	beq	.L2549
+.L2551:
+	mov	r1, r4
+	ldr	r0, .L2574+56
+	bl	printf
+	movw	r2, #577
+	ldr	r1, .L2574+4
+	ldr	r0, .L2574+8
+	bl	printf
+	mov	r0, #-1
+.L2550:
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2545:
+	ldr	r3, .L2574+60
+	ldrh	r1, [r3, r1, lsl #1]
+	add	r5, r5, r1
+	b	.L2549
+.L2553:
+.L2543:
+	mov	r5, r4
+	b	.L2549
+.L2547:
+	ldr	r0, [sp, #16]
+	adds	r3, r0, #1
+	bne	.L2550
+	b	.L2551
+.L2575:
+	.align	2
+.L2574:
+	.word	.LANCHOR18
+	.word	.LANCHOR175
+	.word	.LC0
+	.word	.LANCHOR30
+	.word	.LANCHOR0
+	.word	.LANCHOR2
+	.word	.LANCHOR14
+	.word	.LC136
+	.word	.LANCHOR164
+	.word	.LC137
+	.word	.LC138
+	.word	.LANCHOR163
+	.word	.LC139
+	.word	.LC140
+	.word	.LC141
+	.word	.LANCHOR3
+	.word	.LANCHOR1
+	.size	flash_prog_page_en, .-flash_prog_page_en
+	.section	.text.ftl_test_block,"ax",%progbits
+	.align	1
+	.global	ftl_test_block
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_test_block, %function
+ftl_test_block:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r5, #0
+	ldr	r3, .L2603
+	mov	r10, r0
+	mov	r8, r5
+	str	r5, [r3]
+	ldr	r3, .L2603+4
+	str	r5, [r3]
+.L2577:
+	uxth	r3, r5
+	str	r3, [sp, #12]
+	ldr	r3, .L2603+8
+	ldr	r2, [sp, #12]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r2
+	bls	.L2587
+	mov	fp, #0
+	b	.L2588
+.L2586:
+	ldr	r3, .L2603+12
 	ldr	r3, [r3]
-	lsls	r0, r3, #23
-	bpl	.L2799
-	ldr	r3, .L2877+64
-	mov	r2, r6
-	str	r4, [sp, #8]
+	lsls	r3, r3, #19
+	bpl	.L2578
 	mov	r1, r10
-	ldr	r0, .L2877+72
+	ldr	r0, .L2603+16
+	bl	printf
+.L2578:
+	ldr	r3, .L2603+20
+	ldrb	r4, [r3]	@ zero_extendqisi2
+	ldr	r3, [sp, #12]
+	smulbb	r4, r4, r10
+	add	r4, r4, r6
+	uxth	r4, r4
+	cbnz	r3, .L2579
+	ldr	r3, .L2603+24
 	ldr	r3, [r3]
-	ldr	r3, [r3, r4, lsl #2]
+	ldrb	r3, [r3, #47]	@ zero_extendqisi2
+	cmp	r3, r4
+	bcs	.L2580
+.L2579:
+	uxtb	r6, r5
+	mov	r1, r4
+	mov	r0, r6
+	bl	flash_check_bad_block
+	cbnz	r0, .L2580
+	ldr	r3, .L2603+28
+	mov	r1, r8
+	mov	r0, r6
+	ldrh	r7, [r3]
+	muls	r7, r4, r7
+	mov	r2, r7
+	bl	flash_erase_block_en
+	cbz	r0, .L2581
+	ldr	r3, .L2603+32
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #2
+	bne	.L2602
+	ldr	r3, .L2603+36
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2602
+	mov	r2, r7
+	movs	r1, #1
+	mov	r0, r6
+	bl	flash_erase_block_en
+	cbnz	r0, .L2602
+.L2585:
+	ldr	r3, .L2603+32
+	mov	r8, #1
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r7, r7, r3, lsl #24
+.L2584:
+	movs	r3, #1
+	ldr	r2, .L2603
 	str	r3, [sp, #4]
-	ldrh	r3, [r5, #310]
-	str	r3, [sp]
-	mov	r3, fp
-	bl	printf
-.L2799:
-	movs	r3, #0
-.L2875:
-	str	r3, [sp, #40]
-	ldrh	r3, [sp, #40]
-	mov	r8, r3
-	str	r3, [sp, #36]
-	ldr	r3, [sp, #28]
-	ldrb	r2, [r3, #89]	@ zero_extendqisi2
-	ldr	r3, [sp, #32]
-	muls	r3, r2, r3
-	cmp	r8, r3
-	blt	.L2816
-	ldr	r1, .L2877+52
-	ldrb	r1, [r1]	@ zero_extendqisi2
-	cmp	r1, #3
-	beq	.L2817
-	movs	r0, #0
-	subs	r3, r3, #1
-.L2818:
-	uxth	r1, r0
-	adds	r0, r0, #1
-	cmp	r1, r3
-	blt	.L2824
-	add	r1, sp, #72
-	add	r3, r1, r3, lsl #2
-	movs	r1, #255
-	ldr	r3, [r3, #-24]
-	strb	r1, [r3]
-	ldrh	r3, [sp, #32]
-	ldr	r0, [sp, #48]
-	smulbb	r1, r3, r2
-	uxtb	r1, r1
-	bl	sblk_prog_page
-	b	.L2823
-.L2791:
-	ldr	r3, .L2877+76
 	mov	r1, r7
-	ldrh	r4, [r5, #310]
+	ldr	r3, .L2603+40
+	mov	r0, r6
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	mov	r0, r4
-	cbnz	r3, .L2795
-	bl	__aeabi_idiv
-	uxth	r10, r0
-	movs	r3, #1
-	smulbb	r0, r7, r10
-	subs	r0, r4, r0
-	uxth	fp, r0
-.L2873:
-	str	r3, [sp, #32]
-	b	.L2793
-.L2795:
-	bl	__aeabi_idiv
-	uxth	r10, r0
-	movs	r3, #2
-	smulbb	r0, r7, r10
-	subs	r0, r4, r0
-	uxth	fp, r0
-	b	.L2873
-.L2878:
-	.align	2
-.L2877:
-	.word	.LANCHOR67
-	.word	.LANCHOR59
-	.word	.LANCHOR71
-	.word	.LANCHOR70
-	.word	.LANCHOR170
-	.word	.LC0
-	.word	.LANCHOR36
-	.word	.LANCHOR22
-	.word	.LC149
-	.word	.LANCHOR45
-	.word	.LC150
-	.word	.LANCHOR46
-	.word	.LANCHOR60
-	.word	.LANCHOR64
-	.word	.LANCHOR66
-	.word	.LANCHOR68
-	.word	.LANCHOR108
-	.word	.LANCHOR171
-	.word	.LC151
-	.word	.LANCHOR74
-.L2798:
-	add	r2, r2, r4
-	cmp	r2, r1
-	beq	.L2829
-	ldr	r0, [r8, r2, lsl #2]
-	adds	r0, r0, #1
-	bne	.L2797
-	ldrh	r6, [r3, #22]
-	str	r3, [sp, #44]
-	ldr	r3, [sp, #40]
-	cmp	r6, r3
-	bcs	.L2776
+	str	r3, [sp]
+	ldr	r3, .L2603+4
+	bl	flash_prog_page_en
+	cbz	r0, .L2580
+.L2602:
+	mov	r1, r4
 	mov	r0, r6
-	adds	r6, r6, #1
-	bl	gc_get_src_ppa_from_index
-	ldr	r3, [sp, #44]
-	strh	r6, [r3, #22]	@ movhi
-	str	r0, [r8, r2, lsl #2]
-.L2797:
-	adds	r7, r7, #1
-	b	.L2796
-.L2816:
-	ldr	r3, .L2879
-	add	r7, r4, r8
+	bl	flash_mask_bad_block
+.L2580:
+	add	fp, fp, #1
+.L2588:
+	ldr	r3, .L2603+20
+	uxth	r6, fp
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r6
+	bhi	.L2586
+	adds	r5, r5, #1
+	b	.L2577
+.L2581:
+	cmp	r8, #0
+	beq	.L2584
+	b	.L2585
+.L2587:
+	cmp	r8, #0
+	beq	.L2589
+	ldr	r3, .L2603+44
+	movs	r2, #2
 	ldr	r3, [r3]
-	ldrb	r3, [r3, r7]	@ zero_extendqisi2
-	cmp	r3, #255
-	bne	.L2801
+	add	r10, r3, r10, lsl #2
+	ldrb	r3, [r10, #2]	@ zero_extendqisi2
+	bfi	r3, r2, #3, #2
+	strb	r3, [r10, #2]
+.L2589:
 	movs	r0, #0
-	bl	buf_alloc
-	mov	r5, r0
-	cbnz	r0, .L2802
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2604:
+	.align	2
+.L2603:
+	.word	ftl_tmp_buffer
+	.word	.LANCHOR176
+	.word	.LANCHOR104
+	.word	.LANCHOR14
+	.word	.LC142
+	.word	.LANCHOR67
+	.word	.LANCHOR27
+	.word	.LANCHOR103
+	.word	.LANCHOR71
+	.word	.LANCHOR0
+	.word	.LANCHOR123
+	.word	.LANCHOR7
+	.size	ftl_test_block, .-ftl_test_block
+	.section	.text.ftl_prog_page,"ax",%progbits
+	.align	1
+	.global	ftl_prog_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_prog_page, %function
+ftl_prog_page:
+	@ args = 4, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r4, r5, r6, r7, lr}
+	mov	r4, r0
+	mov	r7, r3
+	mov	r5, r1
+	mov	r6, r2
 	bl	sblk_wait_write_queue_completed
-	bl	ftl_write_completed
-	bl	gc_write_completed
-	bl	gc_free_temp_buf
-	mov	r0, r5
-	bl	buf_alloc
-	mov	r5, r0
-	cmp	r0, #0
-	beq	.L2776
-.L2802:
-	ldr	r3, .L2879
-	ldrb	r2, [r5, #1]	@ zero_extendqisi2
-	ldr	r3, [r3]
-	strb	r2, [r3, r7]
-	ldr	r2, .L2879+4
-	strb	r6, [r5, #45]
-	ldrb	r3, [r2, #7]	@ zero_extendqisi2
-	adds	r3, r3, #1
-	strb	r3, [r2, #7]
-	ldr	r3, [sp, #36]
-	add	r3, r3, r4
-	strh	r3, [r5, #32]	@ movhi
-	ldr	r3, .L2879+8
-	ldrh	r2, [r3]
-	ldr	r3, [sp, #28]
-	ldrb	r3, [r3, #89]	@ zero_extendqisi2
-	muls	r3, r2, r3
-	subs	r3, r3, #1
-	cmp	r7, r3
-	bne	.L2803
-	ldr	r3, .L2879+12
-	ldr	r0, [r5, #4]
-	ldr	r1, [r3]
-	mov	r3, #-1
-	str	r3, [r1, r7, lsl #2]
-	ldr	r3, .L2879+16
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	muls	r2, r3, r2
-	lsls	r2, r2, #2
-	bl	ftl_memcpy
-	ldr	r3, .L2879+8
-	ldr	r2, .L2879+16
-	ldr	r0, [r5, #4]
-	ldrh	r3, [r3]
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	muls	r2, r3, r2
-	ldr	r3, .L2879+20
-	ldr	r1, [r3]
-	lsls	r2, r2, #2
-	add	r0, r0, r2
-	bl	ftl_memcpy
-	ldr	r3, .L2879+24
+	movs	r3, #1
+	mov	r0, r4
+	str	r3, [sp, #4]
+	mov	r2, r6
+	ldr	r3, [sp, #32]
+	mov	r1, r5
+	str	r3, [sp]
+	mov	r3, r7
+	bl	flash_prog_page_en
+	adds	r3, r0, #1
+	mov	r4, r0
+	bne	.L2605
+	ldr	r1, .L2607
+	movw	r2, #2231
+	ldr	r0, .L2607+4
+	bl	printf
+	mov	r1, r5
+	ldr	r0, .L2607+8
+	bl	printf
+.L2605:
+	mov	r0, r4
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, r6, r7, pc}
+.L2608:
+	.align	2
+.L2607:
+	.word	.LANCHOR177
+	.word	.LC0
+	.word	.LC141
+	.size	ftl_prog_page, .-ftl_prog_page
+	.section	.text.ftl_info_flush,"ax",%progbits
+	.align	1
+	.global	ftl_info_flush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_info_flush, %function
+ftl_info_flush:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r10, #0
+	ldr	r6, .L2642
 	movs	r1, #0
-	ldr	r0, [r5, #12]
-	ldrb	r2, [r3]	@ zero_extendqisi2
+	ldr	r7, .L2642+4
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	str	r0, [sp, #12]
+	mov	r5, r7
+	ldr	r0, .L2642+8
 	lsls	r2, r2, #1
 	bl	ftl_memset
-	ldr	r3, [r5, #12]
-	ldr	r2, .L2879+28
-	ldr	r0, [r5, #4]
-	str	r3, [sp, #44]
-	str	r2, [r3]
-	ldr	r3, .L2879+8
-	ldrh	r2, [r3]
-	ldr	r3, .L2879+16
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	muls	r1, r2, r1
-	lsls	r1, r1, #2
-	bl	js_hash
-	ldr	r2, .L2879+32
-	ldr	r3, [sp, #44]
+.L2610:
+	ldr	r8, .L2642+48
+	ldr	r1, [sp, #12]
+	ldrb	fp, [r7]	@ zero_extendqisi2
+	ldrh	r3, [r8]
+	ldrh	r4, [r7, #2]
+	str	r3, [sp, #8]
+	ldr	r3, .L2642+12
+	ldr	r2, [r3]
+	ldr	r3, [r2, #4]
+	adds	r3, r3, #1
+	str	r3, [r2, #4]
+	ldr	r2, .L2642+8
+	stm	r2, {r1, r3}
+	ldr	r2, .L2642+16
 	ldr	r2, [r2]
-	str	r0, [r3, #4]
-	ldr	r2, [r2, #132]
-.L2874:
-	str	r2, [r3, #8]
-.L2801:
-	ldr	r3, .L2879
-	ldr	r2, .L2879+36
-	ldr	ip, [r3]
-	add	r3, sp, #72
-	add	r1, r3, r8, lsl #2
-	ldrb	r5, [ip, r7]	@ zero_extendqisi2
-	add	r3, r5, r5, lsl #1
-	add	r3, r2, r3, lsl #4
-	str	r3, [r1, #-24]
-	movs	r3, #48
-	mla	r2, r3, r5, r2
+	lsls	r2, r2, #19
+	bpl	.L2611
+	mov	r2, r4
+	mov	r1, fp
+	ldr	r0, .L2642+20
+	bl	printf
+.L2611:
+	ldr	r3, .L2642+24
+	ldrh	r0, [r5, #2]
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bhi	.L2612
+	ldr	r4, .L2642+28
+	ldr	fp, .L2642+44
+.L2616:
+	ldrb	r3, [r5, #1]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	cmp	r3, #7
+	strb	r3, [r5, #1]
+	bls	.L2613
+	ldr	r2, [r4]
+	movs	r3, #0
+	adds	r2, r2, #40
+.L2628:
+	ldrb	r1, [r2], #1	@ zero_extendqisi2
+	uxth	r10, r3
+	cmp	r1, #128
+	bls	.L2614
+	cmp	r1, #255
+	beq	.L2615
+	mov	r2, #748
+	mov	r1, fp
+	ldr	r0, .L2642+32
+	bl	printf
+.L2614:
+	strb	r10, [r5, #1]
+	mov	r10, #1
+.L2613:
+	ldr	r3, [r4]
+	ldrb	r2, [r5, #1]	@ zero_extendqisi2
+	add	r3, r3, r2
+	ldrb	r3, [r3, #40]	@ zero_extendqisi2
+	cmp	r3, #255
+	strb	r3, [r5]
+	beq	.L2616
+	ldrh	r4, [r8]
+	movs	r0, #0
+	muls	r4, r3, r4
+	mov	r1, r4
+	bl	flash_erase_block
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	mov	r1, r4
+	ldr	r2, .L2642+36
+	movs	r0, #0
+	str	r3, [sp]
+	ldr	r3, .L2642+8
+	bl	ftl_prog_page
 	movs	r3, #1
-	strh	r3, [r2, #34]	@ movhi
-	ldr	r3, .L2879+40
-	strb	r6, [r2, #45]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #3
-	bne	.L2811
-	ldr	r3, [sp, #36]
-	ldr	r0, .L2879+44
-	umull	r0, r1, r3, r0
-	ldr	r0, [sp, #28]
-	lsrs	r3, r1, #1
-	uxtah	r1, fp, r3
-	add	r3, r3, r3, lsl #1
-	add	r1, r0, r1, lsl #1
-	ldrh	r0, [r1, #96]
-	ldr	r1, .L2879+48
-	ldrh	r1, [r1]
-	muls	r1, r0, r1
-	ldrh	r0, [r2, #32]
-	orr	r1, r1, r10
-	str	r1, [r2, #24]
-	ldr	r2, .L2879+52
-	ldr	lr, [r2]
-	ldr	r2, [sp, #36]
-	subs	r3, r2, r3
-	lsls	r3, r3, #24
-	add	r3, r3, #16777216
-	orrs	r1, r1, r3
-	str	r1, [lr, r0, lsl #2]
-.L2812:
-	ldr	r3, .L2879+56
-	ldr	r3, [r3]
-	lsls	r3, r3, #23
-	bpl	.L2815
-	ldr	r3, .L2879+4
-	movs	r2, #48
-	ldr	r0, .L2879+60
-	ldrb	r1, [r3, #6]	@ zero_extendqisi2
-	ldr	r3, .L2879+36
-	mla	r5, r2, r5, r3
-	ldr	r2, .L2879+44
-	ldr	r3, [r5, #12]
-	ldr	r3, [r3, #4]
-	str	r3, [sp, #20]
-	ldr	r3, [sp, #36]
-	umull	r2, r3, r3, r2
-	mov	r2, r6
-	ubfx	r3, r3, #1, #16
-	add	r3, r3, fp
-	str	r3, [sp, #16]
-	ldrb	r3, [r5, #1]	@ zero_extendqisi2
-	str	r3, [sp, #12]
-	ldrh	r3, [r5, #32]
-	str	r3, [sp, #8]
-	ldr	r3, [r5, #24]
-	str	r3, [sp, #4]
-	ldrb	r3, [ip, r7]	@ zero_extendqisi2
+	add	r4, r4, r3
+	strh	r3, [r5, #2]	@ movhi
+.L2617:
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	mov	r1, r4
+	ldr	r2, .L2642+36
+	movs	r0, #0
 	str	r3, [sp]
-	mov	r3, r1
-	mov	r1, r8
+	ldr	r3, .L2642+8
+	bl	ftl_prog_page
+	ldrh	r3, [r5, #2]
+	adds	r0, r0, #1
+	add	r3, r3, #1
+	strh	r3, [r5, #2]	@ movhi
+	ldr	r3, .L2642+40
+	beq	.L2618
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	cbz	r2, .L2619
+.L2618:
+	movs	r2, #0
+	strb	r2, [r3]
+	b	.L2610
+.L2612:
+	ldr	r3, [sp, #8]
+	mla	r4, fp, r3, r4
+	cmp	r0, #0
+	bne	.L2617
+	mov	r1, r4
+	bl	flash_erase_block
+	b	.L2617
+.L2619:
+	cmp	r10, #0
+	bne	.L2620
+.L2627:
+	ldrb	r3, [r5]	@ zero_extendqisi2
+	cmp	r3, #255
+	bne	.L2641
+	mov	r2, #784
+	ldr	r1, .L2642+44
+	ldr	r0, .L2642+32
 	bl	printf
-.L2815:
-	ldr	r3, [sp, #40]
-	adds	r3, r3, #1
-	b	.L2875
-.L2803:
-	ldr	r3, .L2879+20
-	movs	r1, #1
-	mov	r0, r5
-	ldr	r3, [r3]
-	ldr	r3, [r3, r7, lsl #2]
-	str	r3, [r5, #24]
-	bl	sblk_read_page
-	ldr	r3, [r5, #36]
-	adds	r1, r3, #1
-	beq	.L2804
-	cmp	r3, #512
-	bne	.L2808
-.L2804:
-	ldr	r3, .L2879+64
-	ldrh	r2, [r3]
-	movs	r3, #1
-	rsb	r0, r2, #21
-	lsls	r3, r3, r0
-	ldr	r0, [r5, #24]
-	subs	r3, r3, #1
-	lsrs	r0, r0, r2
-	ldr	r2, .L2879+68
-	ands	r0, r0, r3
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	bl	__aeabi_uidiv
-	movs	r1, #0
-	uxth	r0, r0
-	bl	ftl_sblk_dump
-	ldr	r3, [r5, #36]
-	adds	r2, r3, #1
-	beq	.L2806
-	cmp	r3, #512
-	bne	.L2808
-.L2806:
-	ldr	r3, [r5, #12]
-	mov	r2, #-1
-	str	r2, [r3, #4]
-	ldr	r3, [r5, #36]
-	cmp	r3, r2
-	beq	.L2807
-	cmp	r3, #512
-	bne	.L2808
-.L2807:
-	movw	r2, #671
-	ldr	r1, .L2879+72
-	ldr	r0, .L2879+76
+.L2641:
+	movs	r0, #0
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2620:
+	ldrb	r4, [r5, #1]	@ zero_extendqisi2
+	ldr	r6, .L2642+28
+	ldr	r7, .L2642+44
+	adds	r4, r4, #1
+.L2623:
+	cmp	r4, #7
+	bhi	.L2627
+	ldr	r3, [r6]
+	add	r3, r3, r4
+	ldrb	r8, [r3, #40]	@ zero_extendqisi2
+	uxth	r3, r8
+	cmp	r3, #128
+	bls	.L2624
+	cmp	r3, #255
+	beq	.L2625
+	movw	r2, #777
+	mov	r1, r7
+	ldr	r0, .L2642+32
 	bl	printf
-.L2809:
-	b	.L2809
-.L2808:
-	ldr	r3, [r5, #12]
-	ldr	r2, .L2879+80
-	ldr	r1, [r3, #4]
-	ldr	r2, [r2]
-	cmp	r1, r2
-	itt	cs
-	movcs	r2, #-1
-	strcs	r2, [r3, #4]
-	ldr	r2, .L2879+12
-	ldr	r1, [r3, #4]
-	ldr	r2, [r2]
-	str	r1, [r2, r7, lsl #2]
-	ldr	r2, [r5, #24]
-	b	.L2874
-.L2811:
-	cmp	r3, #2
-	bne	.L2813
-	ldr	r3, .L2879+84
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L2814
-	ldr	r1, [sp, #28]
-	add	r3, r8, fp
-	add	r3, r1, r3, lsl #1
-	ldr	r1, .L2879+48
-	ldrh	r3, [r3, #96]
-	ldrh	r1, [r1]
-	mla	r3, r1, r3, r10
-.L2876:
-	orr	r3, r3, #33554432
-	str	r3, [r2, #24]
-.L2813:
-	ldr	r2, .L2879+36
-	movs	r3, #48
-	mla	r3, r3, r5, r2
-	ldr	r2, [r3, #24]
-	ldrh	r1, [r3, #32]
-	ldr	r3, .L2879+52
-	ldr	r3, [r3]
-	str	r2, [r3, r1, lsl #2]
-	b	.L2812
-.L2814:
-	ldr	r3, [sp, #36]
-	ldr	r1, [sp, #28]
-	add	r3, fp, r3, lsr #1
-	add	r3, r1, r3, lsl #1
-	ldr	r1, .L2879+48
-	ldrh	r3, [r3, #96]
-	ldrh	r1, [r1]
-	mla	r3, r1, r3, r10
-	ldr	r1, [sp, #36]
-	and	r1, r1, #1
-	add	r3, r3, r1
-	b	.L2876
-.L2880:
+.L2624:
+	ldr	r3, .L2642+48
+	movs	r0, #0
+	ldrh	r1, [r3]
+	mul	r1, r8, r1
+	bl	flash_erase_block
+.L2625:
+	adds	r4, r4, #1
+	uxth	r4, r4
+	b	.L2623
+.L2615:
+	adds	r3, r3, #1
+	cmp	r3, #8
+	bne	.L2628
+	mov	r10, r3
+	b	.L2614
+.L2643:
 	.align	2
-.L2879:
-	.word	.LANCHOR65
-	.word	.LANCHOR59
-	.word	.LANCHOR68
-	.word	.LANCHOR107
-	.word	.LANCHOR69
-	.word	.LANCHOR108
-	.word	.LANCHOR45
-	.word	-178307901
-	.word	.LANCHOR60
-	.word	.LANCHOR36
-	.word	.LANCHOR64
-	.word	-1431655765
-	.word	.LANCHOR75
-	.word	.LANCHOR109
-	.word	.LANCHOR22
-	.word	.LC152
-	.word	.LANCHOR71
-	.word	.LANCHOR70
-	.word	.LANCHOR170
+.L2642:
+	.word	.LANCHOR123
+	.word	.LANCHOR179
+	.word	.LANCHOR178
+	.word	.LANCHOR102
+	.word	.LANCHOR14
+	.word	.LC143
+	.word	.LANCHOR85
+	.word	.LANCHOR27
 	.word	.LC0
-	.word	.LANCHOR47
-	.word	.LANCHOR74
-.L2817:
-	ldr	r3, .L2881
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	ldr	r3, [sp, #48]
-	cbz	r1, .L2819
-	movs	r1, #0
-.L2822:
-	strb	r1, [r3, #44]
-	add	r0, sp, #48
-	add	r1, sp, #60
-	bl	sblk_xlc_prog_pages
-.L2823:
-	ldr	r3, [sp, #28]
-	ldr	r1, .L2881
-	ldrb	r2, [r3, #89]	@ zero_extendqisi2
-	ldrb	r1, [r1]	@ zero_extendqisi2
-	uxth	r3, r2
-	cmp	r1, #0
-	beq	.L2825
-	add	r3, r3, r3, lsl #1
-.L2826:
-	ldr	r1, .L2881+4
-	ldr	r0, [r1]
-	ldr	r1, [r0, #52]
-	add	r1, r1, r3
-	str	r1, [r0, #52]
-	ldr	r1, .L2881+8
-	ldrh	r0, [r1, #310]
-	add	r3, r3, r0
-	uxth	r3, r3
-	strh	r3, [r1, #310]	@ movhi
-	ldr	r1, .L2881+12
-	ldrh	r1, [r1]
-	muls	r2, r1, r2
-	cmp	r3, r2
-	itttt	ge
-	ldrge	r3, .L2881+16
-	movge	r2, #0
-	ldrge	r3, [r3]
-	strhge	r2, [r3, #86]	@ movhi
-	bl	gc_write_completed
-	b	.L2776
-.L2819:
-	cmp	r6, #1
-	bne	.L2821
-	movs	r1, #9
-	b	.L2822
-.L2821:
-	cmp	r6, #2
-	it	eq
-	moveq	r1, #13
-	b	.L2822
-.L2824:
-	add	r4, sp, #72
-	add	r5, sp, #72
-	add	r4, r4, r1, lsl #2
-	add	r1, r5, r1, lsl #2
-	ldr	r1, [r1, #-20]
-	ldr	r4, [r4, #-24]
-	ldrb	r1, [r1, #1]	@ zero_extendqisi2
-	strb	r1, [r4]
-	b	.L2818
-.L2825:
-	ldr	r1, .L2881+20
-	ldrb	r1, [r1]	@ zero_extendqisi2
-	cmp	r1, #0
-	beq	.L2826
-	lsls	r3, r3, #1
-	uxth	r3, r3
-	b	.L2826
-.L2882:
-	.align	2
-.L2881:
-	.word	.LANCHOR66
-	.word	.LANCHOR46
-	.word	.LANCHOR59
-	.word	.LANCHOR68
-	.word	.LANCHOR60
-	.word	.LANCHOR74
-	.size	gc_do_copy_back, .-gc_do_copy_back
-	.section	.text.do_gc,"ax",%progbits
+	.word	ftl_info_data_buffer
+	.word	.LANCHOR181
+	.word	.LANCHOR180
+	.word	.LANCHOR103
+	.size	ftl_info_flush, .-ftl_info_flush
+	.section	.text.ftl_info_blk_init,"ax",%progbits
 	.align	1
-	.global	do_gc
+	.global	ftl_info_blk_init
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	do_gc, %function
-do_gc:
+	.type	ftl_info_blk_init, %function
+ftl_info_blk_init:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r1, .L3019
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #24
-	ldr	r5, .L3019+4
-	mov	r10, r1
-	ldr	r3, [r1]
-	ldr	r7, .L3019+8
-	ldrb	r2, [r5]	@ zero_extendqisi2
-	ldrh	r4, [r3, #116]
-	ldrh	r6, [r3, #114]
-	mov	r8, r7
-	ldr	fp, [r7]
-	add	r6, r6, r4
-	uxth	r6, r6
-	cmp	r2, #6
-	bhi	.L2883
-	tbh	[pc, r2, lsl #1]
-.L2886:
-	.2byte	(.L2885-.L2886)/2
-	.2byte	(.L2887-.L2886)/2
-	.2byte	(.L2888-.L2886)/2
-	.2byte	(.L2889-.L2886)/2
-	.2byte	(.L2890-.L2886)/2
-	.2byte	(.L2891-.L2886)/2
-	.2byte	(.L2892-.L2886)/2
-	.p2align 1
-.L2885:
-	ldrh	r2, [r3, #118]
-	ldrh	r1, [fp, #80]
-	ldr	r7, .L3019+12
-	add	r4, r4, r2
-	movw	r2, #65535
-	cmp	r1, r2
-	uxth	r4, r4
-	beq	.L2893
-	ldr	r3, .L3019+16
-	cmp	r4, #7
-	ite	hi
-	movhi	r8, #3
-	movls	r8, #1
-	ldr	r3, [r3]
-	lsls	r3, r3, #23
-	bpl	.L2895
-	ldrh	r3, [fp, #122]
-	movw	r1, #1348
-	ldrb	r2, [r7]	@ zero_extendqisi2
-	ldr	r0, .L3019+20
-	str	r3, [sp, #12]
-	ldrh	r3, [fp, #120]
-	str	r3, [sp, #8]
-	ldrh	r3, [fp, #124]
-	str	r4, [sp]
-	str	r3, [sp, #4]
-	mov	r3, r6
-	bl	printf
-.L2895:
-	movs	r2, #1
-	mov	r1, r8
-	ldrb	r0, [r7]	@ zero_extendqisi2
-	bl	gc_search_src_blk
-	cmp	r0, #0
-	ble	.L2883
-.L2896:
-	movs	r3, #1
-.L3014:
-	strb	r3, [r5]
-	b	.L2883
-.L2893:
-	ldrh	r2, [r3, #122]
-	cmp	r0, #1
-	ldrh	r3, [r3, #124]
-	str	r3, [sp, #16]
-	bne	.L2897
-	str	r2, [sp, #20]
-	bl	gc_scan_static_data
-	bl	gc_static_wearleveling
-	ldr	r2, [sp, #20]
-.L2897:
-	ldr	r1, [r8]
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #0
+	ldr	r3, .L2672
+	mov	r1, r4
+	ldr	r2, .L2672+4
+	strb	r4, [r3]
 	movs	r3, #1
-	strb	r3, [r7]
-	ldrh	fp, [r1, #124]
-	cmp	fp, #0
-	beq	.L2898
-	strb	r3, [r5]
-	movs	r2, #0
-	ldr	r3, .L3019+16
-	strb	r2, [r7]
-	ldr	r3, [r3]
-	lsls	r0, r3, #23
-	bpl	.L2883
-	ldrh	r3, [r1, #122]
-	ldr	r0, .L3019+20
+	ldr	r0, .L2672+8
+	strb	r3, [r2]
+	ldr	r2, .L2672+12
+	ldr	r5, .L2672+16
+	ldr	r6, .L2672+20
+	strb	r3, [r2]
+	mov	r2, #16384
+	ldr	r3, .L2672+24
+	str	r0, [r3]
+	ldr	r3, .L2672+28
+	ldrh	r3, [r3]
+	add	r3, r0, r3, lsl #2
+	str	r3, [r5]
+	bl	ftl_memset
+	mov	r2, #16384
+	mov	r1, r4
+	ldr	r0, .L2672+32
+	bl	ftl_memset
+	ldr	r2, [r6]
+	ldr	r3, .L2672+36
+	ldrb	r2, [r2, #40]	@ zero_extendqisi2
+	strb	r4, [r3, #1]
+	strh	r4, [r3, #2]	@ movhi
+	movs	r4, #7
+	strb	r2, [r3]
 	str	r3, [sp, #12]
-	ldrh	r3, [r1, #120]
-	movw	r1, #1373
-	stm	sp, {r4, fp}
-	str	r3, [sp, #8]
-	mov	r3, r6
+.L2646:
+	ldr	r3, [r6]
+	sxth	r8, r4
+	add	r3, r3, r4
+	ldrb	r7, [r3, #40]	@ zero_extendqisi2
+	cmp	r7, #255
+	bne	.L2645
+.L2650:
+	adds	r4, r4, #-1
+	bcs	.L2646
+	mov	r8, #0
+.L2647:
+	ldr	r3, .L2672+40
+	ldr	r2, [r3]
+	mov	r10, r3
+	tst	r2, #4096
+	beq	.L2651
+	ldr	r3, [r5]
+	mov	r2, #4800
+	mov	r1, r4
+	ldr	r0, .L2672+44
+	ldr	r3, [r3]
 	bl	printf
-.L2883:
-	add	sp, sp, #24
+.L2651:
+	adds	r2, r4, #1
+	bne	.L2652
+	mov	r2, #16384
+	movs	r1, #0
+	ldr	r0, .L2672+8
+	bl	ftl_memset
+	ldr	r3, [r5]
+	ldr	r2, .L2672+48
+	str	r2, [r3]
+	ldr	r2, .L2672+52
+	str	r2, [r3, #12]
+.L2644:
+	mov	r0, r4
+	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2898:
-	cmp	r6, #47
-	bhi	.L2900
-	cmp	r4, #1
-	bls	.L2901
-	cmp	r4, #16
-	bhi	.L2902
-	ldr	r2, [r10]
-	ldrh	r2, [r2, #120]
-	cmp	r2, #127
-	bhi	.L2903
-.L2902:
-	movs	r2, #16
-	movs	r1, #3
-.L3018:
-	movs	r0, #1
-.L3012:
-	bl	gc_search_src_blk
-	uxth	r0, r0
-.L2904:
-	cmp	r0, #0
-	bne	.L2896
-	b	.L2883
-.L2903:
-	movs	r2, #8
-	movs	r1, #2
-	b	.L3018
-.L2901:
-	ldr	r3, .L3019+16
-	strb	fp, [r7]
+.L2645:
+	ldr	r3, .L2672+56
+	movs	r0, #0
+	ldr	fp, .L2672+68
+	ldr	r2, .L2672+8
+	ldrh	r3, [r3]
+	muls	r7, r3, r7
+	ldrb	r3, [fp]	@ zero_extendqisi2
+	str	r3, [sp]
+	mov	r1, r7
+	ldr	r3, .L2672+60
+	bl	ftl_read_page
+	cmp	r0, #-1
+	mov	r10, r0
+	bne	.L2648
+	ldrb	r3, [fp]	@ zero_extendqisi2
+	adds	r1, r7, #1
+	ldr	r2, .L2672+8
+	movs	r0, #0
+	str	r3, [sp]
+	ldr	r3, .L2672+60
+	bl	ftl_read_page
+	mov	r10, r0
+.L2648:
+	ldr	r3, .L2672+40
 	ldr	r3, [r3]
-	lsls	r3, r3, #23
-	bpl	.L2905
-	ldrh	r3, [r1, #122]
-	mov	r2, fp
-	ldr	r0, .L3019+20
-	str	r3, [sp, #12]
-	ldrh	r3, [r1, #120]
-	movw	r1, #1386
-	stm	sp, {r4, fp}
-	str	r3, [sp, #8]
-	mov	r3, r6
-	bl	printf
-.L2905:
-	cmp	r6, #16
-	bls	.L2906
-	movs	r2, #1
-.L3017:
-	movs	r1, #2
-.L3011:
-	ldrb	r0, [r7]	@ zero_extendqisi2
-	b	.L3012
-.L2906:
-	movs	r2, #16
-.L2920:
-	movs	r1, #1
-	b	.L3011
-.L2900:
-	ldr	r1, [sp, #16]
-	cmp	r6, #127
-	add	r2, r2, r1
-	uxth	r2, r2
-	str	r2, [sp, #16]
-	bhi	.L2907
-	subs	r2, r4, #2
-	cmp	r2, #13
-	bhi	.L2908
-	movs	r2, #8
-	movs	r1, #2
-	mov	r0, r3
-	bl	gc_search_src_blk
-	uxth	r0, r0
-	cmp	r0, #0
-	bne	.L2896
-.L2911:
-	ldr	r3, .L3019+24
-	ldr	fp, .L3019+36
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #2
-	ldr	r3, .L3019+16
-	bne	.L3009
-	cmp	r4, #1
-	mov	r2, #0
-	strh	r2, [fp, #30]	@ movhi
-	bls	.L2912
-.L2915:
+	lsls	r1, r3, #19
+	bpl	.L2649
+	ldr	r3, [r5]
+	mov	r2, r10
+	mov	r1, r4
+	ldr	r0, .L2672+64
 	ldr	r3, [r3]
-	movs	r2, #1
-	strb	r2, [r7]
-	lsls	r0, r3, #23
-	bpl	.L2914
-	ldr	r3, [r8]
-	ldr	r0, .L3019+20
-	ldrh	r1, [r3, #122]
-	str	r1, [sp, #12]
-	ldrh	r1, [r3, #120]
-	str	r1, [sp, #8]
-	movw	r1, #1411
-	ldrh	r3, [r3, #124]
-	str	r4, [sp]
-	str	r3, [sp, #4]
-	mov	r3, r6
+	str	r3, [sp]
+	mov	r3, #672
 	bl	printf
-.L2914:
-	ldrh	r3, [fp, #30]
-	movs	r2, #16
-	movs	r1, #1
-	ldrb	r0, [r7]	@ zero_extendqisi2
-	adds	r3, r3, #1
-	strh	r3, [fp, #30]	@ movhi
-	movs	r3, #0
-	strh	r3, [fp, #28]	@ movhi
-	bl	gc_search_src_blk
-	uxth	r0, r0
-	cmp	r0, #7
-	bhi	.L2916
-	cmp	r4, #31
-	bls	.L2917
-.L2916:
-	ldr	r3, [r10]
-	ldrh	r2, [r3, #120]
-	ldr	r3, .L3019+28
-	ldrh	r3, [r3]
-	cmp	r2, r3
-	bls	.L2904
-.L2917:
-	ldr	r3, [sp, #16]
-	cmp	r3, #63
-	bhi	.L2918
-	movs	r2, #8
-	b	.L3017
-.L2908:
-	ldr	r3, .L3019+32
-	ldr	r2, [sp, #16]
+.L2649:
+	cmp	r10, #-1
+	beq	.L2650
+	ldr	r3, [r5]
+	ldr	r2, .L2672+48
+	ldr	r3, [r3]
+	cmp	r3, r2
+	bne	.L2650
+	mov	r4, r8
+	b	.L2647
+.L2652:
+	ldr	r3, [r6]
+	movs	r0, #0
+	ldr	r2, .L2672+8
+	movs	r4, #0
+	add	r3, r3, r8
+	ldrb	r1, [r3, #40]	@ zero_extendqisi2
+	ldr	r3, [sp, #12]
+	strb	r8, [r3, #1]
+	strb	r1, [r3]
+	movs	r3, #4
+	str	r3, [sp]
+	ldr	r3, .L2672+60
+	bl	flash_get_last_written_page
+	uxth	r6, r0
+	mov	r7, r0
+	adds	r3, r6, #1
+	uxth	r8, r3
+	ldr	r3, [sp, #12]
+	ldrb	fp, [r3]	@ zero_extendqisi2
+	ldr	r3, .L2672+56
 	ldrh	r3, [r3]
-	cmp	r2, r3, lsr #1
-	bcs	.L2911
-	b	.L2883
-.L3009:
-	cmp	r4, #1
-	bls	.L2912
-	ldrh	r2, [fp, #30]
-	cmp	r2, #3
-	bls	.L2915
-.L2912:
+	mul	fp, r3, fp
+.L2654:
+	subs	r3, r6, r4
+	lsls	r3, r3, #16
+	bmi	.L2658
+	ldr	r3, .L2672+68
+	add	r1, r7, fp
+	ldr	r2, .L2672+8
+	subs	r1, r1, r4
+	movs	r0, #0
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r3, [sp]
+	ldr	r3, .L2672+60
+	bl	ftl_read_page
+	adds	r0, r0, #1
+	beq	.L2655
+	ldr	r3, [r5]
+	ldr	r2, .L2672+48
 	ldr	r3, [r3]
-	movs	r2, #0
-	strh	r2, [fp, #30]	@ movhi
-	strb	r2, [r7]
-	lsls	r1, r3, #23
-	bpl	.L2919
-	ldr	r3, [r8]
-	ldr	r0, .L3019+20
-	ldrh	r1, [r3, #122]
-	str	r1, [sp, #12]
-	ldrh	r1, [r3, #120]
-	str	r1, [sp, #8]
-	movw	r1, #1426
-	ldrh	r3, [r3, #124]
-	str	r4, [sp]
-	str	r3, [sp, #4]
-	mov	r3, r6
+	cmp	r3, r2
+	bne	.L2655
+.L2658:
+	ldr	r3, [sp, #12]
+	strh	r8, [r3, #2]	@ movhi
+	bl	ftl_tmp_into_update
+	ldr	r2, [r5]
+	movs	r0, #0
+	ldr	r3, [r2, #64]
+	adds	r3, r3, #1
+	str	r3, [r2, #64]
+	bl	ftl_info_flush
+	movs	r0, #0
+	bl	ftl_info_flush
+	ldr	r4, [r10]
+	ands	r4, r4, #16384
+	beq	.L2644
+	ldr	r3, [r5]
+	movs	r4, #0
+	ldr	r0, .L2672+72
+	ldr	r1, [r3, #156]
 	bl	printf
-.L2919:
-	ldr	r3, .L3019+32
-	ldr	r2, [sp, #16]
-	ldrh	r3, [r3]
-	cmp	r2, r3, lsr #1
-	bls	.L2883
-	cmp	r4, #31
-	mov	r2, #16
-	bhi	.L2920
-	b	.L3013
-.L2918:
-	movs	r2, #16
-.L3013:
-	movs	r1, #3
-	b	.L3011
-.L2907:
-	cmp	r6, #255
-	bhi	.L2921
-	ldr	r2, .L3019+32
-	ldr	r1, [sp, #16]
-	ldrh	r2, [r2]
-	cmp	r1, r2
-	bls	.L2921
-	cmp	r1, r2, lsr #1
-	bcc	.L2883
-	movs	r2, #16
-	mov	r1, r3
-	mov	r0, fp
-	strb	fp, [r7]
-	str	r3, [sp, #16]
-	bl	gc_search_src_blk
-	uxth	r0, r0
-	cmp	r0, #7
-	bhi	.L2896
-	cmp	r4, #4
-	bls	.L2904
-	ldr	r0, [r8]
-	movs	r2, #128
-	movs	r1, #255
-	strh	fp, [r0, #120]	@ movhi
-	adds	r0, r0, #136
-	bl	ftl_memset
-	ldr	r3, [sp, #16]
-	strb	r3, [r7]
-	ldr	r3, [r10]
-	ldrh	r2, [r3, #120]
-	ldr	r3, .L3019+28
-	ldrh	r3, [r3]
-	cmp	r2, r3
-	bls	.L2923
-	cmp	r4, #16
-	bls	.L2924
-.L2926:
-	movs	r2, #8
-	movs	r1, #2
-.L3010:
-	movs	r0, #1
-	bl	gc_search_src_blk
-	movs	r3, #1
-	uxth	r0, r0
-	strb	r3, [r5]
-	b	.L2904
-.L3020:
+	b	.L2644
+.L2655:
+	adds	r4, r4, #1
+	b	.L2654
+.L2673:
 	.align	2
-.L3019:
-	.word	.LANCHOR46
-	.word	.LANCHOR104
-	.word	.LANCHOR60
-	.word	.LANCHOR67
-	.word	.LANCHOR22
-	.word	.LC153
-	.word	.LANCHOR64
-	.word	.LANCHOR163
-	.word	.LANCHOR165
-	.word	.LANCHOR59
-.L2923:
-	cmp	r4, #32
-	bls	.L2924
-	movs	r2, #16
-	movs	r1, #1
-	b	.L3010
-.L2924:
-	cmp	r4, #7
-	bls	.L2926
-	movs	r2, #16
-	movs	r1, #3
-	b	.L3010
-.L2921:
-	subs	r4, r4, #2
-	cmp	r4, #5
-	bhi	.L2883
-	ldr	r3, .L3021
-	ldr	r2, [sp, #16]
-	ldrh	r3, [r3]
-	cmp	r2, r3, lsr #1
-	bls	.L2883
-	movs	r2, #16
-	movs	r1, #2
-	movs	r0, #1
-	bl	gc_search_src_blk
-	uxth	r0, r0
-	cmp	r0, #15
-	bhi	.L2896
-	ldrb	r0, [r7]	@ zero_extendqisi2
-	movs	r1, #0
-	ldr	r3, [r8]
-	add	r2, r0, #60
-	strh	r1, [r3, r2, lsl #1]	@ movhi
-	movs	r2, #128
-	mla	r0, r2, r0, r3
-	movs	r1, #255
-	adds	r0, r0, #136
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
-	b	ftl_memset
-.L2887:
-	ldr	r4, .L3021+4
-	movw	r3, #65535
-	ldrh	r2, [r4]
-	cmp	r2, r3
-	bne	.L2928
-	bl	gc_get_src_blk
-	strh	r0, [r4]	@ movhi
-.L2928:
-	ldrh	r3, [r4]
-	movw	r2, #65535
-	cmp	r3, r2
-	beq	.L2929
-	ldrh	r1, [r4, #52]
-	cbz	r1, .L2930
-	ldr	r0, .L3021+8
+.L2672:
+	.word	.LANCHOR182
+	.word	.LANCHOR181
+	.word	ftl_info_data_buffer
+	.word	.LANCHOR183
+	.word	.LANCHOR102
+	.word	.LANCHOR27
+	.word	.LANCHOR7
+	.word	.LANCHOR6
+	.word	ftl_ext_info_data_buffer
+	.word	.LANCHOR179
+	.word	.LANCHOR14
+	.word	.LC145
+	.word	1229739078
+	.word	393238
+	.word	.LANCHOR103
+	.word	.LANCHOR178
+	.word	.LC144
+	.word	.LANCHOR123
+	.word	.LC146
+	.size	ftl_info_blk_init, .-ftl_info_blk_init
+	.section	.text.ftl_ext_info_flush,"ax",%progbits
+	.align	1
+	.global	ftl_ext_info_flush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_ext_info_flush, %function
+ftl_ext_info_flush:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2690
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
+	ldr	r3, [r3]
+	ldr	r2, [r3, #520]
+	cbz	r2, .L2675
 	movs	r2, #0
-.L2931:
-	uxth	r4, r2
-	cmp	r1, r4
-	bhi	.L2932
-.L2930:
-	ldr	r2, .L3021+12
-	ldr	r2, [r2]
-	add	r2, r2, r3, lsl #2
-	ldrb	r2, [r2, #2]	@ zero_extendqisi2
-	and	r1, r2, #224
-	cmp	r1, #224
-	beq	.L2933
-	tst	r2, #192
-	bne	.L2934
-.L2933:
-	ldr	r2, .L3021+16
-	ldr	r2, [r2]
-	ldrh	r3, [r2, r3, lsl #1]
-	cbz	r3, .L2935
-	movw	r2, #1497
-	ldr	r1, .L3021+20
-	ldr	r0, .L3021+24
-	bl	printf
-.L2936:
-	b	.L2936
-.L2932:
-	ldrh	r4, [r0, #2]!
+	str	r2, [r3, #520]
+.L2675:
+	ldr	r5, .L2690+4
+	movs	r0, #0
+	bl	ftl_total_vpn_update
+	mov	r4, r5
+.L2679:
+	ldr	r3, [r5]
+	ldr	r2, [r3, #56]
 	adds	r2, r2, #1
-	cmp	r4, r3
-	bne	.L2931
-.L2935:
-	ldr	r3, .L3021+4
-	movw	r2, #65535
-	strh	r2, [r3]	@ movhi
-	b	.L2883
-.L2934:
-	movs	r3, #2
-	b	.L3014
-.L2929:
-	movs	r3, #0
-	b	.L3014
-.L2888:
-	bl	gc_scan_src_blk
-	adds	r0, r0, #1
-	bne	.L2937
-	movs	r3, #3
-	b	.L3014
-.L2937:
-	ldr	r4, .L3021+4
-	movw	r3, #65535
-	ldrh	r0, [r4]
-	cmp	r0, r3
-	beq	.L2896
-	ldrh	r3, [r4, #20]
-	cbz	r3, .L2938
-	movs	r3, #4
-	strb	r3, [r5]
-	movs	r3, #0
-	strh	r3, [r4, #22]	@ movhi
-	b	.L2883
-.L2938:
-	ldr	r6, .L3021+16
-	movs	r3, #1
-	strb	r3, [r5]
-	ldr	r3, [r6]
-	ldrh	r5, [r3, r0, lsl #1]
-	cbz	r5, .L2939
-	movw	r2, #1525
-	ldr	r1, .L3021+20
-	ldr	r0, .L3021+24
-	bl	printf
-.L2940:
-	b	.L2940
-.L2939:
-	bl	ftl_free_sblk
-	ldr	r3, [r6]
-	ldrh	r2, [r4]
-	strh	r5, [r3, r2, lsl #1]	@ movhi
-	ldrh	r3, [r4, #26]
-	adds	r3, r3, #1
-	uxth	r3, r3
-	cmp	r3, #8
-	strh	r3, [r4, #26]	@ movhi
-	bls	.L2935
-	strh	r5, [r4, #26]	@ movhi
-	bl	ftl_flush
-	bl	pm_flush
-	bl	ftl_ext_info_flush
-	mov	r0, r5
-	bl	ftl_info_flush
-	b	.L2935
-.L2889:
-	bl	gc_scan_src_blk_one_page
-	ldr	r4, .L3021+4
-	ldr	r3, .L3021+28
-	ldrh	r2, [r4, #2]
+	str	r2, [r3, #56]
+	ldrh	r2, [r3, #140]
+	ldr	r3, .L2690+8
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L2883
-	ldrh	r3, [r4, #20]
-	ldr	r2, .L3021+32
-	cbz	r3, .L2941
-	ldr	r2, [r2]
-	movs	r1, #4
-	strb	r1, [r5]
-	movs	r1, #0
-	strh	r1, [r4, #22]	@ movhi
-	tst	r2, #256
-	ldr	r5, .L3021+16
-	beq	.L2942
-	ldrh	r1, [r4]
-	ldr	r2, [r5]
-	ldr	r0, .L3021+36
-	ldrh	r2, [r2, r1, lsl #1]
-	bl	printf
-.L2942:
-	ldr	r3, [r5]
-	ldrh	r2, [r4]
-	ldrh	r2, [r3, r2, lsl #1]
-	ldrh	r3, [r4, #20]
+	bcc	.L2677
+	bl	ftl_ext_alloc_new_blk
+.L2677:
+	ldr	r3, [r4]
+	ldrh	r2, [r3, #130]
+	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2883
-	movw	r2, #1555
-	ldr	r1, .L3021+20
-	ldr	r0, .L3021+24
+	bne	.L2678
+	movw	r2, #1819
+	ldr	r1, .L2690+12
+	ldr	r0, .L2690+16
 	bl	printf
-.L2943:
-	b	.L2943
-.L2941:
-	ldr	r3, .L3021+12
-	ldrh	r1, [r4]
-	ldr	r6, [r3]
+.L2678:
+	ldr	r1, [r4]
+	ldr	r3, .L2690+20
+	ldr	r10, .L2690+36
+	ldrh	r0, [r1, #130]
+	ldrh	r3, [r3]
+	ldr	r8, .L2690+40
+	rsb	r2, r3, #21
 	movs	r3, #1
-	strb	r3, [r5]
-	ldr	r3, [r2]
-	add	r6, r6, r1, lsl #2
-	lsls	r2, r3, #23
-	bpl	.L2944
-	ldrb	r2, [r6, #2]	@ zero_extendqisi2
-	ldr	r0, .L3021+40
-	lsrs	r2, r2, #5
-	bl	printf
-.L2944:
-	ldrb	r3, [r6, #2]	@ zero_extendqisi2
-	and	r2, r3, #224
-	cmp	r2, #224
-	beq	.L2945
-	tst	r3, #192
-	bne	.L2946
-.L2945:
-	movw	r2, #1565
-	ldr	r1, .L3021+20
-	ldr	r0, .L3021+24
-	bl	printf
-.L2947:
-	b	.L2947
-.L2946:
-	ldrh	r0, [r4]
-	bl	ftl_free_sblk
-	movw	r3, #65535
-	strh	r3, [r4]	@ movhi
-	ldrh	r3, [r4, #26]
+	asr	r6, r0, r2
+	lsls	r3, r3, r2
+	ldr	r2, .L2690+24
+	subs	r3, r3, #1
+	ands	r3, r3, r0
+	mov	r0, r8
+	ldrh	r7, [r2]
+	ldrh	r2, [r1, #140]
+	movs	r1, #0
+	smlabb	r3, r7, r3, r2
+	ldrb	r2, [r10]	@ zero_extendqisi2
+	uxth	r7, r3
+	lsls	r2, r2, #1
+	bl	ftl_memset
+	movs	r3, #0
+	ldr	r2, .L2690+28
+	str	r3, [r8]
+	mov	r1, r7
+	ldr	r3, [r4]
+	uxtb	r0, r6
+	ldr	r3, [r3, #56]
+	str	r3, [r8, #4]
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	str	r3, [sp]
+	mov	r3, r8
+	bl	ftl_prog_page
+	ldr	r2, [r4]
+	ldrh	r3, [r2, #140]
 	adds	r3, r3, #1
 	uxth	r3, r3
-	cmp	r3, #8
-	strh	r3, [r4, #26]	@ movhi
-	bls	.L2883
-	movs	r3, #0
-	strh	r3, [r4, #26]	@ movhi
-.L3016:
-	add	sp, sp, #24
+	cmp	r3, #1
+	strh	r3, [r2, #140]	@ movhi
+	beq	.L2679
+	adds	r0, r0, #1
+	ldr	r3, .L2690+32
+	beq	.L2680
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	cbz	r0, .L2681
+.L2680:
+.L2676:
+	movs	r2, #0
+	strb	r2, [r3]
+	b	.L2679
+.L2681:
+	add	sp, sp, #12
 	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
-	b	flt_sys_flush
-.L2890:
-	ldrh	r7, [fp, #80]
-	movw	r3, #65535
-	cmp	r7, r3
-	bne	.L2948
-	ldr	r3, .L3021+44
-	ldrb	r4, [r3]	@ zero_extendqisi2
-	cmp	r4, #1
-	bne	.L2948
-	bl	ftl_flush
-	movs	r0, #5
-	bl	ftl_alloc_sblk
-	cmp	r0, r7
-	mov	r5, r0
-	bne	.L2949
-	movw	r2, #1581
-	ldr	r1, .L3021+20
-	ldr	r0, .L3021+24
-	bl	printf
-.L2950:
-	b	.L2950
-.L2949:
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.L2691:
+	.align	2
+.L2690:
+	.word	.LANCHOR10
+	.word	.LANCHOR102
+	.word	.LANCHOR85
+	.word	.LANCHOR184
+	.word	.LC0
+	.word	.LANCHOR66
+	.word	.LANCHOR103
+	.word	ftl_ext_info_data_buffer
+	.word	.LANCHOR183
+	.word	.LANCHOR123
+	.word	.LANCHOR178
+	.size	ftl_ext_info_flush, .-ftl_ext_info_flush
+	.section	.text.ftl_ext_info_init,"ax",%progbits
+	.align	1
+	.global	ftl_ext_info_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_ext_info_init, %function
+ftl_ext_info_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r2, #0
+	ldr	r3, .L2709
+	ldr	r5, .L2709+4
+	strh	r2, [r3]	@ movhi
+	ldr	r3, [r5]
+	ldrh	r2, [r3, #130]
+	ldr	r3, .L2709+8
+	ldrh	r4, [r3]
+	rsb	r3, r4, #21
+	movs	r4, #1
+	asr	r6, r2, r3
+	lsls	r4, r4, r3
+	uxtb	r10, r6
+	subs	r4, r4, #1
+	ands	r4, r4, r2
+	ldr	r2, .L2709+12
+	movs	r3, #4
 	mov	r1, r4
-	movs	r4, #0
+	str	r3, [sp]
+	mov	r0, r10
+	ldr	r3, .L2709+16
+	bl	flash_get_last_written_page
+	ldr	r3, .L2709+20
+	mov	r7, r0
+	ldr	r3, [r3]
+	lsls	r1, r3, #19
+	bpl	.L2693
+	ldr	r3, [r5]
+	uxth	r6, r6
+	movw	r2, #1863
+	ldr	r1, .L2709+24
+	ldrh	r3, [r3, #130]
+	str	r6, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r0
+	ldr	r0, .L2709+28
+	bl	printf
+.L2693:
+	ldr	fp, .L2709+48
+	mov	r8, #0
+.L2694:
+	uxth	r6, r7
+	sub	r3, r6, r8
+	lsls	r3, r3, #16
+	bmi	.L2699
+	ldr	r3, .L2709+32
+	sub	r1, r7, r8
+	ldr	r2, .L2709+12
+	ldrh	r0, [r3]
+	ldr	r3, .L2709+36
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	mla	r1, r4, r0, r1
+	mov	r0, r10
+	str	r3, [sp]
+	ldr	r3, .L2709+16
+	bl	flash_read_page_en
+	adds	r2, r0, #1
+	beq	.L2695
+	cmp	r0, #512
+	beq	.L2695
+	ldr	r3, .L2709+40
+	ldr	r3, [r3]
+	ldr	r3, [r3]
+	cmp	r3, fp
+	bne	.L2695
+.L2699:
+	bl	zftl_sblk_list_init
+	ldr	r3, [r5]
+	ldrh	r2, [r3, #140]
+	cmp	r2, r7
+	bgt	.L2697
+	adds	r6, r6, #1
+	strh	r6, [r3, #140]	@ movhi
+	bl	ftl_ext_info_flush
+.L2697:
+	ldr	r3, .L2709+40
+	movw	r2, #65535
+	movs	r0, #0
+	ldr	r3, [r3]
+	strh	r2, [r3, #584]	@ movhi
+	strh	r2, [r3, #586]	@ movhi
+	strh	r2, [r3, #588]	@ movhi
+	strh	r2, [r3, #590]	@ movhi
+	str	r2, [r3, #560]
+	mov	r2, #-1
+	str	r0, [r3, #520]
+	str	r0, [r3, #604]
+	str	r0, [r3, #608]
+	str	r2, [r3, #564]
+	ldr	r3, .L2709+44
+	strh	r2, [r3]	@ movhi
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2695:
+	add	r8, r8, #1
+	b	.L2694
+.L2710:
+	.align	2
+.L2709:
+	.word	.LANCHOR113
+	.word	.LANCHOR102
+	.word	.LANCHOR66
+	.word	ftl_ext_info_data_buffer
+	.word	.LANCHOR178
+	.word	.LANCHOR14
+	.word	.LANCHOR185
+	.word	.LC147
+	.word	.LANCHOR103
+	.word	.LANCHOR123
+	.word	.LANCHOR10
+	.word	.LANCHOR64
+	.word	1162432070
+	.size	ftl_ext_info_init, .-ftl_ext_info_init
+	.section	.text.ftl_low_format_data_init,"ax",%progbits
+	.align	1
+	.global	ftl_low_format_data_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_low_format_data_init, %function
+ftl_low_format_data_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r2, #16384
+	movs	r1, #0
+	ldr	r5, .L2713
+	ldr	r0, .L2713+4
+	bl	ftl_memset
+	bl	zftl_sblk_list_init
+	movs	r0, #1
+	bl	ftl_alloc_sblk
+	movs	r1, #0
+	mov	r6, r0
 	bl	ftl_erase_sblk
-	movs	r3, #5
-	add	r1, fp, #96
-	strb	r3, [fp, #84]
-	mov	r0, r5
+	ldr	r1, [r5]
+	mov	r0, r6
+	add	r1, r1, #672
 	bl	ftl_get_blk_list_in_sblk
-	ldr	r3, .L3021+28
-	uxtb	r0, r0
-	ldr	r6, .L3021+48
+	ldr	r3, [r5]
+	movs	r2, #0
+	ldrh	r7, [r3, #672]
+	strh	r2, [r3, #690]	@ movhi
+	movw	r2, #65533
+	subs	r3, r7, #1
+	uxth	r3, r3
+	cmp	r3, r2
+	bls	.L2712
+	movw	r2, #2053
+	ldr	r1, .L2713+8
+	ldr	r0, .L2713+12
+	bl	printf
+.L2712:
+	ldr	r0, [r5]
+	movs	r4, #0
+	mov	r2, #256
 	movs	r1, #255
-	strb	r0, [fp, #89]
-	ldrh	r3, [r3]
-	strh	r5, [fp, #80]	@ movhi
-	strh	r4, [fp, #82]	@ movhi
-	strb	r4, [fp, #85]
-	smulbb	r0, r3, r0
-	strh	r4, [fp, #90]	@ movhi
-	ldrb	r2, [r6]	@ zero_extendqisi2
-	strh	r0, [fp, #86]	@ movhi
-	ldr	fp, .L3021+64
-	ldrh	r3, [fp]
-	muls	r2, r3, r2
-	ldr	r3, .L3021+52
-	ldr	r0, [r3]
-	lsls	r2, r2, #2
+	strh	r4, [r0, #696]	@ movhi
+	add	r0, r0, #416
 	bl	ftl_memset
-	ldrh	r3, [fp]
+	ldr	r0, [r5]
+	mov	r1, r4
+	mov	r2, #4096
+	add	r0, r0, #704
+	bl	ftl_memset
+	ldr	r2, .L2713+16
+	ldr	r3, [r5]
+	ldrh	r2, [r2]
+	strh	r7, [r3, #692]	@ movhi
+	strh	r6, [r3, #416]	@ movhi
+	rsb	r2, r2, #21
+	asr	r2, r7, r2
+	ldr	r7, .L2713+20
+	strh	r2, [r3, #694]	@ movhi
+	movs	r2, #1
+	strh	r2, [r3, #688]	@ movhi
+	ldr	r2, .L2713+24
+	ldrh	r2, [r2]
+	strh	r2, [r3, #698]	@ movhi
+	ldr	r2, .L2713+28
+	ldr	r3, [r7]
+	str	r2, [r3]
+	bl	ftl_alloc_sys_blk
+	mov	r1, r4
+	mov	r6, r0
+	bl	ftl_erase_phy_blk
+	ldr	r3, [r5]
+	movs	r1, #2
+	ldr	r0, [r7]
+	strh	r6, [r3, #130]	@ movhi
+	movw	r6, #65535
+	strh	r4, [r3, #140]	@ movhi
+	adds	r0, r0, #16
+	strh	r6, [r0, #568]	@ movhi
+	strh	r6, [r0, #570]	@ movhi
+	strh	r6, [r0, #572]	@ movhi
+	strh	r6, [r0, #574]	@ movhi
+	bl	ftl_open_sblk_init
+	ldr	r0, [r7]
+	movs	r1, #3
+	adds	r0, r0, #48
+	bl	ftl_open_sblk_init
+	ldr	r3, [r5]
 	movs	r1, #255
-	ldrb	r2, [r6]	@ zero_extendqisi2
-	muls	r2, r3, r2
-	ldr	r3, .L3021+56
-	ldr	r0, [r3]
-	lsls	r2, r2, #2
+	ldr	r0, [r7]
+	ldrh	r2, [r3, #134]
+	adds	r0, r0, #136
+	strh	r4, [r0, #-12]	@ movhi
+	strh	r4, [r0, #-16]	@ movhi
+	strh	r2, [r0, #-10]	@ movhi
+	mov	r2, #-1
+	strh	r4, [r0, #-14]	@ movhi
+	strh	r6, [r0, #-56]	@ movhi
+	strh	r6, [r0, #-6]	@ movhi
+	str	r2, [r0, #408]
+	strh	r2, [r3, #126]	@ movhi
+	mov	r2, #256
+	str	r4, [r0, #384]
+	str	r4, [r0, #388]
+	str	r4, [r0, #392]
 	bl	ftl_memset
-	ldrh	r3, [fp]
+	ldr	r0, [r7]
+	movs	r2, #128
 	movs	r1, #255
-	ldrb	r2, [r6]	@ zero_extendqisi2
-	muls	r2, r3, r2
-	ldr	r3, .L3021+60
-	ldr	r0, [r3]
+	add	r0, r0, #392
 	bl	ftl_memset
-	ldr	r3, [r8]
-	strh	r7, [r3, #128]	@ movhi
-	strh	r7, [r3, #130]	@ movhi
-	str	r5, [r3, #132]
-	bl	pm_flush
 	bl	ftl_ext_info_flush
-	ldr	r3, [r10]
-	mov	r2, #-1
 	mov	r0, r4
-	strh	r5, [r3, #126]	@ movhi
-	ldr	r3, .L3021+4
-	strh	r4, [r3, #310]	@ movhi
-	strh	r4, [r3, #52]	@ movhi
-	strh	r4, [r3, #312]	@ movhi
-	strh	r4, [r3, #314]	@ movhi
-	str	r2, [r3, #316]
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
-	b	ftl_info_flush
-.L3022:
+	bl	ftl_info_flush
+	bl	ftl_info_blk_init
+	mov	r0, r4
+	pop	{r3, r4, r5, r6, r7, pc}
+.L2714:
 	.align	2
-.L3021:
-	.word	.LANCHOR165
-	.word	.LANCHOR59
-	.word	.LANCHOR59+52
-	.word	.LANCHOR57
-	.word	.LANCHOR56
-	.word	.LANCHOR172
+.L2713:
+	.word	.LANCHOR102
+	.word	ftl_ext_info_data_buffer
+	.word	.LANCHOR186
 	.word	.LC0
-	.word	.LANCHOR79
-	.word	.LANCHOR22
-	.word	.LC154
-	.word	.LC155
-	.word	.LANCHOR67
-	.word	.LANCHOR69
-	.word	.LANCHOR107
-	.word	.LANCHOR108
-	.word	.LANCHOR65
-	.word	.LANCHOR68
-.L2948:
-	cmp	r6, #31
-	bls	.L2968
-	cmp	r6, #63
-	bls	.L2969
-	cmp	r6, #127
-	bls	.L2970
-	cmp	r6, #255
-	ite	hi
-	movhi	r6, #1
-	movls	r6, #2
-.L2951:
-	ldr	r7, .L3023
-	ldr	r4, .L3023+4
-.L2952:
-	subs	r6, r6, #1
-	uxtb	r6, r6
-	cmp	r6, #255
-	beq	.L2883
-	bl	gc_do_copy_back
-	ldrb	r3, [r7]	@ zero_extendqisi2
-	cbnz	r3, .L2953
-	ldr	r3, .L3023+8
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #3
-	bhi	.L2954
-	bl	ftl_write_commit
-.L2954:
-	ldrh	r2, [r4, #22]
-	ldrh	r3, [r4, #20]
-	cmp	r2, r3
-	bcc	.L2952
-	movs	r3, #1
-	strb	r3, [r5]
-	bl	ftl_write_commit
-	bl	ftl_flush
-	ldr	r3, .L3023+12
-	ldrh	r0, [r4]
-	ldr	r3, [r3]
-	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L2956
-	movw	r2, #1638
-	ldr	r1, .L3023+16
-	ldr	r0, .L3023+20
-	bl	printf
-.L2957:
-	b	.L2957
-.L2968:
-	movs	r6, #9
-	b	.L2951
-.L2969:
-	movs	r6, #5
-	b	.L2951
-.L2970:
-	movs	r6, #3
-	b	.L2951
-.L2956:
-	bl	ftl_free_sblk
-.L3015:
-	movw	r3, #65535
-	strh	r3, [r4]	@ movhi
-	b	.L2883
-.L2953:
-	ldrh	r3, [r4, #314]
-	cbz	r3, .L2958
-	ldr	r0, [r4, #316]
-	movs	r6, #0
-	strh	r6, [r4, #314]	@ movhi
-	adds	r3, r0, #1
-	beq	.L2959
-	bl	ftl_mask_bad_block
-.L2959:
-	ldr	r3, [r8]
-	str	r6, [r4, #316]
-	strh	r6, [r4, #52]	@ movhi
-	ldrh	r0, [r3, #80]
-	bl	ftl_free_sblk
-	ldr	r0, [r4, #8]
-	movw	r3, #65535
-	ldr	r2, [r8]
-	ldr	r1, [r10]
-	strh	r3, [r2, #80]	@ movhi
-	strh	r3, [r1, #126]	@ movhi
-	strh	r3, [r2, #130]	@ movhi
-	cbz	r0, .L2960
-	bl	buf_free
-.L2960:
-	movs	r6, #0
-	str	r6, [r4, #8]
-	bl	flt_sys_flush
-	movw	r2, #1671
-	ldr	r1, .L3023+16
-	ldr	r0, .L3023+20
-	strb	r6, [r5]
-	bl	printf
-.L2961:
-	b	.L2961
-.L2958:
-	ldrh	r3, [fp, #86]
-	ldrh	r2, [r4, #22]
-	cmp	r3, #1
-	ldrh	r3, [r4, #20]
-	bls	.L2962
-	cmp	r2, r3
-	bcc	.L2952
-	movs	r3, #1
-	strb	r3, [r5]
-	ldrh	r3, [r4, #52]
-	adds	r2, r3, #1
-	strh	r2, [r4, #52]	@ movhi
-	add	r3, r4, r3, lsl #1
-	ldrh	r2, [r4]
-	strh	r2, [r3, #54]	@ movhi
-	b	.L3015
-.L2962:
-	cmp	r2, r3
-	mov	r1, #5
-	strb	r1, [r5]
-	bcc	.L2963
-	ldrh	r3, [r4, #52]
-	adds	r2, r3, #1
-	strh	r2, [r4, #52]	@ movhi
-	add	r3, r4, r3, lsl #1
-	ldrh	r2, [r4]
-	strh	r2, [r3, #54]	@ movhi
-	movw	r3, #65535
-	strh	r3, [r4]	@ movhi
-.L2963:
-	bl	ftl_flush
-	bl	sblk_wait_write_queue_completed
-	bl	gc_write_completed
-	ldr	r3, [r8]
-	ldrh	r2, [fp, #80]
-	strh	r2, [r3, #128]	@ movhi
-	bl	pm_flush
-	bl	ftl_ext_info_flush
-	movs	r3, #0
-	ldr	r2, .L3023+24
-	strh	r3, [r4, #12]	@ movhi
-	ldr	r3, .L3023+28
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	ldrh	r3, [r3]
-	cmp	r2, #2
-	strh	r2, [r4, #16]	@ movhi
-	strh	r3, [r4, #14]	@ movhi
-	itttt	eq
-	lsleq	r3, r3, #1
-	strheq	r3, [r4, #14]	@ movhi
-	moveq	r3, #1
-	strheq	r3, [r4, #16]	@ movhi
-	movs	r3, #0
-	strh	r3, [r4, #18]	@ movhi
-	b	.L2883
-.L2891:
-	bl	gc_check_data_one_wl
-	ldr	r4, .L3023+4
-	mov	r6, r0
-	cbz	r0, .L2966
-	ldr	r3, [r7]
-	movs	r6, #0
-	strh	r6, [r4, #52]	@ movhi
-	ldrh	r0, [r3, #80]
-	bl	ftl_free_sblk
-	ldr	r2, [r7]
-	movw	r3, #65535
-	ldr	r1, [r10]
-	ldr	r0, [r4, #8]
-	strh	r3, [r2, #80]	@ movhi
-	strh	r3, [r1, #126]	@ movhi
-	strh	r3, [r2, #130]	@ movhi
-	bl	buf_free
-	str	r6, [r4, #8]
-	strb	r6, [r5]
-	b	.L3016
-.L2966:
-	ldrh	r2, [r4, #12]
-	ldrh	r3, [r4, #14]
-	cmp	r2, r3
-	bcc	.L2883
-	movs	r3, #6
-	ldr	r0, [r4, #8]
-	strb	r3, [r5]
-	bl	buf_free
-	str	r6, [r4, #8]
-	b	.L2883
-.L2892:
-	movw	r4, #65535
-	bl	gc_update_l2p_map_new
-	bl	gc_free_src_blk
-	bl	ftl_flush
-	bl	pm_flush
-	strh	r4, [fp, #80]	@ movhi
-	bl	ftl_ext_info_flush
-	ldr	r3, [r10]
-	movs	r0, #0
-	strh	r4, [r3, #126]	@ movhi
-	bl	ftl_info_flush
-	movs	r3, #0
-	strb	r3, [r5]
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
-	b	print_ftl_debug_info
-.L3024:
-	.align	2
-.L3023:
-	.word	.LANCHOR67
-	.word	.LANCHOR59
-	.word	.LANCHOR38
-	.word	.LANCHOR56
-	.word	.LANCHOR172
-	.word	.LC0
-	.word	.LANCHOR64
-	.word	.LANCHOR79
-	.size	do_gc, .-do_gc
-	.section	.text.ftl_write,"ax",%progbits
+	.word	.LANCHOR66
+	.word	.LANCHOR10
+	.word	.LANCHOR187
+	.word	1162432070
+	.size	ftl_low_format_data_init, .-ftl_low_format_data_init
+	.section	.text.ftl_low_format,"ax",%progbits
 	.align	1
-	.global	ftl_write
+	.global	ftl_low_format
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_write, %function
-ftl_write:
-	@ args = 0, pretend = 0, frame = 16
+	.type	ftl_low_format, %function
+ftl_low_format:
+	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r7, r2
-	mov	r10, r3
-	cbnz	r0, .L3026
-	mov	r0, #24576
-	ldr	r3, .L3039
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #8
+	ldr	r6, .L2752
+	sub	sp, sp, #40
+	movs	r1, #0
+	ldr	r0, .L2752+4
+	bl	printf
+.L2718:
+	ldr	r3, [r6]
+	add	r3, r3, r4
+	ldrb	r5, [r3, #32]	@ zero_extendqisi2
+	cmp	r5, #128
+	ble	.L2716
+	cmp	r5, #255
+	beq	.L2717
+	movw	r2, #2107
+	ldr	r1, .L2752+8
+	ldr	r0, .L2752+12
+	bl	printf
+.L2716:
+	ldr	r3, .L2752+16
+	movs	r0, #0
+	ldrh	r1, [r3]
+	muls	r1, r5, r1
+	bl	flash_erase_block
+.L2717:
+	adds	r4, r4, #1
+	cmp	r4, #16
+	bne	.L2718
+	bl	sblk_init
+	bl	ftl_info_blk_init
+	mov	r2, #16384
+	movs	r1, #0
+	ldr	r0, .L2752+20
+	bl	ftl_memset
+	ldr	r2, .L2752+24
+	movs	r0, #1
+	ldr	r1, .L2752+28
+	ldr	r3, [r2]
+	ldrh	r1, [r1]
+	str	r2, [sp, #24]
+	add	r1, r3, r1, lsl #2
+.L2719:
+	cmp	r3, r1
+	bne	.L2720
+	ldr	r7, .L2752+32
+	movs	r4, #0
+	ldr	r2, .L2752+36
+	ldr	r3, [r7]
+	str	r2, [r3]
+	strh	r4, [r3, #148]	@ movhi
+.L2721:
+	ldr	r3, .L2752+28
+	uxth	r0, r4
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bhi	.L2729
+	ldr	r3, .L2752+40
+	mov	fp, #15
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	ldr	r3, .L2752
+	mov	r1, r5
 	ldr	r3, [r3]
-.L3027:
-	adds	r2, r1, r7
-	cmp	r3, r2
-	bcc	.L3038
-	ldr	fp, .L3039+8
-	adds	r5, r0, r1
-	mov	r0, r5
-	ldrb	r4, [fp]	@ zero_extendqisi2
-	mov	r1, r4
-	bl	__aeabi_uidiv
-	mov	r8, r0
-	subs	r0, r7, #1
-	mov	r1, r4
-	add	r0, r0, r5
+	ldrb	r0, [r3, #47]	@ zero_extendqisi2
 	bl	__aeabi_uidiv
-	sub	r4, r0, r8
-	mov	r6, r8
-	adds	r4, r4, #1
-	str	r0, [sp, #4]
-	str	fp, [sp, #8]
-.L3029:
-	cbnz	r4, .L3036
-	bl	ftl_write_commit
-	mov	r0, r4
-	movs	r1, #1
-	bl	do_gc
+	ldr	r3, .L2752+24
+	uxtb	r0, r0
+	cmp	r5, #1
+	uxth	lr, r5
+	add	r4, r0, #1
+	ldr	r10, [r3]
+	it	eq
+	moveq	r8, #1
+	ldr	r3, .L2752+32
+	it	ne
+	movne	r8, #3
+	movs	r2, #0
+	ldr	r6, [r3]
+	ldrh	r3, [r6, #148]
+.L2732:
+	add	r1, r10, r2, lsl #2
+	cmp	r5, #4
+	add	r2, r2, #1
+	ldrb	ip, [r1, #2]	@ zero_extendqisi2
+	ite	ne
+	strbne	r8, [r1, #3]
+	strbeq	fp, [r1, #3]
+	orr	ip, ip, #224
+	strb	ip, [r1, #2]
+	uxth	r1, r2
+	cmp	r4, r1
+	bhi	.L2732
+	smulbb	r0, r0, lr
+	add	r3, r3, lr
+	mov	r1, r5
+	uxtah	r0, r0, r3
+	strh	r0, [r6, #148]	@ movhi
+	movs	r0, #16
+	bl	__aeabi_idiv
+	ldr	r3, .L2752+44
+	add	r0, r0, r4
+	uxth	r0, r0
+	ldr	r3, [r3]
+	strh	r0, [r6, #134]	@ movhi
+	lsls	r3, r3, #19
+	bpl	.L2733
+	str	r0, [sp]
+	mov	r3, r4
+	movs	r2, #128
+	movw	r1, #2154
+	ldr	r0, .L2752+48
+	bl	printf
+.L2733:
+	ldr	r0, [r7]
+	movs	r2, #128
+	movs	r1, #255
+	movs	r5, #0
+	adds	r0, r0, #160
+	bl	ftl_memset
+	ldr	r3, [sp, #24]
+	ldr	r1, [r7]
+	ldr	r3, [r3]
+	ldrh	fp, [r1, #134]
+	str	r3, [sp, #24]
+	ldr	r3, .L2752+52
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r3, [sp, #28]
+	ldr	r3, .L2752+40
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r3, [sp, #12]
+	ldr	r3, .L2752+56
+	ldrh	r7, [sp, #12]
+	ldrh	r3, [r3]
+	smulbb	r2, r4, r7
+	rsb	r0, r3, #21
+	movs	r3, #1
+	lsls	r3, r3, r0
+	uxth	r2, r2
+	uxth	r3, r3
+	str	r3, [sp, #20]
+.L2734:
+	cmp	r4, fp
+	bcc	.L2740
+	ldr	r3, .L2752+28
+	movs	r4, #0
+	strh	r5, [r1, #112]	@ movhi
+	strh	r4, [r1, #114]	@ movhi
+	ldrh	r3, [r3]
+	strh	r4, [r1, #118]	@ movhi
+	strh	fp, [r1, #132]	@ movhi
+	sub	r3, r3, fp
+	strh	r3, [r1, #116]	@ movhi
+	bl	ftl_low_format_data_init
 	mov	r0, r4
-.L3025:
-	add	sp, sp, #16
+	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3026:
-	cmp	r0, #3
-	bhi	.L3038
-	lsls	r0, r0, #13
-	mov	r3, #8192
-	b	.L3027
-.L3036:
-	movs	r0, #0
-	bl	buf_alloc
-	mov	fp, r0
-	cbnz	r0, .L3030
-	bl	ftl_write_commit
-	b	.L3029
-.L3030:
-	mov	r3, #0
-	cmp	r6, r8
-	strb	r3, [r0, #41]
-	ldr	r3, [sp, #8]
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	strb	r2, [r0, #40]
-	bne	.L3032
-	mov	r1, r2
-	mov	r0, r5
-	str	r2, [sp, #12]
-	bl	__aeabi_uidivmod
-	ldr	r2, [sp, #12]
-	uxtb	r1, r1
-	strb	r1, [fp, #41]
-	subs	r1, r2, r1
-	uxtb	r1, r1
-	cmp	r7, r1
-	ite	cs
-	strbcs	r1, [fp, #40]
-	strbcc	r7, [fp, #40]
-.L3034:
-	ldrb	ip, [fp, #41]	@ zero_extendqisi2
-	mov	r1, r10
-	ldrb	r2, [fp, #40]	@ zero_extendqisi2
-	subs	r4, r4, #1
-	ldr	r0, [fp, #4]
-	lsls	r2, r2, #9
-	add	r0, r0, ip, lsl #9
-	bl	ftl_memcpy
-	ldr	r3, .L3039+4
-	str	r6, [fp, #20]
-	adds	r6, r6, #1
-	ldr	r1, [r3]
-	ldr	r2, [r1, #8]
-	adds	r0, r2, #1
-	str	r0, [r1, #8]
-	mov	r0, fp
-	str	r2, [fp, #16]
-	bl	ftl_write_buf
-	ldrb	r3, [fp, #40]	@ zero_extendqisi2
-	add	r10, r10, r3, lsl #9
-	b	.L3029
-.L3032:
-	ldr	r3, [sp, #4]
-	cmp	r6, r3
-	itttt	eq
-	smulbbeq	r2, r6, r2
-	addeq	r1, r5, r7
-	subeq	r2, r1, r2
-	strbeq	r2, [r0, #40]
-	b	.L3034
-.L3038:
-	mov	r0, #-1
-	b	.L3025
-.L3040:
+.L2720:
+	ldrb	r2, [r3, #2]	@ zero_extendqisi2
+	adds	r3, r3, #4
+	and	r2, r2, #31
+	bfi	r2, r0, #3, #2
+	strb	r2, [r3, #-2]
+	b	.L2719
+.L2729:
+	ldr	r3, .L2752+60
+	strh	r0, [r3]	@ movhi
+	ldr	r3, .L2752+64
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L2722
+	bl	ftl_test_block
+.L2722:
+	ldr	r3, .L2752+52
+	uxth	r1, r4
+	ldr	r0, .L2752+24
+	movs	r6, #0
+	mov	fp, r6
+	mov	r8, r6
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	ldr	r5, [r0]
+	str	r3, [sp, #16]
+	ldr	r3, .L2752+40
+	add	r5, r5, r1, lsl #2
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	uxth	r2, r3
+	str	r2, [sp, #20]
+	mul	r2, r3, r1
+	ldr	r1, .L2752+32
+	ldr	r1, [r1]
+	str	r1, [sp, #12]
+.L2723:
+	ldr	r0, [sp, #16]
+	uxth	r1, fp
+	cmp	r0, r1
+	bhi	.L2741
+	cmp	r8, #0
+	bne	.L2728
+	ldrb	r3, [r5, #2]	@ zero_extendqisi2
+	orr	r3, r3, #224
+	strb	r3, [r5, #2]
+.L2728:
+	adds	r4, r4, #1
+	b	.L2721
+.L2726:
+	add	r1, r10, r2
+	ldr	r0, [sp, #28]
+	str	r3, [sp, #36]
+	str	r2, [sp, #32]
+	bl	flash_check_bad_block
+	ldr	r2, [sp, #32]
+	ldr	r3, [sp, #36]
+	cbz	r0, .L2724
+	ldrb	r0, [r5, #3]	@ zero_extendqisi2
+	movs	r1, #1
+	lsl	r1, r1, r10
+	orrs	r1, r1, r0
+	ldr	r0, [sp, #12]
+	strb	r1, [r5, #3]
+	ldr	r1, [sp, #12]
+	ldrh	r1, [r1, #148]
+	adds	r1, r1, #1
+	strh	r1, [r0, #148]	@ movhi
+.L2725:
+	add	r10, r10, #1
+.L2727:
+	sub	r1, r10, r6
+	ldr	r0, [sp, #20]
+	uxth	r1, r1
+	cmp	r0, r1
+	bhi	.L2726
+	add	fp, fp, #1
+	add	r6, r6, r3
+	subs	r2, r2, r3
+	b	.L2723
+.L2724:
+	add	r8, r8, #1
+	uxth	r8, r8
+	b	.L2725
+.L2741:
+	uxtb	r1, fp
+	mov	r10, r6
+	str	r1, [sp, #28]
+	b	.L2727
+.L2740:
+	ldr	r3, [sp, #24]
+	movs	r0, #0
+	mov	lr, r0
+	mov	ip, r0
+	add	r8, r3, r4, lsl #2
+	ldrb	r3, [r8, #2]	@ zero_extendqisi2
+	orr	r3, r3, #224
+	strb	r3, [r8, #2]
+.L2735:
+	ldr	r6, [sp, #28]
+	uxth	r3, ip
+	cmp	r3, r6
+	bcc	.L2743
+	adds	r4, r4, #1
+	add	r2, r2, r7
+	uxth	r4, r4
+	uxth	r2, r2
+	b	.L2734
+.L2738:
+	ldrb	r10, [r8, #3]	@ zero_extendqisi2
+	add	r3, lr, r6
+	asr	r10, r10, r3
+	tst	r10, #1
+	bne	.L2736
+	ldr	r3, [sp, #12]
+	add	r10, r5, #80
+	adds	r5, r5, #1
+	uxth	r5, r5
+	cmp	r3, #1
+	itett	hi
+	ldrhi	r3, [sp, #16]
+	movls	r3, r2
+	andhi	r3, r3, #1
+	addhi	r3, r3, r2
+	it	hi
+	uxthhi	r3, r3
+	add	r3, r3, r0
+	strh	r3, [r1, r10, lsl #1]	@ movhi
+.L2736:
+	adds	r6, r6, #1
+.L2739:
+	uxth	r3, r6
+	cmp	r3, r7
+	str	r3, [sp, #16]
+	bcc	.L2738
+	ldr	r3, [sp, #12]
+	add	ip, ip, #1
+	add	lr, lr, r3
+	ldr	r3, [sp, #20]
+	add	r0, r0, r3
+	uxth	r0, r0
+	b	.L2735
+.L2743:
+	movs	r6, #0
+	b	.L2739
+.L2753:
 	.align	2
-.L3039:
-	.word	.LANCHOR52
-	.word	.LANCHOR46
-	.word	.LANCHOR45
-	.size	ftl_write, .-ftl_write
-	.section	.text.FtlWrite,"ax",%progbits
+.L2752:
+	.word	.LANCHOR27
+	.word	.LC148
+	.word	.LANCHOR188
+	.word	.LC0
+	.word	.LANCHOR103
+	.word	ftl_info_data_buffer
+	.word	.LANCHOR7
+	.word	.LANCHOR6
+	.word	.LANCHOR102
+	.word	1229739078
+	.word	.LANCHOR67
+	.word	.LANCHOR14
+	.word	.LC149
+	.word	.LANCHOR104
+	.word	.LANCHOR66
+	.word	.LANCHOR60
+	.word	.LANCHOR73
+	.size	ftl_low_format, .-ftl_low_format
+	.section	.text.ftl_re_low_format,"ax",%progbits
 	.align	1
-	.global	FtlWrite
+	.global	ftl_re_low_format
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlWrite, %function
-FtlWrite:
+	.type	ftl_re_low_format, %function
+ftl_re_low_format:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	ftl_write
-	.size	FtlWrite, .-FtlWrite
-	.section	.text.StorageSysDataStore,"ax",%progbits
+	push	{r3, r4, r5, r6, r7, lr}
+	movs	r1, #1
+	ldr	r0, .L2760
+	bl	printf
+	bl	sblk_init
+	bl	ftl_info_blk_init
+	bl	ftl_ext_info_init
+	ldr	r2, .L2760+4
+	ldr	r3, .L2760+8
+	ldrh	r7, [r2]
+	ldr	r3, [r3]
+	ldr	r2, .L2760+12
+	ldrh	r1, [r3, #134]
+	ldr	r0, [r2]
+	movs	r2, #0
+	mov	r5, r2
+	mov	r6, r2
+	add	r0, r0, r1, lsl #2
+.L2755:
+	cmp	r1, r7
+	bcc	.L2759
+	movs	r4, #0
+	strh	r6, [r3, #114]	@ movhi
+	strh	r5, [r3, #118]	@ movhi
+	strh	r2, [r3, #116]	@ movhi
+	strh	r4, [r3, #122]	@ movhi
+	strh	r4, [r3, #120]	@ movhi
+	strh	r4, [r3, #124]	@ movhi
+	bl	ftl_low_format_data_init
+	mov	r0, r4
+	pop	{r3, r4, r5, r6, r7, pc}
+.L2759:
+	ldrb	r4, [r0, #2]	@ zero_extendqisi2
+	bfc	r4, #5, #3
+	strb	r4, [r0, #2]
+	ands	r4, r4, #24
+	bne	.L2756
+	adds	r6, r6, #1
+	uxth	r6, r6
+.L2757:
+	adds	r1, r1, #1
+	uxth	r1, r1
+	adds	r0, r0, #4
+	b	.L2755
+.L2756:
+	cmp	r4, #16
+	itete	eq
+	addeq	r5, r5, #1
+	addne	r2, r2, #1
+	uxtheq	r5, r5
+	uxthne	r2, r2
+	b	.L2757
+.L2761:
+	.align	2
+.L2760:
+	.word	.LC150
+	.word	.LANCHOR6
+	.word	.LANCHOR102
+	.word	.LANCHOR7
+	.size	ftl_re_low_format, .-ftl_re_low_format
+	.section	.text.ftl_prog_ppa_page,"ax",%progbits
 	.align	1
-	.global	StorageSysDataStore
+	.global	ftl_prog_ppa_page
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	StorageSysDataStore, %function
-StorageSysDataStore:
+	.type	ftl_prog_ppa_page, %function
+ftl_prog_ppa_page:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	mov	r3, r1
-	movs	r2, #1
-	mov	r1, r0
-	movs	r0, #2
-	b	ftl_write
-	.size	StorageSysDataStore, .-StorageSysDataStore
-	.global	g_pm_spare
-	.global	pm_gc_enable
-	.global	pm_last_load_ram_id
-	.global	pm_last_update_ram_id
-	.global	pm_ram_info
-	.global	sblk_gc_write_completed_queue_head
-	.global	sblk_read_completed_queue_head
-	.global	sblk_write_completed_queue_head
-	.global	sblk_queue_head
-	.global	ftl_low_format_cur_blk
-	.global	ftl_power_lost_flag
-	.global	ftl_vpn_update_count
-	.global	ftl_sblk_vpn_update_id
-	.global	ftl_sblk_lpa_tbl
-	.global	ftl_sblk_vpn
-	.global	gp_ftl_ext_info
-	.global	gp_ftl_info
-	.global	gp_blk_info
-	.global	ftl_tmp_spare
-	.global	ftl_info_spare
-	.global	ftl_ext_info_data_buffer
-	.global	ftl_info_data_buffer
-	.global	ftl_tmp_buffer
-	.global	g_ftl_info_blk
-	.global	tlc_prog_order
-	.global	gc_des_ppa_tbl
-	.global	gc_valid_page_ppa
-	.global	gc_page_buf_id
-	.global	gc_pre_ppa_tbl
-	.global	gc_lpa_tbl
-	.global	g_gc_info
-	.global	gc_slc_mode_vpn_th
-	.global	gc_tlc_mode_tlc_vpn_th
-	.global	gc_tlc_mode_slc_vpn_th
-	.global	gc_state
-	.global	gc_mode
-	.global	check_vpc_tbl
-	.global	p_read_ahead_ext_buf
-	.global	read_ahead_lpa
-	.global	write_commit_count
-	.global	write_commit_head
-	.global	write_buf_count
-	.global	write_buf_head
-	.global	ftl_flush_jiffies
-	.global	lpa_hash
-	.global	lpa_hash_index
-	.global	_min_slc_super_block
-	.global	_max_slc_super_block
-	.global	_max_xlc_super_block
-	.global	_c_max_pm_sblk
-	.global	_c_ftl_pm_page_num
-	.global	_c_totle_log_page
-	.global	_c_totle_data_density
-	.global	_c_user_data_density
-	.global	_c_totle_phy_density
-	.global	_c_ftl_block_addr_log2
-	.global	_c_ftl_block_align_addr
-	.global	_c_ftl_byte_pre_page
-	.global	_c_ftl_nand_blks_per_die
-	.global	_c_ftl_page_pre_slc_blk
-	.global	_c_ftl_page_pre_blk
-	.global	_c_ftl_blk_pre_plane
-	.global	_c_ftl_nand_planes_num
-	.global	_c_ftl_planes_per_die
-	.global	_c_ftl_sec_per_page
-	.global	_c_ftl_nand_die_num
-	.global	_c_ftl_nand_type
-	.global	zftl_debug
-	.global	g_flash_blk_info
-	.global	gp_flash_info
-	.global	p_free_buf_head
-	.global	free_buf_count
-	.global	g_buf
-	.global	g_nandc_v6_master_info
-	.global	nandc_randomizer_en
-	.global	nandc_hw_seed
-	.global	fill_spare_size
-	.global	g_nandc_ecc_bits
-	.global	g_nandc_ver
-	.global	gp_nandc
-	.global	hy_f26_ref_value
-	.global	sd15_tlc_rr
-	.global	sd15_slc_rr
-	.global	gNandParaInfo
-	.global	NandFlashParaTbl
-	.global	gpNandParaInfo
-	.global	gNandOptPara
-	.global	g_msb_page_tbl
-	.global	g_lsb_page_tbl
-	.global	g_die_addr
-	.global	g_die_cs_idx
-	.global	IDByte
-	.global	flash_read_retry
-	.global	g_maxRetryCount
-	.global	g_maxRegNum
-	.global	g_retryMode
-	.global	g_flash_toggle_mode_en
-	.global	g_flash_3d_mlc_flag
-	.global	g_flash_3d_tlc_flag
-	.global	g_flash_multi_page_prog_en
-	.global	g_flash_multi_page_read_en
-	.global	g_flash_interface_mode
-	.global	g_idb_ecc_bits
-	.global	g_idb_slc_mode_enable
-	.global	g_slc_mode_addr2
-	.global	g_slc_mode_enable
-	.global	g_flash_cur_mode
-	.global	g_flash_slc_mode
-	.global	g_slc_page_num
-	.global	g_totle_phy_block
-	.global	g_block_align_addr
-	.global	g_flash_reversd_blks
-	.global	g_nand_max_die
-	.global	g_flash_tmp_spare_buffer
-	.global	g_flash_tmp_page_buffer
-	.global	g_flash_sys_spare_buffer
-	.global	g_flash_spare_buffer
-	.global	g_flash_page_buffer
-	.section	.bss.IDByte,"aw",%nobits
-	.align	2
-	.set	.LANCHOR26,. + 0
-	.type	IDByte, %object
-	.size	IDByte, 32
-IDByte:
-	.space	32
-	.section	.bss._c_ftl_blk_pre_plane,"aw",%nobits
-	.align	1
-	.set	.LANCHOR54,. + 0
-	.type	_c_ftl_blk_pre_plane, %object
-	.size	_c_ftl_blk_pre_plane, 2
-_c_ftl_blk_pre_plane:
-	.space	2
-	.section	.bss._c_ftl_block_addr_log2,"aw",%nobits
-	.align	1
-	.set	.LANCHOR71,. + 0
-	.type	_c_ftl_block_addr_log2, %object
-	.size	_c_ftl_block_addr_log2, 2
-_c_ftl_block_addr_log2:
-	.space	2
-	.section	.bss._c_ftl_block_align_addr,"aw",%nobits
-	.align	1
-	.set	.LANCHOR75,. + 0
-	.type	_c_ftl_block_align_addr, %object
-	.size	_c_ftl_block_align_addr, 2
-_c_ftl_block_align_addr:
-	.space	2
-	.section	.bss._c_ftl_byte_pre_page,"aw",%nobits
-	.align	1
-	.set	.LANCHOR149,. + 0
-	.type	_c_ftl_byte_pre_page, %object
-	.size	_c_ftl_byte_pre_page, 2
-_c_ftl_byte_pre_page:
-	.space	2
-	.section	.bss._c_ftl_nand_blks_per_die,"aw",%nobits
-	.align	1
-	.type	_c_ftl_nand_blks_per_die, %object
-	.size	_c_ftl_nand_blks_per_die, 2
-_c_ftl_nand_blks_per_die:
-	.space	2
-	.section	.bss._c_ftl_nand_die_num,"aw",%nobits
-	.set	.LANCHOR76,. + 0
-	.type	_c_ftl_nand_die_num, %object
-	.size	_c_ftl_nand_die_num, 1
-_c_ftl_nand_die_num:
-	.space	1
-	.section	.bss._c_ftl_nand_planes_num,"aw",%nobits
-	.set	.LANCHOR69,. + 0
-	.type	_c_ftl_nand_planes_num, %object
-	.size	_c_ftl_nand_planes_num, 1
-_c_ftl_nand_planes_num:
-	.space	1
-	.section	.bss._c_ftl_nand_type,"aw",%nobits
-	.set	.LANCHOR64,. + 0
-	.type	_c_ftl_nand_type, %object
-	.size	_c_ftl_nand_type, 1
-_c_ftl_nand_type:
-	.space	1
-	.section	.bss._c_ftl_page_pre_blk,"aw",%nobits
-	.align	1
-	.set	.LANCHOR68,. + 0
-	.type	_c_ftl_page_pre_blk, %object
-	.size	_c_ftl_page_pre_blk, 2
-_c_ftl_page_pre_blk:
-	.space	2
-	.section	.bss._c_ftl_page_pre_slc_blk,"aw",%nobits
-	.align	1
-	.set	.LANCHOR79,. + 0
-	.type	_c_ftl_page_pre_slc_blk, %object
-	.size	_c_ftl_page_pre_slc_blk, 2
-_c_ftl_page_pre_slc_blk:
-	.space	2
-	.section	.bss._c_ftl_planes_per_die,"aw",%nobits
-	.set	.LANCHOR70,. + 0
-	.type	_c_ftl_planes_per_die, %object
-	.size	_c_ftl_planes_per_die, 1
-_c_ftl_planes_per_die:
-	.space	1
-	.section	.bss._c_ftl_pm_page_num,"aw",%nobits
-	.align	1
-	.set	.LANCHOR137,. + 0
-	.type	_c_ftl_pm_page_num, %object
-	.size	_c_ftl_pm_page_num, 2
-_c_ftl_pm_page_num:
-	.space	2
-	.section	.bss._c_ftl_sec_per_page,"aw",%nobits
-	.set	.LANCHOR45,. + 0
-	.type	_c_ftl_sec_per_page, %object
-	.size	_c_ftl_sec_per_page, 1
-_c_ftl_sec_per_page:
-	.space	1
-	.section	.bss._c_max_pm_sblk,"aw",%nobits
+	push	{r0, r1, r2, lr}
+	str	r3, [sp]
+	mov	r3, r2
+	mov	r2, r1
+	ubfx	r1, r0, #0, #21
+	ubfx	r0, r0, #21, #3
+	bl	ftl_prog_page
+	add	sp, sp, #12
+	@ sp needed
+	ldr	pc, [sp], #4
+	.size	ftl_prog_ppa_page, .-ftl_prog_ppa_page
+	.section	.text.ftl_write_last_log_page,"ax",%progbits
 	.align	1
-	.set	.LANCHOR101,. + 0
-	.type	_c_max_pm_sblk, %object
-	.size	_c_max_pm_sblk, 2
-_c_max_pm_sblk:
-	.space	2
-	.section	.bss._c_totle_data_density,"aw",%nobits
-	.align	2
-	.set	.LANCHOR162,. + 0
-	.type	_c_totle_data_density, %object
-	.size	_c_totle_data_density, 4
-_c_totle_data_density:
-	.space	4
-	.section	.bss._c_totle_log_page,"aw",%nobits
-	.align	2
-	.set	.LANCHOR47,. + 0
-	.type	_c_totle_log_page, %object
-	.size	_c_totle_log_page, 4
-_c_totle_log_page:
-	.space	4
-	.section	.bss._c_totle_phy_density,"aw",%nobits
-	.align	2
-	.set	.LANCHOR161,. + 0
-	.type	_c_totle_phy_density, %object
-	.size	_c_totle_phy_density, 4
-_c_totle_phy_density:
-	.space	4
-	.section	.bss._c_user_data_density,"aw",%nobits
+	.global	ftl_write_last_log_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_write_last_log_page, %function
+ftl_write_last_log_page:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r4, r0
+	ldrh	r3, [r0, #6]
+	cmp	r3, #1
+	bne	.L2765
+	ldr	r3, .L2767
+	ldrh	r5, [r0, #12]
+	ldr	r6, [r3]
+	bl	ftl_get_new_free_page
+	adds	r3, r0, #1
+	mov	r7, r0
+	beq	.L2766
+	ldrh	r0, [r4]
+	add	r6, r6, r5, lsl #2
+	ldr	r5, .L2767+4
+	movs	r4, #0
+	bl	ftl_vpn_decrement
+	ldr	r3, .L2767+8
+	mov	r0, r6
+	ldr	r2, .L2767+12
+	str	r3, [r5]
+	ldr	r3, .L2767+16
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	muls	r1, r3, r1
+	lsls	r1, r1, #2
+	bl	js_hash
+	ldr	r3, .L2767+20
+	mov	r2, r5
+	str	r0, [r5, #4]
+	mov	r1, r6
+	mov	r0, r7
+	str	r4, [r5, #8]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r4, [r5, #12]
+	bl	ftl_prog_ppa_page
+.L2766:
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, pc}
+.L2765:
+	mov	r0, #-1
+	pop	{r3, r4, r5, r6, r7, pc}
+.L2768:
 	.align	2
-	.set	.LANCHOR52,. + 0
-	.type	_c_user_data_density, %object
-	.size	_c_user_data_density, 4
-_c_user_data_density:
-	.space	4
-	.section	.bss._max_slc_super_block,"aw",%nobits
-	.align	1
-	.set	.LANCHOR164,. + 0
-	.type	_max_slc_super_block, %object
-	.size	_max_slc_super_block, 2
-_max_slc_super_block:
-	.space	2
-	.section	.bss._max_xlc_super_block,"aw",%nobits
-	.align	1
-	.set	.LANCHOR163,. + 0
-	.type	_max_xlc_super_block, %object
-	.size	_max_xlc_super_block, 2
-_max_xlc_super_block:
-	.space	2
-	.section	.bss._min_slc_super_block,"aw",%nobits
-	.align	1
-	.set	.LANCHOR165,. + 0
-	.type	_min_slc_super_block, %object
-	.size	_min_slc_super_block, 2
-_min_slc_super_block:
-	.space	2
-	.section	.bss.check_vpc_tbl,"aw",%nobits
-	.align	1
-	.type	check_vpc_tbl, %object
-	.size	check_vpc_tbl, 4352
-check_vpc_tbl:
-	.space	4352
-	.section	.bss.fill_spare_size,"aw",%nobits
+.L2767:
+	.word	.LANCHOR109
+	.word	.LANCHOR176
+	.word	-178307901
+	.word	.LANCHOR78
+	.word	.LANCHOR85
+	.word	.LANCHOR123
+	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
+	.section	.text.ftl_open_sblk_recovery,"ax",%progbits
 	.align	1
-	.set	.LANCHOR31,. + 0
-	.type	fill_spare_size, %object
-	.size	fill_spare_size, 2
-fill_spare_size:
-	.space	2
-	.section	.bss.flash_read_retry,"aw",%nobits
-	.align	2
-	.set	.LANCHOR115,. + 0
-	.type	flash_read_retry, %object
-	.size	flash_read_retry, 4
-flash_read_retry:
-	.space	4
-	.section	.bss.free_buf_count,"aw",%nobits
-	.set	.LANCHOR38,. + 0
-	.type	free_buf_count, %object
-	.size	free_buf_count, 1
-free_buf_count:
-	.space	1
-	.section	.bss.ftl_ext_info_data_buffer,"aw",%nobits
-	.align	6
-	.type	ftl_ext_info_data_buffer, %object
-	.size	ftl_ext_info_data_buffer, 16384
-ftl_ext_info_data_buffer:
-	.space	16384
-	.section	.bss.ftl_flush_jiffies,"aw",%nobits
-	.align	2
-	.set	.LANCHOR168,. + 0
-	.type	ftl_flush_jiffies, %object
-	.size	ftl_flush_jiffies, 4
-ftl_flush_jiffies:
-	.space	4
-	.section	.bss.ftl_info_data_buffer,"aw",%nobits
-	.align	6
-	.type	ftl_info_data_buffer, %object
-	.size	ftl_info_data_buffer, 16384
-ftl_info_data_buffer:
-	.space	16384
-	.section	.bss.ftl_info_spare,"aw",%nobits
-	.align	6
-	.set	.LANCHOR130,. + 0
-	.type	ftl_info_spare, %object
-	.size	ftl_info_spare, 256
-ftl_info_spare:
-	.space	256
-	.section	.bss.ftl_low_format_cur_blk,"aw",%nobits
-	.align	1
-	.set	.LANCHOR53,. + 0
-	.type	ftl_low_format_cur_blk, %object
-	.size	ftl_low_format_cur_blk, 2
-ftl_low_format_cur_blk:
-	.space	2
-	.section	.bss.ftl_power_lost_flag,"aw",%nobits
-	.set	.LANCHOR133,. + 0
-	.type	ftl_power_lost_flag, %object
-	.size	ftl_power_lost_flag, 1
-ftl_power_lost_flag:
-	.space	1
-	.section	.bss.ftl_sblk_lpa_tbl,"aw",%nobits
-	.align	2
-	.set	.LANCHOR82,. + 0
-	.type	ftl_sblk_lpa_tbl, %object
-	.size	ftl_sblk_lpa_tbl, 4
-ftl_sblk_lpa_tbl:
-	.space	4
-	.section	.bss.ftl_sblk_vpn,"aw",%nobits
-	.align	2
-	.set	.LANCHOR56,. + 0
-	.type	ftl_sblk_vpn, %object
-	.size	ftl_sblk_vpn, 4
-ftl_sblk_vpn:
-	.space	4
-	.section	.bss.ftl_sblk_vpn_update_id,"aw",%nobits
-	.align	1
-	.set	.LANCHOR87,. + 0
-	.type	ftl_sblk_vpn_update_id, %object
-	.size	ftl_sblk_vpn_update_id, 2
-ftl_sblk_vpn_update_id:
-	.space	2
-	.section	.bss.ftl_tmp_buffer,"aw",%nobits
-	.align	6
-	.type	ftl_tmp_buffer, %object
-	.size	ftl_tmp_buffer, 16384
-ftl_tmp_buffer:
-	.space	16384
-	.section	.bss.ftl_tmp_spare,"aw",%nobits
-	.align	6
-	.set	.LANCHOR121,. + 0
-	.type	ftl_tmp_spare, %object
-	.size	ftl_tmp_spare, 256
-ftl_tmp_spare:
-	.space	256
-	.section	.bss.ftl_vpn_update_count,"aw",%nobits
-	.align	1
-	.set	.LANCHOR86,. + 0
-	.type	ftl_vpn_update_count, %object
-	.size	ftl_vpn_update_count, 2
-ftl_vpn_update_count:
-	.space	2
-	.section	.bss.gNandOptPara,"aw",%nobits
-	.set	.LANCHOR103,. + 0
-	.type	gNandOptPara, %object
-	.size	gNandOptPara, 32
-gNandOptPara:
-	.space	32
-	.section	.bss.g_block_align_addr,"aw",%nobits
-	.align	1
-	.set	.LANCHOR13,. + 0
-	.type	g_block_align_addr, %object
-	.size	g_block_align_addr, 2
-g_block_align_addr:
-	.space	2
-	.section	.bss.g_buf,"aw",%nobits
-	.align	2
-	.set	.LANCHOR36,. + 0
-	.type	g_buf, %object
-	.size	g_buf, 1536
-g_buf:
-	.space	1536
-	.section	.bss.g_die_addr,"aw",%nobits
-	.align	2
-	.set	.LANCHOR98,. + 0
-	.type	g_die_addr, %object
-	.size	g_die_addr, 32
-g_die_addr:
-	.space	32
-	.section	.bss.g_die_cs_idx,"aw",%nobits
+	.global	ftl_open_sblk_recovery
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_open_sblk_recovery, %function
+ftl_open_sblk_recovery:
+	@ args = 0, pretend = 0, frame = 88
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #96
+	ldr	r5, .L2876
+	mov	r4, r0
+	str	r1, [sp, #24]
+	ldr	r3, [r5]
+	lsls	r7, r3, #19
+	bpl	.L2770
+	ldrh	r1, [r0, #2]
+	ldr	r0, .L2876+4
+	bl	printf
+.L2770:
+	ldr	r3, [r5]
+	lsls	r6, r3, #19
+	bpl	.L2771
+	ldrb	r1, [r4, #5]	@ zero_extendqisi2
+	ldr	r0, .L2876+8
+	bl	printf
+.L2771:
+	ldr	r3, [r5]
+	lsls	r0, r3, #19
+	bpl	.L2772
+	ldrh	r1, [r4]
+	ldr	r0, .L2876+12
+	bl	printf
+.L2772:
+	ldr	r3, [r5]
+	lsls	r1, r3, #19
+	bpl	.L2773
+	ldrh	r2, [r4, #18]
+	ldrh	r1, [r4, #16]
+	ldr	r0, .L2876+16
+	bl	printf
+.L2773:
+	ldrh	r3, [r4, #10]
+	ldrh	r2, [r4]
+	strh	r3, [r4, #14]	@ movhi
+	ldr	r3, .L2876+20
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcs	.L2769
+	movs	r0, #1
+	bl	buf_alloc
+	movs	r2, #64
+	mov	r5, r0
+	movs	r1, #255
+	add	r0, sp, #32
+	bl	ftl_memset
+	ldrb	r6, [r4, #5]	@ zero_extendqisi2
+	movs	r3, #2
+	ldrh	r7, [r4, #2]
+	str	r3, [sp, #12]
+	movs	r3, #0
+	str	r3, [sp, #16]
+.L2775:
+	ldr	r3, .L2876+24
+	ldrh	r3, [r3]
+	cmp	r3, r7
+	bhi	.L2788
+.L2778:
+	ldrh	r3, [r4, #10]
+	ldr	r1, .L2876+24
+	ldrh	r2, [r4, #6]
+	ldrb	r0, [r4, #9]	@ zero_extendqisi2
+	strh	r7, [r4, #2]	@ movhi
+	add	r2, r2, r3
+	ldrh	r3, [r1]
+	strb	r6, [r4, #5]
+	str	r1, [sp, #20]
+	muls	r3, r0, r3
+	cmp	r2, r3
+	beq	.L2789
+	movw	r2, #1493
+	ldr	r1, .L2876+28
+	ldr	r0, .L2876+32
+	bl	printf
+.L2789:
+	ldr	r3, .L2876+36
+	movs	r6, #0
+	ldrh	r0, [r4, #10]
+	mov	r2, r6
+	ldr	r7, [r3]
+	str	r3, [sp, #28]
+.L2790:
+	cmp	r2, r0
+	bcc	.L2792
+	ldr	r2, [sp, #20]
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	ldr	r7, .L2876
+	ldrh	r2, [r2]
+	ldr	r8, .L2876+56
+	smulbb	r3, r3, r2
+	subs	r3, r3, r0
+	add	r6, r6, r3
+	ldr	r3, [r7]
+	uxth	r6, r6
+	tst	r3, #4096
+	beq	.L2793
+	ldrh	r1, [r4]
+	mov	r2, r6
+	ldr	r3, [r8]
+	ldr	r0, .L2876+40
+	ldrh	r3, [r3, r1, lsl #1]
+	bl	printf
+.L2793:
+	ldr	r3, [r8]
+	ldrh	r2, [r4]
+	strh	r6, [r3, r2, lsl #1]	@ movhi
+	ldr	r3, [r7]
+	lsls	r0, r3, #17
+	bpl	.L2794
+	ldr	r3, [sp, #44]
+	add	r1, sp, #32
+	ldr	r0, .L2876+44
+	str	r3, [sp]
+	ldm	r1, {r1, r2, r3}
+	bl	printf
+.L2794:
+	ldr	r6, .L2876+48
+	movs	r7, #0
+	ldr	r8, .L2876
+	movs	r1, #0
+	ldr	r0, [r5, #4]
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	lsls	r2, r2, #9
+	bl	ftl_memset
+	str	r6, [sp, #24]
+.L2795:
+	ldr	r3, .L2876+52
+	ldr	r2, [sp, #12]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	muls	r3, r2, r3
+	cmp	r7, r3
+	bcc	.L2808
+	mov	r0, r5
+	bl	buf_free
+	ldr	r3, [sp, #20]
+	ldrh	r2, [r4, #12]
+	ldrb	r1, [r4, #9]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	mla	r3, r1, r3, r2
+	ldr	r2, [sp, #28]
+	ldr	r2, [r2]
+	add	r3, r3, #1073741824
+	subs	r3, r3, #1
+	ldr	r3, [r2, r3, lsl #2]
+	adds	r3, r3, #1
+	beq	.L2809
+	movw	r2, #1567
+	ldr	r1, .L2876+28
+	ldr	r0, .L2876+32
+	bl	printf
+.L2809:
+	ldrh	r3, [r4, #6]
+	cmp	r3, #1
+	bne	.L2769
+	mov	r0, r4
+	bl	ftl_write_last_log_page
+.L2769:
+	add	sp, sp, #96
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2788:
+	ldrb	r6, [r4, #5]	@ zero_extendqisi2
+.L2776:
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	cmp	r3, r6
+	bhi	.L2787
+	movs	r3, #0
+	adds	r7, r7, #1
+	strb	r3, [r4, #5]
+	uxth	r7, r7
+	b	.L2775
+.L2877:
 	.align	2
-	.set	.LANCHOR10,. + 0
-	.type	g_die_cs_idx, %object
-	.size	g_die_cs_idx, 8
-g_die_cs_idx:
-	.space	8
-	.section	.bss.g_flash_3d_mlc_flag,"aw",%nobits
-	.set	.LANCHOR74,. + 0
-	.type	g_flash_3d_mlc_flag, %object
-	.size	g_flash_3d_mlc_flag, 1
-g_flash_3d_mlc_flag:
-	.space	1
-	.section	.bss.g_flash_3d_tlc_flag,"aw",%nobits
-	.set	.LANCHOR66,. + 0
-	.type	g_flash_3d_tlc_flag, %object
-	.size	g_flash_3d_tlc_flag, 1
-g_flash_3d_tlc_flag:
-	.space	1
-	.section	.bss.g_flash_blk_info,"aw",%nobits
-	.align	1
-	.set	.LANCHOR117,. + 0
-	.type	g_flash_blk_info, %object
-	.size	g_flash_blk_info, 4
-g_flash_blk_info:
-	.space	4
-	.section	.bss.g_flash_cur_mode,"aw",%nobits
-	.set	.LANCHOR20,. + 0
-	.type	g_flash_cur_mode, %object
-	.size	g_flash_cur_mode, 1
-g_flash_cur_mode:
-	.space	1
-	.section	.bss.g_flash_interface_mode,"aw",%nobits
-	.set	.LANCHOR25,. + 0
-	.type	g_flash_interface_mode, %object
-	.size	g_flash_interface_mode, 1
-g_flash_interface_mode:
-	.space	1
-	.section	.bss.g_flash_multi_page_prog_en,"aw",%nobits
-	.set	.LANCHOR23,. + 0
-	.type	g_flash_multi_page_prog_en, %object
-	.size	g_flash_multi_page_prog_en, 1
-g_flash_multi_page_prog_en:
-	.space	1
-	.section	.bss.g_flash_multi_page_read_en,"aw",%nobits
-	.set	.LANCHOR144,. + 0
-	.type	g_flash_multi_page_read_en, %object
-	.size	g_flash_multi_page_read_en, 1
-g_flash_multi_page_read_en:
-	.space	1
-	.section	.bss.g_flash_page_buffer,"aw",%nobits
-	.align	2
-	.set	.LANCHOR119,. + 0
-	.type	g_flash_page_buffer, %object
-	.size	g_flash_page_buffer, 4
-g_flash_page_buffer:
-	.space	4
-	.section	.bss.g_flash_reversd_blks,"aw",%nobits
-	.set	.LANCHOR123,. + 0
-	.type	g_flash_reversd_blks, %object
-	.size	g_flash_reversd_blks, 1
-g_flash_reversd_blks:
-	.space	1
-	.section	.bss.g_flash_slc_mode,"aw",%nobits
-	.set	.LANCHOR11,. + 0
-	.type	g_flash_slc_mode, %object
-	.size	g_flash_slc_mode, 1
-g_flash_slc_mode:
-	.space	1
-	.section	.bss.g_flash_spare_buffer,"aw",%nobits
+.L2876:
+	.word	.LANCHOR14
+	.word	.LC151
+	.word	.LC152
+	.word	.LC153
+	.word	.LC154
+	.word	.LANCHOR6
+	.word	.LANCHOR85
+	.word	.LANCHOR189
+	.word	.LC0
+	.word	.LANCHOR109
+	.word	.LC155
+	.word	.LC156
+	.word	.LANCHOR123
+	.word	.LANCHOR78
+	.word	.LANCHOR9
+.L2787:
+	add	r3, r6, #8
+	movw	r2, #65535
+	ldrh	r3, [r4, r3, lsl #1]
+	cmp	r3, r2
+	beq	.L2777
+	ldr	r2, .L2878
+	ldr	r1, [r5, #4]
+	ldrh	r2, [r2]
+	mla	r3, r3, r2, r7
+	ldr	r2, [r5, #12]
+	str	r3, [sp, #20]
+	ldr	r3, .L2878+4
+	ldr	r0, [sp, #20]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	bl	ftl_read_ppa_page
+	cmp	r0, #512
+	mov	r8, r0
+	beq	.L2778
+	cmp	r0, #-1
+	beq	.L2779
+	ldr	r3, [r5, #12]
+	ldr	r2, [r3]
+	adds	r2, r2, #1
+	bne	.L2779
+	ldr	r3, [r3, #4]
+	adds	r3, r3, #1
+	bne	.L2779
+	ldr	r3, [r5, #4]
+	ldr	r3, [r3]
+	adds	r3, r3, #1
+	beq	.L2778
+.L2779:
+	ldr	r3, .L2878+8
+	movs	r2, #1
+	strb	r2, [r3]
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	ldrh	r2, [r4, #10]
+	mla	r3, r7, r3, r6
+	cmp	r2, r3
+	beq	.L2780
+	movw	r2, #1412
+	ldr	r1, .L2878+12
+	ldr	r0, .L2878+16
+	bl	printf
+.L2780:
+	ldrh	r3, [r4, #10]
+	ldrh	r2, [r4, #6]
+	add	r2, r2, r3
+	ldr	r3, .L2878+20
+	ldrh	r1, [r3]
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	muls	r3, r1, r3
+	cmp	r2, r3
+	beq	.L2781
+	movw	r2, #1413
+	ldr	r1, .L2878+12
+	ldr	r0, .L2878+16
+	bl	printf
+.L2781:
+	cmp	r8, #-1
+	beq	.L2783
+	ldr	r3, [r5, #12]
+	ldr	r0, [r3, #4]
+	adds	r2, r0, #1
+	beq	.L2783
+	bl	lpa_hash_get_ppa
+	ldr	r3, [sp, #24]
+	mov	r8, r0
+	cmp	r3, #0
+	beq	.L2785
+	ldr	r10, [r5, #12]
+	ldr	r3, [r10, #8]
+	cmp	r0, r3
+	beq	.L2785
+	cmp	r0, #-1
+	beq	.L2785
+	ldr	r3, .L2878+24
+	mov	fp, #1
+	ldr	r2, .L2878+28
+	ldrh	r0, [r3]
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	rsb	r3, r0, #21
+	lsl	r3, fp, r3
+	lsr	r0, r8, r0
+	subs	r3, r3, #1
+	ands	r0, r0, r3
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #24]
+	uxth	r0, r0
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bne	.L2785
+	ldr	r3, [r10]
+	mov	r0, r8
+	ldr	r10, .L2878+48
+	ldr	r1, [r5, #4]
+	str	r3, [sp, #12]
+	ldr	r3, .L2878+4
+	mov	r2, r10
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	bl	ftl_read_ppa_page
+	ldr	r3, [r10]
+	ldr	r2, [sp, #12]
+	cmp	r2, r3
+	bhi	.L2785
+	ldr	r3, [r5, #12]
+	ldr	r0, [r3, #8]
+	adds	r3, r0, #1
+	beq	.L2783
+	ldr	r3, .L2878+24
+	ldrh	r2, [r3]
+	rsb	r3, r2, #21
+	lsrs	r0, r0, r2
+	lsl	r3, fp, r3
+	ldr	r2, .L2878+28
+	subs	r3, r3, #1
+	ands	r0, r0, r3
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	uxth	r0, r0
+	bl	ftl_vpn_decrement
+.L2783:
+	ldrh	r3, [r4, #6]
+	subs	r3, r3, #1
+	strh	r3, [r4, #6]	@ movhi
+	ldrh	r3, [r4, #10]
+	adds	r3, r3, #1
+	strh	r3, [r4, #10]	@ movhi
+	movs	r3, #4
+	str	r3, [sp, #12]
+	movs	r3, #1
+	str	r3, [sp, #16]
+.L2777:
+	adds	r6, r6, #1
+	uxth	r6, r6
+	b	.L2776
+.L2792:
+	ldrh	r1, [r4, #12]
+	add	r1, r1, r2
+	adds	r2, r2, #1
+	ldr	r3, [r7, r1, lsl #2]
+	adds	r3, r3, #1
+	itt	ne
+	addne	r6, r6, #1
+	uxthne	r6, r6
+	b	.L2790
+.L2808:
+	add	fp, sp, #32
+	ldr	r0, [fp, r7, lsl #2]
+	adds	r1, r0, #1
+	bne	.L2796
+.L2800:
+	ldr	r2, .L2878+32
+	mov	r6, #-1
+	ldr	r3, [r5, #12]
+	ldr	r2, [r2]
+	ldr	r2, [r2, #8]
+	str	r6, [r3, #4]
+	str	r6, [r3, #8]
+	str	r2, [r3]
+	movs	r2, #0
+	str	r2, [r3, #12]
+	ldr	r3, [r5, #4]
+	str	r2, [r3]
+.L2797:
+	ldr	r3, [sp, #16]
+	cmp	r3, #0
+	beq	.L2802
+	ldrh	r3, [r4, #6]
+	cmp	r3, #1
+	bls	.L2802
+	ldr	fp, .L2878+52
+.L2853:
+	mov	r0, r4
+	bl	ftl_get_new_free_page
+	ldr	r3, [r8]
+	mov	r10, r0
+	lsls	r0, r3, #17
+	bpl	.L2804
+	ldr	r3, [r5, #12]
+	mov	r1, r10
+	mov	r0, fp
+	ldr	r2, [r3, #4]
+	bl	printf
+.L2804:
+	ldr	r3, .L2878+36
+	ldr	r1, [sp, #12]
+	ldrh	r2, [r4, #6]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	muls	r3, r1, r3
+	adds	r3, r3, #1
+	subs	r3, r3, r7
+	cmp	r2, r3
+	bls	.L2802
+	ldr	r3, [sp, #24]
+	mov	r0, r10
+	ldr	r1, [r5, #4]
+	ldr	r2, [r5, #12]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	bl	ftl_prog_ppa_page
+	mov	r10, r0
+	ldrh	r0, [r4]
+	bl	ftl_vpn_decrement
+	adds	r1, r6, #1
+	beq	.L2805
+	cmp	r10, #-1
+	beq	.L2805
+	ldr	r3, [r8]
+	lsls	r2, r3, #17
+	bpl	.L2806
+	ldrh	r2, [r4, #12]
+	ldrh	r3, [r4, #10]
+	ldr	r1, [r5, #12]
+	ldr	r0, .L2878+40
+	add	r3, r3, r2
+	subs	r3, r3, #1
+	ldr	r2, [r1, #8]
+	ldr	r1, [r1, #4]
+	bl	printf
+.L2806:
+	ldrh	r1, [r4, #12]
+	ldrh	r2, [r4, #10]
+	ldr	r3, [r5, #12]
+	add	r2, r2, r1
+	subs	r2, r2, #1
+	ldr	r1, [r3, #8]
+	uxth	r2, r2
+	ldr	r0, [r3, #4]
+	bl	lpa_hash_update_ppa
+.L2802:
+	adds	r7, r7, #1
+	b	.L2795
+.L2796:
+	ldr	r3, [sp, #24]
+	ldr	r2, [r5, #12]
+	ldr	r1, [r5, #4]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	bl	ftl_read_ppa_page
+	ldr	r3, [r5, #12]
+	mov	r6, r0
+	ldr	r0, [r3, #4]
+	bl	lpa_hash_get_ppa
+	ldr	r3, [r8]
+	mov	r10, r0
+	lsls	r2, r3, #17
+	bpl	.L2798
+	ldr	r3, [r5, #12]
+	mov	r1, r0
+	ldr	r2, [fp, r7, lsl #2]
+	ldr	r0, .L2878+44
+	ldr	r3, [r3, #4]
+	bl	printf
+.L2798:
+	ldr	r2, .L2878+32
+	add	r3, sp, #32
+	ldr	r3, [r3, r7, lsl #2]
+	ldr	r1, [r2]
+	cmp	r10, r3
+	it	ne
+	movne	r6, #-1
+	ldr	r3, [r5, #12]
+	ldr	r2, [r1, #8]
+	adds	r0, r2, #1
+	str	r0, [r1, #8]
+	str	r2, [r3]
+	movs	r2, #1
+	str	r10, [r3, #8]
+	str	r2, [r3, #12]
+	adds	r3, r6, #1
+	bne	.L2797
+	b	.L2800
+.L2805:
+	ldrh	r3, [r4, #6]
+	cmp	r3, #1
+	bls	.L2802
+	adds	r3, r6, #1
+	bne	.L2853
+	b	.L2802
+.L2879:
 	.align	2
-	.set	.LANCHOR118,. + 0
-	.type	g_flash_spare_buffer, %object
-	.size	g_flash_spare_buffer, 4
-g_flash_spare_buffer:
-	.space	4
-	.section	.bss.g_flash_sys_spare_buffer,"aw",%nobits
-	.align	2
-	.set	.LANCHOR116,. + 0
-	.type	g_flash_sys_spare_buffer, %object
-	.size	g_flash_sys_spare_buffer, 4
-g_flash_sys_spare_buffer:
-	.space	4
-	.section	.bss.g_flash_tmp_page_buffer,"aw",%nobits
-	.align	2
-	.set	.LANCHOR111,. + 0
-	.type	g_flash_tmp_page_buffer, %object
-	.size	g_flash_tmp_page_buffer, 4
-g_flash_tmp_page_buffer:
-	.space	4
-	.section	.bss.g_flash_tmp_spare_buffer,"aw",%nobits
-	.align	2
-	.set	.LANCHOR112,. + 0
-	.type	g_flash_tmp_spare_buffer, %object
-	.size	g_flash_tmp_spare_buffer, 4
-g_flash_tmp_spare_buffer:
-	.space	4
-	.section	.bss.g_flash_toggle_mode_en,"aw",%nobits
-	.set	.LANCHOR35,. + 0
-	.type	g_flash_toggle_mode_en, %object
-	.size	g_flash_toggle_mode_en, 1
-g_flash_toggle_mode_en:
-	.space	1
-	.section	.bss.g_ftl_info_blk,"aw",%nobits
-	.align	6
-	.set	.LANCHOR131,. + 0
-	.type	g_ftl_info_blk, %object
-	.size	g_ftl_info_blk, 4
-g_ftl_info_blk:
-	.space	4
-	.section	.bss.g_gc_info,"aw",%nobits
-	.align	2
-	.set	.LANCHOR59,. + 0
-	.type	g_gc_info, %object
-	.size	g_gc_info, 320
-g_gc_info:
-	.space	320
-	.section	.bss.g_idb_ecc_bits,"aw",%nobits
-	.set	.LANCHOR145,. + 0
-	.type	g_idb_ecc_bits, %object
-	.size	g_idb_ecc_bits, 1
-g_idb_ecc_bits:
-	.space	1
-	.section	.bss.g_idb_slc_mode_enable,"aw",%nobits
-	.set	.LANCHOR146,. + 0
-	.type	g_idb_slc_mode_enable, %object
-	.size	g_idb_slc_mode_enable, 1
-g_idb_slc_mode_enable:
-	.space	1
-	.section	.bss.g_lsb_page_tbl,"aw",%nobits
-	.align	2
-	.set	.LANCHOR14,. + 0
-	.type	g_lsb_page_tbl, %object
-	.size	g_lsb_page_tbl, 512
-g_lsb_page_tbl:
-	.space	512
-	.section	.bss.g_maxRegNum,"aw",%nobits
-	.set	.LANCHOR4,. + 0
-	.type	g_maxRegNum, %object
-	.size	g_maxRegNum, 1
-g_maxRegNum:
-	.space	1
-	.section	.bss.g_maxRetryCount,"aw",%nobits
-	.set	.LANCHOR113,. + 0
-	.type	g_maxRetryCount, %object
-	.size	g_maxRetryCount, 1
-g_maxRetryCount:
-	.space	1
-	.section	.bss.g_msb_page_tbl,"aw",%nobits
-	.align	2
-	.set	.LANCHOR96,. + 0
-	.type	g_msb_page_tbl, %object
-	.size	g_msb_page_tbl, 1024
-g_msb_page_tbl:
-	.space	1024
-	.section	.bss.g_nand_max_die,"aw",%nobits
-	.set	.LANCHOR8,. + 0
-	.type	g_nand_max_die, %object
-	.size	g_nand_max_die, 1
-g_nand_max_die:
-	.space	1
-	.section	.bss.g_nandc_ecc_bits,"aw",%nobits
-	.set	.LANCHOR27,. + 0
-	.type	g_nandc_ecc_bits, %object
-	.size	g_nandc_ecc_bits, 1
-g_nandc_ecc_bits:
-	.space	1
-	.section	.bss.g_nandc_v6_master_info,"aw",%nobits
+.L2878:
+	.word	.LANCHOR103
+	.word	.LANCHOR123
+	.word	.LANCHOR182
+	.word	.LANCHOR189
+	.word	.LC0
+	.word	.LANCHOR85
+	.word	.LANCHOR66
+	.word	.LANCHOR67
+	.word	.LANCHOR102
+	.word	.LANCHOR78
+	.word	.LC159
+	.word	.LC157
+	.word	.LANCHOR178
+	.word	.LC158
+.L2785:
+	ldr	r0, [r5, #12]
+	ldr	r3, .L2880
+	ldr	r2, [r0, #4]
+	ldr	r3, [r3]
+	cmp	r2, r3
+	bcs	.L2783
+	ldr	r3, .L2880+4
+	ldrb	r1, [r4, #9]	@ zero_extendqisi2
+	ldrh	ip, [r4, #10]
+	ldrh	r3, [r3]
+	muls	r3, r1, r3
+	subs	r3, r3, #1
+	cmp	ip, r3
+	bge	.L2783
+	ldr	r3, .L2880+8
+	ldr	r1, [r0]
+	ldr	r3, [r3]
+	ldr	r2, [r3, #8]
+	cmp	r1, r2
+	it	hi
+	strhi	r1, [r3, #8]
+	ldrh	r3, [r4, #12]
+	ldr	r1, [r0, #8]
+	ldr	r0, [r0, #4]
+	add	r2, ip, r3
+	uxth	r2, r2
+	bl	lpa_hash_update_ppa
+	ldr	r3, [sp, #36]
+	str	r3, [sp, #32]
+	ldr	r3, [sp, #40]
+	str	r3, [sp, #36]
+	ldr	r3, [sp, #44]
+	str	r3, [sp, #40]
+	ldr	r3, [sp, #20]
+	str	r3, [sp, #44]
+	b	.L2783
+.L2881:
 	.align	2
-	.set	.LANCHOR30,. + 0
-	.type	g_nandc_v6_master_info, %object
-	.size	g_nandc_v6_master_info, 28
-g_nandc_v6_master_info:
-	.space	28
-	.section	.bss.g_nandc_ver,"aw",%nobits
-	.set	.LANCHOR7,. + 0
-	.type	g_nandc_ver, %object
-	.size	g_nandc_ver, 1
-g_nandc_ver:
-	.space	1
-	.section	.bss.g_pm_spare,"aw",%nobits
+.L2880:
+	.word	.LANCHOR120
+	.word	.LANCHOR85
+	.word	.LANCHOR102
+	.size	ftl_open_sblk_recovery, .-ftl_open_sblk_recovery
+	.section	.text.pm_write_page,"ax",%progbits
+	.align	1
+	.global	pm_write_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	pm_write_page, %function
+pm_write_page:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
+	mov	r4, r0
+	ldr	r7, .L2895
+	mov	r8, r1
+	mov	r6, r7
+.L2883:
+	ldr	r3, [r7]
+	ldr	r2, [r3, #48]
+	ldrh	r1, [r3, #696]
+	adds	r2, r2, #1
+	str	r2, [r3, #48]
+	ldr	r2, .L2895+4
+	ldrh	r2, [r2]
+	cmp	r1, r2
+	bcs	.L2884
+	ldrh	r2, [r3, #692]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L2885
+.L2884:
+	bl	pm_alloc_new_blk
+	movs	r0, #0
+	bl	ftl_info_flush
+.L2885:
+	ldr	r3, [r6]
+	ldrh	r2, [r3, #692]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L2886
+	movs	r2, #230
+	ldr	r1, .L2895+8
+	ldr	r0, .L2895+12
+	bl	printf
+.L2886:
+	ldr	r3, [r6]
+	movs	r1, #0
+	ldr	r2, .L2895+16
+	ldr	r10, .L2895+32
+	ldrh	r5, [r3, #692]
+	ldrh	r2, [r2]
+	ldrh	r3, [r3, #696]
+	ldr	r0, [r10]
+	mla	r5, r2, r5, r3
+	movs	r2, #64
+	bl	ftl_memset
+	ldr	r2, [r6]
+	ldr	r3, [r10]
+	ldrb	r0, [r2, #694]	@ zero_extendqisi2
+	str	r4, [r3]
+	ldr	r1, [r2, #48]
+	ldr	r2, .L2895+20
+	str	r1, [r3, #4]
+	mov	r1, r5
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	str	r2, [sp]
+	mov	r2, r8
+	bl	ftl_prog_page
+	ldr	r2, [r6]
+	ldrh	r3, [r2, #696]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	cmp	r3, #1
+	strh	r3, [r2, #696]	@ movhi
+	ldr	r3, .L2895+24
+	beq	.L2887
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	cbz	r1, .L2888
+.L2887:
+	movs	r2, #0
+	strb	r2, [r3]
+	b	.L2883
+.L2888:
+	adds	r0, r0, #1
+	bne	.L2890
+	mov	r1, r5
+	ldr	r0, .L2895+28
+	bl	printf
+	b	.L2883
+.L2890:
+	ldrh	r3, [r2, #698]
+	movs	r0, #0
+	cmp	r4, r3
+	itt	cc
+	addcc	r4, r4, #176
+	strcc	r5, [r2, r4, lsl #2]
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.L2896:
 	.align	2
-	.set	.LANCHOR141,. + 0
-	.type	g_pm_spare, %object
-	.size	g_pm_spare, 4
-g_pm_spare:
-	.space	4
-	.section	.bss.g_retryMode,"aw",%nobits
-	.set	.LANCHOR1,. + 0
-	.type	g_retryMode, %object
-	.size	g_retryMode, 1
-g_retryMode:
-	.space	1
-	.section	.bss.g_slc_mode_addr2,"aw",%nobits
-	.set	.LANCHOR12,. + 0
-	.type	g_slc_mode_addr2, %object
-	.size	g_slc_mode_addr2, 1
-g_slc_mode_addr2:
-	.space	1
-	.section	.bss.g_slc_mode_enable,"aw",%nobits
-	.type	g_slc_mode_enable, %object
-	.size	g_slc_mode_enable, 1
-g_slc_mode_enable:
-	.space	1
-	.section	.bss.g_slc_page_num,"aw",%nobits
+.L2895:
+	.word	.LANCHOR102
+	.word	.LANCHOR85
+	.word	.LANCHOR190
+	.word	.LC0
+	.word	.LANCHOR103
+	.word	.LANCHOR123
+	.word	.LANCHOR192
+	.word	.LC160
+	.word	.LANCHOR191
+	.size	pm_write_page, .-pm_write_page
+	.section	.text.ftl_dump_write_open_sblk,"ax",%progbits
 	.align	1
-	.set	.LANCHOR97,. + 0
-	.type	g_slc_page_num, %object
-	.size	g_slc_page_num, 2
-g_slc_page_num:
-	.space	2
-	.section	.bss.g_totle_phy_block,"aw",%nobits
-	.align	1
-	.set	.LANCHOR99,. + 0
-	.type	g_totle_phy_block, %object
-	.size	g_totle_phy_block, 2
-g_totle_phy_block:
-	.space	2
-	.section	.bss.gc_des_ppa_tbl,"aw",%nobits
-	.align	2
-	.set	.LANCHOR109,. + 0
-	.type	gc_des_ppa_tbl, %object
-	.size	gc_des_ppa_tbl, 4
-gc_des_ppa_tbl:
-	.space	4
-	.section	.bss.gc_lpa_tbl,"aw",%nobits
-	.align	2
-	.set	.LANCHOR107,. + 0
-	.type	gc_lpa_tbl, %object
-	.size	gc_lpa_tbl, 4
-gc_lpa_tbl:
-	.space	4
-	.section	.bss.gc_mode,"aw",%nobits
-	.set	.LANCHOR67,. + 0
-	.type	gc_mode, %object
-	.size	gc_mode, 1
-gc_mode:
-	.space	1
-	.section	.bss.gc_page_buf_id,"aw",%nobits
-	.align	2
-	.set	.LANCHOR65,. + 0
-	.type	gc_page_buf_id, %object
-	.size	gc_page_buf_id, 4
-gc_page_buf_id:
-	.space	4
-	.section	.bss.gc_pre_ppa_tbl,"aw",%nobits
+	.global	ftl_dump_write_open_sblk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_dump_write_open_sblk, %function
+ftl_dump_write_open_sblk:
+	@ args = 0, pretend = 0, frame = 64
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2926
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r5, r0
+	sub	sp, sp, #104
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bls	.L2897
+	ldr	r3, .L2926+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L2899
+	ldr	r3, .L2926+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L2897
+.L2899:
+	ldr	r7, .L2926+12
+	lsls	r4, r5, #2
+	add	r1, sp, #88
+	strh	r5, [sp, #72]	@ movhi
+	mov	r0, r5
+	movs	r6, #0
+	ldr	r3, [r7]
+	add	r3, r3, r4
+	ldrb	r3, [r3, #2]	@ zero_extendqisi2
+	and	r3, r3, #224
+	cmp	r3, #160
+	itet	eq
+	ldreq	r3, .L2926+16
+	movne	r8, #1
+	ldrbeq	r8, [r3]	@ zero_extendqisi2
+	bl	ftl_get_blk_list_in_sblk
+	ldr	r3, .L2926+20
+	uxtb	r0, r0
+	strb	r6, [sp, #77]
+	strb	r0, [sp, #81]
+	ldrh	r3, [r3]
+	strh	r6, [sp, #74]	@ movhi
+	strh	r6, [sp, #82]	@ movhi
+	smulbb	r0, r3, r0
+	ldr	r3, [r7]
+	mov	r7, r6
+	ldr	r1, [r3, r5, lsl #2]
+	add	r4, r4, r3
+	ldrb	r2, [r4, #2]	@ zero_extendqisi2
+	strh	r0, [sp, #78]	@ movhi
+	ubfx	r1, r1, #11, #8
+	ldr	r0, .L2926+24
+	str	r1, [sp, #4]
+	mov	r1, r5
+	ldrh	r3, [r3, r5, lsl #2]
+	ubfx	r3, r3, #0, #11
+	str	r3, [sp]
+	ubfx	r3, r2, #3, #2
+	lsrs	r2, r2, #5
+	bl	printf
+	movs	r0, #1
+	bl	buf_alloc
+	mov	r4, r0
+	str	r6, [sp, #44]
+.L2901:
+	ldr	r3, .L2926+20
+	uxth	r10, r6
+	ldrh	r3, [r3]
+	cmp	r3, r10
+	bls	.L2907
+	mov	r3, r10
+	str	r10, [sp, #52]
+	lsls	r3, r3, #1
+	mov	fp, #0
+	subs	r3, r3, #1
+	str	r3, [sp, #60]
+	b	.L2911
+.L2909:
+	ldr	r3, [sp, #64]
+	add	r2, sp, #104
+	add	r3, r2, r3, lsl #1
+	ldrh	r3, [r3, #-32]
+	str	r3, [sp, #48]
+	movw	r3, #65535
+	ldr	r2, [sp, #48]
+	cmp	r2, r3
+	bne	.L2902
+.L2908:
+	adds	r7, r7, #1
+	uxth	r7, r7
+.L2903:
+	cmp	r8, r7
+	bcs	.L2909
+	add	fp, fp, #1
+.L2911:
+	uxth	r3, fp
+	str	r3, [sp, #44]
+	ldr	r2, [sp, #44]
+	ldrb	r3, [sp, #81]	@ zero_extendqisi2
+	cmp	r3, r2
+	bls	.L2910
+	mov	r3, r2
+	movs	r7, #1
+	adds	r3, r3, #8
+	str	r3, [sp, #64]
+	b	.L2903
+.L2902:
+	ldr	r3, .L2926+28
+	cmp	r8, #3
+	ldr	r2, [sp, #48]
+	ldrh	r3, [r3]
+	mul	r3, r2, r3
+	bne	.L2904
+	uxtah	r3, r3, r6
+	orr	r3, r3, r7, lsl #24
+.L2905:
+	str	r3, [r4, #24]
+	movs	r1, #1
+	mov	r0, r4
+	str	r3, [sp, #68]
+	bl	sblk_read_page
+	ldr	r1, [r4, #12]
+	ldr	r2, [r4, #4]
+	ldr	r3, [r4, #36]
+	ldr	r0, [r1, #12]
+	str	r3, [sp, #56]
+	str	r0, [sp, #32]
+	ldr	r0, [r1, #8]
+	str	r0, [sp, #28]
+	ldr	r0, [r1, #4]
+	str	r0, [sp, #24]
+	ldr	r1, [r1]
+	ldr	r0, .L2926+32
+	str	r1, [sp, #20]
+	ldr	r1, [r2, #12]
+	str	r1, [sp, #16]
+	ldr	r1, [r2, #8]
+	str	r1, [sp, #12]
+	ldr	r1, [r2, #4]
+	str	r1, [sp, #8]
+	ldr	r2, [r2]
+	ldr	r1, [sp, #48]
+	str	r3, [sp]
+	str	r2, [sp, #4]
+	ldr	r3, [sp, #68]
+	ldr	r2, [sp, #52]
+	bl	printf
+	ldr	r3, [sp, #56]
+	cmp	r3, #512
+	bne	.L2908
+.L2907:
+	uxth	r2, r6
+	ldr	r6, .L2926+36
+	ldr	r3, [sp, #44]
+	mov	r1, r5
+	str	r7, [sp]
+	ldr	r0, .L2926+40
+	bl	printf
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	movs	r1, #0
+	ldr	r0, [r4, #4]
+	ldr	fp, .L2926+4
+	lsls	r2, r2, #9
+	bl	ftl_memset
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	movs	r1, #0
+	ldr	r0, [r4, #12]
+	lsls	r2, r2, #1
+	bl	ftl_memset
+.L2912:
+	ldr	r3, .L2926+20
+	ldrh	r3, [r3]
+	cmp	r3, r10
+	bls	.L2917
+	lsl	r3, r10, #1
+	movs	r7, #0
+	str	r3, [sp, #44]
+	b	.L2918
+.L2904:
+	cmp	r8, #2
+	itett	eq
+	ldreq	r2, [sp, #60]
+	uxtahne	r3, r3, r6
+	addeq	r3, r3, r2
+	ldreq	r2, .L2926+16
+	ittt	eq
+	addeq	r3, r3, r7
+	ldrbeq	r2, [r2]	@ zero_extendqisi2
+	orreq	r3, r3, r2, lsl #24
+	b	.L2905
+.L2910:
+	adds	r6, r6, #1
+	b	.L2901
+.L2916:
+	uxth	r8, r7
+	mov	r1, r10
+	ldr	r0, .L2926+44
+	mov	r2, r8
+	bl	printf
+	ldrb	ip, [fp]	@ zero_extendqisi2
+	add	r2, r8, #8
+	ldr	r1, .L2926+28
+	cmp	ip, #0
+	beq	.L2913
+	add	r3, sp, #104
+	mov	r0, r4
+	add	r2, r3, r2, lsl #1
+	ldrh	r3, [r1]
+	ldrh	r2, [r2, #-32]
+	muls	r3, r2, r3
+	orr	r3, r3, r10
+	str	r3, [r4, #24]
+	bl	sblk_3d_tlc_dump_prog
+.L2914:
+	adds	r7, r7, #1
+.L2918:
+	ldrb	r2, [sp, #81]	@ zero_extendqisi2
+	uxth	r3, r7
+	cmp	r2, r3
+	bhi	.L2916
+	add	r3, r10, #1
+	uxth	r10, r3
+	b	.L2912
+.L2913:
+	ldr	r3, .L2926+16
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #2
+	add	r3, sp, #104
+	add	r2, r3, r2, lsl #1
+	bne	.L2915
+	ldrh	r2, [r2, #-32]
+	mov	r0, r4
+	ldrh	r3, [r1]
+	muls	r3, r2, r3
+	ldr	r2, [sp, #44]
+	orrs	r3, r3, r2
+	orr	r3, r3, #33554432
+	str	r3, [r4, #24]
+	bl	sblk_mlc_dump_prog
+	b	.L2914
+.L2915:
+	ldrh	r3, [r2, #-32]
+	ldrh	r0, [r1]
+	muls	r0, r3, r0
+	orr	r0, r0, r10
+	str	r0, [r4, #24]
+	bic	r1, r0, #14680064
+	str	ip, [sp, #4]
+	ubfx	r0, r0, #21, #3
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	str	r3, [sp]
+	ldr	r3, [r4, #12]
+	ldr	r2, [r4, #4]
+	bl	flash_prog_page_en
+	b	.L2914
+.L2917:
+	mov	r0, r4
+	bl	buf_free
+	mov	r1, r5
+	ldr	r0, .L2926+48
+	bl	printf
+.L2897:
+	add	sp, sp, #104
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2927:
 	.align	2
-	.set	.LANCHOR108,. + 0
-	.type	gc_pre_ppa_tbl, %object
-	.size	gc_pre_ppa_tbl, 4
-gc_pre_ppa_tbl:
-	.space	4
-	.section	.bss.gc_slc_mode_vpn_th,"aw",%nobits
-	.align	1
-	.set	.LANCHOR58,. + 0
-	.type	gc_slc_mode_vpn_th, %object
-	.size	gc_slc_mode_vpn_th, 2
-gc_slc_mode_vpn_th:
-	.space	2
-	.section	.bss.gc_state,"aw",%nobits
-	.set	.LANCHOR104,. + 0
-	.type	gc_state, %object
-	.size	gc_state, 1
-gc_state:
-	.space	1
-	.section	.bss.gc_tlc_mode_slc_vpn_th,"aw",%nobits
-	.align	1
-	.set	.LANCHOR105,. + 0
-	.type	gc_tlc_mode_slc_vpn_th, %object
-	.size	gc_tlc_mode_slc_vpn_th, 2
-gc_tlc_mode_slc_vpn_th:
-	.space	2
-	.section	.bss.gc_tlc_mode_tlc_vpn_th,"aw",%nobits
+.L2926:
+	.word	.LANCHOR6
+	.word	.LANCHOR75
+	.word	.LANCHOR72
+	.word	.LANCHOR7
+	.word	.LANCHOR71
+	.word	.LANCHOR85
+	.word	.LC161
+	.word	.LANCHOR103
+	.word	.LC162
+	.word	.LANCHOR123
+	.word	.LC163
+	.word	.LC164
+	.word	.LC165
+	.size	ftl_dump_write_open_sblk, .-ftl_dump_write_open_sblk
+	.section	.text.flash_info_flush,"ax",%progbits
 	.align	1
-	.set	.LANCHOR106,. + 0
-	.type	gc_tlc_mode_tlc_vpn_th, %object
-	.size	gc_tlc_mode_tlc_vpn_th, 2
-gc_tlc_mode_tlc_vpn_th:
-	.space	2
-	.section	.bss.gc_valid_page_ppa,"aw",%nobits
-	.align	2
-	.set	.LANCHOR61,. + 0
-	.type	gc_valid_page_ppa, %object
-	.size	gc_valid_page_ppa, 4
-gc_valid_page_ppa:
-	.space	4
-	.section	.bss.gpNandParaInfo,"aw",%nobits
-	.align	2
-	.set	.LANCHOR34,. + 0
-	.type	gpNandParaInfo, %object
-	.size	gpNandParaInfo, 4
-gpNandParaInfo:
-	.space	4
-	.section	.bss.gp_blk_info,"aw",%nobits
-	.align	2
-	.set	.LANCHOR57,. + 0
-	.type	gp_blk_info, %object
-	.size	gp_blk_info, 4
-gp_blk_info:
-	.space	4
-	.section	.bss.gp_flash_info,"aw",%nobits
-	.align	2
-	.set	.LANCHOR5,. + 0
-	.type	gp_flash_info, %object
-	.size	gp_flash_info, 4
-gp_flash_info:
-	.space	4
-	.section	.bss.gp_ftl_ext_info,"aw",%nobits
-	.align	2
-	.set	.LANCHOR60,. + 0
-	.type	gp_ftl_ext_info, %object
-	.size	gp_ftl_ext_info, 4
-gp_ftl_ext_info:
-	.space	4
-	.section	.bss.gp_ftl_info,"aw",%nobits
-	.align	2
-	.set	.LANCHOR46,. + 0
-	.type	gp_ftl_info, %object
-	.size	gp_ftl_info, 4
-gp_ftl_info:
-	.space	4
-	.section	.bss.gp_nandc,"aw",%nobits
+	.global	flash_info_flush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_info_flush, %function
+flash_info_flush:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r3, .L2940
+	ldr	r3, [r3]
+	lsls	r3, r3, #19
+	bpl	.L2929
+	ldr	r2, .L2940+4
+	mov	r1, #324
+	ldr	r0, .L2940+8
+	bl	printf
+.L2929:
+	ldr	r5, .L2940+12
+	movs	r2, #64
+	ldr	r6, .L2940+16
+	movs	r1, #0
+	movs	r7, #0
+	ldr	r0, [r5]
+	bl	ftl_memset
+	movs	r3, #16
+	movs	r2, #4
+	ldr	r1, [r6]
+	ldr	r0, .L2940+20
+	bl	rknand_print_hex
+	ldr	r4, [r6]
+	ldr	r1, [r4, #8]
+	add	r0, r4, #16
+	bl	js_hash
+	str	r5, [sp, #8]
+	ldr	r5, .L2940+24
+	str	r0, [r4, #12]
+	mov	r8, r5
+.L2930:
+	ldr	fp, .L2940+44
+	ldrb	r10, [r5]	@ zero_extendqisi2
+	ldrh	r4, [r5, #2]
+	ldrh	r3, [fp]
+	mov	r1, r10
+	ldr	r0, .L2940+28
+	mov	r2, r4
+	str	r3, [sp, #12]
+	bl	printf
+	ldr	r2, .L2940+32
+	ldrh	r0, [r5, #2]
+	ldr	r3, [sp, #12]
+	ldrh	r2, [r2]
+	subs	r2, r2, #1
+	cmp	r0, r2
+	blt	.L2931
+	ldr	r4, [r6]
+	mov	r10, #0
+	ldrb	r2, [r5]	@ zero_extendqisi2
+	strh	r10, [r5, #2]	@ movhi
+	ldr	r3, [r4, #4]
+	mov	r0, r4
+	ldr	r1, [r4, #8]
+	adds	r3, r3, #1
+	str	r3, [r4, #4]
+	ldrb	r3, [r5, #1]	@ zero_extendqisi2
+	strb	r2, [r5, #1]
+	ldrh	r2, [r4, #16]
+	strb	r3, [r5]
+	str	r3, [sp, #12]
+	adds	r2, r2, #1
+	strh	r2, [r0, #16]!	@ movhi
+	bl	js_hash
+	ldr	r3, [sp, #12]
+	str	r0, [r4, #12]
+	mov	r0, r10
+	ldrh	r4, [fp]
+	muls	r4, r3, r4
+	mov	r1, r4
+.L2939:
+	bl	flash_erase_block
+.L2932:
+	ldr	r2, [r6]
+	mov	r10, #1
+	ldr	r3, [sp, #8]
+	movs	r0, #0
+	ldr	r1, [r2, #4]
+	ldr	r3, [r3]
+	str	r1, [r3]
+	ldr	r1, .L2940+36
+	str	r1, [r3, #4]
+	movs	r1, #4
+	stm	sp, {r1, r10}
+	mov	r1, r4
+	bl	flash_prog_page_en
+	ldrh	r3, [r8, #2]
+	adds	r0, r0, #1
+	add	r3, r3, r10
+	strh	r3, [r8, #2]	@ movhi
+	bne	.L2933
+	mov	r1, r4
+	ldr	r0, .L2940+40
+	bl	printf
+	b	.L2930
+.L2935:
+	mov	r7, r10
+	b	.L2930
+.L2931:
+	mla	r4, r10, r3, r4
+	cmp	r0, #0
+	bne	.L2932
+	mov	r1, r4
+	b	.L2939
+.L2933:
+	cmp	r7, #0
+	beq	.L2935
+	movs	r0, #0
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2941:
 	.align	2
-	.set	.LANCHOR6,. + 0
-	.type	gp_nandc, %object
-	.size	gp_nandc, 4
-gp_nandc:
-	.space	4
-	.section	.bss.lpa_hash,"aw",%nobits
+.L2940:
+	.word	.LANCHOR14
+	.word	.LANCHOR193
+	.word	.LC90
+	.word	.LANCHOR194
+	.word	.LANCHOR27
+	.word	.LC166
+	.word	.LANCHOR195
+	.word	.LC167
+	.word	.LANCHOR140
+	.word	1398362953
+	.word	.LC168
+	.word	.LANCHOR2
+	.size	flash_info_flush, .-flash_info_flush
+	.section	.text.flash_info_blk_init,"ax",%progbits
 	.align	1
-	.set	.LANCHOR81,. + 0
-	.type	lpa_hash, %object
-	.size	lpa_hash, 512
-lpa_hash:
-	.space	512
-	.section	.bss.lpa_hash_index,"aw",%nobits
-	.align	2
-	.set	.LANCHOR83,. + 0
-	.type	lpa_hash_index, %object
-	.size	lpa_hash_index, 4
-lpa_hash_index:
-	.space	4
-	.section	.bss.nandc_hw_seed,"aw",%nobits
-	.set	.LANCHOR28,. + 0
-	.type	nandc_hw_seed, %object
-	.size	nandc_hw_seed, 1
-nandc_hw_seed:
-	.space	1
-	.section	.bss.nandc_randomizer_en,"aw",%nobits
-	.set	.LANCHOR29,. + 0
-	.type	nandc_randomizer_en, %object
-	.size	nandc_randomizer_en, 1
-nandc_randomizer_en:
-	.space	1
-	.section	.bss.p_free_buf_head,"aw",%nobits
-	.set	.LANCHOR37,. + 0
-	.type	p_free_buf_head, %object
-	.size	p_free_buf_head, 1
-p_free_buf_head:
-	.space	1
-	.section	.bss.p_read_ahead_ext_buf,"aw",%nobits
-	.align	2
-	.set	.LANCHOR50,. + 0
-	.type	p_read_ahead_ext_buf, %object
-	.size	p_read_ahead_ext_buf, 4
-p_read_ahead_ext_buf:
-	.space	4
-	.section	.bss.pm_gc_enable,"aw",%nobits
-	.align	2
-	.set	.LANCHOR91,. + 0
-	.type	pm_gc_enable, %object
-	.size	pm_gc_enable, 4
-pm_gc_enable:
-	.space	4
-	.section	.bss.pm_last_load_ram_id,"aw",%nobits
-	.set	.LANCHOR151,. + 0
-	.type	pm_last_load_ram_id, %object
-	.size	pm_last_load_ram_id, 1
-pm_last_load_ram_id:
-	.space	1
-	.section	.bss.pm_last_update_ram_id,"aw",%nobits
-	.set	.LANCHOR94,. + 0
-	.type	pm_last_update_ram_id, %object
-	.size	pm_last_update_ram_id, 1
-pm_last_update_ram_id:
-	.space	1
-	.section	.bss.pm_ram_info,"aw",%nobits
-	.align	2
-	.set	.LANCHOR93,. + 0
-	.type	pm_ram_info, %object
-	.size	pm_ram_info, 256
-pm_ram_info:
-	.space	256
-	.section	.bss.read_ahead_lpa,"aw",%nobits
-	.align	2
-	.set	.LANCHOR49,. + 0
-	.type	read_ahead_lpa, %object
-	.size	read_ahead_lpa, 4
-read_ahead_lpa:
-	.space	4
-	.section	.bss.sblk_gc_write_completed_queue_head,"aw",%nobits
-	.set	.LANCHOR62,. + 0
-	.type	sblk_gc_write_completed_queue_head, %object
-	.size	sblk_gc_write_completed_queue_head, 1
-sblk_gc_write_completed_queue_head:
-	.space	1
-	.section	.bss.sblk_queue_head,"aw",%nobits
-	.set	.LANCHOR90,. + 0
-	.type	sblk_queue_head, %object
-	.size	sblk_queue_head, 1
-sblk_queue_head:
-	.space	1
-	.section	.bss.sblk_read_completed_queue_head,"aw",%nobits
-	.set	.LANCHOR51,. + 0
-	.type	sblk_read_completed_queue_head, %object
-	.size	sblk_read_completed_queue_head, 1
-sblk_read_completed_queue_head:
-	.space	1
-	.section	.bss.sblk_write_completed_queue_head,"aw",%nobits
-	.set	.LANCHOR88,. + 0
-	.type	sblk_write_completed_queue_head, %object
-	.size	sblk_write_completed_queue_head, 1
-sblk_write_completed_queue_head:
-	.space	1
-	.section	.bss.write_buf_count,"aw",%nobits
-	.set	.LANCHOR43,. + 0
-	.type	write_buf_count, %object
-	.size	write_buf_count, 1
-write_buf_count:
-	.space	1
-	.section	.bss.write_buf_head,"aw",%nobits
-	.set	.LANCHOR42,. + 0
-	.type	write_buf_head, %object
-	.size	write_buf_head, 1
-write_buf_head:
-	.space	1
-	.section	.bss.write_commit_count,"aw",%nobits
-	.set	.LANCHOR89,. + 0
-	.type	write_commit_count, %object
-	.size	write_commit_count, 1
-write_commit_count:
-	.space	1
-	.section	.bss.write_commit_head,"aw",%nobits
-	.set	.LANCHOR127,. + 0
-	.type	write_commit_head, %object
-	.size	write_commit_head, 1
-write_commit_head:
-	.space	1
-	.section	.data.NandFlashParaTbl,"aw",%progbits
+	.global	flash_info_blk_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_info_blk_init, %function
+flash_info_blk_init:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r3, .L2971
+	ldr	r4, .L2971+4
+	ldr	r3, [r3]
+	tst	r3, #4096
+	beq	.L2943
+	ldr	r3, [r4]
+	movs	r1, #50
+	ldr	r2, .L2971+8
+	ldr	r0, .L2971+12
+	str	r3, [sp]
+	mov	r3, #2048
+	bl	printf
+.L2943:
+	ldr	r7, .L2971+16
+	movs	r6, #4
+.L2946:
+	ldr	r10, .L2971+32
+	mov	r8, #4
+	ldr	r5, .L2971+20
+	movs	r0, #0
+	ldr	r2, [r4]
+	ldrh	r1, [r10]
+	ldr	r3, [r5]
+	str	r8, [sp]
+	muls	r1, r6, r1
+	bl	flash_read_page_en
+	adds	r0, r0, #1
+	beq	.L2944
+	ldr	r2, [r4]
+	ldr	r3, [r2]
+	cmp	r3, r7
+	beq	.L2945
+.L2944:
+	adds	r6, r6, #1
+	cmp	r6, #16
+	bne	.L2946
+.L2970:
+	mov	r0, #-1
+.L2942:
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2954:
+	ldr	r3, [r4]
+	ldr	r2, [r3]
+	cmp	r2, r7
+	bne	.L2955
+	ldr	r8, [r3, #4]
+.L2948:
+	ldrh	r0, [r10]
+	movs	r3, #4
+	ldrb	r1, [r6, #1]	@ zero_extendqisi2
+	ldr	r2, [r4]
+	str	r3, [sp]
+	ldr	r3, [r5]
+	muls	r1, r0, r1
+	movs	r0, #0
+	bl	flash_read_page_en
+	adds	r0, r0, #1
+	beq	.L2949
+	ldr	r3, [r4]
+	ldr	r2, [r3]
+	cmp	r2, r7
+	bne	.L2949
+	ldr	r2, [r3, #4]
+	cmp	r8, r2
+	itttt	cc
+	ldrbcc	r2, [r3, #37]	@ zero_extendqisi2
+	ldrbcc	r3, [r3, #36]	@ zero_extendqisi2
+	strbcc	r2, [r6]
+	strbcc	r3, [r6, #1]
+.L2949:
+	mov	r8, #4
+	ldrb	r1, [r6]	@ zero_extendqisi2
+	ldr	r3, [r5]
+	movs	r0, #0
+	str	r8, [sp]
+	ldr	r2, [r4]
+	bl	flash_get_last_written_page
+	uxth	fp, r0
+	ldrh	r10, [r10]
+	add	r3, fp, #1
+	strh	r3, [r6, #2]	@ movhi
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	movs	r6, #0
+	mla	r10, r10, r3, r0
+.L2950:
+	sub	r0, fp, r6
+	sxth	r3, r0
+	cmp	r3, #0
+	bge	.L2953
+	adds	r2, r3, #1
+	bne	.L2952
+	ldr	r2, [r4]
+	ldr	r0, .L2971+24
+	str	r3, [sp, #12]
+	ldr	r1, [r2]
+	bl	printf
+	b	.L2970
+.L2953:
+	str	r8, [sp]
+	sub	r1, r10, r6
+	ldr	r3, [r5]
+	movs	r0, #0
+	ldr	r2, [r4]
+	bl	flash_read_page_en
+	adds	r0, r0, #1
+	beq	.L2951
+	ldr	r3, [r4]
+	ldr	r3, [r3]
+	cmp	r3, r7
+	beq	.L2952
+.L2951:
+	adds	r6, r6, #1
+	b	.L2950
+.L2952:
+	cmp	r6, #1
+	bls	.L2956
+	bl	flash_info_flush
+.L2956:
+	movs	r0, #0
+	b	.L2942
+.L2945:
+	ldrb	r1, [r2, #36]	@ zero_extendqisi2
+	ldrh	r0, [r10]
+	ldrb	r3, [r2, #37]	@ zero_extendqisi2
+	ldr	r6, .L2971+28
+	strb	r1, [r6]
+	muls	r1, r0, r1
+	strb	r3, [r6, #1]
+	movs	r0, #0
+	str	r8, [sp]
+	ldr	r3, [r5]
+	bl	flash_read_page_en
+	adds	r0, r0, #1
+	bne	.L2954
+.L2955:
+	mov	r8, #0
+	b	.L2948
+.L2972:
+	.align	2
+.L2971:
+	.word	.LANCHOR14
+	.word	.LANCHOR27
+	.word	.LANCHOR196
+	.word	.LC169
+	.word	1398362953
+	.word	.LANCHOR194
+	.word	.LC170
+	.word	.LANCHOR195
+	.word	.LANCHOR2
+	.size	flash_info_blk_init, .-flash_info_blk_init
+	.section	.text.nand_flash_init,"ax",%progbits
 	.align	1
-	.set	.LANCHOR142,. + 0
-	.type	NandFlashParaTbl, %object
-	.size	NandFlashParaTbl, 768
-NandFlashParaTbl:
-	.byte	6
-	.byte	-104
-	.byte	58
-	.byte	-104
-	.byte	-77
-	.byte	118
-	.byte	114
-	.byte	1
-	.byte	1
-	.byte	32
-	.short	768
-	.byte	3
-	.byte	2
-	.short	758
-	.short	5593
-	.byte	0
-	.byte	37
-	.byte	60
-	.byte	32
-	.byte	2
-	.byte	1
-	.byte	4
-	.byte	0
-	.short	256
-	.byte	1
-	.byte	-94
-	.byte	0
-	.byte	0
-	.byte	6
-	.byte	-104
-	.byte	60
-	.byte	-104
-	.byte	-77
-	.byte	118
-	.byte	114
-	.byte	1
-	.byte	1
-	.byte	32
-	.short	768
-	.byte	3
-	.byte	2
-	.short	1478
-	.short	5593
-	.byte	0
-	.byte	37
-	.byte	60
-	.byte	32
-	.byte	2
-	.byte	1
-	.byte	4
-	.byte	0
-	.short	256
-	.byte	1
-	.byte	-94
-	.byte	0
-	.byte	0
-	.byte	6
-	.byte	-104
-	.byte	58
-	.byte	-104
-	.byte	-93
-	.byte	118
-	.byte	81
-	.byte	1
-	.byte	1
-	.byte	32
-	.short	384
-	.byte	3
-	.byte	2
-	.short	1446
-	.short	1497
-	.byte	0
-	.byte	36
-	.byte	60
-	.byte	32
-	.byte	2
-	.byte	1
-	.byte	4
-	.byte	0
-	.short	256
-	.byte	1
-	.byte	-94
-	.byte	0
-	.byte	0
-	.byte	6
-	.byte	-104
-	.byte	-34
-	.byte	-108
-	.byte	-109
-	.byte	118
-	.byte	81
-	.byte	1
-	.byte	1
-	.byte	32
-	.short	256
-	.byte	2
-	.byte	2
-	.short	1074
-	.short	17881
-	.byte	2
-	.byte	35
-	.byte	40
-	.byte	32
-	.byte	3
-	.byte	1
-	.byte	4
-	.byte	0
-	.short	256
-	.byte	1
-	.byte	-94
-	.byte	0
-	.byte	0
-	.byte	6
-	.byte	-104
-	.byte	-34
-	.byte	-124
-	.byte	-109
-	.byte	114
-	.byte	87
-	.byte	1
-	.byte	1
-	.byte	32
-	.short	256
-	.byte	2
-	.byte	1
-	.short	2092
-	.short	17857
-	.byte	2
-	.byte	33
-	.byte	40
-	.byte	32
-	.byte	2
-	.byte	1
+	.global	nand_flash_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	nand_flash_init, %function
+nand_flash_init:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r0
+	ldr	r6, .L3055
+	ldr	r3, [r6]
+	lsls	r7, r3, #19
+	bpl	.L2974
+	ldr	r2, .L3055+4
+	movw	r1, #2490
+	ldr	r0, .L3055+8
+	bl	printf
+.L2974:
+	ldr	r3, .L3055+12
+	mov	r0, r4
+	ldr	r7, .L3055+16
+	movs	r5, #0
+	ldr	r4, .L3055+20
+	str	r5, [r3]
+	mov	r8, r7
+	bl	nandc_init
+	ldr	r3, .L3055+24
+	movs	r2, #1
+	str	r4, [r7]
+	mov	r1, r5
+	ldr	r7, .L3055+28
+	strb	r2, [r3]
+	movs	r2, #8
+	ldr	r0, .L3055+32
+	mov	r10, r7
+	bl	ftl_memset
+	movs	r2, #32
+	mov	r1, r5
+	ldr	r0, .L3055+36
+	bl	ftl_memset
+.L2980:
+	lsl	fp, r5, #3
+	uxtb	r0, r5
+	add	r1, r7, fp
+	bl	flash_read_id
+	cbnz	r5, .L2975
+	ldrb	r3, [r7]	@ zero_extendqisi2
+	subs	r3, r3, #1
+	uxtb	r3, r3
+	cmp	r3, #253
+	bls	.L2976
+.L2978:
+	mvn	r10, #1
+.L2973:
+	mov	r0, r10
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2976:
+	ldrb	r3, [r7, #1]	@ zero_extendqisi2
+	cmp	r3, #255
+	beq	.L2978
+.L2975:
+	ldrb	r3, [r10, fp]	@ zero_extendqisi2
+	adds	r5, r5, #1
+	cmp	r3, #181
+	itt	eq
+	moveq	r3, #44
+	strbeq	r3, [r10, fp]
+	cmp	r5, #4
+	bne	.L2980
+	ldr	r7, .L3055+40
+	movs	r5, #0
+	ldr	r3, .L3055+28
+.L2983:
+	mov	r1, r3
+	ldrb	r2, [r7, #-1]	@ zero_extendqisi2
+	mov	r0, r7
+	str	r3, [sp, #4]
+	lsl	fp, r5, #5
+	bl	flash_mem_cmp8
+	ldr	r3, [sp, #4]
+	cmp	r0, #0
+	bne	.L2981
+	ldr	r5, .L3055+44
+	ldr	r3, .L3055+48
+	add	r5, r5, fp
+	ldrb	r2, [r5, #22]	@ zero_extendqisi2
+	mov	r1, r3
+.L2982:
+	lsls	r7, r0, #5
+	ldrb	r7, [r7, r3]	@ zero_extendqisi2
+	cmp	r7, r2
+	beq	.L2984
+	adds	r0, r0, #1
+	cmp	r0, #4
+	bne	.L2982
+.L2984:
+	add	r1, r1, r0, lsl #5
+	movs	r2, #32
+	ldr	r0, .L3055+52
+	bl	ftl_memcpy
+	movs	r2, #32
+	mov	r1, r5
+	ldr	r0, .L3055+20
+	bl	ftl_memcpy
+	ldr	r2, .L3055+56
+	ldrb	r3, [r2]	@ zero_extendqisi2
+	mov	fp, r2
+	cmp	r3, #8
+	bhi	.L2985
+	ldrb	r2, [r4, #20]	@ zero_extendqisi2
+	cmp	r2, #60
+	bls	.L2986
+	movs	r2, #60
+	strb	r2, [r4, #20]
+.L2986:
+	cmp	r3, #8
+	bne	.L2985
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	cmp	r3, #44
+	beq	.L2987
+	cmp	r3, #137
+	bne	.L2985
+.L2987:
+	ldrb	r3, [r4, #28]	@ zero_extendqisi2
+	cmp	r3, #3
+	itt	eq
+	moveq	r3, #0
+	strbeq	r3, [r4, #28]
+.L2985:
+	ldr	r3, [r6]
+	lsls	r5, r3, #19
+	bpl	.L2988
+	ldr	r2, .L3055+4
+	movw	r1, #2515
+	ldr	r0, .L3055+8
+	bl	printf
+.L2988:
+	mov	r0, #16384
+	ldr	r7, .L3055+60
+	bl	ftl_malloc
+	ldr	r3, .L3055+64
+	mov	r10, #0
+	str	r0, [r3]
+	mov	r0, #16384
+	bl	ftl_malloc
+	ldr	r3, .L3055+68
+	str	r0, [r3]
+	mov	r0, #2048
+	bl	ftl_malloc
+	str	r0, [r7]
+	movs	r0, #64
+	bl	ftl_malloc
+	ldr	r3, .L3055+72
+	str	r0, [r3]
+	movs	r0, #64
+	bl	ftl_malloc
+	ldr	r3, .L3055+76
+	str	r0, [r3]
+	movs	r0, #64
+	bl	ftl_malloc
+	ldr	r3, .L3055+80
+	str	r0, [r3]
+	ldr	r3, .L3055+84
+	strb	r10, [r3]
+	bl	flash_die_info_init
+	ldrb	r0, [r4, #18]	@ zero_extendqisi2
+	bl	flash_lsb_page_tbl_build
+	ldrb	r0, [r4, #20]	@ zero_extendqisi2
+	bl	nandc_bch_sel
+	ldr	r2, [r8]
+	ldr	r1, .L3055+88
+	ldrh	r3, [r2, #16]
+	ldrb	r2, [r2, #28]	@ zero_extendqisi2
+	mov	r8, r1
+	ubfx	r0, r3, #8, #3
+	ubfx	r5, r3, #3, #1
+	strb	r0, [r1]
+	ldr	r0, .L3055+92
+	strb	r5, [r0]
+	ubfx	r5, r3, #4, #1
+	ldr	r0, .L3055+96
+	strb	r5, [r0]
+	ubfx	r5, r3, #12, #1
+	ldr	r0, .L3055+100
+	strb	r5, [r0]
+	ubfx	r5, r3, #13, #1
+	ldr	r0, .L3055+104
+	strb	r5, [r0]
+	ubfx	r5, r3, #14, #1
+	ldr	r0, .L3055+108
+	lsrs	r3, r3, #15
+	strb	r5, [r0]
+	ldr	r0, .L3055+112
+	ldr	r5, .L3055+116
+	strb	r3, [r0]
+	movs	r0, #60
+	ldr	r3, .L3055+120
+	str	r10, [r5]
+	strb	r2, [r3]
+	ldr	r3, .L3055+124
+	strb	r0, [r3]
+	ldrb	r0, [fp]	@ zero_extendqisi2
+	cmp	r0, #9
+	itt	eq
+	moveq	r1, #70
+	strbeq	r1, [r3]
+	ldr	r3, .L3055+128
+	ldrh	r1, [r4, #16]
+	strb	r2, [r3]
+	ldrb	r2, [r4, #7]	@ zero_extendqisi2
+	cmp	r2, #9
+	itt	eq
+	moveq	r2, #0
+	strbeq	r2, [r3]
+	tst	r1, #64
+	ldrb	r3, [r4, #19]	@ zero_extendqisi2
+	ldr	r2, .L3055+132
+	strb	r3, [r2]
+	mov	r4, r2
+	beq	.L2992
+	sub	r2, r3, #17
+	cmp	r2, #2
+	bls	.L2993
+	cmp	r3, #21
+	bne	.L2994
+.L2993:
+	ldr	r2, .L3055+136
+	cmp	r3, #21
+	ldr	r3, .L3055+140
+	str	r2, [r5]
+	beq	.L3054
+	movs	r2, #15
+.L3052:
+	strb	r2, [r3]
+.L2992:
+	ldr	r3, [r6]
+	lsls	r0, r3, #19
+	bpl	.L3004
+	ldr	r2, .L3055+4
+	movw	r1, #2573
+	ldr	r0, .L3055+8
+	bl	printf
+.L3004:
+	ldr	r3, .L3055+144
+	movs	r2, #0
+	movs	r0, #4
+	strb	r2, [r3]
+	mov	fp, r3
+	ldrb	r2, [r8]	@ zero_extendqisi2
+	tst	r2, #1
+	beq	.L3005
+	bl	nandc_set_if_mode
+	movs	r0, #1
+	bl	flash_set_interface_mode
+	movs	r0, #1
+.L3005:
+	bl	nandc_set_if_mode
+	bl	flash_info_blk_init
+	cmp	r0, #-1
+	mov	r10, r0
+	bne	.L3007
+	ldr	r3, [r6]
+	lsls	r1, r3, #19
+	bpl	.L3008
+	ldr	r2, .L3055+4
+	movw	r1, #2605
+	ldr	r0, .L3055+8
+	bl	printf
+.L3008:
+	ldr	r3, [r7]
+	movs	r2, #17
+	movs	r0, #0
+	strb	r2, [r3, #32]
+	bl	zftl_flash_exit_slc_mode
+	b	.L2973
+.L2981:
+	adds	r5, r5, #1
+	adds	r7, r7, #32
+	cmp	r5, #38
+	bne	.L2983
+	b	.L2978
+.L2994:
+	cmp	r3, #33
+	beq	.L2997
+	sub	r2, r3, #65
+	cmp	r2, #1
+	bhi	.L2998
+.L2997:
+	ldr	r3, .L3055+148
+	movs	r2, #4
+	str	r3, [r5]
+	ldr	r3, .L3055+152
+	strb	r2, [r3]
+.L3053:
+	movs	r2, #7
+	ldr	r3, .L3055+140
+	b	.L3052
+.L2998:
+	sub	r2, r3, #67
+	uxtb	r2, r2
+	cmp	r2, #1
+	bls	.L2999
+	sub	r1, r3, #34
+	cmp	r1, #1
+	bhi	.L3000
+.L2999:
+	ldr	r1, .L3055+148
+	cmp	r3, #35
+	str	r1, [r5]
+	ldr	r1, .L3055+140
+	beq	.L3001
+	cmp	r3, #68
+	beq	.L3001
+	movs	r3, #7
+.L3051:
+	cmp	r2, #1
+	strb	r3, [r1]
+	ldr	r3, .L3055+152
+	bhi	.L3003
+.L3054:
+	movs	r2, #4
+	b	.L3052
+.L3001:
+	movs	r3, #17
+	b	.L3051
+.L3003:
+	movs	r2, #5
+	b	.L3052
+.L3000:
+	subs	r3, r3, #36
+	cmp	r3, #1
+	bhi	.L2992
+	ldr	r3, .L3055+156
+	str	r3, [r5]
+	b	.L3053
+.L3056:
+	.align	2
+.L3055:
+	.word	.LANCHOR14
+	.word	.LANCHOR197
+	.word	.LC90
+	.word	.LANCHOR160
+	.word	.LANCHOR16
+	.word	.LANCHOR31
+	.word	.LANCHOR18
+	.word	.LANCHOR42
+	.word	.LANCHOR30
+	.word	.LANCHOR141
+	.word	.LANCHOR198+1
+	.word	.LANCHOR198
+	.word	.LANCHOR199
+	.word	.LANCHOR20
+	.word	.LANCHOR28
+	.word	.LANCHOR27
+	.word	.LANCHOR164
+	.word	.LANCHOR156
+	.word	.LANCHOR163
+	.word	.LANCHOR158
+	.word	.LANCHOR194
+	.word	.LANCHOR200
+	.word	.LANCHOR43
+	.word	.LANCHOR168
+	.word	.LANCHOR39
+	.word	.LANCHOR75
+	.word	.LANCHOR72
+	.word	.LANCHOR1
+	.word	.LANCHOR73
+	.word	.LANCHOR162
+	.word	.LANCHOR0
+	.word	.LANCHOR17
+	.word	.LANCHOR19
+	.word	.LANCHOR23
+	.word	micron_read_retrial
+	.word	.LANCHOR159
+	.word	.LANCHOR21
+	.word	toshiba_read_retrial
+	.word	.LANCHOR26
+	.word	toshiba_3d_read_retrial
+.L3007:
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	subs	r3, r3, #1
+	cmp	r3, #7
+	itt	ls
+	ldrls	r3, .L3057
+	strls	r3, [r5]
+	ldrb	r3, [r8]	@ zero_extendqisi2
+	lsls	r2, r3, #29
+	bpl	.L3011
+	ldr	r3, [r7]
+	ldrb	r3, [r3, #19]	@ zero_extendqisi2
+	cbz	r3, .L3011
+	ldr	r2, .L3057+4
+	movs	r0, #0
+	ldr	r3, .L3057+8
+	ldrh	r1, [r2]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	muls	r1, r3, r1
+	bl	flash_ddr_para_scan
+	ldrb	r3, [fp]	@ zero_extendqisi2
+	cbnz	r3, .L3011
+	ldr	r2, [r7]
+	strb	r3, [r2, #19]
+	bl	flash_info_flush
+.L3011:
+	ldr	r3, [r6]
+	lsls	r3, r3, #19
+	bpl	.L3013
+	ldr	r2, .L3057+12
+	movw	r1, #2671
+	ldr	r0, .L3057+16
+	bl	printf
+.L3013:
+	bl	nand_flash_print_info
+	mov	r10, #0
+	b	.L2973
+.L3058:
+	.align	2
+.L3057:
+	.word	hynix_read_retrial
+	.word	.LANCHOR2
+	.word	.LANCHOR195
+	.word	.LANCHOR197
+	.word	.LC90
+	.size	nand_flash_init, .-nand_flash_init
+	.section	.text.ftl_sysblk_dump,"ax",%progbits
+	.align	1
+	.global	ftl_sysblk_dump
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_sysblk_dump, %function
+ftl_sysblk_dump:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	fp, r0
+	sub	sp, sp, #48
+	movs	r0, #1
+	movs	r6, #0
+	bl	buf_alloc
+	ldr	r3, [r0, #4]
+	mov	r4, r0
+	mov	r5, r6
+	str	r3, [sp, #44]
+.L3060:
+	ldr	r3, .L3069
+	ldrh	r2, [r3]
+	uxth	r3, r6
+	cmp	r2, r3
+	bhi	.L3062
+	ldr	r1, [sp, #44]
+	movs	r3, #32
+	ldr	r0, .L3069+4
+	movs	r2, #4
+	add	r1, r1, #704
+	bl	rknand_print_hex
+	mov	r0, r4
+	bl	buf_free
+	cbz	r5, .L3063
+	movw	r2, #1351
+	ldr	r1, .L3069+8
+	ldr	r0, .L3069+12
+	bl	printf
+.L3063:
+	mov	r0, r5
+	add	sp, sp, #48
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3062:
+	ldr	r3, .L3069+16
+	uxth	r7, r6
+	ldr	r2, [r4, #12]
+	ldr	r1, [r4, #4]
+	ldrh	r8, [r3]
+	ldr	r3, .L3069+20
+	mla	r8, fp, r8, r7
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	mov	r0, r8
+	bl	ftl_read_ppa_page
+	ldr	r2, [r4, #12]
+	mov	r10, r0
+	ldr	r3, [r4, #4]
+	ldr	r1, [r2, #12]
+	str	r1, [sp, #32]
+	ldr	r1, [r2, #8]
+	str	r1, [sp, #28]
+	ldr	r1, [r2, #4]
+	str	r1, [sp, #24]
+	mov	r1, fp
+	ldr	r2, [r2]
+	str	r2, [sp, #20]
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #16]
+	ldr	r2, [r3, #8]
+	str	r2, [sp, #12]
+	ldr	r2, [r3, #4]
+	str	r2, [sp, #8]
+	mov	r2, r7
+	ldr	r3, [r3]
+	str	r0, [sp]
+	ldr	r0, .L3069+24
+	str	r3, [sp, #4]
+	mov	r3, r8
+	bl	printf
+	cmp	r10, #-1
+	beq	.L3064
+	cmp	r10, #512
+	it	eq
+	moveq	r5, #1
+.L3061:
+	adds	r6, r6, #1
+	b	.L3060
+.L3064:
+	movs	r5, #1
+	b	.L3061
+.L3070:
+	.align	2
+.L3069:
+	.word	.LANCHOR85
+	.word	.LC171
+	.word	.LANCHOR201
+	.word	.LC0
+	.word	.LANCHOR103
+	.word	.LANCHOR123
+	.word	.LC162
+	.size	ftl_sysblk_dump, .-ftl_sysblk_dump
+	.section	.text.dump_ftl_info,"ax",%progbits
+	.align	1
+	.global	dump_ftl_info
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	dump_ftl_info, %function
+dump_ftl_info:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L3072
+	push	{r0, r1, r2, r4, r5, r6, r7, lr}
+	ldr	r0, .L3072+4
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	bl	printf
+	ldr	r1, .L3072+8
+	ldr	r5, .L3072+12
+	ldr	r0, .L3072+16
+	ldrh	r3, [r1, #2]
+	ldrb	r2, [r1, #1]	@ zero_extendqisi2
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	bl	printf
+	ldr	r3, [r5]
+	ldr	r4, .L3072+20
+	ldr	r0, .L3072+24
+	ldrh	r2, [r3, #140]
+	ldrh	r1, [r3, #130]
+	bl	printf
+	ldr	r0, [r4]
+	ldr	r7, .L3072+28
+	ldrh	r6, [r0, #26]
+	ldrb	r3, [r0, #21]	@ zero_extendqisi2
+	ldrh	r2, [r0, #18]
+	ldrh	r1, [r0, #16]
+	str	r6, [sp, #4]
+	ldrh	r0, [r0, #22]
+	str	r0, [sp]
+	ldr	r0, .L3072+32
+	bl	printf
+	ldr	r0, [r4]
+	ldrh	r6, [r0, #58]
+	ldrb	r3, [r0, #53]	@ zero_extendqisi2
+	ldrh	r2, [r0, #50]
+	ldrh	r1, [r0, #48]
+	str	r6, [sp, #4]
+	ldrh	r0, [r0, #54]
+	ldr	r6, .L3072+36
+	str	r0, [sp]
+	ldr	r0, .L3072+40
+	bl	printf
+	ldr	r0, [r4]
+	ldrh	r4, [r0, #90]
+	ldrb	r3, [r0, #85]	@ zero_extendqisi2
+	ldrh	r2, [r0, #82]
+	ldrh	r1, [r0, #80]
+	str	r4, [sp, #4]
+	ldrh	r0, [r0, #86]
+	ldr	r4, .L3072+44
+	str	r0, [sp]
+	ldr	r0, .L3072+48
+	bl	printf
+	ldrh	r2, [r6]
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	ldr	r1, .L3072+52
+	ldr	r0, .L3072+56
+	muls	r3, r2, r3
+	ldr	r1, [r1]
+	movs	r2, #4
+	lsls	r3, r3, #1
+	bl	rknand_print_hex
+	ldr	r1, .L3072+60
+	movs	r2, #2
+	ldrh	r3, [r7]
+	ldr	r0, .L3072+64
+	ldr	r1, [r1]
+	bl	rknand_print_hex
+	ldr	r1, [r5]
+	movs	r2, #4
+	ldr	r0, .L3072+68
+	ldrh	r3, [r1, #698]
+	add	r1, r1, #704
+	bl	rknand_print_hex
+	ldr	r1, .L3072+72
+	movs	r2, #4
+	ldrh	r3, [r7]
+	ldr	r0, .L3072+76
+	ldr	r1, [r1]
+	bl	rknand_print_hex
+	mov	r3, #256
+	movs	r2, #2
+	ldr	r1, .L3072+80
+	ldr	r0, .L3072+84
+	bl	rknand_print_hex
+	ldrh	r2, [r6]
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	ldr	r1, .L3072+88
+	ldr	r0, .L3072+92
+	muls	r3, r2, r3
+	ldr	r1, [r1]
+	movs	r2, #2
+	lsls	r3, r3, #1
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, r6, r7, lr}
+	b	rknand_print_hex
+.L3073:
+	.align	2
+.L3072:
+	.word	.LANCHOR52
+	.word	.LC172
+	.word	.LANCHOR179
+	.word	.LANCHOR102
+	.word	.LC173
+	.word	.LANCHOR10
+	.word	.LC174
+	.word	.LANCHOR6
+	.word	.LC175
+	.word	.LANCHOR85
+	.word	.LC176
+	.word	.LANCHOR78
+	.word	.LC177
+	.word	.LANCHOR109
+	.word	.LC178
+	.word	.LANCHOR9
+	.word	.LC179
+	.word	.LC171
+	.word	.LANCHOR7
+	.word	.LC180
+	.word	.LANCHOR108
+	.word	.LC181
+	.word	.LANCHOR110
+	.word	.LC182
+	.size	dump_ftl_info, .-dump_ftl_info
+	.section	.text.pm_ppa_update_check,"ax",%progbits
+	.align	1
+	.global	pm_ppa_update_check
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	pm_ppa_update_check, %function
+pm_ppa_update_check:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r5, r0
+	ldr	r3, .L3081
+	movs	r4, #1
+	mov	r6, r1
+	mov	r7, r2
+	ldrh	r0, [r3]
+	rsb	r3, r0, #21
+	lsls	r4, r4, r3
+	ldr	r3, .L3081+4
+	lsr	r0, r2, r0
+	subs	r4, r4, #1
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	ands	r0, r0, r4
+	bl	__aeabi_uidiv
+	ldr	r3, .L3081+8
+	uxth	r0, r0
+	ldr	r3, [r3]
+	add	r0, r3, r0, lsl #2
+	ldrb	r1, [r0, #2]	@ zero_extendqisi2
+	lsrs	r1, r1, #5
+	cmp	r1, #1
+	beq	.L3075
+	cmp	r1, #7
+	bne	.L3077
+.L3075:
+	mov	r3, r7
+	mov	r2, r6
+	mov	r1, r5
+	ldr	r0, .L3081+12
+	bl	printf
+	bl	dump_ftl_info
+	mov	r0, #-1
+	pop	{r3, r4, r5, r6, r7, pc}
+.L3077:
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, pc}
+.L3082:
+	.align	2
+.L3081:
+	.word	.LANCHOR66
+	.word	.LANCHOR67
+	.word	.LANCHOR7
+	.word	.LC183
+	.size	pm_ppa_update_check, .-pm_ppa_update_check
+	.section	.text.load_l2p_region,"ax",%progbits
+	.align	1
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	load_l2p_region, %function
+load_l2p_region:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	cmp	r1, #31
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
+	mov	r4, r0
+	mov	r5, r1
+	bls	.L3084
+	movs	r2, #31
+	ldr	r1, .L3092
+	ldr	r0, .L3092+4
+	bl	printf
+.L3084:
+	ldr	r8, .L3092+44
+	ldr	r3, [r8]
+	ldrh	r2, [r3, #698]
+	cmp	r2, r4
+	bcs	.L3085
+	mov	r1, r4
+	ldr	r0, .L3092+8
+	bl	printf
+	ldr	r3, .L3092+12
+	movs	r1, #255
+	ldrh	r2, [r3]
+	movs	r3, #0
+	ldr	r0, [r3, #4]
+	bl	ftl_memset
+	ldr	r3, [r8]
+	ldrh	r3, [r3, #698]
+	cmp	r3, r4
+	bcs	.L3087
+	movs	r2, #35
+.L3091:
+	ldr	r1, .L3092
+	ldr	r0, .L3092+4
+	bl	printf
+	b	.L3087
+.L3085:
+	add	r2, r4, #176
+	ldr	r7, [r3, r2, lsl #2]
+	ldr	r3, .L3092+16
+	strh	r4, [r3, r5, lsl #3]	@ movhi
+	add	r5, r3, r5, lsl #3
+	movs	r3, #0
+	strh	r3, [r5, #2]	@ movhi
+	cbnz	r7, .L3088
+	mov	r2, r7
+	mov	r1, r4
+	ldr	r0, .L3092+20
+	bl	printf
+	ldr	r3, .L3092+12
+	movs	r1, #255
+	ldr	r0, [r5, #4]
+	ldrh	r2, [r3]
+	bl	ftl_memset
+.L3087:
+	movs	r0, #0
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.L3088:
+	ldr	r6, .L3092+24
+	mov	r0, r7
+	ldr	r10, .L3092+48
+	ldr	r1, [r5, #4]
+	ldr	r2, [r6]
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	bl	ftl_read_ppa_page
+	ldr	r2, [r6]
+	mov	r3, r0
+	ldr	r2, [r2]
+	cmp	r2, r4
+	beq	.L3089
+	mov	r1, r4
+	str	r7, [sp]
+	ldr	r0, .L3092+28
+	bl	printf
+	ldr	r1, [r8]
+	movs	r2, #4
+	ldr	r0, .L3092+32
+	ldrh	r3, [r1, #698]
+	add	r1, r1, #704
+	bl	rknand_print_hex
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	movs	r2, #4
+	ldr	r1, [r5, #4]
+	ldr	r0, .L3092+36
+	lsls	r3, r3, #7
+	bl	rknand_print_hex
+	movs	r3, #16
+	movs	r2, #4
+	ldr	r1, [r6]
+	ldr	r0, .L3092+40
+	bl	rknand_print_hex
+.L3089:
+	ldr	r3, [r6]
+	ldr	r3, [r3]
+	cmp	r4, r3
+	beq	.L3087
+	movs	r2, #59
+	b	.L3091
+.L3093:
+	.align	2
+.L3092:
+	.word	.LANCHOR202
+	.word	.LC0
+	.word	.LC184
+	.word	.LANCHOR203
+	.word	.LANCHOR132
+	.word	.LC185
+	.word	.LANCHOR191
+	.word	.LC186
+	.word	.LC187
+	.word	.LC188
+	.word	.LC189
+	.word	.LANCHOR102
+	.word	.LANCHOR123
+	.size	load_l2p_region, .-load_l2p_region
+	.section	.text.pm_gc,"ax",%progbits
+	.align	1
+	.global	pm_gc
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	pm_gc, %function
+pm_gc:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r4, .L3106
+	ldr	r5, .L3106+4
+	ldr	r3, [r4]
+	ldrh	r2, [r3, #688]
+	ldrh	r3, [r5]
+	subs	r3, r3, #1
+	cmp	r2, r3
+	blt	.L3096
+	bl	pm_free_sblk
+	ldr	r2, [r4]
+	ldrh	r3, [r5]
+	ldrh	r1, [r2, #688]
+	subs	r3, r3, #1
+	cmp	r1, r3
+	blt	.L3096
+	uxth	r0, r0
+	movw	r3, #65535
+	adds	r0, r0, #208
+	ldrh	r7, [r2, r0, lsl #1]
+	cmp	r7, r3
+	bne	.L3098
+	movs	r2, #131
+	ldr	r1, .L3106+8
+	ldr	r0, .L3106+12
+	bl	printf
+	bl	pm_free_sblk
+	ldr	r3, [r4]
+	uxth	r0, r0
+	adds	r0, r0, #208
+	ldrh	r7, [r3, r0, lsl #1]
+.L3098:
+	ldr	r5, .L3106+16
+	bl	pm_select_ram_region
+	mov	r6, r0
+	movw	r3, #65535
+	ldrh	r0, [r5, r0, lsl #3]
+	cmp	r0, r3
+	beq	.L3099
+	add	r8, r5, r6, lsl #3
+	ldr	r1, [r8, #4]
+	cbz	r1, .L3099
+	ldrsh	r3, [r8, #2]
+	cmp	r3, #0
+	bge	.L3099
+	bl	pm_write_page
+	ldrh	r3, [r8, #2]
+	ubfx	r3, r3, #0, #15
+	strh	r3, [r8, #2]	@ movhi
+.L3099:
+	mov	fp, #0
+.L3100:
+	ldr	r1, [r4]
+	uxth	r10, fp
+	ldrh	r0, [r1, #698]
+	cmp	r0, r10
+	bhi	.L3102
+	bl	pm_free_sblk
+.L3096:
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3102:
+	ldr	r3, .L3106+20
+	uxth	r8, fp
+	add	ip, r8, #176
+	ldrh	r0, [r3]
+	ldr	r1, [r1, ip, lsl #2]
+	ldr	r3, .L3106+24
+	lsr	ip, r1, r0
+	rsb	r1, r0, #21
+	movs	r0, #1
+	lsls	r0, r0, r1
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	subs	r0, r0, #1
+	and	r0, ip, r0
+	bl	__aeabi_uidiv
+	uxth	r0, r0
+	cmp	r0, r7
+	bne	.L3101
+	mov	r1, r6
+	mov	r0, r10
+	bl	load_l2p_region
+	add	r2, r5, r6, lsl #3
+	mov	r0, r8
+	ldr	r1, [r2, #4]
+	bl	pm_write_page
+	movw	r2, #65535
+	strh	r2, [r5, r6, lsl #3]	@ movhi
+.L3101:
+	add	fp, fp, #1
+	b	.L3100
+.L3107:
+	.align	2
+.L3106:
+	.word	.LANCHOR102
+	.word	.LANCHOR146
+	.word	.LANCHOR204
+	.word	.LC0
+	.word	.LANCHOR132
+	.word	.LANCHOR66
+	.word	.LANCHOR67
+	.size	pm_gc, .-pm_gc
+	.section	.text.pm_flush_id,"ax",%progbits
+	.align	1
+	.global	pm_flush_id
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	pm_flush_id, %function
+pm_flush_id:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L3113
+	push	{r4, lr}
+	add	r4, r3, r0, lsl #3
+	ldrh	r0, [r3, r0, lsl #3]
+	ldr	r1, [r4, #4]
+	bl	pm_write_page
+	ldrh	r3, [r4, #2]
+	ubfx	r3, r3, #0, #15
+	strh	r3, [r4, #2]	@ movhi
+	ldr	r4, .L3113+4
+	ldr	r3, [r4]
+	cbz	r3, .L3109
+	bl	pm_gc
+	movs	r3, #0
+	str	r3, [r4]
+.L3109:
+	movs	r0, #0
+	pop	{r4, pc}
+.L3114:
+	.align	2
+.L3113:
+	.word	.LANCHOR132
+	.word	.LANCHOR130
+	.size	pm_flush_id, .-pm_flush_id
+	.section	.text.pm_flush,"ax",%progbits
+	.align	1
+	.global	pm_flush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	pm_flush, %function
+pm_flush:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	movs	r4, #0
+	ldr	r5, .L3119
+.L3117:
+	add	r3, r5, r4, lsl #3
+	uxth	r0, r4
+	ldrsh	r3, [r3, #2]
+	cmp	r3, #0
+	bge	.L3116
+	bl	pm_flush_id
+.L3116:
+	adds	r4, r4, #1
+	cmp	r4, #32
+	bne	.L3117
+	movs	r0, #0
+	pop	{r3, r4, r5, pc}
+.L3120:
+	.align	2
+.L3119:
+	.word	.LANCHOR132
+	.size	pm_flush, .-pm_flush
+	.section	.text.flt_sys_flush,"ax",%progbits
+	.align	1
+	.global	flt_sys_flush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flt_sys_flush, %function
+flt_sys_flush:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	bl	ftl_flush
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	movs	r0, #0
+	pop	{r3, lr}
+	b	ftl_info_flush
+	.size	flt_sys_flush, .-flt_sys_flush
+	.section	.text.rk_ftl_de_init,"ax",%progbits
+	.align	1
+	.global	rk_ftl_de_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_ftl_de_init, %function
+rk_ftl_de_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	bl	zftl_flash_de_init
+	bl	flt_sys_flush
+	pop	{r3, lr}
+	b	zftl_flash_de_init
+	.size	rk_ftl_de_init, .-rk_ftl_de_init
+	.section	.text.zftl_deinit,"ax",%progbits
+	.align	1
+	.global	zftl_deinit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	zftl_deinit, %function
+zftl_deinit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	rk_ftl_de_init
+	.size	zftl_deinit, .-zftl_deinit
+	.section	.text.pm_init,"ax",%progbits
+	.align	1
+	.global	pm_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	pm_init, %function
+pm_init:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #0
+	ldr	r3, .L3141
+	movs	r2, #1
+	mov	r10, r0
+	movs	r0, #64
+	ldr	r5, .L3141+4
+	str	r4, [r3]
+	ldr	r3, .L3141+8
+	mov	r7, r5
+	strb	r2, [r3]
+	bl	ftl_malloc
+	ldr	r3, .L3141+12
+	mov	r8, r3
+	str	r0, [r3]
+.L3126:
+	movw	r3, #65535
+	adds	r6, r5, r4
+	strh	r3, [r4, r5]	@ movhi
+	movs	r3, #0
+	strh	r3, [r6, #2]	@ movhi
+	cmp	r10, #0
+	beq	.L3125
+	ldr	r3, .L3141+16
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	lsls	r0, r0, #9
+	bl	ftl_malloc
+	str	r0, [r6, #4]
+.L3125:
+	adds	r4, r4, #8
+	cmp	r4, #256
+	bne	.L3126
+	ldr	r3, [r7, #4]
+	ldr	r4, .L3141+20
+	ldr	r10, [r8]
+	str	r3, [sp, #12]
+	ldr	r3, [r4]
+	ldr	r2, [sp, #12]
+	ldrh	r1, [r3, #692]
+	ldrb	r0, [r3, #694]	@ zero_extendqisi2
+	movs	r3, #4
+	str	r3, [sp]
+	mov	r3, r10
+	bl	flash_get_last_written_page
+	ldr	r1, [r4]
+	mov	r5, r0
+	ldrh	r2, [r1, #696]
+	cmp	r2, r0
+	bgt	.L3127
+	mov	r3, r0
+	ldrh	r1, [r1, #692]
+	ldr	r0, .L3141+24
+	bl	printf
+	ldr	r3, [r4]
+	ldrsh	r6, [r3, #696]
+.L3128:
+	cmp	r6, r5
+	ble	.L3130
+	ldr	r3, .L3141+28
+	movs	r2, #1
+	add	r5, r5, r2
+	strb	r2, [r3]
+	ldr	r3, [r4]
+	strh	r5, [r3, #696]	@ movhi
+	bl	pm_free_sblk
+.L3127:
+	ldr	r1, [r7, #4]
+	mov	r0, #-1
+	bl	pm_write_page
+	ldr	r1, [r7, #4]
+	mov	r0, #-1
+	bl	pm_write_page
+	ldr	r1, [r7, #4]
+	mov	r0, #-1
+	bl	pm_write_page
+	ldr	r1, [r7, #4]
+	mov	r0, #-1
+	bl	pm_write_page
+	bl	pm_free_sblk
+	bl	pm_gc
+	movs	r0, #0
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3130:
+	ldr	r3, [r4]
+	ldr	r2, .L3141+32
+	ldrh	r8, [r3, #692]
+	ldrh	r2, [r2]
+	ldrb	r0, [r3, #694]	@ zero_extendqisi2
+	ldr	r3, .L3141+16
+	mla	r8, r2, r8, r6
+	ldr	r2, [sp, #12]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	mov	r1, r8
+	str	r3, [sp]
+	mov	r3, r10
+	bl	flash_read_page_en
+	ldr	r3, [r4]
+	mov	fp, r0
+	ldr	r0, .L3141+36
+	ldr	r2, [r3, #48]
+	adds	r2, r2, #1
+	str	r2, [r3, #48]
+	mov	r2, r8
+	ldrh	r3, [r3, #694]
+	ldr	r1, [r10]
+	bl	printf
+	cmp	fp, #-1
+	beq	.L3129
+	cmp	fp, #512
+	beq	.L3129
+	ldr	r2, [r4]
+	ldr	r3, [r10]
+	ldrh	r1, [r2, #698]
+	cmp	r3, r1
+	itt	cc
+	addcc	r3, r3, #176
+	strcc	r8, [r2, r3, lsl #2]
+.L3129:
+	adds	r6, r6, #1
+	sxth	r6, r6
+	b	.L3128
+.L3142:
+	.align	2
+.L3141:
+	.word	.LANCHOR130
+	.word	.LANCHOR132
+	.word	.LANCHOR192
+	.word	.LANCHOR191
+	.word	.LANCHOR123
+	.word	.LANCHOR102
+	.word	.LC190
+	.word	.LANCHOR182
+	.word	.LANCHOR103
+	.word	.LC191
+	.size	pm_init, .-pm_init
+	.section	.text.pm_log2phys,"ax",%progbits
+	.align	1
+	.global	pm_log2phys
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	pm_log2phys, %function
+pm_log2phys:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L3158
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	fp, r0
+	str	r2, [sp, #4]
+	mov	r7, r1
+	ldr	r2, [r3]
+	cmp	r0, r2
+	bcc	.L3144
+	mov	r1, r0
+	ldr	r0, .L3158+4
+	bl	printf
+	ldr	r3, [sp, #4]
+	mov	r0, #-1
+	cbnz	r3, .L3143
+	str	r0, [r7]
+.L3143:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3144:
+	ldr	r3, .L3158+8
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	lsls	r1, r5, #7
+	bl	__aeabi_uidiv
+	ldr	r1, .L3158+12
+	uxth	r6, r0
+	mov	r10, r0
+	movs	r2, #0
+	mov	r8, r1
+.L3150:
+	add	r0, r1, r2, lsl #3
+	uxth	r4, r2
+	ldr	r0, [r0, #4]
+	cbz	r0, .L3146
+	ldrh	r0, [r1, r2, lsl #3]
+	cmp	r0, r6
+	bne	.L3146
+.L3147:
+	lsls	r5, r5, #7
+	ldr	r3, [sp, #4]
+	lsls	r4, r4, #3
+	smulbb	r5, r5, r6
+	sub	r5, fp, r5
+	uxth	r5, r5
+	cbnz	r3, .L3148
+	add	r2, r8, r4
+	ldr	r2, [r2, #4]
+	ldr	r2, [r2, r5, lsl #2]
+	str	r2, [r7]
+.L3149:
+	add	r4, r4, r8
+	movw	r2, #32767
+	ldrh	r3, [r4, #2]
+	ubfx	r1, r3, #0, #15
+	cmp	r1, r2
+	beq	.L3153
+	adds	r3, r3, #1
+	strh	r3, [r4, #2]	@ movhi
+.L3153:
+	movs	r0, #0
+	b	.L3143
+.L3148:
+	add	r1, r8, r4
+	ldr	r0, [r7]
+	ldr	r2, [r1, #4]
+	str	r0, [r2, r5, lsl #2]
+	ldrh	r2, [r1, #2]
+	mvn	r2, r2, lsl #17
+	mvn	r2, r2, lsr #17
+	strh	r2, [r1, #2]	@ movhi
+	ldr	r2, .L3158+16
+	strb	r10, [r2]
+	b	.L3149
+.L3146:
+	adds	r2, r2, #1
+	cmp	r2, #32
+	bne	.L3150
+	bl	pm_select_ram_region
+	ldrh	r1, [r8, r0, lsl #3]
+	movw	r2, #65535
+	mov	r4, r0
+	cmp	r1, r2
+	beq	.L3151
+	add	r2, r8, r0, lsl #3
+	ldrsh	r2, [r2, #2]
+	cmp	r2, #0
+	bge	.L3151
+	bl	pm_flush_id
+.L3151:
+	ldr	r2, .L3158+20
+	mov	r1, r4
+	mov	r0, r6
+	strb	r4, [r2]
+	bl	load_l2p_region
+	b	.L3147
+.L3159:
+	.align	2
+.L3158:
+	.word	.LANCHOR120
+	.word	.LC192
+	.word	.LANCHOR123
+	.word	.LANCHOR132
+	.word	.LANCHOR133
+	.word	.LANCHOR205
+	.size	pm_log2phys, .-pm_log2phys
+	.section	.text.gc_recovery,"ax",%progbits
+	.align	1
+	.global	gc_recovery
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_recovery, %function
+gc_recovery:
+	@ args = 0, pretend = 0, frame = 32
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #0
+	ldr	r3, .L3216
+	sub	sp, sp, #64
+	ldr	r7, .L3216+4
+	strb	r4, [r3]
+	ldr	r3, .L3216+8
+	ldr	r5, [r7]
+	strb	r4, [r3]
+	bl	gc_init
+	ldrh	r6, [r5, #80]
+	movw	r3, #65535
+	cmp	r6, r3
+	beq	.L3161
+	ldr	r2, [r7]
+	movs	r0, #1
+	ldr	r6, .L3216+12
+	strh	r3, [r2, #130]	@ movhi
+	bl	buf_alloc
+	ldrb	r3, [r5, #89]	@ zero_extendqisi2
+	mov	r4, r0
+	add	r3, r5, r3, lsl #1
+	ldrh	r2, [r3, #94]
+	ldr	r3, .L3216+16
+	ldrh	r3, [r3]
+	muls	r3, r2, r3
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	cmp	r2, #3
+	str	r3, [sp, #56]
+	bne	.L3162
+	ldr	r2, .L3216+20
+	ldrh	r2, [r2]
+	subs	r2, r2, #1
+	add	r3, r3, r2
+	orr	r3, r3, #50331648
+.L3211:
+	str	r3, [r4, #24]
+.L3163:
+	movs	r1, #1
+	mov	r0, r4
+	bl	sblk_read_page
+	ldr	r3, [r4, #36]
+	adds	r2, r3, #1
+	beq	.L3164
+	cmp	r3, #512
+	beq	.L3164
+	ldr	r3, [r4, #12]
+	ldr	r2, [r3]
+	ldr	r3, .L3216+24
+	cmp	r2, r3
+	beq	.L3165
+.L3164:
+	mov	r0, r4
+	bl	buf_free
+	ldr	r2, [r4, #12]
+	ldr	r3, [r4, #4]
+	ldr	r0, .L3216+28
+	ldr	r1, [r2, #12]
+	str	r1, [sp, #24]
+	ldr	r1, [r2, #8]
+	str	r1, [sp, #20]
+	ldr	r1, [r2, #4]
+	str	r1, [sp, #16]
+	ldr	r2, [r2]
+	str	r2, [sp, #12]
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	ldr	r2, [r3, #8]
+	str	r2, [sp, #4]
+	ldr	r2, [r3, #4]
+	str	r2, [sp]
+	ldr	r2, [r4, #36]
+	ldr	r3, [r3]
+	ldr	r1, [r4, #24]
+	movs	r4, #0
+	bl	printf
+	ldr	r3, .L3216+32
+	ldrh	r2, [r5, #80]
+	ldr	r3, [r3]
+	strh	r4, [r3, r2, lsl #1]	@ movhi
+	ldr	r3, [r7]
+.L3215:
+	ldrh	r2, [r5, #80]
+	strh	r2, [r3, #130]	@ movhi
+.L3166:
+	ldrh	r0, [r5, #80]
+	bl	ftl_dump_write_open_sblk
+	mov	r2, r4
+	ldrh	r1, [r5, #80]
+	movw	r4, #65535
+	ldr	r0, .L3216+36
+	bl	printf
+	strh	r4, [r5, #80]	@ movhi
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	ldr	r3, .L3216+4
+	ldr	r2, [r3]
+	ldrh	r0, [r2, #130]
+	cmp	r0, r4
+	mov	r4, r3
+	beq	.L3193
+	bl	ftl_free_sblk
+.L3193:
+	ldr	r3, .L3216+40
+	movs	r0, #0
+	ldr	r2, [r3]
+	movw	r3, #65535
+	strh	r3, [r2, #126]	@ movhi
+	ldr	r2, [r4]
+	strh	r3, [r2, #130]	@ movhi
+	bl	ftl_info_flush
+.L3160:
+	add	sp, sp, #64
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3162:
+	cmp	r2, #2
+	bne	.L3163
+	ldr	r2, .L3216+20
+	ldrh	r2, [r2]
+	add	r3, r3, r2, lsl #1
+	subs	r3, r3, #1
+	orr	r3, r3, #33554432
+	b	.L3211
+.L3165:
+	ldr	r8, .L3216+60
+	ldr	r7, .L3216+44
+	ldr	r1, [r4, #4]
+	ldrh	r3, [r8]
+	ldrb	r2, [r7]	@ zero_extendqisi2
+	muls	r2, r3, r2
+	ldr	r3, .L3216+48
+	ldr	r0, [r3]
+	lsls	r2, r2, #2
+	bl	ftl_memcpy
+	ldrh	r3, [r8]
+	ldrb	r2, [r7]	@ zero_extendqisi2
+	ldr	r1, [r4, #4]
+	muls	r2, r3, r2
+	ldr	r3, .L3216+52
+	ldr	r0, [r3]
+	lsls	r2, r2, #2
+	add	r1, r1, r2
+	bl	ftl_memcpy
+	ldr	r3, .L3216+20
+	ldrh	fp, [r3]
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	cmp	r3, #2
+	itt	eq
+	moveq	r3, #1
+	lsleq	fp, fp, #1
+	str	r3, [sp, #36]
+	movs	r3, #0
+	mov	r10, r3
+	str	r3, [sp, #32]
+.L3169:
+	ldr	r3, [sp, #32]
+	cmp	r3, fp
+	beq	.L3178
+	mov	r8, #0
+	b	.L3179
+.L3175:
+	ldr	r3, [sp, #40]
+	ldrh	r2, [r3, #96]
+	ldr	r3, .L3216+16
+	ldrh	r3, [r3]
+	muls	r3, r2, r3
+	ldr	r2, .L3216+12
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	str	r3, [sp, #56]
+	cmp	r2, #3
+	bne	.L3170
+	ldr	r2, [sp, #32]
+	add	r3, r3, r2
+	orr	r3, r3, r7, lsl #24
+.L3213:
+	str	r3, [r4, #24]
+	movs	r1, #1
+	mov	r0, r4
+	bl	sblk_read_page
+	ldr	r3, .L3216+48
+	ldr	r2, [r4, #12]
+	ldr	r3, [r3]
+	ldr	r1, [r2, #4]
+	ldr	r3, [r3, r6]
+	cmp	r3, r1
+	bne	.L3173
+	ldr	r0, .L3216+52
+	ldr	r0, [r0]
+	ldr	ip, [r0, r6]
+	ldr	r0, [r2, #8]
+	cmp	ip, r0
+	beq	.L3174
+.L3173:
+	ldr	r0, [r2, #12]
+	str	r0, [sp, #16]
+	ldr	r0, [r2, #8]
+	str	r1, [sp, #8]
+	str	r0, [sp, #12]
+	ldr	r2, [r2]
+	ldr	r0, .L3216+56
+	str	r2, [sp, #4]
+	ldr	r2, .L3216+52
+	ldr	r2, [r2]
+	ldr	r2, [r2, r6]
+	str	r2, [sp]
+	ldr	r2, [r4, #36]
+	ldr	r1, [r4, #24]
+	bl	printf
+	ldr	r3, .L3216+48
+	ldr	r3, [r3]
+	ldr	r3, [r3, r6]
+	adds	r3, r3, #1
+	beq	.L3174
+	mov	r0, r4
+	movs	r4, #0
+	bl	buf_free
+	ldr	r3, .L3216+32
+	ldrh	r2, [r5, #80]
+	ldr	r3, [r3]
+	strh	r4, [r3, r2, lsl #1]	@ movhi
+	ldr	r3, .L3216+4
+	ldr	r3, [r3]
+	b	.L3215
+.L3170:
+	cmp	r2, #2
+	ldr	r2, [sp, #32]
+	itett	eq
+	addeq	r2, r2, #-1
+	addne	r3, r3, r2
+	addeq	r3, r3, r2
+	addeq	r3, r3, r7
+	it	eq
+	orreq	r3, r3, #33554432
+	b	.L3213
+.L3174:
+	add	r10, r10, #1
+	adds	r7, r7, #1
+	adds	r6, r6, #4
+.L3177:
+	ldr	r3, [sp, #36]
+	cmp	r3, r7
+	bcs	.L3175
+	add	r8, r8, #1
+.L3179:
+	ldrb	r3, [r5, #89]	@ zero_extendqisi2
+	cmp	r8, r3
+	bge	.L3176
+	add	r3, r5, r8, lsl #1
+	lsl	r6, r10, #2
+	str	r3, [sp, #40]
+	movs	r7, #1
+	b	.L3177
+.L3176:
+	ldr	r3, [sp, #32]
+	adds	r3, r3, #1
+	str	r3, [sp, #32]
+	b	.L3169
+.L3178:
+	mov	r0, r4
+	movs	r4, #0
+	bl	buf_free
+	ldr	r3, .L3216+32
+	mov	r6, r4
+	ldr	r0, .L3216+60
+	mov	fp, r4
+	ldrh	r1, [r5, #80]
+	ldr	r2, [r3]
+	ldrh	r0, [r0]
+	ldrb	r3, [r5, #89]	@ zero_extendqisi2
+	smulbb	r3, r3, r0
+	strh	r3, [r2, r1, lsl #1]	@ movhi
+.L3180:
+	ldr	r3, [sp, #32]
+	cmp	r3, r6
+	beq	.L3191
+	mov	r10, #0
+	b	.L3192
+.L3217:
+	.align	2
+.L3216:
+	.word	.LANCHOR76
+	.word	.LANCHOR10
+	.word	.LANCHOR150
+	.word	.LANCHOR71
+	.word	.LANCHOR103
+	.word	.LANCHOR85
+	.word	-178307901
+	.word	.LC193
+	.word	.LANCHOR9
+	.word	.LC195
+	.word	.LANCHOR102
+	.word	.LANCHOR78
+	.word	.LANCHOR152
+	.word	.LANCHOR153
+	.word	.LC194
+	.word	.LANCHOR77
+.L3188:
+	ldr	r3, .L3218
+	ldr	r3, [r3]
+	ldr	r7, [r3, fp, lsl #2]
+	adds	r3, r7, #1
+	beq	.L3181
+	ldr	r3, .L3218+4
+	mov	r0, r7
+	ldr	r3, [r3]
+	ldr	r3, [r3, fp, lsl #2]
+	str	r3, [sp, #40]
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #60]
+	adds	r0, r0, #1
+	bne	.L3182
+	movs	r2, #0
+	add	r1, sp, #60
+	mov	r0, r7
+	bl	pm_log2phys
+.L3182:
+	ldr	r3, [sp, #48]
+	ldrh	r2, [r3, #96]
+	ldr	r3, .L3218+8
+	ldrh	r3, [r3]
+	muls	r3, r2, r3
+	ldr	r2, .L3218+12
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r2, #3
+	bne	.L3183
+	add	r3, r3, r6
+	orr	r3, r3, r8, lsl #24
+.L3214:
+	str	r3, [sp, #56]
+	movs	r2, #1
+	ldr	r3, .L3218+16
+	str	r2, [sp, #52]
+	ldr	r1, .L3218+20
+	ldrh	r0, [r3]
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	rsb	r3, r0, #21
+	lsl	r3, r2, r3
+	ldr	r2, [sp, #40]
+	subs	r3, r3, #1
+	lsr	r0, r2, r0
+	ands	r0, r0, r3
+	bl	__aeabi_uidiv
+	ldr	r2, [sp, #40]
+	ldr	r3, [sp, #60]
+	str	r0, [sp, #44]
+	cmp	r2, r3
+	ldr	r2, [sp, #52]
+	bne	.L3186
+	add	r1, sp, #56
+	mov	r0, r7
+	bl	pm_log2phys
+	ldrh	r0, [sp, #44]
+	adds	r4, r4, #1
+	bl	ftl_vpn_decrement
+.L3187:
+	ldr	r3, .L3218+24
+	add	fp, fp, #1
+	ldrh	r7, [sp, #44]
+	ldr	r3, [r3]
+	add	r3, r3, r7, lsl #2
+	ldrb	r3, [r3, #2]	@ zero_extendqisi2
+	ands	r3, r3, #224
+	bne	.L3181
+	ldr	r2, .L3218+28
+	ldr	r2, [r2]
+	ldrh	r1, [r2, r7, lsl #1]
+	cbz	r1, .L3181
+	strh	r3, [r2, r7, lsl #1]	@ movhi
+.L3181:
+	add	r8, r8, #1
+.L3190:
+	ldr	r3, [sp, #36]
+	cmp	r3, r8
+	bcs	.L3188
+	add	r10, r10, #1
+.L3192:
+	ldrb	r3, [r5, #89]	@ zero_extendqisi2
+	cmp	r10, r3
+	bge	.L3189
+	add	r3, r5, r10, lsl #1
+	mov	r8, #1
+	str	r3, [sp, #48]
+	b	.L3190
+.L3183:
+	cmp	r2, #2
+	itett	eq
+	addeq	r2, r6, #-1
+	addne	r3, r3, r6
+	addeq	r3, r3, r2
+	addeq	r3, r3, r8
+	it	eq
+	orreq	r3, r3, #33554432
+	b	.L3214
+.L3186:
+	ldr	r2, [sp, #56]
+	cmp	r3, r2
+	it	eq
+	addeq	r4, r4, #1
+	b	.L3187
+.L3189:
+	adds	r6, r6, #1
+	b	.L3180
+.L3191:
+	ldr	r3, .L3218+28
+	ldrh	r2, [r5, #80]
+	ldr	r3, [r3]
+	strh	r4, [r3, r2, lsl #1]	@ movhi
+	ldrh	r0, [r5, #80]
+	bl	zftl_insert_data_list
+	b	.L3166
+.L3161:
+	ldr	r3, [r7]
+	ldrh	r3, [r3, #130]
+	cmp	r3, r6
+	beq	.L3160
+	ldr	r5, .L3218+32
+	ldr	r2, [r5]
+	ldrh	r2, [r2, #126]
+	cmp	r2, r3
+	bne	.L3195
+	bl	pm_flush
+	ldr	r3, [r7]
+	ldrh	r0, [r3, #130]
+	bl	ftl_free_sblk
+	ldr	r3, [r5]
+	mov	r0, r4
+	strh	r6, [r3, #126]	@ movhi
+	bl	ftl_info_flush
+.L3195:
+	ldr	r3, [r7]
+	movw	r2, #65535
+	strh	r2, [r3, #130]	@ movhi
+	b	.L3160
+.L3219:
+	.align	2
+.L3218:
+	.word	.LANCHOR152
+	.word	.LANCHOR153
+	.word	.LANCHOR103
+	.word	.LANCHOR71
+	.word	.LANCHOR66
+	.word	.LANCHOR67
+	.word	.LANCHOR7
+	.word	.LANCHOR9
+	.word	.LANCHOR102
+	.size	gc_recovery, .-gc_recovery
+	.section	.text.zftl_init,"ax",%progbits
+	.align	1
+	.global	zftl_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	zftl_init, %function
+zftl_init:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r2, .L3285
+	movs	r3, #255
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r5, #0
+	ldr	r6, .L3285+4
+	sub	sp, sp, #24
+	strb	r3, [r2]
+	ldr	r2, .L3285+8
+	ldr	r1, .L3285+12
+	ldr	r0, .L3285+16
+	strb	r5, [r2]
+	ldr	r2, .L3285+20
+	strb	r3, [r2]
+	ldr	r2, .L3285+24
+	strb	r5, [r2]
+	ldr	r2, .L3285+28
+	strb	r3, [r2]
+	mov	r2, #-1
+	ldr	r3, .L3285+32
+	strb	r5, [r3]
+	ldr	r3, .L3285+36
+	str	r2, [r3]
+	bl	printf
+	ldrb	r3, [r6, #12]	@ zero_extendqisi2
+	ldrb	r8, [r6, #9]	@ zero_extendqisi2
+	ldrh	r10, [r6, #10]
+	str	r3, [sp]
+	ldr	r3, .L3285+40
+	ldrb	r2, [sp]	@ zero_extendqisi2
+	mov	r0, r10
+	ldr	r1, [sp]
+	strb	r2, [r3]
+	ldr	r3, .L3285+44
+	strb	r8, [r3]
+	ldr	r3, .L3285+48
+	strh	r10, [r3]	@ movhi
+	bl	__aeabi_idiv
+	ldr	r3, .L3285+52
+	mov	r7, r0
+	ldrb	r1, [r6, #13]	@ zero_extendqisi2
+	ldrh	fp, [r6, #14]
+	lsl	r6, r8, #9
+	ldrb	r4, [r3]	@ zero_extendqisi2
+	ldr	r3, .L3285+56
+	uxth	r6, r6
+	ldr	ip, .L3285+216
+	ldr	r0, .L3285+60
+	strb	r4, [r3]
+	smulbb	r4, r4, r1
+	ldr	r3, .L3285+64
+	ldr	r2, .L3285+68
+	uxtb	r4, r4
+	strh	r7, [r0]	@ movhi
+	strb	r1, [r3]
+	ldr	r3, .L3285+72
+	ldr	r1, .L3285+76
+	strh	fp, [r2]	@ movhi
+	strh	r6, [r3]	@ movhi
+	ldr	r3, .L3285+80
+	strb	r4, [r1]
+	str	r0, [sp, #4]
+	ldrh	r3, [r3]
+	str	r1, [sp, #8]
+	str	r2, [sp, #12]
+	strh	r3, [ip]	@ movhi
+	mov	ip, #1
+.L3221:
+	cmp	r3, ip
+	uxth	r2, r5
+	add	r5, r5, #1
+	bcs	.L3222
+	mul	r10, r10, r8
+	subs	r3, r2, #1
+	ldr	r2, .L3285+84
+	movs	r0, #0
+	movs	r1, #1
+	strh	r3, [r2]	@ movhi
+	mul	r2, fp, r10
+	lsrs	r5, r2, #21
+.L3223:
+	cmp	r5, r1
+	uxth	r3, r0
+	add	r0, r0, #1
+	bcs	.L3224
+	mov	r5, #1892352
+	subs	r3, r3, #1
+	mul	r1, r5, r4
+	uxth	r3, r3
+	muls	r2, r4, r2
+	lsl	r5, r1, r3
+	ldr	r3, .L3285+88
+	mov	r1, r8
+	ldr	r8, .L3285+220
+	str	r5, [r3]
+	ldr	r3, .L3285+92
+	str	r2, [r3]
+	add	r2, r5, #24576
+	str	r3, [sp, #20]
+	mov	r0, r2
+	ldr	r3, .L3285+96
+	str	r2, [sp, #16]
+	str	r2, [r3]
+	bl	__aeabi_uidiv
+	ldr	r3, .L3285+100
+	add	ip, r6, #-1
+	mov	r1, r6
+	ldr	r6, .L3285+104
+	str	r0, [r3]
+	add	r0, ip, r0, lsl #2
+	bl	__aeabi_uidiv
+	strh	r0, [r6]	@ movhi
+	uxth	r0, r0
+	mul	r1, r4, r7
+	ldr	r7, .L3285+108
+	lsls	r0, r0, #4
+	bl	__aeabi_idiv
+	mul	r1, r4, r10
+	ldr	r2, [sp, #16]
+	strh	r0, [r8]	@ movhi
+	mov	r4, #256
+	ldr	r10, .L3285+100
+	mov	r0, r2
+	subs	r1, r1, #1
+	bl	__aeabi_uidiv
+	add	r2, fp, fp, lsl #1
+	ldr	r1, .L3285+112
+	lsr	fp, fp, #4
+	adds	r0, r0, #8
+	asrs	r2, r2, #2
+	strh	r0, [r7]	@ movhi
+	cmp	fp, #79
+	ldr	r0, .L3285+116
+	strh	r2, [r1]	@ movhi
+	it	ls
+	movls	r1, #80
+	ldr	r2, .L3285+120
+	mov	ip, #32
+	ldr	r3, [sp, #20]
+	strh	fp, [r2]	@ movhi
+	it	ls
+	strhls	r1, [r2]	@ movhi
+	mov	r1, #2000
+	ldr	r2, .L3285+124
+	ldr	fp, .L3285+96
+	strh	r1, [r2]	@ movhi
+	movs	r1, #50
+	strh	r1, [r0]	@ movhi
+	ldr	r1, .L3285+128
+	strh	r4, [r1]	@ movhi
+	movs	r4, #48
+	ldr	r1, .L3285+132
+	strh	r4, [r1]	@ movhi
+	ldr	r4, .L3285+136
+	strh	ip, [r4]	@ movhi
+	ldr	r4, [sp]
+	cmp	r4, #2
+	beq	.L3226
+	ldr	r4, .L3285+140
+	ldrb	r4, [r4]	@ zero_extendqisi2
+	cbz	r4, .L3227
+.L3226:
+	movs	r4, #150
+	strh	r4, [r0]	@ movhi
+	movs	r0, #64
+	strh	r0, [r1]	@ movhi
+	movs	r0, #12
+	ldr	r1, .L3285+136
+	strh	r0, [r1]	@ movhi
+	ldr	r0, .L3285+144
+	ldrb	r0, [r0]	@ zero_extendqisi2
+	cbnz	r0, .L3227
+	movs	r0, #4
+	strh	r0, [r1]	@ movhi
+	mov	r1, #600
+	strh	r1, [r2]	@ movhi
+	movs	r1, #128
+	ldr	r2, .L3285+128
+	strh	r1, [r2]	@ movhi
+.L3227:
+	ldr	r4, .L3285+148
+	ldr	r2, [r4]
+	lsls	r1, r2, #19
+	bpl	.L3229
+	mov	r1, r5
+	ldr	r0, .L3285+152
+	str	r3, [sp]
+	bl	printf
+	ldr	r3, [sp]
+.L3229:
+	ldr	r2, [r4]
+	lsls	r2, r2, #19
+	bpl	.L3230
+	ldr	r1, [r3]
+	ldr	r0, .L3285+156
+	bl	printf
+.L3230:
+	ldr	r3, [r4]
+	lsls	r3, r3, #19
+	bpl	.L3231
+	ldr	r1, [r10]
+	ldr	r0, .L3285+160
+	bl	printf
+.L3231:
+	ldr	r3, [r4]
+	lsls	r5, r3, #19
+	bpl	.L3232
+	ldr	r1, [fp]
+	ldr	r0, .L3285+164
+	bl	printf
+.L3232:
+	ldr	r3, [r4]
+	lsls	r0, r3, #19
+	bpl	.L3233
+	ldrh	r1, [r6]
+	ldr	r0, .L3285+168
+	bl	printf
+.L3233:
+	ldr	r3, [r4]
+	ldr	r5, .L3285+72
+	tst	r3, #4096
+	beq	.L3234
+	ldrh	r1, [r5]
+	ldr	r0, .L3285+172
+	bl	printf
+.L3234:
+	ldr	r3, [r4]
+	lsls	r1, r3, #19
+	bpl	.L3235
+	ldrh	r1, [r8]
+	ldr	r0, .L3285+176
+	bl	printf
+.L3235:
+	ldr	r3, [r4]
+	lsls	r2, r3, #19
+	bpl	.L3236
+	ldr	r3, .L3285+120
+	ldr	r0, .L3285+180
+	ldrh	r1, [r3]
+	bl	printf
+.L3236:
+	ldr	r3, [r4]
+	lsls	r3, r3, #19
+	bpl	.L3237
+	ldrh	r1, [r7]
+	ldr	r0, .L3285+184
+	bl	printf
+.L3237:
+	bl	buf_init
+	ldr	r3, [sp, #12]
+	movs	r0, #6
+	ldr	r7, .L3285+188
+	ldrh	r3, [r3]
+	muls	r0, r3, r0
+	bl	ftl_malloc
+	ldr	r3, .L3285+192
+	ldr	r2, [sp, #8]
+	str	r0, [r3]
+	ldr	r3, [sp, #4]
+	ldrb	r0, [r2]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	muls	r0, r3, r0
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L3285+196
+	ldr	r2, .L3285+200
+	str	r0, [r3]
+	ldr	r3, .L3285+204
+	str	r2, [r3]
+	ldr	r3, [sp, #4]
+	ldrh	r0, [r3]
+	ldr	r3, [sp, #8]
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	muls	r0, r1, r0
+	ldr	r1, .L3285+208
+	add	r3, r2, r0, lsl #3
+	str	r3, [r1]
+	ldr	r1, [sp, #12]
+	ldrh	r1, [r1]
+	lsrs	r1, r1, #1
+	add	r1, r1, r0, lsl #1
+	ldr	r0, [r4]
+	add	r1, r2, r1, lsl #2
+	lsls	r0, r0, #19
+	str	r1, [r7]
+	bpl	.L3238
+	ldr	r0, .L3285+212
+	bl	printf
+	b	.L3286
+.L3287:
+	.align	2
+.L3285:
+	.word	.LANCHOR57
+	.word	.LANCHOR31
+	.word	.LANCHOR58
+	.word	.LC196
+	.word	.LC97
+	.word	.LANCHOR126
+	.word	.LANCHOR127
+	.word	.LANCHOR174
+	.word	.LANCHOR121
+	.word	.LANCHOR206
+	.word	.LANCHOR71
+	.word	.LANCHOR123
+	.word	.LANCHOR77
+	.word	.LANCHOR18
+	.word	.LANCHOR104
+	.word	.LANCHOR85
+	.word	.LANCHOR67
+	.word	.LANCHOR6
+	.word	.LANCHOR203
+	.word	.LANCHOR78
+	.word	.LANCHOR2
+	.word	.LANCHOR66
+	.word	.LANCHOR59
+	.word	.LANCHOR207
+	.word	.LANCHOR208
+	.word	.LANCHOR120
+	.word	.LANCHOR187
+	.word	.LANCHOR93
+	.word	.LANCHOR117
+	.word	.LANCHOR116
+	.word	.LANCHOR89
+	.word	.LANCHOR118
+	.word	.LANCHOR145
+	.word	.LANCHOR144
+	.word	.LANCHOR8
+	.word	.LANCHOR75
+	.word	.LANCHOR0
+	.word	.LANCHOR14
+	.word	.LC197
+	.word	.LC198
+	.word	.LC199
+	.word	.LC200
+	.word	.LC201
+	.word	.LC202
+	.word	.LC203
+	.word	.LC204
+	.word	.LC205
+	.word	.LANCHOR10
+	.word	.LANCHOR4
+	.word	.LANCHOR110
+	.word	ftl_ext_info_data_buffer
+	.word	.LANCHOR109
+	.word	.LANCHOR9
+	.word	.LC206
+	.word	.LANCHOR103
+	.word	.LANCHOR146
+.L3286:
+.L3238:
+	ldr	r2, [sp, #4]
+	ldr	r1, [sp, #8]
+	ldr	r3, [sp, #12]
+	ldrh	r2, [r2]
+	ldrb	r8, [r1]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	mul	r8, r8, r2
+	ldrh	r2, [r6]
+	lsls	r6, r3, #2
+	add	r8, r3, r8, lsl #2
+	ldr	r3, [r4]
+	add	r6, r6, r2, lsl #2
+	lsl	r8, r8, #1
+	lsls	r2, r3, #19
+	add	r8, r8, #632
+	add	r6, r6, #704
+	bpl	.L3239
+	ldrh	r3, [r5]
+	mov	r2, r6
+	mov	r1, r8
+	ldr	r0, .L3288
+	bl	printf
+.L3239:
+	ldrh	r3, [r5]
+	cmp	r8, r3
+	bhi	.L3240
+	cmp	r6, r3
+	bls	.L3241
+.L3240:
+.L3284:
+	b	.L3284
+.L3222:
+	lsl	ip, ip, #1
+	b	.L3221
+.L3224:
+	lsls	r1, r1, #1
+	b	.L3223
+.L3241:
+	bl	sblk_init
+	bl	ftl_info_blk_init
+	adds	r3, r0, #1
+	beq	.L3220
+	bl	ftl_ext_info_init
+	bl	gc_init
+	movs	r0, #1
+	ldr	r4, .L3288+4
+	bl	pm_init
+	bl	lpa_rebuild_hash
+	ldr	r0, [r7]
+	movs	r1, #0
+	adds	r0, r0, #16
+	bl	ftl_open_sblk_recovery
+	ldr	r0, [r7]
+	add	r1, r0, #16
+	adds	r0, r0, #48
+	bl	ftl_open_sblk_recovery
+	ldr	r2, [r4]
+	ldr	r0, [r7]
+	ldr	r3, [r2, #8]
+	adds	r0, r0, #16
+	adds	r3, r3, #16
+	str	r3, [r2, #8]
+	bl	ftl_info_data_recovery
+	ldr	r0, [r7]
+	adds	r0, r0, #48
+	bl	ftl_info_data_recovery
+	ldr	r0, [r7]
+	adds	r0, r0, #80
+	bl	ftl_info_data_recovery
+	bl	gc_recovery
+	bl	pm_flush
+	movs	r0, #1
+	bl	ftl_total_vpn_update
+	ldr	r3, .L3288+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L3243
+	ldr	r2, [r4]
+	ldr	r3, [r2, #68]
+	adds	r3, r3, #1
+	str	r3, [r2, #68]
+.L3243:
+	bl	ftl_ext_info_flush
+	movs	r0, #0
+	bl	ftl_info_flush
+	bl	print_ftl_debug_info
+	movs	r0, #0
+.L3220:
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3289:
+	.align	2
+.L3288:
+	.word	.LC207
+	.word	.LANCHOR102
+	.word	.LANCHOR182
+	.size	zftl_init, .-zftl_init
+	.section	.text.rk_ftl_init,"ax",%progbits
+	.align	1
+	.global	rk_ftl_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_ftl_init, %function
+rk_ftl_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, lr}
+	bl	nand_flash_init
+	mov	r4, r0
+	cbnz	r0, .L3291
+	bl	zftl_init
+	mov	r4, r0
+.L3291:
+	bl	idb_init
+	mov	r1, r4
+	ldr	r0, .L3292
+	bl	printf
+	mov	r0, r4
+	pop	{r4, pc}
+.L3293:
+	.align	2
+.L3292:
+	.word	.LC208
+	.size	rk_ftl_init, .-rk_ftl_init
+	.section	.text.gc_update_l2p_map_new,"ax",%progbits
+	.align	1
+	.global	gc_update_l2p_map_new
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_update_l2p_map_new, %function
+gc_update_l2p_map_new:
+	@ args = 0, pretend = 0, frame = 32
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L3328
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #32
+	ldr	r2, .L3328+4
+	ldr	r4, [r3]
+	ldrh	r2, [r2]
+	ldr	r7, .L3328+8
+	ldrb	r1, [r4, #89]	@ zero_extendqisi2
+	str	r3, [sp, #20]
+	muls	r2, r1, r2
+	str	r2, [sp, #4]
+	ldr	r2, [r7]
+	tst	r2, #256
+	beq	.L3295
+	ldrh	r1, [r4, #80]
+	ldr	r0, .L3328+12
+	bl	printf
+.L3295:
+	ldr	r3, .L3328+16
+	movs	r6, #0
+	ldr	r1, [sp, #4]
+	mov	r5, r6
+	ldrh	r2, [r4, #80]
+	ldr	r3, [r3]
+	subs	r1, r1, #1
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+.L3296:
+	ldr	r3, [sp, #4]
+	cmp	r5, r3
+	bne	.L3305
+	ldr	r3, [r7]
+	ldr	r5, .L3328+16
+	tst	r3, #256
+	beq	.L3306
+	ldr	r3, [sp, #20]
+	ldrh	r0, [r4, #80]
+	ldr	r2, [r5]
+	ldr	r1, [r3]
+	mov	r3, r6
+	ldrh	r2, [r2, r0, lsl #1]
+	ldrh	r1, [r1, #80]
+	ldr	r0, .L3328+20
+	bl	printf
+.L3306:
+	ldrh	r2, [r4, #80]
+	ldr	r3, [r5]
+	ldrh	r3, [r3, r2, lsl #1]
+	cmp	r6, r3
+	beq	.L3307
+	movw	r2, #617
+	ldr	r1, .L3328+24
+	ldr	r0, .L3328+28
+	bl	printf
+.L3307:
+	ldrh	r2, [r4, #80]
+	ldr	r3, [r5]
+	strh	r6, [r3, r2, lsl #1]	@ movhi
+	ldrh	r0, [r4, #80]
+	bl	zftl_insert_data_list
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3305:
+	ldr	r3, .L3328+32
+	lsl	r8, r5, #2
+	ldr	r3, [r3]
+	ldr	r10, [r3, r5, lsl #2]
+	cmp	r10, #-1
+	beq	.L3297
+	ldr	r3, .L3328+36
+	mov	r0, r10
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	lsls	r1, r1, #7
+	bl	__aeabi_uidiv
+	uxth	r3, r0
+	str	r3, [sp, #16]
+	ldr	r3, [r7]
+	lsls	r1, r3, #23
+	bpl	.L3298
+	mov	r3, r5
+	mov	r2, r10
+	ldr	r1, [sp, #16]
+	ldr	r0, .L3328+40
+	bl	printf
+.L3298:
+	ldr	fp, .L3328+32
+	str	r5, [sp, #12]
+.L3304:
+	ldr	r3, [fp]
+	ldr	r10, [r3, r8]
+	cmp	r10, #-1
+	beq	.L3299
+	ldr	r3, .L3328+36
+	mov	r0, r10
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	lsls	r1, r1, #7
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #16]
+	uxth	r0, r0
+	cmp	r3, r0
+	bne	.L3299
+	ldr	r3, .L3328+44
+	mov	r0, r10
+	ldr	r3, [r3]
+	ldr	r3, [r3, r8]
+	str	r3, [sp, #8]
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #28]
+	adds	r0, r0, #1
+	bne	.L3300
+	movs	r2, #0
+	add	r1, sp, #28
+	mov	r0, r10
+	bl	pm_log2phys
+.L3300:
+	ldr	r3, [sp, #28]
+	ldr	r2, [sp, #8]
+	cmp	r2, r3
+	bne	.L3301
+	ldr	r3, .L3328+48
+	add	r1, sp, #32
+	movs	r2, #1
+	mov	r0, r10
+	adds	r6, r6, #1
+	ldr	r3, [r3]
+	ldr	r3, [r3, r8]
+	str	r3, [r1, #-8]!
+	bl	pm_log2phys
+	ldr	r3, .L3328+52
+	ldrh	r0, [r3]
+	movs	r3, #1
+	rsb	r2, r0, #21
+	lsls	r3, r3, r2
+	ldr	r2, [sp, #8]
+	subs	r3, r3, #1
+	lsrs	r2, r2, r0
+	mov	r0, r2
+	ldr	r2, .L3328+56
+	ands	r0, r0, r3
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	uxth	r0, r0
+.L3327:
+	bl	ftl_vpn_decrement
+	ldr	r3, [fp]
+	mov	r2, #-1
+	str	r2, [r3, r8]
+.L3299:
+	ldr	r3, [sp, #12]
+	add	r8, r8, #4
+	adds	r3, r3, #1
+	str	r3, [sp, #12]
+	ldr	r2, [sp, #12]
+	ldr	r3, [sp, #4]
+	cmp	r3, r2
+	bne	.L3304
+.L3297:
+	adds	r5, r5, #1
+	b	.L3296
+.L3301:
+	ldr	r2, [r7]
+	lsls	r2, r2, #23
+	bpl	.L3303
+	ldr	r2, [sp, #8]
+	mov	r1, r10
+	ldr	r0, .L3328+60
+	bl	printf
+.L3303:
+	ldrh	r0, [r4, #80]
+	b	.L3327
+.L3329:
+	.align	2
+.L3328:
+	.word	.LANCHOR10
+	.word	.LANCHOR77
+	.word	.LANCHOR14
+	.word	.LC209
+	.word	.LANCHOR9
+	.word	.LC212
+	.word	.LANCHOR209
+	.word	.LC0
+	.word	.LANCHOR152
+	.word	.LANCHOR123
+	.word	.LC210
+	.word	.LANCHOR153
+	.word	.LANCHOR154
+	.word	.LANCHOR66
+	.word	.LANCHOR67
+	.word	.LC211
+	.size	gc_update_l2p_map_new, .-gc_update_l2p_map_new
+	.section	.text.gc_scan_src_blk_one_page,"ax",%progbits
+	.align	1
+	.global	gc_scan_src_blk_one_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_scan_src_blk_one_page, %function
+gc_scan_src_blk_one_page:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r1, #0
+	ldr	r4, .L3356
+	mov	r0, r1
+	movw	r5, #65535
+	ldr	r6, .L3356+4
+	ldrb	r3, [r4, #4]	@ zero_extendqisi2
+	ldrb	ip, [r6]	@ zero_extendqisi2
+	add	r2, r4, r3, lsl #1
+	ldrh	r7, [r2, #36]
+	ldrh	r2, [r4, #2]
+.L3331:
+	cmp	r7, r5
+	beq	.L3333
+	cbz	r0, .L3334
+	strh	r2, [r4, #2]	@ movhi
+.L3334:
+	cbz	r1, .L3335
+	strb	r3, [r4, #4]
+.L3335:
+	ldr	r8, .L3356+16
+	movs	r0, #1
+	ldr	r10, .L3356+20
+	mov	fp, #1
+	bl	buf_alloc
+	mov	r5, r0
+.L3336:
+	ldrb	r1, [r4, #6]	@ zero_extendqisi2
+	cmp	fp, r1
+	ble	.L3344
+	mov	r0, r5
+	bl	buf_free
+	ldrb	r3, [r4, #4]	@ zero_extendqisi2
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	cmp	r2, r3
+	strb	r3, [r4, #4]
+	bne	.L3330
+	ldrh	r3, [r4, #2]
+	adds	r3, r3, #1
+	strh	r3, [r4, #2]	@ movhi
+	movs	r3, #0
+	strb	r3, [r4, #4]
+.L3330:
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3333:
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	cmp	r3, ip
+	itt	eq
+	moveq	r3, #0
+	addeq	r2, r2, #1
+	add	r1, r4, r3, lsl #1
+	it	eq
+	uxtheq	r2, r2
+	ldrh	r7, [r1, #36]
+	it	eq
+	moveq	r0, #1
+	movs	r1, #1
+	b	.L3331
+.L3344:
+	ldrh	r3, [r8]
+	cmp	r1, #3
+	ldrh	r2, [r4, #2]
+	mul	r3, r7, r3
+	bne	.L3337
+	add	r3, r3, r2
+	orr	r3, r3, fp, lsl #24
+.L3355:
+	str	r3, [r5, #24]
+	movs	r1, #1
+	mov	r0, r5
+	bl	sblk_read_page
+	ldr	r3, [r5, #36]
+	adds	r2, r3, #1
+	beq	.L3341
+	cmp	r3, #512
+	beq	.L3341
+	ldr	r3, [r5, #12]
+	ldr	r3, [r3, #4]
+	mov	r0, r3
+	str	r3, [sp, #4]
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #12]
+	adds	r0, r0, #1
+	ldr	r3, [sp, #4]
+	bne	.L3343
+	ldr	r2, .L3356+8
+	ldr	r2, [r2]
+	cmp	r3, r2
+	bcs	.L3343
+	movs	r2, #0
+	add	r1, sp, #12
+	mov	r0, r3
+	bl	pm_log2phys
+.L3343:
+	ldr	r2, [r5, #24]
+	ldr	r3, [sp, #12]
+	cmp	r2, r3
+	bne	.L3341
+	ldr	r1, .L3356+12
+	ldrh	r3, [r4, #20]
+	ldr	r1, [r1]
+	str	r2, [r1, r3, lsl #2]
+	adds	r3, r3, #1
+	strh	r3, [r4, #20]	@ movhi
+.L3341:
+	ldrh	r3, [r4, #22]
+	add	fp, fp, #1
+	adds	r3, r3, #1
+	strh	r3, [r4, #22]	@ movhi
+	b	.L3336
+.L3337:
+	cmp	r1, #2
+	ittet	eq
+	addeq	r3, r3, r2, lsl #1
+	ldrbeq	r2, [r10]	@ zero_extendqisi2
+	addne	r3, r3, r2
+	addeq	r3, r3, #-1
+	itt	eq
+	addeq	r3, r3, fp
+	orreq	r3, r3, r2, lsl #24
+	b	.L3355
+.L3357:
+	.align	2
+.L3356:
+	.word	.LANCHOR63
+	.word	.LANCHOR78
+	.word	.LANCHOR120
+	.word	.LANCHOR68
+	.word	.LANCHOR103
+	.word	.LANCHOR71
+	.size	gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page
+	.section	.text.gc_scan_src_blk,"ax",%progbits
+	.align	1
+	.global	gc_scan_src_blk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_scan_src_blk, %function
+gc_scan_src_blk:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	movw	r3, #65535
+	ldr	r4, .L3399
+	ldrh	r2, [r4]
+	cmp	r2, r3
+	bne	.L3359
+	movw	r2, #1052
+	ldr	r1, .L3399+4
+	ldr	r0, .L3399+8
+	bl	printf
+.L3359:
+	ldrh	r1, [r4]
+	movw	r3, #65535
+	cmp	r1, r3
+	beq	.L3380
+	ldr	r3, .L3399+12
+	ldr	r3, [r3]
+	lsls	r0, r3, #23
+	bpl	.L3361
+	ldr	r3, .L3399+16
+	ldr	r0, .L3399+20
+	ldr	r3, [r3]
+	ldrh	r2, [r3, r1, lsl #1]
+	bl	printf
+.L3361:
+	ldr	r1, .L3399+24
+	ldrh	r0, [r4]
+	bl	ftl_get_blk_list_in_sblk
+	uxtb	r0, r0
+	strb	r0, [r4, #5]
+	cbnz	r0, .L3362
+	movw	r3, #65535
+	strh	r3, [r4]	@ movhi
+.L3358:
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3362:
+	ldr	r5, .L3399+28
+	ldrh	r3, [r4]
+	ldr	r2, [r5]
+	add	r2, r2, r3, lsl #2
+	ldrb	r2, [r2, #2]	@ zero_extendqisi2
+	and	r2, r2, #224
+	cmp	r2, #32
+	beq	.L3363
+	cmp	r2, #224
+	beq	.L3363
+	cbz	r2, .L3364
+	ldr	r2, .L3399+32
+	ldr	r2, [r2]
+	ldrh	r1, [r2, #16]
+	cmp	r1, r3
+	beq	.L3363
+	ldrh	r1, [r2, #48]
+	cmp	r1, r3
+	beq	.L3363
+	ldrh	r2, [r2, #80]
+	cmp	r2, r3
+	bne	.L3397
+.L3363:
+	movw	r3, #65535
+	movs	r0, #0
+	strh	r3, [r4]	@ movhi
+	strh	r0, [r4, #20]	@ movhi
+	b	.L3358
+.L3364:
+	ldr	r5, .L3399+16
+	ldr	r1, [r5]
+	ldrh	r3, [r1, r3, lsl #1]
+	cbz	r3, .L3366
+	mov	r2, #1072
+	ldr	r1, .L3399+4
+	ldr	r0, .L3399+8
+	bl	printf
+.L3366:
+	ldrh	r2, [r4]
+	movs	r1, #0
+	ldr	r3, [r5]
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	b	.L3363
+.L3397:
+	add	r0, r4, r0, lsl #1
+	movw	r3, #65535
+	ldrh	r6, [r0, #34]
+	cmp	r6, r3
+	bne	.L3367
+	mov	r2, #1080
+	ldr	r1, .L3399+4
+	ldr	r0, .L3399+8
+	bl	printf
+.L3367:
+	ldr	r2, .L3399+36
+	ldrh	r0, [r4]
+	ldr	r1, .L3399+40
+	ldrh	r2, [r2]
+	ldr	r8, .L3399+64
+	ldrh	r3, [r1]
+	mov	r10, r1
+	muls	r6, r2, r6
+	ldr	r2, [r5]
+	subs	r3, r3, #1
+	uxth	r3, r3
+	add	r2, r2, r0, lsl #2
+	ldrb	r2, [r2, #2]	@ zero_extendqisi2
+	and	r2, r2, #224
+	cmp	r2, #160
+	bne	.L3381
+	ldr	r2, .L3399+44
+	ldrb	r7, [r2]	@ zero_extendqisi2
+	cmp	r7, #2
+	it	eq
+	ldrheq	r3, [r8]
+	orr	r6, r6, r7, lsl #24
+	itee	ne
+	uxthne	r7, r7
+	addeq	r3, r3, #-1
+	uxtheq	r3, r3
+.L3368:
+	orrs	r6, r6, r3
+	strb	r7, [r4, #6]
+	movs	r5, #0
+	movs	r0, #1
+	strh	r5, [r4, #2]	@ movhi
+	strb	r5, [r4, #4]
+	strh	r5, [r4, #22]	@ movhi
+	strh	r5, [r4, #24]	@ movhi
+	bl	buf_alloc
+	str	r6, [r0, #24]
+	movs	r1, #1
+	ldr	r6, .L3399+48
+	mov	fp, r0
+	bl	sblk_read_page
+	ldrh	r3, [r8]
+	movs	r1, #255
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	ldr	r8, .L3399+68
+	muls	r2, r3, r2
+	ldr	r0, [r8]
+	lsls	r2, r2, #2
+	bl	ftl_memset
+	ldr	r3, [fp, #36]
+	strh	r5, [r4, #20]	@ movhi
+	adds	r2, r3, #1
+	beq	.L3398
+	cmp	r3, #512
+	bne	.L3371
+.L3398:
+	mov	r0, fp
+	bl	buf_free
+	mov	r0, #-1
+	b	.L3358
+.L3381:
+	movs	r7, #1
+	b	.L3368
+.L3371:
+	ldr	r3, [fp, #12]
+	ldr	r2, [r3]
+	ldr	r3, .L3399+52
+	cmp	r2, r3
+	beq	.L3372
+	movw	r2, #1113
+	ldr	r1, .L3399+4
+	ldr	r0, .L3399+8
+	bl	printf
+	b	.L3398
+.L3372:
+	ldrh	r3, [r10]
+	ldrb	r6, [r6]	@ zero_extendqisi2
+	ldr	r10, .L3399+72
+	smulbb	r6, r6, r3
+	smulbb	r6, r6, r7
+	ldr	r7, [fp, #4]
+	uxth	r6, r6
+	subs	r7, r7, #4
+.L3373:
+	cmp	r5, r6
+	blt	.L3378
+	ldr	r5, .L3399+16
+	mov	r0, fp
+	bl	buf_free
+	ldrh	r1, [r4]
+	ldr	r3, [r5]
+	ldrh	r2, [r3, r1, lsl #1]
+	ldrh	r3, [r4, #20]
+	cmp	r2, r3
+	beq	.L3379
+	ldr	r0, .L3399+56
+	bl	printf
+.L3379:
+	ldr	r3, [r5]
+	ldrh	r1, [r4, #20]
+	ldrh	r2, [r4]
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	movs	r3, #0
+	strh	r3, [r4, #24]	@ movhi
+	ldrh	r0, [r4, #20]
+	b	.L3358
+.L3378:
+	ldr	r0, [r7, #4]!
+	adds	r3, r0, #1
+	beq	.L3375
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #12]
+	adds	r0, r0, #1
+	bne	.L3376
+	movs	r2, #0
+	add	r1, sp, #12
+	ldr	r0, [r7]
+	bl	pm_log2phys
+.L3376:
+	ldr	r3, [sp, #12]
+	movs	r2, #1
+	ldrh	r0, [r10]
+	str	r3, [sp, #4]
+	rsb	r1, r0, #21
+	lsls	r2, r2, r1
+	lsr	r0, r3, r0
+	ldr	r3, .L3399+60
+	subs	r2, r2, #1
+	ands	r0, r0, r2
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	ldrh	r2, [r4]
+	ldr	r3, [sp, #4]
+	cmp	r0, r2
+	bne	.L3375
+	ldrh	r2, [r4, #20]
+	ldr	r1, [r8]
+	str	r3, [r1, r2, lsl #2]
+	adds	r2, r2, #1
+	strh	r2, [r4, #20]	@ movhi
+.L3375:
+	adds	r5, r5, #1
+	b	.L3373
+.L3380:
+	movs	r0, #0
+	b	.L3358
+.L3400:
+	.align	2
+.L3399:
+	.word	.LANCHOR63
+	.word	.LANCHOR210
+	.word	.LC0
+	.word	.LANCHOR14
+	.word	.LANCHOR9
+	.word	.LC213
+	.word	.LANCHOR63+36
+	.word	.LANCHOR7
+	.word	.LANCHOR10
+	.word	.LANCHOR103
+	.word	.LANCHOR85
+	.word	.LANCHOR71
+	.word	.LANCHOR78
+	.word	-178307901
+	.word	.LC214
+	.word	.LANCHOR67
+	.word	.LANCHOR77
+	.word	.LANCHOR68
+	.word	.LANCHOR66
+	.size	gc_scan_src_blk, .-gc_scan_src_blk
+	.section	.text.gc_scan_static_data,"ax",%progbits
+	.align	1
+	.global	gc_scan_static_data
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_scan_static_data, %function
+gc_scan_static_data:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
+	ldr	r4, .L3417
+	ldr	r3, [r4]
+	ldr	r2, [r3, #544]
+	adds	r2, r2, #1
+	beq	.L3402
+	ldr	r6, .L3417+4
+	movs	r5, #11
+	ldr	r7, .L3417+8
+.L3410:
+	ldr	r3, [r4]
+	movs	r2, #0
+	add	r1, sp, #4
+	ldr	r0, [r3, #544]
+	bl	pm_log2phys
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #1
+	beq	.L3403
+	movs	r0, #1
+	bl	buf_alloc
+	ldr	r3, [sp, #4]
+	mov	r8, r0
+	movs	r1, #1
+	str	r3, [r0, #24]
+	bl	sblk_read_page
+	ldr	r3, [r8, #36]
+	cmp	r3, #256
+	bne	.L3404
+	ldr	r3, .L3417+12
+	mov	r10, #1
+	ldr	r0, [sp, #4]
+	ldrh	r2, [r3]
+	rsb	r3, r2, #21
+	lsrs	r0, r0, r2
+	lsl	r3, r10, r3
+	ldr	r2, .L3417+16
+	subs	r3, r3, #1
+	ands	r0, r0, r3
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	movs	r2, #0
+	mov	r1, r10
+	uxth	r0, r0
+	bl	gc_add_sblk
+.L3404:
+	ldr	r2, [r8, #12]
+	ldr	r3, [r4]
+	ldr	r2, [r2, #4]
+	ldr	r3, [r3, #544]
+	cmp	r2, r3
+	beq	.L3405
+	mov	r2, #1552
+	mov	r1, r6
+	mov	r0, r7
+	bl	printf
+.L3405:
+	mov	r0, r8
+	bl	buf_free
+.L3403:
+	ldr	r3, [r4]
+	ldr	r1, .L3417+20
+	ldr	r2, [r3, #544]
+	ldr	r1, [r1]
+	adds	r2, r2, #1
+	cmp	r2, r1
+	str	r2, [r3, #544]
+	bcc	.L3406
+	mov	r2, #-1
+	str	r2, [r3, #544]
+	ldr	r2, [r3, #548]
+	adds	r2, r2, #1
+	str	r2, [r3, #548]
+	bl	ftl_flush
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	movs	r0, #0
+	bl	ftl_info_flush
+.L3401:
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.L3406:
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #1
+	bne	.L3401
+	subs	r5, r5, #1
+	uxth	r5, r5
+	cmp	r5, #0
+	bne	.L3410
+	b	.L3401
+.L3402:
+	ldr	r2, [r3, #536]
+	ldr	r1, [r3, #12]
+	ldr	r0, .L3417+24
+	add	r2, r2, #12910592
+	add	r2, r2, #49408
+	cmp	r1, r2
+	bhi	.L3412
+	ldr	r4, [r0]
+	ldr	r2, [r3, #540]
+	ldr	r4, [r4, #44]
+	add	r2, r2, #4992
+	adds	r2, r2, #8
+	cmp	r4, r2
+	bls	.L3401
+.L3412:
+	ldr	r2, [r0]
+	ldr	r2, [r2, #44]
+	str	r1, [r3, #536]
+	str	r2, [r3, #540]
+	movs	r2, #0
+	str	r2, [r3, #544]
+	b	.L3401
+.L3418:
+	.align	2
+.L3417:
+	.word	.LANCHOR10
+	.word	.LANCHOR211
+	.word	.LC0
+	.word	.LANCHOR66
+	.word	.LANCHOR67
+	.word	.LANCHOR120
+	.word	.LANCHOR102
+	.size	gc_scan_static_data, .-gc_scan_static_data
+	.section	.text.ftl_sblk_dump,"ax",%progbits
+	.align	1
+	.global	ftl_sblk_dump
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_sblk_dump, %function
+ftl_sblk_dump:
+	@ args = 0, pretend = 0, frame = 80
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	lsls	r3, r0, #2
+	ldr	r4, .L3458
+	sub	sp, sp, #120
+	lsls	r2, r0, #2
+	mov	r6, r0
+	str	r3, [sp, #68]
+	ldr	r3, [r4]
+	str	r1, [sp, #60]
+	ldr	r1, [r3, r0, lsl #2]
+	adds	r2, r3, r2
+	ldrb	r2, [r2, #2]	@ zero_extendqisi2
+	ubfx	r1, r1, #11, #8
+	str	r1, [sp, #4]
+	mov	r1, r0
+	ldrh	r3, [r3, r0, lsl #2]
+	ldr	r0, .L3458+4
+	ubfx	r3, r3, #0, #11
+	str	r3, [sp]
+	ubfx	r3, r2, #3, #2
+	lsrs	r2, r2, #5
+	bl	printf
+	movw	r3, #65535
+	cmp	r6, r3
+	beq	.L3440
+	ldr	r3, .L3458+8
+	ldrh	r3, [r3]
+	cmp	r3, r6
+	bls	.L3440
+	ldr	r3, [r4]
+	lsls	r2, r6, #2
+	add	r1, sp, #104
+	strh	r6, [sp, #88]	@ movhi
+	mov	r0, r6
+	movs	r5, #0
+	add	r3, r3, r2
+	mov	r10, r5
+	ldrb	r3, [r3, #2]	@ zero_extendqisi2
+	and	r3, r3, #224
+	cmp	r3, #160
+	itet	eq
+	ldreq	r3, .L3458+12
+	movne	fp, #1
+	ldrbeq	fp, [r3]	@ zero_extendqisi2
+	bl	ftl_get_blk_list_in_sblk
+	ldr	r3, .L3458+16
+	uxtb	r0, r0
+	lsls	r2, r6, #2
+	strb	r5, [sp, #93]
+	strb	r0, [sp, #97]
+	mov	r1, r6
+	ldrh	r3, [r3]
+	strh	r5, [sp, #90]	@ movhi
+	strh	r5, [sp, #98]	@ movhi
+	smulbb	r3, r3, r0
+	strh	r3, [sp, #94]	@ movhi
+	ldr	r3, [r4]
+	add	r3, r3, r2
+	ldrb	r2, [r3, #2]	@ zero_extendqisi2
+	mov	r3, fp
+	str	r0, [sp]
+	ldr	r0, .L3458+20
+	lsrs	r2, r2, #5
+	bl	printf
+	movs	r0, #1
+	bl	buf_alloc
+	mov	r7, r0
+	str	r5, [sp, #44]
+	str	r5, [sp, #40]
+.L3422:
+	ldr	r3, .L3458+16
+	ldrh	r2, [r3]
+	uxth	r3, r5
+	cmp	r2, r3
+	bls	.L3437
+	str	r3, [sp, #64]
+	lsls	r3, r3, #1
+	subs	r3, r3, #1
+	str	r3, [sp, #72]
+	movs	r3, #0
+	b	.L3457
+.L3434:
+	ldr	r3, [sp, #76]
+	add	r2, sp, #120
+	add	r3, r2, r3, lsl #1
+	ldrh	r3, [r3, #-32]
+	str	r3, [sp, #52]
+	movw	r3, #65535
+	ldr	r2, [sp, #52]
+	cmp	r2, r3
+	beq	.L3423
+	ldr	r3, .L3458+24
+	cmp	fp, #3
+	ldrh	r4, [r3]
+	mov	r3, r2
+	mul	r4, r2, r4
+	bne	.L3424
+	uxtah	r4, r4, r5
+	orr	r4, r4, r8, lsl #24
+.L3425:
+	movs	r1, #1
+	str	r4, [r7, #24]
+	mov	r0, r7
+	bl	sblk_read_page
+	ldr	r2, [r7, #12]
+	ldr	r3, [r7, #36]
+	ldr	r0, .L3458+28
+	ldr	r1, [r2, #12]
+	str	r3, [sp, #56]
+	ldr	r3, [r7, #4]
+	str	r1, [sp, #32]
+	ldr	r1, [r2, #8]
+	str	r1, [sp, #28]
+	ldr	r1, [r2, #4]
+	str	r1, [sp, #24]
+	ldr	r2, [r2]
+	ldr	r1, [sp, #52]
+	str	r2, [sp, #20]
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #16]
+	ldr	r2, [r3, #8]
+	str	r2, [sp, #12]
+	ldr	r2, [r3, #4]
+	str	r2, [sp, #8]
+	ldr	r3, [r3]
+	ldr	r2, [sp, #64]
+	str	r3, [sp, #4]
+	ldr	r3, [sp, #56]
+	str	r3, [sp]
+	mov	r3, r4
+	bl	printf
+	ldr	r3, [sp, #56]
+	adds	r2, r3, #1
+	beq	.L3442
+	cmp	r3, #512
+	ldr	r3, [sp, #40]
+	it	eq
+	moveq	r3, #1
+.L3456:
+	str	r3, [sp, #40]
+	ldr	r3, .L3458
+	ldr	r2, [sp, #68]
+	ldr	r3, [r3]
+	add	r3, r3, r2
+	ldrb	r3, [r3, #2]	@ zero_extendqisi2
+	and	r3, r3, #224
+	cmp	r3, #224
+	beq	.L3423
+	cmp	r3, #32
+	beq	.L3423
+	ldr	r3, [r7, #12]
+	ldr	r0, [r3, #4]
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #84]
+	adds	r0, r0, #1
+	bne	.L3428
+	ldr	r3, [r7, #12]
+	movs	r2, #0
+	add	r1, sp, #84
+	ldr	r0, [r3, #4]
+	bl	pm_log2phys
+.L3428:
+	ldr	r3, [sp, #84]
+	cmp	r4, r3
+	bne	.L3429
+	ldr	r3, [sp, #44]
+	mov	r1, r4
+	ldr	r2, [r7, #12]
+	ldr	r0, .L3458+32
+	adds	r3, r3, #1
+	ldr	r2, [r2, #4]
+	str	r3, [sp, #44]
+	bl	printf
+.L3429:
+	ldr	r3, [sp, #60]
+	cbz	r3, .L3431
+	ldr	r2, [r3, r10, lsl #2]
+	lsl	r4, r10, #2
+	ldr	r3, [r7, #12]
+	ldr	r3, [r3, #4]
+	cmp	r3, r2
+	beq	.L3432
+	ldr	r3, .L3458+36
+	ldr	r3, [r3]
+	lsls	r3, r3, #19
+	bpl	.L3432
+	mov	r1, r10
+	ldr	r0, .L3458+40
+	bl	printf
+.L3432:
+	ldr	r3, [sp, #60]
+	ldr	r2, [r7, #12]
+	ldr	r3, [r3, r4]
+	ldr	r2, [r2, #4]
+	cmp	r2, r3
+	beq	.L3431
+	adds	r3, r3, #1
+	beq	.L3431
+	mov	r2, #1312
+	ldr	r1, .L3458+44
+	ldr	r0, .L3458+48
+	bl	printf
+.L3431:
+	add	r10, r10, #1
+.L3423:
+	add	r8, r8, #1
+	uxth	r8, r8
+.L3436:
+	cmp	fp, r8
+	bcs	.L3434
+	ldr	r3, [sp, #48]
+	adds	r3, r3, #1
+.L3457:
+	str	r3, [sp, #48]
+	ldrb	r2, [sp, #97]	@ zero_extendqisi2
+	ldrh	r3, [sp, #48]
+	cmp	r2, r3
+	bls	.L3435
+	adds	r3, r3, #8
+	mov	r8, #1
+	str	r3, [sp, #76]
+	b	.L3436
+.L3424:
+	cmp	fp, #2
+	itett	eq
+	ldreq	r3, [sp, #72]
+	uxtahne	r4, r4, r5
+	addeq	r4, r4, r3
+	ldreq	r3, .L3458+12
+	ittt	eq
+	addeq	r4, r4, r8
+	ldrbeq	r3, [r3]	@ zero_extendqisi2
+	orreq	r4, r4, r3, lsl #24
+	b	.L3425
+.L3442:
+	movs	r3, #1
+	b	.L3456
+.L3435:
+	adds	r5, r5, #1
+	b	.L3422
+.L3437:
+	mov	r0, r7
+	bl	buf_free
+	ldr	r3, .L3458+52
+	mov	r1, r6
+	ldr	r0, .L3458+56
+	ldr	r2, [r3]
+	ldr	r3, [sp, #44]
+	ldrh	r2, [r2, r6, lsl #1]
+	bl	printf
+	ldr	r0, [sp, #40]
+.L3419:
+	add	sp, sp, #120
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3440:
+	movs	r0, #0
+	b	.L3419
+.L3459:
+	.align	2
+.L3458:
+	.word	.LANCHOR7
+	.word	.LC215
+	.word	.LANCHOR6
+	.word	.LANCHOR71
+	.word	.LANCHOR85
+	.word	.LC216
+	.word	.LANCHOR103
+	.word	.LC162
+	.word	.LC217
+	.word	.LANCHOR14
+	.word	.LC218
+	.word	.LANCHOR212
+	.word	.LC0
+	.word	.LANCHOR9
+	.word	.LC219
+	.size	ftl_sblk_dump, .-ftl_sblk_dump
+	.section	.text.zftl_read,"ax",%progbits
+	.align	1
+	.global	zftl_read
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	zftl_read, %function
+zftl_read:
+	@ args = 0, pretend = 0, frame = 48
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r5, r3
+	ldr	r3, .L3507
+	mov	r4, r0
+	sub	sp, sp, #72
+	mov	r6, r1
+	mov	fp, r2
+	ldr	r3, [r3]
+	lsls	r0, r3, #19
+	bpl	.L3461
+	mov	r3, r2
+	ldr	r0, .L3507+4
+	mov	r2, r1
+	mov	r1, r4
+	bl	printf
+.L3461:
+	cmp	r4, #0
+	bne	.L3462
+	ldr	r3, .L3507+8
+	mov	r4, #24576
+	ldr	r3, [r3]
+.L3463:
+	add	r2, r6, fp
+	cmp	r3, r2
+	bcc	.L3492
+	adds	r3, r4, r6
+	ldr	r6, .L3507+12
+	str	r3, [sp, #28]
+	ldr	r3, .L3507+16
+	ldr	r0, [sp, #28]
+	ldr	r2, [r3]
+	ldr	r3, [r2, #24]
+	add	r3, r3, fp
+	str	r3, [r2, #24]
+	ldr	r3, .L3507+20
+	ldrb	r4, [r3]	@ zero_extendqisi2
+	mov	r1, r4
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #28]
+	mov	r1, r4
+	str	r0, [sp, #36]
+	add	r3, fp, r3
+	subs	r0, r3, #1
+	str	r3, [sp, #44]
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #36]
+	ldr	r4, [sp, #36]
+	str	r0, [sp, #48]
+	rsb	r3, r3, #1
+	add	r3, r3, r0
+	str	r3, [sp, #32]
+	movs	r3, #0
+	str	r3, [sp, #40]
+.L3465:
+	ldr	r3, [sp, #32]
+	cbnz	r3, .L3490
+	ldr	r0, [sp, #40]
+.L3460:
+	add	sp, sp, #72
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3462:
+	cmp	r4, #3
+	bhi	.L3492
+	lsls	r4, r4, #13
+	mov	r3, #8192
+	b	.L3463
+.L3490:
+	ldr	r3, .L3507+20
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	ldr	r3, [sp, #36]
+	cmp	r4, r3
+	uxth	r7, r1
+	bne	.L3466
+	ldr	r0, [sp, #28]
+	bl	__aeabi_uidivmod
+	uxth	r8, r1
+	sub	r7, r7, r8
+	uxth	r7, r7
+	cmp	fp, r7
+	bcs	.L3467
+	uxth	r7, fp
+.L3467:
+	ldr	r2, .L3507+12
+	movs	r3, #0
+.L3470:
+	ldr	r1, [r2, #20]
+	cmp	r4, r1
+	bne	.L3468
+	ldrb	r1, [r2, #2]	@ zero_extendqisi2
+	lsls	r1, r1, #28
+	bpl	.L3468
+	movs	r2, #48
+	lsls	r7, r7, #9
+	mov	r0, r5
+	mla	r3, r2, r3, r6
+	add	r5, r5, r7
+	mov	r2, r7
+	ldr	r1, [r3, #4]
+	add	r1, r1, r8, lsl #9
+	bl	ftl_memcpy
+.L3469:
+	ldr	r3, [sp, #32]
+	adds	r4, r4, #1
+	subs	r3, r3, #1
+	str	r3, [sp, #32]
+.L3476:
+	ldr	r3, .L3507+24
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #2
+	bls	.L3477
+	ldr	r3, [sp, #32]
+	cmp	r3, #0
+	bne	.L3465
+.L3477:
+	ldr	r3, .L3507+28
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	cmp	r1, #0
+	beq	.L3465
+	ldr	r3, .L3507+32
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	add	r0, r0, r0, lsl #1
+	add	r0, r6, r0, lsl #4
+	bl	sblk_read_page
+.L3479:
+	ldr	r3, .L3507+28
+	ldr	r8, .L3507+32
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	cmp	r2, #0
+	bne	.L3489
+	movs	r1, #255
+	strb	r2, [r3]
+	strb	r1, [r8]
+	b	.L3465
+.L3466:
+	ldr	r3, [sp, #48]
+	mov	r8, #0
+	cmp	r4, r3
+	itttt	eq
+	ldreq	r3, [sp, #28]
+	addeq	r7, r3, fp
+	mlseq	r1, r4, r1, r7
+	uxtbeq	r7, r1
+	b	.L3467
+.L3468:
+	adds	r3, r3, #1
+	adds	r2, r2, #48
+	cmp	r3, #32
+	bne	.L3470
+	mov	r0, r4
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #68]
+	adds	r0, r0, #1
+	bne	.L3471
+	movs	r2, #0
+	add	r1, sp, #68
+	mov	r0, r4
+	bl	pm_log2phys
+.L3471:
+	ldr	r3, [sp, #68]
+	adds	r3, r3, #1
+	bne	.L3472
+	ldr	r8, .L3507+20
+	movs	r7, #0
+.L3473:
+	ldrb	r3, [r8]	@ zero_extendqisi2
+	cmp	r7, r3
+	bcs	.L3469
+	mla	r3, r3, r4, r7
+	ldr	r2, [sp, #28]
+	cmp	r2, r3
+	bhi	.L3474
+	ldr	r2, [sp, #44]
+	cmp	r2, r3
+	bls	.L3474
+	mov	r0, r5
+	add	r5, r5, #512
+	mov	r2, #512
+	movs	r1, #0
+	bl	ftl_memset
+.L3474:
+	adds	r7, r7, #1
+	b	.L3473
+.L3472:
+	movs	r0, #0
+	bl	buf_alloc
+	cmp	r0, #0
+	beq	.L3476
+	ldr	r2, .L3507+16
+	ldr	r1, [r2]
+	ldr	r2, [r1, #40]
+	adds	r2, r2, #1
+	str	r2, [r1, #40]
+	ldr	r2, [sp, #68]
+	str	r5, [r0, #8]
+	add	r5, r5, r7, lsl #9
+	str	r4, [r0, #20]
+	str	r2, [r0, #24]
+	str	r2, [r0, #28]
+	strb	r7, [r0, #40]
+	strb	r8, [r0, #41]
+	bl	zftl_add_read_buf
+	b	.L3469
+.L3508:
+	.align	2
+.L3507:
+	.word	.LANCHOR14
+	.word	.LC220
+	.word	.LANCHOR59
+	.word	.LANCHOR50
+	.word	.LANCHOR102
+	.word	.LANCHOR123
+	.word	.LANCHOR52
+	.word	.LANCHOR127
+	.word	.LANCHOR126
+.L3489:
+	ldrb	r3, [r8]	@ zero_extendqisi2
+	cmp	r3, #255
+	bne	.L3480
+	mov	r2, #1080
+	ldr	r1, .L3509
+	ldr	r0, .L3509+4
+	bl	printf
+.L3480:
+	ldrb	r7, [r8]	@ zero_extendqisi2
+	add	r3, r7, r7, lsl #1
+	add	r3, r6, r3, lsl #4
+	str	r3, [sp, #52]
+	movs	r3, #48
+	muls	r3, r7, r3
+	adds	r2, r6, r3
+	ldrb	r3, [r6, r3]	@ zero_extendqisi2
+	strb	r3, [r8]
+	ldr	r8, [r2, #36]
+	cmp	r8, #-1
+	bne	.L3481
+	ldr	r3, .L3509+8
+	str	r8, [sp, #40]
+	ldr	r2, [r3]
+	ldr	r3, [r2, #552]
+	adds	r3, r3, #1
+	str	r3, [r2, #552]
+.L3482:
+	movs	r3, #48
+	mla	r3, r3, r7, r6
+	ldr	r2, [r3, #12]
+	ldr	r3, [r3, #20]
+	ldr	r1, [r2, #4]
+	cmp	r1, r3
+	bne	.L3483
+	cmp	r8, #-1
+	bne	.L3484
+.L3483:
+	ldr	r1, .L3509+8
+	mov	r10, #48
+	mla	r10, r10, r7, r6
+	ldr	r0, [r1]
+	ldr	r1, [r0, #552]
+	adds	r1, r1, #1
+	str	r1, [r0, #552]
+	ldr	r0, [r2, #12]
+	ldrb	r1, [r10, #1]	@ zero_extendqisi2
+	str	r0, [sp, #16]
+	ldr	r0, [r2, #8]
+	str	r0, [sp, #12]
+	ldr	r0, [r2, #4]
+	str	r0, [sp, #8]
+	ldr	r2, [r2]
+	ldr	r0, .L3509+12
+	str	r2, [sp, #4]
+	ldr	r2, [r10, #24]
+	str	r2, [sp]
+	mov	r2, r8
+	bl	printf
+	ldr	r3, .L3509+16
+	ldrh	r2, [r3]
+	movs	r3, #1
+	rsb	r0, r2, #21
+	lsls	r3, r3, r0
+	ldr	r0, [r10, #24]
+	subs	r3, r3, #1
+	lsrs	r0, r0, r2
+	ldr	r2, .L3509+20
+	ands	r0, r0, r3
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	movs	r1, #0
+	uxth	r0, r0
+	bl	ftl_sblk_dump
+.L3484:
+	movs	r3, #48
+	mla	r3, r3, r7, r6
+	ldr	r2, [r3, #12]
+	ldr	r3, [r3, #20]
+	ldr	r2, [r2, #4]
+	cmp	r2, r3
+	bne	.L3485
+	cmp	r8, #-1
+	bne	.L3486
+.L3485:
+	movw	r2, #1101
+	ldr	r1, .L3509
+	ldr	r0, .L3509+4
+	bl	printf
+.L3486:
+	movs	r3, #48
+	mla	r7, r3, r7, r6
+	ldr	r3, .L3509+24
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	ldrb	r2, [r7, #40]	@ zero_extendqisi2
+	cmp	r3, r2
+	bls	.L3487
+	ldrb	r1, [r7, #41]	@ zero_extendqisi2
+	lsls	r2, r2, #9
+	ldr	r3, [r7, #4]
+	ldr	r0, [r7, #8]
+	add	r1, r3, r1, lsl #9
+	bl	ftl_memcpy
+.L3488:
+	ldr	r1, [sp, #52]
+	ldr	r0, .L3509+28
+	bl	buf_remove_buf
+	ldr	r0, [sp, #52]
+	bl	buf_free
+	ldr	r2, .L3509+32
+	ldrb	r3, [r2]	@ zero_extendqisi2
+	subs	r3, r3, #1
+	strb	r3, [r2]
+	b	.L3479
+.L3481:
+	cmp	r8, #256
+	bne	.L3482
+	ldr	r1, .L3509+16
+	ldr	r3, [r2, #24]
+	str	r2, [sp, #60]
+	movs	r2, #1
+	ldrh	r0, [r1]
+	ldr	r1, .L3509+20
+	str	r3, [sp, #56]
+	rsb	ip, r0, #21
+	lsl	ip, r2, ip
+	lsr	r0, r3, r0
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	add	ip, ip, #-1
+	and	r0, ip, r0
+	bl	__aeabi_uidiv
+	ldr	r2, [sp, #60]
+	mov	r10, r0
+	uxth	r1, r0
+	ldr	r3, [sp, #56]
+	ldr	r0, .L3509+36
+	ldr	r2, [r2, #20]
+	bl	printf
+	movs	r2, #0
+	movs	r1, #1
+	uxth	r0, r10
+	bl	gc_add_sblk
+	b	.L3482
+.L3487:
+	ldrb	r3, [r7, #2]	@ zero_extendqisi2
+	bic	r3, r3, #8
+	strb	r3, [r7, #2]
+	b	.L3488
+.L3492:
+	mov	r0, #-1
+	b	.L3460
+.L3510:
+	.align	2
+.L3509:
+	.word	.LANCHOR213
+	.word	.LC0
+	.word	.LANCHOR10
+	.word	.LC222
+	.word	.LANCHOR66
+	.word	.LANCHOR67
+	.word	.LANCHOR123
+	.word	.LANCHOR129
+	.word	.LANCHOR127
+	.word	.LC221
+	.size	zftl_read, .-zftl_read
+	.section	.text.ftl_vendor_read,"ax",%progbits
+	.align	1
+	.global	ftl_vendor_read
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_vendor_read, %function
+ftl_vendor_read:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r3, r2
+	mov	r2, r1
+	add	r1, r0, #512
+	movs	r0, #2
+	b	zftl_read
+	.size	ftl_vendor_read, .-ftl_vendor_read
+	.section	.text.zftl_sys_read,"ax",%progbits
+	.align	1
+	.global	zftl_sys_read
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	zftl_sys_read, %function
+zftl_sys_read:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r3, r2
+	mov	r2, r1
+	mov	r1, r0
+	movs	r0, #2
+	b	zftl_read
+	.size	zftl_sys_read, .-zftl_sys_read
+	.section	.text.StorageSysDataLoad,"ax",%progbits
+	.align	1
+	.global	StorageSysDataLoad
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	StorageSysDataLoad, %function
+StorageSysDataLoad:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	mov	r4, r1
+	mov	r5, r0
+	mov	r2, #512
+	movs	r1, #0
+	mov	r0, r4
+	bl	ftl_memset
+	mov	r3, r4
+	mov	r1, r5
+	movs	r2, #1
+	movs	r0, #2
+	pop	{r4, r5, r6, lr}
+	b	zftl_read
+	.size	StorageSysDataLoad, .-StorageSysDataLoad
+	.section	.text.FlashBootVendorRead,"ax",%progbits
+	.align	1
+	.global	FlashBootVendorRead
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashBootVendorRead, %function
+FlashBootVendorRead:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r3, r2
+	mov	r2, r1
+	add	r1, r0, #512
+	movs	r0, #2
+	b	zftl_read
+	.size	FlashBootVendorRead, .-FlashBootVendorRead
+	.section	.text.ftl_read,"ax",%progbits
+	.align	1
+	.global	ftl_read
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_read, %function
+ftl_read:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	zftl_read
+	.size	ftl_read, .-ftl_read
+	.section	.text.gc_check_data_one_wl,"ax",%progbits
+	.align	1
+	.global	gc_check_data_one_wl
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_check_data_one_wl, %function
+gc_check_data_one_wl:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #32
+	ldr	r4, .L3541
+	ldr	r3, .L3541+4
+	ldr	r2, [r4, #8]
+	ldr	r7, [r3]
+	mov	r8, r3
+	cbnz	r2, .L3517
+	movs	r0, #1
+	bl	buf_alloc
+	str	r0, [r4, #8]
+.L3517:
+	ldr	r5, [r4, #8]
+	cbnz	r5, .L3518
+	movw	r2, #495
+	ldr	r1, .L3541+8
+	ldr	r0, .L3541+12
+	bl	printf
+.L3518:
+	add	r3, r7, #96
+	mov	r10, #0
+.L3519:
+	ldrb	r1, [r7, #89]	@ zero_extendqisi2
+	cmp	r10, r1
+	bge	.L3528
+	movs	r6, #1
+	b	.L3529
+.L3527:
+	ldr	r2, .L3541+16
+	ldrh	r0, [r3]
+	ldrh	r1, [r2]
+	ldr	r2, .L3541+20
+	ldrb	ip, [r2]	@ zero_extendqisi2
+	muls	r0, r1, r0
+	ldrh	r1, [r4, #12]
+	cmp	ip, #3
+	bne	.L3520
+	add	r1, r1, r0
+	orr	r1, r1, r6, lsl #24
+.L3540:
+	str	r1, [r5, #24]
+	mov	r0, r5
+	movs	r1, #1
+	str	r3, [sp, #28]
+	bl	sblk_read_page
+	ldr	r1, [r5, #36]
+	ldr	fp, .L3541+56
+	ldr	r3, [sp, #28]
+	adds	r1, r1, #1
+	beq	.L3523
+	ldr	r0, [fp]
+	ldrh	ip, [r4, #18]
+	ldr	r1, [r5, #12]
+	ldr	r2, [r0, ip, lsl #2]
+	ldr	r0, [r1, #4]
+	cmp	r2, r0
+	bne	.L3523
+	ldr	r0, .L3541+24
+	ldr	r1, [r1, #8]
+	ldr	r0, [r0]
+	ldr	r0, [r0, ip, lsl #2]
+	cmp	r0, r1
+	beq	.L3524
+.L3523:
+	ldr	r1, [fp]
+	ldrh	r0, [r4, #18]
+	ldr	r0, [r1, r0, lsl #2]
+	adds	r0, r0, #1
+	beq	.L3524
+	ldr	r6, .L3541+28
+	ldrb	r3, [r7, #89]	@ zero_extendqisi2
+	ldr	r0, .L3541+32
+	ldrh	r2, [r6]
+	muls	r3, r2, r3
+	movs	r2, #4
+	bl	rknand_print_hex
+	ldrh	r2, [r6]
+	ldrb	r3, [r7, #89]	@ zero_extendqisi2
+	ldr	r6, .L3541+24
+	ldr	r0, .L3541+36
+	muls	r3, r2, r3
+	ldr	r1, [r6]
+	movs	r2, #4
+	bl	rknand_print_hex
+	ldr	r3, .L3541+40
+	ldr	r3, [r3]
+	lsls	r3, r3, #21
+	bpl	.L3525
+	ldr	r3, [r5, #12]
+	ldrh	r2, [r4, #18]
+	ldr	r1, [fp]
+	ldr	r0, [r3, #12]
+	str	r0, [sp, #16]
+	ldr	r0, [r3, #8]
+	str	r0, [sp, #12]
+	ldr	r0, [r3, #4]
+	str	r0, [sp, #8]
+	ldr	r3, [r3]
+	ldr	r0, .L3541+44
+	str	r3, [sp, #4]
+	ldr	r3, [r6]
+	ldr	r3, [r3, r2, lsl #2]
+	str	r3, [sp]
+	ldr	r3, [r1, r2, lsl #2]
+	ldr	r2, [r5, #36]
+	ldr	r1, [r5, #24]
+	bl	printf
+.L3525:
+	ldr	r3, [r8]
+	movs	r1, #0
+	ldrh	r0, [r3, #80]
+	bl	ftl_sblk_dump
+	ldr	r3, .L3541+48
+	mov	r0, #-1
+	ldrh	r2, [r7, #80]
+	movs	r1, #0
+	ldr	r3, [r3]
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+.L3526:
+.L3516:
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3520:
+	cmp	ip, #2
+	itett	eq
+	addeq	r1, r1, #-1
+	addne	r1, r1, r0
+	addeq	r1, r1, r0
+	addeq	r1, r1, r6
+	it	eq
+	orreq	r1, r1, #33554432
+	b	.L3540
+.L3524:
+	ldrh	r1, [r4, #18]
+	adds	r6, r6, #1
+	adds	r1, r1, #1
+	strh	r1, [r4, #18]	@ movhi
+.L3529:
+	ldrh	r1, [r4, #16]
+	cmp	r6, r1
+	ble	.L3527
+	add	r10, r10, #1
+	adds	r3, r3, #2
+	b	.L3519
+.L3528:
+	ldrh	r3, [r4, #12]
+	adds	r2, r3, #1
+	strh	r2, [r4, #12]	@ movhi
+	ldr	r2, .L3541+52
+	ldrb	r0, [r2]	@ zero_extendqisi2
+	cmp	r0, #0
+	beq	.L3516
+	adds	r3, r3, #2
+	movs	r0, #0
+	strh	r3, [r4, #12]	@ movhi
+	b	.L3516
+.L3542:
+	.align	2
+.L3541:
+	.word	.LANCHOR63
+	.word	.LANCHOR10
+	.word	.LANCHOR214
+	.word	.LC0
+	.word	.LANCHOR103
+	.word	.LANCHOR71
+	.word	.LANCHOR153
+	.word	.LANCHOR77
+	.word	.LC223
+	.word	.LC224
+	.word	.LANCHOR14
+	.word	.LC225
+	.word	.LANCHOR9
+	.word	.LANCHOR72
+	.word	.LANCHOR152
+	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
+	.global	__aeabi_idivmod
+	.section	.text.ftl_update_l2p_map,"ax",%progbits
+	.align	1
+	.global	ftl_update_l2p_map
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_update_l2p_map, %function
+ftl_update_l2p_map:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L3572
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #24
+	ldrb	r7, [r0, #9]	@ zero_extendqisi2
+	mov	r6, r0
+	ldrh	r3, [r3]
+	ldr	r2, .L3572+4
+	muls	r7, r3, r7
+	ldr	r4, [r2]
+	ldrh	r3, [r0, #12]
+	str	r2, [sp, #4]
+	add	r4, r4, r3, lsl #2
+	add	r3, r7, #1073741824
+	subs	r3, r3, #1
+	ldr	r3, [r4, r3, lsl #2]
+	adds	r3, r3, #1
+	beq	.L3544
+	mov	r2, #1640
+	ldr	r1, .L3572+8
+	ldr	r0, .L3572+12
+	bl	printf
+.L3544:
+	movs	r5, #0
+	subs	r4, r4, #4
+	mov	r10, r5
+.L3545:
+	cmp	r10, r7
+	bne	.L3551
+	ldr	r3, .L3572+16
+	ldr	r4, .L3572+20
+	ldr	r3, [r3]
+	tst	r3, #4096
+	beq	.L3552
+	ldrh	r1, [r6]
+	mov	r2, r5
+	ldr	r3, [r4]
+	ldr	r0, .L3572+24
+	ldrh	r3, [r3, r1, lsl #1]
+	bl	printf
+.L3552:
+	ldrh	r2, [r6]
+	ldr	r3, [r4]
+	strh	r5, [r3, r2, lsl #1]	@ movhi
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3551:
+	ldr	r8, [r4, #4]!
+	cmp	r8, #-1
+	beq	.L3546
+	ldr	r3, .L3572+28
+	mov	r0, r8
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	lsls	r1, r1, #7
+	bl	__aeabi_uidiv
+	uxth	r3, r0
+	str	r3, [sp]
+	ldr	r3, .L3572+16
+	ldr	r3, [r3]
+	lsls	r2, r3, #19
+	bpl	.L3547
+	mov	r3, r10
+	mov	r2, r8
+	ldr	r1, [sp]
+	ldr	r0, .L3572+32
+	bl	printf
+.L3547:
+	mov	r8, r4
+	mov	fp, r10
+.L3550:
+	ldr	r0, [r8]
+	adds	r3, r0, #1
+	beq	.L3548
+	ldr	r3, .L3572+28
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	lsls	r1, r1, #7
+	bl	__aeabi_uidiv
+	ldr	r3, [sp]
+	uxth	r0, r0
+	cmp	r3, r0
+	bne	.L3548
+	ldrb	r3, [r6, #9]	@ zero_extendqisi2
+	mov	r0, fp
+	mov	r1, r3
+	str	r3, [sp, #12]
+	bl	__aeabi_idivmod
+	ldr	r3, .L3572+36
+	adds	r1, r1, #8
+	ldrh	r0, [r6, r1, lsl #1]
+	ldrh	r2, [r3]
+	ldr	r3, [sp, #12]
+	muls	r2, r0, r2
+	mov	r1, r3
+	mov	r0, fp
+	str	r2, [sp, #8]
+	bl	__aeabi_idiv
+	ldr	r2, [sp, #8]
+	add	r2, r2, r0
+	ldr	r0, .L3572+40
+	str	r2, [sp, #20]
+	ldr	r1, [r8]
+	bl	pm_ppa_update_check
+	cbz	r0, .L3549
+	ldr	r1, [sp, #4]
+	mov	r3, r7
+	movs	r2, #4
+	ldr	r0, .L3572+44
+	ldr	r1, [r1]
+	bl	rknand_print_hex
+.L3549:
+	adds	r5, r5, #1
+	movs	r2, #1
+	uxth	r5, r5
+	add	r1, sp, #20
+	ldr	r0, [r8]
+	bl	pm_log2phys
+	mov	r3, #-1
+	str	r3, [r8]
+.L3548:
+	add	fp, fp, #1
+	add	r8, r8, #4
+	cmp	r7, fp
+	bne	.L3550
+.L3546:
+	add	r10, r10, #1
+	b	.L3545
+.L3573:
+	.align	2
+.L3572:
+	.word	.LANCHOR85
+	.word	.LANCHOR109
+	.word	.LANCHOR215
+	.word	.LC0
+	.word	.LANCHOR14
+	.word	.LANCHOR9
+	.word	.LC229
+	.word	.LANCHOR123
+	.word	.LC226
+	.word	.LANCHOR103
+	.word	.LC227
+	.word	.LC228
+	.size	ftl_update_l2p_map, .-ftl_update_l2p_map
+	.section	.text.ftl_alloc_new_data_sblk,"ax",%progbits
+	.align	1
+	.global	ftl_alloc_new_data_sblk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_alloc_new_data_sblk, %function
+ftl_alloc_new_data_sblk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	mov	r5, r0
+	ldrh	r6, [r0]
+	bl	ftl_update_l2p_map
+	bl	pm_flush
+	ldrh	r0, [r5]
+	movw	r3, #65535
+	cmp	r0, r3
+	beq	.L3575
+	bl	zftl_insert_data_list
+.L3575:
+	ldr	r4, .L3579
+	mov	r0, r5
+	ldr	r1, [r4]
+	adds	r1, r1, #16
+	cmp	r5, r1
+	ite	eq
+	moveq	r1, #2
+	movne	r1, #3
+	bl	ftl_open_sblk_init
+	ldr	r3, [r4]
+	ldr	r3, [r3, #560]
+	cmp	r3, r6
+	bne	.L3577
+	movw	r5, #65535
+	cmp	r6, r5
+	beq	.L3577
+	mov	r1, r6
+	ldr	r0, .L3579+4
+	bl	printf
+	ldr	r3, [r4]
+	ldr	r0, [r3, #564]
+	bl	gc_mark_bad_ppa
+	ldr	r3, [r4]
+	mov	r2, #-1
+	str	r5, [r3, #560]
+	str	r2, [r3, #564]
+.L3577:
+	bl	ftl_ext_info_flush
+	movs	r0, #0
+	bl	ftl_info_flush
+	bl	lpa_rebuild_hash
+	movs	r0, #0
+	pop	{r4, r5, r6, pc}
+.L3580:
+	.align	2
+.L3579:
+	.word	.LANCHOR10
+	.word	.LC230
+	.size	ftl_alloc_new_data_sblk, .-ftl_alloc_new_data_sblk
+	.section	.text.ftl_write_commit,"ax",%progbits
+	.align	1
+	.global	ftl_write_commit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_write_commit, %function
+ftl_write_commit:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #32
+	ldr	r7, .L3641
+.L3582:
+	ldr	r1, .L3641+4
+	ldrb	r3, [r1]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L3584
+	ldr	r0, .L3641+8
+	subs	r3, r3, #1
+	strb	r3, [r1]
+	ldrb	r2, [r0]	@ zero_extendqisi2
+	str	r2, [sp, #8]
+	add	r2, r2, r2, lsl #1
+	ldr	r4, [sp, #8]
+	add	r2, r7, r2, lsl #4
+	str	r2, [sp, #20]
+	movs	r2, #48
+	muls	r2, r4, r2
+	ldr	r4, .L3641+12
+	ldr	r3, [r4]
+	adds	r5, r7, r2
+	ldrb	r2, [r7, r2]	@ zero_extendqisi2
+	strb	r2, [r0]
+	ldr	r2, [r5, #20]
+	cmp	r2, r3
+	bcc	.L3586
+	mov	r2, #502
+	ldr	r1, .L3641+16
+	ldr	r0, .L3641+20
+	bl	printf
+.L3586:
+	ldr	r2, [sp, #8]
+	movs	r3, #48
+	mla	r3, r3, r2, r7
+	ldr	r2, [r4]
+	ldr	r8, [r3, #20]
+	cmp	r8, r2
+	bcc	.L3587
+	ldr	r0, [sp, #20]
+	bl	buf_free
+	mov	r0, #-1
+.L3581:
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3587:
+	ldr	r2, [r3, #12]
+	ldr	fp, [r3, #4]
+	ldrb	r4, [r3, #41]	@ zero_extendqisi2
+	ldrb	r3, [r3, #40]	@ zero_extendqisi2
+	str	r2, [sp, #12]
+	str	r3, [sp, #16]
+	ldr	r3, .L3641+24
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L3589
+	ldr	r3, .L3641+28
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	add	r3, r7, r3, lsl #4
+.L3590:
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	cmp	r2, #255
+	bne	.L3591
+	ldr	r2, [r3, #20]
+	cmp	r8, r2
+	bne	.L3589
+	ldr	r0, [r3, #4]
+	lsls	r4, r4, #9
+	ldr	r3, [sp, #16]
+	add	r1, fp, r4
+	add	r0, r0, r4
+	lsls	r2, r3, #9
+	bl	ftl_memcpy
+	ldr	r0, [sp, #20]
+	bl	buf_free
+	b	.L3582
+.L3591:
+	add	r2, r2, r2, lsl #1
+	add	r3, r7, r2, lsl #4
+	b	.L3590
+.L3589:
+	mov	r0, r8
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #28]
+	adds	r0, r0, #1
+	bne	.L3593
+	movs	r2, #0
+	add	r1, sp, #28
+	mov	r0, r8
+	bl	pm_log2phys
+.L3593:
+	ldr	r3, .L3641+32
+	ldr	r2, .L3641
+	ldr	r6, [r3]
+	movs	r3, #0
+	adds	r6, r6, #16
+.L3596:
+	ldr	r1, [r2, #20]
+	cmp	r8, r1
+	bne	.L3594
+	ldrb	r1, [r2, #2]	@ zero_extendqisi2
+	lsls	r0, r1, #28
+	bpl	.L3594
+	movs	r2, #48
+	bic	r1, r1, #8
+	mla	r3, r2, r3, r7
+	strb	r1, [r3, #2]
+	ldr	r5, [r3, #4]
+	ldr	r3, [r3, #24]
+	str	r3, [sp, #28]
+.L3595:
+	ldr	r10, .L3641+36
+	ldr	r2, [sp, #16]
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	cmp	r2, r3
+	bcs	.L3620
+	cbz	r5, .L3598
+	cbz	r4, .L3599
+	lsls	r2, r4, #9
+	mov	r1, r5
+	mov	r0, fp
+	bl	ftl_memcpy
+	ldr	r3, .L3641+32
+	ldr	r6, [r3]
+	adds	r6, r6, #48
+.L3599:
+	ldr	r3, [sp, #16]
+	ldrb	r2, [r10]	@ zero_extendqisi2
+	add	r4, r4, r3
+	cmp	r4, r2
+	bcc	.L3600
+	ldr	r3, .L3641+32
+	ldr	r6, [r3]
+	adds	r6, r6, #16
+.L3620:
+	mov	r10, #0
+	b	.L3597
+.L3594:
+	adds	r3, r3, #1
+	adds	r2, r2, #48
+	cmp	r3, #32
+	bne	.L3596
+	movs	r5, #0
+	b	.L3595
+.L3600:
+	lsls	r0, r4, #9
+	subs	r2, r2, r4
+	lsls	r2, r2, #9
+	adds	r1, r5, r0
+	add	r0, r0, fp
+	bl	ftl_memcpy
+	b	.L3620
+.L3642:
+	.align	2
+.L3641:
+	.word	.LANCHOR50
+	.word	.LANCHOR58
+	.word	.LANCHOR57
+	.word	.LANCHOR120
+	.word	.LANCHOR216
+	.word	.LC0
+	.word	.LANCHOR121
+	.word	.LANCHOR174
+	.word	.LANCHOR10
+	.word	.LANCHOR123
+.L3598:
+	ldr	r3, [sp, #28]
+	adds	r3, r3, #1
+	beq	.L3601
+	movs	r0, #1
+	bl	buf_alloc
+	ldr	r3, [sp, #28]
+	mov	r5, r0
+	str	r8, [r0, #20]
+	movs	r1, #1
+	str	r3, [r0, #24]
+	bl	sblk_read_page
+	ldr	r3, [r5, #12]
+	ldr	r2, [r3, #12]
+	ldr	r3, [r3, #4]
+	add	r10, r2, #1
+	cmp	r8, r3
+	bne	.L3602
+	ldr	r3, [r5, #36]
+	adds	r3, r3, #1
+	bne	.L3603
+.L3602:
+	ldr	r3, .L3643
+	ldr	r0, .L3643+4
+	ldr	r2, [r3]
+	ldr	r3, [r2, #552]
+	adds	r3, r3, #1
+	str	r3, [r2, #552]
+	ldr	r3, [r5, #36]
+	ldrb	r1, [r5, #1]	@ zero_extendqisi2
+	ldr	r2, [sp, #28]
+	str	r3, [sp]
+	mov	r3, r8
+	bl	printf
+	movs	r3, #4
+	ldr	r1, [r5, #12]
+	mov	r2, r3
+	ldr	r0, .L3643+8
+	bl	rknand_print_hex
+.L3603:
+	ldr	r3, [r5, #12]
+	ldr	r3, [r3, #4]
+	cmp	r8, r3
+	bne	.L3604
+	ldr	r3, [r5, #36]
+	adds	r3, r3, #1
+	bne	.L3605
+.L3604:
+	movw	r2, #573
+	ldr	r1, .L3643+12
+	ldr	r0, .L3643+16
+	bl	printf
+.L3605:
+	cbz	r4, .L3606
+	ldr	r3, [sp, #28]
+	lsls	r2, r4, #9
+	adds	r3, r3, #1
+	beq	.L3607
+	ldr	r1, [r5, #4]
+	mov	r0, fp
+	bl	ftl_memcpy
+.L3608:
+	ldr	r3, .L3643
+	ldr	r6, [r3]
+	adds	r6, r6, #48
+.L3606:
+	ldr	r3, [sp, #16]
+	add	r4, r4, r3
+	ldr	r3, .L3643+20
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	cmp	r4, r2
+	bcc	.L3609
+	bls	.L3610
+	ldr	r3, .L3643
+	ldr	r6, [r3]
+	adds	r6, r6, #16
+.L3610:
+	cbz	r5, .L3597
+	ldrb	r3, [r5, #2]	@ zero_extendqisi2
+	mov	r1, r5
+	ldr	r0, .L3643+24
+	bic	r3, r3, #8
+	strb	r3, [r5, #2]
+	bl	buf_remove_buf
+	mov	r0, r5
+	bl	buf_free
+.L3597:
+	ldrh	r3, [r6, #6]
+	cbnz	r3, .L3612
+	bl	ftl_flush
+	mov	r0, r6
+	bl	ftl_alloc_new_data_sblk
+.L3612:
+	mov	r0, r6
+	bl	ftl_get_new_free_page
+	ldr	r2, [sp, #8]
+	movs	r3, #48
+	ldr	r4, [sp, #12]
+	muls	r3, r2, r3
+	adds	r2, r7, r3
+	ldr	r1, [r2, #16]
+	str	r8, [r4, #4]
+	str	r10, [r4, #12]
+	str	r1, [r4]
+	ldr	r1, [sp, #28]
+	str	r1, [r4, #8]
+	str	r1, [r2, #28]
+	movs	r1, #255
+	strb	r1, [r7, r3]
+	ldrb	r3, [r2, #2]	@ zero_extendqisi2
+	ldrh	r1, [r6, #12]
+	str	r0, [r2, #24]
+	orr	r3, r3, #10
+	ldr	r0, .L3643+28
+	strb	r3, [r2, #2]
+	ldrh	r3, [r6, #10]
+	add	r3, r3, r1
+	ldr	r1, [sp, #20]
+	subs	r3, r3, #1
+	strh	r3, [r2, #32]	@ movhi
+	bl	buf_add_tail
+	ldr	r2, .L3643+32
+	movs	r1, #0
+	ldrb	r3, [r2]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	strb	r3, [r2]
+	cmp	r3, #2
+	ldr	r2, .L3643+36
+	str	r1, [r2]
+	ldrh	r2, [r6, #6]
+	bhi	.L3613
+	cmp	r2, #1
+	bne	.L3585
+.L3613:
+	ldr	r5, .L3643+28
+	mov	ip, #48
+	ldrb	r1, [r6, #5]	@ zero_extendqisi2
+	ldrb	r0, [r5]	@ zero_extendqisi2
+	cmp	r1, #0
+	mov	r1, #0
+	ite	ne
+	movne	r4, #2
+	moveq	r4, #1
+	cmp	r2, #1
+	it	eq
+	moveq	r4, r3
+	mov	r2, r0
+.L3617:
+	cmp	r1, r4
+	bne	.L3618
+	strb	r2, [r5]
+	uxtb	r1, r1
+	ldr	r2, .L3643+32
+	add	r0, r0, r0, lsl #1
+	subs	r3, r3, r1
+	add	r0, r7, r0, lsl #4
+	strb	r3, [r2]
+	bl	sblk_prog_page
+	ldrh	r3, [r6, #6]
+	cmp	r3, #1
+	bne	.L3585
+	bl	sblk_wait_write_queue_completed
+	bl	ftl_write_completed
+	mov	r0, r6
+	bl	ftl_write_last_log_page
+	mov	r0, r6
+	bl	ftl_alloc_new_data_sblk
+.L3585:
+	ldr	r3, .L3643+40
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L3582
+.L3584:
+	bl	ftl_write_completed
+	movs	r0, #0
+	b	.L3581
+.L3609:
+	ldr	r3, [sp, #28]
+	subs	r2, r2, r4
+	lsls	r2, r2, #9
+	lsls	r0, r4, #9
+	adds	r3, r3, #1
+	beq	.L3611
+	ldr	r1, [r5, #4]
+	add	r1, r1, r0
+	add	r0, r0, fp
+	bl	ftl_memcpy
+	b	.L3610
+.L3611:
+	movs	r1, #0
+	add	r0, r0, fp
+	bl	ftl_memset
+	b	.L3610
+.L3618:
+	mul	r2, ip, r2
+	adds	r1, r1, #1
+	ldrb	r2, [r7, r2]	@ zero_extendqisi2
+	b	.L3617
+.L3619:
+	lsls	r2, r4, #9
+	mov	r10, r5
+.L3607:
+	movs	r1, #0
+	mov	r0, fp
+	bl	ftl_memset
+	b	.L3608
+.L3601:
+	cmp	r4, #0
+	bne	.L3619
+	mov	r10, r4
+	mov	r5, r4
+	b	.L3606
+.L3644:
+	.align	2
+.L3643:
+	.word	.LANCHOR10
+	.word	.LC231
+	.word	.LC189
+	.word	.LANCHOR216
+	.word	.LC0
+	.word	.LANCHOR123
+	.word	.LANCHOR129
+	.word	.LANCHOR174
+	.word	.LANCHOR121
+	.word	.LANCHOR217
+	.word	.LANCHOR58
+	.size	ftl_write_commit, .-ftl_write_commit
+	.section	.text.gc_do_copy_back,"ax",%progbits
+	.align	1
+	.global	gc_do_copy_back
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_do_copy_back, %function
+gc_do_copy_back:
+	@ args = 0, pretend = 0, frame = 48
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L3742
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #72
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	cmp	r0, #0
+	bne	.L3646
+	bl	buf_alloc
+	mov	r4, r0
+	cmp	r0, #0
+	beq	.L3645
+	ldr	r6, .L3742+4
+	ldrh	r2, [r6, #22]
+	mov	r0, r2
+	bl	gc_get_src_ppa_from_index
+	movs	r1, #1
+	adds	r2, r2, #1
+	str	r0, [r4, #24]
+	mov	r7, r0
+	mov	r0, r4
+	strh	r2, [r6, #22]	@ movhi
+	bl	sblk_read_page
+	ldr	r3, [r4, #36]
+	adds	r1, r3, #1
+	beq	.L3648
+	cmp	r3, #512
+	bne	.L3649
+.L3648:
+	mov	r2, #732
+	ldr	r1, .L3742+8
+	ldr	r0, .L3742+12
+	bl	printf
+.L3649:
+	ldr	r3, [r4, #12]
+	ldr	r5, [r3, #4]
+	mov	r0, r5
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #48]
+	adds	r0, r0, #1
+	bne	.L3650
+	movs	r2, #0
+	add	r1, sp, #48
+	mov	r0, r5
+	bl	pm_log2phys
+.L3650:
+	ldr	r8, [sp, #48]
+	cmp	r7, r8
+	bne	.L3651
+	ldr	r0, .L3742+16
+	movs	r3, #0
+.L3654:
+	adds	r2, r0, r3
+	ldr	r1, [r2, #20]
+	cmp	r5, r1
+	bne	.L3652
+	ldrb	r2, [r2, #2]	@ zero_extendqisi2
+	lsls	r2, r2, #30
+	bpl	.L3652
+	mov	r0, r4
+	bl	buf_free
+	ldr	r3, .L3742+20
+	ldr	r3, [r3]
+	lsls	r1, r3, #23
+	bpl	.L3645
+	ldrh	r3, [r6, #22]
+	mov	r2, r7
+	mov	r1, r5
+	ldr	r0, .L3742+24
+	bl	printf
+.L3645:
+	add	sp, sp, #72
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3652:
+	adds	r3, r3, #48
+	cmp	r3, #1536
+	bne	.L3654
+	movs	r3, #0
+	str	r5, [r4, #20]
+	strb	r3, [r4, #41]
+	ldr	r3, .L3742+28
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	strb	r3, [r4, #40]
+	ldrb	r3, [r4, #2]	@ zero_extendqisi2
+	orr	r3, r3, #10
+	strb	r3, [r4, #2]
+	ldr	r3, [r4, #12]
+	ldr	r3, [r3]
+	str	r3, [r4, #16]
+	ldr	r3, .L3742+20
+	ldr	r3, [r3]
+	lsls	r2, r3, #23
+	bpl	.L3655
+	mov	r0, r5
+	bl	lpa_hash_get_ppa
+	ldrh	r3, [r6, #22]
+	mov	r2, r8
+	str	r7, [sp]
+	mov	r1, r5
+	str	r3, [sp, #4]
+	mov	r3, r0
+	ldr	r0, .L3742+32
+	bl	printf
+.L3655:
+	mov	r0, r4
+	bl	ftl_gc_write_buf
+	bl	ftl_write_commit
+	ldr	r3, .L3742+36
+	ldr	r2, [r3]
+	ldr	r3, [r2, #60]
+	adds	r3, r3, #1
+	str	r3, [r2, #60]
+	ldrh	r3, [r6, #24]
+	adds	r3, r3, #1
+	strh	r3, [r6, #24]	@ movhi
+	b	.L3645
+.L3651:
+	ldr	r3, .L3742+20
+	ldr	r3, [r3]
+	lsls	r3, r3, #23
+	bpl	.L3656
+	mov	r0, r5
+	bl	lpa_hash_get_ppa
+	ldrh	r3, [r6, #22]
+	mov	r2, r8
+	str	r7, [sp]
+	mov	r1, r5
+	str	r3, [sp, #4]
+	mov	r3, r0
+	ldr	r0, .L3742+32
+	bl	printf
+.L3656:
+	mov	r0, r4
+	bl	buf_free
+	b	.L3645
+.L3646:
+	ldr	r3, .L3742+40
+	ldr	r5, .L3742+4
+	ldr	r3, [r3]
+	str	r3, [sp, #28]
+	ldr	r3, .L3742+44
+	ldrb	r8, [r3]	@ zero_extendqisi2
+	ldr	r3, [sp, #28]
+	cmp	r8, #3
+	ldrb	r7, [r3, #89]	@ zero_extendqisi2
+	bne	.L3657
+	ldr	r3, .L3742+48
+	ldrh	r4, [r5, #310]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L3658
+	add	r1, r7, r7, lsl #1
+	mov	r0, r4
+	bl	__aeabi_idiv
+	uxth	r10, r0
+	sub	r0, r7, r7, lsl #2
+	str	r8, [sp, #32]
+	smulbb	r0, r0, r10
+	add	r0, r0, r4
+	uxth	fp, r0
+.L3659:
+	ldr	r3, [sp, #32]
+	muls	r3, r7, r3
+	str	r3, [sp, #36]
+	ldr	r3, .L3742+52
+	ldrh	r1, [r3]
+	ldr	r3, .L3742+56
+	ldr	r8, [r3]
+	muls	r1, r7, r1
+	ldrh	r3, [r5, #20]
+	movs	r7, #0
+	str	r3, [sp, #40]
+	subs	r1, r1, #1
+	ldr	r3, .L3742+4
+.L3662:
+	ldr	r0, [sp, #36]
+	uxth	r2, r7
+	cmp	r2, r0
+	blt	.L3664
+.L3696:
+	movs	r6, #1
+	b	.L3660
+.L3658:
+	mov	r0, r4
+	mov	r1, r7
+	bl	__aeabi_idiv
+	ldr	r3, .L3742+60
+	str	r8, [sp, #32]
+	ldrh	r6, [r3, r0, lsl #1]
+	smulbb	r0, r0, r7
+	subs	r0, r4, r0
+	lsr	r10, r6, #3
+	uxth	fp, r0
+	mla	r4, r7, r10, fp
+	and	r6, r6, #7
+	cmp	r6, #1
+	add	r4, r4, r4, lsl #1
+	uxth	r4, r4
+	beq	.L3659
+.L3660:
+	ldr	r3, .L3742+20
+	ldr	r3, [r3]
+	lsls	r0, r3, #23
+	bpl	.L3665
+	ldr	r3, .L3742+56
+	mov	r2, r6
+	str	r4, [sp, #8]
+	mov	r1, r10
+	ldr	r0, .L3742+64
+	ldr	r3, [r3]
+	ldr	r3, [r3, r4, lsl #2]
+	str	r3, [sp, #4]
+	ldrh	r3, [r5, #310]
+	str	r3, [sp]
+	mov	r3, fp
+	bl	printf
+.L3665:
+	movs	r3, #0
+.L3740:
+	str	r3, [sp, #40]
+	ldrh	r3, [sp, #40]
+	mov	r8, r3
+	str	r3, [sp, #36]
+	ldr	r3, [sp, #28]
+	ldrb	r1, [r3, #89]	@ zero_extendqisi2
+	ldr	r3, [sp, #32]
+	mul	r0, r1, r3
+	cmp	r8, r0
+	blt	.L3681
+	ldr	r3, .L3742+44
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #3
+	bne	.L3682
+	ldr	r3, .L3742+48
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	ldr	r3, [sp, #48]
+	cmp	r2, #0
+	beq	.L3683
+	movs	r2, #0
+.L3686:
+	strb	r2, [r3, #44]
+	add	r0, sp, #48
+	mov	r2, r1
+	add	r1, sp, #60
+	bl	sblk_xlc_prog_pages
+.L3687:
+	ldr	r3, [sp, #28]
+	ldr	r1, .L3742+48
+	ldrb	r2, [r3, #89]	@ zero_extendqisi2
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	uxth	r3, r2
+	cmp	r1, #0
+	beq	.L3692
+	add	r3, r3, r3, lsl #1
+.L3693:
+	ldr	r1, .L3742+36
+	ldr	r0, [r1]
+	ldr	r1, [r0, #52]
+	add	r1, r1, r3
+	str	r1, [r0, #52]
+	ldr	r1, .L3742+4
+	ldrh	r0, [r1, #310]
+	add	r3, r3, r0
+	uxth	r3, r3
+	strh	r3, [r1, #310]	@ movhi
+	ldr	r1, .L3742+52
+	ldrh	r1, [r1]
+	muls	r2, r1, r2
+	cmp	r3, r2
+	itttt	ge
+	ldrge	r3, .L3742+40
+	movge	r2, #0
+	ldrge	r3, [r3]
+	strhge	r2, [r3, #86]	@ movhi
+	bl	gc_write_completed
+	b	.L3645
+.L3657:
+	ldr	r3, .L3742+68
+	mov	r1, r7
+	ldrh	r4, [r5, #310]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	mov	r0, r4
+	cbnz	r3, .L3661
+	bl	__aeabi_idiv
+	uxth	r10, r0
+	movs	r3, #1
+	smulbb	r0, r7, r10
+	subs	r0, r4, r0
+	uxth	fp, r0
+.L3738:
+	str	r3, [sp, #32]
+	b	.L3659
+.L3661:
+	bl	__aeabi_idiv
+	uxth	r10, r0
+	movs	r3, #2
+	smulbb	r0, r7, r10
+	subs	r0, r4, r0
+	uxth	fp, r0
+	b	.L3738
+.L3743:
+	.align	2
+.L3742:
+	.word	.LANCHOR76
+	.word	.LANCHOR63
+	.word	.LANCHOR218
+	.word	.LC0
+	.word	.LANCHOR50
+	.word	.LANCHOR14
+	.word	.LC232
+	.word	.LANCHOR123
+	.word	.LC233
+	.word	.LANCHOR102
+	.word	.LANCHOR10
+	.word	.LANCHOR71
+	.word	.LANCHOR75
+	.word	.LANCHOR77
+	.word	.LANCHOR153
+	.word	.LANCHOR219
+	.word	.LC234
+	.word	.LANCHOR72
+.L3664:
+	add	r2, r2, r4
+	cmp	r2, r1
+	beq	.L3696
+	ldr	r0, [r8, r2, lsl #2]
+	adds	r0, r0, #1
+	bne	.L3663
+	ldrh	r6, [r3, #22]
+	str	r3, [sp, #44]
+	ldr	r3, [sp, #40]
+	cmp	r6, r3
+	bcs	.L3645
+	mov	r0, r6
+	adds	r6, r6, #1
+	bl	gc_get_src_ppa_from_index
+	ldr	r3, [sp, #44]
+	strh	r6, [r3, #22]	@ movhi
+	str	r0, [r8, r2, lsl #2]
+.L3663:
+	adds	r7, r7, #1
+	b	.L3662
+.L3681:
+	ldr	r3, .L3744
+	add	r7, r4, r8
+	ldr	r3, [r3]
+	ldrb	r3, [r3, r7]	@ zero_extendqisi2
+	cmp	r3, #255
+	bne	.L3667
+	movs	r0, #0
+	bl	buf_alloc
+	mov	r5, r0
+	cbnz	r0, .L3668
+	bl	sblk_wait_write_queue_completed
+	bl	ftl_write_completed
+	bl	gc_write_completed
+	bl	gc_free_temp_buf
+	mov	r0, r5
+	bl	buf_alloc
+	mov	r5, r0
+	cmp	r0, #0
+	beq	.L3645
+.L3668:
+	ldr	r3, .L3744
+	ldrb	r2, [r5, #1]	@ zero_extendqisi2
+	ldr	r3, [r3]
+	strb	r2, [r3, r7]
+	ldr	r2, .L3744+4
+	strb	r6, [r5, #45]
+	ldrb	r3, [r2, #7]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	strb	r3, [r2, #7]
+	ldr	r3, [sp, #36]
+	add	r3, r3, r4
+	strh	r3, [r5, #32]	@ movhi
+	ldr	r3, .L3744+8
+	ldrh	r2, [r3]
+	ldr	r3, [sp, #28]
+	ldrb	r3, [r3, #89]	@ zero_extendqisi2
+	muls	r3, r2, r3
+	subs	r3, r3, #1
+	cmp	r7, r3
+	bne	.L3669
+	ldr	r3, .L3744+12
+	ldr	r0, [r5, #4]
+	ldr	r1, [r3]
+	mov	r3, #-1
+	str	r3, [r1, r7, lsl #2]
+	ldr	r3, .L3744+16
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	muls	r2, r3, r2
+	lsls	r2, r2, #2
+	bl	ftl_memcpy
+	ldr	r3, .L3744+8
+	ldr	r2, .L3744+16
+	ldr	r0, [r5, #4]
+	ldrh	r3, [r3]
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	muls	r2, r3, r2
+	ldr	r3, .L3744+20
+	ldr	r1, [r3]
+	lsls	r2, r2, #2
+	add	r0, r0, r2
+	bl	ftl_memcpy
+	ldr	r3, .L3744+24
+	movs	r1, #0
+	ldr	r0, [r5, #12]
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	lsls	r2, r2, #1
+	bl	ftl_memset
+	ldr	r3, [r5, #12]
+	ldr	r2, .L3744+28
+	ldr	r0, [r5, #4]
+	str	r3, [sp, #44]
+	str	r2, [r3]
+	ldr	r3, .L3744+8
+	ldrh	r2, [r3]
+	ldr	r3, .L3744+16
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	muls	r1, r2, r1
+	lsls	r1, r1, #2
+	bl	js_hash
+	ldr	r2, .L3744+32
+	ldr	r3, [sp, #44]
+	ldr	r2, [r2]
+	str	r0, [r3, #4]
+	ldr	r2, [r2, #132]
+.L3739:
+	str	r2, [r3, #8]
+.L3667:
+	ldr	r3, .L3744
+	ldr	r2, .L3744+36
+	ldr	ip, [r3]
+	add	r3, sp, #72
+	add	r1, r3, r8, lsl #2
+	ldrb	r5, [ip, r7]	@ zero_extendqisi2
+	add	r3, r5, r5, lsl #1
+	add	r3, r2, r3, lsl #4
+	str	r3, [r1, #-24]
+	movs	r3, #48
+	mla	r2, r3, r5, r2
+	movs	r3, #2
+	strh	r3, [r2, #34]	@ movhi
+	ldr	r3, .L3744+40
+	strb	r6, [r2, #45]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #3
+	bne	.L3676
+	ldr	r3, [sp, #36]
+	ldr	r0, .L3744+44
+	umull	r0, r1, r3, r0
+	ldr	r0, [sp, #28]
+	lsrs	r3, r1, #1
+	uxtah	r1, fp, r3
+	add	r3, r3, r3, lsl #1
+	add	r1, r0, r1, lsl #1
+	ldrh	r0, [r1, #96]
+	ldr	r1, .L3744+48
+	ldrh	r1, [r1]
+	muls	r1, r0, r1
+	ldrh	r0, [r2, #32]
+	orr	r1, r1, r10
+	str	r1, [r2, #24]
+	ldr	r2, .L3744+52
+	ldr	lr, [r2]
+	ldr	r2, [sp, #36]
+	subs	r3, r2, r3
+	lsls	r3, r3, #24
+	add	r3, r3, #16777216
+	orrs	r1, r1, r3
+	str	r1, [lr, r0, lsl #2]
+.L3677:
+	ldr	r3, .L3744+56
+	ldr	r3, [r3]
+	lsls	r3, r3, #23
+	bpl	.L3680
+	ldr	r3, .L3744+4
+	movs	r2, #48
+	ldr	r0, .L3744+60
+	ldrb	r1, [r3, #6]	@ zero_extendqisi2
+	ldr	r3, .L3744+36
+	mla	r5, r2, r5, r3
+	ldr	r2, .L3744+44
+	ldr	r3, [r5, #12]
+	ldr	r3, [r3, #4]
+	str	r3, [sp, #20]
+	ldr	r3, [sp, #36]
+	umull	r2, r3, r3, r2
+	mov	r2, r6
+	ubfx	r3, r3, #1, #16
+	add	r3, r3, fp
+	str	r3, [sp, #16]
+	ldrb	r3, [r5, #1]	@ zero_extendqisi2
+	str	r3, [sp, #12]
+	ldrh	r3, [r5, #32]
+	str	r3, [sp, #8]
+	ldr	r3, [r5, #24]
+	str	r3, [sp, #4]
+	ldrb	r3, [ip, r7]	@ zero_extendqisi2
+	str	r3, [sp]
+	mov	r3, r1
+	mov	r1, r8
+	bl	printf
+.L3680:
+	ldr	r3, [sp, #40]
+	adds	r3, r3, #1
+	b	.L3740
+.L3669:
+	ldr	r3, .L3744+20
+	movs	r1, #1
+	mov	r0, r5
+	ldr	r3, [r3]
+	ldr	r3, [r3, r7, lsl #2]
+	str	r3, [r5, #24]
+	bl	sblk_read_page
+	ldr	r3, [r5, #36]
+	adds	r1, r3, #1
+	beq	.L3670
+	cmp	r3, #512
+	bne	.L3674
+.L3670:
+	ldr	r3, .L3744+64
+	ldrh	r2, [r3]
+	movs	r3, #1
+	rsb	r0, r2, #21
+	lsls	r3, r3, r0
+	ldr	r0, [r5, #24]
+	subs	r3, r3, #1
+	lsrs	r0, r0, r2
+	ldr	r2, .L3744+68
+	ands	r0, r0, r3
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	movs	r1, #0
+	uxth	r0, r0
+	bl	ftl_sblk_dump
+	ldr	r3, [r5, #36]
+	adds	r2, r3, #1
+	beq	.L3672
+	cmp	r3, #512
+	bne	.L3674
+.L3672:
+	ldr	r3, [r5, #12]
+	mov	r2, #-1
+	str	r2, [r3, #4]
+	ldr	r3, [r5, #36]
+	cmp	r3, r2
+	beq	.L3673
+	cmp	r3, #512
+	bne	.L3674
+.L3673:
+	movw	r2, #847
+	ldr	r1, .L3744+72
+	ldr	r0, .L3744+76
+	bl	printf
+.L3674:
+	ldr	r3, [r5, #12]
+	ldr	r2, .L3744+80
+	ldr	r1, [r3, #4]
+	ldr	r2, [r2]
+	cmp	r1, r2
+	itt	cs
+	movcs	r2, #-1
+	strcs	r2, [r3, #4]
+	ldr	r2, .L3744+12
+	ldr	r1, [r3, #4]
+	ldr	r2, [r2]
+	str	r1, [r2, r7, lsl #2]
+	ldr	r2, [r5, #24]
+	b	.L3739
+.L3676:
+	cmp	r3, #2
+	bne	.L3678
+	ldr	r3, .L3744+84
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L3679
+	ldr	r1, [sp, #28]
+	add	r3, r8, fp
+	add	r3, r1, r3, lsl #1
+	ldr	r1, .L3744+48
+	ldrh	r3, [r3, #96]
+	ldrh	r1, [r1]
+	mla	r3, r1, r3, r10
+.L3741:
+	orr	r3, r3, #33554432
+	str	r3, [r2, #24]
+.L3678:
+	ldr	r2, .L3744+36
+	movs	r3, #48
+	mla	r3, r3, r5, r2
+	ldr	r1, [r3, #24]
+	ldrh	r2, [r3, #32]
+	ldr	r3, .L3744+52
+	ldr	r3, [r3]
+	str	r1, [r3, r2, lsl #2]
+	b	.L3677
+.L3679:
+	ldr	r3, [sp, #36]
+	ldr	r1, [sp, #28]
+	add	r3, fp, r3, lsr #1
+	add	r3, r1, r3, lsl #1
+	ldr	r1, .L3744+48
+	ldrh	r3, [r3, #96]
+	ldrh	r1, [r1]
+	mla	r3, r1, r3, r10
+	ldr	r1, [sp, #36]
+	and	r1, r1, #1
+	add	r3, r3, r1
+	b	.L3741
+.L3683:
+	cmp	r6, #1
+	bne	.L3685
+	movs	r2, #9
+	b	.L3686
+.L3685:
+	cmp	r6, #2
+	it	eq
+	moveq	r2, #13
+	b	.L3686
+.L3745:
+	.align	2
+.L3744:
+	.word	.LANCHOR74
+	.word	.LANCHOR63
+	.word	.LANCHOR77
+	.word	.LANCHOR152
+	.word	.LANCHOR78
+	.word	.LANCHOR153
+	.word	.LANCHOR123
+	.word	-178307901
+	.word	.LANCHOR10
+	.word	.LANCHOR50
+	.word	.LANCHOR71
+	.word	-1431655765
+	.word	.LANCHOR103
+	.word	.LANCHOR154
+	.word	.LANCHOR14
+	.word	.LC235
+	.word	.LANCHOR66
+	.word	.LANCHOR67
+	.word	.LANCHOR218
+	.word	.LC0
+	.word	.LANCHOR120
+	.word	.LANCHOR72
+.L3682:
+	ldr	r3, .L3746
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L3688
+	ldr	r3, .L3746+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L3689
+.L3688:
+	subs	r0, r0, #1
+.L3690:
+	uxth	r2, r3
+	adds	r3, r3, #1
+	cmp	r2, r0
+	blt	.L3691
+	add	r3, sp, #72
+	movs	r2, #255
+	add	r0, r3, r0, lsl #2
+	ldr	r3, [r0, #-24]
+	strb	r2, [r3]
+	ldrh	r3, [sp, #32]
+	ldr	r0, [sp, #48]
+	smulbb	r1, r3, r1
+	uxtb	r1, r1
+	bl	sblk_prog_page
+	b	.L3687
+.L3689:
+	add	r0, sp, #48
+	bl	sblk_3d_mlc_prog_pages
+	b	.L3687
+.L3691:
+	add	r4, sp, #72
+	add	r5, sp, #72
+	add	r4, r4, r2, lsl #2
+	add	r2, r5, r2, lsl #2
+	ldr	r2, [r2, #-20]
+	ldr	r4, [r4, #-24]
+	ldrb	r2, [r2, #1]	@ zero_extendqisi2
+	strb	r2, [r4]
+	b	.L3690
+.L3692:
+	ldr	r1, .L3746
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	cmp	r1, #0
+	beq	.L3693
+	lsls	r3, r3, #1
+	uxth	r3, r3
+	b	.L3693
+.L3747:
+	.align	2
+.L3746:
+	.word	.LANCHOR72
+	.word	.LANCHOR73
+	.size	gc_do_copy_back, .-gc_do_copy_back
+	.section	.text.zftl_do_gc,"ax",%progbits
+	.align	1
+	.global	zftl_do_gc
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	zftl_do_gc, %function
+zftl_do_gc:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L3924
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #48
+	ldr	r4, .L3924+4
+	ldrh	r7, [r3]
+	ldr	r3, .L3924+8
+	ldr	r2, .L3924+12
+	str	r0, [sp, #32]
+	ldrh	r6, [r3]
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	mov	r8, r2
+	ldr	r5, [r2]
+	add	r6, r6, r7
+	uxth	r6, r6
+	cmp	r3, #6
+	bhi	.L3856
+	tbh	[pc, r3, lsl #1]
+.L3751:
+	.2byte	(.L3750-.L3751)/2
+	.2byte	(.L3752-.L3751)/2
+	.2byte	(.L3753-.L3751)/2
+	.2byte	(.L3754-.L3751)/2
+	.2byte	(.L3755-.L3751)/2
+	.2byte	(.L3756-.L3751)/2
+	.2byte	(.L3757-.L3751)/2
+	.p2align 1
+.L3756:
+	ldr	r5, .L3924+16
+	movs	r7, #0
+.L3758:
+	bl	gc_check_data_one_wl
+	mov	r10, r0
+	cmp	r0, #0
+	beq	.L3852
+	ldr	r3, [r8]
+	movs	r6, #0
+	strh	r6, [r5, #52]	@ movhi
+	ldrh	r0, [r3, #80]
+	bl	ftl_free_sblk
+	ldr	r1, .L3924+20
+	movw	r3, #65535
+	ldr	r2, [r8]
+	ldr	r0, [r5, #8]
+	ldr	r1, [r1]
+	strh	r3, [r2, #80]	@ movhi
+	strh	r3, [r1, #126]	@ movhi
+	strh	r3, [r2, #130]	@ movhi
+	bl	buf_free
+	str	r6, [r5, #8]
+	strb	r6, [r4]
+	b	.L3921
+.L3750:
+	ldr	r3, .L3924+24
+	ldr	r1, .L3924+28
+	ldr	r2, .L3924+32
+	ldrh	r3, [r3]
+	str	r1, [sp, #36]
+	ldrh	r0, [r2]
+	add	r7, r7, r3
+	ldrh	r3, [r1]
+	uxth	r7, r7
+	str	r2, [sp, #40]
+	add	r3, r3, r0
+	ldrh	r0, [r5, #80]
+	uxth	r3, r3
+	str	r3, [sp, #28]
+	movw	r3, #65535
+	cmp	r0, r3
+	beq	.L3759
+	ldr	r3, [sp, #32]
+	cbnz	r3, .L3760
+	ldr	r3, .L3924+36
+	ldrh	r3, [r3]
+	cmp	r6, r3, lsl #1
+	blt	.L3760
+.L3856:
+	movs	r5, #16
+	b	.L3748
+.L3760:
+	ldr	r10, .L3924+84
+	movs	r1, #5
+	ldr	fp, .L3924+72
+	ldrh	r0, [r10]
+	adds	r0, r0, #1
+	uxth	r0, r0
+	strh	r0, [r10]	@ movhi
+	bl	zftl_get_gc_node
+	movw	r3, #65535
+	mov	ip, r10
+	cmp	r0, r3
+	beq	.L3761
+	ldr	r1, .L3924+40
+	ldr	lr, .L3924+80
+	ldr	r2, .L3924+44
+	ldr	r1, [r1]
+	ldrh	lr, [lr]
+	ldr	r3, [r2]
+	mov	r10, r2
+	ldrh	r1, [r1, r0, lsl #1]
+	adds	r3, r3, #1
+	cmp	lr, r1
+	str	r3, [r2]
+	bcs	.L3762
+	ldr	r2, .L3924+48
+	ldrh	r2, [r2]
+	cmp	r3, r2, lsr #4
+	bls	.L3761
+	ldr	r3, .L3924+52
+	ldrh	r3, [r3]
+	cmp	r3, r1
+	bls	.L3761
+.L3762:
+	ldrb	r2, [fp]	@ zero_extendqisi2
+	movs	r1, #0
+	bl	gc_add_sblk
+	cbz	r0, .L3763
+	movs	r3, #1
+	strb	r3, [r4]
+	movs	r3, #0
+	str	r3, [r10]
+	b	.L3856
+.L3761:
+	movs	r3, #0
+	strh	r3, [ip]	@ movhi
+.L3763:
+	cmp	r7, #15
+	bls	.L3858
+	ldr	r3, .L3924+56
+	ldrh	r2, [r3]
+	ldr	r3, .L3924+60
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bhi	.L3858
+	ldr	r3, [sp, #28]
+	cmp	r3, #0
+	ite	eq
+	moveq	r10, #2
+	movne	r10, #1
+.L3764:
+	ldr	r3, .L3924+64
+	ldr	r3, [r3]
+	lsls	r3, r3, #23
+	bpl	.L3765
+	ldr	r3, [r8]
+	ldrh	r1, [r5, #80]
+	ldrb	r2, [fp]	@ zero_extendqisi2
+	ldr	r0, .L3924+68
+	str	r1, [sp, #16]
+	ldrh	r1, [r3, #122]
+	str	r1, [sp, #12]
+	ldrh	r1, [r3, #120]
+	str	r1, [sp, #8]
+	movw	r1, #1983
+	ldrh	r3, [r3, #124]
+	str	r7, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r6
+	bl	printf
+.L3765:
+	movs	r2, #1
+	mov	r1, r10
+	ldrb	r0, [fp]	@ zero_extendqisi2
+	bl	gc_search_src_blk
+	cmp	r0, #0
+	ble	.L3766
+.L3767:
+	movs	r3, #1
+.L3922:
+	strb	r3, [r4]
+	b	.L3856
+.L3858:
+	mov	r10, #2
+	b	.L3764
+.L3766:
+	movs	r2, #1
+	movs	r1, #3
+	ldrb	r0, [fp]	@ zero_extendqisi2
+	bl	gc_search_src_blk
+	cmp	r0, #0
+	bgt	.L3767
+	b	.L3856
+.L3759:
+	ldr	r3, .L3924+64
+	ldr	r2, [r3]
+	str	r3, [sp, #44]
+	tst	r2, #256
+	beq	.L3769
+	ldr	r3, .L3924+72
+	movw	r1, #1995
+	ldr	r0, .L3924+68
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	ldr	r3, [sp, #32]
+	str	r3, [sp, #16]
+	ldrh	r3, [r5, #122]
+	str	r3, [sp, #12]
+	ldrh	r3, [r5, #120]
+	str	r3, [sp, #8]
+	ldrh	r3, [r5, #124]
+	str	r7, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r6
+	bl	printf
+.L3769:
+	ldr	r3, [sp, #32]
+	cmp	r3, #1
+	bne	.L3770
+	bl	gc_scan_static_data
+	ldr	r3, [r8]
+	ldr	fp, .L3924+72
+	ldrh	r3, [r3, #122]
+	cbz	r3, .L3771
+.L3772:
+	movs	r3, #1
+	strb	r3, [fp]
+	b	.L3922
+.L3771:
+	bl	gc_static_wearleveling
+	mov	r5, r0
+	cmp	r0, #0
+	bne	.L3772
+	cmp	r7, #0
+	bne	.L3773
+.L3777:
+	movs	r5, #16
+.L3774:
+	ldr	r0, [r8]
+	movs	r1, #1
+	ldr	r3, .L3924+72
+	ldrh	fp, [r0, #124]
+	strb	r1, [r3]
+	mov	r8, r3
+	cmp	fp, #0
+	beq	.L3782
+	movs	r2, #0
+	strb	r1, [r4]
+	strb	r2, [r3]
+	ldr	r3, [sp, #44]
+	ldr	r3, [r3]
+	lsls	r4, r3, #23
+	bpl	.L3748
+	ldrh	r3, [r0, #122]
+	movw	r1, #2085
+	str	r3, [sp, #12]
+	ldrh	r3, [r0, #120]
+	stm	sp, {r7, fp}
+	ldr	r0, .L3924+76
+	str	r3, [sp, #8]
+	mov	r3, r6
+	bl	printf
+.L3748:
+	mov	r0, r5
+	add	sp, sp, #48
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3925:
+	.align	2
+.L3924:
+	.word	.LANCHOR99
+	.word	.LANCHOR150
+	.word	.LANCHOR95
+	.word	.LANCHOR10
+	.word	.LANCHOR63
+	.word	.LANCHOR102
+	.word	.LANCHOR97
+	.word	.LANCHOR90
+	.word	.LANCHOR88
+	.word	.LANCHOR79
+	.word	.LANCHOR9
+	.word	.LANCHOR151
+	.word	.LANCHOR6
+	.word	.LANCHOR91
+	.word	.LANCHOR92
+	.word	.LANCHOR93
+	.word	.LANCHOR14
+	.word	.LC236
+	.word	.LANCHOR76
+	.word	.LC237
+	.word	.LANCHOR85
+	.word	.LANCHOR87
+.L3773:
+	ldr	r3, [sp, #28]
+	ldr	r2, .L3926
+	cmp	r6, r3
+	bcs	.L3775
+	ldrh	r3, [r2]
+	cmp	r3, r6
+	bhi	.L3776
+.L3775:
+	ldr	r3, [sp, #28]
+	ldrh	r2, [r2]
+	adds	r3, r6, r3
+	cmp	r3, r2
+	blt	.L3776
+	ldr	r3, .L3926+4
+	ldrh	r2, [r3]
+	ldr	r3, .L3926+8
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L3777
+.L3776:
+	mov	r10, #1
+	ldr	r2, .L3926+12
+	strb	r10, [fp]
+	ldr	fp, .L3926+32
+	ldrh	r2, [r2]
+	ldr	r3, [fp]
+	add	r3, r3, r10
+	cmp	r3, r2, lsr #5
+	str	r3, [fp]
+	ldr	r3, .L3926+4
+	bls	.L3778
+	ldrh	r2, [r3]
+	cmp	r2, r7
+	bls	.L3778
+	movs	r1, #5
+	movs	r0, #0
+	bl	zftl_get_gc_node
+	movw	r3, #65535
+	cmp	r0, r3
+	beq	.L3777
+	ldr	r3, .L3926+16
+	ldr	r3, [r3]
+	ldrh	r2, [r3, r0, lsl #1]
+	ldr	r3, .L3926+20
+	ldrh	r1, [r3]
+	ldr	r3, .L3926+24
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	muls	r3, r1, r3
+	cmp	r2, r3
+	bgt	.L3777
+	movs	r2, #4
+	movs	r1, #2
+	mov	r0, r10
+	movs	r3, #0
+	str	r3, [fp]
+.L3912:
+	bl	gc_search_src_blk
+	uxth	r0, r0
+	cmp	r0, #0
+	beq	.L3777
+	b	.L3767
+.L3778:
+	ldrh	r2, [r3]
+	ldr	r3, .L3926+8
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L3780
+	movs	r2, #1
+	movs	r1, #2
+	mov	r0, r2
+	b	.L3912
+.L3780:
+	ldr	r3, [sp, #36]
+	ldrh	r3, [r3]
+	cbnz	r3, .L3781
+	ldr	r3, [sp, #40]
+	ldrh	r3, [r3]
+	cmp	r3, #8
+	bls	.L3774
+.L3781:
+	movs	r1, #1
+	movs	r2, #4
+	mov	r0, r1
+	b	.L3912
+.L3770:
+	ldr	r3, .L3926+28
+	ldrh	r3, [r3]
+	cmp	r3, r6
+	bcc	.L3856
+	b	.L3777
+.L3782:
+	ldr	r2, .L3926+28
+	ldrh	ip, [r2]
+	mov	r10, r2
+	cmp	r6, ip
+	bcs	.L3783
+	cmp	r7, #0
+	beq	.L3784
+	cmp	r7, #16
+	bls	.L3785
+	ldr	r2, .L3926+4
+	ldrh	r0, [r2]
+	ldr	r2, .L3926+8
+	ldrh	r2, [r2]
+	cmp	r0, r2
+	bhi	.L3785
+	movs	r2, #4
+	mov	r0, r1
+	str	r3, [sp, #28]
+	bl	gc_search_src_blk
+	uxth	r0, r0
+	ldr	r3, [sp, #28]
+	cbnz	r0, .L3786
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	movs	r2, #4
+	movs	r1, #3
+.L3914:
+	bl	gc_search_src_blk
+	uxth	r0, r0
+.L3787:
+	cbnz	r0, .L3789
+	b	.L3748
+.L3786:
+	movs	r1, #5
+	mov	r0, fp
+	bl	zftl_get_gc_node
+	movw	r3, #65535
+	cmp	r0, r3
+	beq	.L3789
+	ldr	r1, .L3926+16
+	ldr	r6, .L3926+20
+	ldr	r2, .L3926+32
+	ldr	r1, [r1]
+	ldrh	r6, [r6]
+	ldr	r3, [r2]
+	ldrh	r1, [r1, r0, lsl #1]
+	adds	r3, r3, #1
+	cmp	r6, r1
+	str	r3, [r2]
+	mov	r6, r2
+	bcs	.L3790
+	ldr	r2, .L3926+12
+	ldrh	r2, [r2]
+	cmp	r3, r2, lsr #4
+	bls	.L3789
+	ldr	r3, .L3926+36
+	ldrh	r3, [r3]
+	cmp	r3, r1
+	bls	.L3789
+.L3790:
+	ldrb	r2, [r8]	@ zero_extendqisi2
+	movs	r1, #0
+	bl	gc_add_sblk
+	ldr	r3, .L3926+40
+	movs	r2, #1
+	str	r2, [r3]
+	movs	r3, #0
+	str	r3, [r6]
+.L3789:
+	movs	r3, #1
+	strb	r3, [r4]
+	b	.L3748
+.L3785:
+	movs	r2, #1
+	movs	r1, #2
+	mov	r0, r2
+.L3920:
+	bl	gc_search_src_blk
+	uxth	r0, r0
+	cmp	r0, #0
+	bne	.L3789
+	movs	r2, #2
+.L3917:
+	movs	r1, #3
+	ldrb	r0, [r8]	@ zero_extendqisi2
+	b	.L3914
+.L3784:
+	strb	r7, [r3]
+	ldr	r3, [sp, #44]
+	ldr	r3, [r3]
+	lsls	r1, r3, #23
+	bpl	.L3792
+	ldrh	r3, [r0, #122]
+	mov	r2, r7
+	movw	r1, #2115
+	str	r3, [sp, #12]
+	ldrh	r3, [r0, #120]
+	str	r7, [sp, #4]
+	str	r7, [sp]
+	str	r3, [sp, #8]
+	mov	r3, r6
+	ldr	r0, .L3926+44
+	bl	printf
+.L3792:
+	cmp	r6, #16
+	bls	.L3793
+	movs	r2, #4
+	b	.L3917
+.L3793:
+	movs	r2, #1
+	ldrb	r0, [r8]	@ zero_extendqisi2
+	mov	r1, r2
+	b	.L3920
+.L3783:
+	ldr	r3, [sp, #32]
+	cmp	r3, #1
+	bne	.L3748
+	cmp	r6, ip, lsl #1
+	bge	.L3794
+	ldr	r3, [sp, #28]
+	cmp	r3, r7, lsr #1
+	bcs	.L3795
+	ldr	r3, .L3926+4
+	ldrh	r1, [r3]
+	ldr	r3, .L3926+8
+	ldrh	r3, [r3]
+	cmp	r1, r3
+	bcs	.L3795
+	ldr	r3, .L3926
+	ldrh	r3, [r3]
+	lsrs	r3, r3, #2
+	strh	r3, [r2]	@ movhi
+	b	.L3748
+.L3795:
+	movs	r1, #5
+	movs	r0, #0
+	bl	zftl_get_gc_node
+	movw	r3, #65535
+	mov	fp, r0
+	cmp	r0, r3
+	bne	.L3796
+.L3801:
+	cmp	r7, #1
+	bhi	.L3797
+.L3798:
+	ldr	r3, [sp, #28]
+	cmp	r6, r3
+	ldr	r6, .L3926
+	bcs	.L3805
+	movs	r7, #0
+	movs	r0, #4
+	strb	r7, [r8]
+	bl	zftl_get_gc_node.part.9
+	movw	r3, #65535
+	cmp	r0, r3
+	beq	.L3805
+	ldr	r3, .L3926+16
+	ldr	r3, [r3]
+	ldrh	r2, [r3, r0, lsl #1]
+	ldr	r3, .L3926+20
+	ldrh	r1, [r3]
+	ldr	r3, .L3926+24
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	muls	r3, r1, r3
+	cmp	r2, r3, asr #1
+	ble	.L3807
+.L3805:
+	ldrh	r3, [r6]
+	lsrs	r3, r3, #2
+	strh	r3, [r10]	@ movhi
+	b	.L3748
+.L3796:
+	ldr	r2, .L3926+32
+	ldr	r1, .L3926+12
+	ldr	r3, [r2]
+	ldrh	r1, [r1]
+	adds	r3, r3, #1
+	str	r3, [r2]
+	cmp	r3, r1, lsr #4
+	ldr	r3, .L3926+16
+	bls	.L3799
+	movs	r1, #0
+	str	r1, [r2]
+	ldr	r2, [r3]
+	ldrh	ip, [r2, r0, lsl #1]
+	ldr	r2, .L3926+36
+	ldrh	r2, [r2]
+	cmp	ip, r2
+	bcs	.L3799
+	movs	r2, #1
+	str	r3, [sp, #32]
+	bl	gc_add_sblk
+	ldr	r3, [sp, #32]
+	cmp	r0, #0
+	bne	.L3789
+.L3799:
+	ldr	r3, [r3]
+	ldrh	r2, [r3, fp, lsl #1]
+	ldr	r3, .L3926+20
+	ldrh	r3, [r3]
+	cmp	r2, r3, lsr #1
+	bhi	.L3800
+	movs	r2, #0
+	movs	r1, #1
+	mov	r0, fp
+	bl	gc_add_sblk
+	b	.L3789
+.L3800:
+	ldr	r3, [sp, #36]
+	ldr	r1, [sp, #40]
+	ldrh	r3, [r3]
+	ldrh	r1, [r1]
+	add	r3, r3, r1
+	ldr	r1, .L3926
+	ldrh	r1, [r1]
+	cmp	r3, r1, lsl #1
+	ble	.L3801
+	ldr	r3, .L3926+36
+	ldrh	r3, [r3]
+	cmp	r3, r2
+	bcc	.L3798
+	b	.L3801
+.L3927:
+	.align	2
+.L3926:
+	.word	.LANCHOR89
+	.word	.LANCHOR92
+	.word	.LANCHOR93
+	.word	.LANCHOR6
+	.word	.LANCHOR9
+	.word	.LANCHOR85
+	.word	.LANCHOR78
+	.word	.LANCHOR79
+	.word	.LANCHOR151
+	.word	.LANCHOR91
+	.word	.LANCHOR114
+	.word	.LC237
+.L3797:
+	cmp	r7, #16
+	mov	r1, #1
+	strb	r1, [r8]
+	bls	.L3802
+	ldr	r3, .L3928
+	ldrh	r2, [r3]
+	ldr	r3, .L3928+4
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bhi	.L3802
+	movs	r2, #4
+	mov	r0, r1
+	bl	gc_search_src_blk
+	uxth	r0, r0
+	cbnz	r0, .L3803
+	movs	r2, #4
+.L3913:
+	movs	r1, #3
+	ldrb	r0, [r8]	@ zero_extendqisi2
+	bl	gc_search_src_blk
+	uxth	r0, r0
+.L3803:
+	ldr	r3, [sp, #28]
+	cmp	r6, r3, lsr #1
+	ldr	r3, .L3928+8
+	ldrh	r3, [r3]
+	bls	.L3915
+	lsrs	r3, r3, #2
+.L3916:
+	strh	r3, [r10]	@ movhi
+	b	.L3787
+.L3802:
+	movs	r2, #1
+	movs	r1, #2
+	mov	r0, r2
+	bl	gc_search_src_blk
+	uxth	r0, r0
+	cmp	r0, #0
+	bne	.L3803
+	movs	r2, #2
+	b	.L3913
+.L3807:
+	movs	r2, #4
+	movs	r1, #3
+	mov	r0, r7
+	bl	gc_search_src_blk
+	ldrh	r3, [r6]
+	uxth	r0, r0
+.L3915:
+	lsrs	r3, r3, #1
+	b	.L3916
+.L3794:
+	ldr	r3, .L3928+8
+	mov	r5, fp
+	ldrh	r3, [r3]
+	lsrs	r3, r3, #2
+	strh	r3, [r2]	@ movhi
+	b	.L3748
+.L3752:
+	ldr	r5, .L3928+12
+	movw	r3, #65535
+	ldrh	r2, [r5]
+	cmp	r2, r3
+	bne	.L3808
+	bl	gc_get_src_blk
+	strh	r0, [r5]	@ movhi
+.L3808:
+	ldrh	r1, [r5]
+	movw	r3, #65535
+	cmp	r1, r3
+	beq	.L3923
+	ldr	r3, .L3928+16
+	ldrh	r0, [r5, #52]
+	ldr	r3, [r3]
+	add	r3, r3, r1, lsl #2
+	cbz	r0, .L3810
+	ldr	r5, .L3928+20
+	movs	r2, #0
+.L3811:
+	uxth	r6, r2
+	cmp	r0, r6
+	bhi	.L3812
+.L3810:
+	ldrb	r3, [r3, #2]	@ zero_extendqisi2
+	and	r2, r3, #224
+	cmp	r2, #224
+	beq	.L3813
+	tst	r3, #192
+	bne	.L3814
+.L3813:
+	ldr	r3, .L3928+24
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r1, lsl #1]
+	cbz	r3, .L3816
+	movw	r2, #2348
+	ldr	r1, .L3928+28
+	ldr	r0, .L3928+32
+	bl	printf
+	b	.L3816
+.L3812:
+	ldrh	r6, [r5, #2]!
+	adds	r2, r2, #1
+	cmp	r6, r1
+	bne	.L3811
+.L3816:
+	ldr	r3, .L3928+12
+	movw	r2, #65535
+	strh	r2, [r3]	@ movhi
+	b	.L3856
+.L3814:
+	movs	r3, #2
+	b	.L3922
+.L3753:
+	bl	gc_scan_src_blk
+	adds	r0, r0, #1
+	bne	.L3817
+	movs	r3, #3
+	b	.L3922
+.L3817:
+	ldr	r3, .L3928+12
+	movw	r1, #65535
+	ldrh	r2, [r3]
+	mov	r5, r3
+	cmp	r2, r1
+	beq	.L3767
+	ldrh	r1, [r3, #20]
+	cbz	r1, .L3818
+	movs	r2, #4
+	strb	r2, [r4]
+	movs	r2, #0
+	strh	r2, [r3, #22]	@ movhi
+	b	.L3856
+.L3818:
+	movs	r3, #1
+	strb	r3, [r4]
+	ldr	r4, .L3928+24
+	ldr	r1, [r4]
+	ldrh	r2, [r1, r2, lsl #1]
+	cbz	r2, .L3819
+	movw	r2, #2376
+	ldr	r1, .L3928+28
+	ldr	r0, .L3928+32
+	bl	printf
+.L3819:
+	ldrh	r0, [r5]
+	bl	ftl_free_sblk
+	ldr	r3, [r4]
+	movs	r4, #0
+	ldrh	r2, [r5]
+	strh	r4, [r3, r2, lsl #1]	@ movhi
+	ldrh	r3, [r5, #26]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	cmp	r3, #8
+	bhi	.L3820
+	strh	r3, [r5, #26]	@ movhi
+	b	.L3816
+.L3820:
+	strh	r4, [r5, #26]	@ movhi
+	bl	ftl_flush
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	mov	r0, r4
+	bl	ftl_info_flush
+	b	.L3816
+.L3754:
+	ldr	r7, .L3928+12
+	mov	r5, r7
+.L3893:
+	bl	gc_scan_src_blk_one_page
+	ldr	r3, .L3928+36
+	ldrh	r2, [r7, #2]
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcs	.L3822
+	cmp	r6, #7
+	bls	.L3893
+	b	.L3856
+.L3822:
+	ldrh	r3, [r7, #20]
+	ldr	r2, .L3928+40
+	cbz	r3, .L3823
+	ldr	r2, [r2]
+	movs	r1, #4
+	strb	r1, [r4]
+	movs	r1, #0
+	strh	r1, [r7, #22]	@ movhi
+	tst	r2, #256
+	ldr	r4, .L3928+24
+	beq	.L3824
+	ldrh	r1, [r7]
+	ldr	r2, [r4]
+	ldr	r0, .L3928+44
+	ldrh	r2, [r2, r1, lsl #1]
+	bl	printf
+.L3824:
+	ldr	r3, [r4]
+	ldrh	r2, [r5]
+	ldrh	r2, [r3, r2, lsl #1]
+	ldrh	r3, [r5, #20]
+	cmp	r2, r3
+	beq	.L3825
+	movw	r2, #2410
+	ldr	r1, .L3928+28
+	ldr	r0, .L3928+32
+	bl	printf
+.L3825:
+	ldrh	r1, [r5, #20]
+	ldrh	r2, [r5]
+	ldr	r3, [r4]
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	b	.L3856
+.L3823:
+	ldr	r3, .L3928+16
+	ldrh	r1, [r7]
+	ldr	r6, [r3]
+	movs	r3, #1
+	strb	r3, [r4]
+	ldr	r3, [r2]
+	add	r6, r6, r1, lsl #2
+	lsls	r2, r3, #23
+	bpl	.L3826
+	ldrb	r2, [r6, #2]	@ zero_extendqisi2
+	ldr	r0, .L3928+48
+	lsrs	r2, r2, #5
+	bl	printf
+.L3826:
+	ldrb	r3, [r6, #2]	@ zero_extendqisi2
+	and	r2, r3, #224
+	cmp	r2, #224
+	beq	.L3827
+	tst	r3, #192
+	bne	.L3828
+.L3827:
+	movw	r2, #2420
+	ldr	r1, .L3928+28
+	ldr	r0, .L3928+32
+	bl	printf
+.L3828:
+	ldrh	r0, [r5]
+	bl	ftl_free_sblk
+	movw	r3, #65535
+	strh	r3, [r5]	@ movhi
+	ldrh	r3, [r5, #26]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	cmp	r3, #8
+	bhi	.L3829
+	strh	r3, [r5, #26]	@ movhi
+	b	.L3856
+.L3829:
+	movs	r3, #0
+	strh	r3, [r5, #26]	@ movhi
+.L3921:
+	bl	flt_sys_flush
+	b	.L3856
+.L3929:
+	.align	2
+.L3928:
+	.word	.LANCHOR92
+	.word	.LANCHOR93
+	.word	.LANCHOR89
+	.word	.LANCHOR63
+	.word	.LANCHOR7
+	.word	.LANCHOR63+52
+	.word	.LANCHOR9
+	.word	.LANCHOR220
+	.word	.LC0
+	.word	.LANCHOR85
+	.word	.LANCHOR14
+	.word	.LC238
+	.word	.LC239
+.L3755:
+	ldrh	r2, [r5, #80]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L3830
+	ldr	r3, .L3930
+	ldrb	r7, [r3]	@ zero_extendqisi2
+	cmp	r7, #1
+	bne	.L3830
+	ldr	r6, .L3930+4
+	bl	ftl_flush
+	movs	r1, #5
+	ldrh	r0, [r6, #314]
+	cbz	r0, .L3831
+	mov	r0, r7
+.L3831:
+	bl	zftl_gc_get_free_sblk
+	movw	r3, #65535
+	mov	r4, r0
+	cmp	r0, r3
+	beq	.L3833
+	ldr	r3, .L3930+8
+	ldr	r7, [r3]
+	add	r7, r7, r0, lsl #2
+	ldrb	r3, [r7, #2]	@ zero_extendqisi2
+	tst	r3, #224
+	beq	.L3834
+	movw	r2, #2449
+	ldr	r1, .L3930+12
+	ldr	r0, .L3930+16
+	bl	printf
+.L3834:
+	ldrb	r3, [r7, #2]	@ zero_extendqisi2
+	and	r3, r3, #15
+	orr	r3, r3, #176
+	strb	r3, [r7, #2]
+.L3855:
+	movs	r1, #1
+	mov	r0, r4
+	bl	ftl_erase_sblk
+	movs	r3, #5
+	add	r1, r5, #96
+	strb	r3, [r5, #84]
+	mov	r0, r4
+	bl	ftl_get_blk_list_in_sblk
+	ldr	r3, .L3930+20
+	uxtb	r0, r0
+	movs	r7, #0
+	ldr	r10, .L3930+60
+	strb	r0, [r5, #89]
+	movs	r1, #255
+	ldrh	r3, [r3]
+	strh	r4, [r5, #80]	@ movhi
+	strh	r7, [r5, #82]	@ movhi
+	strb	r7, [r5, #85]
+	smulbb	r0, r3, r0
+	strh	r7, [r5, #90]	@ movhi
+	ldrh	r3, [r10]
+	strh	r0, [r5, #86]	@ movhi
+	ldr	r5, .L3930+24
+	ldrb	r2, [r5]	@ zero_extendqisi2
+	muls	r2, r3, r2
+	ldr	r3, .L3930+28
+	ldr	r0, [r3]
+	lsls	r2, r2, #2
+	bl	ftl_memset
+	ldrh	r3, [r10]
+	movs	r1, #255
+	ldrb	r2, [r5]	@ zero_extendqisi2
+	muls	r2, r3, r2
+	ldr	r3, .L3930+32
+	ldr	r0, [r3]
+	lsls	r2, r2, #2
+	bl	ftl_memset
+	ldrh	r3, [r10]
+	movs	r1, #255
+	ldrb	r2, [r5]	@ zero_extendqisi2
+	muls	r2, r3, r2
+	ldr	r3, .L3930+36
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldr	r3, [r8]
+	movw	r2, #65535
+	strh	r2, [r3, #128]	@ movhi
+	strh	r2, [r3, #130]	@ movhi
+	str	r4, [r3, #132]
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	ldr	r3, .L3930+40
+	mov	r0, r7
+	strh	r7, [r6, #52]	@ movhi
+	ldr	r3, [r3]
+	strh	r4, [r3, #126]	@ movhi
+	mov	r3, #-1
+	strh	r7, [r6, #310]	@ movhi
+	strh	r7, [r6, #312]	@ movhi
+	strh	r7, [r6, #316]	@ movhi
+	str	r3, [r6, #320]
+	bl	ftl_info_flush
+	b	.L3856
+.L3830:
+	ldr	r3, [sp, #32]
+	ldr	r10, .L3930
+	cmp	r3, #1
+	ite	ne
+	movne	r7, #1
+	moveq	r7, #4
+	cmp	r6, #15
+	ldr	r6, .L3930+4
+	it	ls
+	addls	r7, r7, #4
+.L3837:
+	subs	r7, r7, #1
+	uxtb	r7, r7
+	cmp	r7, #255
+	beq	.L3856
+	bl	gc_do_copy_back
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	cbnz	r3, .L3838
+	ldr	r3, .L3930+44
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #3
+	bhi	.L3839
+	bl	ftl_write_commit
+.L3839:
+	ldrh	r2, [r6, #22]
+	ldrh	r3, [r6, #20]
+	cmp	r2, r3
+	bcc	.L3837
+	movs	r3, #1
+	strb	r3, [r4]
+	ldr	r4, .L3930+48
+	bl	ftl_write_commit
+	bl	ftl_flush
+	ldrh	r1, [r6]
+	ldr	r2, [r4]
+	ldrh	r2, [r2, r1, lsl #1]
+	cbz	r2, .L3841
+	movw	r2, #2524
+	ldr	r1, .L3930+12
+	ldr	r0, .L3930+16
+	bl	printf
+.L3841:
+	ldrh	r0, [r6]
+	ldr	r3, [r4]
+	ldrh	r3, [r3, r0, lsl #1]
+	cbnz	r3, .L3842
+	bl	ftl_free_sblk
+	b	.L3816
+.L3842:
+	movs	r2, #1
+	movs	r1, #0
+	bl	gc_add_sblk
+	b	.L3816
+.L3838:
+	ldrh	r3, [r6, #316]
+	cbz	r3, .L3843
+	movs	r5, #0
+	strh	r5, [r6, #316]	@ movhi
+	bl	sblk_wait_write_queue_completed
+	bl	gc_write_completed
+	ldr	r0, [r6, #320]
+	adds	r3, r0, #1
+	beq	.L3844
+	bl	ftl_mask_bad_block
+.L3844:
+	ldr	r3, [r8]
+	str	r5, [r6, #320]
+	strh	r5, [r6, #52]	@ movhi
+	ldrh	r0, [r3, #80]
+	bl	ftl_free_sblk
+	ldr	r1, .L3930+40
+	movw	r3, #65535
+	ldr	r0, [r6, #8]
+	ldr	r2, [r8]
+	ldr	r1, [r1]
+	strh	r3, [r2, #80]	@ movhi
+	strh	r3, [r1, #126]	@ movhi
+	strh	r3, [r2, #130]	@ movhi
+	cbz	r0, .L3845
+	bl	buf_free
+.L3845:
+	movs	r5, #0
+	str	r5, [r6, #8]
+	bl	flt_sys_flush
+	movw	r2, #2562
+	ldr	r1, .L3930+12
+	ldr	r0, .L3930+16
+	strb	r5, [r4]
+	bl	printf
+	b	.L3856
+.L3843:
+	ldrh	r3, [r5, #86]
+	ldrh	r2, [r6, #22]
+	cmp	r3, #1
+	ldrh	r3, [r6, #20]
+	bls	.L3846
+	cmp	r2, r3
+	bcc	.L3837
+	movs	r3, #1
+	strb	r3, [r4]
+	ldrh	r3, [r6, #52]
+	adds	r2, r3, #1
+	strh	r2, [r6, #52]	@ movhi
+	add	r3, r6, r3, lsl #1
+	ldrh	r2, [r6]
+	strh	r2, [r3, #54]	@ movhi
+	movw	r3, #65535
+	strh	r3, [r6]	@ movhi
+	b	.L3856
+.L3846:
+	cmp	r2, r3
+	mov	r1, #5
+	strb	r1, [r4]
+	bcc	.L3847
+	ldrh	r3, [r6, #52]
+	adds	r2, r3, #1
+	strh	r2, [r6, #52]	@ movhi
+	add	r3, r6, r3, lsl #1
+	ldrh	r2, [r6]
+	strh	r2, [r3, #54]	@ movhi
+	movw	r3, #65535
+	strh	r3, [r6]	@ movhi
+.L3847:
+	bl	ftl_flush
+	bl	sblk_wait_write_queue_completed
+	bl	gc_write_completed
+	ldr	r3, [r8]
+	ldrh	r2, [r5, #80]
+	strh	r2, [r3, #128]	@ movhi
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	ldr	r2, .L3930+52
+	movs	r3, #0
+	strh	r3, [r6, #12]	@ movhi
+	ldr	r3, .L3930+20
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	cmp	r2, #2
+	strh	r2, [r6, #16]	@ movhi
+	strh	r3, [r6, #14]	@ movhi
+	bne	.L3849
+	lsls	r3, r3, #1
+	strh	r3, [r6, #14]	@ movhi
+	ldr	r3, .L3930+56
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L3849
+	movs	r3, #1
+	strh	r3, [r6, #16]	@ movhi
+.L3849:
+	movs	r3, #0
+	strh	r3, [r6, #18]	@ movhi
+	b	.L3856
+.L3852:
+	ldrh	r2, [r5, #12]
+	ldrh	r3, [r5, #14]
+	cmp	r2, r3
+	bcc	.L3853
+	movs	r3, #6
+	ldr	r0, [r5, #8]
+	strb	r3, [r4]
+	bl	buf_free
+	str	r10, [r5, #8]
+	b	.L3856
+.L3853:
+	cmp	r6, #15
+	bls	.L3758
+	ldr	r3, [sp, #32]
+	cmp	r3, #1
+	bne	.L3856
+	adds	r7, r7, #1
+	uxtb	r7, r7
+	cmp	r7, #4
+	bls	.L3758
+	b	.L3856
+.L3757:
+	movw	r6, #65535
+	bl	gc_update_l2p_map_new
+	bl	gc_free_src_blk
+	bl	ftl_flush
+	bl	pm_flush
+	strh	r6, [r5, #80]	@ movhi
+	bl	ftl_ext_info_flush
+	ldr	r3, .L3930+40
+	movs	r0, #0
+	ldr	r3, [r3]
+	strh	r6, [r3, #126]	@ movhi
+	bl	ftl_info_flush
+.L3923:
+	movs	r3, #0
+	b	.L3922
+.L3833:
+	movw	r2, #2455
+	ldr	r1, .L3930+12
+	ldr	r0, .L3930+16
+	bl	printf
+	b	.L3855
+.L3931:
+	.align	2
+.L3930:
+	.word	.LANCHOR76
+	.word	.LANCHOR63
+	.word	.LANCHOR7
+	.word	.LANCHOR220
+	.word	.LC0
+	.word	.LANCHOR85
+	.word	.LANCHOR78
+	.word	.LANCHOR152
+	.word	.LANCHOR153
+	.word	.LANCHOR74
+	.word	.LANCHOR102
+	.word	.LANCHOR52
+	.word	.LANCHOR9
+	.word	.LANCHOR71
+	.word	.LANCHOR72
+	.word	.LANCHOR77
+	.size	zftl_do_gc, .-zftl_do_gc
+	.section	.text.zftl_write,"ax",%progbits
+	.align	1
+	.global	zftl_write
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	zftl_write, %function
+zftl_write:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r8, r3
+	ldr	r3, .L3952
+	sub	sp, sp, #24
+	mov	r4, r0
+	mov	r5, r1
+	mov	r7, r2
+	ldr	r3, [r3]
+	lsls	r3, r3, #19
+	bpl	.L3933
+	ldr	r3, [r8]
+	str	r3, [sp]
+	mov	r3, r2
+	mov	r2, r1
+	mov	r1, r0
+	ldr	r0, .L3952+4
+	bl	printf
+.L3933:
+	cbnz	r4, .L3934
+	ldr	r3, .L3952+8
+	mov	r4, #24576
+	ldr	r3, [r3]
+.L3935:
+	adds	r2, r5, r7
+	cmp	r3, r2
+	bcc	.L3948
+	ldr	fp, .L3952+24
+	add	r4, r4, r5
+	mov	r0, r4
+	ldrb	r5, [fp]	@ zero_extendqisi2
+	mov	r1, r5
+	bl	__aeabi_uidiv
+	mov	r10, r0
+	subs	r0, r7, #1
+	mov	r1, r5
+	add	r0, r0, r4
+	bl	__aeabi_uidiv
+	sub	r5, r0, r10
+	mov	r6, r10
+	adds	r5, r5, #1
+	str	r0, [sp, #12]
+	str	fp, [sp, #16]
+.L3937:
+	cbnz	r5, .L3944
+	bl	ftl_write_commit
+	ldr	r4, .L3952+12
+	bl	ftl_flush
+	mov	r0, r5
+	ldr	r5, .L3952+16
+	movs	r1, #1
+	bl	zftl_do_gc
+.L3945:
+	ldrh	r3, [r5]
+	ldrh	r2, [r4]
+	add	r3, r3, r2
+	cmp	r3, #7
+	ble	.L3946
+	movs	r0, #0
+.L3932:
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3934:
+	cmp	r4, #3
+	bhi	.L3948
+	lsls	r4, r4, #13
+	mov	r3, #8192
+	b	.L3935
+.L3944:
+	movs	r0, #0
+	bl	buf_alloc
+	mov	fp, r0
+	cbnz	r0, .L3938
+	bl	ftl_write_commit
+	b	.L3937
+.L3938:
+	mov	r3, #0
+	cmp	r6, r10
+	strb	r3, [r0, #41]
+	ldr	r3, [sp, #16]
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	strb	r2, [r0, #40]
+	bne	.L3940
+	mov	r1, r2
+	mov	r0, r4
+	str	r2, [sp, #20]
+	bl	__aeabi_uidivmod
+	ldr	r2, [sp, #20]
+	uxtb	r1, r1
+	strb	r1, [fp, #41]
+	subs	r1, r2, r1
+	uxtb	r1, r1
+	cmp	r7, r1
+	ite	cs
+	strbcs	r1, [fp, #40]
+	strbcc	r7, [fp, #40]
+.L3942:
+	ldrb	ip, [fp, #41]	@ zero_extendqisi2
+	mov	r1, r8
+	ldrb	r2, [fp, #40]	@ zero_extendqisi2
+	subs	r5, r5, #1
+	ldr	r0, [fp, #4]
+	lsls	r2, r2, #9
+	add	r0, r0, ip, lsl #9
+	bl	ftl_memcpy
+	ldr	r3, .L3952+20
+	str	r6, [fp, #20]
+	adds	r6, r6, #1
+	ldr	r1, [r3]
+	ldr	r2, [r1, #8]
+	adds	r0, r2, #1
+	str	r0, [r1, #8]
+	mov	r0, fp
+	str	r2, [fp, #16]
+	bl	ftl_write_buf
+	ldrb	r3, [fp, #40]	@ zero_extendqisi2
+	add	r8, r8, r3, lsl #9
+	b	.L3937
+.L3940:
+	ldr	r3, [sp, #12]
+	cmp	r6, r3
+	itttt	eq
+	smulbbeq	r2, r6, r2
+	addeq	r1, r4, r7
+	subeq	r2, r1, r2
+	strbeq	r2, [r0, #40]
+	b	.L3942
+.L3946:
+	movs	r1, #1
+	movs	r0, #0
+	bl	zftl_do_gc
+	b	.L3945
+.L3948:
+	mov	r0, #-1
+	b	.L3932
+.L3953:
+	.align	2
+.L3952:
+	.word	.LANCHOR14
+	.word	.LC240
+	.word	.LANCHOR59
+	.word	.LANCHOR99
+	.word	.LANCHOR95
+	.word	.LANCHOR102
+	.word	.LANCHOR123
+	.size	zftl_write, .-zftl_write
+	.section	.text.ftl_vendor_write,"ax",%progbits
+	.align	1
+	.global	ftl_vendor_write
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_vendor_write, %function
+ftl_vendor_write:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r3, r2
+	mov	r2, r1
+	add	r1, r0, #512
+	movs	r0, #2
+	b	zftl_write
+	.size	ftl_vendor_write, .-ftl_vendor_write
+	.section	.text.zftl_sys_write,"ax",%progbits
+	.align	1
+	.global	zftl_sys_write
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	zftl_sys_write, %function
+zftl_sys_write:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r3, r2
+	mov	r2, r1
+	mov	r1, r0
+	movs	r0, #2
+	b	zftl_write
+	.size	zftl_sys_write, .-zftl_sys_write
+	.section	.text.StorageSysDataStore,"ax",%progbits
+	.align	1
+	.global	StorageSysDataStore
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	StorageSysDataStore, %function
+StorageSysDataStore:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r3, r1
+	movs	r2, #1
+	mov	r1, r0
+	movs	r0, #2
+	b	zftl_write
+	.size	StorageSysDataStore, .-StorageSysDataStore
+	.section	.text.FlashBootVendorWrite,"ax",%progbits
+	.align	1
+	.global	FlashBootVendorWrite
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashBootVendorWrite, %function
+FlashBootVendorWrite:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r3, r2
+	mov	r2, r1
+	add	r1, r0, #512
+	movs	r0, #2
+	b	zftl_write
+	.size	FlashBootVendorWrite, .-FlashBootVendorWrite
+	.section	.text.ftl_write,"ax",%progbits
+	.align	1
+	.global	ftl_write
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_write, %function
+ftl_write:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r7, r1
+	mov	r4, r2
+	mov	r5, r3
+	mov	r6, r0
+	cbnz	r0, .L3959
+	mov	r3, r2
+	mov	r2, r5
+	bl	idb_write_data
+.L3959:
+	mov	r3, r5
+	mov	r2, r4
+	mov	r1, r7
+	mov	r0, r6
+	pop	{r4, r5, r6, r7, r8, lr}
+	b	zftl_write
+	.size	ftl_write, .-ftl_write
+	.section	.text.zftl_discard,"ax",%progbits
+	.align	1
+	.global	zftl_discard
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	zftl_discard, %function
+zftl_discard:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r2, .L4008
+	adds	r3, r0, r1
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r1
+	sub	sp, sp, #32
+	ldr	r2, [r2]
+	cmp	r2, r3
+	bcc	.L3981
+	ldr	r2, .L4008+4
+	add	r7, r0, #24576
+	ldr	r3, .L4008+8
+	ldr	r0, [r2]
+	ldr	r1, [r3]
+	str	r3, [sp, #12]
+	tst	r0, #4096
+	str	r2, [sp, #16]
+	add	r1, r1, r4
+	str	r1, [r3]
+	beq	.L3962
+	movs	r3, #0
+	mov	r2, r7
+	str	r3, [sp]
+	mov	r3, r4
+	ldr	r0, .L4008+12
+	bl	printf
+.L3962:
+	ldr	r8, .L4008+32
+	ldr	r10, .L4008+36
+	ldr	r3, [r8]
+	ldr	r2, [r3, #8]
+	str	r2, [sp, #8]
+	adds	r2, r2, #1
+	str	r2, [r3, #8]
+	bl	ftl_write_commit
+	bl	ftl_flush
+	ldrb	r6, [r10]	@ zero_extendqisi2
+	mov	r0, r7
+	mov	r1, r6
+	bl	__aeabi_uidiv
+	mov	r1, r6
+	mov	r5, r0
+	mov	r0, r7
+	bl	__aeabi_uidivmod
+	mov	fp, r1
+	cmp	r1, #0
+	beq	.L3963
+	subs	r6, r6, r1
+	mov	r0, r5
+	cmp	r6, r4
+	it	cs
+	movcs	r6, r4
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #24]
+	adds	r0, r0, #1
+	bne	.L3964
+	movs	r2, #0
+	add	r1, sp, #24
+	mov	r0, r5
+	bl	pm_log2phys
+.L3964:
+	ldr	r3, [sp, #24]
+	adds	r3, r3, #1
+	beq	.L3966
+	movs	r0, #0
+	bl	buf_alloc
+	mov	r3, r0
+	cbz	r0, .L3966
+	ldr	r2, [sp, #8]
+	movs	r1, #0
+	str	r5, [r0, #20]
+	strb	fp, [r0, #41]
+	str	r2, [r0, #16]
+	uxth	r2, r6
+	strb	r6, [r0, #40]
+	ldr	r0, [r0, #4]
+	lsls	r2, r2, #9
+	str	r3, [sp, #20]
+	add	r0, r0, fp, lsl #9
+	bl	ftl_memset
+	ldr	r3, [sp, #20]
+	mov	r0, r3
+	bl	ftl_write_buf
+	bl	ftl_write_commit
+	ldr	r2, [r8]
+	ldr	r3, [r2, #76]
+	adds	r3, r3, #1
+	str	r3, [r2, #76]
+.L3966:
+	uxth	r6, r6
+	adds	r5, r5, #1
+	subs	r4, r4, r6
+.L3963:
+	cbz	r4, .L3968
+	bl	ftl_flush
+.L3968:
+	ldr	fp, .L4008+40
+	mov	r3, #-1
+	ldr	r6, .L4008+16
+	str	r3, [sp, #28]
+.L3969:
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	cmp	r4, r3
+	bcs	.L3974
+	cmp	r4, #0
+	beq	.L3976
+	mov	r0, r5
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #24]
+	adds	r0, r0, #1
+	bne	.L3977
+	movs	r2, #0
+	add	r1, sp, #24
+	mov	r0, r5
+	bl	pm_log2phys
+.L3977:
+	ldr	r3, [sp, #24]
+	adds	r3, r3, #1
+	beq	.L3976
+	movs	r0, #0
+	bl	buf_alloc
+	mov	r6, r0
+	cbz	r0, .L3976
+	movs	r3, #0
+	str	r5, [r0, #20]
+	strb	r3, [r0, #41]
+	ldr	r3, [sp, #8]
+	strb	r4, [r0, #40]
+	str	r3, [r0, #16]
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	cmp	r4, r3
+	bcc	.L3979
+	movw	r2, #1251
+	ldr	r1, .L4008+20
+	ldr	r0, .L4008+24
+	bl	printf
+.L3979:
+	lsls	r2, r4, #9
+	movs	r1, #0
+	ldr	r0, [r6, #4]
+	bl	ftl_memset
+	mov	r0, r6
+	bl	ftl_write_buf
+	bl	ftl_write_commit
+	ldr	r2, [r8]
+	ldr	r3, [r2, #76]
+	adds	r3, r3, #1
+	str	r3, [r2, #76]
+.L3976:
+	ldr	r3, [sp, #12]
+	ldr	r1, [r3]
+	cmp	r1, #8192
+	bls	.L3982
+	ldr	r3, [sp, #16]
+	ldr	r3, [r3]
+	lsls	r3, r3, #19
+	bpl	.L3980
+	movs	r3, #0
+	mov	r2, r7
+	str	r3, [sp]
+	mov	r3, r4
+	ldr	r0, .L4008+12
+	bl	printf
+.L3980:
+	ldr	r3, [sp, #12]
+	movs	r4, #0
+	str	r4, [r3]
+	bl	flt_sys_flush
+	ldr	r3, .L4008+28
+	movs	r2, #1
+	str	r2, [r3]
+.L3982:
+	movs	r0, #0
+	b	.L3960
+.L3974:
+	mov	r0, r5
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #24]
+	adds	r0, r0, #1
+	beq	.L3970
+	movs	r0, #0
+	bl	buf_alloc
+	mov	r3, r0
+	cbz	r0, .L3972
+	ldrb	r2, [r10]	@ zero_extendqisi2
+	movs	r1, #0
+	strb	r1, [r0, #41]
+	str	r5, [r0, #20]
+	strb	r2, [r0, #40]
+	ldr	r0, [sp, #8]
+	lsls	r2, r2, #9
+	str	r3, [sp, #20]
+	str	r0, [r3, #16]
+	ldr	r0, [r3, #4]
+	bl	ftl_memset
+	ldr	r3, [sp, #20]
+	mov	r0, r3
+	bl	ftl_write_buf
+	bl	ftl_write_commit
+.L4007:
+	ldr	r2, [r8]
+	ldr	r3, [r2, #76]
+	adds	r3, r3, #1
+	str	r3, [r2, #76]
+.L3972:
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	adds	r5, r5, #1
+	subs	r4, r4, r3
+	b	.L3969
+.L3970:
+	movs	r2, #0
+	add	r1, sp, #24
+	mov	r0, r5
+	bl	pm_log2phys
+	ldr	r3, [sp, #24]
+	adds	r3, r3, #1
+	beq	.L3972
+	add	r1, sp, #28
+	movs	r2, #1
+	mov	r0, r5
+	bl	pm_log2phys
+	ldrh	r2, [fp]
+	movs	r3, #1
+	ldrb	r1, [r6]	@ zero_extendqisi2
+	rsb	r0, r2, #21
+	lsls	r3, r3, r0
+	ldr	r0, [sp, #24]
+	subs	r3, r3, #1
+	lsrs	r0, r0, r2
+	ands	r0, r0, r3
+	bl	__aeabi_uidiv
+	uxth	r0, r0
+	bl	ftl_vpn_decrement
+	b	.L4007
+.L3981:
+	mov	r0, #-1
+.L3960:
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L4009:
+	.align	2
+.L4008:
+	.word	.LANCHOR59
+	.word	.LANCHOR14
+	.word	.LANCHOR221
+	.word	.LC241
+	.word	.LANCHOR67
+	.word	.LANCHOR222
+	.word	.LC0
+	.word	.LANCHOR114
+	.word	.LANCHOR102
+	.word	.LANCHOR123
+	.word	.LANCHOR66
+	.size	zftl_discard, .-zftl_discard
+	.section	.text.ftl_discard,"ax",%progbits
+	.align	1
+	.global	ftl_discard
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_discard, %function
+ftl_discard:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r0, r1
+	mov	r1, r2
+	b	zftl_discard
+	.size	ftl_discard, .-ftl_discard
+	.global	g_pm_spare
+	.global	pm_first_write
+	.global	pm_gc_enable
+	.global	pm_last_load_ram_id
+	.global	pm_last_update_ram_id
+	.global	pm_ram_info
+	.global	sblk_gc_write_completed_queue_head
+	.global	sblk_read_completed_queue_head
+	.global	sblk_write_completed_queue_head
+	.global	sblk_queue_head
+	.global	slc_cache_sblk
+	.global	xlc_data_sblk
+	.global	slc_data_sblk
+	.global	free_mix_sblk
+	.global	free_xlc_sblk
+	.global	free_slc_sblk
+	.global	gp_data_xlc_data_head
+	.global	gp_data_slc_data_head
+	.global	gp_data_slc_cache_head
+	.global	gp_free_mix_head
+	.global	gp_free_xlc_head
+	.global	gp_free_slc_head
+	.global	gp_sblk_list_tbl
+	.global	zftl_print_list_count
+	.global	ftl_ext_info_first_write
+	.global	ftl_sys_info_first_write
+	.global	ftl_low_format_cur_blk
+	.global	ftl_power_lost_flag
+	.global	ftl_vpn_update_count
+	.global	ftl_sblk_update_list_offset
+	.global	ftl_sblk_update_list
+	.global	ftl_sblk_vpn_update_id
+	.global	ftl_sblk_lpa_tbl
+	.global	ftl_sblk_vpn
+	.global	gp_ftl_ext_info
+	.global	gp_ftl_info
+	.global	gp_blk_info
+	.global	ftl_tmp_spare
+	.global	ftl_info_spare
+	.global	ftl_ext_info_data_buffer
+	.global	ftl_info_data_buffer
+	.global	ftl_tmp_buffer
+	.global	g_ftl_info_blk
+	.global	tlc_prog_order
+	.global	gc_des_ppa_tbl
+	.global	gc_valid_page_ppa
+	.global	gc_page_buf_id
+	.global	gc_pre_ppa_tbl
+	.global	gc_lpa_tbl
+	.global	g_gc_info
+	.global	gc_xlc_search_index
+	.global	gc_xlc_data_index
+	.global	gc_slc_cache_index
+	.global	gc_slc_data_index
+	.global	gc_free_slc_sblk_th
+	.global	gc_slc_mode_vpn_th
+	.global	gc_slc_mode_tlc_vpn_th
+	.global	gc_tlc_mode_tlc_vpn_th
+	.global	gc_tlc_mode_slc_vpn_th
+	.global	gc_state
+	.global	gc_mode
+	.global	p_read_ahead_ext_buf
+	.global	discard_sector_count
+	.global	read_ahead_lpa
+	.global	read_buf_count
+	.global	read_buf_head
+	.global	write_commit_count
+	.global	write_commit_head
+	.global	write_buf_count
+	.global	write_buf_head
+	.global	ftl_flush_jiffies
+	.global	lpa_hash
+	.global	lpa_hash_index
+	.global	_c_slc_to_xlc_ec_ratio
+	.global	_c_mix_max_xlc_ec_count
+	.global	_c_mix_max_slc_ec_count
+	.global	_c_swl_xlc_gc_th
+	.global	_c_swl_slc_gc_th
+	.global	_gc_after_discard_en
+	.global	_last_write_time
+	.global	_last_read_time
+	.global	_min_slc_super_block
+	.global	_max_slc_super_block
+	.global	_max_xlc_super_block
+	.global	_c_max_pm_sblk
+	.global	_c_ftl_pm_page_num
+	.global	_c_totle_log_page
+	.global	_c_totle_data_density
+	.global	_c_user_data_density
+	.global	_c_totle_phy_density
+	.global	_c_ftl_block_addr_log2
+	.global	_c_ftl_block_align_addr
+	.global	_c_ftl_byte_pre_page
+	.global	_c_ftl_nand_blks_per_die
+	.global	_c_ftl_page_pre_slc_blk
+	.global	_c_ftl_page_pre_blk
+	.global	_c_ftl_blk_pre_plane
+	.global	_c_ftl_nand_planes_num
+	.global	_c_ftl_planes_per_die
+	.global	_c_ftl_sec_per_page
+	.global	_c_ftl_nand_die_num
+	.global	_c_ftl_nand_type
+	.global	zftl_debug
+	.global	g_flash_blk_info
+	.global	gp_flash_info
+	.global	p_free_buf_head
+	.global	free_buf_count
+	.global	g_buf
+	.global	nandc_ecc_sts
+	.global	g_nandc_v6_master_info
+	.global	nandc_randomizer_en
+	.global	nandc_hw_seed
+	.global	fill_spare_size
+	.global	g_nandc_ecc_bits
+	.global	g_nandc_tran_timeout
+	.global	g_nandc_ver
+	.global	gp_nandc
+	.global	hy_f26_ref_value
+	.global	sd15_tlc_rr
+	.global	sd15_slc_rr
+	.global	g_nand_para_info
+	.global	gp_nand_para_info
+	.global	g_nand_opt_para
+	.global	g_msb_page_tbl
+	.global	g_lsb_page_tbl
+	.global	g_die_addr
+	.global	g_die_cs_idx
+	.global	IDByte
+	.global	flash_read_retry
+	.global	g_maxRetryCount
+	.global	g_maxRegNum
+	.global	g_retryMode
+	.global	g_flash_toggle_mode_en
+	.global	g_flash_3d_mlc_flag
+	.global	g_flash_3d_tlc_flag
+	.global	g_flash_multi_page_prog_en
+	.global	g_flash_multi_page_read_en
+	.global	g_flash_interface_mode
+	.global	g_idb_ecc_bits
+	.global	g_idb_slc_mode_enable
+	.global	g_one_pass_program
+	.global	g_slc_mode_addr2
+	.global	g_slc_mode_enable
+	.global	g_flash_cur_mode
+	.global	g_flash_slc_mode
+	.global	g_slc_page_num
+	.global	g_totle_phy_block
+	.global	g_block_align_addr
+	.global	g_flash_reversd_blks
+	.global	g_nand_max_die
+	.global	g_flash_tmp_spare_buffer
+	.global	g_flash_tmp_page_buffer
+	.global	g_flash_sys_spare_buffer
+	.global	g_flash_spare_buffer
+	.global	g_flash_page_buffer
+	.section	.bss.IDByte,"aw",%nobits
+	.align	2
+	.set	.LANCHOR42,. + 0
+	.type	IDByte, %object
+	.size	IDByte, 32
+IDByte:
+	.space	32
+	.section	.bss._c_ftl_blk_pre_plane,"aw",%nobits
+	.align	1
+	.set	.LANCHOR6,. + 0
+	.type	_c_ftl_blk_pre_plane, %object
+	.size	_c_ftl_blk_pre_plane, 2
+_c_ftl_blk_pre_plane:
+	.space	2
+	.section	.bss._c_ftl_block_addr_log2,"aw",%nobits
+	.align	1
+	.set	.LANCHOR66,. + 0
+	.type	_c_ftl_block_addr_log2, %object
+	.size	_c_ftl_block_addr_log2, 2
+_c_ftl_block_addr_log2:
+	.space	2
+	.section	.bss._c_ftl_block_align_addr,"aw",%nobits
+	.align	1
+	.set	.LANCHOR103,. + 0
+	.type	_c_ftl_block_align_addr, %object
+	.size	_c_ftl_block_align_addr, 2
+_c_ftl_block_align_addr:
+	.space	2
+	.section	.bss._c_ftl_byte_pre_page,"aw",%nobits
+	.align	1
+	.set	.LANCHOR203,. + 0
+	.type	_c_ftl_byte_pre_page, %object
+	.size	_c_ftl_byte_pre_page, 2
+_c_ftl_byte_pre_page:
+	.space	2
+	.section	.bss._c_ftl_nand_blks_per_die,"aw",%nobits
+	.align	1
+	.type	_c_ftl_nand_blks_per_die, %object
+	.size	_c_ftl_nand_blks_per_die, 2
+_c_ftl_nand_blks_per_die:
+	.space	2
+	.section	.bss._c_ftl_nand_die_num,"aw",%nobits
+	.set	.LANCHOR104,. + 0
+	.type	_c_ftl_nand_die_num, %object
+	.size	_c_ftl_nand_die_num, 1
+_c_ftl_nand_die_num:
+	.space	1
+	.section	.bss._c_ftl_nand_planes_num,"aw",%nobits
+	.set	.LANCHOR78,. + 0
+	.type	_c_ftl_nand_planes_num, %object
+	.size	_c_ftl_nand_planes_num, 1
+_c_ftl_nand_planes_num:
+	.space	1
+	.section	.bss._c_ftl_nand_type,"aw",%nobits
+	.set	.LANCHOR71,. + 0
+	.type	_c_ftl_nand_type, %object
+	.size	_c_ftl_nand_type, 1
+_c_ftl_nand_type:
+	.space	1
+	.section	.bss._c_ftl_page_pre_blk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR77,. + 0
+	.type	_c_ftl_page_pre_blk, %object
+	.size	_c_ftl_page_pre_blk, 2
+_c_ftl_page_pre_blk:
+	.space	2
+	.section	.bss._c_ftl_page_pre_slc_blk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR85,. + 0
+	.type	_c_ftl_page_pre_slc_blk, %object
+	.size	_c_ftl_page_pre_slc_blk, 2
+_c_ftl_page_pre_slc_blk:
+	.space	2
+	.section	.bss._c_ftl_planes_per_die,"aw",%nobits
+	.set	.LANCHOR67,. + 0
+	.type	_c_ftl_planes_per_die, %object
+	.size	_c_ftl_planes_per_die, 1
+_c_ftl_planes_per_die:
+	.space	1
+	.section	.bss._c_ftl_pm_page_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR187,. + 0
+	.type	_c_ftl_pm_page_num, %object
+	.size	_c_ftl_pm_page_num, 2
+_c_ftl_pm_page_num:
+	.space	2
+	.section	.bss._c_ftl_sec_per_page,"aw",%nobits
+	.set	.LANCHOR123,. + 0
+	.type	_c_ftl_sec_per_page, %object
+	.size	_c_ftl_sec_per_page, 1
+_c_ftl_sec_per_page:
+	.space	1
+	.section	.bss._c_max_pm_sblk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR146,. + 0
+	.type	_c_max_pm_sblk, %object
+	.size	_c_max_pm_sblk, 2
+_c_max_pm_sblk:
+	.space	2
+	.section	.bss._c_mix_max_slc_ec_count,"aw",%nobits
+	.align	1
+	.set	.LANCHOR118,. + 0
+	.type	_c_mix_max_slc_ec_count, %object
+	.size	_c_mix_max_slc_ec_count, 2
+_c_mix_max_slc_ec_count:
+	.space	2
+	.section	.bss._c_mix_max_xlc_ec_count,"aw",%nobits
+	.align	1
+	.set	.LANCHOR116,. + 0
+	.type	_c_mix_max_xlc_ec_count, %object
+	.size	_c_mix_max_xlc_ec_count, 2
+_c_mix_max_xlc_ec_count:
+	.space	2
+	.section	.bss._c_slc_to_xlc_ec_ratio,"aw",%nobits
+	.align	1
+	.set	.LANCHOR8,. + 0
+	.type	_c_slc_to_xlc_ec_ratio, %object
+	.size	_c_slc_to_xlc_ec_ratio, 2
+_c_slc_to_xlc_ec_ratio:
+	.space	2
+	.section	.bss._c_swl_slc_gc_th,"aw",%nobits
+	.align	1
+	.set	.LANCHOR145,. + 0
+	.type	_c_swl_slc_gc_th, %object
+	.size	_c_swl_slc_gc_th, 2
+_c_swl_slc_gc_th:
+	.space	2
+	.section	.bss._c_swl_xlc_gc_th,"aw",%nobits
+	.align	1
+	.set	.LANCHOR144,. + 0
+	.type	_c_swl_xlc_gc_th, %object
+	.size	_c_swl_xlc_gc_th, 2
+_c_swl_xlc_gc_th:
+	.space	2
+	.section	.bss._c_totle_data_density,"aw",%nobits
+	.align	2
+	.set	.LANCHOR208,. + 0
+	.type	_c_totle_data_density, %object
+	.size	_c_totle_data_density, 4
+_c_totle_data_density:
+	.space	4
+	.section	.bss._c_totle_log_page,"aw",%nobits
+	.align	2
+	.set	.LANCHOR120,. + 0
+	.type	_c_totle_log_page, %object
+	.size	_c_totle_log_page, 4
+_c_totle_log_page:
+	.space	4
+	.section	.bss._c_totle_phy_density,"aw",%nobits
+	.align	2
+	.set	.LANCHOR207,. + 0
+	.type	_c_totle_phy_density, %object
+	.size	_c_totle_phy_density, 4
+_c_totle_phy_density:
+	.space	4
+	.section	.bss._c_user_data_density,"aw",%nobits
+	.align	2
+	.set	.LANCHOR59,. + 0
+	.type	_c_user_data_density, %object
+	.size	_c_user_data_density, 4
+_c_user_data_density:
+	.space	4
+	.section	.bss._gc_after_discard_en,"aw",%nobits
+	.align	2
+	.set	.LANCHOR114,. + 0
+	.type	_gc_after_discard_en, %object
+	.size	_gc_after_discard_en, 4
+_gc_after_discard_en:
+	.space	4
+	.section	.bss._last_read_time,"aw",%nobits
+	.align	2
+	.type	_last_read_time, %object
+	.size	_last_read_time, 4
+_last_read_time:
+	.space	4
+	.section	.bss._last_write_time,"aw",%nobits
+	.align	2
+	.type	_last_write_time, %object
+	.size	_last_write_time, 4
+_last_write_time:
+	.space	4
+	.section	.bss._max_slc_super_block,"aw",%nobits
+	.align	1
+	.set	.LANCHOR117,. + 0
+	.type	_max_slc_super_block, %object
+	.size	_max_slc_super_block, 2
+_max_slc_super_block:
+	.space	2
+	.section	.bss._max_xlc_super_block,"aw",%nobits
+	.align	1
+	.set	.LANCHOR93,. + 0
+	.type	_max_xlc_super_block, %object
+	.size	_max_xlc_super_block, 2
+_max_xlc_super_block:
+	.space	2
+	.section	.bss._min_slc_super_block,"aw",%nobits
+	.align	1
+	.set	.LANCHOR89,. + 0
+	.type	_min_slc_super_block, %object
+	.size	_min_slc_super_block, 2
+_min_slc_super_block:
+	.space	2
+	.section	.bss.discard_sector_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR221,. + 0
+	.type	discard_sector_count, %object
+	.size	discard_sector_count, 4
+discard_sector_count:
+	.space	4
+	.section	.bss.fill_spare_size,"aw",%nobits
+	.align	1
+	.set	.LANCHOR48,. + 0
+	.type	fill_spare_size, %object
+	.size	fill_spare_size, 2
+fill_spare_size:
+	.space	2
+	.section	.bss.flash_ddr_tuning_sdr_read_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR160,. + 0
+	.type	flash_ddr_tuning_sdr_read_count, %object
+	.size	flash_ddr_tuning_sdr_read_count, 4
+flash_ddr_tuning_sdr_read_count:
+	.space	4
+	.section	.bss.flash_read_retry,"aw",%nobits
+	.align	2
+	.set	.LANCHOR162,. + 0
+	.type	flash_read_retry, %object
+	.size	flash_read_retry, 4
+flash_read_retry:
+	.space	4
+	.section	.bss.free_buf_count,"aw",%nobits
+	.set	.LANCHOR52,. + 0
+	.type	free_buf_count, %object
+	.size	free_buf_count, 1
+free_buf_count:
+	.space	1
+	.section	.bss.free_mix_sblk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR99,. + 0
+	.type	free_mix_sblk, %object
+	.size	free_mix_sblk, 2
+free_mix_sblk:
+	.space	2
+	.section	.bss.free_slc_sblk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR95,. + 0
+	.type	free_slc_sblk, %object
+	.size	free_slc_sblk, 2
+free_slc_sblk:
+	.space	2
+	.section	.bss.free_xlc_sblk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR97,. + 0
+	.type	free_xlc_sblk, %object
+	.size	free_xlc_sblk, 2
+free_xlc_sblk:
+	.space	2
+	.section	.bss.ftl_ext_info_data_buffer,"aw",%nobits
+	.align	6
+	.type	ftl_ext_info_data_buffer, %object
+	.size	ftl_ext_info_data_buffer, 16384
+ftl_ext_info_data_buffer:
+	.space	16384
+	.section	.bss.ftl_ext_info_first_write,"aw",%nobits
+	.set	.LANCHOR183,. + 0
+	.type	ftl_ext_info_first_write, %object
+	.size	ftl_ext_info_first_write, 1
+ftl_ext_info_first_write:
+	.space	1
+	.section	.bss.ftl_flush_jiffies,"aw",%nobits
+	.align	2
+	.set	.LANCHOR217,. + 0
+	.type	ftl_flush_jiffies, %object
+	.size	ftl_flush_jiffies, 4
+ftl_flush_jiffies:
+	.space	4
+	.section	.bss.ftl_info_data_buffer,"aw",%nobits
+	.align	6
+	.type	ftl_info_data_buffer, %object
+	.size	ftl_info_data_buffer, 16384
+ftl_info_data_buffer:
+	.space	16384
+	.section	.bss.ftl_info_spare,"aw",%nobits
+	.align	6
+	.set	.LANCHOR178,. + 0
+	.type	ftl_info_spare, %object
+	.size	ftl_info_spare, 256
+ftl_info_spare:
+	.space	256
+	.section	.bss.ftl_low_format_cur_blk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR60,. + 0
+	.type	ftl_low_format_cur_blk, %object
+	.size	ftl_low_format_cur_blk, 2
+ftl_low_format_cur_blk:
+	.space	2
+	.section	.bss.ftl_power_lost_flag,"aw",%nobits
+	.set	.LANCHOR182,. + 0
+	.type	ftl_power_lost_flag, %object
+	.size	ftl_power_lost_flag, 1
+ftl_power_lost_flag:
+	.space	1
+	.section	.bss.ftl_sblk_lpa_tbl,"aw",%nobits
+	.align	2
+	.set	.LANCHOR109,. + 0
+	.type	ftl_sblk_lpa_tbl, %object
+	.size	ftl_sblk_lpa_tbl, 4
+ftl_sblk_lpa_tbl:
+	.space	4
+	.section	.bss.ftl_sblk_update_list,"aw",%nobits
+	.align	1
+	.set	.LANCHOR65,. + 0
+	.type	ftl_sblk_update_list, %object
+	.size	ftl_sblk_update_list, 16
+ftl_sblk_update_list:
+	.space	16
+	.section	.bss.ftl_sblk_update_list_offset,"aw",%nobits
+	.align	1
+	.set	.LANCHOR115,. + 0
+	.type	ftl_sblk_update_list_offset, %object
+	.size	ftl_sblk_update_list_offset, 2
+ftl_sblk_update_list_offset:
+	.space	2
+	.section	.bss.ftl_sblk_vpn,"aw",%nobits
+	.align	2
+	.set	.LANCHOR9,. + 0
+	.type	ftl_sblk_vpn, %object
+	.size	ftl_sblk_vpn, 4
+ftl_sblk_vpn:
+	.space	4
+	.section	.bss.ftl_sblk_vpn_update_id,"aw",%nobits
+	.align	1
+	.set	.LANCHOR64,. + 0
+	.type	ftl_sblk_vpn_update_id, %object
+	.size	ftl_sblk_vpn_update_id, 2
+ftl_sblk_vpn_update_id:
+	.space	2
+	.section	.bss.ftl_sys_info_first_write,"aw",%nobits
+	.set	.LANCHOR181,. + 0
+	.type	ftl_sys_info_first_write, %object
+	.size	ftl_sys_info_first_write, 1
+ftl_sys_info_first_write:
+	.space	1
+	.section	.bss.ftl_tmp_buffer,"aw",%nobits
+	.align	6
+	.type	ftl_tmp_buffer, %object
+	.size	ftl_tmp_buffer, 16384
+ftl_tmp_buffer:
+	.space	16384
+	.section	.bss.ftl_tmp_spare,"aw",%nobits
+	.align	6
+	.set	.LANCHOR176,. + 0
+	.type	ftl_tmp_spare, %object
+	.size	ftl_tmp_spare, 256
+ftl_tmp_spare:
+	.space	256
+	.section	.bss.ftl_vpn_update_count,"aw",%nobits
+	.align	1
+	.set	.LANCHOR113,. + 0
+	.type	ftl_vpn_update_count, %object
+	.size	ftl_vpn_update_count, 2
+ftl_vpn_update_count:
+	.space	2
+	.section	.bss.g_block_align_addr,"aw",%nobits
+	.align	1
+	.set	.LANCHOR2,. + 0
+	.type	g_block_align_addr, %object
+	.size	g_block_align_addr, 2
+g_block_align_addr:
+	.space	2
+	.section	.bss.g_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR50,. + 0
+	.type	g_buf, %object
+	.size	g_buf, 1536
+g_buf:
+	.space	1536
+	.section	.bss.g_die_addr,"aw",%nobits
+	.align	2
+	.set	.LANCHOR141,. + 0
+	.type	g_die_addr, %object
+	.size	g_die_addr, 32
+g_die_addr:
+	.space	32
+	.section	.bss.g_die_cs_idx,"aw",%nobits
+	.align	2
+	.set	.LANCHOR30,. + 0
+	.type	g_die_cs_idx, %object
+	.size	g_die_cs_idx, 8
+g_die_cs_idx:
+	.space	8
+	.section	.bss.g_flash_3d_mlc_flag,"aw",%nobits
+	.set	.LANCHOR72,. + 0
+	.type	g_flash_3d_mlc_flag, %object
+	.size	g_flash_3d_mlc_flag, 1
+g_flash_3d_mlc_flag:
+	.space	1
+	.section	.bss.g_flash_3d_tlc_flag,"aw",%nobits
+	.set	.LANCHOR75,. + 0
+	.type	g_flash_3d_tlc_flag, %object
+	.size	g_flash_3d_tlc_flag, 1
+g_flash_3d_tlc_flag:
+	.space	1
+	.section	.bss.g_flash_blk_info,"aw",%nobits
+	.align	1
+	.set	.LANCHOR195,. + 0
+	.type	g_flash_blk_info, %object
+	.size	g_flash_blk_info, 4
+g_flash_blk_info:
+	.space	4
+	.section	.bss.g_flash_cur_mode,"aw",%nobits
+	.set	.LANCHOR32,. + 0
+	.type	g_flash_cur_mode, %object
+	.size	g_flash_cur_mode, 4
+g_flash_cur_mode:
+	.space	4
+	.section	.bss.g_flash_interface_mode,"aw",%nobits
+	.set	.LANCHOR43,. + 0
+	.type	g_flash_interface_mode, %object
+	.size	g_flash_interface_mode, 1
+g_flash_interface_mode:
+	.space	1
+	.section	.bss.g_flash_multi_page_prog_en,"aw",%nobits
+	.set	.LANCHOR39,. + 0
+	.type	g_flash_multi_page_prog_en, %object
+	.size	g_flash_multi_page_prog_en, 1
+g_flash_multi_page_prog_en:
+	.space	1
+	.section	.bss.g_flash_multi_page_read_en,"aw",%nobits
+	.set	.LANCHOR168,. + 0
+	.type	g_flash_multi_page_read_en, %object
+	.size	g_flash_multi_page_read_en, 1
+g_flash_multi_page_read_en:
+	.space	1
+	.section	.bss.g_flash_page_buffer,"aw",%nobits
+	.align	2
+	.set	.LANCHOR164,. + 0
+	.type	g_flash_page_buffer, %object
+	.size	g_flash_page_buffer, 4
+g_flash_page_buffer:
+	.space	4
+	.section	.bss.g_flash_reversd_blks,"aw",%nobits
+	.set	.LANCHOR200,. + 0
+	.type	g_flash_reversd_blks, %object
+	.size	g_flash_reversd_blks, 1
+g_flash_reversd_blks:
+	.space	1
+	.section	.bss.g_flash_slc_mode,"aw",%nobits
+	.set	.LANCHOR0,. + 0
+	.type	g_flash_slc_mode, %object
+	.size	g_flash_slc_mode, 1
+g_flash_slc_mode:
+	.space	1
+	.section	.bss.g_flash_spare_buffer,"aw",%nobits
+	.align	2
+	.set	.LANCHOR163,. + 0
+	.type	g_flash_spare_buffer, %object
+	.size	g_flash_spare_buffer, 4
+g_flash_spare_buffer:
+	.space	4
+	.section	.bss.g_flash_sys_spare_buffer,"aw",%nobits
+	.align	2
+	.set	.LANCHOR194,. + 0
+	.type	g_flash_sys_spare_buffer, %object
+	.size	g_flash_sys_spare_buffer, 4
+g_flash_sys_spare_buffer:
+	.space	4
+	.section	.bss.g_flash_tmp_page_buffer,"aw",%nobits
+	.align	2
+	.set	.LANCHOR156,. + 0
+	.type	g_flash_tmp_page_buffer, %object
+	.size	g_flash_tmp_page_buffer, 4
+g_flash_tmp_page_buffer:
+	.space	4
+	.section	.bss.g_flash_tmp_spare_buffer,"aw",%nobits
+	.align	2
+	.set	.LANCHOR158,. + 0
+	.type	g_flash_tmp_spare_buffer, %object
+	.size	g_flash_tmp_spare_buffer, 4
+g_flash_tmp_spare_buffer:
+	.space	4
+	.section	.bss.g_flash_toggle_mode_en,"aw",%nobits
+	.set	.LANCHOR21,. + 0
+	.type	g_flash_toggle_mode_en, %object
+	.size	g_flash_toggle_mode_en, 1
+g_flash_toggle_mode_en:
+	.space	1
+	.section	.bss.g_ftl_info_blk,"aw",%nobits
+	.align	6
+	.set	.LANCHOR179,. + 0
+	.type	g_ftl_info_blk, %object
+	.size	g_ftl_info_blk, 4
+g_ftl_info_blk:
+	.space	4
+	.section	.bss.g_gc_info,"aw",%nobits
+	.align	2
+	.set	.LANCHOR63,. + 0
+	.type	g_gc_info, %object
+	.size	g_gc_info, 340
+g_gc_info:
+	.space	340
+	.section	.bss.g_idb_ecc_bits,"aw",%nobits
+	.set	.LANCHOR17,. + 0
+	.type	g_idb_ecc_bits, %object
+	.size	g_idb_ecc_bits, 1
+g_idb_ecc_bits:
+	.space	1
+	.section	.bss.g_idb_slc_mode_enable,"aw",%nobits
+	.set	.LANCHOR19,. + 0
+	.type	g_idb_slc_mode_enable, %object
+	.size	g_idb_slc_mode_enable, 1
+g_idb_slc_mode_enable:
+	.space	1
+	.section	.bss.g_lsb_page_tbl,"aw",%nobits
+	.align	2
+	.set	.LANCHOR3,. + 0
+	.type	g_lsb_page_tbl, %object
+	.size	g_lsb_page_tbl, 512
+g_lsb_page_tbl:
+	.space	512
+	.section	.bss.g_maxRegNum,"aw",%nobits
+	.set	.LANCHOR26,. + 0
+	.type	g_maxRegNum, %object
+	.size	g_maxRegNum, 1
+g_maxRegNum:
+	.space	1
+	.section	.bss.g_maxRetryCount,"aw",%nobits
+	.set	.LANCHOR159,. + 0
+	.type	g_maxRetryCount, %object
+	.size	g_maxRetryCount, 1
+g_maxRetryCount:
+	.space	1
+	.section	.bss.g_msb_page_tbl,"aw",%nobits
+	.align	2
+	.set	.LANCHOR138,. + 0
+	.type	g_msb_page_tbl, %object
+	.size	g_msb_page_tbl, 1024
+g_msb_page_tbl:
+	.space	1024
+	.section	.bss.g_nand_max_die,"aw",%nobits
+	.set	.LANCHOR18,. + 0
+	.type	g_nand_max_die, %object
+	.size	g_nand_max_die, 1
+g_nand_max_die:
+	.space	1
+	.section	.bss.g_nand_opt_para,"aw",%nobits
+	.set	.LANCHOR20,. + 0
+	.type	g_nand_opt_para, %object
+	.size	g_nand_opt_para, 32
+g_nand_opt_para:
+	.space	32
+	.section	.bss.g_nandc_ecc_bits,"aw",%nobits
+	.set	.LANCHOR44,. + 0
+	.type	g_nandc_ecc_bits, %object
+	.size	g_nandc_ecc_bits, 1
+g_nandc_ecc_bits:
+	.space	1
+	.section	.bss.g_nandc_tran_timeout,"aw",%nobits
+	.set	.LANCHOR157,. + 0
+	.type	g_nandc_tran_timeout, %object
+	.size	g_nandc_tran_timeout, 1
+g_nandc_tran_timeout:
+	.space	1
+	.section	.bss.g_nandc_v6_master_info,"aw",%nobits
+	.align	2
+	.set	.LANCHOR47,. + 0
+	.type	g_nandc_v6_master_info, %object
+	.size	g_nandc_v6_master_info, 28
+g_nandc_v6_master_info:
+	.space	28
+	.section	.bss.g_nandc_ver,"aw",%nobits
+	.set	.LANCHOR28,. + 0
+	.type	g_nandc_ver, %object
+	.size	g_nandc_ver, 1
+g_nandc_ver:
+	.space	1
+	.section	.bss.g_one_pass_program,"aw",%nobits
+	.set	.LANCHOR73,. + 0
+	.type	g_one_pass_program, %object
+	.size	g_one_pass_program, 1
+g_one_pass_program:
+	.space	1
+	.section	.bss.g_pm_spare,"aw",%nobits
+	.align	2
+	.set	.LANCHOR191,. + 0
+	.type	g_pm_spare, %object
+	.size	g_pm_spare, 4
+g_pm_spare:
+	.space	4
+	.section	.bss.g_retryMode,"aw",%nobits
+	.set	.LANCHOR23,. + 0
+	.type	g_retryMode, %object
+	.size	g_retryMode, 1
+g_retryMode:
+	.space	1
+	.section	.bss.g_slc_mode_addr2,"aw",%nobits
+	.set	.LANCHOR1,. + 0
+	.type	g_slc_mode_addr2, %object
+	.size	g_slc_mode_addr2, 1
+g_slc_mode_addr2:
+	.space	1
+	.section	.bss.g_slc_mode_enable,"aw",%nobits
+	.type	g_slc_mode_enable, %object
+	.size	g_slc_mode_enable, 1
+g_slc_mode_enable:
+	.space	1
+	.section	.bss.g_slc_page_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR140,. + 0
+	.type	g_slc_page_num, %object
+	.size	g_slc_page_num, 2
+g_slc_page_num:
+	.space	2
+	.section	.bss.g_totle_phy_block,"aw",%nobits
+	.align	1
+	.set	.LANCHOR142,. + 0
+	.type	g_totle_phy_block, %object
+	.size	g_totle_phy_block, 2
+g_totle_phy_block:
+	.space	2
+	.section	.bss.gc_des_ppa_tbl,"aw",%nobits
+	.align	2
+	.set	.LANCHOR154,. + 0
+	.type	gc_des_ppa_tbl, %object
+	.size	gc_des_ppa_tbl, 4
+gc_des_ppa_tbl:
+	.space	4
+	.section	.bss.gc_free_slc_sblk_th,"aw",%nobits
+	.align	1
+	.set	.LANCHOR79,. + 0
+	.type	gc_free_slc_sblk_th, %object
+	.size	gc_free_slc_sblk_th, 2
+gc_free_slc_sblk_th:
+	.space	2
+	.section	.bss.gc_lpa_tbl,"aw",%nobits
+	.align	2
+	.set	.LANCHOR152,. + 0
+	.type	gc_lpa_tbl, %object
+	.size	gc_lpa_tbl, 4
+gc_lpa_tbl:
+	.space	4
+	.section	.bss.gc_mode,"aw",%nobits
+	.set	.LANCHOR76,. + 0
+	.type	gc_mode, %object
+	.size	gc_mode, 1
+gc_mode:
+	.space	1
+	.section	.bss.gc_page_buf_id,"aw",%nobits
+	.align	2
+	.set	.LANCHOR74,. + 0
+	.type	gc_page_buf_id, %object
+	.size	gc_page_buf_id, 4
+gc_page_buf_id:
+	.space	4
+	.section	.bss.gc_pre_ppa_tbl,"aw",%nobits
+	.align	2
+	.set	.LANCHOR153,. + 0
+	.type	gc_pre_ppa_tbl, %object
+	.size	gc_pre_ppa_tbl, 4
+gc_pre_ppa_tbl:
+	.space	4
+	.section	.bss.gc_search_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR151,. + 0
+	.type	gc_search_count, %object
+	.size	gc_search_count, 4
+gc_search_count:
+	.space	4
+	.section	.bss.gc_slc_cache_index,"aw",%nobits
+	.align	1
+	.set	.LANCHOR82,. + 0
+	.type	gc_slc_cache_index, %object
+	.size	gc_slc_cache_index, 2
+gc_slc_cache_index:
+	.space	2
+	.section	.bss.gc_slc_data_index,"aw",%nobits
+	.align	1
+	.set	.LANCHOR86,. + 0
+	.type	gc_slc_data_index, %object
+	.size	gc_slc_data_index, 2
+gc_slc_data_index:
+	.space	2
+	.section	.bss.gc_slc_mode_tlc_vpn_th,"aw",%nobits
+	.align	1
+	.set	.LANCHOR84,. + 0
+	.type	gc_slc_mode_tlc_vpn_th, %object
+	.size	gc_slc_mode_tlc_vpn_th, 2
+gc_slc_mode_tlc_vpn_th:
+	.space	2
+	.section	.bss.gc_slc_mode_vpn_th,"aw",%nobits
+	.align	1
+	.set	.LANCHOR62,. + 0
+	.type	gc_slc_mode_vpn_th, %object
+	.size	gc_slc_mode_vpn_th, 2
+gc_slc_mode_vpn_th:
+	.space	2
+	.section	.bss.gc_state,"aw",%nobits
+	.set	.LANCHOR150,. + 0
+	.type	gc_state, %object
+	.size	gc_state, 1
+gc_state:
+	.space	1
+	.section	.bss.gc_tlc_mode_slc_vpn_th,"aw",%nobits
+	.align	1
+	.set	.LANCHOR94,. + 0
+	.type	gc_tlc_mode_slc_vpn_th, %object
+	.size	gc_tlc_mode_slc_vpn_th, 2
+gc_tlc_mode_slc_vpn_th:
+	.space	2
+	.section	.bss.gc_tlc_mode_tlc_vpn_th,"aw",%nobits
+	.align	1
+	.set	.LANCHOR91,. + 0
+	.type	gc_tlc_mode_tlc_vpn_th, %object
+	.size	gc_tlc_mode_tlc_vpn_th, 2
+gc_tlc_mode_tlc_vpn_th:
+	.space	2
+	.section	.bss.gc_valid_page_ppa,"aw",%nobits
+	.align	2
+	.set	.LANCHOR68,. + 0
+	.type	gc_valid_page_ppa, %object
+	.size	gc_valid_page_ppa, 4
+gc_valid_page_ppa:
+	.space	4
+	.section	.bss.gc_xlc_data_index,"aw",%nobits
+	.align	1
+	.set	.LANCHOR83,. + 0
+	.type	gc_xlc_data_index, %object
+	.size	gc_xlc_data_index, 2
+gc_xlc_data_index:
+	.space	2
+	.section	.bss.gc_xlc_search_index,"aw",%nobits
+	.align	1
+	.set	.LANCHOR87,. + 0
+	.type	gc_xlc_search_index, %object
+	.size	gc_xlc_search_index, 2
+gc_xlc_search_index:
+	.space	2
+	.section	.bss.gp_blk_info,"aw",%nobits
+	.align	2
+	.set	.LANCHOR7,. + 0
+	.type	gp_blk_info, %object
+	.size	gp_blk_info, 4
+gp_blk_info:
+	.space	4
+	.section	.bss.gp_data_slc_cache_head,"aw",%nobits
+	.align	2
+	.set	.LANCHOR81,. + 0
+	.type	gp_data_slc_cache_head, %object
+	.size	gp_data_slc_cache_head, 4
+gp_data_slc_cache_head:
+	.space	4
+	.section	.bss.gp_data_slc_data_head,"aw",%nobits
+	.align	2
+	.set	.LANCHOR12,. + 0
+	.type	gp_data_slc_data_head, %object
+	.size	gp_data_slc_data_head, 4
+gp_data_slc_data_head:
+	.space	4
+	.section	.bss.gp_data_xlc_data_head,"aw",%nobits
+	.align	2
+	.set	.LANCHOR80,. + 0
+	.type	gp_data_xlc_data_head, %object
+	.size	gp_data_xlc_data_head, 4
+gp_data_xlc_data_head:
+	.space	4
+	.section	.bss.gp_flash_check_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR137,. + 0
+	.type	gp_flash_check_buf, %object
+	.size	gp_flash_check_buf, 4
+gp_flash_check_buf:
+	.space	4
+	.section	.bss.gp_flash_info,"aw",%nobits
+	.align	2
+	.set	.LANCHOR27,. + 0
+	.type	gp_flash_info, %object
+	.size	gp_flash_info, 4
+gp_flash_info:
+	.space	4
+	.section	.bss.gp_free_mix_head,"aw",%nobits
+	.align	2
+	.set	.LANCHOR100,. + 0
+	.type	gp_free_mix_head, %object
+	.size	gp_free_mix_head, 4
+gp_free_mix_head:
+	.space	4
+	.section	.bss.gp_free_slc_head,"aw",%nobits
+	.align	2
+	.set	.LANCHOR96,. + 0
+	.type	gp_free_slc_head, %object
+	.size	gp_free_slc_head, 4
+gp_free_slc_head:
+	.space	4
+	.section	.bss.gp_free_xlc_head,"aw",%nobits
+	.align	2
+	.set	.LANCHOR98,. + 0
+	.type	gp_free_xlc_head, %object
+	.size	gp_free_xlc_head, 4
+gp_free_xlc_head:
+	.space	4
+	.section	.bss.gp_ftl_ext_info,"aw",%nobits
+	.align	2
+	.set	.LANCHOR10,. + 0
+	.type	gp_ftl_ext_info, %object
+	.size	gp_ftl_ext_info, 4
+gp_ftl_ext_info:
+	.space	4
+	.section	.bss.gp_ftl_info,"aw",%nobits
+	.align	2
+	.set	.LANCHOR102,. + 0
+	.type	gp_ftl_info, %object
+	.size	gp_ftl_info, 4
+gp_ftl_info:
+	.space	4
+	.section	.bss.gp_nand_para_info,"aw",%nobits
+	.align	2
+	.set	.LANCHOR16,. + 0
+	.type	gp_nand_para_info, %object
+	.size	gp_nand_para_info, 4
+gp_nand_para_info:
+	.space	4
+	.section	.bss.gp_nandc,"aw",%nobits
+	.align	2
+	.set	.LANCHOR13,. + 0
+	.type	gp_nandc, %object
+	.size	gp_nandc, 4
+gp_nandc:
+	.space	4
+	.section	.bss.gp_sblk_list_tbl,"aw",%nobits
+	.align	2
+	.set	.LANCHOR4,. + 0
+	.type	gp_sblk_list_tbl, %object
+	.size	gp_sblk_list_tbl, 4
+gp_sblk_list_tbl:
+	.space	4
+	.section	.bss.idb_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR135,. + 0
+	.type	idb_buf, %object
+	.size	idb_buf, 4
+idb_buf:
+	.space	4
+	.section	.bss.idb_need_write_back,"aw",%nobits
+	.align	2
+	.set	.LANCHOR136,. + 0
+	.type	idb_need_write_back, %object
+	.size	idb_need_write_back, 4
+idb_need_write_back:
+	.space	4
+	.section	.bss.lpa_hash,"aw",%nobits
+	.align	1
+	.set	.LANCHOR108,. + 0
+	.type	lpa_hash, %object
+	.size	lpa_hash, 512
+lpa_hash:
+	.space	512
+	.section	.bss.lpa_hash_index,"aw",%nobits
+	.align	2
+	.set	.LANCHOR110,. + 0
+	.type	lpa_hash_index, %object
+	.size	lpa_hash_index, 4
+lpa_hash_index:
+	.space	4
+	.section	.bss.nandc_ecc_sts,"aw",%nobits
+	.type	nandc_ecc_sts, %object
+	.size	nandc_ecc_sts, 16
+nandc_ecc_sts:
+	.space	16
+	.section	.bss.nandc_hw_seed,"aw",%nobits
+	.set	.LANCHOR45,. + 0
+	.type	nandc_hw_seed, %object
+	.size	nandc_hw_seed, 1
+nandc_hw_seed:
+	.space	1
+	.section	.bss.nandc_randomizer_en,"aw",%nobits
+	.set	.LANCHOR46,. + 0
+	.type	nandc_randomizer_en, %object
+	.size	nandc_randomizer_en, 1
+nandc_randomizer_en:
+	.space	1
+	.section	.bss.p_free_buf_head,"aw",%nobits
+	.set	.LANCHOR51,. + 0
+	.type	p_free_buf_head, %object
+	.size	p_free_buf_head, 1
+p_free_buf_head:
+	.space	1
+	.section	.bss.p_read_ahead_ext_buf,"aw",%nobits
+	.align	2
+	.type	p_read_ahead_ext_buf, %object
+	.size	p_read_ahead_ext_buf, 4
+p_read_ahead_ext_buf:
+	.space	4
+	.section	.bss.pm_first_write,"aw",%nobits
+	.set	.LANCHOR192,. + 0
+	.type	pm_first_write, %object
+	.size	pm_first_write, 1
+pm_first_write:
+	.space	1
+	.section	.bss.pm_gc_enable,"aw",%nobits
+	.align	2
+	.set	.LANCHOR130,. + 0
+	.type	pm_gc_enable, %object
+	.size	pm_gc_enable, 4
+pm_gc_enable:
+	.space	4
+	.section	.bss.pm_last_load_ram_id,"aw",%nobits
+	.set	.LANCHOR205,. + 0
+	.type	pm_last_load_ram_id, %object
+	.size	pm_last_load_ram_id, 1
+pm_last_load_ram_id:
+	.space	1
+	.section	.bss.pm_last_update_ram_id,"aw",%nobits
+	.set	.LANCHOR133,. + 0
+	.type	pm_last_update_ram_id, %object
+	.size	pm_last_update_ram_id, 1
+pm_last_update_ram_id:
+	.space	1
+	.section	.bss.pm_ram_info,"aw",%nobits
+	.align	2
+	.set	.LANCHOR132,. + 0
+	.type	pm_ram_info, %object
+	.size	pm_ram_info, 256
+pm_ram_info:
+	.space	256
+	.section	.bss.read_ahead_lpa,"aw",%nobits
+	.align	2
+	.set	.LANCHOR206,. + 0
+	.type	read_ahead_lpa, %object
+	.size	read_ahead_lpa, 4
+read_ahead_lpa:
+	.space	4
+	.section	.bss.read_buf_count,"aw",%nobits
+	.set	.LANCHOR127,. + 0
+	.type	read_buf_count, %object
+	.size	read_buf_count, 1
+read_buf_count:
+	.space	1
+	.section	.bss.read_buf_head,"aw",%nobits
+	.set	.LANCHOR126,. + 0
+	.type	read_buf_head, %object
+	.size	read_buf_head, 1
+read_buf_head:
+	.space	1
+	.section	.bss.sblk_gc_write_completed_queue_head,"aw",%nobits
+	.set	.LANCHOR69,. + 0
+	.type	sblk_gc_write_completed_queue_head, %object
+	.size	sblk_gc_write_completed_queue_head, 1
+sblk_gc_write_completed_queue_head:
+	.space	1
+	.section	.bss.sblk_queue_head,"aw",%nobits
+	.set	.LANCHOR54,. + 0
+	.type	sblk_queue_head, %object
+	.size	sblk_queue_head, 1
+sblk_queue_head:
+	.space	1
+	.section	.bss.sblk_read_completed_queue_head,"aw",%nobits
+	.set	.LANCHOR129,. + 0
+	.type	sblk_read_completed_queue_head, %object
+	.size	sblk_read_completed_queue_head, 1
+sblk_read_completed_queue_head:
+	.space	1
+	.section	.bss.sblk_write_completed_queue_head,"aw",%nobits
+	.set	.LANCHOR124,. + 0
+	.type	sblk_write_completed_queue_head, %object
+	.size	sblk_write_completed_queue_head, 1
+sblk_write_completed_queue_head:
+	.space	1
+	.section	.bss.slc_cache_sblk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR88,. + 0
+	.type	slc_cache_sblk, %object
+	.size	slc_cache_sblk, 2
+slc_cache_sblk:
+	.space	2
+	.section	.bss.slc_data_sblk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR90,. + 0
+	.type	slc_data_sblk, %object
+	.size	slc_data_sblk, 2
+slc_data_sblk:
+	.space	2
+	.section	.bss.write_buf_count,"aw",%nobits
+	.set	.LANCHOR58,. + 0
+	.type	write_buf_count, %object
+	.size	write_buf_count, 1
+write_buf_count:
+	.space	1
+	.section	.bss.write_buf_head,"aw",%nobits
+	.set	.LANCHOR57,. + 0
+	.type	write_buf_head, %object
+	.size	write_buf_head, 1
+write_buf_head:
+	.space	1
+	.section	.bss.write_commit_count,"aw",%nobits
+	.set	.LANCHOR121,. + 0
+	.type	write_commit_count, %object
+	.size	write_commit_count, 1
+write_commit_count:
+	.space	1
+	.section	.bss.write_commit_head,"aw",%nobits
+	.set	.LANCHOR174,. + 0
+	.type	write_commit_head, %object
+	.size	write_commit_head, 1
+write_commit_head:
+	.space	1
+	.section	.bss.xlc_data_sblk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR92,. + 0
+	.type	xlc_data_sblk, %object
+	.size	xlc_data_sblk, 2
+xlc_data_sblk:
+	.space	2
+	.section	.bss.zftl_print_list_count,"aw",%nobits
+	.align	1
+	.set	.LANCHOR101,. + 0
+	.type	zftl_print_list_count, %object
+	.size	zftl_print_list_count, 2
+zftl_print_list_count:
+	.space	2
+	.section	.data.g_nand_para_info,"aw",%progbits
+	.align	1
+	.set	.LANCHOR31,. + 0
+	.type	g_nand_para_info, %object
+	.size	g_nand_para_info, 32
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+	.set	.LANCHOR155,. + 0
+	.type	hy_f26_ref_value, %object
+	.size	hy_f26_ref_value, 28
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+	.type	nand_opt_para, %object
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+	.type	sd15_slc_rr, %object
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+	.type	sd15_tlc_rr, %object
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+	.section	.data.zftl_debug,"aw",%progbits
+	.align	2
+	.set	.LANCHOR14,. + 0
+	.type	zftl_debug, %object
+	.size	zftl_debug, 4
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+	.section	.data.zftl_nand_flash_para_tbl,"aw",%progbits
+	.align	1
+	.set	.LANCHOR198,. + 0
+	.type	zftl_nand_flash_para_tbl, %object
+	.size	zftl_nand_flash_para_tbl, 1216
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@@ -21353,190 +28001,78 @@ NandFlashParaTbl:
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+	.size	__func__.9705, 26
+__func__.9705:
 	.ascii	"flash_start_tlc_page_prog\000"
-	.section	.rodata.__func__.9592,"a",%progbits
-	.set	.LANCHOR125,. + 0
-	.type	__func__.9592, %object
-	.size	__func__.9592, 22
-__func__.9592:
+	.section	.rodata.__func__.9716,"a",%progbits
+	.set	.LANCHOR171,. + 0
+	.type	__func__.9716, %object
+	.size	__func__.9716, 29
+__func__.9716:
+	.ascii	"flash_start_3d_mlc_page_prog\000"
+	.section	.rodata.__func__.9734,"a",%progbits
+	.set	.LANCHOR172,. + 0
+	.type	__func__.9734, %object
+	.size	__func__.9734, 22
+__func__.9734:
 	.ascii	"flash_start_page_prog\000"
-	.section	.rodata.__func__.9605,"a",%progbits
+	.section	.rodata.__func__.9745,"a",%progbits
 	.set	.LANCHOR33,. + 0
-	.type	__func__.9605, %object
-	.size	__func__.9605, 22
-__func__.9605:
+	.type	__func__.9745, %object
+	.size	__func__.9745, 22
+__func__.9745:
 	.ascii	"flash_start_page_read\000"
-	.section	.rodata.__func__.9620,"a",%progbits
-	.set	.LANCHOR120,. + 0
-	.type	__func__.9620, %object
-	.size	__func__.9620, 25
-__func__.9620:
+	.section	.rodata.__func__.9758,"a",%progbits
+	.set	.LANCHOR165,. + 0
+	.type	__func__.9758, %object
+	.size	__func__.9758, 31
+__func__.9758:
+	.ascii	"flash_complete_plane_page_read\000"
+	.section	.rodata.__func__.9770,"a",%progbits
+	.set	.LANCHOR41,. + 0
+	.type	__func__.9770, %object
+	.size	__func__.9770, 23
+__func__.9770:
+	.ascii	"flash_start_plane_read\000"
+	.section	.rodata.__func__.9783,"a",%progbits
+	.set	.LANCHOR166,. + 0
+	.type	__func__.9783, %object
+	.size	__func__.9783, 25
+__func__.9783:
 	.ascii	"flash_complete_page_read\000"
-	.section	.rodata.do_gc.str1.1,"aMS",%progbits,1
-.LC153:
-	.ascii	"gc %d: %d %d %d %d %d %d\012\000"
-.LC154:
-	.ascii	"GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\012"
-	.ascii	"\000"
-.LC155:
-	.ascii	"gc free %x, %d\012\000"
+	.section	.rodata._list_remove_node.str1.1,"aMS",%progbits,1
+.LC0:
+	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
 	.section	.rodata.dump_ftl_info.str1.1,"aMS",%progbits,1
-.LC81:
+.LC172:
+	.ascii	"free_buf_count: %d\012\000"
+.LC173:
 	.ascii	"g_ftl_info_blk blk:0x%x, index:0x%x, page:0x%x\012\000"
-.LC82:
+.LC174:
 	.ascii	"ftl_ext_info_blk blk:0x%x, page:0x%x\012\000"
-.LC83:
+.LC175:
 	.ascii	"ac_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page"
 	.ascii	"_index:0x%x\012\000"
-.LC84:
+.LC176:
 	.ascii	"tmp_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, pag"
 	.ascii	"e_index:0x%x\012\000"
-.LC85:
+.LC177:
 	.ascii	"gc_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page"
 	.ascii	"_index:0x%x\012\000"
-.LC86:
+.LC178:
 	.ascii	"lpa:\000"
-.LC87:
+.LC179:
 	.ascii	"vpn:\000"
-.LC88:
+.LC180:
 	.ascii	"sblk:\000"
-.LC89:
+.LC181:
 	.ascii	"lpa_hash:\000"
-.LC90:
+.LC182:
 	.ascii	"lpa_hash_index:\000"
 	.section	.rodata.dump_sblk_queue.str1.1,"aMS",%progbits,1
-.LC24:
+.LC74:
 	.ascii	"dump_sblk_queue: %d\012\000"
-.LC25:
+.LC75:
 	.ascii	"buf id= %d state = %d ppa = %x\012\000"
 	.section	.rodata.flash_complete_page_read.str1.1,"aMS",%progbits,1
-.LC54:
+.LC122:
 	.ascii	"flash_complete_page_read %x %x error_ecc %d %d\012\000"
-	.section	.rodata.flash_ddr_tunning_read.str1.1,"aMS",%progbits,1
-.LC48:
-	.ascii	"%d flash_ddr_tunning_read %x ecc=%d\012\000"
-.LC49:
+	.section	.rodata.flash_ddr_tuning_read.str1.1,"aMS",%progbits,1
+.LC115:
+	.ascii	"%d flash_ddr_tuning_read %x ecc=%d\012\000"
+.LC116:
 	.ascii	"sync para %d\012\000"
-.LC50:
+.LC117:
 	.ascii	"DDR mode Read error %x %x\012\000"
+.LC118:
+	.ascii	"SDR mode Read %x %x ecc:%x\012\000"
 	.section	.rodata.flash_erase_all.str1.1,"aMS",%progbits,1
-.LC5:
+.LC36:
 	.ascii	"erase done: %x\012\000"
 	.section	.rodata.flash_erase_block_en.str1.1,"aMS",%progbits,1
-.LC3:
-	.ascii	"flash_erase_block %x %x\012\000"
-.LC4:
-	.ascii	"flash_erase_block block = %x status = %x\012\000"
+.LC34:
+	.ascii	"flash_erase_block %x %x %x\012\000"
+.LC35:
+	.ascii	"flash_erase_block %d block = %x status = %x\012\000"
 	.section	.rodata.flash_erase_duplane_block.str1.1,"aMS",%progbits,1
-.LC1:
+.LC32:
 	.ascii	"flash_erase_duplane_block %x %x %x\012\000"
-.LC2:
+.LC33:
 	.ascii	"flash_erase_duplane_block pageadd = %x status = %x\012"
 	.ascii	"\000"
+	.section	.rodata.flash_get_last_written_page.str1.1,"aMS",%progbits,1
+.LC121:
+	.ascii	"flash_get_last_written_page: %x %x %x\012\000"
 	.section	.rodata.flash_info_blk_init.str1.1,"aMS",%progbits,1
-.LC53:
+.LC169:
+	.ascii	"...%d @ %s %d %p\012\000"
+.LC170:
 	.ascii	"no sys info %x\012\000"
+	.section	.rodata.flash_info_data_init.str1.1,"aMS",%progbits,1
+.LC90:
+	.ascii	"...%d @ %s\012\000"
 	.section	.rodata.flash_info_flush.str1.1,"aMS",%progbits,1
-.LC77:
+.LC166:
 	.ascii	"finfo:\000"
-.LC78:
+.LC167:
 	.ascii	"flash_info_flush id = %x, page = %x\012\000"
-.LC79:
+.LC168:
 	.ascii	"sys_info_flush error:%x\012\000"
 	.section	.rodata.flash_mask_bad_block.str1.1,"aMS",%progbits,1
-.LC6:
+.LC42:
 	.ascii	"flash_mask_bad_block %d %d\012\000"
 	.section	.rodata.flash_prog_page.str1.1,"aMS",%progbits,1
-.LC57:
+.LC128:
 	.ascii	"flash_prog_page %x %x %x\012\000"
+.LC129:
+	.ascii	"flash_prog_page page_addr = %x status = %x\012\000"
 	.section	.rodata.flash_prog_page_en.str1.1,"aMS",%progbits,1
-.LC59:
-	.ascii	"flash_prog_page_en:%x %x\012\000"
-.LC60:
+.LC136:
+	.ascii	"flash_prog_page_en:%x %x %x\012\000"
+.LC137:
+	.ascii	"w d:\000"
+.LC138:
+	.ascii	"w s:\000"
+.LC139:
 	.ascii	"spare\000"
-.LC61:
+.LC140:
 	.ascii	"data\000"
-.LC62:
+.LC141:
 	.ascii	"write error: %x\012\000"
+	.section	.rodata.flash_read_id.str1.1,"aMS",%progbits,1
+.LC39:
+	.ascii	"No.%d FLASH ID:%x %x %x %x %x %x\012\000"
+	.section	.rodata.flash_read_otp_data.str1.1,"aMS",%progbits,1
+.LC40:
+	.ascii	"otp:%x %x %x %x\012\000"
 	.section	.rodata.flash_read_page.str1.1,"aMS",%progbits,1
-.LC41:
+.LC108:
 	.ascii	"flash_read_page %x %x %x\012\000"
 	.section	.rodata.flash_read_page_en.str1.1,"aMS",%progbits,1
-.LC51:
-	.ascii	"flash_read_page_en %x %x\012\000"
-.LC52:
+.LC119:
+	.ascii	"flash_read_page_en %x %x %x\012\000"
+.LC120:
 	.ascii	"flash_read_page_en %x %x error_ecc %d %d\012\000"
-	.section	.rodata.flash_wait_device_ready_raw.str1.1,"aMS",%progbits,1
-.LC0:
-	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
+	.section	.rodata.flash_set_interface_mode.str1.1,"aMS",%progbits,1
+.LC37:
+	.ascii	"nand sdr mode %x\012\000"
+.LC38:
+	.ascii	"nand ddr mode %x\012\000"
+	.section	.rodata.ftl_alloc_new_data_sblk.str1.1,"aMS",%progbits,1
+.LC230:
+	.ascii	"error gc_add_sblk: %x\012\000"
 	.section	.rodata.ftl_alloc_sblk.str1.1,"aMS",%progbits,1
-.LC14:
-	.ascii	"ftl_alloc_sblk %x, %d %d %d\012\000"
-	.section	.rodata.ftl_discard.str1.1,"aMS",%progbits,1
-.LC148:
-	.ascii	"ftl_discard:(%x, %x, %x, %x)\012\000"
+.LC73:
+	.ascii	"alloc sblk %x %d\012\000"
+	.section	.rodata.ftl_dump_write_open_sblk.str1.1,"aMS",%progbits,1
+.LC161:
+	.ascii	"ftl_sblk_dump_write = %x %d %d %d %d\012\000"
+.LC162:
+	.ascii	"blk= %x, page=%x, ppa = %x, status = %x, data:%x %x"
+	.ascii	" %x %x, spare: %x %x %x %x\012\000"
+.LC163:
+	.ascii	"ftl_sblk_dump_write2 = %x %d %d %d\012\000"
+.LC164:
+	.ascii	"ftl_sblk_dump_write = %x %x\012\000"
+.LC165:
+	.ascii	"ftl_sblk_dump_write done = %x\012\000"
+	.section	.rodata.ftl_ext_info_init.str1.1,"aMS",%progbits,1
+.LC147:
+	.ascii	"%s %d %d %x %x\012\000"
+	.section	.rodata.ftl_free_sblk.str1.1,"aMS",%progbits,1
+.LC61:
+	.ascii	"swl_tlc_free_mini_ec_blk sblk %x\012\000"
+.LC62:
+	.ascii	"swl_slc_free_mini_ec_blk sblk %x\012\000"
 	.section	.rodata.ftl_info_blk_init.str1.1,"aMS",%progbits,1
-.LC65:
+.LC144:
 	.ascii	"%d %x @%d %x\012\000"
-.LC66:
+.LC145:
 	.ascii	"ftl_info_blk_init %d %d %x\012\000"
-	.section	.rodata.ftl_info_check.str1.1,"aMS",%progbits,1
-.LC122:
-	.ascii	"free blk vpn error: %x %x\012\000"
-.LC123:
-	.ascii	"data blk: %d %d %d\012\000"
-.LC124:
-	.ascii	"free blk: %d %d %d\012\000"
+.LC146:
+	.ascii	"ink flag: %x\012\000"
 	.section	.rodata.ftl_info_flush.str1.1,"aMS",%progbits,1
-.LC64:
+.LC143:
 	.ascii	"g_ftl_info_blk blk = %x, page = %x version = %d\012"
 	.ascii	"\000"
-	.section	.rodata.ftl_init.str1.1,"aMS",%progbits,1
-.LC139:
-	.ascii	"FTL version: 6.0.3 20180211\000"
-.LC140:
-	.ascii	"gp_ftl_ext_info %p %p %p\012\000"
-.LC141:
-	.ascii	"flash info size: %d %d %d\012\000"
 	.section	.rodata.ftl_low_format.str1.1,"aMS",%progbits,1
-.LC67:
+.LC148:
+	.ascii	"ftl_low_format %d\012\000"
+.LC149:
 	.ascii	"low format %d %d %d %d\012\000"
 	.section	.rodata.ftl_mask_bad_block.str1.1,"aMS",%progbits,1
-.LC19:
-	.ascii	"mask bad block:cs %x block: %x\012\000"
+.LC59:
+	.ascii	"mask bad block:cs %x %x block: %x %x\012\000"
 	.section	.rodata.ftl_open_sblk_recovery.str1.1,"aMS",%progbits,1
-.LC69:
+.LC151:
 	.ascii	"saved_active_page  = %x\012\000"
-.LC70:
+.LC152:
 	.ascii	"saved_active_plane = %x\012\000"
-.LC71:
+.LC153:
 	.ascii	"sblk = %x\012\000"
-.LC72:
-	.ascii	"phy_blk = %x %x\012\000"
-.LC73:
-	.ascii	"blk= %x, page=%x, ppa = %x, status = %x, data:%x %x"
-	.ascii	" %x %x, spare: %x %x %x %x\012\000"
-.LC74:
+.LC154:
+	.ascii	"phy_blk = %x %x\012\000"
+.LC155:
 	.ascii	"sblk = %x, vpn0 = %d, vpn1 = %d\012\000"
-.LC75:
-	.ascii	"dump write = %x\012\000"
-	.section	.rodata.ftl_re_low_format_test.str1.1,"aMS",%progbits,1
-.LC68:
-	.ascii	"re low formaet %d\012\000"
-	.section	.rodata.ftl_read.str1.1,"aMS",%progbits,1
-.LC114:
-	.ascii	"ftl_read refresh =%x, lpa = %x, ppa= %x\012\000"
-	.section	.rodata.ftl_read_ahead.str1.1,"aMS",%progbits,1
-.LC100:
-	.ascii	"ftl_read_ahead refresh =%x, lpa = %x, ppa= %x\012\000"
-.LC101:
-	.ascii	"id=%d, lpa = %x, ppa = %x spare = %x %x %x %x\012\000"
+.LC156:
+	.ascii	"dump_write_lpa = %x %x %x %x\012\000"
+.LC157:
+	.ascii	"dump write new ppa = %x, last ppa = %x lpa = %x\012"
+	.ascii	"\000"
+.LC158:
+	.ascii	"dump write = %x %x\012\000"
+.LC159:
+	.ascii	"dump write hash update = %x %x %x\012\000"
+	.section	.rodata.ftl_re_low_format.str1.1,"aMS",%progbits,1
+.LC150:
+	.ascii	"re low format %d\012\000"
 	.section	.rodata.ftl_sblk_dump.str1.1,"aMS",%progbits,1
-.LC107:
+.LC215:
+	.ascii	"ftl_sblk_dump = %x %d %d %d %d\012\000"
+.LC216:
 	.ascii	"ftl_sblk_dump = %x %x %x %x\012\000"
-.LC108:
+.LC217:
 	.ascii	"page_addr = %x, lpa=%x vpn = %d\012\000"
-.LC109:
+.LC218:
 	.ascii	"index= %x, lpa=%x\012\000"
-.LC110:
+.LC219:
 	.ascii	"block = %x, vpn=%x check vpn = %d\012\000"
-	.section	.rodata.ftl_scan_all_data.str1.1,"aMS",%progbits,1
-.LC127:
-	.ascii	"ftl_scan_all_data = %x\012\000"
-.LC128:
-	.ascii	"scan lpa = %x ppa= %x\012\000"
-.LC129:
-	.ascii	"lba = %x,addr= %x, ststus = %x, spare= %x %x %x %x "
-	.ascii	"data=%x %x\012\000"
-.LC130:
-	.ascii	"lba = %x, id= %x, index = %x hash ppa = %x\012\000"
-.LC131:
-	.ascii	"0pm:\000"
-.LC132:
-	.ascii	"1pm:\000"
 	.section	.rodata.ftl_sysblk_dump.str1.1,"aMS",%progbits,1
-.LC80:
+.LC171:
 	.ascii	"l2p:\000"
 	.section	.rodata.ftl_test_block.str1.1,"aMS",%progbits,1
-.LC63:
+.LC142:
 	.ascii	"low format %d\012\000"
 	.section	.rodata.ftl_update_l2p_map.str1.1,"aMS",%progbits,1
-.LC143:
+.LC226:
 	.ascii	"ftl_update_l2p_map: %x %x %x\012\000"
-.LC144:
+.LC227:
 	.ascii	"ftl_update_l2p_map\000"
-.LC145:
+.LC228:
 	.ascii	"lpa_tbl:\000"
-.LC146:
+.LC229:
 	.ascii	"sblk %x vpn: %d %d\012\000"
 	.section	.rodata.ftl_vpn_decrement.str1.1,"aMS",%progbits,1
-.LC17:
-	.ascii	"ftl_vpn_decrement %x = %d\012\000"
+.LC58:
+	.ascii	"ftl_vpn_decrement %x = %d, %d\012\000"
 	.section	.rodata.ftl_write_commit.str1.1,"aMS",%progbits,1
-.LC147:
+.LC231:
 	.ascii	"%d read error: ppa:%x, lpa:%x, status:%x\012\000"
 	.section	.rodata.ftl_write_completed.str1.1,"aMS",%progbits,1
-.LC18:
+.LC71:
 	.ascii	"ftl prog error =%x, lpa = %x, ppa= %x\012\000"
+.LC72:
+	.ascii	"ftl re prog: lpa = %x, ppa= %x\012\000"
 	.section	.rodata.gc_add_sblk.str1.1,"aMS",%progbits,1
-.LC7:
+.LC43:
 	.ascii	"gc_add_sblk = %d, %d, %d, %d, %d, %d\012\000"
+.LC44:
+	.ascii	"gc_add_sblk = %d, %d, %d,last update:%d, %d\012\000"
 	.section	.rodata.gc_check_data_one_wl.str1.1,"aMS",%progbits,1
-.LC56:
-	.ascii	"1ppa = %x, status = %x, %x %x spare: %x %x %x %x\012"
-	.ascii	"\000"
+.LC223:
+	.ascii	"gc_lpa:\000"
+.LC224:
+	.ascii	"gc_ppa:\000"
+.LC225:
+	.ascii	"err: ppa = %x, status = %x, %x %x spare: %x %x %x %"
+	.ascii	"x\012\000"
 	.section	.rodata.gc_do_copy_back.str1.1,"aMS",%progbits,1
-.LC149:
+.LC232:
 	.ascii	"gc page in buf: lpa %x ppa = %x pageindex= %x\012\000"
-.LC150:
+.LC233:
 	.ascii	"gc_do_copy_back: lpa %x des_ppa = %x %x gc_ppa= %x "
 	.ascii	"page_index= %d\012\000"
-.LC151:
+.LC234:
 	.ascii	"gc_do_copy_back: %x %x %x %x gc_ppa:%x %x\012\000"
-.LC152:
+.LC235:
 	.ascii	"%d prog_step: %x %x buf id= %x ppa = %x hash=%x id "
 	.ascii	"= %x plane = %x lpa=%x\012\000"
+	.section	.rodata.gc_free_bad_sblk.str1.1,"aMS",%progbits,1
+.LC60:
+	.ascii	"gc_free_bad_sblk 0x%x\012\000"
 	.section	.rodata.gc_free_src_blk.str1.1,"aMS",%progbits,1
-.LC15:
+.LC63:
 	.ascii	"gc_free_src_blk = %x, vpn = %d\012\000"
-.LC16:
+.LC64:
 	.ascii	"gc_free_src_blk %x, %d\012\000"
 	.section	.rodata.gc_free_temp_buf.str1.1,"aMS",%progbits,1
-.LC10:
+.LC48:
 	.ascii	"%d gc_free_temp_buf buf id= %x\012\000"
+	.section	.rodata.gc_mark_bad_ppa.str1.1,"aMS",%progbits,1
+.LC45:
+	.ascii	"gc_mark_bad_ppa %d %x %x\012\000"
 	.section	.rodata.gc_recovery.str1.1,"aMS",%progbits,1
-.LC133:
+.LC193:
 	.ascii	"ppa = %x, status = %x, data:%x %x %x %x, spare: %x "
 	.ascii	"%x %x %x\012\000"
-.LC134:
-	.ascii	"gc_lpa:\000"
-.LC135:
-	.ascii	"gc_ppa:\000"
-.LC136:
+.LC194:
 	.ascii	"ppa = %x, status = %x, %x %x spare: %x %x %x %x\012"
 	.ascii	"\000"
-.LC137:
-	.ascii	"gc_recovery\000"
-.LC138:
+.LC195:
 	.ascii	"gc_recovery: %x vpn = %x\012\000"
 	.section	.rodata.gc_scan_src_blk.str1.1,"aMS",%progbits,1
-.LC125:
+.LC213:
 	.ascii	"gc_scan_src_blk = %x, vpn = %d\012\000"
-.LC126:
+.LC214:
 	.ascii	"gc_scan_src_blk = %x, s vpn0 = %d, c vpn1 = %d\012\000"
 	.section	.rodata.gc_search_src_blk.str1.1,"aMS",%progbits,1
-.LC111:
-	.ascii	"gc_search_src_blk = %d, %d, %d\012\000"
-.LC112:
-	.ascii	"vpn gc = %d, id = %d\012\000"
-.LC113:
-	.ascii	"gc_search_src_blk count= %d\012\000"
+.LC50:
+	.ascii	"zftl_get_gc_node cache = %x index = %d vpn = %x\012"
+	.ascii	"\000"
+.LC51:
+	.ascii	"gc_search_src_blk mode = %x, src mode = %x, count= "
+	.ascii	"%d %d\012\000"
 	.section	.rodata.gc_static_wearleveling.str1.1,"aMS",%progbits,1
-.LC11:
-	.ascii	"gc_static_wearleveling: slc blk: %d, tlc blk: %d av"
+.LC79:
+	.ascii	"gc_static_wearleveling: min blk: %x,sec=%d,xec = %d"
+	.ascii	" ,mode=%d, func=%x, bbt=%x vpn = %d\012\000"
+.LC80:
+	.ascii	"gc_static_wearleveling: min slc blk: %x,sec=%d,xec "
+	.ascii	"= %d ,mode=%d, func=%x, bbt=%x vpn = %d\012\000"
+.LC81:
+	.ascii	"gc_static_wearleveling: min tlc blk: %x,sec=%d,xec "
+	.ascii	"= %d ,mode=%d, func=%x, bbt=%x vpn = %d\012\000"
+.LC82:
+	.ascii	"gc_static_wearleveling: max slc blk: %x,sec=%d,xec "
+	.ascii	"= %d ,mode=%d, func=%x, bbt=%x vpn = %d\012\000"
+.LC83:
+	.ascii	"gc_static_wearleveling: max xlc blk: %x,sec=%d,xec "
+	.ascii	"= %d ,mode=%d, func=%x, bbt=%x vpn = %d\012\000"
+.LC84:
+	.ascii	"gc_static_wearleveling: slc blk: %x, tlc blk: %d av"
 	.ascii	"g slc ec: %d, avg tlc ec: %d \012\000"
-.LC12:
-	.ascii	"gc_static_wearleveling: min slc ec: %d, min tlc ec:"
-	.ascii	" %d max slc ec: %d, max tlc ec: %d \012\000"
+.LC85:
+	.ascii	"gc_static_wearleveling: min slc ec: %x, min tlc ec:"
+	.ascii	" %d max slc ec: %d, max tlc ec: %d; %d %d\012\000"
+.LC86:
+	.ascii	"swl add tlc gc = %x, %d, %d, %d, %d, %d\012\000"
+.LC87:
+	.ascii	"swl add slc gc  = %x, %d, %d, %d, %d, %d\012\000"
 	.section	.rodata.gc_update_l2p_map_new.str1.1,"aMS",%progbits,1
-.LC102:
+.LC209:
 	.ascii	"gc_update_l2p_map_new sblk %x\012\000"
-.LC103:
+.LC210:
 	.ascii	"gc_update_l2p_map_new: %x %x %x\012\000"
-.LC104:
-	.ascii	"0lpa: %x %x %x\012\000"
-.LC105:
+.LC211:
 	.ascii	"lpa: %x %x %x\012\000"
-.LC106:
+.LC212:
 	.ascii	"gc_update_l2p_map_new: %x vpn = %x vpn1 = %x done\012"
 	.ascii	"\000"
 	.section	.rodata.gc_write_completed.str1.1,"aMS",%progbits,1
-.LC8:
+.LC46:
 	.ascii	"status: %x, ppa: %x\012\000"
-.LC9:
+.LC47:
 	.ascii	"gc_write_completed: %x  %x  %x %x\012\000"
 	.section	.rodata.hynix_get_read_retry_default.str1.1,"aMS",%progbits,1
-.LC33:
+.LC98:
 	.ascii	"otp error! %d\000"
-.LC34:
+.LC99:
 	.ascii	"rr\000"
 	.section	.rodata.hynix_read_retrial.str1.1,"aMS",%progbits,1
-.LC47:
+.LC114:
 	.ascii	"hynix RR %d row=%x, count %d, status=%d\012\000"
+	.section	.rodata.idb_write_data.str1.1,"aMS",%progbits,1
+.LC130:
+	.ascii	"1 write_idblock fix data %x %x %x\012\000"
+.LC131:
+	.ascii	"write_idblock check fail! %x\012\000"
+.LC132:
+	.ascii	"write_idblock fail! %x\012\000"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",%progbits,1
-.LC92:
+.LC184:
 	.ascii	"region_id = %d, pm_max_region = %d\012\000"
-.LC93:
+.LC185:
+	.ascii	"load_l2p_region no ppa = %x , %x, all setting 0xff."
+	.ascii	"...\012\000"
+.LC186:
 	.ascii	"load_l2p_region = %x,%x,%x, %x\012\000"
-.LC94:
+.LC187:
 	.ascii	"pm_ppa:\000"
-.LC95:
+.LC188:
 	.ascii	"data:\000"
-.LC96:
+.LC189:
 	.ascii	"spare:\000"
 	.section	.rodata.lpa_rebuild_hash.str1.1,"aMS",%progbits,1
-.LC28:
+.LC78:
 	.ascii	"%s %d %d\012\000"
 	.section	.rodata.micron_read_retrial.str1.1,"aMS",%progbits,1
-.LC42:
-	.ascii	"micron %d row=%x,count %d,status=%d\012\000"
-.LC43:
+.LC109:
+	.ascii	"micron %d row=%x,last status %d,status = %d\012\000"
+.LC110:
 	.ascii	"micron RR %d row=%x,count %d,status=%d\012\000"
+	.section	.rodata.nand_flash_print_info.str1.1,"aMS",%progbits,1
+.LC1:
+	.ascii	"...%s enter...\012\000"
+.LC2:
+	.ascii	"No.0 FLASH ID: %x %x %x %x %x %x\012\000"
+.LC3:
+	.ascii	"DiePerChip: %x\012\000"
+.LC4:
+	.ascii	"SectPerPage: %x\012\000"
+.LC5:
+	.ascii	"PagePerBlk: %x\012\000"
+.LC6:
+	.ascii	"Cell: %x\012\000"
+.LC7:
+	.ascii	"PlanePerDie: %x\012\000"
+.LC8:
+	.ascii	"BlkPerPlane: %x\012\000"
+.LC9:
+	.ascii	"die gap: %x\012\000"
+.LC10:
+	.ascii	"lsbMode: %x\012\000"
+.LC11:
+	.ascii	"ReadRetryMode: %x\012\000"
+.LC12:
+	.ascii	"ecc: %x\012\000"
+.LC13:
+	.ascii	"idb ecc: %x\012\000"
+.LC14:
+	.ascii	"g_flash_slc_mode: %x\012\000"
+.LC15:
+	.ascii	"OptMode: %x\012\000"
+.LC16:
+	.ascii	"g_nand_max_die: %x\012\000"
+.LC17:
+	.ascii	"Cache read enable: %x\012\000"
+.LC18:
+	.ascii	"Cache random read enable: %x\012\000"
+.LC19:
+	.ascii	"Cache prog enable: %x\012\000"
+.LC20:
+	.ascii	"multi read enable: %x\012\000"
+.LC21:
+	.ascii	"multi prog enable: %x\012\000"
+.LC22:
+	.ascii	"interleave enable: %x\012\000"
+.LC23:
+	.ascii	"read retry enable: %x\012\000"
+.LC24:
+	.ascii	"randomizer enable: %x\012\000"
+.LC25:
+	.ascii	"SDR enable: %x\012\000"
+.LC26:
+	.ascii	"ONFI enable: %x\012\000"
+.LC27:
+	.ascii	"TOGGLE enable: %x\012\000"
+.LC28:
+	.ascii	"g_flash_slc_mode: %x %x\012\000"
+.LC29:
+	.ascii	"MultiPlaneProgCmd: %x %x\012\000"
+.LC30:
+	.ascii	"MultiPlaneReadCmd: %x %x\012\000"
+.LC31:
+	.ascii	"g_flash_toggle_mode_en: %x\012\000"
+	.section	.rodata.nandc_init.str1.1,"aMS",%progbits,1
+.LC91:
+	.ascii	"...%s enter... %p\012\000"
+.LC92:
+	.ascii	"0:%x %x %x %x %x\012\000"
+.LC93:
+	.ascii	"g_nandc_ver...%d\012\000"
 	.section	.rodata.nandc_xfer.str1.1,"aMS",%progbits,1
-.LC39:
+.LC105:
 	.ascii	"dqs data abort %x\012\000"
-.LC40:
+.LC106:
+	.ascii	"dqs data timeout %x\012\000"
+.LC107:
 	.ascii	"xfer error %x\012\000"
 	.section	.rodata.nandc_xfer_done.str1.1,"aMS",%progbits,1
-.LC35:
+.LC100:
+	.ascii	"flash_abort_clear = %d\012\000"
+.LC101:
 	.ascii	"%d mtrans_cnt = %d page_num = %d\012\000"
-.LC36:
+.LC102:
 	.ascii	"nandc:\000"
-.LC37:
+.LC103:
 	.ascii	"%d flReg.d32=%x %x\012\000"
-.LC38:
+.LC104:
 	.ascii	"nandc_xfer_done read error %x\012\000"
 	.section	.rodata.pm_alloc_new_blk.str1.1,"aMS",%progbits,1
-.LC26:
+.LC76:
 	.ascii	"blk %x is bad block\012\000"
-.LC27:
+.LC77:
 	.ascii	"pm_alloc_new_blk: %x %x %x %x\012\000"
+	.section	.rodata.pm_free_sblk.str1.1,"aMS",%progbits,1
+.LC89:
+	.ascii	"ftl_free_no_use_map_blk %x %x %x %d\012\000"
 	.section	.rodata.pm_init.str1.1,"aMS",%progbits,1
-.LC97:
+.LC190:
 	.ascii	"pm_init posr %x %x %x\012\000"
-.LC98:
+.LC191:
 	.ascii	"pm_init recovery %x %x %x\012\000"
 	.section	.rodata.pm_log2phys.str1.1,"aMS",%progbits,1
-.LC99:
+.LC192:
 	.ascii	"pm_log2phys  lpn = %d, max lpn = %d\012\000"
 	.section	.rodata.pm_ppa_update_check.str1.1,"aMS",%progbits,1
-.LC91:
+.LC183:
 	.ascii	"%s w error lpn = %x, max ppa = %d\012\000"
 	.section	.rodata.pm_write_page.str1.1,"aMS",%progbits,1
-.LC76:
+.LC160:
 	.ascii	"pm_write_page write error: %x\012\000"
 	.section	.rodata.print_ftl_debug_info.str1.1,"aMS",%progbits,1
-.LC20:
-	.ascii	"free blk: s:%x,t:%x,m:%x, data blk:s:%x,%x,t%x vpn:"
-	.ascii	" s:%x t:%x\012\000"
-.LC21:
+.LC65:
+	.ascii	"bad blk = %x, %x free blk: s:%x,t:%x,m:%x, data blk"
+	.ascii	":s:%x,%x,t%x vpn: s:%x t:%x, max_vpn: %x\012\000"
+.LC66:
 	.ascii	"totle w: %d MB,r: %d MB %d dv:0x%X,poc:%d\012\000"
-.LC22:
+.LC67:
 	.ascii	"gc xlc page: %d,gc slc page: %d, tmp w: %d MB\012\000"
-.LC23:
+.LC68:
 	.ascii	"slc ec: %d,%d,%d,%d,%d,tlc ec: %d,%d,%d,%d,%d\012\000"
+.LC69:
+	.ascii	"gc th: tlc_tlc: %d tlc_slc: %d slc_slc: %d slc_tlc:"
+	.ascii	"%d free_th: %d\012\000"
+.LC70:
+	.ascii	"swl : %x %x %x %x\012\000"
 	.section	.rodata.print_gc_debug_info.str1.1,"aMS",%progbits,1
-.LC13:
-	.ascii	"gc: b:%x,p:%x,i:%x; free buf=%d %d\012\000"
+.LC49:
+	.ascii	"gc: b:%x,p:%x,i:%x; free buf=%d %d free slc th: %d\012"
+	.ascii	"\000"
+	.section	.rodata.print_list_info.str1.1,"aMS",%progbits,1
+.LC56:
+	.ascii	"list count:%p %d\012\000"
+.LC57:
+	.ascii	"%d: node:%x %x %x %x, %d %d %d %d %d\012\000"
 	.section	.rodata.queue_wait_first_req_completed.str1.1,"aMS",%progbits,1
-.LC55:
-	.ascii	"set buf %d,status = %x, ppa = %x lun state = %d\012"
+.LC123:
+	.ascii	"read: %x %x %x %x\012\000"
+.LC124:
+	.ascii	"0set buf %d,status = %x, ppa = %x lun state = %d\012"
 	.ascii	"\000"
+.LC125:
+	.ascii	"prog end %x %x error_ecc %d %d\012\000"
+.LC126:
+	.ascii	"1set buf %d,status = %x, ppa = %x lun state = %d\012"
+	.ascii	"\000"
+.LC127:
+	.ascii	"dp prog end %x %x error_ecc %d %d\012\000"
 	.section	.rodata.random_seed,"a",%progbits
 	.align	1
-	.set	.LANCHOR32,. + 0
+	.set	.LANCHOR49,. + 0
 	.type	random_seed, %object
 	.size	random_seed, 256
 random_seed:
@@ -23388,22 +30062,33 @@ random_seed:
 	.short	17598
 	.short	28087
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",%progbits,1
-.LC142:
-	.ascii	"ftl_init %x\012\000"
+.LC208:
+	.ascii	"zftl_init %x\012\000"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",%progbits,1
-.LC29:
+.LC94:
 	.ascii	"%s 0x%x:\000"
-.LC30:
+.LC95:
 	.ascii	"%x \000"
-.LC31:
+.LC96:
 	.ascii	"\000"
-.LC32:
+.LC97:
 	.ascii	"%s\012\000"
+	.section	.rodata.sandisk_prog_test_bad_block.str1.1,"aMS",%progbits,1
+.LC41:
+	.ascii	"bad block test:%x %x\012\000"
+	.section	.rodata.sblk_3d_tlc_dump_prog.str1.1,"aMS",%progbits,1
+.LC133:
+	.ascii	"sblk_3d_tlc_dump_prog wl_addr= %x ppa = %x ppa = %x"
+	.ascii	"\012\000"
+	.section	.rodata.sblk_mlc_dump_prog.str1.1,"aMS",%progbits,1
+.LC134:
+	.ascii	"sblk_mlc_dump_prog wl_addr= %x ppa = %x ppa = %x\012"
+	.ascii	"\000"
 	.section	.rodata.sblk_prog_page.str1.1,"aMS",%progbits,1
-.LC58:
+.LC135:
 	.ascii	"sblk_prog_page ppa = %x, count = %d\012\000"
 	.section	.rodata.toshiba_15ref_value,"a",%progbits
-	.set	.LANCHOR2,. + 0
+	.set	.LANCHOR24,. + 0
 	.type	toshiba_15ref_value, %object
 	.size	toshiba_15ref_value, 95
 toshiba_15ref_value:
@@ -23503,7 +30188,7 @@ toshiba_15ref_value:
 	.byte	114
 	.byte	0
 	.section	.rodata.toshiba_3D_slc_value,"a",%progbits
-	.set	.LANCHOR16,. + 0
+	.set	.LANCHOR35,. + 0
 	.type	toshiba_3D_slc_value, %object
 	.size	toshiba_3D_slc_value, 11
 toshiba_3D_slc_value:
@@ -23519,7 +30204,7 @@ toshiba_3D_slc_value:
 	.byte	-56
 	.byte	56
 	.section	.rodata.toshiba_3D_tlc_value,"a",%progbits
-	.set	.LANCHOR15,. + 0
+	.set	.LANCHOR34,. + 0
 	.type	toshiba_3D_tlc_value, %object
 	.size	toshiba_3D_tlc_value, 399
 toshiba_3D_tlc_value:
@@ -23537,13 +30222,6 @@ toshiba_3D_tlc_value:
 	.byte	0
 	.byte	0
 	.byte	0
-	.byte	-9
-	.byte	-12
-	.byte	-9
-	.byte	-7
-	.byte	-13
-	.byte	-12
-	.byte	-7
 	.byte	5
 	.byte	-2
 	.byte	-1
@@ -23551,6 +30229,13 @@ toshiba_3D_tlc_value:
 	.byte	-3
 	.byte	-2
 	.byte	6
+	.byte	-9
+	.byte	-12
+	.byte	-9
+	.byte	-7
+	.byte	-13
+	.byte	-12
+	.byte	-7
 	.byte	-6
 	.byte	-15
 	.byte	-15
@@ -23923,14 +30608,14 @@ toshiba_3D_tlc_value:
 	.byte	12
 	.byte	14
 	.section	.rodata.toshiba_3d_read_retrial.str1.1,"aMS",%progbits,1
-.LC44:
+.LC111:
 	.ascii	"toshiba SRR %d row=%x, status=%d\012\000"
-.LC45:
+.LC112:
 	.ascii	"toshiba TRR %d row=%x, status=%d\012\000"
-.LC46:
+.LC113:
 	.ascii	"toshiba RR %d row=%x,count %d,status=%d\012\000"
 	.section	.rodata.toshiba_A19ref_value,"a",%progbits
-	.set	.LANCHOR0,. + 0
+	.set	.LANCHOR22,. + 0
 	.type	toshiba_A19ref_value, %object
 	.size	toshiba_A19ref_value, 45
 toshiba_A19ref_value:
@@ -23980,7 +30665,7 @@ toshiba_A19ref_value:
 	.byte	124
 	.byte	0
 	.section	.rodata.toshiba_ref_value,"a",%progbits
-	.set	.LANCHOR3,. + 0
+	.set	.LANCHOR25,. + 0
 	.type	toshiba_ref_value, %object
 	.size	toshiba_ref_value, 8
 toshiba_ref_value:
@@ -23992,19 +30677,66 @@ toshiba_ref_value:
 	.byte	8
 	.byte	12
 	.byte	112
-	.section	.rodata.vpn_check.str1.1,"aMS",%progbits,1
-.LC115:
-	.ascii	"acblk = %x, tempblk = %x, gc_des = %x\012\000"
-.LC116:
-	.ascii	"acblk = %x, free page = %x, vpn = %x %x\012\000"
-.LC117:
-	.ascii	"tmp_blk = %x, free page = %x, vpn = %x %x\012\000"
-.LC118:
-	.ascii	"vpn_check lpa = %x, ppa = %x, blk = %x\012\000"
-.LC119:
-	.ascii	"l2p\000"
-.LC120:
-	.ascii	"vpn_check %x = c %x  s %x function: %x\012\000"
-.LC121:
-	.ascii	"vpn_check blk = %x fix vpc\012\000"
+	.section	.rodata.zftl_discard.str1.1,"aMS",%progbits,1
+.LC241:
+	.ascii	"ftl_discard:(%x, %x, %x, %x)\012\000"
+	.section	.rodata.zftl_do_gc.str1.1,"aMS",%progbits,1
+.LC236:
+	.ascii	"gc %d: %d %d %d %d %d %d %d\012\000"
+.LC237:
+	.ascii	"gc %d: %d %d %d %d %d %d\012\000"
+.LC238:
+	.ascii	"GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\012"
+	.ascii	"\000"
+.LC239:
+	.ascii	"gc free %x, %d\012\000"
+	.section	.rodata.zftl_gc_get_free_sblk.str1.1,"aMS",%progbits,1
+.LC52:
+	.ascii	"swl_tlc_free_mini_ec_blk alloc sblk %x\012\000"
+.LC53:
+	.ascii	"zftl_get_free_sblk %x %d, %p %d %d\012\000"
+.LC54:
+	.ascii	"zftl_gc_get_free_sblk %x %x %x, %d %d %d\012\000"
+	.section	.rodata.zftl_get_free_sblk.str1.1,"aMS",%progbits,1
+.LC55:
+	.ascii	"swl_slc_free_mini_ec_blk alloc sblk %x\012\000"
+	.section	.rodata.zftl_init.str1.1,"aMS",%progbits,1
+.LC196:
+	.ascii	"FTL version: 6.0.16 20190427\000"
+.LC197:
+	.ascii	"_c_user_data_density := %d\012\000"
+.LC198:
+	.ascii	"_c_totle_phy_density := %d\012\000"
+.LC199:
+	.ascii	"_c_totle_log_page := %d\012\000"
+.LC200:
+	.ascii	"_c_totle_data_density := %d\012\000"
+.LC201:
+	.ascii	"_c_ftl_pm_page_num := %d\012\000"
+.LC202:
+	.ascii	"_c_ftl_byte_pre_page := %d\012\000"
+.LC203:
+	.ascii	"_c_max_pm_sblk := %d\012\000"
+.LC204:
+	.ascii	"_min_slc_super_block := %d\012\000"
+.LC205:
+	.ascii	"_max_xlc_super_block := %d\012\000"
+.LC206:
+	.ascii	"gp_ftl_ext_info %p %p %p\012\000"
+.LC207:
+	.ascii	"flash info size: %d %d %d\012\000"
+	.section	.rodata.zftl_read.str1.1,"aMS",%progbits,1
+.LC220:
+	.ascii	"ftl_read %x %x %x\012\000"
+.LC221:
+	.ascii	"ftl_read refresh =%x, lpa = %x, ppa= %x\012\000"
+.LC222:
+	.ascii	"id=%d, status = %x, lpa = %x, ppa = %x spare = %x %"
+	.ascii	"x %x %x\012\000"
+	.section	.rodata.zftl_sblk_list_init.str1.1,"aMS",%progbits,1
+.LC88:
+	.ascii	"free blk vpn error: %x %x\012\000"
+	.section	.rodata.zftl_write.str1.1,"aMS",%progbits,1
+.LC240:
+	.ascii	"ftlwrite %x %x %x %x\012\000"
 	.hidden	free
diff --git a/drivers/rknand/rk_zftl_arm_v8.S b/drivers/rknand/rk_zftl_arm_v8.S
index 8e0423e3d2..344fb75b7b 100644
--- a/drivers/rknand/rk_zftl_arm_v8.S
+++ b/drivers/rknand/rk_zftl_arm_v8.S
@@ -5,10 +5,10 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2019-01-07
+ * date: 2019-04-27
  */
 	.arch armv8-a
-	.file	"rk_zftl_arm_v8.c"
+	.file	"rk_zftl_arm_v8.S"
 	.section	.text.flash_mem_cmp8,"ax",@progbits
 	.align	2
 	.type	flash_mem_cmp8, %function
@@ -540,10 +540,10 @@ zftl_get_gc_node.part.9:
 	ldr	x0, [x0, #:lo12:.LANCHOR12]
 	b	_list_get_gc_head_node.isra.2
 	.size	zftl_get_gc_node.part.9, .-zftl_get_gc_node.part.9
-	.section	.text.nandc_de_cs.constprop.28,"ax",@progbits
+	.section	.text.nandc_de_cs.constprop.29,"ax",@progbits
 	.align	2
-	.type	nandc_de_cs.constprop.28, %function
-nandc_de_cs.constprop.28:
+	.type	nandc_de_cs.constprop.29, %function
+nandc_de_cs.constprop.29:
 	adrp	x0, .LANCHOR13
 	ldr	x1, [x0, #:lo12:.LANCHOR13]
 	ldr	w0, [x1]
@@ -551,7 +551,7 @@ nandc_de_cs.constprop.28:
 	and	w0, w0, -131073
 	str	w0, [x1]
 	ret
-	.size	nandc_de_cs.constprop.28, .-nandc_de_cs.constprop.28
+	.size	nandc_de_cs.constprop.29, .-nandc_de_cs.constprop.29
 	.section	.text.nand_flash_print_info,"ax",@progbits
 	.align	2
 	.global	nand_flash_print_info
@@ -818,40 +818,42 @@ nand_flash_print_info:
 .L110:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	tbz	x0, 12, .L111
+	adrp	x0, .LANCHOR19
+	ldrb	w2, [x0, #:lo12:.LANCHOR19]
 	adrp	x0, .LANCHOR0
 	ldrb	w1, [x0, #:lo12:.LANCHOR0]
-	adrp	x0, .LC14
-	add	x0, x0, :lo12:.LC14
+	adrp	x0, .LC28
+	add	x0, x0, :lo12:.LC28
 	bl	printf
 .L111:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	tbz	x0, 12, .L112
-	adrp	x0, .LANCHOR19
-	add	x0, x0, :lo12:.LANCHOR19
+	adrp	x0, .LANCHOR20
+	add	x0, x0, :lo12:.LANCHOR20
 	ldrb	w2, [x0, 11]
 	ldrb	w1, [x0, 10]
-	adrp	x0, .LC28
-	add	x0, x0, :lo12:.LC28
+	adrp	x0, .LC29
+	add	x0, x0, :lo12:.LC29
 	bl	printf
 .L112:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	tbz	x0, 12, .L113
-	adrp	x0, .LANCHOR19
-	add	x0, x0, :lo12:.LANCHOR19
+	adrp	x0, .LANCHOR20
+	add	x0, x0, :lo12:.LANCHOR20
 	ldrb	w2, [x0, 9]
 	ldrb	w1, [x0, 8]
-	adrp	x0, .LC29
-	add	x0, x0, :lo12:.LC29
+	adrp	x0, .LC30
+	add	x0, x0, :lo12:.LC30
 	bl	printf
 .L113:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	tbz	x0, 12, .L83
-	adrp	x0, .LANCHOR20
+	adrp	x0, .LANCHOR21
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	ldrb	w1, [x0, #:lo12:.LANCHOR20]
-	adrp	x0, .LC30
-	add	x0, x0, :lo12:.LC30
+	ldrb	w1, [x0, #:lo12:.LANCHOR21]
+	adrp	x0, .LC31
+	add	x0, x0, :lo12:.LC31
 	b	printf
 .L83:
 	ldr	x19, [sp, 16]
@@ -900,22 +902,22 @@ toshiba_set_rr_para:
 	mov	x4, x0
 	add	w2, w11, 1
 	mov	w0, 5
-	adrp	x6, .LANCHOR25
-	add	x6, x6, :lo12:.LANCHOR25
-	adrp	x3, .LANCHOR21
-	add	x3, x3, :lo12:.LANCHOR21
+	adrp	x6, .LANCHOR26
+	add	x6, x6, :lo12:.LANCHOR26
+	adrp	x3, .LANCHOR22
+	add	x3, x3, :lo12:.LANCHOR22
 	umull	x2, w2, w0
-	adrp	x0, .LANCHOR22
-	add	x7, x0, :lo12:.LANCHOR22
+	adrp	x0, .LANCHOR23
+	add	x7, x0, :lo12:.LANCHOR23
 	mov	x5, x0
 	ldrb	w0, [x6]
 	add	x3, x3, x2
 	add	x7, x7, x2
-	adrp	x8, .LANCHOR23
+	adrp	x8, .LANCHOR24
 	mov	x2, 0
-	adrp	x10, .LANCHOR24
-	add	x8, x8, :lo12:.LANCHOR23
-	add	x10, x10, :lo12:.LANCHOR24
+	adrp	x10, .LANCHOR25
+	add	x8, x8, :lo12:.LANCHOR24
+	add	x10, x10, :lo12:.LANCHOR25
 	cmp	w0, w2
 	bhi	.L220
 	ret
@@ -933,7 +935,7 @@ toshiba_set_rr_para:
 .L217:
 	mov	w0, 85
 	str	w0, [x4, 8]
-	add	x0, x5, :lo12:.LANCHOR22
+	add	x0, x5, :lo12:.LANCHOR23
 	ldrsb	w0, [x2, x0]
 	str	w0, [x4, 4]
 	mov	w0, 200
@@ -955,10 +957,10 @@ toshiba_set_rr_para:
 	.align	2
 	.type	hynix_set_rr_para, %function
 hynix_set_rr_para:
-	adrp	x2, .LANCHOR26
+	adrp	x2, .LANCHOR27
 	and	w1, w1, 255
 	and	w0, w0, 255
-	ldr	x3, [x2, #:lo12:.LANCHOR26]
+	ldr	x3, [x2, #:lo12:.LANCHOR27]
 	adrp	x2, .LANCHOR13
 	add	x6, x3, 128
 	add	x4, x3, 112
@@ -1006,16 +1008,16 @@ hynix_set_rr_para:
 	.global	hynix_reconfig_rr_para
 	.type	hynix_reconfig_rr_para, %function
 hynix_reconfig_rr_para:
-	adrp	x1, .LANCHOR23
-	ldrb	w1, [x1, #:lo12:.LANCHOR23]
+	adrp	x1, .LANCHOR24
+	ldrb	w1, [x1, #:lo12:.LANCHOR24]
 	sub	w1, w1, #1
 	and	w1, w1, 255
 	cmp	w1, 7
 	bhi	.L237
-	adrp	x8, .LANCHOR26
+	adrp	x8, .LANCHOR27
 	and	w0, w0, 255
 	sxtw	x7, w0
-	ldr	x1, [x8, #:lo12:.LANCHOR26]
+	ldr	x1, [x8, #:lo12:.LANCHOR27]
 	add	x1, x1, x7
 	ldrb	w1, [x1, 120]
 	cbz	w1, .L237
@@ -1023,7 +1025,7 @@ hynix_reconfig_rr_para:
 	mov	w1, 0
 	add	x29, sp, 0
 	bl	hynix_set_rr_para
-	ldr	x0, [x8, #:lo12:.LANCHOR26]
+	ldr	x0, [x8, #:lo12:.LANCHOR27]
 	add	x0, x0, x7
 	strb	wzr, [x0, 120]
 	ldp	x29, x30, [sp], 16
@@ -1036,10 +1038,10 @@ hynix_reconfig_rr_para:
 	.global	nandc_set_ddr_para
 	.type	nandc_set_ddr_para, %function
 nandc_set_ddr_para:
-	adrp	x1, .LANCHOR27
+	adrp	x1, .LANCHOR28
 	and	w0, w0, 255
 	adrp	x2, .LANCHOR13
-	ldrb	w1, [x1, #:lo12:.LANCHOR27]
+	ldrb	w1, [x1, #:lo12:.LANCHOR28]
 	ldr	x2, [x2, #:lo12:.LANCHOR13]
 	cmp	w1, 9
 	lsl	w1, w0, 16
@@ -1058,8 +1060,8 @@ nandc_set_ddr_para:
 	.global	nandc_get_ddr_para
 	.type	nandc_get_ddr_para, %function
 nandc_get_ddr_para:
-	adrp	x0, .LANCHOR27
-	ldrb	w0, [x0, #:lo12:.LANCHOR27]
+	adrp	x0, .LANCHOR28
+	ldrb	w0, [x0, #:lo12:.LANCHOR28]
 	cmp	w0, 9
 	adrp	x0, .LANCHOR13
 	ldr	x0, [x0, #:lo12:.LANCHOR13]
@@ -1085,10 +1087,10 @@ nandc_set_if_mode:
 	beq	.L248
 	tst	x0, 4
 	orr	w1, w1, 24576
-	adrp	x0, .LANCHOR27
+	adrp	x0, .LANCHOR28
 	and	w1, w1, -32769
 	orr	w1, w1, 196608
-	ldrb	w0, [x0, #:lo12:.LANCHOR27]
+	ldrb	w0, [x0, #:lo12:.LANCHOR28]
 	orr	w3, w1, 32768
 	csel	w1, w3, w1, ne
 	cmp	w0, 9
@@ -1148,15 +1150,15 @@ flash_wait_device_ready_raw:
 	ldrb	w0, [x0, #:lo12:.LANCHOR18]
 	cmp	w0, w21
 	bhi	.L256
-	adrp	x1, .LANCHOR28
+	adrp	x1, .LANCHOR29
 	adrp	x0, .LC0
 	mov	w2, 677
-	add	x1, x1, :lo12:.LANCHOR28
+	add	x1, x1, :lo12:.LANCHOR29
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 .L256:
-	adrp	x0, .LANCHOR29
-	add	x0, x0, :lo12:.LANCHOR29
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w5, [x0, w21, sxtw]
 	adrp	x0, .LANCHOR13
 	ldr	x4, [x0, #:lo12:.LANCHOR13]
@@ -1181,7 +1183,7 @@ flash_wait_device_ready_raw:
 	bne	.L259
 	cmp	w3, 255
 	beq	.L259
-	bl	nandc_de_cs.constprop.28
+	bl	nandc_de_cs.constprop.29
 	ldr	x21, [sp, 32]
 	mov	w0, w3
 	ldp	x19, x20, [sp, 16]
@@ -1278,8 +1280,8 @@ zftl_flash_enter_slc_mode:
 	ldr	x4, [x2, #:lo12:.LANCHOR13]
 	bne	.L282
 .L302:
-	adrp	x1, .LANCHOR30+29
-	ldrb	w1, [x1, #:lo12:.LANCHOR30+29]
+	adrp	x1, .LANCHOR31+29
+	ldrb	w1, [x1, #:lo12:.LANCHOR31+29]
 	cbz	w1, .L279
 	add	x0, x0, 8
 	add	x0, x4, x0, lsl 8
@@ -1288,8 +1290,8 @@ zftl_flash_enter_slc_mode:
 .L282:
 	cmp	w1, 2
 	bne	.L284
-	adrp	x1, .LANCHOR31
-	add	x1, x1, :lo12:.LANCHOR31
+	adrp	x1, .LANCHOR32
+	add	x1, x1, :lo12:.LANCHOR32
 	ldrb	w2, [x1, x0]
 	cbz	w2, .L279
 	strb	wzr, [x1, x0]
@@ -1297,9 +1299,9 @@ zftl_flash_enter_slc_mode:
 .L284:
 	cmp	w1, 3
 	bne	.L279
-	adrp	x1, .LANCHOR31
+	adrp	x1, .LANCHOR32
 	sxtw	x2, w0
-	add	x1, x1, :lo12:.LANCHOR31
+	add	x1, x1, :lo12:.LANCHOR32
 	ldrb	w3, [x1, x2]
 	cbz	w3, .L279
 	ubfiz	x0, x0, 8, 8
@@ -1343,8 +1345,8 @@ zftl_flash_exit_slc_mode:
 	cmp	w1, 1
 	ldr	x4, [x2, #:lo12:.LANCHOR13]
 	bne	.L306
-	adrp	x1, .LANCHOR30+30
-	ldrb	w1, [x1, #:lo12:.LANCHOR30+30]
+	adrp	x1, .LANCHOR31+30
+	ldrb	w1, [x1, #:lo12:.LANCHOR31+30]
 .L328:
 	cbz	w1, .L303
 	add	x0, x0, 8
@@ -1354,12 +1356,12 @@ zftl_flash_exit_slc_mode:
 .L306:
 	cmp	w1, 2
 	bne	.L308
-	adrp	x2, .LANCHOR31
-	add	x2, x2, :lo12:.LANCHOR31
+	adrp	x2, .LANCHOR32
+	add	x2, x2, :lo12:.LANCHOR32
 	ldrb	w1, [x2, x0]
 	cbnz	w1, .L303
-	adrp	x1, .LANCHOR30
-	add	x1, x1, :lo12:.LANCHOR30
+	adrp	x1, .LANCHOR31
+	add	x1, x1, :lo12:.LANCHOR31
 	mov	w5, 4
 	ldrb	w3, [x1, 12]
 	ldrb	w1, [x1, 30]
@@ -1370,13 +1372,13 @@ zftl_flash_exit_slc_mode:
 .L308:
 	cmp	w1, 3
 	bne	.L303
-	adrp	x2, .LANCHOR31
+	adrp	x2, .LANCHOR32
 	sxtw	x5, w0
-	add	x2, x2, :lo12:.LANCHOR31
+	add	x2, x2, :lo12:.LANCHOR32
 	ldrb	w1, [x2, x5]
 	cbnz	w1, .L303
-	adrp	x3, .LANCHOR30
-	add	x3, x3, :lo12:.LANCHOR30
+	adrp	x3, .LANCHOR31
+	add	x3, x3, :lo12:.LANCHOR31
 	stp	x29, x30, [sp, -16]!
 	ubfiz	x0, x0, 8, 8
 	add	x4, x4, x0
@@ -1434,15 +1436,15 @@ flash_start_page_read:
 	ubfx	x21, x1, 24, 2
 	cmp	w0, w22
 	bhi	.L330
-	adrp	x1, .LANCHOR32
+	adrp	x1, .LANCHOR33
 	adrp	x0, .LC0
 	mov	w2, 845
-	add	x1, x1, :lo12:.LANCHOR32
+	add	x1, x1, :lo12:.LANCHOR33
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 .L330:
-	adrp	x0, .LANCHOR29
-	add	x0, x0, :lo12:.LANCHOR29
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w8, [x0, w22, sxtw]
 	adrp	x0, .LANCHOR13
 	ldr	x7, [x0, #:lo12:.LANCHOR13]
@@ -1473,7 +1475,7 @@ flash_start_page_read:
 	str	w20, [x1, 2056]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
-	b	nandc_de_cs.constprop.28
+	b	nandc_de_cs.constprop.29
 .L331:
 	adrp	x0, .LANCHOR16
 	ldr	x0, [x0, #:lo12:.LANCHOR16]
@@ -1536,16 +1538,16 @@ sandisk_set_rr_para:
 	mov	w0, 200
 	bl	timer_delay_ns
 	add	w1, w2, 1
-	adrp	x0, .LANCHOR25
-	adrp	x2, .LANCHOR21
-	add	x2, x2, :lo12:.LANCHOR21
-	ldrb	w4, [x0, #:lo12:.LANCHOR25]
-	adrp	x0, .LANCHOR23
-	ldrb	w5, [x0, #:lo12:.LANCHOR23]
+	adrp	x0, .LANCHOR26
+	adrp	x2, .LANCHOR22
+	add	x2, x2, :lo12:.LANCHOR22
+	ldrb	w4, [x0, #:lo12:.LANCHOR26]
+	adrp	x0, .LANCHOR24
+	ldrb	w5, [x0, #:lo12:.LANCHOR24]
 	mov	w0, 5
 	umull	x1, w1, w0
-	adrp	x0, .LANCHOR22
-	add	x0, x0, :lo12:.LANCHOR22
+	adrp	x0, .LANCHOR23
+	add	x0, x0, :lo12:.LANCHOR23
 	add	x2, x2, x1
 	add	x1, x0, x1
 	mov	x0, 0
@@ -1583,8 +1585,8 @@ toshiba_3d_set_tlc_rr_para:
 	madd	x1, x2, x1, x1
 	mov	w0, -119
 	str	w0, [x4, 4]
-	adrp	x0, .LANCHOR33
-	add	x0, x0, :lo12:.LANCHOR33
+	adrp	x0, .LANCHOR34
+	add	x0, x0, :lo12:.LANCHOR34
 	add	x5, x0, x1
 	ldrsb	w0, [x0, x1]
 	str	w0, [x4]
@@ -1619,8 +1621,8 @@ toshiba_3d_set_slc_rr_para:
 	str	wzr, [x0, 4]
 	mov	w2, -117
 	str	w2, [x0, 4]
-	adrp	x2, .LANCHOR34
-	add	x2, x2, :lo12:.LANCHOR34
+	adrp	x2, .LANCHOR35
+	add	x2, x2, :lo12:.LANCHOR35
 	add	x1, x2, x1, uxtb
 	ldrsb	w1, [x1, 1]
 	str	w1, [x0]
@@ -1645,8 +1647,8 @@ toshiba_tlc_set_rr_para:
 	str	w6, [x4, 8]
 	mul	x1, x1, x2
 	str	w0, [x4, 4]
-	adrp	x0, .LANCHOR35
-	add	x0, x0, :lo12:.LANCHOR35
+	adrp	x0, .LANCHOR36
+	add	x0, x0, :lo12:.LANCHOR36
 	add	x5, x0, x1
 	ldrb	w0, [x0, x1]
 	str	w0, [x4]
@@ -1674,8 +1676,8 @@ toshiba_tlc_set_rr_para:
 	str	w6, [x0, 8]
 	mov	w2, 20
 	str	w2, [x0, 4]
-	adrp	x2, .LANCHOR36
-	add	x2, x2, :lo12:.LANCHOR36
+	adrp	x2, .LANCHOR37
+	add	x2, x2, :lo12:.LANCHOR37
 	ldrb	w1, [x2, x1]
 	str	w1, [x0]
 	str	wzr, [x0]
@@ -1702,15 +1704,15 @@ flash_erase_duplane_block:
 	and	w25, w1, 255
 	cmp	w0, w19
 	bhi	.L362
-	adrp	x1, .LANCHOR37
+	adrp	x1, .LANCHOR38
 	adrp	x0, .LC0
 	mov	w2, 588
-	add	x1, x1, :lo12:.LANCHOR37
+	add	x1, x1, :lo12:.LANCHOR38
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 .L362:
-	adrp	x0, .LANCHOR29
-	add	x0, x0, :lo12:.LANCHOR29
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w22, [x0, w19, sxtw]
 	adrp	x0, .LANCHOR13
 	ldr	x24, [x0, #:lo12:.LANCHOR13]
@@ -1720,11 +1722,11 @@ flash_erase_duplane_block:
 	add	x23, x19, 8
 	add	x23, x24, x23, lsl 8
 	tbz	x0, 4, .L363
-	adrp	x0, .LC31
+	adrp	x0, .LC32
 	mov	w3, w20
 	mov	w2, w21
 	mov	w1, w22
-	add	x0, x0, :lo12:.LC31
+	add	x0, x0, :lo12:.LC32
 	bl	printf
 .L363:
 	bl	nandc_wait_flash_ready
@@ -1743,8 +1745,8 @@ flash_erase_duplane_block:
 	str	w0, [x24, 2052]
 	lsr	w0, w21, 16
 	str	w0, [x24, 2052]
-	adrp	x0, .LANCHOR38
-	ldrb	w0, [x0, #:lo12:.LANCHOR38]
+	adrp	x0, .LANCHOR39
+	ldrb	w0, [x0, #:lo12:.LANCHOR39]
 	cbnz	w0, .L368
 	mov	w0, 208
 	str	w0, [x24, 2056]
@@ -1769,13 +1771,13 @@ flash_erase_duplane_block:
 	mov	x0, x23
 	bl	flash_read_status
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.28
+	bl	nandc_de_cs.constprop.29
 	and	w19, w2, w19
 	orr	w19, w19, w5
 	cbz	w19, .L367
-	adrp	x0, .LC32
+	adrp	x0, .LC33
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC32
+	add	x0, x0, :lo12:.LC33
 	bl	printf
 .L367:
 	mov	w0, w19
@@ -1811,15 +1813,15 @@ flash_erase_block_en:
 	and	w22, w2, 2097151
 	cmp	w0, w23
 	bhi	.L377
-	adrp	x1, .LANCHOR39
+	adrp	x1, .LANCHOR40
 	adrp	x0, .LC0
 	mov	w2, 633
-	add	x1, x1, :lo12:.LANCHOR39
+	add	x1, x1, :lo12:.LANCHOR40
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 .L377:
-	adrp	x0, .LANCHOR29
-	add	x0, x0, :lo12:.LANCHOR29
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w20, [x0, w23, sxtw]
 	adrp	x0, .LANCHOR13
 	ldr	x25, [x0, #:lo12:.LANCHOR13]
@@ -1829,11 +1831,11 @@ flash_erase_block_en:
 	add	x24, x19, 8
 	add	x24, x25, x24, lsl 8
 	tbz	x0, 4, .L378
-	adrp	x0, .LC33
+	adrp	x0, .LC34
 	mov	w3, w26
 	mov	w2, w21
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC33
+	add	x0, x0, :lo12:.LC34
 	bl	printf
 .L378:
 	bl	nandc_wait_flash_ready
@@ -1858,7 +1860,7 @@ flash_erase_block_en:
 	mov	x0, x24
 	bl	flash_read_status
 	mov	w19, w0
-	bl	nandc_de_cs.constprop.28
+	bl	nandc_de_cs.constprop.29
 	mov	w0, 5
 	ands	w19, w19, w0
 	beq	.L381
@@ -1866,8 +1868,8 @@ flash_erase_block_en:
 	mov	w3, w19
 	mov	w1, w23
 	ldrh	w2, [x0, #:lo12:.LANCHOR2]
-	adrp	x0, .LC34
-	add	x0, x0, :lo12:.LC34
+	adrp	x0, .LC35
+	add	x0, x0, :lo12:.LC35
 	udiv	w2, w21, w2
 	bl	printf
 .L381:
@@ -1897,8 +1899,8 @@ flash_erase_block:
 	.type	flash_erase_all, %function
 flash_erase_all:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR30
-	add	x0, x0, :lo12:.LANCHOR30
+	adrp	x0, .LANCHOR31
+	add	x0, x0, :lo12:.LANCHOR31
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w19, 0
@@ -1910,7 +1912,7 @@ flash_erase_all:
 	adrp	x22, .LANCHOR18
 	str	x25, [sp, 64]
 	add	x22, x22, :lo12:.LANCHOR18
-	adrp	x24, .LANCHOR29
+	adrp	x24, .LANCHOR30
 	ldrb	w1, [x0, 13]
 	mul	w20, w20, w1
 	and	w20, w20, 65535
@@ -1921,14 +1923,14 @@ flash_erase_all:
 	ldp	x19, x20, [sp, 16]
 	mov	w1, 0
 	ldp	x21, x22, [sp, 32]
-	adrp	x0, .LC35
+	adrp	x0, .LC36
 	ldp	x23, x24, [sp, 48]
-	add	x0, x0, :lo12:.LC35
+	add	x0, x0, :lo12:.LC36
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	b	printf
 .L394:
-	add	x0, x24, :lo12:.LANCHOR29
+	add	x0, x24, :lo12:.LANCHOR30
 	mov	w21, 0
 	ldrb	w25, [x0, w19, sxtw]
 .L392:
@@ -1962,15 +1964,15 @@ flash_start_plane_read:
 	ldrb	w0, [x0, #:lo12:.LANCHOR18]
 	cmp	w0, w22
 	bhi	.L397
-	adrp	x1, .LANCHOR40
+	adrp	x1, .LANCHOR41
 	adrp	x0, .LC0
 	mov	w2, 940
-	add	x1, x1, :lo12:.LANCHOR40
+	add	x1, x1, :lo12:.LANCHOR41
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 .L397:
-	adrp	x0, .LANCHOR29
-	add	x0, x0, :lo12:.LANCHOR29
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w7, [x0, w22, sxtw]
 	adrp	x0, .LANCHOR13
 	ldr	x10, [x0, #:lo12:.LANCHOR13]
@@ -1990,9 +1992,9 @@ flash_start_plane_read:
 	mov	w0, w7
 	bl	zftl_flash_enter_slc_mode
 .L399:
-	adrp	x0, .LANCHOR19
+	adrp	x0, .LANCHOR20
 	and	x4, x7, 255
-	add	x1, x0, :lo12:.LANCHOR19
+	add	x1, x0, :lo12:.LANCHOR20
 	add	x4, x10, x4, lsl 8
 	and	w3, w21, 255
 	and	w6, w20, 255
@@ -2032,7 +2034,7 @@ flash_start_plane_read:
 	str	w0, [x4, 2056]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
-	b	nandc_de_cs.constprop.28
+	b	nandc_de_cs.constprop.29
 .L398:
 	ldr	x0, [x8, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
@@ -2058,7 +2060,7 @@ flash_start_plane_read:
 	cbz	w19, .L404
 	str	w19, [x4, 2056]
 .L404:
-	add	x0, x0, :lo12:.LANCHOR19
+	add	x0, x0, :lo12:.LANCHOR20
 	ldrb	w0, [x0, 9]
 	str	w0, [x4, 2056]
 	b	.L415
@@ -2071,14 +2073,14 @@ flash_set_interface_mode:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR41
+	adrp	x22, .LANCHOR42
 	stp	x19, x20, [sp, 16]
 	adrp	x21, .LANCHOR14
 	stp	x23, x24, [sp, 48]
-	adrp	x20, .LANCHOR42
+	adrp	x20, .LANCHOR43
 	mov	w23, w0
-	add	x22, x22, :lo12:.LANCHOR41
-	add	x20, x20, :lo12:.LANCHOR42
+	add	x22, x22, :lo12:.LANCHOR42
+	add	x20, x20, :lo12:.LANCHOR43
 	add	x21, x21, :lo12:.LANCHOR14
 	str	x25, [sp, 64]
 	mov	x25, 0
@@ -2111,8 +2113,8 @@ flash_set_interface_mode:
 	tbz	x1, 0, .L419
 	ldr	w0, [x21]
 	tbz	x0, 12, .L421
-	adrp	x0, .LC36
-	add	x0, x0, :lo12:.LC36
+	adrp	x0, .LC37
+	add	x0, x0, :lo12:.LC37
 	bl	printf
 .L421:
 	add	x0, x19, x25, lsl 8
@@ -2160,8 +2162,8 @@ flash_set_interface_mode:
 	tbz	x1, 2, .L419
 	ldr	w0, [x21]
 	tbz	x0, 12, .L425
-	adrp	x0, .LC37
-	add	x0, x0, :lo12:.LC37
+	adrp	x0, .LC38
+	add	x0, x0, :lo12:.LC38
 	bl	printf
 .L425:
 	add	x0, x19, x25, lsl 8
@@ -2240,7 +2242,7 @@ flash_read_id:
 	strb	w0, [x8, 6]
 	ldr	w0, [x2, 2048]
 	strb	w0, [x8, 7]
-	bl	nandc_de_cs.constprop.28
+	bl	nandc_de_cs.constprop.29
 	ldrb	w2, [x8]
 	sub	w0, w2, #1
 	and	w0, w0, 255
@@ -2249,9 +2251,9 @@ flash_read_id:
 	ldrb	w7, [x8, 5]
 	add	w1, w10, 1
 	ldrb	w6, [x8, 4]
-	adrp	x0, .LC38
+	adrp	x0, .LC39
 	ldrb	w5, [x8, 3]
-	add	x0, x0, :lo12:.LC38
+	add	x0, x0, :lo12:.LC39
 	ldrb	w4, [x8, 2]
 	ldrb	w3, [x8, 1]
 	ldp	x29, x30, [sp], 16
@@ -2267,10 +2269,10 @@ flash_read_id:
 flash_read_spare:
 	stp	x29, x30, [sp, -16]!
 	mov	x5, x2
-	adrp	x2, .LANCHOR30+9
+	adrp	x2, .LANCHOR31+9
 	ubfiz	x0, x0, 8, 8
 	add	x29, sp, 0
-	ldrb	w3, [x2, #:lo12:.LANCHOR30+9]
+	ldrb	w3, [x2, #:lo12:.LANCHOR31+9]
 	adrp	x2, .LANCHOR13
 	ldr	x4, [x2, #:lo12:.LANCHOR13]
 	lsl	w3, w3, 9
@@ -2327,8 +2329,8 @@ flash_read_otp_data:
 	str	w0, [x19, 2056]
 	str	w4, [x19, 2052]
 	mov	w1, w20
-	adrp	x0, .LC39
-	add	x0, x0, :lo12:.LC39
+	adrp	x0, .LC40
+	add	x0, x0, :lo12:.LC40
 	ldr	w2, [x19, 2048]
 	ldr	w3, [x19, 2048]
 	ldr	w4, [x19, 2048]
@@ -2366,7 +2368,7 @@ flash_read_otp_data:
 	str	wzr, [x19, 2048]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
-	b	nandc_de_cs.constprop.28
+	b	nandc_de_cs.constprop.29
 	.size	flash_read_otp_data, .-flash_read_otp_data
 	.section	.text.sandisk_prog_test_bad_block,"ax",@progbits
 	.align	2
@@ -2379,10 +2381,10 @@ sandisk_prog_test_bad_block:
 	and	x2, x0, 255
 	add	x29, sp, 0
 	ldr	x4, [x1, #:lo12:.LANCHOR13]
-	adrp	x1, .LANCHOR30+29
+	adrp	x1, .LANCHOR31+29
 	str	x19, [sp, 16]
 	mov	x0, x2
-	ldrb	w1, [x1, #:lo12:.LANCHOR30+29]
+	ldrb	w1, [x1, #:lo12:.LANCHOR31+29]
 	add	x2, x2, 8
 	add	x2, x4, x2, lsl 8
 	cbz	w1, .L464
@@ -2414,9 +2416,9 @@ sandisk_prog_test_bad_block:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	tbz	x0, 12, .L463
-	adrp	x0, .LC40
+	adrp	x0, .LC41
 	mov	w1, w5
-	add	x0, x0, :lo12:.LC40
+	add	x0, x0, :lo12:.LC41
 	bl	printf
 .L463:
 	mov	w0, w19
@@ -2447,11 +2449,11 @@ nandc_rdy_status:
 	.global	nandc_bch_sel
 	.type	nandc_bch_sel, %function
 nandc_bch_sel:
-	adrp	x2, .LANCHOR43
+	adrp	x2, .LANCHOR44
 	mov	w1, 1
-	strb	w0, [x2, #:lo12:.LANCHOR43]
-	adrp	x2, .LANCHOR27
-	ldrb	w2, [x2, #:lo12:.LANCHOR27]
+	strb	w0, [x2, #:lo12:.LANCHOR44]
+	adrp	x2, .LANCHOR28
+	ldrb	w2, [x2, #:lo12:.LANCHOR28]
 	cmp	w2, 9
 	adrp	x2, .LANCHOR13
 	ldr	x2, [x2, #:lo12:.LANCHOR13]
@@ -2503,8 +2505,8 @@ nandc_bch_sel:
 	.global	zftl_nandc_get_irq_status
 	.type	zftl_nandc_get_irq_status, %function
 zftl_nandc_get_irq_status:
-	adrp	x1, .LANCHOR27
-	ldrb	w1, [x1, #:lo12:.LANCHOR27]
+	adrp	x1, .LANCHOR28
+	ldrb	w1, [x1, #:lo12:.LANCHOR28]
 	cmp	w1, 9
 	bne	.L492
 	ldr	w0, [x0, 296]
@@ -2541,15 +2543,15 @@ rk_nandc_flash_xfer_completed:
 nandc_xfer_start:
 	stp	x29, x30, [sp, -64]!
 	and	w1, w1, 255
-	adrp	x4, .LANCHOR46
+	adrp	x4, .LANCHOR47
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	w23, w0, 255
-	adrp	x0, .LANCHOR27
+	adrp	x0, .LANCHOR28
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	add	w20, w1, 1
-	ldrb	w0, [x0, #:lo12:.LANCHOR27]
+	ldrb	w0, [x0, #:lo12:.LANCHOR28]
 	adrp	x24, .LANCHOR13
 	cmp	w0, 9
 	bne	.L498
@@ -2558,21 +2560,21 @@ nandc_xfer_start:
 	orr	w19, w19, 8
 	asr	w20, w20, 1
 	bfi	w19, w0, 5, 2
-	adrp	x0, .LANCHOR44
+	adrp	x0, .LANCHOR45
 	orr	w19, w19, 536870912
 	orr	w19, w19, 1024
-	ldrb	w0, [x0, #:lo12:.LANCHOR44]
+	ldrb	w0, [x0, #:lo12:.LANCHOR45]
 	and	w19, w19, -17
 	bfi	w19, w20, 22, 6
 	orr	w19, w19, 128
 	cbz	w0, .L499
-	adrp	x0, .LANCHOR45
-	ldrb	w1, [x0, #:lo12:.LANCHOR45]
+	adrp	x0, .LANCHOR46
+	ldrb	w1, [x0, #:lo12:.LANCHOR46]
 	orr	w0, w19, 512
 	cmp	w1, 0
 	csel	w19, w0, w19, ne
 .L499:
-	add	x21, x4, :lo12:.LANCHOR46
+	add	x21, x4, :lo12:.LANCHOR47
 	add	x0, x2, 63
 	and	w20, w20, 63
 	and	x0, x0, -64
@@ -2606,9 +2608,9 @@ nandc_xfer_start:
 	cset	w2, eq
 	orr	w0, w0, 4
 	bfi	w0, w2, 1, 1
-	adrp	x2, .LANCHOR47
+	adrp	x2, .LANCHOR48
 	orr	w0, w0, 1
-	ldrh	w2, [x2, #:lo12:.LANCHOR47]
+	ldrh	w2, [x2, #:lo12:.LANCHOR48]
 	bfi	w0, w2, 16, 11
 	str	w0, [x1, 48]
 	str	w19, [x1, 16]
@@ -2637,11 +2639,11 @@ nandc_xfer_start:
 	and	w19, w19, -17
 	bfi	w19, w20, 22, 6
 	cbz	w23, .L501
-	adrp	x0, .LANCHOR43
+	adrp	x0, .LANCHOR44
 	ubfx	x1, x1, 1, 7
-	ldr	x8, [x4, #:lo12:.LANCHOR46]
+	ldr	x8, [x4, #:lo12:.LANCHOR47]
 	add	x1, x3, x1, lsl 2
-	ldrb	w0, [x0, #:lo12:.LANCHOR43]
+	ldrb	w0, [x0, #:lo12:.LANCHOR44]
 	mov	w5, 128
 	cmp	w0, 24
 	mov	w0, 64
@@ -2652,8 +2654,8 @@ nandc_xfer_start:
 	cmp	x3, x1
 	bne	.L504
 .L505:
-	add	x21, x4, :lo12:.LANCHOR46
-	ldr	x0, [x4, #:lo12:.LANCHOR46]
+	add	x21, x4, :lo12:.LANCHOR47
+	ldr	x0, [x4, #:lo12:.LANCHOR47]
 	and	w20, w20, 63
 	ubfiz	x1, x20, 10, 6
 	ubfiz	x20, x20, 7, 6
@@ -2698,7 +2700,7 @@ nandc_xfer_start:
 	mov	w0, w7
 	b	.L503
 .L501:
-	ldr	x1, [x4, #:lo12:.LANCHOR46]
+	ldr	x1, [x4, #:lo12:.LANCHOR47]
 	str	w0, [x1]
 	b	.L505
 	.size	nandc_xfer_start, .-nandc_xfer_start
@@ -2708,16 +2710,16 @@ nandc_xfer_start:
 	.type	nandc_set_seed, %function
 nandc_set_seed:
 	and	x0, x0, 127
-	adrp	x1, .LANCHOR48
-	add	x1, x1, :lo12:.LANCHOR48
+	adrp	x1, .LANCHOR49
+	add	x1, x1, :lo12:.LANCHOR49
 	ldrh	w0, [x1, x0, lsl 1]
-	adrp	x1, .LANCHOR45
-	ldrb	w2, [x1, #:lo12:.LANCHOR45]
+	adrp	x1, .LANCHOR46
+	ldrb	w2, [x1, #:lo12:.LANCHOR46]
 	orr	w1, w0, -1073741824
 	cmp	w2, 0
 	csel	w0, w1, w0, ne
-	adrp	x1, .LANCHOR27
-	ldrb	w1, [x1, #:lo12:.LANCHOR27]
+	adrp	x1, .LANCHOR28
+	ldrb	w1, [x1, #:lo12:.LANCHOR28]
 	cmp	w1, 9
 	adrp	x1, .LANCHOR13
 	ldr	x1, [x1, #:lo12:.LANCHOR13]
@@ -2740,33 +2742,33 @@ zftl_flash_de_init:
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
 	cbz	w0, .L520
-	adrp	x0, .LANCHOR49
-	ldrb	w0, [x0, #:lo12:.LANCHOR49]
+	adrp	x0, .LANCHOR19
+	ldrb	w0, [x0, #:lo12:.LANCHOR19]
 	cbnz	w0, .L520
 	bl	zftl_flash_exit_slc_mode
 .L520:
-	adrp	x19, .LANCHOR20
+	adrp	x19, .LANCHOR21
 	mov	w0, 0
 	bl	hynix_reconfig_rr_para
-	ldrb	w0, [x19, #:lo12:.LANCHOR20]
+	ldrb	w0, [x19, #:lo12:.LANCHOR21]
 	cbz	w0, .L521
-	adrp	x0, .LANCHOR42
-	ldrb	w0, [x0, #:lo12:.LANCHOR42]
+	adrp	x0, .LANCHOR43
+	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	tbz	x0, 0, .L521
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
 	bl	nandc_set_if_mode
-	strb	wzr, [x19, #:lo12:.LANCHOR20]
+	strb	wzr, [x19, #:lo12:.LANCHOR21]
 .L521:
-	adrp	x3, .LANCHOR45
-	ldrb	w0, [x3, #:lo12:.LANCHOR45]
+	adrp	x3, .LANCHOR46
+	ldrb	w0, [x3, #:lo12:.LANCHOR46]
 	cbz	w0, .L522
 	mov	w0, 0
-	strb	wzr, [x3, #:lo12:.LANCHOR45]
+	strb	wzr, [x3, #:lo12:.LANCHOR46]
 	bl	nandc_set_seed
 	mov	w0, 1
-	strb	w0, [x3, #:lo12:.LANCHOR45]
+	strb	w0, [x3, #:lo12:.LANCHOR46]
 .L522:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
@@ -2778,8 +2780,8 @@ zftl_flash_de_init:
 	.global	nandc_randomizer_enable
 	.type	nandc_randomizer_enable, %function
 nandc_randomizer_enable:
-	adrp	x1, .LANCHOR45
-	strb	w0, [x1, #:lo12:.LANCHOR45]
+	adrp	x1, .LANCHOR46
+	strb	w0, [x1, #:lo12:.LANCHOR46]
 	ret
 	.size	nandc_randomizer_enable, .-nandc_randomizer_enable
 	.section	.text.nandc_get_chip_if,"ax",@progbits
@@ -3079,8 +3081,8 @@ buf_remove_free:
 	.global	flash_check_bad_block
 	.type	flash_check_bad_block, %function
 flash_check_bad_block:
-	adrp	x3, .LANCHOR30
-	add	x3, x3, :lo12:.LANCHOR30
+	adrp	x3, .LANCHOR31
+	add	x3, x3, :lo12:.LANCHOR31
 	and	w5, w0, 255
 	lsr	w4, w1, 5
 	and	w1, w1, 31
@@ -3093,8 +3095,8 @@ flash_check_bad_block:
 	asr	w2, w2, 5
 	lsl	w2, w2, 2
 	umaddl	x0, w2, w5, x0
-	adrp	x2, .LANCHOR26
-	ldr	x2, [x2, #:lo12:.LANCHOR26]
+	adrp	x2, .LANCHOR27
+	ldr	x2, [x2, #:lo12:.LANCHOR27]
 	add	x0, x0, x4, uxtw 2
 	ldr	w0, [x2, x0]
 	lsr	w0, w0, w1
@@ -3111,14 +3113,14 @@ flash_mask_bad_block:
 	add	x29, sp, 0
 	str	x21, [sp, 32]
 	and	w21, w0, 255
-	adrp	x0, .LANCHOR30
-	add	x0, x0, :lo12:.LANCHOR30
+	adrp	x0, .LANCHOR31
+	add	x0, x0, :lo12:.LANCHOR31
 	stp	x19, x20, [sp, 16]
 	mov	w20, w1
 	ldrh	w19, [x0, 14]
 	ldrb	w1, [x0, 13]
-	adrp	x0, .LC41
-	add	x0, x0, :lo12:.LC41
+	adrp	x0, .LC42
+	add	x0, x0, :lo12:.LC42
 	mul	w19, w19, w1
 	mov	w1, w21
 	bl	printf
@@ -3132,8 +3134,8 @@ flash_mask_bad_block:
 	umaddl	x1, w1, w21, x19
 	ldr	x21, [sp, 32]
 	add	x1, x1, x0, uxtw 2
-	adrp	x0, .LANCHOR26
-	ldr	x2, [x0, #:lo12:.LANCHOR26]
+	adrp	x0, .LANCHOR27
+	ldr	x2, [x0, #:lo12:.LANCHOR27]
 	mov	w0, 1
 	lsl	w0, w0, w20
 	ldr	w20, [x2, x1]
@@ -3273,8 +3275,8 @@ gc_add_sblk:
 	adrp	x0, .LANCHOR63+56
 	ubfx	x3, x3, 5, 3
 	ldrh	w5, [x0, #:lo12:.LANCHOR63+56]
-	adrp	x0, .LC42
-	add	x0, x0, :lo12:.LC42
+	adrp	x0, .LC43
+	add	x0, x0, :lo12:.LC43
 	bl	printf
 .L607:
 	ldr	x0, [x27, #:lo12:.LANCHOR7]
@@ -3334,8 +3336,8 @@ gc_add_sblk:
 	ubfx	x2, x2, 5, 3
 	mov	w1, w20
 	ldrh	w3, [x0, x26]
-	adrp	x0, .LC43
-	add	x0, x0, :lo12:.LC43
+	adrp	x0, .LC44
+	add	x0, x0, :lo12:.LC44
 	bl	printf
 	b	.L628
 .L611:
@@ -3362,8 +3364,8 @@ gc_add_sblk:
 	mov	w2, w24
 	mov	w1, w20
 	ldrh	w4, [x0, x26]
-	adrp	x0, .LC42
-	add	x0, x0, :lo12:.LC42
+	adrp	x0, .LC43
+	add	x0, x0, :lo12:.LC43
 	bl	printf
 .L617:
 	mov	x0, x19
@@ -3405,14 +3407,78 @@ gc_add_sblk:
 	bne	.L620
 	b	.L638
 	.size	gc_add_sblk, .-gc_add_sblk
+	.section	.text.gc_mark_bad_ppa,"ax",@progbits
+	.align	2
+	.global	gc_mark_bad_ppa
+	.type	gc_mark_bad_ppa, %function
+gc_mark_bad_ppa:
+	stp	x29, x30, [sp, -64]!
+	adrp	x1, .LANCHOR66
+	mov	w3, w0
+	add	x29, sp, 0
+	ldrh	w1, [x1, #:lo12:.LANCHOR66]
+	stp	x19, x20, [sp, 16]
+	mov	w19, 21
+	sub	w19, w19, w1
+	str	x23, [sp, 48]
+	lsr	w2, w0, w1
+	adrp	x1, .LANCHOR67
+	mov	w23, 1
+	stp	x21, x22, [sp, 32]
+	ldrb	w1, [x1, #:lo12:.LANCHOR67]
+	lsl	w19, w23, w19
+	sub	w19, w19, #1
+	adrp	x20, .LANCHOR63
+	and	w19, w19, w2
+	add	x21, x20, :lo12:.LANCHOR63
+	and	w22, w2, 65535
+	adrp	x0, .LC45
+	mov	w2, w22
+	add	x0, x0, :lo12:.LC45
+	udiv	w19, w19, w1
+	ldr	w1, [x21, 328]
+	and	w19, w19, 65535
+	bl	printf
+	mov	w1, w23
+	mov	w2, 0
+	mov	w0, w19
+	bl	gc_add_sblk
+	ldr	w0, [x21, 328]
+	mov	w1, 0
+.L640:
+	cmp	w1, w0
+	bcc	.L642
+	cmp	w0, 5
+	bhi	.L641
+	add	x20, x20, :lo12:.LANCHOR63
+	add	w1, w0, 1
+	str	w1, [x20, 328]
+	add	x20, x20, x0, uxtw 1
+	strh	w22, [x20, 332]
+.L641:
+	mov	w0, 0
+	ldr	x23, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+.L642:
+	add	x2, x21, x1, sxtw 1
+	ldrh	w2, [x2, 332]
+	cmp	w2, w22
+	beq	.L641
+	add	w1, w1, 1
+	and	w1, w1, 65535
+	b	.L640
+	.size	gc_mark_bad_ppa, .-gc_mark_bad_ppa
 	.section	.text.gc_get_src_ppa_from_index,"ax",@progbits
 	.align	2
 	.global	gc_get_src_ppa_from_index
 	.type	gc_get_src_ppa_from_index, %function
 gc_get_src_ppa_from_index:
-	adrp	x1, .LANCHOR66
+	adrp	x1, .LANCHOR68
 	ubfiz	x0, x0, 2, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR66]
+	ldr	x1, [x1, #:lo12:.LANCHOR68]
 	ldr	w0, [x1, x0]
 	ret
 	.size	gc_get_src_ppa_from_index, .-gc_get_src_ppa_from_index
@@ -3424,18 +3490,18 @@ gc_write_completed:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR67
+	adrp	x22, .LANCHOR69
 	stp	x23, x24, [sp, 48]
-	add	x22, x22, :lo12:.LANCHOR67
+	add	x22, x22, :lo12:.LANCHOR69
 	adrp	x23, .LANCHOR50
 	add	x21, x23, :lo12:.LANCHOR50
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-.L641:
+.L646:
 	ldrb	w0, [x22]
 	cmp	w0, 255
-	bne	.L654
+	bne	.L659
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -3443,7 +3509,7 @@ gc_write_completed:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L654:
+.L659:
 	sxtw	x26, w0
 	add	x1, x23, :lo12:.LANCHOR50
 	lsl	x3, x26, 6
@@ -3452,116 +3518,116 @@ gc_write_completed:
 	ldr	w1, [x2, 52]
 	strb	w0, [x22]
 	ldrh	w24, [x2, 48]
-	cbz	w1, .L642
+	cbz	w1, .L647
 	ldr	w2, [x2, 40]
 	adrp	x0, .LANCHOR63
 	add	x0, x0, :lo12:.LANCHOR63
 	mov	w3, 1
 	str	w2, [x0, 324]
 	strh	w3, [x0, 320]
-	adrp	x0, .LC44
-	add	x0, x0, :lo12:.LC44
+	adrp	x0, .LC46
+	add	x0, x0, :lo12:.LC46
 	bl	printf
-	adrp	x1, .LANCHOR68
+	adrp	x1, .LANCHOR70
 	adrp	x0, .LC0
-	mov	w2, 625
-	add	x1, x1, :lo12:.LANCHOR68
+	mov	w2, 673
+	add	x1, x1, :lo12:.LANCHOR70
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L642:
-	adrp	x25, .LANCHOR69
-	ldrb	w0, [x25, #:lo12:.LANCHOR69]
+.L647:
+	adrp	x25, .LANCHOR71
+	ldrb	w0, [x25, #:lo12:.LANCHOR71]
 	cmp	w0, 3
-	bne	.L643
+	bne	.L648
 	adrp	x0, .LANCHOR10
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldrb	w19, [x0, 89]
 	add	w19, w19, w19, lsl 1
 	and	w19, w19, 1023
-.L644:
+.L649:
 	adrp	x0, .LANCHOR14
-	adrp	x28, .LANCHOR72
+	adrp	x28, .LANCHOR74
 	and	x20, x24, 65535
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L645
-	ldr	x1, [x28, #:lo12:.LANCHOR72]
+	tbz	x0, 8, .L650
+	ldr	x1, [x28, #:lo12:.LANCHOR74]
 	add	x0, x21, x26, lsl 6
 	mov	w3, w24
 	ldrb	w2, [x0, 1]
-	adrp	x0, .LC45
+	adrp	x0, .LC47
 	ldrb	w4, [x1, x20]
-	add	x0, x0, :lo12:.LC45
+	add	x0, x0, :lo12:.LC47
 	mov	w1, w24
 	bl	printf
-.L645:
-	ldr	x1, [x28, #:lo12:.LANCHOR72]
+.L650:
+	ldr	x1, [x28, #:lo12:.LANCHOR74]
 	add	x0, x21, x26, lsl 6
 	mov	x27, x20
 	ldrb	w0, [x0, 1]
 	ldrb	w1, [x1, x20]
 	cmp	w1, w0
-	beq	.L646
-	adrp	x1, .LANCHOR68
+	beq	.L651
+	adrp	x1, .LANCHOR70
 	adrp	x0, .LC0
-	mov	w2, 634
-	add	x1, x1, :lo12:.LANCHOR68
+	mov	w2, 682
+	add	x1, x1, :lo12:.LANCHOR70
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L646:
+.L651:
 	add	x0, x21, x26, lsl 6
 	ldrb	w0, [x0, 61]
 	cmp	w0, 3
-	beq	.L647
-	ldrb	w0, [x25, #:lo12:.LANCHOR69]
+	beq	.L652
+	ldrb	w0, [x25, #:lo12:.LANCHOR71]
 	cmp	w0, 3
-	bne	.L647
+	bne	.L652
+	adrp	x0, .LANCHOR75
+	ldrb	w0, [x0, #:lo12:.LANCHOR75]
+	cbnz	w0, .L652
+	adrp	x0, .LANCHOR72
+	ldrb	w0, [x0, #:lo12:.LANCHOR72]
+	cbz	w0, .L653
 	adrp	x0, .LANCHOR73
 	ldrb	w0, [x0, #:lo12:.LANCHOR73]
-	cbnz	w0, .L647
-	adrp	x0, .LANCHOR70
-	ldrb	w0, [x0, #:lo12:.LANCHOR70]
-	cbz	w0, .L648
-	adrp	x0, .LANCHOR71
-	ldrb	w0, [x0, #:lo12:.LANCHOR71]
-	cbnz	w0, .L647
-.L648:
-	ldr	x1, [x28, #:lo12:.LANCHOR72]
+	cbnz	w0, .L652
+.L653:
+	ldr	x1, [x28, #:lo12:.LANCHOR74]
 	mov	x0, 0
 	add	x20, x1, x20
-.L649:
+.L654:
 	cmp	w19, w0, uxth
-	bls	.L641
+	bls	.L646
 	ldrb	w1, [x20, x0]
 	add	x0, x0, 1
 	add	x1, x21, x1, lsl 6
 	strb	wzr, [x1, 61]
-	b	.L649
-.L643:
-	adrp	x0, .LANCHOR70
-	ldrb	w0, [x0, #:lo12:.LANCHOR70]
-	cbz	w0, .L656
-	adrp	x0, .LANCHOR71
-	ldrb	w0, [x0, #:lo12:.LANCHOR71]
-	cbz	w0, .L656
+	b	.L654
+.L648:
+	adrp	x0, .LANCHOR72
+	ldrb	w0, [x0, #:lo12:.LANCHOR72]
+	cbz	w0, .L661
+	adrp	x0, .LANCHOR73
+	ldrb	w0, [x0, #:lo12:.LANCHOR73]
+	cbz	w0, .L661
 	adrp	x0, .LANCHOR10
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldrb	w19, [x0, 89]
 	ubfiz	w19, w19, 1, 8
-	b	.L644
-.L656:
+	b	.L649
+.L661:
 	mov	w19, 1
-	b	.L644
-.L647:
+	b	.L649
+.L652:
 	adrp	x0, .LANCHOR63
 	add	x0, x0, :lo12:.LANCHOR63
 	add	x19, x20, x19, uxth
 	mov	x20, x0
 	strh	w24, [x0, 316]
 	mov	w24, -1
-.L650:
+.L655:
 	cmp	x19, x27
-	beq	.L641
-	ldr	x1, [x28, #:lo12:.LANCHOR72]
+	beq	.L646
+	ldr	x1, [x28, #:lo12:.LANCHOR74]
 	ldrb	w0, [x1, x27]
 	strb	w24, [x1, x27]
 	add	x27, x27, 1
@@ -3574,7 +3640,7 @@ gc_write_completed:
 	ldrb	w0, [x20, 7]
 	sub	w0, w0, #1
 	strb	w0, [x20, 7]
-	b	.L650
+	b	.L655
 	.size	gc_write_completed, .-gc_write_completed
 	.section	.text.gc_get_src_blk,"ax",@progbits
 	.align	2
@@ -3583,47 +3649,47 @@ gc_write_completed:
 gc_get_src_blk:
 	adrp	x0, .LANCHOR10
 	ldr	x2, [x0, #:lo12:.LANCHOR10]
-	adrp	x0, .LANCHOR74
-	ldrb	w3, [x0, #:lo12:.LANCHOR74]
+	adrp	x0, .LANCHOR76
+	ldrb	w3, [x0, #:lo12:.LANCHOR76]
 	ldrh	w0, [x2, 124]
-	cbz	w0, .L671
+	cbz	w0, .L676
 	add	x1, x2, 392
 	mov	w4, 1
-.L672:
+.L677:
 	add	x5, x1, 128
 	mov	w6, 65535
-.L676:
+.L681:
 	ldrh	w0, [x1]
 	cmp	w0, w6
-	beq	.L674
+	beq	.L679
 	mov	w5, -1
 	strh	w5, [x1]
-	cbz	w4, .L675
+	cbz	w4, .L680
 	ldrh	w1, [x2, 124]
 	sub	w1, w1, #1
 	strh	w1, [x2, 124]
 	ret
-.L671:
+.L676:
 	add	x0, x2, x3, sxtw 1
 	ldrh	w0, [x0, 120]
-	cbz	w0, .L677
+	cbz	w0, .L682
 	ubfiz	x1, x3, 7, 8
 	mov	w4, 0
 	add	x1, x1, 136
 	add	x1, x2, x1
-	b	.L672
-.L675:
+	b	.L677
+.L680:
 	add	x2, x2, x3, uxtb 1
 	ldrh	w1, [x2, 120]
 	sub	w1, w1, #1
 	strh	w1, [x2, 120]
 	ret
-.L674:
+.L679:
 	add	x1, x1, 2
 	cmp	x1, x5
-	bne	.L676
+	bne	.L681
 	ret
-.L677:
+.L682:
 	mov	w0, 65535
 	ret
 	.size	gc_get_src_blk, .-gc_get_src_blk
@@ -3639,53 +3705,53 @@ gc_free_temp_buf:
 	add	x0, x20, :lo12:.LANCHOR63
 	stp	x21, x22, [sp, 32]
 	ldrb	w1, [x0, 7]
-	cbz	w1, .L686
+	cbz	w1, .L691
 	adrp	x1, .LANCHOR52
 	ldrb	w1, [x1, #:lo12:.LANCHOR52]
 	cmp	w1, 1
-	bhi	.L686
+	bhi	.L691
 	ldrh	w19, [x0, 316]
-	adrp	x2, .LANCHOR76
-	adrp	x0, .LANCHOR75
-	adrp	x21, .LANCHOR72
-	ldrb	w2, [x2, #:lo12:.LANCHOR76]
+	adrp	x2, .LANCHOR78
+	adrp	x0, .LANCHOR77
+	adrp	x21, .LANCHOR74
+	ldrb	w2, [x2, #:lo12:.LANCHOR78]
 	add	w1, w19, 24
-	ldrh	w0, [x0, #:lo12:.LANCHOR75]
-	ldr	x4, [x21, #:lo12:.LANCHOR72]
+	ldrh	w0, [x0, #:lo12:.LANCHOR77]
+	ldr	x4, [x21, #:lo12:.LANCHOR74]
 	mul	w0, w0, w2
 	cmp	w0, w1
 	csel	w1, w0, w1, ls
 	adrp	x0, .LANCHOR50
 	add	x0, x0, :lo12:.LANCHOR50
-.L681:
-	cmp	w19, w1
-	bcc	.L684
 .L686:
+	cmp	w19, w1
+	bcc	.L689
+.L691:
 	mov	w0, 0
-	b	.L679
-.L684:
+	b	.L684
+.L689:
 	uxtw	x22, w19
 	ldrb	w2, [x4, x22]
 	cmp	w2, 255
-	beq	.L682
+	beq	.L687
 	sbfiz	x3, x2, 6, 32
 	add	x3, x0, x3
 	ldrb	w3, [x3, 61]
-	cbnz	w3, .L682
+	cbnz	w3, .L687
 	ubfiz	x2, x2, 6, 8
 	add	x0, x0, x2
 	bl	buf_free
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L683
-	ldr	x0, [x21, #:lo12:.LANCHOR72]
+	tbz	x0, 8, .L688
+	ldr	x0, [x21, #:lo12:.LANCHOR74]
 	mov	w1, w19
 	ldrb	w2, [x0, x22]
-	adrp	x0, .LC46
-	add	x0, x0, :lo12:.LC46
+	adrp	x0, .LC48
+	add	x0, x0, :lo12:.LC48
 	bl	printf
-.L683:
-	ldr	x0, [x21, #:lo12:.LANCHOR72]
+.L688:
+	ldr	x0, [x21, #:lo12:.LANCHOR74]
 	add	x20, x20, :lo12:.LANCHOR63
 	mov	w1, -1
 	strb	w1, [x0, x22]
@@ -3693,32 +3759,32 @@ gc_free_temp_buf:
 	sub	w0, w0, #1
 	strb	w0, [x20, 7]
 	mov	w0, 1
-.L679:
+.L684:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L682:
+.L687:
 	add	w19, w19, 1
-	b	.L681
+	b	.L686
 	.size	gc_free_temp_buf, .-gc_free_temp_buf
 	.section	.text.print_gc_debug_info,"ax",@progbits
 	.align	2
 	.global	print_gc_debug_info
 	.type	print_gc_debug_info, %function
 print_gc_debug_info:
-	adrp	x2, .LANCHOR77
+	adrp	x2, .LANCHOR79
 	adrp	x1, .LANCHOR63
 	add	x0, x1, :lo12:.LANCHOR63
-	ldrh	w6, [x2, #:lo12:.LANCHOR77]
+	ldrh	w6, [x2, #:lo12:.LANCHOR79]
 	adrp	x2, .LANCHOR52
 	ldrh	w1, [x1, #:lo12:.LANCHOR63]
 	ldrb	w5, [x0, 7]
 	ldrb	w4, [x2, #:lo12:.LANCHOR52]
 	ldrh	w3, [x0, 314]
 	ldrh	w2, [x0, 2]
-	adrp	x0, .LC47
-	add	x0, x0, :lo12:.LC47
+	adrp	x0, .LC49
+	add	x0, x0, :lo12:.LC49
 	b	printf
 	.size	print_gc_debug_info, .-print_gc_debug_info
 	.section	.text.zftl_get_gc_node,"ax",@progbits
@@ -3729,21 +3795,21 @@ zftl_get_gc_node:
 	and	w1, w1, 65535
 	and	w0, w0, 65535
 	cmp	w1, 5
-	bne	.L696
+	bne	.L701
 	mov	w1, w0
-	adrp	x0, .LANCHOR78
-	ldr	x0, [x0, #:lo12:.LANCHOR78]
-.L698:
+	adrp	x0, .LANCHOR80
+	ldr	x0, [x0, #:lo12:.LANCHOR80]
+.L703:
 	b	_list_get_gc_head_node.isra.2
-.L696:
+.L701:
 	cmp	w1, 2
-	bne	.L697
+	bne	.L702
 	b	zftl_get_gc_node.part.9
-.L697:
+.L702:
 	mov	w1, w0
-	adrp	x0, .LANCHOR79
-	ldr	x0, [x0, #:lo12:.LANCHOR79]
-	b	.L698
+	adrp	x0, .LANCHOR81
+	ldr	x0, [x0, #:lo12:.LANCHOR81]
+	b	.L703
 	.size	zftl_get_gc_node, .-zftl_get_gc_node
 	.section	.text.gc_search_src_blk,"ax",@progbits
 	.align	2
@@ -3764,9 +3830,9 @@ gc_search_src_blk:
 	stp	x27, x28, [sp, 80]
 	add	x0, x0, x21, sxtw 1
 	ldrh	w19, [x0, 120]
-	cbz	w19, .L700
+	cbz	w19, .L705
 	mov	w0, w19
-.L699:
+.L704:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -3774,72 +3840,72 @@ gc_search_src_blk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L700:
+.L705:
 	and	w20, w2, 255
-	cbnz	w21, .L702
-	adrp	x24, .LANCHOR80
+	cbnz	w21, .L707
+	adrp	x24, .LANCHOR82
 	adrp	x26, .LANCHOR14
-	adrp	x27, .LC48
+	adrp	x27, .LC50
 	and	w22, w20, 65535
 	add	x26, x26, :lo12:.LANCHOR14
-	add	x27, x27, :lo12:.LC48
-	strh	wzr, [x24, #:lo12:.LANCHOR80]
+	add	x27, x27, :lo12:.LC50
+	strh	wzr, [x24, #:lo12:.LANCHOR82]
 	mov	w23, 0
 	mov	w25, 0
-.L703:
+.L708:
 	cmp	w25, w22
-	bcs	.L708
-	ldrh	w6, [x24, #:lo12:.LANCHOR80]
-	add	x7, x24, :lo12:.LANCHOR80
+	bcs	.L713
+	ldrh	w6, [x24, #:lo12:.LANCHOR82]
+	add	x7, x24, :lo12:.LANCHOR82
 	mov	w1, 3
 	mov	w0, w6
 	bl	zftl_get_gc_node
 	add	w2, w6, 1
 	and	w2, w2, 65535
-	strh	w2, [x24, #:lo12:.LANCHOR80]
+	strh	w2, [x24, #:lo12:.LANCHOR82]
 	and	w1, w0, 65535
 	mov	w0, 65535
 	mov	w28, w1
 	cmp	w1, w0
-	beq	.L704
+	beq	.L709
 	ldr	w0, [x26]
 	adrp	x6, .LANCHOR9
 	uxtw	x4, w1
-	tbz	x0, 8, .L705
+	tbz	x0, 8, .L710
 	ldr	x0, [x6, #:lo12:.LANCHOR9]
 	stp	x6, x4, [x29, 96]
 	ldrh	w3, [x0, x4, lsl 1]
 	mov	x0, x27
 	bl	printf
 	ldp	x6, x4, [x29, 96]
-.L705:
+.L710:
 	ldr	x0, [x6, #:lo12:.LANCHOR9]
 	ldrh	w1, [x0, x4, lsl 1]
 	adrp	x0, .LANCHOR62
 	ldrh	w0, [x0, #:lo12:.LANCHOR62]
 	cmp	w1, w0
-	bcs	.L706
+	bcs	.L711
 	mov	w2, 0
 	mov	w1, 0
 	mov	w0, w28
 	bl	gc_add_sblk
-	cbz	w0, .L707
+	cbz	w0, .L712
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w22, w23
-	bcs	.L707
-.L708:
+	bcs	.L712
+.L713:
 	ldr	x0, [x29, 112]
-	tbz	x0, 1, .L710
-	adrp	x25, .LANCHOR82
-	adrp	x24, .LANCHOR81
-	add	x27, x25, :lo12:.LANCHOR82
-	add	x24, x24, :lo12:.LANCHOR81
+	tbz	x0, 1, .L715
+	adrp	x25, .LANCHOR84
+	adrp	x24, .LANCHOR83
+	add	x27, x25, :lo12:.LANCHOR84
+	add	x24, x24, :lo12:.LANCHOR83
 	mov	w28, 0
 	mov	w26, 65535
-.L711:
+.L716:
 	cmp	w28, w22
-	beq	.L715
+	beq	.L720
 	ldrh	w6, [x24]
 	mov	w1, 5
 	mov	w0, w6
@@ -3848,219 +3914,219 @@ gc_search_src_blk:
 	strh	w6, [x24]
 	and	w1, w0, 65535
 	cmp	w1, w26
-	beq	.L712
+	beq	.L717
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x1]
 	ldrh	w1, [x27]
 	cmp	w2, w1
-	bcs	.L712
+	bcs	.L717
 	mov	w2, 0
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L714
+	cbz	w0, .L719
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w22, w23
-	bcs	.L714
-.L715:
+	bcs	.L719
+.L720:
 	cmp	w23, w22
-	adrp	x0, .LANCHOR83
-	bcs	.L717
-	ldrh	w1, [x0, #:lo12:.LANCHOR83]
-	adrp	x3, .LANCHOR76
-	adrp	x0, .LANCHOR75
-	ldrh	w2, [x25, #:lo12:.LANCHOR82]
-	ldrb	w3, [x3, #:lo12:.LANCHOR76]
-	ldrh	w0, [x0, #:lo12:.LANCHOR75]
+	adrp	x0, .LANCHOR85
+	bcs	.L722
+	ldrh	w1, [x0, #:lo12:.LANCHOR85]
+	adrp	x3, .LANCHOR78
+	adrp	x0, .LANCHOR77
+	ldrh	w2, [x25, #:lo12:.LANCHOR84]
+	ldrb	w3, [x3, #:lo12:.LANCHOR78]
+	ldrh	w0, [x0, #:lo12:.LANCHOR77]
 	mul	w0, w0, w3
 	sub	w0, w0, w1, lsr 2
 	cmp	w2, w0
-	bge	.L710
+	bge	.L715
 	add	w1, w2, w1, lsr 3
-	strh	w1, [x25, #:lo12:.LANCHOR82]
-.L710:
+	strh	w1, [x25, #:lo12:.LANCHOR84]
+.L715:
 	ldr	x0, [x29, 112]
-	tbz	x0, 0, .L718
+	tbz	x0, 0, .L723
 	cmp	w23, w22
-	bcs	.L718
-	adrp	x24, .LANCHOR84
-	add	x24, x24, :lo12:.LANCHOR84
+	bcs	.L723
+	adrp	x24, .LANCHOR86
+	add	x24, x24, :lo12:.LANCHOR86
 	mov	w25, 65535
-.L723:
+.L728:
 	ldrh	w6, [x24]
 	mov	w0, w6
 	bl	zftl_get_gc_node.part.9
 	add	w6, w6, 1
 	strh	w6, [x24]
 	cmp	w25, w0, uxth
-	beq	.L719
+	beq	.L724
 	mov	w2, 0
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L720
+	cbz	w0, .L725
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w22, w23
-	bhi	.L720
-.L721:
-	adrp	x0, .LANCHOR83
+	bhi	.L725
+.L726:
+	adrp	x0, .LANCHOR85
 	adrp	x1, .LANCHOR62
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	ldrh	w0, [x0, #:lo12:.LANCHOR85]
 	ldrh	w2, [x1, #:lo12:.LANCHOR62]
 	cmp	w2, w0, lsr 1
-	bls	.L718
+	bls	.L723
 	sub	w0, w2, w0, lsr 3
-	b	.L798
-.L706:
-	strh	wzr, [x24, #:lo12:.LANCHOR80]
-	b	.L708
-.L704:
+	b	.L803
+.L711:
+	strh	wzr, [x24, #:lo12:.LANCHOR82]
+	b	.L713
+.L709:
 	strh	wzr, [x7]
-	b	.L708
-.L707:
+	b	.L713
+.L712:
 	add	w25, w25, 1
 	and	w25, w25, 65535
-	b	.L703
-.L712:
+	b	.L708
+.L717:
 	strh	wzr, [x24]
-	b	.L715
-.L714:
+	b	.L720
+.L719:
 	add	w28, w28, 1
 	and	w28, w28, 65535
-	b	.L711
-.L717:
-	ldrh	w1, [x25, #:lo12:.LANCHOR82]
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	b	.L716
+.L722:
+	ldrh	w1, [x25, #:lo12:.LANCHOR84]
+	ldrh	w0, [x0, #:lo12:.LANCHOR85]
 	cmp	w1, w0
-	bls	.L710
+	bls	.L715
 	sub	w0, w1, w0, lsr 3
-	strh	w0, [x25, #:lo12:.LANCHOR82]
-	b	.L710
-.L719:
+	strh	w0, [x25, #:lo12:.LANCHOR84]
+	b	.L715
+.L724:
 	strh	wzr, [x24]
-.L722:
+.L727:
 	cmp	w23, w22
-	bcs	.L721
+	bcs	.L726
 	adrp	x1, .LANCHOR62
-	adrp	x0, .LANCHOR83
+	adrp	x0, .LANCHOR85
 	ldrh	w2, [x1, #:lo12:.LANCHOR62]
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	ldrh	w0, [x0, #:lo12:.LANCHOR85]
 	cmp	w2, w0
-	bcs	.L718
+	bcs	.L723
 	add	w0, w2, w0, lsr 3
-.L798:
+.L803:
 	strh	w0, [x1, #:lo12:.LANCHOR62]
-.L718:
+.L723:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L745
+	tbz	x0, 8, .L750
 	ldr	w2, [x29, 112]
-	adrp	x0, .LC49
+	adrp	x0, .LC51
 	mov	w4, w20
 	mov	w3, w23
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC49
+	add	x0, x0, :lo12:.LC51
 	bl	printf
-.L745:
+.L750:
 	mov	w0, w23
-	b	.L699
-.L720:
+	b	.L704
+.L725:
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	cmp	w22, w19
-	bne	.L723
-	b	.L722
-.L702:
+	bne	.L728
+	b	.L727
+.L707:
 	adrp	x0, .LANCHOR63+318
 	strh	wzr, [x0, #:lo12:.LANCHOR63+318]
-	adrp	x0, .LANCHOR85
-	strh	wzr, [x0, #:lo12:.LANCHOR85]
+	adrp	x0, .LANCHOR87
+	strh	wzr, [x0, #:lo12:.LANCHOR87]
 	ldr	w0, [x29, 112]
 	and	w0, w0, 1
 	str	w0, [x29, 104]
 	ldr	x0, [x29, 112]
-	tbz	x0, 0, .L748
-	adrp	x1, .LANCHOR87
-	adrp	x25, .LANCHOR86
+	tbz	x0, 0, .L753
+	adrp	x1, .LANCHOR89
+	adrp	x25, .LANCHOR88
 	str	x1, [x29, 96]
-	adrp	x26, .LANCHOR88
-	ldrh	w0, [x25, #:lo12:.LANCHOR86]
-	ldrh	w2, [x1, #:lo12:.LANCHOR87]
+	adrp	x26, .LANCHOR90
+	ldrh	w0, [x25, #:lo12:.LANCHOR88]
+	ldrh	w2, [x1, #:lo12:.LANCHOR89]
 	cmp	w0, w2, lsr 2
-	bcc	.L725
-	ldrh	w1, [x26, #:lo12:.LANCHOR88]
+	bcc	.L730
+	ldrh	w1, [x26, #:lo12:.LANCHOR90]
 	cmp	w1, w0
-	bls	.L749
-.L725:
-	ldrh	w0, [x26, #:lo12:.LANCHOR88]
-	adrp	x22, .LANCHOR84
+	bls	.L754
+.L730:
+	ldrh	w0, [x26, #:lo12:.LANCHOR90]
+	adrp	x22, .LANCHOR86
 	lsr	w0, w0, 2
-	strh	w0, [x22, #:lo12:.LANCHOR84]
+	strh	w0, [x22, #:lo12:.LANCHOR86]
 	mov	w0, 0
 	bl	zftl_get_gc_node.part.9
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L751
+	beq	.L756
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x3, [x2, #:lo12:.LANCHOR9]
-	adrp	x2, .LANCHOR83
-	ldrh	w2, [x2, #:lo12:.LANCHOR83]
+	adrp	x2, .LANCHOR85
+	ldrh	w2, [x2, #:lo12:.LANCHOR85]
 	ldrh	w1, [x3, x1]
 	cmp	w1, w2, lsr 2
-	bcs	.L751
-	strh	wzr, [x22, #:lo12:.LANCHOR84]
+	bcs	.L756
+	strh	wzr, [x22, #:lo12:.LANCHOR86]
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
 	cmp	w0, 0
 	cset	w23, ne
-.L727:
-	add	x22, x22, :lo12:.LANCHOR84
+.L732:
+	add	x22, x22, :lo12:.LANCHOR86
 	and	w28, w20, 65535
 	mov	w24, 64
 	mov	w27, 65535
-.L729:
+.L734:
 	ldrh	w6, [x22]
 	mov	w0, w6
 	bl	zftl_get_gc_node.part.9
 	add	w6, w6, 1
 	strh	w6, [x22]
 	cmp	w27, w0, uxth
-	beq	.L726
+	beq	.L731
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L728
+	cbz	w0, .L733
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w23, w28
-	bcs	.L726
-.L728:
+	bcs	.L731
+.L733:
 	sub	w24, w24, #1
 	ands	w24, w24, 65535
-	bne	.L729
-.L726:
+	bne	.L734
+.L731:
 	ldr	x0, [x29, 96]
-	ldrh	w1, [x25, #:lo12:.LANCHOR86]
-	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	ldrh	w1, [x25, #:lo12:.LANCHOR88]
+	ldrh	w0, [x0, #:lo12:.LANCHOR89]
 	cmp	w1, w0, lsr 3
-	bhi	.L746
-	ldrh	w0, [x26, #:lo12:.LANCHOR88]
+	bhi	.L751
+	ldrh	w0, [x26, #:lo12:.LANCHOR90]
 	add	w0, w0, 8
 	cmp	w1, w0
-	ble	.L724
-.L746:
-	adrp	x24, .LANCHOR80
+	ble	.L729
+.L751:
+	adrp	x24, .LANCHOR82
 	and	w26, w20, 65535
 	mov	w22, 64
 	mov	w25, 65535
-	strh	wzr, [x24, #:lo12:.LANCHOR80]
-	add	x24, x24, :lo12:.LANCHOR80
-.L731:
+	strh	wzr, [x24, #:lo12:.LANCHOR82]
+	add	x24, x24, :lo12:.LANCHOR82
+.L736:
 	ldrh	w6, [x24]
 	mov	w1, 3
 	mov	w0, w6
@@ -4068,31 +4134,31 @@ gc_search_src_blk:
 	add	w6, w6, 1
 	strh	w6, [x24]
 	cmp	w25, w0, uxth
-	beq	.L724
+	beq	.L729
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L730
+	cbz	w0, .L735
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w23, w26
-	bcs	.L724
-.L730:
+	bcs	.L729
+.L735:
 	sub	w22, w22, #1
 	ands	w22, w22, 65535
-	bne	.L731
-.L724:
+	bne	.L736
+.L729:
 	ldr	x0, [x29, 112]
-	tbz	x0, 1, .L732
-	adrp	x24, .LANCHOR81
-	adrp	x28, .LANCHOR89
-	adrp	x25, .LANCHOR76
-	add	x26, x24, :lo12:.LANCHOR81
-	add	x27, x28, :lo12:.LANCHOR89
-	add	x25, x25, :lo12:.LANCHOR76
-	strh	wzr, [x24, #:lo12:.LANCHOR81]
+	tbz	x0, 1, .L737
+	adrp	x24, .LANCHOR83
+	adrp	x28, .LANCHOR91
+	adrp	x25, .LANCHOR78
+	add	x26, x24, :lo12:.LANCHOR83
+	add	x27, x28, :lo12:.LANCHOR91
+	add	x25, x25, :lo12:.LANCHOR78
+	strh	wzr, [x24, #:lo12:.LANCHOR83]
 	mov	w22, 64
-.L737:
+.L742:
 	ldrh	w6, [x26]
 	mov	w1, 5
 	mov	w0, w6
@@ -4102,159 +4168,159 @@ gc_search_src_blk:
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L733
+	beq	.L738
 	cmp	w20, 1
-	bne	.L734
-	adrp	x3, .LANCHOR75
+	bne	.L739
+	adrp	x3, .LANCHOR77
 	ldrb	w2, [x25]
-	ldrh	w3, [x3, #:lo12:.LANCHOR75]
+	ldrh	w3, [x3, #:lo12:.LANCHOR77]
 	mul	w3, w2, w3
-	adrp	x2, .LANCHOR83
-	ldrh	w2, [x2, #:lo12:.LANCHOR83]
+	adrp	x2, .LANCHOR85
+	ldrh	w2, [x2, #:lo12:.LANCHOR85]
 	sub	w2, w3, w2, lsr 3
 	strh	w2, [x27]
-.L734:
+.L739:
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x1]
 	ldrh	w1, [x27]
 	cmp	w2, w1
-	bcs	.L735
+	bcs	.L740
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L736
+	cbz	w0, .L741
 	add	w5, w23, 1
 	add	w19, w19, 1
 	and	w23, w5, 65535
 	and	w19, w19, 65535
 	cmp	w23, w20
-	bcc	.L736
-.L733:
+	bcc	.L741
+.L738:
 	cmp	w23, w20
-	adrp	x0, .LANCHOR83
-	adrp	x3, .LANCHOR76
-	bcc	.L738
-	cbnz	w19, .L739
-	adrp	x1, .LANCHOR90
-	ldrh	w2, [x1, #:lo12:.LANCHOR90]
-	adrp	x1, .LANCHOR91
-	ldrh	w1, [x1, #:lo12:.LANCHOR91]
+	adrp	x0, .LANCHOR85
+	adrp	x3, .LANCHOR78
+	bcc	.L743
+	cbnz	w19, .L744
+	adrp	x1, .LANCHOR92
+	ldrh	w2, [x1, #:lo12:.LANCHOR92]
+	adrp	x1, .LANCHOR93
+	ldrh	w1, [x1, #:lo12:.LANCHOR93]
 	cmp	w2, w1
-	bls	.L739
-.L738:
-	ldrh	w2, [x0, #:lo12:.LANCHOR83]
-	adrp	x0, .LANCHOR75
-	ldrb	w3, [x3, #:lo12:.LANCHOR76]
-	ldrh	w0, [x0, #:lo12:.LANCHOR75]
-	ldrh	w1, [x28, #:lo12:.LANCHOR89]
+	bls	.L744
+.L743:
+	ldrh	w2, [x0, #:lo12:.LANCHOR85]
+	adrp	x0, .LANCHOR77
+	ldrb	w3, [x3, #:lo12:.LANCHOR78]
+	ldrh	w0, [x0, #:lo12:.LANCHOR77]
+	ldrh	w1, [x28, #:lo12:.LANCHOR91]
 	lsr	w2, w2, 3
 	mul	w0, w0, w3
 	sub	w0, w0, w2
 	cmp	w1, w0
-	bge	.L732
+	bge	.L737
 	add	w1, w1, w2
-	strh	w1, [x28, #:lo12:.LANCHOR89]
-.L732:
+	strh	w1, [x28, #:lo12:.LANCHOR91]
+.L737:
 	ldr	w0, [x29, 104]
-	cbz	w0, .L718
-	adrp	x25, .LANCHOR80
-	adrp	x22, .LANCHOR92
-	adrp	x26, .LANCHOR87
-	adrp	x27, .LANCHOR86
-	add	x28, x22, :lo12:.LANCHOR92
-	add	x26, x26, :lo12:.LANCHOR87
-	add	x27, x27, :lo12:.LANCHOR86
-	strh	wzr, [x25, #:lo12:.LANCHOR80]
+	cbz	w0, .L723
+	adrp	x25, .LANCHOR82
+	adrp	x22, .LANCHOR94
+	adrp	x26, .LANCHOR89
+	adrp	x27, .LANCHOR88
+	add	x28, x22, :lo12:.LANCHOR94
+	add	x26, x26, :lo12:.LANCHOR89
+	add	x27, x27, :lo12:.LANCHOR88
+	strh	wzr, [x25, #:lo12:.LANCHOR82]
 	mov	w24, 64
-.L743:
-	ldrh	w6, [x25, #:lo12:.LANCHOR80]
+.L748:
+	ldrh	w6, [x25, #:lo12:.LANCHOR82]
 	mov	w1, 3
 	mov	w0, w6
 	bl	zftl_get_gc_node
 	add	w6, w6, 1
-	strh	w6, [x25, #:lo12:.LANCHOR80]
+	strh	w6, [x25, #:lo12:.LANCHOR82]
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L740
+	beq	.L745
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w1, [x2, x1]
 	ldrh	w2, [x28]
 	cmp	w2, w1
-	bls	.L741
+	bls	.L746
 	cmp	w1, 2
-	bls	.L741
+	bls	.L746
 	ldrh	w2, [x26]
 	ldrh	w1, [x27]
 	cmp	w1, w2, lsr 1
-	bls	.L740
-.L741:
+	bls	.L745
+.L746:
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L742
+	cbz	w0, .L747
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w23, w20
-	bcs	.L740
-.L742:
+	bcs	.L745
+.L747:
 	sub	w24, w24, #1
 	ands	w24, w24, 65535
-	bne	.L743
-.L740:
+	bne	.L748
+.L745:
 	cmp	w23, w20
-	adrp	x0, .LANCHOR83
-	bcs	.L744
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
-	ldrh	w1, [x22, #:lo12:.LANCHOR92]
+	adrp	x0, .LANCHOR85
+	bcs	.L749
+	ldrh	w0, [x0, #:lo12:.LANCHOR85]
+	ldrh	w1, [x22, #:lo12:.LANCHOR94]
 	cmp	w1, w0, lsr 1
-	bls	.L718
+	bls	.L723
 	sub	w0, w1, w0, lsr 3
-	strh	w0, [x22, #:lo12:.LANCHOR92]
-	b	.L718
-.L751:
+	strh	w0, [x22, #:lo12:.LANCHOR94]
+	b	.L723
+.L756:
 	mov	w23, 0
-	b	.L727
-.L748:
+	b	.L732
+.L753:
 	mov	w23, 0
-	b	.L724
-.L735:
-	strh	wzr, [x24, #:lo12:.LANCHOR81]
-	b	.L733
-.L736:
+	b	.L729
+.L740:
+	strh	wzr, [x24, #:lo12:.LANCHOR83]
+	b	.L738
+.L741:
 	sub	w22, w22, #1
 	ands	w22, w22, 65535
-	bne	.L737
-	b	.L733
-.L739:
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
-	ldrb	w1, [x3, #:lo12:.LANCHOR76]
-	ldrh	w2, [x28, #:lo12:.LANCHOR89]
+	bne	.L742
+	b	.L738
+.L744:
+	ldrh	w0, [x0, #:lo12:.LANCHOR85]
+	ldrb	w1, [x3, #:lo12:.LANCHOR78]
+	ldrh	w2, [x28, #:lo12:.LANCHOR91]
 	mul	w1, w1, w0
 	cmp	w2, w1
-	ble	.L732
+	ble	.L737
 	sub	w0, w2, w0, lsr 3
-	strh	w0, [x28, #:lo12:.LANCHOR89]
-	b	.L732
-.L744:
-	ldrh	w1, [x0, #:lo12:.LANCHOR83]
-	adrp	x0, .LANCHOR76
-	ldrh	w2, [x22, #:lo12:.LANCHOR92]
-	ldrb	w0, [x0, #:lo12:.LANCHOR76]
+	strh	w0, [x28, #:lo12:.LANCHOR91]
+	b	.L737
+.L749:
+	ldrh	w1, [x0, #:lo12:.LANCHOR85]
+	adrp	x0, .LANCHOR78
+	ldrh	w2, [x22, #:lo12:.LANCHOR94]
+	ldrb	w0, [x0, #:lo12:.LANCHOR78]
 	mul	w0, w0, w1
 	sub	w0, w0, #32
 	cmp	w2, w0
-	bge	.L718
+	bge	.L723
 	add	w1, w2, w1, lsr 3
-	strh	w1, [x22, #:lo12:.LANCHOR92]
-	b	.L718
-.L749:
+	strh	w1, [x22, #:lo12:.LANCHOR94]
+	b	.L723
+.L754:
 	mov	w23, 0
-	b	.L726
+	b	.L731
 	.size	gc_search_src_blk, .-gc_search_src_blk
 	.section	.text.zftl_insert_free_list,"ax",@progbits
 	.align	2
@@ -4267,27 +4333,27 @@ zftl_insert_free_list:
 	add	x0, x0, x1, uxth 2
 	ldrb	w0, [x0, 2]
 	ands	w0, w0, 24
-	bne	.L800
-	adrp	x2, .LANCHOR93
-	adrp	x0, .LANCHOR94
-	add	x2, x2, :lo12:.LANCHOR93
-	add	x0, x0, :lo12:.LANCHOR94
-.L802:
-	b	_insert_free_list
-.L800:
-	cmp	w0, 16
-	bne	.L801
+	bne	.L805
 	adrp	x2, .LANCHOR95
 	adrp	x0, .LANCHOR96
 	add	x2, x2, :lo12:.LANCHOR95
 	add	x0, x0, :lo12:.LANCHOR96
-	b	.L802
-.L801:
+.L807:
+	b	_insert_free_list
+.L805:
+	cmp	w0, 16
+	bne	.L806
 	adrp	x2, .LANCHOR97
 	adrp	x0, .LANCHOR98
 	add	x2, x2, :lo12:.LANCHOR97
 	add	x0, x0, :lo12:.LANCHOR98
-	b	.L802
+	b	.L807
+.L806:
+	adrp	x2, .LANCHOR99
+	adrp	x0, .LANCHOR100
+	add	x2, x2, :lo12:.LANCHOR99
+	add	x0, x0, :lo12:.LANCHOR100
+	b	.L807
 	.size	zftl_insert_free_list, .-zftl_insert_free_list
 	.section	.text.zftl_insert_data_list,"ax",@progbits
 	.align	2
@@ -4301,30 +4367,30 @@ zftl_insert_data_list:
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L804
-	adrp	x2, .LANCHOR88
+	bne	.L809
+	adrp	x2, .LANCHOR90
 	adrp	x0, .LANCHOR12
-	add	x2, x2, :lo12:.LANCHOR88
+	add	x2, x2, :lo12:.LANCHOR90
 	add	x0, x0, :lo12:.LANCHOR12
-.L807:
+.L812:
 	b	_insert_data_list
-.L804:
+.L809:
 	cmp	w2, 96
-	bne	.L805
-	adrp	x2, .LANCHOR86
-	adrp	x0, .LANCHOR79
-	add	x2, x2, :lo12:.LANCHOR86
-	add	x0, x0, :lo12:.LANCHOR79
-	b	.L807
-.L805:
+	bne	.L810
+	adrp	x2, .LANCHOR88
+	adrp	x0, .LANCHOR81
+	add	x2, x2, :lo12:.LANCHOR88
+	add	x0, x0, :lo12:.LANCHOR81
+	b	.L812
+.L810:
 	cmp	w2, 160
-	bne	.L803
-	adrp	x2, .LANCHOR90
-	adrp	x0, .LANCHOR78
-	add	x2, x2, :lo12:.LANCHOR90
-	add	x0, x0, :lo12:.LANCHOR78
-	b	.L807
-.L803:
+	bne	.L808
+	adrp	x2, .LANCHOR92
+	adrp	x0, .LANCHOR80
+	add	x2, x2, :lo12:.LANCHOR92
+	add	x0, x0, :lo12:.LANCHOR80
+	b	.L812
+.L808:
 	ret
 	.size	zftl_insert_data_list, .-zftl_insert_data_list
 	.section	.text.zftl_gc_get_free_sblk,"ax",@progbits
@@ -4343,55 +4409,55 @@ zftl_gc_get_free_sblk:
 	ldrh	w19, [x0, 588]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L809
-	cbnz	w21, .L809
+	beq	.L814
+	cbnz	w21, .L814
 	mov	w1, w19
-	adrp	x0, .LC50
-	add	x0, x0, :lo12:.LC50
+	adrp	x0, .LC52
+	add	x0, x0, :lo12:.LC52
 	bl	printf
 	ldr	x0, [x20, #:lo12:.LANCHOR10]
 	mov	w1, -1
 	strh	w1, [x0, 588]
-.L810:
+.L815:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L809:
-	adrp	x2, .LANCHOR95
-	adrp	x20, .LANCHOR97
-	ldrh	w0, [x2, #:lo12:.LANCHOR95]
-	ldrh	w1, [x20, #:lo12:.LANCHOR97]
+.L814:
+	adrp	x2, .LANCHOR97
+	adrp	x20, .LANCHOR99
+	ldrh	w0, [x2, #:lo12:.LANCHOR97]
+	ldrh	w1, [x20, #:lo12:.LANCHOR99]
 	cmp	w0, w1
-	bls	.L811
+	bls	.L816
 	lsr	w1, w0, 3
 	cmp	w21, 0
-	adrp	x0, .LANCHOR96
+	adrp	x0, .LANCHOR98
 	csel	w1, w1, wzr, ne
-	add	x2, x2, :lo12:.LANCHOR95
-	add	x0, x0, :lo12:.LANCHOR96
-.L825:
+	add	x2, x2, :lo12:.LANCHOR97
+	add	x0, x0, :lo12:.LANCHOR98
+.L830:
 	bl	_list_pop_index_node
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	bne	.L816
-	adrp	x0, .LANCHOR93
-	ldrh	w5, [x20, #:lo12:.LANCHOR97]
+	bne	.L821
+	adrp	x0, .LANCHOR95
+	ldrh	w5, [x20, #:lo12:.LANCHOR99]
 	mov	w2, w22
 	mov	w1, w19
-	ldrh	w4, [x0, #:lo12:.LANCHOR93]
-	adrp	x0, .LANCHOR94
-	ldr	x3, [x0, #:lo12:.LANCHOR94]
-	adrp	x0, .LC51
-	add	x0, x0, :lo12:.LC51
+	ldrh	w4, [x0, #:lo12:.LANCHOR95]
+	adrp	x0, .LANCHOR96
+	ldr	x3, [x0, #:lo12:.LANCHOR96]
+	adrp	x0, .LC53
+	add	x0, x0, :lo12:.LC53
 	bl	printf
-.L816:
-	cbz	w21, .L810
+.L821:
+	cbz	w21, .L815
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L810
+	tbz	x0, 8, .L815
 	adrp	x4, .LANCHOR9
 	adrp	x1, .LANCHOR7
 	uxtw	x3, w19
@@ -4405,26 +4471,26 @@ zftl_gc_get_free_sblk:
 	ldrh	w5, [x1, x0]
 	ubfx	x4, x4, 11, 8
 	mov	w1, w19
-	adrp	x0, .LC52
+	adrp	x0, .LC54
 	ubfx	x3, x2, 3, 2
 	and	w5, w5, 2047
 	ubfx	x2, x2, 5, 3
-	add	x0, x0, :lo12:.LC52
+	add	x0, x0, :lo12:.LC54
 	bl	printf
-	b	.L810
-.L811:
-	cbnz	w21, .L814
+	b	.L815
+.L816:
+	cbnz	w21, .L819
 	lsr	w1, w1, 2
-.L815:
-	adrp	x0, .LANCHOR98
-	add	x2, x20, :lo12:.LANCHOR97
-	add	x0, x0, :lo12:.LANCHOR98
-	b	.L825
-.L814:
+.L820:
+	adrp	x0, .LANCHOR100
+	add	x2, x20, :lo12:.LANCHOR99
+	add	x0, x0, :lo12:.LANCHOR100
+	b	.L830
+.L819:
 	mov	w1, 7
 	mul	w1, w0, w1
 	lsr	w1, w1, 3
-	b	.L815
+	b	.L820
 	.size	zftl_gc_get_free_sblk, .-zftl_gc_get_free_sblk
 	.section	.text.zftl_get_free_sblk,"ax",@progbits
 	.align	2
@@ -4437,99 +4503,99 @@ zftl_get_free_sblk:
 	and	w20, w1, 65535
 	str	x21, [sp, 32]
 	cmp	w20, 5
-	bne	.L827
-	adrp	x2, .LANCHOR95
-	adrp	x0, .LANCHOR97
-	ldrh	w3, [x2, #:lo12:.LANCHOR95]
-	ldrh	w1, [x0, #:lo12:.LANCHOR97]
+	bne	.L832
+	adrp	x2, .LANCHOR97
+	adrp	x0, .LANCHOR99
+	ldrh	w3, [x2, #:lo12:.LANCHOR97]
+	ldrh	w1, [x0, #:lo12:.LANCHOR99]
 	cmp	w3, w1
-	bcc	.L828
-	adrp	x4, .LANCHOR93
-	ldrh	w4, [x4, #:lo12:.LANCHOR93]
+	bcc	.L833
+	adrp	x4, .LANCHOR95
+	ldrh	w4, [x4, #:lo12:.LANCHOR95]
 	cmp	w4, w3
-	bls	.L829
-	cbz	w1, .L829
-.L828:
-	add	x2, x0, :lo12:.LANCHOR97
+	bls	.L834
+	cbz	w1, .L834
+.L833:
+	add	x2, x0, :lo12:.LANCHOR99
 	lsr	w1, w1, 1
-.L848:
+.L853:
+	adrp	x0, .LANCHOR100
+	add	x0, x0, :lo12:.LANCHOR100
+	b	.L852
+.L834:
 	adrp	x0, .LANCHOR98
+	add	x2, x2, :lo12:.LANCHOR97
 	add	x0, x0, :lo12:.LANCHOR98
-	b	.L847
-.L829:
-	adrp	x0, .LANCHOR96
-	add	x2, x2, :lo12:.LANCHOR95
-	add	x0, x0, :lo12:.LANCHOR96
 	mov	w1, 0
-.L847:
+.L852:
 	bl	_list_pop_index_node
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	bne	.L832
-	adrp	x0, .LANCHOR97
+	bne	.L837
+	adrp	x0, .LANCHOR99
 	mov	w2, w20
 	mov	w1, w19
-	ldrh	w5, [x0, #:lo12:.LANCHOR97]
-	adrp	x0, .LANCHOR93
-	ldrh	w4, [x0, #:lo12:.LANCHOR93]
-	adrp	x0, .LANCHOR94
-	ldr	x3, [x0, #:lo12:.LANCHOR94]
-	adrp	x0, .LC51
-	add	x0, x0, :lo12:.LC51
+	ldrh	w5, [x0, #:lo12:.LANCHOR99]
+	adrp	x0, .LANCHOR95
+	ldrh	w4, [x0, #:lo12:.LANCHOR95]
+	adrp	x0, .LANCHOR96
+	ldr	x3, [x0, #:lo12:.LANCHOR96]
+	adrp	x0, .LC53
+	add	x0, x0, :lo12:.LC53
 	bl	printf
-	b	.L832
-.L827:
+	b	.L837
+.L832:
 	adrp	x21, .LANCHOR10
 	and	w0, w0, 65535
 	ldr	x1, [x21, #:lo12:.LANCHOR10]
 	ldrh	w19, [x1, 590]
 	mov	w1, 65535
 	cmp	w19, w1
-	beq	.L831
+	beq	.L836
 	cmp	w20, 1
-	beq	.L831
+	beq	.L836
 	mov	w1, w19
-	adrp	x0, .LC53
-	add	x0, x0, :lo12:.LC53
+	adrp	x0, .LC55
+	add	x0, x0, :lo12:.LC55
 	bl	printf
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	mov	w1, -1
 	strh	w1, [x0, 590]
-.L832:
+.L837:
 	mov	w0, w19
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L831:
-	adrp	x2, .LANCHOR93
-	adrp	x4, .LANCHOR97
-	ldrh	w1, [x2, #:lo12:.LANCHOR93]
-	ldrh	w3, [x4, #:lo12:.LANCHOR97]
+.L836:
+	adrp	x2, .LANCHOR95
+	adrp	x4, .LANCHOR99
+	ldrh	w1, [x2, #:lo12:.LANCHOR95]
+	ldrh	w3, [x4, #:lo12:.LANCHOR99]
 	cmp	w1, w3
-	bcc	.L833
-	adrp	x5, .LANCHOR95
-	ldrh	w5, [x5, #:lo12:.LANCHOR95]
+	bcc	.L838
+	adrp	x5, .LANCHOR97
+	ldrh	w5, [x5, #:lo12:.LANCHOR97]
 	cmp	w5, w1
-	bls	.L834
-	cbz	w3, .L834
-.L833:
+	bls	.L839
+	cbz	w3, .L839
+.L838:
 	cmp	w20, 1
 	lsr	w3, w3, 1
 	csel	w0, w3, w0, eq
-	add	x2, x4, :lo12:.LANCHOR97
+	add	x2, x4, :lo12:.LANCHOR99
 	mov	w1, w0
-	b	.L848
-.L834:
+	b	.L853
+.L839:
 	lsr	w1, w1, 1
 	cmp	w20, 1
 	csel	w0, w1, w0, eq
-	add	x2, x2, :lo12:.LANCHOR93
+	add	x2, x2, :lo12:.LANCHOR95
 	mov	w1, w0
-	adrp	x0, .LANCHOR94
-	add	x0, x0, :lo12:.LANCHOR94
-	b	.L847
+	adrp	x0, .LANCHOR96
+	add	x0, x0, :lo12:.LANCHOR96
+	b	.L852
 	.size	zftl_get_free_sblk, .-zftl_get_free_sblk
 	.section	.text.zftl_remove_data_node,"ax",@progbits
 	.align	2
@@ -4543,30 +4609,30 @@ zftl_remove_data_node:
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L850
-	adrp	x2, .LANCHOR88
+	bne	.L855
+	adrp	x2, .LANCHOR90
 	adrp	x0, .LANCHOR12
-	add	x2, x2, :lo12:.LANCHOR88
+	add	x2, x2, :lo12:.LANCHOR90
 	add	x0, x0, :lo12:.LANCHOR12
-.L853:
+.L858:
 	b	_list_remove_node
-.L850:
+.L855:
 	cmp	w2, 96
-	bne	.L851
-	adrp	x2, .LANCHOR86
-	adrp	x0, .LANCHOR79
-	add	x2, x2, :lo12:.LANCHOR86
-	add	x0, x0, :lo12:.LANCHOR79
-	b	.L853
-.L851:
+	bne	.L856
+	adrp	x2, .LANCHOR88
+	adrp	x0, .LANCHOR81
+	add	x2, x2, :lo12:.LANCHOR88
+	add	x0, x0, :lo12:.LANCHOR81
+	b	.L858
+.L856:
 	cmp	w2, 160
-	bne	.L849
-	adrp	x2, .LANCHOR90
-	adrp	x0, .LANCHOR78
-	add	x2, x2, :lo12:.LANCHOR90
-	add	x0, x0, :lo12:.LANCHOR78
-	b	.L853
-.L849:
+	bne	.L854
+	adrp	x2, .LANCHOR92
+	adrp	x0, .LANCHOR80
+	add	x2, x2, :lo12:.LANCHOR92
+	add	x0, x0, :lo12:.LANCHOR80
+	b	.L858
+.L854:
 	ret
 	.size	zftl_remove_data_node, .-zftl_remove_data_node
 	.section	.text.zftl_remove_free_node,"ax",@progbits
@@ -4580,27 +4646,27 @@ zftl_remove_free_node:
 	add	x0, x0, x1, uxth 2
 	ldrb	w0, [x0, 2]
 	ands	w0, w0, 24
-	bne	.L855
-	adrp	x2, .LANCHOR93
-	adrp	x0, .LANCHOR94
-	add	x2, x2, :lo12:.LANCHOR93
-	add	x0, x0, :lo12:.LANCHOR94
-.L857:
-	b	_list_remove_node
-.L855:
-	cmp	w0, 16
-	bne	.L856
+	bne	.L860
 	adrp	x2, .LANCHOR95
 	adrp	x0, .LANCHOR96
 	add	x2, x2, :lo12:.LANCHOR95
 	add	x0, x0, :lo12:.LANCHOR96
-	b	.L857
-.L856:
+.L862:
+	b	_list_remove_node
+.L860:
+	cmp	w0, 16
+	bne	.L861
 	adrp	x2, .LANCHOR97
 	adrp	x0, .LANCHOR98
 	add	x2, x2, :lo12:.LANCHOR97
 	add	x0, x0, :lo12:.LANCHOR98
-	b	.L857
+	b	.L862
+.L861:
+	adrp	x2, .LANCHOR99
+	adrp	x0, .LANCHOR100
+	add	x2, x2, :lo12:.LANCHOR99
+	add	x0, x0, :lo12:.LANCHOR100
+	b	.L862
 	.size	zftl_remove_free_node, .-zftl_remove_free_node
 	.section	.text.zftl_list_update_data_list,"ax",@progbits
 	.align	2
@@ -4614,30 +4680,30 @@ zftl_list_update_data_list:
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L859
-	adrp	x2, .LANCHOR88
+	bne	.L864
+	adrp	x2, .LANCHOR90
 	adrp	x0, .LANCHOR12
-	add	x2, x2, :lo12:.LANCHOR88
+	add	x2, x2, :lo12:.LANCHOR90
 	add	x0, x0, :lo12:.LANCHOR12
-.L862:
+.L867:
 	b	_list_update_data_list
-.L859:
+.L864:
 	cmp	w2, 96
-	bne	.L860
-	adrp	x2, .LANCHOR86
-	adrp	x0, .LANCHOR79
-	add	x2, x2, :lo12:.LANCHOR86
-	add	x0, x0, :lo12:.LANCHOR79
-	b	.L862
-.L860:
+	bne	.L865
+	adrp	x2, .LANCHOR88
+	adrp	x0, .LANCHOR81
+	add	x2, x2, :lo12:.LANCHOR88
+	add	x0, x0, :lo12:.LANCHOR81
+	b	.L867
+.L865:
 	cmp	w2, 160
-	bne	.L858
-	adrp	x2, .LANCHOR90
-	adrp	x0, .LANCHOR78
-	add	x2, x2, :lo12:.LANCHOR90
-	add	x0, x0, :lo12:.LANCHOR78
-	b	.L862
-.L858:
+	bne	.L863
+	adrp	x2, .LANCHOR92
+	adrp	x0, .LANCHOR80
+	add	x2, x2, :lo12:.LANCHOR92
+	add	x0, x0, :lo12:.LANCHOR80
+	b	.L867
+.L863:
 	ret
 	.size	zftl_list_update_data_list, .-zftl_list_update_data_list
 	.section	.text.print_list_info,"ax",@progbits
@@ -4653,21 +4719,21 @@ print_list_info:
 	stp	x19, x20, [sp, 48]
 	mov	x19, x0
 	stp	x21, x22, [sp, 64]
-	adrp	x0, .LC54
+	adrp	x0, .LC56
 	stp	x23, x24, [sp, 80]
-	add	x0, x0, :lo12:.LC54
+	add	x0, x0, :lo12:.LC56
 	bl	printf
 	ldr	x19, [x19]
-	cbz	x19, .L863
+	cbz	x19, .L868
 	mov	x24, -6148914691236517206
-	adrp	x22, .LC55
-	adrp	x21, .LANCHOR99
-	add	x22, x22, :lo12:.LC55
-	add	x21, x21, :lo12:.LANCHOR99
+	adrp	x22, .LC57
+	adrp	x21, .LANCHOR101
+	add	x22, x22, :lo12:.LC57
+	add	x21, x21, :lo12:.LANCHOR101
 	mov	w20, 0
 	adrp	x23, .LANCHOR4
 	movk	x24, 0xaaab, lsl 0
-.L867:
+.L872:
 	ldr	x2, [x23, #:lo12:.LANCHOR4]
 	adrp	x1, .LANCHOR7
 	adrp	x8, .LANCHOR9
@@ -4700,7 +4766,7 @@ print_list_info:
 	ldrh	w19, [x19]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L863
+	beq	.L868
 	ldr	x0, [x23, #:lo12:.LANCHOR4]
 	mov	w1, 6
 	add	w20, w20, 1
@@ -4708,8 +4774,8 @@ print_list_info:
 	umaddl	x19, w19, w1, x0
 	ldrh	w0, [x21]
 	cmp	w0, w20
-	bcs	.L867
-.L863:
+	bcs	.L872
+.L868:
 	ldp	x19, x20, [sp, 48]
 	ldp	x21, x22, [sp, 64]
 	ldp	x23, x24, [sp, 80]
@@ -4723,15 +4789,10 @@ print_list_info:
 	.type	dump_all_list_info, %function
 dump_all_list_info:
 	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR93
-	adrp	x0, .LANCHOR94
-	add	x1, x1, :lo12:.LANCHOR93
-	add	x29, sp, 0
-	add	x0, x0, :lo12:.LANCHOR94
-	bl	print_list_info
 	adrp	x1, .LANCHOR95
 	adrp	x0, .LANCHOR96
 	add	x1, x1, :lo12:.LANCHOR95
+	add	x29, sp, 0
 	add	x0, x0, :lo12:.LANCHOR96
 	bl	print_list_info
 	adrp	x1, .LANCHOR97
@@ -4739,21 +4800,26 @@ dump_all_list_info:
 	add	x1, x1, :lo12:.LANCHOR97
 	add	x0, x0, :lo12:.LANCHOR98
 	bl	print_list_info
-	adrp	x1, .LANCHOR88
+	adrp	x1, .LANCHOR99
+	adrp	x0, .LANCHOR100
+	add	x1, x1, :lo12:.LANCHOR99
+	add	x0, x0, :lo12:.LANCHOR100
+	bl	print_list_info
+	adrp	x1, .LANCHOR90
 	adrp	x0, .LANCHOR12
-	add	x1, x1, :lo12:.LANCHOR88
+	add	x1, x1, :lo12:.LANCHOR90
 	add	x0, x0, :lo12:.LANCHOR12
 	bl	print_list_info
-	adrp	x1, .LANCHOR86
-	adrp	x0, .LANCHOR79
-	add	x1, x1, :lo12:.LANCHOR86
-	add	x0, x0, :lo12:.LANCHOR79
+	adrp	x1, .LANCHOR88
+	adrp	x0, .LANCHOR81
+	add	x1, x1, :lo12:.LANCHOR88
+	add	x0, x0, :lo12:.LANCHOR81
 	bl	print_list_info
 	ldp	x29, x30, [sp], 16
-	adrp	x1, .LANCHOR90
-	adrp	x0, .LANCHOR78
-	add	x1, x1, :lo12:.LANCHOR90
-	add	x0, x0, :lo12:.LANCHOR78
+	adrp	x1, .LANCHOR92
+	adrp	x0, .LANCHOR80
+	add	x1, x1, :lo12:.LANCHOR92
+	add	x0, x0, :lo12:.LANCHOR80
 	b	print_list_info
 	.size	dump_all_list_info, .-dump_all_list_info
 	.section	.text.ftl_tmp_into_update,"ax",@progbits
@@ -4761,40 +4827,40 @@ dump_all_list_info:
 	.global	ftl_tmp_into_update
 	.type	ftl_tmp_into_update, %function
 ftl_tmp_into_update:
-	adrp	x0, .LANCHOR100
-	ldr	x0, [x0, #:lo12:.LANCHOR100]
+	adrp	x0, .LANCHOR102
+	ldr	x0, [x0, #:lo12:.LANCHOR102]
 	ldr	w1, [x0, 16]
 	cmp	w1, 2048
-	bls	.L872
+	bls	.L877
 	ldr	w2, [x0, 20]
 	add	w2, w2, w1, lsr 11
 	and	w1, w1, 2047
 	stp	w1, w2, [x0, 16]
-.L872:
+.L877:
 	ldr	w1, [x0, 24]
 	cmp	w1, 2048
-	bls	.L873
+	bls	.L878
 	ldr	w2, [x0, 28]
 	add	w2, w2, w1, lsr 11
 	and	w1, w1, 2047
 	stp	w1, w2, [x0, 24]
-.L873:
+.L878:
 	ldr	w1, [x0, 32]
 	cmp	w1, 1024
-	bls	.L874
+	bls	.L879
 	ldr	w2, [x0, 36]
 	add	w2, w2, w1, lsr 10
 	and	w1, w1, 1023
 	stp	w1, w2, [x0, 32]
-.L874:
+.L879:
 	ldr	w1, [x0, 40]
 	cmp	w1, 1024
-	bls	.L871
+	bls	.L876
 	ldr	w2, [x0, 44]
 	add	w2, w2, w1, lsr 10
 	and	w1, w1, 1023
 	stp	w1, w2, [x0, 40]
-.L871:
+.L876:
 	ret
 	.size	ftl_tmp_into_update, .-ftl_tmp_into_update
 	.section	.text.ftl_get_blk_list_in_sblk,"ax",@progbits
@@ -4804,35 +4870,35 @@ ftl_tmp_into_update:
 ftl_get_blk_list_in_sblk:
 	adrp	x2, .LANCHOR7
 	and	w0, w0, 65535
-	adrp	x7, .LANCHOR102
-	add	x7, x7, :lo12:.LANCHOR102
+	adrp	x7, .LANCHOR66
+	add	x7, x7, :lo12:.LANCHOR66
 	ldr	x2, [x2, #:lo12:.LANCHOR7]
 	mov	w3, 0
 	mov	w13, 21
 	add	x2, x2, x0, uxth 2
 	ldrb	w12, [x2, 3]
-	adrp	x2, .LANCHOR76
-	ldrb	w10, [x2, #:lo12:.LANCHOR76]
-	adrp	x2, .LANCHOR101
-	ldrb	w6, [x2, #:lo12:.LANCHOR101]
+	adrp	x2, .LANCHOR78
+	ldrb	w10, [x2, #:lo12:.LANCHOR78]
+	adrp	x2, .LANCHOR67
+	ldrb	w6, [x2, #:lo12:.LANCHOR67]
 	and	w2, w6, 65535
 	mul	w0, w0, w2
 	sub	w2, w2, #1
 	sxth	w5, w2
 	and	w4, w0, 65535
 	mov	w0, 0
-.L877:
+.L882:
 	cmp	w3, w10
-	blt	.L881
+	blt	.L886
 	sxtw	x2, w0
 	mov	w3, -1
-.L882:
+.L887:
 	cmp	w10, w2
-	bgt	.L883
+	bgt	.L888
 	ret
-.L881:
+.L886:
 	asr	w2, w12, w3
-	tbnz	x2, 0, .L878
+	tbnz	x2, 0, .L883
 	sdiv	w2, w3, w6
 	ldrh	w8, [x7]
 	sbfiz	x11, x0, 1, 32
@@ -4841,379 +4907,62 @@ ftl_get_blk_list_in_sblk:
 	lsl	w2, w2, w8
 	add	w2, w4, w2
 	and	w2, w2, 65535
-	bhi	.L879
-.L884:
+	bhi	.L884
+.L889:
 	add	w0, w0, 1
 	strh	w2, [x1, x11]
-.L878:
+.L883:
 	add	w3, w3, 1
-	b	.L877
-.L879:
+	b	.L882
+.L884:
 	and	w8, w5, w3
 	add	w2, w2, w8
-	b	.L884
-.L883:
+	b	.L889
+.L888:
 	strh	w3, [x1, x2, lsl 1]
 	add	x2, x2, 1
-	b	.L882
+	b	.L887
 	.size	ftl_get_blk_list_in_sblk, .-ftl_get_blk_list_in_sblk
-	.section	.text.ftl_free_sblk,"ax",@progbits
+	.section	.text.ftl_erase_phy_blk,"ax",@progbits
 	.align	2
-	.global	ftl_free_sblk
-	.type	ftl_free_sblk, %function
-ftl_free_sblk:
-	stp	x29, x30, [sp, -64]!
+	.global	ftl_erase_phy_blk
+	.type	ftl_erase_phy_blk, %function
+ftl_erase_phy_blk:
+	stp	x29, x30, [sp, -48]!
+	and	w0, w0, 65535
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR7
-	str	x23, [sp, 48]
-	and	x23, x0, 65535
-	ldr	x4, [x22, #:lo12:.LANCHOR7]
-	lsl	x21, x23, 2
+	mov	w21, w1
+	adrp	x1, .LANCHOR66
 	stp	x19, x20, [sp, 16]
-	mov	x19, x23
-	add	x20, x4, x21
-	ldrb	w0, [x20, 2]
-	tbz	x0, 3, .L887
-	adrp	x1, .LANCHOR100
-	ldrh	w2, [x4, x21]
-	adrp	x8, .LANCHOR103
-	ldr	x7, [x1, #:lo12:.LANCHOR100]
-	and	w3, w2, 2047
-	ldr	w2, [x4, x21]
-	ldrh	w8, [x8, #:lo12:.LANCHOR103]
-	ldrh	w1, [x7, 74]
-	ubfx	x6, x2, 11, 8
-	adrp	x2, .LANCHOR8
-	add	w1, w3, w1
-	ldrh	w2, [x2, #:lo12:.LANCHOR8]
-	and	w5, w1, 65535
-	ldrh	w1, [x7, 72]
-	add	w1, w6, w1
-	udiv	w7, w5, w2
-	and	w1, w1, 65535
-	add	w7, w7, w1
-	cmp	w7, w8
-	ble	.L888
-	adrp	x1, .LANCHOR91
-	adrp	x7, .LANCHOR95
-	ldrh	w5, [x1, #:lo12:.LANCHOR91]
-	adrp	x1, .LANCHOR90
-	ldrh	w7, [x7, #:lo12:.LANCHOR95]
-	ldrh	w1, [x1, #:lo12:.LANCHOR90]
-	add	w5, w5, 7
-	add	w1, w1, w7
-	cmp	w5, w1
-	blt	.L889
-.L904:
-	mov	w1, 2
-	bfi	w0, w1, 3, 2
-.L902:
-	strb	w0, [x20, 2]
-.L890:
-	ldrb	w0, [x20, 2]
-	ands	w0, w0, 24
-	bne	.L894
-	mul	w2, w6, w2
-	ldrh	w0, [x4, x21]
-	add	w2, w2, w2, lsl 1
-	add	w2, w3, w2, lsr 2
-	ubfx	x2, x2, 2, 9
-	bfi	w0, w2, 0, 11
-	strh	w0, [x4, x21]
-.L887:
-	mov	w0, w19
-	bl	zftl_remove_data_node
-	ldr	x0, [x22, #:lo12:.LANCHOR7]
-	add	x21, x0, x21
-	ldrb	w0, [x21, 2]
-	and	w0, w0, 31
-	strb	w0, [x21, 2]
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
-	strh	wzr, [x0, x23, lsl 1]
-	ldrb	w0, [x20, 2]
-	tbz	x0, 3, .L896
-	adrp	x0, .LANCHOR10
-	ldr	x0, [x0, #:lo12:.LANCHOR10]
-	ldrh	w1, [x0, 584]
-	cmp	w1, w19
-	bne	.L897
-	mov	w1, -1
-	ldrh	w2, [x0, 588]
-	strh	w1, [x0, 584]
-	mov	w1, 65535
-	cmp	w2, w1
-	bne	.L896
-	strh	w19, [x0, 588]
-	mov	w1, w19
-	adrp	x0, .LC56
-	add	x0, x0, :lo12:.LC56
-.L903:
-	ldp	x19, x20, [sp, 16]
+	mov	w19, 21
+	adrp	x22, .LANCHOR103
+	ldrh	w1, [x1, #:lo12:.LANCHOR66]
+	sub	w1, w19, w1
+	mov	w19, 1
+	lsl	w19, w19, w1
+	sub	w19, w19, #1
+	and	w19, w19, w0
+	asr	w20, w0, w1
+	adrp	x0, .LANCHOR72
+	sxth	w19, w19
+	ldrb	w0, [x0, #:lo12:.LANCHOR72]
+	cbz	w0, .L891
+	adrp	x0, .LANCHOR73
+	ldrb	w0, [x0, #:lo12:.LANCHOR73]
+	cbnz	w0, .L891
+	ldrh	w2, [x22, #:lo12:.LANCHOR103]
+	cmp	w21, 0
+	cset	w1, eq
+	mov	w0, w20
+	mul	w2, w2, w19
+	bl	flash_erase_block_en
+.L891:
+	ldrh	w2, [x22, #:lo12:.LANCHOR103]
+	mov	w1, w21
+	mov	w0, w20
 	ldp	x21, x22, [sp, 32]
-	ldr	x23, [sp, 48]
-	ldp	x29, x30, [sp], 64
-	b	printf
-.L889:
-	adrp	x1, .LANCHOR104
-	adrp	x7, .LANCHOR93
-	ldrh	w5, [x1, #:lo12:.LANCHOR104]
-	adrp	x1, .LANCHOR88
-	ldrh	w7, [x7, #:lo12:.LANCHOR93]
-	ldrh	w1, [x1, #:lo12:.LANCHOR88]
-	add	w5, w5, 7
-	add	w1, w1, w7
-	adrp	x7, .LANCHOR86
-	ldrh	w7, [x7, #:lo12:.LANCHOR86]
-	add	w1, w1, w7
-	cmp	w5, w1
-	blt	.L904
-.L893:
-	and	w0, w0, -25
-	b	.L902
-.L888:
-	madd	w1, w2, w1, w5
-	adrp	x5, .LANCHOR105
-	ldrh	w5, [x5, #:lo12:.LANCHOR105]
-	cmp	w1, w5
-	ble	.L890
-	adrp	x1, .LANCHOR104
-	adrp	x7, .LANCHOR93
-	ldrh	w5, [x1, #:lo12:.LANCHOR104]
-	adrp	x1, .LANCHOR88
-	ldrh	w7, [x7, #:lo12:.LANCHOR93]
-	ldrh	w1, [x1, #:lo12:.LANCHOR88]
-	add	w5, w5, 7
-	add	w1, w1, w7
-	adrp	x7, .LANCHOR86
-	ldrh	w7, [x7, #:lo12:.LANCHOR86]
-	add	w1, w1, w7
-	cmp	w5, w1
-	bge	.L893
-	adrp	x1, .LANCHOR91
-	adrp	x7, .LANCHOR95
-	ldrh	w5, [x1, #:lo12:.LANCHOR91]
-	adrp	x1, .LANCHOR90
-	ldrh	w7, [x7, #:lo12:.LANCHOR95]
-	ldrh	w1, [x1, #:lo12:.LANCHOR90]
-	add	w5, w5, 7
-	add	w1, w1, w7
-	cmp	w5, w1
-	blt	.L893
-	b	.L904
-.L894:
-	cmp	w0, 16
-	bne	.L887
-	sdiv	w2, w3, w2
-	ldr	w0, [x4, x21]
-	add	w2, w2, w2, lsl 1
-	add	w2, w6, w2, lsr 2
-	ubfx	x2, x2, 2, 6
-	bfi	w0, w2, 11, 8
-	str	w0, [x4, x21]
-	b	.L887
-.L897:
-	ldrh	w1, [x0, 586]
-	cmp	w1, w19
-	bne	.L896
-	mov	w1, -1
-	ldrh	w2, [x0, 590]
-	strh	w1, [x0, 586]
-	mov	w1, 65535
-	cmp	w2, w1
-	bne	.L896
-	strh	w19, [x0, 590]
-	mov	w1, w19
-	adrp	x0, .LC57
-	add	x0, x0, :lo12:.LC57
-	b	.L903
-.L896:
-	mov	w0, w19
-	ldr	x23, [sp, 48]
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 64
-	b	zftl_insert_free_list
-	.size	ftl_free_sblk, .-ftl_free_sblk
-	.section	.text.gc_free_src_blk,"ax",@progbits
-	.align	2
-	.global	gc_free_src_blk
-	.type	gc_free_src_blk, %function
-gc_free_src_blk:
-	stp	x29, x30, [sp, -80]!
-	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR63
-	stp	x23, x24, [sp, 48]
-	adrp	x22, .LC58
-	adrp	x23, .LANCHOR9
-	add	x21, x21, :lo12:.LANCHOR63
-	mov	x24, x23
-	add	x22, x22, :lo12:.LC58
-	stp	x19, x20, [sp, 16]
-	mov	w20, 0
-	stp	x25, x26, [sp, 64]
-.L906:
-	ldrh	w0, [x21, 56]
-	cmp	w0, w20
-	bhi	.L920
-	strh	wzr, [x21, 56]
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
-	ret
-.L920:
-	add	x0, x21, x20, sxtw 1
-	ldrh	w25, [x0, 58]
-	ldr	x0, [x23, #:lo12:.LANCHOR9]
-	mov	x19, x25
-	lsl	x26, x25, 1
-	ldrh	w2, [x0, x26]
-	cbz	w2, .L907
-	mov	w1, w25
-	mov	x0, x22
-	bl	printf
-.L907:
-	ldr	x0, [x24, #:lo12:.LANCHOR9]
-	strh	wzr, [x0, x26]
-	adrp	x0, .LANCHOR7
-	ldr	x0, [x0, #:lo12:.LANCHOR7]
-	add	x25, x0, x25, lsl 2
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L908
-	ldrb	w2, [x25, 2]
-	adrp	x0, .LC59
-	mov	w1, w19
-	add	x0, x0, :lo12:.LC59
-	ubfx	x2, x2, 5, 3
-	bl	printf
-.L908:
-	ldrb	w0, [x25, 2]
-	and	w1, w0, 224
-	cmp	w1, 224
-	beq	.L909
-	tst	w0, 192
-	bne	.L910
-.L909:
-	adrp	x1, .LANCHOR106
-	adrp	x0, .LC0
-	mov	w2, 884
-	add	x1, x1, :lo12:.LANCHOR106
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L910:
-	mov	w0, w19
-	bl	ftl_free_sblk
-	adrp	x0, .LANCHOR10
-	ldr	x0, [x0, #:lo12:.LANCHOR10]
-	ldrh	w2, [x0, 124]
-	cbz	w2, .L911
-	add	x3, x0, 392
-	mov	w1, 0
-.L913:
-	ldrh	w4, [x3]
-	cmp	w4, w19
-	bne	.L912
-	add	x1, x0, x1, sxtw 1
-	mov	w3, -1
-	sub	w2, w2, #1
-	strh	w3, [x1, 392]
-	strh	w2, [x0, 124]
-.L911:
-	ldrh	w2, [x0, 120]
-	cbz	w2, .L914
-	add	x3, x0, 136
-	mov	w1, 0
-.L916:
-	ldrh	w4, [x3]
-	cmp	w4, w19
-	bne	.L915
-	add	x1, x0, x1, sxtw 1
-	mov	w3, -1
-	sub	w2, w2, #1
-	strh	w3, [x1, 136]
-	strh	w2, [x0, 120]
-.L914:
-	ldrh	w2, [x0, 122]
-	cbz	w2, .L917
-	add	x3, x0, 264
-	mov	w1, 0
-.L919:
-	ldrh	w4, [x3]
-	cmp	w4, w19
-	bne	.L918
-	add	x1, x0, x1, sxtw 1
-	mov	w3, -1
-	sub	w2, w2, #1
-	strh	w3, [x1, 264]
-	strh	w2, [x0, 122]
-.L917:
-	add	w20, w20, 1
-	and	w20, w20, 65535
-	b	.L906
-.L912:
-	add	w1, w1, 1
-	add	x3, x3, 2
-	cmp	w1, 64
-	bne	.L913
-	b	.L911
-.L915:
-	add	w1, w1, 1
-	add	x3, x3, 2
-	cmp	w1, 64
-	bne	.L916
-	b	.L914
-.L918:
-	add	w1, w1, 1
-	add	x3, x3, 2
-	cmp	w1, 64
-	bne	.L919
-	b	.L917
-	.size	gc_free_src_blk, .-gc_free_src_blk
-	.section	.text.ftl_erase_phy_blk,"ax",@progbits
-	.align	2
-	.global	ftl_erase_phy_blk
-	.type	ftl_erase_phy_blk, %function
-ftl_erase_phy_blk:
-	stp	x29, x30, [sp, -48]!
-	and	w0, w0, 65535
-	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	mov	w21, w1
-	adrp	x1, .LANCHOR102
-	stp	x19, x20, [sp, 16]
-	mov	w19, 21
-	adrp	x22, .LANCHOR107
-	ldrh	w1, [x1, #:lo12:.LANCHOR102]
-	sub	w1, w19, w1
-	mov	w19, 1
-	lsl	w19, w19, w1
-	sub	w19, w19, #1
-	and	w19, w19, w0
-	asr	w20, w0, w1
-	adrp	x0, .LANCHOR70
-	sxth	w19, w19
-	ldrb	w0, [x0, #:lo12:.LANCHOR70]
-	cbz	w0, .L944
-	adrp	x0, .LANCHOR71
-	ldrb	w0, [x0, #:lo12:.LANCHOR71]
-	cbnz	w0, .L944
-	ldrh	w2, [x22, #:lo12:.LANCHOR107]
-	cmp	w21, 0
-	cset	w1, eq
-	mov	w0, w20
-	mul	w2, w2, w19
-	bl	flash_erase_block_en
-.L944:
-	ldrh	w2, [x22, #:lo12:.LANCHOR107]
-	mov	w1, w21
-	mov	w0, w20
-	ldp	x21, x22, [sp, 32]
-	mul	w2, w2, w19
+	mul	w2, w2, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	b	flash_erase_block_en
@@ -5230,56 +4979,56 @@ ftl_erase_sblk:
 	stp	x25, x26, [sp, 64]
 	and	w26, w0, 65535
 	ldr	x0, [x23, #:lo12:.LANCHOR7]
-	adrp	x25, .LANCHOR108
+	adrp	x25, .LANCHOR104
 	stp	x21, x22, [sp, 32]
 	ubfiz	x22, x26, 2, 16
 	add	x0, x0, x22
 	stp	x27, x28, [sp, 80]
 	stp	x19, x20, [sp, 16]
-	adrp	x24, .LANCHOR101
+	adrp	x24, .LANCHOR67
 	mov	w20, w1
-	add	x25, x25, :lo12:.LANCHOR108
+	add	x25, x25, :lo12:.LANCHOR104
 	ldrb	w28, [x0, 3]
-	add	x24, x24, :lo12:.LANCHOR101
+	add	x24, x24, :lo12:.LANCHOR67
 	add	x27, x29, 112
 	mov	w19, 0
-.L950:
+.L897:
 	ldrb	w0, [x25]
 	cmp	w19, w0
-	bge	.L961
+	bge	.L908
 	ldrb	w1, [x24]
-	adrp	x0, .LANCHOR107
+	adrp	x0, .LANCHOR103
 	mov	w21, 0
-	ldrh	w3, [x0, #:lo12:.LANCHOR107]
+	ldrh	w3, [x0, #:lo12:.LANCHOR103]
 	sub	w4, w1, #1
 	mov	w0, 0
 	mul	w6, w19, w1
 	mul	w5, w26, w1
-	b	.L962
-.L952:
+	b	.L909
+.L899:
 	add	w2, w0, w6
 	asr	w2, w28, w2
-	tbnz	x2, 0, .L951
+	tbnz	x2, 0, .L898
 	and	w2, w0, w4
 	add	w2, w2, w5
 	mul	w2, w2, w3
 	str	w2, [x27, w21, sxtw 2]
 	add	w21, w21, 1
-.L951:
+.L898:
 	add	w0, w0, 1
-.L962:
+.L909:
 	cmp	w0, w1
-	blt	.L952
+	blt	.L899
 	cmp	w1, 4
-	bne	.L953
+	bne	.L900
 	mov	x3, 0
-.L954:
+.L901:
 	cmp	w21, w3
-	bgt	.L955
-.L956:
+	bgt	.L902
+.L903:
 	add	w19, w19, 1
-	b	.L950
-.L955:
+	b	.L897
+.L902:
 	ldr	w2, [x27, x3, lsl 2]
 	mov	w1, w20
 	str	x3, [x29, 104]
@@ -5287,65 +5036,65 @@ ftl_erase_sblk:
 	bl	flash_erase_block_en
 	ldr	x3, [x29, 104]
 	add	x3, x3, 1
-	b	.L954
-.L953:
+	b	.L901
+.L900:
 	cmp	w21, 2
-	bne	.L957
-	adrp	x0, .LANCHOR70
-	ldrb	w0, [x0, #:lo12:.LANCHOR70]
-	cbz	w0, .L958
-	adrp	x0, .LANCHOR71
-	ldrb	w0, [x0, #:lo12:.LANCHOR71]
-	cbnz	w0, .L958
+	bne	.L904
+	adrp	x0, .LANCHOR72
+	ldrb	w0, [x0, #:lo12:.LANCHOR72]
+	cbz	w0, .L905
+	adrp	x0, .LANCHOR73
+	ldrb	w0, [x0, #:lo12:.LANCHOR73]
+	cbnz	w0, .L905
 	ldp	w2, w3, [x29, 112]
 	cmp	w20, 0
 	cset	w1, eq
 	mov	w0, w19
 	bl	flash_erase_duplane_block
-.L958:
+.L905:
 	ldp	w2, w3, [x29, 112]
 	mov	w1, w20
 	mov	w0, w19
 	bl	flash_erase_duplane_block
-	b	.L956
-.L957:
+	b	.L903
+.L904:
 	cmp	w21, 1
-	bne	.L956
-	adrp	x0, .LANCHOR70
-	ldrb	w0, [x0, #:lo12:.LANCHOR70]
-	cbz	w0, .L960
-	adrp	x0, .LANCHOR71
-	ldrb	w0, [x0, #:lo12:.LANCHOR71]
-	cbnz	w0, .L960
+	bne	.L903
+	adrp	x0, .LANCHOR72
+	ldrb	w0, [x0, #:lo12:.LANCHOR72]
+	cbz	w0, .L907
+	adrp	x0, .LANCHOR73
+	ldrb	w0, [x0, #:lo12:.LANCHOR73]
+	cbnz	w0, .L907
 	ldr	w2, [x29, 112]
 	cmp	w20, 0
 	cset	w1, eq
 	mov	w0, w19
 	bl	flash_erase_block_en
-.L960:
+.L907:
 	ldr	w2, [x29, 112]
 	mov	w1, w20
 	mov	w0, w19
 	bl	flash_erase_block_en
-	b	.L956
-.L961:
-	adrp	x2, .LANCHOR100
+	b	.L903
+.L908:
+	adrp	x2, .LANCHOR102
 	ldr	x3, [x23, #:lo12:.LANCHOR7]
-	cbnz	w20, .L963
+	cbnz	w20, .L910
 	ldrh	w1, [x3, x22]
 	add	w0, w1, 1
 	and	w0, w0, 2047
 	bfi	w1, w0, 0, 11
 	strh	w1, [x3, x22]
-	ldr	x1, [x2, #:lo12:.LANCHOR100]
+	ldr	x1, [x2, #:lo12:.LANCHOR102]
 	ldr	w2, [x1, 84]
 	add	w2, w2, 1
 	str	w2, [x1, 84]
 	ldrh	w2, [x1, 96]
 	cmp	w2, w0
-	bge	.L965
+	bge	.L912
 	strh	w0, [x1, 96]
-.L965:
+.L912:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -5354,7 +5103,7 @@ ftl_erase_sblk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L963:
+.L910:
 	ldr	w1, [x3, x22]
 	ubfx	x0, x1, 11, 8
 	add	w0, w0, 1
@@ -5362,15 +5111,15 @@ ftl_erase_sblk:
 	bfi	w1, w0, 11, 8
 	str	w1, [x3, x22]
 	and	w0, w0, 65535
-	ldr	x1, [x2, #:lo12:.LANCHOR100]
+	ldr	x1, [x2, #:lo12:.LANCHOR102]
 	ldr	w2, [x1, 80]
 	add	w2, w2, 1
 	str	w2, [x1, 80]
 	ldrh	w2, [x1, 98]
 	cmp	w2, w0
-	bcs	.L965
+	bcs	.L912
 	strh	w0, [x1, 98]
-	b	.L965
+	b	.L912
 	.size	ftl_erase_sblk, .-ftl_erase_sblk
 	.section	.text.ftl_alloc_sys_blk,"ax",@progbits
 	.align	2
@@ -5378,44 +5127,44 @@ ftl_erase_sblk:
 	.type	ftl_alloc_sys_blk, %function
 ftl_alloc_sys_blk:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR100
+	adrp	x0, .LANCHOR102
 	add	x29, sp, 0
-	ldr	x1, [x0, #:lo12:.LANCHOR100]
+	ldr	x1, [x0, #:lo12:.LANCHOR102]
 	ldrh	w2, [x1, 136]
 	str	x19, [sp, 16]
 	mov	x19, x0
 	cmp	w2, 63
-	bls	.L975
+	bls	.L922
 	strh	wzr, [x1, 136]
-.L975:
+.L922:
 	ldrh	w0, [x1, 112]
-	cbnz	w0, .L976
-	adrp	x1, .LANCHOR109
+	cbnz	w0, .L923
+	adrp	x1, .LANCHOR105
 	adrp	x0, .LC0
-	mov	w2, 1117
-	add	x1, x1, :lo12:.LANCHOR109
+	mov	w2, 1130
+	add	x1, x1, :lo12:.LANCHOR105
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L976:
-	ldr	x1, [x19, #:lo12:.LANCHOR100]
+.L923:
+	ldr	x1, [x19, #:lo12:.LANCHOR102]
 	mov	w5, 65535
-.L979:
+.L926:
 	ldrh	w2, [x1, 136]
-.L977:
+.L924:
 	mov	w3, w2
 	cmp	w2, 63
-	ble	.L978
+	ble	.L925
 	strh	wzr, [x1, 136]
-	b	.L979
-.L978:
+	b	.L926
+.L925:
 	add	x4, x2, 1
 	add	x0, x1, x4, lsl 1
 	ldrh	w0, [x0, 158]
 	cmp	w0, w5
-	bne	.L982
+	bne	.L929
 	mov	x2, x4
-	b	.L977
-.L982:
+	b	.L924
+.L929:
 	add	x3, x1, x3, sxtw 1
 	mov	w4, -1
 	ldr	x19, [sp, 16]
@@ -5436,40 +5185,40 @@ ftl_free_sys_blk:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 65535
-	adrp	x0, .LANCHOR100
+	adrp	x0, .LANCHOR102
 	mov	x19, x0
-	ldr	x1, [x0, #:lo12:.LANCHOR100]
+	ldr	x1, [x0, #:lo12:.LANCHOR102]
 	ldrh	w2, [x1, 138]
 	cmp	w2, 63
-	bls	.L985
+	bls	.L932
 	strh	wzr, [x1, 138]
-.L985:
+.L932:
 	ldrh	w0, [x1, 112]
 	cmp	w0, 63
-	bls	.L986
-	adrp	x1, .LANCHOR110
+	bls	.L933
+	adrp	x1, .LANCHOR106
 	adrp	x0, .LC0
-	mov	w2, 1141
-	add	x1, x1, :lo12:.LANCHOR110
+	mov	w2, 1154
+	add	x1, x1, :lo12:.LANCHOR106
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L986:
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+.L933:
+	ldr	x0, [x19, #:lo12:.LANCHOR102]
 	mov	w4, 65535
-.L989:
+.L936:
 	ldrh	w1, [x0, 138]
-.L987:
+.L934:
 	mov	w2, w1
 	cmp	w1, 63
-	ble	.L988
+	ble	.L935
 	strh	wzr, [x0, 138]
-	b	.L989
-.L988:
+	b	.L936
+.L935:
 	add	x3, x1, 1
 	add	x5, x0, x3, lsl 1
 	ldrh	w5, [x5, 158]
 	cmp	w5, w4
-	bne	.L990
+	bne	.L937
 	add	x2, x0, x2, sxtw 1
 	strh	w20, [x2, 160]
 	strh	w1, [x0, 138]
@@ -5479,9 +5228,9 @@ ftl_free_sys_blk:
 	strh	w1, [x0, 112]
 	ldp	x29, x30, [sp], 32
 	ret
-.L990:
+.L937:
 	mov	x1, x3
-	b	.L987
+	b	.L934
 	.size	ftl_free_sys_blk, .-ftl_free_sys_blk
 	.section	.text.ftl_info_data_recovery,"ax",@progbits
 	.align	2
@@ -5491,7 +5240,7 @@ ftl_info_data_recovery:
 	ldrh	w2, [x0]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L1003
+	beq	.L950
 	stp	x29, x30, [sp, -48]!
 	adrp	x1, .LANCHOR7
 	add	x29, sp, 0
@@ -5502,25 +5251,25 @@ ftl_info_data_recovery:
 	add	x21, x20, x19
 	ldrb	w1, [x21, 2]
 	tst	w1, 224
-	bne	.L993
+	bne	.L940
 	ldrb	w0, [x0, 4]
 	bfi	w1, w0, 5, 3
 	strb	w1, [x21, 2]
 	mov	w0, w2
 	bl	zftl_remove_free_node
 	ldrb	w0, [x21, 2]
-	adrp	x1, .LANCHOR100
-	ldr	x3, [x1, #:lo12:.LANCHOR100]
-	tbz	x0, 3, .L997
+	adrp	x1, .LANCHOR102
+	ldr	x3, [x1, #:lo12:.LANCHOR102]
+	tbz	x0, 3, .L944
 	ldrh	w2, [x3, 116]
 	sub	w2, w2, #1
 	strh	w2, [x3, 116]
-.L998:
+.L945:
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L1000
+	bne	.L947
 	ldr	w0, [x20, x19]
-	ldr	x1, [x1, #:lo12:.LANCHOR100]
+	ldr	x1, [x1, #:lo12:.LANCHOR102]
 	ubfx	x2, x0, 11, 8
 	add	w2, w2, 1
 	bfi	w0, w2, 11, 8
@@ -5528,44 +5277,44 @@ ftl_info_data_recovery:
 	ldrh	w0, [x1, 120]
 	sub	w0, w0, #1
 	strh	w0, [x1, 120]
-.L993:
+.L940:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L997:
+.L944:
 	tst	w0, 24
-	bne	.L999
+	bne	.L946
 	ldrh	w2, [x3, 114]
 	sub	w2, w2, #1
 	strh	w2, [x3, 114]
-	b	.L998
-.L999:
+	b	.L945
+.L946:
 	ldrh	w2, [x3, 118]
 	sub	w2, w2, #1
 	strh	w2, [x3, 118]
-	b	.L998
-.L1000:
+	b	.L945
+.L947:
 	ldrh	w2, [x20, x19]
 	cmp	w0, 64
 	add	w3, w2, 1
 	bfi	w2, w3, 0, 11
 	strh	w2, [x20, x19]
-	bne	.L1001
-	ldr	x1, [x1, #:lo12:.LANCHOR100]
+	bne	.L948
+	ldr	x1, [x1, #:lo12:.LANCHOR102]
 	ldrh	w0, [x1, 122]
 	sub	w0, w0, #1
 	strh	w0, [x1, 122]
-	b	.L993
-.L1001:
+	b	.L940
+.L948:
 	cmp	w0, 96
-	bne	.L993
-	ldr	x1, [x1, #:lo12:.LANCHOR100]
+	bne	.L940
+	ldr	x1, [x1, #:lo12:.LANCHOR102]
 	ldrh	w0, [x1, 124]
 	sub	w0, w0, #1
 	strh	w0, [x1, 124]
-	b	.L993
-.L1003:
+	b	.L940
+.L950:
 	ret
 	.size	ftl_info_data_recovery, .-ftl_info_data_recovery
 	.section	.text.ftl_get_ppa_from_index,"ax",@progbits
@@ -5575,19 +5324,19 @@ ftl_info_data_recovery:
 ftl_get_ppa_from_index:
 	stp	x29, x30, [sp, -32]!
 	adrp	x1, .LANCHOR10
-	adrp	x3, .LANCHOR76
+	adrp	x3, .LANCHOR78
 	and	w0, w0, 65535
 	add	x29, sp, 0
 	ldr	x2, [x1, #:lo12:.LANCHOR10]
-	adrp	x1, .LANCHOR83
-	ldrb	w3, [x3, #:lo12:.LANCHOR76]
-	ldrh	w1, [x1, #:lo12:.LANCHOR83]
+	adrp	x1, .LANCHOR85
+	ldrb	w3, [x3, #:lo12:.LANCHOR78]
+	ldrh	w1, [x1, #:lo12:.LANCHOR85]
 	stp	x19, x20, [sp, 16]
 	mul	w1, w1, w3
 	cmp	w0, w1
-	bge	.L1007
+	bge	.L954
 	add	x2, x2, 16
-.L1008:
+.L955:
 	ldrb	w1, [x2, 9]
 	sdiv	w19, w0, w1
 	msub	w0, w19, w1, w0
@@ -5595,25 +5344,25 @@ ftl_get_ppa_from_index:
 	ldrh	w20, [x0, 16]
 	mov	w0, 65535
 	cmp	w20, w0
-	bne	.L1009
-	adrp	x1, .LANCHOR111
+	bne	.L956
+	adrp	x1, .LANCHOR107
 	adrp	x0, .LC0
-	mov	w2, 1580
-	add	x1, x1, :lo12:.LANCHOR111
+	mov	w2, 1593
+	add	x1, x1, :lo12:.LANCHOR107
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1009:
-	adrp	x0, .LANCHOR107
-	ldrh	w0, [x0, #:lo12:.LANCHOR107]
+.L956:
+	adrp	x0, .LANCHOR103
+	ldrh	w0, [x0, #:lo12:.LANCHOR103]
 	madd	w0, w0, w20, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1007:
+.L954:
 	sub	w0, w0, w1
 	add	x2, x2, 48
 	and	w0, w0, 65535
-	b	.L1008
+	b	.L955
 	.size	ftl_get_ppa_from_index, .-ftl_get_ppa_from_index
 	.section	.text.lpa_hash_get_ppa,"ax",@progbits
 	.align	2
@@ -5621,29 +5370,29 @@ ftl_get_ppa_from_index:
 	.type	lpa_hash_get_ppa, %function
 lpa_hash_get_ppa:
 	and	x2, x0, 255
-	adrp	x1, .LANCHOR112
-	add	x1, x1, :lo12:.LANCHOR112
+	adrp	x1, .LANCHOR108
+	add	x1, x1, :lo12:.LANCHOR108
 	mov	w3, 65535
 	ldrh	w1, [x1, x2, lsl 1]
-	adrp	x2, .LANCHOR113
-	ldr	x4, [x2, #:lo12:.LANCHOR113]
-	adrp	x2, .LANCHOR114
-	ldr	x5, [x2, #:lo12:.LANCHOR114]
-.L1012:
+	adrp	x2, .LANCHOR109
+	ldr	x4, [x2, #:lo12:.LANCHOR109]
+	adrp	x2, .LANCHOR110
+	ldr	x5, [x2, #:lo12:.LANCHOR110]
+.L959:
 	cmp	w1, w3
-	bne	.L1014
+	bne	.L961
 	mov	w0, -1
 	ret
-.L1014:
+.L961:
 	uxtw	x2, w1
 	ldr	w6, [x4, x2, lsl 2]
 	cmp	w0, w6
-	bne	.L1013
+	bne	.L960
 	mov	w0, w1
 	b	ftl_get_ppa_from_index
-.L1013:
+.L960:
 	ldrh	w1, [x5, x2, lsl 1]
-	b	.L1012
+	b	.L959
 	.size	lpa_hash_get_ppa, .-lpa_hash_get_ppa
 	.section	.text.ftl_get_new_free_page,"ax",@progbits
 	.align	2
@@ -5657,50 +5406,50 @@ ftl_get_new_free_page:
 	mov	x19, x0
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1016
-	adrp	x1, .LANCHOR115
+	bne	.L963
+	adrp	x1, .LANCHOR111
 	adrp	x0, .LC0
-	mov	w2, 1695
-	add	x1, x1, :lo12:.LANCHOR115
+	mov	w2, 1716
+	add	x1, x1, :lo12:.LANCHOR111
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1016:
-	adrp	x0, .LANCHOR83
+.L963:
+	adrp	x0, .LANCHOR85
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	ldrh	w0, [x0, #:lo12:.LANCHOR85]
 	cmp	w1, w0
-	bne	.L1017
-	adrp	x1, .LANCHOR115
+	bne	.L964
+	adrp	x1, .LANCHOR111
 	adrp	x0, .LC0
-	mov	w2, 1696
-	add	x1, x1, :lo12:.LANCHOR115
+	mov	w2, 1717
+	add	x1, x1, :lo12:.LANCHOR111
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1017:
+.L964:
 	ldrh	w0, [x19, 6]
-	cbnz	w0, .L1018
-	adrp	x1, .LANCHOR115
+	cbnz	w0, .L965
+	adrp	x1, .LANCHOR111
 	adrp	x0, .LC0
-	mov	w2, 1697
-	add	x1, x1, :lo12:.LANCHOR115
+	mov	w2, 1718
+	add	x1, x1, :lo12:.LANCHOR111
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1018:
+.L965:
 	ldrb	w0, [x19, 5]
 	mov	w2, 65535
 	add	x0, x0, 8
 	ldrh	w3, [x19, x0, lsl 1]
-	adrp	x0, .LANCHOR76
-	ldrb	w4, [x0, #:lo12:.LANCHOR76]
-.L1019:
+	adrp	x0, .LANCHOR78
+	ldrb	w4, [x0, #:lo12:.LANCHOR78]
+.L966:
 	cmp	w3, w2
 	ldrb	w1, [x19, 5]
-	beq	.L1021
-	adrp	x0, .LANCHOR107
+	beq	.L968
+	adrp	x0, .LANCHOR103
 	add	w1, w1, 1
 	and	w1, w1, 255
 	ldrh	w2, [x19, 2]
-	ldrh	w0, [x0, #:lo12:.LANCHOR107]
+	ldrh	w0, [x0, #:lo12:.LANCHOR103]
 	cmp	w4, w1
 	strb	w1, [x19, 5]
 	mul	w0, w0, w3
@@ -5711,29 +5460,29 @@ ftl_get_new_free_page:
 	orr	w0, w0, w2
 	add	w3, w3, 1
 	strh	w3, [x19, 10]
-	bne	.L1015
+	bne	.L962
 	add	w2, w2, 1
 	strb	wzr, [x19, 5]
 	strh	w2, [x19, 2]
-.L1015:
+.L962:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1021:
+.L968:
 	add	w1, w1, 1
 	and	w1, w1, 255
 	strb	w1, [x19, 5]
 	cmp	w1, w4
-	bne	.L1020
+	bne	.L967
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 5]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L1020:
+.L967:
 	ldrb	w0, [x19, 5]
 	add	x0, x0, 8
 	ldrh	w3, [x19, x0, lsl 1]
-	b	.L1019
+	b	.L966
 	.size	ftl_get_new_free_page, .-ftl_get_new_free_page
 	.section	.text.ftl_ext_alloc_new_blk,"ax",@progbits
 	.align	2
@@ -5749,22 +5498,22 @@ ftl_ext_alloc_new_blk:
 	mov	w19, w0
 	sub	w0, w0, #1
 	cmp	w1, w0, uxth
-	bcs	.L1025
-	adrp	x1, .LANCHOR116
+	bcs	.L972
+	adrp	x1, .LANCHOR112
 	adrp	x0, .LC0
-	mov	w2, 1728
-	add	x1, x1, :lo12:.LANCHOR116
+	mov	w2, 1749
+	add	x1, x1, :lo12:.LANCHOR112
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1025:
-	adrp	x20, .LANCHOR100
+.L972:
+	adrp	x20, .LANCHOR102
 	mov	w1, 0
 	mov	w0, w19
 	bl	ftl_erase_phy_blk
-	ldr	x0, [x20, #:lo12:.LANCHOR100]
+	ldr	x0, [x20, #:lo12:.LANCHOR102]
 	ldrh	w0, [x0, 130]
 	bl	ftl_free_sys_blk
-	ldr	x0, [x20, #:lo12:.LANCHOR100]
+	ldr	x0, [x20, #:lo12:.LANCHOR102]
 	strh	w19, [x0, 130]
 	strh	wzr, [x0, 140]
 	mov	w0, 0
@@ -5777,18 +5526,18 @@ ftl_ext_alloc_new_blk:
 	.global	ftl_total_vpn_update
 	.type	ftl_total_vpn_update, %function
 ftl_total_vpn_update:
-	adrp	x2, .LANCHOR117
+	adrp	x2, .LANCHOR113
 	mov	x3, x2
-	ldrh	w1, [x2, #:lo12:.LANCHOR117]
+	ldrh	w1, [x2, #:lo12:.LANCHOR113]
 	cmp	w1, 4
-	bhi	.L1028
-	cbnz	w0, .L1028
+	bhi	.L975
+	cbnz	w0, .L975
 	add	w1, w1, 1
-	strh	w1, [x2, #:lo12:.LANCHOR117]
+	strh	w1, [x2, #:lo12:.LANCHOR113]
 	ret
-.L1028:
+.L975:
 	adrp	x0, .LANCHOR6
-	strh	wzr, [x3, #:lo12:.LANCHOR117]
+	strh	wzr, [x3, #:lo12:.LANCHOR113]
 	mov	x1, 0
 	mov	w2, 0
 	ldrh	w5, [x0, #:lo12:.LANCHOR6]
@@ -5798,37 +5547,37 @@ ftl_total_vpn_update:
 	adrp	x0, .LANCHOR7
 	ldr	x7, [x0, #:lo12:.LANCHOR7]
 	mov	w0, 0
-.L1030:
+.L977:
 	cmp	w5, w1, uxth
-	bhi	.L1033
+	bhi	.L980
 	adrp	x1, .LANCHOR10
 	ldr	x1, [x1, #:lo12:.LANCHOR10]
 	str	w2, [x1, 524]
-	adrp	x2, .LANCHOR100
+	adrp	x2, .LANCHOR102
 	str	w0, [x1, 528]
-	ldr	x2, [x2, #:lo12:.LANCHOR100]
+	ldr	x2, [x2, #:lo12:.LANCHOR102]
 	ldrh	w2, [x2, 120]
-	cbz	w2, .L1027
+	cbz	w2, .L974
 	udiv	w0, w0, w2
 	str	w0, [x1, 532]
-.L1027:
+.L974:
 	ret
-.L1033:
+.L980:
 	ldrh	w3, [x6, x1, lsl 1]
 	cmp	w3, w8
-	beq	.L1031
+	beq	.L978
 	add	x4, x7, x1, lsl 2
 	ldrb	w4, [x4, 2]
 	and	w4, w4, 224
 	cmp	w4, 160
-	bne	.L1032
+	bne	.L979
 	add	w0, w0, w3
-.L1031:
+.L978:
 	add	x1, x1, 1
-	b	.L1030
-.L1032:
+	b	.L977
+.L979:
 	add	w2, w2, w3
-	b	.L1031
+	b	.L978
 	.size	ftl_total_vpn_update, .-ftl_total_vpn_update
 	.section	.text.ftl_debug_info_fill,"ax",@progbits
 	.align	2
@@ -5853,17 +5602,17 @@ ftl_vpn_update:
 	ubfiz	x19, x19, 1, 16
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, x19]
-	cbnz	w0, .L1041
-	adrp	x1, .LANCHOR118
+	cbnz	w0, .L988
+	adrp	x1, .LANCHOR114
 	mov	w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR118]
-.L1039:
+	str	w0, [x1, #:lo12:.LANCHOR114]
+.L986:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1041:
+.L988:
 	mov	w0, 0
-	b	.L1039
+	b	.L986
 	.size	ftl_vpn_update, .-ftl_vpn_update
 	.section	.text.ftl_vpn_decrement,"ax",@progbits
 	.align	2
@@ -5876,57 +5625,57 @@ ftl_vpn_decrement:
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1044
+	beq	.L991
 	adrp	x0, .LANCHOR9
 	uxtw	x1, w19
 	lsl	x2, x1, 1
 	ldr	x3, [x0, #:lo12:.LANCHOR9]
 	ldrh	w0, [x3, x2]
-	cbnz	w0, .L1045
+	cbnz	w0, .L992
 	adrp	x0, .LANCHOR7
 	mov	w2, 0
 	ldr	x0, [x0, #:lo12:.LANCHOR7]
 	add	x1, x0, x1, lsl 2
-	adrp	x0, .LC60
-	add	x0, x0, :lo12:.LC60
+	adrp	x0, .LC58
+	add	x0, x0, :lo12:.LC58
 	ldrb	w3, [x1, 2]
 	mov	w1, w19
 	ubfx	x3, x3, 5, 3
 	bl	printf
-.L1050:
+.L997:
 	mov	w0, 0
-	b	.L1043
-.L1045:
+	b	.L990
+.L992:
 	sub	w0, w0, #1
 	strh	w0, [x3, x2]
-.L1044:
+.L991:
 	adrp	x20, .LANCHOR64
 	ldrh	w0, [x20, #:lo12:.LANCHOR64]
 	cmp	w19, w0
-	beq	.L1050
+	beq	.L997
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L1047
+	bne	.L994
 	strh	w19, [x20, #:lo12:.LANCHOR64]
-	b	.L1050
-.L1047:
+	b	.L997
+.L994:
 	bl	ftl_vpn_update
 	cmp	w0, 0
-	adrp	x1, .LANCHOR119
+	adrp	x1, .LANCHOR115
 	cset	w0, ne
 	ldrh	w3, [x20, #:lo12:.LANCHOR64]
-	ldrh	w2, [x1, #:lo12:.LANCHOR119]
+	ldrh	w2, [x1, #:lo12:.LANCHOR115]
 	strh	w19, [x20, #:lo12:.LANCHOR64]
 	add	w2, w2, 1
 	and	w2, w2, 65535
 	cmp	w2, 7
 	csel	w2, w2, wzr, ls
-	strh	w2, [x1, #:lo12:.LANCHOR119]
+	strh	w2, [x1, #:lo12:.LANCHOR115]
 	and	x2, x2, 65535
 	adrp	x1, .LANCHOR65
 	add	x1, x1, :lo12:.LANCHOR65
 	strh	w3, [x1, x2, lsl 1]
-.L1043:
+.L990:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -5936,50 +5685,50 @@ ftl_vpn_decrement:
 	.global	lpa_hash_update_ppa
 	.type	lpa_hash_update_ppa, %function
 lpa_hash_update_ppa:
-	adrp	x3, .LANCHOR112
+	adrp	x3, .LANCHOR108
 	and	x5, x0, 255
-	add	x4, x3, :lo12:.LANCHOR112
+	add	x4, x3, :lo12:.LANCHOR108
 	mov	w7, 65535
 	and	w2, w2, 65535
 	mov	w12, w7
 	ldrh	w6, [x4, x5, lsl 1]
-	adrp	x4, .LANCHOR113
-	ldr	x8, [x4, #:lo12:.LANCHOR113]
-	adrp	x4, .LANCHOR114
-	ldr	x4, [x4, #:lo12:.LANCHOR114]
-.L1053:
+	adrp	x4, .LANCHOR109
+	ldr	x8, [x4, #:lo12:.LANCHOR109]
+	adrp	x4, .LANCHOR110
+	ldr	x4, [x4, #:lo12:.LANCHOR110]
+.L1000:
 	cmp	w6, w12
-	beq	.L1057
+	beq	.L1004
 	uxtw	x11, w6
 	lsl	x10, x11, 2
 	add	x13, x8, x10
 	ldr	w10, [x8, x10]
 	cmp	w0, w10
 	lsl	x10, x11, 1
-	bne	.L1054
+	bne	.L1001
 	mov	w6, -1
 	str	w6, [x13]
 	cmp	w7, w12
-	bne	.L1055
-	add	x6, x3, :lo12:.LANCHOR112
+	bne	.L1002
+	add	x6, x3, :lo12:.LANCHOR108
 	ldrh	w7, [x4, x10]
 	strh	w7, [x6, x5, lsl 1]
-.L1056:
+.L1003:
 	mov	w6, -1
 	strh	w6, [x4, x11, lsl 1]
-.L1057:
+.L1004:
 	uxtw	x6, w2
-	add	x3, x3, :lo12:.LANCHOR112
+	add	x3, x3, :lo12:.LANCHOR108
 	cmn	w1, #1
 	str	w0, [x8, x6, lsl 2]
 	ldrh	w0, [x3, x5, lsl 1]
 	strh	w2, [x3, x5, lsl 1]
 	strh	w0, [x4, x6, lsl 1]
-	beq	.L1064
+	beq	.L1011
 	stp	x29, x30, [sp, -16]!
-	adrp	x0, .LANCHOR102
+	adrp	x0, .LANCHOR66
 	add	x29, sp, 0
-	ldrh	w3, [x0, #:lo12:.LANCHOR102]
+	ldrh	w3, [x0, #:lo12:.LANCHOR66]
 	mov	w0, 21
 	sub	w2, w0, w3
 	mov	w0, 1
@@ -5987,22 +5736,22 @@ lpa_hash_update_ppa:
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
 	and	w1, w0, w1
-	adrp	x0, .LANCHOR101
-	ldrb	w0, [x0, #:lo12:.LANCHOR101]
+	adrp	x0, .LANCHOR67
+	ldrb	w0, [x0, #:lo12:.LANCHOR67]
 	udiv	w0, w1, w0
 	bl	ftl_vpn_decrement
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
-.L1055:
+.L1002:
 	ldrh	w6, [x4, x10]
 	strh	w6, [x4, w7, uxtw 1]
-	b	.L1056
-.L1054:
+	b	.L1003
+.L1001:
 	mov	w7, w6
 	ldrh	w6, [x4, x10]
-	b	.L1053
-.L1064:
+	b	.L1000
+.L1011:
 	mov	w0, -1
 	ret
 	.size	lpa_hash_update_ppa, .-lpa_hash_update_ppa
@@ -6012,73 +5761,503 @@ lpa_hash_update_ppa:
 	.type	ftl_mask_bad_block, %function
 ftl_mask_bad_block:
 	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LANCHOR102
-	mov	w2, 21
+	adrp	x2, .LANCHOR67
+	ubfx	x1, x0, 21, 3
+	mov	w3, 21
 	add	x29, sp, 0
-	ldrh	w3, [x1, #:lo12:.LANCHOR102]
+	ldrb	w5, [x2, #:lo12:.LANCHOR67]
 	stp	x19, x20, [sp, 16]
-	ubfx	x20, x0, 21, 3
-	sub	w1, w2, w3
-	mov	w2, 1
-	lsr	w0, w0, w3
-	lsl	w2, w2, w1
-	sub	w2, w2, #1
-	and	w2, w2, w0
-	adrp	x0, .LANCHOR101
-	ldrb	w0, [x0, #:lo12:.LANCHOR101]
-	udiv	w2, w2, w0
+	cmp	w5, 1
+	mul	w2, w1, w5
+	and	w19, w2, 255
+	adrp	x2, .LANCHOR66
+	ldrh	w2, [x2, #:lo12:.LANCHOR66]
+	lsr	w0, w0, w2
+	sub	w2, w3, w2
+	mov	w3, 1
+	lsl	w3, w3, w2
+	sub	w3, w3, #1
+	and	w3, w3, w0
+	and	w4, w3, 65535
+	udiv	w3, w3, w5
+	and	w20, w3, 65535
+	bls	.L1015
+	sub	w2, w5, #1
+	and	w2, w2, w4
+	add	w2, w19, w2
+	and	w19, w2, 255
+.L1015:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	and	w19, w2, 65535
-	tbz	x0, 14, .L1068
-	adrp	x0, .LC61
+	tbz	x0, 14, .L1016
+	adrp	x0, .LC59
+	and	w3, w3, 65535
 	mov	w2, w19
-	mov	w1, w20
-	add	x0, x0, :lo12:.LC61
+	add	x0, x0, :lo12:.LC59
 	bl	printf
-.L1068:
+.L1016:
 	adrp	x0, .LANCHOR6
 	ldrh	w0, [x0, #:lo12:.LANCHOR6]
-	cmp	w0, w19
-	bls	.L1067
+	cmp	w0, w20
+	bls	.L1014
 	adrp	x0, .LANCHOR7
-	mov	w1, 1
-	lsl	w1, w1, w20
+	mov	w2, 1
+	lsl	w2, w2, w19
 	ldr	x0, [x0, #:lo12:.LANCHOR7]
-	add	x19, x0, x19, uxth 2
-	ldrb	w0, [x19, 3]
-	orr	w1, w1, w0
-	strb	w1, [x19, 3]
-.L1067:
+	add	x20, x0, x20, uxth 2
+	ldrb	w19, [x20, 3]
+	orr	w2, w2, w19
+	strb	w2, [x20, 3]
+.L1014:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
 	.size	ftl_mask_bad_block, .-ftl_mask_bad_block
+	.section	.text.gc_free_bad_sblk,"ax",@progbits
+	.align	2
+	.global	gc_free_bad_sblk
+	.type	gc_free_bad_sblk, %function
+gc_free_bad_sblk:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x24, .LANCHOR63
+	stp	x27, x28, [sp, 80]
+	and	w28, w0, 65535
+	add	x0, x24, :lo12:.LANCHOR63
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	stp	x25, x26, [sp, 64]
+	ldr	w0, [x0, 328]
+	cbz	w0, .L1033
+	adrp	x25, .LANCHOR78
+	adrp	x27, .LANCHOR66
+	add	x25, x25, :lo12:.LANCHOR78
+	add	x22, x27, :lo12:.LANCHOR66
+	mov	w23, 0
+.L1024:
+	ldrb	w0, [x25]
+	cmp	w0, w23
+	bhi	.L1031
+.L1033:
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	ret
+.L1031:
+	adrp	x0, .LANCHOR67
+	ldrh	w3, [x27, #:lo12:.LANCHOR66]
+	mov	w2, 21
+	ldrb	w1, [x0, #:lo12:.LANCHOR67]
+	sub	w2, w2, w3
+	and	w0, w1, 65535
+	cmp	w1, 1
+	sdiv	w19, w23, w1
+	lsl	w19, w19, w2
+	madd	w19, w28, w0, w19
+	and	w19, w19, 65535
+	bls	.L1025
+	sub	w0, w0, #1
+	and	w0, w0, w23
+	add	w19, w19, w0
+	and	w19, w19, 65535
+.L1025:
+	adrp	x26, .LC60
+	add	x21, x24, :lo12:.LANCHOR63
+	add	x26, x26, :lo12:.LC60
+	mov	w20, 0
+.L1026:
+	ldr	w0, [x21, 328]
+	cmp	w20, w0
+	bcc	.L1030
+	add	w23, w23, 1
+	and	w23, w23, 65535
+	b	.L1024
+.L1030:
+	add	x0, x21, x20, sxtw 1
+	ldrh	w0, [x0, 332]
+	cmp	w0, w19
+	bne	.L1027
+	mov	w1, w19
+	mov	x0, x26
+	bl	printf
+	ldrh	w0, [x22]
+	lsl	w0, w19, w0
+	bl	ftl_mask_bad_block
+	ldr	w1, [x21, 328]
+	mov	w0, w20
+.L1028:
+	cmp	w0, w1
+	bcc	.L1029
+	sub	w1, w1, #1
+	str	w1, [x21, 328]
+.L1027:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L1026
+.L1029:
+	add	w2, w0, 1
+	add	x0, x21, x0, sxtw 1
+	add	x3, x21, x2, sxtw 1
+	ldrh	w3, [x3, 332]
+	strh	w3, [x0, 332]
+	and	w0, w2, 65535
+	b	.L1028
+	.size	gc_free_bad_sblk, .-gc_free_bad_sblk
+	.section	.text.ftl_free_sblk,"ax",@progbits
+	.align	2
+	.global	ftl_free_sblk
+	.type	ftl_free_sblk, %function
+ftl_free_sblk:
+	stp	x29, x30, [sp, -64]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR7
+	and	x24, x0, 65535
+	stp	x21, x22, [sp, 32]
+	ldr	x4, [x23, #:lo12:.LANCHOR7]
+	lsl	x21, x24, 2
+	stp	x19, x20, [sp, 16]
+	mov	x19, x24
+	add	x20, x4, x21
+	ldrb	w0, [x20, 2]
+	ubfx	x22, x0, 5, 3
+	tbz	x0, 3, .L1039
+	adrp	x1, .LANCHOR102
+	ldrh	w2, [x4, x21]
+	adrp	x8, .LANCHOR116
+	ldr	x7, [x1, #:lo12:.LANCHOR102]
+	and	w3, w2, 2047
+	ldr	w2, [x4, x21]
+	ldrh	w8, [x8, #:lo12:.LANCHOR116]
+	ldrh	w1, [x7, 74]
+	ubfx	x6, x2, 11, 8
+	adrp	x2, .LANCHOR8
+	add	w1, w3, w1
+	ldrh	w2, [x2, #:lo12:.LANCHOR8]
+	and	w5, w1, 65535
+	ldrh	w1, [x7, 72]
+	add	w1, w6, w1
+	udiv	w7, w5, w2
+	and	w1, w1, 65535
+	add	w7, w7, w1
+	cmp	w7, w8
+	ble	.L1040
+	adrp	x1, .LANCHOR93
+	adrp	x7, .LANCHOR97
+	ldrh	w5, [x1, #:lo12:.LANCHOR93]
+	adrp	x1, .LANCHOR92
+	ldrh	w7, [x7, #:lo12:.LANCHOR97]
+	ldrh	w1, [x1, #:lo12:.LANCHOR92]
+	add	w5, w5, 7
+	add	w1, w1, w7
+	cmp	w5, w1
+	blt	.L1041
+.L1057:
+	mov	w1, 2
+	bfi	w0, w1, 3, 2
+.L1055:
+	strb	w0, [x20, 2]
+.L1042:
+	ldrb	w0, [x20, 2]
+	ands	w0, w0, 24
+	bne	.L1046
+	mul	w2, w6, w2
+	ldrh	w0, [x4, x21]
+	add	w2, w2, w2, lsl 1
+	add	w2, w3, w2, lsr 2
+	ubfx	x2, x2, 2, 9
+	bfi	w0, w2, 0, 11
+	strh	w0, [x4, x21]
+.L1039:
+	mov	w0, w19
+	bl	zftl_remove_data_node
+	ldr	x0, [x23, #:lo12:.LANCHOR7]
+	add	w22, w22, 6
+	and	w22, w22, 7
+	add	x21, x0, x21
+	cmp	w22, 4
+	ldrb	w0, [x21, 2]
+	and	w0, w0, 31
+	strb	w0, [x21, 2]
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	strh	wzr, [x0, x24, lsl 1]
+	bhi	.L1048
+	mov	w0, w19
+	bl	gc_free_bad_sblk
+.L1048:
+	ldrb	w0, [x20, 2]
+	tbz	x0, 3, .L1049
+	adrp	x0, .LANCHOR10
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	ldrh	w1, [x0, 584]
+	cmp	w1, w19
+	bne	.L1050
+	mov	w1, -1
+	ldrh	w2, [x0, 588]
+	strh	w1, [x0, 584]
+	mov	w1, 65535
+	cmp	w2, w1
+	bne	.L1049
+	strh	w19, [x0, 588]
+	mov	w1, w19
+	adrp	x0, .LC61
+	add	x0, x0, :lo12:.LC61
+.L1056:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	b	printf
+.L1041:
+	adrp	x1, .LANCHOR117
+	adrp	x7, .LANCHOR95
+	ldrh	w5, [x1, #:lo12:.LANCHOR117]
+	adrp	x1, .LANCHOR90
+	ldrh	w7, [x7, #:lo12:.LANCHOR95]
+	ldrh	w1, [x1, #:lo12:.LANCHOR90]
+	add	w5, w5, 7
+	add	w1, w1, w7
+	adrp	x7, .LANCHOR88
+	ldrh	w7, [x7, #:lo12:.LANCHOR88]
+	add	w1, w1, w7
+	cmp	w5, w1
+	blt	.L1057
+.L1045:
+	and	w0, w0, -25
+	b	.L1055
+.L1040:
+	madd	w1, w2, w1, w5
+	adrp	x5, .LANCHOR118
+	ldrh	w5, [x5, #:lo12:.LANCHOR118]
+	cmp	w1, w5
+	ble	.L1042
+	adrp	x1, .LANCHOR117
+	adrp	x7, .LANCHOR95
+	ldrh	w5, [x1, #:lo12:.LANCHOR117]
+	adrp	x1, .LANCHOR90
+	ldrh	w7, [x7, #:lo12:.LANCHOR95]
+	ldrh	w1, [x1, #:lo12:.LANCHOR90]
+	add	w5, w5, 7
+	add	w1, w1, w7
+	adrp	x7, .LANCHOR88
+	ldrh	w7, [x7, #:lo12:.LANCHOR88]
+	add	w1, w1, w7
+	cmp	w5, w1
+	bge	.L1045
+	adrp	x1, .LANCHOR93
+	adrp	x7, .LANCHOR97
+	ldrh	w5, [x1, #:lo12:.LANCHOR93]
+	adrp	x1, .LANCHOR92
+	ldrh	w7, [x7, #:lo12:.LANCHOR97]
+	ldrh	w1, [x1, #:lo12:.LANCHOR92]
+	add	w5, w5, 7
+	add	w1, w1, w7
+	cmp	w5, w1
+	blt	.L1045
+	b	.L1057
+.L1046:
+	cmp	w0, 16
+	bne	.L1039
+	sdiv	w2, w3, w2
+	ldr	w0, [x4, x21]
+	add	w2, w2, w2, lsl 1
+	add	w2, w6, w2, lsr 2
+	ubfx	x2, x2, 2, 6
+	bfi	w0, w2, 11, 8
+	str	w0, [x4, x21]
+	b	.L1039
+.L1050:
+	ldrh	w1, [x0, 586]
+	cmp	w1, w19
+	bne	.L1049
+	mov	w1, -1
+	ldrh	w2, [x0, 590]
+	strh	w1, [x0, 586]
+	mov	w1, 65535
+	cmp	w2, w1
+	bne	.L1049
+	strh	w19, [x0, 590]
+	mov	w1, w19
+	adrp	x0, .LC62
+	add	x0, x0, :lo12:.LC62
+	b	.L1056
+.L1049:
+	mov	w0, w19
+	ldp	x21, x22, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	b	zftl_insert_free_list
+	.size	ftl_free_sblk, .-ftl_free_sblk
+	.section	.text.gc_free_src_blk,"ax",@progbits
+	.align	2
+	.global	gc_free_src_blk
+	.type	gc_free_src_blk, %function
+gc_free_src_blk:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR63
+	stp	x23, x24, [sp, 48]
+	adrp	x22, .LC63
+	adrp	x23, .LANCHOR9
+	add	x21, x21, :lo12:.LANCHOR63
+	mov	x24, x23
+	add	x22, x22, :lo12:.LC63
+	stp	x19, x20, [sp, 16]
+	mov	w20, 0
+	stp	x25, x26, [sp, 64]
+.L1059:
+	ldrh	w0, [x21, 56]
+	cmp	w0, w20
+	bhi	.L1073
+	strh	wzr, [x21, 56]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L1073:
+	add	x0, x21, x20, sxtw 1
+	ldrh	w25, [x0, 58]
+	ldr	x0, [x23, #:lo12:.LANCHOR9]
+	mov	x19, x25
+	lsl	x26, x25, 1
+	ldrh	w2, [x0, x26]
+	cbz	w2, .L1060
+	mov	w1, w25
+	mov	x0, x22
+	bl	printf
+.L1060:
+	ldr	x0, [x24, #:lo12:.LANCHOR9]
+	strh	wzr, [x0, x26]
+	adrp	x0, .LANCHOR7
+	ldr	x0, [x0, #:lo12:.LANCHOR7]
+	add	x25, x0, x25, lsl 2
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L1061
+	ldrb	w2, [x25, 2]
+	adrp	x0, .LC64
+	mov	w1, w19
+	add	x0, x0, :lo12:.LC64
+	ubfx	x2, x2, 5, 3
+	bl	printf
+.L1061:
+	ldrb	w0, [x25, 2]
+	and	w1, w0, 224
+	cmp	w1, 224
+	beq	.L1062
+	tst	w0, 192
+	bne	.L1063
+.L1062:
+	adrp	x1, .LANCHOR119
+	adrp	x0, .LC0
+	mov	w2, 932
+	add	x1, x1, :lo12:.LANCHOR119
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1063:
+	mov	w0, w19
+	bl	ftl_free_sblk
+	adrp	x0, .LANCHOR10
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	ldrh	w2, [x0, 124]
+	cbz	w2, .L1064
+	add	x3, x0, 392
+	mov	w1, 0
+.L1066:
+	ldrh	w4, [x3]
+	cmp	w4, w19
+	bne	.L1065
+	add	x1, x0, x1, sxtw 1
+	mov	w3, -1
+	sub	w2, w2, #1
+	strh	w3, [x1, 392]
+	strh	w2, [x0, 124]
+.L1064:
+	ldrh	w2, [x0, 120]
+	cbz	w2, .L1067
+	add	x3, x0, 136
+	mov	w1, 0
+.L1069:
+	ldrh	w4, [x3]
+	cmp	w4, w19
+	bne	.L1068
+	add	x1, x0, x1, sxtw 1
+	mov	w3, -1
+	sub	w2, w2, #1
+	strh	w3, [x1, 136]
+	strh	w2, [x0, 120]
+.L1067:
+	ldrh	w2, [x0, 122]
+	cbz	w2, .L1070
+	add	x3, x0, 264
+	mov	w1, 0
+.L1072:
+	ldrh	w4, [x3]
+	cmp	w4, w19
+	bne	.L1071
+	add	x1, x0, x1, sxtw 1
+	mov	w3, -1
+	sub	w2, w2, #1
+	strh	w3, [x1, 264]
+	strh	w2, [x0, 122]
+.L1070:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L1059
+.L1065:
+	add	w1, w1, 1
+	add	x3, x3, 2
+	cmp	w1, 64
+	bne	.L1066
+	b	.L1064
+.L1068:
+	add	w1, w1, 1
+	add	x3, x3, 2
+	cmp	w1, 64
+	bne	.L1069
+	b	.L1067
+.L1071:
+	add	w1, w1, 1
+	add	x3, x3, 2
+	cmp	w1, 64
+	bne	.L1072
+	b	.L1070
+	.size	gc_free_src_blk, .-gc_free_src_blk
 	.section	.text.print_ftl_debug_info,"ax",@progbits
 	.align	2
 	.global	print_ftl_debug_info
 	.type	print_ftl_debug_info, %function
 print_ftl_debug_info:
 	sub	sp, sp, #64
-	adrp	x2, .LANCHOR86
+	adrp	x2, .LANCHOR88
 	adrp	x8, .LANCHOR120
 	stp	x29, x30, [sp, 32]
 	add	x29, sp, 32
-	ldrh	w7, [x2, #:lo12:.LANCHOR86]
-	adrp	x2, .LANCHOR88
+	ldrh	w7, [x2, #:lo12:.LANCHOR88]
+	adrp	x2, .LANCHOR90
 	stp	x19, x20, [sp, 48]
-	adrp	x19, .LANCHOR100
+	adrp	x19, .LANCHOR102
 	adrp	x20, .LANCHOR10
-	ldrh	w6, [x2, #:lo12:.LANCHOR88]
+	ldrh	w6, [x2, #:lo12:.LANCHOR90]
+	adrp	x2, .LANCHOR99
+	ldr	x1, [x19, #:lo12:.LANCHOR102]
+	ldrh	w5, [x2, #:lo12:.LANCHOR99]
 	adrp	x2, .LANCHOR97
-	ldr	x1, [x19, #:lo12:.LANCHOR100]
-	ldrh	w5, [x2, #:lo12:.LANCHOR97]
-	adrp	x2, .LANCHOR95
 	ldr	x0, [x20, #:lo12:.LANCHOR10]
-	ldrh	w4, [x2, #:lo12:.LANCHOR95]
-	adrp	x2, .LANCHOR93
+	ldrh	w4, [x2, #:lo12:.LANCHOR97]
+	adrp	x2, .LANCHOR95
 	ldr	w8, [x8, #:lo12:.LANCHOR120]
-	ldrh	w3, [x2, #:lo12:.LANCHOR93]
+	ldrh	w3, [x2, #:lo12:.LANCHOR95]
 	ldrh	w2, [x1, 146]
 	ldrh	w1, [x1, 148]
 	str	w8, [sp, 24]
@@ -6086,31 +6265,31 @@ print_ftl_debug_info:
 	str	w8, [sp, 16]
 	ldr	w0, [x0, 524]
 	str	w0, [sp, 8]
-	adrp	x0, .LANCHOR90
-	ldrh	w0, [x0, #:lo12:.LANCHOR90]
+	adrp	x0, .LANCHOR92
+	ldrh	w0, [x0, #:lo12:.LANCHOR92]
 	str	w0, [sp]
-	adrp	x0, .LC62
-	add	x0, x0, :lo12:.LC62
+	adrp	x0, .LC65
+	add	x0, x0, :lo12:.LC65
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldr	x0, [x19, #:lo12:.LANCHOR102]
 	adrp	x1, .LANCHOR121
 	ldrb	w3, [x1, #:lo12:.LANCHOR121]
 	ldr	w4, [x0, 8]
 	ldr	w5, [x0, 64]
 	ldr	w1, [x0, 20]
 	ldr	w2, [x0, 28]
-	adrp	x0, .LC63
-	add	x0, x0, :lo12:.LC63
+	adrp	x0, .LC66
+	add	x0, x0, :lo12:.LC66
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldr	x0, [x19, #:lo12:.LANCHOR102]
 	ldr	w1, [x0, 52]
 	ldr	w2, [x0, 60]
 	ldr	w3, [x0, 16]
-	adrp	x0, .LC64
-	add	x0, x0, :lo12:.LC64
+	adrp	x0, .LC67
+	add	x0, x0, :lo12:.LC67
 	lsr	w3, w3, 11
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldr	x0, [x19, #:lo12:.LANCHOR102]
 	ldrh	w2, [x0, 98]
 	ldrh	w6, [x0, 72]
 	ldrh	w5, [x0, 96]
@@ -6123,21 +6302,21 @@ print_ftl_debug_info:
 	ldrh	w2, [x0, 90]
 	str	w2, [sp]
 	ldp	w7, w2, [x0, 80]
-	adrp	x0, .LC65
-	add	x0, x0, :lo12:.LC65
+	adrp	x0, .LC68
+	add	x0, x0, :lo12:.LC68
 	bl	printf
-	adrp	x0, .LANCHOR77
-	ldrh	w5, [x0, #:lo12:.LANCHOR77]
-	adrp	x0, .LANCHOR82
-	ldrh	w4, [x0, #:lo12:.LANCHOR82]
+	adrp	x0, .LANCHOR79
+	ldrh	w5, [x0, #:lo12:.LANCHOR79]
+	adrp	x0, .LANCHOR84
+	ldrh	w4, [x0, #:lo12:.LANCHOR84]
 	adrp	x0, .LANCHOR62
 	ldrh	w3, [x0, #:lo12:.LANCHOR62]
-	adrp	x0, .LANCHOR92
-	ldrh	w2, [x0, #:lo12:.LANCHOR92]
-	adrp	x0, .LANCHOR89
-	ldrh	w1, [x0, #:lo12:.LANCHOR89]
-	adrp	x0, .LC66
-	add	x0, x0, :lo12:.LC66
+	adrp	x0, .LANCHOR94
+	ldrh	w2, [x0, #:lo12:.LANCHOR94]
+	adrp	x0, .LANCHOR91
+	ldrh	w1, [x0, #:lo12:.LANCHOR91]
+	adrp	x0, .LC69
+	add	x0, x0, :lo12:.LC69
 	bl	printf
 	ldr	x0, [x20, #:lo12:.LANCHOR10]
 	ldp	x29, x30, [sp, 32]
@@ -6147,8 +6326,8 @@ print_ftl_debug_info:
 	ldrh	w3, [x0, 588]
 	ldrh	w2, [x0, 586]
 	ldrh	w1, [x0, 584]
-	adrp	x0, .LC67
-	add	x0, x0, :lo12:.LC67
+	adrp	x0, .LC70
+	add	x0, x0, :lo12:.LC70
 	b	printf
 	.size	print_ftl_debug_info, .-print_ftl_debug_info
 	.section	.text.ftl_write_buf,"ax",@progbits
@@ -6160,29 +6339,29 @@ ftl_write_buf:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	str	x21, [sp, 32]
-	cbnz	x0, .L1077
+	cbnz	x0, .L1099
 	adrp	x1, .LANCHOR122
 	add	x1, x1, :lo12:.LANCHOR122
-	mov	w2, 667
+	mov	w2, 668
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	bl	print_ftl_debug_info
 	mov	w0, -1
-.L1076:
+.L1098:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1080:
+.L1102:
 	mov	x1, x19
 	adrp	x0, .LANCHOR57
 	add	x0, x0, :lo12:.LANCHOR57
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR100
+	adrp	x1, .LANCHOR102
 	ldrb	w3, [x19, 56]
 	ldrb	w0, [x21, #:lo12:.LANCHOR58]
-	ldr	x1, [x1, #:lo12:.LANCHOR100]
+	ldr	x1, [x1, #:lo12:.LANCHOR102]
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x21, #:lo12:.LANCHOR58]
@@ -6192,125 +6371,141 @@ ftl_write_buf:
 	ldr	w2, [x1, 32]
 	add	w2, w2, 1
 	str	w2, [x1, 32]
-	b	.L1076
-.L1077:
+	b	.L1098
+.L1099:
 	mov	x19, x0
 	adrp	x0, .LANCHOR123
 	mov	x20, x0
 	ldrb	w1, [x0, #:lo12:.LANCHOR123]
 	ldrb	w2, [x19, 56]
 	cmp	w2, w1
-	bls	.L1082
+	bls	.L1104
 	adrp	x1, .LANCHOR122
 	adrp	x0, .LC0
-	mov	w2, 672
+	mov	w2, 673
 	add	x1, x1, :lo12:.LANCHOR122
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1082:
+.L1104:
 	ldrb	w0, [x19, 56]
 	adrp	x21, .LANCHOR58
-	cbz	w0, .L1079
+	cbz	w0, .L1101
 	ldrb	w1, [x20, #:lo12:.LANCHOR123]
 	cmp	w1, w0
-	bcs	.L1080
-.L1079:
+	bcs	.L1102
+.L1101:
 	mov	x0, x19
 	bl	buf_free
 	ldrb	w0, [x21, #:lo12:.LANCHOR58]
-	b	.L1076
+	b	.L1098
 	.size	ftl_write_buf, .-ftl_write_buf
 	.section	.text.ftl_write_completed,"ax",@progbits
 	.align	2
 	.global	ftl_write_completed
 	.type	ftl_write_completed, %function
 ftl_write_completed:
-	stp	x29, x30, [sp, -80]!
+	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR124
-	stp	x21, x22, [sp, 32]
 	adrp	x19, .LANCHOR50
-	adrp	x22, .LANCHOR102
-	add	x20, x20, :lo12:.LANCHOR124
 	add	x19, x19, :lo12:.LANCHOR50
-	add	x22, x22, :lo12:.LANCHOR102
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR124
+	mov	x22, x19
+	add	x21, x21, :lo12:.LANCHOR124
 	stp	x23, x24, [sp, 48]
-	str	x25, [sp, 64]
-.L1088:
-	ldrb	w0, [x20]
+	mov	w24, 0
+.L1110:
+	ldrb	w0, [x21]
 	cmp	w0, 255
-	bne	.L1094
+	bne	.L1118
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldr	x25, [sp, 64]
-	ldp	x29, x30, [sp], 80
+	ldp	x29, x30, [sp], 64
 	ret
-.L1094:
-	ubfiz	x21, x0, 6, 8
-	sbfiz	x0, x0, 6, 32
-	add	x23, x19, x0
-	add	x21, x19, x21
-	ldrb	w0, [x19, x0]
-	strb	w0, [x20]
-	ldr	w0, [x23, 52]
-	cmn	w0, #1
-	bne	.L1089
-	ldp	w2, w3, [x23, 36]
+.L1118:
+	lsl	x1, x0, 6
+	ubfiz	x20, x0, 6, 8
+	add	x23, x19, x1
+	add	x20, x19, x20
+	ldrb	w1, [x19, x1]
+	strb	w1, [x21]
+	ldr	w1, [x23, 52]
+	cmn	w1, #1
+	bne	.L1111
+	adrp	x1, .LANCHOR66
+	ldr	w3, [x23, 40]
+	mov	w5, 65535
+	ldrh	w2, [x1, #:lo12:.LANCHOR66]
 	mov	w1, 21
-	ldrh	w0, [x22]
-	mov	w25, 1
-	sub	w1, w1, w0
-	lsr	w0, w3, w0
-	lsl	w1, w25, w1
+	sub	w4, w1, w2
+	mov	w1, 1
+	lsr	w2, w3, w2
+	lsl	w1, w1, w4
 	sub	w1, w1, #1
-	and	w1, w1, w0
-	adrp	x0, .LANCHOR101
-	ldrb	w0, [x0, #:lo12:.LANCHOR101]
-	udiv	w1, w1, w0
-	adrp	x0, .LC68
-	add	x0, x0, :lo12:.LC68
+	and	w1, w1, w2
+	adrp	x2, .LANCHOR67
+	ldrb	w2, [x2, #:lo12:.LANCHOR67]
+	udiv	w1, w1, w2
+	adrp	x2, .LANCHOR10
+	mov	x23, x2
+	ldr	x4, [x2, #:lo12:.LANCHOR10]
 	and	w24, w1, 65535
-	mov	w1, w24
+	and	w1, w1, w5
+	ldr	w6, [x4, 560]
+	cmp	w6, w5
+	bne	.L1112
+	str	w1, [x4, 560]
+	str	w3, [x4, 564]
+.L1112:
+	add	x0, x22, x0, lsl 6
+	ldr	w2, [x0, 36]
+	adrp	x0, .LC71
+	add	x0, x0, :lo12:.LC71
 	bl	printf
-	mov	w1, w25
-	mov	w2, 0
-	mov	w0, w24
-	bl	gc_add_sblk
-	adrp	x0, .LANCHOR10
-	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	ldr	w1, [x0, 556]
-	add	w1, w1, w25
+	add	w1, w1, 1
 	str	w1, [x0, 556]
 	ldrh	w1, [x0, 16]
 	cmp	w1, w24
-	bne	.L1090
+	bne	.L1113
 	strh	wzr, [x0, 22]
-.L1091:
-	mov	x0, x21
+.L1114:
+	mov	x0, x20
+	mov	w24, 1
 	bl	ftl_write_buf
-	b	.L1088
-.L1090:
+	b	.L1110
+.L1113:
 	ldrh	w1, [x0, 48]
 	cmp	w1, w24
-	bne	.L1091
+	bne	.L1114
 	strh	wzr, [x0, 54]
-	b	.L1091
-.L1089:
+	b	.L1114
+.L1111:
+	cbz	w24, .L1116
+	ldp	w1, w2, [x23, 36]
+	adrp	x0, .LC72
+	add	x0, x0, :lo12:.LC72
+	bl	printf
+	mov	x0, x20
+	bl	ftl_write_buf
+	b	.L1110
+.L1116:
 	ldrh	w2, [x23, 48]
 	ldr	w0, [x23, 36]
 	ldr	w1, [x23, 44]
 	bl	lpa_hash_update_ppa
 	ldrb	w0, [x23, 2]
-	tbz	x0, 2, .L1093
+	tbz	x0, 2, .L1117
 	and	w0, w0, -3
 	strb	w0, [x23, 2]
-	b	.L1088
-.L1093:
-	mov	x0, x21
+	b	.L1110
+.L1117:
+	mov	x0, x20
 	bl	buf_free
-	b	.L1088
+	b	.L1110
 	.size	ftl_write_completed, .-ftl_write_completed
 	.section	.text.zftl_add_read_buf,"ax",@progbits
 	.align	2
@@ -6320,8 +6515,8 @@ zftl_add_read_buf:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	str	x19, [sp, 16]
-	cbnz	x0, .L1097
-	mov	w2, 954
+	cbnz	x0, .L1121
+	mov	w2, 964
 	adrp	x1, .LANCHOR125
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR125
@@ -6330,20 +6525,20 @@ zftl_add_read_buf:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	print_ftl_debug_info
-.L1097:
+.L1121:
 	ldrb	w1, [x0, 56]
 	mov	x19, x0
 	adrp	x0, .LANCHOR123
 	ldrb	w0, [x0, #:lo12:.LANCHOR123]
 	cmp	w1, w0
-	bls	.L1099
+	bls	.L1123
 	adrp	x1, .LANCHOR125
 	adrp	x0, .LC0
-	mov	w2, 959
+	mov	w2, 969
 	add	x1, x1, :lo12:.LANCHOR125
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1099:
+.L1123:
 	mov	x1, x19
 	adrp	x0, .LANCHOR126
 	add	x0, x0, :lo12:.LANCHOR126
@@ -6376,39 +6571,39 @@ ftl_alloc_sblk:
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1104
+	beq	.L1128
 	adrp	x0, .LANCHOR7
 	lsl	w22, w22, 1
 	ldr	x21, [x0, #:lo12:.LANCHOR7]
 	add	x21, x21, x19, uxth 2
 	ldrb	w0, [x21, 2]
 	tst	w0, 224
-	beq	.L1105
+	beq	.L1129
 	adrp	x1, .LANCHOR128
 	adrp	x0, .LC0
-	mov	w2, 827
+	mov	w2, 833
 	add	x1, x1, :lo12:.LANCHOR128
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1105:
+.L1129:
 	ldrb	w0, [x21, 2]
 	bfi	w0, w20, 5, 3
 	ubfx	x1, x0, 3, 2
 	orr	w22, w22, w1
 	bfi	w0, w22, 3, 2
 	strb	w0, [x21, 2]
-.L1106:
+.L1130:
 	mov	w0, w19
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1104:
+.L1128:
 	bl	print_ftl_debug_info
-	adrp	x21, .LC69
+	adrp	x21, .LC73
 	mov	w2, w20
-	add	x21, x21, :lo12:.LC69
+	add	x21, x21, :lo12:.LC73
 	mov	w1, w19
 	mov	x0, x21
 	bl	printf
@@ -6421,13 +6616,13 @@ ftl_alloc_sblk:
 	mov	x0, x21
 	bl	printf
 	bl	dump_all_list_info
-	mov	w2, 837
+	mov	w2, 843
 	adrp	x1, .LANCHOR128
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR128
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L1106
+	b	.L1130
 	.size	ftl_alloc_sblk, .-ftl_alloc_sblk
 	.section	.text.sblk_init,"ax",@progbits
 	.align	2
@@ -6441,8 +6636,8 @@ sblk_init:
 	strb	w0, [x1, #:lo12:.LANCHOR124]
 	adrp	x1, .LANCHOR129
 	strb	w0, [x1, #:lo12:.LANCHOR129]
-	adrp	x1, .LANCHOR67
-	strb	w0, [x1, #:lo12:.LANCHOR67]
+	adrp	x1, .LANCHOR69
+	strb	w0, [x1, #:lo12:.LANCHOR69]
 	mov	w0, 0
 	ret
 	.size	sblk_init, .-sblk_init
@@ -6452,8 +6647,8 @@ sblk_init:
 	.type	dump_sblk_queue, %function
 dump_sblk_queue:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LC70
-	add	x0, x0, :lo12:.LC70
+	adrp	x0, .LC74
+	add	x0, x0, :lo12:.LC74
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR54
@@ -6462,15 +6657,15 @@ dump_sblk_queue:
 	bl	printf
 	ldrb	w19, [x19, #:lo12:.LANCHOR54]
 	cmp	w19, 255
-	beq	.L1113
+	beq	.L1137
 	adrp	x1, .LANCHOR50
 	ubfiz	x19, x19, 6, 8
 	add	x1, x1, :lo12:.LANCHOR50
-	adrp	x21, .LC71
+	adrp	x21, .LC75
 	add	x19, x1, x19
-	add	x21, x21, :lo12:.LC71
+	add	x21, x21, :lo12:.LC75
 	mov	x20, x1
-.L1115:
+.L1139:
 	ldrb	w2, [x19, 58]
 	mov	x0, x21
 	ldrb	w1, [x19, 1]
@@ -6478,11 +6673,11 @@ dump_sblk_queue:
 	bl	printf
 	ldrb	w19, [x19]
 	cmp	w19, 255
-	beq	.L1113
+	beq	.L1137
 	ubfiz	x19, x19, 6, 8
 	add	x19, x20, x19
-	b	.L1115
-.L1113:
+	b	.L1139
+.L1137:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -6496,79 +6691,79 @@ queue_lun_state:
 	adrp	x2, .LANCHOR54
 	ldrb	w2, [x2, #:lo12:.LANCHOR54]
 	cmp	w2, 255
-	beq	.L1131
-	adrp	x3, .LANCHOR102
+	beq	.L1155
+	adrp	x3, .LANCHOR66
 	adrp	x7, .LANCHOR50
 	add	x7, x7, :lo12:.LANCHOR50
-	adrp	x10, .L1127
-	ldrh	w8, [x3, #:lo12:.LANCHOR102]
+	adrp	x10, .L1151
+	ldrh	w8, [x3, #:lo12:.LANCHOR66]
 	mov	w3, 21
 	ubfx	x11, x0, 21, 3
-	add	x10, x10, :lo12:.L1127
+	add	x10, x10, :lo12:.L1151
 	sub	w4, w3, w8
 	mov	w3, 1
 	mov	x12, x7
 	lsl	w3, w3, w4
-	adrp	x4, .LANCHOR101
+	adrp	x4, .LANCHOR67
 	sub	w3, w3, #1
-	ldrb	w6, [x4, #:lo12:.LANCHOR101]
+	ldrb	w6, [x4, #:lo12:.LANCHOR67]
 	and	w3, w3, 65535
 	asr	w4, w0, w8
 	sub	w6, w6, #1
 	and	w6, w6, 65535
 	and	w4, w4, w6
 	and	w4, w4, w3
-.L1130:
+.L1154:
 	add	x0, x7, x2, lsl 6
 	ldr	w5, [x0, 40]
 	ubfx	x13, x5, 21, 3
 	cmp	w11, w13
-	bne	.L1125
+	bne	.L1149
 	lsr	w5, w5, w8
 	and	w5, w6, w5
 	and	w5, w3, w5
 	ldrb	w0, [x0, 58]
 	cmp	w4, w5
-	bne	.L1126
+	bne	.L1150
 	cmp	w1, 1
-	bne	.L1123
+	bne	.L1147
 	cmp	w0, 7
 	ccmp	w0, 9, 4, ne
-	beq	.L1125
+	beq	.L1149
 	ret
-.L1126:
+.L1150:
 	cmp	w1, 3
-	bhi	.L1125
+	bhi	.L1149
 	ldrb	w5, [x10,w1,uxtw]
-	adr	x13, .Lrtx1127
+	adr	x13, .Lrtx1151
 	add	x5, x13, w5, sxtb #2
 	br	x5
-.Lrtx1127:
+.Lrtx1151:
 	.section	.rodata.queue_lun_state,"a",@progbits
 	.align	0
 	.align	2
-.L1127:
-	.byte	(.L1123 - .Lrtx1127) / 4
-	.byte	(.L1128 - .Lrtx1127) / 4
-	.byte	(.L1129 - .Lrtx1127) / 4
-	.byte	(.L1123 - .Lrtx1127) / 4
+.L1151:
+	.byte	(.L1147 - .Lrtx1151) / 4
+	.byte	(.L1152 - .Lrtx1151) / 4
+	.byte	(.L1153 - .Lrtx1151) / 4
+	.byte	(.L1147 - .Lrtx1151) / 4
 	.section	.text.queue_lun_state
-.L1128:
+.L1152:
 	cmp	w0, 7
 	ccmp	w0, 9, 4, ne
-	beq	.L1125
+	beq	.L1149
 	ret
-.L1129:
+.L1153:
 	cmp	w0, 11
-	bne	.L1123
-.L1125:
+	bne	.L1147
+.L1149:
 	lsl	x2, x2, 6
 	ldrb	w2, [x12, x2]
 	cmp	w2, 255
-	bne	.L1130
-.L1131:
+	bne	.L1154
+.L1155:
 	mov	w0, 0
-.L1123:
+.L1147:
 	ret
 	.size	queue_lun_state, .-queue_lun_state
 	.section	.text.queue_remove_completed_req,"ax",@progbits
@@ -6577,24 +6772,24 @@ queue_lun_state:
 	.type	queue_remove_completed_req, %function
 queue_remove_completed_req:
 	adrp	x4, .LANCHOR124
-	adrp	x8, .LANCHOR67
+	adrp	x8, .LANCHOR69
 	adrp	x1, .LANCHOR54
 	adrp	x7, .LANCHOR129
 	adrp	x3, .LANCHOR50
 	ldrb	w14, [x4, #:lo12:.LANCHOR124]
 	add	x5, x3, :lo12:.LANCHOR50
 	ldrb	w2, [x1, #:lo12:.LANCHOR54]
-	ldrb	w12, [x8, #:lo12:.LANCHOR67]
+	ldrb	w12, [x8, #:lo12:.LANCHOR69]
 	mov	x11, x5
 	ldrb	w13, [x7, #:lo12:.LANCHOR129]
-	add	x16, x8, :lo12:.LANCHOR67
+	add	x16, x8, :lo12:.LANCHOR69
 	add	x7, x7, :lo12:.LANCHOR129
 	add	x10, x4, :lo12:.LANCHOR124
 	mov	w6, 0
 	mov	w15, -1
-.L1134:
+.L1158:
 	cmp	w2, 255
-	beq	.L1135
+	beq	.L1159
 	sbfiz	x8, x2, 6, 32
 	sxtw	x0, w2
 	add	x4, x5, x8
@@ -6602,61 +6797,61 @@ queue_remove_completed_req:
 	sub	w4, w4, #12
 	and	w4, w4, 255
 	cmp	w4, 1
-	bls	.L1136
-	cbz	w6, .L1133
+	bls	.L1160
+	cbz	w6, .L1157
 	strb	w2, [x1, #:lo12:.LANCHOR54]
 	ret
-.L1136:
+.L1160:
 	lsl	x6, x0, 6
 	ldrb	w2, [x5, x8]
 	add	x4, x5, x6
 	strb	w15, [x5, x6]
 	ldrb	w6, [x4, 59]
 	cmp	w6, 1
-	bne	.L1139
+	bne	.L1163
 	ldrh	w4, [x4, 50]
-	cbnz	w4, .L1147
+	cbnz	w4, .L1171
 	mov	w4, w14
 	mov	x6, x10
-.L1140:
+.L1164:
 	cmp	w4, 255
-	bne	.L1145
+	bne	.L1169
 	add	x3, x3, :lo12:.LANCHOR50
 	strb	w2, [x1, #:lo12:.LANCHOR54]
 	add	x0, x3, x0, lsl 6
 	ldrb	w0, [x0, 1]
 	strb	w0, [x6]
 	ret
-.L1139:
-	cbnz	w6, .L1141
+.L1163:
+	cbnz	w6, .L1165
 	ldr	w4, [x4, 36]
 	cmn	w4, #1
-	beq	.L1141
+	beq	.L1165
 	mov	w4, w13
 	mov	x6, x7
-	b	.L1140
-.L1147:
+	b	.L1164
+.L1171:
 	mov	w4, w12
 	mov	x6, x16
-	b	.L1140
-.L1145:
+	b	.L1164
+.L1169:
 	mov	w6, w4
 	sbfiz	x4, x4, 6, 32
 	ldrb	w4, [x11, x4]
 	cmp	w4, 255
-	bne	.L1145
+	bne	.L1169
 	add	x0, x11, x0, lsl 6
 	sbfiz	x6, x6, 6, 32
 	ldrb	w0, [x0, 1]
 	strb	w0, [x11, x6]
-.L1141:
+.L1165:
 	mov	w6, 1
-	b	.L1134
-.L1135:
-	cbz	w6, .L1133
+	b	.L1158
+.L1159:
+	cbz	w6, .L1157
 	mov	w0, -1
 	strb	w0, [x1, #:lo12:.LANCHOR54]
-.L1133:
+.L1157:
 	ret
 	.size	queue_remove_completed_req, .-queue_remove_completed_req
 	.section	.text.pm_alloc_new_blk,"ax",@progbits
@@ -6665,42 +6860,42 @@ queue_remove_completed_req:
 	.type	pm_alloc_new_blk, %function
 pm_alloc_new_blk:
 	stp	x29, x30, [sp, -64]!
-	adrp	x2, .LANCHOR76
+	adrp	x2, .LANCHOR78
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR100
+	adrp	x20, .LANCHOR102
 	stp	x21, x22, [sp, 32]
-	ldr	x1, [x20, #:lo12:.LANCHOR100]
-	ldrb	w2, [x2, #:lo12:.LANCHOR76]
+	ldr	x1, [x20, #:lo12:.LANCHOR102]
+	ldrb	w2, [x2, #:lo12:.LANCHOR78]
 	ldrh	w0, [x1, 690]
 	str	x23, [sp, 48]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	strh	w0, [x1, 690]
 	cmp	w2, w0
-	bls	.L1158
+	bls	.L1182
 	add	x0, x1, x0, sxtw 1
 	ldrh	w1, [x0, 672]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1159
-.L1158:
-	adrp	x19, .LC72
-	add	x19, x19, :lo12:.LC72
+	bne	.L1183
+.L1182:
+	adrp	x19, .LC76
+	add	x19, x19, :lo12:.LC76
 	adrp	x23, .LANCHOR7
-.L1171:
+.L1195:
 	mov	w0, 1
 	bl	ftl_alloc_sblk
 	mov	w1, 0
 	and	w21, w0, 65535
 	bl	ftl_erase_sblk
-	add	x14, x20, :lo12:.LANCHOR100
-	ldr	x1, [x20, #:lo12:.LANCHOR100]
+	add	x14, x20, :lo12:.LANCHOR102
+	ldr	x1, [x20, #:lo12:.LANCHOR102]
 	mov	w0, w21
 	add	x1, x1, 672
 	bl	ftl_get_blk_list_in_sblk
 	tst	w0, 65535
-	bne	.L1160
+	bne	.L1184
 	mov	w1, w21
 	mov	x0, x19
 	bl	printf
@@ -6709,8 +6904,8 @@ pm_alloc_new_blk:
 	ldrb	w0, [x1, 2]
 	orr	w0, w0, -32
 	strb	w0, [x1, 2]
-	b	.L1171
-.L1160:
+	b	.L1195
+.L1184:
 	ldr	x0, [x14]
 	adrp	x1, .LANCHOR130
 	mov	w2, 1
@@ -6719,48 +6914,48 @@ pm_alloc_new_blk:
 	str	w2, [x1, #:lo12:.LANCHOR130]
 	mov	w1, 65535
 	strh	wzr, [x0, 274]
-.L1162:
+.L1186:
 	ldrh	w2, [x0]
 	cmp	w2, w1
-	beq	.L1161
+	beq	.L1185
 	add	w19, w19, 1
 	add	x0, x0, 2
 	and	w19, w19, 65535
 	cmp	w19, 128
-	bne	.L1162
+	bne	.L1186
 	adrp	x1, .LANCHOR131
 	adrp	x0, .LC0
 	mov	w2, 194
 	add	x1, x1, :lo12:.LANCHOR131
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1161:
-	ldr	x0, [x20, #:lo12:.LANCHOR100]
+.L1185:
+	ldr	x0, [x20, #:lo12:.LANCHOR102]
 	add	x19, x0, x19, sxtw 1
 	ldrh	w1, [x0, 688]
 	strh	w21, [x19, 416]
 	add	w1, w1, 1
 	strh	w1, [x0, 688]
-.L1159:
-	ldr	x1, [x20, #:lo12:.LANCHOR100]
+.L1183:
+	ldr	x1, [x20, #:lo12:.LANCHOR102]
 	ldrh	w0, [x1, 690]
 	add	x0, x0, 336
 	ldrh	w19, [x1, x0, lsl 1]
 	mov	w0, 65533
 	sub	w1, w19, #1
 	cmp	w0, w1, uxth
-	bcs	.L1164
+	bcs	.L1188
 	adrp	x1, .LANCHOR131
 	adrp	x0, .LC0
 	mov	w2, 199
 	add	x1, x1, :lo12:.LANCHOR131
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1164:
-	adrp	x1, .LANCHOR102
-	ldr	x0, [x20, #:lo12:.LANCHOR100]
+.L1188:
+	adrp	x1, .LANCHOR66
+	ldr	x0, [x20, #:lo12:.LANCHOR102]
 	mov	w2, 21
-	ldrh	w1, [x1, #:lo12:.LANCHOR102]
+	ldrh	w1, [x1, #:lo12:.LANCHOR66]
 	sub	w2, w2, w1
 	strh	wzr, [x0, 696]
 	strh	w19, [x0, 692]
@@ -6768,17 +6963,17 @@ pm_alloc_new_blk:
 	strh	w4, [x0, 694]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1167
+	tbz	x0, 12, .L1191
 	mov	w0, 1
 	and	w4, w4, 65535
 	lsl	w2, w0, w2
 	mov	w3, w19
-	adrp	x0, .LC73
+	adrp	x0, .LC77
 	sub	w2, w2, #1
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC73
+	add	x0, x0, :lo12:.LC77
 	bl	printf
-.L1167:
+.L1191:
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -6798,62 +6993,62 @@ pm_select_ram_region:
 	add	x29, sp, 0
 	mov	w2, 65535
 	str	x19, [sp, 16]
-.L1176:
+.L1200:
 	lsl	x3, x1, 4
 	and	w19, w1, 65535
 	ldrh	w3, [x3, x0]
 	cmp	w3, w2
-	beq	.L1175
+	beq	.L1199
 	add	x1, x1, 1
 	cmp	x1, 32
-	bne	.L1176
+	bne	.L1200
 	add	x0, x0, 2
 	mov	w19, w1
 	mov	x2, x0
 	mov	w4, 32768
 	mov	w1, 0
-.L1178:
+.L1202:
 	ldrh	w3, [x2]
-	tbnz	x3, 15, .L1177
+	tbnz	x3, 15, .L1201
 	cmp	w3, w4
-	bcs	.L1177
+	bcs	.L1201
 	mov	w4, w3
 	mov	w19, w1
-.L1177:
+.L1201:
 	add	w1, w1, 1
 	add	x2, x2, 16
 	and	w1, w1, 65535
 	cmp	w1, 32
-	bne	.L1178
+	bne	.L1202
 	cmp	w19, 32
-	bne	.L1175
+	bne	.L1199
 	adrp	x1, .LANCHOR133
 	mov	w2, -1
 	ldrb	w3, [x1, #:lo12:.LANCHOR133]
 	mov	w1, 0
-.L1180:
+.L1204:
 	ldrh	w5, [x0]
 	cmp	w5, w2
-	bcs	.L1179
+	bcs	.L1203
 	ldrh	w4, [x0, -2]
 	cmp	w4, w3
 	csel	w2, w2, w5, eq
 	csel	w19, w19, w1, eq
-.L1179:
+.L1203:
 	add	w1, w1, 1
 	add	x0, x0, 16
 	and	w1, w1, 65535
 	cmp	w1, 32
-	bne	.L1180
+	bne	.L1204
 	cmp	w19, 32
-	bne	.L1175
+	bne	.L1199
 	adrp	x1, .LANCHOR134
 	adrp	x0, .LC0
 	mov	w2, 297
 	add	x1, x1, :lo12:.LANCHOR134
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1175:
+.L1199:
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -6890,15 +7085,15 @@ flash_lsb_page_tbl_build:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR3
-	cbnz	w0, .L1188
+	cbnz	w0, .L1212
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1189:
+.L1213:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 256
-	bne	.L1189
-.L1195:
+	bne	.L1213
+.L1219:
 	adrp	x20, .LANCHOR138
 	add	x20, x20, :lo12:.LANCHOR138
 	mov	w2, 1024
@@ -6907,42 +7102,42 @@ flash_lsb_page_tbl_build:
 	add	x19, x19, :lo12:.LANCHOR3
 	bl	ftl_memset
 	mov	x0, 0
-.L1190:
+.L1214:
 	ldrh	w1, [x0, x19]
 	add	x0, x0, 2
 	cmp	x0, 512
 	strh	w1, [x20, w1, sxtw 1]
-	bne	.L1190
+	bne	.L1214
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1188:
+.L1212:
 	cmp	w0, 1
-	bne	.L1191
+	bne	.L1215
 	add	x3, x19, :lo12:.LANCHOR3
 	mov	x1, 0
-.L1194:
+.L1218:
 	and	w0, w1, 65535
 	cmp	x1, 3
-	bls	.L1192
+	bls	.L1216
 	ubfiz	w2, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 2
 	sub	w0, w2, w0
 	and	w0, w0, 65535
-.L1192:
+.L1216:
 	strh	w0, [x3, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L1194
-	b	.L1195
-.L1191:
+	bne	.L1218
+	b	.L1219
+.L1215:
 	cmp	w0, 2
-	bne	.L1196
+	bne	.L1220
 	add	x3, x19, :lo12:.LANCHOR3
 	mov	w1, 65535
 	mov	x0, 0
-.L1198:
+.L1222:
 	cmp	x0, 2
 	and	w2, w0, 65535
 	csel	w2, w2, w1, cc
@@ -6951,31 +7146,31 @@ flash_lsb_page_tbl_build:
 	add	x0, x0, 1
 	and	w1, w1, 65535
 	cmp	x0, 256
-	bne	.L1198
-	b	.L1195
-.L1196:
+	bne	.L1222
+	b	.L1219
+.L1220:
 	cmp	w0, 3
-	bne	.L1199
+	bne	.L1223
 	add	x3, x19, :lo12:.LANCHOR3
 	mov	x1, 0
-.L1202:
+.L1226:
 	and	w0, w1, 65535
 	cmp	x1, 5
-	bls	.L1200
+	bls	.L1224
 	ubfiz	w2, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 4
 	sub	w0, w2, w0
 	and	w0, w0, 65535
-.L1200:
+.L1224:
 	strh	w0, [x3, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L1202
-	b	.L1195
-.L1199:
+	bne	.L1226
+	b	.L1219
+.L1223:
 	cmp	w0, 4
-	bne	.L1203
+	bne	.L1227
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	w2, 1
 	add	x1, x1, 16
@@ -6993,7 +7188,7 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1, -10]
 	strh	w0, [x1, -2]
 	mov	w0, 8
-.L1205:
+.L1229:
 	and	w3, w0, 1
 	ubfiz	w2, w0, 1, 15
 	add	w3, w3, 6
@@ -7002,40 +7197,40 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1], 2
 	and	w0, w0, 65535
 	cmp	w0, 256
-	bne	.L1205
-	b	.L1195
-.L1203:
+	bne	.L1229
+	b	.L1219
+.L1227:
 	cmp	w0, 5
-	bne	.L1206
+	bne	.L1230
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1207:
+.L1231:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 16
-	bne	.L1207
+	bne	.L1231
 	add	x1, x1, 32
-.L1208:
+.L1232:
 	strh	w0, [x1], 2
 	add	w0, w0, 2
 	and	w0, w0, 65535
 	cmp	w0, 496
-	bne	.L1208
-	b	.L1195
-.L1206:
+	bne	.L1232
+	b	.L1219
+.L1230:
 	cmp	w0, 8
-	bne	.L1209
+	bne	.L1233
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1210:
+.L1234:
 	strh	w0, [x0, x1]
 	add	x0, x0, 2
 	cmp	x0, 512
-	bne	.L1210
-	b	.L1195
-.L1209:
+	bne	.L1234
+	b	.L1219
+.L1233:
 	cmp	w0, 9
-	bne	.L1195
+	bne	.L1219
 	add	x0, x19, :lo12:.LANCHOR3
 	mov	w1, 1
 	add	x0, x0, 6
@@ -7044,13 +7239,13 @@ flash_lsb_page_tbl_build:
 	mov	w1, 2
 	strh	w1, [x0, -2]
 	mov	w1, 3
-.L1211:
+.L1235:
 	strh	w1, [x0], 2
 	add	w1, w1, 2
 	and	w1, w1, 65535
 	cmp	w1, 509
-	bne	.L1211
-	b	.L1195
+	bne	.L1235
+	b	.L1219
 	.size	flash_lsb_page_tbl_build, .-flash_lsb_page_tbl_build
 	.section	.text.flash_die_info_init,"ax",@progbits
 	.align	2
@@ -7064,18 +7259,18 @@ flash_die_info_init:
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	tbz	x0, 12, .L1228
+	tbz	x0, 12, .L1252
 	adrp	x1, .LANCHOR139
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR139
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1228:
-	adrp	x22, .LANCHOR30
-	add	x19, x22, :lo12:.LANCHOR30
+.L1252:
+	adrp	x22, .LANCHOR31
+	add	x19, x22, :lo12:.LANCHOR31
 	adrp	x23, .LANCHOR2
 	adrp	x24, .LANCHOR18
-	adrp	x21, .LANCHOR29
+	adrp	x21, .LANCHOR30
 	mov	w2, 8
 	ldrh	w0, [x19, 26]
 	adrp	x20, .LANCHOR141
@@ -7087,7 +7282,7 @@ flash_die_info_init:
 	adrp	x1, .LANCHOR140
 	strh	w0, [x1, #:lo12:.LANCHOR140]
 	mov	w1, 0
-	add	x0, x21, :lo12:.LANCHOR29
+	add	x0, x21, :lo12:.LANCHOR30
 	bl	ftl_memset
 	add	x0, x20, :lo12:.LANCHOR141
 	mov	w2, 32
@@ -7095,40 +7290,40 @@ flash_die_info_init:
 	bl	ftl_memset
 	mov	x15, x21
 	mov	x11, x20
-	adrp	x12, .LANCHOR31
-	adrp	x14, .LANCHOR41
+	adrp	x12, .LANCHOR32
+	adrp	x14, .LANCHOR42
 	mov	x7, x22
-	add	x12, x12, :lo12:.LANCHOR31
-	add	x20, x14, :lo12:.LANCHOR41
+	add	x12, x12, :lo12:.LANCHOR32
+	add	x20, x14, :lo12:.LANCHOR42
 	add	x21, x19, 1
 	mov	x10, 0
-.L1230:
+.L1254:
 	ldrb	w2, [x19]
 	mov	w0, 2
 	strb	w0, [x10, x12]
 	add	x1, x20, x10, lsl 3
 	mov	x0, x21
 	bl	flash_mem_cmp8
-	cbnz	w0, .L1229
+	cbnz	w0, .L1253
 	ldrb	w2, [x24, #:lo12:.LANCHOR18]
 	add	x1, x11, :lo12:.LANCHOR141
 	add	w0, w2, 1
 	strb	w0, [x24, #:lo12:.LANCHOR18]
 	and	w0, w10, 255
 	str	wzr, [x1, x2, lsl 2]
-	add	x1, x15, :lo12:.LANCHOR29
+	add	x1, x15, :lo12:.LANCHOR30
 	strb	w0, [x1, x2]
 	bl	zftl_flash_enter_slc_mode
-.L1229:
+.L1253:
 	add	x10, x10, 1
 	cmp	x10, 4
-	bne	.L1230
-	add	x0, x7, :lo12:.LANCHOR30
+	bne	.L1254
+	add	x0, x7, :lo12:.LANCHOR31
 	ldrb	w1, [x0, 8]
 	cmp	w1, 2
-	beq	.L1231
-.L1235:
-	add	x7, x7, :lo12:.LANCHOR30
+	beq	.L1255
+.L1259:
+	add	x7, x7, :lo12:.LANCHOR31
 	ldrb	w0, [x24, #:lo12:.LANCHOR18]
 	ldp	x19, x20, [sp, 16]
 	ldrb	w1, [x7, 13]
@@ -7141,28 +7336,28 @@ flash_die_info_init:
 	adrp	x1, .LANCHOR142
 	strh	w0, [x1, #:lo12:.LANCHOR142]
 	ret
-.L1231:
+.L1255:
 	ldrh	w1, [x23, #:lo12:.LANCHOR2]
-	add	x14, x14, :lo12:.LANCHOR41
+	add	x14, x14, :lo12:.LANCHOR42
 	ldrb	w12, [x0, 13]
 	add	x10, x0, 1
-	ldrb	w20, [x7, #:lo12:.LANCHOR30]
+	ldrb	w20, [x7, #:lo12:.LANCHOR31]
 	add	x19, x24, :lo12:.LANCHOR18
 	ldrb	w21, [x0, 23]
 	add	x11, x11, :lo12:.LANCHOR141
-	add	x15, x15, :lo12:.LANCHOR29
+	add	x15, x15, :lo12:.LANCHOR30
 	mov	x13, 0
 	mul	w12, w12, w1
 	ldrh	w1, [x0, 14]
 	and	w1, w1, 65280
 	mul	w12, w12, w1
 	lsl	w22, w12, 1
-.L1234:
+.L1258:
 	mov	w2, w20
 	add	x1, x14, x13, lsl 3
 	mov	x0, x10
 	bl	flash_mem_cmp8
-	cbnz	w0, .L1232
+	cbnz	w0, .L1256
 	ldrb	w1, [x19]
 	cmp	w21, 0
 	csel	w2, w12, w22, eq
@@ -7170,11 +7365,11 @@ flash_die_info_init:
 	strb	w0, [x19]
 	str	w2, [x11, x1, lsl 2]
 	strb	w13, [x15, x1]
-.L1232:
+.L1256:
 	add	x13, x13, 1
 	cmp	x13, 4
-	bne	.L1234
-	b	.L1235
+	bne	.L1258
+	b	.L1259
 	.size	flash_die_info_init, .-flash_die_info_init
 	.section	.text.lpa_hash_init,"ax",@progbits
 	.align	2
@@ -7184,19 +7379,19 @@ lpa_hash_init:
 	stp	x29, x30, [sp, -16]!
 	mov	w2, 512
 	mov	w1, 255
-	adrp	x0, .LANCHOR112
+	adrp	x0, .LANCHOR108
 	add	x29, sp, 0
-	add	x0, x0, :lo12:.LANCHOR112
+	add	x0, x0, :lo12:.LANCHOR108
 	bl	ftl_memset
-	adrp	x0, .LANCHOR83
+	adrp	x0, .LANCHOR85
 	mov	w1, 255
 	ldp	x29, x30, [sp], 16
-	ldrh	w2, [x0, #:lo12:.LANCHOR83]
-	adrp	x0, .LANCHOR76
-	ldrb	w0, [x0, #:lo12:.LANCHOR76]
+	ldrh	w2, [x0, #:lo12:.LANCHOR85]
+	adrp	x0, .LANCHOR78
+	ldrb	w0, [x0, #:lo12:.LANCHOR78]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR114
-	ldr	x0, [x0, #:lo12:.LANCHOR114]
+	adrp	x0, .LANCHOR110
+	ldr	x0, [x0, #:lo12:.LANCHOR110]
 	lsl	w2, w2, 2
 	b	ftl_memset
 	.size	lpa_hash_init, .-lpa_hash_init
@@ -7211,59 +7406,59 @@ lpa_rebuild_hash:
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	tbz	x0, 12, .L1248
+	tbz	x0, 12, .L1272
 	adrp	x1, .LANCHOR143
-	adrp	x0, .LC74
+	adrp	x0, .LC78
 	mov	w3, 0
 	mov	w2, 224
 	add	x1, x1, :lo12:.LANCHOR143
-	add	x0, x0, :lo12:.LC74
+	add	x0, x0, :lo12:.LC78
 	bl	printf
-.L1248:
-	adrp	x20, .LANCHOR83
-	adrp	x22, .LANCHOR76
-	adrp	x19, .LANCHOR112
-	add	x19, x19, :lo12:.LANCHOR112
+.L1272:
+	adrp	x20, .LANCHOR85
+	adrp	x22, .LANCHOR78
+	adrp	x19, .LANCHOR108
+	add	x19, x19, :lo12:.LANCHOR108
 	mov	w2, 512
 	mov	w1, 255
 	mov	x0, x19
 	bl	ftl_memset
-	ldrh	w2, [x20, #:lo12:.LANCHOR83]
-	adrp	x21, .LANCHOR114
-	ldrb	w0, [x22, #:lo12:.LANCHOR76]
+	ldrh	w2, [x20, #:lo12:.LANCHOR85]
+	adrp	x21, .LANCHOR110
+	ldrb	w0, [x22, #:lo12:.LANCHOR78]
 	mov	w1, 255
-	add	x20, x20, :lo12:.LANCHOR83
+	add	x20, x20, :lo12:.LANCHOR85
 	mul	w2, w2, w0
-	ldr	x0, [x21, #:lo12:.LANCHOR114]
+	ldr	x0, [x21, #:lo12:.LANCHOR110]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	adrp	x0, .LANCHOR113
-	ldrb	w3, [x22, #:lo12:.LANCHOR76]
-	ldr	x5, [x21, #:lo12:.LANCHOR114]
+	adrp	x0, .LANCHOR109
+	ldrb	w3, [x22, #:lo12:.LANCHOR78]
+	ldr	x5, [x21, #:lo12:.LANCHOR110]
 	mov	w1, 0
-	ldr	x4, [x0, #:lo12:.LANCHOR113]
-.L1249:
+	ldr	x4, [x0, #:lo12:.LANCHOR109]
+.L1273:
 	ldrh	w0, [x20]
 	mul	w0, w0, w3
 	cmp	w1, w0, lsl 1
-	blt	.L1251
+	blt	.L1275
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1251:
+.L1275:
 	uxtw	x2, w1
 	ldr	w0, [x4, x2, lsl 2]
 	cmn	w0, #1
-	beq	.L1250
+	beq	.L1274
 	and	x0, x0, 255
 	ldrh	w6, [x19, x0, lsl 1]
 	strh	w1, [x19, x0, lsl 1]
 	strh	w6, [x5, x2, lsl 1]
-.L1250:
+.L1274:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L1249
+	b	.L1273
 	.size	lpa_rebuild_hash, .-lpa_rebuild_hash
 	.section	.text.zftl_read_flash_info,"ax",@progbits
 	.align	2
@@ -7277,8 +7472,8 @@ zftl_read_flash_info:
 	str	x19, [sp, 16]
 	mov	x19, x0
 	bl	ftl_memset
-	adrp	x1, .LANCHOR30
-	add	x1, x1, :lo12:.LANCHOR30
+	adrp	x1, .LANCHOR31
+	add	x1, x1, :lo12:.LANCHOR31
 	adrp	x0, .LANCHOR2
 	adrp	x3, .LANCHOR59
 	strb	wzr, [x19, 10]
@@ -7289,8 +7484,8 @@ zftl_read_flash_info:
 	strb	w0, [x19, 4]
 	ubfx	x0, x0, 8, 8
 	strb	w0, [x19, 5]
-	adrp	x0, .LANCHOR43
-	ldrb	w0, [x0, #:lo12:.LANCHOR43]
+	adrp	x0, .LANCHOR44
+	ldrb	w0, [x0, #:lo12:.LANCHOR44]
 	strb	w0, [x19, 7]
 	add	x0, x3, :lo12:.LANCHOR59
 	ldrb	w3, [x3, #:lo12:.LANCHOR59]
@@ -7303,28 +7498,28 @@ zftl_read_flash_info:
 	strb	w0, [x19, 3]
 	mov	w0, 32
 	strb	w2, [x19, 6]
-	adrp	x2, .LANCHOR29
+	adrp	x2, .LANCHOR30
 	strb	w0, [x19, 8]
-	add	x2, x2, :lo12:.LANCHOR29
+	add	x2, x2, :lo12:.LANCHOR30
 	ldrb	w0, [x1, 7]
 	mov	x1, 0
 	strb	w0, [x19, 9]
 	adrp	x0, .LANCHOR18
 	ldrb	w3, [x0, #:lo12:.LANCHOR18]
-.L1260:
+.L1284:
 	cmp	w3, w1, uxtb
-	bhi	.L1261
+	bhi	.L1285
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1261:
+.L1285:
 	ldrb	w0, [x1, x2]
 	add	x1, x1, 1
 	ldrb	w5, [x19, 10]
 	lsl	w0, w4, w0
 	orr	w0, w0, w5
 	strb	w0, [x19, 10]
-	b	.L1260
+	b	.L1284
 	.size	zftl_read_flash_info, .-zftl_read_flash_info
 	.section	.text.gc_static_wearleveling,"ax",@progbits
 	.align	2
@@ -7334,18 +7529,18 @@ gc_static_wearleveling:
 	stp	x29, x30, [sp, -160]!
 	add	x29, sp, 0
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR100
+	adrp	x25, .LANCHOR102
 	stp	x19, x20, [sp, 16]
-	ldr	x0, [x25, #:lo12:.LANCHOR100]
+	ldr	x0, [x25, #:lo12:.LANCHOR102]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	stp	x27, x28, [sp, 80]
 	ldr	w1, [x0, 32]
 	mov	w0, 10240
 	cmp	w1, w0
-	bls	.L1264
+	bls	.L1288
 	bl	ftl_tmp_into_update
-.L1264:
+.L1288:
 	adrp	x19, .LANCHOR10
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldr	w1, [x0, 568]
@@ -7353,15 +7548,15 @@ gc_static_wearleveling:
 	add	w1, w1, 860160
 	add	w1, w1, 3840
 	cmp	w2, w1
-	bhi	.L1265
-	ldr	x3, [x25, #:lo12:.LANCHOR100]
+	bhi	.L1289
+	ldr	x3, [x25, #:lo12:.LANCHOR102]
 	ldr	w1, [x0, 572]
 	add	w1, w1, 32
 	ldr	w3, [x3, 36]
 	cmp	w3, w1
-	bls	.L1314
-.L1265:
-	ldr	x1, [x25, #:lo12:.LANCHOR100]
+	bls	.L1338
+.L1289:
+	ldr	x1, [x25, #:lo12:.LANCHOR102]
 	mov	w20, 65535
 	adrp	x8, .LANCHOR14
 	mov	w21, w20
@@ -7380,10 +7575,10 @@ gc_static_wearleveling:
 	str	wzr, [x29, 136]
 	stp	wzr, wzr, [x29, 148]
 	str	wzr, [x29, 156]
-.L1267:
+.L1291:
 	ldrh	w0, [x10]
 	cmp	w0, w24
-	bhi	.L1276
+	bhi	.L1300
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w2, 128
 	mov	w1, 255
@@ -7398,14 +7593,14 @@ gc_static_wearleveling:
 	mov	x1, x5
 	lsl	x0, x5, 2
 	add	x26, x2, x0
-	tbz	x3, 10, .L1277
+	tbz	x3, 10, .L1301
 	adrp	x3, .LANCHOR9
 	ldrb	w4, [x26, 2]
 	ldr	x6, [x3, #:lo12:.LANCHOR9]
 	ldr	w3, [x2, x0]
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC76
-	add	x0, x0, :lo12:.LC76
+	adrp	x0, .LC80
+	add	x0, x0, :lo12:.LC80
 	ldrh	w7, [x6, x5, lsl 1]
 	ubfx	x3, x3, 11, 8
 	ldrb	w6, [x26, 3]
@@ -7413,13 +7608,13 @@ gc_static_wearleveling:
 	and	w2, w2, 2047
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1277:
+.L1301:
 	ldrb	w0, [x26, 2]
-	tbz	x0, 3, .L1278
+	tbz	x0, 3, .L1302
 	ldrb	w0, [x26, 2]
 	and	w1, w0, 192
 	cmp	w1, 64
-	bne	.L1279
+	bne	.L1303
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w1, 0
 	mov	w2, 1
@@ -7428,7 +7623,7 @@ gc_static_wearleveling:
 	adrp	x0, .LANCHOR63+318
 	mov	w1, 1
 	strh	w1, [x0, #:lo12:.LANCHOR63+318]
-.L1278:
+.L1302:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldr	w3, [x24, #:lo12:.LANCHOR14]
 	ldr	x2, [x23, #:lo12:.LANCHOR7]
@@ -7436,14 +7631,14 @@ gc_static_wearleveling:
 	mov	x1, x5
 	lsl	x0, x5, 2
 	add	x26, x2, x0
-	tbz	x3, 10, .L1280
+	tbz	x3, 10, .L1304
 	adrp	x3, .LANCHOR9
 	ldrb	w4, [x26, 2]
 	ldr	x6, [x3, #:lo12:.LANCHOR9]
 	ldr	w3, [x2, x0]
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC77
-	add	x0, x0, :lo12:.LC77
+	adrp	x0, .LC81
+	add	x0, x0, :lo12:.LC81
 	ldrh	w7, [x6, x5, lsl 1]
 	ubfx	x3, x3, 11, 8
 	ldrb	w6, [x26, 3]
@@ -7451,13 +7646,13 @@ gc_static_wearleveling:
 	and	w2, w2, 2047
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1280:
+.L1304:
 	ldrb	w0, [x26, 2]
-	tbz	x0, 3, .L1281
+	tbz	x0, 3, .L1305
 	ldrb	w0, [x26, 2]
 	and	w1, w0, 192
 	cmp	w1, 64
-	bne	.L1282
+	bne	.L1306
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w1, 0
 	mov	w2, 1
@@ -7466,9 +7661,9 @@ gc_static_wearleveling:
 	adrp	x0, .LANCHOR63+318
 	mov	w1, 1
 	strh	w1, [x0, #:lo12:.LANCHOR63+318]
-.L1281:
+.L1305:
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1283
+	tbz	x0, 10, .L1307
 	ldr	w6, [x29, 128]
 	adrp	x2, .LANCHOR9
 	ldr	x1, [x23, #:lo12:.LANCHOR7]
@@ -7477,9 +7672,9 @@ gc_static_wearleveling:
 	add	x5, x1, x0
 	ldr	w3, [x1, x0]
 	ldrh	w2, [x1, x0]
-	adrp	x0, .LC78
+	adrp	x0, .LC82
 	ldrh	w7, [x7, x6, lsl 1]
-	add	x0, x0, :lo12:.LC78
+	add	x0, x0, :lo12:.LC82
 	ldrb	w6, [x5, 3]
 	ubfx	x3, x3, 11, 8
 	ldr	w1, [x29, 128]
@@ -7488,9 +7683,9 @@ gc_static_wearleveling:
 	ubfx	x5, x4, 5, 3
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1283:
+.L1307:
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1284
+	tbz	x0, 10, .L1308
 	ldr	w6, [x29, 136]
 	adrp	x2, .LANCHOR9
 	ldr	x1, [x23, #:lo12:.LANCHOR7]
@@ -7499,9 +7694,9 @@ gc_static_wearleveling:
 	add	x5, x1, x0
 	ldr	w3, [x1, x0]
 	ldrh	w2, [x1, x0]
-	adrp	x0, .LC79
+	adrp	x0, .LC83
 	ldrh	w7, [x7, x6, lsl 1]
-	add	x0, x0, :lo12:.LC79
+	add	x0, x0, :lo12:.LC83
 	ldrb	w6, [x5, 3]
 	ubfx	x3, x3, 11, 8
 	ldr	w1, [x29, 136]
@@ -7510,8 +7705,8 @@ gc_static_wearleveling:
 	ubfx	x5, x4, 5, 3
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1284:
-	ldr	x0, [x25, #:lo12:.LANCHOR100]
+.L1308:
+	ldr	x0, [x25, #:lo12:.LANCHOR102]
 	ldrh	w1, [x29, 156]
 	strh	w1, [x0, 96]
 	ldr	w1, [x29, 148]
@@ -7524,17 +7719,17 @@ gc_static_wearleveling:
 	strh	w3, [x0, 88]
 	strh	w4, [x0, 90]
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1285
-	adrp	x0, .LC80
+	tbz	x0, 10, .L1309
+	adrp	x0, .LC84
 	and	w4, w4, 65535
 	and	w3, w3, 65535
 	mov	w2, w28
 	mov	w1, w27
-	add	x0, x0, :lo12:.LC80
+	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L1285:
+.L1309:
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1286
+	tbz	x0, 10, .L1310
 	adrp	x0, .LANCHOR144
 	ldr	w3, [x29, 156]
 	mov	w4, w22
@@ -7543,31 +7738,31 @@ gc_static_wearleveling:
 	adrp	x0, .LANCHOR145
 	mov	w1, w20
 	ldrh	w5, [x0, #:lo12:.LANCHOR145]
-	adrp	x0, .LC81
-	add	x0, x0, :lo12:.LC81
+	adrp	x0, .LC85
+	add	x0, x0, :lo12:.LC85
 	bl	printf
-.L1286:
+.L1310:
 	sub	w0, w22, w21
 	str	w0, [x29, 148]
 	adrp	x0, .LANCHOR144
 	ldr	w1, [x29, 148]
 	ldrh	w0, [x0, #:lo12:.LANCHOR144]
 	cmp	w1, w0
-	bgt	.L1287
+	bgt	.L1311
 	adrp	x1, .LANCHOR145
 	ldr	w0, [x29, 156]
 	ldrh	w1, [x1, #:lo12:.LANCHOR145]
 	sub	w0, w0, w20
 	cmp	w0, w1
-	ble	.L1315
-.L1287:
+	ble	.L1339
+.L1311:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	adrp	x28, .LANCHOR63
 	add	x28, x28, :lo12:.LANCHOR63
 	mov	w27, 0
 	mov	w22, 0
 	ldrh	w26, [x0, 580]
-	ldr	x0, [x25, #:lo12:.LANCHOR100]
+	ldr	x0, [x25, #:lo12:.LANCHOR102]
 	ldrh	w0, [x0, 134]
 	str	w0, [x29, 152]
 	adrp	x0, .LANCHOR6
@@ -7576,74 +7771,74 @@ gc_static_wearleveling:
 	adrp	x0, .LANCHOR145
 	add	x0, x0, :lo12:.LANCHOR145
 	str	x0, [x29, 128]
-.L1289:
+.L1313:
 	ldr	x0, [x29, 136]
 	ldr	w1, [x29, 152]
 	ldrh	w0, [x0]
 	cmp	w1, w0
-	bcc	.L1299
-.L1298:
+	bcc	.L1323
+.L1322:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	str	w26, [x0, 580]
-.L1288:
-	cbz	w21, .L1301
-	ldr	x2, [x25, #:lo12:.LANCHOR100]
+.L1312:
+	cbz	w21, .L1325
+	ldr	x2, [x25, #:lo12:.LANCHOR102]
 	adrp	x0, .LANCHOR6
 	ldrh	w5, [x0, #:lo12:.LANCHOR6]
 	ldr	x0, [x23, #:lo12:.LANCHOR7]
 	ldrh	w1, [x2, 134]
 	add	x0, x0, x1, uxth 2
-.L1302:
+.L1326:
 	cmp	w1, w5
-	bcc	.L1304
+	bcc	.L1328
 	ldrh	w0, [x2, 72]
 	add	w0, w21, w0
 	strh	w0, [x2, 72]
 	ldrh	w0, [x2, 98]
 	cmp	w21, w0
-	bcs	.L1301
+	bcs	.L1325
 	sub	w21, w0, w21
 	strh	w21, [x2, 98]
-.L1301:
-	cbz	w20, .L1307
-	ldr	x2, [x25, #:lo12:.LANCHOR100]
+.L1325:
+	cbz	w20, .L1331
+	ldr	x2, [x25, #:lo12:.LANCHOR102]
 	adrp	x0, .LANCHOR6
 	ldrh	w6, [x0, #:lo12:.LANCHOR6]
 	ldr	x0, [x23, #:lo12:.LANCHOR7]
 	ldrh	w1, [x2, 134]
 	add	x0, x0, x1, uxth 2
-.L1308:
+.L1332:
 	cmp	w1, w6
-	bcc	.L1310
+	bcc	.L1334
 	ldrh	w0, [x2, 74]
 	add	w0, w20, w0
 	strh	w0, [x2, 74]
 	ldrh	w0, [x2, 96]
 	cmp	w20, w0
-	bcs	.L1307
+	bcs	.L1331
 	sub	w20, w0, w20
 	strh	w20, [x2, 96]
-.L1307:
+.L1331:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L1266
+	beq	.L1290
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x1]
-	adrp	x1, .LANCHOR83
-	ldrh	w1, [x1, #:lo12:.LANCHOR83]
+	adrp	x1, .LANCHOR85
+	ldrh	w1, [x1, #:lo12:.LANCHOR85]
 	cmp	w2, w1
-	bhi	.L1266
+	bhi	.L1290
 	add	w22, w22, 1
 	mov	w2, 1
 	mov	w1, 0
 	bl	gc_add_sblk
-.L1266:
+.L1290:
 	add	w0, w22, w27
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -7652,7 +7847,7 @@ gc_static_wearleveling:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L1276:
+.L1300:
 	uxtw	x7, w24
 	ldr	x6, [x23, #:lo12:.LANCHOR7]
 	lsl	x2, x7, 2
@@ -7660,40 +7855,40 @@ gc_static_wearleveling:
 	ldrb	w0, [x11, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L1268
+	beq	.L1292
 	ubfx	x4, x0, 3, 2
-	tbz	x4, 0, .L1269
+	tbz	x4, 0, .L1293
 	ldr	w0, [x6, x2]
 	ldrh	w1, [x6, x2]
 	ubfx	x0, x0, 11, 8
 	and	w1, w1, 2047
-.L1270:
+.L1294:
 	ldr	w3, [x29, 148]
 	add	w27, w27, 1
 	and	w27, w27, 65535
 	cmp	w20, w1
 	add	w3, w3, w1
 	str	w3, [x29, 148]
-	bls	.L1313
+	bls	.L1337
 	ldr	x3, [x19, #:lo12:.LANCHOR10]
 	mov	w20, w1
 	strh	w24, [x3, 586]
-.L1313:
+.L1337:
 	ldr	w3, [x29, 156]
 	cmp	w3, w1
-	bcs	.L1273
+	bcs	.L1297
 	str	w24, [x29, 128]
 	str	w1, [x29, 156]
-.L1273:
+.L1297:
 	mov	w3, 65535
 	cmp	w0, w3
-	bne	.L1272
-.L1274:
+	bne	.L1296
+.L1298:
 	cmp	w0, 9
 	ccmp	w1, 9, 0, hi
-	bhi	.L1268
+	bhi	.L1292
 	ldr	w0, [x8]
-	tbz	x0, 8, .L1268
+	tbz	x0, 8, .L1292
 	adrp	x0, .LANCHOR9
 	ldr	w3, [x6, x2]
 	ldrh	w2, [x6, x2]
@@ -7705,82 +7900,82 @@ gc_static_wearleveling:
 	and	w2, w2, 2047
 	stp	x8, x10, [x29, 112]
 	ldrh	w7, [x0, x7, lsl 1]
-	adrp	x0, .LC75
+	adrp	x0, .LC79
 	ubfx	x5, x5, 5, 3
-	add	x0, x0, :lo12:.LC75
+	add	x0, x0, :lo12:.LC79
 	bl	printf
 	ldp	x8, x10, [x29, 112]
-.L1268:
+.L1292:
 	add	w24, w24, 1
 	and	w24, w24, 65535
-	b	.L1267
-.L1269:
+	b	.L1291
+.L1293:
 	tst	w0, 24
-	bne	.L1271
+	bne	.L1295
 	ldrh	w1, [x6, x2]
 	mov	w0, 65535
 	and	w1, w1, 2047
-	b	.L1270
-.L1271:
+	b	.L1294
+.L1295:
 	ldr	w0, [x6, x2]
 	mov	w1, 65535
 	ubfx	x0, x0, 11, 8
-.L1272:
+.L1296:
 	ldr	w3, [x29, 152]
 	add	w28, w28, 1
 	and	w28, w28, 65535
 	cmp	w21, w0
 	add	w3, w3, w0
 	str	w3, [x29, 152]
-	bls	.L1275
+	bls	.L1299
 	ldr	x3, [x19, #:lo12:.LANCHOR10]
 	mov	w21, w0
 	strh	w24, [x3, 584]
-.L1275:
+.L1299:
 	cmp	w22, w0
-	bcs	.L1274
+	bcs	.L1298
 	mov	w22, w0
 	str	w24, [x29, 136]
-	b	.L1274
-.L1279:
+	b	.L1298
+.L1303:
 	tst	w0, 224
-	bne	.L1278
+	bne	.L1302
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
 	mov	w0, 65535
 	ldrh	w2, [x1, 590]
 	cmp	w2, w0
-	bne	.L1278
+	bne	.L1302
 	ldrh	w0, [x1, 586]
 	ldrh	w1, [x1, 588]
 	cmp	w1, w0
-	beq	.L1278
+	beq	.L1302
 	bl	zftl_remove_free_node
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldrh	w1, [x0, 586]
 	strh	w1, [x0, 590]
 	mov	w1, -1
 	strh	w1, [x0, 586]
-	b	.L1278
-.L1282:
+	b	.L1302
+.L1306:
 	tst	w0, 224
-	bne	.L1281
+	bne	.L1305
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
 	mov	w0, 65535
 	ldrh	w2, [x1, 588]
 	cmp	w2, w0
-	bne	.L1281
+	bne	.L1305
 	ldrh	w0, [x1, 584]
 	ldrh	w1, [x1, 590]
 	cmp	w1, w0
-	beq	.L1281
+	beq	.L1305
 	bl	zftl_remove_free_node
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldrh	w1, [x0, 584]
 	strh	w1, [x0, 588]
 	mov	w1, -1
 	strh	w1, [x0, 584]
-	b	.L1281
-.L1299:
+	b	.L1305
+.L1323:
 	add	w7, w26, 1
 	ldr	x4, [x23, #:lo12:.LANCHOR7]
 	and	w26, w7, 65535
@@ -7791,31 +7986,31 @@ gc_static_wearleveling:
 	add	x0, x4, x3
 	ldrb	w0, [x0, 2]
 	tst	w0, 192
-	beq	.L1291
+	beq	.L1315
 	and	w2, w0, 224
 	cmp	w2, 224
-	beq	.L1291
+	beq	.L1315
 	ubfx	x0, x0, 3, 2
 	and	w1, w0, 1
-	tbz	x0, 0, .L1292
+	tbz	x0, 0, .L1316
 	cmp	w2, 160
-.L1379:
-	bne	.L1294
+.L1403:
+	bne	.L1318
 	adrp	x0, .LANCHOR144
 	ldr	w2, [x29, 148]
 	ldrh	w0, [x0, #:lo12:.LANCHOR144]
 	cmp	w2, w0
-	ble	.L1295
+	ble	.L1319
 	ldr	w0, [x4, x3]
 	ubfx	x0, x0, 11, 8
 	cmp	w0, w21
-	bls	.L1296
-	cbz	w1, .L1295
+	bls	.L1320
+	cbz	w1, .L1319
 	ldrh	w0, [x4, x3]
 	and	w0, w0, 2047
 	cmp	w0, w20
-	bgt	.L1295
-.L1296:
+	bgt	.L1319
+.L1320:
 	stp	x4, x8, [x29, 104]
 	mov	w2, 1
 	str	x3, [x29, 120]
@@ -7828,7 +8023,7 @@ gc_static_wearleveling:
 	add	w22, w22, 1
 	ldp	x4, x8, [x29, 104]
 	ldr	x3, [x29, 120]
-	tbz	x0, 10, .L1295
+	tbz	x0, 10, .L1319
 	adrp	x0, .LANCHOR9
 	ldr	w6, [x4, x3]
 	ldrh	w5, [x4, x3]
@@ -7838,46 +8033,46 @@ gc_static_wearleveling:
 	ldrh	w4, [x28, 56]
 	and	w5, w5, 2047
 	add	x3, x0, x3
-	adrp	x0, .LC82
-	add	x0, x0, :lo12:.LC82
+	adrp	x0, .LC86
+	add	x0, x0, :lo12:.LC86
 	ldrb	w2, [x3, 2]
 	ldrh	w3, [x1, x8, lsl 1]
 	mov	w1, w26
 	ubfx	x2, x2, 5, 3
-.L1380:
+.L1404:
 	bl	printf
-.L1295:
+.L1319:
 	cmp	w22, 4
 	ccmp	w27, 4, 2, ls
-	bhi	.L1298
-.L1291:
+	bhi	.L1322
+.L1315:
 	ldr	w0, [x29, 152]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	str	w0, [x29, 152]
-	b	.L1289
-.L1292:
+	b	.L1313
+.L1316:
 	cmp	w0, 2
-	b	.L1379
-.L1294:
+	b	.L1403
+.L1318:
 	ldr	x2, [x29, 128]
 	ldr	w0, [x29, 156]
 	sub	w0, w0, w20
 	ldrh	w2, [x2]
 	cmp	w0, w2
-	ble	.L1295
+	ble	.L1319
 	ldrh	w0, [x4, x3]
 	add	w2, w20, 8
 	and	w0, w0, 2047
 	cmp	w0, w2
-	ble	.L1297
-	cbz	w1, .L1295
+	ble	.L1321
+	cbz	w1, .L1319
 	ldr	w0, [x4, x3]
 	add	w1, w21, 4
 	ubfx	x0, x0, 11, 8
 	cmp	w0, w1
-	bgt	.L1295
-.L1297:
+	bgt	.L1319
+.L1321:
 	stp	x4, x8, [x29, 104]
 	mov	w2, 1
 	str	x3, [x29, 120]
@@ -7890,7 +8085,7 @@ gc_static_wearleveling:
 	add	w27, w27, 1
 	ldp	x4, x8, [x29, 104]
 	ldr	x3, [x29, 120]
-	tbz	x0, 10, .L1295
+	tbz	x0, 10, .L1319
 	adrp	x0, .LANCHOR9
 	ldr	w6, [x4, x3]
 	ldrh	w5, [x4, x3]
@@ -7900,54 +8095,54 @@ gc_static_wearleveling:
 	and	w5, w5, 2047
 	ldrh	w4, [x28, 56]
 	add	x3, x0, x3
-	adrp	x0, .LC83
-	add	x0, x0, :lo12:.LC83
+	adrp	x0, .LC87
+	add	x0, x0, :lo12:.LC87
 	ldrb	w2, [x3, 2]
 	ldrh	w3, [x1, x8, lsl 1]
 	mov	w1, w26
 	ubfx	x2, x2, 5, 3
-	b	.L1380
-.L1315:
+	b	.L1404
+.L1339:
 	mov	w27, 0
 	mov	w22, 0
-	b	.L1288
-.L1304:
+	b	.L1312
+.L1328:
 	ldr	w3, [x0]
 	ubfx	x4, x3, 11, 8
 	cmp	w21, w4
-	bhi	.L1303
+	bhi	.L1327
 	ldrb	w6, [x0, 2]
 	tst	w6, 24
-	beq	.L1303
+	beq	.L1327
 	sub	w4, w4, w21
 	bfi	w3, w4, 11, 8
 	str	w3, [x0]
-.L1303:
+.L1327:
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 65535
-	b	.L1302
-.L1310:
+	b	.L1326
+.L1334:
 	ldrh	w3, [x0]
 	and	w4, w3, 2047
 	cmp	w4, w20
-	blt	.L1309
+	blt	.L1333
 	ldrb	w5, [x0, 2]
 	and	w5, w5, 24
 	cmp	w5, 16
-	beq	.L1309
+	beq	.L1333
 	sub	w4, w4, w20
 	bfi	w3, w4, 0, 11
 	strh	w3, [x0]
-.L1309:
+.L1333:
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 65535
-	b	.L1308
-.L1314:
+	b	.L1332
+.L1338:
 	mov	w27, 0
 	mov	w22, 0
-	b	.L1266
+	b	.L1290
 	.size	gc_static_wearleveling, .-gc_static_wearleveling
 	.section	.text.zftl_sblk_list_init,"ax",@progbits
 	.align	2
@@ -7963,80 +8158,80 @@ zftl_sblk_list_init:
 	adrp	x28, .LANCHOR4
 	stp	x19, x20, [sp, 16]
 	ldrh	w2, [x27, #:lo12:.LANCHOR6]
-	adrp	x20, .LANCHOR90
+	adrp	x20, .LANCHOR92
 	stp	x21, x22, [sp, 32]
-	adrp	x19, .LANCHOR86
+	adrp	x19, .LANCHOR88
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR97
+	adrp	x22, .LANCHOR99
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR100
+	adrp	x25, .LANCHOR102
 	mul	w2, w2, w0
 	ldr	x0, [x28, #:lo12:.LANCHOR4]
-	adrp	x24, .LANCHOR93
-	adrp	x23, .LANCHOR95
-	adrp	x21, .LANCHOR88
+	adrp	x24, .LANCHOR95
+	adrp	x23, .LANCHOR97
+	adrp	x21, .LANCHOR90
 	bl	ftl_memset
 	str	x28, [x29, 168]
-	adrp	x0, .LANCHOR99
-	adrp	x2, .LANCHOR76
-	adrp	x3, .LANCHOR75
+	adrp	x0, .LANCHOR101
+	adrp	x2, .LANCHOR78
+	adrp	x3, .LANCHOR77
 	mov	w1, 16
-	strh	w1, [x0, #:lo12:.LANCHOR99]
-	adrp	x10, .LANCHOR94
-	ldrb	w0, [x2, #:lo12:.LANCHOR76]
-	adrp	x8, .LANCHOR96
-	ldrh	w1, [x3, #:lo12:.LANCHOR75]
-	adrp	x7, .LANCHOR98
-	adrp	x6, .LANCHOR79
+	strh	w1, [x0, #:lo12:.LANCHOR101]
+	adrp	x10, .LANCHOR96
+	ldrb	w0, [x2, #:lo12:.LANCHOR78]
+	adrp	x8, .LANCHOR98
+	ldrh	w1, [x3, #:lo12:.LANCHOR77]
+	adrp	x7, .LANCHOR100
+	adrp	x6, .LANCHOR81
 	adrp	x5, .LANCHOR12
-	adrp	x4, .LANCHOR78
-	str	xzr, [x10, #:lo12:.LANCHOR94]
-	str	xzr, [x8, #:lo12:.LANCHOR96]
+	adrp	x4, .LANCHOR80
+	str	xzr, [x10, #:lo12:.LANCHOR96]
+	str	xzr, [x8, #:lo12:.LANCHOR98]
 	adrp	x28, .LANCHOR7
 	mul	w1, w0, w1
 	mov	w0, 32768
-	str	xzr, [x7, #:lo12:.LANCHOR98]
-	str	xzr, [x6, #:lo12:.LANCHOR79]
+	str	xzr, [x7, #:lo12:.LANCHOR100]
+	str	xzr, [x6, #:lo12:.LANCHOR81]
 	str	xzr, [x5, #:lo12:.LANCHOR12]
 	sdiv	w0, w0, w1
-	str	xzr, [x4, #:lo12:.LANCHOR78]
-	strh	wzr, [x24, #:lo12:.LANCHOR93]
-	strh	wzr, [x23, #:lo12:.LANCHOR95]
-	strh	wzr, [x22, #:lo12:.LANCHOR97]
+	str	xzr, [x4, #:lo12:.LANCHOR80]
+	strh	wzr, [x24, #:lo12:.LANCHOR95]
+	strh	wzr, [x23, #:lo12:.LANCHOR97]
+	strh	wzr, [x22, #:lo12:.LANCHOR99]
 	sxth	w0, w0
 	str	w0, [x29, 188]
-	ldr	x0, [x25, #:lo12:.LANCHOR100]
-	strh	wzr, [x21, #:lo12:.LANCHOR88]
-	strh	wzr, [x20, #:lo12:.LANCHOR90]
-	strh	wzr, [x19, #:lo12:.LANCHOR86]
+	ldr	x0, [x25, #:lo12:.LANCHOR102]
+	strh	wzr, [x21, #:lo12:.LANCHOR90]
+	strh	wzr, [x20, #:lo12:.LANCHOR92]
+	strh	wzr, [x19, #:lo12:.LANCHOR88]
 	strh	wzr, [x0, 146]
 	ldrsh	w26, [x0, 134]
 	add	x0, x27, :lo12:.LANCHOR6
-	adrp	x27, .LC84
-	add	x27, x27, :lo12:.LC84
+	adrp	x27, .LC88
+	add	x27, x27, :lo12:.LC88
 	stp	x3, x2, [x29, 104]
 	stp	x4, x5, [x29, 120]
 	stp	x6, x7, [x29, 136]
 	stp	x8, x10, [x29, 152]
 	str	x0, [x29, 176]
-.L1382:
+.L1406:
 	ldr	x0, [x29, 176]
 	ldrh	w0, [x0]
 	cmp	w26, w0
-	blt	.L1398
-	ldr	x0, [x25, #:lo12:.LANCHOR100]
-	ldrh	w1, [x24, #:lo12:.LANCHOR93]
+	blt	.L1422
+	ldr	x0, [x25, #:lo12:.LANCHOR102]
+	ldrh	w1, [x24, #:lo12:.LANCHOR95]
 	ldp	x25, x26, [sp, 64]
 	strh	w1, [x0, 114]
-	ldrh	w1, [x23, #:lo12:.LANCHOR95]
+	ldrh	w1, [x23, #:lo12:.LANCHOR97]
 	strh	w1, [x0, 118]
-	ldrh	w1, [x22, #:lo12:.LANCHOR97]
+	ldrh	w1, [x22, #:lo12:.LANCHOR99]
 	strh	w1, [x0, 116]
-	ldrh	w1, [x21, #:lo12:.LANCHOR88]
+	ldrh	w1, [x21, #:lo12:.LANCHOR90]
 	strh	w1, [x0, 122]
-	ldrh	w1, [x20, #:lo12:.LANCHOR90]
+	ldrh	w1, [x20, #:lo12:.LANCHOR92]
 	strh	w1, [x0, 120]
-	ldrh	w1, [x19, #:lo12:.LANCHOR86]
+	ldrh	w1, [x19, #:lo12:.LANCHOR88]
 	strh	w1, [x0, 124]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -8044,28 +8239,28 @@ zftl_sblk_list_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L1398:
+.L1422:
 	ldr	x4, [x28, #:lo12:.LANCHOR7]
 	sxtw	x2, w26
 	add	x4, x4, x2, lsl 2
 	ldrb	w6, [x4, 3]
-	cbz	w6, .L1399
+	cbz	w6, .L1423
 	ldr	x0, [x29, 112]
 	mov	w1, 0
-	ldr	x7, [x25, #:lo12:.LANCHOR100]
-	ldrb	w8, [x0, #:lo12:.LANCHOR76]
+	ldr	x7, [x25, #:lo12:.LANCHOR102]
+	ldrb	w8, [x0, #:lo12:.LANCHOR78]
 	ldr	x0, [x29, 104]
-	ldrh	w10, [x0, #:lo12:.LANCHOR75]
+	ldrh	w10, [x0, #:lo12:.LANCHOR77]
 	mov	w0, 0
-.L1384:
+.L1408:
 	cmp	w1, w8
-	blt	.L1387
-	cbz	w0, .L1388
+	blt	.L1411
+	cbz	w0, .L1412
 	mov	w1, 32768
 	sdiv	w0, w1, w0
 	add	w0, w0, 1
 	sxth	w0, w0
-.L1383:
+.L1407:
 	ldr	x3, [x29, 168]
 	mov	w1, 6
 	smull	x1, w26, w1
@@ -8080,44 +8275,44 @@ zftl_sblk_list_init:
 	and	w0, w1, 224
 	cmp	w0, 32
 	ccmp	w0, w5, 4, ne
-	beq	.L1389
+	beq	.L1413
 	adrp	x5, .LANCHOR10
 	ldr	x5, [x5, #:lo12:.LANCHOR10]
 	ldrh	w6, [x5, 16]
 	cmp	w26, w6
-	beq	.L1389
+	beq	.L1413
 	ldrh	w6, [x5, 48]
 	cmp	w26, w6
-	beq	.L1389
+	beq	.L1413
 	ldrh	w5, [x5, 80]
 	cmp	w26, w5
-	beq	.L1389
+	beq	.L1413
 	cmp	w0, 64
-	bne	.L1390
+	bne	.L1414
 	ldr	x0, [x29, 128]
-	add	x2, x21, :lo12:.LANCHOR88
+	add	x2, x21, :lo12:.LANCHOR90
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR12
-.L1402:
+.L1426:
 	bl	_insert_data_list
-.L1389:
+.L1413:
 	add	w3, w26, 1
 	sxth	w26, w3
-	b	.L1382
-.L1387:
+	b	.L1406
+.L1411:
 	asr	w5, w6, w1
-	tbnz	x5, 0, .L1385
+	tbnz	x5, 0, .L1409
 	add	w0, w10, w0
 	sxth	w0, w0
-.L1386:
+.L1410:
 	add	w1, w1, 1
-	b	.L1384
-.L1385:
+	b	.L1408
+.L1409:
 	ldrh	w5, [x7, 146]
 	add	w5, w5, 1
 	strh	w5, [x7, 146]
-	b	.L1386
-.L1388:
+	b	.L1410
+.L1412:
 	ldrb	w1, [x4, 2]
 	mov	w5, -1
 	orr	w1, w1, -32
@@ -8125,75 +8320,75 @@ zftl_sblk_list_init:
 	adrp	x1, .LANCHOR9
 	ldr	x1, [x1, #:lo12:.LANCHOR9]
 	strh	w5, [x1, x2, lsl 1]
-	b	.L1383
-.L1399:
+	b	.L1407
+.L1423:
 	ldr	w0, [x29, 188]
-	b	.L1383
-.L1390:
+	b	.L1407
+.L1414:
 	cmp	w0, 96
-	bne	.L1391
+	bne	.L1415
 	ldr	x0, [x29, 136]
-	add	x2, x19, :lo12:.LANCHOR86
+	add	x2, x19, :lo12:.LANCHOR88
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR79
-	b	.L1402
-.L1391:
+	add	x0, x0, :lo12:.LANCHOR81
+	b	.L1426
+.L1415:
 	cmp	w0, 160
-	bne	.L1392
+	bne	.L1416
 	ldr	x0, [x29, 120]
-	add	x2, x20, :lo12:.LANCHOR90
+	add	x2, x20, :lo12:.LANCHOR92
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR78
-	b	.L1402
-.L1392:
-	cbnz	w0, .L1389
+	add	x0, x0, :lo12:.LANCHOR80
+	b	.L1426
+.L1416:
+	cbnz	w0, .L1413
 	adrp	x0, .LANCHOR9
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w2, [x0, x2, lsl 1]
-	cbz	w2, .L1393
+	cbz	w2, .L1417
 	str	x4, [x29, 96]
 	mov	w1, w26
 	mov	x0, x27
 	bl	printf
 	ldr	x4, [x29, 96]
 	ldrb	w0, [x4, 2]
-	tbz	x0, 4, .L1394
+	tbz	x0, 4, .L1418
 	mov	w1, 5
-.L1401:
+.L1425:
 	bfi	w0, w1, 5, 3
 	strb	w0, [x4, 2]
 	mov	w2, 0
 	mov	w1, 1
 	mov	w0, w26
 	bl	gc_add_sblk
-	b	.L1389
-.L1394:
+	b	.L1413
+.L1418:
 	mov	w1, 2
-	b	.L1401
-.L1393:
+	b	.L1425
+.L1417:
 	ands	w1, w1, 24
-	bne	.L1396
+	bne	.L1420
 	ldr	x0, [x29, 160]
-	add	x2, x24, :lo12:.LANCHOR93
+	add	x2, x24, :lo12:.LANCHOR95
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR94
-.L1403:
+	add	x0, x0, :lo12:.LANCHOR96
+.L1427:
 	bl	_insert_free_list
-	b	.L1389
-.L1396:
+	b	.L1413
+.L1420:
 	cmp	w1, 16
-	bne	.L1397
+	bne	.L1421
 	ldr	x0, [x29, 152]
-	add	x2, x23, :lo12:.LANCHOR95
+	add	x2, x23, :lo12:.LANCHOR97
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR96
-	b	.L1403
-.L1397:
+	add	x0, x0, :lo12:.LANCHOR98
+	b	.L1427
+.L1421:
 	ldr	x0, [x29, 144]
-	add	x2, x22, :lo12:.LANCHOR97
+	add	x2, x22, :lo12:.LANCHOR99
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR98
-	b	.L1403
+	add	x0, x0, :lo12:.LANCHOR100
+	b	.L1427
 	.size	zftl_sblk_list_init, .-zftl_sblk_list_init
 	.section	.text.ftl_open_sblk_init,"ax",@progbits
 	.align	2
@@ -8203,19 +8398,19 @@ ftl_open_sblk_init:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR76
+	adrp	x20, .LANCHOR78
 	stp	x21, x22, [sp, 32]
 	mov	x19, x0
 	stp	x23, x24, [sp, 48]
-	adrp	x21, .LC72
-	adrp	x23, .LANCHOR83
+	adrp	x21, .LC76
+	adrp	x23, .LANCHOR85
 	mov	w22, w1
-	add	x23, x23, :lo12:.LANCHOR83
-	add	x20, x20, :lo12:.LANCHOR76
-	add	x21, x21, :lo12:.LC72
+	add	x23, x23, :lo12:.LANCHOR85
+	add	x20, x20, :lo12:.LANCHOR78
+	add	x21, x21, :lo12:.LC76
 	stp	x25, x26, [sp, 64]
-.L1405:
-.L1408:
+.L1429:
+.L1432:
 	mov	w0, w22
 	bl	ftl_alloc_sblk
 	mov	w1, 0
@@ -8235,18 +8430,18 @@ ftl_open_sblk_init:
 	strh	w0, [x19, 6]
 	strh	wzr, [x19, 10]
 	strb	w22, [x19, 4]
-	beq	.L1409
+	beq	.L1433
 	ldrb	w0, [x20]
 	mul	w0, w1, w0
 	and	w0, w0, 65535
-.L1406:
+.L1430:
 	ldrb	w2, [x20]
 	adrp	x26, .LANCHOR9
 	strh	w0, [x19, 12]
 	ubfiz	x25, x24, 1, 16
 	mul	w2, w2, w1
-	adrp	x1, .LANCHOR113
-	ldr	x3, [x1, #:lo12:.LANCHOR113]
+	adrp	x1, .LANCHOR109
+	ldr	x3, [x1, #:lo12:.LANCHOR109]
 	mov	w1, 255
 	lsl	w2, w2, 2
 	add	x0, x3, x0, uxth 2
@@ -8255,7 +8450,7 @@ ftl_open_sblk_init:
 	ldrh	w1, [x19, 6]
 	strh	w1, [x0, x25]
 	ldrb	w0, [x19, 9]
-	cbnz	w0, .L1404
+	cbnz	w0, .L1428
 	mov	w1, w24
 	mov	x0, x21
 	bl	printf
@@ -8264,11 +8459,11 @@ ftl_open_sblk_init:
 	strh	w1, [x0, x25]
 	mov	w0, 7
 	strb	w0, [x19, 4]
-	b	.L1408
-.L1409:
+	b	.L1432
+.L1433:
 	mov	w0, 0
-	b	.L1406
-.L1404:
+	b	.L1430
+.L1428:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -8291,26 +8486,26 @@ pm_free_sblk:
 	stp	x25, x26, [sp, 64]
 	cmp	w0, 128
 	stp	x27, x28, [sp, 80]
-	bls	.L1412
+	bls	.L1436
 	adrp	x1, .LANCHOR147
 	adrp	x0, .LC0
 	mov	w2, 78
 	add	x1, x1, :lo12:.LANCHOR147
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1412:
+.L1436:
 	add	x28, x29, 112
 	mov	w2, 256
 	mov	w1, 0
 	mov	x0, x28
 	bl	ftl_memset
-	adrp	x23, .LANCHOR101
-	adrp	x5, .LANCHOR100
-	adrp	x0, .LANCHOR102
+	adrp	x23, .LANCHOR67
+	adrp	x5, .LANCHOR102
+	adrp	x0, .LANCHOR66
 	mov	w2, 21
-	ldrb	w12, [x23, #:lo12:.LANCHOR101]
-	ldr	x7, [x5, #:lo12:.LANCHOR100]
-	ldrh	w11, [x0, #:lo12:.LANCHOR102]
+	ldrb	w12, [x23, #:lo12:.LANCHOR67]
+	ldr	x7, [x5, #:lo12:.LANCHOR102]
+	ldrh	w11, [x0, #:lo12:.LANCHOR66]
 	ldrh	w13, [x20, #:lo12:.LANCHOR146]
 	add	x4, x7, 704
 	sub	w0, w2, w11
@@ -8320,26 +8515,26 @@ pm_free_sblk:
 	sub	w2, w2, #1
 	add	x1, x1, 176
 	add	x1, x7, x1, lsl 2
-.L1413:
+.L1437:
 	cmp	x4, x1
-	bne	.L1417
-	adrp	x24, .LANCHOR76
-	adrp	x25, .LANCHOR83
+	bne	.L1441
+	adrp	x24, .LANCHOR78
+	adrp	x25, .LANCHOR85
 	adrp	x26, .LANCHOR14
-	adrp	x27, .LC85
-	ldrb	w22, [x24, #:lo12:.LANCHOR76]
+	adrp	x27, .LC89
+	ldrb	w22, [x24, #:lo12:.LANCHOR78]
 	add	x20, x20, :lo12:.LANCHOR146
-	ldrh	w0, [x25, #:lo12:.LANCHOR83]
+	ldrh	w0, [x25, #:lo12:.LANCHOR85]
 	add	x26, x26, :lo12:.LANCHOR14
-	add	x27, x27, :lo12:.LC85
+	add	x27, x27, :lo12:.LC89
 	mov	w19, 0
 	str	wzr, [x29, 108]
 	mul	w22, w22, w0
 	and	w22, w22, 65535
-.L1418:
+.L1442:
 	ldrh	w0, [x20]
 	cmp	w0, w19
-	bhi	.L1424
+	bhi	.L1448
 	ldr	w0, [x29, 108]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -8348,7 +8543,7 @@ pm_free_sblk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 368
 	ret
-.L1417:
+.L1441:
 	ldr	w0, [x4]
 	add	x8, x7, 416
 	mov	x3, 0
@@ -8356,47 +8551,47 @@ pm_free_sblk:
 	and	w0, w0, w2
 	udiv	w0, w0, w12
 	and	w0, w0, 65535
-.L1414:
+.L1438:
 	cmp	w13, w3, uxth
-	bhi	.L1416
+	bhi	.L1440
 	add	x4, x4, 4
-	b	.L1413
-.L1416:
+	b	.L1437
+.L1440:
 	ldrh	w10, [x8]
 	cmp	w10, w0
-	bne	.L1415
+	bne	.L1439
 	ldrh	w10, [x28, x3, lsl 1]
 	add	w10, w10, 1
 	strh	w10, [x28, x3, lsl 1]
-.L1415:
+.L1439:
 	add	x3, x3, 1
 	add	x8, x8, 2
-	b	.L1414
-.L1424:
-	ldr	x1, [x5, #:lo12:.LANCHOR100]
+	b	.L1438
+.L1448:
+	ldr	x1, [x5, #:lo12:.LANCHOR102]
 	sxtw	x21, w19
 	add	x0, x21, 208
-	ldrb	w2, [x23, #:lo12:.LANCHOR101]
+	ldrb	w2, [x23, #:lo12:.LANCHOR67]
 	ldrh	w3, [x1, x0, lsl 1]
 	ldrh	w0, [x1, 692]
 	sdiv	w0, w0, w2
 	cmp	w0, w3
-	bne	.L1419
-	ldrb	w0, [x24, #:lo12:.LANCHOR76]
-	ldrh	w2, [x25, #:lo12:.LANCHOR83]
+	bne	.L1443
+	ldrb	w0, [x24, #:lo12:.LANCHOR78]
+	ldrh	w2, [x25, #:lo12:.LANCHOR85]
 	mul	w0, w0, w2
 	strh	w0, [x28, x21, lsl 1]
-.L1419:
+.L1443:
 	ldrh	w0, [x28, x21, lsl 1]
 	cmp	w22, w0
-	bls	.L1420
-	cbnz	w0, .L1425
-.L1422:
+	bls	.L1444
+	cbnz	w0, .L1449
+.L1446:
 	mov	w0, 65535
 	cmp	w3, w0
-	beq	.L1421
+	beq	.L1445
 	ldr	w0, [x26]
-	tbz	x0, 12, .L1423
+	tbz	x0, 12, .L1447
 	ldrh	w4, [x1, 688]
 	mov	w2, 0
 	str	x5, [x29, 96]
@@ -8404,30 +8599,30 @@ pm_free_sblk:
 	mov	x0, x27
 	bl	printf
 	ldr	x5, [x29, 96]
-.L1423:
-	ldr	x0, [x5, #:lo12:.LANCHOR100]
+.L1447:
+	ldr	x0, [x5, #:lo12:.LANCHOR102]
 	add	x21, x21, 208
 	str	x5, [x29, 96]
 	ldrh	w0, [x0, x21, lsl 1]
 	bl	ftl_free_sblk
 	ldr	x5, [x29, 96]
 	mov	w1, -1
-	ldr	x0, [x5, #:lo12:.LANCHOR100]
+	ldr	x0, [x5, #:lo12:.LANCHOR102]
 	strh	w1, [x0, x21, lsl 1]
 	ldrh	w1, [x0, 688]
 	sub	w1, w1, #1
 	strh	w1, [x0, 688]
-	b	.L1421
-.L1420:
-	cbz	w0, .L1422
-.L1421:
+	b	.L1445
+.L1444:
+	cbz	w0, .L1446
+.L1445:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1418
-.L1425:
+	b	.L1442
+.L1449:
 	mov	w22, w0
 	str	w19, [x29, 108]
-	b	.L1421
+	b	.L1445
 	.size	pm_free_sblk, .-pm_free_sblk
 	.section	.text.ftl_memcpy,"ax",@progbits
 	.align	2
@@ -8447,20 +8642,20 @@ flash_info_data_init:
 	add	x29, sp, 0
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	str	x19, [sp, 16]
-	tbz	x0, 12, .L1432
+	tbz	x0, 12, .L1456
 	adrp	x2, .LANCHOR148
-	adrp	x0, .LC86
+	adrp	x0, .LC90
 	add	x2, x2, :lo12:.LANCHOR148
 	mov	w1, 105
-	add	x0, x0, :lo12:.LC86
+	add	x0, x0, :lo12:.LC90
 	bl	printf
-.L1432:
-	adrp	x19, .LANCHOR26
+.L1456:
+	adrp	x19, .LANCHOR27
 	mov	w2, 2048
 	mov	w1, 0
-	ldr	x0, [x19, #:lo12:.LANCHOR26]
+	ldr	x0, [x19, #:lo12:.LANCHOR27]
 	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR26]
+	ldr	x0, [x19, #:lo12:.LANCHOR27]
 	mov	w1, 21321
 	movk	w1, 0x5359, lsl 16
 	mov	w2, 32
@@ -8470,15 +8665,15 @@ flash_info_data_init:
 	str	w1, [x0, -72]
 	mov	w1, 1
 	strh	w1, [x0, -64]
-	adrp	x1, .LANCHOR19
-	add	x1, x1, :lo12:.LANCHOR19
+	adrp	x1, .LANCHOR20
+	add	x1, x1, :lo12:.LANCHOR20
 	bl	ftl_memcpy
-	ldr	x0, [x19, #:lo12:.LANCHOR26]
+	ldr	x0, [x19, #:lo12:.LANCHOR27]
 	mov	w2, 32
 	ldr	x19, [sp, 16]
-	adrp	x1, .LANCHOR30
+	adrp	x1, .LANCHOR31
 	ldp	x29, x30, [sp], 32
-	add	x1, x1, :lo12:.LANCHOR30
+	add	x1, x1, :lo12:.LANCHOR31
 	add	x0, x0, 48
 	b	ftl_memcpy
 	.size	flash_info_data_init, .-flash_info_data_init
@@ -8488,15 +8683,15 @@ flash_info_data_init:
 	.type	ftl_memcpy32, %function
 ftl_memcpy32:
 	mov	x3, 0
-.L1438:
+.L1462:
 	cmp	w2, w3
-	bhi	.L1439
+	bhi	.L1463
 	ret
-.L1439:
+.L1463:
 	ldr	w4, [x1, x3, lsl 2]
 	str	w4, [x0, x3, lsl 2]
 	add	x3, x3, 1
-	b	.L1438
+	b	.L1462
 	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.ftl_memcmp,"ax",@progbits
 	.align	2
@@ -8537,42 +8732,42 @@ nandc_init:
 	mov	x19, x0
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
 	str	wzr, [x29, 56]
-	tbz	x0, 12, .L1444
+	tbz	x0, 12, .L1468
 	adrp	x1, .LANCHOR149
-	adrp	x0, .LC87
+	adrp	x0, .LC91
 	mov	x2, x19
 	add	x1, x1, :lo12:.LANCHOR149
-	add	x0, x0, :lo12:.LC87
+	add	x0, x0, :lo12:.LC91
 	bl	printf
-.L1444:
-	adrp	x20, .LANCHOR27
+.L1468:
+	adrp	x20, .LANCHOR28
 	mov	w0, 6
 	ldr	w2, [x19, 352]
 	mov	w1, 12336
-	strb	w0, [x20, #:lo12:.LANCHOR27]
+	strb	w0, [x20, #:lo12:.LANCHOR28]
 	adrp	x0, .LANCHOR13
 	movk	w1, 0x5638, lsl 16
 	mov	x22, x0
 	str	x19, [x0, #:lo12:.LANCHOR13]
 	cmp	w2, w1
-	bne	.L1445
+	bne	.L1469
 	mov	w0, 8
-	strb	w0, [x20, #:lo12:.LANCHOR27]
-.L1445:
+	strb	w0, [x20, #:lo12:.LANCHOR28]
+.L1469:
 	ldr	w1, [x19, 128]
 	mov	w0, 12336
 	movk	w0, 0x5639, lsl 16
 	cmp	w1, w0
-	bne	.L1446
+	bne	.L1470
 	mov	w0, 9
-	strb	w0, [x20, #:lo12:.LANCHOR27]
-.L1446:
-	ldrb	w0, [x20, #:lo12:.LANCHOR27]
+	strb	w0, [x20, #:lo12:.LANCHOR28]
+.L1470:
+	ldrb	w0, [x20, #:lo12:.LANCHOR28]
 	cmp	w0, 9
-	adrp	x0, .LANCHOR44
-	bne	.L1447
+	adrp	x0, .LANCHOR45
+	bne	.L1471
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR44]
+	strb	w1, [x0, #:lo12:.LANCHOR45]
 	ldr	w0, [x29, 56]
 	mov	w1, 2
 	orr	w0, w0, 256
@@ -8595,37 +8790,37 @@ nandc_init:
 	mov	w0, 39
 	str	w0, [x19, 84]
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1449
+	tbz	x0, 12, .L1473
 	ldr	w1, [x19]
 	ldr	w2, [x19, 8]
 	ldr	w3, [x19, 80]
 	ldr	w4, [x19, 84]
 	ldr	w5, [x19, 88]
-.L1462:
-	adrp	x0, .LC88
-	add	x0, x0, :lo12:.LC88
+.L1486:
+	adrp	x0, .LC92
+	add	x0, x0, :lo12:.LC92
 	bl	printf
-.L1449:
-	adrp	x0, .LANCHOR45
+.L1473:
+	adrp	x0, .LANCHOR46
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR45]
-	adrp	x0, .LANCHOR47
-	strh	wzr, [x0, #:lo12:.LANCHOR47]
-	adrp	x0, .LANCHOR43
-	strb	wzr, [x0, #:lo12:.LANCHOR43]
+	strb	w1, [x0, #:lo12:.LANCHOR46]
+	adrp	x0, .LANCHOR48
+	strh	wzr, [x0, #:lo12:.LANCHOR48]
+	adrp	x0, .LANCHOR44
+	strb	wzr, [x0, #:lo12:.LANCHOR44]
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1443
-	ldrb	w1, [x20, #:lo12:.LANCHOR27]
-	adrp	x0, .LC89
-	add	x0, x0, :lo12:.LC89
+	tbz	x0, 12, .L1467
+	ldrb	w1, [x20, #:lo12:.LANCHOR28]
+	adrp	x0, .LC93
+	add	x0, x0, :lo12:.LC93
 	bl	printf
-.L1443:
+.L1467:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1447:
-	strb	wzr, [x0, #:lo12:.LANCHOR44]
+.L1471:
+	strb	wzr, [x0, #:lo12:.LANCHOR45]
 	mov	w1, 1
 	ldr	w0, [x29, 56]
 	orr	w0, w0, 256
@@ -8649,17 +8844,17 @@ nandc_init:
 	str	w0, [x19, 308]
 	mov	w0, 2048
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR46
-	str	x0, [x1, #:lo12:.LANCHOR46]
+	adrp	x1, .LANCHOR47
+	str	x0, [x1, #:lo12:.LANCHOR47]
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1449
+	tbz	x0, 12, .L1473
 	ldr	x0, [x22, #:lo12:.LANCHOR13]
 	ldr	w1, [x0]
 	ldr	w2, [x0, 344]
 	ldr	w3, [x0, 304]
 	ldr	w4, [x0, 308]
 	ldr	w5, [x0, 312]
-	b	.L1462
+	b	.L1486
 	.size	nandc_init, .-nandc_init
 	.section	.text.buf_init,"ax",@progbits
 	.align	2
@@ -8676,7 +8871,7 @@ buf_init:
 	adrp	x22, .LANCHOR123
 	add	x22, x22, :lo12:.LANCHOR123
 	mov	w21, 0
-.L1464:
+.L1488:
 	and	w0, w21, 255
 	strb	w0, [x19, 1]
 	add	w1, w0, 1
@@ -8694,7 +8889,7 @@ buf_init:
 	bl	ftl_malloc
 	str	x0, [x19, -40]
 	cmp	w21, 32
-	bne	.L1464
+	bne	.L1488
 	add	x0, x20, :lo12:.LANCHOR50
 	mov	w1, -1
 	strb	w1, [x0, 1984]
@@ -8713,11 +8908,11 @@ buf_init:
 	.type	gc_init, %function
 gc_init:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR74
-	mov	w2, 328
+	adrp	x0, .LANCHOR76
+	mov	w2, 344
 	mov	w1, 0
 	add	x29, sp, 0
-	strb	wzr, [x0, #:lo12:.LANCHOR74]
+	strb	wzr, [x0, #:lo12:.LANCHOR76]
 	adrp	x0, .LANCHOR150
 	stp	x19, x20, [sp, 16]
 	adrp	x20, .LANCHOR63
@@ -8725,79 +8920,79 @@ gc_init:
 	adrp	x0, .LANCHOR151
 	add	x19, x20, :lo12:.LANCHOR63
 	str	wzr, [x0, #:lo12:.LANCHOR151]
-	adrp	x0, .LANCHOR85
-	strh	wzr, [x0, #:lo12:.LANCHOR85]
+	adrp	x0, .LANCHOR87
+	strh	wzr, [x0, #:lo12:.LANCHOR87]
 	mov	x0, x19
 	bl	ftl_memset
 	str	xzr, [x19, 8]
 	mov	w0, -1
 	strh	w0, [x20, #:lo12:.LANCHOR63]
-	adrp	x0, .LANCHOR83
-	adrp	x4, .LANCHOR92
-	adrp	x20, .LANCHOR75
-	ldrh	w1, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR85
+	adrp	x4, .LANCHOR94
+	adrp	x20, .LANCHOR77
+	ldrh	w1, [x0, #:lo12:.LANCHOR85]
 	lsr	w2, w1, 1
 	lsr	w0, w1, 2
 	strh	w2, [x19, 38]
-	adrp	x2, .LANCHOR84
+	adrp	x2, .LANCHOR86
 	strh	w0, [x19, 36]
-	adrp	x19, .LANCHOR76
-	strh	wzr, [x2, #:lo12:.LANCHOR84]
-	adrp	x2, .LANCHOR80
-	ldrb	w3, [x19, #:lo12:.LANCHOR76]
-	strh	wzr, [x2, #:lo12:.LANCHOR80]
-	adrp	x2, .LANCHOR81
-	strh	wzr, [x2, #:lo12:.LANCHOR81]
+	adrp	x19, .LANCHOR78
+	strh	wzr, [x2, #:lo12:.LANCHOR86]
+	adrp	x2, .LANCHOR82
+	ldrb	w3, [x19, #:lo12:.LANCHOR78]
+	strh	wzr, [x2, #:lo12:.LANCHOR82]
+	adrp	x2, .LANCHOR83
+	strh	wzr, [x2, #:lo12:.LANCHOR83]
 	mul	w2, w1, w3
 	and	w2, w2, 65535
 	sub	w5, w2, #32
-	strh	w5, [x4, #:lo12:.LANCHOR92]
-	adrp	x4, .LANCHOR89
-	strh	w2, [x4, #:lo12:.LANCHOR89]
-	adrp	x2, .LANCHOR82
-	strh	w1, [x2, #:lo12:.LANCHOR82]
+	strh	w5, [x4, #:lo12:.LANCHOR94]
+	adrp	x4, .LANCHOR91
+	strh	w2, [x4, #:lo12:.LANCHOR91]
+	adrp	x2, .LANCHOR84
+	strh	w1, [x2, #:lo12:.LANCHOR84]
 	adrp	x1, .LANCHOR62
 	strh	w0, [x1, #:lo12:.LANCHOR62]
-	ldrh	w0, [x20, #:lo12:.LANCHOR75]
+	ldrh	w0, [x20, #:lo12:.LANCHOR77]
 	mul	w0, w0, w3
 	lsl	w0, w0, 2
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR152
 	str	x0, [x1, #:lo12:.LANCHOR152]
-	ldrb	w1, [x19, #:lo12:.LANCHOR76]
-	ldrh	w0, [x20, #:lo12:.LANCHOR75]
+	ldrb	w1, [x19, #:lo12:.LANCHOR78]
+	ldrh	w0, [x20, #:lo12:.LANCHOR77]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR153
 	str	x0, [x1, #:lo12:.LANCHOR153]
-	ldrh	w1, [x20, #:lo12:.LANCHOR75]
-	ldrb	w0, [x19, #:lo12:.LANCHOR76]
+	ldrh	w1, [x20, #:lo12:.LANCHOR77]
+	ldrb	w0, [x19, #:lo12:.LANCHOR78]
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR72
-	str	x0, [x1, #:lo12:.LANCHOR72]
-	ldrb	w1, [x19, #:lo12:.LANCHOR76]
-	ldrh	w0, [x20, #:lo12:.LANCHOR75]
+	adrp	x1, .LANCHOR74
+	str	x0, [x1, #:lo12:.LANCHOR74]
+	ldrb	w1, [x19, #:lo12:.LANCHOR78]
+	ldrh	w0, [x20, #:lo12:.LANCHOR77]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR66
-	str	x0, [x1, #:lo12:.LANCHOR66]
-	ldrb	w1, [x19, #:lo12:.LANCHOR76]
-	ldrh	w0, [x20, #:lo12:.LANCHOR75]
+	adrp	x1, .LANCHOR68
+	str	x0, [x1, #:lo12:.LANCHOR68]
+	ldrb	w1, [x19, #:lo12:.LANCHOR78]
+	ldrh	w0, [x20, #:lo12:.LANCHOR77]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR154
 	ldp	x19, x20, [sp, 16]
 	str	x0, [x1, #:lo12:.LANCHOR154]
-	adrp	x0, .LANCHOR87
-	adrp	x1, .LANCHOR77
+	adrp	x0, .LANCHOR89
+	adrp	x1, .LANCHOR79
 	ldp	x29, x30, [sp], 32
-	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	ldrh	w0, [x0, #:lo12:.LANCHOR89]
 	lsr	w0, w0, 2
-	strh	w0, [x1, #:lo12:.LANCHOR77]
+	strh	w0, [x1, #:lo12:.LANCHOR79]
 	ret
 	.size	gc_init, .-gc_init
 	.section	.text.ftl_free,"ax",@progbits
@@ -8816,18 +9011,18 @@ js_hash:
 	mov	w0, 42982
 	mov	x3, 0
 	movk	w0, 0x47c6, lsl 16
-.L1471:
+.L1495:
 	cmp	w1, w3
-	bhi	.L1472
+	bhi	.L1496
 	ret
-.L1472:
+.L1496:
 	lsr	w2, w0, 2
 	ldrb	w5, [x4, x3]
 	add	w2, w2, w0, lsl 5
 	add	x3, x3, 1
 	add	w2, w2, w5
 	eor	w0, w0, w2
-	b	.L1471
+	b	.L1495
 	.size	js_hash, .-js_hash
 	.section	.text.timer_get_time,"ax",@progbits
 	.align	2
@@ -8876,67 +9071,67 @@ rknand_print_hex:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LC91
+	adrp	x21, .LC95
 	stp	x23, x24, [sp, 48]
 	mov	x22, x1
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LC90
+	adrp	x23, .LC94
 	mov	x26, x0
 	mov	w24, w2
 	uxtw	x25, w3
-	add	x23, x23, :lo12:.LC90
-	add	x21, x21, :lo12:.LC91
+	add	x23, x23, :lo12:.LC94
+	add	x21, x21, :lo12:.LC95
 	stp	x19, x20, [sp, 16]
 	str	x27, [sp, 80]
 	mov	x19, 0
 	mov	w20, 0
-	adrp	x27, .LC92
-.L1479:
+	adrp	x27, .LC96
+.L1503:
 	cmp	x25, x19
-	bne	.L1485
+	bne	.L1509
 	ldp	x19, x20, [sp, 16]
-	adrp	x1, .LC92
+	adrp	x1, .LC96
 	ldp	x21, x22, [sp, 32]
-	add	x1, x1, :lo12:.LC92
+	add	x1, x1, :lo12:.LC96
 	ldp	x23, x24, [sp, 48]
-	adrp	x0, .LC93
+	adrp	x0, .LC97
 	ldp	x25, x26, [sp, 64]
-	add	x0, x0, :lo12:.LC93
+	add	x0, x0, :lo12:.LC97
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	printf
-.L1485:
-	cbnz	w20, .L1480
+.L1509:
+	cbnz	w20, .L1504
 	mov	w2, w19
 	mov	x1, x26
 	mov	x0, x23
 	bl	printf
-.L1480:
+.L1504:
 	cmp	w24, 4
-	bne	.L1481
+	bne	.L1505
 	ldr	w1, [x22, x19, lsl 2]
-.L1487:
+.L1511:
 	mov	x0, x21
 	add	w20, w20, 1
 	bl	printf
 	cmp	w20, 15
-	bls	.L1484
+	bls	.L1508
 	mov	w20, 0
-	add	x1, x27, :lo12:.LC92
-	adrp	x0, .LC93
-	add	x0, x0, :lo12:.LC93
+	add	x1, x27, :lo12:.LC96
+	adrp	x0, .LC97
+	add	x0, x0, :lo12:.LC97
 	bl	printf
-.L1484:
+.L1508:
 	add	x19, x19, 1
-	b	.L1479
-.L1481:
+	b	.L1503
+.L1505:
 	cmp	w24, 2
-	bne	.L1483
+	bne	.L1507
 	ldrsh	w1, [x22, x19, lsl 1]
-	b	.L1487
-.L1483:
+	b	.L1511
+.L1507:
 	ldrb	w1, [x22, x19]
-	b	.L1487
+	b	.L1511
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.hynix_get_read_retry_default,"ax",@progbits
 	.align	2
@@ -8945,10 +9140,10 @@ rknand_print_hex:
 hynix_get_read_retry_default:
 	stp	x29, x30, [sp, -96]!
 	mov	w8, w0
-	adrp	x0, .LANCHOR26
+	adrp	x0, .LANCHOR27
 	mov	w2, -83
 	add	x29, sp, 0
-	ldr	x7, [x0, #:lo12:.LANCHOR26]
+	ldr	x7, [x0, #:lo12:.LANCHOR27]
 	mov	w0, -84
 	stp	x19, x20, [sp, 16]
 	mov	w1, -82
@@ -8965,41 +9160,41 @@ hynix_get_read_retry_default:
 	strb	w2, [x7, 129]
 	strb	w1, [x7, 130]
 	strb	w0, [x7, 131]
-	bne	.L1489
+	bne	.L1513
 	mov	w0, -89
 	strb	w0, [x12, 16]
 	adrp	x0, .LANCHOR155+17
 	mov	w1, -9
 	strb	w1, [x0, #:lo12:.LANCHOR155+17]
-.L1553:
+.L1577:
 	mov	w23, 7
-	b	.L1596
-.L1489:
+	b	.L1620
+.L1513:
 	cmp	w8, 3
-	bne	.L1491
+	bne	.L1515
 	mov	x10, 0
-.L1492:
+.L1516:
 	sub	w0, w10, #80
 	strb	w0, [x6, x10]
 	add	x10, x10, 1
 	cmp	x10, 8
-	bne	.L1492
+	bne	.L1516
 	mov	w23, w10
-.L1490:
+.L1514:
 	sub	w0, w8, #1
 	cmp	w0, 1
-	bhi	.L1498
+	bhi	.L1522
 	adrp	x7, .LANCHOR18
-	adrp	x8, .LANCHOR29
+	adrp	x8, .LANCHOR30
 	add	x7, x7, :lo12:.LANCHOR18
-	add	x8, x8, :lo12:.LANCHOR29
+	add	x8, x8, :lo12:.LANCHOR30
 	mov	w5, 0
 	mov	w11, 55
-.L1499:
+.L1523:
 	ldrb	w0, [x7]
 	cmp	w0, w5
-	bhi	.L1505
-.L1506:
+	bhi	.L1529
+.L1530:
 	strb	w10, [x12, 1]
 	strb	w23, [x12, 2]
 	ldp	x19, x20, [sp, 16]
@@ -9009,9 +9204,9 @@ hynix_get_read_retry_default:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1491:
+.L1515:
 	cmp	w8, 4
-	bne	.L1493
+	bne	.L1517
 	mov	w3, -52
 	strb	w3, [x7, 128]
 	mov	w3, -65
@@ -9027,10 +9222,10 @@ hynix_get_read_retry_default:
 	strb	w3, [x7, 132]
 	strb	w1, [x7, 134]
 	strb	w0, [x7, 135]
-	b	.L1490
-.L1493:
+	b	.L1514
+.L1517:
 	cmp	w8, 5
-	bne	.L1494
+	bne	.L1518
 	mov	w0, 56
 	strb	w0, [x7, 128]
 	mov	w0, 57
@@ -9040,12 +9235,12 @@ hynix_get_read_retry_default:
 	strb	w0, [x7, 130]
 	mov	w0, 59
 	strb	w0, [x7, 131]
-.L1596:
+.L1620:
 	mov	w10, 4
-	b	.L1490
-.L1494:
+	b	.L1514
+.L1518:
 	cmp	w8, 6
-	bne	.L1495
+	bne	.L1519
 	mov	w0, 14
 	strb	w0, [x7, 128]
 	mov	w0, 15
@@ -9055,27 +9250,27 @@ hynix_get_read_retry_default:
 	strb	w0, [x7, 130]
 	mov	w0, 17
 	strb	w0, [x7, 131]
-	b	.L1596
-.L1495:
+	b	.L1620
+.L1519:
 	cmp	w8, 7
-	bne	.L1496
+	bne	.L1520
 	mov	x0, 0
-.L1497:
+.L1521:
 	sub	w1, w0, #80
 	strb	w1, [x6, x0]
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L1497
+	bne	.L1521
 	mov	w0, -44
 	mov	w23, 12
 	strb	w0, [x7, 136]
 	mov	w10, 10
 	mov	w0, -43
 	strb	w0, [x7, 137]
-	b	.L1490
-.L1496:
+	b	.L1514
+.L1520:
 	cmp	w8, 8
-	bne	.L1553
+	bne	.L1577
 	mov	w0, 6
 	strb	w0, [x7, 128]
 	mov	w0, 7
@@ -9087,8 +9282,8 @@ hynix_get_read_retry_default:
 	mov	w0, 10
 	mov	w10, 5
 	strb	w0, [x7, 132]
-	b	.L1490
-.L1505:
+	b	.L1514
+.L1529:
 	ldrb	w0, [x8, w5, sxtw]
 	mov	x1, 32
 	mov	w2, 160
@@ -9099,7 +9294,7 @@ hynix_get_read_retry_default:
 	ldr	x4, [x1, #:lo12:.LANCHOR13]
 	add	x2, x12, x2
 	add	x4, x4, x0
-.L1500:
+.L1524:
 	str	w11, [x4, 2056]
 	ldrb	w0, [x6, x3]
 	str	w0, [x4, 2052]
@@ -9109,15 +9304,15 @@ hynix_get_read_retry_default:
 	strb	w0, [x2, x3]
 	add	x3, x3, 1
 	cmp	w10, w3, uxtb
-	bhi	.L1500
+	bhi	.L1524
 	adrp	x3, .LANCHOR155
 	add	x3, x3, :lo12:.LANCHOR155
 	mov	x0, 0
-.L1503:
+.L1527:
 	add	x14, x2, x0
 	add	x13, x3, x0
 	mov	x1, 1
-.L1502:
+.L1526:
 	lsl	x4, x1, 2
 	lsl	x15, x1, 3
 	ldrb	w16, [x2, x0]
@@ -9126,10 +9321,10 @@ hynix_get_read_retry_default:
 	ldrb	w4, [x13, x4]
 	add	w4, w4, w16
 	strb	w4, [x14, x15]
-	bne	.L1502
+	bne	.L1526
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L1503
+	bne	.L1527
 	add	w5, w5, 1
 	strb	wzr, [x2, 16]
 	strb	wzr, [x2, 24]
@@ -9139,11 +9334,11 @@ hynix_get_read_retry_default:
 	strb	wzr, [x2, 48]
 	strb	wzr, [x2, 41]
 	strb	wzr, [x2, 49]
-	b	.L1499
-.L1498:
+	b	.L1523
+.L1522:
 	sub	w0, w8, #3
 	cmp	w0, 5
-	bhi	.L1506
+	bhi	.L1530
 	mul	w15, w23, w10
 	sub	w13, w10, #1
 	and	x13, x13, 255
@@ -9156,12 +9351,12 @@ hynix_get_read_retry_default:
 	lsl	w22, w14, 1
 	sbfiz	x21, x14, 1, 32
 	mov	w11, 0
-.L1507:
+.L1531:
 	ldrb	w0, [x19]
 	cmp	w0, w11
-	bls	.L1506
-	adrp	x0, .LANCHOR29
-	add	x0, x0, :lo12:.LANCHOR29
+	bls	.L1530
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w24, [x0, w11, sxtw]
 	mov	w0, w24
 	bl	zftl_flash_exit_slc_mode
@@ -9178,7 +9373,7 @@ hynix_get_read_retry_default:
 	str	w6, [x4, 2056]
 	bl	nandc_wait_flash_ready
 	cmp	w8, 8
-	bne	.L1508
+	bne	.L1532
 	mov	w0, 120
 	str	w0, [x4, 2056]
 	str	wzr, [x4, 2052]
@@ -9198,7 +9393,7 @@ hynix_get_read_retry_default:
 	str	wzr, [x4, 2052]
 	str	wzr, [x4, 2052]
 	str	w1, [x4, 2052]
-.L1599:
+.L1623:
 	str	w0, [x4, 2052]
 	mov	w0, 48
 	str	wzr, [x4, 2052]
@@ -9206,65 +9401,65 @@ hynix_get_read_retry_default:
 	bl	nandc_wait_flash_ready
 	cmp	w20, 1
 	ccmp	w8, 8, 4, hi
-	beq	.L1554
+	beq	.L1578
 	cmp	w8, 7
 	mov	w0, 32
 	mov	w1, 2
 	csel	w1, w1, w0, ne
-.L1515:
+.L1539:
 	adrp	x6, .LANCHOR156
 	mov	x2, 0
 	ldr	x0, [x6, #:lo12:.LANCHOR156]
-.L1516:
+.L1540:
 	ldr	w3, [x4, 2048]
 	strb	w3, [x0, x2]
 	add	x2, x2, 1
 	cmp	w1, w2, uxtb
-	bhi	.L1516
+	bhi	.L1540
 	cmp	w8, 8
-	bne	.L1517
+	bne	.L1541
 	mov	w1, 0
-.L1519:
+.L1543:
 	ldrb	w2, [x0]
 	cmp	w2, 50
-	beq	.L1518
+	beq	.L1542
 	ldrb	w2, [x0, 1]
 	cmp	w2, 5
-	beq	.L1518
+	beq	.L1542
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 255
 	cmp	w1, 8
-	bne	.L1519
-.L1520:
-	adrp	x0, .LC94
+	bne	.L1543
+.L1544:
+	adrp	x0, .LC98
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC94
+	add	x0, x0, :lo12:.LC98
 	bl	printf
-.L1522:
-	b	.L1522
-.L1508:
+.L1546:
+	b	.L1546
+.L1532:
 	mov	w0, 54
 	str	w0, [x4, 2056]
 	cmp	w8, 4
-	bne	.L1510
+	bne	.L1534
 	mov	w0, 64
 	str	w6, [x4, 2052]
 	str	w0, [x4, 2048]
 	mov	w0, 204
-.L1597:
+.L1621:
 	str	w0, [x4, 2052]
 	mov	w0, 77
-	b	.L1598
-.L1510:
+	b	.L1622
+.L1534:
 	cmp	w20, 1
-	bhi	.L1512
+	bhi	.L1536
 	ldrb	w0, [x7, 128]
 	str	w0, [x4, 2052]
 	mov	w0, 82
-.L1598:
+.L1622:
 	str	w0, [x4, 2048]
-.L1511:
+.L1535:
 	mov	w0, 22
 	str	w0, [x4, 2056]
 	mov	w0, 23
@@ -9277,185 +9472,185 @@ hynix_get_read_retry_default:
 	cmp	w8, 6
 	str	wzr, [x4, 2052]
 	str	wzr, [x4, 2052]
-	bne	.L1513
+	bne	.L1537
 	mov	w0, 31
 	str	w0, [x4, 2052]
-.L1514:
+.L1538:
 	mov	w0, 2
-	b	.L1599
-.L1512:
+	b	.L1623
+.L1536:
 	cmp	w8, 7
-	bne	.L1511
+	bne	.L1535
 	mov	w0, 174
 	str	w0, [x4, 2052]
 	str	wzr, [x4, 2048]
 	mov	w0, 176
-	b	.L1597
-.L1513:
+	b	.L1621
+.L1537:
 	str	wzr, [x4, 2052]
-	b	.L1514
-.L1554:
+	b	.L1538
+.L1578:
 	mov	w1, 16
-	b	.L1515
-.L1518:
+	b	.L1539
+.L1542:
 	cmp	w1, 6
-	bhi	.L1520
-.L1521:
+	bhi	.L1544
+.L1545:
 	ldr	x3, [x6, #:lo12:.LANCHOR156]
 	mov	x0, 0
-.L1531:
+.L1555:
 	cmp	w15, w0
-	bgt	.L1532
+	bgt	.L1556
 	ldr	x1, [x6, #:lo12:.LANCHOR156]
 	mov	w6, 8
 	add	x2, x1, x21
-.L1534:
+.L1558:
 	mov	x0, 0
-.L1533:
+.L1557:
 	ldrh	w16, [x2, x0, lsl 1]
 	mvn	w16, w16
 	strh	w16, [x2, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	w14, w0
-	bgt	.L1533
+	bgt	.L1557
 	add	x2, x2, x22, uxtw 1
 	subs	w6, w6, #1
-	bne	.L1534
+	bne	.L1558
 	mov	x6, x1
 	mov	w16, 0
 	mov	w26, 1
-.L1535:
+.L1559:
 	mov	w0, 0
 	mov	w2, 0
-.L1539:
+.L1563:
 	mov	x30, x6
 	lsl	w25, w26, w2
 	mov	w24, 16
 	mov	w17, 0
-.L1537:
+.L1561:
 	ldrh	w27, [x30]
 	add	x30, x30, x21
 	bics	wzr, w25, w27
 	cinc	w17, w17, eq
 	subs	w24, w24, #1
-	bne	.L1537
+	bne	.L1561
 	cmp	w17, 8
-	bls	.L1538
+	bls	.L1562
 	orr	w0, w0, w25
 	and	w0, w0, 65535
-.L1538:
+.L1562:
 	add	w2, w2, 1
 	cmp	w2, 16
-	bne	.L1539
+	bne	.L1563
 	strh	w0, [x6], 2
 	add	w16, w16, 1
 	cmp	w14, w16
-	bgt	.L1535
+	bgt	.L1559
 	mov	x0, 0
 	mov	w2, 0
-.L1542:
+.L1566:
 	ldr	w6, [x1, x0]
 	add	x0, x0, 4
 	cmp	w6, 0
 	cinc	w2, w2, eq
 	cmp	x0, 32
-	bne	.L1542
+	bne	.L1566
 	cmp	w2, 7
-	ble	.L1543
+	ble	.L1567
 	mov	w3, 1024
 	mov	w2, 1
-	adrp	x0, .LC95
-	add	x0, x0, :lo12:.LC95
+	adrp	x0, .LC99
+	add	x0, x0, :lo12:.LC99
 	bl	rknand_print_hex
-	adrp	x0, .LC94
+	adrp	x0, .LC98
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC94
+	add	x0, x0, :lo12:.LC98
 	bl	printf
-.L1544:
-	b	.L1544
-.L1517:
+.L1568:
+	b	.L1568
+.L1541:
 	cmp	w8, 7
-	bne	.L1523
+	bne	.L1547
 	mov	w1, 0
-.L1525:
+.L1549:
 	ldrb	w2, [x0]
 	cmp	w2, 12
-	beq	.L1524
+	beq	.L1548
 	ldrb	w2, [x0, 1]
 	cmp	w2, 10
-	beq	.L1524
+	beq	.L1548
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 255
 	cmp	w1, 8
-	bne	.L1525
-.L1526:
-	adrp	x0, .LC94
+	bne	.L1549
+.L1550:
+	adrp	x0, .LC98
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC94
+	add	x0, x0, :lo12:.LC98
 	bl	printf
-.L1527:
-	b	.L1527
-.L1524:
+.L1551:
+	b	.L1551
+.L1548:
 	cmp	w1, 6
-	bls	.L1521
-	b	.L1526
-.L1523:
+	bls	.L1545
+	b	.L1550
+.L1547:
 	cmp	w8, 6
-	bne	.L1521
+	bne	.L1545
 	mov	x1, 0
-.L1528:
+.L1552:
 	ldrb	w2, [x0, x1]
 	cmp	w2, 12
-	beq	.L1521
+	beq	.L1545
 	add	x2, x0, x1
 	ldrb	w2, [x2, 8]
 	cmp	w2, 4
-	beq	.L1521
+	beq	.L1545
 	add	x1, x1, 1
 	cmp	x1, 8
-	bne	.L1528
-	adrp	x0, .LC94
+	bne	.L1552
+	adrp	x0, .LC98
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC94
+	add	x0, x0, :lo12:.LC98
 	bl	printf
-.L1530:
-	b	.L1530
-.L1532:
+.L1554:
+	b	.L1554
+.L1556:
 	ldr	w1, [x4, 2048]
 	strb	w1, [x3, x0]
 	add	x0, x0, 1
-	b	.L1531
-.L1543:
+	b	.L1555
+.L1567:
 	cmp	w8, 6
-	beq	.L1556
+	beq	.L1580
 	cmp	w8, 7
-	beq	.L1557
+	beq	.L1581
 	cmp	w8, 8
 	mov	x1, 5
 	mov	x0, 8
 	csel	x0, x0, x1, ne
-.L1545:
+.L1569:
 	mov	x1, x5
 	mov	w5, 0
-.L1546:
+.L1570:
 	mov	x2, 0
-.L1547:
+.L1571:
 	ldrb	w6, [x3, x2]
 	strb	w6, [x1, x2]
 	add	x2, x2, 1
 	cmp	w10, w2, uxtb
-	bhi	.L1547
+	bhi	.L1571
 	add	w5, w5, 1
 	add	x3, x3, x13
 	add	x1, x1, x0
 	cmp	w23, w5
-	bgt	.L1546
+	bgt	.L1570
 	mov	w5, 255
 	str	w5, [x4, 2056]
 	bl	nandc_wait_flash_ready
 	cmp	w20, 1
-	bhi	.L1549
+	bhi	.L1573
 	mov	w0, 54
 	str	w0, [x4, 2056]
 	ldrb	w0, [x7, 128]
@@ -9470,40 +9665,40 @@ hynix_get_read_retry_default:
 	str	w5, [x4, 2052]
 	str	w5, [x4, 2052]
 	str	w5, [x4, 2052]
-.L1600:
+.L1624:
 	str	w0, [x4, 2056]
 	bl	nandc_wait_flash_ready
 	add	w11, w11, 1
 	and	w11, w11, 255
-	b	.L1507
-.L1556:
+	b	.L1531
+.L1580:
 	mov	x0, 4
-	b	.L1545
-.L1557:
+	b	.L1569
+.L1581:
 	mov	x0, 10
-	b	.L1545
-.L1549:
+	b	.L1569
+.L1573:
 	cmp	w8, 8
-	bne	.L1551
+	bne	.L1575
 	mov	w0, 190
-	b	.L1600
-.L1551:
+	b	.L1624
+.L1575:
 	mov	w0, 56
-	b	.L1600
+	b	.L1624
 	.size	hynix_get_read_retry_default, .-hynix_get_read_retry_default
 	.section	.text.flash_get_read_retry_tbl,"ax",@progbits
 	.align	2
 	.global	flash_get_read_retry_tbl
 	.type	flash_get_read_retry_tbl, %function
 flash_get_read_retry_tbl:
-	adrp	x0, .LANCHOR30+19
-	ldrb	w0, [x0, #:lo12:.LANCHOR30+19]
+	adrp	x0, .LANCHOR31+19
+	ldrb	w0, [x0, #:lo12:.LANCHOR31+19]
 	sub	w1, w0, #1
 	and	w1, w1, 255
 	cmp	w1, 7
-	bhi	.L1601
+	bhi	.L1625
 	b	hynix_get_read_retry_default
-.L1601:
+.L1625:
 	ret
 	.size	flash_get_read_retry_tbl, .-flash_get_read_retry_tbl
 	.section	.text.nandc_xfer_done,"ax",@progbits
@@ -9513,36 +9708,36 @@ flash_get_read_retry_tbl:
 nandc_xfer_done:
 	stp	x29, x30, [sp, -80]!
 	adrp	x0, .LANCHOR157
-	adrp	x1, .LANCHOR27
+	adrp	x1, .LANCHOR28
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR13
-	ldrb	w1, [x1, #:lo12:.LANCHOR27]
+	ldrb	w1, [x1, #:lo12:.LANCHOR28]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	cmp	w1, 9
 	strb	wzr, [x0, #:lo12:.LANCHOR157]
-	bne	.L1604
+	bne	.L1628
 	ldr	x20, [x19, #:lo12:.LANCHOR13]
 	mov	x24, x0
 	mov	w21, 0
 	ldr	w0, [x20, 16]
 	str	w0, [x29, 64]
 	ldr	w0, [x20, 48]
-	tbnz	x0, 1, .L1605
-	adrp	x22, .LC99
-	adrp	x23, .LC98
-	add	x22, x22, :lo12:.LC99
-	add	x23, x23, :lo12:.LC98
-.L1606:
+	tbnz	x0, 1, .L1629
+	adrp	x22, .LC103
+	adrp	x23, .LC102
+	add	x22, x22, :lo12:.LC103
+	add	x23, x23, :lo12:.LC102
+.L1630:
 	ldr	w0, [x29, 64]
-	tbnz	x0, 20, .L1609
+	tbnz	x0, 20, .L1633
 	ldr	x0, [x19, #:lo12:.LANCHOR13]
 	add	w21, w21, 1
 	tst	x21, 16777215
 	ldr	w0, [x0, 16]
 	str	w0, [x29, 64]
-	bne	.L1606
+	bne	.L1630
 	ldr	w2, [x29, 64]
 	mov	w1, w21
 	ldr	w3, [x20, 64]
@@ -9554,39 +9749,39 @@ nandc_xfer_done:
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1606
-.L1605:
-	adrp	x22, .LC97
-	adrp	x23, .LC98
-	add	x22, x22, :lo12:.LC97
-	add	x23, x23, :lo12:.LC98
-.L1607:
+	b	.L1630
+.L1629:
+	adrp	x22, .LC101
+	adrp	x23, .LC102
+	add	x22, x22, :lo12:.LC101
+	add	x23, x23, :lo12:.LC102
+.L1631:
 	ldr	w1, [x20, 64]
 	ldr	w0, [x29, 64]
 	ubfx	x1, x1, 16, 6
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0
-	bge	.L1609
+	bge	.L1633
 	ldr	x0, [x19, #:lo12:.LANCHOR13]
 	ldr	w0, [x0]
 	str	w0, [x29, 72]
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1608
+	tbz	x0, 13, .L1632
 	ldr	w0, [x29, 72]
-	tbz	x0, 17, .L1608
+	tbz	x0, 17, .L1632
 	ldr	w1, [x29, 72]
-	adrp	x0, .LC96
-	add	x0, x0, :lo12:.LC96
+	adrp	x0, .LC100
+	add	x0, x0, :lo12:.LC100
 	ubfx	x1, x1, 17, 1
-.L1641:
+.L1665:
 	bl	printf
-	b	.L1609
-.L1608:
+	b	.L1633
+.L1632:
 	ldr	w0, [x29, 64]
 	add	w21, w21, 1
 	ubfx	x0, x0, 22, 6
 	cmp	w21, w0, lsl 12
-	bne	.L1607
+	bne	.L1631
 	ldr	w2, [x20, 64]
 	mov	w1, w21
 	ldr	w3, [x29, 64]
@@ -9600,37 +9795,37 @@ nandc_xfer_done:
 	mov	w2, 4
 	bl	rknand_print_hex
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1607
+	tbz	x0, 13, .L1631
 	mov	w0, 1
 	strb	w0, [x24, #:lo12:.LANCHOR157]
-.L1609:
-	adrp	x0, .LANCHOR46+32
+.L1633:
+	adrp	x0, .LANCHOR47+32
 	ldp	x19, x20, [sp, 16]
-	str	wzr, [x0, #:lo12:.LANCHOR46+32]
+	str	wzr, [x0, #:lo12:.LANCHOR47+32]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1604:
+.L1628:
 	ldr	x20, [x19, #:lo12:.LANCHOR13]
 	mov	w21, 0
 	ldr	w0, [x20, 8]
 	str	w0, [x29, 64]
 	ldr	w0, [x20, 16]
-	tbnz	x0, 1, .L1615
-	adrp	x22, .LC99
-	adrp	x23, .LC98
-	add	x22, x22, :lo12:.LC99
-	add	x23, x23, :lo12:.LC98
-.L1616:
+	tbnz	x0, 1, .L1639
+	adrp	x22, .LC103
+	adrp	x23, .LC102
+	add	x22, x22, :lo12:.LC103
+	add	x23, x23, :lo12:.LC102
+.L1640:
 	ldr	w0, [x29, 64]
-	tbnz	x0, 20, .L1609
+	tbnz	x0, 20, .L1633
 	ldr	x0, [x19, #:lo12:.LANCHOR13]
 	add	w21, w21, 1
 	tst	x21, 16777215
 	ldr	w0, [x0, 8]
 	str	w0, [x29, 64]
-	bne	.L1616
+	bne	.L1640
 	ldr	w2, [x29, 64]
 	mov	w1, w21
 	ldr	w3, [x20, 28]
@@ -9642,34 +9837,34 @@ nandc_xfer_done:
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1616
-.L1615:
-	adrp	x22, .LC97
-	adrp	x23, .LC98
-	add	x22, x22, :lo12:.LC97
-	add	x23, x23, :lo12:.LC98
-.L1617:
+	b	.L1640
+.L1639:
+	adrp	x22, .LC101
+	adrp	x23, .LC102
+	add	x22, x22, :lo12:.LC101
+	add	x23, x23, :lo12:.LC102
+.L1641:
 	ldr	w1, [x20, 28]
 	ldr	w0, [x29, 64]
 	ubfx	x1, x1, 16, 5
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0
-	bge	.L1609
+	bge	.L1633
 	ldr	x0, [x19, #:lo12:.LANCHOR13]
 	ldr	w0, [x0]
 	str	w0, [x29, 72]
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1618
+	tbz	x0, 13, .L1642
 	ldr	w0, [x29, 72]
-	tbz	x0, 17, .L1618
-	adrp	x0, .LC100
+	tbz	x0, 17, .L1642
+	adrp	x0, .LC104
 	ldr	w1, [x29, 72]
-	add	x0, x0, :lo12:.LC100
-	b	.L1641
-.L1618:
+	add	x0, x0, :lo12:.LC104
+	b	.L1665
+.L1642:
 	add	w21, w21, 1
 	tst	x21, 16777215
-	bne	.L1617
+	bne	.L1641
 	ldr	w2, [x20, 28]
 	mov	w1, w21
 	ldr	w3, [x29, 64]
@@ -9682,7 +9877,7 @@ nandc_xfer_done:
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1617
+	b	.L1641
 	.size	nandc_xfer_done, .-nandc_xfer_done
 	.section	.text.nandc_xfer,"ax",@progbits
 	.align	2
@@ -9703,20 +9898,20 @@ nandc_xfer:
 	mov	x21, x4
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
-	cbnz	w22, .L1661
-	adrp	x0, .LANCHOR27
-	ldrb	w0, [x0, #:lo12:.LANCHOR27]
+	cbnz	w22, .L1685
+	adrp	x0, .LANCHOR28
+	ldrb	w0, [x0, #:lo12:.LANCHOR28]
 	cmp	w0, 9
-	bne	.L1644
+	bne	.L1668
 	adrp	x22, .LANCHOR13
 	lsr	w19, w19, 2
 	mov	w3, 1
 	mov	w2, 0
 	ldr	x5, [x22, #:lo12:.LANCHOR13]
 	mov	w0, 0
-.L1645:
+.L1669:
 	cmp	w2, w19
-	bcc	.L1649
+	bcc	.L1673
 	ldr	w19, [x5]
 	cmp	w3, 0
 	mov	w1, 512
@@ -9725,35 +9920,35 @@ nandc_xfer:
 	movk	w1, 0x2, lsl 16
 	and	w1, w19, w1
 	cmp	w1, 139264
-	bne	.L1651
+	bne	.L1675
 	mov	w1, w19
-	adrp	x0, .LC101
-	add	x0, x0, :lo12:.LC101
+	adrp	x0, .LC105
+	add	x0, x0, :lo12:.LC105
 	bl	printf
 	ldr	x0, [x22, #:lo12:.LANCHOR13]
 	orr	w19, w19, 131072
 	str	w19, [x0]
 	mov	w0, -1
-.L1651:
-	tbz	x19, 13, .L1652
+.L1675:
+	tbz	x19, 13, .L1676
 	adrp	x1, .LANCHOR157
 	ldrb	w1, [x1, #:lo12:.LANCHOR157]
-	cbz	w1, .L1652
+	cbz	w1, .L1676
 	mov	w1, w19
-	adrp	x0, .LC102
-	add	x0, x0, :lo12:.LC102
+	adrp	x0, .LC106
+	add	x0, x0, :lo12:.LC106
 	bl	printf
 	ldr	x0, [x22, #:lo12:.LANCHOR13]
 	mov	w1, 1
 	str	w1, [x0, 16]
-.L1680:
+.L1704:
 	mov	w0, -1
-.L1643:
+.L1667:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1649:
+.L1673:
 	uxtw	x1, w2
 	add	x1, x1, 84
 	ldr	w1, [x5, x1, lsl 2]
@@ -9764,70 +9959,70 @@ nandc_xfer:
 	and	w1, w4, w1, lsr 10
 	and	w3, w3, w1
 	ldr	w1, [x29, 56]
-	tbnz	x1, 2, .L1663
+	tbnz	x1, 2, .L1687
 	ldr	w1, [x29, 56]
-	tbnz	x1, 18, .L1663
+	tbnz	x1, 18, .L1687
 	ldr	w4, [x29, 56]
 	ldr	w1, [x29, 56]
 	ubfx	x4, x4, 3, 7
 	ubfx	x1, x1, 19, 7
 	cmp	w4, w1
 	ldr	w1, [x29, 56]
-	ble	.L1647
+	ble	.L1671
 	ubfx	x1, x1, 3, 7
-.L1648:
+.L1672:
 	cmp	w0, w1
 	csel	w0, w0, w1, cs
-.L1646:
+.L1670:
 	add	w2, w2, 1
-	b	.L1645
-.L1647:
+	b	.L1669
+.L1671:
 	ubfx	x1, x1, 19, 7
-	b	.L1648
-.L1663:
+	b	.L1672
+.L1687:
 	mov	w0, -1
-	b	.L1646
-.L1644:
-	adrp	x0, .LANCHOR43
+	b	.L1670
+.L1668:
+	adrp	x0, .LANCHOR44
 	lsr	w4, w19, 1
 	mov	w3, 64
 	mov	w1, 1
-	ldrb	w0, [x0, #:lo12:.LANCHOR43]
+	ldrb	w0, [x0, #:lo12:.LANCHOR44]
 	mov	w2, 0
-	adrp	x6, .LANCHOR46
+	adrp	x6, .LANCHOR47
 	cmp	w0, 25
 	mov	w0, 128
 	csel	w3, w3, w0, cc
 	mov	w0, 0
-.L1654:
+.L1678:
 	add	w5, w3, w0
 	cmp	w2, w4
-	bcc	.L1655
+	bcc	.L1679
 	adrp	x22, .LANCHOR13
 	lsr	w19, w19, 2
 	mov	w3, 0
 	mov	w0, 0
 	ldr	x4, [x22, #:lo12:.LANCHOR13]
-.L1656:
+.L1680:
 	cmp	w3, w19
-	bcc	.L1660
+	bcc	.L1684
 	str	wzr, [x4, 16]
 	mov	w1, 8192
 	movk	w1, 0x2, lsl 16
 	ldr	w19, [x4]
 	and	w1, w19, w1
 	cmp	w1, 139264
-	bne	.L1652
+	bne	.L1676
 	mov	w1, w19
-	adrp	x0, .LC103
-	add	x0, x0, :lo12:.LC103
+	adrp	x0, .LC107
+	add	x0, x0, :lo12:.LC107
 	bl	printf
 	ldr	x0, [x22, #:lo12:.LANCHOR13]
 	orr	w19, w19, 131072
 	str	w19, [x0]
-	b	.L1680
-.L1655:
-	ldr	x7, [x6, #:lo12:.LANCHOR46]
+	b	.L1704
+.L1679:
+	ldr	x7, [x6, #:lo12:.LANCHOR47]
 	and	x0, x0, 4294967292
 	ldr	w0, [x7, x0]
 	lsl	w7, w2, 2
@@ -9843,16 +10038,16 @@ nandc_xfer:
 	add	w1, w1, 4
 	strb	w0, [x21, x7]
 	mov	w0, w5
-	b	.L1654
-.L1660:
+	b	.L1678
+.L1684:
 	uxtw	x1, w3
 	add	x1, x1, 8
 	ldr	w1, [x4, x1, lsl 2]
 	str	w1, [x29, 56]
 	ldr	w1, [x29, 56]
-	tbnz	x1, 2, .L1666
+	tbnz	x1, 2, .L1690
 	ldr	w1, [x29, 56]
-	tbnz	x1, 15, .L1666
+	tbnz	x1, 15, .L1690
 	ldr	w2, [x29, 56]
 	ubfx	x6, x2, 3, 5
 	ldr	w2, [x29, 56]
@@ -9865,42 +10060,42 @@ nandc_xfer:
 	orr	w1, w5, w1, lsl 5
 	cmp	w2, w1
 	ldr	w1, [x29, 56]
-	bls	.L1658
+	bls	.L1682
 	ubfx	x2, x1, 3, 5
 	ldr	w1, [x29, 56]
 	ubfx	x1, x1, 27, 1
-.L1679:
+.L1703:
 	orr	w1, w2, w1, lsl 5
 	cmp	w0, w1
 	csel	w0, w0, w1, cs
-.L1657:
+.L1681:
 	add	w3, w3, 1
-	b	.L1656
-.L1658:
+	b	.L1680
+.L1682:
 	ubfx	x2, x1, 16, 5
 	ldr	w1, [x29, 56]
 	ubfx	x1, x1, 29, 1
-	b	.L1679
-.L1666:
+	b	.L1703
+.L1690:
 	mov	w0, -1
-	b	.L1657
-.L1652:
+	b	.L1681
+.L1676:
 	cmn	w0, #1
-	beq	.L1643
+	beq	.L1667
 	ldr	w1, [x21]
 	cmn	w1, #1
-	bne	.L1643
+	bne	.L1667
 	ldr	w1, [x21, 4]
 	cmn	w1, #1
-	bne	.L1643
+	bne	.L1667
 	ldr	w1, [x20]
 	cmn	w1, #1
 	mov	w1, 512
 	csel	w0, w0, w1, ne
-	b	.L1643
-.L1661:
+	b	.L1667
+.L1685:
 	mov	w0, 0
-	b	.L1643
+	b	.L1667
 	.size	nandc_xfer, .-nandc_xfer
 	.section	.text.flash_read_page,"ax",@progbits
 	.align	2
@@ -9924,22 +10119,22 @@ flash_read_page:
 	mov	x26, x3
 	and	w20, w1, 2097151
 	ubfx	x23, x22, 24, 2
-	tbz	x0, 4, .L1682
+	tbz	x0, 4, .L1706
 	mov	w3, w1
-	adrp	x0, .LC104
+	adrp	x0, .LC108
 	mov	w2, w23
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC104
+	add	x0, x0, :lo12:.LC108
 	bl	printf
-.L1682:
+.L1706:
 	bl	nandc_wait_flash_ready
 	mov	w0, w21
 	bl	nandc_cs
 	adrp	x7, .LANCHOR16
-	cbnz	w23, .L1683
+	cbnz	w23, .L1707
 	mov	w0, w21
 	bl	zftl_flash_enter_slc_mode
-.L1684:
+.L1708:
 	ubfiz	x4, x21, 8, 8
 	lsr	w0, w20, 8
 	add	x4, x19, x4
@@ -9956,12 +10151,12 @@ flash_read_page:
 	ldr	x0, [x7, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1686
-	cbz	w23, .L1686
+	bne	.L1710
+	cbz	w23, .L1710
 	add	w20, w20, w20, lsl 1
 	sub	w0, w20, #1
 	add	w0, w0, w23
-.L1695:
+.L1719:
 	bl	nandc_set_seed
 	bl	nandc_wait_flash_ready
 	mov	w0, 5
@@ -9977,7 +10172,7 @@ flash_read_page:
 	mov	w0, w21
 	bl	nandc_xfer
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.28
+	bl	nandc_de_cs.constprop.29
 	mov	w0, w2
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9985,23 +10180,23 @@ flash_read_page:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1683:
+.L1707:
 	ldr	x0, [x7, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1685
+	bne	.L1709
 	sxtw	x0, w21
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 8
 	str	w23, [x0, 8]
-	b	.L1684
-.L1685:
+	b	.L1708
+.L1709:
 	mov	w0, w21
 	bl	zftl_flash_exit_slc_mode
-	b	.L1684
-.L1686:
+	b	.L1708
+.L1710:
 	mov	w0, w20
-	b	.L1695
+	b	.L1719
 	.size	flash_read_page, .-flash_read_page
 	.section	.text.micron_read_retrial,"ax",@progbits
 	.align	2
@@ -10012,7 +10207,7 @@ micron_read_retrial:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	w24, w0, 255
-	adrp	x0, .LANCHOR43
+	adrp	x0, .LANCHOR44
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	mov	w22, w1
@@ -10020,7 +10215,7 @@ micron_read_retrial:
 	mov	x25, x2
 	stp	x27, x28, [sp, 80]
 	mov	x26, x3
-	ldrb	w20, [x0, #:lo12:.LANCHOR43]
+	ldrb	w20, [x0, #:lo12:.LANCHOR44]
 	and	x19, x24, 255
 	str	w4, [x29, 116]
 	bl	nandc_wait_flash_ready
@@ -10039,12 +10234,12 @@ micron_read_retrial:
 	adrp	x0, .LANCHOR14
 	add	x0, x0, :lo12:.LANCHOR14
 	str	x0, [x29, 96]
-.L1697:
+.L1721:
 	ldr	x0, [x29, 104]
 	ldrb	w0, [x0]
 	cmp	w21, w0
-	bcc	.L1702
-.L1701:
+	bcc	.L1726
+.L1725:
 	ldr	x0, [x29, 120]
 	add	x19, x0, x19, lsl 8
 	mov	w0, 239
@@ -10058,22 +10253,22 @@ micron_read_retrial:
 	cmp	w28, w20
 	str	wzr, [x19, 2048]
 	str	wzr, [x19, 2048]
-	bcc	.L1703
+	bcc	.L1727
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L1703:
+.L1727:
 	cmp	w28, 256
 	ccmn	w28, #1, 4, ne
-	bne	.L1704
-	adrp	x0, .LC106
+	bne	.L1728
+	adrp	x0, .LC110
 	mov	w4, w28
 	mov	w3, w21
 	mov	w2, w22
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC106
+	add	x0, x0, :lo12:.LC110
 	bl	printf
-.L1704:
+.L1728:
 	bl	nandc_wait_flash_ready
 	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
@@ -10083,7 +10278,7 @@ micron_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1702:
+.L1726:
 	mov	w0, 239
 	str	w0, [x23, 2056]
 	mov	w0, 137
@@ -10104,19 +10299,19 @@ micron_read_retrial:
 	mov	w7, w0
 	ldr	x0, [x29, 96]
 	ldr	w0, [x0]
-	tbz	x0, 12, .L1698
+	tbz	x0, 12, .L1722
 	mov	w4, w7
 	str	w7, [x29, 112]
 	mov	w3, w28
 	mov	w2, w22
 	mov	w1, w21
-	adrp	x0, .LC105
-	add	x0, x0, :lo12:.LC105
+	adrp	x0, .LC109
+	add	x0, x0, :lo12:.LC109
 	bl	printf
 	ldr	w7, [x29, 112]
-.L1698:
+.L1722:
 	cmn	w7, #1
-	beq	.L1699
+	beq	.L1723
 	adrp	x0, .LANCHOR156
 	cmn	w28, #1
 	csel	w28, w28, w7, ne
@@ -10124,13 +10319,13 @@ micron_read_retrial:
 	ldr	x25, [x0, #:lo12:.LANCHOR156]
 	adrp	x0, .LANCHOR158
 	ldr	x26, [x0, #:lo12:.LANCHOR158]
-	bcc	.L1705
-.L1699:
+	bcc	.L1729
+.L1723:
 	mov	w21, w27
-	b	.L1697
-.L1705:
+	b	.L1721
+.L1729:
 	mov	w28, w7
-	b	.L1701
+	b	.L1725
 	.size	micron_read_retrial, .-micron_read_retrial
 	.section	.text.toshiba_3d_read_retrial,"ax",@progbits
 	.align	2
@@ -10152,14 +10347,14 @@ toshiba_3d_read_retrial:
 	mov	x26, x2
 	bl	nandc_wait_flash_ready
 	adrp	x0, .LANCHOR13
-	adrp	x22, .LANCHOR23
+	adrp	x22, .LANCHOR24
 	mov	w1, 46
 	mov	w2, 56
 	ldr	x25, [x0, #:lo12:.LANCHOR13]
 	and	x0, x24, 255
 	add	x21, x0, 8
 	str	x0, [x29, 128]
-	ldrb	w0, [x22, #:lo12:.LANCHOR23]
+	ldrb	w0, [x22, #:lo12:.LANCHOR24]
 	mov	w19, -1
 	add	x21, x25, x21, lsl 8
 	mov	w20, 1
@@ -10170,18 +10365,18 @@ toshiba_3d_read_retrial:
 	mov	w1, 10
 	csel	w0, w1, w0, ne
 	str	w0, [x29, 136]
-	add	x0, x22, :lo12:.LANCHOR23
-	cbnz	w4, .L1720
+	add	x0, x22, :lo12:.LANCHOR24
+	cbnz	w4, .L1744
 	str	x0, [x29, 120]
 	sxtw	x0, w24
 	add	x0, x0, 8
 	add	x0, x25, x0, lsl 8
 	str	x0, [x29, 112]
-.L1727:
+.L1751:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, 36
-	bne	.L1721
+	bne	.L1745
 	mov	w1, w20
 	mov	x0, x21
 	mov	w2, 0
@@ -10189,7 +10384,7 @@ toshiba_3d_read_retrial:
 	ldr	x1, [x29, 112]
 	mov	w0, 93
 	str	w0, [x1, 8]
-.L1722:
+.L1746:
 	mov	w4, w28
 	mov	x3, x27
 	mov	x2, x26
@@ -10199,60 +10394,60 @@ toshiba_3d_read_retrial:
 	mov	w4, w0
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 4, .L1723
+	tbz	x0, 4, .L1747
 	mov	w3, w4
 	str	w4, [x29, 108]
 	mov	w2, w23
 	mov	w1, w20
-	adrp	x0, .LC107
-	add	x0, x0, :lo12:.LC107
+	adrp	x0, .LC111
+	add	x0, x0, :lo12:.LC111
 	bl	printf
 	ldr	w4, [x29, 108]
-.L1723:
+.L1747:
 	cmn	w4, #1
-	beq	.L1724
+	beq	.L1748
 	adrp	x0, .LANCHOR156
 	cmn	w19, #1
 	csel	w19, w19, w4, ne
 	ldr	x26, [x0, #:lo12:.LANCHOR156]
 	adrp	x0, .LANCHOR158
 	ldr	x27, [x0, #:lo12:.LANCHOR158]
-	adrp	x0, .LANCHOR43
-	ldrb	w0, [x0, #:lo12:.LANCHOR43]
+	adrp	x0, .LANCHOR44
+	ldrb	w0, [x0, #:lo12:.LANCHOR44]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1742
-.L1724:
+	bcc	.L1766
+.L1748:
 	ldr	w0, [x29, 136]
 	add	w20, w20, 1
 	cmp	w0, w20
-	bne	.L1727
-.L1726:
-	ldrb	w0, [x22, #:lo12:.LANCHOR23]
+	bne	.L1751
+.L1750:
+	ldrb	w0, [x22, #:lo12:.LANCHOR24]
 	cmp	w0, 36
-	bne	.L1728
+	bne	.L1752
 	mov	w2, 0
-.L1765:
+.L1789:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_tlc_set_rr_para
-	b	.L1729
-.L1721:
+	b	.L1753
+.L1745:
 	mov	w1, w20
 	mov	x0, x21
 	bl	toshiba_3d_set_slc_rr_para
-	b	.L1722
-.L1742:
+	b	.L1746
+.L1766:
 	mov	w19, w4
-	b	.L1726
-.L1728:
+	b	.L1750
+.L1752:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_3d_set_slc_rr_para
-.L1729:
-	ldrb	w0, [x22, #:lo12:.LANCHOR23]
+.L1753:
+	ldrb	w0, [x22, #:lo12:.LANCHOR24]
 	cmp	w0, 36
-	bne	.L1738
+	bne	.L1762
 	ldr	x0, [x29, 128]
 	add	x25, x25, x0, lsl 8
 	mov	w0, 85
@@ -10261,27 +10456,27 @@ toshiba_3d_read_retrial:
 	str	wzr, [x25, 2052]
 	str	wzr, [x25, 2048]
 	str	w0, [x25, 2056]
-.L1738:
-	adrp	x0, .LANCHOR43
-	ldrb	w0, [x0, #:lo12:.LANCHOR43]
+.L1762:
+	adrp	x0, .LANCHOR44
+	ldrb	w0, [x0, #:lo12:.LANCHOR44]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L1739
+	bcc	.L1763
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L1739:
+.L1763:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L1740
-	adrp	x0, .LC109
+	bne	.L1764
+	adrp	x0, .LC113
 	mov	w4, w19
 	mov	w3, w20
 	mov	w2, w23
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC109
+	add	x0, x0, :lo12:.LC113
 	bl	printf
-.L1740:
+.L1764:
 	bl	nandc_wait_flash_ready
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
@@ -10291,23 +10486,23 @@ toshiba_3d_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1720:
+.L1744:
 	str	x0, [x29, 112]
 	sxtw	x0, w24
 	add	x0, x0, 8
 	add	x0, x25, x0, lsl 8
 	str	x0, [x29, 136]
-.L1736:
+.L1760:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
 	cmp	w0, 36
-	bne	.L1730
+	bne	.L1754
 	mov	x0, x21
 	mov	w2, 1
 	mov	w1, w20
 	bl	toshiba_tlc_set_rr_para
 	mov	w0, 93
-.L1764:
+.L1788:
 	ldr	x1, [x29, 136]
 	mov	w4, w28
 	mov	x3, x27
@@ -10319,54 +10514,54 @@ toshiba_3d_read_retrial:
 	mov	w4, w0
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 4, .L1732
+	tbz	x0, 4, .L1756
 	mov	w3, w4
 	str	w4, [x29, 108]
 	mov	w2, w23
 	mov	w1, w20
-	adrp	x0, .LC108
-	add	x0, x0, :lo12:.LC108
+	adrp	x0, .LC112
+	add	x0, x0, :lo12:.LC112
 	bl	printf
 	ldr	w4, [x29, 108]
-.L1732:
+.L1756:
 	cmn	w4, #1
-	beq	.L1733
+	beq	.L1757
 	adrp	x0, .LANCHOR156
 	cmn	w19, #1
 	csel	w19, w19, w4, ne
 	ldr	x26, [x0, #:lo12:.LANCHOR156]
 	adrp	x0, .LANCHOR158
 	ldr	x27, [x0, #:lo12:.LANCHOR158]
-	adrp	x0, .LANCHOR43
-	ldrb	w0, [x0, #:lo12:.LANCHOR43]
+	adrp	x0, .LANCHOR44
+	ldrb	w0, [x0, #:lo12:.LANCHOR44]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1743
-.L1733:
+	bcc	.L1767
+.L1757:
 	ldr	w0, [x29, 120]
 	add	w20, w20, 1
 	cmp	w0, w20
-	bne	.L1736
-.L1735:
-	ldrb	w0, [x22, #:lo12:.LANCHOR23]
+	bne	.L1760
+.L1759:
+	ldrb	w0, [x22, #:lo12:.LANCHOR24]
 	cmp	w0, 36
-	bne	.L1737
+	bne	.L1761
 	mov	w2, 1
-	b	.L1765
-.L1730:
+	b	.L1789
+.L1754:
 	mov	x0, x21
 	mov	w1, w20
 	bl	toshiba_3d_set_tlc_rr_para
 	mov	w0, 38
-	b	.L1764
-.L1743:
+	b	.L1788
+.L1767:
 	mov	w19, w4
-	b	.L1735
-.L1737:
+	b	.L1759
+.L1761:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_3d_set_tlc_rr_para
-	b	.L1729
+	b	.L1753
 	.size	toshiba_3d_read_retrial, .-toshiba_3d_read_retrial
 	.section	.text.toshiba_read_retrial,"ax",@progbits
 	.align	2
@@ -10387,86 +10582,86 @@ toshiba_read_retrial:
 	str	w4, [x29, 116]
 	bl	nandc_wait_flash_ready
 	adrp	x0, .LANCHOR13
-	adrp	x1, .LANCHOR23
+	adrp	x1, .LANCHOR24
 	str	x1, [x29, 120]
 	ldr	x22, [x0, #:lo12:.LANCHOR13]
 	and	x0, x19, 255
 	add	x21, x0, 8
 	str	x0, [x29, 104]
-	ldrb	w0, [x1, #:lo12:.LANCHOR23]
+	ldrb	w0, [x1, #:lo12:.LANCHOR24]
 	add	x21, x22, x21, lsl 8
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
-	bls	.L1784
-	adrp	x0, .LANCHOR20
-	ldrb	w0, [x0, #:lo12:.LANCHOR20]
-	cbz	w0, .L1785
+	bls	.L1808
+	adrp	x0, .LANCHOR21
+	ldrb	w0, [x0, #:lo12:.LANCHOR21]
+	cbz	w0, .L1809
 	mov	w23, 1
 	mov	w0, 1
 	bl	nandc_set_if_mode
-.L1768:
+.L1792:
 	and	x0, x19, 255
 	mov	w1, 92
 	add	x0, x22, x0, lsl 8
 	str	w1, [x0, 2056]
 	mov	w1, 197
 	str	w1, [x0, 2056]
-.L1767:
+.L1791:
 	sxtw	x0, w19
 	mov	w20, 1
 	add	x0, x0, 8
 	mov	w24, -1
 	add	x0, x22, x0, lsl 8
 	str	x0, [x29, 96]
-.L1769:
+.L1793:
 	adrp	x0, .LANCHOR159
 	ldrb	w0, [x0, #:lo12:.LANCHOR159]
 	add	w0, w0, 1
 	cmp	w20, w0
-	bcc	.L1778
+	bcc	.L1802
 	mov	w28, w24
-.L1777:
+.L1801:
 	ldr	x0, [x29, 120]
 	mov	w1, 0
-	ldrb	w0, [x0, #:lo12:.LANCHOR23]
+	ldrb	w0, [x0, #:lo12:.LANCHOR24]
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x21
-	bhi	.L1779
+	bhi	.L1803
 	bl	sandisk_set_rr_para
-.L1780:
+.L1804:
 	sxtw	x19, w19
 	mov	w0, 255
 	add	x19, x19, 8
 	add	x22, x22, x19, lsl 8
 	str	w0, [x22, 8]
-	adrp	x0, .LANCHOR43
-	ldrb	w0, [x0, #:lo12:.LANCHOR43]
+	adrp	x0, .LANCHOR44
+	ldrb	w0, [x0, #:lo12:.LANCHOR44]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L1781
+	bcc	.L1805
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L1781:
+.L1805:
 	cmp	w28, 256
 	ccmn	w28, #1, 4, ne
-	bne	.L1782
-	adrp	x0, .LC109
+	bne	.L1806
+	adrp	x0, .LC113
 	mov	w4, w28
 	mov	w3, w20
 	mov	w2, w25
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC109
+	add	x0, x0, :lo12:.LC113
 	bl	printf
-.L1782:
+.L1806:
 	bl	nandc_wait_flash_ready
-	cbz	w23, .L1766
+	cbz	w23, .L1790
 	mov	w0, 4
 	bl	nandc_set_if_mode
-.L1766:
+.L1790:
 	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10475,36 +10670,36 @@ toshiba_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1785:
+.L1809:
 	mov	w23, 0
-	b	.L1768
-.L1784:
+	b	.L1792
+.L1808:
 	mov	w23, 0
-	b	.L1767
-.L1778:
+	b	.L1791
+.L1802:
 	ldr	x0, [x29, 120]
 	mov	w1, w20
-	ldrb	w0, [x0, #:lo12:.LANCHOR23]
+	ldrb	w0, [x0, #:lo12:.LANCHOR24]
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x21
-	bhi	.L1770
+	bhi	.L1794
 	bl	sandisk_set_rr_para
-.L1771:
+.L1795:
 	ldr	x0, [x29, 120]
-	ldrb	w0, [x0, #:lo12:.LANCHOR23]
+	ldrb	w0, [x0, #:lo12:.LANCHOR24]
 	cmp	w0, 34
-	bne	.L1772
+	bne	.L1796
 	adrp	x0, .LANCHOR159
 	ldrb	w0, [x0, #:lo12:.LANCHOR159]
 	sub	w0, w0, #3
 	cmp	w20, w0
-	bne	.L1772
+	bne	.L1796
 	ldr	x1, [x29, 96]
 	mov	w0, 179
 	str	w0, [x1, 8]
-.L1772:
+.L1796:
 	ldr	x0, [x29, 104]
 	mov	w1, 38
 	ldr	w4, [x29, 116]
@@ -10519,27 +10714,27 @@ toshiba_read_retrial:
 	bl	flash_read_page
 	mov	w28, w0
 	cmn	w0, #1
-	beq	.L1775
+	beq	.L1799
 	cmn	w24, #1
 	csel	w24, w24, w0, ne
 	adrp	x0, .LANCHOR156
 	ldr	x26, [x0, #:lo12:.LANCHOR156]
 	adrp	x0, .LANCHOR158
 	ldr	x27, [x0, #:lo12:.LANCHOR158]
-	adrp	x0, .LANCHOR43
-	ldrb	w0, [x0, #:lo12:.LANCHOR43]
+	adrp	x0, .LANCHOR44
+	ldrb	w0, [x0, #:lo12:.LANCHOR44]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L1777
-.L1775:
+	bcc	.L1801
+.L1799:
 	add	w20, w20, 1
-	b	.L1769
-.L1770:
+	b	.L1793
+.L1794:
 	bl	toshiba_set_rr_para
-	b	.L1771
-.L1779:
+	b	.L1795
+.L1803:
 	bl	toshiba_set_rr_para
-	b	.L1780
+	b	.L1804
 	.size	toshiba_read_retrial, .-toshiba_read_retrial
 	.section	.text.hynix_read_retrial,"ax",@progbits
 	.align	2
@@ -10550,11 +10745,11 @@ hynix_read_retrial:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	x23, x0, 255
-	adrp	x0, .LANCHOR26
+	adrp	x0, .LANCHOR27
 	stp	x27, x28, [sp, 80]
 	stp	x21, x22, [sp, 32]
 	mov	w27, w4
-	ldr	x28, [x0, #:lo12:.LANCHOR26]
+	ldr	x28, [x0, #:lo12:.LANCHOR27]
 	mov	w22, w1
 	stp	x25, x26, [sp, 64]
 	mov	x25, x2
@@ -10567,37 +10762,37 @@ hynix_read_retrial:
 	ldrb	w24, [x28, 2]
 	ldrb	w20, [x0, 8]
 	bl	nandc_wait_flash_ready
-	adrp	x6, .LANCHOR43
-	add	x6, x6, :lo12:.LANCHOR43
+	adrp	x6, .LANCHOR44
+	add	x6, x6, :lo12:.LANCHOR44
 	mov	w5, 0
 	adrp	x7, .LANCHOR156
 	adrp	x8, .LANCHOR158
-.L1799:
+.L1823:
 	cmp	w5, w24
-	bcc	.L1804
-.L1803:
-	adrp	x0, .LANCHOR43
+	bcc	.L1828
+.L1827:
+	adrp	x0, .LANCHOR44
 	add	x23, x28, x23
-	ldrb	w0, [x0, #:lo12:.LANCHOR43]
+	ldrb	w0, [x0, #:lo12:.LANCHOR44]
 	strb	w20, [x23, 8]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L1805
+	bcc	.L1829
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L1805:
+.L1829:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L1806
-	adrp	x0, .LC110
+	bne	.L1830
+	adrp	x0, .LC114
 	mov	w4, w19
 	mov	w3, w5
 	mov	w2, w22
 	mov	w1, w5
-	add	x0, x0, :lo12:.LC110
+	add	x0, x0, :lo12:.LC114
 	bl	printf
-.L1806:
+.L1830:
 	bl	nandc_wait_flash_ready
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
@@ -10607,7 +10802,7 @@ hynix_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1804:
+.L1828:
 	add	w20, w20, 1
 	stp	x6, x8, [x29, 96]
 	and	w20, w20, 255
@@ -10628,7 +10823,7 @@ hynix_read_retrial:
 	cmn	w0, #1
 	ldp	x6, x8, [x29, 96]
 	ldr	x7, [x29, 112]
-	beq	.L1801
+	beq	.L1825
 	ldrb	w1, [x6]
 	cmn	w19, #1
 	csel	w19, w19, w0, ne
@@ -10636,13 +10831,13 @@ hynix_read_retrial:
 	ldr	x26, [x8, #:lo12:.LANCHOR158]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L1807
-.L1801:
+	bcc	.L1831
+.L1825:
 	add	w5, w5, 1
-	b	.L1799
-.L1807:
+	b	.L1823
+.L1831:
 	mov	w19, w0
-	b	.L1803
+	b	.L1827
 	.size	hynix_read_retrial, .-hynix_read_retrial
 	.section	.text.flash_ddr_tuning_read,"ax",@progbits
 	.align	2
@@ -10660,25 +10855,25 @@ flash_ddr_tuning_read:
 	stp	x25, x26, [sp, 64]
 	mov	x24, x3
 	stp	x27, x28, [sp, 80]
-	adrp	x25, .LANCHOR43
+	adrp	x25, .LANCHOR44
 	str	w4, [x29, 136]
 	bl	nandc_get_ddr_para
-	add	x25, x25, :lo12:.LANCHOR43
+	add	x25, x25, :lo12:.LANCHOR44
 	str	w0, [x29, 132]
 	adrp	x0, .LANCHOR14
 	add	x0, x0, :lo12:.LANCHOR14
 	mov	w28, 0
 	str	x0, [x29, 120]
 	mov	w26, 0
-	adrp	x0, .LC111
+	adrp	x0, .LC115
 	mov	w27, 0
-	add	x0, x0, :lo12:.LC111
+	add	x0, x0, :lo12:.LC115
 	mov	w19, 1024
 	mov	w21, -1
 	mov	w7, 6
 	str	wzr, [x29, 140]
 	str	x0, [x29, 112]
-.L1823:
+.L1847:
 	mov	w0, w7
 	str	w7, [x29, 128]
 	bl	nandc_set_ddr_para
@@ -10692,7 +10887,7 @@ flash_ddr_tuning_read:
 	ldr	x0, [x29, 120]
 	ldr	w7, [x29, 128]
 	ldr	w0, [x0]
-	tbz	x0, 4, .L1818
+	tbz	x0, 4, .L1842
 	ldr	x0, [x29, 112]
 	mov	w3, w4
 	mov	w1, w7
@@ -10702,47 +10897,47 @@ flash_ddr_tuning_read:
 	bl	printf
 	ldr	w4, [x29, 108]
 	ldr	w7, [x29, 128]
-.L1818:
+.L1842:
 	add	w0, w19, 1
 	cmp	w4, w0
-	bhi	.L1819
+	bhi	.L1843
 	adrp	x0, .LANCHOR156
 	ldr	x23, [x0, #:lo12:.LANCHOR156]
 	adrp	x0, .LANCHOR158
 	ldr	x24, [x0, #:lo12:.LANCHOR158]
 	ldrb	w0, [x25]
 	cmp	w4, w0, lsr 2
-	bcs	.L1829
+	bcs	.L1853
 	add	w27, w27, 1
 	cmp	w27, 7
-	bls	.L1829
+	bls	.L1853
 	sub	w28, w7, w27
 	mov	w19, w4
 	mov	w21, 0
-.L1821:
+.L1845:
 	ldr	w0, [x29, 140]
 	cmp	w27, w26
 	csel	w28, w28, w0, cs
-.L1822:
-	cbz	w28, .L1824
-	adrp	x0, .LANCHOR43
+.L1846:
+	cbz	w28, .L1848
+	adrp	x0, .LANCHOR44
 	mov	w1, 3
-	ldrb	w0, [x0, #:lo12:.LANCHOR43]
+	ldrb	w0, [x0, #:lo12:.LANCHOR44]
 	udiv	w0, w0, w1
 	cmp	w0, w19
-	bls	.L1824
+	bls	.L1848
 	mov	w1, w28
-	adrp	x0, .LC112
-	add	x0, x0, :lo12:.LC112
+	adrp	x0, .LC116
+	add	x0, x0, :lo12:.LC116
 	bl	printf
 	mov	w0, w28
-.L1840:
+.L1864:
 	bl	nandc_set_ddr_para
-	cbz	w21, .L1817
+	cbz	w21, .L1841
 	mov	w2, w22
 	mov	w1, w20
-	adrp	x0, .LC113
-	add	x0, x0, :lo12:.LC113
+	adrp	x0, .LC117
+	add	x0, x0, :lo12:.LC117
 	bl	printf
 	mov	w0, w20
 	bl	flash_reset
@@ -10750,8 +10945,8 @@ flash_ddr_tuning_read:
 	bl	flash_set_interface_mode
 	mov	w0, 1
 	bl	nandc_set_if_mode
-	adrp	x0, .LANCHOR31
-	add	x0, x0, :lo12:.LANCHOR31
+	adrp	x0, .LANCHOR32
+	add	x0, x0, :lo12:.LANCHOR32
 	mov	w1, 2
 	strb	w1, [x0, w20, sxtw]
 	mov	w0, w20
@@ -10766,22 +10961,22 @@ flash_ddr_tuning_read:
 	mov	w3, w0
 	mov	w2, w22
 	mov	w1, w20
-	adrp	x0, .LC114
-	add	x0, x0, :lo12:.LC114
+	adrp	x0, .LC118
+	add	x0, x0, :lo12:.LC118
 	bl	printf
-	adrp	x0, .LANCHOR43
-	ldrb	w0, [x0, #:lo12:.LANCHOR43]
+	adrp	x0, .LANCHOR44
+	ldrb	w0, [x0, #:lo12:.LANCHOR44]
 	cmp	w19, w0
-	bhi	.L1831
+	bhi	.L1855
 	adrp	x1, .LANCHOR160
 	ldr	w0, [x1, #:lo12:.LANCHOR160]
 	add	w0, w0, 1
 	str	w0, [x1, #:lo12:.LANCHOR160]
 	cmp	w0, 100
-	bls	.L1827
-	adrp	x0, .LANCHOR20
-	strb	wzr, [x0, #:lo12:.LANCHOR20]
-.L1817:
+	bls	.L1851
+	adrp	x0, .LANCHOR21
+	strb	wzr, [x0, #:lo12:.LANCHOR21]
+.L1841:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10790,38 +10985,38 @@ flash_ddr_tuning_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1819:
+.L1843:
 	cmp	w27, w26
-	bls	.L1830
+	bls	.L1854
 	sub	w0, w28, w27
 	str	w0, [x29, 140]
 	cmp	w27, 7
-	bhi	.L1822
+	bhi	.L1846
 	mov	w26, w27
-.L1830:
+.L1854:
 	mov	w27, 0
-	b	.L1820
-.L1829:
+	b	.L1844
+.L1853:
 	mov	w28, w7
 	mov	w19, w4
 	mov	w21, 0
-.L1820:
+.L1844:
 	add	w7, w7, 2
 	cmp	w7, 50
-	bne	.L1823
-	b	.L1821
-.L1824:
+	bne	.L1847
+	b	.L1845
+.L1848:
 	ldrb	w0, [x29, 132]
-	b	.L1840
-.L1831:
+	b	.L1864
+.L1855:
 	mov	w19, w21
-.L1827:
-	adrp	x20, .LANCHOR42
-	ldrb	w0, [x20, #:lo12:.LANCHOR42]
+.L1851:
+	adrp	x20, .LANCHOR43
+	ldrb	w0, [x20, #:lo12:.LANCHOR43]
 	bl	flash_set_interface_mode
-	ldrb	w0, [x20, #:lo12:.LANCHOR42]
+	ldrb	w0, [x20, #:lo12:.LANCHOR43]
 	bl	nandc_set_if_mode
-	b	.L1817
+	b	.L1841
 	.size	flash_ddr_tuning_read, .-flash_ddr_tuning_read
 	.section	.text.flash_read_page_en,"ax",@progbits
 	.align	2
@@ -10843,59 +11038,59 @@ flash_read_page_en:
 	mov	w24, w4
 	mov	x25, x0
 	cmp	w1, w20
-	bhi	.L1842
+	bhi	.L1866
 	adrp	x1, .LANCHOR161
 	adrp	x0, .LC0
 	mov	w2, 398
 	add	x1, x1, :lo12:.LANCHOR161
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1842:
-	adrp	x0, .LANCHOR29
-	add	x0, x0, :lo12:.LANCHOR29
+.L1866:
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w21, [x0, w20, sxtw]
 	ldrb	w0, [x25, #:lo12:.LANCHOR18]
 	cmp	w0, w20
-	bcs	.L1843
+	bcs	.L1867
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbnz	x0, 6, .L1844
-.L1868:
+	tbnz	x0, 6, .L1868
+.L1892:
 	mov	w0, -1
-.L1841:
+.L1865:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1844:
+.L1868:
 	mov	w3, w19
 	mov	w2, w20
 	mov	w1, w21
-	adrp	x0, .LC115
-	add	x0, x0, :lo12:.LC115
+	adrp	x0, .LC119
+	add	x0, x0, :lo12:.LC119
 	bl	printf
-	b	.L1868
-.L1843:
+	b	.L1892
+.L1867:
 	tst	x19, 50331648
-	bne	.L1846
+	bne	.L1870
 	adrp	x0, .LANCHOR0
 	adrp	x1, .LANCHOR1
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L1847
+	cbz	w0, .L1871
 	ldrb	w0, [x1, #:lo12:.LANCHOR1]
-	cbz	w0, .L1846
-.L1847:
+	cbz	w0, .L1870
+.L1871:
 	adrp	x0, .LANCHOR2
 	ldrb	w1, [x1, #:lo12:.LANCHOR1]
 	ldrh	w2, [x0, #:lo12:.LANCHOR2]
 	udiv	w0, w19, w2
 	mul	w0, w0, w2
 	sub	w19, w19, w0
-	cbz	w1, .L1848
+	cbz	w1, .L1872
 	add	w19, w0, w19, lsl 1
-.L1846:
+.L1870:
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -10903,25 +11098,25 @@ flash_read_page_en:
 	mov	w0, w21
 	bl	flash_read_page
 	cmn	w0, #1
-	bne	.L1841
-	adrp	x20, .LANCHOR45
-	ldrb	w25, [x20, #:lo12:.LANCHOR45]
-	cbnz	w25, .L1849
-.L1852:
+	bne	.L1865
+	adrp	x20, .LANCHOR46
+	ldrb	w25, [x20, #:lo12:.LANCHOR46]
+	cbnz	w25, .L1873
+.L1876:
 	adrp	x0, .LANCHOR162
 	ldr	x5, [x0, #:lo12:.LANCHOR162]
-	cbnz	x5, .L1850
-.L1851:
-	ldrb	w4, [x20, #:lo12:.LANCHOR45]
+	cbnz	x5, .L1874
+.L1875:
+	ldrb	w4, [x20, #:lo12:.LANCHOR46]
 	mov	w3, -1
 	mov	w2, w19
 	mov	w1, 0
-	adrp	x0, .LC116
-	add	x0, x0, :lo12:.LC116
+	adrp	x0, .LC120
+	add	x0, x0, :lo12:.LC120
 	bl	printf
-	adrp	x0, .LANCHOR20
-	ldrb	w0, [x0, #:lo12:.LANCHOR20]
-	cbz	w0, .L1868
+	adrp	x0, .LANCHOR21
+	ldrb	w0, [x0, #:lo12:.LANCHOR21]
+	cbz	w0, .L1892
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -10933,25 +11128,25 @@ flash_read_page_en:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	b	flash_ddr_tuning_read
-.L1848:
+.L1872:
 	adrp	x1, .LANCHOR3
 	add	x1, x1, :lo12:.LANCHOR3
 	ldrh	w19, [x1, w19, uxtw 1]
 	add	w19, w19, w0
-	b	.L1846
-.L1849:
-	strb	wzr, [x20, #:lo12:.LANCHOR45]
+	b	.L1870
+.L1873:
+	strb	wzr, [x20, #:lo12:.LANCHOR46]
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
 	mov	w1, w19
 	mov	w0, w21
 	bl	flash_read_page
-	strb	w25, [x20, #:lo12:.LANCHOR45]
+	strb	w25, [x20, #:lo12:.LANCHOR46]
 	cmn	w0, #1
-	beq	.L1852
-	b	.L1841
-.L1850:
+	beq	.L1876
+	b	.L1865
+.L1874:
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -10959,8 +11154,8 @@ flash_read_page_en:
 	mov	w0, w21
 	blr	x5
 	cmn	w0, #1
-	beq	.L1851
-	b	.L1841
+	beq	.L1875
+	b	.L1865
 	.size	flash_read_page_en, .-flash_read_page_en
 	.section	.text.flash_get_last_written_page,"ax",@progbits
 	.align	2
@@ -10976,10 +11171,10 @@ flash_get_last_written_page:
 	stp	x25, x26, [sp, 64]
 	mov	x24, x2
 	ldrh	w19, [x0, #:lo12:.LANCHOR140]
-	adrp	x0, .LANCHOR30+26
+	adrp	x0, .LANCHOR31+26
 	stp	x21, x22, [sp, 32]
 	and	w21, w1, 65535
-	ldrh	w26, [x0, #:lo12:.LANCHOR30+26]
+	ldrh	w26, [x0, #:lo12:.LANCHOR31+26]
 	sub	w19, w19, #1
 	sxth	w19, w19
 	stp	x27, x28, [sp, 80]
@@ -10990,23 +11185,23 @@ flash_get_last_written_page:
 	add	w1, w19, w26
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L1870
+	bne	.L1894
 	mov	w27, 0
 	mov	w28, 2
-.L1871:
+.L1895:
 	cmp	w27, w19
-	ble	.L1874
-.L1870:
+	ble	.L1898
+.L1894:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1875
+	tbz	x0, 12, .L1899
 	ldr	w3, [x22]
-	adrp	x0, .LC117
+	adrp	x0, .LC121
 	mov	w2, w19
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC117
+	add	x0, x0, :lo12:.LC121
 	bl	printf
-.L1875:
+.L1899:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11015,7 +11210,7 @@ flash_get_last_written_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1874:
+.L1898:
 	add	w20, w27, w19
 	mov	w4, w25
 	mov	x3, x22
@@ -11025,25 +11220,25 @@ flash_get_last_written_page:
 	add	w1, w26, w20, sxth
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L1872
+	bne	.L1896
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L1871
-.L1872:
+	b	.L1895
+.L1896:
 	add	w20, w20, 1
 	sxth	w27, w20
-	b	.L1871
+	b	.L1895
 	.size	flash_get_last_written_page, .-flash_get_last_written_page
 	.section	.text.flash_get_last_written_page_ext,"ax",@progbits
 	.align	2
 	.global	flash_get_last_written_page_ext
 	.type	flash_get_last_written_page_ext, %function
 flash_get_last_written_page_ext:
-	adrp	x4, .LANCHOR102
+	adrp	x4, .LANCHOR66
 	mov	w6, 21
 	and	w0, w0, 65535
 	mov	w5, 1
-	ldrh	w4, [x4, #:lo12:.LANCHOR102]
+	ldrh	w4, [x4, #:lo12:.LANCHOR66]
 	sub	w6, w6, w4
 	mov	w4, w3
 	mov	x3, x2
@@ -11062,20 +11257,20 @@ flash_ddr_para_scan:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR42
+	adrp	x20, .LANCHOR43
 	stp	x21, x22, [sp, 32]
 	and	w22, w0, 255
-	ldrb	w0, [x20, #:lo12:.LANCHOR42]
-	adrp	x19, .LANCHOR20
+	ldrb	w0, [x20, #:lo12:.LANCHOR43]
+	adrp	x19, .LANCHOR21
 	stp	x23, x24, [sp, 48]
 	mov	w21, 1
 	mov	w23, w1
 	str	x25, [sp, 64]
-	strb	w21, [x19, #:lo12:.LANCHOR20]
+	strb	w21, [x19, #:lo12:.LANCHOR21]
 	adrp	x24, .LANCHOR164
 	bl	flash_set_interface_mode
 	adrp	x25, .LANCHOR163
-	ldrb	w0, [x20, #:lo12:.LANCHOR42]
+	ldrb	w0, [x20, #:lo12:.LANCHOR43]
 	bl	nandc_set_if_mode
 	ldr	x3, [x25, #:lo12:.LANCHOR163]
 	mov	w4, 4
@@ -11091,15 +11286,15 @@ flash_ddr_para_scan:
 	bl	flash_read_page
 	cmn	w0, #1
 	mov	x0, x19
-	bne	.L1882
-	ldrb	w1, [x20, #:lo12:.LANCHOR42]
-	tbz	x1, 0, .L1882
+	bne	.L1906
+	ldrb	w1, [x20, #:lo12:.LANCHOR43]
+	tbz	x1, 0, .L1906
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, w21
 	bl	nandc_set_if_mode
-	strb	wzr, [x19, #:lo12:.LANCHOR20]
-.L1883:
+	strb	wzr, [x19, #:lo12:.LANCHOR21]
+.L1907:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -11107,10 +11302,10 @@ flash_ddr_para_scan:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1882:
+.L1906:
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR20]
-	b	.L1883
+	strb	w1, [x0, #:lo12:.LANCHOR21]
+	b	.L1907
 	.size	flash_ddr_para_scan, .-flash_ddr_para_scan
 	.section	.text.flash_complete_plane_page_read,"ax",@progbits
 	.align	2
@@ -11130,81 +11325,81 @@ flash_complete_plane_page_read:
 	ldrb	w0, [x0, #:lo12:.LANCHOR18]
 	mov	x22, x2
 	cmp	w0, w23
-	bhi	.L1889
+	bhi	.L1913
 	adrp	x1, .LANCHOR165
 	adrp	x0, .LC0
 	mov	w2, 886
 	add	x1, x1, :lo12:.LANCHOR165
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1889:
-	adrp	x0, .LANCHOR29
-	add	x0, x0, :lo12:.LANCHOR29
+.L1913:
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w6, [x0, w23, sxtw]
 	adrp	x0, .LANCHOR13
 	ldr	x4, [x0, #:lo12:.LANCHOR13]
 	mov	w0, w6
 	bl	nandc_cs
-	cbnz	w20, .L1890
+	cbnz	w20, .L1914
 	mov	w0, w19
 	bl	slc_phy_page_address_calc
 	mov	w19, w0
-.L1890:
-	adrp	x0, .LANCHOR19+16
+.L1914:
+	adrp	x0, .LANCHOR20+16
 	and	x1, x6, 255
 	and	w3, w19, 255
 	lsr	w2, w19, 8
-	ldrb	w0, [x0, #:lo12:.LANCHOR19+16]
+	ldrb	w0, [x0, #:lo12:.LANCHOR20+16]
 	adrp	x5, .LANCHOR16
 	cmp	w0, 1
 	lsr	w0, w19, 16
-	bne	.L1891
+	bne	.L1915
 	add	x1, x4, x1, lsl 8
 	mov	w4, 6
-.L1902:
+.L1926:
 	str	w4, [x1, 2056]
 	str	wzr, [x1, 2052]
 	str	wzr, [x1, 2052]
 	str	w3, [x1, 2052]
 	str	w2, [x1, 2052]
 	str	w0, [x1, 2052]
-.L1900:
+.L1924:
 	mov	w0, 224
 	str	w0, [x1, 2056]
 	ldr	x0, [x5, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1894
-	cbz	w20, .L1894
+	bne	.L1918
+	cbz	w20, .L1918
 	add	w19, w19, w19, lsl 1
 	sub	w20, w20, #1
 	add	w0, w19, w20
-.L1901:
+.L1925:
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR30+9
+	adrp	x0, .LANCHOR31+9
 	mov	x4, x22
 	mov	x3, x21
 	mov	w1, 0
-	ldrb	w2, [x0, #:lo12:.LANCHOR30+9]
+	ldrb	w2, [x0, #:lo12:.LANCHOR31+9]
 	mov	w0, w6
 	bl	nandc_xfer
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.28
+	bl	nandc_de_cs.constprop.29
 	ldr	x23, [sp, 48]
 	mov	w0, w2
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1891:
+.L1915:
 	ldr	x7, [x5, #:lo12:.LANCHOR16]
 	add	x1, x4, x1, lsl 8
 	ldrb	w7, [x7, 12]
 	cmp	w7, 3
-	bne	.L1893
+	bne	.L1917
 	mov	w4, 5
-	b	.L1902
-.L1893:
+	b	.L1926
+.L1917:
 	str	wzr, [x1, 2056]
 	str	wzr, [x1, 2052]
 	str	wzr, [x1, 2052]
@@ -11215,10 +11410,10 @@ flash_complete_plane_page_read:
 	str	w0, [x1, 2056]
 	str	wzr, [x1, 2052]
 	str	wzr, [x1, 2052]
-	b	.L1900
-.L1894:
+	b	.L1924
+.L1918:
 	mov	w0, w19
-	b	.L1901
+	b	.L1925
 	.size	flash_complete_plane_page_read, .-flash_complete_plane_page_read
 	.section	.text.flash_complete_page_read,"ax",@progbits
 	.align	2
@@ -11241,26 +11436,26 @@ flash_complete_page_read:
 	mov	x25, x2
 	ubfx	x21, x23, 24, 2
 	cmp	w0, w20
-	bhi	.L1904
+	bhi	.L1928
 	adrp	x1, .LANCHOR166
 	adrp	x0, .LC0
 	mov	w2, 1008
 	add	x1, x1, :lo12:.LANCHOR166
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1904:
-	adrp	x0, .LANCHOR29
-	add	x0, x0, :lo12:.LANCHOR29
+.L1928:
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w22, [x0, w20, sxtw]
 	adrp	x0, .LANCHOR13
 	ldr	x4, [x0, #:lo12:.LANCHOR13]
 	mov	w0, w22
 	bl	nandc_cs
-	cbnz	w21, .L1905
+	cbnz	w21, .L1929
 	mov	w0, w19
 	bl	slc_phy_page_address_calc
 	mov	w19, w0
-.L1905:
+.L1929:
 	ubfiz	x0, x22, 8, 8
 	mov	w1, 5
 	add	x0, x4, x0
@@ -11279,14 +11474,14 @@ flash_complete_page_read:
 	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1906
-	cbz	w21, .L1906
+	bne	.L1930
+	cbz	w21, .L1930
 	sub	w0, w21, #1
 	add	w1, w19, w19, lsl 1
 	add	w0, w0, w1
-.L1933:
-	adrp	x20, .LANCHOR30
-	add	x28, x20, :lo12:.LANCHOR30
+.L1957:
+	adrp	x20, .LANCHOR31
+	add	x28, x20, :lo12:.LANCHOR31
 	bl	nandc_set_seed
 	mov	x4, x25
 	mov	x3, x24
@@ -11295,36 +11490,36 @@ flash_complete_page_read:
 	mov	w0, w22
 	bl	nandc_xfer
 	cmn	w0, #1
-	bne	.L1908
-	adrp	x26, .LANCHOR45
-	ldrb	w27, [x26, #:lo12:.LANCHOR45]
-	cbz	w27, .L1909
+	bne	.L1932
+	adrp	x26, .LANCHOR46
+	ldrb	w27, [x26, #:lo12:.LANCHOR46]
+	cbz	w27, .L1933
 	ldrb	w4, [x28, 9]
 	mov	x3, x25
-	strb	wzr, [x26, #:lo12:.LANCHOR45]
+	strb	wzr, [x26, #:lo12:.LANCHOR46]
 	mov	x2, x24
 	orr	w1, w19, w21, lsl 24
 	mov	w0, w22
 	bl	flash_read_page
-	strb	w27, [x26, #:lo12:.LANCHOR45]
-	cbnz	w21, .L1910
-.L1915:
+	strb	w27, [x26, #:lo12:.LANCHOR46]
+	cbnz	w21, .L1934
+.L1939:
 	adrp	x1, .LANCHOR0
 	ldrb	w1, [x1, #:lo12:.LANCHOR0]
-	cbz	w1, .L1910
-	adrp	x1, .LANCHOR43
-	ldrb	w1, [x1, #:lo12:.LANCHOR43]
+	cbz	w1, .L1934
+	adrp	x1, .LANCHOR44
+	ldrb	w1, [x1, #:lo12:.LANCHOR44]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	blt	.L1910
-	add	x20, x20, :lo12:.LANCHOR30
+	blt	.L1934
+	add	x20, x20, :lo12:.LANCHOR31
 	ldrb	w1, [x20, 19]
 	sub	w1, w1, #4
 	and	w1, w1, 255
 	cmp	w1, 4
 	mov	w1, 256
 	csel	w0, w0, w1, hi
-.L1903:
+.L1927:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -11332,32 +11527,32 @@ flash_complete_page_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1906:
+.L1930:
 	mov	w0, w19
-	b	.L1933
-.L1910:
+	b	.L1957
+.L1934:
 	cmn	w0, #1
-	bne	.L1903
-.L1916:
+	bne	.L1927
+.L1940:
 	adrp	x0, .LANCHOR162
 	ldr	x5, [x0, #:lo12:.LANCHOR162]
-	cbnz	x5, .L1912
-.L1914:
-	adrp	x0, .LANCHOR45
+	cbnz	x5, .L1936
+.L1938:
+	adrp	x0, .LANCHOR46
 	mov	w3, -1
 	mov	w2, w23
 	mov	w1, 0
-	ldrb	w4, [x0, #:lo12:.LANCHOR45]
-	adrp	x0, .LC118
-	add	x0, x0, :lo12:.LC118
+	ldrb	w4, [x0, #:lo12:.LANCHOR46]
+	adrp	x0, .LC122
+	add	x0, x0, :lo12:.LC122
 	bl	printf
-	adrp	x0, .LANCHOR20
-	ldrb	w0, [x0, #:lo12:.LANCHOR20]
-	cbnz	w0, .L1913
+	adrp	x0, .LANCHOR21
+	ldrb	w0, [x0, #:lo12:.LANCHOR21]
+	cbnz	w0, .L1937
 	mov	w0, -1
-	b	.L1903
-.L1912:
-	add	x0, x20, :lo12:.LANCHOR30
+	b	.L1927
+.L1936:
+	add	x0, x20, :lo12:.LANCHOR31
 	mov	x3, x25
 	mov	x2, x24
 	orr	w1, w19, w21, lsl 24
@@ -11365,10 +11560,10 @@ flash_complete_page_read:
 	mov	w0, w22
 	blr	x5
 	cmn	w0, #1
-	beq	.L1914
-	b	.L1903
-.L1913:
-	add	x20, x20, :lo12:.LANCHOR30
+	beq	.L1938
+	b	.L1927
+.L1937:
+	add	x20, x20, :lo12:.LANCHOR31
 	orr	w1, w19, w21, lsl 24
 	mov	x3, x25
 	mov	x2, x24
@@ -11381,12 +11576,12 @@ flash_complete_page_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	flash_ddr_tuning_read
-.L1908:
-	cbz	w21, .L1915
-	b	.L1903
-.L1909:
-	cbnz	w21, .L1916
-	b	.L1915
+.L1932:
+	cbz	w21, .L1939
+	b	.L1927
+.L1933:
+	cbnz	w21, .L1940
+	b	.L1939
 	.size	flash_complete_page_read, .-flash_complete_page_read
 	.section	.text.queue_wait_first_req_completed,"ax",@progbits
 	.align	2
@@ -11402,60 +11597,60 @@ queue_wait_first_req_completed:
 	cmp	w0, 255
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	bne	.L1935
-.L1964:
+	bne	.L1959
+.L1992:
 	mov	w21, 0
-	b	.L1934
-.L1935:
+	b	.L1958
+.L1959:
 	adrp	x19, .LANCHOR50
 	sxtw	x20, w0
 	add	x1, x19, :lo12:.LANCHOR50
 	add	x1, x1, x20, lsl 6
 	ldrb	w2, [x1, 58]
-	ldr	w24, [x1, 40]
+	ldr	w21, [x1, 40]
 	sub	w3, w2, #1
 	cmp	w3, 10
-	bhi	.L1964
-	adrp	x1, .L1938
-	add	x1, x1, :lo12:.L1938
+	bhi	.L1992
+	adrp	x1, .L1962
+	add	x1, x1, :lo12:.L1962
 	ldrh	w1, [x1,w3,uxtw #1]
-	adr	x3, .Lrtx1938
+	adr	x3, .Lrtx1962
 	add	x1, x3, w1, sxth #2
 	br	x1
-.Lrtx1938:
+.Lrtx1962:
 	.section	.rodata.queue_wait_first_req_completed,"a",@progbits
 	.align	0
 	.align	2
-.L1938:
-	.2byte	(.L1937 - .Lrtx1938) / 4
-	.2byte	(.L1939 - .Lrtx1938) / 4
-	.2byte	(.L1940 - .Lrtx1938) / 4
-	.2byte	(.L1940 - .Lrtx1938) / 4
-	.2byte	(.L1940 - .Lrtx1938) / 4
-	.2byte	(.L1940 - .Lrtx1938) / 4
-	.2byte	(.L1941 - .Lrtx1938) / 4
-	.2byte	(.L1942 - .Lrtx1938) / 4
-	.2byte	(.L1943 - .Lrtx1938) / 4
-	.2byte	(.L1940 - .Lrtx1938) / 4
-	.2byte	(.L1943 - .Lrtx1938) / 4
+.L1962:
+	.2byte	(.L1961 - .Lrtx1962) / 4
+	.2byte	(.L1963 - .Lrtx1962) / 4
+	.2byte	(.L1964 - .Lrtx1962) / 4
+	.2byte	(.L1964 - .Lrtx1962) / 4
+	.2byte	(.L1964 - .Lrtx1962) / 4
+	.2byte	(.L1964 - .Lrtx1962) / 4
+	.2byte	(.L1965 - .Lrtx1962) / 4
+	.2byte	(.L1966 - .Lrtx1962) / 4
+	.2byte	(.L1967 - .Lrtx1962) / 4
+	.2byte	(.L1964 - .Lrtx1962) / 4
+	.2byte	(.L1967 - .Lrtx1962) / 4
 	.section	.text.queue_wait_first_req_completed
-.L1937:
+.L1961:
 	mov	w1, 64
-	mov	w0, w24
+	mov	w0, w21
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1964
+	tbz	x0, 6, .L1992
 	add	x0, x19, :lo12:.LANCHOR50
 	add	x0, x0, x20, lsl 6
 	ldp	x1, x2, [x0, 8]
-	cbz	x2, .L1945
+	cbz	x2, .L1969
 	ldrb	w3, [x0, 56]
 	adrp	x0, .LANCHOR123
 	ldrb	w0, [x0, #:lo12:.LANCHOR123]
 	cmp	w3, w0
 	csel	x1, x1, x2, ne
-.L1945:
+.L1969:
 	add	x19, x19, :lo12:.LANCHOR50
-	mov	w0, w24
+	mov	w0, w21
 	add	x20, x19, x20, lsl 6
 	ldr	x2, [x20, 24]
 	bl	flash_complete_page_read
@@ -11465,12 +11660,12 @@ queue_wait_first_req_completed:
 	ldrb	w0, [x20, 2]
 	orr	w0, w0, 8
 	strb	w0, [x20, 2]
-	b	.L1964
-.L1939:
+	b	.L1992
+.L1963:
 	mov	w1, 64
-	mov	w0, w24
+	mov	w0, w21
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1964
+	tbz	x0, 6, .L1992
 	add	x0, x19, :lo12:.LANCHOR50
 	lsl	x2, x20, 6
 	add	x1, x0, x2
@@ -11478,23 +11673,23 @@ queue_wait_first_req_completed:
 	add	x0, x0, x21, lsl 6
 	ldr	x24, [x0, 8]
 	ldp	x26, x0, [x1, 8]
-	cbz	x0, .L1946
+	cbz	x0, .L1970
 	ldrb	w2, [x1, 56]
 	adrp	x1, .LANCHOR123
 	ldrb	w1, [x1, #:lo12:.LANCHOR123]
 	cmp	w2, w1
 	csel	x26, x26, x0, ne
-.L1946:
+.L1970:
 	add	x0, x19, :lo12:.LANCHOR50
 	add	x0, x0, x21, lsl 6
 	ldr	x1, [x0, 16]
-	cbz	x1, .L1947
+	cbz	x1, .L1971
 	ldrb	w2, [x0, 56]
 	adrp	x0, .LANCHOR123
 	ldrb	w0, [x0, #:lo12:.LANCHOR123]
 	cmp	w2, w0
 	csel	x24, x24, x1, ne
-.L1947:
+.L1971:
 	add	x22, x19, :lo12:.LANCHOR50
 	mov	x1, x26
 	add	x27, x22, x20, lsl 6
@@ -11509,15 +11704,15 @@ queue_wait_first_req_completed:
 	bl	flash_complete_plane_page_read
 	mov	w25, w0
 	cmn	w23, #1
-	beq	.L1948
+	beq	.L1972
 	ldr	w0, [x27, 36]
 	cmn	w0, #1
-	beq	.L1949
+	beq	.L1973
 	ldr	x1, [x27, 24]
 	ldr	w1, [x1, 4]
 	cmp	w0, w1
-	beq	.L1949
-.L1948:
+	beq	.L1973
+.L1972:
 	add	x22, x19, :lo12:.LANCHOR50
 	adrp	x2, .LANCHOR123
 	add	x22, x22, x20, lsl 6
@@ -11531,36 +11726,36 @@ queue_wait_first_req_completed:
 	mov	w23, w0
 	ldr	w2, [x22, 36]
 	cmn	w2, #1
-	beq	.L1950
+	beq	.L1974
 	ldr	x0, [x22, 24]
 	ldr	w4, [x0, 4]
 	cmp	w2, w4
-	beq	.L1950
+	beq	.L1974
 	adrp	x1, .LANCHOR14
 	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 6, .L1950
+	tbz	x1, 6, .L1974
 	ldr	w3, [x0]
-	adrp	x0, .LC119
+	adrp	x0, .LC123
 	ldr	w1, [x22, 40]
-	add	x0, x0, :lo12:.LC119
+	add	x0, x0, :lo12:.LC123
 	bl	printf
-.L1950:
+.L1974:
 	add	x0, x19, :lo12:.LANCHOR50
 	add	x0, x0, x20, lsl 6
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L1949
+	beq	.L1973
 	ldr	x0, [x0, 24]
 	ldr	w0, [x0, 4]
 	cmp	w1, w0
-	beq	.L1949
+	beq	.L1973
 	adrp	x1, .LANCHOR167
 	adrp	x0, .LC0
 	mov	w2, 360
 	add	x1, x1, :lo12:.LANCHOR167
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1949:
+.L1973:
 	add	x0, x19, :lo12:.LANCHOR50
 	mov	w1, 13
 	add	x20, x0, x20, lsl 6
@@ -11570,16 +11765,16 @@ queue_wait_first_req_completed:
 	str	w23, [x20, 52]
 	orr	w1, w1, 8
 	strb	w1, [x20, 2]
-	beq	.L1951
+	beq	.L1975
 	add	x0, x0, x21, lsl 6
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L1953
+	beq	.L1977
 	ldr	x0, [x0, 24]
 	ldr	w0, [x0, 4]
 	cmp	w1, w0
-	beq	.L1953
-.L1951:
+	beq	.L1977
+.L1975:
 	add	x20, x19, :lo12:.LANCHOR50
 	adrp	x2, .LANCHOR123
 	add	x20, x20, x21, lsl 6
@@ -11592,36 +11787,36 @@ queue_wait_first_req_completed:
 	bl	flash_read_page_en
 	ldr	w2, [x20, 36]
 	cmn	w2, #1
-	beq	.L1955
+	beq	.L1979
 	ldr	x0, [x20, 24]
 	ldr	w4, [x0, 4]
 	cmp	w2, w4
-	beq	.L1955
+	beq	.L1979
 	adrp	x1, .LANCHOR14
 	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 6, .L1955
+	tbz	x1, 6, .L1979
 	ldr	w3, [x0]
-	adrp	x0, .LC119
+	adrp	x0, .LC123
 	ldr	w1, [x20, 40]
-	add	x0, x0, :lo12:.LC119
+	add	x0, x0, :lo12:.LC123
 	bl	printf
-.L1955:
+.L1979:
 	add	x0, x19, :lo12:.LANCHOR50
 	add	x0, x0, x21, lsl 6
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L1953
+	beq	.L1977
 	ldr	x0, [x0, 24]
 	ldr	w0, [x0, 4]
 	cmp	w1, w0
-	beq	.L1953
+	beq	.L1977
 	adrp	x1, .LANCHOR167
 	adrp	x0, .LC0
 	mov	w2, 375
 	add	x1, x1, :lo12:.LANCHOR167
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1953:
+.L1977:
 	add	x19, x19, :lo12:.LANCHOR50
 	mov	w0, 13
 	add	x21, x19, x21, lsl 6
@@ -11630,81 +11825,129 @@ queue_wait_first_req_completed:
 	str	w23, [x21, 52]
 	orr	w0, w0, 8
 	strb	w0, [x21, 2]
-	b	.L1964
-.L1940:
+	b	.L1992
+.L1964:
+	mov	w0, w21
 	mov	w1, 64
-	mov	w0, w24
 	bl	flash_wait_device_ready
 	mov	w21, w0
-	tbz	x21, 6, .L1964
-	add	x19, x19, :lo12:.LANCHOR50
+	tbz	x21, 6, .L1992
 	mov	w0, 5
-	add	x20, x19, x20, lsl 6
 	tst	w21, w0
-	beq	.L1963
-	ldrb	w1, [x20, 1]
+	beq	.L1980
+	add	x19, x19, :lo12:.LANCHOR50
 	mov	w0, 12
-	ldr	w3, [x20, 40]
+	add	x20, x19, x20, lsl 6
 	mov	w4, 12
-	strb	w0, [x20, 58]
 	mov	w2, w21
-	adrp	x0, .LC120
-	add	x0, x0, :lo12:.LC120
+	ldrb	w1, [x20, 1]
+	ldr	w3, [x20, 40]
+	strb	w0, [x20, 58]
+	adrp	x0, .LC124
+	add	x0, x0, :lo12:.LC124
 	bl	printf
-.L2024:
+.L2056:
 	mov	w0, -1
 	str	w0, [x20, 52]
-	b	.L1934
-.L1943:
-	cmp	w2, 11
+	b	.L1958
+.L1980:
 	add	x21, x19, :lo12:.LANCHOR50
+	mov	w0, 13
+	add	x21, x21, x20, lsl 6
+	strb	w0, [x21, 58]
+	adrp	x0, .LANCHOR102
+	ldr	x0, [x0, #:lo12:.LANCHOR102]
+	ldr	w1, [x0, 156]
+	mov	w0, 20041
+	str	wzr, [x21, 52]
+	movk	w0, 0x444b, lsl 16
+	cmp	w1, w0
+	bne	.L1992
+	ldrh	w0, [x21, 50]
+	cbnz	w0, .L1992
+	adrp	x2, .LANCHOR123
+	adrp	x22, .LANCHOR163
+	ldr	w1, [x21, 40]
+	ldrb	w4, [x2, #:lo12:.LANCHOR123]
+	adrp	x2, .LANCHOR164
+	ldr	x3, [x22, #:lo12:.LANCHOR163]
+	ldr	x2, [x2, #:lo12:.LANCHOR164]
+	ubfx	x0, x1, 21, 3
+	and	w1, w1, -14680065
+	bl	flash_read_page_en
+	cmn	w0, #1
+	beq	.L1981
+	ldr	x1, [x22, #:lo12:.LANCHOR163]
+	ldr	x2, [x21, 24]
+	ldr	w1, [x1]
+	ldr	w2, [x2]
+	cmp	w2, w1
+	beq	.L1992
+.L1981:
+	add	x19, x19, :lo12:.LANCHOR50
+	adrp	x1, .LANCHOR46
+	add	x20, x19, x20, lsl 6
+	mov	w3, w0
+	ldrb	w4, [x1, #:lo12:.LANCHOR46]
+	adrp	x0, .LC125
+	add	x0, x0, :lo12:.LC125
+	ldrb	w1, [x20, 1]
+	ldr	w2, [x20, 40]
+	bl	printf
+	mov	w0, -1
+	str	w0, [x20, 52]
+	b	.L1992
+.L1967:
+	cmp	w2, 11
+	add	x22, x19, :lo12:.LANCHOR50
 	ubfiz	x0, x0, 6, 8
 	mov	w1, 3
 	mov	w2, 10
-	add	x0, x21, x0
+	add	x0, x22, x0
 	csel	w2, w2, w1, eq
-	ubfx	x3, x24, 21, 3
-	mov	x22, x21
-.L1958:
+	ubfx	x3, x21, 21, 3
+.L1983:
 	ldrb	w1, [x0]
 	cmp	w1, 255
-	bne	.L1962
+	bne	.L1990
 	mov	w21, -1
-	b	.L1934
-.L1962:
+	b	.L1958
+.L1990:
 	sxtw	x23, w1
 	ubfiz	x0, x1, 6, 8
 	add	x1, x22, x23, lsl 6
 	add	x0, x22, x0
 	ldrb	w4, [x1, 58]
 	cmp	w4, w2
-	bne	.L1958
+	bne	.L1983
 	ldr	w1, [x1, 40]
 	ubfx	x1, x1, 21, 3
 	cmp	w3, w1
-	bne	.L1958
-	mov	w0, w24
+	bne	.L1983
+	mov	w0, w21
 	mov	w1, 64
 	bl	flash_wait_device_ready
-	mov	w24, w0
-	and	w21, w0, 64
-	tbz	x24, 6, .L1960
+	mov	w21, w0
+	tbnz	x21, 6, .L1985
+.L2055:
+	mov	w21, 0
+	b	.L1986
+.L1985:
+	tst	x21, 15
+	beq	.L1987
 	add	x22, x22, x20, lsl 6
-	ands	w21, w0, 15
-	beq	.L1961
-	ldrb	w1, [x22, 1]
 	mov	w2, w0
-	ldr	w3, [x22, 40]
 	mov	w4, 12
-	adrp	x0, .LC121
-	add	x0, x0, :lo12:.LC121
-	mov	w21, w24
+	adrp	x0, .LC126
+	add	x0, x0, :lo12:.LC126
+	ldrb	w1, [x22, 1]
+	ldr	w3, [x22, 40]
 	bl	printf
 	mov	w0, 12
 	strb	w0, [x22, 58]
 	mov	w0, -1
 	str	w0, [x22, 52]
-.L1960:
+.L1986:
 	add	x1, x19, :lo12:.LANCHOR50
 	add	x20, x1, x20, lsl 6
 	add	x1, x1, x23, lsl 6
@@ -11712,7 +11955,7 @@ queue_wait_first_req_completed:
 	strb	w0, [x1, 58]
 	ldr	w0, [x20, 52]
 	str	w0, [x1, 52]
-.L1934:
+.L1958:
 	mov	w0, w21
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -11721,40 +11964,81 @@ queue_wait_first_req_completed:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1961:
+.L1987:
+	add	x21, x22, x20, lsl 6
 	mov	w0, 13
-	str	wzr, [x22, 52]
-	strb	w0, [x22, 58]
-	b	.L1960
-.L1941:
+	strb	w0, [x21, 58]
+	adrp	x0, .LANCHOR102
+	ldr	x0, [x0, #:lo12:.LANCHOR102]
+	ldr	w1, [x0, 156]
+	mov	w0, 20041
+	str	wzr, [x21, 52]
+	movk	w0, 0x444b, lsl 16
+	cmp	w1, w0
+	bne	.L2055
+	ldrh	w0, [x21, 50]
+	cbnz	w0, .L2055
+	adrp	x2, .LANCHOR123
+	adrp	x22, .LANCHOR163
+	ldr	w1, [x21, 40]
+	ldrb	w4, [x2, #:lo12:.LANCHOR123]
+	adrp	x2, .LANCHOR164
+	ldr	x3, [x22, #:lo12:.LANCHOR163]
+	ldr	x2, [x2, #:lo12:.LANCHOR164]
+	ubfx	x0, x1, 21, 3
+	and	w1, w1, -14680065
+	bl	flash_read_page_en
+	cmn	w0, #1
+	beq	.L1989
+	ldr	x1, [x22, #:lo12:.LANCHOR163]
+	ldr	x2, [x21, 24]
+	ldr	w1, [x1]
+	ldr	w2, [x2]
+	cmp	w2, w1
+	beq	.L2055
+.L1989:
+	add	x21, x19, :lo12:.LANCHOR50
+	adrp	x1, .LANCHOR46
+	add	x21, x21, x20, lsl 6
+	mov	w3, w0
+	ldrb	w4, [x1, #:lo12:.LANCHOR46]
+	adrp	x0, .LC127
+	add	x0, x0, :lo12:.LC127
+	ldrb	w1, [x21, 1]
+	ldr	w2, [x21, 40]
+	bl	printf
+	mov	w0, -1
+	str	w0, [x21, 52]
+	b	.L2055
+.L1965:
+	mov	w0, w21
 	mov	w1, 32
-	mov	w0, w24
 	bl	flash_wait_device_ready
 	mov	w21, w0
-	tbz	x21, 5, .L1964
+	tbz	x21, 5, .L1992
 	add	x19, x19, :lo12:.LANCHOR50
 	tst	x21, 15
 	add	x20, x19, x20, lsl 6
-	beq	.L1963
+	beq	.L1991
 	mov	w0, 12
 	strb	w0, [x20, 58]
-	b	.L2024
-.L1963:
+	b	.L2056
+.L1991:
 	mov	w0, 13
 	str	wzr, [x20, 52]
 	strb	w0, [x20, 58]
-	b	.L1964
-.L1942:
+	b	.L1992
+.L1966:
 	mov	w1, 64
-	mov	w0, w24
+	mov	w0, w21
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1964
+	tbz	x0, 6, .L1992
 	add	x19, x19, :lo12:.LANCHOR50
 	add	x19, x19, x20, lsl 6
 	str	w0, [x19, 52]
 	mov	w0, 7
 	strb	w0, [x19, 58]
-	b	.L1964
+	b	.L1992
 	.size	queue_wait_first_req_completed, .-queue_wait_first_req_completed
 	.section	.text.sblk_wait_write_queue_completed,"ax",@progbits
 	.align	2
@@ -11766,17 +12050,17 @@ sblk_wait_write_queue_completed:
 	str	x19, [sp, 16]
 	adrp	x19, .LANCHOR54
 	add	x19, x19, :lo12:.LANCHOR54
-.L2026:
+.L2058:
 	ldrb	w0, [x19]
 	cmp	w0, 255
-	bne	.L2027
+	bne	.L2059
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2027:
+.L2059:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2026
+	b	.L2058
 	.size	sblk_wait_write_queue_completed, .-sblk_wait_write_queue_completed
 	.section	.text.ftl_read_page,"ax",@progbits
 	.align	2
@@ -11849,14 +12133,14 @@ sblk_read_page:
 	add	x26, x26, :lo12:.LANCHOR168
 	add	x21, x21, :lo12:.LANCHOR50
 	stp	x27, x28, [sp, 80]
-	adrp	x27, .LANCHOR107
-.L2034:
-	cbnz	w20, .L2044
-.L2057:
+	adrp	x27, .LANCHOR103
+.L2066:
+	cbnz	w20, .L2076
+.L2089:
 	adrp	x19, .LANCHOR50
 	add	x19, x19, :lo12:.LANCHOR50
-.L2045:
-	cbnz	w22, .L2047
+.L2077:
+	cbnz	w22, .L2079
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -11865,51 +12149,51 @@ sblk_read_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2044:
+.L2076:
 	ldrb	w24, [x19]
 	ldr	w25, [x19, 40]
-.L2035:
+.L2067:
 	mov	w1, 0
 	mov	w0, w25
 	bl	queue_lun_state
-	cbnz	w0, .L2036
+	cbnz	w0, .L2068
 	cmp	w20, 1
-	beq	.L2041
+	beq	.L2073
 	ldrb	w0, [x26]
-	cbnz	w0, .L2038
-.L2041:
+	cbnz	w0, .L2070
+.L2073:
 	mov	x0, x19
 	bl	queue_read_cmd
-	b	.L2039
-.L2036:
+	b	.L2071
+.L2068:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2035
-.L2038:
+	b	.L2067
+.L2070:
 	ldrb	w0, [x19]
 	ubfx	x4, x25, 21, 3
 	cmp	w0, 255
-	bne	.L2040
+	bne	.L2072
 	str	w4, [x29, 124]
-	mov	w2, 652
+	mov	w2, 661
 	adrp	x1, .LANCHOR169
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR169
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	ldr	w4, [x29, 124]
-.L2040:
+.L2072:
 	ldrb	w28, [x19]
 	sbfiz	x2, x28, 6, 32
 	add	x3, x21, x2
 	ldr	w1, [x3, 40]
 	ubfx	x0, x1, 21, 3
 	cmp	w4, w0
-	bne	.L2041
-	ldrh	w0, [x27, #:lo12:.LANCHOR107]
+	bne	.L2073
+	ldrh	w0, [x27, #:lo12:.LANCHOR103]
 	add	w25, w0, w25
 	cmp	w1, w25
-	bne	.L2041
+	bne	.L2073
 	ldr	w0, [x19, 40]
 	adrp	x25, .LANCHOR54
 	ldrb	w24, [x21, x2]
@@ -11935,26 +12219,26 @@ sblk_read_page:
 	add	x1, x21, x1
 	strb	w4, [x21, x2]
 	bl	buf_add_tail
-.L2039:
+.L2071:
 	subs	w20, w20, #1
-	beq	.L2057
+	beq	.L2089
 	ubfiz	x19, x24, 6, 8
 	add	x19, x21, x19
-	b	.L2034
-.L2047:
+	b	.L2066
+.L2079:
 	ldrb	w0, [x23, 58]
 	cmp	w0, 13
-	bne	.L2046
+	bne	.L2078
 	ldrb	w0, [x23]
 	sub	w22, w22, #1
 	cmp	w0, 255
-	beq	.L2046
+	beq	.L2078
 	ubfiz	x23, x0, 6, 8
 	add	x23, x19, x23
-.L2046:
+.L2078:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2045
+	b	.L2077
 	.size	sblk_read_page, .-sblk_read_page
 	.section	.text.flash_prog_page,"ax",@progbits
 	.align	2
@@ -11981,22 +12265,22 @@ flash_prog_page:
 	and	w23, w1, 2097151
 	ubfx	x25, x21, 24, 2
 	mov	x27, x3
-	tbz	x0, 4, .L2060
-	adrp	x0, .LC122
+	tbz	x0, 4, .L2092
+	adrp	x0, .LC128
 	mov	w3, w4
 	mov	w2, w25
-	add	x0, x0, :lo12:.LC122
+	add	x0, x0, :lo12:.LC128
 	bl	printf
-.L2060:
+.L2092:
 	bl	nandc_wait_flash_ready
 	mov	w0, w20
 	bl	hynix_reconfig_rr_para
 	mov	w0, w20
 	bl	nandc_cs
 	mov	w0, w20
-	cbnz	w25, .L2061
+	cbnz	w25, .L2093
 	bl	zftl_flash_enter_slc_mode
-.L2062:
+.L2094:
 	add	x19, x24, x19, lsl 8
 	mov	w0, 128
 	str	w0, [x19, 2056]
@@ -12010,10 +12294,10 @@ flash_prog_page:
 	str	w0, [x19, 2052]
 	mov	w0, w23
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR30+9
+	adrp	x0, .LANCHOR31+9
 	mov	x3, x27
 	mov	x2, x26
-	ldrb	w1, [x0, #:lo12:.LANCHOR30+9]
+	ldrb	w1, [x0, #:lo12:.LANCHOR31+9]
 	mov	w0, 1
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
@@ -12023,15 +12307,15 @@ flash_prog_page:
 	mov	x0, x22
 	bl	flash_read_status
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.28
+	bl	nandc_de_cs.constprop.29
 	and	w19, w2, 4
-	tbz	x2, 2, .L2059
-	adrp	x0, .LC123
+	tbz	x2, 2, .L2091
+	adrp	x0, .LC129
 	mov	w2, w19
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC123
+	add	x0, x0, :lo12:.LC129
 	bl	printf
-.L2059:
+.L2091:
 	mov	w0, w19
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -12040,9 +12324,9 @@ flash_prog_page:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2061:
+.L2093:
 	bl	zftl_flash_exit_slc_mode
-	b	.L2062
+	b	.L2094
 	.size	flash_prog_page, .-flash_prog_page
 	.section	.text.flash_test_blk,"ax",@progbits
 	.align	2
@@ -12073,10 +12357,10 @@ flash_test_blk:
 	mov	w1, w19
 	bl	flash_erase_block
 	cmn	w0, #1
-	bne	.L2072
-.L2074:
+	bne	.L2104
+.L2106:
 	mov	w21, -1
-.L2073:
+.L2105:
 	mov	w1, w19
 	mov	w0, w20
 	bl	flash_erase_block
@@ -12086,9 +12370,9 @@ flash_test_blk:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2072:
-	adrp	x23, .LANCHOR30
-	add	x23, x23, :lo12:.LANCHOR30
+.L2104:
+	adrp	x23, .LANCHOR31
+	add	x23, x23, :lo12:.LANCHOR31
 	ldr	x3, [x21, #:lo12:.LANCHOR158]
 	mov	w1, w19
 	ldr	x2, [x22, #:lo12:.LANCHOR156]
@@ -12096,7 +12380,7 @@ flash_test_blk:
 	ldrb	w4, [x23, 9]
 	bl	flash_prog_page
 	cmn	w0, #1
-	beq	.L2074
+	beq	.L2106
 	ldrb	w4, [x23, 9]
 	mov	w1, w19
 	ldr	x3, [x21, #:lo12:.LANCHOR158]
@@ -12104,20 +12388,20 @@ flash_test_blk:
 	ldr	x2, [x22, #:lo12:.LANCHOR156]
 	bl	flash_read_page
 	cmn	w0, #1
-	beq	.L2074
+	beq	.L2106
 	ldr	x0, [x22, #:lo12:.LANCHOR156]
 	ldr	w1, [x0]
 	mov	w0, 42405
 	movk	w0, 0xa5a5, lsl 16
 	cmp	w1, w0
-	bne	.L2074
+	bne	.L2106
 	ldr	x0, [x21, #:lo12:.LANCHOR158]
 	ldr	w1, [x0]
 	mov	w0, 23130
 	movk	w0, 0x5a5a, lsl 16
 	cmp	w1, w0
 	csetm	w21, ne
-	b	.L2073
+	b	.L2105
 	.size	flash_test_blk, .-flash_test_blk
 	.section	.text.id_block_prog_msb_ff_data,"ax",@progbits
 	.align	2
@@ -12128,45 +12412,45 @@ id_block_prog_msb_ff_data:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	and	w22, w0, 255
-	adrp	x0, .LANCHOR49
+	adrp	x0, .LANCHOR19
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
-	ldrb	w0, [x0, #:lo12:.LANCHOR49]
+	ldrb	w0, [x0, #:lo12:.LANCHOR19]
 	str	x25, [sp, 64]
-	cbnz	w0, .L2082
-	adrp	x20, .LANCHOR30
-	add	x20, x20, :lo12:.LANCHOR30
+	cbnz	w0, .L2114
+	adrp	x20, .LANCHOR31
+	add	x20, x20, :lo12:.LANCHOR31
 	ldrb	w0, [x20, 19]
 	sub	w0, w0, #5
 	and	w3, w0, 255
 	cmp	w3, 63
-	bhi	.L2082
+	bhi	.L2114
 	and	w19, w2, 65535
 	mov	x2, 16391
 	movk	x2, 0x4000, lsl 16
 	movk	x2, 0x8000, lsl 48
 	lsr	x0, x2, x3
-	tbz	x0, 0, .L2082
+	tbz	x0, 0, .L2114
 	adrp	x21, .LANCHOR138
 	mov	w23, w1
 	add	x21, x21, :lo12:.LANCHOR138
 	mov	w25, 65535
 	adrp	x24, .LANCHOR156
-.L2084:
+.L2116:
 	ldrh	w0, [x20, 10]
 	cmp	w0, w19
-	bhi	.L2085
-.L2082:
+	bhi	.L2117
+.L2114:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2085:
+.L2117:
 	ldrh	w0, [x21, w19, sxtw 1]
 	cmp	w0, w25
-	bne	.L2082
+	bne	.L2114
 	ldr	x0, [x24, #:lo12:.LANCHOR156]
 	mov	w2, 16384
 	mov	w1, 255
@@ -12179,7 +12463,7 @@ id_block_prog_msb_ff_data:
 	mov	w0, w22
 	and	w19, w19, 65535
 	bl	flash_prog_page
-	b	.L2084
+	b	.L2116
 	.size	id_block_prog_msb_ff_data, .-id_block_prog_msb_ff_data
 	.section	.text.flash_dual_page_prog,"ax",@progbits
 	.align	2
@@ -12210,25 +12494,25 @@ flash_dual_page_prog:
 	mov	x26, x5
 	and	w20, w1, 2097151
 	ubfx	x24, x21, 24, 2
-	tbz	x2, 4, .L2088
-	adrp	x0, .LC122
+	tbz	x2, 4, .L2120
+	adrp	x0, .LC128
 	mov	w3, w6
 	mov	w2, w24
-	add	x0, x0, :lo12:.LC122
+	add	x0, x0, :lo12:.LC128
 	bl	printf
-.L2088:
+.L2120:
 	bl	nandc_wait_flash_ready
 	mov	w0, w22
 	bl	nandc_cs
 	mov	w0, w22
-	cbnz	w24, .L2089
+	cbnz	w24, .L2121
 	bl	zftl_flash_enter_slc_mode
-.L2090:
+.L2122:
 	add	x19, x23, x19, lsl 8
 	mov	w24, 128
 	and	w0, w21, 255
-	adrp	x22, .LANCHOR30
-	add	x22, x22, :lo12:.LANCHOR30
+	adrp	x22, .LANCHOR31
+	add	x22, x22, :lo12:.LANCHOR31
 	mov	w23, 16
 	str	w24, [x19, 2056]
 	str	wzr, [x19, 2052]
@@ -12270,18 +12554,18 @@ flash_dual_page_prog:
 	ldr	x0, [x29, 104]
 	bl	flash_read_status
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.28
+	bl	nandc_de_cs.constprop.29
 	and	w19, w2, 4
-	tbz	x2, 2, .L2087
+	tbz	x2, 2, .L2119
 	ldr	x0, [x29, 96]
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2087
-	adrp	x0, .LC123
+	tbz	x0, 12, .L2119
+	adrp	x0, .LC129
 	mov	w2, w19
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC123
+	add	x0, x0, :lo12:.LC129
 	bl	printf
-.L2087:
+.L2119:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -12290,17 +12574,17 @@ flash_dual_page_prog:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2089:
+.L2121:
 	bl	zftl_flash_exit_slc_mode
-	b	.L2090
+	b	.L2122
 	.size	flash_dual_page_prog, .-flash_dual_page_prog
-	.section	.text.fw_flash_page_prog.constprop.25,"ax",@progbits
+	.section	.text.fw_flash_page_prog.constprop.26,"ax",@progbits
 	.align	2
-	.type	fw_flash_page_prog.constprop.25, %function
-fw_flash_page_prog.constprop.25:
+	.type	fw_flash_page_prog.constprop.26, %function
+fw_flash_page_prog.constprop.26:
 	stp	x29, x30, [sp, -64]!
-	adrp	x4, .LANCHOR30
-	add	x4, x4, :lo12:.LANCHOR30
+	adrp	x4, .LANCHOR31
+	add	x4, x4, :lo12:.LANCHOR31
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x20, x1
@@ -12309,14 +12593,14 @@ fw_flash_page_prog.constprop.25:
 	str	x23, [sp, 48]
 	ldrb	w19, [x4, 9]
 	udiv	w19, w0, w19
-	adrp	x0, .LANCHOR43
-	ldrb	w23, [x0, #:lo12:.LANCHOR43]
+	adrp	x0, .LANCHOR44
+	ldrb	w23, [x0, #:lo12:.LANCHOR44]
 	adrp	x0, .LANCHOR17
 	ldrb	w0, [x0, #:lo12:.LANCHOR17]
 	bl	nandc_bch_sel
 	ldrb	w0, [x4, 7]
 	cmp	w0, 9
-	bne	.L2103
+	bne	.L2135
 	adrp	x22, .LANCHOR156
 	mov	w2, 16384
 	mov	w1, 255
@@ -12330,7 +12614,7 @@ fw_flash_page_prog.constprop.25:
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_dual_page_prog
-.L2106:
+.L2138:
 	mov	w3, w0
 	mov	w0, w23
 	bl	nandc_bch_sel
@@ -12340,15 +12624,15 @@ fw_flash_page_prog.constprop.25:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2103:
+.L2135:
 	mov	w4, 4
 	mov	x3, x21
 	mov	x2, x20
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_prog_page
-	b	.L2106
-	.size	fw_flash_page_prog.constprop.25, .-fw_flash_page_prog.constprop.25
+	b	.L2138
+	.size	fw_flash_page_prog.constprop.26, .-fw_flash_page_prog.constprop.26
 	.section	.text.idb_write_data,"ax",@progbits
 	.align	2
 	.global	idb_write_data
@@ -12365,20 +12649,20 @@ idb_write_data:
 	stp	x27, x28, [sp, 80]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	ldr	x28, [x22, #:lo12:.LANCHOR135]
-	bls	.L2108
+	ldr	x27, [x22, #:lo12:.LANCHOR135]
+	bls	.L2140
 	cmp	w1, 575
-	bhi	.L2109
+	bhi	.L2141
 	mov	x21, x2
 	mov	w20, w3
-	cbnz	x28, .L2110
+	cbnz	x27, .L2142
 	mov	w0, 262144
 	bl	ftl_malloc
 	str	x0, [x22, #:lo12:.LANCHOR135]
-	cbnz	x0, .L2111
-.L2116:
+	cbnz	x0, .L2143
+.L2148:
 	mov	w0, -1
-.L2107:
+.L2139:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -12386,39 +12670,39 @@ idb_write_data:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 272
 	ret
-.L2111:
+.L2143:
 	mov	w2, 262144
 	mov	w1, 0
 	bl	ftl_memset
-.L2110:
+.L2142:
 	adrp	x23, .LANCHOR137
 	ldr	x0, [x23, #:lo12:.LANCHOR137]
-	cbz	x0, .L2113
-.L2117:
+	cbz	x0, .L2145
+.L2149:
 	adrp	x1, .LANCHOR136
 	mov	w2, 1
 	ldr	x0, [x22, #:lo12:.LANCHOR135]
 	cmp	w19, 64
 	str	w2, [x1, #:lo12:.LANCHOR136]
-	bhi	.L2213
+	bhi	.L2246
 	mov	w1, 64
 	sub	w19, w1, w19
 	sub	w2, w20, w19
 	ubfiz	x19, x19, 9, 25
 	lsl	w2, w2, 9
 	add	x1, x21, x19
-.L2219:
+.L2252:
 	bl	ftl_memcpy
-.L2218:
+.L2251:
 	mov	w0, 0
-	b	.L2107
-.L2113:
+	b	.L2139
+.L2145:
 	mov	w0, 262144
 	bl	ftl_malloc
 	str	x0, [x23, #:lo12:.LANCHOR137]
-	cbnz	x0, .L2117
-	b	.L2116
-.L2213:
+	cbnz	x0, .L2149
+	b	.L2148
+.L2246:
 	mov	w2, 576
 	sub	w2, w2, w19
 	cmp	w20, w2
@@ -12428,504 +12712,522 @@ idb_write_data:
 	lsl	w2, w2, 9
 	mov	x1, x21
 	add	x0, x0, x19
-	b	.L2219
-.L2108:
+	b	.L2252
+.L2140:
 	cmp	w1, 575
-	bls	.L2218
-.L2109:
+	bls	.L2251
+.L2141:
 	adrp	x0, .LANCHOR136
 	ldr	w0, [x0, #:lo12:.LANCHOR136]
-	cbz	w0, .L2218
-	adrp	x1, .LANCHOR30
-	add	x0, x1, :lo12:.LANCHOR30
+	cbz	w0, .L2251
+	adrp	x1, .LANCHOR31
+	add	x0, x1, :lo12:.LANCHOR31
 	str	x1, [x29, 152]
-	adrp	x8, .LANCHOR49
+	adrp	x8, .LANCHOR19
 	ldrb	w20, [x0, 9]
 	ldrh	w19, [x0, 26]
 	adrp	x0, .LANCHOR0
 	mov	x7, x0
 	ldrb	w2, [x0, #:lo12:.LANCHOR0]
-	str	w2, [x29, 160]
+	str	w2, [x29, 188]
 	uxtw	x0, w2
-	cbz	w0, .L2166
-	ldrb	w0, [x8, #:lo12:.LANCHOR49]
+	cbz	w0, .L2199
+	ldrb	w0, [x8, #:lo12:.LANCHOR19]
 	cmp	w0, 0
 	cset	w0, eq
-	str	w0, [x29, 164]
-.L2119:
+	str	w0, [x29, 176]
+.L2151:
 	mov	w0, 0
 	bl	zftl_flash_exit_slc_mode
-	ldrb	w0, [x8, #:lo12:.LANCHOR49]
+	ldrb	w0, [x8, #:lo12:.LANCHOR19]
 	strb	w0, [x7, #:lo12:.LANCHOR0]
 	mov	w0, 35899
-	ldr	w1, [x28]
+	ldr	w1, [x27]
 	movk	w0, 0xfcdc, lsl 16
 	cmp	w1, w0
-	bne	.L2121
+	bne	.L2153
 	ldr	x0, [x29, 152]
-	mov	w2, 65535
+	mov	w2, 65023
 	mov	w3, 4097
-	add	x1, x0, :lo12:.LANCHOR30
+	add	x1, x0, :lo12:.LANCHOR31
 	ldrh	w0, [x1, 10]
 	ldrb	w1, [x1, 12]
 	lsl	w0, w0, 2
-	sdiv	w25, w0, w1
+	sdiv	w26, w0, w1
+	add	x1, x27, 258048
 	mov	w0, 512
-	cmp	w25, 512
-	csel	w25, w25, w0, lt
-	mov	x0, 262140
-	add	x1, x28, x0
+	add	x1, x1, 2044
+	cmp	w26, 512
+	csel	w26, w26, w0, lt
 	mov	w0, 0
-.L2125:
+.L2157:
 	ldr	w4, [x1]
-	cbnz	w4, .L2123
-	ldr	w4, [x28, w0, uxtw 2]
+	cbnz	w4, .L2155
+	ldr	w4, [x27, w0, uxtw 2]
 	add	w0, w0, 1
-	str	w4, [x1], -4
+	str	w4, [x1, 2048]
 	cmp	w0, w3
 	sub	w2, w2, #1
 	csel	w0, w0, wzr, cc
+	sub	x1, x1, #4
 	cmp	w2, 4096
-	bne	.L2125
-.L2123:
-	ldr	w1, [x28, w2, uxtw 2]
+	bne	.L2157
+.L2155:
+	ldr	w1, [x27, w2, uxtw 2]
 	mul	w19, w19, w20
-	mov	w3, w25
-	adrp	x0, .LC124
-	add	x0, x0, :lo12:.LC124
+	mov	w3, w26
+	adrp	x0, .LC130
+	add	x0, x0, :lo12:.LC130
 	bl	printf
-	stp	wzr, wzr, [x29, 192]
+	str	wzr, [x29, 184]
 	and	w0, w19, 65535
+	str	wzr, [x29, 200]
 	str	w0, [x29, 140]
-	adrp	x0, .LANCHOR45
-	add	x0, x0, :lo12:.LANCHOR45
-	str	x0, [x29, 200]
-.L2162:
+	adrp	x0, .LANCHOR46
+	add	x0, x0, :lo12:.LANCHOR46
+	str	x0, [x29, 192]
+.L2195:
 	adrp	x20, .LANCHOR137
 	mov	w1, 0
 	mov	w2, 512
 	ldr	x0, [x20, #:lo12:.LANCHOR137]
 	bl	ftl_memset
-	adrp	x0, .LANCHOR26
-	ldr	w1, [x29, 196]
-	ldr	x0, [x0, #:lo12:.LANCHOR26]
+	adrp	x0, .LANCHOR27
+	ldr	w1, [x29, 200]
+	ldr	x0, [x0, #:lo12:.LANCHOR27]
 	add	x0, x0, x1, uxtw
-	ldrb	w0, [x0, 32]
-	cmp	w0, 255
-	beq	.L2126
-	ldr	w1, [x29, 140]
-	mul	w26, w0, w1
-	ldr	w0, [x29, 164]
-	cbz	w0, .L2127
-	mov	w0, 0
-	bl	zftl_flash_exit_slc_mode
-	adrp	x0, .LANCHOR0
-	strb	wzr, [x0, #:lo12:.LANCHOR0]
-	adrp	x0, .LANCHOR49
-	strb	wzr, [x0, #:lo12:.LANCHOR49]
-.L2127:
+	ldrb	w19, [x0, 32]
+	cmp	w19, 255
+	beq	.L2158
+	ldr	w0, [x29, 140]
+	mul	w19, w19, w0
+	ldr	w0, [x29, 176]
+	cbz	w0, .L2159
+	cmp	w1, 1
+	adrp	x8, .LANCHOR0
+	adrp	x7, .LANCHOR19
+	bne	.L2160
+	ldrb	w0, [x29, 188]
+	strb	w0, [x8, #:lo12:.LANCHOR0]
+	strb	w0, [x7, #:lo12:.LANCHOR19]
+.L2159:
 	ldr	x0, [x29, 152]
-	add	x24, x0, :lo12:.LANCHOR30
-	ldr	x0, [x29, 200]
-	ldrb	w21, [x24, 9]
+	add	x25, x0, :lo12:.LANCHOR31
+	ldr	x0, [x29, 192]
+	ldrb	w22, [x25, 9]
+	ldrh	w23, [x25, 26]
 	ldrb	w0, [x0]
 	str	w0, [x29, 136]
-	ldr	x0, [x29, 200]
-	udiv	w1, w26, w21
-	ldrh	w22, [x24, 26]
+	udiv	w1, w19, w22
+	ldr	x0, [x29, 192]
+	mul	w23, w22, w23
+	and	w21, w23, 65535
 	strb	wzr, [x0]
 	mov	w0, 0
 	bl	flash_erase_block
-	mul	w22, w21, w22
-	ldrh	w0, [x24, 10]
-	and	w19, w22, 65535
-	ldrb	w1, [x24, 12]
-	lsl	w0, w0, 2
-	udiv	w22, w26, w19
-	sdiv	w0, w0, w1
-	msub	w22, w22, w19, w26
-	str	w0, [x29, 184]
-	sub	w23, w26, w22
-	cmp	w26, w23
-	bne	.L2169
-	adrp	x0, .LANCHOR27
-	ldrb	w0, [x0, #:lo12:.LANCHOR27]
+	udiv	w23, w19, w21
+	ldrb	w0, [x25, 12]
+	msub	w23, w23, w21, w19
+	ldrh	w21, [x25, 10]
+	sub	w24, w19, w23
+	lsl	w21, w21, 2
+	cmp	w19, w24
+	sdiv	w0, w21, w0
+	str	w0, [x29, 180]
+	bne	.L2202
+	adrp	x0, .LANCHOR28
+	ldrb	w0, [x0, #:lo12:.LANCHOR28]
 	cmp	w0, 9
-	bne	.L2169
-	ldr	x27, [x20, #:lo12:.LANCHOR137]
+	bne	.L2202
+	ldr	x21, [x20, #:lo12:.LANCHOR137]
 	mov	w2, 1024
 	mov	w1, 0
-	mov	x0, x27
+	mov	x0, x21
 	bl	ftl_memset
 	mov	w0, 18766
 	movk	w0, 0x464e, lsl 16
-	str	w0, [x27]
+	str	w0, [x21]
 	mov	w0, 12
-	str	w0, [x27, 4]
-	adrp	x0, .LANCHOR49
-	strb	wzr, [x27, 16]
-	str	wzr, [x27, 12]
-	ldrb	w0, [x0, #:lo12:.LANCHOR49]
-	cbz	w0, .L2129
-	ldrb	w0, [x24, 29]
-	strb	w0, [x27, 16]
-.L2129:
+	str	w0, [x21, 4]
+	adrp	x0, .LANCHOR19
+	strb	wzr, [x21, 16]
+	str	wzr, [x21, 12]
+	ldrb	w0, [x0, #:lo12:.LANCHOR19]
+	cbz	w0, .L2162
+	ldrb	w0, [x25, 29]
+	strb	w0, [x21, 16]
+.L2162:
 	mov	w0, 4
-	strb	w0, [x27, 17]
-	adrp	x0, .LANCHOR30
-	add	x0, x0, :lo12:.LANCHOR30
-	cmp	w21, 8
-	strb	wzr, [x27, 20]
-	strh	wzr, [x27, 22]
+	strb	w0, [x21, 17]
+	adrp	x0, .LANCHOR31
+	add	x0, x0, :lo12:.LANCHOR31
+	cmp	w22, 8
+	strb	wzr, [x21, 20]
+	strh	wzr, [x21, 22]
 	ldrh	w1, [x0, 10]
 	ldrb	w0, [x0, 12]
 	sdiv	w0, w1, w0
 	mov	w1, 16
-	strh	w0, [x27, 18]
+	strh	w0, [x21, 18]
 	mov	w0, 70
 	csel	w0, w0, w1, hi
-	strb	w0, [x27, 21]
+	strb	w0, [x21, 21]
 	mov	w1, 12
-	add	x0, x27, 12
+	add	x0, x21, 12
 	bl	js_hash
-	str	w0, [x27, 8]
-	sub	w0, w25, #4
-	str	w0, [x29, 188]
-.L2128:
-	adrp	x0, .LANCHOR49
-	mov	x24, x28
-	add	x0, x0, :lo12:.LANCHOR49
-	mov	w19, 0
-	str	x0, [x29, 176]
+	str	w0, [x21, 8]
+	sub	w0, w26, #4
+	str	w0, [x29, 204]
+.L2161:
+	adrp	x0, .LANCHOR19
+	mov	x25, x27
+	add	x0, x0, :lo12:.LANCHOR19
+	mov	w28, 0
+	str	x0, [x29, 168]
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
-	str	x0, [x29, 168]
-.L2131:
-	ldr	w0, [x29, 184]
-	cmp	w0, w19
-	bhi	.L2142
+	str	x0, [x29, 160]
+.L2164:
+	ldr	w0, [x29, 180]
+	cmp	w0, w28
+	bhi	.L2175
 	ldr	x0, [x29, 152]
-	mov	w21, 4
-	ldr	x20, [x20, #:lo12:.LANCHOR137]
-	mov	w22, 0
-	add	x0, x0, :lo12:.LANCHOR30
-	str	wzr, [x29, 176]
+	mov	w22, 4
+	ldr	x21, [x20, #:lo12:.LANCHOR137]
+	mov	w23, 0
+	add	x0, x0, :lo12:.LANCHOR31
+	str	wzr, [x29, 168]
 	ldrb	w1, [x0, 9]
-	ldrh	w27, [x0, 26]
+	ldrh	w28, [x0, 26]
 	uxtw	x0, w1
-	mul	w27, w0, w27
-	adrp	x0, .LANCHOR45
-	and	w27, w27, 65535
-	strb	wzr, [x0, #:lo12:.LANCHOR45]
-	udiv	w0, w26, w27
-	msub	w27, w0, w27, w26
-	sub	w0, w26, w27
+	mul	w28, w0, w28
+	adrp	x0, .LANCHOR46
+	and	w28, w28, 65535
+	strb	wzr, [x0, #:lo12:.LANCHOR46]
+	udiv	w0, w19, w28
+	msub	w28, w0, w28, w19
+	sub	w0, w19, w28
 	stp	w0, w1, [x29, 144]
-	and	w0, w27, 3
-	str	w0, [x29, 184]
-	ldr	w0, [x29, 188]
-	str	w0, [x29, 168]
+	and	w0, w28, 3
+	str	w0, [x29, 180]
+	ldr	w0, [x29, 204]
+	str	w0, [x29, 160]
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
 	str	x0, [x29, 112]
-.L2143:
-	ldr	w0, [x29, 168]
-	cmp	w22, w0
-	bcc	.L2157
-	ldr	x0, [x29, 200]
+.L2176:
+	ldr	w0, [x29, 160]
+	cmp	w23, w0
+	bcc	.L2190
+	ldr	x0, [x29, 192]
 	ldrb	w1, [x29, 136]
 	strb	w1, [x0]
-	ldr	w0, [x29, 164]
-	cbz	w0, .L2158
+	ldr	w0, [x29, 176]
+	cbz	w0, .L2191
 	mov	w0, 0
 	bl	zftl_flash_exit_slc_mode
 	adrp	x0, .LANCHOR0
 	strb	wzr, [x0, #:lo12:.LANCHOR0]
-	adrp	x0, .LANCHOR49
-	strb	wzr, [x0, #:lo12:.LANCHOR49]
-.L2158:
-	ldr	w0, [x29, 188]
+	adrp	x0, .LANCHOR19
+	strb	wzr, [x0, #:lo12:.LANCHOR19]
+.L2191:
+	ldr	w0, [x29, 204]
 	mov	x2, 0
 	lsl	w1, w0, 7
 	adrp	x0, .LANCHOR137
 	ldr	x0, [x0, #:lo12:.LANCHOR137]
-.L2159:
-	mov	w19, w2
+.L2192:
+	mov	w20, w2
 	cmp	w2, w1
-	bcc	.L2160
-	ldr	w0, [x29, 192]
+	bcc	.L2193
+	ldr	w0, [x29, 184]
 	add	w0, w0, 1
-	str	w0, [x29, 192]
+	str	w0, [x29, 184]
 	cmp	w0, 5
-	bls	.L2126
-	b	.L2165
-.L2166:
-	str	wzr, [x29, 164]
-	b	.L2119
-.L2169:
-	mov	x27, 0
-	str	w25, [x29, 188]
-	b	.L2128
-.L2142:
-	ldr	x2, [x29, 176]
-	add	w4, w22, w19
+	bls	.L2158
+	b	.L2198
+.L2199:
+	str	wzr, [x29, 176]
+	b	.L2151
+.L2160:
+	mov	w0, 0
+	bl	zftl_flash_exit_slc_mode
+	strb	wzr, [x8, #:lo12:.LANCHOR0]
+	strb	wzr, [x7, #:lo12:.LANCHOR19]
+	b	.L2159
+.L2202:
+	mov	x21, 0
+	str	w26, [x29, 204]
+	b	.L2161
+.L2175:
+	ldr	x2, [x29, 168]
+	add	w4, w23, w28
 	lsr	w4, w4, 2
 	adrp	x0, .LANCHOR3
 	add	w1, w4, 1
 	add	x0, x0, :lo12:.LANCHOR3
 	ldrb	w2, [x2]
 	ldrh	w0, [x0, w1, sxtw 1]
-	cbz	w2, .L2133
+	cbz	w2, .L2166
 	adrp	x0, .LANCHOR1
-	ldrb	w5, [x0, #:lo12:.LANCHOR1]
+	ldrb	w7, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w1, 1
-	cmp	w5, 0
+	cmp	w7, 0
 	csel	w0, w0, w1, ne
-.L2133:
-	adrp	x1, .LANCHOR27
-	ldrb	w1, [x1, #:lo12:.LANCHOR27]
+.L2166:
+	adrp	x1, .LANCHOR28
+	ldrb	w1, [x1, #:lo12:.LANCHOR28]
 	cmp	w1, 9
-	bne	.L2135
-.L2216:
+	bne	.L2168
+.L2249:
 	str	w0, [x29, 208]
 	mov	w0, 61424
 	str	w0, [x29, 212]
-	ldr	x0, [x29, 168]
+	ldr	x0, [x29, 160]
 	ldrh	w0, [x0, w4, sxtw 1]
-	cbnz	w2, .L2137
+	cbnz	w2, .L2170
 	mov	w4, w0
-.L2138:
-	mul	w0, w21, w4
-	cbnz	x27, .L2139
+.L2171:
+	mul	w0, w22, w4
+	cbnz	x21, .L2172
 	str	w4, [x29, 148]
 	add	x2, x29, 208
-	mov	x1, x24
-	add	w0, w0, w23
-	bl	fw_flash_page_prog.constprop.25
-	adrp	x0, .LANCHOR49
+	mov	x1, x25
+	add	w0, w0, w24
+	bl	fw_flash_page_prog.constprop.26
+	adrp	x0, .LANCHOR19
 	ldr	w4, [x29, 148]
-	ldrb	w0, [x0, #:lo12:.LANCHOR49]
-	cbnz	w0, .L2140
-	udiv	w1, w23, w21
+	ldrb	w0, [x0, #:lo12:.LANCHOR19]
+	cbnz	w0, .L2173
+	udiv	w1, w24, w22
 	add	w2, w4, 1
 	bl	id_block_prog_msb_ff_data
-.L2140:
-	add	x24, x24, 2048
-.L2141:
-	add	w19, w19, 4
-	mov	x27, 0
-	and	w19, w19, 65535
-	b	.L2131
-.L2135:
+.L2173:
+	ldr	w0, [x29, 204]
+	add	x25, x25, 2048
+	add	w0, w0, 16
+	cmp	w28, w0
+	bcc	.L2174
+	ldr	w0, [x29, 204]
+	add	w1, w0, 20
+	add	x0, x27, 2048
+	cmp	w28, w1
+	csel	x25, x0, x25, cc
+.L2174:
+	add	w5, w28, 4
+	mov	x21, 0
+	and	w28, w5, 65535
+	b	.L2164
+.L2168:
 	sub	w0, w0, #1
 	lsl	w0, w0, 2
-	b	.L2216
-.L2137:
+	b	.L2249
+.L2170:
 	adrp	x0, .LANCHOR1
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w4, 1
 	cmp	w1, 0
 	csel	w4, w0, w4, ne
-	b	.L2138
-.L2139:
+	b	.L2171
+.L2172:
 	add	x2, x29, 208
-	mov	x1, x27
-	add	w0, w0, w23
-	bl	fw_flash_page_prog.constprop.25
-	b	.L2141
-.L2157:
-	add	w19, w27, w22
-	ldr	w0, [x29, 184]
-	adrp	x1, .LANCHOR49
-	sub	w24, w21, w0
+	mov	x1, x21
+	add	w0, w0, w24
+	bl	fw_flash_page_prog.constprop.26
+	b	.L2174
+.L2190:
+	add	w20, w28, w23
+	ldr	w0, [x29, 180]
+	adrp	x1, .LANCHOR19
+	sub	w25, w22, w0
 	ldr	x0, [x29, 112]
-	udiv	w19, w19, w21
-	ldrb	w1, [x1, #:lo12:.LANCHOR49]
-	and	w24, w24, 65535
-	and	w19, w19, 65535
-	ldrh	w0, [x0, w19, sxtw 1]
-	cbnz	w1, .L2144
-	mov	w19, w0
-.L2145:
+	udiv	w20, w20, w22
+	ldrb	w1, [x1, #:lo12:.LANCHOR19]
+	and	w25, w25, 65535
+	and	w20, w20, 65535
+	ldrh	w0, [x0, w20, sxtw 1]
+	cbnz	w1, .L2177
+	mov	w20, w0
+.L2178:
 	adrp	x0, .LANCHOR17
 	ldr	w1, [x29, 144]
-	ldrb	w23, [x0, #:lo12:.LANCHOR17]
-	ldr	w0, [x29, 184]
+	ldrb	w24, [x0, #:lo12:.LANCHOR17]
+	ldr	w0, [x29, 180]
 	add	w0, w0, w1
 	ldr	w1, [x29, 148]
-	madd	w19, w1, w19, w0
-	adrp	x0, .LANCHOR30+9
-	ldrb	w0, [x0, #:lo12:.LANCHOR30+9]
-	udiv	w19, w19, w0
-	adrp	x0, .LANCHOR43
-	ldrb	w0, [x0, #:lo12:.LANCHOR43]
+	madd	w20, w1, w20, w0
+	adrp	x0, .LANCHOR31+9
+	ldrb	w0, [x0, #:lo12:.LANCHOR31+9]
+	udiv	w20, w20, w0
+	adrp	x0, .LANCHOR44
+	ldrb	w0, [x0, #:lo12:.LANCHOR44]
 	str	w0, [x29, 132]
-	mov	w0, w23
+	mov	w0, w24
 	bl	nandc_bch_sel
-	adrp	x0, .LANCHOR20
-	add	x0, x0, :lo12:.LANCHOR20
+	adrp	x0, .LANCHOR21
+	add	x0, x0, :lo12:.LANCHOR21
 	str	x0, [x29, 120]
-.L2146:
-	mov	w4, w21
+.L2179:
+	mov	w4, w22
 	add	x3, x29, 208
-	mov	x2, x20
-	mov	w1, w19
+	mov	x2, x21
+	mov	w1, w20
 	mov	w0, 0
 	bl	flash_read_page
 	mov	w5, w0
 	cmn	w0, #1
-	bne	.L2147
-	ldr	x0, [x29, 200]
+	bne	.L2180
+	ldr	x0, [x29, 192]
 	ldrb	w6, [x0]
-	cbnz	w6, .L2148
-.L2151:
+	cbnz	w6, .L2181
+.L2184:
 	adrp	x0, .LANCHOR162
 	ldr	x6, [x0, #:lo12:.LANCHOR162]
-	cbnz	x6, .L2149
-.L2150:
+	cbnz	x6, .L2182
+.L2183:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
-	cbz	w0, .L2147
-	mov	w4, w21
+	cbz	w0, .L2180
+	mov	w4, w22
 	add	x3, x29, 208
-	mov	x2, x20
-	mov	w1, w19
+	mov	x2, x21
+	mov	w1, w20
 	mov	w0, 0
 	bl	flash_ddr_tuning_read
-	b	.L2217
-.L2144:
+	b	.L2250
+.L2177:
 	adrp	x0, .LANCHOR1
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
-	lsl	w0, w19, 1
+	lsl	w0, w20, 1
 	cmp	w1, 0
-	csel	w19, w0, w19, ne
-	b	.L2145
-.L2148:
-	ldr	x0, [x29, 200]
-	mov	w1, w19
+	csel	w20, w0, w20, ne
+	b	.L2178
+.L2181:
+	ldr	x0, [x29, 192]
+	mov	w1, w20
 	str	w6, [x29, 108]
-	mov	w4, w21
+	mov	w4, w22
 	str	w5, [x29, 128]
 	add	x3, x29, 208
-	mov	x2, x20
+	mov	x2, x21
 	strb	wzr, [x0]
 	mov	w0, 0
 	bl	flash_read_page
 	cmn	w0, #1
-	ldr	x1, [x29, 200]
+	ldr	x1, [x29, 192]
 	ldr	w6, [x29, 108]
 	ldr	w5, [x29, 128]
 	strb	w6, [x1]
-	beq	.L2151
-.L2217:
+	beq	.L2184
+.L2250:
 	mov	w5, w0
-.L2147:
+.L2180:
 	cmn	w5, #1
 	cset	w3, eq
-	cmp	w23, 16
+	cmp	w24, 16
 	cset	w0, ne
 	tst	w3, w0
-	beq	.L2153
+	beq	.L2186
 	mov	w0, 16
-	mov	w23, 16
+	mov	w24, 16
 	bl	nandc_bch_sel
-	b	.L2146
-.L2149:
+	b	.L2179
+.L2182:
 	str	w5, [x29, 128]
-	mov	w4, w21
+	mov	w4, w22
 	add	x3, x29, 208
-	mov	x2, x20
-	mov	w1, w19
+	mov	x2, x21
+	mov	w1, w20
 	mov	w0, 0
 	blr	x6
 	cmn	w0, #1
 	ldr	w5, [x29, 128]
-	beq	.L2150
-	b	.L2217
-.L2153:
+	beq	.L2183
+	b	.L2250
+.L2186:
 	ldr	w0, [x29, 132]
 	bl	nandc_bch_sel
 	cmp	w3, 0
-	ldr	w0, [x29, 176]
+	ldr	w0, [x29, 168]
 	csinv	w0, w0, wzr, eq
-	str	w0, [x29, 176]
+	str	w0, [x29, 168]
 	ldr	w0, [x29, 144]
-	cmp	w22, 0
-	ccmp	w26, w0, 0, eq
-	bne	.L2155
-	ldr	w0, [x29, 176]
-	cbnz	w0, .L2155
-	ldr	w1, [x20]
+	cmp	w23, 0
+	ccmp	w19, w0, 0, eq
+	bne	.L2188
+	ldr	w0, [x29, 168]
+	cbnz	w0, .L2188
+	ldr	w1, [x21]
 	mov	w0, 18766
 	movk	w0, 0x464e, lsl 16
 	cmp	w1, w0
-	bne	.L2155
-	ldr	w0, [x29, 168]
-	ldrb	w21, [x20, 17]
-	add	w0, w0, w24
-	str	w0, [x29, 168]
-.L2156:
-	add	w22, w24, w22
-	and	w22, w22, 65535
-	b	.L2143
-.L2155:
-	ubfiz	x0, x24, 9, 16
-	str	wzr, [x29, 184]
-	add	x20, x20, x0
-	b	.L2156
-.L2160:
+	bne	.L2188
+	ldr	w0, [x29, 160]
+	ldrb	w22, [x21, 17]
+	add	w0, w0, w25
+	str	w0, [x29, 160]
+.L2189:
+	add	w23, w25, w23
+	and	w23, w23, 65535
+	b	.L2176
+.L2188:
+	ubfiz	x0, x25, 9, 16
+	str	wzr, [x29, 180]
+	add	x21, x21, x0
+	b	.L2189
+.L2193:
 	ldr	w4, [x0, x2, lsl 2]
 	add	x2, x2, 1
-	add	x3, x28, x2, lsl 2
+	add	x3, x27, x2, lsl 2
 	ldr	w3, [x3, -4]
 	cmp	w4, w3
-	beq	.L2159
+	beq	.L2192
 	mov	w2, 512
 	mov	w1, 0
 	bl	ftl_memset
-	mov	w1, w19
-	adrp	x0, .LC125
-	add	x0, x0, :lo12:.LC125
+	mov	w1, w20
+	adrp	x0, .LC131
+	add	x0, x0, :lo12:.LC131
 	bl	printf
-	mov	w1, w26
+	mov	w1, w19
 	mov	w0, 0
 	bl	flash_erase_block
-.L2126:
-	ldr	w0, [x29, 196]
+.L2158:
+	ldr	w0, [x29, 200]
 	add	w0, w0, 1
-	str	w0, [x29, 196]
+	str	w0, [x29, 200]
 	cmp	w0, 4
-	bne	.L2162
-.L2165:
-	ldrb	w1, [x29, 160]
+	bne	.L2195
+.L2198:
+	ldrb	w1, [x29, 188]
 	adrp	x0, .LANCHOR0
 	strb	w1, [x0, #:lo12:.LANCHOR0]
 	mov	w1, 2
-	adrp	x0, .LANCHOR31
-	strb	w1, [x0, #:lo12:.LANCHOR31]
+	adrp	x0, .LANCHOR32
+	strb	w1, [x0, #:lo12:.LANCHOR32]
 	mov	w0, 0
 	bl	zftl_flash_enter_slc_mode
-	ldr	w0, [x29, 192]
-	cbnz	w0, .L2121
-	adrp	x0, .LC126
+	ldr	w0, [x29, 184]
+	cbnz	w0, .L2153
+	adrp	x0, .LC132
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC126
+	add	x0, x0, :lo12:.LC132
 	bl	printf
-.L2121:
+.L2153:
 	adrp	x0, .LANCHOR136
 	adrp	x19, .LANCHOR135
 	str	wzr, [x0, #:lo12:.LANCHOR136]
 	ldr	x0, [x19, #:lo12:.LANCHOR135]
-	cbz	x0, .L2164
+	cbz	x0, .L2197
 	bl	free
 	str	xzr, [x19, #:lo12:.LANCHOR135]
-.L2164:
+.L2197:
 	adrp	x19, .LANCHOR137
 	ldr	x0, [x19, #:lo12:.LANCHOR137]
-	cbz	x0, .L2218
+	cbz	x0, .L2251
 	bl	free
 	str	xzr, [x19, #:lo12:.LANCHOR137]
-	b	.L2218
+	b	.L2251
 	.size	idb_write_data, .-idb_write_data
 	.section	.text.flash_start_tlc_page_prog,"ax",@progbits
 	.align	2
@@ -12948,27 +13250,27 @@ flash_start_tlc_page_prog:
 	mov	x23, x5
 	mov	x24, x6
 	cmp	w0, w19
-	bhi	.L2221
+	bhi	.L2254
 	adrp	x1, .LANCHOR170
 	adrp	x0, .LC0
 	mov	w2, 726
 	add	x1, x1, :lo12:.LANCHOR170
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2221:
-	adrp	x0, .LANCHOR29
-	add	x0, x0, :lo12:.LANCHOR29
+.L2254:
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w4, [x0, w19, sxtw]
 	adrp	x0, .LANCHOR13
 	ldr	x19, [x0, #:lo12:.LANCHOR13]
 	mov	w0, w4
 	bl	nandc_cs
-	cbz	w25, .L2222
+	cbz	w25, .L2255
 	sxtw	x0, w4
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 8
 	str	w25, [x0, 8]
-.L2222:
+.L2255:
 	ubfiz	x4, x4, 8, 8
 	mov	w0, 128
 	add	x19, x19, x4
@@ -12986,10 +13288,10 @@ flash_start_tlc_page_prog:
 	sub	w0, w20, #1
 	add	w0, w0, w21
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR30+9
+	adrp	x0, .LANCHOR31+9
 	mov	x3, x24
 	mov	x2, x23
-	ldrb	w1, [x0, #:lo12:.LANCHOR30+9]
+	ldrb	w1, [x0, #:lo12:.LANCHOR31+9]
 	mov	w0, 1
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
@@ -12999,7 +13301,7 @@ flash_start_tlc_page_prog:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 80
-	b	nandc_de_cs.constprop.28
+	b	nandc_de_cs.constprop.29
 	.size	flash_start_tlc_page_prog, .-flash_start_tlc_page_prog
 	.section	.text.queue_tlc_prog_cmd,"ax",@progbits
 	.align	2
@@ -13068,21 +13370,21 @@ sblk_tlc_prog_one_page:
 	mov	x19, x0
 	ldr	x0, [x0]
 	ldr	w20, [x0, 40]
-.L2230:
+.L2263:
 	mov	w1, 1
 	mov	w0, w20
 	bl	queue_lun_state
-	cbnz	w0, .L2231
+	cbnz	w0, .L2264
 	mov	x0, x19
 	bl	queue_tlc_prog_cmd
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2231:
+.L2264:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2230
+	b	.L2263
 	.size	sblk_tlc_prog_one_page, .-sblk_tlc_prog_one_page
 	.section	.text.sblk_xlc_prog_pages,"ax",@progbits
 	.align	2
@@ -13099,13 +13401,13 @@ sblk_xlc_prog_pages:
 	stp	x23, x24, [sp, 48]
 	mov	w24, w2
 	ldr	w20, [x0, 40]
-.L2234:
+.L2267:
 	mov	w1, 1
 	mov	w0, w20
 	bl	queue_lun_state
-	cbnz	w0, .L2235
+	cbnz	w0, .L2268
 	cmp	w24, 2
-	bne	.L2236
+	bne	.L2269
 	ldr	x0, [x19]
 	mov	w2, 17
 	ldr	x1, [x22]
@@ -13185,21 +13487,21 @@ sblk_xlc_prog_pages:
 	adrp	x0, .LANCHOR54
 	add	x0, x0, :lo12:.LANCHOR54
 	bl	buf_add_tail
-.L2237:
+.L2270:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2235:
+.L2268:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2234
-.L2236:
+	b	.L2267
+.L2269:
 	mov	x0, x19
 	bl	queue_tlc_prog_cmd
-	b	.L2237
+	b	.L2270
 	.size	sblk_xlc_prog_pages, .-sblk_xlc_prog_pages
 	.section	.text.sblk_3d_tlc_dump_prog,"ax",@progbits
 	.align	2
@@ -13210,8 +13512,8 @@ sblk_3d_tlc_dump_prog:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	adrp	x0, .LC127
-	add	x0, x0, :lo12:.LC127
+	adrp	x0, .LC133
+	add	x0, x0, :lo12:.LC133
 	ldr	w3, [x19, 40]
 	str	x21, [sp, 32]
 	and	w20, w3, 2097151
@@ -13271,16 +13573,16 @@ flash_start_3d_mlc_page_prog:
 	mov	x22, x3
 	mov	x23, x4
 	cmp	w0, w19
-	bhi	.L2242
+	bhi	.L2275
 	adrp	x1, .LANCHOR171
 	adrp	x0, .LC0
 	mov	w2, 756
 	add	x1, x1, :lo12:.LANCHOR171
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2242:
-	adrp	x0, .LANCHOR29
-	add	x0, x0, :lo12:.LANCHOR29
+.L2275:
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w4, [x0, w19, sxtw]
 	adrp	x0, .LANCHOR13
 	ldr	x19, [x0, #:lo12:.LANCHOR13]
@@ -13300,10 +13602,10 @@ flash_start_3d_mlc_page_prog:
 	str	w0, [x19, 2052]
 	mov	w0, w20
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR30+9
+	adrp	x0, .LANCHOR31+9
 	mov	x3, x23
 	mov	x2, x22
-	ldrb	w1, [x0, #:lo12:.LANCHOR30+9]
+	ldrb	w1, [x0, #:lo12:.LANCHOR31+9]
 	mov	w0, 1
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
@@ -13326,11 +13628,11 @@ sblk_3d_mlc_prog_pages:
 	ldr	x0, [x0]
 	ldr	w19, [x0, 40]
 	str	x21, [sp, 32]
-.L2245:
+.L2278:
 	mov	w1, 1
 	mov	w0, w19
 	bl	queue_lun_state
-	cbnz	w0, .L2246
+	cbnz	w0, .L2279
 	ldr	x0, [x20]
 	ldr	w19, [x0, 40]
 	and	w21, w19, 2097151
@@ -13352,7 +13654,7 @@ sblk_3d_mlc_prog_pages:
 	ldr	x4, [x0, 24]
 	mov	w0, 16
 	bl	flash_start_3d_mlc_page_prog
-	bl	nandc_de_cs.constprop.28
+	bl	nandc_de_cs.constprop.29
 	ldr	x1, [x20]
 	mov	w0, 4
 	strb	w0, [x1, 58]
@@ -13368,10 +13670,10 @@ sblk_3d_mlc_prog_pages:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L2246:
+.L2279:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2245
+	b	.L2278
 	.size	sblk_3d_mlc_prog_pages, .-sblk_3d_mlc_prog_pages
 	.section	.text.sblk_mlc_dump_prog,"ax",@progbits
 	.align	2
@@ -13390,8 +13692,8 @@ sblk_mlc_dump_prog:
 	bl	zftl_flash_exit_slc_mode
 	ldr	w2, [x19, 40]
 	mov	w1, w21
-	adrp	x0, .LC128
-	add	x0, x0, :lo12:.LC128
+	adrp	x0, .LC134
+	add	x0, x0, :lo12:.LC134
 	add	w3, w2, 1
 	bl	printf
 	ldr	x3, [x19, 8]
@@ -13412,7 +13714,7 @@ sblk_mlc_dump_prog:
 	mov	w1, 64
 	bl	flash_wait_device_ready
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.28
+	bl	nandc_de_cs.constprop.29
 	ldr	x21, [sp, 32]
 	mov	w0, w2
 	ldp	x19, x20, [sp, 16]
@@ -13440,40 +13742,40 @@ flash_start_page_prog:
 	ubfx	x27, x1, 21, 3
 	ubfx	x22, x1, 24, 2
 	cmp	w0, w27
-	bhi	.L2251
+	bhi	.L2284
 	adrp	x1, .LANCHOR172
 	adrp	x0, .LC0
 	mov	w2, 803
 	add	x1, x1, :lo12:.LANCHOR172
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2251:
-	adrp	x0, .LANCHOR29
-	add	x0, x0, :lo12:.LANCHOR29
+.L2284:
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w21, [x0, w27, sxtw]
 	adrp	x0, .LANCHOR13
 	ldr	x19, [x0, #:lo12:.LANCHOR13]
 	bl	nandc_rdy_status
-	cbnz	w0, .L2252
+	cbnz	w0, .L2285
 	ldrb	w0, [x23, #:lo12:.LANCHOR18]
 	cmp	w0, 1
-	bne	.L2253
+	bne	.L2286
 	bl	nandc_wait_flash_ready
-.L2252:
+.L2285:
 	mov	w0, w21
 	bl	hynix_reconfig_rr_para
 	mov	w0, w21
 	bl	nandc_cs
-	cbnz	w22, .L2254
+	cbnz	w22, .L2287
 	mov	w0, w20
 	bl	slc_phy_page_address_calc
 	mov	w20, w0
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L2255
+	cbz	w0, .L2288
 	mov	w0, w21
 	bl	zftl_flash_enter_slc_mode
-.L2255:
+.L2288:
 	ubfiz	x21, x21, 8, 8
 	mov	w0, 128
 	add	x19, x19, x21
@@ -13488,10 +13790,10 @@ flash_start_page_prog:
 	str	w0, [x19, 2052]
 	mov	w0, w20
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR30+9
+	adrp	x0, .LANCHOR31+9
 	mov	x3, x26
 	mov	x2, x25
-	ldrb	w1, [x0, #:lo12:.LANCHOR30+9]
+	ldrb	w1, [x0, #:lo12:.LANCHOR31+9]
 	mov	w0, 1
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
@@ -13502,17 +13804,17 @@ flash_start_page_prog:
 	ldp	x19, x20, [sp, 16]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 96
-	b	nandc_de_cs.constprop.28
-.L2253:
+	b	nandc_de_cs.constprop.29
+.L2286:
 	mov	w2, 64
 	mov	w1, w20
 	mov	w0, w27
 	bl	flash_wait_device_ready_raw
-	b	.L2252
-.L2254:
+	b	.L2285
+.L2287:
 	mov	w0, w21
 	bl	zftl_flash_exit_slc_mode
-	b	.L2255
+	b	.L2288
 	.size	flash_start_page_prog, .-flash_start_page_prog
 	.section	.text.queue_prog_cmd,"ax",@progbits
 	.align	2
@@ -13531,23 +13833,23 @@ queue_prog_cmd:
 	ldr	w3, [x19, 40]
 	ldrb	w1, [x0, #:lo12:.LANCHOR54]
 	cmp	w1, 255
-	beq	.L2261
+	beq	.L2294
 	adrp	x2, .LANCHOR50
 	add	x2, x2, :lo12:.LANCHOR50
 	ubfx	x3, x3, 21, 3
 	mov	x6, x2
-.L2263:
+.L2296:
 	add	x4, x2, x1, lsl 6
 	ldr	w5, [x4, 40]
 	ubfx	x5, x5, 21, 3
 	cmp	w3, w5
-	bne	.L2262
+	bne	.L2295
 	ldrb	w5, [x4, 58]
 	cmp	w5, 7
-	bne	.L2262
+	bne	.L2295
 	mov	w1, 3
 	strb	w1, [x4, 58]
-.L2261:
+.L2294:
 	mov	w1, 3
 	strb	w1, [x19, 58]
 	mov	w1, 1
@@ -13559,12 +13861,12 @@ queue_prog_cmd:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	buf_add_tail
-.L2262:
+.L2295:
 	lsl	x1, x1, 6
 	ldrb	w1, [x6, x1]
 	cmp	w1, 255
-	bne	.L2263
-	b	.L2261
+	bne	.L2296
+	b	.L2294
 	.size	queue_prog_cmd, .-queue_prog_cmd
 	.section	.text.sblk_prog_page,"ax",@progbits
 	.align	2
@@ -13581,25 +13883,25 @@ sblk_prog_page:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	cbz	w0, .L2270
+	cbz	w0, .L2303
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2270
+	tbz	x0, 8, .L2303
 	ldr	w1, [x19, 40]
-	adrp	x0, .LC129
+	adrp	x0, .LC135
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC129
+	add	x0, x0, :lo12:.LC135
 	bl	printf
-.L2270:
-	adrp	x25, .LANCHOR38
+.L2303:
+	adrp	x25, .LANCHOR39
 	adrp	x23, .LANCHOR50
-	add	x25, x25, :lo12:.LANCHOR38
+	add	x25, x25, :lo12:.LANCHOR39
 	add	x23, x23, :lo12:.LANCHOR50
 	mov	w21, 0
 	mov	w24, 1
-.L2271:
-	cbnz	w20, .L2282
-.L2295:
+.L2304:
+	cbnz	w20, .L2315
+.L2328:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -13608,53 +13910,53 @@ sblk_prog_page:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2282:
+.L2315:
 	ldrb	w26, [x19]
 	ldr	w22, [x19, 40]
-.L2272:
+.L2305:
 	mov	w1, 1
 	mov	w0, w22
 	bl	queue_lun_state
-	cbnz	w0, .L2273
+	cbnz	w0, .L2306
 	cmp	w20, 1
-	beq	.L2274
+	beq	.L2307
 	ldrb	w0, [x25]
-	cbnz	w0, .L2275
-.L2274:
+	cbnz	w0, .L2308
+.L2307:
 	mov	x0, x19
 	bl	queue_prog_cmd
-.L2276:
+.L2309:
 	subs	w20, w20, #1
-	beq	.L2295
+	beq	.L2328
 	ubfiz	x19, x26, 6, 8
 	add	x19, x23, x19
-	b	.L2271
-.L2273:
+	b	.L2304
+.L2306:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2272
-.L2275:
+	b	.L2305
+.L2308:
 	ldrb	w0, [x19]
 	ubfx	x27, x22, 21, 3
 	cmp	w0, 255
-	bne	.L2277
+	bne	.L2310
 	adrp	x1, .LANCHOR173
 	adrp	x0, .LC0
-	mov	w2, 574
+	mov	w2, 583
 	add	x1, x1, :lo12:.LANCHOR173
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2277:
+.L2310:
 	ldrb	w0, [x19]
 	add	x0, x23, x0, lsl 6
 	ldr	w5, [x0, 40]
 	ubfx	x0, x5, 21, 3
 	cmp	w27, w0
-	bne	.L2278
-	adrp	x0, .LANCHOR102
-	ldrh	w2, [x0, #:lo12:.LANCHOR102]
-	adrp	x0, .LANCHOR101
-	ldrb	w3, [x0, #:lo12:.LANCHOR101]
+	bne	.L2311
+	adrp	x0, .LANCHOR66
+	ldrh	w2, [x0, #:lo12:.LANCHOR66]
+	adrp	x0, .LANCHOR67
+	ldrb	w3, [x0, #:lo12:.LANCHOR67]
 	mov	w0, 21
 	sub	w0, w0, w2
 	lsl	w1, w24, w2
@@ -13673,9 +13975,9 @@ sblk_prog_page:
 	cmp	w4, w0
 	and	w1, w1, w5
 	ccmp	w22, w1, 0, ne
-	bne	.L2278
+	bne	.L2311
 	cmp	w21, w3
-	beq	.L2278
+	beq	.L2311
 	ldr	w1, [x19, 40]
 	mov	w0, 17
 	ldr	x2, [x19, 8]
@@ -13691,12 +13993,12 @@ sblk_prog_page:
 	adrp	x0, .LANCHOR54
 	add	x0, x0, :lo12:.LANCHOR54
 	bl	buf_add_tail
-	b	.L2276
-.L2278:
+	b	.L2309
+.L2311:
 	mov	x0, x19
 	mov	w21, 0
 	bl	queue_prog_cmd
-	b	.L2276
+	b	.L2309
 	.size	sblk_prog_page, .-sblk_prog_page
 	.section	.text.ftl_flush,"ax",@progbits
 	.align	2
@@ -13710,13 +14012,13 @@ ftl_flush:
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
 	adrp	x20, .LANCHOR174
-	cbz	w1, .L2298
+	cbz	w1, .L2331
 	ldrb	w2, [x20, #:lo12:.LANCHOR174]
 	adrp	x0, .LANCHOR50
 	add	x0, x0, :lo12:.LANCHOR50
 	add	x0, x0, x2, lsl 6
 	bl	sblk_prog_page
-.L2298:
+.L2331:
 	mov	w0, -1
 	strb	wzr, [x19, #:lo12:.LANCHOR121]
 	strb	w0, [x20, #:lo12:.LANCHOR174]
@@ -13750,48 +14052,48 @@ flash_prog_page_en:
 	mov	w28, w4
 	ubfx	x19, x20, 24, 2
 	cmp	w0, w23
-	bhi	.L2304
+	bhi	.L2337
 	adrp	x1, .LANCHOR175
 	adrp	x0, .LC0
 	mov	w2, 546
 	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2304:
-	adrp	x0, .LANCHOR29
-	add	x0, x0, :lo12:.LANCHOR29
+.L2337:
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w27, [x0, w23, sxtw]
-	cbnz	w19, .L2315
+	cbnz	w19, .L2348
 	adrp	x0, .LANCHOR0
 	ldrb	w1, [x0, #:lo12:.LANCHOR0]
 	adrp	x0, .LANCHOR1
-	cbz	w1, .L2306
+	cbz	w1, .L2339
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
-	cbz	w1, .L2315
-.L2306:
+	cbz	w1, .L2348
+.L2339:
 	adrp	x1, .LANCHOR2
 	ldrb	w0, [x0, #:lo12:.LANCHOR1]
 	ldrh	w1, [x1, #:lo12:.LANCHOR2]
 	udiv	w19, w20, w1
 	mul	w19, w19, w1
 	sub	w1, w20, w19
-	cbz	w0, .L2307
+	cbz	w0, .L2340
 	add	w19, w19, w1, lsl 1
-.L2305:
+.L2338:
 	adrp	x24, .LANCHOR14
-	adrp	x25, .LC130
+	adrp	x25, .LC136
 	add	x24, x24, :lo12:.LANCHOR14
-	add	x25, x25, :lo12:.LC130
+	add	x25, x25, :lo12:.LC136
 	adrp	x26, .LANCHOR163
-.L2311:
+.L2344:
 	ldr	w0, [x24]
-	tbz	x0, 4, .L2308
+	tbz	x0, 4, .L2341
 	mov	w3, w19
 	mov	w2, w20
 	mov	w1, w27
 	mov	x0, x25
 	bl	printf
-.L2308:
+.L2341:
 	mov	w4, w28
 	mov	x3, x21
 	mov	x2, x22
@@ -13800,7 +14102,7 @@ flash_prog_page_en:
 	bl	flash_prog_page
 	mov	w5, w0
 	ldr	w0, [x29, 124]
-	cbz	w0, .L2309
+	cbz	w0, .L2342
 	adrp	x6, .LANCHOR164
 	ldr	x3, [x26, #:lo12:.LANCHOR163]
 	mov	w4, w28
@@ -13815,54 +14117,54 @@ flash_prog_page_en:
 	mov	w4, w0
 	ccmn	w0, #1, 4, ne
 	mov	x7, x6
-	beq	.L2310
+	beq	.L2343
 	ldr	x0, [x6, #:lo12:.LANCHOR164]
 	ldr	w1, [x22]
 	ldr	w5, [x29, 104]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	bne	.L2310
+	bne	.L2343
 	ldr	x0, [x26, #:lo12:.LANCHOR163]
 	ldr	w1, [x21]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	beq	.L2309
-.L2310:
+	beq	.L2342
+.L2343:
 	str	w4, [x29, 112]
 	mov	w3, 4
 	str	x7, [x29, 104]
 	mov	w2, w3
 	mov	x1, x22
-	adrp	x0, .LC131
-	add	x0, x0, :lo12:.LC131
+	adrp	x0, .LC137
+	add	x0, x0, :lo12:.LC137
 	bl	rknand_print_hex
 	mov	w3, 4
 	mov	x1, x21
 	mov	w2, w3
-	adrp	x0, .LC132
-	add	x0, x0, :lo12:.LC132
+	adrp	x0, .LC138
+	add	x0, x0, :lo12:.LC138
 	bl	rknand_print_hex
 	adrp	x0, .LANCHOR163
 	mov	w3, 4
 	mov	w2, w3
 	ldr	x1, [x0, #:lo12:.LANCHOR163]
-	adrp	x0, .LC133
-	add	x0, x0, :lo12:.LC133
+	adrp	x0, .LC139
+	add	x0, x0, :lo12:.LC139
 	bl	rknand_print_hex
 	ldr	x7, [x29, 104]
 	mov	w3, 4
-	adrp	x0, .LC134
+	adrp	x0, .LC140
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC134
+	add	x0, x0, :lo12:.LC140
 	ldr	x1, [x7, #:lo12:.LANCHOR164]
 	bl	rknand_print_hex
 	ldr	w4, [x29, 112]
 	cmp	w4, 512
-	beq	.L2311
-.L2313:
+	beq	.L2344
+.L2346:
 	mov	w1, w20
-	adrp	x0, .LC135
-	add	x0, x0, :lo12:.LC135
+	adrp	x0, .LC141
+	add	x0, x0, :lo12:.LC141
 	bl	printf
 	mov	w2, 577
 	adrp	x1, .LANCHOR175
@@ -13871,7 +14173,7 @@ flash_prog_page_en:
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	mov	w0, -1
-.L2312:
+.L2345:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -13879,20 +14181,20 @@ flash_prog_page_en:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2307:
+.L2340:
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
 	ldrh	w0, [x0, w1, uxtw 1]
 	add	w19, w0, w19
-	b	.L2305
-.L2315:
+	b	.L2338
+.L2348:
 	mov	w19, w20
-	b	.L2305
-.L2309:
+	b	.L2338
+.L2342:
 	mov	w0, w5
 	cmn	w5, #1
-	bne	.L2312
-	b	.L2313
+	bne	.L2345
+	b	.L2346
 	.size	flash_prog_page_en, .-flash_prog_page_en
 	.section	.text.ftl_test_block,"ax",@progbits
 	.align	2
@@ -13906,82 +14208,82 @@ ftl_test_block:
 	stp	x25, x26, [sp, 64]
 	adrp	x25, .LANCHOR176
 	stp	x21, x22, [sp, 32]
-	adrp	x26, .LANCHOR108
+	adrp	x26, .LANCHOR104
 	and	w21, w0, 65535
-	add	x0, x26, :lo12:.LANCHOR108
+	add	x0, x26, :lo12:.LANCHOR104
 	stp	x19, x20, [sp, 16]
 	mov	w23, 0
 	stp	x27, x28, [sp, 80]
 	mov	w20, 0
-	adrp	x27, .LANCHOR101
+	adrp	x27, .LANCHOR67
 	str	x0, [x29, 112]
 	str	wzr, [x24, #:lo12:ftl_tmp_buffer]
-	add	x0, x27, :lo12:.LANCHOR101
+	add	x0, x27, :lo12:.LANCHOR67
 	str	wzr, [x25, #:lo12:.LANCHOR176]
 	str	x0, [x29, 96]
-.L2332:
+.L2365:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
 	cmp	w0, w20
-	bls	.L2342
-	add	x0, x27, :lo12:.LANCHOR101
+	bls	.L2375
+	add	x0, x27, :lo12:.LANCHOR67
 	mov	w22, 0
 	str	x0, [x29, 120]
 	adrp	x0, .LANCHOR14
 	add	x0, x0, :lo12:.LANCHOR14
 	str	x0, [x29, 104]
-	b	.L2343
-.L2341:
+	b	.L2376
+.L2374:
 	ldr	x0, [x29, 104]
 	ldr	w0, [x0]
-	tbz	x0, 12, .L2333
-	adrp	x0, .LC136
+	tbz	x0, 12, .L2366
+	adrp	x0, .LC142
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC136
+	add	x0, x0, :lo12:.LC142
 	bl	printf
-.L2333:
+.L2366:
 	ldr	x0, [x29, 96]
 	ldrb	w19, [x0]
 	madd	w19, w21, w19, w22
 	and	w19, w19, 65535
-	cbnz	w20, .L2334
-	adrp	x0, .LANCHOR26
-	ldr	x0, [x0, #:lo12:.LANCHOR26]
+	cbnz	w20, .L2367
+	adrp	x0, .LANCHOR27
+	ldr	x0, [x0, #:lo12:.LANCHOR27]
 	ldrb	w0, [x0, 47]
 	cmp	w0, w19
-	bcs	.L2335
-.L2334:
+	bcs	.L2368
+.L2367:
 	and	w28, w20, 255
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_check_bad_block
-	cbnz	w0, .L2335
-	adrp	x0, .LANCHOR107
+	cbnz	w0, .L2368
+	adrp	x0, .LANCHOR103
 	mov	w1, w23
-	ldrh	w7, [x0, #:lo12:.LANCHOR107]
+	ldrh	w7, [x0, #:lo12:.LANCHOR103]
 	mov	w0, w28
 	mul	w26, w7, w19
 	mov	w2, w26
 	bl	flash_erase_block_en
-	cbz	w0, .L2336
-	adrp	x0, .LANCHOR69
-	ldrb	w0, [x0, #:lo12:.LANCHOR69]
+	cbz	w0, .L2369
+	adrp	x0, .LANCHOR71
+	ldrb	w0, [x0, #:lo12:.LANCHOR71]
 	cmp	w0, 2
-	bne	.L2358
+	bne	.L2391
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L2358
+	cbz	w0, .L2391
 	mov	w2, w26
 	mov	w1, 1
 	mov	w0, w28
 	bl	flash_erase_block_en
-	cbnz	w0, .L2358
-.L2340:
-	adrp	x0, .LANCHOR69
+	cbnz	w0, .L2391
+.L2373:
+	adrp	x0, .LANCHOR71
 	mov	w23, 1
-	ldrb	w0, [x0, #:lo12:.LANCHOR69]
+	ldrb	w0, [x0, #:lo12:.LANCHOR71]
 	add	w26, w26, w0, lsl 24
-.L2339:
+.L2372:
 	adrp	x0, .LANCHOR123
 	mov	w5, 1
 	add	x3, x25, :lo12:.LANCHOR176
@@ -13990,27 +14292,27 @@ ftl_test_block:
 	mov	w1, w26
 	mov	w0, w28
 	bl	flash_prog_page_en
-	cbz	w0, .L2335
-.L2358:
+	cbz	w0, .L2368
+.L2391:
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_mask_bad_block
-.L2335:
+.L2368:
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L2343:
+.L2376:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, w22
-	bhi	.L2341
+	bhi	.L2374
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2332
-.L2336:
-	cbz	w23, .L2339
-	b	.L2340
-.L2342:
-	cbz	w23, .L2344
+	b	.L2365
+.L2369:
+	cbz	w23, .L2372
+	b	.L2373
+.L2375:
+	cbz	w23, .L2377
 	adrp	x0, .LANCHOR7
 	mov	w1, 2
 	ldr	x0, [x0, #:lo12:.LANCHOR7]
@@ -14018,7 +14320,7 @@ ftl_test_block:
 	ldrb	w0, [x21, 2]
 	bfi	w0, w1, 3, 2
 	strb	w0, [x21, 2]
-.L2344:
+.L2377:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -14053,18 +14355,18 @@ ftl_prog_page:
 	bl	flash_prog_page_en
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L2359
-	mov	w2, 2203
+	bne	.L2392
+	mov	w2, 2231
 	adrp	x1, .LANCHOR177
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	adrp	x0, .LC135
+	adrp	x0, .LC141
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC135
+	add	x0, x0, :lo12:.LC141
 	bl	printf
-.L2359:
+.L2392:
 	mov	w0, w19
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -14085,12 +14387,12 @@ ftl_info_flush:
 	stp	x23, x24, [sp, 48]
 	adrp	x22, .LANCHOR179
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LANCHOR107
+	adrp	x23, .LANCHOR103
 	stp	x27, x28, [sp, 80]
 	mov	x26, x23
 	ldrb	w2, [x21, #:lo12:.LANCHOR123]
 	add	x25, x22, :lo12:.LANCHOR179
-	add	x28, x23, :lo12:.LANCHOR107
+	add	x28, x23, :lo12:.LANCHOR103
 	mov	w24, 0
 	stp	x19, x20, [sp, 16]
 	mov	w27, w0
@@ -14098,13 +14400,13 @@ ftl_info_flush:
 	lsl	w2, w2, 1
 	add	x0, x20, :lo12:.LANCHOR178
 	bl	ftl_memset
-.L2363:
+.L2396:
 	add	x0, x22, :lo12:.LANCHOR179
 	ldrb	w6, [x22, #:lo12:.LANCHOR179]
-	ldrh	w19, [x23, #:lo12:.LANCHOR107]
+	ldrh	w19, [x23, #:lo12:.LANCHOR103]
 	ldrh	w4, [x0, 2]
-	adrp	x0, .LANCHOR100
-	ldr	x0, [x0, #:lo12:.LANCHOR100]
+	adrp	x0, .LANCHOR102
+	ldr	x0, [x0, #:lo12:.LANCHOR102]
 	ldr	w3, [x0, 4]
 	add	w3, w3, 1
 	str	w3, [x0, 4]
@@ -14113,37 +14415,37 @@ ftl_info_flush:
 	str	w3, [x0, 4]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2364
+	tbz	x0, 12, .L2397
 	mov	w2, w4
 	mov	w1, w6
 	str	w4, [x29, 96]
-	adrp	x0, .LC137
+	adrp	x0, .LC143
 	str	w6, [x29, 104]
-	add	x0, x0, :lo12:.LC137
+	add	x0, x0, :lo12:.LC143
 	bl	printf
 	ldr	w4, [x29, 96]
 	ldr	w6, [x29, 104]
-.L2364:
-	adrp	x1, .LANCHOR83
+.L2397:
+	adrp	x1, .LANCHOR85
 	ldrh	w0, [x25, 2]
-	ldrh	w1, [x1, #:lo12:.LANCHOR83]
+	ldrh	w1, [x1, #:lo12:.LANCHOR85]
 	cmp	w1, w0
-	bhi	.L2365
+	bhi	.L2398
 	adrp	x19, .LANCHOR180
 	adrp	x3, .LC0
 	add	x19, x19, :lo12:.LANCHOR180
 	add	x3, x3, :lo12:.LC0
-.L2372:
+.L2405:
 	ldrb	w0, [x25, 1]
-	adrp	x4, .LANCHOR26
+	adrp	x4, .LANCHOR27
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x25, 1]
 	cmp	w0, 7
-	bls	.L2366
+	bls	.L2399
 	mov	x0, 0
-.L2371:
-	ldr	x2, [x4, #:lo12:.LANCHOR26]
+.L2404:
+	ldr	x2, [x4, #:lo12:.LANCHOR27]
 	add	w1, w0, 8
 	and	w24, w0, 65535
 	add	x1, x2, x1, sxtw
@@ -14151,24 +14453,24 @@ ftl_info_flush:
 	add	w1, w2, 127
 	and	w1, w1, 255
 	cmp	w1, 125
-	bhi	.L2367
+	bhi	.L2400
 	mov	x0, x3
 	stp	x4, x3, [x29, 96]
-	mov	w2, 742
+	mov	w2, 748
 	mov	x1, x19
 	bl	printf
 	ldp	x4, x3, [x29, 96]
-.L2370:
+.L2403:
 	strb	w24, [x25, 1]
 	mov	w24, 1
-.L2366:
-	ldr	x0, [x4, #:lo12:.LANCHOR26]
+.L2399:
+	ldr	x0, [x4, #:lo12:.LANCHOR27]
 	ldrb	w1, [x25, 1]
 	add	x0, x0, x1
 	ldrb	w0, [x0, 40]
 	strb	w0, [x25]
 	cmp	w0, 255
-	beq	.L2372
+	beq	.L2405
 	ldrh	w19, [x28]
 	mul	w19, w19, w0
 	mov	w0, 0
@@ -14184,7 +14486,7 @@ ftl_info_flush:
 	bl	ftl_prog_page
 	mov	w0, 1
 	strh	w0, [x25, 2]
-.L2373:
+.L2406:
 	ldrb	w4, [x21, #:lo12:.LANCHOR123]
 	mov	w1, w19
 	add	x3, x20, :lo12:.LANCHOR178
@@ -14197,40 +14499,40 @@ ftl_info_flush:
 	adrp	x0, .LANCHOR181
 	add	w1, w1, 1
 	strh	w1, [x25, 2]
-	beq	.L2374
+	beq	.L2407
 	ldrb	w1, [x0, #:lo12:.LANCHOR181]
-	cbz	w1, .L2375
-.L2374:
+	cbz	w1, .L2408
+.L2407:
 	strb	wzr, [x0, #:lo12:.LANCHOR181]
-	b	.L2363
-.L2367:
+	b	.L2396
+.L2400:
 	cmp	w2, 255
-	bne	.L2370
+	bne	.L2403
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L2371
+	bne	.L2404
 	mov	w24, w0
-	b	.L2370
-.L2365:
+	b	.L2403
+.L2398:
 	madd	w19, w19, w6, w4
-	cbnz	w0, .L2373
+	cbnz	w0, .L2406
 	mov	w1, w19
 	bl	flash_erase_block
-	b	.L2373
-.L2375:
-	cbnz	w24, .L2376
-.L2384:
+	b	.L2406
+.L2408:
+	cbnz	w24, .L2409
+.L2417:
 	adrp	x0, .LANCHOR179
 	ldrb	w0, [x0, #:lo12:.LANCHOR179]
 	cmp	w0, 255
-	bne	.L2378
+	bne	.L2411
 	adrp	x1, .LANCHOR180
 	adrp	x0, .LC0
-	mov	w2, 778
+	mov	w2, 784
 	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2378:
+.L2411:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -14239,42 +14541,42 @@ ftl_info_flush:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2376:
+.L2409:
 	ldrb	w19, [x25, 1]
 	adrp	x20, .LANCHOR180
 	adrp	x21, .LC0
 	add	x20, x20, :lo12:.LANCHOR180
 	add	w19, w19, 1
 	add	x21, x21, :lo12:.LC0
-	adrp	x22, .LANCHOR26
-.L2379:
+	adrp	x22, .LANCHOR27
+.L2412:
 	cmp	w19, 7
-	bhi	.L2384
-	ldr	x1, [x22, #:lo12:.LANCHOR26]
+	bhi	.L2417
+	ldr	x1, [x22, #:lo12:.LANCHOR27]
 	add	w0, w19, 8
 	add	x0, x1, x0, sxtw
 	ldrb	w23, [x0, 32]
 	add	w0, w23, 127
 	and	w0, w0, 255
 	cmp	w0, 125
-	bhi	.L2380
-	mov	w2, 771
+	bhi	.L2413
+	mov	w2, 777
 	mov	x1, x20
 	mov	x0, x21
 	bl	printf
-.L2381:
-	ldrh	w1, [x26, #:lo12:.LANCHOR107]
+.L2414:
+	ldrh	w1, [x26, #:lo12:.LANCHOR103]
 	mov	w0, 0
 	mul	w1, w1, w23
 	bl	flash_erase_block
-	b	.L2382
-.L2380:
+	b	.L2415
+.L2413:
 	cmp	w23, 255
-	bne	.L2381
-.L2382:
+	bne	.L2414
+.L2415:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L2379
+	b	.L2412
 	.size	ftl_info_flush, .-ftl_info_flush
 	.section	.text.ftl_info_blk_init,"ax",@progbits
 	.align	2
@@ -14298,16 +14600,16 @@ ftl_info_blk_init:
 	stp	x21, x22, [sp, 32]
 	str	x0, [x1, #:lo12:.LANCHOR7]
 	adrp	x1, .LANCHOR6
-	adrp	x22, .LANCHOR100
-	stp	x25, x26, [sp, 64]
-	ldrh	w1, [x1, #:lo12:.LANCHOR6]
-	adrp	x21, .LANCHOR179
+	adrp	x21, .LANCHOR102
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR26
+	ldrh	w1, [x1, #:lo12:.LANCHOR6]
+	adrp	x24, .LANCHOR27
+	stp	x25, x26, [sp, 64]
+	adrp	x22, .LANCHOR179
 	stp	x27, x28, [sp, 80]
-	adrp	x26, .LANCHOR107
+	adrp	x26, .LANCHOR103
 	add	x1, x0, x1, lsl 2
-	str	x1, [x22, #:lo12:.LANCHOR100]
+	str	x1, [x21, #:lo12:.LANCHOR102]
 	mov	w1, 0
 	bl	ftl_memset
 	mov	w1, 0
@@ -14315,59 +14617,59 @@ ftl_info_blk_init:
 	adrp	x0, ftl_ext_info_data_buffer
 	add	x0, x0, :lo12:ftl_ext_info_data_buffer
 	bl	ftl_memset
-	adrp	x25, .LANCHOR123
-	ldr	x1, [x23, #:lo12:.LANCHOR26]
-	add	x0, x21, :lo12:.LANCHOR179
+	adrp	x23, .LANCHOR123
+	ldr	x1, [x24, #:lo12:.LANCHOR27]
+	add	x0, x22, :lo12:.LANCHOR179
 	mov	w27, 21574
-	add	x26, x26, :lo12:.LANCHOR107
-	add	x25, x25, :lo12:.LANCHOR123
+	add	x26, x26, :lo12:.LANCHOR103
+	add	x23, x23, :lo12:.LANCHOR123
 	mov	x19, 7
 	strb	wzr, [x0, 1]
 	movk	w27, 0x494c, lsl 16
 	ldrb	w1, [x1, 40]
-	strb	w1, [x21, #:lo12:.LANCHOR179]
+	strb	w1, [x22, #:lo12:.LANCHOR179]
 	strh	wzr, [x0, 2]
-.L2400:
-	ldr	x1, [x23, #:lo12:.LANCHOR26]
+.L2433:
+	ldr	x1, [x24, #:lo12:.LANCHOR27]
 	add	w0, w19, 8
-	sxth	w24, w19
+	sxth	w25, w19
 	mov	w28, w19
 	add	x0, x1, x0, sxtw
 	ldrb	w0, [x0, 32]
 	cmp	w0, 255
-	bne	.L2399
-.L2404:
+	bne	.L2432
+.L2437:
 	sub	x19, x19, #1
 	cmn	x19, #1
-	bne	.L2400
-	mov	w24, 0
-.L2401:
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2405
-	ldr	x0, [x22, #:lo12:.LANCHOR100]
+	bne	.L2433
+	mov	w25, 0
+.L2434:
+	adrp	x23, .LANCHOR14
+	ldr	w0, [x23, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2438
+	ldr	x0, [x21, #:lo12:.LANCHOR102]
 	mov	w2, 4800
 	mov	w1, w19
 	ldr	w3, [x0]
-	adrp	x0, .LC139
-	add	x0, x0, :lo12:.LC139
+	adrp	x0, .LC145
+	add	x0, x0, :lo12:.LC145
 	bl	printf
-.L2405:
+.L2438:
 	cmn	w19, #1
-	bne	.L2406
+	bne	.L2439
 	mov	w1, 0
 	mov	w2, 16384
 	add	x0, x20, :lo12:ftl_info_data_buffer
 	bl	ftl_memset
-	ldr	x0, [x22, #:lo12:.LANCHOR100]
+	ldr	x0, [x21, #:lo12:.LANCHOR102]
 	mov	w1, 21574
 	movk	w1, 0x494c, lsl 16
 	str	w1, [x0]
-	mov	w1, 20
+	mov	w1, 22
 	movk	w1, 0x6, lsl 16
 	str	w1, [x0, 12]
 	mov	w0, w19
-.L2398:
+.L2431:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -14375,10 +14677,10 @@ ftl_info_blk_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2399:
+.L2432:
 	ldrh	w6, [x26]
 	add	x8, x20, :lo12:ftl_info_data_buffer
-	ldrb	w4, [x25]
+	ldrb	w4, [x23]
 	adrp	x7, .LANCHOR178
 	add	x7, x7, :lo12:.LANCHOR178
 	mov	x2, x8
@@ -14393,83 +14695,83 @@ ftl_info_blk_init:
 	cmn	w0, #1
 	ldr	w6, [x29, 124]
 	ldp	x7, x8, [x29, 104]
-	bne	.L2402
-	ldrb	w4, [x25]
+	bne	.L2435
+	ldrb	w4, [x23]
 	mov	x3, x7
 	mov	x2, x8
 	add	w1, w6, 1
 	mov	w0, 0
 	bl	ftl_read_page
 	mov	w5, w0
-.L2402:
+.L2435:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2403
-	ldr	x0, [x22, #:lo12:.LANCHOR100]
+	tbz	x0, 12, .L2436
+	ldr	x0, [x21, #:lo12:.LANCHOR102]
 	mov	w2, w5
 	str	w5, [x29, 124]
 	mov	w3, 672
 	mov	w1, w28
 	ldr	w4, [x0]
-	adrp	x0, .LC138
-	add	x0, x0, :lo12:.LC138
+	adrp	x0, .LC144
+	add	x0, x0, :lo12:.LC144
 	bl	printf
 	ldr	w5, [x29, 124]
-.L2403:
+.L2436:
 	cmn	w5, #1
-	beq	.L2404
-	ldr	x0, [x22, #:lo12:.LANCHOR100]
+	beq	.L2437
+	ldr	x0, [x21, #:lo12:.LANCHOR102]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L2404
-	mov	w19, w24
-	b	.L2401
-.L2406:
-	ldr	x1, [x23, #:lo12:.LANCHOR26]
-	add	w0, w24, 8
+	bne	.L2437
+	mov	w19, w25
+	b	.L2434
+.L2439:
+	ldr	x1, [x24, #:lo12:.LANCHOR27]
+	add	w0, w25, 8
 	add	x20, x20, :lo12:ftl_info_data_buffer
 	mov	w4, 4
 	mov	x2, x20
-	adrp	x26, .LANCHOR123
+	adrp	x27, .LANCHOR123
 	add	x0, x1, x0, sxtw
-	mov	w27, 21574
-	add	x26, x26, :lo12:.LANCHOR123
-	movk	w27, 0x494c, lsl 16
+	mov	w28, 21574
+	add	x27, x27, :lo12:.LANCHOR123
+	movk	w28, 0x494c, lsl 16
 	ldrb	w1, [x0, 32]
-	add	x0, x21, :lo12:.LANCHOR179
-	strb	w1, [x21, #:lo12:.LANCHOR179]
-	strb	w24, [x0, 1]
-	adrp	x24, .LANCHOR178
-	add	x24, x24, :lo12:.LANCHOR178
+	add	x0, x22, :lo12:.LANCHOR179
+	strb	w1, [x22, #:lo12:.LANCHOR179]
+	strb	w25, [x0, 1]
+	adrp	x25, .LANCHOR178
+	add	x25, x25, :lo12:.LANCHOR178
 	mov	w0, 0
-	mov	x3, x24
+	mov	x3, x25
 	bl	flash_get_last_written_page
-	sxth	w23, w0
+	sxth	w24, w0
 	add	w0, w0, 1
 	and	w19, w0, 65535
-	adrp	x0, .LANCHOR107
-	ldrb	w25, [x21, #:lo12:.LANCHOR179]
-	ldrh	w0, [x0, #:lo12:.LANCHOR107]
-	madd	w25, w25, w0, w23
-.L2408:
-	tbnz	w23, #31, .L2411
-	ldrb	w4, [x26]
-	mov	x3, x24
+	adrp	x0, .LANCHOR103
+	ldrb	w26, [x22, #:lo12:.LANCHOR179]
+	ldrh	w0, [x0, #:lo12:.LANCHOR103]
+	madd	w26, w26, w0, w24
+.L2441:
+	tbnz	w24, #31, .L2445
+	ldrb	w4, [x27]
+	mov	x3, x25
 	mov	x2, x20
-	mov	w1, w25
+	mov	w1, w26
 	mov	w0, 0
 	bl	ftl_read_page
 	cmn	w0, #1
-	beq	.L2409
-	ldr	x0, [x22, #:lo12:.LANCHOR100]
+	beq	.L2442
+	ldr	x0, [x21, #:lo12:.LANCHOR102]
 	ldr	w0, [x0]
-	cmp	w0, w27
-	bne	.L2409
-.L2411:
-	add	x21, x21, :lo12:.LANCHOR179
-	strh	w19, [x21, 2]
+	cmp	w0, w28
+	bne	.L2442
+.L2445:
+	add	x22, x22, :lo12:.LANCHOR179
+	strh	w19, [x22, 2]
 	bl	ftl_tmp_into_update
-	ldr	x1, [x22, #:lo12:.LANCHOR100]
+	ldr	x1, [x21, #:lo12:.LANCHOR102]
 	ldr	w0, [x1, 64]
 	add	w0, w0, 1
 	str	w0, [x1, 64]
@@ -14477,13 +14779,23 @@ ftl_info_blk_init:
 	bl	ftl_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
+	ldr	w0, [x23, #:lo12:.LANCHOR14]
+	tbnz	x0, 14, .L2443
+.L2460:
 	mov	w0, 0
-	b	.L2398
-.L2409:
-	sub	w23, w23, #1
-	sub	w25, w25, #1
-	sxth	w23, w23
-	b	.L2408
+	b	.L2431
+.L2442:
+	sub	w24, w24, #1
+	sub	w26, w26, #1
+	sxth	w24, w24
+	b	.L2441
+.L2443:
+	ldr	x0, [x21, #:lo12:.LANCHOR102]
+	ldr	w1, [x0, 156]
+	adrp	x0, .LC146
+	add	x0, x0, :lo12:.LC146
+	bl	printf
+	b	.L2460
 	.size	ftl_info_blk_init, .-ftl_info_blk_init
 	.section	.text.ftl_ext_info_flush,"ax",@progbits
 	.align	2
@@ -14500,43 +14812,43 @@ ftl_ext_info_flush:
 	ldr	w1, [x0, 520]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbz	w1, .L2427
+	cbz	w1, .L2462
 	str	wzr, [x0, 520]
-.L2427:
-	adrp	x20, .LANCHOR83
+.L2462:
+	adrp	x20, .LANCHOR85
 	adrp	x22, .LANCHOR184
-	adrp	x21, .LANCHOR102
-	add	x20, x20, :lo12:.LANCHOR83
+	adrp	x21, .LANCHOR66
+	add	x20, x20, :lo12:.LANCHOR85
 	add	x22, x22, :lo12:.LANCHOR184
-	add	x21, x21, :lo12:.LANCHOR102
+	add	x21, x21, :lo12:.LANCHOR66
 	mov	w0, 0
 	bl	ftl_total_vpn_update
-.L2428:
-	adrp	x23, .LANCHOR100
+.L2463:
+	adrp	x23, .LANCHOR102
 	mov	x24, x23
-.L2431:
-	ldr	x0, [x23, #:lo12:.LANCHOR100]
+.L2466:
+	ldr	x0, [x23, #:lo12:.LANCHOR102]
 	ldr	w1, [x0, 56]
 	add	w1, w1, 1
 	str	w1, [x0, 56]
 	ldrh	w1, [x0, 140]
 	ldrh	w0, [x20]
 	cmp	w1, w0
-	bcc	.L2429
+	bcc	.L2464
 	bl	ftl_ext_alloc_new_blk
-.L2429:
-	ldr	x0, [x24, #:lo12:.LANCHOR100]
+.L2464:
+	ldr	x0, [x24, #:lo12:.LANCHOR102]
 	ldrh	w1, [x0, 130]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2430
+	bne	.L2465
 	adrp	x0, .LC0
-	mov	w2, 1798
+	mov	w2, 1819
 	mov	x1, x22
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2430:
-	ldr	x1, [x24, #:lo12:.LANCHOR100]
+.L2465:
+	ldr	x1, [x24, #:lo12:.LANCHOR102]
 	mov	w19, 21
 	ldrh	w0, [x21]
 	adrp	x26, .LANCHOR123
@@ -14549,8 +14861,8 @@ ftl_ext_info_flush:
 	sub	w19, w19, #1
 	and	w19, w19, w2
 	asr	w28, w2, w0
-	adrp	x0, .LANCHOR107
-	ldrh	w2, [x0, #:lo12:.LANCHOR107]
+	adrp	x0, .LANCHOR103
+	ldrh	w2, [x0, #:lo12:.LANCHOR103]
 	ldrh	w0, [x1, 140]
 	mov	w1, 0
 	madd	w19, w19, w2, w0
@@ -14559,7 +14871,7 @@ ftl_ext_info_flush:
 	and	w19, w19, 65535
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	ldr	x0, [x24, #:lo12:.LANCHOR100]
+	ldr	x0, [x24, #:lo12:.LANCHOR102]
 	mov	w1, w19
 	ldrb	w4, [x26, #:lo12:.LANCHOR123]
 	mov	x3, x25
@@ -14570,22 +14882,22 @@ ftl_ext_info_flush:
 	str	w0, [x25, 4]
 	mov	w0, w28
 	bl	ftl_prog_page
-	ldr	x2, [x24, #:lo12:.LANCHOR100]
+	ldr	x2, [x24, #:lo12:.LANCHOR102]
 	ldrh	w1, [x2, 140]
 	add	w1, w1, 1
 	and	w1, w1, 65535
 	strh	w1, [x2, 140]
 	cmp	w1, 1
-	beq	.L2431
+	beq	.L2466
 	cmn	w0, #1
 	adrp	x0, .LANCHOR183
-	beq	.L2432
+	beq	.L2467
 	ldrb	w1, [x0, #:lo12:.LANCHOR183]
-	cbz	w1, .L2433
-.L2432:
+	cbz	w1, .L2468
+.L2467:
 	strb	wzr, [x0, #:lo12:.LANCHOR183]
-	b	.L2428
-.L2433:
+	b	.L2463
+.L2468:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -14601,23 +14913,23 @@ ftl_ext_info_flush:
 	.type	ftl_ext_info_init, %function
 ftl_ext_info_init:
 	stp	x29, x30, [sp, -112]!
-	adrp	x0, .LANCHOR117
+	adrp	x0, .LANCHOR113
 	mov	w4, 4
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR100
-	strh	wzr, [x0, #:lo12:.LANCHOR117]
+	adrp	x20, .LANCHOR102
+	strh	wzr, [x0, #:lo12:.LANCHOR113]
 	mov	w19, 21
-	ldr	x0, [x20, #:lo12:.LANCHOR100]
+	ldr	x0, [x20, #:lo12:.LANCHOR102]
 	stp	x21, x22, [sp, 32]
 	stp	x27, x28, [sp, 80]
 	stp	x23, x24, [sp, 48]
 	adrp	x24, .LANCHOR178
 	ldrh	w1, [x0, 130]
-	adrp	x0, .LANCHOR102
+	adrp	x0, .LANCHOR66
 	stp	x25, x26, [sp, 64]
 	add	x3, x24, :lo12:.LANCHOR178
-	ldrh	w0, [x0, #:lo12:.LANCHOR102]
+	ldrh	w0, [x0, #:lo12:.LANCHOR66]
 	adrp	x25, ftl_ext_info_data_buffer
 	add	x2, x25, :lo12:ftl_ext_info_data_buffer
 	sub	w0, w19, w0
@@ -14633,29 +14945,29 @@ ftl_ext_info_init:
 	sxth	w22, w0
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2444
-	ldr	x0, [x20, #:lo12:.LANCHOR100]
+	tbz	x0, 12, .L2479
+	ldr	x0, [x20, #:lo12:.LANCHOR102]
 	adrp	x1, .LANCHOR185
 	and	w4, w21, 65535
 	mov	w3, w22
-	mov	w2, 1842
+	mov	w2, 1863
 	add	x1, x1, :lo12:.LANCHOR185
 	ldrh	w5, [x0, 130]
-	adrp	x0, .LC140
-	add	x0, x0, :lo12:.LC140
+	adrp	x0, .LC147
+	add	x0, x0, :lo12:.LC147
 	bl	printf
-.L2444:
+.L2479:
 	adrp	x26, .LANCHOR123
-	adrp	x28, .LANCHOR107
+	adrp	x28, .LANCHOR103
 	mov	w5, 20038
 	add	x26, x26, :lo12:.LANCHOR123
-	add	x28, x28, :lo12:.LANCHOR107
+	add	x28, x28, :lo12:.LANCHOR103
 	mov	w23, 0
 	movk	w5, 0x4549, lsl 16
-.L2445:
+.L2480:
 	and	w21, w22, 65535
 	sub	w0, w21, w23
-	tbnz	x0, 15, .L2450
+	tbnz	x0, 15, .L2485
 	ldrh	w0, [x28]
 	sub	w1, w22, w23
 	ldrb	w4, [x26]
@@ -14668,22 +14980,22 @@ ftl_ext_info_init:
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
 	ldr	w5, [x29, 108]
-	beq	.L2446
+	beq	.L2481
 	adrp	x0, .LANCHOR10
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x0]
 	cmp	w0, w5
-	bne	.L2446
-.L2450:
+	bne	.L2481
+.L2485:
 	bl	zftl_sblk_list_init
-	ldr	x0, [x20, #:lo12:.LANCHOR100]
+	ldr	x0, [x20, #:lo12:.LANCHOR102]
 	ldrh	w1, [x0, 140]
 	cmp	w1, w22
-	bgt	.L2448
+	bgt	.L2483
 	add	w21, w21, 1
 	strh	w21, [x0, 140]
 	bl	ftl_ext_info_flush
-.L2448:
+.L2483:
 	adrp	x0, .LANCHOR10
 	mov	w1, -1
 	ldp	x19, x20, [sp, 16]
@@ -14691,22 +15003,26 @@ ftl_ext_info_init:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	strh	w1, [x0, 584]
-	ldp	x25, x26, [sp, 64]
 	strh	w1, [x0, 586]
-	ldp	x27, x28, [sp, 80]
 	strh	w1, [x0, 588]
 	strh	w1, [x0, 590]
+	mov	w1, 65535
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	str	w1, [x0, 560]
 	str	wzr, [x0, 520]
+	mov	w1, -1
 	str	wzr, [x0, 604]
 	str	wzr, [x0, 608]
+	str	w1, [x0, 564]
 	adrp	x0, .LANCHOR64
 	strh	w1, [x0, #:lo12:.LANCHOR64]
 	mov	w0, 0
 	ldp	x29, x30, [sp], 112
 	ret
-.L2446:
+.L2481:
 	add	w23, w23, 1
-	b	.L2445
+	b	.L2480
 	.size	ftl_ext_info_init, .-ftl_ext_info_init
 	.section	.text.ftl_low_format_data_init,"ax",@progbits
 	.align	2
@@ -14723,44 +15039,44 @@ ftl_low_format_data_init:
 	str	x21, [sp, 32]
 	bl	ftl_memset
 	bl	zftl_sblk_list_init
-	adrp	x19, .LANCHOR100
+	adrp	x19, .LANCHOR102
 	mov	w0, 1
 	bl	ftl_alloc_sblk
 	mov	w1, 0
 	mov	w21, w0
 	bl	ftl_erase_sblk
-	ldr	x1, [x19, #:lo12:.LANCHOR100]
+	ldr	x1, [x19, #:lo12:.LANCHOR102]
 	mov	w0, w21
 	add	x1, x1, 672
 	bl	ftl_get_blk_list_in_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldr	x0, [x19, #:lo12:.LANCHOR102]
 	ldrh	w20, [x0, 672]
 	strh	wzr, [x0, 690]
 	mov	w0, 65533
 	sub	w1, w20, #1
 	cmp	w0, w1, uxth
-	bcs	.L2459
+	bcs	.L2494
 	adrp	x1, .LANCHOR186
 	adrp	x0, .LC0
-	mov	w2, 2025
+	mov	w2, 2053
 	add	x1, x1, :lo12:.LANCHOR186
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2459:
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+.L2494:
+	ldr	x0, [x19, #:lo12:.LANCHOR102]
 	mov	w2, 256
 	mov	w1, 255
 	add	x0, x0, 416
 	strh	wzr, [x0, 280]
 	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldr	x0, [x19, #:lo12:.LANCHOR102]
 	mov	w2, 4096
 	mov	w1, 0
 	add	x0, x0, 704
 	bl	ftl_memset
-	adrp	x1, .LANCHOR102
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
-	ldrh	w2, [x1, #:lo12:.LANCHOR102]
+	adrp	x1, .LANCHOR66
+	ldr	x0, [x19, #:lo12:.LANCHOR102]
+	ldrh	w2, [x1, #:lo12:.LANCHOR66]
 	mov	w1, 21
 	sub	w1, w1, w2
 	strh	w21, [x0, 416]
@@ -14781,7 +15097,7 @@ ftl_low_format_data_init:
 	mov	w20, w0
 	mov	w1, 0
 	bl	ftl_erase_phy_blk
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldr	x0, [x19, #:lo12:.LANCHOR102]
 	mov	w1, 2
 	strh	w20, [x0, 130]
 	mov	w20, -1
@@ -14797,7 +15113,7 @@ ftl_low_format_data_init:
 	mov	w1, 3
 	add	x0, x0, 48
 	bl	ftl_open_sblk_init
-	ldr	x1, [x19, #:lo12:.LANCHOR100]
+	ldr	x1, [x19, #:lo12:.LANCHOR102]
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	add	x0, x0, 136
 	ldrh	w2, [x1, 134]
@@ -14838,44 +15154,44 @@ ftl_low_format_data_init:
 ftl_low_format:
 	stp	x29, x30, [sp, -80]!
 	mov	w1, 0
-	adrp	x0, .LC141
-	add	x0, x0, :lo12:.LC141
+	adrp	x0, .LC148
+	add	x0, x0, :lo12:.LC148
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x20, .LANCHOR188
 	stp	x21, x22, [sp, 32]
 	add	x20, x20, :lo12:.LANCHOR188
 	stp	x25, x26, [sp, 64]
-	adrp	x22, .LANCHOR26
+	adrp	x22, .LANCHOR27
 	mov	x25, x22
 	stp	x23, x24, [sp, 48]
 	mov	w19, 8
 	adrp	x23, .LC0
 	bl	printf
-.L2464:
-	ldr	x0, [x22, #:lo12:.LANCHOR26]
+.L2499:
+	ldr	x0, [x22, #:lo12:.LANCHOR27]
 	add	x0, x0, x19, sxtw
 	ldrb	w21, [x0, 32]
 	add	w0, w21, 127
 	and	w0, w0, 255
 	cmp	w0, 125
-	bhi	.L2462
-	mov	w2, 2079
+	bhi	.L2497
+	mov	w2, 2107
 	mov	x1, x20
 	add	x0, x23, :lo12:.LC0
 	bl	printf
-.L2462:
+.L2497:
 	cmp	w21, 255
-	beq	.L2463
-	adrp	x0, .LANCHOR107
-	ldrh	w1, [x0, #:lo12:.LANCHOR107]
+	beq	.L2498
+	adrp	x0, .LANCHOR103
+	ldrh	w1, [x0, #:lo12:.LANCHOR103]
 	mov	w0, 0
 	mul	w1, w1, w21
 	bl	flash_erase_block
-.L2463:
+.L2498:
 	add	w19, w19, 1
 	cmp	w19, 16
-	bne	.L2464
+	bne	.L2499
 	bl	sblk_init
 	adrp	x22, .LANCHOR7
 	bl	ftl_info_blk_init
@@ -14889,29 +15205,29 @@ ftl_low_format:
 	mov	w3, 1
 	ldrh	w2, [x19, #:lo12:.LANCHOR6]
 	add	x2, x0, x2, lsl 2
-.L2465:
+.L2500:
 	cmp	x0, x2
-	bne	.L2466
-	adrp	x21, .LANCHOR100
+	bne	.L2501
+	adrp	x21, .LANCHOR102
 	mov	w1, 21574
 	adrp	x24, .LANCHOR60
 	add	x24, x24, :lo12:.LANCHOR60
-	ldr	x0, [x21, #:lo12:.LANCHOR100]
+	ldr	x0, [x21, #:lo12:.LANCHOR102]
 	movk	w1, 0x494c, lsl 16
 	mov	w20, 0
 	mov	w26, 1
 	strh	wzr, [x0, 148]
 	str	w1, [x0]
-.L2467:
+.L2502:
 	ldrh	w0, [x19, #:lo12:.LANCHOR6]
-	adrp	x23, .LANCHOR101
+	adrp	x23, .LANCHOR67
 	cmp	w0, w20
-	bhi	.L2476
-	ldr	x0, [x25, #:lo12:.LANCHOR26]
+	bhi	.L2511
+	ldr	x0, [x25, #:lo12:.LANCHOR27]
 	mov	w4, 3
-	ldrb	w2, [x23, #:lo12:.LANCHOR101]
+	ldrb	w2, [x23, #:lo12:.LANCHOR67]
 	mov	w10, 15
-	ldr	x6, [x21, #:lo12:.LANCHOR100]
+	ldr	x6, [x21, #:lo12:.LANCHOR102]
 	cmp	w2, 1
 	ldr	x1, [x22, #:lo12:.LANCHOR7]
 	ldrb	w0, [x0, 47]
@@ -14925,7 +15241,7 @@ ftl_low_format:
 	add	x0, x0, 4
 	add	w20, w5, 1
 	add	x0, x1, x0
-.L2479:
+.L2514:
 	cmp	w2, 4
 	add	x1, x1, 4
 	csel	w7, w10, w4, eq
@@ -14934,7 +15250,7 @@ ftl_low_format:
 	orr	w7, w7, -32
 	strb	w7, [x1, -2]
 	cmp	x1, x0
-	bne	.L2479
+	bne	.L2514
 	mul	w5, w5, w8
 	mov	w4, 16
 	add	w0, w8, w3
@@ -14946,28 +15262,28 @@ ftl_low_format:
 	add	w4, w20, w4
 	and	w4, w4, 65535
 	strh	w4, [x6, 134]
-	tbz	x0, 12, .L2480
-	adrp	x0, .LC142
+	tbz	x0, 12, .L2515
+	adrp	x0, .LC149
 	mov	w3, w20
 	mov	w2, 128
-	mov	w1, 2126
-	add	x0, x0, :lo12:.LC142
+	mov	w1, 2154
+	add	x0, x0, :lo12:.LC149
 	bl	printf
-.L2480:
-	ldr	x0, [x21, #:lo12:.LANCHOR100]
+.L2515:
+	ldr	x0, [x21, #:lo12:.LANCHOR102]
 	mov	w2, 128
 	mov	w1, 255
 	add	x0, x0, 160
 	bl	ftl_memset
-	adrp	x0, .LANCHOR108
-	ldrb	w13, [x23, #:lo12:.LANCHOR101]
-	ldr	x2, [x21, #:lo12:.LANCHOR100]
+	adrp	x0, .LANCHOR104
+	ldrb	w13, [x23, #:lo12:.LANCHOR67]
+	ldr	x2, [x21, #:lo12:.LANCHOR102]
 	mov	w4, 21
-	ldrb	w15, [x0, #:lo12:.LANCHOR108]
-	adrp	x0, .LANCHOR102
+	ldrb	w15, [x0, #:lo12:.LANCHOR104]
+	adrp	x0, .LANCHOR66
 	and	w16, w13, 65535
 	ldr	x14, [x22, #:lo12:.LANCHOR7]
-	ldrh	w0, [x0, #:lo12:.LANCHOR102]
+	ldrh	w0, [x0, #:lo12:.LANCHOR66]
 	mov	w3, 0
 	ldrh	w12, [x2, 134]
 	sub	w0, w4, w0
@@ -14976,9 +15292,9 @@ ftl_low_format:
 	lsl	w4, w4, w0
 	and	w1, w1, 65535
 	and	w4, w4, 65535
-.L2481:
+.L2516:
 	cmp	w20, w12
-	bcc	.L2487
+	bcc	.L2522
 	ldrh	w0, [x19, #:lo12:.LANCHOR6]
 	strh	w3, [x2, 112]
 	sub	w0, w0, w12
@@ -14994,41 +15310,41 @@ ftl_low_format:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2466:
+.L2501:
 	ldrb	w1, [x0, 2]
 	add	x0, x0, 4
 	and	w1, w1, 31
 	bfi	w1, w3, 3, 2
 	strb	w1, [x0, -2]
-	b	.L2465
-.L2476:
-	adrp	x0, .LANCHOR71
+	b	.L2500
+.L2511:
+	adrp	x0, .LANCHOR73
 	strh	w20, [x24]
-	ldrb	w0, [x0, #:lo12:.LANCHOR71]
-	cbnz	w0, .L2468
+	ldrb	w0, [x0, #:lo12:.LANCHOR73]
+	cbnz	w0, .L2503
 	mov	w0, w20
 	bl	ftl_test_block
-.L2468:
-	ldrb	w11, [x23, #:lo12:.LANCHOR101]
-	adrp	x0, .LANCHOR108
+.L2503:
+	ldrb	w11, [x23, #:lo12:.LANCHOR67]
+	adrp	x0, .LANCHOR104
 	ldr	x6, [x22, #:lo12:.LANCHOR7]
 	mov	w7, 0
-	ldrb	w14, [x0, #:lo12:.LANCHOR108]
+	ldrb	w14, [x0, #:lo12:.LANCHOR104]
 	mov	w10, 0
-	ldr	x13, [x21, #:lo12:.LANCHOR100]
+	ldr	x13, [x21, #:lo12:.LANCHOR102]
 	mov	w8, 0
 	mul	w12, w20, w11
 	add	x6, x6, x20, uxth 2
-.L2469:
+.L2504:
 	cmp	w8, w14
-	bcs	.L2473
+	bcs	.L2508
 	add	w15, w11, w7
-	b	.L2474
-.L2472:
+	b	.L2509
+.L2507:
 	add	w1, w7, w12
 	mov	w0, w8
 	bl	flash_check_bad_block
-	cbz	w0, .L2470
+	cbz	w0, .L2505
 	ldrb	w1, [x6, 3]
 	lsl	w0, w26, w7
 	orr	w0, w0, w1
@@ -15036,29 +15352,29 @@ ftl_low_format:
 	ldrh	w0, [x13, 148]
 	add	w0, w0, 1
 	strh	w0, [x13, 148]
-.L2471:
+.L2506:
 	add	w7, w7, 1
-.L2474:
+.L2509:
 	cmp	w7, w15
-	bne	.L2472
+	bne	.L2507
 	add	w8, w8, 1
 	sub	w12, w12, w11
 	and	w8, w8, 65535
-	b	.L2469
-.L2470:
+	b	.L2504
+.L2505:
 	add	w10, w10, 1
 	and	w10, w10, 65535
-	b	.L2471
-.L2473:
-	cbnz	w10, .L2475
+	b	.L2506
+.L2508:
+	cbnz	w10, .L2510
 	ldrb	w0, [x6, 2]
 	orr	w0, w0, -32
 	strb	w0, [x6, 2]
-.L2475:
+.L2510:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2467
-.L2487:
+	b	.L2502
+.L2522:
 	add	x10, x14, x20, uxth 2
 	mov	w6, 0
 	mov	w8, 0
@@ -15066,48 +15382,48 @@ ftl_low_format:
 	ldrb	w0, [x10, 2]
 	orr	w0, w0, -32
 	strb	w0, [x10, 2]
-.L2482:
+.L2517:
 	cmp	w5, w15
-	bcc	.L2489
+	bcc	.L2524
 	add	w20, w20, 1
 	add	w1, w1, w16
 	and	w20, w20, 65535
 	and	w1, w1, 65535
-	b	.L2481
-.L2485:
+	b	.L2516
+.L2520:
 	ldrb	w11, [x10, 3]
 	add	w17, w8, w7
 	asr	w11, w11, w17
-	tbnz	x11, 0, .L2483
+	tbnz	x11, 0, .L2518
 	cmp	w13, 1
-	bls	.L2488
+	bls	.L2523
 	and	w0, w0, 1
 	add	w0, w1, w0
 	and	w0, w0, 65535
-.L2484:
+.L2519:
 	add	x11, x2, x3, sxtw 1
 	add	w3, w3, 1
 	and	w3, w3, 65535
 	add	w0, w0, w6
 	strh	w0, [x11, 160]
-.L2483:
+.L2518:
 	add	x7, x7, 1
-.L2486:
+.L2521:
 	and	w0, w7, 65535
 	cmp	w0, w16
-	bcc	.L2485
+	bcc	.L2520
 	add	w5, w5, 1
 	add	w6, w4, w6
 	and	w5, w5, 65535
 	add	w8, w8, w13
 	and	w6, w6, 65535
-	b	.L2482
-.L2488:
+	b	.L2517
+.L2523:
 	mov	w0, w1
-	b	.L2484
-.L2489:
+	b	.L2519
+.L2524:
 	mov	x7, 0
-	b	.L2486
+	b	.L2521
 	.size	ftl_low_format, .-ftl_low_format
 	.section	.text.ftl_re_low_format,"ax",@progbits
 	.align	2
@@ -15116,27 +15432,27 @@ ftl_low_format:
 ftl_re_low_format:
 	stp	x29, x30, [sp, -16]!
 	mov	w1, 1
-	adrp	x0, .LC143
-	add	x0, x0, :lo12:.LC143
+	adrp	x0, .LC150
+	add	x0, x0, :lo12:.LC150
 	add	x29, sp, 0
 	bl	printf
 	bl	sblk_init
 	bl	ftl_info_blk_init
 	bl	ftl_ext_info_init
-	adrp	x0, .LANCHOR100
+	adrp	x0, .LANCHOR102
 	adrp	x2, .LANCHOR6
 	mov	w3, 0
 	mov	w4, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR100]
+	ldr	x0, [x0, #:lo12:.LANCHOR102]
 	mov	w5, 0
 	ldrh	w7, [x2, #:lo12:.LANCHOR6]
 	adrp	x2, .LANCHOR7
 	ldr	x2, [x2, #:lo12:.LANCHOR7]
 	ldrh	w1, [x0, 134]
 	add	x2, x2, x1, uxth 2
-.L2500:
+.L2535:
 	cmp	w1, w7
-	bcc	.L2504
+	bcc	.L2539
 	strh	w5, [x0, 114]
 	strh	w4, [x0, 118]
 	strh	w3, [x0, 116]
@@ -15147,29 +15463,29 @@ ftl_re_low_format:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L2504:
+.L2539:
 	ldrb	w6, [x2, 2]
 	and	w8, w6, 31
 	strb	w8, [x2, 2]
 	ands	w6, w6, 24
-	bne	.L2501
+	bne	.L2536
 	add	w5, w5, 1
 	and	w5, w5, 65535
-.L2502:
+.L2537:
 	add	w1, w1, 1
 	add	x2, x2, 4
 	and	w1, w1, 65535
-	b	.L2500
-.L2501:
+	b	.L2535
+.L2536:
 	cmp	w6, 16
-	bne	.L2503
+	bne	.L2538
 	add	w4, w4, 1
 	and	w4, w4, 65535
-	b	.L2502
-.L2503:
+	b	.L2537
+.L2538:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L2502
+	b	.L2537
 	.size	ftl_re_low_format, .-ftl_re_low_format
 	.section	.text.ftl_prog_ppa_page,"ax",@progbits
 	.align	2
@@ -15191,19 +15507,19 @@ ftl_prog_ppa_page:
 ftl_write_last_log_page:
 	ldrh	w1, [x0, 6]
 	cmp	w1, 1
-	bne	.L2509
+	bne	.L2544
 	stp	x29, x30, [sp, -48]!
-	adrp	x1, .LANCHOR113
+	adrp	x1, .LANCHOR109
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
 	stp	x21, x22, [sp, 32]
-	ldr	x20, [x1, #:lo12:.LANCHOR113]
+	ldr	x20, [x1, #:lo12:.LANCHOR109]
 	ldrh	w22, [x0, 12]
 	bl	ftl_get_new_free_page
 	mov	w21, w0
 	cmn	w0, #1
-	beq	.L2510
+	beq	.L2545
 	ldrh	w0, [x19]
 	add	x20, x20, x22, uxth 2
 	bl	ftl_vpn_decrement
@@ -15212,10 +15528,10 @@ ftl_write_last_log_page:
 	add	x6, x0, :lo12:.LANCHOR176
 	movk	w1, 0xf55f, lsl 16
 	str	w1, [x0, #:lo12:.LANCHOR176]
-	adrp	x0, .LANCHOR83
-	ldrh	w1, [x0, #:lo12:.LANCHOR83]
-	adrp	x0, .LANCHOR76
-	ldrb	w0, [x0, #:lo12:.LANCHOR76]
+	adrp	x0, .LANCHOR85
+	ldrh	w1, [x0, #:lo12:.LANCHOR85]
+	adrp	x0, .LANCHOR78
+	ldrb	w0, [x0, #:lo12:.LANCHOR78]
 	mul	w1, w1, w0
 	mov	x0, x20
 	lsl	w1, w1, 2
@@ -15228,13 +15544,13 @@ ftl_write_last_log_page:
 	mov	w0, w21
 	str	wzr, [x6, 12]
 	bl	ftl_prog_ppa_page
-.L2510:
+.L2545:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L2509:
+.L2544:
 	mov	w0, -1
 	ret
 	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
@@ -15254,41 +15570,41 @@ ftl_open_sblk_recovery:
 	mov	x25, x1
 	stp	x23, x24, [sp, 48]
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2516
+	tbz	x0, 12, .L2551
 	ldrh	w1, [x19, 2]
-	adrp	x0, .LC144
-	add	x0, x0, :lo12:.LC144
+	adrp	x0, .LC151
+	add	x0, x0, :lo12:.LC151
 	bl	printf
-.L2516:
+.L2551:
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2517
+	tbz	x0, 12, .L2552
 	ldrb	w1, [x19, 5]
-	adrp	x0, .LC145
-	add	x0, x0, :lo12:.LC145
+	adrp	x0, .LC152
+	add	x0, x0, :lo12:.LC152
 	bl	printf
-.L2517:
+.L2552:
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2518
+	tbz	x0, 12, .L2553
 	ldrh	w1, [x19]
-	adrp	x0, .LC146
-	add	x0, x0, :lo12:.LC146
+	adrp	x0, .LC153
+	add	x0, x0, :lo12:.LC153
 	bl	printf
-.L2518:
+.L2553:
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2519
+	tbz	x0, 12, .L2554
 	ldrh	w2, [x19, 18]
-	adrp	x0, .LC147
+	adrp	x0, .LC154
 	ldrh	w1, [x19, 16]
-	add	x0, x0, :lo12:.LC147
+	add	x0, x0, :lo12:.LC154
 	bl	printf
-.L2519:
+.L2554:
 	ldrh	w0, [x19, 10]
 	strh	w0, [x19, 14]
 	adrp	x0, .LANCHOR6
 	ldrh	w1, [x19]
 	ldrh	w0, [x0, #:lo12:.LANCHOR6]
 	cmp	w1, w0
-	bcs	.L2515
+	bcs	.L2550
 	mov	w0, 1
 	add	x26, x29, 160
 	bl	buf_alloc
@@ -15302,68 +15618,68 @@ ftl_open_sblk_recovery:
 	ldrh	w23, [x19, 2]
 	add	x0, x0, :lo12:.LANCHOR123
 	mov	w27, 2
-	adrp	x24, .LANCHOR83
+	adrp	x24, .LANCHOR85
 	str	x0, [x29, 128]
 	str	wzr, [x29, 152]
-.L2521:
-	ldrh	w0, [x24, #:lo12:.LANCHOR83]
+.L2556:
+	ldrh	w0, [x24, #:lo12:.LANCHOR85]
 	cmp	w0, w23
-	bhi	.L2534
-.L2524:
+	bhi	.L2569
+.L2559:
 	ldrh	w0, [x19, 10]
 	ldrh	w1, [x19, 6]
-	ldrh	w2, [x24, #:lo12:.LANCHOR83]
+	ldrh	w2, [x24, #:lo12:.LANCHOR85]
 	add	w1, w1, w0
 	ldrb	w0, [x19, 9]
 	strh	w23, [x19, 2]
 	strb	w22, [x19, 5]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L2535
+	beq	.L2570
 	adrp	x1, .LANCHOR189
 	adrp	x0, .LC0
-	mov	w2, 1480
+	mov	w2, 1493
 	add	x1, x1, :lo12:.LANCHOR189
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2535:
-	adrp	x2, .LANCHOR113
+.L2570:
+	adrp	x2, .LANCHOR109
 	ldrh	w3, [x19, 10]
 	mov	w0, 0
 	mov	w1, 0
-	ldr	x4, [x2, #:lo12:.LANCHOR113]
+	ldr	x4, [x2, #:lo12:.LANCHOR109]
 	str	x2, [x29, 136]
-.L2536:
+.L2571:
 	cmp	w1, w3
-	bcc	.L2538
+	bcc	.L2573
 	ldrb	w22, [x19, 9]
 	adrp	x23, .LANCHOR9
-	ldrh	w1, [x24, #:lo12:.LANCHOR83]
+	ldrh	w1, [x24, #:lo12:.LANCHOR85]
 	madd	w22, w22, w1, w0
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
 	sub	w22, w22, w3
 	and	w22, w22, 65535
-	tbz	x0, 12, .L2539
+	tbz	x0, 12, .L2574
 	ldrh	w1, [x19]
 	ldr	x2, [x23, #:lo12:.LANCHOR9]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w3, [x2, x0]
-	adrp	x0, .LC148
+	adrp	x0, .LC155
 	mov	w2, w22
-	add	x0, x0, :lo12:.LC148
+	add	x0, x0, :lo12:.LC155
 	bl	printf
-.L2539:
+.L2574:
 	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	ldrh	w1, [x19]
 	strh	w22, [x0, x1, lsl 1]
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 14, .L2540
+	tbz	x0, 14, .L2575
 	ldp	w1, w2, [x29, 160]
-	adrp	x0, .LC149
+	adrp	x0, .LC156
 	ldp	w3, w4, [x29, 168]
-	add	x0, x0, :lo12:.LC149
+	add	x0, x0, :lo12:.LC156
 	bl	printf
-.L2540:
+.L2575:
 	adrp	x25, .LANCHOR123
 	ldr	x0, [x20, 8]
 	mov	w1, 0
@@ -15371,45 +15687,45 @@ ftl_open_sblk_recovery:
 	ldrb	w2, [x25, #:lo12:.LANCHOR123]
 	lsl	w2, w2, 9
 	bl	ftl_memset
-	adrp	x0, .LC151
-	add	x0, x0, :lo12:.LC151
+	adrp	x0, .LC158
+	add	x0, x0, :lo12:.LC158
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR76
-	add	x0, x0, :lo12:.LANCHOR76
+	adrp	x0, .LANCHOR78
+	add	x0, x0, :lo12:.LANCHOR78
 	str	x0, [x29, 112]
-.L2541:
-	adrp	x0, .LANCHOR76
+.L2576:
+	adrp	x0, .LANCHOR78
 	str	w23, [x29, 148]
-	ldrb	w0, [x0, #:lo12:.LANCHOR76]
+	ldrb	w0, [x0, #:lo12:.LANCHOR78]
 	mul	w0, w0, w27
 	cmp	w23, w0
-	bcc	.L2554
+	bcc	.L2589
 	mov	x0, x20
 	bl	buf_free
 	ldrh	w1, [x19, 12]
-	ldrh	w0, [x24, #:lo12:.LANCHOR83]
+	ldrh	w0, [x24, #:lo12:.LANCHOR85]
 	ldrb	w2, [x19, 9]
 	madd	w0, w0, w2, w1
 	mov	x1, -4
 	add	x0, x1, x0, sxtw 2
 	ldr	x1, [x29, 136]
-	ldr	x1, [x1, #:lo12:.LANCHOR113]
+	ldr	x1, [x1, #:lo12:.LANCHOR109]
 	ldr	w0, [x1, x0]
 	cmn	w0, #1
-	beq	.L2555
+	beq	.L2590
 	adrp	x1, .LANCHOR189
 	adrp	x0, .LC0
-	mov	w2, 1554
+	mov	w2, 1567
 	add	x1, x1, :lo12:.LANCHOR189
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2555:
+.L2590:
 	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bne	.L2515
+	bne	.L2550
 	mov	x0, x19
 	bl	ftl_write_last_log_page
-.L2515:
+.L2550:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -15417,25 +15733,25 @@ ftl_open_sblk_recovery:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 224
 	ret
-.L2534:
+.L2569:
 	ldrb	w22, [x19, 5]
-	adrp	x0, .LANCHOR107
-	add	x0, x0, :lo12:.LANCHOR107
+	adrp	x0, .LANCHOR103
+	add	x0, x0, :lo12:.LANCHOR103
 	str	x0, [x29, 136]
-.L2522:
+.L2557:
 	ldrb	w0, [x19, 9]
 	cmp	w0, w22
-	bhi	.L2533
+	bhi	.L2568
 	add	w23, w23, 1
 	strb	wzr, [x19, 5]
 	and	w23, w23, 65535
-	b	.L2521
-.L2533:
+	b	.L2556
+.L2568:
 	add	x0, x19, x22, sxtw 1
 	mov	w1, 65535
 	ldrh	w0, [x0, 16]
 	cmp	w0, w1
-	beq	.L2523
+	beq	.L2558
 	ldr	x1, [x29, 136]
 	ldr	x2, [x20, 24]
 	ldrh	w1, [x1]
@@ -15448,21 +15764,21 @@ ftl_open_sblk_recovery:
 	bl	ftl_read_ppa_page
 	mov	w28, w0
 	cmp	w0, 512
-	beq	.L2524
+	beq	.L2559
 	cmn	w0, #1
-	beq	.L2525
+	beq	.L2560
 	ldr	x0, [x20, 24]
 	ldr	w1, [x0]
 	cmn	w1, #1
-	bne	.L2525
+	bne	.L2560
 	ldr	w0, [x0, 4]
 	cmn	w0, #1
-	bne	.L2525
+	bne	.L2560
 	ldr	x0, [x20, 8]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L2524
-.L2525:
+	beq	.L2559
+.L2560:
 	adrp	x0, .LANCHOR182
 	mov	w1, 1
 	strb	w1, [x0, #:lo12:.LANCHOR182]
@@ -15470,58 +15786,58 @@ ftl_open_sblk_recovery:
 	ldrh	w1, [x19, 10]
 	madd	w0, w0, w23, w22
 	cmp	w1, w0
-	beq	.L2526
+	beq	.L2561
 	adrp	x1, .LANCHOR189
 	adrp	x0, .LC0
-	mov	w2, 1399
+	mov	w2, 1412
 	add	x1, x1, :lo12:.LANCHOR189
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2526:
+.L2561:
 	ldrh	w0, [x19, 10]
 	ldrh	w1, [x19, 6]
 	ldrb	w2, [x19, 9]
 	add	w1, w1, w0
-	ldrh	w0, [x24, #:lo12:.LANCHOR83]
+	ldrh	w0, [x24, #:lo12:.LANCHOR85]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L2527
+	beq	.L2562
 	adrp	x1, .LANCHOR189
 	adrp	x0, .LC0
-	mov	w2, 1400
+	mov	w2, 1413
 	add	x1, x1, :lo12:.LANCHOR189
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2527:
+.L2562:
 	cmn	w28, #1
-	beq	.L2529
+	beq	.L2564
 	ldr	x0, [x20, 24]
 	ldr	w0, [x0, 4]
 	cmn	w0, #1
-	beq	.L2529
+	beq	.L2564
 	bl	lpa_hash_get_ppa
-	cbz	x25, .L2531
+	cbz	x25, .L2566
 	ldr	x3, [x20, 24]
 	ldr	w1, [x3, 8]
 	cmp	w0, w1
-	beq	.L2531
+	beq	.L2566
 	cmn	w0, #1
-	beq	.L2531
-	adrp	x4, .LANCHOR102
+	beq	.L2566
+	adrp	x4, .LANCHOR66
 	mov	w28, 21
 	mov	w27, 1
-	ldrh	w5, [x4, #:lo12:.LANCHOR102]
+	ldrh	w5, [x4, #:lo12:.LANCHOR66]
 	sub	w1, w28, w5
 	lsr	w2, w0, w5
-	adrp	x5, .LANCHOR101
+	adrp	x5, .LANCHOR67
 	lsl	w1, w27, w1
 	sub	w1, w1, #1
 	and	w1, w1, w2
-	ldrb	w2, [x5, #:lo12:.LANCHOR101]
+	ldrb	w2, [x5, #:lo12:.LANCHOR67]
 	udiv	w1, w1, w2
 	ldrh	w2, [x25]
 	cmp	w2, w1, uxth
-	bne	.L2531
+	bne	.L2566
 	ldr	x1, [x29, 128]
 	adrp	x6, .LANCHOR178
 	ldr	w7, [x3]
@@ -15536,22 +15852,22 @@ ftl_open_sblk_recovery:
 	ldr	w7, [x29, 120]
 	ldr	w0, [x6, #:lo12:.LANCHOR178]
 	cmp	w7, w0
-	bhi	.L2531
+	bhi	.L2566
 	ldr	x0, [x20, 24]
 	ldr	w0, [x0, 8]
 	cmn	w0, #1
-	beq	.L2529
+	beq	.L2564
 	ldp	x5, x4, [x29, 104]
-	ldrh	w1, [x4, #:lo12:.LANCHOR102]
+	ldrh	w1, [x4, #:lo12:.LANCHOR66]
 	sub	w28, w28, w1
 	lsr	w0, w0, w1
 	lsl	w27, w27, w28
 	sub	w27, w27, #1
 	and	w27, w27, w0
-	ldrb	w0, [x5, #:lo12:.LANCHOR101]
+	ldrb	w0, [x5, #:lo12:.LANCHOR67]
 	udiv	w0, w27, w0
 	bl	ftl_vpn_decrement
-.L2529:
+.L2564:
 	ldrh	w0, [x19, 6]
 	mov	w27, 4
 	sub	w0, w0, #1
@@ -15561,28 +15877,28 @@ ftl_open_sblk_recovery:
 	strh	w0, [x19, 10]
 	mov	w0, 1
 	str	w0, [x29, 152]
-.L2523:
+.L2558:
 	add	w22, w22, 1
 	and	w22, w22, 65535
-	b	.L2522
-.L2538:
+	b	.L2557
+.L2573:
 	ldrh	w2, [x19, 12]
 	add	w2, w2, w1
 	ldr	w2, [x4, x2, lsl 2]
 	cmn	w2, #1
-	beq	.L2537
+	beq	.L2572
 	add	w22, w0, 1
 	and	w0, w22, 65535
-.L2537:
+.L2572:
 	add	w1, w1, 1
-	b	.L2536
-.L2554:
+	b	.L2571
+.L2589:
 	ldr	w0, [x26, x23, lsl 2]
-	adrp	x28, .LANCHOR100
+	adrp	x28, .LANCHOR102
 	cmn	w0, #1
-	bne	.L2542
-.L2546:
-	ldr	x1, [x28, #:lo12:.LANCHOR100]
+	bne	.L2577
+.L2581:
+	ldr	x1, [x28, #:lo12:.LANCHOR102]
 	mov	w22, -1
 	ldr	x0, [x20, 24]
 	ldr	w1, [x1, 8]
@@ -15590,22 +15906,22 @@ ftl_open_sblk_recovery:
 	stp	w22, wzr, [x0, 8]
 	ldr	x0, [x20, 8]
 	str	wzr, [x0]
-.L2543:
+.L2578:
 	ldr	w0, [x29, 152]
-	cbz	w0, .L2548
+	cbz	w0, .L2583
 	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bls	.L2548
+	bls	.L2583
 	add	x0, x21, :lo12:.LANCHOR14
 	mov	x28, x0
 	add	x0, x25, :lo12:.LANCHOR123
 	str	x0, [x29, 128]
-.L2595:
+.L2630:
 	mov	x0, x19
 	bl	ftl_get_new_free_page
 	mov	w4, w0
 	ldr	w0, [x28]
-	tbz	x0, 14, .L2550
+	tbz	x0, 14, .L2585
 	ldr	x0, [x20, 24]
 	mov	w1, w4
 	str	w4, [x29, 104]
@@ -15613,7 +15929,7 @@ ftl_open_sblk_recovery:
 	ldr	x0, [x29, 120]
 	bl	printf
 	ldr	w4, [x29, 104]
-.L2550:
+.L2585:
 	ldr	x0, [x29, 112]
 	ldr	w2, [x29, 148]
 	ldrh	w1, [x19, 6]
@@ -15622,7 +15938,7 @@ ftl_open_sblk_recovery:
 	add	w0, w0, 1
 	sub	w0, w0, w2
 	cmp	w1, w0
-	bls	.L2548
+	bls	.L2583
 	ldr	x0, [x29, 128]
 	ldr	x1, [x20, 8]
 	ldr	x2, [x20, 24]
@@ -15636,19 +15952,19 @@ ftl_open_sblk_recovery:
 	ldr	w1, [x29, 104]
 	cmn	w22, #1
 	ccmn	w1, #1, 4, ne
-	beq	.L2551
+	beq	.L2586
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 14, .L2552
+	tbz	x0, 14, .L2587
 	ldr	x0, [x20, 24]
 	ldrh	w1, [x19, 12]
 	ldrh	w3, [x19, 10]
 	add	w3, w3, w1
 	ldp	w1, w2, [x0, 4]
 	sub	w3, w3, #1
-	adrp	x0, .LC152
-	add	x0, x0, :lo12:.LC152
+	adrp	x0, .LC159
+	add	x0, x0, :lo12:.LC159
 	bl	printf
-.L2552:
+.L2587:
 	ldr	x0, [x20, 24]
 	ldrh	w1, [x19, 12]
 	ldrh	w2, [x19, 10]
@@ -15657,10 +15973,10 @@ ftl_open_sblk_recovery:
 	ldr	w0, [x0, 4]
 	sub	w2, w2, #1
 	bl	lpa_hash_update_ppa
-.L2548:
+.L2583:
 	add	x23, x23, 1
-	b	.L2541
-.L2542:
+	b	.L2576
+.L2577:
 	ldrb	w3, [x25, #:lo12:.LANCHOR123]
 	ldr	x1, [x20, 8]
 	ldr	x2, [x20, 24]
@@ -15671,18 +15987,18 @@ ftl_open_sblk_recovery:
 	bl	lpa_hash_get_ppa
 	mov	w4, w0
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 14, .L2544
+	tbz	x0, 14, .L2579
 	ldr	x0, [x20, 24]
 	mov	w1, w4
 	ldr	w2, [x26, x23, lsl 2]
 	str	w4, [x29, 128]
 	ldr	w3, [x0, 4]
-	adrp	x0, .LC150
-	add	x0, x0, :lo12:.LC150
+	adrp	x0, .LC157
+	add	x0, x0, :lo12:.LC157
 	bl	printf
 	ldr	w4, [x29, 128]
-.L2544:
-	ldr	x2, [x28, #:lo12:.LANCHOR100]
+.L2579:
+	ldr	x2, [x28, #:lo12:.LANCHOR102]
 	ldr	w0, [x26, x23, lsl 2]
 	cmp	w4, w0
 	ldr	x0, [x20, 24]
@@ -15695,37 +16011,37 @@ ftl_open_sblk_recovery:
 	mov	w1, 1
 	str	w4, [x0, 8]
 	str	w1, [x0, 12]
-	bne	.L2543
-	b	.L2546
-.L2551:
+	bne	.L2578
+	b	.L2581
+.L2586:
 	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bls	.L2548
+	bls	.L2583
 	cmn	w22, #1
-	bne	.L2595
-	b	.L2548
-.L2531:
+	bne	.L2630
+	b	.L2583
+.L2566:
 	ldr	x3, [x20, 24]
 	adrp	x0, .LANCHOR120
 	ldr	w0, [x0, #:lo12:.LANCHOR120]
 	ldr	w1, [x3, 4]
 	cmp	w1, w0
-	bcs	.L2529
+	bcs	.L2564
 	ldrb	w0, [x19, 9]
-	ldrh	w1, [x24, #:lo12:.LANCHOR83]
+	ldrh	w1, [x24, #:lo12:.LANCHOR85]
 	ldrh	w2, [x19, 10]
 	mul	w0, w0, w1
 	sub	w0, w0, #1
 	cmp	w2, w0
-	bge	.L2529
-	adrp	x0, .LANCHOR100
+	bge	.L2564
+	adrp	x0, .LANCHOR102
 	ldr	w1, [x3]
-	ldr	x0, [x0, #:lo12:.LANCHOR100]
+	ldr	x0, [x0, #:lo12:.LANCHOR102]
 	ldr	w4, [x0, 8]
 	cmp	w1, w4
-	bls	.L2532
+	bls	.L2567
 	str	w1, [x0, 8]
-.L2532:
+.L2567:
 	ldrh	w0, [x19, 12]
 	add	w2, w2, w0
 	ldp	w0, w1, [x3, 4]
@@ -15738,7 +16054,7 @@ ftl_open_sblk_recovery:
 	str	w0, [x29, 168]
 	ldr	w0, [x29, 148]
 	str	w0, [x29, 172]
-	b	.L2529
+	b	.L2564
 	.size	ftl_open_sblk_recovery, .-ftl_open_sblk_recovery
 	.section	.text.pm_write_page,"ax",@progbits
 	.align	2
@@ -15750,46 +16066,46 @@ pm_write_page:
 	stp	x19, x20, [sp, 16]
 	mov	w19, w0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR83
+	adrp	x21, .LANCHOR85
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR107
+	adrp	x22, .LANCHOR103
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LANCHOR100
+	adrp	x23, .LANCHOR102
 	mov	x25, x1
-	add	x21, x21, :lo12:.LANCHOR83
+	add	x21, x21, :lo12:.LANCHOR85
 	mov	x20, x23
-	add	x22, x22, :lo12:.LANCHOR107
+	add	x22, x22, :lo12:.LANCHOR103
 	mov	w24, 65535
 	str	x27, [sp, 80]
-.L2618:
-	ldr	x0, [x23, #:lo12:.LANCHOR100]
+.L2653:
+	ldr	x0, [x23, #:lo12:.LANCHOR102]
 	ldr	w1, [x0, 48]
 	ldrh	w2, [x0, 696]
 	add	w1, w1, 1
 	str	w1, [x0, 48]
 	ldrh	w1, [x21]
 	cmp	w2, w1
-	bcs	.L2619
+	bcs	.L2654
 	ldrh	w0, [x0, 692]
 	cmp	w0, w24
-	bne	.L2620
-.L2619:
+	bne	.L2655
+.L2654:
 	bl	pm_alloc_new_blk
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2620:
-	ldr	x0, [x20, #:lo12:.LANCHOR100]
+.L2655:
+	ldr	x0, [x20, #:lo12:.LANCHOR102]
 	ldrh	w0, [x0, 692]
 	cmp	w0, w24
-	bne	.L2621
+	bne	.L2656
 	adrp	x1, .LANCHOR190
 	adrp	x0, .LC0
 	mov	w2, 230
 	add	x1, x1, :lo12:.LANCHOR190
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2621:
-	ldr	x0, [x20, #:lo12:.LANCHOR100]
+.L2656:
+	ldr	x0, [x20, #:lo12:.LANCHOR102]
 	adrp	x27, .LANCHOR191
 	ldrh	w1, [x22]
 	mov	w2, 64
@@ -15801,7 +16117,7 @@ pm_write_page:
 	bl	ftl_memset
 	ldr	x3, [x27, #:lo12:.LANCHOR191]
 	mov	x2, x25
-	ldr	x0, [x20, #:lo12:.LANCHOR100]
+	ldr	x0, [x20, #:lo12:.LANCHOR102]
 	str	w19, [x3]
 	ldr	w1, [x0, 48]
 	ldrb	w0, [x0, 694]
@@ -15810,34 +16126,34 @@ pm_write_page:
 	ldrb	w4, [x1, #:lo12:.LANCHOR123]
 	mov	w1, w26
 	bl	ftl_prog_page
-	ldr	x2, [x20, #:lo12:.LANCHOR100]
+	ldr	x2, [x20, #:lo12:.LANCHOR102]
 	ldrh	w1, [x2, 696]
 	add	w1, w1, 1
 	and	w1, w1, 65535
 	strh	w1, [x2, 696]
 	cmp	w1, 1
 	adrp	x1, .LANCHOR192
-	beq	.L2622
+	beq	.L2657
 	ldrb	w3, [x1, #:lo12:.LANCHOR192]
-	cbz	w3, .L2623
-.L2622:
+	cbz	w3, .L2658
+.L2657:
 	strb	wzr, [x1, #:lo12:.LANCHOR192]
-	b	.L2618
-.L2623:
+	b	.L2653
+.L2658:
 	cmn	w0, #1
-	bne	.L2625
+	bne	.L2660
 	mov	w1, w26
-	adrp	x0, .LC153
-	add	x0, x0, :lo12:.LC153
+	adrp	x0, .LC160
+	add	x0, x0, :lo12:.LC160
 	bl	printf
-	b	.L2618
-.L2625:
+	b	.L2653
+.L2660:
 	ldrh	w0, [x2, 698]
 	cmp	w19, w0
-	bcs	.L2626
+	bcs	.L2661
 	add	x19, x2, x19, uxtw 2
 	str	w26, [x19, 704]
-.L2626:
+.L2661:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -15864,15 +16180,15 @@ ftl_dump_write_open_sblk:
 	stp	x25, x26, [sp, 112]
 	stp	x27, x28, [sp, 128]
 	cmp	w0, w20
-	bls	.L2631
-	adrp	x25, .LANCHOR73
+	bls	.L2666
+	adrp	x25, .LANCHOR75
 	str	x25, [x29, 136]
-	ldrb	w0, [x25, #:lo12:.LANCHOR73]
-	cbnz	w0, .L2633
-	adrp	x0, .LANCHOR70
-	ldrb	w0, [x0, #:lo12:.LANCHOR70]
-	cbz	w0, .L2631
-.L2633:
+	ldrb	w0, [x25, #:lo12:.LANCHOR75]
+	cbnz	w0, .L2668
+	adrp	x0, .LANCHOR72
+	ldrb	w0, [x0, #:lo12:.LANCHOR72]
+	cbz	w0, .L2666
+.L2668:
 	adrp	x0, .LANCHOR7
 	ubfiz	x14, x20, 2, 16
 	mov	x15, x0
@@ -15881,12 +16197,12 @@ ftl_dump_write_open_sblk:
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 160
-	bne	.L2653
-	adrp	x0, .LANCHOR69
-	ldrb	w10, [x0, #:lo12:.LANCHOR69]
-.L2634:
+	bne	.L2688
+	adrp	x0, .LANCHOR71
+	ldrb	w10, [x0, #:lo12:.LANCHOR71]
+.L2669:
 	add	x22, x29, 176
-	adrp	x23, .LANCHOR83
+	adrp	x23, .LANCHOR85
 	str	w10, [x29, 128]
 	mov	w0, w20
 	mov	w24, 0
@@ -15895,7 +16211,7 @@ ftl_dump_write_open_sblk:
 	mov	w27, 0
 	add	x1, x22, 16
 	bl	ftl_get_blk_list_in_sblk
-	ldrh	w1, [x23, #:lo12:.LANCHOR83]
+	ldrh	w1, [x23, #:lo12:.LANCHOR85]
 	and	w0, w0, 255
 	strb	w0, [x29, 153]
 	strb	wzr, [x29, 149]
@@ -15909,9 +16225,9 @@ ftl_dump_write_open_sblk:
 	ldrb	w2, [x1, 2]
 	mov	w1, w20
 	ldrh	w4, [x0, x14]
-	adrp	x0, .LC154
+	adrp	x0, .LC161
 	ubfx	x5, x5, 11, 8
-	add	x0, x0, :lo12:.LC154
+	add	x0, x0, :lo12:.LC161
 	ubfx	x3, x2, 3, 2
 	and	w4, w4, 2047
 	ubfx	x2, x2, 5, 3
@@ -15920,52 +16236,52 @@ ftl_dump_write_open_sblk:
 	bl	buf_alloc
 	mov	x19, x0
 	ldr	w10, [x29, 128]
-	adrp	x12, .LANCHOR107
-	add	x14, x23, :lo12:.LANCHOR83
-	add	x12, x12, :lo12:.LANCHOR107
-.L2635:
+	adrp	x12, .LANCHOR103
+	add	x14, x23, :lo12:.LANCHOR85
+	add	x12, x12, :lo12:.LANCHOR103
+.L2670:
 	ldrh	w0, [x14]
 	cmp	w0, w25
-	bls	.L2641
+	bls	.L2676
 	lsl	w11, w25, 1
-	adrp	x26, .LC155
+	adrp	x26, .LC162
 	sub	w11, w11, #1
 	mov	w27, 0
-	add	x26, x26, :lo12:.LC155
-	b	.L2645
-.L2653:
+	add	x26, x26, :lo12:.LC162
+	b	.L2680
+.L2688:
 	mov	w10, 1
-	b	.L2634
-.L2643:
+	b	.L2669
+.L2678:
 	ldrh	w13, [x22, x28]
 	mov	w0, 65535
 	cmp	w13, w0
-	bne	.L2636
-.L2642:
+	bne	.L2671
+.L2677:
 	add	w24, w24, 1
 	and	w24, w24, 65535
-.L2637:
+.L2672:
 	cmp	w10, w24
-	bcs	.L2643
+	bcs	.L2678
 	add	w27, w27, 1
 	and	w27, w27, 65535
-.L2645:
+.L2680:
 	ldrb	w0, [x29, 153]
 	cmp	w0, w27
-	bls	.L2644
+	bls	.L2679
 	sxtw	x28, w27
 	mov	w24, 1
 	add	x28, x28, 8
 	lsl	x28, x28, 1
-	b	.L2637
-.L2636:
+	b	.L2672
+.L2671:
 	ldrh	w21, [x12]
 	cmp	w10, 3
 	mul	w21, w21, w13
-	bne	.L2638
+	bne	.L2673
 	add	w21, w25, w21
 	orr	w21, w21, w24, lsl 24
-.L2639:
+.L2674:
 	str	w21, [x19, 40]
 	mov	w1, 1
 	stp	x12, x14, [x29, 96]
@@ -16000,23 +16316,23 @@ ftl_dump_write_open_sblk:
 	ldp	w11, w10, [x29, 116]
 	cmp	w15, 512
 	ldp	x12, x14, [x29, 96]
-	bne	.L2642
-.L2641:
+	bne	.L2677
+.L2676:
 	mov	w4, w24
 	mov	w3, w27
 	mov	w2, w25
 	mov	w1, w20
 	adrp	x24, .LANCHOR123
-	adrp	x0, .LC156
-	add	x0, x0, :lo12:.LC156
+	adrp	x0, .LC163
+	add	x0, x0, :lo12:.LC163
 	bl	printf
 	ldr	x0, [x19, 8]
 	mov	w1, 0
 	ldrb	w2, [x24, #:lo12:.LANCHOR123]
-	adrp	x26, .LC157
-	adrp	x27, .LANCHOR69
-	add	x26, x26, :lo12:.LC157
-	add	x27, x27, :lo12:.LANCHOR69
+	adrp	x26, .LC164
+	adrp	x27, .LANCHOR71
+	add	x26, x26, :lo12:.LC164
+	add	x27, x27, :lo12:.LANCHOR71
 	lsl	w2, w2, 9
 	bl	ftl_memset
 	ldr	x0, [x19, 24]
@@ -16024,78 +16340,78 @@ ftl_dump_write_open_sblk:
 	ldrb	w2, [x24, #:lo12:.LANCHOR123]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.L2646:
-	ldrh	w0, [x23, #:lo12:.LANCHOR83]
+.L2681:
+	ldrh	w0, [x23, #:lo12:.LANCHOR85]
 	cmp	w0, w25
-	bls	.L2651
+	bls	.L2686
 	ldr	x0, [x29, 136]
 	lsl	w28, w25, 1
 	mov	w21, 0
-	add	x0, x0, :lo12:.LANCHOR73
+	add	x0, x0, :lo12:.LANCHOR75
 	str	x0, [x29, 128]
-	b	.L2652
-.L2638:
+	b	.L2687
+.L2673:
 	cmp	w10, 2
-	bne	.L2640
-	adrp	x0, .LANCHOR69
+	bne	.L2675
+	adrp	x0, .LANCHOR71
 	add	w21, w21, w11
 	add	w21, w21, w24
-	ldrb	w3, [x0, #:lo12:.LANCHOR69]
+	ldrb	w3, [x0, #:lo12:.LANCHOR71]
 	orr	w21, w21, w3, lsl 24
-	b	.L2639
-.L2640:
+	b	.L2674
+.L2675:
 	add	w21, w25, w21
-	b	.L2639
-.L2644:
+	b	.L2674
+.L2679:
 	add	w8, w25, 1
 	and	w25, w8, 65535
-	b	.L2635
-.L2650:
+	b	.L2670
+.L2685:
 	mov	w2, w21
 	mov	w1, w25
 	mov	x0, x26
 	bl	printf
 	ldr	x0, [x29, 128]
-	adrp	x2, .LANCHOR107
+	adrp	x2, .LANCHOR103
 	ldrb	w1, [x0]
 	sxtw	x0, w21
-	cbz	w1, .L2647
+	cbz	w1, .L2682
 	add	x0, x0, 8
-	ldrh	w1, [x2, #:lo12:.LANCHOR107]
+	ldrh	w1, [x2, #:lo12:.LANCHOR103]
 	ldrh	w0, [x22, x0, lsl 1]
 	mul	w0, w0, w1
 	orr	w0, w0, w25
 	str	w0, [x19, 40]
 	mov	x0, x19
 	bl	sblk_3d_tlc_dump_prog
-.L2648:
+.L2683:
 	add	w21, w21, 1
 	and	w21, w21, 65535
-.L2652:
+.L2687:
 	ldrb	w0, [x29, 153]
 	cmp	w0, w21
-	bhi	.L2650
+	bhi	.L2685
 	add	w8, w25, 1
 	and	w25, w8, 65535
-	b	.L2646
-.L2647:
+	b	.L2681
+.L2682:
 	ldrb	w1, [x27]
 	add	x0, x0, 8
 	cmp	w1, 2
-	bne	.L2649
+	bne	.L2684
 	ldrh	w0, [x22, x0, lsl 1]
-	ldrh	w1, [x2, #:lo12:.LANCHOR107]
+	ldrh	w1, [x2, #:lo12:.LANCHOR103]
 	mul	w0, w0, w1
 	orr	w0, w0, w28
 	orr	w0, w0, 33554432
 	str	w0, [x19, 40]
 	mov	x0, x19
 	bl	sblk_mlc_dump_prog
-	b	.L2648
-.L2649:
+	b	.L2683
+.L2684:
 	ldrh	w1, [x22, x0, lsl 1]
 	mov	w5, 0
-	ldrh	w0, [x2, #:lo12:.LANCHOR107]
+	ldrh	w0, [x2, #:lo12:.LANCHOR103]
 	ldrb	w4, [x24, #:lo12:.LANCHOR123]
 	ldr	x2, [x19, 8]
 	ldr	x3, [x19, 24]
@@ -16105,15 +16421,15 @@ ftl_dump_write_open_sblk:
 	ubfx	x0, x1, 21, 3
 	and	w1, w1, -14680065
 	bl	flash_prog_page_en
-	b	.L2648
-.L2651:
+	b	.L2683
+.L2686:
 	mov	x0, x19
 	bl	buf_free
-	adrp	x0, .LC158
+	adrp	x0, .LC165
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC158
+	add	x0, x0, :lo12:.LC165
 	bl	printf
-.L2631:
+.L2666:
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
 	ldp	x23, x24, [sp, 96]
@@ -16137,41 +16453,41 @@ flash_info_flush:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2662
+	tbz	x0, 12, .L2697
 	adrp	x2, .LANCHOR193
-	adrp	x0, .LC86
+	adrp	x0, .LC90
 	add	x2, x2, :lo12:.LANCHOR193
 	mov	w1, 324
-	add	x0, x0, :lo12:.LC86
+	add	x0, x0, :lo12:.LC90
 	bl	printf
-.L2662:
+.L2697:
 	adrp	x23, .LANCHOR194
-	adrp	x20, .LANCHOR26
+	adrp	x20, .LANCHOR27
 	mov	w2, 64
 	mov	w1, 0
 	ldr	x0, [x23, #:lo12:.LANCHOR194]
 	adrp	x21, .LANCHOR195
 	adrp	x22, .LANCHOR2
-	adrp	x24, .LC160
+	adrp	x24, .LC167
 	adrp	x25, .LANCHOR140
 	add	x22, x22, :lo12:.LANCHOR2
-	add	x24, x24, :lo12:.LC160
+	add	x24, x24, :lo12:.LC167
 	add	x25, x25, :lo12:.LANCHOR140
 	bl	ftl_memset
 	add	x27, x21, :lo12:.LANCHOR195
-	ldr	x1, [x20, #:lo12:.LANCHOR26]
+	ldr	x1, [x20, #:lo12:.LANCHOR27]
 	mov	w3, 16
 	mov	w2, 4
-	adrp	x0, .LC159
-	add	x0, x0, :lo12:.LC159
+	adrp	x0, .LC166
+	add	x0, x0, :lo12:.LC166
 	mov	w26, 0
 	bl	rknand_print_hex
-	ldr	x6, [x20, #:lo12:.LANCHOR26]
+	ldr	x6, [x20, #:lo12:.LANCHOR27]
 	add	x0, x6, 16
 	ldr	w1, [x6, 8]
 	bl	js_hash
 	str	w0, [x6, 12]
-.L2663:
+.L2698:
 	add	x28, x21, :lo12:.LANCHOR195
 	ldrb	w4, [x21, #:lo12:.LANCHOR195]
 	ldrh	w19, [x22]
@@ -16186,8 +16502,8 @@ flash_info_flush:
 	sub	w0, w0, #1
 	cmp	w1, w0
 	ldp	w3, w4, [x29, 104]
-	blt	.L2664
-	ldr	x6, [x20, #:lo12:.LANCHOR26]
+	blt	.L2699
+	ldr	x6, [x20, #:lo12:.LANCHOR27]
 	ldrb	w7, [x28, 1]
 	strh	wzr, [x28, 2]
 	ldr	w0, [x6, 4]
@@ -16205,19 +16521,19 @@ flash_info_flush:
 	ldrh	w19, [x22]
 	str	w0, [x6, 12]
 	mul	w19, w19, w7
-.L2673:
+.L2708:
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_erase_block
-	b	.L2665
-.L2668:
+	b	.L2700
+.L2703:
 	mov	w26, 1
-	b	.L2663
-.L2664:
+	b	.L2698
+.L2699:
 	madd	w19, w19, w4, w3
-	cbz	w1, .L2673
-.L2665:
-	ldr	x2, [x20, #:lo12:.LANCHOR26]
+	cbz	w1, .L2708
+.L2700:
+	ldr	x2, [x20, #:lo12:.LANCHOR27]
 	mov	w1, w19
 	ldr	x3, [x23, #:lo12:.LANCHOR194]
 	mov	w5, 1
@@ -16233,14 +16549,14 @@ flash_info_flush:
 	ldrh	w1, [x27, 2]
 	add	w1, w1, 1
 	strh	w1, [x27, 2]
-	bne	.L2666
+	bne	.L2701
 	mov	w1, w19
-	adrp	x0, .LC161
-	add	x0, x0, :lo12:.LC161
+	adrp	x0, .LC168
+	add	x0, x0, :lo12:.LC168
 	bl	printf
-	b	.L2663
-.L2666:
-	cbz	w26, .L2668
+	b	.L2698
+.L2701:
+	cbz	w26, .L2703
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -16260,21 +16576,21 @@ flash_info_blk_init:
 	add	x29, sp, 0
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR26
+	adrp	x20, .LANCHOR27
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	tbz	x0, 12, .L2675
-	ldr	x4, [x20, #:lo12:.LANCHOR26]
+	tbz	x0, 12, .L2710
+	ldr	x4, [x20, #:lo12:.LANCHOR27]
 	adrp	x2, .LANCHOR196
-	adrp	x0, .LC162
+	adrp	x0, .LC169
 	mov	w3, 2048
 	add	x2, x2, :lo12:.LANCHOR196
 	mov	w1, 50
-	add	x0, x0, :lo12:.LC162
+	add	x0, x0, :lo12:.LC169
 	bl	printf
-.L2675:
+.L2710:
 	adrp	x21, .LANCHOR194
 	adrp	x24, .LANCHOR2
 	mov	w22, 21321
@@ -16282,29 +16598,29 @@ flash_info_blk_init:
 	mov	x23, x21
 	mov	w19, 4
 	movk	w22, 0x5359, lsl 16
-.L2678:
+.L2713:
 	ldrh	w1, [x26]
 	mov	w4, 4
 	ldr	x3, [x21, #:lo12:.LANCHOR194]
 	mov	w0, 0
-	ldr	x2, [x20, #:lo12:.LANCHOR26]
+	ldr	x2, [x20, #:lo12:.LANCHOR27]
 	add	x27, x21, :lo12:.LANCHOR194
-	add	x25, x20, :lo12:.LANCHOR26
+	add	x25, x20, :lo12:.LANCHOR27
 	mul	w1, w1, w19
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L2676
-	ldr	x2, [x20, #:lo12:.LANCHOR26]
+	beq	.L2711
+	ldr	x2, [x20, #:lo12:.LANCHOR27]
 	ldr	w0, [x2]
 	cmp	w0, w22
-	beq	.L2677
-.L2676:
+	beq	.L2712
+.L2711:
 	add	w19, w19, 1
 	cmp	w19, 16
-	bne	.L2678
-.L2703:
+	bne	.L2713
+.L2738:
 	mov	w0, -1
-.L2674:
+.L2709:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -16312,43 +16628,43 @@ flash_info_blk_init:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2686:
+.L2721:
 	ldr	x0, [x25]
 	ldr	w1, [x0]
 	cmp	w1, w22
-	bne	.L2687
+	bne	.L2722
 	ldr	w21, [x0, 4]
-.L2680:
+.L2715:
 	add	x22, x19, :lo12:.LANCHOR195
 	ldrh	w0, [x24, #:lo12:.LANCHOR2]
 	ldr	x3, [x23, #:lo12:.LANCHOR194]
 	mov	w4, 4
-	ldr	x2, [x20, #:lo12:.LANCHOR26]
+	ldr	x2, [x20, #:lo12:.LANCHOR27]
 	ldrb	w1, [x22, 1]
 	mul	w1, w1, w0
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L2681
-	ldr	x0, [x20, #:lo12:.LANCHOR26]
+	beq	.L2716
+	ldr	x0, [x20, #:lo12:.LANCHOR27]
 	mov	w1, 21321
 	movk	w1, 0x5359, lsl 16
 	ldr	w2, [x0]
 	cmp	w2, w1
-	bne	.L2681
+	bne	.L2716
 	ldr	w1, [x0, 4]
 	cmp	w21, w1
-	bcs	.L2681
+	bcs	.L2716
 	ldrb	w1, [x0, 37]
 	ldrb	w0, [x0, 36]
 	strb	w1, [x19, #:lo12:.LANCHOR195]
 	strb	w0, [x22, 1]
-.L2681:
+.L2716:
 	ldrb	w1, [x19, #:lo12:.LANCHOR195]
 	add	x21, x19, :lo12:.LANCHOR195
 	ldr	x3, [x23, #:lo12:.LANCHOR194]
 	mov	w4, 4
-	ldr	x2, [x20, #:lo12:.LANCHOR26]
+	ldr	x2, [x20, #:lo12:.LANCHOR27]
 	mov	w0, 0
 	bl	flash_get_last_written_page
 	and	w25, w0, 65535
@@ -16361,42 +16677,42 @@ flash_info_blk_init:
 	movk	w24, 0x5359, lsl 16
 	mul	w22, w22, w1
 	add	w22, w22, w0, sxth
-.L2682:
+.L2717:
 	sub	w0, w25, w21
 	sxth	w19, w0
-	tbz	w19, #31, .L2685
+	tbz	w19, #31, .L2720
 	cmn	w19, #1
-	bne	.L2684
-	ldr	x0, [x20, #:lo12:.LANCHOR26]
+	bne	.L2719
+	ldr	x0, [x20, #:lo12:.LANCHOR27]
 	ldr	w1, [x0]
-	adrp	x0, .LC163
-	add	x0, x0, :lo12:.LC163
+	adrp	x0, .LC170
+	add	x0, x0, :lo12:.LC170
 	bl	printf
-	b	.L2703
-.L2685:
+	b	.L2738
+.L2720:
 	ldr	x3, [x23, #:lo12:.LANCHOR194]
 	mov	w4, 4
-	ldr	x2, [x20, #:lo12:.LANCHOR26]
+	ldr	x2, [x20, #:lo12:.LANCHOR27]
 	sub	w1, w22, w21
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L2683
-	ldr	x0, [x20, #:lo12:.LANCHOR26]
+	beq	.L2718
+	ldr	x0, [x20, #:lo12:.LANCHOR27]
 	ldr	w0, [x0]
 	cmp	w0, w24
-	beq	.L2684
-.L2683:
+	beq	.L2719
+.L2718:
 	add	w21, w21, 1
-	b	.L2682
-.L2684:
+	b	.L2717
+.L2719:
 	cmp	w21, 1
-	bls	.L2688
+	bls	.L2723
 	bl	flash_info_flush
-.L2688:
+.L2723:
 	mov	w0, 0
-	b	.L2674
-.L2677:
+	b	.L2709
+.L2712:
 	adrp	x19, .LANCHOR195
 	add	x1, x19, :lo12:.LANCHOR195
 	ldrb	w3, [x2, 37]
@@ -16410,10 +16726,10 @@ flash_info_blk_init:
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	bne	.L2686
-.L2687:
+	bne	.L2721
+.L2722:
 	mov	w21, 0
-	b	.L2680
+	b	.L2715
 	.size	flash_info_blk_init, .-flash_info_blk_init
 	.section	.text.nand_flash_init,"ax",@progbits
 	.align	2
@@ -16429,23 +16745,23 @@ nand_flash_init:
 	ldr	w0, [x20, #:lo12:.LANCHOR14]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	tbz	x0, 12, .L2705
+	tbz	x0, 12, .L2740
 	adrp	x2, .LANCHOR197
-	adrp	x0, .LC86
+	adrp	x0, .LC90
 	add	x2, x2, :lo12:.LANCHOR197
-	mov	w1, 2459
-	add	x0, x0, :lo12:.LC86
+	mov	w1, 2490
+	add	x0, x0, :lo12:.LC90
 	bl	printf
-.L2705:
+.L2740:
 	adrp	x0, .LANCHOR160
 	adrp	x23, .LANCHOR16
-	adrp	x22, .LANCHOR41
-	add	x24, x22, :lo12:.LANCHOR41
+	adrp	x22, .LANCHOR42
+	add	x24, x22, :lo12:.LANCHOR42
 	str	wzr, [x0, #:lo12:.LANCHOR160]
 	mov	x0, x19
 	bl	nandc_init
-	adrp	x19, .LANCHOR30
-	add	x0, x19, :lo12:.LANCHOR30
+	adrp	x19, .LANCHOR31
+	add	x0, x19, :lo12:.LANCHOR31
 	mov	x25, x24
 	str	x0, [x23, #:lo12:.LANCHOR16]
 	adrp	x0, .LANCHOR18
@@ -16455,27 +16771,27 @@ nand_flash_init:
 	strb	w1, [x0, #:lo12:.LANCHOR18]
 	mov	w2, 8
 	mov	w1, 0
-	adrp	x0, .LANCHOR29
-	add	x0, x0, :lo12:.LANCHOR29
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
 	bl	ftl_memset
 	mov	w2, 32
 	mov	w1, 0
 	adrp	x0, .LANCHOR141
 	add	x0, x0, :lo12:.LANCHOR141
 	bl	ftl_memset
-.L2711:
+.L2746:
 	mov	x1, x24
 	mov	w0, w21
 	bl	flash_read_id
-	cbnz	w21, .L2706
+	cbnz	w21, .L2741
 	ldrb	w0, [x25]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bls	.L2707
-.L2709:
+	bls	.L2742
+.L2744:
 	mov	w19, -2
-.L2704:
+.L2739:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -16483,35 +16799,35 @@ nand_flash_init:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2707:
+.L2742:
 	ldrb	w0, [x25, 1]
 	cmp	w0, 255
-	beq	.L2709
-.L2706:
+	beq	.L2744
+.L2741:
 	ldrb	w0, [x24]
 	cmp	w0, 181
-	bne	.L2710
+	bne	.L2745
 	strb	w26, [x24]
-.L2710:
+.L2745:
 	add	w21, w21, 1
 	add	x24, x24, 8
 	and	w21, w21, 255
 	cmp	w21, 4
-	bne	.L2711
+	bne	.L2746
 	adrp	x0, .LANCHOR198
 	add	x8, x0, :lo12:.LANCHOR198
 	add	x8, x8, 1
 	mov	x7, x0
-	add	x12, x22, :lo12:.LANCHOR41
+	add	x12, x22, :lo12:.LANCHOR42
 	mov	x10, 0
-.L2714:
+.L2749:
 	ldrb	w2, [x8, -1]
 	mov	w11, w10
 	lsl	x24, x10, 5
 	mov	x1, x12
 	mov	x0, x8
 	bl	flash_mem_cmp8
-	cbnz	w0, .L2712
+	cbnz	w0, .L2747
 	add	x0, x7, :lo12:.LANCHOR198
 	ubfiz	x11, x11, 5, 32
 	add	x24, x0, x24
@@ -16520,66 +16836,66 @@ nand_flash_init:
 	add	x4, x1, :lo12:.LANCHOR199
 	ldrb	w3, [x0, 22]
 	mov	x0, 0
-.L2713:
+.L2748:
 	lsl	x5, x0, 5
 	mov	w2, w0
 	ldrb	w5, [x5, x4]
 	cmp	w5, w3
-	beq	.L2715
+	beq	.L2750
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L2713
+	bne	.L2748
 	mov	w2, w0
-.L2715:
+.L2750:
 	ubfiz	x0, x2, 5, 32
 	add	x1, x1, :lo12:.LANCHOR199
 	add	x1, x1, x0
 	mov	w2, 32
-	adrp	x0, .LANCHOR19
-	add	x0, x0, :lo12:.LANCHOR19
+	adrp	x0, .LANCHOR20
+	add	x0, x0, :lo12:.LANCHOR20
 	bl	ftl_memcpy
-	add	x21, x19, :lo12:.LANCHOR30
+	add	x21, x19, :lo12:.LANCHOR31
 	mov	x1, x24
-	adrp	x24, .LANCHOR27
+	adrp	x24, .LANCHOR28
 	mov	w2, 32
 	mov	x0, x21
 	bl	ftl_memcpy
-	ldrb	w0, [x24, #:lo12:.LANCHOR27]
+	ldrb	w0, [x24, #:lo12:.LANCHOR28]
 	cmp	w0, 8
-	bhi	.L2716
+	bhi	.L2751
 	ldrb	w1, [x21, 20]
 	cmp	w1, 60
-	bls	.L2717
+	bls	.L2752
 	mov	w1, 60
 	strb	w1, [x21, 20]
-.L2717:
+.L2752:
 	cmp	w0, 8
-	bne	.L2716
-	ldrb	w0, [x22, #:lo12:.LANCHOR41]
+	bne	.L2751
+	ldrb	w0, [x22, #:lo12:.LANCHOR42]
 	mov	w1, 137
 	cmp	w0, 44
 	ccmp	w0, w1, 4, ne
-	bne	.L2716
-	add	x0, x19, :lo12:.LANCHOR30
+	bne	.L2751
+	add	x0, x19, :lo12:.LANCHOR31
 	ldrb	w1, [x0, 28]
 	cmp	w1, 3
-	bne	.L2716
+	bne	.L2751
 	strb	wzr, [x0, 28]
-.L2716:
+.L2751:
 	ldr	w0, [x20, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2718
+	tbz	x0, 12, .L2753
 	adrp	x2, .LANCHOR197
-	adrp	x0, .LC86
+	adrp	x0, .LC90
 	add	x2, x2, :lo12:.LANCHOR197
-	mov	w1, 2484
-	add	x0, x0, :lo12:.LC86
+	mov	w1, 2515
+	add	x0, x0, :lo12:.LC90
 	bl	printf
-.L2718:
+.L2753:
 	mov	w0, 16384
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR164
-	adrp	x22, .LANCHOR26
-	add	x21, x19, :lo12:.LANCHOR30
+	adrp	x22, .LANCHOR27
+	add	x21, x19, :lo12:.LANCHOR31
 	str	x0, [x1, #:lo12:.LANCHOR164]
 	mov	w0, 16384
 	bl	ftl_malloc
@@ -16587,7 +16903,7 @@ nand_flash_init:
 	str	x0, [x1, #:lo12:.LANCHOR156]
 	mov	w0, 2048
 	bl	ftl_malloc
-	str	x0, [x22, #:lo12:.LANCHOR26]
+	str	x0, [x22, #:lo12:.LANCHOR27]
 	mov	w0, 64
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR163
@@ -16610,102 +16926,102 @@ nand_flash_init:
 	bl	nandc_bch_sel
 	str	xzr, [x21, #:lo12:.LANCHOR162]
 	ldr	x1, [x23, #:lo12:.LANCHOR16]
-	adrp	x23, .LANCHOR42
+	adrp	x23, .LANCHOR43
 	ldrh	w0, [x1, 16]
 	ldrb	w1, [x1, 28]
 	ubfx	x2, x0, 8, 3
-	strb	w2, [x23, #:lo12:.LANCHOR42]
+	strb	w2, [x23, #:lo12:.LANCHOR43]
 	adrp	x2, .LANCHOR168
 	ubfx	x3, x0, 3, 1
 	strb	w3, [x2, #:lo12:.LANCHOR168]
-	adrp	x2, .LANCHOR38
+	adrp	x2, .LANCHOR39
 	ubfx	x3, x0, 4, 1
-	strb	w3, [x2, #:lo12:.LANCHOR38]
-	adrp	x2, .LANCHOR73
+	strb	w3, [x2, #:lo12:.LANCHOR39]
+	adrp	x2, .LANCHOR75
 	ubfx	x3, x0, 12, 1
-	strb	w3, [x2, #:lo12:.LANCHOR73]
-	adrp	x2, .LANCHOR70
+	strb	w3, [x2, #:lo12:.LANCHOR75]
+	adrp	x2, .LANCHOR72
 	ubfx	x3, x0, 13, 1
-	strb	w3, [x2, #:lo12:.LANCHOR70]
+	strb	w3, [x2, #:lo12:.LANCHOR72]
 	adrp	x2, .LANCHOR1
 	ubfx	x3, x0, 14, 1
 	lsr	w0, w0, 15
 	strb	w3, [x2, #:lo12:.LANCHOR1]
-	adrp	x2, .LANCHOR71
-	strb	w0, [x2, #:lo12:.LANCHOR71]
+	adrp	x2, .LANCHOR73
+	strb	w0, [x2, #:lo12:.LANCHOR73]
 	adrp	x0, .LANCHOR0
 	mov	w2, 60
 	strb	w1, [x0, #:lo12:.LANCHOR0]
 	adrp	x0, .LANCHOR17
 	strb	w2, [x0, #:lo12:.LANCHOR17]
-	ldrb	w2, [x24, #:lo12:.LANCHOR27]
+	ldrb	w2, [x24, #:lo12:.LANCHOR28]
 	cmp	w2, 9
-	bne	.L2719
+	bne	.L2754
 	mov	w2, 70
 	strb	w2, [x0, #:lo12:.LANCHOR17]
-.L2719:
-	adrp	x0, .LANCHOR49
-	strb	w1, [x0, #:lo12:.LANCHOR49]
-	add	x1, x19, :lo12:.LANCHOR30
+.L2754:
+	adrp	x0, .LANCHOR19
+	strb	w1, [x0, #:lo12:.LANCHOR19]
+	add	x1, x19, :lo12:.LANCHOR31
 	ldrb	w1, [x1, 7]
 	cmp	w1, 9
-	bne	.L2720
-	strb	wzr, [x0, #:lo12:.LANCHOR49]
-.L2720:
-	add	x19, x19, :lo12:.LANCHOR30
-	adrp	x25, .LANCHOR23
+	bne	.L2755
+	strb	wzr, [x0, #:lo12:.LANCHOR19]
+.L2755:
+	add	x19, x19, :lo12:.LANCHOR31
+	adrp	x25, .LANCHOR24
 	ldrh	w1, [x19, 16]
 	ldrb	w0, [x19, 19]
-	strb	w0, [x25, #:lo12:.LANCHOR23]
-	tbz	x1, 6, .L2722
+	strb	w0, [x25, #:lo12:.LANCHOR24]
+	tbz	x1, 6, .L2757
 	sub	w1, w0, #17
 	and	w1, w1, 255
 	cmp	w1, 2
 	ccmp	w0, 21, 4, hi
-	bne	.L2723
+	bne	.L2758
 	adrp	x1, micron_read_retrial
 	add	x1, x1, :lo12:micron_read_retrial
 	str	x1, [x21, #:lo12:.LANCHOR162]
 	cmp	w0, 21
 	adrp	x0, .LANCHOR159
-	beq	.L2724
+	beq	.L2759
 	mov	w1, 15
-.L2771:
+.L2806:
 	strb	w1, [x0, #:lo12:.LANCHOR159]
-	b	.L2722
-.L2712:
+	b	.L2757
+.L2747:
 	add	x10, x10, 1
 	add	x8, x8, 32
 	cmp	x10, 38
-	bne	.L2714
-	b	.L2709
-.L2724:
+	bne	.L2749
+	b	.L2744
+.L2759:
 	mov	w1, 4
-	b	.L2771
-.L2723:
+	b	.L2806
+.L2758:
 	sub	w1, w0, #65
 	cmp	w0, 33
 	and	w1, w1, 255
 	ccmp	w1, 1, 0, ne
-	bhi	.L2726
+	bhi	.L2761
 	adrp	x0, toshiba_read_retrial
 	add	x0, x0, :lo12:toshiba_read_retrial
 	str	x0, [x21, #:lo12:.LANCHOR162]
-	adrp	x0, .LANCHOR25
+	adrp	x0, .LANCHOR26
 	mov	w1, 4
-	strb	w1, [x0, #:lo12:.LANCHOR25]
-.L2773:
+	strb	w1, [x0, #:lo12:.LANCHOR26]
+.L2808:
 	mov	w1, 7
 	adrp	x0, .LANCHOR159
-	b	.L2771
-.L2726:
+	b	.L2806
+.L2761:
 	sub	w2, w0, #34
 	sub	w1, w0, #67
 	and	w2, w2, 255
 	and	w1, w1, 255
 	cmp	w2, 1
 	ccmp	w1, 1, 0, hi
-	bhi	.L2727
+	bhi	.L2762
 	adrp	x2, toshiba_read_retrial
 	add	x2, x2, :lo12:toshiba_read_retrial
 	str	x2, [x21, #:lo12:.LANCHOR162]
@@ -16713,89 +17029,89 @@ nand_flash_init:
 	mov	w2, 68
 	ccmp	w0, w2, 4, ne
 	adrp	x0, .LANCHOR159
-	beq	.L2728
+	beq	.L2763
 	mov	w2, 7
-.L2770:
+.L2805:
 	strb	w2, [x0, #:lo12:.LANCHOR159]
 	cmp	w1, 1
-	adrp	x0, .LANCHOR25
-	bhi	.L2730
+	adrp	x0, .LANCHOR26
+	bhi	.L2765
 	mov	w1, 4
-.L2772:
-	strb	w1, [x0, #:lo12:.LANCHOR25]
-.L2722:
+.L2807:
+	strb	w1, [x0, #:lo12:.LANCHOR26]
+.L2757:
 	ldr	w0, [x20, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2731
+	tbz	x0, 12, .L2766
 	adrp	x2, .LANCHOR197
-	adrp	x0, .LC86
+	adrp	x0, .LC90
 	add	x2, x2, :lo12:.LANCHOR197
-	mov	w1, 2537
-	add	x0, x0, :lo12:.LC86
-	bl	printf
-.L2731:
-	adrp	x24, .LANCHOR20
-	ldrb	w0, [x23, #:lo12:.LANCHOR42]
-	strb	wzr, [x24, #:lo12:.LANCHOR20]
-	tbz	x0, 0, .L2732
+	mov	w1, 2573
+	add	x0, x0, :lo12:.LC90
+	bl	printf
+.L2766:
+	adrp	x24, .LANCHOR21
+	ldrb	w0, [x23, #:lo12:.LANCHOR43]
+	strb	wzr, [x24, #:lo12:.LANCHOR21]
+	tbz	x0, 0, .L2767
 	mov	w0, 4
 	bl	nandc_set_if_mode
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
-.L2774:
+.L2809:
 	bl	nandc_set_if_mode
 	bl	flash_info_blk_init
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L2734
+	bne	.L2769
 	ldr	w0, [x20, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2735
+	tbz	x0, 12, .L2770
 	adrp	x2, .LANCHOR197
-	adrp	x0, .LC86
+	adrp	x0, .LC90
 	add	x2, x2, :lo12:.LANCHOR197
-	mov	w1, 2568
-	add	x0, x0, :lo12:.LC86
+	mov	w1, 2605
+	add	x0, x0, :lo12:.LC90
 	bl	printf
-.L2735:
-	ldr	x0, [x22, #:lo12:.LANCHOR26]
+.L2770:
+	ldr	x0, [x22, #:lo12:.LANCHOR27]
 	mov	w1, 17
 	strb	w1, [x0, 32]
 	mov	w0, 0
 	bl	zftl_flash_exit_slc_mode
-	b	.L2704
-.L2728:
+	b	.L2739
+.L2763:
 	mov	w2, 17
-	b	.L2770
-.L2730:
+	b	.L2805
+.L2765:
 	mov	w1, 5
-	b	.L2772
-.L2727:
+	b	.L2807
+.L2762:
 	sub	w0, w0, #36
 	and	w0, w0, 255
 	cmp	w0, 1
-	bhi	.L2722
+	bhi	.L2757
 	adrp	x0, toshiba_3d_read_retrial
 	add	x0, x0, :lo12:toshiba_3d_read_retrial
 	str	x0, [x21, #:lo12:.LANCHOR162]
-	b	.L2773
-.L2732:
+	b	.L2808
+.L2767:
 	mov	w0, 4
-	b	.L2774
-.L2734:
-	ldrb	w0, [x25, #:lo12:.LANCHOR23]
+	b	.L2809
+.L2769:
+	ldrb	w0, [x25, #:lo12:.LANCHOR24]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 7
-	bhi	.L2736
+	bhi	.L2771
 	adrp	x0, hynix_read_retrial
 	add	x0, x0, :lo12:hynix_read_retrial
 	str	x0, [x21, #:lo12:.LANCHOR162]
-.L2736:
-	ldrb	w0, [x23, #:lo12:.LANCHOR42]
-	tbz	x0, 2, .L2738
-	ldr	x0, [x22, #:lo12:.LANCHOR26]
+.L2771:
+	ldrb	w0, [x23, #:lo12:.LANCHOR43]
+	tbz	x0, 2, .L2773
+	ldr	x0, [x22, #:lo12:.LANCHOR27]
 	ldrb	w0, [x0, 19]
-	cbz	w0, .L2738
+	cbz	w0, .L2773
 	adrp	x0, .LANCHOR195
 	ldrb	w1, [x0, #:lo12:.LANCHOR195]
 	adrp	x0, .LANCHOR2
@@ -16803,24 +17119,24 @@ nand_flash_init:
 	mul	w1, w1, w0
 	mov	w0, 0
 	bl	flash_ddr_para_scan
-	ldrb	w0, [x24, #:lo12:.LANCHOR20]
-	cbnz	w0, .L2738
-	ldr	x0, [x22, #:lo12:.LANCHOR26]
+	ldrb	w0, [x24, #:lo12:.LANCHOR21]
+	cbnz	w0, .L2773
+	ldr	x0, [x22, #:lo12:.LANCHOR27]
 	strb	wzr, [x0, 19]
 	bl	flash_info_flush
-.L2738:
+.L2773:
 	ldr	w0, [x20, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2740
+	tbz	x0, 12, .L2775
 	adrp	x2, .LANCHOR197
-	adrp	x0, .LC86
+	adrp	x0, .LC90
 	add	x2, x2, :lo12:.LANCHOR197
-	mov	w1, 2634
-	add	x0, x0, :lo12:.LC86
+	mov	w1, 2671
+	add	x0, x0, :lo12:.LC90
 	bl	printf
-.L2740:
+.L2775:
 	bl	nand_flash_print_info
 	mov	w19, 0
-	b	.L2704
+	b	.L2739
 	.size	nand_flash_init, .-nand_flash_init
 	.section	.text.ftl_sysblk_dump,"ax",@progbits
 	.align	2
@@ -16837,31 +17153,37 @@ ftl_sysblk_dump:
 	stp	x25, x26, [sp, 112]
 	mov	w0, 1
 	stp	x27, x28, [sp, 128]
-	adrp	x26, .LANCHOR83
+	adrp	x25, .LANCHOR85
 	stp	x21, x22, [sp, 80]
 	bl	buf_alloc
-	ldr	x24, [x0, 8]
-	adrp	x27, .LANCHOR107
-	adrp	x28, .LANCHOR123
-	mov	x25, x0
-	add	x26, x26, :lo12:.LANCHOR83
-	add	x27, x27, :lo12:.LANCHOR107
-	add	x28, x28, :lo12:.LANCHOR123
+	ldr	x28, [x0, 8]
+	adrp	x26, .LANCHOR103
+	adrp	x27, .LANCHOR123
+	mov	x24, x0
+	add	x25, x25, :lo12:.LANCHOR85
+	add	x26, x26, :lo12:.LANCHOR103
+	add	x27, x27, :lo12:.LANCHOR123
 	mov	w19, 0
-.L2776:
-	ldrh	w0, [x26]
+.L2811:
+	ldrh	w0, [x25]
 	cmp	w0, w19
-	bhi	.L2778
-	mov	x0, x25
+	bhi	.L2813
+	add	x1, x28, 704
+	mov	w3, 32
+	mov	w2, 4
+	adrp	x0, .LC171
+	add	x0, x0, :lo12:.LC171
+	bl	rknand_print_hex
+	mov	x0, x24
 	bl	buf_free
-	cbz	w20, .L2779
+	cbz	w20, .L2814
 	adrp	x1, .LANCHOR201
 	adrp	x0, .LC0
-	mov	w2, 1338
+	mov	w2, 1351
 	add	x1, x1, :lo12:.LANCHOR201
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2779:
+.L2814:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
@@ -16871,18 +17193,18 @@ ftl_sysblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 144
 	ret
-.L2778:
-	ldrh	w21, [x27]
-	ldrb	w3, [x28]
-	ldr	x1, [x25, 8]
-	ldr	x2, [x25, 24]
+.L2813:
+	ldrh	w21, [x26]
+	ldrb	w3, [x27]
+	ldr	x1, [x24, 8]
+	ldr	x2, [x24, 24]
 	madd	w21, w21, w23, w19
 	mov	w0, w21
 	bl	ftl_read_ppa_page
 	mov	w22, w0
-	ldr	x1, [x25, 24]
+	ldr	x1, [x24, 24]
 	mov	w4, w0
-	ldr	x0, [x25, 8]
+	ldr	x0, [x24, 8]
 	mov	w3, w21
 	ldr	w2, [x1, 12]
 	str	w2, [sp, 32]
@@ -16900,19 +17222,13 @@ ftl_sysblk_dump:
 	mov	w1, w23
 	ldp	w5, w6, [x0]
 	ldr	w7, [x0, 8]
-	adrp	x0, .LC155
-	add	x0, x0, :lo12:.LC155
+	adrp	x0, .LC162
+	add	x0, x0, :lo12:.LC162
 	bl	printf
-	mov	w3, 32
-	mov	w2, 4
-	add	x1, x24, 704
-	adrp	x0, .LC164
-	add	x0, x0, :lo12:.LC164
-	bl	rknand_print_hex
 	cmp	w22, 512
 	ccmn	w22, #1, 4, ne
 	csinc	w20, w20, wzr, ne
-	b	.L2776
+	b	.L2811
 	.size	ftl_sysblk_dump, .-ftl_sysblk_dump
 	.section	.text.dump_ftl_info,"ax",@progbits
 	.align	2
@@ -16923,13 +17239,13 @@ dump_ftl_info:
 	adrp	x0, .LANCHOR52
 	add	x29, sp, 0
 	ldrb	w1, [x0, #:lo12:.LANCHOR52]
-	adrp	x0, .LC165
+	adrp	x0, .LC172
 	stp	x19, x20, [sp, 16]
-	add	x0, x0, :lo12:.LC165
+	add	x0, x0, :lo12:.LC172
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR100
+	adrp	x22, .LANCHOR102
 	adrp	x19, .LANCHOR10
-	adrp	x20, .LANCHOR83
+	adrp	x20, .LANCHOR85
 	bl	printf
 	adrp	x21, .LANCHOR6
 	adrp	x0, .LANCHOR179
@@ -16937,18 +17253,18 @@ dump_ftl_info:
 	ldrh	w3, [x1, 2]
 	ldrb	w2, [x1, 1]
 	ldrb	w1, [x0, #:lo12:.LANCHOR179]
-	adrp	x0, .LC166
-	add	x0, x0, :lo12:.LC166
+	adrp	x0, .LC173
+	add	x0, x0, :lo12:.LC173
 	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR100]
+	ldr	x0, [x22, #:lo12:.LANCHOR102]
 	ldrh	w2, [x0, 140]
 	ldrh	w1, [x0, 130]
-	adrp	x0, .LC167
-	add	x0, x0, :lo12:.LC167
+	adrp	x0, .LC174
+	add	x0, x0, :lo12:.LC174
 	bl	printf
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
-	adrp	x0, .LC168
-	add	x0, x0, :lo12:.LC168
+	adrp	x0, .LC175
+	add	x0, x0, :lo12:.LC175
 	ldrh	w5, [x1, 26]
 	ldrh	w4, [x1, 22]
 	ldrb	w3, [x1, 21]
@@ -16956,8 +17272,8 @@ dump_ftl_info:
 	ldrh	w1, [x1, 16]
 	bl	printf
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
-	adrp	x0, .LC169
-	add	x0, x0, :lo12:.LC169
+	adrp	x0, .LC176
+	add	x0, x0, :lo12:.LC176
 	ldrh	w5, [x1, 58]
 	ldrh	w4, [x1, 54]
 	ldrb	w3, [x1, 53]
@@ -16965,36 +17281,36 @@ dump_ftl_info:
 	ldrh	w1, [x1, 48]
 	bl	printf
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
-	adrp	x19, .LANCHOR76
-	adrp	x0, .LC170
-	add	x0, x0, :lo12:.LC170
+	adrp	x19, .LANCHOR78
+	adrp	x0, .LC177
+	add	x0, x0, :lo12:.LC177
 	ldrh	w5, [x1, 90]
 	ldrh	w4, [x1, 86]
 	ldrb	w3, [x1, 85]
 	ldrh	w2, [x1, 82]
 	ldrh	w1, [x1, 80]
 	bl	printf
-	ldrb	w0, [x19, #:lo12:.LANCHOR76]
+	ldrb	w0, [x19, #:lo12:.LANCHOR78]
 	mov	w2, 4
-	ldrh	w3, [x20, #:lo12:.LANCHOR83]
+	ldrh	w3, [x20, #:lo12:.LANCHOR85]
 	mul	w3, w3, w0
-	adrp	x0, .LANCHOR113
-	ldr	x1, [x0, #:lo12:.LANCHOR113]
-	adrp	x0, .LC171
+	adrp	x0, .LANCHOR109
+	ldr	x1, [x0, #:lo12:.LANCHOR109]
+	adrp	x0, .LC178
 	lsl	w3, w3, 1
-	add	x0, x0, :lo12:.LC171
+	add	x0, x0, :lo12:.LC178
 	bl	rknand_print_hex
 	adrp	x0, .LANCHOR9
 	ldrh	w3, [x21, #:lo12:.LANCHOR6]
 	mov	w2, 2
 	ldr	x1, [x0, #:lo12:.LANCHOR9]
-	adrp	x0, .LC172
-	add	x0, x0, :lo12:.LC172
+	adrp	x0, .LC179
+	add	x0, x0, :lo12:.LC179
 	bl	rknand_print_hex
-	ldr	x1, [x22, #:lo12:.LANCHOR100]
+	ldr	x1, [x22, #:lo12:.LANCHOR102]
 	mov	w2, 4
-	adrp	x0, .LC164
-	add	x0, x0, :lo12:.LC164
+	adrp	x0, .LC171
+	add	x0, x0, :lo12:.LC171
 	add	x1, x1, 704
 	ldrh	w3, [x1, -6]
 	bl	rknand_print_hex
@@ -17002,28 +17318,28 @@ dump_ftl_info:
 	ldrh	w3, [x21, #:lo12:.LANCHOR6]
 	mov	w2, 4
 	ldr	x1, [x0, #:lo12:.LANCHOR7]
-	adrp	x0, .LC173
-	add	x0, x0, :lo12:.LC173
+	adrp	x0, .LC180
+	add	x0, x0, :lo12:.LC180
 	bl	rknand_print_hex
 	mov	w3, 256
 	mov	w2, 2
-	adrp	x1, .LANCHOR112
-	adrp	x0, .LC174
-	add	x1, x1, :lo12:.LANCHOR112
-	add	x0, x0, :lo12:.LC174
+	adrp	x1, .LANCHOR108
+	adrp	x0, .LC181
+	add	x1, x1, :lo12:.LANCHOR108
+	add	x0, x0, :lo12:.LC181
 	bl	rknand_print_hex
-	ldrb	w0, [x19, #:lo12:.LANCHOR76]
+	ldrb	w0, [x19, #:lo12:.LANCHOR78]
 	mov	w2, 2
-	ldrh	w3, [x20, #:lo12:.LANCHOR83]
+	ldrh	w3, [x20, #:lo12:.LANCHOR85]
 	ldp	x21, x22, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	mul	w3, w3, w0
-	adrp	x0, .LANCHOR114
+	adrp	x0, .LANCHOR110
 	ldp	x29, x30, [sp], 48
 	lsl	w3, w3, 1
-	ldr	x1, [x0, #:lo12:.LANCHOR114]
-	adrp	x0, .LC175
-	add	x0, x0, :lo12:.LC175
+	ldr	x1, [x0, #:lo12:.LANCHOR110]
+	adrp	x0, .LC182
+	add	x0, x0, :lo12:.LC182
 	b	rknand_print_hex
 	.size	dump_ftl_info, .-dump_ftl_info
 	.section	.text.pm_ppa_update_check,"ax",@progbits
@@ -17031,17 +17347,17 @@ dump_ftl_info:
 	.global	pm_ppa_update_check
 	.type	pm_ppa_update_check, %function
 pm_ppa_update_check:
-	adrp	x3, .LANCHOR102
+	adrp	x3, .LANCHOR66
 	mov	w4, 21
-	ldrh	w3, [x3, #:lo12:.LANCHOR102]
+	ldrh	w3, [x3, #:lo12:.LANCHOR66]
 	sub	w5, w4, w3
 	mov	w4, 1
 	lsr	w3, w2, w3
 	lsl	w4, w4, w5
 	sub	w4, w4, #1
 	and	w4, w4, w3
-	adrp	x3, .LANCHOR101
-	ldrb	w3, [x3, #:lo12:.LANCHOR101]
+	adrp	x3, .LANCHOR67
+	ldrb	w3, [x3, #:lo12:.LANCHOR67]
 	udiv	w4, w4, w3
 	adrp	x3, .LANCHOR7
 	ldr	x3, [x3, #:lo12:.LANCHOR7]
@@ -17050,20 +17366,20 @@ pm_ppa_update_check:
 	ubfx	x3, x3, 5, 3
 	cmp	w3, 1
 	ccmp	w3, 7, 4, ne
-	bne	.L2790
+	bne	.L2825
 	stp	x29, x30, [sp, -16]!
 	mov	w3, w2
 	mov	w2, w1
 	mov	x1, x0
 	add	x29, sp, 0
-	adrp	x0, .LC176
-	add	x0, x0, :lo12:.LC176
+	adrp	x0, .LC183
+	add	x0, x0, :lo12:.LC183
 	bl	printf
 	bl	dump_ftl_info
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
-.L2790:
+.L2825:
 	mov	w0, 0
 	ret
 	.size	pm_ppa_update_check, .-pm_ppa_update_check
@@ -17079,22 +17395,22 @@ load_l2p_region:
 	and	w19, w0, 65535
 	stp	x23, x24, [sp, 48]
 	cmp	w20, 31
-	bls	.L2796
+	bls	.L2831
 	adrp	x1, .LANCHOR202
 	adrp	x0, .LC0
 	mov	w2, 31
 	add	x1, x1, :lo12:.LANCHOR202
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2796:
-	adrp	x22, .LANCHOR100
-	ldr	x0, [x22, #:lo12:.LANCHOR100]
+.L2831:
+	adrp	x22, .LANCHOR102
+	ldr	x0, [x22, #:lo12:.LANCHOR102]
 	ldrh	w2, [x0, 698]
 	cmp	w2, w19
-	bcs	.L2797
+	bcs	.L2832
 	mov	w1, w19
-	adrp	x0, .LC177
-	add	x0, x0, :lo12:.LC177
+	adrp	x0, .LC184
+	add	x0, x0, :lo12:.LC184
 	bl	printf
 	adrp	x0, .LANCHOR203
 	mov	w1, 255
@@ -17102,19 +17418,19 @@ load_l2p_region:
 	mov	x0, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	ldr	x0, [x22, #:lo12:.LANCHOR100]
+	ldr	x0, [x22, #:lo12:.LANCHOR102]
 	ldrh	w0, [x0, 698]
 	cmp	w0, w19
-	bcs	.L2799
+	bcs	.L2834
 	mov	w2, 35
-.L2804:
+.L2839:
 	adrp	x1, .LANCHOR202
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR202
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L2799
-.L2797:
+	b	.L2834
+.L2832:
 	add	x0, x0, x19, sxtw 2
 	sbfiz	x20, x20, 4, 32
 	ldr	w21, [x0, 704]
@@ -17123,25 +17439,25 @@ load_l2p_region:
 	add	x23, x0, x20
 	strh	w19, [x0, x20]
 	strh	wzr, [x23, 2]
-	cbnz	w21, .L2800
+	cbnz	w21, .L2835
 	mov	w2, 0
 	mov	w1, w19
-	adrp	x0, .LC178
-	add	x0, x0, :lo12:.LC178
+	adrp	x0, .LC185
+	add	x0, x0, :lo12:.LC185
 	bl	printf
 	adrp	x0, .LANCHOR203
 	mov	w1, 255
 	ldrh	w2, [x0, #:lo12:.LANCHOR203]
 	ldr	x0, [x23, 8]
 	bl	ftl_memset
-.L2799:
+.L2834:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2800:
+.L2835:
 	adrp	x20, .LANCHOR191
 	adrp	x24, .LANCHOR123
 	ldr	x1, [x23, 8]
@@ -17152,40 +17468,40 @@ load_l2p_region:
 	ldr	x1, [x20, #:lo12:.LANCHOR191]
 	ldr	w2, [x1]
 	cmp	w2, w19
-	beq	.L2801
+	beq	.L2836
 	mov	w4, w21
 	mov	w3, w0
 	mov	w1, w19
-	adrp	x0, .LC179
-	add	x0, x0, :lo12:.LC179
+	adrp	x0, .LC186
+	add	x0, x0, :lo12:.LC186
 	bl	printf
-	ldr	x1, [x22, #:lo12:.LANCHOR100]
+	ldr	x1, [x22, #:lo12:.LANCHOR102]
 	mov	w2, 4
-	adrp	x0, .LC180
-	add	x0, x0, :lo12:.LC180
+	adrp	x0, .LC187
+	add	x0, x0, :lo12:.LC187
 	add	x1, x1, 704
 	ldrh	w3, [x1, -6]
 	bl	rknand_print_hex
 	ldr	x1, [x23, 8]
 	mov	w2, 4
 	ldrb	w3, [x24, #:lo12:.LANCHOR123]
-	adrp	x0, .LC181
-	add	x0, x0, :lo12:.LC181
+	adrp	x0, .LC188
+	add	x0, x0, :lo12:.LC188
 	lsl	w3, w3, 7
 	bl	rknand_print_hex
 	ldr	x1, [x20, #:lo12:.LANCHOR191]
-	adrp	x0, .LC182
+	adrp	x0, .LC189
 	mov	w3, 16
 	mov	w2, 4
-	add	x0, x0, :lo12:.LC182
+	add	x0, x0, :lo12:.LC189
 	bl	rknand_print_hex
-.L2801:
+.L2836:
 	ldr	x0, [x20, #:lo12:.LANCHOR191]
 	ldr	w0, [x0]
 	cmp	w19, w0
-	beq	.L2799
+	beq	.L2834
 	mov	w2, 59
-	b	.L2804
+	b	.L2839
 	.size	load_l2p_region, .-load_l2p_region
 	.section	.text.pm_gc,"ax",@progbits
 	.align	2
@@ -17195,29 +17511,29 @@ pm_gc:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR100
+	adrp	x20, .LANCHOR102
 	adrp	x19, .LANCHOR146
 	stp	x21, x22, [sp, 32]
-	ldr	x0, [x20, #:lo12:.LANCHOR100]
+	ldr	x0, [x20, #:lo12:.LANCHOR102]
 	stp	x23, x24, [sp, 48]
 	ldrh	w1, [x0, 688]
 	ldrh	w0, [x19, #:lo12:.LANCHOR146]
 	str	x25, [sp, 64]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L2807
+	blt	.L2842
 	bl	pm_free_sblk
-	ldr	x2, [x20, #:lo12:.LANCHOR100]
+	ldr	x2, [x20, #:lo12:.LANCHOR102]
 	ldrh	w1, [x19, #:lo12:.LANCHOR146]
 	sub	w1, w1, #1
 	ldrh	w3, [x2, 688]
 	cmp	w3, w1
-	blt	.L2807
+	blt	.L2842
 	add	x0, x2, x0, uxth 1
 	ldrh	w21, [x0, 416]
 	mov	w0, 65535
 	cmp	w21, w0
-	bne	.L2809
+	bne	.L2844
 	adrp	x1, .LANCHOR204
 	add	x1, x1, :lo12:.LANCHOR204
 	mov	w2, 131
@@ -17225,10 +17541,10 @@ pm_gc:
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	bl	pm_free_sblk
-	ldr	x1, [x20, #:lo12:.LANCHOR100]
+	ldr	x1, [x20, #:lo12:.LANCHOR102]
 	add	x0, x1, x0, uxth 1
 	ldrh	w21, [x0, 416]
-.L2809:
+.L2844:
 	bl	pm_select_ram_region
 	and	x24, x0, 65535
 	adrp	x1, .LANCHOR132
@@ -17240,28 +17556,28 @@ pm_gc:
 	ldrh	w0, [x2, x0]
 	mov	w2, 65535
 	cmp	w0, w2
-	beq	.L2810
+	beq	.L2845
 	ldr	x1, [x19, 8]
-	cbz	x1, .L2810
+	cbz	x1, .L2845
 	ldrsh	w2, [x19, 2]
-	tbz	w2, #31, .L2810
+	tbz	w2, #31, .L2845
 	bl	pm_write_page
 	ldrh	w0, [x19, 2]
 	and	w0, w0, 32767
 	strh	w0, [x19, 2]
-.L2810:
+.L2845:
 	add	x1, x23, :lo12:.LANCHOR132
-	adrp	x25, .LANCHOR102
+	adrp	x25, .LANCHOR66
 	add	x24, x1, x24, lsl 4
-	add	x25, x25, :lo12:.LANCHOR102
+	add	x25, x25, :lo12:.LANCHOR66
 	mov	w19, 0
-.L2811:
-	ldr	x1, [x20, #:lo12:.LANCHOR100]
+.L2846:
+	ldr	x1, [x20, #:lo12:.LANCHOR102]
 	ldrh	w0, [x1, 698]
 	cmp	w0, w19
-	bhi	.L2813
+	bhi	.L2848
 	bl	pm_free_sblk
-.L2807:
+.L2842:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -17269,7 +17585,7 @@ pm_gc:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2813:
+.L2848:
 	add	x1, x1, x19, sxtw 2
 	ldrh	w3, [x25]
 	mov	w0, 21
@@ -17280,11 +17596,11 @@ pm_gc:
 	sub	w0, w0, #1
 	lsr	w1, w1, w3
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR101
-	ldrb	w1, [x1, #:lo12:.LANCHOR101]
+	adrp	x1, .LANCHOR67
+	ldrb	w1, [x1, #:lo12:.LANCHOR67]
 	udiv	w0, w0, w1
 	cmp	w21, w0, uxth
-	bne	.L2812
+	bne	.L2847
 	mov	w1, w22
 	mov	w0, w19
 	bl	load_l2p_region
@@ -17293,10 +17609,10 @@ pm_gc:
 	bl	pm_write_page
 	mov	w0, -1
 	strh	w0, [x24]
-.L2812:
+.L2847:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L2811
+	b	.L2846
 	.size	pm_gc, .-pm_gc
 	.section	.text.pm_flush_id,"ax",@progbits
 	.align	2
@@ -17318,10 +17634,10 @@ pm_flush_id:
 	strh	w0, [x19, 2]
 	adrp	x19, .LANCHOR130
 	ldr	w0, [x19, #:lo12:.LANCHOR130]
-	cbz	w0, .L2819
+	cbz	w0, .L2854
 	bl	pm_gc
 	str	wzr, [x19, #:lo12:.LANCHOR130]
-.L2819:
+.L2854:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -17339,17 +17655,17 @@ pm_flush:
 	add	x19, x19, :lo12:.LANCHOR132
 	mov	w20, 0
 	add	x19, x19, 2
-.L2826:
+.L2861:
 	ldrsh	w0, [x19]
-	tbz	w0, #31, .L2825
+	tbz	w0, #31, .L2860
 	mov	w0, w20
 	bl	pm_flush_id
-.L2825:
+.L2860:
 	add	w20, w20, 1
 	add	x19, x19, 16
 	and	w20, w20, 65535
 	cmp	w20, 32
-	bne	.L2826
+	bne	.L2861
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -17418,57 +17734,57 @@ pm_init:
 	add	x19, x19, :lo12:.LANCHOR123
 	str	x0, [x1, #:lo12:.LANCHOR191]
 	mov	w25, -1
-.L2836:
+.L2871:
 	strh	w25, [x21]
 	strh	wzr, [x21, 2]
-	cbz	w24, .L2835
+	cbz	w24, .L2870
 	ldrb	w0, [x19]
 	lsl	w0, w0, 9
 	bl	ftl_malloc
 	str	x0, [x21, 8]
-.L2835:
+.L2870:
 	add	x21, x21, 16
 	cmp	x21, x23
-	bne	.L2836
+	bne	.L2871
 	add	x0, x20, :lo12:.LANCHOR132
-	adrp	x19, .LANCHOR100
+	adrp	x19, .LANCHOR102
 	ldr	x24, [x22, #:lo12:.LANCHOR191]
 	mov	w4, 4
 	ldr	x25, [x0, 8]
 	mov	x3, x24
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldr	x0, [x19, #:lo12:.LANCHOR102]
 	mov	x2, x25
 	ldrh	w1, [x0, 692]
 	ldrb	w0, [x0, 694]
 	bl	flash_get_last_written_page
 	sxth	w26, w0
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldr	x0, [x19, #:lo12:.LANCHOR102]
 	mov	w23, w26
 	ldrh	w2, [x0, 696]
 	cmp	w2, w26
-	bgt	.L2837
+	bgt	.L2872
 	ldrh	w1, [x0, 692]
 	mov	w3, w26
-	adrp	x0, .LC183
-	add	x0, x0, :lo12:.LC183
-	adrp	x27, .LANCHOR107
+	adrp	x0, .LC190
+	add	x0, x0, :lo12:.LC190
+	adrp	x27, .LANCHOR103
 	adrp	x28, .LANCHOR123
-	add	x27, x27, :lo12:.LANCHOR107
+	add	x27, x27, :lo12:.LANCHOR103
 	add	x28, x28, :lo12:.LANCHOR123
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldr	x0, [x19, #:lo12:.LANCHOR102]
 	ldrsh	w21, [x0, 696]
-.L2838:
+.L2873:
 	cmp	w21, w26
-	ble	.L2840
+	ble	.L2875
 	adrp	x0, .LANCHOR182
 	mov	w1, 1
 	add	w23, w23, 1
 	strb	w1, [x0, #:lo12:.LANCHOR182]
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldr	x0, [x19, #:lo12:.LANCHOR102]
 	strh	w23, [x0, 696]
 	bl	pm_free_sblk
-.L2837:
+.L2872:
 	add	x20, x20, :lo12:.LANCHOR132
 	mov	w0, -1
 	ldr	x1, [x20, 8]
@@ -17492,8 +17808,8 @@ pm_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2840:
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+.L2875:
+	ldr	x0, [x19, #:lo12:.LANCHOR102]
 	mov	x3, x24
 	ldrh	w1, [x27]
 	mov	x2, x25
@@ -17504,32 +17820,32 @@ pm_init:
 	mov	w1, w22
 	bl	flash_read_page_en
 	mov	w4, w0
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldr	x0, [x19, #:lo12:.LANCHOR102]
 	str	w4, [x29, 108]
 	mov	w2, w22
 	ldr	w1, [x0, 48]
 	ldrh	w3, [x0, 694]
 	add	w1, w1, 1
 	str	w1, [x0, 48]
-	adrp	x0, .LC184
-	add	x0, x0, :lo12:.LC184
+	adrp	x0, .LC191
+	add	x0, x0, :lo12:.LC191
 	ldr	w1, [x24]
 	bl	printf
 	ldr	w4, [x29, 108]
 	cmp	w4, 512
 	ccmn	w4, #1, 4, ne
-	beq	.L2839
-	ldr	x1, [x19, #:lo12:.LANCHOR100]
+	beq	.L2874
+	ldr	x1, [x19, #:lo12:.LANCHOR102]
 	ldr	w0, [x24]
 	ldrh	w2, [x1, 698]
 	cmp	w0, w2
-	bcs	.L2839
+	bcs	.L2874
 	add	x0, x1, x0, uxtw 2
 	str	w22, [x0, 704]
-.L2839:
+.L2874:
 	add	w21, w21, 1
 	sxth	w21, w21
-	b	.L2838
+	b	.L2873
 	.size	pm_init, .-pm_init
 	.section	.text.pm_log2phys,"ax",@progbits
 	.align	2
@@ -17549,15 +17865,15 @@ pm_log2phys:
 	ldr	w2, [x0, #:lo12:.LANCHOR120]
 	str	x27, [sp, 80]
 	cmp	w25, w2
-	bcc	.L2850
+	bcc	.L2885
 	mov	w1, w25
-	adrp	x0, .LC185
-	add	x0, x0, :lo12:.LC185
+	adrp	x0, .LC192
+	add	x0, x0, :lo12:.LC192
 	bl	printf
 	mov	w0, -1
-	cbnz	w24, .L2849
+	cbnz	w24, .L2884
 	str	w0, [x23]
-.L2849:
+.L2884:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -17565,7 +17881,7 @@ pm_log2phys:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2850:
+.L2885:
 	adrp	x0, .LANCHOR123
 	adrp	x21, .LANCHOR132
 	mov	x19, 0
@@ -17575,35 +17891,35 @@ pm_log2phys:
 	lsl	w22, w20, 7
 	udiv	w22, w25, w22
 	and	w26, w22, 65535
-.L2856:
+.L2891:
 	ldr	x1, [x0]
-	cbz	x1, .L2852
+	cbz	x1, .L2887
 	ldrh	w1, [x0, -8]
 	cmp	w1, w26
-	bne	.L2852
-.L2853:
+	bne	.L2887
+.L2888:
 	ubfiz	w20, w20, 7, 9
 	msub	w25, w26, w20, w25
 	and	x25, x25, 65535
-	cbnz	w24, .L2854
+	cbnz	w24, .L2889
 	add	x0, x21, :lo12:.LANCHOR132
 	add	x0, x0, x19, lsl 4
 	ldr	x0, [x0, 8]
 	ldr	w0, [x0, x25, lsl 2]
 	str	w0, [x23]
-.L2855:
+.L2890:
 	add	x21, x21, :lo12:.LANCHOR132
 	add	x19, x21, x19, lsl 4
 	ldrh	w0, [x19, 2]
 	mvn	x1, x0
 	tst	x1, 32767
-	beq	.L2859
+	beq	.L2894
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L2859:
+.L2894:
 	mov	w0, 0
-	b	.L2849
-.L2854:
+	b	.L2884
+.L2889:
 	add	x0, x21, :lo12:.LANCHOR132
 	ldr	w2, [x23]
 	add	x0, x0, x19, lsl 4
@@ -17614,13 +17930,13 @@ pm_log2phys:
 	strh	w1, [x0, 2]
 	adrp	x0, .LANCHOR133
 	strb	w22, [x0, #:lo12:.LANCHOR133]
-	b	.L2855
-.L2852:
+	b	.L2890
+.L2887:
 	add	w19, w19, 1
 	add	x0, x0, 16
 	and	x19, x19, 65535
 	cmp	w19, 32
-	bne	.L2856
+	bne	.L2891
 	bl	pm_select_ram_region
 	and	x19, x0, 65535
 	sbfiz	x1, x19, 4, 32
@@ -17630,17 +17946,17 @@ pm_log2phys:
 	ldrh	w2, [x2, x1]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L2857
+	beq	.L2892
 	ldrsh	w1, [x3, 2]
-	tbz	w1, #31, .L2857
+	tbz	w1, #31, .L2892
 	bl	pm_flush_id
-.L2857:
+.L2892:
 	adrp	x0, .LANCHOR205
 	mov	w1, w27
 	strb	w19, [x0, #:lo12:.LANCHOR205]
 	mov	w0, w26
 	bl	load_l2p_region
-	b	.L2853
+	b	.L2888
 	.size	pm_log2phys, .-pm_log2phys
 	.section	.text.gc_recovery,"ax",@progbits
 	.align	2
@@ -17648,14 +17964,14 @@ pm_log2phys:
 	.type	gc_recovery, %function
 gc_recovery:
 	sub	sp, sp, #240
-	adrp	x0, .LANCHOR74
+	adrp	x0, .LANCHOR76
 	stp	x29, x30, [sp, 32]
 	add	x29, sp, 32
 	stp	x21, x22, [sp, 64]
 	adrp	x21, .LANCHOR10
 	stp	x19, x20, [sp, 48]
 	ldr	x20, [x21, #:lo12:.LANCHOR10]
-	strb	wzr, [x0, #:lo12:.LANCHOR74]
+	strb	wzr, [x0, #:lo12:.LANCHOR76]
 	adrp	x0, .LANCHOR150
 	stp	x23, x24, [sp, 80]
 	strb	wzr, [x0, #:lo12:.LANCHOR150]
@@ -17668,7 +17984,7 @@ gc_recovery:
 	mov	w0, 65535
 	cmp	w1, w0
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
-	beq	.L2866
+	beq	.L2901
 	mov	w1, -1
 	strh	w1, [x0, 130]
 	mov	w0, 1
@@ -17676,41 +17992,41 @@ gc_recovery:
 	mov	x26, x0
 	ldrb	w0, [x20, 89]
 	add	x1, x20, 80
-	adrp	x3, .LANCHOR107
-	adrp	x2, .LANCHOR69
+	adrp	x3, .LANCHOR103
+	adrp	x2, .LANCHOR71
 	sub	w0, w0, #1
 	str	x3, [x29, 152]
 	add	x0, x1, x0, sxtw 1
-	ldrh	w1, [x3, #:lo12:.LANCHOR107]
+	ldrh	w1, [x3, #:lo12:.LANCHOR103]
 	str	x2, [x29, 168]
 	ldrh	w0, [x0, 16]
 	mul	w1, w0, w1
-	ldrb	w0, [x2, #:lo12:.LANCHOR69]
+	ldrb	w0, [x2, #:lo12:.LANCHOR71]
 	str	w1, [x29, 200]
 	cmp	w0, 3
-	bne	.L2867
-	adrp	x0, .LANCHOR83
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	bne	.L2902
+	adrp	x0, .LANCHOR85
+	ldrh	w0, [x0, #:lo12:.LANCHOR85]
 	sub	w0, w0, #1
 	add	w0, w0, w1
 	orr	w0, w0, 50331648
-.L2911:
+.L2946:
 	str	w0, [x26, 40]
-.L2868:
+.L2903:
 	mov	w1, 1
 	mov	x0, x26
 	bl	sblk_read_page
 	ldr	w0, [x26, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2869
+	beq	.L2904
 	ldr	x0, [x26, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L2870
-.L2869:
+	beq	.L2905
+.L2904:
 	mov	x0, x26
 	bl	buf_free
 	ldr	x1, [x26, 24]
@@ -17723,13 +18039,13 @@ gc_recovery:
 	str	w2, [sp]
 	ldp	w3, w4, [x0]
 	ldp	w5, w6, [x0, 8]
-	adrp	x0, .LC186
+	adrp	x0, .LC193
 	ldr	w7, [x1]
-	add	x0, x0, :lo12:.LC186
+	add	x0, x0, :lo12:.LC193
 	ldr	w1, [x26, 40]
 	ldr	w2, [x26, 52]
 	bl	printf
-.L2915:
+.L2950:
 	adrp	x0, .LANCHOR9
 	ldrh	w1, [x20, 80]
 	mov	w22, 0
@@ -17738,13 +18054,13 @@ gc_recovery:
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	ldrh	w1, [x20, 80]
 	strh	w1, [x0, 130]
-.L2871:
+.L2906:
 	ldrh	w0, [x20, 80]
 	bl	ftl_dump_write_open_sblk
 	ldrh	w1, [x20, 80]
 	mov	w2, w22
-	adrp	x0, .LC188
-	add	x0, x0, :lo12:.LC188
+	adrp	x0, .LC195
+	add	x0, x0, :lo12:.LC195
 	bl	printf
 	mov	w0, -1
 	strh	w0, [x20, 80]
@@ -17754,18 +18070,18 @@ gc_recovery:
 	mov	w1, 65535
 	ldrh	w0, [x0, 130]
 	cmp	w0, w1
-	beq	.L2898
+	beq	.L2933
 	bl	ftl_free_sblk
-.L2898:
-	adrp	x0, .LANCHOR100
-	ldr	x1, [x0, #:lo12:.LANCHOR100]
+.L2933:
+	adrp	x0, .LANCHOR102
+	ldr	x1, [x0, #:lo12:.LANCHOR102]
 	mov	w0, -1
 	strh	w0, [x1, 126]
 	ldr	x1, [x21, #:lo12:.LANCHOR10]
 	strh	w0, [x1, 130]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2865:
+.L2900:
 	ldp	x19, x20, [sp, 48]
 	ldp	x21, x22, [sp, 64]
 	ldp	x23, x24, [sp, 80]
@@ -17774,29 +18090,29 @@ gc_recovery:
 	ldp	x29, x30, [sp, 32]
 	add	sp, sp, 240
 	ret
-.L2867:
+.L2902:
 	cmp	w0, 2
-	bne	.L2868
-	adrp	x0, .LANCHOR83
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	bne	.L2903
+	adrp	x0, .LANCHOR85
+	ldrh	w0, [x0, #:lo12:.LANCHOR85]
 	add	w0, w1, w0, lsl 1
 	sub	w0, w0, #1
 	orr	w0, w0, 33554432
-	b	.L2911
-.L2870:
-	adrp	x28, .LANCHOR75
-	adrp	x22, .LANCHOR76
+	b	.L2946
+.L2905:
+	adrp	x28, .LANCHOR77
+	adrp	x22, .LANCHOR78
 	adrp	x27, .LANCHOR152
 	ldr	x1, [x26, 8]
-	ldrb	w0, [x22, #:lo12:.LANCHOR76]
+	ldrb	w0, [x22, #:lo12:.LANCHOR78]
 	adrp	x24, .LANCHOR153
-	ldrh	w2, [x28, #:lo12:.LANCHOR75]
+	ldrh	w2, [x28, #:lo12:.LANCHOR77]
 	mul	w2, w2, w0
 	ldr	x0, [x27, #:lo12:.LANCHOR152]
 	lsl	w2, w2, 2
 	bl	ftl_memcpy
-	ldrb	w1, [x22, #:lo12:.LANCHOR76]
-	ldrh	w0, [x28, #:lo12:.LANCHOR75]
+	ldrb	w1, [x22, #:lo12:.LANCHOR78]
+	ldrh	w0, [x28, #:lo12:.LANCHOR77]
 	mul	w0, w0, w1
 	ldr	x1, [x26, 8]
 	lsl	w2, w0, 2
@@ -17804,34 +18120,34 @@ gc_recovery:
 	ldr	x0, [x24, #:lo12:.LANCHOR153]
 	bl	ftl_memcpy
 	str	x28, [x29, 144]
-	adrp	x0, .LANCHOR83
-	ldrh	w14, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR85
+	ldrh	w14, [x0, #:lo12:.LANCHOR85]
 	ldr	x0, [x29, 168]
-	ldrb	w0, [x0, #:lo12:.LANCHOR69]
+	ldrb	w0, [x0, #:lo12:.LANCHOR71]
 	cmp	w0, 2
-	beq	.L2872
-.L2912:
+	beq	.L2907
+.L2947:
 	str	w0, [x29, 184]
-	adrp	x25, .LC187
+	adrp	x25, .LC194
 	ldr	x0, [x29, 152]
 	mov	w23, 0
 	mov	w22, 0
-	add	x0, x0, :lo12:.LANCHOR107
+	add	x0, x0, :lo12:.LANCHOR103
 	str	x0, [x29, 128]
-	add	x0, x25, :lo12:.LC187
+	add	x0, x25, :lo12:.LC194
 	str	x0, [x29, 120]
-.L2874:
+.L2909:
 	sub	w0, w23, #1
 	str	w0, [x29, 188]
 	cmp	w23, w14
-	beq	.L2883
+	beq	.L2918
 	mov	x19, 0
-	b	.L2884
-.L2872:
+	b	.L2919
+.L2907:
 	lsl	w14, w14, 1
 	mov	w0, 1
-	b	.L2912
-.L2880:
+	b	.L2947
+.L2915:
 	ldr	x1, [x29, 128]
 	ldr	x0, [x29, 160]
 	ldrh	w1, [x1]
@@ -17841,10 +18157,10 @@ gc_recovery:
 	str	w0, [x29, 200]
 	ldrb	w1, [x1]
 	cmp	w1, 3
-	bne	.L2875
+	bne	.L2910
 	add	w0, w23, w0
 	orr	w0, w0, w25, lsl 24
-.L2913:
+.L2948:
 	str	w0, [x26, 40]
 	mov	w1, 1
 	str	w14, [x29, 112]
@@ -17856,13 +18172,13 @@ gc_recovery:
 	ldr	x0, [x26, 24]
 	ldr	w6, [x0, 4]
 	cmp	w3, w6
-	bne	.L2878
+	bne	.L2913
 	ldr	x1, [x24, #:lo12:.LANCHOR153]
 	ldr	w2, [x1, x28]
 	ldr	w1, [x0, 8]
 	cmp	w2, w1
-	beq	.L2879
-.L2878:
+	beq	.L2914
+.L2913:
 	ldr	x1, [x24, #:lo12:.LANCHOR153]
 	ldr	w2, [x0, 12]
 	str	w2, [sp]
@@ -17878,47 +18194,47 @@ gc_recovery:
 	ldr	w14, [x29, 112]
 	ldr	w0, [x0, x28]
 	cmn	w0, #1
-	beq	.L2879
+	beq	.L2914
 	mov	x0, x26
 	bl	buf_free
-	b	.L2915
-.L2875:
+	b	.L2950
+.L2910:
 	cmp	w1, 2
-	bne	.L2877
+	bne	.L2912
 	ldr	w1, [x29, 188]
 	add	w0, w0, w1
 	add	w0, w0, w25
 	orr	w0, w0, 33554432
-	b	.L2913
-.L2877:
+	b	.L2948
+.L2912:
 	add	w0, w23, w0
-	b	.L2913
-.L2879:
+	b	.L2948
+.L2914:
 	add	w22, w22, 1
 	add	w25, w25, 1
 	add	x28, x28, 4
-.L2882:
+.L2917:
 	ldr	w0, [x29, 184]
 	cmp	w0, w25
-	bcs	.L2880
+	bcs	.L2915
 	add	x19, x19, 1
-.L2884:
+.L2919:
 	ldr	x0, [x29, 176]
 	ldrb	w0, [x0, 9]
 	cmp	w0, w19
-	ble	.L2881
+	ble	.L2916
 	add	x0, x20, x19, lsl 1
 	str	x0, [x29, 160]
 	ldr	x0, [x29, 168]
 	sbfiz	x28, x22, 2, 32
 	mov	w25, 1
-	add	x0, x0, :lo12:.LANCHOR69
+	add	x0, x0, :lo12:.LANCHOR71
 	str	x0, [x29, 136]
-	b	.L2882
-.L2881:
+	b	.L2917
+.L2916:
 	add	w23, w23, 1
-	b	.L2874
-.L2883:
+	b	.L2909
+.L2918:
 	mov	x0, x26
 	bl	buf_free
 	ldr	x3, [x29, 144]
@@ -17928,29 +18244,29 @@ gc_recovery:
 	ldrh	w2, [x20, 80]
 	mov	w28, 0
 	ldr	x1, [x25, #:lo12:.LANCHOR9]
-	ldrh	w3, [x3, #:lo12:.LANCHOR75]
+	ldrh	w3, [x3, #:lo12:.LANCHOR77]
 	ldrb	w0, [x0, 9]
 	str	x25, [x29, 144]
 	str	wzr, [x29, 188]
 	mul	w0, w0, w3
 	strh	w0, [x1, x2, lsl 1]
-	adrp	x0, .LANCHOR102
-	add	x0, x0, :lo12:.LANCHOR102
+	adrp	x0, .LANCHOR66
+	add	x0, x0, :lo12:.LANCHOR66
 	str	x0, [x29, 112]
-.L2885:
+.L2920:
 	sub	w0, w28, #1
 	str	w0, [x29, 136]
 	cmp	w23, w28
-	beq	.L2896
+	beq	.L2931
 	mov	x26, 0
-	b	.L2897
-.L2893:
+	b	.L2932
+.L2928:
 	ldr	w0, [x29, 188]
 	ldr	x1, [x27, #:lo12:.LANCHOR152]
 	sbfiz	x0, x0, 2, 32
 	ldr	w5, [x1, x0]
 	cmn	w5, #1
-	beq	.L2886
+	beq	.L2921
 	ldr	x1, [x24, #:lo12:.LANCHOR153]
 	str	w5, [x29, 108]
 	ldr	w0, [x1, x0]
@@ -17960,26 +18276,26 @@ gc_recovery:
 	str	w0, [x29, 204]
 	cmn	w0, #1
 	ldr	w5, [x29, 108]
-	bne	.L2887
+	bne	.L2922
 	mov	w0, w5
 	str	w5, [x29, 108]
 	mov	w2, 0
 	add	x1, x29, 204
 	bl	pm_log2phys
 	ldr	w5, [x29, 108]
-.L2887:
+.L2922:
 	ldr	x0, [x29, 128]
 	ldr	x1, [x29, 152]
 	ldrh	w0, [x0, 96]
-	ldrh	w1, [x1, #:lo12:.LANCHOR107]
+	ldrh	w1, [x1, #:lo12:.LANCHOR103]
 	mul	w0, w0, w1
 	ldr	x1, [x29, 168]
-	ldrb	w1, [x1, #:lo12:.LANCHOR69]
+	ldrb	w1, [x1, #:lo12:.LANCHOR71]
 	cmp	w1, 3
-	bne	.L2888
+	bne	.L2923
 	add	w0, w28, w0
 	orr	w0, w0, w25, lsl 24
-.L2914:
+.L2949:
 	str	w0, [x29, 200]
 	mov	w19, 21
 	ldr	x0, [x29, 112]
@@ -17997,14 +18313,14 @@ gc_recovery:
 	ldr	w0, [x29, 204]
 	cmp	w1, w0
 	and	x19, x19, 65535
-	bne	.L2891
+	bne	.L2926
 	add	x1, x29, 200
 	mov	w0, w5
 	bl	pm_log2phys
 	add	w22, w22, 1
 	mov	w0, w19
 	bl	ftl_vpn_decrement
-.L2892:
+.L2927:
 	ldr	w0, [x29, 188]
 	add	w0, w0, 1
 	str	w0, [x29, 188]
@@ -18013,82 +18329,82 @@ gc_recovery:
 	add	x0, x0, x19, lsl 2
 	ldrb	w0, [x0, 2]
 	tst	w0, 224
-	bne	.L2886
+	bne	.L2921
 	ldr	x0, [x29, 144]
 	lsl	x19, x19, 1
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x0, x19]
-	cbz	w1, .L2886
+	cbz	w1, .L2921
 	strh	wzr, [x0, x19]
-.L2886:
+.L2921:
 	add	w25, w25, 1
-.L2895:
+.L2930:
 	ldr	w0, [x29, 184]
 	cmp	w0, w25
-	bcs	.L2893
+	bcs	.L2928
 	add	x26, x26, 1
-.L2897:
+.L2932:
 	ldr	x0, [x29, 176]
 	ldrb	w0, [x0, 9]
 	cmp	w0, w26
-	ble	.L2894
+	ble	.L2929
 	add	x0, x20, x26, lsl 1
 	mov	w25, 1
 	str	x0, [x29, 128]
-	adrp	x0, .LANCHOR101
-	add	x0, x0, :lo12:.LANCHOR101
+	adrp	x0, .LANCHOR67
+	add	x0, x0, :lo12:.LANCHOR67
 	str	x0, [x29, 120]
-	b	.L2895
-.L2888:
+	b	.L2930
+.L2923:
 	cmp	w1, 2
-	bne	.L2890
+	bne	.L2925
 	ldr	w1, [x29, 136]
 	add	w0, w0, w1
 	add	w0, w0, w25
 	orr	w0, w0, 33554432
-	b	.L2914
-.L2890:
+	b	.L2949
+.L2925:
 	add	w0, w28, w0
-	b	.L2914
-.L2891:
+	b	.L2949
+.L2926:
 	ldr	w1, [x29, 200]
 	cmp	w0, w1
 	cinc	w22, w22, eq
-	b	.L2892
-.L2894:
+	b	.L2927
+.L2929:
 	add	w28, w28, 1
-	b	.L2885
-.L2896:
+	b	.L2920
+.L2931:
 	ldr	x0, [x29, 144]
 	ldrh	w1, [x20, 80]
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	strh	w22, [x0, x1, lsl 1]
 	ldrh	w0, [x20, 80]
 	bl	zftl_insert_data_list
-	b	.L2871
-.L2866:
+	b	.L2906
+.L2901:
 	ldrh	w0, [x0, 130]
 	cmp	w0, w1
-	beq	.L2865
-	adrp	x19, .LANCHOR100
-	ldr	x1, [x19, #:lo12:.LANCHOR100]
+	beq	.L2900
+	adrp	x19, .LANCHOR102
+	ldr	x1, [x19, #:lo12:.LANCHOR102]
 	ldrh	w1, [x1, 126]
 	cmp	w1, w0
-	bne	.L2900
+	bne	.L2935
 	bl	pm_flush
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	ldrh	w0, [x0, 130]
 	bl	ftl_free_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldr	x0, [x19, #:lo12:.LANCHOR102]
 	mov	w1, -1
 	strh	w1, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2900:
+.L2935:
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	mov	w1, -1
 	strh	w1, [x0, 130]
-	b	.L2865
+	b	.L2900
 	.size	gc_recovery, .-gc_recovery
 	.section	.text.zftl_init,"ax",@progbits
 	.align	2
@@ -18102,11 +18418,11 @@ zftl_init:
 	strb	w0, [x1, #:lo12:.LANCHOR57]
 	adrp	x1, .LANCHOR58
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR83
+	adrp	x22, .LANCHOR85
 	strb	wzr, [x1, #:lo12:.LANCHOR58]
 	adrp	x1, .LANCHOR126
 	stp	x19, x20, [sp, 16]
-	adrp	x21, .LANCHOR76
+	adrp	x21, .LANCHOR78
 	strb	w0, [x1, #:lo12:.LANCHOR126]
 	adrp	x1, .LANCHOR127
 	stp	x23, x24, [sp, 48]
@@ -18122,58 +18438,58 @@ zftl_init:
 	strb	wzr, [x0, #:lo12:.LANCHOR121]
 	adrp	x0, .LANCHOR206
 	str	w1, [x0, #:lo12:.LANCHOR206]
-	adrp	x1, .LC189
-	adrp	x0, .LC93
-	add	x1, x1, :lo12:.LC189
-	add	x0, x0, :lo12:.LC93
+	adrp	x1, .LC196
+	adrp	x0, .LC97
+	add	x1, x1, :lo12:.LC196
+	add	x0, x0, :lo12:.LC97
 	bl	printf
-	adrp	x1, .LANCHOR30
-	add	x1, x1, :lo12:.LANCHOR30
-	adrp	x0, .LANCHOR69
+	adrp	x1, .LANCHOR31
+	add	x1, x1, :lo12:.LANCHOR31
+	adrp	x0, .LANCHOR71
 	adrp	x2, .LANCHOR123
-	adrp	x3, .LANCHOR75
-	adrp	x4, .LANCHOR101
+	adrp	x3, .LANCHOR77
+	adrp	x4, .LANCHOR67
 	ldrb	w5, [x1, 12]
-	strb	w5, [x0, #:lo12:.LANCHOR69]
+	strb	w5, [x0, #:lo12:.LANCHOR71]
 	ldrb	w0, [x1, 9]
 	strb	w0, [x2, #:lo12:.LANCHOR123]
 	ldrh	w2, [x1, 10]
-	strh	w2, [x3, #:lo12:.LANCHOR75]
+	strh	w2, [x3, #:lo12:.LANCHOR77]
 	adrp	x3, .LANCHOR18
 	ldrh	w7, [x1, 14]
 	ubfiz	w10, w0, 9, 7
 	ldrb	w6, [x3, #:lo12:.LANCHOR18]
-	adrp	x3, .LANCHOR108
+	adrp	x3, .LANCHOR104
 	sdiv	w8, w2, w5
 	strh	w7, [x23, #:lo12:.LANCHOR6]
-	strb	w6, [x3, #:lo12:.LANCHOR108]
+	strb	w6, [x3, #:lo12:.LANCHOR104]
 	ldrb	w3, [x1, 13]
 	adrp	x1, .LANCHOR2
-	strb	w3, [x4, #:lo12:.LANCHOR101]
+	strb	w3, [x4, #:lo12:.LANCHOR67]
 	ldrh	w4, [x1, #:lo12:.LANCHOR2]
-	adrp	x1, .LANCHOR107
-	strh	w8, [x22, #:lo12:.LANCHOR83]
+	adrp	x1, .LANCHOR103
+	strh	w8, [x22, #:lo12:.LANCHOR85]
 	mul	w6, w6, w3
-	strh	w4, [x1, #:lo12:.LANCHOR107]
+	strh	w4, [x1, #:lo12:.LANCHOR103]
 	strh	w10, [x20, #:lo12:.LANCHOR203]
 	mov	w3, 1
 	and	w6, w6, 255
 	mov	w1, 0
-	strb	w6, [x21, #:lo12:.LANCHOR76]
-.L2917:
+	strb	w6, [x21, #:lo12:.LANCHOR78]
+.L2952:
 	cmp	w4, w3
-	bcs	.L2918
+	bcs	.L2953
 	mul	w2, w0, w2
-	adrp	x3, .LANCHOR102
+	adrp	x3, .LANCHOR66
 	sub	w1, w1, #1
 	mov	w4, 0
-	strh	w1, [x3, #:lo12:.LANCHOR102]
+	strh	w1, [x3, #:lo12:.LANCHOR66]
 	mov	w1, 1
 	mul	w3, w2, w7
 	lsr	w11, w3, 21
-.L2919:
+.L2954:
 	cmp	w11, w1
-	bcs	.L2920
+	bcs	.L2955
 	mov	w1, 57344
 	sub	w4, w4, #1
 	movk	w1, 0x1c, lsl 16
@@ -18189,7 +18505,7 @@ zftl_init:
 	lsl	w1, w1, w4
 	adrp	x4, .LANCHOR59
 	sub	w2, w2, #1
-	adrp	x25, .LANCHOR87
+	adrp	x25, .LANCHOR89
 	str	w1, [x4, #:lo12:.LANCHOR59]
 	adrp	x4, .LANCHOR207
 	str	w3, [x4, #:lo12:.LANCHOR207]
@@ -18197,7 +18513,7 @@ zftl_init:
 	str	w3, [x27, #:lo12:.LANCHOR208]
 	udiv	w0, w3, w0
 	udiv	w3, w3, w2
-	adrp	x2, .LANCHOR104
+	adrp	x2, .LANCHOR117
 	str	w0, [x28, #:lo12:.LANCHOR120]
 	add	w0, w11, w0, lsl 2
 	add	w3, w3, 8
@@ -18205,28 +18521,28 @@ zftl_init:
 	strh	w0, [x24, #:lo12:.LANCHOR187]
 	ubfiz	w0, w0, 4, 16
 	sdiv	w0, w0, w8
-	adrp	x8, .LANCHOR91
+	adrp	x8, .LANCHOR93
 	str	x8, [x29, 104]
-	strh	w3, [x8, #:lo12:.LANCHOR91]
+	strh	w3, [x8, #:lo12:.LANCHOR93]
 	strh	w0, [x26, #:lo12:.LANCHOR146]
 	add	w0, w7, w7, lsl 1
 	asr	w0, w0, 2
-	strh	w0, [x2, #:lo12:.LANCHOR104]
+	strh	w0, [x2, #:lo12:.LANCHOR117]
 	lsr	w0, w7, 4
-	strh	w0, [x25, #:lo12:.LANCHOR87]
+	strh	w0, [x25, #:lo12:.LANCHOR89]
 	cmp	w0, 79
-	bhi	.L2921
+	bhi	.L2956
 	mov	w0, 80
-	strh	w0, [x25, #:lo12:.LANCHOR87]
-.L2921:
-	adrp	x7, .LANCHOR105
+	strh	w0, [x25, #:lo12:.LANCHOR89]
+.L2956:
+	adrp	x7, .LANCHOR118
 	mov	w0, 2000
-	adrp	x3, .LANCHOR103
+	adrp	x3, .LANCHOR116
 	adrp	x6, .LANCHOR145
-	strh	w0, [x7, #:lo12:.LANCHOR105]
+	strh	w0, [x7, #:lo12:.LANCHOR118]
 	mov	w0, 50
 	adrp	x2, .LANCHOR144
-	strh	w0, [x3, #:lo12:.LANCHOR103]
+	strh	w0, [x3, #:lo12:.LANCHOR116]
 	mov	w0, 256
 	strh	w0, [x6, #:lo12:.LANCHOR145]
 	mov	w0, 48
@@ -18235,93 +18551,93 @@ zftl_init:
 	mov	w8, 32
 	cmp	w5, 2
 	strh	w8, [x0, #:lo12:.LANCHOR8]
-	beq	.L2922
-	adrp	x5, .LANCHOR73
-	ldrb	w5, [x5, #:lo12:.LANCHOR73]
-	cbz	w5, .L2923
-.L2922:
+	beq	.L2957
+	adrp	x5, .LANCHOR75
+	ldrb	w5, [x5, #:lo12:.LANCHOR75]
+	cbz	w5, .L2958
+.L2957:
 	mov	w5, 150
-	strh	w5, [x3, #:lo12:.LANCHOR103]
+	strh	w5, [x3, #:lo12:.LANCHOR116]
 	mov	w3, 64
 	strh	w3, [x2, #:lo12:.LANCHOR144]
 	mov	w2, 12
 	strh	w2, [x0, #:lo12:.LANCHOR8]
 	adrp	x2, .LANCHOR0
 	ldrb	w2, [x2, #:lo12:.LANCHOR0]
-	cbnz	w2, .L2923
+	cbnz	w2, .L2958
 	mov	w2, 4
 	strh	w2, [x0, #:lo12:.LANCHOR8]
 	mov	w0, 600
-	strh	w0, [x7, #:lo12:.LANCHOR105]
+	strh	w0, [x7, #:lo12:.LANCHOR118]
 	mov	w0, 128
 	strh	w0, [x6, #:lo12:.LANCHOR145]
-.L2923:
+.L2958:
 	adrp	x19, .LANCHOR14
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2925
+	tbz	x0, 12, .L2960
 	str	x4, [x29, 96]
-	adrp	x0, .LC190
-	add	x0, x0, :lo12:.LC190
+	adrp	x0, .LC197
+	add	x0, x0, :lo12:.LC197
 	bl	printf
 	ldr	x4, [x29, 96]
-.L2925:
+.L2960:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2926
+	tbz	x0, 12, .L2961
 	ldr	w1, [x4, #:lo12:.LANCHOR207]
-	adrp	x0, .LC191
-	add	x0, x0, :lo12:.LC191
+	adrp	x0, .LC198
+	add	x0, x0, :lo12:.LC198
 	bl	printf
-.L2926:
+.L2961:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2927
+	tbz	x0, 12, .L2962
 	ldr	w1, [x28, #:lo12:.LANCHOR120]
-	adrp	x0, .LC192
-	add	x0, x0, :lo12:.LC192
+	adrp	x0, .LC199
+	add	x0, x0, :lo12:.LC199
 	bl	printf
-.L2927:
+.L2962:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2928
+	tbz	x0, 12, .L2963
 	ldr	w1, [x27, #:lo12:.LANCHOR208]
-	adrp	x0, .LC193
-	add	x0, x0, :lo12:.LC193
+	adrp	x0, .LC200
+	add	x0, x0, :lo12:.LC200
 	bl	printf
-.L2928:
+.L2963:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2929
+	tbz	x0, 12, .L2964
 	ldrh	w1, [x24, #:lo12:.LANCHOR187]
-	adrp	x0, .LC194
-	add	x0, x0, :lo12:.LC194
+	adrp	x0, .LC201
+	add	x0, x0, :lo12:.LC201
 	bl	printf
-.L2929:
+.L2964:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2930
+	tbz	x0, 12, .L2965
 	ldrh	w1, [x20, #:lo12:.LANCHOR203]
-	adrp	x0, .LC195
-	add	x0, x0, :lo12:.LC195
+	adrp	x0, .LC202
+	add	x0, x0, :lo12:.LC202
 	bl	printf
-.L2930:
+.L2965:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2931
+	tbz	x0, 12, .L2966
 	ldrh	w1, [x26, #:lo12:.LANCHOR146]
-	adrp	x0, .LC196
-	add	x0, x0, :lo12:.LC196
+	adrp	x0, .LC203
+	add	x0, x0, :lo12:.LC203
 	bl	printf
-.L2931:
+.L2966:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2932
-	ldrh	w1, [x25, #:lo12:.LANCHOR87]
-	adrp	x0, .LC197
-	add	x0, x0, :lo12:.LC197
+	tbz	x0, 12, .L2967
+	ldrh	w1, [x25, #:lo12:.LANCHOR89]
+	adrp	x0, .LC204
+	add	x0, x0, :lo12:.LC204
 	bl	printf
-.L2932:
+.L2967:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2933
+	tbz	x0, 12, .L2968
 	ldr	x0, [x29, 104]
-	ldrh	w1, [x0, #:lo12:.LANCHOR91]
-	adrp	x0, .LC198
-	add	x0, x0, :lo12:.LC198
+	ldrh	w1, [x0, #:lo12:.LANCHOR93]
+	adrp	x0, .LC205
+	add	x0, x0, :lo12:.LC205
 	bl	printf
-.L2933:
+.L2968:
 	bl	buf_init
 	adrp	x25, .LANCHOR10
 	ldrh	w1, [x23, #:lo12:.LANCHOR6]
@@ -18330,19 +18646,19 @@ zftl_init:
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR4
 	str	x0, [x1, #:lo12:.LANCHOR4]
-	ldrb	w1, [x21, #:lo12:.LANCHOR76]
-	ldrh	w0, [x22, #:lo12:.LANCHOR83]
+	ldrb	w1, [x21, #:lo12:.LANCHOR78]
+	ldrh	w0, [x22, #:lo12:.LANCHOR85]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR114
+	adrp	x1, .LANCHOR110
 	adrp	x2, ftl_ext_info_data_buffer
 	add	x2, x2, :lo12:ftl_ext_info_data_buffer
-	str	x0, [x1, #:lo12:.LANCHOR114]
-	adrp	x0, .LANCHOR113
-	ldrh	w1, [x22, #:lo12:.LANCHOR83]
-	str	x2, [x0, #:lo12:.LANCHOR113]
-	ldrb	w0, [x21, #:lo12:.LANCHOR76]
+	str	x0, [x1, #:lo12:.LANCHOR110]
+	adrp	x0, .LANCHOR109
+	ldrh	w1, [x22, #:lo12:.LANCHOR85]
+	str	x2, [x0, #:lo12:.LANCHOR109]
+	ldrb	w0, [x21, #:lo12:.LANCHOR78]
 	mul	w1, w1, w0
 	lsl	w0, w1, 1
 	adrp	x1, .LANCHOR9
@@ -18353,13 +18669,13 @@ zftl_init:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	add	x1, x2, x1, sxtw 2
 	str	x1, [x25, #:lo12:.LANCHOR10]
-	tbz	x0, 12, .L2934
-	adrp	x0, .LC199
-	add	x0, x0, :lo12:.LC199
+	tbz	x0, 12, .L2969
+	adrp	x0, .LC206
+	add	x0, x0, :lo12:.LC206
 	bl	printf
-.L2934:
-	ldrh	w0, [x22, #:lo12:.LANCHOR83]
-	ldrb	w21, [x21, #:lo12:.LANCHOR76]
+.L2969:
+	ldrh	w0, [x22, #:lo12:.LANCHOR85]
+	ldrb	w21, [x21, #:lo12:.LANCHOR78]
 	ldrh	w1, [x23, #:lo12:.LANCHOR6]
 	ldrh	w22, [x24, #:lo12:.LANCHOR187]
 	mul	w21, w0, w21
@@ -18370,39 +18686,40 @@ zftl_init:
 	add	w22, w1, w22, lsl 2
 	add	w21, w21, 632
 	add	w22, w22, 704
-	tbz	x0, 12, .L2935
+	tbz	x0, 12, .L2970
 	ldrh	w3, [x20, #:lo12:.LANCHOR203]
-	adrp	x0, .LC200
+	adrp	x0, .LC207
 	mov	w2, w22
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC200
+	add	x0, x0, :lo12:.LC207
 	bl	printf
-.L2935:
+.L2970:
 	ldrh	w0, [x20, #:lo12:.LANCHOR203]
 	cmp	w21, w0
-	bhi	.L2936
+	bhi	.L2971
 	cmp	w22, w0
-	bls	.L2937
-.L2936:
-.L2980:
-	b	.L2980
-.L2918:
+	bls	.L2972
+.L2971:
+.L3015:
+	b	.L3015
+.L2953:
 	add	w1, w1, 1
 	lsl	w3, w3, 1
 	and	w1, w1, 65535
-	b	.L2917
-.L2920:
+	b	.L2952
+.L2955:
 	add	w4, w4, 1
 	lsl	w1, w1, 1
 	and	w4, w4, 65535
-	b	.L2919
-.L2937:
+	b	.L2954
+.L2972:
 	bl	sblk_init
 	bl	ftl_info_blk_init
 	cmn	w0, #1
-	beq	.L2916
+	beq	.L2951
 	bl	ftl_ext_info_init
-	adrp	x19, .LANCHOR100
+	adrp	x19, .LANCHOR102
+	bl	gc_init
 	mov	w0, 1
 	bl	pm_init
 	bl	lpa_rebuild_hash
@@ -18414,7 +18731,7 @@ zftl_init:
 	add	x1, x0, 16
 	add	x0, x0, 48
 	bl	ftl_open_sblk_recovery
-	ldr	x1, [x19, #:lo12:.LANCHOR100]
+	ldr	x1, [x19, #:lo12:.LANCHOR102]
 	ldr	w0, [x1, 8]
 	add	w0, w0, 16
 	str	w0, [x1, 8]
@@ -18433,18 +18750,18 @@ zftl_init:
 	bl	ftl_total_vpn_update
 	adrp	x0, .LANCHOR182
 	ldrb	w0, [x0, #:lo12:.LANCHOR182]
-	cbz	w0, .L2939
-	ldr	x1, [x19, #:lo12:.LANCHOR100]
+	cbz	w0, .L2974
+	ldr	x1, [x19, #:lo12:.LANCHOR102]
 	ldr	w0, [x1, 68]
 	add	w0, w0, 1
 	str	w0, [x1, 68]
-.L2939:
+.L2974:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
 	bl	print_ftl_debug_info
 	mov	w0, 0
-.L2916:
+.L2951:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -18462,14 +18779,14 @@ rk_ftl_init:
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	bl	nand_flash_init
-	cbnz	w0, .L2984
+	cbnz	w0, .L3019
 	bl	zftl_init
-.L2984:
+.L3019:
 	mov	w19, w0
 	bl	idb_init
 	mov	w1, w19
-	adrp	x0, .LC201
-	add	x0, x0, :lo12:.LC201
+	adrp	x0, .LC208
+	add	x0, x0, :lo12:.LC208
 	bl	printf
 	mov	w0, w19
 	ldr	x19, [sp, 16]
@@ -18483,12 +18800,12 @@ rk_ftl_init:
 gc_update_l2p_map_new:
 	stp	x29, x30, [sp, -176]!
 	adrp	x0, .LANCHOR10
-	adrp	x1, .LANCHOR75
+	adrp	x1, .LANCHOR77
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	ldr	x21, [x0, #:lo12:.LANCHOR10]
 	stp	x25, x26, [sp, 64]
-	ldrh	w26, [x1, #:lo12:.LANCHOR75]
+	ldrh	w26, [x1, #:lo12:.LANCHOR77]
 	add	x1, x21, 80
 	stp	x23, x24, [sp, 48]
 	adrp	x24, .LANCHOR14
@@ -18498,12 +18815,12 @@ gc_update_l2p_map_new:
 	ldrb	w1, [x1, 9]
 	mul	w26, w26, w1
 	ldr	w1, [x24, #:lo12:.LANCHOR14]
-	tbz	x1, 8, .L2987
+	tbz	x1, 8, .L3022
 	ldrh	w1, [x21, 80]
-	adrp	x0, .LC202
-	add	x0, x0, :lo12:.LC202
+	adrp	x0, .LC209
+	add	x0, x0, :lo12:.LC209
 	bl	printf
-.L2987:
+.L3022:
 	adrp	x23, .LANCHOR9
 	ldrh	w1, [x21, 80]
 	sub	w2, w26, #1
@@ -18514,12 +18831,12 @@ gc_update_l2p_map_new:
 	adrp	x0, .LANCHOR123
 	add	x0, x0, :lo12:.LANCHOR123
 	str	x0, [x29, 104]
-.L2988:
+.L3023:
 	mov	w28, w22
 	cmp	w26, w22
-	bhi	.L2998
+	bhi	.L3033
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2999
+	tbz	x0, 8, .L3034
 	ldr	x0, [x29, 128]
 	mov	w3, w25
 	ldr	x1, [x23, #:lo12:.LANCHOR9]
@@ -18527,22 +18844,22 @@ gc_update_l2p_map_new:
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldrh	w2, [x1, x2, lsl 1]
 	ldrh	w1, [x0, 80]
-	adrp	x0, .LC205
-	add	x0, x0, :lo12:.LC205
+	adrp	x0, .LC212
+	add	x0, x0, :lo12:.LC212
 	bl	printf
-.L2999:
+.L3034:
 	ldrh	w1, [x21, 80]
 	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, x1, lsl 1]
 	cmp	w25, w0
-	beq	.L3000
+	beq	.L3035
 	adrp	x1, .LANCHOR209
 	adrp	x0, .LC0
-	mov	w2, 569
+	mov	w2, 617
 	add	x1, x1, :lo12:.LANCHOR209
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3000:
+.L3035:
 	ldrh	w1, [x21, 80]
 	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	strh	w25, [x0, x1, lsl 1]
@@ -18555,13 +18872,13 @@ gc_update_l2p_map_new:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L2998:
+.L3033:
 	adrp	x27, .LANCHOR152
 	lsl	x19, x22, 2
 	ldr	x0, [x27, #:lo12:.LANCHOR152]
 	ldr	w2, [x0, x19]
 	cmn	w2, #1
-	beq	.L2989
+	beq	.L3024
 	adrp	x0, .LANCHOR123
 	ldrb	w20, [x0, #:lo12:.LANCHOR123]
 	lsl	w20, w20, 7
@@ -18569,42 +18886,42 @@ gc_update_l2p_map_new:
 	and	w0, w20, 65535
 	str	w0, [x29, 156]
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2990
+	tbz	x0, 8, .L3025
 	ldr	w1, [x29, 156]
-	adrp	x0, .LC203
+	adrp	x0, .LC210
 	mov	w3, w22
-	add	x0, x0, :lo12:.LC203
+	add	x0, x0, :lo12:.LC210
 	bl	printf
-.L2990:
+.L3025:
 	sub	w28, w26, w28
 	add	x28, x28, x22
 	lsl	x0, x28, 2
 	str	x0, [x29, 144]
-	adrp	x0, .LC204
-	add	x0, x0, :lo12:.LC204
+	adrp	x0, .LC211
+	add	x0, x0, :lo12:.LC211
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR102
-	add	x0, x0, :lo12:.LANCHOR102
+	adrp	x0, .LANCHOR66
+	add	x0, x0, :lo12:.LANCHOR66
 	str	x0, [x29, 112]
-.L2991:
+.L3026:
 	ldr	x0, [x29, 144]
 	cmp	x0, x19
-	bne	.L2997
-.L2989:
+	bne	.L3032
+.L3024:
 	add	x22, x22, 1
-	b	.L2988
-.L2997:
+	b	.L3023
+.L3032:
 	ldr	x0, [x27, #:lo12:.LANCHOR152]
 	ldr	w20, [x0, x19]
 	cmn	w20, #1
-	beq	.L2992
+	beq	.L3027
 	ldr	x0, [x29, 104]
 	ldr	w1, [x29, 156]
 	ldrb	w0, [x0]
 	lsl	w0, w0, 7
 	udiv	w0, w20, w0
 	cmp	w1, w0, uxth
-	bne	.L2992
+	bne	.L3027
 	adrp	x0, .LANCHOR153
 	ldr	x0, [x0, #:lo12:.LANCHOR153]
 	ldr	w28, [x0, x19]
@@ -18612,15 +18929,15 @@ gc_update_l2p_map_new:
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 172]
 	cmn	w0, #1
-	bne	.L2993
+	bne	.L3028
 	mov	w2, 0
 	add	x1, x29, 172
 	mov	w0, w20
 	bl	pm_log2phys
-.L2993:
+.L3028:
 	ldr	w3, [x29, 172]
 	cmp	w28, w3
-	bne	.L2994
+	bne	.L3029
 	adrp	x0, .LANCHOR154
 	mov	w2, 1
 	add	x1, x29, 168
@@ -18639,35 +18956,35 @@ gc_update_l2p_map_new:
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
 	and	w28, w0, w28
-	adrp	x0, .LANCHOR101
-	ldrb	w0, [x0, #:lo12:.LANCHOR101]
+	adrp	x0, .LANCHOR67
+	ldrb	w0, [x0, #:lo12:.LANCHOR67]
 	udiv	w0, w28, w0
-.L3020:
+.L3055:
 	bl	ftl_vpn_decrement
 	ldr	x0, [x27, #:lo12:.LANCHOR152]
 	mov	w1, -1
 	str	w1, [x0, x19]
-.L2992:
+.L3027:
 	add	x19, x19, 4
-	b	.L2991
-.L2994:
+	b	.L3026
+.L3029:
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2996
+	tbz	x0, 8, .L3031
 	ldr	x0, [x29, 120]
 	mov	w2, w28
 	mov	w1, w20
 	bl	printf
-.L2996:
+.L3031:
 	ldr	x0, [x29, 136]
 	ldrh	w0, [x0]
-	b	.L3020
+	b	.L3055
 	.size	gc_update_l2p_map_new, .-gc_update_l2p_map_new
 	.section	.text.gc_scan_src_blk_one_page,"ax",@progbits
 	.align	2
 	.global	gc_scan_src_blk_one_page
 	.type	gc_scan_src_blk_one_page, %function
 gc_scan_src_blk_one_page:
-	stp	x29, x30, [sp, -112]!
+	stp	x29, x30, [sp, -96]!
 	mov	w3, 0
 	mov	w4, 0
 	mov	w5, 65535
@@ -18677,135 +18994,136 @@ gc_scan_src_blk_one_page:
 	add	x1, x19, :lo12:.LANCHOR63
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	adrp	x20, .LANCHOR76
+	adrp	x20, .LANCHOR78
 	stp	x25, x26, [sp, 64]
-	str	x27, [sp, 80]
-	ldrb	w6, [x20, #:lo12:.LANCHOR76]
+	ldrb	w6, [x20, #:lo12:.LANCHOR78]
 	ldrb	w0, [x1, 4]
 	add	x2, x1, x0, sxtw 1
 	ldrh	w21, [x2, 40]
 	ldrh	w2, [x1, 2]
-.L3022:
+.L3057:
 	cmp	w21, w5
-	beq	.L3024
-	cbz	w4, .L3025
+	beq	.L3059
+	cbz	w4, .L3060
 	add	x1, x19, :lo12:.LANCHOR63
 	strh	w2, [x1, 2]
-.L3025:
-	cbz	w3, .L3026
+.L3060:
+	cbz	w3, .L3061
 	add	x1, x19, :lo12:.LANCHOR63
 	strb	w0, [x1, 4]
-.L3026:
+.L3061:
 	mov	w0, 1
-	adrp	x22, .LANCHOR107
+	adrp	x22, .LANCHOR103
 	bl	buf_alloc
-	adrp	x23, .LANCHOR69
+	adrp	x23, .LANCHOR71
 	mov	x24, x0
-	add	x22, x22, :lo12:.LANCHOR107
-	add	x23, x23, :lo12:.LANCHOR69
+	add	x22, x22, :lo12:.LANCHOR103
+	add	x23, x23, :lo12:.LANCHOR71
 	mov	w26, 1
-.L3027:
+.L3062:
 	add	x25, x19, :lo12:.LANCHOR63
 	ldrb	w1, [x25, 6]
 	cmp	w26, w1
-	ble	.L3035
+	ble	.L3070
 	mov	x0, x24
 	bl	buf_free
 	ldrb	w0, [x25, 4]
-	ldrb	w1, [x20, #:lo12:.LANCHOR76]
+	ldrb	w1, [x20, #:lo12:.LANCHOR78]
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x25, 4]
 	cmp	w1, w0
-	bne	.L3021
+	bne	.L3056
 	ldrh	w0, [x25, 2]
 	strb	wzr, [x25, 4]
 	add	w0, w0, 1
 	strh	w0, [x25, 2]
-.L3021:
+.L3056:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldr	x27, [sp, 80]
-	ldp	x29, x30, [sp], 112
+	ldp	x29, x30, [sp], 96
 	ret
-.L3024:
+.L3059:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	cmp	w0, w6
-	bne	.L3023
+	bne	.L3058
 	add	w2, w2, 1
 	mov	w0, 0
 	and	w2, w2, 65535
 	mov	w4, 1
-.L3023:
+.L3058:
 	add	x3, x1, x0, sxtw 1
 	ldrh	w21, [x3, 40]
 	mov	w3, 1
-	b	.L3022
-.L3035:
+	b	.L3057
+.L3070:
 	ldrh	w0, [x22]
 	cmp	w1, 3
 	mul	w2, w0, w21
 	ldrh	w0, [x25, 2]
-	bne	.L3028
+	bne	.L3063
 	add	w0, w0, w2
 	orr	w0, w0, w26, lsl 24
-.L3044:
+.L3079:
 	str	w0, [x24, 40]
 	mov	w1, 1
 	mov	x0, x24
-	ldr	w25, [x24, 40]
 	bl	sblk_read_page
 	ldr	w0, [x24, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L3032
+	beq	.L3067
 	ldr	x0, [x24, 24]
-	ldr	w27, [x0, 4]
-	mov	w0, w27
+	ldr	w25, [x0, 4]
+	mov	w0, w25
 	bl	lpa_hash_get_ppa
-	str	w0, [x29, 108]
+	str	w0, [x29, 92]
 	cmn	w0, #1
-	bne	.L3033
+	bne	.L3068
+	adrp	x0, .LANCHOR120
+	ldr	w0, [x0, #:lo12:.LANCHOR120]
+	cmp	w25, w0
+	bcs	.L3068
 	mov	w2, 0
-	add	x1, x29, 108
-	mov	w0, w27
+	add	x1, x29, 92
+	mov	w0, w25
 	bl	pm_log2phys
-.L3033:
-	ldr	w1, [x24, 40]
-	ldr	w0, [x29, 108]
-	cmp	w1, w0
-	bne	.L3032
+.L3068:
+	ldr	w2, [x24, 40]
+	ldr	w0, [x29, 92]
+	cmp	w2, w0
+	bne	.L3067
 	add	x1, x19, :lo12:.LANCHOR63
-	adrp	x3, .LANCHOR66
-	ldr	x3, [x3, #:lo12:.LANCHOR66]
+	adrp	x4, .LANCHOR68
+	ldr	x4, [x4, #:lo12:.LANCHOR68]
 	ldrh	w0, [x1, 24]
-	ubfiz	x2, x0, 2, 16
+	ubfiz	x3, x0, 2, 16
 	add	w0, w0, 1
-	str	w25, [x3, x2]
+	str	w2, [x4, x3]
 	strh	w0, [x1, 24]
-.L3032:
+.L3067:
 	add	x1, x19, :lo12:.LANCHOR63
 	add	w26, w26, 1
 	ldrh	w0, [x1, 26]
 	add	w0, w0, 1
 	strh	w0, [x1, 26]
-	b	.L3027
-.L3028:
+	b	.L3062
+.L3063:
 	cmp	w1, 2
-	bne	.L3030
+	bne	.L3065
 	lsl	w0, w0, 1
 	sub	w1, w0, #1
 	add	w0, w26, w2
 	add	w0, w1, w0
 	ldrb	w1, [x23]
 	orr	w0, w0, w1, lsl 24
-	b	.L3044
-.L3030:
+	b	.L3079
+.L3065:
 	add	w0, w0, w2
-	b	.L3044
+	b	.L3079
 	.size	gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page
 	.section	.text.gc_scan_src_blk,"ax",@progbits
 	.align	2
@@ -18822,42 +19140,42 @@ gc_scan_src_blk:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w1, w0
-	bne	.L3046
+	bne	.L3081
 	adrp	x1, .LANCHOR210
 	adrp	x0, .LC0
-	mov	w2, 1004
+	mov	w2, 1052
 	add	x1, x1, :lo12:.LANCHOR210
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3046:
+.L3081:
 	ldrh	w1, [x19, #:lo12:.LANCHOR63]
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L3066
+	beq	.L3101
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3048
+	tbz	x0, 8, .L3083
 	adrp	x2, .LANCHOR9
 	ubfiz	x0, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC206
-	add	x0, x0, :lo12:.LC206
+	adrp	x0, .LC213
+	add	x0, x0, :lo12:.LC213
 	bl	printf
-.L3048:
+.L3083:
 	ldrh	w0, [x19, #:lo12:.LANCHOR63]
 	add	x14, x19, :lo12:.LANCHOR63
 	add	x1, x14, 40
 	bl	ftl_get_blk_list_in_sblk
 	and	w1, w0, 255
 	strb	w1, [x14, 5]
-	cbnz	w1, .L3049
+	cbnz	w1, .L3084
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR63]
-.L3066:
+.L3101:
 	mov	w0, 0
-	b	.L3045
-.L3049:
+	b	.L3080
+.L3084:
 	adrp	x4, .LANCHOR7
 	ldrh	w3, [x19, #:lo12:.LANCHOR63]
 	mov	x22, x4
@@ -18867,67 +19185,67 @@ gc_scan_src_blk:
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 32
-	beq	.L3050
+	beq	.L3085
 	cmp	w1, 224
-	beq	.L3050
-	cbz	w1, .L3051
+	beq	.L3085
+	cbz	w1, .L3086
 	adrp	x1, .LANCHOR10
 	ldr	x1, [x1, #:lo12:.LANCHOR10]
 	ldrh	w3, [x1, 16]
 	cmp	w3, w2
-	beq	.L3050
+	beq	.L3085
 	ldrh	w3, [x1, 48]
 	cmp	w3, w2
-	beq	.L3050
+	beq	.L3085
 	ldrh	w1, [x1, 80]
 	cmp	w1, w2
-	bne	.L3080
-.L3050:
+	bne	.L3115
+.L3085:
 	add	x0, x19, :lo12:.LANCHOR63
 	mov	w1, -1
 	strh	w1, [x19, #:lo12:.LANCHOR63]
 	strh	wzr, [x0, 24]
-	b	.L3066
-.L3051:
+	b	.L3101
+.L3086:
 	adrp	x0, .LANCHOR9
 	mov	x20, x0
 	ldr	x1, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x1, x3, lsl 1]
-	cbz	w1, .L3053
+	cbz	w1, .L3088
 	adrp	x1, .LANCHOR210
 	adrp	x0, .LC0
-	mov	w2, 1024
+	mov	w2, 1072
 	add	x1, x1, :lo12:.LANCHOR210
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3053:
+.L3088:
 	ldrh	w1, [x19, #:lo12:.LANCHOR63]
 	ldr	x0, [x20, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x1, lsl 1]
-	b	.L3050
-.L3080:
+	b	.L3085
+.L3115:
 	and	w0, w0, 255
 	sub	w0, w0, #1
 	add	x0, x14, x0, sxtw 1
 	ldrh	w21, [x0, 40]
 	mov	w0, 65535
 	cmp	w21, w0
-	bne	.L3054
+	bne	.L3089
 	adrp	x1, .LANCHOR210
 	adrp	x0, .LC0
-	mov	w2, 1032
+	mov	w2, 1080
 	add	x1, x1, :lo12:.LANCHOR210
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3054:
-	adrp	x1, .LANCHOR107
+.L3089:
+	adrp	x1, .LANCHOR103
 	ldr	x3, [x22, #:lo12:.LANCHOR7]
-	adrp	x2, .LANCHOR83
-	adrp	x23, .LANCHOR75
-	ldrh	w20, [x1, #:lo12:.LANCHOR107]
+	adrp	x2, .LANCHOR85
+	adrp	x23, .LANCHOR77
+	ldrh	w20, [x1, #:lo12:.LANCHOR103]
 	mov	x24, x2
 	ldrh	w1, [x19, #:lo12:.LANCHOR63]
-	ldrh	w0, [x2, #:lo12:.LANCHOR83]
+	ldrh	w0, [x2, #:lo12:.LANCHOR85]
 	add	x1, x3, x1, lsl 2
 	sub	w0, w0, #1
 	and	w0, w0, 65535
@@ -18935,14 +19253,14 @@ gc_scan_src_blk:
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 160
-	bne	.L3067
-	adrp	x1, .LANCHOR69
-	ldrb	w21, [x1, #:lo12:.LANCHOR69]
+	bne	.L3102
+	adrp	x1, .LANCHOR71
+	ldrb	w21, [x1, #:lo12:.LANCHOR71]
 	cmp	w21, 2
 	orr	w20, w20, w21, lsl 24
-	beq	.L3056
+	beq	.L3091
 	and	w21, w21, 65535
-.L3055:
+.L3090:
 	add	x22, x19, :lo12:.LANCHOR63
 	orr	w20, w0, w20
 	mov	w0, 1
@@ -18955,69 +19273,69 @@ gc_scan_src_blk:
 	str	w20, [x0, 40]
 	mov	x25, x0
 	mov	w1, 1
-	adrp	x20, .LANCHOR66
+	adrp	x20, .LANCHOR68
 	bl	sblk_read_page
-	ldrh	w2, [x23, #:lo12:.LANCHOR75]
-	adrp	x23, .LANCHOR76
+	ldrh	w2, [x23, #:lo12:.LANCHOR77]
+	adrp	x23, .LANCHOR78
 	mov	w1, 255
-	ldrb	w0, [x23, #:lo12:.LANCHOR76]
+	ldrb	w0, [x23, #:lo12:.LANCHOR78]
 	mul	w2, w2, w0
-	ldr	x0, [x20, #:lo12:.LANCHOR66]
+	ldr	x0, [x20, #:lo12:.LANCHOR68]
 	lsl	w2, w2, 2
 	bl	ftl_memset
 	strh	wzr, [x22, 24]
 	ldr	w0, [x25, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3057
-.L3082:
+	bne	.L3092
+.L3117:
 	mov	x0, x25
 	bl	buf_free
 	mov	w0, -1
-.L3045:
+.L3080:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L3056:
-	ldrh	w0, [x23, #:lo12:.LANCHOR75]
+.L3091:
+	ldrh	w0, [x23, #:lo12:.LANCHOR77]
 	sub	w0, w0, #1
 	and	w0, w0, 65535
-	b	.L3055
-.L3067:
+	b	.L3090
+.L3102:
 	mov	w21, 1
-	b	.L3055
-.L3057:
+	b	.L3090
+.L3092:
 	ldr	x0, [x25, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L3058
-	mov	w2, 1065
+	beq	.L3093
+	mov	w2, 1113
 	adrp	x1, .LANCHOR210
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR210
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3082
-.L3058:
-	ldrb	w0, [x23, #:lo12:.LANCHOR76]
-	adrp	x22, .LANCHOR102
-	ldrh	w1, [x24, #:lo12:.LANCHOR83]
-	adrp	x23, .LANCHOR101
+	b	.L3117
+.L3093:
+	ldrb	w0, [x23, #:lo12:.LANCHOR78]
+	adrp	x22, .LANCHOR66
+	ldrh	w1, [x24, #:lo12:.LANCHOR85]
+	adrp	x23, .LANCHOR67
 	ldr	x24, [x25, 8]
-	add	x22, x22, :lo12:.LANCHOR102
-	add	x23, x23, :lo12:.LANCHOR101
+	add	x22, x22, :lo12:.LANCHOR66
+	add	x23, x23, :lo12:.LANCHOR67
 	mov	x26, 0
 	mul	w0, w0, w1
 	mul	w21, w21, w0
 	and	w21, w21, 65535
-.L3059:
+.L3094:
 	cmp	w21, w26
-	bgt	.L3064
+	bgt	.L3099
 	mov	x0, x25
 	bl	buf_free
 	adrp	x0, .LANCHOR9
@@ -19029,11 +19347,11 @@ gc_scan_src_blk:
 	ldrh	w3, [x3, 24]
 	ldrh	w2, [x4, x2]
 	cmp	w2, w3
-	beq	.L3065
-	adrp	x0, .LC207
-	add	x0, x0, :lo12:.LC207
+	beq	.L3100
+	adrp	x0, .LC214
+	add	x0, x0, :lo12:.LC214
 	bl	printf
-.L3065:
+.L3100:
 	add	x0, x19, :lo12:.LANCHOR63
 	ldrh	w2, [x19, #:lo12:.LANCHOR63]
 	ldr	x1, [x20, #:lo12:.LANCHOR9]
@@ -19041,20 +19359,20 @@ gc_scan_src_blk:
 	strh	w3, [x1, x2, lsl 1]
 	strh	wzr, [x0, 28]
 	ldrh	w0, [x0, 24]
-	b	.L3045
-.L3064:
+	b	.L3080
+.L3099:
 	ldr	w0, [x24, x26, lsl 2]
 	cmn	w0, #1
-	beq	.L3061
+	beq	.L3096
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 92]
 	cmn	w0, #1
-	bne	.L3062
+	bne	.L3097
 	ldr	w0, [x24, x26, lsl 2]
 	mov	w2, 0
 	add	x1, x29, 92
 	bl	pm_log2phys
-.L3062:
+.L3097:
 	ldrh	w1, [x22]
 	mov	w0, 21
 	ldr	w3, [x29, 92]
@@ -19069,16 +19387,16 @@ gc_scan_src_blk:
 	udiv	w0, w0, w1
 	add	x1, x19, :lo12:.LANCHOR63
 	cmp	w0, w2
-	bne	.L3061
+	bne	.L3096
 	ldrh	w0, [x1, 24]
-	ldr	x4, [x20, #:lo12:.LANCHOR66]
+	ldr	x4, [x20, #:lo12:.LANCHOR68]
 	ubfiz	x2, x0, 2, 16
 	add	w0, w0, 1
 	str	w3, [x4, x2]
 	strh	w0, [x1, 24]
-.L3061:
+.L3096:
 	add	x26, x26, 1
-	b	.L3059
+	b	.L3094
 	.size	gc_scan_src_blk, .-gc_scan_src_blk
 	.section	.text.gc_scan_static_data,"ax",@progbits
 	.align	2
@@ -19094,13 +19412,13 @@ gc_scan_static_data:
 	ldr	w1, [x0, 544]
 	str	x23, [sp, 48]
 	cmn	w1, #1
-	beq	.L3084
+	beq	.L3119
 	adrp	x21, .LANCHOR211
 	adrp	x22, .LC0
 	add	x21, x21, :lo12:.LANCHOR211
 	add	x22, x22, :lo12:.LC0
 	mov	w20, 11
-.L3092:
+.L3127:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w2, 0
 	add	x1, x29, 76
@@ -19108,7 +19426,7 @@ gc_scan_static_data:
 	bl	pm_log2phys
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L3085
+	beq	.L3120
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 76]
@@ -19118,37 +19436,37 @@ gc_scan_static_data:
 	bl	sblk_read_page
 	ldr	w0, [x23, 52]
 	cmp	w0, 256
-	bne	.L3086
-	adrp	x0, .LANCHOR102
+	bne	.L3121
+	adrp	x0, .LANCHOR66
 	ldr	w2, [x29, 76]
 	mov	w1, 1
-	ldrh	w3, [x0, #:lo12:.LANCHOR102]
+	ldrh	w3, [x0, #:lo12:.LANCHOR66]
 	mov	w0, 21
 	sub	w0, w0, w3
 	lsr	w2, w2, w3
 	lsl	w0, w1, w0
 	sub	w0, w0, #1
 	and	w0, w0, w2
-	adrp	x2, .LANCHOR101
-	ldrb	w3, [x2, #:lo12:.LANCHOR101]
+	adrp	x2, .LANCHOR67
+	ldrb	w3, [x2, #:lo12:.LANCHOR67]
 	mov	w2, 0
 	udiv	w0, w0, w3
 	bl	gc_add_sblk
-.L3086:
+.L3121:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldr	x1, [x23, 24]
 	ldr	w0, [x0, 544]
 	ldr	w1, [x1, 4]
 	cmp	w1, w0
-	beq	.L3087
-	mov	w2, 1504
+	beq	.L3122
+	mov	w2, 1552
 	mov	x1, x21
 	mov	x0, x22
 	bl	printf
-.L3087:
+.L3122:
 	mov	x0, x23
 	bl	buf_free
-.L3085:
+.L3120:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	adrp	x2, .LANCHOR120
 	ldr	w2, [x2, #:lo12:.LANCHOR120]
@@ -19156,7 +19474,7 @@ gc_scan_static_data:
 	add	w1, w1, 1
 	str	w1, [x0, 544]
 	cmp	w1, w2
-	bcc	.L3088
+	bcc	.L3123
 	mov	w1, -1
 	str	w1, [x0, 544]
 	ldr	w1, [x0, 548]
@@ -19167,42 +19485,42 @@ gc_scan_static_data:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-.L3083:
+.L3118:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L3088:
+.L3123:
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	bne	.L3083
+	bne	.L3118
 	sub	w20, w20, #1
 	ands	w20, w20, 65535
-	bne	.L3092
-	b	.L3083
-.L3084:
+	bne	.L3127
+	b	.L3118
+.L3119:
 	ldr	w1, [x0, 536]
-	adrp	x3, .LANCHOR100
+	adrp	x3, .LANCHOR102
 	ldr	w2, [x0, 12]
 	add	w1, w1, 12959744
 	add	w1, w1, 256
 	cmp	w2, w1
-	bhi	.L3094
-	ldr	x4, [x3, #:lo12:.LANCHOR100]
+	bhi	.L3129
+	ldr	x4, [x3, #:lo12:.LANCHOR102]
 	mov	w5, 5000
 	ldr	w1, [x0, 540]
 	add	w1, w1, w5
 	ldr	w4, [x4, 44]
 	cmp	w4, w1
-	bls	.L3083
-.L3094:
-	ldr	x1, [x3, #:lo12:.LANCHOR100]
+	bls	.L3118
+.L3129:
+	ldr	x1, [x3, #:lo12:.LANCHOR102]
 	ldr	w1, [x1, 44]
 	str	w1, [x0, 540]
 	str	w2, [x0, 536]
 	str	wzr, [x0, 544]
-	b	.L3083
+	b	.L3118
 	.size	gc_scan_static_data, .-gc_scan_static_data
 	.section	.text.ftl_sblk_dump,"ax",@progbits
 	.align	2
@@ -19228,49 +19546,49 @@ ftl_sblk_dump:
 	ldrb	w2, [x1, 2]
 	mov	w1, w21
 	ldrh	w4, [x0, x23]
-	adrp	x0, .LC208
+	adrp	x0, .LC215
 	ubfx	x5, x5, 11, 8
-	add	x0, x0, :lo12:.LC208
+	add	x0, x0, :lo12:.LC215
 	ubfx	x3, x2, 3, 2
 	and	w4, w4, 2047
 	ubfx	x2, x2, 5, 3
 	bl	printf
 	mov	w0, 65535
 	cmp	w21, w0
-	beq	.L3121
+	beq	.L3156
 	adrp	x0, .LANCHOR6
 	ldrh	w0, [x0, #:lo12:.LANCHOR6]
 	cmp	w0, w21
-	bls	.L3121
+	bls	.L3156
 	ldr	x0, [x24, #:lo12:.LANCHOR7]
 	add	x0, x0, x23
 	ldrb	w0, [x0, 2]
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L3122
-	adrp	x0, .LANCHOR69
-	ldrb	w25, [x0, #:lo12:.LANCHOR69]
-.L3102:
+	bne	.L3157
+	adrp	x0, .LANCHOR71
+	ldrb	w25, [x0, #:lo12:.LANCHOR71]
+.L3137:
 	add	x28, x29, 224
-	adrp	x19, .LANCHOR83
+	adrp	x19, .LANCHOR85
 	mov	w0, w21
 	mov	w27, 0
 	mov	w20, 0
 	strh	w21, [x28, -32]!
 	add	x1, x28, 16
 	bl	ftl_get_blk_list_in_sblk
-	ldrh	w2, [x19, #:lo12:.LANCHOR83]
+	ldrh	w2, [x19, #:lo12:.LANCHOR85]
 	and	w1, w0, 255
 	strb	w1, [x29, 201]
 	and	w4, w0, 255
 	strb	wzr, [x29, 197]
 	mov	w3, w25
 	strh	wzr, [x29, 194]
-	adrp	x0, .LC209
+	adrp	x0, .LC216
 	mul	w1, w1, w2
 	strh	wzr, [x29, 202]
 	strh	w1, [x29, 198]
-	add	x0, x0, :lo12:.LC209
+	add	x0, x0, :lo12:.LC216
 	ldr	x1, [x24, #:lo12:.LANCHOR7]
 	add	x1, x1, x23
 	ldrb	w2, [x1, 2]
@@ -19282,39 +19600,39 @@ ftl_sblk_dump:
 	str	x19, [x29, 136]
 	mov	x26, x0
 	stp	wzr, wzr, [x29, 164]
-	adrp	x0, .LANCHOR107
-	add	x0, x0, :lo12:.LANCHOR107
+	adrp	x0, .LANCHOR103
+	add	x0, x0, :lo12:.LANCHOR103
 	str	x0, [x29, 112]
-.L3103:
+.L3138:
 	ldr	x0, [x29, 136]
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	ldrh	w0, [x0, #:lo12:.LANCHOR85]
 	cmp	w0, w20
-	bls	.L3118
+	bls	.L3153
 	lsl	w0, w20, 1
 	str	wzr, [x29, 172]
 	sub	w0, w0, #1
 	str	w0, [x29, 160]
-	adrp	x0, .LC155
-	add	x0, x0, :lo12:.LC155
+	adrp	x0, .LC162
+	add	x0, x0, :lo12:.LC162
 	str	x0, [x29, 120]
-	b	.L3119
-.L3122:
+	b	.L3154
+.L3157:
 	mov	w25, 1
-	b	.L3102
-.L3115:
+	b	.L3137
+.L3150:
 	ldr	x0, [x29, 128]
 	ldrh	w10, [x28, x0]
 	mov	w0, 65535
 	cmp	w10, w0
-	beq	.L3104
+	beq	.L3139
 	ldr	x0, [x29, 112]
 	cmp	w25, 3
 	ldrh	w19, [x0]
 	mul	w19, w19, w10
-	bne	.L3105
+	bne	.L3140
 	add	w19, w20, w19
 	orr	w19, w19, w22, lsl 24
-.L3106:
+.L3141:
 	str	w19, [x26, 40]
 	mov	w1, 1
 	str	w10, [x29, 104]
@@ -19356,22 +19674,22 @@ ftl_sblk_dump:
 	and	w0, w0, 224
 	cmp	w0, 224
 	ccmp	w0, w1, 4, ne
-	beq	.L3104
+	beq	.L3139
 	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L3109
+	bne	.L3144
 	ldr	x0, [x26, 24]
 	mov	w2, 0
 	add	x1, x29, 188
 	ldr	w0, [x0, 4]
 	bl	pm_log2phys
-.L3109:
+.L3144:
 	ldr	w0, [x29, 188]
 	cmp	w19, w0
-	bne	.L3110
+	bne	.L3145
 	ldr	w0, [x29, 168]
 	mov	w1, w19
 	add	w0, w0, 1
@@ -19379,81 +19697,81 @@ ftl_sblk_dump:
 	ldr	x0, [x26, 24]
 	ldr	w3, [x29, 168]
 	ldr	w2, [x0, 4]
-	adrp	x0, .LC210
-	add	x0, x0, :lo12:.LC210
+	adrp	x0, .LC217
+	add	x0, x0, :lo12:.LC217
 	bl	printf
-.L3110:
+.L3145:
 	ldr	x0, [x29, 152]
-	cbz	x0, .L3112
+	cbz	x0, .L3147
 	ubfiz	x19, x27, 2, 32
 	ldr	w2, [x0, x19]
 	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	cmp	w0, w2
-	beq	.L3113
+	beq	.L3148
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3113
-	adrp	x0, .LC211
+	tbz	x0, 12, .L3148
+	adrp	x0, .LC218
 	mov	w1, w27
-	add	x0, x0, :lo12:.LC211
+	add	x0, x0, :lo12:.LC218
 	bl	printf
-.L3113:
+.L3148:
 	ldr	x1, [x26, 24]
 	ldr	x0, [x29, 152]
 	ldr	w1, [x1, 4]
 	ldr	w0, [x0, x19]
 	cmp	w1, w0
-	beq	.L3112
+	beq	.L3147
 	cmn	w0, #1
-	beq	.L3112
+	beq	.L3147
 	adrp	x1, .LANCHOR212
 	adrp	x0, .LC0
-	mov	w2, 1299
+	mov	w2, 1312
 	add	x1, x1, :lo12:.LANCHOR212
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3112:
+.L3147:
 	add	w27, w27, 1
-.L3104:
+.L3139:
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L3117:
+.L3152:
 	cmp	w25, w22
-	bcs	.L3115
+	bcs	.L3150
 	ldr	w0, [x29, 172]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	str	w0, [x29, 172]
-.L3119:
+.L3154:
 	ldrb	w0, [x29, 201]
 	ldr	w1, [x29, 172]
 	cmp	w0, w1
-	bls	.L3116
+	bls	.L3151
 	ldrsw	x0, [x29, 172]
 	mov	w22, 1
 	add	x0, x0, 8
 	lsl	x0, x0, 1
 	str	x0, [x29, 128]
-	b	.L3117
-.L3105:
+	b	.L3152
+.L3140:
 	cmp	w25, 2
-	bne	.L3107
+	bne	.L3142
 	ldr	w0, [x29, 160]
 	add	w19, w19, w0
-	adrp	x0, .LANCHOR69
+	adrp	x0, .LANCHOR71
 	add	w19, w19, w22
-	ldrb	w0, [x0, #:lo12:.LANCHOR69]
+	ldrb	w0, [x0, #:lo12:.LANCHOR71]
 	orr	w19, w19, w0, lsl 24
-	b	.L3106
-.L3107:
+	b	.L3141
+.L3142:
 	add	w19, w20, w19
-	b	.L3106
-.L3116:
+	b	.L3141
+.L3151:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L3103
-.L3118:
+	b	.L3138
+.L3153:
 	mov	x0, x26
 	bl	buf_free
 	adrp	x0, .LANCHOR9
@@ -19462,11 +19780,11 @@ ftl_sblk_dump:
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w2, [x0, x1, lsl 1]
 	mov	w1, w21
-	adrp	x0, .LC212
-	add	x0, x0, :lo12:.LC212
+	adrp	x0, .LC219
+	add	x0, x0, :lo12:.LC219
 	bl	printf
 	ldr	w0, [x29, 164]
-.L3100:
+.L3135:
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
 	ldp	x23, x24, [sp, 96]
@@ -19475,9 +19793,9 @@ ftl_sblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 272
 	ret
-.L3121:
+.L3156:
 	mov	w0, 0
-	b	.L3100
+	b	.L3135
 	.size	ftl_sblk_dump, .-ftl_sblk_dump
 	.section	.text.zftl_read,"ax",@progbits
 	.align	2
@@ -19488,57 +19806,57 @@ zftl_read:
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x19, x20, [sp, 32]
-	mov	w20, w0
+	mov	w19, w0
 	adrp	x0, .LANCHOR14
 	stp	x21, x22, [sp, 48]
 	stp	x25, x26, [sp, 80]
-	mov	w19, w1
+	mov	w20, w1
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	mov	w26, w2
+	mov	w25, w2
 	stp	x23, x24, [sp, 64]
 	mov	x22, x3
 	stp	x27, x28, [sp, 96]
-	tbz	x0, 12, .L3133
+	tbz	x0, 12, .L3168
 	mov	w3, w2
-	adrp	x0, .LC213
+	adrp	x0, .LC220
 	mov	w2, w1
-	add	x0, x0, :lo12:.LC213
-	mov	w1, w20
+	add	x0, x0, :lo12:.LC220
+	mov	w1, w19
 	bl	printf
-.L3133:
-	cbnz	w20, .L3134
+.L3168:
+	cbnz	w19, .L3169
 	adrp	x0, .LANCHOR59
-	mov	w20, 24576
+	mov	w19, 24576
 	ldr	w0, [x0, #:lo12:.LANCHOR59]
-.L3135:
-	add	w1, w19, w26
+.L3170:
+	add	w1, w20, w25
 	cmp	w0, w1
-	bcc	.L3163
-	adrp	x1, .LANCHOR100
-	add	w20, w20, w19
-	add	w3, w26, w20
-	stp	w3, wzr, [x29, 160]
-	ldr	x2, [x1, #:lo12:.LANCHOR100]
-	sub	w3, w3, #1
+	bcc	.L3199
+	adrp	x1, .LANCHOR102
+	adrp	x26, .LANCHOR123
+	add	w19, w19, w20
 	str	x1, [x29, 120]
+	ldr	x2, [x1, #:lo12:.LANCHOR102]
+	str	x26, [x29, 168]
 	ldr	w0, [x2, 24]
-	add	w0, w0, w26
+	add	w0, w0, w25
 	str	w0, [x2, 24]
-	adrp	x0, .LANCHOR123
-	str	x0, [x29, 168]
-	ldrb	w2, [x0, #:lo12:.LANCHOR123]
+	ldrb	w0, [x26, #:lo12:.LANCHOR123]
+	add	w2, w25, w19
+	stp	w2, wzr, [x29, 160]
+	sub	w2, w2, #1
+	udiv	w27, w19, w0
+	udiv	w0, w2, w0
+	mov	w20, w27
+	sub	w24, w0, w27
+	str	w0, [x29, 156]
+	add	w24, w24, 1
 	adrp	x0, .LANCHOR127
 	add	x28, x0, :lo12:.LANCHOR127
-	udiv	w27, w20, w2
-	udiv	w2, w3, w2
-	mov	w21, w27
-	sub	w25, w2, w27
-	str	w2, [x29, 156]
-	add	w25, w25, 1
-.L3137:
-	cbnz	w25, .L3161
+.L3172:
+	cbnz	w24, .L3197
 	ldr	w0, [x29, 164]
-.L3132:
+.L3167:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -19547,68 +19865,68 @@ zftl_read:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 208
 	ret
-.L3134:
-	cmp	w20, 3
-	bhi	.L3163
-	lsl	w20, w20, 13
+.L3169:
+	cmp	w19, 3
+	bhi	.L3199
+	lsl	w19, w19, 13
 	mov	w0, 8192
-	b	.L3135
-.L3161:
+	b	.L3170
+.L3197:
 	ldr	x0, [x29, 168]
-	cmp	w21, w27
+	cmp	w20, w27
 	ldrb	w1, [x0, #:lo12:.LANCHOR123]
 	ldr	w0, [x29, 156]
-	and	w19, w1, 65535
-	ccmp	w21, w0, 4, ne
-	bne	.L3164
-	cmp	w21, w27
-	bne	.L3139
-	udiv	w24, w20, w1
-	and	w0, w26, 65535
-	msub	w1, w24, w1, w20
-	and	w24, w1, 65535
-	sub	w19, w19, w24
-	and	w19, w19, 65535
-	cmp	w26, w19
-	csel	w19, w0, w19, cc
-.L3138:
-	adrp	x23, .LANCHOR50
-	add	x1, x23, :lo12:.LANCHOR50
+	and	w23, w1, 65535
+	ccmp	w20, w0, 4, ne
+	bne	.L3200
+	cmp	w20, w27
+	bne	.L3174
+	udiv	w3, w19, w1
+	and	w0, w25, 65535
+	msub	w1, w3, w1, w19
+	and	w26, w1, 65535
+	sub	w23, w23, w26
+	and	w23, w23, 65535
+	cmp	w25, w23
+	csel	w23, w0, w23, cc
+.L3173:
+	adrp	x21, .LANCHOR50
+	add	x1, x21, :lo12:.LANCHOR50
 	add	x1, x1, 2
 	mov	w0, 0
-.L3142:
+.L3177:
 	ldr	w2, [x1, 34]
-	cmp	w21, w2
-	bne	.L3140
+	cmp	w20, w2
+	bne	.L3175
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L3140
-	add	x1, x23, :lo12:.LANCHOR50
+	tbz	x2, 3, .L3175
+	add	x1, x21, :lo12:.LANCHOR50
 	ubfiz	x0, x0, 6, 32
 	add	x0, x1, x0
-	lsl	w2, w19, 9
-	ubfiz	x19, x19, 9, 16
-	ubfiz	x24, x24, 9, 16
+	lsl	w2, w23, 9
+	ubfiz	x23, x23, 9, 16
+	ubfiz	x26, x26, 9, 16
 	ldr	x1, [x0, 8]
 	mov	x0, x22
-	add	x22, x22, x19
-	add	x1, x1, x24
+	add	x22, x22, x23
+	add	x1, x1, x26
 	bl	ftl_memcpy
-.L3141:
-	add	w21, w21, 1
-	sub	w25, w25, #1
-.L3148:
+.L3176:
+	add	w20, w20, 1
+	sub	w24, w24, #1
+.L3183:
 	adrp	x0, .LANCHOR52
 	ldrb	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, 2
-	bls	.L3149
-	cbnz	w25, .L3137
-.L3149:
+	bls	.L3184
+	cbnz	w24, .L3172
+.L3184:
 	adrp	x0, .LANCHOR127
 	ldrb	w1, [x0, #:lo12:.LANCHOR127]
-	cbz	w1, .L3137
-	adrp	x24, .LANCHOR126
-	add	x0, x23, :lo12:.LANCHOR50
-	ldrb	w2, [x24, #:lo12:.LANCHOR126]
+	cbz	w1, .L3172
+	adrp	x23, .LANCHOR126
+	add	x0, x21, :lo12:.LANCHOR50
+	ldrb	w2, [x23, #:lo12:.LANCHOR126]
 	add	x0, x0, x2, lsl 6
 	bl	sblk_read_page
 	adrp	x0, .LANCHOR213
@@ -19617,176 +19935,180 @@ zftl_read:
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	str	x0, [x29, 128]
-.L3151:
+.L3186:
 	ldrb	w0, [x28]
-	cbnz	w0, .L3160
+	cbnz	w0, .L3196
 	mov	w0, -1
 	strb	wzr, [x28]
-	strb	w0, [x24, #:lo12:.LANCHOR126]
-	b	.L3137
-.L3139:
+	strb	w0, [x23, #:lo12:.LANCHOR126]
+	b	.L3172
+.L3174:
 	ldr	w0, [x29, 160]
-	msub	w19, w1, w21, w0
-	and	w19, w19, 255
-.L3164:
-	mov	w24, 0
-	b	.L3138
-.L3140:
+	msub	w23, w1, w20, w0
+	and	w23, w23, 255
+.L3200:
+	mov	w26, 0
+	b	.L3173
+.L3175:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 32
-	bne	.L3142
-	mov	w0, w21
+	bne	.L3177
+	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L3143
+	bne	.L3178
 	mov	w2, 0
 	add	x1, x29, 188
-	mov	w0, w21
+	mov	w0, w20
 	bl	pm_log2phys
-.L3143:
+.L3178:
 	ldr	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L3144
+	bne	.L3179
 	ldr	x0, [x29, 168]
-	mov	w19, 0
-	add	x24, x0, :lo12:.LANCHOR123
-.L3145:
-	ldrb	w0, [x24]
+	mov	w23, 0
+	add	x26, x0, :lo12:.LANCHOR123
+.L3180:
+	ldrb	w0, [x26]
+	cmp	w23, w0
+	bcs	.L3176
+	madd	w0, w20, w0, w23
 	cmp	w19, w0
-	bcs	.L3141
-	madd	w0, w21, w0, w19
-	cmp	w20, w0
-	bhi	.L3146
+	bhi	.L3181
 	ldr	w1, [x29, 160]
 	cmp	w1, w0
-	bls	.L3146
+	bls	.L3181
 	mov	x0, x22
 	add	x22, x22, 512
 	mov	w2, 512
 	mov	w1, 0
 	bl	ftl_memset
-.L3146:
-	add	w19, w19, 1
-	b	.L3145
-.L3144:
+.L3181:
+	add	w23, w23, 1
+	b	.L3180
+.L3179:
 	mov	w0, 0
 	bl	buf_alloc
-	cbz	x0, .L3148
+	cbz	x0, .L3183
 	ldr	x2, [x29, 120]
-	ldr	x3, [x2, #:lo12:.LANCHOR100]
-	ldr	w2, [x3, 40]
+	ldr	x4, [x2, #:lo12:.LANCHOR102]
+	ldr	w2, [x4, 40]
 	add	w2, w2, 1
-	str	w2, [x3, 40]
+	str	w2, [x4, 40]
 	ldr	w2, [x29, 188]
-	strb	w19, [x0, 56]
-	ubfiz	x19, x19, 9, 16
+	strb	w23, [x0, 56]
+	ubfiz	x23, x23, 9, 16
 	str	x22, [x0, 16]
-	add	x22, x22, x19
-	strb	w24, [x0, 57]
-	stp	w21, w2, [x0, 36]
+	add	x22, x22, x23
+	strb	w26, [x0, 57]
+	stp	w20, w2, [x0, 36]
 	str	w2, [x0, 44]
 	bl	zftl_add_read_buf
-	b	.L3141
-.L3160:
-	ldrb	w0, [x24, #:lo12:.LANCHOR126]
+	b	.L3176
+.L3196:
+	ldrb	w0, [x23, #:lo12:.LANCHOR126]
 	cmp	w0, 255
-	bne	.L3152
+	bne	.L3187
 	ldp	x0, x1, [x29, 128]
-	mov	w2, 1070
+	mov	w2, 1080
 	bl	printf
-.L3152:
-	ldrb	w19, [x24, #:lo12:.LANCHOR126]
-	add	x0, x23, :lo12:.LANCHOR50
-	ubfiz	x1, x19, 6, 8
-	lsl	x2, x19, 6
-	add	x1, x0, x1
-	str	x1, [x29, 144]
-	add	x1, x0, x2
-	ldrb	w0, [x0, x2]
-	strb	w0, [x24, #:lo12:.LANCHOR126]
-	ldr	w8, [x1, 52]
-	cmn	w8, #1
-	bne	.L3153
+.L3187:
+	ldrb	w26, [x23, #:lo12:.LANCHOR126]
+	add	x1, x21, :lo12:.LANCHOR50
+	ubfiz	x2, x26, 6, 8
+	lsl	x0, x26, 6
+	add	x2, x1, x2
+	str	x2, [x29, 144]
+	add	x2, x1, x0
+	ldrb	w0, [x1, x0]
+	strb	w0, [x23, #:lo12:.LANCHOR126]
+	ldr	w10, [x2, 52]
+	cmn	w10, #1
+	bne	.L3188
 	adrp	x0, .LANCHOR10
-	str	w8, [x29, 164]
+	str	w10, [x29, 164]
 	ldr	x1, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x1, 552]
 	add	w0, w0, 1
 	str	w0, [x1, 552]
-.L3154:
-	add	x10, x23, :lo12:.LANCHOR50
-	add	x10, x10, x19, lsl 6
-	ldr	x0, [x10, 24]
-	ldr	w3, [x10, 36]
+.L3189:
+	add	x1, x21, :lo12:.LANCHOR50
+	add	x1, x1, x26, lsl 6
+	ldr	x0, [x1, 24]
+	ldr	w3, [x1, 36]
 	ldr	w1, [x0, 4]
 	cmp	w1, w3
-	beq	.L3155
+	bne	.L3190
+	cmn	w10, #1
+	bne	.L3191
+.L3190:
 	adrp	x1, .LANCHOR10
-	str	w8, [x29, 152]
-	str	x10, [x29, 112]
+	add	x11, x21, :lo12:.LANCHOR50
+	add	x11, x11, x26, lsl 6
+	str	w10, [x29, 152]
 	ldr	x2, [x1, #:lo12:.LANCHOR10]
+	str	x11, [x29, 112]
 	ldr	w1, [x2, 552]
 	add	w1, w1, 1
 	str	w1, [x2, 552]
-	ldrb	w1, [x10, 1]
+	ldrb	w1, [x11, 1]
 	ldr	w2, [x0, 12]
 	str	w2, [sp]
-	mov	w2, w8
+	mov	w2, w10
 	ldp	w5, w6, [x0]
 	ldr	w7, [x0, 8]
-	adrp	x0, .LC215
-	ldr	w4, [x10, 40]
-	add	x0, x0, :lo12:.LC215
+	adrp	x0, .LC222
+	ldr	w4, [x11, 40]
+	add	x0, x0, :lo12:.LC222
 	bl	printf
-	ldr	x10, [x29, 112]
-	adrp	x0, .LANCHOR102
-	ldrh	w3, [x0, #:lo12:.LANCHOR102]
+	ldr	x11, [x29, 112]
+	adrp	x0, .LANCHOR66
+	ldrh	w3, [x0, #:lo12:.LANCHOR66]
 	mov	w0, 21
-	ldr	w1, [x10, 40]
+	ldr	w1, [x11, 40]
 	sub	w2, w0, w3
 	mov	w0, 1
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
 	lsr	w1, w1, w3
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR101
-	ldrb	w2, [x1, #:lo12:.LANCHOR101]
+	adrp	x1, .LANCHOR67
+	ldrb	w2, [x1, #:lo12:.LANCHOR67]
 	mov	x1, 0
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
-	ldr	w8, [x29, 152]
-.L3155:
-	add	x0, x23, :lo12:.LANCHOR50
-	add	x0, x0, x19, lsl 6
+	ldr	w10, [x29, 152]
+.L3191:
+	add	x0, x21, :lo12:.LANCHOR50
+	add	x0, x0, x26, lsl 6
 	ldr	x1, [x0, 24]
 	ldr	w0, [x0, 36]
 	ldr	w1, [x1, 4]
 	cmp	w1, w0
-	bne	.L3156
-	cmn	w8, #1
-	bne	.L3157
-.L3156:
+	bne	.L3192
+	cmn	w10, #1
+	bne	.L3193
+.L3192:
 	ldp	x0, x1, [x29, 128]
-	mov	w2, 1091
+	mov	w2, 1101
 	bl	printf
-.L3157:
-	add	x0, x23, :lo12:.LANCHOR50
-	add	x19, x0, x19, lsl 6
-	ldr	x0, [x29, 168]
-	ldrb	w2, [x19, 56]
-	ldrb	w0, [x0, #:lo12:.LANCHOR123]
-	cmp	w0, w2
-	bls	.L3158
-	ldrb	w0, [x19, 57]
+.L3193:
+	add	x0, x21, :lo12:.LANCHOR50
+	ldr	x1, [x29, 168]
+	add	x0, x0, x26, lsl 6
+	ldrb	w1, [x1, #:lo12:.LANCHOR123]
+	ldrb	w2, [x0, 56]
+	cmp	w1, w2
+	bls	.L3194
+	ldrb	w1, [x0, 57]
 	lsl	w2, w2, 9
-	ldr	x1, [x19, 8]
-	ubfiz	x0, x0, 9, 8
-	add	x1, x1, x0
-	ldr	x0, [x19, 16]
+	ldp	x3, x0, [x0, 8]
+	ubfiz	x1, x1, 9, 8
+	add	x1, x3, x1
 	bl	ftl_memcpy
-.L3159:
+.L3195:
 	ldr	x1, [x29, 144]
 	adrp	x0, .LANCHOR129
 	add	x0, x0, :lo12:.LANCHOR129
@@ -19796,26 +20118,27 @@ zftl_read:
 	ldrb	w0, [x28]
 	sub	w0, w0, #1
 	strb	w0, [x28]
-	b	.L3151
-.L3153:
-	cmp	w8, 256
-	bne	.L3154
-	adrp	x0, .LANCHOR102
+	b	.L3186
+.L3188:
+	cmp	w10, 256
+	bne	.L3189
+	adrp	x0, .LANCHOR66
+	ldr	w3, [x2, 40]
 	mov	w4, 21
-	ldp	w2, w3, [x1, 36]
 	mov	w5, 1
-	ldrh	w0, [x0, #:lo12:.LANCHOR102]
-	stp	w8, w5, [x29, 108]
+	ldrh	w0, [x0, #:lo12:.LANCHOR66]
+	ldr	w2, [x2, 36]
 	sub	w4, w4, w0
+	stp	w10, w5, [x29, 108]
 	lsr	w0, w3, w0
 	lsl	w4, w5, w4
 	sub	w4, w4, #1
 	and	w4, w4, w0
-	adrp	x0, .LANCHOR101
-	ldrb	w0, [x0, #:lo12:.LANCHOR101]
+	adrp	x0, .LANCHOR67
+	ldrb	w0, [x0, #:lo12:.LANCHOR67]
 	udiv	w4, w4, w0
-	adrp	x0, .LC214
-	add	x0, x0, :lo12:.LC214
+	adrp	x0, .LC221
+	add	x0, x0, :lo12:.LC221
 	and	w1, w4, 65535
 	str	w4, [x29, 152]
 	bl	printf
@@ -19825,16 +20148,16 @@ zftl_read:
 	mov	w1, w5
 	mov	w0, w4
 	bl	gc_add_sblk
-	ldr	w8, [x29, 108]
-	b	.L3154
-.L3158:
-	ldrb	w0, [x19, 2]
-	and	w0, w0, -9
-	strb	w0, [x19, 2]
-	b	.L3159
-.L3163:
+	ldr	w10, [x29, 108]
+	b	.L3189
+.L3194:
+	ldrb	w1, [x0, 2]
+	and	w1, w1, -9
+	strb	w1, [x0, 2]
+	b	.L3195
+.L3199:
 	mov	w0, -1
-	b	.L3132
+	b	.L3167
 	.size	zftl_read, .-zftl_read
 	.section	.text.ftl_vendor_read,"ax",@progbits
 	.align	2
@@ -19917,46 +20240,46 @@ gc_check_data_one_wl:
 	ldr	x0, [x22, 8]
 	stp	x27, x28, [sp, 96]
 	ldr	x21, [x20, #:lo12:.LANCHOR10]
-	cbnz	x0, .L3186
+	cbnz	x0, .L3222
 	mov	w0, 1
 	bl	buf_alloc
 	str	x0, [x22, 8]
-.L3186:
+.L3222:
 	add	x0, x19, :lo12:.LANCHOR63
 	ldr	x22, [x0, 8]
-	cbnz	x22, .L3187
+	cbnz	x22, .L3223
 	adrp	x1, .LANCHOR214
 	adrp	x0, .LC0
-	mov	w2, 447
+	mov	w2, 495
 	add	x1, x1, :lo12:.LANCHOR214
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3187:
-	adrp	x2, .LANCHOR107
+.L3223:
+	adrp	x2, .LANCHOR103
 	add	x28, x21, 96
 	add	x27, x21, 80
-	add	x2, x2, :lo12:.LANCHOR107
+	add	x2, x2, :lo12:.LANCHOR103
 	mov	w26, 0
-.L3188:
+.L3224:
 	ldrb	w0, [x27, 9]
 	cmp	w26, w0
-	bge	.L3197
-	adrp	x25, .LANCHOR69
+	bge	.L3233
+	adrp	x25, .LANCHOR71
 	mov	w24, 1
 	add	x23, x19, :lo12:.LANCHOR63
-	add	x25, x25, :lo12:.LANCHOR69
-	b	.L3198
-.L3196:
+	add	x25, x25, :lo12:.LANCHOR71
+	b	.L3234
+.L3232:
 	ldrh	w0, [x28]
 	ldrh	w1, [x2]
 	ldrb	w3, [x25]
 	cmp	w3, 3
 	mul	w1, w0, w1
 	ldrh	w0, [x23, 16]
-	bne	.L3189
+	bne	.L3225
 	add	w0, w0, w1
 	orr	w0, w0, w24, lsl 24
-.L3210:
+.L3246:
 	str	w0, [x22, 40]
 	mov	w1, 1
 	str	x2, [x29, 104]
@@ -19966,7 +20289,7 @@ gc_check_data_one_wl:
 	adrp	x1, .LANCHOR152
 	ldr	x2, [x29, 104]
 	cmn	w0, #1
-	beq	.L3192
+	beq	.L3228
 	ldrh	w0, [x23, 22]
 	ldr	x4, [x1, #:lo12:.LANCHOR152]
 	ldr	x3, [x22, 24]
@@ -19974,42 +20297,42 @@ gc_check_data_one_wl:
 	ldr	w5, [x4, x0]
 	ldr	w4, [x3, 4]
 	cmp	w5, w4
-	bne	.L3192
+	bne	.L3228
 	adrp	x4, .LANCHOR153
 	ldr	x4, [x4, #:lo12:.LANCHOR153]
 	ldr	w4, [x4, x0]
 	ldr	w0, [x3, 8]
 	cmp	w4, w0
-	beq	.L3193
-.L3192:
+	beq	.L3229
+.L3228:
 	add	x4, x1, :lo12:.LANCHOR152
 	ldrh	w0, [x23, 22]
 	ldr	x1, [x1, #:lo12:.LANCHOR152]
 	ldr	w0, [x1, x0, lsl 2]
 	cmn	w0, #1
-	beq	.L3193
-	adrp	x19, .LANCHOR75
+	beq	.L3229
+	adrp	x19, .LANCHOR77
 	ldrb	w3, [x27, 9]
 	str	x4, [x29, 104]
 	mov	w2, 4
-	ldrh	w0, [x19, #:lo12:.LANCHOR75]
+	ldrh	w0, [x19, #:lo12:.LANCHOR77]
 	mul	w3, w3, w0
-	adrp	x0, .LC216
-	add	x0, x0, :lo12:.LC216
+	adrp	x0, .LC223
+	add	x0, x0, :lo12:.LC223
 	bl	rknand_print_hex
-	ldrh	w0, [x19, #:lo12:.LANCHOR75]
+	ldrh	w0, [x19, #:lo12:.LANCHOR77]
 	adrp	x19, .LANCHOR153
 	ldrb	w3, [x27, 9]
 	mov	w2, 4
 	ldr	x1, [x19, #:lo12:.LANCHOR153]
 	mul	w3, w3, w0
-	adrp	x0, .LC217
-	add	x0, x0, :lo12:.LC217
+	adrp	x0, .LC224
+	add	x0, x0, :lo12:.LC224
 	bl	rknand_print_hex
 	adrp	x0, .LANCHOR14
 	ldr	x4, [x29, 104]
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L3194
+	tbz	x0, 10, .L3230
 	ldr	x1, [x22, 24]
 	ldrh	w0, [x23, 22]
 	ldr	x2, [x4]
@@ -20020,13 +20343,13 @@ gc_check_data_one_wl:
 	ldr	w4, [x3, x0]
 	ldp	w5, w6, [x1]
 	ldr	w3, [x2, x0]
-	adrp	x0, .LC218
+	adrp	x0, .LC225
 	ldr	w7, [x1, 8]
-	add	x0, x0, :lo12:.LC218
+	add	x0, x0, :lo12:.LC225
 	ldr	w1, [x22, 40]
 	ldr	w2, [x22, 52]
 	bl	printf
-.L3194:
+.L3230:
 	ldr	x0, [x20, #:lo12:.LANCHOR10]
 	mov	x1, 0
 	ldrh	w0, [x0, 80]
@@ -20036,7 +20359,7 @@ gc_check_data_one_wl:
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x1, lsl 1]
 	mov	w0, -1
-.L3185:
+.L3221:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -20045,43 +20368,43 @@ gc_check_data_one_wl:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 128
 	ret
-.L3189:
+.L3225:
 	cmp	w3, 2
-	bne	.L3191
+	bne	.L3227
 	sub	w0, w0, #1
 	add	w1, w24, w1
 	add	w0, w0, w1
 	orr	w0, w0, 33554432
-	b	.L3210
-.L3191:
+	b	.L3246
+.L3227:
 	add	w0, w0, w1
-	b	.L3210
-.L3193:
+	b	.L3246
+.L3229:
 	ldrh	w0, [x23, 22]
 	add	w24, w24, 1
 	add	w0, w0, 1
 	strh	w0, [x23, 22]
-.L3198:
+.L3234:
 	ldrh	w0, [x23, 20]
 	cmp	w24, w0
-	ble	.L3196
+	ble	.L3232
 	add	w26, w26, 1
 	add	x28, x28, 2
-	b	.L3188
-.L3197:
+	b	.L3224
+.L3233:
 	add	x19, x19, :lo12:.LANCHOR63
 	ldrh	w0, [x19, 16]
 	add	w1, w0, 1
 	strh	w1, [x19, 16]
-	adrp	x1, .LANCHOR70
-	ldrb	w1, [x1, #:lo12:.LANCHOR70]
-	cbz	w1, .L3199
+	adrp	x1, .LANCHOR72
+	ldrb	w1, [x1, #:lo12:.LANCHOR72]
+	cbz	w1, .L3235
 	add	w0, w0, 2
 	strh	w0, [x19, 16]
-.L3199:
-.L3195:
+.L3235:
+.L3231:
 	mov	w0, 0
-	b	.L3185
+	b	.L3221
 	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
 	.section	.text.ftl_update_l2p_map,"ax",@progbits
 	.align	2
@@ -20093,50 +20416,50 @@ ftl_update_l2p_map:
 	stp	x21, x22, [sp, 32]
 	mov	x22, x0
 	stp	x19, x20, [sp, 16]
-	adrp	x0, .LANCHOR83
+	adrp	x0, .LANCHOR85
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	ldrh	w23, [x0, #:lo12:.LANCHOR83]
+	ldrh	w23, [x0, #:lo12:.LANCHOR85]
 	ldrb	w0, [x22, 9]
 	ldrh	w19, [x22, 12]
 	mul	w23, w23, w0
-	adrp	x0, .LANCHOR113
+	adrp	x0, .LANCHOR109
 	str	x0, [x29, 104]
-	ldr	x1, [x0, #:lo12:.LANCHOR113]
+	ldr	x1, [x0, #:lo12:.LANCHOR109]
 	add	x19, x1, x19, lsl 2
 	add	x1, x19, x23, sxtw 2
 	ldr	w1, [x1, -4]
 	cmn	w1, #1
-	beq	.L3212
+	beq	.L3248
 	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
-	mov	w2, 1627
+	mov	w2, 1640
 	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3212:
+.L3248:
 	adrp	x27, .LANCHOR123
 	mov	x24, 0
 	add	x0, x27, :lo12:.LANCHOR123
 	mov	w21, 0
 	str	x0, [x29, 96]
-.L3213:
+.L3249:
 	cmp	w24, w23
-	blt	.L3219
+	blt	.L3255
 	adrp	x0, .LANCHOR14
 	adrp	x19, .LANCHOR9
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3220
+	tbz	x0, 12, .L3256
 	ldrh	w1, [x22]
 	ldr	x2, [x19, #:lo12:.LANCHOR9]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w3, [x2, x0]
-	adrp	x0, .LC222
+	adrp	x0, .LC229
 	mov	w2, w21
-	add	x0, x0, :lo12:.LC222
+	add	x0, x0, :lo12:.LC229
 	bl	printf
-.L3220:
+.L3256:
 	ldrh	w1, [x22]
 	ldr	x0, [x19, #:lo12:.LANCHOR9]
 	ldp	x23, x24, [sp, 48]
@@ -20147,38 +20470,38 @@ ftl_update_l2p_map:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L3219:
+.L3255:
 	ldr	w2, [x19, x24, lsl 2]
 	cmn	w2, #1
-	beq	.L3214
+	beq	.L3250
 	ldrb	w20, [x27, #:lo12:.LANCHOR123]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	lsl	w20, w20, 7
 	udiv	w20, w2, w20
 	and	w20, w20, 65535
-	tbz	x0, 12, .L3215
-	adrp	x0, .LC219
+	tbz	x0, 12, .L3251
+	adrp	x0, .LC226
 	mov	w3, w24
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC219
+	add	x0, x0, :lo12:.LC226
 	bl	printf
-.L3215:
-	adrp	x25, .LANCHOR107
-	adrp	x26, .LC220
+.L3251:
+	adrp	x25, .LANCHOR103
+	adrp	x26, .LC227
 	mov	x28, x24
-	add	x25, x25, :lo12:.LANCHOR107
-	add	x26, x26, :lo12:.LC220
-.L3218:
+	add	x25, x25, :lo12:.LANCHOR103
+	add	x26, x26, :lo12:.LC227
+.L3254:
 	ldr	w1, [x19, x28, lsl 2]
 	cmn	w1, #1
-	beq	.L3216
+	beq	.L3252
 	ldr	x0, [x29, 96]
 	ldrb	w2, [x0]
 	lsl	w2, w2, 7
 	udiv	w1, w1, w2
 	cmp	w20, w1, uxth
-	bne	.L3216
+	bne	.L3252
 	ldrb	w0, [x22, 9]
 	sdiv	w1, w28, w0
 	msub	w0, w1, w0, w28
@@ -20190,15 +20513,15 @@ ftl_update_l2p_map:
 	str	w2, [x29, 124]
 	ldr	w1, [x19, x28, lsl 2]
 	bl	pm_ppa_update_check
-	cbz	w0, .L3217
+	cbz	w0, .L3253
 	ldr	x0, [x29, 104]
 	mov	w3, w23
 	mov	w2, 4
-	ldr	x1, [x0, #:lo12:.LANCHOR113]
-	adrp	x0, .LC221
-	add	x0, x0, :lo12:.LC221
+	ldr	x1, [x0, #:lo12:.LANCHOR109]
+	adrp	x0, .LC228
+	add	x0, x0, :lo12:.LC228
 	bl	rknand_print_hex
-.L3217:
+.L3253:
 	ldr	w0, [x19, x28, lsl 2]
 	add	w21, w21, 1
 	mov	w2, 1
@@ -20207,46 +20530,68 @@ ftl_update_l2p_map:
 	bl	pm_log2phys
 	mov	w0, -1
 	str	w0, [x19, x28, lsl 2]
-.L3216:
+.L3252:
 	add	x28, x28, 1
 	cmp	w23, w28
-	bgt	.L3218
-.L3214:
+	bgt	.L3254
+.L3250:
 	add	x24, x24, 1
-	b	.L3213
+	b	.L3249
 	.size	ftl_update_l2p_map, .-ftl_update_l2p_map
 	.section	.text.ftl_alloc_new_data_sblk,"ax",@progbits
 	.align	2
 	.global	ftl_alloc_new_data_sblk
 	.type	ftl_alloc_new_data_sblk, %function
 ftl_alloc_new_data_sblk:
-	stp	x29, x30, [sp, -32]!
+	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
-	str	x19, [sp, 16]
-	mov	x19, x0
+	stp	x19, x20, [sp, 16]
+	mov	x20, x0
+	str	x21, [sp, 32]
+	ldrh	w21, [x0]
 	bl	ftl_update_l2p_map
 	bl	pm_flush
-	ldrh	w0, [x19]
+	ldrh	w0, [x20]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3242
+	beq	.L3278
 	bl	zftl_insert_data_list
-.L3242:
-	adrp	x0, .LANCHOR10
-	ldr	x0, [x0, #:lo12:.LANCHOR10]
+.L3278:
+	adrp	x19, .LANCHOR10
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	add	x0, x0, 16
-	cmp	x19, x0
-	mov	x0, x19
+	cmp	x20, x0
+	mov	x0, x20
 	cset	w1, ne
 	add	w1, w1, 2
 	bl	ftl_open_sblk_init
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	ldr	w0, [x0, 560]
+	cmp	w0, w21
+	bne	.L3280
+	mov	w20, 65535
+	cmp	w21, w20
+	beq	.L3280
+	mov	w1, w21
+	adrp	x0, .LC230
+	add	x0, x0, :lo12:.LC230
+	bl	printf
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	ldr	w0, [x0, 564]
+	bl	gc_mark_bad_ppa
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	mov	w1, -1
+	str	w20, [x0, 560]
+	str	w1, [x0, 564]
+.L3280:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
 	bl	lpa_rebuild_hash
-	ldr	x19, [sp, 16]
+	ldr	x21, [sp, 32]
 	mov	w0, 0
-	ldp	x29, x30, [sp], 32
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
 	ret
 	.size	ftl_alloc_new_data_sblk, .-ftl_alloc_new_data_sblk
 	.section	.text.ftl_write_commit,"ax",@progbits
@@ -20263,10 +20608,10 @@ ftl_write_commit:
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-.L3247:
+.L3284:
 	adrp	x2, .LANCHOR58
 	ldrb	w1, [x2, #:lo12:.LANCHOR58]
-	cbz	w1, .L3249
+	cbz	w1, .L3286
 	adrp	x3, .LANCHOR57
 	adrp	x0, .LANCHOR50
 	add	x0, x0, :lo12:.LANCHOR50
@@ -20285,24 +20630,24 @@ ftl_write_commit:
 	mov	x19, x0
 	ldr	w1, [x0, #:lo12:.LANCHOR120]
 	cmp	w2, w1
-	bcc	.L3251
+	bcc	.L3288
 	adrp	x1, .LANCHOR216
 	adrp	x0, .LC0
-	mov	w2, 501
+	mov	w2, 502
 	add	x1, x1, :lo12:.LANCHOR216
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3251:
+.L3288:
 	ldr	x0, [x29, 112]
 	ldr	w1, [x19, #:lo12:.LANCHOR120]
 	add	x0, x23, x0, lsl 6
 	ldr	w22, [x0, 36]
 	cmp	w22, w1
-	bcc	.L3252
+	bcc	.L3289
 	ldr	x0, [x29, 120]
 	bl	buf_free
 	mov	w0, -1
-.L3246:
+.L3283:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -20310,7 +20655,7 @@ ftl_write_commit:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L3252:
+.L3289:
 	ldrb	w21, [x0, 57]
 	ldrb	w20, [x0, 56]
 	ldr	x26, [x0, 8]
@@ -20318,17 +20663,17 @@ ftl_write_commit:
 	adrp	x0, .LANCHOR121
 	str	x0, [x29, 104]
 	ldrb	w1, [x0, #:lo12:.LANCHOR121]
-	cbz	w1, .L3254
+	cbz	w1, .L3291
 	adrp	x0, .LANCHOR174
 	ldrb	w1, [x0, #:lo12:.LANCHOR174]
 	add	x1, x23, x1, lsl 6
-.L3255:
+.L3292:
 	ldrb	w0, [x1]
 	cmp	w0, 255
-	bne	.L3256
+	bne	.L3293
 	ldr	w0, [x1, 36]
 	cmp	w22, w0
-	bne	.L3254
+	bne	.L3291
 	ldr	x0, [x1, 8]
 	ubfiz	x21, x21, 9, 8
 	lsl	w2, w20, 9
@@ -20337,33 +20682,33 @@ ftl_write_commit:
 	bl	ftl_memcpy
 	ldr	x0, [x29, 120]
 	bl	buf_free
-	b	.L3247
-.L3256:
+	b	.L3284
+.L3293:
 	ubfiz	x1, x0, 6, 8
 	add	x1, x23, x1
-	b	.L3255
-.L3254:
+	b	.L3292
+.L3291:
 	mov	w0, w22
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 140]
 	cmn	w0, #1
-	bne	.L3258
+	bne	.L3295
 	mov	w2, 0
 	add	x1, x29, 140
 	mov	w0, w22
 	bl	pm_log2phys
-.L3258:
+.L3295:
 	adrp	x25, .LANCHOR10
 	add	x1, x23, 2
 	mov	w0, 0
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 16
-.L3261:
+.L3298:
 	ldr	w2, [x1, 34]
 	cmp	w22, w2
-	bne	.L3259
+	bne	.L3296
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L3259
+	tbz	x2, 3, .L3296
 	ubfiz	x0, x0, 6, 32
 	and	w2, w2, -9
 	add	x0, x23, x0
@@ -20371,50 +20716,50 @@ ftl_write_commit:
 	ldr	x24, [x0, 8]
 	ldr	w0, [x0, 40]
 	str	w0, [x29, 140]
-.L3260:
+.L3297:
 	adrp	x0, .LANCHOR123
 	str	x0, [x29, 96]
 	ldrb	w1, [x0, #:lo12:.LANCHOR123]
 	cmp	w20, w1
-	bcs	.L3285
+	bcs	.L3322
 	add	w20, w21, w20
-	cbz	x24, .L3263
-	cbz	w21, .L3264
+	cbz	x24, .L3300
+	cbz	w21, .L3301
 	lsl	w2, w21, 9
 	mov	x1, x24
 	mov	x0, x26
 	bl	ftl_memcpy
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 48
-.L3264:
+.L3301:
 	ldr	x0, [x29, 96]
 	ldrb	w2, [x0, #:lo12:.LANCHOR123]
 	cmp	w20, w2
-	bcc	.L3265
+	bcc	.L3302
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 16
-.L3285:
+.L3322:
 	mov	w24, 0
-	b	.L3262
-.L3259:
+	b	.L3299
+.L3296:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 32
-	bne	.L3261
+	bne	.L3298
 	mov	x24, 0
-	b	.L3260
-.L3265:
+	b	.L3297
+.L3302:
 	ubfiz	x0, x20, 9, 9
 	sub	w2, w2, w20
 	add	x1, x24, x0
 	lsl	w2, w2, 9
 	add	x0, x26, x0
 	bl	ftl_memcpy
-	b	.L3285
-.L3263:
+	b	.L3322
+.L3300:
 	ldr	w0, [x29, 140]
 	cmn	w0, #1
-	beq	.L3266
+	beq	.L3303
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 140]
@@ -20427,11 +20772,11 @@ ftl_write_commit:
 	ldr	w0, [x0, 4]
 	add	w24, w24, 1
 	cmp	w22, w0
-	bne	.L3267
+	bne	.L3304
 	ldr	w0, [x27, 52]
 	cmn	w0, #1
-	bne	.L3268
-.L3267:
+	bne	.L3305
+.L3304:
 	ldr	x1, [x25, #:lo12:.LANCHOR10]
 	mov	w3, w22
 	ldr	w4, [x27, 52]
@@ -20439,53 +20784,53 @@ ftl_write_commit:
 	ldr	w0, [x1, 552]
 	add	w0, w0, 1
 	str	w0, [x1, 552]
-	adrp	x0, .LC223
-	add	x0, x0, :lo12:.LC223
+	adrp	x0, .LC231
+	add	x0, x0, :lo12:.LC231
 	ldrb	w1, [x27, 1]
 	bl	printf
 	ldr	x1, [x27, 24]
 	mov	w3, 4
-	adrp	x0, .LC182
+	adrp	x0, .LC189
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC182
+	add	x0, x0, :lo12:.LC189
 	bl	rknand_print_hex
-.L3268:
+.L3305:
 	ldr	x0, [x27, 24]
 	ldr	w0, [x0, 4]
 	cmp	w22, w0
-	bne	.L3269
+	bne	.L3306
 	ldr	w0, [x27, 52]
 	cmn	w0, #1
-	bne	.L3270
-.L3269:
+	bne	.L3307
+.L3306:
 	adrp	x1, .LANCHOR216
 	adrp	x0, .LC0
-	mov	w2, 572
+	mov	w2, 573
 	add	x1, x1, :lo12:.LANCHOR216
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3270:
-	cbz	w21, .L3271
+.L3307:
+	cbz	w21, .L3308
 	ldr	w0, [x29, 140]
 	lsl	w2, w21, 9
 	cmn	w0, #1
-	beq	.L3272
+	beq	.L3309
 	ldr	x1, [x27, 8]
 	mov	x0, x26
 	bl	ftl_memcpy
-.L3273:
+.L3310:
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 48
-.L3271:
+.L3308:
 	ldr	x0, [x29, 96]
 	ldrb	w2, [x0, #:lo12:.LANCHOR123]
 	cmp	w20, w2
-	bcc	.L3274
-	bls	.L3275
+	bcc	.L3311
+	bls	.L3312
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 16
-.L3275:
-	cbz	x27, .L3262
+.L3312:
+	cbz	x27, .L3299
 	ldrb	w0, [x27, 2]
 	mov	x1, x27
 	and	w0, w0, -9
@@ -20495,13 +20840,13 @@ ftl_write_commit:
 	bl	buf_remove_buf
 	mov	x0, x27
 	bl	buf_free
-.L3262:
+.L3299:
 	ldrh	w0, [x19, 6]
-	cbnz	w0, .L3277
+	cbnz	w0, .L3314
 	bl	ftl_flush
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L3277:
+.L3314:
 	mov	x0, x19
 	bl	ftl_get_new_free_page
 	ldr	x1, [x29, 112]
@@ -20537,10 +20882,10 @@ ftl_write_commit:
 	cmp	w2, 2
 	str	wzr, [x0, #:lo12:.LANCHOR217]
 	ldrh	w0, [x19, 6]
-	bhi	.L3278
+	bhi	.L3315
 	cmp	w0, 1
-	bne	.L3250
-.L3278:
+	bne	.L3287
+.L3315:
 	ldrb	w1, [x19, 5]
 	cmp	w1, 0
 	mov	w1, 0
@@ -20549,9 +20894,9 @@ ftl_write_commit:
 	ldrb	w0, [x20, #:lo12:.LANCHOR174]
 	csinc	w4, w2, w4, eq
 	mov	w3, w0
-.L3282:
+.L3319:
 	cmp	w1, w4
-	bne	.L3283
+	bne	.L3320
 	strb	w3, [x20, #:lo12:.LANCHOR174]
 	and	w1, w1, 255
 	ldr	x3, [x29, 104]
@@ -20562,58 +20907,58 @@ ftl_write_commit:
 	bl	sblk_prog_page
 	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bne	.L3250
+	bne	.L3287
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	mov	x0, x19
 	bl	ftl_write_last_log_page
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L3250:
+.L3287:
 	adrp	x0, .LANCHOR58
 	ldrb	w0, [x0, #:lo12:.LANCHOR58]
-	cbnz	w0, .L3247
-.L3249:
+	cbnz	w0, .L3284
+.L3286:
 	bl	ftl_write_completed
 	mov	w0, 0
-	b	.L3246
-.L3274:
+	b	.L3283
+.L3311:
 	ldr	w0, [x29, 140]
 	sub	w2, w2, w20
 	lsl	w2, w2, 9
 	cmn	w0, #1
 	ubfiz	x0, x20, 7, 9
-	beq	.L3276
+	beq	.L3313
 	ldr	x1, [x27, 8]
 	lsl	x0, x0, 2
 	add	x1, x1, x0
 	add	x0, x26, x0
 	bl	ftl_memcpy
-	b	.L3275
-.L3276:
+	b	.L3312
+.L3313:
 	mov	w1, 0
 	add	x0, x26, x0, lsl 2
 	bl	ftl_memset
-	b	.L3275
-.L3283:
+	b	.L3312
+.L3320:
 	ubfiz	x3, x3, 6, 8
 	add	w1, w1, 1
 	ldrb	w3, [x23, x3]
-	b	.L3282
-.L3284:
+	b	.L3319
+.L3321:
 	lsl	w2, w21, 9
 	mov	x27, 0
 	mov	w24, 0
-.L3272:
+.L3309:
 	mov	w1, 0
 	mov	x0, x26
 	bl	ftl_memset
-	b	.L3273
-.L3266:
-	cbnz	w21, .L3284
+	b	.L3310
+.L3303:
+	cbnz	w21, .L3321
 	mov	w24, 0
 	mov	x27, 0
-	b	.L3271
+	b	.L3308
 	.size	ftl_write_commit, .-ftl_write_commit
 	.section	.text.gc_do_copy_back,"ax",@progbits
 	.align	2
@@ -20621,19 +20966,19 @@ ftl_write_commit:
 	.type	gc_do_copy_back, %function
 gc_do_copy_back:
 	sub	sp, sp, #224
-	adrp	x0, .LANCHOR74
+	adrp	x0, .LANCHOR76
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
-	ldrb	w0, [x0, #:lo12:.LANCHOR74]
+	ldrb	w0, [x0, #:lo12:.LANCHOR76]
 	stp	x19, x20, [sp, 32]
 	stp	x21, x22, [sp, 48]
 	stp	x23, x24, [sp, 64]
 	stp	x25, x26, [sp, 80]
 	stp	x27, x28, [sp, 96]
-	cbnz	w0, .L3308
+	cbnz	w0, .L3345
 	bl	buf_alloc
 	mov	x19, x0
-	cbz	x0, .L3307
+	cbz	x0, .L3344
 	adrp	x20, .LANCHOR63
 	add	x3, x20, :lo12:.LANCHOR63
 	ldrh	w2, [x3, 26]
@@ -20649,52 +20994,52 @@ gc_do_copy_back:
 	ldr	w0, [x19, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3310
+	bne	.L3347
 	adrp	x1, .LANCHOR218
 	adrp	x0, .LC0
-	mov	w2, 684
+	mov	w2, 732
 	add	x1, x1, :lo12:.LANCHOR218
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3310:
+.L3347:
 	ldr	x0, [x19, 24]
 	ldr	w21, [x0, 4]
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 160]
 	cmn	w0, #1
-	bne	.L3311
+	bne	.L3348
 	mov	w2, 0
 	add	x1, x29, 160
 	mov	w0, w21
 	bl	pm_log2phys
-.L3311:
+.L3348:
 	ldr	w23, [x29, 160]
 	cmp	w22, w23
-	bne	.L3312
+	bne	.L3349
 	adrp	x0, .LANCHOR50
 	add	x0, x0, :lo12:.LANCHOR50
 	add	x1, x0, 2
 	add	x0, x0, 2050
-.L3315:
+.L3352:
 	ldr	w2, [x1, 34]
 	cmp	w21, w2
-	bne	.L3313
+	bne	.L3350
 	ldrb	w2, [x1]
-	tbz	x2, 1, .L3313
+	tbz	x2, 1, .L3350
 	mov	x0, x19
 	bl	buf_free
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3307
+	tbz	x0, 8, .L3344
 	add	x20, x20, :lo12:.LANCHOR63
-	adrp	x0, .LC224
+	adrp	x0, .LC232
 	mov	w2, w22
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC224
+	add	x0, x0, :lo12:.LC232
 	ldrh	w3, [x20, 26]
 	bl	printf
-.L3307:
+.L3344:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -20703,10 +21048,10 @@ gc_do_copy_back:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 224
 	ret
-.L3313:
+.L3350:
 	add	x1, x1, 64
 	cmp	x1, x0
-	bne	.L3315
+	bne	.L3352
 	adrp	x0, .LANCHOR123
 	mov	w1, 10
 	strb	wzr, [x19, 57]
@@ -20721,64 +21066,64 @@ gc_do_copy_back:
 	str	w0, [x19, 32]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3316
+	tbz	x0, 8, .L3353
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	add	x1, x20, :lo12:.LANCHOR63
 	mov	w3, w0
 	mov	w4, w22
-	adrp	x0, .LC225
+	adrp	x0, .LC233
 	mov	w2, w23
-	add	x0, x0, :lo12:.LC225
+	add	x0, x0, :lo12:.LC233
 	ldrh	w5, [x1, 26]
 	mov	w1, w21
 	bl	printf
-.L3316:
+.L3353:
 	mov	x0, x19
 	bl	ftl_gc_write_buf
 	bl	ftl_write_commit
 	add	x20, x20, :lo12:.LANCHOR63
-	adrp	x0, .LANCHOR100
-	ldr	x1, [x0, #:lo12:.LANCHOR100]
+	adrp	x0, .LANCHOR102
+	ldr	x1, [x0, #:lo12:.LANCHOR102]
 	ldr	w0, [x1, 60]
 	add	w0, w0, 1
 	str	w0, [x1, 60]
 	ldrh	w0, [x20, 28]
 	add	w0, w0, 1
 	strh	w0, [x20, 28]
-	b	.L3307
-.L3312:
+	b	.L3344
+.L3349:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3317
+	tbz	x0, 8, .L3354
 	add	x20, x20, :lo12:.LANCHOR63
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	mov	w3, w0
 	mov	w4, w22
-	adrp	x0, .LC225
+	adrp	x0, .LC233
 	ldrh	w5, [x20, 26]
 	mov	w2, w23
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC225
+	add	x0, x0, :lo12:.LC233
 	bl	printf
-.L3317:
+.L3354:
 	mov	x0, x19
 	bl	buf_free
-	b	.L3307
-.L3308:
+	b	.L3344
+.L3345:
 	adrp	x1, .LANCHOR10
-	adrp	x0, .LANCHOR69
+	adrp	x0, .LANCHOR71
 	stp	x0, x1, [x29, 128]
 	adrp	x24, .LANCHOR63
 	ldr	x22, [x1, #:lo12:.LANCHOR10]
-	ldrb	w25, [x0, #:lo12:.LANCHOR69]
+	ldrb	w25, [x0, #:lo12:.LANCHOR71]
 	add	x22, x22, 80
 	cmp	w25, 3
-	bne	.L3318
-	adrp	x0, .LANCHOR73
-	ldrb	w0, [x0, #:lo12:.LANCHOR73]
-	cbz	w0, .L3319
+	bne	.L3355
+	adrp	x0, .LANCHOR75
+	ldrb	w0, [x0, #:lo12:.LANCHOR75]
+	cbz	w0, .L3356
 	add	x0, x24, :lo12:.LANCHOR63
 	ldrb	w19, [x22, 9]
 	ldrh	w20, [x0, 314]
@@ -20787,25 +21132,25 @@ gc_do_copy_back:
 	sdiv	w21, w20, w21
 	madd	w19, w21, w19, w20
 	and	w19, w19, 65535
-.L3320:
-	adrp	x1, .LANCHOR75
+.L3357:
+	adrp	x1, .LANCHOR77
 	ldrb	w0, [x22, 9]
 	add	x4, x24, :lo12:.LANCHOR63
 	mov	w2, 0
-	ldrh	w3, [x1, #:lo12:.LANCHOR75]
+	ldrh	w3, [x1, #:lo12:.LANCHOR77]
 	mul	w8, w25, w0
 	ldrh	w10, [x4, 24]
 	mul	w3, w3, w0
 	adrp	x0, .LANCHOR153
 	ldr	x7, [x0, #:lo12:.LANCHOR153]
 	sub	w3, w3, #1
-.L3323:
+.L3360:
 	cmp	w2, w8
-	blt	.L3325
-.L3354:
+	blt	.L3362
+.L3391:
 	mov	w23, 1
-	b	.L3321
-.L3319:
+	b	.L3358
+.L3356:
 	add	x0, x24, :lo12:.LANCHOR63
 	ldrb	w20, [x22, 9]
 	ldrh	w1, [x0, 314]
@@ -20821,12 +21166,12 @@ gc_do_copy_back:
 	madd	w20, w21, w20, w19
 	add	w20, w20, w20, lsl 1
 	and	w20, w20, 65535
-	beq	.L3320
-.L3321:
+	beq	.L3357
+.L3358:
 	adrp	x0, .LANCHOR14
 	str	x0, [x29, 112]
 	ldr	w1, [x0, #:lo12:.LANCHOR14]
-	tbz	x1, 8, .L3326
+	tbz	x1, 8, .L3363
 	adrp	x0, .LANCHOR153
 	ubfiz	x1, x20, 2, 16
 	mov	w6, w20
@@ -20834,18 +21179,18 @@ gc_do_copy_back:
 	ldr	x2, [x0, #:lo12:.LANCHOR153]
 	add	x0, x24, :lo12:.LANCHOR63
 	ldrh	w4, [x0, 314]
-	adrp	x0, .LC226
+	adrp	x0, .LC234
 	ldr	w5, [x2, x1]
-	add	x0, x0, :lo12:.LC226
+	add	x0, x0, :lo12:.LC234
 	mov	w2, w23
 	mov	w1, w21
 	bl	printf
-.L3326:
+.L3363:
 	adrp	x0, .LANCHOR50
 	str	wzr, [x29, 152]
 	add	x0, x0, :lo12:.LANCHOR50
 	str	x0, [x29, 120]
-.L3327:
+.L3364:
 	ldrb	w1, [x22, 9]
 	ldr	w0, [x29, 152]
 	ldrh	w26, [x29, 152]
@@ -20853,23 +21198,23 @@ gc_do_copy_back:
 	str	w0, [x29, 156]
 	mul	w3, w25, w1
 	cmp	w0, w3
-	blt	.L3339
+	blt	.L3376
 	ldr	x0, [x29, 128]
-	ldrb	w0, [x0, #:lo12:.LANCHOR69]
+	ldrb	w0, [x0, #:lo12:.LANCHOR71]
 	cmp	w0, 3
 	add	x0, x29, 160
-	bne	.L3340
-	adrp	x2, .LANCHOR73
+	bne	.L3377
+	adrp	x2, .LANCHOR75
 	ldr	x3, [x29, 160]
-	ldrb	w2, [x2, #:lo12:.LANCHOR73]
-	cbz	w2, .L3341
-.L3344:
+	ldrb	w2, [x2, #:lo12:.LANCHOR75]
+	cbz	w2, .L3378
+.L3381:
 	strb	wzr, [x3, 60]
-	b	.L3342
-.L3318:
-	adrp	x0, .LANCHOR70
-	ldrb	w0, [x0, #:lo12:.LANCHOR70]
-	cbnz	w0, .L3322
+	b	.L3379
+.L3355:
+	adrp	x0, .LANCHOR72
+	ldrb	w0, [x0, #:lo12:.LANCHOR72]
+	cbnz	w0, .L3359
 	add	x0, x24, :lo12:.LANCHOR63
 	ldrb	w19, [x22, 9]
 	mov	w25, 1
@@ -20877,8 +21222,8 @@ gc_do_copy_back:
 	sdiv	w21, w20, w19
 	msub	w19, w21, w19, w20
 	and	w19, w19, 65535
-	b	.L3320
-.L3322:
+	b	.L3357
+.L3359:
 	add	x0, x24, :lo12:.LANCHOR63
 	ldrb	w19, [x22, 9]
 	mov	w25, 2
@@ -20886,41 +21231,41 @@ gc_do_copy_back:
 	sdiv	w21, w20, w19
 	msub	w19, w21, w19, w20
 	and	w19, w19, 65535
-	b	.L3320
-.L3325:
+	b	.L3357
+.L3362:
 	add	w5, w20, w2
 	cmp	w5, w3
-	beq	.L3354
+	beq	.L3391
 	sbfiz	x5, x5, 2, 32
 	ldr	w0, [x7, x5]
 	cmn	w0, #1
-	bne	.L3324
+	bne	.L3361
 	ldrh	w6, [x4, 26]
 	cmp	w6, w10
-	bcs	.L3307
+	bcs	.L3344
 	mov	w0, w6
 	bl	gc_get_src_ppa_from_index
 	add	w6, w6, 1
 	strh	w6, [x4, 26]
 	str	w0, [x7, x5]
-.L3324:
+.L3361:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-	b	.L3323
-.L3339:
+	b	.L3360
+.L3376:
 	ldr	w0, [x29, 156]
 	add	w0, w20, w0
 	str	w0, [x29, 144]
 	sxtw	x27, w0
-	adrp	x0, .LANCHOR72
-	ldr	x0, [x0, #:lo12:.LANCHOR72]
+	adrp	x0, .LANCHOR74
+	ldr	x0, [x0, #:lo12:.LANCHOR74]
 	ldrb	w0, [x0, x27]
 	cmp	w0, 255
-	bne	.L3328
+	bne	.L3365
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbnz	x0, .L3329
+	cbnz	x0, .L3366
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	bl	gc_write_completed
@@ -20928,17 +21273,17 @@ gc_do_copy_back:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbz	x0, .L3307
-.L3329:
-	adrp	x0, .LANCHOR72
+	cbz	x0, .L3344
+.L3366:
+	adrp	x0, .LANCHOR74
 	ldrb	w1, [x28, 1]
-	adrp	x5, .LANCHOR75
+	adrp	x5, .LANCHOR77
 	adrp	x6, .LANCHOR153
-	ldr	x0, [x0, #:lo12:.LANCHOR72]
+	ldr	x0, [x0, #:lo12:.LANCHOR74]
 	strb	w1, [x0, x27]
 	add	x1, x24, :lo12:.LANCHOR63
 	strb	w23, [x28, 61]
-	ldrh	w7, [x5, #:lo12:.LANCHOR75]
+	ldrh	w7, [x5, #:lo12:.LANCHOR77]
 	ldrb	w0, [x1, 7]
 	add	w0, w0, 1
 	strb	w0, [x1, 7]
@@ -20949,24 +21294,24 @@ gc_do_copy_back:
 	mul	w0, w0, w7
 	sub	w0, w0, #1
 	cmp	w1, w0
-	bne	.L3330
+	bne	.L3367
 	adrp	x0, .LANCHOR152
-	adrp	x4, .LANCHOR76
+	adrp	x4, .LANCHOR78
 	stp	x6, x5, [x29, 96]
 	ldr	x1, [x0, #:lo12:.LANCHOR152]
 	mov	w0, -1
 	str	x4, [x29, 144]
 	str	w0, [x1, x27, lsl 2]
 	ldr	x0, [x28, 8]
-	ldrb	w2, [x4, #:lo12:.LANCHOR76]
+	ldrb	w2, [x4, #:lo12:.LANCHOR78]
 	mul	w2, w2, w7
 	lsl	w2, w2, 2
 	bl	ftl_memcpy
 	ldp	x6, x5, [x29, 96]
 	ldr	x4, [x29, 144]
 	ldr	x7, [x28, 8]
-	ldrh	w0, [x5, #:lo12:.LANCHOR75]
-	ldrb	w1, [x4, #:lo12:.LANCHOR76]
+	ldrh	w0, [x5, #:lo12:.LANCHOR77]
+	ldrb	w1, [x4, #:lo12:.LANCHOR78]
 	mul	w0, w0, w1
 	ldr	x1, [x6, #:lo12:.LANCHOR153]
 	lsl	w2, w0, 2
@@ -20983,9 +21328,9 @@ gc_do_copy_back:
 	ldr	x5, [x29, 104]
 	movk	w0, 0xf55f, lsl 16
 	ldr	x4, [x29, 144]
-	ldrh	w1, [x5, #:lo12:.LANCHOR75]
+	ldrh	w1, [x5, #:lo12:.LANCHOR77]
 	str	w0, [x6]
-	ldrb	w0, [x4, #:lo12:.LANCHOR76]
+	ldrb	w0, [x4, #:lo12:.LANCHOR78]
 	mul	w1, w1, w0
 	ldr	x0, [x28, 8]
 	lsl	w1, w1, 2
@@ -20995,11 +21340,11 @@ gc_do_copy_back:
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x0, 132]
 	str	w0, [x6, 8]
-.L3328:
-	adrp	x0, .LANCHOR72
+.L3365:
+	adrp	x0, .LANCHOR74
 	ldr	w5, [x29, 156]
 	add	x1, x29, 160
-	ldr	x4, [x0, #:lo12:.LANCHOR72]
+	ldr	x4, [x0, #:lo12:.LANCHOR74]
 	adrp	x0, .LANCHOR50
 	add	x3, x0, :lo12:.LANCHOR50
 	ldrb	w2, [x4, x27]
@@ -21012,12 +21357,12 @@ gc_do_copy_back:
 	strh	w0, [x3, 50]
 	ldr	x0, [x29, 128]
 	strb	w23, [x3, 61]
-	ldrb	w0, [x0, #:lo12:.LANCHOR69]
+	ldrb	w0, [x0, #:lo12:.LANCHOR71]
 	cmp	w0, 3
-	bne	.L3334
+	bne	.L3371
 	udiv	w0, w26, w0
-	adrp	x6, .LANCHOR107
-	ldrh	w6, [x6, #:lo12:.LANCHOR107]
+	adrp	x6, .LANCHOR103
+	ldrh	w6, [x6, #:lo12:.LANCHOR103]
 	add	w1, w0, w19
 	add	w0, w0, w0, lsl 1
 	add	x1, x22, x1, sxtw 1
@@ -21032,10 +21377,10 @@ gc_do_copy_back:
 	ldr	x3, [x5, #:lo12:.LANCHOR154]
 	orr	w0, w1, w0, lsl 24
 	str	w0, [x3, x6, lsl 2]
-.L3335:
+.L3372:
 	ldr	x0, [x29, 112]
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3338
+	tbz	x0, 8, .L3375
 	ldr	x0, [x29, 120]
 	ldrb	w4, [x4, x27]
 	ldr	w1, [x29, 156]
@@ -21049,19 +21394,19 @@ gc_do_copy_back:
 	str	w0, [sp, 8]
 	mov	w0, 3
 	udiv	w26, w26, w0
-	adrp	x0, .LC227
-	add	x0, x0, :lo12:.LC227
+	adrp	x0, .LC235
+	add	x0, x0, :lo12:.LC235
 	add	w26, w26, w19
 	str	w26, [sp]
 	ldr	w5, [x2, 40]
 	mov	w2, w23
 	bl	printf
-.L3338:
+.L3375:
 	ldr	w0, [x29, 152]
 	add	w0, w0, 1
 	str	w0, [x29, 152]
-	b	.L3327
-.L3330:
+	b	.L3364
+.L3367:
 	lsl	x0, x27, 2
 	str	x0, [x29, 144]
 	ldr	x0, [x6, #:lo12:.LANCHOR153]
@@ -21074,10 +21419,10 @@ gc_do_copy_back:
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3332
-	adrp	x0, .LANCHOR102
+	bne	.L3369
+	adrp	x0, .LANCHOR66
 	ldr	w1, [x28, 40]
-	ldrh	w4, [x0, #:lo12:.LANCHOR102]
+	ldrh	w4, [x0, #:lo12:.LANCHOR66]
 	mov	w0, 21
 	sub	w2, w0, w4
 	mov	w0, 1
@@ -21085,38 +21430,38 @@ gc_do_copy_back:
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR101
-	ldrb	w2, [x1, #:lo12:.LANCHOR101]
+	adrp	x1, .LANCHOR67
+	ldrb	w2, [x1, #:lo12:.LANCHOR67]
 	mov	x1, 0
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3332
+	bne	.L3369
 	ldr	x0, [x28, 24]
 	mov	w1, -1
 	str	w1, [x0, 4]
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmp	w0, w1, 4, ne
-	bne	.L3332
+	bne	.L3369
 	adrp	x1, .LANCHOR218
 	adrp	x0, .LC0
-	mov	w2, 799
+	mov	w2, 847
 	add	x1, x1, :lo12:.LANCHOR218
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3332:
+.L3369:
 	ldr	x0, [x28, 24]
 	adrp	x1, .LANCHOR120
 	ldr	w1, [x1, #:lo12:.LANCHOR120]
 	ldr	w2, [x0, 4]
 	cmp	w2, w1
-	bcc	.L3333
+	bcc	.L3370
 	mov	w1, -1
 	str	w1, [x0, 4]
-.L3333:
+.L3370:
 	adrp	x1, .LANCHOR152
 	lsl	x3, x27, 2
 	ldr	w2, [x0, 4]
@@ -21124,125 +21469,125 @@ gc_do_copy_back:
 	str	w2, [x1, x3]
 	ldr	w1, [x28, 40]
 	str	w1, [x0, 8]
-	b	.L3328
-.L3334:
+	b	.L3365
+.L3371:
 	cmp	w0, 2
-	bne	.L3336
-	adrp	x0, .LANCHOR70
-	adrp	x1, .LANCHOR107
-	ldrb	w0, [x0, #:lo12:.LANCHOR70]
-	cbnz	w0, .L3337
+	bne	.L3373
+	adrp	x0, .LANCHOR72
+	adrp	x1, .LANCHOR103
+	ldrb	w0, [x0, #:lo12:.LANCHOR72]
+	cbnz	w0, .L3374
 	ldr	w0, [x29, 156]
-	ldrh	w1, [x1, #:lo12:.LANCHOR107]
+	ldrh	w1, [x1, #:lo12:.LANCHOR103]
 	add	w0, w19, w0
 	add	x0, x22, x0, sxtw 1
 	ldrh	w0, [x0, 16]
 	madd	w0, w0, w1, w21
-.L3398:
+.L3435:
 	orr	w0, w0, 33554432
 	str	w0, [x3, 40]
-.L3336:
+.L3373:
 	ldr	x0, [x29, 120]
 	add	x0, x0, x2, lsl 6
 	ldrh	w1, [x0, 48]
 	ldr	w3, [x0, 40]
 	ldr	x0, [x5, #:lo12:.LANCHOR154]
 	str	w3, [x0, x1, lsl 2]
-	b	.L3335
-.L3337:
+	b	.L3372
+.L3374:
 	add	w0, w19, w26, lsr 1
-	ldrh	w1, [x1, #:lo12:.LANCHOR107]
+	ldrh	w1, [x1, #:lo12:.LANCHOR103]
 	add	x0, x22, x0, sxtw 1
 	ldrh	w0, [x0, 16]
 	madd	w0, w0, w1, w21
 	and	w1, w26, 1
 	add	w0, w0, w1
-	b	.L3398
-.L3341:
+	b	.L3435
+.L3378:
 	cmp	w23, 1
-	bne	.L3343
+	bne	.L3380
 	mov	w2, 9
-.L3397:
+.L3434:
 	strb	w2, [x3, 60]
-.L3342:
+.L3379:
 	mov	w2, w1
 	add	x1, x0, 24
 	bl	sblk_xlc_prog_pages
-.L3345:
-	adrp	x1, .LANCHOR73
+.L3382:
+	adrp	x1, .LANCHOR75
 	ldrb	w3, [x22, 9]
-	ldrb	w1, [x1, #:lo12:.LANCHOR73]
+	ldrb	w1, [x1, #:lo12:.LANCHOR75]
 	and	w0, w3, 65535
-	cbz	w1, .L3350
+	cbz	w1, .L3387
 	add	w0, w0, w0, lsl 1
-.L3351:
-	adrp	x1, .LANCHOR100
+.L3388:
+	adrp	x1, .LANCHOR102
 	add	x24, x24, :lo12:.LANCHOR63
-	ldr	x1, [x1, #:lo12:.LANCHOR100]
+	ldr	x1, [x1, #:lo12:.LANCHOR102]
 	ldr	w2, [x1, 52]
 	add	w2, w2, w0
 	str	w2, [x1, 52]
 	ldrh	w1, [x24, 314]
 	add	w0, w0, w1
-	adrp	x1, .LANCHOR75
+	adrp	x1, .LANCHOR77
 	and	w0, w0, 65535
 	strh	w0, [x24, 314]
-	ldrh	w1, [x1, #:lo12:.LANCHOR75]
+	ldrh	w1, [x1, #:lo12:.LANCHOR77]
 	mul	w1, w1, w3
 	cmp	w0, w1
-	blt	.L3352
+	blt	.L3389
 	ldr	x0, [x29, 136]
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	strh	wzr, [x0, 86]
-.L3352:
+.L3389:
 	bl	gc_write_completed
-	b	.L3307
-.L3343:
+	b	.L3344
+.L3380:
 	cmp	w23, 2
-	bne	.L3344
+	bne	.L3381
 	mov	w2, 13
-	b	.L3397
-.L3340:
-	adrp	x2, .LANCHOR70
-	ldrb	w2, [x2, #:lo12:.LANCHOR70]
-	cbz	w2, .L3355
-	adrp	x2, .LANCHOR71
-	ldrb	w2, [x2, #:lo12:.LANCHOR71]
-	cbnz	w2, .L3347
-.L3346:
+	b	.L3434
+.L3377:
+	adrp	x2, .LANCHOR72
+	ldrb	w2, [x2, #:lo12:.LANCHOR72]
+	cbz	w2, .L3392
+	adrp	x2, .LANCHOR73
+	ldrb	w2, [x2, #:lo12:.LANCHOR73]
+	cbnz	w2, .L3384
+.L3383:
 	sub	w1, w3, #1
-.L3348:
+.L3385:
 	cmp	w2, w1
-	blt	.L3349
+	blt	.L3386
 	ldr	x0, [x0, w1, sxtw 3]
 	mov	w1, -1
 	strb	w1, [x0]
 	mov	w1, w3
 	ldr	x0, [x29, 160]
 	bl	sblk_prog_page
-	b	.L3345
-.L3355:
+	b	.L3382
+.L3392:
 	mov	w2, 0
-	b	.L3346
-.L3347:
+	b	.L3383
+.L3384:
 	bl	sblk_3d_mlc_prog_pages
-	b	.L3345
-.L3349:
+	b	.L3382
+.L3386:
 	ldr	x4, [x0, w2, sxtw 3]
 	add	w2, w2, 1
 	ldr	x5, [x0, w2, sxtw 3]
 	and	w2, w2, 65535
 	ldrb	w5, [x5, 1]
 	strb	w5, [x4]
-	b	.L3348
-.L3350:
-	adrp	x1, .LANCHOR70
-	ldrb	w2, [x1, #:lo12:.LANCHOR70]
+	b	.L3385
+.L3387:
+	adrp	x1, .LANCHOR72
+	ldrb	w2, [x1, #:lo12:.LANCHOR72]
 	mov	w1, w0
 	ubfiz	w0, w0, 1, 15
 	cmp	w2, 0
 	csel	w0, w0, w1, ne
-	b	.L3351
+	b	.L3388
 	.size	gc_do_copy_back, .-gc_do_copy_back
 	.section	.text.zftl_do_gc,"ax",@progbits
 	.align	2
@@ -21250,61 +21595,61 @@ gc_do_copy_back:
 	.type	zftl_do_gc, %function
 zftl_do_gc:
 	sub	sp, sp, #128
-	adrp	x1, .LANCHOR97
+	adrp	x1, .LANCHOR99
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x19, x20, [sp, 32]
 	adrp	x19, .LANCHOR150
 	stp	x21, x22, [sp, 48]
-	ldrh	w22, [x1, #:lo12:.LANCHOR97]
-	adrp	x1, .LANCHOR93
+	ldrh	w22, [x1, #:lo12:.LANCHOR99]
+	adrp	x1, .LANCHOR95
 	stp	x23, x24, [sp, 64]
 	adrp	x23, .LANCHOR10
-	ldrh	w21, [x1, #:lo12:.LANCHOR93]
+	ldrh	w21, [x1, #:lo12:.LANCHOR95]
 	stp	x25, x26, [sp, 80]
 	ldrb	w1, [x19, #:lo12:.LANCHOR150]
 	add	w21, w22, w21
 	stp	x27, x28, [sp, 96]
 	ldr	x20, [x23, #:lo12:.LANCHOR10]
 	cmp	w1, 6
-	bhi	.L3507
+	bhi	.L3544
 	mov	w25, w0
 	and	w21, w21, 65535
-	adrp	x0, .L3402
-	add	x0, x0, :lo12:.L3402
+	adrp	x0, .L3439
+	add	x0, x0, :lo12:.L3439
 	ldrh	w0, [x0,w1,uxtw #1]
-	adr	x1, .Lrtx3402
+	adr	x1, .Lrtx3439
 	add	x0, x1, w0, sxth #2
 	br	x0
-.Lrtx3402:
+.Lrtx3439:
 	.section	.rodata.zftl_do_gc,"a",@progbits
 	.align	0
 	.align	2
-.L3402:
-	.2byte	(.L3401 - .Lrtx3402) / 4
-	.2byte	(.L3403 - .Lrtx3402) / 4
-	.2byte	(.L3404 - .Lrtx3402) / 4
-	.2byte	(.L3405 - .Lrtx3402) / 4
-	.2byte	(.L3406 - .Lrtx3402) / 4
-	.2byte	(.L3407 - .Lrtx3402) / 4
-	.2byte	(.L3408 - .Lrtx3402) / 4
+.L3439:
+	.2byte	(.L3438 - .Lrtx3439) / 4
+	.2byte	(.L3440 - .Lrtx3439) / 4
+	.2byte	(.L3441 - .Lrtx3439) / 4
+	.2byte	(.L3442 - .Lrtx3439) / 4
+	.2byte	(.L3443 - .Lrtx3439) / 4
+	.2byte	(.L3444 - .Lrtx3439) / 4
+	.2byte	(.L3445 - .Lrtx3439) / 4
 	.section	.text.zftl_do_gc
-.L3407:
+.L3444:
 	adrp	x20, .LANCHOR63
 	add	x24, x20, :lo12:.LANCHOR63
 	mov	w22, 0
-.L3409:
+.L3446:
 	bl	gc_check_data_one_wl
-	cbz	w0, .L3503
+	cbz	w0, .L3540
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	add	x20, x20, :lo12:.LANCHOR63
 	strh	wzr, [x20, 56]
 	ldrh	w0, [x0, 80]
 	bl	ftl_free_sblk
-	adrp	x2, .LANCHOR100
+	adrp	x2, .LANCHOR102
 	ldr	x1, [x23, #:lo12:.LANCHOR10]
 	mov	w0, -1
-	ldr	x2, [x2, #:lo12:.LANCHOR100]
+	ldr	x2, [x2, #:lo12:.LANCHOR102]
 	strh	w0, [x1, 80]
 	strh	w0, [x2, 126]
 	strh	w0, [x1, 130]
@@ -21312,44 +21657,44 @@ zftl_do_gc:
 	bl	buf_free
 	strb	wzr, [x19, #:lo12:.LANCHOR150]
 	str	xzr, [x20, 8]
-	b	.L3574
-.L3401:
-	adrp	x0, .LANCHOR95
-	adrp	x27, .LANCHOR88
+	b	.L3611
+.L3438:
+	adrp	x0, .LANCHOR97
+	adrp	x27, .LANCHOR90
 	ldrh	w2, [x20, 80]
-	ldrh	w0, [x0, #:lo12:.LANCHOR95]
-	ldrh	w24, [x27, #:lo12:.LANCHOR88]
+	ldrh	w0, [x0, #:lo12:.LANCHOR97]
+	ldrh	w24, [x27, #:lo12:.LANCHOR90]
 	add	w22, w22, w0
-	adrp	x0, .LANCHOR86
+	adrp	x0, .LANCHOR88
 	str	x0, [x29, 104]
 	and	w22, w22, 65535
-	ldrh	w1, [x0, #:lo12:.LANCHOR86]
+	ldrh	w1, [x0, #:lo12:.LANCHOR88]
 	add	w24, w24, w1
 	mov	w1, 65535
 	and	w24, w24, 65535
 	cmp	w2, w1
-	beq	.L3410
-	cbnz	w25, .L3411
-	adrp	x0, .LANCHOR77
-	ldrh	w0, [x0, #:lo12:.LANCHOR77]
+	beq	.L3447
+	cbnz	w25, .L3448
+	adrp	x0, .LANCHOR79
+	ldrh	w0, [x0, #:lo12:.LANCHOR79]
 	cmp	w21, w0, lsl 1
-	blt	.L3411
-.L3507:
+	blt	.L3448
+.L3544:
 	mov	w20, 16
-	b	.L3399
-.L3411:
-	adrp	x5, .LANCHOR85
+	b	.L3436
+.L3448:
+	adrp	x5, .LANCHOR87
 	mov	w1, 5
-	adrp	x25, .LANCHOR74
-	ldrh	w0, [x5, #:lo12:.LANCHOR85]
+	adrp	x25, .LANCHOR76
+	ldrh	w0, [x5, #:lo12:.LANCHOR87]
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	strh	w0, [x5, #:lo12:.LANCHOR85]
+	strh	w0, [x5, #:lo12:.LANCHOR87]
 	bl	zftl_get_gc_node
 	and	w3, w0, 65535
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L3412
+	beq	.L3449
 	adrp	x4, .LANCHOR9
 	ubfiz	x3, x3, 1, 16
 	adrp	x1, .LANCHOR151
@@ -21359,138 +21704,138 @@ zftl_do_gc:
 	add	w2, w2, 1
 	str	w2, [x1, #:lo12:.LANCHOR151]
 	ldrh	w3, [x4, x3]
-	adrp	x4, .LANCHOR83
-	ldrh	w4, [x4, #:lo12:.LANCHOR83]
+	adrp	x4, .LANCHOR85
+	ldrh	w4, [x4, #:lo12:.LANCHOR85]
 	cmp	w4, w3
-	bcs	.L3413
+	bcs	.L3450
 	adrp	x1, .LANCHOR6
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	cmp	w2, w1, lsr 4
-	bls	.L3412
-	adrp	x1, .LANCHOR89
-	ldrh	w1, [x1, #:lo12:.LANCHOR89]
+	bls	.L3449
+	adrp	x1, .LANCHOR91
+	ldrh	w1, [x1, #:lo12:.LANCHOR91]
 	cmp	w1, w3
-	bls	.L3412
-.L3413:
-	ldrb	w2, [x25, #:lo12:.LANCHOR74]
+	bls	.L3449
+.L3450:
+	ldrb	w2, [x25, #:lo12:.LANCHOR76]
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L3414
+	cbz	w0, .L3451
 	mov	w0, 1
 	str	wzr, [x26, #:lo12:.LANCHOR151]
 	strb	w0, [x19, #:lo12:.LANCHOR150]
-	b	.L3507
-.L3412:
-	strh	wzr, [x5, #:lo12:.LANCHOR85]
-.L3414:
+	b	.L3544
+.L3449:
+	strh	wzr, [x5, #:lo12:.LANCHOR87]
+.L3451:
 	cmp	w22, 15
-	bls	.L3509
-	adrp	x0, .LANCHOR90
-	ldrh	w1, [x0, #:lo12:.LANCHOR90]
-	adrp	x0, .LANCHOR91
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	bls	.L3546
+	adrp	x0, .LANCHOR92
+	ldrh	w1, [x0, #:lo12:.LANCHOR92]
+	adrp	x0, .LANCHOR93
+	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w1, w0
-	bhi	.L3509
+	bhi	.L3546
 	cmp	w24, 0
 	cset	w24, eq
 	add	w24, w24, 1
-.L3415:
+.L3452:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3416
+	tbz	x0, 8, .L3453
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	mov	w4, w22
-	ldrb	w2, [x25, #:lo12:.LANCHOR74]
+	ldrb	w2, [x25, #:lo12:.LANCHOR76]
 	mov	w3, w21
-	mov	w1, 1935
+	mov	w1, 1983
 	ldrh	w7, [x0, 122]
 	ldrh	w6, [x0, 120]
 	ldrh	w5, [x0, 124]
 	ldrh	w0, [x20, 80]
 	str	w0, [sp]
-	adrp	x0, .LC228
-	add	x0, x0, :lo12:.LC228
+	adrp	x0, .LC236
+	add	x0, x0, :lo12:.LC236
 	bl	printf
-.L3416:
-	ldrb	w0, [x25, #:lo12:.LANCHOR74]
+.L3453:
+	ldrb	w0, [x25, #:lo12:.LANCHOR76]
 	mov	w2, 1
 	mov	w1, w24
 	bl	gc_search_src_blk
 	cmp	w0, 0
-	ble	.L3417
-.L3418:
+	ble	.L3454
+.L3455:
 	mov	w0, 1
-.L3576:
+.L3613:
 	strb	w0, [x19, #:lo12:.LANCHOR150]
-	b	.L3507
-.L3509:
+	b	.L3544
+.L3546:
 	mov	w24, 2
-	b	.L3415
-.L3417:
-	ldrb	w0, [x25, #:lo12:.LANCHOR74]
+	b	.L3452
+.L3454:
+	ldrb	w0, [x25, #:lo12:.LANCHOR76]
 	mov	w2, 1
 	mov	w1, 3
 	bl	gc_search_src_blk
 	cmp	w0, 0
-	bgt	.L3418
-	b	.L3507
-.L3410:
+	bgt	.L3455
+	b	.L3544
+.L3447:
 	adrp	x28, .LANCHOR14
 	ldr	w0, [x28, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3420
-	adrp	x0, .LANCHOR74
+	tbz	x0, 8, .L3457
+	adrp	x0, .LANCHOR76
 	ldrh	w7, [x20, 122]
 	ldrh	w6, [x20, 120]
 	mov	w4, w22
 	ldrh	w5, [x20, 124]
 	mov	w3, w21
-	ldrb	w2, [x0, #:lo12:.LANCHOR74]
-	mov	w1, 1947
+	ldrb	w2, [x0, #:lo12:.LANCHOR76]
+	mov	w1, 1995
 	str	w25, [sp]
-	adrp	x0, .LC228
-	add	x0, x0, :lo12:.LC228
+	adrp	x0, .LC236
+	add	x0, x0, :lo12:.LC236
 	bl	printf
-.L3420:
+.L3457:
 	cmp	w25, 1
-	bne	.L3421
+	bne	.L3458
 	bl	gc_scan_static_data
-	adrp	x26, .LANCHOR74
+	adrp	x26, .LANCHOR76
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	ldrh	w0, [x0, 122]
-	cbz	w0, .L3422
-.L3423:
+	cbz	w0, .L3459
+.L3460:
 	mov	w0, 1
-	strb	w0, [x26, #:lo12:.LANCHOR74]
-	b	.L3576
-.L3422:
+	strb	w0, [x26, #:lo12:.LANCHOR76]
+	b	.L3613
+.L3459:
 	bl	gc_static_wearleveling
 	mov	w20, w0
-	cbnz	w0, .L3423
-	cbnz	w22, .L3424
-.L3428:
+	cbnz	w0, .L3460
+	cbnz	w22, .L3461
+.L3465:
 	mov	w20, 16
-.L3425:
+.L3462:
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
-	adrp	x3, .LANCHOR74
+	adrp	x3, .LANCHOR76
 	mov	w1, 1
 	mov	x23, x3
-	strb	w1, [x3, #:lo12:.LANCHOR74]
+	strb	w1, [x3, #:lo12:.LANCHOR76]
 	ldrh	w5, [x0, 124]
-	cbz	w5, .L3433
+	cbz	w5, .L3470
 	strb	w1, [x19, #:lo12:.LANCHOR150]
 	ldr	w1, [x28, #:lo12:.LANCHOR14]
-	strb	wzr, [x3, #:lo12:.LANCHOR74]
-	tbz	x1, 8, .L3399
+	strb	wzr, [x3, #:lo12:.LANCHOR76]
+	tbz	x1, 8, .L3436
 	ldrh	w7, [x0, 122]
 	mov	w4, w22
 	ldrh	w6, [x0, 120]
 	mov	w3, w21
-	adrp	x0, .LC229
+	adrp	x0, .LC237
 	mov	w2, 0
-	mov	w1, 2037
-	add	x0, x0, :lo12:.LC229
+	mov	w1, 2085
+	add	x0, x0, :lo12:.LC237
 	bl	printf
-.L3399:
+.L3436:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
@@ -21500,132 +21845,132 @@ zftl_do_gc:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 128
 	ret
-.L3424:
+.L3461:
 	cmp	w21, w24
-	adrp	x1, .LANCHOR90
-	adrp	x2, .LANCHOR87
-	bcs	.L3426
-	ldrh	w0, [x2, #:lo12:.LANCHOR87]
+	adrp	x1, .LANCHOR92
+	adrp	x2, .LANCHOR89
+	bcs	.L3463
+	ldrh	w0, [x2, #:lo12:.LANCHOR89]
 	cmp	w0, w21
-	bhi	.L3427
-.L3426:
-	ldrh	w2, [x2, #:lo12:.LANCHOR87]
+	bhi	.L3464
+.L3463:
+	ldrh	w2, [x2, #:lo12:.LANCHOR89]
 	add	w0, w21, w24
 	cmp	w0, w2
-	blt	.L3427
-	adrp	x0, .LANCHOR91
-	ldrh	w2, [x1, #:lo12:.LANCHOR90]
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	blt	.L3464
+	adrp	x0, .LANCHOR93
+	ldrh	w2, [x1, #:lo12:.LANCHOR92]
+	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w2, w0
-	bcc	.L3428
-.L3427:
+	bcc	.L3465
+.L3464:
 	adrp	x5, .LANCHOR151
 	adrp	x2, .LANCHOR6
 	mov	w6, 1
-	strb	w6, [x26, #:lo12:.LANCHOR74]
+	strb	w6, [x26, #:lo12:.LANCHOR76]
 	ldr	w0, [x5, #:lo12:.LANCHOR151]
 	ldrh	w2, [x2, #:lo12:.LANCHOR6]
 	add	w0, w0, 1
 	str	w0, [x5, #:lo12:.LANCHOR151]
 	cmp	w0, w2, lsr 5
-	bls	.L3429
-	ldrh	w0, [x1, #:lo12:.LANCHOR90]
+	bls	.L3466
+	ldrh	w0, [x1, #:lo12:.LANCHOR92]
 	cmp	w0, w22
-	bls	.L3429
+	bls	.L3466
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3428
+	beq	.L3465
 	adrp	x1, .LANCHOR9
 	ubfiz	x0, x0, 1, 16
-	adrp	x2, .LANCHOR76
+	adrp	x2, .LANCHOR78
 	ldr	x1, [x1, #:lo12:.LANCHOR9]
-	ldrb	w2, [x2, #:lo12:.LANCHOR76]
+	ldrb	w2, [x2, #:lo12:.LANCHOR78]
 	ldrh	w1, [x1, x0]
-	adrp	x0, .LANCHOR83
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR85
+	ldrh	w0, [x0, #:lo12:.LANCHOR85]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	bgt	.L3428
+	bgt	.L3465
 	mov	w0, w6
 	str	wzr, [x5, #:lo12:.LANCHOR151]
 	mov	w2, 4
 	mov	w1, 2
-.L3564:
+.L3601:
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-	cbz	w0, .L3428
-	b	.L3418
-.L3429:
-	adrp	x0, .LANCHOR91
-	ldrh	w1, [x1, #:lo12:.LANCHOR90]
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	cbz	w0, .L3465
+	b	.L3455
+.L3466:
+	adrp	x0, .LANCHOR93
+	ldrh	w1, [x1, #:lo12:.LANCHOR92]
+	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w1, w0
-	bcc	.L3431
+	bcc	.L3468
 	mov	w2, 1
 	mov	w1, 2
 	mov	w0, w2
-	b	.L3564
-.L3431:
-	ldrh	w0, [x27, #:lo12:.LANCHOR88]
-	cbnz	w0, .L3432
+	b	.L3601
+.L3468:
+	ldrh	w0, [x27, #:lo12:.LANCHOR90]
+	cbnz	w0, .L3469
 	ldr	x0, [x29, 104]
-	ldrh	w0, [x0, #:lo12:.LANCHOR86]
+	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w0, 8
-	bls	.L3425
-.L3432:
+	bls	.L3462
+.L3469:
 	mov	w1, 1
 	mov	w2, 4
 	mov	w0, w1
-	b	.L3564
-.L3421:
-	adrp	x0, .LANCHOR77
-	ldrh	w0, [x0, #:lo12:.LANCHOR77]
+	b	.L3601
+.L3458:
+	adrp	x0, .LANCHOR79
+	ldrh	w0, [x0, #:lo12:.LANCHOR79]
 	cmp	w0, w21
-	bcc	.L3507
-	b	.L3428
-.L3433:
-	adrp	x2, .LANCHOR77
+	bcc	.L3544
+	b	.L3465
+.L3470:
+	adrp	x2, .LANCHOR79
 	mov	x26, x2
-	ldrh	w4, [x2, #:lo12:.LANCHOR77]
+	ldrh	w4, [x2, #:lo12:.LANCHOR79]
 	cmp	w21, w4
-	bcs	.L3434
-	cbz	w22, .L3435
+	bcs	.L3471
+	cbz	w22, .L3472
 	cmp	w22, 16
-	bls	.L3436
-	adrp	x0, .LANCHOR90
-	ldrh	w2, [x0, #:lo12:.LANCHOR90]
-	adrp	x0, .LANCHOR91
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	bls	.L3473
+	adrp	x0, .LANCHOR92
+	ldrh	w2, [x0, #:lo12:.LANCHOR92]
+	adrp	x0, .LANCHOR93
+	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w2, w0
-	bhi	.L3436
+	bhi	.L3473
 	str	x3, [x29, 104]
 	mov	w2, 4
 	mov	w0, w1
 	bl	gc_search_src_blk
 	ldr	x3, [x29, 104]
 	tst	w0, 65535
-	bne	.L3437
-	ldrb	w0, [x3, #:lo12:.LANCHOR74]
+	bne	.L3474
+	ldrb	w0, [x3, #:lo12:.LANCHOR76]
 	mov	w2, 4
 	mov	w1, 3
-.L3570:
+.L3607:
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-.L3438:
-	cbnz	w0, .L3440
-	b	.L3399
-.L3437:
+.L3475:
+	cbnz	w0, .L3477
+	b	.L3436
+.L3474:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	and	w3, w0, 65535
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L3440
+	beq	.L3477
 	adrp	x4, .LANCHOR9
 	ubfiz	x3, x3, 1, 16
 	adrp	x1, .LANCHOR151
@@ -21635,86 +21980,86 @@ zftl_do_gc:
 	add	w2, w2, 1
 	str	w2, [x1, #:lo12:.LANCHOR151]
 	ldrh	w3, [x4, x3]
-	adrp	x4, .LANCHOR83
-	ldrh	w4, [x4, #:lo12:.LANCHOR83]
+	adrp	x4, .LANCHOR85
+	ldrh	w4, [x4, #:lo12:.LANCHOR85]
 	cmp	w4, w3
-	bcs	.L3441
+	bcs	.L3478
 	adrp	x1, .LANCHOR6
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	cmp	w2, w1, lsr 4
-	bls	.L3440
-	adrp	x1, .LANCHOR89
-	ldrh	w1, [x1, #:lo12:.LANCHOR89]
+	bls	.L3477
+	adrp	x1, .LANCHOR91
+	ldrh	w1, [x1, #:lo12:.LANCHOR91]
 	cmp	w1, w3
-	bls	.L3440
-.L3441:
-	ldrb	w2, [x23, #:lo12:.LANCHOR74]
+	bls	.L3477
+.L3478:
+	ldrb	w2, [x23, #:lo12:.LANCHOR76]
 	mov	w1, 0
 	bl	gc_add_sblk
 	str	wzr, [x21, #:lo12:.LANCHOR151]
-	adrp	x0, .LANCHOR118
+	adrp	x0, .LANCHOR114
 	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR118]
-.L3440:
+	str	w1, [x0, #:lo12:.LANCHOR114]
+.L3477:
 	mov	w0, 1
 	strb	w0, [x19, #:lo12:.LANCHOR150]
-	b	.L3399
-.L3436:
+	b	.L3436
+.L3473:
 	mov	w2, 1
 	mov	w0, w2
 	mov	w1, 2
-.L3573:
+.L3610:
 	bl	gc_search_src_blk
 	tst	w0, 65535
-	bne	.L3440
+	bne	.L3477
 	mov	w2, 2
-	b	.L3566
-.L3435:
+	b	.L3603
+.L3472:
 	ldr	w1, [x28, #:lo12:.LANCHOR14]
-	strb	wzr, [x3, #:lo12:.LANCHOR74]
-	tbz	x1, 8, .L3443
+	strb	wzr, [x3, #:lo12:.LANCHOR76]
+	tbz	x1, 8, .L3480
 	ldrh	w7, [x0, 122]
 	mov	w5, 0
 	ldrh	w6, [x0, 120]
 	mov	w4, 0
-	adrp	x0, .LC229
+	adrp	x0, .LC237
 	mov	w3, w21
 	mov	w2, 0
-	mov	w1, 2067
-	add	x0, x0, :lo12:.LC229
+	mov	w1, 2115
+	add	x0, x0, :lo12:.LC237
 	bl	printf
-.L3443:
+.L3480:
 	cmp	w21, 16
-	bls	.L3444
+	bls	.L3481
 	mov	w2, 4
-.L3566:
+.L3603:
 	mov	w1, 3
-	ldrb	w0, [x23, #:lo12:.LANCHOR74]
-	b	.L3570
-.L3444:
+	ldrb	w0, [x23, #:lo12:.LANCHOR76]
+	b	.L3607
+.L3481:
 	mov	w2, 1
-	ldrb	w0, [x23, #:lo12:.LANCHOR74]
+	ldrb	w0, [x23, #:lo12:.LANCHOR76]
 	mov	w1, w2
-	b	.L3573
-.L3434:
+	b	.L3610
+.L3471:
 	cmp	w25, 1
-	bne	.L3399
+	bne	.L3436
 	cmp	w21, w4, lsl 1
-	bge	.L3445
+	bge	.L3482
 	cmp	w24, w22, lsr 1
-	bcs	.L3446
-	adrp	x0, .LANCHOR90
-	ldrh	w1, [x0, #:lo12:.LANCHOR90]
-	adrp	x0, .LANCHOR91
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	bcs	.L3483
+	adrp	x0, .LANCHOR92
+	ldrh	w1, [x0, #:lo12:.LANCHOR92]
+	adrp	x0, .LANCHOR93
+	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w1, w0
-	bcs	.L3446
-	adrp	x0, .LANCHOR87
-	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	bcs	.L3483
+	adrp	x0, .LANCHOR89
+	ldrh	w0, [x0, #:lo12:.LANCHOR89]
 	lsr	w0, w0, 2
-	strh	w0, [x2, #:lo12:.LANCHOR77]
-	b	.L3399
-.L3446:
+	strh	w0, [x2, #:lo12:.LANCHOR79]
+	b	.L3436
+.L3483:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
@@ -21722,38 +22067,38 @@ zftl_do_gc:
 	mov	w1, 65535
 	mov	w28, w25
 	cmp	w25, w1
-	bne	.L3447
-.L3452:
+	bne	.L3484
+.L3489:
 	cmp	w22, 1
-	bhi	.L3448
-.L3449:
+	bhi	.L3485
+.L3486:
 	cmp	w21, w24
-	adrp	x21, .LANCHOR87
-	bcs	.L3456
-	strb	wzr, [x23, #:lo12:.LANCHOR74]
+	adrp	x21, .LANCHOR89
+	bcs	.L3493
+	strb	wzr, [x23, #:lo12:.LANCHOR76]
 	mov	w0, 4
 	bl	zftl_get_gc_node.part.9
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3456
+	beq	.L3493
 	adrp	x1, .LANCHOR9
 	ubfiz	x0, x0, 1, 16
-	adrp	x2, .LANCHOR76
+	adrp	x2, .LANCHOR78
 	ldr	x1, [x1, #:lo12:.LANCHOR9]
-	ldrb	w2, [x2, #:lo12:.LANCHOR76]
+	ldrb	w2, [x2, #:lo12:.LANCHOR78]
 	ldrh	w1, [x1, x0]
-	adrp	x0, .LANCHOR83
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR85
+	ldrh	w0, [x0, #:lo12:.LANCHOR85]
 	mul	w0, w0, w2
 	cmp	w1, w0, lsr 1
-	ble	.L3458
-.L3456:
-	ldrh	w0, [x21, #:lo12:.LANCHOR87]
+	ble	.L3495
+.L3493:
+	ldrh	w0, [x21, #:lo12:.LANCHOR89]
 	lsr	w0, w0, 2
-	strh	w0, [x26, #:lo12:.LANCHOR77]
-	b	.L3399
-.L3447:
+	strh	w0, [x26, #:lo12:.LANCHOR79]
+	b	.L3436
+.L3484:
 	adrp	x2, .LANCHOR151
 	adrp	x3, .LANCHOR6
 	uxtw	x25, w25
@@ -21763,181 +22108,181 @@ zftl_do_gc:
 	str	w1, [x2, #:lo12:.LANCHOR151]
 	cmp	w1, w3, lsr 4
 	adrp	x3, .LANCHOR9
-	bls	.L3450
+	bls	.L3487
 	ldr	x1, [x3, #:lo12:.LANCHOR9]
 	str	wzr, [x2, #:lo12:.LANCHOR151]
 	ldrh	w2, [x1, x25, lsl 1]
-	adrp	x1, .LANCHOR89
-	ldrh	w1, [x1, #:lo12:.LANCHOR89]
+	adrp	x1, .LANCHOR91
+	ldrh	w1, [x1, #:lo12:.LANCHOR91]
 	cmp	w2, w1
-	bcs	.L3450
+	bcs	.L3487
 	str	x3, [x29, 96]
 	mov	w2, 1
 	mov	w1, 0
 	bl	gc_add_sblk
 	ldr	x3, [x29, 96]
-	cbnz	w0, .L3440
-.L3450:
+	cbnz	w0, .L3477
+.L3487:
 	ldr	x0, [x3, #:lo12:.LANCHOR9]
 	ldrh	w1, [x0, x25, lsl 1]
-	adrp	x0, .LANCHOR83
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR85
+	ldrh	w0, [x0, #:lo12:.LANCHOR85]
 	cmp	w1, w0, lsr 1
-	bhi	.L3451
+	bhi	.L3488
 	mov	w2, 0
 	mov	w1, 1
 	mov	w0, w28
 	bl	gc_add_sblk
-	b	.L3440
-.L3451:
+	b	.L3477
+.L3488:
 	ldr	x2, [x29, 104]
-	ldrh	w0, [x27, #:lo12:.LANCHOR88]
-	ldrh	w2, [x2, #:lo12:.LANCHOR86]
+	ldrh	w0, [x27, #:lo12:.LANCHOR90]
+	ldrh	w2, [x2, #:lo12:.LANCHOR88]
 	add	w0, w0, w2
-	adrp	x2, .LANCHOR87
-	ldrh	w2, [x2, #:lo12:.LANCHOR87]
+	adrp	x2, .LANCHOR89
+	ldrh	w2, [x2, #:lo12:.LANCHOR89]
 	cmp	w0, w2, lsl 1
-	ble	.L3452
-	adrp	x0, .LANCHOR89
-	ldrh	w0, [x0, #:lo12:.LANCHOR89]
+	ble	.L3489
+	adrp	x0, .LANCHOR91
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	cmp	w0, w1
-	bcc	.L3449
-	b	.L3452
-.L3448:
+	bcc	.L3486
+	b	.L3489
+.L3485:
 	mov	w1, 1
-	strb	w1, [x23, #:lo12:.LANCHOR74]
+	strb	w1, [x23, #:lo12:.LANCHOR76]
 	cmp	w22, 16
-	bls	.L3453
-	adrp	x0, .LANCHOR90
-	ldrh	w2, [x0, #:lo12:.LANCHOR90]
-	adrp	x0, .LANCHOR91
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	bls	.L3490
+	adrp	x0, .LANCHOR92
+	ldrh	w2, [x0, #:lo12:.LANCHOR92]
+	adrp	x0, .LANCHOR93
+	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w2, w0
-	bhi	.L3453
+	bhi	.L3490
 	mov	w2, 4
 	mov	w0, w1
 	bl	gc_search_src_blk
 	ands	w0, w0, 65535
-	bne	.L3454
+	bne	.L3491
 	mov	w2, 4
-.L3565:
-	ldrb	w0, [x23, #:lo12:.LANCHOR74]
+.L3602:
+	ldrb	w0, [x23, #:lo12:.LANCHOR76]
 	mov	w1, 3
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-.L3454:
-	adrp	x1, .LANCHOR87
+.L3491:
+	adrp	x1, .LANCHOR89
 	cmp	w21, w24, lsr 1
-	ldrh	w1, [x1, #:lo12:.LANCHOR87]
-	bls	.L3568
+	ldrh	w1, [x1, #:lo12:.LANCHOR89]
+	bls	.L3605
 	lsr	w1, w1, 2
-.L3569:
-	strh	w1, [x26, #:lo12:.LANCHOR77]
-	b	.L3438
-.L3453:
+.L3606:
+	strh	w1, [x26, #:lo12:.LANCHOR79]
+	b	.L3475
+.L3490:
 	mov	w2, 1
 	mov	w1, 2
 	mov	w0, w2
 	bl	gc_search_src_blk
 	ands	w0, w0, 65535
-	bne	.L3454
+	bne	.L3491
 	mov	w2, 2
-	b	.L3565
-.L3458:
+	b	.L3602
+.L3495:
 	mov	w1, 3
 	mov	w2, 4
 	mov	w0, 0
 	bl	gc_search_src_blk
-	ldrh	w1, [x21, #:lo12:.LANCHOR87]
+	ldrh	w1, [x21, #:lo12:.LANCHOR89]
 	and	w0, w0, 65535
-.L3568:
+.L3605:
 	lsr	w1, w1, 1
-	b	.L3569
-.L3445:
-	adrp	x0, .LANCHOR87
+	b	.L3606
+.L3482:
+	adrp	x0, .LANCHOR89
 	mov	w20, 0
-	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	ldrh	w0, [x0, #:lo12:.LANCHOR89]
 	lsr	w0, w0, 2
-	strh	w0, [x2, #:lo12:.LANCHOR77]
-	b	.L3399
-.L3403:
+	strh	w0, [x2, #:lo12:.LANCHOR79]
+	b	.L3436
+.L3440:
 	adrp	x7, .LANCHOR63
 	mov	w0, 65535
 	ldrh	w1, [x7, #:lo12:.LANCHOR63]
 	cmp	w1, w0
-	bne	.L3459
+	bne	.L3496
 	bl	gc_get_src_blk
 	strh	w0, [x7, #:lo12:.LANCHOR63]
-.L3459:
+.L3496:
 	ldrh	w3, [x7, #:lo12:.LANCHOR63]
 	mov	w0, 65535
 	add	x1, x7, :lo12:.LANCHOR63
 	cmp	w3, w0
-	beq	.L3575
+	beq	.L3612
 	adrp	x0, .LANCHOR7
 	ldrh	w5, [x1, 56]
 	uxtw	x4, w3
 	ldr	x2, [x0, #:lo12:.LANCHOR7]
 	add	x2, x2, x4, lsl 2
-	cbz	w5, .L3461
+	cbz	w5, .L3498
 	add	x1, x1, 58
 	mov	w0, 0
-.L3463:
+.L3500:
 	ldrh	w6, [x1], 2
 	cmp	w6, w3
-	bne	.L3462
-.L3467:
+	bne	.L3499
+.L3504:
 	adrp	x0, .LANCHOR63
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR63]
-	b	.L3507
-.L3462:
+	b	.L3544
+.L3499:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w5, w0
-	bne	.L3463
-.L3461:
+	bne	.L3500
+.L3498:
 	ldrb	w0, [x2, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L3464
+	beq	.L3501
 	tst	w0, 192
-	bne	.L3465
-.L3464:
+	bne	.L3502
+.L3501:
 	adrp	x0, .LANCHOR9
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, x4, lsl 1]
-	cbz	w0, .L3467
-	mov	w2, 2300
+	cbz	w0, .L3504
+	mov	w2, 2348
 	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3467
-.L3465:
+	b	.L3504
+.L3502:
 	mov	w0, 2
-	b	.L3576
-.L3404:
+	b	.L3613
+.L3441:
 	bl	gc_scan_src_blk
 	cmn	w0, #1
-	bne	.L3468
+	bne	.L3505
 	mov	w0, 3
-	b	.L3576
-.L3468:
+	b	.L3613
+.L3505:
 	adrp	x20, .LANCHOR63
 	mov	w2, 65535
 	add	x0, x20, :lo12:.LANCHOR63
 	ldrh	w1, [x20, #:lo12:.LANCHOR63]
 	cmp	w1, w2
-	beq	.L3418
+	beq	.L3455
 	ldrh	w2, [x0, 24]
-	cbz	w2, .L3469
+	cbz	w2, .L3506
 	mov	w1, 4
 	strh	wzr, [x0, 26]
 	strb	w1, [x19, #:lo12:.LANCHOR150]
-	b	.L3507
-.L3469:
+	b	.L3544
+.L3506:
 	mov	w0, 1
 	strb	w0, [x19, #:lo12:.LANCHOR150]
 	adrp	x0, .LANCHOR9
@@ -21945,14 +22290,14 @@ zftl_do_gc:
 	mov	x19, x0
 	ldr	x2, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L3470
+	cbz	w1, .L3507
 	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
-	mov	w2, 2328
+	mov	w2, 2376
 	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3470:
+.L3507:
 	ldrh	w0, [x20, #:lo12:.LANCHOR63]
 	add	x21, x20, :lo12:.LANCHOR63
 	bl	ftl_free_sblk
@@ -21963,70 +22308,70 @@ zftl_do_gc:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w0, 8
-	bhi	.L3471
+	bhi	.L3508
 	strh	w0, [x21, 30]
-	b	.L3467
-.L3471:
+	b	.L3504
+.L3508:
 	strh	wzr, [x21, 30]
 	bl	ftl_flush
 	bl	pm_flush
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L3467
-.L3405:
+	b	.L3504
+.L3442:
 	adrp	x20, .LANCHOR63
-	adrp	x23, .LANCHOR83
+	adrp	x23, .LANCHOR85
 	add	x22, x20, :lo12:.LANCHOR63
-	add	x23, x23, :lo12:.LANCHOR83
-.L3544:
+	add	x23, x23, :lo12:.LANCHOR85
+.L3581:
 	bl	gc_scan_src_blk_one_page
 	ldrh	w1, [x22, 2]
 	ldrh	w0, [x23]
 	cmp	w1, w0
-	bcs	.L3473
+	bcs	.L3510
 	cmp	w21, 7
-	bls	.L3544
-	b	.L3507
-.L3473:
+	bls	.L3581
+	b	.L3544
+.L3510:
 	ldrh	w3, [x22, 24]
 	adrp	x0, .LANCHOR14
-	cbz	w3, .L3474
+	cbz	w3, .L3511
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	mov	w1, 4
 	strh	wzr, [x22, 26]
 	strb	w1, [x19, #:lo12:.LANCHOR150]
 	adrp	x19, .LANCHOR9
-	tbz	x0, 8, .L3475
+	tbz	x0, 8, .L3512
 	ldrh	w1, [x22]
 	ldr	x2, [x19, #:lo12:.LANCHOR9]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC230
-	add	x0, x0, :lo12:.LC230
+	adrp	x0, .LC238
+	add	x0, x0, :lo12:.LC238
 	bl	printf
-.L3475:
+.L3512:
 	ldrh	w2, [x20, #:lo12:.LANCHOR63]
 	add	x0, x20, :lo12:.LANCHOR63
 	ldr	x1, [x19, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, 24]
 	ldrh	w1, [x1, x2, lsl 1]
 	cmp	w1, w0
-	beq	.L3476
+	beq	.L3513
 	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
-	mov	w2, 2362
+	mov	w2, 2410
 	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3476:
+.L3513:
 	add	x0, x20, :lo12:.LANCHOR63
 	ldrh	w1, [x20, #:lo12:.LANCHOR63]
 	ldrh	w2, [x0, 24]
 	ldr	x0, [x19, #:lo12:.LANCHOR9]
 	strh	w2, [x0, x1, lsl 1]
-	b	.L3507
-.L3474:
+	b	.L3544
+.L3511:
 	adrp	x2, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	ldrh	w1, [x22]
@@ -22034,27 +22379,27 @@ zftl_do_gc:
 	mov	w2, 1
 	strb	w2, [x19, #:lo12:.LANCHOR150]
 	add	x21, x21, x1, uxth 2
-	tbz	x0, 8, .L3477
+	tbz	x0, 8, .L3514
 	ldrb	w2, [x21, 2]
-	adrp	x0, .LC231
-	add	x0, x0, :lo12:.LC231
+	adrp	x0, .LC239
+	add	x0, x0, :lo12:.LC239
 	ubfx	x2, x2, 5, 3
 	bl	printf
-.L3477:
+.L3514:
 	ldrb	w0, [x21, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L3478
+	beq	.L3515
 	tst	w0, 192
-	bne	.L3479
-.L3478:
+	bne	.L3516
+.L3515:
 	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
-	mov	w2, 2372
+	mov	w2, 2420
 	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3479:
+.L3516:
 	ldrh	w0, [x20, #:lo12:.LANCHOR63]
 	add	x19, x20, :lo12:.LANCHOR63
 	bl	ftl_free_sblk
@@ -22064,98 +22409,98 @@ zftl_do_gc:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w0, 8
-	bhi	.L3480
+	bhi	.L3517
 	strh	w0, [x19, 30]
-	b	.L3507
-.L3480:
+	b	.L3544
+.L3517:
 	strh	wzr, [x19, 30]
-.L3574:
+.L3611:
 	bl	flt_sys_flush
-	b	.L3507
-.L3406:
+	b	.L3544
+.L3443:
 	ldrh	w1, [x20, 80]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L3481
-	adrp	x0, .LANCHOR74
-	ldrb	w22, [x0, #:lo12:.LANCHOR74]
+	bne	.L3518
+	adrp	x0, .LANCHOR76
+	ldrb	w22, [x0, #:lo12:.LANCHOR76]
 	cmp	w22, 1
-	bne	.L3481
+	bne	.L3518
 	bl	ftl_flush
 	adrp	x0, .LANCHOR63
 	add	x1, x0, :lo12:.LANCHOR63
 	mov	x21, x0
 	ldrh	w1, [x1, 318]
-	cbz	w1, .L3482
+	cbz	w1, .L3519
 	mov	w0, w22
 	mov	w1, 5
-.L3571:
+.L3608:
 	bl	zftl_gc_get_free_sblk
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L3484
+	beq	.L3521
 	adrp	x0, .LANCHOR7
 	ldr	x22, [x0, #:lo12:.LANCHOR7]
 	add	x22, x22, x19, uxth 2
 	ldrb	w0, [x22, 2]
 	tst	w0, 224
-	beq	.L3485
+	beq	.L3522
 	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
-	mov	w2, 2401
+	mov	w2, 2449
 	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3485:
+.L3522:
 	ldrb	w0, [x22, 2]
 	mov	w1, 5
 	bfi	w0, w1, 5, 3
 	orr	w0, w0, 16
 	strb	w0, [x22, 2]
-.L3506:
+.L3543:
 	mov	w1, 1
 	mov	w0, w19
 	bl	ftl_erase_sblk
-	adrp	x22, .LANCHOR75
+	adrp	x22, .LANCHOR77
 	mov	w0, 5
 	strb	w0, [x20, 84]
 	add	x1, x20, 96
 	mov	w0, w19
 	bl	ftl_get_blk_list_in_sblk
 	and	w0, w0, 255
-	adrp	x1, .LANCHOR83
+	adrp	x1, .LANCHOR85
 	strb	w0, [x20, 89]
 	strh	w19, [x20, 80]
-	ldrh	w1, [x1, #:lo12:.LANCHOR83]
+	ldrh	w1, [x1, #:lo12:.LANCHOR85]
 	strh	wzr, [x20, 82]
 	strb	wzr, [x20, 85]
 	strh	wzr, [x20, 90]
 	mul	w0, w0, w1
-	ldrh	w2, [x22, #:lo12:.LANCHOR75]
+	ldrh	w2, [x22, #:lo12:.LANCHOR77]
 	strh	w0, [x20, 86]
-	adrp	x20, .LANCHOR76
+	adrp	x20, .LANCHOR78
 	mov	w1, 255
-	ldrb	w0, [x20, #:lo12:.LANCHOR76]
+	ldrb	w0, [x20, #:lo12:.LANCHOR78]
 	mul	w2, w2, w0
 	adrp	x0, .LANCHOR152
 	ldr	x0, [x0, #:lo12:.LANCHOR152]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	ldrb	w0, [x20, #:lo12:.LANCHOR76]
+	ldrb	w0, [x20, #:lo12:.LANCHOR78]
 	mov	w1, 255
-	ldrh	w2, [x22, #:lo12:.LANCHOR75]
+	ldrh	w2, [x22, #:lo12:.LANCHOR77]
 	mul	w2, w2, w0
 	adrp	x0, .LANCHOR153
 	ldr	x0, [x0, #:lo12:.LANCHOR153]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	ldrb	w0, [x20, #:lo12:.LANCHOR76]
+	ldrb	w0, [x20, #:lo12:.LANCHOR78]
 	mov	w1, 255
-	ldrh	w2, [x22, #:lo12:.LANCHOR75]
+	ldrh	w2, [x22, #:lo12:.LANCHOR77]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR72
-	ldr	x0, [x0, #:lo12:.LANCHOR72]
+	adrp	x0, .LANCHOR74
+	ldr	x0, [x0, #:lo12:.LANCHOR74]
 	bl	ftl_memset
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	mov	w1, -1
@@ -22164,9 +22509,9 @@ zftl_do_gc:
 	strh	w1, [x0, 130]
 	bl	pm_flush
 	bl	ftl_ext_info_flush
-	adrp	x0, .LANCHOR100
+	adrp	x0, .LANCHOR102
 	mov	w1, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR100]
+	ldr	x0, [x0, #:lo12:.LANCHOR102]
 	strh	w19, [x0, 126]
 	add	x0, x21, :lo12:.LANCHOR63
 	str	w1, [x0, 324]
@@ -22176,42 +22521,42 @@ zftl_do_gc:
 	strh	wzr, [x0, 320]
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L3507
-.L3482:
+	b	.L3544
+.L3519:
 	mov	w1, 5
 	mov	w0, 0
-	b	.L3571
-.L3481:
+	b	.L3608
+.L3518:
 	cmp	w25, 1
 	mov	w22, 4
 	csinc	w22, w22, wzr, eq
 	cmp	w21, 15
 	mov	w0, w22
 	add	w22, w22, 4
-	adrp	x25, .LANCHOR74
+	adrp	x25, .LANCHOR76
 	adrp	x24, .LANCHOR63
 	csel	w22, w22, w0, ls
-	add	x25, x25, :lo12:.LANCHOR74
+	add	x25, x25, :lo12:.LANCHOR76
 	add	x21, x24, :lo12:.LANCHOR63
 	add	x26, x20, 80
-.L3488:
+.L3525:
 	sub	w22, w22, #1
 	and	w22, w22, 255
 	cmp	w22, 255
-	beq	.L3507
+	beq	.L3544
 	bl	gc_do_copy_back
 	ldrb	w0, [x25]
-	cbnz	w0, .L3489
+	cbnz	w0, .L3526
 	adrp	x0, .LANCHOR52
 	ldrb	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, 3
-	bhi	.L3490
+	bhi	.L3527
 	bl	ftl_write_commit
-.L3490:
+.L3527:
 	ldrh	w1, [x21, 26]
 	ldrh	w0, [x21, 24]
 	cmp	w1, w0
-	bcc	.L3488
+	bcc	.L3525
 	mov	w0, 1
 	strb	w0, [x19, #:lo12:.LANCHOR150]
 	bl	ftl_write_commit
@@ -22221,73 +22566,73 @@ zftl_do_gc:
 	mov	x19, x0
 	ldr	x1, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x1, x2, lsl 1]
-	cbz	w1, .L3492
+	cbz	w1, .L3529
 	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
-	mov	w2, 2476
+	mov	w2, 2524
 	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3492:
+.L3529:
 	ldrh	w0, [x24, #:lo12:.LANCHOR63]
 	ldr	x2, [x19, #:lo12:.LANCHOR9]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L3493
+	cbnz	w1, .L3530
 	bl	ftl_free_sblk
-	b	.L3467
-.L3493:
+	b	.L3504
+.L3530:
 	mov	w2, 1
 	mov	w1, 0
 	bl	gc_add_sblk
-	b	.L3467
-.L3489:
+	b	.L3504
+.L3526:
 	ldrh	w0, [x21, 320]
-	cbz	w0, .L3494
+	cbz	w0, .L3531
 	strh	wzr, [x21, 320]
 	bl	sblk_wait_write_queue_completed
 	bl	gc_write_completed
 	ldr	w0, [x21, 324]
 	cmn	w0, #1
-	beq	.L3495
+	beq	.L3532
 	bl	ftl_mask_bad_block
-.L3495:
+.L3532:
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	add	x20, x24, :lo12:.LANCHOR63
 	strh	wzr, [x20, 56]
 	ldrh	w0, [x0, 80]
 	str	wzr, [x20, 324]
 	bl	ftl_free_sblk
-	adrp	x2, .LANCHOR100
+	adrp	x2, .LANCHOR102
 	ldr	x1, [x23, #:lo12:.LANCHOR10]
 	mov	w0, -1
-	ldr	x2, [x2, #:lo12:.LANCHOR100]
+	ldr	x2, [x2, #:lo12:.LANCHOR102]
 	strh	w0, [x1, 80]
 	strh	w0, [x2, 126]
 	strh	w0, [x1, 130]
 	ldr	x0, [x20, 8]
-	cbz	x0, .L3496
+	cbz	x0, .L3533
 	bl	buf_free
-.L3496:
+.L3533:
 	add	x24, x24, :lo12:.LANCHOR63
 	str	xzr, [x24, 8]
 	bl	flt_sys_flush
-	mov	w2, 2514
+	mov	w2, 2562
 	strb	wzr, [x19, #:lo12:.LANCHOR150]
 	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3507
-.L3494:
+	b	.L3544
+.L3531:
 	ldrh	w0, [x26, 6]
 	ldrh	w1, [x21, 26]
 	cmp	w0, 1
 	ldrh	w0, [x21, 24]
-	bls	.L3497
+	bls	.L3534
 	cmp	w1, w0
-	bcc	.L3488
+	bcc	.L3525
 	mov	w0, 1
 	strb	w0, [x19, #:lo12:.LANCHOR150]
 	ldrh	w0, [x21, 56]
@@ -22298,12 +22643,12 @@ zftl_do_gc:
 	strh	w1, [x0, 58]
 	mov	w0, -1
 	strh	w0, [x21]
-	b	.L3507
-.L3497:
+	b	.L3544
+.L3534:
 	mov	w2, 5
 	strb	w2, [x19, #:lo12:.LANCHOR150]
 	cmp	w1, w0
-	bcc	.L3498
+	bcc	.L3535
 	ldrh	w0, [x21, 56]
 	add	w1, w0, 1
 	strh	w1, [x21, 56]
@@ -22312,7 +22657,7 @@ zftl_do_gc:
 	strh	w1, [x0, 58]
 	mov	w0, -1
 	strh	w0, [x21]
-.L3498:
+.L3535:
 	bl	ftl_flush
 	bl	sblk_wait_write_queue_completed
 	bl	gc_write_completed
@@ -22322,48 +22667,48 @@ zftl_do_gc:
 	bl	pm_flush
 	bl	ftl_ext_info_flush
 	add	x0, x24, :lo12:.LANCHOR63
-	adrp	x1, .LANCHOR83
-	adrp	x2, .LANCHOR69
-	ldrh	w1, [x1, #:lo12:.LANCHOR83]
-	ldrb	w2, [x2, #:lo12:.LANCHOR69]
+	adrp	x1, .LANCHOR85
+	adrp	x2, .LANCHOR71
+	ldrh	w1, [x1, #:lo12:.LANCHOR85]
+	ldrb	w2, [x2, #:lo12:.LANCHOR71]
 	strh	wzr, [x0, 16]
 	strh	w1, [x0, 18]
 	cmp	w2, 2
 	strh	w2, [x0, 20]
-	bne	.L3500
+	bne	.L3537
 	ubfiz	w1, w1, 1, 15
 	strh	w1, [x0, 18]
-	adrp	x1, .LANCHOR70
-	ldrb	w1, [x1, #:lo12:.LANCHOR70]
-	cbnz	w1, .L3500
+	adrp	x1, .LANCHOR72
+	ldrb	w1, [x1, #:lo12:.LANCHOR72]
+	cbnz	w1, .L3537
 	mov	w1, 1
 	strh	w1, [x0, 20]
-.L3500:
+.L3537:
 	add	x24, x24, :lo12:.LANCHOR63
 	strh	wzr, [x24, 22]
-	b	.L3507
-.L3503:
+	b	.L3544
+.L3540:
 	ldrh	w1, [x24, 16]
 	ldrh	w0, [x24, 18]
 	cmp	w1, w0
-	bcc	.L3504
+	bcc	.L3541
 	mov	w0, 6
 	strb	w0, [x19, #:lo12:.LANCHOR150]
 	ldr	x0, [x24, 8]
 	bl	buf_free
 	str	xzr, [x24, 8]
-	b	.L3507
-.L3504:
+	b	.L3544
+.L3541:
 	cmp	w21, 15
-	bls	.L3409
+	bls	.L3446
 	cmp	w25, 1
-	bne	.L3507
+	bne	.L3544
 	add	w22, w22, 1
 	and	w22, w22, 255
 	cmp	w22, 4
-	bls	.L3409
-	b	.L3507
-.L3408:
+	bls	.L3446
+	b	.L3544
+.L3445:
 	bl	gc_update_l2p_map_new
 	mov	w21, -1
 	bl	gc_free_src_blk
@@ -22371,22 +22716,22 @@ zftl_do_gc:
 	bl	pm_flush
 	strh	w21, [x20, 80]
 	bl	ftl_ext_info_flush
-	adrp	x0, .LANCHOR100
-	ldr	x0, [x0, #:lo12:.LANCHOR100]
+	adrp	x0, .LANCHOR102
+	ldr	x0, [x0, #:lo12:.LANCHOR102]
 	strh	w21, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L3575:
+.L3612:
 	strb	wzr, [x19, #:lo12:.LANCHOR150]
-	b	.L3507
-.L3484:
-	mov	w2, 2407
+	b	.L3544
+.L3521:
+	mov	w2, 2455
 	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3506
+	b	.L3543
 	.size	zftl_do_gc, .-zftl_do_gc
 	.section	.text.zftl_write,"ax",@progbits
 	.align	2
@@ -22406,27 +22751,27 @@ zftl_write:
 	stp	x21, x22, [sp, 32]
 	mov	x23, x3
 	stp	x25, x26, [sp, 64]
-	tbz	x0, 12, .L3578
+	tbz	x0, 12, .L3615
 	ldr	w4, [x23]
 	mov	w3, w2
-	adrp	x0, .LC232
+	adrp	x0, .LC240
 	mov	w2, w1
-	add	x0, x0, :lo12:.LC232
+	add	x0, x0, :lo12:.LC240
 	mov	w1, w27
 	bl	printf
-.L3578:
-	cbnz	w27, .L3579
+.L3615:
+	cbnz	w27, .L3616
 	adrp	x0, .LANCHOR59
 	mov	w27, 24576
 	ldr	w0, [x0, #:lo12:.LANCHOR59]
-.L3580:
+.L3617:
 	add	w1, w19, w20
 	cmp	w0, w1
-	bcc	.L3594
+	bcc	.L3631
 	adrp	x24, .LANCHOR123
 	add	w27, w27, w19
 	sub	w19, w20, #1
-	adrp	x25, .LANCHOR100
+	adrp	x25, .LANCHOR102
 	ldrb	w0, [x24, #:lo12:.LANCHOR123]
 	add	w19, w19, w27
 	add	x24, x24, :lo12:.LANCHOR123
@@ -22437,25 +22782,25 @@ zftl_write:
 	mov	w26, w22
 	sub	w21, w19, w22
 	add	w21, w21, 1
-.L3582:
-	cbnz	w21, .L3590
-	adrp	x20, .LANCHOR93
-	adrp	x19, .LANCHOR97
-	add	x20, x20, :lo12:.LANCHOR93
-	add	x19, x19, :lo12:.LANCHOR97
+.L3619:
+	cbnz	w21, .L3627
+	adrp	x20, .LANCHOR95
+	adrp	x19, .LANCHOR99
+	add	x20, x20, :lo12:.LANCHOR95
+	add	x19, x19, :lo12:.LANCHOR99
 	bl	ftl_write_commit
 	bl	ftl_flush
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
-.L3591:
+.L3628:
 	ldrh	w0, [x20]
 	ldrh	w1, [x19]
 	add	w0, w0, w1
 	cmp	w0, 7
-	ble	.L3592
+	ble	.L3629
 	mov	w0, 0
-.L3577:
+.L3614:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -22463,28 +22808,28 @@ zftl_write:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L3579:
+.L3616:
 	cmp	w27, 3
-	bhi	.L3594
+	bhi	.L3631
 	lsl	w27, w27, 13
 	mov	w0, 8192
-	b	.L3580
-.L3590:
+	b	.L3617
+.L3627:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbnz	x0, .L3583
+	cbnz	x0, .L3620
 	bl	ftl_write_commit
-	b	.L3582
-.L3583:
+	b	.L3619
+.L3620:
 	ldrb	w3, [x24]
 	cmp	w26, w22
 	strb	wzr, [x0, 57]
 	ccmp	w26, w19, 4, ne
 	strb	w3, [x0, 56]
-	bne	.L3586
+	bne	.L3623
 	cmp	w26, w22
-	bne	.L3587
+	bne	.L3624
 	udiv	w0, w27, w3
 	msub	w0, w0, w3, w27
 	and	w0, w0, 255
@@ -22493,9 +22838,9 @@ zftl_write:
 	and	w3, w3, 255
 	cmp	w20, w3
 	csel	w3, w20, w3, cc
-.L3599:
+.L3636:
 	strb	w3, [x28, 56]
-.L3586:
+.L3623:
 	ldr	x3, [x28, 8]
 	mov	x1, x23
 	ldrb	w0, [x28, 57]
@@ -22505,7 +22850,7 @@ zftl_write:
 	lsl	w2, w2, 9
 	add	x0, x3, x0
 	bl	ftl_memcpy
-	ldr	x1, [x25, #:lo12:.LANCHOR100]
+	ldr	x1, [x25, #:lo12:.LANCHOR102]
 	ldr	w0, [x1, 8]
 	str	w26, [x28, 36]
 	add	w26, w26, 1
@@ -22517,19 +22862,19 @@ zftl_write:
 	ldrb	w0, [x28, 56]
 	ubfiz	x0, x0, 9, 8
 	add	x23, x23, x0
-	b	.L3582
-.L3587:
+	b	.L3619
+.L3624:
 	ldr	w0, [x29, 108]
 	msub	w3, w3, w26, w0
-	b	.L3599
-.L3592:
+	b	.L3636
+.L3629:
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
-	b	.L3591
-.L3594:
+	b	.L3628
+.L3631:
 	mov	w0, -1
-	b	.L3577
+	b	.L3614
 	.size	zftl_write, .-zftl_write
 	.section	.text.ftl_vendor_write,"ax",@progbits
 	.align	2
@@ -22588,12 +22933,12 @@ ftl_write:
 	mov	x20, x3
 	mov	w22, w1
 	ands	w21, w0, 255
-	bne	.L3605
+	bne	.L3642
 	mov	w3, w2
 	mov	w0, 0
 	mov	x2, x20
 	bl	idb_write_data
-.L3605:
+.L3642:
 	mov	x3, x20
 	mov	w2, w19
 	mov	w1, w22
@@ -22620,7 +22965,7 @@ zftl_discard:
 	cmp	w2, w1
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	bcc	.L3628
+	bcc	.L3665
 	adrp	x24, .LANCHOR221
 	add	w22, w0, 24576
 	adrp	x0, .LANCHOR14
@@ -22629,17 +22974,17 @@ zftl_discard:
 	ldr	w2, [x0, #:lo12:.LANCHOR14]
 	add	w1, w19, w1
 	str	w1, [x24, #:lo12:.LANCHOR221]
-	tbz	x2, 12, .L3609
-	adrp	x0, .LC233
+	tbz	x2, 12, .L3646
+	adrp	x0, .LC241
 	mov	w4, 0
 	mov	w3, w19
 	mov	w2, w22
-	add	x0, x0, :lo12:.LC233
+	add	x0, x0, :lo12:.LC241
 	bl	printf
-.L3609:
-	adrp	x23, .LANCHOR100
+.L3646:
+	adrp	x23, .LANCHOR102
 	adrp	x26, .LANCHOR123
-	ldr	x0, [x23, #:lo12:.LANCHOR100]
+	ldr	x0, [x23, #:lo12:.LANCHOR102]
 	ldr	w27, [x0, 8]
 	add	w1, w27, 1
 	str	w1, [x0, 8]
@@ -22648,7 +22993,7 @@ zftl_discard:
 	ldrb	w21, [x26, #:lo12:.LANCHOR123]
 	udiv	w20, w22, w21
 	msub	w25, w20, w21, w22
-	cbz	w25, .L3610
+	cbz	w25, .L3647
 	sub	w21, w21, w25
 	mov	w0, w20
 	cmp	w21, w19
@@ -22656,20 +23001,20 @@ zftl_discard:
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	bne	.L3611
+	bne	.L3648
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
-.L3611:
+.L3648:
 	ldr	w0, [x29, 120]
 	and	w28, w21, 65535
 	cmn	w0, #1
-	beq	.L3613
+	beq	.L3650
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x3, x0
-	cbz	x0, .L3613
+	cbz	x0, .L3650
 	strb	w25, [x0, 57]
 	ubfiz	x25, x25, 9, 25
 	strb	w21, [x0, 56]
@@ -22684,57 +23029,57 @@ zftl_discard:
 	mov	x0, x3
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-	ldr	x1, [x23, #:lo12:.LANCHOR100]
+	ldr	x1, [x23, #:lo12:.LANCHOR102]
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3613:
+.L3650:
 	add	w20, w20, 1
 	sub	w19, w19, w28
-.L3610:
-	cbz	w19, .L3615
+.L3647:
+	cbz	w19, .L3652
 	bl	ftl_flush
-.L3615:
-	adrp	x25, .LANCHOR102
+.L3652:
+	adrp	x25, .LANCHOR66
 	add	x21, x26, :lo12:.LANCHOR123
-	add	x25, x25, :lo12:.LANCHOR102
+	add	x25, x25, :lo12:.LANCHOR66
 	mov	w0, -1
 	str	w0, [x29, 124]
-.L3616:
+.L3653:
 	ldrb	w0, [x21]
 	cmp	w19, w0
-	bcs	.L3621
-	cbz	w19, .L3623
+	bcs	.L3658
+	cbz	w19, .L3660
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	bne	.L3624
+	bne	.L3661
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
-.L3624:
+.L3661:
 	ldr	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3623
+	beq	.L3660
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x21, x0
-	cbz	x0, .L3623
+	cbz	x0, .L3660
 	strb	wzr, [x0, 57]
 	strb	w19, [x0, 56]
 	stp	w27, w20, [x21, 32]
 	ldrb	w0, [x26, #:lo12:.LANCHOR123]
 	cmp	w19, w0
-	bcc	.L3626
+	bcc	.L3663
 	adrp	x1, .LANCHOR222
 	adrp	x0, .LC0
-	mov	w2, 1241
+	mov	w2, 1251
 	add	x1, x1, :lo12:.LANCHOR222
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3626:
+.L3663:
 	ldr	x0, [x21, 8]
 	lsl	w2, w19, 9
 	mov	w1, 0
@@ -22742,42 +23087,42 @@ zftl_discard:
 	mov	x0, x21
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-	ldr	x1, [x23, #:lo12:.LANCHOR100]
+	ldr	x1, [x23, #:lo12:.LANCHOR102]
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3623:
+.L3660:
 	ldr	w1, [x24, #:lo12:.LANCHOR221]
 	cmp	w1, 8192
-	bls	.L3629
+	bls	.L3666
 	ldr	x0, [x29, 104]
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3627
-	adrp	x0, .LC233
+	tbz	x0, 12, .L3664
+	adrp	x0, .LC241
 	mov	w4, 0
 	mov	w3, w19
 	mov	w2, w22
-	add	x0, x0, :lo12:.LC233
+	add	x0, x0, :lo12:.LC241
 	bl	printf
-.L3627:
+.L3664:
 	str	wzr, [x24, #:lo12:.LANCHOR221]
 	bl	flt_sys_flush
-	adrp	x0, .LANCHOR118
+	adrp	x0, .LANCHOR114
 	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR118]
-.L3629:
+	str	w1, [x0, #:lo12:.LANCHOR114]
+.L3666:
 	mov	w0, 0
-	b	.L3607
-.L3621:
+	b	.L3644
+.L3658:
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3617
+	beq	.L3654
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbz	x0, .L3619
+	cbz	x0, .L3656
 	ldrb	w2, [x21]
 	mov	w1, 0
 	strb	w2, [x0, 56]
@@ -22789,24 +23134,24 @@ zftl_discard:
 	mov	x0, x28
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-.L3655:
-	ldr	x1, [x23, #:lo12:.LANCHOR100]
+.L3692:
+	ldr	x1, [x23, #:lo12:.LANCHOR102]
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3619:
+.L3656:
 	ldrb	w0, [x21]
 	add	w20, w20, 1
 	sub	w19, w19, w0
-	b	.L3616
-.L3617:
+	b	.L3653
+.L3654:
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
 	ldr	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3619
+	beq	.L3656
 	add	x1, x29, 124
 	mov	w2, 1
 	mov	w0, w20
@@ -22820,14 +23165,14 @@ zftl_discard:
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR101
-	ldrb	w1, [x1, #:lo12:.LANCHOR101]
+	adrp	x1, .LANCHOR67
+	ldrb	w1, [x1, #:lo12:.LANCHOR67]
 	udiv	w0, w0, w1
 	bl	ftl_vpn_decrement
-	b	.L3655
-.L3628:
+	b	.L3692
+.L3665:
 	mov	w0, -1
-.L3607:
+.L3644:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -23002,7 +23347,7 @@ ftl_discard:
 	.global	g_flash_page_buffer
 	.section	.bss.IDByte,"aw",@nobits
 	.align	2
-	.set	.LANCHOR41,. + 0
+	.set	.LANCHOR42,. + 0
 	.type	IDByte, %object
 	.size	IDByte, 32
 IDByte:
@@ -23016,14 +23361,14 @@ _c_ftl_blk_pre_plane:
 	.zero	2
 	.section	.bss._c_ftl_block_addr_log2,"aw",@nobits
 	.align	1
-	.set	.LANCHOR102,. + 0
+	.set	.LANCHOR66,. + 0
 	.type	_c_ftl_block_addr_log2, %object
 	.size	_c_ftl_block_addr_log2, 2
 _c_ftl_block_addr_log2:
 	.zero	2
 	.section	.bss._c_ftl_block_align_addr,"aw",@nobits
 	.align	1
-	.set	.LANCHOR107,. + 0
+	.set	.LANCHOR103,. + 0
 	.type	_c_ftl_block_align_addr, %object
 	.size	_c_ftl_block_align_addr, 2
 _c_ftl_block_align_addr:
@@ -23042,39 +23387,39 @@ _c_ftl_byte_pre_page:
 _c_ftl_nand_blks_per_die:
 	.zero	2
 	.section	.bss._c_ftl_nand_die_num,"aw",@nobits
-	.set	.LANCHOR108,. + 0
+	.set	.LANCHOR104,. + 0
 	.type	_c_ftl_nand_die_num, %object
 	.size	_c_ftl_nand_die_num, 1
 _c_ftl_nand_die_num:
 	.zero	1
 	.section	.bss._c_ftl_nand_planes_num,"aw",@nobits
-	.set	.LANCHOR76,. + 0
+	.set	.LANCHOR78,. + 0
 	.type	_c_ftl_nand_planes_num, %object
 	.size	_c_ftl_nand_planes_num, 1
 _c_ftl_nand_planes_num:
 	.zero	1
 	.section	.bss._c_ftl_nand_type,"aw",@nobits
-	.set	.LANCHOR69,. + 0
+	.set	.LANCHOR71,. + 0
 	.type	_c_ftl_nand_type, %object
 	.size	_c_ftl_nand_type, 1
 _c_ftl_nand_type:
 	.zero	1
 	.section	.bss._c_ftl_page_pre_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR75,. + 0
+	.set	.LANCHOR77,. + 0
 	.type	_c_ftl_page_pre_blk, %object
 	.size	_c_ftl_page_pre_blk, 2
 _c_ftl_page_pre_blk:
 	.zero	2
 	.section	.bss._c_ftl_page_pre_slc_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR83,. + 0
+	.set	.LANCHOR85,. + 0
 	.type	_c_ftl_page_pre_slc_blk, %object
 	.size	_c_ftl_page_pre_slc_blk, 2
 _c_ftl_page_pre_slc_blk:
 	.zero	2
 	.section	.bss._c_ftl_planes_per_die,"aw",@nobits
-	.set	.LANCHOR101,. + 0
+	.set	.LANCHOR67,. + 0
 	.type	_c_ftl_planes_per_die, %object
 	.size	_c_ftl_planes_per_die, 1
 _c_ftl_planes_per_die:
@@ -23101,14 +23446,14 @@ _c_max_pm_sblk:
 	.zero	2
 	.section	.bss._c_mix_max_slc_ec_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR105,. + 0
+	.set	.LANCHOR118,. + 0
 	.type	_c_mix_max_slc_ec_count, %object
 	.size	_c_mix_max_slc_ec_count, 2
 _c_mix_max_slc_ec_count:
 	.zero	2
 	.section	.bss._c_mix_max_xlc_ec_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR103,. + 0
+	.set	.LANCHOR116,. + 0
 	.type	_c_mix_max_xlc_ec_count, %object
 	.size	_c_mix_max_xlc_ec_count, 2
 _c_mix_max_xlc_ec_count:
@@ -23164,7 +23509,7 @@ _c_user_data_density:
 	.zero	4
 	.section	.bss._gc_after_discard_en,"aw",@nobits
 	.align	2
-	.set	.LANCHOR118,. + 0
+	.set	.LANCHOR114,. + 0
 	.type	_gc_after_discard_en, %object
 	.size	_gc_after_discard_en, 4
 _gc_after_discard_en:
@@ -23183,21 +23528,21 @@ _last_write_time:
 	.zero	4
 	.section	.bss._max_slc_super_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR104,. + 0
+	.set	.LANCHOR117,. + 0
 	.type	_max_slc_super_block, %object
 	.size	_max_slc_super_block, 2
 _max_slc_super_block:
 	.zero	2
 	.section	.bss._max_xlc_super_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR91,. + 0
+	.set	.LANCHOR93,. + 0
 	.type	_max_xlc_super_block, %object
 	.size	_max_xlc_super_block, 2
 _max_xlc_super_block:
 	.zero	2
 	.section	.bss._min_slc_super_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR87,. + 0
+	.set	.LANCHOR89,. + 0
 	.type	_min_slc_super_block, %object
 	.size	_min_slc_super_block, 2
 _min_slc_super_block:
@@ -23211,7 +23556,7 @@ discard_sector_count:
 	.zero	4
 	.section	.bss.fill_spare_size,"aw",@nobits
 	.align	1
-	.set	.LANCHOR47,. + 0
+	.set	.LANCHOR48,. + 0
 	.type	fill_spare_size, %object
 	.size	fill_spare_size, 2
 fill_spare_size:
@@ -23238,21 +23583,21 @@ free_buf_count:
 	.zero	1
 	.section	.bss.free_mix_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR97,. + 0
+	.set	.LANCHOR99,. + 0
 	.type	free_mix_sblk, %object
 	.size	free_mix_sblk, 2
 free_mix_sblk:
 	.zero	2
 	.section	.bss.free_slc_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR93,. + 0
+	.set	.LANCHOR95,. + 0
 	.type	free_slc_sblk, %object
 	.size	free_slc_sblk, 2
 free_slc_sblk:
 	.zero	2
 	.section	.bss.free_xlc_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR95,. + 0
+	.set	.LANCHOR97,. + 0
 	.type	free_xlc_sblk, %object
 	.size	free_xlc_sblk, 2
 free_xlc_sblk:
@@ -23304,7 +23649,7 @@ ftl_power_lost_flag:
 	.zero	1
 	.section	.bss.ftl_sblk_lpa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR113,. + 0
+	.set	.LANCHOR109,. + 0
 	.type	ftl_sblk_lpa_tbl, %object
 	.size	ftl_sblk_lpa_tbl, 8
 ftl_sblk_lpa_tbl:
@@ -23318,7 +23663,7 @@ ftl_sblk_update_list:
 	.zero	16
 	.section	.bss.ftl_sblk_update_list_offset,"aw",@nobits
 	.align	1
-	.set	.LANCHOR119,. + 0
+	.set	.LANCHOR115,. + 0
 	.type	ftl_sblk_update_list_offset, %object
 	.size	ftl_sblk_update_list_offset, 2
 ftl_sblk_update_list_offset:
@@ -23358,7 +23703,7 @@ ftl_tmp_spare:
 	.zero	256
 	.section	.bss.ftl_vpn_update_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR117,. + 0
+	.set	.LANCHOR113,. + 0
 	.type	ftl_vpn_update_count, %object
 	.size	ftl_vpn_update_count, 2
 ftl_vpn_update_count:
@@ -23386,19 +23731,19 @@ g_die_addr:
 	.zero	32
 	.section	.bss.g_die_cs_idx,"aw",@nobits
 	.align	2
-	.set	.LANCHOR29,. + 0
+	.set	.LANCHOR30,. + 0
 	.type	g_die_cs_idx, %object
 	.size	g_die_cs_idx, 8
 g_die_cs_idx:
 	.zero	8
 	.section	.bss.g_flash_3d_mlc_flag,"aw",@nobits
-	.set	.LANCHOR70,. + 0
+	.set	.LANCHOR72,. + 0
 	.type	g_flash_3d_mlc_flag, %object
 	.size	g_flash_3d_mlc_flag, 1
 g_flash_3d_mlc_flag:
 	.zero	1
 	.section	.bss.g_flash_3d_tlc_flag,"aw",@nobits
-	.set	.LANCHOR73,. + 0
+	.set	.LANCHOR75,. + 0
 	.type	g_flash_3d_tlc_flag, %object
 	.size	g_flash_3d_tlc_flag, 1
 g_flash_3d_tlc_flag:
@@ -23412,19 +23757,19 @@ g_flash_blk_info:
 	.zero	4
 	.section	.bss.g_flash_cur_mode,"aw",@nobits
 	.align	3
-	.set	.LANCHOR31,. + 0
+	.set	.LANCHOR32,. + 0
 	.type	g_flash_cur_mode, %object
 	.size	g_flash_cur_mode, 4
 g_flash_cur_mode:
 	.zero	4
 	.section	.bss.g_flash_interface_mode,"aw",@nobits
-	.set	.LANCHOR42,. + 0
+	.set	.LANCHOR43,. + 0
 	.type	g_flash_interface_mode, %object
 	.size	g_flash_interface_mode, 1
 g_flash_interface_mode:
 	.zero	1
 	.section	.bss.g_flash_multi_page_prog_en,"aw",@nobits
-	.set	.LANCHOR38,. + 0
+	.set	.LANCHOR39,. + 0
 	.type	g_flash_multi_page_prog_en, %object
 	.size	g_flash_multi_page_prog_en, 1
 g_flash_multi_page_prog_en:
@@ -23483,7 +23828,7 @@ g_flash_tmp_page_buffer:
 g_flash_tmp_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_toggle_mode_en,"aw",@nobits
-	.set	.LANCHOR20,. + 0
+	.set	.LANCHOR21,. + 0
 	.type	g_flash_toggle_mode_en, %object
 	.size	g_flash_toggle_mode_en, 1
 g_flash_toggle_mode_en:
@@ -23499,9 +23844,9 @@ g_ftl_info_blk:
 	.align	3
 	.set	.LANCHOR63,. + 0
 	.type	g_gc_info, %object
-	.size	g_gc_info, 328
+	.size	g_gc_info, 344
 g_gc_info:
-	.zero	328
+	.zero	344
 	.section	.bss.g_idb_ecc_bits,"aw",@nobits
 	.set	.LANCHOR17,. + 0
 	.type	g_idb_ecc_bits, %object
@@ -23509,7 +23854,7 @@ g_gc_info:
 g_idb_ecc_bits:
 	.zero	1
 	.section	.bss.g_idb_slc_mode_enable,"aw",@nobits
-	.set	.LANCHOR49,. + 0
+	.set	.LANCHOR19,. + 0
 	.type	g_idb_slc_mode_enable, %object
 	.size	g_idb_slc_mode_enable, 1
 g_idb_slc_mode_enable:
@@ -23522,7 +23867,7 @@ g_idb_slc_mode_enable:
 g_lsb_page_tbl:
 	.zero	512
 	.section	.bss.g_maxRegNum,"aw",@nobits
-	.set	.LANCHOR25,. + 0
+	.set	.LANCHOR26,. + 0
 	.type	g_maxRegNum, %object
 	.size	g_maxRegNum, 1
 g_maxRegNum:
@@ -23548,13 +23893,13 @@ g_nand_max_die:
 	.zero	1
 	.section	.bss.g_nand_opt_para,"aw",@nobits
 	.align	3
-	.set	.LANCHOR19,. + 0
+	.set	.LANCHOR20,. + 0
 	.type	g_nand_opt_para, %object
 	.size	g_nand_opt_para, 32
 g_nand_opt_para:
 	.zero	32
 	.section	.bss.g_nandc_ecc_bits,"aw",@nobits
-	.set	.LANCHOR43,. + 0
+	.set	.LANCHOR44,. + 0
 	.type	g_nandc_ecc_bits, %object
 	.size	g_nandc_ecc_bits, 1
 g_nandc_ecc_bits:
@@ -23567,19 +23912,19 @@ g_nandc_tran_timeout:
 	.zero	1
 	.section	.bss.g_nandc_v6_master_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR46,. + 0
+	.set	.LANCHOR47,. + 0
 	.type	g_nandc_v6_master_info, %object
 	.size	g_nandc_v6_master_info, 40
 g_nandc_v6_master_info:
 	.zero	40
 	.section	.bss.g_nandc_ver,"aw",@nobits
-	.set	.LANCHOR27,. + 0
+	.set	.LANCHOR28,. + 0
 	.type	g_nandc_ver, %object
 	.size	g_nandc_ver, 1
 g_nandc_ver:
 	.zero	1
 	.section	.bss.g_one_pass_program,"aw",@nobits
-	.set	.LANCHOR71,. + 0
+	.set	.LANCHOR73,. + 0
 	.type	g_one_pass_program, %object
 	.size	g_one_pass_program, 1
 g_one_pass_program:
@@ -23592,7 +23937,7 @@ g_one_pass_program:
 g_pm_spare:
 	.zero	8
 	.section	.bss.g_retryMode,"aw",@nobits
-	.set	.LANCHOR23,. + 0
+	.set	.LANCHOR24,. + 0
 	.type	g_retryMode, %object
 	.size	g_retryMode, 1
 g_retryMode:
@@ -23631,7 +23976,7 @@ gc_des_ppa_tbl:
 	.zero	8
 	.section	.bss.gc_free_slc_sblk_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR77,. + 0
+	.set	.LANCHOR79,. + 0
 	.type	gc_free_slc_sblk_th, %object
 	.size	gc_free_slc_sblk_th, 2
 gc_free_slc_sblk_th:
@@ -23644,14 +23989,14 @@ gc_free_slc_sblk_th:
 gc_lpa_tbl:
 	.zero	8
 	.section	.bss.gc_mode,"aw",@nobits
-	.set	.LANCHOR74,. + 0
+	.set	.LANCHOR76,. + 0
 	.type	gc_mode, %object
 	.size	gc_mode, 1
 gc_mode:
 	.zero	1
 	.section	.bss.gc_page_buf_id,"aw",@nobits
 	.align	3
-	.set	.LANCHOR72,. + 0
+	.set	.LANCHOR74,. + 0
 	.type	gc_page_buf_id, %object
 	.size	gc_page_buf_id, 8
 gc_page_buf_id:
@@ -23672,21 +24017,21 @@ gc_search_count:
 	.zero	4
 	.section	.bss.gc_slc_cache_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR80,. + 0
+	.set	.LANCHOR82,. + 0
 	.type	gc_slc_cache_index, %object
 	.size	gc_slc_cache_index, 2
 gc_slc_cache_index:
 	.zero	2
 	.section	.bss.gc_slc_data_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR84,. + 0
+	.set	.LANCHOR86,. + 0
 	.type	gc_slc_data_index, %object
 	.size	gc_slc_data_index, 2
 gc_slc_data_index:
 	.zero	2
 	.section	.bss.gc_slc_mode_tlc_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR82,. + 0
+	.set	.LANCHOR84,. + 0
 	.type	gc_slc_mode_tlc_vpn_th, %object
 	.size	gc_slc_mode_tlc_vpn_th, 2
 gc_slc_mode_tlc_vpn_th:
@@ -23706,35 +24051,35 @@ gc_state:
 	.zero	1
 	.section	.bss.gc_tlc_mode_slc_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR92,. + 0
+	.set	.LANCHOR94,. + 0
 	.type	gc_tlc_mode_slc_vpn_th, %object
 	.size	gc_tlc_mode_slc_vpn_th, 2
 gc_tlc_mode_slc_vpn_th:
 	.zero	2
 	.section	.bss.gc_tlc_mode_tlc_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR89,. + 0
+	.set	.LANCHOR91,. + 0
 	.type	gc_tlc_mode_tlc_vpn_th, %object
 	.size	gc_tlc_mode_tlc_vpn_th, 2
 gc_tlc_mode_tlc_vpn_th:
 	.zero	2
 	.section	.bss.gc_valid_page_ppa,"aw",@nobits
 	.align	3
-	.set	.LANCHOR66,. + 0
+	.set	.LANCHOR68,. + 0
 	.type	gc_valid_page_ppa, %object
 	.size	gc_valid_page_ppa, 8
 gc_valid_page_ppa:
 	.zero	8
 	.section	.bss.gc_xlc_data_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR81,. + 0
+	.set	.LANCHOR83,. + 0
 	.type	gc_xlc_data_index, %object
 	.size	gc_xlc_data_index, 2
 gc_xlc_data_index:
 	.zero	2
 	.section	.bss.gc_xlc_search_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR85,. + 0
+	.set	.LANCHOR87,. + 0
 	.type	gc_xlc_search_index, %object
 	.size	gc_xlc_search_index, 2
 gc_xlc_search_index:
@@ -23748,7 +24093,7 @@ gp_blk_info:
 	.zero	8
 	.section	.bss.gp_data_slc_cache_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR79,. + 0
+	.set	.LANCHOR81,. + 0
 	.type	gp_data_slc_cache_head, %object
 	.size	gp_data_slc_cache_head, 8
 gp_data_slc_cache_head:
@@ -23762,7 +24107,7 @@ gp_data_slc_data_head:
 	.zero	8
 	.section	.bss.gp_data_xlc_data_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR78,. + 0
+	.set	.LANCHOR80,. + 0
 	.type	gp_data_xlc_data_head, %object
 	.size	gp_data_xlc_data_head, 8
 gp_data_xlc_data_head:
@@ -23776,28 +24121,28 @@ gp_flash_check_buf:
 	.zero	8
 	.section	.bss.gp_flash_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR26,. + 0
+	.set	.LANCHOR27,. + 0
 	.type	gp_flash_info, %object
 	.size	gp_flash_info, 8
 gp_flash_info:
 	.zero	8
 	.section	.bss.gp_free_mix_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR98,. + 0
+	.set	.LANCHOR100,. + 0
 	.type	gp_free_mix_head, %object
 	.size	gp_free_mix_head, 8
 gp_free_mix_head:
 	.zero	8
 	.section	.bss.gp_free_slc_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR94,. + 0
+	.set	.LANCHOR96,. + 0
 	.type	gp_free_slc_head, %object
 	.size	gp_free_slc_head, 8
 gp_free_slc_head:
 	.zero	8
 	.section	.bss.gp_free_xlc_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR96,. + 0
+	.set	.LANCHOR98,. + 0
 	.type	gp_free_xlc_head, %object
 	.size	gp_free_xlc_head, 8
 gp_free_xlc_head:
@@ -23811,7 +24156,7 @@ gp_ftl_ext_info:
 	.zero	8
 	.section	.bss.gp_ftl_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR100,. + 0
+	.set	.LANCHOR102,. + 0
 	.type	gp_ftl_info, %object
 	.size	gp_ftl_info, 8
 gp_ftl_info:
@@ -23853,14 +24198,14 @@ idb_need_write_back:
 	.zero	4
 	.section	.bss.lpa_hash,"aw",@nobits
 	.align	3
-	.set	.LANCHOR112,. + 0
+	.set	.LANCHOR108,. + 0
 	.type	lpa_hash, %object
 	.size	lpa_hash, 512
 lpa_hash:
 	.zero	512
 	.section	.bss.lpa_hash_index,"aw",@nobits
 	.align	3
-	.set	.LANCHOR114,. + 0
+	.set	.LANCHOR110,. + 0
 	.type	lpa_hash_index, %object
 	.size	lpa_hash_index, 8
 lpa_hash_index:
@@ -23872,13 +24217,13 @@ lpa_hash_index:
 nandc_ecc_sts:
 	.zero	16
 	.section	.bss.nandc_hw_seed,"aw",@nobits
-	.set	.LANCHOR44,. + 0
+	.set	.LANCHOR45,. + 0
 	.type	nandc_hw_seed, %object
 	.size	nandc_hw_seed, 1
 nandc_hw_seed:
 	.zero	1
 	.section	.bss.nandc_randomizer_en,"aw",@nobits
-	.set	.LANCHOR45,. + 0
+	.set	.LANCHOR46,. + 0
 	.type	nandc_randomizer_en, %object
 	.size	nandc_randomizer_en, 1
 nandc_randomizer_en:
@@ -23947,7 +24292,7 @@ read_buf_count:
 read_buf_head:
 	.zero	1
 	.section	.bss.sblk_gc_write_completed_queue_head,"aw",@nobits
-	.set	.LANCHOR67,. + 0
+	.set	.LANCHOR69,. + 0
 	.type	sblk_gc_write_completed_queue_head, %object
 	.size	sblk_gc_write_completed_queue_head, 1
 sblk_gc_write_completed_queue_head:
@@ -23972,14 +24317,14 @@ sblk_write_completed_queue_head:
 	.zero	1
 	.section	.bss.slc_cache_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR86,. + 0
+	.set	.LANCHOR88,. + 0
 	.type	slc_cache_sblk, %object
 	.size	slc_cache_sblk, 2
 slc_cache_sblk:
 	.zero	2
 	.section	.bss.slc_data_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR88,. + 0
+	.set	.LANCHOR90,. + 0
 	.type	slc_data_sblk, %object
 	.size	slc_data_sblk, 2
 slc_data_sblk:
@@ -24010,21 +24355,21 @@ write_commit_head:
 	.zero	1
 	.section	.bss.xlc_data_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR90,. + 0
+	.set	.LANCHOR92,. + 0
 	.type	xlc_data_sblk, %object
 	.size	xlc_data_sblk, 2
 xlc_data_sblk:
 	.zero	2
 	.section	.bss.zftl_print_list_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR99,. + 0
+	.set	.LANCHOR101,. + 0
 	.type	zftl_print_list_count, %object
 	.size	zftl_print_list_count, 2
 zftl_print_list_count:
 	.zero	2
 	.section	.data.g_nand_para_info,"aw",@progbits
 	.align	3
-	.set	.LANCHOR30,. + 0
+	.set	.LANCHOR31,. + 0
 	.type	g_nand_para_info, %object
 	.size	g_nand_para_info, 32
 g_nand_para_info:
@@ -24174,7 +24519,7 @@ nand_opt_para:
 	.zero	14
 	.section	.data.sd15_slc_rr,"aw",@progbits
 	.align	3
-	.set	.LANCHOR36,. + 0
+	.set	.LANCHOR37,. + 0
 	.type	sd15_slc_rr, %object
 	.size	sd15_slc_rr, 25
 sd15_slc_rr:
@@ -24205,7 +24550,7 @@ sd15_slc_rr:
 	.byte	112
 	.section	.data.sd15_tlc_rr,"aw",@progbits
 	.align	3
-	.set	.LANCHOR35,. + 0
+	.set	.LANCHOR36,. + 0
 	.type	sd15_tlc_rr, %object
 	.size	sd15_tlc_rr, 329
 sd15_tlc_rr:
@@ -25497,7 +25842,7 @@ zftl_nand_flash_para_tbl:
 	.byte	1
 	.byte	0
 	.hword	512
-	.byte	3
+	.byte	0
 	.byte	0
 	.byte	0
 	.byte	0
@@ -26005,777 +26350,790 @@ zftl_nand_flash_para_tbl:
 	.byte	0
 	.byte	0
 	.byte	0
-	.section	.rodata.__func__.10010,"a",@progbits
+	.section	.rodata.__func__.10034,"a",@progbits
 	.align	3
 	.set	.LANCHOR211,. + 0
-	.type	__func__.10010, %object
-	.size	__func__.10010, 20
-__func__.10010:
+	.type	__func__.10034, %object
+	.size	__func__.10034, 20
+__func__.10034:
 	.string	"gc_scan_static_data"
-	.section	.rodata.__func__.10077,"a",@progbits
+	.section	.rodata.__func__.10101,"a",@progbits
 	.align	3
 	.set	.LANCHOR220,. + 0
-	.type	__func__.10077, %object
-	.size	__func__.10077, 11
-__func__.10077:
+	.type	__func__.10101, %object
+	.size	__func__.10101, 11
+__func__.10101:
 	.string	"zftl_do_gc"
-	.section	.rodata.__func__.10170,"a",@progbits
+	.section	.rodata.__func__.10194,"a",@progbits
 	.align	3
 	.set	.LANCHOR5,. + 0
-	.type	__func__.10170, %object
-	.size	__func__.10170, 18
-__func__.10170:
+	.type	__func__.10194, %object
+	.size	__func__.10194, 18
+__func__.10194:
 	.string	"_list_remove_node"
-	.section	.rodata.__func__.10195,"a",@progbits
+	.section	.rodata.__func__.10219,"a",@progbits
 	.align	3
 	.set	.LANCHOR11,. + 0
-	.type	__func__.10195, %object
-	.size	__func__.10195, 23
-__func__.10195:
+	.type	__func__.10219, %object
+	.size	__func__.10219, 23
+__func__.10219:
 	.string	"_list_update_data_list"
-	.section	.rodata.__func__.10303,"a",@progbits
+	.section	.rodata.__func__.10327,"a",@progbits
 	.align	3
 	.set	.LANCHOR180,. + 0
-	.type	__func__.10303, %object
-	.size	__func__.10303, 15
-__func__.10303:
+	.type	__func__.10327, %object
+	.size	__func__.10327, 15
+__func__.10327:
 	.string	"ftl_info_flush"
-	.section	.rodata.__func__.10335,"a",@progbits
+	.section	.rodata.__func__.10359,"a",@progbits
 	.align	3
 	.set	.LANCHOR128,. + 0
-	.type	__func__.10335, %object
-	.size	__func__.10335, 15
-__func__.10335:
+	.type	__func__.10359, %object
+	.size	__func__.10359, 15
+__func__.10359:
 	.string	"ftl_alloc_sblk"
-	.section	.rodata.__func__.10376,"a",@progbits
+	.section	.rodata.__func__.10401,"a",@progbits
 	.align	3
-	.set	.LANCHOR109,. + 0
-	.type	__func__.10376, %object
-	.size	__func__.10376, 18
-__func__.10376:
+	.set	.LANCHOR105,. + 0
+	.type	__func__.10401, %object
+	.size	__func__.10401, 18
+__func__.10401:
 	.string	"ftl_alloc_sys_blk"
-	.section	.rodata.__func__.10386,"a",@progbits
+	.section	.rodata.__func__.10411,"a",@progbits
 	.align	3
-	.set	.LANCHOR110,. + 0
-	.type	__func__.10386, %object
-	.size	__func__.10386, 17
-__func__.10386:
+	.set	.LANCHOR106,. + 0
+	.type	__func__.10411, %object
+	.size	__func__.10411, 17
+__func__.10411:
 	.string	"ftl_free_sys_blk"
-	.section	.rodata.__func__.10421,"a",@progbits
+	.section	.rodata.__func__.10446,"a",@progbits
 	.align	3
 	.set	.LANCHOR212,. + 0
-	.type	__func__.10421, %object
-	.size	__func__.10421, 14
-__func__.10421:
+	.type	__func__.10446, %object
+	.size	__func__.10446, 14
+__func__.10446:
 	.string	"ftl_sblk_dump"
-	.section	.rodata.__func__.10445,"a",@progbits
+	.section	.rodata.__func__.10470,"a",@progbits
 	.align	3
 	.set	.LANCHOR201,. + 0
-	.type	__func__.10445, %object
-	.size	__func__.10445, 16
-__func__.10445:
+	.type	__func__.10470, %object
+	.size	__func__.10470, 16
+__func__.10470:
 	.string	"ftl_sysblk_dump"
-	.section	.rodata.__func__.10467,"a",@progbits
+	.section	.rodata.__func__.10492,"a",@progbits
 	.align	3
 	.set	.LANCHOR189,. + 0
-	.type	__func__.10467, %object
-	.size	__func__.10467, 23
-__func__.10467:
+	.type	__func__.10492, %object
+	.size	__func__.10492, 23
+__func__.10492:
 	.string	"ftl_open_sblk_recovery"
-	.section	.rodata.__func__.10497,"a",@progbits
+	.section	.rodata.__func__.10522,"a",@progbits
 	.align	3
-	.set	.LANCHOR111,. + 0
-	.type	__func__.10497, %object
-	.size	__func__.10497, 23
-__func__.10497:
+	.set	.LANCHOR107,. + 0
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 	.align	3
-	.set	.LANCHOR106,. + 0
-	.type	__func__.9908, %object
-	.size	__func__.9908, 16
-__func__.9908:
+	.set	.LANCHOR119,. + 0
+	.type	__func__.9932, %object
+	.size	__func__.9932, 16
+__func__.9932:
 	.string	"gc_free_src_blk"
-	.section	.rodata.__func__.9952,"a",@progbits
+	.section	.rodata.__func__.9976,"a",@progbits
 	.align	3
 	.set	.LANCHOR210,. + 0
-	.type	__func__.9952, %object
-	.size	__func__.9952, 16
-__func__.9952:
+	.type	__func__.9976, %object
+	.size	__func__.9976, 16
+__func__.9976:
 	.string	"gc_scan_src_blk"
 	.section	.rodata._list_remove_node.str1.1,"aMS",@progbits,1
 .LC0:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
 	.section	.rodata.dump_ftl_info.str1.1,"aMS",@progbits,1
-.LC165:
+.LC172:
 	.string	"free_buf_count: %d\n"
-.LC166:
+.LC173:
 	.string	"g_ftl_info_blk blk:0x%x, index:0x%x, page:0x%x\n"
-.LC167:
+.LC174:
 	.string	"ftl_ext_info_blk blk:0x%x, page:0x%x\n"
-.LC168:
+.LC175:
 	.string	"ac_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC169:
+.LC176:
 	.string	"tmp_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC170:
+.LC177:
 	.string	"gc_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC171:
+.LC178:
 	.string	"lpa:"
-.LC172:
+.LC179:
 	.string	"vpn:"
-.LC173:
+.LC180:
 	.string	"sblk:"
-.LC174:
+.LC181:
 	.string	"lpa_hash:"
-.LC175:
+.LC182:
 	.string	"lpa_hash_index:"
 	.section	.rodata.dump_sblk_queue.str1.1,"aMS",@progbits,1
-.LC70:
+.LC74:
 	.string	"dump_sblk_queue: %d\n"
-.LC71:
+.LC75:
 	.string	"buf id= %d state = %d ppa = %x\n"
 	.section	.rodata.flash_complete_page_read.str1.1,"aMS",@progbits,1
-.LC118:
+.LC122:
 	.string	"flash_complete_page_read %x %x error_ecc %d %d\n"
 	.section	.rodata.flash_ddr_tuning_read.str1.1,"aMS",@progbits,1
-.LC111:
+.LC115:
 	.string	"%d flash_ddr_tuning_read %x ecc=%d\n"
-.LC112:
+.LC116:
 	.string	"sync para %d\n"
-.LC113:
+.LC117:
 	.string	"DDR mode Read error %x %x\n"
-.LC114:
+.LC118:
 	.string	"SDR mode Read %x %x ecc:%x\n"
 	.section	.rodata.flash_erase_all.str1.1,"aMS",@progbits,1
-.LC35:
+.LC36:
 	.string	"erase done: %x\n"
 	.section	.rodata.flash_erase_block_en.str1.1,"aMS",@progbits,1
-.LC33:
-	.string	"flash_erase_block %x %x %x\n"
 .LC34:
+	.string	"flash_erase_block %x %x %x\n"
+.LC35:
 	.string	"flash_erase_block %d block = %x status = %x\n"
 	.section	.rodata.flash_erase_duplane_block.str1.1,"aMS",@progbits,1
-.LC31:
-	.string	"flash_erase_duplane_block %x %x %x\n"
 .LC32:
+	.string	"flash_erase_duplane_block %x %x %x\n"
+.LC33:
 	.string	"flash_erase_duplane_block pageadd = %x status = %x\n"
 	.section	.rodata.flash_get_last_written_page.str1.1,"aMS",@progbits,1
-.LC117:
+.LC121:
 	.string	"flash_get_last_written_page: %x %x %x\n"
 	.section	.rodata.flash_info_blk_init.str1.1,"aMS",@progbits,1
-.LC162:
+.LC169:
 	.string	"...%d @ %s %d %p\n"
-.LC163:
+.LC170:
 	.string	"no sys info %x\n"
 	.section	.rodata.flash_info_data_init.str1.1,"aMS",@progbits,1
-.LC86:
+.LC90:
 	.string	"...%d @ %s\n"
 	.section	.rodata.flash_info_flush.str1.1,"aMS",@progbits,1
-.LC159:
+.LC166:
 	.string	"finfo:"
-.LC160:
+.LC167:
 	.string	"flash_info_flush id = %x, page = %x\n"
-.LC161:
+.LC168:
 	.string	"sys_info_flush error:%x\n"
 	.section	.rodata.flash_mask_bad_block.str1.1,"aMS",@progbits,1
-.LC41:
+.LC42:
 	.string	"flash_mask_bad_block %d %d\n"
 	.section	.rodata.flash_prog_page.str1.1,"aMS",@progbits,1
-.LC122:
+.LC128:
 	.string	"flash_prog_page %x %x %x\n"
-.LC123:
+.LC129:
 	.string	"flash_prog_page page_addr = %x status = %x\n"
 	.section	.rodata.flash_prog_page_en.str1.1,"aMS",@progbits,1
-.LC130:
+.LC136:
 	.string	"flash_prog_page_en:%x %x %x\n"
-.LC131:
+.LC137:
 	.string	"w d:"
-.LC132:
+.LC138:
 	.string	"w s:"
-.LC133:
+.LC139:
 	.string	"spare"
-.LC134:
+.LC140:
 	.string	"data"
-.LC135:
+.LC141:
 	.string	"write error: %x\n"
 	.section	.rodata.flash_read_id.str1.1,"aMS",@progbits,1
-.LC38:
+.LC39:
 	.string	"No.%d FLASH ID:%x %x %x %x %x %x\n"
 	.section	.rodata.flash_read_otp_data.str1.1,"aMS",@progbits,1
-.LC39:
+.LC40:
 	.string	"otp:%x %x %x %x\n"
 	.section	.rodata.flash_read_page.str1.1,"aMS",@progbits,1
-.LC104:
+.LC108:
 	.string	"flash_read_page %x %x %x\n"
 	.section	.rodata.flash_read_page_en.str1.1,"aMS",@progbits,1
-.LC115:
+.LC119:
 	.string	"flash_read_page_en %x %x %x\n"
-.LC116:
+.LC120:
 	.string	"flash_read_page_en %x %x error_ecc %d %d\n"
 	.section	.rodata.flash_set_interface_mode.str1.1,"aMS",@progbits,1
-.LC36:
-	.string	"nand sdr mode %x\n"
 .LC37:
+	.string	"nand sdr mode %x\n"
+.LC38:
 	.string	"nand ddr mode %x\n"
+	.section	.rodata.ftl_alloc_new_data_sblk.str1.1,"aMS",@progbits,1
+.LC230:
+	.string	"error gc_add_sblk: %x\n"
 	.section	.rodata.ftl_alloc_sblk.str1.1,"aMS",@progbits,1
-.LC69:
+.LC73:
 	.string	"alloc sblk %x %d\n"
 	.section	.rodata.ftl_dump_write_open_sblk.str1.1,"aMS",@progbits,1
-.LC154:
+.LC161:
 	.string	"ftl_sblk_dump_write = %x %d %d %d %d\n"
-.LC155:
+.LC162:
 	.string	"blk= %x, page=%x, ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
-.LC156:
+.LC163:
 	.string	"ftl_sblk_dump_write2 = %x %d %d %d\n"
-.LC157:
+.LC164:
 	.string	"ftl_sblk_dump_write = %x %x\n"
-.LC158:
+.LC165:
 	.string	"ftl_sblk_dump_write done = %x\n"
 	.section	.rodata.ftl_ext_info_init.str1.1,"aMS",@progbits,1
-.LC140:
+.LC147:
 	.string	"%s %d %d %x %x\n"
 	.section	.rodata.ftl_free_sblk.str1.1,"aMS",@progbits,1
-.LC56:
+.LC61:
 	.string	"swl_tlc_free_mini_ec_blk sblk %x\n"
-.LC57:
+.LC62:
 	.string	"swl_slc_free_mini_ec_blk sblk %x\n"
 	.section	.rodata.ftl_info_blk_init.str1.1,"aMS",@progbits,1
-.LC138:
+.LC144:
 	.string	"%d %x @%d %x\n"
-.LC139:
+.LC145:
 	.string	"ftl_info_blk_init %d %d %x\n"
+.LC146:
+	.string	"ink flag: %x\n"
 	.section	.rodata.ftl_info_flush.str1.1,"aMS",@progbits,1
-.LC137:
+.LC143:
 	.string	"g_ftl_info_blk blk = %x, page = %x version = %d\n"
 	.section	.rodata.ftl_low_format.str1.1,"aMS",@progbits,1
-.LC141:
+.LC148:
 	.string	"ftl_low_format %d\n"
-.LC142:
+.LC149:
 	.string	"low format %d %d %d %d\n"
 	.section	.rodata.ftl_mask_bad_block.str1.1,"aMS",@progbits,1
-.LC61:
-	.string	"mask bad block:cs %x block: %x\n"
+.LC59:
+	.string	"mask bad block:cs %x %x block: %x %x\n"
 	.section	.rodata.ftl_open_sblk_recovery.str1.1,"aMS",@progbits,1
-.LC144:
+.LC151:
 	.string	"saved_active_page  = %x\n"
-.LC145:
+.LC152:
 	.string	"saved_active_plane = %x\n"
-.LC146:
+.LC153:
 	.string	"sblk = %x\n"
-.LC147:
+.LC154:
 	.string	"phy_blk = %x %x\n"
-.LC148:
+.LC155:
 	.string	"sblk = %x, vpn0 = %d, vpn1 = %d\n"
-.LC149:
+.LC156:
 	.string	"dump_write_lpa = %x %x %x %x\n"
-.LC150:
+.LC157:
 	.string	"dump write new ppa = %x, last ppa = %x lpa = %x\n"
-.LC151:
+.LC158:
 	.string	"dump write = %x %x\n"
-.LC152:
+.LC159:
 	.string	"dump write hash update = %x %x %x\n"
 	.section	.rodata.ftl_re_low_format.str1.1,"aMS",@progbits,1
-.LC143:
+.LC150:
 	.string	"re low format %d\n"
 	.section	.rodata.ftl_sblk_dump.str1.1,"aMS",@progbits,1
-.LC208:
+.LC215:
 	.string	"ftl_sblk_dump = %x %d %d %d %d\n"
-.LC209:
+.LC216:
 	.string	"ftl_sblk_dump = %x %x %x %x\n"
-.LC210:
+.LC217:
 	.string	"page_addr = %x, lpa=%x vpn = %d\n"
-.LC211:
+.LC218:
 	.string	"index= %x, lpa=%x\n"
-.LC212:
+.LC219:
 	.string	"block = %x, vpn=%x check vpn = %d\n"
 	.section	.rodata.ftl_sysblk_dump.str1.1,"aMS",@progbits,1
-.LC164:
+.LC171:
 	.string	"l2p:"
 	.section	.rodata.ftl_test_block.str1.1,"aMS",@progbits,1
-.LC136:
+.LC142:
 	.string	"low format %d\n"
 	.section	.rodata.ftl_update_l2p_map.str1.1,"aMS",@progbits,1
-.LC219:
+.LC226:
 	.string	"ftl_update_l2p_map: %x %x %x\n"
-.LC220:
+.LC227:
 	.string	"ftl_update_l2p_map"
-.LC221:
+.LC228:
 	.string	"lpa_tbl:"
-.LC222:
+.LC229:
 	.string	"sblk %x vpn: %d %d\n"
 	.section	.rodata.ftl_vpn_decrement.str1.1,"aMS",@progbits,1
-.LC60:
+.LC58:
 	.string	"ftl_vpn_decrement %x = %d, %d\n"
 	.section	.rodata.ftl_write_commit.str1.1,"aMS",@progbits,1
-.LC223:
+.LC231:
 	.string	"%d read error: ppa:%x, lpa:%x, status:%x\n"
 	.section	.rodata.ftl_write_completed.str1.1,"aMS",@progbits,1
-.LC68:
+.LC71:
 	.string	"ftl prog error =%x, lpa = %x, ppa= %x\n"
+.LC72:
+	.string	"ftl re prog: lpa = %x, ppa= %x\n"
 	.section	.rodata.gc_add_sblk.str1.1,"aMS",@progbits,1
-.LC42:
-	.string	"gc_add_sblk = %d, %d, %d, %d, %d, %d\n"
 .LC43:
+	.string	"gc_add_sblk = %d, %d, %d, %d, %d, %d\n"
+.LC44:
 	.string	"gc_add_sblk = %d, %d, %d,last update:%d, %d\n"
 	.section	.rodata.gc_check_data_one_wl.str1.1,"aMS",@progbits,1
-.LC216:
+.LC223:
 	.string	"gc_lpa:"
-.LC217:
+.LC224:
 	.string	"gc_ppa:"
-.LC218:
+.LC225:
 	.string	"err: ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
 	.section	.rodata.gc_do_copy_back.str1.1,"aMS",@progbits,1
-.LC224:
+.LC232:
 	.string	"gc page in buf: lpa %x ppa = %x pageindex= %x\n"
-.LC225:
+.LC233:
 	.string	"gc_do_copy_back: lpa %x des_ppa = %x %x gc_ppa= %x page_index= %d\n"
-.LC226:
+.LC234:
 	.string	"gc_do_copy_back: %x %x %x %x gc_ppa:%x %x\n"
-.LC227:
+.LC235:
 	.string	"%d prog_step: %x %x buf id= %x ppa = %x hash=%x id = %x plane = %x lpa=%x\n"
+	.section	.rodata.gc_free_bad_sblk.str1.1,"aMS",@progbits,1
+.LC60:
+	.string	"gc_free_bad_sblk 0x%x\n"
 	.section	.rodata.gc_free_src_blk.str1.1,"aMS",@progbits,1
-.LC58:
+.LC63:
 	.string	"gc_free_src_blk = %x, vpn = %d\n"
-.LC59:
+.LC64:
 	.string	"gc_free_src_blk %x, %d\n"
 	.section	.rodata.gc_free_temp_buf.str1.1,"aMS",@progbits,1
-.LC46:
+.LC48:
 	.string	"%d gc_free_temp_buf buf id= %x\n"
+	.section	.rodata.gc_mark_bad_ppa.str1.1,"aMS",@progbits,1
+.LC45:
+	.string	"gc_mark_bad_ppa %d %x %x\n"
 	.section	.rodata.gc_recovery.str1.1,"aMS",@progbits,1
-.LC186:
+.LC193:
 	.string	"ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
-.LC187:
+.LC194:
 	.string	"ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
-.LC188:
+.LC195:
 	.string	"gc_recovery: %x vpn = %x\n"
 	.section	.rodata.gc_scan_src_blk.str1.1,"aMS",@progbits,1
-.LC206:
+.LC213:
 	.string	"gc_scan_src_blk = %x, vpn = %d\n"
-.LC207:
+.LC214:
 	.string	"gc_scan_src_blk = %x, s vpn0 = %d, c vpn1 = %d\n"
 	.section	.rodata.gc_search_src_blk.str1.1,"aMS",@progbits,1
-.LC48:
+.LC50:
 	.string	"zftl_get_gc_node cache = %x index = %d vpn = %x\n"
-.LC49:
+.LC51:
 	.string	"gc_search_src_blk mode = %x, src mode = %x, count= %d %d\n"
 	.section	.rodata.gc_static_wearleveling.str1.1,"aMS",@progbits,1
-.LC75:
+.LC79:
 	.string	"gc_static_wearleveling: min blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
-.LC76:
+.LC80:
 	.string	"gc_static_wearleveling: min slc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
-.LC77:
+.LC81:
 	.string	"gc_static_wearleveling: min tlc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
-.LC78:
+.LC82:
 	.string	"gc_static_wearleveling: max slc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
-.LC79:
+.LC83:
 	.string	"gc_static_wearleveling: max xlc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
-.LC80:
+.LC84:
 	.string	"gc_static_wearleveling: slc blk: %x, tlc blk: %d avg slc ec: %d, avg tlc ec: %d \n"
-.LC81:
+.LC85:
 	.string	"gc_static_wearleveling: min slc ec: %x, min tlc ec: %d max slc ec: %d, max tlc ec: %d; %d %d\n"
-.LC82:
+.LC86:
 	.string	"swl add tlc gc = %x, %d, %d, %d, %d, %d\n"
-.LC83:
+.LC87:
 	.string	"swl add slc gc  = %x, %d, %d, %d, %d, %d\n"
 	.section	.rodata.gc_update_l2p_map_new.str1.1,"aMS",@progbits,1
-.LC202:
+.LC209:
 	.string	"gc_update_l2p_map_new sblk %x\n"
-.LC203:
+.LC210:
 	.string	"gc_update_l2p_map_new: %x %x %x\n"
-.LC204:
+.LC211:
 	.string	"lpa: %x %x %x\n"
-.LC205:
+.LC212:
 	.string	"gc_update_l2p_map_new: %x vpn = %x vpn1 = %x done\n"
 	.section	.rodata.gc_write_completed.str1.1,"aMS",@progbits,1
-.LC44:
+.LC46:
 	.string	"status: %x, ppa: %x\n"
-.LC45:
+.LC47:
 	.string	"gc_write_completed: %x  %x  %x %x\n"
 	.section	.rodata.hynix_get_read_retry_default.str1.1,"aMS",@progbits,1
-.LC94:
+.LC98:
 	.string	"otp error! %d"
-.LC95:
+.LC99:
 	.string	"rr"
 	.section	.rodata.hynix_read_retrial.str1.1,"aMS",@progbits,1
-.LC110:
+.LC114:
 	.string	"hynix RR %d row=%x, count %d, status=%d\n"
 	.section	.rodata.idb_write_data.str1.1,"aMS",@progbits,1
-.LC124:
+.LC130:
 	.string	"1 write_idblock fix data %x %x %x\n"
-.LC125:
+.LC131:
 	.string	"write_idblock check fail! %x\n"
-.LC126:
+.LC132:
 	.string	"write_idblock fail! %x\n"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",@progbits,1
-.LC177:
+.LC184:
 	.string	"region_id = %d, pm_max_region = %d\n"
-.LC178:
+.LC185:
 	.string	"load_l2p_region no ppa = %x , %x, all setting 0xff....\n"
-.LC179:
+.LC186:
 	.string	"load_l2p_region = %x,%x,%x, %x\n"
-.LC180:
+.LC187:
 	.string	"pm_ppa:"
-.LC181:
+.LC188:
 	.string	"data:"
-.LC182:
+.LC189:
 	.string	"spare:"
 	.section	.rodata.lpa_rebuild_hash.str1.1,"aMS",@progbits,1
-.LC74:
+.LC78:
 	.string	"%s %d %d\n"
 	.section	.rodata.micron_read_retrial.str1.1,"aMS",@progbits,1
-.LC105:
+.LC109:
 	.string	"micron %d row=%x,last status %d,status = %d\n"
-.LC106:
+.LC110:
 	.string	"micron RR %d row=%x,count %d,status=%d\n"
 	.section	.rodata.nand_flash_print_info.str1.1,"aMS",@progbits,1
 .LC1:
@@ -26833,89 +27191,95 @@ __func__.9952:
 .LC27:
 	.string	"TOGGLE enable: %x\n"
 .LC28:
-	.string	"MultiPlaneProgCmd: %x %x\n"
+	.string	"g_flash_slc_mode: %x %x\n"
 .LC29:
-	.string	"MultiPlaneReadCmd: %x %x\n"
+	.string	"MultiPlaneProgCmd: %x %x\n"
 .LC30:
+	.string	"MultiPlaneReadCmd: %x %x\n"
+.LC31:
 	.string	"g_flash_toggle_mode_en: %x\n"
 	.section	.rodata.nandc_init.str1.1,"aMS",@progbits,1
-.LC87:
+.LC91:
 	.string	"...%s enter... %p\n"
-.LC88:
+.LC92:
 	.string	"0:%x %x %x %x %x\n"
-.LC89:
+.LC93:
 	.string	"g_nandc_ver...%d\n"
 	.section	.rodata.nandc_xfer.str1.1,"aMS",@progbits,1
-.LC101:
+.LC105:
 	.string	"dqs data abort %x\n"
-.LC102:
+.LC106:
 	.string	"dqs data timeout %x\n"
-.LC103:
+.LC107:
 	.string	"xfer error %x\n"
 	.section	.rodata.nandc_xfer_done.str1.1,"aMS",@progbits,1
-.LC96:
+.LC100:
 	.string	"flash_abort_clear = %d\n"
-.LC97:
+.LC101:
 	.string	"%d mtrans_cnt = %d page_num = %d\n"
-.LC98:
+.LC102:
 	.string	"nandc:"
-.LC99:
+.LC103:
 	.string	"%d flReg.d32=%x %x\n"
-.LC100:
+.LC104:
 	.string	"nandc_xfer_done read error %x\n"
 	.section	.rodata.pm_alloc_new_blk.str1.1,"aMS",@progbits,1
-.LC72:
+.LC76:
 	.string	"blk %x is bad block\n"
-.LC73:
+.LC77:
 	.string	"pm_alloc_new_blk: %x %x %x %x\n"
 	.section	.rodata.pm_free_sblk.str1.1,"aMS",@progbits,1
-.LC85:
+.LC89:
 	.string	"ftl_free_no_use_map_blk %x %x %x %d\n"
 	.section	.rodata.pm_init.str1.1,"aMS",@progbits,1
-.LC183:
+.LC190:
 	.string	"pm_init posr %x %x %x\n"
-.LC184:
+.LC191:
 	.string	"pm_init recovery %x %x %x\n"
 	.section	.rodata.pm_log2phys.str1.1,"aMS",@progbits,1
-.LC185:
+.LC192:
 	.string	"pm_log2phys  lpn = %d, max lpn = %d\n"
 	.section	.rodata.pm_ppa_update_check.str1.1,"aMS",@progbits,1
-.LC176:
+.LC183:
 	.string	"%s w error lpn = %x, max ppa = %d\n"
 	.section	.rodata.pm_write_page.str1.1,"aMS",@progbits,1
-.LC153:
+.LC160:
 	.string	"pm_write_page write error: %x\n"
 	.section	.rodata.print_ftl_debug_info.str1.1,"aMS",@progbits,1
-.LC62:
+.LC65:
 	.string	"bad blk = %x, %x free blk: s:%x,t:%x,m:%x, data blk:s:%x,%x,t%x vpn: s:%x t:%x, max_vpn: %x\n"
-.LC63:
+.LC66:
 	.string	"totle w: %d MB,r: %d MB %d dv:0x%X,poc:%d\n"
-.LC64:
+.LC67:
 	.string	"gc xlc page: %d,gc slc page: %d, tmp w: %d MB\n"
-.LC65:
+.LC68:
 	.string	"slc ec: %d,%d,%d,%d,%d,tlc ec: %d,%d,%d,%d,%d\n"
-.LC66:
+.LC69:
 	.string	"gc th: tlc_tlc: %d tlc_slc: %d slc_slc: %d slc_tlc:%d free_th: %d\n"
-.LC67:
+.LC70:
 	.string	"swl : %x %x %x %x\n"
 	.section	.rodata.print_gc_debug_info.str1.1,"aMS",@progbits,1
-.LC47:
+.LC49:
 	.string	"gc: b:%x,p:%x,i:%x; free buf=%d %d free slc th: %d\n"
 	.section	.rodata.print_list_info.str1.1,"aMS",@progbits,1
-.LC54:
+.LC56:
 	.string	"list count:%p %d\n"
-.LC55:
+.LC57:
 	.string	"%d: node:%x %x %x %x, %d %d %d %d %d\n"
 	.section	.rodata.queue_wait_first_req_completed.str1.1,"aMS",@progbits,1
-.LC119:
+.LC123:
 	.string	"read: %x %x %x %x\n"
-.LC120:
+.LC124:
 	.string	"0set buf %d,status = %x, ppa = %x lun state = %d\n"
-.LC121:
+.LC125:
+	.string	"prog end %x %x error_ecc %d %d\n"
+.LC126:
 	.string	"1set buf %d,status = %x, ppa = %x lun state = %d\n"
+.LC127:
+	.string	"dp prog end %x %x error_ecc %d %d\n"
 	.section	.rodata.random_seed,"a",@progbits
 	.align	3
-	.set	.LANCHOR48,. + 0
+	.set	.LANCHOR49,. + 0
 	.type	random_seed, %object
 	.size	random_seed, 256
 random_seed:
@@ -27048,32 +27412,32 @@ random_seed:
 	.hword	17598
 	.hword	28087
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",@progbits,1
-.LC201:
+.LC208:
 	.string	"zftl_init %x\n"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
-.LC90:
+.LC94:
 	.string	"%s 0x%x:"
-.LC91:
+.LC95:
 	.string	"%x "
-.LC92:
+.LC96:
 	.string	""
-.LC93:
+.LC97:
 	.string	"%s\n"
 	.section	.rodata.sandisk_prog_test_bad_block.str1.1,"aMS",@progbits,1
-.LC40:
+.LC41:
 	.string	"bad block test:%x %x\n"
 	.section	.rodata.sblk_3d_tlc_dump_prog.str1.1,"aMS",@progbits,1
-.LC127:
+.LC133:
 	.string	"sblk_3d_tlc_dump_prog wl_addr= %x ppa = %x ppa = %x\n"
 	.section	.rodata.sblk_mlc_dump_prog.str1.1,"aMS",@progbits,1
-.LC128:
+.LC134:
 	.string	"sblk_mlc_dump_prog wl_addr= %x ppa = %x ppa = %x\n"
 	.section	.rodata.sblk_prog_page.str1.1,"aMS",@progbits,1
-.LC129:
+.LC135:
 	.string	"sblk_prog_page ppa = %x, count = %d\n"
 	.section	.rodata.toshiba_15ref_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR21,. + 0
+	.set	.LANCHOR22,. + 0
 	.type	toshiba_15ref_value, %object
 	.size	toshiba_15ref_value, 95
 toshiba_15ref_value:
@@ -27174,7 +27538,7 @@ toshiba_15ref_value:
 	.byte	0
 	.section	.rodata.toshiba_3D_slc_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR34,. + 0
+	.set	.LANCHOR35,. + 0
 	.type	toshiba_3D_slc_value, %object
 	.size	toshiba_3D_slc_value, 11
 toshiba_3D_slc_value:
@@ -27191,7 +27555,7 @@ toshiba_3D_slc_value:
 	.byte	56
 	.section	.rodata.toshiba_3D_tlc_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR33,. + 0
+	.set	.LANCHOR34,. + 0
 	.type	toshiba_3D_tlc_value, %object
 	.size	toshiba_3D_tlc_value, 399
 toshiba_3D_tlc_value:
@@ -27595,15 +27959,15 @@ toshiba_3D_tlc_value:
 	.byte	12
 	.byte	14
 	.section	.rodata.toshiba_3d_read_retrial.str1.1,"aMS",@progbits,1
-.LC107:
+.LC111:
 	.string	"toshiba SRR %d row=%x, status=%d\n"
-.LC108:
+.LC112:
 	.string	"toshiba TRR %d row=%x, status=%d\n"
-.LC109:
+.LC113:
 	.string	"toshiba RR %d row=%x,count %d,status=%d\n"
 	.section	.rodata.toshiba_A19ref_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR22,. + 0
+	.set	.LANCHOR23,. + 0
 	.type	toshiba_A19ref_value, %object
 	.size	toshiba_A19ref_value, 45
 toshiba_A19ref_value:
@@ -27654,7 +28018,7 @@ toshiba_A19ref_value:
 	.byte	0
 	.section	.rodata.toshiba_ref_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR24,. + 0
+	.set	.LANCHOR25,. + 0
 	.type	toshiba_ref_value, %object
 	.size	toshiba_ref_value, 8
 toshiba_ref_value:
@@ -27667,63 +28031,63 @@ toshiba_ref_value:
 	.byte	12
 	.byte	112
 	.section	.rodata.zftl_discard.str1.1,"aMS",@progbits,1
-.LC233:
+.LC241:
 	.string	"ftl_discard:(%x, %x, %x, %x)\n"
 	.section	.rodata.zftl_do_gc.str1.1,"aMS",@progbits,1
-.LC228:
+.LC236:
 	.string	"gc %d: %d %d %d %d %d %d %d\n"
-.LC229:
+.LC237:
 	.string	"gc %d: %d %d %d %d %d %d\n"
-.LC230:
+.LC238:
 	.string	"GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\n"
-.LC231:
+.LC239:
 	.string	"gc free %x, %d\n"
 	.section	.rodata.zftl_gc_get_free_sblk.str1.1,"aMS",@progbits,1
-.LC50:
+.LC52:
 	.string	"swl_tlc_free_mini_ec_blk alloc sblk %x\n"
-.LC51:
+.LC53:
 	.string	"zftl_get_free_sblk %x %d, %p %d %d\n"
-.LC52:
+.LC54:
 	.string	"zftl_gc_get_free_sblk %x %x %x, %d %d %d\n"
 	.section	.rodata.zftl_get_free_sblk.str1.1,"aMS",@progbits,1
-.LC53:
+.LC55:
 	.string	"swl_slc_free_mini_ec_blk alloc sblk %x\n"
 	.section	.rodata.zftl_init.str1.1,"aMS",@progbits,1
-.LC189:
-	.string	"FTL version: 6.0.14 20181128"
-.LC190:
+.LC196:
+	.string	"FTL version: 6.0.16 20190427"
+.LC197:
 	.string	"_c_user_data_density := %d\n"
-.LC191:
+.LC198:
 	.string	"_c_totle_phy_density := %d\n"
-.LC192:
+.LC199:
 	.string	"_c_totle_log_page := %d\n"
-.LC193:
+.LC200:
 	.string	"_c_totle_data_density := %d\n"
-.LC194:
+.LC201:
 	.string	"_c_ftl_pm_page_num := %d\n"
-.LC195:
+.LC202:
 	.string	"_c_ftl_byte_pre_page := %d\n"
-.LC196:
+.LC203:
 	.string	"_c_max_pm_sblk := %d\n"
-.LC197:
+.LC204:
 	.string	"_min_slc_super_block := %d\n"
-.LC198:
+.LC205:
 	.string	"_max_xlc_super_block := %d\n"
-.LC199:
+.LC206:
 	.string	"gp_ftl_ext_info %p %p %p\n"
-.LC200:
+.LC207:
 	.string	"flash info size: %d %d %d\n"
 	.section	.rodata.zftl_read.str1.1,"aMS",@progbits,1
-.LC213:
+.LC220:
 	.string	"ftl_read %x %x %x\n"
-.LC214:
+.LC221:
 	.string	"ftl_read refresh =%x, lpa = %x, ppa= %x\n"
-.LC215:
+.LC222:
 	.string	"id=%d, status = %x, lpa = %x, ppa = %x spare = %x %x %x %x\n"
 	.section	.rodata.zftl_sblk_list_init.str1.1,"aMS",@progbits,1
-.LC84:
+.LC88:
 	.string	"free blk vpn error: %x %x\n"
 	.section	.rodata.zftl_write.str1.1,"aMS",@progbits,1
-.LC232:
+.LC240:
 	.string	"ftlwrite %x %x %x %x\n"
 	.hidden	free

commit 27643361d9f25861b93e562d31cd6a944a8360e7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed May 22 10:38:14 2019 +0800

    common: android: add/update boot message
    
    Make android bootflow more clear by message.
    
    Change-Id: I6e022ae6fd22ce4b6933b085033c66b7bf79297c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index bf029fa319..313d80ed71 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -997,8 +997,10 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 
 #ifdef CONFIG_ANDROID_AB
 	/*TODO: get from pre-loader or misc partition*/
-	if (rk_avb_get_current_slot(slot_suffix))
+	if (rk_avb_get_current_slot(slot_suffix)) {
+		printf("rk_avb_get_current_slot() failed\n");
 		return -1;
+	}
 
 	AvbOps *ops;
 	AvbABData ab_data;
@@ -1089,31 +1091,39 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	char vbmeta_partition[9] = {0};
 	disk_partition_t vbmeta_part_info;
 
-	if (trusty_read_vbootkey_enable_flag(&vboot_flag))
+	if (trusty_read_vbootkey_enable_flag(&vboot_flag)) {
+		printf("Can't read vboot flag\n");
 		return -1;
+	}
 
 	if (vboot_flag) {
-		printf("SecureBoot enabled, AVB verify\n");
+		printf("Vboot=1, SecureBoot enabled, AVB verify\n");
 		if (android_slot_verify(boot_partname, &load_address,
-					slot_suffix))
+					slot_suffix)) {
+			printf("AVB verify failed\n");
 			return -1;
+		}
 	} else {
 		strcat(vbmeta_partition, ANDROID_PARTITION_VBMETA);
 		strcat(vbmeta_partition, slot_suffix);
 		part_num = part_get_info_by_name(dev_desc, vbmeta_partition,
 						 &vbmeta_part_info);
 		if (part_num < 0) {
-			printf("SecureBoot disabled, AVB skip\n");
+			printf("Not AVB images, AVB skip\n");
 			env_update("bootargs",
 				   "androidboot.verifiedbootstate=orange");
 			if (load_android_image(dev_desc, boot_partname,
-					       slot_suffix, &load_address))
+					       slot_suffix, &load_address)) {
+				printf("Android image load failed\n");
 				return -1;
+			}
 		} else {
-			printf("SecureBoot enabled, AVB verify\n");
+			printf("Vboot=0, AVB images, AVB verify\n");
 			if (android_slot_verify(boot_partname, &load_address,
-						slot_suffix))
+						slot_suffix)) {
+				printf("AVB verify failed\n");
 				return -1;
+			}
 		}
 	}
 #else
@@ -1122,8 +1132,10 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	 * Determine if this is an AOSP image.
 	 */
 	if (load_android_image(dev_desc, boot_partname,
-			       slot_suffix, &load_address))
+			       slot_suffix, &load_address)) {
+		printf("Android image load failed\n");
 		return -1;
+	}
 #endif
 
 	/* Set Android root variables. */

commit 2e6f3f4c09e03d35bfc9e08fa7b7bb5fa6fee0a1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon May 27 11:14:33 2019 +0800

    tool: rockchip: boot/trust_merger: ignore prepath when it's already exist
    
    Change-Id: I33b1b14ba7b68ab08e1e61bf98e476da3b13b56a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/tools/rockchip/boot_merger.c b/tools/rockchip/boot_merger.c
index f258f6c3c3..e8ccea3828 100644
--- a/tools/rockchip/boot_merger.c
+++ b/tools/rockchip/boot_merger.c
@@ -149,7 +149,7 @@ static inline void fixPath(char *path)
 			strcpy(path, gNewPath);
 			strcat(path, tmp);
 		}
-	} else if (gPrePath) {
+	} else if (gPrePath && strncmp(path, gPrePath, strlen(gPrePath))) {
 		strcpy(tmp, path);
 		strcpy(path, gPrePath);
 		strcat(path, tmp);
diff --git a/tools/rockchip/trust_merger.c b/tools/rockchip/trust_merger.c
index a33125e224..601d33f9d4 100644
--- a/tools/rockchip/trust_merger.c
+++ b/tools/rockchip/trust_merger.c
@@ -110,7 +110,7 @@ static inline void fixPath(char *path)
 			strcpy(path, gNewPath);
 			strcat(path, tmp);
 		}
-	} else if (gPrePath) {
+	} else if (gPrePath && strncmp(path, gPrePath, strlen(gPrePath))) {
 		strcpy(tmp, path);
 		strcpy(path, gPrePath);
 		strcat(path, tmp);

commit 05b87a4eed51c6c519fc94c54a4b9007cb77d3b3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 11 15:20:21 2019 +0800

    make.sh: remove exist image before pack
    
    Change-Id: Iea5083970bbd332ec62250a6d1e35ac09dbed533
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 707b92cb27..e1fad7b138 100755
--- a/make.sh
+++ b/make.sh
@@ -551,6 +551,7 @@ pack_loader_image()
 		return
 	fi
 
+	ls *_loader_*.bin >/dev/null && rm *_loader_*.bin
 	cd ${RKBIN}
 
 	if [ "${mode}" = 'all' ]; then
@@ -639,6 +640,7 @@ pack_trust_image()
 {
 	local mode=$1 files ini
 
+	ls trust*.img >/dev/null && rm trust*.img
 	# ARM64 uses trust_merger
 	if grep -Eq ''^CONFIG_ARM64=y'|'^CONFIG_ARM64_BOOT_AARCH32=y'' ${OUTDIR}/.config ; then
 		ini=${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST.ini

commit 4874919d228c76da877ba91248beff27a7d5baef
Author: Shengfei Xu <xsf@rock-chips.com>
Date:   Fri May 24 14:54:30 2019 +0800

    power: pmic: rk8xx: get the correct on/off source
    
    The on/off_source value has been changed,
    so we can't get the correct on/off source.
    
    Change-Id: I7c522574f5e8d3bbc3c5d73980cdccdb4717da52
    Signed-off-by: Shengfei Xu <xsf@rock-chips.com>

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index 1e5f45bfc0..f8c4f6166a 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -250,13 +250,10 @@ static int rk8xx_probe(struct udevice *dev)
 
 	printf("PMIC:  RK%x ", show_variant);
 
-	if (on_source && off_source) {
-		on_source = pmic_reg_read(dev, on_source);
-		off_source = pmic_reg_read(dev, off_source);
+	if (on_source && off_source)
 		printf("(on=0x%02x, off=0x%02x)",
 		       pmic_reg_read(dev, on_source),
 		       pmic_reg_read(dev, off_source));
-	}
 	printf("\n");
 
 	return 0;

commit cd60bf88a7eca235e4bb317d64f7cc839fa73dde
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue May 14 11:37:50 2019 +0800

    rkflash: add new spi nor flash
    
    MX25L51245G08G
    
    Change-Id: Ia4a2844d64102a1fead410f592b73892ae4870be
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/sfc_nor.c b/drivers/rkflash/sfc_nor.c
index 74f20a5798..b329a93d76 100644
--- a/drivers/rkflash/sfc_nor.c
+++ b/drivers/rkflash/sfc_nor.c
@@ -41,6 +41,8 @@ static struct flash_info spi_flash_tbl[] = {
 	{0x207018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 0, 0},
 	/* EN25QH128A */
 	{0x1c7018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 0, 0},
+	/* MX25L51245G08G */
+	{0xc2201a, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x10, 17, 6, 0},
 };
 
 static const u8 sfnor_dev_code[] = {

commit 3b47334dd77a3739d97e301d1c6203bbc8c0d87d
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Jan 11 15:02:02 2019 +0800

    rockchip: px30: add support for video phy
    
    Sync the video phy related dts node from kernel.
    
    Change-Id: If9715bff0d129397cd3c3fc2597d34863d6e2dfb
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/arch/arm/dts/px30.dtsi b/arch/arm/dts/px30.dtsi
index 55cd85cc80..b2ef14584f 100644
--- a/arch/arm/dts/px30.dtsi
+++ b/arch/arm/dts/px30.dtsi
@@ -302,6 +302,63 @@
 			compatible = "rockchip,px30-io-voltage-domain";
 			status = "disabled";
 		};
+
+		lvds: lvds {
+			compatible = "rockchip,px30-lvds";
+			phys = <&video_phy>;
+			phy-names = "phy";
+			status = "disabled";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+					#address-cells = <1>;
+					#size-cells = <0>;
+
+					lvds_in_vopb: endpoint@0 {
+						reg = <0>;
+						remote-endpoint = <&vopb_out_lvds>;
+					};
+
+					lvds_in_vopl: endpoint@1 {
+						reg = <1>;
+						remote-endpoint = <&vopl_out_lvds>;
+					};
+				};
+			};
+		};
+
+		rgb: rgb {
+			compatible = "rockchip,px30-rgb";
+			pinctrl-names = "default", "sleep";
+			pinctrl-0 = <&lcdc_m0_rgb_pins>;
+			pinctrl-1 = <&lcdc_m0_sleep_pins>;
+			status = "disabled";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+					#address-cells = <1>;
+					#size-cells = <0>;
+
+					rgb_in_vopb: endpoint@0 {
+						reg = <0>;
+						remote-endpoint = <&vopb_out_rgb>;
+					};
+
+					rgb_in_vopl: endpoint@1 {
+						reg = <1>;
+						remote-endpoint = <&vopl_out_rgb>;
+					};
+				};
+			};
+		};
 	};
 
 	core_grf: syscon@ff148000 {
@@ -696,53 +753,21 @@
 		};
 	};
 
-	mipi_dphy: mipi-dphy@ff2e0000 {
-		compatible = "rockchip,px30-mipi-dphy";
-		reg = <0x0 0xff2e0000 0x0 0x10000>;
-		clocks = <&cru SCLK_MIPIDSIPHY_REF>, <&cru PCLK_MIPIDSIPHY>;
-		clock-names = "ref", "pclk";
-		clock-output-names = "mipi_dphy_pll";
+	video_phy: video-phy@ff2e0000 {
+		compatible = "rockchip,px30-video-phy";
+		reg = <0x0 0xff2e0000 0x0 0x10000>,
+		      <0x0 0xff450000 0x0 0x10000>;
+		clocks = <&pmucru SCLK_MIPIDSIPHY_REF>,
+			 <&cru PCLK_MIPIDSIPHY>, <&cru PCLK_MIPI_DSI>;
+		clock-names = "ref", "pclk_phy", "pclk_host";
 		#clock-cells = <0>;
 		resets = <&cru SRST_MIPIDSIPHY_P>;
-		reset-names = "apb";
+		reset-names = "rst";
 		power-domains = <&power PX30_PD_VO>;
 		#phy-cells = <0>;
-		rockchip,grf = <&grf>;
 		status = "disabled";
 	};
 
-	lvds: lvds@ff2e0000 {
-		compatible = "rockchip,px30-lvds";
-		reg = <0x0 0xff2e0000 0x0 0x100>, <0x0 0xff2e0100 0x0 0x100>;
-		reg-names = "mipi_lvds_phy", "mipi_lvds_ctl";
-		clocks = <&cru PCLK_MIPIDSIPHY>, <&cru PCLK_MIPI_DSI>;
-		clock-names = "pclk_lvds", "pclk_lvds_ctl";
-		power-domains = <&power PX30_PD_VO>;
-		rockchip,grf = <&grf>;
-		status = "disabled";
-
-		ports {
-			#address-cells = <1>;
-			#size-cells = <0>;
-
-			port@0 {
-				reg = <0>;
-				#address-cells = <1>;
-				#size-cells = <0>;
-
-				lvds_in_vopl: endpoint@0 {
-					reg = <0>;
-					remote-endpoint = <&vopl_out_lvds>;
-				};
-
-				lvds_in_vopb: endpoint@1 {
-					reg = <1>;
-					remote-endpoint = <&vopb_out_lvds>;
-				};
-			};
-		};
-	};
-
 	usb20_otg: usb@ff300000 {
 		compatible = "rockchip,px30-usb", "rockchip,rk3066-usb",
 			     "snps,dwc2";
@@ -937,11 +962,11 @@
 		compatible = "rockchip,px30-mipi-dsi";
 		reg = <0x0 0xff450000 0x0 0x10000>;
 		interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru PCLK_MIPI_DSI>, <&mipi_dphy>;
+		clocks = <&cru PCLK_MIPI_DSI>, <&video_phy>;
 		clock-names = "pclk", "hs_clk";
 		resets = <&cru SRST_MIPIDSI_HOST_P>;
 		reset-names = "apb";
-		phys = <&mipi_dphy>;
+		phys = <&video_phy>;
 		phy-names = "mipi_dphy";
 		power-domains = <&power PX30_PD_VO>;
 		rockchip,grf = <&grf>;
@@ -950,7 +975,11 @@
 		status = "disabled";
 
 		ports {
-			port {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
 				#address-cells = <1>;
 				#size-cells = <0>;
 
@@ -991,6 +1020,11 @@
 				reg = <1>;
 				remote-endpoint = <&dsi_in_vopb>;
 			};
+
+			vopb_out_rgb: endpoint@2 {
+				reg = <2>;
+				remote-endpoint = <&rgb_in_vopb>;
+			};
 		};
 	};
 
@@ -1029,6 +1063,11 @@
 				reg = <1>;
 				remote-endpoint = <&dsi_in_vopl>;
 			};
+
+			vopl_out_rgb: endpoint@2 {
+				reg = <2>;
+				remote-endpoint = <&rgb_in_vopl>;
+			};
 		};
 	};
 
@@ -1968,143 +2007,68 @@
 		};
 
 		lcdc {
-			lcdc_rgb_dclk_pin: lcdc-rgb-dclk-pin {
-				rockchip,pins =
-					<3 RK_PA0 RK_FUNC_1 &pcfg_pull_none>;
-			};
-
-			lcdc_rgb_m0_hsync_pin: lcdc-rgb-m0-hsync-pin {
-				rockchip,pins =
-					<3 RK_PA1 RK_FUNC_1 &pcfg_pull_none>;
-			};
-
-			lcdc_rgb_m0_vsync_pin: lcdc-rgb-m0-vsync-pin {
-				rockchip,pins =
-					<3 RK_PA2 RK_FUNC_1 &pcfg_pull_none>;
-			};
-
-			lcdc_rgb_m0_den_pin: lcdc-rgb-m0-den-pin {
-				rockchip,pins =
-					<3 RK_PA3 RK_FUNC_1 &pcfg_pull_none>;
-			};
-
-			lcdc_rgb888_m0_data_pins: lcdc-rgb888-m0-data-pins {
-				rockchip,pins =
-					<3 RK_PA7 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d3 */
-					<3 RK_PA6 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d2 */
-					<3 RK_PA5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d1 */
-					<3 RK_PA4 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d0 */
-					<3 RK_PB3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d7 */
-					<3 RK_PB2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d6 */
-					<3 RK_PB1 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d5 */
-					<3 RK_PB0 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d4 */
-					<3 RK_PB7 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d11 */
-					<3 RK_PB6 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d10 */
-					<3 RK_PB5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d9 */
-					<3 RK_PB4 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d8 */
-					<3 RK_PC3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d15 */
-					<3 RK_PC2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d14 */
-					<3 RK_PC1 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d13 */
-					<3 RK_PC0 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d12 */
-					<3 RK_PC7 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d19 */
-					<3 RK_PC6 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d18 */
-					<3 RK_PC5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d17 */
-					<3 RK_PC4 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d16 */
-					<3 RK_PD3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d23 */
-					<3 RK_PD2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d22 */
-					<3 RK_PD1 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d21 */
-					<3 RK_PD0 RK_FUNC_1 &pcfg_pull_none>;	/* lcdc_d20 */
-			};
-
-			lcdc_rgb666_m0_data_pins: lcdc-rgb666-m0-data-pins {
-				rockchip,pins =
-					<3 RK_PA7 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d3 */
-					<3 RK_PA6 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d2 */
-					<3 RK_PA5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d1 */
-					<3 RK_PA4 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d0 */
-					<3 RK_PB3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d7 */
-					<3 RK_PB2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d6 */
-					<3 RK_PB1 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d5 */
-					<3 RK_PB0 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d4 */
-					<3 RK_PB7 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d11 */
-					<3 RK_PB6 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d10 */
-					<3 RK_PB5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d9 */
-					<3 RK_PB4 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d8 */
-					<3 RK_PC3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d15 */
-					<3 RK_PC2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d14 */
-					<3 RK_PC1 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d13 */
-					<3 RK_PC0 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d12 */
-					<3 RK_PC5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d17 */
-					<3 RK_PC4 RK_FUNC_1 &pcfg_pull_none>;	/* lcdc_d16 */
-			};
-
-			lcdc_rgb565_m0_data_pins: lcdc-rgb565-m0-data-pins {
-				rockchip,pins =
-					<3 RK_PA7 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d3 */
-					<3 RK_PA6 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d2 */
-					<3 RK_PA5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d1 */
-					<3 RK_PA4 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d0 */
-					<3 RK_PB3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d7 */
-					<3 RK_PB2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d6 */
-					<3 RK_PB1 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d5 */
-					<3 RK_PB0 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d4 */
-					<3 RK_PB7 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d11 */
-					<3 RK_PB6 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d10 */
-					<3 RK_PB5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d9 */
-					<3 RK_PB4 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d8 */
-					<3 RK_PC3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d15 */
-					<3 RK_PC2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d14 */
-					<3 RK_PC1 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d13 */
-					<3 RK_PC0 RK_FUNC_1 &pcfg_pull_none>;	/* lcdc_d12 */
-			};
-
-			lcdc_rgb888_m1_data_pins: lcdc-rgb888-m1-data-pins {
-				rockchip,pins =
-					<3 RK_PA6 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d2 */
-					<3 RK_PA4 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d0 */
-					<3 RK_PB3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d7 */
-					<3 RK_PB2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d6 */
-					<3 RK_PB5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d9 */
-					<3 RK_PC3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d15 */
-					<3 RK_PC2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d14 */
-					<3 RK_PC1 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d13 */
-					<3 RK_PC0 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d12 */
-					<3 RK_PC7 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d19 */
-					<3 RK_PC6 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d18 */
-					<3 RK_PC5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d17 */
-					<3 RK_PC4 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d16 */
-					<3 RK_PD3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d23 */
-					<3 RK_PD2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d22 */
-					<3 RK_PD1 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d21 */
-					<3 RK_PD0 RK_FUNC_1 &pcfg_pull_none>;	/* lcdc_d20 */
-			};
-
-			lcdc_rgb666_m1_data_pins: lcdc-rgb666-m1-data-pins {
-				rockchip,pins =
-					<3 RK_PA6 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d2 */
-					<3 RK_PA4 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d0 */
-					<3 RK_PB3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d7 */
-					<3 RK_PB2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d6 */
-					<3 RK_PB5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d9 */
-					<3 RK_PC3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d15 */
-					<3 RK_PC2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d14 */
-					<3 RK_PC1 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d13 */
-					<3 RK_PC0 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d12 */
-					<3 RK_PC5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d17 */
-					<3 RK_PC4 RK_FUNC_1 &pcfg_pull_none>;	/* lcdc_d16 */
-			};
-
-			lcdc_rgb565_m1_data_pins: lcdc-rgb565-m1-data-pins {
-				rockchip,pins =
-					<3 RK_PA6 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d2 */
-					<3 RK_PA4 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d0 */
-					<3 RK_PB3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d7 */
-					<3 RK_PB2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d6 */
-					<3 RK_PB5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d9 */
-					<3 RK_PC3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d15 */
-					<3 RK_PC2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d14 */
-					<3 RK_PC1 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d13 */
-					<3 RK_PC0 RK_FUNC_1 &pcfg_pull_none>;	/* lcdc_d12 */
+			lcdc_m0_rgb_pins: lcdc-m0-rgb-pins {
+				rockchip,pins =
+					<3 RK_PA0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_DCLK */
+					<3 RK_PA1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_HSYNC */
+					<3 RK_PA2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_VSYNC */
+					<3 RK_PA3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_DEN */
+					<3 RK_PA4 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D0 */
+					<3 RK_PA5 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D1 */
+					<3 RK_PA6 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D2 */
+					<3 RK_PA7 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D3 */
+					<3 RK_PB0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D4 */
+					<3 RK_PB1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D5 */
+					<3 RK_PB2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D6 */
+					<3 RK_PB3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D7 */
+					<3 RK_PB4 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D8 */
+					<3 RK_PB5 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D9 */
+					<3 RK_PB6 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D10 */
+					<3 RK_PB7 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D11 */
+					<3 RK_PC0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D12 */
+					<3 RK_PC1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D13 */
+					<3 RK_PC2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D14 */
+					<3 RK_PC3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D15 */
+					<3 RK_PC4 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D16 */
+					<3 RK_PC5 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D17 */
+					<3 RK_PC6 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D18 */
+					<3 RK_PC7 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D19 */
+					<3 RK_PD0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D20 */
+					<3 RK_PD1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D21 */
+					<3 RK_PD2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D22 */
+					<3 RK_PD3 RK_FUNC_1 &pcfg_pull_none_8ma>; /* LCDC_D23 */
+			};
+
+			lcdc_m0_sleep_pins: lcdc-m0-sleep-pins {
+				rockchip,pins =
+					<3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_DCLK */
+					<3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_HSYNC */
+					<3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_VSYNC */
+					<3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_DEN */
+					<3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D0 */
+					<3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D1 */
+					<3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D2 */
+					<3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D3 */
+					<3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D4 */
+					<3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D5 */
+					<3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D6 */
+					<3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D7 */
+					<3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D8 */
+					<3 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D9 */
+					<3 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D10 */
+					<3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D11 */
+					<3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D12 */
+					<3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D13 */
+					<3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D14 */
+					<3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D15 */
+					<3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D16 */
+					<3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D17 */
+					<3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D18 */
+					<3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D19 */
+					<3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D20 */
+					<3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D21 */
+					<3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D22 */
+					<3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; /* LCDC_D23 */
 			};
 		};
 
diff --git a/arch/arm/dts/rk3326.dtsi b/arch/arm/dts/rk3326.dtsi
new file mode 100644
index 0000000000..a887a8490e
--- /dev/null
+++ b/arch/arm/dts/rk3326.dtsi
@@ -0,0 +1,62 @@
+// SPDX-License-Identifier:     GPL-2.0+
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ */
+
+#include "px30.dtsi"
+
+&rgb {
+	phys = <&video_phy>;
+	phy-names = "phy";
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&lcdc_m1_rgb_pins>;
+	pinctrl-1 = <&lcdc_m1_sleep_pins>;
+};
+
+&pinctrl {
+	lcdc {
+		lcdc_m1_rgb_pins: lcdc-m1-rgb-pins {
+			rockchip,pins =
+				<3 RK_PA0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_DCLK */
+				<3 RK_PA4 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D0 */
+				<3 RK_PA6 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D2 */
+				<3 RK_PB2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D6 */
+				<3 RK_PB3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D7 */
+				<3 RK_PB5 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D9 */
+				<3 RK_PC0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D12 */
+				<3 RK_PC1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D13 */
+				<3 RK_PC2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D14 */
+				<3 RK_PC3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D15 */
+				<3 RK_PC4 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D16 */
+				<3 RK_PC5 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D17 */
+				<3 RK_PC6 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D18 */
+				<3 RK_PC7 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D19 */
+				<3 RK_PD0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D20 */
+				<3 RK_PD1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D21 */
+				<3 RK_PD2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D22 */
+				<3 RK_PD3 RK_FUNC_1 &pcfg_pull_none_8ma>; /* LCDC_D23 */
+		};
+
+		lcdc_m1_sleep_pins: lcdc-m1-sleep-pins {
+			rockchip,pins =
+				<3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_DCLK */
+				<3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D0 */
+				<3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D2 */
+				<3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D6 */
+				<3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D7 */
+				<3 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D9 */
+				<3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D12 */
+				<3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D13 */
+				<3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D14 */
+				<3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D15 */
+				<3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D16 */
+				<3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D17 */
+				<3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D18 */
+				<3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D19 */
+				<3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D20 */
+				<3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D21 */
+				<3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D22 */
+				<3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; /* LCDC_D23 */
+		};
+	};
+};

commit e2ce9fefd467d1b3cf44b3e37f3f138c191bf7fe
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Jan 11 15:30:58 2019 +0800

    rockchip: rk3128: add support for video phy
    
    Sync the video phy related dts node from kernel.
    
    Change-Id: I93ac2d1540934f2674702255f3f1c7913cc997d2
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/arch/arm/dts/rk3128.dtsi b/arch/arm/dts/rk3128.dtsi
index 9bac7e40d8..7216c5defd 100644
--- a/arch/arm/dts/rk3128.dtsi
+++ b/arch/arm/dts/rk3128.dtsi
@@ -375,15 +375,20 @@
 			#address-cells = <1>;
 			#size-cells = <0>;
 
-			vop_out_lvds: endpoint@1 {
-				reg = <1>;
+			vop_out_lvds: endpoint@0 {
+				reg = <0>;
 				remote-endpoint = <&lvds_in_vop>;
 			};
 
-			vop_out_dsi: endpoint@2 {
+			vop_out_dsi: endpoint@1 {
 				reg = <1>;
 				remote-endpoint = <&dsi_in_vop>;
 			};
+
+			vop_out_rgb: endpoint@2 {
+				reg = <2>;
+				remote-endpoint = <&rgb_in_vop>;
+			};
 		};
 	};
 
@@ -391,11 +396,11 @@
 		compatible = "rockchip,rk3128-mipi-dsi";
 		reg = <0x10110000 0x4000>;
 		interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru PCLK_MIPI>, <&cru HCLK_VIO_H2P>, <&mipi_dphy>;
+		clocks = <&cru PCLK_MIPI>, <&cru HCLK_VIO_H2P>, <&video_phy>;
 		clock-names = "pclk", "h2p", "hs_clk";
 		resets = <&cru SRST_VIO_MIPI_DSI>;
 		reset-names = "apb";
-		phys = <&mipi_dphy>;
+		phys = <&video_phy>;
 		phy-names = "mipi_dphy";
 		rockchip,grf = <&grf>;
 		#address-cells = <1>;
@@ -540,39 +545,19 @@
 		status = "disabled";
 	};
 
-	mipi_dphy: mipi-dphy@20038000 {
-		compatible = "rockchip,rk3128-mipi-dphy";
-		reg = <0x20038000 0x4000>;
-		clocks = <&cru SCLK_MIPI_24M>, <&cru PCLK_MIPIPHY>, <&cru HCLK_VIO_H2P>;
-		clock-names = "ref", "pclk", "h2p";
-		clock-output-names = "mipi_dphy_pll";
+	video_phy: video-phy@20038000 {
+		compatible = "rockchip,rk3128-video-phy";
+		reg = <0x20038000 0x4000>, <0x10110000 0x4000>;
+		clocks = <&cru SCLK_MIPI_24M>, <&cru PCLK_MIPIPHY>,
+			 <&cru PCLK_MIPI>;
+		clock-names = "ref", "pclk_phy", "pclk_host";
 		#clock-cells = <0>;
 		resets = <&cru SRST_MIPIPHY_P>;
-		reset-names = "apb";
+		reset-names = "rst";
 		#phy-cells = <0>;
 		status = "disabled";
 	};
 
-	lvds: lvds@20038000 {
-		compatible = "rockchip,rk3126-lvds";
-		reg = <0x20038000 0x4000>, <0x10110000 0x100>;
-		reg-names = "mipi_lvds_phy", "mipi_lvds_ctl";
-		rockchip,grf = <&grf>;
-		status = "disabled";
-
-		ports {
-			#address-cells = <1>;
-			#size-cells = <0>;
-
-			lvds_in: port@0 {
-				reg = <0>;
-				lvds_in_vop: endpoint {
-					remote-endpoint = <&vop_out_lvds>;
-				};
-			};
-		};
-	};
-
 	i2c0: i2c0@20072000 {
 		compatible = "rockchip,rk3128-i2c", "rockchip,rk3288-i2c";
 		reg = <0x20072000 0x1000>;
@@ -638,6 +623,49 @@
 	grf: syscon@20008000 {
 		compatible = "rockchip,rk3128-grf", "syscon";
 		reg = <0x20008000 0x1000>;
+
+		lvds: lvds {
+			compatible = "rockchip,rk3126-lvds";
+			phys = <&video_phy>;
+			phy-names = "phy";
+			status = "disabled";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+
+					lvds_in_vop: endpoint {
+						remote-endpoint = <&vop_out_lvds>;
+					};
+				};
+			};
+		};
+
+		rgb: rgb {
+			compatible = "rockchip,rk3128-rgb";
+			phys = <&video_phy>;
+			phy-names = "phy";
+			pinctrl-names = "default", "sleep";
+			pinctrl-0 = <&lcdc_rgb_pins>;
+			pinctrl-1 = <&lcdc_sleep_pins>;
+			status = "disabled";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+
+					rgb_in_vop: endpoint {
+						remote-endpoint = <&vop_out_rgb>;
+					};
+				};
+			};
+		};
 	};
 
 	pinctrl: pinctrl@20008000 {
@@ -772,6 +800,52 @@
 			};
 		};
 
+		lcdc {
+			lcdc_rgb_pins: lcdc-rgb-pins {
+				rockchip,pins =
+					<2 RK_PB0 1 &pcfg_pull_none>, /* LCDC_DCLK */
+					<2 RK_PB1 1 &pcfg_pull_none>, /* LCDC_HSYNC */
+					<2 RK_PB2 1 &pcfg_pull_none>, /* LCDC_VSYNC */
+					<2 RK_PB3 1 &pcfg_pull_none>, /* LCDC_DEN */
+					<2 RK_PB4 1 &pcfg_pull_none>, /* LCDC_DATA10 */
+					<2 RK_PB5 1 &pcfg_pull_none>, /* LCDC_DATA11 */
+					<2 RK_PB6 1 &pcfg_pull_none>, /* LCDC_DATA12 */
+					<2 RK_PB7 1 &pcfg_pull_none>, /* LCDC_DATA13 */
+					<2 RK_PC0 1 &pcfg_pull_none>, /* LCDC_DATA14 */
+					<2 RK_PC1 1 &pcfg_pull_none>, /* LCDC_DATA15 */
+					<2 RK_PC2 1 &pcfg_pull_none>, /* LCDC_DATA16 */
+					<2 RK_PC3 1 &pcfg_pull_none>, /* LCDC_DATA17 */
+					<2 RK_PC4 1 &pcfg_pull_none>, /* LCDC_DATA18 */
+					<2 RK_PC5 1 &pcfg_pull_none>, /* LCDC_DATA19 */
+					<2 RK_PC6 1 &pcfg_pull_none>, /* LCDC_DATA20 */
+					<2 RK_PC7 1 &pcfg_pull_none>, /* LCDC_DATA21 */
+					<2 RK_PD0 1 &pcfg_pull_none>, /* LCDC_DATA22 */
+					<2 RK_PD1 1 &pcfg_pull_none>; /* LCDC_DATA23 */
+			};
+
+			lcdc_sleep_pins: lcdc-sleep-pins {
+				rockchip,pins =
+					<2 RK_PB0 0 &pcfg_pull_none>, /* LCDC_DCLK */
+					<2 RK_PB1 0 &pcfg_pull_none>, /* LCDC_HSYNC */
+					<2 RK_PB2 0 &pcfg_pull_none>, /* LCDC_VSYNC */
+					<2 RK_PB3 0 &pcfg_pull_none>, /* LCDC_DEN */
+					<2 RK_PB4 0 &pcfg_pull_none>, /* LCDC_DATA10 */
+					<2 RK_PB5 0 &pcfg_pull_none>, /* LCDC_DATA11 */
+					<2 RK_PB6 0 &pcfg_pull_none>, /* LCDC_DATA12 */
+					<2 RK_PB7 0 &pcfg_pull_none>, /* LCDC_DATA13 */
+					<2 RK_PC0 0 &pcfg_pull_none>, /* LCDC_DATA14 */
+					<2 RK_PC1 0 &pcfg_pull_none>, /* LCDC_DATA15 */
+					<2 RK_PC2 0 &pcfg_pull_none>, /* LCDC_DATA16 */
+					<2 RK_PC3 0 &pcfg_pull_none>, /* LCDC_DATA17 */
+					<2 RK_PC4 0 &pcfg_pull_none>, /* LCDC_DATA18 */
+					<2 RK_PC5 0 &pcfg_pull_none>, /* LCDC_DATA19 */
+					<2 RK_PC6 0 &pcfg_pull_none>, /* LCDC_DATA20 */
+					<2 RK_PC7 0 &pcfg_pull_none>, /* LCDC_DATA21 */
+					<2 RK_PD0 0 &pcfg_pull_none>, /* LCDC_DATA22 */
+					<2 RK_PD1 0 &pcfg_pull_none>; /* LCDC_DATA23 */
+			};
+		};
+
 		uart0 {
 			uart0_xfer: uart0-xfer {
 				rockchip,pins = <2 RK_PD2 2 &pcfg_pull_default>,

commit 2ba7147f8008e675b31a0a5c13b8366431ea09ae
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 8 20:22:19 2019 +0800

    env: add a common env driver for block device
    
    The driver implementation refers to env/mmc.c, the storage media
    binding to block layer can use it(Nand/Nor Flash...).
    
    Support configure:
            - CONFIG_ENV_OFFSET
            - CONFIG_ENV_SIZE
            - CONFIG_ENV_OFFSET_REDUND (optional)
            - CONFIG_ENV_SIZE_REDUND (optional)
            - CONFIG_SYS_MMC_ENV_PART (optional)
    
    Change-Id: Ibb16f0dd7af1331f454784968fbdc9002f4b769c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/cmd/nvedit.c b/cmd/nvedit.c
index 83d14eb794..f5e704e178 100644
--- a/cmd/nvedit.c
+++ b/cmd/nvedit.c
@@ -52,9 +52,10 @@ DECLARE_GLOBAL_DATA_PTR;
 	!defined(CONFIG_ENV_IS_IN_SPI_FLASH)	&& \
 	!defined(CONFIG_ENV_IS_IN_REMOTE)	&& \
 	!defined(CONFIG_ENV_IS_IN_UBI)		&& \
+	!defined(CONFIG_ENV_IS_IN_BLK_DEV)	&& \
 	!defined(CONFIG_ENV_IS_NOWHERE)
 # error Define one of CONFIG_ENV_IS_IN_{EEPROM|FLASH|MMC|FAT|EXT4|\
-NAND|NVRAM|ONENAND|SATA|SPI_FLASH|REMOTE|UBI} or CONFIG_ENV_IS_NOWHERE
+NAND|NVRAM|ONENAND|SATA|SPI_FLASH|REMOTE|UBI|BLK_DEV} or CONFIG_ENV_IS_NOWHERE
 #endif
 
 /*
diff --git a/env/Kconfig b/env/Kconfig
index 9de5cae083..2a35c08090 100644
--- a/env/Kconfig
+++ b/env/Kconfig
@@ -358,6 +358,40 @@ config ENV_IS_IN_UBI
 	  You will probably want to define these to avoid a really noisy system
 	  when storing the env in UBI.
 
+config ENV_IS_IN_BLK_DEV
+	bool "Environment in a block device"
+	depends on !CHAIN_OF_TRUST && CONFIG_BLK
+	help
+	  Define this if you have an Block device which you want to use for the
+	  environment.
+
+	  - CONFIG_ENV_OFFSET:
+	  - CONFIG_ENV_SIZE:
+
+	  These two #defines specify the offset and size of the environment
+	  area within the specified Block device. These two values are in units
+	  of bytes, but must be aligned to an Block sector boundary.
+
+	  - CONFIG_ENV_OFFSET_REDUND (optional):
+
+	  Specifies a second storage area, of CONFIG_ENV_SIZE size, used to
+	  hold a redundant copy of the environment data. This provides a
+	  valid backup copy in case the other copy is corrupted, e.g. due
+	  to a power failure during a "saveenv" operation. This is handled
+	  in the same way as CONFIG_ENV_OFFSET.
+
+	  - CONFIG_ENV_SIZE_REDUND (optional):
+
+	  This value need not be set, even when CONFIG_ENV_OFFSET_REDUND is
+	  set. If this value is set, it must be set to the same value as
+	  CONFIG_ENV_SIZE.
+
+	  - CONFIG_SYS_MMC_ENV_PART (optional):
+
+	  Specifies which MMC partition the environment is stored in. If not
+	  set, defaults to partition 0, the user area. Common values might be
+	  1 (first MMC boot partition), 2 (second MMC boot partition).
+
 endchoice
 
 config ENV_AES
diff --git a/env/Makefile b/env/Makefile
index 7ce8231d9a..1d5c6db355 100644
--- a/env/Makefile
+++ b/env/Makefile
@@ -27,6 +27,7 @@ obj-$(CONFIG_ENV_IS_IN_SATA) += sata.o
 obj-$(CONFIG_ENV_IS_IN_SPI_FLASH) += sf.o
 obj-$(CONFIG_ENV_IS_IN_REMOTE) += remote.o
 obj-$(CONFIG_ENV_IS_IN_UBI) += ubi.o
+obj-$(CONFIG_ENV_IS_IN_BLK_DEV) += env_blk.o
 obj-$(CONFIG_ENV_IS_NOWHERE) += nowhere.o
 endif
 
diff --git a/env/env.c b/env/env.c
index 76a5608628..73c00545df 100644
--- a/env/env.c
+++ b/env/env.c
@@ -46,6 +46,8 @@ static enum env_location env_get_default_location(void)
 		return ENVL_SPI_FLASH;
 	else if IS_ENABLED(CONFIG_ENV_IS_IN_UBI)
 		return ENVL_UBI;
+	else if IS_ENABLED(CONFIG_ENV_IS_IN_BLK_DEV)
+		return ENVL_BLK;
 	else if IS_ENABLED(CONFIG_ENV_IS_NOWHERE)
 		return ENVL_NOWHERE;
 	else
diff --git a/env/env_blk.c b/env/env_blk.c
new file mode 100644
index 0000000000..5289dbfaa7
--- /dev/null
+++ b/env/env_blk.c
@@ -0,0 +1,290 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <environment.h>
+#include <memalign.h>
+#include <boot_rkimg.h>
+
+#define __STR(X) #X
+#define STR(X) __STR(X)
+
+#if defined(CONFIG_ENV_SIZE_REDUND) &&  \
+	(CONFIG_ENV_SIZE_REDUND != CONFIG_ENV_SIZE)
+#error CONFIG_ENV_SIZE_REDUND should be the same as CONFIG_ENV_SIZE
+#endif
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int get_env_addr(struct blk_desc *blk_desc, int copy, u32 *env_addr)
+{
+	s64 offset = CONFIG_ENV_OFFSET;
+
+#if defined(CONFIG_ENV_OFFSET_REDUND)
+	if (copy)
+		offset = CONFIG_ENV_OFFSET_REDUND;
+#endif
+	if (offset < 0)
+		return -EINVAL;
+
+	*env_addr = offset;
+
+	return 0;
+}
+
+int get_env_dev(void)
+{
+	return CONFIG_SYS_MMC_ENV_DEV;
+}
+
+#ifdef CONFIG_SYS_MMC_ENV_PART
+static unsigned char env_org_hwpart;
+
+int get_env_part(void)
+{
+	return CONFIG_SYS_MMC_ENV_PART;
+}
+
+static const char *init_blk_hwpart_for_env(struct blk_desc *blk_desc)
+{
+	enum if_type if_type;
+	const char *devtype;
+	int devnum, devpart, ret;
+
+	devtype = env_get("devtype");
+	devnum = env_get_ulong("devnum", 10, 0);
+	devpart = get_env_part();
+	if_type = if_typename_to_iftype(devtype);
+
+	env_org_hwpart = blk_desc->hwpart;
+	ret = blk_select_hwpart_devnum(if_type, devnum, devpart);
+	if (ret)
+		return "!Partition switch failed";
+
+	return NULL;
+}
+
+static void fini_blk_hwpart_for_env(void)
+{
+	enum if_type if_type;
+	const char *devtype;
+	int devnum;
+
+	devtype = env_get("devtype");
+	devnum = env_get_ulong("devnum", 10, 0);
+	if_type = if_typename_to_iftype(devtype);
+
+	blk_select_hwpart_devnum(if_type, devnum, env_org_hwpart);
+}
+#else
+static inline const char *init_blk_hwpart_for_env(struct blk_desc *blk_desc)
+{ return NULL; }
+static inline void fini_blk_hwpart_for_env(void) {}
+#endif
+
+#if defined(CONFIG_CMD_SAVEENV) && !defined(CONFIG_SPL_BUILD)
+static inline int write_env(struct blk_desc *blk_desc, unsigned long size,
+			    unsigned long offset, const void *buffer)
+{
+	uint blk_start, blk_cnt, n;
+
+	blk_start = ALIGN(offset, blk_desc->blksz) / blk_desc->blksz;
+	blk_cnt	  = ALIGN(size, blk_desc->blksz) / blk_desc->blksz;
+
+	n = blk_dwrite(blk_desc, blk_start, blk_cnt, (u_char *)buffer);
+
+	return (n == blk_cnt) ? 0 : -1;
+}
+
+static int env_blk_save(void)
+{
+	ALLOC_CACHE_ALIGN_BUFFER(env_t, env_new, 1);
+	struct blk_desc *blk_desc;
+	const char *errmsg = NULL;
+	int ret, copy = 0;
+	u32 offset;
+
+	blk_desc = rockchip_get_bootdev();
+	if (!blk_desc) {
+		puts("Can't find bootdev\n");
+		return -EIO;
+	}
+
+	errmsg = init_blk_hwpart_for_env(blk_desc);
+	if (errmsg) {
+		puts(errmsg);
+		return -EIO;
+	}
+
+	ret = env_export(env_new);
+	if (ret)
+		goto fini;
+
+#ifdef CONFIG_ENV_OFFSET_REDUND
+	if (gd->env_valid == ENV_VALID)
+		copy = 1;
+#endif
+
+	if (get_env_addr(blk_desc, copy, &offset)) {
+		ret = 1;
+		goto fini;
+	}
+
+	printf("Writing to %s%s(%s)... ", copy ? "redundant " : "",
+	       env_get("devtype"), env_get("devnum"));
+
+	if (write_env(blk_desc, CONFIG_ENV_SIZE, offset, (u_char *)env_new)) {
+		puts("failed\n");
+		ret = 1;
+		goto fini;
+	}
+
+	puts("done\n");
+	ret = 0;
+
+#ifdef CONFIG_ENV_OFFSET_REDUND
+	gd->env_valid = gd->env_valid == ENV_REDUND ? ENV_VALID : ENV_REDUND;
+#endif
+
+fini:
+	fini_blk_hwpart_for_env();
+
+	return ret;
+}
+#endif /* CONFIG_CMD_SAVEENV && !CONFIG_SPL_BUILD */
+
+static inline int read_env(struct blk_desc *blk_desc, unsigned long size,
+			   unsigned long offset, const void *buffer)
+{
+	uint blk_start, blk_cnt, n;
+
+	blk_start = ALIGN(offset, blk_desc->blksz) / blk_desc->blksz;
+	blk_cnt	  = ALIGN(size, blk_desc->blksz) / blk_desc->blksz;
+
+	n = blk_dread(blk_desc, blk_start, blk_cnt, (uchar *)buffer);
+
+	return (n == blk_cnt) ? 0 : -1;
+}
+
+#ifdef CONFIG_ENV_OFFSET_REDUND
+static int env_blk_load(void)
+{
+#if !defined(ENV_IS_EMBEDDED)
+	struct blk_desc *blk_desc;
+	const char *errmsg = NULL;
+	int read1_fail = 0, read2_fail = 0;
+	u32 offset1, offset2;
+	int ret;
+
+	ALLOC_CACHE_ALIGN_BUFFER(env_t, tmp_env1, 1);
+	ALLOC_CACHE_ALIGN_BUFFER(env_t, tmp_env2, 1);
+
+	blk_desc = rockchip_get_bootdev();
+	if (!blk_desc) {
+		puts("Can't find bootdev\n");
+		return -EIO;
+	}
+
+	errmsg = init_blk_hwpart_for_env(blk_desc);
+	if (errmsg) {
+		ret = -EIO;
+		goto err;
+	}
+
+	if (get_env_addr(blk_desc, 0, &offset1) ||
+	    get_env_addr(blk_desc, 1, &offset2)) {
+		ret = -EIO;
+		goto fini;
+	}
+
+	read1_fail = read_env(blk_desc, CONFIG_ENV_SIZE, offset1, tmp_env1);
+	read2_fail = read_env(blk_desc, CONFIG_ENV_SIZE, offset2, tmp_env2);
+
+	if (read1_fail && read2_fail)
+		puts("*** Error - No Valid Environment Area found\n");
+	else if (read1_fail || read2_fail)
+		puts("*** Warning - some problems detected "
+		     "reading environment; recovered successfully\n");
+
+	if (read1_fail && read2_fail) {
+		errmsg = "!bad CRC";
+		ret = -EIO;
+		goto fini;
+	} else if (!read1_fail && read2_fail) {
+		gd->env_valid = ENV_VALID;
+		env_import((char *)tmp_env1, 1);
+	} else if (read1_fail && !read2_fail) {
+		gd->env_valid = ENV_REDUND;
+		env_import((char *)tmp_env2, 1);
+	} else {
+		env_import_redund((char *)tmp_env1, (char *)tmp_env2);
+	}
+
+	ret = 0;
+
+fini:
+	fini_blk_hwpart_for_env();
+err:
+	if (ret)
+		set_default_env(errmsg);
+
+#endif
+	return ret;
+}
+#else /* ! CONFIG_ENV_OFFSET_REDUND */
+static int env_blk_load(void)
+{
+#if !defined(ENV_IS_EMBEDDED)
+	ALLOC_CACHE_ALIGN_BUFFER(char, buf, CONFIG_ENV_SIZE);
+	struct blk_desc *blk_desc;
+	const char *errmsg = NULL;
+	u32 offset;
+	int ret;
+
+	blk_desc = rockchip_get_bootdev();
+	if (!blk_desc) {
+		puts("Can't find bootdev\n");
+		return -EIO;
+	}
+
+	errmsg = init_blk_hwpart_for_env(blk_desc);
+	if (errmsg) {
+		ret = -EIO;
+		puts(errmsg);
+		goto err;
+	}
+
+	if (get_env_addr(blk_desc, 0, &offset)) {
+		ret = -EIO;
+		goto fini;
+	}
+
+	if (read_env(blk_desc, CONFIG_ENV_SIZE, offset, buf)) {
+		errmsg = "!read failed";
+		ret = -EIO;
+		goto fini;
+	}
+
+	env_import(buf, 1);
+	ret = 0;
+
+fini:
+	fini_blk_hwpart_for_env();
+err:
+	if (ret)
+		set_default_env(errmsg);
+#endif
+	return ret;
+}
+#endif /* CONFIG_ENV_OFFSET_REDUND */
+
+U_BOOT_ENV_LOCATION(env_blk) = {
+	.location	= ENVL_BLK,
+	ENV_NAME("ENV_BLK")
+	.load		= env_blk_load,
+#ifndef CONFIG_SPL_BUILD
+	.save		= env_save_ptr(env_blk_save),
+#endif
+};
diff --git a/include/environment.h b/include/environment.h
index 7b98216389..e328ac22fb 100644
--- a/include/environment.h
+++ b/include/environment.h
@@ -210,6 +210,7 @@ enum env_location {
 	ENVL_SPI_FLASH,
 	ENVL_UBI,
 	ENVL_NOWHERE,
+	ENVL_BLK,
 
 	ENVL_COUNT,
 	ENVL_UNKNOWN,

commit 1712dc5c34857330f320e2ecf2cd52e59a4fb9d7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 8 20:22:35 2019 +0800

    dm: blk: export if_typename_to_iftype()
    
    Change-Id: I436d431f69051861e02699e0366701a27ab5a0da
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
index b60a856daa..f258206e88 100644
--- a/drivers/block/blk-uclass.c
+++ b/drivers/block/blk-uclass.c
@@ -49,7 +49,7 @@ static enum uclass_id if_type_uclass_id[IF_TYPE_COUNT] = {
 	[IF_TYPE_SYSTEMACE]	= UCLASS_INVALID,
 };
 
-static enum if_type if_typename_to_iftype(const char *if_typename)
+enum if_type if_typename_to_iftype(const char *if_typename)
 {
 	int i;
 
diff --git a/include/blk.h b/include/blk.h
index 4eb79ed748..d1e82f574c 100644
--- a/include/blk.h
+++ b/include/blk.h
@@ -670,4 +670,12 @@ const char *blk_get_if_type_name(enum if_type if_type);
 int blk_common_cmd(int argc, char * const argv[], enum if_type if_type,
 		   int *cur_devnump);
 
+/**
+ * if_typename_to_iftype() - get iftype according to iftype name
+ *
+ * @if_typename: iftype name
+ * @return iftype index
+ */
+enum if_type if_typename_to_iftype(const char *if_typename);
+
 #endif

commit e311da245800596d57b7b7d91ebd4a730747a9ec
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu May 23 18:19:46 2019 +0800

    tools: rockchip: boot/trust_merger: add "--prepath" support
    
    Add prefix path of binary path.
    
    Change-Id: I576b9fa40f88a1ee0701f1ff776d25d4e3ed747b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/tools/rockchip/boot_merger.c b/tools/rockchip/boot_merger.c
index 923bdb75ba..f258f6c3c3 100644
--- a/tools/rockchip/boot_merger.c
+++ b/tools/rockchip/boot_merger.c
@@ -21,6 +21,7 @@ bool gDebug =
 options gOpts;
 char gLegacyPath[MAX_LINE_LEN] = { 0 };
 char gNewPath[MAX_LINE_LEN] = { 0 };
+static char *gPrePath;
 char gSubfix[MAX_LINE_LEN] = OUT_SUBFIX;
 char gEat[MAX_LINE_LEN];
 char *gConfigPath;
@@ -148,6 +149,10 @@ static inline void fixPath(char *path)
 			strcpy(path, gNewPath);
 			strcat(path, tmp);
 		}
+	} else if (gPrePath) {
+		strcpy(tmp, path);
+		strcpy(path, gPrePath);
+		strcat(path, tmp);
 	}
 }
 
@@ -976,6 +981,7 @@ static void printHelp(void)
 	printf("\t" OPT_VERSION "\t\tDisplay version information.\n");
 	printf("\t" OPT_SUBFIX "\t\tSpec subfix.\n");
 	printf("\t" OPT_REPLACE "\t\tReplace some part of binary path.\n");
+	printf("\t" OPT_PREPATH "\t\tAdd prefix path of binary path.\n");
 	printf("\t" OPT_SIZE
 	       "\t\tImage size.\"--size [image KB size]\", must be 512KB aligned\n");
 	printf("Usage2: boot_merger [options] [parameter]\n");
@@ -1021,6 +1027,9 @@ int main(int argc, char **argv)
 			snprintf(gLegacyPath, sizeof(gLegacyPath), "%s", argv[i]);
 			i++;
 			snprintf(gNewPath, sizeof(gNewPath), "%s", argv[i]);
+		} else if (!strcmp(OPT_PREPATH, argv[i])) {
+			i++;
+			gPrePath = argv[i];
 		} else if (!strcmp(OPT_SIZE, argv[i])) {
 			g_merge_max_size = strtoul(argv[++i], NULL, 10);
 			if (g_merge_max_size % 512) {
diff --git a/tools/rockchip/boot_merger.h b/tools/rockchip/boot_merger.h
index ef25a2236d..97586d7cba 100644
--- a/tools/rockchip/boot_merger.h
+++ b/tools/rockchip/boot_merger.h
@@ -186,6 +186,7 @@ typedef struct {
 #define OPT_UNPACK          "--unpack"
 #define OPT_SUBFIX          "--subfix"
 #define OPT_REPLACE         "--replace"
+#define OPT_PREPATH         "--prepath"
 #define OPT_SIZE	    "--size"
 
 #define OPT_CHIP	"-c"
diff --git a/tools/rockchip/trust_merger.c b/tools/rockchip/trust_merger.c
index 81e4da8a9b..a33125e224 100644
--- a/tools/rockchip/trust_merger.c
+++ b/tools/rockchip/trust_merger.c
@@ -51,6 +51,7 @@ static uint8_t gBuf[BL3X_FILESIZE_MAX];
 static bool gSubfix;
 static char *gLegacyPath;
 static char *gNewPath;
+static char *gPrePath;
 static uint8_t gRSAmode = RSA_SEL_2048;
 static uint8_t gSHAmode = SHA_SEL_256;
 static bool gIgnoreBL32;
@@ -109,6 +110,10 @@ static inline void fixPath(char *path)
 			strcpy(path, gNewPath);
 			strcat(path, tmp);
 		}
+	} else if (gPrePath) {
+		strcpy(tmp, path);
+		strcpy(path, gPrePath);
+		strcat(path, tmp);
 	}
 }
 
@@ -833,6 +838,7 @@ static void printHelp(void)
 	printf("\t" OPT_VERSION "\t\tDisplay version information.\n");
 	printf("\t" OPT_SUBFIX "\t\tSpec subfix.\n");
 	printf("\t" OPT_REPLACE "\t\tReplace some part of binary path.\n");
+	printf("\t" OPT_PREPATH "\t\tAdd prefix path of binary path.\n");
 	printf("\t" OPT_RSA "\t\t\tRSA mode.\"--rsa [mode]\", [mode] can be: "
 	       "0(none), 1(1024), 2(2048), 3(2048 pss).\n");
 	printf("\t" OPT_SHA
@@ -870,6 +876,9 @@ int main(int argc, char **argv)
 			gLegacyPath = argv[i];
 			i++;
 			gNewPath = argv[i];
+		} else if (!strcmp(OPT_PREPATH, argv[i])) {
+			i++;
+			gPrePath = argv[i];
 		} else if (!strcmp(OPT_RSA, argv[i])) {
 			i++;
 			if (!is_digit(*(argv[i]))) {
diff --git a/tools/rockchip/trust_merger.h b/tools/rockchip/trust_merger.h
index 2a46e60dfc..e25683fdf3 100644
--- a/tools/rockchip/trust_merger.h
+++ b/tools/rockchip/trust_merger.h
@@ -44,6 +44,7 @@
 #define OPT_UNPACK          "--unpack"
 #define OPT_SUBFIX          "--subfix"
 #define OPT_REPLACE         "--replace"
+#define OPT_PREPATH         "--prepath"
 #define OPT_RSA		    "--rsa"
 #define OPT_SHA		    "--sha"
 #define OPT_SIZE	    "--size"

commit ab64d6564f35393221188e3c6b8d2ea129c16b48
Author: Shunqing Chen <csq@rock-chips.com>
Date:   Thu May 23 10:41:05 2019 +0800

    configs: rk3399pro: enable CONFIG_CHARGER_BQ25700
    
    Change-Id: I14a521e391f124809403b9170b5b2055220d43e7
    Signed-off-by: Shunqing Chen <csq@rock-chips.com>

diff --git a/configs/rk3399pro_defconfig b/configs/rk3399pro_defconfig
index e37eeb8030..589e03ad00 100644
--- a/configs/rk3399pro_defconfig
+++ b/configs/rk3399pro_defconfig
@@ -84,6 +84,7 @@ CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
 CONFIG_POWER_FG_RK817=y
+CONFIG_CHARGER_BQ25700=y
 CONFIG_IO_DOMAIN=y
 CONFIG_ROCKCHIP_IO_DOMAIN=y
 CONFIG_DM_PMIC=y

commit d19b8cd2ae304387e7a53319e817b11949fe40b8
Author: Shunqing Chen <csq@rock-chips.com>
Date:   Thu May 16 09:19:59 2019 +0800

    power: charge: add bq25700 support
    
    Change-Id: I49c2e60ac94cea35e6a1e9ca1f713551a75e6265
    Signed-off-by: Shunqing Chen <csq@rock-chips.com>

diff --git a/Makefile b/Makefile
index 62ce8879e1..28e3e70001 100644
--- a/Makefile
+++ b/Makefile
@@ -674,7 +674,8 @@ libs-y += drivers/power/ \
 	drivers/power/battery/ \
 	drivers/power/regulator/ \
 	drivers/power/dvfs/ \
-	drivers/power/io-domain/
+	drivers/power/io-domain/ \
+	drivers/power/charge/
 libs-y += drivers/spi/
 libs-$(CONFIG_FMAN_ENET) += drivers/net/fm/
 libs-$(CONFIG_SYS_FSL_DDR) += drivers/ddr/fsl/
diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index 7462ce3e6d..a57d9c8934 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -12,6 +12,8 @@ source "drivers/power/regulator/Kconfig"
 
 source "drivers/power/dvfs/Kconfig"
 
+source "drivers/power/charge/Kconfig"
+
 config DM_CHARGE_DISPLAY
 	bool "Enable driver model for charge display support"
 	depends on DM
diff --git a/drivers/power/charge/Kconfig b/drivers/power/charge/Kconfig
new file mode 100644
index 0000000000..d3ea8a66b3
--- /dev/null
+++ b/drivers/power/charge/Kconfig
@@ -0,0 +1,6 @@
+config CHARGER_BQ25700
+	bool "BQ25700 charger support"
+	depends on DM_FUEL_GAUGE
+	help
+	  This adds support for BQ25700 charger support.
+
diff --git a/drivers/power/charge/Makefile b/drivers/power/charge/Makefile
new file mode 100644
index 0000000000..0fc2e0eeef
--- /dev/null
+++ b/drivers/power/charge/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-$(CONFIG_CHARGER_BQ25700) += bq25700_charger.o
diff --git a/drivers/power/charge/bq25700_charger.c b/drivers/power/charge/bq25700_charger.c
new file mode 100644
index 0000000000..5b6ab4a7c2
--- /dev/null
+++ b/drivers/power/charge/bq25700_charger.c
@@ -0,0 +1,390 @@
+/*
+ * (C) Copyright 2019 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/gpio.h>
+#include <dm/device.h>
+#include <power/fuel_gauge.h>
+#include <power/pmic.h>
+#include <linux/usb/phy-rockchip-inno-usb2.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define BQ25700_ID				0x25700
+#define BQ25703_ID				0x25703
+
+#define COMPAT_BQ25700				"ti,bq25700"
+#define COMPAT_BQ25703				"ti,bq25703"
+
+#define BQ25700_I2C_SPEED			100000
+#define BQ25700_CHARGE_CURRENT_1500MA		0x5C0
+#define BQ25700_SDP_INPUT_CURRENT_500MA		0xA00
+#define BQ25700_DCP_INPUT_CURRENT_1500MA	0x1E00
+#define BQ25700_DCP_INPUT_CURRENT_2000MA	0x2800
+#define BQ25700_DCP_INPUT_CURRENT_3000MA	0x3C00
+
+#define WATCHDOG_ENSABLE			(0x03 << 13)
+
+#define BQ25700_CHARGEOPTION0_REG		0x12
+#define BQ25700_CHARGECURREN_REG		0x14
+#define BQ25700_CHARGERSTAUS_REG		0x20
+#define BQ25700_INPUTVOLTAGE_REG		0x3D
+#define BQ25700_INPUTCURREN_REG			0x3F
+
+#define BQ25703_CHARGEOPTION0_REG		0x00
+#define BQ25703_CHARGECURREN_REG		0x02
+#define BQ25703_CHARGERSTAUS_REG		0x20
+#define BQ25703_INPUTVOLTAGE_REG		0x0A
+#define BQ25703_INPUTCURREN_REG			0x0E
+
+enum bq25700_table_ids {
+	/* range tables */
+	TBL_ICHG,
+	TBL_CHGMAX,
+	TBL_INPUTVOL,
+	TBL_INPUTCUR,
+	TBL_SYSVMIN,
+	TBL_OTGVOL,
+	TBL_OTGCUR,
+	TBL_EXTCON,
+};
+
+struct bq25700 {
+	struct udevice *dev;
+	struct gpio_desc typec0_enable_gpio;
+	struct gpio_desc typec1_enable_gpio;
+	u32 ichg;
+	u32 chip_id;
+};
+
+struct bq25700_range {
+	u32 min;
+	u32 max;
+	u32 step;
+};
+
+static int bq25700_read(struct bq25700 *charger, uint reg)
+{
+	u16 val;
+	int ret;
+
+	ret = dm_i2c_read(charger->dev, reg, (u8 *)&val, 2);
+	if (ret) {
+		debug("write error to device: %p register: %#x!",
+		      charger->dev, reg);
+		return ret;
+	}
+
+	return val;
+}
+
+static int bq25700_write(struct bq25700 *charger, uint reg, u16 val)
+{
+	int ret;
+
+	ret = dm_i2c_write(charger->dev, reg, (u8 *)&val, 2);
+	if (ret) {
+		debug("write error to device: %p register: %#x!",
+		      charger->dev, reg);
+		return ret;
+	}
+
+	return 0;
+}
+
+#if defined(CONFIG_POWER_FUSB302)
+static const union {
+	struct bq25700_range  rt;
+} bq25700_tables[] = {
+	/* range tables */
+	[TBL_ICHG] = { .rt = {0, 8128000, 64000} },
+	/* uV */
+	[TBL_CHGMAX] = { .rt = {0, 19200000, 16000} },
+	/* uV  max charge voltage*/
+	[TBL_INPUTVOL] = { .rt = {3200000, 19520000, 64000} },
+	/* uV  input charge voltage*/
+	[TBL_INPUTCUR] = {.rt = {0, 6350000, 50000} },
+	/*uA input current*/
+	[TBL_SYSVMIN] = { .rt = {1024000, 16182000, 256000} },
+	/* uV min system voltage*/
+	[TBL_OTGVOL] = {.rt = {4480000, 20800000, 64000} },
+	/*uV OTG volage*/
+	[TBL_OTGCUR] = {.rt = {0, 6350000, 50000} },
+};
+
+static u32 bq25700_find_idx(u32 value, enum bq25700_table_ids id)
+{
+	const struct bq25700_range *rtbl = &bq25700_tables[id].rt;
+	u32 rtbl_size;
+	u32 idx;
+
+	rtbl_size = (rtbl->max - rtbl->min) / rtbl->step + 1;
+
+	for (idx = 1;
+	     idx < rtbl_size && (idx * rtbl->step + rtbl->min <= value);
+	     idx++)
+		;
+
+	return idx - 1;
+}
+#endif
+
+static bool bq25700_charger_status(struct bq25700 *charger)
+{
+#if defined(CONFIG_POWER_FUSB302)
+	static u16 charge_flag;
+#endif
+	int state_of_charger;
+	u16 value;
+
+	value = bq25700_read(charger, BQ25700_CHARGERSTAUS_REG);
+	state_of_charger = value >> 15;
+
+#if defined(CONFIG_POWER_FUSB302)
+	if (state_of_charger) {
+		charge_flag = 1;
+	} else if (!state_of_charger && charge_flag == 1) {
+		typec_discharge();
+		charge_flag = 0;
+	}
+#endif
+
+	return state_of_charger;
+}
+
+static bool bq25703_charger_status(struct bq25700 *charger)
+{
+#if defined(CONFIG_POWER_FUSB302)
+	static u16 charge_flag;
+#endif
+	int state_of_charger;
+	u16 value;
+
+	value = bq25700_read(charger, BQ25703_CHARGERSTAUS_REG);
+	state_of_charger = value >> 15;
+
+#if defined(CONFIG_POWER_FUSB302)
+	if (state_of_charger) {
+		charge_flag = 1;
+	} else if (!state_of_charger && charge_flag == 1) {
+		typec_discharge();
+		charge_flag = 0;
+	}
+#endif
+
+	return state_of_charger;
+}
+
+static bool bq257xx_charger_status(struct udevice *dev)
+{
+	struct bq25700 *charger = dev_get_priv(dev);
+
+	if (charger->chip_id == BQ25700_ID)
+		return bq25700_charger_status(charger);
+	else
+		return bq25703_charger_status(charger);
+}
+
+static int bq25700_charger_capability(struct udevice *dev)
+{
+	return FG_CAP_CHARGER;
+}
+
+static int bq25700_get_usb_type(void)
+{
+#ifdef CONFIG_PHY_ROCKCHIP_INNO_USB2
+	return rockchip_chg_get_type();
+#else
+	return 0;
+#endif
+}
+
+static void bq25700_charger_current_init(struct bq25700 *charger)
+{
+	u16 charge_current = BQ25700_CHARGE_CURRENT_1500MA;
+	u16 sdp_inputcurrent = BQ25700_SDP_INPUT_CURRENT_500MA;
+	u16 dcp_inputcurrent = BQ25700_DCP_INPUT_CURRENT_1500MA;
+	u32 pd_inputcurrent = 0;
+#if defined(CONFIG_POWER_FUSB302)
+	u16 vol_idx, cur_idx, pd_inputvol;
+#endif
+	u16 temp;
+
+	temp = bq25700_read(charger, BQ25700_CHARGEOPTION0_REG);
+	temp &= (~WATCHDOG_ENSABLE);
+	bq25700_write(charger, BQ25700_CHARGEOPTION0_REG, temp);
+
+#if defined(CONFIG_POWER_FUSB302)
+	if (!get_pd_output_val(&pd_inputvol, &pd_inputcurrent)) {
+		printf("%s pd charge input vol:%dmv current:%dma\n",
+		       __func__, pd_inputvol, pd_inputcurrent);
+		vol_idx = bq25700_find_idx((pd_inputvol - 1280) * 1000,
+					   TBL_INPUTVOL);
+		cur_idx = bq25700_find_idx(pd_inputcurrent * 1000,
+					   TBL_INPUTCUR);
+		cur_idx  = cur_idx << 8;
+		vol_idx = vol_idx << 6;
+		if (pd_inputcurrent != 0) {
+			bq25700_write(charger, BQ25700_INPUTCURREN_REG,
+				      cur_idx);
+			bq25700_write(charger, BQ25700_INPUTVOLTAGE_REG,
+				      vol_idx);
+			charge_current = bq25700_find_idx(charger.ichg,
+							  TBL_ICHG);
+			charge_current = charge_current << 8;
+		}
+	}
+#endif
+
+	if (pd_inputcurrent == 0) {
+		if (bq25700_get_usb_type() > 1)
+			bq25700_write(charger, BQ25700_INPUTCURREN_REG,
+				      dcp_inputcurrent);
+		else
+			bq25700_write(charger, BQ25700_INPUTCURREN_REG,
+				      sdp_inputcurrent);
+	}
+
+	if (bq25700_charger_status(charger))
+		bq25700_write(charger, BQ25700_CHARGECURREN_REG,
+			      charge_current);
+}
+
+static void bq25703_charger_current_init(struct bq25700 *charger)
+{
+	u16 charge_current = BQ25700_CHARGE_CURRENT_1500MA;
+	u16 sdp_inputcurrent = BQ25700_SDP_INPUT_CURRENT_500MA;
+	u16 dcp_inputcurrent = BQ25700_DCP_INPUT_CURRENT_1500MA;
+	u32 pd_inputcurrent = 0;
+#if defined(CONFIG_POWER_FUSB302)
+	u16 vol_idx, cur_idx, pd_inputvol;
+#endif
+	u16 temp;
+
+	temp = bq25700_read(charger, BQ25703_CHARGEOPTION0_REG);
+	temp &= (~WATCHDOG_ENSABLE);
+	bq25700_write(charger, BQ25703_CHARGEOPTION0_REG, temp);
+
+#if defined(CONFIG_POWER_FUSB302)
+	if (!get_pd_output_val(&pd_inputvol, &pd_inputcurrent)) {
+		printf("%s pd charge input vol:%dmv current:%dma\n",
+		       __func__, pd_inputvol, pd_inputcurrent);
+		vol_idx = bq25700_find_idx((pd_inputvol - 1280) * 1000,
+					   TBL_INPUTVOL);
+		cur_idx = bq25700_find_idx(pd_inputcurrent * 1000,
+					   TBL_INPUTCUR);
+		cur_idx  = cur_idx << 8;
+		vol_idx = vol_idx << 6;
+		if (pd_inputcurrent != 0) {
+			bq25700_write(charger, BQ25703_INPUTCURREN_REG,
+				      cur_idx);
+			bq25700_write(charger, BQ25703_INPUTVOLTAGE_REG,
+				      vol_idx);
+			charge_current = bq25700_find_idx(charger.ichg,
+							  TBL_ICHG);
+			charge_current = charge_current << 8;
+		}
+	}
+#endif
+
+	if (pd_inputcurrent == 0) {
+		if (bq25700_get_usb_type() > 1)
+			bq25700_write(charger, BQ25703_INPUTCURREN_REG,
+				      dcp_inputcurrent);
+		else
+			bq25700_write(charger, BQ25703_INPUTCURREN_REG,
+				      sdp_inputcurrent);
+	}
+
+	if (bq25703_charger_status(charger))
+		bq25700_write(charger, BQ25703_CHARGECURREN_REG,
+			      charge_current);
+}
+
+static int bq25700_ofdata_to_platdata(struct udevice *dev)
+{
+	struct bq25700 *charger = dev_get_priv(dev);
+	const void *blob = gd->fdt_blob;
+	int node, node1;
+#if defined(CONFIG_POWER_FUSB302)
+	int port_num;
+#endif
+
+	charger->dev = dev;
+
+	node = fdt_node_offset_by_compatible(blob, 0, COMPAT_BQ25700);
+	node1 = fdt_node_offset_by_compatible(blob, 0, COMPAT_BQ25703);
+	if ((node < 0) && (node1 < 0)) {
+		printf("Can't find dts node for charger bq25700\n");
+		return -ENODEV;
+	}
+
+	if (node < 0) {
+		node = node1;
+		charger->chip_id = BQ25703_ID;
+	} else {
+		charger->chip_id = BQ25700_ID;
+	}
+
+	charger->ichg = fdtdec_get_int(blob, node, "ti,charge-current", 0);
+
+#if defined(CONFIG_POWER_FUSB302)
+	gpio_request_by_name(dev, "typec0-enable-gpios", 0,
+			     &charger.typec0_enable_gpio);
+	gpio_request_by_name(dev, "typec1-enable-gpios", 0,
+			     &charger.typec1_enable_gpio);
+
+	if (dm_gpio_is_valid(charger.typec1_enable_gpio.gpio) &&
+	    dm_gpio_is_valid(charger.typec0_enable_gpio.gpio)) {
+		port_num = get_pd_port_num();
+		if (port_num == 0) {
+			printf("fusb0 charge typec0:1 typec1:0\n");
+			dm_gpio_set_value(&charger.typec0_enable_gpio.gpio, 1);
+			dm_gpio_set_value(&charger.typec1_enable_gpio.gpio, 0);
+		} else if (port_num == 1) {
+			printf("fusb1 charge typec0:0 typec1:1\n");
+			dm_gpio_set_value(&charger.typec0_enable_gpio.gpio, 0);
+			dm_gpio_set_value(&charger.typec1_enable_gpio.gpio, 1);
+		}
+		udelay(1000 * 200);
+	}
+#endif
+
+	return 0;
+}
+
+static int bq25700_probe(struct udevice *dev)
+{
+	struct bq25700 *charger = dev_get_priv(dev);
+
+	if (charger->chip_id == BQ25700_ID)
+		bq25700_charger_current_init(charger);
+	else
+		bq25703_charger_current_init(charger);
+
+	return 0;
+}
+
+static const struct udevice_id charger_ids[] = {
+	{ .compatible = "ti,bq25700" },
+	{ .compatible = "ti,bq25703" },
+	{ },
+};
+
+static struct dm_fuel_gauge_ops charger_ops = {
+	.get_chrg_online = bq257xx_charger_status,
+	.capability = bq25700_charger_capability,
+};
+
+U_BOOT_DRIVER(bq25700_charger) = {
+	.name = "bq25700_charger",
+	.id = UCLASS_FG,
+	.probe = bq25700_probe,
+	.of_match = charger_ids,
+	.ops = &charger_ops,
+	.ofdata_to_platdata = bq25700_ofdata_to_platdata,
+	.priv_auto_alloc_size = sizeof(struct bq25700),
+};

commit 4d083e3f1920f6c8c8a6c575dcce6f057844a903
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed May 15 17:12:54 2019 +0800

    power: charge animation: add charger device support
    
    If a fuel gauge device doesn't have both charger and fuel gauge
    capabilities, try to find devices group to support that.
    
    Change-Id: I78d929e80e79bea304bb2b29f423c90ca12be16f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index b82a0f4d45..563ddf38e6 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -50,6 +50,7 @@ struct charge_image {
 struct charge_animation_priv {
 	struct udevice *pmic;
 	struct udevice *fg;
+	struct udevice *charger;
 	struct udevice *rtc;
 #ifdef CONFIG_LED
 	struct udevice *led_charging;
@@ -327,6 +328,16 @@ static int leds_update(struct udevice *dev, int soc)
 static int leds_update(struct udevice *dev, int soc) { return 0; }
 #endif
 
+static int fg_charger_get_chrg_online(struct udevice *dev)
+{
+	struct charge_animation_priv *priv = dev_get_priv(dev);
+	struct udevice *charger;
+
+	charger = priv->charger ? : priv->fg;
+
+	return fuel_gauge_get_chrg_online(charger);
+}
+
 static int charge_extrem_low_power(struct udevice *dev)
 {
 	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
@@ -343,7 +354,7 @@ static int charge_extrem_low_power(struct udevice *dev)
 
 	while (voltage < pdata->low_power_voltage + 50) {
 		/* Check charger online */
-		charging = fuel_gauge_get_chrg_online(fg);
+		charging = fg_charger_get_chrg_online(dev);
 		if (charging <= 0) {
 			printf("%s: Not charging, online=%d. Shutdown...\n",
 			       __func__, charging);
@@ -456,7 +467,7 @@ static int charge_animation_show(struct udevice *dev)
 #endif
 
 	/* Not charger online, exit */
-	charging = fuel_gauge_get_chrg_online(fg);
+	charging = fg_charger_get_chrg_online(dev);
 	if (charging <= 0) {
 		printf("Exit charge: due to charger offline\n");
 		return 0;
@@ -525,7 +536,7 @@ static int charge_animation_show(struct udevice *dev)
 		local_irq_disable();
 
 		/* Step1: Is charging now ? */
-		charging = fuel_gauge_get_chrg_online(fg);
+		charging = fg_charger_get_chrg_online(dev);
 		if (charging <= 0) {
 			printf("Not charging, online=%d. Shutdown...\n",
 			       charging);
@@ -755,6 +766,37 @@ show_images:
 	return 0;
 }
 
+static int fg_charger_get_device(struct udevice **fuel_gauge,
+				 struct udevice **charger)
+{
+	struct udevice *dev;
+	struct uclass *uc;
+	int ret, cap;
+
+	*fuel_gauge = NULL,
+	*charger = NULL;
+
+	ret = uclass_get(UCLASS_FG, &uc);
+	if (ret)
+		return ret;
+
+	for (uclass_first_device(UCLASS_FG, &dev);
+	     dev;
+	     uclass_next_device(&dev)) {
+		cap = fuel_gauge_capability(dev);
+		if (cap == (FG_CAP_CHARGER | FG_CAP_FUEL_GAUGE)) {
+			*fuel_gauge = dev;
+			*charger = NULL;
+		} else if (cap == FG_CAP_FUEL_GAUGE) {
+			*fuel_gauge = dev;
+		} else if (cap == FG_CAP_CHARGER) {
+			*charger = dev;
+		}
+	}
+
+	return (*fuel_gauge) ? 0 : -ENODEV;
+}
+
 static const struct dm_charge_display_ops charge_animation_ops = {
 	.show = charge_animation_show,
 };
@@ -774,8 +816,8 @@ static int charge_animation_probe(struct udevice *dev)
 		return ret;
 	}
 
-	/* Get fuel gauge: used for charging */
-	ret = uclass_get_device(UCLASS_FG, 0, &priv->fg);
+	/* Get fuel gauge and charger(If need) */
+	ret = fg_charger_get_device(&priv->fg, &priv->charger);
 	if (ret) {
 		if (ret == -ENODEV)
 			debug("Can't find FG\n");

commit b3271e11e6b2f16e42258b62904911b457f08ffa
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed May 15 17:10:30 2019 +0800

    power: fuel gauge: add capability callback
    
    Return "FG_CAP_FUEL_GAUGE | FG_CAP_CHARGER" as default value
    when there's not implementation, which compatibles with all fg drivers.
    
    Change-Id: Ie71e1271e504c63be42af41551e10e8c2c7d89ac
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fuel_gauge_uclass.c b/drivers/power/fuel_gauge/fuel_gauge_uclass.c
index 8d7d400109..d766c57ee9 100644
--- a/drivers/power/fuel_gauge/fuel_gauge_uclass.c
+++ b/drivers/power/fuel_gauge/fuel_gauge_uclass.c
@@ -10,6 +10,16 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+int fuel_gauge_capability(struct udevice *dev)
+{
+	const struct dm_fuel_gauge_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->capability)
+		return (FG_CAP_CHARGER | FG_CAP_FUEL_GAUGE);
+
+	return ops->capability(dev);
+}
+
 int fuel_gauge_bat_is_exist(struct udevice *dev)
 {
 	const struct dm_fuel_gauge_ops *ops = dev_get_driver_ops(dev);
diff --git a/include/power/fuel_gauge.h b/include/power/fuel_gauge.h
index cf9ef8be7e..ee6c3e5f0e 100644
--- a/include/power/fuel_gauge.h
+++ b/include/power/fuel_gauge.h
@@ -7,7 +7,12 @@
 #ifndef _FUEL_GAUGE_H_
 #define _FUEL_GAUGE_H_
 
+/* Capability */
+#define FG_CAP_FUEL_GAUGE	BIT(0)
+#define FG_CAP_CHARGER		BIT(1)
+
 struct dm_fuel_gauge_ops {
+	int (*capability)(struct udevice *dev);
 	int (*bat_is_exist)(struct udevice *dev);
 	int (*get_soc)(struct udevice *dev);
 	int (*get_voltage)(struct udevice *dev);
@@ -15,6 +20,7 @@ struct dm_fuel_gauge_ops {
 	bool (*get_chrg_online)(struct udevice *dev);
 };
 
+int fuel_gauge_capability(struct udevice *dev);
 int fuel_gauge_bat_is_exist(struct udevice *dev);
 int fuel_gauge_get_soc(struct udevice *dev);
 int fuel_gauge_get_voltage(struct udevice *dev);

commit 69cce37bfc44a8a5950acbec99b4a795403335bd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 11 09:37:28 2019 +0800

    make.sh: support "./make trust-all" command
    
    support parse "ADDR" and "OUTPUT" from *TOS.ini
    
    Change-Id: Ie98d858c832eecd7736cf3b4a020dfc91b10241c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index cad6f3ae4c..707b92cb27 100755
--- a/make.sh
+++ b/make.sh
@@ -78,7 +78,7 @@ help()
 	echo "	./make.sh [board|subcmd] [O=<dir>]"
 	echo
 	echo "	 - board: board name of defconfig"
-	echo "	 - subcmd: loader|loader-all|trust|uboot|elf|map|sym|<addr>|"
+	echo "	 - subcmd: loader|loader-all|trust|trust-all|uboot|elf|map|sym|<addr>|"
 	echo "	 - O=<dir>: assigned output directory"
 	echo
 	echo "Example:"
@@ -92,10 +92,11 @@ help()
 	echo "	After build, Images of uboot, loader and trust are all generated."
 	echo
 	echo "2. Pack helper:"
-	echo "	./make.sh trust                    --- pack trust.img"
 	echo "	./make.sh uboot                    --- pack uboot.img"
+	echo "	./make.sh trust                    --- pack trust.img"
+	echo "	./make.sh trust-all                --- pack trust img (all supported)"
 	echo "	./make.sh loader                   --- pack loader bin"
-	echo "	./make.sh loader-all	           --- pack loader bin (all supported loaders)"
+	echo "	./make.sh loader-all	           --- pack loader bin (all supported)"
 	echo
 	echo "3. Debug helper:"
 	echo "	./make.sh elf                      --- dump elf file with -D(default)"
@@ -119,7 +120,7 @@ prepare()
 	else
 		case $BOARD in
 			# Parse from exit .config
-			''|elf*|loader*|debug*|trust|uboot|map|sym)
+			''|elf*|loader*|debug*|trust*|uboot|map|sym)
 			count=`find -name .config | wc -l`
 			dir=`find -name .config`
 			# Good, find only one .config
@@ -159,7 +160,7 @@ prepare()
 		;;
 
 		#Subcmd
-		''|elf*|loader*|debug*|trust|uboot|map|sym)
+		''|elf*|loader*|debug*|trust*|uboot|map|sym)
 		;;
 
 		*)
@@ -261,7 +262,7 @@ sub_commands()
 		;;
 
 		trust)
-		pack_trust_image
+		pack_trust_image ${opt}
 		exit 0
 		;;
 
@@ -271,7 +272,7 @@ sub_commands()
 		;;
 
 		uboot)
-		pack_uboot_image
+		pack_uboot_image ${opt}
 		exit 0
 		;;
 
@@ -569,55 +570,99 @@ pack_loader_image()
 	cd - && mv ${RKBIN}/*_loader_*.bin ./
 }
 
-pack_trust_image()
+__pack_32bit_trust_image()
 {
-	local TOS TOS_TA DARM_BASE TEE_LOAD_ADDR TEE_OFFSET=0x8400000
+	local ini=$1 TOS TOS_TA DARM_BASE TEE_LOAD_ADDR TEE_OUTPUT TEE_OFFSET
 
-	# ARM64 uses trust_merger
-	if grep -Eq ''^CONFIG_ARM64=y'|'^CONFIG_ARM64_BOOT_AARCH32=y'' ${OUTDIR}/.config ; then
-		if [ ! -f ${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST.ini ]; then
-			echo "pack trust failed! Can't find: ${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST.ini"
-			return
-		fi
+	if [ ! -f ${ini} ]; then
+		echo "pack trust failed! Can't find: ${ini}"
+		return
+	fi
 
-		cd ${RKBIN}
-		${RKTOOLS}/trust_merger ${PLATFORM_SHA} ${PLATFORM_RSA} ${PLATFORM_TRUST_IMG_SIZE} ${BIN_PATH_FIXUP} \
-					${PACK_IGNORE_BL32} ${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST.ini
+	# Parse orignal path
+	TOS=`sed -n "/TOS=/s/TOS=//p" ${ini} |tr -d '\r'`
+	TOS_TA=`sed -n "/TOSTA=/s/TOSTA=//p" ${ini} |tr -d '\r'`
 
-		cd - && mv ${RKBIN}/trust.img ./trust.img
-		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST.ini"
-	# ARM uses loaderimage
+	# Parse address and output name
+	TEE_OUTPUT=`sed -n "/OUTPUT=/s/OUTPUT=//p" ${ini} |tr -d '\r'`
+	if [ "$TEE_OUTPUT" = "" ]; then
+		TEE_OUTPUT="./trust.img"
+	fi
+	TEE_OFFSET=`sed -n "/ADDR=/s/ADDR=//p" ${ini} |tr -d '\r'`
+	if [ "$TEE_OFFSET" = "" ]; then
+		TEE_OFFSET=0x8400000
+	fi
+
+	# OP-TEE is 132M(0x8400000) offset from DRAM base.
+	DARM_BASE=`sed -n "/CONFIG_SYS_SDRAM_BASE=/s/CONFIG_SYS_SDRAM_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
+	TEE_LOAD_ADDR=$((DARM_BASE+TEE_OFFSET))
+
+	# Convert Dec to Hex
+	TEE_LOAD_ADDR=$(echo "obase=16;${TEE_LOAD_ADDR}"|bc)
+
+	# Replace "./tools/rk_tools/" with "./" to compatible legacy ini content of rkdevelop branch
+	TOS=$(echo ${TOS} | sed "s/tools\/rk_tools\//\.\//g")
+	TOS_TA=$(echo ${TOS_TA} | sed "s/tools\/rk_tools\//\.\//g")
+
+	if [ $TOS_TA ]; then
+		${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ${TEE_OUTPUT} ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
+	elif [ $TOS ]; then
+		${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS}    ${TEE_OUTPUT} ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
 	else
-		if [ ! -f ${RKBIN}/RKTRUST/${RKCHIP_TRUST}TOS.ini ]; then
-			echo "pack trust failed! Can't find: ${RKBIN}/RKTRUST/${RKCHIP_TRUST}TOS.ini"
-			return
-		fi
+		echo "Can't find any tee bin"
+		exit 1
+	fi
 
-		# OP-TEE is 132M(0x8400000) offset from DRAM base.
-		DARM_BASE=`sed -n "/CONFIG_SYS_SDRAM_BASE=/s/CONFIG_SYS_SDRAM_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
-		TEE_LOAD_ADDR=$((DARM_BASE+TEE_OFFSET))
+	echo "pack trust okay! Input: ${ini}"
+	echo
+}
+
+__pack_64bit_trust_image()
+{
+	local ini=$1
+
+	if [ ! -f ${ini} ]; then
+		echo "pack trust failed! Can't find: ${ini}"
+		return
+	fi
 
-		# Convert Dec to Hex
-		TEE_LOAD_ADDR=$(echo "obase=16;${TEE_LOAD_ADDR}"|bc)
+	cd ${RKBIN}
+	${RKTOOLS}/trust_merger ${PLATFORM_SHA} ${PLATFORM_RSA} ${PLATFORM_TRUST_IMG_SIZE} ${BIN_PATH_FIXUP} \
+				${PACK_IGNORE_BL32} ${ini}
 
-		# Parse orignal path
-		TOS=`sed -n "/TOS=/s/TOS=//p" ${RKBIN}/RKTRUST/${RKCHIP_TRUST}TOS.ini|tr -d '\r'`
-		TOS_TA=`sed -n "/TOSTA=/s/TOSTA=//p" ${RKBIN}/RKTRUST/${RKCHIP_TRUST}TOS.ini|tr -d '\r'`
+	cd - && mv ${RKBIN}/trust*.img ./
+	echo "pack trust okay! Input: ${ini}"
+	echo
+}
 
-		# replace "./tools/rk_tools/" with "./" to compatible legacy ini content of rkdevelop branch
-		TOS=$(echo ${TOS} | sed "s/tools\/rk_tools\//\.\//g")
-		TOS_TA=$(echo ${TOS_TA} | sed "s/tools\/rk_tools\//\.\//g")
+pack_trust_image()
+{
+	local mode=$1 files ini
 
-		if [ $TOS_TA ]; then
-			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ./trust.img ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
-		elif [ $TOS ]; then
-			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS}    ./trust.img ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
+	# ARM64 uses trust_merger
+	if grep -Eq ''^CONFIG_ARM64=y'|'^CONFIG_ARM64_BOOT_AARCH32=y'' ${OUTDIR}/.config ; then
+		ini=${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST.ini
+		if [ "${mode}" = 'all' ]; then
+			files=`ls ${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST*.ini`
+			for ini in $files
+			do
+				__pack_64bit_trust_image ${ini}
+			done
 		else
-			echo "Can't find any tee bin"
-			exit 1
+			__pack_64bit_trust_image ${ini}
+		fi
+	# ARM uses loaderimage
+	else
+		ini=${RKBIN}/RKTRUST/${RKCHIP_TRUST}TOS.ini
+		if [ "${mode}" = 'all' ]; then
+			files=`ls ${RKBIN}/RKTRUST/${RKCHIP_TRUST}TOS*.ini`
+			for ini in $files
+			do
+				__pack_32bit_trust_image ${ini}
+			done
+		else
+			__pack_32bit_trust_image ${ini}
 		fi
-
-		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKCHIP_TRUST}TOS.ini"
 	fi
 }
 

commit cd2acdbee7741e3cc01f738000598ec23cd5008a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue May 14 19:43:58 2019 +0800

    rockchip: rk3128: add firmware load address for small ram board
    
    - Since avb use sysmem alloc, we can decrease malloc size;
    - The typical request is 128M ram board;
    
    Note: trust.img should be placed in low memory address.
    
    Change-Id: Iba6564710b130d26fdf6b4edfd013b1352216250
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h
index aaa2d22684..414c51b9c5 100644
--- a/include/configs/rk3128_common.h
+++ b/include/configs/rk3128_common.h
@@ -11,7 +11,7 @@
 
 #define CONFIG_SYS_MAXARGS		16
 #define CONFIG_BAUDRATE			115200
-#define CONFIG_SYS_MALLOC_LEN		(192 << 20)
+#define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
@@ -52,6 +52,13 @@
 /* usb mass storage */
 #define CONFIG_USB_FUNCTION_MASS_STORAGE
 
+#define ENV_MEM_LAYOUT_SETTINGS1 \
+	"scriptaddr1=0x60500000\0" \
+	"pxefile_addr1_r=0x60600000\0" \
+	"fdt_addr1_r=0x61700000\0" \
+	"kernel_addr1_r=0x62008000\0" \
+	"ramdisk_addr1_r=0x63000000\0"
+
 #define ENV_MEM_LAYOUT_SETTINGS \
 	"scriptaddr=0x60500000\0" \
 	"pxefile_addr_r=0x60600000\0" \
@@ -62,6 +69,7 @@
 #include <config_distro_bootcmd.h>
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	ENV_MEM_LAYOUT_SETTINGS \
+	ENV_MEM_LAYOUT_SETTINGS1 \
 	"partitions=" PARTS_DEFAULT \
 	ROCKCHIP_DEVICE_SETTINGS \
 	RKIMG_DET_BOOTDEV \

commit 4dfe920a3abf50af23960fc89ab78782a071ecdc
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue May 14 19:42:10 2019 +0800

    rockchip: board: add firmware load address env fixup
    
    Sometimes, we need to adjust fimware load address accroding
    to board ram size, so we define another group of load address
    to override the orignal group.
    
    Change-Id: Ic23629d05db822111d7a270eec0b316df7865b86
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 378598a344..4137b6998e 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -214,15 +214,34 @@ int init_kernel_dtb(void)
 
 void board_env_fixup(void)
 {
-	ulong kernel_addr_r;
-
-	if (gd->flags & GD_FLG_BL32_ENABLED)
-		return;
+	char *addr_r;
+#ifdef ENV_MEM_LAYOUT_SETTINGS1
+	const char *env_addr0[] = {
+		"scriptaddr", "pxefile_addr_r",
+		"fdt_addr_r", "kernel_addr_r", "ramdisk_addr_r",
+	};
+	const char *env_addr1[] = {
+		"scriptaddr1", "pxefile_addr1_r",
+		"fdt_addr1_r", "kernel_addr1_r", "ramdisk_addr1_r",
+	};
+	int i;
 
+	/* 128M is a typical ram size for most platform, so as default here */
+	if (gd->ram_size <= SZ_128M) {
+		/* Replace orignal xxx_addr_r */
+		for (i = 0; i < ARRAY_SIZE(env_addr1); i++) {
+			addr_r = env_get(env_addr1[i]);
+			if (addr_r)
+				env_set(env_addr0[i], addr_r);
+		}
+	}
+#endif
 	/* If bl32 is disabled, maybe kernel can be load to lower address. */
-	kernel_addr_r = env_get_ulong("kernel_addr_no_bl32_r", 16, -1);
-	if (kernel_addr_r != -1)
-		env_set_hex("kernel_addr_r", kernel_addr_r);
+	if (!(gd->flags & GD_FLG_BL32_ENABLED)) {
+		addr_r = env_get("kernel_addr_no_bl32_r");
+		if (addr_r)
+			env_set("kernel_addr_r", addr_r);
+	}
 }
 
 static void early_bootrom_download(void)

commit 503a892f5a3eec2c981d9247e68efcfb94321d13
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue May 14 19:39:19 2019 +0800

    common: android: avb support load android image separate
    
    Skip fdt and ramdisk relocation to save boot time.
    
    Change-Id: I56fd2fca97fa7795024aa542f0a45d0512be01d4
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 4083ac7507..bf029fa319 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -659,9 +659,14 @@ static AvbSlotVerifyResult android_slot_verify(char *boot_partname,
 		load_address -= hdr->page_size;
 		*android_load_address = load_address;
 
+#ifdef CONFIG_ANDROID_BOOT_IMAGE_SEPARATE
+		android_image_load_separate(hdr, NULL,
+					    (void *)load_address, hdr);
+#else
 		memcpy((uint8_t *)load_address,
 		       slot_data[0]->loaded_partitions->data,
 		       slot_data[0]->loaded_partitions->data_size);
+#endif
 	} else {
 		slot_set_unbootable(&ab_data.slots[slot_index_to_boot]);
 	}
@@ -951,17 +956,6 @@ static int load_android_image(struct blk_desc *dev_desc,
 	return 0;
 }
 
-static bool avb_enabled;
-void android_avb_set_enabled(bool enable)
-{
-	avb_enabled = enable;
-}
-
-bool android_avb_is_enabled(void)
-{
-	return avb_enabled;
-}
-
 int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 				 unsigned long load_address)
 {
@@ -1100,7 +1094,6 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 
 	if (vboot_flag) {
 		printf("SecureBoot enabled, AVB verify\n");
-		android_avb_set_enabled(true);
 		if (android_slot_verify(boot_partname, &load_address,
 					slot_suffix))
 			return -1;
@@ -1113,13 +1106,11 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 			printf("SecureBoot disabled, AVB skip\n");
 			env_update("bootargs",
 				   "androidboot.verifiedbootstate=orange");
-			android_avb_set_enabled(false);
 			if (load_android_image(dev_desc, boot_partname,
 					       slot_suffix, &load_address))
 				return -1;
 		} else {
 			printf("SecureBoot enabled, AVB verify\n");
-			android_avb_set_enabled(true);
 			if (android_slot_verify(boot_partname, &load_address,
 						slot_suffix))
 				return -1;
diff --git a/common/image-android.c b/common/image-android.c
index 67cc083916..4e1e185b27 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -194,37 +194,28 @@ ulong android_image_get_kload(const struct andr_img_hdr *hdr)
 int android_image_get_ramdisk(const struct andr_img_hdr *hdr,
 			      ulong *rd_data, ulong *rd_len)
 {
-	bool avb_enabled = false;
-
-#ifdef CONFIG_ANDROID_BOOTLOADER
-	avb_enabled = android_avb_is_enabled();
-#endif
-
 	if (!hdr->ramdisk_size) {
 		*rd_data = *rd_len = 0;
 		return -1;
 	}
 
-	/*
-	 * We have load ramdisk at "ramdisk_addr_r" when android avb is
-	 * disabled and CONFIG_ANDROID_BOOT_IMAGE_SEPARATE enabled.
-	 */
-	if (!avb_enabled && IS_ENABLED(CONFIG_ANDROID_BOOT_IMAGE_SEPARATE)) {
-		ulong ramdisk_addr_r;
-
-		ramdisk_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0);
-		if (!ramdisk_addr_r) {
-			printf("No Found Ramdisk Load Address.\n");
-			return -1;
-		}
+	/* We have load ramdisk at "ramdisk_addr_r" */
+#ifdef CONFIG_ANDROID_BOOT_IMAGE_SEPARATE
+	ulong ramdisk_addr_r;
 
-		*rd_data = ramdisk_addr_r;
-	} else {
-		*rd_data = (unsigned long)hdr;
-		*rd_data += hdr->page_size;
-		*rd_data += ALIGN(hdr->kernel_size, hdr->page_size);
+	ramdisk_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0);
+	if (!ramdisk_addr_r) {
+		printf("No Found Ramdisk Load Address.\n");
+		return -1;
 	}
 
+	*rd_data = ramdisk_addr_r;
+#else
+	*rd_data = (unsigned long)hdr;
+	*rd_data += hdr->page_size;
+	*rd_data += ALIGN(hdr->kernel_size, hdr->page_size);
+#endif
+
 	*rd_len = hdr->ramdisk_size;
 
 	printf("RAM disk load addr 0x%08lx size %u KiB\n",
@@ -236,40 +227,30 @@ int android_image_get_ramdisk(const struct andr_img_hdr *hdr,
 int android_image_get_fdt(const struct andr_img_hdr *hdr,
 			      ulong *rd_data)
 {
-	bool avb_enabled = false;
-
-#ifdef CONFIG_ANDROID_BOOTLOADER
-	avb_enabled = android_avb_is_enabled();
-#endif
-
 	if (!hdr->second_size) {
 		*rd_data = 0;
 		return -1;
 	}
 
-	/*
-	 * We have load fdt at "fdt_addr_r" when android avb is
-	 * disabled and CONFIG_ANDROID_BOOT_IMAGE_SEPARATE enabled;
-	 * or CONFIG_USING_KERNEL_DTB is enabled.
-	 */
-	if (IS_ENABLED(CONFIG_USING_KERNEL_DTB) ||
-	    (!avb_enabled && IS_ENABLED(CONFIG_ANDROID_BOOT_IMAGE_SEPARATE))) {
-		ulong fdt_addr_r;
-
-		fdt_addr_r = env_get_ulong("fdt_addr_r", 16, 0);
-		if (!fdt_addr_r) {
-			printf("No Found FDT Load Address.\n");
-			return -1;
-		}
+	/* We have load fdt at "fdt_addr_r" */
+#if defined(CONFIG_USING_KERNEL_DTB) || \
+    defined(CONFIG_ANDROID_BOOT_IMAGE_SEPARATE)
+	ulong fdt_addr_r;
 
-		*rd_data = fdt_addr_r;
-	} else {
-		*rd_data = (unsigned long)hdr;
-		*rd_data += hdr->page_size;
-		*rd_data += ALIGN(hdr->kernel_size, hdr->page_size);
-		*rd_data += ALIGN(hdr->ramdisk_size, hdr->page_size);
+	fdt_addr_r = env_get_ulong("fdt_addr_r", 16, 0);
+	if (!fdt_addr_r) {
+		printf("No Found FDT Load Address.\n");
+		return -1;
 	}
 
+	*rd_data = fdt_addr_r;
+#else
+	*rd_data = (unsigned long)hdr;
+	*rd_data += hdr->page_size;
+	*rd_data += ALIGN(hdr->kernel_size, hdr->page_size);
+	*rd_data += ALIGN(hdr->ramdisk_size, hdr->page_size);
+#endif
+
 	printf("FDT load addr 0x%08x size %u KiB\n",
 	       hdr->second_addr, DIV_ROUND_UP(hdr->second_size, 1024));
 
@@ -277,53 +258,70 @@ int android_image_get_fdt(const struct andr_img_hdr *hdr,
 }
 
 #ifdef CONFIG_ANDROID_BOOT_IMAGE_SEPARATE
-static int android_image_load_separate(struct blk_desc *dev_desc,
-				       struct andr_img_hdr *hdr,
-				       const disk_partition_t *part,
-				       void *android_load_address)
+int android_image_load_separate(struct andr_img_hdr *hdr,
+				const disk_partition_t *part,
+				void *load_address, void *ram_src)
 {
+	struct blk_desc *dev_desc = rockchip_get_bootdev();
 	ulong fdt_addr_r = env_get_ulong("fdt_addr_r", 16, 0);
+	char *fdt_high = env_get("fdt_high");
+	char *ramdisk_high = env_get("initrd_high");
 	ulong blk_start, blk_cnt, size;
 	int ret, blk_read = 0;
+	ulong start;
 
 	if (hdr->kernel_size) {
 		size = hdr->kernel_size + hdr->page_size;
-		blk_start = part->start;
 		blk_cnt = DIV_ROUND_UP(size, dev_desc->blksz);
 		if (!sysmem_alloc_base(MEMBLK_ID_KERNEL,
-				       (phys_addr_t)android_load_address,
+				       (phys_addr_t)load_address,
 				       blk_cnt * dev_desc->blksz))
 			return -ENXIO;
 
-		ret = blk_dread(dev_desc, blk_start,
-				blk_cnt, android_load_address);
-		if (ret != blk_cnt) {
-			debug("%s: read kernel failed, ret=%d\n",
-			      __func__, ret);
-			return -1;
+		if (ram_src) {
+			start = (ulong)ram_src;
+			memcpy((char *)load_address,
+			       (char *)start, hdr->kernel_size);
+		} else {
+			blk_start = part->start;
+			ret = blk_dread(dev_desc, blk_start,
+					blk_cnt, load_address);
+			if (ret != blk_cnt) {
+				debug("%s: read kernel failed, ret=%d\n",
+				      __func__, ret);
+				return -1;
+			}
+			blk_read += ret;
 		}
-		blk_read += ret;
 	}
 
 	if (hdr->ramdisk_size) {
 		ulong ramdisk_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0);
 
 		size = hdr->page_size + ALIGN(hdr->kernel_size, hdr->page_size);
-		blk_start = part->start + DIV_ROUND_UP(size, dev_desc->blksz);
 		blk_cnt = DIV_ROUND_UP(hdr->ramdisk_size, dev_desc->blksz);
 		if (!sysmem_alloc_base(MEMBLK_ID_RAMDISK,
 				       ramdisk_addr_r,
 				       blk_cnt * dev_desc->blksz))
 			return -ENXIO;
-
-		ret = blk_dread(dev_desc, blk_start,
-				blk_cnt, (void *)ramdisk_addr_r);
-		if (ret != blk_cnt) {
-			debug("%s: read ramdisk failed, ret=%d\n",
-			      __func__, ret);
-			return -1;
+		if (ram_src) {
+			start = (unsigned long)ram_src;
+			start += hdr->page_size;
+			start += ALIGN(hdr->kernel_size, hdr->page_size);
+			memcpy((char *)ramdisk_addr_r,
+			       (char *)start, hdr->ramdisk_size);
+		} else {
+			blk_start = part->start +
+				DIV_ROUND_UP(size, dev_desc->blksz);
+			ret = blk_dread(dev_desc, blk_start,
+					blk_cnt, (void *)ramdisk_addr_r);
+			if (ret != blk_cnt) {
+				debug("%s: read ramdisk failed, ret=%d\n",
+				      __func__, ret);
+				return -1;
+			}
+			blk_read += ret;
 		}
-		blk_read += ret;
 	}
 
 	if ((gd->fdt_blob != (void *)fdt_addr_r) && hdr->second_size) {
@@ -345,7 +343,6 @@ static int android_image_load_separate(struct blk_desc *dev_desc,
 		size = hdr->page_size +
 		       ALIGN(hdr->kernel_size, hdr->page_size) +
 		       ALIGN(hdr->ramdisk_size, hdr->page_size);
-		blk_start = part->start + DIV_ROUND_UP(size, dev_desc->blksz);
 		blk_cnt = DIV_ROUND_UP(hdr->second_size, dev_desc->blksz);
 		if (!sysmem_alloc_base(MEMBLK_ID_FDT_AOSP,
 				       fdt_addr_r,
@@ -353,16 +350,42 @@ static int android_image_load_separate(struct blk_desc *dev_desc,
 				       CONFIG_SYS_FDT_PAD))
 			return -ENXIO;
 
-		ret = blk_dread(dev_desc, blk_start, blk_cnt, (void *)fdt_addr_r);
-		if (ret != blk_cnt) {
-			debug("%s: read dtb failed, ret=%d\n", __func__, ret);
-			return -1;
-		}
+		if (ram_src) {
+			start = (unsigned long)ram_src;
+			start += hdr->page_size;
+			start += ALIGN(hdr->kernel_size, hdr->page_size);
+			start += ALIGN(hdr->ramdisk_size, hdr->page_size);
+			memcpy((char *)fdt_addr_r,
+			       (char *)start, hdr->second_size);
+		} else {
+			blk_start = part->start +
+					DIV_ROUND_UP(size, dev_desc->blksz);
+			ret = blk_dread(dev_desc, blk_start, blk_cnt,
+					(void *)fdt_addr_r);
+			if (ret != blk_cnt) {
+				debug("%s: read dtb failed, ret=%d\n",
+				      __func__, ret);
+				return -1;
+			}
 
-		blk_read += blk_cnt;
+			blk_read += blk_cnt;
+		}
 #endif /* CONFIG_RKIMG_BOOTLOADER */
 	}
 
+	if (blk_read > 0 || ram_src) {
+		if (!fdt_high) {
+			env_set_hex("fdt_high", -1UL);
+			printf("Fdt ");
+		}
+		if (!ramdisk_high) {
+			env_set_hex("initrd_high", -1UL);
+			printf("Ramdisk ");
+		}
+		if (!fdt_high || !ramdisk_high)
+			printf("skip relocation\n");
+	}
+
 	return blk_read;
 }
 #endif /* CONFIG_ANDROID_BOOT_IMAGE_SEPARATE */
@@ -451,36 +474,17 @@ long android_image_load(struct blk_desc *dev_desc,
 			      blk_cnt, load_address);
 
 #ifdef CONFIG_ANDROID_BOOT_IMAGE_SEPARATE
-			if (!android_avb_is_enabled()) {
-				char *fdt_high = env_get("fdt_high");
-				char *ramdisk_high = env_get("initrd_high");
-
-				blk_read =
-				android_image_load_separate(dev_desc, hdr,
-							    part_info, buf);
-				if (blk_read > 0) {
-					if (!fdt_high) {
-						env_set_hex("fdt_high", -1UL);
-						printf("Fdt ");
-					}
-					if (!ramdisk_high) {
-						env_set_hex("initrd_high", -1UL);
-						printf("Ramdisk ");
-					}
-					if (!fdt_high || !ramdisk_high)
-						printf("skip relocation\n");
-				}
-			} else
+			blk_read =
+			android_image_load_separate(hdr, part_info, buf, NULL);
+#else
+			if (!sysmem_alloc_base(MEMBLK_ID_ANDROID,
+					       (phys_addr_t)buf,
+						blk_cnt * part_info->blksz))
+				return -ENXIO;
+
+			blk_read = blk_dread(dev_desc, part_info->start,
+					     blk_cnt, buf);
 #endif
-			{
-				if (!sysmem_alloc_base(MEMBLK_ID_ANDROID,
-						       (phys_addr_t)buf,
-							blk_cnt * part_info->blksz))
-					return -ENXIO;
-
-				blk_read = blk_dread(dev_desc, part_info->start,
-						     blk_cnt, buf);
-			}
 		}
 
 		/*
diff --git a/include/android_bootloader.h b/include/android_bootloader.h
index c591390434..15498b7fe3 100644
--- a/include/android_bootloader.h
+++ b/include/android_bootloader.h
@@ -94,10 +94,4 @@ char *android_str_append(char *base_name, char *slot_suffix);
  */
 int android_fdt_overlay_apply(void *fdt_addr);
 
-/** android_avb_is_enabled- get avb enable state.
- * *
- * @return true on enabled, otherwise disabled;
- */
-bool android_avb_is_enabled(void);
-
 #endif  /* __ANDROID_BOOTLOADER_H */
diff --git a/include/image.h b/include/image.h
index 11c65292ba..975cc572e3 100644
--- a/include/image.h
+++ b/include/image.h
@@ -1274,6 +1274,20 @@ ulong android_image_get_end(const struct andr_img_hdr *hdr);
 ulong android_image_get_kload(const struct andr_img_hdr *hdr);
 void android_print_contents(const struct andr_img_hdr *hdr);
 
+/** android_image_load_separate - Load an Android Image separate from storage or ram
+ *
+ * Load an Android Image based on the header size in the storage or ram.
+ *
+ * @hdr:		The android image header
+ * @part:		The partition where to read the image from
+ * @load_address:	The address where the image will be loaded
+ * @ram_src:		The ram source to load, if NULL load from partition
+ * @return the blk count.
+ */
+int android_image_load_separate(struct andr_img_hdr *hdr,
+				const disk_partition_t *part,
+				void *load_address, void *ram_src);
+
 /** android_image_load - Load an Android Image from storage.
  *
  * Load an Android Image based on the header size in the storage.

commit 89151b4aadb381865c9dc02832b1775904ca2d8f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue May 14 19:50:30 2019 +0800

    lib: avb: use sysmem alloc to load image
    
    Using malloc buffer to load image makes CONFIG_SYS_MALLOC_LEN must be
    large enough, sysmem alloc is a better way.
    
    Change-Id: I24e2b86c53b8d3307c0d155fc37cb499c321e1c6
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/lib/avb/libavb/avb_slot_verify.c b/lib/avb/libavb/avb_slot_verify.c
index 3fd45c929c..76abc178d4 100644
--- a/lib/avb/libavb/avb_slot_verify.c
+++ b/lib/avb/libavb/avb_slot_verify.c
@@ -21,7 +21,8 @@
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  * SOFTWARE.
  */
-
+#include <common.h>
+#include <sysmem.h>
 #include <android_avb/avb_slot_verify.h>
 #include <android_avb/avb_chain_partition_descriptor.h>
 #include <android_avb/avb_cmdline.h>
@@ -107,7 +108,7 @@ static AvbSlotVerifyResult load_full_partition(AvbOps* ops,
 
   /* Allocate and copy the partition. */
   if (!*out_image_preloaded) {
-    *out_image_buf = avb_malloc(image_size);
+    *out_image_buf = sysmem_alloc(MEMBLK_ID_AVB_ANDROID, image_size);
     if (*out_image_buf == NULL) {
       return AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
     }
@@ -369,7 +370,7 @@ out:
 
 fail:
   if (image_buf != NULL && !image_preloaded) {
-    avb_free(image_buf);
+    sysmem_free((phys_addr_t)image_buf);
   }
   return ret;
 }
@@ -449,7 +450,7 @@ static AvbSlotVerifyResult load_requested_partitions(
 out:
   /* Free the current buffer if any. */
   if (image_buf != NULL && !image_preloaded) {
-    avb_free(image_buf);
+    sysmem_free((phys_addr_t)image_buf);
   }
   /* Buffers that are already saved in slot_data will be handled by the caller
    * even on failure. */
@@ -1295,7 +1296,7 @@ void avb_slot_verify_data_free(AvbSlotVerifyData* data) {
         avb_free(loaded_partition->partition_name);
       }
       if (loaded_partition->data != NULL && !loaded_partition->preloaded) {
-        avb_free(loaded_partition->data);
+        sysmem_free((phys_addr_t)loaded_partition->data);
       }
     }
     avb_free(data->loaded_partitions);

commit 6184121cdc2fc45e350eb406a78dbf685f281d2e
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Apr 29 17:06:34 2019 +0800

    arm: add spl relocation support for armv8
    
    Relocate spl itself to a high memory.
    
    Change-Id: Ia69f05449a0a8e4f07cc6d37a2486c3cd2aa7176
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/config.mk b/arch/arm/config.mk
index 42a1d9c490..bd83fcab71 100644
--- a/arch/arm/config.mk
+++ b/arch/arm/config.mk
@@ -105,6 +105,12 @@ endif
 # needed for relocation
 LDFLAGS_u-boot += -pie
 
+ifndef CONFIG_SPL_SKIP_RELOCATE
+LDFLAGS_u-boot-spl = -pie
+else
+SPL_LDFLAGS_u-boot-spl =
+endif
+
 #
 # FIXME: binutils versions < 2.22 have a bug in the assembler where
 # branches to weak symbols can be incorrectly optimized in thumb mode
diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S
index 3336c1e0fd..57e6d11006 100644
--- a/arch/arm/cpu/armv8/start.S
+++ b/arch/arm/cpu/armv8/start.S
@@ -35,7 +35,11 @@ _start:
 
 .globl	_TEXT_BASE
 _TEXT_BASE:
+#if defined(CONFIG_SPL_BUILD)
+	.quad   CONFIG_SPL_TEXT_BASE
+#else
 	.quad	CONFIG_SYS_TEXT_BASE
+#endif
 
 /*
  * These are defined in the linker script.
diff --git a/arch/arm/cpu/armv8/u-boot-spl.lds b/arch/arm/cpu/armv8/u-boot-spl.lds
index 0d1b0c4993..c6579b50be 100644
--- a/arch/arm/cpu/armv8/u-boot-spl.lds
+++ b/arch/arm/cpu/armv8/u-boot-spl.lds
@@ -54,6 +54,23 @@ SECTIONS
 		*(.__end)
 	} >.sram
 
+#ifndef CONFIG_SPL_SKIP_RELOCATE
+	. = ALIGN(8);
+
+	.rel_dyn_start :
+	{
+		*(.__rel_dyn_start)
+	} >.sram
+
+	.rela.dyn : {
+		*(.rela*)
+	} >.sram
+
+	.rel_dyn_end :
+	{
+		*(.__rel_dyn_end)
+	} >.sram
+#endif
 	_image_binary_end = .;
 
 	.bss_start (NOLOAD) : {
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index d4b5f29eb1..1cba844c5f 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -23,7 +23,7 @@ else
 obj-y   += setjmp.o
 endif
 
-ifndef CONFIG_SPL_BUILD
+ifndef CONFIG_TPL_BUILD
 ifdef CONFIG_ARM64
 obj-y	+= relocate_64.o
 else
diff --git a/arch/arm/lib/crt0_64.S b/arch/arm/lib/crt0_64.S
index fad7f518c6..c29ba899c7 100644
--- a/arch/arm/lib/crt0_64.S
+++ b/arch/arm/lib/crt0_64.S
@@ -106,7 +106,8 @@ ENTRY(_main)
 	mov	x0, #0
 	bl	board_init_f
 
-#if !defined(CONFIG_SPL_BUILD)
+#if (defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD) && !defined(CONFIG_SPL_SKIP_RELOCATE)) || \
+	!defined(CONFIG_SPL_BUILD)
 /*
  * Set up intermediate environment (new sp and gd) and call
  * relocate_code(addr_moni). Trick here is that we'll return

commit dced428b74cb752ec4fc63933e1f1470e54bd881
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Apr 29 17:04:47 2019 +0800

    spl: add relocation support
    
    Some times we want to relocate spl code to dram after dram
    initialization or relocate spl code to a high memory to avoid
    code overide.
    
    For example on Rockchip armv8 platform, we run with boot flow
    TPL->SPL->ATF->U-Boot.
    
    TPL run in sram and is responsible for dram initialization.
    SPL run from the start address of dram and is responsible for
    loading ATF and U-Boot.
    
    The case here is that the ATF load address is from 64KB of dram,
    which overlaps with spl code itself.
    
    So we want to relocate spl itself to high memory to aovid this.
    
    Change-Id: Ifcae4444c04fa1208406b51196cf8737277ace90
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 42203591d0..e3fae4b806 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -125,6 +125,19 @@ config SPL_DISPLAY_PRINT
 	  banner ("U-Boot SPL ..."). This function should be provided by
 	  the board.
 
+config SPL_SKIP_RELOCATE
+	bool "Skip code relocation in SPL"
+	default y
+	help
+	  The SPL code will be relocated to a high memory if you say no here.
+	  Only ARM64 and PowerPC SPL support relocate now.
+
+config SPL_RELOC_TEXT_BASE
+	hex "Address the SPL relocate to"
+	depends on !SPL_SKIP_RELOCATE
+	help
+	  The address on the ram where the SPL relocate to.
+
 config SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
 	bool "MMC raw mode: by sector"
 	default y if ARCH_SUNXI || ARCH_DAVINCI || ARCH_UNIPHIER ||ARCH_MX6 || \
diff --git a/common/spl/spl.c b/common/spl/spl.c
index ec6ac69819..982d7fe35c 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -10,6 +10,7 @@
 #include <common.h>
 #include <dm.h>
 #include <spl.h>
+#include <asm/sections.h>
 #include <asm/u-boot.h>
 #include <nand.h>
 #include <fat.h>
@@ -258,6 +259,28 @@ static int spl_common_init(bool setup_malloc)
 	return 0;
 }
 
+#if !defined(CONFIG_SPL_SKIP_RELOCATE) && !defined(CONFIG_TPL_BUILD)
+static void spl_setup_relocate(void)
+{
+	gd->relocaddr = CONFIG_SPL_RELOC_TEXT_BASE;
+	gd->new_gd = (gd_t *)gd;
+	gd->start_addr_sp = gd->relocaddr;
+	gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
+
+	gd->start_addr_sp -= gd->fdt_size;
+	gd->new_fdt = (void *)gd->start_addr_sp;
+	memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
+	gd->fdt_blob = gd->new_fdt;
+
+	gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
+}
+#else
+static void spl_setup_relocate(void)
+{
+
+}
+#endif
+
 void spl_set_bd(void)
 {
 	if (!gd->bd)
@@ -273,6 +296,8 @@ int spl_early_init(void)
 		return ret;
 	gd->flags |= GD_FLG_SPL_EARLY_INIT;
 
+	spl_setup_relocate();
+
 	return 0;
 }
 
@@ -359,6 +384,34 @@ static int boot_from_devices(struct spl_image_info *spl_image,
 	return -ENODEV;
 }
 
+#if defined(CONFIG_DM) && !defined(CONFIG_SPL_SKIP_RELOCATE) && !defined(CONFIG_TPL_BUILD)
+static int spl_initr_dm(void)
+{
+	int ret;
+
+	/* Save the pre-reloc driver model and start a new one */
+	gd->dm_root_f = gd->dm_root;
+	gd->dm_root = NULL;
+	bootstage_start(BOOTSTATE_ID_ACCUM_DM_R, "dm_r");
+	ret = dm_init_and_scan(false);
+	bootstage_accum(BOOTSTATE_ID_ACCUM_DM_R);
+	if (ret)
+		return ret;
+
+#if defined(CONFIG_TIMER)
+	gd->timer = NULL;
+#endif
+	serial_init();
+
+	return 0;
+}
+#else
+static int spl_initr_dm(void)
+{
+	return 0;
+}
+#endif
+
 void board_init_r(gd_t *dummy1, ulong dummy2)
 {
 	u32 spl_boot_list[] = {
@@ -372,6 +425,8 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 
 	debug(">>spl:board_init_r()\n");
 
+	spl_initr_dm();
+
 	spl_set_bd();
 
 #ifdef CONFIG_SPL_OS_BOOT

commit 01714a2c060dbad1027faaf1a63028a79d2ed1fd
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Mar 26 17:22:08 2019 +0800

    rockchip: rk3308: set several master IP that can be secure access
    
    Include CRYPTO SDMMC EMMC NAND SFC USB.
    
    Change-Id: I1da1423bbefb45af3c2fad1b848bc7df0729512f
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3308/rk3308.c b/arch/arm/mach-rockchip/rk3308/rk3308.c
index 8b4f939885..245ee56b5e 100644
--- a/arch/arm/mach-rockchip/rk3308/rk3308.c
+++ b/arch/arm/mach-rockchip/rk3308/rk3308.c
@@ -38,6 +38,7 @@ struct mm_region *mem_map = rk3308_mem_map;
 #endif
 
 #define GRF_BASE	0xff000000
+#define SGRF_BASE	0xff2b0000
 
 enum {
 
@@ -139,3 +140,15 @@ void board_debug_uart_init(void)
 		     GPIO4D2_UART2_RX_M1 << GPIO4D2_SHIFT |
 		     GPIO4D3_UART2_TX_M1 << GPIO4D3_SHIFT);
 }
+
+#if defined(CONFIG_SPL_BUILD)
+int arch_cpu_init(void)
+{
+	static struct rk3308_sgrf * const sgrf = (void *)SGRF_BASE;
+
+	/* Set CRYPTO SDMMC EMMC NAND SFC USB master bus to be secure access */
+	rk_clrreg(&sgrf->con_secure0, 0x2b83);
+
+	return 0;
+}
+#endif

commit 3a10ef3901e3d78fc7308021448bc220d179cea7
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Mar 26 17:13:30 2019 +0800

    arm: rockchip: add RK3308 SGRF registers support
    
    Change-Id: I04340035cf8c372ae9f30424871da3810c70c56b
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3308.h b/arch/arm/include/asm/arch-rockchip/grf_rk3308.h
index 7e8e3a62f8..f0f1bb541d 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rk3308.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3308.h
@@ -173,4 +173,20 @@ struct rk3308_grf {
 	unsigned int chip_id;
 };
 check_member(rk3308_grf, gpio0a_p, 0xa0);
+
+struct rk3308_sgrf {
+	unsigned int soc_con0;
+	unsigned int soc_con1;
+	unsigned int con_tzma_r0size;
+	unsigned int con_secure0;
+	unsigned int reserved0;
+	unsigned int clk_timer_en;
+	unsigned int clkgat_con;
+	unsigned int fastboot_addr;
+	unsigned int fastboot_en;
+	unsigned int reserved1[(0x30 - 0x24) / 4];
+	unsigned int srst_con;
+};
+check_member(rk3308_sgrf, fastboot_en, 0x20);
+
 #endif

commit 164b2a3361a7c1d8b31a43e87c265daad4bdd738
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 17 12:00:52 2019 +0800

    rockchip: smccc: psci_system_suspend() effects by CONFIG_ARM_CPU_SUSPEND
    
    Change-Id: I6ecc1c4db8232782af369e8e29b78a2c0cb13783
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h b/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
index 2b88a86934..8785666816 100644
--- a/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
+++ b/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
@@ -137,6 +137,7 @@ struct arm_smccc_res sip_smc_get_sip_version(void);
  */
 int psci_cpu_on(unsigned long cpuid, unsigned long entry_point);
 
+#ifdef CONFIG_ARM_CPU_SUSPEND
 /*
  * psci_system_suspend() - Standard ARM PSCI system suspend call.
  *
@@ -145,5 +146,6 @@ int psci_cpu_on(unsigned long cpuid, unsigned long entry_point);
  * @return 0 on success, otherwise failed.
  */
 int psci_system_suspend(unsigned long unused);
+#endif
 
 #endif
diff --git a/arch/arm/mach-rockchip/rockchip_smccc.c b/arch/arm/mach-rockchip/rockchip_smccc.c
index a39e5b2830..815ad5e015 100644
--- a/arch/arm/mach-rockchip/rockchip_smccc.c
+++ b/arch/arm/mach-rockchip/rockchip_smccc.c
@@ -41,6 +41,7 @@ int psci_cpu_on(unsigned long cpuid, unsigned long entry_point)
 	return res.a0;
 }
 
+#ifdef CONFIG_ARM_CPU_SUSPEND
 int psci_system_suspend(unsigned long unused)
 {
 	struct arm_smccc_res res;
@@ -49,6 +50,7 @@ int psci_system_suspend(unsigned long unused)
 				  virt_to_phys(cpu_resume), 0, 0);
 	return res.a0;
 }
+#endif
 
 int sip_smc_set_suspend_mode(unsigned long ctrl,
 			     unsigned long config1,

commit 3415d4ebcdab59eb5a39caff19003307532974cb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 17 11:14:51 2019 +0800

    power: charge animation: select CONFIG_ARM_CPU_SUSPEND
    
    Change-Id: I0c901e17b9da18d87f8dd7da776254a20c47ee11
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index 608df55cca..7462ce3e6d 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -82,6 +82,7 @@ endchoice
 config CHARGE_ANIMATION
 	bool "Enable charge animation"
 	depends on DM_CHARGE_DISPLAY && DM_FUEL_GAUGE
+	select ARM_CPU_SUSPEND
 	help
 	  This adds a simple function for charge animation display.
 
diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index b1a814e02b..b82a0f4d45 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -170,7 +170,7 @@ static int check_key_press(struct udevice *dev)
  * If not enable CONFIG_IRQ, cpu can't suspend to ATF or wfi, so that wakeup
  * period timer is useless.
  */
-#ifndef CONFIG_IRQ
+#if !defined(CONFIG_IRQ) || !defined(CONFIG_ARM_CPU_SUSPEND)
 static int system_suspend_enter(struct udevice *dev)
 {
 	return 0;

commit ff294bc6d1de6dc409baee2690a1a7da5f92127e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 17 11:09:38 2019 +0800

    arm: armv7/8: add CONFIG_ARM_CPU_SUSPEND definition
    
    Make it as a optional choice.
    
    Change-Id: I87c5d8ce863eb64f3922fb4124e1f4a6aaf79257
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index b8cd54762d..8e2d2a017e 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -218,6 +218,13 @@ config ARM_SMCCC
 	  This should be enabled if U-Boot needs to communicate with system
 	  firmware (for example, PSCI) according to SMCCC.
 
+config ARM_CPU_SUSPEND
+	bool "Support for ARM cpu suspend and resume"
+	depends on CPU_V7 || ARM64
+	help
+	  Say Y here if you want to enable ARM cpu suspend/resume which allows
+	  to poweroff cpu power supply.
+
 config SEMIHOSTING
 	bool "support boot from semihosting"
 	help
diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile
index aca89142f0..48cbfbf8c0 100644
--- a/arch/arm/cpu/armv7/Makefile
+++ b/arch/arm/cpu/armv7/Makefile
@@ -12,11 +12,6 @@ obj-y	+= cache_v7.o cache_v7_asm.o
 obj-y	+= cpu.o cp15.o
 obj-y	+= syslib.o
 
-ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
-obj-y	+= suspend.o
-obj-y	+= sleep.o
-endif
-
 ifneq ($(CONFIG_SKIP_LOWLEVEL_INIT),y)
 obj-y	+= lowlevel_init.o
 endif
@@ -25,6 +20,10 @@ obj-$(CONFIG_ARM_SMCCC)		+= smccc-call.o
 obj-$(CONFIG_ARMV7_NONSEC)	+= nonsec_virt.o virt-v7.o virt-dt.o
 obj-$(CONFIG_ARMV7_PSCI)	+= psci.o psci-common.o
 
+ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
+obj-$(CONFIG_ARM_CPU_SUSPEND)	+= suspend.o sleep.o
+endif
+
 obj-$(CONFIG_IPROC) += iproc-common/
 obj-$(CONFIG_KONA) += kona-common/
 obj-$(CONFIG_SYS_ARCH_TIMER) += arch_timer.o
diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile
index b8c31aead8..c200dc28b8 100644
--- a/arch/arm/cpu/armv8/Makefile
+++ b/arch/arm/cpu/armv8/Makefile
@@ -19,13 +19,12 @@ obj-y	+= transition.o
 obj-y	+= fwcall.o
 obj-y	+= cpu-dt.o
 
+obj-$(CONFIG_ARM_SMCCC)		+= smccc-call.o
+
 ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
-obj-y	+= ../armv7/suspend.o
-obj-y	+= sleep.o
+obj-$(CONFIG_ARM_CPU_SUSPEND)	+= ../armv7/suspend.o sleep.o
 endif
 
-obj-$(CONFIG_ARM_SMCCC)		+= smccc-call.o
-
 ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_ARMV8_SPIN_TABLE) += spin_table.o spin_table_v8.o
 endif

commit a3d0083590b3424673b016b7377c48c5b6aeb530
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon May 13 10:45:50 2019 +0800

    crypto: add rockchip crypto v1 driver
    
    Crypto v1 driver implements algorithm MD5/SHA1/SHA256/RSA512/RSA1024/RSA2048
    for the platforms: rk3399/rk3368/rk3328/rk3229/rk3288/rk3128.
    
    Change-Id: Ib3e16c365dd130ad2d5ab9008f8db4252cbd2834
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile
index a3a8db66a9..3cc4106db8 100644
--- a/drivers/crypto/Makefile
+++ b/drivers/crypto/Makefile
@@ -9,3 +9,4 @@ obj-$(CONFIG_DM_CRYPTO)		+= crypto-uclass.o
 obj-$(CONFIG_EXYNOS_ACE_SHA)	+= ace_sha.o
 obj-y += rsa_mod_exp/
 obj-y += fsl/
+obj-y += rockchip/
diff --git a/drivers/crypto/rockchip/Kconfig b/drivers/crypto/rockchip/Kconfig
index 40b332e41d..6cb003b417 100644
--- a/drivers/crypto/rockchip/Kconfig
+++ b/drivers/crypto/rockchip/Kconfig
@@ -1,5 +1,8 @@
-config CRYPTO_ROCKCHIP
-	bool "Support Rockchip Hardware Crypto"
+config ROCKCHIP_CRYPTO_V1
+	bool "Enable rockchip crypto v1 support"
+	depends on DM_CRYPTO && (ROCKCHIP_RK3399 || ROCKCHIP_RK3368 || \
+				 ROCKCHIP_RK3328 || ROCKCHIP_RK3229 || \
+				 ROCKCHIP_RK3288 || ROCKCHIP_RK3128)
 	help
-	  The module supports Rockchip Hardware Crypto.
-	  This accelerates algorithmic operations.
\ No newline at end of file
+	  This enable MD5/SHA1/SHA256/RSA512/RSA1024/RSA2048 algorithm support for
+	  rockchip crypto v1 on platforms: rk3399/rk3368/rk3328/rk3229/rk3288/rk3128.
diff --git a/drivers/crypto/rockchip/Makefile b/drivers/crypto/rockchip/Makefile
index bb1557984d..f9ba12f967 100644
--- a/drivers/crypto/rockchip/Makefile
+++ b/drivers/crypto/rockchip/Makefile
@@ -4,5 +4,4 @@
 #  Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
 #
 
-obj-y += rockchip_crypto_hd.o
-obj-y += rockchip_crypto.o
+obj-$(CONFIG_ROCKCHIP_CRYPTO_V1) += crypto_v1.o
diff --git a/drivers/crypto/rockchip/crypto_v1.c b/drivers/crypto/rockchip/crypto_v1.c
new file mode 100644
index 0000000000..de9ef078a2
--- /dev/null
+++ b/drivers/crypto/rockchip/crypto_v1.c
@@ -0,0 +1,288 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <crypto.h>
+#include <dm.h>
+#include <rockchip/crypto_v1.h>
+#include <asm/io.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/clock.h>
+
+#define CRYPTO_V1_DEFAULT_RATE		100000000
+
+struct rockchip_crypto_priv {
+	struct rk_crypto_reg *reg;
+	struct clk clk;
+	u32 frequency;
+	char *clocks;
+	u32 nclocks;
+	u32 length;
+};
+
+static u32 rockchip_crypto_capability(struct udevice *dev)
+{
+	return CRYPTO_MD5 |
+	       CRYPTO_SHA1 |
+	       CRYPTO_SHA256 |
+	       CRYPTO_RSA512 |
+	       CRYPTO_RSA1024 |
+	       CRYPTO_RSA2048;
+}
+
+static int rockchip_crypto_sha_init(struct udevice *dev, sha_context *ctx)
+{
+	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
+	struct rk_crypto_reg *reg = priv->reg;
+	u32 val;
+
+	if (!ctx || !ctx->length)
+		return -EINVAL;
+
+	priv->length = 0;
+	writel(ctx->length, &reg->crypto_hash_msg_len);
+	if (ctx->algo == CRYPTO_SHA256) {
+		/* Set SHA256 mode and out byte swap */
+		writel(HASH_SWAP_DO | ENGINE_SELECTION_SHA256,
+		       &reg->crypto_hash_ctrl);
+
+		val = readl(&reg->crypto_conf);
+		val &= ~BYTESWAP_HRFIFO;
+		writel(val, &reg->crypto_conf);
+	} else if (ctx->algo == CRYPTO_SHA1) {
+		/* Set SHA160 input byte swap */
+		val = readl(&reg->crypto_conf);
+		val |= BYTESWAP_HRFIFO;
+		writel(val, &reg->crypto_conf);
+
+		/* Set SHA160 mode and out byte swap */
+		writel(HASH_SWAP_DO, &reg->crypto_hash_ctrl);
+	} else if (ctx->algo == CRYPTO_MD5) {
+		/* Set MD5 input byte swap */
+		val = readl(&reg->crypto_conf);
+		val |= BYTESWAP_HRFIFO;
+		writel(val, &reg->crypto_conf);
+
+		/* Set MD5 mode and out byte swap */
+		writel(HASH_SWAP_DO | ENGINE_SELECTION_MD5,
+		       &reg->crypto_hash_ctrl);
+	} else {
+		return -EINVAL;
+	}
+
+	rk_setreg(&reg->crypto_ctrl, HASH_FLUSH);
+	do {} while (readl(&reg->crypto_ctrl) & HASH_FLUSH);
+
+	/* SHA256 needs input byte swap */
+	if (ctx->algo == CRYPTO_SHA256) {
+		val = readl(&reg->crypto_conf);
+		val |= BYTESWAP_HRFIFO;
+		writel(val, &reg->crypto_conf);
+	}
+
+	return 0;
+}
+
+static int rockchip_crypto_sha_update(struct udevice *dev,
+				      u32 *input, u32 len)
+{
+	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
+	struct rk_crypto_reg *reg = priv->reg;
+
+	if (!len)
+		return -EINVAL;
+
+	priv->length += len;
+
+	/* Must flush dcache before crypto DMA fetch data region */
+	flush_cache((unsigned long)input, len);
+
+	/* Wait last complete */
+	do {} while (readl(&reg->crypto_ctrl) & HASH_START);
+
+	/* Hash Done Interrupt */
+	writel(HASH_DONE_INT, &reg->crypto_intsts);
+
+	/* Set data base and length */
+	writel((u32)(ulong)input, &reg->crypto_hrdmas);
+	writel((len + 3) >> 2, &reg->crypto_hrdmal);
+
+	/* Write 1 to start. When finishes, the core will clear it */
+	rk_setreg(&reg->crypto_ctrl, HASH_START);
+
+	return 0;
+}
+
+static int rockchip_crypto_sha_final(struct udevice *dev,
+				     sha_context *ctx, u8 *output)
+{
+	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
+	struct rk_crypto_reg *reg = priv->reg;
+	u32 *buf = (u32 *)output;
+	u32 nbits;
+	int i;
+
+	if (priv->length != ctx->length) {
+		printf("%s: Err: update total length(0x%x) is not equal "
+		       "to init total length(0x%x)!\n",
+		       __func__, priv->length, ctx->length);
+		return -EIO;
+	}
+
+	/* Wait last complete */
+	do {} while (readl(&reg->crypto_ctrl) & HASH_START);
+
+	/* It is high when finish, and it will not be low until it restart */
+	do {} while (!readl(&reg->crypto_hash_sts));
+
+	/* Read hash data, per-data 32-bit */
+	nbits = crypto_algo_nbits(ctx->algo);
+	for (i = 0; i < BYTE2WORD(nbits); i++)
+		buf[i] = readl(&reg->crypto_hash_dout[i]);
+
+	return 0;
+}
+
+static int rockchip_crypto_rsa_verify(struct udevice *dev, rsa_key *ctx,
+				      u8 *sign, u8 *output)
+{
+	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
+	struct rk_crypto_reg *reg = priv->reg;
+	u32 nbits, *buf = (u32 *)output;
+	int i, value;
+
+	if (!ctx)
+		return -EINVAL;
+
+	if (ctx->algo == CRYPTO_RSA512)
+		value = PKA_BLOCK_SIZE_512;
+	else if (ctx->algo == CRYPTO_RSA1024)
+		value = PKA_BLOCK_SIZE_1024;
+	else if (ctx->algo == CRYPTO_RSA2048)
+		value = PKA_BLOCK_SIZE_2048;
+	else
+		return -EINVAL;
+
+	/* Specify the nbits of N in PKA calculation */
+	writel(value, &reg->crypto_pka_ctrl);
+
+	/* Flush SHA and RSA */
+	rk_setreg(&reg->crypto_ctrl, PKA_HASH_CTRL);
+	writel(0xffffffff, &reg->crypto_intsts);
+	do {} while (readl(&reg->crypto_ctrl) & PKA_CTRL);
+
+	/* Clean PKA done interrupt */
+	writel(PKA_DONE_INT, &reg->crypto_intsts);
+
+	/* Set m/n/e/c */
+	nbits = crypto_algo_nbits(ctx->algo);
+	memcpy((void *)&reg->crypto_pka_m, (void *)sign,   BITS2BYTE(nbits));
+	memcpy((void *)&reg->crypto_pka_n, (void *)ctx->n, BITS2BYTE(nbits));
+	memcpy((void *)&reg->crypto_pka_e, (void *)ctx->e, BITS2BYTE(nbits));
+	memcpy((void *)&reg->crypto_pka_c, (void *)ctx->c, BITS2BYTE(nbits));
+	do {} while (readl(&reg->crypto_ctrl) & PKA_START);
+
+	/* Start PKA */
+	rk_setreg(&reg->crypto_ctrl, PKA_START);
+
+	/* Wait PKA done */
+	do {} while (readl(&reg->crypto_ctrl) & PKA_START);
+
+	/* Read hash data, per-data 32-bit */
+	for (i = 0; i < BITS2WORD(nbits); i++)
+		buf[i] = readl(&reg->crypto_pka_m[i]);
+
+	return 0;
+}
+
+static const struct dm_crypto_ops rockchip_crypto_ops = {
+	.capability = rockchip_crypto_capability,
+	.sha_init   = rockchip_crypto_sha_init,
+	.sha_update = rockchip_crypto_sha_update,
+	.sha_final  = rockchip_crypto_sha_final,
+	.rsa_verify = rockchip_crypto_rsa_verify,
+};
+
+/*
+ * Only use "clocks" to parse crypto clock id and use rockchip_get_clk().
+ * Because we always add crypto node in U-Boot dts, when kernel dtb enabled :
+ *
+ *   1. There is cru phandle mismatch between U-Boot and kernel dtb;
+ *   2. CONFIG_OF_SPL_REMOVE_PROPS removes clock property;
+ */
+static int rockchip_crypto_ofdata_to_platdata(struct udevice *dev)
+{
+	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
+	int len;
+
+	if (!dev_read_prop(dev, "clocks", &len)) {
+		printf("Can't find \"clocks\" property\n");
+		return -EINVAL;
+	}
+
+	priv->clocks = malloc(len);
+	if (!priv->clocks)
+		return -ENOMEM;
+
+	priv->nclocks = len / sizeof(u32);
+	if (dev_read_u32_array(dev, "clocks", (u32 *)priv->clocks,
+			       priv->nclocks)) {
+		printf("Can't read \"clocks\" property\n");
+		return -EINVAL;
+	}
+
+	priv->reg = dev_read_addr_ptr(dev);
+	priv->frequency = dev_read_u32_default(dev, "clock-frequency",
+					       CRYPTO_V1_DEFAULT_RATE);
+
+	return 0;
+}
+
+static int rockchip_crypto_probe(struct udevice *dev)
+{
+	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
+	u32 *clocks;
+	int i, ret;
+
+	ret = rockchip_get_clk(&priv->clk.dev);
+	if (ret) {
+		printf("Failed to get clk device, ret=%d\n", ret);
+		return ret;
+	}
+
+	clocks = (u32 *)priv->clocks;
+	for (i = 1; i < priv->nclocks; i += 2) {
+		priv->clk.id = clocks[i];
+		ret = clk_set_rate(&priv->clk, priv->frequency);
+		if (ret < 0) {
+			printf("%s: Failed to set clk(%ld): ret=%d\n",
+			       __func__, priv->clk.id, ret);
+			return ret;
+		}
+	}
+
+	return 0;
+}
+
+static const struct udevice_id rockchip_crypto_ids[] = {
+	{ .compatible = "rockchip,rk3399-crypto" },
+	{ .compatible = "rockchip,rk3368-crypto" },
+	{ .compatible = "rockchip,rk3328-crypto" },
+	{ .compatible = "rockchip,rk3288-crypto" },
+	{ .compatible = "rockchip,rk322x-crypto" },
+	{ .compatible = "rockchip,rk312x-crypto" },
+	{ }
+};
+
+U_BOOT_DRIVER(rockchip_crypto_v1) = {
+	.name		= "rockchip_crypto_v1",
+	.id		= UCLASS_CRYPTO,
+	.of_match	= rockchip_crypto_ids,
+	.ops		= &rockchip_crypto_ops,
+	.probe		= rockchip_crypto_probe,
+	.ofdata_to_platdata = rockchip_crypto_ofdata_to_platdata,
+	.priv_auto_alloc_size = sizeof(struct rockchip_crypto_priv),
+};
diff --git a/drivers/crypto/rockchip/rockchip_crypto.c b/drivers/crypto/rockchip/rockchip_crypto.c
deleted file mode 100644
index 208d3619e0..0000000000
--- a/drivers/crypto/rockchip/rockchip_crypto.c
+++ /dev/null
@@ -1,120 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
- */
-
-#include <config.h>
-#include <common.h>
-#include <dm.h>
-#include <dm/device-internal.h>
-#include <errno.h>
-#include <rockchip_crypto/rockchip_crypto_hd.h>
-#include <rockchip_crypto/rockchip_crypto.h>
-
-int get_rk_crypto_desc(struct rk_crypto_desc *crypto_desc)
-{
-	int ret;
-
-	ret = uclass_get_device_by_name(UCLASS_RKCRYPTO, "crypto",
-					&crypto_desc->dev);
-	if (ret) {
-		printf("%s: Can not get crypto dev.\n", __func__);
-		return ret;
-	}
-
-	crypto_desc->ops = crypto_get_ops(crypto_desc->dev);
-
-	return 0;
-}
-
-int rk_crypto_sha_init(struct rk_crypto_desc *rk_crypto, u32 msg_len,
-		       int hash_bits)
-{
-	return rk_crypto->ops->sha_init(rk_crypto->dev, msg_len, msg_len);
-}
-
-int rk_crypto_sha_byte_swap(struct rk_crypto_desc *rk_crypto, int en)
-{
-	return rk_crypto->ops->sha_byte_swap(rk_crypto->dev, en);
-}
-
-int rk_crypto_sha_start(struct rk_crypto_desc *rk_crypto, u32 *data,
-			u32 data_len)
-{
-	return rk_crypto->ops->sha_start(rk_crypto->dev, data, data_len);
-}
-
-int rk_crypto_sha_end(struct rk_crypto_desc *rk_crypto, u32 *result)
-{
-	return rk_crypto->ops->sha_end(rk_crypto->dev, result);
-}
-
-int rk_crypto_sha_check(struct rk_crypto_desc *rk_crypto, u32 *in_hash)
-{
-	int ret;
-	u32 data_hash[8];
-
-	ret = rk_crypto_sha_end(rk_crypto, data_hash);
-	if (ret)
-		return -1;
-
-	return memcmp(in_hash, data_hash, 32);
-}
-
-int rk_crypto_rsa_init(struct rk_crypto_desc *rk_crypto)
-{
-	return rk_crypto->ops->rsa_init(rk_crypto->dev);
-}
-
-int rk_crypto_rsa_start(struct rk_crypto_desc *rk_crypto,
-			u32 *m, u32 *n, u32 *e, u32 *c)
-{
-	return rk_crypto->ops->rsa_start(rk_crypto->dev, m, n, e, c);
-}
-
-int rk_crypto_rsa_end(struct rk_crypto_desc *rk_crypto, u32 *result)
-{
-	return rk_crypto->ops->rsa_end(rk_crypto->dev, result);
-}
-
-int rk_crypto_rsa_check(struct rk_crypto_desc *rk_crypto)
-{
-	u32 datahash[8];
-	u32 rsa_result[8];
-	int ret = 0;
-
-	ret = rk_crypto_sha_end(rk_crypto, datahash);
-	if (ret)
-		return ret;
-
-	ret = rk_crypto_rsa_end(rk_crypto, rsa_result);
-	if (ret)
-		return ret;
-
-	return memcmp(rsa_result, datahash, 32);
-}
-
-int rk_crypto_probe(void)
-{
-	int ret;
-	struct udevice *dev;
-
-	ret = uclass_get_device_by_name(UCLASS_RKCRYPTO, "crypto", &dev);
-	if (ret) {
-		printf("%s: Can not get crypto dev.\n", __func__);
-		return -1;
-	}
-
-	ret = device_probe(dev);
-	if (ret) {
-		printf("%s: Crypto probe error.\n", __func__);
-		return -1;
-	}
-
-	return 0;
-}
-
-UCLASS_DRIVER(crypto) = {
-	.id		= UCLASS_RKCRYPTO,
-	.name		= "crypto",
-};
diff --git a/drivers/crypto/rockchip/rockchip_crypto_hd.c b/drivers/crypto/rockchip/rockchip_crypto_hd.c
deleted file mode 100644
index d765411bbc..0000000000
--- a/drivers/crypto/rockchip/rockchip_crypto_hd.c
+++ /dev/null
@@ -1,196 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
- */
-
-#include <common.h>
-#include <bouncebuf.h>
-#include <clk.h>
-#include <dm.h>
-#include <dt-structs.h>
-#include <errno.h>
-#include <linux/errno.h>
-#include <asm/arch/hardware.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/periph.h>
-#include <rockchip_crypto/rockchip_crypto_hd.h>
-#include <rockchip_crypto/rockchip_crypto.h>
-
-struct rockchip_crypto_plat {
-	fdt_addr_t base;
-	s32 frequency;
-};
-
-struct rockchip_crypto_priv {
-	volatile struct rk_crypto_reg *regbase;
-	struct clk clk;
-	unsigned int max_freq;
-};
-
-static int rockchip_crypto_ofdata_to_platdata(struct udevice *bus)
-{
-	struct rockchip_crypto_plat *plat = dev_get_platdata(bus);
-	struct rockchip_crypto_priv *priv = dev_get_priv(bus);
-	int ret = 0;
-
-	plat->base = dev_read_u32_default(bus, "default-addr", 0);
-	debug("Crypto base address is %x\n", (int)(size_t)plat->base);
-	ret = clk_get_by_index(bus, 0, &priv->clk);
-	if (ret < 0) {
-		printf("Could not get clock for %s: %d\n", bus->name, ret);
-		return ret;
-	}
-
-	plat->frequency = dev_read_u32_default(bus, "default-frequency",
-					       CRYPTO_DEFAULT_CLK);
-	debug("Crypto clock frequency is %x\n", (int)(size_t)plat->frequency);
-
-	return 0;
-}
-
-static int rockchip_crypto_probe(struct udevice *dev)
-{
-	struct rockchip_crypto_plat *plat = dev_get_platdata(dev);
-	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
-	int ret = 0;
-
-	priv->regbase = (volatile struct rk_crypto_reg *)
-				(plat->base & 0xffffffff);
-	priv->max_freq = plat->frequency;
-	ret = clk_set_rate(&priv->clk, priv->max_freq);
-	if (ret < 0) {
-		printf("%s: Failed to set clock: %d\n", __func__, ret);
-		return ret;
-	}
-
-	return 0;
-}
-
-static int rockchip_crypto_sha_init(struct udevice *dev, u32 msg_len,
-				    int hash_bits)
-{
-	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
-
-	priv->regbase->crypto_hash_meg_len = msg_len;
-	if (hash_bits == SHA_256_BIT) {
-		priv->regbase->crypto_hash_ctrl = HASH_SWAP_DO | ENGINE_SELECTION_SHA256;
-		priv->regbase->crypto_conf &= ~(BYTESWAP_HRFIFO);
-	} else {
-		printf("Do not support that hash_bits is not equal to 256");
-		return -ENOTSUPP;
-	}
-
-	rk_setreg(&priv->regbase->crypto_ctrl, HASH_FLUSH);
-	do {} while (priv->regbase->crypto_ctrl & HASH_FLUSH);
-
-	return 0;
-}
-
-static int rockchip_crypto_sha_byte_swap(struct udevice *dev, int en)
-{
-	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
-
-	if (en)
-		priv->regbase->crypto_conf |= BYTESWAP_HRFIFO;
-	else
-		priv->regbase->crypto_conf &= ~BYTESWAP_HRFIFO;
-	return 0;
-}
-
-static int rockchip_crypto_sha_start(struct udevice *dev, u32 *data,
-				     u32 data_len)
-{
-	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
-
-	if (data_len == 0)
-		return 0;
-
-	flush_cache((unsigned long)data, data_len);
-	do {} while (priv->regbase->crypto_ctrl & HASH_START);
-	priv->regbase->crypto_intsts = HASH_DONE_INT;
-	priv->regbase->crypto_hrdmas = (u32)(unsigned long)data;
-	priv->regbase->crypto_hrdmal = ((data_len + 3) >> 2);
-	rk_setreg(&priv->regbase->crypto_ctrl, HASH_START);
-
-	return 0;
-}
-
-static int rockchip_crypto_sha_end(struct udevice *dev, u32 *result)
-{
-	int i;
-	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
-
-	do {} while (priv->regbase->crypto_ctrl & HASH_START);
-	do {} while (!priv->regbase->crypto_hash_sts);
-	for (i = 0; i < 8; i++)
-		*result++ = priv->regbase->crypto_hash_dout[i];
-
-	return 0;
-}
-
-static int rockchip_crypto_rsa_init(struct udevice *dev)
-{
-	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
-
-	priv->regbase->crypto_pka_ctrl = PKA_BLOCK_SIZE_2048;
-	rk_setreg(&priv->regbase->crypto_ctrl, PKA_HASH_CTRL);
-	priv->regbase->crypto_intsts = 0xffffffff;
-	do {} while (priv->regbase->crypto_ctrl & PKA_CTRL);
-
-	return 0;
-}
-
-static int rockchip_crypto_rsa_start(struct udevice *dev, u32 *m,
-				     u32 *n, u32 *e, u32 *c)
-{
-	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
-
-	priv->regbase->crypto_intsts = PKA_DONE_INT;
-	memcpy((void *)&priv->regbase->crypto_pka_m, (void *)m, 256);
-	memcpy((void *)&priv->regbase->crypto_pka_n, (void *)n, 256);
-	memcpy((void *)&priv->regbase->crypto_pka_e, (void *)e, 256);
-	memcpy((void *)&priv->regbase->crypto_pka_c, (void *)c, 256);
-	do {} while (priv->regbase->crypto_ctrl & PKA_START);
-	rk_setreg(&priv->regbase->crypto_ctrl, PKA_START);
-
-	return 0;
-}
-
-static int rockchip_crypto_rsa_end(struct udevice *dev, u32 *result)
-{
-	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
-	int i;
-
-	do {} while (priv->regbase->crypto_ctrl & PKA_START);
-	for (i = 0; i < 8; i++)
-		*result++ = *((u32 *)(&priv->regbase->crypto_pka_m + i));
-
-	return 0;
-}
-
-static const struct dm_rk_crypto_ops rockchip_crypto_ops = {
-	.sha_init = rockchip_crypto_sha_init,
-	.sha_byte_swap = rockchip_crypto_sha_byte_swap,
-	.sha_start = rockchip_crypto_sha_start,
-	.sha_end = rockchip_crypto_sha_end,
-	.rsa_init = rockchip_crypto_rsa_init,
-	.rsa_start = rockchip_crypto_rsa_start,
-	.rsa_end = rockchip_crypto_rsa_end,
-};
-
-static const struct udevice_id rockchip_crypto_ids[] = {
-	{ .compatible = "rockchip,rk3399-crypto" },
-	{ }
-};
-
-U_BOOT_DRIVER(rockchip_crypto_drv) = {
-	.name		= "rockchip_crypto",
-	.id		= UCLASS_RKCRYPTO,
-	.of_match	= rockchip_crypto_ids,
-	.ops = &rockchip_crypto_ops,
-	.ofdata_to_platdata = rockchip_crypto_ofdata_to_platdata,
-	.probe		= rockchip_crypto_probe,
-	.priv_auto_alloc_size = sizeof(struct rockchip_crypto_priv),
-	.platdata_auto_alloc_size = sizeof(struct rockchip_crypto_plat),
-};
diff --git a/include/rockchip/crypto_v1.h b/include/rockchip/crypto_v1.h
new file mode 100644
index 0000000000..054d509dbc
--- /dev/null
+++ b/include/rockchip/crypto_v1.h
@@ -0,0 +1,105 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _ROCKCHIP_CRYPTO_V1_H_
+#define _ROCKCHIP_CRYPTO_V1_H_
+
+struct rk_crypto_reg {
+	u32 crypto_intsts;
+	u32 crypto_intena;
+	u32 crypto_ctrl;
+	u32 crypto_conf;
+	u32 crypto_brdmas;
+	u32 crypto_btdmas;
+	u32 crypto_brdmal;
+	u32 crypto_hrdmas;
+	u32 crypto_hrdmal;
+	u32 reserved0[(0x80 - 0x24) / 4];
+
+	u32 crypto_aes_ctrl;
+	u32 crypto_aes_sts;
+	u32 crypto_aes_din[4];
+	u32 crypto_aes_dout[4];
+	u32 crypto_aes_iv[4];
+	u32 crypto_aes_key[8];
+	u32 crypto_aes_cnt[4];
+	u32 reserved1[(0x100 - 0xe8) / 4];
+
+	u32 crypto_tdes_ctrl;
+	u32 crypto_tdes_sts;
+	u32 crypto_tdes_din[2];
+	u32 crypto_tdes_dout[2];
+	u32 crypto_tdes_iv[2];
+	u32 crypto_tdes_key1[2];
+	u32 crypto_tdes_key2[2];
+	u32 crypto_tdes_key3[2];
+	u32 reserved2[(0x180 - 0x138) / 4];
+
+	u32 crypto_hash_ctrl;
+	u32 crypto_hash_sts;
+	u32 crypto_hash_msg_len;
+	u32 crypto_hash_dout[8];
+	u32 crypto_hash_seed[5];
+	u32 reserved3[(0x200 - 0x1c0) / 4];
+
+	u32 crypto_trng_ctrl;
+	u32 crypto_trng_dout[8];
+	u32 reserved4[(0x280 - 0x224) / 4];
+
+	u32 crypto_pka_ctrl;
+	u32 reserved5[(0x400 - 0x284) / 4];
+
+	u32 crypto_pka_m[(0x500 - 0x400) / 4];
+	u32 crypto_pka_c[(0x600 - 0x500) / 4];
+	u32 crypto_pka_n[(0x700 - 0x600) / 4];
+	u32 crypto_pka_e;
+};
+
+check_member(rk_crypto_reg, crypto_pka_e, 0x700);
+
+/************************ Register bits definition ****************************/
+/* CRYPTO_HASH_CTRL */
+#define ENGINE_SELECTION_SHA1		0x0
+#define ENGINE_SELECTION_MD5		0x1
+#define ENGINE_SELECTION_SHA256		0x2
+#define HASH_SWAP_DO			0x8
+
+/* CRYPTO_CONF */
+#define HR_ADDR_MODE			BIT(8)
+#define BT_ADDR_MODE			BIT(7)
+#define BR_ADDR_MODE			BIT(6)
+#define BYTESWAP_HRFIFO			BIT(5)
+#define BYTESWAP_BTFIFO			BIT(4)
+#define BYTESWAP_BRFIFO			BIT(3)
+#define DESSEL				BIT(2)
+
+/* CRYPTO_CTRL */
+#define TRNG_FLUSH			BIT(9)
+#define TRNG_START			BIT(8)
+#define PKA_FLUSH			BIT(7)
+#define HASH_FLUSH			BIT(6)
+#define BLOCK_FLUSH			BIT(5)
+#define PKA_START			BIT(4)
+#define HASH_START			BIT(3)
+#define BLOCK_START			BIT(2)
+#define TDES_START			BIT(1)
+#define AES_START			BIT(0)
+#define PKA_HASH_CTRL			(PKA_FLUSH | HASH_FLUSH)
+#define PKA_CTRL			(PKA_FLUSH | PKA_START)
+
+/* CRYPTO_INTSTS */
+#define PKA_DONE_INT			BIT(5)
+#define HASH_DONE_INT			BIT(4)
+#define HRDMA_ERR_INT			BIT(3)
+#define HRDMA_DONE_INT			BIT(2)
+#define BCDMA_ERR_INT			BIT(1)
+#define BCDMA_DONE_INT			BIT(0)
+
+/* CRYPTO_PKA_CTRL */
+#define PKA_BLOCK_SIZE_512		0
+#define PKA_BLOCK_SIZE_1024		1
+#define PKA_BLOCK_SIZE_2048		2
+
+#endif
diff --git a/include/rockchip_crypto/rockchip_crypto.h b/include/rockchip_crypto/rockchip_crypto.h
deleted file mode 100644
index ca7fbb01df..0000000000
--- a/include/rockchip_crypto/rockchip_crypto.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/* SPDX-License-Identifier:     GPL-2.0+ */
-/*
- * (C) Copyright 2019 Rockchip Electronics Co., Ltd
- */
-
-#ifndef _ROCKCHIP_CRYPTO_H_
-#define _ROCKCHIP_CRYPTO_H_
-
-#define crypto_get_ops(dev)	((struct dm_rk_crypto_ops *)(dev)->driver->ops)
-
-struct rk_crypto_desc {
-	struct udevice *dev;
-	struct dm_rk_crypto_ops *ops;
-};
-
-int get_rk_crypto_desc(struct rk_crypto_desc *crypto_desc);
-int rk_crypto_sha_init(struct rk_crypto_desc *rk_crypto, u32 msg_len,
-		       int hash_bits);
-int rk_crypto_sha_byte_swap(struct rk_crypto_desc *rk_crypto, int en);
-int rk_crypto_sha_start(struct rk_crypto_desc *rk_crypto, u32 *data,
-			u32 data_len);
-int rk_crypto_sha_end(struct rk_crypto_desc *rk_crypto, u32 *result);
-int rk_crypto_sha_check(struct rk_crypto_desc *rk_crypto, u32 *in_hash);
-int rk_crypto_rsa_init(struct rk_crypto_desc *rk_crypto);
-int rk_crypto_rsa_start(struct rk_crypto_desc *rk_crypto, u32 *m,
-			u32 *n, u32 *e, u32 *c);
-int rk_crypto_rsa_end(struct rk_crypto_desc *rk_crypto, u32 *result);
-int rk_crypto_rsa_check(struct rk_crypto_desc *rk_crypto);
-int rk_crypto_probe(void);
-
-#endif
diff --git a/include/rockchip_crypto/rockchip_crypto_hd.h b/include/rockchip_crypto/rockchip_crypto_hd.h
deleted file mode 100644
index c34fbdb90d..0000000000
--- a/include/rockchip_crypto/rockchip_crypto_hd.h
+++ /dev/null
@@ -1,112 +0,0 @@
-/* SPDX-License-Identifier:     GPL-2.0+ */
-/*
- * (C) Copyright 2019 Rockchip Electronics Co., Ltd
- */
-
-#ifndef _ROCKCHIP_CRYPTO_HD_H_
-#define _ROCKCHIP_CRYPTO_HD_H_
-
-struct rk_crypto_reg {
-	u32 crypto_intsts;
-	u32 crypto_intena;
-	u32 crypto_ctrl;
-	u32 crypto_conf;
-	u32 crypto_brdmas;
-	u32 crypto_btdmas;
-	u32 crypto_brdmal;
-	u32 crypto_hrdmas;
-	u32 crypto_hrdmal;
-	u32 reserved0[(0x80 - 0x24) / 4];
-
-	u32 crypto_aes_ctrl;
-	u32 crypto_aes_sts;
-	u32 crypto_aes_din[4];
-	u32 crypto_aes_dout[4];
-	u32 crypto_aes_iv[4];
-	u32 crypto_aes_key[8];
-	u32 crypto_aes_cnt[4];
-	u32 reserved1[(0x100 - 0xe8) / 4];
-
-	u32 crypto_tdes_ctrl;
-	u32 crypto_tdes_sts;
-	u32 crypto_tdes_din[2];
-	u32 crypto_tdes_dout[2];
-	u32 crypto_tdes_iv[2];
-	u32 crypto_tdes_key1[2];
-	u32 crypto_tdes_key2[2];
-	u32 crypto_tdes_key3[2];
-	u32 reserved2[(0x180 - 0x138) / 4];
-
-	u32 crypto_hash_ctrl;
-	u32 crypto_hash_sts;
-	u32 crypto_hash_meg_len;
-	u32 crypto_hash_dout[8];
-	u32 crypto_hash_seed[5];
-	u32 reserved3[(0x200 - 0x1c0) / 4];
-
-	u32 crypto_trng_ctrl;
-	u32 crypto_trng_dout[8];
-	u32 reserved4[(0x280 - 0x224) / 4];
-
-	u32 crypto_pka_ctrl;
-	u32 reserved5[(0x400 - 0x284) / 4];
-
-	u32 crypto_pka_m;
-	u32 reserved6[(0x500 - 0x404) / 4];
-
-	u32 crypto_pka_c;
-	u32 reserved7[(0x600 - 0x504) / 4];
-
-	u32 crypto_pka_n;
-	u32 reserved8[(0x700 - 0x604) / 4];
-
-	u32 crypto_pka_e;
-};
-
-#define CRYPTO_DEFAULT_CLK           10000000
-#define SHA_256_BIT                  256
-/* crypto_hash_ctrl */
-#define HASH_SWAP_DO                 0x8
-#define ENGINE_SELECTION_SHA256      0x2
-/* crypto_conf */
-#define HR_ADDR_MODE                 (1 << 8)
-#define BT_ADDR_MODE                 (1 << 7)
-#define BR_ADDR_MODE                 (1 << 6)
-#define BYTESWAP_HRFIFO              (1 << 5)
-#define BYTESWAP_BTFIFO              (1 << 4)
-#define BYTESWAP_BRFIFO              (1 << 3)
-#define DESSEL                       (1 << 2)
-/* crypto_ctrl */
-#define TRNG_FLUSH                   (1 << 9)
-#define TRNG_START                   (1 << 8)
-#define PKA_FLUSH                    (1 << 7)
-#define HASH_FLUSH                   (1 << 6)
-#define BLOCK_FLUSH                  (1 << 5)
-#define PKA_START                    (1 << 4)
-#define HASH_START                   (1 << 3)
-#define BLOCK_START                  (1 << 2)
-#define TDES_START                   (1 << 1)
-#define AES_START                    (1 << 0)
-#define PKA_HASH_CTRL                (PKA_FLUSH | HASH_FLUSH)
-#define PKA_CTRL                     (PKA_FLUSH | PKA_START)
-/* crypto_intsts */
-#define PKA_DONE_INT                 (1 << 5)
-#define HASH_DONE_INT                (1 << 4)
-#define HRDMA_ERR_INT                (1 << 3)
-#define HRDMA_DONE_INT               (1 << 2)
-#define BCDMA_ERR_INT                (1 << 1)
-#define BCDMA_DONE_INT               (1 << 0)
-/* crypto_pka_ctrl */
-#define PKA_BLOCK_SIZE_2048          2
-
-struct dm_rk_crypto_ops {
-	int (*sha_init)(struct udevice *dev, u32 msg_len, int hash_bits);
-	int (*sha_byte_swap)(struct udevice *dev, int en);
-	int (*sha_start)(struct udevice *dev, u32 *data, u32 data_len);
-	int (*sha_end)(struct udevice *dev, u32 *result);
-	int (*rsa_init)(struct udevice *dev);
-	int (*rsa_start)(struct udevice *dev, u32 *m, u32 *n, u32 *e, u32 *c);
-	int (*rsa_end)(struct udevice *dev, u32 *result);
-};
-
-#endif

commit cc6ac5d64f8b6de9febcac3190279c2ad3f586c9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon May 13 10:43:21 2019 +0800

    dm: add crypto uclass and cmd support
    
    Change-Id: I2241c90aca9695cd28bb9ca2a220d0e1af8ca932
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/cmd/Kconfig b/cmd/Kconfig
index c2d90640f4..6e23561996 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -532,6 +532,15 @@ config CMD_STRINGS
 	  within the range are displayed. The minimum number of characters
 	  for a sequence to be considered a string can be provided.
 
+config CMD_CRYPTO
+	bool "crypto test"
+	depends on DM_CRYPTO
+	select SHA1
+	select SHA256
+	select MD5
+	help
+	  Crypto test.
+
 endmenu
 
 menu "Compression commands"
diff --git a/cmd/Makefile b/cmd/Makefile
index 6ac48171a1..7ff83c2524 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -38,6 +38,7 @@ obj-$(CONFIG_CMD_CONFIG) += config.o
 obj-$(CONFIG_CMD_CONSOLE) += console.o
 obj-$(CONFIG_CMD_CPU) += cpu.o
 obj-$(CONFIG_CMD_CHARGE_DISPLAY) += charge.o
+obj-$(CONFIG_CMD_CRYPTO) += crypto.o
 obj-$(CONFIG_DATAFLASH_MMC_SELECT) += dataflash_mmc_mux.o
 obj-$(CONFIG_CMD_DATE) += date.o
 obj-$(CONFIG_CMD_DEMO) += demo.o
diff --git a/cmd/crypto.c b/cmd/crypto.c
new file mode 100644
index 0000000000..8a5c19dbb4
--- /dev/null
+++ b/cmd/crypto.c
@@ -0,0 +1,280 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <command.h>
+#include <crypto.h>
+#include <dm.h>
+#include <u-boot/md5.h>
+#include <u-boot/sha1.h>
+#include <u-boot/sha256.h>
+
+static u8 foo_data[] = {
+	0x52, 0x53, 0x41, 0x4b, 0x00, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x00,
+	0xda, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xd5, 0xf2, 0xfc, 0xbb,
+	0x1a, 0x39, 0x61, 0xf5, 0x63, 0x7f, 0xa6, 0xeb, 0x5d, 0xc5, 0x22, 0xe2,
+	0x65, 0x03, 0xcc, 0x61, 0x92, 0x60, 0x4c, 0x5f, 0x4e, 0x81, 0x96, 0x3d,
+	0x89, 0x1d, 0xa3, 0x5c, 0xb7, 0x88, 0xc3, 0x75, 0xcd, 0x71, 0xf0, 0x16,
+	0x04, 0x5e, 0xef, 0x85, 0xdf, 0x30, 0x57, 0x7e, 0x06, 0x0d, 0x44, 0x3b,
+	0x80, 0x22, 0x41, 0xcd, 0xba, 0x40, 0xb5, 0xfa, 0xbe, 0x8f, 0xa9, 0x61,
+	0x4d, 0xc6, 0x2a, 0xd9, 0x96, 0x57, 0x57, 0xc6, 0xc0, 0x99, 0xc0, 0x94,
+	0x57, 0x21, 0x0a, 0xad, 0xde, 0x4c, 0xe1, 0xaa, 0x6e, 0x11, 0xc6, 0xeb,
+	0xa2, 0x09, 0x65, 0xd9, 0xd5, 0xc6, 0x8f, 0x8d, 0xb6, 0xec, 0xb3, 0xca,
+	0x29, 0xa4, 0x9f, 0xab, 0x90, 0x7e, 0xf2, 0x86, 0x92, 0x25, 0x71, 0xf4,
+	0x17, 0x70, 0x92, 0xe0, 0xd0, 0xe2, 0xe1, 0x57, 0xc4, 0xca, 0x44, 0xbb,
+	0x14, 0xdc, 0xf8, 0x1a, 0x27, 0x00, 0x8f, 0x30, 0xcd, 0x0a, 0x4a, 0x26,
+	0x42, 0x07, 0xa1, 0x1e, 0x69, 0x7e, 0xfd, 0xc4, 0x38, 0xf8, 0x53, 0xfe,
+	0xcd, 0xa7, 0xfc, 0x7d, 0xa1, 0x87, 0xe8, 0xec, 0x52, 0x01, 0x37, 0x43,
+	0x0c, 0xf2, 0x2e, 0x89, 0x3d, 0xaa, 0xed, 0x9d, 0x83, 0x13, 0x8f, 0x79,
+	0xec, 0xb3, 0x7f, 0xbe, 0xf9, 0x36, 0x99, 0x8d, 0x93, 0xc2, 0x4d, 0x8f,
+	0x8f, 0x18, 0x1e, 0x94, 0x25, 0xe7, 0x0b, 0xdc, 0xd9, 0x85, 0x88, 0x77,
+	0x7e, 0x25, 0x80, 0x10, 0xde, 0xb6, 0xdd, 0xe6, 0xb6, 0xba, 0xe9, 0x1d,
+	0xac, 0xd2, 0xd7, 0x1c, 0x8e, 0x86, 0x5e, 0xd1, 0xc0, 0x97, 0x59, 0x79,
+	0x7e, 0x1a, 0x96, 0x6a, 0xa1, 0x09, 0xc0, 0x45, 0xb0, 0x71, 0x2d, 0xd1,
+	0x87, 0x6f, 0xbe, 0x31, 0x21, 0xcb, 0x52, 0xde, 0x48, 0x41, 0x73, 0x7e,
+	0x4a, 0x2f, 0xf8, 0x95, 0x0c, 0x2d, 0xb4, 0x9d, 0x53, 0x70, 0xcd, 0xa5,
+	0x01, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0xa5, 0x0d, 0xc2, 0xc6, 0xf1, 0x08, 0x95, 0x55,
+	0x1d, 0xb3, 0xf9, 0x43, 0xb0, 0x7b, 0x5b, 0x96, 0xa0, 0x72, 0xe8, 0xd6,
+	0x95, 0xd6, 0x98, 0xec, 0x53, 0x6b, 0x85, 0x77, 0x74, 0x21, 0xf1, 0x22,
+	0x5c, 0x4d, 0x56, 0x55, 0x89, 0x0d, 0x60, 0xa5, 0x2b, 0x68, 0xf8, 0x71,
+	0x6d, 0x72, 0xed, 0x67, 0x55, 0x3e, 0x5f, 0xd1, 0x9e, 0x21, 0xa7, 0x6e,
+	0x5c, 0xf2, 0xac, 0xe8, 0x66, 0x1d, 0x4e, 0xe5, 0x58, 0x76, 0xed, 0x2b,
+	0xfe, 0x2b, 0xc9, 0xf6, 0x7f, 0xb7, 0x02, 0x27, 0xfd, 0x25, 0x3f, 0x2d,
+	0x7c, 0x1c, 0x37, 0x80, 0x29, 0x7f, 0x12, 0xd2, 0xd5, 0xae, 0x27, 0xc6,
+	0x68, 0x24, 0x83, 0xc5, 0x61, 0x8b, 0xea, 0x1a, 0xbd, 0x07, 0x96, 0xe4,
+	0xd1, 0xc5, 0xd4, 0x21, 0x39, 0x4a, 0xaa, 0x66, 0xd2, 0x3f, 0xd2, 0x67,
+	0x55, 0x39, 0xbf, 0x40, 0x66, 0x66, 0x5a, 0x92, 0xdd, 0x8d, 0xda, 0x5a,
+	0x89, 0x7e, 0x78, 0xd9, 0x5f, 0x42, 0xe4, 0x16, 0xdb, 0x76, 0x49, 0xe0,
+	0x71, 0x98, 0x8e, 0xed, 0x61, 0xd9, 0x63, 0x0a, 0x11, 0xf6, 0x24, 0x7f,
+	0x9b, 0xf2, 0xee, 0xfc, 0xa4, 0x4c, 0x98, 0x81, 0xfb, 0x2d, 0xd3, 0x8f,
+	0x29, 0x77, 0x63, 0xd9, 0x51, 0xfc, 0xe1, 0x17, 0x3f, 0xc3, 0xce, 0xca,
+	0xbe, 0xec, 0xf2, 0xc9, 0x07, 0x48, 0x74, 0x54, 0xbb, 0x1d, 0x02, 0xe7,
+	0xaf, 0x18, 0x27, 0x39, 0xb8, 0xc4, 0x90, 0x05, 0x20, 0x5b, 0x38, 0x7b,
+	0x3a, 0x15, 0x94, 0x7e, 0xe8, 0xc1, 0xa5, 0x8c, 0xc0, 0x6c, 0x86, 0x96,
+	0xeb, 0x46, 0xfa, 0xad, 0x2e, 0x69, 0x12, 0x56, 0xb9, 0x51, 0x91, 0x9c,
+	0xea, 0x83, 0x4b, 0xd3, 0x5f, 0xb7, 0xdd, 0x29, 0x99, 0xb9, 0x66, 0x65,
+	0x5e, 0xe2, 0x59, 0x16, 0x20, 0xa2, 0xda, 0x0e, 0x8e, 0xd4, 0x41, 0xdc,
+	0x1e, 0x75, 0x32, 0xf8, 0x73, 0xfa, 0x22, 0x7b, 0x22, 0x7c, 0x7d, 0x9d,
+	0x03, 0x89, 0x54, 0x27, 0x8f, 0xbb, 0x12, 0xbb, 0x29, 0x0a, 0xe0, 0x41,
+	0x4e, 0x80, 0x1b, 0x3f, 0x9c, 0x6d, 0xc1, 0x79, 0xdb, 0x3c, 0xc4, 0xd2,
+	0x65, 0x99, 0xd7, 0x16, 0xff, 0xff, 0xff, 0xff, 0xd1, 0x95, 0x46, 0x66,
+	0x83, 0xe2, 0x1b, 0xd4, 0x35, 0x1f, 0x5d, 0xf2, 0x1e, 0xb5, 0x43, 0x22,
+	0xe4, 0x41, 0xe6, 0x6a, 0x46, 0x93, 0x24, 0x89, 0x1b, 0x74, 0x3c, 0xa0,
+	0x20, 0x3b, 0x4e, 0x64, 0xff, 0xff, 0xff, 0xff,
+};
+
+static u8 rsa2048_n[] = {
+	0xd5, 0xf2, 0xfc, 0xbb, 0x1a, 0x39, 0x61, 0xf5, 0x63, 0x7f, 0xa6, 0xeb,
+	0x5d, 0xc5, 0x22, 0xe2, 0x65, 0x03, 0xcc, 0x61, 0x92, 0x60, 0x4c, 0x5f,
+	0x4e, 0x81, 0x96, 0x3d, 0x89, 0x1d, 0xa3, 0x5c, 0xb7, 0x88, 0xc3, 0x75,
+	0xcd, 0x71, 0xf0, 0x16, 0x04, 0x5e, 0xef, 0x85, 0xdf, 0x30, 0x57, 0x7e,
+	0x06, 0x0d, 0x44, 0x3b, 0x80, 0x22, 0x41, 0xcd, 0xba, 0x40, 0xb5, 0xfa,
+	0xbe, 0x8f, 0xa9, 0x61, 0x4d, 0xc6, 0x2a, 0xd9, 0x96, 0x57, 0x57, 0xc6,
+	0xc0, 0x99, 0xc0, 0x94, 0x57, 0x21, 0x0a, 0xad, 0xde, 0x4c, 0xe1, 0xaa,
+	0x6e, 0x11, 0xc6, 0xeb, 0xa2, 0x09, 0x65, 0xd9, 0xd5, 0xc6, 0x8f, 0x8d,
+	0xb6, 0xec, 0xb3, 0xca, 0x29, 0xa4, 0x9f, 0xab, 0x90, 0x7e, 0xf2, 0x86,
+	0x92, 0x25, 0x71, 0xf4, 0x17, 0x70, 0x92, 0xe0, 0xd0, 0xe2, 0xe1, 0x57,
+	0xc4, 0xca, 0x44, 0xbb, 0x14, 0xdc, 0xf8, 0x1a, 0x27, 0x00, 0x8f, 0x30,
+	0xcd, 0x0a, 0x4a, 0x26, 0x42, 0x07, 0xa1, 0x1e, 0x69, 0x7e, 0xfd, 0xc4,
+	0x38, 0xf8, 0x53, 0xfe, 0xcd, 0xa7, 0xfc, 0x7d, 0xa1, 0x87, 0xe8, 0xec,
+	0x52, 0x01, 0x37, 0x43, 0x0c, 0xf2, 0x2e, 0x89, 0x3d, 0xaa, 0xed, 0x9d,
+	0x83, 0x13, 0x8f, 0x79, 0xec, 0xb3, 0x7f, 0xbe, 0xf9, 0x36, 0x99, 0x8d,
+	0x93, 0xc2, 0x4d, 0x8f, 0x8f, 0x18, 0x1e, 0x94, 0x25, 0xe7, 0x0b, 0xdc,
+	0xd9, 0x85, 0x88, 0x77, 0x7e, 0x25, 0x80, 0x10, 0xde, 0xb6, 0xdd, 0xe6,
+	0xb6, 0xba, 0xe9, 0x1d, 0xac, 0xd2, 0xd7, 0x1c, 0x8e, 0x86, 0x5e, 0xd1,
+	0xc0, 0x97, 0x59, 0x79, 0x7e, 0x1a, 0x96, 0x6a, 0xa1, 0x09, 0xc0, 0x45,
+	0xb0, 0x71, 0x2d, 0xd1, 0x87, 0x6f, 0xbe, 0x31, 0x21, 0xcb, 0x52, 0xde,
+	0x48, 0x41, 0x73, 0x7e, 0x4a, 0x2f, 0xf8, 0x95, 0x0c, 0x2d, 0xb4, 0x9d,
+	0x53, 0x70, 0xcd, 0xa5,
+};
+
+static u8 rsa2048_e[] = {
+	0x01, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+};
+
+static u8 rsa2048_c[] = {
+	0xa5, 0x0d, 0xc2, 0xc6, 0xf1, 0x08, 0x95, 0x55, 0x1d, 0xb3, 0xf9, 0x43,
+	0xb0, 0x7b, 0x5b, 0x96, 0xa0, 0x72, 0xe8, 0xd6, 0x95, 0xd6, 0x98, 0xec,
+	0x53, 0x6b, 0x85, 0x77, 0x74, 0x21, 0xf1, 0x22, 0x5c, 0x4d, 0x56, 0x55,
+	0x89, 0x0d, 0x60, 0xa5, 0x2b, 0x68, 0xf8, 0x71, 0x6d, 0x72, 0xed, 0x67,
+	0x55, 0x3e, 0x5f, 0xd1, 0x9e, 0x21, 0xa7, 0x6e, 0x5c, 0xf2, 0xac, 0xe8,
+	0x66, 0x1d, 0x4e, 0xe5, 0x58, 0x76, 0xed, 0x2b, 0xfe, 0x2b, 0xc9, 0xf6,
+	0x7f, 0xb7, 0x02, 0x27, 0xfd, 0x25, 0x3f, 0x2d, 0x7c, 0x1c, 0x37, 0x80,
+	0x29, 0x7f, 0x12, 0xd2, 0xd5, 0xae, 0x27, 0xc6, 0x68, 0x24, 0x83, 0xc5,
+	0x61, 0x8b, 0xea, 0x1a, 0xbd, 0x07, 0x96, 0xe4, 0xd1, 0xc5, 0xd4, 0x21,
+	0x39, 0x4a, 0xaa, 0x66, 0xd2, 0x3f, 0xd2, 0x67, 0x55, 0x39, 0xbf, 0x40,
+	0x66, 0x66, 0x5a, 0x92, 0xdd, 0x8d, 0xda, 0x5a, 0x89, 0x7e, 0x78, 0xd9,
+	0x5f, 0x42, 0xe4, 0x16, 0xdb, 0x76, 0x49, 0xe0, 0x71, 0x98, 0x8e, 0xed,
+	0x61, 0xd9, 0x63, 0x0a, 0x11, 0xf6, 0x24, 0x7f, 0x9b, 0xf2, 0xee, 0xfc,
+	0xa4, 0x4c, 0x98, 0x81, 0xfb, 0x2d, 0xd3, 0x8f, 0x29, 0x77, 0x63, 0xd9,
+	0x51, 0xfc, 0xe1, 0x17, 0x3f, 0xc3, 0xce, 0xca, 0xbe, 0xec, 0xf2, 0xc9,
+	0x07, 0x48, 0x74, 0x54, 0xbb, 0x1d, 0x02, 0xe7, 0xaf, 0x18, 0x27, 0x39,
+	0xb8, 0xc4, 0x90, 0x05, 0x20, 0x5b, 0x38, 0x7b, 0x3a, 0x15, 0x94, 0x7e,
+	0xe8, 0xc1, 0xa5, 0x8c, 0xc0, 0x6c, 0x86, 0x96, 0xeb, 0x46, 0xfa, 0xad,
+	0x2e, 0x69, 0x12, 0x56, 0xb9, 0x51, 0x91, 0x9c, 0xea, 0x83, 0x4b, 0xd3,
+	0x5f, 0xb7, 0xdd, 0x29, 0x99, 0xb9, 0x66, 0x65, 0x5e, 0xe2, 0x59, 0x16,
+	0x20, 0xa2, 0xda, 0x0e, 0x8e, 0xd4, 0x41, 0xdc, 0x1e, 0x75, 0x32, 0xf8,
+	0x73, 0xfa, 0x22, 0x7b,
+};
+
+/* RSA2048-SHA256 sign data of foo_data[] */
+static u8 rsa2048_sha256_sign[] = {
+	0xd4, 0x05, 0x21, 0x34, 0x2c, 0x92, 0xaf, 0x73, 0x72, 0x13, 0x54, 0x92,
+	0x9b, 0x57, 0x63, 0x82, 0xd4, 0x7c, 0x41, 0xba, 0x58, 0x3e, 0xa6, 0x82,
+	0xe8, 0x56, 0x9f, 0x1c, 0xc2, 0x6d, 0x07, 0x6d, 0xe0, 0xca, 0x4c, 0x93,
+	0xb4, 0xa4, 0x82, 0x53, 0x41, 0x58, 0xeb, 0x77, 0xd5, 0x2c, 0xf5, 0x3f,
+	0x3d, 0x1b, 0x54, 0x1b, 0x6a, 0x18, 0x30, 0xc1, 0x93, 0x14, 0x8f, 0xdd,
+	0x77, 0xe4, 0xed, 0xb8, 0xd3, 0xfc, 0x63, 0xed, 0x88, 0x2f, 0xf4, 0x35,
+	0xc4, 0xdb, 0x89, 0x94, 0x4a, 0xcd, 0x88, 0x88, 0x4f, 0xc3, 0xeb, 0x14,
+	0x03, 0xd9, 0x85, 0x2e, 0x7a, 0x27, 0xbd, 0xc9, 0x19, 0xbf, 0x55, 0x50,
+	0x2a, 0x29, 0x23, 0x02, 0xe4, 0xaf, 0x16, 0x5c, 0x17, 0x81, 0x38, 0x79,
+	0xf1, 0x2b, 0x9a, 0xc7, 0xd2, 0x9d, 0x66, 0xca, 0xf7, 0x6b, 0xf0, 0x83,
+	0x81, 0x57, 0xfc, 0x56, 0xae, 0x6d, 0x98, 0xae, 0xe2, 0xec, 0x00, 0x19,
+	0x6b, 0x75, 0x06, 0xdc, 0x1c, 0x6e, 0xbd, 0x23, 0x15, 0xb1, 0x3a, 0x43,
+	0x7e, 0x3c, 0x8b, 0x32, 0x9c, 0x4d, 0xa2, 0xcf, 0x14, 0xee, 0xd8, 0x7a,
+	0x12, 0x90, 0x70, 0xd2, 0x9f, 0xd5, 0x6d, 0x50, 0x67, 0x35, 0x93, 0x97,
+	0x2e, 0xff, 0x8f, 0xbf, 0x34, 0x4c, 0xa9, 0xee, 0x6a, 0xaa, 0x87, 0x09,
+	0x1f, 0x6b, 0xcc, 0x3d, 0xeb, 0x88, 0xca, 0x8f, 0x45, 0x86, 0xb7, 0xb2,
+	0xd6, 0xd8, 0xe5, 0x3e, 0x94, 0x02, 0x4b, 0xa7, 0x74, 0xb8, 0x5f, 0x1f,
+	0xe3, 0xbc, 0x95, 0x72, 0x3b, 0x51, 0xd4, 0xec, 0x8d, 0x87, 0xca, 0xb0,
+	0x69, 0xca, 0xa9, 0x68, 0xfc, 0x34, 0xf9, 0xb5, 0x67, 0xef, 0xac, 0xc2,
+	0x10, 0x1a, 0x39, 0x56, 0xcb, 0x38, 0x45, 0x92, 0x74, 0x2e, 0x24, 0x1c,
+	0x4e, 0x31, 0x80, 0xd9, 0x2d, 0x5f, 0x74, 0x48, 0xfe, 0x46, 0x4e, 0xf6,
+	0x19, 0x9a, 0x1d, 0x32,
+};
+
+static void dump(const char *title, void *hard_d, void *soft_d, u32 nbits)
+{
+	int i, same;
+	char *buf;
+
+	same = !memcmp(hard_d, soft_d, BITS2BYTE(nbits));
+	printf("[%s]: %s\n", title, same ? "OK" : "FAIL");
+
+	printf("    hard: ");
+	buf = hard_d;
+	for (i = 0; i < BITS2BYTE(nbits); i++)
+		printf("%02x ", buf[i]);
+
+	printf("\n    soft: ");
+	buf = soft_d;
+	for (i = 0; i < BITS2BYTE(nbits); i++)
+		printf("%02x ", buf[i]);
+
+	printf("\n\n");
+}
+
+static int do_crypto(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+	struct udevice *dev;
+	sha_context csha_ctx;
+	sha1_context sha1_ctx;
+	sha256_context sha256_ctx;
+	rsa_key rsa_key;
+	u8 sha256_out0[32];
+	u8 sha256_out1[32];
+	u8 sha1_out0[20];
+	u8 sha1_out1[20];
+	u8 rsa_out[32];
+	u8 md5_out0[16];
+	u8 md5_out1[16];
+	u32 cap;
+
+	cap = CRYPTO_MD5 | CRYPTO_SHA1 | CRYPTO_SHA256 | CRYPTO_RSA2048;
+	dev = crypto_get_device(cap);
+	if (!dev) {
+		printf("Can't find crypto device for expected capability\n");
+		return -ENODEV;
+	}
+
+	/* MD5 */
+	csha_ctx.algo = CRYPTO_MD5;
+	csha_ctx.length = sizeof(foo_data);
+	crypto_sha_csum(dev, &csha_ctx, (char *)foo_data,
+			sizeof(foo_data), md5_out0);
+	md5(foo_data, sizeof(foo_data), md5_out1);
+	dump("MD5", md5_out0, md5_out1, crypto_algo_nbits(csha_ctx.algo));
+
+	/* SHA1 */
+	csha_ctx.algo = CRYPTO_SHA1;
+	csha_ctx.length = sizeof(foo_data);
+	crypto_sha_csum(dev, &csha_ctx, (char *)foo_data,
+			sizeof(foo_data), sha1_out0);
+	sha1_starts(&sha1_ctx);
+	sha1_update(&sha1_ctx, (const u8 *)foo_data, sizeof(foo_data));
+	sha1_finish(&sha1_ctx, sha1_out1);
+	dump("SHA1", sha1_out0, sha1_out1, crypto_algo_nbits(csha_ctx.algo));
+
+	/* SHA256 */
+	csha_ctx.algo = CRYPTO_SHA256;
+	csha_ctx.length = sizeof(foo_data);
+	crypto_sha_csum(dev, &csha_ctx, (char *)foo_data,
+			sizeof(foo_data), sha256_out0);
+	sha256_starts(&sha256_ctx);
+	sha256_update(&sha256_ctx, (const u8 *)foo_data, sizeof(foo_data));
+	sha256_finish(&sha256_ctx, sha256_out1);
+	dump("SHA256", sha256_out0, sha256_out1,
+	     crypto_algo_nbits(csha_ctx.algo));
+
+	/* RSA2048-SHA256 */
+	rsa_key.algo = CRYPTO_RSA2048;
+	rsa_key.n = (u32 *)&rsa2048_n;
+	rsa_key.e = (u32 *)&rsa2048_e;
+	rsa_key.c = (u32 *)&rsa2048_c;
+	crypto_rsa_verify(dev, &rsa_key, rsa2048_sha256_sign, rsa_out);
+	dump("RSA2048-SHA256", rsa_out,
+	     sha256_out1, crypto_algo_nbits(csha_ctx.algo));
+
+	return 0;
+}
+
+U_BOOT_CMD(
+	crypto, 1, 1, do_crypto,
+	"crypto test",
+	""
+);
diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
index 709268c8c7..89ccc48c30 100644
--- a/drivers/crypto/Kconfig
+++ b/drivers/crypto/Kconfig
@@ -1,5 +1,11 @@
 menu "Hardware crypto devices"
 
+config DM_CRYPTO
+	bool "Enable Driver Model for CRYPTO drivers (UCLASS_CRYPTO)"
+	depends on DM
+	---help---
+	This config enables the dm crypto support.
+
 source drivers/crypto/fsl/Kconfig
 source drivers/crypto/rockchip/Kconfig
 
diff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile
index 0b770fcd64..a3a8db66a9 100644
--- a/drivers/crypto/Makefile
+++ b/drivers/crypto/Makefile
@@ -5,7 +5,7 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
 
+obj-$(CONFIG_DM_CRYPTO)		+= crypto-uclass.o
 obj-$(CONFIG_EXYNOS_ACE_SHA)	+= ace_sha.o
 obj-y += rsa_mod_exp/
 obj-y += fsl/
-obj-$(CONFIG_CRYPTO_ROCKCHIP) += rockchip/
diff --git a/drivers/crypto/crypto-uclass.c b/drivers/crypto/crypto-uclass.c
new file mode 100644
index 0000000000..9e5cfbea24
--- /dev/null
+++ b/drivers/crypto/crypto-uclass.c
@@ -0,0 +1,121 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <crypto.h>
+#include <dm.h>
+#include <u-boot/sha1.h>
+
+u32 crypto_algo_nbits(u32 algo)
+{
+	switch (algo) {
+	case CRYPTO_MD5:
+		return 128;
+	case CRYPTO_SHA1:
+		return 160;
+	case CRYPTO_SHA256:
+		return 256;
+	case CRYPTO_RSA512:
+		return 512;
+	case CRYPTO_RSA1024:
+		return 1024;
+	case CRYPTO_RSA2048:
+		return 2048;
+	}
+
+	printf("Unknown crypto algorithm: 0x%x\n", algo);
+
+	return 0;
+}
+
+struct udevice *crypto_get_device(u32 capability)
+{
+	const struct dm_crypto_ops *ops;
+	struct udevice *dev;
+	struct uclass *uc;
+	int ret;
+	u32 cap;
+
+	ret = uclass_get(UCLASS_CRYPTO, &uc);
+	if (ret)
+		return NULL;
+
+	for (uclass_first_device(UCLASS_CRYPTO, &dev);
+	     dev;
+	     uclass_next_device(&dev)) {
+		ops = device_get_ops(dev);
+		if (!ops || !ops->capability)
+			continue;
+
+		cap = ops->capability(dev);
+		if ((cap & capability) == capability)
+			return dev;
+	}
+
+	return NULL;
+}
+
+int crypto_sha_init(struct udevice *dev, sha_context *ctx)
+{
+	const struct dm_crypto_ops *ops = device_get_ops(dev);
+
+	if (!ops || !ops->sha_init)
+		return -ENOSYS;
+
+	return ops->sha_init(dev, ctx);
+}
+
+int crypto_sha_update(struct udevice *dev, u32 *input, u32 len)
+{
+	const struct dm_crypto_ops *ops = device_get_ops(dev);
+
+	if (!ops || !ops->sha_update)
+		return -ENOSYS;
+
+	return ops->sha_update(dev, input, len);
+}
+
+int crypto_sha_final(struct udevice *dev, sha_context *ctx, u8 *output)
+{
+	const struct dm_crypto_ops *ops = device_get_ops(dev);
+
+	if (!ops || !ops->sha_final)
+		return -ENOSYS;
+
+	return ops->sha_final(dev, ctx, output);
+}
+
+int crypto_sha_csum(struct udevice *dev, sha_context *ctx,
+		    char *input, u32 input_len, u8 *output)
+{
+	int ret;
+
+	ret = crypto_sha_init(dev, ctx);
+	if (ret)
+		return ret;
+
+	ret = crypto_sha_update(dev, (u32 *)input, input_len);
+	if (ret)
+		return ret;
+
+	ret = crypto_sha_final(dev, ctx, output);
+
+	return ret;
+}
+
+int crypto_rsa_verify(struct udevice *dev, rsa_key *ctx, u8 *sign, u8 *output)
+{
+	const struct dm_crypto_ops *ops = device_get_ops(dev);
+
+	if (!ops || !ops->rsa_verify)
+		return -ENOSYS;
+
+	return ops->rsa_verify(dev, ctx, sign, output);
+}
+
+UCLASS_DRIVER(crypto) = {
+	.id	= UCLASS_CRYPTO,
+	.name	= "crypto",
+};
diff --git a/include/crypto.h b/include/crypto.h
new file mode 100644
index 0000000000..d5dcb5d274
--- /dev/null
+++ b/include/crypto.h
@@ -0,0 +1,122 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _CORE_CRYPTO_H_
+#define _CORE_CRYPTO_H_
+
+/* Algorithms/capability of crypto, works together with crypto_algo_nbits() */
+#define CRYPTO_MD5		BIT(0)
+#define CRYPTO_SHA1		BIT(1)
+#define CRYPTO_SHA256		BIT(2)
+#define CRYPTO_RSA512		BIT(3)
+#define CRYPTO_RSA1024		BIT(4)
+#define CRYPTO_RSA2048		BIT(5)
+
+#define BYTE2WORD(bytes)	((bytes) / 4)
+#define BITS2BYTE(nbits)	((nbits) / 8)
+#define BITS2WORD(nbits)	((nbits) / 32)
+
+typedef struct {
+	u32 algo;	/* Algorithm: CRYPTO_MD5/CRYPTO_SHA1/CRYPTO_RSA2048... */
+	u32 length;	/* Data total length */
+
+} sha_context;
+
+typedef struct {
+	u32 algo;	/* Algorithm: CRYPTO_MD5/CRYPTO_SHA1/CRYPTO_RSA2048... */
+	u32 *n;		/* Public key factor N */
+	u32 *e;		/* Public key factor E */
+	u32 *c;		/* Optional, a accelerate factor for some crypto */
+} rsa_key;
+
+struct dm_crypto_ops {
+	/* Hardware algorithm capability */
+	u32 (*capability)(struct udevice *dev);
+
+	/* SHA init/update/final */
+	int (*sha_init)(struct udevice *dev, sha_context *ctx);
+	int (*sha_update)(struct udevice *dev, u32 *input, u32 len);
+	int (*sha_final)(struct udevice *dev, sha_context *ctx, u8 *output);
+
+	/* RSA verify */
+	int (*rsa_verify)(struct udevice *dev, rsa_key *ctx,
+			  u8 *sign, u8 *output);
+};
+
+/**
+ * crypto_algo_nbits() - Get algorithm bits accroding to algorithm
+ * @capability: expected algorithm capability, eg. CRYPTO_MD5/RSA2048...
+ *
+ * @return algorithm bits
+ */
+u32 crypto_algo_nbits(u32 algo);
+
+/**
+ * crypto_get_device() - Get crypto device by capability
+ * @capability: expected algorithm capability, eg. CRYPTO_MD5/RSA2048...
+ *
+ * @return dev on success, otherwise NULL
+ */
+struct udevice *crypto_get_device(u32 capability);
+
+/**
+ * crypto_sha_init() - Crypto sha init
+ *
+ * @dev: crypto device
+ * @ctx: sha context
+ *
+ * @return 0 on success, otherwise failed
+ */
+int crypto_sha_init(struct udevice *dev, sha_context *ctx);
+
+/**
+ * crypto_sha_update() - Crypto sha update
+ *
+ * @dev: crypto device
+ * @input: input data buffer
+ * @len: input data length
+ *
+ * @return 0 on success, otherwise failed
+ */
+int crypto_sha_update(struct udevice *dev, u32 *input, u32 len);
+
+/**
+ * crypto_sha_final() - Crypto sha finish and get result
+ *
+ * @dev: crypto device
+ * @ctx: sha context
+ * @output: output hash data
+ *
+ * @return 0 on success, otherwise failed
+ */
+int crypto_sha_final(struct udevice *dev, sha_context *ctx, u8 *output);
+
+/**
+ * crypto_sha_csum() - Crypto sha hash for one data block only
+ *
+ * @dev: crypto device
+ * @ctx: sha context
+ * @input: input data buffer
+ * @input_len: input data length
+ * @output: output hash data
+ *
+ * @return 0 on success, otherwise failed
+ */
+int crypto_sha_csum(struct udevice *dev, sha_context *ctx,
+		    char *input, u32 input_len, u8 *output);
+
+/**
+ * crypto_rsa_verify() - Crypto rsa verify
+ *
+ * @dev: crypto device
+ * @ctx: rsa key context
+ * @sign: signature
+ * @output: output hash data buffer
+ *
+ * @return 0 on success, otherwise failed
+ */
+int crypto_rsa_verify(struct udevice *dev, rsa_key *ctx, u8 *sign, u8 *output);
+
+#endif
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index b51b9873f2..69cf23a940 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -101,7 +101,7 @@ enum uclass_id {
 	UCLASS_CHARGE_DISPLAY,	/* Charge display */
 	UCLASS_DVFS,		/* DVFS policy */
 	UCLASS_IO_DOMAIN,	/* IO domain */
-	UCLASS_RKCRYPTO,        /* Rockchip Crypto */
+	UCLASS_CRYPTO,		/* Crypto */
 	UCLASS_COUNT,
 	UCLASS_INVALID = -1,
 };

commit 272fdf68ed75c15079fff8123974ecda6545eb3b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed May 8 19:50:50 2019 +0800

    rockchip: dts: rk3399: add and enable crypto node
    
    Change-Id: I63866f6f63e331e7c2722399f9a1621c55a7590a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts
index e8e240898c..5605eaa0d0 100644
--- a/arch/arm/dts/rk3399-evb.dts
+++ b/arch/arm/dts/rk3399-evb.dts
@@ -215,6 +215,10 @@
 
 };
 
+&crypto {
+	status = "okay";
+};
+
 &uart2 {
 	status = "okay";
 };
diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi
index 21196f4c78..ded8e93b43 100644
--- a/arch/arm/dts/rk3399-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-u-boot.dtsi
@@ -53,6 +53,10 @@
 	u-boot,dm-pre-reloc;
 };
 
+&crypto {
+	u-boot,dm-pre-reloc;
+};
+
 &grf {
 	u-boot,dm-pre-reloc;
 };
diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
index 6c56e51588..0f87ef67c4 100644
--- a/arch/arm/dts/rk3399.dtsi
+++ b/arch/arm/dts/rk3399.dtsi
@@ -202,6 +202,14 @@
 		};
 	};
 
+	crypto: crypto@ff8b0000 {
+		compatible = "rockchip,rk3399-crypto";
+		reg = <0x0 0xff8b0000 0x0 0x10000>;
+		clock-names = "sclk_crypto0";
+		clocks = <&cru SCLK_CRYPTO0>, <&cru SCLK_CRYPTO1>;
+		status = "disabled";
+	};
+
 	pcie0: pcie@f8000000 {
 		compatible = "rockchip,rk3399-pcie";
 		reg = <0x0 0xf8000000 0x0 0x2000000>,

commit 5ee9804858fe427000faea68f1cc4ebadd501c6d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed May 8 18:45:56 2019 +0800

    rockchip: clk: rk3399: rename and export rockchip_get_clk()
    
    Change-Id: I454500829fe815f8374b957279949bd0c6c87c52
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3399/clk_rk3399.c b/arch/arm/mach-rockchip/rk3399/clk_rk3399.c
index cf5b8c9548..c5d27f17d1 100644
--- a/arch/arm/mach-rockchip/rk3399/clk_rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/clk_rk3399.c
@@ -11,7 +11,7 @@
 #include <asm/arch/clock.h>
 #include <asm/arch/cru_rk3399.h>
 
-static int rockchip_get_cruclk(struct udevice **devp)
+int rockchip_get_clk(struct udevice **devp)
 {
 	return uclass_get_device_by_driver(UCLASS_CLK,
 			DM_GET_DRIVER(clk_rk3399), devp);
@@ -23,7 +23,7 @@ void *rockchip_get_cru(void)
 	struct udevice *dev;
 	int ret;
 
-	ret = rockchip_get_cruclk(&dev);
+	ret = rockchip_get_clk(&dev);
 	if (ret)
 		return ERR_PTR(ret);
 

commit 88cae289b5aafbf2c7098a02fcdd5f88da644a29
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu May 16 11:28:18 2019 +0800

    clk: rockchip: rk3368: support crypto clk get/set rate
    
    Change-Id: I736fdda1d994ebdb59c68f8be209bae0e206be99
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3368.h b/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
index db2d777bde..dcb7d6eafd 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
@@ -131,6 +131,8 @@ enum {
 	ACLK_PERI_DIV_CON_MASK		= 0x1f,
 
 	/* CLKSEL10CON */
+	CLK_CRYPTO_DIV_CON_SHIFT	= 14,
+	CLK_CRYPTO_DIV_CON_MASK		= 0x3 << CLK_CRYPTO_DIV_CON_SHIFT,
 	PCLK_ALIVE_DIV_CON_SHIFT	= 8,
 	PCLK_ALIVE_DIV_CON_MASK		= 0x1f << PCLK_ALIVE_DIV_CON_SHIFT,
 
diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c
index 1ed2bea3f4..54555b826f 100644
--- a/drivers/clk/rockchip/clk_rk3368.c
+++ b/drivers/clk/rockchip/clk_rk3368.c
@@ -786,6 +786,35 @@ static ulong rk3368_alive_get_clk(struct rk3368_clk_priv *priv)
 	parent = GPLL_HZ;
 	return DIV_TO_RATE(parent, div);
 }
+
+static ulong rk3368_crypto_get_rate(struct rk3368_clk_priv *priv)
+{
+	struct rk3368_cru *cru = priv->cru;
+	u32 div, val;
+
+	val = readl(&cru->clksel_con[10]);
+	div = (val & CLK_CRYPTO_DIV_CON_MASK) >> CLK_CRYPTO_DIV_CON_SHIFT;
+
+	return DIV_TO_RATE(rk3368_bus_get_clk(priv->cru, ACLK_BUS), div);
+}
+
+static ulong rk3368_crypto_set_rate(struct rk3368_clk_priv *priv,
+				    uint hz)
+{
+	struct rk3368_cru *cru = priv->cru;
+	int src_clk_div;
+	uint p_rate;
+
+	p_rate = rk3368_bus_get_clk(priv->cru, ACLK_BUS);
+	src_clk_div = DIV_ROUND_UP(p_rate, hz) - 1;
+	assert(src_clk_div < 3);
+
+	rk_clrsetreg(&cru->clksel_con[10],
+		     CLK_CRYPTO_DIV_CON_MASK,
+		     src_clk_div << CLK_CRYPTO_DIV_CON_SHIFT);
+
+	return rk3368_crypto_get_rate(priv);
+}
 #endif
 
 static ulong rk3368_armclk_set_clk(struct rk3368_clk_priv *priv,
@@ -908,6 +937,9 @@ static ulong rk3368_clk_get_rate(struct clk *clk)
 	case PCLK_WDT:
 		rate = rk3368_alive_get_clk(priv);
 		break;
+	case SCLK_CRYPTO:
+		rate = rk3368_crypto_get_rate(priv);
+		break;
 #endif
 	default:
 		return -ENOENT;
@@ -985,6 +1017,9 @@ static ulong rk3368_clk_set_rate(struct clk *clk, ulong rate)
 	case ACLK_CCI_PRE:
 		ret =  0;
 		break;
+	case SCLK_CRYPTO:
+		ret = rk3368_crypto_set_rate(priv, rate);
+		break;
 #endif
 	default:
 		return -ENOENT;

commit 582fa222b926693c4001b2c6dbc728271b0d7416
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu May 16 11:27:44 2019 +0800

    clk: rockchip: rk3128: support crypto clk get/set rate
    
    Change-Id: I3a7d71a481aca04c9e6c0547cfc05a8106f79423
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3128.h b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
index 6c2b6cb1b1..cfc4cb3c70 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
@@ -165,6 +165,8 @@ enum {
 	SARADC_DIV_CON_SHIFT	= 8,
 	SARADC_DIV_CON_MASK	= GENMASK(15, 8),
 	SARADC_DIV_CON_WIDTH	= 8,
+	CLK_CRYPTO_DIV_CON_SHIFT= 0,
+	CLK_CRYPTO_DIV_CON_MASK	= GENMASK(1, 0),
 
 	/* CRU_CLKSEL27_CON*/
 	DCLK_VOP_SEL_SHIFT	= 0,
diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c
index edfdcef1c4..8af387bcff 100644
--- a/drivers/clk/rockchip/clk_rk3128.c
+++ b/drivers/clk/rockchip/clk_rk3128.c
@@ -469,6 +469,35 @@ static ulong rk3128_vop_get_rate(struct rk3128_clk_priv *priv, ulong clk_id)
 	}
 	return DIV_TO_RATE(parent, div);
 }
+
+static ulong rk3128_crypto_get_rate(struct rk3128_clk_priv *priv)
+{
+	struct rk3128_cru *cru = priv->cru;
+	u32 div, val;
+
+	val = readl(&cru->cru_clksel_con[24]);
+	div = (val & CLK_CRYPTO_DIV_CON_MASK) >> CLK_CRYPTO_DIV_CON_SHIFT;
+
+	return DIV_TO_RATE(rk3128_bus_get_clk(priv, ACLK_CPU), div);
+}
+
+static ulong rk3128_crypto_set_rate(struct rk3128_clk_priv *priv,
+				    uint hz)
+{
+	struct rk3128_cru *cru = priv->cru;
+	int src_clk_div;
+	uint p_rate;
+
+	p_rate = rk3128_bus_get_clk(priv, ACLK_CPU);
+	src_clk_div = DIV_ROUND_UP(p_rate, hz) - 1;
+	assert(src_clk_div < 3);
+
+	rk_clrsetreg(&cru->cru_clksel_con[24],
+		     CLK_CRYPTO_DIV_CON_MASK,
+		     src_clk_div << CLK_CRYPTO_DIV_CON_SHIFT);
+
+	return rk3128_crypto_get_rate(priv);
+}
 #endif
 
 static ulong rk3128_clk_get_rate(struct clk *clk)
@@ -522,6 +551,9 @@ static ulong rk3128_clk_get_rate(struct clk *clk)
 	case ACLK_LCDC0:
 		rate = rk3128_vop_get_rate(priv, clk->id);
 		break;
+	case SCLK_CRYPTO:
+		rate = rk3128_crypto_get_rate(priv);
+		break;
 #endif
 	default:
 		return -ENOENT;
@@ -586,6 +618,9 @@ static ulong rk3128_clk_set_rate(struct clk *clk, ulong rate)
 	case ACLK_LCDC0:
 		ret = rk3128_vop_set_clk(priv, clk->id, rate);
 		break;
+	case SCLK_CRYPTO:
+		ret = rk3128_crypto_set_rate(priv, rate);
+		break;
 #endif
 	default:
 		return -ENOENT;

commit 8b9843df21fb47683c041eedaf6ff6e756218799
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue May 14 21:15:01 2019 +0800

    common: android: fix uncompress kernel region check
    
    Change-Id: Ie8b6f7255eae3c2be86ccc2c33e04c8b21add75d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index c81b4e04b7..4083ac7507 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -326,12 +326,14 @@ static int android_bootloader_get_fdt(const char *part_name,
  *   | Image.lzma| 2683750     | 34%   |                 |               |
  *   |-------------------------------------------------------------------|
  */
-static int sysmem_alloc_uncomp_kernel(ulong kernel_address, u32 comp)
+static int sysmem_alloc_uncomp_kernel(ulong andr_hdr,
+				      ulong uncomp_kaddr, u32 comp)
 {
-	struct andr_img_hdr *hdr = (struct andr_img_hdr *)kernel_address;
+	struct andr_img_hdr *hdr = (struct andr_img_hdr *)andr_hdr;
 	ulong ksize, kaddr;
 
 	if (comp != IH_COMP_NONE) {
+		/* Release compressed sysmem */
 		kaddr = env_get_hex("kernel_addr_c", 0);
 		if (!kaddr)
 			kaddr = env_get_hex("kernel_addr_r", 0);
@@ -358,10 +360,13 @@ static int sysmem_alloc_uncomp_kernel(ulong kernel_address, u32 comp)
 		else
 			ksize = hdr->kernel_size;
 
+		kaddr = uncomp_kaddr;
 		ksize = ALIGN(ksize, 512);
 		if (!sysmem_alloc_base(MEMBLK_ID_UNCOMP_KERNEL,
 				       (phys_addr_t)kaddr, ksize))
 			return -ENOMEM;
+
+		hotkey_run(HK_SYSMEM);
 	}
 
 	return 0;
@@ -412,7 +417,9 @@ int android_bootloader_boot_kernel(unsigned long kernel_address)
 	 * Actually, here only gives a sysmem warning message when failed
 	 * but never return -1.
 	 */
-	if (sysmem_alloc_uncomp_kernel(kernel_address, comp_type))
+	if (sysmem_alloc_uncomp_kernel(kernel_address,
+				       simple_strtoul(kernel_addr_r, NULL, 16),
+				       comp_type))
 		return -1;
 
 	do_bootm(NULL, 0, 4, bootm_args);

commit 76f45eb9e982fe2578e0436ba31a5edf367b4992
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue May 14 21:14:01 2019 +0800

    common: rkimg: fix uncompress kernel region check
    
    Change-Id: I5e9f51f17dc49dbe4cd36afe6502fdda68a59fe6
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index d64aeefc0f..2f196ad668 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -467,7 +467,7 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 {
 	ulong fdt_addr_r = env_get_ulong("fdt_addr_r", 16, 0);
 	ulong ramdisk_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0);
-	ulong kernel_addr_r = env_get_ulong("kernel_addr_r", 16, 0x480000);
+	ulong kernel_addr_r = env_get_ulong("kernel_addr_r", 16, 0);
 	disk_partition_t kernel_part;
 	int ramdisk_size;
 	int kernel_size;
@@ -532,10 +532,17 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 		kernel_addr_r, ramdisk_addr_r, ramdisk_size, fdt_addr_r);
 	run_command(cmdbuf, 0);
 #else
+	/* We asume it's always zImage on 32-bit platform */
+	ulong kernel_addr_c = env_get_ulong("kernel_addr_c", 16, 0);
 	ulong kaddr, ksize;
 
-	kaddr = kernel_addr_r;
-	if (!sysmem_free((phys_addr_t)kaddr)) {
+	if (kernel_addr_r && !kernel_addr_c) {
+		kernel_addr_c = kernel_addr_r;
+		kernel_addr_r = CONFIG_SYS_SDRAM_BASE;
+	}
+
+	if (!sysmem_free((phys_addr_t)kernel_addr_c)) {
+		kaddr = kernel_addr_r;
 		ksize = kernel_size * 100 / 45 ; /* Ratio: 45% */
 		ksize = ALIGN(ksize, dev_desc->blksz);
 		if (!sysmem_alloc_base(MEMBLK_ID_UNCOMP_KERNEL,

commit 661cbb0b92d6fdbdb94ef8b408cd1617b5703b63
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue May 14 19:33:47 2019 +0800

    lib: sysmem: goto out when alloc failed
    
    Change-Id: I8f6fd82f7367c49596475a88bafd19137e2f2f7c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/lib/sysmem.c b/lib/sysmem.c
index 9b11e9f4b2..0f382c95f4 100644
--- a/lib/sysmem.c
+++ b/lib/sysmem.c
@@ -362,6 +362,7 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 	} else {
 		SYSMEM_E("Failed to alloc \"%s\" at 0x%08lx - 0x%08lx\n",
 			 name, (ulong)base, (ulong)(base + size));
+		goto out;
 	}
 
 	SYSMEM_D("Exit alloc: \"%s\", paddr=0x%08lx, size=0x%08lx, align=0x%x, anywhere=%d\n",

commit 44f308bd53af198fe464edb3277728ea0cb6e733
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue May 14 21:51:26 2019 +0800

    rockchip: param: add CONFIG_RKFLASH for bootdev "rknand 0"
    
    Change-Id: Ifbb541d2b6ed883deaceff7838663763ab841dd1
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/param.c b/arch/arm/mach-rockchip/param.c
index 409354f613..c488a92fa4 100644
--- a/arch/arm/mach-rockchip/param.c
+++ b/arch/arm/mach-rockchip/param.c
@@ -188,7 +188,7 @@ int param_parse_bootdev(char **devtype, char **devnum)
 			}
 			break;
 #endif
-#ifdef CONFIG_RKNAND
+#if defined(CONFIG_RKNAND) || defined(CONFIG_RKNANDC_NAND)
 		case BOOT_TYPE_NAND:
 			*devtype = "rknand";
 			*devnum = "0";

commit fe2fac9531c96d1f84365390368837f9800a5963
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Apr 10 18:36:22 2019 +0800

    rockchip: iomem: compare node name when compatible is not match
    
    Change-Id: I37916390efb2be5d88e45e09bec51a09fa77c056
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/iomem.c b/arch/arm/mach-rockchip/iomem.c
index 75b8bb3b75..e3cebb5b07 100644
--- a/arch/arm/mach-rockchip/iomem.c
+++ b/arch/arm/mach-rockchip/iomem.c
@@ -10,6 +10,11 @@
 #include <dm.h>
 #include <fdtdec.h>
 
+enum ops {
+	SEARCH_NAME,
+	SEARCH_COMP,
+};
+
 void iomem_show(const char *label, unsigned long base, size_t start, size_t end)
 {
 	unsigned long val, offset = start, nr = 0;
@@ -30,57 +35,73 @@ void iomem_show(const char *label, unsigned long base, size_t start, size_t end)
 	printf("\n");
 }
 
-void iomem_show_by_compatible(const char *compat, size_t start, size_t end)
+static int iomem_show_by_match(enum ops op, const char *search,
+			       size_t start, size_t end)
 {
 	const void *fdt = gd->fdt_blob;
-	const char *compatible;
+	const char *name;
 	fdt_addr_t addr;
+	int found = 0;
 	int offset;
 
-	if (!compat)
-		return;
-
 	for (offset = fdt_next_node(fdt, 0, NULL);
 	     offset >= 0;
 	     offset = fdt_next_node(fdt, offset, NULL)) {
-		compatible = fdt_getprop(fdt, offset, "compatible", NULL);
-		if (!compatible)
+		if (op == SEARCH_COMP)
+			name = fdt_getprop(fdt, offset, "compatible", NULL);
+		else if (op == SEARCH_NAME)
+			name = fdt_get_name(fdt, offset, NULL);
+		else
+			goto out;
+
+		if (!name)
 			continue;
 
-		if (strstr(compatible, compat)) {
+		if (strstr(name, search)) {
 			addr = fdtdec_get_addr_size_auto_noparent(fdt, offset,
 							"reg", 0, NULL, false);
-			compatible = fdt_getprop(fdt, offset, "compatible",
-						 NULL);
-			iomem_show(compatible, addr, start, end);
+			if (addr == FDT_ADDR_T_NONE)
+				goto out;
+
+			iomem_show(name, addr, start, end);
+			found = 1;
 			break;
 		}
 	}
-
 	printf("\n");
+
+out:
+	return found;
+}
+
+void iomem_show_by_compatible(const char *compat, size_t start, size_t end)
+{
+	iomem_show_by_match(SEARCH_COMP, compat, start, end);
 }
 
-static int do_iomem_by_compatible(cmd_tbl_t *cmdtp, int flag, int argc,
-				  char *const argv[])
+static int do_iomem_by_match(cmd_tbl_t *cmdtp, int flag,
+			     int argc, char *const argv[])
 {
 	size_t start, end;
-	const char *compat;
+	const char *search;
 
 	if (argc != 4)
 		return CMD_RET_USAGE;
 
-	compat = argv[1];
+	search = argv[1];
 	start = simple_strtoul(argv[2], NULL, 0);
 	end = simple_strtoul(argv[3], NULL, 0);
 
-	iomem_show_by_compatible(compat, start, end);
+	if (!iomem_show_by_match(SEARCH_COMP, search, start, end))
+		iomem_show_by_match(SEARCH_NAME, search, start, end);
 
 	return 0;
 }
 
 U_BOOT_CMD(
-	iomem,		4,	1,	do_iomem_by_compatible,
-	"Show iomem data by device compatible",
-	"iomem <compatible> <start offset>  <end offset>\n"
-	"  eg: iomem -grf 0x0 0x200"
+	iomem, 4, 1, do_iomem_by_match,
+	"Show iomem data by device compatible(high priority) or node name",
+	"iomem <compatible or node name> <start offset>  <end offset>\n"
+	"  eg: iomem -grf  0x0 0x200"
+	"  eg: iomem gpio3 0x0 0x200"
 );

commit 510e4046a63fe6607bf328aeeb06ec2e36b56b0d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Apr 13 22:30:25 2019 +0800

    Makefile: u-boot.itb: use dt-spl.dtb if using kernel dtb
    
    Change-Id: Ia8244dfefbdddb638779f56207e400b44590bb35
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/Makefile b/Makefile
index e121dbd4d9..62ce8879e1 100644
--- a/Makefile
+++ b/Makefile
@@ -1036,8 +1036,12 @@ u-boot-dtb.img u-boot.img u-boot.kwb u-boot.pbl u-boot-ivt.img: \
 		$(if $(CONFIG_SPL_LOAD_FIT),u-boot-nodtb.bin dts/dt.dtb,u-boot.bin) FORCE
 	$(call if_changed,mkimage)
 
+ifeq ($(CONFIG_USING_KERNEL_DTB),y)
+u-boot.itb: u-boot-nodtb.bin dts/dt-spl.dtb $(U_BOOT_ITS) FORCE
+else
 u-boot.itb: u-boot-nodtb.bin dts/dt.dtb $(U_BOOT_ITS) FORCE
 	$(call if_changed,mkfitimage)
+endif
 
 u-boot-spl.kwb: u-boot.img spl/u-boot-spl.bin FORCE
 	$(call if_changed,mkimage)

commit 60ea26bd956b8bba0bf9cd3ed7914893bf223724
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 18 11:44:31 2019 +0800

    rockchip: board: replace register reading with soc_is_rk3288w()
    
    Change-Id: I4b5d7633093b0c544761f0e3724e4f7c0e6e928f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 006c72e1f6..378598a344 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -18,6 +18,7 @@
 #include <misc.h>
 #include <asm/gpio.h>
 #include <asm/arch/clock.h>
+#include <asm/arch/cpu.h>
 #include <asm/arch/periph.h>
 #include <asm/arch/boot_mode.h>
 #include <asm/arch/hotkey.h>
@@ -349,7 +350,7 @@ int board_fdt_fixup(void *blob)
 	 * - RK1808: MMC strength 2mA;
 	 */
 #ifdef CONFIG_ROCKCHIP_RK3288
-	if (readl(0xff980004) == 0x1A) {
+	if (soc_is_rk3288w()) {
 		ret = fdt_setprop_string(blob, 0,
 					 "compatible", "rockchip,rk3288w");
 		if (ret)

commit 9dfc5f87440fc20cbdde5a1756ba20bfc80ffbcf
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 30 14:58:33 2019 +0800

    rockchip: board: call console_record_print_purge()
    
    Change-Id: I0ac68dfa66c641f180e33313706b279d0a10427e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 571dcee5b3..006c72e1f6 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -428,6 +428,11 @@ void board_quiesce_devices(void)
 	/* Destroy atags makes next warm boot safer */
 	atags_destroy();
 #endif
+
+#if defined(CONFIG_CONSOLE_RECORD)
+	/* Print record console data */
+	console_record_print_purge();
+#endif
 }
 
 void enable_caches(void)

commit 8626b6473200e7f2266a43f5e9f90d7645afe8ac
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 30 14:31:27 2019 +0800

    common: board_r: add console_record_reset_enable() call
    
    It's fine to call it by initr_console_record() since initr
    malloc was setup.
    
    Change-Id: I2de9f0bf76499e5c04d4ce57aa48800d6a6151db
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/board_r.c b/common/board_r.c
index e49e30c8c2..e07a39fe8d 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -256,7 +256,12 @@ static int initr_malloc(void)
 static int initr_console_record(void)
 {
 #if defined(CONFIG_CONSOLE_RECORD)
-	return console_record_init();
+	int ret;
+
+	ret = console_record_init();
+	if (!ret)
+		console_record_reset_enable();
+	return ret;
 #else
 	return 0;
 #endif

commit 4f92923eccf61f16abd3d3bd8c3bbc9ddb769c8d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 30 14:43:03 2019 +0800

    common: console: fix typo
    
    Change-Id: I20dc7e8c808a6c060629dea67801172280bc9551
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/console.c b/common/console.c
index 169c47c039..1446b6268f 100644
--- a/common/console.c
+++ b/common/console.c
@@ -774,7 +774,7 @@ static void console_update_silent(void)
 {
 #ifdef CONFIG_SILENT_CONSOLE
 	if (env_get("silent") != NULL) {
-		printf("U-Boot: enable slient console\n");
+		printf("U-Boot: enable silent console\n");
 		gd->flags |= GD_FLG_SILENT;
 	} else {
 		gd->flags &= ~GD_FLG_SILENT;

commit 5bb5aa82d31d1125edce22ec0a80ce0240c9a111
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 30 14:12:25 2019 +0800

    common: console: optimize console record
    
    - fix: passing argument 1 of ‘membuff_new’ discards ‘volatile’ qualifier from pointer target type;
    - add console_record_print_purge();
    - set default CONSOLE_RECORD_OUT_SIZE value for rockchip;
    
    Change-Id: Id247d590b677cd2cff95bc5e66963b0ff07b0658
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/Kconfig b/common/Kconfig
index f7a7dd952f..d6efe6590a 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -233,7 +233,8 @@ config CONSOLE_RECORD
 config CONSOLE_RECORD_OUT_SIZE
 	hex "Output buffer size"
 	depends on CONSOLE_RECORD
-	default 0x400 if CONSOLE_RECORD
+	default 0x400 if CONSOLE_RECORD && !ARCH_ROCKCHIP
+	default 0x2000 if CONSOLE_RECORD && ARCH_ROCKCHIP
 	help
 	  Set the size of the console output buffer. When this fills up, no
 	  more data will be recorded until some is removed. The buffer is
diff --git a/common/console.c b/common/console.c
index a6fd9c4322..169c47c039 100644
--- a/common/console.c
+++ b/common/console.c
@@ -420,7 +420,7 @@ int getc(void)
 	if (gd->console_in.start) {
 		int ch;
 
-		ch = membuff_getbyte(&gd->console_in);
+		ch = membuff_getbyte((struct membuff *)&gd->console_in);
 		if (ch != -1)
 			return 1;
 	}
@@ -445,7 +445,7 @@ int tstc(void)
 		return 0;
 #ifdef CONFIG_CONSOLE_RECORD
 	if (gd->console_in.start) {
-		if (membuff_peekbyte(&gd->console_in) != -1)
+		if (membuff_peekbyte((struct membuff *)&gd->console_in) != -1)
 			return 1;
 	}
 #endif
@@ -529,7 +529,7 @@ void putc(const char c)
 #endif
 #ifdef CONFIG_CONSOLE_RECORD
 	if (gd && (gd->flags & GD_FLG_RECORD) && gd->console_out.start)
-		membuff_putbyte(&gd->console_out, c);
+		membuff_putbyte((struct membuff *)&gd->console_out, c);
 #endif
 #ifdef CONFIG_SILENT_CONSOLE
 	if (gd->flags & GD_FLG_SILENT)
@@ -605,18 +605,20 @@ int console_record_init(void)
 {
 	int ret;
 
-	ret = membuff_new(&gd->console_out, CONFIG_CONSOLE_RECORD_OUT_SIZE);
+	ret = membuff_new((struct membuff *)&gd->console_out,
+			  CONFIG_CONSOLE_RECORD_OUT_SIZE);
 	if (ret)
 		return ret;
-	ret = membuff_new(&gd->console_in, CONFIG_CONSOLE_RECORD_IN_SIZE);
+	ret = membuff_new((struct membuff *)&gd->console_in,
+			  CONFIG_CONSOLE_RECORD_IN_SIZE);
 
 	return ret;
 }
 
 void console_record_reset(void)
 {
-	membuff_purge(&gd->console_out);
-	membuff_purge(&gd->console_in);
+	membuff_purge((struct membuff *)&gd->console_out);
+	membuff_purge((struct membuff *)&gd->console_in);
 }
 
 void console_record_reset_enable(void)
@@ -624,6 +626,28 @@ void console_record_reset_enable(void)
 	console_record_reset();
 	gd->flags |= GD_FLG_RECORD;
 }
+
+/* Print and remove data from buffer */
+void console_record_print_purge(void)
+{
+	unsigned long flags;
+	char c;
+
+	if (!gd || !(gd->flags & GD_FLG_RECORD))
+		return;
+
+	/* Remove some bits to avoid running unexpected branch in putc() */
+	flags = gd->flags;
+	gd->flags &= ~(GD_FLG_RECORD | GD_FLG_SILENT | GD_FLG_DISABLE_CONSOLE);
+
+	printf("\n\n## Console Record: \n");
+	while (!membuff_isempty((struct membuff *)&gd->console_out)) {
+		c = membuff_getbyte((struct membuff *)&gd->console_out);
+		putc(c);
+	}
+
+	gd->flags = flags;
+}
 #endif
 
 /* test if ctrl-c was pressed */
diff --git a/include/console.h b/include/console.h
index cea29ed6dc..61cba6bcfd 100644
--- a/include/console.h
+++ b/include/console.h
@@ -42,6 +42,11 @@ void console_record_reset(void);
  */
 void console_record_reset_enable(void);
 
+/**
+ * console_record_print_purge() - print record data and remove data from buffers
+ */
+void console_record_print_purge(void);
+
 /**
  * console_announce_r() - print a U-Boot console on non-serial consoles
  *

commit a69fab4a3455e3938ac488f6c9a913ed14cfb7e9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun May 5 13:12:31 2019 +0800

    console: remove unused definitions
    
    Change-Id: I281d773196401b57d3db99644d06277255e36c07
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/console.h b/include/console.h
index 3af98a622a..cea29ed6dc 100644
--- a/include/console.h
+++ b/include/console.h
@@ -10,11 +10,6 @@
 
 extern char console_buffer[];
 
-#define CONSOLE_EVT_CTRL_B	0x02
-#define CONSOLE_EVT_CTRL_D	0x04
-#define CONSOLE_EVT_CTRL_F	0x06
-#define CONSOLE_EVT_CTRL_M	0x0D
-
 /* common/console.c */
 int console_init_f(void);	/* Before relocation; uses the serial  stuff */
 int console_init_r(void);	/* After  relocation; uses the console stuff */

commit 90b99ac763ba14bd5d947eaa3c02c65549273da2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun May 5 13:11:42 2019 +0800

    common: rkimg: add sysmem alloc for uncompress kernel
    
    It helps check whether uncompress kernel overlap with other region
    or not.
    
    Change-Id: I16299d4865fb79c3d0e83ccd2a2f4cdff9df66f9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 49bc241f69..d64aeefc0f 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -9,6 +9,7 @@
 #include <linux/list.h>
 #include <linux/libfdt.h>
 #include <malloc.h>
+#include <asm/arch/hotkey.h>
 #include <asm/arch/resource_img.h>
 #include <asm/arch/rockchip_crc.h>
 #include <boot_rkimg.h>
@@ -523,11 +524,7 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 	printf("ramdisk  @ 0x%08lx (0x%08x)\n", ramdisk_addr_r, ramdisk_size);
 
 	fdt_ramdisk_skip_relocation();
-
-	if (gd->console_evt == CONSOLE_EVT_CTRL_M) {
-		bidram_dump();
-		sysmem_dump();
-	}
+	hotkey_run(HK_SYSMEM);
 
 #if defined(CONFIG_ARM64)
 	char cmdbuf[64];
@@ -535,6 +532,19 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 		kernel_addr_r, ramdisk_addr_r, ramdisk_size, fdt_addr_r);
 	run_command(cmdbuf, 0);
 #else
+	ulong kaddr, ksize;
+
+	kaddr = kernel_addr_r;
+	if (!sysmem_free((phys_addr_t)kaddr)) {
+		ksize = kernel_size * 100 / 45 ; /* Ratio: 45% */
+		ksize = ALIGN(ksize, dev_desc->blksz);
+		if (!sysmem_alloc_base(MEMBLK_ID_UNCOMP_KERNEL,
+				       (phys_addr_t)kaddr, ksize))
+			return -ENOMEM;
+	}
+
+	hotkey_run(HK_SYSMEM);
+
 	boot_lmb_init(&images);
 	images.ep = kernel_addr_r;
 	images.initrd_start = ramdisk_addr_r;

commit 0986a7dda1c55af4d329d51f1b4e7c0964db5abc
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 30 09:24:28 2019 +0800

    common: android: add sysmem alloc for uncompress kernel
    
    It helps check whether uncompress kernel overlap with other region
    or not.
    
    Change-Id: Ia7e6c027f68c2e8af398824afd8b7580531cb77e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/memblk.c b/arch/arm/mach-rockchip/memblk.c
index a9cd04b0a7..cec5be6fdb 100644
--- a/arch/arm/mach-rockchip/memblk.c
+++ b/arch/arm/mach-rockchip/memblk.c
@@ -57,6 +57,10 @@ const static struct memblk_attr plat_mem_attr[MEMBLK_ID_MAX] = {
 		.name = "KERNEL",
 		.flags = M_ATTR_OFC,
 	},
+	[MEMBLK_ID_UNCOMP_KERNEL] = {
+		.name = "UNCOMPRESS-KERNEL",
+		.flags = M_ATTR_PEEK,
+	},
 	[MEMBLK_ID_ANDROID]  =	{
 		.name = "ANDROID",
 		.flags = M_ATTR_OFC,
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index e6da05a098..c81b4e04b7 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -10,6 +10,7 @@
 #include <android_avb/avb_ops_user.h>
 #include <android_avb/rk_avb_ops_user.h>
 #include <android_image.h>
+#include <asm/arch/hotkey.h>
 #include <cli.h>
 #include <common.h>
 #include <dt_table.h>
@@ -306,6 +307,66 @@ static int android_bootloader_get_fdt(const char *part_name,
 }
 #endif
 
+/*
+ *   Test on RK3308 AARCH64 mode (Cortex A35 816 MHZ) boot with eMMC:
+ *
+ *   |-------------------------------------------------------------------|
+ *   | Format    |  Size(Byte) | Ratio | Decomp time(ms) | Boot time(ms) |
+ *   |-------------------------------------------------------------------|
+ *   | Image     | 7720968     |       |                 |     488       |
+ *   |-------------------------------------------------------------------|
+ *   | Image.lz4 | 4119448     | 53%   |       59        |     455       |
+ *   |-------------------------------------------------------------------|
+ *   | Image.lzo | 3858322     | 49%   |       141       |     536       |
+ *   |-------------------------------------------------------------------|
+ *   | Image.gz  | 3529108     | 45%   |       222       |     609       |
+ *   |-------------------------------------------------------------------|
+ *   | Image.bz2 | 3295914     | 42%   |       2940      |               |
+ *   |-------------------------------------------------------------------|
+ *   | Image.lzma| 2683750     | 34%   |                 |               |
+ *   |-------------------------------------------------------------------|
+ */
+static int sysmem_alloc_uncomp_kernel(ulong kernel_address, u32 comp)
+{
+	struct andr_img_hdr *hdr = (struct andr_img_hdr *)kernel_address;
+	ulong ksize, kaddr;
+
+	if (comp != IH_COMP_NONE) {
+		kaddr = env_get_hex("kernel_addr_c", 0);
+		if (!kaddr)
+			kaddr = env_get_hex("kernel_addr_r", 0);
+		kaddr -= hdr->page_size;
+		if (sysmem_free((phys_addr_t)kaddr))
+			return -EINVAL;
+
+		/*
+		 * Use smaller Ratio to get larger estimated uncompress
+		 * kernel size.
+		 */
+		if (comp == IH_COMP_ZIMAGE)
+			ksize = hdr->kernel_size * 100 / 45;
+		else if (comp == IH_COMP_LZ4)
+			ksize = hdr->kernel_size * 100 / 50;
+		else if (comp == IH_COMP_LZO)
+			ksize = hdr->kernel_size * 100 / 45;
+		else if (comp == IH_COMP_GZIP)
+			ksize = hdr->kernel_size * 100 / 40;
+		else if (comp == IH_COMP_BZIP2)
+			ksize = hdr->kernel_size * 100 / 40;
+		else if (comp == IH_COMP_LZMA)
+			ksize = hdr->kernel_size * 100 / 30;
+		else
+			ksize = hdr->kernel_size;
+
+		ksize = ALIGN(ksize, 512);
+		if (!sysmem_alloc_base(MEMBLK_ID_UNCOMP_KERNEL,
+				       (phys_addr_t)kaddr, ksize))
+			return -ENOMEM;
+	}
+
+	return 0;
+}
+
 int android_bootloader_boot_kernel(unsigned long kernel_address)
 {
 	char *kernel_addr_r = env_get("kernel_addr_r");
@@ -344,10 +405,15 @@ int android_bootloader_boot_kernel(unsigned long kernel_address)
 	       comp_type != IH_COMP_NONE ? kernel_addr_c : kernel_addr_r,
 	       comp_str, fdt_addr);
 
-	if (gd->console_evt == CONSOLE_EVT_CTRL_M) {
-		bidram_dump();
-		sysmem_dump();
-	}
+	hotkey_run(HK_SYSMEM);
+
+	/*
+	 * Check whether there is enough space for uncompress kernel,
+	 * Actually, here only gives a sysmem warning message when failed
+	 * but never return -1.
+	 */
+	if (sysmem_alloc_uncomp_kernel(kernel_address, comp_type))
+		return -1;
 
 	do_bootm(NULL, 0, 4, bootm_args);
 
diff --git a/include/memblk.h b/include/memblk.h
index 7226c81e44..90429caad2 100644
--- a/include/memblk.h
+++ b/include/memblk.h
@@ -25,6 +25,7 @@ enum memblk_id {
 	MEMBLK_ID_FDT_DTBO,
 	MEMBLK_ID_FDT_AOSP,
 	MEMBLK_ID_KERNEL,
+	MEMBLK_ID_UNCOMP_KERNEL,
 	MEMBLK_ID_ANDROID,
 	MEMBLK_ID_AVB_ANDROID,
 

commit c664909e96abcd0725d5032078d39a3c2a468bb0
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 30 09:23:01 2019 +0800

    rockchip: board: add and use conosle hotkey interface
    
    Change-Id: I9c7b3ce75b9b7652cdd60d0d94d55d34f0a7011e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/hotkey.h b/arch/arm/include/asm/arch-rockchip/hotkey.h
new file mode 100644
index 0000000000..3559e71904
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/hotkey.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _ROCKCHIP_HOTKEY_H_
+#define _ROCKCHIP_HOTKEY_H_
+
+enum hotkey_t {
+	HK_INVAL,
+	HK_BROM_DNL,
+	HK_FASTBOOT,
+	HK_ROCKUSB_DNL,
+	HK_SYSMEM,
+};
+
+bool is_hotkey(enum hotkey_t id);
+void hotkey_run(enum hotkey_t id);
+#endif
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 00132884a3..946f32f1a1 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -25,6 +25,7 @@ obj-y += board.o
 obj-y += chip_info.o
 obj-y += iomem.o
 obj-y += memblk.o
+obj-y += hotkey.o
 
 obj-$(CONFIG_ROCKCHIP_CRC) += rockchip_crc.o
 obj-$(CONFIG_ROCKCHIP_SMCCC) += rockchip_smccc.o
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 0b7579c162..571dcee5b3 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -20,6 +20,7 @@
 #include <asm/arch/clock.h>
 #include <asm/arch/periph.h>
 #include <asm/arch/boot_mode.h>
+#include <asm/arch/hotkey.h>
 #include <asm/arch/rk_atags.h>
 #include <asm/arch/param.h>
 #ifdef CONFIG_DM_CHARGE_DISPLAY
@@ -231,7 +232,7 @@ static void early_bootrom_download(void)
 	gd->console_evt = getc();
 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0)
 	/* ctrl+b */
-	if (gd->console_evt == CONSOLE_EVT_CTRL_B) {
+	if (is_hotkey(HK_BROM_DNL)) {
 		printf("Enter bootrom download...");
 		flushc();
 		writel(BOOT_BROM_DOWNLOAD, CONFIG_ROCKCHIP_BOOT_MODE_REG);
diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index f271c5b945..5e8e66ffa8 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -8,6 +8,7 @@
 #include <adc.h>
 #include <asm/io.h>
 #include <asm/arch/boot_mode.h>
+#include <asm/arch/hotkey.h>
 #include <asm/arch/param.h>
 #include <cli.h>
 #include <dm.h>
@@ -131,7 +132,7 @@ void rockchip_dnl_mode_check(void)
 {
 	/* recovery key or "ctrl+d" */
 	if (rockchip_dnl_key_pressed() ||
-	    gd->console_evt == CONSOLE_EVT_CTRL_D) {
+	    is_hotkey(HK_ROCKUSB_DNL)) {
 		printf("download key pressed... ");
 		if (rockchip_u2phy_vbus_detect() > 0) {
 			printf("entering download mode...\n");
@@ -164,7 +165,7 @@ void rockchip_dnl_mode_check(void)
 			printf("recovery key pressed, entering recovery mode!\n");
 			env_set("reboot_mode", "recovery");
 		}
-	} else if (gd->console_evt == CONSOLE_EVT_CTRL_F) {
+	} else if (is_hotkey(HK_FASTBOOT)) {
 		env_set("reboot_mode", "fastboot");
 	}
 }
diff --git a/arch/arm/mach-rockchip/hotkey.c b/arch/arm/mach-rockchip/hotkey.c
new file mode 100644
index 0000000000..cc5f3845dd
--- /dev/null
+++ b/arch/arm/mach-rockchip/hotkey.c
@@ -0,0 +1,49 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <bidram.h>
+#include <console.h>
+#include <sysmem.h>
+#include <asm/arch/hotkey.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define CTRL_B		0x02
+#define CTRL_D		0x04
+#define CTRL_F		0x06
+#define CTRL_M		0x0d
+
+bool is_hotkey(enum hotkey_t id)
+{
+	switch (id) {
+	case HK_BROM_DNL:
+		return gd->console_evt == CTRL_B;
+	case HK_FASTBOOT:
+		return gd->console_evt == CTRL_F;
+	case HK_ROCKUSB_DNL:
+		return gd->console_evt == CTRL_D;
+	case HK_SYSMEM:
+		return gd->console_evt == CTRL_M;
+	default:
+		break;
+	}
+
+	return false;
+}
+
+void hotkey_run(enum hotkey_t id)
+{
+	switch ((id)) {
+	case HK_SYSMEM:
+		if (gd->console_evt == CTRL_M) {
+			bidram_dump();
+			sysmem_dump();
+		}
+		break;
+	default:
+		break;
+	}
+}

commit 92298dbc5da47a3c238502be8f85029603391383
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu May 9 15:33:03 2019 +0800

    rockchip: common: increase CONFIG_NR_DRAM_BANKS
    
    Since we have import sysmem/bidram memory management, we can
    support any count of discontinuous memory block, let's increase it.
    
    Change-Id: I12e5d7e766c8060e1a50f6eee9eaa23bde8021ea
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index 189e23e03c..e8bd45396b 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -20,7 +20,7 @@
 
 #define CONFIG_SYS_NS16550_MEM32
 
-#define CONFIG_NR_DRAM_BANKS		4
+#define CONFIG_NR_DRAM_BANKS		12
 
 #ifndef CONFIG_SPL_BUILD
 #include <config_distro_defaults.h>

commit 63363c40ff9e9aa3e6b27d10c6ad9ea9b4b45217
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Wed Apr 24 14:06:51 2019 +0800

    spl: fit: all rockchip based soc use dram as sram bounce buffer for
    block device
    
    The Storage controller(MMC/NANDC/SFC) on Rockchip based soc can't
    access the sram directly, we need use dram memory as a bounce buffer.
    
    Change-Id: Ibe2a10d7b73cb19b093ee372602ade097b689b82
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index d65cbb1ae6..7203d30d78 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -197,7 +197,7 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 			return -ENOENT;
 
 		load_ptr = (load_addr + align_len) & ~align_len;
-#if  defined(CONFIG_ROCKCHIP_RK3399) || defined(CONFIG_ROCKCHIP_RK3368)
+#if  defined(CONFIG_ARCH_ROCKCHIP)
 		if ((load_ptr & 0xffff0000) == CONFIG_ROCKCHIP_IRAM_START_ADDR)
 			load_ptr = (ulong)memalign(ARCH_DMA_MINALIGN, len);
 #endif

commit 912343c03a9c1b09aa38be5a597bcc97f5078fe6
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Fri Apr 19 17:09:06 2019 +0800

    rockchip: mkimage: add support for RK3308
    
    Usage:
    
     (1) tools/mkimage -n rk3308 -T rksd -d tpl/u-boot-tpl.bin idbloader.img
     (2) cat spl/u-boot-spl.bin >> idbloader.img
     (3) upgrade_tool wl 0x40 idbloader.img
    
    Note:
      When use a ddr binary from rkbin as tpl, use it replace u-boot-tpl.bin in (1)
    
    Change-Id: Ia6694754ed70d2d5cce04f62dcfac538291f7386
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index 8f184c1301..08d8a22903 100644
--- a/tools/rkcommon.c
+++ b/tools/rkcommon.c
@@ -74,6 +74,7 @@ static struct spl_info spl_infos[] = {
 	{ "rk3188", "RK31", 0x8000 - 0x800, true },
 	{ "rk322x", "RK32", 0x8000 - 0x1000, false },
 	{ "rk3288", "RK32", 0x8000, false },
+	{ "rk3308", "RK33", 0x40000 - 0x1000, false},
 	{ "rk3328", "RK32", 0x8000 - 0x1000, false },
 	{ "rk3368", "RK33", 0x8000 - 0x1000, false },
 	{ "rk3399", "RK33", 0x30000 - 0x2000, false },

commit 41386edd8d26f2d7489cdb3212a1fdb30bd59699
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Apr 12 10:17:39 2019 +0800

    fastboot: add oem command to init ab metadata
    
    The command is: fastboot oem init-ab-metadata
    
    Change-Id: I879929a8a6e1c133725267c94492b2f2495ba5b4
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 896bcac61c..d44a1c022c 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -2126,6 +2126,16 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 		fastboot_tx_write_str("OKAY");
 #else
 		fastboot_tx_write_str("FAILnot implemented");
+#endif
+	} else if (strncmp("init-ab-metadata", cmd + 4, 16) == 0) {
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
+		if (rk_avb_init_ab_metadata()) {
+			fastboot_tx_write_str("FAILinit ab data fail!");
+			return;
+		}
+		fastboot_tx_write_str("OKAY");
+#else
+		fastboot_tx_write_str("FAILnot implemented");
 #endif
 	} else {
 		fastboot_tx_write_str("FAILunknown oem command");

commit 363411a1e6747822ad3ec1499a22b36ad70df9c7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun May 5 12:51:45 2019 +0800

    rockchip: board: use flushc() to flush console data
    
    Change-Id: I422a8ab8423bbab1922059d1e80d757506a1ca73
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 56ceae23e2..0b7579c162 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -233,7 +233,7 @@ static void early_bootrom_download(void)
 	/* ctrl+b */
 	if (gd->console_evt == CONSOLE_EVT_CTRL_B) {
 		printf("Enter bootrom download...");
-		mdelay(100);
+		flushc();
 		writel(BOOT_BROM_DOWNLOAD, CONFIG_ROCKCHIP_BOOT_MODE_REG);
 		do_reset(NULL, 0, 0, NULL);
 		printf("failed!\n");

commit 91cbfde1a2679846bd858761e06bcb81397abc19
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun May 5 12:57:24 2019 +0800

    arm: bootm: use flushc() to flush console data before linux
    
    Remove GD_FLG_OS_RUN definition.
    
    Change-Id: Ib78d4adf58dfea5e40ec79fcb9603020651c6daa
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index 6312f130ff..c160c829ba 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -97,20 +97,11 @@ static void announce_and_cleanup(int fake)
 	udc_disconnect();
 #endif
 
-#ifdef CONFIG_ARCH_ROCKCHIP
-	/* Enable this flag, call putc to flush console(ns16550_serial_putc)*/
-	gd->flags |= GD_FLG_OS_RUN;
-	/*
-	 * This putc is only for calling ns16550_serial_putc() to flush console.
-	 * Console uclass framework is quite complicated, it's not easy to
-	 * flush console by privoding a new interface which must provide a
-	 * udevice here, so we use an easy way to achieve that.
-	 */
-	putc('\n');
-#endif
-
 	board_quiesce_devices();
 
+	/* Flush all console data */
+	flushc();
+
 	/*
 	 * Call remove function of all devices with a removal flag set.
 	 * This may be useful for last-stage operations, like cancelling
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index ea3f8e5252..a8df46d23d 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -171,8 +171,6 @@ typedef struct global_data {
 #define GD_FLG_LOG_READY	0x08000 /* Log system is ready for use	   */
 
 #ifdef CONFIG_ARCH_ROCKCHIP
-/* Currently, we use it to indicate console can be flushed before jump to OS */
-#define GD_FLG_OS_RUN		0x10000
 /* BL32 is enabled */
 #define GD_FLG_BL32_ENABLED	0x20000
 #endif

commit 7c86130655e60fe9aff55b24e83160cb11e48de8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun May 5 12:55:55 2019 +0800

    serial: ns16550: implement ops->clear callback
    
    Thus, the flushc() can work normally.
    
    Change-Id: I544ed0ffcbc5564913bf89bf1a83c6d540ae6b6a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index 6f2ee6960d..63587786f3 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -363,20 +363,6 @@ static int ns16550_serial_putc(struct udevice *dev, const char ch)
 	if (ch == '\n')
 		WATCHDOG_RESET();
 
-#ifdef CONFIG_ARCH_ROCKCHIP
-	/*
-	 * Wait fifo flush.
-	 *
-	 * UART_USR: bit2 trans_fifo_empty:
-	 *	0 = Transmit FIFO is not empty
-	 *	1 = Transmit FIFO is empty
-	 */
-	if (gd->flags & GD_FLG_OS_RUN) {
-		while (!(serial_in(&com_port->rbr + 0x1f) & 0x04))
-			;
-	}
-#endif
-
 	return 0;
 }
 
@@ -413,6 +399,24 @@ static int ns16550_serial_setbrg(struct udevice *dev, int baudrate)
 	return 0;
 }
 
+static int ns16550_serial_clear(struct udevice *dev)
+{
+#ifdef CONFIG_ARCH_ROCKCHIP
+	struct NS16550 *const com_port = dev_get_priv(dev);
+
+	/*
+	 * Wait fifo flush.
+	 *
+	 * UART_USR: bit2 trans_fifo_empty:
+	 *	0 = Transmit FIFO is not empty
+	 *	1 = Transmit FIFO is empty
+	 */
+	while (!(serial_in(&com_port->rbr + 0x1f) & 0x04))
+		;
+#endif
+	return 0;
+}
+
 int ns16550_serial_probe(struct udevice *dev)
 {
 	struct NS16550 *const com_port = dev_get_priv(dev);
@@ -521,6 +525,7 @@ const struct dm_serial_ops ns16550_serial_ops = {
 	.pending = ns16550_serial_pending,
 	.getc = ns16550_serial_getc,
 	.setbrg = ns16550_serial_setbrg,
+	.clear = ns16550_serial_clear,
 };
 
 #if CONFIG_IS_ENABLED(SERIAL_PRESENT)

commit c1e72b20c91289718b46e1d52185fbef59878daf
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun May 5 12:50:43 2019 +0800

    dm: console/serial: add flushc() support
    
    Flush console data.
    
    Change-Id: If347b6c8d1126452a1f6386040693b30c66eb5fb
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/console.c b/common/console.c
index 4990fdd69a..a6fd9c4322 100644
--- a/common/console.c
+++ b/common/console.c
@@ -256,6 +256,18 @@ static inline void console_doenv(int file, struct stdio_dev *dev)
 {
 	iomux_doenv(file, dev->name);
 }
+
+static void console_clear(int file)
+{
+	int i;
+	struct stdio_dev *dev;
+
+	for (i = 0; i < cd_count[file]; i++) {
+		dev = console_devices[file][i];
+		if (dev->clear != NULL)
+			dev->clear(dev);
+	}
+}
 #else
 static inline int console_getc(int file)
 {
@@ -283,6 +295,12 @@ static inline void console_puts(int file, const char *s)
 	stdio_devices[file]->puts(stdio_devices[file], s);
 }
 
+static inline void console_clear(int file)
+{
+	if (stdio_devices[file]->clear)
+		stdio_devices[file]->clear(stdio_devices[file]);
+}
+
 static inline void console_doenv(int file, struct stdio_dev *dev)
 {
 	console_setfile(file, dev);
@@ -361,6 +379,12 @@ void fputs(int file, const char *s)
 		console_puts(file, s);
 }
 
+void fclear(int file)
+{
+	if (file < MAX_FILES)
+		console_clear(file);
+}
+
 int fprintf(int file, const char *fmt, ...)
 {
 	va_list args;
@@ -434,6 +458,19 @@ int tstc(void)
 	return serial_tstc();
 }
 
+void flushc(void)
+{
+#ifdef CONFIG_DISABLE_CONSOLE
+	if (gd->flags & GD_FLG_DISABLE_CONSOLE)
+		return;
+#endif
+
+	if (gd->flags & GD_FLG_DEVINIT)
+		fclear(stdout);
+	else
+		serial_clear();
+}
+
 #define PRE_CONSOLE_FLUSHPOINT1_SERIAL			0
 #define PRE_CONSOLE_FLUSHPOINT2_EVERYTHING_BUT_SERIAL	1
 
diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c
index 0c7a4d7c87..c86766bb44 100644
--- a/drivers/serial/serial-uclass.c
+++ b/drivers/serial/serial-uclass.c
@@ -279,6 +279,18 @@ void serial_setbrg(void)
 		ops->setbrg(gd->cur_serial_dev, gd->baudrate);
 }
 
+void serial_clear(void)
+{
+	struct dm_serial_ops *ops;
+
+	if (!gd->cur_serial_dev)
+		return;
+
+	ops = serial_get_ops(gd->cur_serial_dev);
+	if (ops->setbrg)
+		ops->clear(gd->cur_serial_dev);
+}
+
 void serial_stdio_init(void)
 {
 }
diff --git a/include/common.h b/include/common.h
index e300aa3c25..62081face0 100644
--- a/include/common.h
+++ b/include/common.h
@@ -548,6 +548,7 @@ void smp_kick_all_cpus(void);
 int	serial_init   (void);
 void	serial_setbrg (void);
 void	serial_putc   (const char);
+void	serial_clear  (void);
 void	serial_putc_raw(const char);
 void	serial_puts   (const char *);
 int	serial_getc   (void);
diff --git a/include/stdio.h b/include/stdio.h
index aedf374452..4ba2f0e283 100644
--- a/include/stdio.h
+++ b/include/stdio.h
@@ -15,6 +15,7 @@ int tstc(void);
 		defined(CONFIG_SPL_SERIAL_SUPPORT))
 void putc(const char c);
 void puts(const char *s);
+void flushc(void);
 int __printf(1, 2) printf(const char *fmt, ...);
 int vprintf(const char *fmt, va_list args);
 #else
@@ -26,6 +27,10 @@ static inline void puts(const char *s)
 {
 }
 
+static inline void flushc(void)
+{
+}
+
 static inline int __printf(1, 2) printf(const char *fmt, ...)
 {
 	return 0;
diff --git a/include/stdio_dev.h b/include/stdio_dev.h
index 3164fa2a55..5b13ebf2be 100644
--- a/include/stdio_dev.h
+++ b/include/stdio_dev.h
@@ -36,6 +36,9 @@ struct stdio_dev {
 	/* To put a string (accelerator) */
 	void (*puts)(struct stdio_dev *dev, const char *s);
 
+/* Clear functions */
+	void (*clear)(struct stdio_dev *dev);
+
 /* INPUT functions */
 
 	/* To test if a char is ready... */

commit 3bee194f53c141c25ed866431dc198ee12fb0f86
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue May 7 18:45:08 2019 +0800

    lib: sysmem: add sysmem_can_alloc() interface
    
    Check if the region can be sysmem allocated.
    
    Change-Id: I26a524c1597bee65ab1282da5ec373b9603866ba
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/sysmem.h b/include/sysmem.h
index f32b63a03b..2a51898388 100644
--- a/include/sysmem.h
+++ b/include/sysmem.h
@@ -93,6 +93,16 @@ void *sysmem_alloc_base_by_name(const char *name,
 void *sysmem_fdt_reserve_alloc_base(const char *name,
 				    phys_addr_t base, phys_size_t size);
 
+/**
+ * sysmem_can_alloc() - Check if the region can be allocated
+ *
+ * @base: region base
+ * @size: region size
+ *
+ * @return true on okay.
+ */
+bool sysmem_can_alloc(phys_size_t base, phys_size_t size);
+
 /**
  * sysmem_free() - Free allocated sysmem region
  *
@@ -128,6 +138,11 @@ static inline void *sysmem_alloc(enum memblk_id id, phys_size_t size)
 	return malloc(size);
 }
 
+static inline bool sysmem_can_alloc(phys_size_t base, phys_size_t size)
+{
+	return true;
+}
+
 static inline void *sysmem_alloc_base(enum memblk_id id,
 				      phys_addr_t base, phys_size_t size)
 {
diff --git a/lib/sysmem.c b/lib/sysmem.c
index e65a28d60d..9b11e9f4b2 100644
--- a/lib/sysmem.c
+++ b/lib/sysmem.c
@@ -354,7 +354,7 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 				 name, (ulong)base, (ulong)(base + size),
 				 (ulong)paddr, (ulong)(paddr + size));
 			/* Free what we don't want allocated region */
-			if (lmb_free(&sysmem->lmb, paddr, alloc_size))
+			if (lmb_free(&sysmem->lmb, paddr, alloc_size) < 0)
 				SYSMEM_E("Failed to free \"%s\"\n", name);
 
 			goto out;
@@ -435,6 +435,38 @@ void *sysmem_fdt_reserve_alloc_base(const char *name,
 	return paddr;
 }
 
+bool sysmem_can_alloc(phys_size_t base, phys_size_t size)
+{
+	struct sysmem *sysmem = &plat_sysmem;
+	phys_addr_t alloc_base;
+	phys_addr_t paddr;
+	int ret;
+
+	if (!sysmem_has_init())
+		return false;
+
+	/* LMB is align down alloc mechanism */
+	alloc_base = base + size;
+	paddr = __lmb_alloc_base(&sysmem->lmb,
+				 size,
+				 SYSMEM_ALLOC_NO_ALIGN,
+				 alloc_base);
+	if (paddr) {
+		/* If free failed, return false */
+		ret = lmb_free(&sysmem->lmb, base, size);
+		if (ret < 0) {
+			SYSMEM_E("Can't free at 0x%08lx - 0x%08lx, ret=%d\n",
+				 (ulong)base, (ulong)(base + size), ret);
+			return false;
+		}
+	} else {
+		SYSMEM_D("Can't alloc at 0x%08lx - 0x%08lx\n",
+			 (ulong)base, (ulong)(base + size));
+	}
+
+	return (paddr == base) ? true : false;
+}
+
 int sysmem_free(phys_addr_t base)
 {
 	struct sysmem *sysmem = &plat_sysmem;

commit f6e15301658097e63b41855426a3fdbb258afe63
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue May 7 17:34:27 2019 +0800

    lib: sysmem: support avb android memblk sysmem alloc
    
    Because avb android image usually needs a large memory buffer,
    always alloc avb android memblk right after U-Boot stack is a
    better choice to avoid memblk overlap with others.
    
    Since we have overflow protect magic for U-Boot stack, so we add
    a pad(4KB) between them.
    
    Change-Id: I72655d022f7e82f1ed9fbb381424d04bc86ccf6a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/memblk.c b/arch/arm/mach-rockchip/memblk.c
index 7d288ab080..a9cd04b0a7 100644
--- a/arch/arm/mach-rockchip/memblk.c
+++ b/arch/arm/mach-rockchip/memblk.c
@@ -61,6 +61,10 @@ const static struct memblk_attr plat_mem_attr[MEMBLK_ID_MAX] = {
 		.name = "ANDROID",
 		.flags = M_ATTR_OFC,
 	},
+	[MEMBLK_ID_AVB_ANDROID]  =	{
+		.name = "AVB_ANDROID",
+		.flags = M_ATTR_OFC,
+	},
 };
 
 const struct memblk_attr *mem_attr = plat_mem_attr;
diff --git a/include/memblk.h b/include/memblk.h
index 3a2eb3b6b7..7226c81e44 100644
--- a/include/memblk.h
+++ b/include/memblk.h
@@ -26,6 +26,7 @@ enum memblk_id {
 	MEMBLK_ID_FDT_AOSP,
 	MEMBLK_ID_KERNEL,
 	MEMBLK_ID_ANDROID,
+	MEMBLK_ID_AVB_ANDROID,
 
 	/* Other */
 	MEMBLK_ID_BY_NAME,
diff --git a/lib/sysmem.c b/lib/sysmem.c
index be14ada671..e65a28d60d 100644
--- a/lib/sysmem.c
+++ b/lib/sysmem.c
@@ -245,6 +245,15 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 	} else if (id > MEMBLK_ID_UNK && id < MEMBLK_ID_MAX) {
 		attr = mem_attr[id];
 		name = attr.name;
+
+		/*
+		 * Fixup base and place right after U-Boot stack, adding a lot
+		 * of space(4KB) maybe safer.
+		 */
+		if ((id == MEMBLK_ID_AVB_ANDROID) &&
+		    (base == SYSMEM_ALLOC_ANYWHERE))
+			base = gd->start_addr_sp -
+					CONFIG_SYS_STACK_SIZE - size - 0x1000;
 	} else {
 		SYSMEM_E("Unsupport memblk id %d for alloc sysmem\n", id);
 		goto out;

commit dcb404a6770682d7f913c9e6579f4c39a917ff15
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue May 7 17:34:04 2019 +0800

    lib: sysmem: add sysmem_alloc() interface
    
    Change-Id: I3ae1fe618ba1bb9c7924bb9816884eb26927dc1e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/sysmem.h b/include/sysmem.h
index 0a5d807f82..f32b63a03b 100644
--- a/include/sysmem.h
+++ b/include/sysmem.h
@@ -7,6 +7,7 @@
 #define _SYSMEM_H
 
 #include <memblk.h>
+#include <malloc.h>
 
 /*
  * CONFIG_SYS_FDT_PAD default value is sync with bootm framework in:
@@ -121,6 +122,12 @@ static inline int sysmem_initr(void) { return 0; }
 static inline int sysmem_free(phys_addr_t base) { return 0; }
 static inline void sysmem_dump(void) {}
 __weak int board_sysmem_reserve(struct sysmem *sysmem) { return 0; }
+
+static inline void *sysmem_alloc(enum memblk_id id, phys_size_t size)
+{
+	return malloc(size);
+}
+
 static inline void *sysmem_alloc_base(enum memblk_id id,
 				      phys_addr_t base, phys_size_t size)
 {
diff --git a/lib/sysmem.c b/lib/sysmem.c
index 7ec9c1479f..be14ada671 100644
--- a/lib/sysmem.c
+++ b/lib/sysmem.c
@@ -364,6 +364,21 @@ out:
 	return (attr.flags & M_ATTR_PEEK) ? (void *)base : NULL;
 }
 
+void *sysmem_alloc(enum memblk_id id, phys_size_t size)
+{
+	void *paddr;
+
+	paddr = sysmem_alloc_align_base(id,
+					NULL,
+					SYSMEM_ALLOC_ANYWHERE,
+					size,
+					SYSMEM_ALLOC_NO_ALIGN);
+	if (!paddr)
+		sysmem_dump();
+
+	return paddr;
+}
+
 void *sysmem_alloc_base(enum memblk_id id, phys_addr_t base, phys_size_t size)
 {
 	void *paddr;

commit d92ffd1e4829da5a26463553e2b80f6516712e0c
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue May 7 15:59:36 2019 +0800

    common: android: do not start kernel when read kernel failed
    
    Change-Id: I032776022378078baae8e59ed8d746ccf13ed373
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/common/image-android.c b/common/image-android.c
index 048de0f7ea..67cc083916 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -297,10 +297,10 @@ static int android_image_load_separate(struct blk_desc *dev_desc,
 
 		ret = blk_dread(dev_desc, blk_start,
 				blk_cnt, android_load_address);
-		if (ret < 0) {
+		if (ret != blk_cnt) {
 			debug("%s: read kernel failed, ret=%d\n",
 			      __func__, ret);
-			return ret;
+			return -1;
 		}
 		blk_read += ret;
 	}
@@ -318,10 +318,10 @@ static int android_image_load_separate(struct blk_desc *dev_desc,
 
 		ret = blk_dread(dev_desc, blk_start,
 				blk_cnt, (void *)ramdisk_addr_r);
-		if (ret < 0) {
+		if (ret != blk_cnt) {
 			debug("%s: read ramdisk failed, ret=%d\n",
 			      __func__, ret);
-			return ret;
+			return -1;
 		}
 		blk_read += ret;
 	}
@@ -354,9 +354,9 @@ static int android_image_load_separate(struct blk_desc *dev_desc,
 			return -ENXIO;
 
 		ret = blk_dread(dev_desc, blk_start, blk_cnt, (void *)fdt_addr_r);
-		if (ret < 0) {
+		if (ret != blk_cnt) {
 			debug("%s: read dtb failed, ret=%d\n", __func__, ret);
-			return ret;
+			return -1;
 		}
 
 		blk_read += blk_cnt;

commit efda1f1db3f4fc77c65c060b5bdb91d223df5d69
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 29 20:07:59 2019 +0800

    lib: sysmem: support M_ATTR_PEEK for memblk
    
    - always return successful for M_ATTR_PEEK;
    - add code comments;
    
    Change-Id: I3c7f939ac61d8da5948978de4e70f17576748c91
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/memblk.h b/include/memblk.h
index bba5de000e..3a2eb3b6b7 100644
--- a/include/memblk.h
+++ b/include/memblk.h
@@ -59,5 +59,7 @@ extern const struct memblk_attr *mem_attr;
 #define M_ATTR_HOFC		(1 << 1)
 /* Memory can be overlap by fdt reserved memory */
 #define M_ATTR_OVERLAP		(1 << 2)
+/* Just peek, always return success */
+#define M_ATTR_PEEK		(1 << 3)
 
 #endif /* _MEMBLK_H */
diff --git a/lib/sysmem.c b/lib/sysmem.c
index 952a5e1894..7ec9c1479f 100644
--- a/lib/sysmem.c
+++ b/lib/sysmem.c
@@ -200,13 +200,22 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 	int i;
 
 	if (!sysmem_has_init())
-		return NULL;
+		goto out;
 
 	if (id == MEMBLK_ID_BY_NAME || id == MEMBLK_ID_FDT_RESV) {
 		if (!mem_name) {
 			SYSMEM_E("NULL name for alloc sysmem\n");
-			return NULL;
+			goto out;
 		} else if (id == MEMBLK_ID_FDT_RESV) {
+
+			/*
+			 * Allow fdt reserved memory to overlap with the region
+			 * only used in U-Boot, like: stack, fastboot, u-boot...
+			 * these regions are marked as M_ATTR_OVERLAP in flags.
+			 *
+			 * Here we check whether it overlaps with others, if
+			 * so, set req_overlap as true.
+			 */
 			for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
 				if (!gd->bd->bi_dram[i].size)
 					continue;
@@ -220,9 +229,15 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 				}
 			}
 
+			/*
+			 * If this request region is out size of all available
+			 * region, ignore and return success.
+			 */
 			if (!req_overlap)
 				return (void *)base;
 		}
+
+		/* Find name, id and attr by outer mem_name */
 		name = sysmem_alias2name(mem_name, (int *)&id);
 		attr = mem_attr[id];
 		if (!attr.name)
@@ -232,18 +247,18 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 		name = attr.name;
 	} else {
 		SYSMEM_E("Unsupport memblk id %d for alloc sysmem\n", id);
-		return NULL;
+		goto out;
 	}
 
 	if (!size) {
 		SYSMEM_E("\"%s\" size is 0 for alloc sysmem\n", name);
-		return NULL;
+		goto out;
 	}
 
 	if (!IS_ALIGNED(base, 4)) {
 		SYSMEM_E("\"%s\" base=0x%08lx is not 4-byte aligned\n",
 			 name, (ulong)base);
-		return NULL;
+		goto out;
 	}
 
 	/* Must be 4-byte aligned */
@@ -259,12 +274,17 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 			 mem->attr.name, (ulong)mem->base,
 			 (ulong)(mem->base + mem->size));
 		if (!strcmp(mem->attr.name, name)) {
+			/* Allow double alloc for same but smaller region */
 			if (mem->base <= base && mem->size >= size)
 				return (void *)base;
 
 			SYSMEM_E("Failed to double alloc for existence \"%s\"\n", name);
-			return NULL;
+			goto out;
 		} else if (sysmem_is_overlap(mem->base, mem->size, base, size)) {
+			/*
+			 * If this new alloc region expects overlap and the old
+			 * region is also allowed to be overlap, just do reserve.
+			 */
 			if (req_overlap && mem->attr.flags & M_ATTR_OVERLAP) {
 				if (lmb_reserve(&sysmem->lmb, base, size))
 					SYSMEM_E("Failed to overlap alloc \"%s\" "
@@ -280,7 +300,7 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 				 name, (ulong)base, (ulong)(base + size),
 				 mem->attr.name, (ulong)mem->base,
 				 (ulong)(mem->base + mem->size));
-			return NULL;
+			goto out;
 		}
 	}
 
@@ -302,7 +322,7 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 			mem = malloc(sizeof(*mem));
 			if (!mem) {
 				SYSMEM_E("No memory for \"%s\" alloc sysmem\n", name);
-				return NULL;
+				goto out;
 			}
 
 			mem->base = paddr;
@@ -311,6 +331,7 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 			sysmem->allocated_cnt++;
 			list_add_tail(&mem->node, &sysmem->allocated_head);
 
+			/* Add overflow check magic */
 			if (mem->attr.flags & M_ATTR_OFC) {
 				check = (struct memcheck *)(paddr + size);
 				check->magic = SYSMEM_MAGIC;
@@ -323,10 +344,11 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 				 "but at 0x%08lx - x%08lx\n",
 				 name, (ulong)base, (ulong)(base + size),
 				 (ulong)paddr, (ulong)(paddr + size));
+			/* Free what we don't want allocated region */
 			if (lmb_free(&sysmem->lmb, paddr, alloc_size))
 				SYSMEM_E("Failed to free \"%s\"\n", name);
 
-			return NULL;
+			goto out;
 		}
 	} else {
 		SYSMEM_E("Failed to alloc \"%s\" at 0x%08lx - 0x%08lx\n",
@@ -337,6 +359,9 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 		 name, (ulong)paddr, (ulong)size, (u32)align, !base);
 
 	return (void *)paddr;
+
+out:
+	return (attr.flags & M_ATTR_PEEK) ? (void *)base : NULL;
 }
 
 void *sysmem_alloc_base(enum memblk_id id, phys_addr_t base, phys_size_t size)

commit 50d35c453ff270454024cad52411a1fb0f6e5990
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Apr 12 15:43:14 2019 +0800

    rockchip: board: add amp cpus on
    
    implement cpu_secondary_init_r().
    
    Change-Id: I840db566f18ee7dd270eb837ce0fd9a4e2409ebe
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 16136442df..56ceae23e2 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -4,6 +4,7 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 #include <common.h>
+#include <amp.h>
 #include <clk.h>
 #include <bidram.h>
 #include <dm.h>
@@ -516,6 +517,13 @@ parse_fn_t board_bidram_parse_fn(void)
 }
 #endif
 
+#ifdef CONFIG_ROCKCHIP_AMP
+void cpu_secondary_init_r(void)
+{
+	amp_cpus_on();
+}
+#endif
+
 #if defined(CONFIG_ROCKCHIP_PRELOADER_SERIAL) && \
     defined(CONFIG_ROCKCHIP_PRELOADER_ATAGS)
 int board_init_f_init_serial(void)

commit 94aee224c6c1fd1607d860adb80d0ecd12b0cef2
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon May 6 09:45:35 2019 +0800

    rockchip: param: use module config to decide whether use atags parameters
    
    We can not call some drivers if this driver is closed. But this time we use
    the parameters passed by atags directly but not test the drivers whether
    exist. Add it.
    
    Change-Id: I857ccf3b3e23a9e92502868d1514849770390ebb
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/param.c b/arch/arm/mach-rockchip/param.c
index 0d422c92b4..409354f613 100644
--- a/arch/arm/mach-rockchip/param.c
+++ b/arch/arm/mach-rockchip/param.c
@@ -162,6 +162,7 @@ int param_parse_bootdev(char **devtype, char **devnum)
 	t = atags_get_tag(ATAG_BOOTDEV);
 	if (t) {
 		switch (t->u.bootdev.devtype) {
+#ifdef CONFIG_DM_MMC
 		case BOOT_TYPE_EMMC:
 			*devtype = "mmc";
 			*devnum = "0";
@@ -186,22 +187,31 @@ int param_parse_bootdev(char **devtype, char **devnum)
 				env_update("bootargs", "sdfwupdate");
 			}
 			break;
+#endif
+#ifdef CONFIG_RKNAND
 		case BOOT_TYPE_NAND:
 			*devtype = "rknand";
 			*devnum = "0";
 			break;
+#endif
+#ifdef CONFIG_RKSFC_NAND
 		case BOOT_TYPE_SPI_NAND:
 			*devtype = "spinand";
 			*devnum = "0";
 			break;
+#endif
+#ifdef CONFIG_RKSFC_NOR
 		case BOOT_TYPE_SPI_NOR:
 			*devtype = "spinor";
 			*devnum = "1";
 			break;
+#endif
+#ifdef CONFIG_DM_RAMDISK
 		case BOOT_TYPE_RAM:
 			*devtype = "ramdisk";
 			*devnum = "0";
 			break;
+#endif
 		default:
 			printf("Unknown bootdev type: 0x%x\n",
 			       t->u.bootdev.devtype);

commit f149c047e6d0de656595d14d723eace0bd8fe209
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Apr 18 16:32:38 2019 +0800

    clk: rockchip: rk3036: fix up the assert error
    
    Change-Id: Id987e8847dbe97e5502259a9432dac85782769f3
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3036.c b/drivers/clk/rockchip/clk_rk3036.c
index 50fc42d784..4b242b4b7b 100644
--- a/drivers/clk/rockchip/clk_rk3036.c
+++ b/drivers/clk/rockchip/clk_rk3036.c
@@ -121,10 +121,10 @@ static void rkclk_init(struct rk3036_cru *cru)
 	 * core hz : apll = 1:1
 	 */
 	aclk_div = APLL_HZ / CORE_ACLK_HZ - 1;
-	assert((aclk_div + 1) * CORE_ACLK_HZ == APLL_HZ && aclk_div < 0x7);
+	assert((aclk_div + 1) * CORE_ACLK_HZ <= APLL_HZ && aclk_div < 0x7);
 
 	pclk_div = APLL_HZ / CORE_PERI_HZ - 1;
-	assert((pclk_div + 1) * CORE_PERI_HZ == APLL_HZ && pclk_div < 0xf);
+	assert((pclk_div + 1) * CORE_PERI_HZ <= APLL_HZ && pclk_div < 0xf);
 
 	rk_clrsetreg(&cru->cru_clksel_con[0],
 		     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK,
@@ -141,13 +141,13 @@ static void rkclk_init(struct rk3036_cru *cru)
 	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
 	 */
 	aclk_div = GPLL_HZ / BUS_ACLK_HZ - 1;
-	assert((aclk_div + 1) * BUS_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
+	assert((aclk_div + 1) * BUS_ACLK_HZ <= GPLL_HZ && aclk_div <= 0x1f);
 
 	pclk_div = BUS_ACLK_HZ / BUS_PCLK_HZ - 1;
-	assert((pclk_div + 1) * BUS_PCLK_HZ == BUS_ACLK_HZ && pclk_div <= 0x7);
+	assert((pclk_div + 1) * BUS_PCLK_HZ <= BUS_ACLK_HZ && pclk_div <= 0x7);
 
 	hclk_div = BUS_ACLK_HZ / BUS_HCLK_HZ - 1;
-	assert((hclk_div + 1) * BUS_HCLK_HZ == BUS_ACLK_HZ && hclk_div <= 0x3);
+	assert((hclk_div + 1) * BUS_HCLK_HZ <= BUS_ACLK_HZ && hclk_div <= 0x3);
 
 	rk_clrsetreg(&cru->cru_clksel_con[0],
 		     BUS_ACLK_PLL_SEL_MASK | BUS_ACLK_DIV_MASK,
@@ -164,14 +164,14 @@ static void rkclk_init(struct rk3036_cru *cru)
 	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
 	 */
 	aclk_div = GPLL_HZ / PERI_ACLK_HZ - 1;
-	assert((aclk_div + 1) * PERI_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f);
+	assert((aclk_div + 1) * PERI_ACLK_HZ <= GPLL_HZ && aclk_div < 0x1f);
 
 	hclk_div = ilog2(PERI_ACLK_HZ / PERI_HCLK_HZ);
-	assert((1 << hclk_div) * PERI_HCLK_HZ ==
+	assert((1 << hclk_div) * PERI_HCLK_HZ <=
 		PERI_ACLK_HZ && (hclk_div < 0x4));
 
 	pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ);
-	assert((1 << pclk_div) * PERI_PCLK_HZ ==
+	assert((1 << pclk_div) * PERI_PCLK_HZ <=
 		PERI_ACLK_HZ && pclk_div < 0x8);
 
 	rk_clrsetreg(&cru->cru_clksel_con[10],

commit 27b00bb2a4993e517d042a4588ad6b6ec8764745
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Apr 18 16:32:12 2019 +0800

    clk: rockchip: rk3066: fix up the assert error
    
    Change-Id: I4d75bef4f1450e2cb467eb106b81e80eb8f582d1
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3066.c b/drivers/clk/rockchip/clk_rk3066.c
index dc324350dc..7dc435395b 100644
--- a/drivers/clk/rockchip/clk_rk3066.c
+++ b/drivers/clk/rockchip/clk_rk3066.c
@@ -411,7 +411,7 @@ static void rkclk_init(struct rk3066_cru *cru, struct rk3066_grf *grf,
 	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
 	 */
 	aclk_div = RATE_TO_DIV(GPLL_HZ, CPU_ACLK_HZ);
-	assert((aclk_div + 1) * CPU_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f);
+	assert((aclk_div + 1) * CPU_ACLK_HZ <= GPLL_HZ && aclk_div < 0x1f);
 
 	rk_clrsetreg(&cru->cru_clksel_con[0],
 		     CPU_ACLK_PLL_MASK |
@@ -420,11 +420,11 @@ static void rkclk_init(struct rk3066_cru *cru, struct rk3066_grf *grf,
 		     aclk_div << A9_CPU_DIV_SHIFT);
 
 	hclk_div = ilog2(CPU_ACLK_HZ / CPU_HCLK_HZ);
-	assert((1 << hclk_div) * CPU_HCLK_HZ == CPU_ACLK_HZ && hclk_div < 0x3);
+	assert((1 << hclk_div) * CPU_HCLK_HZ <= CPU_ACLK_HZ && hclk_div < 0x3);
 	pclk_div = ilog2(CPU_ACLK_HZ / CPU_PCLK_HZ);
-	assert((1 << pclk_div) * CPU_PCLK_HZ == CPU_ACLK_HZ && pclk_div < 0x4);
+	assert((1 << pclk_div) * CPU_PCLK_HZ <= CPU_ACLK_HZ && pclk_div < 0x4);
 	h2p_div = ilog2(CPU_HCLK_HZ / CPU_H2P_HZ);
-	assert((1 << h2p_div) * CPU_H2P_HZ == CPU_HCLK_HZ && pclk_div < 0x3);
+	assert((1 << h2p_div) * CPU_H2P_HZ <= CPU_HCLK_HZ && pclk_div < 0x3);
 
 	rk_clrsetreg(&cru->cru_clksel_con[1],
 		     AHB2APB_DIV_MASK |
@@ -439,14 +439,14 @@ static void rkclk_init(struct rk3066_cru *cru, struct rk3066_grf *grf,
 	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
 	 */
 	aclk_div = GPLL_HZ / PERI_ACLK_HZ - 1;
-	assert((aclk_div + 1) * PERI_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f);
+	assert((aclk_div + 1) * PERI_ACLK_HZ <= GPLL_HZ && aclk_div < 0x1f);
 
 	hclk_div = ilog2(PERI_ACLK_HZ / PERI_HCLK_HZ);
-	assert((1 << hclk_div) * PERI_HCLK_HZ ==
+	assert((1 << hclk_div) * PERI_HCLK_HZ <=
 		PERI_ACLK_HZ && (hclk_div < 0x4));
 
 	pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ);
-	assert((1 << pclk_div) * PERI_PCLK_HZ ==
+	assert((1 << pclk_div) * PERI_PCLK_HZ <=
 		PERI_ACLK_HZ && (pclk_div < 0x4));
 
 	rk_clrsetreg(&cru->cru_clksel_con[10],

commit d177ad999c5c4bbe9d2582086b39405e6e9d0834
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Apr 18 16:31:35 2019 +0800

    clk: rockchip: rk3188: fix up the assert error
    
    Change-Id: I690798cd9a17e266c32d702f5b2c8bfdc413d970
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3188.c b/drivers/clk/rockchip/clk_rk3188.c
index 757328f4bc..857fbf42da 100644
--- a/drivers/clk/rockchip/clk_rk3188.c
+++ b/drivers/clk/rockchip/clk_rk3188.c
@@ -441,7 +441,7 @@ static void rkclk_init(struct rk3188_cru *cru, struct rk3188_grf *grf,
 	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
 	 */
 	aclk_div = DIV_ROUND_UP(GPLL_HZ, CPU_ACLK_HZ) - 1;
-	assert((aclk_div + 1) * CPU_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
+	assert((aclk_div + 1) * CPU_ACLK_HZ <= GPLL_HZ && aclk_div <= 0x1f);
 
 	rk_clrsetreg(&cru->cru_clksel_con[0],
 		     CPU_ACLK_PLL_MASK << CPU_ACLK_PLL_SHIFT |
@@ -450,11 +450,11 @@ static void rkclk_init(struct rk3188_cru *cru, struct rk3188_grf *grf,
 		     aclk_div << A9_CPU_DIV_SHIFT);
 
 	hclk_div = ilog2(CPU_ACLK_HZ / CPU_HCLK_HZ);
-	assert((1 << hclk_div) * CPU_HCLK_HZ == CPU_ACLK_HZ && hclk_div < 0x3);
+	assert((1 << hclk_div) * CPU_HCLK_HZ <= CPU_ACLK_HZ && hclk_div < 0x3);
 	pclk_div = ilog2(CPU_ACLK_HZ / CPU_PCLK_HZ);
-	assert((1 << pclk_div) * CPU_PCLK_HZ == CPU_ACLK_HZ && pclk_div < 0x4);
+	assert((1 << pclk_div) * CPU_PCLK_HZ <= CPU_ACLK_HZ && pclk_div < 0x4);
 	h2p_div = ilog2(CPU_HCLK_HZ / CPU_H2P_HZ);
-	assert((1 << h2p_div) * CPU_H2P_HZ == CPU_HCLK_HZ && pclk_div < 0x3);
+	assert((1 << h2p_div) * CPU_H2P_HZ <= CPU_HCLK_HZ && pclk_div < 0x3);
 
 	rk_clrsetreg(&cru->cru_clksel_con[1],
 		     AHB2APB_DIV_MASK << AHB2APB_DIV_SHIFT |
@@ -469,14 +469,14 @@ static void rkclk_init(struct rk3188_cru *cru, struct rk3188_grf *grf,
 	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
 	 */
 	aclk_div = GPLL_HZ / PERI_ACLK_HZ - 1;
-	assert((aclk_div + 1) * PERI_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f);
+	assert((aclk_div + 1) * PERI_ACLK_HZ <= GPLL_HZ && aclk_div < 0x1f);
 
 	hclk_div = ilog2(PERI_ACLK_HZ / PERI_HCLK_HZ);
-	assert((1 << hclk_div) * PERI_HCLK_HZ ==
+	assert((1 << hclk_div) * PERI_HCLK_HZ <=
 		PERI_ACLK_HZ && (hclk_div < 0x4));
 
 	pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ);
-	assert((1 << pclk_div) * PERI_PCLK_HZ ==
+	assert((1 << pclk_div) * PERI_PCLK_HZ <=
 		PERI_ACLK_HZ && (pclk_div < 0x4));
 
 	rk_clrsetreg(&cru->cru_clksel_con[10],

commit a0af2ba7c791f16daf771b7051be552699ec8120
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Apr 18 16:30:58 2019 +0800

    clk: rockchip: rk3288: fix up the assert error
    
    Change-Id: I066a217b15108db21821c63bd7709fb430d34f45
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index b42d36cbd0..eb5ec6ec5b 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -544,13 +544,13 @@ static void rkclk_init(struct rk3288_cru *cru, struct rk3288_grf *grf)
 	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
 	 */
 	aclk_div = GPLL_HZ / PD_BUS_ACLK_HZ - 1;
-	assert((aclk_div + 1) * PD_BUS_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
+	assert((aclk_div + 1) * PD_BUS_ACLK_HZ <= GPLL_HZ && aclk_div <= 0x1f);
 	hclk_div = PD_BUS_ACLK_HZ / PD_BUS_HCLK_HZ - 1;
-	assert((hclk_div + 1) * PD_BUS_HCLK_HZ ==
+	assert((hclk_div + 1) * PD_BUS_HCLK_HZ <=
 		PD_BUS_ACLK_HZ && (hclk_div <= 0x3) && (hclk_div != 0x2));
 
 	pclk_div = PD_BUS_ACLK_HZ / PD_BUS_PCLK_HZ - 1;
-	assert((pclk_div + 1) * PD_BUS_PCLK_HZ ==
+	assert((pclk_div + 1) * PD_BUS_PCLK_HZ <=
 		PD_BUS_ACLK_HZ && pclk_div <= 0x7);
 
 	rk_clrsetreg(&cru->cru_clksel_con[1],
@@ -566,14 +566,14 @@ static void rkclk_init(struct rk3288_cru *cru, struct rk3288_grf *grf)
 	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
 	 */
 	aclk_div = GPLL_HZ / PERI_ACLK_HZ - 1;
-	assert((aclk_div + 1) * PERI_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
+	assert((aclk_div + 1) * PERI_ACLK_HZ <= GPLL_HZ && aclk_div <= 0x1f);
 
 	hclk_div = ilog2(PERI_ACLK_HZ / PERI_HCLK_HZ);
-	assert((1 << hclk_div) * PERI_HCLK_HZ ==
+	assert((1 << hclk_div) * PERI_HCLK_HZ <=
 		PERI_ACLK_HZ && (hclk_div <= 0x2));
 
 	pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ);
-	assert((1 << pclk_div) * PERI_PCLK_HZ ==
+	assert((1 << pclk_div) * PERI_PCLK_HZ <=
 		PERI_ACLK_HZ && (pclk_div <= 0x3));
 
 	rk_clrsetreg(&cru->cru_clksel_con[10],

commit 3469bfafc45bb7bb173f1497ed3fe9c51a308e06
Author: Bian Jin chen <kenjc.bian@rock-chips.com>
Date:   Wed Apr 24 17:48:17 2019 +0800

    configs: rk3399pro: enable avb and dtbo for Android P.
    
    Change-Id: I7e3c95d1dbdfded7c89f70b1df9f38a7468573ed
    Signed-off-by: Bian Jin chen <kenjc.bian@rock-chips.com>

diff --git a/configs/rk3399pro_defconfig b/configs/rk3399pro_defconfig
index 95a3dc9559..e37eeb8030 100644
--- a/configs/rk3399pro_defconfig
+++ b/configs/rk3399pro_defconfig
@@ -18,6 +18,7 @@ CONFIG_BOOTDELAY=0
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_ANDROID_AVB=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
 CONFIG_SPL_ATF=y
@@ -28,6 +29,7 @@ CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_BOOTD is not set
 CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_DTIMG=y
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
@@ -135,5 +137,14 @@ CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
+CONFIG_OF_LIBFDT_OVERLAY=y
 # CONFIG_EFI_LOADER is not set
+CONFIG_AVB_LIBAVB=y
+CONFIG_AVB_LIBAVB_AB=y
+CONFIG_AVB_LIBAVB_ATX=y
+CONFIG_AVB_LIBAVB_USER=y
+CONFIG_RK_AVB_LIBAVB_USER=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V1=y
+CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
 CONFIG_TEST_ROCKCHIP=y

commit 94cf1096eeb0e0cb82da8730a3078200e904f351
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 30 10:11:31 2019 +0800

    power: charge animation: fix cmd compile error
    
    cmd depends on DM_CHARGE_DISPLAY and default y.
    
    Change-Id: I5e685e0020c4aa1da80ffc27e5a576bc8969c3be
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 8f29f886c4..c2d90640f4 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1299,6 +1299,8 @@ config CMD_REGULATOR
 
 config CMD_CHARGE_DISPLAY
 	bool "Enable Driver Model Charge Display command"
+	depends on DM_CHARGE_DISPLAY
+	default y
 	help
 	  Support U-Boot charge display.
 
diff --git a/cmd/charge.c b/cmd/charge.c
index a06eae90c7..bb7a89d771 100644
--- a/cmd/charge.c
+++ b/cmd/charge.c
@@ -10,8 +10,8 @@
 #include <power/charge_display.h>
 #include <power/charge_animation.h>
 
-static int charge_display(cmd_tbl_t *cmdtp, int flag, int argc,
-			  char *const argv[])
+static int do_charge_display(cmd_tbl_t *cmdtp, int flag, int argc,
+			     char *const argv[])
 {
 	int on_soc, on_voltage, screen_voltage;
 	int ret, save[3];
@@ -61,7 +61,7 @@ static int charge_display(cmd_tbl_t *cmdtp, int flag, int argc,
 	return 0;
 }
 
-U_BOOT_CMD(charge, 4, 0, charge_display,
+U_BOOT_CMD(charge, 4, 0, do_charge_display,
 	   "Charge display",
 	   "-charge\n"
 	   "-charge <power on soc> <power on voltage> <screen on voltage>"
diff --git a/drivers/power/charge-display-uclass.c b/drivers/power/charge-display-uclass.c
index 21ea45e9ea..e1a02e7376 100644
--- a/drivers/power/charge-display-uclass.c
+++ b/drivers/power/charge-display-uclass.c
@@ -9,7 +9,7 @@
 #include <dm.h>
 #include <power/charge_display.h>
 
-static int charge_display_show(struct udevice *dev)
+int charge_display_show(struct udevice *dev)
 {
 	const struct dm_charge_display_ops *ops = dev_get_driver_ops(dev);
 
diff --git a/include/power/charge_display.h b/include/power/charge_display.h
index 19f0efabbe..3077b7b856 100644
--- a/include/power/charge_display.h
+++ b/include/power/charge_display.h
@@ -12,5 +12,6 @@ struct dm_charge_display_ops {
 };
 
 int charge_display(void);
+int charge_display_show(struct udevice *dev);
 
 #endif

commit 6213b40154e08b6dffe52137bdd3a46a2512655a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 30 10:40:36 2019 +0800

    cmd: CMD_DTMIG: select OF_LIBFDT_OVERLAY
    
    Change-Id: I67d7040d477712169c815273dfaf913a4cf258e7
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 11e1d8a79a..8f29f886c4 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -233,6 +233,7 @@ config CMD_BOOTMENU
 
 config CMD_DTIMG
 	bool "dtimg"
+	select OF_LIBFDT_OVERLAY
 	help
 	  Android DTB/DTBO image manipulation commands. Read dtb/dtbo files from
 	  image into RAM, dump image structure information, etc. Those dtb/dtbo

commit c9f547d895408bcd9120ba74a2c7a1f14cc9dcb0
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Sun Apr 28 16:56:51 2019 +0800

    rockchip: param: add sdupdate variable to indicate card function
    
    Add sdupdate variable to receive card function info from preloader atags.
    If the sd card is updated-card, set sdupdate to bootargs. otherwise test
    whether the sd cart is ROCKCHIP_SD_UPDATE_CARD or not by rkimgtest cmd.
    
    Change-Id: I6c09ade4a31a2e4c8349245e9e345f735afd11e9
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rk_atags.h b/arch/arm/include/asm/arch-rockchip/rk_atags.h
index b9028b35d2..bdb6254378 100644
--- a/arch/arm/include/asm/arch-rockchip/rk_atags.h
+++ b/arch/arm/include/asm/arch-rockchip/rk_atags.h
@@ -41,6 +41,10 @@
 #define BOOT_TYPE_SPI_NAND	(1 << 5)
 #define BOOT_TYPE_RAM		(1 << 6)
 
+/* define sd card function */
+#define SD_UNKNOWN_CARD		0
+#define SD_UPDATE_CARD		1
+
 /* tag_serial.m_mode */
 #define SERIAL_M_MODE_M0	0x0
 #define SERIAL_M_MODE_M1	0x1
@@ -67,7 +71,8 @@ struct tag_bootdev {
 	u32 devtype;
 	u32 devnum;
 	u32 mode;
-	u32 reserved[7];
+	u32 sdupdate;
+	u32 reserved[6];
 	u32 hash;
 } __packed;
 
diff --git a/arch/arm/mach-rockchip/param.c b/arch/arm/mach-rockchip/param.c
index 6cf867686e..0d422c92b4 100644
--- a/arch/arm/mach-rockchip/param.c
+++ b/arch/arm/mach-rockchip/param.c
@@ -170,6 +170,21 @@ int param_parse_bootdev(char **devtype, char **devnum)
 		case BOOT_TYPE_SD1:
 			*devtype = "mmc";
 			*devnum = "1";
+			/*
+			 * If preloader does not pass sdupdate value, we treat it
+			 * as a unknown card and call the rkimgtest cmd to find
+			 * out what it is.
+			 *
+			 * If preloader pass sdupdate value as an update card,
+			 * we just set "sdfwupdate" to bootargs instead of
+			 * calling rkimgtest cmd which consumes time.
+			 */
+			if (t->u.bootdev.sdupdate == SD_UNKNOWN_CARD) {
+				run_command("mmc dev 1", 0);
+				run_command("rkimgtest mmc 1", 0);
+			} else if (t->u.bootdev.sdupdate == SD_UPDATE_CARD) {
+				env_update("bootargs", "sdfwupdate");
+			}
 			break;
 		case BOOT_TYPE_NAND:
 			*devtype = "rknand";

commit ff21a545f585482c9bfef04759ee6ea69553da35
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 15 17:52:53 2019 +0800

    rockchip: resource: fix parse gpio base address error
    
    We should parse node name to identify the gpio port before
    reading base address, it avoids to use miss match address.
    
    Move out gpio_parse_base_address() from sub string parse is
    better.
    
    Set gpio as input mode before reading.
    
    Change-Id: Iffd4ef7f3ceb1bb56a65680265af74ca50b14712
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 50598d89fd..83d0faf584 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -414,6 +414,7 @@ int rockchip_read_resource_file(void *buf, const char *name,
 #define KEY_WORDS_ADC_CTRL	"#_"
 #define KEY_WORDS_ADC_CH	"_ch"
 #define KEY_WORDS_GPIO		"#gpio"
+#define GPIO_SWPORT_DDR		0x04
 #define GPIO_EXT_PORT		0x50
 #define MAX_ADC_CH_NR		10
 #define MAX_GPIO_NR		10
@@ -518,7 +519,8 @@ static int gpio_parse_base_address(fdt_addr_t *gpio_base_addr)
 {
 	static int initial;
 	ofnode parent, node;
-	int i = 0;
+	const char *name;
+	int idx, nr = 0;
 
 	if (initial)
 		return 0;
@@ -535,11 +537,19 @@ static int gpio_parse_base_address(fdt_addr_t *gpio_base_addr)
 			continue;
 		}
 
-		gpio_base_addr[i++] = ofnode_get_addr(node);
-		debug("   - gpio%d: 0x%x\n", i - 1, (uint32_t)gpio_base_addr[i - 1]);
+		name = ofnode_get_name(node);
+		if (!is_digit((char)*(name + 4))) {
+			debug("   - bad gpio node name: %s\n", name);
+			continue;
+		}
+
+		nr++;
+		idx = *(name + 4) - '0';
+		gpio_base_addr[idx] = ofnode_get_addr(node);
+		debug("   - gpio%d: 0x%x\n", idx, (uint32_t)gpio_base_addr[idx]);
 	}
 
-	if (i == 0) {
+	if (nr == 0) {
 		debug("   - parse gpio address failed\n");
 		return -EINVAL;
 	}
@@ -574,6 +584,14 @@ static int rockchip_read_dtb_by_gpio(const char *file_name)
 
 	debug("%s\n", file_name);
 
+	/* Parse gpio address */
+	memset(gpio_base_addr, 0, sizeof(gpio_base_addr));
+	ret = gpio_parse_base_address(gpio_base_addr);
+	if (ret) {
+		debug("   - Can't parse gpio base address: %d\n", ret);
+		return ret;
+	}
+
 	strgpio = strstr(file_name, KEY_WORDS_GPIO);
 	while (strgpio) {
 		debug("   - substr: %s\n", strgpio);
@@ -588,13 +606,6 @@ static int rockchip_read_dtb_by_gpio(const char *file_name)
 			return -EINVAL;
 		}
 
-		/* Parse gpio address */
-		ret = gpio_parse_base_address(gpio_base_addr);
-		if (ret) {
-			debug("   - Can't parse gpio base address: %d\n", ret);
-			return ret;
-		}
-
 		/* Read gpio value */
 		port = *(p + 0) - '0';
 		bank = *(p + 1) - 'a';
@@ -606,9 +617,20 @@ static int rockchip_read_dtb_by_gpio(const char *file_name)
 		 * is enough. We use cached_v[] to save what we have read, zero
 		 * means not read before.
 		 */
-		if (cached_v[port] == 0)
+		if (cached_v[port] == 0) {
+			if (!gpio_base_addr[port]) {
+				debug("   - can't find gpio%d base address\n", port);
+				return 0;
+			}
+
+			/* Input mode */
+			val = readl(gpio_base_addr[port] + GPIO_SWPORT_DDR);
+			val &= ~(1 << (bank * 8 + pin));
+			writel(val, gpio_base_addr[port] + GPIO_SWPORT_DDR);
+
 			cached_v[port] =
 				readl(gpio_base_addr[port] + GPIO_EXT_PORT);
+		}
 
 		/* Verify result */
 		bit = bank * 8 + pin;
@@ -623,7 +645,7 @@ static int rockchip_read_dtb_by_gpio(const char *file_name)
 		}
 
 		debug("   - parse: gpio%d%c%d=%d, read=%d %s\n",
-		      port, bank + 'a', pin, lvl, val, found ? "(Y)" : "");
+		      port, bank + 'a', pin, lvl, val, found ? "(Y)" : "(N)");
 	}
 
 	return found ? 0 : -ENOENT;

commit efb93541fe4c1a54c73e46cae12ebf460bae6a9e
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Mon Mar 25 14:57:59 2019 +0800

    lib: optee_client: add module name in print func
    
    Change-Id: I6cdcb0870bf5a3915009421e5c8b09584ac2bb6c
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/OpteeClientApiLib.c b/lib/optee_clientApi/OpteeClientApiLib.c
index 01f24ddb3e..bb8be33945 100644
--- a/lib/optee_clientApi/OpteeClientApiLib.c
+++ b/lib/optee_clientApi/OpteeClientApiLib.c
@@ -19,12 +19,12 @@ TEEC_Result OpteeClientApiLibInitialize(void)
 
 	status = OpteeClientMemInit();
 	if (status != TEEC_SUCCESS) {
-		printf("OpteeClientMemInit fail!");
+		printf("TEEC: OpteeClientMemInit fail!\n");
 		return status;
 	}
 	status = OpteeClientRkFsInit();
 	if (status != TEEC_SUCCESS) {
-		printf("OpteeClientRkFsInit fail!");
+		printf("TEEC: OpteeClientRkFsInit fail!\n");
 		return status;
 	}
 
@@ -61,7 +61,7 @@ TEEC_Result TEEC_InitializeContext(const char *name,
 	memset(context, 0, sizeof(*context));
 
 exit:
-	debug("TEEC_InitializeContext Exit : teecresult=0x%X\n\n", teecresult);
+	debug("TEEC_InitializeContext Exit : teecresult=0x%X\n", teecresult);
 	return teecresult;
 }
 
@@ -243,7 +243,7 @@ Exit:
 	if (error_origin != NULL)
 		*error_origin = TeecErrorOrigin;
 
-	debug("TEEC_OpenSession Exit : TeecResult=0x%X, TeecErrorOrigin=0x%X\n\n",
+	debug("TEEC_OpenSession Exit : TeecResult=0x%X, TeecErrorOrigin=0x%X\n",
 				TeecResult, TeecErrorOrigin);
 	return TeecResult;
 }
@@ -265,7 +265,7 @@ void TEEC_CloseSession(TEEC_Session *session)
 	TeecResult = TEEC_SMC_CloseSession(session, &TeecErrorOrigin);
 
 Exit:
-	debug("TEEC_CloseSession Exit : TeecResult=0x%X, TeecErrorOrigin=0x%X\n\n",
+	debug("TEEC_CloseSession Exit : TeecResult=0x%X, TeecErrorOrigin=0x%X\n",
 			TeecResult, TeecErrorOrigin);
 	return;
 }
@@ -304,7 +304,7 @@ Exit:
 	if (error_origin != NULL)
 		*error_origin = TeecErrorOrigin;
 
-	debug("TEEC_InvokeCommand Exit : TeecResult=0x%X, TeecErrorOrigin=0x%X\n\n",
+	debug("TEEC_InvokeCommand Exit : TeecResult=0x%X, TeecErrorOrigin=0x%X\n",
 				TeecResult, TeecErrorOrigin);
 
 	return TeecResult;
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index c2f931ecc3..ba3ce52c16 100644
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -1054,7 +1054,6 @@ exit:
 	TEEC_ReleaseSharedMemory(&SharedMem1);
 	TEEC_CloseSession(&TeecSession);
 	TEEC_FinalizeContext(&TeecContext);
-	debug("testmm end\n");
 
 	return TeecResult;
 }
diff --git a/lib/optee_clientApi/OpteeClientMem.c b/lib/optee_clientApi/OpteeClientMem.c
index d290567d83..899be36b58 100644
--- a/lib/optee_clientApi/OpteeClientMem.c
+++ b/lib/optee_clientApi/OpteeClientMem.c
@@ -25,7 +25,7 @@ ALLOC_FLAG alloc_flags[50];
 int my_malloc_init(void *start, uint32_t size)
 {
 	if (start == NULL || size == 0) {
-		printf("malloc init fail!");
+		printf("TEEC: malloc init fail!\n");
 		return -1;
 	}
 	memset(start, 0, size);
@@ -34,7 +34,7 @@ int my_malloc_init(void *start, uint32_t size)
 	if (my_flag == NULL) {
 		my_flag = malloc(size/4096);
 		if (my_flag == NULL) {
-			printf("malloc fail!");
+			printf("TEEC: malloc fail!\n");
 			return -1;
 		}
 	}
@@ -100,7 +100,7 @@ void *my_malloc(uint32_t size)
 					memset(my_mem_start +
 						(i + k) * 4096, 0, 4096);
 				}
-				debug(" malloc is: 0x%X  0x%X\n",
+				debug("TEEC: malloc is: 0x%X  0x%X\n",
 					(int)i, (int)num);
 				write_usedblock((my_mem_start + i * 4096),
 					num * 4096);
@@ -127,7 +127,7 @@ void my_free(void *ptr)
 		return;
 
 	num = (size-1)/4096+1;
-	debug(" free is: 0x%X  0x%X\n", i, num);
+	debug("TEEC: free is: 0x%X  0x%X\n", i, num);
 
 	for (j = 0; j < num; j++) {
 		*(my_flag + i + j) = 0;
@@ -152,7 +152,7 @@ int OpteeClientMemInit(void)
 
 	tee_smc_call(&ArmSmcArgs);
 
-	debug("get share memory, arg0=0x%x arg1=0x%x arg2=0x%x arg3=0x%x\n",
+	debug("TEEC: get share memory, arg0=0x%x arg1=0x%x arg2=0x%x arg3=0x%x\n",
 	      ArmSmcArgs.Arg0, ArmSmcArgs.Arg1, ArmSmcArgs.Arg2, ArmSmcArgs.Arg3);
 
 	return my_malloc_init((void *)(size_t)ArmSmcArgs.Arg1, ArmSmcArgs.Arg2);
diff --git a/lib/optee_clientApi/OpteeClientRPC.c b/lib/optee_clientApi/OpteeClientRPC.c
index c2ddbc381d..5fb9eeb6c4 100644
--- a/lib/optee_clientApi/OpteeClientRPC.c
+++ b/lib/optee_clientApi/OpteeClientRPC.c
@@ -130,9 +130,9 @@ TEEC_Result OpteeRpcCmdLoadTa(t_teesmc32_arg *TeeSmc32Arg)
 
 	memcpy((void *)AllocAddress, ImageData, ImageSize);
 
-	debug("...TA loaded at 0x%zu of size 0x%X bytes\n",
+	debug("TEEC: ...TA loaded at 0x%zu of size 0x%X bytes\n",
 		AllocAddress, ImageSize);
-	debug("...AllocAddress[0] 0x%X ; AllocAddress[1] 0x%X bytes\n",
+	debug("TEEC: ...AllocAddress[0] 0x%X ; AllocAddress[1] 0x%X bytes\n",
 		*(char *)AllocAddress, *(char *)(AllocAddress+1));
 
 	TeeLoadTaCmd->va = AllocAddress;
@@ -144,7 +144,7 @@ Exit:
 	TeeSmc32Arg->ret = TeecResult;
 	TeeSmc32Arg->ret_origin = TEEC_ORIGIN_API;
 
-	debug("OpteeRpcCmdLoadTa Exit : TeecResult=0x%X\n", TeecResult);
+	debug("TEEC: OpteeRpcCmdLoadTa Exit : TeecResult=0x%X\n", TeecResult);
 
 	return TeecResult;
 }
@@ -166,15 +166,15 @@ TEEC_Result OpteeRpcCmdLoadV2Ta(t_teesmc32_arg *TeeSmc32Arg)
 
 	memcpy(uuid, (void *)&TeeSmc32Param[0].u.value, 16);
 	for (i = 0; i < 16; i++)
-		debug("uuid 0x%x", uuid[i]);
+		debug("TEEC: uuid 0x%x", uuid[i]);
 
 	if (TeeSmc32Param[1].u.memref.buf_ptr == 0) {
-		debug("return size of TA, keymaster_size = 0\n");
+		debug("TEEC: return size of TA, keymaster_size = 0\n");
 		TeeSmc32Param[1].u.memref.size = 0;
 	} else {
 		/*memcpy((void *)(size_t)TeeSmc32Param[1].u.memref.buf_ptr,
 			(void *)keymaster_data, TeeSmc32Param[1].u.memref.size);*/
-		debug("memref.buf_ptr = 0x%llx; memref.size = 0x%llx\n",
+		debug("TEEC: memref.buf_ptr = 0x%llx; memref.size = 0x%llx\n",
 			TeeSmc32Param[1].u.memref.buf_ptr,
 			TeeSmc32Param[1].u.memref.size);
 	}
@@ -183,7 +183,7 @@ Exit:
 	TeeSmc32Arg->ret = TeecResult;
 	TeeSmc32Arg->ret_origin = TEEC_ORIGIN_API;
 
-	debug("OpteeRpcCmdLoadTa Exit : TeecResult=0x%X\n", TeecResult);
+	debug("TEEC: OpteeRpcCmdLoadTa Exit : TeecResult=0x%X\n", TeecResult);
 
 	return TeecResult;
 }
@@ -214,7 +214,7 @@ TEEC_Result OpteeRpcCmdFreeTa(t_teesmc32_arg *TeeSmc32Arg)
 	AllocAddress = TeeSmc32Param[0].u.memref.buf_ptr;
 	ImageSize = TeeSmc32Param[0].u.memref.size;
 
-	debug("OpteeRpcCmdFreeTa Enter: AllocAddress=0x%X, ImageSize=0x%X\n",
+	debug("TEEC: OpteeRpcCmdFreeTa Enter: AllocAddress=0x%X, ImageSize=0x%X\n",
 			(uint32_t) AllocAddress, (uint32_t) ImageSize);
 
 	if (AllocAddress == 0) {
@@ -228,7 +228,7 @@ Exit:
 	TeeSmc32Arg->ret = TeecResult;
 	TeeSmc32Arg->ret_origin = TEEC_ORIGIN_API;
 
-	debug("OpteeRpcCmdFreeTa Exit : TeecResult=0x%X\n", TeecResult);
+	debug("TEEC: OpteeRpcCmdFreeTa Exit : TeecResult=0x%X\n", TeecResult);
 
 	return TeecResult;
 }
@@ -253,7 +253,7 @@ TEEC_Result OpteeRpcCmdRpmb(t_teesmc32_arg *TeeSmc32Arg)
 	t_teesmc32_param *TeeSmc32Param;
 	struct mmc *mmc;
 
-	debug("Entered RPMB RPC\n");
+	debug("TEEC: Entered RPMB RPC\n");
 
 	if (TeeSmc32Arg->num_params != 2) {
 		TeecResult = TEEC_ERROR_BAD_PARAMETERS;
@@ -308,7 +308,7 @@ TEEC_Result OpteeRpcCmdRpmb(t_teesmc32_arg *TeeSmc32Arg)
 		RequestMsgType = RPMB_PACKET_DATA_TO_UINT16(
 				RequestPackets->msg_type);
 
-		debug("RPMB Data request %d\n", RequestMsgType);
+		debug("TEEC: RPMB Data request %d\n", RequestMsgType);
 
 		switch (RequestMsgType) {
 		case TEE_RPC_RPMB_MSG_TYPE_REQ_AUTH_KEY_PROGRAM: {
@@ -403,7 +403,7 @@ TEEC_Result OpteeRpcCmdRpmb(t_teesmc32_arg *TeeSmc32Arg)
 			TeecResult = TEEC_ERROR_BAD_PARAMETERS;
 			break;
 		}
-		debug("RPMB TeecResult %d\n", TeecResult);
+		debug("TEEC: RPMB TeecResult %d\n", TeecResult);
 		break;
 	}
 
@@ -505,7 +505,7 @@ TEEC_Result OpteeRpcCmdFs(t_teesmc32_arg *TeeSmc32Arg)
 	t_teesmc32_param *TeeSmc32Param;
 
 	if (check_security_exist(0) < 0) {
-		printf("security partition not exist! unable to use RK FS!\n");
+		printf("TEEC: security partition not exist! unable to use RK FS!\n");
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -554,7 +554,7 @@ TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs)
 		TeecResult = OpteeRpcAlloc(ArmSmcArgs->Arg1, &ArmSmcArgs->Arg1);
 #endif
 #ifdef CONFIG_OPTEE_V2
-		debug("ArmSmcArgs->Arg1 = 0x%x \n", ArmSmcArgs->Arg1);
+		debug("TEEC: ArmSmcArgs->Arg1 = 0x%x \n", ArmSmcArgs->Arg1);
 		TeecResult = OpteeRpcAlloc(ArmSmcArgs->Arg1, &ArmSmcArgs->Arg2);
 		ArmSmcArgs->Arg5 = ArmSmcArgs->Arg2;
 		ArmSmcArgs->Arg1 = 0;
@@ -595,7 +595,7 @@ TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs)
 #ifdef CONFIG_OPTEE_V2
 		t_teesmc32_arg *TeeSmc32Arg =
 			(t_teesmc32_arg *)(size_t)((uint64_t)ArmSmcArgs->Arg1 << 32 | ArmSmcArgs->Arg2);
-		debug("TeeSmc32Arg->cmd = 0x%x\n", TeeSmc32Arg->cmd);
+		debug("TEEC: TeeSmc32Arg->cmd = 0x%x\n", TeeSmc32Arg->cmd);
 #endif
 		switch (TeeSmc32Arg->cmd) {
 #ifdef CONFIG_OPTEE_V1
@@ -635,7 +635,7 @@ TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs)
 			uint32_t tempaddr;
 			uint32_t allocsize = TeeSmc32Arg->params[0].u.value.b;
 			TeecResult = OpteeRpcAlloc(allocsize, &tempaddr);
-			debug("allocsize = 0x%x tempaddr = 0x%x\n", allocsize, tempaddr);
+			debug("TEEC: allocsize = 0x%x tempaddr = 0x%x\n", allocsize, tempaddr);
 			TeeSmc32Arg->params[0].attr = OPTEE_MSG_ATTR_TYPE_TMEM_OUTPUT_V2;
 			TeeSmc32Arg->params[0].u.memref.buf_ptr = tempaddr;
 			TeeSmc32Arg->params[0].u.memref.size = allocsize;
@@ -665,7 +665,7 @@ TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs)
 #endif
 
 		default: {
-			printf("...unsupported RPC CMD: cmd=0x%X\n",
+			printf("TEEC: ...unsupported RPC CMD: cmd=0x%X\n",
 				TeeSmc32Arg->cmd);
 			TeecResult = TEEC_ERROR_NOT_IMPLEMENTED;
 			break;
@@ -687,14 +687,14 @@ TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs)
 	}
 
 	default: {
-		printf("...unsupported RPC : Arg0=0x%X\n", ArmSmcArgs->Arg0);
+		printf("TEEC: ...unsupported RPC : Arg0=0x%X\n", ArmSmcArgs->Arg0);
 		TeecResult = TEEC_ERROR_NOT_IMPLEMENTED;
 		break;
 	}
 	}
 
 	ArmSmcArgs->Arg0 = TEESMC32_CALL_RETURN_FROM_RPC;
-	debug("OpteeRpcCallback Exit : TeecResult=0x%X\n", TeecResult);
+	debug("TEEC: OpteeRpcCallback Exit : TeecResult=0x%X\n", TeecResult);
 
 	return TeecResult;
 }
diff --git a/lib/optee_clientApi/OpteeClientRkFs-v2.c b/lib/optee_clientApi/OpteeClientRkFs-v2.c
index ce826d25d5..f06f24cd01 100644
--- a/lib/optee_clientApi/OpteeClientRkFs-v2.c
+++ b/lib/optee_clientApi/OpteeClientRkFs-v2.c
@@ -180,7 +180,7 @@ int check_security_exist(int print_flag)
 	if (!dev_desc) {
 		dev_desc = rockchip_get_bootdev();
 		if (!dev_desc) {
-			printf("%s: Could not find device\n", __func__);
+			printf("TEEC: %s: Could not find device\n", __func__);
 			return -1;
 		}
 
@@ -188,7 +188,7 @@ int check_security_exist(int print_flag)
 					  "security", &part_info) < 0) {
 			dev_desc = NULL;
 			if (print_flag != 0)
-				printf("Could not find security partition\n");
+				printf("TEEC: Could not find security partition\n");
 			return -1;
 		}
 	}
@@ -221,7 +221,7 @@ static int rkss_begin_commit(void)
 	if (check_security_exist(1) < 0)
 		return -1;
 
-	debug("%s\n", __func__);
+	debug("TEEC: %s\n", __func__);
 	p.backup_version = RKSS_BACKUP_VERSION;
 	p.backup_enable = RKSS_BACKUP_ENABLE;
 	p.backup_count = 0;
@@ -231,7 +231,7 @@ static int rkss_begin_commit(void)
 
 	ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
-		printf("blk_dwrite fail\n");
+		printf("TEEC: blk_dwrite fail\n");
 		return -1;
 	}
 	return 0;
@@ -245,12 +245,12 @@ static int rkss_finish_commit(void)
 	if (check_security_exist(1) < 0)
 		return -1;
 
-	debug("%s\n", __func__);
+	debug("TEEC: %s\n", __func__);
 	memset(data, 0, sizeof(data));
 
 	ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
-		printf("blk_dwrite fail\n");
+		printf("TEEC: blk_dwrite fail\n");
 		return -1;
 	}
 	return 0;
@@ -269,7 +269,7 @@ static int rkss_backup_sections(unsigned long index, unsigned int num)
 
 	ret = blk_dread(dev_desc, RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
-		printf("blk_dread fail\n");
+		printf("TEEC: blk_dread fail\n");
 		return -1;
 	}
 
@@ -294,28 +294,28 @@ static int rkss_backup_sections(unsigned long index, unsigned int num)
 		}
 		if ((info_current.backup_data_index + info_current.backup_num) >
 			(RKSS_BACKUP_INDEX + RKSS_BACKUP_COUNT)) {
-			printf("Not enough backup sections!");
+			printf("TEEC: Not enough backup sections!\n");
 			goto error;
 		}
-		debug("%s index=0x%lx num=0x%x backup_data_index=0x%x\n",
+		debug("TEEC: %s index=0x%lx num=0x%x backup_data_index=0x%x\n",
 		      __func__, index, num, info_current.backup_data_index);
 
 		backup_data = malloc(num * RKSS_DATA_LEN);
 		if (!backup_data) {
-			printf("malloc backup_data fail\n");
+			printf("TEEC: malloc backup_data fail\n");
 			goto error;
 		}
 
 		ret = blk_dread(dev_desc, index, num, backup_data);
 		if (ret != num) {
-			printf("blk_dread fail\n");
+			printf("TEEC: blk_dread fail\n");
 			return -1;
 		}
 
 		ret = blk_dwrite(dev_desc, info_current.backup_data_index,
 				 num, backup_data);
 		if (ret != num) {
-			printf("blk_dwrite fail\n");
+			printf("TEEC: blk_dwrite fail\n");
 			return -1;
 		}
 		free(backup_data);
@@ -330,7 +330,7 @@ static int rkss_backup_sections(unsigned long index, unsigned int num)
 
 		ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
 		if (ret != 1) {
-			printf("blk_dwrite fail\n");
+			printf("TEEC: blk_dwrite fail\n");
 			return -1;
 		}
 	}
@@ -356,7 +356,7 @@ static int rkss_resume(void)
 
 	ret = blk_dread(dev_desc, RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
-		printf("blk_dread fail\n");
+		printf("TEEC: blk_dread fail\n");
 		return -1;
 	}
 
@@ -369,7 +369,7 @@ static int rkss_resume(void)
 
 			if (info_current.backup_usedflag ==
 			    RKSS_BACKUP_USEDFLAG) {
-				debug("rkss_resume backup_index=0x%x \
+				debug("TEEC: rkss_resume backup_index=0x%x \
 				      backup_num=0x%x \
 				      info_current.backup_data_index=0x%x\n",
 				      info_current.backup_index,
@@ -378,19 +378,19 @@ static int rkss_resume(void)
 				if ((info_current.backup_data_index +
 				    info_current.backup_num) >
 				    (RKSS_BACKUP_INDEX + RKSS_BACKUP_COUNT)) {
-					printf("backup sections error!");
+					printf("TEEC: backup sections error!");
 					goto error;
 				}
 				if ((info_current.backup_index +
 				    info_current.backup_num) >
 				    RKSS_DATA_SECTION_COUNT) {
-					printf("original sections error!");
+					printf("TEEC: original sections error!");
 					goto error;
 				}
 				backup_data = malloc(info_current.backup_num *
 						     RKSS_DATA_LEN);
 				if (!backup_data) {
-					printf("malloc backup_data fail\n");
+					printf("TEEC: malloc backup_data fail\n");
 					goto error;
 				}
 
@@ -399,7 +399,7 @@ static int rkss_resume(void)
 						info_current.backup_num,
 						backup_data);
 				if (ret != info_current.backup_num) {
-					printf("blk_dread fail\n");
+					printf("TEEC: blk_dread fail\n");
 					return -1;
 				}
 
@@ -408,7 +408,7 @@ static int rkss_resume(void)
 						 info_current.backup_num,
 						 backup_data);
 				if (ret != info_current.backup_num) {
-					printf("blk_dwrite fail\n");
+					printf("TEEC: blk_dwrite fail\n");
 					return -1;
 				}
 				free(backup_data);
@@ -419,7 +419,7 @@ static int rkss_resume(void)
 	memset(data, 0, sizeof(data));
 	ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
-		printf("blk_dwrite fail\n");
+		printf("TEEC: blk_dwrite fail\n");
 		return -1;
 	}
 	return 0;
@@ -438,7 +438,7 @@ static int rkss_read_multi_sections(unsigned char *data, unsigned long index, un
 
 	ret = blk_dread(dev_desc, part_info.start + index, num, data);
 	if (ret != num) {
-		printf("blk_dread fail\n");
+		printf("TEEC: blk_dread fail\n");
 		return -1;
 	}
 	return 0;
@@ -451,7 +451,7 @@ static int rkss_write_multi_sections(unsigned char *data, unsigned long index, u
 
 	result = rkss_backup_sections(index, num);
 	if (result < 0) {
-		printf("rkss_backup_sections fail\n");
+		printf("TEEC: rkss_backup_sections fail\n");
 		return -1;
 	}
 
@@ -460,7 +460,7 @@ static int rkss_write_multi_sections(unsigned char *data, unsigned long index, u
 
 	ret = blk_dwrite(dev_desc, part_info.start + index, num, data);
 	if (ret != num) {
-		printf("blk_dwrite fail\n");
+		printf("TEEC: blk_dwrite fail\n");
 		return -1;
 	}
 	return 0;
@@ -475,7 +475,7 @@ static int rkss_read_patition_tables(unsigned char *data)
 
 	ret = blk_dread(dev_desc, part_info.start, RKSS_PARTITION_TABLE_COUNT, data);
 	if (ret != RKSS_PARTITION_TABLE_COUNT) {
-		printf("blk_dread fail\n");
+		printf("TEEC: blk_dread fail\n");
 		return -1;
 	}
 	return 0;
@@ -504,12 +504,12 @@ static void rkss_dump_ptable(void)
 
 	table_data = malloc(RKSS_PARTITION_TABLE_COUNT * RKSS_DATA_LEN);
 	if (table_data == NULL) {
-		printf("malloc table_data fail\n");
+		printf("TEEC: malloc table_data fail\n");
 		return;
 	}
 	ret = rkss_read_patition_tables(table_data);
 	if (ret < 0) {
-		printf("rkss_read_patition_tables fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_read_patition_tables fail ! ret: %d.\n", ret);
 		return;
 	}
 
@@ -539,7 +539,7 @@ static void rkss_dump_usedflags(void)
 	rkss.index = RKSS_USEDFLAGS_INDEX;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_multi_sections fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_read_multi_sections fail ! ret: %d.\n", ret);
 		return;
 	}
 	rkss_dump(rkss.data, RKSS_DATA_LEN);
@@ -559,7 +559,7 @@ static int rkss_verify_ptable(unsigned char *table_data)
 
 		if (verify->version != RKSS_VERSION
 				|| verify->checkstr != RKSS_CHECK_STR) {
-			printf("verify [%d] fail, cleanning ....", i);
+			printf("TEEC: verify [%d] fail, cleanning ....", i);
 			memset(cp, 0, RKSS_DATA_LEN);
 			verify->checkstr = RKSS_CHECK_STR;
 			verify->version = RKSS_VERSION;
@@ -567,10 +567,10 @@ static int rkss_verify_ptable(unsigned char *table_data)
 	}
 	ret = rkss_write_multi_sections(table_data, 0, RKSS_PARTITION_TABLE_COUNT);
 	if (ret < 0) {
-		printf("rkss_write_multi_sections failed!!! ret: %d.\n", ret);
+		printf("TEEC: rkss_write_multi_sections failed!!! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
-	debug("verify ptable success.\n");
+	debug("TEEC: verify ptable success.\n");
 	return TEEC_SUCCESS;
 }
 
@@ -584,7 +584,7 @@ static int rkss_verify_usedflags(struct rk_secure_storage *rkss)
 		duel = *(flags + (int)i/2);
 		flag = i & 0x1 ? duel & 0x0F : (duel & 0xF0) >> 4;
 		if (flag != 0x1) {
-			debug("init usedflags section ...\n");
+			debug("TEEC: init usedflags section ...\n");
 			memset(rkss->data, 0x00, RKSS_DATA_LEN);
 			for (n = 0; n < RKSS_PARTITION_TABLE_COUNT + 1; n++) {
 				flagw = (uint8_t *)rkss->data + (int)n/2;
@@ -594,14 +594,14 @@ static int rkss_verify_usedflags(struct rk_secure_storage *rkss)
 			}
 			ret = rkss_write_multi_sections(rkss->data, rkss->index, 1);
 			if (ret < 0) {
-				printf("clean usedflags section failed!!! ret: %d.\n", ret);
+				printf("TEEC: clean usedflags section failed!!! ret: %d.\n", ret);
 				return TEEC_ERROR_GENERIC;
 			}
 
 			return TEEC_SUCCESS;
 		}
 	}
-	debug("rkss_verify_usedflags: sucess.\n");
+	debug("TEEC: rkss_verify_usedflags: sucess.\n");
 	return TEEC_SUCCESS;
 }
 
@@ -617,7 +617,7 @@ static int rkss_get_fileinfo_by_index(int fd, struct rkss_file_info *pfileinfo)
 	rkss.index = i;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_multi_sections fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_read_multi_sections fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -626,10 +626,10 @@ static int rkss_get_fileinfo_by_index(int fd, struct rkss_file_info *pfileinfo)
 	p += n;
 
 	if (p->used != 1) {
-		debug("error: unused section!\n");
+		debug("TEEC: error: unused section!\n");
 		return TEEC_ERROR_GENERIC;
 	}
-	debug("rkss_get_fileinfo_by_index p->used = %d p->name=%s p->index=%d p->size=%d\n",
+	debug("TEEC: rkss_get_fileinfo_by_index p->used = %d p->name=%s p->index=%d p->size=%d\n",
 		p->used, p->name, p->index, p->size);
 	memcpy(pfileinfo, p, sizeof(struct rkss_file_info));
 
@@ -655,18 +655,18 @@ static int rkss_get_fileinfo_by_name(
 
 	len = strlen(filename);
 	if (len > RKSS_NAME_MAX_LENGTH - 1) {
-		printf("filename is too long. length:%u\n", len);
+		printf("TEEC: filename is too long. length:%u\n", len);
 		return TEEC_ERROR_GENERIC;
 	}
 
 	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
-		printf("malloc table_data fail\n");
+		printf("TEEC: malloc table_data fail\n");
 		return TEEC_ERROR_GENERIC;
 	}
 	ret = rkss_read_patition_tables(table_data);
 	if (ret < 0) {
-		printf("rkss_read_patition_tables fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_read_patition_tables fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -684,7 +684,7 @@ static int rkss_get_fileinfo_by_name(
 
 			/* Full Matching*/
 			if (!strcmp(p->name, filename)) {
-				debug("rkss_get_fileinfo_by_name: hit table[%d/%d], index[%d/%d]\n",
+				debug("TEEC: rkss_get_fileinfo_by_name: hit table[%d/%d], index[%d/%d]\n",
 						i, RKSS_PARTITION_TABLE_COUNT, n, RKSS_EACH_FILEFOLDER_COUNT);
 				memcpy(pfileinfo, p, sizeof(struct rkss_file_info));
 				free(table_data);
@@ -713,14 +713,14 @@ static int rkss_get_fileinfo_by_name(
 
 			} while (cur_inpos && cur_svpos);
 
-			debug("Matched folder: %s\n", p->name);
+			debug("TEEC: Matched folder: %s\n", p->name);
 			free(table_data);
 			return TEEC_ERROR_GENERIC;
 UNMATCHFOLDER:
-			debug("Unmatched ...\n");
+			debug("TEEC: Unmatched ...\n");
 		}
 	}
-	debug("rkss_get_fileinfo_by_name: file or dir no found!\n");
+	debug("TEEC: rkss_get_fileinfo_by_name: file or dir no found!\n");
 	free(table_data);
 	return TEEC_ERROR_GENERIC;
 }
@@ -738,18 +738,18 @@ static int rkss_get_dirs_by_name(char *filename)
 
 	len = strlen(filename);
 	if (len > RKSS_NAME_MAX_LENGTH - 1) {
-		printf("filename is too long. length:%u\n", len);
+		printf("TEEC: filename is too long. length:%u\n", len);
 		return TEEC_ERROR_GENERIC;
 	}
 
 	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
-		printf("malloc table_data fail\n");
+		printf("TEEC: malloc table_data fail\n");
 		return TEEC_ERROR_GENERIC;
 	}
 	ret = rkss_read_patition_tables(table_data);
 	if (ret < 0) {
-		printf("rkss_read_patition_tables fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_read_patition_tables fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -768,14 +768,14 @@ static int rkss_get_dirs_by_name(char *filename)
 
 			/* Full Matching*/
 			ret = memcmp(p->name, filename, strlen(filename));
-			debug("comparing [fd:%d] : %s ?= %s , ret:%d\n",
+			debug("TEEC: comparing [fd:%d] : %s ?= %s , ret:%d\n",
 					i*RKSS_EACH_FILEFOLDER_COUNT+n, p->name, filename, ret);
 			if (!ret && strlen(p->name) > strlen(filename)) {
 				chk = p->name + strlen(filename);
 				if (*chk == '/') {
 					file = p->name + strlen(filename) + 1;
 					subdir = strtok(file, "/");
-					debug("found: %s\n", subdir);
+					debug("TEEC: found: %s\n", subdir);
 					strcpy(dir_cache[dir_num], subdir);
 					++dir_num;
 				}
@@ -797,7 +797,7 @@ static int rkss_get_empty_section_from_usedflags(int section_size)
 	rkss.index = RKSS_USEDFLAGS_INDEX;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_multi_sections fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_read_multi_sections fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -814,7 +814,7 @@ static int rkss_get_empty_section_from_usedflags(int section_size)
 		}
 	}
 
-	printf("Not enough space available in secure storage !\n");
+	printf("TEEC: Not enough space available in secure storage !\n");
 	return TEEC_ERROR_GENERIC;
 }
 
@@ -825,14 +825,14 @@ static int rkss_incref_multi_usedflags_sections(unsigned int index, unsigned int
 	uint8_t *flag;
 
 	if ((index + num) >= RKSS_DATA_SECTION_COUNT) {
-		printf("index[%d] out of range.\n", index);
+		printf("TEEC: index[%d] out of range.\n", index);
 		return TEEC_ERROR_GENERIC;
 	}
 
 	rkss.index = RKSS_USEDFLAGS_INDEX;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_multi_sections fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_read_multi_sections fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -840,7 +840,7 @@ static int rkss_incref_multi_usedflags_sections(unsigned int index, unsigned int
 		flag = (uint8_t *)rkss.data + (int)index/2;
 		value = index & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
 		if (++value > 0xF) {
-			printf("reference out of data: %d\n", value);
+			printf("TEEC: reference out of data: %d\n", value);
 			value = 0xF;
 		}
 		*flag = index & 0x1 ? (*flag & 0xF0) | (value & 0x0F) :
@@ -848,7 +848,7 @@ static int rkss_incref_multi_usedflags_sections(unsigned int index, unsigned int
 	}
 	ret = rkss_write_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_write_multi_sections fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_write_multi_sections fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 	return TEEC_SUCCESS;
@@ -861,21 +861,21 @@ static int rkss_decref_multi_usedflags_sections(unsigned int index, unsigned int
 	uint8_t *flag;
 
 	if ((index + num) >= RKSS_DATA_SECTION_COUNT) {
-		printf("index[%d] out of range.\n", index);
+		printf("TEEC: index[%d] out of range.\n", index);
 		return TEEC_ERROR_GENERIC;
 	}
 
 	rkss.index = RKSS_USEDFLAGS_INDEX;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_multi_sections fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_read_multi_sections fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 	for (i = 0; i < num; i++, index++) {
 		flag = (uint8_t *)rkss.data + (int)index/2;
 		value = index & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
 		if (--value < 0) {
-			printf("reference out of data: %d\n", value);
+			printf("TEEC: reference out of data: %d\n", value);
 			value = 0x0;
 		}
 		*flag = index & 0x1 ? (*flag & 0xF0) | (value & 0x0F) :
@@ -883,7 +883,7 @@ static int rkss_decref_multi_usedflags_sections(unsigned int index, unsigned int
 	}
 	ret = rkss_write_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_write_multi_sections fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_write_multi_sections fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 	return TEEC_SUCCESS;
@@ -899,13 +899,13 @@ static int rkss_write_empty_ptable(struct rkss_file_info *pfileinfo)
 
 	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
-		printf("malloc table_data fail\n");
+		printf("TEEC: malloc table_data fail\n");
 		return TEEC_ERROR_GENERIC;
 	}
 
 	ret = rkss_read_patition_tables(table_data);
 	if (ret < 0) {
-		printf("rkss_read_patition_tables fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_read_patition_tables fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -917,16 +917,16 @@ static int rkss_write_empty_ptable(struct rkss_file_info *pfileinfo)
 			p = (struct rkss_file_info *)pdata;
 			p += n;
 			if (p->used == 0) {
-				debug("write ptable in [%d][%d] .\n", i, n);
+				debug("TEEC: write ptable in [%d][%d] .\n", i, n);
 				memcpy(p, pfileinfo, sizeof(struct rkss_file_info));
 				p->used = 1;
 				p->id = n;
-				debug("write emt ptable : [%d,%d] name:%s, index:%d,\n",
+				debug("TEEC: write emt ptable : [%d,%d] name:%s, index:%d,\n",
 					i, n, p->name, p->index);
-				debug("size:%d, used:%d\n",  p->size, p->used);
+				debug("TEEC: size:%d, used:%d\n",  p->size, p->used);
 				ret = rkss_write_multi_sections(rkss.data, rkss.index, 1);
 				if (ret < 0) {
-					printf("rkss_write_multi_sections fail ! ret: %d.\n", ret);
+					printf("TEEC: rkss_write_multi_sections fail ! ret: %d.\n", ret);
 					free(table_data);
 					return TEEC_ERROR_GENERIC;
 				}
@@ -936,7 +936,7 @@ static int rkss_write_empty_ptable(struct rkss_file_info *pfileinfo)
 			}
 		}
 	}
-	debug("No enough ptable space available in secure storage.\n");
+	debug("TEEC: No enough ptable space available in secure storage.\n");
 	free(table_data);
 	return TEEC_ERROR_GENERIC;
 }
@@ -953,7 +953,7 @@ static int rkss_write_back_ptable(int fd, struct rkss_file_info *pfileinfo)
 	rkss.index = i;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_multi_sections fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_read_multi_sections fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -962,12 +962,12 @@ static int rkss_write_back_ptable(int fd, struct rkss_file_info *pfileinfo)
 	p += n;
 
 	memcpy(p, pfileinfo, sizeof(struct rkss_file_info));
-	debug("write ptable : [%d,%d] name:%s, index:%d, size:%d, used:%d\n",
+	debug("TEEC: write ptable : [%d,%d] name:%s, index:%d, size:%d, used:%d\n",
 			i, n, p->name, p->index, p->size, p->used);
 
 	ret = rkss_write_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_write_multi_sections fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_write_multi_sections fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 #ifdef DEBUG_RKFSS
@@ -984,7 +984,7 @@ static uint32_t ree_fs_new_open(size_t num_params,
 	int fd;
 	struct rkss_file_info p = {0};
 
-	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
+	debug("TEEC: params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
 
 	filename = (char *)(size_t)params[1].u.memref.shm_id;
@@ -992,18 +992,18 @@ static uint32_t ree_fs_new_open(size_t num_params,
 		return TEEC_ERROR_BAD_PARAMETERS;
 
 	if (strlen(filename) > RKSS_NAME_MAX_LENGTH) {
-		printf("ree_fs_new_open: file name too long. %s\n", filename);
+		printf("TEEC: ree_fs_new_open: file name too long. %s\n", filename);
 		return TEEC_ERROR_BAD_PARAMETERS;
 	}
 
-	debug("ree_fs_new_open open file: %s, len: %zu\n", filename, strlen(filename));
+	debug("TEEC: ree_fs_new_open open file: %s, len: %zu\n", filename, strlen(filename));
 	fd = rkss_get_fileinfo_by_name(filename, &p);
 	if (fd < 0) {
-		debug("ree_fs_new_open : no such file. %s\n", filename);
+		debug("TEEC: ree_fs_new_open : no such file. %s\n", filename);
 		return TEEC_ERROR_ITEM_NOT_FOUND;
 	}
 
-	debug("ree_fs_new_open! %s, fd: %d\n", filename, fd);
+	debug("TEEC: ree_fs_new_open! %s, fd: %d\n", filename, fd);
 
 	params[2].u.value.a = fd;
 	return TEEC_SUCCESS;
@@ -1021,30 +1021,30 @@ static TEEC_Result ree_fs_new_create(size_t num_params,
 	 */
 	ret = rkss_begin_commit();
 	if (ret < 0) {
-		printf("rkss_begin_commit failed!");
+		printf("TEEC: rkss_begin_commit failed!");
 		return -1;
 	}
 
 	filename = (char *)(size_t)params[1].u.memref.shm_id;
-	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
+	debug("TEEC: params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
 	if (!filename)
 		return TEEC_ERROR_BAD_PARAMETERS;
 
 	if (strlen(filename) > RKSS_NAME_MAX_LENGTH) {
-		printf("ree_fs_new_create: file name too long. %s\n", filename);
+		printf("TEEC: ree_fs_new_create: file name too long. %s\n", filename);
 		return TEEC_ERROR_BAD_PARAMETERS;
 	}
 
-	debug("ree_fs_new_create create file: %s, len: %zu\n", filename, strlen(filename));
+	debug("TEEC: ree_fs_new_create create file: %s, len: %zu\n", filename, strlen(filename));
 	fd = rkss_get_fileinfo_by_name(filename, &p);
 	if (fd >= 0) {
-		debug("ree_fs_new_create : file exist, clear it. %s\n", filename);
+		debug("TEEC: ree_fs_new_create : file exist, clear it. %s\n", filename);
 		/* decrease ref from usedflags */
 		num = p.size / RKSS_DATA_LEN + 1;
 		ret = rkss_decref_multi_usedflags_sections(p.index, num);
 		if (ret < 0) {
-			printf("rkss_decref_multi_usedflags_sections error !\n");
+			printf("TEEC: rkss_decref_multi_usedflags_sections error !\n");
 			return TEEC_ERROR_GENERIC;
 		}
 
@@ -1052,12 +1052,12 @@ static TEEC_Result ree_fs_new_create(size_t num_params,
 		memset(&p, 0, sizeof(struct rkss_file_info));
 		ret = rkss_write_back_ptable(fd, &p);
 		if (ret < 0) {
-			printf("ree_fs_new_create : write back error %d\n", ret);
+			printf("TEEC: ree_fs_new_create : write back error %d\n", ret);
 			return TEEC_ERROR_GENERIC;
 		}
 	}
 
-	debug("ree_fs_new_create create new file: %s\n", filename);
+	debug("TEEC: ree_fs_new_create create new file: %s\n", filename);
 	strcpy(p.name, filename);
 	p.index = 0;
 	p.size = 0;
@@ -1065,17 +1065,17 @@ static TEEC_Result ree_fs_new_create(size_t num_params,
 	p.flags = RK_FS_R | RK_FS_W;
 	fd = rkss_write_empty_ptable(&p);
 	if (fd < 0) {
-		printf("ree_fs_new_create : write empty ptable error. %s\n", filename);
+		printf("TEEC: ree_fs_new_create : write empty ptable error. %s\n", filename);
 		return TEEC_ERROR_GENERIC;
 	}
 
-	debug("ree_fs_new_create ! %s, fd: %d.\n", filename, fd);
+	debug("TEEC: ree_fs_new_create ! %s, fd: %d.\n", filename, fd);
 
 	params[2].u.value.a = fd;
 
 	ret = rkss_finish_commit();
 	if (ret < 0) {
-		printf("rkss_finish_commit failed!");
+		printf("TEEC: rkss_finish_commit failed!");
 		return -1;
 	}
 	return TEEC_SUCCESS;
@@ -1084,7 +1084,7 @@ static TEEC_Result ree_fs_new_create(size_t num_params,
 static TEEC_Result ree_fs_new_close(size_t num_params,
 				    struct tee_ioctl_param *params)
 {
-	debug("ree_fs_new_close !\n");
+	debug("TEEC: ree_fs_new_close !\n");
 	UNREFERENCED_PARAMETER(params);
 	UNREFERENCED_PARAMETER(num_params);
 	return TEEC_SUCCESS;
@@ -1106,18 +1106,18 @@ static TEEC_Result ree_fs_new_read(size_t num_params,
 	offs = params[0].u.value.c;
 
 	data = (uint8_t *)(size_t)params[1].u.memref.shm_id;
-	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
+	debug("TEEC: params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
 
 	if (!data)
 		return TEEC_ERROR_BAD_PARAMETERS;
 	len = params[1].u.memref.size;
 
-	debug("ree_fs_new_read! fd:%d, len:%zu, offs:%ld\n", fd, len, offs);
+	debug("TEEC: ree_fs_new_read! fd:%d, len:%zu, offs:%ld\n", fd, len, offs);
 
 	ret = rkss_get_fileinfo_by_index(fd, &p);
 	if (ret < 0) {
-		debug("unavailable fd: %d!\n", fd);
+		debug("TEEC: unavailable fd: %d!\n", fd);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -1128,7 +1128,7 @@ static TEEC_Result ree_fs_new_read(size_t num_params,
 	temp_file_data = malloc(section_num * RKSS_DATA_LEN);
 	ret = rkss_read_multi_sections(temp_file_data, p.index, section_num);
 	if (ret < 0) {
-		printf("unavailable file index!\n");
+		printf("TEEC: unavailable file index!\n");
 		free(temp_file_data);
 		return TEEC_ERROR_GENERIC;
 	}
@@ -1154,7 +1154,7 @@ static TEEC_Result ree_fs_new_write(size_t num_params,
 
 	ret = rkss_begin_commit();
 	if (ret < 0) {
-		printf("rkss_begin_commit failed!");
+		printf("TEEC: rkss_begin_commit failed!");
 		return -1;
 	}
 
@@ -1162,17 +1162,17 @@ static TEEC_Result ree_fs_new_write(size_t num_params,
 	offs = params[0].u.value.c;
 
 	data = (uint8_t *)(size_t)params[1].u.memref.shm_id;
-	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
+	debug("TEEC: params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
 	if (!data)
 		return TEEC_ERROR_BAD_PARAMETERS;
 	len = params[1].u.memref.size;
 
-	debug("ree_fs_new_write ! fd:%d, len:%zu, offs:%ld \n", fd, len, offs);
+	debug("TEEC: ree_fs_new_write ! fd:%d, len:%zu, offs:%ld \n", fd, len, offs);
 
 	ret = rkss_get_fileinfo_by_index(fd, &p);
 	if (ret < 0) {
-		printf("ree_fs_new_write: fd:%d unvailable!\n", fd);
+		printf("TEEC: ree_fs_new_write: fd:%d unvailable!\n", fd);
 		return TEEC_ERROR_BAD_PARAMETERS;
 	}
 
@@ -1187,7 +1187,7 @@ static TEEC_Result ree_fs_new_write(size_t num_params,
 		temp_file_data = malloc(section_num * RKSS_DATA_LEN);
 		ret = rkss_read_multi_sections(temp_file_data, p.index, section_num);
 		if (ret < 0) {
-			printf("unavailable file index %d section_num %d\n", p.index, section_num);
+			printf("TEEC: unavailable file index %d section_num %d\n", p.index, section_num);
 			ret = TEEC_ERROR_GENERIC;
 			goto out;
 		}
@@ -1196,7 +1196,7 @@ static TEEC_Result ree_fs_new_write(size_t num_params,
 		temp_file_data = 0;
 		ret = rkss_decref_multi_usedflags_sections(p.index, section_num);
 		if (ret < 0) {
-			printf("rkss_decref_multi_usedflags_sections error !\n");
+			printf("TEEC: rkss_decref_multi_usedflags_sections error !\n");
 			ret = TEEC_ERROR_GENERIC;
 			goto out;
 		}
@@ -1207,18 +1207,18 @@ static TEEC_Result ree_fs_new_write(size_t num_params,
 	p.size = new_size;
 	section_num = new_size / RKSS_DATA_LEN + 1;
 	p.index = rkss_get_empty_section_from_usedflags(section_num);
-	debug("Get Empty section in %d\n", p.index);
+	debug("TEEC: Get Empty section in %d\n", p.index);
 	p.used = 1;
 	ret = rkss_incref_multi_usedflags_sections(p.index, section_num);
 	if (ret < 0) {
-		printf("rkss_incref_multi_usedflags_sections error !\n");
+		printf("TEEC: rkss_incref_multi_usedflags_sections error !\n");
 		ret = TEEC_ERROR_GENERIC;
 		goto out;
 	}
 
 	ret = rkss_write_back_ptable(fd, &p);
 	if (ret < 0) {
-		printf("ree_fs_new_write: write ptable error!\n");
+		printf("TEEC: ree_fs_new_write: write ptable error!\n");
 		ret = TEEC_ERROR_GENERIC;
 		goto out;
 	}
@@ -1244,7 +1244,7 @@ out:
 	}
 	ret = rkss_finish_commit();
 	if (ret < 0) {
-		printf("rkss_finish_commit failed!");
+		printf("TEEC: rkss_finish_commit failed!");
 		return -1;
 	}
 
@@ -1262,40 +1262,40 @@ static TEEC_Result ree_fs_new_truncate(size_t num_params,
 
 	ret = rkss_begin_commit();
 	if (ret < 0) {
-		printf("rkss_begin_commit failed!");
+		printf("TEEC: rkss_begin_commit failed!");
 		return -1;
 	}
 
 	fd = params[0].u.value.b;
 	len = params[0].u.value.c;
 
-	debug("ree_fs_new_truncate: fd:%d, lenth:%zu\n", fd, len);
+	debug("TEEC: ree_fs_new_truncate: fd:%d, lenth:%zu\n", fd, len);
 
 	ret = rkss_get_fileinfo_by_index(fd, &p);
 	if (ret < 0) {
-		printf("fd:%d unvailable!\n", fd);
+		printf("TEEC: fd:%d unvailable!\n", fd);
 		return TEEC_ERROR_GENERIC;
 	}
 	if (len > p.size) {
-		printf("truncate error!\n");
+		printf("TEEC: truncate error!\n");
 		return TEEC_ERROR_GENERIC;
 	}
 	section_num_old = p.size / RKSS_DATA_LEN + 1;
 	section_num_new = len / RKSS_DATA_LEN + 1;
 	ret = rkss_decref_multi_usedflags_sections(p.index + section_num_new, section_num_old - section_num_new);
 	if (ret < 0) {
-		printf("rkss_decref_multi_usedflags_sections error !\n");
+		printf("TEEC: rkss_decref_multi_usedflags_sections error !\n");
 		ret = TEEC_ERROR_GENERIC;
 	}
 	p.size = len;
 	ret = rkss_write_back_ptable(fd, &p);
 	if (ret < 0) {
-		printf("ree_fs_new_truncate: write ptable error!\n");
+		printf("TEEC: ree_fs_new_truncate: write ptable error!\n");
 		return TEEC_ERROR_GENERIC;
 	}
 	ret = rkss_finish_commit();
 	if (ret < 0) {
-		printf("rkss_finish_commit failed!");
+		printf("TEEC: rkss_finish_commit failed!");
 		return -1;
 	}
 
@@ -1311,11 +1311,11 @@ static TEEC_Result ree_fs_new_remove(size_t num_params,
 
 	ret = rkss_begin_commit();
 	if (ret < 0) {
-		printf("rkss_begin_commit failed!");
+		printf("TEEC: rkss_begin_commit failed!");
 		return -1;
 	}
 
-	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
+	debug("TEEC: params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
 
 	filename = (char *)(size_t)params[1].u.memref.shm_id;
@@ -1324,18 +1324,18 @@ static TEEC_Result ree_fs_new_remove(size_t num_params,
 
 	ret = rkss_get_fileinfo_by_name(filename, &p);
 	if (ret < 0) {
-		printf("ree_fs_new_remove: no such file. %s\n", filename);
+		printf("TEEC: ree_fs_new_remove: no such file. %s\n", filename);
 		return 0;
 	}
 	fd = ret;
 
-	debug("ree_fs_new_remove! %s fd:%d index:%d size:%d\n", filename, fd, p.index, p.size);
+	debug("TEEC: ree_fs_new_remove! %s fd:%d index:%d size:%d\n", filename, fd, p.index, p.size);
 
 	/* decrease ref from usedflags */
 	num = p.size / RKSS_DATA_LEN + 1;
 	ret = rkss_decref_multi_usedflags_sections(p.index, num);
 	if (ret < 0) {
-		printf("rkss_decref_multi_usedflags_sections error !\n");
+		printf("TEEC: rkss_decref_multi_usedflags_sections error !\n");
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -1343,7 +1343,7 @@ static TEEC_Result ree_fs_new_remove(size_t num_params,
 	memset(&p, 0, sizeof(struct rkss_file_info));
 	ret = rkss_write_back_ptable(fd, &p);
 	if (ret < 0) {
-		printf("ree_fs_new_remove: write back error %d\n", ret);
+		printf("TEEC: ree_fs_new_remove: write back error %d\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -1353,7 +1353,7 @@ static TEEC_Result ree_fs_new_remove(size_t num_params,
 #endif
 	ret = rkss_finish_commit();
 	if (ret < 0) {
-		printf("rkss_finish_commit failed!");
+		printf("TEEC: rkss_finish_commit failed!");
 		return -1;
 	}
 
@@ -1370,32 +1370,32 @@ static TEEC_Result ree_fs_new_rename(size_t num_params,
 
 	ret = rkss_begin_commit();
 	if (ret < 0) {
-		printf("rkss_begin_commit failed!");
+		printf("TEEC: rkss_begin_commit failed!");
 		return -1;
 	}
 
 	old_fname = (char *)(size_t)params[1].u.memref.shm_id;
-	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
+	debug("TEEC: params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
 	if (!old_fname)
 		return TEEC_ERROR_BAD_PARAMETERS;
 
 	new_fname = (char *)(size_t)params[2].u.memref.shm_id;
-	debug("params[2].u.memref.shm_id = 0x%llx params[2].u.memref.shm_offs = 0x%llx\n",
+	debug("TEEC: params[2].u.memref.shm_id = 0x%llx params[2].u.memref.shm_offs = 0x%llx\n",
 		params[2].u.memref.shm_id, params[2].u.memref.shm_offs);
 	if (!new_fname)
 		return TEEC_ERROR_BAD_PARAMETERS;
 
 	if (strlen(new_fname) > RKSS_NAME_MAX_LENGTH) {
-		printf("new file name too long. %s\n", new_fname);
+		printf("TEEC: new file name too long. %s\n", new_fname);
 		return TEEC_ERROR_BAD_PARAMETERS;
 	}
 
-	debug("rename: %s -> %s\n", old_fname, new_fname);
+	debug("TEEC: rename: %s -> %s\n", old_fname, new_fname);
 
 	ret = rkss_get_fileinfo_by_name(old_fname, &p);
 	if (ret < 0) {
-		printf("filename: %s no found.\n", old_fname);
+		printf("TEEC: filename: %s no found.\n", old_fname);
 		return TEEC_ERROR_ITEM_NOT_FOUND;
 	}
 
@@ -1403,12 +1403,12 @@ static TEEC_Result ree_fs_new_rename(size_t num_params,
 
 	ret = rkss_write_back_ptable(ret, &p);
 	if (ret < 0) {
-		printf("write ptable error!\n");
+		printf("TEEC: write ptable error!\n");
 		return TEEC_ERROR_GENERIC;
 	}
 	ret = rkss_finish_commit();
 	if (ret < 0) {
-		printf("rkss_finish_commit failed!");
+		printf("TEEC: rkss_finish_commit failed!");
 		return -1;
 	}
 
@@ -1421,7 +1421,7 @@ static TEEC_Result ree_fs_new_opendir(size_t num_params,
 	char *dirname;
 	int ret;
 
-	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
+	debug("TEEC: params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
 
 	dirname = (char *)(size_t)params[1].u.memref.shm_id;
@@ -1431,11 +1431,11 @@ static TEEC_Result ree_fs_new_opendir(size_t num_params,
 	dir_seek = 0;
 	ret = rkss_get_dirs_by_name(dirname);
 	if (ret < 0) {
-		printf("ree_fs_new_opendir: error\n");
+		printf("TEEC: ree_fs_new_opendir: error\n");
 		return TEEC_ERROR_GENERIC;
 	}
 
-	debug("ree_fs_new_opendir: %s, seek/num:%d/%d\n", dirname, dir_seek, dir_num);
+	debug("TEEC: ree_fs_new_opendir: %s, seek/num:%d/%d\n", dirname, dir_seek, dir_num);
 	return TEEC_SUCCESS;
 }
 
@@ -1461,13 +1461,13 @@ static TEEC_Result ree_fs_new_readdir(size_t num_params,
 	size_t dirname_len;
 
 	dirname = (char *)(size_t)params[1].u.memref.shm_id;
-	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
+	debug("TEEC: params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
 	if (!dirname)
 		return TEEC_ERROR_BAD_PARAMETERS;
 	len = params[1].u.memref.size;
 
-	debug("seek/num:%d/%d\n", dir_seek, dir_num);
+	debug("TEEC: seek/num:%d/%d\n", dir_seek, dir_num);
 	if (dir_seek == dir_num) {
 		params[1].u.memref.size = 0;
 		debug("ree_fs_new_readdir: END \n");
@@ -1482,7 +1482,7 @@ static TEEC_Result ree_fs_new_readdir(size_t num_params,
 	strcpy(dirname, dir_cache[dir_seek]);
 	++dir_seek;
 
-	debug("ree_fs_new_readdir: %s\n", dirname);
+	debug("TEEC: ree_fs_new_readdir: %s\n", dirname);
 
 	return TEEC_SUCCESS;
 }
@@ -1512,23 +1512,23 @@ int tee_supp_rk_fs_init(void)
 		memset(rkss.data, 0, RKSS_DATA_LEN);
 		rkss.index = i;
 		rkss_write_multi_sections(rkss.data, rkss.index, 1);
-		printf("cleaned [%d]", i);
+		printf("TEEC: cleaned [%d]", i);
 	}
 #endif
 	ret = rkss_begin_commit();
 	if (ret < 0) {
-		printf("rkss_begin_commit failed!");
+		printf("TEEC: rkss_begin_commit failed!");
 		return TEEC_ERROR_GENERIC;
 	}
 
 	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
-		printf("malloc table_data fail\n");
+		printf("TEEC: malloc table_data fail\n");
 		return TEEC_ERROR_GENERIC;
 	}
 	ret = rkss_read_patition_tables(table_data);
 	if (ret < 0) {
-		printf("rkss_read_patition_tables fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_read_patition_tables fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -1541,12 +1541,12 @@ int tee_supp_rk_fs_init(void)
 	rkss.index = RKSS_USEDFLAGS_INDEX;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_multi_sections fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_read_multi_sections fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 	ret = rkss_verify_usedflags(&rkss);
 	if (ret < 0) {
-		printf("rkss_verify_usedflags fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_verify_usedflags fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -1557,7 +1557,7 @@ int tee_supp_rk_fs_init(void)
 
 	ret = rkss_finish_commit();
 	if (ret < 0) {
-		printf("rkss_finish_commit failed!");
+		printf("TEEC: rkss_finish_commit failed!");
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -1566,7 +1566,7 @@ int tee_supp_rk_fs_init(void)
 
 int OpteeClientRkFsInit(void)
 {
-	debug(" OpteeClientRkFsInit\n");
+	debug("TEEC: OpteeClientRkFsInit\n");
 	return tee_supp_rk_fs_init();
 }
 bool tee_supp_param_is_value(struct tee_ioctl_param *param)
diff --git a/lib/optee_clientApi/OpteeClientRkFs.c b/lib/optee_clientApi/OpteeClientRkFs.c
index 68c59554e8..90d547622f 100644
--- a/lib/optee_clientApi/OpteeClientRkFs.c
+++ b/lib/optee_clientApi/OpteeClientRkFs.c
@@ -192,7 +192,7 @@ int check_security_exist(int print_flag)
 	if (!dev_desc) {
 		dev_desc = rockchip_get_bootdev();
 		if (!dev_desc) {
-			printf("%s: Could not find device\n", __func__);
+			printf("TEEC: %s: Could not find device\n", __func__);
 			return -1;
 		}
 
@@ -200,7 +200,7 @@ int check_security_exist(int print_flag)
 					  "security", &part_info) < 0) {
 			dev_desc = NULL;
 			if (print_flag != 0)
-				printf("Could not find security partition\n");
+				printf("TEEC: Could not find security partition\n");
 			return -1;
 		}
 	}
@@ -233,7 +233,7 @@ static int rkss_begin_commit(void)
 	if (check_security_exist(1) < 0)
 		return -1;
 
-	debug("%s\n", __func__);
+	debug("TEEC: %s\n", __func__);
 	p.backup_version = RKSS_BACKUP_VERSION;
 	p.backup_enable = RKSS_BACKUP_ENABLE;
 	p.backup_count = 0;
@@ -243,7 +243,7 @@ static int rkss_begin_commit(void)
 
 	ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
-		printf("blk_dwrite fail\n");
+		printf("TEEC: blk_dwrite fail\n");
 		return -1;
 	}
 	return 0;
@@ -257,12 +257,12 @@ static int rkss_finish_commit(void)
 	if (check_security_exist(1) < 0)
 		return -1;
 
-	debug("%s\n", __func__);
+	debug("TEEC: %s\n", __func__);
 	memset(data, 0, sizeof(data));
 
 	ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
-		printf("blk_dwrite fail\n");
+		printf("TEEC: blk_dwrite fail\n");
 		return -1;
 	}
 	return 0;
@@ -281,7 +281,7 @@ static int rkss_backup_sections(unsigned long index, unsigned int num)
 
 	ret = blk_dread(dev_desc, RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
-		printf("blk_dread fail\n");
+		printf("TEEC: blk_dread fail\n");
 		return -1;
 	}
 
@@ -306,28 +306,28 @@ static int rkss_backup_sections(unsigned long index, unsigned int num)
 		}
 		if ((info_current.backup_data_index + info_current.backup_num) >
 			(RKSS_BACKUP_INDEX + RKSS_BACKUP_COUNT)) {
-			printf("Not enough backup sections!");
+			printf("TEEC: Not enough backup sections!");
 			goto error;
 		}
-		debug("%s index=0x%lx num=0x%x backup_data_index=0x%x\n",
+		debug("TEEC: %s index=0x%lx num=0x%x backup_data_index=0x%x\n",
 		      __func__, index, num, info_current.backup_data_index);
 
 		backup_data = malloc(num * RKSS_DATA_LEN);
 		if (!backup_data) {
-			printf("malloc backup_data fail\n");
+			printf("TEEC: malloc backup_data fail\n");
 			goto error;
 		}
 
 		ret = blk_dread(dev_desc, index, num, backup_data);
 		if (ret != num) {
-			printf("blk_dread fail\n");
+			printf("TEEC: blk_dread fail\n");
 			return -1;
 		}
 
 		ret = blk_dwrite(dev_desc, info_current.backup_data_index,
 				 num, backup_data);
 		if (ret != num) {
-			printf("blk_dwrite fail\n");
+			printf("TEEC: blk_dwrite fail\n");
 			return -1;
 		}
 		free(backup_data);
@@ -342,7 +342,7 @@ static int rkss_backup_sections(unsigned long index, unsigned int num)
 
 		ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
 		if (ret != 1) {
-			printf("blk_dwrite fail\n");
+			printf("TEEC: blk_dwrite fail\n");
 			return -1;
 		}
 	}
@@ -368,7 +368,7 @@ static int rkss_resume(void)
 
 	ret = blk_dread(dev_desc, RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
-		printf("blk_dread fail\n");
+		printf("TEEC: blk_dread fail\n");
 		return -1;
 	}
 
@@ -381,7 +381,7 @@ static int rkss_resume(void)
 
 			if (info_current.backup_usedflag ==
 			    RKSS_BACKUP_USEDFLAG) {
-				debug("rkss_resume backup_index=0x%x \
+				debug("TEEC: rkss_resume backup_index=0x%x \
 				      backup_num=0x%x \
 				      info_current.backup_data_index=0x%x\n",
 				      info_current.backup_index,
@@ -390,19 +390,19 @@ static int rkss_resume(void)
 				if ((info_current.backup_data_index +
 				     info_current.backup_num) >
 				    (RKSS_BACKUP_INDEX + RKSS_BACKUP_COUNT)) {
-					printf("backup sections error!");
+					printf("TEEC: backup sections error!");
 					goto error;
 				}
 				if ((info_current.backup_index +
 				     info_current.backup_num) >
 				    RKSS_DATA_SECTION_COUNT) {
-					printf("original sections error!");
+					printf("TEEC: original sections error!");
 					goto error;
 				}
 				backup_data = malloc(info_current.backup_num *
 						     RKSS_DATA_LEN);
 				if (!backup_data) {
-					printf("malloc backup_data fail\n");
+					printf("TEEC: malloc backup_data fail\n");
 					goto error;
 				}
 
@@ -411,7 +411,7 @@ static int rkss_resume(void)
 						info_current.backup_num,
 						backup_data);
 				if (ret != info_current.backup_num) {
-					printf("blk_dread fail\n");
+					printf("TEEC: blk_dread fail\n");
 					return -1;
 				}
 
@@ -420,7 +420,7 @@ static int rkss_resume(void)
 						 info_current.backup_num,
 						 backup_data);
 				if (ret != info_current.backup_num) {
-					printf("blk_dwrite fail\n");
+					printf("TEEC: blk_dwrite fail\n");
 					return -1;
 				}
 				free(backup_data);
@@ -431,7 +431,7 @@ static int rkss_resume(void)
 	memset(data, 0, sizeof(data));
 	ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
-		printf("blk_dwrite fail\n");
+		printf("TEEC: blk_dwrite fail\n");
 		return -1;
 	}
 	return 0;
@@ -450,7 +450,7 @@ static int rkss_read_multi_sections(unsigned char *data, unsigned long index, un
 
 	ret = blk_dread(dev_desc, part_info.start + index, num, data);
 	if (ret != num) {
-		printf("blk_dread fail\n");
+		printf("TEEC: blk_dread fail\n");
 		return -1;
 	}
 	return 0;
@@ -468,7 +468,7 @@ static int rkss_write_multi_sections(unsigned char *data, unsigned long index, u
 
 	result = rkss_backup_sections(index, num);
 	if (result < 0) {
-		printf("rkss_backup_sections fail\n");
+		printf("TEEC: rkss_backup_sections fail\n");
 		return -1;
 	}
 
@@ -477,7 +477,7 @@ static int rkss_write_multi_sections(unsigned char *data, unsigned long index, u
 
 	ret = blk_dwrite(dev_desc, part_info.start + index, num, data);
 	if (ret != num) {
-		printf("blk_dwrite fail\n");
+		printf("TEEC: blk_dwrite fail\n");
 		return -1;
 	}
 	return 0;
@@ -497,7 +497,7 @@ static int rkss_read_patition_tables(unsigned char *data)
 
 	ret = blk_dread(dev_desc, part_info.start, RKSS_PARTITION_TABLE_COUNT, data);
 	if (ret != RKSS_PARTITION_TABLE_COUNT) {
-		printf("blk_dread fail\n");
+		printf("TEEC: blk_dread fail\n");
 		return -1;
 	}
 	return 0;
@@ -525,12 +525,12 @@ static void rkss_dump_ptable(void)
 
 	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
-		printf("malloc table_data fail\n");
+		printf("TEEC: malloc table_data fail\n");
 		return;
 	}
 	ret = rkss_read_patition_tables(table_data);
 	if (ret < 0) {
-		printf("rkss_read_patition_tables fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_read_patition_tables fail ! ret: %d.\n", ret);
 		free(table_data);
 		return;
 	}
@@ -564,7 +564,7 @@ static void rkss_dump_usedflags(void)
 	int ret = rkss_read_section(&rkss);
 	if (ret < 0)
 	{
-		printf("rkss_read_section fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_read_section fail ! ret: %d.\n", ret);
 		return;
 	}
 	rkss_dump(rkss.data, RKSS_DATA_LEN);
@@ -584,7 +584,7 @@ static int rkss_verify_ptable(unsigned char *table_data)
 
 		if (verify->version != RKSS_VERSION
 				|| verify->checkstr != RKSS_CHECK_STR) {
-			printf("verify [%d] fail, cleanning ....", i);
+			printf("TEEC: verify [%d] fail, cleanning ....", i);
 			memset(cp, 0, RKSS_DATA_LEN);
 			verify->checkstr = RKSS_CHECK_STR;
 			verify->version = RKSS_VERSION;
@@ -594,11 +594,11 @@ static int rkss_verify_ptable(unsigned char *table_data)
 	if (write_table_flag == 1) {
 		ret = rkss_write_multi_sections(table_data, 0, RKSS_PARTITION_TABLE_COUNT);
 		if (ret < 0) {
-			printf("rkss_write_multi_sections failed!!! ret: %d.\n", ret);
+			printf("TEEC: rkss_write_multi_sections failed!!! ret: %d.\n", ret);
 			return -1;
 		}
 	}
-	debug("verify ptable success.\n");
+	debug("TEEC: verify ptable success.\n");
 	return 0;
 }
 
@@ -612,7 +612,7 @@ static int rkss_verify_usedflags(struct rk_secure_storage *rkss)
 		duel = *(flags + (int)i/2);
 		flag = i & 0x1 ? duel & 0x0F : (duel & 0xF0) >> 4;
 		if (flag != 0x1) {
-			debug("init usedflags section ...\n");
+			debug("TEEC: init usedflags section ...\n");
 			memset(rkss->data, 0x00, RKSS_DATA_LEN);
 			for (n = 0; n < RKSS_PARTITION_TABLE_COUNT + 1; n++) {
 				flagw = (uint8_t *)rkss->data + (int)n/2;
@@ -622,14 +622,14 @@ static int rkss_verify_usedflags(struct rk_secure_storage *rkss)
 			}
 			ret = rkss_write_multi_sections(rkss->data, rkss->index, 1);
 			if (ret < 0) {
-				printf("clean usedflags section failed!!! ret: %d.\n", ret);
+				printf("TEEC: clean usedflags section failed!!! ret: %d.\n", ret);
 				return -1;
 			}
 
 			return 0;
 		}
 	}
-	debug("rkss_verify_usedflags: sucess.\n");
+	debug("TEEC: rkss_verify_usedflags: sucess.\n");
 	return 0;
 }
 
@@ -645,7 +645,7 @@ static int rkss_get_fileinfo_by_index(int fd, struct rkss_file_info *pfileinfo)
 	rkss.index = i;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_multi_sections fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_read_multi_sections fail ! ret: %d.\n", ret);
 		return -1;
 	}
 
@@ -654,10 +654,10 @@ static int rkss_get_fileinfo_by_index(int fd, struct rkss_file_info *pfileinfo)
 	p += n;
 
 	if (p->used != 1) {
-		debug("error: unused section!\n");
+		debug("TEEC: error: unused section!\n");
 		return -1;
 	}
-	debug("rkss_get_fileinfo_by_index p->used = %d p->name=%s p->index=%d p->size=%d\n",
+	debug("TEEC: rkss_get_fileinfo_by_index p->used = %d p->name=%s p->index=%d p->size=%d\n",
 		p->used, p->name, p->index, p->size);
 	memcpy(pfileinfo, p, sizeof(struct rkss_file_info));
 
@@ -675,18 +675,18 @@ static int rkss_get_fileinfo_by_name(
 	len = strlen(filename);
 	if (len > RKSS_NAME_MAX_LENGTH - 1)
 	{
-		printf("filename is too long. length:%u\n", len);
+		printf("TEEC: filename is too long. length:%u\n", len);
 		return -1;
 	}
 
 	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
-		printf("malloc table_data fail\n");
+		printf("TEEC: malloc table_data fail\n");
 		return -1;
 	}
 	ret = rkss_read_patition_tables(table_data);
 	if (ret < 0) {
-		printf("rkss_read_patition_tables fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_read_patition_tables fail ! ret: %d.\n", ret);
 		free(table_data);
 		return -1;
 	}
@@ -708,7 +708,7 @@ static int rkss_get_fileinfo_by_name(
 
 			if (!strcmp(p->name, filename))
 			{
-				debug("rkss_get_fileinfo_by_name: hit table[%d/%d], index[%d/%d]\n",
+				debug("TEEC: rkss_get_fileinfo_by_name: hit table[%d/%d], index[%d/%d]\n",
 						i, RKSS_PARTITION_TABLE_COUNT, n, RKSS_EACH_FILEFOLDER_COUNT);
 				memcpy(pfileinfo, p, sizeof(struct rkss_file_info));
 				free(table_data);
@@ -739,14 +739,14 @@ static int rkss_get_fileinfo_by_name(
 
 			} while(cur_inpos && cur_svpos);
 
-			debug("Matched folder: %s\n", p->name);
+			debug("TEEC: Matched folder: %s\n", p->name);
 			free(table_data);
 			return -100;
 UNMATCHFOLDER:
-			debug("Unmatched ...");
+			debug("TEEC: Unmatched ...");
 		}
 	}
-	debug("rkss_get_fileinfo_by_name: file or dir no found!\n");
+	debug("TEEC: rkss_get_fileinfo_by_name: file or dir no found!\n");
 	free(table_data);
 	return -1;
 }
@@ -761,18 +761,18 @@ static int rkss_get_dirs_by_name(char* filename)
 	len = strlen(filename);
 	if (len > RKSS_NAME_MAX_LENGTH - 1)
 	{
-		printf("filename is too long. length:%u\n", len);
+		printf("TEEC: filename is too long. length:%u\n", len);
 		return -1;
 	}
 
 	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
-		printf("malloc table_data fail\n");
+		printf("TEEC: malloc table_data fail\n");
 		return -1;
 	}
 	ret = rkss_read_patition_tables(table_data);
 	if (ret < 0) {
-		printf("rkss_read_patition_tables fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_read_patition_tables fail ! ret: %d.\n", ret);
 		free(table_data);
 		return -1;
 	}
@@ -795,7 +795,7 @@ static int rkss_get_dirs_by_name(char* filename)
 
 			// Full Matching
 			ret = memcmp(p->name, filename, strlen(filename));
-			debug("comparing [fd:%d] : %s ?= %s , ret:%d\n",
+			debug("TEEC: comparing [fd:%d] : %s ?= %s , ret:%d\n",
 					i*RKSS_EACH_FILEFOLDER_COUNT+n, p->name, filename, ret);
 			if (!ret && strlen(p->name) > strlen(filename))
 			{
@@ -804,7 +804,7 @@ static int rkss_get_dirs_by_name(char* filename)
 				{
 					char *file = p->name + strlen(filename) + 1;
 					char *subdir = strtok(file, "/");
-					debug("found: %s", subdir);
+					debug("TEEC: found: %s\n", subdir);
 					strcpy(dir_cache[dir_num], subdir);
 					++dir_num;
 				}
@@ -822,7 +822,7 @@ static int rkss_get_empty_section_from_usedflags(int section_size)
 	int ret = rkss_read_section(&rkss);
 	if (ret < 0)
 	{
-		printf("rkss_read_section fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_read_section fail ! ret: %d.\n", ret);
 		return -1;
 	}
 
@@ -846,7 +846,7 @@ static int rkss_get_empty_section_from_usedflags(int section_size)
 		}
 	}
 
-	printf("Not enough space available in secure storage !\n");
+	printf("TEEC: Not enough space available in secure storage !\n");
 	return -10;
 }
 
@@ -857,14 +857,14 @@ static int rkss_incref_multi_usedflags_sections(unsigned int index, unsigned int
 	uint8_t *flag;
 
 	if ((index + num) >= RKSS_DATA_SECTION_COUNT) {
-		printf("index[%d] out of range.\n", index);
+		printf("TEEC: index[%d] out of range.\n", index);
 		return -1;
 	}
 
 	rkss.index = RKSS_USEDFLAGS_INDEX;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_multi_sections fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_read_multi_sections fail ! ret: %d.\n", ret);
 		return -1;
 	}
 
@@ -872,7 +872,7 @@ static int rkss_incref_multi_usedflags_sections(unsigned int index, unsigned int
 		flag = (uint8_t *)rkss.data + (int)index/2;
 		value = index & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
 		if (++value > 0xF) {
-			printf("reference out of data: %d\n", value);
+			printf("TEEC: reference out of data: %d\n", value);
 			value = 0xF;
 		}
 		*flag = index & 0x1 ? (*flag & 0xF0) | (value & 0x0F) :
@@ -880,7 +880,7 @@ static int rkss_incref_multi_usedflags_sections(unsigned int index, unsigned int
 	}
 	ret = rkss_write_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_write_multi_sections fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_write_multi_sections fail ! ret: %d.\n", ret);
 		return -1;
 	}
 	return 0;
@@ -893,21 +893,21 @@ static int rkss_decref_multi_usedflags_sections(unsigned int index, unsigned int
 	uint8_t *flag;
 
 	if ((index + num) >= RKSS_DATA_SECTION_COUNT) {
-		printf("index[%d] out of range.\n", index);
+		printf("TEEC: index[%d] out of range.\n", index);
 		return -1;
 	}
 
 	rkss.index = RKSS_USEDFLAGS_INDEX;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_multi_sections fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_read_multi_sections fail ! ret: %d.\n", ret);
 		return -1;
 	}
 	for (i = 0; i < num; i++, index++) {
 		flag = (uint8_t *)rkss.data + (int)index/2;
 		value = index & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
 		if (--value < 0) {
-			printf("reference out of data: %d\n", value);
+			printf("TEEC: reference out of data: %d\n", value);
 			value = 0x0;
 		}
 		*flag = index & 0x1 ? (*flag & 0xF0) | (value & 0x0F) :
@@ -915,7 +915,7 @@ static int rkss_decref_multi_usedflags_sections(unsigned int index, unsigned int
 	}
 	ret = rkss_write_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_write_multi_sections fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_write_multi_sections fail ! ret: %d.\n", ret);
 		return -1;
 	}
 	return 0;
@@ -928,13 +928,13 @@ static int rkss_write_empty_ptable(struct rkss_file_info *pfileinfo)
 
 	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
-		printf("malloc table_data fail\n");
+		printf("TEEC: malloc table_data fail\n");
 		return -1;
 	}
 
 	ret = rkss_read_patition_tables(table_data);
 	if (ret < 0) {
-		printf("rkss_read_patition_tables fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_read_patition_tables fail ! ret: %d.\n", ret);
 		free(table_data);
 		return -1;
 	}
@@ -953,16 +953,16 @@ static int rkss_write_empty_ptable(struct rkss_file_info *pfileinfo)
 			p += n;
 			if (p->used == 0)
 			{
-				debug("write ptable in [%d][%d] .\n", i, n);
+				debug("TEEC: write ptable in [%d][%d] .\n", i, n);
 				memcpy(p, pfileinfo, sizeof(struct rkss_file_info));
 				p->used = 1;
 				p->id = n;
-				debug("write emt ptable : [%d,%d] name:%s, index:%d, size:%d, used:%d\n",
+				debug("TEEC: write emt ptable : [%d,%d] name:%s, index:%d, size:%d, used:%d\n",
 						i,n,p->name,p->index,p->size,p->used);
 				ret = rkss_write_section(&rkss);
 				if (ret < 0)
 				{
-					printf("rkss_write_section fail ! ret: %d.\n", ret);
+					printf("TEEC: rkss_write_section fail ! ret: %d.\n", ret);
 					free(table_data);
 					return -1;
 				}
@@ -971,7 +971,7 @@ static int rkss_write_empty_ptable(struct rkss_file_info *pfileinfo)
 			}
 		}
 	}
-	printf("No enough ptable space available in secure storage.\n");
+	printf("TEEC: No enough ptable space available in secure storage.\n");
 	free(table_data);
 	return -1;
 }
@@ -986,7 +986,7 @@ static int rkss_write_back_ptable(int fd, struct rkss_file_info *pfileinfo)
 	int ret = rkss_read_section(&rkss);
 	if (ret < 0)
 	{
-		debug("rkss_read_section fail ! ret: %d.\n", ret);
+		debug("TEEC: rkss_read_section fail ! ret: %d.\n", ret);
 		return -1;
 	}
 
@@ -995,13 +995,13 @@ static int rkss_write_back_ptable(int fd, struct rkss_file_info *pfileinfo)
 	p += n;
 
 	memcpy(p, pfileinfo, sizeof(struct rkss_file_info));
-	debug("write ptable : [%d,%d] name:%s, index:%d, size:%d, used:%d\n",
+	debug("TEEC: write ptable : [%d,%d] name:%s, index:%d, size:%d, used:%d\n",
 			i,n,p->name,p->index,p->size,p->used);
 
 	ret = rkss_write_section(&rkss);
 	if (ret < 0)
 	{
-		debug("rkss_write_section fail ! ret: %d.\n", ret);
+		debug("TEEC: rkss_write_section fail ! ret: %d.\n", ret);
 		return -1;
 	}
 
@@ -1034,16 +1034,16 @@ static int tee_fs_open(struct tee_fs_rpc *fsrpc)
 
 	if (strlen(filename) > RKSS_NAME_MAX_LENGTH)
 	{
-		debug("tee_fs_open: file name too long. %s\n", filename);
+		debug("TEEC: tee_fs_open: file name too long. %s\n", filename);
 		return -1;
 	}
 
-	debug("tee_fs_open open file: %s, len: %zu\n", filename, strlen(filename));
+	debug("TEEC: tee_fs_open open file: %s, len: %zu\n", filename, strlen(filename));
 	struct rkss_file_info p = {0};
 	int ret = rkss_get_fileinfo_by_name(filename, &p);
 	if (ret < 0)
 	{
-		debug("tee_fs_open : no such file. %s\n", filename);
+		debug("TEEC: tee_fs_open : no such file. %s\n", filename);
 		make_newfile = 1;
 	}
 	else
@@ -1058,7 +1058,7 @@ static int tee_fs_open(struct tee_fs_rpc *fsrpc)
 
 	ret = rkss_begin_commit();
 	if (ret < 0) {
-		printf("rkss_begin_commit failed!");
+		printf("TEEC: rkss_begin_commit failed!");
 		return -1;
 	}
 
@@ -1066,7 +1066,7 @@ static int tee_fs_open(struct tee_fs_rpc *fsrpc)
 	{
 		if (CHECKFLAG(fsrpc->flags, TEE_FS_O_CREAT))
 		{
-			debug("tee_fs_open create new file: %s\n", filename);
+			debug("TEEC: tee_fs_open create new file: %s\n", filename);
 			strcpy(p.name, filename);
 			p.index = 0;
 			p.size = fsrpc->len;
@@ -1075,7 +1075,7 @@ static int tee_fs_open(struct tee_fs_rpc *fsrpc)
 			ret = rkss_write_empty_ptable(&p);
 			if (ret < 0)
 			{
-				printf("tee_fs_open : error. %s\n", filename);
+				printf("TEEC: tee_fs_open : error. %s\n", filename);
 				return -1;
 			}
 			fsrpc->fd = ret;
@@ -1083,17 +1083,17 @@ static int tee_fs_open(struct tee_fs_rpc *fsrpc)
 		}
 		else
 		{
-			debug("and no create flag found.\n");
+			debug("TEEC: and no create flag found.\n");
 			return -1;
 		}
 	}
 
-	debug("tee_fs_open ! %s , fd:%d, flag: %x, len: %d\n",
+	debug("TEEC: tee_fs_open ! %s , fd:%d, flag: %x, len: %d\n",
 			filename, fsrpc->fd, fsrpc->flags, fsrpc->len);
 
 	ret = rkss_finish_commit();
 	if (ret < 0) {
-		printf("rkss_finish_commit failed!");
+		printf("TEEC: rkss_finish_commit failed!");
 		return -1;
 	}
 
@@ -1102,38 +1102,38 @@ static int tee_fs_open(struct tee_fs_rpc *fsrpc)
 
 static int tee_fs_close(struct tee_fs_rpc *fsrpc)
 {
-	debug("tee_fs_close !\n");
+	debug("TEEC: tee_fs_close !\n");
 	UNREFERENCED_PARAMETER(fsrpc);
 	return 0;
 }
 
 static int tee_fs_read(struct tee_fs_rpc *fsrpc)
 {
-	debug("tee_fs_read! fd:%d, len:%d\n", fsrpc->fd, fsrpc->len);
+	debug("TEEC: tee_fs_read! fd:%d, len:%d\n", fsrpc->fd, fsrpc->len);
 	void *data = (void *)(fsrpc + 1);
 
 	struct rkss_file_info p = {0};
 	int ret = rkss_get_fileinfo_by_index(fsrpc->fd, &p);
 	if (ret < 0)
 	{
-		printf("unavailable fd !\n");
+		printf("TEEC: unavailable fd !\n");
 		return -1;
 	}
 
 	if (file_seek != 0)
 	{
-		printf("warning !!! file_seek != 0. unsupported now.\n");
+		printf("TEEC: warning !!! file_seek != 0. unsupported now.\n");
 	}
 
 	int num = fsrpc->len / RKSS_DATA_LEN + 1;
 	int di = 0;
-	debug("reading section[%d], fd:%d, len:%d, filesize:%d\n",
+	debug("TEEC: reading section[%d], fd:%d, len:%d, filesize:%d\n",
 			p.index, fsrpc->fd, fsrpc->len, p.size);
 
 	uint8_t *temp_file_data = malloc(num * RKSS_DATA_LEN);
 	ret = rkss_read_multi_sections(temp_file_data, p.index, num);
 	if (ret < 0) {
-		printf("unavailable file index\n");
+		printf("TEEC: unavailable file index\n");
 		free(temp_file_data);
 		return -1;
 	}
@@ -1146,50 +1146,50 @@ static int tee_fs_read(struct tee_fs_rpc *fsrpc)
 
 static int tee_fs_write(struct tee_fs_rpc *fsrpc)
 {
-	debug("tee_fs_write ! fd:%d, lenth:%d\n", fsrpc->fd, fsrpc->len);
+	debug("TEEC: tee_fs_write ! fd:%d, lenth:%d\n", fsrpc->fd, fsrpc->len);
 	void *data = (void *)(fsrpc + 1);
 
 	if (fsrpc->fd < 0)
 	{
-		printf("tee_fs_write error ! wrong fd : %d\n", fsrpc->fd);
+		printf("TEEC: tee_fs_write error ! wrong fd : %d\n", fsrpc->fd);
 		return -1;
 	}
 
 	if (file_seek != 0)
 	{
-		printf("warning !!! file_seek != 0. unsupported now.\n");
+		printf("TEEC: warning !!! file_seek != 0. unsupported now.\n");
 	}
 
 	struct rkss_file_info p = {0};
 	int ret = rkss_get_fileinfo_by_index(fsrpc->fd, &p);
 	if (ret < 0)
 	{
-		printf("tee_fs_write: fd unvailable!\n");
+		printf("TEEC: tee_fs_write: fd unvailable!\n");
 		return -1;
 	}
 
 	ret = rkss_begin_commit();
 	if (ret < 0) {
-		printf("rkss_begin_commit failed!");
+		printf("TEEC: rkss_begin_commit failed!");
 		return -1;
 	}
 
 	p.size = fsrpc->len;
 	int num = fsrpc->len / RKSS_DATA_LEN + 1;
 	p.index = rkss_get_empty_section_from_usedflags(num);
-	debug("Get Empty section in %d\n", p.index);
+	debug("TEEC: Get Empty section in %d\n", p.index);
 	p.used = 1;
 
 	ret = rkss_incref_multi_usedflags_sections(p.index, num);
 	if (ret < 0) {
-		printf("rkss_incref_multi_usedflags_sections error !\n");
+		printf("TEEC: rkss_incref_multi_usedflags_sections error !\n");
 		ret = -1;
 	}
 
 	ret = rkss_write_back_ptable(fsrpc->fd, &p);
 	if (ret < 0)
 	{
-		printf("tee_fs_write: write ptable error!\n");
+		printf("TEEC: tee_fs_write: write ptable error!\n");
 		return -1;
 	}
 
@@ -1206,7 +1206,7 @@ static int tee_fs_write(struct tee_fs_rpc *fsrpc)
 
 	ret = rkss_finish_commit();
 	if (ret < 0) {
-		printf("rkss_finish_commit failed!");
+		printf("TEEC: rkss_finish_commit failed!");
 		return -1;
 	}
 
@@ -1215,7 +1215,7 @@ static int tee_fs_write(struct tee_fs_rpc *fsrpc)
 
 static int tee_fs_seek(struct tee_fs_rpc *fsrpc)
 {
-	debug("tee_fs_seek ! fd:%d, seek:%d, flag:%x\n", fsrpc->fd, fsrpc->arg, fsrpc->flags);
+	debug("TEEC: tee_fs_seek ! fd:%d, seek:%d, flag:%x\n", fsrpc->fd, fsrpc->arg, fsrpc->flags);
 
 	if (fsrpc->flags == TEE_FS_SEEK_CUR)
 	{
@@ -1232,7 +1232,7 @@ static int tee_fs_seek(struct tee_fs_rpc *fsrpc)
 		int ret = rkss_get_fileinfo_by_index(fsrpc->fd, &p);
 		if (ret < 0)
 		{
-			printf("unavilable fd.\n");
+			printf("TEEC: unavilable fd.\n");
 			return -1;
 		}
 		file_seek = p.size + fsrpc->arg;
@@ -1240,7 +1240,7 @@ static int tee_fs_seek(struct tee_fs_rpc *fsrpc)
 	}
 	else
 	{
-		printf("tee_fs_seek: unsupport seed mode.\n");
+		printf("TEEC: tee_fs_seek: unsupport seed mode.\n");
 		return -1;
 	}
 
@@ -1255,16 +1255,16 @@ static int tee_fs_unlink(struct tee_fs_rpc *fsrpc)
 	int ret = rkss_get_fileinfo_by_name(filename, &p);
 	if (ret < 0)
 	{
-		printf("tee_fs_unlink : no such file. %s\n", filename);
+		printf("TEEC: tee_fs_unlink : no such file. %s\n", filename);
 		return 0;
 	}
 	int fd = ret;
 
-	debug("tee_fs_unlink ! %s fd:%d index:%d size:%d\n", filename, fd, p.index, p.size);
+	debug("TEEC: tee_fs_unlink ! %s fd:%d index:%d size:%d\n", filename, fd, p.index, p.size);
 
 	ret = rkss_begin_commit();
 	if (ret < 0) {
-		printf("rkss_begin_commit failed!");
+		printf("TEEC: rkss_begin_commit failed!");
 		return -1;
 	}
 
@@ -1273,7 +1273,7 @@ static int tee_fs_unlink(struct tee_fs_rpc *fsrpc)
 	ret = rkss_decref_multi_usedflags_sections(p.index, num);
 	if (ret < 0)
 	{
-		printf("rkss_decref_multi_usedflags_sections error !\n");
+		printf("TEEC: rkss_decref_multi_usedflags_sections error !\n");
 		return -1;
 	}
 
@@ -1282,7 +1282,7 @@ static int tee_fs_unlink(struct tee_fs_rpc *fsrpc)
 	ret = rkss_write_back_ptable(fd, &p);
 	if (ret < 0)
 	{
-		printf("tee_fs_unlink : write back error %d\n", ret);
+		printf("TEEC: tee_fs_unlink : write back error %d\n", ret);
 		return -1;
 	}
 
@@ -1292,7 +1292,7 @@ static int tee_fs_unlink(struct tee_fs_rpc *fsrpc)
 
 	ret = rkss_finish_commit();
 	if (ret < 0) {
-		printf("rkss_finish_commit failed!");
+		printf("TEEC: rkss_finish_commit failed!");
 		return -1;
 	}
 
@@ -1304,13 +1304,13 @@ static int tee_fs_link(struct tee_fs_rpc *fsrpc)
 	char *filename = (char *)(fsrpc + 1);
 	size_t offset_new_fn = strlen(filename) + 1;
 	char *newfilename = filename + offset_new_fn;
-	debug("tee_fs_link ! %s -> %s\n", filename, newfilename);
+	debug("TEEC: tee_fs_link ! %s -> %s\n", filename, newfilename);
 
 	struct rkss_file_info p_old = {0};
 	int ret = rkss_get_fileinfo_by_name(filename, &p_old);
 	if (ret < 0)
 	{
-		printf("cannot find src file %s.\n", filename);
+		printf("TEEC: cannot find src file %s.\n", filename);
 		return -1;
 	}
 
@@ -1318,12 +1318,12 @@ static int tee_fs_link(struct tee_fs_rpc *fsrpc)
 	ret = rkss_get_fileinfo_by_name(newfilename, &p_check);
 	if (ret >= 0)
 	{
-		printf("file exist ! %s.\n", newfilename);
+		printf("TEEC: file exist ! %s.\n", newfilename);
 		return -1;
 	}
 	ret = rkss_begin_commit();
 	if (ret < 0) {
-		printf("rkss_begin_commit failed!");
+		printf("TEEC: rkss_begin_commit failed!");
 		return -1;
 	}
 
@@ -1333,7 +1333,7 @@ static int tee_fs_link(struct tee_fs_rpc *fsrpc)
 	ret = rkss_write_empty_ptable(&p_new);
 	if (ret < 0)
 	{
-		printf("tee_fs_open : error. %s\n", filename);
+		printf("TEEC: tee_fs_open : error. %s\n", filename);
 		return -1;
 	}
 
@@ -1341,7 +1341,7 @@ static int tee_fs_link(struct tee_fs_rpc *fsrpc)
 	ret = rkss_incref_multi_usedflags_sections(p_new.index, num);
 	if (ret < 0)
 	{
-		printf("rkss_incref_multi_usedflags_sections error !\n");
+		printf("TEEC: rkss_incref_multi_usedflags_sections error !\n");
 		return -1;
 	}
 
@@ -1350,7 +1350,7 @@ static int tee_fs_link(struct tee_fs_rpc *fsrpc)
 #endif
 	ret = rkss_finish_commit();
 	if (ret < 0) {
-		printf("rkss_finish_commit failed!");
+		printf("TEEC: rkss_finish_commit failed!");
 		return -1;
 	}
 
@@ -1361,19 +1361,19 @@ static int tee_fs_rename(struct tee_fs_rpc *fsrpc)
 {
 	char *filenames = (char *)(fsrpc + 1);
 	char *newnames = filenames + strlen(filenames) + 1;
-	debug("rename: %s -> %s\n", filenames, newnames);
+	debug("TEEC: rename: %s -> %s\n", filenames, newnames);
 
 	struct rkss_file_info p = {0};
 	int ret = rkss_get_fileinfo_by_name(filenames, &p);
 	if (ret < 0)
 	{
-		printf("filename no found .\n");
+		printf("TEEC: filename no found .\n");
 		return -1;
 	}
 
 	ret = rkss_begin_commit();
 	if (ret < 0) {
-		printf("rkss_begin_commit failed!");
+		printf("TEEC: rkss_begin_commit failed!");
 		return -1;
 	}
 
@@ -1382,13 +1382,13 @@ static int tee_fs_rename(struct tee_fs_rpc *fsrpc)
 	ret = rkss_write_back_ptable(ret, &p);
 	if (ret < 0)
 	{
-		printf("write ptable error!\n");
+		printf("TEEC: write ptable error!\n");
 		return -1;
 	}
 
 	ret = rkss_finish_commit();
 	if (ret < 0) {
-		printf("rkss_finish_commit failed!");
+		printf("TEEC: rkss_finish_commit failed!");
 		return -1;
 	}
 
@@ -1397,10 +1397,10 @@ static int tee_fs_rename(struct tee_fs_rpc *fsrpc)
 
 static int tee_fs_truncate(struct tee_fs_rpc *fsrpc)
 {
-	debug("tee_fs_truncate: fd:%d, lenth:%d\n", fsrpc->fd, fsrpc->arg);
+	debug("TEEC: tee_fs_truncate: fd:%d, lenth:%d\n", fsrpc->fd, fsrpc->arg);
 	if (fsrpc->fd < 0)
 	{
-		printf("tee_fs_truncate: fd unavilable !\n");
+		printf("TEEC: tee_fs_truncate: fd unavilable !\n");
 		return -1;
 	}
 
@@ -1408,12 +1408,12 @@ static int tee_fs_truncate(struct tee_fs_rpc *fsrpc)
 	int ret = rkss_get_fileinfo_by_index(fsrpc->fd, &p);
 	if (ret < 0)
 	{
-		printf("fd unvailable!\n");
+		printf("TEEC: fd unvailable!\n");
 		return -1;
 	}
 	ret = rkss_begin_commit();
 	if (ret < 0) {
-		printf("rkss_begin_commit failed!");
+		printf("TEEC: rkss_begin_commit failed!");
 		return -1;
 	}
 
@@ -1421,12 +1421,12 @@ static int tee_fs_truncate(struct tee_fs_rpc *fsrpc)
 	ret = rkss_write_back_ptable(fsrpc->fd, &p);
 	if (ret < 0)
 	{
-		printf("tee_fs_write: write ptable error!\n");
+		printf("TEEC: tee_fs_write: write ptable error!\n");
 		return -1;
 	}
 	ret = rkss_finish_commit();
 	if (ret < 0) {
-		printf("rkss_finish_commit failed!");
+		printf("TEEC: rkss_finish_commit failed!");
 		return -1;
 	}
 	return 0;
@@ -1436,7 +1436,7 @@ static int tee_fs_mkdir(struct tee_fs_rpc *fsrpc)
 {
 	char *dirname = (char *)(fsrpc + 1);
 	UNREFERENCED_PARAMETER(dirname);
-	debug("tee_fs_mkdir: %s\n", dirname);
+	debug("TEEC: tee_fs_mkdir: %s\n", dirname);
 	return 0;
 }
 
@@ -1447,9 +1447,9 @@ static int tee_fs_opendir(struct tee_fs_rpc *fsrpc)
 	int ret = rkss_get_dirs_by_name(dirname);
 	if (ret < 0)
 	{
-		printf("tee_fs_opendir: error\n");
+		printf("TEEC: tee_fs_opendir: error\n");
 	}
-	debug("tee_fs_opendir: %s, seek/num:%d/%d\n", dirname, dir_seek, dir_num);
+	debug("TEEC: tee_fs_opendir: %s, seek/num:%d/%d\n", dirname, dir_seek, dir_num);
 	return 0;
 }
 
@@ -1457,7 +1457,7 @@ static int tee_fs_closedir(struct tee_fs_rpc *fsrpc)
 {
 	char *dirname = (char *)(fsrpc + 1);
 	UNREFERENCED_PARAMETER(dirname);
-	debug("tee_fs_closedir: %s\n", dirname);
+	debug("TEEC: tee_fs_closedir: %s\n", dirname);
 	dir_seek = 0;
 	dir_num = 0;
 	return 0;
@@ -1466,12 +1466,12 @@ static int tee_fs_closedir(struct tee_fs_rpc *fsrpc)
 static int tee_fs_readdir(struct tee_fs_rpc *fsrpc)
 {
 	char *dirname = (char *)(fsrpc + 1);
-	debug("seek/num:%d/%d\n", dir_seek, dir_num);
+	debug("TEEC: seek/num:%d/%d\n", dir_seek, dir_num);
 	if (dir_seek == dir_num)
 	{
 		dirname = NULL;
 		fsrpc->len = 0;
-		debug("tee_fs_readdir: END\n");
+		debug("TEEC: tee_fs_readdir: END\n");
 		return -1;
 	}
 
@@ -1479,41 +1479,41 @@ static int tee_fs_readdir(struct tee_fs_rpc *fsrpc)
 	fsrpc->len = strlen(dir_cache[dir_seek]) + 1;
 	++dir_seek;
 
-	debug("tee_fs_readdir: %s\n", dirname);
+	debug("TEEC: tee_fs_readdir: %s\n", dirname);
 	return 0;
 }
 
 static int tee_fs_rmdir(struct tee_fs_rpc *fsrpc)
 {
 	char *dirname = (char *)(fsrpc + 1);
-	debug("tee_fs_rmdir: %s\n", dirname);
+	debug("TEEC: tee_fs_rmdir: %s\n", dirname);
 
 	struct rkss_file_info p = {0};
 	int ret = rkss_get_fileinfo_by_name(dirname, &p);
 	if (ret == -100)
 	{
-		printf("dir is not empty.\n");
+		printf("TEEC: dir is not empty.\n");
 		return -1;
 	}
 	else if (ret >= 0)
 	{
-		printf("%s is not a dir.\n", p.name);
+		printf("TEEC: %s is not a dir.\n", p.name);
 		return -1;
 	}
-	debug("rmdir success.\n");
+	debug("TEEC: rmdir success.\n");
 	return 0;
 }
 
 static int tee_fs_access(struct tee_fs_rpc *fsrpc)
 {
 	char *filename = (char *)(fsrpc + 1);
-	debug("tee_fs_access: name:%s,flag:%x\n", filename, fsrpc->flags);
+	debug("TEEC: tee_fs_access: name:%s,flag:%x\n", filename, fsrpc->flags);
 
 	struct rkss_file_info p = {0};
 	int ret = rkss_get_fileinfo_by_name(filename, &p);
 	if (ret < 0 && ret != -100)
 	{
-		debug("tee_fs_access: %s no such file or directory.\n", filename);
+		debug("TEEC: tee_fs_access: %s no such file or directory.\n", filename);
 		return -1;
 	}
 
@@ -1521,7 +1521,7 @@ static int tee_fs_access(struct tee_fs_rpc *fsrpc)
 	{
 		if (!CHECKFLAG(p.flags, RK_FS_R))
 		{
-			printf("tee_fs_access: no permission FS_R_OK in %x.\n", p.flags);
+			printf("TEEC: tee_fs_access: no permission FS_R_OK in %x.\n", p.flags);
 			return -1;
 		}
 	}
@@ -1530,7 +1530,7 @@ static int tee_fs_access(struct tee_fs_rpc *fsrpc)
 	{
 		if (!CHECKFLAG(p.flags, RK_FS_W))
 		{
-			printf("tee_fs_access: no permission FS_W_OK in %x.\n", p.flags);
+			printf("TEEC: tee_fs_access: no permission FS_W_OK in %x.\n", p.flags);
 			return -1;
 		}
 	}
@@ -1551,7 +1551,7 @@ int tee_supp_rk_fs_init(void)
 
 	ret = rkss_resume();
 	if (ret < 0) {
-		printf("rkss_resume failed!");
+		printf("TEEC: rkss_resume failed!\n");
 		return -1;
 	}
 #ifdef DEBUG_CLEAN_RKSS // clean secure storage
@@ -1561,25 +1561,25 @@ int tee_supp_rk_fs_init(void)
 		memset(rkss.data, 0, RKSS_DATA_LEN);
 		rkss.index = i;
 		rkss_write_section(&rkss);
-		printf("cleaned [%d]", i);
+		printf("TEEC: cleaned [%d]", i);
 	}
 #endif
 
 	ret = rkss_begin_commit();
 	if (ret < 0) {
-		printf("rkss_begin_commit failed!");
+		printf("TEEC: rkss_begin_commit failed!\n");
 		return -1;
 	}
 
 	// Verify Partition Table
 	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
-		printf("malloc table_data fail\n");
+		printf("TEEC: malloc table_data fail\n");
 		return -1;
 	}
 	ret = rkss_read_patition_tables(table_data);
 	if (ret < 0) {
-		printf("rkss_read_patition_tables fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_read_patition_tables fail ! ret: %d.\n", ret);
 		free(table_data);
 		return -1;
 	}
@@ -1587,7 +1587,7 @@ int tee_supp_rk_fs_init(void)
 	/* Verify Partition Table*/
 	ret = rkss_verify_ptable(table_data);
 	if (ret < 0) {
-		printf("rkss_verify_ptable fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_verify_ptable fail ! ret: %d.\n", ret);
 		free(table_data);
 		return -1;
 	}
@@ -1600,13 +1600,13 @@ int tee_supp_rk_fs_init(void)
 	ret = rkss_read_section(&rkss);
 	if (ret < 0)
 	{
-		printf("rkss_read_section fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_read_section fail ! ret: %d.\n", ret);
 		return -1;
 	}
 	ret = rkss_verify_usedflags(&rkss);
 	if (ret < 0)
 	{
-		printf("rkss_verify_usedflags fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_verify_usedflags fail ! ret: %d.\n", ret);
 		return -1;
 	}
 
@@ -1617,7 +1617,7 @@ int tee_supp_rk_fs_init(void)
 
 	ret = rkss_begin_commit();
 	if (ret < 0) {
-		printf("rkss_begin_commit failed!");
+		printf("TEEC: rkss_begin_commit failed!\n");
 		return -1;
 	}
 
@@ -1625,7 +1625,7 @@ int tee_supp_rk_fs_init(void)
 }
 int OpteeClientRkFsInit(void)
 {
-	debug(" OpteeClientRkFsInit\n");
+	debug("TEEC: OpteeClientRkFsInit\n");
 	return tee_supp_rk_fs_init();
 }
 
diff --git a/lib/optee_clientApi/OpteeClientSMC.c b/lib/optee_clientApi/OpteeClientSMC.c
index a3848c576a..b4d8007462 100644
--- a/lib/optee_clientApi/OpteeClientSMC.c
+++ b/lib/optee_clientApi/OpteeClientSMC.c
@@ -126,7 +126,7 @@ TEEC_Result TEEC_SMC_OpenSession(TEEC_Context *context,
 	TeeSmc32Param[1].attr = OPTEE_MSG_ATTR_TYPE_VALUE_INPUT_V2 |
 				OPTEE_MSG_ATTR_META_V2;
 #else
-	printf("Not support! All rockchips use optee v2.5 are 64 bits! \n");
+	printf("TEEC: Not support! All rockchips use optee v2.5 are 64 bits! \n");
 #endif
 #endif
 
@@ -300,18 +300,18 @@ void SetTeeSmc32Params(TEEC_Operation *operation,
 #ifdef CONFIG_OPTEE_V1
 #ifdef CONFIG_ARM64
 			attr |= TEEC_SMC_DEFAULT_CACHE_ATTRIBUTES;
-			debug(" OPTEE_OS_V1 ARCH64 attr %x\n", attr);
+			debug("TEEC: OPTEE_OS_V1 ARCH64 attr %x\n", attr);
 #else
-			debug(" OPTEE_OS_V1 ARCH32 attr %x\n", attr);
+			debug("TEEC: OPTEE_OS_V1 ARCH32 attr %x\n", attr);
 #endif
 #endif
 
 #ifdef CONFIG_OPTEE_V2
 #if defined CONFIG_ARM64 || defined CONFIG_ARM64_BOOT_AARCH32
 			attr += (OPTEE_MSG_ATTR_TYPE_TMEM_INPUT_V2 - TEEC_MEMREF_TEMP_INPUT);
-			debug(" OPTEE_OS_V2 ARCH64 attr %x\n", attr);
+			debug("TEEC: OPTEE_OS_V2 ARCH64 attr %x\n", attr);
 #else
-			printf("Not support! All rockchips use optee v2 are 64 bits! \n");
+			printf("TEEC: Not support! All rockchips use optee v2 are 64 bits! \n");
 #endif
 #endif
 
@@ -376,7 +376,7 @@ TEEC_Result OpteeSmcCall(t_teesmc32_arg *TeeSmc32Arg)
 
 	while (1) {
 		tee_smc_call(&ArmSmcArgs);
-		debug("arg0=0x%x arg1=0x%x arg2=0x%x arg3=0x%x \n",
+		debug("TEEC: arg0=0x%x arg1=0x%x arg2=0x%x arg3=0x%x \n",
 			ArmSmcArgs.Arg0, ArmSmcArgs.Arg1, ArmSmcArgs.Arg2, ArmSmcArgs.Arg3);
 		if (TEESMC_RETURN_IS_RPC(ArmSmcArgs.Arg0)) {
 			(void) OpteeRpcCallback(&ArmSmcArgs);

commit 4f2523c3a0b201ec2c476399b5d5a756c8911c39
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Sun Apr 28 19:10:39 2019 +0800

    lib: avb: load full partition if allow verification error
    
    Change-Id: I506676512a46ec09d6c617f555f735a24fc4a594
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/lib/avb/libavb/avb_slot_verify.c b/lib/avb/libavb/avb_slot_verify.c
old mode 100755
new mode 100644
index d6a843853f..3fd45c929c
--- a/lib/avb/libavb/avb_slot_verify.c
+++ b/lib/avb/libavb/avb_slot_verify.c
@@ -266,7 +266,7 @@ static AvbSlotVerifyResult load_and_verify_hash_partition(
    * since it's such a common workflow.
    */
   image_size = hash_desc.image_size;
-  if (0) {
+  if (allow_verification_error) {
     if (ops->get_size_of_partition == NULL) {
       avb_errorv(part_name,
                  ": The get_size_of_partition() operation is "

commit 813227ad543ba285129c80289b4053897560abef
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Apr 12 10:02:07 2019 +0800

    lib: avb: add init ab metadata interface
    
    Change-Id: Ifad6c8ca70568c2dc8eea0a4ead23e3e7a2a0e74
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/android_avb/rk_avb_ops_user.h b/include/android_avb/rk_avb_ops_user.h
index 441856c33c..7317f1795b 100644
--- a/include/android_avb/rk_avb_ops_user.h
+++ b/include/android_avb/rk_avb_ops_user.h
@@ -306,6 +306,11 @@ int rk_avb_set_perm_attr_cer(uint8_t *cer, uint32_t size);
  */
 int rk_avb_get_pub_key(struct rk_pub_key *pub_key);
 
+/**
+ * init ab metadata
+ */
+int rk_avb_init_ab_metadata(void);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/lib/avb/rk_avb_user/rk_avb_ops_user.c b/lib/avb/rk_avb_user/rk_avb_ops_user.c
index f14ff8ad22..cfe5936c50 100644
--- a/lib/avb/rk_avb_user/rk_avb_ops_user.c
+++ b/lib/avb/rk_avb_user/rk_avb_ops_user.c
@@ -767,3 +767,30 @@ out:
 
 	return lastboot;
 }
+
+int rk_avb_init_ab_metadata(void)
+{
+	AvbOps *ops;
+	AvbABData ab_data;
+
+	memset(&ab_data, 0, sizeof(AvbABData));
+	debug("sizeof(AvbABData) = %d\n", (int)(size_t)sizeof(AvbABData));
+
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return -1;
+	}
+
+	avb_ab_data_init(&ab_data);
+	if (ops->ab_ops->write_ab_metadata(ops->ab_ops, &ab_data) != 0) {
+		printf("do_avb_init_ab_metadata error!\n");
+		avb_ops_user_free(ops);
+		return -1;
+	}
+
+	printf("Initialize ab data to misc partition success.\n");
+	avb_ops_user_free(ops);
+
+	return 0;
+}
\ No newline at end of file

commit 350f6a183690c00ad4abdaa7c1e3c7983b192e99
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Apr 1 17:54:17 2019 +0800

    video/drm: rgb: support pinctrl state select
    
    Change-Id: I7eb1204e24e17894d529fc582d3bd4a90a61327a
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_rgb.c b/drivers/video/drm/rockchip_rgb.c
index 60b09df21e..02cf1ba8a0 100644
--- a/drivers/video/drm/rockchip_rgb.c
+++ b/drivers/video/drm/rockchip_rgb.c
@@ -10,6 +10,7 @@
 #include <regmap.h>
 #include <dm/device.h>
 #include <dm/read.h>
+#include <dm/pinctrl.h>
 #include <linux/media-bus-format.h>
 
 #include "rockchip_display.h"
@@ -64,6 +65,8 @@ static int rockchip_rgb_connector_enable(struct display_state *state)
 	int pipe = crtc_state->crtc_id;
 	int ret;
 
+	pinctrl_select_state(rgb->dev, "default");
+
 	if (rgb->funcs && rgb->funcs->enable)
 		rgb->funcs->enable(rgb, pipe);
 
@@ -90,6 +93,8 @@ static int rockchip_rgb_connector_disable(struct display_state *state)
 	if (rgb->funcs && rgb->funcs->disable)
 		rgb->funcs->disable(rgb);
 
+	pinctrl_select_state(rgb->dev, "sleep");
+
 	return 0;
 }
 

commit 88c36f1205caa3d2f8e10077ef4b324a8f2b3836
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Apr 18 16:30:13 2019 +0800

    clk: rockchip: rk3399: fix up the assert error
    
    Change-Id: I8cc4f6b775243fef1f5c8e2c711eb1b16eac79a8
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index f11fe3926b..9f88e8a7cd 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -534,15 +534,15 @@ void rk3399_configure_cpu(struct rk3399_cru *cru,
 	rkclk_set_pll(pll_con, apll_cfgs[freq]);
 
 	aclkm_div = apll_hz / ACLKM_CORE_HZ - 1;
-	assert((aclkm_div + 1) * ACLKM_CORE_HZ == apll_hz &&
+	assert((aclkm_div + 1) * ACLKM_CORE_HZ <= apll_hz &&
 	       aclkm_div < 0x1f);
 
 	pclk_dbg_div = apll_hz / PCLK_DBG_HZ - 1;
-	assert((pclk_dbg_div + 1) * PCLK_DBG_HZ == apll_hz &&
+	assert((pclk_dbg_div + 1) * PCLK_DBG_HZ <= apll_hz &&
 	       pclk_dbg_div < 0x1f);
 
 	atclk_div = apll_hz / ATCLK_CORE_HZ - 1;
-	assert((atclk_div + 1) * ATCLK_CORE_HZ == apll_hz &&
+	assert((atclk_div + 1) * ATCLK_CORE_HZ <= apll_hz &&
 	       atclk_div < 0x1f);
 
 	rk_clrsetreg(&cru->clksel_con[con_base],
@@ -1416,11 +1416,11 @@ static void rkclk_init(struct rk3399_cru *cru)
 	aclk_div = DIV_ROUND_UP(GPLL_HZ, PERIHP_ACLK_HZ) - 1;
 
 	hclk_div = PERIHP_ACLK_HZ / PERIHP_HCLK_HZ - 1;
-	assert((hclk_div + 1) * PERIHP_HCLK_HZ ==
+	assert((hclk_div + 1) * PERIHP_HCLK_HZ <=
 	       PERIHP_ACLK_HZ && (hclk_div <= 0x3));
 
 	pclk_div = PERIHP_ACLK_HZ / PERIHP_PCLK_HZ - 1;
-	assert((pclk_div + 1) * PERIHP_PCLK_HZ ==
+	assert((pclk_div + 1) * PERIHP_PCLK_HZ <=
 	       PERIHP_ACLK_HZ && (pclk_div <= 0x7));
 
 	rk_clrsetreg(&cru->clksel_con[14],
@@ -1435,11 +1435,11 @@ static void rkclk_init(struct rk3399_cru *cru)
 	aclk_div = DIV_ROUND_UP(GPLL_HZ, PERILP0_ACLK_HZ) - 1;
 
 	hclk_div = PERILP0_ACLK_HZ / PERILP0_HCLK_HZ - 1;
-	assert((hclk_div + 1) * PERILP0_HCLK_HZ ==
+	assert((hclk_div + 1) * PERILP0_HCLK_HZ <=
 	       PERILP0_ACLK_HZ && (hclk_div <= 0x3));
 
 	pclk_div = PERILP0_ACLK_HZ / PERILP0_PCLK_HZ - 1;
-	assert((pclk_div + 1) * PERILP0_PCLK_HZ ==
+	assert((pclk_div + 1) * PERILP0_PCLK_HZ <=
 	       PERILP0_ACLK_HZ && (pclk_div <= 0x7));
 
 	rk_clrsetreg(&cru->clksel_con[23],
@@ -1452,11 +1452,11 @@ static void rkclk_init(struct rk3399_cru *cru)
 
 	/* perilp1 hclk select gpll as source */
 	hclk_div = DIV_ROUND_UP(GPLL_HZ, PERILP1_HCLK_HZ) - 1;
-	assert((hclk_div + 1) * PERILP1_HCLK_HZ ==
+	assert((hclk_div + 1) * PERILP1_HCLK_HZ <=
 	       GPLL_HZ && (hclk_div <= 0x1f));
 
 	pclk_div = PERILP1_HCLK_HZ / PERILP1_PCLK_HZ - 1;
-	assert((pclk_div + 1) * PERILP1_PCLK_HZ ==
+	assert((pclk_div + 1) * PERILP1_PCLK_HZ <=
 	       PERILP1_HCLK_HZ && (pclk_div <= 0x7));
 
 	rk_clrsetreg(&cru->clksel_con[25],

commit f25e3caf73f089c695f05acc56f553f176a0bf88
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Apr 19 09:34:17 2019 +0800

    rkflash: support 4KB page size spi nand
    
    1.support 4KB page size spi nand
    2.add new spi nand: ATO25D1GA, XT26G02B, XT26G01B, HYF4GQ4UAACBE
    
    Change-Id: I331c98341e9aa5f2e15cd7a4a5c6aeb2136d65dd
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/rk_sftl_arm_v7.S b/drivers/rkflash/rk_sftl_arm_v7.S
index ddde4a609f..01d67fba67 100644
--- a/drivers/rkflash/rk_sftl_arm_v7.S
+++ b/drivers/rkflash/rk_sftl_arm_v7.S
@@ -2,7 +2,7 @@
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:    GPL-2.0
- * date: 2019-02-20
+ * date: 2019-04-19
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -184,73 +184,75 @@ FtlConstantsInit:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r3, r0
 	ldrh	r4, [r0]
-	ldr	r2, .L25
+	ldr	r2, .L26
 	ldrh	r5, [r0, #2]
-	ldrh	r0, [r0, #4]
-	strh	r4, [r2]	@ movhi
-	ldr	r2, .L25+4
-	ldrh	r1, [r3, #6]
 	ldrh	r7, [r3, #14]
-	strh	r5, [r2]	@ movhi
-	ldr	r2, .L25+8
-	ldr	r6, .L25+12
+	strh	r4, [r2]	@ movhi
+	ldr	r2, .L26+4
+	ldrh	ip, [r0, #4]
 	cmp	r7, #4
-	strh	r0, [r2]	@ movhi
-	ldr	r2, .L25+16
+	ldr	r0, .L26+8
+	strh	r5, [r2]	@ movhi
+	ldr	r1, .L26+12
+	ldrh	r2, [r3, #6]
+	ldr	r6, .L26+16
+	strh	ip, [r0]	@ movhi
+	strh	r2, [r1]	@ movhi
 	strh	r7, [r6]	@ movhi
-	ldr	r7, .L25+20
-	strh	r1, [r2]	@ movhi
-	itttt	eq
-	lsreq	r1, r1, #1
-	strheq	r1, [r2]	@ movhi
-	moveq	r1, #8
-	strheq	r1, [r6]	@ movhi
-	movs	r1, #0
+	bne	.L16
+	lsrs	r2, r2, #1
+	strh	r2, [r1]	@ movhi
+	movs	r2, #8
+	strh	r2, [r6]	@ movhi
 .L17:
-	strb	r1, [r1, r7]
-	adds	r1, r1, #1
-	cmp	r1, #32
-	bne	.L17
-	ldr	r1, .L25+24
+	ldr	r7, .L26+20
+	movs	r2, #0
+.L18:
+	strb	r2, [r2, r7]
+	adds	r2, r2, #1
+	cmp	r2, #32
+	bne	.L18
+	ldr	r2, .L26+24
 	cmp	r4, #1
 	mov	r7, #5
-	smulbb	r5, r5, r0
+	ldrh	r0, [r0]
 	mov	ip, #0
 	str	r3, [sp, #4]
-	strh	r7, [r1]	@ movhi
+	strh	r7, [r2]	@ movhi
 	it	eq
-	strheq	r4, [r1]	@ movhi
+	strheq	r4, [r2]	@ movhi
 	mov	r4, #640
-	ldr	r1, .L25+28
+	ldr	r2, .L26+28
+	smulbb	r5, r5, r0
+	ldr	r7, .L26+32
+	strh	r4, [r2]	@ movhi
 	uxth	r5, r5
-	ldr	r7, .L25+32
-	strh	r4, [r1]	@ movhi
-	ldrh	r4, [r2]
-	ldr	r1, .L25+36
-	ldr	r2, .L25+40
+	ldrh	r4, [r1]
+	ldr	r2, .L26+36
 	strh	ip, [r7]	@ movhi
+	ldr	r7, .L26+40
 	smulbb	r0, r0, r4
-	strh	r5, [r1]	@ movhi
-	ldr	r7, .L25+44
+	strh	r5, [r2]	@ movhi
+	ldr	r2, .L26+44
 	uxth	r0, r0
 	strh	r0, [r2]	@ movhi
 	bl	Ftl_log2
 	ldr	r3, [sp, #4]
-	ldr	r2, .L25+48
+	ldr	r2, .L26+48
 	ldrh	fp, [r6]
 	ldrh	r8, [r3, #12]
 	strh	r0, [r2]	@ movhi
-	ldr	r2, .L25+52
+	ldr	r2, .L26+52
 	mov	r0, fp
 	strh	r8, [r7]	@ movhi
 	smulbb	r1, r5, r8
-	ldr	r6, .L25+56
+	ldr	r6, .L26+56
 	strh	r8, [r2]	@ movhi
-	ldr	r2, .L25+60
+	ldr	r2, .L26+60
 	strh	r1, [r2]	@ movhi
 	bl	Ftl_log2
 	lsl	r2, fp, #9
-	ldr	r1, .L25+64
+	ldr	r1, .L26+64
 	ldr	r3, [sp, #4]
 	mov	r10, r0
 	uxth	r2, r2
@@ -258,25 +260,25 @@ FtlConstantsInit:
 	mov	r0, #5120
 	strh	r2, [r1]	@ movhi
 	lsrs	r2, r2, #8
-	ldr	r1, .L25+68
+	ldr	r1, .L26+68
 	strh	r2, [r1]	@ movhi
 	mul	r1, r8, fp
 	ldrh	r2, [r3, #20]
-	ldr	r3, .L25+72
+	ldr	r3, .L26+72
 	strh	r2, [r3]	@ movhi
 	mul	r3, r4, r5
-	ldr	r2, .L25+76
+	ldr	r2, .L26+76
 	lsls	r4, r4, #6
 	str	r3, [r2]
 	mul	r3, fp, r3
-	ldr	r2, .L25+80
+	ldr	r2, .L26+80
 	mul	r3, r8, r3
-	ldr	r8, .L25+116
+	ldr	r8, .L26+116
 	asrs	r3, r3, #11
 	str	r3, [r2]
 	bl	__aeabi_idiv
 	uxth	r0, r0
-	ldr	r2, .L25+84
+	ldr	r2, .L26+84
 	mov	r1, r5
 	cmp	r0, #4
 	itet	ls
@@ -287,11 +289,11 @@ FtlConstantsInit:
 	asr	r3, r3, r10
 	add	r10, r10, #9
 	asr	r4, r4, r10
-	ldr	r10, .L25+120
+	ldr	r10, .L26+120
 	adds	r3, r3, #2
 	ldrh	r0, [r8]
 	strh	r3, [r2]	@ movhi
-	ldr	r3, .L25+88
+	ldr	r3, .L26+88
 	strh	r4, [r3]	@ movhi
 	uxth	r4, r4
 	mul	r3, r5, r4
@@ -299,7 +301,7 @@ FtlConstantsInit:
 	str	r3, [r10]
 	bl	__aeabi_uidiv
 	uxtah	r0, r4, r0
-	ldr	r4, .L25+92
+	ldr	r4, .L26+92
 	cmp	r5, #1
 	it	eq
 	addeq	r0, r0, #4
@@ -308,9 +310,9 @@ FtlConstantsInit:
 	bl	FtlSysBlkNumInit
 	ldr	r2, [r4]
 	movs	r0, #0
-	ldr	r3, .L25+96
+	ldr	r3, .L26+96
 	str	r2, [r3]
-	ldr	r3, .L25+100
+	ldr	r3, .L26+100
 	ldr	r2, [r3]
 	ldrh	r3, [r7]
 	lsls	r2, r2, #2
@@ -318,13 +320,13 @@ FtlConstantsInit:
 	ldrh	r2, [r6]
 	adds	r2, r2, #9
 	lsrs	r3, r3, r2
-	ldr	r2, .L25+104
+	ldr	r2, .L26+104
 	adds	r3, r3, #2
 	strh	r3, [r2]	@ movhi
 	movs	r2, #32
-	ldr	r3, .L25+108
+	ldr	r3, .L26+108
 	strh	r2, [r3]	@ movhi
-	ldr	r3, .L25+112
+	ldr	r3, .L26+112
 	str	r0, [r3]
 	ldrh	r3, [r8]
 	adds	r3, r3, #3
@@ -335,21 +337,31 @@ FtlConstantsInit:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L26:
+.L16:
+	cmp	r7, #8
+	bne	.L17
+	cmp	ip, #1
+	itttt	eq
+	lsreq	r2, r2, #1
+	strheq	r2, [r1]	@ movhi
+	moveq	r2, #2
+	strheq	r2, [r0]	@ movhi
+	b	.L17
+.L27:
 	.align	2
-.L25:
+.L26:
 	.word	.LANCHOR9
 	.word	.LANCHOR10
 	.word	.LANCHOR11
-	.word	.LANCHOR12
 	.word	.LANCHOR6
+	.word	.LANCHOR12
 	.word	.LANCHOR13
 	.word	.LANCHOR14
 	.word	.LANCHOR16
 	.word	.LANCHOR15
 	.word	.LANCHOR3
-	.word	.LANCHOR17
 	.word	.LANCHOR19
+	.word	.LANCHOR17
 	.word	.LANCHOR18
 	.word	.LANCHOR20
 	.word	.LANCHOR22
@@ -382,29 +394,29 @@ IsBlkInVendorPart:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L34
+	ldr	r3, .L35
 	ldrh	r3, [r3]
-	cbz	r3, .L33
-	ldr	r3, .L34+4
-	ldr	r2, .L34+8
+	cbz	r3, .L34
+	ldr	r3, .L35+4
+	ldr	r2, .L35+8
 	ldr	r3, [r3]
 	ldrh	r2, [r2]
 	add	r2, r3, r2, lsl #1
-.L29:
+.L30:
 	cmp	r3, r2
-	bne	.L30
-.L33:
+	bne	.L31
+.L34:
 	movs	r0, #0
 	bx	lr
-.L30:
+.L31:
 	ldrh	r1, [r3], #2
 	cmp	r0, r1
-	bne	.L29
+	bne	.L30
 	movs	r0, #1
 	bx	lr
-.L35:
+.L36:
 	.align	2
-.L34:
+.L35:
 	.word	.LANCHOR35
 	.word	.LANCHOR36
 	.word	.LANCHOR27
@@ -436,12 +448,12 @@ sftl_get_density:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L38
+	ldr	r3, .L39
 	ldr	r0, [r3]
 	bx	lr
-.L39:
+.L40:
 	.align	2
-.L38:
+.L39:
 	.word	.LANCHOR34
 	.size	sftl_get_density, .-sftl_get_density
 	.global	__aeabi_uidivmod
@@ -456,14 +468,14 @@ sftl_get_density:
 FtlBbmMapBadBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L41
+	ldr	r3, .L42
 	push	{r0, r1, r2, r4, r5, r6, r7, lr}
 	mov	r5, r0
 	ldrh	r4, [r3]
 	mov	r1, r4
 	bl	__aeabi_uidiv
 	mov	r1, r4
-	ldr	r4, .L41+4
+	ldr	r4, .L42+4
 	uxth	r6, r0
 	mov	r0, r5
 	bl	__aeabi_uidivmod
@@ -480,7 +492,7 @@ FtlBbmMapBadBlock:
 	mov	r2, r6
 	str	r0, [sp]
 	mov	r1, r5
-	ldr	r0, .L41+8
+	ldr	r0, .L42+8
 	bl	printf
 	ldrh	r3, [r4, #6]
 	movs	r0, #0
@@ -489,9 +501,9 @@ FtlBbmMapBadBlock:
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, pc}
-.L42:
+.L43:
 	.align	2
-.L41:
+.L42:
 	.word	.LANCHOR17
 	.word	.LANCHOR37
 	.word	.LC0
@@ -507,7 +519,7 @@ FtlBbmMapBadBlock:
 FtlBbmIsBadBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L44
+	ldr	r3, .L45
 	push	{r4, r5, r6, lr}
 	mov	r6, r0
 	ldrh	r5, [r3]
@@ -517,7 +529,7 @@ FtlBbmIsBadBlock:
 	uxth	r4, r1
 	mov	r1, r5
 	bl	__aeabi_uidiv
-	ldr	r3, .L44+4
+	ldr	r3, .L45+4
 	uxth	r0, r0
 	lsrs	r2, r4, #5
 	and	r4, r4, #31
@@ -527,9 +539,9 @@ FtlBbmIsBadBlock:
 	lsrs	r0, r0, r4
 	and	r0, r0, #1
 	pop	{r4, r5, r6, pc}
-.L45:
+.L46:
 	.align	2
-.L44:
+.L45:
 	.word	.LANCHOR17
 	.word	.LANCHOR37
 	.size	FtlBbmIsBadBlock, .-FtlBbmIsBadBlock
@@ -560,12 +572,12 @@ V2P_block:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r5, r1
-	ldr	r3, .L48
+	ldr	r3, .L49
 	mov	r7, r0
 	ldrh	r6, [r3]
 	mov	r1, r6
 	bl	__aeabi_uidiv
-	ldr	r3, .L48+4
+	ldr	r3, .L49+4
 	smulbb	r5, r6, r5
 	mov	r1, r6
 	ldrh	r4, [r3]
@@ -576,9 +588,9 @@ V2P_block:
 	add	r0, r0, r4
 	uxth	r0, r0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L49:
+.L50:
 	.align	2
-.L48:
+.L49:
 	.word	.LANCHOR11
 	.word	.LANCHOR17
 	.size	V2P_block, .-V2P_block
@@ -593,11 +605,11 @@ V2P_block:
 P2V_plane:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L51
+	ldr	r3, .L52
 	push	{r4, r5, r6, lr}
 	mov	r6, r0
 	ldrh	r5, [r3]
-	ldr	r3, .L51+4
+	ldr	r3, .L52+4
 	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
 	smulbb	r4, r0, r5
@@ -607,9 +619,9 @@ P2V_plane:
 	add	r1, r1, r4
 	uxth	r0, r1
 	pop	{r4, r5, r6, pc}
-.L52:
+.L53:
 	.align	2
-.L51:
+.L52:
 	.word	.LANCHOR11
 	.word	.LANCHOR17
 	.size	P2V_plane, .-P2V_plane
@@ -625,18 +637,18 @@ P2V_block_in_plane:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L54
+	ldr	r3, .L55
 	ldrh	r1, [r3]
 	bl	__aeabi_uidivmod
-	ldr	r3, .L54+4
+	ldr	r3, .L55+4
 	uxth	r0, r1
 	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
 	uxth	r0, r0
 	pop	{r3, pc}
-.L55:
+.L56:
 	.align	2
-.L54:
+.L55:
 	.word	.LANCHOR17
 	.word	.LANCHOR11
 	.size	P2V_block_in_plane, .-P2V_block_in_plane
@@ -653,14 +665,14 @@ ftl_cmp_data_ver:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	cmp	r0, r1
-	bls	.L57
+	bls	.L58
 	subs	r0, r0, r1
 	cmp	r0, #-2147483648
 	ite	hi
 	movhi	r0, #0
 	movls	r0, #1
 	bx	lr
-.L57:
+.L58:
 	subs	r0, r1, r0
 	cmp	r0, #-2147483648
 	ite	ls
@@ -680,14 +692,14 @@ FtlFreeSysBlkQueueEmpty:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L60
+	ldr	r3, .L61
 	ldrh	r0, [r3, #6]
 	clz	r0, r0
 	lsrs	r0, r0, #5
 	bx	lr
-.L61:
+.L62:
 	.align	2
-.L60:
+.L61:
 	.word	.LANCHOR38
 	.size	FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty
 	.section	.text.FtlFreeSysBlkQueueFull,"ax",%progbits
@@ -702,15 +714,15 @@ FtlFreeSysBlkQueueFull:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L63
+	ldr	r3, .L64
 	ldrh	r0, [r3, #6]
 	sub	r3, r0, #1024
 	rsbs	r0, r3, #0
 	adcs	r0, r0, r3
 	bx	lr
-.L64:
+.L65:
 	.align	2
-.L63:
+.L64:
 	.word	.LANCHOR38
 	.size	FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull
 	.section	.text.FtlFreeSysBLkSort,"ax",%progbits
@@ -724,28 +736,28 @@ FtlFreeSysBlkQueueFull:
 FtlFreeSysBLkSort:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L74
+	ldr	r3, .L75
 	push	{r4, r5, r6, lr}
 	ldrh	r2, [r3, #6]
-	cbz	r2, .L65
-	ldr	r2, .L74+4
+	cbz	r2, .L66
+	ldr	r2, .L75+4
 	movs	r6, #0
 	ldrh	r1, [r3, #2]
 	mov	r5, r6
 	ldrh	r4, [r2, #28]
 	ldrh	r2, [r3, #4]
 	and	r4, r4, #31
-.L67:
+.L68:
 	uxth	r0, r6
 	adds	r6, r6, #1
 	cmp	r4, r0
-	bgt	.L68
-	cbz	r5, .L65
+	bgt	.L69
+	cbz	r5, .L66
 	strh	r1, [r3, #2]	@ movhi
 	strh	r2, [r3, #4]	@ movhi
-.L65:
+.L66:
 	pop	{r4, r5, r6, pc}
-.L68:
+.L69:
 	adds	r0, r1, #4
 	adds	r1, r1, #1
 	ldrh	r5, [r3, r0, lsl #1]
@@ -755,10 +767,10 @@ FtlFreeSysBLkSort:
 	movs	r5, #1
 	add	r2, r2, r5
 	ubfx	r2, r2, #0, #10
-	b	.L67
-.L75:
+	b	.L68
+.L76:
 	.align	2
-.L74:
+.L75:
 	.word	.LANCHOR38
 	.word	.LANCHOR39
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
@@ -773,34 +785,34 @@ FtlFreeSysBLkSort:
 IsInFreeQueue:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L82
+	ldr	r3, .L83
 	push	{r4, r5, lr}
 	ldrh	r4, [r3, #6]
 	cmp	r4, #1024
-	beq	.L80
+	beq	.L81
 	ldrh	r5, [r3, #2]
 	movs	r1, #0
-.L78:
+.L79:
 	cmp	r1, r4
-	bcc	.L79
-.L80:
+	bcc	.L80
+.L81:
 	movs	r0, #0
 	pop	{r4, r5, pc}
-.L79:
+.L80:
 	adds	r2, r1, r5
 	ubfx	r2, r2, #0, #10
 	adds	r2, r2, #4
 	ldrh	r2, [r3, r2, lsl #1]
 	cmp	r2, r0
-	beq	.L81
+	beq	.L82
 	adds	r1, r1, #1
-	b	.L78
-.L81:
+	b	.L79
+.L82:
 	movs	r0, #1
 	pop	{r4, r5, pc}
-.L83:
+.L84:
 	.align	2
-.L82:
+.L83:
 	.word	.LANCHOR38
 	.size	IsInFreeQueue, .-IsInFreeQueue
 	.section	.text.insert_data_list,"ax",%progbits
@@ -814,12 +826,12 @@ IsInFreeQueue:
 insert_data_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L99
+	ldr	r3, .L100
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	ldrh	r8, [r3]
 	cmp	r8, r0
-	bls	.L86
-	ldr	r3, .L99+4
+	bls	.L87
+	ldr	r3, .L100+4
 	movs	r5, #6
 	muls	r5, r0, r5
 	ldr	r4, [r3]
@@ -827,79 +839,79 @@ insert_data_list:
 	adds	r1, r4, r5
 	strh	r3, [r1, #2]	@ movhi
 	strh	r3, [r4, r5]	@ movhi
-	ldr	r3, .L99+8
+	ldr	r3, .L100+8
 	ldr	ip, [r3]
 	cmp	ip, #0
-	bne	.L87
-.L98:
+	bne	.L88
+.L99:
 	str	r1, [r3]
-.L86:
+.L87:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L87:
-	ldr	r3, .L99+12
+.L88:
+	ldr	r3, .L100+12
 	ldrh	r6, [r1, #4]
 	ldr	r10, [r3]
 	ldrh	r3, [r10, r0, lsl #1]
-	cbz	r6, .L94
+	cbz	r6, .L95
 	muls	r6, r3, r6
-.L88:
+.L89:
 	sub	r2, ip, r4
 	movs	r7, #0
 	asrs	r3, r2, #1
-	ldr	r2, .L99+16
+	ldr	r2, .L100+16
 	muls	r2, r3, r2
 	mov	r3, ip
 	uxth	r2, r2
-.L92:
+.L93:
 	adds	r7, r7, #1
 	uxth	r7, r7
 	cmp	r8, r7
-	bcc	.L86
+	bcc	.L87
 	cmp	r2, r0
-	beq	.L86
+	beq	.L87
 	ldrh	lr, [r3, #4]
 	cmp	lr, #0
-	beq	.L90
+	beq	.L91
 	ldrh	fp, [r10, r2, lsl #1]
 	mul	lr, lr, fp
 	cmp	r6, lr
-	bls	.L90
+	bls	.L91
 	ldrh	lr, [r3]
 	movw	fp, #65535
 	cmp	lr, fp
-	bne	.L91
+	bne	.L92
 	strh	r2, [r1, #2]	@ movhi
 	strh	r0, [r3]	@ movhi
-	ldr	r3, .L99+20
-	b	.L98
-.L94:
+	ldr	r3, .L100+20
+	b	.L99
+.L95:
 	mov	r6, #-1
-	b	.L88
-.L91:
+	b	.L89
+.L92:
 	movs	r3, #6
 	mov	r2, lr
 	mla	r3, r3, lr, r4
-	b	.L92
-.L90:
+	b	.L93
+.L91:
 	strh	r2, [r4, r5]	@ movhi
 	cmp	r3, ip
 	ldrh	r2, [r3, #2]
 	strh	r2, [r1, #2]	@ movhi
-	bne	.L93
+	bne	.L94
 	strh	r0, [r3, #2]	@ movhi
-	ldr	r3, .L99+8
-	b	.L98
-.L93:
+	ldr	r3, .L100+8
+	b	.L99
+.L94:
 	ldrh	r1, [r3, #2]
 	movs	r2, #6
 	muls	r2, r1, r2
 	strh	r0, [r4, r2]	@ movhi
 	strh	r0, [r3, #2]	@ movhi
-	b	.L86
-.L100:
+	b	.L87
+.L101:
 	.align	2
-.L99:
+.L100:
 	.word	.LANCHOR5
 	.word	.LANCHOR40
 	.word	.LANCHOR41
@@ -920,25 +932,25 @@ INSERT_DATA_LIST:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	insert_data_list
-	ldr	r2, .L103
+	ldr	r2, .L104
 	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L103+4
+	ldr	r2, .L104+4
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bcs	.L101
+	bcs	.L102
 	movs	r2, #214
-	ldr	r1, .L103+8
-	ldr	r0, .L103+12
+	ldr	r1, .L104+8
+	ldr	r0, .L104+12
 	pop	{r3, lr}
 	b	printf
-.L101:
+.L102:
 	pop	{r3, pc}
-.L104:
+.L105:
 	.align	2
-.L103:
+.L104:
 	.word	.LANCHOR44
 	.word	.LANCHOR5
 	.word	.LANCHOR45
@@ -958,48 +970,48 @@ insert_free_list:
 	movw	r1, #65535
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	cmp	r0, r1
-	beq	.L106
-	ldr	r3, .L112
+	beq	.L107
+	ldr	r3, .L113
 	mov	r10, #6
 	mul	r7, r10, r0
 	ldr	r4, [r3]
-	ldr	r3, .L112+4
+	ldr	r3, .L113+4
 	adds	r5, r4, r7
 	ldr	r6, [r3]
 	mov	lr, r3
 	strh	r1, [r5, #2]	@ movhi
 	strh	r1, [r4, r7]	@ movhi
-	cbnz	r6, .L107
+	cbnz	r6, .L108
 	str	r5, [r3]
-.L106:
+.L107:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L107:
-	ldr	r3, .L112+8
+.L108:
+	ldr	r3, .L113+8
 	subs	r2, r6, r4
 	mov	fp, r1
 	ldr	ip, [r3]
 	asrs	r3, r2, #1
-	ldr	r2, .L112+12
+	ldr	r2, .L113+12
 	ldrh	r8, [ip, r0, lsl #1]
 	muls	r2, r3, r2
 	mov	r3, r6
 	uxth	r2, r2
-.L110:
+.L111:
 	ldrh	r1, [ip, r2, lsl #1]
 	cmp	r1, r8
-	bcs	.L108
+	bcs	.L109
 	ldrh	r1, [r3]
 	cmp	r1, fp
-	bne	.L109
+	bne	.L110
 	strh	r2, [r5, #2]	@ movhi
 	strh	r0, [r3]	@ movhi
-	b	.L106
-.L109:
+	b	.L107
+.L110:
 	mla	r3, r10, r1, r4
 	mov	r2, r1
-	b	.L110
-.L108:
+	b	.L111
+.L109:
 	ldrh	r1, [r3, #2]
 	cmp	r3, r6
 	strh	r1, [r5, #2]	@ movhi
@@ -1014,10 +1026,10 @@ insert_free_list:
 	itt	ne
 	strhne	r0, [r4, r2]	@ movhi
 	strhne	r0, [r3, #2]	@ movhi
-	b	.L106
-.L113:
+	b	.L107
+.L114:
 	.align	2
-.L112:
+.L113:
 	.word	.LANCHOR40
 	.word	.LANCHOR46
 	.word	.LANCHOR47
@@ -1036,25 +1048,25 @@ INSERT_FREE_LIST:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	insert_free_list
-	ldr	r2, .L116
+	ldr	r2, .L117
 	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L116+4
+	ldr	r2, .L117+4
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bcs	.L114
+	bcs	.L115
 	movs	r2, #207
-	ldr	r1, .L116+8
-	ldr	r0, .L116+12
+	ldr	r1, .L117+8
+	ldr	r0, .L117+12
 	pop	{r3, lr}
 	b	printf
-.L114:
+.L115:
 	pop	{r3, pc}
-.L117:
+.L118:
 	.align	2
-.L116:
+.L117:
 	.word	.LANCHOR48
 	.word	.LANCHOR5
 	.word	.LANCHOR49
@@ -1073,7 +1085,7 @@ List_remove_node:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r6, #6
-	ldr	r5, .L124
+	ldr	r5, .L125
 	muls	r6, r1, r6
 	movw	r3, #65535
 	mov	r8, r0
@@ -1081,20 +1093,20 @@ List_remove_node:
 	adds	r4, r7, r6
 	ldrh	r2, [r4, #2]
 	cmp	r2, r3
-	bne	.L119
+	bne	.L120
 	ldr	r3, [r0]
 	cmp	r4, r3
-	beq	.L119
+	beq	.L120
 	mov	r2, #372
-	ldr	r1, .L124+4
-	ldr	r0, .L124+8
+	ldr	r1, .L125+4
+	ldr	r0, .L125+8
 	bl	printf
-.L119:
+.L120:
 	ldr	r3, [r8]
 	movw	r1, #65535
 	cmp	r4, r3
 	ldrh	r3, [r7, r6]
-	bne	.L120
+	bne	.L121
 	cmp	r3, r1
 	ittee	ne
 	ldrne	r0, [r5]
@@ -1105,24 +1117,24 @@ List_remove_node:
 	mlane	r3, r2, r3, r0
 	strne	r3, [r8]
 	strhne	r1, [r3, #2]	@ movhi
-.L122:
+.L123:
 	movw	r3, #65535
 	movs	r0, #0
 	strh	r3, [r7, r6]	@ movhi
 	strh	r3, [r4, #2]	@ movhi
 	pop	{r4, r5, r6, r7, r8, pc}
-.L120:
+.L121:
 	cmp	r3, r1
 	ldrh	r1, [r4, #2]
-	bne	.L123
+	bne	.L124
 	cmp	r1, r3
-	beq	.L122
+	beq	.L123
 	movs	r2, #6
 	ldr	r0, [r5]
 	muls	r1, r2, r1
 	strh	r3, [r0, r1]	@ movhi
-	b	.L122
-.L123:
+	b	.L123
+.L124:
 	ldr	r0, [r5]
 	movs	r2, #6
 	mla	r5, r2, r3, r0
@@ -1130,10 +1142,10 @@ List_remove_node:
 	ldrh	r1, [r4, #2]
 	muls	r2, r1, r2
 	strh	r3, [r0, r2]	@ movhi
-	b	.L122
-.L125:
+	b	.L123
+.L126:
 	.align	2
-.L124:
+.L125:
 	.word	.LANCHOR40
 	.word	.LANCHOR50
 	.word	.LC1
@@ -1151,15 +1163,15 @@ List_pop_index_node:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	ldr	r3, [r0]
 	push	{r4, r5, r6, lr}
-	cbz	r3, .L132
-	ldr	r2, .L133
+	cbz	r3, .L133
+	ldr	r2, .L134
 	movw	r5, #65535
 	movs	r6, #6
 	ldr	r2, [r2]
-.L128:
-	cbnz	r1, .L129
-.L131:
-	ldr	r4, .L133+4
+.L129:
+	cbnz	r1, .L130
+.L132:
+	ldr	r4, .L134+4
 	subs	r3, r3, r2
 	asrs	r3, r3, #1
 	muls	r4, r3, r4
@@ -1167,20 +1179,20 @@ List_pop_index_node:
 	bl	List_remove_node
 	uxth	r0, r4
 	pop	{r4, r5, r6, pc}
-.L129:
+.L130:
 	ldrh	r4, [r3]
 	cmp	r4, r5
-	beq	.L131
+	beq	.L132
 	subs	r1, r1, #1
 	mla	r3, r6, r4, r2
 	uxth	r1, r1
-	b	.L128
-.L132:
+	b	.L129
+.L133:
 	movw	r0, #65535
 	pop	{r4, r5, r6, pc}
-.L134:
+.L135:
 	.align	2
-.L133:
+.L134:
 	.word	.LANCHOR40
 	.word	-1431655765
 	.size	List_pop_index_node, .-List_pop_index_node
@@ -1210,37 +1222,37 @@ List_pop_head_node:
 List_get_gc_head_node:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L142
+	ldr	r3, .L143
 	push	{r4, lr}
 	ldr	r3, [r3]
-	cbz	r3, .L141
-	ldr	r2, .L142+4
+	cbz	r3, .L142
+	ldr	r2, .L143+4
 	movs	r4, #6
 	ldr	r1, [r2]
 	movw	r2, #65535
-.L138:
-	cbz	r0, .L139
+.L139:
+	cbz	r0, .L140
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bne	.L140
-.L141:
+	bne	.L141
+.L142:
 	movw	r0, #65535
 	pop	{r4, pc}
-.L140:
+.L141:
 	subs	r0, r0, #1
 	mla	r3, r4, r3, r1
 	uxth	r0, r0
-	b	.L138
-.L139:
-	ldr	r0, .L142+8
+	b	.L139
+.L140:
+	ldr	r0, .L143+8
 	subs	r3, r3, r1
 	asrs	r3, r3, #1
 	muls	r3, r0, r3
 	uxth	r0, r3
 	pop	{r4, pc}
-.L143:
+.L144:
 	.align	2
-.L142:
+.L143:
 	.word	.LANCHOR41
 	.word	.LANCHOR40
 	.word	-1431655765
@@ -1256,61 +1268,61 @@ List_get_gc_head_node:
 List_update_data_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L155
+	ldr	r3, .L156
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L146
-	ldr	r3, .L155+4
+	beq	.L147
+	ldr	r3, .L156+4
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L146
-	ldr	r3, .L155+8
+	beq	.L147
+	ldr	r3, .L156+8
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L146
-	ldr	r7, .L155+12
+	beq	.L147
+	ldr	r7, .L156+12
 	movs	r6, #6
-	ldr	r3, .L155+16
+	ldr	r3, .L156+16
 	muls	r6, r0, r6
 	ldr	fp, [r7]
 	ldr	r3, [r3]
 	add	r10, fp, r6
 	cmp	r10, r3
-	beq	.L146
-	ldr	r3, .L155+20
+	beq	.L147
+	ldr	r3, .L156+20
 	ldrh	r5, [r10, #4]
 	ldr	r2, [r3]
 	mov	r8, r3
 	ldrh	r2, [r2, r0, lsl #1]
 	cmp	r5, #0
-	beq	.L153
+	beq	.L154
 	muls	r5, r2, r5
-.L148:
+.L149:
 	ldrh	r3, [r10, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L149
+	bne	.L150
 	ldrh	r2, [fp, r6]
 	cmp	r2, r3
-	bne	.L149
+	bne	.L150
 	movw	r2, #463
-	ldr	r1, .L155+24
-	ldr	r0, .L155+28
+	ldr	r1, .L156+24
+	ldr	r0, .L156+28
 	bl	printf
-.L149:
+.L150:
 	ldrh	r3, [r10, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L150
+	bne	.L151
 	ldrh	r2, [fp, r6]
 	cmp	r2, r3
-	beq	.L146
-.L150:
+	beq	.L147
+.L151:
 	movs	r2, #6
 	muls	r2, r3, r2
-	ldr	r3, .L155+32
+	ldr	r3, .L156+32
 	asrs	r1, r2, #1
 	muls	r3, r1, r3
 	ldr	r1, [r8]
@@ -1318,39 +1330,39 @@ List_update_data_list:
 	ldr	r1, [r7]
 	add	r2, r2, r1
 	ldrh	r3, [r2, #4]
-	cbz	r3, .L154
+	cbz	r3, .L155
 	muls	r3, r0, r3
-.L151:
+.L152:
 	cmp	r5, r3
-	bcs	.L146
-	ldr	r5, .L155+36
+	bcs	.L147
+	ldr	r5, .L156+36
 	mov	r1, r4
-	ldr	r0, .L155+16
+	ldr	r0, .L156+16
 	bl	List_remove_node
 	ldrh	r3, [r5]
-	cbnz	r3, .L152
+	cbnz	r3, .L153
 	mov	r2, #474
-	ldr	r1, .L155+24
-	ldr	r0, .L155+28
+	ldr	r1, .L156+24
+	ldr	r0, .L156+28
 	bl	printf
-.L152:
+.L153:
 	ldrh	r3, [r5]
 	mov	r0, r4
 	subs	r3, r3, #1
 	strh	r3, [r5]	@ movhi
 	bl	INSERT_DATA_LIST
-.L146:
+.L147:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L153:
-	mov	r5, #-1
-	b	.L148
 .L154:
+	mov	r5, #-1
+	b	.L149
+.L155:
 	mov	r3, #-1
-	b	.L151
-.L156:
+	b	.L152
+.L157:
 	.align	2
-.L155:
+.L156:
 	.word	.LANCHOR51
 	.word	.LANCHOR52
 	.word	.LANCHOR53
@@ -1375,79 +1387,79 @@ select_l2p_ram_region:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r1, #0
-	ldr	r3, .L167
+	ldr	r3, .L168
 	movs	r0, #12
 	movw	r5, #65535
 	ldrh	r2, [r3]
-	ldr	r3, .L167+4
+	ldr	r3, .L168+4
 	ldr	r3, [r3]
-.L158:
+.L159:
 	uxth	r4, r1
 	cmp	r4, r2
-	bcc	.L160
+	bcc	.L161
 	mov	r4, r2
 	movs	r1, #0
 	mov	r6, #-2147483648
 	movs	r7, #12
-.L161:
+.L162:
 	uxth	r5, r1
 	cmp	r5, r2
-	bcc	.L163
+	bcc	.L164
 	cmp	r4, r2
-	bcc	.L159
-	ldr	r1, .L167+8
+	bcc	.L160
+	ldr	r1, .L168+8
 	mov	r4, r2
 	mov	r0, #-1
 	ldrh	r7, [r1]
 	movs	r1, #0
-.L164:
+.L165:
 	uxth	r5, r1
 	cmp	r5, r2
-	bcc	.L166
+	bcc	.L167
 	cmp	r4, r2
-	bcc	.L159
+	bcc	.L160
 	movw	r2, #789
-	ldr	r1, .L167+12
-	ldr	r0, .L167+16
+	ldr	r1, .L168+12
+	ldr	r0, .L168+16
 	bl	printf
-	b	.L159
-.L160:
+	b	.L160
+.L161:
 	adds	r1, r1, #1
 	mla	r6, r0, r1, r3
 	ldrh	r6, [r6, #-12]
 	cmp	r6, r5
-	bne	.L158
-.L159:
+	bne	.L159
+.L160:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, pc}
-.L163:
+.L164:
 	mla	r0, r7, r1, r3
 	ldr	r0, [r0, #4]
 	cmp	r0, #0
-	blt	.L162
+	blt	.L163
 	cmp	r6, r0
 	itt	hi
 	movhi	r6, r0
 	movhi	r4, r5
-.L162:
+.L163:
 	adds	r1, r1, #1
-	b	.L161
-.L166:
+	b	.L162
+.L167:
 	ldr	r6, [r3, #4]
 	cmp	r0, r6
-	bls	.L165
+	bls	.L166
 	ldrh	ip, [r3]
 	cmp	ip, r7
 	itt	ne
 	movne	r0, r6
 	movne	r4, r5
-.L165:
+.L166:
 	adds	r1, r1, #1
 	adds	r3, r3, #12
-	b	.L164
-.L168:
+	b	.L165
+.L169:
 	.align	2
-.L167:
+.L168:
 	.word	.LANCHOR33
 	.word	.LANCHOR55
 	.word	.LANCHOR56
@@ -1465,45 +1477,45 @@ select_l2p_ram_region:
 FtlUpdateVaildLpn:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L179
+	ldr	r2, .L180
 	push	{r4, r5, r6, lr}
 	mov	r1, r2
 	ldrh	r3, [r2]
 	cmp	r3, #4
-	bhi	.L170
-	cbnz	r0, .L170
+	bhi	.L171
+	cbnz	r0, .L171
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
 	pop	{r4, r5, r6, pc}
-.L170:
+.L171:
 	movs	r3, #0
-	ldr	r0, .L179+4
+	ldr	r0, .L180+4
 	strh	r3, [r1]	@ movhi
 	movw	r6, #65535
-	ldr	r1, .L179+8
+	ldr	r1, .L180+8
 	ldrh	r4, [r0]
 	mov	r0, r3
-	ldr	r2, .L179+12
+	ldr	r2, .L180+12
 	ldr	r1, [r1]
 	str	r3, [r2]
 	add	r4, r1, r4, lsl #1
-.L171:
+.L172:
 	cmp	r1, r4
-	bne	.L173
-	cbz	r3, .L169
+	bne	.L174
+	cbz	r3, .L170
 	str	r0, [r2]
-.L169:
+.L170:
 	pop	{r4, r5, r6, pc}
-.L173:
+.L174:
 	ldrh	r5, [r1], #2
 	cmp	r5, r6
 	itt	ne
 	addne	r0, r0, r5
 	movne	r3, #1
-	b	.L171
-.L180:
+	b	.L172
+.L181:
 	.align	2
-.L179:
+.L180:
 	.word	.LANCHOR58
 	.word	.LANCHOR5
 	.word	.LANCHOR42
@@ -1522,10 +1534,10 @@ ftl_set_blk_mode:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	mov	r3, r0
-	cbz	r1, .L182
+	cbz	r1, .L183
 	b	ftl_set_blk_mode.part.6
-.L182:
-	ldr	r2, .L183
+.L183:
+	ldr	r2, .L184
 	lsrs	r0, r0, #5
 	and	r3, r3, #31
 	ldr	r1, [r2]
@@ -1535,9 +1547,9 @@ ftl_set_blk_mode:
 	bic	r2, r2, r3
 	str	r2, [r1, r0, lsl #2]
 	bx	lr
-.L184:
+.L185:
 	.align	2
-.L183:
+.L184:
 	.word	.LANCHOR1
 	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
 	.section	.text.ftl_get_blk_mode,"ax",%progbits
@@ -1552,7 +1564,7 @@ ftl_get_blk_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L186
+	ldr	r3, .L187
 	lsrs	r2, r0, #5
 	and	r0, r0, #31
 	ldr	r3, [r3]
@@ -1560,9 +1572,9 @@ ftl_get_blk_mode:
 	lsr	r0, r3, r0
 	and	r0, r0, #1
 	bx	lr
-.L187:
+.L188:
 	.align	2
-.L186:
+.L187:
 	.word	.LANCHOR1
 	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
 	.section	.text.ftl_sb_update_avl_pages,"ax",%progbits
@@ -1580,14 +1592,14 @@ ftl_sb_update_avl_pages:
 	push	{r4, r5, r6, lr}
 	strh	r3, [r0, #4]	@ movhi
 	movw	r6, #65535
-	ldr	r3, .L195
+	ldr	r3, .L196
 	ldrh	r4, [r3]
 	add	r3, r0, r2, lsl #1
 	adds	r3, r3, #14
-.L189:
+.L190:
 	cmp	r2, r4
-	bcc	.L191
-	ldr	r3, .L195+4
+	bcc	.L192
+	ldr	r3, .L196+4
 	add	r5, r0, #16
 	movw	r6, #65535
 	ldrh	r3, [r3]
@@ -1595,12 +1607,12 @@ ftl_sb_update_avl_pages:
 	subs	r1, r3, r1
 	movs	r3, #0
 	uxth	r1, r1
-.L192:
+.L193:
 	uxth	r2, r3
 	cmp	r4, r2
-	bhi	.L194
+	bhi	.L195
 	pop	{r4, r5, r6, pc}
-.L191:
+.L192:
 	ldrh	r5, [r3, #2]!
 	adds	r2, r2, #1
 	uxth	r2, r2
@@ -1609,8 +1621,8 @@ ftl_sb_update_avl_pages:
 	ldrhne	r5, [r0, #4]
 	addne	r5, r5, #1
 	strhne	r5, [r0, #4]	@ movhi
-	b	.L189
-.L194:
+	b	.L190
+.L195:
 	ldrh	r2, [r5], #2
 	adds	r3, r3, #1
 	cmp	r2, r6
@@ -1618,10 +1630,10 @@ ftl_sb_update_avl_pages:
 	ldrhne	r2, [r0, #4]
 	addne	r2, r2, r1
 	strhne	r2, [r0, #4]	@ movhi
-	b	.L192
-.L196:
+	b	.L193
+.L197:
 	.align	2
-.L195:
+.L196:
 	.word	.LANCHOR3
 	.word	.LANCHOR19
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
@@ -1638,24 +1650,24 @@ FtlSlcSuperblockCheck:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	ldrh	r3, [r0, #4]
 	push	{r4, r5, lr}
-	cbz	r3, .L197
+	cbz	r3, .L198
 	ldrh	r2, [r0]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L197
+	beq	.L198
 	ldrb	r2, [r0, #6]	@ zero_extendqisi2
 	movs	r5, #0
 	adds	r2, r2, #8
 	ldrh	r1, [r0, r2, lsl #1]
-	ldr	r2, .L203
+	ldr	r2, .L204
 	ldrh	r4, [r2]
 	mov	r2, r3
-.L200:
+.L201:
 	cmp	r1, r2
-	beq	.L202
-.L197:
+	beq	.L203
+.L198:
 	pop	{r4, r5, pc}
-.L202:
+.L203:
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	uxtb	r3, r3
@@ -1669,10 +1681,10 @@ FtlSlcSuperblockCheck:
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r1, [r0, r3, lsl #1]
-	b	.L200
-.L204:
+	b	.L201
+.L205:
 	.align	2
-.L203:
+.L204:
 	.word	.LANCHOR3
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
 	.section	.text.make_superblock,"ax",%progbits
@@ -1686,32 +1698,32 @@ FtlSlcSuperblockCheck:
 make_superblock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L211
+	ldr	r3, .L212
 	ldrh	r2, [r0]
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L206
+	bcc	.L207
 	movw	r2, #2148
-	ldr	r1, .L211+4
-	ldr	r0, .L211+8
+	ldr	r1, .L212+4
+	ldr	r0, .L212+8
 	bl	printf
-.L206:
-	ldr	r3, .L211+12
+.L207:
+	ldr	r3, .L212+12
 	add	r6, r4, #16
-	ldr	r10, .L211+24
+	ldr	r10, .L212+24
 	movw	r7, #65535
 	movs	r5, #0
 	ldrh	r8, [r3]
 	strh	r5, [r4, #4]	@ movhi
 	strb	r5, [r4, #7]
-.L207:
+.L208:
 	uxth	r3, r5
 	ldrh	r1, [r4]
 	cmp	r8, r3
-	bhi	.L209
-	ldr	r2, .L211+16
+	bhi	.L210
+	ldr	r2, .L212+16
 	movs	r0, #0
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r2]
@@ -1719,7 +1731,7 @@ make_superblock:
 	strh	r3, [r4, #4]	@ movhi
 	movs	r3, #0
 	strb	r3, [r4, #9]
-	ldr	r3, .L211+20
+	ldr	r3, .L212+20
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r1, lsl #1]
 	movw	r3, #10000
@@ -1728,24 +1740,24 @@ make_superblock:
 	movhi	r3, #1
 	strbhi	r3, [r4, #9]
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L209:
+.L210:
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
 	strh	r7, [r6]	@ movhi
 	mov	fp, r0
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L208
+	cbnz	r0, .L209
 	strh	fp, [r6]	@ movhi
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	strb	r3, [r4, #7]
-.L208:
+.L209:
 	adds	r5, r5, #1
 	adds	r6, r6, #2
-	b	.L207
-.L212:
+	b	.L208
+.L213:
 	.align	2
-.L211:
+.L212:
 	.word	.LANCHOR5
 	.word	.LANCHOR60
 	.word	.LC1
@@ -1767,46 +1779,46 @@ update_multiplier_value:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
 	movs	r5, #0
-	ldr	r3, .L219
+	ldr	r3, .L220
 	mov	r6, r0
 	mov	r4, r5
-	ldr	r10, .L219+12
+	ldr	r10, .L220+12
 	ldrh	r7, [r3]
-	ldr	r3, .L219+4
+	ldr	r3, .L220+4
 	ldrh	r8, [r3]
-.L214:
+.L215:
 	uxth	r3, r5
 	cmp	r7, r3
-	bhi	.L216
-	cbz	r4, .L218
+	bhi	.L217
+	cbz	r4, .L219
 	mov	r1, r4
 	mov	r0, #32768
 	bl	__aeabi_idiv
-.L217:
-	ldr	r3, .L219+8
+.L218:
+	ldr	r3, .L220+8
 	movs	r2, #6
 	ldr	r3, [r3]
 	mla	r6, r2, r6, r3
 	strh	r0, [r6, #4]	@ movhi
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L216:
+.L217:
 	mov	r1, r6
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L215
+	cbnz	r0, .L216
 	add	r4, r4, r8
 	uxth	r4, r4
-.L215:
+.L216:
 	adds	r5, r5, #1
-	b	.L214
-.L218:
+	b	.L215
+.L219:
 	mov	r0, r4
-	b	.L217
-.L220:
+	b	.L218
+.L221:
 	.align	2
-.L219:
+.L220:
 	.word	.LANCHOR3
 	.word	.LANCHOR19
 	.word	.LANCHOR40
@@ -1824,24 +1836,24 @@ GetFreeBlockMinEraseCount:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L224
+	ldr	r3, .L225
 	ldr	r0, [r3]
-	cbz	r0, .L222
-	ldr	r3, .L224+4
+	cbz	r0, .L223
+	ldr	r3, .L225+4
 	ldr	r3, [r3]
 	subs	r0, r0, r3
-	ldr	r3, .L224+8
+	ldr	r3, .L225+8
 	asrs	r0, r0, #1
 	muls	r0, r3, r0
-	ldr	r3, .L224+12
+	ldr	r3, .L225+12
 	ldr	r3, [r3]
 	uxth	r0, r0
 	ldrh	r0, [r3, r0, lsl #1]
-.L222:
+.L223:
 	bx	lr
-.L225:
+.L226:
 	.align	2
-.L224:
+.L225:
 	.word	.LANCHOR46
 	.word	.LANCHOR40
 	.word	-1431655765
@@ -1858,11 +1870,11 @@ GetFreeBlockMinEraseCount:
 GetFreeBlockMaxEraseCount:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L234
+	ldr	r3, .L235
 	push	{r4, r5, r6, lr}
 	ldr	r3, [r3]
-	cbz	r3, .L232
-	ldr	r2, .L234+4
+	cbz	r3, .L233
+	ldr	r2, .L235+4
 	movs	r5, #6
 	movw	r6, #65535
 	ldrh	r2, [r2]
@@ -1871,37 +1883,37 @@ GetFreeBlockMaxEraseCount:
 	cmp	r0, r2
 	it	gt
 	uxthgt	r0, r2
-	ldr	r2, .L234+8
+	ldr	r2, .L235+8
 	ldr	r1, [r2]
-	ldr	r2, .L234+12
+	ldr	r2, .L235+12
 	subs	r3, r3, r1
 	asrs	r3, r3, #1
 	muls	r3, r2, r3
 	movs	r2, #0
 	uxth	r3, r3
-.L229:
+.L230:
 	uxth	r4, r2
 	cmp	r0, r4
-	bls	.L231
+	bls	.L232
 	mul	r4, r5, r3
 	adds	r2, r2, #1
 	ldrh	r4, [r1, r4]
 	cmp	r4, r6
-	bne	.L233
-.L231:
-	ldr	r2, .L234+16
+	bne	.L234
+.L232:
+	ldr	r2, .L235+16
 	ldr	r2, [r2]
 	ldrh	r0, [r2, r3, lsl #1]
 	pop	{r4, r5, r6, pc}
-.L233:
+.L234:
 	mov	r3, r4
-	b	.L229
-.L232:
+	b	.L230
+.L233:
 	mov	r0, r3
 	pop	{r4, r5, r6, pc}
-.L235:
+.L236:
 	.align	2
-.L234:
+.L235:
 	.word	.LANCHOR46
 	.word	.LANCHOR48
 	.word	.LANCHOR40
@@ -1922,18 +1934,18 @@ free_data_superblock:
 	movw	r2, #65535
 	push	{r3, lr}
 	cmp	r0, r2
-	beq	.L237
-	ldr	r2, .L238
+	beq	.L238
+	ldr	r2, .L239
 	movs	r1, #0
 	ldr	r2, [r2]
 	strh	r1, [r2, r0, lsl #1]	@ movhi
 	bl	INSERT_FREE_LIST
-.L237:
+.L238:
 	movs	r0, #0
 	pop	{r3, pc}
-.L239:
+.L240:
 	.align	2
-.L238:
+.L239:
 	.word	.LANCHOR42
 	.size	free_data_superblock, .-free_data_superblock
 	.section	.text.get_new_active_ppa,"ax",%progbits
@@ -1952,45 +1964,45 @@ get_new_active_ppa:
 	movw	r3, #65535
 	mov	r4, r0
 	cmp	r2, r3
-	bne	.L241
+	bne	.L242
 	movw	r2, #2781
-	ldr	r1, .L255
-	ldr	r0, .L255+4
+	ldr	r1, .L256
+	ldr	r0, .L256+4
 	bl	printf
-.L241:
-	ldr	r6, .L255+8
+.L242:
+	ldr	r6, .L256+8
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r6]
 	cmp	r2, r3
-	bne	.L242
+	bne	.L243
 	movw	r2, #2782
-	ldr	r1, .L255
-	ldr	r0, .L255+4
+	ldr	r1, .L256
+	ldr	r0, .L256+4
 	bl	printf
-.L242:
+.L243:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L243
+	cbnz	r3, .L244
 	movw	r2, #2783
-	ldr	r1, .L255
-	ldr	r0, .L255+4
+	ldr	r1, .L256
+	ldr	r0, .L256+4
 	bl	printf
-.L243:
+.L244:
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	movs	r3, #0
 	strb	r3, [r4, #10]
 	movw	r5, #65535
 	adds	r2, r2, #8
 	ldrh	r0, [r4, r2, lsl #1]
-	ldr	r2, .L255+12
+	ldr	r2, .L256+12
 	ldrh	r1, [r2]
 	mov	r2, r3
-.L244:
+.L245:
 	cmp	r0, r5
-	beq	.L246
+	beq	.L247
 	ldrh	r5, [r4, #2]
 	ldrh	r6, [r6]
 	cmp	r5, r6
-	bcs	.L250
+	bcs	.L251
 	ldrh	r2, [r4, #4]
 	orr	r5, r5, r0, lsl #10
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
@@ -1998,7 +2010,7 @@ get_new_active_ppa:
 	subs	r2, r2, #1
 	uxth	r2, r2
 	strh	r2, [r4, #4]	@ movhi
-.L249:
+.L250:
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r1, r3
@@ -2010,20 +2022,20 @@ get_new_active_ppa:
 	add	r7, r3, #8
 	ldrh	r7, [r4, r7, lsl #1]
 	cmp	r7, r0
-	beq	.L249
+	beq	.L250
 	strb	r3, [r4, #6]
 	ldrh	r3, [r4, #2]
 	cmp	r3, r6
-	bne	.L240
-	cbz	r2, .L240
+	bne	.L241
+	cbz	r2, .L241
 	movw	r2, #2806
-	ldr	r1, .L255
-	ldr	r0, .L255+4
+	ldr	r1, .L256
+	ldr	r0, .L256+4
 	bl	printf
-.L240:
+.L241:
 	mov	r0, r5
 	pop	{r3, r4, r5, r6, r7, pc}
-.L246:
+.L247:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	uxtb	r3, r3
@@ -2037,13 +2049,13 @@ get_new_active_ppa:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r0, [r4, r3, lsl #1]
-	b	.L244
-.L250:
+	b	.L245
+.L251:
 	movw	r5, #65535
-	b	.L240
-.L256:
+	b	.L241
+.L257:
 	.align	2
-.L255:
+.L256:
 	.word	.LANCHOR61
 	.word	.LC1
 	.word	.LANCHOR19
@@ -2062,54 +2074,54 @@ FtlGcBufInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #0
-	ldr	r1, .L262
+	ldr	r1, .L263
 	mov	fp, #1
-	ldr	r2, .L262+4
+	ldr	r2, .L263+4
 	ldr	r5, [r1]
-	ldr	r1, .L262+8
+	ldr	r1, .L263+8
 	str	r3, [r2]
-	ldr	r2, .L262+12
+	ldr	r2, .L263+12
 	mov	r0, r5
 	ldr	r1, [r1]
 	ldrh	r2, [r2]
 	str	r1, [sp, #4]
-	ldr	r1, .L262+16
+	ldr	r1, .L263+16
 	ldrh	r1, [r1]
 	str	r1, [sp]
-	ldr	r1, .L262+20
+	ldr	r1, .L263+20
 	ldr	r10, [r1]
-	ldr	r1, .L262+24
+	ldr	r1, .L263+24
 	ldrh	r7, [r1]
-	ldr	r1, .L262+28
+	ldr	r1, .L263+28
 	ldr	r4, [r1]
 	movs	r1, #12
 	mla	r1, r2, r1, r1
 	adds	r4, r4, #8
 	add	r8, r5, r1
 	mov	r1, r3
-.L258:
+.L259:
 	adds	r0, r0, #12
 	ldr	r6, [sp]
 	cmp	r0, r8
 	add	ip, r3, r7
 	add	r4, r4, #20
 	add	lr, r1, r6
-	bne	.L259
-	ldr	r3, .L262+32
+	bne	.L260
+	ldr	r3, .L263+32
 	mov	lr, #12
 	mov	r8, #0
 	ldr	r0, [r3]
-	ldr	r3, .L262+8
+	ldr	r3, .L263+8
 	ldr	r4, [r3]
-	ldr	r3, .L262+20
+	ldr	r3, .L263+20
 	ldr	ip, [r3]
-.L260:
+.L261:
 	cmp	r2, r0
-	bcc	.L261
+	bcc	.L262
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L259:
+.L260:
 	bic	r1, r1, #3
 	bic	r3, r3, #3
 	mov	r6, r1
@@ -2123,8 +2135,8 @@ FtlGcBufInit:
 	str	r3, [r4, #-16]
 	mov	r3, ip
 	str	r6, [r4, #-20]
-	b	.L258
-.L261:
+	b	.L259
+.L262:
 	ldr	r3, [sp]
 	mul	r10, lr, r2
 	muls	r3, r2, r3
@@ -2139,10 +2151,10 @@ FtlGcBufInit:
 	bic	r3, r3, #3
 	add	r3, r3, ip
 	str	r3, [r1, #4]
-	b	.L260
-.L263:
+	b	.L261
+.L264:
 	.align	2
-.L262:
+.L263:
 	.word	.LANCHOR63
 	.word	.LANCHOR62
 	.word	.LANCHOR64
@@ -2164,41 +2176,41 @@ FtlGcBufInit:
 FtlGcBufFree:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L271
+	ldr	r3, .L272
 	mov	ip, #12
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
 	mov	fp, #20
 	mov	lr, r4
 	ldr	r7, [r3]
-	ldr	r3, .L271+4
+	ldr	r3, .L272+4
 	ldr	r5, [r3]
-.L265:
+.L266:
 	uxth	r3, r4
 	cmp	r1, r3
-	bls	.L264
+	bls	.L265
 	mla	r8, fp, r3, r0
 	movs	r2, #0
-.L266:
+.L267:
 	uxth	r3, r2
 	cmp	r7, r3
-	bls	.L267
+	bls	.L268
 	mul	r3, ip, r3
 	ldr	r6, [r8, #8]
 	adds	r2, r2, #1
 	add	r10, r5, r3
 	ldr	r3, [r5, r3]
 	cmp	r3, r6
-	bne	.L266
+	bne	.L267
 	str	lr, [r10, #8]
-.L267:
+.L268:
 	adds	r4, r4, #1
-	b	.L265
-.L264:
+	b	.L266
+.L265:
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L272:
+.L273:
 	.align	2
-.L271:
+.L272:
 	.word	.LANCHOR67
 	.word	.LANCHOR63
 	.size	FtlGcBufFree, .-FtlGcBufFree
@@ -2213,43 +2225,43 @@ FtlGcBufFree:
 FtlGcBufAlloc:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L280
+	ldr	r3, .L281
 	movs	r2, #0
 	push	{r4, r5, r6, r7, r8, r10, lr}
 	mov	ip, #12
 	movs	r7, #1
 	mov	lr, #20
 	ldr	r4, [r3]
-	ldr	r3, .L280+4
+	ldr	r3, .L281+4
 	ldr	r5, [r3]
-.L274:
+.L275:
 	uxth	r8, r2
 	cmp	r1, r8
-	bhi	.L278
+	bhi	.L279
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L278:
+.L279:
 	mov	r10, #0
-.L275:
+.L276:
 	uxth	r3, r10
 	cmp	r4, r3
-	bls	.L276
+	bls	.L277
 	mla	r3, ip, r3, r5
 	add	r10, r10, #1
 	ldr	r6, [r3, #8]
 	cmp	r6, #0
-	bne	.L275
+	bne	.L276
 	mla	r8, lr, r8, r0
 	str	r7, [r3, #8]
 	ldr	r6, [r3]
 	ldr	r3, [r3, #4]
 	str	r6, [r8, #8]
 	str	r3, [r8, #12]
-.L276:
+.L277:
 	adds	r2, r2, #1
-	b	.L274
-.L281:
+	b	.L275
+.L282:
 	.align	2
-.L280:
+.L281:
 	.word	.LANCHOR67
 	.word	.LANCHOR63
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
@@ -2265,25 +2277,25 @@ IsBlkInGcList:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L287
-	ldr	r2, .L287+4
+	ldr	r3, .L288
+	ldr	r2, .L288+4
 	ldr	r3, [r3]
 	ldrh	r2, [r2]
 	add	r2, r3, r2, lsl #1
-.L283:
+.L284:
 	cmp	r3, r2
-	bne	.L285
+	bne	.L286
 	movs	r0, #0
 	bx	lr
-.L285:
+.L286:
 	ldrh	r1, [r3], #2
 	cmp	r1, r0
-	bne	.L283
+	bne	.L284
 	movs	r0, #1
 	bx	lr
-.L288:
+.L289:
 	.align	2
-.L287:
+.L288:
 	.word	.LANCHOR68
 	.word	.LANCHOR69
 	.size	IsBlkInGcList, .-IsBlkInGcList
@@ -2300,35 +2312,35 @@ FtlGcUpdatePage:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r5, r0
-	ldr	r4, .L293
+	ldr	r4, .L294
 	ubfx	r0, r0, #10, #16
 	mov	r6, r1
 	mov	r7, r2
 	bl	P2V_block_in_plane
-	ldr	r3, .L293+4
+	ldr	r3, .L294+4
 	ldrh	r1, [r4]
 	ldr	r2, [r3]
 	movs	r3, #0
-.L290:
+.L291:
 	uxth	ip, r3
 	cmp	ip, r1
-	bcc	.L292
-	bne	.L291
+	bcc	.L293
+	bne	.L292
 	strh	r0, [r2, ip, lsl #1]	@ movhi
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	b	.L291
-.L292:
+	b	.L292
+.L293:
 	adds	r3, r3, #1
 	add	ip, r2, r3, lsl #1
 	ldrh	ip, [ip, #-2]
 	cmp	ip, r0
-	bne	.L290
-.L291:
-	ldr	r2, .L293+8
+	bne	.L291
+.L292:
+	ldr	r2, .L294+8
 	movs	r0, #12
-	ldr	r1, .L293+12
+	ldr	r1, .L294+12
 	ldrh	r3, [r2]
 	ldr	r1, [r1]
 	muls	r0, r3, r0
@@ -2339,9 +2351,9 @@ FtlGcUpdatePage:
 	str	r5, [r1, r0]
 	strh	r3, [r2]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.L294:
+.L295:
 	.align	2
-.L293:
+.L294:
 	.word	.LANCHOR69
 	.word	.LANCHOR68
 	.word	.LANCHOR70
@@ -2359,29 +2371,29 @@ FtlGcRefreshBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, lr}
-	ldr	r4, .L298
+	ldr	r4, .L299
 	ldrh	r5, [r4]
 	cmp	r5, r0
-	beq	.L296
-	ldr	r3, .L298+4
+	beq	.L297
+	ldr	r3, .L299+4
 	ldrh	r1, [r3]
 	cmp	r0, r1
-	beq	.L296
+	beq	.L297
 	movw	r2, #65535
 	cmp	r5, r2
-	bne	.L297
+	bne	.L298
 	strh	r0, [r4]	@ movhi
-.L296:
+.L297:
 	movs	r0, #0
 	pop	{r4, r5, pc}
-.L297:
+.L298:
 	cmp	r1, r2
 	it	eq
 	strheq	r0, [r3]	@ movhi
-	b	.L296
-.L299:
+	b	.L297
+.L300:
 	.align	2
-.L298:
+.L299:
 	.word	.LANCHOR72
 	.word	.LANCHOR73
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
@@ -2400,33 +2412,33 @@ FtlGcMarkBadPhyBlk:
 	mov	r4, r0
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-	ldr	r2, .L304
+	ldr	r2, .L305
 	movs	r1, #0
-	ldr	r5, .L304+4
+	ldr	r5, .L305+4
 	ldrh	r3, [r2]
-.L301:
+.L302:
 	uxth	r0, r1
 	cmp	r3, r0
-	bhi	.L303
+	bhi	.L304
 	cmp	r3, #15
 	itttt	ls
 	addls	r1, r3, #1
 	strhls	r1, [r2]	@ movhi
-	ldrls	r2, .L304+4
+	ldrls	r2, .L305+4
 	strhls	r4, [r2, r3, lsl #1]	@ movhi
-	b	.L302
-.L303:
+	b	.L303
+.L304:
 	adds	r1, r1, #1
 	add	r0, r5, r1, lsl #1
 	ldrh	r0, [r0, #-2]
 	cmp	r0, r4
-	bne	.L301
-.L302:
+	bne	.L302
+.L303:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L305:
+.L306:
 	.align	2
-.L304:
+.L305:
 	.word	.LANCHOR74
 	.word	.LANCHOR75
 	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
@@ -2441,22 +2453,22 @@ FtlGcMarkBadPhyBlk:
 FtlGcReFreshBadBlk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L312
+	ldr	r3, .L313
 	push	{r4, lr}
 	ldrh	r3, [r3]
-	cbz	r3, .L307
-	ldr	r2, .L312+4
+	cbz	r3, .L308
+	ldr	r2, .L313+4
 	ldrh	r1, [r2]
 	movw	r2, #65535
 	cmp	r1, r2
-	bne	.L307
-	ldr	r4, .L312+8
+	bne	.L308
+	ldr	r4, .L313+8
 	ldrh	r2, [r4]
 	cmp	r2, r3
 	itt	cs
 	movcs	r3, #0
 	strhcs	r3, [r4]	@ movhi
-	ldr	r3, .L312+12
+	ldr	r3, .L313+12
 	ldrh	r2, [r4]
 	ldrh	r0, [r3, r2, lsl #1]
 	bl	P2V_block_in_plane
@@ -2464,12 +2476,12 @@ FtlGcReFreshBadBlk:
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-.L307:
+.L308:
 	movs	r0, #0
 	pop	{r4, pc}
-.L313:
+.L314:
 	.align	2
-.L312:
+.L313:
 	.word	.LANCHOR74
 	.word	.LANCHOR72
 	.word	.LANCHOR76
@@ -2523,48 +2535,48 @@ rknand_print_hex:
 	mov	r10, r3
 	mov	r5, r6
 	mov	r4, r6
-.L317:
+.L318:
 	cmp	r4, r10
-	bcc	.L323
-	ldr	r0, .L326
+	bcc	.L324
+	ldr	r0, .L327
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
 	b	printf
-.L323:
-	cbnz	r5, .L318
+.L324:
+	cbnz	r5, .L319
 	mov	r2, r6
 	mov	r1, fp
-	ldr	r0, .L326+4
+	ldr	r0, .L327+4
 	bl	printf
-.L318:
+.L319:
 	cmp	r8, #4
-	bne	.L319
+	bne	.L320
 	ldr	r1, [r7, r4, lsl #2]
+.L326:
+	ldr	r0, .L327+8
 .L325:
-	ldr	r0, .L326+8
-.L324:
 	adds	r5, r5, #1
 	bl	printf
 	cmp	r5, #15
-	bls	.L322
+	bls	.L323
 	movs	r5, #0
-	ldr	r0, .L326
+	ldr	r0, .L327
 	bl	printf
-.L322:
+.L323:
 	adds	r4, r4, #1
 	add	r6, r6, r8
-	b	.L317
-.L319:
+	b	.L318
+.L320:
 	cmp	r8, #2
-	bne	.L321
+	bne	.L322
 	ldrh	r1, [r7, r4, lsl #1]
-	b	.L325
-.L321:
+	b	.L326
+.L322:
 	ldrb	r1, [r7, r4]	@ zero_extendqisi2
-	ldr	r0, .L326+12
-	b	.L324
-.L327:
+	ldr	r0, .L327+12
+	b	.L325
+.L328:
 	.align	2
-.L326:
+.L327:
 	.word	.LC5
 	.word	.LC2
 	.word	.LC3
@@ -2583,41 +2595,41 @@ FlashEraseBlocks:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-	ldr	r6, .L344
+	ldr	r6, .L345
 	add	r8, r0, #4
 	movs	r7, #0
-	ldr	fp, .L344+20
+	ldr	fp, .L345+20
 	ldrh	r10, [r6, #12]
 	str	r2, [sp]
 	lsl	r3, r10, #3
 	str	r3, [sp, #4]
-.L329:
+.L330:
 	ldr	r3, [sp]
 	cmp	r7, r3
-	beq	.L343
+	beq	.L344
 	add	r2, sp, #8
 	add	r1, sp, #12
 	ldr	r0, [r8]
 	bl	l2p_addr_tran.isra.0
 	ldr	r5, [sp, #8]
-	cbnz	r5, .L330
+	cbnz	r5, .L331
 	ldr	r2, [sp, #12]
 	ldr	r3, [sp, #4]
 	cmp	r3, r2
-	bls	.L330
-	ldr	r6, .L344+4
-	ldr	r7, .L344+8
-.L331:
+	bls	.L331
+	ldr	r6, .L345+4
+	ldr	r7, .L345+8
+.L332:
 	ldr	r3, [sp]
 	adds	r4, r4, #20
 	cmp	r5, r3
-	bne	.L332
-.L343:
+	bne	.L333
+.L344:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L332:
+.L333:
 	mov	r3, #-1
 	ldr	r2, [sp, #12]
 	str	r3, [r4, #-20]
@@ -2628,44 +2640,44 @@ FlashEraseBlocks:
 	movs	r3, #16
 	movs	r2, #4
 	ldr	r1, [r4, #-12]
-	ldr	r0, .L344+12
+	ldr	r0, .L345+12
 	bl	rknand_print_hex
 	movs	r3, #4
 	ldr	r1, [r4, #-8]
 	mov	r2, r3
-	ldr	r0, .L344+16
+	ldr	r0, .L345+16
 	bl	rknand_print_hex
-	b	.L331
-.L330:
+	b	.L332
+.L331:
 	ldr	r2, [fp, #4]
 	uxtb	r0, r5
 	ldr	r1, [sp, #12]
 	blx	r2
-	cbnz	r0, .L333
+	cbnz	r0, .L334
 	str	r0, [r8, #-4]
-.L334:
+.L335:
 	ldrh	r2, [r6, #14]
 	cmp	r2, #4
-	bne	.L336
+	bne	.L337
 	ldr	r1, [sp, #12]
 	ldr	r2, [fp, #4]
 	ldrb	r0, [sp, #8]	@ zero_extendqisi2
 	add	r1, r1, r10
 	blx	r2
-	cbz	r0, .L336
+	cbz	r0, .L337
 	mov	r2, #-1
 	str	r2, [r8, #-4]
-.L336:
+.L337:
 	adds	r7, r7, #1
 	add	r8, r8, #20
-	b	.L329
-.L333:
+	b	.L330
+.L334:
 	mov	r2, #-1
 	str	r2, [r8, #-4]
-	b	.L334
-.L345:
+	b	.L335
+.L346:
 	.align	2
-.L344:
+.L345:
 	.word	.LANCHOR0
 	.word	.LANCHOR77
 	.word	.LC6
@@ -2690,14 +2702,14 @@ FtlFreeSysBlkQueueIn:
 	push	{r4, r5, r6, lr}
 	mov	r5, r0
 	cmp	r3, r2
-	bhi	.L346
-	ldr	r4, .L355
+	bhi	.L347
+	ldr	r4, .L356
 	ldrh	r3, [r4, #6]
 	cmp	r3, #1024
-	beq	.L346
-	cbz	r1, .L348
+	beq	.L347
+	cbz	r1, .L349
 	bl	P2V_block_in_plane
-	ldr	r3, .L355+4
+	ldr	r3, .L356+4
 	mov	r6, r0
 	movs	r2, #1
 	mov	r1, r2
@@ -2705,16 +2717,16 @@ FtlFreeSysBlkQueueIn:
 	lsls	r3, r5, #10
 	str	r3, [r0, #4]
 	bl	FlashEraseBlocks
-	ldr	r3, .L355+8
+	ldr	r3, .L356+8
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r6, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r6, lsl #1]	@ movhi
-	ldr	r2, .L355+12
+	ldr	r2, .L356+12
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
-.L348:
+.L349:
 	ldrh	r3, [r4, #6]
 	adds	r3, r3, #1
 	strh	r3, [r4, #6]	@ movhi
@@ -2724,11 +2736,11 @@ FtlFreeSysBlkQueueIn:
 	ubfx	r3, r3, #0, #10
 	strh	r5, [r4, r2, lsl #1]	@ movhi
 	strh	r3, [r4, #4]	@ movhi
-.L346:
+.L347:
 	pop	{r4, r5, r6, pc}
-.L356:
+.L357:
 	.align	2
-.L355:
+.L356:
 	.word	.LANCHOR38
 	.word	.LANCHOR79
 	.word	.LANCHOR47
@@ -2746,9 +2758,9 @@ FtlFreeSysBlkQueueOut:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	ldr	r4, .L362
+	ldr	r4, .L363
 	ldrh	r2, [r4, #6]
-	cbz	r2, .L361
+	cbz	r2, .L362
 	ldrh	r3, [r4, #2]
 	subs	r2, r2, #1
 	strh	r2, [r4, #6]	@ movhi
@@ -2759,36 +2771,36 @@ FtlFreeSysBlkQueueOut:
 	ldrh	r5, [r4, r1, lsl #1]
 	strh	r3, [r4, #2]	@ movhi
 	mov	r1, r2
-	ldr	r3, .L362+4
+	ldr	r3, .L363+4
 	ldr	r0, [r3]
 	lsls	r3, r5, #10
 	str	r3, [r0, #4]
 	bl	FlashEraseBlocks
-	ldr	r2, .L362+8
+	ldr	r2, .L363+8
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
-.L358:
+.L359:
 	subs	r3, r5, #1
 	movw	r2, #65533
 	uxth	r3, r3
 	cmp	r3, r2
-	bls	.L359
+	bls	.L360
 	ldrh	r2, [r4, #6]
 	mov	r1, r5
-	ldr	r0, .L362+12
+	ldr	r0, .L363+12
 	bl	printf
-.L360:
-	b	.L360
 .L361:
+	b	.L361
+.L362:
 	movw	r5, #65535
-	b	.L358
-.L359:
+	b	.L359
+.L360:
 	mov	r0, r5
 	pop	{r3, r4, r5, pc}
-.L363:
+.L364:
 	.align	2
-.L362:
+.L363:
 	.word	.LANCHOR38
 	.word	.LANCHOR79
 	.word	.LANCHOR80
@@ -2810,16 +2822,16 @@ ftl_map_blk_alloc_new_blk:
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r4, r0
 	movs	r3, #0
-.L365:
+.L366:
 	uxth	r5, r3
 	cmp	r5, r1
-	bcs	.L368
+	bcs	.L369
 	mov	r7, r2
 	adds	r3, r3, #1
 	ldrh	r6, [r7]
 	adds	r2, r2, #2
 	cmp	r6, #0
-	bne	.L365
+	bne	.L366
 	bl	FtlFreeSysBlkQueueOut
 	subs	r3, r0, #1
 	movw	r2, #65533
@@ -2827,14 +2839,14 @@ ftl_map_blk_alloc_new_blk:
 	mov	r1, r0
 	strh	r0, [r7]	@ movhi
 	cmp	r3, r2
-	bls	.L366
-	ldr	r3, .L372
-	ldr	r0, .L372+4
+	bls	.L367
+	ldr	r3, .L373
+	ldr	r0, .L373+4
 	ldrh	r2, [r3, #6]
 	bl	printf
+.L368:
+	b	.L368
 .L367:
-	b	.L367
-.L366:
 	ldr	r3, [r4, #28]
 	strh	r6, [r4, #2]	@ movhi
 	strh	r5, [r4]	@ movhi
@@ -2843,20 +2855,20 @@ ftl_map_blk_alloc_new_blk:
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-.L368:
+.L369:
 	ldrh	r3, [r4, #10]
 	cmp	r3, r5
-	bhi	.L370
+	bhi	.L371
 	movw	r2, #578
-	ldr	r1, .L372+8
-	ldr	r0, .L372+12
+	ldr	r1, .L373+8
+	ldr	r0, .L373+12
 	bl	printf
-.L370:
+.L371:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L373:
+.L374:
 	.align	2
-.L372:
+.L373:
 	.word	.LANCHOR38
 	.word	.LC10
 	.word	.LANCHOR81
@@ -2887,102 +2899,102 @@ ftl_memset:
 FtlMemInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L380
+	ldr	r3, .L381
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r2, .L380+4
+	ldr	r2, .L381+4
 	movs	r6, #12
 	str	r4, [r3]
-	ldr	r3, .L380+8
-	ldr	r5, .L380+12
-	ldr	r10, .L380+292
+	ldr	r3, .L381+8
+	ldr	r5, .L381+12
+	ldr	r10, .L381+292
 	str	r4, [r3]
-	ldr	r3, .L380+16
+	ldr	r3, .L381+16
 	ldrh	r0, [r5]
-	ldr	r8, .L380+296
+	ldr	r8, .L381+296
 	str	r4, [r3]
-	ldr	r3, .L380+20
+	ldr	r3, .L381+20
 	lsls	r0, r0, #1
-	ldr	fp, .L380+300
+	ldr	fp, .L381+300
 	str	r4, [r3]
-	ldr	r3, .L380+24
+	ldr	r3, .L381+24
 	str	r4, [r3]
-	ldr	r3, .L380+28
+	ldr	r3, .L381+28
 	str	r4, [r3]
-	ldr	r3, .L380+32
+	ldr	r3, .L381+32
 	str	r4, [r3]
-	ldr	r3, .L380+36
+	ldr	r3, .L381+36
 	str	r4, [r3]
-	ldr	r3, .L380+40
+	ldr	r3, .L381+40
 	str	r4, [r3]
-	ldr	r3, .L380+44
+	ldr	r3, .L381+44
 	str	r4, [r3]
-	ldr	r3, .L380+48
+	ldr	r3, .L381+48
 	str	r4, [r3]
-	ldr	r3, .L380+52
+	ldr	r3, .L381+52
 	str	r4, [r3]
-	ldr	r3, .L380+56
+	ldr	r3, .L381+56
 	str	r4, [r3]
-	ldr	r3, .L380+60
+	ldr	r3, .L381+60
 	str	r4, [r3]
-	ldr	r3, .L380+64
+	ldr	r3, .L381+64
 	str	r4, [r3]
 	movw	r3, #65535
 	str	r3, [r2]
-	ldr	r2, .L380+68
+	ldr	r2, .L381+68
 	str	r4, [r2]
-	ldr	r2, .L380+72
+	ldr	r2, .L381+72
 	str	r4, [r2]
-	ldr	r2, .L380+76
+	ldr	r2, .L381+76
 	str	r4, [r2]
-	ldr	r2, .L380+80
+	ldr	r2, .L381+80
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L380+84
+	ldr	r2, .L381+84
 	strh	r3, [r2]	@ movhi
 	movs	r2, #32
-	ldr	r3, .L380+88
+	ldr	r3, .L381+88
 	strh	r2, [r3]	@ movhi
 	movs	r2, #128
-	ldr	r3, .L380+92
+	ldr	r3, .L381+92
 	strh	r2, [r3]	@ movhi
-	ldr	r3, .L380+96
+	ldr	r3, .L381+96
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L380+100
+	ldr	r3, .L381+100
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L380+104
+	ldr	r3, .L381+104
 	strh	r4, [r3]	@ movhi
 	bl	ftl_malloc
-	ldr	r3, .L380+108
+	ldr	r3, .L381+108
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	movs	r5, #20
 	muls	r0, r6, r0
 	bl	ftl_malloc
-	ldr	r3, .L380+112
+	ldr	r3, .L381+112
 	str	r0, [r3]
 	ldrh	r3, [r10]
 	muls	r5, r3, r5
 	lsls	r7, r5, #2
 	mov	r0, r7
 	bl	ftl_malloc
-	ldr	r3, .L380+116
+	ldr	r3, .L381+116
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L380+120
+	ldr	r3, .L381+120
 	str	r0, [r3]
 	mov	r0, r7
 	bl	ftl_malloc
-	ldr	r3, .L380+124
-	ldr	r7, .L380+128
+	ldr	r3, .L381+124
+	ldr	r7, .L381+128
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L380+132
+	ldr	r3, .L381+132
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L380+136
+	ldr	r3, .L381+136
 	ldrh	r5, [r7]
 	str	r0, [r3]
 	ldrh	r3, [r10]
@@ -2991,166 +3003,166 @@ FtlMemInit:
 	adds	r3, r3, #1
 	str	r3, [r8]
 	bl	ftl_malloc
-	ldr	r3, .L380+140
+	ldr	r3, .L381+140
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L380+144
+	ldr	r3, .L381+144
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L380+148
+	ldr	r3, .L381+148
 	str	r0, [r3]
 	ldr	r0, [r8]
 	muls	r0, r5, r0
 	bl	ftl_malloc
-	ldr	r3, .L380+152
+	ldr	r3, .L381+152
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L380+156
+	ldr	r3, .L381+156
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L380+160
+	ldr	r3, .L381+160
 	str	r0, [r3]
 	ldr	r0, [r8]
 	muls	r0, r6, r0
 	bl	ftl_malloc
-	ldr	r3, .L380+164
+	ldr	r3, .L381+164
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L380+168
+	ldr	r3, .L381+168
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L380+172
+	ldr	r3, .L381+172
 	str	r0, [r3]
-	ldr	r3, .L380+176
+	ldr	r3, .L381+176
 	ldrh	r0, [r3]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L380+180
+	ldr	r3, .L381+180
 	ldrh	r5, [r10]
-	ldr	r10, .L380+304
+	ldr	r10, .L381+304
 	str	r0, [r3]
 	ldrh	r3, [fp]
 	muls	r5, r3, r5
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L380+184
+	ldr	r3, .L381+184
 	str	r0, [r3]
 	lsls	r0, r5, #2
-	ldr	r5, .L380+188
+	ldr	r5, .L381+188
 	bl	ftl_malloc
-	ldr	r3, .L380+192
+	ldr	r3, .L381+192
 	str	r0, [r3]
 	ldrh	r3, [fp]
 	ldr	r0, [r8]
-	ldr	r8, .L380+308
+	ldr	r8, .L381+308
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L380+196
+	ldr	r3, .L381+196
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	uxth	r0, r0
 	strh	r0, [r8]	@ movhi
 	bl	ftl_malloc
-	ldr	r3, .L380+200
+	ldr	r3, .L381+200
 	str	r0, [r3]
 	ldrh	r3, [r8]
-	ldr	r0, .L380+204
+	ldr	r0, .L381+204
 	addw	r3, r3, #547
 	lsrs	r3, r3, #9
 	and	r0, r0, r3, lsl #9
 	strh	r3, [r8]	@ movhi
 	bl	ftl_malloc
-	ldr	r3, .L380+208
+	ldr	r3, .L381+208
 	str	r0, [r3]
 	adds	r0, r0, #32
-	ldr	r3, .L380+212
+	ldr	r3, .L381+212
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L380+216
+	ldr	r3, .L381+216
 	str	r0, [r3]
 	ldr	r3, [r10]
 	lsl	r8, r3, #1
 	mov	r0, r8
 	bl	ftl_malloc
-	ldr	r3, .L380+220
+	ldr	r3, .L381+220
 	str	r0, [r3]
 	mov	r0, r8
 	bl	ftl_malloc
-	ldr	r3, .L380+224
-	ldr	r8, .L380+312
+	ldr	r3, .L381+224
+	ldr	r8, .L381+312
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	lsrs	r0, r0, #3
 	adds	r0, r0, #4
 	bl	ftl_malloc
-	ldr	r3, .L380+228
+	ldr	r3, .L381+228
 	str	r0, [r3]
 	ldrh	r0, [r8]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L380+232
+	ldr	r3, .L381+232
 	str	r0, [r3]
 	ldrh	r0, [r8]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L380+236
+	ldr	r3, .L381+236
 	str	r0, [r3]
 	ldrh	r0, [r8]
-	ldr	r8, .L380+316
+	ldr	r8, .L381+316
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L380+240
+	ldr	r3, .L381+240
 	str	r0, [r3]
 	ldrh	r0, [r8]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
 	ldrh	r2, [r8]
 	mov	r1, r4
-	ldr	r3, .L380+244
-	ldr	r4, .L380+248
+	ldr	r3, .L381+244
+	ldr	r4, .L381+248
 	lsls	r2, r2, #2
 	str	r0, [r3]
 	bl	ftl_memset
-	ldr	r3, .L380+252
+	ldr	r3, .L381+252
 	ldrh	r0, [r3]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L380+256
+	ldr	r3, .L381+256
 	str	r0, [r3]
 	ldr	r0, [r10]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L380+260
+	ldr	r3, .L381+260
 	str	r0, [r3]
 	ldrh	r0, [r4]
 	muls	r0, r6, r0
-	ldr	r6, .L380+264
+	ldr	r6, .L381+264
 	bl	ftl_malloc
-	ldr	r3, .L380+268
+	ldr	r3, .L381+268
 	str	r0, [r3]
 	ldrh	r3, [r4]
 	ldrh	r0, [r7]
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L380+272
+	ldr	r3, .L381+272
 	str	r0, [r3]
 	movs	r0, #6
 	ldrh	r3, [r5]
-	ldr	r5, .L380+276
+	ldr	r5, .L381+276
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L380+280
+	ldr	r3, .L381+280
 	str	r0, [r3]
-	ldr	r3, .L380+284
+	ldr	r3, .L381+284
 	ldrh	r0, [r3]
 	ldrh	r3, [r6]
 	adds	r0, r0, #31
@@ -3161,16 +3173,16 @@ FtlMemInit:
 	bl	ftl_malloc
 	ldrh	r1, [r5]
 	movs	r2, #1
-	ldr	r3, .L380+288
+	ldr	r3, .L381+288
 	ldrh	r6, [r6]
 	lsls	r1, r1, #2
 	mov	r4, r3
 	str	r0, [r4, #28]!
 	mov	r0, r1
-	b	.L381
-.L382:
+	b	.L382
+.L383:
 	.align	2
-.L380:
+.L381:
 	.word	.LANCHOR82
 	.word	.LANCHOR96
 	.word	.LANCHOR83
@@ -3251,32 +3263,32 @@ FtlMemInit:
 	.word	.LANCHOR116
 	.word	.LANCHOR27
 	.word	.LANCHOR28
-.L381:
-.L376:
+.L382:
+.L377:
 	cmp	r2, r6
-	bcc	.L377
+	bcc	.L378
 	add	r3, r3, r2, lsl #2
-	ldr	r2, .L383
+	ldr	r2, .L384
 	movs	r1, #0
 	adds	r3, r3, #24
-.L378:
+.L379:
 	cmp	r3, r2
-	bne	.L379
+	bne	.L380
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L377:
+.L378:
 	ldr	r5, [r3, #28]
 	adds	r2, r2, #1
 	add	r5, r5, r0
 	add	r0, r0, r1
 	str	r5, [r4, #4]!
-	b	.L376
-.L379:
+	b	.L377
+.L380:
 	str	r1, [r3, #4]!
-	b	.L378
-.L384:
+	b	.L379
+.L385:
 	.align	2
-.L383:
+.L384:
 	.word	.LANCHOR37+56
 	.size	FtlMemInit, .-FtlMemInit
 	.section	.text.FtlBbt2Bitmap,"ax",%progbits
@@ -3290,32 +3302,32 @@ FtlMemInit:
 FtlBbt2Bitmap:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L391
+	ldr	r3, .L392
 	push	{r4, r5, r6, r7, r8, lr}
 	mov	r5, r0
-	ldr	r7, .L391+4
+	ldr	r7, .L392+4
 	mov	r6, r1
 	subs	r4, r5, #2
 	addw	r5, r5, #1022
 	ldrh	r2, [r3]
 	movs	r1, #0
-	ldr	r8, .L391+12
+	ldr	r8, .L392+12
 	mov	r0, r6
 	lsls	r2, r2, #2
 	bl	ftl_memset
-.L388:
+.L389:
 	ldrh	r3, [r4, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L385
+	beq	.L386
 	ldrh	r2, [r7]
 	cmp	r2, r3
-	bhi	.L387
+	bhi	.L388
 	movs	r2, #74
 	mov	r1, r8
-	ldr	r0, .L391+8
+	ldr	r0, .L392+8
 	bl	printf
-.L387:
+.L388:
 	ldrh	r3, [r4, #2]!
 	movs	r2, #1
 	cmp	r5, r4
@@ -3325,12 +3337,12 @@ FtlBbt2Bitmap:
 	ldr	r2, [r6, r1, lsl #2]
 	orr	r2, r2, r3
 	str	r2, [r6, r1, lsl #2]
-	bne	.L388
-.L385:
+	bne	.L389
+.L386:
 	pop	{r4, r5, r6, r7, r8, pc}
-.L392:
+.L393:
 	.align	2
-.L391:
+.L392:
 	.word	.LANCHOR127
 	.word	.LANCHOR17
 	.word	.LC1
@@ -3348,7 +3360,7 @@ FtlBbtMemInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r0, .L394
+	ldr	r0, .L395
 	movw	r3, #65535
 	movs	r2, #16
 	movs	r1, #255
@@ -3357,9 +3369,9 @@ FtlBbtMemInit:
 	strh	r3, [r0, #6]	@ movhi
 	adds	r0, r0, #12
 	b	ftl_memset
-.L395:
+.L396:
 	.align	2
-.L394:
+.L395:
 	.word	.LANCHOR37
 	.size	FtlBbtMemInit, .-FtlBbtMemInit
 	.section	.text.FtlFreeSysBlkQueueInit,"ax",%progbits
@@ -3373,7 +3385,7 @@ FtlBbtMemInit:
 FtlFreeSysBlkQueueInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L397
+	ldr	r3, .L398
 	mov	r2, #2048
 	push	{r4, lr}
 	movs	r4, #0
@@ -3386,9 +3398,9 @@ FtlFreeSysBlkQueueInit:
 	bl	ftl_memset
 	mov	r0, r4
 	pop	{r4, pc}
-.L398:
+.L399:
 	.align	2
-.L397:
+.L398:
 	.word	.LANCHOR38
 	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
 	.section	.text.ftl_free_no_use_map_blk,"ax",%progbits
@@ -3413,12 +3425,12 @@ ftl_free_no_use_map_blk:
 	mov	r0, r5
 	bl	ftl_memset
 	movs	r3, #0
-.L400:
+.L401:
 	ldrh	r1, [r4, #6]
 	uxth	r2, r3
 	cmp	r1, r2
-	bhi	.L404
-	ldr	r3, .L419
+	bhi	.L405
+	ldr	r3, .L420
 	movs	r6, #0
 	mov	r10, r6
 	ldrh	r2, [r3]
@@ -3426,59 +3438,59 @@ ftl_free_no_use_map_blk:
 	strh	r2, [r5, r3, lsl #1]	@ movhi
 	mov	r2, r6
 	ldrh	fp, [r5]
-.L405:
+.L406:
 	ldrh	r3, [r4, #10]
 	uxth	ip, r6
 	cmp	r3, ip
-	bhi	.L409
+	bhi	.L410
 	mov	r0, r10
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L404:
+.L405:
 	uxth	r2, r3
 	ldr	r1, [r6, r2, lsl #2]
 	movs	r2, #0
 	ubfx	r1, r1, #10, #16
-.L401:
+.L402:
 	ldrh	ip, [r4, #10]
 	uxth	r0, r2
 	cmp	ip, r0
-	bhi	.L403
+	bhi	.L404
 	adds	r3, r3, #1
-	b	.L400
-.L403:
+	b	.L401
+.L404:
 	uxth	r0, r2
 	ldrh	ip, [r7, r0, lsl #1]
 	cmp	ip, r1
-	bne	.L402
-	cbz	r1, .L402
+	bne	.L403
+	cbz	r1, .L403
 	ldrh	ip, [r5, r0, lsl #1]
 	add	ip, ip, #1
 	strh	ip, [r5, r0, lsl #1]	@ movhi
-.L402:
+.L403:
 	adds	r2, r2, #1
-	b	.L401
-.L409:
+	b	.L402
+.L410:
 	uxth	r1, r6
 	ldrh	r3, [r5, r1, lsl #1]
 	lsl	r8, r1, #1
 	cmp	fp, r3
-	bls	.L406
+	bls	.L407
 	ldrh	r0, [r7, r1, lsl #1]
 	add	r8, r8, r7
-	cbnz	r0, .L407
-.L408:
+	cbnz	r0, .L408
+.L409:
 	adds	r6, r6, #1
-	b	.L405
-.L406:
+	b	.L406
+.L407:
 	cmp	r3, #0
-	bne	.L408
+	bne	.L409
 	ldrh	r0, [r7, r1, lsl #1]
 	add	r8, r8, r7
 	cmp	r0, #0
-	beq	.L408
-.L410:
+	beq	.L409
+.L411:
 	movs	r1, #1
 	str	r2, [sp, #4]
 	bl	FtlFreeSysBlkQueueIn
@@ -3487,16 +3499,16 @@ ftl_free_no_use_map_blk:
 	ldrh	r3, [r4, #8]
 	subs	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	b	.L408
-.L407:
+	b	.L409
+.L408:
 	mov	r10, ip
 	mov	fp, r3
 	cmp	r3, #0
-	beq	.L410
-	b	.L408
-.L420:
+	beq	.L411
+	b	.L409
+.L421:
 	.align	2
-.L419:
+.L420:
 	.word	.LANCHOR20
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.section	.text.FtlL2PDataInit,"ax",%progbits
@@ -3512,14 +3524,14 @@ FtlL2PDataInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r1, #0
-	ldr	r5, .L424
-	ldr	r4, .L424+4
+	ldr	r5, .L425
+	ldr	r4, .L425+4
 	ldr	r2, [r5]
-	ldr	r7, .L424+8
-	ldr	r6, .L424+12
+	ldr	r7, .L425+8
+	ldr	r6, .L425+12
 	ldr	r0, [r4]
 	lsls	r2, r2, #1
-	ldr	r8, .L424+44
+	ldr	r8, .L425+44
 	bl	ftl_memset
 	ldrh	r3, [r7]
 	movs	r1, #255
@@ -3527,7 +3539,7 @@ FtlL2PDataInit:
 	ldr	r0, [r8]
 	muls	r2, r3, r2
 	bl	ftl_memset
-	ldr	r3, .L424+16
+	ldr	r3, .L425+16
 	movw	r0, #65535
 	ldrh	r1, [r6]
 	ldr	ip, [r8]
@@ -3538,47 +3550,47 @@ FtlL2PDataInit:
 	adds	r1, r2, r3
 	movs	r3, #0
 	mov	lr, r3
-.L422:
+.L423:
 	adds	r2, r2, #12
 	adds	r6, r3, r7
 	cmp	r2, r1
-	bne	.L423
-	ldr	r3, .L424+20
+	bne	.L424
+	ldr	r3, .L425+20
 	ldr	r2, [r5]
 	strh	r0, [r3, #2]	@ movhi
 	strh	r2, [r3, #10]	@ movhi
 	movw	r2, #61634
 	strh	r2, [r3, #4]	@ movhi
-	ldr	r2, .L424+24
+	ldr	r2, .L425+24
 	strh	r0, [r3]	@ movhi
 	ldrh	r2, [r2]
 	strh	r2, [r3, #8]	@ movhi
-	ldr	r2, .L424+28
+	ldr	r2, .L425+28
 	ldrh	r2, [r2]
 	strh	r2, [r3, #6]	@ movhi
-	ldr	r2, .L424+32
+	ldr	r2, .L425+32
 	ldr	r2, [r2]
 	str	r2, [r3, #12]
-	ldr	r2, .L424+36
+	ldr	r2, .L425+36
 	ldr	r2, [r2]
 	str	r2, [r3, #16]
 	ldr	r2, [r4]
 	str	r2, [r3, #20]
-	ldr	r2, .L424+40
+	ldr	r2, .L425+40
 	ldr	r2, [r2]
 	str	r2, [r3, #24]
 	pop	{r4, r5, r6, r7, r8, pc}
-.L423:
+.L424:
 	bic	r3, r3, #3
 	str	lr, [r2, #-8]
 	add	r3, r3, ip
 	strh	r0, [r2, #-12]	@ movhi
 	str	r3, [r2, #-4]
 	mov	r3, r6
-	b	.L422
-.L425:
+	b	.L423
+.L426:
 	.align	2
-.L424:
+.L425:
 	.word	.LANCHOR30
 	.word	.LANCHOR120
 	.word	.LANCHOR23
@@ -3605,53 +3617,53 @@ FtlVariablesInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movw	r2, #65535
-	ldr	r3, .L427
+	ldr	r3, .L428
 	movs	r4, #0
 	mov	r1, r4
-	ldr	r5, .L427+4
+	ldr	r5, .L428+4
 	strh	r2, [r3]	@ movhi
 	mov	r2, #-1
-	ldr	r3, .L427+8
+	ldr	r3, .L428+8
 	str	r4, [r3]
-	ldr	r3, .L427+12
+	ldr	r3, .L428+12
 	str	r4, [r3]
-	ldr	r3, .L427+16
+	ldr	r3, .L428+16
 	str	r2, [r3]
-	ldr	r3, .L427+20
+	ldr	r3, .L428+20
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L427+24
+	ldr	r3, .L428+24
 	ldrh	r2, [r3]
-	ldr	r3, .L427+28
+	ldr	r3, .L428+28
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L427+32
+	ldr	r3, .L428+32
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L427+36
+	ldr	r3, .L428+36
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	mov	r1, r4
 	movs	r2, #48
-	ldr	r0, .L427+40
+	ldr	r0, .L428+40
 	bl	ftl_memset
 	mov	r2, #512
 	mov	r1, r4
-	ldr	r0, .L427+44
+	ldr	r0, .L428+44
 	bl	ftl_memset
 	bl	FtlGcBufInit
 	bl	FtlL2PDataInit
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L428:
+.L429:
 	.align	2
-.L427:
+.L428:
 	.word	.LANCHOR131
 	.word	.LANCHOR6
 	.word	.LANCHOR132
@@ -3678,10 +3690,10 @@ SupperBlkListInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r2, #6
-	ldr	r3, .L440
+	ldr	r3, .L441
 	movs	r1, #0
 	movs	r4, #0
-	ldr	r6, .L440+4
+	ldr	r6, .L441+4
 	mov	r8, r4
 	ldrh	r3, [r3]
 	mov	r5, r4
@@ -3689,119 +3701,119 @@ SupperBlkListInit:
 	mov	r10, r6
 	muls	r2, r3, r2
 	bl	ftl_memset
-	ldr	r3, .L440+8
-	ldr	r2, .L440+12
+	ldr	r3, .L441+8
+	ldr	r2, .L441+12
 	str	r4, [r3]
-	ldr	r3, .L440+16
+	ldr	r3, .L441+16
 	strh	r4, [r2]	@ movhi
 	str	r2, [sp, #4]
 	str	r4, [r3]
-	ldr	r3, .L440+20
+	ldr	r3, .L441+20
 	str	r4, [r3]
-	ldr	r3, .L440+24
+	ldr	r3, .L441+24
 	mov	fp, r3
 	strh	r4, [r3]	@ movhi
-.L430:
-	ldr	r3, .L440+28
+.L431:
+	ldr	r3, .L441+28
 	uxth	r7, r4
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	bcs	.L437
-	ldr	r3, .L440+32
+	bcs	.L438
+	ldr	r3, .L441+32
 	ldrh	r2, [r3]
-	ldr	r3, .L440+36
+	ldr	r3, .L441+36
 	ldrh	r3, [r3]
 	str	r3, [sp]
 	movs	r3, #0
 	mov	r6, r3
-	b	.L438
-.L432:
+	b	.L439
+.L433:
 	str	r2, [sp, #12]
 	mov	r1, r7
-	ldr	r2, .L440+40
+	ldr	r2, .L441+40
 	str	r3, [sp, #8]
 	ldrb	r0, [r2, r3]	@ zero_extendqisi2
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #12]
-	cbnz	r0, .L431
+	cbnz	r0, .L432
 	ldr	r1, [sp]
 	add	r6, r6, r1
 	uxth	r6, r6
-.L431:
+.L432:
 	adds	r3, r3, #1
-.L438:
+.L439:
 	uxth	r1, r3
 	cmp	r2, r1
-	bhi	.L432
+	bhi	.L433
 	uxth	r3, r4
-	cbz	r6, .L433
+	cbz	r6, .L434
 	mov	r1, r6
 	str	r3, [sp]
 	mov	r0, #32768
 	bl	__aeabi_idiv
 	ldr	r3, [sp]
 	uxth	r6, r0
-.L434:
+.L435:
 	ldr	r1, [r10]
 	movs	r2, #6
 	mla	r2, r2, r3, r1
 	strh	r6, [r2, #4]	@ movhi
-	ldr	r2, .L440+44
+	ldr	r2, .L441+44
 	ldrh	r2, [r2]
 	cmp	r2, r7
-	beq	.L435
-	ldr	r2, .L440+48
+	beq	.L436
+	ldr	r2, .L441+48
 	ldrh	r2, [r2]
 	cmp	r2, r7
-	beq	.L435
-	ldr	r2, .L440+52
+	beq	.L436
+	ldr	r2, .L441+52
 	ldrh	r2, [r2]
 	cmp	r2, r7
-	beq	.L435
-	ldr	r2, .L440+56
+	beq	.L436
+	ldr	r2, .L441+56
 	ldr	r2, [r2]
 	ldrh	r3, [r2, r3, lsl #1]
-	cbnz	r3, .L436
+	cbnz	r3, .L437
 	add	r8, r8, #1
 	mov	r0, r7
 	uxth	r8, r8
 	bl	INSERT_FREE_LIST
-.L435:
+.L436:
 	adds	r4, r4, #1
-	b	.L430
-.L433:
-	ldr	r2, .L440+56
+	b	.L431
+.L434:
+	ldr	r2, .L441+56
 	movw	r1, #65535
 	ldr	r2, [r2]
 	strh	r1, [r2, r3, lsl #1]	@ movhi
-	b	.L434
-.L436:
+	b	.L435
+.L437:
 	adds	r5, r5, #1
 	mov	r0, r7
 	uxth	r5, r5
 	bl	INSERT_DATA_LIST
-	b	.L435
-.L437:
+	b	.L436
+.L438:
 	ldr	r2, [sp, #4]
 	strh	r8, [fp]	@ movhi
 	strh	r5, [r2]	@ movhi
 	add	r5, r5, r8
 	cmp	r5, r3
-	ble	.L439
+	ble	.L440
 	movw	r2, #2210
-	ldr	r1, .L440+60
-	ldr	r0, .L440+64
+	ldr	r1, .L441+60
+	ldr	r0, .L441+64
 	bl	printf
-.L439:
+.L440:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L441:
+.L442:
 	.align	2
-.L440:
+.L441:
 	.word	.LANCHOR6
 	.word	.LANCHOR40
 	.word	.LANCHOR46
@@ -3831,16 +3843,16 @@ SupperBlkListInit:
 FtlGcPageVarInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L443
+	ldr	r2, .L444
 	movs	r3, #0
 	push	{r4, lr}
 	movs	r1, #255
-	ldr	r4, .L443+4
+	ldr	r4, .L444+4
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L443+8
+	ldr	r2, .L444+8
 	strh	r3, [r2]	@ movhi
 	ldrh	r2, [r4]
-	ldr	r3, .L443+12
+	ldr	r3, .L444+12
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
@@ -3848,14 +3860,14 @@ FtlGcPageVarInit:
 	movs	r2, #12
 	movs	r1, #255
 	muls	r2, r3, r2
-	ldr	r3, .L443+16
+	ldr	r3, .L444+16
 	ldr	r0, [r3]
 	bl	ftl_memset
 	pop	{r4, lr}
 	b	FtlGcBufInit
-.L444:
+.L445:
 	.align	2
-.L443:
+.L444:
 	.word	.LANCHOR69
 	.word	.LANCHOR21
 	.word	.LANCHOR70
@@ -3879,39 +3891,39 @@ FlashGetBadBlockList:
 	movs	r1, #255
 	mov	r4, r0
 	bl	ftl_memset
-	ldr	r3, .L452
+	ldr	r3, .L453
 	mov	r1, r5
 	mov	r0, r4
 	ldr	r3, [r3]
 	blx	r3
 	uxth	r0, r0
 	cmp	r0, #50
-	bls	.L446
+	bls	.L447
 	mov	r2, #256
 	movs	r1, #255
 	mov	r0, r4
 	bl	ftl_memset
 	movs	r0, #0
-.L446:
-	ldr	r3, .L452+4
+.L447:
+	ldr	r3, .L453+4
 	ldrh	r3, [r3, #14]
 	cmp	r3, #4
-	bne	.L451
+	bne	.L452
 	add	r1, r4, r0, lsl #1
 	mov	r3, r4
-.L448:
+.L449:
 	cmp	r3, r1
-	bne	.L449
-.L451:
+	bne	.L450
+.L452:
 	pop	{r3, r4, r5, pc}
-.L449:
+.L450:
 	ldrh	r2, [r3]
 	lsrs	r2, r2, #1
 	strh	r2, [r3], #2	@ movhi
-	b	.L448
-.L453:
+	b	.L449
+.L454:
 	.align	2
-.L452:
+.L453:
 	.word	.LANCHOR78
 	.word	.LANCHOR0
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
@@ -3942,48 +3954,48 @@ FlashReadPages:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	fp, r1
-	ldr	r3, .L495
+	ldr	r3, .L496
 	mov	r4, r0
 	mov	r10, #0
 	ldrh	r2, [r3, #12]
 	str	r3, [sp, #4]
 	str	r2, [sp]
-.L456:
+.L457:
 	cmp	r10, fp
-	bne	.L470
+	bne	.L471
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L470:
+.L471:
 	ldr	r3, [r4, #8]
-	cbz	r3, .L457
+	cbz	r3, .L458
 	ldr	r3, [r4, #12]
-	cbnz	r3, .L458
-.L457:
+	cbnz	r3, .L459
+.L458:
 	movs	r2, #90
-	ldr	r1, .L495+4
-	ldr	r0, .L495+8
+	ldr	r1, .L496+4
+	ldr	r0, .L496+8
 	bl	printf
-.L458:
+.L459:
 	add	r2, sp, #8
 	add	r1, sp, #12
 	ldr	r0, [r4, #4]
 	bl	l2p_addr_tran.isra.0
 	ldr	r0, [sp, #8]
 	cmp	r0, #3
-	bls	.L459
+	bls	.L460
 	mov	r3, #-1
 	str	r3, [r4]
-.L460:
+.L461:
 	add	r10, r10, #1
 	adds	r4, r4, #20
-	b	.L456
-.L459:
+	b	.L457
+.L460:
 	ldr	r5, [r4, #8]
 	uxtb	r0, r0
-	ldr	r8, .L495+32
-	ldr	r7, .L495+12
+	ldr	r8, .L496+32
+	ldr	r7, .L496+12
 	tst	r5, #63
 	ldr	r3, [r4, #12]
 	it	ne
@@ -3996,7 +4008,7 @@ FlashReadPages:
 	str	r0, [r4]
 	ldrh	r3, [r3, #14]
 	cmp	r3, #4
-	bne	.L463
+	bne	.L464
 	ldr	r0, [sp]
 	add	r2, r5, #2048
 	ldr	r3, [r4, #12]
@@ -4007,67 +4019,67 @@ FlashReadPages:
 	ldrb	r0, [sp, #8]	@ zero_extendqisi2
 	blx	r7
 	adds	r1, r0, #1
-	beq	.L464
+	beq	.L465
 	ldr	r3, [r4, #12]
 	ldr	r2, [r3, #12]
 	adds	r2, r2, #1
-	bne	.L465
+	bne	.L466
 	ldr	r2, [r3, #8]
 	adds	r2, r2, #1
-	bne	.L465
+	bne	.L466
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L465
-.L464:
+	beq	.L466
+.L465:
 	mov	r3, #-1
 	str	r3, [r4]
-.L465:
+.L466:
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L466
+	beq	.L467
 	cmp	r0, #256
 	it	eq
 	streq	r0, [r4]
-.L466:
+.L467:
 	ldr	r3, [r4]
 	adds	r2, r3, #1
-	beq	.L467
+	beq	.L468
 	cmp	r3, #256
-	bne	.L463
-.L467:
+	bne	.L464
+.L468:
 	ldr	r1, [r4, #4]
 	ldr	r2, [sp, #12]
-	ldr	r0, .L495+16
+	ldr	r0, .L496+16
 	bl	printf
 	ldr	r1, [r4, #8]
-	cbz	r1, .L469
+	cbz	r1, .L470
 	movs	r3, #4
-	ldr	r0, .L495+20
+	ldr	r0, .L496+20
 	mov	r2, r3
 	bl	rknand_print_hex
-.L469:
+.L470:
 	ldr	r1, [r4, #12]
-	cbz	r1, .L463
+	cbz	r1, .L464
 	movs	r3, #4
-	ldr	r0, .L495+24
+	ldr	r0, .L496+24
 	mov	r2, r3
 	bl	rknand_print_hex
-.L463:
+.L464:
 	ldr	r3, [r8]
 	cmp	r5, r3
-	bne	.L460
+	bne	.L461
 	ldr	r0, [r4, #8]
 	cmp	r5, r0
-	beq	.L460
-	ldr	r3, .L495+28
+	beq	.L461
+	ldr	r3, .L496+28
 	mov	r1, r5
 	ldrh	r2, [r3]
 	lsls	r2, r2, #9
 	bl	ftl_memcpy
-	b	.L460
-.L496:
+	b	.L461
+.L497:
 	.align	2
-.L495:
+.L496:
 	.word	.LANCHOR0
 	.word	.LANCHOR137
 	.word	.LC1
@@ -4089,36 +4101,36 @@ FlashReadPages:
 FtlLoadFactoryBbt:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L507
+	ldr	r3, .L508
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r6, #0
-	ldr	r5, .L507+4
+	ldr	r5, .L508+4
 	ldr	r3, [r3]
-	ldr	r7, .L507+8
-	ldr	r10, .L507+20
+	ldr	r7, .L508+8
+	ldr	r10, .L508+20
 	str	r3, [r5, #8]
-	ldr	r3, .L507+12
+	ldr	r3, .L508+12
 	ldr	r8, [r3]
 	str	r8, [r5, #12]
-.L498:
-	ldr	r3, .L507+16
+.L499:
+	ldr	r3, .L508+16
 	ldrh	r3, [r3]
 	cmp	r6, r3
-	bcc	.L503
+	bcc	.L504
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L503:
+.L504:
 	ldrh	r4, [r10]
 	movw	r3, #65535
-	ldr	fp, .L507+4
+	ldr	fp, .L508+4
 	strh	r3, [r7, #2]!	@ movhi
 	subs	r4, r4, #1
 	uxth	r4, r4
-.L499:
+.L500:
 	ldrh	r3, [r10]
 	sub	r2, r3, #15
 	cmp	r2, r4
-	bgt	.L501
+	bgt	.L502
 	mla	r3, r6, r3, r4
 	movs	r2, #1
 	mov	r1, r2
@@ -4128,22 +4140,22 @@ FtlLoadFactoryBbt:
 	bl	FlashReadPages
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L500
+	beq	.L501
 	ldrh	r2, [r8]
 	movw	r3, #61664
 	cmp	r2, r3
-	bne	.L500
+	bne	.L501
 	strh	r4, [r7]	@ movhi
-.L501:
+.L502:
 	adds	r6, r6, #1
-	b	.L498
-.L500:
+	b	.L499
+.L501:
 	subs	r4, r4, #1
 	uxth	r4, r4
-	b	.L499
-.L508:
+	b	.L500
+.L509:
 	.align	2
-.L507:
+.L508:
 	.word	.LANCHOR106
 	.word	.LANCHOR138
 	.word	.LANCHOR37+10
@@ -4165,17 +4177,17 @@ FtlGetLastWrittenPage:
 	cmp	r1, #1
 	push	{r4, r5, r6, r7, r8, lr}
 	it	eq
-	ldreq	r3, .L521
+	ldreq	r3, .L522
 	sub	sp, sp, #88
 	lsl	r7, r0, #10
 	mov	r2, r1
 	it	ne
-	ldrne	r3, .L521+4
+	ldrne	r3, .L522+4
 	mov	r6, r1
 	add	r0, sp, #4
 	movs	r1, #1
 	ldrh	r5, [r3]
-	ldr	r3, .L521+8
+	ldr	r3, .L522+8
 	subs	r5, r5, #1
 	ldr	r3, [r3]
 	sxth	r5, r5
@@ -4187,17 +4199,17 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	bne	.L512
+	bne	.L513
 	mov	r8, #0
-.L513:
+.L514:
 	cmp	r8, r5
-	ble	.L516
-.L512:
+	ble	.L517
+.L513:
 	mov	r0, r5
 	add	sp, sp, #88
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L516:
+.L517:
 	add	r3, r8, r5
 	mov	r2, r6
 	add	r3, r3, r3, lsr #31
@@ -4210,23 +4222,23 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	bne	.L514
+	bne	.L515
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
-	bne	.L514
+	bne	.L515
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
-	beq	.L514
+	beq	.L515
 	subs	r4, r4, #1
 	sxth	r5, r4
-	b	.L513
-.L514:
+	b	.L514
+.L515:
 	adds	r4, r4, #1
 	sxth	r8, r4
-	b	.L513
-.L522:
+	b	.L514
+.L523:
 	.align	2
-.L521:
+.L522:
 	.word	.LANCHOR20
 	.word	.LANCHOR19
 	.word	.LANCHOR112
@@ -4244,69 +4256,69 @@ FtlScanSysBlk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r5, .L604
+	ldr	r5, .L605
 	sub	sp, sp, #32
 	mov	r1, r4
-	ldr	r3, .L604+4
+	ldr	r3, .L605+4
 	ldr	r2, [r5]
-	ldr	r6, .L604+8
+	ldr	r6, .L605+8
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L604+12
+	ldr	r3, .L605+12
 	lsls	r2, r2, #2
 	strh	r4, [r6]	@ movhi
-	ldr	r7, .L604+16
+	ldr	r7, .L605+16
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldr	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L604+20
+	ldr	r3, .L605+20
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r7]
 	mov	r1, r4
-	ldr	r3, .L604+24
+	ldr	r3, .L605+24
 	lsls	r2, r2, #2
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r7]
 	mov	r1, r4
-	ldr	r3, .L604+28
+	ldr	r3, .L605+28
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	movs	r2, #16
 	movs	r1, #255
-	ldr	r0, .L604+32
+	ldr	r0, .L605+32
 	bl	ftl_memset
-	ldr	r3, .L604+36
+	ldr	r3, .L605+36
 	str	r6, [sp, #12]
 	str	r5, [sp, #16]
 	ldrh	r3, [r3]
 	str	r3, [sp, #4]
-.L524:
-	ldr	r3, .L604+40
+.L525:
+	ldr	r3, .L605+40
 	ldr	r2, [sp, #4]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bls	.L565
-	ldr	r3, .L604+44
+	bls	.L566
+	ldr	r3, .L605+44
 	movs	r5, #0
-	ldr	r1, .L604+48
+	ldr	r1, .L605+48
 	mov	fp, r5
 	movs	r7, #20
 	ldrh	r8, [r3]
-	ldr	r3, .L604+52
+	ldr	r3, .L605+52
 	ldr	r2, [r1]
-	ldr	r1, .L604+56
+	ldr	r1, .L605+56
 	ldr	r6, [r3]
-	ldr	r3, .L604+60
+	ldr	r3, .L605+60
 	str	r2, [sp, #8]
 	ldrh	r10, [r1]
 	ldr	r3, [r3]
-	ldr	r2, .L604+64
-	b	.L566
-.L526:
+	ldr	r2, .L605+64
+	b	.L567
+.L527:
 	ldrb	r0, [r2, r5]	@ zero_extendqisi2
 	ldr	r1, [sp, #4]
 	str	r3, [sp, #28]
@@ -4316,7 +4328,7 @@ FtlScanSysBlk:
 	bl	FtlBbmIsBadBlock
 	ldr	r2, [sp, #24]
 	ldr	r3, [sp, #28]
-	cbnz	r0, .L525
+	cbnz	r0, .L526
 	ldr	r1, [sp, #20]
 	mla	r0, r7, fp, r6
 	ldr	r4, [sp, #8]
@@ -4329,31 +4341,31 @@ FtlScanSysBlk:
 	str	r1, [r0, #12]
 	add	r1, fp, #1
 	uxth	fp, r1
-.L525:
+.L526:
 	adds	r5, r5, #1
-.L566:
+.L567:
 	uxth	r1, r5
 	cmp	r8, r1
-	bhi	.L526
+	bhi	.L527
 	cmp	fp, #0
-	bne	.L527
-.L564:
+	bne	.L528
+.L565:
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	str	r3, [sp, #4]
-	b	.L524
-.L527:
+	b	.L525
+.L528:
 	movs	r7, #0
 	movs	r2, #1
 	mov	r1, fp
 	mov	r0, r6
 	bl	FlashReadPages
-.L528:
+.L529:
 	uxth	r3, r7
 	cmp	fp, r3
-	bls	.L564
-	ldr	r3, .L604+52
+	bls	.L565
+	ldr	r3, .L605+52
 	mov	r8, #20
 	mul	r8, r8, r7
 	ldr	r3, [r3]
@@ -4363,10 +4375,10 @@ FtlScanSysBlk:
 	ldr	r6, [r2, #12]
 	adds	r3, r3, #1
 	ubfx	r5, r5, #10, #16
-	bne	.L531
+	bne	.L532
 	mov	r10, #16
-.L533:
-	ldr	r3, .L604+52
+.L534:
+	ldr	r3, .L605+52
 	movs	r2, #1
 	mov	r1, r2
 	ldr	r0, [r3]
@@ -4378,83 +4390,83 @@ FtlScanSysBlk:
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	ldr	r3, .L604+52
+	ldr	r3, .L605+52
 	ldr	r3, [r3]
-	bne	.L530
+	bne	.L531
 	mov	r2, #-1
 	str	r2, [r3, r8]
-	ldr	r3, .L604+52
+	ldr	r3, .L605+52
 	ldr	r3, [r3]
 	ldr	r3, [r3, r8]
 	cmp	r3, r2
-	bne	.L531
-.L532:
+	bne	.L532
+.L533:
 	movs	r1, #1
-	b	.L603
-.L530:
+	b	.L604
+.L531:
 	ldr	r3, [r3, r8]
 	adds	r3, r3, #1
-	bne	.L531
+	bne	.L532
 	add	r10, r10, #-1
 	uxth	r10, r10
 	cmp	r10, #0
-	bne	.L533
-	b	.L532
-.L531:
-	ldr	r3, .L604+68
+	bne	.L534
+	b	.L533
+.L532:
+	ldr	r3, .L605+68
 	ldr	r2, [r3]
 	ldr	r3, [r6, #4]
 	adds	r1, r2, #1
-	beq	.L534
+	beq	.L535
 	cmp	r2, r3
-	bhi	.L535
-.L534:
+	bhi	.L536
+.L535:
 	adds	r2, r3, #1
 	ittt	ne
-	ldrne	r1, .L604+68
+	ldrne	r1, .L605+68
 	addne	r2, r3, #1
 	strne	r2, [r1]
-.L535:
+.L536:
 	ldrh	r2, [r6]
 	movw	r1, #61604
 	cmp	r2, r1
-	beq	.L537
-	bhi	.L538
+	beq	.L538
+	bhi	.L539
 	movw	r3, #61574
 	cmp	r2, r3
-	beq	.L539
-.L536:
+	beq	.L540
+.L537:
 	adds	r7, r7, #1
-	b	.L528
-.L538:
+	b	.L529
+.L539:
 	movw	r3, #61634
 	cmp	r2, r3
-	beq	.L540
+	beq	.L541
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L536
+	bne	.L537
 	movs	r1, #0
-.L603:
+.L604:
 	mov	r0, r5
 	bl	FtlFreeSysBlkQueueIn
-	b	.L536
-.L540:
-	ldr	r3, .L604+8
+	b	.L537
+.L541:
+	ldr	r3, .L605+8
 	ldrh	r2, [r3]
-	ldr	r3, .L604
+	ldr	r3, .L605
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bls	.L542
+	bls	.L543
 	movw	r2, #1225
-	ldr	r1, .L604+72
-	ldr	r0, .L604+76
+	ldr	r1, .L605+72
+	ldr	r0, .L605+76
 	bl	printf
-.L542:
+.L543:
 	ldr	r3, [sp, #16]
 	ldr	r2, [sp, #12]
 	ldr	r1, [r3]
 	ldrh	r0, [r2]
-	ldr	r2, .L604+12
+	ldr	r2, .L605+12
 	uxth	r10, r1
 	ldr	ip, [r2]
 	add	r3, r10, #-1
@@ -4462,61 +4474,61 @@ FtlScanSysBlk:
 	add	r10, r10, #-1
 	sxth	r3, r3
 	sxth	r10, r10
-.L543:
+.L544:
 	cmp	r3, r10
-	bgt	.L549
+	bgt	.L550
 	cmp	r3, #0
-	bge	.L581
-	b	.L536
-.L549:
+	bge	.L582
+	b	.L537
+.L550:
 	ldr	r2, [ip, r3, lsl #2]
 	add	r8, ip, r3, lsl #2
 	ldr	r4, [r6, #4]
 	cmp	r4, r2
-	bls	.L544
+	bls	.L545
 	ldr	r2, [ip]
-	cbnz	r2, .L545
+	cbnz	r2, .L546
 	cmp	r1, r0
 	ittt	ne
-	ldrne	r2, .L604+8
+	ldrne	r2, .L605+8
 	addne	r0, r0, #1
 	strhne	r0, [r2]	@ movhi
-.L545:
-	ldr	r2, .L604+20
+.L546:
+	ldr	r2, .L605+20
 	uxth	r10, r3
 	ldr	r0, [r2]
 	movs	r2, #0
-.L546:
+.L547:
 	uxth	lr, r2
 	sxth	r1, r2
 	cmp	r10, lr
-	bhi	.L547
+	bhi	.L548
 	ldr	r2, [r6, #4]
 	cmp	r3, #0
 	str	r2, [r8]
 	strh	r5, [r0, r3, lsl #1]	@ movhi
-	blt	.L536
-	ldr	r2, .L604+8
+	blt	.L537
+	ldr	r2, .L605+8
 	ldrh	r0, [r2]
-	ldr	r2, .L604
+	ldr	r2, .L605
 	ldr	r2, [r2]
 	subs	r2, r2, r0
 	subs	r2, r2, #1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L536
-.L581:
-	ldr	r2, .L604+8
+	bgt	.L537
+.L582:
+	ldr	r2, .L605+8
 	adds	r0, r0, #1
 	strh	r0, [r2]	@ movhi
 	ldr	r2, [r6, #4]
 	str	r2, [ip, r3, lsl #2]
-	ldr	r2, .L604+20
-.L601:
+	ldr	r2, .L605+20
+.L602:
 	ldr	r2, [r2]
 	strh	r5, [r2, r3, lsl #1]	@ movhi
-	b	.L536
-.L547:
+	b	.L537
+.L548:
 	add	lr, ip, r1, lsl #2
 	adds	r2, r2, #1
 	ldr	r4, [lr, #4]
@@ -4524,14 +4536,14 @@ FtlScanSysBlk:
 	ldrh	lr, [lr, #2]
 	str	r4, [ip, r1, lsl #2]
 	strh	lr, [r0, r1, lsl #1]	@ movhi
-	b	.L546
-.L544:
+	b	.L547
+.L545:
 	subs	r3, r3, #1
 	sxth	r3, r3
-	b	.L543
-.L605:
+	b	.L544
+.L606:
 	.align	2
-.L604:
+.L605:
 	.word	.LANCHOR30
 	.word	.LANCHOR35
 	.word	.LANCHOR130
@@ -4552,72 +4564,72 @@ FtlScanSysBlk:
 	.word	.LANCHOR82
 	.word	.LANCHOR140
 	.word	.LC1
-.L539:
-	ldr	r8, .L606+12
-	ldr	r10, .L606+20
+.L540:
+	ldr	r8, .L607+12
+	ldr	r10, .L607+20
 	ldrh	r2, [r8]
 	ldrh	r3, [r10]
 	cmp	r2, r3
-	bls	.L552
+	bls	.L553
 	movw	r2, #1266
-	ldr	r1, .L606
-	ldr	r0, .L606+4
+	ldr	r1, .L607
+	ldr	r0, .L607+4
 	bl	printf
-.L552:
-	ldr	r2, .L606+8
+.L553:
+	ldr	r2, .L607+8
 	ldrh	lr, [r10]
 	ldrh	ip, [r8]
 	ldr	r0, [r2]
 	add	r10, lr, #-1
 	sxth	r3, r10
 	sub	r10, r10, ip
-.L553:
+.L554:
 	cmp	r3, r10
-	ble	.L558
+	ble	.L559
 	ldr	r1, [r6, #4]
 	add	r8, r0, r3, lsl #2
 	ldr	r2, [r0, r3, lsl #2]
 	cmp	r1, r2
-	bls	.L554
+	bls	.L555
 	ldr	r2, [r0]
-	cbnz	r2, .L555
+	cbnz	r2, .L556
 	cmp	lr, ip
 	ittt	ne
-	ldrne	r2, .L606+12
+	ldrne	r2, .L607+12
 	addne	ip, ip, #1
 	strhne	ip, [r2]	@ movhi
-.L555:
-	ldr	r2, .L606+16
+.L556:
+	ldr	r2, .L607+16
 	uxth	r10, r3
 	ldr	ip, [r2]
 	movs	r2, #0
-.L556:
+.L557:
 	uxth	lr, r2
 	sxth	r1, r2
 	cmp	r10, lr
-	bhi	.L557
+	bhi	.L558
 	ldr	r2, [r6, #4]
 	str	r2, [r8]
 	strh	r5, [ip, r3, lsl #1]	@ movhi
-.L558:
+.L559:
 	cmp	r3, #0
-	blt	.L536
-	ldr	r2, .L606+20
-	ldr	ip, .L606+12
+	blt	.L537
+	ldr	r2, .L607+20
+	ldr	ip, .L607+12
 	ldrh	r2, [r2]
 	ldrh	r1, [ip]
 	subs	r2, r2, #1
 	subs	r2, r2, r1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L536
+	bgt	.L537
 	ldr	r2, [r6, #4]
 	adds	r1, r1, #1
 	strh	r1, [ip]	@ movhi
 	str	r2, [r0, r3, lsl #2]
-	ldr	r2, .L606+16
-	b	.L601
-.L557:
+	ldr	r2, .L607+16
+	b	.L602
+.L558:
 	add	lr, r0, r1, lsl #2
 	adds	r2, r2, #1
 	ldr	r4, [lr, #4]
@@ -4625,88 +4637,88 @@ FtlScanSysBlk:
 	ldrh	lr, [lr, #2]
 	str	r4, [r0, r1, lsl #2]
 	strh	lr, [ip, r1, lsl #1]	@ movhi
-	b	.L556
-.L554:
+	b	.L557
+.L555:
 	subs	r3, r3, #1
 	sxth	r3, r3
-	b	.L553
-.L537:
-	ldr	r8, .L606+40
+	b	.L554
+.L538:
+	ldr	r8, .L607+40
 	movw	r2, #65535
 	ldrh	r1, [r8]
 	cmp	r1, r2
-	bne	.L560
-.L602:
+	bne	.L561
+.L603:
 	strh	r5, [r8]	@ movhi
 	str	r3, [r8, #8]
-	b	.L536
-.L560:
+	b	.L537
+.L561:
 	ldrh	r0, [r8, #4]
 	cmp	r0, r2
-	beq	.L561
+	beq	.L562
 	movs	r1, #1
 	bl	FtlFreeSysBlkQueueIn
-.L561:
+.L562:
 	ldr	r3, [r6, #4]
 	ldr	r2, [r8, #8]
 	cmp	r2, r3
-	bcs	.L562
+	bcs	.L563
 	ldrh	r2, [r8]
 	strh	r2, [r8, #4]	@ movhi
-	b	.L602
-.L562:
+	b	.L603
+.L563:
 	strh	r5, [r8, #4]	@ movhi
-	b	.L536
-.L565:
-	ldr	r3, .L606+24
+	b	.L537
+.L566:
+	ldr	r3, .L607+24
 	ldr	r2, [r3]
 	ldrh	r3, [r2]
-	cbz	r3, .L567
-.L570:
-	ldr	r3, .L606+16
+	cbz	r3, .L568
+.L571:
+	ldr	r3, .L607+16
 	ldr	r4, [r3]
 	ldrh	r2, [r4]
 	cmp	r2, #0
-	beq	.L568
-.L569:
-	ldr	r3, .L606+28
+	beq	.L569
+.L570:
+	ldr	r3, .L607+28
 	ldrh	r2, [r3]
-	ldr	r3, .L606+32
+	ldr	r3, .L607+32
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bls	.L600
+	bls	.L601
 	movw	r2, #1391
-	ldr	r1, .L606
-	ldr	r0, .L606+4
+	ldr	r1, .L607
+	ldr	r0, .L607+4
 	bl	printf
-.L600:
+.L601:
 	movs	r0, #0
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L567:
-	ldr	r1, .L606+28
+.L568:
+	ldr	r1, .L607+28
 	ldrh	r1, [r1]
 	cmp	r1, #0
-	beq	.L570
-	ldr	r5, .L606+32
+	beq	.L571
+	ldr	r5, .L607+32
 	ldr	r0, [r5]
-.L571:
+.L572:
 	sxth	r1, r3
 	cmp	r1, r0
-	bcs	.L570
+	bcs	.L571
 	ldrh	r4, [r2, r1, lsl #1]
 	adds	r3, r3, #1
 	cmp	r4, #0
-	beq	.L571
-	ldr	r3, .L606+36
+	beq	.L572
+	ldr	r3, .L607+36
 	movs	r6, #0
 	ldr	r0, [r3]
 	mov	r3, r1
-.L572:
+.L573:
 	ldr	r4, [r5]
 	cmp	r3, r4
-	bcs	.L570
+	bcs	.L571
 	ldrh	r7, [r2, r3, lsl #1]
 	subs	r4, r3, r1
 	strh	r7, [r2, r4, lsl #1]	@ movhi
@@ -4715,30 +4727,30 @@ FtlScanSysBlk:
 	strh	r6, [r2, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	sxth	r3, r3
-	b	.L572
-.L568:
-	ldr	r3, .L606+12
+	b	.L573
+.L569:
+	ldr	r3, .L607+12
 	ldrh	r3, [r3]
 	cmp	r3, #0
-	beq	.L569
-	ldr	r5, .L606+20
+	beq	.L570
+	ldr	r5, .L607+20
 	ldrh	r1, [r5]
-.L577:
+.L578:
 	sxth	r3, r2
 	cmp	r3, r1
 	mov	r6, r3
-	bge	.L569
+	bge	.L570
 	ldrh	r0, [r4, r3, lsl #1]
 	adds	r2, r2, #1
 	cmp	r0, #0
-	beq	.L577
-	ldr	r2, .L606+8
+	beq	.L578
+	ldr	r2, .L607+8
 	movs	r0, #0
 	ldr	r2, [r2]
-.L578:
+.L579:
 	ldrh	r1, [r5]
 	cmp	r3, r1
-	bge	.L569
+	bge	.L570
 	ldrh	r7, [r4, r3, lsl #1]
 	subs	r1, r3, r6
 	strh	r7, [r4, r1, lsl #1]	@ movhi
@@ -4747,10 +4759,10 @@ FtlScanSysBlk:
 	adds	r1, r3, #1
 	strh	r0, [r4, r3, lsl #1]	@ movhi
 	sxth	r3, r1
-	b	.L578
-.L607:
+	b	.L579
+.L608:
 	.align	2
-.L606:
+.L607:
 	.word	.LANCHOR140
 	.word	.LC1
 	.word	.LANCHOR122
@@ -4775,24 +4787,24 @@ FtlLoadBbt:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	ldr	r8, .L637+40
-	ldr	r4, .L637
+	ldr	r8, .L638+40
+	ldr	r4, .L638
 	ldr	r3, [r8]
-	ldr	r7, .L637+4
+	ldr	r7, .L638+4
 	mov	r10, r4
 	str	r3, [r4, #8]
-	ldr	r3, .L637+8
+	ldr	r3, .L638+8
 	ldr	r6, [r3]
 	str	r6, [r4, #12]
 	bl	FtlBbtMemInit
 	ldrh	r5, [r7]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L609:
+.L610:
 	ldrh	r3, [r7]
 	subs	r3, r3, #15
 	cmp	r3, r5
-	bgt	.L612
+	bgt	.L613
 	lsls	r3, r5, #10
 	movs	r2, #1
 	mov	r1, r2
@@ -4801,7 +4813,7 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	bne	.L610
+	bne	.L611
 	ldr	r3, [r4, #4]
 	movs	r2, #1
 	mov	r1, r2
@@ -4809,101 +4821,101 @@ FtlLoadBbt:
 	adds	r3, r3, #1
 	str	r3, [r4, #4]
 	bl	FlashReadPages
-.L610:
+.L611:
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L611
+	beq	.L612
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L611
-	ldr	r3, .L637+12
+	bne	.L612
+	ldr	r3, .L638+12
 	ldr	r2, [r6, #4]
 	strh	r5, [r3]	@ movhi
 	str	r2, [r3, #8]
 	ldrh	r2, [r6, #8]
 	strh	r2, [r3, #4]	@ movhi
-.L612:
-	ldr	r5, .L637+12
+.L613:
+	ldr	r5, .L638+12
 	movw	r2, #65535
 	ldrh	r3, [r5]
 	cmp	r3, r2
-	beq	.L626
+	beq	.L627
 	ldrh	r3, [r5, #4]
 	cmp	r3, r2
-	beq	.L616
+	beq	.L617
 	lsls	r3, r3, #10
 	movs	r2, #1
 	mov	r1, r2
-	ldr	r0, .L637
+	ldr	r0, .L638
 	str	r3, [r4, #4]
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L616
+	beq	.L617
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L616
+	bne	.L617
 	ldr	r3, [r6, #4]
 	ldr	r2, [r5, #8]
 	cmp	r3, r2
-	bls	.L616
+	bls	.L617
 	ldrh	r2, [r5, #4]
 	str	r3, [r5, #8]
 	ldrh	r3, [r6, #8]
 	strh	r2, [r5]	@ movhi
 	strh	r3, [r5, #4]	@ movhi
-.L616:
-	ldr	r10, .L637
+.L617:
+	ldr	r10, .L638
 	movs	r1, #1
 	ldrh	r0, [r5]
 	bl	FtlGetLastWrittenPage
 	sxth	r7, r0
 	adds	r0, r0, #1
 	strh	r0, [r5, #2]	@ movhi
-.L618:
+.L619:
 	cmp	r7, #0
-	bge	.L621
+	bge	.L622
 	movs	r2, #251
-	ldr	r1, .L637+16
-	ldr	r0, .L637+20
+	ldr	r1, .L638+16
+	ldr	r0, .L638+20
 	bl	printf
-.L620:
+.L621:
 	ldrh	r3, [r6, #10]
 	ldrh	r0, [r6, #12]
 	strh	r3, [r5, #6]	@ movhi
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L623
-	ldr	r3, .L637+24
+	beq	.L624
+	ldr	r3, .L638+24
 	ldr	r2, [r3]
 	cmp	r0, r2
-	beq	.L623
-	ldr	r3, .L637+28
+	beq	.L624
+	ldr	r3, .L638+28
 	ldrh	r3, [r3]
 	lsrs	r3, r3, #2
 	cmp	r2, r3
-	bcs	.L623
+	bcs	.L624
 	cmp	r0, r3
-	bcs	.L623
+	bcs	.L624
 	bl	FtlSysBlkNumInit
-.L623:
-	ldr	r6, .L637+32
-	movs	r5, #0
-	ldr	r7, .L637+36
-	ldr	r8, .L637+44
 .L624:
+	ldr	r6, .L638+32
+	movs	r5, #0
+	ldr	r7, .L638+36
+	ldr	r8, .L638+44
+.L625:
 	ldrh	r3, [r7]
 	cmp	r5, r3
-	bcc	.L625
+	bcc	.L626
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L611:
+.L612:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L609
-.L621:
+	b	.L610
+.L622:
 	ldrh	r3, [r5]
 	movs	r2, #1
 	mov	r1, r2
@@ -4915,16 +4927,16 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L619
+	beq	.L620
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	beq	.L620
-.L619:
+	beq	.L621
+.L620:
 	subs	r7, r7, #1
 	sxth	r7, r7
-	b	.L618
-.L625:
+	b	.L619
+.L626:
 	ldrh	r2, [r8]
 	ldr	r1, [r4, #8]
 	ldr	r0, [r6, #4]!
@@ -4932,13 +4944,13 @@ FtlLoadBbt:
 	mla	r1, r5, r2, r1
 	adds	r5, r5, #1
 	bl	ftl_memcpy
-	b	.L624
-.L626:
+	b	.L625
+.L627:
 	mov	r0, #-1
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L638:
+.L639:
 	.align	2
-.L637:
+.L638:
 	.word	.LANCHOR138
 	.word	.LANCHOR17
 	.word	.LANCHOR114
@@ -4969,26 +4981,26 @@ FlashProgPages:
 	mov	r10, r1
 	mov	r4, r0
 	mov	r5, r0
-	ldr	r3, .L680
+	ldr	r3, .L681
 	mov	r8, #0
-	ldr	fp, .L680+52
+	ldr	fp, .L681+52
 	str	r2, [sp, #8]
 	ldrh	r3, [r3, #12]
 	str	r3, [sp]
 	lsls	r3, r3, #3
 	str	r3, [sp, #4]
-.L640:
+.L641:
 	cmp	r8, r10
-	bne	.L653
+	bne	.L654
 	ldr	r3, [sp, #12]
 	cmp	r3, #0
-	beq	.L672
-	ldr	r6, .L680+4
+	beq	.L673
+	ldr	r6, .L681+4
 	movs	r5, #0
-.L655:
+.L656:
 	cmp	r8, r5
-	beq	.L672
-	ldr	r7, .L680+8
+	beq	.L673
+	ldr	r7, .L681+8
 	movs	r1, #0
 	ldr	r2, [r6]
 	add	r0, sp, #28
@@ -5004,81 +5016,81 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	r10, [sp, #28]
 	cmp	r10, #-1
-	bne	.L656
+	bne	.L657
 	ldr	r1, [r4, #4]
-	ldr	r0, .L680+12
+	ldr	r0, .L681+12
 	bl	printf
 	str	r10, [r4]
-.L656:
+.L657:
 	ldr	r10, [sp, #28]
 	cmp	r10, #256
-	bne	.L657
+	bne	.L658
 	ldr	r1, [r4, #4]
-	ldr	r0, .L680+16
+	ldr	r0, .L681+16
 	bl	printf
 	str	r10, [r4]
-.L657:
+.L658:
 	ldr	r3, [r4, #12]
-	cbz	r3, .L658
+	cbz	r3, .L659
 	ldr	r2, [r3]
 	ldr	r3, [r7]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L658
+	beq	.L659
 	ldr	r1, [r4, #4]
-	ldr	r0, .L680+20
+	ldr	r0, .L681+20
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4]
-.L658:
+.L659:
 	ldr	r3, [r4, #8]
-	cbz	r3, .L659
+	cbz	r3, .L660
 	ldr	r2, [r3]
 	ldr	r3, [r6]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L659
+	beq	.L660
 	ldr	r1, [r4, #4]
-	ldr	r0, .L680+24
+	ldr	r0, .L681+24
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4]
-.L659:
+.L660:
 	adds	r5, r5, #1
 	adds	r4, r4, #20
-	b	.L655
-.L653:
+	b	.L656
+.L654:
 	ldr	r3, [r5, #8]
-	cbz	r3, .L641
+	cbz	r3, .L642
 	ldr	r3, [r5, #12]
-	cbnz	r3, .L642
-.L641:
+	cbnz	r3, .L643
+.L642:
 	movs	r2, #142
-	ldr	r1, .L680+28
-	ldr	r0, .L680+32
+	ldr	r1, .L681+28
+	ldr	r0, .L681+32
 	bl	printf
-.L642:
+.L643:
 	add	r2, sp, #20
 	add	r1, sp, #24
 	ldr	r0, [r5, #4]
 	bl	l2p_addr_tran.isra.0
 	ldr	r6, [sp, #20]
 	cmp	r6, #3
-	bls	.L643
-.L679:
+	bls	.L644
+.L680:
 	mov	r3, #-1
 	str	r3, [r5]
-	b	.L644
-.L643:
-	cbnz	r6, .L645
+	b	.L645
+.L644:
+	cbnz	r6, .L646
 	ldr	r3, [sp, #24]
 	ldr	r2, [sp, #4]
 	cmp	r2, r3
-	bls	.L645
-	ldr	r5, .L680+28
-	ldr	r7, .L680+36
-	b	.L678
-.L647:
+	bls	.L646
+	ldr	r5, .L681+28
+	ldr	r7, .L681+36
+	b	.L679
+.L648:
 	mov	r3, #-1
 	ldr	r2, [r4, #-16]
 	str	r3, [r4, #-20]
@@ -5089,49 +5101,49 @@ FlashProgPages:
 	movs	r3, #16
 	movs	r2, #4
 	ldr	r1, [r4, #-12]
-	ldr	r0, .L680+40
+	ldr	r0, .L681+40
 	bl	rknand_print_hex
 	movs	r3, #4
 	ldr	r1, [r4, #-8]
 	mov	r2, r3
-	ldr	r0, .L680+44
+	ldr	r0, .L681+44
 	bl	rknand_print_hex
-.L678:
+.L679:
 	cmp	r6, r10
 	add	r4, r4, #20
-	bne	.L647
-.L672:
+	bne	.L648
+.L673:
 	movs	r0, #0
 	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L645:
+.L646:
 	ldr	r1, [r5, #8]
 	lsls	r3, r1, #26
-	beq	.L661
-	ldr	r3, .L680+4
+	beq	.L662
+	ldr	r3, .L681+4
 	ldr	r6, [r3]
 	cmp	r1, r6
-	beq	.L648
-	ldr	r3, .L680+48
+	beq	.L649
+	ldr	r3, .L681+48
 	mov	r0, r6
 	ldrh	r2, [r3]
 	lsls	r2, r2, #9
 	bl	ftl_memcpy
-.L648:
+.L649:
 	ldr	r3, [r5, #12]
 	mov	r2, r6
 	ldr	r1, [sp, #24]
 	ldrb	r0, [sp, #20]	@ zero_extendqisi2
 	ldr	r7, [fp, #8]
 	blx	r7
-	cbnz	r0, .L649
+	cbnz	r0, .L650
 	str	r0, [r5]
-.L650:
-	ldr	r3, .L680
+.L651:
+	ldr	r3, .L681
 	ldrh	r3, [r3, #14]
 	cmp	r3, #4
-	bne	.L644
+	bne	.L645
 	ldr	r0, [sp]
 	add	r2, r6, #2048
 	ldr	r3, [r5, #12]
@@ -5142,21 +5154,21 @@ FlashProgPages:
 	ldrb	r0, [sp, #20]	@ zero_extendqisi2
 	blx	r6
 	cmp	r0, #0
-	bne	.L679
-.L644:
+	bne	.L680
+.L645:
 	add	r8, r8, #1
 	adds	r5, r5, #20
-	b	.L640
-.L661:
+	b	.L641
+.L662:
 	mov	r6, r1
-	b	.L648
-.L649:
+	b	.L649
+.L650:
 	mov	r3, #-1
 	str	r3, [r5]
-	b	.L650
-.L681:
+	b	.L651
+.L682:
 	.align	2
-.L680:
+.L681:
 	.word	.LANCHOR0
 	.word	.LANCHOR111
 	.word	.LANCHOR113
@@ -5183,133 +5195,133 @@ FlashProgPages:
 FtlLowFormatEraseBlock:
 	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L725
+	ldr	r3, .L726
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #32
-	ldr	r7, .L725+4
+	ldr	r7, .L726+4
 	mov	r8, #0
 	mov	r6, r1
 	mov	r5, r8
 	str	r0, [r3]
 	mov	r4, r8
-	ldr	r3, .L725+8
+	ldr	r3, .L726+8
 	mov	fp, #20
 	ldr	r10, [r7]
 	str	r0, [sp, #4]
 	ldrh	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L725+12
+	ldr	r3, .L726+12
 	ldr	r3, [r3]
 	str	r3, [sp, #16]
-	ldr	r3, .L725+16
+	ldr	r3, .L726+16
 	ldr	r3, [r3]
 	str	r3, [sp, #20]
-	ldr	r3, .L725+20
+	ldr	r3, .L726+20
 	ldrh	r3, [r3]
 	str	r3, [sp, #24]
-.L683:
+.L684:
 	ldr	r3, [sp, #12]
 	uxth	r2, r8
 	cmp	r3, r2
-	bhi	.L687
+	bhi	.L688
 	cmp	r5, #0
-	beq	.L682
+	beq	.L683
 	mov	r0, r10
 	mov	r8, #0
 	mov	r10, #20
 	mov	r2, r5
 	movs	r1, #0
 	bl	FlashEraseBlocks
-.L690:
+.L691:
 	uxth	r3, r8
 	cmp	r5, r3
-	bhi	.L692
+	bhi	.L693
 	cmp	r6, #0
-	beq	.L708
-	ldr	r3, .L725+24
+	beq	.L709
+	ldr	r3, .L726+24
 	mov	r10, #1
 	ldrh	r3, [r3]
 	str	r3, [sp, #8]
-.L693:
+.L694:
 	movs	r7, #0
-.L702:
-	ldr	r3, .L725+8
+.L703:
+	ldr	r3, .L726+8
 	mov	r8, #0
 	mov	r5, r8
 	ldrh	r3, [r3]
 	str	r3, [sp, #16]
-	ldr	r3, .L725+4
+	ldr	r3, .L726+4
 	ldr	fp, [r3]
-	ldr	r3, .L725+28
+	ldr	r3, .L726+28
 	ldr	r3, [r3]
 	str	r3, [sp, #20]
-	ldr	r3, .L725+12
+	ldr	r3, .L726+12
 	ldr	r3, [r3]
 	str	r3, [sp, #24]
-	ldr	r3, .L725+20
+	ldr	r3, .L726+20
 	ldrh	r3, [r3]
 	str	r3, [sp, #28]
-.L694:
+.L695:
 	ldr	r3, [sp, #16]
 	uxth	r2, r8
 	cmp	r3, r2
-	bhi	.L697
-	cbz	r5, .L682
+	bhi	.L698
+	cbz	r5, .L683
 	mov	r0, fp
-	ldr	fp, .L725+4
+	ldr	fp, .L726+4
 	movs	r3, #1
 	mov	r2, r10
 	mov	r1, r5
 	mov	r8, #0
 	bl	FlashProgPages
 	movs	r3, #20
-.L699:
+.L700:
 	uxth	r2, r8
 	cmp	r5, r2
-	bhi	.L701
+	bhi	.L702
 	adds	r7, r7, #1
 	ldr	r2, [sp, #8]
 	uxth	r3, r7
 	cmp	r2, r3
-	bhi	.L702
-	ldr	r8, .L725+4
+	bhi	.L703
+	ldr	r8, .L726+4
 	movs	r7, #0
 	mov	fp, #20
-.L703:
+.L704:
 	uxth	r3, r7
 	cmp	r5, r3
-	bhi	.L705
+	bhi	.L706
 	ldr	r3, [sp, #4]
 	cmp	r3, #63
-	bls	.L706
-	cbz	r6, .L682
-.L706:
-	ldr	r3, .L725+4
+	bls	.L707
+	cbz	r6, .L683
+.L707:
+	ldr	r3, .L726+4
 	mov	r2, r5
 	mov	r1, r10
 	ldr	r0, [r3]
 	bl	FlashEraseBlocks
-.L682:
+.L683:
 	mov	r0, r4
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L687:
+.L688:
 	mul	r2, fp, r8
 	movs	r3, #0
 	ldr	r1, [sp, #4]
 	str	r3, [r10, r2]
-	ldr	r3, .L725+32
+	ldr	r3, .L726+32
 	ldrb	r0, [r3, r8]	@ zero_extendqisi2
 	bl	V2P_block
 	str	r0, [sp, #8]
-	cbz	r6, .L684
+	cbz	r6, .L685
 	bl	IsBlkInVendorPart
-	cbnz	r0, .L685
-.L684:
+	cbnz	r0, .L686
+.L685:
 	ldr	r0, [sp, #8]
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L686
+	cbnz	r0, .L687
 	ldr	r3, [sp, #8]
 	mla	r1, fp, r5, r10
 	lsls	r2, r3, #10
@@ -5324,50 +5336,50 @@ FtlLowFormatEraseBlock:
 	bic	r2, r2, #3
 	add	r2, r2, r3
 	str	r2, [r1, #12]
-.L685:
-	add	r8, r8, #1
-	b	.L683
 .L686:
+	add	r8, r8, #1
+	b	.L684
+.L687:
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L685
-.L692:
+	b	.L686
+.L693:
 	mul	r3, r10, r8
 	ldr	r2, [r7]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
 	adds	r3, r3, #1
-	bne	.L691
+	bne	.L692
 	ldr	r0, [r1, #4]
 	adds	r4, r4, #1
 	uxth	r4, r4
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.L691:
+.L692:
 	add	r8, r8, #1
-	b	.L690
-.L708:
+	b	.L691
+.L709:
 	movs	r3, #2
 	mov	r10, r6
 	str	r3, [sp, #8]
-	b	.L693
-.L697:
+	b	.L694
+.L698:
 	movs	r3, #20
 	ldr	r1, [sp, #4]
 	mul	r2, r3, r8
 	movs	r3, #0
 	str	r3, [fp, r2]
-	ldr	r3, .L725+32
+	ldr	r3, .L726+32
 	ldrb	r0, [r3, r8]	@ zero_extendqisi2
 	bl	V2P_block
 	str	r0, [sp, #12]
-	cbz	r6, .L695
+	cbz	r6, .L696
 	bl	IsBlkInVendorPart
-	cbnz	r0, .L696
-.L695:
+	cbnz	r0, .L697
+.L696:
 	ldr	r0, [sp, #12]
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L696
+	cbnz	r0, .L697
 	movs	r3, #20
 	mla	r1, r3, r5, fp
 	ldr	r3, [sp, #12]
@@ -5383,15 +5395,15 @@ FtlLowFormatEraseBlock:
 	bic	r2, r2, #3
 	add	r2, r2, r3
 	str	r2, [r1, #12]
-.L696:
+.L697:
 	add	r8, r8, #1
-	b	.L694
-.L701:
+	b	.L695
+.L702:
 	mul	r2, r3, r8
 	ldr	r1, [fp]
 	adds	r0, r1, r2
 	ldr	r2, [r1, r2]
-	cbz	r2, .L700
+	cbz	r2, .L701
 	ldr	r0, [r0, #4]
 	adds	r4, r4, #1
 	str	r3, [sp, #12]
@@ -5399,26 +5411,26 @@ FtlLowFormatEraseBlock:
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
 	ldr	r3, [sp, #12]
-.L700:
+.L701:
 	add	r8, r8, #1
-	b	.L699
-.L705:
-	cbz	r6, .L704
+	b	.L700
+.L706:
+	cbz	r6, .L705
 	mul	r3, fp, r7
 	ldr	r2, [r8]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
-	cbnz	r3, .L704
+	cbnz	r3, .L705
 	ldr	r0, [r1, #4]
 	movs	r1, #1
 	ubfx	r0, r0, #10, #16
 	bl	FtlFreeSysBlkQueueIn
-.L704:
+.L705:
 	adds	r7, r7, #1
-	b	.L703
-.L726:
+	b	.L704
+.L727:
 	.align	2
-.L725:
+.L726:
 	.word	.LANCHOR99
 	.word	.LANCHOR79
 	.word	.LANCHOR3
@@ -5444,8 +5456,8 @@ FlashTestBlk:
 	push	{r4, r5, lr}
 	mov	r5, r0
 	sub	sp, sp, #92
-	bls	.L730
-	ldr	r4, .L732
+	bls	.L731
+	ldr	r4, .L733
 	add	r0, sp, #24
 	movs	r2, #32
 	movs	r1, #165
@@ -5469,7 +5481,7 @@ FlashTestBlk:
 	mov	r1, r3
 	bl	FlashProgPages
 	ldr	r3, [sp, #4]
-	cbnz	r3, .L731
+	cbnz	r3, .L732
 	adds	r3, r5, #1
 	add	r0, sp, #4
 	str	r3, [sp, #8]
@@ -5482,26 +5494,26 @@ FlashTestBlk:
 	it	ne
 	movne	r4, #1
 	negs	r4, r4
-.L729:
+.L730:
 	movs	r2, #1
 	movs	r1, #0
 	add	r0, sp, #4
 	str	r5, [sp, #8]
 	bl	FlashEraseBlocks
-.L727:
+.L728:
 	mov	r0, r4
 	add	sp, sp, #92
 	@ sp needed
 	pop	{r4, r5, pc}
-.L731:
+.L732:
 	mov	r4, #-1
-	b	.L729
-.L730:
+	b	.L730
+.L731:
 	movs	r4, #0
-	b	.L727
-.L733:
+	b	.L728
+.L734:
 	.align	2
-.L732:
+.L733:
 	.word	.LANCHOR112
 	.size	FlashTestBlk, .-FlashTestBlk
 	.section	.text.FtlBbmTblFlush,"ax",%progbits
@@ -5517,28 +5529,28 @@ FtlBbmTblFlush:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r1, #0
-	ldr	r7, .L748
+	ldr	r7, .L749
 	movs	r4, #0
-	ldr	r5, .L748+4
+	ldr	r5, .L749+4
 	ldr	r3, [r7]
-	ldr	fp, .L748+52
-	ldr	r6, .L748+8
+	ldr	fp, .L749+52
+	ldr	r6, .L749+8
 	str	r3, [r5, #12]
-	ldr	r3, .L748+12
+	ldr	r3, .L749+12
 	ldr	r0, [fp]
-	ldr	r8, .L748+56
+	ldr	r8, .L749+56
 	ldrh	r2, [r3]
 	str	r0, [r5, #8]
 	bl	ftl_memset
 	str	r7, [sp, #12]
-	ldr	r7, .L748+16
-.L735:
+	ldr	r7, .L749+16
+.L736:
 	ldrh	r3, [r7]
 	cmp	r4, r3
-	blt	.L736
+	blt	.L737
 	ldr	r6, [r5, #12]
 	movs	r2, #16
-	ldr	r4, .L748+20
+	ldr	r4, .L749+20
 	movs	r1, #255
 	movs	r7, #0
 	mov	r0, r6
@@ -5555,13 +5567,13 @@ FtlBbmTblFlush:
 	strh	r3, [r6, #8]	@ movhi
 	ldrh	r3, [r4, #6]
 	strh	r3, [r6, #10]	@ movhi
-	ldr	r3, .L748+24
+	ldr	r3, .L749+24
 	ldr	r3, [r3]
 	strh	r3, [r6, #12]	@ movhi
-	ldr	r3, .L748+28
+	ldr	r3, .L749+28
 	ldr	r3, [r3]
 	strh	r3, [r6, #14]	@ movhi
-.L737:
+.L738:
 	ldr	r3, [fp]
 	ldrh	r2, [r4, #2]
 	ldrh	r1, [r4]
@@ -5576,14 +5588,14 @@ FtlBbmTblFlush:
 	str	r3, [r5, #4]
 	ldrh	r3, [r4, #4]
 	str	r0, [sp]
-	ldr	r0, .L748+32
+	ldr	r0, .L749+32
 	bl	printf
-	ldr	r3, .L748+36
+	ldr	r3, .L749+36
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	blt	.L738
+	blt	.L739
 	ldr	r3, [r4, #8]
 	mov	r1, #0	@ movhi
 	ldrh	r2, [r4]
@@ -5594,7 +5606,7 @@ FtlBbmTblFlush:
 	strh	r2, [r6, #8]	@ movhi
 	ldrh	r3, [r4, #4]
 	strh	r2, [r4, #4]	@ movhi
-	ldr	r2, .L748+40
+	ldr	r2, .L749+40
 	strh	r3, [r4]	@ movhi
 	lsls	r3, r3, #10
 	ldr	r0, [r2]
@@ -5603,9 +5615,9 @@ FtlBbmTblFlush:
 	mov	r1, r2
 	str	r3, [r0, #4]
 	bl	FlashEraseBlocks
-.L738:
+.L739:
 	movs	r3, #1
-	ldr	r0, .L748+4
+	ldr	r0, .L749+4
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
@@ -5614,21 +5626,21 @@ FtlBbmTblFlush:
 	strh	r3, [r10, #2]	@ movhi
 	ldr	r3, [r5]
 	adds	r2, r3, #1
-	bne	.L739
+	bne	.L740
 	adds	r7, r7, #1
 	ldr	r1, [r5, #4]
 	uxth	r7, r7
-	ldr	r0, .L748+44
+	ldr	r0, .L749+44
 	bl	printf
 	cmp	r7, #3
-	bls	.L737
+	bls	.L738
 	mov	r2, r7
 	ldr	r1, [r5, #4]
-	ldr	r0, .L748+48
+	ldr	r0, .L749+48
 	bl	printf
-.L741:
-	b	.L741
-.L736:
+.L742:
+	b	.L742
+.L737:
 	ldrh	r2, [r8]
 	ldr	r3, [r5, #8]
 	ldr	r1, [r6, #4]!
@@ -5637,20 +5649,20 @@ FtlBbmTblFlush:
 	adds	r4, r4, #1
 	add	r0, r3, r0, lsl #2
 	bl	ftl_memcpy
-	b	.L735
-.L739:
+	b	.L736
+.L740:
 	add	r8, r8, #1
 	cmp	r8, #1
-	beq	.L737
+	beq	.L738
 	cmp	r3, #256
-	beq	.L737
+	beq	.L738
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L749:
+.L750:
 	.align	2
-.L748:
+.L749:
 	.word	.LANCHOR114
 	.word	.LANCHOR138
 	.word	.LANCHOR37+24
@@ -5680,26 +5692,26 @@ allocate_data_superblock:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-.L751:
-	ldr	r3, .L790
-	ldr	r8, .L790+68
+.L752:
+	ldr	r3, .L791
+	ldr	r8, .L791+68
 	ldrh	r3, [r3]
-	ldr	r10, .L790+72
+	ldr	r10, .L791+72
 	ldrh	r2, [r8]
 	add	r3, r3, r2
 	ldrh	r2, [r10]
 	cmp	r3, r2
-	ble	.L752
+	ble	.L753
 	mov	r2, #2656
-	ldr	r1, .L790+4
-	ldr	r0, .L790+8
+	ldr	r1, .L791+4
+	ldr	r0, .L791+8
 	bl	printf
-.L752:
-	ldr	r3, .L790+12
+.L753:
+	ldr	r3, .L791+12
 	cmp	r4, r3
-	bne	.L778
-	ldr	r3, .L790
-	ldr	r2, .L790+16
+	bne	.L779
+	ldr	r3, .L791
+	ldr	r2, .L791+16
 	ldrh	r3, [r3]
 	ldr	r2, [r2]
 	lsrs	r1, r3, #1
@@ -5707,118 +5719,118 @@ allocate_data_superblock:
 	adds	r1, r1, #1
 	add	r1, r1, r2, lsr #2
 	uxth	r1, r1
-	cbz	r1, .L753
+	cbz	r1, .L754
 	subs	r1, r1, #1
 	uxth	r1, r1
-.L753:
-	ldr	r0, .L790+20
+.L754:
+	ldr	r0, .L791+20
 	bl	List_pop_index_node
-	ldr	r3, .L790
+	ldr	r3, .L791
 	mov	r5, r0
 	uxth	r7, r0
 	ldrh	r3, [r3]
-	cbnz	r3, .L754
+	cbnz	r3, .L755
 	movw	r2, #2665
-	ldr	r1, .L790+4
-	ldr	r0, .L790+8
+	ldr	r1, .L791+4
+	ldr	r0, .L791+8
 	bl	printf
-.L754:
-	ldr	r3, .L790
-	ldr	r2, .L790
+.L755:
+	ldr	r3, .L791
+	ldr	r2, .L791
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	strh	r3, [r2]	@ movhi
 	ldrh	r3, [r10]
 	cmp	r3, r7
-	bls	.L751
+	bls	.L752
 	uxth	r5, r5
 	lsls	r3, r5, #1
 	str	r3, [sp]
-	ldr	r3, .L790+24
+	ldr	r3, .L791+24
 	ldr	r3, [r3]
 	ldrh	r6, [r3, r5, lsl #1]
 	cmp	r6, #0
-	bne	.L751
+	bne	.L752
 	strh	r7, [r4]	@ movhi
 	mov	r0, r4
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L756
-	ldr	r3, .L790+24
+	cbnz	r3, .L757
+	ldr	r3, .L791+24
 	movw	r2, #65535
 	mov	r0, r7
 	ldr	r3, [r3]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
 	bl	INSERT_DATA_LIST
-	ldr	r3, .L790
+	ldr	r3, .L791
 	ldrh	r2, [r8]
 	ldrh	r3, [r3]
 	add	r3, r3, r2
 	ldrh	r2, [r10]
 	cmp	r3, r2
-	ble	.L751
+	ble	.L752
 	movw	r2, #2679
-	ldr	r1, .L790+4
-	ldr	r0, .L790+8
+	ldr	r1, .L791+4
+	ldr	r0, .L791+8
 	bl	printf
-	b	.L751
-.L778:
+	b	.L752
+.L779:
 	movs	r1, #0
-	b	.L753
-.L756:
-	ldr	r3, .L790
+	b	.L754
+.L757:
+	ldr	r3, .L791
 	ldrh	r2, [r8]
 	ldrh	r3, [r3]
 	add	r3, r3, r2
 	ldrh	r2, [r10]
 	cmp	r3, r2
-	ble	.L758
+	ble	.L759
 	movw	r2, #2682
-	ldr	r1, .L790+4
-	ldr	r0, .L790+8
+	ldr	r1, .L791+4
+	ldr	r0, .L791+8
 	bl	printf
-.L758:
-	ldr	r3, .L790+28
+.L759:
+	ldr	r3, .L791+28
 	add	lr, r4, #16
-	ldr	r2, .L790+32
+	ldr	r2, .L791+32
 	mov	r8, #0
 	ldr	ip, [r3]
 	ldrh	r0, [r2]
 	movs	r2, #20
 	mov	r3, ip
 	mla	r0, r2, r0, ip
-.L759:
+.L760:
 	cmp	r0, r3
-	bne	.L761
-	cbnz	r6, .L762
+	bne	.L762
+	cbnz	r6, .L763
 	movw	r2, #2693
-	ldr	r1, .L790+4
-	ldr	r0, .L790+8
+	ldr	r1, .L791+4
+	ldr	r0, .L791+8
 	bl	printf
-.L762:
-	ldr	r3, .L790+36
+.L763:
+	ldr	r3, .L791+36
 	ldrh	r3, [r3]
 	cmp	r3, r7
-	bne	.L763
+	bne	.L764
 	movw	r2, #2695
-	ldr	r1, .L790+4
-	ldr	r0, .L790+8
+	ldr	r1, .L791+4
+	ldr	r0, .L791+8
 	bl	printf
-.L763:
+.L764:
 	ldrb	r2, [r4, #8]	@ zero_extendqisi2
-	ldr	r3, .L790+40
-	ldr	fp, .L790+76
-	ldr	r8, .L790+80
+	ldr	r3, .L791+40
+	ldr	fp, .L791+76
+	ldr	r8, .L791+80
 	ldr	r1, [r3]
 	cmp	r2, #0
-	bne	.L764
+	bne	.L765
 	ldrh	r2, [r1, r5, lsl #1]
 	cmp	r2, #0
-	beq	.L765
-	ldr	r0, .L790+44
+	beq	.L766
+	ldr	r0, .L791+44
 	ldrh	r0, [r0]
 	add	r2, r2, r0
-.L788:
+.L789:
 	strh	r2, [r1, r5, lsl #1]	@ movhi
 	mov	r0, r7
 	ldr	r2, [fp]
@@ -5827,83 +5839,83 @@ allocate_data_superblock:
 	adds	r2, r2, #1
 	str	r2, [fp]
 	bl	ftl_set_blk_mode
-.L789:
+.L790:
 	ldr	r3, [sp, #4]
 	ldr	r0, [fp]
 	ldr	r3, [r3]
 	ldrh	r1, [r3, r5, lsl #1]
-	ldr	r3, .L790+48
+	ldr	r3, .L791+48
 	ldr	r2, [r3]
 	cmp	r1, r2
 	it	hi
 	strhi	r1, [r3]
-	ldr	r3, .L790+44
+	ldr	r3, .L791+44
 	ldrh	r1, [r10]
 	ldrh	r2, [r3]
 	ldr	r3, [r8]
 	mla	r0, r0, r2, r3
 	bl	__aeabi_uidiv
-	ldr	r3, .L790+52
-	ldr	ip, .L790+84
+	ldr	r3, .L791+52
+	ldr	ip, .L791+84
 	str	r0, [r3]
-	ldr	r3, .L790+56
+	ldr	r3, .L791+56
 	ldr	r2, [r3]
 	ldr	r3, [r2, #16]
 	adds	r3, r3, #1
 	str	r3, [r2, #16]
 	movs	r2, #20
-	ldr	r3, .L790+28
+	ldr	r3, .L791+28
 	ldr	r0, [r3]
 	adds	r3, r0, #4
 	mla	r2, r2, r6, r0
 	adds	r2, r2, #24
-.L769:
+.L770:
 	adds	r3, r3, #20
 	cmp	r2, r3
-	bne	.L770
+	bne	.L771
 	mov	r2, r6
 	ldrb	r1, [r4, #8]	@ zero_extendqisi2
 	mov	r8, #0
 	bl	FlashEraseBlocks
 	mov	r10, r8
 	movs	r3, #20
-.L771:
+.L772:
 	uxth	r2, r8
 	cmp	r6, r2
-	bhi	.L773
+	bhi	.L774
 	cmp	r10, #0
-	beq	.L774
+	beq	.L775
 	mov	r0, r7
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L774:
+.L775:
 	ldrb	r2, [r4, #7]	@ zero_extendqisi2
 	cmp	r2, #0
-	bne	.L775
-	ldr	r3, .L790+24
+	bne	.L776
+	ldr	r3, .L791+24
 	movw	r2, #65535
 	ldr	r3, [r3]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
-	b	.L751
-.L761:
+	b	.L752
+.L762:
 	ldrh	r1, [lr], #2
 	movw	fp, #65535
 	str	r8, [r3, #8]
 	str	r8, [r3, #12]
 	cmp	r1, fp
-	beq	.L760
+	beq	.L761
 	mla	fp, r2, r6, ip
 	adds	r6, r6, #1
 	lsls	r1, r1, #10
 	uxth	r6, r6
 	str	r1, [fp, #4]
-.L760:
+.L761:
 	adds	r3, r3, #20
-	b	.L759
-.L765:
+	b	.L760
+.L766:
 	movs	r2, #2
-	b	.L788
-.L764:
+	b	.L789
+.L765:
 	ldrh	r2, [r1, r5, lsl #1]
 	mov	r0, r7
 	str	r3, [sp, #4]
@@ -5913,20 +5925,20 @@ allocate_data_superblock:
 	adds	r2, r2, #1
 	str	r2, [r8]
 	bl	ftl_set_blk_mode.part.6
-	b	.L789
-.L770:
+	b	.L790
+.L771:
 	ldr	r1, [r3, #-20]
 	and	r1, r1, ip
 	str	r1, [r3, #-20]
-	b	.L769
-.L773:
-	ldr	r1, .L790+28
+	b	.L770
+.L774:
+	ldr	r1, .L791+28
 	mul	r2, r3, r8
 	ldr	r1, [r1]
 	ldr	fp, [r1, r2]
 	adds	r0, r1, r2
 	cmp	fp, #-1
-	bne	.L772
+	bne	.L773
 	ldr	r0, [r0, #4]
 	add	r10, r10, #1
 	str	r3, [sp, #4]
@@ -5938,12 +5950,12 @@ allocate_data_superblock:
 	ldrb	r2, [r4, #7]	@ zero_extendqisi2
 	subs	r2, r2, #1
 	strb	r2, [r4, #7]
-.L772:
+.L773:
 	add	r8, r8, #1
-	b	.L771
-.L775:
-	ldr	r3, .L790+60
-	ldr	r1, .L790+64
+	b	.L772
+.L776:
+	ldr	r3, .L791+60
+	ldr	r1, .L791+64
 	ldrh	r3, [r3]
 	strh	r7, [r4]	@ movhi
 	smulbb	r3, r3, r2
@@ -5956,27 +5968,27 @@ allocate_data_superblock:
 	str	r2, [r4, #12]
 	adds	r2, r2, #1
 	str	r2, [r1]
-	ldr	r2, .L790+24
+	ldr	r2, .L791+24
 	ldr	r1, [sp]
 	ldr	r2, [r2]
 	strh	r3, [r2, r1]	@ movhi
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L776
+	cbz	r3, .L777
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L777
-.L776:
+	cbnz	r3, .L778
+.L777:
 	movw	r2, #2748
-	ldr	r1, .L790+4
-	ldr	r0, .L790+8
+	ldr	r1, .L791+4
+	ldr	r0, .L791+8
 	bl	printf
-.L777:
+.L778:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L791:
+.L792:
 	.align	2
-.L790:
+.L791:
 	.word	.LANCHOR48
 	.word	.LANCHOR144
 	.word	.LC1
@@ -6013,43 +6025,43 @@ FtlGcFreeBadSuperBlk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, r0
-	ldr	r4, .L804
+	ldr	r4, .L805
 	ldrh	r3, [r4]
-	cbz	r3, .L793
-	ldr	r8, .L804+12
+	cbz	r3, .L794
+	ldr	r8, .L805+12
 	movs	r7, #0
-.L794:
-	ldr	r3, .L804+4
+.L795:
+	ldr	r3, .L805+4
 	ldrh	r2, [r3]
 	uxth	r3, r7
 	cmp	r2, r3
-	bhi	.L800
+	bhi	.L801
 	bl	FtlGcReFreshBadBlk
-.L793:
+.L794:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L800:
-	ldr	r2, .L804+8
+.L801:
+	ldr	r2, .L805+8
 	uxth	r3, r7
 	mov	r1, r10
 	mov	fp, #0
 	ldrb	r0, [r2, r3]	@ zero_extendqisi2
 	bl	V2P_block
 	mov	r1, r0
-.L795:
+.L796:
 	ldrh	r3, [r4]
 	uxth	r5, fp
 	cmp	r3, r5
-	bhi	.L799
+	bhi	.L800
 	adds	r7, r7, #1
-	b	.L794
-.L799:
+	b	.L795
+.L800:
 	uxth	r6, fp
 	ldrh	r3, [r8, r6, lsl #1]
 	cmp	r3, r1
-	bne	.L796
+	bne	.L797
 	mov	r0, r1
 	str	r1, [sp, #4]
 	bl	FtlBbmMapBadBlock
@@ -6057,23 +6069,23 @@ FtlGcFreeBadSuperBlk:
 	ldrh	r2, [r4]
 	add	r3, r8, r6, lsl #1
 	ldr	r1, [sp, #4]
-.L797:
+.L798:
 	cmp	r5, r2
-	bcc	.L798
+	bcc	.L799
 	subs	r2, r2, #1
 	strh	r2, [r4]	@ movhi
-.L796:
+.L797:
 	add	fp, fp, #1
-	b	.L795
-.L798:
+	b	.L796
+.L799:
 	ldrh	r0, [r3, #2]!
 	adds	r5, r5, #1
 	uxth	r5, r5
 	strh	r0, [r3, #-2]	@ movhi
-	b	.L797
-.L805:
+	b	.L798
+.L806:
 	.align	2
-.L804:
+.L805:
 	.word	.LANCHOR74
 	.word	.LANCHOR3
 	.word	.LANCHOR13
@@ -6092,41 +6104,41 @@ update_vpc_list:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	mov	r4, r0
-	ldr	r3, .L818
+	ldr	r3, .L819
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	bne	.L807
-	ldr	r3, .L818+4
+	bne	.L808
+	ldr	r3, .L819+4
 	ldrh	r2, [r3]
 	cmp	r2, r0
 	itt	eq
 	movweq	r2, #65535
 	strheq	r2, [r3]	@ movhi
-	ldr	r3, .L818+8
+	ldr	r3, .L819+8
 	ldrh	r2, [r3]
 	cmp	r2, r0
 	itt	eq
 	movweq	r2, #65535
 	strheq	r2, [r3]	@ movhi
-	ldr	r3, .L818+12
+	ldr	r3, .L819+12
 	ldrh	r2, [r3]
 	cmp	r2, r0
-	bne	.L810
+	bne	.L811
 	movw	r2, #65535
 	strh	r2, [r3]	@ movhi
-.L811:
-	ldr	r5, .L818+16
+.L812:
+	ldr	r5, .L819+16
 	mov	r1, r4
-	ldr	r0, .L818+20
+	ldr	r0, .L819+20
 	bl	List_remove_node
 	ldrh	r3, [r5]
-	cbnz	r3, .L813
+	cbnz	r3, .L814
 	movw	r2, #2824
-	ldr	r1, .L818+24
-	ldr	r0, .L818+28
+	ldr	r1, .L819+24
+	ldr	r0, .L819+28
 	bl	printf
-.L813:
+.L814:
 	ldrh	r3, [r5]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -6134,43 +6146,43 @@ update_vpc_list:
 	bl	free_data_superblock
 	mov	r0, r4
 	bl	FtlGcFreeBadSuperBlk
-	ldr	r3, .L818+32
+	ldr	r3, .L819+32
 	ldrh	r2, [r5]
 	ldrh	r3, [r3]
 	add	r3, r3, r2
-	ldr	r2, .L818+36
+	ldr	r2, .L819+36
 	ldrh	r2, [r2]
 	cmp	r3, r2
-	ble	.L817
+	ble	.L818
 	movw	r2, #2827
-	ldr	r1, .L818+24
-	ldr	r0, .L818+28
+	ldr	r1, .L819+24
+	ldr	r0, .L819+28
 	bl	printf
-.L817:
+.L818:
 	movs	r0, #1
 	pop	{r3, r4, r5, pc}
-.L810:
-	ldr	r3, .L818+40
+.L811:
+	ldr	r3, .L819+40
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L816
-	ldr	r3, .L818+44
+	beq	.L817
+	ldr	r3, .L819+44
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L816
-	ldr	r3, .L818+48
+	beq	.L817
+	ldr	r3, .L819+48
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L811
-.L816:
+	bne	.L812
+.L817:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L807:
+.L808:
 	bl	List_update_data_list
-	b	.L816
-.L819:
+	b	.L817
+.L820:
 	.align	2
-.L818:
+.L819:
 	.word	.LANCHOR42
 	.word	.LANCHOR72
 	.word	.LANCHOR73
@@ -6200,47 +6212,47 @@ decrement_vpc_count:
 	push	{r4, r5, r6, lr}
 	cmp	r0, r3
 	mov	r4, r0
-	beq	.L821
-	ldr	r5, .L829
+	beq	.L822
+	ldr	r5, .L830
 	ldr	r3, [r5]
 	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L822
+	cbnz	r2, .L823
 	mov	r1, r0
-	ldr	r0, .L829+4
+	ldr	r0, .L830+4
 	bl	printf
 	ldr	r3, [r5]
 	ldrh	r5, [r3, r4, lsl #1]
-	cbz	r5, .L823
-.L827:
+	cbz	r5, .L824
+.L828:
 	movs	r5, #0
-.L820:
+.L821:
 	mov	r0, r5
 	pop	{r4, r5, r6, pc}
-.L823:
+.L824:
 	movw	r2, #2842
-.L828:
-	ldr	r1, .L829+8
-	ldr	r0, .L829+12
+.L829:
+	ldr	r1, .L830+8
+	ldr	r0, .L830+12
 	bl	printf
-	b	.L820
-.L822:
+	b	.L821
+.L823:
 	subs	r2, r2, #1
 	strh	r2, [r3, r0, lsl #1]	@ movhi
-.L821:
-	ldr	r6, .L829+16
+.L822:
+	ldr	r6, .L830+16
 	movw	r3, #65535
 	ldrh	r0, [r6]
 	cmp	r0, r3
-	bne	.L825
+	bne	.L826
 	strh	r4, [r6]	@ movhi
-	b	.L827
-.L825:
+	b	.L828
+.L826:
 	cmp	r4, r0
-	beq	.L827
+	beq	.L828
 	bl	update_vpc_list
-	ldr	r3, .L829+20
+	ldr	r3, .L830+20
 	adds	r5, r0, #0
-	ldr	r2, .L829+24
+	ldr	r2, .L830+24
 	it	ne
 	movne	r5, #1
 	strh	r4, [r6]	@ movhi
@@ -6248,21 +6260,21 @@ decrement_vpc_count:
 	ldr	r2, [r2]
 	subs	r3, r3, r2
 	asrs	r2, r3, #1
-	ldr	r3, .L829+28
+	ldr	r3, .L830+28
 	muls	r3, r2, r3
-	ldr	r2, .L829
+	ldr	r2, .L830
 	ldr	r2, [r2]
 	uxth	r1, r3
 	ldrh	r2, [r2, r1, lsl #1]
 	cmp	r2, #0
-	bne	.L820
+	bne	.L821
 	cmp	r4, r1
-	beq	.L820
+	beq	.L821
 	movw	r2, #2858
-	b	.L828
-.L830:
+	b	.L829
+.L831:
 	.align	2
-.L829:
+.L830:
 	.word	.LANCHOR42
 	.word	.LC21
 	.word	.LANCHOR147
@@ -6286,14 +6298,14 @@ FtlSuperblockPowerLostFix:
 	push	{r4, r5, r6, r7, r8, lr}
 	mov	r3, #-1
 	sub	sp, sp, #24
-	ldr	r2, .L844
+	ldr	r2, .L845
 	movs	r6, #0
 	mov	r4, r0
 	str	r3, [sp, #20]
-	ldr	r3, .L844+4
+	ldr	r3, .L845+4
 	ldr	r5, [r2]
 	mvn	r2, #2
-	ldr	r8, .L844+16
+	ldr	r8, .L845+16
 	ldr	r3, [r3]
 	str	r5, [sp, #16]
 	str	r3, [sp, #12]
@@ -6314,18 +6326,18 @@ FtlSuperblockPowerLostFix:
 	ite	eq
 	moveq	r7, #6
 	movne	r7, #7
-.L837:
+.L838:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L833
-.L834:
-	ldr	r3, .L844+8
+	cbnz	r3, .L834
+.L835:
+	ldr	r3, .L845+8
 	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
-	ldr	r3, .L844+12
+	ldr	r3, .L845+12
 	ldrh	r3, [r3]
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
@@ -6334,12 +6346,12 @@ FtlSuperblockPowerLostFix:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L833:
+.L834:
 	mov	r0, r4
 	bl	get_new_active_ppa
 	str	r0, [sp, #8]
 	adds	r0, r0, #1
-	beq	.L834
+	beq	.L835
 	ldr	r3, [r8]
 	movs	r1, #1
 	add	r0, sp, #4
@@ -6355,11 +6367,11 @@ FtlSuperblockPowerLostFix:
 	ldrh	r0, [r4]
 	bl	decrement_vpc_count
 	subs	r7, r7, #1
-	bne	.L837
-	b	.L834
-.L845:
+	bne	.L838
+	b	.L835
+.L846:
 	.align	2
-.L844:
+.L845:
 	.word	.LANCHOR114
 	.word	.LANCHOR106
 	.word	.LANCHOR42
@@ -6379,61 +6391,61 @@ FtlMakeBbt:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r6, #0
-	ldr	r7, .L865
+	ldr	r7, .L866
 	bl	FtlBbtMemInit
 	sub	r8, r7, #18
 	bl	FtlLoadFactoryBbt
-.L847:
-	ldr	r3, .L865+4
+.L848:
+	ldr	r3, .L866+4
 	ldrh	r3, [r3]
 	cmp	r6, r3
-	bcc	.L853
-	ldr	r5, .L865+8
+	bcc	.L854
+	ldr	r5, .L866+8
 	movs	r4, #0
-.L854:
+.L855:
 	ldrh	r3, [r5]
 	uxth	r0, r4
 	adds	r4, r4, #1
 	cmp	r3, r0
-	bhi	.L855
-	ldr	r4, .L865+12
+	bhi	.L856
+	ldr	r4, .L866+12
 	movw	r6, #65535
 	ldrh	r5, [r4, #12]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L856:
+.L857:
 	ldrh	r3, [r4, #12]
 	subs	r3, r3, #47
 	cmp	r3, r5
-	bgt	.L860
+	bgt	.L861
 	mov	r0, r5
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L857
+	beq	.L858
 	mov	r0, r5
 	bl	FlashTestBlk
 	cmp	r0, #0
-	beq	.L858
+	beq	.L859
 	mov	r0, r5
 	bl	FtlBbmMapBadBlock
-.L857:
+.L858:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L856
-.L853:
-	ldr	r3, .L865+16
-	ldr	r5, .L865+20
+	b	.L857
+.L854:
+	ldr	r3, .L866+16
+	ldr	r5, .L866+20
 	ldrh	r2, [r8, #2]!
-	ldr	r4, .L865+24
+	ldr	r4, .L866+24
 	ldr	r0, [r3]
 	movw	r3, #65535
 	ldr	r10, [r5]
 	cmp	r2, r3
 	mov	fp, r4
-	ldr	r3, .L865+28
+	ldr	r3, .L866+28
 	str	r0, [r4, #8]
 	str	r10, [r4, #12]
-	beq	.L848
+	beq	.L849
 	ldrh	r5, [r3]
 	mov	r0, r4
 	str	r3, [sp]
@@ -6450,13 +6462,13 @@ FtlMakeBbt:
 	adds	r2, r2, #7
 	asrs	r2, r2, #3
 	bl	ftl_memcpy
-.L849:
+.L850:
 	uxth	r0, r5
 	adds	r6, r6, #1
 	adds	r7, r7, #4
 	bl	FtlBbmMapBadBlock
-	b	.L847
-.L848:
+	b	.L848
+.L849:
 	mov	r1, r6
 	str	r3, [sp]
 	bl	FlashGetBadBlockList
@@ -6468,21 +6480,21 @@ FtlMakeBbt:
 	ldrh	r4, [r3]
 	subs	r4, r4, #1
 	uxth	r4, r4
-.L850:
+.L851:
 	ldr	r3, [sp]
 	ldrh	r0, [r3]
 	smlabb	r0, r0, r6, r4
 	uxth	r0, r0
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L851
+	beq	.L852
 	ldr	r3, [sp, #4]
 	movs	r2, #16
 	movs	r1, #0
 	strh	r4, [r8]	@ movhi
 	ldr	r0, [r3]
 	bl	ftl_memset
-	ldr	r3, .L865+16
+	ldr	r3, .L866+16
 	mov	r2, #4096
 	movs	r1, #0
 	ldr	r0, [r3]
@@ -6500,42 +6512,42 @@ FtlMakeBbt:
 	mla	r5, r6, r5, r3
 	lsls	r3, r5, #10
 	str	r3, [fp, #4]
-	ldr	r3, .L865+32
+	ldr	r3, .L866+32
 	ldrh	r2, [r3]
 	lsls	r2, r2, #2
 	bl	ftl_memcpy
 	movs	r2, #1
-	ldr	r0, .L865+24
+	ldr	r0, .L866+24
 	mov	r1, r2
 	bl	FlashEraseBlocks
 	movs	r3, #1
-	ldr	r0, .L865+24
+	ldr	r0, .L866+24
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
 	ldr	r3, [fp]
 	adds	r3, r3, #1
-	bne	.L849
+	bne	.L850
 	uxth	r0, r5
 	bl	FtlBbmMapBadBlock
-	b	.L850
-.L851:
+	b	.L851
+.L852:
 	subs	r4, r4, #1
 	uxth	r4, r4
-	b	.L850
-.L855:
+	b	.L851
+.L856:
 	bl	FtlBbmMapBadBlock
-	b	.L854
-.L858:
+	b	.L855
+.L859:
 	ldrh	r3, [r4]
 	cmp	r3, r6
-	bne	.L859
+	bne	.L860
 	strh	r5, [r4]	@ movhi
-	b	.L857
-.L859:
-	strh	r5, [r4, #4]	@ movhi
+	b	.L858
 .L860:
-	ldr	r3, .L865+36
+	strh	r5, [r4, #4]	@ movhi
+.L861:
+	ldr	r3, .L866+36
 	movs	r5, #0
 	str	r5, [r4, #8]
 	movs	r1, #1
@@ -6567,9 +6579,9 @@ FtlMakeBbt:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L866:
+.L867:
 	.align	2
-.L865:
+.L866:
 	.word	.LANCHOR37+28
 	.word	.LANCHOR10
 	.word	.LANCHOR25
@@ -6606,24 +6618,24 @@ ftl_memcmp:
 js_hash:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L871
+	ldr	r3, .L872
 	add	r1, r1, r0
 	push	{r4, lr}
-.L869:
+.L870:
 	cmp	r0, r1
-	bne	.L870
+	bne	.L871
 	mov	r0, r3
 	pop	{r4, pc}
-.L870:
+.L871:
 	lsrs	r2, r3, #2
 	ldrb	r4, [r0], #1	@ zero_extendqisi2
 	add	r2, r2, r3, lsl #5
 	add	r2, r2, r4
 	eors	r3, r3, r2
-	b	.L869
-.L872:
+	b	.L870
+.L873:
 	.align	2
-.L871:
+.L872:
 	.word	1204201446
 	.size	js_hash, .-js_hash
 	.section	.text.Ftl_write_map_blk_to_last_page,"ax",%progbits
@@ -6643,14 +6655,14 @@ Ftl_write_map_blk_to_last_page:
 	mov	r4, r0
 	ldr	r5, [r0, #12]
 	cmp	r3, r2
-	bne	.L874
+	bne	.L875
 	ldrh	r3, [r0, #8]
-	cbz	r3, .L875
+	cbz	r3, .L876
 	movw	r2, #641
-	ldr	r1, .L883
-	ldr	r0, .L883+4
+	ldr	r1, .L884
+	ldr	r0, .L884+4
 	bl	printf
-.L875:
+.L876:
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
@@ -6662,20 +6674,20 @@ Ftl_write_map_blk_to_last_page:
 	ldr	r3, [r4, #28]
 	adds	r3, r3, #1
 	str	r3, [r4, #28]
-.L876:
+.L877:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L874:
+.L875:
 	ldrh	r7, [r5, r3, lsl #1]
 	movs	r1, #255
 	ldrh	r3, [r0, #2]
-	ldr	r6, .L883+8
-	ldr	r10, .L883+24
+	ldr	r6, .L884+8
+	ldr	r10, .L884+24
 	ldr	r8, [r0, #24]
 	orr	r3, r3, r7, lsl #10
 	ldr	r0, [r10]
 	str	r3, [r6, #4]
-	ldr	r3, .L883+12
+	ldr	r3, .L884+12
 	str	r0, [r6, #8]
 	ldr	r5, [r3]
 	ldr	r3, [r4, #28]
@@ -6686,7 +6698,7 @@ Ftl_write_map_blk_to_last_page:
 	ldrh	r3, [r4, #4]
 	strh	r7, [r5, #2]	@ movhi
 	strh	r3, [r5]	@ movhi
-	ldr	r3, .L883+16
+	ldr	r3, .L884+16
 	ldrh	r2, [r3]
 	lsls	r2, r2, #3
 	bl	ftl_memset
@@ -6694,11 +6706,11 @@ Ftl_write_map_blk_to_last_page:
 	movs	r3, #0
 	ldr	r1, [r10]
 	mov	r2, r3
-.L877:
+.L878:
 	uxth	r0, r3
 	cmp	ip, r0
-	bhi	.L879
-	ldr	r3, .L883+20
+	bhi	.L880
+	ldr	r3, .L884+20
 	ldr	r0, [r6, #8]
 	ldrh	r1, [r3]
 	bl	js_hash
@@ -6706,30 +6718,30 @@ Ftl_write_map_blk_to_last_page:
 	str	r0, [r5, #12]
 	movs	r3, #0
 	mov	r1, r2
-	ldr	r0, .L883+8
+	ldr	r0, .L884+8
 	bl	FlashProgPages
 	ldrh	r3, [r4, #2]
 	mov	r0, r4
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	bl	ftl_map_blk_gc
-	b	.L876
-.L879:
+	b	.L877
+.L880:
 	ldr	r0, [r8, r3, lsl #2]
 	cmp	r7, r0, lsr #10
-	bne	.L878
+	bne	.L879
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r3, [r1, r2, lsl #3]
 	add	lr, r1, r2, lsl #3
 	ldr	r0, [r8, r3, lsl #2]
 	str	r0, [lr, #4]
-.L878:
+.L879:
 	adds	r3, r3, #1
-	b	.L877
-.L884:
+	b	.L878
+.L885:
 	.align	2
-.L883:
+.L884:
 	.word	.LANCHOR148
 	.word	.LC1
 	.word	.LANCHOR138
@@ -6751,13 +6763,13 @@ FtlMapWritePage:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-	ldr	r8, .L909+32
+	ldr	r8, .L910+32
 	mov	r7, r1
 	movs	r6, #0
 	str	r2, [sp]
 	mov	fp, r8
-.L886:
-	ldr	r2, .L909
+.L887:
+	ldr	r2, .L910
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
@@ -6765,44 +6777,44 @@ FtlMapWritePage:
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	bge	.L887
+	bge	.L888
 	ldrh	r2, [r4]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L888
-.L887:
+	bne	.L889
+.L888:
 	mov	r0, r4
 	bl	Ftl_write_map_blk_to_last_page
-.L888:
+.L889:
 	ldrh	r2, [r4]
 	ldr	r3, [r4, #12]
 	ldrh	r3, [r3, r2, lsl #1]
-	cbnz	r3, .L889
+	cbnz	r3, .L890
 	mov	r2, #700
-	ldr	r1, .L909+4
-	ldr	r0, .L909+8
+	ldr	r1, .L910+4
+	ldr	r0, .L910+8
 	bl	printf
-.L889:
+.L890:
 	ldrh	r2, [r4]
 	ldrh	r3, [r4, #10]
 	cmp	r2, r3
-	bcc	.L890
+	bcc	.L891
 	movw	r2, #701
-	ldr	r1, .L909+4
-	ldr	r0, .L909+8
+	ldr	r1, .L910+4
+	ldr	r0, .L910+8
 	bl	printf
-.L890:
+.L891:
 	ldrh	r2, [r4]
 	movs	r1, #0
 	ldr	r3, [r4, #12]
-	ldr	r5, .L909+12
+	ldr	r5, .L910+12
 	ldrh	r3, [r3, r2, lsl #1]
 	ldrh	r2, [r4, #2]
 	str	r3, [sp, #4]
 	orr	r2, r2, r3, lsl #10
 	ldr	r3, [sp]
 	str	r2, [r5, #4]
-	ldr	r2, .L909+16
+	ldr	r2, .L910+16
 	str	r3, [r5, #8]
 	ldr	r0, [r2]
 	movs	r2, #16
@@ -6815,7 +6827,7 @@ FtlMapWritePage:
 	str	r1, [r10, #4]
 	ldrh	r1, [r4, #4]
 	strh	r3, [r10, #2]	@ movhi
-	ldr	r3, .L909+20
+	ldr	r3, .L910+20
 	strh	r1, [r10]	@ movhi
 	strh	r7, [r10, #8]	@ movhi
 	ldrh	r1, [r3]
@@ -6832,10 +6844,10 @@ FtlMapWritePage:
 	uxth	r2, r2
 	adds	r3, r1, #1
 	strh	r2, [r4, #2]	@ movhi
-	bne	.L891
+	bne	.L892
 	ldr	r1, [r5, #4]
 	adds	r6, r6, #1
-	ldr	r0, .L909+24
+	ldr	r0, .L910+24
 	uxth	r6, r6
 	bl	printf
 	ldrh	r2, [r4, #2]
@@ -6845,40 +6857,40 @@ FtlMapWritePage:
 	addls	r2, r2, #-1
 	strhls	r2, [r4, #2]	@ movhi
 	cmp	r6, #3
-	bls	.L893
+	bls	.L894
 	mov	r2, r6
 	ldr	r1, [r5, #4]
-	ldr	r0, .L909+28
+	ldr	r0, .L910+28
 	bl	printf
+.L895:
+	b	.L895
 .L894:
-	b	.L894
-.L893:
 	ldr	r3, [r4, #32]
 	cmp	r3, #0
-	beq	.L886
-.L908:
-	b	.L908
-.L891:
+	beq	.L887
+.L909:
+	b	.L909
+.L892:
 	cmp	r2, #1
-	beq	.L897
+	beq	.L898
 	cmp	r1, #256
-	beq	.L897
+	beq	.L898
 	ldr	r0, [r4, #36]
-	cbz	r0, .L898
-.L897:
+	cbz	r0, .L899
+.L898:
 	movs	r3, #0
 	str	r3, [r4, #36]
-	b	.L886
-.L898:
+	b	.L887
+.L899:
 	ldr	r2, [r5, #4]
 	ldr	r3, [r4, #24]
 	str	r2, [r3, r7, lsl #2]
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L910:
+.L911:
 	.align	2
-.L909:
+.L910:
 	.word	.LANCHOR88
 	.word	.LANCHOR149
 	.word	.LC1
@@ -6900,31 +6912,31 @@ FtlMapWritePage:
 load_l2p_region:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L918
+	ldr	r3, .L919
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r5, r0
 	mov	r10, r1
 	ldrh	r2, [r3]
 	str	r3, [sp, #4]
 	cmp	r2, r0
-	bcs	.L912
+	bcs	.L913
 	movw	r2, #485
-	ldr	r1, .L918+4
-	ldr	r0, .L918+8
+	ldr	r1, .L919+4
+	ldr	r0, .L919+8
 	bl	printf
-.L912:
-	ldr	fp, .L918+48
+.L913:
+	ldr	fp, .L919+48
 	movs	r4, #12
-	ldr	r7, .L918+12
+	ldr	r7, .L919+12
 	ldr	r3, [fp]
 	ldr	r8, [r3, r5, lsl #2]
 	cmp	r8, #0
-	bne	.L913
+	bne	.L914
 	mul	r4, r4, r10
 	ldr	r2, [r7]
 	movs	r1, #255
 	adds	r0, r2, r4
-	ldr	r2, .L918+16
+	ldr	r2, .L919+16
 	ldr	r0, [r0, #8]
 	ldrh	r2, [r2]
 	bl	ftl_memset
@@ -6932,21 +6944,21 @@ load_l2p_region:
 	adds	r1, r2, r4
 	strh	r5, [r2, r4]	@ movhi
 	str	r8, [r1, #4]
-.L914:
+.L915:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L913:
+.L914:
 	mul	r4, r4, r10
 	ldr	r2, [r7]
-	ldr	r6, .L918+20
+	ldr	r6, .L919+20
 	add	r2, r2, r4
 	mov	r0, r6
 	ldr	r2, [r2, #8]
 	str	r8, [r6, #4]
 	str	r2, [r6, #8]
-	ldr	r2, .L918+24
+	ldr	r2, .L919+24
 	ldr	r2, [r2]
 	str	r2, [r6, #12]
 	movs	r2, #1
@@ -6955,55 +6967,55 @@ load_l2p_region:
 	ldr	r10, [r6, #12]
 	ldrh	r2, [r10, #8]
 	cmp	r2, r5
-	beq	.L915
+	beq	.L916
 	mov	r2, r8
 	mov	r1, r5
-	ldr	r0, .L918+28
+	ldr	r0, .L919+28
 	bl	printf
 	movs	r3, #4
 	ldr	r1, [r6, #12]
 	mov	r2, r3
-	ldr	r0, .L918+32
+	ldr	r0, .L919+32
 	bl	rknand_print_hex
 	ldr	r3, [sp, #4]
 	movs	r2, #4
 	ldr	r1, [fp]
-	ldr	r0, .L918+36
+	ldr	r0, .L919+36
 	ldrh	r3, [r3]
 	bl	rknand_print_hex
-.L916:
+.L917:
 	ldrh	r3, [r10, #8]
 	cmp	r3, r5
-	beq	.L917
+	beq	.L918
 	mov	r2, #508
-	ldr	r1, .L918+4
-	ldr	r0, .L918+8
+	ldr	r1, .L919+4
+	ldr	r0, .L919+8
 	bl	printf
-.L917:
+.L918:
 	ldr	r3, [r7]
 	movs	r1, #0
 	adds	r2, r3, r4
 	str	r1, [r2, #4]
 	strh	r5, [r3, r4]	@ movhi
-	b	.L914
-.L915:
+	b	.L915
+.L916:
 	ldr	r2, [r6]
 	cmp	r2, #256
-	bne	.L916
+	bne	.L917
 	mov	r2, r8
 	mov	r1, r5
-	ldr	r0, .L918+40
+	ldr	r0, .L919+40
 	bl	printf
 	ldr	r3, [r7]
 	mov	r1, r5
-	ldr	r0, .L918+44
+	ldr	r0, .L919+44
 	add	r3, r3, r4
 	ldr	r2, [r3, #8]
 	bl	FtlMapWritePage
-	b	.L916
-.L919:
+	b	.L917
+.L920:
 	.align	2
-.L918:
+.L919:
 	.word	.LANCHOR32
 	.word	.LANCHOR150
 	.word	.LC1
@@ -7039,13 +7051,13 @@ ftl_map_blk_gc:
 	ldrh	r2, [r4, #8]
 	subs	r3, r3, #5
 	cmp	r2, r3
-	blt	.L921
+	blt	.L922
 	uxth	r0, r0
 	ldrh	r8, [r5, r0, lsl #1]
 	cmp	r8, #0
-	beq	.L921
+	beq	.L922
 	ldr	r3, [r4, #32]
-	cbnz	r3, .L921
+	cbnz	r3, .L922
 	movs	r2, #1
 	str	r2, [r4, #32]
 	strh	r3, [r5, r0, lsl #1]	@ movhi
@@ -7053,39 +7065,39 @@ ftl_map_blk_gc:
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	ldr	r3, .L936
+	ldr	r3, .L937
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L922
+	bcc	.L923
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L922:
-	ldr	r5, .L936+4
-	movs	r6, #0
 .L923:
+	ldr	r5, .L937+4
+	movs	r6, #0
+.L924:
 	ldrh	r3, [r4, #6]
 	uxth	r10, r6
 	cmp	r3, r10
-	bhi	.L930
+	bhi	.L931
 	movs	r1, #1
 	mov	r0, r8
 	bl	FtlFreeSysBlkQueueIn
 	movs	r3, #0
 	str	r3, [r4, #32]
-.L921:
-	ldr	r3, .L936
+.L922:
+	ldr	r3, .L937
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L931
+	bcc	.L932
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L931:
+.L932:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L930:
+.L931:
 	ldr	r3, [sp]
 	uxth	fp, r6
 	add	r3, r3, fp, lsl #2
@@ -7093,53 +7105,53 @@ ftl_map_blk_gc:
 	ldr	r3, [sp]
 	ldr	r2, [r3, fp, lsl #2]
 	cmp	r8, r2, lsr #10
-	bne	.L924
-	ldr	r3, .L936+8
+	bne	.L925
+	ldr	r3, .L937+8
 	str	r2, [r5, #4]
 	movs	r2, #1
-	ldr	r0, .L936+4
+	ldr	r0, .L937+4
 	ldr	r1, [r3]
 	str	r1, [r5, #8]
-	ldr	r1, .L936+12
+	ldr	r1, .L937+12
 	ldr	r7, [r1]
 	mov	r1, r2
 	str	r7, [r5, #12]
 	bl	FlashReadPages
 	ldrh	r2, [r7, #8]
 	cmp	r2, r10
-	beq	.L925
+	beq	.L926
 	movw	r2, #611
-	ldr	r1, .L936+16
-	ldr	r0, .L936+20
+	ldr	r1, .L937+16
+	ldr	r0, .L937+20
 	bl	printf
-.L925:
+.L926:
 	ldr	r2, [r5]
 	adds	r2, r2, #1
-	bne	.L926
-.L928:
+	bne	.L927
+.L929:
 	ldr	r2, [sp, #4]
 	movs	r3, #0
 	str	r3, [r2]
+.L928:
+	b	.L928
 .L927:
-	b	.L927
-.L926:
 	ldrh	r2, [r7, #8]
 	cmp	r2, r10
-	bne	.L928
+	bne	.L929
 	ldrh	r1, [r7]
 	ldrh	r2, [r4, #4]
 	cmp	r1, r2
-	bne	.L928
+	bne	.L929
 	ldr	r2, [r5, #8]
 	mov	r1, fp
 	mov	r0, r4
 	bl	FtlMapWritePage
-.L924:
+.L925:
 	adds	r6, r6, #1
-	b	.L923
-.L937:
+	b	.L924
+.L938:
 	.align	2
-.L936:
+.L937:
 	.word	.LANCHOR20
 	.word	.LANCHOR138
 	.word	.LANCHOR107
@@ -7160,9 +7172,9 @@ flush_l2p_region:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #12
-	ldr	r5, .L939
+	ldr	r5, .L940
 	muls	r4, r0, r4
-	ldr	r0, .L939+4
+	ldr	r0, .L940+4
 	ldr	r3, [r5]
 	adds	r2, r3, r4
 	ldrh	r1, [r3, r4]
@@ -7175,9 +7187,9 @@ flush_l2p_region:
 	bic	r3, r3, #-2147483648
 	str	r3, [r4, #4]
 	pop	{r3, r4, r5, pc}
-.L940:
+.L941:
 	.align	2
-.L939:
+.L940:
 	.word	.LANCHOR55
 	.word	.LANCHOR129
 	.size	flush_l2p_region, .-flush_l2p_region
@@ -7194,30 +7206,30 @@ l2p_flush:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
 	movs	r4, #0
-	ldr	r5, .L945
-	ldr	r6, .L945+4
-.L942:
+	ldr	r5, .L946
+	ldr	r6, .L946+4
+.L943:
 	ldrh	r3, [r5]
 	uxth	r0, r4
 	cmp	r3, r0
-	bhi	.L944
+	bhi	.L945
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L944:
+.L945:
 	ldr	r2, [r6]
 	uxth	r3, r4
 	movs	r1, #12
 	mla	r3, r1, r3, r2
 	ldr	r3, [r3, #4]
 	cmp	r3, #0
-	bge	.L943
+	bge	.L944
 	bl	flush_l2p_region
-.L943:
+.L944:
 	adds	r4, r4, #1
-	b	.L942
-.L946:
+	b	.L943
+.L947:
 	.align	2
-.L945:
+.L946:
 	.word	.LANCHOR33
 	.word	.LANCHOR55
 	.size	l2p_flush, .-l2p_flush
@@ -7234,36 +7246,36 @@ log2phys:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r7, r2
-	ldr	r4, .L960
+	ldr	r4, .L961
 	mov	r10, r0
 	mov	r5, r1
-	ldr	r3, .L960+4
+	ldr	r3, .L961+4
 	ldr	r2, [r4]
 	ldrh	fp, [r3]
 	cmp	r0, r2
-	bcc	.L948
+	bcc	.L949
 	movw	r2, #813
-	ldr	r1, .L960+8
-	ldr	r0, .L960+12
+	ldr	r1, .L961+8
+	ldr	r0, .L961+12
 	bl	printf
-.L948:
+.L949:
 	ldr	r3, [r4]
 	cmp	r10, r3
-	bcs	.L949
-	ldr	r3, .L960+16
+	bcs	.L950
+	ldr	r3, .L961+16
 	add	fp, fp, #7
 	lsr	r6, r10, fp
 	movs	r2, #0
 	ldrh	r1, [r3]
 	uxth	r6, r6
-	ldr	r3, .L960+20
+	ldr	r3, .L961+20
 	ldr	r0, [r3]
 	mov	r8, r3
 	movs	r3, #12
-.L950:
+.L951:
 	uxth	r4, r2
 	cmp	r4, r1
-	bcc	.L955
+	bcc	.L956
 	str	r3, [sp, #4]
 	bl	select_l2p_ram_region
 	ldr	r3, [sp, #4]
@@ -7274,31 +7286,31 @@ log2phys:
 	ldrh	r2, [r2, r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L956
+	beq	.L957
 	ldr	r3, [r1, #4]
 	cmp	r3, #0
-	bge	.L956
+	bge	.L957
 	bl	flush_l2p_region
-.L956:
+.L957:
 	mov	r1, r4
 	mov	r0, r6
 	bl	load_l2p_region
-	b	.L952
-.L949:
+	b	.L953
+.L950:
 	mov	r0, #-1
-	cbnz	r7, .L947
+	cbnz	r7, .L948
 	str	r0, [r5]
-.L947:
+.L948:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L955:
+.L956:
 	adds	r2, r2, #1
 	mla	ip, r3, r2, r0
 	ldrh	ip, [ip, #-12]
 	cmp	ip, r6
-	bne	.L950
-.L952:
+	bne	.L951
+.L953:
 	movs	r0, #1
 	ldr	r2, [r8]
 	lsl	r0, r0, fp
@@ -7307,35 +7319,35 @@ log2phys:
 	and	r0, r0, r10
 	uxth	r0, r0
 	mla	r3, r3, r4, r2
-	cbnz	r7, .L953
+	cbnz	r7, .L954
 	ldr	r3, [r3, #8]
 	ldr	r3, [r3, r0, lsl #2]
 	str	r3, [r5]
-.L954:
+.L955:
 	ldr	r2, [r8]
 	movs	r3, #12
 	mla	r4, r3, r4, r2
 	ldr	r3, [r4, #4]
 	adds	r2, r3, #1
-	beq	.L958
+	beq	.L959
 	adds	r3, r3, #1
 	str	r3, [r4, #4]
-.L958:
+.L959:
 	movs	r0, #0
-	b	.L947
-.L953:
+	b	.L948
+.L954:
 	ldr	r1, [r5]
 	ldr	r2, [r3, #8]
 	str	r1, [r2, r0, lsl #2]
 	ldr	r2, [r3, #4]
 	orr	r2, r2, #-2147483648
 	str	r2, [r3, #4]
-	ldr	r3, .L960+24
+	ldr	r3, .L961+24
 	strh	r6, [r3]	@ movhi
-	b	.L954
-.L961:
+	b	.L955
+.L962:
 	.align	2
-.L960:
+.L961:
 	.word	.LANCHOR152
 	.word	.LANCHOR22
 	.word	.LANCHOR153
@@ -7357,22 +7369,22 @@ FtlReUsePrevPpa:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r6, r0
-	ldr	r5, .L972
+	ldr	r5, .L973
 	ubfx	r0, r1, #10, #16
 	str	r1, [sp, #4]
 	bl	P2V_block_in_plane
 	ldr	r2, [r5]
 	mov	r7, r0
 	ldrh	r3, [r2, r0, lsl #1]
-	cbnz	r3, .L963
-	ldr	r2, .L972+4
+	cbnz	r3, .L964
+	ldr	r2, .L973+4
 	ldr	r4, [r2]
 	cmp	r4, #0
-	beq	.L964
-	ldr	r2, .L972+8
+	beq	.L965
+	ldr	r2, .L973+8
 	movw	lr, #65535
-	ldr	ip, .L972+24
-	ldr	r0, .L972+12
+	ldr	ip, .L973+24
+	ldr	r0, .L973+12
 	ldr	r2, [r2]
 	ldrh	r1, [r0]
 	mov	r8, r0
@@ -7381,22 +7393,22 @@ FtlReUsePrevPpa:
 	mul	r4, ip, r4
 	mov	ip, #6
 	uxth	r4, r4
-.L965:
+.L966:
 	uxth	r0, r3
 	cmp	r1, r0
-	bls	.L964
+	bls	.L965
 	cmp	r4, r7
-	bne	.L966
+	bne	.L967
 	mov	r1, r4
-	ldr	r0, .L972+4
+	ldr	r0, .L973+4
 	bl	List_remove_node
 	ldrh	r3, [r8]
-	cbnz	r3, .L967
+	cbnz	r3, .L968
 	movw	r2, #1733
-	ldr	r1, .L972+16
-	ldr	r0, .L972+20
+	ldr	r1, .L973+16
+	ldr	r0, .L973+20
 	bl	printf
-.L967:
+.L968:
 	ldrh	r3, [r8]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -7404,17 +7416,17 @@ FtlReUsePrevPpa:
 	bl	INSERT_DATA_LIST
 	ldr	r2, [r5]
 	ldrh	r3, [r2, r7, lsl #1]
-.L963:
+.L964:
 	adds	r3, r3, #1
 	strh	r3, [r2, r7, lsl #1]	@ movhi
-	b	.L964
-.L966:
+	b	.L965
+.L967:
 	mul	r4, ip, r4
 	adds	r3, r3, #1
 	ldrh	r4, [r2, r4]
 	cmp	r4, lr
-	bne	.L965
-.L964:
+	bne	.L966
+.L965:
 	movs	r2, #1
 	add	r1, sp, #4
 	mov	r0, r6
@@ -7422,9 +7434,9 @@ FtlReUsePrevPpa:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L973:
+.L974:
 	.align	2
-.L972:
+.L973:
 	.word	.LANCHOR42
 	.word	.LANCHOR46
 	.word	.LANCHOR40
@@ -7450,144 +7462,144 @@ FtlRecoverySuperblock:
 	mov	r8, r0
 	sub	sp, sp, #48
 	cmp	r3, r2
-	beq	.L1106
+	beq	.L1107
 	ldrh	r3, [r0, #2]
 	str	r3, [sp, #4]
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	ldr	r1, [sp, #4]
 	str	r3, [sp, #20]
-	ldr	r3, .L1115
+	ldr	r3, .L1116
 	ldrh	r3, [r3]
 	cmp	r3, r1
 	mov	r3, #0
-	bne	.L977
+	bne	.L978
 	strh	r3, [r0, #4]	@ movhi
-.L1113:
+.L1114:
 	strb	r3, [r8, #6]
-.L1106:
+.L1107:
 	movs	r0, #0
 	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L977:
-	ldrh	r0, [r0, #16]
 .L978:
+	ldrh	r0, [r0, #16]
+.L979:
 	cmp	r0, r2
 	uxth	r5, r3
 	add	r3, r3, #1
-	beq	.L979
+	beq	.L980
 	movs	r1, #1
 	bl	FtlGetLastWrittenPage
 	mov	r4, r0
 	adds	r0, r0, #1
-	beq	.L980
-	ldr	r3, .L1115+4
+	beq	.L981
+	ldr	r3, .L1116+4
 	movs	r2, #0
 	mov	r5, r2
 	movw	fp, #65535
 	mov	r10, #20
 	ldrh	ip, [r3]
-	ldr	r3, .L1115+8
+	ldr	r3, .L1116+8
 	ldr	r0, [r3]
-	ldr	r3, .L1115+12
+	ldr	r3, .L1116+12
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
-	ldr	r3, .L1115+16
+	ldr	r3, .L1116+16
 	ldrh	r7, [r3]
-	ldr	r3, .L1115+20
+	ldr	r3, .L1116+20
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L1115+24
+	ldr	r3, .L1116+24
 	ldrh	lr, [r3]
 	add	r3, r8, #16
 	str	r3, [sp, #16]
 	str	r3, [sp]
-.L981:
+.L982:
 	uxth	r3, r2
 	cmp	ip, r3
-	bhi	.L985
+	bhi	.L986
 	movs	r2, #0
 	mov	r1, r5
 	bl	FlashReadPages
-	ldr	r2, .L1115+28
+	ldr	r2, .L1116+28
 	uxth	r1, r4
 	movw	fp, #65535
 	str	r1, [sp, #12]
 	ldr	r3, [r2]
 	subs	r3, r3, #1
 	str	r3, [sp]
-	ldr	r3, .L1115+8
+	ldr	r3, .L1116+8
 	ldr	r10, [r3]
 	movs	r3, #0
 	mov	r7, r10
-.L986:
+.L987:
 	uxth	r1, r3
 	cmp	r5, r1
-	bhi	.L991
-	bne	.L989
+	bhi	.L992
+	bne	.L990
 	adds	r3, r4, #1
 	uxth	r3, r3
 	str	r3, [sp, #8]
-.L1107:
+.L1108:
 	ldr	r0, [r10, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_plane
-	ldr	r3, .L1115
+	ldr	r3, .L1116
 	mov	r10, r0
 	ldr	r2, [sp, #8]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bne	.L993
+	bne	.L994
 	ldrh	r3, [sp, #8]
 	strh	r3, [r8, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [r8, #6]
 	strh	r3, [r8, #4]	@ movhi
-.L993:
+.L994:
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #4]
 	cmp	r3, r2
-	bne	.L994
+	bne	.L995
 	ldr	r3, [sp, #20]
 	cmp	r10, r3
-	bne	.L994
+	bne	.L995
 	ldr	r1, [sp, #8]
 	mov	r2, r10
-.L1114:
+.L1115:
 	mov	r0, r8
 	bl	ftl_sb_update_avl_pages
-	b	.L1106
-.L979:
+	b	.L1107
+.L980:
 	uxth	r1, r3
 	adds	r1, r1, #8
 	ldrh	r0, [r8, r1, lsl #1]
-	b	.L978
-.L980:
+	b	.L979
+.L981:
 	ldr	r3, [sp, #4]
-	cbz	r3, .L982
+	cbz	r3, .L983
 	mov	r2, #1800
-	ldr	r1, .L1115+32
-	ldr	r0, .L1115+36
+	ldr	r1, .L1116+32
+	ldr	r0, .L1116+36
 	bl	printf
-.L982:
+.L983:
 	ldr	r3, [sp, #20]
-	cbz	r3, .L983
+	cbz	r3, .L984
 	cmp	r5, r3
-	beq	.L983
+	beq	.L984
 	movw	r2, #1801
-	ldr	r1, .L1115+32
-	ldr	r0, .L1115+36
+	ldr	r1, .L1116+32
+	ldr	r0, .L1116+36
 	bl	printf
-.L983:
+.L984:
 	movs	r3, #0
 	strh	r3, [r8, #2]	@ movhi
-	b	.L1113
-.L985:
+	b	.L1114
+.L986:
 	ldr	r1, [sp]
 	ldrh	r3, [r1], #2
 	cmp	r3, fp
 	str	r1, [sp]
-	beq	.L984
+	beq	.L985
 	mla	r1, r10, r5, r0
 	ldr	r6, [sp, #8]
 	orr	r3, r4, r3, lsl #10
@@ -7603,53 +7615,53 @@ FtlRecoverySuperblock:
 	bic	r3, r3, #3
 	add	r3, r3, r6
 	str	r3, [r1, #12]
-.L984:
+.L985:
 	adds	r2, r2, #1
-	b	.L981
-.L991:
+	b	.L982
+.L992:
 	ldr	r1, [r7]
-	cbnz	r1, .L987
+	cbnz	r1, .L988
 	ldr	r1, [r7, #12]
 	ldr	r6, [r1, #4]
 	str	r1, [sp, #8]
 	adds	r1, r6, #1
-	beq	.L988
+	beq	.L989
 	ldr	r1, [r2]
 	mov	r0, r6
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L988
+	cbz	r0, .L989
 	adds	r6, r6, #1
 	str	r6, [r2]
-.L988:
+.L989:
 	ldr	r1, [sp, #8]
 	ldr	r1, [r1]
 	adds	r1, r1, #1
-	bne	.L990
-.L989:
+	bne	.L991
+.L990:
 	uxth	r2, r4
 	uxth	r3, r3
 	str	r2, [sp, #8]
 	movs	r2, #20
 	mla	r10, r2, r3, r10
-	b	.L1107
-.L987:
+	b	.L1108
+.L988:
 	ldr	fp, [sp, #12]
-.L990:
+.L991:
 	adds	r3, r3, #1
 	adds	r7, r7, #20
-	b	.L986
-.L994:
+	b	.L987
+.L995:
 	movw	r3, #65535
 	cmp	fp, r3
-	bne	.L995
+	bne	.L996
 	ldrb	r3, [r8, #8]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L996
-.L995:
-	ldr	r3, .L1115+40
+	bne	.L997
+.L996:
+	ldr	r3, .L1116+40
 	uxth	r6, r4
 	uxth	r4, r4
-	ldr	r7, .L1115+8
+	ldr	r7, .L1116+8
 	ldr	r2, [r3]
 	adds	r2, r2, #1
 	itt	eq
@@ -7662,10 +7674,10 @@ FtlRecoverySuperblock:
 	subgt	r4, r6, #7
 	ldrle	r4, [sp, #4]
 	uxthgt	r4, r4
-.L999:
+.L1000:
 	cmp	r4, r6
-	bhi	.L1009
-	ldr	r3, .L1115+4
+	bhi	.L1010
+	ldr	r3, .L1116+4
 	movw	lr, #65535
 	ldr	r0, [r7]
 	mov	ip, #20
@@ -7674,47 +7686,47 @@ FtlRecoverySuperblock:
 	str	r3, [sp, #12]
 	movs	r3, #0
 	mov	r5, r3
-	b	.L1010
-.L1001:
+	b	.L1011
+.L1002:
 	ldr	r1, [sp, #12]
 	ldrh	r2, [r1], #2
 	cmp	r2, lr
 	str	r1, [sp, #12]
-	beq	.L1000
+	beq	.L1001
 	mla	r1, ip, r5, r0
 	adds	r5, r5, #1
 	orr	r2, r4, r2, lsl #10
 	uxth	r5, r5
 	str	r2, [r1, #4]
-.L1000:
+.L1001:
 	adds	r3, r3, #1
-.L1010:
+.L1011:
 	uxth	r2, r3
 	cmp	fp, r2
-	bhi	.L1001
+	bhi	.L1002
 	mov	r1, r5
 	movs	r2, #0
 	bl	FlashReadPages
-	ldr	r3, .L1115+40
+	ldr	r3, .L1116+40
 	movs	r1, #20
 	movs	r0, #0
 	movw	ip, #65535
 	ldr	r2, [r3]
 	ldr	r3, [r7]
 	mla	r5, r1, r5, r3
-.L1002:
+.L1003:
 	cmp	r5, r3
-	bne	.L1007
-	cbz	r0, .L1008
-	ldr	r3, .L1115+40
+	bne	.L1008
+	cbz	r0, .L1009
+	ldr	r3, .L1116+40
 	str	r2, [r3]
-.L1008:
+.L1009:
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L999
-.L1116:
+	b	.L1000
+.L1117:
 	.align	2
-.L1115:
+.L1116:
 	.word	.LANCHOR19
 	.word	.LANCHOR3
 	.word	.LANCHOR103
@@ -7726,22 +7738,22 @@ FtlRecoverySuperblock:
 	.word	.LANCHOR155
 	.word	.LC1
 	.word	.LANCHOR134
-.L1007:
+.L1008:
 	ldr	r1, [r3]
 	cmp	r1, #0
-	beq	.L1003
-	cbz	r0, .L996
-.L1108:
-	ldr	r3, .L1117
+	beq	.L1004
+	cbz	r0, .L997
+.L1109:
+	ldr	r3, .L1118
 	str	r2, [r3]
-.L996:
+.L997:
 	ldr	fp, [sp, #4]
 	movs	r2, #1
-	ldr	r6, .L1117+4
-	ldr	r3, .L1117+8
+	ldr	r6, .L1118+4
+	ldr	r3, .L1118+8
 	strh	r2, [r3]	@ movhi
-.L1011:
-	ldr	r3, .L1117+12
+.L1012:
+	ldr	r3, .L1118+12
 	movw	lr, #65535
 	ldr	r0, [r6]
 	movs	r7, #20
@@ -7749,64 +7761,64 @@ FtlRecoverySuperblock:
 	ldrh	r4, [r3]
 	movs	r3, #0
 	str	r3, [sp, #12]
-.L1012:
+.L1013:
 	uxth	r2, r3
 	cmp	r4, r2
-	bhi	.L1014
+	bhi	.L1015
 	movs	r2, #0
 	ldr	r1, [sp, #12]
 	bl	FlashReadPages
 	movs	r3, #0
-.L1112:
+.L1113:
 	str	r3, [sp, #24]
 	ldr	r2, [sp, #12]
 	ldrh	r3, [sp, #24]
 	cmp	r2, r3
-	bhi	.L1043
-	ldr	r3, .L1117+16
+	bhi	.L1044
+	ldr	r3, .L1118+16
 	add	fp, fp, #1
 	uxth	fp, fp
 	ldrh	r3, [r3]
 	cmp	r3, fp
-	bne	.L1011
-	ldr	r2, .L1117+12
+	bne	.L1012
+	ldr	r2, .L1118+12
 	movw	r0, #65535
 	movs	r3, #0
 	strh	fp, [r8, #2]	@ movhi
 	strh	r3, [r8, #4]	@ movhi
 	ldrh	r2, [r2]
-.L1044:
+.L1045:
 	uxth	r1, r3
 	cmp	r1, r2
-	bcs	.L1106
+	bcs	.L1107
 	ldr	r1, [sp, #16]
 	ldrh	r4, [r1], #2
 	cmp	r4, r0
 	str	r1, [sp, #16]
 	add	r1, r3, #1
-	bne	.L1113
+	bne	.L1114
 	mov	r3, r1
-	b	.L1044
-.L1003:
+	b	.L1045
+.L1004:
 	ldr	r1, [r3, #12]
 	ldrh	lr, [r1]
 	cmp	lr, ip
-	beq	.L1006
+	beq	.L1007
 	ldr	r1, [r1, #4]
 	cmp	r1, #-1
 	itt	ne
 	movne	r2, r1
 	movne	r0, #1
-.L1006:
+.L1007:
 	adds	r3, r3, #20
-	b	.L1002
-.L1009:
+	b	.L1003
+.L1010:
 	mov	r2, #-1
-	b	.L1108
-.L1014:
+	b	.L1109
+.L1015:
 	ldrh	r2, [r1], #2
 	cmp	r2, lr
-	beq	.L1013
+	beq	.L1014
 	ldr	r5, [sp, #12]
 	orr	r2, fp, r2, lsl #10
 	mla	ip, r7, r5, r0
@@ -7815,10 +7827,10 @@ FtlRecoverySuperblock:
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r2, [sp, #12]
-.L1013:
+.L1014:
 	adds	r3, r3, #1
-	b	.L1012
-.L1043:
+	b	.L1013
+.L1044:
 	ldr	r3, [sp, #24]
 	movs	r5, #20
 	muls	r5, r3, r5
@@ -7831,45 +7843,45 @@ FtlRecoverySuperblock:
 	bl	P2V_plane
 	ldr	r3, [sp, #4]
 	cmp	fp, r3
-	bcc	.L1016
+	bcc	.L1017
 	ldr	r3, [sp, #28]
-	bne	.L1017
+	bne	.L1018
 	ldr	r2, [sp, #20]
 	cmp	r2, r0
-	bhi	.L1016
-.L1017:
+	bhi	.L1017
+.L1018:
 	ldr	r2, [sp, #8]
 	cmp	fp, r2
-	bne	.L1018
+	bne	.L1019
 	cmp	r10, r0
-	beq	.L1019
-.L1018:
+	beq	.L1020
+.L1019:
 	ldr	r3, [r3, r5]
 	adds	r3, r3, #1
-	beq	.L1020
+	beq	.L1021
 	ldr	r3, [r7, #12]
 	movw	r2, #61589
 	ldrh	r1, [r3]
 	cmp	r1, r2
-	beq	.L1021
+	beq	.L1022
 	ldrh	r0, [r8]
-.L1109:
+.L1110:
 	bl	decrement_vpc_count
-	b	.L1016
-.L1021:
+	b	.L1017
+.L1022:
 	ldr	r2, [r3, #4]
 	str	r2, [sp]
 	adds	r2, r2, #1
-	beq	.L1022
-	ldr	r2, .L1117+20
+	beq	.L1023
+	ldr	r2, .L1118+20
 	ldr	r0, [sp]
 	ldr	r1, [r2]
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L1022
+	cbz	r0, .L1023
 	ldr	r1, [sp]
 	adds	r1, r1, #1
 	str	r1, [r2]
-.L1022:
+.L1023:
 	ldr	r4, [r3, #8]
 	add	r1, sp, #40
 	ldr	r3, [r3, #12]
@@ -7877,17 +7889,17 @@ FtlRecoverySuperblock:
 	mov	r0, r4
 	str	r3, [sp, #36]
 	bl	log2phys
-	ldr	r3, .L1117
+	ldr	r3, .L1118
 	ldr	r1, [r3]
 	adds	r3, r1, #1
-	beq	.L1023
+	beq	.L1024
 	ldr	r0, [sp]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1023
+	beq	.L1024
 	ldr	r3, [sp, #36]
 	adds	r7, r3, #1
-	beq	.L1024
+	beq	.L1025
 	ldr	r0, [r6]
 	movs	r2, #0
 	movs	r1, #1
@@ -7899,119 +7911,119 @@ FtlRecoverySuperblock:
 	ldr	r1, [r2, r5]
 	adds	r3, r2, r5
 	adds	r1, r1, #1
-	bne	.L1025
-.L1026:
+	bne	.L1026
+.L1027:
 	mov	r3, #-1
 	str	r3, [sp, #36]
-.L1033:
+.L1034:
 	ldr	r7, [sp, #36]
 	adds	r0, r7, #1
-	beq	.L1016
-.L1047:
+	beq	.L1017
+.L1048:
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L1117+24
+	ldr	r3, .L1118+24
 	mov	r4, r0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bhi	.L1039
+	bhi	.L1040
 	movw	r2, #2057
-	ldr	r1, .L1117+28
-	ldr	r0, .L1117+32
+	ldr	r1, .L1118+28
+	ldr	r0, .L1118+32
 	bl	printf
-.L1039:
-	ldr	r3, .L1117+36
+.L1040:
+	ldr	r3, .L1118+36
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
 	cmp	r3, #0
-	beq	.L1040
+	beq	.L1041
 	mov	r0, r4
-	b	.L1109
-.L1024:
+	b	.L1110
+.L1025:
 	ldr	r3, [sp, #44]
 	ldr	r2, [sp, #40]
 	cmp	r2, r3
-	bne	.L1016
+	bne	.L1017
 	movs	r2, #1
 	add	r1, sp, #36
 	mov	r0, r4
 	bl	log2phys
-.L1016:
+.L1017:
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	b	.L1112
-.L1025:
+	b	.L1113
+.L1026:
 	ldr	r1, [r7, #8]
 	cmp	r4, r1
-	bne	.L1026
-	ldr	r0, .L1117
+	bne	.L1027
+	ldr	r0, .L1118
 	ldr	r1, [r7, #4]
 	ldr	r0, [r0]
 	str	r1, [sp, #28]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1026
+	beq	.L1027
 	ldr	r1, [sp, #40]
 	ldr	r0, [sp, #44]
 	cmp	r1, r0
-	bne	.L1028
-.L1031:
+	bne	.L1029
+.L1032:
 	ldr	r1, [sp, #36]
 	mov	r0, r4
 	bl	FtlReUsePrevPpa
-	b	.L1026
-.L1028:
+	b	.L1027
+.L1029:
 	ldr	r0, [sp, #36]
 	cmp	r1, r0
-	beq	.L1026
+	beq	.L1027
 	adds	r0, r1, #1
-	beq	.L1029
+	beq	.L1030
 	str	r1, [r3, #4]
 	movs	r2, #0
 	movs	r1, #1
 	mov	r0, r3
 	ldr	r7, [r3, #12]
 	bl	FlashReadPages
-.L1030:
+.L1031:
 	ldr	r3, [r6]
 	ldr	r3, [r3, r5]
 	adds	r3, r3, #1
-	beq	.L1031
+	beq	.L1032
 	ldr	r3, [r7, #4]
-	ldr	r2, .L1117
+	ldr	r2, .L1118
 	mov	r1, r3
 	ldr	r0, [r2]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1031
+	beq	.L1032
 	mov	r1, r3
 	ldr	r0, [sp, #28]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1026
-	b	.L1031
-.L1029:
+	beq	.L1027
+	b	.L1032
+.L1030:
 	str	r1, [r2, r5]
-	b	.L1030
-.L1023:
+	b	.L1031
+.L1024:
 	ldr	r3, [sp, #44]
 	ldr	r2, [sp, #40]
 	cmp	r2, r3
-	beq	.L1033
+	beq	.L1034
 	ldr	r1, [sp, #36]
 	adds	r7, r1, #1
-	beq	.L1035
-	ldr	r3, .L1117+40
+	beq	.L1036
+	ldr	r3, .L1118+40
 	ldr	r3, [r3]
 	cmp	r3, r1, lsr #10
-	bhi	.L1035
-	ldr	r0, .L1117+44
-.L1111:
+	bhi	.L1036
+	ldr	r0, .L1118+44
+.L1112:
 	bl	printf
-	b	.L1016
-.L1118:
+	b	.L1017
+.L1119:
 	.align	2
-.L1117:
+.L1118:
 	.word	.LANCHOR134
 	.word	.LANCHOR103
 	.word	.LANCHOR156
@@ -8024,32 +8036,32 @@ FtlRecoverySuperblock:
 	.word	.LANCHOR42
 	.word	.LANCHOR8
 	.word	.LC27
-.L1035:
+.L1036:
 	movs	r2, #1
 	add	r1, sp, #44
 	mov	r0, r4
 	bl	log2phys
 	ldr	r7, [sp, #40]
 	adds	r5, r7, #1
-	beq	.L1033
+	beq	.L1034
 	ldr	r3, [sp, #36]
 	cmp	r7, r3
-	beq	.L1047
+	beq	.L1048
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L1119
+	ldr	r3, .L1120
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L1038
-	ldr	r3, .L1119+4
+	beq	.L1039
+	ldr	r3, .L1120+4
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L1038
-	ldr	r3, .L1119+8
+	beq	.L1039
+	ldr	r3, .L1120+8
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L1033
-.L1038:
+	bne	.L1034
+.L1039:
 	ldr	r0, [r6]
 	movs	r2, #0
 	movs	r1, #1
@@ -8059,57 +8071,57 @@ FtlRecoverySuperblock:
 	ldr	r3, [r6]
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L1033
+	beq	.L1034
 	ldr	r1, [r5, #4]
 	ldr	r0, [sp]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	bne	.L1033
+	bne	.L1034
 	movs	r2, #1
 	add	r1, sp, #40
 	mov	r0, r4
 	bl	log2phys
-	b	.L1033
-.L1040:
+	b	.L1034
+.L1041:
 	mov	r1, r4
-	ldr	r0, .L1119+12
-	b	.L1111
-.L1020:
-	ldr	r3, .L1119+16
+	ldr	r0, .L1120+12
+	b	.L1112
+.L1021:
+	ldr	r3, .L1120+16
 	ldr	r3, [r3]
 	cmp	r3, #31
-	bhi	.L1041
-	ldr	r2, .L1119+20
+	bhi	.L1042
+	ldr	r2, .L1120+20
 	str	r4, [r2, r3, lsl #2]
 	adds	r3, r3, #1
-	ldr	r2, .L1119+16
+	ldr	r2, .L1120+16
 	str	r3, [r2]
-.L1041:
+.L1042:
 	ldrh	r0, [r8]
 	bl	decrement_vpc_count
-	ldr	r3, .L1119+24
+	ldr	r3, .L1120+24
 	ldr	r2, [r3]
 	adds	r1, r2, #1
-	bne	.L1042
+	bne	.L1043
 	ldr	r2, [sp]
-.L1110:
+.L1111:
 	str	r2, [r3]
-	b	.L1016
-.L1042:
+	b	.L1017
+.L1043:
 	ldr	r1, [sp]
 	cmp	r1, r2
-	bcs	.L1016
+	bcs	.L1017
 	mov	r2, r1
-	b	.L1110
-.L1019:
+	b	.L1111
+.L1020:
 	strb	r10, [r8, #6]
 	mov	r2, r10
 	strh	fp, [r8, #2]	@ movhi
 	mov	r1, fp
-	b	.L1114
-.L1120:
+	b	.L1115
+.L1121:
 	.align	2
-.L1119:
+.L1120:
 	.word	.LANCHOR51
 	.word	.LANCHOR52
 	.word	.LANCHOR53
@@ -8131,56 +8143,56 @@ ftl_check_vpc:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r6, .L1145
-	ldr	r5, .L1145+4
-	ldr	r1, .L1145+8
-	ldr	r0, .L1145+12
+	ldr	r6, .L1146
+	ldr	r5, .L1146+4
+	ldr	r1, .L1146+8
+	ldr	r0, .L1146+12
 	bl	printf
 	mov	r2, #8192
 	movs	r1, #0
-	ldr	r0, .L1145+4
+	ldr	r0, .L1146+4
 	bl	ftl_memset
-.L1122:
+.L1123:
 	ldr	r3, [r6]
 	cmp	r4, r3
-	bcc	.L1124
-	ldr	r10, .L1145+48
+	bcc	.L1125
+	ldr	r10, .L1146+48
 	movs	r4, #0
-	ldr	r7, .L1145+16
+	ldr	r7, .L1146+16
 	mov	r6, r4
-.L1125:
+.L1126:
 	ldrh	r2, [r10]
 	uxth	r3, r4
 	cmp	r2, r3
-	bhi	.L1127
-	ldr	r3, .L1145+20
+	bhi	.L1128
+	ldr	r3, .L1146+20
 	ldr	r4, [r3]
-	cbz	r4, .L1128
-	ldr	r3, .L1145+24
+	cbz	r4, .L1129
+	ldr	r3, .L1146+24
 	mov	r8, #0
-	ldr	r5, .L1145+28
-	ldr	r10, .L1145+16
+	ldr	r5, .L1146+28
+	ldr	r10, .L1146+16
 	ldrh	r7, [r3]
 	ldr	r3, [r5]
-	ldr	fp, .L1145+4
+	ldr	fp, .L1146+4
 	subs	r4, r4, r3
-	ldr	r3, .L1145+32
+	ldr	r3, .L1146+32
 	asrs	r4, r4, #1
 	muls	r4, r3, r4
 	uxth	r4, r4
-.L1129:
+.L1130:
 	uxth	r3, r8
 	cmp	r7, r3
-	bls	.L1128
+	bls	.L1129
 	ldr	r3, [r10]
 	ldrh	r2, [r3, r4, lsl #1]
-	cbz	r2, .L1130
+	cbz	r2, .L1131
 	movs	r6, #1
 	ldrh	r3, [fp, r4, lsl #1]
 	mov	r1, r4
-	ldr	r0, .L1145+36
+	ldr	r0, .L1146+36
 	bl	printf
-.L1130:
+.L1131:
 	movs	r3, #6
 	ldr	r2, [r5]
 	muls	r4, r3, r4
@@ -8188,59 +8200,59 @@ ftl_check_vpc:
 	add	r8, r8, #1
 	ldrh	r4, [r2, r4]
 	cmp	r4, r3
-	bne	.L1129
-.L1128:
-	cbz	r6, .L1121
+	bne	.L1130
+.L1129:
+	cbz	r6, .L1122
 	movw	r2, #2383
-	ldr	r1, .L1145+8
-	ldr	r0, .L1145+40
+	ldr	r1, .L1146+8
+	ldr	r0, .L1146+40
 	bl	printf
-.L1121:
+.L1122:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1124:
+.L1125:
 	movs	r2, #0
 	add	r1, sp, #4
 	mov	r0, r4
 	bl	log2phys
 	ldr	r0, [sp, #4]
 	adds	r3, r0, #1
-	beq	.L1123
+	beq	.L1124
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r5, r0, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r5, r0, lsl #1]	@ movhi
-.L1123:
+.L1124:
 	adds	r4, r4, #1
-	b	.L1122
-.L1127:
+	b	.L1123
+.L1128:
 	ldr	r3, [r7]
 	uxth	r5, r4
-	ldr	r8, .L1145+4
+	ldr	r8, .L1146+4
 	ldrh	r2, [r3, r5, lsl #1]
 	ldrh	r3, [r8, r5, lsl #1]
 	cmp	r2, r3
-	beq	.L1126
+	beq	.L1127
 	mov	r1, r5
-	ldr	r0, .L1145+44
+	ldr	r0, .L1146+44
 	bl	printf
 	ldr	r3, [r7]
 	movw	r2, #65535
 	ldrh	r3, [r3, r5, lsl #1]
 	cmp	r3, r2
-	beq	.L1126
+	beq	.L1127
 	ldrh	r2, [r8, r5, lsl #1]
 	cmp	r2, r3
 	it	hi
 	movhi	r6, #1
-.L1126:
+.L1127:
 	adds	r4, r4, #1
-	b	.L1125
-.L1146:
+	b	.L1126
+.L1147:
 	.align	2
-.L1145:
+.L1146:
 	.word	.LANCHOR152
 	.word	check_vpc_table
 	.word	.LANCHOR159
@@ -8268,60 +8280,60 @@ ftl_scan_all_data:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r5, #0
-	ldr	r7, .L1161
+	ldr	r7, .L1162
 	sub	sp, sp, #32
 	movs	r1, #0
-	ldr	r8, .L1161+24
-	ldr	r0, .L1161+4
+	ldr	r8, .L1162+24
+	ldr	r0, .L1162+4
 	bl	printf
-.L1148:
+.L1149:
 	ldr	r3, [r7]
 	cmp	r5, r3
-	bcc	.L1154
+	bcc	.L1155
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1154:
+.L1155:
 	movs	r2, #0
 	add	r1, sp, #28
 	mov	r0, r5
 	bl	log2phys
 	ubfx	r3, r5, #0, #11
-	cbnz	r3, .L1149
+	cbnz	r3, .L1150
 	ldr	r2, [sp, #28]
 	mov	r1, r5
 	mov	r0, r8
 	bl	printf
-.L1149:
+.L1150:
 	ldr	r3, [sp, #28]
 	adds	r2, r3, #1
-	beq	.L1151
-	ldr	r4, .L1161+8
+	beq	.L1152
+	ldr	r4, .L1162+8
 	movs	r2, #0
 	movs	r1, #1
 	str	r3, [r4, #4]
 	mov	r0, r4
-	ldr	r3, .L1161+12
+	ldr	r3, .L1162+12
 	str	r5, [r4, #16]
 	str	r2, [r4]
 	ldr	r3, [r3]
 	str	r3, [r4, #8]
-	ldr	r3, .L1161+16
+	ldr	r3, .L1162+16
 	ldr	r6, [r3]
 	str	r6, [r4, #12]
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	cmp	r3, #256
-	beq	.L1152
+	beq	.L1153
 	adds	r3, r3, #1
-	beq	.L1152
+	beq	.L1153
 	ldr	r3, [r6, #8]
 	cmp	r5, r3
-	beq	.L1151
-.L1152:
+	beq	.L1152
+.L1153:
 	ldr	r2, [r4, #8]
 	ldr	r3, [r4, #12]
-	ldr	r0, .L1161+20
+	ldr	r0, .L1162+20
 	ldr	r1, [r2, #4]
 	str	r1, [sp, #16]
 	mov	r1, r5
@@ -8336,12 +8348,12 @@ ftl_scan_all_data:
 	ldr	r2, [r4, #4]
 	ldr	r3, [r3]
 	bl	printf
-.L1151:
+.L1152:
 	adds	r5, r5, #1
-	b	.L1148
-.L1162:
+	b	.L1149
+.L1163:
 	.align	2
-.L1161:
+.L1162:
 	.word	.LANCHOR152
 	.word	.LC32
 	.word	.LANCHOR138
@@ -8361,7 +8373,7 @@ ftl_scan_all_data:
 FtlGcScanTempBlk:
 	@ args = 0, pretend = 0, frame = 48
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1195
+	ldr	r3, .L1196
 	movw	r2, #65535
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #48
@@ -8369,29 +8381,29 @@ FtlGcScanTempBlk:
 	ldrh	r5, [r3]
 	str	r3, [sp, #20]
 	cmp	r5, r2
-	beq	.L1185
-	cbnz	r5, .L1164
-.L1165:
+	beq	.L1186
+	cbnz	r5, .L1165
+.L1166:
 	bl	FtlGcPageVarInit
-	b	.L1166
-.L1185:
+	b	.L1167
+.L1186:
 	movs	r5, #0
-.L1164:
-	ldr	r3, .L1195+4
+.L1165:
+	ldr	r3, .L1196+4
 	ldrh	r3, [r3]
 	cmp	r3, r1
-	beq	.L1165
-.L1166:
-	ldr	fp, .L1195+56
-.L1182:
+	beq	.L1166
+.L1167:
+	ldr	fp, .L1196+56
+.L1183:
 	ldrh	r2, [r4]
 	movs	r3, #0
 	strb	r3, [r4, #8]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1167
-.L1184:
-	ldr	r3, .L1195+8
+	beq	.L1168
+.L1185:
+	ldr	r3, .L1196+8
 	movs	r2, #0
 	ldr	r0, [fp]
 	mov	r10, r2
@@ -8399,38 +8411,38 @@ FtlGcScanTempBlk:
 	mov	r8, #20
 	ldrh	r3, [r3]
 	str	r3, [sp, #8]
-	ldr	r3, .L1195+12
+	ldr	r3, .L1196+12
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L1195+16
+	ldr	r3, .L1196+16
 	ldrh	r3, [r3]
 	str	r3, [sp, #16]
-	ldr	r3, .L1195+20
+	ldr	r3, .L1196+20
 	ldr	r7, [r3]
-	ldr	r3, .L1195+24
+	ldr	r3, .L1196+24
 	ldrh	ip, [r3]
 	add	r3, r4, #16
 	str	r3, [sp, #4]
-.L1168:
+.L1169:
 	ldr	r1, [sp, #8]
 	uxth	r3, r2
 	cmp	r1, r3
-	bhi	.L1170
+	bhi	.L1171
 	mov	r8, #0
 	movs	r2, #0
 	mov	r1, r10
 	bl	FlashReadPages
-.L1171:
+.L1172:
 	uxth	r3, r8
 	cmp	r10, r3
-	bhi	.L1183
-	ldr	r3, .L1195+4
+	bhi	.L1184
+	ldr	r3, .L1196+4
 	adds	r5, r5, #1
 	uxth	r5, r5
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	bhi	.L1184
-.L1167:
+	bhi	.L1185
+.L1168:
 	ldr	r2, [sp, #20]
 	movw	r3, #65535
 	mov	r0, r4
@@ -8444,12 +8456,12 @@ FtlGcScanTempBlk:
 	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1170:
+.L1171:
 	ldr	r1, [sp, #4]
 	ldrh	r3, [r1], #2
 	cmp	r3, lr
 	str	r1, [sp, #4]
-	beq	.L1169
+	beq	.L1170
 	mla	r1, r8, r10, r0
 	orr	r3, r5, r3, lsl #10
 	str	r3, [r1, #4]
@@ -8466,10 +8478,10 @@ FtlGcScanTempBlk:
 	str	r3, [r1, #12]
 	add	r3, r10, #1
 	uxth	r10, r3
-.L1169:
+.L1170:
 	adds	r2, r2, #1
-	b	.L1168
-.L1183:
+	b	.L1169
+.L1184:
 	movs	r3, #20
 	ldr	r2, [fp]
 	mul	r3, r3, r8
@@ -8479,18 +8491,18 @@ FtlGcScanTempBlk:
 	ldr	r7, [r1, #12]
 	str	r0, [sp, #4]
 	cmp	r6, #0
-	bne	.L1172
+	bne	.L1173
 	ldrh	r1, [r7]
 	movw	r2, #65535
 	cmp	r1, r2
-	beq	.L1193
-	ldr	r2, .L1195+28
+	beq	.L1194
+	ldr	r2, .L1196+28
 	ldr	r0, [r7, #8]
 	ldr	r2, [r2]
 	cmp	r0, r2
-	bls	.L1174
-.L1193:
-	ldr	r3, .L1195+32
+	bls	.L1175
+.L1194:
+	ldr	r3, .L1196+32
 	movs	r1, #0
 	ldrh	r2, [r4]
 	movs	r5, #0
@@ -8498,13 +8510,13 @@ FtlGcScanTempBlk:
 	strh	r1, [r3, r2, lsl #1]	@ movhi
 	ldrh	r0, [r4]
 	bl	INSERT_FREE_LIST
-	ldr	r2, .L1195+36
+	ldr	r2, .L1196+36
 	movw	r3, #65535
 	strh	r3, [r4]	@ movhi
 	strh	r3, [r2]	@ movhi
 	bl	FtlGcPageVarInit
-	b	.L1182
-.L1174:
+	b	.L1183
+.L1175:
 	mov	r2, r6
 	add	r1, sp, #24
 	str	r3, [sp, #8]
@@ -8513,59 +8525,59 @@ FtlGcScanTempBlk:
 	ldr	r1, [sp, #24]
 	ldr	r3, [sp, #8]
 	cmp	r2, r1
-	beq	.L1176
-.L1178:
+	beq	.L1177
+.L1179:
 	ldr	r2, [r7, #8]
-.L1194:
+.L1195:
 	ldr	r1, [sp, #4]
 	add	r8, r8, #1
 	ldr	r0, [r7, #12]
 	bl	FtlGcUpdatePage
-	b	.L1171
-.L1176:
+	b	.L1172
+.L1177:
 	str	r3, [sp, #8]
 	adds	r3, r2, #1
-	beq	.L1178
+	beq	.L1179
 	str	r2, [sp, #32]
 	movs	r1, #1
-	ldr	r2, .L1195+40
+	ldr	r2, .L1196+40
 	add	r0, sp, #28
 	ldr	r2, [r2]
 	str	r2, [sp, #36]
-	ldr	r2, .L1195+44
+	ldr	r2, .L1196+44
 	ldr	r2, [r2]
 	str	r2, [sp, #40]
 	mov	r2, r6
 	bl	FlashReadPages
-	ldr	r2, .L1195+48
+	ldr	r2, .L1196+48
 	ldr	r1, [fp]
 	ldr	r3, [sp, #8]
 	ldrh	r2, [r2]
 	ldr	r0, [sp, #36]
 	add	ip, r3, r1
 	lsls	r2, r2, #7
-.L1179:
+.L1180:
 	cmp	r6, r2
-	beq	.L1178
+	beq	.L1179
 	ldr	r1, [ip, #8]
 	ldr	r3, [r0, r6, lsl #2]
 	ldr	r1, [r1, r6, lsl #2]
 	cmp	r1, r3
-	beq	.L1180
+	beq	.L1181
 	ldr	r2, [sp, #32]
 	ldrh	r1, [r4]
-	ldr	r0, .L1195+52
+	ldr	r0, .L1196+52
 	bl	printf
-	b	.L1193
-.L1180:
+	b	.L1194
+.L1181:
 	adds	r6, r6, #1
-	b	.L1179
-.L1172:
+	b	.L1180
+.L1173:
 	mov	r2, #-1
-	b	.L1194
-.L1196:
+	b	.L1195
+.L1197:
 	.align	2
-.L1195:
+.L1196:
 	.word	.LANCHOR160
 	.word	.LANCHOR19
 	.word	.LANCHOR3
@@ -8593,7 +8605,7 @@ FtlGcScanTempBlk:
 FtlVendorPartWrite:
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1209
+	ldr	r3, .L1210
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #104
 	str	r2, [sp]
@@ -8602,26 +8614,26 @@ FtlVendorPartWrite:
 	mov	r5, r1
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1205
-	ldr	r3, .L1209+4
+	bhi	.L1206
+	ldr	r3, .L1210+4
 	mov	r8, #0
 	ldrh	r6, [r3]
 	lsr	r6, r0, r6
 	lsl	fp, r6, #2
-.L1199:
-	cbnz	r5, .L1204
-.L1197:
+.L1200:
+	cbnz	r5, .L1205
+.L1198:
 	mov	r0, r8
 	add	sp, sp, #104
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1204:
-	ldr	r3, .L1209+8
+.L1205:
+	ldr	r3, .L1210+8
 	mov	r0, r7
-	ldr	r10, .L1209+24
+	ldr	r10, .L1210+24
 	ldr	r3, [r3]
 	ldr	r2, [r3, fp]
-	ldr	r3, .L1209+12
+	ldr	r3, .L1210+12
 	str	r2, [sp, #12]
 	ldrh	r3, [r3]
 	mov	r1, r3
@@ -8635,9 +8647,9 @@ FtlVendorPartWrite:
 	cmp	r5, r4
 	it	cc
 	uxthcc	r4, r5
-	cbz	r2, .L1201
+	cbz	r2, .L1202
 	cmp	r4, r3
-	beq	.L1201
+	beq	.L1202
 	ldr	r3, [r10]
 	add	r0, sp, #20
 	str	r2, [sp, #24]
@@ -8647,7 +8659,7 @@ FtlVendorPartWrite:
 	add	r3, sp, #40
 	str	r3, [sp, #32]
 	bl	FlashReadPages
-.L1202:
+.L1203:
 	lsls	r3, r4, #9
 	ldr	r0, [r10]
 	subs	r5, r5, r4
@@ -8660,7 +8672,7 @@ FtlVendorPartWrite:
 	bl	ftl_memcpy
 	ldr	r2, [r10]
 	mov	r1, r6
-	ldr	r0, .L1209+16
+	ldr	r0, .L1210+16
 	adds	r6, r6, #1
 	bl	FtlMapWritePage
 	ldr	r3, [sp]
@@ -8671,20 +8683,20 @@ FtlVendorPartWrite:
 	ldr	r3, [sp, #8]
 	add	r2, r2, r3
 	str	r2, [sp]
-	b	.L1199
-.L1201:
-	ldr	r3, .L1209+20
+	b	.L1200
+.L1202:
+	ldr	r3, .L1210+20
 	movs	r1, #0
 	ldr	r0, [r10]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-	b	.L1202
-.L1205:
+	b	.L1203
+.L1206:
 	mov	r8, #-1
-	b	.L1197
-.L1210:
+	b	.L1198
+.L1211:
 	.align	2
-.L1209:
+.L1210:
 	.word	.LANCHOR16
 	.word	.LANCHOR22
 	.word	.LANCHOR123
@@ -8705,57 +8717,57 @@ Ftl_save_ext_data:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L1213
-	ldr	r3, .L1213+4
+	ldr	r2, .L1214
+	ldr	r3, .L1214+4
 	ldr	r1, [r2]
 	cmp	r1, r3
-	bne	.L1211
-	ldr	r3, .L1213+8
+	bne	.L1212
+	ldr	r3, .L1214+8
 	movs	r1, #1
 	movs	r0, #0
 	str	r3, [r2, #4]
-	ldr	r3, .L1213+12
+	ldr	r3, .L1214+12
 	ldr	r3, [r3]
 	str	r3, [r2, #88]
-	ldr	r3, .L1213+16
+	ldr	r3, .L1214+16
 	ldr	r3, [r3]
 	str	r3, [r2, #92]
-	ldr	r3, .L1213+20
+	ldr	r3, .L1214+20
 	ldr	r3, [r3]
 	str	r3, [r2, #8]
-	ldr	r3, .L1213+24
+	ldr	r3, .L1214+24
 	ldr	r3, [r3]
 	str	r3, [r2, #12]
-	ldr	r3, .L1213+28
+	ldr	r3, .L1214+28
 	ldr	r3, [r3]
 	str	r3, [r2, #16]
-	ldr	r3, .L1213+32
+	ldr	r3, .L1214+32
 	ldr	r3, [r3]
 	str	r3, [r2, #20]
-	ldr	r3, .L1213+36
+	ldr	r3, .L1214+36
 	ldr	r3, [r3]
 	str	r3, [r2, #28]
-	ldr	r3, .L1213+40
+	ldr	r3, .L1214+40
 	ldr	r3, [r3]
 	str	r3, [r2, #32]
-	ldr	r3, .L1213+44
+	ldr	r3, .L1214+44
 	ldr	r3, [r3]
 	str	r3, [r2, #36]
-	ldr	r3, .L1213+48
+	ldr	r3, .L1214+48
 	ldr	r3, [r3]
 	str	r3, [r2, #40]
-	ldr	r3, .L1213+52
+	ldr	r3, .L1214+52
 	ldr	r3, [r3]
 	str	r3, [r2, #44]
-	ldr	r3, .L1213+56
+	ldr	r3, .L1214+56
 	ldr	r3, [r3]
 	str	r3, [r2, #48]
 	b	FtlVendorPartWrite
-.L1211:
+.L1212:
 	bx	lr
-.L1214:
+.L1215:
 	.align	2
-.L1213:
+.L1214:
 	.word	.LANCHOR135
 	.word	1179929683
 	.word	1342177352
@@ -8783,7 +8795,7 @@ Ftl_save_ext_data:
 FtlEctTblFlush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L1220
+	ldr	r2, .L1221
 	push	{r3, lr}
 	ldrh	r3, [r2]
 	cmp	r3, #31
@@ -8792,22 +8804,22 @@ FtlEctTblFlush:
 	movhi	r3, #32
 	strhls	r3, [r2]	@ movhi
 	movls	r3, #1
-	ldr	r2, .L1220+4
-	cbnz	r0, .L1217
+	ldr	r2, .L1221+4
+	cbnz	r0, .L1218
 	ldr	r1, [r2]
 	ldr	r0, [r1, #20]
 	ldr	r1, [r1, #16]
 	add	r3, r3, r0
 	cmp	r1, r3
-	bcc	.L1218
-.L1217:
+	bcc	.L1219
+.L1218:
 	ldr	r2, [r2]
 	movs	r0, #64
 	ldr	r3, [r2, #16]
 	str	r3, [r2, #20]
-	ldr	r3, .L1220+8
+	ldr	r3, .L1221+8
 	str	r3, [r2]
-	ldr	r3, .L1220+12
+	ldr	r3, .L1221+12
 	ldrh	r1, [r3]
 	lsls	r3, r1, #9
 	str	r3, [r2, #12]
@@ -8818,12 +8830,12 @@ FtlEctTblFlush:
 	str	r3, [r2, #4]
 	bl	FtlVendorPartWrite
 	bl	Ftl_save_ext_data
-.L1218:
+.L1219:
 	movs	r0, #0
 	pop	{r3, pc}
-.L1221:
+.L1222:
 	.align	2
-.L1220:
+.L1221:
 	.word	.LANCHOR164
 	.word	.LANCHOR118
 	.word	1112818501
@@ -8855,7 +8867,7 @@ sftl_vendor_write:
 FtlVendorPartRead:
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1233
+	ldr	r3, .L1234
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, r2
 	adds	r2, r0, r1
@@ -8864,28 +8876,28 @@ FtlVendorPartRead:
 	mov	r6, r1
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1232
-	ldr	r3, .L1233+4
+	bhi	.L1233
+	ldr	r3, .L1234+4
 	mov	r8, #0
-	ldr	fp, .L1233+28
+	ldr	fp, .L1234+28
 	ldrh	r5, [r3]
 	lsr	r5, r0, r5
 	lsls	r3, r5, #2
 	str	r3, [sp]
-.L1225:
-	cbnz	r6, .L1231
-.L1223:
+.L1226:
+	cbnz	r6, .L1232
+.L1224:
 	mov	r0, r8
 	add	sp, sp, #104
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1231:
-	ldr	r3, .L1233+8
+.L1232:
+	ldr	r3, .L1234+8
 	mov	r0, r7
 	ldr	r2, [sp]
 	ldr	r3, [r3]
 	ldr	r3, [r3, r2]
-	ldr	r2, .L1233+12
+	ldr	r2, .L1234+12
 	str	r3, [sp, #8]
 	ldrh	r4, [r2]
 	mov	r1, r4
@@ -8900,7 +8912,7 @@ FtlVendorPartRead:
 	lsls	r2, r4, #9
 	str	r2, [sp, #8]
 	cmp	r3, #0
-	beq	.L1227
+	beq	.L1228
 	ldr	r2, [fp]
 	add	r0, sp, #20
 	str	r3, [sp, #24]
@@ -8914,28 +8926,28 @@ FtlVendorPartRead:
 	ldr	r2, [sp, #20]
 	ldr	r3, [sp, #12]
 	adds	r2, r2, #1
-	ldr	r2, .L1233+16
+	ldr	r2, .L1234+16
 	it	eq
 	moveq	r8, #-1
 	ldr	r2, [r2]
 	cmp	r2, #256
-	bne	.L1229
+	bne	.L1230
 	mov	r2, r3
 	mov	r1, r5
-	ldr	r0, .L1233+20
+	ldr	r0, .L1234+20
 	bl	printf
 	ldr	r2, [fp]
 	mov	r1, r5
-	ldr	r0, .L1233+24
+	ldr	r0, .L1234+24
 	bl	FtlMapWritePage
-.L1229:
+.L1230:
 	ldr	r1, [fp]
 	lsls	r2, r4, #9
 	ldr	r3, [sp, #4]
 	mov	r0, r10
 	add	r1, r1, r3, lsl #9
 	bl	ftl_memcpy
-.L1230:
+.L1231:
 	ldr	r3, [sp, #8]
 	adds	r5, r5, #1
 	subs	r6, r6, r4
@@ -8944,19 +8956,19 @@ FtlVendorPartRead:
 	ldr	r3, [sp]
 	adds	r3, r3, #4
 	str	r3, [sp]
-	b	.L1225
-.L1227:
+	b	.L1226
+.L1228:
 	lsls	r2, r4, #9
 	mov	r1, r3
 	mov	r0, r10
 	bl	ftl_memset
-	b	.L1230
-.L1232:
+	b	.L1231
+.L1233:
 	mov	r8, #-1
-	b	.L1223
-.L1234:
+	b	.L1224
+.L1235:
 	.align	2
-.L1233:
+.L1234:
 	.word	.LANCHOR16
 	.word	.LANCHOR22
 	.word	.LANCHOR123
@@ -8979,30 +8991,30 @@ FtlLoadEctTbl:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r0, #64
-	ldr	r4, .L1237
-	ldr	r5, .L1237+4
+	ldr	r4, .L1238
+	ldr	r5, .L1238+4
 	ldr	r2, [r4]
 	ldrh	r1, [r5]
 	bl	FtlVendorPartRead
 	ldr	r3, [r4]
 	ldr	r2, [r3]
-	ldr	r3, .L1237+8
+	ldr	r3, .L1238+8
 	cmp	r2, r3
-	beq	.L1236
-	ldr	r1, .L1237+12
-	ldr	r0, .L1237+16
+	beq	.L1237
+	ldr	r1, .L1238+12
+	ldr	r0, .L1238+16
 	bl	printf
 	ldrh	r2, [r5]
 	movs	r1, #0
 	ldr	r0, [r4]
 	lsls	r2, r2, #9
 	bl	ftl_memset
-.L1236:
+.L1237:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L1238:
+.L1239:
 	.align	2
-.L1237:
+.L1238:
 	.word	.LANCHOR118
 	.word	.LANCHOR116
 	.word	1112818501
@@ -9022,75 +9034,75 @@ Ftl_load_ext_data:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r1, #1
-	ldr	r4, .L1242
+	ldr	r4, .L1243
 	movs	r0, #0
-	ldr	r5, .L1242+4
+	ldr	r5, .L1243+4
 	mov	r2, r4
 	bl	FtlVendorPartRead
 	ldr	r3, [r4]
 	cmp	r3, r5
-	beq	.L1240
+	beq	.L1241
 	mov	r2, #512
 	movs	r1, #0
 	mov	r0, r4
 	bl	ftl_memset
 	str	r5, [r4]
-.L1240:
+.L1241:
 	ldr	r3, [r4]
 	cmp	r3, r5
-	ldr	r3, .L1242+8
-	bne	.L1241
+	ldr	r3, .L1243+8
+	bne	.L1242
 	ldr	r1, [r4, #88]
-	ldr	r2, .L1242+12
+	ldr	r2, .L1243+12
 	str	r1, [r2]
 	ldr	r1, [r4, #92]
-	ldr	r2, .L1242+16
+	ldr	r2, .L1243+16
 	str	r1, [r2]
 	ldr	r1, [r4, #8]
-	ldr	r2, .L1242+20
+	ldr	r2, .L1243+20
 	str	r1, [r2]
 	ldr	r1, [r4, #12]
-	ldr	r2, .L1242+24
+	ldr	r2, .L1243+24
 	str	r1, [r2]
 	ldr	r1, [r4, #16]
-	ldr	r2, .L1242+28
+	ldr	r2, .L1243+28
 	str	r1, [r2]
 	ldr	r1, [r4, #20]
-	ldr	r2, .L1242+32
+	ldr	r2, .L1243+32
 	str	r1, [r2]
 	ldr	r2, [r4, #28]
 	ldr	r1, [r4, #32]
 	str	r2, [r3]
-	ldr	r2, .L1242+36
+	ldr	r2, .L1243+36
 	str	r1, [r2]
 	ldr	r1, [r4, #36]
-	ldr	r2, .L1242+40
+	ldr	r2, .L1243+40
 	str	r1, [r2]
 	ldr	r1, [r4, #40]
-	ldr	r2, .L1242+44
+	ldr	r2, .L1243+44
 	str	r1, [r2]
 	ldr	r1, [r4, #44]
-	ldr	r2, .L1242+48
+	ldr	r2, .L1243+48
 	str	r1, [r2]
 	ldr	r1, [r4, #48]
-	ldr	r2, .L1242+52
+	ldr	r2, .L1243+52
 	str	r1, [r2]
-.L1241:
-	ldr	r1, .L1242+56
-	ldr	r2, .L1242+60
+.L1242:
+	ldr	r1, .L1243+56
+	ldr	r2, .L1243+60
 	ldr	r3, [r3]
 	ldr	r0, [r1]
 	ldrh	r2, [r2]
-	ldr	r1, .L1242+64
+	ldr	r1, .L1243+64
 	mla	r0, r0, r2, r3
 	ldrh	r1, [r1]
 	bl	__aeabi_uidiv
-	ldr	r3, .L1242+68
+	ldr	r3, .L1243+68
 	str	r0, [r3]
 	pop	{r3, r4, r5, pc}
-.L1243:
+.L1244:
 	.align	2
-.L1242:
+.L1243:
 	.word	.LANCHOR135
 	.word	1179929683
 	.word	.LANCHOR91
@@ -9140,30 +9152,30 @@ FtlMapBlkWriteDump_data:
 	mov	r4, r0
 	ldr	r3, [r0, #36]
 	cmp	r3, #0
-	beq	.L1245
+	beq	.L1246
 	movs	r3, #0
-	ldr	r5, .L1257
+	ldr	r5, .L1258
 	str	r3, [r0, #36]
-	ldr	r3, .L1257+4
+	ldr	r3, .L1258+4
 	ldrh	r6, [r0, #6]
 	mov	r7, r5
 	ldr	r10, [r0, #24]
 	ldr	r3, [r3]
 	str	r3, [r5, #8]
-	ldr	r3, .L1257+8
+	ldr	r3, .L1258+8
 	ldr	r8, [r3]
 	ldrh	r3, [r0, #2]
 	str	r8, [r5, #12]
-	cbz	r3, .L1247
-	ldr	r2, .L1257+12
+	cbz	r3, .L1248
+	ldr	r2, .L1258+12
 	ldrh	r2, [r2]
 	subs	r2, r2, #1
 	cmp	r3, r2
-	bge	.L1247
+	bge	.L1248
 	ldrh	r2, [r0]
 	movw	r1, #65535
 	cmp	r2, r1
-	beq	.L1247
+	beq	.L1248
 	ldr	r1, [r0, #12]
 	subs	r3, r3, #1
 	mov	r0, r5
@@ -9175,44 +9187,44 @@ FtlMapBlkWriteDump_data:
 	bl	FlashReadPages
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L1247
+	beq	.L1248
 	ldr	r3, [r4, #24]
 	ldrh	r1, [r8, #8]
 	ldr	r2, [r3, r1, lsl #2]
 	ldr	r3, [r5, #4]
 	cmp	r2, r3
-	bne	.L1247
+	bne	.L1248
 	ldr	r2, [r5, #8]
-.L1256:
+.L1257:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
 	b	FtlMapWritePage
-.L1247:
+.L1248:
 	subs	r6, r6, #1
 	uxth	r6, r6
 	ldr	r3, [r10, r6, lsl #2]
 	str	r3, [r7, #4]
-	cbz	r3, .L1248
+	cbz	r3, .L1249
 	movs	r2, #1
-	ldr	r0, .L1257
+	ldr	r0, .L1258
 	mov	r1, r2
 	bl	FlashReadPages
-.L1249:
+.L1250:
 	ldr	r2, [r7, #8]
 	mov	r1, r6
-	b	.L1256
-.L1248:
-	ldr	r3, .L1257+16
+	b	.L1257
+.L1249:
+	ldr	r3, .L1258+16
 	movs	r1, #255
 	ldr	r0, [r7, #8]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-	b	.L1249
-.L1245:
+	b	.L1250
+.L1246:
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L1258:
+.L1259:
 	.align	2
-.L1257:
+.L1258:
 	.word	.LANCHOR138
 	.word	.LANCHOR107
 	.word	.LANCHOR114
@@ -9232,10 +9244,10 @@ FtlVpcTblFlush:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, #0
-	ldr	r5, .L1274
-	ldr	r3, .L1274+4
-	ldr	fp, .L1274+76
-	ldr	r6, .L1274+8
+	ldr	r5, .L1275
+	ldr	r3, .L1275+4
+	ldr	fp, .L1275+76
+	ldr	r6, .L1275+8
 	ldr	r7, [r3]
 	ldr	r0, [fp]
 	ldrh	r3, [r5]
@@ -9243,23 +9255,23 @@ FtlVpcTblFlush:
 	str	r0, [r6, #8]
 	strh	r3, [r7, #2]	@ movhi
 	movw	r3, #61604
-	ldr	r4, .L1274+12
+	ldr	r4, .L1275+12
 	strh	r3, [r7]	@ movhi
-	ldr	r2, .L1274+16
+	ldr	r2, .L1275+16
 	ldr	r3, [r5, #8]
-	ldr	ip, .L1274+80
+	ldr	ip, .L1275+80
 	str	r10, [r7, #8]
 	str	r3, [r7, #4]
 	stm	r4, {r2, ip}
 	ldrh	r2, [r5, #6]
 	str	r10, [r7, #12]
-	ldr	r8, .L1274+84
+	ldr	r8, .L1275+84
 	strh	r2, [r4, #8]	@ movhi
-	ldr	r2, .L1274+20
-	ldr	r3, .L1274+24
+	ldr	r2, .L1275+20
+	ldr	r3, .L1275+24
 	ldrh	r2, [r2]
 	strb	r2, [r4, #10]
-	ldr	r2, .L1274+28
+	ldr	r2, .L1275+28
 	ldrh	r1, [r2]
 	ldrh	ip, [r2, #2]
 	strh	r1, [r4, #14]	@ movhi
@@ -9267,7 +9279,7 @@ FtlVpcTblFlush:
 	ldrb	r2, [r2, #8]	@ zero_extendqisi2
 	strb	r2, [r4, #11]
 	orr	r1, r1, ip, lsl #6
-	ldr	r2, .L1274+32
+	ldr	r2, .L1275+32
 	strh	r1, [r4, #16]	@ movhi
 	ldrh	r1, [r2]
 	ldrh	ip, [r2, #2]
@@ -9276,7 +9288,7 @@ FtlVpcTblFlush:
 	ldrb	r2, [r2, #8]	@ zero_extendqisi2
 	strb	r2, [r4, #12]
 	orr	r1, r1, ip, lsl #6
-	ldr	r2, .L1274+36
+	ldr	r2, .L1275+36
 	strh	r1, [r4, #20]	@ movhi
 	ldrh	r1, [r2]
 	ldrh	ip, [r2, #2]
@@ -9285,32 +9297,32 @@ FtlVpcTblFlush:
 	ldrb	r2, [r2, #8]	@ zero_extendqisi2
 	strb	r2, [r4, #13]
 	orr	r1, r1, ip, lsl #6
-	ldr	r2, .L1274+40
+	ldr	r2, .L1275+40
 	strh	r1, [r4, #24]	@ movhi
 	movs	r1, #255
 	ldr	r2, [r2]
 	str	r2, [r4, #32]
 	ldr	r2, [r8]
 	str	r2, [r4, #40]
-	ldr	r2, .L1274+44
+	ldr	r2, .L1275+44
 	ldr	r2, [r2]
 	str	r2, [r4, #36]
 	ldrh	r2, [r3]
 	bl	ftl_memset
 	mov	r1, r4
-	ldr	r4, .L1274+48
+	ldr	r4, .L1275+48
 	movs	r2, #48
 	ldr	r0, [r6, #8]
 	bl	ftl_memcpy
 	ldrh	r2, [r4]
 	ldr	r0, [r6, #8]
-	ldr	r1, .L1274+52
+	ldr	r1, .L1275+52
 	lsls	r2, r2, #1
 	adds	r0, r0, #48
 	ldr	r1, [r1]
 	bl	ftl_memcpy
 	ldrh	r0, [r4]
-	ldr	r1, .L1274+56
+	ldr	r1, .L1275+56
 	ldr	r4, [r6, #8]
 	lsrs	r2, r0, #3
 	adds	r0, r0, #24
@@ -9322,13 +9334,13 @@ FtlVpcTblFlush:
 	mov	r4, r10
 	bl	ftl_memcpy
 	mov	r0, r10
-	ldr	r10, .L1274+4
+	ldr	r10, .L1275+4
 	bl	FtlUpdateVaildLpn
 	movw	r3, #65535
 	str	r3, [sp]
-	ldr	r3, .L1274+24
+	ldr	r3, .L1275+24
 	str	r3, [sp, #4]
-.L1260:
+.L1261:
 	ldr	r3, [fp]
 	ldrh	r1, [r5, #2]
 	ldrh	r2, [r5]
@@ -9337,11 +9349,11 @@ FtlVpcTblFlush:
 	str	r3, [r6, #12]
 	orr	r3, r1, r2, lsl #10
 	str	r3, [r6, #4]
-	ldr	r3, .L1274+60
+	ldr	r3, .L1275+60
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r1, r3
-	blt	.L1261
+	blt	.L1262
 	ldrh	r3, [r5, #4]
 	strh	r2, [r5, #4]	@ movhi
 	str	r3, [sp]
@@ -9357,7 +9369,7 @@ FtlVpcTblFlush:
 	str	r2, [r6, #4]
 	str	r3, [r7, #4]
 	strh	r0, [r7, #2]	@ movhi
-.L1261:
+.L1262:
 	ldr	r3, [sp, #4]
 	ldr	r0, [fp]
 	ldrh	r1, [r3]
@@ -9366,7 +9378,7 @@ FtlVpcTblFlush:
 	str	r0, [r7, #12]
 	mov	r2, r3
 	mov	r1, r3
-	ldr	r0, .L1274+8
+	ldr	r0, .L1275+8
 	bl	FlashProgPages
 	ldrh	r3, [r5, #2]
 	ldr	r2, [r6]
@@ -9374,51 +9386,51 @@ FtlVpcTblFlush:
 	uxth	r3, r3
 	adds	r1, r2, #1
 	strh	r3, [r5, #2]	@ movhi
-	bne	.L1262
-	cmp	r3, #1
 	bne	.L1263
+	cmp	r3, #1
+	bne	.L1264
 	movw	r2, #1138
-	ldr	r1, .L1274+64
-	ldr	r0, .L1274+68
+	ldr	r1, .L1275+64
+	ldr	r0, .L1275+68
 	bl	printf
-.L1263:
+.L1264:
 	ldrh	r3, [r5, #2]
 	adds	r4, r4, #1
 	uxth	r4, r4
 	cmp	r3, #1
 	itttt	eq
-	ldreq	r3, .L1274+60
+	ldreq	r3, .L1275+60
 	ldrheq	r3, [r3]
 	addeq	r3, r3, #-1
 	strheq	r3, [r5, #2]	@ movhi
 	cmp	r4, #3
-	bls	.L1260
+	bls	.L1261
 	mov	r2, r4
 	ldr	r1, [r6, #4]
-	ldr	r0, .L1274+72
+	ldr	r0, .L1275+72
 	bl	printf
-.L1266:
-	b	.L1266
-.L1262:
+.L1267:
+	b	.L1267
+.L1263:
 	cmp	r3, #1
-	beq	.L1260
+	beq	.L1261
 	cmp	r2, #256
-	beq	.L1260
+	beq	.L1261
 	ldr	r2, [sp]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1267
+	beq	.L1268
 	movs	r1, #1
 	mov	r0, r2
 	bl	FtlFreeSysBlkQueueIn
-.L1267:
+.L1268:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1275:
+.L1276:
 	.align	2
-.L1274:
+.L1275:
 	.word	.LANCHOR139
 	.word	.LANCHOR114
 	.word	.LANCHOR138
@@ -9473,17 +9485,17 @@ sftl_deinit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L1279
+	ldr	r3, .L1280
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L1278
+	bne	.L1279
 	bl	FtlSysFlush
-.L1278:
+.L1279:
 	movs	r0, #0
 	pop	{r3, pc}
-.L1280:
+.L1281:
 	.align	2
-.L1279:
+.L1280:
 	.word	.LANCHOR166
 	.size	sftl_deinit, .-sftl_deinit
 	.section	.text.FtlDiscard,"ax",%progbits
@@ -9497,24 +9509,24 @@ sftl_deinit:
 FtlDiscard:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1296
+	ldr	r3, .L1297
 	adds	r2, r0, r1
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r7, r0
 	mov	r5, r1
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1289
+	bhi	.L1290
 	cmp	r1, #31
-	bhi	.L1283
-.L1288:
+	bhi	.L1284
+.L1289:
 	movs	r0, #0
-.L1281:
+.L1282:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1283:
-	ldr	r8, .L1296+12
+.L1284:
+	ldr	r8, .L1297+12
 	ldrh	r4, [r8]
 	mov	r1, r4
 	bl	__aeabi_uidiv
@@ -9522,7 +9534,7 @@ FtlDiscard:
 	mov	r6, r0
 	subs	r7, r7, r3
 	uxth	r7, r7
-	cbz	r7, .L1284
+	cbz	r7, .L1285
 	subs	r4, r4, r7
 	adds	r6, r6, #1
 	cmp	r4, r5
@@ -9530,32 +9542,32 @@ FtlDiscard:
 	movcs	r4, r5
 	uxth	r4, r4
 	subs	r5, r5, r4
-.L1284:
-	ldr	r4, .L1296+4
+.L1285:
+	ldr	r4, .L1297+4
 	mov	r3, #-1
-	ldr	r7, .L1296+8
+	ldr	r7, .L1297+8
 	str	r3, [sp, #4]
-.L1285:
+.L1286:
 	ldrh	r3, [r8]
 	cmp	r5, r3
-	bcs	.L1287
-	ldr	r3, .L1296+4
+	bcs	.L1288
+	ldr	r3, .L1297+4
 	ldr	r2, [r3]
 	cmp	r2, #32
-	bls	.L1288
+	bls	.L1289
 	movs	r4, #0
 	str	r4, [r3]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L1288
-.L1287:
+	b	.L1289
+.L1288:
 	movs	r2, #0
 	mov	r1, sp
 	mov	r0, r6
 	bl	log2phys
 	ldr	r3, [sp]
 	adds	r3, r3, #1
-	beq	.L1286
+	beq	.L1287
 	ldr	r3, [r4]
 	movs	r2, #1
 	add	r1, sp, #4
@@ -9570,17 +9582,17 @@ FtlDiscard:
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L1286:
+.L1287:
 	ldrh	r3, [r8]
 	adds	r6, r6, #1
 	subs	r5, r5, r3
-	b	.L1285
-.L1289:
+	b	.L1286
+.L1290:
 	mov	r0, #-1
-	b	.L1281
-.L1297:
+	b	.L1282
+.L1298:
 	.align	2
-.L1296:
+.L1297:
 	.word	.LANCHOR34
 	.word	.LANCHOR167
 	.word	.LANCHOR86
@@ -9597,47 +9609,47 @@ FtlDiscard:
 allocate_new_data_superblock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1308
+	ldr	r3, .L1309
 	push	{r4, r5, r6, lr}
 	mov	r6, r0
 	ldrh	r4, [r0]
 	ldrh	r3, [r3]
 	cmp	r3, r4
-	bcs	.L1299
+	bcs	.L1300
 	movw	r2, #2755
-	ldr	r1, .L1308+4
-	ldr	r0, .L1308+8
+	ldr	r1, .L1309+4
+	ldr	r0, .L1309+8
 	bl	printf
-.L1299:
+.L1300:
 	movw	r3, #65535
 	cmp	r4, r3
-	beq	.L1300
-	ldr	r3, .L1308+12
+	beq	.L1301
+	ldr	r3, .L1309+12
 	mov	r0, r4
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
-	cbz	r3, .L1301
+	cbz	r3, .L1302
 	bl	INSERT_DATA_LIST
-.L1300:
-	ldr	r5, .L1308+16
+.L1301:
+	ldr	r5, .L1309+16
 	movw	r2, #65535
 	movs	r3, #1
 	strb	r3, [r6, #8]
 	ldrh	r0, [r5]
 	cmp	r0, r2
-	beq	.L1302
+	beq	.L1303
 	cmp	r4, r0
-	bne	.L1303
-	ldr	r3, .L1308+12
+	bne	.L1304
+	ldr	r3, .L1309+12
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L1304
-.L1303:
-	bl	update_vpc_list
+	cbz	r3, .L1305
 .L1304:
+	bl	update_vpc_list
+.L1305:
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.L1302:
+.L1303:
 	mov	r0, r6
 	bl	allocate_data_superblock
 	bl	l2p_flush
@@ -9646,12 +9658,12 @@ allocate_new_data_superblock:
 	bl	FtlVpcTblFlush
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L1301:
+.L1302:
 	bl	INSERT_FREE_LIST
-	b	.L1300
-.L1309:
+	b	.L1301
+.L1310:
 	.align	2
-.L1308:
+.L1309:
 	.word	.LANCHOR5
 	.word	.LANCHOR168
 	.word	.LC1
@@ -9671,31 +9683,31 @@ FtlProgPages:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r6, #0
-	ldr	r10, .L1329+20
+	ldr	r10, .L1330+20
 	mov	r5, r3
 	movs	r2, #0
 	mov	r4, r0
-	ldr	fp, .L1329
+	ldr	fp, .L1330
 	mov	r8, r1
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
 	bl	FlashProgPages
-.L1311:
+.L1312:
 	cmp	r6, r8
-	bne	.L1318
-	ldr	r3, .L1329
+	bne	.L1319
+	ldr	r3, .L1330
 	ldrb	r2, [r5, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1310
-	movw	r2, #997
-	ldr	r1, .L1329+4
-	ldr	r0, .L1329+8
+	bcc	.L1311
+	mov	r2, #1000
+	ldr	r1, .L1330+4
+	ldr	r0, .L1330+8
 	bl	printf
-.L1310:
+.L1311:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1313:
+.L1314:
 	ldr	r1, [r4, #4]
 	mov	r0, r10
 	bl	printf
@@ -9704,10 +9716,10 @@ FtlProgPages:
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
 	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1312
+	cbnz	r3, .L1313
 	mov	r0, r5
 	bl	allocate_new_data_superblock
-.L1312:
+.L1313:
 	mov	r0, r5
 	bl	get_new_active_ppa
 	movs	r2, #0
@@ -9717,21 +9729,21 @@ FtlProgPages:
 	ldrb	r3, [r5, #9]	@ zero_extendqisi2
 	mov	r0, r4
 	bl	FlashProgPages
-.L1318:
+.L1319:
 	ldr	r2, [r4]
 	adds	r3, r2, #1
-	beq	.L1313
+	beq	.L1314
 	cmp	r2, #256
-	beq	.L1313
+	beq	.L1314
 	ldrb	r2, [r5, #6]	@ zero_extendqisi2
 	ldrh	r3, [fp]
 	cmp	r2, r3
-	bcc	.L1314
-	movw	r2, #982
-	ldr	r1, .L1329+4
-	ldr	r0, .L1329+8
+	bcc	.L1315
+	movw	r2, #985
+	ldr	r1, .L1330+4
+	ldr	r0, .L1330+8
 	bl	printf
-.L1314:
+.L1315:
 	ldr	r3, [r4, #4]
 	add	r1, sp, #16
 	movs	r2, #1
@@ -9746,24 +9758,24 @@ FtlProgPages:
 	ldr	r3, [sp, #4]
 	mov	r7, r0
 	adds	r3, r3, #1
-	beq	.L1315
-	ldr	r3, .L1329+12
+	beq	.L1316
+	ldr	r3, .L1330+12
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L1316
+	cbnz	r2, .L1317
 	mov	r1, r0
-	ldr	r0, .L1329+16
+	ldr	r0, .L1330+16
 	bl	printf
-.L1316:
+.L1317:
 	mov	r0, r7
 	bl	decrement_vpc_count
-.L1315:
+.L1316:
 	adds	r6, r6, #1
 	adds	r4, r4, #20
-	b	.L1311
-.L1330:
+	b	.L1312
+.L1331:
 	.align	2
-.L1329:
+.L1330:
 	.word	.LANCHOR3
 	.word	.LANCHOR169
 	.word	.LC1
@@ -9784,66 +9796,66 @@ FtlGcFreeTempBlock:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movw	r3, #65535
-	ldr	r4, .L1346
+	ldr	r4, .L1347
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	beq	.L1332
-	ldr	r3, .L1346+4
+	beq	.L1333
+	ldr	r3, .L1347+4
 	mov	r0, r4
 	ldrh	r1, [r3]
 	bl	FtlGcScanTempBlk
 	str	r0, [sp, #12]
-.L1332:
-	ldr	r3, .L1346+8
+.L1333:
+	ldr	r3, .L1347+8
 	movs	r2, #0
 	str	r2, [r3]
 	movw	r3, #65535
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	beq	.L1334
-	ldr	r6, .L1346+4
+	beq	.L1335
+	ldr	r6, .L1347+4
 	ldrb	r0, [r4, #7]	@ zero_extendqisi2
-	ldr	r5, .L1346+12
+	ldr	r5, .L1347+12
 	ldrh	r2, [r6]
 	ldrh	r1, [r5]
 	muls	r2, r0, r2
 	cmp	r1, r2
-	beq	.L1335
+	beq	.L1336
 	movs	r2, #164
-	ldr	r1, .L1346+16
-	ldr	r0, .L1346+20
+	ldr	r1, .L1347+16
+	ldr	r0, .L1347+20
 	bl	printf
-.L1335:
+.L1336:
 	ldrh	r6, [r6]
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	ldr	r2, .L1346+24
+	ldr	r2, .L1347+24
 	ldrh	r0, [r4]
-	ldr	fp, .L1346+56
+	ldr	fp, .L1347+56
 	smulbb	r3, r3, r6
 	ldr	r1, [r2]
 	movs	r6, #0
 	mov	r10, r2
 	strh	r3, [r1, r0, lsl #1]	@ movhi
-	ldr	r1, .L1346+28
+	ldr	r1, .L1347+28
 	ldrh	r3, [r5]
 	ldr	r0, [r1]
 	add	r3, r3, r0
 	str	r3, [r1]
-.L1336:
+.L1337:
 	ldrh	r2, [r5]
 	uxth	r3, r6
 	cmp	r2, r3
-	bhi	.L1340
+	bhi	.L1341
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	ldrh	r0, [r4]
 	ldr	r3, [r10]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	beq	.L1341
+	beq	.L1342
 	bl	INSERT_DATA_LIST
-.L1342:
-	ldr	r2, .L1346+32
+.L1343:
+	ldr	r2, .L1347+32
 	movs	r3, #0
 	movw	r6, #65535
 	strh	r3, [r5]	@ movhi
@@ -9851,38 +9863,38 @@ FtlGcFreeTempBlock:
 	strh	r3, [r2]	@ movhi
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	ldr	r3, .L1346+36
+	ldr	r3, .L1347+36
 	strh	r6, [r3]	@ movhi
-	ldr	r3, .L1346+40
+	ldr	r3, .L1347+40
 	ldrh	r2, [r3]
-	ldr	r3, .L1346+44
+	ldr	r3, .L1347+44
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, asr #2
 	ittt	gt
-	ldrgt	r3, .L1346+48
+	ldrgt	r3, .L1347+48
 	movgt	r2, #20
 	strhgt	r2, [r3]	@ movhi
-.L1334:
+.L1335:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1340:
+.L1341:
 	uxth	r3, r6
 	mov	r8, #12
 	ldr	r2, [fp]
 	mul	r8, r8, r3
-	ldr	r3, .L1346+52
+	ldr	r3, .L1347+52
 	ldr	r3, [r3]
 	add	r7, r3, r8
 	ldr	r0, [r7, #8]
 	cmp	r0, r2
-	bcc	.L1337
-.L1344:
+	bcc	.L1338
+.L1345:
 	ldrh	r0, [r4]
-	b	.L1345
-.L1337:
+	b	.L1346
+.L1338:
 	movs	r2, #0
 	add	r1, sp, #12
 	str	r3, [sp, #4]
@@ -9891,7 +9903,7 @@ FtlGcFreeTempBlock:
 	ldr	r2, [sp, #12]
 	ldr	r0, [r3, r8]
 	cmp	r0, r2
-	bne	.L1339
+	bne	.L1340
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	movs	r2, #1
@@ -9900,22 +9912,22 @@ FtlGcFreeTempBlock:
 	ldr	r0, [r7, #8]
 	bl	log2phys
 	mov	r0, r8
-.L1345:
+.L1346:
 	bl	decrement_vpc_count
-	b	.L1338
-.L1339:
+	b	.L1339
+.L1340:
 	ldr	r3, [r7, #4]
 	cmp	r2, r3
-	bne	.L1344
-.L1338:
+	bne	.L1345
+.L1339:
 	adds	r6, r6, #1
-	b	.L1336
-.L1341:
+	b	.L1337
+.L1342:
 	bl	INSERT_FREE_LIST
-	b	.L1342
-.L1347:
+	b	.L1343
+.L1348:
 	.align	2
-.L1346:
+.L1347:
 	.word	.LANCHOR53
 	.word	.LANCHOR19
 	.word	.LANCHOR133
@@ -9944,27 +9956,27 @@ FtlGcPageRecovery:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	ldr	r4, .L1350
-	ldr	r5, .L1350+4
+	ldr	r4, .L1351
+	ldr	r5, .L1351+4
 	ldrh	r1, [r4]
 	mov	r0, r5
 	bl	FtlGcScanTempBlk
 	ldrh	r2, [r5, #2]
 	ldrh	r3, [r4]
 	cmp	r2, r3
-	bcc	.L1348
-	ldr	r0, .L1350+8
+	bcc	.L1349
+	ldr	r0, .L1351+8
 	bl	FtlMapBlkWriteDump_data
 	movs	r0, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r3, .L1350+12
+	ldr	r3, .L1351+12
 	movs	r2, #0
 	str	r2, [r3]
-.L1348:
+.L1349:
 	pop	{r3, r4, r5, pc}
-.L1351:
+.L1352:
 	.align	2
-.L1350:
+.L1351:
 	.word	.LANCHOR19
 	.word	.LANCHOR53
 	.word	.LANCHOR129
@@ -9983,13 +9995,13 @@ FtlPowerLostRecovery:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #0
-	ldr	r5, .L1353
-	ldr	r3, .L1353+4
+	ldr	r5, .L1354
+	ldr	r3, .L1354+4
 	mov	r0, r5
 	str	r4, [r3]
 	bl	FtlRecoverySuperblock
 	mov	r0, r5
-	ldr	r5, .L1353+8
+	ldr	r5, .L1354+8
 	bl	FtlSlcSuperblockCheck
 	mov	r0, r5
 	bl	FtlRecoverySuperblock
@@ -10000,9 +10012,9 @@ FtlPowerLostRecovery:
 	bl	decrement_vpc_count
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L1354:
+.L1355:
 	.align	2
-.L1353:
+.L1354:
 	.word	.LANCHOR51
 	.word	.LANCHOR157
 	.word	.LANCHOR52
@@ -10020,32 +10032,32 @@ Ftl_gc_temp_data_write_back:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r3, #0
-	ldr	r4, .L1363
+	ldr	r4, .L1364
 	movs	r6, #0
 	movs	r7, #20
 	mov	r2, r3
-	ldr	r5, .L1363+4
+	ldr	r5, .L1364+4
 	ldr	r1, [r4]
 	ldr	r0, [r5]
 	bl	FlashProgPages
-.L1356:
+.L1357:
 	ldr	r1, [r4]
 	uxth	r3, r6
 	cmp	r1, r3
-	bhi	.L1359
+	bhi	.L1360
 	ldr	r0, [r5]
 	bl	FtlGcBufFree
-	ldr	r3, .L1363+8
+	ldr	r3, .L1364+8
 	movs	r0, #0
 	str	r0, [r4]
 	ldrh	r3, [r3, #4]
-	cbnz	r3, .L1355
+	cbnz	r3, .L1356
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
 	movs	r0, #1
-.L1355:
+.L1356:
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1359:
+.L1360:
 	muls	r3, r7, r3
 	ldr	r2, [r5]
 	adds	r6, r6, #1
@@ -10058,10 +10070,10 @@ Ftl_gc_temp_data_write_back:
 	ldrne	r2, [r0, #8]
 	ldr	r0, [r0, #12]
 	bl	FtlGcUpdatePage
-	b	.L1356
-.L1364:
+	b	.L1357
+.L1365:
 	.align	2
-.L1363:
+.L1364:
 	.word	.LANCHOR62
 	.word	.LANCHOR104
 	.word	.LANCHOR53
@@ -10079,34 +10091,34 @@ Ftl_get_new_temp_ppa:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movw	r3, #65535
-	ldr	r4, .L1368
+	ldr	r4, .L1369
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	beq	.L1366
+	beq	.L1367
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1367
-.L1366:
+	cbnz	r3, .L1368
+.L1367:
 	movs	r0, #0
 	movs	r5, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r0, .L1368
+	ldr	r0, .L1369
 	strb	r5, [r4, #8]
 	bl	allocate_data_superblock
-	ldr	r3, .L1368+4
+	ldr	r3, .L1369+4
 	strh	r5, [r3]	@ movhi
-	ldr	r3, .L1368+8
+	ldr	r3, .L1369+8
 	strh	r5, [r3]	@ movhi
 	bl	l2p_flush
 	mov	r0, r5
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1367:
-	ldr	r0, .L1368
+.L1368:
+	ldr	r0, .L1369
 	pop	{r3, r4, r5, lr}
 	b	get_new_active_ppa
-.L1369:
+.L1370:
 	.align	2
-.L1368:
+.L1369:
 	.word	.LANCHOR53
 	.word	.LANCHOR69
 	.word	.LANCHOR70
@@ -10122,188 +10134,188 @@ Ftl_get_new_temp_ppa:
 rk_ftl_garbage_collect:
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1460
+	ldr	r3, .L1461
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #48
 	str	r0, [sp, #28]
 	ldr	r0, [r3]
 	cmp	r0, #0
-	bne	.L1427
-	ldr	r3, .L1460+4
+	bne	.L1428
+	ldr	r3, .L1461+4
 	ldrh	r3, [r3]
 	cmp	r3, #47
-	bls	.L1370
-	ldr	r3, .L1460+8
+	bls	.L1371
+	ldr	r3, .L1461+8
 	movw	r4, #65535
 	ldrh	r0, [r3]
 	cmp	r0, r4
-	beq	.L1372
-	ldr	r1, .L1460+12
+	beq	.L1373
+	ldr	r1, .L1461+12
 	ldrh	r2, [r1]
 	cmp	r2, r4
 	itt	eq
 	strheq	r0, [r1]	@ movhi
 	strheq	r2, [r3]	@ movhi
-.L1372:
+.L1373:
 	ldr	r3, [sp, #28]
 	cmp	r3, #0
-	bne	.L1429
-	ldr	r3, .L1460+16
+	bne	.L1430
+	ldr	r3, .L1461+16
 	ldrh	r3, [r3]
 	cmp	r3, #24
-	bhi	.L1430
-	ldr	r2, .L1460+20
+	bhi	.L1431
+	ldr	r2, .L1461+20
 	cmp	r3, #16
 	ldrh	r4, [r2]
-	bls	.L1375
+	bls	.L1376
 	lsrs	r4, r4, #5
-.L1374:
-	ldr	r2, .L1460+24
+.L1375:
+	ldr	r2, .L1461+24
 	ldrh	r1, [r2]
 	cmp	r1, r3
 	mov	r1, r2
-	bcs	.L1378
-	ldr	r3, .L1460+28
+	bcs	.L1379
+	ldr	r3, .L1461+28
 	movw	r0, #65535
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L1379
-	ldr	r0, .L1460+12
+	bne	.L1380
+	ldr	r0, .L1461+12
 	ldrh	r0, [r0]
 	cmp	r0, r3
-	bne	.L1379
-	ldr	r3, .L1460+32
+	bne	.L1380
+	ldr	r3, .L1461+32
 	ldrh	r0, [r3]
-	cbnz	r0, .L1380
-	ldr	r3, .L1460+36
-	ldr	r4, .L1460+40
+	cbnz	r0, .L1381
+	ldr	r3, .L1461+36
+	ldr	r4, .L1461+40
 	ldr	r3, [r3]
 	ldr	r4, [r4]
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, lsr #2
-	bcs	.L1381
-.L1380:
-	ldr	r3, .L1460+44
+	bcs	.L1382
+.L1381:
+	ldr	r3, .L1461+44
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r1]	@ movhi
-.L1382:
-	ldr	r3, .L1460+48
+.L1383:
+	ldr	r3, .L1461+48
 	movs	r2, #0
 	str	r2, [r3]
-.L1370:
+.L1371:
 	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1375:
+.L1376:
 	cmp	r3, #12
-	bls	.L1376
+	bls	.L1377
 	lsrs	r4, r4, #4
-	b	.L1374
-.L1376:
+	b	.L1375
+.L1377:
 	cmp	r3, #8
-	bls	.L1374
+	bls	.L1375
 	lsrs	r4, r4, #2
-	b	.L1374
-.L1430:
+	b	.L1375
+.L1431:
 	movs	r4, #1
-	b	.L1374
-.L1381:
+	b	.L1375
+.L1382:
 	movs	r3, #18
 	strh	r3, [r2]	@ movhi
-	b	.L1382
-.L1379:
-	ldr	r3, .L1460+44
+	b	.L1383
+.L1380:
+	ldr	r3, .L1461+44
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r1]	@ movhi
-.L1378:
-	ldr	r3, .L1460+52
+.L1379:
+	ldr	r3, .L1461+52
 	ldrh	r3, [r3]
-	cbz	r3, .L1373
+	cbz	r3, .L1374
 	adds	r4, r4, #32
 	uxth	r4, r4
-.L1373:
-	ldr	r5, .L1460+56
+.L1374:
+	ldr	r5, .L1461+56
 	movw	r3, #65535
 	ldrh	r2, [r5]
 	cmp	r2, r3
-	bne	.L1385
-	ldr	r3, .L1460+12
+	bne	.L1386
+	ldr	r3, .L1461+12
 	ldrh	r1, [r3]
 	cmp	r1, r2
-	beq	.L1386
-	ldr	r0, .L1460+60
+	beq	.L1387
+	ldr	r0, .L1461+60
 	ldr	r0, [r0]
 	ldrh	r1, [r0, r1, lsl #1]
-	cbnz	r1, .L1387
+	cbnz	r1, .L1388
 	strh	r2, [r3]	@ movhi
-.L1387:
+.L1388:
 	ldrh	r2, [r3]
 	strh	r2, [r5]	@ movhi
 	movw	r2, #65535
 	strh	r2, [r3]	@ movhi
-.L1386:
+.L1387:
 	ldrh	r0, [r5]
 	movw	r6, #65535
 	movs	r3, #0
 	strb	r3, [r5, #8]
 	cmp	r0, r6
-	beq	.L1385
+	beq	.L1386
 	bl	IsBlkInGcList
-	cbz	r0, .L1389
+	cbz	r0, .L1390
 	strh	r6, [r5]	@ movhi
-.L1389:
+.L1390:
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1385
-	ldr	r0, .L1460+56
+	beq	.L1386
+	ldr	r0, .L1461+56
 	bl	make_superblock
-	ldr	r2, .L1460+64
+	ldr	r2, .L1461+64
 	movs	r3, #0
 	strh	r3, [r5, #2]	@ movhi
 	strb	r3, [r5, #6]
 	strh	r3, [r2]	@ movhi
-	ldr	r3, .L1460+60
+	ldr	r3, .L1461+60
 	ldrh	r2, [r5]
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r2, lsl #1]
-	ldr	r3, .L1460+68
+	ldr	r3, .L1461+68
 	strh	r2, [r3]	@ movhi
-.L1385:
-	ldr	r2, .L1460+72
+.L1386:
+	ldr	r2, .L1461+72
 	ldrh	r3, [r5]
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L1390
-	ldr	r2, .L1460+76
+	beq	.L1391
+	ldr	r2, .L1461+76
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L1390
-	ldr	r2, .L1460+28
+	beq	.L1391
+	ldr	r2, .L1461+28
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bne	.L1391
-.L1390:
+	bne	.L1392
+.L1391:
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.L1391:
-	ldr	r5, .L1460+56
+.L1392:
+	ldr	r5, .L1461+56
 	mov	r6, r5
-.L1426:
+.L1427:
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1392
-	ldr	fp, .L1460+88
+	bne	.L1393
+	ldr	fp, .L1461+88
 	movs	r2, #0
-	ldr	r3, .L1460+48
+	ldr	r3, .L1461+48
 	mov	r8, fp
 	str	r2, [r3]
-.L1393:
+.L1394:
 	ldrh	r7, [fp]
 	mov	r0, r7
 	bl	List_get_gc_head_node
@@ -10311,15 +10323,15 @@ rk_ftl_garbage_collect:
 	movw	r1, #65535
 	cmp	r3, r1
 	strh	r3, [r6]	@ movhi
-	bne	.L1394
+	bne	.L1395
 	movs	r3, #0
 	movs	r0, #8
 	strh	r3, [fp]	@ movhi
-	b	.L1370
-.L1429:
+	b	.L1371
+.L1430:
 	movs	r4, #1
-	b	.L1373
-.L1394:
+	b	.L1374
+.L1395:
 	str	r0, [sp, #16]
 	mov	r0, r3
 	str	r3, [sp, #12]
@@ -10327,60 +10339,60 @@ rk_ftl_garbage_collect:
 	bl	IsBlkInGcList
 	ldr	r3, [sp, #12]
 	ldr	r2, [sp, #16]
-	cbz	r0, .L1395
+	cbz	r0, .L1396
 	strh	r7, [fp]	@ movhi
-	b	.L1393
-.L1395:
+	b	.L1394
+.L1396:
 	uxth	r0, r2
-	ldr	r2, .L1460+20
-	ldr	r10, .L1460+60
+	ldr	r2, .L1461+20
+	ldr	r10, .L1461+60
 	uxth	r7, r7
 	ldrh	lr, [r2]
-	ldr	r2, .L1460+80
+	ldr	r2, .L1461+80
 	ldr	r1, [r10]
 	strh	r7, [fp]	@ movhi
 	ldrh	r2, [r2]
 	ldrh	ip, [r1, r0, lsl #1]
 	mul	r2, r2, lr
 	cmp	ip, r2, asr #1
-	bgt	.L1397
+	bgt	.L1398
 	cmp	r7, #48
-	bls	.L1398
+	bls	.L1399
 	cmp	ip, #8
-	bls	.L1398
-	ldr	r7, .L1460+84
+	bls	.L1399
+	ldr	r7, .L1461+84
 	ldrh	r7, [r7]
 	cmp	r7, #35
-	bhi	.L1398
-.L1397:
+	bhi	.L1399
+.L1398:
 	movs	r7, #0
 	strh	r7, [r8]	@ movhi
-.L1398:
+.L1399:
 	ldrh	r1, [r1, r0, lsl #1]
 	cmp	r2, r1
-	bgt	.L1399
+	bgt	.L1400
 	ldrh	r2, [r8]
 	cmp	r2, #3
-	bhi	.L1399
+	bhi	.L1400
 	movw	r3, #65535
 	strh	r3, [r6]	@ movhi
 	movs	r3, #0
 	strh	r3, [r8]	@ movhi
-.L1459:
-	ldr	r3, .L1460+32
+.L1460:
+	ldr	r3, .L1461+32
 	ldrh	r0, [r3]
-	b	.L1370
-.L1399:
-	cbnz	r1, .L1400
+	b	.L1371
+.L1400:
+	cbnz	r1, .L1401
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	ldrh	r3, [r8]
 	adds	r3, r3, #1
 	strh	r3, [r8]	@ movhi
-	b	.L1393
-.L1461:
+	b	.L1394
+.L1462:
 	.align	2
-.L1460:
+.L1461:
 	.word	.LANCHOR94
 	.word	.LANCHOR44
 	.word	.LANCHOR73
@@ -10404,65 +10416,65 @@ rk_ftl_garbage_collect:
 	.word	.LANCHOR3
 	.word	.LANCHOR69
 	.word	.LANCHOR102
-.L1400:
+.L1401:
 	movs	r2, #0
 	strb	r2, [r6, #8]
-	ldr	r2, .L1462
+	ldr	r2, .L1463
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bne	.L1401
+	bne	.L1402
 	movw	r2, #717
-	ldr	r1, .L1462+4
-	ldr	r0, .L1462+8
+	ldr	r1, .L1463+4
+	ldr	r0, .L1463+8
 	bl	printf
-.L1401:
-	ldr	r3, .L1462+12
+.L1402:
+	ldr	r3, .L1463+12
 	ldrh	r2, [r6]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1402
+	bne	.L1403
 	movw	r2, #718
-	ldr	r1, .L1462+4
-	ldr	r0, .L1462+8
+	ldr	r1, .L1463+4
+	ldr	r0, .L1463+8
 	bl	printf
-.L1402:
-	ldr	r3, .L1462+16
+.L1403:
+	ldr	r3, .L1463+16
 	ldrh	r2, [r6]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1403
+	bne	.L1404
 	movw	r2, #719
-	ldr	r1, .L1462+4
-	ldr	r0, .L1462+8
+	ldr	r1, .L1463+4
+	ldr	r0, .L1463+8
 	bl	printf
-.L1403:
+.L1404:
 	mov	r0, r5
 	bl	make_superblock
-	ldr	r2, .L1462+20
+	ldr	r2, .L1463+20
 	movs	r3, #0
 	ldrh	r1, [r6]
 	strh	r3, [r2]	@ movhi
 	ldr	r2, [r10]
 	ldrh	r1, [r2, r1, lsl #1]
-	ldr	r2, .L1462+24
+	ldr	r2, .L1463+24
 	strh	r3, [r6, #2]	@ movhi
 	strb	r3, [r6, #6]
 	strh	r1, [r2]	@ movhi
-.L1392:
-	ldr	r3, .L1462+28
+.L1393:
+	ldr	r3, .L1463+28
 	movs	r2, #1
 	str	r2, [r3]
-	ldr	r3, .L1462+32
+	ldr	r3, .L1463+32
 	ldrh	r3, [r3]
 	str	r3, [sp, #16]
 	ldr	r3, [sp, #28]
-	cbz	r3, .L1404
-	ldr	r3, .L1462+36
+	cbz	r3, .L1405
+	ldr	r3, .L1463+36
 	ldr	r2, [sp, #16]
 	ldrh	r1, [r6]
 	ldrh	r3, [r3]
 	muls	r3, r2, r3
-	ldr	r2, .L1462+40
+	ldr	r2, .L1463+40
 	ldr	r2, [r2]
 	ldrh	r2, [r2, r1, lsl #1]
 	subs	r3, r3, r2
@@ -10470,10 +10482,10 @@ rk_ftl_garbage_collect:
 	addmi	r3, r3, #3
 	add	r4, r4, r3, asr #2
 	uxth	r4, r4
-.L1404:
+.L1405:
 	ldrh	r3, [r6, #2]
 	ldr	r1, [sp, #16]
-	ldr	fp, .L1462+64
+	ldr	fp, .L1463+64
 	adds	r2, r3, r4
 	cmp	r2, r1
 	itt	gt
@@ -10483,27 +10495,27 @@ rk_ftl_garbage_collect:
 	it	gt
 	uxthgt	r4, r4
 	str	r3, [sp, #24]
-.L1407:
+.L1408:
 	ldrh	r3, [sp, #24]
 	cmp	r4, r3
-	bls	.L1415
-	ldr	r3, .L1462+36
+	bls	.L1416
+	ldr	r3, .L1463+36
 	movw	r10, #65535
 	ldrh	r1, [r5, #2]
 	mov	ip, #20
 	ldr	r0, [fp]
 	ldrh	lr, [r3]
 	ldr	r3, [sp, #24]
-	ldr	r7, .L1462+44
+	ldr	r7, .L1463+44
 	adds	r3, r1, r3
 	str	r3, [sp, #20]
 	movs	r3, #0
 	str	r3, [sp, #12]
-	b	.L1416
-.L1409:
+	b	.L1417
+.L1410:
 	ldrh	r2, [r7, #2]!
 	cmp	r2, r10
-	beq	.L1408
+	beq	.L1409
 	ldr	r1, [sp, #12]
 	mla	r8, ip, r1, r0
 	ldr	r1, [sp, #20]
@@ -10513,27 +10525,27 @@ rk_ftl_garbage_collect:
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r2, [sp, #12]
-.L1408:
+.L1409:
 	adds	r3, r3, #1
-.L1416:
+.L1417:
 	uxth	r2, r3
 	cmp	lr, r2
-	bhi	.L1409
+	bhi	.L1410
 	ldrb	r2, [r5, #8]	@ zero_extendqisi2
 	ldr	r1, [sp, #12]
 	bl	FlashReadPages
 	movs	r3, #0
-.L1458:
+.L1459:
 	str	r3, [sp, #20]
 	ldr	r2, [sp, #12]
 	ldrh	r3, [sp, #20]
 	cmp	r2, r3
-	bhi	.L1414
+	bhi	.L1415
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
 	str	r3, [sp, #24]
-	b	.L1407
-.L1414:
+	b	.L1408
+.L1415:
 	ldr	r3, [sp, #20]
 	movs	r7, #20
 	muls	r7, r3, r7
@@ -10541,20 +10553,20 @@ rk_ftl_garbage_collect:
 	adds	r2, r3, r7
 	ldr	r3, [r3, r7]
 	adds	r3, r3, #1
-	beq	.L1411
+	beq	.L1412
 	ldr	r8, [r2, #12]
 	movw	r3, #61589
 	ldrh	r2, [r8]
 	cmp	r2, r3
-	bne	.L1411
+	bne	.L1412
 	ldr	r10, [r8, #8]
 	cmp	r10, #-1
-	bne	.L1412
+	bne	.L1413
 	movw	r2, #753
-	ldr	r1, .L1462+4
-	ldr	r0, .L1462+8
+	ldr	r1, .L1463+4
+	ldr	r0, .L1463+8
 	bl	printf
-.L1412:
+.L1413:
 	movs	r2, #0
 	add	r1, sp, #40
 	mov	r0, r10
@@ -10564,10 +10576,10 @@ rk_ftl_garbage_collect:
 	add	r0, r0, r7
 	ldr	r2, [r0, #4]
 	cmp	r2, r3
-	bne	.L1411
-	ldr	r2, .L1462+20
-	ldr	r10, .L1462+60
-	ldr	r1, .L1462+48
+	bne	.L1412
+	ldr	r2, .L1463+20
+	ldr	r10, .L1463+60
+	ldr	r1, .L1463+48
 	ldrh	r3, [r2]
 	str	r1, [sp, #36]
 	adds	r3, r3, #1
@@ -10589,7 +10601,7 @@ rk_ftl_garbage_collect:
 	ldr	r0, [fp]
 	mla	r2, r1, r3, r2
 	add	r0, r0, r7
-	ldr	r7, .L1462+16
+	ldr	r7, .L1463+16
 	ldr	r1, [r0, #8]
 	adds	r3, r3, #1
 	str	r1, [r2, #8]
@@ -10600,7 +10612,7 @@ rk_ftl_garbage_collect:
 	str	r2, [r8, #12]
 	ldrh	r2, [r7]
 	strh	r2, [r8, #2]	@ movhi
-	ldr	r2, .L1462+52
+	ldr	r2, .L1463+52
 	str	r3, [r10]
 	ldr	r2, [r2]
 	str	r2, [r8, #4]
@@ -10608,44 +10620,44 @@ rk_ftl_garbage_collect:
 	ldrb	r2, [r7, #7]	@ zero_extendqisi2
 	ldr	r3, [r10]
 	cmp	r2, r3
-	beq	.L1413
+	beq	.L1414
 	ldrh	r3, [r7, #4]
-	cbnz	r3, .L1411
-.L1413:
+	cbnz	r3, .L1412
+.L1414:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	r0, .L1411
-	ldr	r3, .L1462+28
+	cbz	r0, .L1412
+	ldr	r3, .L1463+28
 	movs	r2, #0
 	movw	r1, #65535
 	str	r2, [r3]
-	ldr	r3, .L1462+56
+	ldr	r3, .L1463+56
 	strh	r1, [r3]	@ movhi
 	strh	r2, [r3, #2]	@ movhi
-	b	.L1459
-.L1411:
+	b	.L1460
+.L1412:
 	ldr	r3, [sp, #20]
 	adds	r3, r3, #1
-	b	.L1458
-.L1415:
+	b	.L1459
+.L1416:
 	ldrh	r3, [r5, #2]
 	add	r4, r4, r3
 	ldr	r3, [sp, #16]
 	uxth	r4, r4
 	cmp	r3, r4
 	strh	r4, [r5, #2]	@ movhi
-	bhi	.L1417
-	ldr	r3, .L1462+60
+	bhi	.L1418
+	ldr	r3, .L1463+60
 	ldr	r3, [r3]
-	cbz	r3, .L1418
+	cbz	r3, .L1419
 	bl	Ftl_gc_temp_data_write_back
-	cbz	r0, .L1418
-	ldr	r3, .L1462+28
+	cbz	r0, .L1419
+	ldr	r3, .L1463+28
 	movs	r2, #0
 	str	r2, [r3]
-	b	.L1459
-.L1463:
+	b	.L1460
+.L1464:
 	.align	2
-.L1462:
+.L1463:
 	.word	.LANCHOR51
 	.word	.LANCHOR175
 	.word	.LC1
@@ -10663,50 +10675,50 @@ rk_ftl_garbage_collect:
 	.word	.LANCHOR145
 	.word	.LANCHOR62
 	.word	.LANCHOR66
-.L1418:
-	ldr	r3, .L1464
+.L1419:
+	ldr	r3, .L1465
 	ldrh	r4, [r3]
 	cmp	r4, #0
-	bne	.L1419
-	ldr	r8, .L1464+28
+	bne	.L1420
+	ldr	r8, .L1465+28
 	ldrh	r1, [r5]
 	ldr	r3, [r8]
 	ldrh	r3, [r3, r1, lsl #1]
 	cmp	r3, #0
-	beq	.L1419
-	ldr	r0, .L1464+4
-	ldr	r10, .L1464+32
+	beq	.L1420
+	ldr	r0, .L1465+4
+	ldr	r10, .L1465+32
 	ldrh	r2, [r5, #2]
 	ldrh	r0, [r0]
 	str	r3, [sp]
 	mov	r3, r4
 	str	r0, [sp, #4]
-	ldr	r0, .L1464+8
+	ldr	r0, .L1465+8
 	bl	printf
-.L1420:
+.L1421:
 	ldr	r3, [r10]
 	cmp	r4, r3
-	bcs	.L1422
+	bcs	.L1423
 	movs	r2, #0
 	add	r1, sp, #44
 	mov	r0, r4
 	bl	log2phys
 	ldr	r7, [sp, #44]
 	adds	r3, r7, #1
-	beq	.L1421
+	beq	.L1422
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r5]
 	cmp	r3, r0
-	bne	.L1421
+	bne	.L1422
 	mov	r2, r7
 	mov	r1, r4
-	ldr	r0, .L1464+12
+	ldr	r0, .L1465+12
 	bl	printf
-.L1422:
+.L1423:
 	ldr	r3, [r10]
 	cmp	r4, r3
-	bcc	.L1419
+	bcc	.L1420
 	ldrh	r2, [r5]
 	movs	r1, #0
 	ldr	r3, [r8]
@@ -10715,32 +10727,32 @@ rk_ftl_garbage_collect:
 	bl	update_vpc_list
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1419:
+.L1420:
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.L1417:
-	ldr	r3, .L1464+16
+.L1418:
+	ldr	r3, .L1465+16
 	movs	r2, #0
 	str	r2, [r3]
-	ldr	r3, .L1464+20
+	ldr	r3, .L1465+20
 	ldrh	r0, [r3]
 	cmp	r0, #2
-	bhi	.L1425
-	ldr	r3, .L1464+24
+	bhi	.L1426
+	ldr	r3, .L1465+24
 	ldrh	r4, [r3]
-	b	.L1426
-.L1421:
+	b	.L1427
+.L1422:
 	adds	r4, r4, #1
-	b	.L1420
-.L1425:
+	b	.L1421
+.L1426:
 	adds	r0, r0, #1
-	b	.L1370
-.L1427:
+	b	.L1371
+.L1428:
 	movs	r0, #0
-	b	.L1370
-.L1465:
+	b	.L1371
+.L1466:
 	.align	2
-.L1464:
+.L1465:
 	.word	.LANCHOR173
 	.word	.LANCHOR174
 	.word	.LC42
@@ -10768,31 +10780,31 @@ FtlRead:
 	mov	r6, r1
 	mov	r8, r3
 	str	r2, [sp, #24]
-	bne	.L1467
+	bne	.L1468
 	mov	r2, r3
 	ldr	r1, [sp, #24]
 	add	r0, r6, #256
 	bl	FtlVendorPartRead
 	str	r0, [sp, #4]
-.L1466:
+.L1467:
 	ldr	r0, [sp, #4]
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1467:
+.L1468:
 	ldr	r3, [sp, #24]
 	adds	r3, r1, r3
 	str	r3, [sp, #12]
-	ldr	r3, .L1499
+	ldr	r3, .L1500
 	ldr	r2, [sp, #12]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1488
-	ldr	r3, .L1499+4
+	bhi	.L1489
+	ldr	r3, .L1500+4
 	ldr	r3, [r3]
 	adds	r4, r3, #1
-	beq	.L1489
-	ldr	r3, .L1499+8
+	beq	.L1490
+	ldr	r3, .L1500+8
 	mov	r0, r6
 	movs	r7, #0
 	mov	r5, r7
@@ -10805,7 +10817,7 @@ FtlRead:
 	subs	r0, r3, #1
 	bl	__aeabi_uidiv
 	ldr	r3, [sp, #16]
-	ldr	r2, .L1499+12
+	ldr	r2, .L1500+12
 	ldr	r1, [sp, #24]
 	rsb	r3, r3, #1
 	ldr	r4, [sp, #16]
@@ -10818,54 +10830,54 @@ FtlRead:
 	add	r3, r3, r1
 	ldr	r1, [sp, #8]
 	str	r3, [r2]
-	ldr	r2, .L1499+16
+	ldr	r2, .L1500+16
 	str	r7, [sp, #4]
 	ldr	r3, [r2]
 	add	r3, r3, r1
 	str	r3, [r2]
-.L1469:
+.L1470:
 	ldr	r3, [sp, #8]
-	cbnz	r3, .L1486
-	ldr	r3, .L1499+20
-	ldrh	r3, [r3]
 	cbnz	r3, .L1487
-	ldr	r3, .L1499+24
+	ldr	r3, .L1500+20
+	ldrh	r3, [r3]
+	cbnz	r3, .L1488
+	ldr	r3, .L1500+24
 	ldrh	r3, [r3]
 	cmp	r3, #31
-	bhi	.L1466
-.L1487:
+	bhi	.L1467
+.L1488:
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
-	b	.L1466
-.L1486:
+	b	.L1467
+.L1487:
 	movs	r2, #0
 	add	r1, sp, #52
 	mov	r0, r4
 	bl	log2phys
 	ldr	r3, [sp, #52]
 	adds	r0, r3, #1
-	bne	.L1470
-	ldr	fp, .L1499+8
+	bne	.L1471
+	ldr	fp, .L1500+8
 	mov	r10, #0
-.L1471:
+.L1472:
 	ldrh	r0, [fp]
 	cmp	r10, r0
-	bcc	.L1473
-.L1474:
+	bcc	.L1474
+.L1475:
 	ldr	r3, [sp, #8]
 	adds	r4, r4, #1
 	subs	r3, r3, #1
 	str	r3, [sp, #8]
-	beq	.L1478
-	ldr	r3, .L1499+28
+	beq	.L1479
+	ldr	r3, .L1500+28
 	ldrh	r3, [r3]
 	cmp	r5, r3, lsl #2
-	bne	.L1469
-.L1478:
+	bne	.L1470
+.L1479:
 	cmp	r5, #0
-	beq	.L1469
-	ldr	r3, .L1499+32
+	beq	.L1470
+	ldr	r3, .L1500+32
 	movs	r2, #0
 	mov	r1, r5
 	mov	r10, #0
@@ -10879,29 +10891,29 @@ FtlRead:
 	ldr	r3, [sp, #32]
 	lsls	r3, r3, #9
 	str	r3, [sp, #40]
-.L1485:
+.L1486:
 	movs	r3, #20
 	mul	fp, r3, r10
-	ldr	r3, .L1499+32
+	ldr	r3, .L1500+32
 	ldr	r2, [r3]
 	ldr	r3, [sp, #16]
 	add	r2, r2, fp
 	ldr	r1, [r2, #16]
 	cmp	r3, r1
-	bne	.L1480
+	bne	.L1481
 	ldr	r1, [r2, #8]
-	ldr	r2, .L1499+36
+	ldr	r2, .L1500+36
 	ldr	r2, [r2]
 	cmp	r1, r2
-	bne	.L1481
+	bne	.L1482
 	ldr	r3, [sp, #36]
 	mov	r0, r8
 	ldr	r2, [sp, #40]
 	add	r1, r1, r3
-.L1498:
+.L1499:
 	bl	ftl_memcpy
-.L1481:
-	ldr	r3, .L1499+32
+.L1482:
+	ldr	r3, .L1500+32
 	ldr	r3, [r3]
 	add	r2, r3, fp
 	ldr	r3, [r3, fp]
@@ -10910,49 +10922,49 @@ FtlRead:
 	ldr	r0, [r0, #8]
 	cmp	r1, r0
 	itttt	ne
-	ldrne	r0, .L1499+40
+	ldrne	r0, .L1500+40
 	ldrne	r1, [r0, #72]
 	addne	r1, r1, #1
 	strne	r1, [r0, #72]
 	adds	r1, r3, #1
-	bne	.L1483
-	ldr	r1, .L1499+40
+	bne	.L1484
+	ldr	r1, .L1500+40
 	str	r3, [sp, #4]
 	ldr	r2, [r1, #72]
 	adds	r2, r2, #1
 	str	r2, [r1, #72]
-.L1484:
+.L1485:
 	add	r10, r10, #1
 	cmp	r5, r10
-	bne	.L1485
+	bne	.L1486
 	movs	r5, #0
-	b	.L1469
-.L1473:
+	b	.L1470
+.L1474:
 	mla	r0, r0, r4, r10
 	cmp	r6, r0
-	bhi	.L1472
+	bhi	.L1473
 	ldr	r3, [sp, #12]
 	cmp	r3, r0
-	bls	.L1472
+	bls	.L1473
 	subs	r0, r0, r6
 	mov	r2, #512
 	movs	r1, #0
 	add	r0, r8, r0, lsl #9
 	bl	ftl_memset
-.L1472:
+.L1473:
 	add	r10, r10, #1
-	b	.L1471
-.L1470:
-	ldr	r2, .L1499+32
+	b	.L1472
+.L1471:
+	ldr	r2, .L1500+32
 	mov	r10, #20
 	ldr	r2, [r2]
 	mla	r10, r10, r5, r2
 	str	r3, [r10, #4]
 	ldr	r3, [sp, #16]
 	cmp	r4, r3
-	ldr	r3, .L1499+8
-	bne	.L1475
-	ldr	r2, .L1499+36
+	ldr	r3, .L1500+8
+	bne	.L1476
+	ldr	r2, .L1500+36
 	mov	r0, r6
 	ldrh	fp, [r3]
 	ldr	r2, [r2]
@@ -10967,11 +10979,11 @@ FtlRead:
 	movcs	r3, r2
 	cmp	fp, r3
 	str	r3, [sp, #32]
-	bne	.L1476
+	bne	.L1477
 	str	r8, [r10, #8]
-.L1476:
-	ldr	r3, .L1499+44
-	ldr	r2, .L1499+48
+.L1477:
+	ldr	r3, .L1500+44
+	ldr	r2, .L1500+48
 	str	r4, [r10, #16]
 	ldrh	r3, [r3]
 	ldr	r2, [r2]
@@ -10980,12 +10992,12 @@ FtlRead:
 	bic	r3, r3, #3
 	add	r3, r3, r2
 	str	r3, [r10, #12]
-	b	.L1474
-.L1475:
+	b	.L1475
+.L1476:
 	ldr	r2, [sp, #20]
 	cmp	r4, r2
-	bne	.L1477
-	ldr	r2, .L1499+52
+	bne	.L1478
+	ldr	r2, .L1500+52
 	ldr	r1, [sp, #12]
 	ldr	r2, [r2]
 	str	r2, [r10, #8]
@@ -10993,49 +11005,49 @@ FtlRead:
 	mul	r3, r2, r4
 	subs	r7, r1, r3
 	cmp	r2, r7
-	bne	.L1476
-.L1497:
+	bne	.L1477
+.L1498:
 	subs	r3, r3, r6
 	add	r3, r8, r3, lsl #9
 	str	r3, [r10, #8]
-	b	.L1476
-.L1477:
+	b	.L1477
+.L1478:
 	ldrh	r3, [r3]
 	muls	r3, r4, r3
-	b	.L1497
-.L1480:
+	b	.L1498
+.L1481:
 	ldr	r3, [sp, #20]
 	cmp	r3, r1
-	bne	.L1481
-	ldr	r3, .L1499+52
+	bne	.L1482
+	ldr	r3, .L1500+52
 	ldr	r1, [r2, #8]
 	ldr	r2, [r3]
 	cmp	r1, r2
-	bne	.L1481
-	ldr	r2, .L1499+8
+	bne	.L1482
+	ldr	r2, .L1500+8
 	ldr	r3, [sp, #20]
 	ldrh	r0, [r2]
 	ldr	r2, [sp, #44]
 	muls	r0, r3, r0
 	subs	r0, r0, r6
 	add	r0, r8, r0, lsl #9
-	b	.L1498
-.L1483:
+	b	.L1499
+.L1484:
 	cmp	r3, #256
-	bne	.L1484
+	bne	.L1485
 	ldr	r0, [r2, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-	b	.L1484
-.L1488:
-	mov	r3, #-1
+	b	.L1485
 .L1489:
+	mov	r3, #-1
+.L1490:
 	str	r3, [sp, #4]
-	b	.L1466
-.L1500:
+	b	.L1467
+.L1501:
 	.align	2
-.L1499:
+.L1500:
 	.word	.LANCHOR34
 	.word	.LANCHOR166
 	.word	.LANCHOR12
@@ -11086,32 +11098,32 @@ FtlWrite:
 	mov	fp, r1
 	str	r2, [sp, #20]
 	str	r3, [sp, #16]
-	bne	.L1503
+	bne	.L1504
 	mov	r2, r3
 	ldr	r1, [sp, #20]
 	add	r0, fp, #256
 	bl	FtlVendorPartWrite
-.L1502:
+.L1503:
 	add	sp, sp, #72
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1503:
+.L1504:
 	ldr	r3, [sp, #20]
 	adds	r4, r1, r3
-	ldr	r3, .L1547
+	ldr	r3, .L1548
 	ldr	r3, [r3]
 	cmp	r4, r3
-	bhi	.L1536
-	ldr	r3, .L1547+4
+	bhi	.L1537
+	ldr	r3, .L1548+4
 	ldr	r0, [r3]
 	adds	r1, r0, #1
-	beq	.L1502
-	ldr	r3, .L1547+8
+	beq	.L1503
+	ldr	r3, .L1548+8
 	mov	r2, #2048
 	mov	r0, fp
-	ldr	r7, .L1547+12
+	ldr	r7, .L1548+12
 	str	r2, [r3]
-	ldr	r3, .L1547+16
+	ldr	r3, .L1548+16
 	ldrh	r5, [r3]
 	mov	r1, r5
 	bl	__aeabi_uidiv
@@ -11123,7 +11135,7 @@ FtlWrite:
 	ldr	r1, [sp, #20]
 	ldr	r5, [sp, #12]
 	subs	r3, r0, r2
-	ldr	r2, .L1547+20
+	ldr	r2, .L1548+20
 	str	r3, [sp, #32]
 	adds	r3, r3, #1
 	str	r3, [sp, #8]
@@ -11132,39 +11144,39 @@ FtlWrite:
 	add	r3, r3, r1
 	ldr	r1, [sp, #8]
 	str	r3, [r2]
-	ldr	r2, .L1547+24
+	ldr	r2, .L1548+24
 	ldr	r3, [r2]
 	add	r3, r3, r1
 	str	r3, [r2]
-.L1505:
+.L1506:
 	ldr	r3, [sp, #8]
-	cbnz	r3, .L1531
-	ldr	r5, .L1547+28
+	cbnz	r3, .L1532
+	ldr	r5, .L1548+28
 	mov	r0, r3
 	ldr	r1, [sp, #32]
 	bl	rk_ftl_garbage_collect
 	ldrh	r2, [r5]
 	cmp	r2, #5
-	bls	.L1532
-.L1534:
+	bls	.L1533
+.L1535:
 	movs	r0, #0
-	b	.L1502
-.L1531:
-	ldr	r4, .L1547+32
+	b	.L1503
+.L1532:
+	ldr	r4, .L1548+32
 	ldrb	r2, [r7, #6]	@ zero_extendqisi2
 	ldrh	r3, [r4]
 	cmp	r2, r3
-	bcc	.L1506
-	movw	r2, #1038
-	ldr	r1, .L1547+36
-	ldr	r0, .L1547+40
+	bcc	.L1507
+	movw	r2, #1041
+	ldr	r1, .L1548+36
+	ldr	r0, .L1548+40
 	bl	printf
-.L1506:
+.L1507:
 	ldrh	r3, [r7, #4]
-	cbnz	r3, .L1507
+	cbnz	r3, .L1508
 	mov	r0, r7
 	bl	allocate_new_data_superblock
-.L1507:
+.L1508:
 	ldrb	r3, [r7, #7]	@ zero_extendqisi2
 	ldrh	r2, [r7, #4]
 	lsls	r3, r3, #2
@@ -11179,22 +11191,22 @@ FtlWrite:
 	str	r3, [sp, #44]
 	ldrh	r3, [r4]
 	cmp	r2, r3
-	bcc	.L1508
-	movw	r2, #1071
-	ldr	r1, .L1547+36
-	ldr	r0, .L1547+40
+	bcc	.L1509
+	movw	r2, #1074
+	ldr	r1, .L1548+36
+	ldr	r0, .L1548+40
 	bl	printf
-.L1508:
-	ldr	r8, .L1547+44
+.L1509:
+	ldr	r8, .L1548+44
 	movs	r3, #0
 	str	r3, [sp, #4]
-.L1509:
+.L1510:
 	ldr	r3, [sp, #4]
 	ldr	r2, [sp, #44]
 	cmp	r3, r2
-	bne	.L1529
-.L1510:
-	ldr	r0, .L1547+44
+	bne	.L1530
+.L1511:
+	ldr	r0, .L1548+44
 	mov	r3, r7
 	movs	r2, #0
 	ldr	r1, [sp, #4]
@@ -11203,21 +11215,21 @@ FtlWrite:
 	ldr	r3, [sp, #4]
 	ldr	r2, [sp, #8]
 	cmp	r3, r2
-	bls	.L1530
-	movw	r2, #1149
-	ldr	r1, .L1547+36
-	ldr	r0, .L1547+40
+	bls	.L1531
+	mov	r2, #1152
+	ldr	r1, .L1548+36
+	ldr	r0, .L1548+40
 	bl	printf
-.L1530:
+.L1531:
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #4]
 	subs	r3, r3, r2
 	str	r3, [sp, #8]
-	b	.L1505
-.L1529:
+	b	.L1506
+.L1530:
 	ldrh	r3, [r7, #4]
 	cmp	r3, #0
-	beq	.L1510
+	beq	.L1511
 	movs	r2, #0
 	add	r1, sp, #48
 	mov	r0, r5
@@ -11225,7 +11237,7 @@ FtlWrite:
 	bl	log2phys
 	mov	r0, r7
 	bl	get_new_active_ppa
-	ldr	r2, .L1547+48
+	ldr	r2, .L1548+48
 	ldr	r1, [sp, #4]
 	ldr	r3, [sp, #4]
 	ldrh	r2, [r2]
@@ -11237,7 +11249,7 @@ FtlWrite:
 	bic	r1, r1, #3
 	str	r5, [r3, #16]
 	str	r1, [sp, #36]
-	ldr	r1, .L1547+52
+	ldr	r1, .L1548+52
 	ldr	r0, [sp, #36]
 	ldr	r1, [r1]
 	add	r10, r1, r0
@@ -11247,12 +11259,12 @@ FtlWrite:
 	mov	r0, r10
 	bl	ftl_memset
 	ldr	r3, [sp, #12]
-	ldr	r2, .L1547+16
+	ldr	r2, .L1548+16
 	cmp	r5, r3
-	beq	.L1511
+	beq	.L1512
 	ldr	r3, [sp, #28]
 	cmp	r5, r3
-	bne	.L1542
+	bne	.L1543
 	ldrh	r2, [r2]
 	ldr	r3, [sp, #20]
 	smulbb	r2, r2, r5
@@ -11261,8 +11273,8 @@ FtlWrite:
 	str	r3, [sp, #24]
 	subs	r4, r4, r2
 	uxth	r4, r4
-	b	.L1514
-.L1511:
+	b	.L1515
+.L1512:
 	ldrh	r4, [r2]
 	mov	r0, fp
 	mov	r1, r4
@@ -11273,42 +11285,42 @@ FtlWrite:
 	cmp	r4, r3
 	it	cs
 	movcs	r4, r3
-.L1514:
-	ldr	r3, .L1547+16
+.L1515:
+	ldr	r3, .L1548+16
 	ldrh	r3, [r3]
 	cmp	r4, r3
 	ldr	r3, [sp, #12]
-	bne	.L1515
+	bne	.L1516
 	cmp	r5, r3
 	ldr	r3, [r8]
 	add	r6, r6, r3
-	bne	.L1516
+	bne	.L1517
 	ldr	r3, [sp, #16]
-.L1544:
+.L1545:
 	str	r3, [r6, #8]
-	b	.L1517
-.L1516:
+	b	.L1518
+.L1517:
 	muls	r4, r5, r4
 	ldr	r3, [sp, #16]
 	sub	r4, r4, fp
 	add	r4, r3, r4, lsl #9
 	str	r4, [r6, #8]
-.L1517:
-	ldr	r3, .L1547+32
+.L1518:
+	ldr	r3, .L1548+32
 	ldrb	r2, [r7, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1526
-	movw	r2, #1140
-	ldr	r1, .L1547+36
-	ldr	r0, .L1547+40
+	bcc	.L1527
+	movw	r2, #1143
+	ldr	r1, .L1548+36
+	ldr	r0, .L1548+40
 	bl	printf
-.L1526:
+.L1527:
 	ldr	r2, [sp, #40]
 	movw	r3, #61589
 	ldr	r1, [sp, #36]
 	strh	r3, [r2, r1]	@ movhi
-	ldr	r2, .L1547+56
+	ldr	r2, .L1548+56
 	str	r5, [r10, #8]
 	adds	r5, r5, #1
 	ldr	r3, [r2]
@@ -11325,19 +11337,19 @@ FtlWrite:
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
 	str	r3, [sp, #4]
-	b	.L1509
-.L1515:
+	b	.L1510
+.L1516:
 	cmp	r5, r3
 	ldr	r3, [r8]
 	ite	eq
-	ldreq	r2, .L1547+60
-	ldrne	r2, .L1547+64
+	ldreq	r2, .L1548+60
+	ldrne	r2, .L1548+64
 	add	r3, r3, r6
 	ldr	r2, [r2]
 	str	r2, [r3, #8]
 	ldr	r3, [sp, #48]
 	adds	r2, r3, #1
-	beq	.L1520
+	beq	.L1521
 	str	r3, [sp, #56]
 	movs	r1, #1
 	ldr	r3, [r8]
@@ -11352,61 +11364,61 @@ FtlWrite:
 	bl	FlashReadPages
 	ldr	r3, [sp, #52]
 	adds	r0, r3, #1
-	bne	.L1521
-	ldr	r1, .L1547+68
-	ldr	r0, .L1547+72
+	bne	.L1522
+	ldr	r1, .L1548+68
+	ldr	r0, .L1548+72
 	ldr	r2, [r1, #72]
 	adds	r2, r2, #1
 	str	r2, [r1, #72]
 	mov	r2, r5
 	ldr	r1, [r10, #8]
 	bl	printf
-.L1524:
+.L1525:
 	ldr	r3, [sp, #12]
 	lsls	r2, r4, #9
 	cmp	r5, r3
-	bne	.L1525
+	bne	.L1526
 	ldr	r3, [r8]
 	ldr	r1, [sp, #16]
 	add	r6, r6, r3
 	ldr	r3, [sp, #24]
 	ldr	r0, [r6, #8]
 	add	r0, r0, r3, lsl #9
-.L1545:
+.L1546:
 	bl	ftl_memcpy
-	b	.L1517
-.L1521:
+	b	.L1518
+.L1522:
 	ldr	r1, [r10, #8]
 	cmp	r5, r1
-	beq	.L1523
-	ldr	r2, .L1547+68
-	ldr	r0, .L1547+76
+	beq	.L1524
+	ldr	r2, .L1548+68
+	ldr	r0, .L1548+76
 	ldr	r3, [r2, #72]
 	adds	r3, r3, #1
 	str	r3, [r2, #72]
 	mov	r2, r5
 	bl	printf
-.L1523:
+.L1524:
 	ldr	r3, [r10, #8]
 	cmp	r5, r3
-	beq	.L1524
-	movw	r2, #1125
-	ldr	r1, .L1547+36
-	ldr	r0, .L1547+40
+	beq	.L1525
+	mov	r2, #1128
+	ldr	r1, .L1548+36
+	ldr	r0, .L1548+40
 	bl	printf
-	b	.L1524
-.L1520:
+	b	.L1525
+.L1521:
 	ldr	r3, [r8]
 	movs	r1, #0
-	ldr	r2, .L1547+80
+	ldr	r2, .L1548+80
 	add	r3, r3, r6
 	ldrh	r2, [r2]
 	ldr	r0, [r3, #8]
 	bl	ftl_memset
-	b	.L1524
-.L1548:
+	b	.L1525
+.L1549:
 	.align	2
-.L1547:
+.L1548:
 	.word	.LANCHOR34
 	.word	.LANCHOR166
 	.word	.LANCHOR176
@@ -11428,8 +11440,8 @@ FtlWrite:
 	.word	.LC44
 	.word	.LC45
 	.word	.LANCHOR23
-.L1525:
-	ldr	r3, .L1549
+.L1526:
+	ldr	r3, .L1550
 	ldrh	r1, [r3]
 	ldr	r3, [r8]
 	muls	r1, r5, r1
@@ -11438,8 +11450,8 @@ FtlWrite:
 	ldr	r0, [r6, #8]
 	sub	r1, r1, fp
 	add	r1, r3, r1, lsl #9
-	b	.L1545
-.L1542:
+	b	.L1546
+.L1543:
 	ldr	r3, [r8]
 	add	r6, r6, r3
 	ldrh	r3, [r2]
@@ -11447,30 +11459,30 @@ FtlWrite:
 	muls	r3, r5, r3
 	sub	r3, r3, fp
 	add	r3, r2, r3, lsl #9
-	b	.L1544
-.L1532:
-	ldr	r6, .L1549+4
+	b	.L1545
+.L1533:
+	ldr	r6, .L1550+4
 	mov	r4, #256
-	ldr	r7, .L1549+8
-.L1535:
+	ldr	r7, .L1550+8
+.L1536:
 	ldrh	r3, [r6]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1533
+	bne	.L1534
 	ldrh	r2, [r7]
 	cmp	r2, r3
-	bne	.L1533
+	bne	.L1534
 	movs	r0, #0
 	bl	List_get_gc_head_node
 	uxth	r0, r0
 	bl	FtlGcRefreshBlock
-.L1533:
-	ldr	r2, .L1549+12
+.L1534:
+	ldr	r2, .L1550+12
 	movs	r3, #128
 	movs	r1, #1
 	mov	r0, r1
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L1549+16
+	ldr	r2, .L1550+16
 	strh	r3, [r2]	@ movhi
 	bl	rk_ftl_garbage_collect
 	movs	r1, #1
@@ -11478,16 +11490,16 @@ FtlWrite:
 	bl	rk_ftl_garbage_collect
 	ldrh	r3, [r5]
 	cmp	r3, #2
-	bhi	.L1534
+	bhi	.L1535
 	subs	r4, r4, #1
-	bne	.L1535
-	b	.L1534
-.L1536:
+	bne	.L1536
+	b	.L1535
+.L1537:
 	mov	r0, #-1
-	b	.L1502
-.L1550:
+	b	.L1503
+.L1551:
 	.align	2
-.L1549:
+.L1550:
 	.word	.LANCHOR12
 	.word	.LANCHOR145
 	.word	.LANCHOR72
@@ -11523,16 +11535,16 @@ FtlLoadSysInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r1, #0
-	ldr	r8, .L1582+144
+	ldr	r8, .L1583+144
 	sub	sp, sp, #24
-	ldr	r7, .L1582
+	ldr	r7, .L1583
 	ldr	r3, [r8]
-	ldr	r4, .L1582+4
-	ldr	fp, .L1582+148
+	ldr	r4, .L1583+4
+	ldr	fp, .L1583+148
 	ldrh	r2, [r7]
-	ldr	r5, .L1582+8
+	ldr	r5, .L1583+8
 	str	r3, [r4, #8]
-	ldr	r6, .L1582+12
+	ldr	r6, .L1583+12
 	ldr	r3, [fp]
 	lsls	r2, r2, #1
 	ldr	r0, [r5]
@@ -11542,33 +11554,33 @@ FtlLoadSysInfo:
 	movw	r3, #65535
 	str	r5, [sp, #16]
 	cmp	r0, r3
-	bne	.L1553
-.L1564:
+	bne	.L1554
+.L1565:
 	mov	r0, #-1
-.L1552:
+.L1553:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1553:
+.L1554:
 	movs	r1, #1
 	bl	FtlGetLastWrittenPage
 	ldrsh	r10, [r6]
 	sxth	r5, r0
 	adds	r0, r0, #1
 	strh	r0, [r6, #2]	@ movhi
-.L1555:
+.L1556:
 	cmp	r5, #0
-	bge	.L1561
+	bge	.L1562
 	movw	r2, #1465
-	ldr	r1, .L1582+16
-	ldr	r0, .L1582+20
+	ldr	r1, .L1583+16
+	ldr	r0, .L1583+20
 	bl	printf
-	b	.L1560
-.L1561:
+	b	.L1561
+.L1562:
 	orr	r3, r5, r10, lsl #10
 	movs	r2, #1
 	mov	r1, r2
-	ldr	r0, .L1582+4
+	ldr	r0, .L1583+4
 	str	r3, [r4, #4]
 	ldr	r3, [r8]
 	str	r3, [r4, #8]
@@ -11576,67 +11588,67 @@ FtlLoadSysInfo:
 	ldr	r3, [r4, #12]
 	ldr	r3, [r3, #12]
 	str	r3, [sp, #20]
-	cbz	r3, .L1556
+	cbz	r3, .L1557
 	ldr	r2, [r4]
 	adds	r2, r2, #1
-	beq	.L1556
-	ldr	r2, .L1582+24
+	beq	.L1557
+	ldr	r2, .L1583+24
 	ldr	r0, [r4, #8]
 	ldrh	r1, [r2]
 	bl	js_hash
 	ldr	r3, [sp, #20]
 	cmp	r3, r0
-	beq	.L1556
+	beq	.L1557
 	str	r0, [sp, #8]
 	mov	r2, r10
 	str	r3, [sp, #4]
 	ldrh	r3, [r6, #4]
-	ldr	r1, .L1582+16
-	ldr	r0, .L1582+28
+	ldr	r1, .L1583+16
+	ldr	r0, .L1583+28
 	str	r3, [sp]
 	mov	r3, r5
 	bl	printf
-	cbnz	r5, .L1557
+	cbnz	r5, .L1558
 	ldrh	r3, [r6, #4]
 	cmp	r10, r3
-	beq	.L1557
+	beq	.L1558
 	sxth	r10, r3
-	ldr	r3, .L1582+32
+	ldr	r3, .L1583+32
 	ldrh	r5, [r3]
-.L1559:
+.L1560:
 	subs	r5, r5, #1
 	sxth	r5, r5
-	b	.L1555
-.L1557:
+	b	.L1556
+.L1558:
 	mov	r3, #-1
 	str	r3, [r4]
-.L1556:
+.L1557:
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L1559
+	beq	.L1560
 	ldr	r3, [r8]
-	ldr	r2, .L1582+36
+	ldr	r2, .L1583+36
 	ldr	r3, [r3]
 	cmp	r3, r2
-	bne	.L1559
+	bne	.L1560
 	ldr	r3, [fp]
 	ldrh	r2, [r3]
 	movw	r3, #61604
 	cmp	r2, r3
-	bne	.L1559
-.L1560:
-	ldr	r2, .L1582+24
+	bne	.L1560
+.L1561:
+	ldr	r2, .L1583+24
 	ldrh	r3, [r7]
 	ldrh	r2, [r2]
 	adds	r3, r3, #24
 	cmp	r2, r3, lsl #1
-	bcs	.L1563
+	bcs	.L1564
 	movw	r2, #1467
-	ldr	r1, .L1582+16
-	ldr	r0, .L1582+20
+	ldr	r1, .L1583+16
+	ldr	r0, .L1583+20
 	bl	printf
-.L1563:
-	ldr	r5, .L1582+40
+.L1564:
+	ldr	r5, .L1583+40
 	movs	r2, #48
 	ldr	r1, [r4, #8]
 	mov	r0, r5
@@ -11657,60 +11669,60 @@ FtlLoadSysInfo:
 	adds	r2, r2, #4
 	bic	r1, r1, #3
 	add	r1, r1, r3
-	ldr	r3, .L1582+44
+	ldr	r3, .L1583+44
 	ldr	r0, [r3]
 	bl	ftl_memcpy
 	ldr	r2, [r5]
-	ldr	r3, .L1582+36
+	ldr	r3, .L1583+36
 	cmp	r2, r3
-	bne	.L1564
-	ldr	r3, .L1582+48
+	bne	.L1565
+	ldr	r3, .L1583+48
 	ldrb	r2, [r4, #10]	@ zero_extendqisi2
 	ldrh	r5, [r5, #8]
 	ldrh	r3, [r3]
 	strh	r5, [r6, #6]	@ movhi
 	cmp	r2, r3
-	bne	.L1564
-	ldr	r3, .L1582+52
-	ldr	r2, .L1582+56
+	bne	.L1565
+	ldr	r3, .L1583+52
+	ldr	r2, .L1583+56
 	str	r5, [r3]
-	ldr	r3, .L1582+60
+	ldr	r3, .L1583+60
 	ldrh	r3, [r3]
 	muls	r3, r5, r3
 	str	r3, [r2]
-	ldr	r2, .L1582+64
+	ldr	r2, .L1583+64
 	ldrh	r2, [r2]
 	muls	r3, r2, r3
-	ldr	r2, .L1582+68
+	ldr	r2, .L1583+68
 	str	r3, [r2]
-	ldr	r3, .L1582+72
+	ldr	r3, .L1583+72
 	ldr	r6, [r3]
-	ldr	r3, .L1582+76
+	ldr	r3, .L1583+76
 	ldrh	r0, [r3, #6]
-	ldr	r3, .L1582+80
+	ldr	r3, .L1583+80
 	subs	r0, r6, r0
 	ldrh	r1, [r3]
 	subs	r0, r0, r5
 	bl	__aeabi_uidiv
-	ldr	r3, .L1582+84
+	ldr	r3, .L1583+84
 	cmp	r5, r6
 	strh	r0, [r3]	@ movhi
-	bls	.L1565
+	bls	.L1566
 	movw	r2, #1489
-	ldr	r1, .L1582+16
-	ldr	r0, .L1582+20
+	ldr	r1, .L1583+16
+	ldr	r0, .L1583+20
 	bl	printf
-.L1565:
+.L1566:
 	ldrh	r2, [r4, #16]
-	ldr	r3, .L1582+88
+	ldr	r3, .L1583+88
 	ldrh	ip, [r4, #14]
-	ldr	r7, .L1582+92
+	ldr	r7, .L1583+92
 	lsrs	r1, r2, #6
 	and	r2, r2, #63
 	strb	r2, [r3, #6]
 	ldrb	r2, [r4, #11]	@ zero_extendqisi2
 	strh	r1, [r3, #2]	@ movhi
-	ldr	r1, .L1582+96
+	ldr	r1, .L1583+96
 	strb	r2, [r3, #8]
 	ldrh	r2, [r4, #18]
 	strh	ip, [r3]	@ movhi
@@ -11729,7 +11741,7 @@ FtlLoadSysInfo:
 	strh	r5, [r1, #2]	@ movhi
 	ldrh	r5, [r4, #22]
 	strb	r2, [r1, #8]
-	ldr	r2, .L1582+100
+	ldr	r2, .L1583+100
 	strh	r5, [r2]	@ movhi
 	ldrh	r5, [r4, #24]
 	lsrs	r6, r5, #6
@@ -11739,31 +11751,31 @@ FtlLoadSysInfo:
 	strh	r6, [r2, #2]	@ movhi
 	ldr	r6, [r4, #32]
 	strb	r5, [r2, #8]
-	ldr	r5, .L1582+104
+	ldr	r5, .L1583+104
 	str	r3, [r5]
-	ldr	r5, .L1582+108
+	ldr	r5, .L1583+108
 	str	r3, [r5]
-	ldr	r5, .L1582+112
+	ldr	r5, .L1583+112
 	str	r3, [r5]
-	ldr	r5, .L1582+116
+	ldr	r5, .L1583+116
 	str	r3, [r5]
-	ldr	r5, .L1582+120
+	ldr	r5, .L1583+120
 	str	r6, [r5]
 	mov	r6, r1
-	ldr	r5, .L1582+124
+	ldr	r5, .L1583+124
 	str	r3, [r5]
-	ldr	r5, .L1582+128
+	ldr	r5, .L1583+128
 	str	r3, [r5]
-	ldr	r5, .L1582+132
+	ldr	r5, .L1583+132
 	ldr	lr, [r4, #40]
 	str	r3, [r5]
-	ldr	r3, .L1582+136
+	ldr	r3, .L1583+136
 	ldr	r5, [r3]
 	cmp	lr, r5
 	mov	r5, r2
 	it	hi
 	strhi	lr, [r3]
-	ldr	r3, .L1582+140
+	ldr	r3, .L1583+140
 	ldr	r2, [r4, #36]
 	ldr	r1, [r3]
 	cmp	r2, r1
@@ -11771,36 +11783,36 @@ FtlLoadSysInfo:
 	strhi	r2, [r3]
 	movw	r3, #65535
 	cmp	ip, r3
-	beq	.L1568
-	ldr	r0, .L1582+88
-	bl	make_superblock
-.L1568:
-	ldrh	r2, [r6]
-	movw	r3, #65535
-	cmp	r2, r3
 	beq	.L1569
-	ldr	r0, .L1582+96
+	ldr	r0, .L1583+88
 	bl	make_superblock
 .L1569:
-	ldrh	r2, [r5]
+	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
 	beq	.L1570
-	ldr	r0, .L1582+100
+	ldr	r0, .L1583+96
 	bl	make_superblock
 .L1570:
-	ldrh	r2, [r7]
+	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
 	beq	.L1571
-	ldr	r0, .L1582+92
+	ldr	r0, .L1583+100
 	bl	make_superblock
 .L1571:
+	ldrh	r2, [r7]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L1572
+	ldr	r0, .L1583+92
+	bl	make_superblock
+.L1572:
 	movs	r0, #0
-	b	.L1552
-.L1583:
+	b	.L1553
+.L1584:
 	.align	2
-.L1582:
+.L1583:
 	.word	.LANCHOR5
 	.word	.LANCHOR138
 	.word	.LANCHOR42
@@ -11860,7 +11872,7 @@ FtlMapTblRecovery:
 	movs	r7, #0
 	str	r3, [sp, #8]
 	ldr	r3, [r0, #16]
-	ldr	r6, .L1625
+	ldr	r6, .L1626
 	str	r3, [sp, #24]
 	ldrh	r3, [r0, #6]
 	str	r3, [sp, #12]
@@ -11870,13 +11882,13 @@ FtlMapTblRecovery:
 	ldr	r3, [sp, #12]
 	lsls	r2, r3, #2
 	bl	ftl_memset
-	ldr	r3, .L1625+4
+	ldr	r3, .L1626+4
 	str	r7, [r4, #32]
 	str	r7, [r4, #28]
 	ldr	r2, [r3]
 	str	r3, [sp, #20]
 	str	r2, [r6, #8]
-	ldr	r2, .L1625+8
+	ldr	r2, .L1626+8
 	ldr	fp, [r2]
 	movw	r2, #65535
 	str	fp, [r6, #12]
@@ -11884,20 +11896,20 @@ FtlMapTblRecovery:
 	strh	r2, [r4, #2]	@ movhi
 	movs	r2, #1
 	str	r2, [r4, #36]
-.L1585:
+.L1586:
 	ldr	r3, [sp, #16]
 	sxth	r5, r7
 	cmp	r5, r3
-	bge	.L1604
+	bge	.L1605
 	ldr	r3, [sp, #16]
 	subs	r3, r3, #1
 	cmp	r5, r3
-	bne	.L1586
+	bne	.L1587
 	movs	r1, #1
 	ldrh	r0, [r8, r5, lsl #1]
 	bl	FtlGetLastWrittenPage
 	sxth	r3, r0
-	ldr	r6, .L1625
+	ldr	r6, .L1626
 	add	r10, r8, r5, lsl #1
 	strh	r7, [r4]	@ movhi
 	str	r3, [sp, #16]
@@ -11907,22 +11919,22 @@ FtlMapTblRecovery:
 	strh	r0, [r4, #2]	@ movhi
 	ldr	r3, [r3, r5, lsl #2]
 	str	r3, [r4, #28]
-.L1587:
+.L1588:
 	ldr	r3, [sp, #16]
 	sxth	r8, r7
 	cmp	r8, r3
-	ble	.L1590
-.L1604:
+	ble	.L1591
+.L1605:
 	mov	r0, r4
 	bl	ftl_free_no_use_map_blk
-	ldr	r3, .L1625+12
+	ldr	r3, .L1626+12
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1592
+	bne	.L1593
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L1592:
+.L1593:
 	mov	r0, r4
 	bl	ftl_map_blk_gc
 	mov	r0, r4
@@ -11931,9 +11943,9 @@ FtlMapTblRecovery:
 	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1590:
+.L1591:
 	ldrh	r2, [r10]
-	ldr	r0, .L1625
+	ldr	r0, .L1626
 	orr	r2, r8, r2, lsl #10
 	str	r2, [r6, #4]
 	movs	r2, #1
@@ -11942,34 +11954,34 @@ FtlMapTblRecovery:
 	ldr	r2, [r6, #12]
 	ldr	r2, [r2, #12]
 	str	r2, [sp, #20]
-	cbz	r2, .L1588
+	cbz	r2, .L1589
 	ldr	r1, [r6]
 	adds	r1, r1, #1
-	beq	.L1588
-	ldr	r3, .L1625+16
+	beq	.L1589
+	ldr	r3, .L1626+16
 	ldr	r0, [r6, #8]
 	ldrh	r1, [r3]
 	bl	js_hash
 	ldr	r2, [sp, #20]
 	cmp	r2, r0
-	beq	.L1588
+	beq	.L1589
 	str	r0, [sp, #4]
 	mov	r3, r8
 	str	r2, [sp]
 	mov	r2, r5
-	ldr	r1, .L1625+20
-	ldr	r0, .L1625+24
+	ldr	r1, .L1626+20
+	ldr	r0, .L1626+24
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r6]
-.L1588:
+.L1589:
 	ldr	r3, [r6]
 	adds	r3, r3, #1
-	beq	.L1589
+	beq	.L1590
 	ldrh	r3, [fp, #8]
 	ldr	r2, [sp, #12]
 	cmp	r2, r3
-	bls	.L1589
+	bls	.L1590
 	ldrh	r1, [fp]
 	ldrh	r2, [r4, #4]
 	cmp	r1, r2
@@ -11977,15 +11989,15 @@ FtlMapTblRecovery:
 	ldreq	r2, [r6, #4]
 	ldreq	r1, [sp, #8]
 	streq	r2, [r1, r3, lsl #2]
-.L1589:
+.L1590:
 	adds	r7, r7, #1
-	b	.L1587
-.L1586:
+	b	.L1588
+.L1587:
 	ldr	r3, [sp, #20]
-	ldr	r10, .L1625+12
+	ldr	r10, .L1626+12
 	ldrh	r2, [r8, r5, lsl #1]
 	ldr	r3, [r3]
-	ldr	r0, .L1625
+	ldr	r0, .L1626
 	str	r3, [r6, #8]
 	add	r3, r8, r5, lsl #1
 	str	r3, [sp, #28]
@@ -11998,25 +12010,25 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	r3, [r6]
 	adds	r3, r3, #1
-	beq	.L1606
+	beq	.L1607
 	ldrh	r2, [fp]
 	ldrh	r3, [r4, #4]
 	cmp	r2, r3
-	bne	.L1606
+	bne	.L1607
 	ldrh	r2, [fp, #8]
 	movw	r3, #64245
 	cmp	r2, r3
-	beq	.L1594
-.L1606:
+	beq	.L1595
+.L1607:
 	mov	r10, #0
-.L1595:
-	ldr	r2, .L1625+12
+.L1596:
+	ldr	r2, .L1626+12
 	sxth	r3, r10
 	ldrh	r2, [r2]
 	cmp	r3, r2
-	bge	.L1602
+	bge	.L1603
 	ldr	r2, [sp, #28]
-	ldr	r0, .L1625
+	ldr	r0, .L1626
 	str	r3, [sp, #36]
 	ldrh	r2, [r2]
 	orr	r2, r3, r2, lsl #10
@@ -12027,34 +12039,34 @@ FtlMapTblRecovery:
 	ldr	r2, [r6, #12]
 	ldr	r2, [r2, #12]
 	str	r2, [sp, #32]
-	cbz	r2, .L1599
+	cbz	r2, .L1600
 	ldr	r1, [r6]
 	adds	r1, r1, #1
-	beq	.L1599
-	ldr	r1, .L1625+16
+	beq	.L1600
+	ldr	r1, .L1626+16
 	ldr	r0, [r6, #8]
 	ldrh	r1, [r1]
 	bl	js_hash
 	ldr	r2, [sp, #32]
 	cmp	r2, r0
-	beq	.L1599
+	beq	.L1600
 	str	r0, [sp, #4]
 	str	r2, [sp]
 	mov	r2, r5
 	ldr	r3, [sp, #36]
-	ldr	r1, .L1625+20
-	ldr	r0, .L1625+28
+	ldr	r1, .L1626+20
+	ldr	r0, .L1626+28
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r6]
-.L1599:
+.L1600:
 	ldr	r3, [r6]
 	adds	r3, r3, #1
-	beq	.L1600
+	beq	.L1601
 	ldrh	r3, [fp, #8]
 	ldr	r2, [sp, #12]
 	cmp	r2, r3
-	bls	.L1600
+	bls	.L1601
 	ldrh	r1, [fp]
 	ldrh	r2, [r4, #4]
 	cmp	r1, r2
@@ -12062,39 +12074,39 @@ FtlMapTblRecovery:
 	ldreq	r2, [r6, #4]
 	ldreq	r1, [sp, #8]
 	streq	r2, [r1, r3, lsl #2]
-.L1600:
+.L1601:
 	add	r10, r10, #1
-	b	.L1595
-.L1594:
+	b	.L1596
+.L1595:
 	ldr	r3, [sp, #20]
 	movs	r1, #0
 	ldrh	r2, [r10]
 	ldr	r0, [r3]
 	add	lr, r2, #-1
-.L1596:
+.L1597:
 	sxth	r3, r1
 	cmp	r3, lr
-	blt	.L1598
-.L1602:
+	blt	.L1599
+.L1603:
 	adds	r7, r7, #1
-	b	.L1585
-.L1598:
+	b	.L1586
+.L1599:
 	lsls	r5, r3, #3
 	ldr	r3, [r0, r3, lsl #3]
 	ldr	r2, [sp, #12]
 	uxth	ip, r3
 	cmp	r2, ip
-	bls	.L1597
+	bls	.L1598
 	add	r5, r5, r0
 	ldr	r2, [sp, #8]
 	ldr	r5, [r5, #4]
 	str	r5, [r2, ip, lsl #2]
-.L1597:
+.L1598:
 	adds	r1, r1, #1
-	b	.L1596
-.L1626:
+	b	.L1597
+.L1627:
 	.align	2
-.L1625:
+.L1626:
 	.word	.LANCHOR138
 	.word	.LANCHOR106
 	.word	.LANCHOR114
@@ -12116,36 +12128,36 @@ FtlLoadVonderInfo:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L1628
-	ldr	r0, .L1628+4
+	ldr	r3, .L1629
+	ldr	r0, .L1629+4
 	ldrh	r3, [r3]
 	strh	r3, [r0, #10]	@ movhi
 	movw	r3, #61574
 	strh	r3, [r0, #4]	@ movhi
-	ldr	r3, .L1628+8
+	ldr	r3, .L1629+8
 	ldrh	r3, [r3]
 	strh	r3, [r0, #8]	@ movhi
-	ldr	r3, .L1628+12
+	ldr	r3, .L1629+12
 	ldrh	r3, [r3]
 	strh	r3, [r0, #6]	@ movhi
-	ldr	r3, .L1628+16
+	ldr	r3, .L1629+16
 	ldr	r3, [r3]
 	str	r3, [r0, #12]
-	ldr	r3, .L1628+20
+	ldr	r3, .L1629+20
 	ldr	r3, [r3]
 	str	r3, [r0, #16]
-	ldr	r3, .L1628+24
+	ldr	r3, .L1629+24
 	ldr	r3, [r3]
 	str	r3, [r0, #20]
-	ldr	r3, .L1628+28
+	ldr	r3, .L1629+28
 	ldr	r3, [r3]
 	str	r3, [r0, #24]
 	bl	FtlMapTblRecovery
 	movs	r0, #0
 	pop	{r3, pc}
-.L1629:
+.L1630:
 	.align	2
-.L1628:
+.L1629:
 	.word	.LANCHOR27
 	.word	.LANCHOR161
 	.word	.LANCHOR35
@@ -12168,13 +12180,13 @@ FtlLoadMapInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	FtlL2PDataInit
-	ldr	r0, .L1631
+	ldr	r0, .L1632
 	bl	FtlMapTblRecovery
 	movs	r0, #0
 	pop	{r3, pc}
-.L1632:
+.L1633:
 	.align	2
-.L1631:
+.L1632:
 	.word	.LANCHOR129
 	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
 	.section	.text.FtlSysBlkInit,"ax",%progbits
@@ -12190,27 +12202,27 @@ FtlSysBlkInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r3, #0
-	ldr	r4, .L1646
+	ldr	r4, .L1647
 	strh	r3, [r4]	@ movhi
-	ldr	r3, .L1646+4
+	ldr	r3, .L1647+4
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlScanSysBlk
-	ldr	r3, .L1646+8
+	ldr	r3, .L1647+8
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1634
-.L1636:
+	bne	.L1635
+.L1637:
 	mov	r6, #-1
-.L1633:
+.L1634:
 	mov	r0, r6
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1634:
+.L1635:
 	bl	FtlLoadSysInfo
 	mov	r6, r0
 	cmp	r0, #0
-	bne	.L1636
+	bne	.L1637
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -12220,40 +12232,40 @@ FtlSysBlkInit:
 	bl	FtlPowerLostRecovery
 	movs	r0, #1
 	bl	FtlUpdateVaildLpn
-	ldr	r3, .L1646+12
+	ldr	r3, .L1647+12
 	movs	r0, #12
 	ldrh	r1, [r3]
-	ldr	r3, .L1646+16
+	ldr	r3, .L1647+16
 	ldr	r2, [r3]
 	mov	r3, r6
-.L1637:
+.L1638:
 	cmp	r3, r1
-	bge	.L1642
+	bge	.L1643
 	mla	r5, r0, r3, r2
 	ldr	r5, [r5, #4]
 	cmp	r5, #0
-	bge	.L1638
-.L1642:
-	ldr	r0, .L1646+20
+	bge	.L1639
+.L1643:
+	ldr	r0, .L1647+20
 	cmp	r3, r1
 	ldr	r2, [r0]
 	add	r2, r2, #32
 	str	r2, [r0]
-	bge	.L1644
-.L1639:
-	ldr	r5, .L1646+24
-	ldr	r4, .L1646+28
+	bge	.L1645
+.L1640:
+	ldr	r5, .L1647+24
+	ldr	r4, .L1647+28
 	mov	r0, r5
 	bl	FtlSuperblockPowerLostFix
 	mov	r0, r4
 	bl	FtlSuperblockPowerLostFix
-	ldr	r3, .L1646+32
+	ldr	r3, .L1647+32
 	ldrh	r1, [r5]
 	ldrh	r0, [r5, #4]
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
-	ldr	r0, .L1646+36
+	ldr	r0, .L1647+36
 	strh	r3, [r2, r1, lsl #1]	@ movhi
 	ldrh	r7, [r4, #4]
 	ldrh	r3, [r0]
@@ -12269,27 +12281,27 @@ FtlSysBlkInit:
 	strb	r3, [r4, #6]
 	strh	r3, [r4, #4]	@ movhi
 	strh	r2, [r4, #2]	@ movhi
-	ldr	r2, .L1646+40
+	ldr	r2, .L1647+40
 	ldrh	r3, [r2, #30]
 	adds	r3, r3, #1
 	strh	r3, [r2, #30]	@ movhi
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1645:
+.L1646:
 	bl	FtlVpcTblFlush
-	b	.L1633
-.L1638:
+	b	.L1634
+.L1639:
 	adds	r3, r3, #1
-	b	.L1637
-.L1644:
+	b	.L1638
+.L1645:
 	ldrh	r3, [r4]
 	cmp	r3, #0
-	bne	.L1639
+	bne	.L1640
 	bl	l2p_flush
-	b	.L1645
-.L1647:
+	b	.L1646
+.L1648:
 	.align	2
-.L1646:
+.L1647:
 	.word	.LANCHOR156
 	.word	.LANCHOR4
 	.word	.LANCHOR139
@@ -12315,64 +12327,64 @@ ftl_low_format:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #0
-	ldr	r2, .L1672
-	ldr	r6, .L1672+4
+	ldr	r2, .L1673
+	ldr	r6, .L1673+4
 	str	r3, [r2]
-	ldr	r5, .L1672+8
-	ldr	r2, .L1672+12
+	ldr	r5, .L1673+8
+	ldr	r2, .L1673+12
 	ldrh	r0, [r6]
 	str	r3, [r5]
 	str	r3, [r2]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	r0, .L1649
+	cbz	r0, .L1650
 	bl	FtlMakeBbt
-.L1649:
-	ldr	r3, .L1672+16
-	ldr	r2, .L1672+20
-	ldr	ip, .L1672+104
+.L1650:
+	ldr	r3, .L1673+16
+	ldr	r2, .L1673+20
+	ldr	ip, .L1673+104
 	ldrh	r1, [r3]
 	ldr	r4, [r2]
-	ldr	r2, .L1672+24
+	ldr	r2, .L1673+24
 	str	r3, [sp, #4]
 	lsls	r1, r1, #7
 	ldr	r7, [r2]
 	movs	r2, #0
-.L1650:
+.L1651:
 	uxth	r3, r2
 	adds	r2, r2, #1
 	cmp	r3, r1
-	blt	.L1651
-	ldr	r3, .L1672+28
+	blt	.L1652
+	ldr	r3, .L1673+28
 	movs	r7, #0
-	ldr	r10, .L1672+108
+	ldr	r10, .L1673+108
 	ldrh	r4, [r3]
 	mov	r8, r3
 	mov	fp, r10
-.L1652:
+.L1653:
 	ldrh	r3, [r10]
 	cmp	r3, r4
-	bhi	.L1653
-	ldr	r4, .L1672+32
+	bhi	.L1654
+	ldr	r4, .L1673+32
 	subs	r3, r7, #2
 	ldrh	r1, [r4]
 	cmp	r3, r1, lsl #1
-	bgt	.L1654
-.L1658:
+	bgt	.L1655
+.L1659:
 	movs	r6, #0
 	mov	r7, r6
-.L1655:
+.L1656:
 	ldrh	r3, [r8]
 	uxth	r0, r6
 	adds	r6, r6, #1
 	cmp	r3, r0
-	bhi	.L1659
+	bhi	.L1660
 	ldrh	r2, [fp]
-	ldr	r3, .L1672+36
+	ldr	r3, .L1673+36
 	ldrh	r4, [r4]
-	ldr	r6, .L1672+40
+	ldr	r6, .L1673+40
 	str	r2, [r3]
-	ldr	r3, .L1672+44
+	ldr	r3, .L1673+44
 	mov	r1, r4
 	ldr	r2, [r3]
 	mov	r0, r2
@@ -12382,13 +12394,13 @@ ftl_low_format:
 	mov	r3, r0
 	str	r0, [r6]
 	add	r1, r10, #36
-	ldr	r0, .L1672+48
+	ldr	r0, .L1673+48
 	strh	r1, [r0]	@ movhi
 	movs	r1, #24
 	muls	r1, r4, r1
 	str	r0, [sp]
 	cmp	r7, r1
-	ble	.L1660
+	ble	.L1661
 	ldr	r2, [sp, #12]
 	mov	r1, r4
 	str	r3, [sp, #8]
@@ -12400,11 +12412,11 @@ ftl_low_format:
 	adds	r0, r0, #24
 	strh	r0, [r3]	@ movhi
 	ldr	r3, [sp, #8]
-.L1660:
-	ldr	r2, .L1672+52
+.L1661:
+	ldr	r2, .L1673+52
 	ldrh	r2, [r2]
-	cbz	r2, .L1662
-	ldr	r1, .L1672+48
+	cbz	r2, .L1663
+	ldr	r1, .L1673+48
 	ldrh	r0, [r1]
 	add	r0, r0, r2, lsr #1
 	strh	r0, [r1]	@ movhi
@@ -12415,24 +12427,24 @@ ftl_low_format:
 	strlt	r3, [r6]
 	addlt	r2, r2, r10
 	strhlt	r2, [r1]	@ movhi
-.L1662:
+.L1663:
 	ldr	r3, [sp]
-	ldr	r7, .L1672+56
-	ldr	r10, .L1672+112
+	ldr	r7, .L1673+56
+	ldr	r10, .L1673+112
 	ldrh	r2, [r3]
 	ldr	r3, [r6]
 	subs	r3, r3, r2
 	muls	r4, r3, r4
-	ldr	r3, .L1672+60
+	ldr	r3, .L1673+60
 	ldrh	r3, [r3]
 	str	r4, [r7]
 	muls	r4, r3, r4
 	ldr	r3, [sp, #4]
 	ldrh	r3, [r3]
 	str	r4, [r6]
-	ldr	r6, .L1672+64
+	ldr	r6, .L1673+64
 	muls	r4, r3, r4
-	ldr	r3, .L1672+68
+	ldr	r3, .L1673+68
 	str	r4, [r3]
 	movw	r4, #65535
 	bl	FtlBbmTblFlush
@@ -12441,13 +12453,13 @@ ftl_low_format:
 	ldr	r0, [r10]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-	ldr	r2, .L1672+72
+	ldr	r2, .L1673+72
 	movs	r3, #0
 	strh	r3, [r6, #2]	@ movhi
 	movs	r1, #255
 	strb	r3, [r6, #6]
 	str	r3, [r2]
-	ldr	r2, .L1672+76
+	ldr	r2, .L1673+76
 	strh	r3, [r6]	@ movhi
 	strh	r3, [r2, #2]	@ movhi
 	strb	r3, [r2, #6]
@@ -12458,30 +12470,30 @@ ftl_low_format:
 	mov	r8, r10
 	strb	r3, [r6, #8]
 	mov	r10, r6
-	ldr	r3, .L1672+80
+	ldr	r3, .L1673+80
 	lsrs	r2, r2, #3
 	ldr	r0, [r3]
 	bl	ftl_memset
-.L1664:
+.L1665:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r6, #7]	@ zero_extendqisi2
 	ldrh	r2, [r6]
 	cmp	r3, #0
-	bne	.L1665
+	bne	.L1666
 	ldr	r3, [r8]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r6]
 	adds	r3, r3, #1
 	strh	r3, [r6]	@ movhi
-	b	.L1664
-.L1651:
+	b	.L1665
+.L1652:
 	mvns	r0, r3
 	orr	r0, r3, r0, lsl #16
 	str	r0, [r4, r3, lsl #2]
 	str	ip, [r7, r3, lsl #2]
-	b	.L1650
-.L1653:
+	b	.L1651
+.L1654:
 	mov	r0, r4
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
@@ -12489,11 +12501,11 @@ ftl_low_format:
 	add	r7, r7, r0
 	uxth	r7, r7
 	uxth	r4, r4
-	b	.L1652
-.L1654:
+	b	.L1653
+.L1655:
 	mov	r0, r7
 	bl	__aeabi_uidiv
-	ldr	r3, .L1672+84
+	ldr	r3, .L1673+84
 	ldr	r3, [r3]
 	add	r0, r0, r3
 	uxth	r0, r0
@@ -12501,26 +12513,26 @@ ftl_low_format:
 	ldrh	r0, [r6]
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	r6, [r8]
-.L1656:
+.L1657:
 	ldrh	r3, [fp]
 	cmp	r3, r6
-	bls	.L1658
+	bls	.L1659
 	mov	r0, r6
 	movs	r1, #1
 	adds	r6, r6, #1
 	bl	FtlLowFormatEraseBlock
 	uxth	r6, r6
-	b	.L1656
-.L1659:
+	b	.L1657
+.L1660:
 	movs	r1, #0
 	bl	FtlLowFormatEraseBlock
 	add	r7, r7, r0
 	uxth	r7, r7
-	b	.L1655
-.L1665:
+	b	.L1656
+.L1666:
 	ldr	r3, [r5]
 	ldrh	r1, [r6, #4]
-	ldr	r4, .L1672+88
+	ldr	r4, .L1673+88
 	str	r3, [r6, #12]
 	adds	r3, r3, #1
 	str	r3, [r5]
@@ -12536,19 +12548,19 @@ ftl_low_format:
 	strh	r3, [r4]	@ movhi
 	movs	r3, #1
 	strb	r3, [r4, #8]
-.L1666:
+.L1667:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r4]
-	cbnz	r3, .L1667
+	cbnz	r3, .L1668
 	ldr	r3, [r8]
 	strh	r6, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	b	.L1666
-.L1667:
+	b	.L1667
+.L1668:
 	ldr	r3, [r5]
 	ldrh	r1, [r4, #4]
 	str	r3, [r4, #12]
@@ -12557,10 +12569,10 @@ ftl_low_format:
 	movw	r4, #65535
 	ldr	r3, [r8]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L1672+92
+	ldr	r3, .L1673+92
 	strh	r4, [r3]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L1672+96
+	ldr	r3, .L1673+96
 	movs	r2, #0
 	strh	r2, [r3, #2]	@ movhi
 	ldr	r2, [r7]
@@ -12573,18 +12585,18 @@ ftl_low_format:
 	str	r2, [r5]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	r0, .L1668
-	ldr	r3, .L1672+100
+	cbnz	r0, .L1669
+	ldr	r3, .L1673+100
 	movs	r2, #1
 	str	r2, [r3]
-.L1668:
+.L1669:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1673:
+.L1674:
 	.align	2
-.L1672:
+.L1673:
 	.word	.LANCHOR83
 	.word	.LANCHOR4
 	.word	.LANCHOR82
@@ -12628,40 +12640,40 @@ sftl_init:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
 	mov	r3, #-1
-	ldr	r4, .L1686
+	ldr	r4, .L1687
 	movs	r6, #0
-	ldr	r1, .L1686+4
-	ldr	r0, .L1686+8
+	ldr	r1, .L1687+4
+	ldr	r0, .L1687+8
 	str	r3, [r4]
 	bl	printf
-	ldr	r0, .L1686+12
+	ldr	r0, .L1687+12
 	bl	FtlConstantsInit
-	ldr	r5, .L1686+16
+	ldr	r5, .L1687+16
 	bl	FtlMemInit
 	bl	FtlVariablesInit
-	ldr	r3, .L1686+20
+	ldr	r3, .L1687+20
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
-.L1675:
+.L1676:
 	bl	FtlLoadBbt
-	cbz	r0, .L1676
-.L1685:
+	cbz	r0, .L1677
+.L1686:
 	ldr	r3, [r5]
 	cmp	r3, #1
-	bne	.L1675
+	bne	.L1676
 	str	r6, [r5]
 	bl	ftl_low_format
-	b	.L1675
-.L1676:
+	b	.L1676
+.L1677:
 	bl	FtlSysBlkInit
 	cmp	r0, #0
-	bne	.L1685
+	bne	.L1686
 	movs	r3, #1
 	str	r3, [r4]
 	pop	{r4, r5, r6, pc}
-.L1687:
+.L1688:
 	.align	2
-.L1686:
+.L1687:
 	.word	.LANCHOR166
 	.word	.LC49
 	.word	.LC38
@@ -12688,33 +12700,33 @@ FtlWriteToIDB:
 	mov	r4, r0
 	mov	r6, r1
 	mov	r7, r2
-	ldr	r5, .L1758
-	bls	.L1689
+	ldr	r5, .L1759
+	bls	.L1690
 	cmp	r0, #576
-	bcc	.L1690
-.L1689:
+	bcc	.L1691
+.L1690:
 	ldr	r3, [r5]
-	cbnz	r3, .L1691
-.L1757:
+	cbnz	r3, .L1692
+.L1758:
 	movs	r4, #0
-	b	.L1688
-.L1691:
-	ldr	r3, .L1758+4
+	b	.L1689
+.L1692:
+	ldr	r3, .L1759+4
 	ldr	r3, [r3]
 	ldr	r2, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L1758+8
+	ldr	r3, .L1759+8
 	cmp	r2, r3
-	bne	.L1693
-	ldr	r3, .L1758+12
+	bne	.L1694
+	ldr	r3, .L1759+12
 	movs	r2, #0
 	ldrh	r1, [r3, #10]
 	ldr	r3, [sp, #12]
 	add	r0, r3, #262144
 	movw	r3, #65535
-.L1697:
+.L1698:
 	ldr	r4, [r0, #-4]
-	cbnz	r4, .L1694
+	cbnz	r4, .L1695
 	ldr	r4, [sp, #12]
 	subs	r3, r3, #1
 	ldr	r4, [r4, r2, lsl #2]
@@ -12724,18 +12736,18 @@ FtlWriteToIDB:
 	movhi	r2, #0
 	cmp	r3, #4096
 	str	r4, [r0, #-4]!
-	bne	.L1697
+	bne	.L1698
 	mov	r3, #512
-	b	.L1754
-.L1694:
+	b	.L1755
+.L1695:
 	adds	r3, r3, #127
 	lsrs	r3, r3, #7
-.L1754:
+.L1755:
 	str	r3, [sp, #16]
 	lsls	r1, r1, #2
 	ldr	r3, [sp, #16]
 	uxth	r1, r1
-	ldr	r4, .L1758+16
+	ldr	r4, .L1759+16
 	adds	r0, r3, #4
 	bl	__aeabi_uidiv
 	adds	r3, r0, #1
@@ -12746,53 +12758,53 @@ FtlWriteToIDB:
 	movs	r3, #0
 	mov	r10, r3
 	str	r3, [sp, #20]
-.L1719:
-	ldr	r3, .L1758+20
+.L1720:
+	ldr	r3, .L1759+20
 	mov	r2, #512
 	movs	r1, #0
 	ldr	r0, [r3]
 	bl	memset
-	ldr	r3, .L1758+12
+	ldr	r3, .L1759+12
 	ldrh	r6, [r3, #10]
 	ldr	r3, [r4, #16]
 	mul	fp, r10, r6
 	cmp	r3, #0
-	beq	.L1727
+	beq	.L1728
 	ldr	r3, [r4, #20]
 	cmp	r3, #0
 	ite	eq
 	moveq	r3, #6
 	movne	r3, #9
-.L1755:
+.L1756:
 	str	r3, [sp, #28]
 	mov	r1, fp
-	ldr	r3, .L1758+16
+	ldr	r3, .L1759+16
 	movs	r0, #0
 	ldr	r3, [r3, #4]
 	blx	r3
 	ldr	r3, [sp, #24]
 	cmp	r3, #1
-	beq	.L1699
-	ldr	r3, .L1758+16
+	beq	.L1700
+	ldr	r3, .L1759+16
 	add	r1, r6, fp
 	movs	r0, #0
 	ldr	r3, [r3, #4]
 	blx	r3
-.L1699:
+.L1700:
 	ldr	r3, [sp, #28]
 	cmp	r3, #9
-	bne	.L1729
-	ldr	r3, .L1758+20
+	bne	.L1730
+	ldr	r3, .L1759+20
 	mov	r2, #1024
 	movs	r1, #0
 	ldr	r5, [r3]
 	mov	r0, r5
 	bl	ftl_memset
 	movs	r2, #4
-	ldr	r3, .L1758+24
+	ldr	r3, .L1759+24
 	strb	r2, [r5, #17]
 	movs	r1, #12
-	ldr	r2, .L1758+12
+	ldr	r2, .L1759+12
 	adds	r0, r5, r1
 	str	r3, [r5]
 	movs	r3, #0
@@ -12807,7 +12819,7 @@ FtlWriteToIDB:
 	strh	r3, [r5, #22]	@ movhi
 	bl	js_hash
 	str	r0, [r5, #8]
-.L1700:
+.L1701:
 	ldr	r3, [sp, #24]
 	mov	r8, fp
 	muls	r3, r6, r3
@@ -12815,10 +12827,10 @@ FtlWriteToIDB:
 	str	r3, [sp, #40]
 	ldr	r3, [sp, #12]
 	str	r3, [sp, #32]
-.L1701:
+.L1702:
 	ldr	r3, [sp, #40]
 	cmp	r6, r3
-	beq	.L1708
+	beq	.L1709
 	ldr	r3, [sp, #28]
 	cmp	r3, #9
 	itet	ne
@@ -12829,10 +12841,10 @@ FtlWriteToIDB:
 	movw	r3, #61424
 	str	r3, [sp, #52]
 	cmp	r6, #0
-	bne	.L1704
+	bne	.L1705
 	ldr	r3, [sp, #28]
 	cmp	r3, #9
-	bne	.L1704
+	bne	.L1705
 	ldr	r3, [r4, #16]
 	movs	r0, #70
 	blx	r3
@@ -12842,40 +12854,40 @@ FtlWriteToIDB:
 	mov	r0, r6
 	ldr	r7, [r4, #8]
 	blx	r7
-	ldr	r2, .L1758+12
+	ldr	r2, .L1759+12
 	str	r0, [sp, #44]
 	ldr	r3, [r4, #16]
 	ldrb	r0, [r2, #22]	@ zero_extendqisi2
 	blx	r3
 	ldr	r2, [sp, #44]
 	adds	r2, r2, #1
-	bne	.L1705
-.L1708:
-	ldr	r3, .L1758+20
+	bne	.L1706
+.L1709:
+	ldr	r3, .L1759+20
 	ldr	r2, [r4, #16]
 	ldr	r6, [r3]
-	ldr	r3, .L1758+12
+	ldr	r3, .L1759+12
 	ldrb	r3, [r3, #14]	@ zero_extendqisi2
 	str	r3, [sp, #28]
-	ldr	r3, .L1758+12
+	ldr	r3, .L1759+12
 	ldrh	r3, [r3, #10]
 	mul	r8, r10, r3
 	cmp	r2, #0
-	bne	.L1706
+	bne	.L1707
 	mov	fp, #6
-.L1707:
+.L1708:
 	ldr	r2, [sp, #24]
 	movs	r5, #0
 	muls	r3, r2, r3
 	str	r3, [sp, #32]
-.L1710:
+.L1711:
 	ldr	r3, [sp, #32]
 	cmp	r5, r3
-	beq	.L1714
+	beq	.L1715
 	cmp	r5, #0
-	bne	.L1711
+	bne	.L1712
 	cmp	fp, #9
-	bne	.L1711
+	bne	.L1712
 	ldr	r3, [r4, #16]
 	movs	r0, #70
 	blx	r3
@@ -12891,77 +12903,77 @@ FtlWriteToIDB:
 	ldr	r3, [r4, #20]
 	ldr	r0, [sp, #28]
 	blx	r3
-	ldr	r2, .L1758+12
+	ldr	r2, .L1759+12
 	ldr	r3, [r4, #16]
 	ldrb	r0, [r2, #22]	@ zero_extendqisi2
 	blx	r3
 	ldr	r3, [r6]
-	ldr	r2, .L1758+24
+	ldr	r2, .L1759+24
 	cmp	r3, r2
-	beq	.L1712
-.L1714:
-	ldr	r3, .L1758+20
+	beq	.L1713
+.L1715:
+	ldr	r3, .L1759+20
 	movs	r5, #0
 	ldr	r1, [sp, #12]
 	ldr	r0, [r3]
-.L1713:
+.L1714:
 	mov	r8, r1
 	ldr	r2, [r0, r5, lsl #2]
 	ldr	r3, [r8]
 	lsls	r6, r5, #2
 	adds	r1, r1, #4
 	cmp	r2, r3
-	beq	.L1716
+	beq	.L1717
 	mov	r2, #512
 	movs	r1, #0
 	bl	memset
-	ldr	r3, .L1758+20
+	ldr	r3, .L1759+20
 	mov	r1, r10
-	ldr	r0, .L1758+28
+	ldr	r0, .L1759+28
 	ldr	r2, [r3]
 	str	r5, [sp]
 	ldr	r3, [r8]
 	ldr	r2, [r2, r6]
 	bl	printf
-	ldr	r3, .L1758+12
+	ldr	r3, .L1759+12
 	movs	r0, #0
 	ldrh	r1, [r3, #10]
 	ldr	r3, [r4, #4]
 	mul	r1, r10, r1
 	blx	r3
-.L1717:
+.L1718:
 	ldr	r3, [sp, #24]
 	add	r10, r10, r3
 	cmp	r10, #15
-	bls	.L1719
+	bls	.L1720
 	ldr	r3, [sp, #20]
-	cbnz	r3, .L1720
-.L1693:
+	cbnz	r3, .L1721
+.L1694:
 	mov	r3, #-1
 	str	r3, [sp, #16]
-.L1720:
-	ldr	r3, .L1758
+.L1721:
+	ldr	r3, .L1759
 	movs	r2, #0
 	ldr	r4, [sp, #16]
 	str	r2, [r3]
-	ldr	r3, .L1758+4
+	ldr	r3, .L1759+4
 	ldr	r0, [r3]
 	bl	free
-	ldr	r3, .L1758+20
+	ldr	r3, .L1759+20
 	ldr	r0, [r3]
 	bl	free
-.L1688:
+.L1689:
 	mov	r0, r4
 	add	sp, sp, #112
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1727:
+.L1728:
 	movs	r3, #6
-	b	.L1755
-.L1729:
+	b	.L1756
+.L1730:
 	movs	r5, #0
-	b	.L1700
-.L1704:
+	b	.L1701
+.L1705:
 	add	r3, sp, #48
 	ldr	r2, [sp, #32]
 	mov	r1, r8
@@ -12969,22 +12981,22 @@ FtlWriteToIDB:
 	ldr	r7, [r4, #8]
 	blx	r7
 	adds	r0, r0, #1
-	beq	.L1708
+	beq	.L1709
 	ldr	r3, [sp, #32]
 	add	r3, r3, #2048
 	str	r3, [sp, #32]
-.L1705:
+.L1706:
 	adds	r6, r6, #1
 	add	r8, r8, #1
-	b	.L1701
-.L1706:
+	b	.L1702
+.L1707:
 	ldr	r2, [r4, #20]
 	cmp	r2, #0
 	ite	eq
 	moveq	fp, #6
 	movne	fp, #9
-	b	.L1707
-.L1711:
+	b	.L1708
+.L1712:
 	add	r3, sp, #48
 	mov	r2, r6
 	add	r1, r8, r5
@@ -12992,18 +13004,18 @@ FtlWriteToIDB:
 	ldr	r7, [r4, #12]
 	blx	r7
 	adds	r0, r0, #1
-	beq	.L1714
+	beq	.L1715
 	ldr	r2, [sp, #52]
 	movw	r3, #61424
 	cmp	r2, r3
-	bne	.L1714
+	bne	.L1715
 	add	r6, r6, #2048
-.L1712:
+.L1713:
 	adds	r5, r5, #1
-	b	.L1710
-.L1759:
+	b	.L1711
+.L1760:
 	.align	2
-.L1758:
+.L1759:
 	.word	.LANCHOR182
 	.word	.LANCHOR183
 	.word	-52655045
@@ -13012,45 +13024,45 @@ FtlWriteToIDB:
 	.word	.LANCHOR184
 	.word	1179535694
 	.word	.LC50
-.L1716:
+.L1717:
 	ldr	r3, [sp, #36]
 	adds	r5, r5, #1
 	cmp	r5, r3
-	bne	.L1713
+	bne	.L1714
 	ldr	r3, [sp, #20]
 	adds	r3, r3, #1
 	cmp	r3, #5
 	str	r3, [sp, #20]
-	bls	.L1717
-	b	.L1720
-.L1690:
+	bls	.L1718
+	b	.L1721
+.L1691:
 	cmp	r0, #64
-	bne	.L1721
-	ldr	fp, .L1760+4
+	bne	.L1722
+	ldr	fp, .L1761+4
 	mov	r0, #262144
 	bl	ftl_malloc
 	str	r0, [fp]
 	mov	r0, #262144
 	bl	ftl_malloc
-	ldr	r3, .L1760
+	ldr	r3, .L1761
 	str	r0, [r3]
 	ldr	r3, [fp]
-	cbz	r3, .L1722
-	cbz	r0, .L1722
+	cbz	r3, .L1723
+	cbz	r0, .L1723
 	movs	r2, #1
 	movs	r1, #0
 	str	r2, [r5]
 	mov	r0, r3
 	mov	r2, #262144
 	bl	ftl_memset
-.L1721:
+.L1722:
 	ldr	r3, [r5]
 	cmp	r3, #0
-	beq	.L1757
-	ldr	r3, .L1760+4
+	beq	.L1758
+	ldr	r3, .L1761+4
 	cmp	r4, #63
 	iteee	hi
-	ldrhi	r5, .L1760+8
+	ldrhi	r5, .L1761+8
 	rsbls	r4, r4, #64
 	subls	r6, r6, r4
 	addls	r7, r7, r4, lsl #9
@@ -13058,7 +13070,7 @@ FtlWriteToIDB:
 	mov	r2, #262144
 	it	hi
 	addhi	r5, r5, r4
-	ldr	r0, .L1760+12
+	ldr	r0, .L1761+12
 	ite	ls
 	movls	r5, r1
 	addhi	r5, r1, r5, lsl #9
@@ -13073,15 +13085,15 @@ FtlWriteToIDB:
 	mov	r1, r7
 	mov	r0, r5
 	bl	ftl_memcpy
-	b	.L1757
-.L1722:
-	ldr	r1, .L1760+16
-	ldr	r0, .L1760+20
+	b	.L1758
+.L1723:
+	ldr	r1, .L1761+16
+	ldr	r0, .L1761+20
 	bl	printf
-	b	.L1721
-.L1761:
+	b	.L1722
+.L1762:
 	.align	2
-.L1760:
+.L1761:
 	.word	.LANCHOR184
 	.word	.LANCHOR183
 	.word	8388544
@@ -14435,215 +14447,215 @@ power_up_flag:
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",%progbits,1
 .LC1:
 	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
-	.section	.rodata.__func__.10006,"a",%progbits
+	.section	.rodata.__func__.10001,"a",%progbits
 	.set	.LANCHOR175,. + 0
-	.type	__func__.10006, %object
-	.size	__func__.10006, 23
-__func__.10006:
+	.type	__func__.10001, %object
+	.size	__func__.10001, 23
+__func__.10001:
 	.ascii	"rk_ftl_garbage_collect\000"
-	.section	.rodata.__func__.10278,"a",%progbits
+	.section	.rodata.__func__.10273,"a",%progbits
 	.set	.LANCHOR137,. + 0
-	.type	__func__.10278, %object
-	.size	__func__.10278, 15
-__func__.10278:
+	.type	__func__.10273, %object
+	.size	__func__.10273, 15
+__func__.10273:
 	.ascii	"FlashReadPages\000"
-	.section	.rodata.__func__.10297,"a",%progbits
+	.section	.rodata.__func__.10292,"a",%progbits
 	.set	.LANCHOR142,. + 0
-	.type	__func__.10297, %object
-	.size	__func__.10297, 15
-__func__.10297:
+	.type	__func__.10292, %object
+	.size	__func__.10292, 15
+__func__.10292:
 	.ascii	"FlashProgPages\000"
-	.section	.rodata.__func__.10321,"a",%progbits
+	.section	.rodata.__func__.10316,"a",%progbits
 	.set	.LANCHOR77,. + 0
-	.type	__func__.10321, %object
-	.size	__func__.10321, 17
-__func__.10321:
+	.type	__func__.10316, %object
+	.size	__func__.10316, 17
+__func__.10316:
 	.ascii	"FlashEraseBlocks\000"
-	.section	.rodata.__func__.10436,"a",%progbits
+	.section	.rodata.__func__.10431,"a",%progbits
 	.set	.LANCHOR185,. + 0
-	.type	__func__.10436, %object
-	.size	__func__.10436, 14
-__func__.10436:
+	.type	__func__.10431, %object
+	.size	__func__.10431, 14
+__func__.10431:
 	.ascii	"FtlWriteToIDB\000"
-	.section	.rodata.__func__.8930,"a",%progbits
+	.section	.rodata.__func__.8925,"a",%progbits
 	.set	.LANCHOR169,. + 0
-	.type	__func__.8930, %object
-	.size	__func__.8930, 13
-__func__.8930:
+	.type	__func__.8925, %object
+	.size	__func__.8925, 13
+__func__.8925:
 	.ascii	"FtlProgPages\000"
-	.section	.rodata.__func__.8958,"a",%progbits
+	.section	.rodata.__func__.8953,"a",%progbits
 	.set	.LANCHOR177,. + 0
-	.type	__func__.8958, %object
-	.size	__func__.8958, 9
-__func__.8958:
+	.type	__func__.8953, %object
+	.size	__func__.8953, 9
+__func__.8953:
 	.ascii	"FtlWrite\000"
-	.section	.rodata.__func__.9033,"a",%progbits
+	.section	.rodata.__func__.9028,"a",%progbits
 	.set	.LANCHOR128,. + 0
-	.type	__func__.9033, %object
-	.size	__func__.9033, 14
-__func__.9033:
+	.type	__func__.9028, %object
+	.size	__func__.9028, 14
+__func__.9028:
 	.ascii	"FtlBbt2Bitmap\000"
-	.section	.rodata.__func__.9068,"a",%progbits
+	.section	.rodata.__func__.9063,"a",%progbits
 	.set	.LANCHOR141,. + 0
-	.type	__func__.9068, %object
-	.size	__func__.9068, 11
-__func__.9068:
+	.type	__func__.9063, %object
+	.size	__func__.9063, 11
+__func__.9063:
 	.ascii	"FtlLoadBbt\000"
-	.section	.rodata.__func__.9183,"a",%progbits
+	.section	.rodata.__func__.9178,"a",%progbits
 	.set	.LANCHOR49,. + 0
+	.type	__func__.9178, %object
+	.size	__func__.9178, 17
+__func__.9178:
+	.ascii	"INSERT_FREE_LIST\000"
+	.section	.rodata.__func__.9183,"a",%progbits
+	.set	.LANCHOR45,. + 0
 	.type	__func__.9183, %object
 	.size	__func__.9183, 17
 __func__.9183:
-	.ascii	"INSERT_FREE_LIST\000"
-	.section	.rodata.__func__.9188,"a",%progbits
-	.set	.LANCHOR45,. + 0
-	.type	__func__.9188, %object
-	.size	__func__.9188, 17
-__func__.9188:
 	.ascii	"INSERT_DATA_LIST\000"
-	.section	.rodata.__func__.9219,"a",%progbits
+	.section	.rodata.__func__.9214,"a",%progbits
 	.set	.LANCHOR50,. + 0
-	.type	__func__.9219, %object
-	.size	__func__.9219, 17
-__func__.9219:
+	.type	__func__.9214, %object
+	.size	__func__.9214, 17
+__func__.9214:
 	.ascii	"List_remove_node\000"
-	.section	.rodata.__func__.9251,"a",%progbits
+	.section	.rodata.__func__.9246,"a",%progbits
 	.set	.LANCHOR54,. + 0
-	.type	__func__.9251, %object
-	.size	__func__.9251, 22
-__func__.9251:
+	.type	__func__.9246, %object
+	.size	__func__.9246, 22
+__func__.9246:
 	.ascii	"List_update_data_list\000"
-	.section	.rodata.__func__.9260,"a",%progbits
+	.section	.rodata.__func__.9255,"a",%progbits
 	.set	.LANCHOR150,. + 0
-	.type	__func__.9260, %object
-	.size	__func__.9260, 16
-__func__.9260:
+	.type	__func__.9255, %object
+	.size	__func__.9255, 16
+__func__.9255:
 	.ascii	"load_l2p_region\000"
-	.section	.rodata.__func__.9293,"a",%progbits
+	.section	.rodata.__func__.9288,"a",%progbits
 	.set	.LANCHOR81,. + 0
-	.type	__func__.9293, %object
-	.size	__func__.9293, 26
-__func__.9293:
+	.type	__func__.9288, %object
+	.size	__func__.9288, 26
+__func__.9288:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.section	.rodata.__func__.9304,"a",%progbits
+	.section	.rodata.__func__.9299,"a",%progbits
 	.set	.LANCHOR151,. + 0
-	.type	__func__.9304, %object
-	.size	__func__.9304, 15
-__func__.9304:
+	.type	__func__.9299, %object
+	.size	__func__.9299, 15
+__func__.9299:
 	.ascii	"ftl_map_blk_gc\000"
-	.section	.rodata.__func__.9319,"a",%progbits
+	.section	.rodata.__func__.9314,"a",%progbits
 	.set	.LANCHOR148,. + 0
-	.type	__func__.9319, %object
-	.size	__func__.9319, 31
-__func__.9319:
+	.type	__func__.9314, %object
+	.size	__func__.9314, 31
+__func__.9314:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.section	.rodata.__func__.9333,"a",%progbits
+	.section	.rodata.__func__.9328,"a",%progbits
 	.set	.LANCHOR149,. + 0
-	.type	__func__.9333, %object
-	.size	__func__.9333, 16
-__func__.9333:
+	.type	__func__.9328, %object
+	.size	__func__.9328, 16
+__func__.9328:
 	.ascii	"FtlMapWritePage\000"
-	.section	.rodata.__func__.9358,"a",%progbits
+	.section	.rodata.__func__.9353,"a",%progbits
 	.set	.LANCHOR57,. + 0
-	.type	__func__.9358, %object
-	.size	__func__.9358, 22
-__func__.9358:
+	.type	__func__.9353, %object
+	.size	__func__.9353, 22
+__func__.9353:
 	.ascii	"select_l2p_ram_region\000"
-	.section	.rodata.__func__.9375,"a",%progbits
+	.section	.rodata.__func__.9370,"a",%progbits
 	.set	.LANCHOR153,. + 0
-	.type	__func__.9375, %object
-	.size	__func__.9375, 9
-__func__.9375:
+	.type	__func__.9370, %object
+	.size	__func__.9370, 9
+__func__.9370:
 	.ascii	"log2phys\000"
-	.section	.rodata.__func__.9439,"a",%progbits
+	.section	.rodata.__func__.9434,"a",%progbits
 	.set	.LANCHOR165,. + 0
-	.type	__func__.9439, %object
-	.size	__func__.9439, 15
-__func__.9439:
+	.type	__func__.9434, %object
+	.size	__func__.9434, 15
+__func__.9434:
 	.ascii	"FtlVpcTblFlush\000"
-	.section	.rodata.__func__.9461,"a",%progbits
+	.section	.rodata.__func__.9456,"a",%progbits
 	.set	.LANCHOR140,. + 0
-	.type	__func__.9461, %object
-	.size	__func__.9461, 14
-__func__.9461:
+	.type	__func__.9456, %object
+	.size	__func__.9456, 14
+__func__.9456:
 	.ascii	"FtlScanSysBlk\000"
-	.section	.rodata.__func__.9517,"a",%progbits
+	.section	.rodata.__func__.9512,"a",%progbits
 	.set	.LANCHOR178,. + 0
-	.type	__func__.9517, %object
-	.size	__func__.9517, 15
-__func__.9517:
+	.type	__func__.9512, %object
+	.size	__func__.9512, 15
+__func__.9512:
 	.ascii	"FtlLoadSysInfo\000"
-	.section	.rodata.__func__.9539,"a",%progbits
+	.section	.rodata.__func__.9534,"a",%progbits
 	.set	.LANCHOR180,. + 0
-	.type	__func__.9539, %object
-	.size	__func__.9539, 18
-__func__.9539:
+	.type	__func__.9534, %object
+	.size	__func__.9534, 18
+__func__.9534:
 	.ascii	"FtlMapTblRecovery\000"
-	.section	.rodata.__func__.9585,"a",%progbits
+	.section	.rodata.__func__.9580,"a",%progbits
 	.set	.LANCHOR154,. + 0
-	.type	__func__.9585, %object
-	.size	__func__.9585, 16
-__func__.9585:
+	.type	__func__.9580, %object
+	.size	__func__.9580, 16
+__func__.9580:
 	.ascii	"FtlReUsePrevPpa\000"
-	.section	.rodata.__func__.9619,"a",%progbits
+	.section	.rodata.__func__.9614,"a",%progbits
 	.set	.LANCHOR155,. + 0
-	.type	__func__.9619, %object
-	.size	__func__.9619, 22
-__func__.9619:
+	.type	__func__.9614, %object
+	.size	__func__.9614, 22
+__func__.9614:
 	.ascii	"FtlRecoverySuperblock\000"
-	.section	.rodata.__func__.9676,"a",%progbits
+	.section	.rodata.__func__.9671,"a",%progbits
 	.set	.LANCHOR60,. + 0
-	.type	__func__.9676, %object
-	.size	__func__.9676, 16
-__func__.9676:
+	.type	__func__.9671, %object
+	.size	__func__.9671, 16
+__func__.9671:
 	.ascii	"make_superblock\000"
-	.section	.rodata.__func__.9697,"a",%progbits
+	.section	.rodata.__func__.9692,"a",%progbits
 	.set	.LANCHOR136,. + 0
-	.type	__func__.9697, %object
-	.size	__func__.9697, 18
-__func__.9697:
+	.type	__func__.9692, %object
+	.size	__func__.9692, 18
+__func__.9692:
 	.ascii	"SupperBlkListInit\000"
-	.section	.rodata.__func__.9724,"a",%progbits
+	.section	.rodata.__func__.9719,"a",%progbits
 	.set	.LANCHOR159,. + 0
-	.type	__func__.9724, %object
-	.size	__func__.9724, 14
-__func__.9724:
+	.type	__func__.9719, %object
+	.size	__func__.9719, 14
+__func__.9719:
 	.ascii	"ftl_check_vpc\000"
-	.section	.rodata.__func__.9789,"a",%progbits
+	.section	.rodata.__func__.9784,"a",%progbits
 	.set	.LANCHOR144,. + 0
-	.type	__func__.9789, %object
-	.size	__func__.9789, 25
-__func__.9789:
+	.type	__func__.9784, %object
+	.size	__func__.9784, 25
+__func__.9784:
 	.ascii	"allocate_data_superblock\000"
-	.section	.rodata.__func__.9810,"a",%progbits
+	.section	.rodata.__func__.9805,"a",%progbits
 	.set	.LANCHOR168,. + 0
-	.type	__func__.9810, %object
-	.size	__func__.9810, 29
-__func__.9810:
+	.type	__func__.9805, %object
+	.size	__func__.9805, 29
+__func__.9805:
 	.ascii	"allocate_new_data_superblock\000"
-	.section	.rodata.__func__.9817,"a",%progbits
+	.section	.rodata.__func__.9812,"a",%progbits
 	.set	.LANCHOR61,. + 0
-	.type	__func__.9817, %object
-	.size	__func__.9817, 19
-__func__.9817:
+	.type	__func__.9812, %object
+	.size	__func__.9812, 19
+__func__.9812:
 	.ascii	"get_new_active_ppa\000"
-	.section	.rodata.__func__.9830,"a",%progbits
+	.section	.rodata.__func__.9825,"a",%progbits
 	.set	.LANCHOR146,. + 0
-	.type	__func__.9830, %object
-	.size	__func__.9830, 16
-__func__.9830:
+	.type	__func__.9825, %object
+	.size	__func__.9825, 16
+__func__.9825:
 	.ascii	"update_vpc_list\000"
-	.section	.rodata.__func__.9837,"a",%progbits
+	.section	.rodata.__func__.9832,"a",%progbits
 	.set	.LANCHOR147,. + 0
-	.type	__func__.9837, %object
-	.size	__func__.9837, 20
-__func__.9837:
+	.type	__func__.9832, %object
+	.size	__func__.9832, 20
+__func__.9832:
 	.ascii	"decrement_vpc_count\000"
-	.section	.rodata.__func__.9907,"a",%progbits
+	.section	.rodata.__func__.9902,"a",%progbits
 	.set	.LANCHOR170,. + 0
-	.type	__func__.9907, %object
-	.size	__func__.9907, 19
-__func__.9907:
+	.type	__func__.9902, %object
+	.size	__func__.9902, 19
+__func__.9902:
 	.ascii	"FtlGcFreeTempBlock\000"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",%progbits,1
 .LC21:
diff --git a/drivers/rkflash/rk_sftl_arm_v8.S b/drivers/rkflash/rk_sftl_arm_v8.S
index 8298fdd27c..f1ec64e811 100644
--- a/drivers/rkflash/rk_sftl_arm_v8.S
+++ b/drivers/rkflash/rk_sftl_arm_v8.S
@@ -2,7 +2,7 @@
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:    GPL-2.0
- * date: 2019-02-20
+ * date: 2019-04-19
  */
 	.arch armv8-a+nosimd
 	.file	"rk_sftl.c"
@@ -110,56 +110,57 @@ FtlSysBlkNumInit:
 FtlConstantsInit:
 	stp	x29, x30, [sp, -16]!
 	mov	x5, x0
-	adrp	x1, .LANCHOR11
-	adrp	x6, .LANCHOR12
+	adrp	x2, .LANCHOR11
+	adrp	x1, .LANCHOR6
 	add	x29, sp, 0
 	ldrh	w3, [x0]
 	adrp	x0, .LANCHOR9
 	ldrh	w4, [x5, 2]
+	adrp	x6, .LANCHOR12
 	strh	w3, [x0, #:lo12:.LANCHOR9]
 	adrp	x0, .LANCHOR10
 	ldrh	w7, [x5, 14]
 	strh	w4, [x0, #:lo12:.LANCHOR10]
-	ldrh	w0, [x5, 4]
+	ldrh	w8, [x5, 4]
 	cmp	w7, 4
-	strh	w0, [x1, #:lo12:.LANCHOR11]
-	adrp	x1, .LANCHOR6
-	ldrh	w2, [x5, 6]
-	strh	w2, [x1, #:lo12:.LANCHOR6]
+	ldrh	w0, [x5, 6]
+	strh	w8, [x2, #:lo12:.LANCHOR11]
+	strh	w0, [x1, #:lo12:.LANCHOR6]
 	strh	w7, [x6, #:lo12:.LANCHOR12]
 	bne	.L10
-	lsr	w2, w2, 1
-	strh	w2, [x1, #:lo12:.LANCHOR6]
-	mov	w2, 8
-	strh	w2, [x6, #:lo12:.LANCHOR12]
-.L10:
+	lsr	w0, w0, 1
+	strh	w0, [x1, #:lo12:.LANCHOR6]
+	mov	w0, 8
+	strh	w0, [x6, #:lo12:.LANCHOR12]
+.L11:
 	adrp	x7, .LANCHOR13
 	add	x7, x7, :lo12:.LANCHOR13
-	mov	x2, 0
-.L11:
-	strb	w2, [x2, x7]
-	add	x2, x2, 1
-	cmp	x2, 32
-	bne	.L11
-	adrp	x2, .LANCHOR14
+	mov	x0, 0
+.L12:
+	strb	w0, [x0, x7]
+	add	x0, x0, 1
+	cmp	x0, 32
+	bne	.L12
+	adrp	x0, .LANCHOR14
 	mov	w7, 5
 	cmp	w3, 1
-	strh	w7, [x2, #:lo12:.LANCHOR14]
+	strh	w7, [x0, #:lo12:.LANCHOR14]
 	adrp	x7, .LANCHOR15
 	strh	wzr, [x7, #:lo12:.LANCHOR15]
-	bne	.L12
-	strh	w3, [x2, #:lo12:.LANCHOR14]
-.L12:
-	adrp	x2, .LANCHOR16
+	bne	.L13
+	strh	w3, [x0, #:lo12:.LANCHOR14]
+.L13:
+	adrp	x0, .LANCHOR16
 	mov	w3, 640
-	mul	w4, w4, w0
-	strh	w3, [x2, #:lo12:.LANCHOR16]
+	strh	w3, [x0, #:lo12:.LANCHOR16]
+	ldrh	w0, [x2, #:lo12:.LANCHOR11]
 	adrp	x2, .LANCHOR3
 	ldrh	w3, [x1, #:lo12:.LANCHOR6]
-	and	w4, w4, 65535
 	adrp	x1, .LANCHOR17
-	strh	w4, [x2, #:lo12:.LANCHOR3]
+	mul	w4, w4, w0
 	mul	w0, w0, w3
+	and	w4, w4, 65535
+	strh	w4, [x2, #:lo12:.LANCHOR3]
 	and	w0, w0, 65535
 	strh	w0, [x1, #:lo12:.LANCHOR17]
 	bl	Ftl_log2
@@ -203,8 +204,8 @@ FtlConstantsInit:
 	sdiv	w0, w0, w6
 	and	w0, w0, 65535
 	cmp	w0, 4
-	bls	.L13
-.L19:
+	bls	.L14
+.L20:
 	strh	w0, [x5, #:lo12:.LANCHOR27]
 	adrp	x1, .LANCHOR28
 	mov	w0, 640
@@ -227,8 +228,8 @@ FtlConstantsInit:
 	udiv	w0, w0, w4
 	mov	x4, x1
 	add	w3, w0, w3
-	beq	.L15
-.L20:
+	beq	.L16
+.L21:
 	str	w3, [x6, #:lo12:.LANCHOR2]
 	ldrh	w0, [x6, #:lo12:.LANCHOR2]
 	bl	FtlSysBlkNumInit
@@ -260,12 +261,22 @@ FtlConstantsInit:
 	str	w0, [x4, #:lo12:.LANCHOR30]
 	mov	w0, 0
 	ret
-.L13:
+.L10:
+	cmp	w7, 8
+	bne	.L11
+	cmp	w8, 1
+	bne	.L11
+	lsr	w0, w0, 1
+	strh	w0, [x1, #:lo12:.LANCHOR6]
+	mov	w0, 2
+	strh	w0, [x2, #:lo12:.LANCHOR11]
+	b	.L11
+.L14:
 	mov	w0, 4
-	b	.L19
-.L15:
-	add	w3, w3, 4
 	b	.L20
+.L16:
+	add	w3, w3, 4
+	b	.L21
 	.size	FtlConstantsInit, .-FtlConstantsInit
 	.section	.text.IsBlkInVendorPart,"ax",@progbits
 	.align	2
@@ -275,24 +286,24 @@ IsBlkInVendorPart:
 	adrp	x1, .LANCHOR35
 	and	w0, w0, 65535
 	ldrh	w1, [x1, #:lo12:.LANCHOR35]
-	cbz	w1, .L25
+	cbz	w1, .L26
 	adrp	x1, .LANCHOR27
 	ldrh	w2, [x1, #:lo12:.LANCHOR27]
 	adrp	x1, .LANCHOR36
 	ldr	x3, [x1, #:lo12:.LANCHOR36]
 	mov	x1, 0
-.L23:
+.L24:
 	cmp	w2, w1, uxth
-	bhi	.L24
-.L25:
+	bhi	.L25
+.L26:
 	mov	w0, 0
 	ret
-.L24:
+.L25:
 	add	x1, x1, 1
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w0
-	bne	.L23
+	bne	.L24
 	mov	w0, 1
 	ret
 	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
@@ -434,12 +445,12 @@ P2V_block_in_plane:
 ftl_cmp_data_ver:
 	cmp	w0, w1
 	mov	w2, -2147483648
-	bls	.L37
+	bls	.L38
 	sub	w1, w0, w1
 	cmp	w1, w2
 	cset	w0, ls
 	ret
-.L37:
+.L38:
 	sub	w1, w1, w0
 	cmp	w1, w2
 	cset	w0, hi
@@ -475,7 +486,7 @@ FtlFreeSysBLkSort:
 	adrp	x0, .LANCHOR38
 	add	x1, x0, :lo12:.LANCHOR38
 	ldrh	w2, [x1, 6]
-	cbz	w2, .L41
+	cbz	w2, .L42
 	adrp	x2, .LANCHOR39+28
 	ldrh	w3, [x1, 2]
 	mov	w6, 0
@@ -483,16 +494,16 @@ FtlFreeSysBLkSort:
 	ldrh	w5, [x2, #:lo12:.LANCHOR39+28]
 	ldrh	w2, [x1, 4]
 	and	w5, w5, 31
-.L43:
+.L44:
 	cmp	w5, w4
-	bgt	.L44
-	cbz	w6, .L41
+	bgt	.L45
+	cbz	w6, .L42
 	add	x0, x0, :lo12:.LANCHOR38
 	strh	w3, [x0, 2]
 	strh	w2, [x0, 4]
-.L41:
+.L42:
 	ret
-.L44:
+.L45:
 	add	x6, x1, x3, sxtw 1
 	add	w4, w4, 1
 	add	w3, w3, 1
@@ -504,7 +515,7 @@ FtlFreeSysBLkSort:
 	mov	w6, 1
 	add	w2, w2, w6
 	and	w2, w2, 1023
-	b	.L43
+	b	.L44
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
 	.section	.text.IsInFreeQueue,"ax",@progbits
 	.align	2
@@ -516,25 +527,25 @@ IsInFreeQueue:
 	and	w0, w0, 65535
 	ldrh	w4, [x1, 6]
 	cmp	w4, 1024
-	beq	.L54
+	beq	.L55
 	ldrh	w5, [x1, 2]
 	mov	w3, 0
-.L52:
+.L53:
 	cmp	w3, w4
-	bcc	.L53
-.L54:
+	bcc	.L54
+.L55:
 	mov	w0, 0
 	ret
-.L53:
+.L54:
 	add	w2, w3, w5
 	ubfiz	x2, x2, 1, 10
 	add	x2, x1, x2
 	ldrh	w2, [x2, 8]
 	cmp	w2, w0
-	beq	.L55
+	beq	.L56
 	add	w3, w3, 1
-	b	.L52
-.L55:
+	b	.L53
+.L56:
 	mov	w0, 1
 	ret
 	.size	IsInFreeQueue, .-IsInFreeQueue
@@ -547,7 +558,7 @@ insert_data_list:
 	and	w0, w0, 65535
 	ldrh	w12, [x1, #:lo12:.LANCHOR5]
 	cmp	w12, w0
-	bls	.L58
+	bls	.L59
 	adrp	x1, .LANCHOR40
 	mov	w8, 6
 	ldr	x4, [x1, #:lo12:.LANCHOR40]
@@ -559,12 +570,12 @@ insert_data_list:
 	adrp	x1, .LANCHOR41
 	mov	x15, x1
 	ldr	x7, [x1, #:lo12:.LANCHOR41]
-	cbnz	x7, .L59
+	cbnz	x7, .L60
 	str	x3, [x1, #:lo12:.LANCHOR41]
-.L58:
+.L59:
 	mov	w0, 0
 	ret
-.L59:
+.L60:
 	adrp	x1, .LANCHOR42
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
@@ -582,48 +593,48 @@ insert_data_list:
 	mul	x1, x1, x2
 	mov	x2, x7
 	and	w1, w1, 65535
-.L64:
+.L65:
 	add	w6, w6, 1
 	and	w6, w6, 65535
 	cmp	w12, w6
-	bcc	.L58
+	bcc	.L59
 	cmp	w1, w0
-	beq	.L58
+	beq	.L59
 	ldrh	w14, [x2, 4]
-	cbz	w14, .L62
+	cbz	w14, .L63
 	ubfiz	x11, x1, 1, 16
 	ldrh	w11, [x13, x11]
 	mul	w11, w11, w14
 	cmp	w5, w11
-	bls	.L62
+	bls	.L63
 	ldrh	w11, [x2]
 	cmp	w11, w16
-	bne	.L63
+	bne	.L64
 	strh	w1, [x3, 2]
 	strh	w0, [x2]
 	adrp	x0, .LANCHOR43
 	str	x3, [x0, #:lo12:.LANCHOR43]
-	b	.L58
-.L63:
+	b	.L59
+.L64:
 	umaddl	x2, w11, w8, x4
 	mov	w1, w11
-	b	.L64
-.L62:
+	b	.L65
+.L63:
 	strh	w1, [x4, x10]
 	cmp	x2, x7
 	ldrh	w1, [x2, 2]
 	strh	w1, [x3, 2]
-	bne	.L65
+	bne	.L66
 	strh	w0, [x2, 2]
 	str	x3, [x15, #:lo12:.LANCHOR41]
-	b	.L58
-.L65:
+	b	.L59
+.L66:
 	ldrh	w1, [x2, 2]
 	mov	w3, 6
 	umull	x1, w1, w3
 	strh	w0, [x4, x1]
 	strh	w0, [x2, 2]
-	b	.L58
+	b	.L59
 	.size	insert_data_list, .-insert_data_list
 	.section	.text.INSERT_DATA_LIST,"ax",@progbits
 	.align	2
@@ -641,7 +652,7 @@ INSERT_DATA_LIST:
 	adrp	x1, .LANCHOR5
 	ldrh	w1, [x1, #:lo12:.LANCHOR5]
 	cmp	w1, w0
-	bcs	.L70
+	bcs	.L71
 	ldp	x29, x30, [sp], 16
 	mov	w2, 214
 	adrp	x1, .LANCHOR45
@@ -649,7 +660,7 @@ INSERT_DATA_LIST:
 	add	x1, x1, :lo12:.LANCHOR45
 	add	x0, x0, :lo12:.LC1
 	b	printf
-.L70:
+.L71:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
@@ -661,7 +672,7 @@ insert_free_list:
 	and	w0, w0, 65535
 	mov	w7, 65535
 	cmp	w0, w7
-	beq	.L74
+	beq	.L75
 	adrp	x1, .LANCHOR40
 	mov	w6, 6
 	ldr	x3, [x1, #:lo12:.LANCHOR40]
@@ -673,12 +684,12 @@ insert_free_list:
 	adrp	x1, .LANCHOR46
 	mov	x12, x1
 	ldr	x5, [x1, #:lo12:.LANCHOR46]
-	cbnz	x5, .L75
+	cbnz	x5, .L76
 	str	x4, [x1, #:lo12:.LANCHOR46]
-.L74:
+.L75:
 	mov	w0, 0
 	ret
-.L75:
+.L76:
 	adrp	x1, .LANCHOR47
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
@@ -690,37 +701,37 @@ insert_free_list:
 	mul	x1, x1, x2
 	mov	x2, x5
 	and	w1, w1, 65535
-.L78:
+.L79:
 	ubfiz	x10, x1, 1, 16
 	ldrh	w10, [x11, x10]
 	cmp	w10, w13
-	bcs	.L76
+	bcs	.L77
 	ldrh	w10, [x2]
 	cmp	w10, w7
-	bne	.L77
+	bne	.L78
 	strh	w1, [x4, 2]
 	strh	w0, [x2]
-	b	.L74
-.L77:
+	b	.L75
+.L78:
 	umaddl	x2, w10, w6, x3
 	mov	w1, w10
-	b	.L78
-.L76:
+	b	.L79
+.L77:
 	ldrh	w6, [x2, 2]
 	cmp	x2, x5
 	strh	w6, [x4, 2]
 	strh	w1, [x3, x8]
-	bne	.L79
+	bne	.L80
 	strh	w0, [x2, 2]
 	str	x4, [x12, #:lo12:.LANCHOR46]
-	b	.L74
-.L79:
+	b	.L75
+.L80:
 	ldrh	w1, [x2, 2]
 	mov	w4, 6
 	umull	x1, w1, w4
 	strh	w0, [x3, x1]
 	strh	w0, [x2, 2]
-	b	.L74
+	b	.L75
 	.size	insert_free_list, .-insert_free_list
 	.section	.text.INSERT_FREE_LIST,"ax",@progbits
 	.align	2
@@ -738,7 +749,7 @@ INSERT_FREE_LIST:
 	adrp	x1, .LANCHOR5
 	ldrh	w1, [x1, #:lo12:.LANCHOR5]
 	cmp	w1, w0
-	bcs	.L80
+	bcs	.L81
 	ldp	x29, x30, [sp], 16
 	mov	w2, 207
 	adrp	x1, .LANCHOR49
@@ -746,7 +757,7 @@ INSERT_FREE_LIST:
 	add	x1, x1, :lo12:.LANCHOR49
 	add	x0, x0, :lo12:.LC1
 	b	printf
-.L80:
+.L81:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
@@ -770,26 +781,26 @@ List_remove_node:
 	add	x19, x23, x21
 	ldrh	w1, [x19, 2]
 	cmp	w1, w0
-	bne	.L84
+	bne	.L85
 	ldr	x0, [x22]
 	cmp	x19, x0
-	beq	.L84
+	beq	.L85
 	adrp	x1, .LANCHOR50
 	adrp	x0, .LC1
 	mov	w2, 372
 	add	x1, x1, :lo12:.LANCHOR50
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L84:
+.L85:
 	ldr	x0, [x22]
 	mov	w1, 65535
 	cmp	x19, x0
 	ldrh	w0, [x23, x21]
-	bne	.L85
-	cmp	w0, w1
 	bne	.L86
+	cmp	w0, w1
+	bne	.L87
 	str	xzr, [x22]
-.L87:
+.L88:
 	mov	w0, -1
 	strh	w0, [x23, x21]
 	strh	w0, [x19, 2]
@@ -799,27 +810,27 @@ List_remove_node:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L86:
+.L87:
 	ldr	x1, [x20, #:lo12:.LANCHOR40]
 	mov	w2, 6
 	umaddl	x0, w0, w2, x1
 	mov	w1, -1
 	str	x0, [x22]
 	strh	w1, [x0, 2]
-	b	.L87
-.L85:
+	b	.L88
+.L86:
 	cmp	w0, w1
 	ldrh	w1, [x19, 2]
-	bne	.L88
+	bne	.L89
 	cmp	w1, w0
-	beq	.L87
+	beq	.L88
 	mov	w0, 6
 	mov	w2, -1
 	umull	x1, w1, w0
 	ldr	x0, [x20, #:lo12:.LANCHOR40]
 	strh	w2, [x0, x1]
-	b	.L87
-.L88:
+	b	.L88
+.L89:
 	ldr	x2, [x20, #:lo12:.LANCHOR40]
 	mov	w3, 6
 	umaddl	x4, w0, w3, x2
@@ -827,7 +838,7 @@ List_remove_node:
 	ldrh	w1, [x19, 2]
 	umull	x1, w1, w3
 	strh	w0, [x2, x1]
-	b	.L87
+	b	.L88
 	.size	List_remove_node, .-List_remove_node
 	.section	.text.List_pop_index_node,"ax",@progbits
 	.align	2
@@ -835,7 +846,7 @@ List_remove_node:
 	.type	List_pop_index_node, %function
 List_pop_index_node:
 	ldr	x2, [x0]
-	cbz	x2, .L96
+	cbz	x2, .L97
 	stp	x29, x30, [sp, -32]!
 	adrp	x3, .LANCHOR40
 	and	w1, w1, 65535
@@ -844,9 +855,9 @@ List_pop_index_node:
 	str	x19, [sp, 16]
 	mov	w5, 6
 	ldr	x19, [x3, #:lo12:.LANCHOR40]
-.L92:
-	cbnz	w1, .L93
-.L95:
+.L93:
+	cbnz	w1, .L94
+.L96:
 	sub	x19, x2, x19
 	mov	x2, -6148914691236517206
 	asr	x19, x19, 1
@@ -859,15 +870,15 @@ List_pop_index_node:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L93:
+.L94:
 	ldrh	w3, [x2]
 	cmp	w3, w4
-	beq	.L95
+	beq	.L96
 	sub	w1, w1, #1
 	umaddl	x2, w3, w5, x19
 	and	w1, w1, 65535
-	b	.L92
-.L96:
+	b	.L93
+.L97:
 	mov	w0, 65535
 	ret
 	.size	List_pop_index_node, .-List_pop_index_node
@@ -887,26 +898,26 @@ List_get_gc_head_node:
 	and	w2, w0, 65535
 	adrp	x0, .LANCHOR41
 	ldr	x1, [x0, #:lo12:.LANCHOR41]
-	cbz	x1, .L107
+	cbz	x1, .L108
 	adrp	x0, .LANCHOR40
 	mov	w4, 6
 	ldr	x3, [x0, #:lo12:.LANCHOR40]
 	mov	w0, 65535
-.L104:
-	cbz	w2, .L105
+.L105:
+	cbz	w2, .L106
 	ldrh	w1, [x1]
 	cmp	w1, w0
-	bne	.L106
+	bne	.L107
 	ret
-.L106:
+.L107:
 	sub	w2, w2, #1
 	umaddl	x1, w1, w4, x3
 	and	w2, w2, 65535
-	b	.L104
-.L107:
+	b	.L105
+.L108:
 	mov	w0, 65535
 	ret
-.L105:
+.L106:
 	sub	x0, x1, x3
 	mov	x1, -6148914691236517206
 	asr	x0, x0, 1
@@ -930,15 +941,15 @@ List_update_data_list:
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	stp	x25, x26, [sp, 64]
 	cmp	w0, w19
-	beq	.L110
+	beq	.L111
 	adrp	x0, .LANCHOR52
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
-	beq	.L110
+	beq	.L111
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w19
-	beq	.L110
+	beq	.L111
 	adrp	x0, .LANCHOR40
 	mov	w21, 6
 	adrp	x24, .LANCHOR41
@@ -948,7 +959,7 @@ List_update_data_list:
 	ldr	x1, [x24, #:lo12:.LANCHOR41]
 	add	x22, x23, x21
 	cmp	x22, x1
-	beq	.L110
+	beq	.L111
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x19, 1, 16
 	mov	x25, x1
@@ -961,25 +972,25 @@ List_update_data_list:
 	ldrh	w0, [x22, 2]
 	csinv	w20, w20, wzr, ne
 	cmp	w0, w1
-	bne	.L113
+	bne	.L114
 	ldrh	w1, [x23, x21]
 	cmp	w1, w0
-	bne	.L113
+	bne	.L114
 	adrp	x1, .LANCHOR54
 	adrp	x0, .LC1
 	mov	w2, 463
 	add	x1, x1, :lo12:.LANCHOR54
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L113:
+.L114:
 	ldrh	w0, [x22, 2]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L114
+	bne	.L115
 	ldrh	w1, [x23, x21]
 	cmp	w1, w0
-	beq	.L110
-.L114:
+	beq	.L111
+.L115:
 	mov	w1, 6
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
@@ -995,26 +1006,26 @@ List_update_data_list:
 	mul	w0, w1, w2
 	csinv	w0, w0, wzr, ne
 	cmp	w20, w0
-	bcs	.L110
+	bcs	.L111
 	adrp	x20, .LANCHOR44
 	mov	w1, w19
 	add	x0, x24, :lo12:.LANCHOR41
 	bl	List_remove_node
 	ldrh	w0, [x20, #:lo12:.LANCHOR44]
-	cbnz	w0, .L116
+	cbnz	w0, .L117
 	adrp	x1, .LANCHOR54
 	adrp	x0, .LC1
 	mov	w2, 474
 	add	x1, x1, :lo12:.LANCHOR54
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L116:
+.L117:
 	ldrh	w0, [x20, #:lo12:.LANCHOR44]
 	sub	w0, w0, #1
 	strh	w0, [x20, #:lo12:.LANCHOR44]
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-.L110:
+.L111:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -1037,72 +1048,72 @@ select_l2p_ram_region:
 	adrp	x0, .LANCHOR55
 	str	x19, [sp, 16]
 	ldr	x0, [x0, #:lo12:.LANCHOR55]
-.L121:
+.L122:
 	and	w19, w1, 65535
 	cmp	w19, w2
-	bcc	.L123
+	bcc	.L124
 	add	x3, x0, 4
 	mov	w19, w2
 	mov	w5, -2147483648
 	mov	w1, 0
-.L124:
+.L125:
 	cmp	w1, w2
-	bne	.L126
+	bne	.L127
 	cmp	w19, w2
-	bcc	.L122
+	bcc	.L123
 	adrp	x1, .LANCHOR56
 	mov	w19, w2
 	mov	w3, -1
 	ldrh	w4, [x1, #:lo12:.LANCHOR56]
 	mov	w1, 0
-.L127:
+.L128:
 	cmp	w1, w2
-	bne	.L129
+	bne	.L130
 	cmp	w19, w1
-	bcc	.L122
+	bcc	.L123
 	mov	w2, 789
 	adrp	x1, .LANCHOR57
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR57
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	b	.L122
-.L123:
+	b	.L123
+.L124:
 	add	x1, x1, 1
 	add	x4, x0, x1, lsl 4
 	ldrh	w4, [x4, -16]
 	cmp	w4, w3
-	bne	.L121
-.L122:
+	bne	.L122
+.L123:
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L126:
+.L127:
 	ldr	w4, [x3]
-	tbnz	w4, #31, .L125
+	tbnz	w4, #31, .L126
 	cmp	w5, w4
-	bls	.L125
+	bls	.L126
 	mov	w5, w4
 	mov	w19, w1
-.L125:
+.L126:
 	add	w1, w1, 1
 	add	x3, x3, 16
 	and	w1, w1, 65535
-	b	.L124
-.L129:
+	b	.L125
+.L130:
 	ldr	w6, [x0, 4]
 	cmp	w3, w6
-	bls	.L128
+	bls	.L129
 	ldrh	w5, [x0]
 	cmp	w5, w4
 	csel	w3, w3, w6, eq
 	csel	w19, w19, w1, eq
-.L128:
+.L129:
 	add	w1, w1, 1
 	add	x0, x0, 16
 	and	w1, w1, 65535
-	b	.L127
+	b	.L128
 	.size	select_l2p_ram_region, .-select_l2p_ram_region
 	.section	.text.FtlUpdateVaildLpn,"ax",@progbits
 	.align	2
@@ -1113,12 +1124,12 @@ FtlUpdateVaildLpn:
 	mov	x3, x2
 	ldrh	w1, [x2, #:lo12:.LANCHOR58]
 	cmp	w1, 4
-	bhi	.L132
-	cbnz	w0, .L132
+	bhi	.L133
+	cbnz	w0, .L133
 	add	w1, w1, 1
 	strh	w1, [x2, #:lo12:.LANCHOR58]
 	ret
-.L132:
+.L133:
 	adrp	x1, .LANCHOR5
 	adrp	x0, .LANCHOR59
 	strh	wzr, [x3, #:lo12:.LANCHOR58]
@@ -1130,22 +1141,22 @@ FtlUpdateVaildLpn:
 	ldr	x6, [x1, #:lo12:.LANCHOR42]
 	mov	w7, 65535
 	mov	x1, 0
-.L133:
+.L134:
 	cmp	w5, w1, uxth
-	bhi	.L135
-	cbz	w3, .L131
+	bhi	.L136
+	cbz	w3, .L132
 	str	w2, [x0, #:lo12:.LANCHOR59]
-.L131:
+.L132:
 	ret
-.L135:
+.L136:
 	ldrh	w4, [x6, x1, lsl 1]
 	cmp	w4, w7
-	beq	.L134
+	beq	.L135
 	add	w2, w2, w4
 	mov	w3, 1
-.L134:
+.L135:
 	add	x1, x1, 1
-	b	.L133
+	b	.L134
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
 	.section	.text.ftl_set_blk_mode,"ax",@progbits
 	.align	2
@@ -1153,9 +1164,9 @@ FtlUpdateVaildLpn:
 	.type	ftl_set_blk_mode, %function
 ftl_set_blk_mode:
 	and	w0, w0, 65535
-	cbz	w1, .L142
+	cbz	w1, .L143
 	b	ftl_set_blk_mode.part.6
-.L142:
+.L143:
 	adrp	x1, .LANCHOR1
 	ubfx	x2, x0, 5, 11
 	lsl	x2, x2, 2
@@ -1195,9 +1206,9 @@ ftl_sb_update_avl_pages:
 	add	x4, x0, x4
 	ldrh	w3, [x1, #:lo12:.LANCHOR3]
 	mov	w1, 65535
-.L145:
+.L146:
 	cmp	w2, w3
-	bcc	.L147
+	bcc	.L148
 	adrp	x1, .LANCHOR19
 	ubfiz	x3, x3, 1, 16
 	add	x3, x3, 16
@@ -1208,32 +1219,32 @@ ftl_sb_update_avl_pages:
 	sub	w1, w1, #1
 	and	w1, w1, 65535
 	sub	w1, w1, w6
-.L148:
+.L149:
 	cmp	x2, x3
-	bne	.L150
+	bne	.L151
 	ret
-.L147:
+.L148:
 	ldrh	w5, [x4]
 	cmp	w5, w1
-	beq	.L146
+	beq	.L147
 	ldrh	w5, [x0, 4]
 	add	w5, w5, 1
 	strh	w5, [x0, 4]
-.L146:
+.L147:
 	add	w2, w2, 1
 	add	x4, x4, 2
 	and	w2, w2, 65535
-	b	.L145
-.L150:
+	b	.L146
+.L151:
 	ldrh	w4, [x2]
 	cmp	w4, w5
-	beq	.L149
+	beq	.L150
 	ldrh	w4, [x0, 4]
 	add	w4, w1, w4
 	strh	w4, [x0, 4]
-.L149:
+.L150:
 	add	x2, x2, 2
-	b	.L148
+	b	.L149
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
 	.section	.text.FtlSlcSuperblockCheck,"ax",@progbits
 	.align	2
@@ -1241,38 +1252,38 @@ ftl_sb_update_avl_pages:
 	.type	FtlSlcSuperblockCheck, %function
 FtlSlcSuperblockCheck:
 	ldrh	w1, [x0, 4]
-	cbz	w1, .L151
+	cbz	w1, .L152
 	ldrh	w2, [x0]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L151
+	beq	.L152
 	ldrb	w2, [x0, 6]
 	add	x2, x2, 8
 	ldrh	w3, [x0, x2, lsl 1]
 	adrp	x2, .LANCHOR3
 	ldrh	w4, [x2, #:lo12:.LANCHOR3]
 	mov	w2, w1
-.L154:
+.L155:
 	cmp	w3, w2
-	beq	.L156
-.L151:
+	beq	.L157
+.L152:
 	ret
-.L156:
+.L157:
 	ldrb	w1, [x0, 6]
 	add	w1, w1, 1
 	and	w1, w1, 255
 	strb	w1, [x0, 6]
 	cmp	w1, w4
-	bne	.L155
+	bne	.L156
 	ldrh	w1, [x0, 2]
 	strb	wzr, [x0, 6]
 	add	w1, w1, 1
 	strh	w1, [x0, 2]
-.L155:
+.L156:
 	ldrb	w1, [x0, 6]
 	add	x1, x1, 8
 	ldrh	w3, [x0, x1, lsl 1]
-	b	.L154
+	b	.L155
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
 	.section	.text.make_superblock,"ax",@progbits
 	.align	2
@@ -1287,14 +1298,14 @@ make_superblock:
 	adrp	x0, .LANCHOR5
 	ldrh	w0, [x0, #:lo12:.LANCHOR5]
 	cmp	w1, w0
-	bcc	.L158
+	bcc	.L159
 	adrp	x1, .LANCHOR60
 	adrp	x0, .LC1
 	mov	w2, 2148
 	add	x1, x1, :lo12:.LANCHOR60
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L158:
+.L159:
 	adrp	x0, .LANCHOR3
 	adrp	x7, .LANCHOR13
 	add	x6, x19, 16
@@ -1304,9 +1315,9 @@ make_superblock:
 	strh	wzr, [x19, 4]
 	mov	w10, -1
 	strb	wzr, [x19, 7]
-.L159:
+.L160:
 	cmp	w8, w5, uxth
-	bhi	.L161
+	bhi	.L162
 	adrp	x1, .LANCHOR19
 	ldrb	w0, [x19, 7]
 	strb	wzr, [x19, 9]
@@ -1319,30 +1330,30 @@ make_superblock:
 	ldrh	w1, [x0, x1, lsl 1]
 	mov	w0, 10000
 	cmp	w1, w0
-	bls	.L162
+	bls	.L163
 	mov	w0, 1
 	strb	w0, [x19, 9]
-.L162:
+.L163:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L161:
+.L162:
 	ldrh	w1, [x19]
 	ldrb	w0, [x7, x5]
 	bl	V2P_block
 	mov	w4, w0
 	strh	w10, [x6]
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L160
+	cbnz	w0, .L161
 	strh	w4, [x6]
 	ldrb	w0, [x19, 7]
 	add	w0, w0, 1
 	strb	w0, [x19, 7]
-.L160:
+.L161:
 	add	x5, x5, 1
 	add	x6, x6, 2
-	b	.L159
+	b	.L160
 	.size	make_superblock, .-make_superblock
 	.section	.text.update_multiplier_value,"ax",@progbits
 	.align	2
@@ -1359,11 +1370,11 @@ update_multiplier_value:
 	add	x8, x8, :lo12:.LANCHOR13
 	ldrh	w11, [x0, #:lo12:.LANCHOR19]
 	cmp	w10, w7, uxth
-	bhi	.L176
-	cbz	w5, .L174
+	bhi	.L177
+	cbz	w5, .L175
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.L175:
+.L176:
 	adrp	x0, .LANCHOR40
 	mov	w1, 6
 	ldr	x0, [x0, #:lo12:.LANCHOR40]
@@ -1371,31 +1382,31 @@ update_multiplier_value:
 	mov	w0, 0
 	strh	w5, [x6, 4]
 	ret
-.L169:
+.L170:
 	mov	w5, 0
-	b	.L168
-.L174:
+	b	.L169
+.L175:
 	mov	w5, 0
-	b	.L175
-.L176:
+	b	.L176
+.L177:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
-.L167:
+.L168:
 	ldrb	w0, [x8, x7]
 	mov	w1, w6
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L166
+	cbnz	w0, .L167
 	add	w5, w5, w11
 	and	w5, w5, 65535
-.L166:
+.L167:
 	add	x7, x7, 1
 	cmp	w10, w7, uxth
-	bhi	.L167
-	cbz	w5, .L169
+	bhi	.L168
+	cbz	w5, .L170
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.L168:
+.L169:
 	adrp	x0, .LANCHOR40
 	mov	w1, 6
 	ldr	x0, [x0, #:lo12:.LANCHOR40]
@@ -1412,7 +1423,7 @@ update_multiplier_value:
 GetFreeBlockMinEraseCount:
 	adrp	x0, .LANCHOR46
 	ldr	x0, [x0, #:lo12:.LANCHOR46]
-	cbz	x0, .L179
+	cbz	x0, .L180
 	adrp	x1, .LANCHOR40
 	ldr	x1, [x1, #:lo12:.LANCHOR40]
 	sub	x0, x0, x1
@@ -1425,7 +1436,7 @@ GetFreeBlockMinEraseCount:
 	and	x0, x0, 65535
 	ldrh	w0, [x1, x0, lsl 1]
 	ret
-.L179:
+.L180:
 	mov	w0, 0
 	ret
 	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
@@ -1437,7 +1448,7 @@ GetFreeBlockMaxEraseCount:
 	adrp	x1, .LANCHOR46
 	and	w0, w0, 65535
 	ldr	x1, [x1, #:lo12:.LANCHOR46]
-	cbz	x1, .L187
+	cbz	x1, .L188
 	adrp	x2, .LANCHOR48
 	mov	w3, 7
 	mov	w5, 6
@@ -1456,25 +1467,25 @@ GetFreeBlockMaxEraseCount:
 	mul	x1, x1, x2
 	mov	w2, 0
 	and	w1, w1, 65535
-.L183:
+.L184:
 	cmp	w0, w2
-	beq	.L186
+	beq	.L187
 	umull	x4, w1, w5
 	ldrh	w4, [x3, x4]
 	cmp	w4, w6
-	bne	.L184
-.L186:
+	bne	.L185
+.L187:
 	adrp	x0, .LANCHOR47
 	ubfiz	x1, x1, 1, 16
 	ldr	x0, [x0, #:lo12:.LANCHOR47]
 	ldrh	w0, [x0, x1]
 	ret
-.L184:
+.L185:
 	add	w2, w2, 1
 	mov	w1, w4
 	and	w2, w2, 65535
-	b	.L183
-.L187:
+	b	.L184
+.L188:
 	mov	w0, 0
 	ret
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
@@ -1486,7 +1497,7 @@ free_data_superblock:
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L191
+	beq	.L192
 	stp	x29, x30, [sp, -16]!
 	adrp	x2, .LANCHOR42
 	ubfiz	x1, x0, 1, 16
@@ -1497,7 +1508,7 @@ free_data_superblock:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L191:
+.L192:
 	mov	w0, 0
 	ret
 	.size	free_data_superblock, .-free_data_superblock
@@ -1514,35 +1525,35 @@ get_new_active_ppa:
 	mov	w0, 65535
 	str	x21, [sp, 32]
 	cmp	w1, w0
-	bne	.L195
+	bne	.L196
 	adrp	x1, .LANCHOR61
 	adrp	x0, .LC1
 	mov	w2, 2781
 	add	x1, x1, :lo12:.LANCHOR61
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L195:
+.L196:
 	adrp	x21, .LANCHOR19
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x21, #:lo12:.LANCHOR19]
 	cmp	w1, w0
-	bne	.L196
+	bne	.L197
 	adrp	x1, .LANCHOR61
 	adrp	x0, .LC1
 	mov	w2, 2782
 	add	x1, x1, :lo12:.LANCHOR61
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L196:
+.L197:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L197
+	cbnz	w0, .L198
 	adrp	x1, .LANCHOR61
 	adrp	x0, .LC1
 	mov	w2, 2783
 	add	x1, x1, :lo12:.LANCHOR61
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L197:
+.L198:
 	ldrb	w0, [x19, 6]
 	adrp	x1, .LANCHOR3
 	strb	wzr, [x19, 10]
@@ -1550,13 +1561,13 @@ get_new_active_ppa:
 	ldrh	w3, [x1, #:lo12:.LANCHOR3]
 	mov	w1, 65535
 	ldrh	w0, [x19, x0, lsl 1]
-.L198:
+.L199:
 	cmp	w0, w1
-	beq	.L200
+	beq	.L201
 	ldrh	w20, [x19, 2]
 	ldrh	w2, [x21, #:lo12:.LANCHOR19]
 	cmp	w20, w2
-	bcs	.L204
+	bcs	.L205
 	ldrh	w1, [x19, 4]
 	orr	w20, w20, w0, lsl 10
 	ldrb	w0, [x19, 6]
@@ -1564,56 +1575,56 @@ get_new_active_ppa:
 	sub	w1, w1, #1
 	and	w1, w1, 65535
 	strh	w1, [x19, 4]
-.L203:
+.L204:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	cmp	w3, w0
-	bne	.L202
+	bne	.L203
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
 	mov	w0, 0
-.L202:
+.L203:
 	add	x5, x19, x0, sxtw 1
 	ldrh	w5, [x5, 16]
 	cmp	w5, w4
-	beq	.L203
+	beq	.L204
 	strb	w0, [x19, 6]
 	ldrh	w0, [x19, 2]
 	cmp	w0, w2
-	bne	.L194
-	cbz	w1, .L194
+	bne	.L195
+	cbz	w1, .L195
 	adrp	x1, .LANCHOR61
 	adrp	x0, .LC1
 	mov	w2, 2806
 	add	x1, x1, :lo12:.LANCHOR61
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L194:
+.L195:
 	mov	w0, w20
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L200:
+.L201:
 	ldrb	w0, [x19, 6]
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x19, 6]
 	cmp	w0, w3
-	bne	.L199
+	bne	.L200
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L199:
+.L200:
 	ldrb	w0, [x19, 6]
 	add	x0, x0, 8
 	ldrh	w0, [x19, x0, lsl 1]
-	b	.L198
-.L204:
+	b	.L199
+.L205:
 	mov	w20, 65535
-	b	.L194
+	b	.L195
 	.size	get_new_active_ppa, .-get_new_active_ppa
 	.section	.text.FtlGcBufInit,"ax",@progbits
 	.align	2
@@ -1644,21 +1655,21 @@ FtlGcBufInit:
 	add	x4, x4, 8
 	mov	w1, 0
 	mov	w16, 1
-.L211:
+.L212:
 	add	w13, w2, w10
 	add	w12, w1, w11
 	cmp	x3, x8
-	bne	.L212
+	bne	.L213
 	adrp	x1, .LANCHOR67
 	ldr	x7, [x7, #:lo12:.LANCHOR64]
 	ldr	x6, [x6, #:lo12:.LANCHOR65]
 	mov	w8, 24
 	ldr	w4, [x1, #:lo12:.LANCHOR67]
-.L213:
+.L214:
 	cmp	w0, w4
-	bcc	.L214
+	bcc	.L215
 	ret
-.L212:
+.L213:
 	asr	w2, w2, 2
 	asr	w1, w1, 2
 	add	x2, x14, x2, sxtw 2
@@ -1670,8 +1681,8 @@ FtlGcBufInit:
 	add	x4, x4, 32
 	mov	w1, w12
 	mov	w2, w13
-	b	.L211
-.L214:
+	b	.L212
+.L215:
 	umull	x3, w0, w8
 	mul	w1, w10, w0
 	add	x2, x5, x3
@@ -1685,7 +1696,7 @@ FtlGcBufInit:
 	asr	w1, w1, 2
 	add	x1, x6, x1, sxtw 2
 	str	x1, [x2, 8]
-	b	.L213
+	b	.L214
 	.size	FtlGcBufInit, .-FtlGcBufInit
 	.section	.text.FtlGcBufFree,"ax",@progbits
 	.align	2
@@ -1698,31 +1709,31 @@ FtlGcBufFree:
 	ldr	w7, [x2, #:lo12:.LANCHOR67]
 	adrp	x2, .LANCHOR63
 	ldr	x5, [x2, #:lo12:.LANCHOR63]
-.L216:
+.L217:
 	cmp	w3, w1
-	bcs	.L215
+	bcs	.L216
 	ubfiz	x4, x3, 5, 16
 	mov	w2, 0
 	add	x4, x0, x4
-	b	.L221
-.L217:
+	b	.L222
+.L218:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-.L221:
+.L222:
 	cmp	w2, w7
-	bcs	.L218
+	bcs	.L219
 	umull	x6, w2, w8
 	add	x10, x5, x6
 	ldr	x11, [x5, x6]
 	ldr	x6, [x4, 8]
 	cmp	x11, x6
-	bne	.L217
+	bne	.L218
 	str	wzr, [x10, 16]
-.L218:
+.L219:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L216
-.L215:
+	b	.L217
+.L216:
 	ret
 	.size	FtlGcBufFree, .-FtlGcBufFree
 	.section	.text.FtlGcBufAlloc,"ax",@progbits
@@ -1737,31 +1748,31 @@ FtlGcBufAlloc:
 	ldr	w5, [x2, #:lo12:.LANCHOR67]
 	adrp	x2, .LANCHOR63
 	ldr	x6, [x2, #:lo12:.LANCHOR63]
-.L223:
+.L224:
 	cmp	w3, w1
-	bcs	.L222
+	bcs	.L223
 	mov	w2, 0
-	b	.L228
-.L224:
+	b	.L229
+.L225:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-.L228:
+.L229:
 	cmp	w2, w5
-	bcs	.L225
+	bcs	.L226
 	umaddl	x4, w2, w7, x6
 	ldr	w10, [x4, 16]
-	cbnz	w10, .L224
+	cbnz	w10, .L225
 	ubfiz	x2, x3, 5, 16
 	ldr	x10, [x4]
 	add	x2, x0, x2
 	str	w8, [x4, 16]
 	ldr	x4, [x4, 8]
 	stp	x10, x4, [x2, 8]
-.L225:
+.L226:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L223
-.L222:
+	b	.L224
+.L223:
 	ret
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
 	.section	.text.IsBlkInGcList,"ax",@progbits
@@ -1775,17 +1786,17 @@ IsBlkInGcList:
 	adrp	x1, .LANCHOR69
 	ldr	x3, [x1, #:lo12:.LANCHOR69]
 	mov	x1, 0
-.L230:
+.L231:
 	cmp	w2, w1, uxth
-	bhi	.L232
+	bhi	.L233
 	mov	w0, 0
 	ret
-.L232:
+.L233:
 	add	x1, x1, 1
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w0
-	bne	.L230
+	bne	.L231
 	mov	w0, 1
 	ret
 	.size	IsBlkInGcList, .-IsBlkInGcList
@@ -1807,24 +1818,24 @@ FtlGcUpdatePage:
 	mov	x3, 0
 	ldrh	w1, [x4, #:lo12:.LANCHOR68]
 	ldr	x5, [x2, #:lo12:.LANCHOR69]
-.L235:
+.L236:
 	and	w2, w3, 65535
 	cmp	w2, w1
-	bcc	.L237
-	bne	.L236
+	bcc	.L238
+	bne	.L237
 	and	x3, x3, 65535
 	strh	w0, [x5, x3, lsl 1]
 	ldrh	w0, [x4, #:lo12:.LANCHOR68]
 	add	w0, w0, 1
 	strh	w0, [x4, #:lo12:.LANCHOR68]
-	b	.L236
-.L237:
+	b	.L237
+.L238:
 	add	x3, x3, 1
 	add	x2, x5, x3, lsl 1
 	ldrh	w2, [x2, -2]
 	cmp	w2, w7
-	bne	.L235
-.L236:
+	bne	.L236
+.L237:
 	adrp	x4, .LANCHOR70
 	adrp	x1, .LANCHOR71
 	mov	w3, 12
@@ -1848,23 +1859,23 @@ FtlGcRefreshBlock:
 	and	w0, w0, 65535
 	ldrh	w5, [x4, #:lo12:.LANCHOR72]
 	cmp	w5, w0
-	beq	.L240
+	beq	.L241
 	adrp	x1, .LANCHOR73
 	ldrh	w3, [x1, #:lo12:.LANCHOR73]
 	cmp	w0, w3
-	beq	.L240
+	beq	.L241
 	mov	w2, 65535
 	cmp	w5, w2
-	bne	.L241
+	bne	.L242
 	strh	w0, [x4, #:lo12:.LANCHOR72]
-.L240:
+.L241:
 	mov	w0, 0
 	ret
-.L241:
+.L242:
 	cmp	w3, w2
-	bne	.L240
+	bne	.L241
 	strh	w0, [x1, #:lo12:.LANCHOR73]
-	b	.L240
+	b	.L241
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
 	.section	.text.FtlGcMarkBadPhyBlk,"ax",@progbits
 	.align	2
@@ -1882,24 +1893,24 @@ FtlGcMarkBadPhyBlk:
 	add	x3, x3, :lo12:.LANCHOR75
 	mov	x2, 0
 	ldrh	w0, [x1, #:lo12:.LANCHOR74]
-.L243:
+.L244:
 	cmp	w0, w2, uxth
-	bhi	.L245
+	bhi	.L246
 	cmp	w0, 15
-	bhi	.L244
+	bhi	.L245
 	add	w2, w0, 1
 	strh	w2, [x1, #:lo12:.LANCHOR74]
 	adrp	x1, .LANCHOR75
 	add	x1, x1, :lo12:.LANCHOR75
 	strh	w6, [x1, w0, sxtw 1]
-	b	.L244
-.L245:
+	b	.L245
+.L246:
 	add	x2, x2, 1
 	add	x4, x3, x2, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w6
-	bne	.L243
-.L244:
+	bne	.L244
+.L245:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
@@ -1911,20 +1922,20 @@ FtlGcMarkBadPhyBlk:
 FtlGcReFreshBadBlk:
 	adrp	x0, .LANCHOR74
 	ldrh	w0, [x0, #:lo12:.LANCHOR74]
-	cbz	w0, .L254
+	cbz	w0, .L255
 	adrp	x1, .LANCHOR72
 	ldrh	w2, [x1, #:lo12:.LANCHOR72]
 	mov	w1, 65535
 	cmp	w2, w1
-	bne	.L254
+	bne	.L255
 	stp	x29, x30, [sp, -16]!
 	adrp	x6, .LANCHOR76
 	add	x29, sp, 0
 	ldrh	w1, [x6, #:lo12:.LANCHOR76]
 	cmp	w1, w0
-	bcc	.L249
+	bcc	.L250
 	strh	wzr, [x6, #:lo12:.LANCHOR76]
-.L249:
+.L250:
 	ldrh	w1, [x6, #:lo12:.LANCHOR76]
 	adrp	x0, .LANCHOR75
 	add	x0, x0, :lo12:.LANCHOR75
@@ -1937,7 +1948,7 @@ FtlGcReFreshBadBlk:
 	strh	w0, [x6, #:lo12:.LANCHOR76]
 	mov	w0, 0
 	ret
-.L254:
+.L255:
 	mov	w0, 0
 	ret
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
@@ -1981,9 +1992,9 @@ rknand_print_hex:
 	mov	x19, 0
 	mov	w20, 0
 	adrp	x26, .LC3
-.L260:
+.L261:
 	cmp	w27, w19
-	bhi	.L266
+	bhi	.L267
 	ldp	x19, x20, [sp, 16]
 	adrp	x0, .LC5
 	ldp	x21, x22, [sp, 32]
@@ -1993,40 +2004,40 @@ rknand_print_hex:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	printf
-.L266:
-	cbnz	w20, .L261
+.L267:
+	cbnz	w20, .L262
 	mov	w2, w21
 	mov	x1, x28
 	mov	x0, x24
 	bl	printf
-.L261:
+.L262:
 	cmp	w23, 4
-	bne	.L262
+	bne	.L263
 	ldr	w1, [x22, x19, lsl 2]
-.L269:
+.L270:
 	add	x0, x26, :lo12:.LC3
-.L268:
+.L269:
 	bl	printf
 	add	w20, w20, 1
 	cmp	w20, 15
-	bls	.L265
+	bls	.L266
 	mov	w20, 0
 	adrp	x0, .LC5
 	add	x0, x0, :lo12:.LC5
 	bl	printf
-.L265:
+.L266:
 	add	x19, x19, 1
 	add	w21, w21, w23
-	b	.L260
-.L262:
+	b	.L261
+.L263:
 	cmp	w23, 2
-	bne	.L264
+	bne	.L265
 	ldrh	w1, [x22, x19, lsl 1]
-	b	.L269
-.L264:
+	b	.L270
+.L265:
 	ldrb	w1, [x22, x19]
 	mov	x0, x25
-	b	.L268
+	b	.L269
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.FlashEraseBlocks,"ax",@progbits
 	.align	2
@@ -2052,18 +2063,18 @@ FlashEraseBlocks:
 	lsl	w26, w24, 3
 	mov	x22, x0
 	add	x27, x25, :lo12:.LANCHOR78
-.L271:
+.L272:
 	cmp	x19, x23
-	beq	.L285
+	beq	.L286
 	ldr	w0, [x19]
 	add	x2, x29, 104
 	add	x1, x29, 108
 	bl	l2p_addr_tran.isra.0
 	ldr	w0, [x29, 104]
-	cbnz	w0, .L272
+	cbnz	w0, .L273
 	ldr	w1, [x29, 108]
 	cmp	w26, w1
-	bls	.L272
+	bls	.L273
 	mov	x19, x20
 	add	x21, x20, x21
 	adrp	x22, .LC6
@@ -2071,10 +2082,10 @@ FlashEraseBlocks:
 	add	x22, x22, :lo12:.LC6
 	add	x20, x20, :lo12:.LANCHOR77
 	mov	w23, -1
-.L273:
+.L274:
 	cmp	x19, x21
-	bne	.L274
-.L285:
+	bne	.L275
+.L286:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -2083,7 +2094,7 @@ FlashEraseBlocks:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L274:
+.L275:
 	ldr	w2, [x29, 108]
 	mov	x1, x20
 	str	w23, [x19]
@@ -2102,34 +2113,34 @@ FlashEraseBlocks:
 	mov	w2, w3
 	add	x0, x0, :lo12:.LC8
 	bl	rknand_print_hex
-	b	.L273
-.L272:
+	b	.L274
+.L273:
 	add	x1, x25, :lo12:.LANCHOR78
 	ldr	x2, [x1, 8]
 	ldr	w1, [x29, 108]
 	blr	x2
-	cbnz	w0, .L275
+	cbnz	w0, .L276
 	str	wzr, [x19, -4]
-.L276:
+.L277:
 	add	x0, x22, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
-	bne	.L278
+	bne	.L279
 	ldrb	w0, [x29, 104]
 	ldr	x2, [x27, 8]
 	ldr	w1, [x29, 108]
 	add	w1, w24, w1
 	blr	x2
-	cbz	w0, .L278
+	cbz	w0, .L279
 	mov	w0, -1
 	str	w0, [x19, -4]
-.L278:
+.L279:
 	add	x19, x19, 32
-	b	.L271
-.L275:
+	b	.L272
+.L276:
 	mov	w0, -1
 	str	w0, [x19, -4]
-	b	.L276
+	b	.L277
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
 	.section	.text.FtlFreeSysBlkQueueIn,"ax",@progbits
 	.align	2
@@ -2144,15 +2155,15 @@ FtlFreeSysBlkQueueIn:
 	sub	w2, w20, #1
 	mov	w0, 65533
 	cmp	w0, w2, uxth
-	bcc	.L287
+	bcc	.L288
 	adrp	x0, .LANCHOR38
 	add	x2, x0, :lo12:.LANCHOR38
 	mov	x19, x0
 	ldrh	w2, [x2, 6]
 	cmp	w2, 1024
-	beq	.L287
+	beq	.L288
 	and	w1, w1, 65535
-	cbz	w1, .L289
+	cbz	w1, .L290
 	mov	w0, w20
 	bl	P2V_block_in_plane
 	and	w21, w0, 65535
@@ -2173,7 +2184,7 @@ FtlFreeSysBlkQueueIn:
 	ldr	w0, [x1, #:lo12:.LANCHOR80]
 	add	w0, w0, 1
 	str	w0, [x1, #:lo12:.LANCHOR80]
-.L289:
+.L290:
 	add	x0, x19, :lo12:.LANCHOR38
 	ldrh	w1, [x0, 6]
 	add	w1, w1, 1
@@ -2184,7 +2195,7 @@ FtlFreeSysBlkQueueIn:
 	and	w1, w1, 1023
 	strh	w1, [x0, 4]
 	strh	w20, [x2, 8]
-.L287:
+.L288:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -2202,7 +2213,7 @@ FtlFreeSysBlkQueueOut:
 	ldrh	w2, [x1, 6]
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	cbz	w2, .L301
+	cbz	w2, .L302
 	ldrh	w0, [x1, 2]
 	sub	w2, w2, #1
 	strh	w2, [x1, 6]
@@ -2222,23 +2233,23 @@ FtlFreeSysBlkQueueOut:
 	ldr	w0, [x1, #:lo12:.LANCHOR80]
 	add	w0, w0, 1
 	str	w0, [x1, #:lo12:.LANCHOR80]
-.L298:
+.L299:
 	sub	w0, w20, #1
 	mov	w1, 65533
 	cmp	w1, w0, uxth
-	bcs	.L299
+	bcs	.L300
 	add	x0, x19, :lo12:.LANCHOR38
 	mov	w1, w20
 	ldrh	w2, [x0, 6]
 	adrp	x0, .LC9
 	add	x0, x0, :lo12:.LC9
 	bl	printf
-.L300:
-	b	.L300
 .L301:
+	b	.L301
+.L302:
 	mov	w20, 65535
-	b	.L298
-.L299:
+	b	.L299
+.L300:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -2257,27 +2268,27 @@ ftl_map_blk_alloc_new_blk:
 	mov	w20, 0
 	ldr	x0, [x0, 16]
 	str	x21, [sp, 32]
-.L304:
+.L305:
 	cmp	w20, w1
-	beq	.L308
+	beq	.L309
 	mov	x21, x0
 	ldrh	w2, [x0], 2
-	cbnz	w2, .L305
+	cbnz	w2, .L306
 	bl	FtlFreeSysBlkQueueOut
 	and	w1, w0, 65535
 	strh	w0, [x21]
 	sub	w2, w1, #1
 	mov	w0, 65533
 	cmp	w0, w2, uxth
-	bcs	.L306
+	bcs	.L307
 	adrp	x0, .LANCHOR38+6
 	ldrh	w2, [x0, #:lo12:.LANCHOR38+6]
 	adrp	x0, .LC10
 	add	x0, x0, :lo12:.LC10
 	bl	printf
+.L308:
+	b	.L308
 .L307:
-	b	.L307
-.L306:
 	ldr	w0, [x19, 48]
 	strh	wzr, [x19, 2]
 	add	w0, w0, 1
@@ -2286,26 +2297,26 @@ ftl_map_blk_alloc_new_blk:
 	strh	w20, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
-.L308:
+.L309:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L310
+	bhi	.L311
 	adrp	x1, .LANCHOR81
 	adrp	x0, .LC1
 	mov	w2, 578
 	add	x1, x1, :lo12:.LANCHOR81
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L310:
+.L311:
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L305:
+.L306:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L304
+	b	.L305
 	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
 	.section	.text.ftl_memset,"ax",@progbits
 	.align	2
@@ -2603,36 +2614,36 @@ FtlMemInit:
 	mov	w3, w5
 	str	x0, [x2, 32]
 	mov	x0, 1
-.L314:
+.L315:
 	cmp	w0, w7
-	bcc	.L315
+	bcc	.L316
 	mov	w2, 8
 	sub	w2, w2, w0
 	add	x2, x2, 1
 	add	x1, x1, :lo12:.LANCHOR37
 	mov	x3, 0
-.L316:
+.L317:
 	add	x3, x3, 1
 	cmp	x2, x3
-	bne	.L317
+	bne	.L318
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L315:
+.L316:
 	ldr	x4, [x2, 32]
 	add	w0, w0, 1
 	add	x4, x4, x3, uxtw 2
 	add	w3, w3, w5
 	str	x4, [x6], 8
-	b	.L314
-.L317:
+	b	.L315
+.L318:
 	add	x4, x0, x3
 	add	x4, x1, x4, lsl 3
 	str	xzr, [x4, 24]
-	b	.L316
+	b	.L317
 	.size	FtlMemInit, .-FtlMemInit
 	.section	.text.FtlBbt2Bitmap,"ax",@progbits
 	.align	2
@@ -2658,19 +2669,19 @@ FtlBbt2Bitmap:
 	mov	w1, 0
 	mov	x0, x20
 	bl	ftl_memset
-.L322:
+.L323:
 	ldrh	w0, [x22, x19]
 	cmp	w0, w24
-	beq	.L319
+	beq	.L320
 	ldrh	w1, [x21]
 	cmp	w1, w0
-	bhi	.L321
+	bhi	.L322
 	adrp	x0, .LC1
 	mov	w2, 74
 	mov	x1, x23
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L321:
+.L322:
 	ldrh	w2, [x22, x19]
 	mov	w1, 1
 	add	x19, x19, 2
@@ -2681,8 +2692,8 @@ FtlBbt2Bitmap:
 	ldr	w1, [x20, x0]
 	orr	w1, w1, w2
 	str	w1, [x20, x0]
-	bne	.L322
-.L319:
+	bne	.L323
+.L320:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -2745,10 +2756,10 @@ ftl_free_no_use_map_blk:
 	str	x25, [sp, 64]
 	bl	ftl_memset
 	mov	w0, 0
-.L330:
+.L331:
 	ldrh	w1, [x19, 6]
 	cmp	w1, w0
-	bhi	.L334
+	bhi	.L335
 	adrp	x0, .LANCHOR20
 	mov	w23, 0
 	mov	w20, 0
@@ -2756,10 +2767,10 @@ ftl_free_no_use_map_blk:
 	ldrh	w0, [x19]
 	strh	w1, [x21, x0, lsl 1]
 	ldrh	w24, [x21]
-.L335:
+.L336:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L339
+	bhi	.L340
 	mov	w0, w23
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -2767,64 +2778,64 @@ ftl_free_no_use_map_blk:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L334:
+.L335:
 	ubfiz	x1, x0, 2, 16
 	ldr	w2, [x20, x1]
 	mov	w1, 0
 	ubfx	x2, x2, 10, 16
-.L331:
+.L332:
 	ldrh	w3, [x19, 10]
 	cmp	w3, w1
-	bhi	.L333
+	bhi	.L334
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L330
-.L333:
+	b	.L331
+.L334:
 	ubfiz	x3, x1, 1, 16
 	ldrh	w4, [x22, x3]
 	cmp	w4, w2
-	bne	.L332
-	cbz	w2, .L332
+	bne	.L333
+	cbz	w2, .L333
 	ldrh	w4, [x21, x3]
 	add	w4, w4, 1
 	strh	w4, [x21, x3]
-.L332:
+.L333:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L331
-.L339:
+	b	.L332
+.L340:
 	ubfiz	x0, x20, 1, 16
 	ldrh	w1, [x21, x0]
 	cmp	w24, w1
-	bls	.L336
+	bls	.L337
 	add	x25, x22, x0
 	ldrh	w0, [x22, x0]
-	cbnz	w0, .L337
-.L338:
+	cbnz	w0, .L338
+.L339:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L335
-.L336:
-	cbnz	w1, .L338
+	b	.L336
+.L337:
+	cbnz	w1, .L339
 	add	x25, x22, x0
 	ldrh	w0, [x22, x0]
-	cbz	w0, .L338
-.L340:
+	cbz	w0, .L339
+.L341:
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
 	strh	wzr, [x25]
 	ldrh	w0, [x19, 8]
 	sub	w0, w0, #1
 	strh	w0, [x19, 8]
-	b	.L338
-.L341:
+	b	.L339
+.L342:
 	mov	w24, 0
-	b	.L340
-.L337:
+	b	.L341
+.L338:
 	mov	w23, w20
-	cbz	w1, .L341
+	cbz	w1, .L342
 	mov	w24, w1
-	b	.L338
+	b	.L339
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.section	.text.FtlL2PDataInit,"ax",@progbits
 	.align	2
@@ -2860,10 +2871,10 @@ FtlL2PDataInit:
 	mov	w2, -1
 	ldrh	w5, [x22, #:lo12:.LANCHOR23]
 	add	x3, x0, x3, lsl 4
-.L351:
+.L352:
 	add	x4, x1, x5
 	cmp	x0, x3
-	bne	.L352
+	bne	.L353
 	adrp	x1, .LANCHOR129
 	add	x0, x1, :lo12:.LANCHOR129
 	ldp	x21, x22, [sp, 32]
@@ -2894,7 +2905,7 @@ FtlL2PDataInit:
 	str	x1, [x0, 40]
 	ldp	x29, x30, [sp], 64
 	ret
-.L352:
+.L353:
 	and	x1, x1, -4
 	strh	w2, [x0]
 	add	x1, x6, x1
@@ -2902,7 +2913,7 @@ FtlL2PDataInit:
 	str	x1, [x0, 8]
 	add	x0, x0, 16
 	mov	x1, x4
-	b	.L351
+	b	.L352
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
 	.section	.text.FtlVariablesInit,"ax",@progbits
 	.align	2
@@ -2999,33 +3010,33 @@ SupperBlkListInit:
 	str	xzr, [x0, #:lo12:.LANCHOR41]
 	adrp	x0, .LANCHOR43
 	str	xzr, [x0, #:lo12:.LANCHOR43]
-.L357:
+.L358:
 	ldrh	w0, [x25]
 	cmp	w19, w0
-	bcs	.L364
+	bcs	.L365
 	adrp	x0, .LANCHOR19
 	ldrh	w8, [x27, #:lo12:.LANCHOR3]
 	mov	x6, 0
 	mov	w5, 0
 	ldrh	w7, [x0, #:lo12:.LANCHOR19]
-	b	.L365
-.L359:
+	b	.L366
+.L360:
 	ldrb	w0, [x26, x6]
 	mov	w1, w19
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L358
+	cbnz	w0, .L359
 	add	w5, w5, w7
 	and	w5, w5, 65535
-.L358:
+.L359:
 	add	x6, x6, 1
-.L365:
+.L366:
 	cmp	w8, w6, uxth
-	bhi	.L359
-	cbz	w5, .L360
+	bhi	.L360
+	cbz	w5, .L361
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.L361:
+.L362:
 	ldr	x1, [x24, #:lo12:.LANCHOR40]
 	mov	w0, 6
 	umaddl	x0, w19, w0, x1
@@ -3033,54 +3044,54 @@ SupperBlkListInit:
 	adrp	x0, .LANCHOR51
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w19
-	beq	.L362
+	beq	.L363
 	adrp	x0, .LANCHOR52
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
-	beq	.L362
+	beq	.L363
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w19
-	beq	.L362
+	beq	.L363
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x19, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x0]
-	cbnz	w0, .L363
+	cbnz	w0, .L364
 	add	w21, w21, 1
 	mov	w0, w19
 	and	w21, w21, 65535
 	bl	INSERT_FREE_LIST
-.L362:
+.L363:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L357
-.L360:
+	b	.L358
+.L361:
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x19, 1, 16
 	mov	w2, -1
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	strh	w2, [x1, x0]
-	b	.L361
-.L363:
+	b	.L362
+.L364:
 	add	w20, w20, 1
 	mov	w0, w19
 	and	w20, w20, 65535
 	bl	INSERT_DATA_LIST
-	b	.L362
-.L364:
+	b	.L363
+.L365:
 	strh	w20, [x23, #:lo12:.LANCHOR44]
 	add	w20, w20, w21
 	strh	w21, [x22, #:lo12:.LANCHOR48]
 	cmp	w20, w0
-	ble	.L366
+	ble	.L367
 	adrp	x1, .LANCHOR136
 	adrp	x0, .LC1
 	mov	w2, 2210
 	add	x1, x1, :lo12:.LANCHOR136
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L366:
+.L367:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -3140,31 +3151,31 @@ FlashGetBadBlockList:
 	blr	x2
 	and	w0, w0, 65535
 	cmp	w0, 50
-	bls	.L371
+	bls	.L372
 	mov	w2, 256
 	mov	w1, 255
 	mov	x0, x19
 	bl	ftl_memset
 	mov	w0, 0
-.L371:
+.L372:
 	adrp	x1, .LANCHOR0+14
 	ldrh	w1, [x1, #:lo12:.LANCHOR0+14]
 	cmp	w1, 4
-	bne	.L375
+	bne	.L376
 	mov	x1, 0
-.L373:
+.L374:
 	cmp	w0, w1, uxth
-	bhi	.L374
-.L375:
+	bhi	.L375
+.L376:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L374:
+.L375:
 	ldrh	w2, [x19, x1, lsl 1]
 	lsr	w2, w2, 1
 	strh	w2, [x19, x1, lsl 1]
 	add	x1, x1, 1
-	b	.L373
+	b	.L374
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
 	.section	.text.ftl_memcpy,"ax",@progbits
 	.align	2
@@ -3196,9 +3207,9 @@ FlashReadPages:
 	add	x24, x24, :lo12:.LANCHOR137
 	adrp	x25, .LC1
 	add	x25, x25, :lo12:.LC1
-.L379:
+.L380:
 	cmp	x23, x19
-	bne	.L392
+	bne	.L393
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -3207,36 +3218,36 @@ FlashReadPages:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L392:
+.L393:
 	ldr	x0, [x19, 8]
-	cbz	x0, .L380
+	cbz	x0, .L381
 	ldr	x0, [x19, 16]
-	cbnz	x0, .L381
-.L380:
+	cbnz	x0, .L382
+.L381:
 	mov	w2, 90
 	mov	x1, x24
 	mov	x0, x25
 	bl	printf
-.L381:
+.L382:
 	ldr	w0, [x19, 4]
 	add	x2, x29, 104
 	add	x1, x29, 108
 	bl	l2p_addr_tran.isra.0
 	ldr	w0, [x29, 104]
 	cmp	w0, 3
-	bls	.L382
+	bls	.L383
 	mov	w0, -1
 	str	w0, [x19]
-.L383:
+.L384:
 	add	x19, x19, 32
-	b	.L379
-.L382:
+	b	.L380
+.L383:
 	ldr	x20, [x19, 8]
 	adrp	x26, .LANCHOR111
 	tst	x20, 63
-	beq	.L384
+	beq	.L385
 	ldr	x20, [x26, #:lo12:.LANCHOR111]
-.L384:
+.L385:
 	adrp	x22, .LANCHOR78
 	add	x22, x22, :lo12:.LANCHOR78
 	ldr	w1, [x29, 108]
@@ -3248,7 +3259,7 @@ FlashReadPages:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
-	bne	.L386
+	bne	.L387
 	ldrb	w0, [x29, 104]
 	add	x2, x20, 2048
 	ldr	x4, [x22, 24]
@@ -3258,65 +3269,65 @@ FlashReadPages:
 	add	x3, x3, 8
 	blr	x4
 	cmn	w0, #1
-	beq	.L387
+	beq	.L388
 	ldr	x1, [x19, 16]
 	ldr	w2, [x1, 12]
 	cmn	w2, #1
-	bne	.L388
+	bne	.L389
 	ldr	w2, [x1, 8]
 	cmn	w2, #1
-	bne	.L388
+	bne	.L389
 	ldr	w1, [x1]
 	cmn	w1, #1
-	beq	.L388
-.L387:
+	beq	.L389
+.L388:
 	mov	w1, -1
 	str	w1, [x19]
-.L388:
+.L389:
 	ldr	w1, [x19]
 	cmn	w1, #1
-	beq	.L389
+	beq	.L390
 	cmp	w0, 256
-	bne	.L389
+	bne	.L390
 	str	w0, [x19]
-.L389:
+.L390:
 	ldr	w3, [x19]
 	cmp	w3, 256
 	ccmn	w3, #1, 4, ne
-	bne	.L386
+	bne	.L387
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC11
 	ldr	w2, [x29, 108]
 	add	x0, x0, :lo12:.LC11
 	bl	printf
 	ldr	x1, [x19, 8]
-	cbz	x1, .L391
+	cbz	x1, .L392
 	mov	w3, 4
 	adrp	x0, .LC12
 	mov	w2, w3
 	add	x0, x0, :lo12:.LC12
 	bl	rknand_print_hex
-.L391:
+.L392:
 	ldr	x1, [x19, 16]
-	cbz	x1, .L386
+	cbz	x1, .L387
 	mov	w3, 4
 	adrp	x0, .LC13
 	mov	w2, w3
 	add	x0, x0, :lo12:.LC13
 	bl	rknand_print_hex
-.L386:
+.L387:
 	ldr	x0, [x26, #:lo12:.LANCHOR111]
 	cmp	x20, x0
-	bne	.L383
+	bne	.L384
 	ldr	x0, [x19, 8]
 	cmp	x20, x0
-	beq	.L383
+	beq	.L384
 	adrp	x1, .LANCHOR12
 	ldrh	w2, [x1, #:lo12:.LANCHOR12]
 	mov	x1, x20
 	lsl	w2, w2, 9
 	bl	ftl_memcpy
-	b	.L383
+	b	.L384
 	.size	FlashReadPages, .-FlashReadPages
 	.section	.text.FtlLoadFactoryBbt,"ax",@progbits
 	.align	2
@@ -3348,10 +3359,10 @@ FtlLoadFactoryBbt:
 	mov	w21, 0
 	mov	w27, -1
 	str	x25, [x1, 16]
-.L419:
+.L420:
 	ldrh	w0, [x23]
 	cmp	w21, w0
-	bcc	.L424
+	bcc	.L425
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -3360,18 +3371,18 @@ FtlLoadFactoryBbt:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L424:
+.L425:
 	ldrh	w19, [x26, #:lo12:.LANCHOR17]
 	add	x24, x22, :lo12:.LANCHOR138
 	strh	w27, [x20]
 	mov	w3, 61664
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L420:
+.L421:
 	ldrh	w0, [x28]
 	sub	w1, w0, #15
 	cmp	w1, w19
-	bgt	.L422
+	bgt	.L423
 	madd	w0, w0, w21, w19
 	mov	w2, 1
 	str	w3, [x29, 108]
@@ -3383,19 +3394,19 @@ FtlLoadFactoryBbt:
 	ldr	w0, [x24]
 	ldr	w3, [x29, 108]
 	cmn	w0, #1
-	beq	.L421
+	beq	.L422
 	ldrh	w0, [x25]
 	cmp	w0, w3
-	bne	.L421
+	bne	.L422
 	strh	w19, [x20]
-.L422:
+.L423:
 	add	w21, w21, 1
 	add	x20, x20, 2
-	b	.L419
-.L421:
+	b	.L420
+.L422:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L420
+	b	.L421
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
 	.section	.text.FtlGetLastWrittenPage,"ax",@progbits
 	.align	2
@@ -3409,10 +3420,10 @@ FtlGetLastWrittenPage:
 	mov	w23, w1
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	bne	.L430
+	bne	.L431
 	adrp	x1, .LANCHOR20
 	ldrh	w19, [x1, #:lo12:.LANCHOR20]
-.L431:
+.L432:
 	adrp	x1, .LANCHOR112
 	sub	w19, w19, #1
 	sxth	w19, w19
@@ -3429,24 +3440,24 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 96]
 	cmn	w0, #1
-	bne	.L432
+	bne	.L433
 	mov	w22, 0
 	mov	w24, 2
-.L433:
+.L434:
 	cmp	w22, w19
-	ble	.L436
-.L432:
+	ble	.L437
+.L433:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 160
 	ret
-.L430:
+.L431:
 	adrp	x1, .LANCHOR19
 	ldrh	w19, [x1, #:lo12:.LANCHOR19]
-	b	.L431
-.L436:
+	b	.L432
+.L437:
 	add	w20, w22, w19
 	mov	w2, w23
 	mov	w1, 1
@@ -3458,20 +3469,20 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 96]
 	cmn	w0, #1
-	bne	.L434
+	bne	.L435
 	ldr	w0, [x29, 100]
 	cmn	w0, #1
-	bne	.L434
+	bne	.L435
 	ldr	w0, [x29, 64]
 	cmn	w0, #1
-	beq	.L434
+	beq	.L435
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L433
-.L434:
+	b	.L434
+.L435:
 	add	w20, w20, 1
 	sxth	w22, w20
-	b	.L433
+	b	.L434
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
 	.section	.text.FtlScanSysBlk,"ax",@progbits
 	.align	2
@@ -3531,12 +3542,12 @@ FtlScanSysBlk:
 	adrp	x0, .LANCHOR82
 	add	x0, x0, :lo12:.LANCHOR82
 	str	x0, [x29, 112]
-.L442:
+.L443:
 	ldr	x0, [x29, 120]
 	ldr	w1, [x29, 172]
 	ldrh	w0, [x0]
 	cmp	w0, w1
-	bls	.L482
+	bls	.L483
 	adrp	x0, .LANCHOR3
 	adrp	x25, .LANCHOR103
 	adrp	x6, .LANCHOR13
@@ -3551,14 +3562,14 @@ FtlScanSysBlk:
 	ldr	x10, [x0, #:lo12:.LANCHOR65]
 	adrp	x0, .LANCHOR24
 	ldrh	w8, [x0, #:lo12:.LANCHOR24]
-	b	.L483
-.L444:
+	b	.L484
+.L445:
 	ldrh	w1, [x29, 172]
 	ldrb	w0, [x6, x5]
 	bl	V2P_block
 	and	w4, w0, 65535
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L443
+	cbnz	w0, .L444
 	ubfiz	x0, x22, 5, 16
 	mul	w1, w22, w8
 	add	x0, x7, x0
@@ -3569,19 +3580,19 @@ FtlScanSysBlk:
 	add	x1, x10, x1, sxtw 2
 	str	w4, [x0, 4]
 	stp	x11, x1, [x0, 8]
-.L443:
+.L444:
 	add	x5, x5, 1
-.L483:
+.L484:
 	cmp	w12, w5, uxth
-	bhi	.L444
-	cbnz	w22, .L445
-.L481:
+	bhi	.L445
+	cbnz	w22, .L446
+.L482:
 	ldr	w0, [x29, 172]
 	add	w26, w0, 1
 	and	w0, w26, 65535
 	str	w0, [x29, 172]
-	b	.L442
-.L445:
+	b	.L443
+.L446:
 	mov	w1, w22
 	mov	w2, 1
 	mov	x0, x7
@@ -3592,7 +3603,7 @@ FtlScanSysBlk:
 	adrp	x0, .LANCHOR140
 	add	x0, x0, :lo12:.LANCHOR140
 	str	x0, [x29, 136]
-.L480:
+.L481:
 	ldr	x0, [x25, #:lo12:.LANCHOR103]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
@@ -3600,10 +3611,10 @@ FtlScanSysBlk:
 	cmn	w0, #1
 	ldr	x27, [x1, 16]
 	ubfx	x26, x3, 10, 16
-	bne	.L448
+	bne	.L449
 	mov	w5, 16
 	mov	w7, 65535
-.L450:
+.L451:
 	ldr	x0, [x25, #:lo12:.LANCHOR103]
 	add	x6, x25, :lo12:.LANCHOR103
 	mov	w2, 1
@@ -3621,78 +3632,78 @@ FtlScanSysBlk:
 	ldr	w5, [x29, 168]
 	cmp	w0, w7
 	ldr	x6, [x29, 104]
-	bne	.L447
+	bne	.L448
 	ldr	x0, [x6]
 	mov	w1, -1
 	str	w1, [x0, x22]
 	ldr	x0, [x6]
 	ldr	w0, [x0, x22]
 	cmp	w0, w1
-	bne	.L448
-.L449:
+	bne	.L449
+.L450:
 	mov	w1, 1
-	b	.L519
-.L447:
+	b	.L520
+.L448:
 	ldr	x0, [x25, #:lo12:.LANCHOR103]
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	bne	.L448
+	bne	.L449
 	sub	w5, w5, #1
 	ands	w5, w5, 65535
-	bne	.L450
-	b	.L449
-.L448:
+	bne	.L451
+	b	.L450
+.L449:
 	adrp	x0, .LANCHOR82
 	ldr	w1, [x0, #:lo12:.LANCHOR82]
 	ldr	w0, [x27, 4]
 	cmn	w1, #1
-	beq	.L451
+	beq	.L452
 	cmp	w1, w0
-	bhi	.L452
-.L451:
+	bhi	.L453
+.L452:
 	cmn	w0, #1
-	beq	.L452
+	beq	.L453
 	ldr	x2, [x29, 112]
 	add	w1, w0, 1
 	str	w1, [x2]
-.L452:
+.L453:
 	ldrh	w1, [x27]
 	mov	w2, 61604
 	cmp	w1, w2
-	beq	.L454
-	bhi	.L455
+	beq	.L455
+	bhi	.L456
 	mov	w0, 61574
 	cmp	w1, w0
-	beq	.L456
-.L453:
+	beq	.L457
+.L454:
 	ldr	x0, [x29, 128]
 	add	x22, x22, 32
 	cmp	x0, x22
-	bne	.L480
-	b	.L481
-.L455:
+	bne	.L481
+	b	.L482
+.L456:
 	mov	w0, 61634
 	cmp	w1, w0
-	beq	.L457
+	beq	.L458
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L453
+	bne	.L454
 	mov	w1, 0
-.L519:
+.L520:
 	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-	b	.L453
-.L457:
+	b	.L454
+.L458:
 	ldrh	w1, [x20, #:lo12:.LANCHOR130]
 	ldr	w0, [x21, #:lo12:.LANCHOR30]
 	cmp	w1, w0
-	bls	.L459
+	bls	.L460
 	ldr	x1, [x29, 136]
 	adrp	x0, .LC1
 	mov	w2, 1225
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L459:
+.L460:
 	ldr	w6, [x21, #:lo12:.LANCHOR30]
 	ldr	x3, [x29, 152]
 	ldrh	w1, [x20, #:lo12:.LANCHOR130]
@@ -3703,53 +3714,53 @@ FtlScanSysBlk:
 	sub	w2, w2, #1
 	ldr	x5, [x3, #:lo12:.LANCHOR125]
 	sxth	w2, w2
-.L460:
+.L461:
 	cmp	w0, w2
-	bgt	.L466
-	tbz	w0, #31, .L500
-	b	.L453
-.L466:
+	bgt	.L467
+	tbz	w0, #31, .L501
+	b	.L454
+.L467:
 	sxtw	x8, w0
 	ldr	w11, [x27, 4]
 	lsl	x7, x8, 2
 	add	x10, x5, x7
 	ldr	w7, [x5, x7]
 	cmp	w11, w7
-	bls	.L461
+	bls	.L462
 	ldr	w2, [x5]
-	cbnz	w2, .L462
+	cbnz	w2, .L463
 	cmp	w6, w1
-	beq	.L462
+	beq	.L463
 	add	w1, w1, 1
 	strh	w1, [x20, #:lo12:.LANCHOR130]
-.L462:
+.L463:
 	ldr	x1, [x29, 160]
 	ldr	x6, [x1, #:lo12:.LANCHOR119]
 	mov	w1, 0
-.L463:
+.L464:
 	cmp	w1, w0
-	bne	.L464
+	bne	.L465
 	ldr	w1, [x27, 4]
 	str	w1, [x10]
 	strh	w26, [x6, x8, lsl 1]
-	tbnz	w0, #31, .L453
+	tbnz	w0, #31, .L454
 	ldrh	w1, [x20, #:lo12:.LANCHOR130]
 	ldr	w2, [x21, #:lo12:.LANCHOR30]
 	sub	w2, w2, w1
 	sub	w2, w2, #1
 	cmp	w0, w2, sxth
-	bgt	.L453
-.L500:
+	bgt	.L454
+.L501:
 	add	w1, w1, 1
 	strh	w1, [x20, #:lo12:.LANCHOR130]
 	ldr	w1, [x27, 4]
 	str	w1, [x5, x0, lsl 2]
 	ldr	x1, [x29, 160]
 	ldr	x1, [x1, #:lo12:.LANCHOR119]
-.L518:
+.L519:
 	strh	w26, [x1, x0, lsl 1]
-	b	.L453
-.L464:
+	b	.L454
+.L465:
 	sxtw	x2, w1
 	add	w1, w1, 1
 	lsl	x7, x2, 2
@@ -3761,22 +3772,22 @@ FtlScanSysBlk:
 	add	x7, x6, x2
 	ldrh	w7, [x7, 2]
 	strh	w7, [x6, x2]
-	b	.L463
-.L461:
+	b	.L464
+.L462:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L460
-.L456:
+	b	.L461
+.L457:
 	ldrh	w1, [x23, #:lo12:.LANCHOR35]
 	ldrh	w0, [x19, #:lo12:.LANCHOR27]
 	cmp	w1, w0
-	bls	.L469
+	bls	.L470
 	ldr	x1, [x29, 136]
 	adrp	x0, .LC1
 	mov	w2, 1266
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L469:
+.L470:
 	ldrh	w6, [x19, #:lo12:.LANCHOR27]
 	ldrh	w2, [x23, #:lo12:.LANCHOR35]
 	sub	w1, w6, #1
@@ -3784,46 +3795,46 @@ FtlScanSysBlk:
 	sub	w5, w1, w2
 	ldr	x1, [x29, 144]
 	ldr	x1, [x1, #:lo12:.LANCHOR122]
-.L470:
+.L471:
 	cmp	w0, w5
-	ble	.L475
+	ble	.L476
 	sxtw	x7, w0
 	ldr	w11, [x27, 4]
 	lsl	x8, x7, 2
 	add	x10, x1, x8
 	ldr	w8, [x1, x8]
 	cmp	w11, w8
-	bls	.L471
+	bls	.L472
 	ldr	w5, [x1]
-	cbnz	w5, .L472
+	cbnz	w5, .L473
 	cmp	w6, w2
-	beq	.L472
+	beq	.L473
 	add	w2, w2, 1
 	strh	w2, [x23, #:lo12:.LANCHOR35]
-.L472:
+.L473:
 	ldr	x6, [x28, #:lo12:.LANCHOR36]
 	mov	w2, 0
-.L473:
+.L474:
 	cmp	w2, w0
-	bne	.L474
+	bne	.L475
 	ldr	w2, [x27, 4]
 	str	w2, [x10]
 	strh	w26, [x6, x7, lsl 1]
-.L475:
-	tbnz	w0, #31, .L453
+.L476:
+	tbnz	w0, #31, .L454
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	ldrh	w5, [x23, #:lo12:.LANCHOR35]
 	sub	w2, w2, #1
 	sub	w2, w2, w5
 	cmp	w0, w2, sxth
-	bgt	.L453
+	bgt	.L454
 	add	w5, w5, 1
 	ldr	w2, [x27, 4]
 	strh	w5, [x23, #:lo12:.LANCHOR35]
 	str	w2, [x1, x0, lsl 2]
 	ldr	x1, [x28, #:lo12:.LANCHOR36]
-	b	.L518
-.L474:
+	b	.L519
+.L475:
 	sxtw	x5, w2
 	add	w2, w2, 1
 	lsl	x8, x5, 2
@@ -3835,61 +3846,61 @@ FtlScanSysBlk:
 	add	x8, x6, x5
 	ldrh	w8, [x8, 2]
 	strh	w8, [x6, x5]
-	b	.L473
-.L471:
+	b	.L474
+.L472:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L470
-.L454:
+	b	.L471
+.L455:
 	ldrh	w5, [x24, #:lo12:.LANCHOR139]
 	mov	w1, 65535
 	add	x2, x24, :lo12:.LANCHOR139
 	cmp	w5, w1
-	bne	.L477
+	bne	.L478
 	strh	w26, [x24, #:lo12:.LANCHOR139]
 	str	w0, [x2, 8]
-	b	.L453
-.L477:
+	b	.L454
+.L478:
 	ldrh	w0, [x2, 4]
 	cmp	w0, w1
-	beq	.L478
+	beq	.L479
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.L478:
+.L479:
 	add	x0, x24, :lo12:.LANCHOR139
 	ldr	w1, [x27, 4]
 	ldr	w2, [x0, 8]
 	cmp	w2, w1
-	bcs	.L479
+	bcs	.L480
 	ldrh	w2, [x24, #:lo12:.LANCHOR139]
 	strh	w2, [x0, 4]
 	strh	w26, [x24, #:lo12:.LANCHOR139]
 	str	w1, [x0, 8]
-	b	.L453
-.L479:
+	b	.L454
+.L480:
 	strh	w26, [x0, 4]
-	b	.L453
-.L482:
+	b	.L454
+.L483:
 	ldr	x0, [x29, 160]
 	ldr	x2, [x0, #:lo12:.LANCHOR119]
 	ldrh	w0, [x2]
-	cbz	w0, .L484
-.L487:
+	cbz	w0, .L485
+.L488:
 	ldr	x1, [x28, #:lo12:.LANCHOR36]
 	ldrh	w0, [x1]
-	cbz	w0, .L485
-.L486:
+	cbz	w0, .L486
+.L487:
 	ldrh	w1, [x20, #:lo12:.LANCHOR130]
 	ldr	w0, [x21, #:lo12:.LANCHOR30]
 	cmp	w1, w0
-	bls	.L516
+	bls	.L517
 	adrp	x1, .LANCHOR140
 	adrp	x0, .LC1
 	mov	w2, 1391
 	add	x1, x1, :lo12:.LANCHOR140
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L516:
+.L517:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -3898,24 +3909,24 @@ FtlScanSysBlk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L484:
+.L485:
 	ldrh	w0, [x20, #:lo12:.LANCHOR130]
-	cbz	w0, .L487
+	cbz	w0, .L488
 	ldr	w1, [x21, #:lo12:.LANCHOR30]
 	mov	w0, 0
-.L488:
+.L489:
 	cmp	w0, w1
-	bcs	.L487
+	bcs	.L488
 	ldrh	w3, [x2, w0, sxtw 1]
-	cbz	w3, .L489
+	cbz	w3, .L490
 	ldr	x1, [x29, 152]
 	add	x7, x21, :lo12:.LANCHOR30
 	ldr	x4, [x1, #:lo12:.LANCHOR125]
 	mov	w1, w0
-.L490:
+.L491:
 	ldr	w3, [x7]
 	cmp	w1, w3
-	bcs	.L487
+	bcs	.L488
 	sxtw	x6, w1
 	sub	w3, w1, w0
 	lsl	x5, x6, 1
@@ -3927,29 +3938,29 @@ FtlScanSysBlk:
 	strh	w8, [x2, x3, lsl 1]
 	str	w6, [x4, x3, lsl 2]
 	strh	wzr, [x2, x5]
-	b	.L490
-.L489:
+	b	.L491
+.L490:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L488
-.L485:
+	b	.L489
+.L486:
 	ldrh	w0, [x23, #:lo12:.LANCHOR35]
-	cbz	w0, .L486
+	cbz	w0, .L487
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	mov	w0, 0
-.L495:
+.L496:
 	mov	w6, w0
 	cmp	w0, w2
-	bge	.L486
+	bge	.L487
 	ldrh	w3, [x1, w0, sxtw 1]
-	cbz	w3, .L496
+	cbz	w3, .L497
 	ldr	x2, [x29, 144]
 	add	x19, x19, :lo12:.LANCHOR27
 	ldr	x3, [x2, #:lo12:.LANCHOR122]
-.L497:
+.L498:
 	ldrh	w2, [x19]
 	cmp	w0, w2
-	bge	.L486
+	bge	.L487
 	sxtw	x5, w0
 	sub	w2, w0, w6
 	lsl	x4, x5, 1
@@ -3961,11 +3972,11 @@ FtlScanSysBlk:
 	strh	w7, [x1, x2, lsl 1]
 	str	w5, [x3, x2, lsl 2]
 	strh	wzr, [x1, x4]
-	b	.L497
-.L496:
+	b	.L498
+.L497:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L495
+	b	.L496
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
 	.section	.text.FtlLoadBbt,"ax",@progbits
 	.align	2
@@ -3993,11 +4004,11 @@ FtlLoadBbt:
 	add	x24, x24, :lo12:.LANCHOR17
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L521:
+.L522:
 	ldrh	w0, [x24]
 	sub	w0, w0, #15
 	cmp	w0, w19
-	bgt	.L524
+	bgt	.L525
 	lsl	w0, w19, 10
 	mov	w2, 1
 	str	w0, [x20, 4]
@@ -4006,7 +4017,7 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L522
+	bne	.L523
 	ldr	w0, [x20, 4]
 	mov	w2, 1
 	mov	w1, w2
@@ -4014,13 +4025,13 @@ FtlLoadBbt:
 	str	w0, [x20, 4]
 	mov	x0, x20
 	bl	FlashReadPages
-.L522:
+.L523:
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L523
+	beq	.L524
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	bne	.L523
+	bne	.L524
 	adrp	x1, .LANCHOR37
 	add	x0, x1, :lo12:.LANCHOR37
 	strh	w19, [x1, #:lo12:.LANCHOR37]
@@ -4028,16 +4039,16 @@ FtlLoadBbt:
 	str	w1, [x0, 8]
 	ldrh	w1, [x21, 8]
 	strh	w1, [x0, 4]
-.L524:
+.L525:
 	adrp	x19, .LANCHOR37
 	mov	w0, 65535
 	add	x20, x19, :lo12:.LANCHOR37
 	ldrh	w1, [x19, #:lo12:.LANCHOR37]
 	cmp	w1, w0
-	beq	.L538
+	beq	.L539
 	ldrh	w1, [x20, 4]
 	cmp	w1, w0
-	beq	.L528
+	beq	.L529
 	add	x0, x22, :lo12:.LANCHOR138
 	lsl	w1, w1, 10
 	mov	w2, 1
@@ -4046,21 +4057,21 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x22, #:lo12:.LANCHOR138]
 	cmn	w0, #1
-	beq	.L528
+	beq	.L529
 	ldrh	w1, [x21]
 	mov	w0, 61649
 	cmp	w1, w0
-	bne	.L528
+	bne	.L529
 	ldr	w1, [x20, 8]
 	ldr	w0, [x21, 4]
 	cmp	w0, w1
-	bls	.L528
+	bls	.L529
 	ldrh	w1, [x20, 4]
 	str	w0, [x20, 8]
 	ldrh	w0, [x21, 8]
 	strh	w1, [x19, #:lo12:.LANCHOR37]
 	strh	w0, [x20, 4]
-.L528:
+.L529:
 	ldrh	w0, [x19, #:lo12:.LANCHOR37]
 	add	x24, x19, :lo12:.LANCHOR37
 	mov	w1, 1
@@ -4070,35 +4081,35 @@ FtlLoadBbt:
 	add	w0, w0, 1
 	strh	w0, [x24, 2]
 	add	x24, x22, :lo12:.LANCHOR138
-.L530:
-	tbz	w20, #31, .L533
+.L531:
+	tbz	w20, #31, .L534
 	adrp	x1, .LANCHOR141
 	adrp	x0, .LC1
 	mov	w2, 251
 	add	x1, x1, :lo12:.LANCHOR141
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L532:
+.L533:
 	add	x0, x19, :lo12:.LANCHOR37
 	ldrh	w1, [x21, 10]
 	strh	w1, [x0, 6]
 	mov	w1, 65535
 	ldrh	w0, [x21, 12]
 	cmp	w0, w1
-	beq	.L535
+	beq	.L536
 	adrp	x1, .LANCHOR2
 	ldr	w2, [x1, #:lo12:.LANCHOR2]
 	cmp	w0, w2
-	beq	.L535
+	beq	.L536
 	adrp	x1, .LANCHOR6
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	lsr	w1, w1, 2
 	cmp	w2, w1
-	bcs	.L535
+	bcs	.L536
 	cmp	w0, w1
-	bcs	.L535
+	bcs	.L536
 	bl	FtlSysBlkNumInit
-.L535:
+.L536:
 	add	x19, x19, :lo12:.LANCHOR37
 	adrp	x21, .LANCHOR10
 	adrp	x23, .LANCHOR127
@@ -4107,23 +4118,23 @@ FtlLoadBbt:
 	add	x23, x23, :lo12:.LANCHOR127
 	add	x22, x22, :lo12:.LANCHOR138
 	mov	w20, 0
-.L536:
+.L537:
 	ldrh	w0, [x21]
 	cmp	w20, w0
-	bcc	.L537
+	bcc	.L538
 	mov	w0, 0
-.L520:
+.L521:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L523:
+.L524:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L521
-.L533:
+	b	.L522
+.L534:
 	ldrh	w0, [x19, #:lo12:.LANCHOR37]
 	mov	w2, 1
 	mov	w1, w2
@@ -4135,15 +4146,15 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x24]
 	cmn	w0, #1
-	beq	.L531
+	beq	.L532
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	beq	.L532
-.L531:
+	beq	.L533
+.L532:
 	sub	w20, w20, #1
 	sxth	w20, w20
-	b	.L530
-.L537:
+	b	.L531
+.L538:
 	ldrh	w2, [x23]
 	ldr	x0, [x22, 8]
 	mul	w1, w2, w20
@@ -4152,10 +4163,10 @@ FtlLoadBbt:
 	add	x1, x0, x1, lsl 2
 	ldr	x0, [x19], 8
 	bl	ftl_memcpy
-	b	.L536
-.L538:
+	b	.L537
+.L539:
 	mov	w0, -1
-	b	.L520
+	b	.L521
 	.size	FtlLoadBbt, .-FtlLoadBbt
 	.section	.text.FlashProgPages,"ax",@progbits
 	.align	2
@@ -4182,18 +4193,18 @@ FlashProgPages:
 	mov	x25, x0
 	add	x28, x24, :lo12:.LANCHOR78
 	lsl	w27, w23, 3
-.L551:
+.L552:
 	cmp	x25, x20
-	bne	.L564
+	bne	.L565
 	ldr	w0, [x29, 104]
-	cbz	w0, .L578
+	cbz	w0, .L579
 	adrp	x21, .LANCHOR111
 	adrp	x22, .LANCHOR113
 	mov	x23, x21
 	mov	x24, x22
-.L566:
+.L567:
 	cmp	x19, x20
-	beq	.L578
+	beq	.L579
 	ldr	x1, [x21, #:lo12:.LANCHOR111]
 	ldr	x0, [x22, #:lo12:.LANCHOR113]
 	str	wzr, [x1]
@@ -4207,87 +4218,87 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	w26, [x29, 128]
 	cmn	w26, #1
-	bne	.L567
+	bne	.L568
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC14
 	add	x0, x0, :lo12:.LC14
 	bl	printf
 	str	w26, [x19]
-.L567:
+.L568:
 	ldr	w26, [x29, 128]
 	cmp	w26, 256
-	bne	.L568
+	bne	.L569
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC15
 	add	x0, x0, :lo12:.LC15
 	bl	printf
 	str	w26, [x19]
-.L568:
+.L569:
 	ldr	x0, [x19, 16]
-	cbz	x0, .L569
+	cbz	x0, .L570
 	ldr	w2, [x0]
 	ldr	x0, [x24, #:lo12:.LANCHOR113]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L569
+	beq	.L570
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC16
 	add	x0, x0, :lo12:.LC16
 	bl	printf
 	mov	w0, -1
 	str	w0, [x19]
-.L569:
+.L570:
 	ldr	x0, [x19, 8]
-	cbz	x0, .L570
+	cbz	x0, .L571
 	ldr	w2, [x0]
 	ldr	x0, [x23, #:lo12:.LANCHOR111]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L570
+	beq	.L571
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC17
 	add	x0, x0, :lo12:.LC17
 	bl	printf
 	mov	w0, -1
 	str	w0, [x19]
-.L570:
+.L571:
 	add	x19, x19, 32
-	b	.L566
-.L564:
+	b	.L567
+.L565:
 	ldr	x0, [x25, 8]
-	cbz	x0, .L552
+	cbz	x0, .L553
 	ldr	x0, [x25, 16]
-	cbnz	x0, .L553
-.L552:
+	cbnz	x0, .L554
+.L553:
 	adrp	x0, .LC1
 	mov	w2, 142
 	mov	x1, x22
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L553:
+.L554:
 	ldr	w0, [x25, 4]
 	add	x2, x29, 120
 	add	x1, x29, 124
 	bl	l2p_addr_tran.isra.0
 	ldr	w0, [x29, 120]
 	cmp	w0, 3
-	bls	.L554
-.L591:
+	bls	.L555
+.L592:
 	mov	w0, -1
 	str	w0, [x25]
-	b	.L555
-.L554:
-	cbnz	w0, .L556
+	b	.L556
+.L555:
+	cbnz	w0, .L557
 	ldr	w0, [x29, 124]
 	cmp	w27, w0
-	bls	.L556
+	bls	.L557
 	adrp	x21, .LANCHOR142
 	adrp	x22, .LC6
 	mov	w23, -1
 	add	x21, x21, :lo12:.LANCHOR142
 	add	x22, x22, :lo12:.LC6
-	b	.L589
-.L558:
+	b	.L590
+.L559:
 	ldr	w2, [x19, 4]
 	mov	x1, x21
 	str	w23, [x19]
@@ -4306,10 +4317,10 @@ FlashProgPages:
 	mov	w2, w3
 	add	x0, x0, :lo12:.LC8
 	bl	rknand_print_hex
-.L589:
+.L590:
 	cmp	x19, x20
-	bne	.L558
-.L578:
+	bne	.L559
+.L579:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -4318,20 +4329,20 @@ FlashProgPages:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L556:
+.L557:
 	ldr	x1, [x25, 8]
 	tst	x1, 63
-	beq	.L572
+	beq	.L573
 	adrp	x0, .LANCHOR111
 	ldr	x26, [x0, #:lo12:.LANCHOR111]
 	cmp	x1, x26
-	beq	.L559
+	beq	.L560
 	adrp	x0, .LANCHOR12
 	ldrh	w2, [x0, #:lo12:.LANCHOR12]
 	mov	x0, x26
 	lsl	w2, w2, 9
 	bl	ftl_memcpy
-.L559:
+.L560:
 	add	x0, x24, :lo12:.LANCHOR78
 	ldr	w1, [x29, 124]
 	ldr	x3, [x25, 16]
@@ -4339,13 +4350,13 @@ FlashProgPages:
 	ldr	x6, [x0, 16]
 	ldrb	w0, [x29, 120]
 	blr	x6
-	cbnz	w0, .L560
+	cbnz	w0, .L561
 	str	wzr, [x25]
-.L561:
+.L562:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
-	bne	.L555
+	bne	.L556
 	ldrb	w0, [x29, 120]
 	add	x2, x26, 2048
 	ldr	x6, [x28, 16]
@@ -4354,17 +4365,17 @@ FlashProgPages:
 	add	w1, w23, w1
 	add	x3, x3, 8
 	blr	x6
-	cbnz	w0, .L591
-.L555:
+	cbnz	w0, .L592
+.L556:
 	add	x25, x25, 32
-	b	.L551
-.L572:
+	b	.L552
+.L573:
 	mov	x26, x1
-	b	.L559
-.L560:
+	b	.L560
+.L561:
 	mov	w0, -1
 	str	w0, [x25]
-	b	.L561
+	b	.L562
 	.size	FlashProgPages, .-FlashProgPages
 	.section	.text.FtlLowFormatEraseBlock,"ax",@progbits
 	.align	2
@@ -4398,43 +4409,43 @@ FtlLowFormatEraseBlock:
 	ldrh	w12, [x25, #:lo12:.LANCHOR24]
 	stp	x27, x28, [sp, 80]
 	str	x0, [x29, 112]
-.L593:
+.L594:
 	cmp	w8, w5, uxth
-	bhi	.L597
-	cbz	w24, .L592
+	bhi	.L598
+	cbz	w24, .L593
 	mov	w2, w24
 	ubfiz	x24, x24, 5, 16
 	mov	x26, 0
 	mov	w1, 0
 	mov	x0, x6
 	bl	FlashEraseBlocks
-.L601:
+.L602:
 	ldr	x0, [x21, #:lo12:.LANCHOR79]
 	add	x1, x0, x26
 	ldr	w0, [x0, x26]
 	cmn	w0, #1
-	bne	.L600
+	bne	.L601
 	ldr	w0, [x1, 4]
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.L600:
+.L601:
 	add	x26, x26, 32
 	cmp	x26, x24
-	bne	.L601
-	cbz	w22, .L614
+	bne	.L602
+	cbz	w22, .L615
 	adrp	x0, .LANCHOR20
 	mov	w26, 1
 	ldrh	w28, [x0, #:lo12:.LANCHOR20]
-.L602:
+.L603:
 	add	x0, x20, :lo12:.LANCHOR3
 	adrp	x27, .LANCHOR13
 	str	x0, [x29, 120]
 	mov	w24, 0
 	add	x0, x27, :lo12:.LANCHOR13
 	str	x0, [x29, 104]
-.L610:
+.L611:
 	ldr	x0, [x29, 120]
 	mov	x5, 0
 	ldr	x6, [x21, #:lo12:.LANCHOR79]
@@ -4445,10 +4456,10 @@ FtlLowFormatEraseBlock:
 	ldr	x8, [x0, #:lo12:.LANCHOR109]
 	ldr	x0, [x29, 112]
 	ldr	x10, [x0, #:lo12:.LANCHOR110]
-.L603:
+.L604:
 	cmp	w7, w5, uxth
-	bhi	.L606
-	cbz	w20, .L592
+	bhi	.L607
+	cbz	w20, .L593
 	mov	w1, w20
 	mov	w3, 1
 	mov	w2, w26
@@ -4456,11 +4467,11 @@ FtlLowFormatEraseBlock:
 	bl	FlashProgPages
 	mov	x27, 0
 	ubfiz	x1, x20, 5, 16
-.L609:
+.L610:
 	ldr	x0, [x21, #:lo12:.LANCHOR79]
 	add	x3, x0, x27
 	ldr	w0, [x0, x27]
-	cbz	w0, .L608
+	cbz	w0, .L609
 	ldr	w0, [x3, 4]
 	add	w19, w19, 1
 	str	x1, [x29, 96]
@@ -4468,36 +4479,36 @@ FtlLowFormatEraseBlock:
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
 	ldr	x1, [x29, 96]
-.L608:
+.L609:
 	add	x27, x27, 32
 	cmp	x1, x27
-	bne	.L609
+	bne	.L610
 	add	w24, w24, 1
 	cmp	w28, w24, uxth
-	bhi	.L610
+	bhi	.L611
 	mov	x24, 0
-.L612:
-	cbz	w22, .L611
+.L613:
+	cbz	w22, .L612
 	ldr	x0, [x21, #:lo12:.LANCHOR79]
 	add	x1, x0, x24
 	ldr	w0, [x0, x24]
-	cbnz	w0, .L611
+	cbnz	w0, .L612
 	ldr	w0, [x1, 4]
 	mov	w1, 1
 	lsr	w0, w0, 10
 	bl	FtlFreeSysBlkQueueIn
-.L611:
+.L612:
 	add	x24, x24, 32
 	cmp	x24, x27
-	bne	.L612
+	bne	.L613
 	cmp	w23, 63
 	ccmp	w22, 0, 0, hi
-	beq	.L592
+	beq	.L593
 	ldr	x0, [x21, #:lo12:.LANCHOR79]
 	mov	w2, w20
 	mov	w1, w26
 	bl	FlashEraseBlocks
-.L592:
+.L593:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -4506,7 +4517,7 @@ FtlLowFormatEraseBlock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L597:
+.L598:
 	lsl	x0, x5, 5
 	mov	w1, w23
 	str	wzr, [x6, x0]
@@ -4514,13 +4525,13 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	and	w13, w0, 65535
 	mov	w14, w13
-	cbz	w22, .L594
+	cbz	w22, .L595
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L595
-.L594:
+	cbnz	w0, .L596
+.L595:
 	mov	w0, w14
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L596
+	cbnz	w0, .L597
 	ubfiz	x0, x24, 5, 16
 	mul	w1, w24, w12
 	add	x0, x6, x0
@@ -4531,18 +4542,18 @@ FtlLowFormatEraseBlock:
 	add	x1, x11, x1, sxtw 2
 	str	w13, [x0, 4]
 	stp	x10, x1, [x0, 8]
-.L595:
-	add	x5, x5, 1
-	b	.L593
 .L596:
+	add	x5, x5, 1
+	b	.L594
+.L597:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L595
-.L614:
+	b	.L596
+.L615:
 	mov	w26, 0
 	mov	w28, 2
-	b	.L602
-.L606:
+	b	.L603
+.L607:
 	lsl	x0, x5, 5
 	mov	w1, w23
 	str	wzr, [x6, x0]
@@ -4551,13 +4562,13 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	and	w12, w0, 65535
 	mov	w13, w12
-	cbz	w22, .L604
+	cbz	w22, .L605
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L605
-.L604:
+	cbnz	w0, .L606
+.L605:
 	mov	w0, w13
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L605
+	cbnz	w0, .L606
 	ubfiz	x0, x20, 5, 16
 	mul	w1, w20, w11
 	add	x0, x6, x0
@@ -4568,9 +4579,9 @@ FtlLowFormatEraseBlock:
 	add	x1, x10, x1, sxtw 2
 	str	w12, [x0, 4]
 	stp	x8, x1, [x0, 8]
-.L605:
+.L606:
 	add	x5, x5, 1
-	b	.L603
+	b	.L604
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
 	.section	.text.FlashTestBlk,"ax",@progbits
 	.align	2
@@ -4582,7 +4593,7 @@ FlashTestBlk:
 	stp	x19, x20, [sp, 16]
 	and	w19, w0, 65535
 	cmp	w19, 11
-	bls	.L638
+	bls	.L639
 	adrp	x20, .LANCHOR112
 	mov	w2, 32
 	mov	w1, 165
@@ -4607,7 +4618,7 @@ FlashTestBlk:
 	mov	w1, w3
 	bl	FlashProgPages
 	ldr	w0, [x29, 32]
-	cbnz	w0, .L639
+	cbnz	w0, .L640
 	add	w0, w19, 1
 	mov	w3, 1
 	str	w0, [x29, 36]
@@ -4618,23 +4629,23 @@ FlashTestBlk:
 	ldr	w0, [x29, 32]
 	cmp	w0, 0
 	csetm	w20, ne
-.L637:
+.L638:
 	mov	w2, 1
 	mov	w1, 0
 	add	x0, x29, 32
 	str	w19, [x29, 36]
 	bl	FlashEraseBlocks
-.L635:
+.L636:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 128
 	ret
-.L639:
+.L640:
 	mov	w20, -1
-	b	.L637
-.L638:
+	b	.L638
+.L639:
 	mov	w20, 0
-	b	.L635
+	b	.L636
 	.size	FlashTestBlk, .-FlashTestBlk
 	.section	.text.FtlBbmTblFlush,"ax",@progbits
 	.align	2
@@ -4667,10 +4678,10 @@ FtlBbmTblFlush:
 	add	x27, x27, :lo12:.LANCHOR127
 	mov	w1, 0
 	bl	ftl_memset
-.L642:
+.L643:
 	ldrh	w0, [x26]
 	cmp	w24, w0
-	blt	.L643
+	blt	.L644
 	add	x20, x20, :lo12:.LANCHOR138
 	add	x19, x21, :lo12:.LANCHOR37
 	mov	w2, 16
@@ -4700,7 +4711,7 @@ FtlBbmTblFlush:
 	adrp	x0, .LANCHOR143
 	ldr	w0, [x0, #:lo12:.LANCHOR143]
 	strh	w0, [x27, 14]
-.L644:
+.L645:
 	ldrh	w1, [x19]
 	ldrh	w4, [x27, 10]
 	ldrh	w2, [x19, 2]
@@ -4718,7 +4729,7 @@ FtlBbmTblFlush:
 	ldrh	w1, [x19, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L645
+	blt	.L646
 	ldr	w0, [x19, 8]
 	mov	w2, 1
 	ldrh	w1, [x19, 4]
@@ -4737,7 +4748,7 @@ FtlBbmTblFlush:
 	str	w1, [x0, 4]
 	mov	w1, w2
 	bl	FlashEraseBlocks
-.L645:
+.L646:
 	mov	w3, 1
 	mov	x0, x20
 	mov	w2, w3
@@ -4748,7 +4759,7 @@ FtlBbmTblFlush:
 	strh	w0, [x19, 2]
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L646
+	bne	.L647
 	ldr	w1, [x20, 4]
 	add	w21, w21, 1
 	adrp	x0, .LC19
@@ -4756,15 +4767,15 @@ FtlBbmTblFlush:
 	add	x0, x0, :lo12:.LC19
 	bl	printf
 	cmp	w21, 3
-	bls	.L644
+	bls	.L645
 	ldr	w1, [x20, 4]
 	adrp	x0, .LC20
 	mov	w2, w21
 	add	x0, x0, :lo12:.LC20
 	bl	printf
-.L648:
-	b	.L648
-.L643:
+.L649:
+	b	.L649
+.L644:
 	ldrh	w2, [x27]
 	ldr	x1, [x25], 8
 	ldr	x0, [x19, 8]
@@ -4773,13 +4784,13 @@ FtlBbmTblFlush:
 	add	w24, w24, 1
 	add	x0, x0, x3, sxtw 2
 	bl	ftl_memcpy
-	b	.L642
-.L646:
+	b	.L643
+.L647:
 	add	w24, w24, 1
 	cmp	w24, 1
-	beq	.L644
+	beq	.L645
 	cmp	w0, 256
-	beq	.L644
+	beq	.L645
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -4807,7 +4818,7 @@ allocate_data_superblock:
 	add	x0, x27, :lo12:.LANCHOR44
 	stp	x25, x26, [sp, 64]
 	str	x0, [x29, 104]
-.L657:
+.L658:
 	ldr	x1, [x29, 104]
 	adrp	x23, .LANCHOR5
 	ldrh	w0, [x28, #:lo12:.LANCHOR48]
@@ -4815,18 +4826,18 @@ allocate_data_superblock:
 	add	w0, w0, w1
 	ldrh	w1, [x23, #:lo12:.LANCHOR5]
 	cmp	w0, w1
-	ble	.L658
+	ble	.L659
 	adrp	x1, .LANCHOR144
 	adrp	x0, .LC1
 	mov	w2, 2656
 	add	x1, x1, :lo12:.LANCHOR144
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L658:
+.L659:
 	adrp	x0, .LANCHOR53
 	add	x0, x0, :lo12:.LANCHOR53
 	cmp	x19, x0
-	bne	.L684
+	bne	.L685
 	adrp	x1, .LANCHOR95
 	ldrh	w0, [x24]
 	ldr	w1, [x1, #:lo12:.LANCHOR95]
@@ -4835,39 +4846,39 @@ allocate_data_superblock:
 	add	w0, w0, 1
 	add	w1, w0, w1, lsr 2
 	ands	w1, w1, 65535
-	beq	.L659
+	beq	.L660
 	sub	w1, w1, #1
 	and	w1, w1, 65535
-.L659:
+.L660:
 	adrp	x0, .LANCHOR46
 	add	x0, x0, :lo12:.LANCHOR46
 	bl	List_pop_index_node
 	and	w22, w0, 65535
 	ldrh	w0, [x24]
-	cbnz	w0, .L660
+	cbnz	w0, .L661
 	adrp	x1, .LANCHOR144
 	adrp	x0, .LC1
 	mov	w2, 2665
 	add	x1, x1, :lo12:.LANCHOR144
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L660:
+.L661:
 	ldrh	w0, [x24]
 	sub	w0, w0, #1
 	strh	w0, [x24]
 	ldrh	w0, [x23, #:lo12:.LANCHOR5]
 	cmp	w0, w22
-	bls	.L657
+	bls	.L658
 	adrp	x25, .LANCHOR42
 	ubfiz	x20, x22, 1, 16
 	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	ldrh	w21, [x0, x20]
-	cbnz	w21, .L657
+	cbnz	w21, .L658
 	strh	w22, [x19]
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L662
+	cbnz	w0, .L663
 	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	mov	w1, -1
 	strh	w1, [x0, x20]
@@ -4878,31 +4889,31 @@ allocate_data_superblock:
 	add	w0, w0, w1
 	ldrh	w1, [x23, #:lo12:.LANCHOR5]
 	cmp	w0, w1
-	ble	.L657
+	ble	.L658
 	mov	w2, 2679
 	adrp	x1, .LANCHOR144
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR144
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	b	.L657
-.L684:
+	b	.L658
+.L685:
 	mov	w1, 0
-	b	.L659
-.L662:
+	b	.L660
+.L663:
 	ldrh	w1, [x27, #:lo12:.LANCHOR44]
 	ldrh	w0, [x24]
 	add	w0, w0, w1
 	ldrh	w1, [x23, #:lo12:.LANCHOR5]
 	cmp	w0, w1
-	ble	.L664
+	ble	.L665
 	adrp	x1, .LANCHOR144
 	adrp	x0, .LC1
 	mov	w2, 2682
 	add	x1, x1, :lo12:.LANCHOR144
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L664:
+.L665:
 	adrp	x0, .LANCHOR3
 	adrp	x25, .LANCHOR79
 	add	x26, x19, 16
@@ -4914,40 +4925,40 @@ allocate_data_superblock:
 	add	x1, x3, 8
 	add	x0, x0, 8
 	add	x0, x3, x0
-.L665:
+.L666:
 	cmp	x0, x1
-	bne	.L667
-	cbnz	w21, .L668
+	bne	.L668
+	cbnz	w21, .L669
 	adrp	x1, .LANCHOR144
 	adrp	x0, .LC1
 	mov	w2, 2693
 	add	x1, x1, :lo12:.LANCHOR144
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L668:
+.L669:
 	adrp	x0, .LANCHOR145
 	ldrh	w0, [x0, #:lo12:.LANCHOR145]
 	cmp	w0, w22
-	bne	.L669
+	bne	.L670
 	adrp	x1, .LANCHOR144
 	adrp	x0, .LC1
 	mov	w2, 2695
 	add	x1, x1, :lo12:.LANCHOR144
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L669:
+.L670:
 	ldrb	w0, [x19, 8]
 	adrp	x6, .LANCHOR47
 	adrp	x7, .LANCHOR14
 	adrp	x5, .LANCHOR90
 	adrp	x4, .LANCHOR91
 	ldr	x1, [x6, #:lo12:.LANCHOR47]
-	cbnz	w0, .L670
+	cbnz	w0, .L671
 	ldrh	w0, [x1, x20]
-	cbz	w0, .L671
+	cbz	w0, .L672
 	ldrh	w2, [x7, #:lo12:.LANCHOR14]
 	add	w0, w0, w2
-.L695:
+.L696:
 	strh	w0, [x1, x20]
 	mov	w1, 0
 	ldr	w0, [x5, #:lo12:.LANCHOR90]
@@ -4955,15 +4966,15 @@ allocate_data_superblock:
 	str	w0, [x5, #:lo12:.LANCHOR90]
 	mov	w0, w22
 	bl	ftl_set_blk_mode
-.L673:
+.L674:
 	ldr	x0, [x6, #:lo12:.LANCHOR47]
 	ldrh	w1, [x0, x20]
 	adrp	x0, .LANCHOR92
 	ldr	w2, [x0, #:lo12:.LANCHOR92]
 	cmp	w1, w2
-	bls	.L674
+	bls	.L675
 	str	w1, [x0, #:lo12:.LANCHOR92]
-.L674:
+.L675:
 	ldr	w2, [x5, #:lo12:.LANCHOR90]
 	ldr	w1, [x4, #:lo12:.LANCHOR91]
 	ldrh	w0, [x7, #:lo12:.LANCHOR14]
@@ -4982,48 +4993,48 @@ allocate_data_superblock:
 	add	x1, x1, 4
 	add	x2, x0, 4
 	add	x1, x0, x1
-.L675:
+.L676:
 	cmp	x1, x2
-	bne	.L676
+	bne	.L677
 	ldrb	w1, [x19, 8]
 	mov	w2, w21
 	mov	x23, 0
 	bl	FlashEraseBlocks
 	mov	w1, 0
-.L677:
+.L678:
 	cmp	w21, w23, uxth
-	bhi	.L679
-	cbz	w1, .L680
+	bhi	.L680
+	cbz	w1, .L681
 	mov	w0, w22
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L680:
+.L681:
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L681
+	cbnz	w0, .L682
 	adrp	x0, .LANCHOR42
 	mov	w1, -1
 	ldr	x0, [x0, #:lo12:.LANCHOR42]
 	strh	w1, [x0, x20]
-	b	.L657
-.L667:
+	b	.L658
+.L668:
 	ldrh	w2, [x4]
 	stp	xzr, xzr, [x1]
 	cmp	w2, w6
-	beq	.L666
+	beq	.L667
 	ubfiz	x5, x21, 5, 16
 	add	w21, w21, 1
 	add	x5, x3, x5
 	and	w21, w21, 65535
 	lsl	w2, w2, 10
 	str	w2, [x5, 4]
-.L666:
+.L667:
 	add	x1, x1, 32
 	add	x4, x4, 2
-	b	.L665
-.L671:
+	b	.L666
+.L672:
 	mov	w0, 2
-	b	.L695
-.L670:
+	b	.L696
+.L671:
 	ldrh	w0, [x1, x20]
 	add	w0, w0, 1
 	strh	w0, [x1, x20]
@@ -5032,19 +5043,19 @@ allocate_data_superblock:
 	str	w0, [x4, #:lo12:.LANCHOR91]
 	mov	w0, w22
 	bl	ftl_set_blk_mode.part.6
-	b	.L673
-.L676:
+	b	.L674
+.L677:
 	ldr	w3, [x2]
 	and	w3, w3, -1024
 	str	w3, [x2], 32
-	b	.L675
-.L679:
+	b	.L676
+.L680:
 	ldr	x2, [x25, #:lo12:.LANCHOR79]
 	lsl	x0, x23, 5
 	add	x3, x2, x0
 	ldr	w2, [x2, x0]
 	cmn	w2, #1
-	bne	.L678
+	bne	.L679
 	add	w1, w1, 1
 	ldr	w0, [x3, 4]
 	stp	w2, w1, [x29, 96]
@@ -5055,11 +5066,11 @@ allocate_data_superblock:
 	ldrb	w0, [x19, 7]
 	sub	w0, w0, #1
 	strb	w0, [x19, 7]
-.L678:
+.L679:
 	add	x23, x23, 1
 	add	x26, x26, 2
-	b	.L677
-.L681:
+	b	.L678
+.L682:
 	adrp	x1, .LANCHOR19
 	adrp	x2, .LANCHOR82
 	strh	wzr, [x19, 2]
@@ -5077,17 +5088,17 @@ allocate_data_superblock:
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	strh	w0, [x1, x20]
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L682
+	cbz	w0, .L683
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L683
-.L682:
+	cbnz	w0, .L684
+.L683:
 	adrp	x1, .LANCHOR144
 	adrp	x0, .LC1
 	mov	w2, 2748
 	add	x1, x1, :lo12:.LANCHOR144
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L683:
+.L684:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -5112,17 +5123,17 @@ FtlGcFreeBadSuperBlk:
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	str	x27, [sp, 80]
-	cbz	w0, .L697
+	cbz	w0, .L698
 	adrp	x23, .LANCHOR75
 	add	x24, x23, :lo12:.LANCHOR75
 	mov	w19, 0
-.L698:
+.L699:
 	adrp	x0, .LANCHOR3
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w0, w19
-	bhi	.L704
+	bhi	.L705
 	bl	FtlGcReFreshBadBlk
-.L697:
+.L698:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -5131,7 +5142,7 @@ FtlGcFreeBadSuperBlk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L704:
+.L705:
 	adrp	x0, .LANCHOR13
 	add	x0, x0, :lo12:.LANCHOR13
 	mov	w1, w25
@@ -5140,19 +5151,19 @@ FtlGcFreeBadSuperBlk:
 	ldrb	w0, [x0, w19, sxtw]
 	bl	V2P_block
 	and	w26, w0, 65535
-.L699:
+.L700:
 	ldrh	w0, [x22]
 	cmp	w0, w20
-	bhi	.L703
+	bhi	.L704
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L698
-.L703:
+	b	.L699
+.L704:
 	add	x0, x23, :lo12:.LANCHOR75
 	add	w27, w20, 1
 	ldrh	w0, [x0, w20, sxtw 1]
 	cmp	w0, w26
-	bne	.L700
+	bne	.L701
 	mov	w0, w26
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
@@ -5160,22 +5171,22 @@ FtlGcFreeBadSuperBlk:
 	sxtw	x3, w27
 	and	x4, x20, 65535
 	mov	x0, 0
-.L701:
+.L702:
 	add	w2, w20, w0
 	cmp	w1, w2, uxth
-	bhi	.L702
+	bhi	.L703
 	sub	w1, w1, #1
 	strh	w1, [x22]
-.L700:
+.L701:
 	and	w20, w27, 65535
-	b	.L699
-.L702:
+	b	.L700
+.L703:
 	add	x2, x3, x0
 	ldrh	w5, [x24, x2, lsl 1]
 	add	x2, x4, x0
 	add	x0, x0, 1
 	strh	w5, [x24, x2, lsl 1]
-	b	.L701
+	b	.L702
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
 	.section	.text.update_vpc_list,"ax",@progbits
 	.align	2
@@ -5190,42 +5201,42 @@ update_vpc_list:
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ubfiz	x0, x19, 1, 16
 	ldrh	w0, [x1, x0]
-	cbnz	w0, .L710
+	cbnz	w0, .L711
 	adrp	x0, .LANCHOR72
 	ldrh	w1, [x0, #:lo12:.LANCHOR72]
 	cmp	w1, w19
-	bne	.L711
+	bne	.L712
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR72]
-.L711:
+.L712:
 	adrp	x0, .LANCHOR73
 	ldrh	w1, [x0, #:lo12:.LANCHOR73]
 	cmp	w1, w19
-	bne	.L712
+	bne	.L713
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR73]
-.L712:
+.L713:
 	adrp	x0, .LANCHOR145
 	ldrh	w1, [x0, #:lo12:.LANCHOR145]
 	cmp	w1, w19
-	bne	.L713
+	bne	.L714
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR145]
-.L714:
+.L715:
 	adrp	x20, .LANCHOR44
 	mov	w1, w19
 	adrp	x0, .LANCHOR41
 	add	x0, x0, :lo12:.LANCHOR41
 	bl	List_remove_node
 	ldrh	w0, [x20, #:lo12:.LANCHOR44]
-	cbnz	w0, .L716
+	cbnz	w0, .L717
 	adrp	x1, .LANCHOR146
 	adrp	x0, .LC1
 	mov	w2, 2824
 	add	x1, x1, :lo12:.LANCHOR146
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L716:
+.L717:
 	ldrh	w0, [x20, #:lo12:.LANCHOR44]
 	sub	w0, w0, #1
 	strh	w0, [x20, #:lo12:.LANCHOR44]
@@ -5240,39 +5251,39 @@ update_vpc_list:
 	adrp	x1, .LANCHOR5
 	ldrh	w1, [x1, #:lo12:.LANCHOR5]
 	cmp	w0, w1
-	ble	.L720
+	ble	.L721
 	adrp	x1, .LANCHOR146
 	adrp	x0, .LC1
 	mov	w2, 2827
 	add	x1, x1, :lo12:.LANCHOR146
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L720:
+.L721:
 	mov	w0, 1
-	b	.L709
-.L713:
+	b	.L710
+.L714:
 	adrp	x0, .LANCHOR51
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w19
-	beq	.L719
+	beq	.L720
 	adrp	x0, .LANCHOR52
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
-	beq	.L719
+	beq	.L720
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w19
-	bne	.L714
-.L719:
+	bne	.L715
+.L720:
 	mov	w0, 0
-.L709:
+.L710:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L710:
+.L711:
 	mov	w0, w19
 	bl	List_update_data_list
-	b	.L719
+	b	.L720
 	.size	update_vpc_list, .-update_vpc_list
 	.section	.text.decrement_vpc_count,"ax",@progbits
 	.align	2
@@ -5286,12 +5297,12 @@ decrement_vpc_count:
 	str	x21, [sp, 32]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L723
+	beq	.L724
 	adrp	x21, .LANCHOR42
 	ubfiz	x20, x19, 1, 16
 	ldr	x1, [x21, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x20]
-	cbnz	w0, .L724
+	cbnz	w0, .L725
 	mov	w2, 0
 	mov	w1, w19
 	adrp	x0, .LC21
@@ -5299,37 +5310,37 @@ decrement_vpc_count:
 	bl	printf
 	ldr	x0, [x21, #:lo12:.LANCHOR42]
 	ldrh	w0, [x0, x20]
-	cbz	w0, .L725
-.L730:
+	cbz	w0, .L726
+.L731:
 	mov	w20, 0
-.L722:
+.L723:
 	mov	w0, w20
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L725:
+.L726:
 	mov	w2, 2842
 	adrp	x1, .LANCHOR147
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR147
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	b	.L730
-.L724:
+	b	.L731
+.L725:
 	sub	w0, w0, #1
 	strh	w0, [x1, x20]
-.L723:
+.L724:
 	adrp	x21, .LANCHOR131
 	mov	w1, 65535
 	ldrh	w0, [x21, #:lo12:.LANCHOR131]
 	cmp	w0, w1
-	bne	.L727
+	bne	.L728
 	strh	w19, [x21, #:lo12:.LANCHOR131]
-	b	.L730
-.L727:
+	b	.L731
+.L728:
 	cmp	w19, w0
-	beq	.L730
+	beq	.L731
 	bl	update_vpc_list
 	cmp	w0, 0
 	adrp	x1, .LANCHOR40
@@ -5347,16 +5358,16 @@ decrement_vpc_count:
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	and	x2, x0, 65535
 	ldrh	w1, [x1, x2, lsl 1]
-	cbnz	w1, .L722
+	cbnz	w1, .L723
 	cmp	w19, w0, uxth
-	beq	.L722
+	beq	.L723
 	mov	w2, 2858
 	adrp	x1, .LANCHOR147
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR147
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	b	.L722
+	b	.L723
 	.size	decrement_vpc_count, .-decrement_vpc_count
 	.section	.text.FtlSuperblockPowerLostFix,"ax",@progbits
 	.align	2
@@ -5393,10 +5404,10 @@ FtlSuperblockPowerLostFix:
 	mov	w1, 22136
 	movk	w1, 0x1234, lsl 16
 	str	w1, [x0, 4]
-.L737:
+.L738:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L733
-.L734:
+	cbnz	w0, .L734
+.L735:
 	ldrh	w0, [x19]
 	adrp	x1, .LANCHOR42
 	ldrh	w3, [x19, 4]
@@ -5414,12 +5425,12 @@ FtlSuperblockPowerLostFix:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 80
 	ret
-.L733:
+.L734:
 	mov	x0, x19
 	bl	get_new_active_ppa
 	str	w0, [x29, 52]
 	cmn	w0, #1
-	beq	.L734
+	beq	.L735
 	ldr	w0, [x22]
 	mov	w3, 0
 	str	w0, [x21, 4]
@@ -5434,8 +5445,8 @@ FtlSuperblockPowerLostFix:
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
 	subs	w20, w20, #1
-	bne	.L737
-	b	.L734
+	bne	.L738
+	b	.L735
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
 	.section	.text.FtlMakeBbt,"ax",@progbits
 	.align	2
@@ -5461,42 +5472,42 @@ FtlMakeBbt:
 	adrp	x0, .LANCHOR10
 	add	x0, x0, :lo12:.LANCHOR10
 	str	x0, [x29, 120]
-.L746:
+.L747:
 	ldr	x0, [x29, 120]
 	ldrh	w0, [x0]
 	cmp	w22, w0
-	bcc	.L752
+	bcc	.L753
 	adrp	x21, .LANCHOR25
 	add	x21, x21, :lo12:.LANCHOR25
 	mov	w19, 0
-.L753:
+.L754:
 	ldrh	w0, [x21]
 	cmp	w0, w19
-	bhi	.L754
+	bhi	.L755
 	add	x21, x20, :lo12:.LANCHOR37
 	mov	w22, 65535
 	ldrh	w19, [x21, 12]
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L755:
+.L756:
 	ldrh	w0, [x21, 12]
 	sub	w0, w0, #47
 	cmp	w0, w19
-	bgt	.L759
+	bgt	.L760
 	mov	w0, w19
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L756
+	beq	.L757
 	mov	w0, w19
 	bl	FlashTestBlk
-	cbz	w0, .L757
+	cbz	w0, .L758
 	mov	w0, w19
 	bl	FtlBbmMapBadBlock
-.L756:
+.L757:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L755
-.L752:
+	b	.L756
+.L753:
 	adrp	x2, .LANCHOR114
 	adrp	x0, .LANCHOR106
 	add	x19, x28, :lo12:.LANCHOR138
@@ -5508,7 +5519,7 @@ FtlMakeBbt:
 	stp	x0, x26, [x19, 8]
 	adrp	x23, .LANCHOR17
 	str	x2, [x29, 112]
-	beq	.L747
+	beq	.L748
 	ldrh	w4, [x23, #:lo12:.LANCHOR17]
 	mov	w2, 1
 	madd	w27, w4, w22, w1
@@ -5523,14 +5534,14 @@ FtlMakeBbt:
 	add	w2, w2, 7
 	lsr	w2, w2, 3
 	bl	ftl_memcpy
-.L748:
+.L749:
 	mov	w0, w27
 	add	w22, w22, 1
 	bl	FtlBbmMapBadBlock
 	add	x24, x24, 8
 	add	x21, x21, 2
-	b	.L746
-.L747:
+	b	.L747
+.L748:
 	mov	w1, w22
 	bl	FlashGetBadBlockList
 	ldr	x0, [x19, 8]
@@ -5543,12 +5554,12 @@ FtlMakeBbt:
 	add	x0, x0, :lo12:.LANCHOR127
 	and	w19, w19, 65535
 	str	x0, [x29, 104]
-.L749:
+.L750:
 	ldrh	w0, [x23]
 	madd	w0, w22, w0, w19
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L750
+	beq	.L751
 	ldr	x0, [x29, 112]
 	mov	w2, 16
 	strh	w19, [x21]
@@ -5586,29 +5597,29 @@ FtlMakeBbt:
 	bl	FlashProgPages
 	ldr	w0, [x25]
 	cmn	w0, #1
-	bne	.L748
+	bne	.L749
 	mov	w0, w27
 	bl	FtlBbmMapBadBlock
-	b	.L749
-.L750:
+	b	.L750
+.L751:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L749
-.L754:
+	b	.L750
+.L755:
 	mov	w0, w19
 	add	w19, w19, 1
 	bl	FtlBbmMapBadBlock
 	and	w19, w19, 65535
-	b	.L753
-.L757:
+	b	.L754
+.L758:
 	ldrh	w0, [x21]
 	cmp	w0, w22
-	bne	.L758
+	bne	.L759
 	strh	w19, [x21]
-	b	.L756
-.L758:
-	strh	w19, [x21, 4]
+	b	.L757
 .L759:
+	strh	w19, [x21, 4]
+.L760:
 	adrp	x0, .LANCHOR79
 	add	x19, x20, :lo12:.LANCHOR37
 	ldrh	w1, [x20, #:lo12:.LANCHOR37]
@@ -5663,18 +5674,18 @@ js_hash:
 	mov	w0, 42982
 	mov	x3, 0
 	movk	w0, 0x47c6, lsl 16
-.L767:
+.L768:
 	cmp	w1, w3
-	bhi	.L768
+	bhi	.L769
 	ret
-.L768:
+.L769:
 	lsr	w2, w0, 2
 	ldrb	w5, [x4, x3]
 	add	w2, w2, w0, lsl 5
 	add	x3, x3, 1
 	add	w2, w2, w5
 	eor	w0, w0, w2
-	b	.L767
+	b	.L768
 	.size	js_hash, .-js_hash
 	.section	.text.Ftl_write_map_blk_to_last_page,"ax",@progbits
 	.align	2
@@ -5691,16 +5702,16 @@ Ftl_write_map_blk_to_last_page:
 	ldrh	w0, [x0]
 	stp	x23, x24, [sp, 48]
 	cmp	w0, w1
-	bne	.L770
+	bne	.L771
 	ldrh	w0, [x19, 8]
-	cbz	w0, .L771
+	cbz	w0, .L772
 	adrp	x1, .LANCHOR148
 	adrp	x0, .LC1
 	mov	w2, 641
 	add	x1, x1, :lo12:.LANCHOR148
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L771:
+.L772:
 	ldrh	w0, [x19, 8]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
@@ -5711,14 +5722,14 @@ Ftl_write_map_blk_to_last_page:
 	add	w0, w0, 1
 	strh	wzr, [x19]
 	str	w0, [x19, 48]
-.L772:
+.L773:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L770:
+.L771:
 	ubfiz	x0, x0, 1, 16
 	adrp	x2, .LANCHOR114
 	adrp	x24, .LANCHOR106
@@ -5749,9 +5760,9 @@ Ftl_write_map_blk_to_last_page:
 	mov	x0, 0
 	ldr	x3, [x24, #:lo12:.LANCHOR106]
 	mov	w1, 0
-.L773:
+.L774:
 	cmp	w4, w0, uxth
-	bhi	.L775
+	bhi	.L776
 	add	x20, x20, :lo12:.LANCHOR138
 	adrp	x0, .LANCHOR23
 	ldrh	w1, [x0, #:lo12:.LANCHOR23]
@@ -5768,11 +5779,11 @@ Ftl_write_map_blk_to_last_page:
 	strh	w0, [x19, 2]
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-	b	.L772
-.L775:
+	b	.L773
+.L776:
 	ldr	w2, [x23, x0, lsl 2]
 	cmp	w22, w2, lsr 10
-	bne	.L774
+	bne	.L775
 	add	w1, w1, 1
 	and	w1, w1, 65535
 	ubfiz	x2, x1, 1, 16
@@ -5780,9 +5791,9 @@ Ftl_write_map_blk_to_last_page:
 	add	x2, x2, 1
 	ldr	w5, [x23, x0, lsl 2]
 	str	w5, [x3, x2, lsl 2]
-.L774:
+.L775:
 	add	x0, x0, 1
-	b	.L773
+	b	.L774
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
 	.section	.text.FtlMapWritePage,"ax",@progbits
 	.align	2
@@ -5806,7 +5817,7 @@ FtlMapWritePage:
 	add	x28, x26, :lo12:.LANCHOR20
 	stp	x21, x22, [sp, 32]
 	mov	w22, 0
-.L781:
+.L782:
 	ldr	w0, [x23]
 	ldrh	w1, [x19, 2]
 	add	w0, w0, 1
@@ -5814,35 +5825,35 @@ FtlMapWritePage:
 	ldrh	w0, [x26, #:lo12:.LANCHOR20]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	bge	.L782
+	bge	.L783
 	ldrh	w1, [x19]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L783
-.L782:
+	bne	.L784
+.L783:
 	mov	x0, x19
 	bl	Ftl_write_map_blk_to_last_page
-.L783:
+.L784:
 	ldrh	w1, [x19]
 	ldr	x0, [x19, 16]
 	ldrh	w0, [x0, x1, lsl 1]
-	cbnz	w0, .L784
+	cbnz	w0, .L785
 	adrp	x0, .LC1
 	mov	w2, 700
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L784:
+.L785:
 	ldrh	w1, [x19]
 	ldrh	w0, [x19, 10]
 	cmp	w1, w0
-	bcc	.L785
+	bcc	.L786
 	adrp	x0, .LC1
 	mov	w2, 701
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L785:
+.L786:
 	ldrh	w1, [x19]
 	adrp	x21, .LANCHOR138
 	ldr	x0, [x19, 16]
@@ -5883,7 +5894,7 @@ FtlMapWritePage:
 	and	w0, w0, 65535
 	strh	w0, [x19, 2]
 	cmn	w1, #1
-	bne	.L786
+	bne	.L787
 	ldr	w1, [x20, 4]
 	adrp	x0, .LC22
 	add	x0, x0, :lo12:.LC22
@@ -5892,37 +5903,37 @@ FtlMapWritePage:
 	bl	printf
 	ldrh	w0, [x19, 2]
 	cmp	w0, 2
-	bhi	.L787
+	bhi	.L788
 	ldrh	w0, [x28]
 	sub	w0, w0, #1
 	strh	w0, [x19, 2]
-.L787:
+.L788:
 	cmp	w22, 3
-	bls	.L788
+	bls	.L789
 	add	x21, x21, :lo12:.LANCHOR138
 	adrp	x0, .LC23
 	mov	w2, w22
 	add	x0, x0, :lo12:.LC23
 	ldr	w1, [x21, 4]
 	bl	printf
+.L790:
+	b	.L790
 .L789:
-	b	.L789
-.L788:
 	ldr	w0, [x19, 52]
-	cbz	w0, .L781
-.L803:
-	b	.L803
-.L786:
+	cbz	w0, .L782
+.L804:
+	b	.L804
+.L787:
 	cmp	w0, 1
-	beq	.L792
+	beq	.L793
 	cmp	w1, 256
-	beq	.L792
+	beq	.L793
 	ldr	w0, [x19, 56]
-	cbz	w0, .L793
-.L792:
-	str	wzr, [x19, 56]
-	b	.L781
+	cbz	w0, .L794
 .L793:
+	str	wzr, [x19, 56]
+	b	.L782
+.L794:
 	ldr	x0, [x19, 40]
 	ldr	w1, [x20, 4]
 	ldp	x21, x22, [sp, 32]
@@ -5952,20 +5963,20 @@ load_l2p_region:
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
 	cmp	w0, w20
-	bcs	.L806
+	bcs	.L807
 	adrp	x1, .LANCHOR150
 	adrp	x0, .LC1
 	mov	w2, 485
 	add	x1, x1, :lo12:.LANCHOR150
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L806:
+.L807:
 	adrp	x27, .LANCHOR124
 	ubfiz	x0, x20, 2, 16
 	adrp	x22, .LANCHOR55
 	ldr	x1, [x27, #:lo12:.LANCHOR124]
 	ldr	w23, [x1, x0]
-	cbnz	w23, .L807
+	cbnz	w23, .L808
 	ldr	x0, [x22, #:lo12:.LANCHOR55]
 	lsl	x19, x19, 4
 	adrp	x1, .LANCHOR23
@@ -5978,7 +5989,7 @@ load_l2p_region:
 	add	x1, x0, x19
 	strh	w20, [x0, x19]
 	str	wzr, [x1, 4]
-.L808:
+.L809:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -5987,7 +5998,7 @@ load_l2p_region:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L807:
+.L808:
 	ldr	x0, [x22, #:lo12:.LANCHOR55]
 	lsl	x19, x19, 4
 	adrp	x26, .LANCHOR138
@@ -6006,7 +6017,7 @@ load_l2p_region:
 	ldr	x25, [x21, 16]
 	ldrh	w0, [x25, 8]
 	cmp	w0, w20
-	beq	.L809
+	beq	.L810
 	mov	w2, w23
 	mov	w1, w20
 	adrp	x0, .LC24
@@ -6024,26 +6035,26 @@ load_l2p_region:
 	mov	w2, 4
 	add	x0, x0, :lo12:.LC25
 	bl	rknand_print_hex
-.L810:
+.L811:
 	ldrh	w0, [x25, 8]
 	cmp	w0, w20
-	beq	.L811
+	beq	.L812
 	adrp	x1, .LANCHOR150
 	adrp	x0, .LC1
 	mov	w2, 508
 	add	x1, x1, :lo12:.LANCHOR150
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L811:
+.L812:
 	ldr	x0, [x22, #:lo12:.LANCHOR55]
 	add	x1, x0, x19
 	str	wzr, [x1, 4]
 	strh	w20, [x0, x19]
-	b	.L808
-.L809:
+	b	.L809
+.L810:
 	ldr	w0, [x26, #:lo12:.LANCHOR138]
 	cmp	w0, 256
-	bne	.L810
+	bne	.L811
 	mov	w2, w23
 	mov	w1, w20
 	adrp	x0, .LC26
@@ -6056,7 +6067,7 @@ load_l2p_region:
 	adrp	x0, .LANCHOR129
 	add	x0, x0, :lo12:.LANCHOR129
 	bl	FtlMapWritePage
-	b	.L810
+	b	.L811
 	.size	load_l2p_region, .-load_l2p_region
 	.section	.text.ftl_map_blk_gc,"ax",@progbits
 	.align	2
@@ -6079,12 +6090,12 @@ ftl_map_blk_gc:
 	ldrh	w2, [x19, 8]
 	sub	w1, w1, #5
 	cmp	w2, w1
-	blt	.L814
+	blt	.L815
 	ubfiz	x0, x0, 1, 16
 	ldrh	w22, [x20, x0]
-	cbz	w22, .L814
+	cbz	w22, .L815
 	ldr	w1, [x19, 52]
-	cbnz	w1, .L814
+	cbnz	w1, .L815
 	mov	w1, 1
 	str	w1, [x19, 52]
 	strh	wzr, [x20, x0]
@@ -6094,31 +6105,31 @@ ftl_map_blk_gc:
 	strh	w0, [x19, 8]
 	ldrh	w0, [x24, #:lo12:.LANCHOR20]
 	cmp	w1, w0
-	bcc	.L815
+	bcc	.L816
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L815:
+.L816:
 	adrp	x26, .LANCHOR138
 	adrp	x23, .LANCHOR151
 	add	x27, x26, :lo12:.LANCHOR138
 	add	x23, x23, :lo12:.LANCHOR151
 	mov	w20, 0
-.L816:
+.L817:
 	ldrh	w0, [x19, 6]
 	cmp	w0, w20
-	bhi	.L823
+	bhi	.L824
 	mov	w1, 1
 	mov	w0, w22
 	bl	FtlFreeSysBlkQueueIn
 	str	wzr, [x19, 52]
-.L814:
+.L815:
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x24, #:lo12:.LANCHOR20]
 	cmp	w1, w0
-	bcc	.L824
+	bcc	.L825
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L824:
+.L825:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6127,12 +6138,12 @@ ftl_map_blk_gc:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L823:
+.L824:
 	ubfiz	x0, x20, 2, 16
 	add	x28, x25, x0
 	ldr	w1, [x25, x0]
 	cmp	w22, w1, lsr 10
-	bne	.L817
+	bne	.L818
 	adrp	x2, .LANCHOR107
 	add	x0, x26, :lo12:.LANCHOR138
 	ldr	x2, [x2, #:lo12:.LANCHOR107]
@@ -6146,36 +6157,36 @@ ftl_map_blk_gc:
 	bl	FlashReadPages
 	ldrh	w0, [x21, 8]
 	cmp	w0, w20
-	beq	.L818
+	beq	.L819
 	adrp	x0, .LC1
 	mov	w2, 611
 	mov	x1, x23
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L818:
+.L819:
 	ldr	w0, [x27]
 	cmn	w0, #1
-	bne	.L819
-.L821:
+	bne	.L820
+.L822:
 	str	wzr, [x28]
+.L821:
+	b	.L821
 .L820:
-	b	.L820
-.L819:
 	ldrh	w0, [x21, 8]
 	cmp	w0, w20
-	bne	.L821
+	bne	.L822
 	ldrh	w1, [x21]
 	ldrh	w0, [x19, 4]
 	cmp	w1, w0
-	bne	.L821
+	bne	.L822
 	ldr	x2, [x27, 8]
 	mov	w1, w20
 	mov	x0, x19
 	bl	FtlMapWritePage
-.L817:
+.L818:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L816
+	b	.L817
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
 	.section	.text.flush_l2p_region,"ax",@progbits
 	.align	2
@@ -6217,27 +6228,27 @@ l2p_flush:
 	str	x21, [sp, 32]
 	mov	w19, 0
 	adrp	x21, .LANCHOR55
-.L833:
+.L834:
 	ldrh	w0, [x20]
 	cmp	w0, w19
-	bhi	.L835
+	bhi	.L836
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L835:
+.L836:
 	ldr	x1, [x21, #:lo12:.LANCHOR55]
 	ubfiz	x0, x19, 4, 16
 	add	x0, x1, x0
 	ldr	w0, [x0, 4]
-	tbz	w0, #31, .L834
+	tbz	w0, #31, .L835
 	mov	w0, w19
 	bl	flush_l2p_region
-.L834:
+.L835:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L833
+	b	.L834
 	.size	l2p_flush, .-l2p_flush
 	.section	.text.log2phys,"ax",@progbits
 	.align	2
@@ -6259,17 +6270,17 @@ log2phys:
 	ldr	w1, [x0, #:lo12:.LANCHOR152]
 	mov	w21, w2
 	cmp	w25, w1
-	bcc	.L838
+	bcc	.L839
 	adrp	x1, .LANCHOR153
 	adrp	x0, .LC1
 	mov	w2, 813
 	add	x1, x1, :lo12:.LANCHOR153
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L838:
+.L839:
 	ldr	w0, [x19, #:lo12:.LANCHOR152]
 	cmp	w25, w0
-	bcs	.L839
+	bcs	.L840
 	adrp	x23, .LANCHOR55
 	add	w24, w24, 7
 	adrp	x0, .LANCHOR33
@@ -6278,10 +6289,10 @@ log2phys:
 	and	w22, w22, 65535
 	ldrh	w1, [x0, #:lo12:.LANCHOR33]
 	mov	x0, 0
-.L840:
+.L841:
 	and	x19, x0, 65535
 	cmp	w19, w1
-	bcc	.L845
+	bcc	.L846
 	bl	select_l2p_ram_region
 	and	x19, x0, 65535
 	ldr	x2, [x23, #:lo12:.LANCHOR55]
@@ -6291,33 +6302,33 @@ log2phys:
 	ldrh	w2, [x2, x1]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L846
+	beq	.L847
 	ldr	w1, [x3, 4]
-	tbz	w1, #31, .L846
+	tbz	w1, #31, .L847
 	bl	flush_l2p_region
-.L846:
+.L847:
 	mov	w1, w26
 	mov	w0, w22
 	bl	load_l2p_region
-	b	.L842
-.L839:
+	b	.L843
+.L840:
 	mov	w0, -1
-	cbnz	w21, .L837
+	cbnz	w21, .L838
 	str	w0, [x20]
-.L837:
+.L838:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L845:
+.L846:
 	add	x0, x0, 1
 	add	x3, x2, x0, lsl 4
 	ldrh	w3, [x3, -16]
 	cmp	w3, w22
-	bne	.L840
-.L842:
+	bne	.L841
+.L843:
 	mov	x0, 1
 	ldr	x1, [x23, #:lo12:.LANCHOR55]
 	lsl	x0, x0, x24
@@ -6325,22 +6336,22 @@ log2phys:
 	and	w0, w0, w25
 	and	x0, x0, 65535
 	add	x1, x1, x19, lsl 4
-	cbnz	w21, .L843
+	cbnz	w21, .L844
 	ldr	x1, [x1, 8]
 	ldr	w0, [x1, x0, lsl 2]
 	str	w0, [x20]
-.L844:
+.L845:
 	ldr	x0, [x23, #:lo12:.LANCHOR55]
 	add	x19, x0, x19, lsl 4
 	ldr	w0, [x19, 4]
 	cmn	w0, #1
-	beq	.L848
+	beq	.L849
 	add	w0, w0, 1
 	str	w0, [x19, 4]
-.L848:
+.L849:
 	mov	w0, 0
-	b	.L837
-.L843:
+	b	.L838
+.L844:
 	ldr	x2, [x1, 8]
 	ldr	w3, [x20]
 	str	w3, [x2, x0, lsl 2]
@@ -6349,7 +6360,7 @@ log2phys:
 	str	w0, [x1, 4]
 	adrp	x0, .LANCHOR56
 	strh	w22, [x0, #:lo12:.LANCHOR56]
-	b	.L844
+	b	.L845
 	.size	log2phys, .-log2phys
 	.section	.text.FtlReUsePrevPpa,"ax",@progbits
 	.align	2
@@ -6370,10 +6381,10 @@ FtlReUsePrevPpa:
 	and	w3, w0, 65535
 	ubfiz	x20, x3, 1, 16
 	ldrh	w1, [x2, x20]
-	cbnz	w1, .L852
+	cbnz	w1, .L853
 	adrp	x0, .LANCHOR46
 	ldr	x19, [x0, #:lo12:.LANCHOR46]
-	cbz	x19, .L853
+	cbz	x19, .L854
 	adrp	x2, .LANCHOR40
 	mov	x5, -6148914691236517206
 	movk	x5, 0xaaab, lsl 0
@@ -6386,23 +6397,23 @@ FtlReUsePrevPpa:
 	mul	x19, x19, x5
 	mov	w5, 6
 	and	w19, w19, 65535
-.L854:
+.L855:
 	cmp	w1, w4
-	beq	.L853
+	beq	.L854
 	cmp	w19, w3
-	bne	.L855
+	bne	.L856
 	mov	w1, w19
 	add	x0, x0, :lo12:.LANCHOR46
 	bl	List_remove_node
 	ldrh	w0, [x23, #:lo12:.LANCHOR48]
-	cbnz	w0, .L856
+	cbnz	w0, .L857
 	adrp	x1, .LANCHOR154
 	adrp	x0, .LC1
 	mov	w2, 1733
 	add	x1, x1, :lo12:.LANCHOR154
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L856:
+.L857:
 	ldrh	w0, [x23, #:lo12:.LANCHOR48]
 	sub	w0, w0, #1
 	strh	w0, [x23, #:lo12:.LANCHOR48]
@@ -6412,7 +6423,7 @@ FtlReUsePrevPpa:
 	ldrh	w0, [x1, x20]
 	add	w0, w0, 1
 	strh	w0, [x1, x20]
-.L853:
+.L854:
 	add	x1, x29, 76
 	mov	w2, 1
 	mov	w0, w21
@@ -6422,18 +6433,18 @@ FtlReUsePrevPpa:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L855:
+.L856:
 	umull	x19, w19, w5
 	ldrh	w19, [x2, x19]
 	cmp	w19, w6
-	beq	.L853
+	beq	.L854
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L854
-.L852:
+	b	.L855
+.L853:
 	add	w1, w1, 1
 	strh	w1, [x2, x20]
-	b	.L853
+	b	.L854
 	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
 	.section	.text.FtlRecoverySuperblock,"ax",@progbits
 	.align	2
@@ -6451,7 +6462,7 @@ FtlRecoverySuperblock:
 	stp	x25, x26, [sp, 64]
 	cmp	w0, w1
 	stp	x27, x28, [sp, 80]
-	beq	.L989
+	beq	.L990
 	ldrb	w0, [x19, 6]
 	str	w0, [x29, 164]
 	adrp	x0, .LANCHOR19
@@ -6459,11 +6470,11 @@ FtlRecoverySuperblock:
 	str	x0, [x29, 128]
 	ldrh	w2, [x0, #:lo12:.LANCHOR19]
 	cmp	w2, w26
-	bne	.L865
+	bne	.L866
 	strh	wzr, [x19, 4]
-.L996:
+.L997:
 	strb	wzr, [x19, 6]
-.L989:
+.L990:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -6472,17 +6483,17 @@ FtlRecoverySuperblock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L865:
+.L866:
 	ldrh	w0, [x19, 16]
 	mov	w20, 0
-.L866:
+.L867:
 	cmp	w0, w1
-	beq	.L867
+	beq	.L868
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
 	mov	w23, w0
 	cmn	w0, #1
-	beq	.L868
+	beq	.L869
 	adrp	x1, .LANCHOR64
 	adrp	x2, .LANCHOR3
 	adrp	x20, .LANCHOR103
@@ -6503,9 +6514,9 @@ FtlRecoverySuperblock:
 	ldrh	w1, [x2, #:lo12:.LANCHOR3]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.L869:
+.L870:
 	cmp	x4, x1
-	bne	.L873
+	bne	.L874
 	mov	w2, 0
 	mov	w1, w22
 	bl	FlashReadPages
@@ -6519,69 +6530,69 @@ FtlRecoverySuperblock:
 	mov	w3, 0
 	sub	w21, w21, #1
 	str	x0, [x29, 144]
-.L874:
+.L875:
 	cmp	w22, w3
-	bne	.L879
+	bne	.L880
 	add	w22, w23, 1
 	ldr	w0, [x4, 4]
 	and	w22, w22, 65535
-.L991:
+.L992:
 	lsr	w0, w0, 10
 	bl	P2V_plane
 	and	w27, w0, 65535
 	ldr	x0, [x29, 128]
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	cmp	w0, w22
-	bne	.L881
+	bne	.L882
 	strh	w22, [x19, 2]
 	strb	wzr, [x19, 6]
 	strh	wzr, [x19, 4]
-.L881:
+.L882:
 	ldr	w0, [x29, 164]
 	cmp	w22, w26
 	cset	w1, eq
 	cmp	w27, w0
 	cset	w0, eq
 	tst	w1, w0
-	beq	.L882
-.L997:
+	beq	.L883
+.L998:
 	mov	w2, w27
 	mov	w1, w22
 	mov	x0, x19
 	bl	ftl_sb_update_avl_pages
-	b	.L989
-.L867:
+	b	.L990
+.L868:
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	add	x0, x19, x20, sxtw 1
 	ldrh	w0, [x0, 16]
-	b	.L866
-.L868:
-	cbz	w26, .L870
+	b	.L867
+.L869:
+	cbz	w26, .L871
 	adrp	x1, .LANCHOR155
 	adrp	x0, .LC1
 	mov	w2, 1800
 	add	x1, x1, :lo12:.LANCHOR155
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L870:
+.L871:
 	ldr	w0, [x29, 164]
 	cmp	w0, 0
 	ccmp	w20, w0, 4, ne
-	beq	.L871
+	beq	.L872
 	adrp	x1, .LANCHOR155
 	adrp	x0, .LC1
 	mov	w2, 1801
 	add	x1, x1, :lo12:.LANCHOR155
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L871:
+.L872:
 	strh	wzr, [x19, 2]
-	b	.L996
-.L873:
+	b	.L997
+.L874:
 	ldrh	w3, [x4]
 	cmp	w3, w10
-	beq	.L872
+	beq	.L873
 	ubfiz	x2, x22, 5, 16
 	orr	w3, w23, w3, lsl 10
 	add	x2, x0, x2
@@ -6596,90 +6607,90 @@ FtlRecoverySuperblock:
 	asr	w3, w3, 2
 	add	x3, x7, x3, sxtw 2
 	str	x3, [x2, 16]
-.L872:
+.L873:
 	add	x4, x4, 2
-	b	.L869
-.L879:
+	b	.L870
+.L880:
 	ldr	w0, [x11]
-	cbnz	w0, .L875
+	cbnz	w0, .L876
 	ldr	x8, [x11, 16]
 	ldr	w5, [x8, 4]
 	cmn	w5, #1
-	beq	.L876
+	beq	.L877
 	ldr	w1, [x7]
 	mov	w0, w5
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L876
+	cbz	w0, .L877
 	add	w5, w5, 1
 	str	w5, [x7]
-.L876:
+.L877:
 	ldr	w0, [x8]
 	cmn	w0, #1
-	bne	.L878
+	bne	.L879
 	ubfiz	x3, x3, 5, 16
 	and	w22, w23, 65535
 	add	x3, x4, x3
 	ldr	w0, [x3, 4]
-	b	.L991
-.L875:
+	b	.L992
+.L876:
 	mov	w6, w10
-.L878:
+.L879:
 	add	w3, w3, 1
 	add	x11, x11, 32
 	and	w3, w3, 65535
-	b	.L874
-.L882:
+	b	.L875
+.L883:
 	mov	w0, 65535
 	cmp	w6, w0
-	bne	.L883
+	bne	.L884
 	ldrb	w0, [x19, 8]
-	cbnz	w0, .L884
-.L883:
+	cbnz	w0, .L885
+.L884:
 	adrp	x25, .LANCHOR134
 	and	w28, w23, 65535
 	ldr	w0, [x25, #:lo12:.LANCHOR134]
 	cmn	w0, #1
-	bne	.L885
+	bne	.L886
 	str	w21, [x25, #:lo12:.LANCHOR134]
-.L885:
+.L886:
 	add	w0, w26, 7
 	cmp	w0, w23, uxth
-	bge	.L935
+	bge	.L936
 	sub	w24, w28, #7
 	and	w24, w24, 65535
-.L886:
+.L887:
 	ldr	x0, [x29, 152]
 	mov	w3, 65535
 	mov	w5, 1
 	add	x4, x0, :lo12:.LANCHOR3
-.L887:
+.L888:
 	cmp	w24, w28
-	bhi	.L897
+	bhi	.L898
 	ldrh	w1, [x4]
 	mov	w23, 0
 	ldr	x0, [x20, #:lo12:.LANCHOR103]
 	add	x1, x1, 8
 	ldr	x2, [x29, 168]
 	add	x1, x19, x1, lsl 1
-	b	.L898
-.L935:
+	b	.L899
+.L936:
 	mov	w24, w26
-	b	.L886
-.L889:
+	b	.L887
+.L890:
 	ldrh	w6, [x2]
 	cmp	w6, w3
-	beq	.L888
+	beq	.L889
 	ubfiz	x7, x23, 5, 16
 	add	w23, w23, 1
 	add	x7, x0, x7
 	and	w23, w23, 65535
 	orr	w6, w24, w6, lsl 10
 	str	w6, [x7, 4]
-.L888:
+.L889:
 	add	x2, x2, 2
-.L898:
+.L899:
 	cmp	x1, x2
-	bne	.L889
+	bne	.L890
 	mov	w1, w23
 	mov	w2, 0
 	str	w5, [x29, 112]
@@ -6696,21 +6707,21 @@ FtlRecoverySuperblock:
 	add	x23, x2, x23
 	ldr	x4, [x29, 136]
 	mov	w2, 0
-.L890:
+.L891:
 	cmp	x23, x0
-	bne	.L895
-	cbz	w2, .L896
+	bne	.L896
+	cbz	w2, .L897
 	str	w1, [x25, #:lo12:.LANCHOR134]
-.L896:
+.L897:
 	add	w24, w24, 1
 	and	w24, w24, 65535
-	b	.L887
-.L895:
+	b	.L888
+.L896:
 	ldr	w6, [x0, -16]
-	cbz	w6, .L891
-	cbz	w2, .L884
+	cbz	w6, .L892
+	cbz	w2, .L885
 	str	w1, [x25, #:lo12:.LANCHOR134]
-.L884:
+.L885:
 	adrp	x0, .LANCHOR156
 	mov	w23, w26
 	mov	w1, 1
@@ -6718,7 +6729,7 @@ FtlRecoverySuperblock:
 	strh	w1, [x0, #:lo12:.LANCHOR156]
 	add	x0, x28, :lo12:.LANCHOR134
 	str	x0, [x29, 104]
-.L899:
+.L900:
 	ldr	x1, [x29, 152]
 	mov	w24, 0
 	ldr	x0, [x20, #:lo12:.LANCHOR103]
@@ -6727,9 +6738,9 @@ FtlRecoverySuperblock:
 	ldrh	w1, [x1, #:lo12:.LANCHOR3]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.L900:
+.L901:
 	cmp	x1, x2
-	bne	.L902
+	bne	.L903
 	mov	w2, 0
 	mov	w1, w24
 	bl	FlashReadPages
@@ -6739,62 +6750,62 @@ FtlRecoverySuperblock:
 	adrp	x0, .LANCHOR157
 	add	x0, x0, :lo12:.LANCHOR157
 	str	x0, [x29, 120]
-.L903:
+.L904:
 	ldr	x0, [x29, 112]
 	cmp	x25, x0
-	bne	.L929
+	bne	.L930
 	ldr	x0, [x29, 128]
 	add	w23, w23, 1
 	and	w23, w23, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	cmp	w0, w23
-	bne	.L899
+	bne	.L900
 	ldr	x0, [x29, 152]
 	mov	w2, 65535
 	strh	w23, [x19, 2]
 	strh	wzr, [x19, 4]
 	ldrh	w1, [x0, #:lo12:.LANCHOR3]
 	mov	w0, 0
-.L930:
+.L931:
 	cmp	w0, w1
-	beq	.L989
+	beq	.L990
 	ldr	x4, [x29, 168]
 	ldrh	w3, [x4], 2
 	str	x4, [x29, 168]
 	cmp	w3, w2
-	beq	.L931
+	beq	.L932
 	strb	w0, [x19, 6]
-	b	.L989
-.L891:
+	b	.L990
+.L892:
 	ldr	x6, [x0]
 	ldrh	w7, [x6]
 	cmp	w7, w3
-	beq	.L894
+	beq	.L895
 	ldr	w6, [x6, 4]
 	cmn	w6, #1
 	csel	w1, w1, w6, eq
 	csel	w2, w2, w5, eq
-.L894:
+.L895:
 	add	x0, x0, 32
-	b	.L890
-.L897:
+	b	.L891
+.L898:
 	mov	w0, -1
 	str	w0, [x25, #:lo12:.LANCHOR134]
-	b	.L884
-.L902:
+	b	.L885
+.L903:
 	ldrh	w3, [x2]
 	cmp	w3, w5
-	beq	.L901
+	beq	.L902
 	ubfiz	x4, x24, 5, 16
 	add	w24, w24, 1
 	add	x4, x0, x4
 	and	w24, w24, 65535
 	orr	w3, w23, w3, lsl 10
 	str	w3, [x4, 4]
-.L901:
+.L902:
 	add	x2, x2, 2
-	b	.L900
-.L929:
+	b	.L901
+.L930:
 	ldr	x4, [x20, #:lo12:.LANCHOR103]
 	add	x4, x4, x25
 	ldr	w5, [x4, 4]
@@ -6803,38 +6814,38 @@ FtlRecoverySuperblock:
 	bl	P2V_plane
 	and	w0, w0, 65535
 	cmp	w23, w26
-	bcc	.L904
+	bcc	.L905
 	ldr	w1, [x29, 164]
 	ccmp	w1, w0, 0, eq
-	bhi	.L904
+	bhi	.L905
 	cmp	w23, w22
 	ccmp	w27, w0, 0, eq
-	beq	.L905
+	beq	.L906
 	ldr	w0, [x4]
 	cmn	w0, #1
-	beq	.L906
+	beq	.L907
 	ldr	x3, [x4, 16]
 	mov	w0, 61589
 	ldrh	w1, [x3]
 	cmp	w1, w0
-	beq	.L907
+	beq	.L908
 	ldrh	w0, [x19]
-.L993:
+.L994:
 	bl	decrement_vpc_count
-	b	.L904
-.L907:
+	b	.L905
+.L908:
 	ldr	w21, [x3, 4]
 	cmn	w21, #1
-	beq	.L908
+	beq	.L909
 	ldr	x0, [x29, 144]
 	ldr	w1, [x0, #:lo12:.LANCHOR83]
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L908
+	cbz	w0, .L909
 	ldr	x1, [x29, 144]
 	add	w0, w21, 1
 	str	w0, [x1, #:lo12:.LANCHOR83]
-.L908:
+.L909:
 	ldp	w24, w0, [x3, 8]
 	add	x1, x29, 184
 	str	w0, [x29, 180]
@@ -6844,12 +6855,12 @@ FtlRecoverySuperblock:
 	ldr	w1, [x28, #:lo12:.LANCHOR134]
 	ldr	w3, [x29, 180]
 	cmn	w1, #1
-	beq	.L909
+	beq	.L910
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L909
+	cbz	w0, .L910
 	cmn	w3, #1
-	beq	.L910
+	beq	.L911
 	ldr	x0, [x20, #:lo12:.LANCHOR103]
 	mov	w2, 0
 	mov	w1, 1
@@ -6863,15 +6874,15 @@ FtlRecoverySuperblock:
 	add	x3, x0, x25
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	bne	.L911
-.L912:
+	bne	.L912
+.L913:
 	mov	w0, -1
 	str	w0, [x29, 180]
-.L919:
+.L920:
 	ldr	w3, [x29, 180]
 	cmn	w3, #1
-	beq	.L904
-.L934:
+	beq	.L905
+.L935:
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
 	and	w24, w0, 65535
@@ -6879,7 +6890,7 @@ FtlRecoverySuperblock:
 	mov	w3, w24
 	ldrh	w0, [x0, #:lo12:.LANCHOR5]
 	cmp	w0, w24
-	bhi	.L925
+	bhi	.L926
 	mov	w2, 2057
 	adrp	x1, .LANCHOR155
 	adrp	x0, .LC1
@@ -6888,50 +6899,50 @@ FtlRecoverySuperblock:
 	str	w24, [x29, 136]
 	bl	printf
 	ldr	w3, [x29, 136]
-.L925:
+.L926:
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x24, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L926
+	cbz	w0, .L927
 	mov	w0, w3
-	b	.L993
-.L910:
+	b	.L994
+.L911:
 	ldp	w1, w0, [x29, 184]
 	cmp	w1, w0
-	bne	.L904
+	bne	.L905
 	mov	w2, 1
 	add	x1, x29, 180
 	mov	w0, w24
 	bl	log2phys
-.L904:
+.L905:
 	add	x25, x25, 32
-	b	.L903
-.L911:
+	b	.L904
+.L912:
 	ldr	w0, [x4, 8]
 	cmp	w24, w0
-	bne	.L912
+	bne	.L913
 	ldr	w0, [x4, 4]
 	str	w0, [x29, 136]
 	str	x4, [x29, 96]
 	uxtw	x1, w0
 	ldr	w0, [x28, #:lo12:.LANCHOR134]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L912
+	cbz	w0, .L913
 	ldp	w0, w1, [x29, 184]
 	ldr	x4, [x29, 96]
 	cmp	w0, w1
 	ldr	w1, [x29, 180]
-	bne	.L914
-.L992:
+	bne	.L915
+.L993:
 	mov	w0, w24
 	bl	FtlReUsePrevPpa
-	b	.L912
-.L914:
+	b	.L913
+.L915:
 	cmp	w0, w1
-	beq	.L912
+	beq	.L913
 	cmn	w0, #1
-	beq	.L915
+	beq	.L916
 	ldr	x4, [x3, 16]
 	mov	w2, 0
 	str	w0, [x3, 4]
@@ -6940,70 +6951,70 @@ FtlRecoverySuperblock:
 	mov	x0, x3
 	bl	FlashReadPages
 	ldr	x4, [x29, 96]
-.L916:
+.L917:
 	ldr	x0, [x20, #:lo12:.LANCHOR103]
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	beq	.L917
+	beq	.L918
 	ldr	x0, [x29, 104]
 	ldr	w3, [x4, 4]
 	mov	w1, w3
 	ldr	w0, [x0]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L917
+	cbz	w0, .L918
 	ldr	w0, [x29, 136]
 	mov	w1, w3
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L912
-.L917:
+	cbz	w0, .L913
+.L918:
 	ldr	w1, [x29, 180]
-	b	.L992
-.L915:
+	b	.L993
+.L916:
 	str	w0, [x3]
-	b	.L916
-.L909:
+	b	.L917
+.L910:
 	ldp	w1, w0, [x29, 184]
 	cmp	w1, w0
-	beq	.L919
+	beq	.L920
 	cmn	w3, #1
-	beq	.L921
+	beq	.L922
 	adrp	x0, .LANCHOR8
 	ldr	w0, [x0, #:lo12:.LANCHOR8]
 	cmp	w0, w3, lsr 10
-	bhi	.L921
+	bhi	.L922
 	adrp	x0, .LC27
 	mov	w1, w3
 	add	x0, x0, :lo12:.LC27
-.L995:
+.L996:
 	bl	printf
-	b	.L904
-.L921:
+	b	.L905
+.L922:
 	mov	w2, 1
 	add	x1, x29, 188
 	mov	w0, w24
 	bl	log2phys
 	ldr	w3, [x29, 184]
 	cmn	w3, #1
-	beq	.L919
+	beq	.L920
 	ldr	w0, [x29, 180]
 	cmp	w3, w0
-	beq	.L934
+	beq	.L935
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
 	adrp	x1, .LANCHOR51
 	and	w0, w0, 65535
 	ldrh	w1, [x1, #:lo12:.LANCHOR51]
 	cmp	w1, w0
-	beq	.L924
+	beq	.L925
 	adrp	x1, .LANCHOR52
 	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	beq	.L924
+	beq	.L925
 	adrp	x1, .LANCHOR53
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L919
-.L924:
+	bne	.L920
+.L925:
 	ldr	x0, [x20, #:lo12:.LANCHOR103]
 	mov	w2, 0
 	mov	w1, 1
@@ -7014,54 +7025,54 @@ FtlRecoverySuperblock:
 	ldr	x0, [x20, #:lo12:.LANCHOR103]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L919
+	beq	.L920
 	ldr	x4, [x29, 136]
 	mov	w0, w21
 	ldr	w1, [x4, 4]
 	bl	ftl_cmp_data_ver
-	cbnz	w0, .L919
+	cbnz	w0, .L920
 	mov	w2, 1
 	add	x1, x29, 184
 	mov	w0, w24
 	bl	log2phys
-	b	.L919
-.L926:
+	b	.L920
+.L927:
 	adrp	x0, .LC28
 	mov	w1, w24
 	add	x0, x0, :lo12:.LC28
-	b	.L995
-.L906:
+	b	.L996
+.L907:
 	ldr	x0, [x29, 120]
 	ldr	w0, [x0]
 	cmp	w0, 31
-	bhi	.L927
+	bhi	.L928
 	adrp	x1, .LANCHOR158
 	add	x1, x1, :lo12:.LANCHOR158
 	str	w5, [x1, w0, uxtw 2]
 	add	w0, w0, 1
 	ldr	x1, [x29, 120]
 	str	w0, [x1]
-.L927:
+.L928:
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
 	ldr	w0, [x28, #:lo12:.LANCHOR134]
 	cmn	w0, #1
-	bne	.L928
-.L994:
+	bne	.L929
+.L995:
 	str	w21, [x28, #:lo12:.LANCHOR134]
-	b	.L904
-.L928:
+	b	.L905
+.L929:
 	cmp	w21, w0
-	bcs	.L904
-	b	.L994
-.L931:
+	bcs	.L905
+	b	.L995
+.L932:
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L930
-.L905:
+	b	.L931
+.L906:
 	strb	w27, [x19, 6]
 	strh	w22, [x19, 2]
-	b	.L997
+	b	.L998
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
 	.section	.text.ftl_check_vpc,"ax",@progbits
 	.align	2
@@ -7089,10 +7100,10 @@ ftl_check_vpc:
 	mov	w1, 0
 	mov	x0, x19
 	bl	ftl_memset
-.L999:
+.L1000:
 	ldr	w0, [x23]
 	cmp	w22, w0
-	bcc	.L1001
+	bcc	.L1002
 	adrp	x22, .LANCHOR5
 	adrp	x24, .LC30
 	add	x22, x22, :lo12:.LANCHOR5
@@ -7101,13 +7112,13 @@ ftl_check_vpc:
 	mov	w23, 0
 	mov	w19, 0
 	adrp	x25, .LANCHOR42
-.L1002:
+.L1003:
 	ldrh	w0, [x22]
 	cmp	w0, w19
-	bhi	.L1004
+	bhi	.L1005
 	adrp	x0, .LANCHOR46
 	ldr	x19, [x0, #:lo12:.LANCHOR46]
-	cbz	x19, .L1005
+	cbz	x19, .L1006
 	adrp	x0, .LANCHOR48
 	adrp	x25, .LC31
 	add	x20, x20, :lo12:check_vpc_table
@@ -7125,17 +7136,17 @@ ftl_check_vpc:
 	movk	x1, 0xaaab, lsl 0
 	mul	x19, x19, x1
 	and	w19, w19, 65535
-.L1006:
+.L1007:
 	cmp	w22, w26
-	bne	.L1008
-.L1005:
-	cbz	w23, .L998
+	bne	.L1009
+.L1006:
+	cbz	w23, .L999
 	adrp	x0, .LC1
 	mov	w2, 2383
 	add	x1, x21, :lo12:.LANCHOR159
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L998:
+.L999:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -7143,31 +7154,31 @@ ftl_check_vpc:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1001:
+.L1002:
 	mov	w2, 0
 	add	x1, x29, 108
 	mov	w0, w22
 	bl	log2phys
 	ldr	w0, [x29, 108]
 	cmn	w0, #1
-	beq	.L1000
+	beq	.L1001
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	and	x0, x0, 65535
 	ldrh	w1, [x19, x0, lsl 1]
 	add	w1, w1, 1
 	strh	w1, [x19, x0, lsl 1]
-.L1000:
+.L1001:
 	add	w22, w22, 1
-	b	.L999
-.L1004:
+	b	.L1000
+.L1005:
 	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	ubfiz	x28, x19, 1, 16
 	sxtw	x27, w19
 	ldrh	w2, [x0, x28]
 	ldrh	w3, [x26, x27, lsl 1]
 	cmp	w2, w3
-	beq	.L1003
+	beq	.L1004
 	mov	w1, w19
 	mov	x0, x24
 	bl	printf
@@ -7175,34 +7186,34 @@ ftl_check_vpc:
 	mov	w1, 65535
 	ldrh	w0, [x0, x28]
 	cmp	w0, w1
-	beq	.L1003
+	beq	.L1004
 	ldrh	w1, [x26, x27, lsl 1]
 	cmp	w1, w0
 	csinc	w23, w23, wzr, ls
-.L1003:
+.L1004:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1002
-.L1008:
+	b	.L1003
+.L1009:
 	ldr	x1, [x27, #:lo12:.LANCHOR42]
 	ubfiz	x0, x19, 1, 16
 	ldrh	w2, [x1, x0]
-	cbz	w2, .L1007
+	cbz	w2, .L1008
 	ldrh	w3, [x20, w19, sxtw 1]
 	mov	w23, 1
 	mov	w1, w19
 	mov	x0, x25
 	bl	printf
-.L1007:
+.L1008:
 	ldr	x0, [x24, #:lo12:.LANCHOR40]
 	umull	x19, w19, w28
 	ldrh	w19, [x0, x19]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1005
+	beq	.L1006
 	add	w22, w22, 1
 	and	w22, w22, 65535
-	b	.L1006
+	b	.L1007
 	.size	ftl_check_vpc, .-ftl_check_vpc
 	.section	.text.ftl_scan_all_data,"ax",@progbits
 	.align	2
@@ -7224,32 +7235,32 @@ ftl_scan_all_data:
 	add	x21, x21, :lo12:.LANCHOR152
 	str	x23, [sp, 64]
 	bl	printf
-.L1024:
+.L1025:
 	ldr	w0, [x21]
 	cmp	w19, w0
-	bcc	.L1030
+	bcc	.L1031
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x29, x30, [sp, 16]
 	ldr	x23, [sp, 64]
 	add	sp, sp, 96
 	ret
-.L1030:
+.L1031:
 	mov	w2, 0
 	add	x1, x29, 76
 	mov	w0, w19
 	bl	log2phys
 	tst	x19, 2047
-	bne	.L1025
+	bne	.L1026
 	ldr	w2, [x29, 76]
 	adrp	x0, .LC33
 	mov	w1, w19
 	add	x0, x0, :lo12:.LC33
 	bl	printf
-.L1025:
+.L1026:
 	ldr	w1, [x29, 76]
 	cmn	w1, #1
-	beq	.L1027
+	beq	.L1028
 	add	x0, x20, :lo12:.LANCHOR138
 	str	wzr, [x20, #:lo12:.LANCHOR138]
 	mov	w2, 0
@@ -7266,11 +7277,11 @@ ftl_scan_all_data:
 	ldr	w0, [x20, #:lo12:.LANCHOR138]
 	cmp	w0, 256
 	ccmn	w0, #1, 4, ne
-	beq	.L1028
+	beq	.L1029
 	ldr	w0, [x23, 8]
 	cmp	w19, w0
-	beq	.L1027
-.L1028:
+	beq	.L1028
+.L1029:
 	ldp	x1, x0, [x22, 8]
 	ldr	w2, [x1, 4]
 	str	w2, [sp]
@@ -7282,9 +7293,9 @@ ftl_scan_all_data:
 	add	x0, x0, :lo12:.LC34
 	mov	w1, w19
 	bl	printf
-.L1027:
+.L1028:
 	add	w19, w19, 1
-	b	.L1024
+	b	.L1025
 	.size	ftl_scan_all_data, .-ftl_scan_all_data
 	.section	.text.FtlGcScanTempBlk,"ax",@progbits
 	.align	2
@@ -7303,28 +7314,28 @@ FtlGcScanTempBlk:
 	stp	x23, x24, [sp, 48]
 	cmp	w20, w0
 	str	x27, [sp, 80]
-	beq	.L1053
-	cbnz	w20, .L1033
-.L1034:
+	beq	.L1054
+	cbnz	w20, .L1034
+.L1035:
 	bl	FtlGcPageVarInit
-	b	.L1035
-.L1053:
+	b	.L1036
+.L1054:
 	mov	w20, 0
-.L1033:
+.L1034:
 	adrp	x0, .LANCHOR19
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	cmp	w0, w1
-	beq	.L1034
-.L1035:
+	beq	.L1035
+.L1036:
 	adrp	x26, .LANCHOR152
 	add	x26, x26, :lo12:.LANCHOR152
-.L1050:
+.L1051:
 	ldrh	w1, [x19]
 	mov	w0, 65535
 	strb	wzr, [x19, 8]
 	cmp	w1, w0
-	beq	.L1036
-.L1052:
+	beq	.L1037
+.L1053:
 	adrp	x1, .LANCHOR64
 	adrp	x24, .LANCHOR103
 	add	x4, x19, 16
@@ -7342,24 +7353,24 @@ FtlGcScanTempBlk:
 	ldrh	w1, [x1, #:lo12:.LANCHOR3]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.L1037:
+.L1038:
 	cmp	x1, x4
-	bne	.L1039
+	bne	.L1040
 	mov	w1, w21
 	ubfiz	x21, x21, 5, 16
 	mov	x22, 0
 	mov	w2, 0
 	bl	FlashReadPages
-.L1040:
+.L1041:
 	cmp	x21, x22
-	bne	.L1051
+	bne	.L1052
 	adrp	x0, .LANCHOR19
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	cmp	w0, w20
-	bhi	.L1052
-.L1036:
+	bhi	.L1053
+.L1037:
 	strh	w20, [x19, 2]
 	mov	w0, -1
 	strb	wzr, [x19, 6]
@@ -7376,10 +7387,10 @@ FtlGcScanTempBlk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1039:
+.L1040:
 	ldrh	w3, [x4]
 	cmp	w3, w10
-	beq	.L1038
+	beq	.L1039
 	ubfiz	x2, x21, 5, 16
 	orr	w3, w20, w3, lsl 10
 	add	x2, x0, x2
@@ -7394,25 +7405,25 @@ FtlGcScanTempBlk:
 	asr	w3, w3, 2
 	add	x3, x7, x3, sxtw 2
 	str	x3, [x2, 16]
-.L1038:
+.L1039:
 	add	x4, x4, 2
-	b	.L1037
-.L1051:
+	b	.L1038
+.L1052:
 	ldr	x0, [x24, #:lo12:.LANCHOR103]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
 	ldr	w27, [x1, 4]
 	ldr	x23, [x1, 16]
-	cbnz	w0, .L1041
+	cbnz	w0, .L1042
 	ldrh	w1, [x23]
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L1063
+	beq	.L1064
 	ldr	w0, [x23, 8]
 	ldr	w1, [x26]
 	cmp	w0, w1
-	bls	.L1043
-.L1063:
+	bls	.L1044
+.L1064:
 	adrp	x0, .LANCHOR42
 	ldrh	w1, [x19]
 	mov	w20, 0
@@ -7425,26 +7436,26 @@ FtlGcScanTempBlk:
 	strh	w0, [x19]
 	strh	w0, [x1, #:lo12:.LANCHOR145]
 	bl	FtlGcPageVarInit
-	b	.L1050
-.L1043:
+	b	.L1051
+.L1044:
 	add	x1, x29, 108
 	mov	w2, 0
 	bl	log2phys
 	ldr	w0, [x23, 12]
 	ldr	w1, [x29, 108]
 	cmp	w0, w1
-	beq	.L1045
-.L1047:
+	beq	.L1046
+.L1048:
 	ldr	w2, [x23, 8]
-.L1064:
+.L1065:
 	ldr	w0, [x23, 12]
 	mov	w1, w27
 	add	x22, x22, 32
 	bl	FtlGcUpdatePage
-	b	.L1040
-.L1045:
+	b	.L1041
+.L1046:
 	cmn	w0, #1
-	beq	.L1047
+	beq	.L1048
 	str	w0, [x29, 116]
 	adrp	x0, .LANCHOR110
 	mov	w2, 0
@@ -7463,25 +7474,25 @@ FtlGcScanTempBlk:
 	add	x2, x2, x22
 	mov	x0, 0
 	ubfiz	x1, x1, 9, 16
-.L1048:
+.L1049:
 	cmp	x0, x1
-	beq	.L1047
+	beq	.L1048
 	ldr	x4, [x2, 8]
 	ldr	w5, [x4, x0]
 	add	x0, x0, 4
 	add	x4, x3, x0
 	ldr	w4, [x4, -4]
 	cmp	w5, w4
-	beq	.L1048
+	beq	.L1049
 	ldrh	w1, [x19]
 	adrp	x0, .LC35
 	ldr	w2, [x29, 116]
 	add	x0, x0, :lo12:.LC35
 	bl	printf
-	b	.L1063
-.L1041:
-	mov	w2, -1
 	b	.L1064
+.L1042:
+	mov	w2, -1
+	b	.L1065
 	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
 	.section	.text.FtlVendorPartWrite,"ax",@progbits
 	.align	2
@@ -7501,7 +7512,7 @@ FtlVendorPartWrite:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w1, w0
-	bhi	.L1073
+	bhi	.L1074
 	adrp	x0, .LANCHOR22
 	adrp	x25, .LANCHOR12
 	adrp	x26, .LANCHOR23
@@ -7511,9 +7522,9 @@ FtlVendorPartWrite:
 	add	x26, x26, :lo12:.LANCHOR23
 	mov	w23, 0
 	lsr	w21, w28, w21
-.L1067:
-	cbnz	w20, .L1072
-.L1065:
+.L1068:
+	cbnz	w20, .L1073
+.L1066:
 	mov	w0, w23
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -7522,7 +7533,7 @@ FtlVendorPartWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 208
 	ret
-.L1072:
+.L1073:
 	ldrh	w1, [x25]
 	adrp	x0, .LANCHOR123
 	adrp	x27, .LANCHOR108
@@ -7535,9 +7546,9 @@ FtlVendorPartWrite:
 	and	w19, w19, 65535
 	cmp	w20, w19
 	csel	w19, w0, w19, cc
-	cbz	w2, .L1069
+	cbz	w2, .L1070
 	cmp	w19, w1
-	beq	.L1069
+	beq	.L1070
 	ldr	x0, [x27, #:lo12:.LANCHOR108]
 	str	x0, [x29, 120]
 	add	x0, x29, 144
@@ -7547,7 +7558,7 @@ FtlVendorPartWrite:
 	mov	w1, w2
 	add	x0, x29, 112
 	bl	FlashReadPages
-.L1070:
+.L1071:
 	lsl	w4, w19, 9
 	ldr	x0, [x27, #:lo12:.LANCHOR108]
 	lsl	w22, w22, 7
@@ -7568,16 +7579,16 @@ FtlVendorPartWrite:
 	ldr	w4, [x29, 108]
 	csinv	w23, w23, wzr, ne
 	add	x24, x24, x4, sxtw
-	b	.L1067
-.L1069:
+	b	.L1068
+.L1070:
 	ldrh	w2, [x26]
 	mov	w1, 0
 	ldr	x0, [x27, #:lo12:.LANCHOR108]
 	bl	ftl_memset
-	b	.L1070
-.L1073:
+	b	.L1071
+.L1074:
 	mov	w23, -1
-	b	.L1065
+	b	.L1066
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.section	.text.Ftl_save_ext_data,"ax",@progbits
 	.align	2
@@ -7590,7 +7601,7 @@ Ftl_save_ext_data:
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1078
+	bne	.L1079
 	mov	w0, 72
 	mov	w1, 1
 	movk	w0, 0x5000, lsl 16
@@ -7633,7 +7644,7 @@ Ftl_save_ext_data:
 	str	w0, [x2, 48]
 	mov	w0, 0
 	b	FtlVendorPartWrite
-.L1078:
+.L1079:
 	ret
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
 	.section	.text.FtlEctTblFlush,"ax",@progbits
@@ -7644,20 +7655,20 @@ FtlEctTblFlush:
 	adrp	x2, .LANCHOR164
 	ldrh	w1, [x2, #:lo12:.LANCHOR164]
 	cmp	w1, 31
-	bhi	.L1084
+	bhi	.L1085
 	add	w1, w1, 1
 	strh	w1, [x2, #:lo12:.LANCHOR164]
 	mov	w1, 1
-.L1081:
+.L1082:
 	adrp	x2, .LANCHOR118
-	cbnz	w0, .L1082
+	cbnz	w0, .L1083
 	ldr	x0, [x2, #:lo12:.LANCHOR118]
 	ldr	w3, [x0, 20]
 	ldr	w0, [x0, 16]
 	add	w1, w1, w3
 	cmp	w0, w1
-	bcc	.L1086
-.L1082:
+	bcc	.L1087
+.L1083:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	ldr	x2, [x2, #:lo12:.LANCHOR118]
@@ -7680,10 +7691,10 @@ FtlEctTblFlush:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1084:
+.L1085:
 	mov	w1, 32
-	b	.L1081
-.L1086:
+	b	.L1082
+.L1087:
 	mov	w0, 0
 	ret
 	.size	FtlEctTblFlush, .-FtlEctTblFlush
@@ -7713,7 +7724,7 @@ FtlVendorPartRead:
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	cmp	w1, w0
-	bhi	.L1098
+	bhi	.L1099
 	adrp	x0, .LANCHOR22
 	mov	x25, x2
 	mov	w24, 0
@@ -7723,9 +7734,9 @@ FtlVendorPartRead:
 	add	x0, x0, :lo12:.LANCHOR12
 	str	x0, [x29, 104]
 	lsr	w20, w22, w20
-.L1091:
-	cbnz	w21, .L1097
-.L1089:
+.L1092:
+	cbnz	w21, .L1098
+.L1090:
 	mov	w0, w24
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -7734,7 +7745,7 @@ FtlVendorPartRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 208
 	ret
-.L1097:
+.L1098:
 	ldr	x0, [x27, #:lo12:.LANCHOR123]
 	ldr	w4, [x0, w20, uxtw 2]
 	ldr	x0, [x29, 104]
@@ -7747,7 +7758,7 @@ FtlVendorPartRead:
 	cmp	w21, w19
 	csel	w19, w0, w19, cc
 	lsl	w26, w19, 9
-	cbz	w4, .L1093
+	cbz	w4, .L1094
 	adrp	x28, .LANCHOR108
 	mov	w2, 1
 	str	w4, [x29, 96]
@@ -7767,7 +7778,7 @@ FtlVendorPartRead:
 	csinv	w24, w24, wzr, ne
 	ldr	w0, [x0, #:lo12:.LANCHOR138]
 	cmp	w0, 256
-	bne	.L1095
+	bne	.L1096
 	mov	w2, w4
 	mov	w1, w20
 	adrp	x0, .LC36
@@ -7780,28 +7791,28 @@ FtlVendorPartRead:
 	add	x0, x0, :lo12:.LANCHOR161
 	bl	FtlMapWritePage
 	ldr	x5, [x29, 96]
-.L1095:
+.L1096:
 	ldr	x1, [x5, #:lo12:.LANCHOR108]
 	lsl	w23, w23, 7
 	mov	w2, w26
 	mov	x0, x25
 	add	x1, x1, x23, sxtw 2
 	bl	ftl_memcpy
-.L1096:
+.L1097:
 	add	w20, w20, 1
 	sub	w21, w21, w19
 	add	w22, w22, w19
 	add	x25, x25, x26, sxtw
-	b	.L1091
-.L1093:
+	b	.L1092
+.L1094:
 	mov	w2, w26
 	mov	w1, 0
 	mov	x0, x25
 	bl	ftl_memset
-	b	.L1096
-.L1098:
+	b	.L1097
+.L1099:
 	mov	w24, -1
-	b	.L1089
+	b	.L1090
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
 	.section	.text.FtlLoadEctTbl,"ax",@progbits
 	.align	2
@@ -7822,7 +7833,7 @@ FtlLoadEctTbl:
 	mov	w0, 17221
 	movk	w0, 0x4254, lsl 16
 	cmp	w1, w0
-	beq	.L1101
+	beq	.L1102
 	adrp	x1, .LC37
 	adrp	x0, .LC38
 	add	x1, x1, :lo12:.LC37
@@ -7833,7 +7844,7 @@ FtlLoadEctTbl:
 	ldrh	w2, [x20, #:lo12:.LANCHOR116]
 	lsl	w2, w2, 9
 	bl	ftl_memset
-.L1101:
+.L1102:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -7858,18 +7869,18 @@ Ftl_load_ext_data:
 	mov	w20, 19539
 	movk	w20, 0x4654, lsl 16
 	cmp	w0, w20
-	beq	.L1104
+	beq	.L1105
 	mov	w2, 512
 	mov	w1, 0
 	mov	x0, x21
 	bl	ftl_memset
 	str	w20, [x19, #:lo12:.LANCHOR135]
-.L1104:
+.L1105:
 	ldr	w1, [x19, #:lo12:.LANCHOR135]
 	add	x0, x19, :lo12:.LANCHOR135
 	cmp	w1, w20
 	adrp	x1, .LANCHOR91
-	bne	.L1105
+	bne	.L1106
 	adrp	x2, .LANCHOR162
 	ldr	w3, [x0, 88]
 	str	w3, [x2, #:lo12:.LANCHOR162]
@@ -7904,7 +7915,7 @@ Ftl_load_ext_data:
 	ldr	w2, [x0, 48]
 	adrp	x0, .LANCHOR93
 	str	w2, [x0, #:lo12:.LANCHOR93]
-.L1105:
+.L1106:
 	adrp	x0, .LANCHOR14
 	adrp	x2, .LANCHOR90
 	ldr	w1, [x1, #:lo12:.LANCHOR91]
@@ -7935,7 +7946,7 @@ sftl_vendor_read:
 	.type	FtlMapBlkWriteDump_data, %function
 FtlMapBlkWriteDump_data:
 	ldr	w1, [x0, 56]
-	cbz	w1, .L1108
+	cbz	w1, .L1109
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
@@ -7956,16 +7967,16 @@ FtlMapBlkWriteDump_data:
 	str	x24, [x21, 16]
 	str	wzr, [x19, 56]
 	ldr	x25, [x19, 40]
-	cbz	w0, .L1110
+	cbz	w0, .L1111
 	adrp	x1, .LANCHOR20
 	ldrh	w1, [x1, #:lo12:.LANCHOR20]
 	sub	w1, w1, #1
 	cmp	w0, w1
-	bge	.L1110
+	bge	.L1111
 	ldrh	w1, [x19]
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L1110
+	beq	.L1111
 	ldr	x2, [x19, 16]
 	ubfiz	x1, x1, 1, 16
 	sub	w0, w0, #1
@@ -7978,16 +7989,16 @@ FtlMapBlkWriteDump_data:
 	bl	FlashReadPages
 	ldr	w0, [x23, #:lo12:.LANCHOR138]
 	cmn	w0, #1
-	beq	.L1110
+	beq	.L1111
 	ldrh	w1, [x24, 8]
 	ldr	x2, [x19, 40]
 	ubfiz	x0, x1, 2, 16
 	ldr	w2, [x2, x0]
 	ldr	w0, [x21, 4]
 	cmp	w2, w0
-	bne	.L1110
+	bne	.L1111
 	ldr	x2, [x21, 8]
-.L1122:
+.L1123:
 	mov	x0, x19
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -7995,30 +8006,30 @@ FtlMapBlkWriteDump_data:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	b	FtlMapWritePage
-.L1110:
+.L1111:
 	sub	w20, w20, #1
 	and	w20, w20, 65535
 	ubfiz	x0, x20, 2, 16
 	ldr	w1, [x25, x0]
 	add	x0, x22, :lo12:.LANCHOR138
 	str	w1, [x0, 4]
-	cbz	w1, .L1111
+	cbz	w1, .L1112
 	mov	w2, 1
 	mov	w1, w2
 	bl	FlashReadPages
-.L1112:
+.L1113:
 	add	x22, x22, :lo12:.LANCHOR138
 	mov	w1, w20
 	ldr	x2, [x22, 8]
-	b	.L1122
-.L1111:
+	b	.L1123
+.L1112:
 	adrp	x1, .LANCHOR23
 	ldr	x0, [x0, 8]
 	ldrh	w2, [x1, #:lo12:.LANCHOR23]
 	mov	w1, 255
 	bl	ftl_memset
-	b	.L1112
-.L1108:
+	b	.L1113
+.L1109:
 	ret
 	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
 	.section	.text.FtlVpcTblFlush,"ax",@progbits
@@ -8138,7 +8149,7 @@ FtlVpcTblFlush:
 	add	x24, x24, :lo12:.LANCHOR20
 	str	w0, [x29, 108]
 	str	x24, [x29, 96]
-.L1124:
+.L1125:
 	ldrh	w2, [x28, 2]
 	ldrh	w1, [x28]
 	ldr	x0, [x22, #:lo12:.LANCHOR106]
@@ -8150,7 +8161,7 @@ FtlVpcTblFlush:
 	ldrh	w0, [x24]
 	sub	w0, w0, #1
 	cmp	w2, w0
-	blt	.L1125
+	blt	.L1126
 	ldrh	w0, [x28, 4]
 	strh	wzr, [x28, 2]
 	strh	w1, [x28, 4]
@@ -8165,7 +8176,7 @@ FtlVpcTblFlush:
 	str	w2, [x19, 4]
 	strh	w0, [x27, 2]
 	str	w1, [x27, 4]
-.L1125:
+.L1126:
 	ldrh	w1, [x26, #:lo12:.LANCHOR23]
 	ldr	x0, [x22, #:lo12:.LANCHOR106]
 	bl	js_hash
@@ -8181,49 +8192,49 @@ FtlVpcTblFlush:
 	and	w0, w0, 65535
 	strh	w0, [x28, 2]
 	cmn	w1, #1
-	bne	.L1126
-	cmp	w0, 1
 	bne	.L1127
+	cmp	w0, 1
+	bne	.L1128
 	adrp	x1, .LANCHOR165
 	adrp	x0, .LC1
 	mov	w2, 1138
 	add	x1, x1, :lo12:.LANCHOR165
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1127:
+.L1128:
 	ldrh	w0, [x28, 2]
 	cmp	w0, 1
-	bne	.L1128
+	bne	.L1129
 	ldr	x0, [x29, 96]
 	ldrh	w0, [x0]
 	sub	w0, w0, #1
 	strh	w0, [x28, 2]
-.L1128:
+.L1129:
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	cmp	w20, 3
-	bls	.L1124
+	bls	.L1125
 	add	x21, x21, :lo12:.LANCHOR138
 	adrp	x0, .LC39
 	mov	w2, w20
 	add	x0, x0, :lo12:.LC39
 	ldr	w1, [x21, 4]
 	bl	printf
-.L1130:
-	b	.L1130
-.L1126:
+.L1131:
+	b	.L1131
+.L1127:
 	cmp	w0, 1
-	beq	.L1124
+	beq	.L1125
 	cmp	w1, 256
-	beq	.L1124
+	beq	.L1125
 	ldr	w1, [x29, 108]
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L1131
+	beq	.L1132
 	ldrh	w0, [x29, 108]
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.L1131:
+.L1132:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -8256,14 +8267,14 @@ sftl_deinit:
 	adrp	x0, .LANCHOR166
 	ldr	w0, [x0, #:lo12:.LANCHOR166]
 	cmp	w0, 1
-	bne	.L1144
+	bne	.L1145
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	FtlSysFlush
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1144:
+.L1145:
 	mov	w0, 0
 	ret
 	.size	sftl_deinit, .-sftl_deinit
@@ -8282,56 +8293,56 @@ FtlDiscard:
 	str	x23, [sp, 48]
 	ldr	w1, [x1, #:lo12:.LANCHOR34]
 	cmp	w2, w1
-	bhi	.L1155
+	bhi	.L1156
 	cmp	w19, 31
-	bhi	.L1149
-.L1163:
+	bhi	.L1150
+.L1164:
 	mov	w0, 0
-.L1147:
+.L1148:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1149:
+.L1150:
 	adrp	x21, .LANCHOR12
 	ldrh	w1, [x21, #:lo12:.LANCHOR12]
 	udiv	w20, w0, w1
 	msub	w0, w1, w20, w0
 	ands	w0, w0, 65535
-	beq	.L1150
+	beq	.L1151
 	sub	w1, w1, w0
 	add	w20, w20, 1
 	cmp	w1, w19
 	csel	w1, w1, w19, ls
 	sub	w19, w19, w1, uxth
-.L1150:
+.L1151:
 	adrp	x22, .LANCHOR167
 	adrp	x23, .LANCHOR86
 	add	x22, x22, :lo12:.LANCHOR167
 	add	x23, x23, :lo12:.LANCHOR86
 	mov	w0, -1
 	str	w0, [x29, 76]
-.L1151:
+.L1152:
 	ldrh	w0, [x21, #:lo12:.LANCHOR12]
 	cmp	w19, w0
-	bcs	.L1153
+	bcs	.L1154
 	adrp	x0, .LANCHOR167
 	ldr	w1, [x0, #:lo12:.LANCHOR167]
 	cmp	w1, 32
-	bls	.L1163
+	bls	.L1164
 	str	wzr, [x0, #:lo12:.LANCHOR167]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L1163
-.L1153:
+	b	.L1164
+.L1154:
 	mov	w2, 0
 	add	x1, x29, 72
 	mov	w0, w20
 	bl	log2phys
 	ldr	w0, [x29, 72]
 	cmn	w0, #1
-	beq	.L1152
+	beq	.L1153
 	ldr	w0, [x22]
 	mov	w2, 1
 	add	x1, x29, 76
@@ -8346,14 +8357,14 @@ FtlDiscard:
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L1152:
+.L1153:
 	ldrh	w0, [x21, #:lo12:.LANCHOR12]
 	add	w20, w20, 1
 	sub	w19, w19, w0
-	b	.L1151
-.L1155:
+	b	.L1152
+.L1156:
 	mov	w0, -1
-	b	.L1147
+	b	.L1148
 	.size	FtlDiscard, .-FtlDiscard
 	.section	.text.allocate_new_data_superblock,"ax",@progbits
 	.align	2
@@ -8369,25 +8380,25 @@ allocate_new_data_superblock:
 	adrp	x0, .LANCHOR5
 	ldrh	w0, [x0, #:lo12:.LANCHOR5]
 	cmp	w0, w19
-	bcs	.L1165
+	bcs	.L1166
 	adrp	x1, .LANCHOR168
 	adrp	x0, .LC1
 	mov	w2, 2755
 	add	x1, x1, :lo12:.LANCHOR168
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1165:
+.L1166:
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1166
+	beq	.L1167
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x19, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1167
+	cbz	w0, .L1168
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-.L1166:
+.L1167:
 	adrp	x1, .LANCHOR131
 	mov	w0, 1
 	strb	w0, [x21, 8]
@@ -8395,20 +8406,20 @@ allocate_new_data_superblock:
 	ldrh	w0, [x1, #:lo12:.LANCHOR131]
 	mov	x20, x1
 	cmp	w0, w2
-	beq	.L1168
+	beq	.L1169
 	cmp	w19, w0
-	bne	.L1169
+	bne	.L1170
 	adrp	x2, .LANCHOR42
 	ubfiz	x1, x0, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR42]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1170
-.L1169:
-	bl	update_vpc_list
+	cbz	w1, .L1171
 .L1170:
+	bl	update_vpc_list
+.L1171:
 	mov	w0, -1
 	strh	w0, [x20, #:lo12:.LANCHOR131]
-.L1168:
+.L1169:
 	mov	x0, x21
 	bl	allocate_data_superblock
 	bl	l2p_flush
@@ -8420,10 +8431,10 @@ allocate_new_data_superblock:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1167:
+.L1168:
 	mov	w0, w19
 	bl	INSERT_FREE_LIST
-	b	.L1166
+	b	.L1167
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
 	.section	.text.FtlProgPages,"ax",@progbits
 	.align	2
@@ -8449,12 +8460,12 @@ FtlProgPages:
 	add	x23, x23, :lo12:.LC40
 	add	x24, x24, :lo12:.LANCHOR3
 	bl	FlashProgPages
-.L1176:
+.L1177:
 	cmp	x21, x19
-	beq	.L1182
+	beq	.L1183
 	sub	x22, x19, #4
-	b	.L1183
-.L1178:
+	b	.L1184
+.L1179:
 	ldr	w1, [x19]
 	mov	x0, x23
 	bl	printf
@@ -8463,10 +8474,10 @@ FtlProgPages:
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
 	ldrh	w0, [x20, 4]
-	cbnz	w0, .L1177
+	cbnz	w0, .L1178
 	mov	x0, x20
 	bl	allocate_new_data_superblock
-.L1177:
+.L1178:
 	mov	x0, x20
 	bl	get_new_active_ppa
 	str	w0, [x19]
@@ -8476,22 +8487,22 @@ FtlProgPages:
 	ldrb	w3, [x20, 9]
 	mov	x0, x22
 	bl	FlashProgPages
-.L1183:
+.L1184:
 	ldr	w2, [x19, -4]
 	cmp	w2, 256
 	ccmn	w2, #1, 4, ne
-	beq	.L1178
+	beq	.L1179
 	ldrb	w1, [x20, 6]
 	ldrh	w0, [x24]
 	cmp	w1, w0
-	bcc	.L1179
+	bcc	.L1180
 	adrp	x1, .LANCHOR169
 	adrp	x0, .LC1
-	mov	w2, 982
+	mov	w2, 985
 	add	x1, x1, :lo12:.LANCHOR169
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1179:
+.L1180:
 	add	x1, x29, 80
 	ldr	w0, [x22, 4]
 	mov	w2, 1
@@ -8505,35 +8516,35 @@ FtlProgPages:
 	and	w1, w0, 65535
 	mov	w22, w1
 	cmn	w3, #1
-	beq	.L1180
+	beq	.L1181
 	adrp	x2, .LANCHOR42
 	ubfiz	x0, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR42]
 	ldrh	w0, [x2, x0]
-	cbnz	w0, .L1181
+	cbnz	w0, .L1182
 	adrp	x0, .LC41
 	mov	w2, 0
 	add	x0, x0, :lo12:.LC41
 	bl	printf
-.L1181:
+.L1182:
 	mov	w0, w22
 	bl	decrement_vpc_count
-.L1180:
+.L1181:
 	add	x19, x19, 32
-	b	.L1176
-.L1182:
+	b	.L1177
+.L1183:
 	adrp	x0, .LANCHOR3
 	ldrb	w1, [x20, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1175
+	bcc	.L1176
 	adrp	x1, .LANCHOR169
 	adrp	x0, .LC1
-	mov	w2, 997
+	mov	w2, 1000
 	add	x1, x1, :lo12:.LANCHOR169
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1175:
+.L1176:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -8556,20 +8567,20 @@ FtlGcFreeTempBlock:
 	stp	x25, x26, [sp, 64]
 	cmp	w2, w1
 	stp	x27, x28, [sp, 80]
-	beq	.L1190
+	beq	.L1191
 	adrp	x1, .LANCHOR19
 	add	x0, x19, :lo12:.LANCHOR53
 	ldrh	w1, [x1, #:lo12:.LANCHOR19]
 	bl	FtlGcScanTempBlk
 	str	w0, [x29, 108]
-.L1190:
+.L1191:
 	adrp	x0, .LANCHOR133
 	ldrh	w2, [x19, #:lo12:.LANCHOR53]
 	mov	w1, 65535
 	str	wzr, [x0, #:lo12:.LANCHOR133]
 	cmp	w2, w1
 	add	x0, x19, :lo12:.LANCHOR53
-	beq	.L1192
+	beq	.L1193
 	ldrb	w1, [x0, 7]
 	adrp	x0, .LANCHOR19
 	adrp	x20, .LANCHOR70
@@ -8578,14 +8589,14 @@ FtlGcFreeTempBlock:
 	ldrh	w2, [x20, #:lo12:.LANCHOR70]
 	mul	w1, w1, w3
 	cmp	w2, w1
-	beq	.L1193
+	beq	.L1194
 	adrp	x1, .LANCHOR170
 	adrp	x0, .LC1
 	mov	w2, 164
 	add	x1, x1, :lo12:.LANCHOR170
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1193:
+.L1194:
 	add	x0, x19, :lo12:.LANCHOR53
 	adrp	x22, .LANCHOR42
 	ldrh	w3, [x21, #:lo12:.LANCHOR19]
@@ -8604,19 +8615,19 @@ FtlGcFreeTempBlock:
 	ldr	w2, [x1, #:lo12:.LANCHOR84]
 	add	w0, w0, w2
 	str	w0, [x1, #:lo12:.LANCHOR84]
-.L1194:
+.L1195:
 	ldrh	w0, [x26]
 	cmp	w0, w21
-	bhi	.L1198
+	bhi	.L1199
 	mov	w0, -1
 	bl	decrement_vpc_count
 	ldrh	w0, [x19, #:lo12:.LANCHOR53]
 	ldr	x2, [x22, #:lo12:.LANCHOR42]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1199
+	cbz	w1, .L1200
 	bl	INSERT_DATA_LIST
-.L1200:
+.L1201:
 	adrp	x0, .LANCHOR68
 	mov	w21, -1
 	strh	wzr, [x20, #:lo12:.LANCHOR70]
@@ -8632,11 +8643,11 @@ FtlGcFreeTempBlock:
 	ldrh	w0, [x0, #:lo12:.LANCHOR171]
 	add	w0, w0, w0, lsl 1
 	cmp	w1, w0, lsr 2
-	ble	.L1192
+	ble	.L1193
 	adrp	x0, .LANCHOR100
 	mov	w1, 20
 	strh	w1, [x0, #:lo12:.LANCHOR100]
-.L1192:
+.L1193:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -8645,7 +8656,7 @@ FtlGcFreeTempBlock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1198:
+.L1199:
 	mov	w24, 12
 	ldr	x28, [x27, #:lo12:.LANCHOR71]
 	ldr	w1, [x25]
@@ -8653,18 +8664,18 @@ FtlGcFreeTempBlock:
 	add	x23, x28, x24
 	ldr	w0, [x23, 8]
 	cmp	w0, w1
-	bcc	.L1195
-.L1203:
+	bcc	.L1196
+.L1204:
 	ldrh	w0, [x19, #:lo12:.LANCHOR53]
-	b	.L1204
-.L1195:
+	b	.L1205
+.L1196:
 	add	x1, x29, 108
 	mov	w2, 0
 	bl	log2phys
 	ldr	w0, [x28, x24]
 	ldr	w1, [x29, 108]
 	cmp	w0, w1
-	bne	.L1197
+	bne	.L1198
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	mov	w24, w0
@@ -8673,20 +8684,20 @@ FtlGcFreeTempBlock:
 	add	x1, x23, 4
 	bl	log2phys
 	mov	w0, w24
-.L1204:
+.L1205:
 	bl	decrement_vpc_count
-	b	.L1196
-.L1197:
+	b	.L1197
+.L1198:
 	ldr	w0, [x23, 4]
 	cmp	w1, w0
-	bne	.L1203
-.L1196:
+	bne	.L1204
+.L1197:
 	add	w21, w21, 1
 	and	w21, w21, 65535
-	b	.L1194
-.L1199:
+	b	.L1195
+.L1200:
 	bl	INSERT_FREE_LIST
-	b	.L1200
+	b	.L1201
 	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
 	.section	.text.FtlGcPageRecovery,"ax",@progbits
 	.align	2
@@ -8705,7 +8716,7 @@ FtlGcPageRecovery:
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR19]
 	cmp	w1, w0
-	bcc	.L1205
+	bcc	.L1206
 	adrp	x0, .LANCHOR129
 	add	x0, x0, :lo12:.LANCHOR129
 	bl	FtlMapBlkWriteDump_data
@@ -8713,7 +8724,7 @@ FtlGcPageRecovery:
 	bl	FtlGcFreeTempBlock
 	adrp	x0, .LANCHOR133
 	str	wzr, [x0, #:lo12:.LANCHOR133]
-.L1205:
+.L1206:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -8765,44 +8776,44 @@ Ftl_gc_temp_data_write_back:
 	ldr	x0, [x20, #:lo12:.LANCHOR104]
 	bl	FlashProgPages
 	mov	w11, 0
-.L1211:
+.L1212:
 	ldr	w1, [x19]
 	cmp	w11, w1
-	bcc	.L1214
+	bcc	.L1215
 	ldr	x0, [x20, #:lo12:.LANCHOR104]
 	bl	FtlGcBufFree
 	str	wzr, [x19]
 	adrp	x0, .LANCHOR53+4
 	ldrh	w0, [x0, #:lo12:.LANCHOR53+4]
-	cbnz	w0, .L1216
+	cbnz	w0, .L1217
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
 	mov	w0, 1
-.L1210:
+.L1211:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1214:
+.L1215:
 	ldr	x2, [x20, #:lo12:.LANCHOR104]
 	ubfiz	x0, x11, 5, 16
 	add	x1, x2, x0
 	ldr	w2, [x2, x0]
 	ldr	x3, [x1, 16]
 	cmn	w2, #1
-	bne	.L1212
-.L1218:
+	bne	.L1213
+.L1219:
 	ldr	w1, [x1, 4]
 	ldr	w0, [x3, 12]
 	bl	FtlGcUpdatePage
 	add	w11, w11, 1
 	and	w11, w11, 65535
-	b	.L1211
-.L1212:
+	b	.L1212
+.L1213:
 	ldr	w2, [x3, 8]
-	b	.L1218
-.L1216:
+	b	.L1219
+.L1217:
 	mov	w0, 0
-	b	.L1210
+	b	.L1211
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
 	.section	.text.Ftl_get_new_temp_ppa,"ax",@progbits
 	.align	2
@@ -8817,11 +8828,11 @@ Ftl_get_new_temp_ppa:
 	mov	x19, x0
 	ldrh	w3, [x0, #:lo12:.LANCHOR53]
 	cmp	w3, w2
-	beq	.L1220
+	beq	.L1221
 	add	x1, x0, :lo12:.LANCHOR53
 	ldrh	w0, [x1, 4]
-	cbnz	w0, .L1221
-.L1220:
+	cbnz	w0, .L1222
+.L1221:
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
 	add	x0, x19, :lo12:.LANCHOR53
@@ -8835,7 +8846,7 @@ Ftl_get_new_temp_ppa:
 	mov	w0, 0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1221:
+.L1222:
 	add	x0, x19, :lo12:.LANCHOR53
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -8855,69 +8866,69 @@ rk_ftl_garbage_collect:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w1, .L1280
+	cbnz	w1, .L1281
 	adrp	x1, .LANCHOR44
 	ldrh	w1, [x1, #:lo12:.LANCHOR44]
 	cmp	w1, 47
-	bls	.L1280
+	bls	.L1281
 	adrp	x1, .LANCHOR73
 	mov	w4, 65535
 	ldrh	w3, [x1, #:lo12:.LANCHOR73]
 	cmp	w3, w4
-	beq	.L1225
+	beq	.L1226
 	adrp	x2, .LANCHOR72
 	ldrh	w5, [x2, #:lo12:.LANCHOR72]
 	cmp	w5, w4
-	bne	.L1225
+	bne	.L1226
 	strh	w3, [x2, #:lo12:.LANCHOR72]
 	mov	w2, -1
 	strh	w2, [x1, #:lo12:.LANCHOR73]
-.L1225:
-	cbnz	w0, .L1281
+.L1226:
+	cbnz	w0, .L1282
 	adrp	x1, .LANCHOR48
 	ldrh	w1, [x1, #:lo12:.LANCHOR48]
 	cmp	w1, 24
-	bhi	.L1282
+	bhi	.L1283
 	adrp	x2, .LANCHOR19
 	cmp	w1, 16
 	ldrh	w20, [x2, #:lo12:.LANCHOR19]
-	bls	.L1228
+	bls	.L1229
 	lsr	w20, w20, 5
-.L1227:
+.L1228:
 	adrp	x2, .LANCHOR100
 	ldrh	w3, [x2, #:lo12:.LANCHOR100]
 	cmp	w3, w1
 	mov	x3, x2
-	bcs	.L1231
+	bcs	.L1232
 	adrp	x1, .LANCHOR53
 	mov	w4, 65535
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	cmp	w1, w4
-	bne	.L1232
+	bne	.L1233
 	adrp	x4, .LANCHOR72
 	ldrh	w4, [x4, #:lo12:.LANCHOR72]
 	cmp	w4, w1
-	bne	.L1232
+	bne	.L1233
 	adrp	x0, .LANCHOR172
 	ldrh	w0, [x0, #:lo12:.LANCHOR172]
-	cbnz	w0, .L1233
+	cbnz	w0, .L1234
 	adrp	x1, .LANCHOR152
 	adrp	x4, .LANCHOR59
 	ldr	w1, [x1, #:lo12:.LANCHOR152]
 	ldr	w4, [x4, #:lo12:.LANCHOR59]
 	add	w1, w1, w1, lsl 1
 	cmp	w4, w1, lsr 2
-	bcs	.L1234
-.L1233:
+	bcs	.L1235
+.L1234:
 	adrp	x1, .LANCHOR171
 	ldrh	w1, [x1, #:lo12:.LANCHOR171]
 	add	w1, w1, w1, lsl 1
 	asr	w1, w1, 2
 	strh	w1, [x3, #:lo12:.LANCHOR100]
-.L1235:
+.L1236:
 	adrp	x1, .LANCHOR95
 	str	wzr, [x1, #:lo12:.LANCHOR95]
-.L1223:
+.L1224:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -8925,75 +8936,75 @@ rk_ftl_garbage_collect:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1228:
+.L1229:
 	cmp	w1, 12
-	bls	.L1229
+	bls	.L1230
 	lsr	w20, w20, 4
-	b	.L1227
-.L1229:
+	b	.L1228
+.L1230:
 	cmp	w1, 8
-	bls	.L1227
+	bls	.L1228
 	lsr	w20, w20, 2
-	b	.L1227
-.L1282:
+	b	.L1228
+.L1283:
 	mov	w20, 1
-	b	.L1227
-.L1234:
+	b	.L1228
+.L1235:
 	mov	w1, 18
 	strh	w1, [x2, #:lo12:.LANCHOR100]
-	b	.L1235
-.L1232:
+	b	.L1236
+.L1233:
 	adrp	x1, .LANCHOR171
 	ldrh	w1, [x1, #:lo12:.LANCHOR171]
 	add	w1, w1, w1, lsl 1
 	asr	w1, w1, 2
 	strh	w1, [x3, #:lo12:.LANCHOR100]
-.L1231:
+.L1232:
 	adrp	x1, .LANCHOR74
 	ldrh	w1, [x1, #:lo12:.LANCHOR74]
-	cbz	w1, .L1226
+	cbz	w1, .L1227
 	add	w20, w20, 32
 	and	w20, w20, 65535
-.L1226:
+.L1227:
 	adrp	x19, .LANCHOR145
 	str	w0, [x29, 152]
 	mov	w0, 65535
 	ldrh	w2, [x19, #:lo12:.LANCHOR145]
 	cmp	w2, w0
-	bne	.L1238
+	bne	.L1239
 	adrp	x0, .LANCHOR72
 	ldrh	w1, [x0, #:lo12:.LANCHOR72]
 	cmp	w1, w2
-	beq	.L1239
+	beq	.L1240
 	adrp	x2, .LANCHOR42
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR42]
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L1240
+	cbnz	w1, .L1241
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR72]
-.L1240:
+.L1241:
 	ldrh	w1, [x0, #:lo12:.LANCHOR72]
 	strh	w1, [x19, #:lo12:.LANCHOR145]
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR72]
-.L1239:
+.L1240:
 	add	x0, x19, :lo12:.LANCHOR145
 	mov	w1, 65535
 	strb	wzr, [x0, 8]
 	ldrh	w0, [x19, #:lo12:.LANCHOR145]
 	cmp	w0, w1
-	beq	.L1238
+	beq	.L1239
 	bl	IsBlkInGcList
-	cbz	w0, .L1242
+	cbz	w0, .L1243
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR145]
-.L1242:
+.L1243:
 	ldrh	w1, [x19, #:lo12:.LANCHOR145]
 	mov	w0, 65535
 	add	x22, x19, :lo12:.LANCHOR145
 	cmp	w1, w0
-	beq	.L1238
+	beq	.L1239
 	mov	x0, x22
 	bl	make_superblock
 	adrp	x0, .LANCHOR173
@@ -9006,37 +9017,37 @@ rk_ftl_garbage_collect:
 	ldrh	w1, [x0, x1, lsl 1]
 	adrp	x0, .LANCHOR174
 	strh	w1, [x0, #:lo12:.LANCHOR174]
-.L1238:
+.L1239:
 	adrp	x1, .LANCHOR51
 	ldrh	w0, [x19, #:lo12:.LANCHOR145]
 	str	x1, [x29, 128]
 	ldrh	w2, [x1, #:lo12:.LANCHOR51]
 	cmp	w2, w0
-	beq	.L1243
+	beq	.L1244
 	adrp	x1, .LANCHOR52
 	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	beq	.L1243
+	beq	.L1244
 	adrp	x1, .LANCHOR53
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L1244
-.L1243:
+	bne	.L1245
+.L1244:
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR145]
-.L1244:
+.L1245:
 	adrp	x25, .LANCHOR102
 	add	x26, x25, :lo12:.LANCHOR102
-.L1278:
+.L1279:
 	ldrh	w1, [x19, #:lo12:.LANCHOR145]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1245
+	bne	.L1246
 	adrp	x0, .LANCHOR95
 	adrp	x22, .LANCHOR19
 	add	x22, x22, :lo12:.LANCHOR19
 	str	wzr, [x0, #:lo12:.LANCHOR95]
-.L1246:
+.L1247:
 	ldrh	w5, [x25, #:lo12:.LANCHOR102]
 	add	x7, x25, :lo12:.LANCHOR102
 	mov	w0, w5
@@ -9045,21 +9056,21 @@ rk_ftl_garbage_collect:
 	strh	w6, [x19, #:lo12:.LANCHOR145]
 	mov	w0, 65535
 	cmp	w6, w0
-	bne	.L1247
+	bne	.L1248
 	strh	wzr, [x7]
 	mov	w0, 8
-	b	.L1223
-.L1281:
+	b	.L1224
+.L1282:
 	mov	w20, 1
-	b	.L1226
-.L1247:
+	b	.L1227
+.L1248:
 	mov	w0, w6
 	bl	IsBlkInGcList
 	add	w5, w5, 1
-	cbz	w0, .L1248
+	cbz	w0, .L1249
 	strh	w5, [x25, #:lo12:.LANCHOR102]
-	b	.L1246
-.L1248:
+	b	.L1247
+.L1249:
 	adrp	x23, .LANCHOR42
 	adrp	x4, .LANCHOR3
 	ldrh	w0, [x22]
@@ -9071,77 +9082,77 @@ rk_ftl_garbage_collect:
 	ldrh	w3, [x2, x1]
 	mul	w0, w0, w4
 	cmp	w3, w0, asr 1
-	bgt	.L1250
+	bgt	.L1251
 	cmp	w5, 48
-	bls	.L1251
+	bls	.L1252
 	cmp	w3, 8
-	bls	.L1251
+	bls	.L1252
 	adrp	x3, .LANCHOR68
 	ldrh	w3, [x3, #:lo12:.LANCHOR68]
 	cmp	w3, 35
-	bhi	.L1251
-.L1250:
-	strh	wzr, [x26]
+	bhi	.L1252
 .L1251:
+	strh	wzr, [x26]
+.L1252:
 	ldrh	w1, [x2, x1]
 	cmp	w0, w1
-	bgt	.L1252
+	bgt	.L1253
 	ldrh	w0, [x26]
 	cmp	w0, 3
-	bhi	.L1252
+	bhi	.L1253
 	mov	w0, -1
 	strh	wzr, [x26]
 	strh	w0, [x19, #:lo12:.LANCHOR145]
-.L1311:
+.L1312:
 	adrp	x0, .LANCHOR172
 	ldrh	w0, [x0, #:lo12:.LANCHOR172]
-	b	.L1223
-.L1252:
-	cbnz	w1, .L1253
+	b	.L1224
+.L1253:
+	cbnz	w1, .L1254
 	mov	w0, -1
 	bl	decrement_vpc_count
 	ldrh	w0, [x26]
 	add	w0, w0, 1
 	strh	w0, [x26]
-	b	.L1246
-.L1253:
+	b	.L1247
+.L1254:
 	add	x0, x19, :lo12:.LANCHOR145
 	strb	wzr, [x0, 8]
 	ldr	x0, [x29, 128]
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w6
-	bne	.L1254
+	bne	.L1255
 	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
 	mov	w2, 717
 	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1254:
+.L1255:
 	adrp	x0, .LANCHOR52
 	ldrh	w1, [x19, #:lo12:.LANCHOR145]
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bne	.L1255
+	bne	.L1256
 	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
 	mov	w2, 718
 	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1255:
+.L1256:
 	adrp	x0, .LANCHOR53
 	ldrh	w1, [x19, #:lo12:.LANCHOR145]
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L1256
+	bne	.L1257
 	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
 	mov	w2, 719
 	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1256:
+.L1257:
 	add	x22, x19, :lo12:.LANCHOR145
 	mov	x0, x22
 	bl	make_superblock
@@ -9154,7 +9165,7 @@ rk_ftl_garbage_collect:
 	strh	wzr, [x22, 2]
 	strh	w1, [x0, #:lo12:.LANCHOR174]
 	strb	wzr, [x22, 6]
-.L1245:
+.L1246:
 	mov	w0, 1
 	str	w0, [x21, #:lo12:.LANCHOR94]
 	adrp	x0, .LANCHOR19
@@ -9162,7 +9173,7 @@ rk_ftl_garbage_collect:
 	ldrh	w1, [x0, #:lo12:.LANCHOR19]
 	ldr	w0, [x29, 152]
 	str	w1, [x29, 156]
-	cbz	w0, .L1257
+	cbz	w0, .L1258
 	adrp	x0, .LANCHOR3
 	ldrh	w2, [x19, #:lo12:.LANCHOR145]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
@@ -9175,23 +9186,23 @@ rk_ftl_garbage_collect:
 	sdiv	w0, w0, w1
 	add	w20, w20, w0
 	and	w20, w20, 65535
-.L1257:
+.L1258:
 	add	x0, x19, :lo12:.LANCHOR145
 	ldr	w2, [x29, 156]
 	ldrh	w0, [x0, 2]
 	add	w1, w0, w20
 	cmp	w1, w2
-	ble	.L1258
+	ble	.L1259
 	sub	w20, w2, w0
 	and	w20, w20, 65535
-.L1258:
+.L1259:
 	adrp	x0, .LANCHOR173
 	mov	w28, 0
 	add	x0, x0, :lo12:.LANCHOR173
 	str	x0, [x29, 144]
-.L1259:
+.L1260:
 	cmp	w20, w28, uxth
-	bls	.L1267
+	bls	.L1268
 	add	x1, x19, :lo12:.LANCHOR145
 	adrp	x0, .LANCHOR3
 	adrp	x23, .LANCHOR66
@@ -9203,24 +9214,24 @@ rk_ftl_garbage_collect:
 	ldr	x0, [x23, #:lo12:.LANCHOR66]
 	mov	w6, 65535
 	add	w4, w4, w28
-	b	.L1268
-.L1261:
+	b	.L1269
+.L1262:
 	ldrh	w3, [x1]
 	cmp	w3, w6
-	beq	.L1260
+	beq	.L1261
 	ubfiz	x5, x22, 5, 16
 	add	w22, w22, 1
 	add	x5, x0, x5
 	and	w22, w22, 65535
 	orr	w3, w4, w3, lsl 10
 	str	w3, [x5, 4]
-.L1260:
+.L1261:
 	add	w2, w2, 1
 	add	x1, x1, 2
 	and	w2, w2, 65535
-.L1268:
+.L1269:
 	cmp	w2, w7
-	bne	.L1261
+	bne	.L1262
 	add	x1, x19, :lo12:.LANCHOR145
 	adrp	x24, .LANCHOR62
 	add	x24, x24, :lo12:.LANCHOR62
@@ -9230,26 +9241,26 @@ rk_ftl_garbage_collect:
 	ubfiz	x0, x22, 5, 16
 	mov	x22, 0
 	str	x0, [x29, 136]
-.L1262:
+.L1263:
 	ldr	x0, [x29, 136]
 	cmp	x22, x0
-	bne	.L1266
+	bne	.L1267
 	add	w28, w28, 1
-	b	.L1259
-.L1266:
+	b	.L1260
+.L1267:
 	ldr	x0, [x23, #:lo12:.LANCHOR66]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	beq	.L1263
+	beq	.L1264
 	ldr	x27, [x1, 16]
 	mov	w0, 61589
 	ldrh	w1, [x27]
 	cmp	w1, w0
-	bne	.L1263
+	bne	.L1264
 	ldr	w4, [x27, 8]
 	cmn	w4, #1
-	bne	.L1264
+	bne	.L1265
 	str	w4, [x29, 112]
 	mov	w2, 753
 	adrp	x1, .LANCHOR175
@@ -9258,7 +9269,7 @@ rk_ftl_garbage_collect:
 	add	x0, x0, :lo12:.LC1
 	bl	printf
 	ldr	w4, [x29, 112]
-.L1264:
+.L1265:
 	mov	w2, 0
 	add	x1, x29, 168
 	mov	w0, w4
@@ -9268,7 +9279,7 @@ rk_ftl_garbage_collect:
 	add	x0, x0, x22
 	ldr	w2, [x0, 4]
 	cmp	w2, w1
-	bne	.L1263
+	bne	.L1264
 	ldr	x1, [x29, 144]
 	adrp	x4, .LANCHOR104
 	ldr	x2, [x29, 144]
@@ -9310,22 +9321,22 @@ rk_ftl_garbage_collect:
 	ldrb	w1, [x11, 7]
 	ldr	w0, [x24]
 	cmp	w1, w0
-	beq	.L1265
+	beq	.L1266
 	ldrh	w0, [x11, 4]
-	cbnz	w0, .L1263
-.L1265:
+	cbnz	w0, .L1264
+.L1266:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	w0, .L1263
+	cbz	w0, .L1264
 	add	x0, x19, :lo12:.LANCHOR145
 	mov	w1, -1
 	str	wzr, [x21, #:lo12:.LANCHOR94]
 	strh	w1, [x19, #:lo12:.LANCHOR145]
 	strh	wzr, [x0, 2]
-	b	.L1311
-.L1263:
+	b	.L1312
+.L1264:
 	add	x22, x22, 32
-	b	.L1262
-.L1267:
+	b	.L1263
+.L1268:
 	add	x1, x19, :lo12:.LANCHOR145
 	ldrh	w0, [x1, 2]
 	add	w20, w20, w0
@@ -9333,25 +9344,25 @@ rk_ftl_garbage_collect:
 	and	w20, w20, 65535
 	strh	w20, [x1, 2]
 	cmp	w0, w20
-	bhi	.L1269
+	bhi	.L1270
 	adrp	x0, .LANCHOR62
 	ldr	w0, [x0, #:lo12:.LANCHOR62]
-	cbz	w0, .L1270
+	cbz	w0, .L1271
 	bl	Ftl_gc_temp_data_write_back
-	cbz	w0, .L1270
+	cbz	w0, .L1271
 	str	wzr, [x21, #:lo12:.LANCHOR94]
-	b	.L1311
-.L1270:
+	b	.L1312
+.L1271:
 	adrp	x0, .LANCHOR173
 	ldrh	w0, [x0, #:lo12:.LANCHOR173]
-	cbnz	w0, .L1271
+	cbnz	w0, .L1272
 	ldrh	w1, [x19, #:lo12:.LANCHOR145]
 	adrp	x20, .LANCHOR42
 	add	x0, x19, :lo12:.LANCHOR145
 	ldr	x3, [x20, #:lo12:.LANCHOR42]
 	ubfiz	x2, x1, 1, 16
 	ldrh	w4, [x3, x2]
-	cbz	w4, .L1271
+	cbz	w4, .L1272
 	adrp	x2, .LANCHOR174
 	adrp	x22, .LANCHOR152
 	add	x23, x22, :lo12:.LANCHOR152
@@ -9362,31 +9373,31 @@ rk_ftl_garbage_collect:
 	adrp	x0, .LC42
 	add	x0, x0, :lo12:.LC42
 	bl	printf
-.L1272:
+.L1273:
 	ldr	w0, [x23]
 	cmp	w24, w0
-	bcs	.L1274
+	bcs	.L1275
 	mov	w2, 0
 	add	x1, x29, 172
 	mov	w0, w24
 	bl	log2phys
 	ldr	w3, [x29, 172]
 	cmn	w3, #1
-	beq	.L1273
+	beq	.L1274
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
 	ldrh	w1, [x19, #:lo12:.LANCHOR145]
 	cmp	w1, w0, uxth
-	bne	.L1273
+	bne	.L1274
 	adrp	x0, .LC43
 	mov	w2, w3
 	mov	w1, w24
 	add	x0, x0, :lo12:.LC43
 	bl	printf
-.L1274:
+.L1275:
 	ldr	w0, [x22, #:lo12:.LANCHOR152]
 	cmp	w24, w0
-	bcc	.L1271
+	bcc	.L1272
 	ldrh	w1, [x19, #:lo12:.LANCHOR145]
 	ldr	x0, [x20, #:lo12:.LANCHOR42]
 	strh	wzr, [x0, x1, lsl 1]
@@ -9394,27 +9405,27 @@ rk_ftl_garbage_collect:
 	bl	update_vpc_list
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1271:
+.L1272:
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR145]
-.L1269:
+.L1270:
 	adrp	x0, .LANCHOR48
 	str	wzr, [x21, #:lo12:.LANCHOR94]
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 2
-	bhi	.L1277
+	bhi	.L1278
 	ldr	x0, [x29, 120]
 	ldrh	w20, [x0, #:lo12:.LANCHOR19]
-	b	.L1278
-.L1273:
+	b	.L1279
+.L1274:
 	add	w24, w24, 1
-	b	.L1272
-.L1277:
+	b	.L1273
+.L1278:
 	add	w0, w0, 1
-	b	.L1223
-.L1280:
+	b	.L1224
+.L1281:
 	mov	w0, 0
-	b	.L1223
+	b	.L1224
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
 	.section	.text.FtlRead,"ax",@progbits
 	.align	2
@@ -9433,13 +9444,13 @@ FtlRead:
 	mov	w26, w2
 	stp	x21, x22, [sp, 32]
 	stp	x27, x28, [sp, 80]
-	bne	.L1313
+	bne	.L1314
 	mov	x2, x3
 	mov	w1, w26
 	add	w0, w19, 256
 	bl	FtlVendorPartRead
 	mov	w21, w0
-.L1312:
+.L1313:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9448,18 +9459,18 @@ FtlRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1313:
+.L1314:
 	add	w0, w1, w2
 	str	w0, [x29, 136]
 	adrp	x0, .LANCHOR34
 	add	w1, w1, w2
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	cmp	w1, w0
-	bhi	.L1334
+	bhi	.L1335
 	adrp	x0, .LANCHOR166
 	ldr	w21, [x0, #:lo12:.LANCHOR166]
 	cmn	w21, #1
-	beq	.L1312
+	beq	.L1313
 	adrp	x22, .LANCHOR12
 	adrp	x25, .LANCHOR135
 	add	x25, x25, :lo12:.LANCHOR135
@@ -9487,47 +9498,47 @@ FtlRead:
 	ldr	w0, [x1, #:lo12:.LANCHOR89]
 	add	w0, w0, w2
 	str	w0, [x1, #:lo12:.LANCHOR89]
-.L1315:
+.L1316:
 	ldr	w0, [x29, 156]
-	cbnz	w0, .L1332
+	cbnz	w0, .L1333
 	adrp	x0, .LANCHOR74
 	ldrh	w0, [x0, #:lo12:.LANCHOR74]
-	cbnz	w0, .L1333
+	cbnz	w0, .L1334
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 31
-	bhi	.L1312
-.L1333:
+	bhi	.L1313
+.L1334:
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-	b	.L1312
-.L1332:
+	b	.L1313
+.L1333:
 	add	x1, x29, 172
 	mov	w2, 0
 	mov	w0, w20
 	bl	log2phys
 	ldr	w1, [x29, 172]
 	cmn	w1, #1
-	bne	.L1316
+	bne	.L1317
 	add	x5, x22, :lo12:.LANCHOR12
 	mov	w4, 0
-.L1317:
+.L1318:
 	ldrh	w0, [x5]
 	cmp	w4, w0
-	bcc	.L1319
-.L1320:
+	bcc	.L1320
+.L1321:
 	ldr	w0, [x29, 156]
 	add	w20, w20, 1
 	subs	w0, w0, #1
 	str	w0, [x29, 156]
-	beq	.L1324
+	beq	.L1325
 	adrp	x0, .LANCHOR3
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w27, w0, lsl 2
-	bne	.L1315
-.L1324:
-	cbz	w27, .L1315
+	bne	.L1316
+.L1325:
+	cbz	w27, .L1316
 	ldr	x0, [x28, #:lo12:.LANCHOR103]
 	mov	w1, w27
 	mov	w2, 0
@@ -9546,57 +9557,57 @@ FtlRead:
 	str	x0, [x29, 104]
 	add	x0, x22, :lo12:.LANCHOR12
 	str	x0, [x29, 96]
-.L1331:
+.L1332:
 	ldr	x0, [x28, #:lo12:.LANCHOR103]
 	ldr	w2, [x29, 152]
 	add	x0, x0, x27
 	ldr	w1, [x0, 24]
 	cmp	w2, w1
-	bne	.L1326
+	bne	.L1327
 	ldr	x1, [x0, 8]
 	adrp	x0, .LANCHOR109
 	ldr	x0, [x0, #:lo12:.LANCHOR109]
 	cmp	x1, x0
-	bne	.L1327
+	bne	.L1328
 	ldr	x0, [x29, 128]
 	ldr	w2, [x29, 120]
 	add	x1, x1, x0
 	mov	x0, x23
-.L1345:
+.L1346:
 	bl	ftl_memcpy
-.L1327:
+.L1328:
 	ldr	x0, [x28, #:lo12:.LANCHOR103]
 	add	x0, x0, x27
 	ldr	x1, [x0, 16]
 	ldr	w2, [x0, 24]
 	ldr	w1, [x1, 8]
 	cmp	w2, w1
-	beq	.L1328
+	beq	.L1329
 	ldr	w1, [x25, 72]
 	add	w1, w1, 1
 	str	w1, [x25, 72]
-.L1328:
+.L1329:
 	ldr	w1, [x0]
 	cmn	w1, #1
-	bne	.L1329
+	bne	.L1330
 	ldr	w0, [x25, 72]
 	mov	w21, w1
 	add	w0, w0, 1
 	str	w0, [x25, 72]
-.L1330:
+.L1331:
 	ldr	x0, [x29, 104]
 	add	x27, x27, 32
 	cmp	x0, x27
-	bne	.L1331
+	bne	.L1332
 	mov	w27, 0
-	b	.L1315
-.L1319:
+	b	.L1316
+.L1320:
 	madd	w0, w20, w0, w4
 	cmp	w19, w0
-	bhi	.L1318
+	bhi	.L1319
 	ldr	w1, [x29, 136]
 	cmp	w1, w0
-	bls	.L1318
+	bls	.L1319
 	sub	w0, w0, w19
 	str	x5, [x29, 120]
 	lsl	w0, w0, 9
@@ -9607,17 +9618,17 @@ FtlRead:
 	bl	ftl_memset
 	ldr	w4, [x29, 128]
 	ldr	x5, [x29, 120]
-.L1318:
+.L1319:
 	add	w4, w4, 1
-	b	.L1317
-.L1316:
+	b	.L1318
+.L1317:
 	ldr	x2, [x28, #:lo12:.LANCHOR103]
 	ubfiz	x0, x27, 5, 32
 	add	x0, x2, x0
 	str	w1, [x0, 4]
 	ldr	w1, [x29, 152]
 	cmp	w20, w1
-	bne	.L1321
+	bne	.L1322
 	adrp	x1, .LANCHOR109
 	ldr	x1, [x1, #:lo12:.LANCHOR109]
 	str	x1, [x0, 8]
@@ -9630,9 +9641,9 @@ FtlRead:
 	csel	w2, w26, w2, ls
 	str	w2, [x29, 144]
 	cmp	w1, w2
-	bne	.L1322
+	bne	.L1323
 	str	x23, [x0, 8]
-.L1322:
+.L1323:
 	adrp	x1, .LANCHOR24
 	adrp	x2, .LANCHOR115
 	str	w20, [x0, 24]
@@ -9643,10 +9654,10 @@ FtlRead:
 	and	x1, x1, 4294967292
 	add	x1, x2, x1
 	str	x1, [x0, 16]
-	b	.L1320
-.L1321:
+	b	.L1321
+.L1322:
 	cmp	w20, w24
-	bne	.L1323
+	bne	.L1324
 	ldrh	w2, [x22, #:lo12:.LANCHOR12]
 	adrp	x1, .LANCHOR110
 	ldr	w3, [x29, 136]
@@ -9656,25 +9667,25 @@ FtlRead:
 	sub	w3, w3, w1
 	str	w3, [x29, 140]
 	cmp	w2, w3
-	bne	.L1322
-.L1344:
+	bne	.L1323
+.L1345:
 	sub	w1, w1, w19
 	lsl	w1, w1, 9
 	add	x1, x23, x1
 	str	x1, [x0, 8]
-	b	.L1322
-.L1323:
+	b	.L1323
+.L1324:
 	ldrh	w1, [x22, #:lo12:.LANCHOR12]
 	mul	w1, w1, w20
-	b	.L1344
-.L1326:
+	b	.L1345
+.L1327:
 	cmp	w24, w1
-	bne	.L1327
+	bne	.L1328
 	ldr	x1, [x0, 8]
 	adrp	x0, .LANCHOR110
 	ldr	x0, [x0, #:lo12:.LANCHOR110]
 	cmp	x1, x0
-	bne	.L1327
+	bne	.L1328
 	ldr	x0, [x29, 96]
 	ldr	w2, [x29, 116]
 	ldrh	w0, [x0]
@@ -9682,18 +9693,18 @@ FtlRead:
 	sub	w0, w0, w19
 	lsl	w0, w0, 9
 	add	x0, x23, x0
-	b	.L1345
-.L1329:
+	b	.L1346
+.L1330:
 	cmp	w1, 256
-	bne	.L1330
+	bne	.L1331
 	ldr	w0, [x0, 4]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-	b	.L1330
-.L1334:
+	b	.L1331
+.L1335:
 	mov	w21, -1
-	b	.L1312
+	b	.L1313
 	.size	FtlRead, .-FtlRead
 	.section	.text.sftl_read,"ax",@progbits
 	.align	2
@@ -9723,12 +9734,12 @@ FtlWrite:
 	stp	x21, x22, [sp, 32]
 	stp	x27, x28, [sp, 80]
 	str	w2, [x29, 172]
-	bne	.L1348
+	bne	.L1349
 	add	w0, w1, 256
 	ldr	w1, [x29, 172]
 	mov	x2, x3
 	bl	FtlVendorPartWrite
-.L1347:
+.L1348:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9736,7 +9747,7 @@ FtlWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 224
 	ret
-.L1348:
+.L1349:
 	ldr	w0, [x29, 172]
 	add	w0, w1, w0
 	str	w0, [x29, 152]
@@ -9744,11 +9755,11 @@ FtlWrite:
 	ldr	w1, [x29, 152]
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	cmp	w1, w0
-	bhi	.L1380
+	bhi	.L1381
 	adrp	x0, .LANCHOR166
 	ldr	w0, [x0, #:lo12:.LANCHOR166]
 	cmn	w0, #1
-	beq	.L1347
+	beq	.L1348
 	adrp	x0, .LANCHOR176
 	mov	w1, 2048
 	ldr	w2, [x29, 152]
@@ -9775,8 +9786,8 @@ FtlWrite:
 	str	w0, [x2, #:lo12:.LANCHOR85]
 	adrp	x0, .LANCHOR51
 	add	x20, x0, :lo12:.LANCHOR51
-.L1350:
-	cbnz	w24, .L1375
+.L1351:
+	cbnz	w24, .L1376
 	ldr	w1, [x29, 140]
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
@@ -9784,11 +9795,11 @@ FtlWrite:
 	mov	x22, x0
 	ldrh	w1, [x0, #:lo12:.LANCHOR48]
 	cmp	w1, 5
-	bls	.L1376
-.L1378:
+	bls	.L1377
+.L1379:
 	mov	w0, 0
-	b	.L1347
-.L1375:
+	b	.L1348
+.L1376:
 	adrp	x0, .LANCHOR51
 	add	x0, x0, :lo12:.LANCHOR51
 	adrp	x1, .LANCHOR3
@@ -9796,19 +9807,19 @@ FtlWrite:
 	ldrb	w2, [x0, 6]
 	ldrh	w0, [x1, #:lo12:.LANCHOR3]
 	cmp	w2, w0
-	bcc	.L1351
+	bcc	.L1352
 	adrp	x1, .LANCHOR177
 	adrp	x0, .LC1
-	mov	w2, 1038
+	mov	w2, 1041
 	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1351:
+.L1352:
 	ldrh	w0, [x20, 4]
-	cbnz	w0, .L1352
+	cbnz	w0, .L1353
 	mov	x0, x20
 	bl	allocate_new_data_superblock
-.L1352:
+.L1353:
 	ldrb	w0, [x20, 7]
 	ldrh	w1, [x20, 4]
 	lsl	w0, w0, 2
@@ -9821,14 +9832,14 @@ FtlWrite:
 	ldr	x0, [x29, 112]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1353
+	bcc	.L1354
 	adrp	x1, .LANCHOR177
 	adrp	x0, .LC1
-	mov	w2, 1071
+	mov	w2, 1074
 	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1353:
+.L1354:
 	adrp	x0, .LANCHOR24
 	add	x0, x0, :lo12:.LANCHOR24
 	mov	x28, 0
@@ -9836,33 +9847,33 @@ FtlWrite:
 	adrp	x0, .LANCHOR23
 	add	x0, x0, :lo12:.LANCHOR23
 	str	x0, [x29, 96]
-.L1354:
+.L1355:
 	ldr	w0, [x29, 148]
 	mov	w22, w28
 	adrp	x27, .LANCHOR105
 	cmp	w28, w0
-	bcc	.L1373
+	bcc	.L1374
 	mov	x22, x0
-.L1355:
+.L1356:
 	ldr	x0, [x27, #:lo12:.LANCHOR105]
 	mov	x3, x20
 	mov	w2, 0
 	mov	w1, w22
 	bl	FtlProgPages
 	cmp	w24, w22
-	bcs	.L1374
+	bcs	.L1375
 	adrp	x1, .LANCHOR177
 	adrp	x0, .LC1
-	mov	w2, 1149
+	mov	w2, 1152
 	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1374:
+.L1375:
 	sub	w24, w24, w22
-	b	.L1350
-.L1373:
+	b	.L1351
+.L1374:
 	ldrh	w0, [x20, 4]
-	cbz	w0, .L1355
+	cbz	w0, .L1356
 	add	x1, x29, 188
 	mov	w2, 0
 	mov	w0, w19
@@ -9891,10 +9902,10 @@ FtlWrite:
 	ldr	w0, [x29, 144]
 	cmp	w19, w25
 	ccmp	w19, w0, 4, ne
-	bne	.L1356
+	bne	.L1357
 	cmp	w19, w25
 	ldr	x0, [x29, 160]
-	bne	.L1357
+	bne	.L1358
 	ldrh	w2, [x0, #:lo12:.LANCHOR12]
 	udiv	w0, w23, w2
 	msub	w0, w0, w2, w23
@@ -9904,30 +9915,30 @@ FtlWrite:
 	cmp	w2, w0
 	csel	w0, w2, w0, ls
 	str	w0, [x29, 168]
-.L1358:
+.L1359:
 	ldr	x0, [x29, 160]
 	ldr	w1, [x29, 168]
 	ldrh	w0, [x0, #:lo12:.LANCHOR12]
 	cmp	w1, w0
 	ldr	x0, [x27, #:lo12:.LANCHOR105]
-	bne	.L1359
+	bne	.L1360
 	add	x21, x0, x21
 	cmp	w19, w25
-	bne	.L1360
+	bne	.L1361
 	str	x26, [x21, 8]
-.L1361:
+.L1362:
 	ldr	x0, [x29, 112]
 	ldrb	w1, [x20, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1370
+	bcc	.L1371
 	adrp	x1, .LANCHOR177
 	adrp	x0, .LC1
-	mov	w2, 1140
+	mov	w2, 1143
 	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1370:
+.L1371:
 	ldp	x1, x2, [x29, 120]
 	mov	w0, -3947
 	add	x28, x28, 1
@@ -9944,35 +9955,35 @@ FtlWrite:
 	str	w0, [x22, 12]
 	ldrh	w0, [x20]
 	strh	w0, [x22, 2]
-	b	.L1354
-.L1357:
+	b	.L1355
+.L1358:
 	ldrh	w2, [x0, #:lo12:.LANCHOR12]
 	ldr	w0, [x29, 152]
 	str	wzr, [x29, 156]
 	msub	w2, w19, w2, w0
 	and	w0, w2, 65535
 	str	w0, [x29, 168]
-	b	.L1358
-.L1360:
+	b	.L1359
+.L1361:
 	ldr	w0, [x29, 168]
-.L1388:
+.L1389:
 	mul	w0, w0, w19
 	sub	w0, w0, w23
 	lsl	w0, w0, 9
 	add	x0, x26, x0
 	str	x0, [x21, 8]
-	b	.L1361
-.L1359:
+	b	.L1362
+.L1360:
 	add	x0, x0, x21
 	cmp	w19, w25
-	bne	.L1362
+	bne	.L1363
 	adrp	x1, .LANCHOR109
 	ldr	x1, [x1, #:lo12:.LANCHOR109]
-.L1387:
+.L1388:
 	str	x1, [x0, 8]
 	ldr	w0, [x29, 188]
 	cmn	w0, #1
-	beq	.L1364
+	beq	.L1365
 	str	w0, [x29, 196]
 	mov	w2, 0
 	ldr	x0, [x27, #:lo12:.LANCHOR105]
@@ -9985,7 +9996,7 @@ FtlWrite:
 	bl	FlashReadPages
 	ldr	w3, [x29, 192]
 	cmn	w3, #1
-	bne	.L1365
+	bne	.L1366
 	adrp	x0, .LANCHOR135
 	add	x0, x0, :lo12:.LANCHOR135
 	mov	w2, w19
@@ -9996,11 +10007,11 @@ FtlWrite:
 	adrp	x0, .LC44
 	add	x0, x0, :lo12:.LC44
 	bl	printf
-.L1368:
+.L1369:
 	ldr	w0, [x29, 168]
 	cmp	w19, w25
 	lsl	w2, w0, 9
-	bne	.L1369
+	bne	.L1370
 	ldr	x0, [x27, #:lo12:.LANCHOR105]
 	mov	x1, x26
 	add	x21, x0, x21
@@ -10008,17 +10019,17 @@ FtlWrite:
 	ldr	x3, [x21, 8]
 	lsl	w0, w0, 9
 	add	x0, x3, x0
-.L1389:
+.L1390:
 	bl	ftl_memcpy
-	b	.L1361
-.L1362:
+	b	.L1362
+.L1363:
 	adrp	x1, .LANCHOR110
 	ldr	x1, [x1, #:lo12:.LANCHOR110]
-	b	.L1387
-.L1365:
+	b	.L1388
+.L1366:
 	ldr	w1, [x22, 8]
 	cmp	w19, w1
-	beq	.L1367
+	beq	.L1368
 	adrp	x0, .LANCHOR135
 	add	x0, x0, :lo12:.LANCHOR135
 	ldr	w2, [x0, 72]
@@ -10028,18 +10039,18 @@ FtlWrite:
 	mov	w2, w19
 	add	x0, x0, :lo12:.LC45
 	bl	printf
-.L1367:
+.L1368:
 	ldr	w0, [x22, 8]
 	cmp	w19, w0
-	beq	.L1368
-	mov	w2, 1125
+	beq	.L1369
+	mov	w2, 1128
 	adrp	x1, .LANCHOR177
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	b	.L1368
-.L1364:
+	b	.L1369
+.L1365:
 	ldr	x0, [x27, #:lo12:.LANCHOR105]
 	ldr	x1, [x29, 96]
 	add	x0, x0, x21
@@ -10047,8 +10058,8 @@ FtlWrite:
 	mov	w1, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	b	.L1368
-.L1369:
+	b	.L1369
+.L1370:
 	ldr	x0, [x29, 160]
 	ldrh	w1, [x0, #:lo12:.LANCHOR12]
 	ldr	x0, [x27, #:lo12:.LANCHOR105]
@@ -10058,14 +10069,14 @@ FtlWrite:
 	ldr	x0, [x21, 8]
 	lsl	w1, w1, 9
 	add	x1, x26, x1
-	b	.L1389
-.L1356:
+	b	.L1390
+.L1357:
 	ldr	x0, [x27, #:lo12:.LANCHOR105]
 	add	x21, x0, x21
 	ldr	x0, [x29, 160]
 	ldrh	w0, [x0, #:lo12:.LANCHOR12]
-	b	.L1388
-.L1376:
+	b	.L1389
+.L1377:
 	adrp	x23, .LANCHOR72
 	adrp	x20, .LANCHOR101
 	adrp	x21, .LANCHOR100
@@ -10073,19 +10084,19 @@ FtlWrite:
 	add	x20, x20, :lo12:.LANCHOR101
 	add	x21, x21, :lo12:.LANCHOR100
 	mov	w19, 256
-.L1379:
+.L1380:
 	adrp	x0, .LANCHOR145
 	mov	w1, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR145]
 	cmp	w0, w1
-	bne	.L1377
+	bne	.L1378
 	ldrh	w1, [x23]
 	cmp	w1, w0
-	bne	.L1377
+	bne	.L1378
 	mov	w0, 0
 	bl	List_get_gc_head_node
 	bl	FtlGcRefreshBlock
-.L1377:
+.L1378:
 	mov	w0, 128
 	mov	w1, 1
 	strh	w0, [x20]
@@ -10097,13 +10108,13 @@ FtlWrite:
 	bl	rk_ftl_garbage_collect
 	ldrh	w0, [x22, #:lo12:.LANCHOR48]
 	cmp	w0, 2
-	bhi	.L1378
+	bhi	.L1379
 	subs	w19, w19, #1
-	bne	.L1379
-	b	.L1378
-.L1380:
+	bne	.L1380
+	b	.L1379
+.L1381:
 	mov	w0, -1
-	b	.L1347
+	b	.L1348
 	.size	FtlWrite, .-FtlWrite
 	.section	.text.sftl_gc,"ax",@progbits
 	.align	2
@@ -10145,10 +10156,10 @@ FtlLoadSysInfo:
 	ldrh	w0, [x20, #:lo12:.LANCHOR139]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L1392
-.L1403:
+	bne	.L1393
+.L1404:
 	mov	w0, -1
-.L1391:
+.L1392:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -10156,7 +10167,7 @@ FtlLoadSysInfo:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1392:
+.L1393:
 	add	x24, x20, :lo12:.LANCHOR139
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
@@ -10168,28 +10179,28 @@ FtlLoadSysInfo:
 	ldrsh	w24, [x20, #:lo12:.LANCHOR139]
 	add	x26, x26, :lo12:.LANCHOR23
 	add	x27, x27, :lo12:.LANCHOR178
-.L1394:
-	tbz	w28, #31, .L1400
+.L1395:
+	tbz	w28, #31, .L1401
 	adrp	x1, .LANCHOR178
 	adrp	x0, .LC1
 	mov	w2, 1465
 	add	x1, x1, :lo12:.LANCHOR178
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1399:
+.L1400:
 	adrp	x1, .LANCHOR23
 	ldrh	w0, [x21, #:lo12:.LANCHOR5]
 	ldrh	w1, [x1, #:lo12:.LANCHOR23]
 	add	x0, x0, 24
 	cmp	x1, x0, lsl 1
-	bcs	.L1402
+	bcs	.L1403
 	adrp	x1, .LANCHOR178
 	adrp	x0, .LC1
 	mov	w2, 1467
 	add	x1, x1, :lo12:.LANCHOR178
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1402:
+.L1403:
 	add	x24, x19, :lo12:.LANCHOR138
 	adrp	x19, .LANCHOR39
 	add	x22, x19, :lo12:.LANCHOR39
@@ -10218,7 +10229,7 @@ FtlLoadSysInfo:
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1403
+	bne	.L1404
 	add	x20, x20, :lo12:.LANCHOR139
 	adrp	x0, .LANCHOR10
 	ldrh	w1, [x22, 8]
@@ -10226,7 +10237,7 @@ FtlLoadSysInfo:
 	ldrh	w0, [x0, #:lo12:.LANCHOR10]
 	strh	w1, [x20, 6]
 	cmp	w2, w0
-	bne	.L1403
+	bne	.L1404
 	adrp	x0, .LANCHOR179
 	adrp	x2, .LANCHOR152
 	adrp	x3, .LANCHOR3
@@ -10251,14 +10262,14 @@ FtlLoadSysInfo:
 	udiv	w0, w0, w3
 	adrp	x3, .LANCHOR171
 	strh	w0, [x3, #:lo12:.LANCHOR171]
-	bls	.L1404
+	bls	.L1405
 	adrp	x1, .LANCHOR178
 	adrp	x0, .LC1
 	mov	w2, 1489
 	add	x1, x1, :lo12:.LANCHOR178
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1404:
+.L1405:
 	add	x4, x19, :lo12:.LANCHOR39
 	adrp	x0, .LANCHOR51
 	add	x2, x0, :lo12:.LANCHOR51
@@ -10323,47 +10334,47 @@ FtlLoadSysInfo:
 	adrp	x1, .LANCHOR82
 	ldr	w4, [x1, #:lo12:.LANCHOR82]
 	cmp	w3, w4
-	bls	.L1405
+	bls	.L1406
 	str	w3, [x1, #:lo12:.LANCHOR82]
-.L1405:
+.L1406:
 	add	x19, x19, :lo12:.LANCHOR39
 	adrp	x1, .LANCHOR83
 	ldr	w3, [x1, #:lo12:.LANCHOR83]
 	ldr	w2, [x19, 36]
 	cmp	w2, w3
-	bls	.L1406
+	bls	.L1407
 	str	w2, [x1, #:lo12:.LANCHOR83]
-.L1406:
+.L1407:
 	mov	w1, 65535
 	cmp	w6, w1
-	beq	.L1407
+	beq	.L1408
 	add	x0, x0, :lo12:.LANCHOR51
 	bl	make_superblock
-.L1407:
+.L1408:
 	ldrh	w2, [x20, #:lo12:.LANCHOR52]
 	mov	w1, 65535
 	add	x0, x20, :lo12:.LANCHOR52
 	cmp	w2, w1
-	beq	.L1408
+	beq	.L1409
 	bl	make_superblock
-.L1408:
+.L1409:
 	ldrh	w2, [x21, #:lo12:.LANCHOR53]
 	mov	w1, 65535
 	add	x0, x21, :lo12:.LANCHOR53
 	cmp	w2, w1
-	beq	.L1409
+	beq	.L1410
 	bl	make_superblock
-.L1409:
+.L1410:
 	ldrh	w2, [x22, #:lo12:.LANCHOR145]
 	mov	w1, 65535
 	add	x0, x22, :lo12:.LANCHOR145
 	cmp	w2, w1
-	beq	.L1410
+	beq	.L1411
 	bl	make_superblock
-.L1410:
+.L1411:
 	mov	w0, 0
-	b	.L1391
-.L1400:
+	b	.L1392
+.L1401:
 	add	x3, x19, :lo12:.LANCHOR138
 	orr	w0, w28, w24, lsl 10
 	mov	w2, 1
@@ -10377,15 +10388,15 @@ FtlLoadSysInfo:
 	ldr	x3, [x29, 104]
 	ldr	x0, [x3, 16]
 	ldr	w8, [x0, 12]
-	cbz	w8, .L1395
+	cbz	w8, .L1396
 	ldr	w0, [x19, #:lo12:.LANCHOR138]
 	cmn	w0, #1
-	beq	.L1395
+	beq	.L1396
 	ldrh	w1, [x26]
 	ldr	x0, [x3, 8]
 	bl	js_hash
 	cmp	w8, w0
-	beq	.L1395
+	beq	.L1396
 	add	x10, x20, :lo12:.LANCHOR139
 	mov	w6, w0
 	mov	w5, w8
@@ -10397,39 +10408,39 @@ FtlLoadSysInfo:
 	add	x0, x0, :lo12:.LC46
 	str	x10, [x29, 104]
 	bl	printf
-	cbnz	w28, .L1396
+	cbnz	w28, .L1397
 	ldr	x10, [x29, 104]
 	ldrh	w0, [x10, 4]
 	cmp	w24, w0
-	beq	.L1396
+	beq	.L1397
 	sxth	w24, w0
 	adrp	x0, .LANCHOR20
 	ldrh	w7, [x0, #:lo12:.LANCHOR20]
 	sub	w7, w7, #1
-.L1422:
+.L1423:
 	sxth	w28, w7
-	b	.L1394
-.L1396:
+	b	.L1395
+.L1397:
 	mov	w0, -1
 	str	w0, [x19, #:lo12:.LANCHOR138]
-.L1395:
+.L1396:
 	ldr	w0, [x19, #:lo12:.LANCHOR138]
 	cmn	w0, #1
-	beq	.L1398
+	beq	.L1399
 	ldr	x0, [x22, #:lo12:.LANCHOR106]
 	mov	w1, 19539
 	movk	w1, 0x4654, lsl 16
 	ldr	w0, [x0]
 	cmp	w0, w1
-	bne	.L1398
+	bne	.L1399
 	ldr	x0, [x25, #:lo12:.LANCHOR114]
 	ldrh	w1, [x0]
 	mov	w0, 61604
 	cmp	w1, w0
-	beq	.L1399
-.L1398:
+	beq	.L1400
+.L1399:
 	sub	w7, w28, #1
-	b	.L1422
+	b	.L1423
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
 	.section	.text.FtlMapTblRecovery,"ax",@progbits
 	.align	2
@@ -10478,14 +10489,14 @@ FtlMapTblRecovery:
 	add	x0, x26, :lo12:.LANCHOR20
 	str	w1, [x19, 56]
 	str	x0, [x29, 96]
-.L1424:
+.L1425:
 	ldr	w0, [x29, 152]
 	cmp	w20, w0
-	bge	.L1443
+	bge	.L1444
 	ldr	w0, [x29, 108]
 	sxtw	x28, w20
 	cmp	w20, w0
-	bne	.L1425
+	bne	.L1426
 	lsl	x0, x28, 1
 	mov	w1, 1
 	add	x26, x24, x0
@@ -10506,21 +10517,21 @@ FtlMapTblRecovery:
 	add	x28, x28, :lo12:.LANCHOR180
 	ldr	x0, [x29, 128]
 	add	x22, x0, :lo12:.LANCHOR138
-.L1426:
+.L1427:
 	ldr	w0, [x29, 152]
 	cmp	w24, w0
-	ble	.L1429
-.L1443:
+	ble	.L1430
+.L1444:
 	mov	x0, x19
 	bl	ftl_free_no_use_map_blk
 	adrp	x0, .LANCHOR20
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x0, #:lo12:.LANCHOR20]
 	cmp	w1, w0
-	bne	.L1431
+	bne	.L1432
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L1431:
+.L1432:
 	mov	x0, x19
 	bl	ftl_map_blk_gc
 	mov	x0, x19
@@ -10533,7 +10544,7 @@ FtlMapTblRecovery:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L1429:
+.L1430:
 	ldrh	w0, [x26]
 	mov	w2, 1
 	mov	w1, w2
@@ -10545,16 +10556,16 @@ FtlMapTblRecovery:
 	ldr	w0, [x0, 12]
 	str	w0, [x29, 156]
 	uxtw	x0, w0
-	cbz	w0, .L1427
+	cbz	w0, .L1428
 	ldr	w0, [x22]
 	cmn	w0, #1
-	beq	.L1427
+	beq	.L1428
 	ldrh	w1, [x27]
 	ldr	x0, [x22, 8]
 	bl	js_hash
 	ldr	w1, [x29, 156]
 	cmp	w1, w0
-	beq	.L1427
+	beq	.L1428
 	mov	w5, w0
 	mov	x4, x1
 	mov	w3, w24
@@ -10565,25 +10576,25 @@ FtlMapTblRecovery:
 	bl	printf
 	mov	w0, -1
 	str	w0, [x22]
-.L1427:
+.L1428:
 	ldr	w0, [x22]
 	cmn	w0, #1
-	beq	.L1428
+	beq	.L1429
 	ldrh	w0, [x21, 8]
 	cmp	w25, w0
-	bls	.L1428
+	bls	.L1429
 	ldrh	w2, [x21]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
-	bne	.L1428
+	bne	.L1429
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x22, 4]
 	str	w1, [x23, x0]
-.L1428:
+.L1429:
 	add	w6, w24, 1
 	sxth	w24, w6
-	b	.L1426
-.L1425:
+	b	.L1427
+.L1426:
 	lsl	x2, x28, 1
 	ldr	x0, [x22, #:lo12:.LANCHOR106]
 	str	x0, [x27, 8]
@@ -10600,16 +10611,16 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	w0, [x27]
 	cmn	w0, #1
-	beq	.L1445
+	beq	.L1446
 	ldrh	w1, [x21]
 	ldrh	w0, [x19, 4]
 	cmp	w1, w0
-	bne	.L1445
+	bne	.L1446
 	ldrh	w1, [x21, 8]
 	mov	w0, 64245
 	cmp	w1, w0
-	beq	.L1433
-.L1445:
+	beq	.L1434
+.L1446:
 	adrp	x0, .LANCHOR23
 	add	x0, x0, :lo12:.LANCHOR23
 	mov	w28, 0
@@ -10617,11 +10628,11 @@ FtlMapTblRecovery:
 	adrp	x0, .LANCHOR180
 	add	x0, x0, :lo12:.LANCHOR180
 	str	x0, [x29, 112]
-.L1434:
+.L1435:
 	ldr	x0, [x29, 96]
 	ldrh	w0, [x0]
 	cmp	w28, w0
-	bge	.L1441
+	bge	.L1442
 	ldr	x0, [x29, 136]
 	mov	w2, 1
 	mov	w1, w2
@@ -10634,17 +10645,17 @@ FtlMapTblRecovery:
 	ldr	w0, [x0, 12]
 	str	w0, [x29, 156]
 	uxtw	x0, w0
-	cbz	w0, .L1438
+	cbz	w0, .L1439
 	ldr	w0, [x27]
 	cmn	w0, #1
-	beq	.L1438
+	beq	.L1439
 	ldr	x0, [x29, 120]
 	ldrh	w1, [x0]
 	ldr	x0, [x27, 8]
 	bl	js_hash
 	ldr	w1, [x29, 156]
 	cmp	w1, w0
-	beq	.L1438
+	beq	.L1439
 	mov	x4, x1
 	ldr	x1, [x29, 112]
 	mov	w5, w0
@@ -10655,51 +10666,51 @@ FtlMapTblRecovery:
 	bl	printf
 	mov	w0, -1
 	str	w0, [x27]
-.L1438:
+.L1439:
 	ldr	w0, [x27]
 	cmn	w0, #1
-	beq	.L1439
+	beq	.L1440
 	ldrh	w0, [x21, 8]
 	cmp	w25, w0
-	bls	.L1439
+	bls	.L1440
 	ldrh	w2, [x21]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
-	bne	.L1439
+	bne	.L1440
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x27, 4]
 	str	w1, [x23, x0]
-.L1439:
+.L1440:
 	add	w7, w28, 1
 	sxth	w28, w7
-	b	.L1434
-.L1433:
+	b	.L1435
+.L1434:
 	ldrh	w3, [x26, #:lo12:.LANCHOR20]
 	mov	w0, 0
 	ldr	x4, [x22, #:lo12:.LANCHOR106]
 	sub	w3, w3, #1
-.L1435:
+.L1436:
 	cmp	w0, w3
-	blt	.L1437
-.L1441:
+	blt	.L1438
+.L1442:
 	add	w20, w20, 1
 	sxth	w20, w20
-	b	.L1424
-.L1437:
+	b	.L1425
+.L1438:
 	lsl	w2, w0, 1
 	sxtw	x2, w2
 	lsl	x1, x2, 2
 	ldrh	w1, [x4, x1]
 	cmp	w25, w1
-	bls	.L1436
+	bls	.L1437
 	add	x2, x2, 1
 	ubfiz	x1, x1, 2, 16
 	ldr	w2, [x4, x2, lsl 2]
 	str	w2, [x23, x1]
-.L1436:
+.L1437:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L1435
+	b	.L1436
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
 	.section	.text.FtlLoadVonderInfo,"ax",@progbits
 	.align	2
@@ -10773,20 +10784,20 @@ FtlSysBlkInit:
 	ldrh	w1, [x0, #:lo12:.LANCHOR139]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1470
-.L1472:
+	bne	.L1471
+.L1473:
 	mov	w21, -1
-.L1469:
+.L1470:
 	mov	w0, w21
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1470:
+.L1471:
 	bl	FtlLoadSysInfo
 	mov	w21, w0
-	cbnz	w0, .L1472
+	cbnz	w0, .L1473
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -10802,19 +10813,19 @@ FtlSysBlkInit:
 	ldr	x1, [x0, #:lo12:.LANCHOR55]
 	mov	w0, 0
 	add	x1, x1, 4
-.L1473:
+.L1474:
 	cmp	w0, w2
-	bge	.L1478
+	bge	.L1479
 	ldr	w3, [x1], 16
-	tbz	w3, #31, .L1474
-.L1478:
+	tbz	w3, #31, .L1475
+.L1479:
 	adrp	x3, .LANCHOR83
 	cmp	w0, w2
 	ldr	w1, [x3, #:lo12:.LANCHOR83]
 	add	w1, w1, 32
 	str	w1, [x3, #:lo12:.LANCHOR83]
-	bge	.L1480
-.L1475:
+	bge	.L1481
+.L1476:
 	adrp	x23, .LANCHOR51
 	add	x20, x23, :lo12:.LANCHOR51
 	mov	x0, x20
@@ -10853,17 +10864,17 @@ FtlSysBlkInit:
 	strh	w1, [x0, 30]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1482:
+.L1483:
 	bl	FtlVpcTblFlush
-	b	.L1469
-.L1474:
+	b	.L1470
+.L1475:
 	add	w0, w0, 1
-	b	.L1473
-.L1480:
+	b	.L1474
+.L1481:
 	ldrh	w0, [x19, #:lo12:.LANCHOR156]
-	cbnz	w0, .L1475
+	cbnz	w0, .L1476
 	bl	l2p_flush
-	b	.L1482
+	b	.L1483
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.section	.text.ftl_low_format,"ax",@progbits
 	.align	2
@@ -10886,9 +10897,9 @@ ftl_low_format:
 	str	wzr, [x20, #:lo12:.LANCHOR82]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	w0, .L1484
+	cbz	w0, .L1485
 	bl	FtlMakeBbt
-.L1484:
+.L1485:
 	adrp	x23, .LANCHOR12
 	adrp	x0, .LANCHOR109
 	mov	w6, 23752
@@ -10899,31 +10910,31 @@ ftl_low_format:
 	lsl	w1, w1, 7
 	ldr	x5, [x0, #:lo12:.LANCHOR110]
 	mov	w0, 0
-.L1485:
+.L1486:
 	cmp	w0, w1
-	blt	.L1486
+	blt	.L1487
 	adrp	x21, .LANCHOR5
 	adrp	x22, .LANCHOR6
 	add	x26, x22, :lo12:.LANCHOR6
 	mov	w19, 0
 	ldrh	w25, [x21, #:lo12:.LANCHOR5]
-.L1487:
+.L1488:
 	ldrh	w0, [x26]
 	cmp	w0, w25
-	bhi	.L1488
+	bhi	.L1489
 	adrp	x25, .LANCHOR3
 	sub	w1, w19, #2
 	ldrh	w0, [x25, #:lo12:.LANCHOR3]
 	cmp	w1, w0, lsl 1
-	bgt	.L1489
-.L1493:
+	bgt	.L1490
+.L1494:
 	add	x26, x21, :lo12:.LANCHOR5
 	mov	w19, 0
 	mov	w24, 0
-.L1490:
+.L1491:
 	ldrh	w0, [x26]
 	cmp	w0, w24
-	bhi	.L1494
+	bhi	.L1495
 	adrp	x0, .LANCHOR99
 	ldrh	w1, [x22, #:lo12:.LANCHOR6]
 	ldrh	w4, [x25, #:lo12:.LANCHOR3]
@@ -10940,28 +10951,28 @@ ftl_low_format:
 	mov	w6, 24
 	mul	w6, w4, w6
 	cmp	w19, w6
-	ble	.L1495
+	ble	.L1496
 	sub	w1, w1, w19
 	udiv	w1, w1, w4
 	str	w1, [x3, #:lo12:.LANCHOR152]
 	lsr	w1, w1, 5
 	add	w1, w1, 24
 	strh	w1, [x2, #:lo12:.LANCHOR171]
-.L1495:
+.L1496:
 	adrp	x1, .LANCHOR15
 	ldrh	w1, [x1, #:lo12:.LANCHOR15]
-	cbz	w1, .L1497
+	cbz	w1, .L1498
 	ldrh	w6, [x2, #:lo12:.LANCHOR171]
 	add	w6, w6, w1, lsr 1
 	strh	w6, [x2, #:lo12:.LANCHOR171]
 	mul	w6, w1, w4
 	cmp	w19, w6
-	bge	.L1497
+	bge	.L1498
 	add	w1, w1, 32
 	str	w5, [x3, #:lo12:.LANCHOR152]
 	add	w1, w0, w1
 	strh	w1, [x2, #:lo12:.LANCHOR171]
-.L1497:
+.L1498:
 	ldrh	w1, [x2, #:lo12:.LANCHOR171]
 	adrp	x25, .LANCHOR179
 	ldr	w0, [x3, #:lo12:.LANCHOR152]
@@ -11005,20 +11016,20 @@ ftl_low_format:
 	ldr	x0, [x0, #:lo12:.LANCHOR1]
 	strb	wzr, [x19, 6]
 	bl	ftl_memset
-.L1499:
+.L1500:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1500
+	cbnz	w1, .L1501
 	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L1499
-.L1486:
+	b	.L1500
+.L1487:
 	ubfiz	x3, x0, 2, 16
 	mvn	w2, w0
 	orr	w2, w0, w2, lsl 16
@@ -11026,8 +11037,8 @@ ftl_low_format:
 	and	w0, w0, 65535
 	str	w2, [x4, x3]
 	str	w6, [x5, x3]
-	b	.L1485
-.L1488:
+	b	.L1486
+.L1489:
 	mov	w0, w25
 	mov	w1, 1
 	add	w25, w25, 1
@@ -11035,8 +11046,8 @@ ftl_low_format:
 	add	w19, w19, w0
 	and	w25, w25, 65535
 	and	w19, w19, 65535
-	b	.L1487
-.L1489:
+	b	.L1488
+.L1490:
 	udiv	w0, w19, w0
 	adrp	x1, .LANCHOR31
 	ldr	w19, [x1, #:lo12:.LANCHOR31]
@@ -11046,17 +11057,17 @@ ftl_low_format:
 	add	x24, x22, :lo12:.LANCHOR6
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	w19, [x21, #:lo12:.LANCHOR5]
-.L1491:
+.L1492:
 	ldrh	w0, [x24]
 	cmp	w0, w19
-	bls	.L1493
+	bls	.L1494
 	mov	w0, w19
 	add	w19, w19, 1
 	mov	w1, 1
 	and	w19, w19, 65535
 	bl	FtlLowFormatEraseBlock
-	b	.L1491
-.L1494:
+	b	.L1492
+.L1495:
 	mov	w0, w24
 	mov	w1, 0
 	add	w24, w24, 1
@@ -11064,8 +11075,8 @@ ftl_low_format:
 	add	w19, w19, w0
 	and	w24, w24, 65535
 	and	w19, w19, 65535
-	b	.L1490
-.L1500:
+	b	.L1491
+.L1501:
 	ldr	w1, [x20, #:lo12:.LANCHOR82]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
@@ -11085,20 +11096,20 @@ ftl_low_format:
 	mov	w1, 1
 	strb	wzr, [x0, 6]
 	strb	w1, [x0, 8]
-.L1501:
+.L1502:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1502
+	cbnz	w1, .L1503
 	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L1501
-.L1502:
+	b	.L1502
+.L1503:
 	ldr	w1, [x20, #:lo12:.LANCHOR82]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
@@ -11124,11 +11135,11 @@ ftl_low_format:
 	str	w0, [x20, #:lo12:.LANCHOR82]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	w0, .L1503
+	cbnz	w0, .L1504
 	adrp	x0, .LANCHOR166
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR166]
-.L1503:
+.L1504:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11163,19 +11174,19 @@ sftl_init:
 	adrp	x0, .LANCHOR4
 	ldrh	w0, [x0, #:lo12:.LANCHOR4]
 	bl	FtlFreeSysBlkQueueInit
-.L1509:
+.L1510:
 	bl	FtlLoadBbt
-	cbz	w0, .L1510
-.L1520:
+	cbz	w0, .L1511
+.L1521:
 	ldr	w0, [x19]
 	cmp	w0, 1
-	bne	.L1509
+	bne	.L1510
 	str	wzr, [x19]
 	bl	ftl_low_format
-	b	.L1509
-.L1510:
+	b	.L1510
+.L1511:
 	bl	FtlSysBlkInit
-	cbnz	w0, .L1520
+	cbnz	w0, .L1521
 	mov	w1, 1
 	str	w1, [x20, #:lo12:.LANCHOR166]
 	ldp	x19, x20, [sp, 16]
@@ -11198,17 +11209,17 @@ FtlWriteToIDB:
 	stp	x21, x22, [sp, 32]
 	adrp	x24, .LANCHOR182
 	stp	x27, x28, [sp, 80]
-	bls	.L1522
+	bls	.L1523
 	mov	w19, w0
 	cmp	w0, 575
-	bls	.L1523
-.L1522:
+	bls	.L1524
+.L1523:
 	ldr	w0, [x24, #:lo12:.LANCHOR182]
-	cbnz	w0, .L1524
-.L1589:
+	cbnz	w0, .L1525
+.L1590:
 	mov	w19, 0
-	b	.L1521
-.L1524:
+	b	.L1522
+.L1525:
 	adrp	x0, .LANCHOR183
 	str	x0, [x29, 120]
 	mov	w1, 35899
@@ -11216,7 +11227,7 @@ FtlWriteToIDB:
 	movk	w1, 0xfcdc, lsl 16
 	ldr	w2, [x23]
 	cmp	w2, w1
-	bne	.L1526
+	bne	.L1527
 	adrp	x21, .LANCHOR0
 	add	x0, x21, :lo12:.LANCHOR0
 	mov	w19, 65535
@@ -11225,9 +11236,9 @@ FtlWriteToIDB:
 	mov	x0, 262140
 	add	x2, x23, x0
 	mov	w0, 0
-.L1530:
+.L1531:
 	ldr	w4, [x2]
-	cbnz	w4, .L1527
+	cbnz	w4, .L1528
 	ldr	w4, [x23, w0, uxtw 2]
 	add	w0, w0, 1
 	str	w4, [x2], -4
@@ -11235,13 +11246,13 @@ FtlWriteToIDB:
 	sub	w19, w19, #1
 	csel	w0, w0, wzr, cc
 	cmp	w19, 4096
-	bne	.L1530
+	bne	.L1531
 	mov	w19, 512
-	b	.L1529
-.L1527:
+	b	.L1530
+.L1528:
 	add	w19, w19, 127
 	lsr	w19, w19, 7
-.L1529:
+.L1530:
 	add	w0, w19, 4
 	ubfiz	w1, w1, 2, 14
 	mov	w22, 0
@@ -11252,7 +11263,7 @@ FtlWriteToIDB:
 	str	w0, [x29, 136]
 	adrp	x0, .LANCHOR78
 	add	x20, x0, :lo12:.LANCHOR78
-.L1552:
+.L1553:
 	adrp	x26, .LANCHOR184
 	mov	w1, 0
 	mov	x2, 512
@@ -11265,27 +11276,27 @@ FtlWriteToIDB:
 	add	x0, x0, :lo12:.LANCHOR78
 	ldr	x1, [x0, 32]
 	mul	w25, w27, w22
-	cbz	x1, .L1560
+	cbz	x1, .L1561
 	ldr	x0, [x0, 40]
 	mov	w26, 6
 	cmp	x0, 0
 	mov	w0, 9
 	csel	w26, w26, w0, eq
-.L1531:
+.L1532:
 	ldr	x2, [x20, 8]
 	mov	w1, w25
 	mov	w0, 0
 	blr	x2
 	ldr	w0, [x29, 156]
 	cmp	w0, 1
-	beq	.L1532
+	beq	.L1533
 	ldr	x2, [x20, 8]
 	add	w1, w27, w25
 	mov	w0, 0
 	blr	x2
-.L1532:
+.L1533:
 	cmp	w26, 9
-	bne	.L1562
+	bne	.L1563
 	ldr	x0, [x29, 144]
 	mov	w2, 1024
 	mov	w1, 0
@@ -11310,7 +11321,7 @@ FtlWriteToIDB:
 	add	x0, x28, 12
 	bl	js_hash
 	str	w0, [x28, 8]
-.L1533:
+.L1534:
 	ldr	w0, [x29, 156]
 	mov	x6, x23
 	mul	w0, w0, w27
@@ -11318,22 +11329,22 @@ FtlWriteToIDB:
 	str	w0, [x29, 140]
 	add	w0, w25, 1
 	str	w0, [x29, 132]
-.L1534:
+.L1535:
 	ldr	w0, [x29, 140]
 	mov	w1, w27
 	cmp	w27, w0
-	bcs	.L1541
+	bcs	.L1542
 	cmp	w26, 9
-	bne	.L1535
+	bne	.L1536
 	ldr	w0, [x29, 132]
 	add	w0, w0, w1
-.L1588:
+.L1589:
 	str	w0, [x29, 160]
 	mov	w0, 61424
 	str	w0, [x29, 164]
 	cmp	w1, 0
 	ccmp	w26, 9, 0, eq
-	bne	.L1537
+	bne	.L1538
 	ldr	x1, [x20, 32]
 	mov	w0, 70
 	str	x6, [x29, 104]
@@ -11353,8 +11364,8 @@ FtlWriteToIDB:
 	ldr	w1, [x29, 112]
 	ldr	x6, [x29, 104]
 	cmn	w1, #1
-	bne	.L1538
-.L1541:
+	bne	.L1539
+.L1542:
 	ldr	x0, [x29, 144]
 	ldr	x26, [x0, #:lo12:.LANCHOR184]
 	add	x0, x21, :lo12:.LANCHOR0
@@ -11363,21 +11374,21 @@ FtlWriteToIDB:
 	mul	w1, w0, w22
 	str	w1, [x29, 140]
 	ldr	x1, [x20, 32]
-	cbnz	x1, .L1539
+	cbnz	x1, .L1540
 	mov	w25, 6
-.L1540:
+.L1541:
 	ldr	w1, [x29, 156]
 	mov	x27, 0
 	mul	w0, w1, w0
 	str	w0, [x29, 132]
-.L1543:
+.L1544:
 	ldr	w0, [x29, 132]
 	mov	w1, w27
 	cmp	w27, w0
-	bcs	.L1547
+	bcs	.L1548
 	cmp	w27, 0
 	ccmp	w25, 9, 0, eq
-	bne	.L1544
+	bne	.L1545
 	ldr	x1, [x20, 32]
 	mov	w0, 70
 	blr	x1
@@ -11401,34 +11412,34 @@ FtlWriteToIDB:
 	mov	w1, 18766
 	movk	w1, 0x464e, lsl 16
 	cmp	w0, w1
-	beq	.L1545
-.L1547:
+	beq	.L1546
+.L1548:
 	ldr	x0, [x29, 144]
 	mov	x2, x23
 	mov	x1, 0
 	ldr	x0, [x0, #:lo12:.LANCHOR184]
-.L1546:
+.L1547:
 	ldr	w3, [x29, 136]
 	mov	w26, w1
 	cmp	w1, w3
-	bcc	.L1550
+	bcc	.L1551
 	ldr	w0, [x29, 152]
 	add	w0, w0, 1
 	str	w0, [x29, 152]
 	cmp	w0, 5
-	bls	.L1549
-	b	.L1553
-.L1560:
+	bls	.L1550
+	b	.L1554
+.L1561:
 	mov	w26, 6
-	b	.L1531
-.L1562:
+	b	.L1532
+.L1563:
 	mov	x28, 0
-	b	.L1533
-.L1535:
+	b	.L1534
+.L1536:
 	add	w0, w1, w25
 	lsl	w0, w0, 2
-	b	.L1588
-.L1537:
+	b	.L1589
+.L1538:
 	ldr	x7, [x20, 16]
 	add	x3, x29, 160
 	mov	x2, x6
@@ -11437,20 +11448,20 @@ FtlWriteToIDB:
 	str	x6, [x29, 112]
 	blr	x7
 	cmn	w0, #1
-	beq	.L1541
+	beq	.L1542
 	ldr	x6, [x29, 112]
 	add	x6, x6, 2048
-.L1538:
-	add	x27, x27, 1
-	b	.L1534
 .L1539:
+	add	x27, x27, 1
+	b	.L1535
+.L1540:
 	ldr	x1, [x20, 40]
 	mov	w25, 6
 	cmp	x1, 0
 	mov	w1, 9
 	csel	w25, w25, w1, eq
-	b	.L1540
-.L1544:
+	b	.L1541
+.L1545:
 	ldr	x6, [x20, 24]
 	add	x3, x29, 160
 	ldr	w0, [x29, 140]
@@ -11459,16 +11470,16 @@ FtlWriteToIDB:
 	mov	w0, 0
 	blr	x6
 	cmn	w0, #1
-	beq	.L1547
+	beq	.L1548
 	ldr	w0, [x29, 164]
 	mov	w1, 61424
 	cmp	w0, w1
-	bne	.L1547
+	bne	.L1548
 	add	x26, x26, 2048
-.L1545:
+.L1546:
 	add	x27, x27, 1
-	b	.L1543
-.L1550:
+	b	.L1544
+.L1551:
 	mov	x25, x2
 	ldr	w4, [x0, x1, lsl 2]
 	lsl	x27, x1, 2
@@ -11476,7 +11487,7 @@ FtlWriteToIDB:
 	add	x1, x1, 1
 	ldr	w3, [x25]
 	cmp	w4, w3
-	beq	.L1546
+	beq	.L1547
 	mov	x2, 512
 	mov	w1, 0
 	bl	memset
@@ -11495,16 +11506,16 @@ FtlWriteToIDB:
 	mov	w0, 0
 	mul	w1, w1, w22
 	blr	x2
-.L1549:
+.L1550:
 	ldr	w0, [x29, 156]
 	add	w22, w22, w0
 	cmp	w22, 15
-	bls	.L1552
+	bls	.L1553
 	ldr	w0, [x29, 152]
-	cbnz	w0, .L1553
-.L1526:
+	cbnz	w0, .L1554
+.L1527:
 	mov	w19, -1
-.L1553:
+.L1554:
 	ldr	x0, [x29, 120]
 	str	wzr, [x24, #:lo12:.LANCHOR182]
 	ldr	x0, [x0, #:lo12:.LANCHOR183]
@@ -11512,7 +11523,7 @@ FtlWriteToIDB:
 	adrp	x0, .LANCHOR184
 	ldr	x0, [x0, #:lo12:.LANCHOR184]
 	bl	free
-.L1521:
+.L1522:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11521,11 +11532,11 @@ FtlWriteToIDB:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 224
 	ret
-.L1523:
+.L1524:
 	mov	w21, w1
 	mov	x22, x2
 	cmp	w0, 64
-	bne	.L1554
+	bne	.L1555
 	adrp	x20, .LANCHOR183
 	mov	w0, 262144
 	bl	ftl_malloc
@@ -11536,32 +11547,32 @@ FtlWriteToIDB:
 	adrp	x0, .LANCHOR184
 	str	x1, [x0, #:lo12:.LANCHOR184]
 	ldr	x0, [x20, #:lo12:.LANCHOR183]
-	cbz	x0, .L1555
-	cbz	x1, .L1555
+	cbz	x0, .L1556
+	cbz	x1, .L1556
 	mov	w1, 1
 	mov	w2, 262144
 	str	w1, [x24, #:lo12:.LANCHOR182]
 	mov	w1, 0
 	bl	ftl_memset
-.L1554:
+.L1555:
 	ldr	w0, [x24, #:lo12:.LANCHOR182]
-	cbz	w0, .L1589
+	cbz	w0, .L1590
 	adrp	x0, .LANCHOR183
 	cmp	w19, 63
 	ldr	x1, [x0, #:lo12:.LANCHOR183]
-	bhi	.L1557
+	bhi	.L1558
 	mov	w0, 64
 	sub	w19, w0, w19
 	sub	w21, w21, w19
 	ubfiz	x19, x19, 9, 25
 	add	x22, x22, x19
 	mov	x20, x1
-.L1558:
+.L1559:
 	cmp	w25, 575
-	bls	.L1559
+	bls	.L1560
 	sub	w21, w21, w23
 	sub	w21, w21, #446
-.L1559:
+.L1560:
 	mov	w4, w21
 	mov	x3, x20
 	mov	w2, 262144
@@ -11572,19 +11583,19 @@ FtlWriteToIDB:
 	mov	x1, x22
 	mov	x0, x20
 	bl	ftl_memcpy
-	b	.L1589
-.L1555:
+	b	.L1590
+.L1556:
 	adrp	x1, .LANCHOR185
 	adrp	x0, .LC51
 	add	x1, x1, :lo12:.LANCHOR185
 	add	x0, x0, :lo12:.LC51
 	bl	printf
-	b	.L1554
-.L1557:
+	b	.L1555
+.L1558:
 	lsl	w20, w19, 7
 	sub	w20, w20, #8192
 	add	x20, x1, x20, lsl 2
-	b	.L1558
+	b	.L1559
 	.size	FtlWriteToIDB, .-FtlWriteToIDB
 	.section	.text.sftl_write,"ax",@progbits
 	.align	2
@@ -12927,250 +12938,250 @@ power_up_flag:
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",@progbits,1
 .LC1:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
-	.section	.rodata.__func__.6243,"a",@progbits
+	.section	.rodata.__func__.6234,"a",@progbits
 	.align	3
 	.set	.LANCHOR169,. + 0
-	.type	__func__.6243, %object
-	.size	__func__.6243, 13
-__func__.6243:
+	.type	__func__.6234, %object
+	.size	__func__.6234, 13
+__func__.6234:
 	.string	"FtlProgPages"
-	.section	.rodata.__func__.6271,"a",@progbits
+	.section	.rodata.__func__.6262,"a",@progbits
 	.align	3
 	.set	.LANCHOR177,. + 0
-	.type	__func__.6271, %object
-	.size	__func__.6271, 9
-__func__.6271:
+	.type	__func__.6262, %object
+	.size	__func__.6262, 9
+__func__.6262:
 	.string	"FtlWrite"
-	.section	.rodata.__func__.6346,"a",@progbits
+	.section	.rodata.__func__.6337,"a",@progbits
 	.align	3
 	.set	.LANCHOR128,. + 0
-	.type	__func__.6346, %object
-	.size	__func__.6346, 14
-__func__.6346:
+	.type	__func__.6337, %object
+	.size	__func__.6337, 14
+__func__.6337:
 	.string	"FtlBbt2Bitmap"
-	.section	.rodata.__func__.6381,"a",@progbits
+	.section	.rodata.__func__.6372,"a",@progbits
 	.align	3
 	.set	.LANCHOR141,. + 0
-	.type	__func__.6381, %object
-	.size	__func__.6381, 11
-__func__.6381:
+	.type	__func__.6372, %object
+	.size	__func__.6372, 11
+__func__.6372:
 	.string	"FtlLoadBbt"
-	.section	.rodata.__func__.6496,"a",@progbits
+	.section	.rodata.__func__.6487,"a",@progbits
 	.align	3
 	.set	.LANCHOR49,. + 0
-	.type	__func__.6496, %object
-	.size	__func__.6496, 17
-__func__.6496:
+	.type	__func__.6487, %object
+	.size	__func__.6487, 17
+__func__.6487:
 	.string	"INSERT_FREE_LIST"
-	.section	.rodata.__func__.6501,"a",@progbits
+	.section	.rodata.__func__.6492,"a",@progbits
 	.align	3
 	.set	.LANCHOR45,. + 0
-	.type	__func__.6501, %object
-	.size	__func__.6501, 17
-__func__.6501:
+	.type	__func__.6492, %object
+	.size	__func__.6492, 17
+__func__.6492:
 	.string	"INSERT_DATA_LIST"
-	.section	.rodata.__func__.6532,"a",@progbits
+	.section	.rodata.__func__.6523,"a",@progbits
 	.align	3
 	.set	.LANCHOR50,. + 0
-	.type	__func__.6532, %object
-	.size	__func__.6532, 17
-__func__.6532:
+	.type	__func__.6523, %object
+	.size	__func__.6523, 17
+__func__.6523:
 	.string	"List_remove_node"
-	.section	.rodata.__func__.6564,"a",@progbits
+	.section	.rodata.__func__.6555,"a",@progbits
 	.align	3
 	.set	.LANCHOR54,. + 0
-	.type	__func__.6564, %object
-	.size	__func__.6564, 22
-__func__.6564:
+	.type	__func__.6555, %object
+	.size	__func__.6555, 22
+__func__.6555:
 	.string	"List_update_data_list"
-	.section	.rodata.__func__.6573,"a",@progbits
+	.section	.rodata.__func__.6564,"a",@progbits
 	.align	3
 	.set	.LANCHOR150,. + 0
-	.type	__func__.6573, %object
-	.size	__func__.6573, 16
-__func__.6573:
+	.type	__func__.6564, %object
+	.size	__func__.6564, 16
+__func__.6564:
 	.string	"load_l2p_region"
-	.section	.rodata.__func__.6606,"a",@progbits
+	.section	.rodata.__func__.6597,"a",@progbits
 	.align	3
 	.set	.LANCHOR81,. + 0
-	.type	__func__.6606, %object
-	.size	__func__.6606, 26
-__func__.6606:
+	.type	__func__.6597, %object
+	.size	__func__.6597, 26
+__func__.6597:
 	.string	"ftl_map_blk_alloc_new_blk"
-	.section	.rodata.__func__.6617,"a",@progbits
+	.section	.rodata.__func__.6608,"a",@progbits
 	.align	3
 	.set	.LANCHOR151,. + 0
-	.type	__func__.6617, %object
-	.size	__func__.6617, 15
-__func__.6617:
+	.type	__func__.6608, %object
+	.size	__func__.6608, 15
+__func__.6608:
 	.string	"ftl_map_blk_gc"
-	.section	.rodata.__func__.6632,"a",@progbits
+	.section	.rodata.__func__.6623,"a",@progbits
 	.align	3
 	.set	.LANCHOR148,. + 0
-	.type	__func__.6632, %object
-	.size	__func__.6632, 31
-__func__.6632:
+	.type	__func__.6623, %object
+	.size	__func__.6623, 31
+__func__.6623:
 	.string	"Ftl_write_map_blk_to_last_page"
-	.section	.rodata.__func__.6646,"a",@progbits
+	.section	.rodata.__func__.6637,"a",@progbits
 	.align	3
 	.set	.LANCHOR149,. + 0
-	.type	__func__.6646, %object
-	.size	__func__.6646, 16
-__func__.6646:
+	.type	__func__.6637, %object
+	.size	__func__.6637, 16
+__func__.6637:
 	.string	"FtlMapWritePage"
-	.section	.rodata.__func__.6671,"a",@progbits
+	.section	.rodata.__func__.6662,"a",@progbits
 	.align	3
 	.set	.LANCHOR57,. + 0
-	.type	__func__.6671, %object
-	.size	__func__.6671, 22
-__func__.6671:
+	.type	__func__.6662, %object
+	.size	__func__.6662, 22
+__func__.6662:
 	.string	"select_l2p_ram_region"
-	.section	.rodata.__func__.6688,"a",@progbits
+	.section	.rodata.__func__.6679,"a",@progbits
 	.align	3
 	.set	.LANCHOR153,. + 0
-	.type	__func__.6688, %object
-	.size	__func__.6688, 9
-__func__.6688:
+	.type	__func__.6679, %object
+	.size	__func__.6679, 9
+__func__.6679:
 	.string	"log2phys"
-	.section	.rodata.__func__.6752,"a",@progbits
+	.section	.rodata.__func__.6743,"a",@progbits
 	.align	3
 	.set	.LANCHOR165,. + 0
-	.type	__func__.6752, %object
-	.size	__func__.6752, 15
-__func__.6752:
+	.type	__func__.6743, %object
+	.size	__func__.6743, 15
+__func__.6743:
 	.string	"FtlVpcTblFlush"
-	.section	.rodata.__func__.6774,"a",@progbits
+	.section	.rodata.__func__.6765,"a",@progbits
 	.align	3
 	.set	.LANCHOR140,. + 0
-	.type	__func__.6774, %object
-	.size	__func__.6774, 14
-__func__.6774:
+	.type	__func__.6765, %object
+	.size	__func__.6765, 14
+__func__.6765:
 	.string	"FtlScanSysBlk"
-	.section	.rodata.__func__.6830,"a",@progbits
+	.section	.rodata.__func__.6821,"a",@progbits
 	.align	3
 	.set	.LANCHOR178,. + 0
-	.type	__func__.6830, %object
-	.size	__func__.6830, 15
-__func__.6830:
+	.type	__func__.6821, %object
+	.size	__func__.6821, 15
+__func__.6821:
 	.string	"FtlLoadSysInfo"
-	.section	.rodata.__func__.6852,"a",@progbits
+	.section	.rodata.__func__.6843,"a",@progbits
 	.align	3
 	.set	.LANCHOR180,. + 0
-	.type	__func__.6852, %object
-	.size	__func__.6852, 18
-__func__.6852:
+	.type	__func__.6843, %object
+	.size	__func__.6843, 18
+__func__.6843:
 	.string	"FtlMapTblRecovery"
-	.section	.rodata.__func__.6898,"a",@progbits
+	.section	.rodata.__func__.6889,"a",@progbits
 	.align	3
 	.set	.LANCHOR154,. + 0
-	.type	__func__.6898, %object
-	.size	__func__.6898, 16
-__func__.6898:
+	.type	__func__.6889, %object
+	.size	__func__.6889, 16
+__func__.6889:
 	.string	"FtlReUsePrevPpa"
-	.section	.rodata.__func__.6932,"a",@progbits
+	.section	.rodata.__func__.6923,"a",@progbits
 	.align	3
 	.set	.LANCHOR155,. + 0
-	.type	__func__.6932, %object
-	.size	__func__.6932, 22
-__func__.6932:
+	.type	__func__.6923, %object
+	.size	__func__.6923, 22
+__func__.6923:
 	.string	"FtlRecoverySuperblock"
-	.section	.rodata.__func__.6989,"a",@progbits
+	.section	.rodata.__func__.6980,"a",@progbits
 	.align	3
 	.set	.LANCHOR60,. + 0
-	.type	__func__.6989, %object
-	.size	__func__.6989, 16
-__func__.6989:
+	.type	__func__.6980, %object
+	.size	__func__.6980, 16
+__func__.6980:
 	.string	"make_superblock"
-	.section	.rodata.__func__.7010,"a",@progbits
+	.section	.rodata.__func__.7001,"a",@progbits
 	.align	3
 	.set	.LANCHOR136,. + 0
-	.type	__func__.7010, %object
-	.size	__func__.7010, 18
-__func__.7010:
+	.type	__func__.7001, %object
+	.size	__func__.7001, 18
+__func__.7001:
 	.string	"SupperBlkListInit"
-	.section	.rodata.__func__.7037,"a",@progbits
+	.section	.rodata.__func__.7028,"a",@progbits
 	.align	3
 	.set	.LANCHOR159,. + 0
-	.type	__func__.7037, %object
-	.size	__func__.7037, 14
-__func__.7037:
+	.type	__func__.7028, %object
+	.size	__func__.7028, 14
+__func__.7028:
 	.string	"ftl_check_vpc"
-	.section	.rodata.__func__.7102,"a",@progbits
+	.section	.rodata.__func__.7093,"a",@progbits
 	.align	3
 	.set	.LANCHOR144,. + 0
-	.type	__func__.7102, %object
-	.size	__func__.7102, 25
-__func__.7102:
+	.type	__func__.7093, %object
+	.size	__func__.7093, 25
+__func__.7093:
 	.string	"allocate_data_superblock"
-	.section	.rodata.__func__.7123,"a",@progbits
+	.section	.rodata.__func__.7114,"a",@progbits
 	.align	3
 	.set	.LANCHOR168,. + 0
-	.type	__func__.7123, %object
-	.size	__func__.7123, 29
-__func__.7123:
+	.type	__func__.7114, %object
+	.size	__func__.7114, 29
+__func__.7114:
 	.string	"allocate_new_data_superblock"
-	.section	.rodata.__func__.7130,"a",@progbits
+	.section	.rodata.__func__.7121,"a",@progbits
 	.align	3
 	.set	.LANCHOR61,. + 0
-	.type	__func__.7130, %object
-	.size	__func__.7130, 19
-__func__.7130:
+	.type	__func__.7121, %object
+	.size	__func__.7121, 19
+__func__.7121:
 	.string	"get_new_active_ppa"
-	.section	.rodata.__func__.7143,"a",@progbits
+	.section	.rodata.__func__.7134,"a",@progbits
 	.align	3
 	.set	.LANCHOR146,. + 0
-	.type	__func__.7143, %object
-	.size	__func__.7143, 16
-__func__.7143:
+	.type	__func__.7134, %object
+	.size	__func__.7134, 16
+__func__.7134:
 	.string	"update_vpc_list"
-	.section	.rodata.__func__.7150,"a",@progbits
+	.section	.rodata.__func__.7141,"a",@progbits
 	.align	3
 	.set	.LANCHOR147,. + 0
-	.type	__func__.7150, %object
-	.size	__func__.7150, 20
-__func__.7150:
+	.type	__func__.7141, %object
+	.size	__func__.7141, 20
+__func__.7141:
 	.string	"decrement_vpc_count"
-	.section	.rodata.__func__.7220,"a",@progbits
+	.section	.rodata.__func__.7211,"a",@progbits
 	.align	3
 	.set	.LANCHOR170,. + 0
-	.type	__func__.7220, %object
-	.size	__func__.7220, 19
-__func__.7220:
+	.type	__func__.7211, %object
+	.size	__func__.7211, 19
+__func__.7211:
 	.string	"FtlGcFreeTempBlock"
-	.section	.rodata.__func__.7319,"a",@progbits
+	.section	.rodata.__func__.7310,"a",@progbits
 	.align	3
 	.set	.LANCHOR175,. + 0
-	.type	__func__.7319, %object
-	.size	__func__.7319, 23
-__func__.7319:
+	.type	__func__.7310, %object
+	.size	__func__.7310, 23
+__func__.7310:
 	.string	"rk_ftl_garbage_collect"
-	.section	.rodata.__func__.7591,"a",@progbits
+	.section	.rodata.__func__.7582,"a",@progbits
 	.align	3
 	.set	.LANCHOR137,. + 0
-	.type	__func__.7591, %object
-	.size	__func__.7591, 15
-__func__.7591:
+	.type	__func__.7582, %object
+	.size	__func__.7582, 15
+__func__.7582:
 	.string	"FlashReadPages"
-	.section	.rodata.__func__.7610,"a",@progbits
+	.section	.rodata.__func__.7601,"a",@progbits
 	.align	3
 	.set	.LANCHOR142,. + 0
-	.type	__func__.7610, %object
-	.size	__func__.7610, 15
-__func__.7610:
+	.type	__func__.7601, %object
+	.size	__func__.7601, 15
+__func__.7601:
 	.string	"FlashProgPages"
-	.section	.rodata.__func__.7634,"a",@progbits
+	.section	.rodata.__func__.7625,"a",@progbits
 	.align	3
 	.set	.LANCHOR77,. + 0
-	.type	__func__.7634, %object
-	.size	__func__.7634, 17
-__func__.7634:
+	.type	__func__.7625, %object
+	.size	__func__.7625, 17
+__func__.7625:
 	.string	"FlashEraseBlocks"
-	.section	.rodata.__func__.7749,"a",@progbits
+	.section	.rodata.__func__.7740,"a",@progbits
 	.align	3
 	.set	.LANCHOR185,. + 0
-	.type	__func__.7749, %object
-	.size	__func__.7749, 14
-__func__.7749:
+	.type	__func__.7740, %object
+	.size	__func__.7740, 14
+__func__.7740:
 	.string	"FtlWriteToIDB"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",@progbits,1
 .LC21:
diff --git a/drivers/rkflash/sfc_nand.c b/drivers/rkflash/sfc_nand.c
index 81434126cc..012e1d1d00 100644
--- a/drivers/rkflash/sfc_nand.c
+++ b/drivers/rkflash/sfc_nand.c
@@ -60,7 +60,15 @@ static struct nand_info spi_nand_tbl[] = {
 	/* EM73C044SNC-G */
 	{0xD522, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 8, 0xB0, 0x0, 4, 20, NULL},
 	/* EM73D044SNB-G */
-	{0xD520, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 8, 0xB0, 0x0, 4, 20, NULL}
+	{0xD520, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 8, 0xB0, 0x0, 4, 20, NULL},
+	/* ATO25D1GA */
+	{0x9B12, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x40, 18, 1, 0xB0, 0x0, 20, 36, &sfc_nand_ecc_status_sp1},
+	/* XT26G02B */
+	{0x0BF2, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 1, 0xB0, 0x0, 8, 12, &sfc_nand_ecc_status_sp4},
+	/* XT26G01B */
+	{0x0BF1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xB0, 0x0, 8, 12, &sfc_nand_ecc_status_sp4},
+	/* HYF4GQ4UAACBE */
+	{0xC9D4, 8, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 20, 4, 0xB0, 0, 32, 64, NULL},
 };
 
 static u8 id_byte[8];
@@ -383,15 +391,20 @@ static u32 sfc_nand_prog_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
 	union SFCCMD_DATA sfcmd;
 	union SFCCTRL_DATA sfctrl;
 	u8 status;
-	u32 data_sz = 2048;
+	u32 sec_per_page = p_nand_info->sec_per_page;
 	u32 spare_offs_1 = p_nand_info->spare_offs_1;
 	u32 spare_offs_2 = p_nand_info->spare_offs_2;
-
-	memcpy(gp_page_buf, p_data, data_sz);
-	ftl_memset(&gp_page_buf[data_sz / 4], 0xff, 64);
-	gp_page_buf[(data_sz + spare_offs_1) / 4] = p_spare[0];
-	gp_page_buf[(data_sz + spare_offs_2) / 4] = p_spare[1];
-
+	u32 data_size = sec_per_page * 512;
+
+	PRINT_SFC_I("%s %x %x %x\n", __func__, addr, p_data[0], p_spare[0]);
+	memcpy(gp_page_buf, p_data, data_size);
+	ftl_memset(&gp_page_buf[data_size / 4], 0xff, sec_per_page * 16);
+	gp_page_buf[(data_size + spare_offs_1) / 4] = p_spare[0];
+	gp_page_buf[(data_size + spare_offs_2) / 4] = p_spare[1];
+	if (sec_per_page == 8) {
+		gp_page_buf[(data_size + spare_offs_1) / 4 + 1] = p_spare[2];
+		gp_page_buf[(data_size + spare_offs_2) / 4 + 1] = p_spare[3];
+	}
 	sfc_nand_write_en();
 	if (sfc_nand_dev.prog_lines == DATA_LINES_X4 &&
 	    p_nand_info->feature & FEA_SOFT_QOP_BIT &&
@@ -401,7 +414,7 @@ static u32 sfc_nand_prog_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
 	sfcmd.d32 = 0;
 	sfcmd.b.cmd = sfc_nand_dev.page_prog_cmd;
 	sfcmd.b.addrbits = SFC_ADDR_XBITS;
-	sfcmd.b.datasize = SFC_NAND_PAGE_MAX_SIZE;
+	sfcmd.b.datasize = SFC_NAND_SECTOR_FULL_SIZE * sec_per_page;
 	sfcmd.b.rw = SFC_WRITE;
 
 	sfctrl.d32 = 0;
@@ -431,10 +444,12 @@ static u32 sfc_nand_read_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
 	union SFCCMD_DATA sfcmd;
 	union SFCCTRL_DATA sfctrl;
 	u32 ecc_result;
-	u32 data_sz = 2048;
 	u32 spare_offs_1 = p_nand_info->spare_offs_1;
 	u32 spare_offs_2 = p_nand_info->spare_offs_2;
+	u32 sec_per_page = p_nand_info->sec_per_page;
+	u32 data_size = sec_per_page * 512;
 
+	PRINT_SFC_I("%s %x %x %x\n", __func__, addr, p_data[0], p_spare[0]);
 	sfcmd.d32 = 0;
 	sfcmd.b.cmd = p_nand_info->page_read_cmd;
 	sfcmd.b.datasize = 0;
@@ -453,18 +468,20 @@ static u32 sfc_nand_read_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
 
 	sfcmd.d32 = 0;
 	sfcmd.b.cmd = sfc_nand_dev.page_read_cmd;
-	sfcmd.b.datasize = SFC_NAND_PAGE_MAX_SIZE;
+	sfcmd.b.datasize = SFC_NAND_SECTOR_FULL_SIZE * sec_per_page;
 	sfcmd.b.addrbits = SFC_ADDR_24BITS;
 	sfctrl.d32 = 0;
 	sfctrl.b.datalines = sfc_nand_dev.read_lines;
 
 	plane = p_nand_info->plane_per_die == 2 ? ((addr >> 6) & 0x1) << 12 : 0;
-	memset(gp_page_buf, 0, SFC_NAND_PAGE_MAX_SIZE);
 	ret = sfc_request(sfcmd.d32, sfctrl.d32, plane << 8, gp_page_buf);
-
-	memcpy(p_data, gp_page_buf, data_sz);
-	p_spare[0] = gp_page_buf[(data_sz + spare_offs_1) / 4];
-	p_spare[1] = gp_page_buf[(data_sz + spare_offs_2) / 4];
+	memcpy(p_data, gp_page_buf, data_size);
+	p_spare[0] = gp_page_buf[(data_size + spare_offs_1) / 4];
+	p_spare[1] = gp_page_buf[(data_size + spare_offs_2) / 4];
+	if (p_nand_info->sec_per_page == 8) {
+		p_spare[2] = gp_page_buf[(data_size + spare_offs_1) / 4 + 1];
+		p_spare[3] = gp_page_buf[(data_size + spare_offs_2) / 4 + 1];
+	}
 	if (ret != SFC_OK)
 		return SFC_NAND_ECC_ERROR;
 
@@ -475,6 +492,7 @@ static u32 sfc_nand_read_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
 		if (p_spare)
 			PRINT_SFC_HEX("spare:", p_spare, 4, 2);
 	}
+
 	return ecc_result;
 }
 
diff --git a/drivers/rkflash/sfc_nand.h b/drivers/rkflash/sfc_nand.h
index 82641acc2f..c3ddf85200 100644
--- a/drivers/rkflash/sfc_nand.h
+++ b/drivers/rkflash/sfc_nand.h
@@ -15,7 +15,8 @@
 #define SFC_NAND_ECC_REFRESH		NAND_STS_REFRESH
 #define SFC_NAND_ECC_OK			NAND_STS_OK
 
-#define SFC_NAND_PAGE_MAX_SIZE		2112
+#define SFC_NAND_PAGE_MAX_SIZE		4224
+#define SFC_NAND_SECTOR_FULL_SIZE	528
 
 #define FEA_READ_STATUE_MASK    (0x3 << 0)
 #define FEA_STATUE_MODE1        0
@@ -113,8 +114,8 @@ struct nand_info {
 	u8 QE_address;
 	u8 QE_bits;
 
-	u8 spare_offs_1;
-	u8 spare_offs_2;
+	u8 spare_offs_1;	/* 4/8 bytes for 2KB/4KB page size flash */
+	u8 spare_offs_2;	/* 4/8 bytes for 2KB/4KB page size flash */
 	u32 (*ecc_status)(void);
 };
 

commit 12bc9cd8e1c8f306b494aca0859d4ab9cfd98216
Author: Zorro Liu <lyx@rock-chips.com>
Date:   Mon Apr 22 15:01:13 2019 +0800

    rockchip: dts: rk3368: enable sdmmc
    
    Change-Id: I9c9147a952572b36a389dd6ea958f68cdc712121
    Signed-off-by: Zorro Liu <lyx@rock-chips.com>

diff --git a/arch/arm/dts/rk3368-u-boot.dtsi b/arch/arm/dts/rk3368-u-boot.dtsi
index 971a3dc5b6..38ba454823 100644
--- a/arch/arm/dts/rk3368-u-boot.dtsi
+++ b/arch/arm/dts/rk3368-u-boot.dtsi
@@ -22,6 +22,7 @@
 
 &sdmmc {
 	u-boot,dm-pre-reloc;
+	status = "okay";
 };
 
 &emmc {

commit b04f87d753c5493d960bf41862ff3b97a8e72fc8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Apr 17 21:03:43 2019 +0800

    common: spl: support booting bl32
    
    Change-Id: I525f2b3c9ce24464a775291ab8924adbc0da85f0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/spl/spl_atf.c b/common/spl/spl_atf.c
index 5f9aa95e30..e1e7f43f9f 100644
--- a/common/spl/spl_atf.c
+++ b/common/spl/spl_atf.c
@@ -31,8 +31,10 @@ static struct bl31_params *bl2_to_bl31_params;
  *
  * @return bl31 params structure pointer
  */
-static struct bl31_params *bl2_plat_get_bl31_params(uintptr_t bl33_entry)
+static struct bl31_params *bl2_plat_get_bl31_params(uintptr_t bl32_entry,
+						    uintptr_t bl33_entry)
 {
+	struct entry_point_info *bl32_ep_info;
 	struct entry_point_info *bl33_ep_info;
 
 	/*
@@ -49,17 +51,24 @@ static struct bl31_params *bl2_plat_get_bl31_params(uintptr_t bl33_entry)
 	SET_PARAM_HEAD(bl2_to_bl31_params->bl31_image_info,
 		       ATF_PARAM_IMAGE_BINARY, ATF_VERSION_1, 0);
 
-	/* Fill BL32 related information if it exists */
+	if (bl32_entry == -1)
+		goto bl33_setup;
+
+	/* Fill BL32 related information */
 	bl2_to_bl31_params->bl32_ep_info = &bl31_params_mem.bl32_ep_info;
-	SET_PARAM_HEAD(bl2_to_bl31_params->bl32_ep_info, ATF_PARAM_EP,
-		       ATF_VERSION_1, 0);
+	bl32_ep_info = &bl31_params_mem.bl32_ep_info;
+	SET_PARAM_HEAD(bl32_ep_info, ATF_PARAM_EP, ATF_VERSION_1,
+		       ATF_EP_SECURE);
+
+	bl32_ep_info->pc = bl32_entry;
+	bl32_ep_info->spsr = SPSR_64(MODE_EL1, MODE_SP_ELX,
+				     DISABLE_ALL_EXECPTIONS);
+
 	bl2_to_bl31_params->bl32_image_info = &bl31_params_mem.bl32_image_info;
 	SET_PARAM_HEAD(bl2_to_bl31_params->bl32_image_info,
 		       ATF_PARAM_IMAGE_BINARY, ATF_VERSION_1, 0);
-#ifndef BL32_BASE
-	bl2_to_bl31_params->bl32_ep_info->pc = 0;
-#endif /* BL32_BASE */
 
+bl33_setup:
 	/* Fill BL33 related information */
 	bl2_to_bl31_params->bl33_ep_info = &bl31_params_mem.bl33_ep_info;
 	bl33_ep_info = &bl31_params_mem.bl33_ep_info;
@@ -86,13 +95,13 @@ static inline void raw_write_daif(unsigned int daif)
 
 typedef void (*atf_entry_t)(struct bl31_params *params, void *plat_params);
 
-static void bl31_entry(uintptr_t bl31_entry, uintptr_t bl33_entry,
-		       uintptr_t fdt_addr)
+static void bl31_entry(uintptr_t bl31_entry, uintptr_t bl32_entry,
+		       uintptr_t bl33_entry, uintptr_t fdt_addr)
 {
 	struct bl31_params *bl31_params;
 	atf_entry_t  atf_entry = (atf_entry_t)bl31_entry;
 
-	bl31_params = bl2_plat_get_bl31_params(bl33_entry);
+	bl31_params = bl2_plat_get_bl31_params(bl32_entry, bl33_entry);
 
 	raw_write_daif(SPSR_EXCEPTION_MASK);
 	dcache_disable();
@@ -100,7 +109,7 @@ static void bl31_entry(uintptr_t bl31_entry, uintptr_t bl33_entry,
 	atf_entry((void *)bl31_params, (void *)fdt_addr);
 }
 
-static int spl_fit_images_find_uboot(void *blob)
+static int spl_fit_images_find(void *blob, int os)
 {
 	int parent, node, ndepth;
 	const void *data;
@@ -122,7 +131,7 @@ static int spl_fit_images_find_uboot(void *blob)
 		if (!data)
 			continue;
 
-		if (genimg_get_os_id(data) == IH_OS_U_BOOT)
+		if (genimg_get_os_id(data) == os)
 			return node;
 	};
 
@@ -143,11 +152,16 @@ uintptr_t spl_fit_images_get_entry(void *blob, int node)
 
 void spl_invoke_atf(struct spl_image_info *spl_image)
 {
+	uintptr_t  bl32_entry = -1;
 	uintptr_t  bl33_entry = CONFIG_SYS_TEXT_BASE;
 	void *blob = spl_image->fdt_addr;
 	uintptr_t platform_param = (uintptr_t)blob;
 	int node;
 
+	node = spl_fit_images_find(blob, IH_OS_OP_TEE);
+	if (node >= 0)
+		bl32_entry = spl_fit_images_get_entry(blob, node);
+
 	/*
 	 * Find the U-Boot binary (in /fit-images) load addreess or
 	 * entry point (if different) and pass it as the BL3-3 entry
@@ -155,7 +169,7 @@ void spl_invoke_atf(struct spl_image_info *spl_image)
 	 * This will need to be extended to support Falcon mode.
 	 */
 
-	node = spl_fit_images_find_uboot(blob);
+	node = spl_fit_images_find(blob, IH_OS_U_BOOT);
 	if (node >= 0)
 		bl33_entry = spl_fit_images_get_entry(blob, node);
 
@@ -172,5 +186,6 @@ void spl_invoke_atf(struct spl_image_info *spl_image)
 	 * We don't provide a BL3-2 entry yet, but this will be possible
 	 * using similar logic.
 	 */
-	bl31_entry(spl_image->entry_point, bl33_entry, platform_param);
+	bl31_entry(spl_image->entry_point, bl32_entry,
+		   bl33_entry, platform_param);
 }

commit 5c391abe02aa2fcbbeef962000584c7bac6ca193
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Feb 22 22:17:43 2019 +0800

    rockchip: dts: rk3368: add cd-gpios
    
    Add cd-gpios to test the mmc device whether exit.
    
    Change-Id: I8ab96fd5300da25d82005ac638e6d2b728ed82ce
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/dts/rk3368-u-boot.dtsi b/arch/arm/dts/rk3368-u-boot.dtsi
index 6e2a2ab2b4..971a3dc5b6 100644
--- a/arch/arm/dts/rk3368-u-boot.dtsi
+++ b/arch/arm/dts/rk3368-u-boot.dtsi
@@ -65,3 +65,7 @@
 &usb_otg {
 	u-boot,dm-pre-reloc;
 };
+
+&gpio2 {
+	u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/rk3368.dtsi b/arch/arm/dts/rk3368.dtsi
index 082954f212..228e8af994 100644
--- a/arch/arm/dts/rk3368.dtsi
+++ b/arch/arm/dts/rk3368.dtsi
@@ -251,6 +251,7 @@
 			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
 		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
 		fifo-depth = <0x100>;
+		cd-gpios = <&gpio2 RK_PB3 GPIO_ACTIVE_HIGH>;
 		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
 		status = "disabled";
 	};

commit b54b76f12afdabdb91bf4fcae5bad640425ab7fe
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 18 15:20:26 2019 +0800

    configs: add rknpu-lion_defconfig
    
    Change-Id: I89d2cc39febbfd4cab8373f0be6f437957c6b758
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3399pro-npu_defconfig b/configs/rknpu-lion_defconfig
similarity index 100%
rename from configs/rk3399pro-npu_defconfig
rename to configs/rknpu-lion_defconfig
diff --git a/make.sh b/make.sh
index da072205b9..cad6f3ae4c 100755
--- a/make.sh
+++ b/make.sh
@@ -21,7 +21,7 @@ SUPPORT_LIST=`ls configs/*[r,p][x,v,k][0-9][0-9]*_defconfig`
 #
 # Format:           target board               label         loader      trust
 RKCHIP_INI_DESC=("CONFIG_TARGET_GVA_RK3229       NA          RK322XAT     NA"
-                 "CONFIG_COPROCESSOR_RK1808  RK3399PRO-NPU  RK3399PRONPU  RK3399PRONPU"
+                 "CONFIG_COPROCESSOR_RK1808  RKNPU-LION      RKNPULION    RKNPULION"
 # to be add...
                 )
 

commit f992fe3334aa5090acb448261982628b5a3d37a5
Author: Yu YongZhen <yuyz@rock-chips.com>
Date:   Tue Apr 16 09:06:27 2019 +0800

    clk: rockchip: rk3308: Make DCLK_VOP clock id consistent with kernel
    
    Change-Id: I3e5b042a5e7b4bd4a7724451b30cfa9601955541
    Signed-off-by: Yu YongZhen <yuyz@rock-chips.com>

diff --git a/include/dt-bindings/clock/rk3308-cru.h b/include/dt-bindings/clock/rk3308-cru.h
index 7ba1b86ccd..5f4a34bc0c 100644
--- a/include/dt-bindings/clock/rk3308-cru.h
+++ b/include/dt-bindings/clock/rk3308-cru.h
@@ -132,7 +132,7 @@
 #define SCLK_I2S1_2CH_SRC	119
 
 /* dclk */
-#define DCLK_VOP		120
+#define DCLK_VOP		125
 
 /* aclk */
 #define ACLK_BUS_SRC		130

commit ed73b76733ce7cd243da2ebec965b0e1fca8924d
Author: Yu YongZhen <yuyz@rock-chips.com>
Date:   Tue Apr 16 08:56:06 2019 +0800

    rockchip: rk3308: release GPIO0_A4 for other usage
    
    After switch to io_vsel3 after system power on, we should release
    GPIO0_A4 for other usage.
    
    Change-Id: I16bc33fd976fe957b57cd3a0f90ff44659ca93f2
    Signed-off-by: Yu YongZhen <yuyz@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3308/rk3308.c b/arch/arm/mach-rockchip/rk3308/rk3308.c
index 0d11073ddf..8b4f939885 100644
--- a/arch/arm/mach-rockchip/rk3308/rk3308.c
+++ b/arch/arm/mach-rockchip/rk3308/rk3308.c
@@ -120,6 +120,7 @@ int rk_board_init(void)
 		      VCCIO3_3V3 << IOVSEL3_SHIFT;
 	rk_clrsetreg(&grf->soc_con0, IOVSEL3_CTRL_MASK | IOVSEL3_MASK, val);
 
+	gpio_free(GPIO0_A4);
 	return 0;
 }
 

commit 0436a29d64ac791fefc764fadc7e64ba16bb6b25
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 11 09:42:58 2019 +0800

    make.sh: use "${RKCHIP_LOADER}MINIALL*.ini" to match ini files
    
    clean: use variant "ini" for default MINIALL.ini path
    
    Change-Id: Ia1583a915ebbbc4ec5299b9ef6d81b04592bd04b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index b2e50ecca6..da072205b9 100755
--- a/make.sh
+++ b/make.sh
@@ -543,17 +543,17 @@ pack_uboot_image()
 
 pack_loader_image()
 {
-	local mode=$1 files ini
+	local mode=$1 files ini=${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL.ini
 
-	if [ ! -f ${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL.ini ]; then
-		echo "pack loader failed! Can't find: ${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL.ini"
+	if [ ! -f $ini ]; then
+		echo "pack loader failed! Can't find: $ini"
 		return
 	fi
 
 	cd ${RKBIN}
 
 	if [ "${mode}" = 'all' ]; then
-		files=`ls ${RKBIN}/RKBOOT/${RKCHIP_LOADER}*MINIALL*.ini`
+		files=`ls ${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL*.ini`
 		for ini in $files
 		do
 			if [ -f "$ini" ]; then
@@ -562,8 +562,8 @@ pack_loader_image()
 			fi
 		done
 	else
-		${RKTOOLS}/boot_merger ${BIN_PATH_FIXUP} ${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL.ini
-		echo "pack loader okay! Input: ${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL.ini"
+		${RKTOOLS}/boot_merger ${BIN_PATH_FIXUP} $ini
+		echo "pack loader okay! Input: $ini"
 	fi
 
 	cd - && mv ${RKBIN}/*_loader_*.bin ./

commit f089d907dee8c0ceb2394ba1cdca43cc3cd8d90d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Apr 10 13:05:28 2019 +0800

    make.sh: add max limit size check before packing uboot.img
    
    The uboot.img header is 2KB size.
    
    Change-Id: Ia99b71740423a5809233a3401f5a8698ae463749
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 98b0a00b9c..b2e50ecca6 100755
--- a/make.sh
+++ b/make.sh
@@ -504,8 +504,24 @@ debug_command()
 
 pack_uboot_image()
 {
-	local UBOOT_LOAD_ADDR
+	local UBOOT_LOAD_ADDR UBOOT_MAX_KB UBOOT_KB HEAD_KB=2
 
+	# Check file size
+	UBOOT_KB=`ls -l u-boot.bin | awk '{print $5}'`
+	if [ "$PLATFORM_UBOOT_IMG_SIZE" = "" ]; then
+		UBOOT_MAX_KB=1046528
+	else
+		UBOOT_MAX_KB=`echo $PLATFORM_UBOOT_IMG_SIZE | awk '{print strtonum($2)}'`
+		UBOOT_MAX_KB=$(((UBOOT_MAX_KB-HEAD_KB)*1024))
+	fi
+
+	if [ $UBOOT_KB -gt $UBOOT_MAX_KB ]; then
+		echo
+		echo "ERROR: pack uboot failed! u-boot.bin actual: $UBOOT_KB bytes, max limit: $UBOOT_MAX_KB bytes"
+		exit 1
+	fi
+
+	# Pack image
 	UBOOT_LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
 	if [ ! $UBOOT_LOAD_ADDR ]; then
 		UBOOT_LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${OUTDIR}/.config|tr -d '\r'`

commit 9ad3008a7cac542073b79097dc7903fd2d5042b2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 11 14:23:01 2019 +0800

    tools: rockchip: boot/trust_merger: fix prefix append error
    
    - still append prefix if not match legacy prefix;
    - ignore append prefix for output;
    
    Change-Id: I1a8fc77ce73cbf169af49ce40ce3a0731861c617
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/tools/rockchip/boot_merger.c b/tools/rockchip/boot_merger.c
index 9a23a7d30f..923bdb75ba 100644
--- a/tools/rockchip/boot_merger.c
+++ b/tools/rockchip/boot_merger.c
@@ -143,6 +143,10 @@ static inline void fixPath(char *path)
 			*start = '\0';
 			strcat(path, gNewPath);
 			strcat(path, tmp);
+		} else {
+			strcpy(tmp, path);
+			strcpy(path, gNewPath);
+			strcat(path, tmp);
 		}
 	}
 }
@@ -309,7 +313,6 @@ static bool parseOut(FILE *file)
 	}
 	if (fscanf(file, OPT_OUT_PATH "=%[^\r^\n]", gOpts.outPath) != 1)
 		return false;
-	fixPath(gOpts.outPath);
 	printf("out:%s\n", gOpts.outPath);
 	return true;
 }
diff --git a/tools/rockchip/trust_merger.c b/tools/rockchip/trust_merger.c
index fa89d3b5db..81e4da8a9b 100644
--- a/tools/rockchip/trust_merger.c
+++ b/tools/rockchip/trust_merger.c
@@ -104,6 +104,10 @@ static inline void fixPath(char *path)
 			*start = '\0';
 			strcat(path, gNewPath);
 			strcat(path, tmp);
+		} else {
+			strcpy(tmp, path);
+			strcpy(path, gNewPath);
+			strcat(path, tmp);
 		}
 	}
 }
@@ -211,7 +215,6 @@ static bool parseOut(FILE *file)
 	}
 	if (fscanf(file, OPT_OUT_PATH "=%[^\r^\n]", gOpts.outPath) != 1)
 		return false;
-	fixPath(gOpts.outPath);
 	printf("out:%s\n", gOpts.outPath);
 
 	return true;

commit 45c2a034cd1ef3d6670aa94d37bb0ed75ede2b20
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 11 11:56:22 2019 +0800

    tools: rockchip: boot/trust_merge: fix '--replace" missing append new path
    
    Change-Id: Icddfb2ce9c7ba6f4b4e558eb5833ba79d0e7b976
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/tools/rockchip/boot_merger.c b/tools/rockchip/boot_merger.c
index fd8916e2ba..9a23a7d30f 100644
--- a/tools/rockchip/boot_merger.c
+++ b/tools/rockchip/boot_merger.c
@@ -141,6 +141,7 @@ static inline void fixPath(char *path)
 			strcpy(tmp, end);
 			/* Terminate, so path can be dest for strcat() */
 			*start = '\0';
+			strcat(path, gNewPath);
 			strcat(path, tmp);
 		}
 	}
diff --git a/tools/rockchip/trust_merger.c b/tools/rockchip/trust_merger.c
index b481321973..fa89d3b5db 100644
--- a/tools/rockchip/trust_merger.c
+++ b/tools/rockchip/trust_merger.c
@@ -102,6 +102,7 @@ static inline void fixPath(char *path)
 			strcpy(tmp, end);
 			/* Terminate, so path can be dest for strcat() */
 			*start = '\0';
+			strcat(path, gNewPath);
 			strcat(path, tmp);
 		}
 	}

commit 2bbbd780f81ba50df48c3df0b7dec9e1827adf12
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Apr 10 14:12:04 2019 +0800

    tools: rockchip: loaderimage: print file size with KB
    
     load addr is 0x600000!
    pack input ./u-boot.bin
    pack file size: 484551(473 KB)
    crc = 0xfef42a0e
    uboot version: U-Boot 2017.09-02804-ge3e39ee-dirty (Apr 10 2019 - 14:11:39)
    
    Change-Id: If8fbdd943e328db41523ded47deeedfe8c6bde0e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/tools/rockchip/loaderimage.c b/tools/rockchip/loaderimage.c
index 1a98f72de9..534dd05149 100644
--- a/tools/rockchip/loaderimage.c
+++ b/tools/rockchip/loaderimage.c
@@ -229,7 +229,7 @@ int main(int argc, char *argv[])
 		fseek(fi, 0, SEEK_END);
 		size = ftell(fi);
 		fseek(fi, 0, SEEK_SET);
-		printf("pack file size: %d \n", size);
+		printf("pack file size: %d(%d KB)\n", size, size / 1024);
 		if (size > max_size - sizeof(second_loader_hdr)) {
 			perror(file_out);
 			exit(EXIT_FAILURE);

commit e65f23e90c404d909d0f5d47c829396c247a7986
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Apr 9 16:56:50 2019 +0800

    disk: rkparam: fix get disk part size error
    
    The disk part size is defined as number of blocks in partition rather
    than bytes.So delete "<< 9".
    
    Change-Id: I4428e5965c6456fcc69fb601d18a97fc48210617
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/disk/part_rkparm.c b/disk/part_rkparm.c
index 156608cf8b..6d9221f6b6 100644
--- a/disk/part_rkparm.c
+++ b/disk/part_rkparm.c
@@ -277,7 +277,7 @@ static int part_get_info_rkparm(struct blk_desc *dev_desc, int idx,
 	}
 
 	info->start = p->start;
-	info->size = p->size << 9;
+	info->size = p->size;
 	info->blksz = dev_desc->blksz;
 
 	sprintf((char *)info->name, "%s", p->name);

commit e7c691e7c7f2adc936d0d5670e3b1eb245fd5826
Author: Simon Xue <xxm@rock-chips.com>
Date:   Mon Apr 8 18:28:53 2019 +0800

    watchdog: add support for Rockchip watchdog
    
    Change-Id: I6b50f79df12e86453f6defbbddba5f0cf2078d28
    Signed-off-by: Simon Xue <xxm@rock-chips.com>

diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index fc46b6774d..629b6523a2 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -78,4 +78,10 @@ config WDT_ORION
 	   Select this to enable Orion watchdog timer, which can be found on some
 	   Marvell Armada chips.
 
+config ROCKCHIP_WATCHDOG
+	bool "Rockchip watchdog"
+	depends on WDT && ARCH_ROCKCHIP
+	help
+	  Say Y here to enable Rockchip watchdog driver.
+
 endmenu
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index ab6a6b79e1..8504408958 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -22,3 +22,6 @@ obj-$(CONFIG_WDT_ASPEED) += ast_wdt.o
 obj-$(CONFIG_WDT_BCM6345) += bcm6345_wdt.o
 obj-$(CONFIG_BCM2835_WDT)       += bcm2835_wdt.o
 obj-$(CONFIG_WDT_ORION) += orion_wdt.o
+ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
+obj-$(CONFIG_ROCKCHIP_WATCHDOG) += rockchip_wdt.o
+endif
diff --git a/drivers/watchdog/rockchip_wdt.c b/drivers/watchdog/rockchip_wdt.c
new file mode 100644
index 0000000000..f2962d9d32
--- /dev/null
+++ b/drivers/watchdog/rockchip_wdt.c
@@ -0,0 +1,164 @@
+/*
+ * Copyright (C) 2019 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <asm/io.h>
+#include <asm/utils.h>
+#include <clk.h>
+#include <dm.h>
+#include <reset.h>
+#include <wdt.h>
+
+#define WDT_CR			0x00
+#define WDT_TORR		0x04
+#define WDT_CRR			0x0C
+#define WDT_EN_MASK		0x01
+#define WDT_MODE_MASK		0x02
+#define WDT_CRR_RESTART_VAL	0x76
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct rockchip_wdt_priv {
+	void __iomem *base;
+	struct clk clk;
+	unsigned long rate;
+	struct reset_ctl rst;
+};
+
+/*
+ * Set the watchdog time interval.
+ * Counter is 32 bit.
+ */
+static int rockchip_wdt_settimeout(u64 timeout,
+				   struct rockchip_wdt_priv *priv)
+{
+	signed int i;
+
+	/* calculate the timeout range value */
+	i = log_2_n_round_up(timeout * priv->rate / 1000) - 16;
+	if (i > 15)
+		i = 15;
+	if (i < 0)
+		i = 0;
+
+	writel((i | (i << 4)), priv->base + WDT_TORR);
+
+	return 0;
+}
+
+static void rockchip_wdt_enable(struct rockchip_wdt_priv *priv)
+{
+	u32 val = readl(priv->base + WDT_CR);
+
+	/* Disable interrupt mode; always perform system reset. */
+	val &= ~WDT_MODE_MASK;
+	/* Enable watchdog. */
+	val |= WDT_EN_MASK;
+
+	writel(val, priv->base + WDT_CR);
+}
+
+static unsigned int rockchip_wdt_is_enabled(struct rockchip_wdt_priv *priv)
+{
+	unsigned long val;
+
+	val = readl(priv->base + WDT_CR);
+
+	return val & WDT_EN_MASK;
+}
+
+static int rockchip_wdt_reset(struct udevice *dev)
+{
+	struct rockchip_wdt_priv *priv = dev_get_priv(dev);
+
+	if (rockchip_wdt_is_enabled(priv))
+		/* restart the watchdog counter */
+		writel(WDT_CRR_RESTART_VAL, priv->base + WDT_CRR);
+
+	return 0;
+}
+
+static int rockchip_wdt_start(struct udevice *dev, u64 timeout, ulong flags)
+{
+	struct rockchip_wdt_priv *priv = dev_get_priv(dev);
+
+	printf("Rockchip watchdog timeout: %lld sec\n", timeout / 1000);
+
+	reset_deassert(&priv->rst);
+
+	rockchip_wdt_reset(dev);
+	rockchip_wdt_settimeout(timeout, priv);
+	rockchip_wdt_enable(priv);
+	rockchip_wdt_reset(dev);
+
+	return 0;
+}
+
+static int rockchip_wdt_stop(struct udevice *dev)
+{
+	struct rockchip_wdt_priv *priv = dev_get_priv(dev);
+
+	reset_assert(&priv->rst);
+	reset_deassert(&priv->rst);
+
+	printf("Rockchip watchdog stop\n");
+
+	return 0;
+}
+
+static const struct wdt_ops rockchip_wdt_ops = {
+	.start = rockchip_wdt_start,
+	.reset = rockchip_wdt_reset,
+	.stop = rockchip_wdt_stop,
+};
+
+static int rockchip_wdt_ofdata_to_platdata(struct udevice *dev)
+{
+	struct rockchip_wdt_priv *priv = dev_get_priv(dev);
+
+	priv->base = dev_read_addr_ptr(dev);
+	if (!priv->base)
+		return -ENOENT;
+
+	return 0;
+}
+
+static int rockchip_wdt_probe(struct udevice *dev)
+{
+	struct rockchip_wdt_priv *priv = dev_get_priv(dev);
+	int ret;
+
+	ret = reset_get_by_name(dev, "reset", &priv->rst);
+	if (ret) {
+		pr_err("reset_get_by_name(reset) failed: %d\n", ret);
+		return ret;
+	}
+
+	ret = clk_get_by_index(dev, 0, &priv->clk);
+	if (ret < 0)
+		return ret;
+
+	/* Need clk framework support */
+	priv->rate = clk_get_rate(&priv->clk);
+	if (priv->rate < 0)
+		return -EINVAL;
+
+	return 0;
+}
+
+static const struct udevice_id rockchip_wdt_ids[] = {
+	{ .compatible = "snps,dw-wdt" },
+	{}
+};
+
+U_BOOT_DRIVER(rockchip_wdt) = {
+	.name = "rockchip_wdt",
+	.id = UCLASS_WDT,
+	.of_match = rockchip_wdt_ids,
+	.probe = rockchip_wdt_probe,
+	.priv_auto_alloc_size = sizeof(struct rockchip_wdt_priv),
+	.ofdata_to_platdata = rockchip_wdt_ofdata_to_platdata,
+	.ops = &rockchip_wdt_ops,
+};

commit 860893596c908bffb1957f9c87cb8b7ce8ac090d
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Apr 10 10:01:18 2019 +0800

    ARM: dts: rk1808-evb: Add gmac support at dts level
    
    Note that the gmac status is disabled.
    
    Change-Id: Ifac56c5d5c1cc10d5f2882fbfd1ef02d97299127
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/dts/rk1808-evb.dts b/arch/arm/dts/rk1808-evb.dts
index 728ca1c73b..d857a0b5f2 100644
--- a/arch/arm/dts/rk1808-evb.dts
+++ b/arch/arm/dts/rk1808-evb.dts
@@ -7,6 +7,7 @@
 /dts-v1/;
 #include "rk1808.dtsi"
 #include "rk1808-u-boot.dtsi"
+#include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 #include <linux/media-bus-format.h>
 
@@ -30,6 +31,13 @@
 			press-threshold-microvolt = <10000>;
 		};
 	};
+
+	vcc_phy: vcc-phy-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_phy";
+		regulator-always-on;
+		regulator-boot-on;
+	};
 };
 
 &emmc {
@@ -44,6 +52,21 @@
 	status = "okay";
 };
 
+&gmac {
+	phy-supply = <&vcc_phy>;
+	phy-mode = "rgmii";
+	clock_in_out = "input";
+	snps,reset-gpio = <&gpio0 10 GPIO_ACTIVE_LOW>;
+	snps,reset-active-low;
+	/* Reset time is 20ms, 100ms for rtl8211f */
+	snps,reset-delays-us = <0 20000 100000>;
+	assigned-clocks = <&cru SCLK_GMAC>;
+	assigned-clock-parents = <&gmac_clkin>;
+	tx_delay = <0x50>;
+	rx_delay = <0x3a>;
+	status = "disabled";
+};
+
 &uart2 {
 	clock-frequency = <24000000>;
 	status = "okay";
diff --git a/arch/arm/dts/rk1808.dtsi b/arch/arm/dts/rk1808.dtsi
index 13ff2b5516..47e1975660 100644
--- a/arch/arm/dts/rk1808.dtsi
+++ b/arch/arm/dts/rk1808.dtsi
@@ -1302,11 +1302,11 @@
 			rgmii_pins: rgmii-pins {
 				rockchip,pins =
 					/* rgmii_txen */
-					<2 RK_PA1 2 &pcfg_pull_none_12ma>,
+					<2 RK_PA1 2 &pcfg_pull_none_4ma>,
 					/* rgmii_txd1 */
-					<2 RK_PA2 2 &pcfg_pull_none_12ma>,
+					<2 RK_PA2 2 &pcfg_pull_none_4ma>,
 					/* rgmii_txd0 */
-					<2 RK_PA3 2 &pcfg_pull_none_12ma>,
+					<2 RK_PA3 2 &pcfg_pull_none_4ma>,
 					/* rgmii_rxd0 */
 					<2 RK_PA4 2 &pcfg_pull_none>,
 					/* rgmii_rxd1 */
@@ -1314,13 +1314,13 @@
 					/* rgmii_rxdv */
 					<2 RK_PA7 2 &pcfg_pull_none>,
 					/* rgmii_mdio */
-					<2 RK_PB0 2 &pcfg_pull_none>,
+					<2 RK_PB0 2 &pcfg_pull_none_2ma>,
 					/* rgmii_mdc */
-					<2 RK_PB2 2 &pcfg_pull_none>,
+					<2 RK_PB2 2 &pcfg_pull_none_2ma>,
 					/* rgmii_txd3 */
-					<2 RK_PB3 2 &pcfg_pull_none_12ma>,
+					<2 RK_PB3 2 &pcfg_pull_none_4ma>,
 					/* rgmii_txd2 */
-					<2 RK_PB4 2 &pcfg_pull_none_12ma>,
+					<2 RK_PB4 2 &pcfg_pull_none_4ma>,
 					/* rgmii_rxd2 */
 					<2 RK_PB5 2 &pcfg_pull_none>,
 					/* rgmii_rxd3 */
@@ -1328,7 +1328,7 @@
 					/* rgmii_clk */
 					<2 RK_PB7 2 &pcfg_pull_none>,
 					/* rgmii_txclk */
-					<2 RK_PC1 2 &pcfg_pull_none_12ma>,
+					<2 RK_PC1 2 &pcfg_pull_none_4ma>,
 					/* rgmii_rxclk */
 					<2 RK_PC2 2 &pcfg_pull_none>;
 			};
@@ -1336,11 +1336,11 @@
 			rmii_pins: rmii-pins {
 				rockchip,pins =
 					/* rmii_txen */
-					<2 RK_PA1 2 &pcfg_pull_none_12ma>,
+					<2 RK_PA1 2 &pcfg_pull_none_4ma>,
 					/* rmii_txd1 */
-					<2 RK_PA2 2 &pcfg_pull_none_12ma>,
+					<2 RK_PA2 2 &pcfg_pull_none_4ma>,
 					/* rmii_txd0 */
-					<2 RK_PA3 2 &pcfg_pull_none_12ma>,
+					<2 RK_PA3 2 &pcfg_pull_none_4ma>,
 					/* rmii_rxd0 */
 					<2 RK_PA4 2 &pcfg_pull_none>,
 					/* rmii_rxd1 */
@@ -1350,9 +1350,9 @@
 					/* rmii_rxdv */
 					<2 RK_PA7 2 &pcfg_pull_none>,
 					/* rmii_mdio */
-					<2 RK_PB0 2 &pcfg_pull_none>,
+					<2 RK_PB0 2 &pcfg_pull_none_2ma>,
 					/* rmii_mdc */
-					<2 RK_PB2 2 &pcfg_pull_none>,
+					<2 RK_PB2 2 &pcfg_pull_none_2ma>,
 					/* rmii_clk */
 					<2 RK_PB7 2 &pcfg_pull_none>;
 			};

commit 4dad63273a8aa0989a94715320d2195b47a74d50
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Apr 10 09:32:15 2019 +0800

    config: rk1808: Enable GMAC config
    
    Change-Id: I168a1fd36101ef360461adfe0372d1ad490e41fc
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/configs/rk1808_defconfig b/configs/rk1808_defconfig
index 0f722cb02d..834776a53d 100644
--- a/configs/rk1808_defconfig
+++ b/configs/rk1808_defconfig
@@ -38,14 +38,12 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
 # CONFIG_CMD_MISC is not set
 # CONFIG_DOS_PARTITION is not set
 # CONFIG_ISO_PARTITION is not set
 CONFIG_RKPARM_PARTITION=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
-CONFIG_NET=y
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_CLK=y
@@ -57,6 +55,9 @@ CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
 CONFIG_DM_PMIC=y

commit ff86648dc8c70da71c443c99f66910424831d935
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Apr 10 09:30:55 2019 +0800

    net: Add rk1808 gmac support
    
    Change-Id: Iba89fc63dce6553beb266106f5f6287a2779032f
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/net/gmac_rockchip.c b/drivers/net/gmac_rockchip.c
index 1763089f71..9007e4cdac 100644
--- a/drivers/net/gmac_rockchip.c
+++ b/drivers/net/gmac_rockchip.c
@@ -16,6 +16,7 @@
 #include <asm/arch/clock.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/grf_px30.h>
+#include <asm/arch/grf_rk1808.h>
 #include <asm/arch/grf_rk322x.h>
 #include <asm/arch/grf_rk3288.h>
 #include <asm/arch/grf_rk3308.h>
@@ -124,6 +125,40 @@ static int px30_gmac_fix_mac_speed(struct dw_eth_dev *priv)
 	return 0;
 }
 
+static int rk1808_gmac_fix_mac_speed(struct dw_eth_dev *priv)
+{
+	struct clk clk_speed;
+	int ret;
+
+	ret = clk_get_by_name(priv->phydev->dev, "clk_mac_speed",
+			      &clk_speed);
+	if (ret)
+		return ret;
+
+	switch (priv->phydev->speed) {
+	case 10:
+		ret = clk_set_rate(&clk_speed, 2500000);
+		if (ret)
+			return ret;
+		break;
+	case 100:
+		ret = clk_set_rate(&clk_speed, 25000000);
+		if (ret)
+			return ret;
+		break;
+	case 1000:
+		ret = clk_set_rate(&clk_speed, 125000000);
+		if (ret)
+			return ret;
+		break;
+	default:
+		debug("Unknown phy speed: %d\n", priv->phydev->speed);
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
 static int rk3228_gmac_fix_mac_speed(struct dw_eth_dev *priv)
 {
 	struct rk322x_grf *grf;
@@ -366,6 +401,46 @@ static void px30_gmac_set_to_rmii(struct gmac_rockchip_platdata *pdata)
 		     px30_GMAC_PHY_INTF_SEL_RMII);
 }
 
+static void rk1808_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata)
+{
+	struct rk1808_grf *grf;
+	enum {
+		RK1808_GMAC_PHY_INTF_SEL_SHIFT = 4,
+		RK1808_GMAC_PHY_INTF_SEL_MASK  = GENMASK(6, 4),
+		RK1808_GMAC_PHY_INTF_SEL_RGMII = BIT(4),
+
+		RK1808_RXCLK_DLY_ENA_GMAC_MASK = BIT(1),
+		RK1808_RXCLK_DLY_ENA_GMAC_DISABLE = 0,
+		RK1808_RXCLK_DLY_ENA_GMAC_ENABLE = BIT(1),
+
+		RK1808_TXCLK_DLY_ENA_GMAC_MASK = BIT(0),
+		RK1808_TXCLK_DLY_ENA_GMAC_DISABLE = 0,
+		RK1808_TXCLK_DLY_ENA_GMAC_ENABLE = BIT(0),
+	};
+	enum {
+		RK1808_CLK_RX_DL_CFG_GMAC_SHIFT = 0x8,
+		RK1808_CLK_RX_DL_CFG_GMAC_MASK = GENMASK(15, 7),
+
+		RK1808_CLK_TX_DL_CFG_GMAC_SHIFT = 0x0,
+		RK1808_CLK_TX_DL_CFG_GMAC_MASK = GENMASK(7, 0),
+	};
+
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	rk_clrsetreg(&grf->mac_con1,
+		     RK1808_GMAC_PHY_INTF_SEL_MASK |
+		     RK1808_RXCLK_DLY_ENA_GMAC_MASK |
+		     RK1808_TXCLK_DLY_ENA_GMAC_MASK,
+		     RK1808_GMAC_PHY_INTF_SEL_RGMII |
+		     RK1808_RXCLK_DLY_ENA_GMAC_ENABLE |
+		     RK1808_TXCLK_DLY_ENA_GMAC_ENABLE);
+
+	rk_clrsetreg(&grf->mac_con0,
+		     RK1808_CLK_RX_DL_CFG_GMAC_MASK |
+		     RK1808_CLK_TX_DL_CFG_GMAC_MASK,
+		     pdata->rx_delay << RK1808_CLK_RX_DL_CFG_GMAC_SHIFT |
+		     pdata->tx_delay << RK1808_CLK_TX_DL_CFG_GMAC_SHIFT);
+}
+
 static void rk3228_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata)
 {
 	struct rk322x_grf *grf;
@@ -663,6 +738,11 @@ const struct rk_gmac_ops px30_gmac_ops = {
 	.set_to_rmii = px30_gmac_set_to_rmii,
 };
 
+const struct rk_gmac_ops rk1808_gmac_ops = {
+	.fix_mac_speed = rk1808_gmac_fix_mac_speed,
+	.set_to_rgmii = rk1808_gmac_set_to_rgmii,
+};
+
 const struct rk_gmac_ops rk3228_gmac_ops = {
 	.fix_mac_speed = rk3228_gmac_fix_mac_speed,
 	.set_to_rgmii = rk3228_gmac_set_to_rgmii,
@@ -701,6 +781,8 @@ const struct rk_gmac_ops rv1108_gmac_ops = {
 static const struct udevice_id rockchip_gmac_ids[] = {
 	{ .compatible = "rockchip,px30-gmac",
 	  .data = (ulong)&px30_gmac_ops },
+	{ .compatible = "rockchip,rk1808-gmac",
+	  .data = (ulong)&rk1808_gmac_ops },
 	{ .compatible = "rockchip,rk3228-gmac",
 	  .data = (ulong)&rk3228_gmac_ops },
 	{ .compatible = "rockchip,rk3288-gmac",

commit 5055cc911ca1682100878e673442bc585546c5cf
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 9 21:07:36 2019 +0800

    Makefile: generate u-boot.dtb from dt-spl.dtb when using kernel dtb
    
    u-boot.bin doesn't affect u-boot.bin generation, but without this patch,
    it provides a wrong dtb file for user to debug when using kernel dtb.
    
    'FORCE' is necessary to promise update u-boot.bin in every compilation.
    
    Change-Id: I53e6b73cb2a457bde222f8b9c7844f3877d63cdc
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/Makefile b/Makefile
index dc812e2d97..e121dbd4d9 100644
--- a/Makefile
+++ b/Makefile
@@ -924,7 +924,11 @@ endif
 quiet_cmd_copy = COPY    $@
       cmd_copy = cp $< $@
 
-u-boot.dtb: dts/dt.dtb
+ifeq ($(CONFIG_USING_KERNEL_DTB),y)
+u-boot.dtb: dts/dt-spl.dtb FORCE
+else
+u-boot.dtb: dts/dt.dtb FORCE
+endif
 	$(call cmd,copy)
 
 OBJCOPYFLAGS_u-boot.hex := -O ihex

commit 6b5ade5a57c8b15b0cd4d0eca60640de0785fae5
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Wed Apr 10 10:16:07 2019 +0800

    clk: rockchip: rk1808: fix up the clk_set_default failed
    
    Change-Id: If49d6def0e16b93238311885217f30a4b7a2e7c3
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk1808.c b/drivers/clk/rockchip/clk_rk1808.c
index 9a8b8afe5f..10ff010438 100644
--- a/drivers/clk/rockchip/clk_rk1808.c
+++ b/drivers/clk/rockchip/clk_rk1808.c
@@ -995,6 +995,8 @@ static ulong rk1808_clk_set_rate(struct clk *clk, ulong rate)
 	case LSCLK_PERI:
 		ret = rk1808_peri_set_clk(priv, clk->id, rate);
 		break;
+	case SCLK_32K_IOE:
+		return 0;
 	default:
 		return -ENOENT;
 	}
@@ -1154,6 +1156,8 @@ static int rk1808_clk_set_parent(struct clk *clk, struct clk *parent)
 	switch (clk->id) {
 	case SCLK_GMAC:
 		return rk1808_gmac_set_parent(clk, parent);
+	case SCLK_32K_IOE:
+		return 0;
 	default:
 		return -ENOENT;
 	}
diff --git a/include/dt-bindings/clock/rk1808-cru.h b/include/dt-bindings/clock/rk1808-cru.h
index 3dd5c76d52..994896d111 100644
--- a/include/dt-bindings/clock/rk1808-cru.h
+++ b/include/dt-bindings/clock/rk1808-cru.h
@@ -111,6 +111,7 @@
 #define SCLK_MIPIDSIPHY_REF	110
 #define SCLK_PCIEPHY_REF	111
 #define SCLK_RTC32K_FRAC	112
+#define SCLK_32K_IOE		113
 
 /* aclk gates */
 #define ACLK_GIC_PRE		145

commit b9f5972251bce5af4c86c8a36c3a970b1174dbd3
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Mar 14 09:37:37 2019 +0800

    clk: rockchip: rk1808: add mac clk interface
    
    support mac clk set rate and set parent.
    
    Change-Id: I3b4626fd3fcc5ffdf3c58add9c1bc002bb56429a
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk1808.h b/arch/arm/include/asm/arch-rockchip/cru_rk1808.h
index ad97d41332..c6515a391c 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk1808.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk1808.h
@@ -181,6 +181,19 @@ enum {
 	EMMC_DIV50_SHIFT		= 0,
 	EMMC_DIV50_MASK			= 0xff << EMMC_DIV_SHIFT,
 
+	/* CRU_CLKSEL26_CON */
+	GMAC_PLL_SEL_SHIFT		= 14,
+	GMAC_PLL_SEL_MASK		= 3 << GMAC_PLL_SEL_SHIFT,
+	GMAC_PLL_SEL_CPLL		= 0,
+	GMAC_PLL_SEL_NPLL,
+	GMAC_PLL_SEL_PPLL,
+	CLK_GMAC_DIV_SHIFT		= 8,
+	CLK_GMAC_DIV_MASK		= 0x1f << CLK_GMAC_DIV_SHIFT,
+	SFC_PLL_SEL_SHIFT		= 7,
+	SFC_PLL_SEL_MASK		= 1 << SFC_PLL_SEL_SHIFT,
+	SFC_DIV_CON_SHIFT		= 0,
+	SFC_DIV_CON_MASK		= 0x7f,
+
 	/* CRU_CLK_SEL27_CON */
 	CLK_BUS_PLL_SEL_GPLL		= 0,
 	CLK_BUS_PLL_SEL_CPLL		= 1,
@@ -188,6 +201,17 @@ enum {
 	CLK_BUS_PLL_SEL_MASK		= 1 << CLK_BUS_PLL_SEL_SHIFT,
 	HSCLK_BUS_DIV_CON_SHIFT		= 8,
 	HSCLK_BUS_DIV_CON_MASK		= 0x1f << HSCLK_BUS_DIV_CON_SHIFT,
+	RGMII_CLK_SEL_SHIFT		= 2,
+	RGMII_CLK_SEL_MASK		= 3 << RGMII_CLK_SEL_SHIFT,
+	RGMII_CLK_SEL_125M		= 0,
+	RGMII_CLK_SEL_2M		= 2,
+	RGMIIC_CLK_SEL_25M		= 3,
+	RMII_CLK_SEL_SHIFT		= 1,
+	RMII_CLK_SEL_MASK		= 1 << RMII_CLK_SEL_SHIFT,
+	RMII_EXTCLK_SEL_SHIFT		= 0,
+	RMII_EXTCLK_SEL_MASK		= 1 << RMII_EXTCLK_SEL_SHIFT,
+	RMII_EXTCLK_SEL_INT		= 0,
+	RMII_EXTCLK_SEL_EXT,
 
 	/* CRU_CLK_SEL28_CON */
 	MSCLK_BUS_DIV_CON_SHIFT		= 8,
diff --git a/drivers/clk/rockchip/clk_rk1808.c b/drivers/clk/rockchip/clk_rk1808.c
index f9e51d0e04..9a8b8afe5f 100644
--- a/drivers/clk/rockchip/clk_rk1808.c
+++ b/drivers/clk/rockchip/clk_rk1808.c
@@ -564,6 +564,67 @@ static ulong rk1808_vop_set_clk(struct rk1808_clk_priv *priv,
 
 	return rk1808_vop_get_clk(priv, clk_id);
 }
+
+static ulong rk1808_mac_set_clk(struct clk *clk, uint hz)
+{
+	struct rk1808_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk1808_cru *cru = priv->cru;
+	u32 con = readl(&cru->clksel_con[26]);
+	ulong pll_rate;
+	u8 div;
+
+	if ((con >> GMAC_PLL_SEL_SHIFT) & GMAC_PLL_SEL_NPLL)
+		pll_rate = rockchip_pll_get_rate(&rk1808_pll_clks[NPLL],
+						 priv->cru, NPLL);
+	else if ((con >> GMAC_PLL_SEL_SHIFT) & GMAC_PLL_SEL_PPLL)
+		pll_rate = rockchip_pll_get_rate(&rk1808_pll_clks[PPLL],
+						 priv->cru, PPLL);
+	else
+		pll_rate = rockchip_pll_get_rate(&rk1808_pll_clks[CPLL],
+						 priv->cru, CPLL);
+
+	/*default set 50MHZ for gmac*/
+	if (!hz)
+		hz = 50000000;
+
+	div = DIV_ROUND_UP(pll_rate, hz) - 1;
+	assert(div < 32);
+	rk_clrsetreg(&cru->clksel_con[26], CLK_GMAC_DIV_MASK,
+		     div << CLK_GMAC_DIV_SHIFT);
+
+	return DIV_TO_RATE(pll_rate, div);
+}
+
+static int rk1808_mac_set_speed_clk(struct clk *clk, ulong clk_id, uint hz)
+{
+	struct rk1808_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk1808_cru *cru = priv->cru;
+	u32 sel;
+
+	switch (clk_id) {
+	case SCLK_GMAC_RGMII_SPEED:
+		if (hz == 125000000)
+			sel = 0;
+		else if (hz == 2500000)
+			sel = 2;
+		else
+			sel = 3;
+		rk_clrsetreg(&cru->clksel_con[27], RGMII_CLK_SEL_MASK,
+			     sel << RGMII_CLK_SEL_SHIFT);
+		break;
+	case SCLK_GMAC_RMII_SPEED:
+		if (hz == 2500000)
+			sel = 0;
+		else
+			sel = 1;
+		rk_clrsetreg(&cru->clksel_con[27], RMII_CLK_SEL_MASK,
+			     sel << RMII_CLK_SEL_SHIFT);
+		break;
+	default:
+		return -ENOENT;
+	}
+	return 0;
+}
 #endif
 
 static ulong rk1808_bus_get_clk(struct rk1808_clk_priv *priv, ulong clk_id)
@@ -916,6 +977,14 @@ static ulong rk1808_clk_set_rate(struct clk *clk, ulong rate)
 	case DCLK_VOPLITE:
 		ret = rk1808_vop_set_clk(priv, clk->id, rate);
 		break;
+	case SCLK_GMAC:
+	case SCLK_GMAC_SRC:
+		ret = rk1808_mac_set_clk(clk, rate);
+		break;
+	case SCLK_GMAC_RMII_SPEED:
+	case SCLK_GMAC_RGMII_SPEED:
+		ret = rk1808_mac_set_speed_clk(clk, clk->id, rate);
+		break;
 #endif
 	case HSCLK_BUS_PRE:
 	case MSCLK_BUS_PRE:
@@ -1062,11 +1131,43 @@ static int rk1808_clk_set_phase(struct clk *clk, int degrees)
 	return ret;
 }
 
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+static int rk1808_gmac_set_parent(struct clk *clk, struct clk *parent)
+{
+	struct rk1808_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk1808_cru *cru = priv->cru;
+
+	if (parent->id == SCLK_GMAC_SRC) {
+		debug("%s: switching GAMC to SCLK_GMAC_SRC\n", __func__);
+		rk_clrsetreg(&cru->clksel_con[27], RMII_EXTCLK_SEL_MASK,
+			     RMII_EXTCLK_SEL_INT << RMII_EXTCLK_SEL_SHIFT);
+	} else {
+		debug("%s: switching GMAC to external clock\n", __func__);
+		rk_clrsetreg(&cru->clksel_con[27], RMII_EXTCLK_SEL_MASK,
+			     RMII_EXTCLK_SEL_EXT << RMII_EXTCLK_SEL_SHIFT);
+	}
+	return 0;
+}
+
+static int rk1808_clk_set_parent(struct clk *clk, struct clk *parent)
+{
+	switch (clk->id) {
+	case SCLK_GMAC:
+		return rk1808_gmac_set_parent(clk, parent);
+	default:
+		return -ENOENT;
+	}
+}
+#endif
+
 static struct clk_ops rk1808_clk_ops = {
 	.get_rate = rk1808_clk_get_rate,
 	.set_rate = rk1808_clk_set_rate,
 	.get_phase	= rk1808_clk_get_phase,
 	.set_phase	= rk1808_clk_set_phase,
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+	.set_parent	= rk1808_clk_set_parent,
+#endif
 };
 
 static int rk1808_clk_probe(struct udevice *dev)

commit 6078abbb1fd92695252d0047cd6cd71ca5afd227
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Apr 9 18:49:06 2019 +0800

    ARM: dts: px30-evb: Add gmac support at dts level for px30
    
    Change-Id: I21d3b41b488297cb5374f74a1e28ba17f2c441f8
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/dts/px30-evb.dts b/arch/arm/dts/px30-evb.dts
index 43ef6ee50e..906c1f1f72 100644
--- a/arch/arm/dts/px30-evb.dts
+++ b/arch/arm/dts/px30-evb.dts
@@ -90,8 +90,23 @@
 			248 249 250 251 252 253 254 255>;
 		default-brightness-level = <200>;
 	};
+
+	vcc_phy: vcc-phy-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_phy";
+		regulator-always-on;
+		regulator-boot-on;
+	};
 };
 
+&gmac {
+	phy-supply = <&vcc_phy>;
+	clock_in_out = "output";
+	snps,reset-gpio = <&gpio2 13 GPIO_ACTIVE_LOW>;
+	snps,reset-active-low;
+	snps,reset-delays-us = <0 50000 50000>;
+	status = "okay";
+};
 
 &i2c0 {
 	status = "okay";
diff --git a/arch/arm/dts/px30.dtsi b/arch/arm/dts/px30.dtsi
index a62bc03a1d..55cd85cc80 100644
--- a/arch/arm/dts/px30.dtsi
+++ b/arch/arm/dts/px30.dtsi
@@ -87,6 +87,13 @@
 		};
 	};
 
+	gmac_clkin: external-gmac-clock {
+		compatible = "fixed-clock";
+		clock-frequency = <50000000>;
+		clock-output-names = "gmac_clkin";
+		#clock-cells = <0>;
+	};
+
 	psci {
 		compatible = "arm,psci-1.0";
 		method = "smc";
@@ -792,7 +799,7 @@
 			      "pclk_mac", "clk_mac_speed";
 		phy-mode = "rmii";
 		pinctrl-names = "default";
-		pinctrl-0 = <&rmii_pins>;
+		pinctrl-0 = <&rmii_pins &mac_refclk_12ma>;
 		resets = <&cru SRST_GMAC_A>;
 		reset-names = "stmmaceth";
 		power-domains = <&power PX30_PD_GMAC>;
@@ -2177,8 +2184,16 @@
 					/* mac_mdio */
 					<2 RK_PA7 RK_FUNC_2 &pcfg_pull_none>,
 					/* mac_mdc */
-					<2 RK_PB1 RK_FUNC_2 &pcfg_pull_none>,
-					/* mac_clk */
+					<2 RK_PB1 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			mac_refclk_12ma: mac-refclk-12ma {
+				rockchip,pins =
+					<2 RK_PB2 RK_FUNC_2 &pcfg_pull_none_12ma>;
+			};
+
+			mac_refclk: mac-refclk {
+				rockchip,pins =
 					<2 RK_PB2 RK_FUNC_2 &pcfg_pull_none>;
 			};
 		};

commit 9155f29fd7e004bc1b4313c45e0683f54855d7cf
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Apr 9 18:48:14 2019 +0800

    config: px30: Enable GMAC config
    
    Change-Id: I89e6b2876c6f3269cff626411a38482661f59598
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 98260f19b0..f69bf0d290 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -47,7 +47,6 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
 # CONFIG_CMD_MISC is not set
 # CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_ISO_PARTITION is not set
@@ -70,6 +69,9 @@ CONFIG_ADC_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
 CONFIG_DM_PMIC=y
diff --git a/configs/px30_defconfig b/configs/px30_defconfig
index d28f6778ae..43449a49b3 100644
--- a/configs/px30_defconfig
+++ b/configs/px30_defconfig
@@ -49,7 +49,6 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
 # CONFIG_CMD_MISC is not set
 # CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_ISO_PARTITION is not set
@@ -71,6 +70,9 @@ CONFIG_RK8XX_PWRKEY=y
 CONFIG_ADC_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y

commit 18ae91c869a8eb55d8680e8180752b551ebe01ab
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Apr 9 18:45:23 2019 +0800

    net: Add px30 gmac support
    
    Change-Id: I2c5618e74ef3e710a498795e31c6fe9e3f8d8e89
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/net/gmac_rockchip.c b/drivers/net/gmac_rockchip.c
index 47605b1b19..1763089f71 100644
--- a/drivers/net/gmac_rockchip.c
+++ b/drivers/net/gmac_rockchip.c
@@ -15,6 +15,7 @@
 #include <asm/arch/periph.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/hardware.h>
+#include <asm/arch/grf_px30.h>
 #include <asm/arch/grf_rk322x.h>
 #include <asm/arch/grf_rk3288.h>
 #include <asm/arch/grf_rk3308.h>
@@ -82,6 +83,47 @@ static int gmac_rockchip_ofdata_to_platdata(struct udevice *dev)
 	return designware_eth_ofdata_to_platdata(dev);
 }
 
+static int px30_gmac_fix_mac_speed(struct dw_eth_dev *priv)
+{
+	struct px30_grf *grf;
+	struct clk clk_speed;
+	int speed, ret;
+	enum {
+		PX30_GMAC_SPEED_SHIFT = 0x2,
+		PX30_GMAC_SPEED_MASK  = BIT(2),
+		PX30_GMAC_SPEED_10M   = 0,
+		PX30_GMAC_SPEED_100M  = BIT(2),
+	};
+
+	ret = clk_get_by_name(priv->phydev->dev, "clk_mac_speed",
+			      &clk_speed);
+	if (ret)
+		return ret;
+
+	switch (priv->phydev->speed) {
+	case 10:
+		speed = PX30_GMAC_SPEED_10M;
+		ret = clk_set_rate(&clk_speed, 2500000);
+		if (ret)
+			return ret;
+		break;
+	case 100:
+		speed = PX30_GMAC_SPEED_100M;
+		ret = clk_set_rate(&clk_speed, 25000000);
+		if (ret)
+			return ret;
+		break;
+	default:
+		debug("Unknown phy speed: %d\n", priv->phydev->speed);
+		return -EINVAL;
+	}
+
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	rk_clrsetreg(&grf->mac_con1, PX30_GMAC_SPEED_MASK, speed);
+
+	return 0;
+}
+
 static int rk3228_gmac_fix_mac_speed(struct dw_eth_dev *priv)
 {
 	struct rk322x_grf *grf;
@@ -308,6 +350,22 @@ static int rv1108_set_rmii_speed(struct dw_eth_dev *priv)
 	return 0;
 }
 
+static void px30_gmac_set_to_rmii(struct gmac_rockchip_platdata *pdata)
+{
+	struct px30_grf *grf;
+	enum {
+		px30_GMAC_PHY_INTF_SEL_SHIFT = 4,
+		px30_GMAC_PHY_INTF_SEL_MASK  = GENMASK(4, 6),
+		px30_GMAC_PHY_INTF_SEL_RMII  = BIT(6),
+	};
+
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
+	rk_clrsetreg(&grf->mac_con1,
+		     px30_GMAC_PHY_INTF_SEL_MASK,
+		     px30_GMAC_PHY_INTF_SEL_RMII);
+}
+
 static void rk3228_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata)
 {
 	struct rk322x_grf *grf;
@@ -600,6 +658,11 @@ const struct eth_ops gmac_rockchip_eth_ops = {
 	.write_hwaddr		= designware_eth_write_hwaddr,
 };
 
+const struct rk_gmac_ops px30_gmac_ops = {
+	.fix_mac_speed = px30_gmac_fix_mac_speed,
+	.set_to_rmii = px30_gmac_set_to_rmii,
+};
+
 const struct rk_gmac_ops rk3228_gmac_ops = {
 	.fix_mac_speed = rk3228_gmac_fix_mac_speed,
 	.set_to_rgmii = rk3228_gmac_set_to_rgmii,
@@ -636,6 +699,8 @@ const struct rk_gmac_ops rv1108_gmac_ops = {
 };
 
 static const struct udevice_id rockchip_gmac_ids[] = {
+	{ .compatible = "rockchip,px30-gmac",
+	  .data = (ulong)&px30_gmac_ops },
 	{ .compatible = "rockchip,rk3228-gmac",
 	  .data = (ulong)&rk3228_gmac_ops },
 	{ .compatible = "rockchip,rk3288-gmac",

commit 22d359b877b355666406898e61c67635748721a9
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Mar 14 09:35:13 2019 +0800

    clk: rockchip: px30: add mac clk interface
    
    support mac clk set rate and set parent.
    
    Change-Id: Iaadcb701cf37083d90a37b24f4ffba3bef9c88cd
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index ed1253ab24..e3c73932f5 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -1055,6 +1055,50 @@ static ulong px30_i2s1_mclk_set_clk(struct px30_clk_priv *priv, ulong clk_id,
 
 	return px30_i2s1_mclk_get_clk(priv, clk_id);
 }
+
+static ulong px30_mac_set_clk(struct clk *clk, uint hz)
+{
+	struct px30_clk_priv *priv = dev_get_priv(clk->dev);
+	struct px30_cru *cru = priv->cru;
+	u32 con = readl(&cru->clksel_con[22]);
+	ulong pll_rate;
+	u8 div;
+
+	if ((con >> GMAC_PLL_SEL_SHIFT) & GMAC_PLL_SEL_CPLL)
+		pll_rate = px30_clk_get_pll_rate(priv, CPLL);
+	else if ((con >> GMAC_PLL_SEL_SHIFT) & GMAC_PLL_SEL_NPLL)
+		pll_rate = px30_clk_get_pll_rate(priv, NPLL);
+	else
+		pll_rate = priv->gpll_hz;
+
+	/*default set 50MHZ for gmac*/
+	if (!hz)
+		hz = 50000000;
+
+	div = DIV_ROUND_UP(pll_rate, hz) - 1;
+	assert(div < 32);
+	rk_clrsetreg(&cru->clksel_con[22], CLK_GMAC_DIV_MASK,
+		     div << CLK_GMAC_DIV_SHIFT);
+
+	return DIV_TO_RATE(pll_rate, div);
+}
+
+static int px30_mac_set_speed_clk(struct clk *clk, uint hz)
+{
+	struct px30_clk_priv *priv = dev_get_priv(clk->dev);
+	struct px30_cru *cru = priv->cru;
+
+	if (hz != 2500000 && hz != 25000000) {
+		debug("Unsupported mac speed:%d\n", hz);
+		return -EINVAL;
+	}
+
+	rk_clrsetreg(&cru->clksel_con[23], RMII_CLK_SEL_MASK,
+		     ((hz == 2500000) ? 0 : 1) << RMII_CLK_SEL_SHIFT);
+
+	return 0;
+}
+
 #endif
 
 static int px30_clk_get_gpll_rate(ulong *rate)
@@ -1295,6 +1339,13 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_I2S1_OUT:
 		ret = px30_i2s1_mclk_set_clk(priv, clk->id, rate);
 		break;
+	case SCLK_GMAC:
+	case SCLK_GMAC_SRC:
+		ret = px30_mac_set_clk(clk, rate);
+		break;
+	case SCLK_GMAC_RMII:
+		ret = px30_mac_set_speed_clk(clk, rate);
+		break;
 #endif
 	default:
 		return -ENOENT;
@@ -1426,11 +1477,43 @@ static int px30_clk_set_phase(struct clk *clk, int degrees)
 	return ret;
 }
 
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+static int px30_gmac_set_parent(struct clk *clk, struct clk *parent)
+{
+	struct px30_clk_priv *priv = dev_get_priv(clk->dev);
+	struct px30_cru *cru = priv->cru;
+
+	if (parent->id == SCLK_GMAC_SRC) {
+		debug("%s: switching GAMC to SCLK_GMAC_SRC\n", __func__);
+		rk_clrsetreg(&cru->clksel_con[23], RMII_EXTCLK_SEL_MASK,
+			     RMII_EXTCLK_SEL_INT << RMII_EXTCLK_SEL_SHIFT);
+	} else {
+		debug("%s: switching GMAC to external clock\n", __func__);
+		rk_clrsetreg(&cru->clksel_con[23], RMII_EXTCLK_SEL_MASK,
+			     RMII_EXTCLK_SEL_EXT << RMII_EXTCLK_SEL_SHIFT);
+	}
+	return 0;
+}
+
+static int px30_clk_set_parent(struct clk *clk, struct clk *parent)
+{
+	switch (clk->id) {
+	case SCLK_GMAC:
+		return px30_gmac_set_parent(clk, parent);
+	default:
+		return -ENOENT;
+	}
+}
+#endif
+
 static struct clk_ops px30_clk_ops = {
 	.get_rate = px30_clk_get_rate,
 	.set_rate = px30_clk_set_rate,
 	.get_phase	= px30_clk_get_phase,
 	.set_phase	= px30_clk_set_phase,
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+	.set_parent	= px30_clk_set_parent,
+#endif
 };
 
 static int px30_clk_probe(struct udevice *dev)

commit 221585fb35bf07a793d0a3471cfe7eacf10bf6be
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Apr 9 17:37:45 2019 +0800

    clk: rockchip: rk3308: support pclk_wdt get rate
    
    Change-Id: I001cfef774c9657b6286467dc4ef841771841895
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index e36d64670e..75c78eaa8a 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -576,6 +576,7 @@ static ulong rk3308_bus_get_clk(struct rk3308_clk_priv *priv, ulong clk_id)
 		div = (con & BUS_HCLK_DIV_MASK) >> BUS_HCLK_DIV_SHIFT;
 		break;
 	case PCLK_BUS:
+	case PCLK_WDT:
 		con = readl(&cru->clksel_con[6]);
 		div = (con & BUS_PCLK_DIV_MASK) >> BUS_PCLK_DIV_SHIFT;
 		break;
@@ -858,6 +859,7 @@ static ulong rk3308_clk_get_rate(struct clk *clk)
 	case ACLK_BUS:
 	case HCLK_BUS:
 	case PCLK_BUS:
+	case PCLK_WDT:
 		rate = rk3308_bus_get_clk(priv, clk->id);
 		break;
 	case ACLK_PERI:

commit ced960d2b677c2376a5873ae6106eb8db847426c
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Apr 9 17:37:06 2019 +0800

    clk: rockchip: rk3288: support pclk_wdt get rate
    
    Change-Id: I99f384344feb68ae5b91ade901df4019790ef8db
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index f7536bac18..b42d36cbd0 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -148,6 +148,10 @@ enum {
 	CLK_CRYPTO_DIV_CON_SHIFT	= 6,
 	CLK_CRYPTO_DIV_CON_MASK		= GENMASK(7, 6),
 
+	/* CLKSEL33 */
+	PCLK_ALIVE_DIV_CON_SHIFT	= 8,
+	PCLK_ALIVE_DIV_CON_MASK		= 0x1f << PCLK_ALIVE_DIV_CON_SHIFT,
+
 	SOCSTS_DPLL_LOCK	= 1 << 5,
 	SOCSTS_APLL_LOCK	= 1 << 6,
 	SOCSTS_CPLL_LOCK	= 1 << 7,
@@ -865,6 +869,17 @@ static ulong rockchip_crypto_set_clk(struct rk3288_cru *cru,
 
 	return rockchip_crypto_get_clk(cru, gclk_rate);
 }
+
+static ulong rk3288_alive_get_clk(struct rk3288_cru *cru, uint gclk_rate)
+{
+	u32 div, con, parent;
+
+	con = readl(&cru->cru_clksel_con[33]);
+	div = (con & PCLK_ALIVE_DIV_CON_MASK) >>
+	      PCLK_ALIVE_DIV_CON_SHIFT;
+	parent = gclk_rate;
+	return DIV_TO_RATE(parent, div);
+}
 #endif
 
 static ulong rk3288_clk_get_rate(struct clk *clk)
@@ -914,6 +929,9 @@ static ulong rk3288_clk_get_rate(struct clk *clk)
 	case SCLK_CRYPTO:
 		new_rate = rockchip_crypto_get_clk(priv->cru, gclk_rate);
 		break;
+	case PCLK_WDT:
+		new_rate = rk3288_alive_get_clk(priv->cru, gclk_rate);
+		break;
 #endif
 	default:
 		return -ENOENT;

commit 33a03efd7a8193e51a2e10c88cd026a204b25050
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Apr 9 17:36:21 2019 +0800

    clk: rockchip: rk3128: support pclk_wdt get rate
    
    Change-Id: Ie5dbfe5bd3fdd7868a5db64b96471a5524bde462
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c
index 493a0a01c7..edfdcef1c4 100644
--- a/drivers/clk/rockchip/clk_rk3128.c
+++ b/drivers/clk/rockchip/clk_rk3128.c
@@ -237,6 +237,7 @@ static ulong rk3128_peri_get_clk(struct rk3128_clk_priv *priv, ulong clk_id)
 	case PCLK_I2C2:
 	case PCLK_I2C3:
 	case PCLK_PWM:
+	case PCLK_WDT:
 		con = readl(&cru->cru_clksel_con[10]);
 		div = (con & PCLK_PERI_DIV_MASK) >> PCLK_PERI_DIV_SHIFT;
 		parent = rk3128_peri_get_clk(priv, ACLK_PERI);
@@ -503,6 +504,7 @@ static ulong rk3128_clk_get_rate(struct clk *clk)
 	case PCLK_I2C2:
 	case PCLK_I2C3:
 	case PCLK_PWM:
+	case PCLK_WDT:
 		rate = rk3128_peri_get_clk(priv, clk->id);
 		break;
 	case ACLK_CPU:

commit 68d8964cb4ed53067599ec6739e8bfa5743e43c2
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Apr 9 17:35:43 2019 +0800

    clk: rockchip: rk1808: support pclk_wdt get rate
    
    Change-Id: Ib204b4c014c3b4cbd35d1f335378b0b399689303
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk1808.c b/drivers/clk/rockchip/clk_rk1808.c
index 9639065fc4..f9e51d0e04 100644
--- a/drivers/clk/rockchip/clk_rk1808.c
+++ b/drivers/clk/rockchip/clk_rk1808.c
@@ -583,6 +583,7 @@ static ulong rk1808_bus_get_clk(struct rk1808_clk_priv *priv, ulong clk_id)
 		parent = priv->gpll_hz;
 		break;
 	case LSCLK_BUS_PRE:
+	case PCLK_WDT:
 		con = readl(&cru->clksel_con[28]);
 		div = (con & LSCLK_BUS_DIV_CON_MASK) >> LSCLK_BUS_DIV_CON_SHIFT;
 		parent = priv->gpll_hz;
@@ -822,6 +823,7 @@ static ulong rk1808_clk_get_rate(struct clk *clk)
 	case HSCLK_BUS_PRE:
 	case MSCLK_BUS_PRE:
 	case LSCLK_BUS_PRE:
+	case PCLK_WDT:
 		rate = rk1808_bus_get_clk(priv, clk->id);
 		break;
 	case MSCLK_PERI:

commit 8afd7ff1e3da102bf2b387ae89a8c702129a85e2
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Apr 9 17:34:58 2019 +0800

    clk: rockchip: px30: support pclk_wdt get rate
    
    Change-Id: I1d58d032c6f3843df3fdee65b1ee9cd3614435b1
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index b36f16bc3e..ed1253ab24 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -855,6 +855,7 @@ static ulong px30_bus_get_clk(struct px30_clk_priv *priv, ulong clk_id)
 		parent = priv->gpll_hz;
 		break;
 	case PCLK_BUS_PRE:
+	case PCLK_WDT_NS:
 		parent = px30_bus_get_clk(priv, ACLK_BUS_PRE);
 		con = readl(&cru->clksel_con[24]);
 		div = (con & BUS_PCLK_DIV_MASK) >> BUS_PCLK_DIV_SHIFT;
@@ -1202,6 +1203,7 @@ static ulong px30_clk_get_rate(struct clk *clk)
 	case ACLK_BUS_PRE:
 	case HCLK_BUS_PRE:
 	case PCLK_BUS_PRE:
+	case PCLK_WDT_NS:
 		rate = px30_bus_get_clk(priv, clk->id);
 		break;
 	case ACLK_PERI_PRE:

commit a4e491228b935c87d7ee42ccc2c5991f7c2a5b09
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Apr 9 17:34:11 2019 +0800

    clk: rockchip: rk3368: support pclk_wdt get rate
    
    Change-Id: I8253532cfa6a1d492d68b0e778f625621cad5dab
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3368.h b/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
index a965129703..db2d777bde 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
@@ -130,6 +130,10 @@ enum {
 	ACLK_PERI_DIV_CON_SHIFT		= 0,
 	ACLK_PERI_DIV_CON_MASK		= 0x1f,
 
+	/* CLKSEL10CON */
+	PCLK_ALIVE_DIV_CON_SHIFT	= 8,
+	PCLK_ALIVE_DIV_CON_MASK		= 0x1f << PCLK_ALIVE_DIV_CON_SHIFT,
+
 	/* CLKSEL12_CON */
 	MCU_STCLK_DIV_SHIFT		= 8,
 	MCU_STCLK_DIV_MASK		= GENMASK(10, 8),
diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c
index a3419b7945..1ed2bea3f4 100644
--- a/drivers/clk/rockchip/clk_rk3368.c
+++ b/drivers/clk/rockchip/clk_rk3368.c
@@ -774,6 +774,18 @@ static ulong rk3368_vop_set_clk(struct rk3368_cru *cru, int clk_id, uint hz)
 
 	return 0;
 }
+
+static ulong rk3368_alive_get_clk(struct rk3368_clk_priv *priv)
+{
+	struct rk3368_cru *cru = priv->cru;
+	u32 div, con, parent;
+
+	con = readl(&cru->clksel_con[10]);
+	div = (con & PCLK_ALIVE_DIV_CON_MASK) >>
+	      PCLK_ALIVE_DIV_CON_SHIFT;
+	parent = GPLL_HZ;
+	return DIV_TO_RATE(parent, div);
+}
 #endif
 
 static ulong rk3368_armclk_set_clk(struct rk3368_clk_priv *priv,
@@ -893,6 +905,9 @@ static ulong rk3368_clk_get_rate(struct clk *clk)
 	case DCLK_VOP:
 		rate =  rk3368_vop_get_clk(priv->cru, clk->id);
 		break;
+	case PCLK_WDT:
+		rate = rk3368_alive_get_clk(priv);
+		break;
 #endif
 	default:
 		return -ENOENT;

commit 981ee0bd7d280a85d8bab4760b3dfc430b0125c9
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Apr 9 17:32:46 2019 +0800

    clk: rockchip: rk3399: support pclk_wdt get rate
    
    Change-Id: I8634beb815d5129534c36861c2f02e62669889e9
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 814f43772e..f11fe3926b 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -252,6 +252,10 @@ enum {
 	DCLK_VOP_DIV_CON_MASK           = 0xff,
 	DCLK_VOP_DIV_CON_SHIFT          = 0,
 
+	/* CLKSEL_CON57 */
+	PCLK_ALIVE_DIV_CON_SHIFT	= 0,
+	PCLK_ALIVE_DIV_CON_MASK		= 0x1f << PCLK_ALIVE_DIV_CON_SHIFT,
+
 	/* CLKSEL_CON58 */
 	CLK_SPI_PLL_SEL_WIDTH = 1,
 	CLK_SPI_PLL_SEL_MASK = ((1 < CLK_SPI_PLL_SEL_WIDTH) - 1),
@@ -1117,6 +1121,17 @@ static ulong rk3399_peri_get_clk(struct rk3399_clk_priv *priv, ulong clk_id)
 	return DIV_TO_RATE(parent, div);
 }
 
+static ulong rk3399_alive_get_clk(struct rk3399_clk_priv *priv)
+{
+	struct rk3399_cru *cru = priv->cru;
+	u32 div, con, parent;
+
+	con = readl(&cru->clksel_con[57]);
+	div = (con & PCLK_ALIVE_DIV_CON_MASK) >>
+	      PCLK_ALIVE_DIV_CON_SHIFT;
+	parent = GPLL_HZ;
+	return DIV_TO_RATE(parent, div);
+}
 #endif
 
 static ulong rk3399_clk_get_rate(struct clk *clk)
@@ -1184,6 +1199,10 @@ static ulong rk3399_clk_get_rate(struct clk *clk)
 	case PCLK_PERILP1:
 		rate = rk3399_peri_get_clk(priv, clk->id);
 		break;
+	case PCLK_ALIVE:
+	case PCLK_WDT:
+		rate = rk3399_alive_get_clk(priv);
+		break;
 #endif
 	default:
 		return -ENOENT;
@@ -1620,6 +1639,7 @@ static ulong rk3399_pmuclk_get_rate(struct clk *clk)
 
 	switch (clk->id) {
 	case PCLK_RKPWM_PMU:
+	case PCLK_WDT_M0_PMU:
 		rate = rk3399_pwm_get_clk(priv->pmucru);
 		break;
 	case SCLK_I2C0_PMU:

commit 03a691401ba2ee9f6a21c794803ea3fe90df63da
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Apr 3 17:15:53 2019 +0800

    rockchip: rk3328: update defconfig for spl support
    
    1. rk3328_defconfig output for tpl is too big, remove TPL_MISC
    2. we need to reserve IRAM for ATF binary loading.
    
    Change-Id: Ie3286405d44386e309760b59d502224fb76ce24d
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index 2f2698ee51..77d757afae 100644
--- a/configs/evb-rk3328_defconfig
+++ b/configs/evb-rk3328_defconfig
@@ -3,8 +3,9 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_RK3328=y
-CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x40000
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
@@ -16,7 +17,6 @@ CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_TPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_STACK_R=y
@@ -40,8 +40,8 @@ CONFIG_TPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_TPL_OF_PLATDATA=y
 CONFIG_ENV_IS_IN_MMC=y
-CONFIG_TPL_DM=y
 CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_TPL_DM=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_TPL_REGMAP=y
@@ -55,12 +55,11 @@ CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_PHY=y
-CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index b1b5bf7fd2..8b01c1f96b 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -5,7 +5,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_RK3328=y
-CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x40000
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
@@ -28,13 +28,11 @@ CONFIG_SPL_STACK_R=y
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_TPL_BOOTROM_SUPPORT=y
-CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_BUF_SIZE=0x4000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_BDI is not set
-CONFIG_CMD_CONSOLE=y
 # CONFIG_CMD_BOOTD is not set
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_ELF is not set
@@ -82,7 +80,6 @@ CONFIG_MISC=y
 CONFIG_ROCKCHIP_EFUSE=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_PMIC=y
@@ -119,7 +116,9 @@ CONFIG_ROCKCHIP_DRM_TVE=y
 CONFIG_LCD=y
 # CONFIG_IRQ is not set
 CONFIG_USE_TINY_PRINTF=y
+CONFIG_PANIC_HANG=y
 CONFIG_SPL_TINY_MEMSET=y
+CONFIG_TPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
 # CONFIG_EFI_LOADER is not set
 CONFIG_AVB_LIBAVB=y

commit 7e72214d51563aaf54c857ac0468b522e0002c9f
Author: Shixiang Zheng <shixiang.zheng@rock-chips.com>
Date:   Thu Mar 28 15:26:28 2019 +0800

    video/drm: logo: the negative height will cause vop register err
    
    the bmp file has been processed when reserved equals BMP_PROCESSED_FLAG
    
    Change-Id: I793582cdd4ee5ee2a774c7a0dee8d36c81ed4f4c
    Signed-off-by: Shixiang Zheng <shixiang.zheng@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 9f8be7d2ba..65378c6db4 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -45,6 +45,7 @@
  **********************************************************************/
 
 #define RK_BLK_SIZE 512
+#define BMP_PROCESSED_FLAG 8399
 
 DECLARE_GLOBAL_DATA_PTR;
 static LIST_HEAD(rockchip_display_list);
@@ -923,6 +924,7 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 	void *dst = NULL, *pdst;
 	int size, len;
 	int ret = 0;
+	int reserved = 0;
 
 	if (!logo || !bmp_name)
 		return -EINVAL;
@@ -948,6 +950,9 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 	logo->bpp = get_unaligned_le16(&header->bit_count);
 	logo->width = get_unaligned_le32(&header->width);
 	logo->height = get_unaligned_le32(&header->height);
+	reserved = get_unaligned_le32(&header->reserved);
+	if (logo->height < 0)
+	    logo->height = -logo->height;
 	size = get_unaligned_le32(&header->file_size);
 	if (!can_direct_logo(logo->bpp)) {
 		if (size > MEMORY_POOL_SIZE) {
@@ -995,7 +1000,10 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 		logo->ymirror = 0;
 	} else {
 		logo->offset = get_unaligned_le32(&header->data_offset);
-		logo->ymirror = 1;
+		if (reserved == BMP_PROCESSED_FLAG)
+			logo->ymirror = 0;
+		else
+			logo->ymirror = 1;
 	}
 	logo->mem = dst;
 
diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index 1c72aa966f..cc719b8aac 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -129,7 +129,7 @@ struct logo_info {
 	bool ymirror;
 	u32 offset;
 	u32 width;
-	u32 height;
+	int height;
 	u32 bpp;
 };
 

commit 9a272a6177cb77726dc5677adbc49395cbb08b6e
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Mar 13 11:35:54 2019 +0800

    ARM: dts: rk3308-evb: Add mac node support at dts level for rk3308b
    
    Note: the default status of mac is disabled.
    
    Change-Id: I2f3cebb03f19f16c2553579e69e8312943d7ed75
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-evb.dts b/arch/arm/dts/rk3308-evb.dts
index dfcd3f2916..7ddcae479f 100644
--- a/arch/arm/dts/rk3308-evb.dts
+++ b/arch/arm/dts/rk3308-evb.dts
@@ -269,6 +269,12 @@
 		status = "okay";
 	};
 
+	vcc_phy: vcc-phy-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_phy";
+		regulator-always-on;
+		regulator-boot-on;
+	};
 };
 
 &display_subsystem {
@@ -283,6 +289,19 @@
 	status = "okay";
 };
 
+&mac {
+	phy-supply = <&vcc_phy>;
+	assigned-clocks = <&cru SCLK_MAC>;
+	assigned-clock-parents = <&mac_clkin>;
+	clock_in_out = "input";
+	pinctrl-names = "default";
+	pinctrl-0 = <&rmii_pins &mac_refclk>;
+	snps,reset-gpio = <&gpio4 RK_PC0 GPIO_ACTIVE_LOW>;
+	snps,reset-active-low;
+	snps,reset-delays-us = <0 50000 50000>;
+	status = "disabled";
+};
+
 &pwm0 {
 	status = "okay";
 };

commit 22125d78ab01b11a776e1caf82f8b42ab8b0f009
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Mar 13 11:34:50 2019 +0800

    ARM: dts: rk3308: Add mac node support at dtsi level
    
    Change-Id: I8c109a092b0fb1f9df2d7d8da905b38c7e65b0de
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/dts/rk3308.dtsi b/arch/arm/dts/rk3308.dtsi
index 1e9ec023e6..d51c69a49f 100644
--- a/arch/arm/dts/rk3308.dtsi
+++ b/arch/arm/dts/rk3308.dtsi
@@ -67,6 +67,13 @@
 		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
 	};
 
+	mac_clkin: external-mac-clock {
+		compatible = "fixed-clock";
+		clock-frequency = <50000000>;
+		clock-output-names = "mac_clkin";
+		#clock-cells = <0>;
+	};
+
 	display_subsystem: display-subsystem {
 		compatible = "rockchip,display-subsystem";
 		ports = <&vop_out>;
@@ -446,6 +453,28 @@
 		status = "disabled";
 	};
 
+	mac: ethernet@ff4e0000 {
+		compatible = "rockchip,rk3308-mac";
+		reg = <0x0 0xff4e0000 0x0 0x10000>;
+		rockchip,grf = <&grf>;
+		interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "macirq";
+		clocks = <&cru SCLK_MAC>, <&cru SCLK_MAC_RX_TX>,
+			 <&cru SCLK_MAC_RX_TX>, <&cru SCLK_MAC_REF>,
+			 <&cru SCLK_MAC>, <&cru ACLK_MAC>,
+			 <&cru PCLK_MAC>, <&cru SCLK_MAC_RMII>;
+		clock-names = "stmmaceth", "mac_clk_rx",
+			      "mac_clk_tx", "clk_mac_ref",
+			      "clk_mac_refout", "aclk_mac",
+			      "pclk_mac", "clk_mac_speed";
+		phy-mode = "rmii";
+		pinctrl-names = "default";
+		pinctrl-0 = <&rmii_pins &mac_refclk_12ma>;
+		resets = <&cru SRST_MAC_A>;
+		reset-names = "stmmaceth";
+		status = "disabled";
+	};
+
 	cru: clock-controller@ff500000 {
 		compatible = "rockchip,rk3308-cru";
 		reg = <0x0 0xff500000 0x0 0x1000>;
@@ -1046,10 +1075,19 @@
 					/* mac_mdio */
 					<1 RK_PB6 3 &pcfg_pull_none>,
 					/* mac_mdc */
-					<1 RK_PB5 3 &pcfg_pull_none>,
-					/* mac_clk */
+					<1 RK_PB5 3 &pcfg_pull_none>;
+			};
+
+			mac_refclk_12ma: mac-refclk-12ma {
+				rockchip,pins =
+					<1 RK_PB4 3 &pcfg_pull_none_12ma>;
+			};
+
+			mac_refclk: mac-refclk {
+				rockchip,pins =
 					<1 RK_PB4 3 &pcfg_pull_none>;
 			};
+
 		};
 
 		lcdc {

commit 200683ea3d1db7d51b77da840b8e8333c04dcdf7
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Mar 13 11:33:55 2019 +0800

    clk: rockchip: Add mac clock support for rk3308
    
    Change-Id: I972e2b7977f0f94164c72ae2205ec51780eb7373
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
index 0f0b5e43bb..8ebd6e1903 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
@@ -261,6 +261,23 @@ enum {
 	EMMC_DIV_SHIFT		= 0,
 	EMMC_DIV_MASK		= 0xff << EMMC_DIV_SHIFT,
 
+	/* CRU_CLKSEL43_CON */
+	MAC_CLK_SPEED_SEL_SHIFT = 15,
+	MAC_CLK_SPEED_SEL_MASK = 1 << MAC_CLK_SPEED_SEL_SHIFT,
+	MAC_CLK_SPEED_SEL_10M = 0,
+	MAC_CLK_SPEED_SEL_100M,
+	MAC_CLK_SOURCE_SEL_SHIFT = 14,
+	MAC_CLK_SOURCE_SEL_MASK = 1 << MAC_CLK_SOURCE_SEL_SHIFT,
+	MAC_CLK_SOURCE_SEL_INTERNAL	= 0,
+	MAC_CLK_SOURCE_SEL_EXTERNAL,
+	MAC_PLL_SHIFT		= 6,
+	MAC_PLL_MASK		= 0x3 << MAC_PLL_SHIFT,
+	MAC_SEL_DPLL		= 0,
+	MAC_SEL_VPLL0,
+	MAC_SEL_VPLL1,
+	MAC_DIV_SHIFT		= 0,
+	MAC_DIV_MASK		= 0x1f << MAC_DIV_SHIFT,
+
 	/* CRU_CLK_SEL45_CON */
 	AUDIO_PCLK_DIV_SHIFT	= 8,
 	AUDIO_PCLK_DIV_MASK	= 0x1f << AUDIO_PCLK_DIV_SHIFT,
diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index fa16d7449c..e36d64670e 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -206,6 +206,52 @@ static ulong rk3308_i2c_set_clk(struct clk *clk, uint hz)
 	return rk3308_i2c_get_clk(clk);
 }
 
+static ulong rk3308_mac_set_clk(struct clk *clk, uint hz)
+{
+	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3308_cru *cru = priv->cru;
+	u32 con = readl(&cru->clksel_con[43]);
+	ulong pll_rate;
+	u8 div;
+
+	if ((con >> MAC_PLL_SHIFT) & MAC_SEL_VPLL0)
+		pll_rate = rockchip_pll_get_rate(&rk3308_pll_clks[VPLL0],
+						 priv->cru, VPLL0);
+	else if ((con >> MAC_PLL_SHIFT) & MAC_SEL_VPLL1)
+		pll_rate = rockchip_pll_get_rate(&rk3308_pll_clks[VPLL1],
+						 priv->cru, VPLL1);
+	else
+		pll_rate = rockchip_pll_get_rate(&rk3308_pll_clks[DPLL],
+						 priv->cru, DPLL);
+
+	/*default set 50MHZ for gmac*/
+	if (!hz)
+		hz = 50000000;
+
+	div = DIV_ROUND_UP(pll_rate, hz) - 1;
+	assert(div < 32);
+	rk_clrsetreg(&cru->clksel_con[43], MAC_DIV_MASK,
+		     div << MAC_DIV_SHIFT);
+
+	return DIV_TO_RATE(pll_rate, div);
+}
+
+static int rk3308_mac_set_speed_clk(struct clk *clk, uint hz)
+{
+	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3308_cru *cru = priv->cru;
+
+	if (hz != 2500000 && hz != 25000000) {
+		debug("Unsupported mac speed:%d\n", hz);
+		return -EINVAL;
+	}
+
+	rk_clrsetreg(&cru->clksel_con[43], MAC_CLK_SPEED_SEL_MASK,
+		     ((hz == 2500000) ? 0 : 1) << MAC_CLK_SPEED_SEL_SHIFT);
+
+	return 0;
+}
+
 static ulong rk3308_mmc_get_clk(struct clk *clk)
 {
 	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
@@ -867,6 +913,12 @@ static ulong rk3308_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_I2C3:
 		ret = rk3308_i2c_set_clk(clk, rate);
 		break;
+	case SCLK_MAC:
+		ret = rk3308_mac_set_clk(clk, rate);
+		break;
+	case SCLK_MAC_RMII:
+		ret = rk3308_mac_set_speed_clk(clk, rate);
+		break;
 	case SCLK_SARADC:
 		ret = rk3308_saradc_set_clk(clk, rate);
 		break;
@@ -1033,11 +1085,46 @@ static int rk3308_clk_set_phase(struct clk *clk, int degrees)
 	return ret;
 }
 
+static int __maybe_unused rk3308_mac_set_parent(struct clk *clk, struct clk *parent)
+{
+	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
+
+	/*
+	 * If the requested parent is in the same clock-controller and
+	 * the id is SCLK_MAC_SRC, switch to the internal clock.
+	 */
+	if (parent->id == SCLK_MAC_SRC) {
+		debug("%s: switching RMII to SCLK_MAC\n", __func__);
+		rk_clrreg(&priv->cru->clksel_con[43], BIT(14));
+	} else {
+		debug("%s: switching RMII to CLKIN\n", __func__);
+		rk_setreg(&priv->cru->clksel_con[43], BIT(14));
+	}
+
+	return 0;
+}
+
+static int __maybe_unused rk3308_clk_set_parent(struct clk *clk, struct clk *parent)
+{
+	switch (clk->id) {
+	case SCLK_MAC:
+		return rk3308_mac_set_parent(clk, parent);
+	default:
+		break;
+	}
+
+	debug("%s: unsupported clk %ld\n", __func__, clk->id);
+	return -ENOENT;
+}
+
 static struct clk_ops rk3308_clk_ops = {
 	.get_rate = rk3308_clk_get_rate,
 	.set_rate = rk3308_clk_set_rate,
 	.get_phase	= rk3308_clk_get_phase,
 	.set_phase	= rk3308_clk_set_phase,
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+	.set_parent = rk3308_clk_set_parent,
+#endif
 };
 
 static void rk3308_clk_init(struct udevice *dev)

commit c4ff7367d6e344ed78dde06b38da64676f0e363c
Author: David Wu <david.wu@rock-chips.com>
Date:   Fri Mar 1 20:06:29 2019 +0800

    config: evb-rk3308: Enable GMAC config
    
    Change-Id: I6884fbce580e677981daa142e611248e38ef4952
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/configs/evb-aarch32-rk3308_defconfig b/configs/evb-aarch32-rk3308_defconfig
index f8510b1e49..1937284b35 100644
--- a/configs/evb-aarch32-rk3308_defconfig
+++ b/configs/evb-aarch32-rk3308_defconfig
@@ -51,6 +51,9 @@ CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
 CONFIG_REGULATOR_PWM=y
diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index 48af622e47..979823ec75 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -49,6 +49,9 @@ CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
 CONFIG_REGULATOR_PWM=y
diff --git a/configs/rk3308-aarch32_defconfig b/configs/rk3308-aarch32_defconfig
index 956d0cd2aa..ffa565e3d6 100644
--- a/configs/rk3308-aarch32_defconfig
+++ b/configs/rk3308-aarch32_defconfig
@@ -55,6 +55,9 @@ CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
 CONFIG_POWER_FG_RK816=y
diff --git a/configs/rk3308_defconfig b/configs/rk3308_defconfig
index bacbaabd9d..84b02619d3 100644
--- a/configs/rk3308_defconfig
+++ b/configs/rk3308_defconfig
@@ -54,6 +54,9 @@ CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
 CONFIG_POWER_FG_RK816=y

commit 23adb58f0c42ab1bb8baa7ffc4c72734011eaee9
Author: David Wu <david.wu@rock-chips.com>
Date:   Fri Mar 1 20:06:00 2019 +0800

    net: Add rk3308 mac support
    
    Change-Id: I143e7847e2249fafdcbcdaf69ff3a88915674836
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/net/gmac_rockchip.c b/drivers/net/gmac_rockchip.c
index 172d423e2e..47605b1b19 100644
--- a/drivers/net/gmac_rockchip.c
+++ b/drivers/net/gmac_rockchip.c
@@ -17,6 +17,7 @@
 #include <asm/arch/hardware.h>
 #include <asm/arch/grf_rk322x.h>
 #include <asm/arch/grf_rk3288.h>
+#include <asm/arch/grf_rk3308.h>
 #include <asm/arch/grf_rk3328.h>
 #include <asm/arch/grf_rk3368.h>
 #include <asm/arch/grf_rk3399.h>
@@ -140,6 +141,47 @@ static int rk3288_gmac_fix_mac_speed(struct dw_eth_dev *priv)
 	return 0;
 }
 
+static int rk3308_gmac_fix_mac_speed(struct dw_eth_dev *priv)
+{
+	struct rk3308_grf *grf;
+	struct clk clk_speed;
+	int speed, ret;
+	enum {
+		RK3308_GMAC_SPEED_SHIFT = 0x0,
+		RK3308_GMAC_SPEED_MASK  = BIT(0),
+		RK3308_GMAC_SPEED_10M   = 0,
+		RK3308_GMAC_SPEED_100M  = BIT(0),
+	};
+
+	ret = clk_get_by_name(priv->phydev->dev, "clk_mac_speed",
+			      &clk_speed);
+	if (ret)
+		return ret;
+
+	switch (priv->phydev->speed) {
+	case 10:
+		speed = RK3308_GMAC_SPEED_10M;
+		ret = clk_set_rate(&clk_speed, 2500000);
+		if (ret)
+			return ret;
+		break;
+	case 100:
+		speed = RK3308_GMAC_SPEED_100M;
+		ret = clk_set_rate(&clk_speed, 25000000);
+		if (ret)
+			return ret;
+		break;
+	default:
+		debug("Unknown phy speed: %d\n", priv->phydev->speed);
+		return -EINVAL;
+	}
+
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	rk_clrsetreg(&grf->mac_con0, RK3308_GMAC_SPEED_MASK, speed);
+
+	return 0;
+}
+
 static int rk3328_gmac_fix_mac_speed(struct dw_eth_dev *priv)
 {
 	struct rk3328_grf_regs *grf;
@@ -330,6 +372,22 @@ static void rk3288_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata)
 		     pdata->tx_delay << RK3288_CLK_TX_DL_CFG_GMAC_SHIFT);
 }
 
+static void rk3308_gmac_set_to_rmii(struct gmac_rockchip_platdata *pdata)
+{
+	struct rk3308_grf *grf;
+	enum {
+		RK3308_GMAC_PHY_INTF_SEL_SHIFT = 2,
+		RK3308_GMAC_PHY_INTF_SEL_MASK  = GENMASK(4, 2),
+		RK3308_GMAC_PHY_INTF_SEL_RMII  = BIT(4),
+	};
+
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
+	rk_clrsetreg(&grf->mac_con0,
+		     RK3308_GMAC_PHY_INTF_SEL_MASK,
+		     RK3308_GMAC_PHY_INTF_SEL_RMII);
+}
+
 static void rk3328_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata)
 {
 	struct rk3328_grf_regs *grf;
@@ -552,6 +610,11 @@ const struct rk_gmac_ops rk3288_gmac_ops = {
 	.set_to_rgmii = rk3288_gmac_set_to_rgmii,
 };
 
+const struct rk_gmac_ops rk3308_gmac_ops = {
+	.fix_mac_speed = rk3308_gmac_fix_mac_speed,
+	.set_to_rmii = rk3308_gmac_set_to_rmii,
+};
+
 const struct rk_gmac_ops rk3328_gmac_ops = {
 	.fix_mac_speed = rk3328_gmac_fix_mac_speed,
 	.set_to_rgmii = rk3328_gmac_set_to_rgmii,
@@ -577,6 +640,8 @@ static const struct udevice_id rockchip_gmac_ids[] = {
 	  .data = (ulong)&rk3228_gmac_ops },
 	{ .compatible = "rockchip,rk3288-gmac",
 	  .data = (ulong)&rk3288_gmac_ops },
+	{ .compatible = "rockchip,rk3308-mac",
+	  .data = (ulong)&rk3308_gmac_ops },
 	{ .compatible = "rockchip,rk3328-gmac",
 	  .data = (ulong)&rk3328_gmac_ops },
 	{ .compatible = "rockchip,rk3368-gmac",

commit 4862a585bcf0b5993437014f3a91b52a1297568d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Mar 21 10:32:58 2019 +0800

    configs: rk3399pro-npu: enable fan53555 regulator
    
    Change-Id: I71a45e5dc77fefd4278c9fa8ca0dd8f0f31cdd32
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3399pro-npu_defconfig b/configs/rk3399pro-npu_defconfig
index 7555476382..bcc3cd3703 100644
--- a/configs/rk3399pro-npu_defconfig
+++ b/configs/rk3399pro-npu_defconfig
@@ -53,6 +53,7 @@ CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 # CONFIG_MMC is not set
 CONFIG_PINCTRL=y
+CONFIG_REGULATOR_FAN53555=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_RAM=y
 CONFIG_DM_RAMDISK=y

commit 2dd104a51f8faae529ea796f22e5178520d5dfdb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 26 19:59:36 2019 +0800

    rockchip: param: set common reserved memory only for ARM64
    
    Follow legacy U-Boot rules(branch: rkdevelop).
    
    Change-Id: Id181baf1b3fe77f2bf5f15405b1a7618920cbed1
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/param.c b/arch/arm/mach-rockchip/param.c
index 42d5ef7636..6cf867686e 100644
--- a/arch/arm/mach-rockchip/param.c
+++ b/arch/arm/mach-rockchip/param.c
@@ -145,9 +145,12 @@ struct memblock param_parse_common_resv_mem(void)
 {
 	struct memblock mem;
 
+#ifdef CONFIG_ARM64
 	mem.base = SDRAM_OFFSET(SZ_1M);
 	mem.size = SZ_1M;
-
+#else
+	mem.size = 0;
+#endif
 	return mem;
 }
 

commit 4e92aae1f9ac4962fe2f928aff4e64767bc8b05b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 4 12:18:05 2019 +0800

    rockchip: param: remove some function compile for TPL/SPL
    
    Change-Id: I828e14d12c056a7dbc8a5a8863f2f0fab4285d22
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/param.c b/arch/arm/mach-rockchip/param.c
index 8f88958192..42d5ef7636 100644
--- a/arch/arm/mach-rockchip/param.c
+++ b/arch/arm/mach-rockchip/param.c
@@ -12,6 +12,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
 #define SDRAM_OFFSET(offset)		(CONFIG_SYS_SDRAM_BASE + (offset))
 #define PARAM_DRAM_INFO_OFFSET		(SZ_32M)
 #define PARAM_OPTEE_INFO_OFFSET		(SZ_32M + SZ_2M)
@@ -195,6 +196,7 @@ int param_parse_bootdev(char **devtype, char **devnum)
 
 	return -ENOSYS;
 }
+#endif
 
 struct memblock *param_parse_ddr_mem(int *out_count)
 {

commit 6115fdb3c07a7c9989f25099bc9b0f18c2b255df
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 26 20:01:49 2019 +0800

    common: android: improve os image information
    
    android_image_parse_kernel_comp() doesn't return valid os
    compressed type after android_image_set_kload(), so we add
    the env "os_comp" to record compressed type.
    
    Change-Id: Ie175649d348c0578ce78e139bdbbf4b6f9ea1101
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 68535abbc8..e6da05a098 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -308,14 +308,14 @@ static int android_bootloader_get_fdt(const char *part_name,
 
 int android_bootloader_boot_kernel(unsigned long kernel_address)
 {
-	ulong comp;
-	char kernel_addr_str[12];
-	char *fdt_addr = env_get("fdt_addr");
 	char *kernel_addr_r = env_get("kernel_addr_r");
 	char *kernel_addr_c = env_get("kernel_addr_c");
-
+	char *fdt_addr = env_get("fdt_addr");
+	char kernel_addr_str[12];
+	char comp_str[32] = {0};
+	ulong comp_type;
 	const char *comp_name[] = {
-		[IH_COMP_NONE]  = "",
+		[IH_COMP_NONE]  = "IMAGE",
 		[IH_COMP_GZIP]  = "GZIP",
 		[IH_COMP_BZIP2] = "BZIP2",
 		[IH_COMP_LZMA]  = "LZMA",
@@ -326,15 +326,23 @@ int android_bootloader_boot_kernel(unsigned long kernel_address)
 	char *bootm_args[] = {
 		"bootm", kernel_addr_str, kernel_addr_str, fdt_addr, NULL };
 
-	comp = android_image_get_comp((struct andr_img_hdr *)kernel_address);
+	comp_type = env_get_ulong("os_comp", 10, 0);
 	sprintf(kernel_addr_str, "0x%lx", kernel_address);
 
-	if (comp != IH_COMP_NONE)
-		printf("Booting %s kernel at %s(Uncompress to %s) with fdt at %s...\n\n\n",
-		       comp_name[comp], kernel_addr_c, kernel_addr_r, fdt_addr);
-	else
-		printf("Booting kernel at %s with fdt at %s...\n\n\n",
-		       kernel_addr_r, fdt_addr);
+	if (comp_type != IH_COMP_NONE) {
+		if (comp_type == IH_COMP_ZIMAGE &&
+		    kernel_addr_r && !kernel_addr_c) {
+			kernel_addr_c = kernel_addr_r;
+			kernel_addr_r = __stringify(CONFIG_SYS_SDRAM_BASE);
+		}
+		snprintf(comp_str, 32, "%s%s%s",
+			 "(Uncompress to ", kernel_addr_r, ")");
+	}
+
+	printf("Booting %s kernel at %s%s with fdt at %s...\n\n\n",
+	       comp_name[comp_type],
+	       comp_type != IH_COMP_NONE ? kernel_addr_c : kernel_addr_r,
+	       comp_str, fdt_addr);
 
 	if (gd->console_evt == CONSOLE_EVT_CTRL_M) {
 		bidram_dump();
diff --git a/common/image-android.c b/common/image-android.c
index cf436da62c..048de0f7ea 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -419,6 +419,7 @@ long android_image_load(struct blk_desc *dev_desc,
 		if (comp != IH_COMP_NONE) {
 			ulong kernel_addr_c;
 
+			env_set_ulong("os_comp", comp);
 			kernel_addr_c = env_get_ulong("kernel_addr_c", 16, 0);
 			if (kernel_addr_c) {
 				load_address = kernel_addr_c - hdr->page_size;

commit 8d681e4412b383ac32a7768921524eec37f99994
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 26 15:50:10 2019 +0800

    common: android: only adjust load address for ARM64 compressed kernel
    
    If there is not "kernel_addr_c", using "kernel_addr_r" for Image/zImage
    on 32-bit platform.
    
    If there is not "kernel_addr_c", adjust load address to promise compressed
    kernel can normal boot on 64-bit platform.
    
    Change-Id: I42cc3c9074eb8f1caaa44d9256d2abdae6cd97b8
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/image-android.c b/common/image-android.c
index 64374b10e4..cf436da62c 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -413,15 +413,31 @@ long android_image_load(struct blk_desc *dev_desc,
 			   part_info->blksz - 1) / part_info->blksz;
 		comp = android_image_parse_kernel_comp(hdr);
 		/*
-		 * We should load a compressed kernel Image
-		 * to high memory
+		 * We should load compressed kernel Image to high memory at
+		 * address "kernel_addr_c".
 		 */
 		if (comp != IH_COMP_NONE) {
-			load_address += android_image_get_ksize(hdr) * 3;
-			load_address = env_get_ulong("kernel_addr_c", 16, load_address);
-			load_address -= hdr->page_size;
-			unmap_sysmem(buf);
-			buf = map_sysmem(load_address, 0 /* size */);
+			ulong kernel_addr_c;
+
+			kernel_addr_c = env_get_ulong("kernel_addr_c", 16, 0);
+			if (kernel_addr_c) {
+				load_address = kernel_addr_c - hdr->page_size;
+				unmap_sysmem(buf);
+				buf = map_sysmem(load_address, 0 /* size */);
+			}
+#ifdef CONFIG_ARM64
+			else {
+				printf("Warn: \"kernel_addr_c\" is not defined "
+				       "for compressed kernel Image!\n");
+				load_address += android_image_get_ksize(hdr) * 3;
+				load_address = ALIGN(load_address, ARCH_DMA_MINALIGN);
+				env_set_ulong("kernel_addr_c", load_address);
+
+				load_address -= hdr->page_size;
+				unmap_sysmem(buf);
+				buf = map_sysmem(load_address, 0 /* size */);
+			}
+#endif
 		}
 
 		if (blk_cnt * part_info->blksz > max_size) {

commit 5a54baa79344007142206f4dab5dd46d8ea1dc91
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Apr 3 17:22:27 2019 +0800

    dm: key: refactor code
    
    - use standard dm framework to implement all key drivers;
    - all key node to be children and attach to key bus;
    - dm key uclass takes over most work;
    - reduce a lot of driver code size;
    
    Change-Id: I9ea4515249d493eb4434890b90350f694c07404f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig
index 7d48cfe526..e49f23c2d2 100644
--- a/drivers/input/Kconfig
+++ b/drivers/input/Kconfig
@@ -47,7 +47,7 @@ config I8042_KEYB
 
 config RK8XX_PWRKEY
 	bool "Enable RK805/816/817 pwrkey support"
-	depends on DM_KEY && PMIC_RK8XX
+	depends on DM_KEY && PMIC_RK8XX && IRQ
 	help
 	  This adds a driver for the RK805/816/817 pwrkey support.
 
diff --git a/drivers/input/adc_key.c b/drivers/input/adc_key.c
index 65645d01bc..d3d7df911c 100644
--- a/drivers/input/adc_key.c
+++ b/drivers/input/adc_key.c
@@ -4,92 +4,77 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 
-#include <dm.h>
-#include <dm/read.h>
-#include <adc.h>
 #include <common.h>
-#include <console.h>
-#include <errno.h>
-#include <fdtdec.h>
-#include <malloc.h>
+#include <dm.h>
 #include <key.h>
-#include <linux/input.h>
 
-static int adc_keys_ofdata_to_platdata(struct udevice *dev)
+static int adc_key_ofdata_to_platdata(struct udevice *dev)
 {
-	struct input_key *key;
-	u32 adc_channels[2], microvolt;
+	struct dm_key_uclass_platdata *uc_key;
+	u32 chn[2], mV;
 	int vref, ret;
-	ofnode node;
 
-	/* Get vref */
-	vref = dev_read_u32_default(dev, "keyup-threshold-microvolt", -1);
-	if (vref < 0) {
-		printf("failed to read 'keyup-threshold-microvolt', ret=%d\n",
-		       vref);
-		return -EINVAL;
-	}
+	uc_key = dev_get_uclass_platdata(dev);
+	if (!uc_key)
+		return -ENXIO;
 
-	/* Get IO channel */
-	ret = dev_read_u32_array(dev, "io-channels", adc_channels, 2);
+	uc_key->type = ADC_KEY;
+	uc_key->name = dev_read_string(dev, "label");
+	ret = dev_read_u32_array(dev_get_parent(dev),
+				 "io-channels", chn, ARRAY_SIZE(chn));
 	if (ret) {
-		printf("failed to read 'io-channels', ret=%d\n", ret);
+		printf("%s: read 'io-channels' failed, ret=%d\n",
+		       uc_key->name, ret);
 		return -EINVAL;
 	}
 
-	/* Parse every adc key data */
-	dev_for_each_subnode(node, dev) {
-		key = calloc(1, sizeof(struct input_key));
-		if (!key)
-			return -ENOMEM;
-
-		key->parent = dev;
-		key->type = ADC_KEY;
-		key->vref = vref;
-		key->channel = adc_channels[1];
-		key->name = ofnode_read_string(node, "label");
-		ret = ofnode_read_u32(node, "linux,code", &key->code);
-		if (ret) {
-			printf("%s: failed to read 'linux,code', ret=%d\n",
-			       key->name, ret);
-			free(key);
-			continue;
-		}
-
-		ret = ofnode_read_u32(node, "press-threshold-microvolt",
-				      &microvolt);
-		if (ret) {
-			printf("%s: failed to read 'press-threshold-microvolt', ret=%d\n",
-			       key->name, ret);
-			free(key);
-			continue;
-		}
+	vref = dev_read_u32_default(dev_get_parent(dev),
+				    "keyup-threshold-microvolt", -ENODATA);
+	if (vref < 0) {
+		printf("%s: read 'keyup-threshold-microvolt' failed, ret=%d\n",
+		       uc_key->name, vref);
+		return -EINVAL;
+	}
 
-		/* Convert microvolt to adc value */
-		key->adcval = microvolt / (key->vref / 1024);
-		key_add(key);
+	uc_key->code = dev_read_u32_default(dev, "linux,code", -ENODATA);
+	if (uc_key->code < 0) {
+		printf("%s: read 'linux,code' failed\n", uc_key->name);
+		return -EINVAL;
+	}
 
-		debug("%s: name=%s: code=%d, vref=%d, channel=%d, microvolt=%d, adcval=%d\n",
-		      __func__, key->name, key->code, key->vref,
-		      key->channel, microvolt, key->adcval);
+	mV = dev_read_u32_default(dev, "press-threshold-microvolt", -ENODATA);
+	if (mV < 0) {
+		printf("%s: read 'press-threshold-microvolt' failed\n",
+		       uc_key->name);
+		return -EINVAL;
 	}
 
+	uc_key->channel = chn[1];
+	uc_key->adcval = mV / (vref / 1024);
+
 	return 0;
 }
 
-static const struct dm_key_ops key_ops = {
-	.name = "adc-keys",
+U_BOOT_DRIVER(adc_key) = {
+	.name   = "adc_key",
+	.id     = UCLASS_KEY,
+	.ofdata_to_platdata = adc_key_ofdata_to_platdata,
 };
 
-static const struct udevice_id adc_keys_ids[] = {
+/* Key Bus */
+static int adc_key_bus_bind(struct udevice *dev)
+{
+	return key_bind_children(dev, "adc_key");
+}
+
+static const struct udevice_id adc_key_bus_match[] = {
 	{ .compatible = "adc-keys" },
 	{ },
 };
 
-U_BOOT_DRIVER(adc_keys) = {
-	.name   = "adc-keys",
-	.id     = UCLASS_KEY,
-	.ops	= &key_ops,
-	.of_match = adc_keys_ids,
-	.ofdata_to_platdata = adc_keys_ofdata_to_platdata,
+U_BOOT_DRIVER(adc_key_bus) = {
+	.name	   = "adc_key_bus",
+	.id	   = UCLASS_SIMPLE_BUS,
+	.of_match  = adc_key_bus_match,
+	.bind	   = adc_key_bus_bind,
 };
diff --git a/drivers/input/gpio_key.c b/drivers/input/gpio_key.c
index 34db0d868d..053c159080 100644
--- a/drivers/input/gpio_key.c
+++ b/drivers/input/gpio_key.c
@@ -4,119 +4,55 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 
-#include <dm.h>
-#include <adc.h>
 #include <common.h>
-#include <console.h>
 #include <dm.h>
-#include <errno.h>
-#include <fdtdec.h>
-#include <malloc.h>
 #include <key.h>
-#include <linux/input.h>
-#include <errno.h>
-#include <dm/read.h>
-#include <irq-generic.h>
-#include <irq-platform.h>
-
-static void gpio_irq_handler(int irq, void *data)
-{
-	struct input_key *key = data;
-
-	if (key->irq != irq)
-		return;
-
-	/* up event */
-	if (irq_get_gpio_level(irq)) {
-		key->up_t = key_timer(0);
-		debug("%s: key down: %llu ms\n", key->name, key->down_t);
-	/* down event */
-	} else {
-		key->down_t = key_timer(0);
-		debug("%s: key up: %llu ms\n", key->name, key->up_t);
-	}
-	/* Must delay */
-	mdelay(10);
-	irq_revert_irq_type(irq);
-}
 
 static int gpio_key_ofdata_to_platdata(struct udevice *dev)
 {
-	struct input_key *key;
-	u32 gpios[2];
-	ofnode node;
-	int irq, ret;
-
-	dev_for_each_subnode(node, dev) {
-		key = calloc(1, sizeof(struct input_key));
-		if (!key)
-			return -ENOMEM;
-
-		key->parent = dev;
-		key->type = GPIO_KEY;
-		key->name = ofnode_read_string(node, "label");
-		ret = ofnode_read_u32(node, "linux,code", &key->code);
-		if (ret) {
-			printf("%s: failed read 'linux,code', ret=%d\n",
-			       key->name, ret);
-			free(key);
-			continue;
-		}
-
-		/* Only register power key as interrupt */
-		if (key->code == KEY_POWER) {
-			ret = ofnode_read_u32_array(node, "gpios", gpios, 2);
-			if (ret) {
-				printf("%s: failed to read 'gpios', ret=%d\n",
-				       key->name, ret);
-				free(key);
-				continue;
-			}
-
-			/* Must register as interrupt, be able to wakeup system */
-			irq = phandle_gpio_to_irq(gpios[0], gpios[1]);
-			if (irq < 0) {
-				printf("%s: failed to request irq, ret=%d\n",
-				       key->name, irq);
-				free(key);
-				continue;
-			}
-			key->irq = irq;
-			key_add(key);
-			irq_install_handler(irq, gpio_irq_handler, key);
-			irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);
-			irq_handler_enable(irq);
-		} else {
-			ret = gpio_request_by_name_nodev(node, "gpios", 0,
-							 &key->gpio,
-							 GPIOD_IS_IN);
-			if (ret) {
-				printf("%s: failed to request gpio, ret=%d\n",
-				       key->name, ret);
-			}
-
-			key_add(key);
-		}
+	struct dm_key_uclass_platdata *uc_key;
+
+	uc_key = dev_get_uclass_platdata(dev);
+	if (!uc_key)
+		return -ENXIO;
+
+	uc_key->type = GPIO_KEY;
+	uc_key->name = dev_read_string(dev, "label");
+	uc_key->code = dev_read_u32_default(dev, "linux,code", -ENODATA);
+	if (uc_key->code < 0) {
+		printf("%s: read 'linux,code' failed\n", uc_key->name);
+		return -EINVAL;
+	}
 
-		debug("%s: name=%s: code=%d\n", __func__, key->name, key->code);
+	if (dev_read_u32_array(dev, "gpios",
+			       uc_key->gpios, ARRAY_SIZE(uc_key->gpios))) {
+		printf("%s: read 'gpios' failed\n", uc_key->name);
+		return -EINVAL;
 	}
 
 	return 0;
 }
 
-static const struct dm_key_ops key_ops = {
-	.name = "gpio-keys",
+U_BOOT_DRIVER(gpio_key) = {
+	.name   = "gpio_key",
+	.id     = UCLASS_KEY,
+	.ofdata_to_platdata = gpio_key_ofdata_to_platdata,
 };
 
-static const struct udevice_id gpio_key_ids[] = {
+/* Key Bus */
+static int gpio_key_bus_bind(struct udevice *dev)
+{
+	return key_bind_children(dev, "gpio_key");
+}
+
+static const struct udevice_id gpio_key_bus_match[] = {
 	{ .compatible = "gpio-keys" },
 	{ },
 };
 
-U_BOOT_DRIVER(gpio_keys) = {
-	.name   = "gpio-keys",
-	.id     = UCLASS_KEY,
-	.of_match = gpio_key_ids,
-	.ops	= &key_ops,
-	.ofdata_to_platdata = gpio_key_ofdata_to_platdata,
+U_BOOT_DRIVER(gpio_key_bus) = {
+	.name	   = "gpio_key_bus",
+	.id	   = UCLASS_SIMPLE_BUS,
+	.of_match  = gpio_key_bus_match,
+	.bind	   = gpio_key_bus_bind,
 };
diff --git a/drivers/input/key-uclass.c b/drivers/input/key-uclass.c
index 7f369665b2..1a370a5fa9 100644
--- a/drivers/input/key-uclass.c
+++ b/drivers/input/key-uclass.c
@@ -8,15 +8,12 @@
 #include <adc.h>
 #include <dm.h>
 #include <key.h>
+#include <dm/lists.h>
+#include <irq-generic.h>
 
-static LIST_HEAD(key_list);
-
-const char *evt_name[] = {
-	"Not down",
-	"Down",
-	"Long down",
-	"Not exist",
-};
+#define KEY_WARN(fmt, args...)	printf("Key Warn: "fmt, ##args)
+#define KEY_ERR(fmt, args...)	printf("Key Error: "fmt, ##args)
+#define KEY_DBG(fmt, args...)	 debug("Key Debug: "fmt, ##args)
 
 static inline uint64_t arch_counter_get_cntpct(void)
 {
@@ -26,7 +23,7 @@ static inline uint64_t arch_counter_get_cntpct(void)
 #ifdef CONFIG_ARM64
 	asm volatile("mrs %0, cntpct_el0" : "=r" (cval));
 #else
-	asm volatile ("mrrc p15, 0, %Q0, %R0, c14" : "=r" (cval));
+	asm volatile("mrrc p15, 0, %Q0, %R0, c14" : "=r" (cval));
 #endif
 	return cval;
 }
@@ -39,197 +36,263 @@ uint64_t key_timer(uint64_t base)
 	return (cntpct > base) ? (cntpct - base) : 0;
 }
 
-/*
- * What's simple and complex event mean?
- *
- * simple event:   key press down or none;
- * complext event: key press down, long down or none;
- */
-static int key_read_adc_simple_event(struct input_key *key, unsigned int adcval)
+static int key_adc_event(struct dm_key_uclass_platdata *uc_key, int adcval)
 {
-	int max, min, margin = 30;
-	int keyval;
-
-	/* Get min, max */
-	max = key->adcval + margin;
-	if (key->adcval > margin)
-		min = key->adcval - margin;
-	else
-		min = 0;
-
-	debug("%s: '%s' configure adc=%d: range[%d~%d]; hw adcval=%d\n",
-	      __func__, key->name, key->adcval, min, max, adcval);
-
-	/* Check */
-	if ((adcval <= max) && (adcval >= min)) {
-		keyval = KEY_PRESS_DOWN;
-		debug("%s key pressed..\n", key->name);
-	} else {
-		keyval = KEY_PRESS_NONE;
-	}
-
-	return keyval;
+	return (adcval <= uc_key->max && adcval >= uc_key->min) ?
+		KEY_PRESS_DOWN : KEY_PRESS_NONE;
 }
 
-static int key_read_gpio_simple_event(struct input_key *key)
+static int key_gpio_event(struct dm_key_uclass_platdata *uc_key)
 {
-	if (!dm_gpio_is_valid(&key->gpio)) {
-		printf("%s: invalid gpio\n", key->name);
+	if (!dm_gpio_is_valid(&uc_key->gpio)) {
+		KEY_ERR("'%s' Invalid gpio\n", uc_key->name);
 		return KEY_PRESS_NONE;
 	}
 
-	return dm_gpio_get_value(&key->gpio) ? KEY_PRESS_DOWN : KEY_PRESS_NONE;
+	return dm_gpio_get_value(&uc_key->gpio) ?
+	       KEY_PRESS_DOWN : KEY_PRESS_NONE;
 }
 
-static int key_read_gpio_complex_event(struct input_key *key)
+static int key_gpio_interrupt_event(struct dm_key_uclass_platdata *uc_key)
 {
-	int keyval;
+	int event;
 
 	debug("%s: %s: up=%llu, down=%llu, delta=%llu\n",
-	      __func__, key->name, key->up_t, key->down_t,
-	      key->up_t - key->down_t);
+	      __func__, uc_key->name, uc_key->rise_ms, uc_key->fall_ms,
+	      uc_key->rise_ms - uc_key->fall_ms);
 
 	/* Possible this is machine power-on long pressed, so ignore this */
-	if (key->down_t == 0 && key->up_t != 0) {
-		keyval = KEY_PRESS_NONE;
+	if (uc_key->fall_ms == 0 && uc_key->rise_ms != 0) {
+		event = KEY_PRESS_NONE;
 		goto out;
 	}
 
-	if ((key->up_t > key->down_t) &&
-	    (key->up_t - key->down_t) >= KEY_LONG_DOWN_MS) {
-		key->up_t = 0;
-		key->down_t = 0;
-		keyval = KEY_PRESS_LONG_DOWN;
-		debug("%s key long pressed..\n", key->name);
-	} else if (key->down_t &&
-		   key_timer(key->down_t) >= KEY_LONG_DOWN_MS) {
-		key->up_t = 0;
-		key->down_t = 0;
-		keyval = KEY_PRESS_LONG_DOWN;
-		debug("%s key long pressed(hold)..\n", key->name);
-	} else if ((key->up_t > key->down_t) &&
-		   (key->up_t - key->down_t) < KEY_LONG_DOWN_MS) {
-		key->up_t = 0;
-		key->down_t = 0;
-		keyval = KEY_PRESS_DOWN;
-		debug("%s key short pressed..\n", key->name);
+	if ((uc_key->rise_ms > uc_key->fall_ms) &&
+	    (uc_key->rise_ms - uc_key->fall_ms) >= KEY_LONG_DOWN_MS) {
+		uc_key->rise_ms = 0;
+		uc_key->fall_ms = 0;
+		event = KEY_PRESS_LONG_DOWN;
+		KEY_DBG("%s key long pressed..\n", uc_key->name);
+	} else if (uc_key->fall_ms &&
+		   key_timer(uc_key->fall_ms) >= KEY_LONG_DOWN_MS) {
+		uc_key->rise_ms = 0;
+		uc_key->fall_ms = 0;
+		event = KEY_PRESS_LONG_DOWN;
+		KEY_DBG("%s key long pressed(hold)..\n", uc_key->name);
+	} else if ((uc_key->rise_ms > uc_key->fall_ms) &&
+		   (uc_key->rise_ms - uc_key->fall_ms) < KEY_LONG_DOWN_MS) {
+		uc_key->rise_ms = 0;
+		uc_key->fall_ms = 0;
+		event = KEY_PRESS_DOWN;
+		KEY_DBG("%s key short pressed..\n", uc_key->name);
 	/* Possible in charge animation, we enable irq after fuel gauge updated */
-	} else if (key->up_t && key->down_t && (key->up_t == key->down_t)){
-		key->up_t = 0;
-		key->down_t = 0;
-		keyval = KEY_PRESS_DOWN;
-		debug("%s key short pressed..\n", key->name);
+	} else if (uc_key->rise_ms && uc_key->fall_ms &&
+		   (uc_key->rise_ms == uc_key->fall_ms)) {
+		uc_key->rise_ms = 0;
+		uc_key->fall_ms = 0;
+		event = KEY_PRESS_DOWN;
+		KEY_DBG("%s key short pressed..\n", uc_key->name);
 	} else {
-		keyval = KEY_PRESS_NONE;
+		event = KEY_PRESS_NONE;
 	}
 
 out:
-	return keyval;
+	return event;
+}
+
+int key_is_pressed(int event)
+{
+	return (event == KEY_PRESS_DOWN || event == KEY_PRESS_LONG_DOWN);
 }
 
-static int key_read_gpio_interrupt_event(struct input_key *key)
+static int key_core_read(struct dm_key_uclass_platdata *uc_key)
 {
-	debug("%s: %s\n", __func__, key->name);
+	unsigned int adcval;
+
+	if (uc_key->type == ADC_KEY) {
+		if (adc_channel_single_shot("saradc",
+					    uc_key->channel, &adcval)) {
+			KEY_ERR("%s failed to read saradc\n", uc_key->name);
+			return KEY_NOT_EXIST;
+		}
 
-	return key_read_gpio_complex_event(key);
+		return key_adc_event(uc_key, adcval);
+	}
+
+	return (uc_key->code == KEY_POWER) ?
+		key_gpio_interrupt_event(uc_key) :
+		key_gpio_event(uc_key);
 }
 
-int key_is_pressed(int keyval)
+int key_read(int code)
 {
-	return (keyval == KEY_PRESS_DOWN || keyval == KEY_PRESS_LONG_DOWN);
+	struct dm_key_uclass_platdata *uc_key;
+	struct udevice *dev;
+	struct uclass *uc;
+	bool allow_pre_reloc = false;
+	int ret, event = KEY_NOT_EXIST;
+
+	ret = uclass_get(UCLASS_KEY, &uc);
+	if (ret)
+		return ret;
+
+try_again:
+	for (uclass_first_device(UCLASS_KEY, &dev);
+	     dev;
+	     uclass_next_device(&dev)) {
+		uc_key = dev_get_uclass_platdata(dev);
+
+		if (!allow_pre_reloc && uc_key->pre_reloc)
+			continue;
+
+		if (uc_key->code != code)
+			continue;
+
+		event = key_core_read(uc_key);
+		if (key_is_pressed(event))
+			return event;
+	}
+
+	/* If not find valid key node from kernel, try from u-boot */
+	if (event == KEY_NOT_EXIST && !allow_pre_reloc) {
+		allow_pre_reloc = true;
+		goto try_again;
+	}
+
+	return event;
 }
 
-void key_add(struct input_key *key)
+#ifdef CONFIG_IRQ
+static void gpio_irq_handler(int irq, void *data)
 {
-	if (!key)
-		return;
+	struct dm_key_uclass_platdata *uc_key = data;
 
-	if (!key->parent) {
-		printf("Err: Can't find key(code=%d) device\n", key->code);
+	if (uc_key->irq != irq)
 		return;
+
+	if (irq_get_gpio_level(irq)) {
+		uc_key->rise_ms = key_timer(0);
+		KEY_DBG("%s: key dn: %llu ms\n", uc_key->name, uc_key->fall_ms);
+	} else {
+		uc_key->fall_ms = key_timer(0);
+		KEY_DBG("%s: key up: %llu ms\n", uc_key->name, uc_key->rise_ms);
 	}
 
-	key->pre_reloc = dev_read_bool(key->parent, "u-boot,dm-pre-reloc");
-	list_add_tail(&key->link, &key_list);
+	/* Must delay */
+	mdelay(10);
+	irq_revert_irq_type(irq);
 }
+#endif
 
-static int __key_read(struct input_key *key)
+int key_bind_children(struct udevice *dev, const char *drv_name)
 {
-	unsigned int adcval;
-	int keyval = KEY_NOT_EXIST;
+	const char *name;
+	ofnode node;
 	int ret;
 
-	/* Is a adc key? */
-	if (key->type & ADC_KEY) {
-		ret = adc_channel_single_shot("saradc",
-					      key->channel, &adcval);
+	dev_for_each_subnode(node, dev) {
+		/*
+		 * If this node has "compatible" property, this is not
+		 * a amp subnode, but a normal device. skip.
+		 */
+		ofnode_get_property(node, "compatible", &ret);
+		if (ret >= 0)
+			continue;
+
+		if (ret != -FDT_ERR_NOTFOUND)
+			return ret;
+
+		name = ofnode_get_name(node);
+		if (!name)
+			return -EINVAL;
+		ret = device_bind_driver_to_node(dev, drv_name, name,
+						 node, NULL);
 		if (ret)
-			printf("%s: failed to read saradc, ret=%d\n",
-			       key->name, ret);
-		else
-			keyval = key_read_adc_simple_event(key, adcval);
-	/* Is a gpio key? */
-	} else if (key->type & GPIO_KEY) {
-		/* All pwrkey must register as an interrupt event */
-		if (key->code == KEY_POWER)
-			keyval = key_read_gpio_interrupt_event(key);
-		else
-			keyval = key_read_gpio_simple_event(key);
-	} else {
-		printf("%s: invalid key type!\n", __func__);
+			return ret;
 	}
 
-	debug("%s: '%s'(code=%d) is %s\n",
-	      __func__, key->name, key->code, evt_name[keyval]);
-
-	return keyval;
+	return 0;
 }
 
-int key_read(int code)
+static int key_post_probe(struct udevice *dev)
 {
-	struct udevice *dev;
-	struct input_key *key;
-	static int initialized;
-	int keyval = KEY_NOT_EXIST;
-
-	/* Initialize all key drivers */
-	if (!initialized) {
-		for (uclass_first_device(UCLASS_KEY, &dev);
-		     dev;
-		     uclass_next_device(&dev)) {
-			debug("%s: have found key driver '%s'\n\n",
-			      __func__, dev->name);
-		}
-	}
+	struct dm_key_uclass_platdata *uc_key;
+	int margin = 30;
+	int ret;
 
-	/* The key from kernel dtb has higher priority */
-	debug("Reading key from kernel\n");
-	list_for_each_entry(key, &key_list, link) {
-		if (key->pre_reloc || (key->code != code))
-			continue;
+	uc_key = dev_get_uclass_platdata(dev);
+	if (!uc_key)
+		return -ENXIO;
+
+	/* True from U-Boot key node */
+	uc_key->pre_reloc = dev_read_bool(dev, "u-boot,dm-pre-reloc");
 
-		keyval = __key_read(key);
-		if (key_is_pressed(keyval))
-			return keyval;
+	if (uc_key->type == ADC_KEY) {
+		uc_key->max = uc_key->adcval + margin;
+		uc_key->min = uc_key->adcval > margin ?
+					uc_key->adcval - margin : 0;
+	} else {
+		if (uc_key->code == KEY_POWER) {
+			/* The gpio irq has been setup by key driver */
+			if (uc_key->irq)
+				goto finish;
+#ifdef CONFIG_IRQ
+			int irq;
+
+			irq = phandle_gpio_to_irq(uc_key->gpios[0],
+						  uc_key->gpios[1]);
+			if (irq < 0) {
+				KEY_ERR("%s: failed to request irq, ret=%d\n",
+					uc_key->name, irq);
+				return irq;
+			}
+
+			uc_key->irq = irq;
+			irq_install_handler(irq, gpio_irq_handler, uc_key);
+			irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);
+			irq_handler_enable(irq);
+#else
+			KEY_WARN("%s: no IRQ framework available\n", uc_key->name);
+#endif
+		} else {
+			ret = gpio_request_by_name(dev, "gpios", 0,
+						   &uc_key->gpio, GPIOD_IS_IN);
+			if (ret) {
+				KEY_ERR("%s: failed to request gpio, ret=%d\n",
+					uc_key->name, ret);
+				return ret;
+			}
+		}
 	}
 
-	/* If not found any key from kernel dtb, reading from U-Boot dtb */
-	if (keyval == KEY_NOT_EXIST) {
-		debug("Reading key from U-Boot\n");
-		list_for_each_entry(key, &key_list, link) {
-			if (!key->pre_reloc || (key->code != code))
-				continue;
+finish:
+#ifdef DEBUG
+	printf("[%s] (%s, %s, %s):\n", uc_key->name,
+	       uc_key->type == ADC_KEY ? "ADC" : "GPIO",
+	       uc_key->pre_reloc ? "U-Boot" : "Kernel",
+	       dev->parent->name);
+
+	if (uc_key->type == ADC_KEY) {
+		printf("    adcval: %d (%d, %d)\n", uc_key->adcval,
+		       uc_key->min, uc_key->max);
+		printf("   channel: %d\n\n", uc_key->channel);
+	} else {
+		const char *gpio_name =
+		     ofnode_get_name(ofnode_get_by_phandle(uc_key->gpios[0]));
 
-			keyval = __key_read(key);
-			if (key_is_pressed(keyval))
-				return keyval;
-		}
+		printf("       irq: %d\n", uc_key->irq);
+		printf("   gpio[0]: %s\n", gpio_name);
+		printf("   gpio[1]: %d\n\n", uc_key->gpios[1]);
 	}
+#endif
 
-	return keyval;
+	return 0;
 }
 
 UCLASS_DRIVER(key) = {
 	.id		= UCLASS_KEY,
 	.name		= "key",
+	.post_probe	= key_post_probe,
+	.per_device_platdata_auto_alloc_size =
+			sizeof(struct dm_key_uclass_platdata),
 };
diff --git a/drivers/input/rk8xx_pwrkey.c b/drivers/input/rk8xx_pwrkey.c
index fc3ee631e5..14fe5bce3f 100644
--- a/drivers/input/rk8xx_pwrkey.c
+++ b/drivers/input/rk8xx_pwrkey.c
@@ -105,7 +105,7 @@ static void pwrkey_irq_handler(int irq, void *data)
 {
 	struct udevice *dev = data;
 	struct rk8xx_key_priv *priv = dev_get_priv(dev);
-	struct input_key *key = dev_get_platdata(dev);
+	struct dm_key_uclass_platdata *uc_key = dev_get_uclass_platdata(dev);
 	int ret, val, i;
 
 	debug("%s: irq = %d\n", __func__, irq);
@@ -135,14 +135,14 @@ static void pwrkey_irq_handler(int irq, void *data)
 
 	/* fall event */
 	if (val & priv->pwron_fall_int) {
-		key->down_t = key_timer(0);
-		debug("%s: key down: %llu ms\n", __func__, key->down_t);
+		uc_key->fall_ms = key_timer(0);
+		debug("%s: key down: %llu ms\n", __func__, uc_key->fall_ms);
 	}
 
 	/* rise event */
 	if (val & priv->pwron_rise_int) {
-		key->up_t = key_timer(0);
-		debug("%s: key up: %llu ms\n", __func__, key->up_t);
+		uc_key->rise_ms = key_timer(0);
+		debug("%s: key up: %llu ms\n", __func__, uc_key->rise_ms);
 	}
 
 	/* clear intertup */
@@ -162,33 +162,31 @@ static void pwrkey_irq_handler(int irq, void *data)
 
 static int pwrkey_interrupt_init(struct udevice *dev)
 {
-	struct input_key *key = dev_get_platdata(dev);
+	struct dm_key_uclass_platdata *uc_key = dev_get_uclass_platdata(dev);
 	u32 interrupt[2], phandle;
 	int irq, ret;
 
 	phandle = dev_read_u32_default(dev->parent, "interrupt-parent", -1);
 	if (phandle < 0) {
-		printf("failed get 'interrupt-parent', ret=%d\n", phandle);
+		printf("read 'interrupt-parent' failed, ret=%d\n", phandle);
 		return phandle;
 	}
 
 	ret = dev_read_u32_array(dev->parent, "interrupts", interrupt, 2);
 	if (ret) {
-		printf("failed get 'interrupt', ret=%d\n", ret);
+		printf("read 'interrupt' failed, ret=%d\n", ret);
 		return ret;
 	}
 
-	key->parent = dev;
-	key->name = "rk8xx_pwrkey";
-	key->code = KEY_POWER;
-	key->type = GPIO_KEY;
+	uc_key->name = "rk8xx_pwr";
+	uc_key->type = GPIO_KEY;
+	uc_key->code = KEY_POWER;
 	irq = phandle_gpio_to_irq(phandle, interrupt[0]);
 	if (irq < 0) {
-		printf("%s: failed to request irq, ret=%d\n", key->name, irq);
+		printf("%s: request irq failed, ret=%d\n", uc_key->name, irq);
 		return irq;
 	}
-	key->irq = irq;
-	key_add(key);
+	uc_key->irq = irq;
 	irq_install_handler(irq, pwrkey_irq_handler, dev);
 	irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);
 	irq_handler_enable(irq);
@@ -196,10 +194,6 @@ static int pwrkey_interrupt_init(struct udevice *dev)
 	return 0;
 }
 
-static const struct dm_key_ops key_ops = {
-	.name = "rk8xx-pwrkey",
-};
-
 static int rk8xx_pwrkey_probe(struct udevice *dev)
 {
 	struct rk8xx_priv *rk8xx = dev_get_priv(dev->parent);
@@ -270,8 +264,6 @@ static int rk8xx_pwrkey_probe(struct udevice *dev)
 U_BOOT_DRIVER(rk8xx_pwrkey) = {
 	.name   = "rk8xx_pwrkey",
 	.id     = UCLASS_KEY,
-	.ops	= &key_ops,
 	.probe  = rk8xx_pwrkey_probe,
-	.platdata_auto_alloc_size = sizeof(struct input_key),
 	.priv_auto_alloc_size = sizeof(struct rk8xx_key_priv),
 };
diff --git a/drivers/input/rk_key.c b/drivers/input/rk_key.c
index 44f2b5d4a7..2619a8e3b0 100644
--- a/drivers/input/rk_key.c
+++ b/drivers/input/rk_key.c
@@ -4,145 +4,65 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 
-#include <dm.h>
-#include <adc.h>
 #include <common.h>
-#include <console.h>
 #include <dm.h>
-#include <errno.h>
-#include <fdtdec.h>
-#include <malloc.h>
 #include <key.h>
-#include <linux/input.h>
-#include <errno.h>
-#include <dm/read.h>
-#include <irq-generic.h>
-#include <irq-platform.h>
 
-static void gpio_irq_handler(int irq, void *data)
+static int rk_key_ofdata_to_platdata(struct udevice *dev)
 {
-	struct input_key *key = data;
+	struct dm_key_uclass_platdata *uc_key;
+	u32 chn[2];
 
-	if (key->irq != irq)
-		return;
+	uc_key = dev_get_uclass_platdata(dev);
+	if (!uc_key)
+		return -ENXIO;
 
-	/* up event */
-	if (irq_get_gpio_level(irq)) {
-		key->up_t = key_timer(0);
-		debug("%s: key down: %llu ms\n", key->name, key->down_t);
-	/* down event */
-	} else {
-		key->down_t = key_timer(0);
-		debug("%s: key up: %llu ms\n", key->name, key->up_t);
-	}
-	/* Must delay */
-	mdelay(10);
-	irq_revert_irq_type(irq);
-}
+	uc_key->name = dev_read_string(dev, "label");
+	uc_key->code = dev_read_u32_default(dev, "linux,code", -ENODATA);
 
-static int rk_keys_ofdata_to_platdata(struct udevice *dev)
-{
-	struct input_key *key;
-	u32 adc_channels[2], gpios[2], adcval;
-	int irq, ret;
-	ofnode node;
-
-	/* Get IO channel */
-	if (dev_read_u32_array(dev, "io-channels", adc_channels, 2)) {
-		printf("%s: failed to read 'io-channels'\n", __func__);
+	if (dev_read_u32_array(dev_get_parent(dev), "io-channels", chn, 2)) {
+		printf("%s: read 'io-channels' failed\n", uc_key->name);
 		return -EINVAL;
 	}
 
-	dev_for_each_subnode(node, dev) {
-		key = calloc(1, sizeof(struct input_key));
-		if (!key)
-			return -ENOMEM;
-
-		/* This is an ACD key */
-		if (!ofnode_read_u32(node, "rockchip,adc_value", &adcval)) {
-			key->parent = dev;
-			key->name = ofnode_read_string(node, "label");
-			key->type = ADC_KEY;
-			key->adcval = adcval;
-			key->channel = adc_channels[1];
-			if (ofnode_read_u32(node, "linux,code", &key->code)) {
-				printf("%s: failed to read 'linux,code'\n",
-				       key->name);
-				free(key);
-				continue;
-			}
-			key_add(key);
-		/* This is a GPIO key */
-		} else {
-			key->parent = dev;
-			key->type = GPIO_KEY;
-			key->name = ofnode_read_string(node, "label");
-			ret = ofnode_read_u32(node, "linux,code", &key->code);
-			if (ret) {
-				printf("%s: failed read 'linux,code', ret=%d\n",
-				       key->name, ret);
-				free(key);
-				continue;
-			}
-
-			/* Only register power key as interrupt */
-			if (key->code == KEY_POWER) {
-				ret = ofnode_read_u32_array(node, "gpios",
-							    gpios, 2);
-				if (ret) {
-					printf("%s: failed to read 'gpios', ret=%d\n",
-					       key->name, ret);
-					free(key);
-					continue;
-				}
-
-				/* Request irq */
-				irq = phandle_gpio_to_irq(gpios[0], gpios[1]);
-				if (irq < 0) {
-					printf("%s: failed to request irq, ret=%d\n",
-					       __func__, irq);
-					free(key);
-					continue;
-				}
-				key->irq = irq;
-				key_add(key);
-				irq_install_handler(irq, gpio_irq_handler, key);
-				irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);
-				irq_handler_enable(irq);
-			} else {
-				ret = gpio_request_by_name_nodev(node, "gpios",
-						0, &key->gpio, GPIOD_IS_IN);
-				if (ret) {
-					printf("%s: failed to request gpio, ret=%d\n",
-					       key->name, ret);
-					free(key);
-					continue;
-				}
-				key_add(key);
-			}
+	if (dev_read_bool(dev, "rockchip,adc_value")) {
+		uc_key->type = ADC_KEY;
+		uc_key->channel = chn[1];
+		uc_key->adcval =
+			dev_read_u32_default(dev, "rockchip,adc_value", 0);
+	} else {
+		uc_key->type = GPIO_KEY;
+		if (dev_read_u32_array(dev, "gpios",
+				       uc_key->gpios,
+				       ARRAY_SIZE(uc_key->gpios))) {
+			printf("%s: read 'gpios' failed\n", uc_key->name);
+			return -EINVAL;
 		}
-
-		debug("%s: name=%s: code=%d, adcval=%d, channel=%d, type=%d\n",
-		      __func__, key->name, key->code, key->adcval,
-		      key->channel, key->type);
 	}
 
 	return 0;
 }
 
-static const struct dm_key_ops key_ops = {
-	.name = "rk-keys",
+U_BOOT_DRIVER(rk_key) = {
+	.name     = "rk_key",
+	.id       = UCLASS_KEY,
+	.ofdata_to_platdata = rk_key_ofdata_to_platdata,
 };
 
-static const struct udevice_id rk_keys_ids[] = {
+/* Key Bus */
+static int rk_key_bus_bind(struct udevice *dev)
+{
+	return key_bind_children(dev, "rk_key");
+}
+
+static const struct udevice_id rk_key_bus_match[] = {
 	{ .compatible = "rockchip,key" },
 	{ },
 };
 
-U_BOOT_DRIVER(rk_keys) = {
-	.name   = "rk-keys",
-	.id     = UCLASS_KEY,
-	.ops	= &key_ops,
-	.of_match = rk_keys_ids,
-	.ofdata_to_platdata = rk_keys_ofdata_to_platdata,
+U_BOOT_DRIVER(rk_key_bus) = {
+	.name	   = "rk_key_bus",
+	.id	   = UCLASS_SIMPLE_BUS,
+	.of_match  = rk_key_bus_match,
+	.bind	   = rk_key_bus_bind,
 };
diff --git a/include/key.h b/include/key.h
index f85e1f3164..c9e11bd874 100644
--- a/include/key.h
+++ b/include/key.h
@@ -18,49 +18,43 @@ enum {
 	GPIO_KEY  = 0x2,
 };
 
-enum key_state {
+enum key_event {
 	KEY_PRESS_NONE,	/* press without release */
 	KEY_PRESS_DOWN,	/* press -> release */
 	KEY_PRESS_LONG_DOWN,
 	KEY_NOT_EXIST,
 };
 
-struct input_key {
-	struct udevice *parent;
-	struct list_head link;
+struct dm_key_uclass_platdata {
 	const char *name;
 	bool pre_reloc;
 	u32 code;
 	u8 type;
 
 	/* ADC key */
-	u32 adcval;
-	u32 vref;
 	u8 channel;
+	u32 adcval;
+	u32 min;
+	u32 max;
 
 	/* GPIO key */
 	u32 irq;
+	u32 gpios[2];
 	struct gpio_desc gpio;
 
-	/* Event */
-	u64 up_t;
-	u64 down_t;
-};
-
-struct dm_key_ops {
-	const char *name;
+	u64 rise_ms;
+	u64 fall_ms;
 };
 
 /* Use it instead of get_timer() in key interrupt handler */
 uint64_t key_timer(uint64_t base);
 
-/* Reister you key to dm key framework */
-void key_add(struct input_key *key);
-
 /* Confirm if your key value is a press event */
 int key_is_pressed(int keyval);
 
 /* Read key */
 int key_read(int code);
 
+int key_bind_children(struct udevice *dev, const char *drv_name);
+
 #endif

commit a0ceee92279dd8ae8d6561b24ca83eb310975159
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 2 13:13:31 2019 +0800

    rockchip: support early load dtb from distro images
    
    It is optional to use dtb from distro images to initialize
    periph drivers when kernel dtb function is enabled.
    
    Change-Id: I7119962ba61d84c5ccdf2e515e21bb347e50b91b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 880171f022..040a117dec 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -559,6 +559,22 @@ config ROCKCHIP_RESOURCE_IMAGE
 	  This enables support to get dtb or logo files from
 	  rockchip resource image format partition.
 
+config ROCKCHIP_EARLY_DISTRO_DTB
+	bool "Enable support for distro dtb early"
+	depends on DISTRO_DEFAULTS && USING_KERNEL_DTB
+	default n
+	help
+	  This enables loading dtb from distro bootable partition when there
+	  is no valid dtb in android boot.img and rockchip resource.img.
+
+if ROCKCHIP_EARLY_DISTRO_DTB
+
+config ROCKCHIP_EARLY_DISTRO_DTB_PATH
+	string "/rk-kernel.dtb"
+	help
+	  "DTB file path in the bootable partition image"
+endif
+
 config ROCKCHIP_VENDOR_PARTITION
 	bool "Rockchip vendor storage partition support"
 	depends on RKIMG_BOOTLOADER
diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index d2742fbad7..50598d89fd 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <adc.h>
 #include <asm/io.h>
+#include <fs.h>
 #include <malloc.h>
 #include <sysmem.h>
 #include <linux/list.h>
@@ -628,17 +629,72 @@ static int rockchip_read_dtb_by_gpio(const char *file_name)
 	return found ? 0 : -ENOENT;
 }
 
+#ifdef CONFIG_ROCKCHIP_EARLY_DISTRO_DTB
+static int rockchip_read_distro_dtb_file(char *fdt_addr)
+{
+	const char *cmd = "part list ${devtype} ${devnum} -bootable devplist";
+	char *devnum, *devtype, *devplist;
+	char devnum_part[12];
+	char fdt_hex_str[19];
+	char *fs_argv[5];
+	int ret;
+
+	if (!rockchip_get_bootdev() || !fdt_addr)
+		return -ENODEV;
+
+	ret = run_command_list(cmd, -1, 0);
+	if (ret)
+		return ret;
+
+	devplist = env_get("devplist");
+	if (!devplist)
+		return -ENODEV;
+
+	devtype = env_get("devtype");
+	devnum = env_get("devnum");
+	sprintf(devnum_part, "%s:%s", devnum, devplist);
+	sprintf(fdt_hex_str, "0x%lx", (ulong)fdt_addr);
+
+#ifdef CONFIG_CMD_FS_GENERIC
+	fs_argv[0] = "load";
+	fs_argv[1] = devtype,
+	fs_argv[2] = devnum_part;
+	fs_argv[3] = fdt_hex_str;
+	fs_argv[4] = CONFIG_ROCKCHIP_EARLY_DISTRO_DTB_PATH;
+
+	if (do_load(NULL, 0, 5, fs_argv, FS_TYPE_ANY))
+		return -EIO;
+#endif
+	if (fdt_check_header(fdt_addr))
+		return -EIO;
+
+	return fdt_totalsize(fdt_addr);
+}
+#endif
+
 int rockchip_read_dtb_file(void *fdt_addr)
 {
 	struct resource_file *file;
 	struct list_head *node;
 	char *dtb_name = DTB_FILE;
-	int ret, size;
+	int size = -ENODEV;
 
 	if (list_empty(&entrys_head)) {
-		ret = init_resource_list(NULL);
-		if (ret)
-			return ret;
+		if (init_resource_list(NULL)) {
+#ifdef CONFIG_ROCKCHIP_EARLY_DISTRO_DTB
+			/* Maybe a distro boot.img with dtb ? */
+			printf("Distro DTB: %s\n",
+			       CONFIG_ROCKCHIP_EARLY_DISTRO_DTB_PATH);
+			size = rockchip_read_distro_dtb_file(fdt_addr);
+			if (size < 0)
+				return size;
+			if (!sysmem_alloc_base(MEMBLK_ID_FDT,
+				(phys_addr_t)fdt_addr,
+				ALIGN(size, RK_BLK_SIZE) + CONFIG_SYS_FDT_PAD))
+				return -ENOMEM;
+#endif
+			return size;
+		}
 	}
 
 	list_for_each(node, &entrys_head) {
@@ -668,13 +724,13 @@ int rockchip_read_dtb_file(void *fdt_addr)
 			       ALIGN(size, RK_BLK_SIZE) + CONFIG_SYS_FDT_PAD))
 		return -ENOMEM;
 
-	ret = rockchip_read_resource_file((void *)fdt_addr, dtb_name, 0, 0);
-	if (ret < 0)
-		return ret;
+	size = rockchip_read_resource_file((void *)fdt_addr, dtb_name, 0, 0);
+	if (size < 0)
+		return size;
 
 #if defined(CONFIG_CMD_DTIMG) && defined(CONFIG_OF_LIBFDT_OVERLAY)
 	android_fdt_overlay_apply((void *)fdt_addr);
 #endif
 
-	return ret;
+	return size;
 }

commit 4388deca723e78cda09c928f33f3a4d299e414c9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Mar 21 18:22:13 2019 +0800

    dm: add amp uclass and rockchip amp driver support
    
    - add amp uclass;
    - add a simple rockchip amp driver.
    
    An example for amps dts node configure:
    amps {
            compatible = "uboot,rockchip-amp";
            status = "okay";
    
            amp@0 {
                    description  = "mcu-os1";
                    partition    = "mcu1";
                    cpu          = <0x1>; // this is mpidr!
                    load         = <0x800000>;
                    entry        = <0x800000>;
                    memory       = <0x800000 0x400000>;
            };
    
            amp@1 {
                    ......
            };
    
            ......
    };
    
    U-Boot loads "mcu-os1" firmware to "0x800000" address from partiton
    "mcu1" for cpu[1], the cpu[1] entry address is 0x800000. And
    U-Boot reserve memory from 0x800000 with 0x400000 size in order
    to make it invisible for kernel.
    
    Please use rockchip tool "mkkrnlimg" to pack firmware binary, example:
    ./scripts/mkkrnlimg mcu-os1.bin mcu-os1.img
    
    Change-Id: I127d5d9f460ec0c1812a76fb4c3702e82f21c9a6
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/Makefile b/Makefile
index efedc288d4..dc812e2d97 100644
--- a/Makefile
+++ b/Makefile
@@ -654,6 +654,7 @@ libs-y += fs/
 libs-y += net/
 libs-y += disk/
 libs-y += drivers/
+libs-y += drivers/cpu/
 libs-y += drivers/dma/
 libs-y += drivers/gpio/
 libs-y += drivers/i2c/
diff --git a/drivers/cpu/Kconfig b/drivers/cpu/Kconfig
index 0d1424d38e..6dfced4f4f 100644
--- a/drivers/cpu/Kconfig
+++ b/drivers/cpu/Kconfig
@@ -6,3 +6,15 @@ config CPU
 	  multiple CPUs, then normally have to be set up in U-Boot so that
 	  they can work correctly in the OS. This provides a framework for
 	  finding out information about available CPUs and making changes.
+
+config AMP
+	bool "Enable AMP drivers using Driver Model"
+	help
+	  This support Asymmetric Multi-Processing, cpus can run on different
+	  firmware.
+
+config ROCKCHIP_AMP
+	bool "Enable Rockchip AMP driver"
+	depends on AMP && ROCKCHIP_SMCCC && RKIMG_BOOTLOADER
+	help
+	  This enable Rockchip AMP driver support.
diff --git a/drivers/cpu/Makefile b/drivers/cpu/Makefile
index db515f6f17..d50912ffe5 100644
--- a/drivers/cpu/Makefile
+++ b/drivers/cpu/Makefile
@@ -5,5 +5,7 @@
 # SPDX-License-Identifier:      GPL-2.0+
 #
 obj-$(CONFIG_CPU) += cpu-uclass.o
+obj-$(CONFIG_AMP) += amp-uclass.o
 
 obj-$(CONFIG_ARCH_BMIPS) += bmips_cpu.o
+obj-$(CONFIG_ROCKCHIP_AMP) += rockchip_amp.o
diff --git a/drivers/cpu/amp-uclass.c b/drivers/cpu/amp-uclass.c
new file mode 100644
index 0000000000..7d52722a2d
--- /dev/null
+++ b/drivers/cpu/amp-uclass.c
@@ -0,0 +1,162 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <amp.h>
+#include <dm.h>
+#include <dm/lists.h>
+
+int amp_cpu_on(u32 cpu)
+{
+	struct dm_amp_uclass_platdata *uc_pdata;
+	const struct dm_amp_ops *ops;
+	struct udevice *dev;
+	struct uclass *uc;
+	int ret;
+
+	ret = uclass_get(UCLASS_AMP, &uc);
+	if (ret)
+		return ret;
+
+	for (uclass_first_device(UCLASS_AMP, &dev);
+	     dev;
+	     uclass_next_device(&dev)) {
+		uc_pdata = dev_get_uclass_platdata(dev);
+		if (!uc_pdata || uc_pdata->cpu != cpu)
+			continue;
+
+		ops = dev_get_driver_ops(dev);
+		if (!ops || !ops->cpu_on)
+			return -ENOSYS;
+
+		return ops->cpu_on(dev);
+	}
+
+	return -ENODEV;
+}
+
+int amp_cpus_on(void)
+{
+	const struct dm_amp_ops *ops;
+	struct udevice *dev;
+	struct uclass *uc;
+	int ret;
+
+	ret = uclass_get(UCLASS_AMP, &uc);
+	if (ret)
+		return ret;
+
+	for (uclass_first_device(UCLASS_AMP, &dev);
+	     dev;
+	     uclass_next_device(&dev)) {
+		ops = dev_get_driver_ops(dev);
+		if (!ops || !ops->cpu_on)
+			continue;
+		ret = ops->cpu_on(dev);
+	}
+
+	return ret;
+}
+
+int amp_bind_children(struct udevice *dev, const char *drv_name)
+{
+	const char *name;
+	ofnode node;
+	int ret;
+
+	dev_for_each_subnode(node, dev) {
+		/*
+		 * If this node has "compatible" property, this is not
+		 * a amp subnode, but a normal device. skip.
+		 */
+		ofnode_get_property(node, "compatible", &ret);
+		if (ret >= 0)
+			continue;
+
+		if (ret != -FDT_ERR_NOTFOUND)
+			return ret;
+
+		name = ofnode_get_name(node);
+		if (!name)
+			return -EINVAL;
+		ret = device_bind_driver_to_node(dev, drv_name, name,
+						 node, NULL);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+static int amp_pre_probe(struct udevice *dev)
+{
+	struct dm_amp_uclass_platdata *uc_pdata;
+
+	uc_pdata = dev_get_uclass_platdata(dev);
+	if (!uc_pdata)
+		return -ENXIO;
+
+	uc_pdata->desc = dev_read_string(dev, "description");
+	uc_pdata->partition = dev_read_string(dev, "partition");
+	uc_pdata->cpu = dev_read_u32_default(dev, "cpu", -ENODATA);
+#ifdef CONFIG_ARM64
+	uc_pdata->aarch = dev_read_u32_default(dev, "aarch", 64);
+#else
+	uc_pdata->aarch = dev_read_u32_default(dev, "aarch", 32);
+#endif
+	uc_pdata->load = dev_read_u32_default(dev, "load", -ENODATA);
+	uc_pdata->entry = dev_read_u32_default(dev, "entry", -ENODATA);
+
+	dev_read_u32_array(dev, "memory",
+			   uc_pdata->reserved_mem,
+			   ARRAY_SIZE(uc_pdata->reserved_mem));
+
+	if (!uc_pdata->desc || !uc_pdata->partition ||
+	    uc_pdata->cpu == -ENODATA || uc_pdata->load == -ENODATA ||
+	    uc_pdata->entry == -ENODATA || !uc_pdata->reserved_mem[0] ||
+	    !uc_pdata->reserved_mem[1] ||
+	    (uc_pdata->aarch != 64 && uc_pdata->aarch != 32)) {
+		printf("AMP: \"%s\" is not complete\n", dev->name);
+		return -EINVAL;
+	}
+
+#ifdef DEBUG
+	printf("[%s]:\n", dev_read_name(dev));
+	printf("    descrption: %s\n", uc_pdata->desc);
+	printf("     partition: %s\n", uc_pdata->partition);
+	printf("           cpu: 0x%x\n", uc_pdata->cpu);
+	printf("         aarch: %d\n", uc_pdata->aarch);
+	printf("          load: 0x%08x\n", uc_pdata->load);
+	printf("         entry: 0x%08x\n", uc_pdata->entry);
+	printf("  reserved_mem: 0x%08x - 0x%08x\n\n",
+	       uc_pdata->reserved_mem[0],
+	       uc_pdata->reserved_mem[0] + uc_pdata->reserved_mem[1]);
+#endif
+
+	return 0;
+}
+
+UCLASS_DRIVER(amp) = {
+	.id		= UCLASS_AMP,
+	.name		= "amp",
+	.pre_probe	= amp_pre_probe,
+	.per_device_platdata_auto_alloc_size =
+			sizeof(struct dm_amp_uclass_platdata),
+};
+
+#ifdef DEBUG
+static int do_amp_cpus_on(cmd_tbl_t *cmdtp, int flag,
+			  int argc, char *const argv[])
+{
+	amp_cpus_on();
+	return 0;
+}
+
+U_BOOT_CMD(
+	amp_cpus_on, 1, 1, do_amp_cpus_on,
+	"Brought up all amp cpus",
+	""
+);
+#endif
diff --git a/drivers/cpu/rockchip_amp.c b/drivers/cpu/rockchip_amp.c
new file mode 100644
index 0000000000..9408c8c1b6
--- /dev/null
+++ b/drivers/cpu/rockchip_amp.c
@@ -0,0 +1,130 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+#include <common.h>
+#include <amp.h>
+#include <boot_rkimg.h>
+#include <bidram.h>
+#include <dm.h>
+#include <sysmem.h>
+#include <asm/arch/rockchip_smccc.h>
+
+#define AMP_I(fmt, args...)	printf("AMP: "fmt, ##args)
+#define AMP_E(fmt, args...)	printf("AMP Error: "fmt, ##args)
+
+/*
+ * An example for amps dts node configure:
+ *
+ * amps {
+ *	compatible = "uboot,rockchip-amp";
+ *	status = "okay";
+ *
+ *	amp@0 {
+ *		description  = "mcu-os1";
+ *		partition    = "mcu1";
+ *		cpu          = <0x1>;		// this is mpidr!
+ *		load         = <0x800000>;
+ *		entry        = <0x800000>;
+ *		memory       = <0x800000 0x400000>;
+ *	};
+ *
+ *	amp@1 {
+ *		......
+ *	};
+ *
+ *	......
+ * };
+ *
+ * U-Boot loads "mcu-os1" firmware to "0x800000" address from partiton
+ * "mcu1" for cpu[1], the cpu[1] entry address is 0x800000. And
+ * U-Boot reserve memory from 0x800000 with 0x400000 size in order
+ * to make it invisible for kernel.
+ *
+ * Please use rockchip tool "mkkrnlimg" to pack firmware binary, example:
+ * ./scripts/mkkrnlimg mcu-os1.bin mcu-os1.img
+ */
+
+static int rockchip_amp_cpu_on(struct udevice *dev)
+{
+	struct dm_amp_uclass_platdata *uc_pdata;
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+	int ret, size;
+
+	uc_pdata = dev_get_uclass_platdata(dev);
+	if (!uc_pdata)
+		return -ENXIO;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc)
+		return -EEXIST;
+
+	ret = part_get_info_by_name(dev_desc, uc_pdata->partition, &part_info);
+	if (ret < 0) {
+		AMP_E("\"%s\" find partition \"%s\" failed\n",
+		      uc_pdata->desc, uc_pdata->partition);
+		return ret;
+	}
+
+	ret = bidram_reserve_by_name(uc_pdata->partition,
+				     uc_pdata->reserved_mem[0],
+				     uc_pdata->reserved_mem[1]);
+	if (ret) {
+		AMP_E("Reserve \"%s\" region at 0x%08x - 0x%08x failed, ret=%d\n",
+		      uc_pdata->desc, uc_pdata->reserved_mem[0],
+		      uc_pdata->reserved_mem[0] + uc_pdata->reserved_mem[1], ret);
+		return -ENOMEM;
+	}
+
+	size = read_rockchip_image(dev_desc, &part_info,
+				   (void *)(ulong)uc_pdata->load);
+	if (size < 0) {
+		AMP_E("\"%s\" load at 0x%08x failed\n",
+		      uc_pdata->desc, uc_pdata->load);
+		return size;
+	}
+
+	flush_dcache_range(uc_pdata->load,
+			   uc_pdata->load + ALIGN(size, ARCH_DMA_MINALIGN));
+
+	AMP_I("Brought up cpu[%x] on \"%s\" entry 0x%08x ...",
+	      uc_pdata->cpu, uc_pdata->desc, uc_pdata->entry);
+
+	ret = psci_cpu_on(uc_pdata->cpu, uc_pdata->entry);
+	if (ret) {
+		printf("failed\n");
+		return ret;
+	}
+	printf("OK\n");
+
+	return 0;
+}
+
+static const struct dm_amp_ops rockchip_amp_ops = {
+	.cpu_on = rockchip_amp_cpu_on,
+};
+
+U_BOOT_DRIVER(rockchip_amp) = {
+	.name	   = "rockchip_amp",
+	.id	   = UCLASS_AMP,
+	.ops	   = &rockchip_amp_ops,
+};
+
+/* AMP bus driver as all amp parent */
+static int rockchip_amp_bus_bind(struct udevice *dev)
+{
+	return amp_bind_children(dev, "rockchip_amp");
+}
+
+static const struct udevice_id rockchip_amp_bus_match[] = {
+	{ .compatible = "uboot,rockchip-amp", },
+	{},
+};
+
+U_BOOT_DRIVER(rockchip_amp_bus) = {
+	.name	   = "rockchip_amp_bus",
+	.id	   = UCLASS_SIMPLE_BUS,
+	.of_match  = rockchip_amp_bus_match,
+	.bind	   = rockchip_amp_bus_bind,
+};
diff --git a/include/amp.h b/include/amp.h
new file mode 100644
index 0000000000..629dcdcd04
--- /dev/null
+++ b/include/amp.h
@@ -0,0 +1,29 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _AMP_H_
+#define _AMP_H_
+
+#include <dm.h>
+
+struct dm_amp_ops {
+	int (*cpu_on)(struct udevice *dev);
+};
+
+struct dm_amp_uclass_platdata {
+	const char *desc;
+	const char *partition;
+	u32 cpu;		/* cpu mpidr */
+	u32 aarch;
+	u32 load;
+	u32 entry;
+	u32 reserved_mem[2];	/* [0]: start, [1]: size */
+};
+
+int amp_bind_children(struct udevice *dev, const char *drv_name);
+int amp_cpus_on(void);
+int amp_cpu_on(u32 cpu);
+
+#endif	/* _AMP_H_ */
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 70910f319e..b51b9873f2 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -31,6 +31,7 @@ enum uclass_id {
 	UCLASS_BLK,		/* Block device */
 	UCLASS_CLK,		/* Clock source, e.g. used by peripherals */
 	UCLASS_CPU,		/* CPU, typically part of an SoC */
+	UCLASS_AMP,		/* Asymmetric Multi-Processing */
 	UCLASS_CODEC,		/* audio codec */
 	UCLASS_CROS_EC,		/* Chrome OS EC */
 	UCLASS_DISPLAY,		/* Display (e.g. DisplayPort, HDMI) */

commit 5ae28c899a83ad1e62e928d6e833cb3f8916e13e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Apr 3 18:12:42 2019 +0800

    rockchip: dts: rk3229-evb: support recovery GPIO key
    
    RK3229 hardware design reference is GPIO3_D1.
    
    Change-Id: I49807081212c77a84d38200a87449eb91dc5a7d3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3229-evb.dts b/arch/arm/dts/rk3229-evb.dts
index 376d1e7d22..5b4c97befc 100644
--- a/arch/arm/dts/rk3229-evb.dts
+++ b/arch/arm/dts/rk3229-evb.dts
@@ -34,6 +34,19 @@
 		regulator-always-on;
 		regulator-boot-on;
 	};
+
+	gpio-keys {
+		u-boot,dm-pre-reloc;
+		compatible = "gpio-keys";
+		status = "okay";
+
+		volume-up {
+			u-boot,dm-pre-reloc;
+			linux,code = <KEY_VOLUMEUP>;
+			label = "Volume Up";
+			gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
+		};
+	};
 };
 
 &dmc {
diff --git a/arch/arm/dts/rk322x-u-boot.dtsi b/arch/arm/dts/rk322x-u-boot.dtsi
index 7034b344e1..3d73382141 100644
--- a/arch/arm/dts/rk322x-u-boot.dtsi
+++ b/arch/arm/dts/rk322x-u-boot.dtsi
@@ -62,6 +62,16 @@
 	status = "okay";
 };
 
+&pinctrl {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 &gpio1 {
 	u-boot,dm-pre-reloc;
 };
+
+&gpio3 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};

commit de573281d825ca91bfe0573343051bfb169d90e9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Apr 3 17:40:42 2019 +0800

    rockchip: dts: rk3399-evb: rename key node
    
    Use different name for the volume up key node, dm framework
    can't support the same device node since kernel dtb is enabled.
    
    Change-Id: Ia99c9b8fd46fea63949f9d06072c0ebec0e76a46
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts
index bbc1c0f4a1..e8e240898c 100644
--- a/arch/arm/dts/rk3399-evb.dts
+++ b/arch/arm/dts/rk3399-evb.dts
@@ -25,7 +25,7 @@
 		status = "okay";
 		io-channels = <&saradc 1>;
 
-		vol-up-key {
+		vol-up-key0 {
 			u-boot,dm-pre-reloc;
 			linux,code = <KEY_VOLUMEUP>;
 			label = "volume up";
@@ -40,7 +40,7 @@
 		status = "okay";
 		io-channels = <&saradc 2>;
 
-		vol-up-key {
+		vol-up-key1 {
 			u-boot,dm-pre-reloc;
 			linux,code = <KEY_VOLUMEUP>;
 			label = "volume up";

commit 04e429a4cdf5db388fc52eb015456b444856383e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Mar 29 18:19:11 2019 +0800

    scripts: add mkkrnlimg tool to pack rockchip format image
    
    sync from kernel develop-4.4:
    (3091608 arm64: dts: rockchip: fixup vccio3-supply for ai-va-v10)
    
    Change-Id: I4c67dfc617c99791d2706e2b260a79fd3419b29d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/scripts/mkkrnlimg b/scripts/mkkrnlimg
new file mode 100755
index 0000000000..f8601d3ee0
Binary files /dev/null and b/scripts/mkkrnlimg differ

commit 9ac41981038a7853d10517340630d830b07f0503
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Apr 3 17:15:05 2019 +0800

    rockchip: rk3328: add boot order in chosen
    
    Default boot from sdcard may fail in evb without sd.
    
    Change-Id: Ifde49b6b28e7154a14f5e028d9863446f11cb59c
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi
index 7a07362a95..dc5dc68bf5 100644
--- a/arch/arm/dts/rk3328-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-u-boot.dtsi
@@ -11,6 +11,7 @@
 	};
 
 	chosen {
+		u-boot,spl-boot-order = &sdmmc, &emmc;
 		stdout-path = &uart2;
 	};
 

commit 9560dcb992fdee783bebd208bb8e140a78d47bc2
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Mar 29 20:35:08 2019 +0800

    rockchip: rk3368: fix uart2 iomux
    
    RK3368 uart2 iomux config is not correct, fix it.
    
    Change-Id: I992c4b0ae9d8c0a91c5ee1fb3e7850a1e94db206
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3368/rk3368.c b/arch/arm/mach-rockchip/rk3368/rk3368.c
index 5fe2f3f19f..46e63c9d7f 100644
--- a/arch/arm/mach-rockchip/rk3368/rk3368.c
+++ b/arch/arm/mach-rockchip/rk3368/rk3368.c
@@ -242,10 +242,12 @@ void board_debug_uart_init(void)
 		GPIO2A6_MASK		= GENMASK(13, 12),
 		GPIO2A6_GPIO		= 0,
 		GPIO2A6_UART0_SIN      = (1 << 13),
+		GPIO2A6_UART2_SIN	= (2 << 12),
 
 		GPIO2A5_MASK		= GENMASK(11, 10),
 		GPIO2A5_GPIO		= 0,
 		GPIO2A5_UART0_SOUT	 = (1 << 11),
+		GPIO2A5_UART2_SOUT      = (2 << 10),
 	};
 
 #if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000)
@@ -276,9 +278,9 @@ void board_debug_uart_init(void)
 #elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff690000)
 	/* Enable early UART2 on the RK3368 */
 	rk_clrsetreg(&grf->gpio2a_iomux,
-		     GPIO2A6_MASK, GPIO2A6_UART0_SIN);
+		     GPIO2A6_MASK, GPIO2A6_UART2_SIN);
 	rk_clrsetreg(&grf->gpio2a_iomux,
-		     GPIO2A5_MASK, GPIO2A5_UART0_SOUT);
+		     GPIO2A5_MASK, GPIO2A5_UART2_SOUT);
 #endif
 }
 

commit 305d8903e0837a7762424ebd11848394c864e1ac
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Mar 28 15:31:47 2019 +0800

    lib: sysmem: improve kernel reserved-memory alloc
    
    - If the region is out of avaiable dram bank, return success;
    - region can override allocated memblk with attr M_ATTR_OVERLAP;
    
    Change-Id: I02171cdb51462e9cec3dd955ae3e0aaaa0ee7afd
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/lib/sysmem.c b/lib/sysmem.c
index 8b08644a74..952a5e1894 100644
--- a/lib/sysmem.c
+++ b/lib/sysmem.c
@@ -194,7 +194,10 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 	phys_addr_t paddr;
 	phys_addr_t alloc_base;
 	phys_size_t alloc_size;
-	bool req_overlap = false;
+	phys_addr_t bank_base;
+	phys_size_t bank_size;
+	bool req_overlap = false; /* Only for kernel reserved-memory */
+	int i;
 
 	if (!sysmem_has_init())
 		return NULL;
@@ -204,8 +207,20 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 			SYSMEM_E("NULL name for alloc sysmem\n");
 			return NULL;
 		} else if (id == MEMBLK_ID_FDT_RESV) {
-			req_overlap = true;
-			if (base >= gd->ram_top)
+			for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+				if (!gd->bd->bi_dram[i].size)
+					continue;
+
+				bank_base = gd->bd->bi_dram[i].start;
+				bank_size = gd->bd->bi_dram[i].size;
+				if (sysmem_is_overlap(base, size,
+						      bank_base, bank_size)) {
+					req_overlap = true;
+					break;
+				}
+			}
+
+			if (!req_overlap)
 				return (void *)base;
 		}
 		name = sysmem_alias2name(mem_name, (int *)&id);

commit ba76dc003ef1ce07b28460639347507719df7946
Author: Shengfei Xu <xsf@rock-chips.com>
Date:   Wed Feb 13 09:49:38 2019 +0800

    power: pmic: rk8xx: enable under-voltage protection to rk817/rk809
    
    The under-voltage protection will shutdown the LDO3 and reset the PMIC.
    
    Change-Id: Ic84c7ad1a2eed8c1f983e761988ffb903fc878af
    Signed-off-by: Shengfei Xu <xsf@rock-chips.com>

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index 02ea363e1a..1e5f45bfc0 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -13,17 +13,21 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+static struct reg_data rk817_init_reg[] = {
+/* enable the under-voltage protection,
+ * the under-voltage protection will shutdown the LDO3 and reset the PMIC
+ */
+	{ RK817_BUCK4_CMIN, 0x60, 0x60},
 /*
  * Only when system suspend while U-Boot charge needs this config support
  */
 #ifdef CONFIG_DM_CHARGE_DISPLAY
-static struct reg_data rk817_init_reg[] = {
 	/* Set pmic_sleep as sleep function */
 	{ RK817_PMIC_SYS_CFG3, 0x08, 0x18 },
 	/* Set pmic_int active low */
 	{ RK817_GPIO_INT_CFG,  0x00, 0x02 },
-};
 #endif
+};
 
 static const struct pmic_child_info pmic_children_info[] = {
 	{ .prefix = "DCDC", .driver = "rk8xx_buck"},
@@ -213,10 +217,8 @@ static int rk8xx_probe(struct udevice *dev)
 	case RK817_ID:
 		on_source = RK817_ON_SOURCE;
 		off_source = RK817_OFF_SOURCE;
-#ifdef CONFIG_DM_CHARGE_DISPLAY
 		init_data = rk817_init_reg;
 		init_data_num = ARRAY_SIZE(rk817_init_reg);
-#endif
 		power_en0 = pmic_reg_read(dev, RK817_POWER_EN0);
 		power_en1 = pmic_reg_read(dev, RK817_POWER_EN1);
 		power_en2 = pmic_reg_read(dev, RK817_POWER_EN2);
diff --git a/include/power/rk8xx_pmic.h b/include/power/rk8xx_pmic.h
index daeebb9665..80bf923732 100644
--- a/include/power/rk8xx_pmic.h
+++ b/include/power/rk8xx_pmic.h
@@ -211,6 +211,7 @@ enum {
 
 #define RK8XX_ON_SOURCE		0xae
 #define RK8XX_OFF_SOURCE	0xaf
+#define RK817_BUCK4_CMIN	0xc6
 #define RK817_ON_SOURCE		0xf5
 #define RK817_OFF_SOURCE	0xf6
 

commit 204f7c3926e3cc28fb4211b08735ab9131bf1748
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Mar 29 09:46:12 2019 +0800

    mmc: dw_mmc: fix sd card power enable errror
    
    The sd card power is enabled when PWREN is set low by rockchip hardware design.
    
    Change-Id: I4fb54235bd5235030146f77be1e07dc4e729ae06
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 81981c7911..f8347f0c52 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -584,8 +584,16 @@ static int dwmci_init(struct mmc *mmc)
 
 	if (host->board_init)
 		host->board_init(host);
-
+#ifdef CONFIG_ARCH_ROCKCHIP
+	if (host->dev_index == 0)
+		dwmci_writel(host, DWMCI_PWREN, 1);
+	else if (host->dev_index == 1)
+		dwmci_writel(host, DWMCI_PWREN, 0);
+	else
+		dwmci_writel(host, DWMCI_PWREN, 1);
+#else
 	dwmci_writel(host, DWMCI_PWREN, 1);
+#endif
 
 	if (!dwmci_wait_reset(host, DWMCI_RESET_ALL)) {
 		debug("%s[%d] Fail-reset!!\n", __func__, __LINE__);

commit ca13d12f664966c897e8ef0aab47bd2140c5b9c7
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Fri Mar 15 17:12:19 2019 +0800

    drivers: mtd: nand: add rockchip nandc v9 drivers
    
    Change-Id: I7019f309528d41710c5af6857a4d4f54037dd595
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index b43d86d050..f3372d65f7 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -79,9 +79,17 @@ config NAND_PXA3XX
 config NAND_ROCKCHIP
 	bool "Support for NAND on Rockchip SoCs"
 	select SYS_NAND_SELF_INIT
+	default n
 	---help---
 	Enable support for Rockchip nand.
 
+config NAND_ROCKCHIP_V9
+	bool "Support for NAND V9 on Rockchip SoCs"
+	select SYS_NAND_SELF_INIT
+	default n
+	---help---
+	Enable support for Rockchip nand v9.
+
 config NAND_SUNXI
 	bool "Support for NAND on Allwinner SoCs"
 	depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 6067b89837..de8675d227 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -70,7 +70,7 @@ obj-$(CONFIG_NAND_PLAT) += nand_plat.o
 obj-$(CONFIG_NAND_SUNXI) += sunxi_nand.o
 obj-$(CONFIG_NAND_ZYNQ) += zynq_nand.o
 obj-$(CONFIG_NAND_ROCKCHIP) += rockchip_nand.o
-
+obj-$(CONFIG_NAND_ROCKCHIP_V9) += rockchip_nand_v9.o
 else  # minimal SPL drivers
 
 obj-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_spl.o
diff --git a/drivers/mtd/nand/rockchip_nand_v9.c b/drivers/mtd/nand/rockchip_nand_v9.c
new file mode 100644
index 0000000000..b2ff609d33
--- /dev/null
+++ b/drivers/mtd/nand/rockchip_nand_v9.c
@@ -0,0 +1,691 @@
+/*
+ * Copyright (c) 2017 Yifeng Zhao <yifeng.zhao@rock-chips.com>
+ * Copyright (c) 2017 Paweł Jarosz <paweljarosz3691@gmail.com>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <fdtdec.h>
+#include <inttypes.h>
+#include <nand.h>
+#include <linux/kernel.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/partitions.h>
+#include <linux/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define NANDC_V9_BOOTROM_ECC	70
+#define NANDC_V9_NUM_BANKS	4
+#define NANDC_V9_DEF_TIMEOUT	20000
+#define NANDC_V9_READ		0
+#define NANDC_V9_WRITE		1
+#define NANDC_REG_V9_FMCTL	0x00
+#define NANDC_REG_V9_FMWAIT	0x04
+#define NANDC_REG_V9_FLCTL	0x10
+#define NANDC_REG_V9_BCHCTL	0x20
+#define NANDC_REG_V9_DMA_CFG	0x30
+#define NANDC_REG_V9_DMA_BUF0	0x34
+#define NANDC_REG_V9_DMA_BUF1	0x38
+#define NANDC_REG_V9_DMA_ST	0x40
+#define NANDC_REG_V9_VER	0x80
+#define NANDC_REG_V9_INTEN	0x120
+#define NANDC_REG_V9_INTCLR	0x124
+#define NANDC_REG_V9_INTST	0x128
+#define NANDC_REG_V9_BCHST	0x150
+#define NANDC_REG_V9_SPARE0	0x200
+#define NANDC_REG_V9_SPARE1	0x204
+#define NANDC_REG_V9_RANDMZ	0x208
+#define NANDC_REG_V9_BANK0	0x800
+#define NANDC_REG_V9_SRAM0	0x1000
+#define NANDC_REG_V9_SRAM_SIZE	0x400
+
+#define NANDC_REG_V9_DATA	0x00
+#define NANDC_REG_V9_ADDR	0x04
+#define NANDC_REG_V9_CMD	0x08
+
+/* FMCTL */
+#define NANDC_V9_FM_WP		BIT(8)
+#define NANDC_V9_FM_CE_SEL_M	0xFF
+#define NANDC_V9_FM_CE_SEL(x)	(1 << (x))
+#define NANDC_V9_FM_FREADY	BIT(9)
+
+/* FLCTL */
+#define NANDC_V9_FL_RST		BIT(0)
+#define NANDC_V9_FL_DIR_S	0x1
+#define NANDC_V9_FL_XFER_START	BIT(2)
+#define NANDC_V9_FL_XFER_EN	BIT(3)
+#define NANDC_V9_FL_ST_BUF_S	0x4
+#define NANDC_V9_FL_XFER_COUNT	BIT(5)
+#define NANDC_V9_FL_ACORRECT	BIT(10)
+#define NANDC_V9_FL_XFER_READY	BIT(20)
+
+/* BCHCTL */
+#define NAND_V9_BCH_MODE_S	25
+#define NAND_V9_BCH_MODE_M	0x7
+
+/* BCHST */
+#define NANDC_V9_BCH0_ST_ERR	BIT(2)
+#define NANDC_V9_BCH1_ST_ERR	BIT(18)
+#define NANDC_V9_ECC_ERR_CNT0(x) (((x) & (0x7F << 3)) >> 3)
+#define NANDC_V9_ECC_ERR_CNT1(x) (((x) & (0x7F << 19)) >> 19)
+
+struct rk_nand {
+	uint32_t banks[NANDC_V9_NUM_BANKS];
+	struct nand_hw_control controller;
+	uint32_t ecc_strength;
+	uint32_t max_ecc_strength;
+	struct mtd_info mtd;
+	bool bootromblocks;
+	void __iomem *regs;
+	int selected_bank;
+};
+
+static struct nand_ecclayout nand_oob_fix = {
+	.eccbytes = 24,
+	.eccpos = {
+		4, 5, 6, 7, 8, 9, 10
+        },
+	.oobfree = {
+		{
+			.offset = 0,
+			.length = 4
+                }
+        }
+};
+
+static inline struct rk_nand *to_rknand(struct nand_hw_control *ctrl)
+{
+	return container_of(ctrl, struct rk_nand, controller);
+}
+
+static void rockchip_nand_init(struct rk_nand *rknand)
+{
+	writel(0, rknand->regs + NANDC_REG_V9_RANDMZ);
+	writel(0, rknand->regs + NANDC_REG_V9_DMA_CFG);
+	writel(0, rknand->regs + NANDC_REG_V9_BCHCTL);
+	writel(NANDC_V9_FM_WP, rknand->regs + NANDC_REG_V9_FMCTL);
+	writel(0x1081, rknand->regs + NANDC_REG_V9_FMWAIT);
+}
+
+static void rockchip_nand_select_chip(struct mtd_info *mtd, int chipnr)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct rk_nand *rknand = to_rknand(chip->controller);
+	void __iomem *bank_base;
+	uint32_t reg;
+	int banknr;
+
+	reg = readl(rknand->regs + NANDC_REG_V9_FMCTL);
+	reg &= ~NANDC_V9_FM_CE_SEL_M;
+
+	if (chipnr == -1) {
+		banknr = -1;
+	} else {
+		banknr = rknand->banks[chipnr];
+		bank_base = rknand->regs + NANDC_REG_V9_BANK0 + banknr * 0x100;
+
+		chip->IO_ADDR_R = bank_base;
+		chip->IO_ADDR_W = bank_base;
+
+		reg |= 1 << banknr;
+	}
+	writel(reg, rknand->regs + NANDC_REG_V9_FMCTL);
+
+	rknand->selected_bank = banknr;
+}
+
+static void rockchip_nand_cmd_ctrl(struct mtd_info *mtd,
+				   int dat,
+				   unsigned int ctrl)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct rk_nand *rknand = to_rknand(chip->controller);
+	void __iomem *bank_base = rknand->regs + NANDC_REG_V9_BANK0
+				+ rknand->selected_bank * 0x100;
+
+	if (ctrl & NAND_CTRL_CHANGE) {
+		if (ctrl & NAND_ALE)
+			bank_base += NANDC_REG_V9_ADDR;
+		else if (ctrl & NAND_CLE)
+			bank_base += NANDC_REG_V9_CMD;
+		chip->IO_ADDR_W = bank_base;
+	}
+
+	if (dat != NAND_CMD_NONE)
+		writeb(dat & 0xFF, chip->IO_ADDR_W);
+}
+
+static void rockchip_nand_read_buf(struct mtd_info *mtd,
+				   uint8_t *buf,
+				   int len)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct rk_nand *rknand = to_rknand(chip->controller);
+	int offs = 0;
+	void __iomem *bank_base = rknand->regs + NANDC_REG_V9_BANK0
+				+ rknand->selected_bank * 0x100;
+
+	for (offs = 0; offs < len; offs++)
+		buf[offs] = readb(bank_base);
+}
+
+static void rockchip_nand_write_buf(struct mtd_info *mtd,
+				    const uint8_t *buf,
+				    int len)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct rk_nand *rknand = to_rknand(chip->controller);
+	int offs = 0;
+	void __iomem *bank_base = rknand->regs + NANDC_REG_V9_BANK0
+				+ rknand->selected_bank * 0x100;
+
+	for (offs = 0; offs < len; offs++)
+		writeb(buf[offs], bank_base);
+}
+
+static uint8_t rockchip_nand_read_byte(struct mtd_info *mtd)
+{
+	uint8_t ret;
+
+	rockchip_nand_read_buf(mtd, &ret, 1);
+
+	return ret;
+}
+
+static int rockchip_nand_dev_ready(struct mtd_info *mtd)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct rk_nand *rknand = to_rknand(chip->controller);
+
+	if (readl(rknand->regs + NANDC_REG_V9_FMCTL) & NANDC_V9_FM_FREADY)
+		return 1;
+
+	return 0;
+}
+
+static int rockchip_nand_hw_ecc_setup(struct mtd_info *mtd,
+				      struct nand_ecc_ctrl *ecc,
+				      uint32_t strength)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct rk_nand *rknand = to_rknand(chip->controller);
+	u32 reg;
+
+	ecc->strength = strength;
+	ecc->bytes = DIV_ROUND_UP(ecc->strength * 14, 8);
+	ecc->bytes = ALIGN(ecc->bytes, 2);
+
+	switch (ecc->strength) {
+	case 70:
+		reg = 0x00000001;
+		break;
+	case 60:
+		reg = 0x06000001;
+		break;
+	case 40:
+		reg = 0x04000001;
+		break;
+	case 16:
+		reg = 0x02000001;
+		break;
+	default:
+		return -EINVAL;
+	}
+	writel(reg, rknand->regs + NANDC_REG_V9_BCHCTL);
+
+	return 0;
+}
+
+static void rockchip_nand_pio_xfer_start(struct rk_nand *rknand,
+					 u8 dir,
+					 u8 st_buf)
+{
+	u32 reg;
+
+	reg = (dir << NANDC_V9_FL_DIR_S) | (st_buf << NANDC_V9_FL_ST_BUF_S) |
+	      NANDC_V9_FL_XFER_EN | NANDC_V9_FL_XFER_COUNT |
+	      NANDC_V9_FL_ACORRECT;
+	writel(reg, rknand->regs + NANDC_REG_V9_FLCTL);
+
+	reg |= NANDC_V9_FL_XFER_START;
+	writel(reg, rknand->regs + NANDC_REG_V9_FLCTL);
+}
+
+static int rockchip_nand_wait_pio_xfer_done(struct rk_nand *rknand)
+{
+	int timeout = NANDC_V9_DEF_TIMEOUT;
+	int reg;
+
+	while (timeout--) {
+		reg = readl(rknand->regs + NANDC_REG_V9_FLCTL);
+
+		if ((reg & NANDC_V9_FL_XFER_READY)  != 0)
+			break;
+
+		udelay(1);
+	}
+
+	if (timeout == 0)
+		return -1;
+
+	return 0;
+}
+
+static void rockchip_nand_read_extra_oob(struct mtd_info *mtd, u8 *oob)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct nand_ecc_ctrl *ecc = &chip->ecc;
+	int offset = ((ecc->bytes + ecc->prepad) * ecc->steps);
+	int len = mtd->oobsize - offset;
+
+	if (len <= 0)
+		return;
+
+	chip->cmdfunc(mtd, NAND_CMD_RNDOUT, offset + mtd->writesize, -1);
+
+	rockchip_nand_read_buf(mtd, oob + offset, len);
+}
+
+static void rockchip_nand_write_extra_oob(struct mtd_info *mtd, u8 *oob)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct nand_ecc_ctrl *ecc = &chip->ecc;
+	int offset = ((ecc->bytes + ecc->prepad) * ecc->steps);
+	int len = mtd->oobsize - offset;
+
+	if (len <= 0)
+		return;
+
+	chip->cmdfunc(mtd, NAND_CMD_RNDIN, offset + mtd->writesize, -1);
+
+	rockchip_nand_write_buf(mtd, oob + offset, len);
+}
+
+static int rockchip_nand_hw_syndrome_pio_read_page(struct mtd_info *mtd,
+						   struct nand_chip *chip,
+						   uint8_t *buf,
+						   int oob_required,
+						   int page)
+{
+	struct rk_nand *rknand = to_rknand(chip->controller);
+	struct nand_ecc_ctrl *ecc = &chip->ecc;
+	void __iomem *sram_base = rknand->regs + NANDC_REG_V9_SRAM0;
+	unsigned int max_bitflips = 0;
+	int ret, step, bch_st;
+	int offset = page * mtd->writesize;
+
+	if (rknand->bootromblocks && (offset < (4 * mtd->erasesize)))
+		rockchip_nand_hw_ecc_setup(mtd, ecc, NANDC_V9_BOOTROM_ECC);
+
+	rockchip_nand_pio_xfer_start(rknand, NANDC_V9_READ, 0);
+
+	for (step = 0; step < ecc->steps; step++) {
+		int data_off = step * ecc->size;
+		int oob_off = step * (ecc->bytes + ecc->prepad);
+		u8 *data = buf + data_off;
+		u8 *oob = chip->oob_poi + oob_off;
+
+		ret = rockchip_nand_wait_pio_xfer_done(rknand);
+		if (ret)
+			return ret;
+
+		bch_st = readl(rknand->regs + NANDC_REG_V9_BCHST);
+
+		if (bch_st & NANDC_V9_BCH0_ST_ERR) {
+			mtd->ecc_stats.failed++;
+			max_bitflips = -1;
+		} else {
+			ret = NANDC_V9_ECC_ERR_CNT0(bch_st);
+			mtd->ecc_stats.corrected += ret;
+			max_bitflips = max_t(unsigned int, max_bitflips, ret);
+		}
+
+		if ((step + 1) < ecc->steps)
+			rockchip_nand_pio_xfer_start(rknand, NANDC_V9_READ,
+					      		(step + 1) & 0x1);
+
+		memcpy_fromio(data, sram_base + NANDC_REG_V9_SRAM_SIZE *
+			     				(step & 1), ecc->size);
+
+		if (step & 1)
+			memcpy_fromio(oob, rknand->regs + NANDC_REG_V9_SPARE1, 4);
+		else
+			memcpy_fromio(oob, rknand->regs + NANDC_REG_V9_SPARE0, 4);
+	}
+
+	rockchip_nand_read_extra_oob(mtd, chip->oob_poi);
+
+	if (rknand->bootromblocks)
+		rockchip_nand_hw_ecc_setup(mtd, ecc, rknand->ecc_strength);
+
+	return max_bitflips;
+}
+
+static uint32_t rockchip_nand_make_bootrom_compat(struct mtd_info *mtd,
+						  int page,
+						  const u8 *oob,
+						  bool bootromblocks)
+{
+	int pages_per_block = mtd->erasesize / mtd->writesize;
+	int offset = page * mtd->writesize;
+
+	if ((offset < (2 * mtd->erasesize)) || !(page % 2) ||
+	    (offset >= (7 * mtd->erasesize)) || !bootromblocks)
+		return oob[3] | (oob[2] << 8) | (oob[1] << 16) | (oob[0] << 24);
+
+	return (page % pages_per_block + 1) * 4;
+}
+
+static int rockchip_nand_hw_syndrome_pio_write_page(struct mtd_info *mtd,
+						    struct nand_chip *chip,
+						    const uint8_t *buf,
+						    int oob_required,
+						    int page)
+{
+	struct rk_nand *rknand = to_rknand(chip->controller);
+	struct nand_ecc_ctrl *ecc = &chip->ecc;
+	void __iomem *sram_base = rknand->regs + NANDC_REG_V9_SRAM0;
+	int ret, index, step = 0;
+	int offset = page * mtd->writesize;
+	int data_off = step * ecc->size;
+	int oob_off = step * (ecc->bytes + ecc->prepad);
+	const u8 *data = buf + data_off;
+	const u8 *oob = chip->oob_poi + oob_off;
+
+	if (rknand->bootromblocks && (offset < (7 * mtd->erasesize)))
+		rockchip_nand_hw_ecc_setup(mtd, ecc, NANDC_V9_BOOTROM_ECC);
+
+	index = rockchip_nand_make_bootrom_compat(mtd, page, oob,
+					   rknand->bootromblocks);
+
+	memcpy_toio(sram_base, data, ecc->size);
+	memcpy_toio(rknand->regs + NANDC_REG_V9_SPARE0, &index, ecc->prepad);
+
+	for (step = 1; step <= ecc->steps; step++) {
+		rockchip_nand_pio_xfer_start(rknand, NANDC_V9_WRITE,
+					     (step - 1) & 0x1);
+		data_off = step * ecc->size;
+		oob_off = step * (ecc->bytes + ecc->prepad);
+		data = buf + data_off;
+		oob = chip->oob_poi + oob_off;
+
+		if (step < ecc->steps) {
+			memcpy_toio(sram_base + NANDC_REG_V9_SRAM_SIZE *
+				    (step & 1), data, ecc->size);
+			if (step & 1)
+				memcpy_toio(rknand->regs + NANDC_REG_V9_SPARE1,
+					    oob, ecc->prepad);
+			else
+				memcpy_toio(rknand->regs + NANDC_REG_V9_SPARE0,
+					    oob, ecc->prepad);
+		}
+
+		ret = rockchip_nand_wait_pio_xfer_done(rknand);
+		if (ret)
+			return ret;
+	}
+
+	rockchip_nand_write_extra_oob(mtd, chip->oob_poi);
+
+	if (rknand->bootromblocks)
+		rockchip_nand_hw_ecc_setup(mtd, ecc, rknand->ecc_strength);
+
+	return 0;
+}
+
+static const u8 strengths[] = {70, 60, 40, 16};
+
+static int rockchip_nand_ecc_max_strength(struct mtd_info *mtd,
+					  struct nand_ecc_ctrl *ecc)
+{
+	uint32_t max_strength, index;
+
+	max_strength = ((mtd->oobsize / ecc->steps) - ecc->prepad) * 8 / 14;
+
+	for (index = 0; index < ARRAY_SIZE(strengths); index++)
+		if (max_strength >= strengths[index])
+			break;
+
+	if (index >= ARRAY_SIZE(strengths))
+		return -ENOTSUPP;
+
+	return strengths[index];
+}
+
+static bool rockchip_nand_strength_is_valid(int strength)
+{
+	uint32_t index;
+
+	for (index = 0; index < ARRAY_SIZE(strengths); index++)
+		if (strength == strengths[index])
+			break;
+
+	if (index == ARRAY_SIZE(strengths))
+		return false;
+
+	return true;
+}
+
+static int rockchip_nand_hw_ecc_ctrl_init(struct mtd_info *mtd,
+					  struct nand_ecc_ctrl *ecc)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct rk_nand *rknand = to_rknand(chip->controller);
+	uint32_t strength;
+	int index;
+
+	ecc->prepad = 4;
+	ecc->steps = mtd->writesize / ecc->size;
+
+	if (fdtdec_get_bool(gd->fdt_blob, chip->flash_node,
+			    "rockchip,protect-bootrom-blocks"))
+                rknand->bootromblocks = true;
+	else
+		rknand->bootromblocks = false;
+
+	if (rockchip_nand_strength_is_valid(ecc->strength))
+		strength = ecc->strength;
+	else
+		strength = rockchip_nand_ecc_max_strength(mtd, ecc);
+
+	rknand->max_ecc_strength = 70;
+	if (strength > rknand->max_ecc_strength)
+		strength = rknand->max_ecc_strength;
+
+	rockchip_nand_hw_ecc_setup(mtd, ecc, strength);
+
+	rknand->ecc_strength = ecc->strength;
+
+	nand_oob_fix.eccbytes = ecc->bytes * ecc->steps;
+	for (index = 0; index < ecc->bytes; index++)
+		nand_oob_fix.eccpos[index] = index + ecc->prepad;
+	ecc->layout = &nand_oob_fix;
+
+	if (mtd->oobsize < ((ecc->bytes + ecc->prepad) * ecc->steps)) {
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int rockchip_nand_ecc_init(struct mtd_info *mtd,
+				  struct nand_ecc_ctrl *ecc)
+{
+	int ret;
+
+	switch (ecc->mode) {
+	case NAND_ECC_HW_SYNDROME:
+		ret = rockchip_nand_hw_ecc_ctrl_init(mtd, ecc);
+		if (ret)
+			return ret;
+		ecc->read_page =  rockchip_nand_hw_syndrome_pio_read_page;
+		ecc->write_page = rockchip_nand_hw_syndrome_pio_write_page;
+		break;
+	case NAND_ECC_SOFT_BCH:
+	case NAND_ECC_NONE:
+	case NAND_ECC_SOFT:
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int rockchip_nand_block_bad(struct mtd_info *mtd, loff_t ofs)
+{
+	int page, res = 0, i;
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	u16 bad = 0xff;
+	int chipnr = (int)(ofs >> chip->chip_shift);
+
+	page = (int)(ofs >> chip->page_shift) & chip->pagemask;
+	chip->select_chip(mtd, chipnr);
+	chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);
+	if(rockchip_nand_hw_syndrome_pio_read_page(mtd,
+	   chip, chip->buffers->databuf, 0, page) == -1) {
+		chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos, page);
+		for (i = 0; i < 8; i++) {
+			bad = chip->read_byte(mtd);
+			if (bad)
+				break;
+		}
+		if (i >= 8)
+			res = 1;
+	}
+	chip->select_chip(mtd, -1);
+	if (res)
+		printf("%s 0x%x %x %x\n", __func__, page, res, bad);
+	return res;
+}
+
+static int rockchip_nand_chip_init(int node, struct rk_nand *rknand, int devnum)
+{
+	const void *blob = gd->fdt_blob;
+	struct nand_chip *chip;
+	struct mtd_info *mtd;
+	int ret;
+
+	chip = kzalloc(sizeof(*chip), GFP_KERNEL);
+
+	chip->chip_delay = 50;
+	chip->flash_node = node;
+	chip->select_chip = rockchip_nand_select_chip;
+	chip->cmd_ctrl = rockchip_nand_cmd_ctrl;
+	chip->read_buf = rockchip_nand_read_buf;
+	chip->write_buf = rockchip_nand_write_buf;
+	chip->read_byte = rockchip_nand_read_byte;
+	chip->dev_ready = rockchip_nand_dev_ready;
+	chip->controller = &rknand->controller;
+	chip->block_bad = rockchip_nand_block_bad;
+	chip->bbt_options = NAND_BBT_USE_FLASH | NAND_BBT_NO_OOB;
+	chip->options = NAND_NO_SUBPAGE_WRITE;
+
+	rknand->banks[devnum] = fdtdec_get_int(blob, node, "reg", -1);
+
+	if (rknand->banks[devnum] < 0)
+		return -EINVAL;
+
+	mtd = nand_to_mtd(chip);
+	mtd->name = "rknand";
+
+	ret = nand_scan_ident(mtd, 1, NULL);
+	if (ret)
+		return ret;
+
+	ret = rockchip_nand_ecc_init(mtd, &chip->ecc);
+	if (ret) {
+		debug("rockchip_nand_ecc_init failed: %d\n", ret);
+		return ret;
+	}
+
+	ret = nand_scan_tail(mtd);
+	if (ret) {
+		debug("nand_scan_tail failed: %d\n", ret);
+		return ret;
+	}
+
+	ret = nand_register(devnum, mtd);
+	if (ret) {
+		debug("Failed to register mtd device: %d\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int rockchip_nand_chips_init(int node, struct rk_nand *rknand)
+{
+	const void *blob = gd->fdt_blob;
+	int nand_node;
+	int ret, i = 0;
+
+	for (nand_node = fdt_first_subnode(blob, node); nand_node >= 0;
+	     nand_node = fdt_next_subnode(blob, nand_node)) {
+		ret = rockchip_nand_chip_init(nand_node, rknand, i++);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+void board_nand_init(void)
+{
+	const void *blob = gd->fdt_blob;
+	struct rk_nand *rknand;
+	fdt_addr_t regs;
+	int node;
+	int ret;
+
+	rknand = kzalloc(sizeof(*rknand), GFP_KERNEL);
+
+	node = fdtdec_next_compatible(blob, 0, COMPAT_ROCKCHIP_NANDC);
+
+	if (node < 0) {
+		debug("Nand node not found\n");
+		goto err;
+	}
+
+	if (!fdtdec_get_is_enabled(blob, node)) {
+		debug("Nand disabled in device tree\n");
+		goto err;
+	}
+
+	regs = fdt_get_base_address(blob, node);
+	if (regs == FDT_ADDR_T_NONE) {
+		debug("Nand address not found\n");
+		goto err;
+	}
+
+	rknand->regs = (void *)regs;
+
+	spin_lock_init(&rknand->controller.lock);
+	init_waitqueue_head(&rknand->controller.wq);
+
+	rockchip_nand_init(rknand);
+
+	ret = rockchip_nand_chips_init(node, rknand);
+	if (ret) {
+		debug("Failed to init nand chips\n");
+		goto err;
+	}
+
+	return;
+err:
+	kfree(rknand);
+}
+
+int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst)
+{
+	struct mtd_info *mtd;
+	size_t length = size;
+
+	mtd = get_nand_dev_by_index(0);
+	return nand_read_skip_bad(mtd, offs, &length, NULL, size, (u_char *)dst);
+}
+
+void nand_deselect(void) {}

commit 36620717fd5981b5e00c9f2658fca13dada9ecde
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 27 20:43:23 2019 +0800

    arm: stacktrace: imporve guidance message
    
    Change-Id: I186f80f64104b79d35aaae03e99a484bd1191c8f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/lib/stacktrace.c b/arch/arm/lib/stacktrace.c
index 266aeb2265..1520098219 100644
--- a/arch/arm/lib/stacktrace.c
+++ b/arch/arm/lib/stacktrace.c
@@ -503,7 +503,9 @@ void print_stack_arm32(struct unwind_state_arm32 *state,
 	} while (unwind_stack_arm32(state, exidx, exidx_sz,
 				    kernel_stack, stack, stack_size));
 
-	printf("\nNOTE: Please use ./scripts/stacktrace.sh to parse trace info\n");
+	printf("\nCopy above stack info to a file(eg. dump.txt), and\n"
+	       "execute command in your U-Boot project: "
+	       "./scripts/stacktrace.sh dump.txt\n\n");
 }
 
 void dump_core_stack(struct pt_regs *regs)
diff --git a/arch/arm/lib/stacktrace_64.c b/arch/arm/lib/stacktrace_64.c
index 2494684a84..5637926175 100644
--- a/arch/arm/lib/stacktrace_64.c
+++ b/arch/arm/lib/stacktrace_64.c
@@ -90,7 +90,9 @@ void dump_core_stack(struct pt_regs *regs)
 		printf("	[< %08lx >]\n", pc);
 	} while (walk_stackframe(&frame));
 
-	printf("\nNOTE: Please use ./scripts/stacktrace.sh to parse trace info\n");
+	printf("\nCopy above stack info to a file(eg. dump.txt), and\n"
+	       "execute command in your U-Boot project: "
+	       "./scripts/stacktrace.sh dump.txt\n\n");
 }
 
 void dump_stack(void)

commit 5330794924424b7839dd5869a9061ed87256d2b4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Mar 28 14:28:43 2019 +0800

    scripts: stacktrace.sh: dump PC and LR addr2line information
    
    Change-Id: If5c017eb3440b587153fa6b8624bf4acffe5a4e5
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/scripts/stacktrace.sh b/scripts/stacktrace.sh
index cb0383254d..39699499ef 100755
--- a/scripts/stacktrace.sh
+++ b/scripts/stacktrace.sh
@@ -41,13 +41,17 @@ do
 	cat u-boot.sym | sort |
 	awk -v foffset=$f_offset_hex '/\.text/ {
 		if (strtonum("0x"$1) > '$frame_pc_str') {
-			printf("%s+0x%s/0x%x\n", fname, foffset, fsize);
+			printf("%s+0x%s/0x%x      ", fname, foffset, fsize);
 			exit
 		}
 		fname=$NF;
 		fsize=strtonum("0x"$5);
 		fpc=strtonum("0x"$1);
 	}'
+
+	func_path=`./make.sh $frame_pc_str | awk '{ print $1 }' | sed -n "/home/p"`
+	func_path=`echo ${func_path##*boot/}`
+	echo $func_path
 done
 echo
 

commit 2cb995bc2ea3681c63d81b053299172173171440
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Mar 29 18:01:51 2019 +0800

    lib: sysmem: allow alloc subset of an allocated memblk
    
    Change-Id: I171c5978faf6fc1b3e95cc46c55a2adfe6df0176
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/lib/sysmem.c b/lib/sysmem.c
index f0b486d687..8b08644a74 100644
--- a/lib/sysmem.c
+++ b/lib/sysmem.c
@@ -244,6 +244,9 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 			 mem->attr.name, (ulong)mem->base,
 			 (ulong)(mem->base + mem->size));
 		if (!strcmp(mem->attr.name, name)) {
+			if (mem->base <= base && mem->size >= size)
+				return (void *)base;
+
 			SYSMEM_E("Failed to double alloc for existence \"%s\"\n", name);
 			return NULL;
 		} else if (sysmem_is_overlap(mem->base, mem->size, base, size)) {

commit 356575c3e2938bc78c92d884f8e4b72cfa1963f1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 27 11:53:16 2019 +0800

    lib: bidram: handle only-one dram bank available situation
    
    LMB default init lmb->reserved.region[0] as zero.
    
    Change-Id: Ib46d9630581bb3a03c5846288b16ae805e3e6944
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/lib/bidram.c b/lib/bidram.c
index d39f5b14ae..b6859150fd 100644
--- a/lib/bidram.c
+++ b/lib/bidram.c
@@ -130,6 +130,20 @@ void bidram_gen_gd_bi_dram(void)
 		return;
 	}
 
+	/*
+	 * LBM default init:
+	 *		lmb->reserved.cnt = 1;
+	 *		lmb->reserved.region[0].base = 0;
+	 *		lmb->reserved.region[0].size = 0;
+	 *
+	 * Here handle that: there is the only one dram bank available.
+	 */
+	if (rsv_cnt == 1 && !res_rgn[0].base && !res_rgn[0].size) {
+		gd->bd->bi_dram[0].start = mem_rgn[0].base;
+		gd->bd->bi_dram[0].size = mem_rgn[0].size;
+		goto done;
+	}
+
 	/* If reserved rgn is not from sdram start */
 	if (res_rgn[0].base != mem_rgn[0].base) {
 		gd->bd->bi_dram[idx].start = mem_rgn[0].base;
@@ -209,7 +223,7 @@ static int bidram_core_reserve(enum memblk_id id, const char *mem_name,
 	/* Check overlap */
 	list_for_each(node, &bidram->reserved_head) {
 		mem = list_entry(node, struct memblock, node);
-		BIDRAM_D("Reserved: %s 0x%08lx - 0x%08lx\n",
+		BIDRAM_D("Has reserved: %s 0x%08lx - 0x%08lx\n",
 			 mem->attr.name, (ulong)mem->base,
 			 (ulong)(mem->base + mem->size));
 		if (!strcmp(mem->attr.name, name)) {
@@ -224,6 +238,9 @@ static int bidram_core_reserve(enum memblk_id id, const char *mem_name,
 		}
 	}
 
+	BIDRAM_D("Reserve: \"%s\" 0x%08lx - 0x%08lx\n",
+		 name, (ulong)base, (ulong)(base + size));
+
 	ret = lmb_reserve(&bidram->lmb, base, size);
 	if (ret >= 0) {
 		mem = malloc(sizeof(*mem));

commit 623d03d6217fc9b49e4d02fa876d7505d94974f8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 26 15:22:33 2019 +0800

    make.sh: pack ta trust.img as primary choice
    
    This U-Boot is working with kernel-4.4 at least which
    requires trust.img with ta.
    
    It also avoids user confused with trust.img and trust_with_ta.img.
    
    Change-Id: I18ec538a1f83cbb660e2fda597bf8120863d744f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 88d20109dc..98b0a00b9c 100755
--- a/make.sh
+++ b/make.sh
@@ -592,16 +592,10 @@ pack_trust_image()
 		TOS=$(echo ${TOS} | sed "s/tools\/rk_tools\//\.\//g")
 		TOS_TA=$(echo ${TOS_TA} | sed "s/tools\/rk_tools\//\.\//g")
 
-		if [ x$TOS_TA != x -a x$TOS != x ]; then
-			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS} ./trust.img ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
-			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ./trust_with_ta.img ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
-			echo "Both trust.img and trust_with_ta.img are ready"
-		elif [ $TOS ]; then
-			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS} ./trust.img ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
-			echo "trust.img is ready"
-		elif [ $TOS_TA ]; then
+		if [ $TOS_TA ]; then
 			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ./trust.img ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
-			echo "trust.img with ta is ready"
+		elif [ $TOS ]; then
+			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS}    ./trust.img ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
 		else
 			echo "Can't find any tee bin"
 			exit 1

commit 6be53b633a21a4024eb11bc8e4ccfa7c730ae55e
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Thu Mar 28 19:46:24 2019 +0800

    rockchip: otp: Add support for RK3308
    
    Change-Id: I44391e0f039b1bd347124e90aad67a936ade2f99
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/misc/rockchip-otp.c b/drivers/misc/rockchip-otp.c
index e773583bd9..c6ec5d9b3f 100644
--- a/drivers/misc/rockchip-otp.c
+++ b/drivers/misc/rockchip-otp.c
@@ -196,6 +196,10 @@ static const struct udevice_id rockchip_otp_ids[] = {
 		.compatible = "rockchip,px30-otp",
 		.data = (ulong)&rockchip_px30_otp_read,
 	},
+	{
+		.compatible = "rockchip,rk3308-otp",
+		.data = (ulong)&rockchip_px30_otp_read,
+	},
 	{}
 };
 

commit 4973d825b84c2eb1da633d671dd287663966d771
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Tue Oct 23 09:46:24 2018 +0800

    rockchip: otp: Add (misc) driver for PX30 non-secure OTP block
    
    This adds a simple driver for reading the OTP block of the PX30.
    
    Change-Id: Ic2c0f4b0886808af87c826e8d0045e5d440521f7
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 3d282d5b14..f936fd791f 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -41,6 +41,13 @@ config ROCKCHIP_EFUSE
 	  extended (by porting the read function from the Linux kernel sources)
 	  to support other recent Rockchip devices.
 
+config ROCKCHIP_OTP
+	bool "Rockchip OTP Support"
+	depends on MISC
+	help
+	  This is a simple drive to dump specified values of Rockchip SoC
+	  from otp, such as cpu-leakage.
+
 config CMD_CROS_EC
 	bool "Enable crosec command"
 	depends on CROS_EC
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 1e6a58d2f8..72f3156812 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -52,3 +52,4 @@ obj-$(CONFIG_FSL_DEVICE_DISABLE) += fsl_devdis.o
 obj-$(CONFIG_WINBOND_W83627) += winbond_w83627.o
 obj-$(CONFIG_QFW) += qfw.o
 obj-$(CONFIG_ROCKCHIP_EFUSE) += rockchip-efuse.o
+obj-$(CONFIG_ROCKCHIP_OTP) += rockchip-otp.o
diff --git a/drivers/misc/rockchip-otp.c b/drivers/misc/rockchip-otp.c
new file mode 100644
index 0000000000..e773583bd9
--- /dev/null
+++ b/drivers/misc/rockchip-otp.c
@@ -0,0 +1,209 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <command.h>
+#include <dm.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
+#include <misc.h>
+
+/* OTP Register Offsets */
+#define OTPC_SBPI_CTRL			0x0020
+#define OTPC_SBPI_CMD_VALID_PRE		0x0024
+#define OTPC_SBPI_CS_VALID_PRE		0x0028
+#define OTPC_SBPI_STATUS		0x002C
+#define OTPC_USER_CTRL			0x0100
+#define OTPC_USER_ADDR			0x0104
+#define OTPC_USER_ENABLE		0x0108
+#define OTPC_USER_Q			0x0124
+#define OTPC_INT_STATUS			0x0304
+#define OTPC_SBPI_CMD0_OFFSET		0x1000
+#define OTPC_SBPI_CMD1_OFFSET		0x1004
+
+/* OTP Register bits and masks */
+#define OTPC_USER_ADDR_MASK		GENMASK(31, 16)
+#define OTPC_USE_USER			BIT(0)
+#define OTPC_USE_USER_MASK		GENMASK(16, 16)
+#define OTPC_USER_FSM_ENABLE		BIT(0)
+#define OTPC_USER_FSM_ENABLE_MASK	GENMASK(16, 16)
+#define OTPC_SBPI_DONE			BIT(1)
+#define OTPC_USER_DONE			BIT(2)
+
+#define SBPI_DAP_ADDR			0x02
+#define SBPI_DAP_ADDR_SHIFT		8
+#define SBPI_DAP_ADDR_MASK		GENMASK(31, 24)
+#define SBPI_CMD_VALID_MASK		GENMASK(31, 16)
+#define SBPI_DAP_CMD_WRF		0xC0
+#define SBPI_DAP_REG_ECC		0x3A
+#define SBPI_ECC_ENABLE			0x00
+#define SBPI_ECC_DISABLE		0x09
+#define SBPI_ENABLE			BIT(0)
+#define SBPI_ENABLE_MASK		GENMASK(16, 16)
+
+#define OTPC_TIMEOUT			10000
+
+typedef int (*OTP_READ)(struct udevice *dev, int offset, void *buf, int size);
+
+struct rockchip_otp_platdata {
+	void __iomem *base;
+};
+
+#if defined(DEBUG)
+static int dump_otps(cmd_tbl_t *cmdtp, int flag,
+		     int argc, char * const argv[])
+{
+	struct udevice *dev;
+	u8 otps[64] = {0};
+	int ret;
+
+	/* retrieve the device */
+	ret = uclass_get_device_by_driver(UCLASS_MISC,
+					  DM_GET_DRIVER(rockchip_otp), &dev);
+	if (ret) {
+		printf("%s: no misc-device found\n", __func__);
+		return 0;
+	}
+
+	ret = misc_read(dev, 0, &otps, sizeof(otps));
+	if (ret) {
+		printf("%s: misc_read failed\n", __func__);
+		return 0;
+	}
+
+	printf("otp-contents:\n");
+	print_buffer(0, otps, 1, 64, 16);
+
+	return 0;
+}
+
+U_BOOT_CMD(
+	rockchip_dump_otps, 1, 1, dump_otps,
+	"Dump the content of the otps",
+	""
+);
+#endif
+
+static int rockchip_otp_wait_status(struct rockchip_otp_platdata *otp,
+				    u32 flag)
+{
+	int delay = OTPC_TIMEOUT;
+
+	while (!(readl(otp->base + OTPC_INT_STATUS) & flag)) {
+		udelay(1);
+		delay--;
+		if (delay <= 0) {
+			printf("%s: wait init status timeout\n", __func__);
+			return -ETIMEDOUT;
+		}
+	}
+
+	/* clean int status */
+	writel(flag, otp->base + OTPC_INT_STATUS);
+
+	return 0;
+}
+
+static int rockchip_otp_ecc_enable(struct rockchip_otp_platdata *otp,
+				   bool enable)
+{
+	int ret = 0;
+
+	writel(SBPI_DAP_ADDR_MASK | (SBPI_DAP_ADDR << SBPI_DAP_ADDR_SHIFT),
+	       otp->base + OTPC_SBPI_CTRL);
+
+	writel(SBPI_CMD_VALID_MASK | 0x1, otp->base + OTPC_SBPI_CMD_VALID_PRE);
+	writel(SBPI_DAP_CMD_WRF | SBPI_DAP_REG_ECC,
+	       otp->base + OTPC_SBPI_CMD0_OFFSET);
+	if (enable)
+		writel(SBPI_ECC_ENABLE, otp->base + OTPC_SBPI_CMD1_OFFSET);
+	else
+		writel(SBPI_ECC_DISABLE, otp->base + OTPC_SBPI_CMD1_OFFSET);
+
+	writel(SBPI_ENABLE_MASK | SBPI_ENABLE, otp->base + OTPC_SBPI_CTRL);
+
+	ret = rockchip_otp_wait_status(otp, OTPC_SBPI_DONE);
+	if (ret < 0)
+		printf("%s timeout during ecc_enable\n", __func__);
+
+	return ret;
+}
+
+static int rockchip_px30_otp_read(struct udevice *dev, int offset,
+				  void *buf, int size)
+{
+	struct rockchip_otp_platdata *otp = dev_get_platdata(dev);
+	u8 *buffer = buf;
+	int ret = 0;
+
+	ret = rockchip_otp_ecc_enable(otp, false);
+	if (ret < 0) {
+		printf("%s rockchip_otp_ecc_enable err\n", __func__);
+		return ret;
+	}
+
+	writel(OTPC_USE_USER | OTPC_USE_USER_MASK, otp->base + OTPC_USER_CTRL);
+	udelay(5);
+	while (size--) {
+		writel(offset++ | OTPC_USER_ADDR_MASK,
+		       otp->base + OTPC_USER_ADDR);
+		writel(OTPC_USER_FSM_ENABLE | OTPC_USER_FSM_ENABLE_MASK,
+		       otp->base + OTPC_USER_ENABLE);
+		ret = rockchip_otp_wait_status(otp, OTPC_USER_DONE);
+		if (ret < 0) {
+			printf("%s timeout during read setup\n", __func__);
+			goto read_end;
+		}
+		*buffer++ = readb(otp->base + OTPC_USER_Q);
+	}
+
+read_end:
+	writel(0x0 | OTPC_USE_USER_MASK, otp->base + OTPC_USER_CTRL);
+
+	return ret;
+}
+
+static int rockchip_otp_read(struct udevice *dev, int offset,
+			     void *buf, int size)
+{
+	OTP_READ otp_read = NULL;
+
+	otp_read = (OTP_READ)dev_get_driver_data(dev);
+	if (!otp_read)
+		return -ENOSYS;
+
+	return (*otp_read)(dev, offset, buf, size);
+}
+
+static const struct misc_ops rockchip_otp_ops = {
+	.read = rockchip_otp_read,
+};
+
+static int rockchip_otp_ofdata_to_platdata(struct udevice *dev)
+{
+	struct rockchip_otp_platdata *otp = dev_get_platdata(dev);
+
+	otp->base = dev_read_addr_ptr(dev);
+
+	return 0;
+}
+
+static const struct udevice_id rockchip_otp_ids[] = {
+	{
+		.compatible = "rockchip,px30-otp",
+		.data = (ulong)&rockchip_px30_otp_read,
+	},
+	{}
+};
+
+U_BOOT_DRIVER(rockchip_otp) = {
+	.name = "rockchip_otp",
+	.id = UCLASS_MISC,
+	.of_match = rockchip_otp_ids,
+	.ops = &rockchip_otp_ops,
+	.ofdata_to_platdata = rockchip_otp_ofdata_to_platdata,
+	.platdata_auto_alloc_size = sizeof(struct rockchip_otp_platdata),
+};

commit b13cc84cd1500488737e1936da4a4015d6bb7b6d
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Thu Mar 28 20:18:42 2019 +0800

    rockchip: efuse: support rk1808 non-secure efuse
    
    Change-Id: I2a7cc8306c5ea45c5586b036cbc13eaa153e4227
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c
index d23e091940..a2e4da408f 100644
--- a/drivers/misc/rockchip-efuse.c
+++ b/drivers/misc/rockchip-efuse.c
@@ -16,6 +16,46 @@
 #include <linux/delay.h>
 #include <misc.h>
 
+#define T_CSB_P_S		0
+#define T_PGENB_P_S		0
+#define T_LOAD_P_S		0
+#define T_ADDR_P_S		0
+#define T_STROBE_P_S		(0 + 110) /* 1.1us */
+#define T_CSB_P_L		(0 + 110 + 1000 + 20) /* 200ns */
+#define T_PGENB_P_L		(0 + 110 + 1000 + 20)
+#define T_LOAD_P_L		(0 + 110 + 1000 + 20)
+#define T_ADDR_P_L		(0 + 110 + 1000 + 20)
+#define T_STROBE_P_L		(0 + 110 + 1000) /* 10us */
+#define T_CSB_R_S		0
+#define T_PGENB_R_S		0
+#define T_LOAD_R_S		0
+#define T_ADDR_R_S		2
+#define T_STROBE_R_S		(2 + 3)
+#define T_CSB_R_L		(2 + 3 + 3 + 3)
+#define T_PGENB_R_L		(2 + 3 + 3 + 3)
+#define T_LOAD_R_L		(2 + 3 + 3 + 3)
+#define T_ADDR_R_L		(2 + 3 + 3 + 2)
+#define T_STROBE_R_L		(2 + 3 + 3)
+
+#define T_CSB_P			0x28
+#define T_PGENB_P		0x2c
+#define T_LOAD_P		0x30
+#define T_ADDR_P		0x34
+#define T_STROBE_P		0x38
+#define T_CSB_R			0x3c
+#define T_PGENB_R		0x40
+#define T_LOAD_R		0x44
+#define T_ADDR_R		0x48
+#define T_STROBE_R		0x4c
+
+#define RK1808_USER_MODE	BIT(0)
+#define RK1808_INT_FINISH	BIT(0)
+#define RK1808_AUTO_ENB		BIT(0)
+#define RK1808_AUTO_RD		BIT(1)
+#define RK1808_A_SHIFT		16
+#define RK1808_A_MASK		0x3ff
+#define RK1808_NBYTES		4
+
 #define RK3399_A_SHIFT          16
 #define RK3399_A_MASK           0x3ff
 #define RK3399_NFUSES           32
@@ -106,6 +146,76 @@ U_BOOT_CMD(
 );
 #endif
 
+static void rk1808_efuse_timing_init(void __iomem *base)
+{
+	static bool init;
+
+	if (init)
+		return;
+
+	/* enable auto mode */
+	writel(readl(base) & (~RK1808_USER_MODE), base);
+
+	/* setup efuse timing */
+	writel((T_CSB_P_S << 16) | T_CSB_P_L, base + T_CSB_P);
+	writel((T_PGENB_P_S << 16) | T_PGENB_P_L, base + T_PGENB_P);
+	writel((T_LOAD_P_S << 16) | T_LOAD_P_L, base + T_LOAD_P);
+	writel((T_ADDR_P_S << 16) | T_ADDR_P_L, base + T_ADDR_P);
+	writel((T_STROBE_P_S << 16) | T_STROBE_P_L, base + T_STROBE_P);
+	writel((T_CSB_R_S << 16) | T_CSB_R_L, base + T_CSB_R);
+	writel((T_PGENB_R_S << 16) | T_PGENB_R_L, base + T_PGENB_R);
+	writel((T_LOAD_R_S << 16) | T_LOAD_R_L, base + T_LOAD_R);
+	writel((T_ADDR_R_S << 16) | T_ADDR_R_L, base + T_ADDR_R);
+	writel((T_STROBE_R_S << 16) | T_STROBE_R_L, base + T_STROBE_R);
+
+	init = true;
+}
+
+static int rockchip_rk1808_efuse_read(struct udevice *dev, int offset,
+				      void *buf, int size)
+{
+	struct rockchip_efuse_platdata *plat = dev_get_platdata(dev);
+	struct rockchip_efuse_regs *efuse =
+		(struct rockchip_efuse_regs *)plat->base;
+	unsigned int addr_start, addr_end, addr_offset, addr_len;
+	u32 out_value, status;
+	u8 *buffer;
+	int ret = 0, i = 0;
+
+	rk1808_efuse_timing_init(plat->base);
+
+	addr_start = rounddown(offset, RK1808_NBYTES) / RK1808_NBYTES;
+	addr_end = roundup(offset + size, RK1808_NBYTES) / RK1808_NBYTES;
+	addr_offset = offset % RK1808_NBYTES;
+	addr_len = addr_end - addr_start;
+
+	buffer = calloc(1, sizeof(*buffer) * addr_len * RK1808_NBYTES);
+	if (!buffer)
+		return -ENOMEM;
+
+	while (addr_len--) {
+		writel(RK1808_AUTO_RD | RK1808_AUTO_ENB |
+		       ((addr_start++ & RK1808_A_MASK) << RK1808_A_SHIFT),
+		       &efuse->auto_ctrl);
+		udelay(2);
+		status = readl(&efuse->int_status);
+		if (!(status & RK1808_INT_FINISH)) {
+			ret = -EIO;
+			goto err;
+		}
+		out_value = readl(&efuse->dout2);
+		writel(RK1808_INT_FINISH, &efuse->int_status);
+
+		memcpy(&buffer[i], &out_value, RK1808_NBYTES);
+		i += RK1808_NBYTES;
+	}
+	memcpy(buf, buffer + addr_offset, size);
+err:
+	kfree(buffer);
+
+	return ret;
+}
+
 static int rockchip_rk3399_efuse_read(struct udevice *dev, int offset,
 				      void *buf, int size)
 {
@@ -269,6 +379,10 @@ static int rockchip_efuse_ofdata_to_platdata(struct udevice *dev)
 }
 
 static const struct udevice_id rockchip_efuse_ids[] = {
+	{
+		.compatible = "rockchip,rk1808-efuse",
+		.data = (ulong)&rockchip_rk1808_efuse_read,
+	},
 	{
 		.compatible = "rockchip,rockchip-efuse",
 		.data = (ulong)&rockchip_rk3288_efuse_read,

commit 1380460aeec611722e2e9224b49a8941764a8f3b
Author: XiaoDong Huang <derrick.huang@rock-chips.com>
Date:   Thu Mar 28 16:20:49 2019 +0800

    rockchip: rk3368: Use timer0 as timer_irq
    
    Change-Id: I75ee18ee55207ead6a30d588529e7363fe361009
    Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>

diff --git a/include/irq-platform.h b/include/irq-platform.h
index b07d576057..5ae9e973b1 100644
--- a/include/irq-platform.h
+++ b/include/irq-platform.h
@@ -104,7 +104,8 @@
 #define GPIO_BANK_NUM			4
 #define GPIO_BANK_PINS			32
 
-#define IRQ_TIMER1			79
+#define IRQ_TIMER0			98
+#define IRQ_TIMER1			99
 #define IRQ_PWM				110
 #define IRQ_GPIO0			113
 #define IRQ_GPIO1			114
diff --git a/include/rk_timer_irq.h b/include/rk_timer_irq.h
index 46133016b3..6de549e281 100644
--- a/include/rk_timer_irq.h
+++ b/include/rk_timer_irq.h
@@ -36,8 +36,13 @@
 #define TIMER_BASE		(0xFF1C0000 + 0x20)	/* TIMER 1 */
 #define TIMER_IRQ		IRQ_TIMER1
 #elif defined(CONFIG_ROCKCHIP_RK3368)
-#define TIMER_BASE		(0xFF810000 + 0x20)	/* TIMER 1 */
-#define TIMER_IRQ		IRQ_TIMER1
+/*
+ * Use timer0 and never change, because timer0 will be used in charge animation
+ * driver to support auto wakeup when system suspend. If core poweroff, PMU only
+ * support timer0(not all timer) as wakeup source.
+ */
+#define TIMER_BASE		(0xFF810000 + 0x00)	/* TIMER 0 */
+#define TIMER_IRQ		IRQ_TIMER0
 #elif defined(CONFIG_ROCKCHIP_RK3399)
 #define TIMER_BASE		(0xFF850000 + 0x20)	/* TIMER 1 */
 #define TIMER_IRQ		IRQ_TIMER1

commit 5743ef647faabacaf12f7272c027f0ea6dee8557
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Feb 22 21:48:53 2019 +0800

    mmc: dw_mmc: support get_cd in struct dm_mmc_ops
    
    Add function get_cd to detect storage device directly instead of detect
    it by mmc command.
    
    Change-Id: I486dee836c62092baabe40fc6de995904849f91d
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 3a13b51a41..81981c7911 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -13,6 +13,10 @@
 #include <memalign.h>
 #include <mmc.h>
 #include <dwmmc.h>
+#ifdef CONFIG_DM_GPIO
+#include <asm/gpio.h>
+#include <asm-generic/gpio.h>
+#endif
 
 #define PAGE_SIZE 4096
 
@@ -623,6 +627,24 @@ static int dwmci_init(struct mmc *mmc)
 	return 0;
 }
 
+static int dwmci_get_cd(struct udevice *dev)
+{
+	int ret = -1;
+#ifndef CONFIG_SPL_BUILD
+#ifdef CONFIG_DM_GPIO
+	struct gpio_desc detect;
+
+	ret = gpio_request_by_name(dev, "cd-gpios", 0, &detect, GPIOD_IS_IN);
+	if (ret) {
+		return ret;
+	}
+
+	ret = !dm_gpio_get_value(&detect);
+#endif
+#endif
+	return ret;
+}
+
 #ifdef CONFIG_DM_MMC
 int dwmci_probe(struct udevice *dev)
 {
@@ -635,6 +657,7 @@ const struct dm_mmc_ops dm_dwmci_ops = {
 	.card_busy	= dwmci_card_busy,
 	.send_cmd	= dwmci_send_cmd,
 	.set_ios	= dwmci_set_ios,
+	.get_cd         = dwmci_get_cd,
 	.execute_tuning	= dwmci_execute_tuning,
 };
 
@@ -643,6 +666,7 @@ static const struct mmc_ops dwmci_ops = {
 	.card_busy	= dwmci_card_busy,
 	.send_cmd	= dwmci_send_cmd,
 	.set_ios	= dwmci_set_ios,
+	.get_cd         = dwmci_get_cd,
 	.init		= dwmci_init,
 	.execute_tuning	= dwmci_execute_tuning,
 };

commit 0476014ebb59f4b6ab5b30c8b192ebec6ac99655
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 19 14:16:19 2019 +0800

    ram: ramdisk: rename "readonly" to "ro"
    
    Change-Id: I4f7c052e5750db78969f37125056906cacd222a0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3399pro-npu-evb.dts b/arch/arm/dts/rk3399pro-npu-evb.dts
index 752ed00a85..00e521c36b 100644
--- a/arch/arm/dts/rk3399pro-npu-evb.dts
+++ b/arch/arm/dts/rk3399pro-npu-evb.dts
@@ -17,9 +17,9 @@
 		stdout-path = &uart2;
 	};
 
-	ramdisk-readonly {
+	ramdisk-ro {
 		u-boot,dm-pre-reloc;
-		compatible = "ramdisk-readonly";
+		compatible = "ramdisk-ro";
 		status = "okay";
 	};
 };
diff --git a/configs/rk3399pro-npu_defconfig b/configs/rk3399pro-npu_defconfig
index 7b59efdf56..7555476382 100644
--- a/configs/rk3399pro-npu_defconfig
+++ b/configs/rk3399pro-npu_defconfig
@@ -56,7 +56,7 @@ CONFIG_PINCTRL=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_RAM=y
 CONFIG_DM_RAMDISK=y
-CONFIG_RAMDISK_READONLY=y
+CONFIG_RAMDISK_RO=y
 CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xff550000
diff --git a/drivers/ram/Kconfig b/drivers/ram/Kconfig
index 2cf8adefb6..3139af0833 100644
--- a/drivers/ram/Kconfig
+++ b/drivers/ram/Kconfig
@@ -41,7 +41,7 @@ config DM_RAMDISK
           This enables the Ramdisk uclass support. These appear as block devices
           in U-Boot.
 
-config RAMDISK_READONLY
+config RAMDISK_RO
         bool "Enable read only ramdisk support"
         depends on DM_RAMDISK
         help
diff --git a/drivers/ram/Makefile b/drivers/ram/Makefile
index 9d6abb0cfa..b4dd4d3293 100644
--- a/drivers/ram/Makefile
+++ b/drivers/ram/Makefile
@@ -11,4 +11,4 @@ obj-$(CONFIG_ARCH_BMIPS) += bmips_ram.o
 
 obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
 obj-$(CONFIG_DM_RAMDISK) += ramdisk-uclass.o
-obj-$(CONFIG_RAMDISK_READONLY) += ramdisk_readonly.o
+obj-$(CONFIG_RAMDISK_RO) += ramdisk_ro.o
diff --git a/drivers/ram/ramdisk_readonly.c b/drivers/ram/ramdisk_ro.c
similarity index 60%
rename from drivers/ram/ramdisk_readonly.c
rename to drivers/ram/ramdisk_ro.c
index 7f2b3b8c7a..e2f5c29b54 100644
--- a/drivers/ram/ramdisk_readonly.c
+++ b/drivers/ram/ramdisk_ro.c
@@ -12,8 +12,8 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-static ulong ramdisk_readonly_bread(struct blk_desc *desc, lbaint_t start,
-				    lbaint_t blkcnt, void *dst)
+static ulong ramdisk_ro_bread(struct blk_desc *desc, lbaint_t start,
+			      lbaint_t blkcnt, void *dst)
 {
 	unsigned long b_size, b_start;
 
@@ -28,7 +28,7 @@ static ulong ramdisk_readonly_bread(struct blk_desc *desc, lbaint_t start,
 	return blkcnt;
 }
 
-static int ramdisk_readonly_bind(struct udevice *dev)
+static int ramdisk_ro_bind(struct udevice *dev)
 {
 	struct udevice *bdev;
 	int ret;
@@ -43,19 +43,19 @@ static int ramdisk_readonly_bind(struct udevice *dev)
 	return 0;
 }
 
-static const struct ramdisk_ops ramdisk_readonly_ops = {
-	.read = ramdisk_readonly_bread,
+static const struct ramdisk_ops ramdisk_ro_ops = {
+	.read = ramdisk_ro_bread,
 };
 
-static const struct udevice_id ramdisk_readonly_ids[] = {
-	{ .compatible = "ramdisk-readonly" },
+static const struct udevice_id ramdisk_ro_ids[] = {
+	{ .compatible = "ramdisk-ro" },
 	{ }
 };
 
-U_BOOT_DRIVER(ramdisk_readonly) = {
-	.name		= "ramdisk-readonly",
+U_BOOT_DRIVER(ramdisk_ro) = {
+	.name		= "ramdisk-ro",
 	.id		= UCLASS_RAMDISK,
-	.ops		= &ramdisk_readonly_ops,
-	.of_match	= ramdisk_readonly_ids,
-	.bind		= ramdisk_readonly_bind,
+	.ops		= &ramdisk_ro_ops,
+	.of_match	= ramdisk_ro_ids,
+	.bind		= ramdisk_ro_bind,
 };

commit b86137850ec8304d443acb4133e25d43643a0d7f
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Fri Mar 22 10:11:25 2019 +0800

    lib: optee_client: change condition for file exist
    
    file not exist if ret < 0, file exist if ret >=0
    
    Change-Id: I1a70b0a41773f03d552c5f6cda82b745d6e81421
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/OpteeClientRkFs.c b/lib/optee_clientApi/OpteeClientRkFs.c
index 53a2ebcaca..68c59554e8 100644
--- a/lib/optee_clientApi/OpteeClientRkFs.c
+++ b/lib/optee_clientApi/OpteeClientRkFs.c
@@ -1316,7 +1316,7 @@ static int tee_fs_link(struct tee_fs_rpc *fsrpc)
 
 	struct rkss_file_info p_check = {0};
 	ret = rkss_get_fileinfo_by_name(newfilename, &p_check);
-	if (!ret)
+	if (ret >= 0)
 	{
 		printf("file exist ! %s.\n", newfilename);
 		return -1;

commit 327c34ef1dadf06eb5d7b8089833dea439aa94ad
Author: Shengfei Xu <xsf@rock-chips.com>
Date:   Wed Mar 13 16:11:23 2019 +0800

    fuel gauge: rk817/rk809: only rk809 need pull-up and pull-down resistor
    
    Change-Id: I9c88a0cf11205ba351305eb37bd1e725ed203dca
    Signed-off-by: Shengfei Xu <xsf@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk817.c b/drivers/power/fuel_gauge/fg_rk817.c
index 57ff70e5ec..86eaf93772 100644
--- a/drivers/power/fuel_gauge/fg_rk817.c
+++ b/drivers/power/fuel_gauge/fg_rk817.c
@@ -406,9 +406,10 @@ static int rk817_bat_get_battery_voltage(struct rk817_battery_device *battery)
 	val |= rk817_bat_read(battery, BAT_VOL_L) << 0;
 
 	vol = battery->voltage_k * val / 1000 + battery->voltage_b;
-	vol_temp = (vol * battery->bat_res_up / battery->bat_res_down + vol);
-	vol = vol_temp;
-
+	if (battery->variant == RK809_ID) {
+		vol_temp = (vol * battery->bat_res_up / battery->bat_res_down + vol);
+		vol = vol_temp;
+	}
 	return vol;
 }
 

commit daa679a7e421fa6b1852298c94c1246fead328b1
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Mar 27 18:08:15 2019 +0800

    rockchip: make.sh: get CONFIG_SYS_TEXT_BASE from .config
    
    CONFIG_SYS_TEXT_BASE define in header file has be deprecate on
    mainline, it has been move to Kconfig.
    
    Change-Id: I40ae0ab84dbc6d74eca3450413fc2d11eb098434
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/make.sh b/make.sh
index 023e539dfa..88d20109dc 100755
--- a/make.sh
+++ b/make.sh
@@ -507,6 +507,10 @@ pack_uboot_image()
 	local UBOOT_LOAD_ADDR
 
 	UBOOT_LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
+	if [ ! $UBOOT_LOAD_ADDR ]; then
+		UBOOT_LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${OUTDIR}/.config|tr -d '\r'`
+	fi
+
 	${RKTOOLS}/loaderimage --pack --uboot ${OUTDIR}/u-boot.bin uboot.img ${UBOOT_LOAD_ADDR} ${PLATFORM_UBOOT_IMG_SIZE}
 
 	# Delete u-boot.img and u-boot-dtb.img, which makes users not be confused with final uboot.img

commit c5449fd30c8bd2024331ddf912fa467e4487c20b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 26 11:29:19 2019 +0800

    dm: dvfs: don't print fail message when there is no device
    
    Change-Id: I8ec8920972261e8009dfd9306d8ab898460a71df
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/cmd/dvfs.c b/cmd/dvfs.c
index 73a6f06a1e..ac51077b7e 100644
--- a/cmd/dvfs.c
+++ b/cmd/dvfs.c
@@ -15,7 +15,8 @@ static int do_dvfs(cmd_tbl_t *cmdtp, int flag,
 
 	ret = uclass_get_device(UCLASS_DVFS, 0, &dev);
 	if (ret) {
-		printf("DVFS: Get dvfs device failed, ret=%d\n", ret);
+		if (ret != -ENODEV)
+			printf("DVFS: Get dvfs device failed, ret=%d\n", ret);
 		return ret;
 	}
 
diff --git a/drivers/power/dvfs/dvfs-uclass.c b/drivers/power/dvfs/dvfs-uclass.c
index abd04dcb5e..64778aaa8e 100644
--- a/drivers/power/dvfs/dvfs-uclass.c
+++ b/drivers/power/dvfs/dvfs-uclass.c
@@ -34,7 +34,8 @@ int dvfs_init(bool apply)
 
 	ret = uclass_get_device(UCLASS_DVFS, 0, &dev);
 	if (ret) {
-		printf("DVFS: Get dvfs device failed, ret=%d\n", ret);
+		if (ret != -ENODEV)
+			printf("DVFS: Get dvfs device failed, ret=%d\n", ret);
 		return ret;
 	}
 

commit a90f2861de2b6b54441e45664fd03e1cbb7fa567
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 26 20:58:28 2019 +0800

    lib: sysmem: fix NULL attr.name
    
    Change-Id: I93744c28668d1533ec2bcdaafc9198d8557284a1
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/lib/sysmem.c b/lib/sysmem.c
index b050177af1..f0b486d687 100644
--- a/lib/sysmem.c
+++ b/lib/sysmem.c
@@ -210,6 +210,8 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 		}
 		name = sysmem_alias2name(mem_name, (int *)&id);
 		attr = mem_attr[id];
+		if (!attr.name)
+			attr.name = strdup(name);
 	} else if (id > MEMBLK_ID_UNK && id < MEMBLK_ID_MAX) {
 		attr = mem_attr[id];
 		name = attr.name;

commit 618713d1f2e2bca0ca94522aa5a34b2806d2dfe0
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Nov 15 16:00:00 2018 +0800

    arm64: enable async error handler
    
    Enable the exception handler for async error so that we can get the
    abort before kernel.
    
    Change-Id: Ie0e7c89a0d03adf3b74b0d9ddf8c9117536dac6b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/lib/crt0_64.S b/arch/arm/lib/crt0_64.S
index d34e49cc8a..fad7f518c6 100644
--- a/arch/arm/lib/crt0_64.S
+++ b/arch/arm/lib/crt0_64.S
@@ -65,7 +65,25 @@
  */
 
 ENTRY(_main)
+#if defined(CONFIG_SPL_BUILD) && defined(DEBUG)
+	.equ SCTLR_A_BIT,		(1 << 1)
+	.equ SCTLR_SA_BIT,		(1 << 3)
+	.equ SCTLR_I_BIT,		(1 << 12)
 
+/*
+ * Enable the instruction cache, stack pointer
+ * and data access alignment checks
+ */
+	mov	x1, #(SCTLR_I_BIT | SCTLR_A_BIT | SCTLR_SA_BIT)
+	mrs	x0, sctlr_el3
+	orr	x0, x0, x1
+	msr	sctlr_el3, x0
+	isb
+/*
+ * Enable External Abort and SError
+ */
+	msr	daifclr, #4
+#endif
 /*
  * Set up initial C runtime environment and call board_init_f(0).
  */

commit 2d2b0663a109af1f541236e38c01d7b148df05fd
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Feb 12 15:19:07 2019 +0800

    rockchip: px5: update defconfig for TPL/SPL
    
    Change-Id: I4dcb2b3712fe87eece374c93cdc22d01edbd503a
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-px5_defconfig b/configs/evb-px5_defconfig
index bd59bc3e08..68fbce641d 100644
--- a/configs/evb-px5_defconfig
+++ b/configs/evb-px5_defconfig
@@ -1,29 +1,76 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_MALLOC_F_LEN=0x1000
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_TPL_MAX_SIZE=32768
 CONFIG_ROCKCHIP_RK3368=y
 CONFIG_ROCKCHIP_PX5=y
 CONFIG_TARGET_EVB_PX5=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x40000
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_PANIC_HANG=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
 CONFIG_DEFAULT_DEVICE_TREE="rk3368-px5-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
+CONFIG_BOOTSTAGE=y
+CONFIG_SPL_BOOTSTAGE=y
+CONFIG_BOOTSTAGE_REPORT=y
+CONFIG_BOOTSTAGE_FDT=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ARCH_EARLY_INIT_R=y
+CONFIG_SPL=y
+CONFIG_SPL_BOOTROM_SUPPORT=y
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_TPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x4000
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_TPL=y
+CONFIG_TPL_BOOTROM_SUPPORT=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_MMC=y
-CONFIG_CMD_CACHE=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_TPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent"
+CONFIG_TPL_OF_PLATDATA=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_TPL_DM=y
 CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_TPL_REGMAP=y
 CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_TPL_SYSCON=y
 CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_TPL_CLK=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
 CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
 CONFIG_DM_RESET=y
 CONFIG_DEBUG_UART_BASE=0xFF1c0000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_SYSRESET=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_TPL_TINY_MEMSET=y
+CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y

commit 1d0603dbce3485da9267d83d4b9f353417a48a42
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Feb 12 15:20:47 2019 +0800

    rockchip: px5: update SPL size for spl/tpl
    
    Change-Id: I447976f9030a59f18393027e8392a065d4c6c425
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/evb_px5.h b/include/configs/evb_px5.h
index 4160187d50..b6866b5f0d 100644
--- a/include/configs/evb_px5.h
+++ b/include/configs/evb_px5.h
@@ -10,5 +10,6 @@
 #include <configs/rk3368_common.h>
 
 #define CONFIG_CONSOLE_SCROLL_LINES	10
+#define CONFIG_SYS_MMC_ENV_DEV 0
 
 #endif
diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h
index 4f9105edac..5ef4a3b9f2 100644
--- a/include/configs/rk3368_common.h
+++ b/include/configs/rk3368_common.h
@@ -28,9 +28,10 @@
 
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_TEXT_BASE            0x00000000
-#define CONFIG_SPL_MAX_SIZE             0x40000
+#define CONFIG_SPL_MAX_SIZE             0x60000
 #define CONFIG_SPL_BSS_START_ADDR       0x400000
 #define CONFIG_SPL_BSS_MAX_SIZE         0x20000
+#define CONFIG_SPL_STACK		0x00188000
 
 #define GICD_BASE			0xffB71000
 #define GICC_BASE			0xffB72000

commit a739a3a9b7d60a7b5ae7a0b9f9b4a3c7a4eb6d97
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Jan 30 18:08:08 2019 +0800

    rockchip: px5 update dts for spl/tpl
    
    TPL need dmc to init ddr sdram, and emmc, boot-order.
    
    Change-Id: Ia783e1a47a7710bf618c556eefaf354b7097eacd
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi b/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi
index 3a5e30ea55..ce515853d0 100644
--- a/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi
+++ b/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi
@@ -3,6 +3,27 @@
  *
  * SPDX-License-Identifier:     GPL-2.0+	X11
  */
+/ {
+	chosen {
+		u-boot,spl-boot-order = &emmc;
+	};
+};
+
+&dmc {
+	u-boot,dm-pre-reloc;
+
+	/*
+	 * PX5-evb(2GB) need to use CBRD mode, or else the dram is not correct
+	 * See doc/device-tree-bindings/clock/rockchip,rk3368-dmc.txt for
+	 * details on the 'rockchip,memory-schedule' property and how it
+	 * affects the physical-address to device-address mapping.
+	 */
+	rockchip,memory-schedule = <DMC_MSCH_CBRD>;
+	rockchip,ddr-frequency = <800000000>;
+	rockchip,ddr-speed-bin = <DDR3_1600K>;
+
+	status = "okay";
+};
 
 &pinctrl {
 	u-boot,dm-pre-reloc;
@@ -21,6 +42,10 @@
 	u-boot,dm-pre-reloc;
 };
 
+&sgrf {
+        u-boot,dm-pre-reloc;
+};
+
 &cru {
 	u-boot,dm-pre-reloc;
 };
@@ -32,3 +57,7 @@
 &uart4 {
 	u-boot,dm-pre-reloc;
 };
+
+&emmc {
+	u-boot,dm-pre-reloc;
+};

commit d74e8763bbca548e053f60da392498b97717cd52
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Mar 26 16:10:35 2019 +0800

    rockchip: spl: always try to init stimer
    
    We always try to init stimer in case it's not init in previous stage,
    but don't re-init if it already work.
    
    Change-Id: I2133804560c6e31e51e6b2cb0a6e51b9544970d3
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index df60b15b93..1db0e2626c 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -64,7 +64,10 @@ u32 spl_boot_mode(const u32 boot_device)
 
 __weak void rockchip_stimer_init(void)
 {
-#ifdef CONFIG_SYS_ARCH_TIMER
+	/* If Timer already enabled, don't re-init it */
+	u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + 0x10);
+	if ( reg & 0x1 )
+		return;
 #ifndef CONFIG_ARM64
 	asm volatile("mcr p15, 0, %0, c14, c0, 0"
 		     : : "r"(COUNTER_FREQUENCY));
@@ -73,7 +76,6 @@ __weak void rockchip_stimer_init(void)
 	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
 	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
 	writel(1, CONFIG_ROCKCHIP_STIMER_BASE + 0x10);
-#endif
 }
 
 __weak int arch_cpu_init(void)
@@ -145,9 +147,7 @@ void board_init_f(ulong dummy)
 #endif
 #endif
 
-#if !defined(CONFIG_SUPPORT_TPL)
 	rockchip_stimer_init();
-#endif
 #define EARLY_UART
 #if defined(EARLY_UART) && defined(CONFIG_DEBUG_UART)
 	/*

commit 21379abcb5a9252da69d88c444e8ff407c16ee45
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Mar 26 08:58:45 2019 +0800

    rockchip: tpl: remove arch_cpu_init()
    
    The arch_cpu_init() should be done in SPL only.
    
    Change-Id: If96bad9694dbcb0d9821433d1f2cbead4517633c
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c
index 73e4ed386c..a6676e483a 100644
--- a/arch/arm/mach-rockchip/tpl.c
+++ b/arch/arm/mach-rockchip/tpl.c
@@ -114,11 +114,6 @@ __weak void rockchip_stimer_init(void)
 	writel(1, CONFIG_ROCKCHIP_STIMER_BASE + 0x10);
 }
 
-__weak int arch_cpu_init(void)
-{
-	return 0;
-}
-
 void board_init_f(ulong dummy)
 {
 #if defined(CONFIG_SPL_FRAMEWORK) && !CONFIG_IS_ENABLED(TINY_FRAMEWORK)
@@ -127,7 +122,6 @@ void board_init_f(ulong dummy)
 #endif
 
 	rockchip_stimer_init();
-	arch_cpu_init();
 #define EARLY_DEBUG
 #ifdef EARLY_DEBUG
 	/*

commit ddc9405d5b187854d748d65682f593fc8f675dc1
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Mar 25 18:10:06 2019 +0800

    rockchip: spl: move arch_cpu_init() after spl_init()
    
    arch_cpu_init() may use DM to get cru handler.
    
    Change-Id: I5f2daa4718bcdcc5a4aa5601d26e9f4f31a01b69
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index 2c1ffe5ab0..df60b15b93 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -147,7 +147,6 @@ void board_init_f(ulong dummy)
 
 #if !defined(CONFIG_SUPPORT_TPL)
 	rockchip_stimer_init();
-	arch_cpu_init();
 #endif
 #define EARLY_UART
 #if defined(EARLY_UART) && defined(CONFIG_DEBUG_UART)
@@ -183,6 +182,7 @@ void board_init_f(ulong dummy)
 	sdram_init();
 #endif
 
+	arch_cpu_init();
 	rk_board_init_f();
 #if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
 	back_to_bootrom(BROM_BOOT_NEXTSTAGE);

commit f67455c9588975a81fabdb8cb13be0a4a9bfaf9e
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Jan 29 11:53:09 2019 +0800

    rockchip: add CONFIG_ROCKCHIP_PX5 soc type variant
    
    Add variant for evb-px5
    
    Change-Id: Id7bfa9719f3283f2dccc674b7e194c16d7ac7f65
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 36ec749a04..880171f022 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -283,6 +283,12 @@ config ROCKCHIP_RK3368
 
 if ROCKCHIP_RK3368
 
+config ROCKCHIP_PX5
+	bool "Support Rockchip PX5"
+	help
+	  PX5 is a variant of RK3368, it shares codes with RK3368, but we still
+	  need this macro to distinguish PX5 and RK3368.
+
 config TPL_LDSCRIPT
 	default "arch/arm/mach-rockchip/rk3368/u-boot-tpl.lds"
 
diff --git a/configs/evb-px5_defconfig b/configs/evb-px5_defconfig
index e9f2c05265..bd59bc3e08 100644
--- a/configs/evb-px5_defconfig
+++ b/configs/evb-px5_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x1000
 CONFIG_ROCKCHIP_RK3368=y
+CONFIG_ROCKCHIP_PX5=y
 CONFIG_TARGET_EVB_PX5=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3368-px5-evb"
 CONFIG_DEBUG_UART=y

commit 33baa40f0f5304845e01ec5f69ba2293a5e15d4d
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Jan 29 11:51:40 2019 +0800

    rockchip: rk3368: support UART4 in board_debug_uart_init()
    
    PX5 evb is using UART4
    
    Change-Id: I16ae5c7037123ef1c9d1c793e11d48081214b433
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3368/rk3368.c b/arch/arm/mach-rockchip/rk3368/rk3368.c
index 0bfe39d5f3..5fe2f3f19f 100644
--- a/arch/arm/mach-rockchip/rk3368/rk3368.c
+++ b/arch/arm/mach-rockchip/rk3368/rk3368.c
@@ -254,6 +254,25 @@ void board_debug_uart_init(void)
 		     GPIO2D0_MASK, GPIO2D0_UART0_SIN);
 	rk_clrsetreg(&grf->gpio2d_iomux,
 		     GPIO2D1_MASK, GPIO2D1_UART0_SOUT);
+#elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff1c0000)
+	struct rk3368_pmu_grf * const pmugrf __maybe_unused =
+		(struct rk3368_pmu_grf * const)0xff738000;
+
+	enum {
+		/* UART4 */
+		GPIO0D2_MASK		= GENMASK(5, 4),
+		GPIO0D2_GPIO		= 0,
+		GPIO0D2_UART4_SOUT	= (3 << 4),
+
+		GPIO0D3_MASK		= GENMASK(7, 6),
+		GPIO0D3_GPIO		= 0,
+		GPIO0D3_UART4_SIN	= (3 << 6),
+	};
+
+	/* Enable early UART4 on the PX5 */
+	rk_clrsetreg(&pmugrf->gpio0d_iomux,
+		     GPIO0D2_MASK | GPIO0D3_MASK,
+		     GPIO0D2_UART4_SOUT | GPIO0D3_UART4_SIN);
 #elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff690000)
 	/* Enable early UART2 on the RK3368 */
 	rk_clrsetreg(&grf->gpio2a_iomux,

commit 903381d2b2db2b884dacd54e52c6002a275f1e13
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Jan 29 11:50:47 2019 +0800

    make.sh: support PX5
    
    Update rule to support PX5
    
    Change-Id: I67660165d78eb388e047fbf2189e493265dd45ad
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/make.sh b/make.sh
index fd9780c237..023e539dfa 100755
--- a/make.sh
+++ b/make.sh
@@ -324,7 +324,7 @@ select_chip_info()
 	#  - PX30, PX3SE
 	#  - RK????, RK????X
 	#  - RV????
-	local chip_reg='^CONFIG_ROCKCHIP_[R,P][X,V,K][0-9ESX]{2,5}'
+	local chip_reg='^CONFIG_ROCKCHIP_[R,P][X,V,K][0-9ESX]{1,5}'
 	count=`egrep -c ${chip_reg} ${OUTDIR}/.config`
 	# Obtain the matching only
 	RKCHIP=`egrep -o ${chip_reg} ${OUTDIR}/.config`
@@ -345,6 +345,8 @@ select_chip_info()
 			&& RKCHIP=RK3326
 		grep '^CONFIG_ROCKCHIP_RK3128X=y' ${OUTDIR}/.config >/dev/null \
 			&& RKCHIP=RK3128X
+		grep '^CONFIG_ROCKCHIP_PX5=y' ${OUTDIR}/.config >/dev/null \
+			&& RKCHIP=PX5
 		grep '^CONFIG_ROCKCHIP_RK3399PRO=y' ${OUTDIR}/.config >/dev/null \
 			&& RKCHIP=RK3399PRO
 	else

commit 892d0a7f9b16098a22ef0115c3850247a28fb638
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Mar 15 10:25:57 2019 +0800

    common: android: remove unnesscessary message
    
    Change-Id: Iaa5da7da492f3fcb8021d175bb9a39a04d7f61d0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 2a652e47f5..68535abbc8 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -799,10 +799,8 @@ int android_fdt_overlay_apply(void *fdt_addr)
 	android_print_contents(hdr);
 #endif
 
-	if (android_image_check_header(hdr)) {
-		printf("%s: Invalid Android header %s\n", __func__, hdr->magic);
+	if (android_image_check_header(hdr))
 		return -EINVAL;
-	}
 
 	/* Check header version */
 	if (!hdr->header_version) {

commit 2a14a50bdef4de7604536b8ecdb9183642e131f6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Mar 15 10:45:22 2019 +0800

    common: rkimg: add hotkey for sysmem and bidram dump
    
    Change-Id: I32ded101c764df18f66916dd863145ace81d35be
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 66a5dfebda..49bc241f69 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -15,6 +15,8 @@
 #include <asm/arch/boot_mode.h>
 #include <asm/io.h>
 #include <part.h>
+#include <bidram.h>
+#include <console.h>
 #include <sysmem.h>
 
 #define TAG_KERNEL			0x4C4E524B
@@ -522,6 +524,11 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 
 	fdt_ramdisk_skip_relocation();
 
+	if (gd->console_evt == CONSOLE_EVT_CTRL_M) {
+		bidram_dump();
+		sysmem_dump();
+	}
+
 #if defined(CONFIG_ARM64)
 	char cmdbuf[64];
 	sprintf(cmdbuf, "booti 0x%lx 0x%lx:0x%x 0x%lx",

commit 32c868cf114c57c821622037ec28147285f3663e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Mar 15 10:45:02 2019 +0800

    common: android: add hotkey for sysmem and bidram dump
    
    Change-Id: Ic866dcc2b160ebd92d518e517e0bc8870aec84d0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 2b0a5864e4..2a652e47f5 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -22,8 +22,12 @@
 #include <keymaster.h>
 #include <linux/libfdt_env.h>
 #include <optee_include/OpteeClientInterface.h>
+#include <bidram.h>
+#include <console.h>
 #include <sysmem.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #define ANDROID_PARTITION_BOOT "boot"
 #define ANDROID_PARTITION_MISC "misc"
 #define ANDROID_PARTITION_OEM  "oem"
@@ -332,6 +336,11 @@ int android_bootloader_boot_kernel(unsigned long kernel_address)
 		printf("Booting kernel at %s with fdt at %s...\n\n\n",
 		       kernel_addr_r, fdt_addr);
 
+	if (gd->console_evt == CONSOLE_EVT_CTRL_M) {
+		bidram_dump();
+		sysmem_dump();
+	}
+
 	do_bootm(NULL, 0, 4, bootm_args);
 
 	return -1;
diff --git a/include/console.h b/include/console.h
index c5eac9cba2..3af98a622a 100644
--- a/include/console.h
+++ b/include/console.h
@@ -13,6 +13,7 @@ extern char console_buffer[];
 #define CONSOLE_EVT_CTRL_B	0x02
 #define CONSOLE_EVT_CTRL_D	0x04
 #define CONSOLE_EVT_CTRL_F	0x06
+#define CONSOLE_EVT_CTRL_M	0x0D
 
 /* common/console.c */
 int console_init_f(void);	/* Before relocation; uses the serial  stuff */

commit da051cc8bbb62b506d838dcb8ceb0a7837be305e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Mar 8 17:21:24 2019 +0800

    rockchip: add ctrl+f hotkey to enter fastboot mode
    
    Change-Id: I1f0a98793307b5a261958fe8c29da3271f2d8e4e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index a738bfd79c..f271c5b945 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -164,6 +164,8 @@ void rockchip_dnl_mode_check(void)
 			printf("recovery key pressed, entering recovery mode!\n");
 			env_set("reboot_mode", "recovery");
 		}
+	} else if (gd->console_evt == CONSOLE_EVT_CTRL_F) {
+		env_set("reboot_mode", "fastboot");
 	}
 }
 
diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 9c2aedf03d..66a5dfebda 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -364,9 +364,14 @@ int rockchip_get_boot_mode(void)
 	 * USB attach will do env_set("reboot_mode", "recovery");
 	 */
 	env_reboot_mode = env_get("reboot_mode");
-	if (env_reboot_mode && !strcmp(env_reboot_mode, "recovery")) {
-		boot_mode = BOOT_MODE_RECOVERY;
-		printf("boot mode: recovery\n");
+	if (env_reboot_mode) {
+		if (!strcmp(env_reboot_mode, "recovery")) {
+			boot_mode = BOOT_MODE_RECOVERY;
+			printf("boot mode: recovery\n");
+		} else if (!strcmp(env_reboot_mode, "fastboot")) {
+			boot_mode = BOOT_MODE_BOOTLOADER;
+			printf("boot mode: fastboot\n");
+		}
 	}
 
 	if (boot_mode != -1)
diff --git a/include/console.h b/include/console.h
index d72c8cdf35..c5eac9cba2 100644
--- a/include/console.h
+++ b/include/console.h
@@ -12,6 +12,7 @@ extern char console_buffer[];
 
 #define CONSOLE_EVT_CTRL_B	0x02
 #define CONSOLE_EVT_CTRL_D	0x04
+#define CONSOLE_EVT_CTRL_F	0x06
 
 /* common/console.c */
 int console_init_f(void);	/* Before relocation; uses the serial  stuff */

commit 309d75e75589415a91feba58ea385e1ec28759b9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Mar 15 10:11:45 2019 +0800

    command: board_f/r: add sysmem and bidram
    
    During board_f sequence, it's able to add any count of dram banks
    and validate memory layout after reserve_xxx() done, stop bootflow
    if there is something wrong.
    
    During board_r sequence, it's able to manage all memory blocks and
    add reserve memory blocks for bi_dram[] at late bootflow, it's
    nesscessary for AMP boot.
    
    Change-Id: I4443a809792bb04e205bb26d79870c85cb5fe7bd
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/board_f.c b/common/board_f.c
index 888dc367ae..f898e42edd 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -40,6 +40,7 @@
 #include <asm/sections.h>
 #include <dm/root.h>
 #include <linux/errno.h>
+#include <sysmem.h>
 
 /*
  * Pointer to initial global data area
@@ -874,6 +875,9 @@ static const init_fnc_t init_sequence_f[] = {
 	reserve_stacks,
 	dram_init_banksize,
 	show_dram_config,
+#ifdef CONFIG_SYSMEM
+	sysmem_init,		/* Validate above reserve memory */
+#endif
 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
 	defined(CONFIG_SH)
 	setup_board_part1,
diff --git a/common/board_r.c b/common/board_r.c
index 5d550f0446..e49e30c8c2 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -56,6 +56,7 @@
 #include <linux/err.h>
 #include <efi_loader.h>
 #include <sysmem.h>
+#include <bidram.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -767,8 +768,11 @@ static init_fnc_t init_sequence_r[] = {
 #endif
 	initr_barrier,
 	initr_malloc,
+#ifdef CONFIG_BIDRAM
+	bidram_initr,
+#endif
 #ifdef CONFIG_SYSMEM
-	sysmem_init,		/* After malloc setup */
+	sysmem_initr,
 #endif
 	log_init,
 	initr_bootstage,	/* Needs malloc() but has its own timer */

commit 86f870d669efdb2002f01fb2c511e0dd646bf43e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Mar 14 19:57:18 2019 +0800

    rockchip: board: import bidram for GD board bi_dram[]
    
    Change-Id: I9183f3664aa770bb5139cf635136834a206b75f5
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 2a79de49ee..16136442df 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -5,8 +5,10 @@
  */
 #include <common.h>
 #include <clk.h>
+#include <bidram.h>
 #include <dm.h>
 #include <debug_uart.h>
+#include <memblk.h>
 #include <ram.h>
 #include <syscon.h>
 #include <sysmem.h>
@@ -481,6 +483,39 @@ void board_lmb_reserve(struct lmb *lmb)
 }
 #endif
 
+#ifdef CONFIG_BIDRAM
+int board_bidram_reserve(struct bidram *bidram)
+{
+	struct memblock mem;
+	int ret;
+
+	/* ATF */
+	mem = param_parse_atf_mem();
+	ret = bidram_reserve(MEMBLK_ID_ATF, mem.base, mem.size);
+	if (ret)
+		return ret;
+
+	/* PSTORE/ATAGS/SHM */
+	mem = param_parse_common_resv_mem();
+	ret = bidram_reserve(MEMBLK_ID_SHM, mem.base, mem.size);
+	if (ret)
+		return ret;
+
+	/* OP-TEE */
+	mem = param_parse_optee_mem();
+	ret = bidram_reserve(MEMBLK_ID_OPTEE, mem.base, mem.size);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
+parse_fn_t board_bidram_parse_fn(void)
+{
+	return param_parse_ddr_mem;
+}
+#endif
+
 #if defined(CONFIG_ROCKCHIP_PRELOADER_SERIAL) && \
     defined(CONFIG_ROCKCHIP_PRELOADER_ATAGS)
 int board_init_f_init_serial(void)
diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
index cb4e46a9d3..f71aacc9cd 100644
--- a/arch/arm/mach-rockchip/sdram_common.c
+++ b/arch/arm/mach-rockchip/sdram_common.c
@@ -5,7 +5,7 @@
  */
 
 #include <common.h>
-#include <memblk.h>
+#include <bidram.h>
 #include <dm.h>
 #include <ram.h>
 #include <asm/io.h>
@@ -18,180 +18,6 @@ DECLARE_GLOBAL_DATA_PTR;
 #define PARAM_DRAM_INFO_OFFSET 0x2000000
 #define TRUST_PARAMETER_OFFSET    (34 * 1024 * 1024)
 
-#if defined(CONFIG_SPL_FRAMEWORK) || !defined(CONFIG_SPL_OF_PLATDATA)
-
-#define SDRAM_OFFSET(offset)	(CONFIG_SYS_SDRAM_BASE + (offset))
-#define NOT_INITIAL		-1
-static int __dram_init_banksize(int resv_tee)
-{
-	struct memblock prop;
-	size_t top = min((unsigned long)(gd->ram_size + CONFIG_SYS_SDRAM_BASE),
-			 gd->ram_top);
-	u64 start[CONFIG_NR_DRAM_BANKS], size[CONFIG_NR_DRAM_BANKS];
-	u64 tos_addr, atf_addr;
-	u64 tos_size, atf_size;
-	int i, idx = NOT_INITIAL;
-
-	prop = param_parse_atf_mem();
-	atf_addr = prop.base;
-	atf_size = prop.size;
-	prop = param_parse_optee_mem();
-	tos_addr = prop.base;
-	tos_size = prop.size;
-
-	/*
-	 * Reserve region for ATF bl31
-	 *
-	 * What ever U-Boot runs on AArch64 or AArch32 mode, the bl31 is always
-	 * present and AArch64 mode, let's reserve it.
-	 *
-	 * Maybe:
-	 *	1. ATF region is from 0x0 offset and 1MB size(legacy);
-	 *	2. ATF region is from 0x0 offset but not 1MB size;
-	 *	3. ATF region is not from 0x0 offset but within 1MB;
-	 *
-	 * 1. The "*****" means visible region to kernel.
-	 * 2. 1M~2M is always reserved in ARM64 for pstore, shmem, etc.
-	 *
-	 *
-	 * Possible memory layout:
-	 *
-	 * Leagcy:
-	 *	 |------------o-------o------------------------|
-	 *	 |     ATF    | RES   |************************|
-	 *	 |------------o-------o------------------------|
-	 *	 0x0          1M      2M                      .....
-	 *
-	 *
-	 * New:
-	 *	 |-----|------o-------o------------------------|
-	 *	 | ATF |******| RES   |************************|
-	 *	 |-----|------o-------o------------------------|
-	 *	 0x0          1M      2M                      .....
-	 *
-	 *
-	 *	 |----|---|---o-------o------------------------|
-	 *	 |****|ATF|***| RES   |************************|
-	 *	 |----|---|---o-------o------------------------|
-	 *	 0x0  64K     1M      2M                      .....
-	 *
-	 * Note: these are only initilized once from dram_init_banksize(),
-	 *       which is before relocation.
-	 */
-	if (atf_size && !(gd->flags & GD_FLG_RELOC)) {
-		idx = 0;
-		memset(size, 0, sizeof(size));
-
-		start[0] = SDRAM_OFFSET(0);
-		 size[0] = atf_addr - start[0];
-		start[1] = atf_addr + atf_size;
-		 size[1] = SDRAM_OFFSET(SZ_1M) - start[1];
-		start[2] = SDRAM_OFFSET(SZ_2M);
-		 size[2] = top - start[2];
-
-		for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
-			if (!size[i])
-				continue;
-
-			gd->bd->bi_dram[idx].start = start[i];
-			gd->bd->bi_dram[idx].size = size[i];
-			idx++;
-		}
-	/* There is no bl31, fill whole ram size */
-	} else if (!(gd->flags & GD_FLG_RELOC)) {
-		gd->bd->bi_dram[0].start = SDRAM_OFFSET(0);
-		gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start;
-	} else {
-		/*
-		 * Do nothing for bl31 when called from dram_initr_banksize(),
-		 * which is after relocation.
-		 */
-	}
-
-	/*
-	 * Reserve region for OP-TEE
-	 *
-	 * What ever U-Boot runs on AArch64 or AArch32 mode, the OP-TEE is
-	 * AArch64 mode.
-	 *
-	 * For OP-TEE:
-	 *	AArch64: dcache is enabled;
-	 *	AArch32: dcache is disabled(due to some unknown issues);
-	 *
-	 * For the data coherence, U-Boot has to follow the OP-TEE dcache
-	 * policy to map MMU attributes of OP-TEE region.
-	 *
-	 * For AArch64: MMU translate table is created manual by rkxxx.c file
-	 * and all memory region is mapped, that's good to match OP-TEE policy.
-	 * For AArch32: MMU translate table is setup according to bi_dram[..]
-	 * that OP-TEE region has been reserved and would not be mapped,
-	 * i.e. dcache is disabled, that's also good to match OP-TEE policy.
-	 *
-	 * When CONFIG_ARM64_BOOT_AARCH32 is enabled, U-Boot runs on AArch32
-	 * while OP-TEE runs on AArch64. U-Boot shouldn't reserved OP-TEE region
-	 * too early and should map MMU translate table of it(in intir_cache()).
-	 * So we reserve the region in dram_initr_banksize() after MMU setup.
-	 *
-	 *
-	 *	The are two kinds of OP-TEE memory layout
-	 *
-	 * legacy:
-	 * 	|----|-------o---------------------------------|
-	 * 	|....| OPTEE |*********************************|
-	 * 	|----|-------o---------------------------------|
-	 * 	0x0 2M      6M(or more)                 .....
-	 *
-	 * new:
-	 * 	|----|-------------------o-------o-------------|
-	 * 	|....|*******************| OPTEE |*************|
-	 * 	|----|-------------------o-------o-------------|
-	 * 	0x0  2M                132M     164M(or less) .....
-	 */
-
-	if (resv_tee && tos_size) {
-		/* If idx is not initialized, calculate idx */
-		if (idx == NOT_INITIAL) {
-			for (idx = 0; idx < CONFIG_NR_DRAM_BANKS; idx++) {
-				if (!gd->bd->bi_dram[idx].size)
-					break;
-			}
-		}
-
-		if (tos_addr == SZ_2M) {
-			gd->bd->bi_dram[idx - 1].start = tos_addr + tos_size;
-			gd->bd->bi_dram[idx - 1].size =
-					top - gd->bd->bi_dram[idx - 1].start;
-		} else {
-			gd->bd->bi_dram[idx - 1].size = tos_addr -
-					gd->bd->bi_dram[idx - 1].start;
-			gd->bd->bi_dram[idx].start = tos_addr + tos_size;
-			gd->bd->bi_dram[idx].size =
-					top - gd->bd->bi_dram[idx].start;
-		}
-#ifdef DEBUG
-		for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
-			debug("%s: bank[%d]=0x%llx-0x%llx\n",
-			      __func__, i, (u64)gd->bd->bi_dram[i].start,
-			      (u64)gd->bd->bi_dram[i].start +
-			      gd->bd->bi_dram[i].size);
-		}
-#endif
-	}
-
-	return 0;
-}
-
-/*
- * !defined(CONFIG_ARM64_BOOT_AARCH32) means: U-Boot and OP-TEE both run
- * on AArch32 or AArch64, they are same mode. Otherwise OP-TEE is AArch64
- * while U-Boot is AArch32. There is data cache coherence issue to fix.
- */
-int dram_init_banksize(void)
-{
-	return __dram_init_banksize(!IS_ENABLED(CONFIG_ARM64_BOOT_AARCH32));
-}
-#endif
-
 size_t rockchip_sdram_size(phys_addr_t reg)
 {
 	u32 rank, cs0_col, bk, cs0_row, cs1_row, bw, row_3_4;
@@ -343,47 +169,18 @@ unsigned int get_ddr_bw(void)
 }
 
 #if defined(CONFIG_SPL_FRAMEWORK) || !defined(CONFIG_SPL_OF_PLATDATA)
-int dram_init(void)
+int dram_init_banksize(void)
 {
-	struct ram_info ram;
-	struct udevice *dev;
-	int ret;
-
-	/* New way: atags info */
-#ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
-	struct tag *t = NULL;
-	int i, count;
-
-	t = atags_get_tag(ATAG_DDR_MEM);
-	if (t && t->u.ddr_mem.count) {
-		gd->ram_size = 0;
-		count = t->u.ddr_mem.count;
+	bidram_gen_gd_bi_dram();
 
-		for (i = 0; i < count; i++) {
-			gd->ram_size += t->u.ddr_mem.bank[i + count];
-			debug("%s: ram[%d] start=0x%08llx, size=0x%08llx, sum=0x%08llx\n",
-			      __func__, i, (u64)gd->bd->bi_dram[i].start,
-			      (u64)gd->bd->bi_dram[i].size, (u64)gd->ram_size);
-		}
-
-		return 0;
-	}
-#endif
+	return 0;
+}
 
-	/* Legacy way: os registers */
-	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
-	if (ret) {
-		debug("DRAM init failed: %d\n", ret);
-		return ret;
-	}
-	ret = ram_get_info(dev, &ram);
-	if (ret) {
-		debug("Cannot get DRAM size: %d\n", ret);
-		return ret;
-	}
-	gd->ram_size = ram.size;
-	debug("SDRAM base=%lx, size=%lx\n",
-	      (unsigned long)ram.base, (unsigned long)ram.size);
+int dram_init(void)
+{
+	gd->ram_size = bidram_get_ram_size();
+	if (!gd->ram_size)
+		return -ENOMEM;
 
 	return 0;
 }

commit b9bc76b4e104a91a212ea42d451dc52d237b5629
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Mar 18 10:15:01 2019 +0800

    rockchip: param: add ddr memory region parse
    
    Change-Id: I7d59ee54a82da57b62970f4bc47faded60ba6ac8
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/param.h b/arch/arm/include/asm/arch-rockchip/param.h
index 5cd8538e1b..dbfb1fb27f 100644
--- a/arch/arm/include/asm/arch-rockchip/param.h
+++ b/arch/arm/include/asm/arch-rockchip/param.h
@@ -9,6 +9,14 @@
 
 #include <memblk.h>
 
+/**
+ * param_parse_ddr_mem() - Parse ddr memory region
+ *
+ * @out_count: valid count of memblock for memblock list.
+ * @return memblock structure list which contains base and size info.
+ */
+struct memblock *param_parse_ddr_mem(int *out_count);
+
 /**
  * param_parse_atf_mem() - Parse atf memory region
  *
diff --git a/arch/arm/mach-rockchip/param.c b/arch/arm/mach-rockchip/param.c
index 3e1bdca38e..8f88958192 100644
--- a/arch/arm/mach-rockchip/param.c
+++ b/arch/arm/mach-rockchip/param.c
@@ -195,3 +195,69 @@ int param_parse_bootdev(char **devtype, char **devnum)
 
 	return -ENOSYS;
 }
+
+struct memblock *param_parse_ddr_mem(int *out_count)
+{
+	struct udevice *dev;
+	struct memblock *mem;
+	struct ram_info ram;
+	int i, ret, count;
+
+	/*
+	 * Get memory region of DDR
+	 *
+	 * 1. New: atags info;
+	 * 2. Leagcy: os register;
+	 */
+#ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
+	struct tag *t;
+
+	t = atags_get_tag(ATAG_DDR_MEM);
+	if (t && t->u.ddr_mem.count) {
+		count = t->u.ddr_mem.count;
+		mem = calloc(count, sizeof(*mem));
+		if (!mem) {
+			printf("Calloc ddr memory failed\n");
+			return 0;
+		}
+
+		for (i = 0; i < count; i++) {
+			mem[i].base = t->u.ddr_mem.bank[i];
+			mem[i].size = t->u.ddr_mem.bank[i + count];
+		}
+
+		*out_count = count;
+		return mem;
+	}
+#endif
+
+	/* Leagcy */
+	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
+	if (ret) {
+		debug("DRAM init failed: %d\n", ret);
+		return NULL;
+	}
+	ret = ram_get_info(dev, &ram);
+	if (ret) {
+		debug("Cannot get DRAM size: %d\n", ret);
+		return NULL;
+	}
+
+	debug("SDRAM base=%lx, size=%lx\n",
+	      (unsigned long)ram.base, (unsigned long)ram.size);
+
+	count = 1;
+	mem = calloc(1, sizeof(*mem));
+	if (!mem) {
+		printf("Calloc ddr memory failed\n");
+		return 0;
+	}
+
+	for (i = 0; i < count; i++) {
+		mem[i].base = CONFIG_SYS_SDRAM_BASE;
+		mem[i].size = ram.size;
+	}
+
+	*out_count = count;
+	return mem;
+}

commit 483d0493217503c55708e8f9261c25d700fb87cb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Mar 14 18:34:30 2019 +0800

    lib: introduce bidram for GD board bi_dram[] memory management
    
    Some platform provides more than one dram banks and reserved firmware
    regions (eg. ATF, OP-TEE, etc) by pre-loader dynamically. It means
    there are memory holes in board dram layout. What's more, U-Boot will
    reserved regions at the late bootflow(eg. firmware reserved for AMP).
    
    So we introduce bidram mechanism to manage GD board bi_dram[], which
    provides a way to easily manage memory holes and update bi_dram[]. It
    dpends on LMB which provides a good algorithm to manage memory blocks.
    
    What's different from sysmem?
    - bidram manage and pass the avaliable memory blocks to kernel;
    - sysmem is only for U-Boot memory management to avoid ram overlap,
      it doesn't matter about kernel avaliable memory.
    
    Change-Id: I697cbb80bdc961e4ad5ab94548e2dc93feefde6f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/bidram.h b/include/bidram.h
new file mode 100644
index 0000000000..3b39d442fd
--- /dev/null
+++ b/include/bidram.h
@@ -0,0 +1,81 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _BIDRAM_H
+#define _BIDRAM_H
+
+#include <memblk.h>
+
+typedef struct memblock *(*parse_fn_t)(int *);
+
+struct bidram {
+	struct lmb lmb;
+	struct list_head reserved_head;
+	bool has_init;
+};
+
+/**
+ * bidram_initr() - Initial bidram after relocation.
+ *
+ * @return 0 on success, otherwise error
+ */
+int bidram_initr(void);
+
+/**
+ * bidram_get_ram_size() - Initial bidram and get ram size.
+ *
+ * @parse_fn: function to parse ddr memory regions
+ *
+ * @return ram size, 0 on success, otherwise the effect ram size.
+ */
+phys_size_t bidram_get_ram_size(void);
+
+/**
+ * bidram_gen_gd_bi_dram() - Update gd->bd->bi_dram[] according to bidram state.
+ */
+void bidram_gen_gd_bi_dram(void);
+
+/**
+ * bidram_reserve() - Reserve bidram region
+ *
+ * @id: memblk id
+ * @base: region base address
+ * @size: region size
+ *
+ * @return 0 on success, otherwise error
+ */
+int bidram_reserve(enum memblk_id id, phys_addr_t base, phys_size_t size);
+
+/**
+ * bidram_reserve_by_name() - Reserve bidram region by name
+ *
+ * @name: region name
+ * @base: region base address
+ * @size: region size
+ *
+ * @return 0 on success, otherwise error
+ */
+int bidram_reserve_by_name(const char *name, phys_addr_t base, phys_size_t size);
+
+/**
+ * bidram_dump_all() - Dump all bidram stat
+ */
+void bidram_dump(void);
+
+/**
+ * board_bidram_parse_fn() - Weak function for board to implement
+ */
+parse_fn_t board_bidram_parse_fn(void);
+
+/**
+ * board_bidram_reserve() - Weak function for board to implement
+ *
+ * @bidram: global bidram point, ignored
+ *
+ * @return 0 on success, otherwise error
+ */
+int board_bidram_reserve(struct bidram *bidram);
+
+#endif /* _BIDRAM_H */
diff --git a/lib/Kconfig b/lib/Kconfig
index 0699984837..c1aca36303 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -105,6 +105,12 @@ config SYSMEM
 	help
 	  This enables support for system permanent memory management.
 
+config BIDRAM
+	bool "GD board bi_dram[] memory management"
+	default y
+	help
+	  This enables support for GD board bi_dram[] memory management.
+
 source lib/dhry/Kconfig
 
 menu "Security support"
diff --git a/lib/Makefile b/lib/Makefile
index e417c794df..30f195b66f 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -31,6 +31,7 @@ obj-y += initcall.o
 obj-$(CONFIG_LMB) += lmb.o
 ifdef CONFIG_LMB
 obj-$(CONFIG_SYSMEM) += sysmem.o
+obj-$(CONFIG_BIDRAM) += bidram.o
 endif
 obj-y += ldiv.o
 obj-$(CONFIG_LZ4) += lz4_wrapper.o
diff --git a/lib/bidram.c b/lib/bidram.c
new file mode 100644
index 0000000000..d39f5b14ae
--- /dev/null
+++ b/lib/bidram.c
@@ -0,0 +1,428 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <lmb.h>
+#include <bidram.h>
+#include <malloc.h>
+#include <sysmem.h>
+#include <asm/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define MAX_BAD_MEMBLK		8
+
+#define BIDRAM_R(fmt, args...)	printf(fmt, ##args)
+#define BIDRAM_I(fmt, args...)	printf("Bidram: "fmt, ##args)
+#define BIDRAM_W(fmt, args...)	printf("Bidram Warn: "fmt, ##args)
+#define BIDRAM_E(fmt, args...)	printf("Bidram Error: "fmt, ##args)
+#define BIDRAM_D(fmt, args...)	 debug("Bidram Debug: "fmt, ##args)
+
+struct bidram plat_bidram __section(".data") = { .has_init = false, };
+
+static int bidram_has_init(void)
+{
+	if (!plat_bidram.has_init) {
+		BIDRAM_E("Framework is not initialized\n");
+		return 0;
+	}
+
+	return 1;
+}
+
+void bidram_dump(void)
+{
+	struct bidram *bidram = &plat_bidram;
+	struct lmb *lmb = &bidram->lmb;
+	struct memblock *mem;
+	struct list_head *node;
+	ulong memory_size = 0;
+	ulong reserved_size = 0;
+	ulong i;
+
+	if (!bidram_has_init())
+		return;
+
+	printf("\n\nbidram_dump_all:\n");
+
+	/* Memory pool */
+	printf("    --------------------------------------------------------------------\n");
+	for (i = 0; i < lmb->memory.cnt; i++) {
+		memory_size += lmb->memory.region[i].size;
+		printf("    memory.rgn[%ld].addr     = 0x%08lx - 0x%08lx (size: 0x%08lx)\n", i,
+		       (ulong)lmb->memory.region[i].base,
+		       (ulong)lmb->memory.region[i].base +
+		       (ulong)lmb->memory.region[i].size,
+		       (ulong)lmb->memory.region[i].size);
+	}
+	printf("\n    memory.total	   = 0x%08lx (%ld MiB. %ld KiB)\n",
+	       (ulong)memory_size,
+	       SIZE_MB((ulong)memory_size),
+	       SIZE_KB((ulong)memory_size));
+
+	/* Reserved */
+	i = 0;
+	printf("    --------------------------------------------------------------------\n");
+	list_for_each(node, &bidram->reserved_head) {
+		mem = list_entry(node, struct memblock, node);
+		reserved_size += mem->size;
+		printf("    reserved.rgn[%ld].name   = \"%s\"\n", i, mem->attr.name);
+		printf("		   .addr   = 0x%08lx - 0x%08lx (size: 0x%08lx)\n",
+		       (ulong)mem->base, (ulong)mem->base + (ulong)mem->size,
+		       (ulong)mem->size);
+		i++;
+	}
+	printf("\n    reserved.total	   = 0x%08lx (%ld MiB. %ld KiB)\n",
+	       (ulong)reserved_size,
+	       SIZE_MB((ulong)reserved_size),
+	       SIZE_KB((ulong)reserved_size));
+
+	/* LMB core reserved */
+	printf("    --------------------------------------------------------------------\n");
+	reserved_size = 0;
+	for (i = 0; i < lmb->reserved.cnt; i++) {
+		reserved_size += lmb->reserved.region[i].size;
+		printf("    LMB.reserved[%ld].addr   = 0x%08lx - 0x%08lx (size: 0x%08lx)\n", i,
+		       (ulong)lmb->reserved.region[i].base,
+		       (ulong)lmb->reserved.region[i].base +
+		       (ulong)lmb->reserved.region[i].size,
+		       (ulong)lmb->reserved.region[i].size);
+	}
+
+	printf("\n    reserved.core.total	   = 0x%08lx (%ld MiB. %ld KiB)\n",
+	       (ulong)reserved_size,
+	       SIZE_MB((ulong)reserved_size),
+	       SIZE_KB((ulong)reserved_size));
+	printf("    --------------------------------------------------------------------\n\n");
+}
+
+static int bidram_add(phys_addr_t base, phys_size_t size)
+{
+	struct bidram *bidram = &plat_bidram;
+	int ret;
+
+	if (!bidram_has_init())
+		return -ENOSYS;
+
+	if (!size)
+		return -EINVAL;
+
+	ret = lmb_add(&bidram->lmb, base, size);
+	if (ret < 0)
+		BIDRAM_E("Failed to add bidram at 0x%08lx - 0x%08lx\n",
+			 (ulong)base, (ulong)(base + size));
+
+	return (ret >= 0) ? 0 : ret;
+}
+
+void bidram_gen_gd_bi_dram(void)
+{
+	struct lmb *lmb = &plat_bidram.lmb;
+	struct lmb_property *mem_rgn = lmb->memory.region;
+	struct lmb_property *res_rgn = lmb->reserved.region;
+	int rsv_cnt = lmb->reserved.cnt;
+	int i, idx = 0;
+
+	if (!gd || !gd->bd) {
+		BIDRAM_D("Ignore bi dram bank update\n");
+		return;
+	}
+
+	/* If reserved rgn is not from sdram start */
+	if (res_rgn[0].base != mem_rgn[0].base) {
+		gd->bd->bi_dram[idx].start = mem_rgn[0].base;
+		gd->bd->bi_dram[idx].size  = res_rgn[0].base -
+					     gd->bd->bi_dram[idx].start;
+		idx++;
+	}
+
+	/*
+	 * Note: If reserved rgn is not from sdram start, idx=1 now, otherwise 0.
+	 */
+	for (i = 0; i < rsv_cnt; i++, idx++) {
+		if (res_rgn[i].base + res_rgn[i].size >= gd->ram_top)
+			goto done;
+
+		gd->bd->bi_dram[idx].start = res_rgn[i].base + res_rgn[i].size;
+		if (i + 1 < rsv_cnt)
+			gd->bd->bi_dram[idx].size = res_rgn[i + 1].base -
+					    gd->bd->bi_dram[idx].start;
+		else
+			gd->bd->bi_dram[idx].size = gd->ram_top -
+					    gd->bd->bi_dram[idx].start;
+	}
+done:
+	for (i = 0; i < idx; i++) {
+		BIDRAM_D("gd bi_dram[%d]: start=0x%08lx, end=0x%08lx\n",
+			 i, (ulong)gd->bd->bi_dram[i].start,
+			 (ulong)gd->bd->bi_dram[i].start +
+			 (ulong)gd->bd->bi_dram[i].size);
+	}
+}
+
+static int bidram_is_overlap(phys_addr_t base1, phys_size_t size1,
+			     phys_addr_t base2, phys_size_t size2)
+{
+	return ((base1 < (base2 + size2)) && (base2 < (base1 + size1)));
+}
+
+static int bidram_core_reserve(enum memblk_id id, const char *mem_name,
+			       phys_addr_t base, phys_size_t size)
+{
+	struct bidram *bidram = &plat_bidram;
+	struct memblk_attr attr;
+	struct memblock *mem;
+	struct list_head *node;
+	const char *name;
+	int ret;
+
+	if (!bidram_has_init())
+		return -ENOSYS;
+
+	if (id == MEMBLK_ID_BY_NAME) {
+		if (!mem_name) {
+			BIDRAM_E("NULL name for reserve bidram\n");
+			return -EINVAL;
+		} else {
+			name = mem_name;
+		}
+	} else {
+		if (id > MEMBLK_ID_UNK && id < MEMBLK_ID_MAX) {
+			attr = mem_attr[id];
+			name = attr.name;
+		} else {
+			BIDRAM_E("Unsupport memblk id %d for reserve bidram\n", id);
+			return -EINVAL;
+		}
+	}
+
+	if (!name) {
+		BIDRAM_E("NULL name for reserved bidram\n");
+		return -EINVAL;
+	}
+
+	if (!size)
+		return 0;
+
+	/* Check overlap */
+	list_for_each(node, &bidram->reserved_head) {
+		mem = list_entry(node, struct memblock, node);
+		BIDRAM_D("Reserved: %s 0x%08lx - 0x%08lx\n",
+			 mem->attr.name, (ulong)mem->base,
+			 (ulong)(mem->base + mem->size));
+		if (!strcmp(mem->attr.name, name)) {
+			BIDRAM_E("Failed to double reserve for existence \"%s\"\n", name);
+			return -EEXIST;
+		} else if (bidram_is_overlap(mem->base, mem->size, base, size)) {
+			BIDRAM_D("\"%s\" (0x%08lx - 0x%08lx) reserve is "
+				 "overlap with existence \"%s\" (0x%08lx - "
+				 "0x%08lx)\n",
+				 name, (ulong)base, (ulong)(base + size), mem->attr.name,
+				 (ulong)mem->base, (ulong)(mem->base + mem->size));
+		}
+	}
+
+	ret = lmb_reserve(&bidram->lmb, base, size);
+	if (ret >= 0) {
+		mem = malloc(sizeof(*mem));
+		if (!mem) {
+			BIDRAM_E("No memory for \"%s\" reserve bidram\n", name);
+			return -ENOMEM;
+		}
+
+#ifdef CONFIG_SYSMEM
+		/* Sync to sysmem */
+		if (sysmem_has_init()) {
+			void *paddr;
+
+			if (id == MEMBLK_ID_BY_NAME)
+				paddr = sysmem_alloc_base_by_name(name, base, size);
+			else
+				paddr = sysmem_alloc_base(id, base, size);
+			if (!paddr) {
+				BIDRAM_E("Sync \"%s\" to sysmem failed\n", name);
+				return -ENOMEM;
+			}
+		}
+#endif
+		mem->base = base;
+		mem->size = size;
+		if (id == MEMBLK_ID_BY_NAME) {
+			mem->attr.name = name;
+			mem->attr.flags = 0;
+		} else {
+			mem->attr = attr;
+		}
+		list_add_tail(&mem->node, &bidram->reserved_head);
+	} else {
+		BIDRAM_E("Failed to reserve \"%s\" 0x%08lx - 0x%08lx\n",
+			 name, (ulong)base, (ulong)(base + size));
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+int bidram_reserve(enum memblk_id id, phys_addr_t base, phys_size_t size)
+{
+	int ret;
+
+	ret = bidram_core_reserve(id, NULL, base, size);
+	if (!ret)
+		bidram_gen_gd_bi_dram();
+	else
+		bidram_dump();
+
+	return ret;
+}
+
+int bidram_reserve_by_name(const char *name,
+			   phys_addr_t base, phys_size_t size)
+{
+	int ret;
+
+	ret = bidram_core_reserve(MEMBLK_ID_BY_NAME, name, base, size);
+	if (!ret)
+		bidram_gen_gd_bi_dram();
+	else
+		bidram_dump();
+
+	return ret;
+}
+
+int bidram_initr(void)
+{
+	return !bidram_get_ram_size();
+}
+
+phys_size_t bidram_get_ram_size(void)
+{
+	struct bidram *bidram = &plat_bidram;
+	struct memblock bad[MAX_BAD_MEMBLK];
+	struct memblock *list;
+	phys_size_t ram_addr_end = CONFIG_SYS_SDRAM_BASE;
+	phys_addr_t end_addr;
+	parse_fn_t parse_fn;
+	int i, count, ret;
+	int bad_cnt = 0;
+	char bad_name[12];
+
+	parse_fn = board_bidram_parse_fn();
+	if (!parse_fn) {
+		BIDRAM_E("Can't find dram parse fn\n");
+		return 0;
+	}
+
+	list = parse_fn(&count);
+	if (!list) {
+		BIDRAM_E("Can't get dram banks\n");
+		return 0;
+	}
+
+	if (count > CONFIG_NR_DRAM_BANKS) {
+		BIDRAM_E("Too many dram banks, %d is over max: %d\n",
+			 count, CONFIG_NR_DRAM_BANKS);
+		return 0;
+	}
+
+	/* Initial plat_bidram */
+	lmb_init(&bidram->lmb);
+	INIT_LIST_HEAD(&bidram->reserved_head);
+	bidram->has_init = true;
+
+	/* Initial memory pool */
+	for (i = 0; i < count; i++) {
+		BIDRAM_D("Add bank[%d] start=0x%08lx, end=0x%08lx\n",
+			 i, (ulong)list[i].base,
+			 (ulong)list[i].base + (ulong)list[i].size);
+
+		if (!list[i].size)
+			continue;
+
+		/* We assume the last block gives the ram addr end */
+		if (i == count - 1) {
+			ram_addr_end = list[i].base + list[i].size;
+			ret = bidram_add(CONFIG_SYS_SDRAM_BASE,
+					 ram_addr_end - CONFIG_SYS_SDRAM_BASE);
+			if (ret) {
+				BIDRAM_E("Failed to add bidram from bi_dram[%d]\n", i);
+				return 0;
+			}
+		}
+
+		/* This is a bad dram bank? record it */
+		if (i > 0) {
+			end_addr = list[i - 1].base + list[i - 1].size;
+
+			if (list[i].base != end_addr) {
+				snprintf(bad_name, 12, "%s%d", "BAD_RAM.", i - 1);
+				bad[bad_cnt].attr.name = strdup(bad_name);
+				bad[bad_cnt].base = end_addr;
+				bad[bad_cnt].size = list[i].base - end_addr;
+				bad_cnt++;
+				if (bad_cnt > MAX_BAD_MEMBLK) {
+					BIDRAM_E("Too many bad memory blocks\n");
+					return 0;
+				}
+			}
+		}
+	}
+
+	/* Reserve bad dram bank after bidram_add(), treat as reserved region */
+	for (i = 0; i < bad_cnt; i++) {
+		if (gd->flags & GD_FLG_RELOC)
+			BIDRAM_R("Bad memblk%d: 0x%08lx - 0x%08lx\n",
+				 i, (ulong)bad[i].base,
+				 (ulong)bad[i].base + (ulong)bad[i].size);
+
+		ret = bidram_reserve_by_name(bad[i].attr.name,
+					     bad[i].base, bad[i].size);
+		if (ret) {
+			BIDRAM_E("Failed to add bad memblk[%d]\n", i);
+			return 0;
+		}
+	}
+
+	/* Reserved for board */
+	ret = board_bidram_reserve(bidram);
+	if (ret) {
+		BIDRAM_E("Failed to reserve bidram for board\n");
+		return 0;
+	}
+
+	BIDRAM_D("DRAM size: 0x%08lx\n",
+		 (ulong)ram_addr_end - CONFIG_SYS_SDRAM_BASE);
+
+#ifdef DEBUG
+	bidram_dump();
+#endif
+
+	return (ram_addr_end - CONFIG_SYS_SDRAM_BASE);
+}
+
+__weak parse_fn_t board_bidram_parse_fn(void)
+{
+	/* please define platform specific board_bidram_parse_fn() */
+	return NULL;
+}
+
+__weak int board_bidram_reserve(struct bidram *bidram)
+{
+	/* please define platform specific board_bidram_reserve() */
+	return 0;
+}
+
+static int do_dump_bidram(cmd_tbl_t *cmdtp, int flag,
+			  int argc, char *const argv[])
+{
+	bidram_dump();
+	return 0;
+}
+
+U_BOOT_CMD(
+	dump_bidram, 1, 1, do_dump_bidram,
+	"Dump bidram layout",
+	""
+);

commit e3fbd280efbf98ad3f90e9bfcaf63c5453ccb2df
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Mar 14 19:35:41 2019 +0800

    rockchip: board: implement board_initr_caches_fixup()
    
    Remove dram_initr_banksize().
    
    Change-Id: Ie0da0b8ef43d90c52b3ab2a93d1ad13b4928e70a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index fe18ace42c..2a79de49ee 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -379,6 +379,45 @@ int board_fdt_fixup(void *blob)
 	return ret;
 }
 
+#ifdef CONFIG_ARM64_BOOT_AARCH32
+/*
+ * Fixup MMU region attr for OP-TEE on ARMv8 CPU:
+ *
+ * What ever U-Boot is 64-bit or 32-bit mode, the OP-TEE is always 64-bit mode.
+ *
+ * Command for OP-TEE:
+ *	64-bit mode: dcache is always enabled;
+ *	32-bit mode: dcache is always disabled(Due to some unknown issue);
+ *
+ * Command for U-Boot:
+ *	64-bit mode: MMU table is static defined in rkxxx.c file, all memory
+ *		     regions are mapped. That's good to match OP-TEE MMU policy.
+ *
+ *	32-bit mode: MMU table is setup according to gd->bd->bi_dram[..] where
+ *		     the OP-TEE region has been reserved, so it can not be
+ *		     mapped(i.e. dcache is disabled). That's also good to match
+ *		     OP-TEE MMU policy.
+ *
+ * For the data coherence when communication between U-Boot and OP-TEE, U-Boot
+ * should follow OP-TEE MMU policy.
+ *
+ * Here is the special:
+ *	When CONFIG_ARM64_BOOT_AARCH32 is enabled, U-Boot is 32-bit mode while
+ *	OP-TEE is still 64-bit mode. U-Boot would not map MMU table for OP-TEE
+ *	region(but OP-TEE requires it cacheable) so we fixup here.
+ */
+int board_initr_caches_fixup(void)
+{
+	struct memblock mem;
+
+	mem = param_parse_optee_mem();
+	if (mem.size)
+		mmu_set_region_dcache_behaviour(mem.base, mem.size,
+						DCACHE_WRITEBACK);
+	return 0;
+}
+#endif
+
 void board_quiesce_devices(void)
 {
 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
index 1ed20cbbfe..cb4e46a9d3 100644
--- a/arch/arm/mach-rockchip/sdram_common.c
+++ b/arch/arm/mach-rockchip/sdram_common.c
@@ -190,11 +190,6 @@ int dram_init_banksize(void)
 {
 	return __dram_init_banksize(!IS_ENABLED(CONFIG_ARM64_BOOT_AARCH32));
 }
-
-int dram_initr_banksize(void)
-{
-	return __dram_init_banksize(IS_ENABLED(CONFIG_ARM64_BOOT_AARCH32));
-}
 #endif
 
 size_t rockchip_sdram_size(phys_addr_t reg)

commit 505b141795f509aa8d2eb4073560aff41f91a5bc
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Mar 14 18:35:21 2019 +0800

    common: board_r: add board_initr_caches_fixup()
    
    Remove dram_initr_banksize(), use mmu_set_region_dcache_behaviour()
    in board_initr_caches_fixup() to set region MMU table attr is more
    easily.
    
    Change-Id: I9d9917e938fe5bbab5aa27575a5c8592ff08ab50
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/board_r.c b/common/board_r.c
index f8db94c9af..5d550f0446 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -711,7 +711,7 @@ __weak int interrupt_debugger_init(void)
 	return 0;
 }
 
-__weak int dram_initr_banksize(void)
+__weak int board_initr_caches_fixup(void)
 {
 	return 0;
 }
@@ -760,7 +760,7 @@ static init_fnc_t init_sequence_r[] = {
 	 * like other regions, otherwise there would be dcache coherence issue
 	 * between firmware and U-Boot.
 	 */
-	dram_initr_banksize,
+	board_initr_caches_fixup,
 
 #if defined(CONFIG_SYS_INIT_RAM_LOCK) && defined(CONFIG_E500)
 	initr_unlock_ram_in_cache,

commit 6e15146effedeaad2a6687afcbf83d1907a0b996
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Mar 14 18:23:56 2019 +0800

    lib: sysmem: refactor code
    
    - import memblk id to manage memory blocks;
    - change "sysmem_property" to generic "memblock";
    - use alloc instead of reserve for all memory blocks;
    - clean up and fix some logic;
    - add U-Boot cmd for sysmem;
    
    Change-Id: I614223ce3bf97a7b3566412a9d1864fb30b68fd8
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/param.h b/arch/arm/include/asm/arch-rockchip/param.h
index 66ba2ac22e..5cd8538e1b 100644
--- a/arch/arm/include/asm/arch-rockchip/param.h
+++ b/arch/arm/include/asm/arch-rockchip/param.h
@@ -7,28 +7,28 @@
 #ifndef __ROCKCHIP_PARAM_H_
 #define __ROCKCHIP_PARAM_H_
 
-#include <sysmem.h>
+#include <memblk.h>
 
 /**
  * param_parse_atf_mem() - Parse atf memory region
  *
- * @return sysmem_property structure which contains base and size info.
+ * @return memblock structure which contains base and size info.
  */
-struct sysmem_property param_parse_atf_mem(void);
+struct memblock param_parse_atf_mem(void);
 
 /**
  * param_parse_atf_mem() - Parse op-tee memory region
  *
- * @return sysmem_property structure which contains base and size info.
+ * @return memblock structure which contains base and size info.
  */
-struct sysmem_property param_parse_optee_mem(void);
+struct memblock param_parse_optee_mem(void);
 
 /**
  * param_parse_atf_mem() - Parse platform common reserved memory region
  *
- * @return sysmem_property structure which contains base and size info.
+ * @return memblock structure which contains base and size info.
  */
-struct sysmem_property param_parse_common_resv_mem(void);
+struct memblock param_parse_common_resv_mem(void);
 
 /**
  * param_parse_bootdev() - Parse boot device info.
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 33618ae6ca..00132884a3 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -24,6 +24,7 @@ obj-y += boot_mode.o
 obj-y += board.o
 obj-y += chip_info.o
 obj-y += iomem.o
+obj-y += memblk.o
 
 obj-$(CONFIG_ROCKCHIP_CRC) += rockchip_crc.o
 obj-$(CONFIG_ROCKCHIP_SMCCC) += rockchip_smccc.o
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 573956c118..fe18ace42c 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -442,34 +442,6 @@ void board_lmb_reserve(struct lmb *lmb)
 }
 #endif
 
-#ifdef CONFIG_SYSMEM
-int board_sysmem_reserve(struct sysmem *sysmem)
-{
-	struct sysmem_property prop;
-	int ret;
-
-	/* ATF */
-	prop = param_parse_atf_mem();
-	ret = sysmem_reserve(prop.name, prop.base, prop.size);
-	if (ret)
-		return ret;
-
-	/* PSTORE/ATAGS/SHM */
-	prop = param_parse_common_resv_mem();
-	ret = sysmem_reserve(prop.name, prop.base, prop.size);
-	if (ret)
-		return ret;
-
-	/* OP-TEE */
-	prop = param_parse_optee_mem();
-	ret = sysmem_reserve(prop.name, prop.base, prop.size);
-	if (ret)
-		return ret;
-
-	return 0;
-}
-#endif
-
 #if defined(CONFIG_ROCKCHIP_PRELOADER_SERIAL) && \
     defined(CONFIG_ROCKCHIP_PRELOADER_ATAGS)
 int board_init_f_init_serial(void)
diff --git a/arch/arm/mach-rockchip/memblk.c b/arch/arm/mach-rockchip/memblk.c
new file mode 100644
index 0000000000..7d288ab080
--- /dev/null
+++ b/arch/arm/mach-rockchip/memblk.c
@@ -0,0 +1,66 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <memblk.h>
+
+const static struct memblk_attr plat_mem_attr[MEMBLK_ID_MAX] = {
+	[MEMBLK_ID_DEMO]     =	{
+		.name = "DEMO",
+		.flags = M_ATTR_NONE,
+	},
+	[MEMBLK_ID_ATF]      =	{
+		.name = "ATF",
+		.flags = M_ATTR_NONE,
+	},
+	[MEMBLK_ID_OPTEE]    =	{
+		.name = "OP-TEE",
+		.flags = M_ATTR_NONE,
+	},
+	[MEMBLK_ID_SHM]      =	{
+		.name = "SHM",
+		.flags = M_ATTR_NONE,
+	},
+	[MEMBLK_ID_UBOOT]    =	{
+		.name = "U-Boot",
+		.flags = M_ATTR_OVERLAP,
+	},
+	[MEMBLK_ID_FASTBOOT] =	{
+		.name = "FASTBOOT",
+		.flags = M_ATTR_OVERLAP,
+	},
+	[MEMBLK_ID_STACK]    =	{
+		.name = "STACK",
+		.flags = M_ATTR_HOFC | M_ATTR_OVERLAP,
+	},
+	[MEMBLK_ID_FDT]      =	{
+		.name = "FDT",
+		.flags = M_ATTR_OFC,
+	},
+	[MEMBLK_ID_FDT_DTBO] =	{
+		.name = "FDT_DTBO",
+		.flags = M_ATTR_OFC,
+	},
+	[MEMBLK_ID_FDT_AOSP] =	{
+		.name = "FDT_AOSP",
+		.flags = M_ATTR_OFC,
+	},
+	[MEMBLK_ID_RAMDISK]  =	{
+		.name = "RAMDISK",
+		.alias[0] = "BOOT",
+		.alias[1] = "RECOVERY",
+		.flags = M_ATTR_OFC,
+	},
+	[MEMBLK_ID_KERNEL]   =	{
+		.name = "KERNEL",
+		.flags = M_ATTR_OFC,
+	},
+	[MEMBLK_ID_ANDROID]  =	{
+		.name = "ANDROID",
+		.flags = M_ATTR_OFC,
+	},
+};
+
+const struct memblk_attr *mem_attr = plat_mem_attr;
diff --git a/arch/arm/mach-rockchip/param.c b/arch/arm/mach-rockchip/param.c
index c5c28d4955..3e1bdca38e 100644
--- a/arch/arm/mach-rockchip/param.c
+++ b/arch/arm/mach-rockchip/param.c
@@ -4,6 +4,8 @@
  */
 
 #include <common.h>
+#include <dm.h>
+#include <ram.h>
 #include <asm/io.h>
 #include <asm/arch/rk_atags.h>
 #include <asm/arch/param.h>
@@ -47,13 +49,12 @@ static uint16_t trust_checksum(const uint8_t *buf, uint16_t len)
 	return checksum;
 }
 
-struct sysmem_property param_parse_atf_mem(void)
+struct memblock param_parse_atf_mem(void)
 {
-	struct sysmem_property prop;
+	struct memblock mem;
 
-	prop.name = "ATF";
-	prop.base = 0;
-	prop.size = 0;
+	mem.base = 0;
+	mem.size = 0;
 
 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
 	struct tag *t = NULL;
@@ -66,41 +67,40 @@ struct sysmem_property param_parse_atf_mem(void)
 	 */
 	t = atags_get_tag(ATAG_ATF_MEM);
 	if (t && t->u.atf_mem.size) {
-		prop.base = t->u.atf_mem.phy_addr;
-		prop.size = t->u.atf_mem.size;
+		mem.base = t->u.atf_mem.phy_addr;
+		mem.size = t->u.atf_mem.size;
 		/* Sanity */
-		if (prop.base + prop.size > SDRAM_OFFSET(SZ_1M)) {
+		if (mem.base + mem.size > SDRAM_OFFSET(SZ_1M)) {
 			printf("%s: ATF reserved region is not within 0-1MB "
 			       "offset(0x%08llx-0x%08llx)!\n",
-			       __func__, (u64)prop.base, (u64)prop.base + prop.size);
-			return prop;
+			       __func__, (u64)mem.base, (u64)mem.base + mem.size);
+			return mem;
 		}
 	}
 #endif
 
 	/* Legacy */
-	if (!prop.size) {
+	if (!mem.size) {
 		if (IS_ENABLED(CONFIG_ARM64) ||
 		    IS_ENABLED(CONFIG_ARM64_BOOT_AARCH32)) {
-			prop.base = SDRAM_OFFSET(0);
-			prop.size = SZ_1M;
+			mem.base = SDRAM_OFFSET(0);
+			mem.size = SZ_1M;
 		}
 	}
 
-	debug("ATF: 0x%llx - 0x%llx\n", (u64)prop.base, (u64)prop.base + prop.size);
+	debug("ATF: 0x%llx - 0x%llx\n", (u64)mem.base, (u64)mem.base + mem.size);
 
-	return prop;
+	return mem;
 }
 
-struct sysmem_property param_parse_optee_mem(void)
+struct memblock param_parse_optee_mem(void)
 {
 	struct tos_param_t *tos_parameter;
-	struct sysmem_property prop;
+	struct memblock mem;
 	u32 checksum;
 
-	prop.name = "OP-TEE";
-	prop.base = 0;
-	prop.size = 0;
+	mem.base = 0;
+	mem.size = 0;
 
 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
 	struct tag *t = NULL;
@@ -113,13 +113,13 @@ struct sysmem_property param_parse_optee_mem(void)
 	 */
 	t = atags_get_tag(ATAG_TOS_MEM);
 	if (t && (t->u.tos_mem.tee_mem.flags == 1)) {
-		prop.base = t->u.tos_mem.tee_mem.phy_addr;
-		prop.size = t->u.tos_mem.tee_mem.size;
+		mem.base = t->u.tos_mem.tee_mem.phy_addr;
+		mem.size = t->u.tos_mem.tee_mem.size;
 	}
 #endif
 
 	/* Legacy */
-	if (!prop.size) {
+	if (!mem.size) {
 		tos_parameter =
 		(struct tos_param_t *)(SDRAM_OFFSET(PARAM_OPTEE_INFO_OFFSET));
 		checksum =
@@ -127,28 +127,27 @@ struct sysmem_property param_parse_optee_mem(void)
 			       sizeof(struct tos_param_t) - 8);
 		if ((checksum == tos_parameter->checksum) &&
 		    (tos_parameter->tee_mem.flags == 1)) {
-			prop.base = tos_parameter->tee_mem.phy_addr;
-			prop.size = tos_parameter->tee_mem.size;
+			mem.base = tos_parameter->tee_mem.phy_addr;
+			mem.size = tos_parameter->tee_mem.size;
 		}
 	}
 
-	if (prop.size)
+	if (mem.size)
 		gd->flags |= GD_FLG_BL32_ENABLED;
 
-	debug("TOS: 0x%llx - 0x%llx\n", (u64)prop.base, (u64)prop.base + prop.size);
+	debug("TOS: 0x%llx - 0x%llx\n", (u64)mem.base, (u64)mem.base + mem.size);
 
-	return prop;
+	return mem;
 }
 
-struct sysmem_property param_parse_common_resv_mem(void)
+struct memblock param_parse_common_resv_mem(void)
 {
-	struct sysmem_property prop;
+	struct memblock mem;
 
-	prop.name = "PSTORE/ATAGS/SHM";
-	prop.base = SDRAM_OFFSET(SZ_1M);
-	prop.size = SZ_1M;
+	mem.base = SDRAM_OFFSET(SZ_1M);
+	mem.size = SZ_1M;
 
-	return prop;
+	return mem;
 }
 
 int param_parse_bootdev(char **devtype, char **devnum)
diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index fced26ff81..d2742fbad7 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -664,7 +664,7 @@ int rockchip_read_dtb_file(void *fdt_addr)
 	if (size < 0)
 		return size;
 
-	if (!sysmem_alloc_base("fdt", (phys_addr_t)fdt_addr,
+	if (!sysmem_alloc_base(MEMBLK_ID_FDT, (phys_addr_t)fdt_addr,
 			       ALIGN(size, RK_BLK_SIZE) + CONFIG_SYS_FDT_PAD))
 		return -ENOMEM;
 
diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
index b0e1e4cf6e..1ed20cbbfe 100644
--- a/arch/arm/mach-rockchip/sdram_common.c
+++ b/arch/arm/mach-rockchip/sdram_common.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <memblk.h>
 #include <dm.h>
 #include <ram.h>
 #include <asm/io.h>
@@ -23,7 +24,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define NOT_INITIAL		-1
 static int __dram_init_banksize(int resv_tee)
 {
-	struct sysmem_property prop;
+	struct memblock prop;
 	size_t top = min((unsigned long)(gd->ram_size + CONFIG_SYS_SDRAM_BASE),
 			 gd->ram_top);
 	u64 start[CONFIG_NR_DRAM_BANKS], size[CONFIG_NR_DRAM_BANKS];
diff --git a/cmd/fastboot.c b/cmd/fastboot.c
index bb2f416b78..c9ef71da45 100644
--- a/cmd/fastboot.c
+++ b/cmd/fastboot.c
@@ -65,7 +65,7 @@ static int do_fastboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 		goto exit;
 	}
 
-	if (!sysmem_alloc_base("fastboot",
+	if (!sysmem_alloc_base(MEMBLK_ID_FASTBOOT,
 			       CONFIG_FASTBOOT_BUF_ADDR,
 			       CONFIG_FASTBOOT_BUF_SIZE)) {
 		printf("The fastboot memory space is unusable!\n");
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index a5f59dc64f..2b0a5864e4 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -332,8 +332,6 @@ int android_bootloader_boot_kernel(unsigned long kernel_address)
 		printf("Booting kernel at %s with fdt at %s...\n\n\n",
 		       kernel_addr_r, fdt_addr);
 
-	sysmem_dump_check();
-
 	do_bootm(NULL, 0, 4, bootm_args);
 
 	return -1;
@@ -813,7 +811,7 @@ int android_fdt_overlay_apply(void *fdt_addr)
 		if (sysmem_free((phys_addr_t)fdt_addr))
 			goto out;
 
-		if (!sysmem_alloc_base("fdt(dtbo)",
+		if (!sysmem_alloc_base(MEMBLK_ID_FDT_DTBO,
 				       (phys_addr_t)fdt_addr,
 					fdt_size + CONFIG_SYS_FDT_PAD))
 			goto out;
diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index ca8c2a42d3..9c2aedf03d 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -88,12 +88,10 @@ static void boot_lmb_init(bootm_headers_t *images)
  * return the image size on success, and a
  * negative value on error.
  */
-static int read_rockchip_image(struct blk_desc *dev_desc,
-			       disk_partition_t *part_info,
-			       void *dst)
+int read_rockchip_image(struct blk_desc *dev_desc,
+			disk_partition_t *part_info, void *dst)
 {
 	struct rockchip_image *img;
-	const char *name;
 	int header_len = 8;
 	int cnt;
 	int ret;
@@ -101,14 +99,6 @@ static int read_rockchip_image(struct blk_desc *dev_desc,
 	u32 crc32;
 #endif
 
-	if (!strcmp((char *)part_info->name, "kernel"))
-		name = "kernel";
-	else if (!strcmp((char *)part_info->name, "boot") ||
-		 !strcmp((char *)part_info->name, "recovery"))
-		name = "ramdisk";
-	else
-		name = NULL;
-
 	img = memalign(ARCH_DMA_MINALIGN, RK_BLK_SIZE);
 	if (!img) {
 		printf("out of memory\n");
@@ -133,7 +123,9 @@ static int read_rockchip_image(struct blk_desc *dev_desc,
 	 * total size  = image size + 8 bytes header + 4 bytes crc32
 	 */
 	cnt = DIV_ROUND_UP(img->size + 8 + 4, RK_BLK_SIZE);
-	if (!sysmem_alloc_base(name, (phys_addr_t)dst, cnt * dev_desc->blksz)) {
+	if (!sysmem_alloc_base_by_name((const char *)part_info->name,
+				       (phys_addr_t)dst,
+				       cnt * dev_desc->blksz)) {
 		ret = -ENXIO;
 		goto err;
 	}
@@ -524,7 +516,6 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 	printf("ramdisk  @ 0x%08lx (0x%08x)\n", ramdisk_addr_r, ramdisk_size);
 
 	fdt_ramdisk_skip_relocation();
-	sysmem_dump_check();
 
 #if defined(CONFIG_ARM64)
 	char cmdbuf[64];
diff --git a/common/image-android.c b/common/image-android.c
index f37123efaa..64374b10e4 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -290,7 +290,7 @@ static int android_image_load_separate(struct blk_desc *dev_desc,
 		size = hdr->kernel_size + hdr->page_size;
 		blk_start = part->start;
 		blk_cnt = DIV_ROUND_UP(size, dev_desc->blksz);
-		if (!sysmem_alloc_base("kernel",
+		if (!sysmem_alloc_base(MEMBLK_ID_KERNEL,
 				       (phys_addr_t)android_load_address,
 				       blk_cnt * dev_desc->blksz))
 			return -ENXIO;
@@ -311,7 +311,7 @@ static int android_image_load_separate(struct blk_desc *dev_desc,
 		size = hdr->page_size + ALIGN(hdr->kernel_size, hdr->page_size);
 		blk_start = part->start + DIV_ROUND_UP(size, dev_desc->blksz);
 		blk_cnt = DIV_ROUND_UP(hdr->ramdisk_size, dev_desc->blksz);
-		if (!sysmem_alloc_base("ramdisk",
+		if (!sysmem_alloc_base(MEMBLK_ID_RAMDISK,
 				       ramdisk_addr_r,
 				       blk_cnt * dev_desc->blksz))
 			return -ENXIO;
@@ -347,7 +347,7 @@ static int android_image_load_separate(struct blk_desc *dev_desc,
 		       ALIGN(hdr->ramdisk_size, hdr->page_size);
 		blk_start = part->start + DIV_ROUND_UP(size, dev_desc->blksz);
 		blk_cnt = DIV_ROUND_UP(hdr->second_size, dev_desc->blksz);
-		if (!sysmem_alloc_base("fdt(AOSP)",
+		if (!sysmem_alloc_base(MEMBLK_ID_FDT_AOSP,
 				       fdt_addr_r,
 				       blk_cnt * dev_desc->blksz +
 				       CONFIG_SYS_FDT_PAD))
@@ -456,7 +456,7 @@ long android_image_load(struct blk_desc *dev_desc,
 			} else
 #endif
 			{
-				if (!sysmem_alloc_base("android",
+				if (!sysmem_alloc_base(MEMBLK_ID_ANDROID,
 						       (phys_addr_t)buf,
 							blk_cnt * part_info->blksz))
 					return -ENXIO;
diff --git a/common/image-fdt.c b/common/image-fdt.c
index c903d51443..6cabd2eeff 100644
--- a/common/image-fdt.c
+++ b/common/image-fdt.c
@@ -143,7 +143,6 @@ int boot_fdt_add_sysmem_rsv_regions(void *fdt_blob)
 	static int rsv_done;
 	char resvname[32];
 	const void *prop;
-	int ret;
 
 	if (fdt_check_header(fdt_blob) != 0 || rsv_done)
 		return -EINVAL;
@@ -157,9 +156,8 @@ int boot_fdt_add_sysmem_rsv_regions(void *fdt_blob)
 		debug("   sysmem: reserving fdt memory region: addr=%llx size=%llx\n",
 		      (unsigned long long)addr, (unsigned long long)size);
 		sprintf(resvname, "fdt-memory-reserved%d", i);
-		ret = sysmem_reserve(resvname, addr, size);
-		if (ret)
-			return ret;
+		if (!sysmem_fdt_reserve_alloc_base(resvname, addr, size))
+			return -ENOMEM;
 	}
 
 	rsv_offset = fdt_subnode_offset(fdt_blob, 0, "reserved-memory");
@@ -181,10 +179,9 @@ int boot_fdt_add_sysmem_rsv_regions(void *fdt_blob)
 		debug("  sysmem: 'reserved-memory' %s: addr=%llx size=%llx\n",
 		      fdt_get_name(fdt_blob, offset, NULL),
 		      (unsigned long long)rsv_addr, (unsigned long long)rsv_size);
-		ret = sysmem_reserve(fdt_get_name(fdt_blob, offset, NULL),
-				     rsv_addr, rsv_size);
-		if (ret)
-			return ret;
+		if (!sysmem_fdt_reserve_alloc_base(fdt_get_name(fdt_blob, offset, NULL),
+					           rsv_addr, rsv_size))
+			return -ENOMEM;
 	}
 
 	return 0;
diff --git a/include/boot_rkimg.h b/include/boot_rkimg.h
index e88375159f..795ad62901 100644
--- a/include/boot_rkimg.h
+++ b/include/boot_rkimg.h
@@ -29,6 +29,9 @@ enum _boot_mode {
 
 int rockchip_get_boot_mode(void);
 int boot_rockchip_image(struct blk_desc *dev, disk_partition_t *boot_part);
+int read_rockchip_image(struct blk_desc *dev_desc,
+			disk_partition_t *part_info, void *dst);
+
 struct blk_desc *rockchip_get_bootdev(void);
 
 /*
diff --git a/include/image.h b/include/image.h
index 8daffcceee..11c65292ba 100644
--- a/include/image.h
+++ b/include/image.h
@@ -693,6 +693,8 @@ int boot_get_fdt(int flag, int argc, char * const argv[], uint8_t arch,
 void boot_fdt_add_mem_rsv_regions(struct lmb *lmb, void *fdt_blob);
 #ifdef CONFIG_SYSMEM
 int boot_fdt_add_sysmem_rsv_regions(void *fdt_blob);
+#else
+static inline int boot_fdt_add_sysmem_rsv_regions(void *fdt_blob) { return 0; }
 #endif
 int boot_relocate_fdt(struct lmb *lmb, char **of_flat_tree, ulong *of_size);
 
diff --git a/include/sysmem.h b/include/sysmem.h
index 58de824968..0a5d807f82 100644
--- a/include/sysmem.h
+++ b/include/sysmem.h
@@ -6,12 +6,7 @@
 #ifndef _SYSMEM_H
 #define _SYSMEM_H
 
-#include <asm/types.h>
-
-#define	MAX_SYSMEM_REGIONS		64
-
-#undef	MAX_LMB_REGIONS
-#define	MAX_LMB_REGIONS			MAX_SYSMEM_REGIONS
+#include <memblk.h>
 
 /*
  * CONFIG_SYS_FDT_PAD default value is sync with bootm framework in:
@@ -21,96 +16,84 @@
 #define CONFIG_SYS_FDT_PAD		0x3000
 #endif
 
-struct sysmem_property {
-	const char *name;
-	phys_addr_t base;
-	phys_size_t size;
-	struct list_head node;
-};
-
 struct sysmem {
 	struct lmb lmb;
 	struct list_head allocated_head;
-	struct list_head reserved_head;
 	ulong allocated_cnt;
-	bool has_init;
+	bool has_initf;
+	bool has_initr;
 };
 
+#ifdef CONFIG_SYSMEM
 /**
- * sysmem_init() - Sysmem initialization
+ * sysmem_has_init() - Is sysmem initialized
  *
- * @return 0 on success, otherwise error
+ * @return true or false
  */
-int sysmem_init(void);
+bool sysmem_has_init(void);
 
 /**
- * sysmem_add() - Add sysmem region
- *
- * @base: region base address
- * @size: region size
+ * sysmem_init() - Sysmem initialization
  *
  * @return 0 on success, otherwise error
  */
-int sysmem_add(phys_addr_t base, phys_size_t size);
+int sysmem_init(void);
 
 /**
- * sysmem_reserve() - Reserve sysmem region
- *
- * @name: region name
- * @base: region base address
- * @size: region size
+ * sysmem_initr() - Sysmem initialization after relocation
  *
  * @return 0 on success, otherwise error
  */
-int sysmem_reserve(const char *name, phys_addr_t base, phys_size_t size);
+int sysmem_initr(void);
 
 /**
  * sysmem_alloc() - Alloc sysmem region at anywhere
  *
- * @name: region name
+ * @id: memblk id
  * @size: region size
  *
  * @return NULL on error, otherwise the allocated region address ptr
  */
-void *sysmem_alloc(const char *name, phys_size_t size);
+void *sysmem_alloc(enum memblk_id id, phys_size_t size);
 
 /**
- * sysmem_alloc_align() - Alloc sysmem region at anywhere with addr align down
+ * sysmem_alloc_base() - Alloc sysmem region at the expect addr
  *
- * @name: region name
+ * @id: memblk id
+ * @base: region base
  * @size: region size
- * @align: region base address align (down)
  *
  * @return NULL on error, otherwise the allocated region address ptr
  */
-void *sysmem_alloc_align(const char *name, phys_size_t size, ulong align);
+void *sysmem_alloc_base(enum memblk_id id, phys_addr_t base, phys_size_t size);
 
 /**
- * sysmem_alloc_base() - Alloc sysmem region at the expect addr
+ * sysmem_alloc_base_by_name() - Alloc sysmem region at the expect addr by name
  *
- * @name: region name
+ * @name: memblk name
  * @base: region base
  * @size: region size
  *
  * @return NULL on error, otherwise the allocated region address ptr
  */
-void *sysmem_alloc_base(const char *name, phys_addr_t base, phys_size_t size);
+void *sysmem_alloc_base_by_name(const char *name,
+				phys_addr_t base, phys_size_t size);
 
 /**
- * sysmem_alloc_align_base() - Alloc sysmem region at the expect addr with align down
+ * sysmem_fdt_reserve_alloc_base() - Alloc sysmem region at the expect addr by name,
+ *				     called only for reserve memory from fdt.
  *
- * @name: region name
+ * @name: memblk name
  * @base: region base
  * @size: region size
- * @align: region base address align (down)
  *
  * @return NULL on error, otherwise the allocated region address ptr
  */
-void *sysmem_alloc_align_base(const char *name, phys_addr_t base,
-			      phys_size_t size, ulong align);
+void *sysmem_fdt_reserve_alloc_base(const char *name,
+				    phys_addr_t base, phys_size_t size);
 
 /**
- * sysmem_free() - Free sysmem region
+ * sysmem_free() - Free allocated sysmem region
  *
  * @base: region base
  *
@@ -119,22 +102,10 @@ void *sysmem_alloc_align_base(const char *name, phys_addr_t base,
 int sysmem_free(phys_addr_t base);
 
 /**
- * sysmem_check() - Check sysmem regions
- *
- * @return 0 on okay, otherwise something wrong
- */
-int sysmem_check(void);
-
-/**
- * sysmem_dump_all() - Dump all sysmem stat
+ * sysmem_dump() - Dump all sysmem region state and check overflow
  */
 void sysmem_dump(void);
 
-/**
- * sysmem_dump_check() - Dump all sysmem stat and check overflow
- */
-int sysmem_dump_check(void);
-
 /**
  * board_sysmem_reserve() - Weak function for board to implement
  *
@@ -143,14 +114,29 @@ int sysmem_dump_check(void);
  * @return 0 on success, otherwise error
  */
 int board_sysmem_reserve(struct sysmem *sysmem);
-
-/**
- * arch_sysmem_reserve() - Weak function for arch to implement
- *
- * @sysmem: global sysmem point, ignored
- *
- * @return 0 on success, otherwise error
- */
-int arch_sysmem_reserve(struct sysmem *sysmem);
-
+#else
+static inline bool sysmem_has_init(void) { return false; }
+static inline int sysmem_init(void) { return 0; }
+static inline int sysmem_initr(void) { return 0; }
+static inline int sysmem_free(phys_addr_t base) { return 0; }
+static inline void sysmem_dump(void) {}
+__weak int board_sysmem_reserve(struct sysmem *sysmem) { return 0; }
+static inline void *sysmem_alloc_base(enum memblk_id id,
+				      phys_addr_t base, phys_size_t size)
+{
+	return (void *)base;
+}
+static inline void *sysmem_alloc_base_by_name(const char *name,
+					      phys_addr_t base,
+					      phys_size_t size)
+{
+	return (void *)base;
+}
+static inline void *sysmem_fdt_reserve_alloc_base(const char *name,
+						  phys_addr_t base,
+						  phys_size_t size)
+{
+	return (void *)base;
+}
+#endif /* CONFIG_SYSMEM */
 #endif /* _SYSMEM_H */
diff --git a/lib/sysmem.c b/lib/sysmem.c
index 2549de95f2..b050177af1 100644
--- a/lib/sysmem.c
+++ b/lib/sysmem.c
@@ -15,45 +15,38 @@ DECLARE_GLOBAL_DATA_PTR;
 #define SYSMEM_ALLOC_ANYWHERE	0
 #define SYSMEM_ALLOC_NO_ALIGN	1
 
-#ifndef CONFIG_SYS_STACK_SIZE
-#define CONFIG_SYS_STACK_SIZE	SZ_2M
-#endif
-
-#define SIZE_MB(len)		((len) >> 20)
-#define SIZE_KB(len)		(((len) % (1 << 20)) >> 10)
-
 #define SYSMEM_I(fmt, args...)	printf("Sysmem: "fmt, ##args)
 #define SYSMEM_W(fmt, args...)	printf("Sysmem Warn: "fmt, ##args)
 #define SYSMEM_E(fmt, args...)	printf("Sysmem Error: "fmt, ##args)
 #define SYSMEM_D(fmt, args...)	 debug("Sysmem Debug: "fmt, ##args)
 
-static struct sysmem plat_sysmem;	/* Global for platform */
-
-struct sysmem_check {
+struct memcheck {
 	uint32_t magic;
 };
 
-static int sysmem_has_init(void)
-{
-	if (!plat_sysmem.has_init) {
-		SYSMEM_E("Framework is not initialized\n");
-		return 0;
-	}
+/* Global for platform, must in data section */
+struct sysmem plat_sysmem __section(".data") = {
+	.has_initf = false,
+	.has_initr = false,
+};
 
-	return 1;
+bool sysmem_has_init(void)
+{
+	return gd->flags & GD_FLG_RELOC ?
+	       plat_sysmem.has_initr : plat_sysmem.has_initf;
 }
 
 void sysmem_dump(void)
 {
-#ifdef DEBUG
 	struct sysmem *sysmem = &plat_sysmem;
 	struct lmb *lmb = &sysmem->lmb;
-	struct sysmem_property *prop;
-	struct sysmem_check *check;
+	struct memblock *mem;
+	struct memcheck *check;
 	struct list_head *node;
 	ulong memory_size = 0;
 	ulong reserved_size = 0;
 	ulong allocated_size = 0;
+	bool overflow = false;
 	ulong i;
 
 	if (!sysmem_has_init())
@@ -62,12 +55,13 @@ void sysmem_dump(void)
 	printf("\nsysmem_dump_all:\n");
 
 	/* Memory pool */
-	printf("    ------------------------------------------------------\n");
+	printf("    --------------------------------------------------------------------\n");
 	for (i = 0; i < lmb->memory.cnt; i++) {
 		memory_size += lmb->memory.region[i].size;
-		printf("    memory.rgn[%ld].base     = 0x%08lx\n", i,
-		       (ulong)lmb->memory.region[i].base);
-		printf("		 .size     = 0x%08lx\n",
+		printf("    memory.rgn[%ld].addr     = 0x%08lx - 0x%08lx (size: 0x%08lx)\n", i,
+		       (ulong)lmb->memory.region[i].base,
+		       (ulong)lmb->memory.region[i].base +
+		       (ulong)lmb->memory.region[i].size,
 		       (ulong)lmb->memory.region[i].size);
 	}
 	printf("\n    memory.total	   = 0x%08lx (%ld MiB. %ld KiB)\n",
@@ -75,54 +69,48 @@ void sysmem_dump(void)
 	       SIZE_MB((ulong)memory_size),
 	       SIZE_KB((ulong)memory_size));
 
-	/* Reserved */
-	i = 0;
-	printf("    ------------------------------------------------------\n");
-	list_for_each(node, &sysmem->reserved_head) {
-		prop = list_entry(node, struct sysmem_property, node);
-		reserved_size += prop->size;
-		printf("    reserved.rgn[%ld].name   = \"%s\"\n", i, prop->name);
-		printf("		   .base   = 0x%08lx\n",
-		       (ulong)prop->base);
-		printf("		   .size   = 0x%08lx\n",
-		       (ulong)prop->size);
-		i++;
-	}
-	printf("\n    reserved.total	   = 0x%08lx (%ld MiB. %ld KiB)\n",
-	       (ulong)reserved_size,
-	       SIZE_MB((ulong)reserved_size),
-	       SIZE_KB((ulong)reserved_size));
-
 	/* Allocated */
 	i = 0;
-	printf("    ------------------------------------------------------\n");
+	printf("    --------------------------------------------------------------------\n");
 	list_for_each(node, &sysmem->allocated_head) {
-		prop = list_entry(node, struct sysmem_property, node);
-		allocated_size += prop->size;
-		check = (struct sysmem_check *)
-				(prop->base + prop->size - sizeof(*check));
-		printf("    allocated.rgn[%ld].name  = \"%s\"%s\n",
-		       i, prop->name,
-		       check->magic != SYSMEM_MAGIC ? "	(Overflow)" : "");
-		printf("		    .base  = 0x%08lx\n",
-		       (ulong)prop->base);
-		printf("		    .size  = 0x%08lx\n",
-		       (ulong)prop->size);
+		mem = list_entry(node, struct memblock, node);
+		allocated_size += mem->size;
+		if (mem->attr.flags & M_ATTR_OFC) {
+			check = (struct memcheck *)
+				(mem->base + mem->size - sizeof(*check));
+			overflow = (check->magic != SYSMEM_MAGIC);
+		} else if (mem->attr.flags & M_ATTR_HOFC) {
+			check = (struct memcheck *)
+				(mem->base - sizeof(*check));
+			overflow = (check->magic != SYSMEM_MAGIC);
+		} else {
+			overflow = false;
+		}
+
+		printf("    allocated.rgn[%ld].name  = \"%s\" %s\n",
+		       i, mem->attr.name, overflow ? "	   <Overflow!>" : "");
+		printf("		    .addr  = 0x%08lx - 0x%08lx (size: 0x%08lx)\n",
+		       (ulong)mem->base, (ulong)(mem->base + mem->size),
+		       (ulong)mem->size);
 		i++;
 	}
+
+	printf("\n    malloc_r: %d MiB, malloc_f: %d KiB\n",
+	       SIZE_MB(CONFIG_SYS_MALLOC_LEN), SIZE_KB(CONFIG_SYS_MALLOC_F_LEN));
 	printf("\n    allocated.total	   = 0x%08lx (%ld MiB. %ld KiB)\n",
 	       (ulong)allocated_size,
 	       SIZE_MB((ulong)allocated_size),
 	       SIZE_KB((ulong)allocated_size));
 
 	/* LMB core reserved */
-	printf("    ------------------------------------------------------\n");
+	printf("    --------------------------------------------------------------------\n");
 	reserved_size = 0;
 	for (i = 0; i < lmb->reserved.cnt; i++) {
 		reserved_size += lmb->reserved.region[i].size;
-		printf("    LMB.reserved[%ld].base   = 0x%08lx\n", i,
-		       (ulong)lmb->reserved.region[i].base);
-		printf("		   .size   = 0x%08lx\n",
+		printf("    LMB.reserved[%ld].addr   = 0x%08lx - 0x%08lx (size: 0x%08lx)\n", i,
+		       (ulong)lmb->reserved.region[i].base,
+		       (ulong)lmb->reserved.region[i].base +
+		       (ulong)lmb->reserved.region[i].size,
 		       (ulong)lmb->reserved.region[i].size);
 	}
 
@@ -130,167 +118,159 @@ void sysmem_dump(void)
 	       (ulong)reserved_size,
 	       SIZE_MB((ulong)reserved_size),
 	       SIZE_KB((ulong)reserved_size));
-	printf("    ------------------------------------------------------\n\n");
-#endif
-}
-
-int sysmem_check(void)
-{
-	struct sysmem *sysmem = &plat_sysmem;
-	struct sysmem_property *prop;
-	struct sysmem_check *check;
-	struct list_head *node;
-	int ret = 0;
-
-	if (!sysmem_has_init())
-		return -ENOSYS;
-
-	/* Check allocated */
-	list_for_each(node, &sysmem->allocated_head) {
-		prop = list_entry(node, struct sysmem_property, node);
-		check = (struct sysmem_check *)
-				(prop->base + prop->size - sizeof(*check));
-		if (check->magic != SYSMEM_MAGIC) {
-			ret = -EOVERFLOW;
-			SYSMEM_E("\"%s\" (base=0x%08lx, size=0x%lx) is Overflow!\n",
-				 prop->name, (ulong)prop->base, (ulong)prop->size);
-		}
-	}
-
-	/* Check stack */
-	check = (struct sysmem_check *)(gd->start_addr_sp - CONFIG_SYS_STACK_SIZE);
-	if (check->magic != SYSMEM_MAGIC) {
-		ret = -EOVERFLOW;
-		SYSMEM_E("Runtime stack is Overflow!\n");
-	}
-
-	return ret;
-}
-
-int sysmem_dump_check(void)
-{
-	sysmem_dump();
-
-	return sysmem_check();
+	printf("    --------------------------------------------------------------------\n\n");
 }
 
-static int sysmem_is_overlap(phys_addr_t base1, phys_size_t size1,
-			     phys_addr_t base2, phys_size_t size2)
+static inline int sysmem_is_overlap(phys_addr_t base1, phys_size_t size1,
+				    phys_addr_t base2, phys_size_t size2)
 {
 	return ((base1 < (base2 + size2)) && (base2 < (base1 + size1)));
 }
 
-int sysmem_add(phys_addr_t base, phys_size_t size)
+static int sysmem_add(phys_addr_t base, phys_size_t size)
 {
 	struct sysmem *sysmem = &plat_sysmem;
 	int ret;
 
-	if (!sysmem_has_init())
-		return -ENOSYS;
+	if (!size)
+		return -EINVAL;
 
 	ret = lmb_add(&sysmem->lmb, base, size);
 	if (ret < 0)
-		SYSMEM_E("Failed to add sysmem at 0x%lx for 0x%lx size\n",
+		SYSMEM_E("Failed to add sysmem at 0x%08lx for 0x%08lx size\n",
 			 (ulong)base, (ulong)size);
 
 	return (ret >= 0) ? 0 : ret;
 }
 
-int sysmem_reserve(const char *name, phys_addr_t base, phys_size_t size)
+static const char *sysmem_alias2name(const char *name, int *id)
 {
-	struct sysmem *sysmem = &plat_sysmem;
-	struct sysmem_property *prop;
-	struct list_head *node;
-	int ret = 0;
-
-	if (!sysmem_has_init())
-		return -ENOSYS;
+	const char *alias;
+	int n, i, j;
+	int match = 0;
+
+	for (i = 0; i < MEMBLK_ID_MAX; i++) {
+		/* Pirmary name */
+		if (mem_attr[i].name && !strcasecmp(mem_attr[i].name, name)) {
+			match = 1;
+			goto finish;
+		}
 
-	if (!name) {
-		SYSMEM_E("NULL name for reserved sysmem\n");
-		return -EINVAL;
-	}
+		/* Alias name */
+		alias = mem_attr[i].alias[0];
+		if (!alias)
+			continue;
 
-	/* Check overlap */
-	list_for_each(node, &sysmem->reserved_head) {
-		prop = list_entry(node, struct sysmem_property, node);
-		if (!strcmp(prop->name, name)) {
-			SYSMEM_E("Failed to double reserve for existence \"%s\"\n", name);
-			return -EEXIST;
-		} else if (sysmem_is_overlap(prop->base, prop->size, base, size)) {
-			SYSMEM_D("\"%s\" (base=0x%08lx, size=0x%lx) reserve is "
-				 "overlap with existence \"%s\" (base=0x%08lx, size=0x%lx)\n",
-				 name, (ulong)base, (ulong)size, prop->name,
-				 (ulong)prop->base, (ulong)prop->size);
+		n = ARRAY_SIZE(mem_attr[i].alias);
+		for (j = 0; j < n; j++, alias++) {
+			if (alias && !strcasecmp(alias, name)) {
+				match = 1;
+				goto finish;
+			}
 		}
 	}
 
-	ret = lmb_reserve(&sysmem->lmb, base, size);
-	if (ret >= 0) {
-		prop = malloc(sizeof(*prop));
-		if (!prop) {
-			SYSMEM_E("No memory for \"%s\" reserve sysmem\n", name);
-			return -ENOMEM;
-		}
-
-		prop->name = name;
-		prop->base = base;
-		prop->size = size;
-		list_add_tail(&prop->node, &sysmem->reserved_head);
-	} else {
-		SYSMEM_E("Failed to reserve \"%s\" at 0x%lx\n", name, (ulong)base);
-		return -EINVAL;
+finish:
+	if (match) {
+		*id = i;
+		return mem_attr[i].name;
 	}
 
-	return 0;
+	return name;
 }
 
-void *sysmem_alloc_align_base(const char *name,
-			      phys_addr_t base,
-			      phys_size_t size,
-			      ulong align)
+static void *sysmem_alloc_align_base(enum memblk_id id,
+				     const char *mem_name,
+				     phys_addr_t base,
+				     phys_size_t size,
+				     ulong align)
 {
 	struct sysmem *sysmem = &plat_sysmem;
-	struct sysmem_property *prop;
-	struct sysmem_check *check;
+	struct memblk_attr attr;
+	struct memblock *mem;
+	struct memcheck *check;
 	struct list_head *node;
+	const char *name;
 	phys_addr_t paddr;
 	phys_addr_t alloc_base;
 	phys_size_t alloc_size;
+	bool req_overlap = false;
 
 	if (!sysmem_has_init())
 		return NULL;
 
-	if (!name) {
-		SYSMEM_E("NULL name for alloc sysmem\n");
+	if (id == MEMBLK_ID_BY_NAME || id == MEMBLK_ID_FDT_RESV) {
+		if (!mem_name) {
+			SYSMEM_E("NULL name for alloc sysmem\n");
+			return NULL;
+		} else if (id == MEMBLK_ID_FDT_RESV) {
+			req_overlap = true;
+			if (base >= gd->ram_top)
+				return (void *)base;
+		}
+		name = sysmem_alias2name(mem_name, (int *)&id);
+		attr = mem_attr[id];
+	} else if (id > MEMBLK_ID_UNK && id < MEMBLK_ID_MAX) {
+		attr = mem_attr[id];
+		name = attr.name;
+	} else {
+		SYSMEM_E("Unsupport memblk id %d for alloc sysmem\n", id);
+		return NULL;
+	}
+
+	if (!size) {
+		SYSMEM_E("\"%s\" size is 0 for alloc sysmem\n", name);
 		return NULL;
 	}
 
 	if (!IS_ALIGNED(base, 4)) {
-		SYSMEM_E("\"%s\" base=0x%08lx is not 4-byte aligned\n", name, (ulong)base);
+		SYSMEM_E("\"%s\" base=0x%08lx is not 4-byte aligned\n",
+			 name, (ulong)base);
 		return NULL;
 	}
 
 	/* Must be 4-byte aligned */
 	size = ALIGN(size, 4);
 
+	SYSMEM_D("Enter alloc: \"%s\" 0x%08lx - 0x%08lx\n",
+		 name, (ulong)base, (ulong)(base + size));
+
 	/* Already allocated ? */
 	list_for_each(node, &sysmem->allocated_head) {
-		prop = list_entry(node, struct sysmem_property, node);
-		if (!strcmp(prop->name, name)) {
+		mem = list_entry(node, struct memblock, node);
+		SYSMEM_D("Has allcated: %s, 0x%08lx - 0x%08lx\n",
+			 mem->attr.name, (ulong)mem->base,
+			 (ulong)(mem->base + mem->size));
+		if (!strcmp(mem->attr.name, name)) {
 			SYSMEM_E("Failed to double alloc for existence \"%s\"\n", name);
 			return NULL;
-		} else if (sysmem_is_overlap(prop->base, prop->size, base, size)) {
-			SYSMEM_E("\"%s\" (base=0x%08lx, size=0x%lx) alloc is "
-				 "overlap with existence \"%s\" (base=0x%08lx, size=0x%lx)\n",
-				 name, (ulong)base, (ulong)size,
-				 prop->name, (ulong)prop->base,
-				 (ulong)prop->size);
+		} else if (sysmem_is_overlap(mem->base, mem->size, base, size)) {
+			if (req_overlap && mem->attr.flags & M_ATTR_OVERLAP) {
+				if (lmb_reserve(&sysmem->lmb, base, size))
+					SYSMEM_E("Failed to overlap alloc \"%s\" "
+						 "at 0x%08lx - 0x%08lx\n",
+						 name, (ulong)base,
+						 (ulong)(base + size));
+				return (void *)base;
+			}
+
+			SYSMEM_E("\"%s\" (0x%08lx - 0x%08lx) alloc is "
+				 "overlap with existence \"%s\" (0x%08lx - "
+				 "0x%08lx)\n",
+				 name, (ulong)base, (ulong)(base + size),
+				 mem->attr.name, (ulong)mem->base,
+				 (ulong)(mem->base + mem->size));
 			return NULL;
 		}
 	}
 
-	alloc_size = size + sizeof(*check);
+	/* Add overflow check magic ? */
+	if (attr.flags & M_ATTR_OFC)
+		alloc_size = size + sizeof(*check);
+	else
+		alloc_size = size;
+
+	/* Alloc anywhere ? */
 	if (base == SYSMEM_ALLOC_ANYWHERE)
 		alloc_base = base;
 	else
@@ -298,127 +278,170 @@ void *sysmem_alloc_align_base(const char *name,
 
 	paddr = lmb_alloc_base(&sysmem->lmb, alloc_size, align, alloc_base);
 	if (paddr) {
-		if  ((paddr == base) || (base == SYSMEM_ALLOC_ANYWHERE)) {
-			prop = malloc(sizeof(*prop));
-			if (!prop) {
+		if ((paddr == base) || (base == SYSMEM_ALLOC_ANYWHERE)) {
+			mem = malloc(sizeof(*mem));
+			if (!mem) {
 				SYSMEM_E("No memory for \"%s\" alloc sysmem\n", name);
 				return NULL;
 			}
 
-			prop->name = name;
-			prop->base = paddr;
-			prop->size = alloc_size;
+			mem->base = paddr;
+			mem->size = alloc_size;
+			mem->attr = attr;
 			sysmem->allocated_cnt++;
-
-			check = (struct sysmem_check *)(paddr + size);
-			check->magic = SYSMEM_MAGIC;
-
-			list_add_tail(&prop->node, &sysmem->allocated_head);
+			list_add_tail(&mem->node, &sysmem->allocated_head);
+
+			if (mem->attr.flags & M_ATTR_OFC) {
+				check = (struct memcheck *)(paddr + size);
+				check->magic = SYSMEM_MAGIC;
+			} else if (mem->attr.flags & M_ATTR_HOFC) {
+				check = (struct memcheck *)(paddr - sizeof(*check));
+				check->magic = SYSMEM_MAGIC;
+			}
 		} else {
-			SYSMEM_E("Failed to alloc \"%s\" at expect 0x%lx but "
-				 "alloc at 0x%lx\n",
-				 name, (ulong)base, (ulong)paddr);
+			SYSMEM_E("Failed to alloc \"%s\" expect at 0x%08lx - 0x%08lx "
+				 "but at 0x%08lx - x%08lx\n",
+				 name, (ulong)base, (ulong)(base + size),
+				 (ulong)paddr, (ulong)(paddr + size));
+			if (lmb_free(&sysmem->lmb, paddr, alloc_size))
+				SYSMEM_E("Failed to free \"%s\"\n", name);
+
 			return NULL;
 		}
 	} else {
-		SYSMEM_E("Failed to alloc \"%s\" at 0x%lx\n", name, (ulong)base);
+		SYSMEM_E("Failed to alloc \"%s\" at 0x%08lx - 0x%08lx\n",
+			 name, (ulong)base, (ulong)(base + size));
 	}
 
-	SYSMEM_D("Alloc: \"%s\", paddr=0x%lx, size=0x%lx, align=0x%x, anywhere=%d\n",
+	SYSMEM_D("Exit alloc: \"%s\", paddr=0x%08lx, size=0x%08lx, align=0x%x, anywhere=%d\n",
 		 name, (ulong)paddr, (ulong)size, (u32)align, !base);
 
 	return (void *)paddr;
 }
 
-void *sysmem_alloc_align(const char *name, phys_size_t size, ulong align)
+void *sysmem_alloc_base(enum memblk_id id, phys_addr_t base, phys_size_t size)
 {
-	return sysmem_alloc_align_base(name,
-				       SYSMEM_ALLOC_ANYWHERE,
-				       size,
-				       align);
+	void *paddr;
+
+	paddr = sysmem_alloc_align_base(id,
+					NULL,
+					base,
+					size,
+					SYSMEM_ALLOC_NO_ALIGN);
+	if (!paddr)
+		sysmem_dump();
+
+	return paddr;
 }
 
-void *sysmem_alloc_base(const char *name, phys_addr_t base, phys_size_t size)
+void *sysmem_alloc_base_by_name(const char *name,
+				phys_addr_t base, phys_size_t size)
 {
-	return sysmem_alloc_align_base(name,
-				       base,
-				       size,
-				       SYSMEM_ALLOC_NO_ALIGN);
+	void *paddr;
+
+	paddr = sysmem_alloc_align_base(MEMBLK_ID_BY_NAME,
+					name,
+					base,
+					size,
+					SYSMEM_ALLOC_NO_ALIGN);
+	if (!paddr)
+		sysmem_dump();
+
+	return paddr;
 }
 
-void *sysmem_alloc(const char *name, phys_size_t size)
+void *sysmem_fdt_reserve_alloc_base(const char *name,
+				    phys_addr_t base, phys_size_t size)
 {
-	return sysmem_alloc_align_base(name,
-				       SYSMEM_ALLOC_ANYWHERE,
-				       size,
-				       SYSMEM_ALLOC_NO_ALIGN);
+	void *paddr;
+
+	paddr = sysmem_alloc_align_base(MEMBLK_ID_FDT_RESV,
+					name,
+					base,
+					size,
+					SYSMEM_ALLOC_NO_ALIGN);
+	if (!paddr)
+		sysmem_dump();
+
+	return paddr;
 }
 
 int sysmem_free(phys_addr_t base)
 {
 	struct sysmem *sysmem = &plat_sysmem;
-	struct sysmem_property *prop;
+	struct memblock *mem;
 	struct list_head *node;
-	int found = 0;
-	int ret;
+	int ret, found = 0;
 
 	if (!sysmem_has_init())
 		return -ENOSYS;
 
 	/* Find existence */
 	list_for_each(node, &sysmem->allocated_head) {
-		prop = list_entry(node, struct sysmem_property, node);
-		if (prop->base == base) {
+		mem = list_entry(node, struct memblock, node);
+		if (mem->base == base) {
 			found = 1;
 			break;
 		}
 	}
 
 	if (!found) {
-		SYSMEM_E("Failed to free no allocated sysmem at 0x%lx\n", (ulong)base);
+		SYSMEM_E("Failed to free no allocated sysmem at 0x%08lx\n",
+			 (ulong)base);
 		return -EINVAL;
 	}
 
-	ret = lmb_free(&sysmem->lmb, prop->base, prop->size);
+	ret = lmb_free(&sysmem->lmb, mem->base, mem->size);
 	if (ret >= 0) {
-		SYSMEM_D("Free: \"%s\", paddr=0x%lx, size=0x%lx\n",
-			 prop->name, (ulong)prop->base, (ulong)prop->size);
+		SYSMEM_D("Free: \"%s\" 0x%08lx - 0x%08lx\n",
+			 mem->attr.name, (ulong)mem->base,
+			 (ulong)(mem->base + mem->size));
 		sysmem->allocated_cnt--;
-		list_del(&prop->node);
-		free(prop);
+		list_del(&mem->node);
+		free(mem);
 	} else {
-		SYSMEM_E("Failed to free \"%s\" at 0x%lx\n", prop->name, (ulong)base);
+		SYSMEM_E("Failed to free \"%s\" at 0x%08lx\n",
+			 mem->attr.name, (ulong)base);
 	}
 
 	return (ret >= 0) ? 0 : ret;
 }
 
+int sysmem_initr(void)
+{
+	return sysmem_init();
+}
+
 int sysmem_init(void)
 {
 	struct sysmem *sysmem = &plat_sysmem;
-	struct sysmem_check *check;
 	phys_addr_t mem_start;
 	phys_size_t mem_size;
 	int ret;
 
-	SYSMEM_I("init\n");
-
 	lmb_init(&sysmem->lmb);
 	INIT_LIST_HEAD(&sysmem->allocated_head);
-	INIT_LIST_HEAD(&sysmem->reserved_head);
 	sysmem->allocated_cnt = 0;
-	sysmem->has_init = true;
+	if (gd->flags & GD_FLG_RELOC) {
+		sysmem->has_initr = true;
+	} else {
+		SYSMEM_I("init\n");
+		sysmem->has_initf = true;
+	}
 
 	/* Add all available system memory */
 #ifdef CONFIG_NR_DRAM_BANKS
 	int i;
 
 	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+		if (!gd->bd->bi_dram[i].size)
+			continue;
+
 		ret = sysmem_add(gd->bd->bi_dram[i].start,
 				 gd->bd->bi_dram[i].size);
 		if (ret) {
 			SYSMEM_E("Failed to add sysmem from bi_dram[%d]\n", i);
-			return ret;
+			goto fail;
 		}
 	}
 #else
@@ -427,39 +450,44 @@ int sysmem_init(void)
 	ret = sysmem_add(mem_start, mem_size);
 	if (ret) {
 		SYSMEM_E("Failed to add sysmem from bootm_low/size\n");
-		return ret;
+		goto fail;
 	}
 #endif
-
-	/* Reserved for arch */
-	ret = arch_sysmem_reserve(sysmem);
-	if (ret) {
-		SYSMEM_E("Failed to reserve sysmem for arch\n");
-		return ret;
-	}
-
 	/* Reserved for board */
 	ret = board_sysmem_reserve(sysmem);
 	if (ret) {
 		SYSMEM_E("Failed to reserve sysmem for board\n");
-		return ret;
+		goto fail;
 	}
 
-	/* Reserved for U-boot framework 'reserve_xxx()' */
-	mem_start = gd->start_addr_sp - CONFIG_SYS_STACK_SIZE;
+	/* Reserved for U-boot framework: 'reserve_xxx()' */
+	mem_start = gd->start_addr_sp;
 	mem_size = gd->ram_top - mem_start;
-	check = (struct sysmem_check *)mem_start;
-	check->magic = SYSMEM_MAGIC;
-
-	ret = sysmem_reserve("U-Boot", mem_start, mem_size);
-	if (ret) {
+	if (!sysmem_alloc_base(MEMBLK_ID_UBOOT, mem_start, mem_size)) {
 		SYSMEM_E("Failed to reserve sysmem for U-Boot framework\n");
-		return ret;
+		ret = -ENOMEM;
+		goto fail;
 	}
 
-	sysmem_dump();
+	/* Reserved for U-Boot stack */
+	mem_start = gd->start_addr_sp - CONFIG_SYS_STACK_SIZE;
+	mem_size = CONFIG_SYS_STACK_SIZE;
+	if (!sysmem_alloc_base(MEMBLK_ID_STACK, mem_start, mem_size)) {
+		SYSMEM_E("Failed to reserve sysmem for stack\n");
+		ret = -ENOMEM;
+		goto fail;
+	}
 
 	return 0;
+
+fail:
+	if (ret && !(gd->flags & GD_FLG_RELOC)) {
+		sysmem_dump();
+		SYSMEM_W("Maybe malloc size %d MiB is too large?\n\n",
+			 SIZE_MB(CONFIG_SYS_MALLOC_LEN));
+	}
+
+	return ret;
 }
 
 __weak int board_sysmem_reserve(struct sysmem *sysmem)
@@ -468,8 +496,15 @@ __weak int board_sysmem_reserve(struct sysmem *sysmem)
 	return 0;
 }
 
-__weak int arch_sysmem_reserve(struct sysmem *sysmem)
+static int do_dump_sysmem(cmd_tbl_t *cmdtp, int flag,
+			  int argc, char *const argv[])
 {
-	/* please define platform specific arch_sysmem_reserve() */
+	sysmem_dump();
 	return 0;
 }
+
+U_BOOT_CMD(
+	dump_sysmem, 1, 1, do_dump_sysmem,
+	"Dump sysmem layout",
+	""
+);

commit 88bfa9796376b6f53662a19d128931208d68d4cd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Mar 14 18:22:19 2019 +0800

    include: add memblk.h
    
    Provide generic id and struct for memory blocks.
    
    Change-Id: I1fe00dfdb8ee8209eca55c8e7ebbedcafa0371a1
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/memblk.h b/include/memblk.h
new file mode 100644
index 0000000000..bba5de000e
--- /dev/null
+++ b/include/memblk.h
@@ -0,0 +1,63 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _MEMBLK_H
+#define _MEMBLK_H
+
+enum memblk_id {
+	MEMBLK_ID_UNK,
+
+	/* Preloader */
+	MEMBLK_ID_ATF,
+	MEMBLK_ID_OPTEE,
+	MEMBLK_ID_SHM,
+
+	/* U-Boot self */
+	MEMBLK_ID_UBOOT,
+	MEMBLK_ID_STACK,
+	MEMBLK_ID_FASTBOOT,
+
+	/* Image */
+	MEMBLK_ID_RAMDISK,
+	MEMBLK_ID_FDT,
+	MEMBLK_ID_FDT_DTBO,
+	MEMBLK_ID_FDT_AOSP,
+	MEMBLK_ID_KERNEL,
+	MEMBLK_ID_ANDROID,
+
+	/* Other */
+	MEMBLK_ID_BY_NAME,
+	MEMBLK_ID_FDT_RESV,
+	MEMBLK_ID_DEMO,
+	MEMBLK_ID_MAX,
+};
+
+struct memblk_attr {
+	const char *name;
+	const char *alias[2];
+	u32 flags;
+};
+
+struct memblock {
+	phys_addr_t base;
+	phys_size_t size;
+	struct memblk_attr attr;
+	struct list_head node;
+};
+
+extern const struct memblk_attr *mem_attr;
+
+#define SIZE_MB(len)		((len) >> 20)
+#define SIZE_KB(len)		(((len) % (1 << 20)) >> 10)
+
+#define M_ATTR_NONE		0
+/* Over-Flow-Check for region tail */
+#define M_ATTR_OFC		(1 << 0)
+/* Over-Flow-Check for region Head, only for U-Boot stack */
+#define M_ATTR_HOFC		(1 << 1)
+/* Memory can be overlap by fdt reserved memory */
+#define M_ATTR_OVERLAP		(1 << 2)
+
+#endif /* _MEMBLK_H */

commit a7774f5911624928ed1d9cfed5453aab206c512e
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Thu Sep 6 17:35:16 2018 +0800

    common: boot_rkimg: set "androidboot.mode=" as "normal" or "charger"
    
    - The legacy setting rule is deprecated(Android SDK < 8.1).
    - Provide CONFIG_RKIMG_ANDROID_BOOTMODE_LEGACY to enable legacy setting.
    
    Change-Id: I5c8b442b02df068a0ab98ccc81a4f008ebe540c1
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 11402c8b42..36ec749a04 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -537,6 +537,14 @@ config RKIMG_BOOTLOADER
 	  with dtb and uboot/kernel logo bmp, vendor storage for custom info
 	  like SN and MAC address.
 
+config RKIMG_ANDROID_BOOTMODE_LEGACY
+	bool "Support set androidboot.mode with legacy rule"
+	depends on RKIMG_BOOTLOADER
+	default n
+	help
+	  Rockchip set "androidboot.mode=" as "charger" or boot media for android,
+	  which is a rockchip private solution(SDK < 8.1) and deprecated.
+
 config ROCKCHIP_RESOURCE_IMAGE
 	bool "Enable support for rockchip resource image"
 	depends on RKIMG_BOOTLOADER
diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index dc7f1a06b6..ca8c2a42d3 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -208,10 +208,21 @@ int get_bootdev_type(void)
 
 	if (!appended && boot_media) {
 		appended = 1;
-		/*
-		 * 1. androidboot.mode=charger has higher priority, not override;
-		 * 2. rknand doesn't need "androidboot.mode=";
-		 */
+
+	/*
+	 * The legacy rockchip Android (SDK < 8.1) requires "androidboot.mode="
+	 * to be "charger" or boot media which is a rockchip private solution.
+	 *
+	 * The official Android rule (SDK >= 8.1) is:
+	 * "androidboot.mode=normal" or "androidboot.mode=charger".
+	 *
+	 * Now that this U-Boot is usually working with higher version
+	 * Android (SDK >= 8.1), we follow the official rules.
+	 *
+	 * Common: androidboot.mode=charger has higher priority, don't override;
+	 */
+#ifdef CONFIG_RKIMG_ANDROID_BOOTMODE_LEGACY
+		/* rknand doesn't need "androidboot.mode="; */
 		if (env_exist("bootargs", "androidboot.mode=charger") ||
 		    (type == IF_TYPE_RKNAND) ||
 		    (type == IF_TYPE_SPINAND) ||
@@ -222,6 +233,15 @@ int get_bootdev_type(void)
 			snprintf(boot_options, sizeof(boot_options),
 				 "storagemedia=%s androidboot.mode=%s",
 				 boot_media, boot_media);
+#else
+		if (env_exist("bootargs", "androidboot.mode=charger"))
+			snprintf(boot_options, sizeof(boot_options),
+				 "storagemedia=%s", boot_media);
+		else
+			snprintf(boot_options, sizeof(boot_options),
+				 "storagemedia=%s androidboot.mode=normal",
+				 boot_media);
+#endif
 		env_update("bootargs", boot_options);
 	}
 

commit e95ee152a4ba4e58e479600ba3c2d430af164a33
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Mar 14 18:29:13 2019 +0800

    common: image-fdt: only care about enabled reserved-memory
    
    Change-Id: I2c17cb1a8237e709cf8a528b35be2dcea70d4627
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/image-fdt.c b/common/image-fdt.c
index 6bdbe6c902..c903d51443 100644
--- a/common/image-fdt.c
+++ b/common/image-fdt.c
@@ -88,6 +88,7 @@ void boot_fdt_add_mem_rsv_regions(struct lmb *lmb, void *fdt_blob)
 	fdt_addr_t rsv_addr;
 	/* we needn't repeat do reserve, do_bootm_linux would call this again */
 	static int rsv_done;
+	const void *prop;
 
 	if (fdt_check_header(fdt_blob) != 0 || rsv_done)
 		return;
@@ -110,6 +111,10 @@ void boot_fdt_add_mem_rsv_regions(struct lmb *lmb, void *fdt_blob)
 	for (offset = fdt_first_subnode(fdt_blob, rsv_offset);
 	     offset >= 0;
 	     offset = fdt_next_subnode(fdt_blob, offset)) {
+		prop = fdt_getprop(fdt_blob, offset, "status", NULL);
+		if (prop && !strcmp(prop, "disabled"))
+			continue;
+
 		rsv_addr = fdtdec_get_addr_size_auto_noparent(fdt_blob, offset,
 							      "reg", 0,
 							      &rsv_size, false);
@@ -137,6 +142,7 @@ int boot_fdt_add_sysmem_rsv_regions(void *fdt_blob)
 	fdt_addr_t rsv_addr;
 	static int rsv_done;
 	char resvname[32];
+	const void *prop;
 	int ret;
 
 	if (fdt_check_header(fdt_blob) != 0 || rsv_done)
@@ -163,6 +169,10 @@ int boot_fdt_add_sysmem_rsv_regions(void *fdt_blob)
 	for (offset = fdt_first_subnode(fdt_blob, rsv_offset);
 	     offset >= 0;
 	     offset = fdt_next_subnode(fdt_blob, offset)) {
+		prop = fdt_getprop(fdt_blob, offset, "status", NULL);
+		if (prop && !strcmp(prop, "disabled"))
+			continue;
+
 		rsv_addr = fdtdec_get_addr_size_auto_noparent(fdt_blob, offset,
 							      "reg", 0,
 							      &rsv_size, false);

commit a78c73bb661fb82d665f69745fc5b80d5c32b57f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Mar 14 18:20:51 2019 +0800

    include: lmb: increase MAX_LMB_REGIONS to 16
    
    Maybe 8 is not enough.
    
    Change-Id: Idc4813fa406def5401fdf423cdf30d47555d1a92
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/lmb.h b/include/lmb.h
index 6b6959fd86..ece2a54e5b 100644
--- a/include/lmb.h
+++ b/include/lmb.h
@@ -11,7 +11,7 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
-#define MAX_LMB_REGIONS 8
+#define MAX_LMB_REGIONS 16
 
 struct lmb_property {
 	phys_addr_t base;

commit e5f393836beb9bad70af6cfe5d1549c9d1e4f74f
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Wed Mar 6 14:38:42 2019 +0800

    driver: ram: rv1108: use common code to setup ddr parameter
    
    use rockchip_setup_ddr_param to setup ddr parameter.
    The dram_init() and dram_init_banksize() make use of
    sdram common code.
    
    Change-Id: Icfc6cbef9fcc128e3a835184b46b89b9b22aab16
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rv1108/rv1108.c b/arch/arm/mach-rockchip/rv1108/rv1108.c
index 86bfdea237..e88f27f5d9 100644
--- a/arch/arm/mach-rockchip/rv1108/rv1108.c
+++ b/arch/arm/mach-rockchip/rv1108/rv1108.c
@@ -57,24 +57,3 @@ void board_debug_uart_init(void)
 #endif
 #endif /*CONFIG_SPL_BUILD*/
 }
-
-int dram_init(void)
-{
-	struct rv1108_grf *grf = (void *)GRF_BASE;
-
-	gd->ram_size = rockchip_sdram_size((phys_addr_t)&grf->os_reg2);
-
-	return 0;
-}
-
-int dram_init_banksize(void)
-{
-	size_t max_size = min((unsigned long)(gd->ram_size +
-			      CONFIG_SYS_SDRAM_BASE), gd->ram_top);
-
-	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
-	gd->bd->bi_dram[0].size = max_size - gd->bd->bi_dram[0].start;
-
-	return 0;
-}
-
diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig
index dc77050846..c605c33a13 100644
--- a/configs/evb-rv1108_defconfig
+++ b/configs/evb-rv1108_defconfig
@@ -2,6 +2,8 @@ CONFIG_ARM=y
 # CONFIG_SPL_USE_ARCH_MEMCPY is not set
 # CONFIG_SPL_USE_ARCH_MEMSET is not set
 CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RV1108=y
 CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
@@ -16,6 +18,7 @@ CONFIG_DEBUG_UART=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y
+CONFIG_PANIC_HANG=y
 CONFIG_TPL_TINY_FRAMEWORK=y
 CONFIG_TPL_SERIAL_SUPPORT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x62000000
@@ -35,11 +38,12 @@ CONFIG_CMD_TIME=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_TPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
-CONFIG_SPL_OF_PLATDATA=y
 CONFIG_TPL_OF_PLATDATA=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
 CONFIG_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index fa2b99d24c..db46f5680f 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -16,6 +16,7 @@ obj-$(CONFIG_ROCKCHIP_RK3399) += sdram_rk3399.o
 obj-$(CONFIG_ROCKCHIP_PX30) += sdram_px30.o sdram_pctl_px30.o sdram_phy_px30.o
 obj-$(CONFIG_ROCKCHIP_PX30) += rockchip_sdram.o
 obj-$(CONFIG_ROCKCHIP_RK1808) = rockchip_sdram.o
+obj-$(CONFIG_ROCKCHIP_RV1108) += rockchip_sdram.o
 obj-$(CONFIG_ROCKCHIP_RK3036) = rockchip_sdram.o
 obj-$(CONFIG_ROCKCHIP_RK3308) = rockchip_sdram.o
 ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
diff --git a/drivers/ram/rockchip/rockchip_sdram.c b/drivers/ram/rockchip/rockchip_sdram.c
index 78e15eb142..437e675e30 100644
--- a/drivers/ram/rockchip/rockchip_sdram.c
+++ b/drivers/ram/rockchip/rockchip_sdram.c
@@ -9,6 +9,7 @@
 #include <syscon.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/grf_px30.h>
+#include <asm/arch/grf_rv1108.h>
 #include <asm/arch/grf_rk1808.h>
 #include <asm/arch/grf_rk3036.h>
 #include <asm/arch/grf_rk3308.h>
@@ -28,7 +29,13 @@ static int dmc_probe(struct udevice *dev)
 	struct dram_info *priv = dev_get_priv(dev);
 
 	if (!(gd->flags & GD_FLG_RELOC)) {
-#if defined(CONFIG_ROCKCHIP_RK3036)
+#if defined(CONFIG_ROCKCHIP_RV1108)
+		struct rv1108_grf *grf =
+			syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
+		priv->info.size =
+			rockchip_sdram_size((phys_addr_t)&grf->os_reg2);
+#elif defined(CONFIG_ROCKCHIP_RK3036)
 		struct rk3036_grf *grf =
 			syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 
@@ -81,7 +88,9 @@ static struct ram_ops dmc_ops = {
 };
 
 static const struct udevice_id dmc_ids[] = {
-#if defined(CONFIG_ROCKCHIP_RK3036)
+#if defined(CONFIG_ROCKCHIP_RV1108)
+	{ .compatible = "rockchip,rv1108-dmc" },
+#elif defined(CONFIG_ROCKCHIP_RK3036)
 	{ .compatible = "rockchip,rk3036-dmc" },
 #elif defined(CONFIG_ROCKCHIP_RK3308)
 	{ .compatible = "rockchip,rk3308-dmc" },
diff --git a/drivers/ram/rockchip/sdram_rv1108.c b/drivers/ram/rockchip/sdram_rv1108.c
index d8851adf79..696e24838c 100644
--- a/drivers/ram/rockchip/sdram_rv1108.c
+++ b/drivers/ram/rockchip/sdram_rv1108.c
@@ -112,9 +112,21 @@ void *get_base_addr(unsigned int *reg, unsigned int offset)
 	return (void *)p;
 }
 
+void get_ddr_param(struct dram_info *sdram_priv,
+		   struct ddr_param *ddr_param)
+{
+	size_t ram_size =
+		rockchip_sdram_size((phys_addr_t)&sdram_priv->grf->os_reg2);
+
+	ddr_param->count = 1;
+	ddr_param->para[0] = CONFIG_SYS_SDRAM_BASE;
+	ddr_param->para[1] = ram_size;
+}
+
 int sdram_init(void)
 {
 	int ret;
+	struct ddr_param ddr_param;
 	struct dram_info *sdram_priv = &info;
 	struct driver_info *info =
 		ll_entry_start(struct driver_info, driver_info);
@@ -136,5 +148,8 @@ int sdram_init(void)
 	if (ret)
 		debug("rv1108_sdram_init() fail!");
 
+	get_ddr_param(sdram_priv, &ddr_param);
+	rockchip_setup_ddr_param(&ddr_param);
+
 	return ret;
 }
diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h
index 44cd4e3f6f..0463f236b8 100644
--- a/include/configs/rv1108_common.h
+++ b/include/configs/rv1108_common.h
@@ -22,7 +22,7 @@
 /* SPL support */
 #define CONFIG_SPL_STACK		0x10080700
 #define CONFIG_SPL_TEXT_BASE		0x10080800
-#define CONFIG_SPL_MAX_SIZE		0x1700
+#define CONFIG_SPL_MAX_SIZE		0x4000
 
 /* BSS setup */
 #define CONFIG_SPL_BSS_MAX_SIZE		0x100

commit 4cd861d04babddfd85cfe4f082aa568ff97f38e7
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Wed Mar 6 14:28:59 2019 +0800

    arm64: dts: rockchip: rv1108: add u-boot,dm-pre-reloc
    
    The uart, dmc and grf device add "u-boot,dm-pre-reloc".
    Before relocated, u-boot will analyse dram capacity which
    is need the device of "u-boot,dm-pre-reloc" attribute.
    
    Change-Id: I1d18b564b0c521b176a2293a03403139034ccc0b
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

diff --git a/arch/arm/dts/rv1108-evb.dts b/arch/arm/dts/rv1108-evb.dts
index d63e0cf1df..db5aebb6d5 100644
--- a/arch/arm/dts/rv1108-evb.dts
+++ b/arch/arm/dts/rv1108-evb.dts
@@ -7,6 +7,7 @@
 /dts-v1/;
 
 #include "rv1108.dtsi"
+#include "rv1108-u-boot.dtsi"
 #include "rv1108-sdram-ddr3-400.dtsi"
 #include <dt-bindings/input/input.h>
 
@@ -182,7 +183,6 @@
 };
 
 &emmc {
-	u-boot,dm-pre-reloc;
 	bus-width = <8>;
 	cap-mmc-highspeed;
 	supports-emmc;
diff --git a/arch/arm/dts/rv1108-u-boot.dtsi b/arch/arm/dts/rv1108-u-boot.dtsi
new file mode 100644
index 0000000000..f065afd9d0
--- /dev/null
+++ b/arch/arm/dts/rv1108-u-boot.dtsi
@@ -0,0 +1,27 @@
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+&emmc {
+	u-boot,dm-pre-reloc;
+};
+
+&dmc {
+	u-boot,dm-pre-reloc;
+};
+
+&grf {
+	u-boot,dm-pre-reloc;
+};
+
+&uart2 {
+	u-boot,dm-pre-reloc;
+};
+&uart1 {
+	u-boot,dm-pre-reloc;
+};
+&uart0 {
+	u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/rv1108.dtsi b/arch/arm/dts/rv1108.dtsi
index 349e72a987..5354ac3b1e 100644
--- a/arch/arm/dts/rv1108.dtsi
+++ b/arch/arm/dts/rv1108.dtsi
@@ -682,7 +682,6 @@
 	};
 
 	dmc: dmc@202b0000 {
-                u-boot,dm-pre-reloc;
                 compatible = "rockchip,rv1108-dmc";
                 reg = <0x202b0000 0x400
 		       0x20210000 0x400
diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig
index 8b3c477645..dc77050846 100644
--- a/configs/evb-rv1108_defconfig
+++ b/configs/evb-rv1108_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 # CONFIG_SPL_USE_ARCH_MEMCPY is not set
 # CONFIG_SPL_USE_ARCH_MEMSET is not set
 CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RV1108=y
 CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_RKIMG_BOOTLOADER=y

commit a0f7ba0595aae57a2ab9266cecc69952e57739f1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Mar 21 10:24:47 2019 +0800

    common: fdt support: delete env "initrd="
    
    Fix AB sysmem miss delete env "initrd=".
    
    Change-Id: I77ab135644d3b1d2a2eb3f3be6168cf6ef4417df
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/fdt_support.c b/common/fdt_support.c
index b096762b1b..28caaf0d51 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -315,12 +315,13 @@ int fdt_chosen(void *fdt)
 #ifdef CONFIG_ANDROID_AB
 				env_update_filter("bootargs", bootargs, "root=");
 #else
+				env_update("bootargs", bootargs);
+#endif
 				/*
 				 * Initrd fixup: remove unused "initrd=0x...,0x...",
 				 * this for compatible with legacy parameter.txt
 				 */
-				env_update_filter("bootargs", bootargs, "initrd=");
-#endif
+				env_delete("bootargs", "initrd=", 0);
 			}
 #endif
 		}

commit 6e9d994efbb82d7deee1f42f190a6c49439c4ace
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue Mar 19 21:59:37 2019 +0800

    rkflash: support 8KB page size slc flash
    
    comfirm in MT29F16G08ABABA
    
    Change-Id: Ib2a3c62b3a4c9b9880c78fb01d39d4ad8fe2ac87
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/flash.c b/drivers/rkflash/flash.c
index c42e6d887f..835efe7f51 100644
--- a/drivers/rkflash/flash.c
+++ b/drivers/rkflash/flash.c
@@ -525,7 +525,8 @@ u32 nandc_flash_init(void __iomem *nandc_addr)
 			    id_byte[0][1] != 0xDA &&
 			    id_byte[0][1] != 0xD1 &&
 			    id_byte[0][1] != 0x95 &&
-			    id_byte[0][1] != 0xDC)
+			    id_byte[0][1] != 0xDC &&
+			    id_byte[0][1] != 0x48)
 
 				return FTL_UNSUPPORTED_FLASH;
 		}
@@ -542,13 +543,18 @@ u32 nandc_flash_init(void __iomem *nandc_addr)
 			nand_para.plane_per_die = 2;
 			nand_para.sec_per_page = 8;
 		} else if (id_byte[0][0] == 0x98 && id_byte[0][3] == 0x26) {
-			nand_para.blk_per_plane = 1024;;
+			nand_para.blk_per_plane = 1024;
 			nand_para.sec_per_page = 8;
 			nand_para.plane_per_die = 2;
 		} else {
 			nand_para.plane_per_die = 2;
 			nand_para.blk_per_plane = 2048;
 		}
+	} else if (id_byte[0][1] == 0x48) {
+		nand_para.sec_per_page = 8;
+		nand_para.page_per_blk = 128;
+		nand_para.plane_per_die = 2;
+		nand_para.blk_per_plane = 2048;
 	}
 	flash_die_info_init();
 	flash_bch_sel(nand_para.ecc_bits);

commit ee561e345b97338e95a34699274e51caeed75acf
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Mar 8 17:12:53 2019 +0800

    lib: avb: AVB_VBMETA_PUBLIC_KEY_VALIDATE select CONSOLE_DISABLE_CTRLC
    
    Clean coding style by the way.
    
    Change-Id: Ib614175e9ea7ceebc49030235b66d82adc57d3a0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/lib/avb/libavb_user/Kconfig b/lib/avb/libavb_user/Kconfig
index c9a8da265a..6a5a307d4a 100755
--- a/lib/avb/libavb_user/Kconfig
+++ b/lib/avb/libavb_user/Kconfig
@@ -7,15 +7,16 @@ config AVB_LIBAVB_USER
 	  to fastboot and kernel.
 
 config AVB_VBMETA_PUBLIC_KEY_VALIDATE
-        bool "Support vbmeta public key validate"
-        depends on AVB_LIBAVB_USER
-        help
-          support vbmeta public key validate, system bootflow would be
-          uninterruptale when it is enabled:
-            - only allow "boot_android" as bootcmd;
-            - enter rockusb or fastboot when boot failed;
-            - not allow ctrl+c to enter hush;
-          only the CONFIG_BOOTDELAY can interrupt the bootflow.
+	bool "Support vbmeta public key validate"
+	depends on AVB_LIBAVB_USER
+	select CONSOLE_DISABLE_CTRLC
+	help
+	  support vbmeta public key validate, system bootflow would be
+	  uninterruptale when it is enabled:
+	    - only allow "boot_android" as bootcmd;
+	    - enter rockusb or fastboot when boot failed;
+	    - not allow ctrl+c to enter hush;
+	  only the CONFIG_BOOTDELAY can interrupt the bootflow.
 
 config SPL_AVB_LIBAVB_USER
 	bool "Android AVB read/write hardware for spl"

commit 590d13d737ce5c2d233367368a2904f40053be91
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Mar 8 17:11:23 2019 +0800

    console: add CONFIG_CONSOLE_DISABLE_CTRLC to disable ctrlc
    
    There are sometimes we would like to disable ctrlc, just enable it.
    
    Change-Id: I2911650b22d47b057a039774d8293cad6317bb6d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/Kconfig b/common/Kconfig
index c4ef08fb82..f7a7dd952f 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -249,6 +249,11 @@ config CONSOLE_RECORD_IN_SIZE
 	  The buffer is allocated immediately after the malloc() region is
 	  ready.
 
+config CONSOLE_DISABLE_CTRLC
+	bool "disable ctrlc"
+	help
+	  This disable ctrl+c when CONFIG_BOOTDELAY is 0.
+
 config IDENT_STRING
 	string "Board specific string to be added to uboot version string"
 	help
diff --git a/common/console.c b/common/console.c
index 399f001f27..4990fdd69a 100644
--- a/common/console.c
+++ b/common/console.c
@@ -412,13 +412,6 @@ int getc(void)
 
 int tstc(void)
 {
-/* Don't allow drivers call tstc() to do some "exit" event(maybe enter hush) */
-#if defined(CONFIG_ARCH_ROCKCHIP) && \
-    defined(CONFIG_AVB_VBMETA_PUBLIC_KEY_VALIDATE) && \
-    defined(CONFIG_BOOTDELAY) && (CONFIG_BOOTDELAY <= 0)
-	return 0;
-#endif
-
 #ifdef CONFIG_DISABLE_CONSOLE
 	if (gd->flags & GD_FLG_DISABLE_CONSOLE)
 		return 0;
@@ -601,9 +594,8 @@ static int ctrlc_disabled = 0;	/* see disable_ctrl() */
 static int ctrlc_was_pressed = 0;
 int ctrlc(void)
 {
-/* Don't allow drivers call ctrlc() to do some "exit" event(maybe enter hush) */
-#if defined(CONFIG_ARCH_ROCKCHIP) && \
-    defined(CONFIG_AVB_VBMETA_PUBLIC_KEY_VALIDATE)
+#if defined(CONFIG_CONSOLE_DISABLE_CTRLC) && \
+    defined(CONFIG_BOOTDELAY) && (CONFIG_BOOTDELAY <= 0)
 	return 0;
 #endif
 

commit f3124cd74429849948d85130dff43f77d0f4196f
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Mar 5 15:07:51 2019 +0800

    spl: fit: use ddr for mmc read buffer in SPL for rk3368
    
    rk3368 has the same problem with rk3399.
    
    Change-Id: I242385722f864810273708f03dc62359a7bdb81e
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index f97fa03800..d65cbb1ae6 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -197,7 +197,7 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 			return -ENOENT;
 
 		load_ptr = (load_addr + align_len) & ~align_len;
-#ifdef CONFIG_ROCKCHIP_RK3399
+#if  defined(CONFIG_ROCKCHIP_RK3399) || defined(CONFIG_ROCKCHIP_RK3368)
 		if ((load_ptr & 0xffff0000) == CONFIG_ROCKCHIP_IRAM_START_ADDR)
 			load_ptr = (ulong)memalign(ARCH_DMA_MINALIGN, len);
 #endif

commit 2e68f6b5f95dc7b49d193cb54ca8737d034d6d43
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 5 09:57:47 2019 +0800

    power: charge animation: support long key event without release
    
    Change-Id: I9d7cd439376f2f4ff89ea6bfe3baedbeaa4deeb9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 3a0e885689..b1a814e02b 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -35,7 +35,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define IMAGE_RESET_IDX				-1
 #define IMAGE_SOC_100_IDX(n)			((n) - 2)
 #define IMAGE_LOWPOWER_IDX(n)			((n) - 1)
-
+#define SYSTEM_SUSPEND_DELAY_MS			5000
 #define FUEL_GAUGE_POLL_MS			1000
 
 #define LED_CHARGING_NAME			"battery_charging"
@@ -59,7 +59,8 @@ struct charge_animation_priv {
 	int image_num;
 
 	int auto_wakeup_key_state;
-	ulong auto_screen_off_timeout;
+	ulong auto_screen_off_timeout;	/* ms */
+	ulong suspend_delay_timeout;	/* ms */
 };
 
 /*
@@ -170,7 +171,7 @@ static int check_key_press(struct udevice *dev)
  * period timer is useless.
  */
 #ifndef CONFIG_IRQ
-static int system_suspend_enter(struct charge_animation_pdata *pdata)
+static int system_suspend_enter(struct udevice *dev)
 {
 	return 0;
 }
@@ -179,8 +180,23 @@ static void autowakeup_timer_init(struct udevice *dev, uint32_t seconds) {}
 static void autowakeup_timer_uninit(void) {}
 
 #else
-static int system_suspend_enter(struct charge_animation_pdata *pdata)
+static int system_suspend_enter(struct udevice *dev)
 {
+	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
+	struct charge_animation_priv *priv = dev_get_priv(dev);
+
+	/*
+	 * When cpu is in wfi and we try to give a long key press event without
+	 * key release, cpu would wakeup and enter wfi again immediately. So
+	 * here is the problem: cpu can only wakeup when long key released.
+	 *
+	 * Actually, we want cpu can detect long key event without key release,
+	 * so we give a suspend delay timeout for cpu to detect this.
+	 */
+	if (priv->suspend_delay_timeout &&
+	    get_timer(priv->suspend_delay_timeout) <= SYSTEM_SUSPEND_DELAY_MS)
+		return 0;
+
 	if (pdata->system_suspend && IS_ENABLED(CONFIG_ARM_SMCCC)) {
 		printf("\nSystem suspend: ");
 		putc('0');
@@ -209,8 +225,11 @@ static int system_suspend_enter(struct charge_animation_pdata *pdata)
 	} else {
 		printf("\nWfi\n");
 		wfi();
+		putc('1');
 	}
 
+	priv->suspend_delay_timeout = get_timer(0);
+
 	/*
 	 * We must wait for key release event finish, otherwise
 	 * we may read key state too early.
@@ -362,7 +381,7 @@ static int charge_extrem_low_power(struct udevice *dev)
 		       pdata->low_power_voltage, voltage);
 
 		/* System suspend */
-		system_suspend_enter(pdata);
+		system_suspend_enter(dev);
 
 		/* Update voltage */
 		voltage = fuel_gauge_get_voltage(fg);
@@ -629,8 +648,7 @@ show_images:
 				priv->auto_screen_off_timeout = get_timer(0);
 		} else {
 			priv->auto_screen_off_timeout = 0;
-
-			system_suspend_enter(pdata);
+			system_suspend_enter(dev);
 		}
 
 		mdelay(5);
@@ -673,14 +691,19 @@ show_images:
 			if (screen_on) {
 				charge_show_bmp(NULL); /* Turn off screen */
 				screen_on = false;
+				priv->suspend_delay_timeout = get_timer(0);
 			} else {
 				screen_on = true;
 			}
+
+			printf("screen %s\n", screen_on ? "on" : "off");
 		} else if (key_state == KEY_PRESS_LONG_DOWN) {
 			/* Set screen_on=true anyway when key long pressed */
 			if (!screen_on)
 				screen_on = true;
 
+			printf("screen %s\n", screen_on ? "on" : "off");
+
 			/* Is able to boot now ? */
 			if (soc < pdata->exit_charge_level) {
 				printf("soc=%d%%, threshold soc=%d%%\n",

commit 6787bf9f0a0a3972da5287523cfe6bf7f1e2e007
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Fri Mar 15 15:32:16 2019 +0800

    configs: rk3326: enable lzo/lz4
    
    Change-Id: I7184cd7020a0bbe18dfa91d5a0cfba2e44ccc40c
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/configs/rk3326_defconfig b/configs/rk3326_defconfig
index b4e4487fff..698f4e50a5 100644
--- a/configs/rk3326_defconfig
+++ b/configs/rk3326_defconfig
@@ -121,6 +121,8 @@ CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
+CONFIG_LZ4=y
+CONFIG_LZO=y
 CONFIG_ERRNO_STR=y
 CONFIG_OF_LIBFDT_OVERLAY=y
 # CONFIG_EFI_LOADER is not set

commit b60f8c855632938690460919ee118478a37a43b3
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Fri Mar 15 14:13:15 2019 +0800

    configs: px30: enable lzo/lz4
    
    Change-Id: Ie914d9181e2ab06f92060b359cb65f6139f946db
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 537eb862a0..98260f19b0 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -127,6 +127,8 @@ CONFIG_VIDEO_BRIDGE_ANALOGIX_ANX6345=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
+CONFIG_LZ4=y
+CONFIG_LZO=y
 CONFIG_ERRNO_STR=y
 # CONFIG_EFI_LOADER is not set
 CONFIG_OPTEE_CLIENT=y
diff --git a/configs/px30_defconfig b/configs/px30_defconfig
index fa6f3ca739..d28f6778ae 100644
--- a/configs/px30_defconfig
+++ b/configs/px30_defconfig
@@ -129,6 +129,8 @@ CONFIG_VIDEO_BRIDGE_ANALOGIX_ANX6345=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
+CONFIG_LZ4=y
+CONFIG_LZO=y
 CONFIG_ERRNO_STR=y
 CONFIG_OF_LIBFDT_OVERLAY=y
 # CONFIG_EFI_LOADER is not set

commit b4a0434fc98903ef97eae434c21a6082a6942e5a
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Fri Mar 8 10:14:43 2019 +0800

    lib: optee_client: do not init RK FS if security not exist
    
    Change-Id: I91e780448cee7884c7477cb0b5720f962b2df00d
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/include/optee_include/OpteeClientRkFs-v2.h b/include/optee_include/OpteeClientRkFs-v2.h
index fa710adb7e..57138a07dd 100644
--- a/include/optee_include/OpteeClientRkFs-v2.h
+++ b/include/optee_include/OpteeClientRkFs-v2.h
@@ -71,5 +71,6 @@ int tee_supp_rk_fs_init(void);
 int tee_supp_rk_fs_process(size_t num_params,
 			struct tee_ioctl_param *params);
 int OpteeClientRkFsInit(void);
+int check_security_exist(int print_flag);
 
 #endif
diff --git a/include/optee_include/OpteeClientRkFs.h b/include/optee_include/OpteeClientRkFs.h
index ed91aa9c11..d70c118c75 100644
--- a/include/optee_include/OpteeClientRkFs.h
+++ b/include/optee_include/OpteeClientRkFs.h
@@ -35,4 +35,6 @@ int tee_supp_rk_fs_process(void *cmd, uint32_t cmd_size);
 
 int OpteeClientRkFsInit(void);
 
+int check_security_exist(int print_flag);
+
 #endif
diff --git a/lib/optee_clientApi/OpteeClientRPC.c b/lib/optee_clientApi/OpteeClientRPC.c
index 919e89fac1..c2ddbc381d 100644
--- a/lib/optee_clientApi/OpteeClientRPC.c
+++ b/lib/optee_clientApi/OpteeClientRPC.c
@@ -504,6 +504,11 @@ TEEC_Result OpteeRpcCmdFs(t_teesmc32_arg *TeeSmc32Arg)
 	TEEC_Result TeecResult = TEEC_SUCCESS;
 	t_teesmc32_param *TeeSmc32Param;
 
+	if (check_security_exist(0) < 0) {
+		printf("security partition not exist! unable to use RK FS!\n");
+		return TEEC_ERROR_GENERIC;
+	}
+
 	TeeSmc32Param = TEESMC32_GET_PARAMS(TeeSmc32Arg);
 #ifdef CONFIG_OPTEE_V1
 	TeecResult = tee_supp_rk_fs_process((void *)(size_t)TeeSmc32Param[0].u.memref.buf_ptr,
diff --git a/lib/optee_clientApi/OpteeClientRkFs-v2.c b/lib/optee_clientApi/OpteeClientRkFs-v2.c
index 542e32d720..ce826d25d5 100644
--- a/lib/optee_clientApi/OpteeClientRkFs-v2.c
+++ b/lib/optee_clientApi/OpteeClientRkFs-v2.c
@@ -174,6 +174,27 @@ static int dir_seek;
 
 static struct blk_desc *dev_desc = NULL;
 static disk_partition_t part_info;
+
+int check_security_exist(int print_flag)
+{
+	if (!dev_desc) {
+		dev_desc = rockchip_get_bootdev();
+		if (!dev_desc) {
+			printf("%s: Could not find device\n", __func__);
+			return -1;
+		}
+
+		if (part_get_info_by_name(dev_desc,
+					  "security", &part_info) < 0) {
+			dev_desc = NULL;
+			if (print_flag != 0)
+				printf("Could not find security partition\n");
+			return -1;
+		}
+	}
+	return 0;
+}
+
 /*
  * action1:
  * rkss_begin_commit	set enable flag
@@ -197,20 +218,8 @@ static int rkss_begin_commit(void)
 	struct rkss_backup_verification p;
 	unsigned long ret;
 
-	if (!dev_desc) {
-		dev_desc = rockchip_get_bootdev();
-		if (!dev_desc) {
-			printf("%s: Could not find device\n", __func__);
-			return -1;
-		}
-
-		if (part_get_info_by_name(dev_desc,
-					  "security", &part_info) < 0) {
-			dev_desc = NULL;
-			printf("Could not find security partition\n");
-			return -1;
-		}
-	}
+	if (check_security_exist(1) < 0)
+		return -1;
 
 	debug("%s\n", __func__);
 	p.backup_version = RKSS_BACKUP_VERSION;
@@ -233,20 +242,8 @@ static int rkss_finish_commit(void)
 	unsigned char data[RKSS_DATA_LEN];
 	unsigned long ret;
 
-	if (!dev_desc) {
-		dev_desc = rockchip_get_bootdev();
-		if (!dev_desc) {
-			printf("%s: Could not find device\n", __func__);
-			return -1;
-		}
-
-		if (part_get_info_by_name(dev_desc,
-					  "security", &part_info) < 0) {
-			dev_desc = NULL;
-			printf("Could not find security partition\n");
-			return -1;
-		}
-	}
+	if (check_security_exist(1) < 0)
+		return -1;
 
 	debug("%s\n", __func__);
 	memset(data, 0, sizeof(data));
@@ -267,20 +264,8 @@ static int rkss_backup_sections(unsigned long index, unsigned int num)
 	struct rkss_backup_info info_last, info_current;
 	unsigned long ret;
 
-	if (!dev_desc) {
-		dev_desc = rockchip_get_bootdev();
-		if (!dev_desc) {
-			printf("%s: Could not find device\n", __func__);
-			return -1;
-		}
-
-		if (part_get_info_by_name(dev_desc,
-					  "security", &part_info) < 0) {
-			dev_desc = NULL;
-			printf("Could not find security partition\n");
-			return -1;
-		}
-	}
+	if (check_security_exist(1) < 0)
+		return -1;
 
 	ret = blk_dread(dev_desc, RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
@@ -366,20 +351,8 @@ static int rkss_resume(void)
 	unsigned int i;
 	unsigned long ret;
 
-	if (!dev_desc) {
-		dev_desc = rockchip_get_bootdev();
-		if (!dev_desc) {
-			printf("%s: Could not find device\n", __func__);
-			return -1;
-		}
-
-		if (part_get_info_by_name(dev_desc,
-					  "security", &part_info) < 0) {
-			dev_desc = NULL;
-			printf("Could not find security partition\n");
-			return -1;
-		}
-	}
+	if (check_security_exist(1) < 0)
+		return -1;
 
 	ret = blk_dread(dev_desc, RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
@@ -460,19 +433,9 @@ static int rkss_read_multi_sections(unsigned char *data, unsigned long index, un
 {
 	unsigned long ret;
 
-	if (dev_desc == NULL) {
-		dev_desc = rockchip_get_bootdev();
-		if (!dev_desc) {
-			printf("%s: Could not find device\n", __func__);
-			return -1;
-		}
+	if (check_security_exist(1) < 0)
+		return -1;
 
-		if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
-			dev_desc = NULL;
-			printf("Could not find security partition\n");
-			return -1;
-		}
-	}
 	ret = blk_dread(dev_desc, part_info.start + index, num, data);
 	if (ret != num) {
 		printf("blk_dread fail\n");
@@ -492,19 +455,9 @@ static int rkss_write_multi_sections(unsigned char *data, unsigned long index, u
 		return -1;
 	}
 
-	if (dev_desc == NULL) {
-		dev_desc = rockchip_get_bootdev();
-		if (!dev_desc) {
-			printf("%s: Could not find device\n", __func__);
-			return -1;
-		}
+	if (check_security_exist(1) < 0)
+		return -1;
 
-		if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
-			dev_desc = NULL;
-			printf("Could not find security partition\n");
-			return -1;
-		}
-	}
 	ret = blk_dwrite(dev_desc, part_info.start + index, num, data);
 	if (ret != num) {
 		printf("blk_dwrite fail\n");
@@ -517,19 +470,9 @@ static int rkss_read_patition_tables(unsigned char *data)
 {
 	unsigned long ret;
 
-	if (dev_desc == NULL) {
-		dev_desc = rockchip_get_bootdev();
-		if (!dev_desc) {
-			printf("%s: Could not find device\n", __func__);
-			return -1;
-		}
+	if (check_security_exist(1) < 0)
+		return -1;
 
-		if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
-			dev_desc = NULL;
-			printf("Could not find security partition\n");
-			return -1;
-		}
-	}
 	ret = blk_dread(dev_desc, part_info.start, RKSS_PARTITION_TABLE_COUNT, data);
 	if (ret != RKSS_PARTITION_TABLE_COUNT) {
 		printf("blk_dread fail\n");
@@ -1553,6 +1496,9 @@ int tee_supp_rk_fs_init(void)
 	struct rk_secure_storage rkss = {0};
 	unsigned char *table_data;
 
+	if (check_security_exist(0) < 0)
+		return 0;
+
 	ret = rkss_resume();
 	if (ret < 0) {
 		printf("rkss_resume failed!");
diff --git a/lib/optee_clientApi/OpteeClientRkFs.c b/lib/optee_clientApi/OpteeClientRkFs.c
index eb9ccfacc5..53a2ebcaca 100644
--- a/lib/optee_clientApi/OpteeClientRkFs.c
+++ b/lib/optee_clientApi/OpteeClientRkFs.c
@@ -186,6 +186,27 @@ extern unsigned long blk_dwrite(struct blk_desc *block_dev, lbaint_t start,
 
 static struct blk_desc *dev_desc = NULL;
 static disk_partition_t part_info;
+
+int check_security_exist(int print_flag)
+{
+	if (!dev_desc) {
+		dev_desc = rockchip_get_bootdev();
+		if (!dev_desc) {
+			printf("%s: Could not find device\n", __func__);
+			return -1;
+		}
+
+		if (part_get_info_by_name(dev_desc,
+					  "security", &part_info) < 0) {
+			dev_desc = NULL;
+			if (print_flag != 0)
+				printf("Could not find security partition\n");
+			return -1;
+		}
+	}
+	return 0;
+}
+
 /*
  * action1:
  * rkss_begin_commit	set enable flag
@@ -209,20 +230,8 @@ static int rkss_begin_commit(void)
 	struct rkss_backup_verification p;
 	unsigned long ret;
 
-	if (!dev_desc) {
-		dev_desc = rockchip_get_bootdev();
-		if (!dev_desc) {
-			printf("%s: Could not find device\n", __func__);
-			return -1;
-		}
-
-		if (part_get_info_by_name(dev_desc,
-					  "security", &part_info) < 0) {
-			dev_desc = NULL;
-			printf("Could not find security partition\n");
-			return -1;
-		}
-	}
+	if (check_security_exist(1) < 0)
+		return -1;
 
 	debug("%s\n", __func__);
 	p.backup_version = RKSS_BACKUP_VERSION;
@@ -245,20 +254,8 @@ static int rkss_finish_commit(void)
 	unsigned char data[RKSS_DATA_LEN];
 	unsigned long ret;
 
-	if (!dev_desc) {
-		dev_desc = rockchip_get_bootdev();
-		if (!dev_desc) {
-			printf("%s: Could not find device\n", __func__);
-			return -1;
-		}
-
-		if (part_get_info_by_name(dev_desc,
-					  "security", &part_info) < 0) {
-			dev_desc = NULL;
-			printf("Could not find security partition\n");
-			return -1;
-		}
-	}
+	if (check_security_exist(1) < 0)
+		return -1;
 
 	debug("%s\n", __func__);
 	memset(data, 0, sizeof(data));
@@ -279,20 +276,8 @@ static int rkss_backup_sections(unsigned long index, unsigned int num)
 	struct rkss_backup_info info_last, info_current;
 	unsigned long ret;
 
-	if (!dev_desc) {
-		dev_desc = rockchip_get_bootdev();
-		if (!dev_desc) {
-			printf("%s: Could not find device\n", __func__);
-			return -1;
-		}
-
-		if (part_get_info_by_name(dev_desc,
-					  "security", &part_info) < 0) {
-			dev_desc = NULL;
-			printf("Could not find security partition\n");
-			return -1;
-		}
-	}
+	if (check_security_exist(1) < 0)
+		return -1;
 
 	ret = blk_dread(dev_desc, RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
@@ -378,20 +363,8 @@ static int rkss_resume(void)
 	unsigned int i;
 	unsigned long ret;
 
-	if (!dev_desc) {
-		dev_desc = rockchip_get_bootdev();
-		if (!dev_desc) {
-			printf("%s: Could not find device\n", __func__);
-			return -1;
-		}
-
-		if (part_get_info_by_name(dev_desc,
-					  "security", &part_info) < 0) {
-			dev_desc = NULL;
-			printf("Could not find security partition\n");
-			return -1;
-		}
-	}
+	if (check_security_exist(1) < 0)
+		return -1;
 
 	ret = blk_dread(dev_desc, RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
@@ -472,19 +445,9 @@ static int rkss_read_multi_sections(unsigned char *data, unsigned long index, un
 {
 	unsigned long ret;
 
-	if (dev_desc == NULL) {
-		dev_desc = rockchip_get_bootdev();
-		if (!dev_desc) {
-			printf("%s: Could not find device\n", __func__);
-			return -1;
-		}
+	if (check_security_exist(1) < 0)
+		return -1;
 
-		if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
-			dev_desc = NULL;
-			printf("Could not find security partition\n");
-			return -1;
-		}
-	}
 	ret = blk_dread(dev_desc, part_info.start + index, num, data);
 	if (ret != num) {
 		printf("blk_dread fail\n");
@@ -509,19 +472,9 @@ static int rkss_write_multi_sections(unsigned char *data, unsigned long index, u
 		return -1;
 	}
 
-	if (dev_desc == NULL) {
-		dev_desc = rockchip_get_bootdev();
-		if (!dev_desc) {
-			printf("%s: Could not find device\n", __func__);
-			return -1;
-		}
+	if (check_security_exist(1) < 0)
+		return -1;
 
-		if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
-			dev_desc = NULL;
-			printf("Could not find security partition\n");
-			return -1;
-		}
-	}
 	ret = blk_dwrite(dev_desc, part_info.start + index, num, data);
 	if (ret != num) {
 		printf("blk_dwrite fail\n");
@@ -539,19 +492,9 @@ static int rkss_read_patition_tables(unsigned char *data)
 {
 	unsigned long ret;
 
-	if (dev_desc == NULL) {
-		dev_desc = rockchip_get_bootdev();
-		if (!dev_desc) {
-			printf("%s: Could not find device\n", __func__);
-			return -1;
-		}
+	if (check_security_exist(1) < 0)
+		return -1;
 
-		if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
-			dev_desc = NULL;
-			printf("Could not find security partition\n");
-			return -1;
-		}
-	}
 	ret = blk_dread(dev_desc, part_info.start, RKSS_PARTITION_TABLE_COUNT, data);
 	if (ret != RKSS_PARTITION_TABLE_COUNT) {
 		printf("blk_dread fail\n");
@@ -1603,6 +1546,9 @@ int tee_supp_rk_fs_init(void)
 	unsigned char *table_data;
 	int ret;
 
+	if (check_security_exist(0) < 0)
+		return 0;
+
 	ret = rkss_resume();
 	if (ret < 0) {
 		printf("rkss_resume failed!");

commit 472ddf73a4b045229b692e803fd5735cf5ea26ae
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Wed Jan 23 09:05:37 2019 +0800

    lib: optee_client: add support for power-off protection
    
    Change-Id: I4babcc1989563a3c707a1cac7e93069031f033dd
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/OpteeClientRkFs-v2.c b/lib/optee_clientApi/OpteeClientRkFs-v2.c
index b1f634997d..542e32d720 100644
--- a/lib/optee_clientApi/OpteeClientRkFs-v2.c
+++ b/lib/optee_clientApi/OpteeClientRkFs-v2.c
@@ -98,7 +98,10 @@
  *	- 512 byte section used refs [128]
  *		- 1 byte = 2 flag
  *	- 895 * 512 byte data	[129 - 1023]
- *	------------------------------
+ *	------ RKSS Backup Structure --------
+ *	- 512 byte backup header  [1024]
+ *		- 1 * rkss_backup_verification + 31 * rkss_backup_info
+ *	- 255 * 512 byte backup data [1025 - 1279]
  *
  */
 #define RKSS_DATA_SECTION_COUNT		1024
@@ -107,6 +110,26 @@
 #define RKSS_EACH_FILEFOLDER_COUNT	4		/* 504 / 126 = 4*/
 #define RKSS_NAME_MAX_LENGTH		117		/* 116 char + "\0"*/
 #define RKSS_USEDFLAGS_INDEX		RKSS_PARTITION_TABLE_COUNT
+#define RKSS_BACKUP_INDEX		RKSS_DATA_SECTION_COUNT
+#define RKSS_BACKUP_COUNT		256
+
+#define RKSS_BACKUP_VERSION		(unsigned int)0x1
+#define RKSS_BACKUP_ENABLE		(unsigned int)0x55667788
+#define RKSS_BACKUP_USEDFLAG		(unsigned int)0xAABBCCDD
+
+struct rkss_backup_verification {
+	unsigned int backup_version;
+	unsigned int backup_count;
+	unsigned int reserve;
+	unsigned int backup_enable;
+};
+
+struct rkss_backup_info {
+	unsigned int backup_index;
+	unsigned int backup_num;
+	unsigned int backup_data_index;
+	unsigned int backup_usedflag;
+};
 
 #define RK_FS_R    0x1
 #define RK_FS_W    0x2
@@ -151,6 +174,288 @@ static int dir_seek;
 
 static struct blk_desc *dev_desc = NULL;
 static disk_partition_t part_info;
+/*
+ * action1:
+ * rkss_begin_commit	set enable flag
+ * rkss_backup_sections	backup data
+ * blk_dwrite
+ * rkss_finish_commit	clear enable flag, clear backup data
+ * reboot
+ * rkss_resume	not find enable flag, do nothing
+ *
+ * action2:
+ * rkss_begin_commit	set enable flag
+ * rkss_backup_sections	backup data
+ * power off when blk_dwrite
+ *
+ * power on
+ * rkss_resume	find enable flag, resume all backup data
+ */
+static int rkss_begin_commit(void)
+{
+	unsigned char data[RKSS_DATA_LEN];
+	struct rkss_backup_verification p;
+	unsigned long ret;
+
+	if (!dev_desc) {
+		dev_desc = rockchip_get_bootdev();
+		if (!dev_desc) {
+			printf("%s: Could not find device\n", __func__);
+			return -1;
+		}
+
+		if (part_get_info_by_name(dev_desc,
+					  "security", &part_info) < 0) {
+			dev_desc = NULL;
+			printf("Could not find security partition\n");
+			return -1;
+		}
+	}
+
+	debug("%s\n", __func__);
+	p.backup_version = RKSS_BACKUP_VERSION;
+	p.backup_enable = RKSS_BACKUP_ENABLE;
+	p.backup_count = 0;
+
+	memset(data, 0, sizeof(data));
+	memcpy(data, &p, sizeof(p));
+
+	ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+	if (ret != 1) {
+		printf("blk_dwrite fail\n");
+		return -1;
+	}
+	return 0;
+}
+
+static int rkss_finish_commit(void)
+{
+	unsigned char data[RKSS_DATA_LEN];
+	unsigned long ret;
+
+	if (!dev_desc) {
+		dev_desc = rockchip_get_bootdev();
+		if (!dev_desc) {
+			printf("%s: Could not find device\n", __func__);
+			return -1;
+		}
+
+		if (part_get_info_by_name(dev_desc,
+					  "security", &part_info) < 0) {
+			dev_desc = NULL;
+			printf("Could not find security partition\n");
+			return -1;
+		}
+	}
+
+	debug("%s\n", __func__);
+	memset(data, 0, sizeof(data));
+
+	ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+	if (ret != 1) {
+		printf("blk_dwrite fail\n");
+		return -1;
+	}
+	return 0;
+}
+
+static int rkss_backup_sections(unsigned long index, unsigned int num)
+{
+	unsigned char data[RKSS_DATA_LEN];
+	unsigned char *backup_data = NULL;
+	struct rkss_backup_verification p;
+	struct rkss_backup_info info_last, info_current;
+	unsigned long ret;
+
+	if (!dev_desc) {
+		dev_desc = rockchip_get_bootdev();
+		if (!dev_desc) {
+			printf("%s: Could not find device\n", __func__);
+			return -1;
+		}
+
+		if (part_get_info_by_name(dev_desc,
+					  "security", &part_info) < 0) {
+			dev_desc = NULL;
+			printf("Could not find security partition\n");
+			return -1;
+		}
+	}
+
+	ret = blk_dread(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+	if (ret != 1) {
+		printf("blk_dread fail\n");
+		return -1;
+	}
+
+	memcpy(&p, data, sizeof(p));
+	if (p.backup_version == RKSS_BACKUP_VERSION &&
+	    p.backup_enable == RKSS_BACKUP_ENABLE) {
+		if (p.backup_count == 0) {
+			info_current.backup_usedflag = RKSS_BACKUP_USEDFLAG;
+			info_current.backup_index = index;
+			info_current.backup_num = num;
+			info_current.backup_data_index = RKSS_BACKUP_INDEX + 1;
+		} else {
+			memcpy(&info_last, data + sizeof(p) +
+			       (p.backup_count - 1) * sizeof(info_last),
+			       sizeof(info_last));
+			info_current.backup_usedflag = RKSS_BACKUP_USEDFLAG;
+			info_current.backup_index = index;
+			info_current.backup_num = num;
+			info_current.backup_data_index =
+				info_last.backup_data_index +
+				info_last.backup_num;
+		}
+		if ((info_current.backup_data_index + info_current.backup_num) >
+			(RKSS_BACKUP_INDEX + RKSS_BACKUP_COUNT)) {
+			printf("Not enough backup sections!");
+			goto error;
+		}
+		debug("%s index=0x%lx num=0x%x backup_data_index=0x%x\n",
+		      __func__, index, num, info_current.backup_data_index);
+
+		backup_data = malloc(num * RKSS_DATA_LEN);
+		if (!backup_data) {
+			printf("malloc backup_data fail\n");
+			goto error;
+		}
+
+		ret = blk_dread(dev_desc, index, num, backup_data);
+		if (ret != num) {
+			printf("blk_dread fail\n");
+			return -1;
+		}
+
+		ret = blk_dwrite(dev_desc, info_current.backup_data_index,
+				 num, backup_data);
+		if (ret != num) {
+			printf("blk_dwrite fail\n");
+			return -1;
+		}
+		free(backup_data);
+		backup_data = NULL;
+
+		p.backup_count += 1;
+
+		memcpy(data, &p, sizeof(p));
+		memcpy(data + sizeof(p) +
+		       (p.backup_count - 1) * sizeof(info_current),
+		       &info_current, sizeof(info_current));
+
+		ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+		if (ret != 1) {
+			printf("blk_dwrite fail\n");
+			return -1;
+		}
+	}
+
+	return 0;
+error:
+	if (backup_data)
+		free(backup_data);
+	return -1;
+}
+
+static int rkss_resume(void)
+{
+	unsigned char data[RKSS_DATA_LEN];
+	unsigned char *backup_data = NULL;
+	struct rkss_backup_verification p;
+	struct rkss_backup_info info_current;
+	unsigned int i;
+	unsigned long ret;
+
+	if (!dev_desc) {
+		dev_desc = rockchip_get_bootdev();
+		if (!dev_desc) {
+			printf("%s: Could not find device\n", __func__);
+			return -1;
+		}
+
+		if (part_get_info_by_name(dev_desc,
+					  "security", &part_info) < 0) {
+			dev_desc = NULL;
+			printf("Could not find security partition\n");
+			return -1;
+		}
+	}
+
+	ret = blk_dread(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+	if (ret != 1) {
+		printf("blk_dread fail\n");
+		return -1;
+	}
+
+	memcpy(&p, data, sizeof(p));
+	if (p.backup_version == RKSS_BACKUP_VERSION &&
+	    p.backup_enable == RKSS_BACKUP_ENABLE) {
+		for (i = p.backup_count; i > 0; i--) {
+			memcpy(&info_current, data + sizeof(p) + (i - 1) *
+			       sizeof(info_current), sizeof(info_current));
+
+			if (info_current.backup_usedflag ==
+			    RKSS_BACKUP_USEDFLAG) {
+				debug("rkss_resume backup_index=0x%x \
+				      backup_num=0x%x \
+				      info_current.backup_data_index=0x%x\n",
+				      info_current.backup_index,
+				      info_current.backup_num,
+				      info_current.backup_data_index);
+				if ((info_current.backup_data_index +
+				    info_current.backup_num) >
+				    (RKSS_BACKUP_INDEX + RKSS_BACKUP_COUNT)) {
+					printf("backup sections error!");
+					goto error;
+				}
+				if ((info_current.backup_index +
+				    info_current.backup_num) >
+				    RKSS_DATA_SECTION_COUNT) {
+					printf("original sections error!");
+					goto error;
+				}
+				backup_data = malloc(info_current.backup_num *
+						     RKSS_DATA_LEN);
+				if (!backup_data) {
+					printf("malloc backup_data fail\n");
+					goto error;
+				}
+
+				ret = blk_dread(dev_desc,
+						info_current.backup_data_index,
+						info_current.backup_num,
+						backup_data);
+				if (ret != info_current.backup_num) {
+					printf("blk_dread fail\n");
+					return -1;
+				}
+
+				ret = blk_dwrite(dev_desc,
+						 info_current.backup_index,
+						 info_current.backup_num,
+						 backup_data);
+				if (ret != info_current.backup_num) {
+					printf("blk_dwrite fail\n");
+					return -1;
+				}
+				free(backup_data);
+				backup_data = NULL;
+			}
+		}
+	}
+	memset(data, 0, sizeof(data));
+	ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+	if (ret != 1) {
+		printf("blk_dwrite fail\n");
+		return -1;
+	}
+	return 0;
+error:
+	if (backup_data)
+		free(backup_data);
+	return -1;
+}
+
 static int rkss_read_multi_sections(unsigned char *data, unsigned long index, unsigned int num)
 {
 	unsigned long ret;
@@ -179,6 +484,13 @@ static int rkss_read_multi_sections(unsigned char *data, unsigned long index, un
 static int rkss_write_multi_sections(unsigned char *data, unsigned long index, unsigned int num)
 {
 	unsigned long ret;
+	int result;
+
+	result = rkss_backup_sections(index, num);
+	if (result < 0) {
+		printf("rkss_backup_sections fail\n");
+		return -1;
+	}
 
 	if (dev_desc == NULL) {
 		dev_desc = rockchip_get_bootdev();
@@ -764,6 +1076,11 @@ static TEEC_Result ree_fs_new_create(size_t num_params,
 	/* file open flags: O_RDWR | O_CREAT | O_TRUNC
 	 * if file exists, we must remove it first.
 	 */
+	ret = rkss_begin_commit();
+	if (ret < 0) {
+		printf("rkss_begin_commit failed!");
+		return -1;
+	}
 
 	filename = (char *)(size_t)params[1].u.memref.shm_id;
 	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
@@ -812,6 +1129,12 @@ static TEEC_Result ree_fs_new_create(size_t num_params,
 	debug("ree_fs_new_create ! %s, fd: %d.\n", filename, fd);
 
 	params[2].u.value.a = fd;
+
+	ret = rkss_finish_commit();
+	if (ret < 0) {
+		printf("rkss_finish_commit failed!");
+		return -1;
+	}
 	return TEEC_SUCCESS;
 }
 
@@ -886,6 +1209,12 @@ static TEEC_Result ree_fs_new_write(size_t num_params,
 	int section_num;
 	uint8_t *file_data=0, *temp_file_data=0;
 
+	ret = rkss_begin_commit();
+	if (ret < 0) {
+		printf("rkss_begin_commit failed!");
+		return -1;
+	}
+
 	fd = params[0].u.value.b;
 	offs = params[0].u.value.c;
 
@@ -970,6 +1299,11 @@ out:
 		free(temp_file_data);
 		temp_file_data = 0;
 	}
+	ret = rkss_finish_commit();
+	if (ret < 0) {
+		printf("rkss_finish_commit failed!");
+		return -1;
+	}
 
 	return TEEC_SUCCESS;
 }
@@ -983,6 +1317,12 @@ static TEEC_Result ree_fs_new_truncate(size_t num_params,
 	struct rkss_file_info p = {0};
 	unsigned int section_num_old, section_num_new;
 
+	ret = rkss_begin_commit();
+	if (ret < 0) {
+		printf("rkss_begin_commit failed!");
+		return -1;
+	}
+
 	fd = params[0].u.value.b;
 	len = params[0].u.value.c;
 
@@ -1010,6 +1350,11 @@ static TEEC_Result ree_fs_new_truncate(size_t num_params,
 		printf("ree_fs_new_truncate: write ptable error!\n");
 		return TEEC_ERROR_GENERIC;
 	}
+	ret = rkss_finish_commit();
+	if (ret < 0) {
+		printf("rkss_finish_commit failed!");
+		return -1;
+	}
 
 	return TEEC_SUCCESS;
 }
@@ -1021,6 +1366,12 @@ static TEEC_Result ree_fs_new_remove(size_t num_params,
 	struct rkss_file_info p = {0};
 	int ret, fd, num;
 
+	ret = rkss_begin_commit();
+	if (ret < 0) {
+		printf("rkss_begin_commit failed!");
+		return -1;
+	}
+
 	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
 
@@ -1057,6 +1408,11 @@ static TEEC_Result ree_fs_new_remove(size_t num_params,
 	rkss_dump_ptable();
 	rkss_dump_usedflags();
 #endif
+	ret = rkss_finish_commit();
+	if (ret < 0) {
+		printf("rkss_finish_commit failed!");
+		return -1;
+	}
 
 	return TEEC_SUCCESS;
 }
@@ -1069,6 +1425,12 @@ static TEEC_Result ree_fs_new_rename(size_t num_params,
 	struct rkss_file_info p = {0};
 	int ret;
 
+	ret = rkss_begin_commit();
+	if (ret < 0) {
+		printf("rkss_begin_commit failed!");
+		return -1;
+	}
+
 	old_fname = (char *)(size_t)params[1].u.memref.shm_id;
 	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
@@ -1101,6 +1463,11 @@ static TEEC_Result ree_fs_new_rename(size_t num_params,
 		printf("write ptable error!\n");
 		return TEEC_ERROR_GENERIC;
 	}
+	ret = rkss_finish_commit();
+	if (ret < 0) {
+		printf("rkss_finish_commit failed!");
+		return -1;
+	}
 
 	return TEEC_SUCCESS;
 }
@@ -1186,6 +1553,12 @@ int tee_supp_rk_fs_init(void)
 	struct rk_secure_storage rkss = {0};
 	unsigned char *table_data;
 
+	ret = rkss_resume();
+	if (ret < 0) {
+		printf("rkss_resume failed!");
+		return TEEC_ERROR_GENERIC;
+	}
+
 	/* clean secure storage*/
 #ifdef DEBUG_CLEAN_RKSS
 	int i = 0;
@@ -1196,6 +1569,11 @@ int tee_supp_rk_fs_init(void)
 		printf("cleaned [%d]", i);
 	}
 #endif
+	ret = rkss_begin_commit();
+	if (ret < 0) {
+		printf("rkss_begin_commit failed!");
+		return TEEC_ERROR_GENERIC;
+	}
 
 	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
@@ -1230,6 +1608,13 @@ int tee_supp_rk_fs_init(void)
 	rkss_dump_ptable();
 	rkss_dump_usedflags();
 #endif
+
+	ret = rkss_finish_commit();
+	if (ret < 0) {
+		printf("rkss_finish_commit failed!");
+		return TEEC_ERROR_GENERIC;
+	}
+
 	return TEEC_SUCCESS;
 }
 
diff --git a/lib/optee_clientApi/OpteeClientRkFs.c b/lib/optee_clientApi/OpteeClientRkFs.c
index 25a639c5a8..eb9ccfacc5 100644
--- a/lib/optee_clientApi/OpteeClientRkFs.c
+++ b/lib/optee_clientApi/OpteeClientRkFs.c
@@ -99,7 +99,10 @@
  *	- 512 byte section used refs [128]
  *		- 1 byte = 2 flag
  *	- 895 * 512 byte data	[129 - 1023]
- *	------------------------------
+ *	------ RKSS Backup Structure --------
+ *	- 512 byte backup header  [1024]
+ *		- 1 * rkss_backup_verification + 31 * rkss_backup_info
+ *	- 255 * 512 byte backup data [1025 - 1279]
  *
  */
 #define RKSS_DATA_SECTION_COUNT		1024
@@ -108,6 +111,26 @@
 #define RKSS_EACH_FILEFOLDER_COUNT	4		// 504 / 126 = 4
 #define RKSS_NAME_MAX_LENGTH		117		// 116 char + "\0"
 #define RKSS_USEDFLAGS_INDEX		RKSS_PARTITION_TABLE_COUNT
+#define RKSS_BACKUP_INDEX		RKSS_DATA_SECTION_COUNT
+#define RKSS_BACKUP_COUNT		256
+
+#define RKSS_BACKUP_VERSION		(unsigned int)0x1
+#define RKSS_BACKUP_ENABLE		(unsigned int)0x55667788
+#define RKSS_BACKUP_USEDFLAG		(unsigned int)0xAABBCCDD
+
+struct rkss_backup_verification {
+	unsigned int backup_version;
+	unsigned int backup_count;
+	unsigned int reserve;
+	unsigned int backup_enable;
+};
+
+struct rkss_backup_info {
+	unsigned int backup_index;
+	unsigned int backup_num;
+	unsigned int backup_data_index;
+	unsigned int backup_usedflag;
+};
 
 typedef struct rkss_file_info
 {
@@ -163,6 +186,288 @@ extern unsigned long blk_dwrite(struct blk_desc *block_dev, lbaint_t start,
 
 static struct blk_desc *dev_desc = NULL;
 static disk_partition_t part_info;
+/*
+ * action1:
+ * rkss_begin_commit	set enable flag
+ * rkss_backup_sections	backup data
+ * blk_dwrite
+ * rkss_finish_commit	clear enable flag, clear backup data
+ * reboot
+ * rkss_resume	not find enable flag, do nothing
+ *
+ * action2:
+ * rkss_begin_commit	set enable flag
+ * rkss_backup_sections	backup data
+ * power off when blk_dwrite
+ *
+ * power on
+ * rkss_resume	find enable flag, resume all backup data
+ */
+static int rkss_begin_commit(void)
+{
+	unsigned char data[RKSS_DATA_LEN];
+	struct rkss_backup_verification p;
+	unsigned long ret;
+
+	if (!dev_desc) {
+		dev_desc = rockchip_get_bootdev();
+		if (!dev_desc) {
+			printf("%s: Could not find device\n", __func__);
+			return -1;
+		}
+
+		if (part_get_info_by_name(dev_desc,
+					  "security", &part_info) < 0) {
+			dev_desc = NULL;
+			printf("Could not find security partition\n");
+			return -1;
+		}
+	}
+
+	debug("%s\n", __func__);
+	p.backup_version = RKSS_BACKUP_VERSION;
+	p.backup_enable = RKSS_BACKUP_ENABLE;
+	p.backup_count = 0;
+
+	memset(data, 0, sizeof(data));
+	memcpy(data, &p, sizeof(p));
+
+	ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+	if (ret != 1) {
+		printf("blk_dwrite fail\n");
+		return -1;
+	}
+	return 0;
+}
+
+static int rkss_finish_commit(void)
+{
+	unsigned char data[RKSS_DATA_LEN];
+	unsigned long ret;
+
+	if (!dev_desc) {
+		dev_desc = rockchip_get_bootdev();
+		if (!dev_desc) {
+			printf("%s: Could not find device\n", __func__);
+			return -1;
+		}
+
+		if (part_get_info_by_name(dev_desc,
+					  "security", &part_info) < 0) {
+			dev_desc = NULL;
+			printf("Could not find security partition\n");
+			return -1;
+		}
+	}
+
+	debug("%s\n", __func__);
+	memset(data, 0, sizeof(data));
+
+	ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+	if (ret != 1) {
+		printf("blk_dwrite fail\n");
+		return -1;
+	}
+	return 0;
+}
+
+static int rkss_backup_sections(unsigned long index, unsigned int num)
+{
+	unsigned char data[RKSS_DATA_LEN];
+	unsigned char *backup_data = NULL;
+	struct rkss_backup_verification p;
+	struct rkss_backup_info info_last, info_current;
+	unsigned long ret;
+
+	if (!dev_desc) {
+		dev_desc = rockchip_get_bootdev();
+		if (!dev_desc) {
+			printf("%s: Could not find device\n", __func__);
+			return -1;
+		}
+
+		if (part_get_info_by_name(dev_desc,
+					  "security", &part_info) < 0) {
+			dev_desc = NULL;
+			printf("Could not find security partition\n");
+			return -1;
+		}
+	}
+
+	ret = blk_dread(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+	if (ret != 1) {
+		printf("blk_dread fail\n");
+		return -1;
+	}
+
+	memcpy(&p, data, sizeof(p));
+	if (p.backup_version == RKSS_BACKUP_VERSION &&
+	    p.backup_enable == RKSS_BACKUP_ENABLE) {
+		if (p.backup_count == 0) {
+			info_current.backup_usedflag = RKSS_BACKUP_USEDFLAG;
+			info_current.backup_index = index;
+			info_current.backup_num = num;
+			info_current.backup_data_index = RKSS_BACKUP_INDEX + 1;
+		} else {
+			memcpy(&info_last,
+			       data + sizeof(p) + (p.backup_count - 1) *
+			       sizeof(info_last), sizeof(info_last));
+			info_current.backup_usedflag = RKSS_BACKUP_USEDFLAG;
+			info_current.backup_index = index;
+			info_current.backup_num = num;
+			info_current.backup_data_index =
+				info_last.backup_data_index +
+				info_last.backup_num;
+		}
+		if ((info_current.backup_data_index + info_current.backup_num) >
+			(RKSS_BACKUP_INDEX + RKSS_BACKUP_COUNT)) {
+			printf("Not enough backup sections!");
+			goto error;
+		}
+		debug("%s index=0x%lx num=0x%x backup_data_index=0x%x\n",
+		      __func__, index, num, info_current.backup_data_index);
+
+		backup_data = malloc(num * RKSS_DATA_LEN);
+		if (!backup_data) {
+			printf("malloc backup_data fail\n");
+			goto error;
+		}
+
+		ret = blk_dread(dev_desc, index, num, backup_data);
+		if (ret != num) {
+			printf("blk_dread fail\n");
+			return -1;
+		}
+
+		ret = blk_dwrite(dev_desc, info_current.backup_data_index,
+				 num, backup_data);
+		if (ret != num) {
+			printf("blk_dwrite fail\n");
+			return -1;
+		}
+		free(backup_data);
+		backup_data = NULL;
+
+		p.backup_count += 1;
+
+		memcpy(data, &p, sizeof(p));
+		memcpy(data + sizeof(p) +
+		       (p.backup_count - 1) * sizeof(info_current),
+		       &info_current, sizeof(info_current));
+
+		ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+		if (ret != 1) {
+			printf("blk_dwrite fail\n");
+			return -1;
+		}
+	}
+
+	return 0;
+error:
+	if (backup_data)
+		free(backup_data);
+	return -1;
+}
+
+static int rkss_resume(void)
+{
+	unsigned char data[RKSS_DATA_LEN];
+	unsigned char *backup_data = NULL;
+	struct rkss_backup_verification p;
+	struct rkss_backup_info info_current;
+	unsigned int i;
+	unsigned long ret;
+
+	if (!dev_desc) {
+		dev_desc = rockchip_get_bootdev();
+		if (!dev_desc) {
+			printf("%s: Could not find device\n", __func__);
+			return -1;
+		}
+
+		if (part_get_info_by_name(dev_desc,
+					  "security", &part_info) < 0) {
+			dev_desc = NULL;
+			printf("Could not find security partition\n");
+			return -1;
+		}
+	}
+
+	ret = blk_dread(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+	if (ret != 1) {
+		printf("blk_dread fail\n");
+		return -1;
+	}
+
+	memcpy(&p, data, sizeof(p));
+	if (p.backup_version == RKSS_BACKUP_VERSION &&
+	    p.backup_enable == RKSS_BACKUP_ENABLE) {
+		for (i = p.backup_count; i > 0; i--) {
+			memcpy(&info_current, data + sizeof(p) + (i - 1) *
+			       sizeof(info_current), sizeof(info_current));
+
+			if (info_current.backup_usedflag ==
+			    RKSS_BACKUP_USEDFLAG) {
+				debug("rkss_resume backup_index=0x%x \
+				      backup_num=0x%x \
+				      info_current.backup_data_index=0x%x\n",
+				      info_current.backup_index,
+				      info_current.backup_num,
+				      info_current.backup_data_index);
+				if ((info_current.backup_data_index +
+				     info_current.backup_num) >
+				    (RKSS_BACKUP_INDEX + RKSS_BACKUP_COUNT)) {
+					printf("backup sections error!");
+					goto error;
+				}
+				if ((info_current.backup_index +
+				     info_current.backup_num) >
+				    RKSS_DATA_SECTION_COUNT) {
+					printf("original sections error!");
+					goto error;
+				}
+				backup_data = malloc(info_current.backup_num *
+						     RKSS_DATA_LEN);
+				if (!backup_data) {
+					printf("malloc backup_data fail\n");
+					goto error;
+				}
+
+				ret = blk_dread(dev_desc,
+						info_current.backup_data_index,
+						info_current.backup_num,
+						backup_data);
+				if (ret != info_current.backup_num) {
+					printf("blk_dread fail\n");
+					return -1;
+				}
+
+				ret = blk_dwrite(dev_desc,
+						 info_current.backup_index,
+						 info_current.backup_num,
+						 backup_data);
+				if (ret != info_current.backup_num) {
+					printf("blk_dwrite fail\n");
+					return -1;
+				}
+				free(backup_data);
+				backup_data = NULL;
+			}
+		}
+	}
+	memset(data, 0, sizeof(data));
+	ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+	if (ret != 1) {
+		printf("blk_dwrite fail\n");
+		return -1;
+	}
+	return 0;
+error:
+	if (backup_data)
+		free(backup_data);
+	return -1;
+}
+
 static int rkss_read_multi_sections(unsigned char *data, unsigned long index, unsigned int num)
 {
 	unsigned long ret;
@@ -196,6 +501,13 @@ static int rkss_read_section(struct rk_secure_storage *rkss)
 static int rkss_write_multi_sections(unsigned char *data, unsigned long index, unsigned int num)
 {
 	unsigned long ret;
+	int result;
+
+	result = rkss_backup_sections(index, num);
+	if (result < 0) {
+		printf("rkss_backup_sections fail\n");
+		return -1;
+	}
 
 	if (dev_desc == NULL) {
 		dev_desc = rockchip_get_bootdev();
@@ -549,7 +861,7 @@ static int rkss_get_dirs_by_name(char* filename)
 				{
 					char *file = p->name + strlen(filename) + 1;
 					char *subdir = strtok(file, "/");
-					printf("found: %s", subdir);
+					debug("found: %s", subdir);
 					strcpy(dir_cache[dir_num], subdir);
 					++dir_num;
 				}
@@ -801,6 +1113,12 @@ static int tee_fs_open(struct tee_fs_rpc *fsrpc)
 		}
 	}
 
+	ret = rkss_begin_commit();
+	if (ret < 0) {
+		printf("rkss_begin_commit failed!");
+		return -1;
+	}
+
 	if (make_newfile)
 	{
 		if (CHECKFLAG(fsrpc->flags, TEE_FS_O_CREAT))
@@ -830,6 +1148,12 @@ static int tee_fs_open(struct tee_fs_rpc *fsrpc)
 	debug("tee_fs_open ! %s , fd:%d, flag: %x, len: %d\n",
 			filename, fsrpc->fd, fsrpc->flags, fsrpc->len);
 
+	ret = rkss_finish_commit();
+	if (ret < 0) {
+		printf("rkss_finish_commit failed!");
+		return -1;
+	}
+
 	return fsrpc->fd;
 }
 
@@ -901,6 +1225,12 @@ static int tee_fs_write(struct tee_fs_rpc *fsrpc)
 		return -1;
 	}
 
+	ret = rkss_begin_commit();
+	if (ret < 0) {
+		printf("rkss_begin_commit failed!");
+		return -1;
+	}
+
 	p.size = fsrpc->len;
 	int num = fsrpc->len / RKSS_DATA_LEN + 1;
 	p.index = rkss_get_empty_section_from_usedflags(num);
@@ -930,6 +1260,13 @@ static int tee_fs_write(struct tee_fs_rpc *fsrpc)
 #ifdef DEBUG_RKFSS
 	rkss_dump_usedflags();
 #endif
+
+	ret = rkss_finish_commit();
+	if (ret < 0) {
+		printf("rkss_finish_commit failed!");
+		return -1;
+	}
+
 	return fsrpc->len;
 }
 
@@ -982,6 +1319,12 @@ static int tee_fs_unlink(struct tee_fs_rpc *fsrpc)
 
 	debug("tee_fs_unlink ! %s fd:%d index:%d size:%d\n", filename, fd, p.index, p.size);
 
+	ret = rkss_begin_commit();
+	if (ret < 0) {
+		printf("rkss_begin_commit failed!");
+		return -1;
+	}
+
 	/* decrease ref from usedflags */
 	int num = p.size / RKSS_DATA_LEN + 1;
 	ret = rkss_decref_multi_usedflags_sections(p.index, num);
@@ -1004,6 +1347,12 @@ static int tee_fs_unlink(struct tee_fs_rpc *fsrpc)
 	rkss_dump_ptable();
 #endif
 
+	ret = rkss_finish_commit();
+	if (ret < 0) {
+		printf("rkss_finish_commit failed!");
+		return -1;
+	}
+
 	return 0;
 }
 
@@ -1029,6 +1378,11 @@ static int tee_fs_link(struct tee_fs_rpc *fsrpc)
 		printf("file exist ! %s.\n", newfilename);
 		return -1;
 	}
+	ret = rkss_begin_commit();
+	if (ret < 0) {
+		printf("rkss_begin_commit failed!");
+		return -1;
+	}
 
 	struct rkss_file_info p_new = {0};
 	memcpy(&p_new, &p_old, sizeof(struct rkss_file_info));
@@ -1051,6 +1405,11 @@ static int tee_fs_link(struct tee_fs_rpc *fsrpc)
 #ifdef DEBUG_RKFSS
 	rkss_dump_ptable();
 #endif
+	ret = rkss_finish_commit();
+	if (ret < 0) {
+		printf("rkss_finish_commit failed!");
+		return -1;
+	}
 
 	return 0;
 }
@@ -1069,6 +1428,12 @@ static int tee_fs_rename(struct tee_fs_rpc *fsrpc)
 		return -1;
 	}
 
+	ret = rkss_begin_commit();
+	if (ret < 0) {
+		printf("rkss_begin_commit failed!");
+		return -1;
+	}
+
 	strcpy(p.name, newnames);
 
 	ret = rkss_write_back_ptable(ret, &p);
@@ -1078,6 +1443,12 @@ static int tee_fs_rename(struct tee_fs_rpc *fsrpc)
 		return -1;
 	}
 
+	ret = rkss_finish_commit();
+	if (ret < 0) {
+		printf("rkss_finish_commit failed!");
+		return -1;
+	}
+
 	return 0;
 }
 
@@ -1097,6 +1468,11 @@ static int tee_fs_truncate(struct tee_fs_rpc *fsrpc)
 		printf("fd unvailable!\n");
 		return -1;
 	}
+	ret = rkss_begin_commit();
+	if (ret < 0) {
+		printf("rkss_begin_commit failed!");
+		return -1;
+	}
 
 	p.size = fsrpc->arg;
 	ret = rkss_write_back_ptable(fsrpc->fd, &p);
@@ -1105,6 +1481,11 @@ static int tee_fs_truncate(struct tee_fs_rpc *fsrpc)
 		printf("tee_fs_write: write ptable error!\n");
 		return -1;
 	}
+	ret = rkss_finish_commit();
+	if (ret < 0) {
+		printf("rkss_finish_commit failed!");
+		return -1;
+	}
 	return 0;
 }
 
@@ -1142,12 +1523,12 @@ static int tee_fs_closedir(struct tee_fs_rpc *fsrpc)
 static int tee_fs_readdir(struct tee_fs_rpc *fsrpc)
 {
 	char *dirname = (char *)(fsrpc + 1);
-	printf("seek/num:%d/%d\n", dir_seek, dir_num);
+	debug("seek/num:%d/%d\n", dir_seek, dir_num);
 	if (dir_seek == dir_num)
 	{
 		dirname = NULL;
 		fsrpc->len = 0;
-		printf("tee_fs_readdir: END\n");
+		debug("tee_fs_readdir: END\n");
 		return -1;
 	}
 
@@ -1220,6 +1601,13 @@ int tee_supp_rk_fs_init(void)
 
 	__maybe_unused int i = 0;
 	unsigned char *table_data;
+	int ret;
+
+	ret = rkss_resume();
+	if (ret < 0) {
+		printf("rkss_resume failed!");
+		return -1;
+	}
 #ifdef DEBUG_CLEAN_RKSS // clean secure storage
 	for (i = 0; i < RKSS_DATA_SECTION_COUNT; i++)
 	{
@@ -1231,13 +1619,19 @@ int tee_supp_rk_fs_init(void)
 	}
 #endif
 
+	ret = rkss_begin_commit();
+	if (ret < 0) {
+		printf("rkss_begin_commit failed!");
+		return -1;
+	}
+
 	// Verify Partition Table
 	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
 		printf("malloc table_data fail\n");
 		return -1;
 	}
-	int ret = rkss_read_patition_tables(table_data);
+	ret = rkss_read_patition_tables(table_data);
 	if (ret < 0) {
 		printf("rkss_read_patition_tables fail ! ret: %d.\n", ret);
 		free(table_data);
@@ -1275,6 +1669,12 @@ int tee_supp_rk_fs_init(void)
 	rkss_dump_usedflags();
 #endif
 
+	ret = rkss_begin_commit();
+	if (ret < 0) {
+		printf("rkss_begin_commit failed!");
+		return -1;
+	}
+
 	return 0;
 }
 int OpteeClientRkFsInit(void)

commit 4df150d1285811ed25f627f47c39716f088fa35a
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Feb 22 22:10:29 2019 +0800

    rockchip: dts: rk322x: add cd-gpios
    
    Add cd-gpios to test the mmc device whether exit.
    
    Change-Id: I171f4c0d895baf1a1b54c971fc88370a0b10ce3a
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/dts/rk322x-u-boot.dtsi b/arch/arm/dts/rk322x-u-boot.dtsi
index 432af90b7c..7034b344e1 100644
--- a/arch/arm/dts/rk322x-u-boot.dtsi
+++ b/arch/arm/dts/rk322x-u-boot.dtsi
@@ -61,3 +61,7 @@
 	u-boot,dm-pre-reloc;
 	status = "okay";
 };
+
+&gpio1 {
+	u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/rk322x.dtsi b/arch/arm/dts/rk322x.dtsi
index d022b025f3..e9ee5a2933 100644
--- a/arch/arm/dts/rk322x.dtsi
+++ b/arch/arm/dts/rk322x.dtsi
@@ -459,6 +459,7 @@
 			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
 		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
 		fifo-depth = <0x100>;
+		cd-gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
 		status = "disabled";

commit eef7c6f46aae73db57851c4e329a7eeb997de24a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Mar 14 19:20:11 2019 +0800

    rockchip: board: ignore mmc strength fdt fixup for rk3399pro-npu
    
    Change-Id: Ic2b787e2bff49e73ca3ec3404fc74751d2903aa6
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 702fd51df2..573956c118 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -282,7 +282,7 @@ int interrupt_debugger_init(void)
 	return ret;
 }
 
-#ifdef CONFIG_ROCKCHIP_RK1808
+#if defined(CONFIG_ROCKCHIP_RK1808) && !defined(CONFIG_COPROCESSOR_RK1808)
 #define PINCTRL_EMMC_BUS8_PATH		"/pinctrl/emmc/emmc-bus8"
 #define PINCTRL_EMMC_CMD_PATH		"/pinctrl/emmc/emmc-cmd"
 #define PINCTRL_EMMC_CLK_PATH		"/pinctrl/emmc/emmc-clk"
@@ -351,7 +351,7 @@ int board_fdt_fixup(void *blob)
 		if (ret)
 			printf("fdt set compatible failed: %d\n", ret);
 	}
-#elif CONFIG_ROCKCHIP_RK1808
+#elif defined(CONFIG_ROCKCHIP_RK1808) && !defined(CONFIG_COPROCESSOR_RK1808)
 	struct tag *t;
 	u32 ph_pu_2ma;
 

commit 9d2bc40cc004402b9560beebb491530e6fa60a71
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Fri Feb 22 19:12:12 2019 +0800

    boot_rkimg: don't override BOOT_MODE_REG
    
    We should keep the boot mode value, linux
    kernel need it.
    
    Change-Id: Ic31166dffc3fefdf352cac1d1002a91dea319fc5
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 0d48232e3e..dc7f1a06b6 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -389,7 +389,6 @@ fallback:
 	} else {
 		/* Mode from boot mode register */
 		reg_boot_mode = readl((void *)CONFIG_ROCKCHIP_BOOT_MODE_REG);
-		writel(BOOT_NORMAL, (void *)CONFIG_ROCKCHIP_BOOT_MODE_REG);
 
 		switch (reg_boot_mode) {
 		case BOOT_NORMAL:

commit 957c1cf2afe1fd48f4f054df0088cae080e84ae9
Author: Shunqian Zheng <zhengsq@rock-chips.com>
Date:   Thu Mar 14 15:08:22 2019 +0800

    usb: rockusb: Forbid data beyond 32MB reading
    
    Simply return magic char if one is trying to read data beyond 32MB.
    
    Fixes: 628c827 ("usb: rockusb: forbid reading data beyond addr 32MB")
    
    Change-Id: If2cdf05dbf9d6dcdd4cf8f9605ab84480fbca32d
    Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>

diff --git a/cmd/rockusb.c b/cmd/rockusb.c
index 4062f368cf..c25df454a9 100644
--- a/cmd/rockusb.c
+++ b/cmd/rockusb.c
@@ -24,7 +24,7 @@ static int rkusb_read_sector(struct ums *ums_dev,
 	struct blk_desc *block_dev = &ums_dev->block_dev;
 	lbaint_t blkstart = start + ums_dev->start_sector;
 
-	if (blkstart > RKUSB_READ_LIMIT_ADDR) {
+	if ((blkstart + blkcnt) > RKUSB_READ_LIMIT_ADDR) {
 		memset(buf, 0xcc, blkcnt * SECTOR_SIZE);
 		return blkcnt;
 	} else {

commit 7aec704a4e9d9322f1102bcf61ee5c3cf6ec794d
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Tue Mar 5 14:59:06 2019 +0800

    drivers: mtd: nand: rockchip nandc add bad block detect api
    
    The data layout for rockchip nandc is:
        1024 bytes data + 32 obb + 1024 data + 32 obb ...
    The system detect bad block flag locate at 2048, 4096, 8192...
    
    The system checks for bad blocks and gets the wrong bad block.
    Add a bad block detect api to check the bad block.
    
    Change-Id: I8b0f2907a851d3bbb4d1b9f5daf21319bfb047d9
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/drivers/mtd/nand/nand_bbt.c b/drivers/mtd/nand/nand_bbt.c
index 74c4c9a3c8..aa4cf30c3f 100644
--- a/drivers/mtd/nand/nand_bbt.c
+++ b/drivers/mtd/nand/nand_bbt.c
@@ -487,8 +487,10 @@ static int create_bbt(struct mtd_info *mtd, uint8_t *buf,
 		int ret;
 
 		BUG_ON(bd->options & NAND_BBT_NO_OOB);
-
-		ret = scan_block_fast(mtd, bd, from, buf, numpages);
+		if (this->block_bad)
+			ret = this->block_bad(mtd, from);
+		else
+			ret = scan_block_fast(mtd, bd, from, buf, numpages);
 		if (ret < 0)
 			return ret;
 
diff --git a/drivers/mtd/nand/rockchip_nand.c b/drivers/mtd/nand/rockchip_nand.c
index 16463e16a1..b8607c82ee 100644
--- a/drivers/mtd/nand/rockchip_nand.c
+++ b/drivers/mtd/nand/rockchip_nand.c
@@ -307,7 +307,6 @@ static void rockchip_nand_write_extra_oob(struct mtd_info *mtd, u8 *oob)
 	rockchip_nand_write_buf(mtd, oob + offset, len);
 }
 
-
 static int rockchip_nand_hw_syndrome_pio_read_page(struct mtd_info *mtd,
 						   struct nand_chip *chip,
 						   uint8_t *buf,
@@ -535,6 +534,33 @@ static int rockchip_nand_ecc_init(struct mtd_info *mtd,
 	return 0;
 }
 
+static int rockchip_nand_block_bad(struct mtd_info *mtd, loff_t ofs)
+{
+	int page, res = 0, i;
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	u16 bad = 0xff;
+	int chipnr = (int)(ofs >> chip->chip_shift);
+
+	page = (int)(ofs >> chip->page_shift) & chip->pagemask;
+	chip->select_chip(mtd, chipnr);
+	chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);
+	if(rockchip_nand_hw_syndrome_pio_read_page(mtd,
+	   chip, chip->buffers->databuf, 0, page) == -1) {
+		chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos, page);
+		for (i = 0; i < 8; i++) {
+			bad = chip->read_byte(mtd);
+			if (bad)
+				break;
+		}
+		if (i >= 8)
+			res = 1;
+	}
+	chip->select_chip(mtd, -1);
+	if (res)
+		printf("%s 0x%x %x %x\n", __func__, page, res, bad);
+	return res;
+}
+
 static int rockchip_nand_chip_init(int node, struct rk_nand *rknand, int devnum)
 {
 	const void *blob = gd->fdt_blob;
@@ -553,6 +579,9 @@ static int rockchip_nand_chip_init(int node, struct rk_nand *rknand, int devnum)
 	chip->read_byte = rockchip_nand_read_byte;
 	chip->dev_ready = rockchip_nand_dev_ready;
 	chip->controller = &rknand->controller;
+	chip->block_bad = rockchip_nand_block_bad;
+	chip->bbt_options = NAND_BBT_USE_FLASH | NAND_BBT_NO_OOB;
+	chip->options = NAND_NO_SUBPAGE_WRITE;
 
 	rknand->banks[devnum] = fdtdec_get_int(blob, node, "reg", -1);
 
@@ -625,7 +654,7 @@ void board_nand_init(void)
 		goto err;
 	}
 
-	regs = fdtdec_get_addr(blob, node, "reg");
+	regs = fdt_get_base_address(blob, node);
 	if (regs == FDT_ADDR_T_NONE) {
 		debug("Nand address not found\n");
 		goto err;

commit 41175141f329f7fc754a84dd8829c36b96efb78c
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Mar 14 11:32:37 2019 +0800

    mtd: nand: rockchip: fix incompatible-pointer-types compile err
    
    Fix the following compile error:
    drivers/mtd/nand/rockchip_nand.c: In function ‘nand_spl_load_image’:
    drivers/mtd/nand/rockchip_nand.c:657:39: error: passing argument 3 of
    ‘nand_read_skip_bad’ from incompatible pointer type
    [-Werror=incompatible-pointer-types]
      return nand_read_skip_bad(mtd, offs, &size, NULL, size, (u_char
    *)dst);
                                           ^
    In file included from drivers/mtd/nand/rockchip_nand.c:11:0:
    include/nand.h:101:5: note: expected ‘size_t * {aka long unsigned int
    *}’ but argument is of type ‘unsigned int *’
     int nand_read_skip_bad(struct mtd_info *mtd, loff_t offset, size_t
    *length,
    
    Change-Id: I44c97f21c2c2d40a7dcbdab7ddb96a1025949ee4
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mtd/nand/rockchip_nand.c b/drivers/mtd/nand/rockchip_nand.c
index d8f443972a..16463e16a1 100644
--- a/drivers/mtd/nand/rockchip_nand.c
+++ b/drivers/mtd/nand/rockchip_nand.c
@@ -652,9 +652,10 @@ err:
 int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst)
 {
 	struct mtd_info *mtd;
+	size_t length = size;
 
 	mtd = get_nand_dev_by_index(0);
-	return nand_read_skip_bad(mtd, offs, &size, NULL, size, (u_char *)dst);
+	return nand_read_skip_bad(mtd, offs, &length, NULL, size, (u_char *)dst);
 }
 
 void nand_deselect(void) {}

commit 6a3f8006e0a917eb156f0951c3e41ac3ce3f78ef
Author: William Wu <william.wu@rock-chips.com>
Date:   Tue Mar 12 19:46:04 2019 +0800

    usb: phy: rockchip: fix implicit definition warning
    
    When make with rock_defconfig, compile warning for the
    following implicitly defined function are raised due to
    a missing include directive:
    
      drivers/usb/phy/rockchip_usb2_phy.c: In function ‘otg_phy_parse’:
      drivers/usb/phy/rockchip_usb2_phy.c: 102:10: error:
      implicit declaration of function ‘fdt_translate_address’ [-Werror=implicit-function-declaration]
      addr = fdt_translate_address(blob, node, reg);
              ^~~~~~~~~~~~~~~~~~~~~
    This change fixes this by including <fdt_support.h>.
    
    And this patch also fixes the following compile error:
    
      drivers/usb/phy/rockchip_usb2_phy.c:96:1: error:
      label ‘retry’ defined but not used [-Werror=unused-label]
    
    Change-Id: Ia82d0ff02b0f528ddde8a553d457c6c0cb763680
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/drivers/usb/phy/rockchip_usb2_phy.c b/drivers/usb/phy/rockchip_usb2_phy.c
index bafe3cdf85..31efee297a 100644
--- a/drivers/usb/phy/rockchip_usb2_phy.c
+++ b/drivers/usb/phy/rockchip_usb2_phy.c
@@ -9,6 +9,7 @@
 #include <asm/io.h>
 #include <dm.h>
 #include <fdtdec.h>
+#include <fdt_support.h>
 #include <syscon.h>
 
 #include "../gadget/dwc2_udc_otg_priv.h"
@@ -93,7 +94,9 @@ static int otg_phy_parse(struct dwc2_udc *dev)
 	/* Find the usb_otg node */
 	node = fdt_node_offset_by_compatible(blob, -1, "snps,dwc2");
 
+#if defined(CONFIG_ROCKCHIP_RK3288)
 retry:
+#endif
 	if (node > 0) {
 		reg = fdt_getprop(blob, node, "reg", NULL);
 		if (!reg)

commit 28e9b49d47835df7cbf23b10c90cd05a90d56bc1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Mar 11 14:44:52 2019 +0800

    rockchip: board: fdt fixup mmc strength as 2mA for rk1808
    
    Change-Id: I183e671a6a3ea753f163b2c3f534de85f584bd38
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 2244eaffef..702fd51df2 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -282,22 +282,98 @@ int interrupt_debugger_init(void)
 	return ret;
 }
 
+#ifdef CONFIG_ROCKCHIP_RK1808
+#define PINCTRL_EMMC_BUS8_PATH		"/pinctrl/emmc/emmc-bus8"
+#define PINCTRL_EMMC_CMD_PATH		"/pinctrl/emmc/emmc-cmd"
+#define PINCTRL_EMMC_CLK_PATH		"/pinctrl/emmc/emmc-clk"
+#define PINCTRL_PCFG_PU_2MA_PATH	"/pinctrl/pcfg-pull-up-2ma"
+#define MAX_ROCKCHIP_PINS_ENTRIES	12
+
+static int rockchip_pinctrl_cfg_fdt_fixup(const char *path, u32 new_phandle)
+{
+	u32 cells[MAX_ROCKCHIP_PINS_ENTRIES * 4];
+	const u32 *data;
+	int i, count;
+	int node;
+
+	node = fdt_path_offset(gd->fdt_blob, path);
+	if (node < 0) {
+		debug("%s: can't find: %s\n", __func__, path);
+		return node;
+	}
+
+	data = fdt_getprop(gd->fdt_blob, node, "rockchip,pins", &count);
+	if (!data) {
+		debug("%s: can't find prop \"rockchip,pins\"\n", __func__);
+		return -ENODATA;
+	}
+
+	count /= sizeof(u32);
+	if (count > MAX_ROCKCHIP_PINS_ENTRIES * 4) {
+		debug("%s: %d is over max count\n", __func__, count);
+		return -EINVAL;
+	}
+
+	for (i = 0; i < count; i++)
+		cells[i] = data[i];
+
+	for (i = 0; i < (count >> 2); i++)
+		cells[4 * i + 3] = cpu_to_fdt32(new_phandle);
+
+	fdt_setprop((void *)gd->fdt_blob, node, "rockchip,pins",
+		    &cells, count * sizeof(u32));
+
+	return 0;
+}
+#endif
+
 int board_fdt_fixup(void *blob)
 {
-	__maybe_unused int ret = 0;
+	int ret = 0;
 
+	/*
+	 * Common fixup for DRM
+	 */
 #ifdef CONFIG_DRM_ROCKCHIP
 	rockchip_display_fixup(blob);
 #endif
 
+	/*
+	 * Platform fixup:
+	 *
+	 * - RK3288: Recognize RK3288W by HDMI Revision ID is 0x1A;
+	 * - RK1808: MMC strength 2mA;
+	 */
 #ifdef CONFIG_ROCKCHIP_RK3288
-	/* RK3288W HDMI Revision ID is 0x1A */
 	if (readl(0xff980004) == 0x1A) {
 		ret = fdt_setprop_string(blob, 0,
 					 "compatible", "rockchip,rk3288w");
 		if (ret)
 			printf("fdt set compatible failed: %d\n", ret);
 	}
+#elif CONFIG_ROCKCHIP_RK1808
+	struct tag *t;
+	u32 ph_pu_2ma;
+
+	t = atags_get_tag(ATAG_SOC_INFO);
+	if (!t)
+		return 0;
+
+	debug("soc=0x%x, flags=0x%x\n", t->u.soc.name, t->u.soc.flags);
+
+	if (t->u.soc.flags != SOC_FLAGS_ET00)
+		return 0;
+
+	ph_pu_2ma = fdt_get_phandle(gd->fdt_blob,
+		    fdt_path_offset(gd->fdt_blob, PINCTRL_PCFG_PU_2MA_PATH));
+	if (!ph_pu_2ma) {
+		debug("Can't find: %s\n", PINCTRL_PCFG_PU_2MA_PATH);
+		return -EINVAL;
+	}
+
+	ret |= rockchip_pinctrl_cfg_fdt_fixup(PINCTRL_EMMC_BUS8_PATH, ph_pu_2ma);
+	ret |= rockchip_pinctrl_cfg_fdt_fixup(PINCTRL_EMMC_CMD_PATH, ph_pu_2ma);
+	ret |= rockchip_pinctrl_cfg_fdt_fixup(PINCTRL_EMMC_CLK_PATH, ph_pu_2ma);
 #endif
 
 	return ret;

commit e217fe3cbd101c9a1de6025b4df6ee10ddeb3ed0
Author: Keerthy <j-keerthy@ti.com>
Date:   Fri Dec 21 21:54:30 2018 +0530

    lib: fdtdec: fdtdec_get_addr_size_fixed remove checks
    
    With 8 bytes addressing even on 32 bit machines these checks
    are no longer valid. Remove them.
    
    Signed-off-by: Keerthy <j-keerthy@ti.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    (cherry picked from commit f51f6715a5013f37620c38f0430e21d4736e235a)
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
    
    Change-Id: I07d143dbd4dfeff1ce99d081d1279c4f70fa4e8f

diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index d06dbdf10b..863d6142e7 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -92,16 +92,6 @@ fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
 
 	debug("%s: %s: ", __func__, prop_name);
 
-	if (na > (sizeof(fdt_addr_t) / sizeof(fdt32_t))) {
-		debug("(na too large for fdt_addr_t type)\n");
-		return FDT_ADDR_T_NONE;
-	}
-
-	if (ns > (sizeof(fdt_size_t) / sizeof(fdt32_t))) {
-		debug("(ns too large for fdt_size_t type)\n");
-		return FDT_ADDR_T_NONE;
-	}
-
 	prop = fdt_getprop(blob, node, prop_name, &len);
 	if (!prop) {
 		debug("(not found)\n");

commit 841c4e175528e5ce2886586e22431ff2eb1c1f03
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Mar 11 16:24:00 2019 +0800

    rockchip: atags: add tag for SoC information
    
    Change-Id: Ic2f89b8deb5cebeaaa05fb6cd67997429821904c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rk_atags.h b/arch/arm/include/asm/arch-rockchip/rk_atags.h
index 20ada99821..b9028b35d2 100644
--- a/arch/arm/include/asm/arch-rockchip/rk_atags.h
+++ b/arch/arm/include/asm/arch-rockchip/rk_atags.h
@@ -18,6 +18,7 @@
 #define ATAG_RAM_PARTITION	0x54410054
 #define ATAG_ATF_MEM		0x54410055
 #define ATAG_PUB_KEY		0x54410056
+#define ATAG_SOC_INFO		0x54410057
 #define ATAG_MAX		0x544100ff
 
 /* Tag size and offset */
@@ -45,6 +46,11 @@
 #define SERIAL_M_MODE_M1	0x1
 #define SERIAL_M_MODE_M2	0x2
 
+/* tag_soc_info.flags */
+#define SOC_FLAGS_ET00		0x45543030
+#define SOC_FLAGS_ET01		0x45543031
+#define SOC_FLAGS_ET02		0x45543032
+
 struct tag_serial {
 	u32 version;
 	u32 enable;
@@ -126,6 +132,14 @@ struct tag_ram_partition {
 	u32 hash;
 } __packed;
 
+struct tag_soc_info {
+	u32 version;
+	u32 name;	/* Hex: 0x3288, 0x3399... */
+	u32 flags;
+	u32 reserved[6];
+	u32 hash;
+} __packed;
+
 struct tag_core {
 	u32 flags;
 	u32 pagesize;
@@ -149,6 +163,7 @@ struct tag {
 		struct tag_ram_partition ram_part;
 		struct tag_atf_mem	atf_mem;
 		struct tag_pub_key	pub_key;
+		struct tag_soc_info	soc;
 	} u;
 } __aligned(4);
 
diff --git a/arch/arm/mach-rockchip/rk_atags.c b/arch/arm/mach-rockchip/rk_atags.c
index 90a6e3ff89..be5dfecad7 100644
--- a/arch/arm/mach-rockchip/rk_atags.c
+++ b/arch/arm/mach-rockchip/rk_atags.c
@@ -199,6 +199,9 @@ int atags_set_tag(u32 magic, void *tagdata)
 	case ATAG_PUB_KEY:
 		size = tag_size(tag_pub_key);
 		break;
+	case ATAG_SOC_INFO:
+		size = tag_size(tag_soc_info);
+		break;
 	};
 
 	if (!size)
@@ -403,6 +406,17 @@ void atags_print_tag(struct tag *t)
 		printf("   version = 0x%x\n", t->u.pub_key.version);
 		printf("      hash = 0x%x\n", t->u.pub_key.hash);
 		break;
+	case ATAG_SOC_INFO:
+		printf("[soc_info]:\n");
+		printf("     magic = 0x%x\n", t->hdr.magic);
+		printf("      size = 0x%x\n\n", t->hdr.size << 2);
+		printf("   version = 0x%x\n", t->u.soc.version);
+		printf("      name = 0x%x\n", t->u.soc.name);
+		printf("     flags = 0x%x\n", t->u.soc.flags);
+		for (i = 0; i < ARRAY_SIZE(t->u.soc.reserved); i++)
+			printf("    res[%d] = 0x%x\n", i, t->u.soc.reserved[i]);
+		printf("      hash = 0x%x\n", t->u.soc.hash);
+		break;
 	case ATAG_CORE:
 		printf("[core]:\n");
 		printf("     magic = 0x%x\n", t->hdr.magic);
@@ -445,6 +459,7 @@ void atags_test(void)
 	struct tag_ram_partition t_ram_param;
 	struct tag_atf_mem t_atf_mem;
 	struct tag_pub_key t_pub_key;
+	struct tag_soc_info t_soc;
 
 	memset(&t_serial,  0x1, sizeof(t_serial));
 	memset(&t_bootdev, 0x2, sizeof(t_bootdev));
@@ -453,6 +468,7 @@ void atags_test(void)
 	memset(&t_ram_param, 0x0, sizeof(t_ram_param));
 	memset(&t_atf_mem, 0x5, sizeof(t_atf_mem));
 	memset(&t_pub_key, 0x6, sizeof(t_pub_key));
+	memset(&t_soc, 0x7, sizeof(t_soc));
 
 	memcpy(&t_tos_mem.tee_mem.name, "tee_mem", 8);
 	memcpy(&t_tos_mem.drm_mem.name, "drm_mem", 8);
@@ -484,6 +500,7 @@ void atags_test(void)
 	atags_set_tag(ATAG_RAM_PARTITION, &t_ram_param);
 	atags_set_tag(ATAG_ATF_MEM, &t_atf_mem);
 	atags_set_tag(ATAG_PUB_KEY, &t_pub_key);
+	atags_set_tag(ATAG_SOC_INFO, &t_soc);
 
 	atags_print_all_tags();
 	atags_stat();

commit f44ca27357563e9ed43f1ff76d3bd8dd14f4747e
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Mar 7 15:20:30 2019 +0800

    android: fix retry mechanism with ab system
    
    Minus the retry-count in every boot with ab system. If the ab system
    boot success, the system service boot_ctrl reset the retry-count or set
    boot-successful.
    
    Change-Id: Ic37f65b745d1feb978730332835246dc43d72dab
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 58b3815475..a5f59dc64f 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -574,17 +574,18 @@ static AvbSlotVerifyResult android_slot_verify(char *boot_partname,
 		memcpy((uint8_t *)load_address,
 		       slot_data[0]->loaded_partitions->data,
 		       slot_data[0]->loaded_partitions->data_size);
-
-		/* ... and decrement tries remaining, if applicable. */
-		if (!ab_data.slots[slot_index_to_boot].successful_boot &&
-		    ab_data.slots[slot_index_to_boot].tries_remaining > 0) {
-			ab_data.slots[slot_index_to_boot].tries_remaining -= 1;
-		}
 	} else {
 		slot_set_unbootable(&ab_data.slots[slot_index_to_boot]);
 	}
 
 out:
+#ifdef CONFIG_ANDROID_AB
+	/* ... and decrement tries remaining, if applicable. */
+	if (!ab_data.slots[slot_index_to_boot].successful_boot &&
+	    ab_data.slots[slot_index_to_boot].tries_remaining > 0) {
+		ab_data.slots[slot_index_to_boot].tries_remaining -= 1;
+	}
+#endif
 	env_update("bootargs", verify_state);
 	if (save_metadata_if_changed(ops->ab_ops, &ab_data, &ab_data_orig)) {
 		printf("Can not save metadata\n");

commit 74b485fb2bb55e7d9926171a44f5be0a36fa6796
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jan 23 16:43:43 2019 +0800

    fastboot: delete write perm-attr hash if use pre-loader pub_key
    
    Since we use the pre-loader public key to verify permanent attribute, then
    we do not need to write permanent attribute hash to otp & efuse.
    
    Change-Id: Ic5e19fed2fc9405ab5bc7504dd930fd5f02d847c
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index b6de1c37f6..896bcac61c 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -1742,18 +1742,19 @@ static void cb_flashing(struct usb_ep *ep, struct usb_request *req)
 static void cb_oem_perm_attr(void)
 {
 #ifdef CONFIG_RK_AVB_LIBAVB_USER
+#ifndef CONFIG_ROCKCHIP_PRELOADER_PUB_KEY
 	sha256_context ctx;
 	uint8_t digest[SHA256_SUM_LEN] = {0};
 	uint8_t digest_temp[SHA256_SUM_LEN] = {0};
 	uint8_t perm_attr_temp[PERM_ATTR_TOTAL_SIZE] = {0};
 	uint8_t flag = 0;
-
+#endif
 	if (PERM_ATTR_TOTAL_SIZE != download_bytes) {
 		printf("Permanent attribute size is not equal!\n");
 		fastboot_tx_write_str("FAILincorrect perm attribute size");
 		return;
 	}
-
+#ifndef CONFIG_ROCKCHIP_PRELOADER_PUB_KEY
 	if (rk_avb_read_perm_attr_flag(&flag)) {
 		printf("rk_avb_read_perm_attr_flag error!\n");
 		fastboot_tx_write_str("FAILperm attr read failed");
@@ -1793,7 +1794,7 @@ static void cb_oem_perm_attr(void)
 			return;
 		}
 	}
-
+#endif
 	if (rk_avb_write_permanent_attributes((uint8_t *)
 					      CONFIG_FASTBOOT_BUF_ADDR,
 					      download_bytes)) {
@@ -1804,7 +1805,7 @@ static void cb_oem_perm_attr(void)
 		fastboot_tx_write_str("FAILperm attr write failed");
 		return;
 	}
-
+#ifndef CONFIG_ROCKCHIP_PRELOADER_PUB_KEY
 	memset(digest, 0, SHA256_SUM_LEN);
 	sha256_starts(&ctx);
 	sha256_update(&ctx, (const uint8_t *)CONFIG_FASTBOOT_BUF_ADDR,
@@ -1829,7 +1830,7 @@ static void cb_oem_perm_attr(void)
 			return;
 		}
 	}
-
+#endif
 	if (rk_avb_write_perm_attr_flag(PERM_ATTR_SUCCESS_FLAG)) {
 		fastboot_tx_write_str("FAILperm attr flag write failure");
 		return;
diff --git a/lib/avb/libavb_atx/avb_atx_validate.c b/lib/avb/libavb_atx/avb_atx_validate.c
index c51a2bdd33..9695d1b17a 100644
--- a/lib/avb/libavb_atx/avb_atx_validate.c
+++ b/lib/avb/libavb_atx/avb_atx_validate.c
@@ -71,7 +71,7 @@ static bool verify_permanent_attributes(
     const AvbAtxPermanentAttributes* attributes,
     const uint8_t expected_hash[AVB_SHA256_DIGEST_SIZE]) {
   uint8_t hash[AVB_SHA256_DIGEST_SIZE];
-#ifdef ROCKCHIP_USE_PRE_LOADER_PUB_KEY
+#ifdef CONFIG_ROCKCHIP_PRELOADER_PUB_KEY
 #ifdef CONFIG_CRYPTO_ROCKCHIP
   struct rk_pub_key pub_key;
   int i;
diff --git a/lib/avb/libavb_user/avb_ops_user.c b/lib/avb/libavb_user/avb_ops_user.c
index fca89265ae..9d4db76340 100644
--- a/lib/avb/libavb_user/avb_ops_user.c
+++ b/lib/avb/libavb_user/avb_ops_user.c
@@ -354,7 +354,7 @@ AvbIOResult avb_read_perm_attr(AvbAtxOps *atx_ops,
 AvbIOResult avb_read_perm_attr_hash(AvbAtxOps *atx_ops,
 				    uint8_t hash[AVB_SHA256_DIGEST_SIZE])
 {
-#ifndef ROCKCHIP_USE_PRE_LOADER_PUB_KEY
+#ifndef CONFIG_ROCKCHIP_PRELOADER_PUB_KEY
 #ifdef CONFIG_OPTEE_CLIENT
 	if (trusty_read_attribute_hash((uint32_t *)hash,
 				       AVB_SHA256_DIGEST_SIZE / 4))
diff --git a/lib/avb/rk_avb_user/Kconfig b/lib/avb/rk_avb_user/Kconfig
index b183bfcc72..eb324616bd 100755
--- a/lib/avb/rk_avb_user/Kconfig
+++ b/lib/avb/rk_avb_user/Kconfig
@@ -20,3 +20,10 @@ config TPL_RK_AVB_LIBAVB_USER
 	  This config support the android things system to
 	  read/write hardware image, like vbmeta, misc, and
 	  so on. And it can provide some a/b and avb information
+
+config ROCKCHIP_PRELOADER_PUB_KEY
+	bool "Rockchip AVB use pre-loader public key"
+	depends on AVB_LIBAVB_USER
+	select CRYPTO_ROCKCHIP
+	help
+	  Use pre-loader public key to decode in avb.

commit e84ef14d6d009949d80b0c2d722d8c736814ef4c
Author: lifangyuan <fangyuan.li@rock-chips.com>
Date:   Wed Mar 6 10:59:17 2019 +0800

    configs: rockchip: rk3288: Fdt overlay enabled by default.
    
    Change-Id: I61a127b39b5bbb03da3042b776b5d0fff1a20aed
    Signed-off-by: lifangyuan <fangyuan.li@rock-chips.com>

diff --git a/configs/rk3288_defconfig b/configs/rk3288_defconfig
index 3e80f41644..34c0705cfc 100644
--- a/configs/rk3288_defconfig
+++ b/configs/rk3288_defconfig
@@ -21,6 +21,7 @@ CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_BUF_SIZE=0x4000000
 # CONFIG_CMD_BOOTD is not set
+CONFIG_CMD_DTIMG=y
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
@@ -105,6 +106,7 @@ CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_CMD_DHRYSTONE=y
 CONFIG_ERRNO_STR=y
+CONFIG_OF_LIBFDT_OVERLAY=y
 # CONFIG_EFI_LOADER is not set
 CONFIG_AVB_LIBAVB=y
 CONFIG_AVB_LIBAVB_AB=y

commit dd9ee2cc6f89aa6ba5de7bad07d981dd3b1d1ccf
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 5 14:10:44 2019 +0800

    rockchip: rk3368: correct MMU ram map size
    
    Change-Id: I4884a88613fe5c2fa515360d4c754f4eade84ed3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3368/rk3368.c b/arch/arm/mach-rockchip/rk3368/rk3368.c
index e82b631138..0bfe39d5f3 100644
--- a/arch/arm/mach-rockchip/rk3368/rk3368.c
+++ b/arch/arm/mach-rockchip/rk3368/rk3368.c
@@ -66,13 +66,13 @@ static struct mm_region rk3368_mem_map[] = {
 	{
 		.virt = 0x0UL,
 		.phys = 0x0UL,
-		.size = 0x80000000UL,
+		.size = 0xfe000000UL,
 		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
 			 PTE_BLOCK_INNER_SHARE
 	}, {
-		.virt = 0xf0000000UL,
-		.phys = 0xf0000000UL,
-		.size = 0x10000000UL,
+		.virt = 0xfe000000UL,
+		.phys = 0xfe000000UL,
+		.size = 0x02000000UL,
 		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
 			 PTE_BLOCK_NON_SHARE |
 			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h
index e7f4178f0c..4f9105edac 100644
--- a/include/configs/rk3368_common.h
+++ b/include/configs/rk3368_common.h
@@ -15,7 +15,7 @@
 #include <linux/sizes.h>
 
 #define CONFIG_SYS_SDRAM_BASE		0
-#define SDRAM_MAX_SIZE			0xff000000
+#define SDRAM_MAX_SIZE			0xfe000000
 #define CONFIG_BAUDRATE			115200
 #define CONFIG_SYS_MALLOC_LEN		(192 << 20)
 #define CONFIG_SYS_CBSIZE		1024

commit d17dc7d4856a6600634a6360969468c49240dab6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Mar 8 15:02:36 2019 +0800

    Revert "rockchip: dts: rk3308: add cd-gpios"
    
    This reverts commit 18601cb12a0ced8c672542509b9c3a35fd935607.
    
    Change-Id: I9d1501ab0492a24ddbd6877b3cc735dfbc5a6944
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-u-boot.dtsi b/arch/arm/dts/rk3308-u-boot.dtsi
index fae2d4fb07..4da226322c 100644
--- a/arch/arm/dts/rk3308-u-boot.dtsi
+++ b/arch/arm/dts/rk3308-u-boot.dtsi
@@ -83,11 +83,6 @@
 	status = "okay";
 };
 
-&gpio0 {
-	u-boot,dm-pre-reloc;
-	status = "disabled";
-};
-
 &route_rgb {
 	status = "disabled";
 };
\ No newline at end of file
diff --git a/arch/arm/dts/rk3308.dtsi b/arch/arm/dts/rk3308.dtsi
index 2d50ba881e..1e9ec023e6 100644
--- a/arch/arm/dts/rk3308.dtsi
+++ b/arch/arm/dts/rk3308.dtsi
@@ -392,7 +392,6 @@
 			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
 		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
 		fifo-depth = <0x100>;
-		cd-gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>;
 		interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;

commit 4701d790f43ded37aa9894938b721ab6c93c285c
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Fri Mar 8 15:58:26 2019 +0800

    cmd: bootrkp: return CMD_RET_FAILURE on error
    
    A cmd only returned with CMD_RET_XXX defined
    by command_ret_t can ensure it work well when
    called from shell.
    
    Change-Id: I16e76ed62928380eaaf3c352efb4df9463b7e72d
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/cmd/bootrkp.c b/cmd/bootrkp.c
index f2671045a5..e57cc28a63 100755
--- a/cmd/bootrkp.c
+++ b/cmd/bootrkp.c
@@ -26,7 +26,7 @@ static int do_boot_rockchip(cmd_tbl_t *cmdtp, int flag, int argc,
 	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {
 		printf("%s: dev_desc is NULL!\n", __func__);
-		return -ENODEV;
+		return CMD_RET_FAILURE;
 	}
 
 #ifdef CONFIG_ANDROID_KEYMASTER_CA

commit 65f0143b26988548b050df8ca33d26ed26938b0d
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Dec 26 15:59:57 2018 +0800

    lib: avb: verify the perm attr by root public key
    
    Change-Id: I7e06152a21325ffcd785223952fe8ffaff4d5f08
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/lib/avb/libavb_atx/avb_atx_validate.c b/lib/avb/libavb_atx/avb_atx_validate.c
old mode 100755
new mode 100644
index 74a34fd0fd..c51a2bdd33
--- a/lib/avb/libavb_atx/avb_atx_validate.c
+++ b/lib/avb/libavb_atx/avb_atx_validate.c
@@ -1,401 +1,473 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include <android_avb/avb_atx_validate.h>
-
-#include <android_avb/avb_rsa.h>
-#include <android_avb/avb_sha.h>
-#include <android_avb/avb_sysdeps.h>
-#include <android_avb/avb_util.h>
-
-/* The most recent unlock challenge generated. */
-static uint8_t last_unlock_challenge[AVB_ATX_UNLOCK_CHALLENGE_SIZE];
-
-/* Computes the SHA256 |hash| of |length| bytes of |data|. */
-static void sha256(const uint8_t* data,
-                   uint32_t length,
-                   uint8_t hash[AVB_SHA256_DIGEST_SIZE]) {
-  AvbSHA256Ctx context;
-  avb_sha256_init(&context);
-  avb_sha256_update(&context, data, length);
-  uint8_t* tmp = avb_sha256_final(&context);
-  avb_memcpy(hash, tmp, AVB_SHA256_DIGEST_SIZE);
-}
-
-/* Computes the SHA512 |hash| of |length| bytes of |data|. */
-static void sha512(const uint8_t* data,
-                   uint32_t length,
-                   uint8_t hash[AVB_SHA512_DIGEST_SIZE]) {
-  AvbSHA512Ctx context;
-  avb_sha512_init(&context);
-  avb_sha512_update(&context, data, length);
-  uint8_t* tmp = avb_sha512_final(&context);
-  avb_memcpy(hash, tmp, AVB_SHA512_DIGEST_SIZE);
-}
-
-/* Computes the SHA256 |hash| of a NUL-terminated |str|. */
-static void sha256_str(const char* str, uint8_t hash[AVB_SHA256_DIGEST_SIZE]) {
-  sha256((const uint8_t*)str, avb_strlen(str), hash);
-}
-
-/* Verifies structure and |expected_hash| of permanent |attributes|. */
-static bool verify_permanent_attributes(
-    const AvbAtxPermanentAttributes* attributes,
-    const uint8_t expected_hash[AVB_SHA256_DIGEST_SIZE]) {
-  uint8_t hash[AVB_SHA256_DIGEST_SIZE];
-
-  if (attributes->version != 1) {
-    avb_error("Unsupported permanent attributes version.\n");
-    return false;
-  }
-  sha256((const uint8_t*)attributes, sizeof(AvbAtxPermanentAttributes), hash);
-  if (0 != avb_safe_memcmp(hash, expected_hash, AVB_SHA256_DIGEST_SIZE)) {
-    avb_error("Invalid permanent attributes.\n");
-    return false;
-  }
-  return true;
-}
-
-/* Verifies the format, key version, usage, and signature of a certificate. */
-static bool verify_certificate(
-    const AvbAtxCertificate* certificate,
-    const uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
-    uint64_t minimum_key_version,
-    const uint8_t expected_usage[AVB_SHA256_DIGEST_SIZE]) {
-  const AvbAlgorithmData* algorithm_data;
-  uint8_t certificate_hash[AVB_SHA512_DIGEST_SIZE];
-
-  if (certificate->signed_data.version != 1) {
-    avb_error("Unsupported certificate format.\n");
-    return false;
-  }
-  algorithm_data = avb_get_algorithm_data(AVB_ALGORITHM_TYPE_SHA512_RSA4096);
-  sha512((const uint8_t*)&certificate->signed_data,
-         sizeof(AvbAtxCertificateSignedData),
-         certificate_hash);
-  if (!avb_rsa_verify(authority,
-                      AVB_ATX_PUBLIC_KEY_SIZE,
-                      certificate->signature,
-                      AVB_RSA4096_NUM_BYTES,
-                      certificate_hash,
-                      AVB_SHA512_DIGEST_SIZE,
-                      algorithm_data->padding,
-                      algorithm_data->padding_len)) {
-    avb_error("Invalid certificate signature.\n");
-    return false;
-  }
-  if (certificate->signed_data.key_version < minimum_key_version) {
-    avb_error("Key rollback detected.\n");
-    return false;
-  }
-  if (0 != avb_safe_memcmp(certificate->signed_data.usage,
-                           expected_usage,
-                           AVB_SHA256_DIGEST_SIZE)) {
-    avb_error("Invalid certificate usage.\n");
-    return false;
-  }
-  return true;
-}
-
-/* Verifies signature and fields of a PIK certificate. */
-static bool verify_pik_certificate(
-    const AvbAtxCertificate* certificate,
-    const uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
-    uint64_t minimum_version) {
-  uint8_t expected_usage[AVB_SHA256_DIGEST_SIZE];
-
-  sha256_str("com.google.android.things.vboot.ca", expected_usage);
-  if (!verify_certificate(
-          certificate, authority, minimum_version, expected_usage)) {
-    avb_error("Invalid PIK certificate.\n");
-    return false;
-  }
-  return true;
-}
-
-/* Verifies signature and fields of a PSK certificate. */
-static bool verify_psk_certificate(
-    const AvbAtxCertificate* certificate,
-    const uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
-    uint64_t minimum_version,
-    const uint8_t product_id[AVB_ATX_PRODUCT_ID_SIZE]) {
-  uint8_t expected_subject[AVB_SHA256_DIGEST_SIZE];
-  uint8_t expected_usage[AVB_SHA256_DIGEST_SIZE];
-
-  sha256_str("com.google.android.things.vboot", expected_usage);
-  if (!verify_certificate(
-          certificate, authority, minimum_version, expected_usage)) {
-    avb_error("Invalid PSK certificate.\n");
-    return false;
-  }
-  sha256(product_id, AVB_ATX_PRODUCT_ID_SIZE, expected_subject);
-  if (0 != avb_safe_memcmp(certificate->signed_data.subject,
-                           expected_subject,
-                           AVB_SHA256_DIGEST_SIZE)) {
-    avb_error("PSK: Product ID mismatch.\n");
-    return false;
-  }
-  return true;
-}
-
-/* Verifies signature and fields of a PUK certificate. */
-static bool verify_puk_certificate(
-    const AvbAtxCertificate* certificate,
-    const uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
-    uint64_t minimum_version,
-    const uint8_t product_id[AVB_ATX_PRODUCT_ID_SIZE]) {
-  uint8_t expected_subject[AVB_SHA256_DIGEST_SIZE];
-  uint8_t expected_usage[AVB_SHA256_DIGEST_SIZE];
-
-  sha256_str("com.google.android.things.vboot.unlock", expected_usage);
-  if (!verify_certificate(
-          certificate, authority, minimum_version, expected_usage)) {
-    avb_error("Invalid PUK certificate.\n");
-    return false;
-  }
-  sha256(product_id, AVB_ATX_PRODUCT_ID_SIZE, expected_subject);
-  if (0 != avb_safe_memcmp(certificate->signed_data.subject,
-                           expected_subject,
-                           AVB_SHA256_DIGEST_SIZE)) {
-    avb_error("PUK: Product ID mismatch.\n");
-    return false;
-  }
-  return true;
-}
-
-AvbIOResult avb_atx_validate_vbmeta_public_key(
-    AvbOps* ops,
-    const uint8_t* public_key_data,
-    size_t public_key_length,
-    const uint8_t* public_key_metadata,
-    size_t public_key_metadata_length,
-    bool* out_is_trusted) {
-  AvbIOResult result = AVB_IO_RESULT_OK;
-  AvbAtxPermanentAttributes permanent_attributes;
-  uint8_t permanent_attributes_hash[AVB_SHA256_DIGEST_SIZE];
-  AvbAtxPublicKeyMetadata metadata;
-  uint64_t minimum_version;
-
-  /* Be pessimistic so we can exit early without having to remember to clear.
-   */
-  *out_is_trusted = false;
-
-  /* Read and verify permanent attributes. */
-  result = ops->atx_ops->read_permanent_attributes(ops->atx_ops,
-                                                   &permanent_attributes);
-  if (result != AVB_IO_RESULT_OK) {
-    avb_error("Failed to read permanent attributes.\n");
-    return result;
-  }
-  result = ops->atx_ops->read_permanent_attributes_hash(
-      ops->atx_ops, permanent_attributes_hash);
-  if (result != AVB_IO_RESULT_OK) {
-    avb_error("Failed to read permanent attributes hash.\n");
-    return result;
-  }
-  if (!verify_permanent_attributes(&permanent_attributes,
-                                   permanent_attributes_hash)) {
-    return AVB_IO_RESULT_OK;
-  }
-
-  /* Sanity check public key metadata. */
-  if (public_key_metadata_length != sizeof(AvbAtxPublicKeyMetadata)) {
-    avb_error("Invalid public key metadata.\n");
-    return AVB_IO_RESULT_OK;
-  }
-  avb_memcpy(&metadata, public_key_metadata, sizeof(AvbAtxPublicKeyMetadata));
-  if (metadata.version != 1) {
-    avb_error("Unsupported public key metadata.\n");
-    return AVB_IO_RESULT_OK;
-  }
-
-  /* Verify the PIK certificate. */
-  result = ops->read_rollback_index(
-      ops, AVB_ATX_PIK_VERSION_LOCATION, &minimum_version);
-  if (result != AVB_IO_RESULT_OK) {
-    avb_error("Failed to read PIK minimum version.\n");
-    return result;
-  }
-  if (!verify_pik_certificate(&metadata.product_intermediate_key_certificate,
-                              permanent_attributes.product_root_public_key,
-                              minimum_version)) {
-    return AVB_IO_RESULT_OK;
-  }
-
-  /* Verify the PSK certificate. */
-  result = ops->read_rollback_index(
-      ops, AVB_ATX_PSK_VERSION_LOCATION, &minimum_version);
-  if (result != AVB_IO_RESULT_OK) {
-    avb_error("Failed to read PSK minimum version.\n");
-    return result;
-  }
-  if (!verify_psk_certificate(
-          &metadata.product_signing_key_certificate,
-          metadata.product_intermediate_key_certificate.signed_data.public_key,
-          minimum_version,
-          permanent_attributes.product_id)) {
-    return AVB_IO_RESULT_OK;
-  }
-
-  /* Verify the PSK is the same key that verified vbmeta. */
-  if (public_key_length != AVB_ATX_PUBLIC_KEY_SIZE) {
-    avb_error("Public key length mismatch.\n");
-    return AVB_IO_RESULT_OK;
-  }
-  if (0 != avb_safe_memcmp(
-               metadata.product_signing_key_certificate.signed_data.public_key,
-               public_key_data,
-               AVB_ATX_PUBLIC_KEY_SIZE)) {
-    avb_error("Public key mismatch.\n");
-    return AVB_IO_RESULT_OK;
-  }
-
-  /* Report the key versions used during verification. */
-  ops->atx_ops->set_key_version(
-      ops->atx_ops,
-      AVB_ATX_PIK_VERSION_LOCATION,
-      metadata.product_intermediate_key_certificate.signed_data.key_version);
-  ops->atx_ops->set_key_version(
-      ops->atx_ops,
-      AVB_ATX_PSK_VERSION_LOCATION,
-      metadata.product_signing_key_certificate.signed_data.key_version);
-
-  *out_is_trusted = true;
-  return AVB_IO_RESULT_OK;
-}
-
-AvbIOResult avb_atx_generate_unlock_challenge(
-    AvbAtxOps* atx_ops, AvbAtxUnlockChallenge* out_unlock_challenge) {
-  AvbIOResult result = AVB_IO_RESULT_OK;
-  AvbAtxPermanentAttributes permanent_attributes;
-
-  /* We need the permanent attributes to compute the product_id_hash. */
-  result = atx_ops->read_permanent_attributes(atx_ops, &permanent_attributes);
-  if (result != AVB_IO_RESULT_OK) {
-    avb_error("Failed to read permanent attributes.\n");
-    return result;
-  }
-  result = atx_ops->get_random(
-      atx_ops, AVB_ATX_UNLOCK_CHALLENGE_SIZE, last_unlock_challenge);
-  if (result != AVB_IO_RESULT_OK) {
-    avb_error("Failed to generate random challenge.\n");
-    return result;
-  }
-  out_unlock_challenge->version = 1;
-  sha256(permanent_attributes.product_id,
-         AVB_ATX_PRODUCT_ID_SIZE,
-         out_unlock_challenge->product_id_hash);
-  avb_memcpy(out_unlock_challenge->challenge,
-             last_unlock_challenge,
-             AVB_ATX_UNLOCK_CHALLENGE_SIZE);
-  return result;
-}
-
-AvbIOResult avb_atx_validate_unlock_credential(
-    AvbAtxOps* atx_ops,
-    const AvbAtxUnlockCredential* unlock_credential,
-    bool* out_is_trusted) {
-  AvbIOResult result = AVB_IO_RESULT_OK;
-  AvbAtxPermanentAttributes permanent_attributes;
-  uint8_t permanent_attributes_hash[AVB_SHA256_DIGEST_SIZE];
-  uint64_t minimum_version;
-  const AvbAlgorithmData* algorithm_data;
-  uint8_t challenge_hash[AVB_SHA512_DIGEST_SIZE];
-
-  /* Be pessimistic so we can exit early without having to remember to clear.
-   */
-  *out_is_trusted = false;
-
-  /* Sanity check the credential. */
-  if (unlock_credential->version != 1) {
-    avb_error("Unsupported unlock credential format.\n");
-    return AVB_IO_RESULT_OK;
-  }
-
-  /* Read and verify permanent attributes. */
-  result = atx_ops->read_permanent_attributes(atx_ops, &permanent_attributes);
-  if (result != AVB_IO_RESULT_OK) {
-    avb_error("Failed to read permanent attributes.\n");
-    return result;
-  }
-  result = atx_ops->read_permanent_attributes_hash(atx_ops,
-                                                   permanent_attributes_hash);
-  if (result != AVB_IO_RESULT_OK) {
-    avb_error("Failed to read permanent attributes hash.\n");
-    return result;
-  }
-  if (!verify_permanent_attributes(&permanent_attributes,
-                                   permanent_attributes_hash)) {
-    return AVB_IO_RESULT_OK;
-  }
-
-  /* Verify the PIK certificate. */
-  result = atx_ops->ops->read_rollback_index(
-      atx_ops->ops, AVB_ATX_PIK_VERSION_LOCATION, &minimum_version);
-  if (result != AVB_IO_RESULT_OK) {
-    avb_error("Failed to read PIK minimum version.\n");
-    return result;
-  }
-  if (!verify_pik_certificate(
-          &unlock_credential->product_intermediate_key_certificate,
-          permanent_attributes.product_root_public_key,
-          minimum_version)) {
-    return AVB_IO_RESULT_OK;
-  }
-
-  /* Verify the PUK certificate. The minimum version is shared with the PSK. */
-  result = atx_ops->ops->read_rollback_index(
-      atx_ops->ops, AVB_ATX_PSK_VERSION_LOCATION, &minimum_version);
-  if (result != AVB_IO_RESULT_OK) {
-    avb_error("Failed to read PSK minimum version.\n");
-    return result;
-  }
-  if (!verify_puk_certificate(
-          &unlock_credential->product_unlock_key_certificate,
-          unlock_credential->product_intermediate_key_certificate.signed_data
-              .public_key,
-          minimum_version,
-          permanent_attributes.product_id)) {
-    return AVB_IO_RESULT_OK;
-  }
-
-  /* Verify the challenge signature. */
-  algorithm_data = avb_get_algorithm_data(AVB_ALGORITHM_TYPE_SHA512_RSA4096);
-  sha512(last_unlock_challenge, AVB_ATX_UNLOCK_CHALLENGE_SIZE, challenge_hash);
-  if (!avb_rsa_verify(unlock_credential->product_unlock_key_certificate
-                          .signed_data.public_key,
-                      AVB_ATX_PUBLIC_KEY_SIZE,
-                      unlock_credential->challenge_signature,
-                      AVB_RSA4096_NUM_BYTES,
-                      challenge_hash,
-                      AVB_SHA512_DIGEST_SIZE,
-                      algorithm_data->padding,
-                      algorithm_data->padding_len)) {
-    avb_error("Invalid unlock challenge signature.\n");
-    return AVB_IO_RESULT_OK;
-  }
-
-  *out_is_trusted = true;
-  return AVB_IO_RESULT_OK;
-}
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_atx_validate.h>
+
+#include <android_avb/avb_rsa.h>
+#include <android_avb/avb_sha.h>
+#include <android_avb/avb_sysdeps.h>
+#include <android_avb/avb_util.h>
+#include <android_avb/avb_ops_user.h>
+#include <android_avb/rk_avb_ops_user.h>
+#include <malloc.h>
+#include <common.h>
+#ifdef CONFIG_CRYPTO_ROCKCHIP
+#include <rockchip_crypto/rockchip_crypto.h>
+#endif
+
+/* The most recent unlock challenge generated. */
+static uint8_t last_unlock_challenge[AVB_ATX_UNLOCK_CHALLENGE_SIZE];
+
+/* Computes the SHA256 |hash| of |length| bytes of |data|. */
+static void sha256(const uint8_t* data,
+                   uint32_t length,
+                   uint8_t hash[AVB_SHA256_DIGEST_SIZE]) {
+  AvbSHA256Ctx context;
+  avb_sha256_init(&context);
+  avb_sha256_update(&context, data, length);
+  uint8_t* tmp = avb_sha256_final(&context);
+  avb_memcpy(hash, tmp, AVB_SHA256_DIGEST_SIZE);
+}
+
+/* Computes the SHA512 |hash| of |length| bytes of |data|. */
+static void sha512(const uint8_t* data,
+                   uint32_t length,
+                   uint8_t hash[AVB_SHA512_DIGEST_SIZE]) {
+  AvbSHA512Ctx context;
+  avb_sha512_init(&context);
+  avb_sha512_update(&context, data, length);
+  uint8_t* tmp = avb_sha512_final(&context);
+  avb_memcpy(hash, tmp, AVB_SHA512_DIGEST_SIZE);
+}
+
+/* Computes the SHA256 |hash| of a NUL-terminated |str|. */
+static void sha256_str(const char* str, uint8_t hash[AVB_SHA256_DIGEST_SIZE]) {
+  sha256((const uint8_t*)str, avb_strlen(str), hash);
+}
+
+/* Verifies structure and |expected_hash| of permanent |attributes|. */
+static bool verify_permanent_attributes(
+    const AvbAtxPermanentAttributes* attributes,
+    const uint8_t expected_hash[AVB_SHA256_DIGEST_SIZE]) {
+  uint8_t hash[AVB_SHA256_DIGEST_SIZE];
+#ifdef ROCKCHIP_USE_PRE_LOADER_PUB_KEY
+#ifdef CONFIG_CRYPTO_ROCKCHIP
+  struct rk_pub_key pub_key;
+  int i;
+  uint8_t rsa_hash[256] = {0};
+  uint8_t rsa_hash_revert[256] = {0};
+  unsigned int rsaResult_temp[8];
+  unsigned char rsaResult[32] = {0};
+  char *temp;
+  struct rk_crypto_desc crypto_desc;
+  int ret = 0;
+
+  if (rk_crypto_probe())
+    return false;
+
+  memset(&pub_key, 0, sizeof(struct rk_pub_key));
+  ret = rk_avb_get_pub_key(&pub_key);
+  if (ret)
+    return false;
+
+  ret = rk_avb_get_perm_attr_cer(rsa_hash, 256);
+  if (ret) {
+    avb_error("get_perm_attr_cer error\n");
+    return false;
+  }
+
+  for (i = 0; i < 256; i++)
+    rsa_hash_revert[255-i] = rsa_hash[i];
+
+  ret = get_rk_crypto_desc(&crypto_desc);
+  if (ret) {
+    avb_error("get_rk_crypto_desc error\n");
+    return false;
+  }
+
+  ret = rk_crypto_rsa_init(&crypto_desc);
+  if (ret) {
+    avb_error("rk_crypto_rsa_init error\n");
+    return false;
+  }
+
+  ret = rk_crypto_rsa_start(&crypto_desc, (u32 *)(rsa_hash_revert),
+                            pub_key.rsa_n, pub_key.rsa_e, pub_key.rsa_c);
+  if (ret) {
+    avb_error("rk_crypto_rsa_start error\n");
+    return false;
+  }
+
+  ret = rk_crypto_rsa_end(&crypto_desc, rsaResult_temp);
+  if (ret) {
+    avb_error("rk_crypto_rsa_end error\n");
+    return false;
+  }
+
+  temp = (char *)rsaResult_temp;
+  for (i = 0; i < 32; i++)
+    rsaResult[31-i] = temp[i];
+
+  sha256((const uint8_t*)attributes, sizeof(AvbAtxPermanentAttributes), hash);
+  if (memcmp((void*)rsaResult, (void*)hash, 32) == 0)
+    return true;
+
+  return false;
+#endif
+#else
+  if (attributes->version != 1) {
+    avb_error("Unsupported permanent attributes version.\n");
+    return false;
+  }
+  sha256((const uint8_t*)attributes, sizeof(AvbAtxPermanentAttributes), hash);
+  if (0 != avb_safe_memcmp(hash, expected_hash, AVB_SHA256_DIGEST_SIZE)) {
+    avb_error("Invalid permanent attributes.\n");
+    return false;
+  }
+  return true;
+#endif
+}
+
+/* Verifies the format, key version, usage, and signature of a certificate. */
+static bool verify_certificate(
+    const AvbAtxCertificate* certificate,
+    const uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
+    uint64_t minimum_key_version,
+    const uint8_t expected_usage[AVB_SHA256_DIGEST_SIZE]) {
+  const AvbAlgorithmData* algorithm_data;
+  uint8_t certificate_hash[AVB_SHA512_DIGEST_SIZE];
+
+  if (certificate->signed_data.version != 1) {
+    avb_error("Unsupported certificate format.\n");
+    return false;
+  }
+  algorithm_data = avb_get_algorithm_data(AVB_ALGORITHM_TYPE_SHA512_RSA4096);
+  sha512((const uint8_t*)&certificate->signed_data,
+         sizeof(AvbAtxCertificateSignedData),
+         certificate_hash);
+  if (!avb_rsa_verify(authority,
+                      AVB_ATX_PUBLIC_KEY_SIZE,
+                      certificate->signature,
+                      AVB_RSA4096_NUM_BYTES,
+                      certificate_hash,
+                      AVB_SHA512_DIGEST_SIZE,
+                      algorithm_data->padding,
+                      algorithm_data->padding_len)) {
+    avb_error("Invalid certificate signature.\n");
+    return false;
+  }
+  if (certificate->signed_data.key_version < minimum_key_version) {
+    avb_error("Key rollback detected.\n");
+    return false;
+  }
+  if (0 != avb_safe_memcmp(certificate->signed_data.usage,
+                           expected_usage,
+                           AVB_SHA256_DIGEST_SIZE)) {
+    avb_error("Invalid certificate usage.\n");
+    return false;
+  }
+  return true;
+}
+
+/* Verifies signature and fields of a PIK certificate. */
+static bool verify_pik_certificate(
+    const AvbAtxCertificate* certificate,
+    const uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
+    uint64_t minimum_version) {
+  uint8_t expected_usage[AVB_SHA256_DIGEST_SIZE];
+
+  sha256_str("com.google.android.things.vboot.ca", expected_usage);
+  if (!verify_certificate(
+          certificate, authority, minimum_version, expected_usage)) {
+    avb_error("Invalid PIK certificate.\n");
+    return false;
+  }
+  return true;
+}
+
+/* Verifies signature and fields of a PSK certificate. */
+static bool verify_psk_certificate(
+    const AvbAtxCertificate* certificate,
+    const uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
+    uint64_t minimum_version,
+    const uint8_t product_id[AVB_ATX_PRODUCT_ID_SIZE]) {
+  uint8_t expected_subject[AVB_SHA256_DIGEST_SIZE];
+  uint8_t expected_usage[AVB_SHA256_DIGEST_SIZE];
+
+  sha256_str("com.google.android.things.vboot", expected_usage);
+  if (!verify_certificate(
+          certificate, authority, minimum_version, expected_usage)) {
+    avb_error("Invalid PSK certificate.\n");
+    return false;
+  }
+  sha256(product_id, AVB_ATX_PRODUCT_ID_SIZE, expected_subject);
+  if (0 != avb_safe_memcmp(certificate->signed_data.subject,
+                           expected_subject,
+                           AVB_SHA256_DIGEST_SIZE)) {
+    avb_error("PSK: Product ID mismatch.\n");
+    return false;
+  }
+  return true;
+}
+
+/* Verifies signature and fields of a PUK certificate. */
+static bool verify_puk_certificate(
+    const AvbAtxCertificate* certificate,
+    const uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
+    uint64_t minimum_version,
+    const uint8_t product_id[AVB_ATX_PRODUCT_ID_SIZE]) {
+  uint8_t expected_subject[AVB_SHA256_DIGEST_SIZE];
+  uint8_t expected_usage[AVB_SHA256_DIGEST_SIZE];
+
+  sha256_str("com.google.android.things.vboot.unlock", expected_usage);
+  if (!verify_certificate(
+          certificate, authority, minimum_version, expected_usage)) {
+    avb_error("Invalid PUK certificate.\n");
+    return false;
+  }
+  sha256(product_id, AVB_ATX_PRODUCT_ID_SIZE, expected_subject);
+  if (0 != avb_safe_memcmp(certificate->signed_data.subject,
+                           expected_subject,
+                           AVB_SHA256_DIGEST_SIZE)) {
+    avb_error("PUK: Product ID mismatch.\n");
+    return false;
+  }
+  return true;
+}
+
+AvbIOResult avb_atx_validate_vbmeta_public_key(
+    AvbOps* ops,
+    const uint8_t* public_key_data,
+    size_t public_key_length,
+    const uint8_t* public_key_metadata,
+    size_t public_key_metadata_length,
+    bool* out_is_trusted) {
+  AvbIOResult result = AVB_IO_RESULT_OK;
+  AvbAtxPermanentAttributes permanent_attributes;
+  uint8_t permanent_attributes_hash[AVB_SHA256_DIGEST_SIZE];
+  AvbAtxPublicKeyMetadata metadata;
+  uint64_t minimum_version;
+
+  /* Be pessimistic so we can exit early without having to remember to clear.
+   */
+  *out_is_trusted = false;
+
+  /* Read and verify permanent attributes. */
+  result = ops->atx_ops->read_permanent_attributes(ops->atx_ops,
+                                                   &permanent_attributes);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to read permanent attributes.\n");
+    return result;
+  }
+  result = ops->atx_ops->read_permanent_attributes_hash(
+      ops->atx_ops, permanent_attributes_hash);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to read permanent attributes hash.\n");
+    return result;
+  }
+  if (!verify_permanent_attributes(&permanent_attributes,
+                                   permanent_attributes_hash)) {
+    return AVB_IO_RESULT_OK;
+  }
+
+  /* Sanity check public key metadata. */
+  if (public_key_metadata_length != sizeof(AvbAtxPublicKeyMetadata)) {
+    avb_error("Invalid public key metadata.\n");
+    return AVB_IO_RESULT_OK;
+  }
+  avb_memcpy(&metadata, public_key_metadata, sizeof(AvbAtxPublicKeyMetadata));
+  if (metadata.version != 1) {
+    avb_error("Unsupported public key metadata.\n");
+    return AVB_IO_RESULT_OK;
+  }
+
+  /* Verify the PIK certificate. */
+  result = ops->read_rollback_index(
+      ops, AVB_ATX_PIK_VERSION_LOCATION, &minimum_version);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to read PIK minimum version.\n");
+    return result;
+  }
+  if (!verify_pik_certificate(&metadata.product_intermediate_key_certificate,
+                              permanent_attributes.product_root_public_key,
+                              minimum_version)) {
+    return AVB_IO_RESULT_OK;
+  }
+
+  /* Verify the PSK certificate. */
+  result = ops->read_rollback_index(
+      ops, AVB_ATX_PSK_VERSION_LOCATION, &minimum_version);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to read PSK minimum version.\n");
+    return result;
+  }
+  if (!verify_psk_certificate(
+          &metadata.product_signing_key_certificate,
+          metadata.product_intermediate_key_certificate.signed_data.public_key,
+          minimum_version,
+          permanent_attributes.product_id)) {
+    return AVB_IO_RESULT_OK;
+  }
+
+  /* Verify the PSK is the same key that verified vbmeta. */
+  if (public_key_length != AVB_ATX_PUBLIC_KEY_SIZE) {
+    avb_error("Public key length mismatch.\n");
+    return AVB_IO_RESULT_OK;
+  }
+  if (0 != avb_safe_memcmp(
+               metadata.product_signing_key_certificate.signed_data.public_key,
+               public_key_data,
+               AVB_ATX_PUBLIC_KEY_SIZE)) {
+    avb_error("Public key mismatch.\n");
+    return AVB_IO_RESULT_OK;
+  }
+
+  /* Report the key versions used during verification. */
+  ops->atx_ops->set_key_version(
+      ops->atx_ops,
+      AVB_ATX_PIK_VERSION_LOCATION,
+      metadata.product_intermediate_key_certificate.signed_data.key_version);
+  ops->atx_ops->set_key_version(
+      ops->atx_ops,
+      AVB_ATX_PSK_VERSION_LOCATION,
+      metadata.product_signing_key_certificate.signed_data.key_version);
+
+  *out_is_trusted = true;
+  return AVB_IO_RESULT_OK;
+}
+
+AvbIOResult avb_atx_generate_unlock_challenge(
+    AvbAtxOps* atx_ops, AvbAtxUnlockChallenge* out_unlock_challenge) {
+  AvbIOResult result = AVB_IO_RESULT_OK;
+  AvbAtxPermanentAttributes permanent_attributes;
+
+  /* We need the permanent attributes to compute the product_id_hash. */
+  result = atx_ops->read_permanent_attributes(atx_ops, &permanent_attributes);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to read permanent attributes.\n");
+    return result;
+  }
+  result = atx_ops->get_random(
+      atx_ops, AVB_ATX_UNLOCK_CHALLENGE_SIZE, last_unlock_challenge);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to generate random challenge.\n");
+    return result;
+  }
+  out_unlock_challenge->version = 1;
+  sha256(permanent_attributes.product_id,
+         AVB_ATX_PRODUCT_ID_SIZE,
+         out_unlock_challenge->product_id_hash);
+  avb_memcpy(out_unlock_challenge->challenge,
+             last_unlock_challenge,
+             AVB_ATX_UNLOCK_CHALLENGE_SIZE);
+  return result;
+}
+
+AvbIOResult avb_atx_validate_unlock_credential(
+    AvbAtxOps* atx_ops,
+    const AvbAtxUnlockCredential* unlock_credential,
+    bool* out_is_trusted) {
+  AvbIOResult result = AVB_IO_RESULT_OK;
+  AvbAtxPermanentAttributes permanent_attributes;
+  uint8_t permanent_attributes_hash[AVB_SHA256_DIGEST_SIZE];
+  uint64_t minimum_version;
+  const AvbAlgorithmData* algorithm_data;
+  uint8_t challenge_hash[AVB_SHA512_DIGEST_SIZE];
+
+  /* Be pessimistic so we can exit early without having to remember to clear.
+   */
+  *out_is_trusted = false;
+
+  /* Sanity check the credential. */
+  if (unlock_credential->version != 1) {
+    avb_error("Unsupported unlock credential format.\n");
+    return AVB_IO_RESULT_OK;
+  }
+
+  /* Read and verify permanent attributes. */
+  result = atx_ops->read_permanent_attributes(atx_ops, &permanent_attributes);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to read permanent attributes.\n");
+    return result;
+  }
+  result = atx_ops->read_permanent_attributes_hash(atx_ops,
+                                                   permanent_attributes_hash);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to read permanent attributes hash.\n");
+    return result;
+  }
+  if (!verify_permanent_attributes(&permanent_attributes,
+                                   permanent_attributes_hash)) {
+    return AVB_IO_RESULT_OK;
+  }
+
+  /* Verify the PIK certificate. */
+  result = atx_ops->ops->read_rollback_index(
+      atx_ops->ops, AVB_ATX_PIK_VERSION_LOCATION, &minimum_version);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to read PIK minimum version.\n");
+    return result;
+  }
+  if (!verify_pik_certificate(
+          &unlock_credential->product_intermediate_key_certificate,
+          permanent_attributes.product_root_public_key,
+          minimum_version)) {
+    return AVB_IO_RESULT_OK;
+  }
+
+  /* Verify the PUK certificate. The minimum version is shared with the PSK. */
+  result = atx_ops->ops->read_rollback_index(
+      atx_ops->ops, AVB_ATX_PSK_VERSION_LOCATION, &minimum_version);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to read PSK minimum version.\n");
+    return result;
+  }
+  if (!verify_puk_certificate(
+          &unlock_credential->product_unlock_key_certificate,
+          unlock_credential->product_intermediate_key_certificate.signed_data
+              .public_key,
+          minimum_version,
+          permanent_attributes.product_id)) {
+    return AVB_IO_RESULT_OK;
+  }
+
+  /* Verify the challenge signature. */
+  algorithm_data = avb_get_algorithm_data(AVB_ALGORITHM_TYPE_SHA512_RSA4096);
+  sha512(last_unlock_challenge, AVB_ATX_UNLOCK_CHALLENGE_SIZE, challenge_hash);
+  if (!avb_rsa_verify(unlock_credential->product_unlock_key_certificate
+                          .signed_data.public_key,
+                      AVB_ATX_PUBLIC_KEY_SIZE,
+                      unlock_credential->challenge_signature,
+                      AVB_RSA4096_NUM_BYTES,
+                      challenge_hash,
+                      AVB_SHA512_DIGEST_SIZE,
+                      algorithm_data->padding,
+                      algorithm_data->padding_len)) {
+    avb_error("Invalid unlock challenge signature.\n");
+    return AVB_IO_RESULT_OK;
+  }
+
+  *out_is_trusted = true;
+  return AVB_IO_RESULT_OK;
+}
diff --git a/lib/avb/libavb_user/avb_ops_user.c b/lib/avb/libavb_user/avb_ops_user.c
index ba20a41fc8..fca89265ae 100644
--- a/lib/avb/libavb_user/avb_ops_user.c
+++ b/lib/avb/libavb_user/avb_ops_user.c
@@ -354,6 +354,7 @@ AvbIOResult avb_read_perm_attr(AvbAtxOps *atx_ops,
 AvbIOResult avb_read_perm_attr_hash(AvbAtxOps *atx_ops,
 				    uint8_t hash[AVB_SHA256_DIGEST_SIZE])
 {
+#ifndef ROCKCHIP_USE_PRE_LOADER_PUB_KEY
 #ifdef CONFIG_OPTEE_CLIENT
 	if (trusty_read_attribute_hash((uint32_t *)hash,
 				       AVB_SHA256_DIGEST_SIZE / 4))
@@ -361,6 +362,7 @@ AvbIOResult avb_read_perm_attr_hash(AvbAtxOps *atx_ops,
 #else
 	avb_error("Please open the macro!\n");
 	return -1;
+#endif
 #endif
 	return AVB_IO_RESULT_OK;
 }

commit 3cf641a8159f0c5ecdafbcabb79f501fc705ba87
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Dec 26 09:29:35 2018 +0800

    fastboot: support write&read perm attr rsa certificate
    
    Change-Id: Iab2ca981dedc188c61c60cd8cebd0f01c5896d44
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 6613935254..b6de1c37f6 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -1841,6 +1841,27 @@ static void cb_oem_perm_attr(void)
 #endif
 }
 
+static void cb_oem_perm_attr_rsa_cer(void)
+{
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
+	if (download_bytes != 256) {
+		printf("Permanent attribute rsahash size is not equal!\n");
+		fastboot_tx_write_str("FAILperm attribute rsahash size error");
+		return;
+	}
+
+	if (rk_avb_set_perm_attr_cer((uint8_t *)CONFIG_FASTBOOT_BUF_ADDR,
+				     download_bytes)) {
+		fastboot_tx_write_str("FAILSet perm attr cer fail!");
+		return;
+	}
+
+	fastboot_tx_write_str("OKAY");
+#else
+	fastboot_tx_write_str("FAILnot implemented");
+#endif
+}
+
 static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 {
 	char *cmd = req->buf;
@@ -2078,6 +2099,8 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 #endif
 	} else if (strncmp("fuse at-perm-attr", cmd + 4, 16) == 0) {
 		cb_oem_perm_attr();
+	} else if (strncmp("fuse at-rsa-perm-attr", cmd + 4, 25) == 0) {
+		cb_oem_perm_attr_rsa_cer();
 	} else if (strncmp("fuse at-bootloader-vboot-key", cmd + 4, 27) == 0) {
 #ifdef CONFIG_RK_AVB_LIBAVB_USER
 		sha256_context ctx;

commit 1f670f7cc95cbebf077a9cf2267f0b26240cde42
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Mar 6 18:18:10 2019 +0800

    lib: avb: get public key by atags
    
    Change-Id: I0d77229585263e81e8be4f5c67a02080c07b0e55
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/android_avb/rk_avb_ops_user.h b/include/android_avb/rk_avb_ops_user.h
index 39d0058824..441856c33c 100644
--- a/include/android_avb/rk_avb_ops_user.h
+++ b/include/android_avb/rk_avb_ops_user.h
@@ -30,6 +30,13 @@ extern "C" {
 #define RPMB_BASE_ADDR		(64*1024/256)
 #define UBOOT_RB_INDEX_OFFSET 24
 #define TRUST_RB_INDEX_OFFSET 28
+#define ROCHCHIP_RSA_PARAMETER_SIZE 64
+
+struct rk_pub_key {
+	u_int32_t rsa_n[ROCHCHIP_RSA_PARAMETER_SIZE];
+	u_int32_t rsa_e[ROCHCHIP_RSA_PARAMETER_SIZE];
+	u_int32_t rsa_c[ROCHCHIP_RSA_PARAMETER_SIZE];
+};
 
 /**
  * Provided to fastboot to read how many slot in this system.
@@ -292,6 +299,13 @@ int rk_avb_get_perm_attr_cer(uint8_t *cer, uint32_t size);
  */
 int rk_avb_set_perm_attr_cer(uint8_t *cer, uint32_t size);
 
+/**
+ * Get public key
+ *
+ * @param pub_key: public key data
+ */
+int rk_avb_get_pub_key(struct rk_pub_key *pub_key);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/lib/avb/rk_avb_user/rk_avb_ops_user.c b/lib/avb/rk_avb_user/rk_avb_ops_user.c
index 2d4fea47ff..f14ff8ad22 100644
--- a/lib/avb/rk_avb_user/rk_avb_ops_user.c
+++ b/lib/avb/rk_avb_user/rk_avb_ops_user.c
@@ -24,8 +24,21 @@
 #include <android_avb/avb_atx_validate.h>
 #include <android_avb/rk_avb_ops_user.h>
 #include <boot_rkimg.h>
+#include <asm/arch/rk_atags.h>
 
 /* rk used */
+int rk_avb_get_pub_key(struct rk_pub_key *pub_key)
+{
+	struct tag *t = NULL;
+
+	t = atags_get_tag(ATAG_PUB_KEY);
+	if (!t)
+		return -1;
+
+	memcpy(pub_key, t->u.pub_key.data, sizeof(struct rk_pub_key));
+
+	return 0;
+}
 int rk_avb_get_perm_attr_cer(uint8_t *cer, uint32_t size)
 {
 #ifdef CONFIG_OPTEE_CLIENT

commit 9b83ce70a95b30edde529fabddbbdb3fa91a7d3e
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Dec 26 09:20:23 2018 +0800

    lib: avb: add get&set perm-attr cer
    
    Change-Id: I89d3a30f43659ae8c9d107ede5db1590b022440d
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/android_avb/rk_avb_ops_user.h b/include/android_avb/rk_avb_ops_user.h
index c9f3cd7927..39d0058824 100644
--- a/include/android_avb/rk_avb_ops_user.h
+++ b/include/android_avb/rk_avb_ops_user.h
@@ -267,7 +267,6 @@ int rk_auth_unlock(void *buffer, char *out_is_trusted);
  */
 int rk_generate_unlock_challenge(void *buffer, uint32_t *challenge_len);
 
-
 /**
  * Get last boot slot
  *
@@ -275,6 +274,24 @@ int rk_generate_unlock_challenge(void *buffer, uint32_t *challenge_len);
  */
 int rk_get_lastboot(void);
 
+/**
+ * Get permanent attribute certificate
+ *
+ * @param cer: certificate data
+ *
+ * @param size: certificate size
+ */
+int rk_avb_get_perm_attr_cer(uint8_t *cer, uint32_t size);
+
+/**
+ * Set permanent attribute certificate
+ *
+ * @param cer: certificate data
+ *
+ * @param size: certificate size
+ */
+int rk_avb_set_perm_attr_cer(uint8_t *cer, uint32_t size);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/lib/avb/rk_avb_user/rk_avb_ops_user.c b/lib/avb/rk_avb_user/rk_avb_ops_user.c
index 3edd428f98..2d4fea47ff 100644
--- a/lib/avb/rk_avb_user/rk_avb_ops_user.c
+++ b/lib/avb/rk_avb_user/rk_avb_ops_user.c
@@ -26,6 +26,30 @@
 #include <boot_rkimg.h>
 
 /* rk used */
+int rk_avb_get_perm_attr_cer(uint8_t *cer, uint32_t size)
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	if (trusty_read_permanent_attributes_cer((uint8_t *)cer, size))
+		return -EIO;
+
+	return 0;
+#else
+	return -1;
+#endif
+}
+
+int rk_avb_set_perm_attr_cer(uint8_t *cer, uint32_t size)
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	if (trusty_write_permanent_attributes_cer((uint8_t *)cer, size))
+		return -EIO;
+
+	return 0;
+#else
+	return -1;
+#endif
+}
+
 int rk_avb_read_slot_count(char *slot_count)
 {
 	*slot_count = SLOT_NUM;

commit 00e55222d361f674ec304d66029deb603bfe7bfc
Author: YouMin Chen <cym@rock-chips.com>
Date:   Fri Feb 15 19:37:42 2019 +0800

    driver: ram: rk3399: clear interrupt before data training
    
    Clears the corresponding interrupt bit of the PI_INT_STATUS
    parameter before trigger data training.
    
    Change-Id: Ic25c952a19913cb4332b6cd3405f41474585bfb1
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c
index 2d1e094c2f..11641468cc 100644
--- a/drivers/ram/rockchip/sdram_rk3399.c
+++ b/drivers/ram/rockchip/sdram_rk3399.c
@@ -1436,6 +1436,9 @@ static int data_training_ca(const struct chan_info *chan, u32 channel,
 	u32 rank = sdram_params->ch[channel].cap_info.rank;
 	u32 rank_mask;
 
+	/* clear interrupt,PI_175 PI_INT_ACK:WR:0:17 */
+	writel(0x00003f7c, (&denali_pi[175]));
+
 	if (sdram_params->base.dramtype == LPDDR4)
 		rank_mask = (rank == 1) ? 0x5 : 0xf;
 	else
@@ -1493,6 +1496,9 @@ static int data_training_wl(const struct chan_info *chan, u32 channel,
 	u32 obs_0, obs_1, obs_2, obs_3, obs_err = 0;
 	u32 rank = sdram_params->ch[channel].cap_info.rank;
 
+	/* clear interrupt,PI_175 PI_INT_ACK:WR:0:17 */
+	writel(0x00003f7c, (&denali_pi[175]));
+
 	for (i = 0; i < rank; i++) {
 		select_per_cs_training_index(chan, i);
 		/* PI_60 PI_WRLVL_EN:RW:8:2 */
@@ -1549,6 +1555,9 @@ static int data_training_rg(const struct chan_info *chan, u32 channel,
 	u32 obs_0, obs_1, obs_2, obs_3, obs_err = 0;
 	u32 rank = sdram_params->ch[channel].cap_info.rank;
 
+	/* clear interrupt,PI_175 PI_INT_ACK:WR:0:17 */
+	writel(0x00003f7c, (&denali_pi[175]));
+
 	for (i = 0; i < rank; i++) {
 		select_per_cs_training_index(chan, i);
 		/* PI_80 PI_RDLVL_GATE_EN:RW:24:2 */
@@ -1604,6 +1613,9 @@ static int data_training_rl(const struct chan_info *chan, u32 channel,
 	u32 i, tmp;
 	u32 rank = sdram_params->ch[channel].cap_info.rank;
 
+	/* clear interrupt,PI_175 PI_INT_ACK:WR:0:17 */
+	writel(0x00003f7c, (&denali_pi[175]));
+
 	for (i = 0; i < rank; i++) {
 		select_per_cs_training_index(chan, i);
 		/* PI_80 PI_RDLVL_EN:RW:16:2 */
@@ -1646,6 +1658,9 @@ static int data_training_wdql(const struct chan_info *chan, u32 channel,
 	u32 rank = sdram_params->ch[channel].cap_info.rank;
 	u32 rank_mask;
 
+	/* clear interrupt,PI_175 PI_INT_ACK:WR:0:17 */
+	writel(0x00003f7c, (&denali_pi[175]));
+
 	if (sdram_params->base.dramtype == LPDDR4)
 		rank_mask = (rank == 1) ? 0x5 : 0xf;
 	else

commit 6f226dcaabe6011b2029079cbe04a3c0af083e00
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed Jan 23 18:12:37 2019 -0800

    rkflash: change flash_read_page_raw return to error_ecc_bits
    
    1.increase the number of read retry, Triggered only when the
    readout is wrong, so efficiency affects small
    2.add nand buildin ecc support
    3.skip ECC error block instead of marking as bad block
    4.less debug printing
    5.adjust the way of building tables to increase ftl init
    
    Change-Id: I9cbc369472740d472dfad29449d1fd6529cd9877
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/flash.c b/drivers/rkflash/flash.c
index 71ed9694ad..c42e6d887f 100644
--- a/drivers/rkflash/flash.c
+++ b/drivers/rkflash/flash.c
@@ -20,6 +20,7 @@ static u8 g_nand_max_die;
 static u16 g_totle_block;
 static u8 g_nand_flash_ecc_bits;
 static u8 g_nand_idb_res_blk_num;
+static u8 g_nand_ecc_en;
 
 static struct NAND_PARA_INFO_T nand_para = {
 	2,
@@ -145,9 +146,28 @@ static void flash_read_random_dataout_cmd(u8 cs, u32 col_addr)
 	nandc_writel(READ_DP_OUT_CMD & 0x00ff, NANDC_CHIP_CMD(cs));
 }
 
+static u32 flash_read_ecc(u8 cs)
+{
+	u32 ecc0, ecc1;
+
+	nandc_writel(READ_ECC_STATUS_CMD, NANDC_CHIP_CMD(cs));
+	nandc_delayns(80);
+	ecc0 = nandc_readl(NANDC_CHIP_DATA(cs)) & 0xF;
+	ecc1 = nandc_readl(NANDC_CHIP_DATA(cs)) & 0xF;
+	if (ecc1 > ecc0)
+		ecc0 = ecc1;
+	ecc1 = nandc_readl(NANDC_CHIP_DATA(cs)) & 0xF;
+	if (ecc1 > ecc0)
+		ecc0 = ecc1;
+	ecc1 = nandc_readl(NANDC_CHIP_DATA(cs)) & 0xF;
+	if (ecc1 > ecc0)
+		ecc0 = ecc1;
+
+	return ecc0;
+}
+
 static u32 flash_read_page_raw(u8 cs, u32 page_addr, u32 *p_data, u32 *p_spare)
 {
-	u32 ret = 0;
 	u32 error_ecc_bits;
 	u32 sec_per_page = nand_para.sec_per_page;
 
@@ -160,34 +180,53 @@ static u32 flash_read_page_raw(u8 cs, u32 page_addr, u32 *p_data, u32 *p_spare)
 
 	error_ecc_bits = nandc_xfer_data(cs, NANDC_READ, sec_per_page,
 					 p_data, p_spare);
-	if (error_ecc_bits > 2) {
-		PRINT_NANDC_E("FlashReadRawPage %x %x error_ecc_bits %d\n",
-			      cs, page_addr, error_ecc_bits);
+	/*
+	if (error_ecc_bits > 12) {
+		PRINT_NANDC_E("%s %x %x error_ecc_bits %d\n",
+			      __func__, cs, page_addr, error_ecc_bits);
 		if (p_data)
-			PRINT_NANDC_HEX("data:", p_data, 4, 8);
+			PRINT_NANDC_HEX("data:", p_data, 4, 2);
 		if (p_spare)
 			PRINT_NANDC_HEX("spare:", p_spare, 4, 2);
 	}
+	*/
 	nandc_flash_de_cs(cs);
 
 	if (error_ecc_bits != NAND_STS_ECC_ERR) {
-		if (error_ecc_bits >= (u32)nand_para.ecc_bits - 3)
-			ret = NAND_STS_REFRESH;
-		else
-			ret = NAND_STS_OK;
+		if (error_ecc_bits >= (u32)nand_para.ecc_bits - 3) {
+			error_ecc_bits = NAND_STS_REFRESH;
+		} else {
+			error_ecc_bits = NAND_STS_OK;
+			if (g_nand_ecc_en) {
+				u32 nand_ecc = flash_read_ecc(cs);
+
+				if (nand_ecc >= 6) {
+					PRINT_NANDC_E("%s nand ecc %x ecc %d\n",
+						      __func__, page_addr, nand_ecc);
+					error_ecc_bits = NAND_STS_REFRESH;
+				}
+			}
+		}
 	}
 
-	return ret;
+	return error_ecc_bits;
 }
 
 static u32 flash_read_page(u8 cs, u32 page_addr, u32 *p_data, u32 *p_spare)
 {
-	u32 ret;
+	u32 ret, i;
 
 	ret = flash_read_page_raw(cs, page_addr, p_data, p_spare);
-	if (ret == NAND_STS_ECC_ERR)
-		ret = flash_read_page_raw(cs, page_addr, p_data, p_spare);
-
+	if (ret == NAND_STS_ECC_ERR) {
+		for (i = 0; i < 50; i++) {
+			ret = flash_read_page_raw(cs, page_addr, p_data, p_spare);
+			if (ret != NAND_STS_ECC_ERR) {
+				ret = NAND_STS_REFRESH;
+				break;
+			}
+		}
+		PRINT_NANDC_E("flash_read_page %x err_ecc %d\n", page_addr, ret);
+	}
 	return ret;
 }
 
@@ -471,6 +510,7 @@ u32 nandc_flash_init(void __iomem *nandc_addr)
 
 	PRINT_NANDC_I("...%s enter...\n", __func__);
 	g_nand_idb_res_blk_num = MAX_IDB_RESERVED_BLOCK;
+	g_nand_ecc_en = 0;
 
 	nandc_init(nandc_addr);
 
@@ -490,6 +530,8 @@ u32 nandc_flash_init(void __iomem *nandc_addr)
 				return FTL_UNSUPPORTED_FLASH;
 		}
 	}
+	if (id_byte[0][0] == 0x98 && (id_byte[0][4] & 0x80))
+		g_nand_ecc_en = 1;
 	nand_para.nand_id[1] = id_byte[0][1];
 	if (id_byte[0][1] == 0xDA) {
 		nand_para.plane_per_die = 2;
@@ -500,8 +542,9 @@ u32 nandc_flash_init(void __iomem *nandc_addr)
 			nand_para.plane_per_die = 2;
 			nand_para.sec_per_page = 8;
 		} else if (id_byte[0][0] == 0x98 && id_byte[0][3] == 0x26) {
-			nand_para.blk_per_plane = 2048;
+			nand_para.blk_per_plane = 1024;;
 			nand_para.sec_per_page = 8;
+			nand_para.plane_per_die = 2;
 		} else {
 			nand_para.plane_per_die = 2;
 			nand_para.blk_per_plane = 2048;
diff --git a/drivers/rkflash/flash.h b/drivers/rkflash/flash.h
index abc3fe14da..92e9878030 100644
--- a/drivers/rkflash/flash.h
+++ b/drivers/rkflash/flash.h
@@ -42,6 +42,7 @@
 #define BLOCK_ERASE_CMD		0x60d0
 #define READ_CMD		0x0030
 #define READ_DP_OUT_CMD		0x05E0
+#define READ_ECC_STATUS_CMD	0x7A
 
 #define SAMSUNG			0x00	/* SAMSUNG */
 #define TOSHIBA			0x01	/* TOSHIBA */
diff --git a/drivers/rkflash/flash_com.h b/drivers/rkflash/flash_com.h
index 71055797c8..b60875d382 100644
--- a/drivers/rkflash/flash_com.h
+++ b/drivers/rkflash/flash_com.h
@@ -17,6 +17,11 @@
 #define NAND_STS_EMPTY                  512	/* page is not proged */
 #define NAND_STS_ECC_ERR                NAND_ERROR
 
+#define NAND_IDB_START    64 /* 32 KB*/
+#define NAND_IDB_SIZE    512 /* 256 KB*/
+#define NAND_IDB_END    NAND_IDB_START + NAND_IDB_SIZE - 1
+#define DEFAULT_IDB_RESERVED_BLOCK	16
+
 #define FULL_SLC			0
 #define SLC				1
 
diff --git a/drivers/rkflash/rk_sftl_arm_v7.S b/drivers/rkflash/rk_sftl_arm_v7.S
index 294e85db8e..ddde4a609f 100644
--- a/drivers/rkflash/rk_sftl_arm_v7.S
+++ b/drivers/rkflash/rk_sftl_arm_v7.S
@@ -2,7 +2,7 @@
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:    GPL-2.0
- * date: 2018-12-27
+ * date: 2019-02-20
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -812,126 +812,100 @@ IsInFreeQueue:
 	.fpu softvfp
 	.type	insert_data_list, %function
 insert_data_list:
-	@ args = 0, pretend = 0, frame = 16
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L100
-	ldrh	lr, [r3]
-	cmp	lr, r0
+	ldr	r3, .L99
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	ldrh	r8, [r3]
+	cmp	r8, r0
 	bls	.L86
-	ldr	r3, .L100+4
+	ldr	r3, .L99+4
 	movs	r5, #6
+	muls	r5, r0, r5
 	ldr	r4, [r3]
-	mul	r3, r5, r0
-	str	r3, [sp, #4]
-	adds	r1, r4, r3
-	ldr	r2, [sp, #4]
 	movw	r3, #65535
+	adds	r1, r4, r5
 	strh	r3, [r1, #2]	@ movhi
-	strh	r3, [r4, r2]	@ movhi
-	ldr	r3, .L100+8
+	strh	r3, [r4, r5]	@ movhi
+	ldr	r3, .L99+8
 	ldr	ip, [r3]
 	cmp	ip, #0
 	bne	.L87
-.L99:
+.L98:
 	str	r1, [r3]
 .L86:
 	movs	r0, #0
-	add	sp, sp, #16
-	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
 .L87:
-	ldr	r3, .L100+12
-	lsls	r2, r0, #1
-	ldr	r3, [r3]
-	str	r3, [sp, #8]
-	ldrh	r6, [r3, r0, lsl #1]
-	ldrh	r3, [r1, #4]
-	cbz	r3, .L97
-	mul	fp, r3, r6
+	ldr	r3, .L99+12
+	ldrh	r6, [r1, #4]
+	ldr	r10, [r3]
+	ldrh	r3, [r10, r0, lsl #1]
+	cbz	r6, .L94
+	muls	r6, r3, r6
 .L88:
-	sub	r3, ip, r4
-	asrs	r6, r3, #1
-	ldr	r3, .L100+16
-	muls	r3, r6, r3
-	ldr	r6, .L100+20
-	ldr	r8, [r6]
-	movs	r6, #0
-	uxth	r3, r3
-	add	r2, r8, r2
-	str	r2, [sp, #12]
-	mov	r2, ip
-.L95:
-	adds	r6, r6, #1
-	uxth	r6, r6
-	cmp	lr, r6
+	sub	r2, ip, r4
+	movs	r7, #0
+	asrs	r3, r2, #1
+	ldr	r2, .L99+16
+	muls	r2, r3, r2
+	mov	r3, ip
+	uxth	r2, r2
+.L92:
+	adds	r7, r7, #1
+	uxth	r7, r7
+	cmp	r8, r7
 	bcc	.L86
-	cmp	r3, r0
+	cmp	r2, r0
 	beq	.L86
-	ldr	r7, [sp, #8]
-	lsl	r10, r3, #1
-	ldrh	r7, [r7, r3, lsl #1]
-	mov	r5, r7
-	ldrh	r7, [r2, #4]
-	cbz	r7, .L98
-	muls	r7, r5, r7
-.L90:
-	cmp	fp, r7
+	ldrh	lr, [r3, #4]
+	cmp	lr, #0
+	beq	.L90
+	ldrh	fp, [r10, r2, lsl #1]
+	mul	lr, lr, fp
+	cmp	r6, lr
+	bls	.L90
+	ldrh	lr, [r3]
+	movw	fp, #65535
+	cmp	lr, fp
 	bne	.L91
-	ldr	r5, [sp, #12]
-	ldrh	r10, [r8, r10]
-	ldrh	r7, [r5]
-	cmp	r10, r7
-	bcc	.L93
-.L92:
-	ldr	r5, [sp, #4]
-	cmp	r2, ip
-	strh	r3, [r4, r5]	@ movhi
-	ldrh	r3, [r2, #2]
-	strh	r3, [r1, #2]	@ movhi
-	bne	.L96
-	strh	r0, [r2, #2]	@ movhi
-	ldr	r3, .L100+8
-	b	.L99
-.L97:
-	mov	fp, #-1
+	strh	r2, [r1, #2]	@ movhi
+	strh	r0, [r3]	@ movhi
+	ldr	r3, .L99+20
+	b	.L98
+.L94:
+	mov	r6, #-1
 	b	.L88
-.L98:
-	mov	r7, #-1
-	b	.L90
 .L91:
-	bcc	.L92
-.L93:
-	ldrh	r7, [r2]
-	movw	r5, #65535
-	cmp	r7, r5
-	bne	.L94
-	strh	r3, [r1, #2]	@ movhi
-	strh	r0, [r2]	@ movhi
-	ldr	r3, .L100+24
-	b	.L99
-.L94:
-	movs	r3, #6
-	mla	r2, r3, r7, r4
-	mov	r3, r7
-	b	.L95
-.L96:
-	ldrh	r1, [r2, #2]
 	movs	r3, #6
-	muls	r3, r1, r3
-	strh	r0, [r4, r3]	@ movhi
-	strh	r0, [r2, #2]	@ movhi
+	mov	r2, lr
+	mla	r3, r3, lr, r4
+	b	.L92
+.L90:
+	strh	r2, [r4, r5]	@ movhi
+	cmp	r3, ip
+	ldrh	r2, [r3, #2]
+	strh	r2, [r1, #2]	@ movhi
+	bne	.L93
+	strh	r0, [r3, #2]	@ movhi
+	ldr	r3, .L99+8
+	b	.L98
+.L93:
+	ldrh	r1, [r3, #2]
+	movs	r2, #6
+	muls	r2, r1, r2
+	strh	r0, [r4, r2]	@ movhi
+	strh	r0, [r3, #2]	@ movhi
 	b	.L86
-.L101:
-	.align	2
 .L100:
+	.align	2
+.L99:
 	.word	.LANCHOR5
 	.word	.LANCHOR40
 	.word	.LANCHOR41
 	.word	.LANCHOR42
 	.word	-1431655765
 	.word	.LANCHOR43
-	.word	.LANCHOR44
 	.size	insert_data_list, .-insert_data_list
 	.section	.text.INSERT_DATA_LIST,"ax",%progbits
 	.align	1
@@ -946,28 +920,28 @@ INSERT_DATA_LIST:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	insert_data_list
-	ldr	r2, .L104
+	ldr	r2, .L103
 	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L104+4
+	ldr	r2, .L103+4
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bcs	.L102
+	bcs	.L101
 	movs	r2, #214
-	ldr	r1, .L104+8
-	ldr	r0, .L104+12
+	ldr	r1, .L103+8
+	ldr	r0, .L103+12
 	pop	{r3, lr}
 	b	printf
-.L102:
+.L101:
 	pop	{r3, pc}
-.L105:
-	.align	2
 .L104:
-	.word	.LANCHOR45
+	.align	2
+.L103:
+	.word	.LANCHOR44
 	.word	.LANCHOR5
-	.word	.LANCHOR46
+	.word	.LANCHOR45
 	.word	.LC1
 	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
 	.section	.text.insert_free_list,"ax",%progbits
@@ -984,48 +958,48 @@ insert_free_list:
 	movw	r1, #65535
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	cmp	r0, r1
-	beq	.L107
-	ldr	r3, .L113
+	beq	.L106
+	ldr	r3, .L112
 	mov	r10, #6
 	mul	r7, r10, r0
 	ldr	r4, [r3]
-	ldr	r3, .L113+4
+	ldr	r3, .L112+4
 	adds	r5, r4, r7
 	ldr	r6, [r3]
 	mov	lr, r3
 	strh	r1, [r5, #2]	@ movhi
 	strh	r1, [r4, r7]	@ movhi
-	cbnz	r6, .L108
+	cbnz	r6, .L107
 	str	r5, [r3]
-.L107:
+.L106:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L108:
-	ldr	r3, .L113+8
+.L107:
+	ldr	r3, .L112+8
 	subs	r2, r6, r4
 	mov	fp, r1
 	ldr	ip, [r3]
 	asrs	r3, r2, #1
-	ldr	r2, .L113+12
+	ldr	r2, .L112+12
 	ldrh	r8, [ip, r0, lsl #1]
 	muls	r2, r3, r2
 	mov	r3, r6
 	uxth	r2, r2
-.L111:
+.L110:
 	ldrh	r1, [ip, r2, lsl #1]
 	cmp	r1, r8
-	bcs	.L109
+	bcs	.L108
 	ldrh	r1, [r3]
 	cmp	r1, fp
-	bne	.L110
+	bne	.L109
 	strh	r2, [r5, #2]	@ movhi
 	strh	r0, [r3]	@ movhi
-	b	.L107
-.L110:
+	b	.L106
+.L109:
 	mla	r3, r10, r1, r4
 	mov	r2, r1
-	b	.L111
-.L109:
+	b	.L110
+.L108:
 	ldrh	r1, [r3, #2]
 	cmp	r3, r6
 	strh	r1, [r5, #2]	@ movhi
@@ -1040,13 +1014,13 @@ insert_free_list:
 	itt	ne
 	strhne	r0, [r4, r2]	@ movhi
 	strhne	r0, [r3, #2]	@ movhi
-	b	.L107
-.L114:
-	.align	2
+	b	.L106
 .L113:
+	.align	2
+.L112:
 	.word	.LANCHOR40
+	.word	.LANCHOR46
 	.word	.LANCHOR47
-	.word	.LANCHOR43
 	.word	-1431655765
 	.size	insert_free_list, .-insert_free_list
 	.section	.text.INSERT_FREE_LIST,"ax",%progbits
@@ -1062,25 +1036,25 @@ INSERT_FREE_LIST:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	insert_free_list
-	ldr	r2, .L117
+	ldr	r2, .L116
 	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L117+4
+	ldr	r2, .L116+4
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bcs	.L115
+	bcs	.L114
 	movs	r2, #207
-	ldr	r1, .L117+8
-	ldr	r0, .L117+12
+	ldr	r1, .L116+8
+	ldr	r0, .L116+12
 	pop	{r3, lr}
 	b	printf
-.L115:
+.L114:
 	pop	{r3, pc}
-.L118:
-	.align	2
 .L117:
+	.align	2
+.L116:
 	.word	.LANCHOR48
 	.word	.LANCHOR5
 	.word	.LANCHOR49
@@ -1099,7 +1073,7 @@ List_remove_node:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r6, #6
-	ldr	r5, .L125
+	ldr	r5, .L124
 	muls	r6, r1, r6
 	movw	r3, #65535
 	mov	r8, r0
@@ -1107,20 +1081,20 @@ List_remove_node:
 	adds	r4, r7, r6
 	ldrh	r2, [r4, #2]
 	cmp	r2, r3
-	bne	.L120
+	bne	.L119
 	ldr	r3, [r0]
 	cmp	r4, r3
-	beq	.L120
+	beq	.L119
 	mov	r2, #372
-	ldr	r1, .L125+4
-	ldr	r0, .L125+8
+	ldr	r1, .L124+4
+	ldr	r0, .L124+8
 	bl	printf
-.L120:
+.L119:
 	ldr	r3, [r8]
 	movw	r1, #65535
 	cmp	r4, r3
 	ldrh	r3, [r7, r6]
-	bne	.L121
+	bne	.L120
 	cmp	r3, r1
 	ittee	ne
 	ldrne	r0, [r5]
@@ -1131,24 +1105,24 @@ List_remove_node:
 	mlane	r3, r2, r3, r0
 	strne	r3, [r8]
 	strhne	r1, [r3, #2]	@ movhi
-.L123:
+.L122:
 	movw	r3, #65535
 	movs	r0, #0
 	strh	r3, [r7, r6]	@ movhi
 	strh	r3, [r4, #2]	@ movhi
 	pop	{r4, r5, r6, r7, r8, pc}
-.L121:
+.L120:
 	cmp	r3, r1
 	ldrh	r1, [r4, #2]
-	bne	.L124
+	bne	.L123
 	cmp	r1, r3
-	beq	.L123
+	beq	.L122
 	movs	r2, #6
 	ldr	r0, [r5]
 	muls	r1, r2, r1
 	strh	r3, [r0, r1]	@ movhi
-	b	.L123
-.L124:
+	b	.L122
+.L123:
 	ldr	r0, [r5]
 	movs	r2, #6
 	mla	r5, r2, r3, r0
@@ -1156,10 +1130,10 @@ List_remove_node:
 	ldrh	r1, [r4, #2]
 	muls	r2, r1, r2
 	strh	r3, [r0, r2]	@ movhi
-	b	.L123
-.L126:
-	.align	2
+	b	.L122
 .L125:
+	.align	2
+.L124:
 	.word	.LANCHOR40
 	.word	.LANCHOR50
 	.word	.LC1
@@ -1177,15 +1151,15 @@ List_pop_index_node:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	ldr	r3, [r0]
 	push	{r4, r5, r6, lr}
-	cbz	r3, .L133
-	ldr	r2, .L134
+	cbz	r3, .L132
+	ldr	r2, .L133
 	movw	r5, #65535
 	movs	r6, #6
 	ldr	r2, [r2]
-.L129:
-	cbnz	r1, .L130
-.L132:
-	ldr	r4, .L134+4
+.L128:
+	cbnz	r1, .L129
+.L131:
+	ldr	r4, .L133+4
 	subs	r3, r3, r2
 	asrs	r3, r3, #1
 	muls	r4, r3, r4
@@ -1193,20 +1167,20 @@ List_pop_index_node:
 	bl	List_remove_node
 	uxth	r0, r4
 	pop	{r4, r5, r6, pc}
-.L130:
+.L129:
 	ldrh	r4, [r3]
 	cmp	r4, r5
-	beq	.L132
+	beq	.L131
 	subs	r1, r1, #1
 	mla	r3, r6, r4, r2
 	uxth	r1, r1
-	b	.L129
-.L133:
+	b	.L128
+.L132:
 	movw	r0, #65535
 	pop	{r4, r5, r6, pc}
-.L135:
-	.align	2
 .L134:
+	.align	2
+.L133:
 	.word	.LANCHOR40
 	.word	-1431655765
 	.size	List_pop_index_node, .-List_pop_index_node
@@ -1236,37 +1210,37 @@ List_pop_head_node:
 List_get_gc_head_node:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L143
+	ldr	r3, .L142
 	push	{r4, lr}
 	ldr	r3, [r3]
-	cbz	r3, .L142
-	ldr	r2, .L143+4
+	cbz	r3, .L141
+	ldr	r2, .L142+4
 	movs	r4, #6
 	ldr	r1, [r2]
 	movw	r2, #65535
-.L139:
-	cbz	r0, .L140
+.L138:
+	cbz	r0, .L139
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bne	.L141
-.L142:
+	bne	.L140
+.L141:
 	movw	r0, #65535
 	pop	{r4, pc}
-.L141:
+.L140:
 	subs	r0, r0, #1
 	mla	r3, r4, r3, r1
 	uxth	r0, r0
-	b	.L139
-.L140:
-	ldr	r0, .L143+8
+	b	.L138
+.L139:
+	ldr	r0, .L142+8
 	subs	r3, r3, r1
 	asrs	r3, r3, #1
 	muls	r3, r0, r3
 	uxth	r0, r3
 	pop	{r4, pc}
-.L144:
-	.align	2
 .L143:
+	.align	2
+.L142:
 	.word	.LANCHOR41
 	.word	.LANCHOR40
 	.word	-1431655765
@@ -1282,61 +1256,61 @@ List_get_gc_head_node:
 List_update_data_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L156
+	ldr	r3, .L155
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L147
-	ldr	r3, .L156+4
+	beq	.L146
+	ldr	r3, .L155+4
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L147
-	ldr	r3, .L156+8
+	beq	.L146
+	ldr	r3, .L155+8
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L147
-	ldr	r7, .L156+12
+	beq	.L146
+	ldr	r7, .L155+12
 	movs	r6, #6
-	ldr	r3, .L156+16
+	ldr	r3, .L155+16
 	muls	r6, r0, r6
 	ldr	fp, [r7]
 	ldr	r3, [r3]
 	add	r10, fp, r6
 	cmp	r10, r3
-	beq	.L147
-	ldr	r3, .L156+20
+	beq	.L146
+	ldr	r3, .L155+20
 	ldrh	r5, [r10, #4]
 	ldr	r2, [r3]
 	mov	r8, r3
 	ldrh	r2, [r2, r0, lsl #1]
 	cmp	r5, #0
-	beq	.L154
+	beq	.L153
 	muls	r5, r2, r5
-.L149:
+.L148:
 	ldrh	r3, [r10, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L150
+	bne	.L149
 	ldrh	r2, [fp, r6]
 	cmp	r2, r3
-	bne	.L150
+	bne	.L149
 	movw	r2, #463
-	ldr	r1, .L156+24
-	ldr	r0, .L156+28
+	ldr	r1, .L155+24
+	ldr	r0, .L155+28
 	bl	printf
-.L150:
+.L149:
 	ldrh	r3, [r10, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L151
+	bne	.L150
 	ldrh	r2, [fp, r6]
 	cmp	r2, r3
-	beq	.L147
-.L151:
+	beq	.L146
+.L150:
 	movs	r2, #6
 	muls	r2, r3, r2
-	ldr	r3, .L156+32
+	ldr	r3, .L155+32
 	asrs	r1, r2, #1
 	muls	r3, r1, r3
 	ldr	r1, [r8]
@@ -1344,39 +1318,39 @@ List_update_data_list:
 	ldr	r1, [r7]
 	add	r2, r2, r1
 	ldrh	r3, [r2, #4]
-	cbz	r3, .L155
+	cbz	r3, .L154
 	muls	r3, r0, r3
-.L152:
+.L151:
 	cmp	r5, r3
-	bcs	.L147
-	ldr	r5, .L156+36
+	bcs	.L146
+	ldr	r5, .L155+36
 	mov	r1, r4
-	ldr	r0, .L156+16
+	ldr	r0, .L155+16
 	bl	List_remove_node
 	ldrh	r3, [r5]
-	cbnz	r3, .L153
+	cbnz	r3, .L152
 	mov	r2, #474
-	ldr	r1, .L156+24
-	ldr	r0, .L156+28
+	ldr	r1, .L155+24
+	ldr	r0, .L155+28
 	bl	printf
-.L153:
+.L152:
 	ldrh	r3, [r5]
 	mov	r0, r4
 	subs	r3, r3, #1
 	strh	r3, [r5]	@ movhi
 	bl	INSERT_DATA_LIST
-.L147:
+.L146:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L154:
+.L153:
 	mov	r5, #-1
-	b	.L149
-.L155:
+	b	.L148
+.L154:
 	mov	r3, #-1
-	b	.L152
-.L157:
-	.align	2
+	b	.L151
 .L156:
+	.align	2
+.L155:
 	.word	.LANCHOR51
 	.word	.LANCHOR52
 	.word	.LANCHOR53
@@ -1386,7 +1360,7 @@ List_update_data_list:
 	.word	.LANCHOR54
 	.word	.LC1
 	.word	-1431655765
-	.word	.LANCHOR45
+	.word	.LANCHOR44
 	.size	List_update_data_list, .-List_update_data_list
 	.section	.text.select_l2p_ram_region,"ax",%progbits
 	.align	1
@@ -1401,79 +1375,79 @@ select_l2p_ram_region:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r1, #0
-	ldr	r3, .L168
+	ldr	r3, .L167
 	movs	r0, #12
 	movw	r5, #65535
 	ldrh	r2, [r3]
-	ldr	r3, .L168+4
+	ldr	r3, .L167+4
 	ldr	r3, [r3]
-.L159:
+.L158:
 	uxth	r4, r1
 	cmp	r4, r2
-	bcc	.L161
+	bcc	.L160
 	mov	r4, r2
 	movs	r1, #0
 	mov	r6, #-2147483648
 	movs	r7, #12
-.L162:
+.L161:
 	uxth	r5, r1
 	cmp	r5, r2
-	bcc	.L164
+	bcc	.L163
 	cmp	r4, r2
-	bcc	.L160
-	ldr	r1, .L168+8
+	bcc	.L159
+	ldr	r1, .L167+8
 	mov	r4, r2
 	mov	r0, #-1
 	ldrh	r7, [r1]
 	movs	r1, #0
-.L165:
+.L164:
 	uxth	r5, r1
 	cmp	r5, r2
-	bcc	.L167
+	bcc	.L166
 	cmp	r4, r2
-	bcc	.L160
+	bcc	.L159
 	movw	r2, #789
-	ldr	r1, .L168+12
-	ldr	r0, .L168+16
+	ldr	r1, .L167+12
+	ldr	r0, .L167+16
 	bl	printf
-	b	.L160
-.L161:
+	b	.L159
+.L160:
 	adds	r1, r1, #1
 	mla	r6, r0, r1, r3
 	ldrh	r6, [r6, #-12]
 	cmp	r6, r5
-	bne	.L159
-.L160:
+	bne	.L158
+.L159:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, pc}
-.L164:
+.L163:
 	mla	r0, r7, r1, r3
 	ldr	r0, [r0, #4]
 	cmp	r0, #0
-	blt	.L163
+	blt	.L162
 	cmp	r6, r0
 	itt	hi
 	movhi	r6, r0
 	movhi	r4, r5
-.L163:
+.L162:
 	adds	r1, r1, #1
-	b	.L162
-.L167:
+	b	.L161
+.L166:
 	ldr	r6, [r3, #4]
 	cmp	r0, r6
-	bls	.L166
+	bls	.L165
 	ldrh	ip, [r3]
 	cmp	ip, r7
 	itt	ne
 	movne	r0, r6
 	movne	r4, r5
-.L166:
+.L165:
 	adds	r1, r1, #1
 	adds	r3, r3, #12
-	b	.L165
-.L169:
-	.align	2
+	b	.L164
 .L168:
+	.align	2
+.L167:
 	.word	.LANCHOR33
 	.word	.LANCHOR55
 	.word	.LANCHOR56
@@ -1491,45 +1465,45 @@ select_l2p_ram_region:
 FtlUpdateVaildLpn:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L180
+	ldr	r2, .L179
 	push	{r4, r5, r6, lr}
 	mov	r1, r2
 	ldrh	r3, [r2]
 	cmp	r3, #4
-	bhi	.L171
-	cbnz	r0, .L171
+	bhi	.L170
+	cbnz	r0, .L170
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
 	pop	{r4, r5, r6, pc}
-.L171:
+.L170:
 	movs	r3, #0
-	ldr	r0, .L180+4
+	ldr	r0, .L179+4
 	strh	r3, [r1]	@ movhi
 	movw	r6, #65535
-	ldr	r1, .L180+8
+	ldr	r1, .L179+8
 	ldrh	r4, [r0]
 	mov	r0, r3
-	ldr	r2, .L180+12
+	ldr	r2, .L179+12
 	ldr	r1, [r1]
 	str	r3, [r2]
 	add	r4, r1, r4, lsl #1
-.L172:
+.L171:
 	cmp	r1, r4
-	bne	.L174
-	cbz	r3, .L170
+	bne	.L173
+	cbz	r3, .L169
 	str	r0, [r2]
-.L170:
+.L169:
 	pop	{r4, r5, r6, pc}
-.L174:
+.L173:
 	ldrh	r5, [r1], #2
 	cmp	r5, r6
 	itt	ne
 	addne	r0, r0, r5
 	movne	r3, #1
-	b	.L172
-.L181:
-	.align	2
+	b	.L171
 .L180:
+	.align	2
+.L179:
 	.word	.LANCHOR58
 	.word	.LANCHOR5
 	.word	.LANCHOR42
@@ -1548,10 +1522,10 @@ ftl_set_blk_mode:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	mov	r3, r0
-	cbz	r1, .L183
+	cbz	r1, .L182
 	b	ftl_set_blk_mode.part.6
-.L183:
-	ldr	r2, .L184
+.L182:
+	ldr	r2, .L183
 	lsrs	r0, r0, #5
 	and	r3, r3, #31
 	ldr	r1, [r2]
@@ -1561,9 +1535,9 @@ ftl_set_blk_mode:
 	bic	r2, r2, r3
 	str	r2, [r1, r0, lsl #2]
 	bx	lr
-.L185:
-	.align	2
 .L184:
+	.align	2
+.L183:
 	.word	.LANCHOR1
 	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
 	.section	.text.ftl_get_blk_mode,"ax",%progbits
@@ -1578,7 +1552,7 @@ ftl_get_blk_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L187
+	ldr	r3, .L186
 	lsrs	r2, r0, #5
 	and	r0, r0, #31
 	ldr	r3, [r3]
@@ -1586,9 +1560,9 @@ ftl_get_blk_mode:
 	lsr	r0, r3, r0
 	and	r0, r0, #1
 	bx	lr
-.L188:
-	.align	2
 .L187:
+	.align	2
+.L186:
 	.word	.LANCHOR1
 	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
 	.section	.text.ftl_sb_update_avl_pages,"ax",%progbits
@@ -1606,14 +1580,14 @@ ftl_sb_update_avl_pages:
 	push	{r4, r5, r6, lr}
 	strh	r3, [r0, #4]	@ movhi
 	movw	r6, #65535
-	ldr	r3, .L196
+	ldr	r3, .L195
 	ldrh	r4, [r3]
 	add	r3, r0, r2, lsl #1
 	adds	r3, r3, #14
-.L190:
+.L189:
 	cmp	r2, r4
-	bcc	.L192
-	ldr	r3, .L196+4
+	bcc	.L191
+	ldr	r3, .L195+4
 	add	r5, r0, #16
 	movw	r6, #65535
 	ldrh	r3, [r3]
@@ -1621,12 +1595,12 @@ ftl_sb_update_avl_pages:
 	subs	r1, r3, r1
 	movs	r3, #0
 	uxth	r1, r1
-.L193:
+.L192:
 	uxth	r2, r3
 	cmp	r4, r2
-	bhi	.L195
+	bhi	.L194
 	pop	{r4, r5, r6, pc}
-.L192:
+.L191:
 	ldrh	r5, [r3, #2]!
 	adds	r2, r2, #1
 	uxth	r2, r2
@@ -1635,8 +1609,8 @@ ftl_sb_update_avl_pages:
 	ldrhne	r5, [r0, #4]
 	addne	r5, r5, #1
 	strhne	r5, [r0, #4]	@ movhi
-	b	.L190
-.L195:
+	b	.L189
+.L194:
 	ldrh	r2, [r5], #2
 	adds	r3, r3, #1
 	cmp	r2, r6
@@ -1644,10 +1618,10 @@ ftl_sb_update_avl_pages:
 	ldrhne	r2, [r0, #4]
 	addne	r2, r2, r1
 	strhne	r2, [r0, #4]	@ movhi
-	b	.L193
-.L197:
-	.align	2
+	b	.L192
 .L196:
+	.align	2
+.L195:
 	.word	.LANCHOR3
 	.word	.LANCHOR19
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
@@ -1664,24 +1638,24 @@ FtlSlcSuperblockCheck:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	ldrh	r3, [r0, #4]
 	push	{r4, r5, lr}
-	cbz	r3, .L198
+	cbz	r3, .L197
 	ldrh	r2, [r0]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L198
+	beq	.L197
 	ldrb	r2, [r0, #6]	@ zero_extendqisi2
 	movs	r5, #0
 	adds	r2, r2, #8
 	ldrh	r1, [r0, r2, lsl #1]
-	ldr	r2, .L204
+	ldr	r2, .L203
 	ldrh	r4, [r2]
 	mov	r2, r3
-.L201:
+.L200:
 	cmp	r1, r2
-	beq	.L203
-.L198:
+	beq	.L202
+.L197:
 	pop	{r4, r5, pc}
-.L203:
+.L202:
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	uxtb	r3, r3
@@ -1695,10 +1669,10 @@ FtlSlcSuperblockCheck:
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r1, [r0, r3, lsl #1]
-	b	.L201
-.L205:
-	.align	2
+	b	.L200
 .L204:
+	.align	2
+.L203:
 	.word	.LANCHOR3
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
 	.section	.text.make_superblock,"ax",%progbits
@@ -1718,48 +1692,57 @@ make_superblock:
 	mov	r4, r0
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L207
-	movw	r2, #2156
+	bcc	.L206
+	movw	r2, #2148
 	ldr	r1, .L211+4
 	ldr	r0, .L211+8
 	bl	printf
-.L207:
+.L206:
 	ldr	r3, .L211+12
 	add	r6, r4, #16
-	ldr	r10, .L211+20
+	ldr	r10, .L211+24
 	movw	r7, #65535
 	movs	r5, #0
 	ldrh	r8, [r3]
 	strh	r5, [r4, #4]	@ movhi
 	strb	r5, [r4, #7]
-.L208:
+.L207:
 	uxth	r3, r5
+	ldrh	r1, [r4]
 	cmp	r8, r3
-	bhi	.L210
+	bhi	.L209
 	ldr	r2, .L211+16
 	movs	r0, #0
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	strb	r0, [r4, #9]
 	ldrh	r2, [r2]
 	smulbb	r3, r3, r2
 	strh	r3, [r4, #4]	@ movhi
+	movs	r3, #0
+	strb	r3, [r4, #9]
+	ldr	r3, .L211+20
+	ldr	r3, [r3]
+	ldrh	r2, [r3, r1, lsl #1]
+	movw	r3, #10000
+	cmp	r2, r3
+	itt	hi
+	movhi	r3, #1
+	strbhi	r3, [r4, #9]
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L210:
-	ldrh	r1, [r4]
+.L209:
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
 	strh	r7, [r6]	@ movhi
 	mov	fp, r0
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L209
+	cbnz	r0, .L208
 	strh	fp, [r6]	@ movhi
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	strb	r3, [r4, #7]
-.L209:
+.L208:
 	adds	r5, r5, #1
 	adds	r6, r6, #2
-	b	.L208
+	b	.L207
 .L212:
 	.align	2
 .L211:
@@ -1768,6 +1751,7 @@ make_superblock:
 	.word	.LC1
 	.word	.LANCHOR3
 	.word	.LANCHOR19
+	.word	.LANCHOR47
 	.word	.LANCHOR13
 	.size	make_superblock, .-make_superblock
 	.section	.text.update_multiplier_value,"ax",%progbits
@@ -1858,10 +1842,10 @@ GetFreeBlockMinEraseCount:
 .L225:
 	.align	2
 .L224:
-	.word	.LANCHOR47
+	.word	.LANCHOR46
 	.word	.LANCHOR40
 	.word	-1431655765
-	.word	.LANCHOR43
+	.word	.LANCHOR47
 	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
 	.section	.text.GetFreeBlockMaxEraseCount,"ax",%progbits
 	.align	1
@@ -1918,11 +1902,11 @@ GetFreeBlockMaxEraseCount:
 .L235:
 	.align	2
 .L234:
-	.word	.LANCHOR47
+	.word	.LANCHOR46
 	.word	.LANCHOR48
 	.word	.LANCHOR40
 	.word	-1431655765
-	.word	.LANCHOR43
+	.word	.LANCHOR47
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
 	.section	.text.free_data_superblock,"ax",%progbits
 	.align	1
@@ -1969,49 +1953,52 @@ get_new_active_ppa:
 	mov	r4, r0
 	cmp	r2, r3
 	bne	.L241
-	movw	r2, #2786
-	ldr	r1, .L254
-	ldr	r0, .L254+4
+	movw	r2, #2781
+	ldr	r1, .L255
+	ldr	r0, .L255+4
 	bl	printf
 .L241:
-	ldr	r5, .L254+8
+	ldr	r6, .L255+8
 	ldrh	r2, [r4, #2]
-	ldrh	r3, [r5]
+	ldrh	r3, [r6]
 	cmp	r2, r3
 	bne	.L242
-	movw	r2, #2787
-	ldr	r1, .L254
-	ldr	r0, .L254+4
+	movw	r2, #2782
+	ldr	r1, .L255
+	ldr	r0, .L255+4
 	bl	printf
 .L242:
 	ldrh	r3, [r4, #4]
 	cbnz	r3, .L243
-	movw	r2, #2788
-	ldr	r1, .L254
-	ldr	r0, .L254+4
+	movw	r2, #2783
+	ldr	r1, .L255
+	ldr	r0, .L255+4
 	bl	printf
 .L243:
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	movs	r3, #0
 	strb	r3, [r4, #10]
-	movw	r6, #65535
+	movw	r5, #65535
 	adds	r2, r2, #8
 	ldrh	r0, [r4, r2, lsl #1]
-	ldr	r2, .L254+12
+	ldr	r2, .L255+12
 	ldrh	r1, [r2]
 	mov	r2, r3
 .L244:
-	cmp	r0, r6
-	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	cmp	r0, r5
 	beq	.L246
+	ldrh	r5, [r4, #2]
+	ldrh	r6, [r6]
+	cmp	r5, r6
+	bcs	.L250
 	ldrh	r2, [r4, #4]
-	ldrh	r6, [r4, #2]
+	orr	r5, r5, r0, lsl #10
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	movw	r0, #65535
 	subs	r2, r2, #1
 	uxth	r2, r2
-	orr	r6, r6, r0, lsl #10
-	movw	r0, #65535
 	strh	r2, [r4, #4]	@ movhi
-.L248:
+.L249:
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r1, r3
@@ -2023,21 +2010,21 @@ get_new_active_ppa:
 	add	r7, r3, #8
 	ldrh	r7, [r4, r7, lsl #1]
 	cmp	r7, r0
-	beq	.L248
+	beq	.L249
 	strb	r3, [r4, #6]
-	ldrh	r1, [r4, #2]
-	ldrh	r3, [r5]
-	cmp	r1, r3
+	ldrh	r3, [r4, #2]
+	cmp	r3, r6
 	bne	.L240
 	cbz	r2, .L240
-	movw	r2, #2809
-	ldr	r1, .L254
-	ldr	r0, .L254+4
+	movw	r2, #2806
+	ldr	r1, .L255
+	ldr	r0, .L255+4
 	bl	printf
 .L240:
-	mov	r0, r6
+	mov	r0, r5
 	pop	{r3, r4, r5, r6, r7, pc}
 .L246:
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, r1
@@ -2051,9 +2038,12 @@ get_new_active_ppa:
 	adds	r3, r3, #8
 	ldrh	r0, [r4, r3, lsl #1]
 	b	.L244
-.L255:
+.L250:
+	movw	r5, #65535
+	b	.L240
+.L256:
 	.align	2
-.L254:
+.L255:
 	.word	.LANCHOR61
 	.word	.LC1
 	.word	.LANCHOR19
@@ -2072,54 +2062,54 @@ FtlGcBufInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #0
-	ldr	r1, .L261
+	ldr	r1, .L262
 	mov	fp, #1
-	ldr	r2, .L261+4
+	ldr	r2, .L262+4
 	ldr	r5, [r1]
-	ldr	r1, .L261+8
+	ldr	r1, .L262+8
 	str	r3, [r2]
-	ldr	r2, .L261+12
+	ldr	r2, .L262+12
 	mov	r0, r5
 	ldr	r1, [r1]
 	ldrh	r2, [r2]
 	str	r1, [sp, #4]
-	ldr	r1, .L261+16
+	ldr	r1, .L262+16
 	ldrh	r1, [r1]
 	str	r1, [sp]
-	ldr	r1, .L261+20
+	ldr	r1, .L262+20
 	ldr	r10, [r1]
-	ldr	r1, .L261+24
+	ldr	r1, .L262+24
 	ldrh	r7, [r1]
-	ldr	r1, .L261+28
+	ldr	r1, .L262+28
 	ldr	r4, [r1]
 	movs	r1, #12
 	mla	r1, r2, r1, r1
 	adds	r4, r4, #8
 	add	r8, r5, r1
 	mov	r1, r3
-.L257:
+.L258:
 	adds	r0, r0, #12
 	ldr	r6, [sp]
 	cmp	r0, r8
 	add	ip, r3, r7
 	add	r4, r4, #20
 	add	lr, r1, r6
-	bne	.L258
-	ldr	r3, .L261+32
+	bne	.L259
+	ldr	r3, .L262+32
 	mov	lr, #12
 	mov	r8, #0
 	ldr	r0, [r3]
-	ldr	r3, .L261+8
+	ldr	r3, .L262+8
 	ldr	r4, [r3]
-	ldr	r3, .L261+20
+	ldr	r3, .L262+20
 	ldr	ip, [r3]
-.L259:
+.L260:
 	cmp	r2, r0
-	bcc	.L260
+	bcc	.L261
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L258:
+.L259:
 	bic	r1, r1, #3
 	bic	r3, r3, #3
 	mov	r6, r1
@@ -2133,8 +2123,8 @@ FtlGcBufInit:
 	str	r3, [r4, #-16]
 	mov	r3, ip
 	str	r6, [r4, #-20]
-	b	.L257
-.L260:
+	b	.L258
+.L261:
 	ldr	r3, [sp]
 	mul	r10, lr, r2
 	muls	r3, r2, r3
@@ -2149,10 +2139,10 @@ FtlGcBufInit:
 	bic	r3, r3, #3
 	add	r3, r3, ip
 	str	r3, [r1, #4]
-	b	.L259
-.L262:
+	b	.L260
+.L263:
 	.align	2
-.L261:
+.L262:
 	.word	.LANCHOR63
 	.word	.LANCHOR62
 	.word	.LANCHOR64
@@ -2174,41 +2164,41 @@ FtlGcBufInit:
 FtlGcBufFree:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L270
+	ldr	r3, .L271
 	mov	ip, #12
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
 	mov	fp, #20
 	mov	lr, r4
 	ldr	r7, [r3]
-	ldr	r3, .L270+4
+	ldr	r3, .L271+4
 	ldr	r5, [r3]
-.L264:
+.L265:
 	uxth	r3, r4
 	cmp	r1, r3
-	bls	.L263
+	bls	.L264
 	mla	r8, fp, r3, r0
 	movs	r2, #0
-.L265:
+.L266:
 	uxth	r3, r2
 	cmp	r7, r3
-	bls	.L266
+	bls	.L267
 	mul	r3, ip, r3
 	ldr	r6, [r8, #8]
 	adds	r2, r2, #1
 	add	r10, r5, r3
 	ldr	r3, [r5, r3]
 	cmp	r3, r6
-	bne	.L265
+	bne	.L266
 	str	lr, [r10, #8]
-.L266:
+.L267:
 	adds	r4, r4, #1
-	b	.L264
-.L263:
+	b	.L265
+.L264:
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L271:
+.L272:
 	.align	2
-.L270:
+.L271:
 	.word	.LANCHOR67
 	.word	.LANCHOR63
 	.size	FtlGcBufFree, .-FtlGcBufFree
@@ -2223,43 +2213,43 @@ FtlGcBufFree:
 FtlGcBufAlloc:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L279
+	ldr	r3, .L280
 	movs	r2, #0
 	push	{r4, r5, r6, r7, r8, r10, lr}
 	mov	ip, #12
 	movs	r7, #1
 	mov	lr, #20
 	ldr	r4, [r3]
-	ldr	r3, .L279+4
+	ldr	r3, .L280+4
 	ldr	r5, [r3]
-.L273:
+.L274:
 	uxth	r8, r2
 	cmp	r1, r8
-	bhi	.L277
+	bhi	.L278
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L277:
+.L278:
 	mov	r10, #0
-.L274:
+.L275:
 	uxth	r3, r10
 	cmp	r4, r3
-	bls	.L275
+	bls	.L276
 	mla	r3, ip, r3, r5
 	add	r10, r10, #1
 	ldr	r6, [r3, #8]
 	cmp	r6, #0
-	bne	.L274
+	bne	.L275
 	mla	r8, lr, r8, r0
 	str	r7, [r3, #8]
 	ldr	r6, [r3]
 	ldr	r3, [r3, #4]
 	str	r6, [r8, #8]
 	str	r3, [r8, #12]
-.L275:
+.L276:
 	adds	r2, r2, #1
-	b	.L273
-.L280:
+	b	.L274
+.L281:
 	.align	2
-.L279:
+.L280:
 	.word	.LANCHOR67
 	.word	.LANCHOR63
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
@@ -2275,25 +2265,25 @@ IsBlkInGcList:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L286
-	ldr	r2, .L286+4
+	ldr	r3, .L287
+	ldr	r2, .L287+4
 	ldr	r3, [r3]
 	ldrh	r2, [r2]
 	add	r2, r3, r2, lsl #1
-.L282:
+.L283:
 	cmp	r3, r2
-	bne	.L284
+	bne	.L285
 	movs	r0, #0
 	bx	lr
-.L284:
+.L285:
 	ldrh	r1, [r3], #2
 	cmp	r1, r0
-	bne	.L282
+	bne	.L283
 	movs	r0, #1
 	bx	lr
-.L287:
+.L288:
 	.align	2
-.L286:
+.L287:
 	.word	.LANCHOR68
 	.word	.LANCHOR69
 	.size	IsBlkInGcList, .-IsBlkInGcList
@@ -2310,35 +2300,35 @@ FtlGcUpdatePage:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r5, r0
-	ldr	r4, .L292
+	ldr	r4, .L293
 	ubfx	r0, r0, #10, #16
 	mov	r6, r1
 	mov	r7, r2
 	bl	P2V_block_in_plane
-	ldr	r3, .L292+4
+	ldr	r3, .L293+4
 	ldrh	r1, [r4]
 	ldr	r2, [r3]
 	movs	r3, #0
-.L289:
+.L290:
 	uxth	ip, r3
 	cmp	ip, r1
-	bcc	.L291
-	bne	.L290
+	bcc	.L292
+	bne	.L291
 	strh	r0, [r2, ip, lsl #1]	@ movhi
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	b	.L290
-.L291:
+	b	.L291
+.L292:
 	adds	r3, r3, #1
 	add	ip, r2, r3, lsl #1
 	ldrh	ip, [ip, #-2]
 	cmp	ip, r0
-	bne	.L289
-.L290:
-	ldr	r2, .L292+8
+	bne	.L290
+.L291:
+	ldr	r2, .L293+8
 	movs	r0, #12
-	ldr	r1, .L292+12
+	ldr	r1, .L293+12
 	ldrh	r3, [r2]
 	ldr	r1, [r1]
 	muls	r0, r3, r0
@@ -2349,9 +2339,9 @@ FtlGcUpdatePage:
 	str	r5, [r1, r0]
 	strh	r3, [r2]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.L293:
+.L294:
 	.align	2
-.L292:
+.L293:
 	.word	.LANCHOR69
 	.word	.LANCHOR68
 	.word	.LANCHOR70
@@ -2369,29 +2359,29 @@ FtlGcRefreshBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, lr}
-	ldr	r4, .L297
+	ldr	r4, .L298
 	ldrh	r5, [r4]
 	cmp	r5, r0
-	beq	.L295
-	ldr	r3, .L297+4
+	beq	.L296
+	ldr	r3, .L298+4
 	ldrh	r1, [r3]
 	cmp	r0, r1
-	beq	.L295
+	beq	.L296
 	movw	r2, #65535
 	cmp	r5, r2
-	bne	.L296
+	bne	.L297
 	strh	r0, [r4]	@ movhi
-.L295:
+.L296:
 	movs	r0, #0
 	pop	{r4, r5, pc}
-.L296:
+.L297:
 	cmp	r1, r2
 	it	eq
 	strheq	r0, [r3]	@ movhi
-	b	.L295
-.L298:
+	b	.L296
+.L299:
 	.align	2
-.L297:
+.L298:
 	.word	.LANCHOR72
 	.word	.LANCHOR73
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
@@ -2410,33 +2400,33 @@ FtlGcMarkBadPhyBlk:
 	mov	r4, r0
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-	ldr	r2, .L303
+	ldr	r2, .L304
 	movs	r1, #0
-	ldr	r5, .L303+4
+	ldr	r5, .L304+4
 	ldrh	r3, [r2]
-.L300:
+.L301:
 	uxth	r0, r1
 	cmp	r3, r0
-	bhi	.L302
+	bhi	.L303
 	cmp	r3, #15
 	itttt	ls
 	addls	r1, r3, #1
 	strhls	r1, [r2]	@ movhi
-	ldrls	r2, .L303+4
+	ldrls	r2, .L304+4
 	strhls	r4, [r2, r3, lsl #1]	@ movhi
-	b	.L301
-.L302:
+	b	.L302
+.L303:
 	adds	r1, r1, #1
 	add	r0, r5, r1, lsl #1
 	ldrh	r0, [r0, #-2]
 	cmp	r0, r4
-	bne	.L300
-.L301:
+	bne	.L301
+.L302:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L304:
+.L305:
 	.align	2
-.L303:
+.L304:
 	.word	.LANCHOR74
 	.word	.LANCHOR75
 	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
@@ -2451,22 +2441,22 @@ FtlGcMarkBadPhyBlk:
 FtlGcReFreshBadBlk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L311
+	ldr	r3, .L312
 	push	{r4, lr}
 	ldrh	r3, [r3]
-	cbz	r3, .L306
-	ldr	r2, .L311+4
+	cbz	r3, .L307
+	ldr	r2, .L312+4
 	ldrh	r1, [r2]
 	movw	r2, #65535
 	cmp	r1, r2
-	bne	.L306
-	ldr	r4, .L311+8
+	bne	.L307
+	ldr	r4, .L312+8
 	ldrh	r2, [r4]
 	cmp	r2, r3
 	itt	cs
 	movcs	r3, #0
 	strhcs	r3, [r4]	@ movhi
-	ldr	r3, .L311+12
+	ldr	r3, .L312+12
 	ldrh	r2, [r4]
 	ldrh	r0, [r3, r2, lsl #1]
 	bl	P2V_block_in_plane
@@ -2474,12 +2464,12 @@ FtlGcReFreshBadBlk:
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-.L306:
+.L307:
 	movs	r0, #0
 	pop	{r4, pc}
-.L312:
+.L313:
 	.align	2
-.L311:
+.L312:
 	.word	.LANCHOR74
 	.word	.LANCHOR72
 	.word	.LANCHOR76
@@ -2533,48 +2523,48 @@ rknand_print_hex:
 	mov	r10, r3
 	mov	r5, r6
 	mov	r4, r6
-.L316:
+.L317:
 	cmp	r4, r10
-	bcc	.L322
-	ldr	r0, .L325
+	bcc	.L323
+	ldr	r0, .L326
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
 	b	printf
-.L322:
-	cbnz	r5, .L317
+.L323:
+	cbnz	r5, .L318
 	mov	r2, r6
 	mov	r1, fp
-	ldr	r0, .L325+4
+	ldr	r0, .L326+4
 	bl	printf
-.L317:
+.L318:
 	cmp	r8, #4
-	bne	.L318
+	bne	.L319
 	ldr	r1, [r7, r4, lsl #2]
+.L325:
+	ldr	r0, .L326+8
 .L324:
-	ldr	r0, .L325+8
-.L323:
 	adds	r5, r5, #1
 	bl	printf
 	cmp	r5, #15
-	bls	.L321
+	bls	.L322
 	movs	r5, #0
-	ldr	r0, .L325
+	ldr	r0, .L326
 	bl	printf
-.L321:
+.L322:
 	adds	r4, r4, #1
 	add	r6, r6, r8
-	b	.L316
-.L318:
+	b	.L317
+.L319:
 	cmp	r8, #2
-	bne	.L320
+	bne	.L321
 	ldrh	r1, [r7, r4, lsl #1]
-	b	.L324
-.L320:
+	b	.L325
+.L321:
 	ldrb	r1, [r7, r4]	@ zero_extendqisi2
-	ldr	r0, .L325+12
-	b	.L323
-.L326:
+	ldr	r0, .L326+12
+	b	.L324
+.L327:
 	.align	2
-.L325:
+.L326:
 	.word	.LC5
 	.word	.LC2
 	.word	.LC3
@@ -2593,41 +2583,41 @@ FlashEraseBlocks:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-	ldr	r6, .L343
+	ldr	r6, .L344
 	add	r8, r0, #4
 	movs	r7, #0
-	ldr	fp, .L343+20
+	ldr	fp, .L344+20
 	ldrh	r10, [r6, #12]
 	str	r2, [sp]
 	lsl	r3, r10, #3
 	str	r3, [sp, #4]
-.L328:
+.L329:
 	ldr	r3, [sp]
 	cmp	r7, r3
-	beq	.L342
+	beq	.L343
 	add	r2, sp, #8
 	add	r1, sp, #12
 	ldr	r0, [r8]
 	bl	l2p_addr_tran.isra.0
 	ldr	r5, [sp, #8]
-	cbnz	r5, .L329
+	cbnz	r5, .L330
 	ldr	r2, [sp, #12]
 	ldr	r3, [sp, #4]
 	cmp	r3, r2
-	bls	.L329
-	ldr	r6, .L343+4
-	ldr	r7, .L343+8
-.L330:
+	bls	.L330
+	ldr	r6, .L344+4
+	ldr	r7, .L344+8
+.L331:
 	ldr	r3, [sp]
 	adds	r4, r4, #20
 	cmp	r5, r3
-	bne	.L331
-.L342:
+	bne	.L332
+.L343:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L331:
+.L332:
 	mov	r3, #-1
 	ldr	r2, [sp, #12]
 	str	r3, [r4, #-20]
@@ -2638,44 +2628,44 @@ FlashEraseBlocks:
 	movs	r3, #16
 	movs	r2, #4
 	ldr	r1, [r4, #-12]
-	ldr	r0, .L343+12
+	ldr	r0, .L344+12
 	bl	rknand_print_hex
 	movs	r3, #4
 	ldr	r1, [r4, #-8]
 	mov	r2, r3
-	ldr	r0, .L343+16
+	ldr	r0, .L344+16
 	bl	rknand_print_hex
-	b	.L330
-.L329:
+	b	.L331
+.L330:
 	ldr	r2, [fp, #4]
 	uxtb	r0, r5
 	ldr	r1, [sp, #12]
 	blx	r2
-	cbnz	r0, .L332
+	cbnz	r0, .L333
 	str	r0, [r8, #-4]
-.L333:
+.L334:
 	ldrh	r2, [r6, #14]
 	cmp	r2, #4
-	bne	.L335
+	bne	.L336
 	ldr	r1, [sp, #12]
 	ldr	r2, [fp, #4]
 	ldrb	r0, [sp, #8]	@ zero_extendqisi2
 	add	r1, r1, r10
 	blx	r2
-	cbz	r0, .L335
+	cbz	r0, .L336
 	mov	r2, #-1
 	str	r2, [r8, #-4]
-.L335:
+.L336:
 	adds	r7, r7, #1
 	add	r8, r8, #20
-	b	.L328
-.L332:
+	b	.L329
+.L333:
 	mov	r2, #-1
 	str	r2, [r8, #-4]
-	b	.L333
-.L344:
+	b	.L334
+.L345:
 	.align	2
-.L343:
+.L344:
 	.word	.LANCHOR0
 	.word	.LANCHOR77
 	.word	.LC6
@@ -2700,14 +2690,14 @@ FtlFreeSysBlkQueueIn:
 	push	{r4, r5, r6, lr}
 	mov	r5, r0
 	cmp	r3, r2
-	bhi	.L345
-	ldr	r4, .L354
+	bhi	.L346
+	ldr	r4, .L355
 	ldrh	r3, [r4, #6]
 	cmp	r3, #1024
-	beq	.L345
-	cbz	r1, .L347
+	beq	.L346
+	cbz	r1, .L348
 	bl	P2V_block_in_plane
-	ldr	r3, .L354+4
+	ldr	r3, .L355+4
 	mov	r6, r0
 	movs	r2, #1
 	mov	r1, r2
@@ -2715,16 +2705,16 @@ FtlFreeSysBlkQueueIn:
 	lsls	r3, r5, #10
 	str	r3, [r0, #4]
 	bl	FlashEraseBlocks
-	ldr	r3, .L354+8
+	ldr	r3, .L355+8
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r6, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r6, lsl #1]	@ movhi
-	ldr	r2, .L354+12
+	ldr	r2, .L355+12
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
-.L347:
+.L348:
 	ldrh	r3, [r4, #6]
 	adds	r3, r3, #1
 	strh	r3, [r4, #6]	@ movhi
@@ -2734,14 +2724,14 @@ FtlFreeSysBlkQueueIn:
 	ubfx	r3, r3, #0, #10
 	strh	r5, [r4, r2, lsl #1]	@ movhi
 	strh	r3, [r4, #4]	@ movhi
-.L345:
+.L346:
 	pop	{r4, r5, r6, pc}
-.L355:
+.L356:
 	.align	2
-.L354:
+.L355:
 	.word	.LANCHOR38
 	.word	.LANCHOR79
-	.word	.LANCHOR43
+	.word	.LANCHOR47
 	.word	.LANCHOR80
 	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
 	.section	.text.FtlFreeSysBlkQueueOut,"ax",%progbits
@@ -2756,9 +2746,9 @@ FtlFreeSysBlkQueueOut:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	ldr	r4, .L361
+	ldr	r4, .L362
 	ldrh	r2, [r4, #6]
-	cbz	r2, .L360
+	cbz	r2, .L361
 	ldrh	r3, [r4, #2]
 	subs	r2, r2, #1
 	strh	r2, [r4, #6]	@ movhi
@@ -2769,36 +2759,36 @@ FtlFreeSysBlkQueueOut:
 	ldrh	r5, [r4, r1, lsl #1]
 	strh	r3, [r4, #2]	@ movhi
 	mov	r1, r2
-	ldr	r3, .L361+4
+	ldr	r3, .L362+4
 	ldr	r0, [r3]
 	lsls	r3, r5, #10
 	str	r3, [r0, #4]
 	bl	FlashEraseBlocks
-	ldr	r2, .L361+8
+	ldr	r2, .L362+8
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
-.L357:
+.L358:
 	subs	r3, r5, #1
 	movw	r2, #65533
 	uxth	r3, r3
 	cmp	r3, r2
-	bls	.L358
+	bls	.L359
 	ldrh	r2, [r4, #6]
 	mov	r1, r5
-	ldr	r0, .L361+12
+	ldr	r0, .L362+12
 	bl	printf
-.L359:
-	b	.L359
 .L360:
+	b	.L360
+.L361:
 	movw	r5, #65535
-	b	.L357
-.L358:
+	b	.L358
+.L359:
 	mov	r0, r5
 	pop	{r3, r4, r5, pc}
-.L362:
+.L363:
 	.align	2
-.L361:
+.L362:
 	.word	.LANCHOR38
 	.word	.LANCHOR79
 	.word	.LANCHOR80
@@ -2820,16 +2810,16 @@ ftl_map_blk_alloc_new_blk:
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r4, r0
 	movs	r3, #0
-.L364:
+.L365:
 	uxth	r5, r3
 	cmp	r5, r1
-	bcs	.L367
+	bcs	.L368
 	mov	r7, r2
 	adds	r3, r3, #1
 	ldrh	r6, [r7]
 	adds	r2, r2, #2
 	cmp	r6, #0
-	bne	.L364
+	bne	.L365
 	bl	FtlFreeSysBlkQueueOut
 	subs	r3, r0, #1
 	movw	r2, #65533
@@ -2837,14 +2827,14 @@ ftl_map_blk_alloc_new_blk:
 	mov	r1, r0
 	strh	r0, [r7]	@ movhi
 	cmp	r3, r2
-	bls	.L365
-	ldr	r3, .L371
-	ldr	r0, .L371+4
+	bls	.L366
+	ldr	r3, .L372
+	ldr	r0, .L372+4
 	ldrh	r2, [r3, #6]
 	bl	printf
+.L367:
+	b	.L367
 .L366:
-	b	.L366
-.L365:
 	ldr	r3, [r4, #28]
 	strh	r6, [r4, #2]	@ movhi
 	strh	r5, [r4]	@ movhi
@@ -2853,20 +2843,20 @@ ftl_map_blk_alloc_new_blk:
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-.L367:
+.L368:
 	ldrh	r3, [r4, #10]
 	cmp	r3, r5
-	bhi	.L369
+	bhi	.L370
 	movw	r2, #578
-	ldr	r1, .L371+8
-	ldr	r0, .L371+12
+	ldr	r1, .L372+8
+	ldr	r0, .L372+12
 	bl	printf
-.L369:
+.L370:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L372:
+.L373:
 	.align	2
-.L371:
+.L372:
 	.word	.LANCHOR38
 	.word	.LC10
 	.word	.LANCHOR81
@@ -2897,102 +2887,102 @@ ftl_memset:
 FtlMemInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L379
+	ldr	r3, .L380
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r2, .L379+4
+	ldr	r2, .L380+4
 	movs	r6, #12
 	str	r4, [r3]
-	ldr	r3, .L379+8
-	ldr	r5, .L379+12
-	ldr	r10, .L379+292
+	ldr	r3, .L380+8
+	ldr	r5, .L380+12
+	ldr	r10, .L380+292
 	str	r4, [r3]
-	ldr	r3, .L379+16
+	ldr	r3, .L380+16
 	ldrh	r0, [r5]
-	ldr	r8, .L379+296
+	ldr	r8, .L380+296
 	str	r4, [r3]
-	ldr	r3, .L379+20
+	ldr	r3, .L380+20
 	lsls	r0, r0, #1
-	ldr	fp, .L379+300
+	ldr	fp, .L380+300
 	str	r4, [r3]
-	ldr	r3, .L379+24
+	ldr	r3, .L380+24
 	str	r4, [r3]
-	ldr	r3, .L379+28
+	ldr	r3, .L380+28
 	str	r4, [r3]
-	ldr	r3, .L379+32
+	ldr	r3, .L380+32
 	str	r4, [r3]
-	ldr	r3, .L379+36
+	ldr	r3, .L380+36
 	str	r4, [r3]
-	ldr	r3, .L379+40
+	ldr	r3, .L380+40
 	str	r4, [r3]
-	ldr	r3, .L379+44
+	ldr	r3, .L380+44
 	str	r4, [r3]
-	ldr	r3, .L379+48
+	ldr	r3, .L380+48
 	str	r4, [r3]
-	ldr	r3, .L379+52
+	ldr	r3, .L380+52
 	str	r4, [r3]
-	ldr	r3, .L379+56
+	ldr	r3, .L380+56
 	str	r4, [r3]
-	ldr	r3, .L379+60
+	ldr	r3, .L380+60
 	str	r4, [r3]
-	ldr	r3, .L379+64
+	ldr	r3, .L380+64
 	str	r4, [r3]
 	movw	r3, #65535
 	str	r3, [r2]
-	ldr	r2, .L379+68
+	ldr	r2, .L380+68
 	str	r4, [r2]
-	ldr	r2, .L379+72
+	ldr	r2, .L380+72
 	str	r4, [r2]
-	ldr	r2, .L379+76
+	ldr	r2, .L380+76
 	str	r4, [r2]
-	ldr	r2, .L379+80
+	ldr	r2, .L380+80
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L379+84
+	ldr	r2, .L380+84
 	strh	r3, [r2]	@ movhi
 	movs	r2, #32
-	ldr	r3, .L379+88
+	ldr	r3, .L380+88
 	strh	r2, [r3]	@ movhi
 	movs	r2, #128
-	ldr	r3, .L379+92
+	ldr	r3, .L380+92
 	strh	r2, [r3]	@ movhi
-	ldr	r3, .L379+96
+	ldr	r3, .L380+96
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L379+100
+	ldr	r3, .L380+100
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L379+104
+	ldr	r3, .L380+104
 	strh	r4, [r3]	@ movhi
 	bl	ftl_malloc
-	ldr	r3, .L379+108
+	ldr	r3, .L380+108
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	movs	r5, #20
 	muls	r0, r6, r0
 	bl	ftl_malloc
-	ldr	r3, .L379+112
+	ldr	r3, .L380+112
 	str	r0, [r3]
 	ldrh	r3, [r10]
 	muls	r5, r3, r5
 	lsls	r7, r5, #2
 	mov	r0, r7
 	bl	ftl_malloc
-	ldr	r3, .L379+116
+	ldr	r3, .L380+116
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L379+120
+	ldr	r3, .L380+120
 	str	r0, [r3]
 	mov	r0, r7
 	bl	ftl_malloc
-	ldr	r3, .L379+124
-	ldr	r7, .L379+128
+	ldr	r3, .L380+124
+	ldr	r7, .L380+128
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L379+132
+	ldr	r3, .L380+132
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L379+136
+	ldr	r3, .L380+136
 	ldrh	r5, [r7]
 	str	r0, [r3]
 	ldrh	r3, [r10]
@@ -3001,166 +2991,166 @@ FtlMemInit:
 	adds	r3, r3, #1
 	str	r3, [r8]
 	bl	ftl_malloc
-	ldr	r3, .L379+140
+	ldr	r3, .L380+140
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L379+144
+	ldr	r3, .L380+144
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L379+148
+	ldr	r3, .L380+148
 	str	r0, [r3]
 	ldr	r0, [r8]
 	muls	r0, r5, r0
 	bl	ftl_malloc
-	ldr	r3, .L379+152
+	ldr	r3, .L380+152
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L379+156
+	ldr	r3, .L380+156
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L379+160
+	ldr	r3, .L380+160
 	str	r0, [r3]
 	ldr	r0, [r8]
 	muls	r0, r6, r0
 	bl	ftl_malloc
-	ldr	r3, .L379+164
+	ldr	r3, .L380+164
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L379+168
+	ldr	r3, .L380+168
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L379+172
+	ldr	r3, .L380+172
 	str	r0, [r3]
-	ldr	r3, .L379+176
+	ldr	r3, .L380+176
 	ldrh	r0, [r3]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L379+180
+	ldr	r3, .L380+180
 	ldrh	r5, [r10]
-	ldr	r10, .L379+304
+	ldr	r10, .L380+304
 	str	r0, [r3]
 	ldrh	r3, [fp]
 	muls	r5, r3, r5
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L379+184
+	ldr	r3, .L380+184
 	str	r0, [r3]
 	lsls	r0, r5, #2
-	ldr	r5, .L379+188
+	ldr	r5, .L380+188
 	bl	ftl_malloc
-	ldr	r3, .L379+192
+	ldr	r3, .L380+192
 	str	r0, [r3]
 	ldrh	r3, [fp]
 	ldr	r0, [r8]
-	ldr	r8, .L379+308
+	ldr	r8, .L380+308
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L379+196
+	ldr	r3, .L380+196
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	uxth	r0, r0
 	strh	r0, [r8]	@ movhi
 	bl	ftl_malloc
-	ldr	r3, .L379+200
+	ldr	r3, .L380+200
 	str	r0, [r3]
 	ldrh	r3, [r8]
-	ldr	r0, .L379+204
+	ldr	r0, .L380+204
 	addw	r3, r3, #547
 	lsrs	r3, r3, #9
 	and	r0, r0, r3, lsl #9
 	strh	r3, [r8]	@ movhi
 	bl	ftl_malloc
-	ldr	r3, .L379+208
+	ldr	r3, .L380+208
 	str	r0, [r3]
 	adds	r0, r0, #32
-	ldr	r3, .L379+212
+	ldr	r3, .L380+212
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L379+216
+	ldr	r3, .L380+216
 	str	r0, [r3]
 	ldr	r3, [r10]
 	lsl	r8, r3, #1
 	mov	r0, r8
 	bl	ftl_malloc
-	ldr	r3, .L379+220
+	ldr	r3, .L380+220
 	str	r0, [r3]
 	mov	r0, r8
 	bl	ftl_malloc
-	ldr	r3, .L379+224
-	ldr	r8, .L379+312
+	ldr	r3, .L380+224
+	ldr	r8, .L380+312
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	lsrs	r0, r0, #3
 	adds	r0, r0, #4
 	bl	ftl_malloc
-	ldr	r3, .L379+228
+	ldr	r3, .L380+228
 	str	r0, [r3]
 	ldrh	r0, [r8]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L379+232
+	ldr	r3, .L380+232
 	str	r0, [r3]
 	ldrh	r0, [r8]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L379+236
+	ldr	r3, .L380+236
 	str	r0, [r3]
 	ldrh	r0, [r8]
-	ldr	r8, .L379+316
+	ldr	r8, .L380+316
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L379+240
+	ldr	r3, .L380+240
 	str	r0, [r3]
 	ldrh	r0, [r8]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
 	ldrh	r2, [r8]
 	mov	r1, r4
-	ldr	r3, .L379+244
-	ldr	r4, .L379+248
+	ldr	r3, .L380+244
+	ldr	r4, .L380+248
 	lsls	r2, r2, #2
 	str	r0, [r3]
 	bl	ftl_memset
-	ldr	r3, .L379+252
+	ldr	r3, .L380+252
 	ldrh	r0, [r3]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L379+256
+	ldr	r3, .L380+256
 	str	r0, [r3]
 	ldr	r0, [r10]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L379+260
+	ldr	r3, .L380+260
 	str	r0, [r3]
 	ldrh	r0, [r4]
 	muls	r0, r6, r0
-	ldr	r6, .L379+264
+	ldr	r6, .L380+264
 	bl	ftl_malloc
-	ldr	r3, .L379+268
+	ldr	r3, .L380+268
 	str	r0, [r3]
 	ldrh	r3, [r4]
 	ldrh	r0, [r7]
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L379+272
+	ldr	r3, .L380+272
 	str	r0, [r3]
 	movs	r0, #6
 	ldrh	r3, [r5]
-	ldr	r5, .L379+276
+	ldr	r5, .L380+276
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L379+280
+	ldr	r3, .L380+280
 	str	r0, [r3]
-	ldr	r3, .L379+284
+	ldr	r3, .L380+284
 	ldrh	r0, [r3]
 	ldrh	r3, [r6]
 	adds	r0, r0, #31
@@ -3171,16 +3161,16 @@ FtlMemInit:
 	bl	ftl_malloc
 	ldrh	r1, [r5]
 	movs	r2, #1
-	ldr	r3, .L379+288
+	ldr	r3, .L380+288
 	ldrh	r6, [r6]
 	lsls	r1, r1, #2
 	mov	r4, r3
 	str	r0, [r4, #28]!
 	mov	r0, r1
-	b	.L380
-.L381:
+	b	.L381
+.L382:
 	.align	2
-.L379:
+.L380:
 	.word	.LANCHOR82
 	.word	.LANCHOR96
 	.word	.LANCHOR83
@@ -3234,7 +3224,7 @@ FtlMemInit:
 	.word	.LANCHOR117
 	.word	33553920
 	.word	.LANCHOR118
-	.word	.LANCHOR43
+	.word	.LANCHOR47
 	.word	.LANCHOR42
 	.word	.LANCHOR119
 	.word	.LANCHOR120
@@ -3261,32 +3251,32 @@ FtlMemInit:
 	.word	.LANCHOR116
 	.word	.LANCHOR27
 	.word	.LANCHOR28
-.L380:
-.L375:
+.L381:
+.L376:
 	cmp	r2, r6
-	bcc	.L376
+	bcc	.L377
 	add	r3, r3, r2, lsl #2
-	ldr	r2, .L382
+	ldr	r2, .L383
 	movs	r1, #0
 	adds	r3, r3, #24
-.L377:
+.L378:
 	cmp	r3, r2
-	bne	.L378
+	bne	.L379
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L376:
+.L377:
 	ldr	r5, [r3, #28]
 	adds	r2, r2, #1
 	add	r5, r5, r0
 	add	r0, r0, r1
 	str	r5, [r4, #4]!
-	b	.L375
-.L378:
+	b	.L376
+.L379:
 	str	r1, [r3, #4]!
-	b	.L377
-.L383:
+	b	.L378
+.L384:
 	.align	2
-.L382:
+.L383:
 	.word	.LANCHOR37+56
 	.size	FtlMemInit, .-FtlMemInit
 	.section	.text.FtlBbt2Bitmap,"ax",%progbits
@@ -3300,32 +3290,32 @@ FtlMemInit:
 FtlBbt2Bitmap:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L390
+	ldr	r3, .L391
 	push	{r4, r5, r6, r7, r8, lr}
 	mov	r5, r0
-	ldr	r7, .L390+4
+	ldr	r7, .L391+4
 	mov	r6, r1
 	subs	r4, r5, #2
 	addw	r5, r5, #1022
 	ldrh	r2, [r3]
 	movs	r1, #0
-	ldr	r8, .L390+12
+	ldr	r8, .L391+12
 	mov	r0, r6
 	lsls	r2, r2, #2
 	bl	ftl_memset
-.L387:
+.L388:
 	ldrh	r3, [r4, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L384
+	beq	.L385
 	ldrh	r2, [r7]
 	cmp	r2, r3
-	bhi	.L386
+	bhi	.L387
 	movs	r2, #74
 	mov	r1, r8
-	ldr	r0, .L390+8
+	ldr	r0, .L391+8
 	bl	printf
-.L386:
+.L387:
 	ldrh	r3, [r4, #2]!
 	movs	r2, #1
 	cmp	r5, r4
@@ -3335,12 +3325,12 @@ FtlBbt2Bitmap:
 	ldr	r2, [r6, r1, lsl #2]
 	orr	r2, r2, r3
 	str	r2, [r6, r1, lsl #2]
-	bne	.L387
-.L384:
+	bne	.L388
+.L385:
 	pop	{r4, r5, r6, r7, r8, pc}
-.L391:
+.L392:
 	.align	2
-.L390:
+.L391:
 	.word	.LANCHOR127
 	.word	.LANCHOR17
 	.word	.LC1
@@ -3358,7 +3348,7 @@ FtlBbtMemInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r0, .L393
+	ldr	r0, .L394
 	movw	r3, #65535
 	movs	r2, #16
 	movs	r1, #255
@@ -3367,9 +3357,9 @@ FtlBbtMemInit:
 	strh	r3, [r0, #6]	@ movhi
 	adds	r0, r0, #12
 	b	ftl_memset
-.L394:
+.L395:
 	.align	2
-.L393:
+.L394:
 	.word	.LANCHOR37
 	.size	FtlBbtMemInit, .-FtlBbtMemInit
 	.section	.text.FtlFreeSysBlkQueueInit,"ax",%progbits
@@ -3383,7 +3373,7 @@ FtlBbtMemInit:
 FtlFreeSysBlkQueueInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L396
+	ldr	r3, .L397
 	mov	r2, #2048
 	push	{r4, lr}
 	movs	r4, #0
@@ -3396,9 +3386,9 @@ FtlFreeSysBlkQueueInit:
 	bl	ftl_memset
 	mov	r0, r4
 	pop	{r4, pc}
-.L397:
+.L398:
 	.align	2
-.L396:
+.L397:
 	.word	.LANCHOR38
 	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
 	.section	.text.ftl_free_no_use_map_blk,"ax",%progbits
@@ -3423,12 +3413,12 @@ ftl_free_no_use_map_blk:
 	mov	r0, r5
 	bl	ftl_memset
 	movs	r3, #0
-.L399:
+.L400:
 	ldrh	r1, [r4, #6]
 	uxth	r2, r3
 	cmp	r1, r2
-	bhi	.L403
-	ldr	r3, .L418
+	bhi	.L404
+	ldr	r3, .L419
 	movs	r6, #0
 	mov	r10, r6
 	ldrh	r2, [r3]
@@ -3436,59 +3426,59 @@ ftl_free_no_use_map_blk:
 	strh	r2, [r5, r3, lsl #1]	@ movhi
 	mov	r2, r6
 	ldrh	fp, [r5]
-.L404:
+.L405:
 	ldrh	r3, [r4, #10]
 	uxth	ip, r6
 	cmp	r3, ip
-	bhi	.L408
+	bhi	.L409
 	mov	r0, r10
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L403:
+.L404:
 	uxth	r2, r3
 	ldr	r1, [r6, r2, lsl #2]
 	movs	r2, #0
 	ubfx	r1, r1, #10, #16
-.L400:
+.L401:
 	ldrh	ip, [r4, #10]
 	uxth	r0, r2
 	cmp	ip, r0
-	bhi	.L402
+	bhi	.L403
 	adds	r3, r3, #1
-	b	.L399
-.L402:
+	b	.L400
+.L403:
 	uxth	r0, r2
 	ldrh	ip, [r7, r0, lsl #1]
 	cmp	ip, r1
-	bne	.L401
-	cbz	r1, .L401
+	bne	.L402
+	cbz	r1, .L402
 	ldrh	ip, [r5, r0, lsl #1]
 	add	ip, ip, #1
 	strh	ip, [r5, r0, lsl #1]	@ movhi
-.L401:
+.L402:
 	adds	r2, r2, #1
-	b	.L400
-.L408:
+	b	.L401
+.L409:
 	uxth	r1, r6
 	ldrh	r3, [r5, r1, lsl #1]
 	lsl	r8, r1, #1
 	cmp	fp, r3
-	bls	.L405
+	bls	.L406
 	ldrh	r0, [r7, r1, lsl #1]
 	add	r8, r8, r7
-	cbnz	r0, .L406
-.L407:
+	cbnz	r0, .L407
+.L408:
 	adds	r6, r6, #1
-	b	.L404
-.L405:
+	b	.L405
+.L406:
 	cmp	r3, #0
-	bne	.L407
+	bne	.L408
 	ldrh	r0, [r7, r1, lsl #1]
 	add	r8, r8, r7
 	cmp	r0, #0
-	beq	.L407
-.L409:
+	beq	.L408
+.L410:
 	movs	r1, #1
 	str	r2, [sp, #4]
 	bl	FtlFreeSysBlkQueueIn
@@ -3497,16 +3487,16 @@ ftl_free_no_use_map_blk:
 	ldrh	r3, [r4, #8]
 	subs	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	b	.L407
-.L406:
+	b	.L408
+.L407:
 	mov	r10, ip
 	mov	fp, r3
 	cmp	r3, #0
-	beq	.L409
-	b	.L407
-.L419:
+	beq	.L410
+	b	.L408
+.L420:
 	.align	2
-.L418:
+.L419:
 	.word	.LANCHOR20
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.section	.text.FtlL2PDataInit,"ax",%progbits
@@ -3522,14 +3512,14 @@ FtlL2PDataInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r1, #0
-	ldr	r5, .L423
-	ldr	r4, .L423+4
+	ldr	r5, .L424
+	ldr	r4, .L424+4
 	ldr	r2, [r5]
-	ldr	r7, .L423+8
-	ldr	r6, .L423+12
+	ldr	r7, .L424+8
+	ldr	r6, .L424+12
 	ldr	r0, [r4]
 	lsls	r2, r2, #1
-	ldr	r8, .L423+44
+	ldr	r8, .L424+44
 	bl	ftl_memset
 	ldrh	r3, [r7]
 	movs	r1, #255
@@ -3537,7 +3527,7 @@ FtlL2PDataInit:
 	ldr	r0, [r8]
 	muls	r2, r3, r2
 	bl	ftl_memset
-	ldr	r3, .L423+16
+	ldr	r3, .L424+16
 	movw	r0, #65535
 	ldrh	r1, [r6]
 	ldr	ip, [r8]
@@ -3548,47 +3538,47 @@ FtlL2PDataInit:
 	adds	r1, r2, r3
 	movs	r3, #0
 	mov	lr, r3
-.L421:
+.L422:
 	adds	r2, r2, #12
 	adds	r6, r3, r7
 	cmp	r2, r1
-	bne	.L422
-	ldr	r3, .L423+20
+	bne	.L423
+	ldr	r3, .L424+20
 	ldr	r2, [r5]
 	strh	r0, [r3, #2]	@ movhi
 	strh	r2, [r3, #10]	@ movhi
 	movw	r2, #61634
 	strh	r2, [r3, #4]	@ movhi
-	ldr	r2, .L423+24
+	ldr	r2, .L424+24
 	strh	r0, [r3]	@ movhi
 	ldrh	r2, [r2]
 	strh	r2, [r3, #8]	@ movhi
-	ldr	r2, .L423+28
+	ldr	r2, .L424+28
 	ldrh	r2, [r2]
 	strh	r2, [r3, #6]	@ movhi
-	ldr	r2, .L423+32
+	ldr	r2, .L424+32
 	ldr	r2, [r2]
 	str	r2, [r3, #12]
-	ldr	r2, .L423+36
+	ldr	r2, .L424+36
 	ldr	r2, [r2]
 	str	r2, [r3, #16]
 	ldr	r2, [r4]
 	str	r2, [r3, #20]
-	ldr	r2, .L423+40
+	ldr	r2, .L424+40
 	ldr	r2, [r2]
 	str	r2, [r3, #24]
 	pop	{r4, r5, r6, r7, r8, pc}
-.L422:
+.L423:
 	bic	r3, r3, #3
 	str	lr, [r2, #-8]
 	add	r3, r3, ip
 	strh	r0, [r2, #-12]	@ movhi
 	str	r3, [r2, #-4]
 	mov	r3, r6
-	b	.L421
-.L424:
+	b	.L422
+.L425:
 	.align	2
-.L423:
+.L424:
 	.word	.LANCHOR30
 	.word	.LANCHOR120
 	.word	.LANCHOR23
@@ -3615,53 +3605,53 @@ FtlVariablesInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movw	r2, #65535
-	ldr	r3, .L426
+	ldr	r3, .L427
 	movs	r4, #0
 	mov	r1, r4
-	ldr	r5, .L426+4
+	ldr	r5, .L427+4
 	strh	r2, [r3]	@ movhi
 	mov	r2, #-1
-	ldr	r3, .L426+8
+	ldr	r3, .L427+8
 	str	r4, [r3]
-	ldr	r3, .L426+12
+	ldr	r3, .L427+12
 	str	r4, [r3]
-	ldr	r3, .L426+16
+	ldr	r3, .L427+16
 	str	r2, [r3]
-	ldr	r3, .L426+20
+	ldr	r3, .L427+20
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L426+24
+	ldr	r3, .L427+24
 	ldrh	r2, [r3]
-	ldr	r3, .L426+28
+	ldr	r3, .L427+28
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L426+32
+	ldr	r3, .L427+32
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L426+36
+	ldr	r3, .L427+36
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	mov	r1, r4
 	movs	r2, #48
-	ldr	r0, .L426+40
+	ldr	r0, .L427+40
 	bl	ftl_memset
 	mov	r2, #512
 	mov	r1, r4
-	ldr	r0, .L426+44
+	ldr	r0, .L427+44
 	bl	ftl_memset
 	bl	FtlGcBufInit
 	bl	FtlL2PDataInit
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L427:
+.L428:
 	.align	2
-.L426:
+.L427:
 	.word	.LANCHOR131
 	.word	.LANCHOR6
 	.word	.LANCHOR132
@@ -3670,7 +3660,7 @@ FtlVariablesInit:
 	.word	.LANCHOR35
 	.word	.LANCHOR27
 	.word	.LANCHOR36
-	.word	.LANCHOR43
+	.word	.LANCHOR47
 	.word	.LANCHOR117
 	.word	.LANCHOR39
 	.word	.LANCHOR135
@@ -3688,10 +3678,10 @@ SupperBlkListInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r2, #6
-	ldr	r3, .L439
+	ldr	r3, .L440
 	movs	r1, #0
 	movs	r4, #0
-	ldr	r6, .L439+4
+	ldr	r6, .L440+4
 	mov	r8, r4
 	ldrh	r3, [r3]
 	mov	r5, r4
@@ -3699,125 +3689,125 @@ SupperBlkListInit:
 	mov	r10, r6
 	muls	r2, r3, r2
 	bl	ftl_memset
-	ldr	r3, .L439+8
-	ldr	r2, .L439+12
+	ldr	r3, .L440+8
+	ldr	r2, .L440+12
 	str	r4, [r3]
-	ldr	r3, .L439+16
+	ldr	r3, .L440+16
 	strh	r4, [r2]	@ movhi
 	str	r2, [sp, #4]
 	str	r4, [r3]
-	ldr	r3, .L439+20
+	ldr	r3, .L440+20
 	str	r4, [r3]
-	ldr	r3, .L439+24
+	ldr	r3, .L440+24
 	mov	fp, r3
 	strh	r4, [r3]	@ movhi
-.L429:
-	ldr	r3, .L439+28
+.L430:
+	ldr	r3, .L440+28
 	uxth	r7, r4
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	bcs	.L436
-	ldr	r3, .L439+32
+	bcs	.L437
+	ldr	r3, .L440+32
 	ldrh	r2, [r3]
-	ldr	r3, .L439+36
+	ldr	r3, .L440+36
 	ldrh	r3, [r3]
 	str	r3, [sp]
 	movs	r3, #0
 	mov	r6, r3
-	b	.L437
-.L431:
+	b	.L438
+.L432:
 	str	r2, [sp, #12]
 	mov	r1, r7
-	ldr	r2, .L439+40
+	ldr	r2, .L440+40
 	str	r3, [sp, #8]
 	ldrb	r0, [r2, r3]	@ zero_extendqisi2
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #12]
-	cbnz	r0, .L430
+	cbnz	r0, .L431
 	ldr	r1, [sp]
 	add	r6, r6, r1
 	uxth	r6, r6
-.L430:
+.L431:
 	adds	r3, r3, #1
-.L437:
+.L438:
 	uxth	r1, r3
 	cmp	r2, r1
-	bhi	.L431
+	bhi	.L432
 	uxth	r3, r4
-	cbz	r6, .L432
+	cbz	r6, .L433
 	mov	r1, r6
 	str	r3, [sp]
 	mov	r0, #32768
 	bl	__aeabi_idiv
 	ldr	r3, [sp]
 	uxth	r6, r0
-.L433:
+.L434:
 	ldr	r1, [r10]
 	movs	r2, #6
 	mla	r2, r2, r3, r1
 	strh	r6, [r2, #4]	@ movhi
-	ldr	r2, .L439+44
+	ldr	r2, .L440+44
 	ldrh	r2, [r2]
 	cmp	r2, r7
-	beq	.L434
-	ldr	r2, .L439+48
+	beq	.L435
+	ldr	r2, .L440+48
 	ldrh	r2, [r2]
 	cmp	r2, r7
-	beq	.L434
-	ldr	r2, .L439+52
+	beq	.L435
+	ldr	r2, .L440+52
 	ldrh	r2, [r2]
 	cmp	r2, r7
-	beq	.L434
-	ldr	r2, .L439+56
+	beq	.L435
+	ldr	r2, .L440+56
 	ldr	r2, [r2]
 	ldrh	r3, [r2, r3, lsl #1]
-	cbnz	r3, .L435
+	cbnz	r3, .L436
 	add	r8, r8, #1
 	mov	r0, r7
 	uxth	r8, r8
 	bl	INSERT_FREE_LIST
-.L434:
+.L435:
 	adds	r4, r4, #1
-	b	.L429
-.L432:
-	ldr	r2, .L439+56
+	b	.L430
+.L433:
+	ldr	r2, .L440+56
 	movw	r1, #65535
 	ldr	r2, [r2]
 	strh	r1, [r2, r3, lsl #1]	@ movhi
-	b	.L433
-.L435:
+	b	.L434
+.L436:
 	adds	r5, r5, #1
 	mov	r0, r7
 	uxth	r5, r5
 	bl	INSERT_DATA_LIST
-	b	.L434
-.L436:
+	b	.L435
+.L437:
 	ldr	r2, [sp, #4]
 	strh	r8, [fp]	@ movhi
 	strh	r5, [r2]	@ movhi
 	add	r5, r5, r8
 	cmp	r5, r3
-	ble	.L438
-	movw	r2, #2216
-	ldr	r1, .L439+60
-	ldr	r0, .L439+64
+	ble	.L439
+	movw	r2, #2210
+	ldr	r1, .L440+60
+	ldr	r0, .L440+64
 	bl	printf
-.L438:
+.L439:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L440:
+.L441:
 	.align	2
-.L439:
+.L440:
 	.word	.LANCHOR6
 	.word	.LANCHOR40
-	.word	.LANCHOR47
-	.word	.LANCHOR45
-	.word	.LANCHOR41
+	.word	.LANCHOR46
 	.word	.LANCHOR44
+	.word	.LANCHOR41
+	.word	.LANCHOR43
 	.word	.LANCHOR48
 	.word	.LANCHOR5
 	.word	.LANCHOR3
@@ -3841,16 +3831,16 @@ SupperBlkListInit:
 FtlGcPageVarInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L442
+	ldr	r2, .L443
 	movs	r3, #0
 	push	{r4, lr}
 	movs	r1, #255
-	ldr	r4, .L442+4
+	ldr	r4, .L443+4
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L442+8
+	ldr	r2, .L443+8
 	strh	r3, [r2]	@ movhi
 	ldrh	r2, [r4]
-	ldr	r3, .L442+12
+	ldr	r3, .L443+12
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
@@ -3858,14 +3848,14 @@ FtlGcPageVarInit:
 	movs	r2, #12
 	movs	r1, #255
 	muls	r2, r3, r2
-	ldr	r3, .L442+16
+	ldr	r3, .L443+16
 	ldr	r0, [r3]
 	bl	ftl_memset
 	pop	{r4, lr}
 	b	FtlGcBufInit
-.L443:
+.L444:
 	.align	2
-.L442:
+.L443:
 	.word	.LANCHOR69
 	.word	.LANCHOR21
 	.word	.LANCHOR70
@@ -3889,39 +3879,39 @@ FlashGetBadBlockList:
 	movs	r1, #255
 	mov	r4, r0
 	bl	ftl_memset
-	ldr	r3, .L451
+	ldr	r3, .L452
 	mov	r1, r5
 	mov	r0, r4
 	ldr	r3, [r3]
 	blx	r3
 	uxth	r0, r0
 	cmp	r0, #50
-	bls	.L445
+	bls	.L446
 	mov	r2, #256
 	movs	r1, #255
 	mov	r0, r4
 	bl	ftl_memset
 	movs	r0, #0
-.L445:
-	ldr	r3, .L451+4
+.L446:
+	ldr	r3, .L452+4
 	ldrh	r3, [r3, #14]
 	cmp	r3, #4
-	bne	.L450
+	bne	.L451
 	add	r1, r4, r0, lsl #1
 	mov	r3, r4
-.L447:
+.L448:
 	cmp	r3, r1
-	bne	.L448
-.L450:
+	bne	.L449
+.L451:
 	pop	{r3, r4, r5, pc}
-.L448:
+.L449:
 	ldrh	r2, [r3]
 	lsrs	r2, r2, #1
 	strh	r2, [r3], #2	@ movhi
-	b	.L447
-.L452:
+	b	.L448
+.L453:
 	.align	2
-.L451:
+.L452:
 	.word	.LANCHOR78
 	.word	.LANCHOR0
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
@@ -3952,48 +3942,48 @@ FlashReadPages:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	fp, r1
-	ldr	r3, .L482
+	ldr	r3, .L495
 	mov	r4, r0
 	mov	r10, #0
 	ldrh	r2, [r3, #12]
 	str	r3, [sp, #4]
 	str	r2, [sp]
-.L455:
+.L456:
 	cmp	r10, fp
-	bne	.L466
+	bne	.L470
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L466:
+.L470:
 	ldr	r3, [r4, #8]
-	cbz	r3, .L456
+	cbz	r3, .L457
 	ldr	r3, [r4, #12]
-	cbnz	r3, .L457
-.L456:
+	cbnz	r3, .L458
+.L457:
 	movs	r2, #90
-	ldr	r1, .L482+4
-	ldr	r0, .L482+8
+	ldr	r1, .L495+4
+	ldr	r0, .L495+8
 	bl	printf
-.L457:
+.L458:
 	add	r2, sp, #8
 	add	r1, sp, #12
 	ldr	r0, [r4, #4]
 	bl	l2p_addr_tran.isra.0
 	ldr	r0, [sp, #8]
 	cmp	r0, #3
-	bls	.L458
+	bls	.L459
 	mov	r3, #-1
 	str	r3, [r4]
-.L459:
+.L460:
 	add	r10, r10, #1
 	adds	r4, r4, #20
-	b	.L455
-.L458:
+	b	.L456
+.L459:
 	ldr	r5, [r4, #8]
 	uxtb	r0, r0
-	ldr	r8, .L482+20
-	ldr	r7, .L482+12
+	ldr	r8, .L495+32
+	ldr	r7, .L495+12
 	tst	r5, #63
 	ldr	r3, [r4, #12]
 	it	ne
@@ -4006,7 +3996,7 @@ FlashReadPages:
 	str	r0, [r4]
 	ldrh	r3, [r3, #14]
 	cmp	r3, #4
-	bne	.L462
+	bne	.L463
 	ldr	r0, [sp]
 	add	r2, r5, #2048
 	ldr	r3, [r4, #12]
@@ -4016,48 +4006,75 @@ FlashReadPages:
 	add	r1, r1, r0
 	ldrb	r0, [sp, #8]	@ zero_extendqisi2
 	blx	r7
-	adds	r3, r0, #1
-	beq	.L463
+	adds	r1, r0, #1
+	beq	.L464
 	ldr	r3, [r4, #12]
 	ldr	r2, [r3, #12]
 	adds	r2, r2, #1
-	bne	.L464
+	bne	.L465
 	ldr	r2, [r3, #8]
 	adds	r2, r2, #1
-	bne	.L464
+	bne	.L465
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L464
-.L463:
+	beq	.L465
+.L464:
 	mov	r3, #-1
 	str	r3, [r4]
-.L464:
+.L465:
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L462
+	beq	.L466
 	cmp	r0, #256
 	it	eq
 	streq	r0, [r4]
-.L462:
+.L466:
+	ldr	r3, [r4]
+	adds	r2, r3, #1
+	beq	.L467
+	cmp	r3, #256
+	bne	.L463
+.L467:
+	ldr	r1, [r4, #4]
+	ldr	r2, [sp, #12]
+	ldr	r0, .L495+16
+	bl	printf
+	ldr	r1, [r4, #8]
+	cbz	r1, .L469
+	movs	r3, #4
+	ldr	r0, .L495+20
+	mov	r2, r3
+	bl	rknand_print_hex
+.L469:
+	ldr	r1, [r4, #12]
+	cbz	r1, .L463
+	movs	r3, #4
+	ldr	r0, .L495+24
+	mov	r2, r3
+	bl	rknand_print_hex
+.L463:
 	ldr	r3, [r8]
 	cmp	r5, r3
-	bne	.L459
+	bne	.L460
 	ldr	r0, [r4, #8]
 	cmp	r5, r0
-	beq	.L459
-	ldr	r3, .L482+16
+	beq	.L460
+	ldr	r3, .L495+28
 	mov	r1, r5
 	ldrh	r2, [r3]
 	lsls	r2, r2, #9
 	bl	ftl_memcpy
-	b	.L459
-.L483:
+	b	.L460
+.L496:
 	.align	2
-.L482:
+.L495:
 	.word	.LANCHOR0
 	.word	.LANCHOR137
 	.word	.LC1
 	.word	.LANCHOR78
+	.word	.LC11
+	.word	.LC12
+	.word	.LC13
 	.word	.LANCHOR12
 	.word	.LANCHOR111
 	.size	FlashReadPages, .-FlashReadPages
@@ -4072,36 +4089,36 @@ FlashReadPages:
 FtlLoadFactoryBbt:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L494
+	ldr	r3, .L507
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r6, #0
-	ldr	r5, .L494+4
+	ldr	r5, .L507+4
 	ldr	r3, [r3]
-	ldr	r7, .L494+8
-	ldr	r10, .L494+20
+	ldr	r7, .L507+8
+	ldr	r10, .L507+20
 	str	r3, [r5, #8]
-	ldr	r3, .L494+12
+	ldr	r3, .L507+12
 	ldr	r8, [r3]
 	str	r8, [r5, #12]
-.L485:
-	ldr	r3, .L494+16
+.L498:
+	ldr	r3, .L507+16
 	ldrh	r3, [r3]
 	cmp	r6, r3
-	bcc	.L490
+	bcc	.L503
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L490:
+.L503:
 	ldrh	r4, [r10]
 	movw	r3, #65535
-	ldr	fp, .L494+4
+	ldr	fp, .L507+4
 	strh	r3, [r7, #2]!	@ movhi
 	subs	r4, r4, #1
 	uxth	r4, r4
-.L486:
+.L499:
 	ldrh	r3, [r10]
 	sub	r2, r3, #15
 	cmp	r2, r4
-	bgt	.L488
+	bgt	.L501
 	mla	r3, r6, r3, r4
 	movs	r2, #1
 	mov	r1, r2
@@ -4111,22 +4128,22 @@ FtlLoadFactoryBbt:
 	bl	FlashReadPages
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L487
+	beq	.L500
 	ldrh	r2, [r8]
 	movw	r3, #61664
 	cmp	r2, r3
-	bne	.L487
+	bne	.L500
 	strh	r4, [r7]	@ movhi
-.L488:
+.L501:
 	adds	r6, r6, #1
-	b	.L485
-.L487:
+	b	.L498
+.L500:
 	subs	r4, r4, #1
 	uxth	r4, r4
-	b	.L486
-.L495:
+	b	.L499
+.L508:
 	.align	2
-.L494:
+.L507:
 	.word	.LANCHOR106
 	.word	.LANCHOR138
 	.word	.LANCHOR37+10
@@ -4148,17 +4165,17 @@ FtlGetLastWrittenPage:
 	cmp	r1, #1
 	push	{r4, r5, r6, r7, r8, lr}
 	it	eq
-	ldreq	r3, .L508
+	ldreq	r3, .L521
 	sub	sp, sp, #88
 	lsl	r7, r0, #10
 	mov	r2, r1
 	it	ne
-	ldrne	r3, .L508+4
+	ldrne	r3, .L521+4
 	mov	r6, r1
 	add	r0, sp, #4
 	movs	r1, #1
 	ldrh	r5, [r3]
-	ldr	r3, .L508+8
+	ldr	r3, .L521+8
 	subs	r5, r5, #1
 	ldr	r3, [r3]
 	sxth	r5, r5
@@ -4170,17 +4187,17 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	bne	.L499
+	bne	.L512
 	mov	r8, #0
-.L500:
+.L513:
 	cmp	r8, r5
-	ble	.L503
-.L499:
+	ble	.L516
+.L512:
 	mov	r0, r5
 	add	sp, sp, #88
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L503:
+.L516:
 	add	r3, r8, r5
 	mov	r2, r6
 	add	r3, r3, r3, lsr #31
@@ -4193,23 +4210,23 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	bne	.L501
+	bne	.L514
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
-	bne	.L501
+	bne	.L514
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
-	beq	.L501
+	beq	.L514
 	subs	r4, r4, #1
 	sxth	r5, r4
-	b	.L500
-.L501:
+	b	.L513
+.L514:
 	adds	r4, r4, #1
 	sxth	r8, r4
-	b	.L500
-.L509:
+	b	.L513
+.L522:
 	.align	2
-.L508:
+.L521:
 	.word	.LANCHOR20
 	.word	.LANCHOR19
 	.word	.LANCHOR112
@@ -4227,69 +4244,69 @@ FtlScanSysBlk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r5, .L591
+	ldr	r5, .L604
 	sub	sp, sp, #32
 	mov	r1, r4
-	ldr	r3, .L591+4
+	ldr	r3, .L604+4
 	ldr	r2, [r5]
-	ldr	r6, .L591+8
+	ldr	r6, .L604+8
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L591+12
+	ldr	r3, .L604+12
 	lsls	r2, r2, #2
 	strh	r4, [r6]	@ movhi
-	ldr	r7, .L591+16
+	ldr	r7, .L604+16
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldr	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L591+20
+	ldr	r3, .L604+20
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r7]
 	mov	r1, r4
-	ldr	r3, .L591+24
+	ldr	r3, .L604+24
 	lsls	r2, r2, #2
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r7]
 	mov	r1, r4
-	ldr	r3, .L591+28
+	ldr	r3, .L604+28
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	movs	r2, #16
 	movs	r1, #255
-	ldr	r0, .L591+32
+	ldr	r0, .L604+32
 	bl	ftl_memset
-	ldr	r3, .L591+36
+	ldr	r3, .L604+36
 	str	r6, [sp, #12]
 	str	r5, [sp, #16]
 	ldrh	r3, [r3]
 	str	r3, [sp, #4]
-.L511:
-	ldr	r3, .L591+40
+.L524:
+	ldr	r3, .L604+40
 	ldr	r2, [sp, #4]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bls	.L552
-	ldr	r3, .L591+44
+	bls	.L565
+	ldr	r3, .L604+44
 	movs	r5, #0
-	ldr	r1, .L591+48
+	ldr	r1, .L604+48
 	mov	fp, r5
 	movs	r7, #20
 	ldrh	r8, [r3]
-	ldr	r3, .L591+52
+	ldr	r3, .L604+52
 	ldr	r2, [r1]
-	ldr	r1, .L591+56
+	ldr	r1, .L604+56
 	ldr	r6, [r3]
-	ldr	r3, .L591+60
+	ldr	r3, .L604+60
 	str	r2, [sp, #8]
 	ldrh	r10, [r1]
 	ldr	r3, [r3]
-	ldr	r2, .L591+64
-	b	.L553
-.L513:
+	ldr	r2, .L604+64
+	b	.L566
+.L526:
 	ldrb	r0, [r2, r5]	@ zero_extendqisi2
 	ldr	r1, [sp, #4]
 	str	r3, [sp, #28]
@@ -4299,7 +4316,7 @@ FtlScanSysBlk:
 	bl	FtlBbmIsBadBlock
 	ldr	r2, [sp, #24]
 	ldr	r3, [sp, #28]
-	cbnz	r0, .L512
+	cbnz	r0, .L525
 	ldr	r1, [sp, #20]
 	mla	r0, r7, fp, r6
 	ldr	r4, [sp, #8]
@@ -4312,31 +4329,31 @@ FtlScanSysBlk:
 	str	r1, [r0, #12]
 	add	r1, fp, #1
 	uxth	fp, r1
-.L512:
+.L525:
 	adds	r5, r5, #1
-.L553:
+.L566:
 	uxth	r1, r5
 	cmp	r8, r1
-	bhi	.L513
+	bhi	.L526
 	cmp	fp, #0
-	bne	.L514
-.L551:
+	bne	.L527
+.L564:
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	str	r3, [sp, #4]
-	b	.L511
-.L514:
+	b	.L524
+.L527:
 	movs	r7, #0
 	movs	r2, #1
 	mov	r1, fp
 	mov	r0, r6
 	bl	FlashReadPages
-.L515:
+.L528:
 	uxth	r3, r7
 	cmp	fp, r3
-	bls	.L551
-	ldr	r3, .L591+52
+	bls	.L564
+	ldr	r3, .L604+52
 	mov	r8, #20
 	mul	r8, r8, r7
 	ldr	r3, [r3]
@@ -4346,10 +4363,10 @@ FtlScanSysBlk:
 	ldr	r6, [r2, #12]
 	adds	r3, r3, #1
 	ubfx	r5, r5, #10, #16
-	bne	.L518
+	bne	.L531
 	mov	r10, #16
-.L520:
-	ldr	r3, .L591+52
+.L533:
+	ldr	r3, .L604+52
 	movs	r2, #1
 	mov	r1, r2
 	ldr	r0, [r3]
@@ -4361,83 +4378,83 @@ FtlScanSysBlk:
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	ldr	r3, .L591+52
+	ldr	r3, .L604+52
 	ldr	r3, [r3]
-	bne	.L517
+	bne	.L530
 	mov	r2, #-1
 	str	r2, [r3, r8]
-	ldr	r3, .L591+52
+	ldr	r3, .L604+52
 	ldr	r3, [r3]
 	ldr	r3, [r3, r8]
 	cmp	r3, r2
-	bne	.L518
-.L519:
+	bne	.L531
+.L532:
 	movs	r1, #1
-	b	.L590
-.L517:
+	b	.L603
+.L530:
 	ldr	r3, [r3, r8]
 	adds	r3, r3, #1
-	bne	.L518
+	bne	.L531
 	add	r10, r10, #-1
 	uxth	r10, r10
 	cmp	r10, #0
-	bne	.L520
-	b	.L519
-.L518:
-	ldr	r3, .L591+68
+	bne	.L533
+	b	.L532
+.L531:
+	ldr	r3, .L604+68
 	ldr	r2, [r3]
 	ldr	r3, [r6, #4]
 	adds	r1, r2, #1
-	beq	.L521
+	beq	.L534
 	cmp	r2, r3
-	bhi	.L522
-.L521:
+	bhi	.L535
+.L534:
 	adds	r2, r3, #1
 	ittt	ne
-	ldrne	r1, .L591+68
+	ldrne	r1, .L604+68
 	addne	r2, r3, #1
 	strne	r2, [r1]
-.L522:
+.L535:
 	ldrh	r2, [r6]
 	movw	r1, #61604
 	cmp	r2, r1
-	beq	.L524
-	bhi	.L525
+	beq	.L537
+	bhi	.L538
 	movw	r3, #61574
 	cmp	r2, r3
-	beq	.L526
-.L523:
+	beq	.L539
+.L536:
 	adds	r7, r7, #1
-	b	.L515
-.L525:
+	b	.L528
+.L538:
 	movw	r3, #61634
 	cmp	r2, r3
-	beq	.L527
+	beq	.L540
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L523
+	bne	.L536
 	movs	r1, #0
-.L590:
+.L603:
 	mov	r0, r5
 	bl	FtlFreeSysBlkQueueIn
-	b	.L523
-.L527:
-	ldr	r3, .L591+8
+	b	.L536
+.L540:
+	ldr	r3, .L604+8
 	ldrh	r2, [r3]
-	ldr	r3, .L591
+	ldr	r3, .L604
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bls	.L529
+	bls	.L542
 	movw	r2, #1225
-	ldr	r1, .L591+72
-	ldr	r0, .L591+76
+	ldr	r1, .L604+72
+	ldr	r0, .L604+76
 	bl	printf
-.L529:
+.L542:
 	ldr	r3, [sp, #16]
 	ldr	r2, [sp, #12]
 	ldr	r1, [r3]
 	ldrh	r0, [r2]
-	ldr	r2, .L591+12
+	ldr	r2, .L604+12
 	uxth	r10, r1
 	ldr	ip, [r2]
 	add	r3, r10, #-1
@@ -4445,61 +4462,61 @@ FtlScanSysBlk:
 	add	r10, r10, #-1
 	sxth	r3, r3
 	sxth	r10, r10
-.L530:
+.L543:
 	cmp	r3, r10
-	bgt	.L536
+	bgt	.L549
 	cmp	r3, #0
-	bge	.L568
-	b	.L523
-.L536:
+	bge	.L581
+	b	.L536
+.L549:
 	ldr	r2, [ip, r3, lsl #2]
 	add	r8, ip, r3, lsl #2
 	ldr	r4, [r6, #4]
 	cmp	r4, r2
-	bls	.L531
+	bls	.L544
 	ldr	r2, [ip]
-	cbnz	r2, .L532
+	cbnz	r2, .L545
 	cmp	r1, r0
 	ittt	ne
-	ldrne	r2, .L591+8
+	ldrne	r2, .L604+8
 	addne	r0, r0, #1
 	strhne	r0, [r2]	@ movhi
-.L532:
-	ldr	r2, .L591+20
+.L545:
+	ldr	r2, .L604+20
 	uxth	r10, r3
 	ldr	r0, [r2]
 	movs	r2, #0
-.L533:
+.L546:
 	uxth	lr, r2
 	sxth	r1, r2
 	cmp	r10, lr
-	bhi	.L534
+	bhi	.L547
 	ldr	r2, [r6, #4]
 	cmp	r3, #0
 	str	r2, [r8]
 	strh	r5, [r0, r3, lsl #1]	@ movhi
-	blt	.L523
-	ldr	r2, .L591+8
+	blt	.L536
+	ldr	r2, .L604+8
 	ldrh	r0, [r2]
-	ldr	r2, .L591
+	ldr	r2, .L604
 	ldr	r2, [r2]
 	subs	r2, r2, r0
 	subs	r2, r2, #1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L523
-.L568:
-	ldr	r2, .L591+8
+	bgt	.L536
+.L581:
+	ldr	r2, .L604+8
 	adds	r0, r0, #1
 	strh	r0, [r2]	@ movhi
 	ldr	r2, [r6, #4]
 	str	r2, [ip, r3, lsl #2]
-	ldr	r2, .L591+20
-.L588:
+	ldr	r2, .L604+20
+.L601:
 	ldr	r2, [r2]
 	strh	r5, [r2, r3, lsl #1]	@ movhi
-	b	.L523
-.L534:
+	b	.L536
+.L547:
 	add	lr, ip, r1, lsl #2
 	adds	r2, r2, #1
 	ldr	r4, [lr, #4]
@@ -4507,14 +4524,14 @@ FtlScanSysBlk:
 	ldrh	lr, [lr, #2]
 	str	r4, [ip, r1, lsl #2]
 	strh	lr, [r0, r1, lsl #1]	@ movhi
-	b	.L533
-.L531:
+	b	.L546
+.L544:
 	subs	r3, r3, #1
 	sxth	r3, r3
-	b	.L530
-.L592:
+	b	.L543
+.L605:
 	.align	2
-.L591:
+.L604:
 	.word	.LANCHOR30
 	.word	.LANCHOR35
 	.word	.LANCHOR130
@@ -4535,72 +4552,72 @@ FtlScanSysBlk:
 	.word	.LANCHOR82
 	.word	.LANCHOR140
 	.word	.LC1
-.L526:
-	ldr	r8, .L593+12
-	ldr	r10, .L593+20
+.L539:
+	ldr	r8, .L606+12
+	ldr	r10, .L606+20
 	ldrh	r2, [r8]
 	ldrh	r3, [r10]
 	cmp	r2, r3
-	bls	.L539
+	bls	.L552
 	movw	r2, #1266
-	ldr	r1, .L593
-	ldr	r0, .L593+4
+	ldr	r1, .L606
+	ldr	r0, .L606+4
 	bl	printf
-.L539:
-	ldr	r2, .L593+8
+.L552:
+	ldr	r2, .L606+8
 	ldrh	lr, [r10]
 	ldrh	ip, [r8]
 	ldr	r0, [r2]
 	add	r10, lr, #-1
 	sxth	r3, r10
 	sub	r10, r10, ip
-.L540:
+.L553:
 	cmp	r3, r10
-	ble	.L545
+	ble	.L558
 	ldr	r1, [r6, #4]
 	add	r8, r0, r3, lsl #2
 	ldr	r2, [r0, r3, lsl #2]
 	cmp	r1, r2
-	bls	.L541
+	bls	.L554
 	ldr	r2, [r0]
-	cbnz	r2, .L542
+	cbnz	r2, .L555
 	cmp	lr, ip
 	ittt	ne
-	ldrne	r2, .L593+12
+	ldrne	r2, .L606+12
 	addne	ip, ip, #1
 	strhne	ip, [r2]	@ movhi
-.L542:
-	ldr	r2, .L593+16
+.L555:
+	ldr	r2, .L606+16
 	uxth	r10, r3
 	ldr	ip, [r2]
 	movs	r2, #0
-.L543:
+.L556:
 	uxth	lr, r2
 	sxth	r1, r2
 	cmp	r10, lr
-	bhi	.L544
+	bhi	.L557
 	ldr	r2, [r6, #4]
 	str	r2, [r8]
 	strh	r5, [ip, r3, lsl #1]	@ movhi
-.L545:
+.L558:
 	cmp	r3, #0
-	blt	.L523
-	ldr	r2, .L593+20
-	ldr	ip, .L593+12
+	blt	.L536
+	ldr	r2, .L606+20
+	ldr	ip, .L606+12
 	ldrh	r2, [r2]
 	ldrh	r1, [ip]
 	subs	r2, r2, #1
 	subs	r2, r2, r1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L523
+	bgt	.L536
 	ldr	r2, [r6, #4]
 	adds	r1, r1, #1
 	strh	r1, [ip]	@ movhi
 	str	r2, [r0, r3, lsl #2]
-	ldr	r2, .L593+16
-	b	.L588
-.L544:
+	ldr	r2, .L606+16
+	b	.L601
+.L557:
 	add	lr, r0, r1, lsl #2
 	adds	r2, r2, #1
 	ldr	r4, [lr, #4]
@@ -4608,88 +4625,88 @@ FtlScanSysBlk:
 	ldrh	lr, [lr, #2]
 	str	r4, [r0, r1, lsl #2]
 	strh	lr, [ip, r1, lsl #1]	@ movhi
-	b	.L543
-.L541:
+	b	.L556
+.L554:
 	subs	r3, r3, #1
 	sxth	r3, r3
-	b	.L540
-.L524:
-	ldr	r8, .L593+40
+	b	.L553
+.L537:
+	ldr	r8, .L606+40
 	movw	r2, #65535
 	ldrh	r1, [r8]
 	cmp	r1, r2
-	bne	.L547
-.L589:
+	bne	.L560
+.L602:
 	strh	r5, [r8]	@ movhi
 	str	r3, [r8, #8]
-	b	.L523
-.L547:
+	b	.L536
+.L560:
 	ldrh	r0, [r8, #4]
 	cmp	r0, r2
-	beq	.L548
+	beq	.L561
 	movs	r1, #1
 	bl	FtlFreeSysBlkQueueIn
-.L548:
+.L561:
 	ldr	r3, [r6, #4]
 	ldr	r2, [r8, #8]
 	cmp	r2, r3
-	bcs	.L549
+	bcs	.L562
 	ldrh	r2, [r8]
 	strh	r2, [r8, #4]	@ movhi
-	b	.L589
-.L549:
+	b	.L602
+.L562:
 	strh	r5, [r8, #4]	@ movhi
-	b	.L523
-.L552:
-	ldr	r3, .L593+24
+	b	.L536
+.L565:
+	ldr	r3, .L606+24
 	ldr	r2, [r3]
 	ldrh	r3, [r2]
-	cbz	r3, .L554
-.L557:
-	ldr	r3, .L593+16
+	cbz	r3, .L567
+.L570:
+	ldr	r3, .L606+16
 	ldr	r4, [r3]
 	ldrh	r2, [r4]
 	cmp	r2, #0
-	beq	.L555
-.L556:
-	ldr	r3, .L593+28
+	beq	.L568
+.L569:
+	ldr	r3, .L606+28
 	ldrh	r2, [r3]
-	ldr	r3, .L593+32
+	ldr	r3, .L606+32
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bls	.L587
+	bls	.L600
 	movw	r2, #1391
-	ldr	r1, .L593
-	ldr	r0, .L593+4
+	ldr	r1, .L606
+	ldr	r0, .L606+4
 	bl	printf
-.L587:
+.L600:
 	movs	r0, #0
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L554:
-	ldr	r1, .L593+28
+.L567:
+	ldr	r1, .L606+28
 	ldrh	r1, [r1]
 	cmp	r1, #0
-	beq	.L557
-	ldr	r5, .L593+32
+	beq	.L570
+	ldr	r5, .L606+32
 	ldr	r0, [r5]
-.L558:
+.L571:
 	sxth	r1, r3
 	cmp	r1, r0
-	bcs	.L557
+	bcs	.L570
 	ldrh	r4, [r2, r1, lsl #1]
 	adds	r3, r3, #1
 	cmp	r4, #0
-	beq	.L558
-	ldr	r3, .L593+36
+	beq	.L571
+	ldr	r3, .L606+36
 	movs	r6, #0
 	ldr	r0, [r3]
 	mov	r3, r1
-.L559:
+.L572:
 	ldr	r4, [r5]
 	cmp	r3, r4
-	bcs	.L557
+	bcs	.L570
 	ldrh	r7, [r2, r3, lsl #1]
 	subs	r4, r3, r1
 	strh	r7, [r2, r4, lsl #1]	@ movhi
@@ -4698,30 +4715,30 @@ FtlScanSysBlk:
 	strh	r6, [r2, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	sxth	r3, r3
-	b	.L559
-.L555:
-	ldr	r3, .L593+12
+	b	.L572
+.L568:
+	ldr	r3, .L606+12
 	ldrh	r3, [r3]
 	cmp	r3, #0
-	beq	.L556
-	ldr	r5, .L593+20
+	beq	.L569
+	ldr	r5, .L606+20
 	ldrh	r1, [r5]
-.L564:
+.L577:
 	sxth	r3, r2
 	cmp	r3, r1
 	mov	r6, r3
-	bge	.L556
+	bge	.L569
 	ldrh	r0, [r4, r3, lsl #1]
 	adds	r2, r2, #1
 	cmp	r0, #0
-	beq	.L564
-	ldr	r2, .L593+8
+	beq	.L577
+	ldr	r2, .L606+8
 	movs	r0, #0
 	ldr	r2, [r2]
-.L565:
+.L578:
 	ldrh	r1, [r5]
 	cmp	r3, r1
-	bge	.L556
+	bge	.L569
 	ldrh	r7, [r4, r3, lsl #1]
 	subs	r1, r3, r6
 	strh	r7, [r4, r1, lsl #1]	@ movhi
@@ -4730,10 +4747,10 @@ FtlScanSysBlk:
 	adds	r1, r3, #1
 	strh	r0, [r4, r3, lsl #1]	@ movhi
 	sxth	r3, r1
-	b	.L565
-.L594:
+	b	.L578
+.L607:
 	.align	2
-.L593:
+.L606:
 	.word	.LANCHOR140
 	.word	.LC1
 	.word	.LANCHOR122
@@ -4758,24 +4775,24 @@ FtlLoadBbt:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	ldr	r8, .L624+40
-	ldr	r4, .L624
+	ldr	r8, .L637+40
+	ldr	r4, .L637
 	ldr	r3, [r8]
-	ldr	r7, .L624+4
+	ldr	r7, .L637+4
 	mov	r10, r4
 	str	r3, [r4, #8]
-	ldr	r3, .L624+8
+	ldr	r3, .L637+8
 	ldr	r6, [r3]
 	str	r6, [r4, #12]
 	bl	FtlBbtMemInit
 	ldrh	r5, [r7]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L596:
+.L609:
 	ldrh	r3, [r7]
 	subs	r3, r3, #15
 	cmp	r3, r5
-	bgt	.L599
+	bgt	.L612
 	lsls	r3, r5, #10
 	movs	r2, #1
 	mov	r1, r2
@@ -4784,7 +4801,7 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	bne	.L597
+	bne	.L610
 	ldr	r3, [r4, #4]
 	movs	r2, #1
 	mov	r1, r2
@@ -4792,101 +4809,101 @@ FtlLoadBbt:
 	adds	r3, r3, #1
 	str	r3, [r4, #4]
 	bl	FlashReadPages
-.L597:
+.L610:
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L598
+	beq	.L611
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L598
-	ldr	r3, .L624+12
+	bne	.L611
+	ldr	r3, .L637+12
 	ldr	r2, [r6, #4]
 	strh	r5, [r3]	@ movhi
 	str	r2, [r3, #8]
 	ldrh	r2, [r6, #8]
 	strh	r2, [r3, #4]	@ movhi
-.L599:
-	ldr	r5, .L624+12
+.L612:
+	ldr	r5, .L637+12
 	movw	r2, #65535
 	ldrh	r3, [r5]
 	cmp	r3, r2
-	beq	.L613
+	beq	.L626
 	ldrh	r3, [r5, #4]
 	cmp	r3, r2
-	beq	.L603
+	beq	.L616
 	lsls	r3, r3, #10
 	movs	r2, #1
 	mov	r1, r2
-	ldr	r0, .L624
+	ldr	r0, .L637
 	str	r3, [r4, #4]
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L603
+	beq	.L616
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L603
+	bne	.L616
 	ldr	r3, [r6, #4]
 	ldr	r2, [r5, #8]
 	cmp	r3, r2
-	bls	.L603
+	bls	.L616
 	ldrh	r2, [r5, #4]
 	str	r3, [r5, #8]
 	ldrh	r3, [r6, #8]
 	strh	r2, [r5]	@ movhi
 	strh	r3, [r5, #4]	@ movhi
-.L603:
-	ldr	r10, .L624
+.L616:
+	ldr	r10, .L637
 	movs	r1, #1
 	ldrh	r0, [r5]
 	bl	FtlGetLastWrittenPage
 	sxth	r7, r0
 	adds	r0, r0, #1
 	strh	r0, [r5, #2]	@ movhi
-.L605:
+.L618:
 	cmp	r7, #0
-	bge	.L608
-	movs	r2, #253
-	ldr	r1, .L624+16
-	ldr	r0, .L624+20
+	bge	.L621
+	movs	r2, #251
+	ldr	r1, .L637+16
+	ldr	r0, .L637+20
 	bl	printf
-.L607:
+.L620:
 	ldrh	r3, [r6, #10]
 	ldrh	r0, [r6, #12]
 	strh	r3, [r5, #6]	@ movhi
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L610
-	ldr	r3, .L624+24
+	beq	.L623
+	ldr	r3, .L637+24
 	ldr	r2, [r3]
 	cmp	r0, r2
-	beq	.L610
-	ldr	r3, .L624+28
+	beq	.L623
+	ldr	r3, .L637+28
 	ldrh	r3, [r3]
 	lsrs	r3, r3, #2
 	cmp	r2, r3
-	bcs	.L610
+	bcs	.L623
 	cmp	r0, r3
-	bcs	.L610
+	bcs	.L623
 	bl	FtlSysBlkNumInit
-.L610:
-	ldr	r6, .L624+32
+.L623:
+	ldr	r6, .L637+32
 	movs	r5, #0
-	ldr	r7, .L624+36
-	ldr	r8, .L624+44
-.L611:
+	ldr	r7, .L637+36
+	ldr	r8, .L637+44
+.L624:
 	ldrh	r3, [r7]
 	cmp	r5, r3
-	bcc	.L612
+	bcc	.L625
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L598:
+.L611:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L596
-.L608:
+	b	.L609
+.L621:
 	ldrh	r3, [r5]
 	movs	r2, #1
 	mov	r1, r2
@@ -4898,16 +4915,16 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L606
+	beq	.L619
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	beq	.L607
-.L606:
+	beq	.L620
+.L619:
 	subs	r7, r7, #1
 	sxth	r7, r7
-	b	.L605
-.L612:
+	b	.L618
+.L625:
 	ldrh	r2, [r8]
 	ldr	r1, [r4, #8]
 	ldr	r0, [r6, #4]!
@@ -4915,13 +4932,13 @@ FtlLoadBbt:
 	mla	r1, r5, r2, r1
 	adds	r5, r5, #1
 	bl	ftl_memcpy
-	b	.L611
-.L613:
+	b	.L624
+.L626:
 	mov	r0, #-1
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L625:
+.L638:
 	.align	2
-.L624:
+.L637:
 	.word	.LANCHOR138
 	.word	.LANCHOR17
 	.word	.LANCHOR114
@@ -4952,26 +4969,26 @@ FlashProgPages:
 	mov	r10, r1
 	mov	r4, r0
 	mov	r5, r0
-	ldr	r3, .L666
+	ldr	r3, .L680
 	mov	r8, #0
-	ldr	fp, .L666+48
+	ldr	fp, .L680+52
 	str	r2, [sp, #8]
 	ldrh	r3, [r3, #12]
 	str	r3, [sp]
 	lsls	r3, r3, #3
 	str	r3, [sp, #4]
-.L627:
+.L640:
 	cmp	r8, r10
-	bne	.L640
+	bne	.L653
 	ldr	r3, [sp, #12]
 	cmp	r3, #0
-	beq	.L658
-	ldr	r6, .L666+4
+	beq	.L672
+	ldr	r6, .L680+4
 	movs	r5, #0
-.L642:
+.L655:
 	cmp	r8, r5
-	beq	.L658
-	ldr	r7, .L666+8
+	beq	.L672
+	ldr	r7, .L680+8
 	movs	r1, #0
 	ldr	r2, [r6]
 	add	r0, sp, #28
@@ -4987,73 +5004,81 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	r10, [sp, #28]
 	cmp	r10, #-1
-	bne	.L643
+	bne	.L656
 	ldr	r1, [r4, #4]
-	ldr	r0, .L666+12
+	ldr	r0, .L680+12
 	bl	printf
 	str	r10, [r4]
-.L643:
+.L656:
+	ldr	r10, [sp, #28]
+	cmp	r10, #256
+	bne	.L657
+	ldr	r1, [r4, #4]
+	ldr	r0, .L680+16
+	bl	printf
+	str	r10, [r4]
+.L657:
 	ldr	r3, [r4, #12]
-	cbz	r3, .L644
+	cbz	r3, .L658
 	ldr	r2, [r3]
 	ldr	r3, [r7]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L644
+	beq	.L658
 	ldr	r1, [r4, #4]
-	ldr	r0, .L666+16
+	ldr	r0, .L680+20
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4]
-.L644:
+.L658:
 	ldr	r3, [r4, #8]
-	cbz	r3, .L645
+	cbz	r3, .L659
 	ldr	r2, [r3]
 	ldr	r3, [r6]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L645
+	beq	.L659
 	ldr	r1, [r4, #4]
-	ldr	r0, .L666+20
+	ldr	r0, .L680+24
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4]
-.L645:
+.L659:
 	adds	r5, r5, #1
 	adds	r4, r4, #20
-	b	.L642
-.L640:
+	b	.L655
+.L653:
 	ldr	r3, [r5, #8]
-	cbz	r3, .L628
+	cbz	r3, .L641
 	ldr	r3, [r5, #12]
-	cbnz	r3, .L629
-.L628:
-	movs	r2, #134
-	ldr	r1, .L666+24
-	ldr	r0, .L666+28
+	cbnz	r3, .L642
+.L641:
+	movs	r2, #142
+	ldr	r1, .L680+28
+	ldr	r0, .L680+32
 	bl	printf
-.L629:
+.L642:
 	add	r2, sp, #20
 	add	r1, sp, #24
 	ldr	r0, [r5, #4]
 	bl	l2p_addr_tran.isra.0
 	ldr	r6, [sp, #20]
 	cmp	r6, #3
-	bls	.L630
-.L665:
+	bls	.L643
+.L679:
 	mov	r3, #-1
 	str	r3, [r5]
-	b	.L631
-.L630:
-	cbnz	r6, .L632
+	b	.L644
+.L643:
+	cbnz	r6, .L645
 	ldr	r3, [sp, #24]
 	ldr	r2, [sp, #4]
 	cmp	r2, r3
-	bls	.L632
-	ldr	r5, .L666+24
-	ldr	r7, .L666+32
-	b	.L664
-.L634:
+	bls	.L645
+	ldr	r5, .L680+28
+	ldr	r7, .L680+36
+	b	.L678
+.L647:
 	mov	r3, #-1
 	ldr	r2, [r4, #-16]
 	str	r3, [r4, #-20]
@@ -5064,49 +5089,49 @@ FlashProgPages:
 	movs	r3, #16
 	movs	r2, #4
 	ldr	r1, [r4, #-12]
-	ldr	r0, .L666+36
+	ldr	r0, .L680+40
 	bl	rknand_print_hex
 	movs	r3, #4
 	ldr	r1, [r4, #-8]
 	mov	r2, r3
-	ldr	r0, .L666+40
+	ldr	r0, .L680+44
 	bl	rknand_print_hex
-.L664:
+.L678:
 	cmp	r6, r10
 	add	r4, r4, #20
-	bne	.L634
-.L658:
+	bne	.L647
+.L672:
 	movs	r0, #0
 	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L632:
+.L645:
 	ldr	r1, [r5, #8]
 	lsls	r3, r1, #26
-	beq	.L647
-	ldr	r3, .L666+4
+	beq	.L661
+	ldr	r3, .L680+4
 	ldr	r6, [r3]
 	cmp	r1, r6
-	beq	.L635
-	ldr	r3, .L666+44
+	beq	.L648
+	ldr	r3, .L680+48
 	mov	r0, r6
 	ldrh	r2, [r3]
 	lsls	r2, r2, #9
 	bl	ftl_memcpy
-.L635:
+.L648:
 	ldr	r3, [r5, #12]
 	mov	r2, r6
 	ldr	r1, [sp, #24]
 	ldrb	r0, [sp, #20]	@ zero_extendqisi2
 	ldr	r7, [fp, #8]
 	blx	r7
-	cbnz	r0, .L636
+	cbnz	r0, .L649
 	str	r0, [r5]
-.L637:
-	ldr	r3, .L666
+.L650:
+	ldr	r3, .L680
 	ldrh	r3, [r3, #14]
 	cmp	r3, #4
-	bne	.L631
+	bne	.L644
 	ldr	r0, [sp]
 	add	r2, r6, #2048
 	ldr	r3, [r5, #12]
@@ -5117,27 +5142,28 @@ FlashProgPages:
 	ldrb	r0, [sp, #20]	@ zero_extendqisi2
 	blx	r6
 	cmp	r0, #0
-	bne	.L665
-.L631:
+	bne	.L679
+.L644:
 	add	r8, r8, #1
 	adds	r5, r5, #20
-	b	.L627
-.L647:
+	b	.L640
+.L661:
 	mov	r6, r1
-	b	.L635
-.L636:
+	b	.L648
+.L649:
 	mov	r3, #-1
 	str	r3, [r5]
-	b	.L637
-.L667:
+	b	.L650
+.L681:
 	.align	2
-.L666:
+.L680:
 	.word	.LANCHOR0
 	.word	.LANCHOR111
 	.word	.LANCHOR113
-	.word	.LC11
-	.word	.LC12
-	.word	.LC13
+	.word	.LC14
+	.word	.LC15
+	.word	.LC16
+	.word	.LC17
 	.word	.LANCHOR142
 	.word	.LC1
 	.word	.LC6
@@ -5157,133 +5183,133 @@ FlashProgPages:
 FtlLowFormatEraseBlock:
 	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L711
+	ldr	r3, .L725
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #32
-	ldr	r7, .L711+4
+	ldr	r7, .L725+4
 	mov	r8, #0
 	mov	r6, r1
 	mov	r5, r8
 	str	r0, [r3]
 	mov	r4, r8
-	ldr	r3, .L711+8
+	ldr	r3, .L725+8
 	mov	fp, #20
 	ldr	r10, [r7]
 	str	r0, [sp, #4]
 	ldrh	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L711+12
+	ldr	r3, .L725+12
 	ldr	r3, [r3]
 	str	r3, [sp, #16]
-	ldr	r3, .L711+16
+	ldr	r3, .L725+16
 	ldr	r3, [r3]
 	str	r3, [sp, #20]
-	ldr	r3, .L711+20
+	ldr	r3, .L725+20
 	ldrh	r3, [r3]
 	str	r3, [sp, #24]
-.L669:
+.L683:
 	ldr	r3, [sp, #12]
 	uxth	r2, r8
 	cmp	r3, r2
-	bhi	.L673
+	bhi	.L687
 	cmp	r5, #0
-	beq	.L668
+	beq	.L682
 	mov	r0, r10
 	mov	r8, #0
 	mov	r10, #20
 	mov	r2, r5
 	movs	r1, #0
 	bl	FlashEraseBlocks
-.L676:
+.L690:
 	uxth	r3, r8
 	cmp	r5, r3
-	bhi	.L678
+	bhi	.L692
 	cmp	r6, #0
-	beq	.L694
-	ldr	r3, .L711+24
+	beq	.L708
+	ldr	r3, .L725+24
 	mov	r10, #1
 	ldrh	r3, [r3]
 	str	r3, [sp, #8]
-.L679:
+.L693:
 	movs	r7, #0
-.L688:
-	ldr	r3, .L711+8
+.L702:
+	ldr	r3, .L725+8
 	mov	r8, #0
 	mov	r5, r8
 	ldrh	r3, [r3]
 	str	r3, [sp, #16]
-	ldr	r3, .L711+4
+	ldr	r3, .L725+4
 	ldr	fp, [r3]
-	ldr	r3, .L711+28
+	ldr	r3, .L725+28
 	ldr	r3, [r3]
 	str	r3, [sp, #20]
-	ldr	r3, .L711+12
+	ldr	r3, .L725+12
 	ldr	r3, [r3]
 	str	r3, [sp, #24]
-	ldr	r3, .L711+20
+	ldr	r3, .L725+20
 	ldrh	r3, [r3]
 	str	r3, [sp, #28]
-.L680:
+.L694:
 	ldr	r3, [sp, #16]
 	uxth	r2, r8
 	cmp	r3, r2
-	bhi	.L683
-	cbz	r5, .L668
+	bhi	.L697
+	cbz	r5, .L682
 	mov	r0, fp
-	ldr	fp, .L711+4
+	ldr	fp, .L725+4
 	movs	r3, #1
 	mov	r2, r10
 	mov	r1, r5
 	mov	r8, #0
 	bl	FlashProgPages
 	movs	r3, #20
-.L685:
+.L699:
 	uxth	r2, r8
 	cmp	r5, r2
-	bhi	.L687
+	bhi	.L701
 	adds	r7, r7, #1
 	ldr	r2, [sp, #8]
 	uxth	r3, r7
 	cmp	r2, r3
-	bhi	.L688
-	ldr	r8, .L711+4
+	bhi	.L702
+	ldr	r8, .L725+4
 	movs	r7, #0
 	mov	fp, #20
-.L689:
+.L703:
 	uxth	r3, r7
 	cmp	r5, r3
-	bhi	.L691
+	bhi	.L705
 	ldr	r3, [sp, #4]
 	cmp	r3, #63
-	bls	.L692
-	cbz	r6, .L668
-.L692:
-	ldr	r3, .L711+4
+	bls	.L706
+	cbz	r6, .L682
+.L706:
+	ldr	r3, .L725+4
 	mov	r2, r5
 	mov	r1, r10
 	ldr	r0, [r3]
 	bl	FlashEraseBlocks
-.L668:
+.L682:
 	mov	r0, r4
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L673:
+.L687:
 	mul	r2, fp, r8
 	movs	r3, #0
 	ldr	r1, [sp, #4]
 	str	r3, [r10, r2]
-	ldr	r3, .L711+32
+	ldr	r3, .L725+32
 	ldrb	r0, [r3, r8]	@ zero_extendqisi2
 	bl	V2P_block
 	str	r0, [sp, #8]
-	cbz	r6, .L670
+	cbz	r6, .L684
 	bl	IsBlkInVendorPart
-	cbnz	r0, .L671
-.L670:
+	cbnz	r0, .L685
+.L684:
 	ldr	r0, [sp, #8]
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L672
+	cbnz	r0, .L686
 	ldr	r3, [sp, #8]
 	mla	r1, fp, r5, r10
 	lsls	r2, r3, #10
@@ -5298,50 +5324,50 @@ FtlLowFormatEraseBlock:
 	bic	r2, r2, #3
 	add	r2, r2, r3
 	str	r2, [r1, #12]
-.L671:
+.L685:
 	add	r8, r8, #1
-	b	.L669
-.L672:
+	b	.L683
+.L686:
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L671
-.L678:
+	b	.L685
+.L692:
 	mul	r3, r10, r8
 	ldr	r2, [r7]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
 	adds	r3, r3, #1
-	bne	.L677
+	bne	.L691
 	ldr	r0, [r1, #4]
 	adds	r4, r4, #1
 	uxth	r4, r4
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.L677:
+.L691:
 	add	r8, r8, #1
-	b	.L676
-.L694:
+	b	.L690
+.L708:
 	movs	r3, #2
 	mov	r10, r6
 	str	r3, [sp, #8]
-	b	.L679
-.L683:
+	b	.L693
+.L697:
 	movs	r3, #20
 	ldr	r1, [sp, #4]
 	mul	r2, r3, r8
 	movs	r3, #0
 	str	r3, [fp, r2]
-	ldr	r3, .L711+32
+	ldr	r3, .L725+32
 	ldrb	r0, [r3, r8]	@ zero_extendqisi2
 	bl	V2P_block
 	str	r0, [sp, #12]
-	cbz	r6, .L681
+	cbz	r6, .L695
 	bl	IsBlkInVendorPart
-	cbnz	r0, .L682
-.L681:
+	cbnz	r0, .L696
+.L695:
 	ldr	r0, [sp, #12]
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L682
+	cbnz	r0, .L696
 	movs	r3, #20
 	mla	r1, r3, r5, fp
 	ldr	r3, [sp, #12]
@@ -5357,15 +5383,15 @@ FtlLowFormatEraseBlock:
 	bic	r2, r2, #3
 	add	r2, r2, r3
 	str	r2, [r1, #12]
-.L682:
+.L696:
 	add	r8, r8, #1
-	b	.L680
-.L687:
+	b	.L694
+.L701:
 	mul	r2, r3, r8
 	ldr	r1, [fp]
 	adds	r0, r1, r2
 	ldr	r2, [r1, r2]
-	cbz	r2, .L686
+	cbz	r2, .L700
 	ldr	r0, [r0, #4]
 	adds	r4, r4, #1
 	str	r3, [sp, #12]
@@ -5373,26 +5399,26 @@ FtlLowFormatEraseBlock:
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
 	ldr	r3, [sp, #12]
-.L686:
+.L700:
 	add	r8, r8, #1
-	b	.L685
-.L691:
-	cbz	r6, .L690
+	b	.L699
+.L705:
+	cbz	r6, .L704
 	mul	r3, fp, r7
 	ldr	r2, [r8]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
-	cbnz	r3, .L690
+	cbnz	r3, .L704
 	ldr	r0, [r1, #4]
 	movs	r1, #1
 	ubfx	r0, r0, #10, #16
 	bl	FtlFreeSysBlkQueueIn
-.L690:
+.L704:
 	adds	r7, r7, #1
-	b	.L689
-.L712:
+	b	.L703
+.L726:
 	.align	2
-.L711:
+.L725:
 	.word	.LANCHOR99
 	.word	.LANCHOR79
 	.word	.LANCHOR3
@@ -5418,8 +5444,8 @@ FlashTestBlk:
 	push	{r4, r5, lr}
 	mov	r5, r0
 	sub	sp, sp, #92
-	bls	.L716
-	ldr	r4, .L718
+	bls	.L730
+	ldr	r4, .L732
 	add	r0, sp, #24
 	movs	r2, #32
 	movs	r1, #165
@@ -5443,7 +5469,7 @@ FlashTestBlk:
 	mov	r1, r3
 	bl	FlashProgPages
 	ldr	r3, [sp, #4]
-	cbnz	r3, .L717
+	cbnz	r3, .L731
 	adds	r3, r5, #1
 	add	r0, sp, #4
 	str	r3, [sp, #8]
@@ -5456,26 +5482,26 @@ FlashTestBlk:
 	it	ne
 	movne	r4, #1
 	negs	r4, r4
-.L715:
+.L729:
 	movs	r2, #1
 	movs	r1, #0
 	add	r0, sp, #4
 	str	r5, [sp, #8]
 	bl	FlashEraseBlocks
-.L713:
+.L727:
 	mov	r0, r4
 	add	sp, sp, #92
 	@ sp needed
 	pop	{r4, r5, pc}
-.L717:
+.L731:
 	mov	r4, #-1
-	b	.L715
-.L716:
+	b	.L729
+.L730:
 	movs	r4, #0
-	b	.L713
-.L719:
+	b	.L727
+.L733:
 	.align	2
-.L718:
+.L732:
 	.word	.LANCHOR112
 	.size	FlashTestBlk, .-FlashTestBlk
 	.section	.text.FtlBbmTblFlush,"ax",%progbits
@@ -5490,38 +5516,38 @@ FtlBbmTblFlush:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r4, #0
-	ldr	r7, .L729
 	movs	r1, #0
-	ldr	r5, .L729+4
+	ldr	r7, .L748
+	movs	r4, #0
+	ldr	r5, .L748+4
 	ldr	r3, [r7]
-	mov	fp, r7
-	ldr	r8, .L729+48
-	ldr	r6, .L729+8
+	ldr	fp, .L748+52
+	ldr	r6, .L748+8
 	str	r3, [r5, #12]
-	ldr	r7, .L729+12
-	ldr	r3, .L729+16
-	ldr	r10, .L729+52
-	ldr	r0, [r8]
+	ldr	r3, .L748+12
+	ldr	r0, [fp]
+	ldr	r8, .L748+56
 	ldrh	r2, [r3]
 	str	r0, [r5, #8]
 	bl	ftl_memset
-.L721:
+	str	r7, [sp, #12]
+	ldr	r7, .L748+16
+.L735:
 	ldrh	r3, [r7]
 	cmp	r4, r3
-	blt	.L722
+	blt	.L736
 	ldr	r6, [r5, #12]
 	movs	r2, #16
-	ldr	r4, .L729+20
+	ldr	r4, .L748+20
 	movs	r1, #255
 	movs	r7, #0
 	mov	r0, r6
+	mov	r8, r7
 	bl	ftl_memset
 	movw	r3, #61649
 	mov	r10, r4
 	strh	r3, [r6]	@ movhi
 	ldr	r3, [r4, #8]
-	str	r7, [sp, #12]
 	str	r3, [r6, #4]
 	ldrh	r3, [r4]
 	strh	r3, [r6, #2]	@ movhi
@@ -5529,16 +5555,20 @@ FtlBbmTblFlush:
 	strh	r3, [r6, #8]	@ movhi
 	ldrh	r3, [r4, #6]
 	strh	r3, [r6, #10]	@ movhi
-	ldr	r3, .L729+24
+	ldr	r3, .L748+24
 	ldr	r3, [r3]
 	strh	r3, [r6, #12]	@ movhi
-.L723:
-	ldr	r3, [r8]
+	ldr	r3, .L748+28
+	ldr	r3, [r3]
+	strh	r3, [r6, #14]	@ movhi
+.L737:
+	ldr	r3, [fp]
 	ldrh	r2, [r4, #2]
 	ldrh	r1, [r4]
 	str	r3, [r5, #8]
-	ldr	r3, [fp]
+	ldr	r3, [sp, #12]
 	ldrh	r0, [r6, #10]
+	ldr	r3, [r3]
 	str	r3, [r5, #12]
 	movs	r3, #0
 	str	r3, [r5]
@@ -5546,14 +5576,14 @@ FtlBbmTblFlush:
 	str	r3, [r5, #4]
 	ldrh	r3, [r4, #4]
 	str	r0, [sp]
-	ldr	r0, .L729+28
+	ldr	r0, .L748+32
 	bl	printf
-	ldr	r3, .L729+32
+	ldr	r3, .L748+36
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	blt	.L724
+	blt	.L738
 	ldr	r3, [r4, #8]
 	mov	r1, #0	@ movhi
 	ldrh	r2, [r4]
@@ -5564,7 +5594,7 @@ FtlBbmTblFlush:
 	strh	r2, [r6, #8]	@ movhi
 	ldrh	r3, [r4, #4]
 	strh	r2, [r4, #4]	@ movhi
-	ldr	r2, .L729+36
+	ldr	r2, .L748+40
 	strh	r3, [r4]	@ movhi
 	lsls	r3, r3, #10
 	ldr	r0, [r2]
@@ -5573,9 +5603,9 @@ FtlBbmTblFlush:
 	mov	r1, r2
 	str	r3, [r0, #4]
 	bl	FlashEraseBlocks
-.L724:
+.L738:
 	movs	r3, #1
-	ldr	r0, .L729+4
+	ldr	r0, .L748+4
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
@@ -5583,23 +5613,23 @@ FtlBbmTblFlush:
 	adds	r3, r3, #1
 	strh	r3, [r10, #2]	@ movhi
 	ldr	r3, [r5]
-	adds	r3, r3, #1
-	bne	.L725
+	adds	r2, r3, #1
+	bne	.L739
 	adds	r7, r7, #1
 	ldr	r1, [r5, #4]
 	uxth	r7, r7
-	ldr	r0, .L729+40
+	ldr	r0, .L748+44
 	bl	printf
 	cmp	r7, #3
-	bls	.L723
+	bls	.L737
 	mov	r2, r7
 	ldr	r1, [r5, #4]
-	ldr	r0, .L729+44
+	ldr	r0, .L748+48
 	bl	printf
-.L727:
-	b	.L727
-.L722:
-	ldrh	r2, [r10]
+.L741:
+	b	.L741
+.L736:
+	ldrh	r2, [r8]
 	ldr	r3, [r5, #8]
 	ldr	r1, [r6, #4]!
 	mul	r0, r2, r4
@@ -5607,34 +5637,33 @@ FtlBbmTblFlush:
 	adds	r4, r4, #1
 	add	r0, r3, r0, lsl #2
 	bl	ftl_memcpy
-	b	.L721
-.L728:
-	movs	r3, #1
-	str	r3, [sp, #12]
-	b	.L723
-.L725:
-	ldr	r3, [sp, #12]
-	cmp	r3, #0
-	beq	.L728
+	b	.L735
+.L739:
+	add	r8, r8, #1
+	cmp	r8, #1
+	beq	.L737
+	cmp	r3, #256
+	beq	.L737
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L730:
+.L749:
 	.align	2
-.L729:
+.L748:
 	.word	.LANCHOR114
 	.word	.LANCHOR138
 	.word	.LANCHOR37+24
-	.word	.LANCHOR10
 	.word	.LANCHOR23
+	.word	.LANCHOR10
 	.word	.LANCHOR37
 	.word	.LANCHOR2
-	.word	.LC14
+	.word	.LANCHOR143
+	.word	.LC18
 	.word	.LANCHOR20
 	.word	.LANCHOR79
-	.word	.LC15
-	.word	.LC16
+	.word	.LC19
+	.word	.LC20
 	.word	.LANCHOR106
 	.word	.LANCHOR127
 	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
@@ -5651,26 +5680,26 @@ allocate_data_superblock:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-.L732:
-	ldr	r3, .L771
-	ldr	r8, .L771+68
+.L751:
+	ldr	r3, .L790
+	ldr	r8, .L790+68
 	ldrh	r3, [r3]
-	ldr	r10, .L771+72
+	ldr	r10, .L790+72
 	ldrh	r2, [r8]
 	add	r3, r3, r2
 	ldrh	r2, [r10]
 	cmp	r3, r2
-	ble	.L733
-	movw	r2, #2661
-	ldr	r1, .L771+4
-	ldr	r0, .L771+8
+	ble	.L752
+	mov	r2, #2656
+	ldr	r1, .L790+4
+	ldr	r0, .L790+8
 	bl	printf
-.L733:
-	ldr	r3, .L771+12
+.L752:
+	ldr	r3, .L790+12
 	cmp	r4, r3
-	bne	.L759
-	ldr	r3, .L771
-	ldr	r2, .L771+16
+	bne	.L778
+	ldr	r3, .L790
+	ldr	r2, .L790+16
 	ldrh	r3, [r3]
 	ldr	r2, [r2]
 	lsrs	r1, r3, #1
@@ -5678,118 +5707,118 @@ allocate_data_superblock:
 	adds	r1, r1, #1
 	add	r1, r1, r2, lsr #2
 	uxth	r1, r1
-	cbz	r1, .L734
+	cbz	r1, .L753
 	subs	r1, r1, #1
 	uxth	r1, r1
-.L734:
-	ldr	r0, .L771+20
+.L753:
+	ldr	r0, .L790+20
 	bl	List_pop_index_node
-	ldr	r3, .L771
+	ldr	r3, .L790
 	mov	r5, r0
 	uxth	r7, r0
 	ldrh	r3, [r3]
-	cbnz	r3, .L735
-	movw	r2, #2670
-	ldr	r1, .L771+4
-	ldr	r0, .L771+8
+	cbnz	r3, .L754
+	movw	r2, #2665
+	ldr	r1, .L790+4
+	ldr	r0, .L790+8
 	bl	printf
-.L735:
-	ldr	r3, .L771
-	ldr	r2, .L771
+.L754:
+	ldr	r3, .L790
+	ldr	r2, .L790
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	strh	r3, [r2]	@ movhi
 	ldrh	r3, [r10]
 	cmp	r3, r7
-	bls	.L732
+	bls	.L751
 	uxth	r5, r5
 	lsls	r3, r5, #1
 	str	r3, [sp]
-	ldr	r3, .L771+24
+	ldr	r3, .L790+24
 	ldr	r3, [r3]
 	ldrh	r6, [r3, r5, lsl #1]
 	cmp	r6, #0
-	bne	.L732
+	bne	.L751
 	strh	r7, [r4]	@ movhi
 	mov	r0, r4
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L737
-	ldr	r3, .L771+24
+	cbnz	r3, .L756
+	ldr	r3, .L790+24
 	movw	r2, #65535
 	mov	r0, r7
 	ldr	r3, [r3]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
 	bl	INSERT_DATA_LIST
-	ldr	r3, .L771
+	ldr	r3, .L790
 	ldrh	r2, [r8]
 	ldrh	r3, [r3]
 	add	r3, r3, r2
 	ldrh	r2, [r10]
 	cmp	r3, r2
-	ble	.L732
-	movw	r2, #2684
-	ldr	r1, .L771+4
-	ldr	r0, .L771+8
+	ble	.L751
+	movw	r2, #2679
+	ldr	r1, .L790+4
+	ldr	r0, .L790+8
 	bl	printf
-	b	.L732
-.L759:
+	b	.L751
+.L778:
 	movs	r1, #0
-	b	.L734
-.L737:
-	ldr	r3, .L771
+	b	.L753
+.L756:
+	ldr	r3, .L790
 	ldrh	r2, [r8]
 	ldrh	r3, [r3]
 	add	r3, r3, r2
 	ldrh	r2, [r10]
 	cmp	r3, r2
-	ble	.L739
-	movw	r2, #2687
-	ldr	r1, .L771+4
-	ldr	r0, .L771+8
+	ble	.L758
+	movw	r2, #2682
+	ldr	r1, .L790+4
+	ldr	r0, .L790+8
 	bl	printf
-.L739:
-	ldr	r3, .L771+28
+.L758:
+	ldr	r3, .L790+28
 	add	lr, r4, #16
-	ldr	r2, .L771+32
+	ldr	r2, .L790+32
 	mov	r8, #0
 	ldr	ip, [r3]
 	ldrh	r0, [r2]
 	movs	r2, #20
 	mov	r3, ip
 	mla	r0, r2, r0, ip
-.L740:
+.L759:
 	cmp	r0, r3
-	bne	.L742
-	cbnz	r6, .L743
-	movw	r2, #2698
-	ldr	r1, .L771+4
-	ldr	r0, .L771+8
+	bne	.L761
+	cbnz	r6, .L762
+	movw	r2, #2693
+	ldr	r1, .L790+4
+	ldr	r0, .L790+8
 	bl	printf
-.L743:
-	ldr	r3, .L771+36
+.L762:
+	ldr	r3, .L790+36
 	ldrh	r3, [r3]
 	cmp	r3, r7
-	bne	.L744
-	movw	r2, #2700
-	ldr	r1, .L771+4
-	ldr	r0, .L771+8
+	bne	.L763
+	movw	r2, #2695
+	ldr	r1, .L790+4
+	ldr	r0, .L790+8
 	bl	printf
-.L744:
+.L763:
 	ldrb	r2, [r4, #8]	@ zero_extendqisi2
-	ldr	r3, .L771+40
-	ldr	fp, .L771+76
-	ldr	r8, .L771+80
+	ldr	r3, .L790+40
+	ldr	fp, .L790+76
+	ldr	r8, .L790+80
 	ldr	r1, [r3]
 	cmp	r2, #0
-	bne	.L745
+	bne	.L764
 	ldrh	r2, [r1, r5, lsl #1]
 	cmp	r2, #0
-	beq	.L746
-	ldr	r0, .L771+44
+	beq	.L765
+	ldr	r0, .L790+44
 	ldrh	r0, [r0]
 	add	r2, r2, r0
-.L769:
+.L788:
 	strh	r2, [r1, r5, lsl #1]	@ movhi
 	mov	r0, r7
 	ldr	r2, [fp]
@@ -5798,83 +5827,83 @@ allocate_data_superblock:
 	adds	r2, r2, #1
 	str	r2, [fp]
 	bl	ftl_set_blk_mode
-.L770:
+.L789:
 	ldr	r3, [sp, #4]
 	ldr	r0, [fp]
 	ldr	r3, [r3]
 	ldrh	r1, [r3, r5, lsl #1]
-	ldr	r3, .L771+48
+	ldr	r3, .L790+48
 	ldr	r2, [r3]
 	cmp	r1, r2
 	it	hi
 	strhi	r1, [r3]
-	ldr	r3, .L771+44
+	ldr	r3, .L790+44
 	ldrh	r1, [r10]
 	ldrh	r2, [r3]
 	ldr	r3, [r8]
 	mla	r0, r0, r2, r3
 	bl	__aeabi_uidiv
-	ldr	r3, .L771+52
-	ldr	ip, .L771+84
+	ldr	r3, .L790+52
+	ldr	ip, .L790+84
 	str	r0, [r3]
-	ldr	r3, .L771+56
+	ldr	r3, .L790+56
 	ldr	r2, [r3]
 	ldr	r3, [r2, #16]
 	adds	r3, r3, #1
 	str	r3, [r2, #16]
 	movs	r2, #20
-	ldr	r3, .L771+28
+	ldr	r3, .L790+28
 	ldr	r0, [r3]
 	adds	r3, r0, #4
 	mla	r2, r2, r6, r0
 	adds	r2, r2, #24
-.L750:
+.L769:
 	adds	r3, r3, #20
 	cmp	r2, r3
-	bne	.L751
+	bne	.L770
 	mov	r2, r6
 	ldrb	r1, [r4, #8]	@ zero_extendqisi2
 	mov	r8, #0
 	bl	FlashEraseBlocks
 	mov	r10, r8
 	movs	r3, #20
-.L752:
+.L771:
 	uxth	r2, r8
 	cmp	r6, r2
-	bhi	.L754
+	bhi	.L773
 	cmp	r10, #0
-	beq	.L755
+	beq	.L774
 	mov	r0, r7
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L755:
+.L774:
 	ldrb	r2, [r4, #7]	@ zero_extendqisi2
 	cmp	r2, #0
-	bne	.L756
-	ldr	r3, .L771+24
+	bne	.L775
+	ldr	r3, .L790+24
 	movw	r2, #65535
 	ldr	r3, [r3]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
-	b	.L732
-.L742:
+	b	.L751
+.L761:
 	ldrh	r1, [lr], #2
 	movw	fp, #65535
 	str	r8, [r3, #8]
 	str	r8, [r3, #12]
 	cmp	r1, fp
-	beq	.L741
+	beq	.L760
 	mla	fp, r2, r6, ip
 	adds	r6, r6, #1
 	lsls	r1, r1, #10
 	uxth	r6, r6
 	str	r1, [fp, #4]
-.L741:
+.L760:
 	adds	r3, r3, #20
-	b	.L740
-.L746:
+	b	.L759
+.L765:
 	movs	r2, #2
-	b	.L769
-.L745:
+	b	.L788
+.L764:
 	ldrh	r2, [r1, r5, lsl #1]
 	mov	r0, r7
 	str	r3, [sp, #4]
@@ -5884,20 +5913,20 @@ allocate_data_superblock:
 	adds	r2, r2, #1
 	str	r2, [r8]
 	bl	ftl_set_blk_mode.part.6
-	b	.L770
-.L751:
+	b	.L789
+.L770:
 	ldr	r1, [r3, #-20]
 	and	r1, r1, ip
 	str	r1, [r3, #-20]
-	b	.L750
-.L754:
-	ldr	r1, .L771+28
+	b	.L769
+.L773:
+	ldr	r1, .L790+28
 	mul	r2, r3, r8
 	ldr	r1, [r1]
 	ldr	fp, [r1, r2]
 	adds	r0, r1, r2
 	cmp	fp, #-1
-	bne	.L753
+	bne	.L772
 	ldr	r0, [r0, #4]
 	add	r10, r10, #1
 	str	r3, [sp, #4]
@@ -5909,12 +5938,12 @@ allocate_data_superblock:
 	ldrb	r2, [r4, #7]	@ zero_extendqisi2
 	subs	r2, r2, #1
 	strb	r2, [r4, #7]
-.L753:
+.L772:
 	add	r8, r8, #1
-	b	.L752
-.L756:
-	ldr	r3, .L771+60
-	ldr	r1, .L771+64
+	b	.L771
+.L775:
+	ldr	r3, .L790+60
+	ldr	r1, .L790+64
 	ldrh	r3, [r3]
 	strh	r7, [r4]	@ movhi
 	smulbb	r3, r3, r2
@@ -5927,45 +5956,45 @@ allocate_data_superblock:
 	str	r2, [r4, #12]
 	adds	r2, r2, #1
 	str	r2, [r1]
-	ldr	r2, .L771+24
+	ldr	r2, .L790+24
 	ldr	r1, [sp]
 	ldr	r2, [r2]
 	strh	r3, [r2, r1]	@ movhi
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L757
+	cbz	r3, .L776
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L758
-.L757:
-	movw	r2, #2753
-	ldr	r1, .L771+4
-	ldr	r0, .L771+8
+	cbnz	r3, .L777
+.L776:
+	movw	r2, #2748
+	ldr	r1, .L790+4
+	ldr	r0, .L790+8
 	bl	printf
-.L758:
+.L777:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L772:
+.L791:
 	.align	2
-.L771:
+.L790:
 	.word	.LANCHOR48
-	.word	.LANCHOR143
+	.word	.LANCHOR144
 	.word	.LC1
 	.word	.LANCHOR53
 	.word	.LANCHOR95
-	.word	.LANCHOR47
+	.word	.LANCHOR46
 	.word	.LANCHOR42
 	.word	.LANCHOR79
 	.word	.LANCHOR3
-	.word	.LANCHOR144
-	.word	.LANCHOR43
+	.word	.LANCHOR145
+	.word	.LANCHOR47
 	.word	.LANCHOR14
 	.word	.LANCHOR92
-	.word	.LANCHOR145
+	.word	.LANCHOR143
 	.word	.LANCHOR118
 	.word	.LANCHOR19
 	.word	.LANCHOR82
-	.word	.LANCHOR45
+	.word	.LANCHOR44
 	.word	.LANCHOR5
 	.word	.LANCHOR90
 	.word	.LANCHOR91
@@ -5984,43 +6013,43 @@ FtlGcFreeBadSuperBlk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, r0
-	ldr	r4, .L785
+	ldr	r4, .L804
 	ldrh	r3, [r4]
-	cbz	r3, .L774
-	ldr	r8, .L785+12
+	cbz	r3, .L793
+	ldr	r8, .L804+12
 	movs	r7, #0
-.L775:
-	ldr	r3, .L785+4
+.L794:
+	ldr	r3, .L804+4
 	ldrh	r2, [r3]
 	uxth	r3, r7
 	cmp	r2, r3
-	bhi	.L781
+	bhi	.L800
 	bl	FtlGcReFreshBadBlk
-.L774:
+.L793:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L781:
-	ldr	r2, .L785+8
+.L800:
+	ldr	r2, .L804+8
 	uxth	r3, r7
 	mov	r1, r10
 	mov	fp, #0
 	ldrb	r0, [r2, r3]	@ zero_extendqisi2
 	bl	V2P_block
 	mov	r1, r0
-.L776:
+.L795:
 	ldrh	r3, [r4]
 	uxth	r5, fp
 	cmp	r3, r5
-	bhi	.L780
+	bhi	.L799
 	adds	r7, r7, #1
-	b	.L775
-.L780:
+	b	.L794
+.L799:
 	uxth	r6, fp
 	ldrh	r3, [r8, r6, lsl #1]
 	cmp	r3, r1
-	bne	.L777
+	bne	.L796
 	mov	r0, r1
 	str	r1, [sp, #4]
 	bl	FtlBbmMapBadBlock
@@ -6028,23 +6057,23 @@ FtlGcFreeBadSuperBlk:
 	ldrh	r2, [r4]
 	add	r3, r8, r6, lsl #1
 	ldr	r1, [sp, #4]
-.L778:
+.L797:
 	cmp	r5, r2
-	bcc	.L779
+	bcc	.L798
 	subs	r2, r2, #1
 	strh	r2, [r4]	@ movhi
-.L777:
+.L796:
 	add	fp, fp, #1
-	b	.L776
-.L779:
+	b	.L795
+.L798:
 	ldrh	r0, [r3, #2]!
 	adds	r5, r5, #1
 	uxth	r5, r5
 	strh	r0, [r3, #-2]	@ movhi
-	b	.L778
-.L786:
+	b	.L797
+.L805:
 	.align	2
-.L785:
+.L804:
 	.word	.LANCHOR74
 	.word	.LANCHOR3
 	.word	.LANCHOR13
@@ -6063,29 +6092,41 @@ update_vpc_list:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	mov	r4, r0
-	ldr	r3, .L797
+	ldr	r3, .L818
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	bne	.L788
-	ldr	r2, .L797+4
-	ldrh	r1, [r2]
-	cmp	r1, r0
-	bne	.L789
-	movw	r3, #65535
-	strh	r3, [r2]	@ movhi
-.L790:
-	ldr	r5, .L797+8
+	bne	.L807
+	ldr	r3, .L818+4
+	ldrh	r2, [r3]
+	cmp	r2, r0
+	itt	eq
+	movweq	r2, #65535
+	strheq	r2, [r3]	@ movhi
+	ldr	r3, .L818+8
+	ldrh	r2, [r3]
+	cmp	r2, r0
+	itt	eq
+	movweq	r2, #65535
+	strheq	r2, [r3]	@ movhi
+	ldr	r3, .L818+12
+	ldrh	r2, [r3]
+	cmp	r2, r0
+	bne	.L810
+	movw	r2, #65535
+	strh	r2, [r3]	@ movhi
+.L811:
+	ldr	r5, .L818+16
 	mov	r1, r4
-	ldr	r0, .L797+12
+	ldr	r0, .L818+20
 	bl	List_remove_node
 	ldrh	r3, [r5]
-	cbnz	r3, .L792
-	movw	r2, #2823
-	ldr	r1, .L797+16
-	ldr	r0, .L797+20
+	cbnz	r3, .L813
+	movw	r2, #2824
+	ldr	r1, .L818+24
+	ldr	r0, .L818+28
 	bl	printf
-.L792:
+.L813:
 	ldrh	r3, [r5]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -6093,47 +6134,48 @@ update_vpc_list:
 	bl	free_data_superblock
 	mov	r0, r4
 	bl	FtlGcFreeBadSuperBlk
-	ldr	r3, .L797+24
+	ldr	r3, .L818+32
 	ldrh	r2, [r5]
 	ldrh	r3, [r3]
 	add	r3, r3, r2
-	ldr	r2, .L797+28
+	ldr	r2, .L818+36
 	ldrh	r2, [r2]
 	cmp	r3, r2
-	ble	.L796
-	movw	r2, #2826
-	ldr	r1, .L797+16
-	ldr	r0, .L797+20
+	ble	.L817
+	movw	r2, #2827
+	ldr	r1, .L818+24
+	ldr	r0, .L818+28
 	bl	printf
-.L796:
-	movs	r3, #1
-	b	.L787
-.L789:
-	ldr	r2, .L797+32
-	ldrh	r2, [r2]
-	cmp	r2, r0
-	beq	.L787
-	ldr	r2, .L797+36
-	ldrh	r2, [r2]
-	cmp	r2, r0
-	beq	.L787
-	ldr	r2, .L797+40
-	ldrh	r2, [r2]
-	cmp	r2, r0
-	bne	.L790
-.L787:
-	mov	r0, r3
+.L817:
+	movs	r0, #1
 	pop	{r3, r4, r5, pc}
-.L788:
+.L810:
+	ldr	r3, .L818+40
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	beq	.L816
+	ldr	r3, .L818+44
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	beq	.L816
+	ldr	r3, .L818+48
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bne	.L811
+.L816:
+	movs	r0, #0
+	pop	{r3, r4, r5, pc}
+.L807:
 	bl	List_update_data_list
-	movs	r3, #0
-	b	.L787
-.L798:
+	b	.L816
+.L819:
 	.align	2
-.L797:
+.L818:
 	.word	.LANCHOR42
-	.word	.LANCHOR144
-	.word	.LANCHOR45
+	.word	.LANCHOR72
+	.word	.LANCHOR73
+	.word	.LANCHOR145
+	.word	.LANCHOR44
 	.word	.LANCHOR41
 	.word	.LANCHOR146
 	.word	.LC1
@@ -6158,47 +6200,47 @@ decrement_vpc_count:
 	push	{r4, r5, r6, lr}
 	cmp	r0, r3
 	mov	r4, r0
-	beq	.L800
-	ldr	r5, .L808
+	beq	.L821
+	ldr	r5, .L829
 	ldr	r3, [r5]
 	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L801
+	cbnz	r2, .L822
 	mov	r1, r0
-	ldr	r0, .L808+4
+	ldr	r0, .L829+4
 	bl	printf
 	ldr	r3, [r5]
 	ldrh	r5, [r3, r4, lsl #1]
-	cbz	r5, .L802
-.L806:
+	cbz	r5, .L823
+.L827:
 	movs	r5, #0
-.L799:
+.L820:
 	mov	r0, r5
 	pop	{r4, r5, r6, pc}
-.L802:
-	movw	r2, #2841
-.L807:
-	ldr	r1, .L808+8
-	ldr	r0, .L808+12
+.L823:
+	movw	r2, #2842
+.L828:
+	ldr	r1, .L829+8
+	ldr	r0, .L829+12
 	bl	printf
-	b	.L799
-.L801:
+	b	.L820
+.L822:
 	subs	r2, r2, #1
 	strh	r2, [r3, r0, lsl #1]	@ movhi
-.L800:
-	ldr	r6, .L808+16
+.L821:
+	ldr	r6, .L829+16
 	movw	r3, #65535
 	ldrh	r0, [r6]
 	cmp	r0, r3
-	bne	.L804
+	bne	.L825
 	strh	r4, [r6]	@ movhi
-	b	.L806
-.L804:
+	b	.L827
+.L825:
 	cmp	r4, r0
-	beq	.L806
+	beq	.L827
 	bl	update_vpc_list
-	ldr	r3, .L808+20
+	ldr	r3, .L829+20
 	adds	r5, r0, #0
-	ldr	r2, .L808+24
+	ldr	r2, .L829+24
 	it	ne
 	movne	r5, #1
 	strh	r4, [r6]	@ movhi
@@ -6206,23 +6248,23 @@ decrement_vpc_count:
 	ldr	r2, [r2]
 	subs	r3, r3, r2
 	asrs	r2, r3, #1
-	ldr	r3, .L808+28
+	ldr	r3, .L829+28
 	muls	r3, r2, r3
-	ldr	r2, .L808
+	ldr	r2, .L829
 	ldr	r2, [r2]
 	uxth	r1, r3
 	ldrh	r2, [r2, r1, lsl #1]
 	cmp	r2, #0
-	bne	.L799
+	bne	.L820
 	cmp	r4, r1
-	beq	.L799
-	movw	r2, #2857
-	b	.L807
-.L809:
+	beq	.L820
+	movw	r2, #2858
+	b	.L828
+.L830:
 	.align	2
-.L808:
+.L829:
 	.word	.LANCHOR42
-	.word	.LC17
+	.word	.LC21
 	.word	.LANCHOR147
 	.word	.LC1
 	.word	.LANCHOR131
@@ -6244,14 +6286,14 @@ FtlSuperblockPowerLostFix:
 	push	{r4, r5, r6, r7, r8, lr}
 	mov	r3, #-1
 	sub	sp, sp, #24
-	ldr	r2, .L823
+	ldr	r2, .L844
 	movs	r6, #0
 	mov	r4, r0
 	str	r3, [sp, #20]
-	ldr	r3, .L823+4
+	ldr	r3, .L844+4
 	ldr	r5, [r2]
 	mvn	r2, #2
-	ldr	r8, .L823+16
+	ldr	r8, .L844+16
 	ldr	r3, [r3]
 	str	r5, [sp, #16]
 	str	r3, [sp, #12]
@@ -6272,18 +6314,18 @@ FtlSuperblockPowerLostFix:
 	ite	eq
 	moveq	r7, #6
 	movne	r7, #7
-.L816:
+.L837:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L812
-.L813:
-	ldr	r3, .L823+8
+	cbnz	r3, .L833
+.L834:
+	ldr	r3, .L844+8
 	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
-	ldr	r3, .L823+12
+	ldr	r3, .L844+12
 	ldrh	r3, [r3]
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
@@ -6292,12 +6334,12 @@ FtlSuperblockPowerLostFix:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L812:
+.L833:
 	mov	r0, r4
 	bl	get_new_active_ppa
 	str	r0, [sp, #8]
 	adds	r0, r0, #1
-	beq	.L813
+	beq	.L834
 	ldr	r3, [r8]
 	movs	r1, #1
 	add	r0, sp, #4
@@ -6313,11 +6355,11 @@ FtlSuperblockPowerLostFix:
 	ldrh	r0, [r4]
 	bl	decrement_vpc_count
 	subs	r7, r7, #1
-	bne	.L816
-	b	.L813
-.L824:
+	bne	.L837
+	b	.L834
+.L845:
 	.align	2
-.L823:
+.L844:
 	.word	.LANCHOR114
 	.word	.LANCHOR106
 	.word	.LANCHOR42
@@ -6337,61 +6379,61 @@ FtlMakeBbt:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r6, #0
-	ldr	r7, .L844
+	ldr	r7, .L865
 	bl	FtlBbtMemInit
 	sub	r8, r7, #18
 	bl	FtlLoadFactoryBbt
-.L826:
-	ldr	r3, .L844+4
+.L847:
+	ldr	r3, .L865+4
 	ldrh	r3, [r3]
 	cmp	r6, r3
-	bcc	.L832
-	ldr	r5, .L844+8
+	bcc	.L853
+	ldr	r5, .L865+8
 	movs	r4, #0
-.L833:
+.L854:
 	ldrh	r3, [r5]
 	uxth	r0, r4
 	adds	r4, r4, #1
 	cmp	r3, r0
-	bhi	.L834
-	ldr	r4, .L844+12
+	bhi	.L855
+	ldr	r4, .L865+12
 	movw	r6, #65535
 	ldrh	r5, [r4, #12]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L835:
+.L856:
 	ldrh	r3, [r4, #12]
 	subs	r3, r3, #47
 	cmp	r3, r5
-	bgt	.L839
+	bgt	.L860
 	mov	r0, r5
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L836
+	beq	.L857
 	mov	r0, r5
 	bl	FlashTestBlk
 	cmp	r0, #0
-	beq	.L837
+	beq	.L858
 	mov	r0, r5
 	bl	FtlBbmMapBadBlock
-.L836:
+.L857:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L835
-.L832:
-	ldr	r3, .L844+16
-	ldr	r5, .L844+20
+	b	.L856
+.L853:
+	ldr	r3, .L865+16
+	ldr	r5, .L865+20
 	ldrh	r2, [r8, #2]!
-	ldr	r4, .L844+24
+	ldr	r4, .L865+24
 	ldr	r0, [r3]
 	movw	r3, #65535
 	ldr	r10, [r5]
 	cmp	r2, r3
 	mov	fp, r4
-	ldr	r3, .L844+28
+	ldr	r3, .L865+28
 	str	r0, [r4, #8]
 	str	r10, [r4, #12]
-	beq	.L827
+	beq	.L848
 	ldrh	r5, [r3]
 	mov	r0, r4
 	str	r3, [sp]
@@ -6408,13 +6450,13 @@ FtlMakeBbt:
 	adds	r2, r2, #7
 	asrs	r2, r2, #3
 	bl	ftl_memcpy
-.L828:
+.L849:
 	uxth	r0, r5
 	adds	r6, r6, #1
 	adds	r7, r7, #4
 	bl	FtlBbmMapBadBlock
-	b	.L826
-.L827:
+	b	.L847
+.L848:
 	mov	r1, r6
 	str	r3, [sp]
 	bl	FlashGetBadBlockList
@@ -6426,21 +6468,21 @@ FtlMakeBbt:
 	ldrh	r4, [r3]
 	subs	r4, r4, #1
 	uxth	r4, r4
-.L829:
+.L850:
 	ldr	r3, [sp]
 	ldrh	r0, [r3]
 	smlabb	r0, r0, r6, r4
 	uxth	r0, r0
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L830
+	beq	.L851
 	ldr	r3, [sp, #4]
 	movs	r2, #16
 	movs	r1, #0
 	strh	r4, [r8]	@ movhi
 	ldr	r0, [r3]
 	bl	ftl_memset
-	ldr	r3, .L844+16
+	ldr	r3, .L865+16
 	mov	r2, #4096
 	movs	r1, #0
 	ldr	r0, [r3]
@@ -6458,42 +6500,42 @@ FtlMakeBbt:
 	mla	r5, r6, r5, r3
 	lsls	r3, r5, #10
 	str	r3, [fp, #4]
-	ldr	r3, .L844+32
+	ldr	r3, .L865+32
 	ldrh	r2, [r3]
 	lsls	r2, r2, #2
 	bl	ftl_memcpy
 	movs	r2, #1
-	ldr	r0, .L844+24
+	ldr	r0, .L865+24
 	mov	r1, r2
 	bl	FlashEraseBlocks
 	movs	r3, #1
-	ldr	r0, .L844+24
+	ldr	r0, .L865+24
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
 	ldr	r3, [fp]
 	adds	r3, r3, #1
-	bne	.L828
+	bne	.L849
 	uxth	r0, r5
 	bl	FtlBbmMapBadBlock
-	b	.L829
-.L830:
+	b	.L850
+.L851:
 	subs	r4, r4, #1
 	uxth	r4, r4
-	b	.L829
-.L834:
+	b	.L850
+.L855:
 	bl	FtlBbmMapBadBlock
-	b	.L833
-.L837:
+	b	.L854
+.L858:
 	ldrh	r3, [r4]
 	cmp	r3, r6
-	bne	.L838
+	bne	.L859
 	strh	r5, [r4]	@ movhi
-	b	.L836
-.L838:
+	b	.L857
+.L859:
 	strh	r5, [r4, #4]	@ movhi
-.L839:
-	ldr	r3, .L844+36
+.L860:
+	ldr	r3, .L865+36
 	movs	r5, #0
 	str	r5, [r4, #8]
 	movs	r1, #1
@@ -6525,9 +6567,9 @@ FtlMakeBbt:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L845:
+.L866:
 	.align	2
-.L844:
+.L865:
 	.word	.LANCHOR37+28
 	.word	.LANCHOR10
 	.word	.LANCHOR25
@@ -6564,24 +6606,24 @@ ftl_memcmp:
 js_hash:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L850
+	ldr	r3, .L871
 	add	r1, r1, r0
 	push	{r4, lr}
-.L848:
+.L869:
 	cmp	r0, r1
-	bne	.L849
+	bne	.L870
 	mov	r0, r3
 	pop	{r4, pc}
-.L849:
+.L870:
 	lsrs	r2, r3, #2
 	ldrb	r4, [r0], #1	@ zero_extendqisi2
 	add	r2, r2, r3, lsl #5
 	add	r2, r2, r4
 	eors	r3, r3, r2
-	b	.L848
-.L851:
+	b	.L869
+.L872:
 	.align	2
-.L850:
+.L871:
 	.word	1204201446
 	.size	js_hash, .-js_hash
 	.section	.text.Ftl_write_map_blk_to_last_page,"ax",%progbits
@@ -6601,14 +6643,14 @@ Ftl_write_map_blk_to_last_page:
 	mov	r4, r0
 	ldr	r5, [r0, #12]
 	cmp	r3, r2
-	bne	.L853
+	bne	.L874
 	ldrh	r3, [r0, #8]
-	cbz	r3, .L854
+	cbz	r3, .L875
 	movw	r2, #641
-	ldr	r1, .L862
-	ldr	r0, .L862+4
+	ldr	r1, .L883
+	ldr	r0, .L883+4
 	bl	printf
-.L854:
+.L875:
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
@@ -6620,20 +6662,20 @@ Ftl_write_map_blk_to_last_page:
 	ldr	r3, [r4, #28]
 	adds	r3, r3, #1
 	str	r3, [r4, #28]
-.L855:
+.L876:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L853:
+.L874:
 	ldrh	r7, [r5, r3, lsl #1]
 	movs	r1, #255
 	ldrh	r3, [r0, #2]
-	ldr	r6, .L862+8
-	ldr	r10, .L862+24
+	ldr	r6, .L883+8
+	ldr	r10, .L883+24
 	ldr	r8, [r0, #24]
 	orr	r3, r3, r7, lsl #10
 	ldr	r0, [r10]
 	str	r3, [r6, #4]
-	ldr	r3, .L862+12
+	ldr	r3, .L883+12
 	str	r0, [r6, #8]
 	ldr	r5, [r3]
 	ldr	r3, [r4, #28]
@@ -6644,7 +6686,7 @@ Ftl_write_map_blk_to_last_page:
 	ldrh	r3, [r4, #4]
 	strh	r7, [r5, #2]	@ movhi
 	strh	r3, [r5]	@ movhi
-	ldr	r3, .L862+16
+	ldr	r3, .L883+16
 	ldrh	r2, [r3]
 	lsls	r2, r2, #3
 	bl	ftl_memset
@@ -6652,11 +6694,11 @@ Ftl_write_map_blk_to_last_page:
 	movs	r3, #0
 	ldr	r1, [r10]
 	mov	r2, r3
-.L856:
+.L877:
 	uxth	r0, r3
 	cmp	ip, r0
-	bhi	.L858
-	ldr	r3, .L862+20
+	bhi	.L879
+	ldr	r3, .L883+20
 	ldr	r0, [r6, #8]
 	ldrh	r1, [r3]
 	bl	js_hash
@@ -6664,30 +6706,30 @@ Ftl_write_map_blk_to_last_page:
 	str	r0, [r5, #12]
 	movs	r3, #0
 	mov	r1, r2
-	ldr	r0, .L862+8
+	ldr	r0, .L883+8
 	bl	FlashProgPages
 	ldrh	r3, [r4, #2]
 	mov	r0, r4
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	bl	ftl_map_blk_gc
-	b	.L855
-.L858:
+	b	.L876
+.L879:
 	ldr	r0, [r8, r3, lsl #2]
 	cmp	r7, r0, lsr #10
-	bne	.L857
+	bne	.L878
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r3, [r1, r2, lsl #3]
 	add	lr, r1, r2, lsl #3
 	ldr	r0, [r8, r3, lsl #2]
 	str	r0, [lr, #4]
-.L857:
+.L878:
 	adds	r3, r3, #1
-	b	.L856
-.L863:
+	b	.L877
+.L884:
 	.align	2
-.L862:
+.L883:
 	.word	.LANCHOR148
 	.word	.LC1
 	.word	.LANCHOR138
@@ -6709,13 +6751,13 @@ FtlMapWritePage:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-	ldr	r8, .L888+32
+	ldr	r8, .L909+32
 	mov	r7, r1
 	movs	r6, #0
 	str	r2, [sp]
 	mov	fp, r8
-.L865:
-	ldr	r2, .L888
+.L886:
+	ldr	r2, .L909
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
@@ -6723,44 +6765,44 @@ FtlMapWritePage:
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	bge	.L866
+	bge	.L887
 	ldrh	r2, [r4]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L867
-.L866:
+	bne	.L888
+.L887:
 	mov	r0, r4
 	bl	Ftl_write_map_blk_to_last_page
-.L867:
+.L888:
 	ldrh	r2, [r4]
 	ldr	r3, [r4, #12]
 	ldrh	r3, [r3, r2, lsl #1]
-	cbnz	r3, .L868
+	cbnz	r3, .L889
 	mov	r2, #700
-	ldr	r1, .L888+4
-	ldr	r0, .L888+8
+	ldr	r1, .L909+4
+	ldr	r0, .L909+8
 	bl	printf
-.L868:
+.L889:
 	ldrh	r2, [r4]
 	ldrh	r3, [r4, #10]
 	cmp	r2, r3
-	bcc	.L869
+	bcc	.L890
 	movw	r2, #701
-	ldr	r1, .L888+4
-	ldr	r0, .L888+8
+	ldr	r1, .L909+4
+	ldr	r0, .L909+8
 	bl	printf
-.L869:
+.L890:
 	ldrh	r2, [r4]
 	movs	r1, #0
 	ldr	r3, [r4, #12]
-	ldr	r5, .L888+12
+	ldr	r5, .L909+12
 	ldrh	r3, [r3, r2, lsl #1]
 	ldrh	r2, [r4, #2]
 	str	r3, [sp, #4]
 	orr	r2, r2, r3, lsl #10
 	ldr	r3, [sp]
 	str	r2, [r5, #4]
-	ldr	r2, .L888+16
+	ldr	r2, .L909+16
 	str	r3, [r5, #8]
 	ldr	r0, [r2]
 	movs	r2, #16
@@ -6773,7 +6815,7 @@ FtlMapWritePage:
 	str	r1, [r10, #4]
 	ldrh	r1, [r4, #4]
 	strh	r3, [r10, #2]	@ movhi
-	ldr	r3, .L888+20
+	ldr	r3, .L909+20
 	strh	r1, [r10]	@ movhi
 	strh	r7, [r10, #8]	@ movhi
 	ldrh	r1, [r3]
@@ -6790,10 +6832,10 @@ FtlMapWritePage:
 	uxth	r2, r2
 	adds	r3, r1, #1
 	strh	r2, [r4, #2]	@ movhi
-	bne	.L870
+	bne	.L891
 	ldr	r1, [r5, #4]
 	adds	r6, r6, #1
-	ldr	r0, .L888+24
+	ldr	r0, .L909+24
 	uxth	r6, r6
 	bl	printf
 	ldrh	r2, [r4, #2]
@@ -6803,48 +6845,48 @@ FtlMapWritePage:
 	addls	r2, r2, #-1
 	strhls	r2, [r4, #2]	@ movhi
 	cmp	r6, #3
-	bls	.L872
+	bls	.L893
 	mov	r2, r6
 	ldr	r1, [r5, #4]
-	ldr	r0, .L888+28
+	ldr	r0, .L909+28
 	bl	printf
-.L873:
-	b	.L873
-.L872:
+.L894:
+	b	.L894
+.L893:
 	ldr	r3, [r4, #32]
 	cmp	r3, #0
-	beq	.L865
-.L887:
-	b	.L887
-.L870:
+	beq	.L886
+.L908:
+	b	.L908
+.L891:
 	cmp	r2, #1
-	beq	.L876
+	beq	.L897
 	cmp	r1, #256
-	beq	.L876
+	beq	.L897
 	ldr	r0, [r4, #36]
-	cbz	r0, .L877
-.L876:
+	cbz	r0, .L898
+.L897:
 	movs	r3, #0
 	str	r3, [r4, #36]
-	b	.L865
-.L877:
+	b	.L886
+.L898:
 	ldr	r2, [r5, #4]
 	ldr	r3, [r4, #24]
 	str	r2, [r3, r7, lsl #2]
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L889:
+.L910:
 	.align	2
-.L888:
+.L909:
 	.word	.LANCHOR88
 	.word	.LANCHOR149
 	.word	.LC1
 	.word	.LANCHOR138
 	.word	.LANCHOR114
 	.word	.LANCHOR23
-	.word	.LC18
-	.word	.LC19
+	.word	.LC22
+	.word	.LC23
 	.word	.LANCHOR20
 	.size	FtlMapWritePage, .-FtlMapWritePage
 	.section	.text.load_l2p_region,"ax",%progbits
@@ -6858,31 +6900,31 @@ FtlMapWritePage:
 load_l2p_region:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L897
+	ldr	r3, .L918
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r5, r0
 	mov	r10, r1
 	ldrh	r2, [r3]
 	str	r3, [sp, #4]
 	cmp	r2, r0
-	bcs	.L891
+	bcs	.L912
 	movw	r2, #485
-	ldr	r1, .L897+4
-	ldr	r0, .L897+8
+	ldr	r1, .L918+4
+	ldr	r0, .L918+8
 	bl	printf
-.L891:
-	ldr	fp, .L897+48
+.L912:
+	ldr	fp, .L918+48
 	movs	r4, #12
-	ldr	r7, .L897+12
+	ldr	r7, .L918+12
 	ldr	r3, [fp]
 	ldr	r8, [r3, r5, lsl #2]
 	cmp	r8, #0
-	bne	.L892
+	bne	.L913
 	mul	r4, r4, r10
 	ldr	r2, [r7]
 	movs	r1, #255
 	adds	r0, r2, r4
-	ldr	r2, .L897+16
+	ldr	r2, .L918+16
 	ldr	r0, [r0, #8]
 	ldrh	r2, [r2]
 	bl	ftl_memset
@@ -6890,21 +6932,21 @@ load_l2p_region:
 	adds	r1, r2, r4
 	strh	r5, [r2, r4]	@ movhi
 	str	r8, [r1, #4]
-.L893:
+.L914:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L892:
+.L913:
 	mul	r4, r4, r10
 	ldr	r2, [r7]
-	ldr	r6, .L897+20
+	ldr	r6, .L918+20
 	add	r2, r2, r4
 	mov	r0, r6
 	ldr	r2, [r2, #8]
 	str	r8, [r6, #4]
 	str	r2, [r6, #8]
-	ldr	r2, .L897+24
+	ldr	r2, .L918+24
 	ldr	r2, [r2]
 	str	r2, [r6, #12]
 	movs	r2, #1
@@ -6913,55 +6955,55 @@ load_l2p_region:
 	ldr	r10, [r6, #12]
 	ldrh	r2, [r10, #8]
 	cmp	r2, r5
-	beq	.L894
+	beq	.L915
 	mov	r2, r8
 	mov	r1, r5
-	ldr	r0, .L897+28
+	ldr	r0, .L918+28
 	bl	printf
 	movs	r3, #4
 	ldr	r1, [r6, #12]
 	mov	r2, r3
-	ldr	r0, .L897+32
+	ldr	r0, .L918+32
 	bl	rknand_print_hex
 	ldr	r3, [sp, #4]
 	movs	r2, #4
 	ldr	r1, [fp]
-	ldr	r0, .L897+36
+	ldr	r0, .L918+36
 	ldrh	r3, [r3]
 	bl	rknand_print_hex
-.L895:
+.L916:
 	ldrh	r3, [r10, #8]
 	cmp	r3, r5
-	beq	.L896
+	beq	.L917
 	mov	r2, #508
-	ldr	r1, .L897+4
-	ldr	r0, .L897+8
+	ldr	r1, .L918+4
+	ldr	r0, .L918+8
 	bl	printf
-.L896:
+.L917:
 	ldr	r3, [r7]
 	movs	r1, #0
 	adds	r2, r3, r4
 	str	r1, [r2, #4]
 	strh	r5, [r3, r4]	@ movhi
-	b	.L893
-.L894:
+	b	.L914
+.L915:
 	ldr	r2, [r6]
 	cmp	r2, #256
-	bne	.L895
+	bne	.L916
 	mov	r2, r8
 	mov	r1, r5
-	ldr	r0, .L897+40
+	ldr	r0, .L918+40
 	bl	printf
 	ldr	r3, [r7]
 	mov	r1, r5
-	ldr	r0, .L897+44
+	ldr	r0, .L918+44
 	add	r3, r3, r4
 	ldr	r2, [r3, #8]
 	bl	FtlMapWritePage
-	b	.L895
-.L898:
+	b	.L916
+.L919:
 	.align	2
-.L897:
+.L918:
 	.word	.LANCHOR32
 	.word	.LANCHOR150
 	.word	.LC1
@@ -6969,10 +7011,10 @@ load_l2p_region:
 	.word	.LANCHOR23
 	.word	.LANCHOR138
 	.word	.LANCHOR114
-	.word	.LC20
-	.word	.LC21
-	.word	.LC22
-	.word	.LC23
+	.word	.LC24
+	.word	.LC13
+	.word	.LC25
+	.word	.LC26
 	.word	.LANCHOR129
 	.word	.LANCHOR124
 	.size	load_l2p_region, .-load_l2p_region
@@ -6997,13 +7039,13 @@ ftl_map_blk_gc:
 	ldrh	r2, [r4, #8]
 	subs	r3, r3, #5
 	cmp	r2, r3
-	blt	.L900
+	blt	.L921
 	uxth	r0, r0
 	ldrh	r8, [r5, r0, lsl #1]
 	cmp	r8, #0
-	beq	.L900
+	beq	.L921
 	ldr	r3, [r4, #32]
-	cbnz	r3, .L900
+	cbnz	r3, .L921
 	movs	r2, #1
 	str	r2, [r4, #32]
 	strh	r3, [r5, r0, lsl #1]	@ movhi
@@ -7011,39 +7053,39 @@ ftl_map_blk_gc:
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	ldr	r3, .L915
+	ldr	r3, .L936
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L901
+	bcc	.L922
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L901:
-	ldr	r5, .L915+4
+.L922:
+	ldr	r5, .L936+4
 	movs	r6, #0
-.L902:
+.L923:
 	ldrh	r3, [r4, #6]
 	uxth	r10, r6
 	cmp	r3, r10
-	bhi	.L909
+	bhi	.L930
 	movs	r1, #1
 	mov	r0, r8
 	bl	FtlFreeSysBlkQueueIn
 	movs	r3, #0
 	str	r3, [r4, #32]
-.L900:
-	ldr	r3, .L915
+.L921:
+	ldr	r3, .L936
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L910
+	bcc	.L931
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L910:
+.L931:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L909:
+.L930:
 	ldr	r3, [sp]
 	uxth	fp, r6
 	add	r3, r3, fp, lsl #2
@@ -7051,53 +7093,53 @@ ftl_map_blk_gc:
 	ldr	r3, [sp]
 	ldr	r2, [r3, fp, lsl #2]
 	cmp	r8, r2, lsr #10
-	bne	.L903
-	ldr	r3, .L915+8
+	bne	.L924
+	ldr	r3, .L936+8
 	str	r2, [r5, #4]
 	movs	r2, #1
-	ldr	r0, .L915+4
+	ldr	r0, .L936+4
 	ldr	r1, [r3]
 	str	r1, [r5, #8]
-	ldr	r1, .L915+12
+	ldr	r1, .L936+12
 	ldr	r7, [r1]
 	mov	r1, r2
 	str	r7, [r5, #12]
 	bl	FlashReadPages
 	ldrh	r2, [r7, #8]
 	cmp	r2, r10
-	beq	.L904
+	beq	.L925
 	movw	r2, #611
-	ldr	r1, .L915+16
-	ldr	r0, .L915+20
+	ldr	r1, .L936+16
+	ldr	r0, .L936+20
 	bl	printf
-.L904:
+.L925:
 	ldr	r2, [r5]
 	adds	r2, r2, #1
-	bne	.L905
-.L907:
+	bne	.L926
+.L928:
 	ldr	r2, [sp, #4]
 	movs	r3, #0
 	str	r3, [r2]
-.L906:
-	b	.L906
-.L905:
+.L927:
+	b	.L927
+.L926:
 	ldrh	r2, [r7, #8]
 	cmp	r2, r10
-	bne	.L907
+	bne	.L928
 	ldrh	r1, [r7]
 	ldrh	r2, [r4, #4]
 	cmp	r1, r2
-	bne	.L907
+	bne	.L928
 	ldr	r2, [r5, #8]
 	mov	r1, fp
 	mov	r0, r4
 	bl	FtlMapWritePage
-.L903:
+.L924:
 	adds	r6, r6, #1
-	b	.L902
-.L916:
+	b	.L923
+.L937:
 	.align	2
-.L915:
+.L936:
 	.word	.LANCHOR20
 	.word	.LANCHOR138
 	.word	.LANCHOR107
@@ -7118,9 +7160,9 @@ flush_l2p_region:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #12
-	ldr	r5, .L918
+	ldr	r5, .L939
 	muls	r4, r0, r4
-	ldr	r0, .L918+4
+	ldr	r0, .L939+4
 	ldr	r3, [r5]
 	adds	r2, r3, r4
 	ldrh	r1, [r3, r4]
@@ -7133,9 +7175,9 @@ flush_l2p_region:
 	bic	r3, r3, #-2147483648
 	str	r3, [r4, #4]
 	pop	{r3, r4, r5, pc}
-.L919:
+.L940:
 	.align	2
-.L918:
+.L939:
 	.word	.LANCHOR55
 	.word	.LANCHOR129
 	.size	flush_l2p_region, .-flush_l2p_region
@@ -7152,30 +7194,30 @@ l2p_flush:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
 	movs	r4, #0
-	ldr	r5, .L924
-	ldr	r6, .L924+4
-.L921:
+	ldr	r5, .L945
+	ldr	r6, .L945+4
+.L942:
 	ldrh	r3, [r5]
 	uxth	r0, r4
 	cmp	r3, r0
-	bhi	.L923
+	bhi	.L944
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L923:
+.L944:
 	ldr	r2, [r6]
 	uxth	r3, r4
 	movs	r1, #12
 	mla	r3, r1, r3, r2
 	ldr	r3, [r3, #4]
 	cmp	r3, #0
-	bge	.L922
+	bge	.L943
 	bl	flush_l2p_region
-.L922:
+.L943:
 	adds	r4, r4, #1
-	b	.L921
-.L925:
+	b	.L942
+.L946:
 	.align	2
-.L924:
+.L945:
 	.word	.LANCHOR33
 	.word	.LANCHOR55
 	.size	l2p_flush, .-l2p_flush
@@ -7192,36 +7234,36 @@ log2phys:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r7, r2
-	ldr	r4, .L939
+	ldr	r4, .L960
 	mov	r10, r0
 	mov	r5, r1
-	ldr	r3, .L939+4
+	ldr	r3, .L960+4
 	ldr	r2, [r4]
 	ldrh	fp, [r3]
 	cmp	r0, r2
-	bcc	.L927
+	bcc	.L948
 	movw	r2, #813
-	ldr	r1, .L939+8
-	ldr	r0, .L939+12
+	ldr	r1, .L960+8
+	ldr	r0, .L960+12
 	bl	printf
-.L927:
+.L948:
 	ldr	r3, [r4]
 	cmp	r10, r3
-	bcs	.L928
-	ldr	r3, .L939+16
+	bcs	.L949
+	ldr	r3, .L960+16
 	add	fp, fp, #7
 	lsr	r6, r10, fp
 	movs	r2, #0
 	ldrh	r1, [r3]
 	uxth	r6, r6
-	ldr	r3, .L939+20
+	ldr	r3, .L960+20
 	ldr	r0, [r3]
 	mov	r8, r3
 	movs	r3, #12
-.L929:
+.L950:
 	uxth	r4, r2
 	cmp	r4, r1
-	bcc	.L934
+	bcc	.L955
 	str	r3, [sp, #4]
 	bl	select_l2p_ram_region
 	ldr	r3, [sp, #4]
@@ -7232,31 +7274,31 @@ log2phys:
 	ldrh	r2, [r2, r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L935
+	beq	.L956
 	ldr	r3, [r1, #4]
 	cmp	r3, #0
-	bge	.L935
+	bge	.L956
 	bl	flush_l2p_region
-.L935:
+.L956:
 	mov	r1, r4
 	mov	r0, r6
 	bl	load_l2p_region
-	b	.L931
-.L928:
+	b	.L952
+.L949:
 	mov	r0, #-1
-	cbnz	r7, .L926
+	cbnz	r7, .L947
 	str	r0, [r5]
-.L926:
+.L947:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L934:
+.L955:
 	adds	r2, r2, #1
 	mla	ip, r3, r2, r0
 	ldrh	ip, [ip, #-12]
 	cmp	ip, r6
-	bne	.L929
-.L931:
+	bne	.L950
+.L952:
 	movs	r0, #1
 	ldr	r2, [r8]
 	lsl	r0, r0, fp
@@ -7265,35 +7307,35 @@ log2phys:
 	and	r0, r0, r10
 	uxth	r0, r0
 	mla	r3, r3, r4, r2
-	cbnz	r7, .L932
+	cbnz	r7, .L953
 	ldr	r3, [r3, #8]
 	ldr	r3, [r3, r0, lsl #2]
 	str	r3, [r5]
-.L933:
+.L954:
 	ldr	r2, [r8]
 	movs	r3, #12
 	mla	r4, r3, r4, r2
 	ldr	r3, [r4, #4]
 	adds	r2, r3, #1
-	beq	.L937
+	beq	.L958
 	adds	r3, r3, #1
 	str	r3, [r4, #4]
-.L937:
+.L958:
 	movs	r0, #0
-	b	.L926
-.L932:
+	b	.L947
+.L953:
 	ldr	r1, [r5]
 	ldr	r2, [r3, #8]
 	str	r1, [r2, r0, lsl #2]
 	ldr	r2, [r3, #4]
 	orr	r2, r2, #-2147483648
 	str	r2, [r3, #4]
-	ldr	r3, .L939+24
+	ldr	r3, .L960+24
 	strh	r6, [r3]	@ movhi
-	b	.L933
-.L940:
+	b	.L954
+.L961:
 	.align	2
-.L939:
+.L960:
 	.word	.LANCHOR152
 	.word	.LANCHOR22
 	.word	.LANCHOR153
@@ -7315,22 +7357,22 @@ FtlReUsePrevPpa:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r6, r0
-	ldr	r5, .L951
+	ldr	r5, .L972
 	ubfx	r0, r1, #10, #16
 	str	r1, [sp, #4]
 	bl	P2V_block_in_plane
 	ldr	r2, [r5]
 	mov	r7, r0
 	ldrh	r3, [r2, r0, lsl #1]
-	cbnz	r3, .L942
-	ldr	r2, .L951+4
+	cbnz	r3, .L963
+	ldr	r2, .L972+4
 	ldr	r4, [r2]
 	cmp	r4, #0
-	beq	.L943
-	ldr	r2, .L951+8
+	beq	.L964
+	ldr	r2, .L972+8
 	movw	lr, #65535
-	ldr	ip, .L951+24
-	ldr	r0, .L951+12
+	ldr	ip, .L972+24
+	ldr	r0, .L972+12
 	ldr	r2, [r2]
 	ldrh	r1, [r0]
 	mov	r8, r0
@@ -7339,22 +7381,22 @@ FtlReUsePrevPpa:
 	mul	r4, ip, r4
 	mov	ip, #6
 	uxth	r4, r4
-.L944:
+.L965:
 	uxth	r0, r3
 	cmp	r1, r0
-	bls	.L943
+	bls	.L964
 	cmp	r4, r7
-	bne	.L945
+	bne	.L966
 	mov	r1, r4
-	ldr	r0, .L951+4
+	ldr	r0, .L972+4
 	bl	List_remove_node
 	ldrh	r3, [r8]
-	cbnz	r3, .L946
+	cbnz	r3, .L967
 	movw	r2, #1733
-	ldr	r1, .L951+16
-	ldr	r0, .L951+20
+	ldr	r1, .L972+16
+	ldr	r0, .L972+20
 	bl	printf
-.L946:
+.L967:
 	ldrh	r3, [r8]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -7362,17 +7404,17 @@ FtlReUsePrevPpa:
 	bl	INSERT_DATA_LIST
 	ldr	r2, [r5]
 	ldrh	r3, [r2, r7, lsl #1]
-.L942:
+.L963:
 	adds	r3, r3, #1
 	strh	r3, [r2, r7, lsl #1]	@ movhi
-	b	.L943
-.L945:
+	b	.L964
+.L966:
 	mul	r4, ip, r4
 	adds	r3, r3, #1
 	ldrh	r4, [r2, r4]
 	cmp	r4, lr
-	bne	.L944
-.L943:
+	bne	.L965
+.L964:
 	movs	r2, #1
 	add	r1, sp, #4
 	mov	r0, r6
@@ -7380,11 +7422,11 @@ FtlReUsePrevPpa:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L952:
+.L973:
 	.align	2
-.L951:
+.L972:
 	.word	.LANCHOR42
-	.word	.LANCHOR47
+	.word	.LANCHOR46
 	.word	.LANCHOR40
 	.word	.LANCHOR48
 	.word	.LANCHOR154
@@ -7408,144 +7450,144 @@ FtlRecoverySuperblock:
 	mov	r8, r0
 	sub	sp, sp, #48
 	cmp	r3, r2
-	beq	.L1081
+	beq	.L1106
 	ldrh	r3, [r0, #2]
 	str	r3, [sp, #4]
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	ldr	r1, [sp, #4]
 	str	r3, [sp, #20]
-	ldr	r3, .L1091
+	ldr	r3, .L1115
 	ldrh	r3, [r3]
 	cmp	r3, r1
 	mov	r3, #0
-	bne	.L956
+	bne	.L977
 	strh	r3, [r0, #4]	@ movhi
-.L1089:
+.L1113:
 	strb	r3, [r8, #6]
-.L1081:
+.L1106:
 	movs	r0, #0
 	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L956:
+.L977:
 	ldrh	r0, [r0, #16]
-.L957:
+.L978:
 	cmp	r0, r2
 	uxth	r5, r3
 	add	r3, r3, #1
-	beq	.L958
+	beq	.L979
 	movs	r1, #1
 	bl	FtlGetLastWrittenPage
 	mov	r4, r0
 	adds	r0, r0, #1
-	beq	.L959
-	ldr	r3, .L1091+4
+	beq	.L980
+	ldr	r3, .L1115+4
 	movs	r2, #0
 	mov	r5, r2
 	movw	fp, #65535
 	mov	r10, #20
 	ldrh	ip, [r3]
-	ldr	r3, .L1091+8
+	ldr	r3, .L1115+8
 	ldr	r0, [r3]
-	ldr	r3, .L1091+12
+	ldr	r3, .L1115+12
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
-	ldr	r3, .L1091+16
+	ldr	r3, .L1115+16
 	ldrh	r7, [r3]
-	ldr	r3, .L1091+20
+	ldr	r3, .L1115+20
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L1091+24
+	ldr	r3, .L1115+24
 	ldrh	lr, [r3]
 	add	r3, r8, #16
 	str	r3, [sp, #16]
 	str	r3, [sp]
-.L960:
+.L981:
 	uxth	r3, r2
 	cmp	ip, r3
-	bhi	.L964
+	bhi	.L985
 	movs	r2, #0
 	mov	r1, r5
 	bl	FlashReadPages
-	ldr	r2, .L1091+28
+	ldr	r2, .L1115+28
 	uxth	r1, r4
 	movw	fp, #65535
 	str	r1, [sp, #12]
 	ldr	r3, [r2]
 	subs	r3, r3, #1
 	str	r3, [sp]
-	ldr	r3, .L1091+8
+	ldr	r3, .L1115+8
 	ldr	r10, [r3]
 	movs	r3, #0
 	mov	r7, r10
-.L965:
+.L986:
 	uxth	r1, r3
 	cmp	r5, r1
-	bhi	.L970
-	bne	.L968
+	bhi	.L991
+	bne	.L989
 	adds	r3, r4, #1
 	uxth	r3, r3
 	str	r3, [sp, #8]
-.L1082:
+.L1107:
 	ldr	r0, [r10, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_plane
-	ldr	r3, .L1091
+	ldr	r3, .L1115
 	mov	r10, r0
 	ldr	r2, [sp, #8]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bne	.L972
+	bne	.L993
 	ldrh	r3, [sp, #8]
 	strh	r3, [r8, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [r8, #6]
 	strh	r3, [r8, #4]	@ movhi
-.L972:
+.L993:
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #4]
 	cmp	r3, r2
-	bne	.L973
+	bne	.L994
 	ldr	r3, [sp, #20]
 	cmp	r10, r3
-	bne	.L973
+	bne	.L994
 	ldr	r1, [sp, #8]
 	mov	r2, r10
-.L1090:
+.L1114:
 	mov	r0, r8
 	bl	ftl_sb_update_avl_pages
-	b	.L1081
-.L958:
+	b	.L1106
+.L979:
 	uxth	r1, r3
 	adds	r1, r1, #8
 	ldrh	r0, [r8, r1, lsl #1]
-	b	.L957
-.L959:
+	b	.L978
+.L980:
 	ldr	r3, [sp, #4]
-	cbz	r3, .L961
+	cbz	r3, .L982
 	mov	r2, #1800
-	ldr	r1, .L1091+32
-	ldr	r0, .L1091+36
+	ldr	r1, .L1115+32
+	ldr	r0, .L1115+36
 	bl	printf
-.L961:
+.L982:
 	ldr	r3, [sp, #20]
-	cbz	r3, .L962
+	cbz	r3, .L983
 	cmp	r5, r3
-	beq	.L962
+	beq	.L983
 	movw	r2, #1801
-	ldr	r1, .L1091+32
-	ldr	r0, .L1091+36
+	ldr	r1, .L1115+32
+	ldr	r0, .L1115+36
 	bl	printf
-.L962:
+.L983:
 	movs	r3, #0
 	strh	r3, [r8, #2]	@ movhi
-	b	.L1089
-.L964:
+	b	.L1113
+.L985:
 	ldr	r1, [sp]
 	ldrh	r3, [r1], #2
 	cmp	r3, fp
 	str	r1, [sp]
-	beq	.L963
+	beq	.L984
 	mla	r1, r10, r5, r0
 	ldr	r6, [sp, #8]
 	orr	r3, r4, r3, lsl #10
@@ -7561,53 +7603,53 @@ FtlRecoverySuperblock:
 	bic	r3, r3, #3
 	add	r3, r3, r6
 	str	r3, [r1, #12]
-.L963:
+.L984:
 	adds	r2, r2, #1
-	b	.L960
-.L970:
+	b	.L981
+.L991:
 	ldr	r1, [r7]
-	cbnz	r1, .L966
+	cbnz	r1, .L987
 	ldr	r1, [r7, #12]
 	ldr	r6, [r1, #4]
 	str	r1, [sp, #8]
 	adds	r1, r6, #1
-	beq	.L967
+	beq	.L988
 	ldr	r1, [r2]
 	mov	r0, r6
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L967
+	cbz	r0, .L988
 	adds	r6, r6, #1
 	str	r6, [r2]
-.L967:
+.L988:
 	ldr	r1, [sp, #8]
 	ldr	r1, [r1]
 	adds	r1, r1, #1
-	bne	.L969
-.L968:
+	bne	.L990
+.L989:
 	uxth	r2, r4
 	uxth	r3, r3
 	str	r2, [sp, #8]
 	movs	r2, #20
 	mla	r10, r2, r3, r10
-	b	.L1082
-.L966:
+	b	.L1107
+.L987:
 	ldr	fp, [sp, #12]
-.L969:
+.L990:
 	adds	r3, r3, #1
 	adds	r7, r7, #20
-	b	.L965
-.L973:
+	b	.L986
+.L994:
 	movw	r3, #65535
 	cmp	fp, r3
-	bne	.L974
+	bne	.L995
 	ldrb	r3, [r8, #8]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L975
-.L974:
-	ldr	r3, .L1091+40
+	bne	.L996
+.L995:
+	ldr	r3, .L1115+40
 	uxth	r6, r4
 	uxth	r4, r4
-	ldr	r7, .L1091+8
+	ldr	r7, .L1115+8
 	ldr	r2, [r3]
 	adds	r2, r2, #1
 	itt	eq
@@ -7620,10 +7662,10 @@ FtlRecoverySuperblock:
 	subgt	r4, r6, #7
 	ldrle	r4, [sp, #4]
 	uxthgt	r4, r4
-.L978:
+.L999:
 	cmp	r4, r6
-	bhi	.L988
-	ldr	r3, .L1091+4
+	bhi	.L1009
+	ldr	r3, .L1115+4
 	movw	lr, #65535
 	ldr	r0, [r7]
 	mov	ip, #20
@@ -7632,47 +7674,47 @@ FtlRecoverySuperblock:
 	str	r3, [sp, #12]
 	movs	r3, #0
 	mov	r5, r3
-	b	.L989
-.L980:
+	b	.L1010
+.L1001:
 	ldr	r1, [sp, #12]
 	ldrh	r2, [r1], #2
 	cmp	r2, lr
 	str	r1, [sp, #12]
-	beq	.L979
+	beq	.L1000
 	mla	r1, ip, r5, r0
 	adds	r5, r5, #1
 	orr	r2, r4, r2, lsl #10
 	uxth	r5, r5
 	str	r2, [r1, #4]
-.L979:
+.L1000:
 	adds	r3, r3, #1
-.L989:
+.L1010:
 	uxth	r2, r3
 	cmp	fp, r2
-	bhi	.L980
+	bhi	.L1001
 	mov	r1, r5
 	movs	r2, #0
 	bl	FlashReadPages
-	ldr	r3, .L1091+40
+	ldr	r3, .L1115+40
 	movs	r1, #20
 	movs	r0, #0
 	movw	ip, #65535
 	ldr	r2, [r3]
 	ldr	r3, [r7]
 	mla	r5, r1, r5, r3
-.L981:
+.L1002:
 	cmp	r5, r3
-	bne	.L986
-	cbz	r0, .L987
-	ldr	r3, .L1091+40
+	bne	.L1007
+	cbz	r0, .L1008
+	ldr	r3, .L1115+40
 	str	r2, [r3]
-.L987:
+.L1008:
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L978
-.L1092:
+	b	.L999
+.L1116:
 	.align	2
-.L1091:
+.L1115:
 	.word	.LANCHOR19
 	.word	.LANCHOR3
 	.word	.LANCHOR103
@@ -7684,22 +7726,22 @@ FtlRecoverySuperblock:
 	.word	.LANCHOR155
 	.word	.LC1
 	.word	.LANCHOR134
-.L986:
+.L1007:
 	ldr	r1, [r3]
 	cmp	r1, #0
-	beq	.L982
-	cbz	r0, .L975
-.L1083:
-	ldr	r3, .L1093
+	beq	.L1003
+	cbz	r0, .L996
+.L1108:
+	ldr	r3, .L1117
 	str	r2, [r3]
-.L975:
+.L996:
 	ldr	fp, [sp, #4]
 	movs	r2, #1
-	ldr	r6, .L1093+4
-	ldr	r3, .L1093+8
+	ldr	r6, .L1117+4
+	ldr	r3, .L1117+8
 	strh	r2, [r3]	@ movhi
-.L990:
-	ldr	r3, .L1093+12
+.L1011:
+	ldr	r3, .L1117+12
 	movw	lr, #65535
 	ldr	r0, [r6]
 	movs	r7, #20
@@ -7707,64 +7749,64 @@ FtlRecoverySuperblock:
 	ldrh	r4, [r3]
 	movs	r3, #0
 	str	r3, [sp, #12]
-.L991:
+.L1012:
 	uxth	r2, r3
 	cmp	r4, r2
-	bhi	.L993
+	bhi	.L1014
 	movs	r2, #0
 	ldr	r1, [sp, #12]
 	bl	FlashReadPages
 	movs	r3, #0
-.L1088:
+.L1112:
 	str	r3, [sp, #24]
 	ldr	r2, [sp, #12]
 	ldrh	r3, [sp, #24]
 	cmp	r2, r3
-	bhi	.L1024
-	ldr	r3, .L1093+16
+	bhi	.L1043
+	ldr	r3, .L1117+16
 	add	fp, fp, #1
 	uxth	fp, fp
 	ldrh	r3, [r3]
 	cmp	r3, fp
-	bne	.L990
-	ldr	r2, .L1093+12
+	bne	.L1011
+	ldr	r2, .L1117+12
 	movw	r0, #65535
 	movs	r3, #0
 	strh	fp, [r8, #2]	@ movhi
 	strh	r3, [r8, #4]	@ movhi
 	ldrh	r2, [r2]
-.L1025:
+.L1044:
 	uxth	r1, r3
 	cmp	r1, r2
-	bcs	.L1081
+	bcs	.L1106
 	ldr	r1, [sp, #16]
 	ldrh	r4, [r1], #2
 	cmp	r4, r0
 	str	r1, [sp, #16]
 	add	r1, r3, #1
-	bne	.L1089
+	bne	.L1113
 	mov	r3, r1
-	b	.L1025
-.L982:
+	b	.L1044
+.L1003:
 	ldr	r1, [r3, #12]
 	ldrh	lr, [r1]
 	cmp	lr, ip
-	beq	.L985
+	beq	.L1006
 	ldr	r1, [r1, #4]
 	cmp	r1, #-1
 	itt	ne
 	movne	r2, r1
 	movne	r0, #1
-.L985:
+.L1006:
 	adds	r3, r3, #20
-	b	.L981
-.L988:
+	b	.L1002
+.L1009:
 	mov	r2, #-1
-	b	.L1083
-.L993:
+	b	.L1108
+.L1014:
 	ldrh	r2, [r1], #2
 	cmp	r2, lr
-	beq	.L992
+	beq	.L1013
 	ldr	r5, [sp, #12]
 	orr	r2, fp, r2, lsl #10
 	mla	ip, r7, r5, r0
@@ -7773,10 +7815,10 @@ FtlRecoverySuperblock:
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r2, [sp, #12]
-.L992:
+.L1013:
 	adds	r3, r3, #1
-	b	.L991
-.L1024:
+	b	.L1012
+.L1043:
 	ldr	r3, [sp, #24]
 	movs	r5, #20
 	muls	r5, r3, r5
@@ -7789,45 +7831,45 @@ FtlRecoverySuperblock:
 	bl	P2V_plane
 	ldr	r3, [sp, #4]
 	cmp	fp, r3
-	bcc	.L995
+	bcc	.L1016
 	ldr	r3, [sp, #28]
-	bne	.L996
+	bne	.L1017
 	ldr	r2, [sp, #20]
 	cmp	r2, r0
-	bhi	.L995
-.L996:
+	bhi	.L1016
+.L1017:
 	ldr	r2, [sp, #8]
 	cmp	fp, r2
-	bne	.L997
+	bne	.L1018
 	cmp	r10, r0
-	beq	.L998
-.L997:
+	beq	.L1019
+.L1018:
 	ldr	r3, [r3, r5]
 	adds	r3, r3, #1
-	beq	.L999
+	beq	.L1020
 	ldr	r3, [r7, #12]
 	movw	r2, #61589
 	ldrh	r1, [r3]
 	cmp	r1, r2
-	beq	.L1000
+	beq	.L1021
 	ldrh	r0, [r8]
-.L1086:
+.L1109:
 	bl	decrement_vpc_count
-	b	.L995
-.L1000:
+	b	.L1016
+.L1021:
 	ldr	r2, [r3, #4]
 	str	r2, [sp]
 	adds	r2, r2, #1
-	beq	.L1001
-	ldr	r2, .L1093+20
+	beq	.L1022
+	ldr	r2, .L1117+20
 	ldr	r0, [sp]
 	ldr	r1, [r2]
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L1001
+	cbz	r0, .L1022
 	ldr	r1, [sp]
 	adds	r1, r1, #1
 	str	r1, [r2]
-.L1001:
+.L1022:
 	ldr	r4, [r3, #8]
 	add	r1, sp, #40
 	ldr	r3, [r3, #12]
@@ -7835,17 +7877,17 @@ FtlRecoverySuperblock:
 	mov	r0, r4
 	str	r3, [sp, #36]
 	bl	log2phys
-	ldr	r3, .L1093
+	ldr	r3, .L1117
 	ldr	r1, [r3]
 	adds	r3, r1, #1
-	beq	.L1002
+	beq	.L1023
 	ldr	r0, [sp]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1002
+	beq	.L1023
 	ldr	r3, [sp, #36]
 	adds	r7, r3, #1
-	beq	.L1003
+	beq	.L1024
 	ldr	r0, [r6]
 	movs	r2, #0
 	movs	r1, #1
@@ -7857,103 +7899,119 @@ FtlRecoverySuperblock:
 	ldr	r1, [r2, r5]
 	adds	r3, r2, r5
 	adds	r1, r1, #1
-	bne	.L1004
-.L1005:
+	bne	.L1025
+.L1026:
 	mov	r3, #-1
 	str	r3, [sp, #36]
-.L1012:
+.L1033:
 	ldr	r7, [sp, #36]
 	adds	r0, r7, #1
-	beq	.L995
-.L1028:
+	beq	.L1016
+.L1047:
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L1093+24
+	ldr	r3, .L1117+24
 	mov	r4, r0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bhi	.L1020
-	movw	r2, #2065
-	ldr	r1, .L1093+28
-	ldr	r0, .L1093+32
+	bhi	.L1039
+	movw	r2, #2057
+	ldr	r1, .L1117+28
+	ldr	r0, .L1117+32
 	bl	printf
-.L1020:
-	ldr	r3, .L1093+36
+.L1039:
+	ldr	r3, .L1117+36
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
 	cmp	r3, #0
-	beq	.L1021
+	beq	.L1040
 	mov	r0, r4
-	b	.L1086
-.L1003:
+	b	.L1109
+.L1024:
 	ldr	r3, [sp, #44]
 	ldr	r2, [sp, #40]
 	cmp	r2, r3
-	bne	.L995
+	bne	.L1016
 	movs	r2, #1
 	add	r1, sp, #36
 	mov	r0, r4
 	bl	log2phys
-.L995:
+.L1016:
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	b	.L1088
-.L1004:
+	b	.L1112
+.L1025:
 	ldr	r1, [r7, #8]
 	cmp	r4, r1
-	bne	.L1005
-	ldr	r0, .L1093
+	bne	.L1026
+	ldr	r0, .L1117
 	ldr	r1, [r7, #4]
 	ldr	r0, [r0]
 	str	r1, [sp, #28]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1005
+	beq	.L1026
 	ldr	r1, [sp, #40]
 	ldr	r0, [sp, #44]
 	cmp	r1, r0
-	bne	.L1007
-.L1010:
+	bne	.L1028
+.L1031:
 	ldr	r1, [sp, #36]
 	mov	r0, r4
 	bl	FtlReUsePrevPpa
-	b	.L1005
-.L1007:
+	b	.L1026
+.L1028:
 	ldr	r0, [sp, #36]
 	cmp	r1, r0
-	beq	.L1005
+	beq	.L1026
 	adds	r0, r1, #1
-	beq	.L1008
+	beq	.L1029
 	str	r1, [r3, #4]
 	movs	r2, #0
 	movs	r1, #1
 	mov	r0, r3
 	ldr	r7, [r3, #12]
 	bl	FlashReadPages
-.L1009:
+.L1030:
 	ldr	r3, [r6]
 	ldr	r3, [r3, r5]
 	adds	r3, r3, #1
-	beq	.L1010
+	beq	.L1031
 	ldr	r3, [r7, #4]
-	ldr	r2, .L1093
+	ldr	r2, .L1117
 	mov	r1, r3
 	ldr	r0, [r2]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1010
+	beq	.L1031
 	mov	r1, r3
 	ldr	r0, [sp, #28]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1005
-	b	.L1010
-.L1008:
+	beq	.L1026
+	b	.L1031
+.L1029:
 	str	r1, [r2, r5]
-	b	.L1009
-.L1094:
+	b	.L1030
+.L1023:
+	ldr	r3, [sp, #44]
+	ldr	r2, [sp, #40]
+	cmp	r2, r3
+	beq	.L1033
+	ldr	r1, [sp, #36]
+	adds	r7, r1, #1
+	beq	.L1035
+	ldr	r3, .L1117+40
+	ldr	r3, [r3]
+	cmp	r3, r1, lsr #10
+	bhi	.L1035
+	ldr	r0, .L1117+44
+.L1111:
+	bl	printf
+	b	.L1016
+.L1118:
 	.align	2
-.L1093:
+.L1117:
 	.word	.LANCHOR134
 	.word	.LANCHOR103
 	.word	.LANCHOR156
@@ -7964,44 +8022,34 @@ FtlRecoverySuperblock:
 	.word	.LANCHOR155
 	.word	.LC1
 	.word	.LANCHOR42
-.L1002:
-	ldr	r3, [sp, #44]
-	ldr	r2, [sp, #40]
-	cmp	r2, r3
-	beq	.L1012
-	ldr	r2, .L1095
-	ldr	r3, [sp, #36]
-	ldr	r2, [r2]
-	cmp	r2, r3, lsr #10
-	bhi	.L1014
-	adds	r3, r3, #1
-.L1085:
-	bne	.L995
+	.word	.LANCHOR8
+	.word	.LC27
+.L1035:
 	movs	r2, #1
 	add	r1, sp, #44
 	mov	r0, r4
 	bl	log2phys
 	ldr	r7, [sp, #40]
 	adds	r5, r7, #1
-	beq	.L1012
+	beq	.L1033
 	ldr	r3, [sp, #36]
 	cmp	r7, r3
-	beq	.L1028
+	beq	.L1047
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L1095+4
+	ldr	r3, .L1119
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L1019
-	ldr	r3, .L1095+8
+	beq	.L1038
+	ldr	r3, .L1119+4
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L1019
-	ldr	r3, .L1095+12
+	beq	.L1038
+	ldr	r3, .L1119+8
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L1012
-.L1019:
+	bne	.L1033
+.L1038:
 	ldr	r0, [r6]
 	movs	r2, #0
 	movs	r1, #1
@@ -8011,77 +8059,61 @@ FtlRecoverySuperblock:
 	ldr	r3, [r6]
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L1012
+	beq	.L1033
 	ldr	r1, [r5, #4]
 	ldr	r0, [sp]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	bne	.L1012
+	bne	.L1033
 	movs	r2, #1
 	add	r1, sp, #40
 	mov	r0, r4
 	bl	log2phys
-	b	.L1012
-.L1014:
-	ldr	r0, [r6]
-	movs	r2, #0
-	movs	r1, #1
-	ldr	r5, [r0, #12]
-	str	r3, [r0, #4]
-	bl	FlashReadPages
-	ldr	r3, [r5, #8]
-	cmp	r4, r3
-	bne	.L995
-	ldrh	r2, [r5]
-	movw	r3, #61589
-	cmp	r2, r3
-	b	.L1085
-.L1021:
+	b	.L1033
+.L1040:
 	mov	r1, r4
-	ldr	r0, .L1095+16
-	bl	printf
-	b	.L995
-.L999:
-	ldr	r3, .L1095+20
+	ldr	r0, .L1119+12
+	b	.L1111
+.L1020:
+	ldr	r3, .L1119+16
 	ldr	r3, [r3]
 	cmp	r3, #31
-	bhi	.L1022
-	ldr	r2, .L1095+24
+	bhi	.L1041
+	ldr	r2, .L1119+20
 	str	r4, [r2, r3, lsl #2]
 	adds	r3, r3, #1
-	ldr	r2, .L1095+20
+	ldr	r2, .L1119+16
 	str	r3, [r2]
-.L1022:
+.L1041:
 	ldrh	r0, [r8]
 	bl	decrement_vpc_count
-	ldr	r3, .L1095+28
+	ldr	r3, .L1119+24
 	ldr	r2, [r3]
 	adds	r1, r2, #1
-	bne	.L1023
+	bne	.L1042
 	ldr	r2, [sp]
-.L1087:
+.L1110:
 	str	r2, [r3]
-	b	.L995
-.L1023:
+	b	.L1016
+.L1042:
 	ldr	r1, [sp]
 	cmp	r1, r2
-	bcs	.L995
+	bcs	.L1016
 	mov	r2, r1
-	b	.L1087
-.L998:
+	b	.L1110
+.L1019:
 	strb	r10, [r8, #6]
 	mov	r2, r10
 	strh	fp, [r8, #2]	@ movhi
 	mov	r1, fp
-	b	.L1090
-.L1096:
+	b	.L1114
+.L1120:
 	.align	2
-.L1095:
-	.word	.LANCHOR8
+.L1119:
 	.word	.LANCHOR51
 	.word	.LANCHOR52
 	.word	.LANCHOR53
-	.word	.LC24
+	.word	.LC28
 	.word	.LANCHOR157
 	.word	.LANCHOR158
 	.word	.LANCHOR134
@@ -8099,56 +8131,56 @@ ftl_check_vpc:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r6, .L1121
-	ldr	r5, .L1121+4
-	ldr	r1, .L1121+8
-	ldr	r0, .L1121+12
+	ldr	r6, .L1145
+	ldr	r5, .L1145+4
+	ldr	r1, .L1145+8
+	ldr	r0, .L1145+12
 	bl	printf
 	mov	r2, #8192
 	movs	r1, #0
-	ldr	r0, .L1121+4
+	ldr	r0, .L1145+4
 	bl	ftl_memset
-.L1098:
+.L1122:
 	ldr	r3, [r6]
 	cmp	r4, r3
-	bcc	.L1100
-	ldr	r10, .L1121+48
+	bcc	.L1124
+	ldr	r10, .L1145+48
 	movs	r4, #0
-	ldr	r7, .L1121+16
+	ldr	r7, .L1145+16
 	mov	r6, r4
-.L1101:
+.L1125:
 	ldrh	r2, [r10]
 	uxth	r3, r4
 	cmp	r2, r3
-	bhi	.L1103
-	ldr	r3, .L1121+20
+	bhi	.L1127
+	ldr	r3, .L1145+20
 	ldr	r4, [r3]
-	cbz	r4, .L1104
-	ldr	r3, .L1121+24
+	cbz	r4, .L1128
+	ldr	r3, .L1145+24
 	mov	r8, #0
-	ldr	r5, .L1121+28
-	ldr	r10, .L1121+16
+	ldr	r5, .L1145+28
+	ldr	r10, .L1145+16
 	ldrh	r7, [r3]
 	ldr	r3, [r5]
-	ldr	fp, .L1121+4
+	ldr	fp, .L1145+4
 	subs	r4, r4, r3
-	ldr	r3, .L1121+32
+	ldr	r3, .L1145+32
 	asrs	r4, r4, #1
 	muls	r4, r3, r4
 	uxth	r4, r4
-.L1105:
+.L1129:
 	uxth	r3, r8
 	cmp	r7, r3
-	bls	.L1104
+	bls	.L1128
 	ldr	r3, [r10]
 	ldrh	r2, [r3, r4, lsl #1]
-	cbz	r2, .L1106
+	cbz	r2, .L1130
 	movs	r6, #1
 	ldrh	r3, [fp, r4, lsl #1]
 	mov	r1, r4
-	ldr	r0, .L1121+36
+	ldr	r0, .L1145+36
 	bl	printf
-.L1106:
+.L1130:
 	movs	r3, #6
 	ldr	r2, [r5]
 	muls	r4, r3, r4
@@ -8156,71 +8188,71 @@ ftl_check_vpc:
 	add	r8, r8, #1
 	ldrh	r4, [r2, r4]
 	cmp	r4, r3
-	bne	.L1105
-.L1104:
-	cbz	r6, .L1097
-	movw	r2, #2389
-	ldr	r1, .L1121+8
-	ldr	r0, .L1121+40
+	bne	.L1129
+.L1128:
+	cbz	r6, .L1121
+	movw	r2, #2383
+	ldr	r1, .L1145+8
+	ldr	r0, .L1145+40
 	bl	printf
-.L1097:
+.L1121:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1100:
+.L1124:
 	movs	r2, #0
 	add	r1, sp, #4
 	mov	r0, r4
 	bl	log2phys
 	ldr	r0, [sp, #4]
 	adds	r3, r0, #1
-	beq	.L1099
+	beq	.L1123
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r5, r0, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r5, r0, lsl #1]	@ movhi
-.L1099:
+.L1123:
 	adds	r4, r4, #1
-	b	.L1098
-.L1103:
+	b	.L1122
+.L1127:
 	ldr	r3, [r7]
 	uxth	r5, r4
-	ldr	r8, .L1121+4
+	ldr	r8, .L1145+4
 	ldrh	r2, [r3, r5, lsl #1]
 	ldrh	r3, [r8, r5, lsl #1]
 	cmp	r2, r3
-	beq	.L1102
+	beq	.L1126
 	mov	r1, r5
-	ldr	r0, .L1121+44
+	ldr	r0, .L1145+44
 	bl	printf
 	ldr	r3, [r7]
 	movw	r2, #65535
 	ldrh	r3, [r3, r5, lsl #1]
 	cmp	r3, r2
-	beq	.L1102
+	beq	.L1126
 	ldrh	r2, [r8, r5, lsl #1]
 	cmp	r2, r3
 	it	hi
 	movhi	r6, #1
-.L1102:
+.L1126:
 	adds	r4, r4, #1
-	b	.L1101
-.L1122:
+	b	.L1125
+.L1146:
 	.align	2
-.L1121:
+.L1145:
 	.word	.LANCHOR152
 	.word	check_vpc_table
 	.word	.LANCHOR159
-	.word	.LC25
+	.word	.LC29
 	.word	.LANCHOR42
-	.word	.LANCHOR47
+	.word	.LANCHOR46
 	.word	.LANCHOR48
 	.word	.LANCHOR40
 	.word	-1431655765
-	.word	.LC27
+	.word	.LC31
 	.word	.LC1
-	.word	.LC26
+	.word	.LC30
 	.word	.LANCHOR5
 	.size	ftl_check_vpc, .-ftl_check_vpc
 	.section	.text.ftl_scan_all_data,"ax",%progbits
@@ -8236,60 +8268,60 @@ ftl_scan_all_data:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r5, #0
-	ldr	r7, .L1137
+	ldr	r7, .L1161
 	sub	sp, sp, #32
 	movs	r1, #0
-	ldr	r8, .L1137+24
-	ldr	r0, .L1137+4
+	ldr	r8, .L1161+24
+	ldr	r0, .L1161+4
 	bl	printf
-.L1124:
+.L1148:
 	ldr	r3, [r7]
 	cmp	r5, r3
-	bcc	.L1130
+	bcc	.L1154
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1130:
+.L1154:
 	movs	r2, #0
 	add	r1, sp, #28
 	mov	r0, r5
 	bl	log2phys
 	ubfx	r3, r5, #0, #11
-	cbnz	r3, .L1125
+	cbnz	r3, .L1149
 	ldr	r2, [sp, #28]
 	mov	r1, r5
 	mov	r0, r8
 	bl	printf
-.L1125:
+.L1149:
 	ldr	r3, [sp, #28]
 	adds	r2, r3, #1
-	beq	.L1127
-	ldr	r4, .L1137+8
+	beq	.L1151
+	ldr	r4, .L1161+8
 	movs	r2, #0
 	movs	r1, #1
 	str	r3, [r4, #4]
 	mov	r0, r4
-	ldr	r3, .L1137+12
+	ldr	r3, .L1161+12
 	str	r5, [r4, #16]
 	str	r2, [r4]
 	ldr	r3, [r3]
 	str	r3, [r4, #8]
-	ldr	r3, .L1137+16
+	ldr	r3, .L1161+16
 	ldr	r6, [r3]
 	str	r6, [r4, #12]
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	cmp	r3, #256
-	beq	.L1128
+	beq	.L1152
 	adds	r3, r3, #1
-	beq	.L1128
+	beq	.L1152
 	ldr	r3, [r6, #8]
 	cmp	r5, r3
-	beq	.L1127
-.L1128:
+	beq	.L1151
+.L1152:
 	ldr	r2, [r4, #8]
 	ldr	r3, [r4, #12]
-	ldr	r0, .L1137+20
+	ldr	r0, .L1161+20
 	ldr	r1, [r2, #4]
 	str	r1, [sp, #16]
 	mov	r1, r5
@@ -8304,19 +8336,19 @@ ftl_scan_all_data:
 	ldr	r2, [r4, #4]
 	ldr	r3, [r3]
 	bl	printf
-.L1127:
+.L1151:
 	adds	r5, r5, #1
-	b	.L1124
-.L1138:
+	b	.L1148
+.L1162:
 	.align	2
-.L1137:
+.L1161:
 	.word	.LANCHOR152
-	.word	.LC28
+	.word	.LC32
 	.word	.LANCHOR138
 	.word	.LANCHOR106
 	.word	.LANCHOR114
-	.word	.LC30
-	.word	.LC29
+	.word	.LC34
+	.word	.LC33
 	.size	ftl_scan_all_data, .-ftl_scan_all_data
 	.section	.text.FtlGcScanTempBlk,"ax",%progbits
 	.align	1
@@ -8329,7 +8361,7 @@ ftl_scan_all_data:
 FtlGcScanTempBlk:
 	@ args = 0, pretend = 0, frame = 48
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1169
+	ldr	r3, .L1195
 	movw	r2, #65535
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #48
@@ -8337,29 +8369,29 @@ FtlGcScanTempBlk:
 	ldrh	r5, [r3]
 	str	r3, [sp, #20]
 	cmp	r5, r2
-	beq	.L1161
-	cbnz	r5, .L1140
-.L1141:
+	beq	.L1185
+	cbnz	r5, .L1164
+.L1165:
 	bl	FtlGcPageVarInit
-	b	.L1142
-.L1161:
+	b	.L1166
+.L1185:
 	movs	r5, #0
-.L1140:
-	ldr	r3, .L1169+4
+.L1164:
+	ldr	r3, .L1195+4
 	ldrh	r3, [r3]
 	cmp	r3, r1
-	beq	.L1141
-.L1142:
-	ldr	fp, .L1169+52
-.L1143:
+	beq	.L1165
+.L1166:
+	ldr	fp, .L1195+56
+.L1182:
 	ldrh	r2, [r4]
 	movs	r3, #0
 	strb	r3, [r4, #8]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1144
-.L1160:
-	ldr	r3, .L1169+8
+	beq	.L1167
+.L1184:
+	ldr	r3, .L1195+8
 	movs	r2, #0
 	ldr	r0, [fp]
 	mov	r10, r2
@@ -8367,38 +8399,38 @@ FtlGcScanTempBlk:
 	mov	r8, #20
 	ldrh	r3, [r3]
 	str	r3, [sp, #8]
-	ldr	r3, .L1169+12
+	ldr	r3, .L1195+12
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L1169+16
+	ldr	r3, .L1195+16
 	ldrh	r3, [r3]
 	str	r3, [sp, #16]
-	ldr	r3, .L1169+20
+	ldr	r3, .L1195+20
 	ldr	r7, [r3]
-	ldr	r3, .L1169+24
+	ldr	r3, .L1195+24
 	ldrh	ip, [r3]
 	add	r3, r4, #16
 	str	r3, [sp, #4]
-.L1145:
+.L1168:
 	ldr	r1, [sp, #8]
 	uxth	r3, r2
 	cmp	r1, r3
-	bhi	.L1147
+	bhi	.L1170
 	mov	r8, #0
 	movs	r2, #0
 	mov	r1, r10
 	bl	FlashReadPages
-.L1148:
+.L1171:
 	uxth	r3, r8
 	cmp	r10, r3
-	bhi	.L1159
-	ldr	r3, .L1169+4
+	bhi	.L1183
+	ldr	r3, .L1195+4
 	adds	r5, r5, #1
 	uxth	r5, r5
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	bhi	.L1160
-.L1144:
+	bhi	.L1184
+.L1167:
 	ldr	r2, [sp, #20]
 	movw	r3, #65535
 	mov	r0, r4
@@ -8412,12 +8444,12 @@ FtlGcScanTempBlk:
 	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1147:
+.L1170:
 	ldr	r1, [sp, #4]
 	ldrh	r3, [r1], #2
 	cmp	r3, lr
 	str	r1, [sp, #4]
-	beq	.L1146
+	beq	.L1169
 	mla	r1, r8, r10, r0
 	orr	r3, r5, r3, lsl #10
 	str	r3, [r1, #4]
@@ -8434,30 +8466,31 @@ FtlGcScanTempBlk:
 	str	r3, [r1, #12]
 	add	r3, r10, #1
 	uxth	r10, r3
-.L1146:
+.L1169:
 	adds	r2, r2, #1
-	b	.L1145
-.L1159:
+	b	.L1168
+.L1183:
 	movs	r3, #20
-	ldr	r1, [fp]
+	ldr	r2, [fp]
 	mul	r3, r3, r8
-	adds	r2, r1, r3
-	ldr	r6, [r1, r3]
-	ldr	r0, [r2, #4]
+	adds	r1, r2, r3
+	ldr	r6, [r2, r3]
+	ldr	r0, [r1, #4]
+	ldr	r7, [r1, #12]
 	str	r0, [sp, #4]
-	cbnz	r6, .L1149
-	ldr	r7, [r2, #12]
-	movw	r2, #65535
+	cmp	r6, #0
+	bne	.L1172
 	ldrh	r1, [r7]
+	movw	r2, #65535
 	cmp	r1, r2
-	beq	.L1149
-	ldr	r2, .L1169+28
+	beq	.L1193
+	ldr	r2, .L1195+28
 	ldr	r0, [r7, #8]
 	ldr	r2, [r2]
 	cmp	r0, r2
-	bls	.L1151
-.L1149:
-	ldr	r3, .L1169+32
+	bls	.L1174
+.L1193:
+	ldr	r3, .L1195+32
 	movs	r1, #0
 	ldrh	r2, [r4]
 	movs	r5, #0
@@ -8465,11 +8498,13 @@ FtlGcScanTempBlk:
 	strh	r1, [r3, r2, lsl #1]	@ movhi
 	ldrh	r0, [r4]
 	bl	INSERT_FREE_LIST
+	ldr	r2, .L1195+36
 	movw	r3, #65535
 	strh	r3, [r4]	@ movhi
+	strh	r3, [r2]	@ movhi
 	bl	FtlGcPageVarInit
-	b	.L1143
-.L1151:
+	b	.L1182
+.L1174:
 	mov	r2, r6
 	add	r1, sp, #24
 	str	r3, [sp, #8]
@@ -8478,55 +8513,59 @@ FtlGcScanTempBlk:
 	ldr	r1, [sp, #24]
 	ldr	r3, [sp, #8]
 	cmp	r2, r1
-	beq	.L1153
-.L1154:
+	beq	.L1176
+.L1178:
 	ldr	r2, [r7, #8]
-	add	r8, r8, #1
+.L1194:
 	ldr	r1, [sp, #4]
+	add	r8, r8, #1
 	ldr	r0, [r7, #12]
 	bl	FtlGcUpdatePage
-	b	.L1148
-.L1153:
+	b	.L1171
+.L1176:
 	str	r3, [sp, #8]
 	adds	r3, r2, #1
-	beq	.L1154
+	beq	.L1178
 	str	r2, [sp, #32]
 	movs	r1, #1
-	ldr	r2, .L1169+36
+	ldr	r2, .L1195+40
 	add	r0, sp, #28
 	ldr	r2, [r2]
 	str	r2, [sp, #36]
-	ldr	r2, .L1169+40
+	ldr	r2, .L1195+44
 	ldr	r2, [r2]
 	str	r2, [sp, #40]
 	mov	r2, r6
 	bl	FlashReadPages
-	ldr	r2, .L1169+44
+	ldr	r2, .L1195+48
 	ldr	r1, [fp]
 	ldr	r3, [sp, #8]
 	ldrh	r2, [r2]
 	ldr	r0, [sp, #36]
 	add	ip, r3, r1
 	lsls	r2, r2, #7
-.L1155:
+.L1179:
 	cmp	r6, r2
-	beq	.L1154
+	beq	.L1178
 	ldr	r1, [ip, #8]
 	ldr	r3, [r0, r6, lsl #2]
 	ldr	r1, [r1, r6, lsl #2]
 	cmp	r1, r3
-	beq	.L1156
+	beq	.L1180
 	ldr	r2, [sp, #32]
 	ldrh	r1, [r4]
-	ldr	r0, .L1169+48
+	ldr	r0, .L1195+52
 	bl	printf
-	b	.L1149
-.L1156:
+	b	.L1193
+.L1180:
 	adds	r6, r6, #1
-	b	.L1155
-.L1170:
+	b	.L1179
+.L1172:
+	mov	r2, #-1
+	b	.L1194
+.L1196:
 	.align	2
-.L1169:
+.L1195:
 	.word	.LANCHOR160
 	.word	.LANCHOR19
 	.word	.LANCHOR3
@@ -8536,10 +8575,11 @@ FtlGcScanTempBlk:
 	.word	.LANCHOR24
 	.word	.LANCHOR152
 	.word	.LANCHOR42
+	.word	.LANCHOR145
 	.word	.LANCHOR110
 	.word	.LANCHOR115
 	.word	.LANCHOR12
-	.word	.LC31
+	.word	.LC35
 	.word	.LANCHOR103
 	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
 	.section	.text.FtlVendorPartWrite,"ax",%progbits
@@ -8553,7 +8593,7 @@ FtlGcScanTempBlk:
 FtlVendorPartWrite:
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1183
+	ldr	r3, .L1209
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #104
 	str	r2, [sp]
@@ -8562,26 +8602,26 @@ FtlVendorPartWrite:
 	mov	r5, r1
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1179
-	ldr	r3, .L1183+4
+	bhi	.L1205
+	ldr	r3, .L1209+4
 	mov	r8, #0
 	ldrh	r6, [r3]
 	lsr	r6, r0, r6
 	lsl	fp, r6, #2
-.L1173:
-	cbnz	r5, .L1178
-.L1171:
+.L1199:
+	cbnz	r5, .L1204
+.L1197:
 	mov	r0, r8
 	add	sp, sp, #104
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1178:
-	ldr	r3, .L1183+8
+.L1204:
+	ldr	r3, .L1209+8
 	mov	r0, r7
-	ldr	r10, .L1183+24
+	ldr	r10, .L1209+24
 	ldr	r3, [r3]
 	ldr	r2, [r3, fp]
-	ldr	r3, .L1183+12
+	ldr	r3, .L1209+12
 	str	r2, [sp, #12]
 	ldrh	r3, [r3]
 	mov	r1, r3
@@ -8595,9 +8635,9 @@ FtlVendorPartWrite:
 	cmp	r5, r4
 	it	cc
 	uxthcc	r4, r5
-	cbz	r2, .L1175
+	cbz	r2, .L1201
 	cmp	r4, r3
-	beq	.L1175
+	beq	.L1201
 	ldr	r3, [r10]
 	add	r0, sp, #20
 	str	r2, [sp, #24]
@@ -8607,7 +8647,7 @@ FtlVendorPartWrite:
 	add	r3, sp, #40
 	str	r3, [sp, #32]
 	bl	FlashReadPages
-.L1176:
+.L1202:
 	lsls	r3, r4, #9
 	ldr	r0, [r10]
 	subs	r5, r5, r4
@@ -8620,7 +8660,7 @@ FtlVendorPartWrite:
 	bl	ftl_memcpy
 	ldr	r2, [r10]
 	mov	r1, r6
-	ldr	r0, .L1183+16
+	ldr	r0, .L1209+16
 	adds	r6, r6, #1
 	bl	FtlMapWritePage
 	ldr	r3, [sp]
@@ -8631,20 +8671,20 @@ FtlVendorPartWrite:
 	ldr	r3, [sp, #8]
 	add	r2, r2, r3
 	str	r2, [sp]
-	b	.L1173
-.L1175:
-	ldr	r3, .L1183+20
+	b	.L1199
+.L1201:
+	ldr	r3, .L1209+20
 	movs	r1, #0
 	ldr	r0, [r10]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-	b	.L1176
-.L1179:
+	b	.L1202
+.L1205:
 	mov	r8, #-1
-	b	.L1171
-.L1184:
+	b	.L1197
+.L1210:
 	.align	2
-.L1183:
+.L1209:
 	.word	.LANCHOR16
 	.word	.LANCHOR22
 	.word	.LANCHOR123
@@ -8665,57 +8705,57 @@ Ftl_save_ext_data:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L1187
-	ldr	r3, .L1187+4
+	ldr	r2, .L1213
+	ldr	r3, .L1213+4
 	ldr	r1, [r2]
 	cmp	r1, r3
-	bne	.L1185
-	ldr	r3, .L1187+8
+	bne	.L1211
+	ldr	r3, .L1213+8
 	movs	r1, #1
 	movs	r0, #0
 	str	r3, [r2, #4]
-	ldr	r3, .L1187+12
+	ldr	r3, .L1213+12
 	ldr	r3, [r3]
 	str	r3, [r2, #88]
-	ldr	r3, .L1187+16
+	ldr	r3, .L1213+16
 	ldr	r3, [r3]
 	str	r3, [r2, #92]
-	ldr	r3, .L1187+20
+	ldr	r3, .L1213+20
 	ldr	r3, [r3]
 	str	r3, [r2, #8]
-	ldr	r3, .L1187+24
+	ldr	r3, .L1213+24
 	ldr	r3, [r3]
 	str	r3, [r2, #12]
-	ldr	r3, .L1187+28
+	ldr	r3, .L1213+28
 	ldr	r3, [r3]
 	str	r3, [r2, #16]
-	ldr	r3, .L1187+32
+	ldr	r3, .L1213+32
 	ldr	r3, [r3]
 	str	r3, [r2, #20]
-	ldr	r3, .L1187+36
+	ldr	r3, .L1213+36
 	ldr	r3, [r3]
 	str	r3, [r2, #28]
-	ldr	r3, .L1187+40
+	ldr	r3, .L1213+40
 	ldr	r3, [r3]
 	str	r3, [r2, #32]
-	ldr	r3, .L1187+44
+	ldr	r3, .L1213+44
 	ldr	r3, [r3]
 	str	r3, [r2, #36]
-	ldr	r3, .L1187+48
+	ldr	r3, .L1213+48
 	ldr	r3, [r3]
 	str	r3, [r2, #40]
-	ldr	r3, .L1187+52
+	ldr	r3, .L1213+52
 	ldr	r3, [r3]
 	str	r3, [r2, #44]
-	ldr	r3, .L1187+56
+	ldr	r3, .L1213+56
 	ldr	r3, [r3]
 	str	r3, [r2, #48]
 	b	FtlVendorPartWrite
-.L1185:
+.L1211:
 	bx	lr
-.L1188:
+.L1214:
 	.align	2
-.L1187:
+.L1213:
 	.word	.LANCHOR135
 	.word	1179929683
 	.word	1342177352
@@ -8743,7 +8783,7 @@ Ftl_save_ext_data:
 FtlEctTblFlush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L1194
+	ldr	r2, .L1220
 	push	{r3, lr}
 	ldrh	r3, [r2]
 	cmp	r3, #31
@@ -8752,22 +8792,22 @@ FtlEctTblFlush:
 	movhi	r3, #32
 	strhls	r3, [r2]	@ movhi
 	movls	r3, #1
-	ldr	r2, .L1194+4
-	cbnz	r0, .L1191
+	ldr	r2, .L1220+4
+	cbnz	r0, .L1217
 	ldr	r1, [r2]
 	ldr	r0, [r1, #20]
 	ldr	r1, [r1, #16]
 	add	r3, r3, r0
 	cmp	r1, r3
-	bcc	.L1192
-.L1191:
+	bcc	.L1218
+.L1217:
 	ldr	r2, [r2]
 	movs	r0, #64
 	ldr	r3, [r2, #16]
 	str	r3, [r2, #20]
-	ldr	r3, .L1194+8
+	ldr	r3, .L1220+8
 	str	r3, [r2]
-	ldr	r3, .L1194+12
+	ldr	r3, .L1220+12
 	ldrh	r1, [r3]
 	lsls	r3, r1, #9
 	str	r3, [r2, #12]
@@ -8778,12 +8818,12 @@ FtlEctTblFlush:
 	str	r3, [r2, #4]
 	bl	FtlVendorPartWrite
 	bl	Ftl_save_ext_data
-.L1192:
+.L1218:
 	movs	r0, #0
 	pop	{r3, pc}
-.L1195:
+.L1221:
 	.align	2
-.L1194:
+.L1220:
 	.word	.LANCHOR164
 	.word	.LANCHOR118
 	.word	1112818501
@@ -8815,7 +8855,7 @@ sftl_vendor_write:
 FtlVendorPartRead:
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1207
+	ldr	r3, .L1233
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, r2
 	adds	r2, r0, r1
@@ -8824,28 +8864,28 @@ FtlVendorPartRead:
 	mov	r6, r1
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1206
-	ldr	r3, .L1207+4
+	bhi	.L1232
+	ldr	r3, .L1233+4
 	mov	r8, #0
-	ldr	fp, .L1207+28
+	ldr	fp, .L1233+28
 	ldrh	r5, [r3]
 	lsr	r5, r0, r5
 	lsls	r3, r5, #2
 	str	r3, [sp]
-.L1199:
-	cbnz	r6, .L1205
-.L1197:
+.L1225:
+	cbnz	r6, .L1231
+.L1223:
 	mov	r0, r8
 	add	sp, sp, #104
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1205:
-	ldr	r3, .L1207+8
+.L1231:
+	ldr	r3, .L1233+8
 	mov	r0, r7
 	ldr	r2, [sp]
 	ldr	r3, [r3]
 	ldr	r3, [r3, r2]
-	ldr	r2, .L1207+12
+	ldr	r2, .L1233+12
 	str	r3, [sp, #8]
 	ldrh	r4, [r2]
 	mov	r1, r4
@@ -8860,7 +8900,7 @@ FtlVendorPartRead:
 	lsls	r2, r4, #9
 	str	r2, [sp, #8]
 	cmp	r3, #0
-	beq	.L1201
+	beq	.L1227
 	ldr	r2, [fp]
 	add	r0, sp, #20
 	str	r3, [sp, #24]
@@ -8874,28 +8914,28 @@ FtlVendorPartRead:
 	ldr	r2, [sp, #20]
 	ldr	r3, [sp, #12]
 	adds	r2, r2, #1
-	ldr	r2, .L1207+16
+	ldr	r2, .L1233+16
 	it	eq
 	moveq	r8, #-1
 	ldr	r2, [r2]
 	cmp	r2, #256
-	bne	.L1203
+	bne	.L1229
 	mov	r2, r3
 	mov	r1, r5
-	ldr	r0, .L1207+20
+	ldr	r0, .L1233+20
 	bl	printf
 	ldr	r2, [fp]
 	mov	r1, r5
-	ldr	r0, .L1207+24
+	ldr	r0, .L1233+24
 	bl	FtlMapWritePage
-.L1203:
+.L1229:
 	ldr	r1, [fp]
 	lsls	r2, r4, #9
 	ldr	r3, [sp, #4]
 	mov	r0, r10
 	add	r1, r1, r3, lsl #9
 	bl	ftl_memcpy
-.L1204:
+.L1230:
 	ldr	r3, [sp, #8]
 	adds	r5, r5, #1
 	subs	r6, r6, r4
@@ -8904,25 +8944,25 @@ FtlVendorPartRead:
 	ldr	r3, [sp]
 	adds	r3, r3, #4
 	str	r3, [sp]
-	b	.L1199
-.L1201:
+	b	.L1225
+.L1227:
 	lsls	r2, r4, #9
 	mov	r1, r3
 	mov	r0, r10
 	bl	ftl_memset
-	b	.L1204
-.L1206:
+	b	.L1230
+.L1232:
 	mov	r8, #-1
-	b	.L1197
-.L1208:
+	b	.L1223
+.L1234:
 	.align	2
-.L1207:
+.L1233:
 	.word	.LANCHOR16
 	.word	.LANCHOR22
 	.word	.LANCHOR123
 	.word	.LANCHOR12
 	.word	.LANCHOR138
-	.word	.LC32
+	.word	.LC36
 	.word	.LANCHOR161
 	.word	.LANCHOR108
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
@@ -8939,35 +8979,35 @@ FtlLoadEctTbl:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r0, #64
-	ldr	r4, .L1211
-	ldr	r5, .L1211+4
+	ldr	r4, .L1237
+	ldr	r5, .L1237+4
 	ldr	r2, [r4]
 	ldrh	r1, [r5]
 	bl	FtlVendorPartRead
 	ldr	r3, [r4]
 	ldr	r2, [r3]
-	ldr	r3, .L1211+8
+	ldr	r3, .L1237+8
 	cmp	r2, r3
-	beq	.L1210
-	ldr	r1, .L1211+12
-	ldr	r0, .L1211+16
+	beq	.L1236
+	ldr	r1, .L1237+12
+	ldr	r0, .L1237+16
 	bl	printf
 	ldrh	r2, [r5]
 	movs	r1, #0
 	ldr	r0, [r4]
 	lsls	r2, r2, #9
 	bl	ftl_memset
-.L1210:
+.L1236:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L1212:
+.L1238:
 	.align	2
-.L1211:
+.L1237:
 	.word	.LANCHOR118
 	.word	.LANCHOR116
 	.word	1112818501
-	.word	.LC33
-	.word	.LC34
+	.word	.LC37
+	.word	.LC38
 	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
 	.section	.text.Ftl_load_ext_data,"ax",%progbits
 	.align	1
@@ -8982,75 +9022,75 @@ Ftl_load_ext_data:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r1, #1
-	ldr	r4, .L1216
+	ldr	r4, .L1242
 	movs	r0, #0
-	ldr	r5, .L1216+4
+	ldr	r5, .L1242+4
 	mov	r2, r4
 	bl	FtlVendorPartRead
 	ldr	r3, [r4]
 	cmp	r3, r5
-	beq	.L1214
+	beq	.L1240
 	mov	r2, #512
 	movs	r1, #0
 	mov	r0, r4
 	bl	ftl_memset
 	str	r5, [r4]
-.L1214:
+.L1240:
 	ldr	r3, [r4]
 	cmp	r3, r5
-	ldr	r3, .L1216+8
-	bne	.L1215
+	ldr	r3, .L1242+8
+	bne	.L1241
 	ldr	r1, [r4, #88]
-	ldr	r2, .L1216+12
+	ldr	r2, .L1242+12
 	str	r1, [r2]
 	ldr	r1, [r4, #92]
-	ldr	r2, .L1216+16
+	ldr	r2, .L1242+16
 	str	r1, [r2]
 	ldr	r1, [r4, #8]
-	ldr	r2, .L1216+20
+	ldr	r2, .L1242+20
 	str	r1, [r2]
 	ldr	r1, [r4, #12]
-	ldr	r2, .L1216+24
+	ldr	r2, .L1242+24
 	str	r1, [r2]
 	ldr	r1, [r4, #16]
-	ldr	r2, .L1216+28
+	ldr	r2, .L1242+28
 	str	r1, [r2]
 	ldr	r1, [r4, #20]
-	ldr	r2, .L1216+32
+	ldr	r2, .L1242+32
 	str	r1, [r2]
 	ldr	r2, [r4, #28]
 	ldr	r1, [r4, #32]
 	str	r2, [r3]
-	ldr	r2, .L1216+36
+	ldr	r2, .L1242+36
 	str	r1, [r2]
 	ldr	r1, [r4, #36]
-	ldr	r2, .L1216+40
+	ldr	r2, .L1242+40
 	str	r1, [r2]
 	ldr	r1, [r4, #40]
-	ldr	r2, .L1216+44
+	ldr	r2, .L1242+44
 	str	r1, [r2]
 	ldr	r1, [r4, #44]
-	ldr	r2, .L1216+48
+	ldr	r2, .L1242+48
 	str	r1, [r2]
 	ldr	r1, [r4, #48]
-	ldr	r2, .L1216+52
+	ldr	r2, .L1242+52
 	str	r1, [r2]
-.L1215:
-	ldr	r1, .L1216+56
-	ldr	r2, .L1216+60
+.L1241:
+	ldr	r1, .L1242+56
+	ldr	r2, .L1242+60
 	ldr	r3, [r3]
 	ldr	r0, [r1]
 	ldrh	r2, [r2]
-	ldr	r1, .L1216+64
+	ldr	r1, .L1242+64
 	mla	r0, r0, r2, r3
 	ldrh	r1, [r1]
 	bl	__aeabi_uidiv
-	ldr	r3, .L1216+68
+	ldr	r3, .L1242+68
 	str	r0, [r3]
 	pop	{r3, r4, r5, pc}
-.L1217:
+.L1243:
 	.align	2
-.L1216:
+.L1242:
 	.word	.LANCHOR135
 	.word	1179929683
 	.word	.LANCHOR91
@@ -9068,7 +9108,7 @@ Ftl_load_ext_data:
 	.word	.LANCHOR90
 	.word	.LANCHOR14
 	.word	.LANCHOR5
-	.word	.LANCHOR145
+	.word	.LANCHOR143
 	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
 	.section	.text.sftl_vendor_read,"ax",%progbits
 	.align	1
@@ -9100,30 +9140,30 @@ FtlMapBlkWriteDump_data:
 	mov	r4, r0
 	ldr	r3, [r0, #36]
 	cmp	r3, #0
-	beq	.L1219
+	beq	.L1245
 	movs	r3, #0
-	ldr	r5, .L1231
+	ldr	r5, .L1257
 	str	r3, [r0, #36]
-	ldr	r3, .L1231+4
+	ldr	r3, .L1257+4
 	ldrh	r6, [r0, #6]
 	mov	r7, r5
 	ldr	r10, [r0, #24]
 	ldr	r3, [r3]
 	str	r3, [r5, #8]
-	ldr	r3, .L1231+8
+	ldr	r3, .L1257+8
 	ldr	r8, [r3]
 	ldrh	r3, [r0, #2]
 	str	r8, [r5, #12]
-	cbz	r3, .L1221
-	ldr	r2, .L1231+12
+	cbz	r3, .L1247
+	ldr	r2, .L1257+12
 	ldrh	r2, [r2]
 	subs	r2, r2, #1
 	cmp	r3, r2
-	bge	.L1221
+	bge	.L1247
 	ldrh	r2, [r0]
 	movw	r1, #65535
 	cmp	r2, r1
-	beq	.L1221
+	beq	.L1247
 	ldr	r1, [r0, #12]
 	subs	r3, r3, #1
 	mov	r0, r5
@@ -9135,44 +9175,44 @@ FtlMapBlkWriteDump_data:
 	bl	FlashReadPages
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L1221
+	beq	.L1247
 	ldr	r3, [r4, #24]
 	ldrh	r1, [r8, #8]
 	ldr	r2, [r3, r1, lsl #2]
 	ldr	r3, [r5, #4]
 	cmp	r2, r3
-	bne	.L1221
+	bne	.L1247
 	ldr	r2, [r5, #8]
-.L1230:
+.L1256:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
 	b	FtlMapWritePage
-.L1221:
+.L1247:
 	subs	r6, r6, #1
 	uxth	r6, r6
 	ldr	r3, [r10, r6, lsl #2]
 	str	r3, [r7, #4]
-	cbz	r3, .L1222
+	cbz	r3, .L1248
 	movs	r2, #1
-	ldr	r0, .L1231
+	ldr	r0, .L1257
 	mov	r1, r2
 	bl	FlashReadPages
-.L1223:
+.L1249:
 	ldr	r2, [r7, #8]
 	mov	r1, r6
-	b	.L1230
-.L1222:
-	ldr	r3, .L1231+16
+	b	.L1256
+.L1248:
+	ldr	r3, .L1257+16
 	movs	r1, #255
 	ldr	r0, [r7, #8]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-	b	.L1223
-.L1219:
+	b	.L1249
+.L1245:
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L1232:
+.L1258:
 	.align	2
-.L1231:
+.L1257:
 	.word	.LANCHOR138
 	.word	.LANCHOR107
 	.word	.LANCHOR114
@@ -9192,10 +9232,10 @@ FtlVpcTblFlush:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, #0
-	ldr	r5, .L1248
-	ldr	r3, .L1248+4
-	ldr	fp, .L1248+76
-	ldr	r6, .L1248+8
+	ldr	r5, .L1274
+	ldr	r3, .L1274+4
+	ldr	fp, .L1274+76
+	ldr	r6, .L1274+8
 	ldr	r7, [r3]
 	ldr	r0, [fp]
 	ldrh	r3, [r5]
@@ -9203,23 +9243,23 @@ FtlVpcTblFlush:
 	str	r0, [r6, #8]
 	strh	r3, [r7, #2]	@ movhi
 	movw	r3, #61604
-	ldr	r4, .L1248+12
+	ldr	r4, .L1274+12
 	strh	r3, [r7]	@ movhi
-	ldr	r2, .L1248+16
+	ldr	r2, .L1274+16
 	ldr	r3, [r5, #8]
-	ldr	ip, .L1248+80
+	ldr	ip, .L1274+80
 	str	r10, [r7, #8]
 	str	r3, [r7, #4]
 	stm	r4, {r2, ip}
 	ldrh	r2, [r5, #6]
 	str	r10, [r7, #12]
-	ldr	r8, .L1248+84
+	ldr	r8, .L1274+84
 	strh	r2, [r4, #8]	@ movhi
-	ldr	r2, .L1248+20
-	ldr	r3, .L1248+24
+	ldr	r2, .L1274+20
+	ldr	r3, .L1274+24
 	ldrh	r2, [r2]
 	strb	r2, [r4, #10]
-	ldr	r2, .L1248+28
+	ldr	r2, .L1274+28
 	ldrh	r1, [r2]
 	ldrh	ip, [r2, #2]
 	strh	r1, [r4, #14]	@ movhi
@@ -9227,7 +9267,7 @@ FtlVpcTblFlush:
 	ldrb	r2, [r2, #8]	@ zero_extendqisi2
 	strb	r2, [r4, #11]
 	orr	r1, r1, ip, lsl #6
-	ldr	r2, .L1248+32
+	ldr	r2, .L1274+32
 	strh	r1, [r4, #16]	@ movhi
 	ldrh	r1, [r2]
 	ldrh	ip, [r2, #2]
@@ -9236,7 +9276,7 @@ FtlVpcTblFlush:
 	ldrb	r2, [r2, #8]	@ zero_extendqisi2
 	strb	r2, [r4, #12]
 	orr	r1, r1, ip, lsl #6
-	ldr	r2, .L1248+36
+	ldr	r2, .L1274+36
 	strh	r1, [r4, #20]	@ movhi
 	ldrh	r1, [r2]
 	ldrh	ip, [r2, #2]
@@ -9245,32 +9285,32 @@ FtlVpcTblFlush:
 	ldrb	r2, [r2, #8]	@ zero_extendqisi2
 	strb	r2, [r4, #13]
 	orr	r1, r1, ip, lsl #6
-	ldr	r2, .L1248+40
+	ldr	r2, .L1274+40
 	strh	r1, [r4, #24]	@ movhi
 	movs	r1, #255
 	ldr	r2, [r2]
 	str	r2, [r4, #32]
 	ldr	r2, [r8]
 	str	r2, [r4, #40]
-	ldr	r2, .L1248+44
+	ldr	r2, .L1274+44
 	ldr	r2, [r2]
 	str	r2, [r4, #36]
 	ldrh	r2, [r3]
 	bl	ftl_memset
 	mov	r1, r4
-	ldr	r4, .L1248+48
+	ldr	r4, .L1274+48
 	movs	r2, #48
 	ldr	r0, [r6, #8]
 	bl	ftl_memcpy
 	ldrh	r2, [r4]
 	ldr	r0, [r6, #8]
-	ldr	r1, .L1248+52
+	ldr	r1, .L1274+52
 	lsls	r2, r2, #1
 	adds	r0, r0, #48
 	ldr	r1, [r1]
 	bl	ftl_memcpy
 	ldrh	r0, [r4]
-	ldr	r1, .L1248+56
+	ldr	r1, .L1274+56
 	ldr	r4, [r6, #8]
 	lsrs	r2, r0, #3
 	adds	r0, r0, #24
@@ -9282,13 +9322,13 @@ FtlVpcTblFlush:
 	mov	r4, r10
 	bl	ftl_memcpy
 	mov	r0, r10
-	ldr	r10, .L1248+4
+	ldr	r10, .L1274+4
 	bl	FtlUpdateVaildLpn
 	movw	r3, #65535
 	str	r3, [sp]
-	ldr	r3, .L1248+24
+	ldr	r3, .L1274+24
 	str	r3, [sp, #4]
-.L1234:
+.L1260:
 	ldr	r3, [fp]
 	ldrh	r1, [r5, #2]
 	ldrh	r2, [r5]
@@ -9297,11 +9337,11 @@ FtlVpcTblFlush:
 	str	r3, [r6, #12]
 	orr	r3, r1, r2, lsl #10
 	str	r3, [r6, #4]
-	ldr	r3, .L1248+60
+	ldr	r3, .L1274+60
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r1, r3
-	blt	.L1235
+	blt	.L1261
 	ldrh	r3, [r5, #4]
 	strh	r2, [r5, #4]	@ movhi
 	str	r3, [sp]
@@ -9317,7 +9357,7 @@ FtlVpcTblFlush:
 	str	r2, [r6, #4]
 	str	r3, [r7, #4]
 	strh	r0, [r7, #2]	@ movhi
-.L1235:
+.L1261:
 	ldr	r3, [sp, #4]
 	ldr	r0, [fp]
 	ldrh	r1, [r3]
@@ -9326,7 +9366,7 @@ FtlVpcTblFlush:
 	str	r0, [r7, #12]
 	mov	r2, r3
 	mov	r1, r3
-	ldr	r0, .L1248+8
+	ldr	r0, .L1274+8
 	bl	FlashProgPages
 	ldrh	r3, [r5, #2]
 	ldr	r2, [r6]
@@ -9334,51 +9374,51 @@ FtlVpcTblFlush:
 	uxth	r3, r3
 	adds	r1, r2, #1
 	strh	r3, [r5, #2]	@ movhi
-	bne	.L1236
+	bne	.L1262
 	cmp	r3, #1
-	bne	.L1237
+	bne	.L1263
 	movw	r2, #1138
-	ldr	r1, .L1248+64
-	ldr	r0, .L1248+68
+	ldr	r1, .L1274+64
+	ldr	r0, .L1274+68
 	bl	printf
-.L1237:
+.L1263:
 	ldrh	r3, [r5, #2]
 	adds	r4, r4, #1
 	uxth	r4, r4
 	cmp	r3, #1
 	itttt	eq
-	ldreq	r3, .L1248+60
+	ldreq	r3, .L1274+60
 	ldrheq	r3, [r3]
 	addeq	r3, r3, #-1
 	strheq	r3, [r5, #2]	@ movhi
 	cmp	r4, #3
-	bls	.L1234
+	bls	.L1260
 	mov	r2, r4
 	ldr	r1, [r6, #4]
-	ldr	r0, .L1248+72
+	ldr	r0, .L1274+72
 	bl	printf
-.L1240:
-	b	.L1240
-.L1236:
+.L1266:
+	b	.L1266
+.L1262:
 	cmp	r3, #1
-	beq	.L1234
+	beq	.L1260
 	cmp	r2, #256
-	beq	.L1234
+	beq	.L1260
 	ldr	r2, [sp]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1241
+	beq	.L1267
 	movs	r1, #1
 	mov	r0, r2
 	bl	FtlFreeSysBlkQueueIn
-.L1241:
+.L1267:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1249:
+.L1275:
 	.align	2
-.L1248:
+.L1274:
 	.word	.LANCHOR139
 	.word	.LANCHOR114
 	.word	.LANCHOR138
@@ -9397,7 +9437,7 @@ FtlVpcTblFlush:
 	.word	.LANCHOR20
 	.word	.LANCHOR165
 	.word	.LC1
-	.word	.LC35
+	.word	.LC39
 	.word	.LANCHOR106
 	.word	1342177352
 	.word	.LANCHOR82
@@ -9433,17 +9473,17 @@ sftl_deinit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L1253
+	ldr	r3, .L1279
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L1252
+	bne	.L1278
 	bl	FtlSysFlush
-.L1252:
+.L1278:
 	movs	r0, #0
 	pop	{r3, pc}
-.L1254:
+.L1280:
 	.align	2
-.L1253:
+.L1279:
 	.word	.LANCHOR166
 	.size	sftl_deinit, .-sftl_deinit
 	.section	.text.FtlDiscard,"ax",%progbits
@@ -9457,24 +9497,24 @@ sftl_deinit:
 FtlDiscard:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1270
+	ldr	r3, .L1296
 	adds	r2, r0, r1
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r7, r0
 	mov	r5, r1
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1263
+	bhi	.L1289
 	cmp	r1, #31
-	bhi	.L1257
-.L1262:
+	bhi	.L1283
+.L1288:
 	movs	r0, #0
-.L1255:
+.L1281:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1257:
-	ldr	r8, .L1270+12
+.L1283:
+	ldr	r8, .L1296+12
 	ldrh	r4, [r8]
 	mov	r1, r4
 	bl	__aeabi_uidiv
@@ -9482,7 +9522,7 @@ FtlDiscard:
 	mov	r6, r0
 	subs	r7, r7, r3
 	uxth	r7, r7
-	cbz	r7, .L1258
+	cbz	r7, .L1284
 	subs	r4, r4, r7
 	adds	r6, r6, #1
 	cmp	r4, r5
@@ -9490,32 +9530,32 @@ FtlDiscard:
 	movcs	r4, r5
 	uxth	r4, r4
 	subs	r5, r5, r4
-.L1258:
-	ldr	r4, .L1270+4
+.L1284:
+	ldr	r4, .L1296+4
 	mov	r3, #-1
-	ldr	r7, .L1270+8
+	ldr	r7, .L1296+8
 	str	r3, [sp, #4]
-.L1259:
+.L1285:
 	ldrh	r3, [r8]
 	cmp	r5, r3
-	bcs	.L1261
-	ldr	r3, .L1270+4
+	bcs	.L1287
+	ldr	r3, .L1296+4
 	ldr	r2, [r3]
 	cmp	r2, #32
-	bls	.L1262
+	bls	.L1288
 	movs	r4, #0
 	str	r4, [r3]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L1262
-.L1261:
+	b	.L1288
+.L1287:
 	movs	r2, #0
 	mov	r1, sp
 	mov	r0, r6
 	bl	log2phys
 	ldr	r3, [sp]
 	adds	r3, r3, #1
-	beq	.L1260
+	beq	.L1286
 	ldr	r3, [r4]
 	movs	r2, #1
 	add	r1, sp, #4
@@ -9530,17 +9570,17 @@ FtlDiscard:
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L1260:
+.L1286:
 	ldrh	r3, [r8]
 	adds	r6, r6, #1
 	subs	r5, r5, r3
-	b	.L1259
-.L1263:
+	b	.L1285
+.L1289:
 	mov	r0, #-1
-	b	.L1255
-.L1271:
+	b	.L1281
+.L1297:
 	.align	2
-.L1270:
+.L1296:
 	.word	.LANCHOR34
 	.word	.LANCHOR167
 	.word	.LANCHOR86
@@ -9557,47 +9597,47 @@ FtlDiscard:
 allocate_new_data_superblock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1282
+	ldr	r3, .L1308
 	push	{r4, r5, r6, lr}
 	mov	r6, r0
 	ldrh	r4, [r0]
 	ldrh	r3, [r3]
 	cmp	r3, r4
-	bcs	.L1273
-	movw	r2, #2760
-	ldr	r1, .L1282+4
-	ldr	r0, .L1282+8
+	bcs	.L1299
+	movw	r2, #2755
+	ldr	r1, .L1308+4
+	ldr	r0, .L1308+8
 	bl	printf
-.L1273:
+.L1299:
 	movw	r3, #65535
 	cmp	r4, r3
-	beq	.L1274
-	ldr	r3, .L1282+12
+	beq	.L1300
+	ldr	r3, .L1308+12
 	mov	r0, r4
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
-	cbz	r3, .L1275
+	cbz	r3, .L1301
 	bl	INSERT_DATA_LIST
-.L1274:
-	ldr	r5, .L1282+16
+.L1300:
+	ldr	r5, .L1308+16
 	movw	r2, #65535
 	movs	r3, #1
 	strb	r3, [r6, #8]
 	ldrh	r0, [r5]
 	cmp	r0, r2
-	beq	.L1276
+	beq	.L1302
 	cmp	r4, r0
-	bne	.L1277
-	ldr	r3, .L1282+12
+	bne	.L1303
+	ldr	r3, .L1308+12
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L1278
-.L1277:
+	cbz	r3, .L1304
+.L1303:
 	bl	update_vpc_list
-.L1278:
+.L1304:
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.L1276:
+.L1302:
 	mov	r0, r6
 	bl	allocate_data_superblock
 	bl	l2p_flush
@@ -9606,12 +9646,12 @@ allocate_new_data_superblock:
 	bl	FtlVpcTblFlush
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L1275:
+.L1301:
 	bl	INSERT_FREE_LIST
-	b	.L1274
-.L1283:
+	b	.L1300
+.L1309:
 	.align	2
-.L1282:
+.L1308:
 	.word	.LANCHOR5
 	.word	.LANCHOR168
 	.word	.LC1
@@ -9627,125 +9667,109 @@ allocate_new_data_superblock:
 	.fpu softvfp
 	.type	FtlProgPages, %function
 FtlProgPages:
-	@ args = 0, pretend = 0, frame = 8
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r6, #0
-	ldr	r8, .L1298+24
-	mov	r4, r3
+	ldr	r10, .L1329+20
+	mov	r5, r3
 	movs	r2, #0
-	mov	r5, r0
+	mov	r4, r0
+	ldr	fp, .L1329
+	mov	r8, r1
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
-	mov	r10, r1
 	bl	FlashProgPages
-.L1285:
-	cmp	r6, r10
-	beq	.L1292
-	ldr	r7, .L1298
-	b	.L1293
-.L1288:
-	ldr	r0, [r5, #4]
+.L1311:
+	cmp	r6, r8
+	bne	.L1318
+	ldr	r3, .L1329
+	ldrb	r2, [r5, #6]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L1310
+	movw	r2, #997
+	ldr	r1, .L1329+4
+	ldr	r0, .L1329+8
+	bl	printf
+.L1310:
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1313:
+	ldr	r1, [r4, #4]
+	mov	r0, r10
+	bl	printf
+	ldr	r0, [r4, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-	ldrh	r3, [r4]
-	cmp	r3, r0
-	bne	.L1286
-	ldr	r1, [r8]
-	ldrh	r0, [r4, #4]
-	ldrh	r2, [r1, r3, lsl #1]
-	subs	r2, r2, r0
-	strh	r2, [r1, r3, lsl #1]	@ movhi
-	ldrh	r3, [r7]
-	strh	r3, [r4, #2]	@ movhi
-	movs	r3, #0
-	strb	r3, [r4, #6]
-	strh	r3, [r4, #4]	@ movhi
-.L1286:
-	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1287
-	mov	r0, r4
+	bl	decrement_vpc_count
+	ldrh	r3, [r5, #4]
+	cbnz	r3, .L1312
+	mov	r0, r5
 	bl	allocate_new_data_superblock
-.L1287:
-	ldr	r2, .L1298+4
-	ldr	r3, [r2, #96]
-	adds	r3, r3, #1
-	str	r3, [r2, #96]
-	ldr	r0, [r5, #4]
-	ubfx	r0, r0, #10, #16
-	bl	FtlGcMarkBadPhyBlk
-	mov	r0, r4
+.L1312:
+	mov	r0, r5
 	bl	get_new_active_ppa
 	movs	r2, #0
-	str	r0, [r5, #4]
-	str	r0, [sp, #4]
+	str	r0, [r4, #4]
+	str	r0, [sp, #12]
 	movs	r1, #1
-	ldrb	r3, [r4, #9]	@ zero_extendqisi2
-	mov	r0, r5
+	ldrb	r3, [r5, #9]	@ zero_extendqisi2
+	mov	r0, r4
 	bl	FlashProgPages
-.L1293:
-	ldr	r3, [r5]
-	adds	r3, r3, #1
-	beq	.L1288
-	ldr	r3, .L1298+8
-	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-	ldrh	r3, [r3]
+.L1318:
+	ldr	r2, [r4]
+	adds	r3, r2, #1
+	beq	.L1313
+	cmp	r2, #256
+	beq	.L1313
+	ldrb	r2, [r5, #6]	@ zero_extendqisi2
+	ldrh	r3, [fp]
 	cmp	r2, r3
-	bcc	.L1289
-	mov	r2, #960
-	ldr	r1, .L1298+12
-	ldr	r0, .L1298+16
+	bcc	.L1314
+	movw	r2, #982
+	ldr	r1, .L1329+4
+	ldr	r0, .L1329+8
 	bl	printf
-.L1289:
-	ldr	r3, [r5, #4]
-	add	r1, sp, #8
+.L1314:
+	ldr	r3, [r4, #4]
+	add	r1, sp, #16
 	movs	r2, #1
-	ldr	r0, [r5, #16]
+	ldr	r0, [r4, #16]
 	str	r3, [r1, #-4]!
 	bl	log2phys
-	ldr	r3, [r5, #12]
-	ldr	fp, [r3, #12]
-	ubfx	r0, fp, #10, #16
+	ldr	r3, [r4, #12]
+	ldr	r3, [r3, #12]
+	ubfx	r0, r3, #10, #16
+	str	r3, [sp, #4]
 	bl	P2V_block_in_plane
-	cmp	fp, #-1
+	ldr	r3, [sp, #4]
 	mov	r7, r0
-	beq	.L1290
-	ldr	r3, [r8]
+	adds	r3, r3, #1
+	beq	.L1315
+	ldr	r3, .L1329+12
+	ldr	r3, [r3]
 	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L1291
+	cbnz	r2, .L1316
 	mov	r1, r0
-	ldr	r0, .L1298+20
+	ldr	r0, .L1329+16
 	bl	printf
-.L1291:
+.L1316:
 	mov	r0, r7
 	bl	decrement_vpc_count
-.L1290:
+.L1315:
 	adds	r6, r6, #1
-	adds	r5, r5, #20
-	b	.L1285
-.L1292:
-	ldr	r3, .L1298+8
-	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-	ldrh	r3, [r3]
-	cmp	r2, r3
-	bcc	.L1284
-	movw	r2, #975
-	ldr	r1, .L1298+12
-	ldr	r0, .L1298+16
-	bl	printf
-.L1284:
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1299:
+	adds	r4, r4, #20
+	b	.L1311
+.L1330:
 	.align	2
-.L1298:
-	.word	.LANCHOR19
-	.word	.LANCHOR135
+.L1329:
 	.word	.LANCHOR3
 	.word	.LANCHOR169
 	.word	.LC1
-	.word	.LC36
 	.word	.LANCHOR42
+	.word	.LC41
+	.word	.LC40
 	.size	FtlProgPages, .-FtlProgPages
 	.section	.text.FtlGcFreeTempBlock,"ax",%progbits
 	.align	1
@@ -9760,183 +9784,148 @@ FtlGcFreeTempBlock:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movw	r3, #65535
-	ldr	r0, .L1319
-	ldr	r5, .L1319+4
-	ldrh	r6, [r0]
-	mov	r4, r0
-	cmp	r6, r3
-	beq	.L1301
-	ldr	r3, .L1319+8
+	ldr	r4, .L1346
+	ldrh	r2, [r4]
+	cmp	r2, r3
+	beq	.L1332
+	ldr	r3, .L1346+4
+	mov	r0, r4
 	ldrh	r1, [r3]
 	bl	FtlGcScanTempBlk
 	str	r0, [sp, #12]
-	adds	r0, r0, #1
-	beq	.L1301
-	ldr	r3, .L1319+12
-	ldr	r2, [r3]
-	ldrh	r3, [r2, r6, lsl #1]
-	cmp	r3, #4
-	bls	.L1302
-	subs	r3, r3, #5
-	movs	r0, #1
-	strh	r3, [r2, r6, lsl #1]	@ movhi
-	bl	FtlEctTblFlush
-.L1302:
-	ldr	r3, [r5]
-	cbnz	r3, .L1303
-	ldr	r2, .L1319+16
-	ldr	r0, [sp, #12]
-	ldr	r3, [r2, #96]
-	ubfx	r0, r0, #10, #16
-	adds	r3, r3, #1
-	str	r3, [r2, #96]
-	bl	FtlBbmMapBadBlock
-	bl	FtlBbmTblFlush
-.L1303:
-	movs	r0, #1
-	movs	r3, #0
-	str	r3, [r5]
-.L1300:
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1301:
-	ldrh	r2, [r4]
-	movs	r3, #0
-	str	r3, [r5]
+.L1332:
+	ldr	r3, .L1346+8
+	movs	r2, #0
+	str	r2, [r3]
 	movw	r3, #65535
+	ldrh	r2, [r4]
 	cmp	r2, r3
-	bne	.L1305
-.L1314:
-	movs	r0, #0
-	b	.L1300
-.L1305:
-	ldr	r6, .L1319+8
+	beq	.L1334
+	ldr	r6, .L1346+4
 	ldrb	r0, [r4, #7]	@ zero_extendqisi2
-	ldr	r5, .L1319+20
+	ldr	r5, .L1346+12
 	ldrh	r2, [r6]
 	ldrh	r1, [r5]
 	muls	r2, r0, r2
 	cmp	r1, r2
-	beq	.L1306
-	movs	r2, #162
-	ldr	r1, .L1319+24
-	ldr	r0, .L1319+28
+	beq	.L1335
+	movs	r2, #164
+	ldr	r1, .L1346+16
+	ldr	r0, .L1346+20
 	bl	printf
-.L1306:
+.L1335:
 	ldrh	r6, [r6]
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	ldr	r2, .L1319+32
+	ldr	r2, .L1346+24
 	ldrh	r0, [r4]
-	ldr	fp, .L1319+64
+	ldr	fp, .L1346+56
 	smulbb	r3, r3, r6
 	ldr	r1, [r2]
 	movs	r6, #0
-	str	r2, [sp, #4]
+	mov	r10, r2
 	strh	r3, [r1, r0, lsl #1]	@ movhi
-	ldr	r1, .L1319+36
+	ldr	r1, .L1346+28
 	ldrh	r3, [r5]
 	ldr	r0, [r1]
 	add	r3, r3, r0
 	str	r3, [r1]
-.L1307:
+.L1336:
 	ldrh	r2, [r5]
 	uxth	r3, r6
 	cmp	r2, r3
-	bhi	.L1311
+	bhi	.L1340
 	movw	r0, #65535
 	bl	decrement_vpc_count
-	ldr	r3, [sp, #4]
 	ldrh	r0, [r4]
-	ldr	r3, [r3]
+	ldr	r3, [r10]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	beq	.L1312
+	beq	.L1341
 	bl	INSERT_DATA_LIST
-.L1313:
-	ldr	r3, .L1319+40
+.L1342:
+	ldr	r2, .L1346+32
+	movs	r3, #0
 	movw	r6, #65535
+	strh	r3, [r5]	@ movhi
 	strh	r6, [r4]	@ movhi
-	movs	r4, #0
-	strh	r4, [r5]	@ movhi
-	strh	r4, [r3]	@ movhi
+	strh	r3, [r2]	@ movhi
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	ldr	r3, .L1319+44
+	ldr	r3, .L1346+36
 	strh	r6, [r3]	@ movhi
-	ldr	r3, .L1319+48
+	ldr	r3, .L1346+40
 	ldrh	r2, [r3]
-	ldr	r3, .L1319+52
+	ldr	r3, .L1346+44
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, asr #2
-	ble	.L1314
-	ldr	r3, .L1319+56
-	movs	r2, #20
-	mov	r0, r4
-	strh	r2, [r3]	@ movhi
-	b	.L1300
-.L1311:
+	ittt	gt
+	ldrgt	r3, .L1346+48
+	movgt	r2, #20
+	strhgt	r2, [r3]	@ movhi
+.L1334:
+	movs	r0, #0
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1340:
 	uxth	r3, r6
-	movs	r7, #12
+	mov	r8, #12
 	ldr	r2, [fp]
-	muls	r7, r3, r7
-	ldr	r3, .L1319+60
-	ldr	r8, [r3]
-	add	r10, r8, r7
-	ldr	r1, [r10, #8]
-	cmp	r1, r2
-	bcc	.L1308
-	movs	r2, #168
-	ldr	r1, .L1319+24
-	ldr	r0, .L1319+28
-	bl	printf
-.L1308:
+	mul	r8, r8, r3
+	ldr	r3, .L1346+52
+	ldr	r3, [r3]
+	add	r7, r3, r8
+	ldr	r0, [r7, #8]
+	cmp	r0, r2
+	bcc	.L1337
+.L1344:
+	ldrh	r0, [r4]
+	b	.L1345
+.L1337:
 	movs	r2, #0
 	add	r1, sp, #12
-	ldr	r0, [r10, #8]
+	str	r3, [sp, #4]
 	bl	log2phys
+	ldr	r3, [sp, #4]
 	ldr	r2, [sp, #12]
-	ldr	r0, [r8, r7]
+	ldr	r0, [r3, r8]
 	cmp	r0, r2
-	bne	.L1309
+	bne	.L1339
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	movs	r2, #1
-	mov	r7, r0
-	add	r1, r10, #4
-	ldr	r0, [r10, #8]
+	mov	r8, r0
+	adds	r1, r7, #4
+	ldr	r0, [r7, #8]
 	bl	log2phys
-	mov	r0, r7
-.L1318:
+	mov	r0, r8
+.L1345:
 	bl	decrement_vpc_count
-.L1310:
-	adds	r6, r6, #1
-	b	.L1307
-.L1309:
-	ldr	r3, [r10, #4]
+	b	.L1338
+.L1339:
+	ldr	r3, [r7, #4]
 	cmp	r2, r3
-	beq	.L1310
-	ldrh	r0, [r4]
-	b	.L1318
-.L1312:
+	bne	.L1344
+.L1338:
+	adds	r6, r6, #1
+	b	.L1336
+.L1341:
 	bl	INSERT_FREE_LIST
-	b	.L1313
-.L1320:
+	b	.L1342
+.L1347:
 	.align	2
-.L1319:
+.L1346:
 	.word	.LANCHOR53
-	.word	.LANCHOR133
 	.word	.LANCHOR19
-	.word	.LANCHOR43
-	.word	.LANCHOR135
+	.word	.LANCHOR133
 	.word	.LANCHOR70
 	.word	.LANCHOR170
 	.word	.LC1
 	.word	.LANCHOR42
 	.word	.LANCHOR84
 	.word	.LANCHOR69
-	.word	.LANCHOR144
+	.word	.LANCHOR145
 	.word	.LANCHOR48
 	.word	.LANCHOR171
 	.word	.LANCHOR100
@@ -9955,27 +9944,27 @@ FtlGcPageRecovery:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	ldr	r4, .L1323
-	ldr	r5, .L1323+4
+	ldr	r4, .L1350
+	ldr	r5, .L1350+4
 	ldrh	r1, [r4]
 	mov	r0, r5
 	bl	FtlGcScanTempBlk
 	ldrh	r2, [r5, #2]
 	ldrh	r3, [r4]
 	cmp	r2, r3
-	bcc	.L1321
-	ldr	r0, .L1323+8
+	bcc	.L1348
+	ldr	r0, .L1350+8
 	bl	FtlMapBlkWriteDump_data
 	movs	r0, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r3, .L1323+12
+	ldr	r3, .L1350+12
 	movs	r2, #0
 	str	r2, [r3]
-.L1321:
+.L1348:
 	pop	{r3, r4, r5, pc}
-.L1324:
+.L1351:
 	.align	2
-.L1323:
+.L1350:
 	.word	.LANCHOR19
 	.word	.LANCHOR53
 	.word	.LANCHOR129
@@ -9994,13 +9983,13 @@ FtlPowerLostRecovery:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #0
-	ldr	r5, .L1326
-	ldr	r3, .L1326+4
+	ldr	r5, .L1353
+	ldr	r3, .L1353+4
 	mov	r0, r5
 	str	r4, [r3]
 	bl	FtlRecoverySuperblock
 	mov	r0, r5
-	ldr	r5, .L1326+8
+	ldr	r5, .L1353+8
 	bl	FtlSlcSuperblockCheck
 	mov	r0, r5
 	bl	FtlRecoverySuperblock
@@ -10011,9 +10000,9 @@ FtlPowerLostRecovery:
 	bl	decrement_vpc_count
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L1327:
+.L1354:
 	.align	2
-.L1326:
+.L1353:
 	.word	.LANCHOR51
 	.word	.LANCHOR157
 	.word	.LANCHOR52
@@ -10031,72 +10020,51 @@ Ftl_gc_temp_data_write_back:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r3, #0
-	ldr	r4, .L1335
+	ldr	r4, .L1363
 	movs	r6, #0
 	movs	r7, #20
 	mov	r2, r3
-	ldr	r5, .L1335+4
+	ldr	r5, .L1363+4
 	ldr	r1, [r4]
 	ldr	r0, [r5]
 	bl	FlashProgPages
-.L1329:
+.L1356:
 	ldr	r1, [r4]
 	uxth	r3, r6
 	cmp	r1, r3
-	bhi	.L1332
+	bhi	.L1359
 	ldr	r0, [r5]
 	bl	FtlGcBufFree
-	ldr	r3, .L1335+8
+	ldr	r3, .L1363+8
 	movs	r0, #0
 	str	r0, [r4]
 	ldrh	r3, [r3, #4]
-	cbnz	r3, .L1328
+	cbnz	r3, .L1355
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
-	b	.L1334
-.L1332:
+	movs	r0, #1
+.L1355:
+	pop	{r3, r4, r5, r6, r7, pc}
+.L1359:
 	muls	r3, r7, r3
 	ldr	r2, [r5]
 	adds	r6, r6, #1
 	adds	r1, r2, r3
 	ldr	r2, [r2, r3]
-	adds	r3, r2, #1
-	bne	.L1330
-	ldr	r3, .L1335+8
-	movs	r5, #0
-	ldr	r0, .L1335+12
-	ldrh	r4, [r3]
-	ldr	r0, [r0]
-	strh	r5, [r0, r4, lsl #1]	@ movhi
-	strh	r2, [r3]	@ movhi
-	ldr	r2, .L1335+16
-	ldr	r0, [r1, #4]
-	ldr	r3, [r2, #96]
-	ubfx	r0, r0, #10, #16
-	adds	r3, r3, #1
-	str	r3, [r2, #96]
-	bl	FtlBbmMapBadBlock
-	bl	FtlBbmTblFlush
-	bl	FtlGcPageVarInit
-.L1334:
-	movs	r0, #1
-.L1328:
-	pop	{r3, r4, r5, r6, r7, pc}
-.L1330:
-	ldr	r3, [r1, #12]
+	ldr	r0, [r1, #12]
 	ldr	r1, [r1, #4]
-	ldr	r2, [r3, #8]
-	ldr	r0, [r3, #12]
+	adds	r3, r2, #1
+	it	ne
+	ldrne	r2, [r0, #8]
+	ldr	r0, [r0, #12]
 	bl	FtlGcUpdatePage
-	b	.L1329
-.L1336:
+	b	.L1356
+.L1364:
 	.align	2
-.L1335:
+.L1363:
 	.word	.LANCHOR62
 	.word	.LANCHOR104
 	.word	.LANCHOR53
-	.word	.LANCHOR42
-	.word	.LANCHOR135
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
 	.section	.text.Ftl_get_new_temp_ppa,"ax",%progbits
 	.align	1
@@ -10111,34 +10079,34 @@ Ftl_get_new_temp_ppa:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movw	r3, #65535
-	ldr	r4, .L1340
+	ldr	r4, .L1368
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	beq	.L1338
+	beq	.L1366
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1339
-.L1338:
+	cbnz	r3, .L1367
+.L1366:
 	movs	r0, #0
 	movs	r5, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r0, .L1340
+	ldr	r0, .L1368
 	strb	r5, [r4, #8]
 	bl	allocate_data_superblock
-	ldr	r3, .L1340+4
+	ldr	r3, .L1368+4
 	strh	r5, [r3]	@ movhi
-	ldr	r3, .L1340+8
+	ldr	r3, .L1368+8
 	strh	r5, [r3]	@ movhi
 	bl	l2p_flush
 	mov	r0, r5
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1339:
-	ldr	r0, .L1340
+.L1367:
+	ldr	r0, .L1368
 	pop	{r3, r4, r5, lr}
 	b	get_new_active_ppa
-.L1341:
+.L1369:
 	.align	2
-.L1340:
+.L1368:
 	.word	.LANCHOR53
 	.word	.LANCHOR69
 	.word	.LANCHOR70
@@ -10154,184 +10122,188 @@ Ftl_get_new_temp_ppa:
 rk_ftl_garbage_collect:
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1424
+	ldr	r3, .L1460
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #40
-	str	r0, [sp, #20]
+	sub	sp, sp, #48
+	str	r0, [sp, #28]
 	ldr	r0, [r3]
 	cmp	r0, #0
-	bne	.L1394
-	ldr	r3, .L1424+4
+	bne	.L1427
+	ldr	r3, .L1460+4
 	ldrh	r3, [r3]
 	cmp	r3, #47
-	bls	.L1342
-	ldr	r3, .L1424+8
+	bls	.L1370
+	ldr	r3, .L1460+8
 	movw	r4, #65535
 	ldrh	r0, [r3]
 	cmp	r0, r4
-	beq	.L1344
-	ldr	r1, .L1424+12
+	beq	.L1372
+	ldr	r1, .L1460+12
 	ldrh	r2, [r1]
 	cmp	r2, r4
 	itt	eq
 	strheq	r0, [r1]	@ movhi
 	strheq	r2, [r3]	@ movhi
-.L1344:
-	ldr	r3, [sp, #20]
+.L1372:
+	ldr	r3, [sp, #28]
 	cmp	r3, #0
-	bne	.L1396
-	ldr	r3, .L1424+16
+	bne	.L1429
+	ldr	r3, .L1460+16
 	ldrh	r3, [r3]
 	cmp	r3, #24
-	bhi	.L1397
-	ldr	r2, .L1424+20
+	bhi	.L1430
+	ldr	r2, .L1460+20
 	cmp	r3, #16
 	ldrh	r4, [r2]
-	bls	.L1347
+	bls	.L1375
 	lsrs	r4, r4, #5
-.L1346:
-	ldr	r2, .L1424+24
+.L1374:
+	ldr	r2, .L1460+24
 	ldrh	r1, [r2]
 	cmp	r1, r3
 	mov	r1, r2
-	bcs	.L1350
-	ldr	r3, .L1424+28
+	bcs	.L1378
+	ldr	r3, .L1460+28
 	movw	r0, #65535
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L1351
-	ldr	r0, .L1424+12
+	bne	.L1379
+	ldr	r0, .L1460+12
 	ldrh	r0, [r0]
 	cmp	r0, r3
-	bne	.L1351
-	ldr	r3, .L1424+32
+	bne	.L1379
+	ldr	r3, .L1460+32
 	ldrh	r0, [r3]
-	cbnz	r0, .L1352
-	ldr	r3, .L1424+36
-	ldr	r4, .L1424+40
+	cbnz	r0, .L1380
+	ldr	r3, .L1460+36
+	ldr	r4, .L1460+40
 	ldr	r3, [r3]
 	ldr	r4, [r4]
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, lsr #2
-	bcs	.L1353
-.L1352:
-	ldr	r3, .L1424+44
+	bcs	.L1381
+.L1380:
+	ldr	r3, .L1460+44
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r1]	@ movhi
-.L1354:
-	ldr	r3, .L1424+48
+.L1382:
+	ldr	r3, .L1460+48
 	movs	r2, #0
 	str	r2, [r3]
-.L1342:
-	add	sp, sp, #40
+.L1370:
+	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1347:
+.L1375:
 	cmp	r3, #12
-	bls	.L1348
+	bls	.L1376
 	lsrs	r4, r4, #4
-	b	.L1346
-.L1348:
+	b	.L1374
+.L1376:
 	cmp	r3, #8
-	bls	.L1346
+	bls	.L1374
 	lsrs	r4, r4, #2
-	b	.L1346
-.L1397:
+	b	.L1374
+.L1430:
 	movs	r4, #1
-	b	.L1346
-.L1353:
+	b	.L1374
+.L1381:
 	movs	r3, #18
 	strh	r3, [r2]	@ movhi
-	b	.L1354
-.L1351:
-	ldr	r3, .L1424+44
+	b	.L1382
+.L1379:
+	ldr	r3, .L1460+44
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r1]	@ movhi
-.L1350:
-	ldr	r3, .L1424+52
+.L1378:
+	ldr	r3, .L1460+52
 	ldrh	r3, [r3]
-	cbz	r3, .L1345
+	cbz	r3, .L1373
 	adds	r4, r4, #32
 	uxth	r4, r4
-.L1345:
-	ldr	r5, .L1424+56
+.L1373:
+	ldr	r5, .L1460+56
 	movw	r3, #65535
 	ldrh	r2, [r5]
 	cmp	r2, r3
-	bne	.L1357
-	ldr	r3, .L1424+12
+	bne	.L1385
+	ldr	r3, .L1460+12
 	ldrh	r1, [r3]
 	cmp	r1, r2
-	beq	.L1358
-	ldr	r0, .L1424+60
+	beq	.L1386
+	ldr	r0, .L1460+60
 	ldr	r0, [r0]
 	ldrh	r1, [r0, r1, lsl #1]
-	cbnz	r1, .L1359
+	cbnz	r1, .L1387
 	strh	r2, [r3]	@ movhi
-.L1359:
+.L1387:
 	ldrh	r2, [r3]
 	strh	r2, [r5]	@ movhi
 	movw	r2, #65535
 	strh	r2, [r3]	@ movhi
-.L1358:
+.L1386:
 	ldrh	r0, [r5]
 	movw	r6, #65535
 	movs	r3, #0
 	strb	r3, [r5, #8]
 	cmp	r0, r6
-	beq	.L1357
+	beq	.L1385
 	bl	IsBlkInGcList
-	cbz	r0, .L1361
+	cbz	r0, .L1389
 	strh	r6, [r5]	@ movhi
-.L1361:
+.L1389:
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1357
-	ldr	r0, .L1424+56
+	beq	.L1385
+	ldr	r0, .L1460+56
 	bl	make_superblock
-	ldr	r2, .L1424+64
+	ldr	r2, .L1460+64
 	movs	r3, #0
 	strh	r3, [r5, #2]	@ movhi
 	strb	r3, [r5, #6]
 	strh	r3, [r2]	@ movhi
-	ldr	r3, .L1424+60
+	ldr	r3, .L1460+60
 	ldrh	r2, [r5]
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r2, lsl #1]
-	ldr	r3, .L1424+68
+	ldr	r3, .L1460+68
 	strh	r2, [r3]	@ movhi
-.L1357:
-	ldr	r2, .L1424+72
+.L1385:
+	ldr	r2, .L1460+72
 	ldrh	r3, [r5]
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L1362
-	ldr	r2, .L1424+76
+	beq	.L1390
+	ldr	r2, .L1460+76
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bne	.L1363
-.L1362:
+	beq	.L1390
+	ldr	r2, .L1460+28
+	ldrh	r2, [r2]
+	cmp	r2, r3
+	bne	.L1391
+.L1390:
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.L1363:
-	ldr	r5, .L1424+56
+.L1391:
+	ldr	r5, .L1460+56
 	mov	r6, r5
-.L1393:
+.L1426:
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1364
-	ldr	fp, .L1424+88
+	bne	.L1392
+	ldr	fp, .L1460+88
 	movs	r2, #0
-	ldr	r3, .L1424+48
+	ldr	r3, .L1460+48
 	mov	r8, fp
 	str	r2, [r3]
-.L1365:
+.L1393:
 	ldrh	r7, [fp]
 	mov	r0, r7
 	bl	List_get_gc_head_node
@@ -10339,78 +10311,78 @@ rk_ftl_garbage_collect:
 	movw	r1, #65535
 	cmp	r3, r1
 	strh	r3, [r6]	@ movhi
-	bne	.L1366
+	bne	.L1394
 	movs	r3, #0
 	movs	r0, #8
 	strh	r3, [fp]	@ movhi
-	b	.L1342
-.L1396:
+	b	.L1370
+.L1429:
 	movs	r4, #1
-	b	.L1345
-.L1366:
-	str	r0, [sp, #8]
+	b	.L1373
+.L1394:
+	str	r0, [sp, #16]
 	mov	r0, r3
-	str	r3, [sp, #4]
+	str	r3, [sp, #12]
 	adds	r7, r7, #1
 	bl	IsBlkInGcList
-	ldr	r3, [sp, #4]
-	ldr	r2, [sp, #8]
-	cbz	r0, .L1367
+	ldr	r3, [sp, #12]
+	ldr	r2, [sp, #16]
+	cbz	r0, .L1395
 	strh	r7, [fp]	@ movhi
-	b	.L1365
-.L1367:
+	b	.L1393
+.L1395:
 	uxth	r0, r2
-	ldr	r2, .L1424+20
-	ldr	r10, .L1424+60
+	ldr	r2, .L1460+20
+	ldr	r10, .L1460+60
 	uxth	r7, r7
 	ldrh	lr, [r2]
-	ldr	r2, .L1424+80
+	ldr	r2, .L1460+80
 	ldr	r1, [r10]
 	strh	r7, [fp]	@ movhi
 	ldrh	r2, [r2]
 	ldrh	ip, [r1, r0, lsl #1]
 	mul	r2, r2, lr
 	cmp	ip, r2, asr #1
-	bgt	.L1369
+	bgt	.L1397
 	cmp	r7, #48
-	bls	.L1370
+	bls	.L1398
 	cmp	ip, #8
-	bls	.L1370
-	ldr	r7, .L1424+84
+	bls	.L1398
+	ldr	r7, .L1460+84
 	ldrh	r7, [r7]
 	cmp	r7, #35
-	bhi	.L1370
-.L1369:
+	bhi	.L1398
+.L1397:
 	movs	r7, #0
 	strh	r7, [r8]	@ movhi
-.L1370:
+.L1398:
 	ldrh	r1, [r1, r0, lsl #1]
 	cmp	r2, r1
-	bgt	.L1371
+	bgt	.L1399
 	ldrh	r2, [r8]
 	cmp	r2, #3
-	bhi	.L1371
+	bhi	.L1399
 	movw	r3, #65535
 	strh	r3, [r6]	@ movhi
 	movs	r3, #0
 	strh	r3, [r8]	@ movhi
-.L1423:
-	ldr	r3, .L1424+32
+.L1459:
+	ldr	r3, .L1460+32
 	ldrh	r0, [r3]
-	b	.L1342
-.L1371:
-	cbnz	r1, .L1372
+	b	.L1370
+.L1399:
+	cbnz	r1, .L1400
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	ldrh	r3, [r8]
 	adds	r3, r3, #1
 	strh	r3, [r8]	@ movhi
-	b	.L1365
-.L1425:
+	b	.L1393
+.L1461:
 	.align	2
-.L1424:
+.L1460:
 	.word	.LANCHOR94
-	.word	.LANCHOR45
+	.word	.LANCHOR44
 	.word	.LANCHOR73
 	.word	.LANCHOR72
 	.word	.LANCHOR48
@@ -10423,7 +10395,7 @@ rk_ftl_garbage_collect:
 	.word	.LANCHOR171
 	.word	.LANCHOR95
 	.word	.LANCHOR74
-	.word	.LANCHOR144
+	.word	.LANCHOR145
 	.word	.LANCHOR42
 	.word	.LANCHOR173
 	.word	.LANCHOR174
@@ -10432,65 +10404,65 @@ rk_ftl_garbage_collect:
 	.word	.LANCHOR3
 	.word	.LANCHOR69
 	.word	.LANCHOR102
-.L1372:
+.L1400:
 	movs	r2, #0
 	strb	r2, [r6, #8]
-	ldr	r2, .L1426
+	ldr	r2, .L1462
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bne	.L1373
-	mov	r2, #700
-	ldr	r1, .L1426+4
-	ldr	r0, .L1426+8
+	bne	.L1401
+	movw	r2, #717
+	ldr	r1, .L1462+4
+	ldr	r0, .L1462+8
 	bl	printf
-.L1373:
-	ldr	r3, .L1426+12
+.L1401:
+	ldr	r3, .L1462+12
 	ldrh	r2, [r6]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1374
-	movw	r2, #701
-	ldr	r1, .L1426+4
-	ldr	r0, .L1426+8
+	bne	.L1402
+	movw	r2, #718
+	ldr	r1, .L1462+4
+	ldr	r0, .L1462+8
 	bl	printf
-.L1374:
-	ldr	r3, .L1426+16
+.L1402:
+	ldr	r3, .L1462+16
 	ldrh	r2, [r6]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1375
-	movw	r2, #702
-	ldr	r1, .L1426+4
-	ldr	r0, .L1426+8
+	bne	.L1403
+	movw	r2, #719
+	ldr	r1, .L1462+4
+	ldr	r0, .L1462+8
 	bl	printf
-.L1375:
+.L1403:
 	mov	r0, r5
 	bl	make_superblock
-	ldr	r2, .L1426+20
+	ldr	r2, .L1462+20
 	movs	r3, #0
 	ldrh	r1, [r6]
 	strh	r3, [r2]	@ movhi
 	ldr	r2, [r10]
 	ldrh	r1, [r2, r1, lsl #1]
-	ldr	r2, .L1426+24
+	ldr	r2, .L1462+24
 	strh	r3, [r6, #2]	@ movhi
 	strb	r3, [r6, #6]
 	strh	r1, [r2]	@ movhi
-.L1364:
-	ldr	r3, .L1426+28
+.L1392:
+	ldr	r3, .L1462+28
 	movs	r2, #1
 	str	r2, [r3]
-	ldr	r3, .L1426+32
+	ldr	r3, .L1462+32
 	ldrh	r3, [r3]
-	str	r3, [sp, #12]
-	ldr	r3, [sp, #20]
-	cbz	r3, .L1376
-	ldr	r3, .L1426+36
-	ldr	r2, [sp, #12]
+	str	r3, [sp, #16]
+	ldr	r3, [sp, #28]
+	cbz	r3, .L1404
+	ldr	r3, .L1462+36
+	ldr	r2, [sp, #16]
 	ldrh	r1, [r6]
 	ldrh	r3, [r3]
 	muls	r3, r2, r3
-	ldr	r2, .L1426+40
+	ldr	r2, .L1462+40
 	ldr	r2, [r2]
 	ldrh	r2, [r2, r1, lsl #1]
 	subs	r3, r3, r2
@@ -10498,10 +10470,10 @@ rk_ftl_garbage_collect:
 	addmi	r3, r3, #3
 	add	r4, r4, r3, asr #2
 	uxth	r4, r4
-.L1376:
+.L1404:
 	ldrh	r3, [r6, #2]
-	ldr	r1, [sp, #12]
-	ldr	fp, .L1426+64
+	ldr	r1, [sp, #16]
+	ldr	fp, .L1462+64
 	adds	r2, r3, r4
 	cmp	r2, r1
 	itt	gt
@@ -10510,94 +10482,94 @@ rk_ftl_garbage_collect:
 	mov	r3, #0
 	it	gt
 	uxthgt	r4, r4
-	str	r3, [sp, #8]
-.L1379:
-	ldrh	r3, [sp, #8]
+	str	r3, [sp, #24]
+.L1407:
+	ldrh	r3, [sp, #24]
 	cmp	r4, r3
-	bls	.L1387
-	ldr	r3, .L1426+36
+	bls	.L1415
+	ldr	r3, .L1462+36
 	movw	r10, #65535
 	ldrh	r1, [r5, #2]
 	mov	ip, #20
 	ldr	r0, [fp]
 	ldrh	lr, [r3]
-	ldr	r3, [sp, #8]
-	ldr	r7, .L1426+44
+	ldr	r3, [sp, #24]
+	ldr	r7, .L1462+44
 	adds	r3, r1, r3
-	str	r3, [sp, #16]
+	str	r3, [sp, #20]
 	movs	r3, #0
-	str	r3, [sp, #4]
-	b	.L1388
-.L1381:
+	str	r3, [sp, #12]
+	b	.L1416
+.L1409:
 	ldrh	r2, [r7, #2]!
 	cmp	r2, r10
-	beq	.L1380
-	ldr	r1, [sp, #4]
+	beq	.L1408
+	ldr	r1, [sp, #12]
 	mla	r8, ip, r1, r0
-	ldr	r1, [sp, #16]
+	ldr	r1, [sp, #20]
 	orr	r2, r1, r2, lsl #10
 	str	r2, [r8, #4]
-	ldr	r2, [sp, #4]
+	ldr	r2, [sp, #12]
 	adds	r2, r2, #1
 	uxth	r2, r2
-	str	r2, [sp, #4]
-.L1380:
+	str	r2, [sp, #12]
+.L1408:
 	adds	r3, r3, #1
-.L1388:
+.L1416:
 	uxth	r2, r3
 	cmp	lr, r2
-	bhi	.L1381
+	bhi	.L1409
 	ldrb	r2, [r5, #8]	@ zero_extendqisi2
-	ldr	r1, [sp, #4]
+	ldr	r1, [sp, #12]
 	bl	FlashReadPages
 	movs	r3, #0
-.L1422:
-	str	r3, [sp, #16]
-	ldr	r2, [sp, #4]
-	ldrh	r3, [sp, #16]
+.L1458:
+	str	r3, [sp, #20]
+	ldr	r2, [sp, #12]
+	ldrh	r3, [sp, #20]
 	cmp	r2, r3
-	bhi	.L1386
-	ldr	r3, [sp, #8]
+	bhi	.L1414
+	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	str	r3, [sp, #8]
-	b	.L1379
-.L1386:
-	ldr	r3, [sp, #16]
+	str	r3, [sp, #24]
+	b	.L1407
+.L1414:
+	ldr	r3, [sp, #20]
 	movs	r7, #20
 	muls	r7, r3, r7
 	ldr	r3, [fp]
 	adds	r2, r3, r7
 	ldr	r3, [r3, r7]
 	adds	r3, r3, #1
-	beq	.L1383
+	beq	.L1411
 	ldr	r8, [r2, #12]
 	movw	r3, #61589
 	ldrh	r2, [r8]
 	cmp	r2, r3
-	bne	.L1383
+	bne	.L1411
 	ldr	r10, [r8, #8]
 	cmp	r10, #-1
-	bne	.L1384
-	mov	r2, #736
-	ldr	r1, .L1426+4
-	ldr	r0, .L1426+8
+	bne	.L1412
+	movw	r2, #753
+	ldr	r1, .L1462+4
+	ldr	r0, .L1462+8
 	bl	printf
-.L1384:
+.L1412:
 	movs	r2, #0
-	add	r1, sp, #36
+	add	r1, sp, #40
 	mov	r0, r10
 	bl	log2phys
 	ldr	r0, [fp]
-	ldr	r3, [sp, #36]
+	ldr	r3, [sp, #40]
 	add	r0, r0, r7
 	ldr	r2, [r0, #4]
 	cmp	r2, r3
-	bne	.L1383
-	ldr	r2, .L1426+20
-	ldr	r10, .L1426+56
-	ldr	r1, .L1426+48
+	bne	.L1411
+	ldr	r2, .L1462+20
+	ldr	r10, .L1462+60
+	ldr	r1, .L1462+48
 	ldrh	r3, [r2]
-	str	r1, [sp, #28]
+	str	r1, [sp, #36]
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
 	ldr	r2, [r1]
@@ -10606,10 +10578,10 @@ rk_ftl_garbage_collect:
 	mla	r3, r1, r3, r2
 	ldr	r2, [r0, #16]
 	str	r2, [r3, #16]
-	str	r3, [sp, #24]
+	str	r3, [sp, #32]
 	bl	Ftl_get_new_temp_ppa
-	ldr	r3, [sp, #24]
-	ldr	r1, [sp, #28]
+	ldr	r3, [sp, #32]
+	ldr	r1, [sp, #36]
 	str	r0, [r3, #4]
 	ldr	r2, [r1]
 	movs	r1, #20
@@ -10617,18 +10589,18 @@ rk_ftl_garbage_collect:
 	ldr	r0, [fp]
 	mla	r2, r1, r3, r2
 	add	r0, r0, r7
-	ldr	r7, .L1426+16
+	ldr	r7, .L1462+16
 	ldr	r1, [r0, #8]
 	adds	r3, r3, #1
 	str	r1, [r2, #8]
 	ldr	r1, [r0, #12]
 	str	r1, [r2, #12]
 	movs	r1, #1
-	ldr	r2, [sp, #36]
+	ldr	r2, [sp, #40]
 	str	r2, [r8, #12]
 	ldrh	r2, [r7]
 	strh	r2, [r8, #2]	@ movhi
-	ldr	r2, .L1426+52
+	ldr	r2, .L1462+52
 	str	r3, [r10]
 	ldr	r2, [r2]
 	str	r2, [r8, #4]
@@ -10636,90 +10608,148 @@ rk_ftl_garbage_collect:
 	ldrb	r2, [r7, #7]	@ zero_extendqisi2
 	ldr	r3, [r10]
 	cmp	r2, r3
-	beq	.L1385
+	beq	.L1413
 	ldrh	r3, [r7, #4]
-	cbnz	r3, .L1383
-.L1385:
+	cbnz	r3, .L1411
+.L1413:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	r0, .L1383
-	ldr	r3, .L1426+28
+	cbz	r0, .L1411
+	ldr	r3, .L1462+28
 	movs	r2, #0
+	movw	r1, #65535
 	str	r2, [r3]
-	b	.L1423
-.L1383:
-	ldr	r3, [sp, #16]
+	ldr	r3, .L1462+56
+	strh	r1, [r3]	@ movhi
+	strh	r2, [r3, #2]	@ movhi
+	b	.L1459
+.L1411:
+	ldr	r3, [sp, #20]
 	adds	r3, r3, #1
-	b	.L1422
-.L1387:
+	b	.L1458
+.L1415:
 	ldrh	r3, [r5, #2]
 	add	r4, r4, r3
-	ldr	r3, [sp, #12]
+	ldr	r3, [sp, #16]
 	uxth	r4, r4
 	cmp	r3, r4
 	strh	r4, [r5, #2]	@ movhi
-	ldr	r4, .L1426+28
-	bhi	.L1389
-	ldr	r3, .L1426+56
+	bhi	.L1417
+	ldr	r3, .L1462+60
 	ldr	r3, [r3]
-	cbz	r3, .L1390
+	cbz	r3, .L1418
 	bl	Ftl_gc_temp_data_write_back
-	cbz	r0, .L1390
-	movs	r3, #0
-	str	r3, [r4]
-	b	.L1423
-.L1390:
-	ldr	r3, .L1426+20
-	ldrh	r1, [r3]
-	cbnz	r1, .L1391
-	ldr	r3, .L1426+40
+	cbz	r0, .L1418
+	ldr	r3, .L1462+28
+	movs	r2, #0
+	str	r2, [r3]
+	b	.L1459
+.L1463:
+	.align	2
+.L1462:
+	.word	.LANCHOR51
+	.word	.LANCHOR175
+	.word	.LC1
+	.word	.LANCHOR52
+	.word	.LANCHOR53
+	.word	.LANCHOR173
+	.word	.LANCHOR174
+	.word	.LANCHOR94
+	.word	.LANCHOR19
+	.word	.LANCHOR3
+	.word	.LANCHOR42
+	.word	.LANCHOR145+14
+	.word	.LANCHOR104
+	.word	.LANCHOR83
+	.word	.LANCHOR145
+	.word	.LANCHOR62
+	.word	.LANCHOR66
+.L1418:
+	ldr	r3, .L1464
+	ldrh	r4, [r3]
+	cmp	r4, #0
+	bne	.L1419
+	ldr	r8, .L1464+28
+	ldrh	r1, [r5]
+	ldr	r3, [r8]
+	ldrh	r3, [r3, r1, lsl #1]
+	cmp	r3, #0
+	beq	.L1419
+	ldr	r0, .L1464+4
+	ldr	r10, .L1464+32
+	ldrh	r2, [r5, #2]
+	ldrh	r0, [r0]
+	str	r3, [sp]
+	mov	r3, r4
+	str	r0, [sp, #4]
+	ldr	r0, .L1464+8
+	bl	printf
+.L1420:
+	ldr	r3, [r10]
+	cmp	r4, r3
+	bcs	.L1422
+	movs	r2, #0
+	add	r1, sp, #44
+	mov	r0, r4
+	bl	log2phys
+	ldr	r7, [sp, #44]
+	adds	r3, r7, #1
+	beq	.L1421
+	ubfx	r0, r7, #10, #16
+	bl	P2V_block_in_plane
+	ldrh	r3, [r5]
+	cmp	r3, r0
+	bne	.L1421
+	mov	r2, r7
+	mov	r1, r4
+	ldr	r0, .L1464+12
+	bl	printf
+.L1422:
+	ldr	r3, [r10]
+	cmp	r4, r3
+	bcc	.L1419
 	ldrh	r2, [r5]
-	ldr	r3, [r3]
-	ldrh	r0, [r3, r2, lsl #1]
-	cbz	r0, .L1391
+	movs	r1, #0
+	ldr	r3, [r8]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
 	ldrh	r0, [r5]
 	bl	update_vpc_list
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1391:
+.L1419:
 	movw	r3, #65535
-	strh	r3, [r5]	@ movhi
-.L1389:
-	movs	r3, #0
-	str	r3, [r4]
-	ldr	r3, .L1426+60
+	strh	r3, [r5]	@ movhi
+.L1417:
+	ldr	r3, .L1464+16
+	movs	r2, #0
+	str	r2, [r3]
+	ldr	r3, .L1464+20
 	ldrh	r0, [r3]
 	cmp	r0, #2
-	bhi	.L1392
-	ldr	r3, .L1426+32
+	bhi	.L1425
+	ldr	r3, .L1464+24
 	ldrh	r4, [r3]
-	b	.L1393
-.L1392:
+	b	.L1426
+.L1421:
+	adds	r4, r4, #1
+	b	.L1420
+.L1425:
 	adds	r0, r0, #1
-	b	.L1342
-.L1394:
-	movs	r0, #0
-	b	.L1342
+	b	.L1370
 .L1427:
+	movs	r0, #0
+	b	.L1370
+.L1465:
 	.align	2
-.L1426:
-	.word	.LANCHOR51
-	.word	.LANCHOR175
-	.word	.LC1
-	.word	.LANCHOR52
-	.word	.LANCHOR53
+.L1464:
 	.word	.LANCHOR173
 	.word	.LANCHOR174
+	.word	.LC42
+	.word	.LC43
 	.word	.LANCHOR94
+	.word	.LANCHOR48
 	.word	.LANCHOR19
-	.word	.LANCHOR3
 	.word	.LANCHOR42
-	.word	.LANCHOR144+14
-	.word	.LANCHOR104
-	.word	.LANCHOR83
-	.word	.LANCHOR62
-	.word	.LANCHOR48
-	.word	.LANCHOR66
+	.word	.LANCHOR152
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
 	.section	.text.FtlRead,"ax",%progbits
 	.align	1
@@ -10738,31 +10768,31 @@ FtlRead:
 	mov	r6, r1
 	mov	r8, r3
 	str	r2, [sp, #24]
-	bne	.L1429
+	bne	.L1467
 	mov	r2, r3
 	ldr	r1, [sp, #24]
 	add	r0, r6, #256
 	bl	FtlVendorPartRead
 	str	r0, [sp, #4]
-.L1428:
+.L1466:
 	ldr	r0, [sp, #4]
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1429:
+.L1467:
 	ldr	r3, [sp, #24]
 	adds	r3, r1, r3
 	str	r3, [sp, #12]
-	ldr	r3, .L1461
+	ldr	r3, .L1499
 	ldr	r2, [sp, #12]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1450
-	ldr	r3, .L1461+4
+	bhi	.L1488
+	ldr	r3, .L1499+4
 	ldr	r3, [r3]
 	adds	r4, r3, #1
-	beq	.L1451
-	ldr	r3, .L1461+8
+	beq	.L1489
+	ldr	r3, .L1499+8
 	mov	r0, r6
 	movs	r7, #0
 	mov	r5, r7
@@ -10775,7 +10805,7 @@ FtlRead:
 	subs	r0, r3, #1
 	bl	__aeabi_uidiv
 	ldr	r3, [sp, #16]
-	ldr	r2, .L1461+12
+	ldr	r2, .L1499+12
 	ldr	r1, [sp, #24]
 	rsb	r3, r3, #1
 	ldr	r4, [sp, #16]
@@ -10788,54 +10818,54 @@ FtlRead:
 	add	r3, r3, r1
 	ldr	r1, [sp, #8]
 	str	r3, [r2]
-	ldr	r2, .L1461+16
+	ldr	r2, .L1499+16
 	str	r7, [sp, #4]
 	ldr	r3, [r2]
 	add	r3, r3, r1
 	str	r3, [r2]
-.L1431:
+.L1469:
 	ldr	r3, [sp, #8]
-	cbnz	r3, .L1448
-	ldr	r3, .L1461+20
+	cbnz	r3, .L1486
+	ldr	r3, .L1499+20
 	ldrh	r3, [r3]
-	cbnz	r3, .L1449
-	ldr	r3, .L1461+24
+	cbnz	r3, .L1487
+	ldr	r3, .L1499+24
 	ldrh	r3, [r3]
 	cmp	r3, #31
-	bhi	.L1428
-.L1449:
+	bhi	.L1466
+.L1487:
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
-	b	.L1428
-.L1448:
+	b	.L1466
+.L1486:
 	movs	r2, #0
 	add	r1, sp, #52
 	mov	r0, r4
 	bl	log2phys
 	ldr	r3, [sp, #52]
 	adds	r0, r3, #1
-	bne	.L1432
-	ldr	fp, .L1461+8
+	bne	.L1470
+	ldr	fp, .L1499+8
 	mov	r10, #0
-.L1433:
+.L1471:
 	ldrh	r0, [fp]
 	cmp	r10, r0
-	bcc	.L1435
-.L1436:
+	bcc	.L1473
+.L1474:
 	ldr	r3, [sp, #8]
 	adds	r4, r4, #1
 	subs	r3, r3, #1
 	str	r3, [sp, #8]
-	beq	.L1440
-	ldr	r3, .L1461+28
+	beq	.L1478
+	ldr	r3, .L1499+28
 	ldrh	r3, [r3]
 	cmp	r5, r3, lsl #2
-	bne	.L1431
-.L1440:
+	bne	.L1469
+.L1478:
 	cmp	r5, #0
-	beq	.L1431
-	ldr	r3, .L1461+32
+	beq	.L1469
+	ldr	r3, .L1499+32
 	movs	r2, #0
 	mov	r1, r5
 	mov	r10, #0
@@ -10849,29 +10879,29 @@ FtlRead:
 	ldr	r3, [sp, #32]
 	lsls	r3, r3, #9
 	str	r3, [sp, #40]
-.L1447:
+.L1485:
 	movs	r3, #20
 	mul	fp, r3, r10
-	ldr	r3, .L1461+32
+	ldr	r3, .L1499+32
 	ldr	r2, [r3]
 	ldr	r3, [sp, #16]
 	add	r2, r2, fp
 	ldr	r1, [r2, #16]
 	cmp	r3, r1
-	bne	.L1442
+	bne	.L1480
 	ldr	r1, [r2, #8]
-	ldr	r2, .L1461+36
+	ldr	r2, .L1499+36
 	ldr	r2, [r2]
 	cmp	r1, r2
-	bne	.L1443
+	bne	.L1481
 	ldr	r3, [sp, #36]
 	mov	r0, r8
 	ldr	r2, [sp, #40]
 	add	r1, r1, r3
-.L1460:
+.L1498:
 	bl	ftl_memcpy
-.L1443:
-	ldr	r3, .L1461+32
+.L1481:
+	ldr	r3, .L1499+32
 	ldr	r3, [r3]
 	add	r2, r3, fp
 	ldr	r3, [r3, fp]
@@ -10880,49 +10910,49 @@ FtlRead:
 	ldr	r0, [r0, #8]
 	cmp	r1, r0
 	itttt	ne
-	ldrne	r0, .L1461+40
+	ldrne	r0, .L1499+40
 	ldrne	r1, [r0, #72]
 	addne	r1, r1, #1
 	strne	r1, [r0, #72]
 	adds	r1, r3, #1
-	bne	.L1445
-	ldr	r1, .L1461+40
+	bne	.L1483
+	ldr	r1, .L1499+40
 	str	r3, [sp, #4]
 	ldr	r2, [r1, #72]
 	adds	r2, r2, #1
 	str	r2, [r1, #72]
-.L1446:
+.L1484:
 	add	r10, r10, #1
 	cmp	r5, r10
-	bne	.L1447
+	bne	.L1485
 	movs	r5, #0
-	b	.L1431
-.L1435:
+	b	.L1469
+.L1473:
 	mla	r0, r0, r4, r10
 	cmp	r6, r0
-	bhi	.L1434
+	bhi	.L1472
 	ldr	r3, [sp, #12]
 	cmp	r3, r0
-	bls	.L1434
+	bls	.L1472
 	subs	r0, r0, r6
 	mov	r2, #512
 	movs	r1, #0
 	add	r0, r8, r0, lsl #9
 	bl	ftl_memset
-.L1434:
+.L1472:
 	add	r10, r10, #1
-	b	.L1433
-.L1432:
-	ldr	r2, .L1461+32
+	b	.L1471
+.L1470:
+	ldr	r2, .L1499+32
 	mov	r10, #20
 	ldr	r2, [r2]
 	mla	r10, r10, r5, r2
 	str	r3, [r10, #4]
 	ldr	r3, [sp, #16]
 	cmp	r4, r3
-	ldr	r3, .L1461+8
-	bne	.L1437
-	ldr	r2, .L1461+36
+	ldr	r3, .L1499+8
+	bne	.L1475
+	ldr	r2, .L1499+36
 	mov	r0, r6
 	ldrh	fp, [r3]
 	ldr	r2, [r2]
@@ -10937,11 +10967,11 @@ FtlRead:
 	movcs	r3, r2
 	cmp	fp, r3
 	str	r3, [sp, #32]
-	bne	.L1438
+	bne	.L1476
 	str	r8, [r10, #8]
-.L1438:
-	ldr	r3, .L1461+44
-	ldr	r2, .L1461+48
+.L1476:
+	ldr	r3, .L1499+44
+	ldr	r2, .L1499+48
 	str	r4, [r10, #16]
 	ldrh	r3, [r3]
 	ldr	r2, [r2]
@@ -10950,12 +10980,12 @@ FtlRead:
 	bic	r3, r3, #3
 	add	r3, r3, r2
 	str	r3, [r10, #12]
-	b	.L1436
-.L1437:
+	b	.L1474
+.L1475:
 	ldr	r2, [sp, #20]
 	cmp	r4, r2
-	bne	.L1439
-	ldr	r2, .L1461+52
+	bne	.L1477
+	ldr	r2, .L1499+52
 	ldr	r1, [sp, #12]
 	ldr	r2, [r2]
 	str	r2, [r10, #8]
@@ -10963,49 +10993,49 @@ FtlRead:
 	mul	r3, r2, r4
 	subs	r7, r1, r3
 	cmp	r2, r7
-	bne	.L1438
-.L1459:
+	bne	.L1476
+.L1497:
 	subs	r3, r3, r6
 	add	r3, r8, r3, lsl #9
 	str	r3, [r10, #8]
-	b	.L1438
-.L1439:
+	b	.L1476
+.L1477:
 	ldrh	r3, [r3]
 	muls	r3, r4, r3
-	b	.L1459
-.L1442:
+	b	.L1497
+.L1480:
 	ldr	r3, [sp, #20]
 	cmp	r3, r1
-	bne	.L1443
-	ldr	r3, .L1461+52
+	bne	.L1481
+	ldr	r3, .L1499+52
 	ldr	r1, [r2, #8]
 	ldr	r2, [r3]
 	cmp	r1, r2
-	bne	.L1443
-	ldr	r2, .L1461+8
+	bne	.L1481
+	ldr	r2, .L1499+8
 	ldr	r3, [sp, #20]
 	ldrh	r0, [r2]
 	ldr	r2, [sp, #44]
 	muls	r0, r3, r0
 	subs	r0, r0, r6
 	add	r0, r8, r0, lsl #9
-	b	.L1460
-.L1445:
+	b	.L1498
+.L1483:
 	cmp	r3, #256
-	bne	.L1446
+	bne	.L1484
 	ldr	r0, [r2, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-	b	.L1446
-.L1450:
+	b	.L1484
+.L1488:
 	mov	r3, #-1
-.L1451:
+.L1489:
 	str	r3, [sp, #4]
-	b	.L1428
-.L1462:
+	b	.L1466
+.L1500:
 	.align	2
-.L1461:
+.L1499:
 	.word	.LANCHOR34
 	.word	.LANCHOR166
 	.word	.LANCHOR12
@@ -11053,37 +11083,35 @@ FtlWrite:
 	cmp	r0, #16
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #72
-	str	r1, [sp, #4]
+	mov	fp, r1
 	str	r2, [sp, #20]
 	str	r3, [sp, #16]
-	bne	.L1465
+	bne	.L1503
 	mov	r2, r3
-	ldr	r3, [sp, #4]
 	ldr	r1, [sp, #20]
-	add	r0, r3, #256
+	add	r0, fp, #256
 	bl	FtlVendorPartWrite
-.L1464:
+.L1502:
 	add	sp, sp, #72
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1465:
-	ldr	r3, [sp, #4]
-	ldr	r2, [sp, #20]
-	adds	r4, r3, r2
-	ldr	r3, .L1508
+.L1503:
+	ldr	r3, [sp, #20]
+	adds	r4, r1, r3
+	ldr	r3, .L1547
 	ldr	r3, [r3]
 	cmp	r4, r3
-	bhi	.L1498
-	ldr	r3, .L1508+4
+	bhi	.L1536
+	ldr	r3, .L1547+4
 	ldr	r0, [r3]
-	adds	r5, r0, #1
-	beq	.L1464
-	ldr	r3, .L1508+8
+	adds	r1, r0, #1
+	beq	.L1502
+	ldr	r3, .L1547+8
 	mov	r2, #2048
-	ldr	r0, [sp, #4]
-	ldr	r7, .L1508+12
+	mov	r0, fp
+	ldr	r7, .L1547+12
 	str	r2, [r3]
-	ldr	r3, .L1508+16
+	ldr	r3, .L1547+16
 	ldrh	r5, [r3]
 	mov	r1, r5
 	bl	__aeabi_uidiv
@@ -11095,7 +11123,7 @@ FtlWrite:
 	ldr	r1, [sp, #20]
 	ldr	r5, [sp, #12]
 	subs	r3, r0, r2
-	ldr	r2, .L1508+20
+	ldr	r2, .L1547+20
 	str	r3, [sp, #32]
 	adds	r3, r3, #1
 	str	r3, [sp, #8]
@@ -11104,39 +11132,39 @@ FtlWrite:
 	add	r3, r3, r1
 	ldr	r1, [sp, #8]
 	str	r3, [r2]
-	ldr	r2, .L1508+24
+	ldr	r2, .L1547+24
 	ldr	r3, [r2]
 	add	r3, r3, r1
 	str	r3, [r2]
-.L1467:
+.L1505:
 	ldr	r3, [sp, #8]
-	cbnz	r3, .L1493
-	ldr	r5, .L1508+28
+	cbnz	r3, .L1531
+	ldr	r5, .L1547+28
 	mov	r0, r3
 	ldr	r1, [sp, #32]
 	bl	rk_ftl_garbage_collect
 	ldrh	r2, [r5]
 	cmp	r2, #5
-	bls	.L1494
-.L1496:
+	bls	.L1532
+.L1534:
 	movs	r0, #0
-	b	.L1464
-.L1493:
-	ldr	r4, .L1508+32
+	b	.L1502
+.L1531:
+	ldr	r4, .L1547+32
 	ldrb	r2, [r7, #6]	@ zero_extendqisi2
 	ldrh	r3, [r4]
 	cmp	r2, r3
-	bcc	.L1468
-	mov	r2, #1016
-	ldr	r1, .L1508+36
-	ldr	r0, .L1508+40
+	bcc	.L1506
+	movw	r2, #1038
+	ldr	r1, .L1547+36
+	ldr	r0, .L1547+40
 	bl	printf
-.L1468:
+.L1506:
 	ldrh	r3, [r7, #4]
-	cbnz	r3, .L1469
+	cbnz	r3, .L1507
 	mov	r0, r7
 	bl	allocate_new_data_superblock
-.L1469:
+.L1507:
 	ldrb	r3, [r7, #7]	@ zero_extendqisi2
 	ldrh	r2, [r7, #4]
 	lsls	r3, r3, #2
@@ -11151,87 +11179,92 @@ FtlWrite:
 	str	r3, [sp, #44]
 	ldrh	r3, [r4]
 	cmp	r2, r3
-	bcc	.L1470
-	movw	r2, #1049
-	ldr	r1, .L1508+36
-	ldr	r0, .L1508+40
+	bcc	.L1508
+	movw	r2, #1071
+	ldr	r1, .L1547+36
+	ldr	r0, .L1547+40
 	bl	printf
-.L1470:
-	ldr	r8, .L1508+44
-	mov	fp, #0
-.L1471:
-	ldr	r3, [sp, #44]
-	cmp	fp, r3
-	bne	.L1491
-.L1472:
-	ldr	r0, .L1508+44
+.L1508:
+	ldr	r8, .L1547+44
+	movs	r3, #0
+	str	r3, [sp, #4]
+.L1509:
+	ldr	r3, [sp, #4]
+	ldr	r2, [sp, #44]
+	cmp	r3, r2
+	bne	.L1529
+.L1510:
+	ldr	r0, .L1547+44
 	mov	r3, r7
 	movs	r2, #0
-	mov	r1, fp
+	ldr	r1, [sp, #4]
 	ldr	r0, [r0]
 	bl	FtlProgPages
-	ldr	r3, [sp, #8]
-	cmp	fp, r3
-	bls	.L1492
-	movw	r2, #1126
-	ldr	r1, .L1508+36
-	ldr	r0, .L1508+40
+	ldr	r3, [sp, #4]
+	ldr	r2, [sp, #8]
+	cmp	r3, r2
+	bls	.L1530
+	movw	r2, #1149
+	ldr	r1, .L1547+36
+	ldr	r0, .L1547+40
 	bl	printf
-.L1492:
+.L1530:
 	ldr	r3, [sp, #8]
-	sub	r3, r3, fp
+	ldr	r2, [sp, #4]
+	subs	r3, r3, r2
 	str	r3, [sp, #8]
-	b	.L1467
-.L1491:
-	ldrh	r2, [r7, #4]
-	cmp	r2, #0
-	beq	.L1472
+	b	.L1505
+.L1529:
+	ldrh	r3, [r7, #4]
+	cmp	r3, #0
+	beq	.L1510
 	movs	r2, #0
 	add	r1, sp, #48
 	mov	r0, r5
 	movs	r6, #20
 	bl	log2phys
 	mov	r0, r7
-	mul	r6, r6, fp
 	bl	get_new_active_ppa
-	ldr	r2, .L1508+48
-	ldr	r1, [r8]
+	ldr	r2, .L1547+48
+	ldr	r1, [sp, #4]
+	ldr	r3, [sp, #4]
 	ldrh	r2, [r2]
-	add	r1, r1, r6
-	str	r0, [r1, #4]
-	str	r5, [r1, #16]
-	mul	r0, r2, fp
-	bic	r3, r0, #3
-	ldr	r0, .L1508+52
-	str	r3, [sp, #36]
-	ldr	r3, [r0]
+	muls	r6, r3, r6
+	ldr	r3, [r8]
+	muls	r1, r2, r1
+	add	r3, r3, r6
+	str	r0, [r3, #4]
+	bic	r1, r1, #3
+	str	r5, [r3, #16]
+	str	r1, [sp, #36]
+	ldr	r1, .L1547+52
 	ldr	r0, [sp, #36]
-	str	r3, [sp, #40]
-	add	r10, r3, r0
-	str	r10, [r1, #12]
-	mov	r0, r10
+	ldr	r1, [r1]
+	add	r10, r1, r0
+	str	r1, [sp, #40]
+	str	r10, [r3, #12]
 	movs	r1, #0
+	mov	r0, r10
 	bl	ftl_memset
 	ldr	r3, [sp, #12]
-	ldr	r2, .L1508+16
+	ldr	r2, .L1547+16
 	cmp	r5, r3
-	beq	.L1473
+	beq	.L1511
 	ldr	r3, [sp, #28]
 	cmp	r5, r3
-	bne	.L1504
+	bne	.L1542
 	ldrh	r2, [r2]
-	ldr	r3, [sp, #4]
-	ldr	r1, [sp, #20]
+	ldr	r3, [sp, #20]
 	smulbb	r2, r2, r5
-	adds	r4, r3, r1
+	add	r4, fp, r3
 	movs	r3, #0
-	subs	r4, r4, r2
 	str	r3, [sp, #24]
+	subs	r4, r4, r2
 	uxth	r4, r4
-	b	.L1476
-.L1473:
+	b	.L1514
+.L1511:
 	ldrh	r4, [r2]
-	ldr	r0, [sp, #4]
+	mov	r0, fp
 	mov	r1, r4
 	bl	__aeabi_uidivmod
 	ldr	r3, [sp, #20]
@@ -11240,144 +11273,140 @@ FtlWrite:
 	cmp	r4, r3
 	it	cs
 	movcs	r4, r3
-.L1476:
-	ldr	r2, .L1508+16
+.L1514:
+	ldr	r3, .L1547+16
+	ldrh	r3, [r3]
+	cmp	r4, r3
 	ldr	r3, [sp, #12]
-	ldrh	r2, [r2]
-	cmp	r4, r2
-	ldr	r2, [r8]
-	bne	.L1477
+	bne	.L1515
 	cmp	r5, r3
-	add	r6, r6, r2
-	ittet	ne
-	mulne	r4, r4, r5
-	ldrne	r3, [sp, #4]
-	ldreq	r3, [sp, #16]
-	subne	r4, r4, r3
-	itett	ne
-	ldrne	r3, [sp, #16]
-	streq	r3, [r6, #8]
-	addne	r4, r3, r4, lsl #9
-	strne	r4, [r6, #8]
-.L1479:
-	ldr	r2, .L1508+32
-	ldrb	r1, [r7, #6]	@ zero_extendqisi2
-	ldrh	r2, [r2]
-	cmp	r1, r2
-	bcc	.L1488
-	movw	r2, #1117
-	ldr	r1, .L1508+36
-	ldr	r0, .L1508+40
+	ldr	r3, [r8]
+	add	r6, r6, r3
+	bne	.L1516
+	ldr	r3, [sp, #16]
+.L1544:
+	str	r3, [r6, #8]
+	b	.L1517
+.L1516:
+	muls	r4, r5, r4
+	ldr	r3, [sp, #16]
+	sub	r4, r4, fp
+	add	r4, r3, r4, lsl #9
+	str	r4, [r6, #8]
+.L1517:
+	ldr	r3, .L1547+32
+	ldrb	r2, [r7, #6]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L1526
+	movw	r2, #1140
+	ldr	r1, .L1547+36
+	ldr	r0, .L1547+40
 	bl	printf
-.L1488:
-	ldr	r3, [sp, #40]
-	movw	r2, #61589
+.L1526:
+	ldr	r2, [sp, #40]
+	movw	r3, #61589
 	ldr	r1, [sp, #36]
-	add	fp, fp, #1
-	strh	r2, [r3, r1]	@ movhi
-	ldr	r1, .L1508+56
+	strh	r3, [r2, r1]	@ movhi
+	ldr	r2, .L1547+56
 	str	r5, [r10, #8]
 	adds	r5, r5, #1
-	ldr	r2, [r1]
-	str	r2, [r10, #4]
-	adds	r2, r2, #1
-	adds	r3, r2, #1
+	ldr	r3, [r2]
+	str	r3, [r10, #4]
+	adds	r3, r3, #1
+	adds	r1, r3, #1
 	it	eq
-	moveq	r2, #0
-	str	r2, [r1]
-	ldr	r2, [sp, #48]
-	str	r2, [r10, #12]
-	ldrh	r2, [r7]
-	strh	r2, [r10, #2]	@ movhi
-	b	.L1471
-.L1477:
+	moveq	r3, #0
+	str	r3, [r2]
+	ldr	r3, [sp, #48]
+	str	r3, [r10, #12]
+	ldrh	r3, [r7]
+	strh	r3, [r10, #2]	@ movhi
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #1
+	str	r3, [sp, #4]
+	b	.L1509
+.L1515:
 	cmp	r5, r3
-	add	r2, r2, r6
+	ldr	r3, [r8]
 	ite	eq
-	ldreq	r1, .L1508+60
-	ldrne	r1, .L1508+64
-	ldr	r1, [r1]
-	str	r1, [r2, #8]
-	ldr	r2, [sp, #48]
-	adds	r1, r2, #1
-	beq	.L1482
-	str	r2, [sp, #56]
+	ldreq	r2, .L1547+60
+	ldrne	r2, .L1547+64
+	add	r3, r3, r6
+	ldr	r2, [r2]
+	str	r2, [r3, #8]
+	ldr	r3, [sp, #48]
+	adds	r2, r3, #1
+	beq	.L1520
+	str	r3, [sp, #56]
+	movs	r1, #1
+	ldr	r3, [r8]
 	add	r0, sp, #52
-	ldr	r2, [r8]
 	str	r5, [sp, #68]
-	add	r2, r2, r6
-	ldr	r1, [r2, #8]
-	ldr	r2, [r2, #12]
-	str	r1, [sp, #60]
-	movs	r1, #1
-	str	r2, [sp, #64]
+	add	r3, r3, r6
+	ldr	r2, [r3, #8]
+	ldr	r3, [r3, #12]
+	str	r2, [sp, #60]
 	movs	r2, #0
+	str	r3, [sp, #64]
 	bl	FlashReadPages
-	ldr	r2, [sp, #52]
-	adds	r2, r2, #1
-	bne	.L1483
-	ldr	r1, .L1508+68
+	ldr	r3, [sp, #52]
+	adds	r0, r3, #1
+	bne	.L1521
+	ldr	r1, .L1547+68
+	ldr	r0, .L1547+72
 	ldr	r2, [r1, #72]
 	adds	r2, r2, #1
 	str	r2, [r1, #72]
-.L1486:
+	mov	r2, r5
+	ldr	r1, [r10, #8]
+	bl	printf
+.L1524:
 	ldr	r3, [sp, #12]
 	lsls	r2, r4, #9
 	cmp	r5, r3
-	bne	.L1487
-	ldr	r1, [r8]
-	ldr	r3, [sp, #24]
-	add	r6, r6, r1
+	bne	.L1525
+	ldr	r3, [r8]
 	ldr	r1, [sp, #16]
+	add	r6, r6, r3
+	ldr	r3, [sp, #24]
 	ldr	r0, [r6, #8]
 	add	r0, r0, r3, lsl #9
-.L1506:
+.L1545:
 	bl	ftl_memcpy
-	b	.L1479
-.L1483:
+	b	.L1517
+.L1521:
 	ldr	r1, [r10, #8]
 	cmp	r5, r1
-	beq	.L1485
-	ldr	r0, .L1508+68
-	ldr	r2, [r0, #72]
-	adds	r2, r2, #1
-	str	r2, [r0, #72]
+	beq	.L1523
+	ldr	r2, .L1547+68
+	ldr	r0, .L1547+76
+	ldr	r3, [r2, #72]
+	adds	r3, r3, #1
+	str	r3, [r2, #72]
 	mov	r2, r5
-	ldr	r0, .L1508+72
 	bl	printf
-.L1485:
-	ldr	r2, [r10, #8]
-	cmp	r5, r2
-	beq	.L1486
-	movw	r2, #1102
-	ldr	r1, .L1508+36
-	ldr	r0, .L1508+40
+.L1523:
+	ldr	r3, [r10, #8]
+	cmp	r5, r3
+	beq	.L1524
+	movw	r2, #1125
+	ldr	r1, .L1547+36
+	ldr	r0, .L1547+40
 	bl	printf
-	b	.L1486
-.L1482:
-	ldr	r2, [r8]
+	b	.L1524
+.L1520:
+	ldr	r3, [r8]
 	movs	r1, #0
-	adds	r0, r2, r6
-	ldr	r2, .L1508+76
-	ldr	r0, [r0, #8]
+	ldr	r2, .L1547+80
+	add	r3, r3, r6
 	ldrh	r2, [r2]
+	ldr	r0, [r3, #8]
 	bl	ftl_memset
-	b	.L1486
-.L1487:
-	ldr	r1, .L1508+16
-	ldr	r3, [sp, #4]
-	ldr	r0, [r8]
-	ldrh	r1, [r1]
-	add	r6, r6, r0
-	ldr	r0, [r6, #8]
-	muls	r1, r5, r1
-	subs	r1, r1, r3
-	ldr	r3, [sp, #16]
-	add	r1, r3, r1, lsl #9
-	b	.L1506
-.L1509:
+	b	.L1524
+.L1548:
 	.align	2
-.L1508:
+.L1547:
 	.word	.LANCHOR34
 	.word	.LANCHOR166
 	.word	.LANCHOR176
@@ -11396,42 +11425,52 @@ FtlWrite:
 	.word	.LANCHOR109
 	.word	.LANCHOR110
 	.word	.LANCHOR135
-	.word	.LC37
+	.word	.LC44
+	.word	.LC45
 	.word	.LANCHOR23
-.L1504:
-	ldrh	r2, [r2]
-	ldr	r3, [sp, #4]
-	ldr	r1, [r8]
-	muls	r2, r5, r2
-	add	r6, r6, r1
-	subs	r2, r2, r3
+.L1525:
+	ldr	r3, .L1549
+	ldrh	r1, [r3]
+	ldr	r3, [r8]
+	muls	r1, r5, r1
+	add	r6, r6, r3
 	ldr	r3, [sp, #16]
-	add	r2, r3, r2, lsl #9
-	str	r2, [r6, #8]
-	b	.L1479
-.L1494:
-	ldr	r6, .L1510
+	ldr	r0, [r6, #8]
+	sub	r1, r1, fp
+	add	r1, r3, r1, lsl #9
+	b	.L1545
+.L1542:
+	ldr	r3, [r8]
+	add	r6, r6, r3
+	ldrh	r3, [r2]
+	ldr	r2, [sp, #16]
+	muls	r3, r5, r3
+	sub	r3, r3, fp
+	add	r3, r2, r3, lsl #9
+	b	.L1544
+.L1532:
+	ldr	r6, .L1549+4
 	mov	r4, #256
-	ldr	r7, .L1510+4
-.L1497:
+	ldr	r7, .L1549+8
+.L1535:
 	ldrh	r3, [r6]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1495
+	bne	.L1533
 	ldrh	r2, [r7]
 	cmp	r2, r3
-	bne	.L1495
+	bne	.L1533
 	movs	r0, #0
 	bl	List_get_gc_head_node
 	uxth	r0, r0
 	bl	FtlGcRefreshBlock
-.L1495:
-	ldr	r2, .L1510+8
+.L1533:
+	ldr	r2, .L1549+12
 	movs	r3, #128
 	movs	r1, #1
 	mov	r0, r1
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L1510+12
+	ldr	r2, .L1549+16
 	strh	r3, [r2]	@ movhi
 	bl	rk_ftl_garbage_collect
 	movs	r1, #1
@@ -11439,17 +11478,18 @@ FtlWrite:
 	bl	rk_ftl_garbage_collect
 	ldrh	r3, [r5]
 	cmp	r3, #2
-	bhi	.L1496
+	bhi	.L1534
 	subs	r4, r4, #1
-	bne	.L1497
-	b	.L1496
-.L1498:
+	bne	.L1535
+	b	.L1534
+.L1536:
 	mov	r0, #-1
-	b	.L1464
-.L1511:
+	b	.L1502
+.L1550:
 	.align	2
-.L1510:
-	.word	.LANCHOR144
+.L1549:
+	.word	.LANCHOR12
+	.word	.LANCHOR145
 	.word	.LANCHOR72
 	.word	.LANCHOR101
 	.word	.LANCHOR100
@@ -11483,16 +11523,16 @@ FtlLoadSysInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r1, #0
-	ldr	r8, .L1540+144
+	ldr	r8, .L1582+144
 	sub	sp, sp, #24
-	ldr	r7, .L1540
+	ldr	r7, .L1582
 	ldr	r3, [r8]
-	ldr	r4, .L1540+4
-	ldr	fp, .L1540+148
+	ldr	r4, .L1582+4
+	ldr	fp, .L1582+148
 	ldrh	r2, [r7]
-	ldr	r5, .L1540+8
+	ldr	r5, .L1582+8
 	str	r3, [r4, #8]
-	ldr	r6, .L1540+12
+	ldr	r6, .L1582+12
 	ldr	r3, [fp]
 	lsls	r2, r2, #1
 	ldr	r0, [r5]
@@ -11502,33 +11542,33 @@ FtlLoadSysInfo:
 	movw	r3, #65535
 	str	r5, [sp, #16]
 	cmp	r0, r3
-	bne	.L1514
-.L1525:
+	bne	.L1553
+.L1564:
 	mov	r0, #-1
-.L1513:
+.L1552:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1514:
+.L1553:
 	movs	r1, #1
 	bl	FtlGetLastWrittenPage
 	ldrsh	r10, [r6]
 	sxth	r5, r0
 	adds	r0, r0, #1
 	strh	r0, [r6, #2]	@ movhi
-.L1516:
+.L1555:
 	cmp	r5, #0
-	bge	.L1522
+	bge	.L1561
 	movw	r2, #1465
-	ldr	r1, .L1540+16
-	ldr	r0, .L1540+20
+	ldr	r1, .L1582+16
+	ldr	r0, .L1582+20
 	bl	printf
-	b	.L1521
-.L1522:
+	b	.L1560
+.L1561:
 	orr	r3, r5, r10, lsl #10
 	movs	r2, #1
 	mov	r1, r2
-	ldr	r0, .L1540+4
+	ldr	r0, .L1582+4
 	str	r3, [r4, #4]
 	ldr	r3, [r8]
 	str	r3, [r4, #8]
@@ -11536,64 +11576,67 @@ FtlLoadSysInfo:
 	ldr	r3, [r4, #12]
 	ldr	r3, [r3, #12]
 	str	r3, [sp, #20]
-	cbz	r3, .L1517
-	ldr	r2, .L1540+24
+	cbz	r3, .L1556
+	ldr	r2, [r4]
+	adds	r2, r2, #1
+	beq	.L1556
+	ldr	r2, .L1582+24
 	ldr	r0, [r4, #8]
 	ldrh	r1, [r2]
 	bl	js_hash
 	ldr	r3, [sp, #20]
 	cmp	r3, r0
-	beq	.L1517
+	beq	.L1556
 	str	r0, [sp, #8]
 	mov	r2, r10
 	str	r3, [sp, #4]
 	ldrh	r3, [r6, #4]
-	ldr	r1, .L1540+16
-	ldr	r0, .L1540+28
+	ldr	r1, .L1582+16
+	ldr	r0, .L1582+28
 	str	r3, [sp]
 	mov	r3, r5
 	bl	printf
-	cbnz	r5, .L1518
+	cbnz	r5, .L1557
 	ldrh	r3, [r6, #4]
 	cmp	r10, r3
-	beq	.L1518
+	beq	.L1557
 	sxth	r10, r3
-	ldr	r3, .L1540+32
+	ldr	r3, .L1582+32
 	ldrh	r5, [r3]
-.L1520:
+.L1559:
 	subs	r5, r5, #1
 	sxth	r5, r5
-	b	.L1516
-.L1518:
+	b	.L1555
+.L1557:
 	mov	r3, #-1
 	str	r3, [r4]
-.L1517:
+.L1556:
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L1520
+	beq	.L1559
 	ldr	r3, [r8]
-	ldr	r2, .L1540+36
+	ldr	r2, .L1582+36
 	ldr	r3, [r3]
 	cmp	r3, r2
-	bne	.L1520
+	bne	.L1559
 	ldr	r3, [fp]
 	ldrh	r2, [r3]
 	movw	r3, #61604
 	cmp	r2, r3
-	bne	.L1520
-.L1521:
-	ldr	r2, .L1540+24
+	bne	.L1559
+.L1560:
+	ldr	r2, .L1582+24
 	ldrh	r3, [r7]
 	ldrh	r2, [r2]
 	adds	r3, r3, #24
 	cmp	r2, r3, lsl #1
-	bcs	.L1524
+	bcs	.L1563
 	movw	r2, #1467
-	ldr	r1, .L1540+16
-	ldr	r0, .L1540+20
+	ldr	r1, .L1582+16
+	ldr	r0, .L1582+20
 	bl	printf
-.L1524:
-	ldr	r5, .L1540+40
+.L1563:
+	ldr	r5, .L1582+40
 	movs	r2, #48
 	ldr	r1, [r4, #8]
 	mov	r0, r5
@@ -11614,60 +11657,60 @@ FtlLoadSysInfo:
 	adds	r2, r2, #4
 	bic	r1, r1, #3
 	add	r1, r1, r3
-	ldr	r3, .L1540+44
+	ldr	r3, .L1582+44
 	ldr	r0, [r3]
 	bl	ftl_memcpy
 	ldr	r2, [r5]
-	ldr	r3, .L1540+36
+	ldr	r3, .L1582+36
 	cmp	r2, r3
-	bne	.L1525
-	ldr	r3, .L1540+48
+	bne	.L1564
+	ldr	r3, .L1582+48
 	ldrb	r2, [r4, #10]	@ zero_extendqisi2
 	ldrh	r5, [r5, #8]
 	ldrh	r3, [r3]
 	strh	r5, [r6, #6]	@ movhi
 	cmp	r2, r3
-	bne	.L1525
-	ldr	r3, .L1540+52
-	ldr	r2, .L1540+56
+	bne	.L1564
+	ldr	r3, .L1582+52
+	ldr	r2, .L1582+56
 	str	r5, [r3]
-	ldr	r3, .L1540+60
+	ldr	r3, .L1582+60
 	ldrh	r3, [r3]
 	muls	r3, r5, r3
 	str	r3, [r2]
-	ldr	r2, .L1540+64
+	ldr	r2, .L1582+64
 	ldrh	r2, [r2]
 	muls	r3, r2, r3
-	ldr	r2, .L1540+68
+	ldr	r2, .L1582+68
 	str	r3, [r2]
-	ldr	r3, .L1540+72
+	ldr	r3, .L1582+72
 	ldr	r6, [r3]
-	ldr	r3, .L1540+76
+	ldr	r3, .L1582+76
 	ldrh	r0, [r3, #6]
-	ldr	r3, .L1540+80
+	ldr	r3, .L1582+80
 	subs	r0, r6, r0
 	ldrh	r1, [r3]
 	subs	r0, r0, r5
 	bl	__aeabi_uidiv
-	ldr	r3, .L1540+84
+	ldr	r3, .L1582+84
 	cmp	r5, r6
 	strh	r0, [r3]	@ movhi
-	bls	.L1526
+	bls	.L1565
 	movw	r2, #1489
-	ldr	r1, .L1540+16
-	ldr	r0, .L1540+20
+	ldr	r1, .L1582+16
+	ldr	r0, .L1582+20
 	bl	printf
-.L1526:
+.L1565:
 	ldrh	r2, [r4, #16]
-	ldr	r3, .L1540+88
+	ldr	r3, .L1582+88
 	ldrh	ip, [r4, #14]
-	ldr	r7, .L1540+92
+	ldr	r7, .L1582+92
 	lsrs	r1, r2, #6
 	and	r2, r2, #63
 	strb	r2, [r3, #6]
 	ldrb	r2, [r4, #11]	@ zero_extendqisi2
 	strh	r1, [r3, #2]	@ movhi
-	ldr	r1, .L1540+96
+	ldr	r1, .L1582+96
 	strb	r2, [r3, #8]
 	ldrh	r2, [r4, #18]
 	strh	ip, [r3]	@ movhi
@@ -11686,7 +11729,7 @@ FtlLoadSysInfo:
 	strh	r5, [r1, #2]	@ movhi
 	ldrh	r5, [r4, #22]
 	strb	r2, [r1, #8]
-	ldr	r2, .L1540+100
+	ldr	r2, .L1582+100
 	strh	r5, [r2]	@ movhi
 	ldrh	r5, [r4, #24]
 	lsrs	r6, r5, #6
@@ -11696,31 +11739,31 @@ FtlLoadSysInfo:
 	strh	r6, [r2, #2]	@ movhi
 	ldr	r6, [r4, #32]
 	strb	r5, [r2, #8]
-	ldr	r5, .L1540+104
+	ldr	r5, .L1582+104
 	str	r3, [r5]
-	ldr	r5, .L1540+108
+	ldr	r5, .L1582+108
 	str	r3, [r5]
-	ldr	r5, .L1540+112
+	ldr	r5, .L1582+112
 	str	r3, [r5]
-	ldr	r5, .L1540+116
+	ldr	r5, .L1582+116
 	str	r3, [r5]
-	ldr	r5, .L1540+120
+	ldr	r5, .L1582+120
 	str	r6, [r5]
 	mov	r6, r1
-	ldr	r5, .L1540+124
+	ldr	r5, .L1582+124
 	str	r3, [r5]
-	ldr	r5, .L1540+128
+	ldr	r5, .L1582+128
 	str	r3, [r5]
-	ldr	r5, .L1540+132
+	ldr	r5, .L1582+132
 	ldr	lr, [r4, #40]
 	str	r3, [r5]
-	ldr	r3, .L1540+136
+	ldr	r3, .L1582+136
 	ldr	r5, [r3]
 	cmp	lr, r5
 	mov	r5, r2
 	it	hi
 	strhi	lr, [r3]
-	ldr	r3, .L1540+140
+	ldr	r3, .L1582+140
 	ldr	r2, [r4, #36]
 	ldr	r1, [r3]
 	cmp	r2, r1
@@ -11728,36 +11771,36 @@ FtlLoadSysInfo:
 	strhi	r2, [r3]
 	movw	r3, #65535
 	cmp	ip, r3
-	beq	.L1529
-	ldr	r0, .L1540+88
+	beq	.L1568
+	ldr	r0, .L1582+88
 	bl	make_superblock
-.L1529:
+.L1568:
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1530
-	ldr	r0, .L1540+96
+	beq	.L1569
+	ldr	r0, .L1582+96
 	bl	make_superblock
-.L1530:
+.L1569:
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1531
-	ldr	r0, .L1540+100
+	beq	.L1570
+	ldr	r0, .L1582+100
 	bl	make_superblock
-.L1531:
+.L1570:
 	ldrh	r2, [r7]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1532
-	ldr	r0, .L1540+92
+	beq	.L1571
+	ldr	r0, .L1582+92
 	bl	make_superblock
-.L1532:
+.L1571:
 	movs	r0, #0
-	b	.L1513
-.L1541:
+	b	.L1552
+.L1583:
 	.align	2
-.L1540:
+.L1582:
 	.word	.LANCHOR5
 	.word	.LANCHOR138
 	.word	.LANCHOR42
@@ -11765,7 +11808,7 @@ FtlLoadSysInfo:
 	.word	.LANCHOR178
 	.word	.LC1
 	.word	.LANCHOR23
-	.word	.LC38
+	.word	.LC46
 	.word	.LANCHOR20
 	.word	1179929683
 	.word	.LANCHOR39
@@ -11781,7 +11824,7 @@ FtlLoadSysInfo:
 	.word	.LANCHOR3
 	.word	.LANCHOR171
 	.word	.LANCHOR51
-	.word	.LANCHOR144
+	.word	.LANCHOR145
 	.word	.LANCHOR52
 	.word	.LANCHOR53
 	.word	.LANCHOR84
@@ -11817,7 +11860,7 @@ FtlMapTblRecovery:
 	movs	r7, #0
 	str	r3, [sp, #8]
 	ldr	r3, [r0, #16]
-	ldr	r6, .L1577
+	ldr	r6, .L1625
 	str	r3, [sp, #24]
 	ldrh	r3, [r0, #6]
 	str	r3, [sp, #12]
@@ -11827,13 +11870,13 @@ FtlMapTblRecovery:
 	ldr	r3, [sp, #12]
 	lsls	r2, r3, #2
 	bl	ftl_memset
-	ldr	r3, .L1577+4
+	ldr	r3, .L1625+4
 	str	r7, [r4, #32]
 	str	r7, [r4, #28]
 	ldr	r2, [r3]
 	str	r3, [sp, #20]
 	str	r2, [r6, #8]
-	ldr	r2, .L1577+8
+	ldr	r2, .L1625+8
 	ldr	fp, [r2]
 	movw	r2, #65535
 	str	fp, [r6, #12]
@@ -11841,20 +11884,20 @@ FtlMapTblRecovery:
 	strh	r2, [r4, #2]	@ movhi
 	movs	r2, #1
 	str	r2, [r4, #36]
-.L1543:
+.L1585:
 	ldr	r3, [sp, #16]
 	sxth	r5, r7
 	cmp	r5, r3
-	bge	.L1562
+	bge	.L1604
 	ldr	r3, [sp, #16]
 	subs	r3, r3, #1
 	cmp	r5, r3
-	bne	.L1544
+	bne	.L1586
 	movs	r1, #1
 	ldrh	r0, [r8, r5, lsl #1]
 	bl	FtlGetLastWrittenPage
 	sxth	r3, r0
-	ldr	r6, .L1577
+	ldr	r6, .L1625
 	add	r10, r8, r5, lsl #1
 	strh	r7, [r4]	@ movhi
 	str	r3, [sp, #16]
@@ -11864,22 +11907,22 @@ FtlMapTblRecovery:
 	strh	r0, [r4, #2]	@ movhi
 	ldr	r3, [r3, r5, lsl #2]
 	str	r3, [r4, #28]
-.L1545:
+.L1587:
 	ldr	r3, [sp, #16]
 	sxth	r8, r7
 	cmp	r8, r3
-	ble	.L1548
-.L1562:
+	ble	.L1590
+.L1604:
 	mov	r0, r4
 	bl	ftl_free_no_use_map_blk
-	ldr	r3, .L1577+12
+	ldr	r3, .L1625+12
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1550
+	bne	.L1592
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L1550:
+.L1592:
 	mov	r0, r4
 	bl	ftl_map_blk_gc
 	mov	r0, r4
@@ -11888,9 +11931,9 @@ FtlMapTblRecovery:
 	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1548:
+.L1590:
 	ldrh	r2, [r10]
-	ldr	r0, .L1577
+	ldr	r0, .L1625
 	orr	r2, r8, r2, lsl #10
 	str	r2, [r6, #4]
 	movs	r2, #1
@@ -11899,31 +11942,34 @@ FtlMapTblRecovery:
 	ldr	r2, [r6, #12]
 	ldr	r2, [r2, #12]
 	str	r2, [sp, #20]
-	cbz	r2, .L1546
-	ldr	r3, .L1577+16
+	cbz	r2, .L1588
+	ldr	r1, [r6]
+	adds	r1, r1, #1
+	beq	.L1588
+	ldr	r3, .L1625+16
 	ldr	r0, [r6, #8]
 	ldrh	r1, [r3]
 	bl	js_hash
 	ldr	r2, [sp, #20]
 	cmp	r2, r0
-	beq	.L1546
+	beq	.L1588
 	str	r0, [sp, #4]
 	mov	r3, r8
 	str	r2, [sp]
 	mov	r2, r5
-	ldr	r1, .L1577+20
-	ldr	r0, .L1577+24
+	ldr	r1, .L1625+20
+	ldr	r0, .L1625+24
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r6]
-.L1546:
+.L1588:
 	ldr	r3, [r6]
 	adds	r3, r3, #1
-	beq	.L1547
+	beq	.L1589
 	ldrh	r3, [fp, #8]
 	ldr	r2, [sp, #12]
 	cmp	r2, r3
-	bls	.L1547
+	bls	.L1589
 	ldrh	r1, [fp]
 	ldrh	r2, [r4, #4]
 	cmp	r1, r2
@@ -11931,15 +11977,15 @@ FtlMapTblRecovery:
 	ldreq	r2, [r6, #4]
 	ldreq	r1, [sp, #8]
 	streq	r2, [r1, r3, lsl #2]
-.L1547:
+.L1589:
 	adds	r7, r7, #1
-	b	.L1545
-.L1544:
+	b	.L1587
+.L1586:
 	ldr	r3, [sp, #20]
-	ldr	r10, .L1577+12
+	ldr	r10, .L1625+12
 	ldrh	r2, [r8, r5, lsl #1]
 	ldr	r3, [r3]
-	ldr	r0, .L1577
+	ldr	r0, .L1625
 	str	r3, [r6, #8]
 	add	r3, r8, r5, lsl #1
 	str	r3, [sp, #28]
@@ -11952,25 +11998,25 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	r3, [r6]
 	adds	r3, r3, #1
-	beq	.L1564
+	beq	.L1606
 	ldrh	r2, [fp]
 	ldrh	r3, [r4, #4]
 	cmp	r2, r3
-	bne	.L1564
+	bne	.L1606
 	ldrh	r2, [fp, #8]
 	movw	r3, #64245
 	cmp	r2, r3
-	beq	.L1552
-.L1564:
+	beq	.L1594
+.L1606:
 	mov	r10, #0
-.L1553:
-	ldr	r2, .L1577+12
+.L1595:
+	ldr	r2, .L1625+12
 	sxth	r3, r10
 	ldrh	r2, [r2]
 	cmp	r3, r2
-	bge	.L1560
+	bge	.L1602
 	ldr	r2, [sp, #28]
-	ldr	r0, .L1577
+	ldr	r0, .L1625
 	str	r3, [sp, #36]
 	ldrh	r2, [r2]
 	orr	r2, r3, r2, lsl #10
@@ -11981,31 +12027,34 @@ FtlMapTblRecovery:
 	ldr	r2, [r6, #12]
 	ldr	r2, [r2, #12]
 	str	r2, [sp, #32]
-	cbz	r2, .L1557
-	ldr	r1, .L1577+16
+	cbz	r2, .L1599
+	ldr	r1, [r6]
+	adds	r1, r1, #1
+	beq	.L1599
+	ldr	r1, .L1625+16
 	ldr	r0, [r6, #8]
 	ldrh	r1, [r1]
 	bl	js_hash
 	ldr	r2, [sp, #32]
 	cmp	r2, r0
-	beq	.L1557
+	beq	.L1599
 	str	r0, [sp, #4]
 	str	r2, [sp]
 	mov	r2, r5
 	ldr	r3, [sp, #36]
-	ldr	r1, .L1577+20
-	ldr	r0, .L1577+28
+	ldr	r1, .L1625+20
+	ldr	r0, .L1625+28
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r6]
-.L1557:
+.L1599:
 	ldr	r3, [r6]
 	adds	r3, r3, #1
-	beq	.L1558
+	beq	.L1600
 	ldrh	r3, [fp, #8]
 	ldr	r2, [sp, #12]
 	cmp	r2, r3
-	bls	.L1558
+	bls	.L1600
 	ldrh	r1, [fp]
 	ldrh	r2, [r4, #4]
 	cmp	r1, r2
@@ -12013,47 +12062,47 @@ FtlMapTblRecovery:
 	ldreq	r2, [r6, #4]
 	ldreq	r1, [sp, #8]
 	streq	r2, [r1, r3, lsl #2]
-.L1558:
+.L1600:
 	add	r10, r10, #1
-	b	.L1553
-.L1552:
+	b	.L1595
+.L1594:
 	ldr	r3, [sp, #20]
 	movs	r1, #0
 	ldrh	r2, [r10]
 	ldr	r0, [r3]
 	add	lr, r2, #-1
-.L1554:
+.L1596:
 	sxth	r3, r1
 	cmp	r3, lr
-	blt	.L1556
-.L1560:
+	blt	.L1598
+.L1602:
 	adds	r7, r7, #1
-	b	.L1543
-.L1556:
+	b	.L1585
+.L1598:
 	lsls	r5, r3, #3
 	ldr	r3, [r0, r3, lsl #3]
 	ldr	r2, [sp, #12]
 	uxth	ip, r3
 	cmp	r2, ip
-	bls	.L1555
+	bls	.L1597
 	add	r5, r5, r0
 	ldr	r2, [sp, #8]
 	ldr	r5, [r5, #4]
 	str	r5, [r2, ip, lsl #2]
-.L1555:
+.L1597:
 	adds	r1, r1, #1
-	b	.L1554
-.L1578:
+	b	.L1596
+.L1626:
 	.align	2
-.L1577:
+.L1625:
 	.word	.LANCHOR138
 	.word	.LANCHOR106
 	.word	.LANCHOR114
 	.word	.LANCHOR20
 	.word	.LANCHOR23
 	.word	.LANCHOR180
-	.word	.LC39
-	.word	.LC40
+	.word	.LC47
+	.word	.LC48
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
 	.section	.text.FtlLoadVonderInfo,"ax",%progbits
 	.align	1
@@ -12067,36 +12116,36 @@ FtlLoadVonderInfo:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L1580
-	ldr	r0, .L1580+4
+	ldr	r3, .L1628
+	ldr	r0, .L1628+4
 	ldrh	r3, [r3]
 	strh	r3, [r0, #10]	@ movhi
 	movw	r3, #61574
 	strh	r3, [r0, #4]	@ movhi
-	ldr	r3, .L1580+8
+	ldr	r3, .L1628+8
 	ldrh	r3, [r3]
 	strh	r3, [r0, #8]	@ movhi
-	ldr	r3, .L1580+12
+	ldr	r3, .L1628+12
 	ldrh	r3, [r3]
 	strh	r3, [r0, #6]	@ movhi
-	ldr	r3, .L1580+16
+	ldr	r3, .L1628+16
 	ldr	r3, [r3]
 	str	r3, [r0, #12]
-	ldr	r3, .L1580+20
+	ldr	r3, .L1628+20
 	ldr	r3, [r3]
 	str	r3, [r0, #16]
-	ldr	r3, .L1580+24
+	ldr	r3, .L1628+24
 	ldr	r3, [r3]
 	str	r3, [r0, #20]
-	ldr	r3, .L1580+28
+	ldr	r3, .L1628+28
 	ldr	r3, [r3]
 	str	r3, [r0, #24]
 	bl	FtlMapTblRecovery
 	movs	r0, #0
 	pop	{r3, pc}
-.L1581:
+.L1629:
 	.align	2
-.L1580:
+.L1628:
 	.word	.LANCHOR27
 	.word	.LANCHOR161
 	.word	.LANCHOR35
@@ -12119,13 +12168,13 @@ FtlLoadMapInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	FtlL2PDataInit
-	ldr	r0, .L1583
+	ldr	r0, .L1631
 	bl	FtlMapTblRecovery
 	movs	r0, #0
 	pop	{r3, pc}
-.L1584:
+.L1632:
 	.align	2
-.L1583:
+.L1631:
 	.word	.LANCHOR129
 	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
 	.section	.text.FtlSysBlkInit,"ax",%progbits
@@ -12141,27 +12190,27 @@ FtlSysBlkInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r3, #0
-	ldr	r4, .L1598
+	ldr	r4, .L1646
 	strh	r3, [r4]	@ movhi
-	ldr	r3, .L1598+4
+	ldr	r3, .L1646+4
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlScanSysBlk
-	ldr	r3, .L1598+8
+	ldr	r3, .L1646+8
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1586
-.L1588:
+	bne	.L1634
+.L1636:
 	mov	r6, #-1
-.L1585:
+.L1633:
 	mov	r0, r6
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1586:
+.L1634:
 	bl	FtlLoadSysInfo
 	mov	r6, r0
 	cmp	r0, #0
-	bne	.L1588
+	bne	.L1636
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -12171,40 +12220,40 @@ FtlSysBlkInit:
 	bl	FtlPowerLostRecovery
 	movs	r0, #1
 	bl	FtlUpdateVaildLpn
-	ldr	r3, .L1598+12
+	ldr	r3, .L1646+12
 	movs	r0, #12
 	ldrh	r1, [r3]
-	ldr	r3, .L1598+16
+	ldr	r3, .L1646+16
 	ldr	r2, [r3]
 	mov	r3, r6
-.L1589:
+.L1637:
 	cmp	r3, r1
-	bge	.L1594
+	bge	.L1642
 	mla	r5, r0, r3, r2
 	ldr	r5, [r5, #4]
 	cmp	r5, #0
-	bge	.L1590
-.L1594:
-	ldr	r0, .L1598+20
+	bge	.L1638
+.L1642:
+	ldr	r0, .L1646+20
 	cmp	r3, r1
 	ldr	r2, [r0]
 	add	r2, r2, #32
 	str	r2, [r0]
-	bge	.L1596
-.L1591:
-	ldr	r5, .L1598+24
-	ldr	r4, .L1598+28
+	bge	.L1644
+.L1639:
+	ldr	r5, .L1646+24
+	ldr	r4, .L1646+28
 	mov	r0, r5
 	bl	FtlSuperblockPowerLostFix
 	mov	r0, r4
 	bl	FtlSuperblockPowerLostFix
-	ldr	r3, .L1598+32
+	ldr	r3, .L1646+32
 	ldrh	r1, [r5]
 	ldrh	r0, [r5, #4]
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
-	ldr	r0, .L1598+36
+	ldr	r0, .L1646+36
 	strh	r3, [r2, r1, lsl #1]	@ movhi
 	ldrh	r7, [r4, #4]
 	ldrh	r3, [r0]
@@ -12220,27 +12269,27 @@ FtlSysBlkInit:
 	strb	r3, [r4, #6]
 	strh	r3, [r4, #4]	@ movhi
 	strh	r2, [r4, #2]	@ movhi
-	ldr	r2, .L1598+40
+	ldr	r2, .L1646+40
 	ldrh	r3, [r2, #30]
 	adds	r3, r3, #1
 	strh	r3, [r2, #30]	@ movhi
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1597:
+.L1645:
 	bl	FtlVpcTblFlush
-	b	.L1585
-.L1590:
+	b	.L1633
+.L1638:
 	adds	r3, r3, #1
-	b	.L1589
-.L1596:
+	b	.L1637
+.L1644:
 	ldrh	r3, [r4]
 	cmp	r3, #0
-	bne	.L1591
+	bne	.L1639
 	bl	l2p_flush
-	b	.L1597
-.L1599:
+	b	.L1645
+.L1647:
 	.align	2
-.L1598:
+.L1646:
 	.word	.LANCHOR156
 	.word	.LANCHOR4
 	.word	.LANCHOR139
@@ -12266,62 +12315,64 @@ ftl_low_format:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #0
-	ldr	r6, .L1624
-	ldr	r2, .L1624+4
-	ldr	r5, .L1624+8
-	ldrh	r0, [r6]
+	ldr	r2, .L1672
+	ldr	r6, .L1672+4
 	str	r3, [r2]
+	ldr	r5, .L1672+8
+	ldr	r2, .L1672+12
+	ldrh	r0, [r6]
 	str	r3, [r5]
+	str	r3, [r2]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	r0, .L1601
+	cbz	r0, .L1649
 	bl	FtlMakeBbt
-.L1601:
-	ldr	r3, .L1624+12
-	ldr	r2, .L1624+16
-	ldr	ip, .L1624+100
+.L1649:
+	ldr	r3, .L1672+16
+	ldr	r2, .L1672+20
+	ldr	ip, .L1672+104
 	ldrh	r1, [r3]
 	ldr	r4, [r2]
-	ldr	r2, .L1624+20
+	ldr	r2, .L1672+24
 	str	r3, [sp, #4]
 	lsls	r1, r1, #7
 	ldr	r7, [r2]
 	movs	r2, #0
-.L1602:
+.L1650:
 	uxth	r3, r2
 	adds	r2, r2, #1
 	cmp	r3, r1
-	blt	.L1603
-	ldr	r3, .L1624+24
+	blt	.L1651
+	ldr	r3, .L1672+28
 	movs	r7, #0
-	ldr	r10, .L1624+104
+	ldr	r10, .L1672+108
 	ldrh	r4, [r3]
 	mov	r8, r3
 	mov	fp, r10
-.L1604:
+.L1652:
 	ldrh	r3, [r10]
 	cmp	r3, r4
-	bhi	.L1605
-	ldr	r4, .L1624+28
+	bhi	.L1653
+	ldr	r4, .L1672+32
 	subs	r3, r7, #2
 	ldrh	r1, [r4]
 	cmp	r3, r1, lsl #1
-	bgt	.L1606
-.L1610:
+	bgt	.L1654
+.L1658:
 	movs	r6, #0
 	mov	r7, r6
-.L1607:
+.L1655:
 	ldrh	r3, [r8]
 	uxth	r0, r6
 	adds	r6, r6, #1
 	cmp	r3, r0
-	bhi	.L1611
+	bhi	.L1659
 	ldrh	r2, [fp]
-	ldr	r3, .L1624+32
+	ldr	r3, .L1672+36
 	ldrh	r4, [r4]
-	ldr	r6, .L1624+36
+	ldr	r6, .L1672+40
 	str	r2, [r3]
-	ldr	r3, .L1624+40
+	ldr	r3, .L1672+44
 	mov	r1, r4
 	ldr	r2, [r3]
 	mov	r0, r2
@@ -12331,13 +12382,13 @@ ftl_low_format:
 	mov	r3, r0
 	str	r0, [r6]
 	add	r1, r10, #36
-	ldr	r0, .L1624+44
+	ldr	r0, .L1672+48
 	strh	r1, [r0]	@ movhi
 	movs	r1, #24
 	muls	r1, r4, r1
 	str	r0, [sp]
 	cmp	r7, r1
-	ble	.L1612
+	ble	.L1660
 	ldr	r2, [sp, #12]
 	mov	r1, r4
 	str	r3, [sp, #8]
@@ -12349,11 +12400,11 @@ ftl_low_format:
 	adds	r0, r0, #24
 	strh	r0, [r3]	@ movhi
 	ldr	r3, [sp, #8]
-.L1612:
-	ldr	r2, .L1624+48
+.L1660:
+	ldr	r2, .L1672+52
 	ldrh	r2, [r2]
-	cbz	r2, .L1614
-	ldr	r1, .L1624+44
+	cbz	r2, .L1662
+	ldr	r1, .L1672+48
 	ldrh	r0, [r1]
 	add	r0, r0, r2, lsr #1
 	strh	r0, [r1]	@ movhi
@@ -12364,24 +12415,24 @@ ftl_low_format:
 	strlt	r3, [r6]
 	addlt	r2, r2, r10
 	strhlt	r2, [r1]	@ movhi
-.L1614:
+.L1662:
 	ldr	r3, [sp]
-	ldr	r7, .L1624+52
-	ldr	r10, .L1624+108
+	ldr	r7, .L1672+56
+	ldr	r10, .L1672+112
 	ldrh	r2, [r3]
 	ldr	r3, [r6]
 	subs	r3, r3, r2
 	muls	r4, r3, r4
-	ldr	r3, .L1624+56
+	ldr	r3, .L1672+60
 	ldrh	r3, [r3]
 	str	r4, [r7]
 	muls	r4, r3, r4
 	ldr	r3, [sp, #4]
 	ldrh	r3, [r3]
 	str	r4, [r6]
-	ldr	r6, .L1624+60
+	ldr	r6, .L1672+64
 	muls	r4, r3, r4
-	ldr	r3, .L1624+64
+	ldr	r3, .L1672+68
 	str	r4, [r3]
 	movw	r4, #65535
 	bl	FtlBbmTblFlush
@@ -12390,13 +12441,13 @@ ftl_low_format:
 	ldr	r0, [r10]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-	ldr	r2, .L1624+68
+	ldr	r2, .L1672+72
 	movs	r3, #0
 	strh	r3, [r6, #2]	@ movhi
 	movs	r1, #255
 	strb	r3, [r6, #6]
 	str	r3, [r2]
-	ldr	r2, .L1624+72
+	ldr	r2, .L1672+76
 	strh	r3, [r6]	@ movhi
 	strh	r3, [r2, #2]	@ movhi
 	strb	r3, [r2, #6]
@@ -12407,30 +12458,30 @@ ftl_low_format:
 	mov	r8, r10
 	strb	r3, [r6, #8]
 	mov	r10, r6
-	ldr	r3, .L1624+76
+	ldr	r3, .L1672+80
 	lsrs	r2, r2, #3
 	ldr	r0, [r3]
 	bl	ftl_memset
-.L1616:
+.L1664:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r6, #7]	@ zero_extendqisi2
 	ldrh	r2, [r6]
 	cmp	r3, #0
-	bne	.L1617
+	bne	.L1665
 	ldr	r3, [r8]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r6]
 	adds	r3, r3, #1
 	strh	r3, [r6]	@ movhi
-	b	.L1616
-.L1603:
+	b	.L1664
+.L1651:
 	mvns	r0, r3
 	orr	r0, r3, r0, lsl #16
 	str	r0, [r4, r3, lsl #2]
 	str	ip, [r7, r3, lsl #2]
-	b	.L1602
-.L1605:
+	b	.L1650
+.L1653:
 	mov	r0, r4
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
@@ -12438,11 +12489,11 @@ ftl_low_format:
 	add	r7, r7, r0
 	uxth	r7, r7
 	uxth	r4, r4
-	b	.L1604
-.L1606:
+	b	.L1652
+.L1654:
 	mov	r0, r7
 	bl	__aeabi_uidiv
-	ldr	r3, .L1624+80
+	ldr	r3, .L1672+84
 	ldr	r3, [r3]
 	add	r0, r0, r3
 	uxth	r0, r0
@@ -12450,26 +12501,26 @@ ftl_low_format:
 	ldrh	r0, [r6]
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	r6, [r8]
-.L1608:
+.L1656:
 	ldrh	r3, [fp]
 	cmp	r3, r6
-	bls	.L1610
+	bls	.L1658
 	mov	r0, r6
 	movs	r1, #1
 	adds	r6, r6, #1
 	bl	FtlLowFormatEraseBlock
 	uxth	r6, r6
-	b	.L1608
-.L1611:
+	b	.L1656
+.L1659:
 	movs	r1, #0
 	bl	FtlLowFormatEraseBlock
 	add	r7, r7, r0
 	uxth	r7, r7
-	b	.L1607
-.L1617:
+	b	.L1655
+.L1665:
 	ldr	r3, [r5]
 	ldrh	r1, [r6, #4]
-	ldr	r4, .L1624+84
+	ldr	r4, .L1672+88
 	str	r3, [r6, #12]
 	adds	r3, r3, #1
 	str	r3, [r5]
@@ -12485,19 +12536,19 @@ ftl_low_format:
 	strh	r3, [r4]	@ movhi
 	movs	r3, #1
 	strb	r3, [r4, #8]
-.L1618:
+.L1666:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r4]
-	cbnz	r3, .L1619
+	cbnz	r3, .L1667
 	ldr	r3, [r8]
 	strh	r6, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	b	.L1618
-.L1619:
+	b	.L1666
+.L1667:
 	ldr	r3, [r5]
 	ldrh	r1, [r4, #4]
 	str	r3, [r4, #12]
@@ -12506,10 +12557,10 @@ ftl_low_format:
 	movw	r4, #65535
 	ldr	r3, [r8]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L1624+88
+	ldr	r3, .L1672+92
 	strh	r4, [r3]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L1624+92
+	ldr	r3, .L1672+96
 	movs	r2, #0
 	strh	r2, [r3, #2]	@ movhi
 	ldr	r2, [r7]
@@ -12522,21 +12573,22 @@ ftl_low_format:
 	str	r2, [r5]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	r0, .L1620
-	ldr	r3, .L1624+96
+	cbnz	r0, .L1668
+	ldr	r3, .L1672+100
 	movs	r2, #1
 	str	r2, [r3]
-.L1620:
+.L1668:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1625:
+.L1673:
 	.align	2
-.L1624:
-	.word	.LANCHOR4
+.L1672:
 	.word	.LANCHOR83
+	.word	.LANCHOR4
 	.word	.LANCHOR82
+	.word	.LANCHOR143
 	.word	.LANCHOR12
 	.word	.LANCHOR109
 	.word	.LANCHOR110
@@ -12552,7 +12604,7 @@ ftl_low_format:
 	.word	.LANCHOR51
 	.word	.LANCHOR34
 	.word	.LANCHOR59
-	.word	.LANCHOR144
+	.word	.LANCHOR145
 	.word	.LANCHOR1
 	.word	.LANCHOR31
 	.word	.LANCHOR52
@@ -12576,60 +12628,46 @@ sftl_init:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
 	mov	r3, #-1
-	ldr	r4, .L1643
+	ldr	r4, .L1686
 	movs	r6, #0
-	ldr	r1, .L1643+4
-	ldr	r0, .L1643+8
+	ldr	r1, .L1686+4
+	ldr	r0, .L1686+8
 	str	r3, [r4]
 	bl	printf
-	ldr	r0, .L1643+12
+	ldr	r0, .L1686+12
 	bl	FtlConstantsInit
-	ldr	r5, .L1643+16
+	ldr	r5, .L1686+16
 	bl	FtlMemInit
 	bl	FtlVariablesInit
-	ldr	r3, .L1643+20
+	ldr	r3, .L1686+20
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
-.L1627:
+.L1675:
 	bl	FtlLoadBbt
-	cbz	r0, .L1628
-.L1642:
+	cbz	r0, .L1676
+.L1685:
 	ldr	r3, [r5]
 	cmp	r3, #1
-	bne	.L1627
+	bne	.L1675
 	str	r6, [r5]
 	bl	ftl_low_format
-	b	.L1627
-.L1628:
+	b	.L1675
+.L1676:
 	bl	FtlSysBlkInit
 	cmp	r0, #0
-	bne	.L1642
+	bne	.L1685
 	movs	r3, #1
 	str	r3, [r4]
-	ldr	r3, .L1643+24
-	ldrh	r3, [r3]
-	cmp	r3, #15
-	bhi	.L1640
-	movw	r4, #8129
-.L1634:
-	movs	r1, #1
-	movs	r0, #0
-	bl	rk_ftl_garbage_collect
-	subs	r4, r4, #1
-	bne	.L1634
-.L1640:
-	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L1644:
+.L1687:
 	.align	2
-.L1643:
+.L1686:
 	.word	.LANCHOR166
-	.word	.LC41
-	.word	.LC34
+	.word	.LC49
+	.word	.LC38
 	.word	.LANCHOR0
 	.word	.LANCHOR181
 	.word	.LANCHOR4
-	.word	.LANCHOR48
 	.size	sftl_init, .-sftl_init
 	.section	.text.FtlWriteToIDB,"ax",%progbits
 	.align	1
@@ -12650,33 +12688,33 @@ FtlWriteToIDB:
 	mov	r4, r0
 	mov	r6, r1
 	mov	r7, r2
-	ldr	r5, .L1715
-	bls	.L1646
+	ldr	r5, .L1758
+	bls	.L1689
 	cmp	r0, #576
-	bcc	.L1647
-.L1646:
+	bcc	.L1690
+.L1689:
 	ldr	r3, [r5]
-	cbnz	r3, .L1648
-.L1714:
+	cbnz	r3, .L1691
+.L1757:
 	movs	r4, #0
-	b	.L1645
-.L1648:
-	ldr	r3, .L1715+4
+	b	.L1688
+.L1691:
+	ldr	r3, .L1758+4
 	ldr	r3, [r3]
 	ldr	r2, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L1715+8
+	ldr	r3, .L1758+8
 	cmp	r2, r3
-	bne	.L1650
-	ldr	r3, .L1715+12
+	bne	.L1693
+	ldr	r3, .L1758+12
 	movs	r2, #0
 	ldrh	r1, [r3, #10]
 	ldr	r3, [sp, #12]
 	add	r0, r3, #262144
 	movw	r3, #65535
-.L1654:
+.L1697:
 	ldr	r4, [r0, #-4]
-	cbnz	r4, .L1651
+	cbnz	r4, .L1694
 	ldr	r4, [sp, #12]
 	subs	r3, r3, #1
 	ldr	r4, [r4, r2, lsl #2]
@@ -12686,18 +12724,18 @@ FtlWriteToIDB:
 	movhi	r2, #0
 	cmp	r3, #4096
 	str	r4, [r0, #-4]!
-	bne	.L1654
+	bne	.L1697
 	mov	r3, #512
-	b	.L1711
-.L1651:
+	b	.L1754
+.L1694:
 	adds	r3, r3, #127
 	lsrs	r3, r3, #7
-.L1711:
+.L1754:
 	str	r3, [sp, #16]
 	lsls	r1, r1, #2
 	ldr	r3, [sp, #16]
 	uxth	r1, r1
-	ldr	r4, .L1715+16
+	ldr	r4, .L1758+16
 	adds	r0, r3, #4
 	bl	__aeabi_uidiv
 	adds	r3, r0, #1
@@ -12708,53 +12746,53 @@ FtlWriteToIDB:
 	movs	r3, #0
 	mov	r10, r3
 	str	r3, [sp, #20]
-.L1676:
-	ldr	r3, .L1715+20
+.L1719:
+	ldr	r3, .L1758+20
 	mov	r2, #512
 	movs	r1, #0
 	ldr	r0, [r3]
 	bl	memset
-	ldr	r3, .L1715+12
+	ldr	r3, .L1758+12
 	ldrh	r6, [r3, #10]
 	ldr	r3, [r4, #16]
 	mul	fp, r10, r6
 	cmp	r3, #0
-	beq	.L1684
+	beq	.L1727
 	ldr	r3, [r4, #20]
 	cmp	r3, #0
 	ite	eq
 	moveq	r3, #6
 	movne	r3, #9
-.L1712:
+.L1755:
 	str	r3, [sp, #28]
 	mov	r1, fp
-	ldr	r3, .L1715+16
+	ldr	r3, .L1758+16
 	movs	r0, #0
 	ldr	r3, [r3, #4]
 	blx	r3
 	ldr	r3, [sp, #24]
 	cmp	r3, #1
-	beq	.L1656
-	ldr	r3, .L1715+16
+	beq	.L1699
+	ldr	r3, .L1758+16
 	add	r1, r6, fp
 	movs	r0, #0
 	ldr	r3, [r3, #4]
 	blx	r3
-.L1656:
+.L1699:
 	ldr	r3, [sp, #28]
 	cmp	r3, #9
-	bne	.L1686
-	ldr	r3, .L1715+20
+	bne	.L1729
+	ldr	r3, .L1758+20
 	mov	r2, #1024
 	movs	r1, #0
 	ldr	r5, [r3]
 	mov	r0, r5
 	bl	ftl_memset
 	movs	r2, #4
-	ldr	r3, .L1715+24
+	ldr	r3, .L1758+24
 	strb	r2, [r5, #17]
 	movs	r1, #12
-	ldr	r2, .L1715+12
+	ldr	r2, .L1758+12
 	adds	r0, r5, r1
 	str	r3, [r5]
 	movs	r3, #0
@@ -12769,7 +12807,7 @@ FtlWriteToIDB:
 	strh	r3, [r5, #22]	@ movhi
 	bl	js_hash
 	str	r0, [r5, #8]
-.L1657:
+.L1700:
 	ldr	r3, [sp, #24]
 	mov	r8, fp
 	muls	r3, r6, r3
@@ -12777,10 +12815,10 @@ FtlWriteToIDB:
 	str	r3, [sp, #40]
 	ldr	r3, [sp, #12]
 	str	r3, [sp, #32]
-.L1658:
+.L1701:
 	ldr	r3, [sp, #40]
 	cmp	r6, r3
-	beq	.L1665
+	beq	.L1708
 	ldr	r3, [sp, #28]
 	cmp	r3, #9
 	itet	ne
@@ -12791,10 +12829,10 @@ FtlWriteToIDB:
 	movw	r3, #61424
 	str	r3, [sp, #52]
 	cmp	r6, #0
-	bne	.L1661
+	bne	.L1704
 	ldr	r3, [sp, #28]
 	cmp	r3, #9
-	bne	.L1661
+	bne	.L1704
 	ldr	r3, [r4, #16]
 	movs	r0, #70
 	blx	r3
@@ -12804,40 +12842,40 @@ FtlWriteToIDB:
 	mov	r0, r6
 	ldr	r7, [r4, #8]
 	blx	r7
-	ldr	r2, .L1715+12
+	ldr	r2, .L1758+12
 	str	r0, [sp, #44]
 	ldr	r3, [r4, #16]
 	ldrb	r0, [r2, #22]	@ zero_extendqisi2
 	blx	r3
 	ldr	r2, [sp, #44]
 	adds	r2, r2, #1
-	bne	.L1662
-.L1665:
-	ldr	r3, .L1715+20
+	bne	.L1705
+.L1708:
+	ldr	r3, .L1758+20
 	ldr	r2, [r4, #16]
 	ldr	r6, [r3]
-	ldr	r3, .L1715+12
+	ldr	r3, .L1758+12
 	ldrb	r3, [r3, #14]	@ zero_extendqisi2
 	str	r3, [sp, #28]
-	ldr	r3, .L1715+12
+	ldr	r3, .L1758+12
 	ldrh	r3, [r3, #10]
 	mul	r8, r10, r3
 	cmp	r2, #0
-	bne	.L1663
+	bne	.L1706
 	mov	fp, #6
-.L1664:
+.L1707:
 	ldr	r2, [sp, #24]
 	movs	r5, #0
 	muls	r3, r2, r3
 	str	r3, [sp, #32]
-.L1667:
+.L1710:
 	ldr	r3, [sp, #32]
 	cmp	r5, r3
-	beq	.L1671
+	beq	.L1714
 	cmp	r5, #0
-	bne	.L1668
+	bne	.L1711
 	cmp	fp, #9
-	bne	.L1668
+	bne	.L1711
 	ldr	r3, [r4, #16]
 	movs	r0, #70
 	blx	r3
@@ -12853,77 +12891,77 @@ FtlWriteToIDB:
 	ldr	r3, [r4, #20]
 	ldr	r0, [sp, #28]
 	blx	r3
-	ldr	r2, .L1715+12
+	ldr	r2, .L1758+12
 	ldr	r3, [r4, #16]
 	ldrb	r0, [r2, #22]	@ zero_extendqisi2
 	blx	r3
 	ldr	r3, [r6]
-	ldr	r2, .L1715+24
+	ldr	r2, .L1758+24
 	cmp	r3, r2
-	beq	.L1669
-.L1671:
-	ldr	r3, .L1715+20
+	beq	.L1712
+.L1714:
+	ldr	r3, .L1758+20
 	movs	r5, #0
 	ldr	r1, [sp, #12]
 	ldr	r0, [r3]
-.L1670:
+.L1713:
 	mov	r8, r1
 	ldr	r2, [r0, r5, lsl #2]
 	ldr	r3, [r8]
 	lsls	r6, r5, #2
 	adds	r1, r1, #4
 	cmp	r2, r3
-	beq	.L1673
+	beq	.L1716
 	mov	r2, #512
 	movs	r1, #0
 	bl	memset
-	ldr	r3, .L1715+20
+	ldr	r3, .L1758+20
 	mov	r1, r10
-	ldr	r0, .L1715+28
+	ldr	r0, .L1758+28
 	ldr	r2, [r3]
 	str	r5, [sp]
 	ldr	r3, [r8]
 	ldr	r2, [r2, r6]
 	bl	printf
-	ldr	r3, .L1715+12
+	ldr	r3, .L1758+12
 	movs	r0, #0
 	ldrh	r1, [r3, #10]
 	ldr	r3, [r4, #4]
 	mul	r1, r10, r1
 	blx	r3
-.L1674:
+.L1717:
 	ldr	r3, [sp, #24]
 	add	r10, r10, r3
 	cmp	r10, #15
-	bls	.L1676
+	bls	.L1719
 	ldr	r3, [sp, #20]
-	cbnz	r3, .L1677
-.L1650:
+	cbnz	r3, .L1720
+.L1693:
 	mov	r3, #-1
 	str	r3, [sp, #16]
-.L1677:
-	ldr	r3, .L1715
+.L1720:
+	ldr	r3, .L1758
 	movs	r2, #0
 	ldr	r4, [sp, #16]
 	str	r2, [r3]
-	ldr	r3, .L1715+4
+	ldr	r3, .L1758+4
 	ldr	r0, [r3]
 	bl	free
-	ldr	r3, .L1715+20
+	ldr	r3, .L1758+20
 	ldr	r0, [r3]
 	bl	free
-.L1645:
+.L1688:
 	mov	r0, r4
 	add	sp, sp, #112
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1684:
+.L1727:
 	movs	r3, #6
-	b	.L1712
-.L1686:
+	b	.L1755
+.L1729:
 	movs	r5, #0
-	b	.L1657
-.L1661:
+	b	.L1700
+.L1704:
 	add	r3, sp, #48
 	ldr	r2, [sp, #32]
 	mov	r1, r8
@@ -12931,22 +12969,22 @@ FtlWriteToIDB:
 	ldr	r7, [r4, #8]
 	blx	r7
 	adds	r0, r0, #1
-	beq	.L1665
+	beq	.L1708
 	ldr	r3, [sp, #32]
 	add	r3, r3, #2048
 	str	r3, [sp, #32]
-.L1662:
+.L1705:
 	adds	r6, r6, #1
 	add	r8, r8, #1
-	b	.L1658
-.L1663:
+	b	.L1701
+.L1706:
 	ldr	r2, [r4, #20]
 	cmp	r2, #0
 	ite	eq
 	moveq	fp, #6
 	movne	fp, #9
-	b	.L1664
-.L1668:
+	b	.L1707
+.L1711:
 	add	r3, sp, #48
 	mov	r2, r6
 	add	r1, r8, r5
@@ -12954,18 +12992,18 @@ FtlWriteToIDB:
 	ldr	r7, [r4, #12]
 	blx	r7
 	adds	r0, r0, #1
-	beq	.L1671
+	beq	.L1714
 	ldr	r2, [sp, #52]
 	movw	r3, #61424
 	cmp	r2, r3
-	bne	.L1671
+	bne	.L1714
 	add	r6, r6, #2048
-.L1669:
+.L1712:
 	adds	r5, r5, #1
-	b	.L1667
-.L1716:
+	b	.L1710
+.L1759:
 	.align	2
-.L1715:
+.L1758:
 	.word	.LANCHOR182
 	.word	.LANCHOR183
 	.word	-52655045
@@ -12973,46 +13011,46 @@ FtlWriteToIDB:
 	.word	.LANCHOR78
 	.word	.LANCHOR184
 	.word	1179535694
-	.word	.LC42
-.L1673:
+	.word	.LC50
+.L1716:
 	ldr	r3, [sp, #36]
 	adds	r5, r5, #1
 	cmp	r5, r3
-	bne	.L1670
+	bne	.L1713
 	ldr	r3, [sp, #20]
 	adds	r3, r3, #1
 	cmp	r3, #5
 	str	r3, [sp, #20]
-	bls	.L1674
-	b	.L1677
-.L1647:
+	bls	.L1717
+	b	.L1720
+.L1690:
 	cmp	r0, #64
-	bne	.L1678
-	ldr	fp, .L1717+4
+	bne	.L1721
+	ldr	fp, .L1760+4
 	mov	r0, #262144
 	bl	ftl_malloc
 	str	r0, [fp]
 	mov	r0, #262144
 	bl	ftl_malloc
-	ldr	r3, .L1717
+	ldr	r3, .L1760
 	str	r0, [r3]
 	ldr	r3, [fp]
-	cbz	r3, .L1679
-	cbz	r0, .L1679
+	cbz	r3, .L1722
+	cbz	r0, .L1722
 	movs	r2, #1
 	movs	r1, #0
 	str	r2, [r5]
 	mov	r0, r3
 	mov	r2, #262144
 	bl	ftl_memset
-.L1678:
+.L1721:
 	ldr	r3, [r5]
 	cmp	r3, #0
-	beq	.L1714
-	ldr	r3, .L1717+4
+	beq	.L1757
+	ldr	r3, .L1760+4
 	cmp	r4, #63
 	iteee	hi
-	ldrhi	r5, .L1717+8
+	ldrhi	r5, .L1760+8
 	rsbls	r4, r4, #64
 	subls	r6, r6, r4
 	addls	r7, r7, r4, lsl #9
@@ -13020,7 +13058,7 @@ FtlWriteToIDB:
 	mov	r2, #262144
 	it	hi
 	addhi	r5, r5, r4
-	ldr	r0, .L1717+12
+	ldr	r0, .L1760+12
 	ite	ls
 	movls	r5, r1
 	addhi	r5, r1, r5, lsl #9
@@ -13035,21 +13073,21 @@ FtlWriteToIDB:
 	mov	r1, r7
 	mov	r0, r5
 	bl	ftl_memcpy
-	b	.L1714
-.L1679:
-	ldr	r1, .L1717+16
-	ldr	r0, .L1717+20
+	b	.L1757
+.L1722:
+	ldr	r1, .L1760+16
+	ldr	r0, .L1760+20
 	bl	printf
-	b	.L1678
-.L1718:
+	b	.L1721
+.L1761:
 	.align	2
-.L1717:
+.L1760:
 	.word	.LANCHOR184
 	.word	.LANCHOR183
 	.word	8388544
-	.word	.LC44
+	.word	.LC52
 	.word	.LANCHOR185
-	.word	.LC43
+	.word	.LC51
 	.size	FtlWriteToIDB, .-FtlWriteToIDB
 	.section	.text.sftl_write,"ax",%progbits
 	.align	1
@@ -13715,7 +13753,7 @@ g_gc_skip_write_count:
 	.space	4
 	.section	.bss.g_gc_superblock,"aw",%nobits
 	.align	2
-	.set	.LANCHOR144,. + 0
+	.set	.LANCHOR145,. + 0
 	.type	g_gc_superblock, %object
 	.size	g_gc_superblock, 48
 g_gc_superblock:
@@ -13778,7 +13816,7 @@ g_nand_phy_info:
 	.space	24
 	.section	.bss.g_num_data_superblocks,"aw",%nobits
 	.align	1
-	.set	.LANCHOR45,. + 0
+	.set	.LANCHOR44,. + 0
 	.type	g_num_data_superblocks, %object
 	.size	g_num_data_superblocks, 2
 g_num_data_superblocks:
@@ -13841,7 +13879,7 @@ g_tmp_data_superblock_id:
 	.space	2
 	.section	.bss.g_totle_avg_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR145,. + 0
+	.set	.LANCHOR143,. + 0
 	.type	g_totle_avg_erase_count, %object
 	.size	g_totle_avg_erase_count, 4
 g_totle_avg_erase_count:
@@ -14029,21 +14067,21 @@ p_data_block_list_table:
 	.space	4
 	.section	.bss.p_data_block_list_tail,"aw",%nobits
 	.align	2
-	.set	.LANCHOR44,. + 0
+	.set	.LANCHOR43,. + 0
 	.type	p_data_block_list_tail, %object
 	.size	p_data_block_list_tail, 4
 p_data_block_list_tail:
 	.space	4
 	.section	.bss.p_erase_count_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR43,. + 0
+	.set	.LANCHOR47,. + 0
 	.type	p_erase_count_table, %object
 	.size	p_erase_count_table, 4
 p_erase_count_table:
 	.space	4
 	.section	.bss.p_free_data_block_list_head,"aw",%nobits
 	.align	2
-	.set	.LANCHOR47,. + 0
+	.set	.LANCHOR46,. + 0
 	.type	p_free_data_block_list_head, %object
 	.size	p_free_data_block_list_head, 4
 p_free_data_block_list_head:
@@ -14312,316 +14350,334 @@ power_up_flag:
 .LC8:
 	.ascii	"not free: w: s:\000"
 	.section	.rodata.FlashProgPages.str1.1,"aMS",%progbits,1
-.LC11:
+.LC14:
 	.ascii	"prog read error: = %x\012\000"
-.LC12:
+.LC15:
+	.ascii	"prog read REFRESH: = %x\012\000"
+.LC16:
 	.ascii	"prog read s error: = %x %x %x\012\000"
-.LC13:
+.LC17:
 	.ascii	"prog read d error: = %x %x %x\012\000"
+	.section	.rodata.FlashReadPages.str1.1,"aMS",%progbits,1
+.LC11:
+	.ascii	"FlashReadPages %x %x error_ecc_bits %d\012\000"
+.LC12:
+	.ascii	"data:\000"
+.LC13:
+	.ascii	"spare:\000"
 	.section	.rodata.FtlBbmMapBadBlock.str1.1,"aMS",%progbits,1
 .LC0:
 	.ascii	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\012"
 	.ascii	"\000"
 	.section	.rodata.FtlBbmTblFlush.str1.1,"aMS",%progbits,1
-.LC14:
+.LC18:
 	.ascii	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\012\000"
-.LC15:
+.LC19:
 	.ascii	"FtlBbmTblFlush error:%x\012\000"
-.LC16:
+.LC20:
 	.ascii	"FtlBbmTblFlush error = %x error count = %d\012\000"
 	.section	.rodata.FtlFreeSysBlkQueueOut.str1.1,"aMS",%progbits,1
 .LC9:
 	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\012"
 	.ascii	"\000"
 	.section	.rodata.FtlGcScanTempBlk.str1.1,"aMS",%progbits,1
-.LC31:
+.LC35:
 	.ascii	"FtlGcScanTempBlk Error ID %x %x!!!!!!! \012\000"
 	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",%progbits,1
-.LC33:
+.LC37:
 	.ascii	"no ect\000"
-.LC34:
+.LC38:
 	.ascii	"%s\012\000"
 	.section	.rodata.FtlLoadSysInfo.str1.1,"aMS",%progbits,1
-.LC38:
+.LC46:
 	.ascii	"%s hash error this.id =%x page =%x pre_id =%x hash "
 	.ascii	"=%x hash_r =%x\012\000"
 	.section	.rodata.FtlMapTblRecovery.str1.1,"aMS",%progbits,1
-.LC39:
+.LC47:
 	.ascii	"%s last blk_id =%x page =%x hash error hash =%x has"
 	.ascii	"h_r =%x\012\000"
-.LC40:
+.LC48:
 	.ascii	"%s scan blk_id =%x page =%x hash error hash =%x has"
 	.ascii	"h_r =%x\012\000"
 	.section	.rodata.FtlMapWritePage.str1.1,"aMS",%progbits,1
-.LC18:
+.LC22:
 	.ascii	"FtlMapWritePage error = %x \012\000"
-.LC19:
+.LC23:
 	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
 	.section	.rodata.FtlProgPages.str1.1,"aMS",%progbits,1
-.LC36:
+.LC40:
+	.ascii	"FtlProgPages error %x = %d\012\000"
+.LC41:
 	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
 	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",%progbits,1
-.LC24:
+.LC27:
+	.ascii	"data prev_ppa = %x error...................\012\000"
+.LC28:
 	.ascii	"spuer block %x vpn is 0\012 \000"
 	.section	.rodata.FtlVendorPartRead.str1.1,"aMS",%progbits,1
-.LC32:
+.LC36:
 	.ascii	"FtlVendorPartRead refresh = %x phyAddr = %x\012\000"
 	.section	.rodata.FtlVpcTblFlush.str1.1,"aMS",%progbits,1
-.LC35:
+.LC39:
 	.ascii	"FtlVpcTblFlush error = %x error count = %d\012\000"
 	.section	.rodata.FtlWrite.str1.1,"aMS",%progbits,1
-.LC37:
+.LC44:
+	.ascii	"FtlWrite: ecc error:%x %x %x\012\000"
+.LC45:
 	.ascii	"FtlWrite: lpa error:%x %x\012\000"
 	.section	.rodata.FtlWriteToIDB.str1.1,"aMS",%progbits,1
-.LC42:
+.LC50:
 	.ascii	"write_idblock fail! %x %x %x %x\012\000"
-.LC43:
+.LC51:
 	.ascii	"%s idb buffer alloc fail\012\000"
-.LC44:
+.LC52:
 	.ascii	"%p %x %p %x\012\000"
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",%progbits,1
 .LC1:
 	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
-	.section	.rodata.__func__.10015,"a",%progbits
+	.section	.rodata.__func__.10006,"a",%progbits
 	.set	.LANCHOR175,. + 0
-	.type	__func__.10015, %object
-	.size	__func__.10015, 23
-__func__.10015:
+	.type	__func__.10006, %object
+	.size	__func__.10006, 23
+__func__.10006:
 	.ascii	"rk_ftl_garbage_collect\000"
-	.section	.rodata.__func__.10277,"a",%progbits
+	.section	.rodata.__func__.10278,"a",%progbits
 	.set	.LANCHOR137,. + 0
-	.type	__func__.10277, %object
-	.size	__func__.10277, 15
-__func__.10277:
+	.type	__func__.10278, %object
+	.size	__func__.10278, 15
+__func__.10278:
 	.ascii	"FlashReadPages\000"
-	.section	.rodata.__func__.10296,"a",%progbits
+	.section	.rodata.__func__.10297,"a",%progbits
 	.set	.LANCHOR142,. + 0
-	.type	__func__.10296, %object
-	.size	__func__.10296, 15
-__func__.10296:
+	.type	__func__.10297, %object
+	.size	__func__.10297, 15
+__func__.10297:
 	.ascii	"FlashProgPages\000"
-	.section	.rodata.__func__.10320,"a",%progbits
+	.section	.rodata.__func__.10321,"a",%progbits
 	.set	.LANCHOR77,. + 0
-	.type	__func__.10320, %object
-	.size	__func__.10320, 17
-__func__.10320:
+	.type	__func__.10321, %object
+	.size	__func__.10321, 17
+__func__.10321:
 	.ascii	"FlashEraseBlocks\000"
-	.section	.rodata.__func__.10435,"a",%progbits
+	.section	.rodata.__func__.10436,"a",%progbits
 	.set	.LANCHOR185,. + 0
-	.type	__func__.10435, %object
-	.size	__func__.10435, 14
-__func__.10435:
+	.type	__func__.10436, %object
+	.size	__func__.10436, 14
+__func__.10436:
 	.ascii	"FtlWriteToIDB\000"
-	.section	.rodata.__func__.8940,"a",%progbits
+	.section	.rodata.__func__.8930,"a",%progbits
 	.set	.LANCHOR169,. + 0
-	.type	__func__.8940, %object
-	.size	__func__.8940, 13
-__func__.8940:
+	.type	__func__.8930, %object
+	.size	__func__.8930, 13
+__func__.8930:
 	.ascii	"FtlProgPages\000"
-	.section	.rodata.__func__.8968,"a",%progbits
+	.section	.rodata.__func__.8958,"a",%progbits
 	.set	.LANCHOR177,. + 0
-	.type	__func__.8968, %object
-	.size	__func__.8968, 9
-__func__.8968:
+	.type	__func__.8958, %object
+	.size	__func__.8958, 9
+__func__.8958:
 	.ascii	"FtlWrite\000"
-	.section	.rodata.__func__.9043,"a",%progbits
+	.section	.rodata.__func__.9033,"a",%progbits
 	.set	.LANCHOR128,. + 0
-	.type	__func__.9043, %object
-	.size	__func__.9043, 14
-__func__.9043:
+	.type	__func__.9033, %object
+	.size	__func__.9033, 14
+__func__.9033:
 	.ascii	"FtlBbt2Bitmap\000"
-	.section	.rodata.__func__.9078,"a",%progbits
+	.section	.rodata.__func__.9068,"a",%progbits
 	.set	.LANCHOR141,. + 0
-	.type	__func__.9078, %object
-	.size	__func__.9078, 11
-__func__.9078:
+	.type	__func__.9068, %object
+	.size	__func__.9068, 11
+__func__.9068:
 	.ascii	"FtlLoadBbt\000"
-	.section	.rodata.__func__.9193,"a",%progbits
+	.section	.rodata.__func__.9183,"a",%progbits
 	.set	.LANCHOR49,. + 0
-	.type	__func__.9193, %object
-	.size	__func__.9193, 17
-__func__.9193:
+	.type	__func__.9183, %object
+	.size	__func__.9183, 17
+__func__.9183:
 	.ascii	"INSERT_FREE_LIST\000"
-	.section	.rodata.__func__.9198,"a",%progbits
-	.set	.LANCHOR46,. + 0
-	.type	__func__.9198, %object
-	.size	__func__.9198, 17
-__func__.9198:
+	.section	.rodata.__func__.9188,"a",%progbits
+	.set	.LANCHOR45,. + 0
+	.type	__func__.9188, %object
+	.size	__func__.9188, 17
+__func__.9188:
 	.ascii	"INSERT_DATA_LIST\000"
-	.section	.rodata.__func__.9229,"a",%progbits
+	.section	.rodata.__func__.9219,"a",%progbits
 	.set	.LANCHOR50,. + 0
-	.type	__func__.9229, %object
-	.size	__func__.9229, 17
-__func__.9229:
+	.type	__func__.9219, %object
+	.size	__func__.9219, 17
+__func__.9219:
 	.ascii	"List_remove_node\000"
-	.section	.rodata.__func__.9261,"a",%progbits
+	.section	.rodata.__func__.9251,"a",%progbits
 	.set	.LANCHOR54,. + 0
-	.type	__func__.9261, %object
-	.size	__func__.9261, 22
-__func__.9261:
+	.type	__func__.9251, %object
+	.size	__func__.9251, 22
+__func__.9251:
 	.ascii	"List_update_data_list\000"
-	.section	.rodata.__func__.9270,"a",%progbits
+	.section	.rodata.__func__.9260,"a",%progbits
 	.set	.LANCHOR150,. + 0
-	.type	__func__.9270, %object
-	.size	__func__.9270, 16
-__func__.9270:
+	.type	__func__.9260, %object
+	.size	__func__.9260, 16
+__func__.9260:
 	.ascii	"load_l2p_region\000"
-	.section	.rodata.__func__.9303,"a",%progbits
+	.section	.rodata.__func__.9293,"a",%progbits
 	.set	.LANCHOR81,. + 0
-	.type	__func__.9303, %object
-	.size	__func__.9303, 26
-__func__.9303:
+	.type	__func__.9293, %object
+	.size	__func__.9293, 26
+__func__.9293:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.section	.rodata.__func__.9314,"a",%progbits
+	.section	.rodata.__func__.9304,"a",%progbits
 	.set	.LANCHOR151,. + 0
-	.type	__func__.9314, %object
-	.size	__func__.9314, 15
-__func__.9314:
+	.type	__func__.9304, %object
+	.size	__func__.9304, 15
+__func__.9304:
 	.ascii	"ftl_map_blk_gc\000"
-	.section	.rodata.__func__.9329,"a",%progbits
+	.section	.rodata.__func__.9319,"a",%progbits
 	.set	.LANCHOR148,. + 0
-	.type	__func__.9329, %object
-	.size	__func__.9329, 31
-__func__.9329:
+	.type	__func__.9319, %object
+	.size	__func__.9319, 31
+__func__.9319:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.section	.rodata.__func__.9343,"a",%progbits
+	.section	.rodata.__func__.9333,"a",%progbits
 	.set	.LANCHOR149,. + 0
-	.type	__func__.9343, %object
-	.size	__func__.9343, 16
-__func__.9343:
+	.type	__func__.9333, %object
+	.size	__func__.9333, 16
+__func__.9333:
 	.ascii	"FtlMapWritePage\000"
-	.section	.rodata.__func__.9368,"a",%progbits
+	.section	.rodata.__func__.9358,"a",%progbits
 	.set	.LANCHOR57,. + 0
-	.type	__func__.9368, %object
-	.size	__func__.9368, 22
-__func__.9368:
+	.type	__func__.9358, %object
+	.size	__func__.9358, 22
+__func__.9358:
 	.ascii	"select_l2p_ram_region\000"
-	.section	.rodata.__func__.9385,"a",%progbits
+	.section	.rodata.__func__.9375,"a",%progbits
 	.set	.LANCHOR153,. + 0
-	.type	__func__.9385, %object
-	.size	__func__.9385, 9
-__func__.9385:
+	.type	__func__.9375, %object
+	.size	__func__.9375, 9
+__func__.9375:
 	.ascii	"log2phys\000"
-	.section	.rodata.__func__.9449,"a",%progbits
+	.section	.rodata.__func__.9439,"a",%progbits
 	.set	.LANCHOR165,. + 0
-	.type	__func__.9449, %object
-	.size	__func__.9449, 15
-__func__.9449:
+	.type	__func__.9439, %object
+	.size	__func__.9439, 15
+__func__.9439:
 	.ascii	"FtlVpcTblFlush\000"
-	.section	.rodata.__func__.9471,"a",%progbits
+	.section	.rodata.__func__.9461,"a",%progbits
 	.set	.LANCHOR140,. + 0
-	.type	__func__.9471, %object
-	.size	__func__.9471, 14
-__func__.9471:
+	.type	__func__.9461, %object
+	.size	__func__.9461, 14
+__func__.9461:
 	.ascii	"FtlScanSysBlk\000"
-	.section	.rodata.__func__.9527,"a",%progbits
+	.section	.rodata.__func__.9517,"a",%progbits
 	.set	.LANCHOR178,. + 0
-	.type	__func__.9527, %object
-	.size	__func__.9527, 15
-__func__.9527:
+	.type	__func__.9517, %object
+	.size	__func__.9517, 15
+__func__.9517:
 	.ascii	"FtlLoadSysInfo\000"
-	.section	.rodata.__func__.9549,"a",%progbits
+	.section	.rodata.__func__.9539,"a",%progbits
 	.set	.LANCHOR180,. + 0
-	.type	__func__.9549, %object
-	.size	__func__.9549, 18
-__func__.9549:
+	.type	__func__.9539, %object
+	.size	__func__.9539, 18
+__func__.9539:
 	.ascii	"FtlMapTblRecovery\000"
-	.section	.rodata.__func__.9595,"a",%progbits
+	.section	.rodata.__func__.9585,"a",%progbits
 	.set	.LANCHOR154,. + 0
-	.type	__func__.9595, %object
-	.size	__func__.9595, 16
-__func__.9595:
+	.type	__func__.9585, %object
+	.size	__func__.9585, 16
+__func__.9585:
 	.ascii	"FtlReUsePrevPpa\000"
-	.section	.rodata.__func__.9629,"a",%progbits
+	.section	.rodata.__func__.9619,"a",%progbits
 	.set	.LANCHOR155,. + 0
-	.type	__func__.9629, %object
-	.size	__func__.9629, 22
-__func__.9629:
+	.type	__func__.9619, %object
+	.size	__func__.9619, 22
+__func__.9619:
 	.ascii	"FtlRecoverySuperblock\000"
-	.section	.rodata.__func__.9686,"a",%progbits
+	.section	.rodata.__func__.9676,"a",%progbits
 	.set	.LANCHOR60,. + 0
-	.type	__func__.9686, %object
-	.size	__func__.9686, 16
-__func__.9686:
+	.type	__func__.9676, %object
+	.size	__func__.9676, 16
+__func__.9676:
 	.ascii	"make_superblock\000"
-	.section	.rodata.__func__.9707,"a",%progbits
+	.section	.rodata.__func__.9697,"a",%progbits
 	.set	.LANCHOR136,. + 0
-	.type	__func__.9707, %object
-	.size	__func__.9707, 18
-__func__.9707:
+	.type	__func__.9697, %object
+	.size	__func__.9697, 18
+__func__.9697:
 	.ascii	"SupperBlkListInit\000"
-	.section	.rodata.__func__.9734,"a",%progbits
+	.section	.rodata.__func__.9724,"a",%progbits
 	.set	.LANCHOR159,. + 0
-	.type	__func__.9734, %object
-	.size	__func__.9734, 14
-__func__.9734:
+	.type	__func__.9724, %object
+	.size	__func__.9724, 14
+__func__.9724:
 	.ascii	"ftl_check_vpc\000"
-	.section	.rodata.__func__.9799,"a",%progbits
-	.set	.LANCHOR143,. + 0
-	.type	__func__.9799, %object
-	.size	__func__.9799, 25
-__func__.9799:
+	.section	.rodata.__func__.9789,"a",%progbits
+	.set	.LANCHOR144,. + 0
+	.type	__func__.9789, %object
+	.size	__func__.9789, 25
+__func__.9789:
 	.ascii	"allocate_data_superblock\000"
-	.section	.rodata.__func__.9820,"a",%progbits
+	.section	.rodata.__func__.9810,"a",%progbits
 	.set	.LANCHOR168,. + 0
-	.type	__func__.9820, %object
-	.size	__func__.9820, 29
-__func__.9820:
+	.type	__func__.9810, %object
+	.size	__func__.9810, 29
+__func__.9810:
 	.ascii	"allocate_new_data_superblock\000"
-	.section	.rodata.__func__.9827,"a",%progbits
+	.section	.rodata.__func__.9817,"a",%progbits
 	.set	.LANCHOR61,. + 0
-	.type	__func__.9827, %object
-	.size	__func__.9827, 19
-__func__.9827:
+	.type	__func__.9817, %object
+	.size	__func__.9817, 19
+__func__.9817:
 	.ascii	"get_new_active_ppa\000"
-	.section	.rodata.__func__.9840,"a",%progbits
+	.section	.rodata.__func__.9830,"a",%progbits
 	.set	.LANCHOR146,. + 0
-	.type	__func__.9840, %object
-	.size	__func__.9840, 16
-__func__.9840:
+	.type	__func__.9830, %object
+	.size	__func__.9830, 16
+__func__.9830:
 	.ascii	"update_vpc_list\000"
-	.section	.rodata.__func__.9847,"a",%progbits
+	.section	.rodata.__func__.9837,"a",%progbits
 	.set	.LANCHOR147,. + 0
-	.type	__func__.9847, %object
-	.size	__func__.9847, 20
-__func__.9847:
+	.type	__func__.9837, %object
+	.size	__func__.9837, 20
+__func__.9837:
 	.ascii	"decrement_vpc_count\000"
-	.section	.rodata.__func__.9917,"a",%progbits
+	.section	.rodata.__func__.9907,"a",%progbits
 	.set	.LANCHOR170,. + 0
-	.type	__func__.9917, %object
-	.size	__func__.9917, 19
-__func__.9917:
+	.type	__func__.9907, %object
+	.size	__func__.9907, 19
+__func__.9907:
 	.ascii	"FtlGcFreeTempBlock\000"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",%progbits,1
-.LC17:
+.LC21:
 	.ascii	"decrement_vpc_count %x = %d\012\000"
 	.section	.rodata.ftl_check_vpc.str1.1,"aMS",%progbits,1
-.LC25:
+.LC29:
 	.ascii	"...%s enter...\012\000"
-.LC26:
+.LC30:
 	.ascii	"FtlCheckVpc2 %x = %x  %x\012\000"
-.LC27:
+.LC31:
 	.ascii	"free blk vpc error %x = %x  %x\012\000"
 	.section	.rodata.ftl_map_blk_alloc_new_blk.str1.1,"aMS",%progbits,1
 .LC10:
 	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d\012\000"
 	.section	.rodata.ftl_scan_all_data.str1.1,"aMS",%progbits,1
-.LC28:
+.LC32:
 	.ascii	"ftl_scan_all_data = %x\012\000"
-.LC29:
+.LC33:
 	.ascii	"scan lpa = %x ppa= %x\012\000"
-.LC30:
+.LC34:
 	.ascii	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\012"
 	.ascii	"\000"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",%progbits,1
-.LC20:
+.LC24:
 	.ascii	"region_id = %x phyAddr = %x\012\000"
-.LC21:
-	.ascii	"spare:\000"
-.LC22:
+.LC25:
 	.ascii	"map_ppn:\000"
-.LC23:
+.LC26:
 	.ascii	"load_l2p_region refresh = %x phyAddr = %x\012\000"
+	.section	.rodata.rk_ftl_garbage_collect.str1.1,"aMS",%progbits,1
+.LC42:
+	.ascii	"g_gc_superblock_free %x %x %x %x %x\012\000"
+.LC43:
+	.ascii	"lpa=%x, ppa=%x\012\000"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",%progbits,1
 .LC2:
 	.ascii	"%s 0x%x:\000"
@@ -14632,6 +14688,6 @@ __func__.9917:
 .LC5:
 	.ascii	"\012\000"
 	.section	.rodata.sftl_init.str1.1,"aMS",%progbits,1
-.LC41:
-	.ascii	"SFTL version: 5.0.50 20181227\000"
+.LC49:
+	.ascii	"SFTL version: 5.0.50 20190215\000"
 	.hidden	free
diff --git a/drivers/rkflash/rk_sftl_arm_v8.S b/drivers/rkflash/rk_sftl_arm_v8.S
index d54b12f7b3..8298fdd27c 100644
--- a/drivers/rkflash/rk_sftl_arm_v8.S
+++ b/drivers/rkflash/rk_sftl_arm_v8.S
@@ -2,7 +2,7 @@
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:    GPL-2.0
- * date: 2018-12-27
+ * date: 2019-02-20
  */
 	.arch armv8-a+nosimd
 	.file	"rk_sftl.c"
@@ -545,105 +545,84 @@ IsInFreeQueue:
 insert_data_list:
 	adrp	x1, .LANCHOR5
 	and	w0, w0, 65535
-	ldrh	w14, [x1, #:lo12:.LANCHOR5]
-	cmp	w14, w0
-	bls	.L72
+	ldrh	w12, [x1, #:lo12:.LANCHOR5]
+	cmp	w12, w0
+	bls	.L58
 	adrp	x1, .LANCHOR40
-	mov	w3, 6
-	ldr	x6, [x1, #:lo12:.LANCHOR40]
-	umull	x13, w0, w3
+	mov	w8, 6
+	ldr	x4, [x1, #:lo12:.LANCHOR40]
+	umull	x10, w0, w8
 	mov	w1, -1
-	add	x5, x6, x13
-	strh	w1, [x5, 2]
-	strh	w1, [x6, x13]
+	add	x3, x4, x10
+	strh	w1, [x3, 2]
+	strh	w1, [x4, x10]
 	adrp	x1, .LANCHOR41
 	mov	x15, x1
-	ldr	x12, [x1, #:lo12:.LANCHOR41]
-	cbnz	x12, .L59
-	str	x5, [x1, #:lo12:.LANCHOR41]
-.L72:
+	ldr	x7, [x1, #:lo12:.LANCHOR41]
+	cbnz	x7, .L59
+	str	x3, [x1, #:lo12:.LANCHOR41]
+.L58:
 	mov	w0, 0
 	ret
 .L59:
-	stp	x29, x30, [sp, -32]!
 	adrp	x1, .LANCHOR42
-	ubfiz	x2, x0, 1, 16
-	mov	x4, -6148914691236517206
-	add	x29, sp, 0
-	ldr	x16, [x1, #:lo12:.LANCHOR42]
-	movk	x4, 0xaaab, lsl 0
-	ldrh	w1, [x5, 4]
-	mov	w8, -1
-	mov	w11, w8
-	stp	x19, x20, [sp, 16]
+	mov	x2, -6148914691236517206
+	movk	x2, 0xaaab, lsl 0
+	mov	w6, 0
+	ldr	x13, [x1, #:lo12:.LANCHOR42]
+	ubfiz	x1, x0, 1, 16
+	mov	w16, 65535
+	ldrh	w5, [x13, x1]
+	ldrh	w1, [x3, 4]
 	cmp	w1, 0
-	mov	w20, 65535
-	ldrh	w7, [x16, x2]
-	mul	w7, w7, w1
-	sub	x1, x12, x6
+	mul	w5, w5, w1
+	sub	x1, x7, x4
 	asr	x1, x1, 1
-	csel	w7, w7, w8, ne
-	mov	w8, w3
-	mul	x1, x1, x4
-	adrp	x4, .LANCHOR43
-	ldr	x17, [x4, #:lo12:.LANCHOR43]
+	csinv	w5, w5, wzr, ne
+	mul	x1, x1, x2
+	mov	x2, x7
 	and	w1, w1, 65535
-	mov	x4, x12
-	add	x10, x17, x2
-	mov	w2, 0
-.L67:
-	add	w2, w2, 1
-	and	w2, w2, 65535
-	cmp	w14, w2
+.L64:
+	add	w6, w6, 1
+	and	w6, w6, 65535
+	cmp	w12, w6
 	bcc	.L58
 	cmp	w1, w0
 	beq	.L58
-	ubfiz	x30, x1, 1, 16
-	ldrh	w19, [x4, 4]
-	cmp	w19, 0
-	ldrh	w3, [x16, x30]
-	mul	w3, w3, w19
-	csel	w3, w3, w11, ne
-	cmp	w7, w3
+	ldrh	w14, [x2, 4]
+	cbz	w14, .L62
+	ubfiz	x11, x1, 1, 16
+	ldrh	w11, [x13, x11]
+	mul	w11, w11, w14
+	cmp	w5, w11
+	bls	.L62
+	ldrh	w11, [x2]
+	cmp	w11, w16
 	bne	.L63
-	ldrh	w19, [x17, x30]
-	ldrh	w3, [x10]
-	cmp	w19, w3
-	bcc	.L65
-.L64:
-	strh	w1, [x6, x13]
-	cmp	x4, x12
-	ldrh	w1, [x4, 2]
-	strh	w1, [x5, 2]
-	bne	.L68
-	strh	w0, [x4, 2]
-	str	x5, [x15, #:lo12:.LANCHOR41]
+	strh	w1, [x3, 2]
+	strh	w0, [x2]
+	adrp	x0, .LANCHOR43
+	str	x3, [x0, #:lo12:.LANCHOR43]
 	b	.L58
 .L63:
-	bcc	.L64
+	umaddl	x2, w11, w8, x4
+	mov	w1, w11
+	b	.L64
+.L62:
+	strh	w1, [x4, x10]
+	cmp	x2, x7
+	ldrh	w1, [x2, 2]
+	strh	w1, [x3, 2]
+	bne	.L65
+	strh	w0, [x2, 2]
+	str	x3, [x15, #:lo12:.LANCHOR41]
+	b	.L58
 .L65:
-	ldrh	w3, [x4]
-	cmp	w3, w20
-	bne	.L66
-	strh	w1, [x5, 2]
-	strh	w0, [x4]
-	adrp	x0, .LANCHOR44
-	str	x5, [x0, #:lo12:.LANCHOR44]
-.L58:
-	mov	w0, 0
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	ret
-.L66:
-	umaddl	x4, w3, w8, x6
-	mov	w1, w3
-	b	.L67
-.L68:
-	ldrh	w1, [x4, 2]
-	mov	w2, 6
-	umull	x1, w1, w2
-	strh	w0, [x6, x1]
-	strh	w0, [x4, 2]
+	ldrh	w1, [x2, 2]
+	mov	w3, 6
+	umull	x1, w1, w3
+	strh	w0, [x4, x1]
+	strh	w0, [x2, 2]
 	b	.L58
 	.size	insert_data_list, .-insert_data_list
 	.section	.text.INSERT_DATA_LIST,"ax",@progbits
@@ -654,23 +633,23 @@ INSERT_DATA_LIST:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	insert_data_list
-	adrp	x1, .LANCHOR45
-	ldrh	w0, [x1, #:lo12:.LANCHOR45]
+	adrp	x1, .LANCHOR44
+	ldrh	w0, [x1, #:lo12:.LANCHOR44]
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	strh	w0, [x1, #:lo12:.LANCHOR45]
+	strh	w0, [x1, #:lo12:.LANCHOR44]
 	adrp	x1, .LANCHOR5
 	ldrh	w1, [x1, #:lo12:.LANCHOR5]
 	cmp	w1, w0
-	bcs	.L74
+	bcs	.L70
 	ldp	x29, x30, [sp], 16
 	mov	w2, 214
-	adrp	x1, .LANCHOR46
+	adrp	x1, .LANCHOR45
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR46
+	add	x1, x1, :lo12:.LANCHOR45
 	add	x0, x0, :lo12:.LC1
 	b	printf
-.L74:
+.L70:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
@@ -682,7 +661,7 @@ insert_free_list:
 	and	w0, w0, 65535
 	mov	w7, 65535
 	cmp	w0, w7
-	beq	.L78
+	beq	.L74
 	adrp	x1, .LANCHOR40
 	mov	w6, 6
 	ldr	x3, [x1, #:lo12:.LANCHOR40]
@@ -691,19 +670,19 @@ insert_free_list:
 	add	x4, x3, x8
 	strh	w1, [x4, 2]
 	strh	w1, [x3, x8]
-	adrp	x1, .LANCHOR47
+	adrp	x1, .LANCHOR46
 	mov	x12, x1
-	ldr	x5, [x1, #:lo12:.LANCHOR47]
-	cbnz	x5, .L79
-	str	x4, [x1, #:lo12:.LANCHOR47]
-.L78:
+	ldr	x5, [x1, #:lo12:.LANCHOR46]
+	cbnz	x5, .L75
+	str	x4, [x1, #:lo12:.LANCHOR46]
+.L74:
 	mov	w0, 0
 	ret
-.L79:
-	adrp	x1, .LANCHOR43
+.L75:
+	adrp	x1, .LANCHOR47
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
-	ldr	x11, [x1, #:lo12:.LANCHOR43]
+	ldr	x11, [x1, #:lo12:.LANCHOR47]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w13, [x11, x1]
 	sub	x1, x5, x3
@@ -711,37 +690,37 @@ insert_free_list:
 	mul	x1, x1, x2
 	mov	x2, x5
 	and	w1, w1, 65535
-.L82:
+.L78:
 	ubfiz	x10, x1, 1, 16
 	ldrh	w10, [x11, x10]
 	cmp	w10, w13
-	bcs	.L80
+	bcs	.L76
 	ldrh	w10, [x2]
 	cmp	w10, w7
-	bne	.L81
+	bne	.L77
 	strh	w1, [x4, 2]
 	strh	w0, [x2]
-	b	.L78
-.L81:
+	b	.L74
+.L77:
 	umaddl	x2, w10, w6, x3
 	mov	w1, w10
-	b	.L82
-.L80:
+	b	.L78
+.L76:
 	ldrh	w6, [x2, 2]
 	cmp	x2, x5
 	strh	w6, [x4, 2]
 	strh	w1, [x3, x8]
-	bne	.L83
+	bne	.L79
 	strh	w0, [x2, 2]
-	str	x4, [x12, #:lo12:.LANCHOR47]
-	b	.L78
-.L83:
+	str	x4, [x12, #:lo12:.LANCHOR46]
+	b	.L74
+.L79:
 	ldrh	w1, [x2, 2]
 	mov	w4, 6
 	umull	x1, w1, w4
 	strh	w0, [x3, x1]
 	strh	w0, [x2, 2]
-	b	.L78
+	b	.L74
 	.size	insert_free_list, .-insert_free_list
 	.section	.text.INSERT_FREE_LIST,"ax",@progbits
 	.align	2
@@ -759,7 +738,7 @@ INSERT_FREE_LIST:
 	adrp	x1, .LANCHOR5
 	ldrh	w1, [x1, #:lo12:.LANCHOR5]
 	cmp	w1, w0
-	bcs	.L84
+	bcs	.L80
 	ldp	x29, x30, [sp], 16
 	mov	w2, 207
 	adrp	x1, .LANCHOR49
@@ -767,7 +746,7 @@ INSERT_FREE_LIST:
 	add	x1, x1, :lo12:.LANCHOR49
 	add	x0, x0, :lo12:.LC1
 	b	printf
-.L84:
+.L80:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
@@ -791,26 +770,26 @@ List_remove_node:
 	add	x19, x23, x21
 	ldrh	w1, [x19, 2]
 	cmp	w1, w0
-	bne	.L88
+	bne	.L84
 	ldr	x0, [x22]
 	cmp	x19, x0
-	beq	.L88
+	beq	.L84
 	adrp	x1, .LANCHOR50
 	adrp	x0, .LC1
 	mov	w2, 372
 	add	x1, x1, :lo12:.LANCHOR50
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L88:
+.L84:
 	ldr	x0, [x22]
 	mov	w1, 65535
 	cmp	x19, x0
 	ldrh	w0, [x23, x21]
-	bne	.L89
+	bne	.L85
 	cmp	w0, w1
-	bne	.L90
+	bne	.L86
 	str	xzr, [x22]
-.L91:
+.L87:
 	mov	w0, -1
 	strh	w0, [x23, x21]
 	strh	w0, [x19, 2]
@@ -820,27 +799,27 @@ List_remove_node:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L90:
+.L86:
 	ldr	x1, [x20, #:lo12:.LANCHOR40]
 	mov	w2, 6
 	umaddl	x0, w0, w2, x1
 	mov	w1, -1
 	str	x0, [x22]
 	strh	w1, [x0, 2]
-	b	.L91
-.L89:
+	b	.L87
+.L85:
 	cmp	w0, w1
 	ldrh	w1, [x19, 2]
-	bne	.L92
+	bne	.L88
 	cmp	w1, w0
-	beq	.L91
+	beq	.L87
 	mov	w0, 6
 	mov	w2, -1
 	umull	x1, w1, w0
 	ldr	x0, [x20, #:lo12:.LANCHOR40]
 	strh	w2, [x0, x1]
-	b	.L91
-.L92:
+	b	.L87
+.L88:
 	ldr	x2, [x20, #:lo12:.LANCHOR40]
 	mov	w3, 6
 	umaddl	x4, w0, w3, x2
@@ -848,7 +827,7 @@ List_remove_node:
 	ldrh	w1, [x19, 2]
 	umull	x1, w1, w3
 	strh	w0, [x2, x1]
-	b	.L91
+	b	.L87
 	.size	List_remove_node, .-List_remove_node
 	.section	.text.List_pop_index_node,"ax",@progbits
 	.align	2
@@ -856,7 +835,7 @@ List_remove_node:
 	.type	List_pop_index_node, %function
 List_pop_index_node:
 	ldr	x2, [x0]
-	cbz	x2, .L100
+	cbz	x2, .L96
 	stp	x29, x30, [sp, -32]!
 	adrp	x3, .LANCHOR40
 	and	w1, w1, 65535
@@ -865,9 +844,9 @@ List_pop_index_node:
 	str	x19, [sp, 16]
 	mov	w5, 6
 	ldr	x19, [x3, #:lo12:.LANCHOR40]
-.L96:
-	cbnz	w1, .L97
-.L99:
+.L92:
+	cbnz	w1, .L93
+.L95:
 	sub	x19, x2, x19
 	mov	x2, -6148914691236517206
 	asr	x19, x19, 1
@@ -880,15 +859,15 @@ List_pop_index_node:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L97:
+.L93:
 	ldrh	w3, [x2]
 	cmp	w3, w4
-	beq	.L99
+	beq	.L95
 	sub	w1, w1, #1
 	umaddl	x2, w3, w5, x19
 	and	w1, w1, 65535
-	b	.L96
-.L100:
+	b	.L92
+.L96:
 	mov	w0, 65535
 	ret
 	.size	List_pop_index_node, .-List_pop_index_node
@@ -908,26 +887,26 @@ List_get_gc_head_node:
 	and	w2, w0, 65535
 	adrp	x0, .LANCHOR41
 	ldr	x1, [x0, #:lo12:.LANCHOR41]
-	cbz	x1, .L111
+	cbz	x1, .L107
 	adrp	x0, .LANCHOR40
 	mov	w4, 6
 	ldr	x3, [x0, #:lo12:.LANCHOR40]
 	mov	w0, 65535
-.L108:
-	cbz	w2, .L109
+.L104:
+	cbz	w2, .L105
 	ldrh	w1, [x1]
 	cmp	w1, w0
-	bne	.L110
+	bne	.L106
 	ret
-.L110:
+.L106:
 	sub	w2, w2, #1
 	umaddl	x1, w1, w4, x3
 	and	w2, w2, 65535
-	b	.L108
-.L111:
+	b	.L104
+.L107:
 	mov	w0, 65535
 	ret
-.L109:
+.L105:
 	sub	x0, x1, x3
 	mov	x1, -6148914691236517206
 	asr	x0, x0, 1
@@ -951,15 +930,15 @@ List_update_data_list:
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	stp	x25, x26, [sp, 64]
 	cmp	w0, w19
-	beq	.L114
+	beq	.L110
 	adrp	x0, .LANCHOR52
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
-	beq	.L114
+	beq	.L110
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w19
-	beq	.L114
+	beq	.L110
 	adrp	x0, .LANCHOR40
 	mov	w21, 6
 	adrp	x24, .LANCHOR41
@@ -969,7 +948,7 @@ List_update_data_list:
 	ldr	x1, [x24, #:lo12:.LANCHOR41]
 	add	x22, x23, x21
 	cmp	x22, x1
-	beq	.L114
+	beq	.L110
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x19, 1, 16
 	mov	x25, x1
@@ -982,25 +961,25 @@ List_update_data_list:
 	ldrh	w0, [x22, 2]
 	csinv	w20, w20, wzr, ne
 	cmp	w0, w1
-	bne	.L117
+	bne	.L113
 	ldrh	w1, [x23, x21]
 	cmp	w1, w0
-	bne	.L117
+	bne	.L113
 	adrp	x1, .LANCHOR54
 	adrp	x0, .LC1
 	mov	w2, 463
 	add	x1, x1, :lo12:.LANCHOR54
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L117:
+.L113:
 	ldrh	w0, [x22, 2]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L118
+	bne	.L114
 	ldrh	w1, [x23, x21]
 	cmp	w1, w0
-	beq	.L114
-.L118:
+	beq	.L110
+.L114:
 	mov	w1, 6
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
@@ -1016,26 +995,26 @@ List_update_data_list:
 	mul	w0, w1, w2
 	csinv	w0, w0, wzr, ne
 	cmp	w20, w0
-	bcs	.L114
-	adrp	x20, .LANCHOR45
+	bcs	.L110
+	adrp	x20, .LANCHOR44
 	mov	w1, w19
 	add	x0, x24, :lo12:.LANCHOR41
 	bl	List_remove_node
-	ldrh	w0, [x20, #:lo12:.LANCHOR45]
-	cbnz	w0, .L120
+	ldrh	w0, [x20, #:lo12:.LANCHOR44]
+	cbnz	w0, .L116
 	adrp	x1, .LANCHOR54
 	adrp	x0, .LC1
 	mov	w2, 474
 	add	x1, x1, :lo12:.LANCHOR54
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L120:
-	ldrh	w0, [x20, #:lo12:.LANCHOR45]
+.L116:
+	ldrh	w0, [x20, #:lo12:.LANCHOR44]
 	sub	w0, w0, #1
-	strh	w0, [x20, #:lo12:.LANCHOR45]
+	strh	w0, [x20, #:lo12:.LANCHOR44]
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-.L114:
+.L110:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -1058,72 +1037,72 @@ select_l2p_ram_region:
 	adrp	x0, .LANCHOR55
 	str	x19, [sp, 16]
 	ldr	x0, [x0, #:lo12:.LANCHOR55]
-.L125:
+.L121:
 	and	w19, w1, 65535
 	cmp	w19, w2
-	bcc	.L127
+	bcc	.L123
 	add	x3, x0, 4
 	mov	w19, w2
 	mov	w5, -2147483648
 	mov	w1, 0
-.L128:
+.L124:
 	cmp	w1, w2
-	bne	.L130
+	bne	.L126
 	cmp	w19, w2
-	bcc	.L126
+	bcc	.L122
 	adrp	x1, .LANCHOR56
 	mov	w19, w2
 	mov	w3, -1
 	ldrh	w4, [x1, #:lo12:.LANCHOR56]
 	mov	w1, 0
-.L131:
+.L127:
 	cmp	w1, w2
-	bne	.L133
+	bne	.L129
 	cmp	w19, w1
-	bcc	.L126
+	bcc	.L122
 	mov	w2, 789
 	adrp	x1, .LANCHOR57
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR57
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	b	.L126
-.L127:
+	b	.L122
+.L123:
 	add	x1, x1, 1
 	add	x4, x0, x1, lsl 4
 	ldrh	w4, [x4, -16]
 	cmp	w4, w3
-	bne	.L125
-.L126:
+	bne	.L121
+.L122:
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L130:
+.L126:
 	ldr	w4, [x3]
-	tbnz	w4, #31, .L129
+	tbnz	w4, #31, .L125
 	cmp	w5, w4
-	bls	.L129
+	bls	.L125
 	mov	w5, w4
 	mov	w19, w1
-.L129:
+.L125:
 	add	w1, w1, 1
 	add	x3, x3, 16
 	and	w1, w1, 65535
-	b	.L128
-.L133:
+	b	.L124
+.L129:
 	ldr	w6, [x0, 4]
 	cmp	w3, w6
-	bls	.L132
+	bls	.L128
 	ldrh	w5, [x0]
 	cmp	w5, w4
 	csel	w3, w3, w6, eq
 	csel	w19, w19, w1, eq
-.L132:
+.L128:
 	add	w1, w1, 1
 	add	x0, x0, 16
 	and	w1, w1, 65535
-	b	.L131
+	b	.L127
 	.size	select_l2p_ram_region, .-select_l2p_ram_region
 	.section	.text.FtlUpdateVaildLpn,"ax",@progbits
 	.align	2
@@ -1134,12 +1113,12 @@ FtlUpdateVaildLpn:
 	mov	x3, x2
 	ldrh	w1, [x2, #:lo12:.LANCHOR58]
 	cmp	w1, 4
-	bhi	.L136
-	cbnz	w0, .L136
+	bhi	.L132
+	cbnz	w0, .L132
 	add	w1, w1, 1
 	strh	w1, [x2, #:lo12:.LANCHOR58]
 	ret
-.L136:
+.L132:
 	adrp	x1, .LANCHOR5
 	adrp	x0, .LANCHOR59
 	strh	wzr, [x3, #:lo12:.LANCHOR58]
@@ -1151,22 +1130,22 @@ FtlUpdateVaildLpn:
 	ldr	x6, [x1, #:lo12:.LANCHOR42]
 	mov	w7, 65535
 	mov	x1, 0
-.L137:
+.L133:
 	cmp	w5, w1, uxth
-	bhi	.L139
-	cbz	w3, .L135
+	bhi	.L135
+	cbz	w3, .L131
 	str	w2, [x0, #:lo12:.LANCHOR59]
-.L135:
+.L131:
 	ret
-.L139:
+.L135:
 	ldrh	w4, [x6, x1, lsl 1]
 	cmp	w4, w7
-	beq	.L138
+	beq	.L134
 	add	w2, w2, w4
 	mov	w3, 1
-.L138:
+.L134:
 	add	x1, x1, 1
-	b	.L137
+	b	.L133
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
 	.section	.text.ftl_set_blk_mode,"ax",@progbits
 	.align	2
@@ -1174,9 +1153,9 @@ FtlUpdateVaildLpn:
 	.type	ftl_set_blk_mode, %function
 ftl_set_blk_mode:
 	and	w0, w0, 65535
-	cbz	w1, .L146
+	cbz	w1, .L142
 	b	ftl_set_blk_mode.part.6
-.L146:
+.L142:
 	adrp	x1, .LANCHOR1
 	ubfx	x2, x0, 5, 11
 	lsl	x2, x2, 2
@@ -1216,9 +1195,9 @@ ftl_sb_update_avl_pages:
 	add	x4, x0, x4
 	ldrh	w3, [x1, #:lo12:.LANCHOR3]
 	mov	w1, 65535
-.L149:
+.L145:
 	cmp	w2, w3
-	bcc	.L151
+	bcc	.L147
 	adrp	x1, .LANCHOR19
 	ubfiz	x3, x3, 1, 16
 	add	x3, x3, 16
@@ -1229,32 +1208,32 @@ ftl_sb_update_avl_pages:
 	sub	w1, w1, #1
 	and	w1, w1, 65535
 	sub	w1, w1, w6
-.L152:
+.L148:
 	cmp	x2, x3
-	bne	.L154
+	bne	.L150
 	ret
-.L151:
+.L147:
 	ldrh	w5, [x4]
 	cmp	w5, w1
-	beq	.L150
+	beq	.L146
 	ldrh	w5, [x0, 4]
 	add	w5, w5, 1
 	strh	w5, [x0, 4]
-.L150:
+.L146:
 	add	w2, w2, 1
 	add	x4, x4, 2
 	and	w2, w2, 65535
-	b	.L149
-.L154:
+	b	.L145
+.L150:
 	ldrh	w4, [x2]
 	cmp	w4, w5
-	beq	.L153
+	beq	.L149
 	ldrh	w4, [x0, 4]
 	add	w4, w1, w4
 	strh	w4, [x0, 4]
-.L153:
+.L149:
 	add	x2, x2, 2
-	b	.L152
+	b	.L148
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
 	.section	.text.FtlSlcSuperblockCheck,"ax",@progbits
 	.align	2
@@ -1262,38 +1241,38 @@ ftl_sb_update_avl_pages:
 	.type	FtlSlcSuperblockCheck, %function
 FtlSlcSuperblockCheck:
 	ldrh	w1, [x0, 4]
-	cbz	w1, .L155
+	cbz	w1, .L151
 	ldrh	w2, [x0]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L155
+	beq	.L151
 	ldrb	w2, [x0, 6]
 	add	x2, x2, 8
 	ldrh	w3, [x0, x2, lsl 1]
 	adrp	x2, .LANCHOR3
 	ldrh	w4, [x2, #:lo12:.LANCHOR3]
 	mov	w2, w1
-.L158:
+.L154:
 	cmp	w3, w2
-	beq	.L160
-.L155:
+	beq	.L156
+.L151:
 	ret
-.L160:
+.L156:
 	ldrb	w1, [x0, 6]
 	add	w1, w1, 1
 	and	w1, w1, 255
 	strb	w1, [x0, 6]
 	cmp	w1, w4
-	bne	.L159
+	bne	.L155
 	ldrh	w1, [x0, 2]
 	strb	wzr, [x0, 6]
 	add	w1, w1, 1
 	strh	w1, [x0, 2]
-.L159:
+.L155:
 	ldrb	w1, [x0, 6]
 	add	x1, x1, 8
 	ldrh	w3, [x0, x1, lsl 1]
-	b	.L158
+	b	.L154
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
 	.section	.text.make_superblock,"ax",@progbits
 	.align	2
@@ -1308,14 +1287,14 @@ make_superblock:
 	adrp	x0, .LANCHOR5
 	ldrh	w0, [x0, #:lo12:.LANCHOR5]
 	cmp	w1, w0
-	bcc	.L162
+	bcc	.L158
 	adrp	x1, .LANCHOR60
 	adrp	x0, .LC1
-	mov	w2, 2156
+	mov	w2, 2148
 	add	x1, x1, :lo12:.LANCHOR60
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L162:
+.L158:
 	adrp	x0, .LANCHOR3
 	adrp	x7, .LANCHOR13
 	add	x6, x19, 16
@@ -1325,35 +1304,45 @@ make_superblock:
 	strh	wzr, [x19, 4]
 	mov	w10, -1
 	strb	wzr, [x19, 7]
-.L163:
+.L159:
 	cmp	w8, w5, uxth
-	bhi	.L165
+	bhi	.L161
 	adrp	x1, .LANCHOR19
 	ldrb	w0, [x19, 7]
 	strb	wzr, [x19, 9]
 	ldrh	w1, [x1, #:lo12:.LANCHOR19]
 	mul	w0, w0, w1
+	ldrh	w1, [x19]
 	strh	w0, [x19, 4]
+	adrp	x0, .LANCHOR47
+	ldr	x0, [x0, #:lo12:.LANCHOR47]
+	ldrh	w1, [x0, x1, lsl 1]
+	mov	w0, 10000
+	cmp	w1, w0
+	bls	.L162
+	mov	w0, 1
+	strb	w0, [x19, 9]
+.L162:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L165:
+.L161:
 	ldrh	w1, [x19]
 	ldrb	w0, [x7, x5]
 	bl	V2P_block
 	mov	w4, w0
 	strh	w10, [x6]
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L164
+	cbnz	w0, .L160
 	strh	w4, [x6]
 	ldrb	w0, [x19, 7]
 	add	w0, w0, 1
 	strb	w0, [x19, 7]
-.L164:
+.L160:
 	add	x5, x5, 1
 	add	x6, x6, 2
-	b	.L163
+	b	.L159
 	.size	make_superblock, .-make_superblock
 	.section	.text.update_multiplier_value,"ax",@progbits
 	.align	2
@@ -1370,11 +1359,11 @@ update_multiplier_value:
 	add	x8, x8, :lo12:.LANCHOR13
 	ldrh	w11, [x0, #:lo12:.LANCHOR19]
 	cmp	w10, w7, uxth
-	bhi	.L179
-	cbz	w5, .L177
+	bhi	.L176
+	cbz	w5, .L174
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.L178:
+.L175:
 	adrp	x0, .LANCHOR40
 	mov	w1, 6
 	ldr	x0, [x0, #:lo12:.LANCHOR40]
@@ -1382,31 +1371,31 @@ update_multiplier_value:
 	mov	w0, 0
 	strh	w5, [x6, 4]
 	ret
-.L172:
+.L169:
 	mov	w5, 0
-	b	.L171
-.L177:
+	b	.L168
+.L174:
 	mov	w5, 0
-	b	.L178
-.L179:
+	b	.L175
+.L176:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
-.L170:
+.L167:
 	ldrb	w0, [x8, x7]
 	mov	w1, w6
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L169
+	cbnz	w0, .L166
 	add	w5, w5, w11
 	and	w5, w5, 65535
-.L169:
+.L166:
 	add	x7, x7, 1
 	cmp	w10, w7, uxth
-	bhi	.L170
-	cbz	w5, .L172
+	bhi	.L167
+	cbz	w5, .L169
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.L171:
+.L168:
 	adrp	x0, .LANCHOR40
 	mov	w1, 6
 	ldr	x0, [x0, #:lo12:.LANCHOR40]
@@ -1421,9 +1410,9 @@ update_multiplier_value:
 	.global	GetFreeBlockMinEraseCount
 	.type	GetFreeBlockMinEraseCount, %function
 GetFreeBlockMinEraseCount:
-	adrp	x0, .LANCHOR47
-	ldr	x0, [x0, #:lo12:.LANCHOR47]
-	cbz	x0, .L182
+	adrp	x0, .LANCHOR46
+	ldr	x0, [x0, #:lo12:.LANCHOR46]
+	cbz	x0, .L179
 	adrp	x1, .LANCHOR40
 	ldr	x1, [x1, #:lo12:.LANCHOR40]
 	sub	x0, x0, x1
@@ -1431,12 +1420,12 @@ GetFreeBlockMinEraseCount:
 	asr	x0, x0, 1
 	movk	x1, 0xaaab, lsl 0
 	mul	x0, x0, x1
-	adrp	x1, .LANCHOR43
-	ldr	x1, [x1, #:lo12:.LANCHOR43]
+	adrp	x1, .LANCHOR47
+	ldr	x1, [x1, #:lo12:.LANCHOR47]
 	and	x0, x0, 65535
 	ldrh	w0, [x1, x0, lsl 1]
 	ret
-.L182:
+.L179:
 	mov	w0, 0
 	ret
 	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
@@ -1445,10 +1434,10 @@ GetFreeBlockMinEraseCount:
 	.global	GetFreeBlockMaxEraseCount
 	.type	GetFreeBlockMaxEraseCount, %function
 GetFreeBlockMaxEraseCount:
-	adrp	x1, .LANCHOR47
+	adrp	x1, .LANCHOR46
 	and	w0, w0, 65535
-	ldr	x1, [x1, #:lo12:.LANCHOR47]
-	cbz	x1, .L190
+	ldr	x1, [x1, #:lo12:.LANCHOR46]
+	cbz	x1, .L187
 	adrp	x2, .LANCHOR48
 	mov	w3, 7
 	mov	w5, 6
@@ -1467,25 +1456,25 @@ GetFreeBlockMaxEraseCount:
 	mul	x1, x1, x2
 	mov	w2, 0
 	and	w1, w1, 65535
-.L186:
+.L183:
 	cmp	w0, w2
-	beq	.L189
+	beq	.L186
 	umull	x4, w1, w5
 	ldrh	w4, [x3, x4]
 	cmp	w4, w6
-	bne	.L187
-.L189:
-	adrp	x0, .LANCHOR43
+	bne	.L184
+.L186:
+	adrp	x0, .LANCHOR47
 	ubfiz	x1, x1, 1, 16
-	ldr	x0, [x0, #:lo12:.LANCHOR43]
+	ldr	x0, [x0, #:lo12:.LANCHOR47]
 	ldrh	w0, [x0, x1]
 	ret
-.L187:
+.L184:
 	add	w2, w2, 1
 	mov	w1, w4
 	and	w2, w2, 65535
-	b	.L186
-.L190:
+	b	.L183
+.L187:
 	mov	w0, 0
 	ret
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
@@ -1497,7 +1486,7 @@ free_data_superblock:
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L194
+	beq	.L191
 	stp	x29, x30, [sp, -16]!
 	adrp	x2, .LANCHOR42
 	ubfiz	x1, x0, 1, 16
@@ -1508,7 +1497,7 @@ free_data_superblock:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L194:
+.L191:
 	mov	w0, 0
 	ret
 	.size	free_data_superblock, .-free_data_superblock
@@ -1525,101 +1514,106 @@ get_new_active_ppa:
 	mov	w0, 65535
 	str	x21, [sp, 32]
 	cmp	w1, w0
-	bne	.L198
+	bne	.L195
 	adrp	x1, .LANCHOR61
 	adrp	x0, .LC1
-	mov	w2, 2786
+	mov	w2, 2781
 	add	x1, x1, :lo12:.LANCHOR61
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L198:
-	adrp	x20, .LANCHOR19
+.L195:
+	adrp	x21, .LANCHOR19
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x20, #:lo12:.LANCHOR19]
+	ldrh	w0, [x21, #:lo12:.LANCHOR19]
 	cmp	w1, w0
-	bne	.L199
+	bne	.L196
 	adrp	x1, .LANCHOR61
 	adrp	x0, .LC1
-	mov	w2, 2787
+	mov	w2, 2782
 	add	x1, x1, :lo12:.LANCHOR61
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L199:
+.L196:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L200
+	cbnz	w0, .L197
 	adrp	x1, .LANCHOR61
 	adrp	x0, .LC1
-	mov	w2, 2788
+	mov	w2, 2783
 	add	x1, x1, :lo12:.LANCHOR61
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L200:
+.L197:
 	ldrb	w0, [x19, 6]
 	adrp	x1, .LANCHOR3
 	strb	wzr, [x19, 10]
 	add	x0, x0, 8
-	ldrh	w2, [x1, #:lo12:.LANCHOR3]
+	ldrh	w3, [x1, #:lo12:.LANCHOR3]
 	mov	w1, 65535
 	ldrh	w0, [x19, x0, lsl 1]
-.L201:
+.L198:
 	cmp	w0, w1
-	beq	.L203
-	ldrh	w21, [x19, 2]
-	mov	w3, 65535
+	beq	.L200
+	ldrh	w20, [x19, 2]
+	ldrh	w2, [x21, #:lo12:.LANCHOR19]
+	cmp	w20, w2
+	bcs	.L204
 	ldrh	w1, [x19, 4]
-	orr	w21, w21, w0, lsl 10
+	orr	w20, w20, w0, lsl 10
 	ldrb	w0, [x19, 6]
+	mov	w4, 65535
 	sub	w1, w1, #1
 	and	w1, w1, 65535
 	strh	w1, [x19, 4]
-.L205:
+.L203:
 	add	w0, w0, 1
 	and	w0, w0, 255
-	cmp	w2, w0
-	bne	.L204
+	cmp	w3, w0
+	bne	.L202
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
 	mov	w0, 0
-.L204:
-	add	x4, x19, x0, sxtw 1
-	ldrh	w4, [x4, 16]
-	cmp	w4, w3
-	beq	.L205
+.L202:
+	add	x5, x19, x0, sxtw 1
+	ldrh	w5, [x5, 16]
+	cmp	w5, w4
+	beq	.L203
 	strb	w0, [x19, 6]
-	ldrh	w2, [x19, 2]
-	ldrh	w0, [x20, #:lo12:.LANCHOR19]
-	cmp	w2, w0
-	bne	.L197
-	cbz	w1, .L197
+	ldrh	w0, [x19, 2]
+	cmp	w0, w2
+	bne	.L194
+	cbz	w1, .L194
 	adrp	x1, .LANCHOR61
 	adrp	x0, .LC1
-	mov	w2, 2809
+	mov	w2, 2806
 	add	x1, x1, :lo12:.LANCHOR61
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L197:
-	mov	w0, w21
+.L194:
+	mov	w0, w20
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L203:
+.L200:
 	ldrb	w0, [x19, 6]
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x19, 6]
-	cmp	w0, w2
-	bne	.L202
+	cmp	w0, w3
+	bne	.L199
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L202:
+.L199:
 	ldrb	w0, [x19, 6]
 	add	x0, x0, 8
 	ldrh	w0, [x19, x0, lsl 1]
-	b	.L201
+	b	.L198
+.L204:
+	mov	w20, 65535
+	b	.L194
 	.size	get_new_active_ppa, .-get_new_active_ppa
 	.section	.text.FtlGcBufInit,"ax",@progbits
 	.align	2
@@ -1650,21 +1644,21 @@ FtlGcBufInit:
 	add	x4, x4, 8
 	mov	w1, 0
 	mov	w16, 1
-.L213:
+.L211:
 	add	w13, w2, w10
 	add	w12, w1, w11
 	cmp	x3, x8
-	bne	.L214
+	bne	.L212
 	adrp	x1, .LANCHOR67
 	ldr	x7, [x7, #:lo12:.LANCHOR64]
 	ldr	x6, [x6, #:lo12:.LANCHOR65]
 	mov	w8, 24
 	ldr	w4, [x1, #:lo12:.LANCHOR67]
-.L215:
+.L213:
 	cmp	w0, w4
-	bcc	.L216
+	bcc	.L214
 	ret
-.L214:
+.L212:
 	asr	w2, w2, 2
 	asr	w1, w1, 2
 	add	x2, x14, x2, sxtw 2
@@ -1676,8 +1670,8 @@ FtlGcBufInit:
 	add	x4, x4, 32
 	mov	w1, w12
 	mov	w2, w13
-	b	.L213
-.L216:
+	b	.L211
+.L214:
 	umull	x3, w0, w8
 	mul	w1, w10, w0
 	add	x2, x5, x3
@@ -1691,7 +1685,7 @@ FtlGcBufInit:
 	asr	w1, w1, 2
 	add	x1, x6, x1, sxtw 2
 	str	x1, [x2, 8]
-	b	.L215
+	b	.L213
 	.size	FtlGcBufInit, .-FtlGcBufInit
 	.section	.text.FtlGcBufFree,"ax",@progbits
 	.align	2
@@ -1704,31 +1698,31 @@ FtlGcBufFree:
 	ldr	w7, [x2, #:lo12:.LANCHOR67]
 	adrp	x2, .LANCHOR63
 	ldr	x5, [x2, #:lo12:.LANCHOR63]
-.L218:
+.L216:
 	cmp	w3, w1
-	bcs	.L217
+	bcs	.L215
 	ubfiz	x4, x3, 5, 16
 	mov	w2, 0
 	add	x4, x0, x4
-	b	.L223
-.L219:
+	b	.L221
+.L217:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-.L223:
+.L221:
 	cmp	w2, w7
-	bcs	.L220
+	bcs	.L218
 	umull	x6, w2, w8
 	add	x10, x5, x6
 	ldr	x11, [x5, x6]
 	ldr	x6, [x4, 8]
 	cmp	x11, x6
-	bne	.L219
+	bne	.L217
 	str	wzr, [x10, 16]
-.L220:
+.L218:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L218
-.L217:
+	b	.L216
+.L215:
 	ret
 	.size	FtlGcBufFree, .-FtlGcBufFree
 	.section	.text.FtlGcBufAlloc,"ax",@progbits
@@ -1743,31 +1737,31 @@ FtlGcBufAlloc:
 	ldr	w5, [x2, #:lo12:.LANCHOR67]
 	adrp	x2, .LANCHOR63
 	ldr	x6, [x2, #:lo12:.LANCHOR63]
-.L225:
+.L223:
 	cmp	w3, w1
-	bcs	.L224
+	bcs	.L222
 	mov	w2, 0
-	b	.L230
-.L226:
+	b	.L228
+.L224:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-.L230:
+.L228:
 	cmp	w2, w5
-	bcs	.L227
+	bcs	.L225
 	umaddl	x4, w2, w7, x6
 	ldr	w10, [x4, 16]
-	cbnz	w10, .L226
+	cbnz	w10, .L224
 	ubfiz	x2, x3, 5, 16
 	ldr	x10, [x4]
 	add	x2, x0, x2
 	str	w8, [x4, 16]
 	ldr	x4, [x4, 8]
 	stp	x10, x4, [x2, 8]
-.L227:
+.L225:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L225
-.L224:
+	b	.L223
+.L222:
 	ret
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
 	.section	.text.IsBlkInGcList,"ax",@progbits
@@ -1781,17 +1775,17 @@ IsBlkInGcList:
 	adrp	x1, .LANCHOR69
 	ldr	x3, [x1, #:lo12:.LANCHOR69]
 	mov	x1, 0
-.L232:
+.L230:
 	cmp	w2, w1, uxth
-	bhi	.L234
+	bhi	.L232
 	mov	w0, 0
 	ret
-.L234:
+.L232:
 	add	x1, x1, 1
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w0
-	bne	.L232
+	bne	.L230
 	mov	w0, 1
 	ret
 	.size	IsBlkInGcList, .-IsBlkInGcList
@@ -1813,24 +1807,24 @@ FtlGcUpdatePage:
 	mov	x3, 0
 	ldrh	w1, [x4, #:lo12:.LANCHOR68]
 	ldr	x5, [x2, #:lo12:.LANCHOR69]
-.L237:
+.L235:
 	and	w2, w3, 65535
 	cmp	w2, w1
-	bcc	.L239
-	bne	.L238
+	bcc	.L237
+	bne	.L236
 	and	x3, x3, 65535
 	strh	w0, [x5, x3, lsl 1]
 	ldrh	w0, [x4, #:lo12:.LANCHOR68]
 	add	w0, w0, 1
 	strh	w0, [x4, #:lo12:.LANCHOR68]
-	b	.L238
-.L239:
+	b	.L236
+.L237:
 	add	x3, x3, 1
 	add	x2, x5, x3, lsl 1
 	ldrh	w2, [x2, -2]
 	cmp	w2, w7
-	bne	.L237
-.L238:
+	bne	.L235
+.L236:
 	adrp	x4, .LANCHOR70
 	adrp	x1, .LANCHOR71
 	mov	w3, 12
@@ -1854,23 +1848,23 @@ FtlGcRefreshBlock:
 	and	w0, w0, 65535
 	ldrh	w5, [x4, #:lo12:.LANCHOR72]
 	cmp	w5, w0
-	beq	.L242
+	beq	.L240
 	adrp	x1, .LANCHOR73
 	ldrh	w3, [x1, #:lo12:.LANCHOR73]
 	cmp	w0, w3
-	beq	.L242
+	beq	.L240
 	mov	w2, 65535
 	cmp	w5, w2
-	bne	.L243
+	bne	.L241
 	strh	w0, [x4, #:lo12:.LANCHOR72]
-.L242:
+.L240:
 	mov	w0, 0
 	ret
-.L243:
+.L241:
 	cmp	w3, w2
-	bne	.L242
+	bne	.L240
 	strh	w0, [x1, #:lo12:.LANCHOR73]
-	b	.L242
+	b	.L240
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
 	.section	.text.FtlGcMarkBadPhyBlk,"ax",@progbits
 	.align	2
@@ -1888,24 +1882,24 @@ FtlGcMarkBadPhyBlk:
 	add	x3, x3, :lo12:.LANCHOR75
 	mov	x2, 0
 	ldrh	w0, [x1, #:lo12:.LANCHOR74]
-.L245:
+.L243:
 	cmp	w0, w2, uxth
-	bhi	.L247
+	bhi	.L245
 	cmp	w0, 15
-	bhi	.L246
+	bhi	.L244
 	add	w2, w0, 1
 	strh	w2, [x1, #:lo12:.LANCHOR74]
 	adrp	x1, .LANCHOR75
 	add	x1, x1, :lo12:.LANCHOR75
 	strh	w6, [x1, w0, sxtw 1]
-	b	.L246
-.L247:
+	b	.L244
+.L245:
 	add	x2, x2, 1
 	add	x4, x3, x2, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w6
-	bne	.L245
-.L246:
+	bne	.L243
+.L244:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
@@ -1917,20 +1911,20 @@ FtlGcMarkBadPhyBlk:
 FtlGcReFreshBadBlk:
 	adrp	x0, .LANCHOR74
 	ldrh	w0, [x0, #:lo12:.LANCHOR74]
-	cbz	w0, .L256
+	cbz	w0, .L254
 	adrp	x1, .LANCHOR72
 	ldrh	w2, [x1, #:lo12:.LANCHOR72]
 	mov	w1, 65535
 	cmp	w2, w1
-	bne	.L256
+	bne	.L254
 	stp	x29, x30, [sp, -16]!
 	adrp	x6, .LANCHOR76
 	add	x29, sp, 0
 	ldrh	w1, [x6, #:lo12:.LANCHOR76]
 	cmp	w1, w0
-	bcc	.L251
+	bcc	.L249
 	strh	wzr, [x6, #:lo12:.LANCHOR76]
-.L251:
+.L249:
 	ldrh	w1, [x6, #:lo12:.LANCHOR76]
 	adrp	x0, .LANCHOR75
 	add	x0, x0, :lo12:.LANCHOR75
@@ -1943,7 +1937,7 @@ FtlGcReFreshBadBlk:
 	strh	w0, [x6, #:lo12:.LANCHOR76]
 	mov	w0, 0
 	ret
-.L256:
+.L254:
 	mov	w0, 0
 	ret
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
@@ -1987,9 +1981,9 @@ rknand_print_hex:
 	mov	x19, 0
 	mov	w20, 0
 	adrp	x26, .LC3
-.L262:
+.L260:
 	cmp	w27, w19
-	bhi	.L268
+	bhi	.L266
 	ldp	x19, x20, [sp, 16]
 	adrp	x0, .LC5
 	ldp	x21, x22, [sp, 32]
@@ -1999,40 +1993,40 @@ rknand_print_hex:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	printf
-.L268:
-	cbnz	w20, .L263
+.L266:
+	cbnz	w20, .L261
 	mov	w2, w21
 	mov	x1, x28
 	mov	x0, x24
 	bl	printf
-.L263:
+.L261:
 	cmp	w23, 4
-	bne	.L264
+	bne	.L262
 	ldr	w1, [x22, x19, lsl 2]
-.L271:
+.L269:
 	add	x0, x26, :lo12:.LC3
-.L270:
+.L268:
 	bl	printf
 	add	w20, w20, 1
 	cmp	w20, 15
-	bls	.L267
+	bls	.L265
 	mov	w20, 0
 	adrp	x0, .LC5
 	add	x0, x0, :lo12:.LC5
 	bl	printf
-.L267:
+.L265:
 	add	x19, x19, 1
 	add	w21, w21, w23
-	b	.L262
-.L264:
+	b	.L260
+.L262:
 	cmp	w23, 2
-	bne	.L266
+	bne	.L264
 	ldrh	w1, [x22, x19, lsl 1]
-	b	.L271
-.L266:
+	b	.L269
+.L264:
 	ldrb	w1, [x22, x19]
 	mov	x0, x25
-	b	.L270
+	b	.L268
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.FlashEraseBlocks,"ax",@progbits
 	.align	2
@@ -2058,18 +2052,18 @@ FlashEraseBlocks:
 	lsl	w26, w24, 3
 	mov	x22, x0
 	add	x27, x25, :lo12:.LANCHOR78
-.L273:
+.L271:
 	cmp	x19, x23
-	beq	.L287
+	beq	.L285
 	ldr	w0, [x19]
 	add	x2, x29, 104
 	add	x1, x29, 108
 	bl	l2p_addr_tran.isra.0
 	ldr	w0, [x29, 104]
-	cbnz	w0, .L274
+	cbnz	w0, .L272
 	ldr	w1, [x29, 108]
 	cmp	w26, w1
-	bls	.L274
+	bls	.L272
 	mov	x19, x20
 	add	x21, x20, x21
 	adrp	x22, .LC6
@@ -2077,10 +2071,10 @@ FlashEraseBlocks:
 	add	x22, x22, :lo12:.LC6
 	add	x20, x20, :lo12:.LANCHOR77
 	mov	w23, -1
-.L275:
+.L273:
 	cmp	x19, x21
-	bne	.L276
-.L287:
+	bne	.L274
+.L285:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -2089,7 +2083,7 @@ FlashEraseBlocks:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L276:
+.L274:
 	ldr	w2, [x29, 108]
 	mov	x1, x20
 	str	w23, [x19]
@@ -2108,34 +2102,34 @@ FlashEraseBlocks:
 	mov	w2, w3
 	add	x0, x0, :lo12:.LC8
 	bl	rknand_print_hex
-	b	.L275
-.L274:
+	b	.L273
+.L272:
 	add	x1, x25, :lo12:.LANCHOR78
 	ldr	x2, [x1, 8]
 	ldr	w1, [x29, 108]
 	blr	x2
-	cbnz	w0, .L277
+	cbnz	w0, .L275
 	str	wzr, [x19, -4]
-.L278:
+.L276:
 	add	x0, x22, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
-	bne	.L280
+	bne	.L278
 	ldrb	w0, [x29, 104]
 	ldr	x2, [x27, 8]
 	ldr	w1, [x29, 108]
 	add	w1, w24, w1
 	blr	x2
-	cbz	w0, .L280
+	cbz	w0, .L278
 	mov	w0, -1
 	str	w0, [x19, -4]
-.L280:
+.L278:
 	add	x19, x19, 32
-	b	.L273
-.L277:
+	b	.L271
+.L275:
 	mov	w0, -1
 	str	w0, [x19, -4]
-	b	.L278
+	b	.L276
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
 	.section	.text.FtlFreeSysBlkQueueIn,"ax",@progbits
 	.align	2
@@ -2150,15 +2144,15 @@ FtlFreeSysBlkQueueIn:
 	sub	w2, w20, #1
 	mov	w0, 65533
 	cmp	w0, w2, uxth
-	bcc	.L289
+	bcc	.L287
 	adrp	x0, .LANCHOR38
 	add	x2, x0, :lo12:.LANCHOR38
 	mov	x19, x0
 	ldrh	w2, [x2, 6]
 	cmp	w2, 1024
-	beq	.L289
+	beq	.L287
 	and	w1, w1, 65535
-	cbz	w1, .L291
+	cbz	w1, .L289
 	mov	w0, w20
 	bl	P2V_block_in_plane
 	and	w21, w0, 65535
@@ -2169,9 +2163,9 @@ FtlFreeSysBlkQueueIn:
 	str	w1, [x0, 4]
 	mov	w1, w2
 	bl	FlashEraseBlocks
-	adrp	x1, .LANCHOR43
+	adrp	x1, .LANCHOR47
 	ubfiz	x0, x21, 1, 16
-	ldr	x2, [x1, #:lo12:.LANCHOR43]
+	ldr	x2, [x1, #:lo12:.LANCHOR47]
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
@@ -2179,7 +2173,7 @@ FtlFreeSysBlkQueueIn:
 	ldr	w0, [x1, #:lo12:.LANCHOR80]
 	add	w0, w0, 1
 	str	w0, [x1, #:lo12:.LANCHOR80]
-.L291:
+.L289:
 	add	x0, x19, :lo12:.LANCHOR38
 	ldrh	w1, [x0, 6]
 	add	w1, w1, 1
@@ -2190,7 +2184,7 @@ FtlFreeSysBlkQueueIn:
 	and	w1, w1, 1023
 	strh	w1, [x0, 4]
 	strh	w20, [x2, 8]
-.L289:
+.L287:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -2208,7 +2202,7 @@ FtlFreeSysBlkQueueOut:
 	ldrh	w2, [x1, 6]
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	cbz	w2, .L303
+	cbz	w2, .L301
 	ldrh	w0, [x1, 2]
 	sub	w2, w2, #1
 	strh	w2, [x1, 6]
@@ -2228,23 +2222,23 @@ FtlFreeSysBlkQueueOut:
 	ldr	w0, [x1, #:lo12:.LANCHOR80]
 	add	w0, w0, 1
 	str	w0, [x1, #:lo12:.LANCHOR80]
-.L300:
+.L298:
 	sub	w0, w20, #1
 	mov	w1, 65533
 	cmp	w1, w0, uxth
-	bcs	.L301
+	bcs	.L299
 	add	x0, x19, :lo12:.LANCHOR38
 	mov	w1, w20
 	ldrh	w2, [x0, 6]
 	adrp	x0, .LC9
 	add	x0, x0, :lo12:.LC9
 	bl	printf
-.L302:
-	b	.L302
-.L303:
-	mov	w20, 65535
+.L300:
 	b	.L300
 .L301:
+	mov	w20, 65535
+	b	.L298
+.L299:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -2263,27 +2257,27 @@ ftl_map_blk_alloc_new_blk:
 	mov	w20, 0
 	ldr	x0, [x0, 16]
 	str	x21, [sp, 32]
-.L306:
+.L304:
 	cmp	w20, w1
-	beq	.L310
+	beq	.L308
 	mov	x21, x0
 	ldrh	w2, [x0], 2
-	cbnz	w2, .L307
+	cbnz	w2, .L305
 	bl	FtlFreeSysBlkQueueOut
 	and	w1, w0, 65535
 	strh	w0, [x21]
 	sub	w2, w1, #1
 	mov	w0, 65533
 	cmp	w0, w2, uxth
-	bcs	.L308
+	bcs	.L306
 	adrp	x0, .LANCHOR38+6
 	ldrh	w2, [x0, #:lo12:.LANCHOR38+6]
 	adrp	x0, .LC10
 	add	x0, x0, :lo12:.LC10
 	bl	printf
-.L309:
-	b	.L309
-.L308:
+.L307:
+	b	.L307
+.L306:
 	ldr	w0, [x19, 48]
 	strh	wzr, [x19, 2]
 	add	w0, w0, 1
@@ -2292,26 +2286,26 @@ ftl_map_blk_alloc_new_blk:
 	strh	w20, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
-.L310:
+.L308:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L312
+	bhi	.L310
 	adrp	x1, .LANCHOR81
 	adrp	x0, .LC1
 	mov	w2, 578
 	add	x1, x1, :lo12:.LANCHOR81
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L312:
+.L310:
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L307:
+.L305:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L306
+	b	.L304
 	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
 	.section	.text.ftl_memset,"ax",@progbits
 	.align	2
@@ -2511,9 +2505,9 @@ FtlMemInit:
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR118
 	str	x0, [x1, #:lo12:.LANCHOR118]
-	adrp	x1, .LANCHOR43
+	adrp	x1, .LANCHOR47
 	add	x0, x0, 32
-	str	x0, [x1, #:lo12:.LANCHOR43]
+	str	x0, [x1, #:lo12:.LANCHOR47]
 	ldrh	w0, [x19, #:lo12:.LANCHOR6]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
@@ -2609,36 +2603,36 @@ FtlMemInit:
 	mov	w3, w5
 	str	x0, [x2, 32]
 	mov	x0, 1
-.L316:
+.L314:
 	cmp	w0, w7
-	bcc	.L317
+	bcc	.L315
 	mov	w2, 8
 	sub	w2, w2, w0
 	add	x2, x2, 1
 	add	x1, x1, :lo12:.LANCHOR37
 	mov	x3, 0
-.L318:
+.L316:
 	add	x3, x3, 1
 	cmp	x2, x3
-	bne	.L319
+	bne	.L317
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L317:
+.L315:
 	ldr	x4, [x2, 32]
 	add	w0, w0, 1
 	add	x4, x4, x3, uxtw 2
 	add	w3, w3, w5
 	str	x4, [x6], 8
-	b	.L316
-.L319:
+	b	.L314
+.L317:
 	add	x4, x0, x3
 	add	x4, x1, x4, lsl 3
 	str	xzr, [x4, 24]
-	b	.L318
+	b	.L316
 	.size	FtlMemInit, .-FtlMemInit
 	.section	.text.FtlBbt2Bitmap,"ax",@progbits
 	.align	2
@@ -2664,19 +2658,19 @@ FtlBbt2Bitmap:
 	mov	w1, 0
 	mov	x0, x20
 	bl	ftl_memset
-.L324:
+.L322:
 	ldrh	w0, [x22, x19]
 	cmp	w0, w24
-	beq	.L321
+	beq	.L319
 	ldrh	w1, [x21]
 	cmp	w1, w0
-	bhi	.L323
+	bhi	.L321
 	adrp	x0, .LC1
 	mov	w2, 74
 	mov	x1, x23
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L323:
+.L321:
 	ldrh	w2, [x22, x19]
 	mov	w1, 1
 	add	x19, x19, 2
@@ -2687,8 +2681,8 @@ FtlBbt2Bitmap:
 	ldr	w1, [x20, x0]
 	orr	w1, w1, w2
 	str	w1, [x20, x0]
-	bne	.L324
-.L321:
+	bne	.L322
+.L319:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -2751,10 +2745,10 @@ ftl_free_no_use_map_blk:
 	str	x25, [sp, 64]
 	bl	ftl_memset
 	mov	w0, 0
-.L332:
+.L330:
 	ldrh	w1, [x19, 6]
 	cmp	w1, w0
-	bhi	.L336
+	bhi	.L334
 	adrp	x0, .LANCHOR20
 	mov	w23, 0
 	mov	w20, 0
@@ -2762,10 +2756,10 @@ ftl_free_no_use_map_blk:
 	ldrh	w0, [x19]
 	strh	w1, [x21, x0, lsl 1]
 	ldrh	w24, [x21]
-.L337:
+.L335:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L341
+	bhi	.L339
 	mov	w0, w23
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -2773,64 +2767,64 @@ ftl_free_no_use_map_blk:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L336:
+.L334:
 	ubfiz	x1, x0, 2, 16
 	ldr	w2, [x20, x1]
 	mov	w1, 0
 	ubfx	x2, x2, 10, 16
-.L333:
+.L331:
 	ldrh	w3, [x19, 10]
 	cmp	w3, w1
-	bhi	.L335
+	bhi	.L333
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L332
-.L335:
+	b	.L330
+.L333:
 	ubfiz	x3, x1, 1, 16
 	ldrh	w4, [x22, x3]
 	cmp	w4, w2
-	bne	.L334
-	cbz	w2, .L334
+	bne	.L332
+	cbz	w2, .L332
 	ldrh	w4, [x21, x3]
 	add	w4, w4, 1
 	strh	w4, [x21, x3]
-.L334:
+.L332:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L333
-.L341:
+	b	.L331
+.L339:
 	ubfiz	x0, x20, 1, 16
 	ldrh	w1, [x21, x0]
 	cmp	w24, w1
-	bls	.L338
+	bls	.L336
 	add	x25, x22, x0
 	ldrh	w0, [x22, x0]
-	cbnz	w0, .L339
-.L340:
+	cbnz	w0, .L337
+.L338:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L337
-.L338:
-	cbnz	w1, .L340
+	b	.L335
+.L336:
+	cbnz	w1, .L338
 	add	x25, x22, x0
 	ldrh	w0, [x22, x0]
-	cbz	w0, .L340
-.L342:
+	cbz	w0, .L338
+.L340:
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
 	strh	wzr, [x25]
 	ldrh	w0, [x19, 8]
 	sub	w0, w0, #1
 	strh	w0, [x19, 8]
-	b	.L340
-.L343:
+	b	.L338
+.L341:
 	mov	w24, 0
-	b	.L342
-.L339:
+	b	.L340
+.L337:
 	mov	w23, w20
-	cbz	w1, .L343
+	cbz	w1, .L341
 	mov	w24, w1
-	b	.L340
+	b	.L338
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.section	.text.FtlL2PDataInit,"ax",@progbits
 	.align	2
@@ -2866,10 +2860,10 @@ FtlL2PDataInit:
 	mov	w2, -1
 	ldrh	w5, [x22, #:lo12:.LANCHOR23]
 	add	x3, x0, x3, lsl 4
-.L353:
+.L351:
 	add	x4, x1, x5
 	cmp	x0, x3
-	bne	.L354
+	bne	.L352
 	adrp	x1, .LANCHOR129
 	add	x0, x1, :lo12:.LANCHOR129
 	ldp	x21, x22, [sp, 32]
@@ -2900,7 +2894,7 @@ FtlL2PDataInit:
 	str	x1, [x0, 40]
 	ldp	x29, x30, [sp], 64
 	ret
-.L354:
+.L352:
 	and	x1, x1, -4
 	strh	w2, [x0]
 	add	x1, x6, x1
@@ -2908,7 +2902,7 @@ FtlL2PDataInit:
 	str	x1, [x0, 8]
 	add	x0, x0, 16
 	mov	x1, x4
-	b	.L353
+	b	.L351
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
 	.section	.text.FtlVariablesInit,"ax",@progbits
 	.align	2
@@ -2938,10 +2932,10 @@ FtlVariablesInit:
 	ldr	x0, [x0, #:lo12:.LANCHOR36]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	adrp	x0, .LANCHOR43
+	adrp	x0, .LANCHOR47
 	ldrh	w2, [x19, #:lo12:.LANCHOR6]
 	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR43]
+	ldr	x0, [x0, #:lo12:.LANCHOR47]
 	lsl	w2, w2, 1
 	bl	ftl_memset
 	adrp	x0, .LANCHOR117
@@ -2981,7 +2975,7 @@ SupperBlkListInit:
 	stp	x23, x24, [sp, 48]
 	adrp	x24, .LANCHOR40
 	stp	x19, x20, [sp, 16]
-	adrp	x23, .LANCHOR45
+	adrp	x23, .LANCHOR44
 	stp	x21, x22, [sp, 32]
 	adrp	x22, .LANCHOR48
 	mul	w2, w2, w0
@@ -2994,44 +2988,44 @@ SupperBlkListInit:
 	add	x26, x26, :lo12:.LANCHOR13
 	bl	ftl_memset
 	mov	w21, 0
-	adrp	x0, .LANCHOR47
+	adrp	x0, .LANCHOR46
 	mov	w20, 0
 	mov	w19, 0
-	strh	wzr, [x23, #:lo12:.LANCHOR45]
-	str	xzr, [x0, #:lo12:.LANCHOR47]
+	strh	wzr, [x23, #:lo12:.LANCHOR44]
+	str	xzr, [x0, #:lo12:.LANCHOR46]
 	adrp	x0, .LANCHOR41
 	strh	wzr, [x22, #:lo12:.LANCHOR48]
 	adrp	x27, .LANCHOR3
 	str	xzr, [x0, #:lo12:.LANCHOR41]
-	adrp	x0, .LANCHOR44
-	str	xzr, [x0, #:lo12:.LANCHOR44]
-.L359:
+	adrp	x0, .LANCHOR43
+	str	xzr, [x0, #:lo12:.LANCHOR43]
+.L357:
 	ldrh	w0, [x25]
 	cmp	w19, w0
-	bcs	.L366
+	bcs	.L364
 	adrp	x0, .LANCHOR19
 	ldrh	w8, [x27, #:lo12:.LANCHOR3]
 	mov	x6, 0
 	mov	w5, 0
 	ldrh	w7, [x0, #:lo12:.LANCHOR19]
-	b	.L367
-.L361:
+	b	.L365
+.L359:
 	ldrb	w0, [x26, x6]
 	mov	w1, w19
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L360
+	cbnz	w0, .L358
 	add	w5, w5, w7
 	and	w5, w5, 65535
-.L360:
+.L358:
 	add	x6, x6, 1
-.L367:
+.L365:
 	cmp	w8, w6, uxth
-	bhi	.L361
-	cbz	w5, .L362
+	bhi	.L359
+	cbz	w5, .L360
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.L363:
+.L361:
 	ldr	x1, [x24, #:lo12:.LANCHOR40]
 	mov	w0, 6
 	umaddl	x0, w19, w0, x1
@@ -3039,54 +3033,54 @@ SupperBlkListInit:
 	adrp	x0, .LANCHOR51
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w19
-	beq	.L364
+	beq	.L362
 	adrp	x0, .LANCHOR52
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
-	beq	.L364
+	beq	.L362
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w19
-	beq	.L364
+	beq	.L362
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x19, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x0]
-	cbnz	w0, .L365
+	cbnz	w0, .L363
 	add	w21, w21, 1
 	mov	w0, w19
 	and	w21, w21, 65535
 	bl	INSERT_FREE_LIST
-.L364:
+.L362:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L359
-.L362:
+	b	.L357
+.L360:
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x19, 1, 16
 	mov	w2, -1
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	strh	w2, [x1, x0]
-	b	.L363
-.L365:
+	b	.L361
+.L363:
 	add	w20, w20, 1
 	mov	w0, w19
 	and	w20, w20, 65535
 	bl	INSERT_DATA_LIST
-	b	.L364
-.L366:
-	strh	w20, [x23, #:lo12:.LANCHOR45]
+	b	.L362
+.L364:
+	strh	w20, [x23, #:lo12:.LANCHOR44]
 	add	w20, w20, w21
 	strh	w21, [x22, #:lo12:.LANCHOR48]
 	cmp	w20, w0
-	ble	.L368
+	ble	.L366
 	adrp	x1, .LANCHOR136
 	adrp	x0, .LC1
-	mov	w2, 2216
+	mov	w2, 2210
 	add	x1, x1, :lo12:.LANCHOR136
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L368:
+.L366:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -3146,31 +3140,31 @@ FlashGetBadBlockList:
 	blr	x2
 	and	w0, w0, 65535
 	cmp	w0, 50
-	bls	.L373
+	bls	.L371
 	mov	w2, 256
 	mov	w1, 255
 	mov	x0, x19
 	bl	ftl_memset
 	mov	w0, 0
-.L373:
+.L371:
 	adrp	x1, .LANCHOR0+14
 	ldrh	w1, [x1, #:lo12:.LANCHOR0+14]
 	cmp	w1, 4
-	bne	.L377
+	bne	.L375
 	mov	x1, 0
-.L375:
+.L373:
 	cmp	w0, w1, uxth
-	bhi	.L376
-.L377:
+	bhi	.L374
+.L375:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L376:
+.L374:
 	ldrh	w2, [x19, x1, lsl 1]
 	lsr	w2, w2, 1
 	strh	w2, [x19, x1, lsl 1]
 	add	x1, x1, 1
-	b	.L375
+	b	.L373
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
 	.section	.text.ftl_memcpy,"ax",@progbits
 	.align	2
@@ -3202,7 +3196,7 @@ FlashReadPages:
 	add	x24, x24, :lo12:.LANCHOR137
 	adrp	x25, .LC1
 	add	x25, x25, :lo12:.LC1
-.L381:
+.L379:
 	cmp	x23, x19
 	bne	.L392
 	ldp	x19, x20, [sp, 16]
@@ -3215,34 +3209,34 @@ FlashReadPages:
 	ret
 .L392:
 	ldr	x0, [x19, 8]
-	cbz	x0, .L382
+	cbz	x0, .L380
 	ldr	x0, [x19, 16]
-	cbnz	x0, .L383
-.L382:
+	cbnz	x0, .L381
+.L380:
 	mov	w2, 90
 	mov	x1, x24
 	mov	x0, x25
 	bl	printf
-.L383:
+.L381:
 	ldr	w0, [x19, 4]
 	add	x2, x29, 104
 	add	x1, x29, 108
 	bl	l2p_addr_tran.isra.0
 	ldr	w0, [x29, 104]
 	cmp	w0, 3
-	bls	.L384
+	bls	.L382
 	mov	w0, -1
 	str	w0, [x19]
-.L385:
+.L383:
 	add	x19, x19, 32
-	b	.L381
-.L384:
+	b	.L379
+.L382:
 	ldr	x20, [x19, 8]
 	adrp	x26, .LANCHOR111
 	tst	x20, 63
-	beq	.L386
+	beq	.L384
 	ldr	x20, [x26, #:lo12:.LANCHOR111]
-.L386:
+.L384:
 	adrp	x22, .LANCHOR78
 	add	x22, x22, :lo12:.LANCHOR78
 	ldr	w1, [x29, 108]
@@ -3254,7 +3248,7 @@ FlashReadPages:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
-	bne	.L388
+	bne	.L386
 	ldrb	w0, [x29, 104]
 	add	x2, x20, 2048
 	ldr	x4, [x22, 24]
@@ -3264,40 +3258,65 @@ FlashReadPages:
 	add	x3, x3, 8
 	blr	x4
 	cmn	w0, #1
-	beq	.L389
+	beq	.L387
 	ldr	x1, [x19, 16]
 	ldr	w2, [x1, 12]
 	cmn	w2, #1
-	bne	.L390
+	bne	.L388
 	ldr	w2, [x1, 8]
 	cmn	w2, #1
-	bne	.L390
+	bne	.L388
 	ldr	w1, [x1]
 	cmn	w1, #1
-	beq	.L390
-.L389:
+	beq	.L388
+.L387:
 	mov	w1, -1
 	str	w1, [x19]
-.L390:
+.L388:
 	ldr	w1, [x19]
 	cmn	w1, #1
-	beq	.L388
+	beq	.L389
 	cmp	w0, 256
-	bne	.L388
+	bne	.L389
 	str	w0, [x19]
-.L388:
+.L389:
+	ldr	w3, [x19]
+	cmp	w3, 256
+	ccmn	w3, #1, 4, ne
+	bne	.L386
+	ldr	w1, [x19, 4]
+	adrp	x0, .LC11
+	ldr	w2, [x29, 108]
+	add	x0, x0, :lo12:.LC11
+	bl	printf
+	ldr	x1, [x19, 8]
+	cbz	x1, .L391
+	mov	w3, 4
+	adrp	x0, .LC12
+	mov	w2, w3
+	add	x0, x0, :lo12:.LC12
+	bl	rknand_print_hex
+.L391:
+	ldr	x1, [x19, 16]
+	cbz	x1, .L386
+	mov	w3, 4
+	adrp	x0, .LC13
+	mov	w2, w3
+	add	x0, x0, :lo12:.LC13
+	bl	rknand_print_hex
+.L386:
 	ldr	x0, [x26, #:lo12:.LANCHOR111]
 	cmp	x20, x0
-	bne	.L385
+	bne	.L383
 	ldr	x0, [x19, 8]
 	cmp	x20, x0
-	beq	.L385
+	beq	.L383
 	adrp	x1, .LANCHOR12
 	ldrh	w2, [x1, #:lo12:.LANCHOR12]
 	mov	x1, x20
 	lsl	w2, w2, 9
 	bl	ftl_memcpy
-	b	.L385
+	b	.L383
 	.size	FlashReadPages, .-FlashReadPages
 	.section	.text.FtlLoadFactoryBbt,"ax",@progbits
 	.align	2
@@ -3329,10 +3348,10 @@ FtlLoadFactoryBbt:
 	mov	w21, 0
 	mov	w27, -1
 	str	x25, [x1, 16]
-.L410:
+.L419:
 	ldrh	w0, [x23]
 	cmp	w21, w0
-	bcc	.L415
+	bcc	.L424
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -3341,18 +3360,18 @@ FtlLoadFactoryBbt:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L415:
+.L424:
 	ldrh	w19, [x26, #:lo12:.LANCHOR17]
 	add	x24, x22, :lo12:.LANCHOR138
 	strh	w27, [x20]
 	mov	w3, 61664
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L411:
+.L420:
 	ldrh	w0, [x28]
 	sub	w1, w0, #15
 	cmp	w1, w19
-	bgt	.L413
+	bgt	.L422
 	madd	w0, w0, w21, w19
 	mov	w2, 1
 	str	w3, [x29, 108]
@@ -3364,19 +3383,19 @@ FtlLoadFactoryBbt:
 	ldr	w0, [x24]
 	ldr	w3, [x29, 108]
 	cmn	w0, #1
-	beq	.L412
+	beq	.L421
 	ldrh	w0, [x25]
 	cmp	w0, w3
-	bne	.L412
+	bne	.L421
 	strh	w19, [x20]
-.L413:
+.L422:
 	add	w21, w21, 1
 	add	x20, x20, 2
-	b	.L410
-.L412:
+	b	.L419
+.L421:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L411
+	b	.L420
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
 	.section	.text.FtlGetLastWrittenPage,"ax",@progbits
 	.align	2
@@ -3390,10 +3409,10 @@ FtlGetLastWrittenPage:
 	mov	w23, w1
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	bne	.L421
+	bne	.L430
 	adrp	x1, .LANCHOR20
 	ldrh	w19, [x1, #:lo12:.LANCHOR20]
-.L422:
+.L431:
 	adrp	x1, .LANCHOR112
 	sub	w19, w19, #1
 	sxth	w19, w19
@@ -3410,24 +3429,24 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 96]
 	cmn	w0, #1
-	bne	.L423
+	bne	.L432
 	mov	w22, 0
 	mov	w24, 2
-.L424:
+.L433:
 	cmp	w22, w19
-	ble	.L427
-.L423:
+	ble	.L436
+.L432:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 160
 	ret
-.L421:
+.L430:
 	adrp	x1, .LANCHOR19
 	ldrh	w19, [x1, #:lo12:.LANCHOR19]
-	b	.L422
-.L427:
+	b	.L431
+.L436:
 	add	w20, w22, w19
 	mov	w2, w23
 	mov	w1, 1
@@ -3439,20 +3458,20 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 96]
 	cmn	w0, #1
-	bne	.L425
+	bne	.L434
 	ldr	w0, [x29, 100]
 	cmn	w0, #1
-	bne	.L425
+	bne	.L434
 	ldr	w0, [x29, 64]
 	cmn	w0, #1
-	beq	.L425
+	beq	.L434
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L424
-.L425:
+	b	.L433
+.L434:
 	add	w20, w20, 1
 	sxth	w22, w20
-	b	.L424
+	b	.L433
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
 	.section	.text.FtlScanSysBlk,"ax",@progbits
 	.align	2
@@ -3512,12 +3531,12 @@ FtlScanSysBlk:
 	adrp	x0, .LANCHOR82
 	add	x0, x0, :lo12:.LANCHOR82
 	str	x0, [x29, 112]
-.L433:
+.L442:
 	ldr	x0, [x29, 120]
 	ldr	w1, [x29, 172]
 	ldrh	w0, [x0]
 	cmp	w0, w1
-	bls	.L473
+	bls	.L482
 	adrp	x0, .LANCHOR3
 	adrp	x25, .LANCHOR103
 	adrp	x6, .LANCHOR13
@@ -3532,14 +3551,14 @@ FtlScanSysBlk:
 	ldr	x10, [x0, #:lo12:.LANCHOR65]
 	adrp	x0, .LANCHOR24
 	ldrh	w8, [x0, #:lo12:.LANCHOR24]
-	b	.L474
-.L435:
+	b	.L483
+.L444:
 	ldrh	w1, [x29, 172]
 	ldrb	w0, [x6, x5]
 	bl	V2P_block
 	and	w4, w0, 65535
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L434
+	cbnz	w0, .L443
 	ubfiz	x0, x22, 5, 16
 	mul	w1, w22, w8
 	add	x0, x7, x0
@@ -3550,19 +3569,19 @@ FtlScanSysBlk:
 	add	x1, x10, x1, sxtw 2
 	str	w4, [x0, 4]
 	stp	x11, x1, [x0, 8]
-.L434:
+.L443:
 	add	x5, x5, 1
-.L474:
+.L483:
 	cmp	w12, w5, uxth
-	bhi	.L435
-	cbnz	w22, .L436
-.L472:
+	bhi	.L444
+	cbnz	w22, .L445
+.L481:
 	ldr	w0, [x29, 172]
 	add	w26, w0, 1
 	and	w0, w26, 65535
 	str	w0, [x29, 172]
-	b	.L433
-.L436:
+	b	.L442
+.L445:
 	mov	w1, w22
 	mov	w2, 1
 	mov	x0, x7
@@ -3573,7 +3592,7 @@ FtlScanSysBlk:
 	adrp	x0, .LANCHOR140
 	add	x0, x0, :lo12:.LANCHOR140
 	str	x0, [x29, 136]
-.L471:
+.L480:
 	ldr	x0, [x25, #:lo12:.LANCHOR103]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
@@ -3581,10 +3600,10 @@ FtlScanSysBlk:
 	cmn	w0, #1
 	ldr	x27, [x1, 16]
 	ubfx	x26, x3, 10, 16
-	bne	.L439
+	bne	.L448
 	mov	w5, 16
 	mov	w7, 65535
-.L441:
+.L450:
 	ldr	x0, [x25, #:lo12:.LANCHOR103]
 	add	x6, x25, :lo12:.LANCHOR103
 	mov	w2, 1
@@ -3602,78 +3621,78 @@ FtlScanSysBlk:
 	ldr	w5, [x29, 168]
 	cmp	w0, w7
 	ldr	x6, [x29, 104]
-	bne	.L438
+	bne	.L447
 	ldr	x0, [x6]
 	mov	w1, -1
 	str	w1, [x0, x22]
 	ldr	x0, [x6]
 	ldr	w0, [x0, x22]
 	cmp	w0, w1
-	bne	.L439
-.L440:
+	bne	.L448
+.L449:
 	mov	w1, 1
-	b	.L510
-.L438:
+	b	.L519
+.L447:
 	ldr	x0, [x25, #:lo12:.LANCHOR103]
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	bne	.L439
+	bne	.L448
 	sub	w5, w5, #1
 	ands	w5, w5, 65535
-	bne	.L441
-	b	.L440
-.L439:
+	bne	.L450
+	b	.L449
+.L448:
 	adrp	x0, .LANCHOR82
 	ldr	w1, [x0, #:lo12:.LANCHOR82]
 	ldr	w0, [x27, 4]
 	cmn	w1, #1
-	beq	.L442
+	beq	.L451
 	cmp	w1, w0
-	bhi	.L443
-.L442:
+	bhi	.L452
+.L451:
 	cmn	w0, #1
-	beq	.L443
+	beq	.L452
 	ldr	x2, [x29, 112]
 	add	w1, w0, 1
 	str	w1, [x2]
-.L443:
+.L452:
 	ldrh	w1, [x27]
 	mov	w2, 61604
 	cmp	w1, w2
-	beq	.L445
-	bhi	.L446
+	beq	.L454
+	bhi	.L455
 	mov	w0, 61574
 	cmp	w1, w0
-	beq	.L447
-.L444:
+	beq	.L456
+.L453:
 	ldr	x0, [x29, 128]
 	add	x22, x22, 32
 	cmp	x0, x22
-	bne	.L471
-	b	.L472
-.L446:
+	bne	.L480
+	b	.L481
+.L455:
 	mov	w0, 61634
 	cmp	w1, w0
-	beq	.L448
+	beq	.L457
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L444
+	bne	.L453
 	mov	w1, 0
-.L510:
+.L519:
 	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-	b	.L444
-.L448:
+	b	.L453
+.L457:
 	ldrh	w1, [x20, #:lo12:.LANCHOR130]
 	ldr	w0, [x21, #:lo12:.LANCHOR30]
 	cmp	w1, w0
-	bls	.L450
+	bls	.L459
 	ldr	x1, [x29, 136]
 	adrp	x0, .LC1
 	mov	w2, 1225
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L450:
+.L459:
 	ldr	w6, [x21, #:lo12:.LANCHOR30]
 	ldr	x3, [x29, 152]
 	ldrh	w1, [x20, #:lo12:.LANCHOR130]
@@ -3684,53 +3703,53 @@ FtlScanSysBlk:
 	sub	w2, w2, #1
 	ldr	x5, [x3, #:lo12:.LANCHOR125]
 	sxth	w2, w2
-.L451:
+.L460:
 	cmp	w0, w2
-	bgt	.L457
-	tbz	w0, #31, .L491
-	b	.L444
-.L457:
+	bgt	.L466
+	tbz	w0, #31, .L500
+	b	.L453
+.L466:
 	sxtw	x8, w0
 	ldr	w11, [x27, 4]
 	lsl	x7, x8, 2
 	add	x10, x5, x7
 	ldr	w7, [x5, x7]
 	cmp	w11, w7
-	bls	.L452
+	bls	.L461
 	ldr	w2, [x5]
-	cbnz	w2, .L453
+	cbnz	w2, .L462
 	cmp	w6, w1
-	beq	.L453
+	beq	.L462
 	add	w1, w1, 1
 	strh	w1, [x20, #:lo12:.LANCHOR130]
-.L453:
+.L462:
 	ldr	x1, [x29, 160]
 	ldr	x6, [x1, #:lo12:.LANCHOR119]
 	mov	w1, 0
-.L454:
+.L463:
 	cmp	w1, w0
-	bne	.L455
+	bne	.L464
 	ldr	w1, [x27, 4]
 	str	w1, [x10]
 	strh	w26, [x6, x8, lsl 1]
-	tbnz	w0, #31, .L444
+	tbnz	w0, #31, .L453
 	ldrh	w1, [x20, #:lo12:.LANCHOR130]
 	ldr	w2, [x21, #:lo12:.LANCHOR30]
 	sub	w2, w2, w1
 	sub	w2, w2, #1
 	cmp	w0, w2, sxth
-	bgt	.L444
-.L491:
+	bgt	.L453
+.L500:
 	add	w1, w1, 1
 	strh	w1, [x20, #:lo12:.LANCHOR130]
 	ldr	w1, [x27, 4]
 	str	w1, [x5, x0, lsl 2]
 	ldr	x1, [x29, 160]
 	ldr	x1, [x1, #:lo12:.LANCHOR119]
-.L509:
+.L518:
 	strh	w26, [x1, x0, lsl 1]
-	b	.L444
-.L455:
+	b	.L453
+.L464:
 	sxtw	x2, w1
 	add	w1, w1, 1
 	lsl	x7, x2, 2
@@ -3742,22 +3761,22 @@ FtlScanSysBlk:
 	add	x7, x6, x2
 	ldrh	w7, [x7, 2]
 	strh	w7, [x6, x2]
-	b	.L454
-.L452:
+	b	.L463
+.L461:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L451
-.L447:
+	b	.L460
+.L456:
 	ldrh	w1, [x23, #:lo12:.LANCHOR35]
 	ldrh	w0, [x19, #:lo12:.LANCHOR27]
 	cmp	w1, w0
-	bls	.L460
+	bls	.L469
 	ldr	x1, [x29, 136]
 	adrp	x0, .LC1
 	mov	w2, 1266
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L460:
+.L469:
 	ldrh	w6, [x19, #:lo12:.LANCHOR27]
 	ldrh	w2, [x23, #:lo12:.LANCHOR35]
 	sub	w1, w6, #1
@@ -3765,46 +3784,46 @@ FtlScanSysBlk:
 	sub	w5, w1, w2
 	ldr	x1, [x29, 144]
 	ldr	x1, [x1, #:lo12:.LANCHOR122]
-.L461:
+.L470:
 	cmp	w0, w5
-	ble	.L466
+	ble	.L475
 	sxtw	x7, w0
 	ldr	w11, [x27, 4]
 	lsl	x8, x7, 2
 	add	x10, x1, x8
 	ldr	w8, [x1, x8]
 	cmp	w11, w8
-	bls	.L462
+	bls	.L471
 	ldr	w5, [x1]
-	cbnz	w5, .L463
+	cbnz	w5, .L472
 	cmp	w6, w2
-	beq	.L463
+	beq	.L472
 	add	w2, w2, 1
 	strh	w2, [x23, #:lo12:.LANCHOR35]
-.L463:
+.L472:
 	ldr	x6, [x28, #:lo12:.LANCHOR36]
 	mov	w2, 0
-.L464:
+.L473:
 	cmp	w2, w0
-	bne	.L465
+	bne	.L474
 	ldr	w2, [x27, 4]
 	str	w2, [x10]
 	strh	w26, [x6, x7, lsl 1]
-.L466:
-	tbnz	w0, #31, .L444
+.L475:
+	tbnz	w0, #31, .L453
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	ldrh	w5, [x23, #:lo12:.LANCHOR35]
 	sub	w2, w2, #1
 	sub	w2, w2, w5
 	cmp	w0, w2, sxth
-	bgt	.L444
+	bgt	.L453
 	add	w5, w5, 1
 	ldr	w2, [x27, 4]
 	strh	w5, [x23, #:lo12:.LANCHOR35]
 	str	w2, [x1, x0, lsl 2]
 	ldr	x1, [x28, #:lo12:.LANCHOR36]
-	b	.L509
-.L465:
+	b	.L518
+.L474:
 	sxtw	x5, w2
 	add	w2, w2, 1
 	lsl	x8, x5, 2
@@ -3816,61 +3835,61 @@ FtlScanSysBlk:
 	add	x8, x6, x5
 	ldrh	w8, [x8, 2]
 	strh	w8, [x6, x5]
-	b	.L464
-.L462:
+	b	.L473
+.L471:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L461
-.L445:
+	b	.L470
+.L454:
 	ldrh	w5, [x24, #:lo12:.LANCHOR139]
 	mov	w1, 65535
 	add	x2, x24, :lo12:.LANCHOR139
 	cmp	w5, w1
-	bne	.L468
+	bne	.L477
 	strh	w26, [x24, #:lo12:.LANCHOR139]
 	str	w0, [x2, 8]
-	b	.L444
-.L468:
+	b	.L453
+.L477:
 	ldrh	w0, [x2, 4]
 	cmp	w0, w1
-	beq	.L469
+	beq	.L478
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.L469:
+.L478:
 	add	x0, x24, :lo12:.LANCHOR139
 	ldr	w1, [x27, 4]
 	ldr	w2, [x0, 8]
 	cmp	w2, w1
-	bcs	.L470
+	bcs	.L479
 	ldrh	w2, [x24, #:lo12:.LANCHOR139]
 	strh	w2, [x0, 4]
 	strh	w26, [x24, #:lo12:.LANCHOR139]
 	str	w1, [x0, 8]
-	b	.L444
-.L470:
+	b	.L453
+.L479:
 	strh	w26, [x0, 4]
-	b	.L444
-.L473:
+	b	.L453
+.L482:
 	ldr	x0, [x29, 160]
 	ldr	x2, [x0, #:lo12:.LANCHOR119]
 	ldrh	w0, [x2]
-	cbz	w0, .L475
-.L478:
+	cbz	w0, .L484
+.L487:
 	ldr	x1, [x28, #:lo12:.LANCHOR36]
 	ldrh	w0, [x1]
-	cbz	w0, .L476
-.L477:
+	cbz	w0, .L485
+.L486:
 	ldrh	w1, [x20, #:lo12:.LANCHOR130]
 	ldr	w0, [x21, #:lo12:.LANCHOR30]
 	cmp	w1, w0
-	bls	.L507
+	bls	.L516
 	adrp	x1, .LANCHOR140
 	adrp	x0, .LC1
 	mov	w2, 1391
 	add	x1, x1, :lo12:.LANCHOR140
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L507:
+.L516:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -3879,24 +3898,24 @@ FtlScanSysBlk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L475:
+.L484:
 	ldrh	w0, [x20, #:lo12:.LANCHOR130]
-	cbz	w0, .L478
+	cbz	w0, .L487
 	ldr	w1, [x21, #:lo12:.LANCHOR30]
 	mov	w0, 0
-.L479:
+.L488:
 	cmp	w0, w1
-	bcs	.L478
+	bcs	.L487
 	ldrh	w3, [x2, w0, sxtw 1]
-	cbz	w3, .L480
+	cbz	w3, .L489
 	ldr	x1, [x29, 152]
 	add	x7, x21, :lo12:.LANCHOR30
 	ldr	x4, [x1, #:lo12:.LANCHOR125]
 	mov	w1, w0
-.L481:
+.L490:
 	ldr	w3, [x7]
 	cmp	w1, w3
-	bcs	.L478
+	bcs	.L487
 	sxtw	x6, w1
 	sub	w3, w1, w0
 	lsl	x5, x6, 1
@@ -3908,29 +3927,29 @@ FtlScanSysBlk:
 	strh	w8, [x2, x3, lsl 1]
 	str	w6, [x4, x3, lsl 2]
 	strh	wzr, [x2, x5]
-	b	.L481
-.L480:
+	b	.L490
+.L489:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L479
-.L476:
+	b	.L488
+.L485:
 	ldrh	w0, [x23, #:lo12:.LANCHOR35]
-	cbz	w0, .L477
+	cbz	w0, .L486
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	mov	w0, 0
-.L486:
+.L495:
 	mov	w6, w0
 	cmp	w0, w2
-	bge	.L477
+	bge	.L486
 	ldrh	w3, [x1, w0, sxtw 1]
-	cbz	w3, .L487
+	cbz	w3, .L496
 	ldr	x2, [x29, 144]
 	add	x19, x19, :lo12:.LANCHOR27
 	ldr	x3, [x2, #:lo12:.LANCHOR122]
-.L488:
+.L497:
 	ldrh	w2, [x19]
 	cmp	w0, w2
-	bge	.L477
+	bge	.L486
 	sxtw	x5, w0
 	sub	w2, w0, w6
 	lsl	x4, x5, 1
@@ -3942,11 +3961,11 @@ FtlScanSysBlk:
 	strh	w7, [x1, x2, lsl 1]
 	str	w5, [x3, x2, lsl 2]
 	strh	wzr, [x1, x4]
-	b	.L488
-.L487:
+	b	.L497
+.L496:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L486
+	b	.L495
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
 	.section	.text.FtlLoadBbt,"ax",@progbits
 	.align	2
@@ -3974,11 +3993,11 @@ FtlLoadBbt:
 	add	x24, x24, :lo12:.LANCHOR17
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L512:
+.L521:
 	ldrh	w0, [x24]
 	sub	w0, w0, #15
 	cmp	w0, w19
-	bgt	.L515
+	bgt	.L524
 	lsl	w0, w19, 10
 	mov	w2, 1
 	str	w0, [x20, 4]
@@ -3987,7 +4006,7 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L513
+	bne	.L522
 	ldr	w0, [x20, 4]
 	mov	w2, 1
 	mov	w1, w2
@@ -3995,13 +4014,13 @@ FtlLoadBbt:
 	str	w0, [x20, 4]
 	mov	x0, x20
 	bl	FlashReadPages
-.L513:
+.L522:
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L514
+	beq	.L523
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	bne	.L514
+	bne	.L523
 	adrp	x1, .LANCHOR37
 	add	x0, x1, :lo12:.LANCHOR37
 	strh	w19, [x1, #:lo12:.LANCHOR37]
@@ -4009,16 +4028,16 @@ FtlLoadBbt:
 	str	w1, [x0, 8]
 	ldrh	w1, [x21, 8]
 	strh	w1, [x0, 4]
-.L515:
+.L524:
 	adrp	x19, .LANCHOR37
 	mov	w0, 65535
 	add	x20, x19, :lo12:.LANCHOR37
 	ldrh	w1, [x19, #:lo12:.LANCHOR37]
 	cmp	w1, w0
-	beq	.L529
+	beq	.L538
 	ldrh	w1, [x20, 4]
 	cmp	w1, w0
-	beq	.L519
+	beq	.L528
 	add	x0, x22, :lo12:.LANCHOR138
 	lsl	w1, w1, 10
 	mov	w2, 1
@@ -4027,21 +4046,21 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x22, #:lo12:.LANCHOR138]
 	cmn	w0, #1
-	beq	.L519
+	beq	.L528
 	ldrh	w1, [x21]
 	mov	w0, 61649
 	cmp	w1, w0
-	bne	.L519
+	bne	.L528
 	ldr	w1, [x20, 8]
 	ldr	w0, [x21, 4]
 	cmp	w0, w1
-	bls	.L519
+	bls	.L528
 	ldrh	w1, [x20, 4]
 	str	w0, [x20, 8]
 	ldrh	w0, [x21, 8]
 	strh	w1, [x19, #:lo12:.LANCHOR37]
 	strh	w0, [x20, 4]
-.L519:
+.L528:
 	ldrh	w0, [x19, #:lo12:.LANCHOR37]
 	add	x24, x19, :lo12:.LANCHOR37
 	mov	w1, 1
@@ -4051,35 +4070,35 @@ FtlLoadBbt:
 	add	w0, w0, 1
 	strh	w0, [x24, 2]
 	add	x24, x22, :lo12:.LANCHOR138
-.L521:
-	tbz	w20, #31, .L524
+.L530:
+	tbz	w20, #31, .L533
 	adrp	x1, .LANCHOR141
 	adrp	x0, .LC1
-	mov	w2, 253
+	mov	w2, 251
 	add	x1, x1, :lo12:.LANCHOR141
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L523:
+.L532:
 	add	x0, x19, :lo12:.LANCHOR37
 	ldrh	w1, [x21, 10]
 	strh	w1, [x0, 6]
 	mov	w1, 65535
 	ldrh	w0, [x21, 12]
 	cmp	w0, w1
-	beq	.L526
+	beq	.L535
 	adrp	x1, .LANCHOR2
 	ldr	w2, [x1, #:lo12:.LANCHOR2]
 	cmp	w0, w2
-	beq	.L526
+	beq	.L535
 	adrp	x1, .LANCHOR6
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	lsr	w1, w1, 2
 	cmp	w2, w1
-	bcs	.L526
+	bcs	.L535
 	cmp	w0, w1
-	bcs	.L526
+	bcs	.L535
 	bl	FtlSysBlkNumInit
-.L526:
+.L535:
 	add	x19, x19, :lo12:.LANCHOR37
 	adrp	x21, .LANCHOR10
 	adrp	x23, .LANCHOR127
@@ -4088,23 +4107,23 @@ FtlLoadBbt:
 	add	x23, x23, :lo12:.LANCHOR127
 	add	x22, x22, :lo12:.LANCHOR138
 	mov	w20, 0
-.L527:
+.L536:
 	ldrh	w0, [x21]
 	cmp	w20, w0
-	bcc	.L528
+	bcc	.L537
 	mov	w0, 0
-.L511:
+.L520:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L514:
+.L523:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L512
-.L524:
+	b	.L521
+.L533:
 	ldrh	w0, [x19, #:lo12:.LANCHOR37]
 	mov	w2, 1
 	mov	w1, w2
@@ -4116,15 +4135,15 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x24]
 	cmn	w0, #1
-	beq	.L522
+	beq	.L531
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	beq	.L523
-.L522:
+	beq	.L532
+.L531:
 	sub	w20, w20, #1
 	sxth	w20, w20
-	b	.L521
-.L528:
+	b	.L530
+.L537:
 	ldrh	w2, [x23]
 	ldr	x0, [x22, 8]
 	mul	w1, w2, w20
@@ -4133,10 +4152,10 @@ FtlLoadBbt:
 	add	x1, x0, x1, lsl 2
 	ldr	x0, [x19], 8
 	bl	ftl_memcpy
-	b	.L527
-.L529:
+	b	.L536
+.L538:
 	mov	w0, -1
-	b	.L511
+	b	.L520
 	.size	FtlLoadBbt, .-FtlLoadBbt
 	.section	.text.FlashProgPages,"ax",@progbits
 	.align	2
@@ -4163,18 +4182,18 @@ FlashProgPages:
 	mov	x25, x0
 	add	x28, x24, :lo12:.LANCHOR78
 	lsl	w27, w23, 3
-.L542:
+.L551:
 	cmp	x25, x20
-	bne	.L555
+	bne	.L564
 	ldr	w0, [x29, 104]
-	cbz	w0, .L568
+	cbz	w0, .L578
 	adrp	x21, .LANCHOR111
 	adrp	x22, .LANCHOR113
 	mov	x23, x21
 	mov	x24, x22
-.L557:
+.L566:
 	cmp	x19, x20
-	beq	.L568
+	beq	.L578
 	ldr	x1, [x21, #:lo12:.LANCHOR111]
 	ldr	x0, [x22, #:lo12:.LANCHOR113]
 	str	wzr, [x1]
@@ -4188,78 +4207,87 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	w26, [x29, 128]
 	cmn	w26, #1
-	bne	.L558
+	bne	.L567
 	ldr	w1, [x19, 4]
-	adrp	x0, .LC11
-	add	x0, x0, :lo12:.LC11
+	adrp	x0, .LC14
+	add	x0, x0, :lo12:.LC14
 	bl	printf
 	str	w26, [x19]
-.L558:
+.L567:
+	ldr	w26, [x29, 128]
+	cmp	w26, 256
+	bne	.L568
+	ldr	w1, [x19, 4]
+	adrp	x0, .LC15
+	add	x0, x0, :lo12:.LC15
+	bl	printf
+	str	w26, [x19]
+.L568:
 	ldr	x0, [x19, 16]
-	cbz	x0, .L559
+	cbz	x0, .L569
 	ldr	w2, [x0]
 	ldr	x0, [x24, #:lo12:.LANCHOR113]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L559
+	beq	.L569
 	ldr	w1, [x19, 4]
-	adrp	x0, .LC12
-	add	x0, x0, :lo12:.LC12
+	adrp	x0, .LC16
+	add	x0, x0, :lo12:.LC16
 	bl	printf
 	mov	w0, -1
 	str	w0, [x19]
-.L559:
+.L569:
 	ldr	x0, [x19, 8]
-	cbz	x0, .L560
+	cbz	x0, .L570
 	ldr	w2, [x0]
 	ldr	x0, [x23, #:lo12:.LANCHOR111]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L560
+	beq	.L570
 	ldr	w1, [x19, 4]
-	adrp	x0, .LC13
-	add	x0, x0, :lo12:.LC13
+	adrp	x0, .LC17
+	add	x0, x0, :lo12:.LC17
 	bl	printf
 	mov	w0, -1
 	str	w0, [x19]
-.L560:
+.L570:
 	add	x19, x19, 32
-	b	.L557
-.L555:
+	b	.L566
+.L564:
 	ldr	x0, [x25, 8]
-	cbz	x0, .L543
+	cbz	x0, .L552
 	ldr	x0, [x25, 16]
-	cbnz	x0, .L544
-.L543:
+	cbnz	x0, .L553
+.L552:
 	adrp	x0, .LC1
-	mov	w2, 134
+	mov	w2, 142
 	mov	x1, x22
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L544:
+.L553:
 	ldr	w0, [x25, 4]
 	add	x2, x29, 120
 	add	x1, x29, 124
 	bl	l2p_addr_tran.isra.0
 	ldr	w0, [x29, 120]
 	cmp	w0, 3
-	bls	.L545
-.L581:
+	bls	.L554
+.L591:
 	mov	w0, -1
 	str	w0, [x25]
-	b	.L546
-.L545:
-	cbnz	w0, .L547
+	b	.L555
+.L554:
+	cbnz	w0, .L556
 	ldr	w0, [x29, 124]
 	cmp	w27, w0
-	bls	.L547
+	bls	.L556
 	adrp	x21, .LANCHOR142
 	adrp	x22, .LC6
 	mov	w23, -1
 	add	x21, x21, :lo12:.LANCHOR142
 	add	x22, x22, :lo12:.LC6
-	b	.L579
-.L549:
+	b	.L589
+.L558:
 	ldr	w2, [x19, 4]
 	mov	x1, x21
 	str	w23, [x19]
@@ -4278,10 +4306,10 @@ FlashProgPages:
 	mov	w2, w3
 	add	x0, x0, :lo12:.LC8
 	bl	rknand_print_hex
-.L579:
+.L589:
 	cmp	x19, x20
-	bne	.L549
-.L568:
+	bne	.L558
+.L578:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -4290,20 +4318,20 @@ FlashProgPages:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L547:
+.L556:
 	ldr	x1, [x25, 8]
 	tst	x1, 63
-	beq	.L562
+	beq	.L572
 	adrp	x0, .LANCHOR111
 	ldr	x26, [x0, #:lo12:.LANCHOR111]
 	cmp	x1, x26
-	beq	.L550
+	beq	.L559
 	adrp	x0, .LANCHOR12
 	ldrh	w2, [x0, #:lo12:.LANCHOR12]
 	mov	x0, x26
 	lsl	w2, w2, 9
 	bl	ftl_memcpy
-.L550:
+.L559:
 	add	x0, x24, :lo12:.LANCHOR78
 	ldr	w1, [x29, 124]
 	ldr	x3, [x25, 16]
@@ -4311,13 +4339,13 @@ FlashProgPages:
 	ldr	x6, [x0, 16]
 	ldrb	w0, [x29, 120]
 	blr	x6
-	cbnz	w0, .L551
+	cbnz	w0, .L560
 	str	wzr, [x25]
-.L552:
+.L561:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
-	bne	.L546
+	bne	.L555
 	ldrb	w0, [x29, 120]
 	add	x2, x26, 2048
 	ldr	x6, [x28, 16]
@@ -4326,17 +4354,17 @@ FlashProgPages:
 	add	w1, w23, w1
 	add	x3, x3, 8
 	blr	x6
-	cbnz	w0, .L581
-.L546:
+	cbnz	w0, .L591
+.L555:
 	add	x25, x25, 32
-	b	.L542
-.L562:
+	b	.L551
+.L572:
 	mov	x26, x1
-	b	.L550
-.L551:
+	b	.L559
+.L560:
 	mov	w0, -1
 	str	w0, [x25]
-	b	.L552
+	b	.L561
 	.size	FlashProgPages, .-FlashProgPages
 	.section	.text.FtlLowFormatEraseBlock,"ax",@progbits
 	.align	2
@@ -4370,43 +4398,43 @@ FtlLowFormatEraseBlock:
 	ldrh	w12, [x25, #:lo12:.LANCHOR24]
 	stp	x27, x28, [sp, 80]
 	str	x0, [x29, 112]
-.L583:
+.L593:
 	cmp	w8, w5, uxth
-	bhi	.L587
-	cbz	w24, .L582
+	bhi	.L597
+	cbz	w24, .L592
 	mov	w2, w24
 	ubfiz	x24, x24, 5, 16
 	mov	x26, 0
 	mov	w1, 0
 	mov	x0, x6
 	bl	FlashEraseBlocks
-.L591:
+.L601:
 	ldr	x0, [x21, #:lo12:.LANCHOR79]
 	add	x1, x0, x26
 	ldr	w0, [x0, x26]
 	cmn	w0, #1
-	bne	.L590
+	bne	.L600
 	ldr	w0, [x1, 4]
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.L590:
+.L600:
 	add	x26, x26, 32
 	cmp	x26, x24
-	bne	.L591
-	cbz	w22, .L604
+	bne	.L601
+	cbz	w22, .L614
 	adrp	x0, .LANCHOR20
 	mov	w26, 1
 	ldrh	w28, [x0, #:lo12:.LANCHOR20]
-.L592:
+.L602:
 	add	x0, x20, :lo12:.LANCHOR3
 	adrp	x27, .LANCHOR13
 	str	x0, [x29, 120]
 	mov	w24, 0
 	add	x0, x27, :lo12:.LANCHOR13
 	str	x0, [x29, 104]
-.L600:
+.L610:
 	ldr	x0, [x29, 120]
 	mov	x5, 0
 	ldr	x6, [x21, #:lo12:.LANCHOR79]
@@ -4417,10 +4445,10 @@ FtlLowFormatEraseBlock:
 	ldr	x8, [x0, #:lo12:.LANCHOR109]
 	ldr	x0, [x29, 112]
 	ldr	x10, [x0, #:lo12:.LANCHOR110]
-.L593:
+.L603:
 	cmp	w7, w5, uxth
-	bhi	.L596
-	cbz	w20, .L582
+	bhi	.L606
+	cbz	w20, .L592
 	mov	w1, w20
 	mov	w3, 1
 	mov	w2, w26
@@ -4428,11 +4456,11 @@ FtlLowFormatEraseBlock:
 	bl	FlashProgPages
 	mov	x27, 0
 	ubfiz	x1, x20, 5, 16
-.L599:
+.L609:
 	ldr	x0, [x21, #:lo12:.LANCHOR79]
 	add	x3, x0, x27
 	ldr	w0, [x0, x27]
-	cbz	w0, .L598
+	cbz	w0, .L608
 	ldr	w0, [x3, 4]
 	add	w19, w19, 1
 	str	x1, [x29, 96]
@@ -4440,36 +4468,36 @@ FtlLowFormatEraseBlock:
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
 	ldr	x1, [x29, 96]
-.L598:
+.L608:
 	add	x27, x27, 32
 	cmp	x1, x27
-	bne	.L599
+	bne	.L609
 	add	w24, w24, 1
 	cmp	w28, w24, uxth
-	bhi	.L600
+	bhi	.L610
 	mov	x24, 0
-.L602:
-	cbz	w22, .L601
+.L612:
+	cbz	w22, .L611
 	ldr	x0, [x21, #:lo12:.LANCHOR79]
 	add	x1, x0, x24
 	ldr	w0, [x0, x24]
-	cbnz	w0, .L601
+	cbnz	w0, .L611
 	ldr	w0, [x1, 4]
 	mov	w1, 1
 	lsr	w0, w0, 10
 	bl	FtlFreeSysBlkQueueIn
-.L601:
+.L611:
 	add	x24, x24, 32
 	cmp	x24, x27
-	bne	.L602
+	bne	.L612
 	cmp	w23, 63
 	ccmp	w22, 0, 0, hi
-	beq	.L582
+	beq	.L592
 	ldr	x0, [x21, #:lo12:.LANCHOR79]
 	mov	w2, w20
 	mov	w1, w26
 	bl	FlashEraseBlocks
-.L582:
+.L592:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -4478,7 +4506,7 @@ FtlLowFormatEraseBlock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L587:
+.L597:
 	lsl	x0, x5, 5
 	mov	w1, w23
 	str	wzr, [x6, x0]
@@ -4486,13 +4514,13 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	and	w13, w0, 65535
 	mov	w14, w13
-	cbz	w22, .L584
+	cbz	w22, .L594
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L585
-.L584:
+	cbnz	w0, .L595
+.L594:
 	mov	w0, w14
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L586
+	cbnz	w0, .L596
 	ubfiz	x0, x24, 5, 16
 	mul	w1, w24, w12
 	add	x0, x6, x0
@@ -4503,18 +4531,18 @@ FtlLowFormatEraseBlock:
 	add	x1, x11, x1, sxtw 2
 	str	w13, [x0, 4]
 	stp	x10, x1, [x0, 8]
-.L585:
+.L595:
 	add	x5, x5, 1
-	b	.L583
-.L586:
+	b	.L593
+.L596:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L585
-.L604:
+	b	.L595
+.L614:
 	mov	w26, 0
 	mov	w28, 2
-	b	.L592
-.L596:
+	b	.L602
+.L606:
 	lsl	x0, x5, 5
 	mov	w1, w23
 	str	wzr, [x6, x0]
@@ -4523,13 +4551,13 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	and	w12, w0, 65535
 	mov	w13, w12
-	cbz	w22, .L594
+	cbz	w22, .L604
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L595
-.L594:
+	cbnz	w0, .L605
+.L604:
 	mov	w0, w13
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L595
+	cbnz	w0, .L605
 	ubfiz	x0, x20, 5, 16
 	mul	w1, w20, w11
 	add	x0, x6, x0
@@ -4540,9 +4568,9 @@ FtlLowFormatEraseBlock:
 	add	x1, x10, x1, sxtw 2
 	str	w12, [x0, 4]
 	stp	x8, x1, [x0, 8]
-.L595:
+.L605:
 	add	x5, x5, 1
-	b	.L593
+	b	.L603
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
 	.section	.text.FlashTestBlk,"ax",@progbits
 	.align	2
@@ -4554,7 +4582,7 @@ FlashTestBlk:
 	stp	x19, x20, [sp, 16]
 	and	w19, w0, 65535
 	cmp	w19, 11
-	bls	.L628
+	bls	.L638
 	adrp	x20, .LANCHOR112
 	mov	w2, 32
 	mov	w1, 165
@@ -4579,7 +4607,7 @@ FlashTestBlk:
 	mov	w1, w3
 	bl	FlashProgPages
 	ldr	w0, [x29, 32]
-	cbnz	w0, .L629
+	cbnz	w0, .L639
 	add	w0, w19, 1
 	mov	w3, 1
 	str	w0, [x29, 36]
@@ -4590,23 +4618,23 @@ FlashTestBlk:
 	ldr	w0, [x29, 32]
 	cmp	w0, 0
 	csetm	w20, ne
-.L627:
+.L637:
 	mov	w2, 1
 	mov	w1, 0
 	add	x0, x29, 32
 	str	w19, [x29, 36]
 	bl	FlashEraseBlocks
-.L625:
+.L635:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 128
 	ret
-.L629:
+.L639:
 	mov	w20, -1
-	b	.L627
-.L628:
+	b	.L637
+.L638:
 	mov	w20, 0
-	b	.L625
+	b	.L635
 	.size	FlashTestBlk, .-FlashTestBlk
 	.section	.text.FtlBbmTblFlush,"ax",@progbits
 	.align	2
@@ -4639,20 +4667,20 @@ FtlBbmTblFlush:
 	add	x27, x27, :lo12:.LANCHOR127
 	mov	w1, 0
 	bl	ftl_memset
-.L632:
+.L642:
 	ldrh	w0, [x26]
 	cmp	w24, w0
-	blt	.L633
+	blt	.L643
 	add	x20, x20, :lo12:.LANCHOR138
 	add	x19, x21, :lo12:.LANCHOR37
 	mov	w2, 16
 	mov	w1, 255
-	adrp	x24, .LC14
+	adrp	x25, .LC18
 	adrp	x26, .LANCHOR20
 	ldr	x27, [x20, 16]
-	add	x24, x24, :lo12:.LC14
+	add	x25, x25, :lo12:.LC18
 	add	x26, x26, :lo12:.LANCHOR20
-	mov	w25, 0
+	mov	w24, 0
 	mov	x0, x27
 	bl	ftl_memset
 	mov	w0, -3887
@@ -4669,7 +4697,10 @@ FtlBbmTblFlush:
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0, #:lo12:.LANCHOR2]
 	strh	w0, [x27, 12]
-.L634:
+	adrp	x0, .LANCHOR143
+	ldr	w0, [x0, #:lo12:.LANCHOR143]
+	strh	w0, [x27, 14]
+.L644:
 	ldrh	w1, [x19]
 	ldrh	w4, [x27, 10]
 	ldrh	w2, [x19, 2]
@@ -4681,13 +4712,13 @@ FtlBbmTblFlush:
 	orr	w0, w2, w1, lsl 10
 	str	wzr, [x20]
 	str	w0, [x20, 4]
-	mov	x0, x24
+	mov	x0, x25
 	bl	printf
 	ldrh	w0, [x26]
 	ldrh	w1, [x19, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L635
+	blt	.L645
 	ldr	w0, [x19, 8]
 	mov	w2, 1
 	ldrh	w1, [x19, 4]
@@ -4706,7 +4737,7 @@ FtlBbmTblFlush:
 	str	w1, [x0, 4]
 	mov	w1, w2
 	bl	FlashEraseBlocks
-.L635:
+.L645:
 	mov	w3, 1
 	mov	x0, x20
 	mov	w2, w3
@@ -4717,23 +4748,23 @@ FtlBbmTblFlush:
 	strh	w0, [x19, 2]
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L636
+	bne	.L646
 	ldr	w1, [x20, 4]
 	add	w21, w21, 1
-	adrp	x0, .LC15
+	adrp	x0, .LC19
 	and	w21, w21, 65535
-	add	x0, x0, :lo12:.LC15
+	add	x0, x0, :lo12:.LC19
 	bl	printf
 	cmp	w21, 3
-	bls	.L634
+	bls	.L644
 	ldr	w1, [x20, 4]
-	adrp	x0, .LC16
+	adrp	x0, .LC20
 	mov	w2, w21
-	add	x0, x0, :lo12:.LC16
+	add	x0, x0, :lo12:.LC20
 	bl	printf
-.L638:
-	b	.L638
-.L633:
+.L648:
+	b	.L648
+.L643:
 	ldrh	w2, [x27]
 	ldr	x1, [x25], 8
 	ldr	x0, [x19, 8]
@@ -4742,12 +4773,13 @@ FtlBbmTblFlush:
 	add	w24, w24, 1
 	add	x0, x0, x3, sxtw 2
 	bl	ftl_memcpy
-	b	.L632
-.L639:
-	mov	w25, 1
-	b	.L634
-.L636:
-	cbz	w25, .L639
+	b	.L642
+.L646:
+	add	w24, w24, 1
+	cmp	w24, 1
+	beq	.L644
+	cmp	w0, 256
+	beq	.L644
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -4769,13 +4801,13 @@ allocate_data_superblock:
 	stp	x23, x24, [sp, 48]
 	add	x24, x28, :lo12:.LANCHOR48
 	stp	x19, x20, [sp, 16]
-	adrp	x27, .LANCHOR45
+	adrp	x27, .LANCHOR44
 	mov	x19, x0
 	stp	x21, x22, [sp, 32]
-	add	x0, x27, :lo12:.LANCHOR45
+	add	x0, x27, :lo12:.LANCHOR44
 	stp	x25, x26, [sp, 64]
 	str	x0, [x29, 104]
-.L642:
+.L657:
 	ldr	x1, [x29, 104]
 	adrp	x23, .LANCHOR5
 	ldrh	w0, [x28, #:lo12:.LANCHOR48]
@@ -4783,18 +4815,18 @@ allocate_data_superblock:
 	add	w0, w0, w1
 	ldrh	w1, [x23, #:lo12:.LANCHOR5]
 	cmp	w0, w1
-	ble	.L643
-	adrp	x1, .LANCHOR143
+	ble	.L658
+	adrp	x1, .LANCHOR144
 	adrp	x0, .LC1
-	mov	w2, 2661
-	add	x1, x1, :lo12:.LANCHOR143
+	mov	w2, 2656
+	add	x1, x1, :lo12:.LANCHOR144
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L643:
+.L658:
 	adrp	x0, .LANCHOR53
 	add	x0, x0, :lo12:.LANCHOR53
 	cmp	x19, x0
-	bne	.L669
+	bne	.L684
 	adrp	x1, .LANCHOR95
 	ldrh	w0, [x24]
 	ldr	w1, [x1, #:lo12:.LANCHOR95]
@@ -4803,74 +4835,74 @@ allocate_data_superblock:
 	add	w0, w0, 1
 	add	w1, w0, w1, lsr 2
 	ands	w1, w1, 65535
-	beq	.L644
+	beq	.L659
 	sub	w1, w1, #1
 	and	w1, w1, 65535
-.L644:
-	adrp	x0, .LANCHOR47
-	add	x0, x0, :lo12:.LANCHOR47
+.L659:
+	adrp	x0, .LANCHOR46
+	add	x0, x0, :lo12:.LANCHOR46
 	bl	List_pop_index_node
 	and	w22, w0, 65535
 	ldrh	w0, [x24]
-	cbnz	w0, .L645
-	adrp	x1, .LANCHOR143
+	cbnz	w0, .L660
+	adrp	x1, .LANCHOR144
 	adrp	x0, .LC1
-	mov	w2, 2670
-	add	x1, x1, :lo12:.LANCHOR143
+	mov	w2, 2665
+	add	x1, x1, :lo12:.LANCHOR144
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L645:
+.L660:
 	ldrh	w0, [x24]
 	sub	w0, w0, #1
 	strh	w0, [x24]
 	ldrh	w0, [x23, #:lo12:.LANCHOR5]
 	cmp	w0, w22
-	bls	.L642
+	bls	.L657
 	adrp	x25, .LANCHOR42
 	ubfiz	x20, x22, 1, 16
 	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	ldrh	w21, [x0, x20]
-	cbnz	w21, .L642
+	cbnz	w21, .L657
 	strh	w22, [x19]
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L647
+	cbnz	w0, .L662
 	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	mov	w1, -1
 	strh	w1, [x0, x20]
 	mov	w0, w22
 	bl	INSERT_DATA_LIST
-	ldrh	w1, [x27, #:lo12:.LANCHOR45]
+	ldrh	w1, [x27, #:lo12:.LANCHOR44]
 	ldrh	w0, [x24]
 	add	w0, w0, w1
 	ldrh	w1, [x23, #:lo12:.LANCHOR5]
 	cmp	w0, w1
-	ble	.L642
-	mov	w2, 2684
-	adrp	x1, .LANCHOR143
+	ble	.L657
+	mov	w2, 2679
+	adrp	x1, .LANCHOR144
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR143
+	add	x1, x1, :lo12:.LANCHOR144
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	b	.L642
-.L669:
+	b	.L657
+.L684:
 	mov	w1, 0
-	b	.L644
-.L647:
-	ldrh	w1, [x27, #:lo12:.LANCHOR45]
+	b	.L659
+.L662:
+	ldrh	w1, [x27, #:lo12:.LANCHOR44]
 	ldrh	w0, [x24]
 	add	w0, w0, w1
 	ldrh	w1, [x23, #:lo12:.LANCHOR5]
 	cmp	w0, w1
-	ble	.L649
-	adrp	x1, .LANCHOR143
+	ble	.L664
+	adrp	x1, .LANCHOR144
 	adrp	x0, .LC1
-	mov	w2, 2687
-	add	x1, x1, :lo12:.LANCHOR143
+	mov	w2, 2682
+	add	x1, x1, :lo12:.LANCHOR144
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L649:
+.L664:
 	adrp	x0, .LANCHOR3
 	adrp	x25, .LANCHOR79
 	add	x26, x19, 16
@@ -4882,40 +4914,40 @@ allocate_data_superblock:
 	add	x1, x3, 8
 	add	x0, x0, 8
 	add	x0, x3, x0
-.L650:
+.L665:
 	cmp	x0, x1
-	bne	.L652
-	cbnz	w21, .L653
-	adrp	x1, .LANCHOR143
+	bne	.L667
+	cbnz	w21, .L668
+	adrp	x1, .LANCHOR144
 	adrp	x0, .LC1
-	mov	w2, 2698
-	add	x1, x1, :lo12:.LANCHOR143
+	mov	w2, 2693
+	add	x1, x1, :lo12:.LANCHOR144
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L653:
-	adrp	x0, .LANCHOR144
-	ldrh	w0, [x0, #:lo12:.LANCHOR144]
+.L668:
+	adrp	x0, .LANCHOR145
+	ldrh	w0, [x0, #:lo12:.LANCHOR145]
 	cmp	w0, w22
-	bne	.L654
-	adrp	x1, .LANCHOR143
+	bne	.L669
+	adrp	x1, .LANCHOR144
 	adrp	x0, .LC1
-	mov	w2, 2700
-	add	x1, x1, :lo12:.LANCHOR143
+	mov	w2, 2695
+	add	x1, x1, :lo12:.LANCHOR144
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L654:
+.L669:
 	ldrb	w0, [x19, 8]
-	adrp	x6, .LANCHOR43
+	adrp	x6, .LANCHOR47
 	adrp	x7, .LANCHOR14
 	adrp	x5, .LANCHOR90
 	adrp	x4, .LANCHOR91
-	ldr	x1, [x6, #:lo12:.LANCHOR43]
-	cbnz	w0, .L655
+	ldr	x1, [x6, #:lo12:.LANCHOR47]
+	cbnz	w0, .L670
 	ldrh	w0, [x1, x20]
-	cbz	w0, .L656
+	cbz	w0, .L671
 	ldrh	w2, [x7, #:lo12:.LANCHOR14]
 	add	w0, w0, w2
-.L680:
+.L695:
 	strh	w0, [x1, x20]
 	mov	w1, 0
 	ldr	w0, [x5, #:lo12:.LANCHOR90]
@@ -4923,23 +4955,23 @@ allocate_data_superblock:
 	str	w0, [x5, #:lo12:.LANCHOR90]
 	mov	w0, w22
 	bl	ftl_set_blk_mode
-.L658:
-	ldr	x0, [x6, #:lo12:.LANCHOR43]
+.L673:
+	ldr	x0, [x6, #:lo12:.LANCHOR47]
 	ldrh	w1, [x0, x20]
 	adrp	x0, .LANCHOR92
 	ldr	w2, [x0, #:lo12:.LANCHOR92]
 	cmp	w1, w2
-	bls	.L659
+	bls	.L674
 	str	w1, [x0, #:lo12:.LANCHOR92]
-.L659:
+.L674:
 	ldr	w2, [x5, #:lo12:.LANCHOR90]
 	ldr	w1, [x4, #:lo12:.LANCHOR91]
 	ldrh	w0, [x7, #:lo12:.LANCHOR14]
 	madd	w0, w0, w2, w1
 	ldrh	w1, [x23, #:lo12:.LANCHOR5]
 	udiv	w0, w0, w1
-	adrp	x1, .LANCHOR145
-	str	w0, [x1, #:lo12:.LANCHOR145]
+	adrp	x1, .LANCHOR143
+	str	w0, [x1, #:lo12:.LANCHOR143]
 	adrp	x0, .LANCHOR118
 	ldr	x1, [x0, #:lo12:.LANCHOR118]
 	ldr	w0, [x1, 16]
@@ -4950,48 +4982,48 @@ allocate_data_superblock:
 	add	x1, x1, 4
 	add	x2, x0, 4
 	add	x1, x0, x1
-.L660:
+.L675:
 	cmp	x1, x2
-	bne	.L661
+	bne	.L676
 	ldrb	w1, [x19, 8]
 	mov	w2, w21
 	mov	x23, 0
 	bl	FlashEraseBlocks
 	mov	w1, 0
-.L662:
+.L677:
 	cmp	w21, w23, uxth
-	bhi	.L664
-	cbz	w1, .L665
+	bhi	.L679
+	cbz	w1, .L680
 	mov	w0, w22
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L665:
+.L680:
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L666
+	cbnz	w0, .L681
 	adrp	x0, .LANCHOR42
 	mov	w1, -1
 	ldr	x0, [x0, #:lo12:.LANCHOR42]
 	strh	w1, [x0, x20]
-	b	.L642
-.L652:
+	b	.L657
+.L667:
 	ldrh	w2, [x4]
 	stp	xzr, xzr, [x1]
 	cmp	w2, w6
-	beq	.L651
+	beq	.L666
 	ubfiz	x5, x21, 5, 16
 	add	w21, w21, 1
 	add	x5, x3, x5
 	and	w21, w21, 65535
 	lsl	w2, w2, 10
 	str	w2, [x5, 4]
-.L651:
+.L666:
 	add	x1, x1, 32
 	add	x4, x4, 2
-	b	.L650
-.L656:
+	b	.L665
+.L671:
 	mov	w0, 2
-	b	.L680
-.L655:
+	b	.L695
+.L670:
 	ldrh	w0, [x1, x20]
 	add	w0, w0, 1
 	strh	w0, [x1, x20]
@@ -5000,19 +5032,19 @@ allocate_data_superblock:
 	str	w0, [x4, #:lo12:.LANCHOR91]
 	mov	w0, w22
 	bl	ftl_set_blk_mode.part.6
-	b	.L658
-.L661:
+	b	.L673
+.L676:
 	ldr	w3, [x2]
 	and	w3, w3, -1024
 	str	w3, [x2], 32
-	b	.L660
-.L664:
+	b	.L675
+.L679:
 	ldr	x2, [x25, #:lo12:.LANCHOR79]
 	lsl	x0, x23, 5
 	add	x3, x2, x0
 	ldr	w2, [x2, x0]
 	cmn	w2, #1
-	bne	.L663
+	bne	.L678
 	add	w1, w1, 1
 	ldr	w0, [x3, 4]
 	stp	w2, w1, [x29, 96]
@@ -5023,11 +5055,11 @@ allocate_data_superblock:
 	ldrb	w0, [x19, 7]
 	sub	w0, w0, #1
 	strb	w0, [x19, 7]
-.L663:
+.L678:
 	add	x23, x23, 1
 	add	x26, x26, 2
-	b	.L662
-.L666:
+	b	.L677
+.L681:
 	adrp	x1, .LANCHOR19
 	adrp	x2, .LANCHOR82
 	strh	wzr, [x19, 2]
@@ -5045,17 +5077,17 @@ allocate_data_superblock:
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	strh	w0, [x1, x20]
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L667
+	cbz	w0, .L682
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L668
-.L667:
-	adrp	x1, .LANCHOR143
+	cbnz	w0, .L683
+.L682:
+	adrp	x1, .LANCHOR144
 	adrp	x0, .LC1
-	mov	w2, 2753
-	add	x1, x1, :lo12:.LANCHOR143
+	mov	w2, 2748
+	add	x1, x1, :lo12:.LANCHOR144
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L668:
+.L683:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -5080,17 +5112,17 @@ FtlGcFreeBadSuperBlk:
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	str	x27, [sp, 80]
-	cbz	w0, .L682
+	cbz	w0, .L697
 	adrp	x23, .LANCHOR75
 	add	x24, x23, :lo12:.LANCHOR75
 	mov	w19, 0
-.L683:
+.L698:
 	adrp	x0, .LANCHOR3
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w0, w19
-	bhi	.L689
+	bhi	.L704
 	bl	FtlGcReFreshBadBlk
-.L682:
+.L697:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -5099,7 +5131,7 @@ FtlGcFreeBadSuperBlk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L689:
+.L704:
 	adrp	x0, .LANCHOR13
 	add	x0, x0, :lo12:.LANCHOR13
 	mov	w1, w25
@@ -5108,19 +5140,19 @@ FtlGcFreeBadSuperBlk:
 	ldrb	w0, [x0, w19, sxtw]
 	bl	V2P_block
 	and	w26, w0, 65535
-.L684:
+.L699:
 	ldrh	w0, [x22]
 	cmp	w0, w20
-	bhi	.L688
+	bhi	.L703
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L683
-.L688:
+	b	.L698
+.L703:
 	add	x0, x23, :lo12:.LANCHOR75
 	add	w27, w20, 1
 	ldrh	w0, [x0, w20, sxtw 1]
 	cmp	w0, w26
-	bne	.L685
+	bne	.L700
 	mov	w0, w26
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
@@ -5128,22 +5160,22 @@ FtlGcFreeBadSuperBlk:
 	sxtw	x3, w27
 	and	x4, x20, 65535
 	mov	x0, 0
-.L686:
+.L701:
 	add	w2, w20, w0
 	cmp	w1, w2, uxth
-	bhi	.L687
+	bhi	.L702
 	sub	w1, w1, #1
 	strh	w1, [x22]
-.L685:
+.L700:
 	and	w20, w27, 65535
-	b	.L684
-.L687:
+	b	.L699
+.L702:
 	add	x2, x3, x0
 	ldrh	w5, [x24, x2, lsl 1]
 	add	x2, x4, x0
 	add	x0, x0, 1
 	strh	w5, [x24, x2, lsl 1]
-	b	.L686
+	b	.L701
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
 	.section	.text.update_vpc_list,"ax",@progbits
 	.align	2
@@ -5158,75 +5190,89 @@ update_vpc_list:
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ubfiz	x0, x19, 1, 16
 	ldrh	w0, [x1, x0]
-	cbnz	w0, .L695
-	adrp	x0, .LANCHOR144
-	ldrh	w1, [x0, #:lo12:.LANCHOR144]
+	cbnz	w0, .L710
+	adrp	x0, .LANCHOR72
+	ldrh	w1, [x0, #:lo12:.LANCHOR72]
 	cmp	w1, w19
-	bne	.L696
+	bne	.L711
 	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR144]
-.L697:
-	adrp	x20, .LANCHOR45
+	strh	w1, [x0, #:lo12:.LANCHOR72]
+.L711:
+	adrp	x0, .LANCHOR73
+	ldrh	w1, [x0, #:lo12:.LANCHOR73]
+	cmp	w1, w19
+	bne	.L712
+	mov	w1, -1
+	strh	w1, [x0, #:lo12:.LANCHOR73]
+.L712:
+	adrp	x0, .LANCHOR145
+	ldrh	w1, [x0, #:lo12:.LANCHOR145]
+	cmp	w1, w19
+	bne	.L713
+	mov	w1, -1
+	strh	w1, [x0, #:lo12:.LANCHOR145]
+.L714:
+	adrp	x20, .LANCHOR44
 	mov	w1, w19
 	adrp	x0, .LANCHOR41
 	add	x0, x0, :lo12:.LANCHOR41
 	bl	List_remove_node
-	ldrh	w0, [x20, #:lo12:.LANCHOR45]
-	cbnz	w0, .L699
+	ldrh	w0, [x20, #:lo12:.LANCHOR44]
+	cbnz	w0, .L716
 	adrp	x1, .LANCHOR146
 	adrp	x0, .LC1
-	mov	w2, 2823
+	mov	w2, 2824
 	add	x1, x1, :lo12:.LANCHOR146
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L699:
-	ldrh	w0, [x20, #:lo12:.LANCHOR45]
+.L716:
+	ldrh	w0, [x20, #:lo12:.LANCHOR44]
 	sub	w0, w0, #1
-	strh	w0, [x20, #:lo12:.LANCHOR45]
+	strh	w0, [x20, #:lo12:.LANCHOR44]
 	mov	w0, w19
 	bl	free_data_superblock
 	mov	w0, w19
 	bl	FtlGcFreeBadSuperBlk
 	adrp	x0, .LANCHOR48
-	ldrh	w1, [x20, #:lo12:.LANCHOR45]
+	ldrh	w1, [x20, #:lo12:.LANCHOR44]
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	add	w0, w0, w1
 	adrp	x1, .LANCHOR5
 	ldrh	w1, [x1, #:lo12:.LANCHOR5]
 	cmp	w0, w1
-	ble	.L703
+	ble	.L720
 	adrp	x1, .LANCHOR146
 	adrp	x0, .LC1
-	mov	w2, 2826
+	mov	w2, 2827
 	add	x1, x1, :lo12:.LANCHOR146
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L703:
+.L720:
 	mov	w0, 1
-	b	.L694
-.L696:
+	b	.L709
+.L713:
 	adrp	x0, .LANCHOR51
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w19
-	beq	.L702
+	beq	.L719
 	adrp	x0, .LANCHOR52
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
-	beq	.L702
+	beq	.L719
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w19
-	bne	.L697
-.L702:
+	bne	.L714
+.L719:
 	mov	w0, 0
-.L694:
+.L709:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L695:
+.L710:
 	mov	w0, w19
 	bl	List_update_data_list
-	b	.L702
+	b	.L719
 	.size	update_vpc_list, .-update_vpc_list
 	.section	.text.decrement_vpc_count,"ax",@progbits
 	.align	2
@@ -5240,50 +5286,50 @@ decrement_vpc_count:
 	str	x21, [sp, 32]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L706
+	beq	.L723
 	adrp	x21, .LANCHOR42
 	ubfiz	x20, x19, 1, 16
 	ldr	x1, [x21, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x20]
-	cbnz	w0, .L707
+	cbnz	w0, .L724
 	mov	w2, 0
 	mov	w1, w19
-	adrp	x0, .LC17
-	add	x0, x0, :lo12:.LC17
+	adrp	x0, .LC21
+	add	x0, x0, :lo12:.LC21
 	bl	printf
 	ldr	x0, [x21, #:lo12:.LANCHOR42]
 	ldrh	w0, [x0, x20]
-	cbz	w0, .L708
-.L713:
+	cbz	w0, .L725
+.L730:
 	mov	w20, 0
-.L705:
+.L722:
 	mov	w0, w20
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L708:
-	mov	w2, 2841
+.L725:
+	mov	w2, 2842
 	adrp	x1, .LANCHOR147
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR147
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	b	.L713
-.L707:
+	b	.L730
+.L724:
 	sub	w0, w0, #1
 	strh	w0, [x1, x20]
-.L706:
+.L723:
 	adrp	x21, .LANCHOR131
 	mov	w1, 65535
 	ldrh	w0, [x21, #:lo12:.LANCHOR131]
 	cmp	w0, w1
-	bne	.L710
+	bne	.L727
 	strh	w19, [x21, #:lo12:.LANCHOR131]
-	b	.L713
-.L710:
+	b	.L730
+.L727:
 	cmp	w19, w0
-	beq	.L713
+	beq	.L730
 	bl	update_vpc_list
 	cmp	w0, 0
 	adrp	x1, .LANCHOR40
@@ -5301,16 +5347,16 @@ decrement_vpc_count:
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	and	x2, x0, 65535
 	ldrh	w1, [x1, x2, lsl 1]
-	cbnz	w1, .L705
+	cbnz	w1, .L722
 	cmp	w19, w0, uxth
-	beq	.L705
-	mov	w2, 2857
+	beq	.L722
+	mov	w2, 2858
 	adrp	x1, .LANCHOR147
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR147
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	b	.L705
+	b	.L722
 	.size	decrement_vpc_count, .-decrement_vpc_count
 	.section	.text.FtlSuperblockPowerLostFix,"ax",@progbits
 	.align	2
@@ -5347,10 +5393,10 @@ FtlSuperblockPowerLostFix:
 	mov	w1, 22136
 	movk	w1, 0x1234, lsl 16
 	str	w1, [x0, 4]
-.L720:
+.L737:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L716
-.L717:
+	cbnz	w0, .L733
+.L734:
 	ldrh	w0, [x19]
 	adrp	x1, .LANCHOR42
 	ldrh	w3, [x19, 4]
@@ -5368,12 +5414,12 @@ FtlSuperblockPowerLostFix:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 80
 	ret
-.L716:
+.L733:
 	mov	x0, x19
 	bl	get_new_active_ppa
 	str	w0, [x29, 52]
 	cmn	w0, #1
-	beq	.L717
+	beq	.L734
 	ldr	w0, [x22]
 	mov	w3, 0
 	str	w0, [x21, 4]
@@ -5388,8 +5434,8 @@ FtlSuperblockPowerLostFix:
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
 	subs	w20, w20, #1
-	bne	.L720
-	b	.L717
+	bne	.L737
+	b	.L734
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
 	.section	.text.FtlMakeBbt,"ax",@progbits
 	.align	2
@@ -5415,42 +5461,42 @@ FtlMakeBbt:
 	adrp	x0, .LANCHOR10
 	add	x0, x0, :lo12:.LANCHOR10
 	str	x0, [x29, 120]
-.L729:
+.L746:
 	ldr	x0, [x29, 120]
 	ldrh	w0, [x0]
 	cmp	w22, w0
-	bcc	.L735
+	bcc	.L752
 	adrp	x21, .LANCHOR25
 	add	x21, x21, :lo12:.LANCHOR25
 	mov	w19, 0
-.L736:
+.L753:
 	ldrh	w0, [x21]
 	cmp	w0, w19
-	bhi	.L737
+	bhi	.L754
 	add	x21, x20, :lo12:.LANCHOR37
 	mov	w22, 65535
 	ldrh	w19, [x21, 12]
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L738:
+.L755:
 	ldrh	w0, [x21, 12]
 	sub	w0, w0, #47
 	cmp	w0, w19
-	bgt	.L742
+	bgt	.L759
 	mov	w0, w19
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L739
+	beq	.L756
 	mov	w0, w19
 	bl	FlashTestBlk
-	cbz	w0, .L740
+	cbz	w0, .L757
 	mov	w0, w19
 	bl	FtlBbmMapBadBlock
-.L739:
+.L756:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L738
-.L735:
+	b	.L755
+.L752:
 	adrp	x2, .LANCHOR114
 	adrp	x0, .LANCHOR106
 	add	x19, x28, :lo12:.LANCHOR138
@@ -5462,7 +5508,7 @@ FtlMakeBbt:
 	stp	x0, x26, [x19, 8]
 	adrp	x23, .LANCHOR17
 	str	x2, [x29, 112]
-	beq	.L730
+	beq	.L747
 	ldrh	w4, [x23, #:lo12:.LANCHOR17]
 	mov	w2, 1
 	madd	w27, w4, w22, w1
@@ -5477,14 +5523,14 @@ FtlMakeBbt:
 	add	w2, w2, 7
 	lsr	w2, w2, 3
 	bl	ftl_memcpy
-.L731:
+.L748:
 	mov	w0, w27
 	add	w22, w22, 1
 	bl	FtlBbmMapBadBlock
 	add	x24, x24, 8
 	add	x21, x21, 2
-	b	.L729
-.L730:
+	b	.L746
+.L747:
 	mov	w1, w22
 	bl	FlashGetBadBlockList
 	ldr	x0, [x19, 8]
@@ -5497,12 +5543,12 @@ FtlMakeBbt:
 	add	x0, x0, :lo12:.LANCHOR127
 	and	w19, w19, 65535
 	str	x0, [x29, 104]
-.L732:
+.L749:
 	ldrh	w0, [x23]
 	madd	w0, w22, w0, w19
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L733
+	beq	.L750
 	ldr	x0, [x29, 112]
 	mov	w2, 16
 	strh	w19, [x21]
@@ -5540,29 +5586,29 @@ FtlMakeBbt:
 	bl	FlashProgPages
 	ldr	w0, [x25]
 	cmn	w0, #1
-	bne	.L731
+	bne	.L748
 	mov	w0, w27
 	bl	FtlBbmMapBadBlock
-	b	.L732
-.L733:
+	b	.L749
+.L750:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L732
-.L737:
+	b	.L749
+.L754:
 	mov	w0, w19
 	add	w19, w19, 1
 	bl	FtlBbmMapBadBlock
 	and	w19, w19, 65535
-	b	.L736
-.L740:
+	b	.L753
+.L757:
 	ldrh	w0, [x21]
 	cmp	w0, w22
-	bne	.L741
+	bne	.L758
 	strh	w19, [x21]
-	b	.L739
-.L741:
+	b	.L756
+.L758:
 	strh	w19, [x21, 4]
-.L742:
+.L759:
 	adrp	x0, .LANCHOR79
 	add	x19, x20, :lo12:.LANCHOR37
 	ldrh	w1, [x20, #:lo12:.LANCHOR37]
@@ -5617,18 +5663,18 @@ js_hash:
 	mov	w0, 42982
 	mov	x3, 0
 	movk	w0, 0x47c6, lsl 16
-.L750:
+.L767:
 	cmp	w1, w3
-	bhi	.L751
+	bhi	.L768
 	ret
-.L751:
+.L768:
 	lsr	w2, w0, 2
 	ldrb	w5, [x4, x3]
 	add	w2, w2, w0, lsl 5
 	add	x3, x3, 1
 	add	w2, w2, w5
 	eor	w0, w0, w2
-	b	.L750
+	b	.L767
 	.size	js_hash, .-js_hash
 	.section	.text.Ftl_write_map_blk_to_last_page,"ax",@progbits
 	.align	2
@@ -5645,16 +5691,16 @@ Ftl_write_map_blk_to_last_page:
 	ldrh	w0, [x0]
 	stp	x23, x24, [sp, 48]
 	cmp	w0, w1
-	bne	.L753
+	bne	.L770
 	ldrh	w0, [x19, 8]
-	cbz	w0, .L754
+	cbz	w0, .L771
 	adrp	x1, .LANCHOR148
 	adrp	x0, .LC1
 	mov	w2, 641
 	add	x1, x1, :lo12:.LANCHOR148
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L754:
+.L771:
 	ldrh	w0, [x19, 8]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
@@ -5665,14 +5711,14 @@ Ftl_write_map_blk_to_last_page:
 	add	w0, w0, 1
 	strh	wzr, [x19]
 	str	w0, [x19, 48]
-.L755:
+.L772:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L753:
+.L770:
 	ubfiz	x0, x0, 1, 16
 	adrp	x2, .LANCHOR114
 	adrp	x24, .LANCHOR106
@@ -5703,9 +5749,9 @@ Ftl_write_map_blk_to_last_page:
 	mov	x0, 0
 	ldr	x3, [x24, #:lo12:.LANCHOR106]
 	mov	w1, 0
-.L756:
+.L773:
 	cmp	w4, w0, uxth
-	bhi	.L758
+	bhi	.L775
 	add	x20, x20, :lo12:.LANCHOR138
 	adrp	x0, .LANCHOR23
 	ldrh	w1, [x0, #:lo12:.LANCHOR23]
@@ -5722,11 +5768,11 @@ Ftl_write_map_blk_to_last_page:
 	strh	w0, [x19, 2]
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-	b	.L755
-.L758:
+	b	.L772
+.L775:
 	ldr	w2, [x23, x0, lsl 2]
 	cmp	w22, w2, lsr 10
-	bne	.L757
+	bne	.L774
 	add	w1, w1, 1
 	and	w1, w1, 65535
 	ubfiz	x2, x1, 1, 16
@@ -5734,9 +5780,9 @@ Ftl_write_map_blk_to_last_page:
 	add	x2, x2, 1
 	ldr	w5, [x23, x0, lsl 2]
 	str	w5, [x3, x2, lsl 2]
-.L757:
+.L774:
 	add	x0, x0, 1
-	b	.L756
+	b	.L773
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
 	.section	.text.FtlMapWritePage,"ax",@progbits
 	.align	2
@@ -5760,7 +5806,7 @@ FtlMapWritePage:
 	add	x28, x26, :lo12:.LANCHOR20
 	stp	x21, x22, [sp, 32]
 	mov	w22, 0
-.L764:
+.L781:
 	ldr	w0, [x23]
 	ldrh	w1, [x19, 2]
 	add	w0, w0, 1
@@ -5768,35 +5814,35 @@ FtlMapWritePage:
 	ldrh	w0, [x26, #:lo12:.LANCHOR20]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	bge	.L765
+	bge	.L782
 	ldrh	w1, [x19]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L766
-.L765:
+	bne	.L783
+.L782:
 	mov	x0, x19
 	bl	Ftl_write_map_blk_to_last_page
-.L766:
+.L783:
 	ldrh	w1, [x19]
 	ldr	x0, [x19, 16]
 	ldrh	w0, [x0, x1, lsl 1]
-	cbnz	w0, .L767
+	cbnz	w0, .L784
 	adrp	x0, .LC1
 	mov	w2, 700
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L767:
+.L784:
 	ldrh	w1, [x19]
 	ldrh	w0, [x19, 10]
 	cmp	w1, w0
-	bcc	.L768
+	bcc	.L785
 	adrp	x0, .LC1
 	mov	w2, 701
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L768:
+.L785:
 	ldrh	w1, [x19]
 	adrp	x21, .LANCHOR138
 	ldr	x0, [x19, 16]
@@ -5837,46 +5883,46 @@ FtlMapWritePage:
 	and	w0, w0, 65535
 	strh	w0, [x19, 2]
 	cmn	w1, #1
-	bne	.L769
+	bne	.L786
 	ldr	w1, [x20, 4]
-	adrp	x0, .LC18
-	add	x0, x0, :lo12:.LC18
+	adrp	x0, .LC22
+	add	x0, x0, :lo12:.LC22
 	add	w22, w22, 1
 	and	w22, w22, 65535
 	bl	printf
 	ldrh	w0, [x19, 2]
 	cmp	w0, 2
-	bhi	.L770
+	bhi	.L787
 	ldrh	w0, [x28]
 	sub	w0, w0, #1
 	strh	w0, [x19, 2]
-.L770:
+.L787:
 	cmp	w22, 3
-	bls	.L771
+	bls	.L788
 	add	x21, x21, :lo12:.LANCHOR138
-	adrp	x0, .LC19
+	adrp	x0, .LC23
 	mov	w2, w22
-	add	x0, x0, :lo12:.LC19
+	add	x0, x0, :lo12:.LC23
 	ldr	w1, [x21, 4]
 	bl	printf
-.L772:
-	b	.L772
-.L771:
+.L789:
+	b	.L789
+.L788:
 	ldr	w0, [x19, 52]
-	cbz	w0, .L764
+	cbz	w0, .L781
+.L803:
+	b	.L803
 .L786:
-	b	.L786
-.L769:
 	cmp	w0, 1
-	beq	.L775
+	beq	.L792
 	cmp	w1, 256
-	beq	.L775
+	beq	.L792
 	ldr	w0, [x19, 56]
-	cbz	w0, .L776
-.L775:
+	cbz	w0, .L793
+.L792:
 	str	wzr, [x19, 56]
-	b	.L764
-.L776:
+	b	.L781
+.L793:
 	ldr	x0, [x19, 40]
 	ldr	w1, [x20, 4]
 	ldp	x21, x22, [sp, 32]
@@ -5906,20 +5952,20 @@ load_l2p_region:
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
 	cmp	w0, w20
-	bcs	.L789
+	bcs	.L806
 	adrp	x1, .LANCHOR150
 	adrp	x0, .LC1
 	mov	w2, 485
 	add	x1, x1, :lo12:.LANCHOR150
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L789:
+.L806:
 	adrp	x27, .LANCHOR124
 	ubfiz	x0, x20, 2, 16
 	adrp	x22, .LANCHOR55
 	ldr	x1, [x27, #:lo12:.LANCHOR124]
 	ldr	w23, [x1, x0]
-	cbnz	w23, .L790
+	cbnz	w23, .L807
 	ldr	x0, [x22, #:lo12:.LANCHOR55]
 	lsl	x19, x19, 4
 	adrp	x1, .LANCHOR23
@@ -5932,7 +5978,7 @@ load_l2p_region:
 	add	x1, x0, x19
 	strh	w20, [x0, x19]
 	str	wzr, [x1, 4]
-.L791:
+.L808:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -5941,7 +5987,7 @@ load_l2p_region:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L790:
+.L807:
 	ldr	x0, [x22, #:lo12:.LANCHOR55]
 	lsl	x19, x19, 4
 	adrp	x26, .LANCHOR138
@@ -5960,48 +6006,48 @@ load_l2p_region:
 	ldr	x25, [x21, 16]
 	ldrh	w0, [x25, 8]
 	cmp	w0, w20
-	beq	.L792
+	beq	.L809
 	mov	w2, w23
 	mov	w1, w20
-	adrp	x0, .LC20
-	add	x0, x0, :lo12:.LC20
+	adrp	x0, .LC24
+	add	x0, x0, :lo12:.LC24
 	bl	printf
 	ldr	x1, [x21, 16]
 	mov	w3, 4
-	adrp	x0, .LC21
+	adrp	x0, .LC13
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC21
+	add	x0, x0, :lo12:.LC13
 	bl	rknand_print_hex
 	ldrh	w3, [x24, #:lo12:.LANCHOR32]
-	adrp	x0, .LC22
+	adrp	x0, .LC25
 	ldr	x1, [x27, #:lo12:.LANCHOR124]
 	mov	w2, 4
-	add	x0, x0, :lo12:.LC22
+	add	x0, x0, :lo12:.LC25
 	bl	rknand_print_hex
-.L793:
+.L810:
 	ldrh	w0, [x25, 8]
 	cmp	w0, w20
-	beq	.L794
+	beq	.L811
 	adrp	x1, .LANCHOR150
 	adrp	x0, .LC1
 	mov	w2, 508
 	add	x1, x1, :lo12:.LANCHOR150
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L794:
+.L811:
 	ldr	x0, [x22, #:lo12:.LANCHOR55]
 	add	x1, x0, x19
 	str	wzr, [x1, 4]
 	strh	w20, [x0, x19]
-	b	.L791
-.L792:
+	b	.L808
+.L809:
 	ldr	w0, [x26, #:lo12:.LANCHOR138]
 	cmp	w0, 256
-	bne	.L793
+	bne	.L810
 	mov	w2, w23
 	mov	w1, w20
-	adrp	x0, .LC23
-	add	x0, x0, :lo12:.LC23
+	adrp	x0, .LC26
+	add	x0, x0, :lo12:.LC26
 	bl	printf
 	ldr	x0, [x22, #:lo12:.LANCHOR55]
 	mov	w1, w20
@@ -6010,7 +6056,7 @@ load_l2p_region:
 	adrp	x0, .LANCHOR129
 	add	x0, x0, :lo12:.LANCHOR129
 	bl	FtlMapWritePage
-	b	.L793
+	b	.L810
 	.size	load_l2p_region, .-load_l2p_region
 	.section	.text.ftl_map_blk_gc,"ax",@progbits
 	.align	2
@@ -6033,12 +6079,12 @@ ftl_map_blk_gc:
 	ldrh	w2, [x19, 8]
 	sub	w1, w1, #5
 	cmp	w2, w1
-	blt	.L797
+	blt	.L814
 	ubfiz	x0, x0, 1, 16
 	ldrh	w22, [x20, x0]
-	cbz	w22, .L797
+	cbz	w22, .L814
 	ldr	w1, [x19, 52]
-	cbnz	w1, .L797
+	cbnz	w1, .L814
 	mov	w1, 1
 	str	w1, [x19, 52]
 	strh	wzr, [x20, x0]
@@ -6048,31 +6094,31 @@ ftl_map_blk_gc:
 	strh	w0, [x19, 8]
 	ldrh	w0, [x24, #:lo12:.LANCHOR20]
 	cmp	w1, w0
-	bcc	.L798
+	bcc	.L815
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L798:
+.L815:
 	adrp	x26, .LANCHOR138
 	adrp	x23, .LANCHOR151
 	add	x27, x26, :lo12:.LANCHOR138
 	add	x23, x23, :lo12:.LANCHOR151
 	mov	w20, 0
-.L799:
+.L816:
 	ldrh	w0, [x19, 6]
 	cmp	w0, w20
-	bhi	.L806
+	bhi	.L823
 	mov	w1, 1
 	mov	w0, w22
 	bl	FtlFreeSysBlkQueueIn
 	str	wzr, [x19, 52]
-.L797:
+.L814:
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x24, #:lo12:.LANCHOR20]
 	cmp	w1, w0
-	bcc	.L807
+	bcc	.L824
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L807:
+.L824:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6081,12 +6127,12 @@ ftl_map_blk_gc:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L806:
+.L823:
 	ubfiz	x0, x20, 2, 16
 	add	x28, x25, x0
 	ldr	w1, [x25, x0]
 	cmp	w22, w1, lsr 10
-	bne	.L800
+	bne	.L817
 	adrp	x2, .LANCHOR107
 	add	x0, x26, :lo12:.LANCHOR138
 	ldr	x2, [x2, #:lo12:.LANCHOR107]
@@ -6100,36 +6146,36 @@ ftl_map_blk_gc:
 	bl	FlashReadPages
 	ldrh	w0, [x21, 8]
 	cmp	w0, w20
-	beq	.L801
+	beq	.L818
 	adrp	x0, .LC1
 	mov	w2, 611
 	mov	x1, x23
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L801:
+.L818:
 	ldr	w0, [x27]
 	cmn	w0, #1
-	bne	.L802
-.L804:
+	bne	.L819
+.L821:
 	str	wzr, [x28]
-.L803:
-	b	.L803
-.L802:
+.L820:
+	b	.L820
+.L819:
 	ldrh	w0, [x21, 8]
 	cmp	w0, w20
-	bne	.L804
+	bne	.L821
 	ldrh	w1, [x21]
 	ldrh	w0, [x19, 4]
 	cmp	w1, w0
-	bne	.L804
+	bne	.L821
 	ldr	x2, [x27, 8]
 	mov	w1, w20
 	mov	x0, x19
 	bl	FtlMapWritePage
-.L800:
+.L817:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L799
+	b	.L816
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
 	.section	.text.flush_l2p_region,"ax",@progbits
 	.align	2
@@ -6171,27 +6217,27 @@ l2p_flush:
 	str	x21, [sp, 32]
 	mov	w19, 0
 	adrp	x21, .LANCHOR55
-.L816:
+.L833:
 	ldrh	w0, [x20]
 	cmp	w0, w19
-	bhi	.L818
+	bhi	.L835
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L818:
+.L835:
 	ldr	x1, [x21, #:lo12:.LANCHOR55]
 	ubfiz	x0, x19, 4, 16
 	add	x0, x1, x0
 	ldr	w0, [x0, 4]
-	tbz	w0, #31, .L817
+	tbz	w0, #31, .L834
 	mov	w0, w19
 	bl	flush_l2p_region
-.L817:
+.L834:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L816
+	b	.L833
 	.size	l2p_flush, .-l2p_flush
 	.section	.text.log2phys,"ax",@progbits
 	.align	2
@@ -6213,17 +6259,17 @@ log2phys:
 	ldr	w1, [x0, #:lo12:.LANCHOR152]
 	mov	w21, w2
 	cmp	w25, w1
-	bcc	.L821
+	bcc	.L838
 	adrp	x1, .LANCHOR153
 	adrp	x0, .LC1
 	mov	w2, 813
 	add	x1, x1, :lo12:.LANCHOR153
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L821:
+.L838:
 	ldr	w0, [x19, #:lo12:.LANCHOR152]
 	cmp	w25, w0
-	bcs	.L822
+	bcs	.L839
 	adrp	x23, .LANCHOR55
 	add	w24, w24, 7
 	adrp	x0, .LANCHOR33
@@ -6232,10 +6278,10 @@ log2phys:
 	and	w22, w22, 65535
 	ldrh	w1, [x0, #:lo12:.LANCHOR33]
 	mov	x0, 0
-.L823:
+.L840:
 	and	x19, x0, 65535
 	cmp	w19, w1
-	bcc	.L828
+	bcc	.L845
 	bl	select_l2p_ram_region
 	and	x19, x0, 65535
 	ldr	x2, [x23, #:lo12:.LANCHOR55]
@@ -6245,33 +6291,33 @@ log2phys:
 	ldrh	w2, [x2, x1]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L829
+	beq	.L846
 	ldr	w1, [x3, 4]
-	tbz	w1, #31, .L829
+	tbz	w1, #31, .L846
 	bl	flush_l2p_region
-.L829:
+.L846:
 	mov	w1, w26
 	mov	w0, w22
 	bl	load_l2p_region
-	b	.L825
-.L822:
+	b	.L842
+.L839:
 	mov	w0, -1
-	cbnz	w21, .L820
+	cbnz	w21, .L837
 	str	w0, [x20]
-.L820:
+.L837:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L828:
+.L845:
 	add	x0, x0, 1
 	add	x3, x2, x0, lsl 4
 	ldrh	w3, [x3, -16]
 	cmp	w3, w22
-	bne	.L823
-.L825:
+	bne	.L840
+.L842:
 	mov	x0, 1
 	ldr	x1, [x23, #:lo12:.LANCHOR55]
 	lsl	x0, x0, x24
@@ -6279,22 +6325,22 @@ log2phys:
 	and	w0, w0, w25
 	and	x0, x0, 65535
 	add	x1, x1, x19, lsl 4
-	cbnz	w21, .L826
+	cbnz	w21, .L843
 	ldr	x1, [x1, 8]
 	ldr	w0, [x1, x0, lsl 2]
 	str	w0, [x20]
-.L827:
+.L844:
 	ldr	x0, [x23, #:lo12:.LANCHOR55]
 	add	x19, x0, x19, lsl 4
 	ldr	w0, [x19, 4]
 	cmn	w0, #1
-	beq	.L831
+	beq	.L848
 	add	w0, w0, 1
 	str	w0, [x19, 4]
-.L831:
+.L848:
 	mov	w0, 0
-	b	.L820
-.L826:
+	b	.L837
+.L843:
 	ldr	x2, [x1, 8]
 	ldr	w3, [x20]
 	str	w3, [x2, x0, lsl 2]
@@ -6303,7 +6349,7 @@ log2phys:
 	str	w0, [x1, 4]
 	adrp	x0, .LANCHOR56
 	strh	w22, [x0, #:lo12:.LANCHOR56]
-	b	.L827
+	b	.L844
 	.size	log2phys, .-log2phys
 	.section	.text.FtlReUsePrevPpa,"ax",@progbits
 	.align	2
@@ -6324,10 +6370,10 @@ FtlReUsePrevPpa:
 	and	w3, w0, 65535
 	ubfiz	x20, x3, 1, 16
 	ldrh	w1, [x2, x20]
-	cbnz	w1, .L835
-	adrp	x0, .LANCHOR47
-	ldr	x19, [x0, #:lo12:.LANCHOR47]
-	cbz	x19, .L836
+	cbnz	w1, .L852
+	adrp	x0, .LANCHOR46
+	ldr	x19, [x0, #:lo12:.LANCHOR46]
+	cbz	x19, .L853
 	adrp	x2, .LANCHOR40
 	mov	x5, -6148914691236517206
 	movk	x5, 0xaaab, lsl 0
@@ -6340,23 +6386,23 @@ FtlReUsePrevPpa:
 	mul	x19, x19, x5
 	mov	w5, 6
 	and	w19, w19, 65535
-.L837:
+.L854:
 	cmp	w1, w4
-	beq	.L836
+	beq	.L853
 	cmp	w19, w3
-	bne	.L838
+	bne	.L855
 	mov	w1, w19
-	add	x0, x0, :lo12:.LANCHOR47
+	add	x0, x0, :lo12:.LANCHOR46
 	bl	List_remove_node
 	ldrh	w0, [x23, #:lo12:.LANCHOR48]
-	cbnz	w0, .L839
+	cbnz	w0, .L856
 	adrp	x1, .LANCHOR154
 	adrp	x0, .LC1
 	mov	w2, 1733
 	add	x1, x1, :lo12:.LANCHOR154
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L839:
+.L856:
 	ldrh	w0, [x23, #:lo12:.LANCHOR48]
 	sub	w0, w0, #1
 	strh	w0, [x23, #:lo12:.LANCHOR48]
@@ -6366,7 +6412,7 @@ FtlReUsePrevPpa:
 	ldrh	w0, [x1, x20]
 	add	w0, w0, 1
 	strh	w0, [x1, x20]
-.L836:
+.L853:
 	add	x1, x29, 76
 	mov	w2, 1
 	mov	w0, w21
@@ -6376,18 +6422,18 @@ FtlReUsePrevPpa:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L838:
+.L855:
 	umull	x19, w19, w5
 	ldrh	w19, [x2, x19]
 	cmp	w19, w6
-	beq	.L836
+	beq	.L853
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L837
-.L835:
+	b	.L854
+.L852:
 	add	w1, w1, 1
 	strh	w1, [x2, x20]
-	b	.L836
+	b	.L853
 	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
 	.section	.text.FtlRecoverySuperblock,"ax",@progbits
 	.align	2
@@ -6405,7 +6451,7 @@ FtlRecoverySuperblock:
 	stp	x25, x26, [sp, 64]
 	cmp	w0, w1
 	stp	x27, x28, [sp, 80]
-	beq	.L968
+	beq	.L989
 	ldrb	w0, [x19, 6]
 	str	w0, [x29, 164]
 	adrp	x0, .LANCHOR19
@@ -6413,11 +6459,11 @@ FtlRecoverySuperblock:
 	str	x0, [x29, 128]
 	ldrh	w2, [x0, #:lo12:.LANCHOR19]
 	cmp	w2, w26
-	bne	.L848
+	bne	.L865
 	strh	wzr, [x19, 4]
-.L976:
+.L996:
 	strb	wzr, [x19, 6]
-.L968:
+.L989:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -6426,17 +6472,17 @@ FtlRecoverySuperblock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L848:
+.L865:
 	ldrh	w0, [x19, 16]
 	mov	w20, 0
-.L849:
+.L866:
 	cmp	w0, w1
-	beq	.L850
+	beq	.L867
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
 	mov	w23, w0
 	cmn	w0, #1
-	beq	.L851
+	beq	.L868
 	adrp	x1, .LANCHOR64
 	adrp	x2, .LANCHOR3
 	adrp	x20, .LANCHOR103
@@ -6457,9 +6503,9 @@ FtlRecoverySuperblock:
 	ldrh	w1, [x2, #:lo12:.LANCHOR3]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.L852:
+.L869:
 	cmp	x4, x1
-	bne	.L856
+	bne	.L873
 	mov	w2, 0
 	mov	w1, w22
 	bl	FlashReadPages
@@ -6473,69 +6519,69 @@ FtlRecoverySuperblock:
 	mov	w3, 0
 	sub	w21, w21, #1
 	str	x0, [x29, 144]
-.L857:
+.L874:
 	cmp	w22, w3
-	bne	.L862
+	bne	.L879
 	add	w22, w23, 1
 	ldr	w0, [x4, 4]
 	and	w22, w22, 65535
-.L970:
+.L991:
 	lsr	w0, w0, 10
 	bl	P2V_plane
 	and	w27, w0, 65535
 	ldr	x0, [x29, 128]
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	cmp	w0, w22
-	bne	.L864
+	bne	.L881
 	strh	w22, [x19, 2]
 	strb	wzr, [x19, 6]
 	strh	wzr, [x19, 4]
-.L864:
+.L881:
 	ldr	w0, [x29, 164]
 	cmp	w22, w26
 	cset	w1, eq
 	cmp	w27, w0
 	cset	w0, eq
 	tst	w1, w0
-	beq	.L865
-.L977:
+	beq	.L882
+.L997:
 	mov	w2, w27
 	mov	w1, w22
 	mov	x0, x19
 	bl	ftl_sb_update_avl_pages
-	b	.L968
-.L850:
+	b	.L989
+.L867:
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	add	x0, x19, x20, sxtw 1
 	ldrh	w0, [x0, 16]
-	b	.L849
-.L851:
-	cbz	w26, .L853
+	b	.L866
+.L868:
+	cbz	w26, .L870
 	adrp	x1, .LANCHOR155
 	adrp	x0, .LC1
 	mov	w2, 1800
 	add	x1, x1, :lo12:.LANCHOR155
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L853:
+.L870:
 	ldr	w0, [x29, 164]
 	cmp	w0, 0
 	ccmp	w20, w0, 4, ne
-	beq	.L854
+	beq	.L871
 	adrp	x1, .LANCHOR155
 	adrp	x0, .LC1
 	mov	w2, 1801
 	add	x1, x1, :lo12:.LANCHOR155
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L854:
+.L871:
 	strh	wzr, [x19, 2]
-	b	.L976
-.L856:
+	b	.L996
+.L873:
 	ldrh	w3, [x4]
 	cmp	w3, w10
-	beq	.L855
+	beq	.L872
 	ubfiz	x2, x22, 5, 16
 	orr	w3, w23, w3, lsl 10
 	add	x2, x0, x2
@@ -6550,90 +6596,90 @@ FtlRecoverySuperblock:
 	asr	w3, w3, 2
 	add	x3, x7, x3, sxtw 2
 	str	x3, [x2, 16]
-.L855:
+.L872:
 	add	x4, x4, 2
-	b	.L852
-.L862:
+	b	.L869
+.L879:
 	ldr	w0, [x11]
-	cbnz	w0, .L858
+	cbnz	w0, .L875
 	ldr	x8, [x11, 16]
 	ldr	w5, [x8, 4]
 	cmn	w5, #1
-	beq	.L859
+	beq	.L876
 	ldr	w1, [x7]
 	mov	w0, w5
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L859
+	cbz	w0, .L876
 	add	w5, w5, 1
 	str	w5, [x7]
-.L859:
+.L876:
 	ldr	w0, [x8]
 	cmn	w0, #1
-	bne	.L861
+	bne	.L878
 	ubfiz	x3, x3, 5, 16
 	and	w22, w23, 65535
 	add	x3, x4, x3
 	ldr	w0, [x3, 4]
-	b	.L970
-.L858:
+	b	.L991
+.L875:
 	mov	w6, w10
-.L861:
+.L878:
 	add	w3, w3, 1
 	add	x11, x11, 32
 	and	w3, w3, 65535
-	b	.L857
-.L865:
+	b	.L874
+.L882:
 	mov	w0, 65535
 	cmp	w6, w0
-	bne	.L866
+	bne	.L883
 	ldrb	w0, [x19, 8]
-	cbnz	w0, .L867
-.L866:
+	cbnz	w0, .L884
+.L883:
 	adrp	x25, .LANCHOR134
 	and	w28, w23, 65535
 	ldr	w0, [x25, #:lo12:.LANCHOR134]
 	cmn	w0, #1
-	bne	.L868
+	bne	.L885
 	str	w21, [x25, #:lo12:.LANCHOR134]
-.L868:
+.L885:
 	add	w0, w26, 7
 	cmp	w0, w23, uxth
-	bge	.L920
+	bge	.L935
 	sub	w24, w28, #7
 	and	w24, w24, 65535
-.L869:
+.L886:
 	ldr	x0, [x29, 152]
 	mov	w3, 65535
 	mov	w5, 1
 	add	x4, x0, :lo12:.LANCHOR3
-.L870:
+.L887:
 	cmp	w24, w28
-	bhi	.L880
+	bhi	.L897
 	ldrh	w1, [x4]
 	mov	w23, 0
 	ldr	x0, [x20, #:lo12:.LANCHOR103]
 	add	x1, x1, 8
 	ldr	x2, [x29, 168]
 	add	x1, x19, x1, lsl 1
-	b	.L881
-.L920:
+	b	.L898
+.L935:
 	mov	w24, w26
-	b	.L869
-.L872:
+	b	.L886
+.L889:
 	ldrh	w6, [x2]
 	cmp	w6, w3
-	beq	.L871
+	beq	.L888
 	ubfiz	x7, x23, 5, 16
 	add	w23, w23, 1
 	add	x7, x0, x7
 	and	w23, w23, 65535
 	orr	w6, w24, w6, lsl 10
 	str	w6, [x7, 4]
-.L871:
+.L888:
 	add	x2, x2, 2
-.L881:
+.L898:
 	cmp	x1, x2
-	bne	.L872
+	bne	.L889
 	mov	w1, w23
 	mov	w2, 0
 	str	w5, [x29, 112]
@@ -6650,105 +6696,105 @@ FtlRecoverySuperblock:
 	add	x23, x2, x23
 	ldr	x4, [x29, 136]
 	mov	w2, 0
-.L873:
+.L890:
 	cmp	x23, x0
-	bne	.L878
-	cbz	w2, .L879
+	bne	.L895
+	cbz	w2, .L896
 	str	w1, [x25, #:lo12:.LANCHOR134]
-.L879:
+.L896:
 	add	w24, w24, 1
 	and	w24, w24, 65535
-	b	.L870
-.L878:
+	b	.L887
+.L895:
 	ldr	w6, [x0, -16]
-	cbz	w6, .L874
-	cbz	w2, .L867
+	cbz	w6, .L891
+	cbz	w2, .L884
 	str	w1, [x25, #:lo12:.LANCHOR134]
-.L867:
+.L884:
 	adrp	x0, .LANCHOR156
-	mov	w24, w26
+	mov	w23, w26
 	mov	w1, 1
 	adrp	x28, .LANCHOR134
 	strh	w1, [x0, #:lo12:.LANCHOR156]
 	add	x0, x28, :lo12:.LANCHOR134
 	str	x0, [x29, 104]
-.L882:
+.L899:
 	ldr	x1, [x29, 152]
-	mov	w23, 0
+	mov	w24, 0
 	ldr	x0, [x20, #:lo12:.LANCHOR103]
 	mov	w5, 65535
 	ldr	x2, [x29, 168]
 	ldrh	w1, [x1, #:lo12:.LANCHOR3]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.L883:
+.L900:
 	cmp	x1, x2
-	bne	.L885
+	bne	.L902
 	mov	w2, 0
-	mov	w1, w23
+	mov	w1, w24
 	bl	FlashReadPages
 	mov	x25, 0
-	ubfiz	x0, x23, 5, 16
+	ubfiz	x0, x24, 5, 16
 	str	x0, [x29, 112]
 	adrp	x0, .LANCHOR157
 	add	x0, x0, :lo12:.LANCHOR157
 	str	x0, [x29, 120]
-.L886:
+.L903:
 	ldr	x0, [x29, 112]
-	cmp	x0, x25
-	bne	.L914
+	cmp	x25, x0
+	bne	.L929
 	ldr	x0, [x29, 128]
-	add	w24, w24, 1
-	and	w24, w24, 65535
+	add	w23, w23, 1
+	and	w23, w23, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
-	cmp	w0, w24
-	bne	.L882
+	cmp	w0, w23
+	bne	.L899
 	ldr	x0, [x29, 152]
 	mov	w2, 65535
-	strh	w24, [x19, 2]
+	strh	w23, [x19, 2]
 	strh	wzr, [x19, 4]
 	ldrh	w1, [x0, #:lo12:.LANCHOR3]
 	mov	w0, 0
-.L915:
+.L930:
 	cmp	w0, w1
-	beq	.L968
+	beq	.L989
 	ldr	x4, [x29, 168]
 	ldrh	w3, [x4], 2
 	str	x4, [x29, 168]
 	cmp	w3, w2
-	beq	.L916
+	beq	.L931
 	strb	w0, [x19, 6]
-	b	.L968
-.L874:
+	b	.L989
+.L891:
 	ldr	x6, [x0]
 	ldrh	w7, [x6]
 	cmp	w7, w3
-	beq	.L877
+	beq	.L894
 	ldr	w6, [x6, 4]
 	cmn	w6, #1
 	csel	w1, w1, w6, eq
 	csel	w2, w2, w5, eq
-.L877:
+.L894:
 	add	x0, x0, 32
-	b	.L873
-.L880:
+	b	.L890
+.L897:
 	mov	w0, -1
 	str	w0, [x25, #:lo12:.LANCHOR134]
-	b	.L867
-.L885:
+	b	.L884
+.L902:
 	ldrh	w3, [x2]
 	cmp	w3, w5
-	beq	.L884
-	ubfiz	x4, x23, 5, 16
-	add	w23, w23, 1
+	beq	.L901
+	ubfiz	x4, x24, 5, 16
+	add	w24, w24, 1
 	add	x4, x0, x4
-	and	w23, w23, 65535
-	orr	w3, w24, w3, lsl 10
+	and	w24, w24, 65535
+	orr	w3, w23, w3, lsl 10
 	str	w3, [x4, 4]
-.L884:
+.L901:
 	add	x2, x2, 2
-	b	.L883
-.L914:
+	b	.L900
+.L929:
 	ldr	x4, [x20, #:lo12:.LANCHOR103]
 	add	x4, x4, x25
 	ldr	w5, [x4, 4]
@@ -6756,54 +6802,54 @@ FtlRecoverySuperblock:
 	lsr	w0, w5, 10
 	bl	P2V_plane
 	and	w0, w0, 65535
-	cmp	w24, w26
-	bcc	.L887
+	cmp	w23, w26
+	bcc	.L904
 	ldr	w1, [x29, 164]
 	ccmp	w1, w0, 0, eq
-	bhi	.L887
-	cmp	w24, w22
+	bhi	.L904
+	cmp	w23, w22
 	ccmp	w27, w0, 0, eq
-	beq	.L888
+	beq	.L905
 	ldr	w0, [x4]
 	cmn	w0, #1
-	beq	.L889
+	beq	.L906
 	ldr	x3, [x4, 16]
 	mov	w0, 61589
 	ldrh	w1, [x3]
 	cmp	w1, w0
-	beq	.L890
+	beq	.L907
 	ldrh	w0, [x19]
-.L974:
+.L993:
 	bl	decrement_vpc_count
-	b	.L887
-.L890:
+	b	.L904
+.L907:
 	ldr	w21, [x3, 4]
 	cmn	w21, #1
-	beq	.L891
+	beq	.L908
 	ldr	x0, [x29, 144]
 	ldr	w1, [x0, #:lo12:.LANCHOR83]
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L891
+	cbz	w0, .L908
 	ldr	x1, [x29, 144]
 	add	w0, w21, 1
 	str	w0, [x1, #:lo12:.LANCHOR83]
-.L891:
-	ldp	w23, w0, [x3, 8]
+.L908:
+	ldp	w24, w0, [x3, 8]
 	add	x1, x29, 184
 	str	w0, [x29, 180]
 	mov	w2, 0
-	mov	w0, w23
+	mov	w0, w24
 	bl	log2phys
 	ldr	w1, [x28, #:lo12:.LANCHOR134]
 	ldr	w3, [x29, 180]
 	cmn	w1, #1
-	beq	.L892
+	beq	.L909
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L892
+	cbz	w0, .L909
 	cmn	w3, #1
-	beq	.L893
+	beq	.L910
 	ldr	x0, [x20, #:lo12:.LANCHOR103]
 	mov	w2, 0
 	mov	w1, 1
@@ -6817,75 +6863,75 @@ FtlRecoverySuperblock:
 	add	x3, x0, x25
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	bne	.L894
-.L895:
+	bne	.L911
+.L912:
 	mov	w0, -1
 	str	w0, [x29, 180]
-.L902:
+.L919:
 	ldr	w3, [x29, 180]
 	cmn	w3, #1
-	beq	.L887
-.L919:
+	beq	.L904
+.L934:
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
-	and	w23, w0, 65535
+	and	w24, w0, 65535
 	adrp	x0, .LANCHOR5
-	mov	w3, w23
+	mov	w3, w24
 	ldrh	w0, [x0, #:lo12:.LANCHOR5]
-	cmp	w0, w23
-	bhi	.L910
-	mov	w2, 2065
+	cmp	w0, w24
+	bhi	.L925
+	mov	w2, 2057
 	adrp	x1, .LANCHOR155
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR155
 	add	x0, x0, :lo12:.LC1
-	str	w23, [x29, 136]
+	str	w24, [x29, 136]
 	bl	printf
 	ldr	w3, [x29, 136]
-.L910:
+.L925:
 	adrp	x1, .LANCHOR42
-	ubfiz	x0, x23, 1, 16
+	ubfiz	x0, x24, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L911
+	cbz	w0, .L926
 	mov	w0, w3
-	b	.L974
-.L893:
+	b	.L993
+.L910:
 	ldp	w1, w0, [x29, 184]
 	cmp	w1, w0
-	bne	.L887
+	bne	.L904
 	mov	w2, 1
 	add	x1, x29, 180
-	mov	w0, w23
+	mov	w0, w24
 	bl	log2phys
-.L887:
+.L904:
 	add	x25, x25, 32
-	b	.L886
-.L894:
+	b	.L903
+.L911:
 	ldr	w0, [x4, 8]
-	cmp	w23, w0
-	bne	.L895
+	cmp	w24, w0
+	bne	.L912
 	ldr	w0, [x4, 4]
 	str	w0, [x29, 136]
 	str	x4, [x29, 96]
 	uxtw	x1, w0
 	ldr	w0, [x28, #:lo12:.LANCHOR134]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L895
+	cbz	w0, .L912
 	ldp	w0, w1, [x29, 184]
 	ldr	x4, [x29, 96]
 	cmp	w0, w1
 	ldr	w1, [x29, 180]
-	bne	.L897
-.L971:
-	mov	w0, w23
+	bne	.L914
+.L992:
+	mov	w0, w24
 	bl	FtlReUsePrevPpa
-	b	.L895
-.L897:
+	b	.L912
+.L914:
 	cmp	w0, w1
-	beq	.L895
+	beq	.L912
 	cmn	w0, #1
-	beq	.L898
+	beq	.L915
 	ldr	x4, [x3, 16]
 	mov	w2, 0
 	str	w0, [x3, 4]
@@ -6894,64 +6940,70 @@ FtlRecoverySuperblock:
 	mov	x0, x3
 	bl	FlashReadPages
 	ldr	x4, [x29, 96]
-.L899:
+.L916:
 	ldr	x0, [x20, #:lo12:.LANCHOR103]
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	beq	.L900
+	beq	.L917
 	ldr	x0, [x29, 104]
 	ldr	w3, [x4, 4]
 	mov	w1, w3
 	ldr	w0, [x0]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L900
+	cbz	w0, .L917
 	ldr	w0, [x29, 136]
 	mov	w1, w3
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L895
-.L900:
+	cbz	w0, .L912
+.L917:
 	ldr	w1, [x29, 180]
-	b	.L971
-.L898:
+	b	.L992
+.L915:
 	str	w0, [x3]
-	b	.L899
-.L892:
+	b	.L916
+.L909:
 	ldp	w1, w0, [x29, 184]
 	cmp	w1, w0
-	beq	.L902
+	beq	.L919
+	cmn	w3, #1
+	beq	.L921
 	adrp	x0, .LANCHOR8
 	ldr	w0, [x0, #:lo12:.LANCHOR8]
 	cmp	w0, w3, lsr 10
-	bhi	.L904
-	cmn	w3, #1
-.L973:
-	bne	.L887
+	bhi	.L921
+	adrp	x0, .LC27
+	mov	w1, w3
+	add	x0, x0, :lo12:.LC27
+.L995:
+	bl	printf
+	b	.L904
+.L921:
 	mov	w2, 1
 	add	x1, x29, 188
-	mov	w0, w23
+	mov	w0, w24
 	bl	log2phys
 	ldr	w3, [x29, 184]
 	cmn	w3, #1
-	beq	.L902
+	beq	.L919
 	ldr	w0, [x29, 180]
 	cmp	w3, w0
-	beq	.L919
+	beq	.L934
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
 	adrp	x1, .LANCHOR51
 	and	w0, w0, 65535
 	ldrh	w1, [x1, #:lo12:.LANCHOR51]
 	cmp	w1, w0
-	beq	.L909
+	beq	.L924
 	adrp	x1, .LANCHOR52
 	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	beq	.L909
+	beq	.L924
 	adrp	x1, .LANCHOR53
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L902
-.L909:
+	bne	.L919
+.L924:
 	ldr	x0, [x20, #:lo12:.LANCHOR103]
 	mov	w2, 0
 	mov	w1, 1
@@ -6962,71 +7014,54 @@ FtlRecoverySuperblock:
 	ldr	x0, [x20, #:lo12:.LANCHOR103]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L902
+	beq	.L919
 	ldr	x4, [x29, 136]
 	mov	w0, w21
 	ldr	w1, [x4, 4]
 	bl	ftl_cmp_data_ver
-	cbnz	w0, .L902
+	cbnz	w0, .L919
 	mov	w2, 1
 	add	x1, x29, 184
-	mov	w0, w23
+	mov	w0, w24
 	bl	log2phys
-	b	.L902
-.L904:
-	ldr	x0, [x20, #:lo12:.LANCHOR103]
-	mov	w2, 0
-	mov	w1, 1
-	ldr	x4, [x0, 16]
-	str	w3, [x0, 4]
-	str	x4, [x29, 136]
-	bl	FlashReadPages
-	ldr	x4, [x29, 136]
-	ldr	w0, [x4, 8]
-	cmp	w23, w0
-	bne	.L887
-	ldrh	w1, [x4]
-	mov	w0, 61589
-	cmp	w1, w0
-	b	.L973
-.L911:
-	mov	w1, w23
-	adrp	x0, .LC24
-	add	x0, x0, :lo12:.LC24
-	bl	printf
-	b	.L887
-.L889:
+	b	.L919
+.L926:
+	adrp	x0, .LC28
+	mov	w1, w24
+	add	x0, x0, :lo12:.LC28
+	b	.L995
+.L906:
 	ldr	x0, [x29, 120]
 	ldr	w0, [x0]
 	cmp	w0, 31
-	bhi	.L912
+	bhi	.L927
 	adrp	x1, .LANCHOR158
 	add	x1, x1, :lo12:.LANCHOR158
 	str	w5, [x1, w0, uxtw 2]
 	add	w0, w0, 1
 	ldr	x1, [x29, 120]
 	str	w0, [x1]
-.L912:
+.L927:
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
 	ldr	w0, [x28, #:lo12:.LANCHOR134]
 	cmn	w0, #1
-	bne	.L913
-.L975:
+	bne	.L928
+.L994:
 	str	w21, [x28, #:lo12:.LANCHOR134]
-	b	.L887
-.L913:
+	b	.L904
+.L928:
 	cmp	w21, w0
-	bcs	.L887
-	b	.L975
-.L916:
+	bcs	.L904
+	b	.L994
+.L931:
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L915
-.L888:
+	b	.L930
+.L905:
 	strb	w27, [x19, 6]
 	strh	w22, [x19, 2]
-	b	.L977
+	b	.L997
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
 	.section	.text.ftl_check_vpc,"ax",@progbits
 	.align	2
@@ -7034,8 +7069,8 @@ FtlRecoverySuperblock:
 	.type	ftl_check_vpc, %function
 ftl_check_vpc:
 	stp	x29, x30, [sp, -112]!
-	adrp	x0, .LC25
-	add	x0, x0, :lo12:.LC25
+	adrp	x0, .LC29
+	add	x0, x0, :lo12:.LC29
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	adrp	x23, .LANCHOR152
@@ -7054,29 +7089,29 @@ ftl_check_vpc:
 	mov	w1, 0
 	mov	x0, x19
 	bl	ftl_memset
-.L979:
+.L999:
 	ldr	w0, [x23]
 	cmp	w22, w0
-	bcc	.L981
+	bcc	.L1001
 	adrp	x22, .LANCHOR5
-	adrp	x24, .LC26
+	adrp	x24, .LC30
 	add	x22, x22, :lo12:.LANCHOR5
 	add	x26, x20, :lo12:check_vpc_table
-	add	x24, x24, :lo12:.LC26
+	add	x24, x24, :lo12:.LC30
 	mov	w23, 0
 	mov	w19, 0
 	adrp	x25, .LANCHOR42
-.L982:
+.L1002:
 	ldrh	w0, [x22]
 	cmp	w0, w19
-	bhi	.L984
-	adrp	x0, .LANCHOR47
-	ldr	x19, [x0, #:lo12:.LANCHOR47]
-	cbz	x19, .L985
+	bhi	.L1004
+	adrp	x0, .LANCHOR46
+	ldr	x19, [x0, #:lo12:.LANCHOR46]
+	cbz	x19, .L1005
 	adrp	x0, .LANCHOR48
-	adrp	x25, .LC27
+	adrp	x25, .LC31
 	add	x20, x20, :lo12:check_vpc_table
-	add	x25, x25, :lo12:.LC27
+	add	x25, x25, :lo12:.LC31
 	ldrh	w26, [x0, #:lo12:.LANCHOR48]
 	adrp	x0, .LANCHOR40
 	mov	x24, x0
@@ -7090,17 +7125,17 @@ ftl_check_vpc:
 	movk	x1, 0xaaab, lsl 0
 	mul	x19, x19, x1
 	and	w19, w19, 65535
-.L986:
+.L1006:
 	cmp	w22, w26
-	bne	.L988
-.L985:
-	cbz	w23, .L978
+	bne	.L1008
+.L1005:
+	cbz	w23, .L998
 	adrp	x0, .LC1
-	mov	w2, 2389
+	mov	w2, 2383
 	add	x1, x21, :lo12:.LANCHOR159
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L978:
+.L998:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -7108,31 +7143,31 @@ ftl_check_vpc:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L981:
+.L1001:
 	mov	w2, 0
 	add	x1, x29, 108
 	mov	w0, w22
 	bl	log2phys
 	ldr	w0, [x29, 108]
 	cmn	w0, #1
-	beq	.L980
+	beq	.L1000
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	and	x0, x0, 65535
 	ldrh	w1, [x19, x0, lsl 1]
 	add	w1, w1, 1
 	strh	w1, [x19, x0, lsl 1]
-.L980:
+.L1000:
 	add	w22, w22, 1
-	b	.L979
-.L984:
+	b	.L999
+.L1004:
 	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	ubfiz	x28, x19, 1, 16
 	sxtw	x27, w19
 	ldrh	w2, [x0, x28]
 	ldrh	w3, [x26, x27, lsl 1]
 	cmp	w2, w3
-	beq	.L983
+	beq	.L1003
 	mov	w1, w19
 	mov	x0, x24
 	bl	printf
@@ -7140,34 +7175,34 @@ ftl_check_vpc:
 	mov	w1, 65535
 	ldrh	w0, [x0, x28]
 	cmp	w0, w1
-	beq	.L983
+	beq	.L1003
 	ldrh	w1, [x26, x27, lsl 1]
 	cmp	w1, w0
 	csinc	w23, w23, wzr, ls
-.L983:
+.L1003:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L982
-.L988:
+	b	.L1002
+.L1008:
 	ldr	x1, [x27, #:lo12:.LANCHOR42]
 	ubfiz	x0, x19, 1, 16
 	ldrh	w2, [x1, x0]
-	cbz	w2, .L987
+	cbz	w2, .L1007
 	ldrh	w3, [x20, w19, sxtw 1]
 	mov	w23, 1
 	mov	w1, w19
 	mov	x0, x25
 	bl	printf
-.L987:
+.L1007:
 	ldr	x0, [x24, #:lo12:.LANCHOR40]
 	umull	x19, w19, w28
 	ldrh	w19, [x0, x19]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L985
+	beq	.L1005
 	add	w22, w22, 1
 	and	w22, w22, 65535
-	b	.L986
+	b	.L1006
 	.size	ftl_check_vpc, .-ftl_check_vpc
 	.section	.text.ftl_scan_all_data,"ax",@progbits
 	.align	2
@@ -7175,9 +7210,9 @@ ftl_check_vpc:
 	.type	ftl_scan_all_data, %function
 ftl_scan_all_data:
 	sub	sp, sp, #96
-	adrp	x0, .LC28
+	adrp	x0, .LC32
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC28
+	add	x0, x0, :lo12:.LC32
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x19, x20, [sp, 32]
@@ -7189,32 +7224,32 @@ ftl_scan_all_data:
 	add	x21, x21, :lo12:.LANCHOR152
 	str	x23, [sp, 64]
 	bl	printf
-.L1004:
+.L1024:
 	ldr	w0, [x21]
 	cmp	w19, w0
-	bcc	.L1010
+	bcc	.L1030
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x29, x30, [sp, 16]
 	ldr	x23, [sp, 64]
 	add	sp, sp, 96
 	ret
-.L1010:
+.L1030:
 	mov	w2, 0
 	add	x1, x29, 76
 	mov	w0, w19
 	bl	log2phys
 	tst	x19, 2047
-	bne	.L1005
+	bne	.L1025
 	ldr	w2, [x29, 76]
-	adrp	x0, .LC29
+	adrp	x0, .LC33
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC29
+	add	x0, x0, :lo12:.LC33
 	bl	printf
-.L1005:
+.L1025:
 	ldr	w1, [x29, 76]
 	cmn	w1, #1
-	beq	.L1007
+	beq	.L1027
 	add	x0, x20, :lo12:.LANCHOR138
 	str	wzr, [x20, #:lo12:.LANCHOR138]
 	mov	w2, 0
@@ -7231,25 +7266,25 @@ ftl_scan_all_data:
 	ldr	w0, [x20, #:lo12:.LANCHOR138]
 	cmp	w0, 256
 	ccmn	w0, #1, 4, ne
-	beq	.L1008
+	beq	.L1028
 	ldr	w0, [x23, 8]
 	cmp	w19, w0
-	beq	.L1007
-.L1008:
+	beq	.L1027
+.L1028:
 	ldp	x1, x0, [x22, 8]
 	ldr	w2, [x1, 4]
 	str	w2, [sp]
 	ldr	w2, [x22, 4]
 	ldp	w3, w4, [x0]
 	ldp	w5, w6, [x0, 8]
-	adrp	x0, .LC30
+	adrp	x0, .LC34
 	ldr	w7, [x1]
-	add	x0, x0, :lo12:.LC30
+	add	x0, x0, :lo12:.LC34
 	mov	w1, w19
 	bl	printf
-.L1007:
+.L1027:
 	add	w19, w19, 1
-	b	.L1004
+	b	.L1024
 	.size	ftl_scan_all_data, .-ftl_scan_all_data
 	.section	.text.FtlGcScanTempBlk,"ax",@progbits
 	.align	2
@@ -7259,37 +7294,37 @@ FtlGcScanTempBlk:
 	stp	x29, x30, [sp, -144]!
 	add	x29, sp, 0
 	stp	x25, x26, [sp, 64]
-	adrp	x26, .LANCHOR160
+	adrp	x25, .LANCHOR160
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	ldrh	w20, [x26, #:lo12:.LANCHOR160]
+	ldrh	w20, [x25, #:lo12:.LANCHOR160]
 	mov	w0, 65535
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	cmp	w20, w0
-	stp	x27, x28, [sp, 80]
-	beq	.L1033
-	cbnz	w20, .L1013
-.L1014:
+	str	x27, [sp, 80]
+	beq	.L1053
+	cbnz	w20, .L1033
+.L1034:
 	bl	FtlGcPageVarInit
-	b	.L1015
-.L1033:
+	b	.L1035
+.L1053:
 	mov	w20, 0
-.L1013:
+.L1033:
 	adrp	x0, .LANCHOR19
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	cmp	w0, w1
-	beq	.L1014
-.L1015:
-	adrp	x27, .LANCHOR152
-	add	x27, x27, :lo12:.LANCHOR152
-.L1016:
-	ldrh	w0, [x19]
-	mov	w23, 65535
+	beq	.L1034
+.L1035:
+	adrp	x26, .LANCHOR152
+	add	x26, x26, :lo12:.LANCHOR152
+.L1050:
+	ldrh	w1, [x19]
+	mov	w0, 65535
 	strb	wzr, [x19, 8]
-	cmp	w0, w23
-	beq	.L1017
-.L1032:
+	cmp	w1, w0
+	beq	.L1036
+.L1052:
 	adrp	x1, .LANCHOR64
 	adrp	x24, .LANCHOR103
 	add	x4, x19, 16
@@ -7297,6 +7332,7 @@ FtlGcScanTempBlk:
 	ldr	x5, [x1, #:lo12:.LANCHOR64]
 	adrp	x1, .LANCHOR23
 	ldr	x0, [x24, #:lo12:.LANCHOR103]
+	mov	w10, 65535
 	ldrh	w6, [x1, #:lo12:.LANCHOR23]
 	adrp	x1, .LANCHOR65
 	ldr	x7, [x1, #:lo12:.LANCHOR65]
@@ -7306,44 +7342,44 @@ FtlGcScanTempBlk:
 	ldrh	w1, [x1, #:lo12:.LANCHOR3]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.L1018:
-	cmp	x4, x1
-	bne	.L1020
+.L1037:
+	cmp	x1, x4
+	bne	.L1039
 	mov	w1, w21
 	ubfiz	x21, x21, 5, 16
 	mov	x22, 0
 	mov	w2, 0
 	bl	FlashReadPages
-.L1021:
+.L1040:
 	cmp	x21, x22
-	bne	.L1031
+	bne	.L1051
 	adrp	x0, .LANCHOR19
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	cmp	w0, w20
-	bhi	.L1032
-.L1017:
+	bhi	.L1052
+.L1036:
 	strh	w20, [x19, 2]
 	mov	w0, -1
 	strb	wzr, [x19, 6]
 	mov	w1, w20
-	strh	w0, [x26, #:lo12:.LANCHOR160]
+	strh	w0, [x25, #:lo12:.LANCHOR160]
 	mov	w2, 0
 	mov	x0, x19
 	bl	ftl_sb_update_avl_pages
 	mov	w0, -1
+	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1020:
+.L1039:
 	ldrh	w3, [x4]
-	cmp	w3, w23
-	beq	.L1019
+	cmp	w3, w10
+	beq	.L1038
 	ubfiz	x2, x21, 5, 16
 	orr	w3, w20, w3, lsl 10
 	add	x2, x0, x2
@@ -7358,24 +7394,25 @@ FtlGcScanTempBlk:
 	asr	w3, w3, 2
 	add	x3, x7, x3, sxtw 2
 	str	x3, [x2, 16]
-.L1019:
+.L1038:
 	add	x4, x4, 2
-	b	.L1018
-.L1031:
-	ldr	x1, [x24, #:lo12:.LANCHOR103]
-	add	x0, x1, x22
-	ldr	w1, [x1, x22]
-	ldr	w28, [x0, 4]
-	cbnz	w1, .L1022
-	ldr	x25, [x0, 16]
-	ldrh	w0, [x25]
-	cmp	w0, w23
-	beq	.L1022
-	ldr	w0, [x25, 8]
-	ldr	w1, [x27]
+	b	.L1037
+.L1051:
+	ldr	x0, [x24, #:lo12:.LANCHOR103]
+	add	x1, x0, x22
+	ldr	w0, [x0, x22]
+	ldr	w27, [x1, 4]
+	ldr	x23, [x1, 16]
+	cbnz	w0, .L1041
+	ldrh	w1, [x23]
+	mov	w0, 65535
+	cmp	w1, w0
+	beq	.L1063
+	ldr	w0, [x23, 8]
+	ldr	w1, [x26]
 	cmp	w0, w1
-	bls	.L1024
-.L1022:
+	bls	.L1043
+.L1063:
 	adrp	x0, .LANCHOR42
 	ldrh	w1, [x19]
 	mov	w20, 0
@@ -7384,26 +7421,30 @@ FtlGcScanTempBlk:
 	ldrh	w0, [x19]
 	bl	INSERT_FREE_LIST
 	mov	w0, -1
+	adrp	x1, .LANCHOR145
 	strh	w0, [x19]
+	strh	w0, [x1, #:lo12:.LANCHOR145]
 	bl	FtlGcPageVarInit
-	b	.L1016
-.L1024:
+	b	.L1050
+.L1043:
 	add	x1, x29, 108
 	mov	w2, 0
 	bl	log2phys
-	ldr	w0, [x25, 12]
+	ldr	w0, [x23, 12]
 	ldr	w1, [x29, 108]
 	cmp	w0, w1
-	beq	.L1026
-.L1027:
-	ldp	w2, w0, [x25, 8]
-	mov	w1, w28
+	beq	.L1045
+.L1047:
+	ldr	w2, [x23, 8]
+.L1064:
+	ldr	w0, [x23, 12]
+	mov	w1, w27
 	add	x22, x22, 32
 	bl	FtlGcUpdatePage
-	b	.L1021
-.L1026:
+	b	.L1040
+.L1045:
 	cmn	w0, #1
-	beq	.L1027
+	beq	.L1047
 	str	w0, [x29, 116]
 	adrp	x0, .LANCHOR110
 	mov	w2, 0
@@ -7422,22 +7463,25 @@ FtlGcScanTempBlk:
 	add	x2, x2, x22
 	mov	x0, 0
 	ubfiz	x1, x1, 9, 16
-.L1028:
+.L1048:
 	cmp	x0, x1
-	beq	.L1027
+	beq	.L1047
 	ldr	x4, [x2, 8]
 	ldr	w5, [x4, x0]
 	add	x0, x0, 4
 	add	x4, x3, x0
 	ldr	w4, [x4, -4]
 	cmp	w5, w4
-	beq	.L1028
+	beq	.L1048
 	ldrh	w1, [x19]
-	adrp	x0, .LC31
+	adrp	x0, .LC35
 	ldr	w2, [x29, 116]
-	add	x0, x0, :lo12:.LC31
+	add	x0, x0, :lo12:.LC35
 	bl	printf
-	b	.L1022
+	b	.L1063
+.L1041:
+	mov	w2, -1
+	b	.L1064
 	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
 	.section	.text.FtlVendorPartWrite,"ax",@progbits
 	.align	2
@@ -7457,7 +7501,7 @@ FtlVendorPartWrite:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w1, w0
-	bhi	.L1051
+	bhi	.L1073
 	adrp	x0, .LANCHOR22
 	adrp	x25, .LANCHOR12
 	adrp	x26, .LANCHOR23
@@ -7467,9 +7511,9 @@ FtlVendorPartWrite:
 	add	x26, x26, :lo12:.LANCHOR23
 	mov	w23, 0
 	lsr	w21, w28, w21
-.L1045:
-	cbnz	w20, .L1050
-.L1043:
+.L1067:
+	cbnz	w20, .L1072
+.L1065:
 	mov	w0, w23
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -7478,7 +7522,7 @@ FtlVendorPartWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 208
 	ret
-.L1050:
+.L1072:
 	ldrh	w1, [x25]
 	adrp	x0, .LANCHOR123
 	adrp	x27, .LANCHOR108
@@ -7491,9 +7535,9 @@ FtlVendorPartWrite:
 	and	w19, w19, 65535
 	cmp	w20, w19
 	csel	w19, w0, w19, cc
-	cbz	w2, .L1047
+	cbz	w2, .L1069
 	cmp	w19, w1
-	beq	.L1047
+	beq	.L1069
 	ldr	x0, [x27, #:lo12:.LANCHOR108]
 	str	x0, [x29, 120]
 	add	x0, x29, 144
@@ -7503,7 +7547,7 @@ FtlVendorPartWrite:
 	mov	w1, w2
 	add	x0, x29, 112
 	bl	FlashReadPages
-.L1048:
+.L1070:
 	lsl	w4, w19, 9
 	ldr	x0, [x27, #:lo12:.LANCHOR108]
 	lsl	w22, w22, 7
@@ -7524,16 +7568,16 @@ FtlVendorPartWrite:
 	ldr	w4, [x29, 108]
 	csinv	w23, w23, wzr, ne
 	add	x24, x24, x4, sxtw
-	b	.L1045
-.L1047:
+	b	.L1067
+.L1069:
 	ldrh	w2, [x26]
 	mov	w1, 0
 	ldr	x0, [x27, #:lo12:.LANCHOR108]
 	bl	ftl_memset
-	b	.L1048
-.L1051:
+	b	.L1070
+.L1073:
 	mov	w23, -1
-	b	.L1043
+	b	.L1065
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.section	.text.Ftl_save_ext_data,"ax",@progbits
 	.align	2
@@ -7546,7 +7590,7 @@ Ftl_save_ext_data:
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1056
+	bne	.L1078
 	mov	w0, 72
 	mov	w1, 1
 	movk	w0, 0x5000, lsl 16
@@ -7589,7 +7633,7 @@ Ftl_save_ext_data:
 	str	w0, [x2, 48]
 	mov	w0, 0
 	b	FtlVendorPartWrite
-.L1056:
+.L1078:
 	ret
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
 	.section	.text.FtlEctTblFlush,"ax",@progbits
@@ -7600,20 +7644,20 @@ FtlEctTblFlush:
 	adrp	x2, .LANCHOR164
 	ldrh	w1, [x2, #:lo12:.LANCHOR164]
 	cmp	w1, 31
-	bhi	.L1062
+	bhi	.L1084
 	add	w1, w1, 1
 	strh	w1, [x2, #:lo12:.LANCHOR164]
 	mov	w1, 1
-.L1059:
+.L1081:
 	adrp	x2, .LANCHOR118
-	cbnz	w0, .L1060
+	cbnz	w0, .L1082
 	ldr	x0, [x2, #:lo12:.LANCHOR118]
 	ldr	w3, [x0, 20]
 	ldr	w0, [x0, 16]
 	add	w1, w1, w3
 	cmp	w0, w1
-	bcc	.L1064
-.L1060:
+	bcc	.L1086
+.L1082:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	ldr	x2, [x2, #:lo12:.LANCHOR118]
@@ -7636,10 +7680,10 @@ FtlEctTblFlush:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1062:
+.L1084:
 	mov	w1, 32
-	b	.L1059
-.L1064:
+	b	.L1081
+.L1086:
 	mov	w0, 0
 	ret
 	.size	FtlEctTblFlush, .-FtlEctTblFlush
@@ -7669,7 +7713,7 @@ FtlVendorPartRead:
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	cmp	w1, w0
-	bhi	.L1076
+	bhi	.L1098
 	adrp	x0, .LANCHOR22
 	mov	x25, x2
 	mov	w24, 0
@@ -7679,9 +7723,9 @@ FtlVendorPartRead:
 	add	x0, x0, :lo12:.LANCHOR12
 	str	x0, [x29, 104]
 	lsr	w20, w22, w20
-.L1069:
-	cbnz	w21, .L1075
-.L1067:
+.L1091:
+	cbnz	w21, .L1097
+.L1089:
 	mov	w0, w24
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -7690,7 +7734,7 @@ FtlVendorPartRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 208
 	ret
-.L1075:
+.L1097:
 	ldr	x0, [x27, #:lo12:.LANCHOR123]
 	ldr	w4, [x0, w20, uxtw 2]
 	ldr	x0, [x29, 104]
@@ -7703,7 +7747,7 @@ FtlVendorPartRead:
 	cmp	w21, w19
 	csel	w19, w0, w19, cc
 	lsl	w26, w19, 9
-	cbz	w4, .L1071
+	cbz	w4, .L1093
 	adrp	x28, .LANCHOR108
 	mov	w2, 1
 	str	w4, [x29, 96]
@@ -7723,12 +7767,12 @@ FtlVendorPartRead:
 	csinv	w24, w24, wzr, ne
 	ldr	w0, [x0, #:lo12:.LANCHOR138]
 	cmp	w0, 256
-	bne	.L1073
+	bne	.L1095
 	mov	w2, w4
 	mov	w1, w20
-	adrp	x0, .LC32
+	adrp	x0, .LC36
 	str	x28, [x29, 96]
-	add	x0, x0, :lo12:.LC32
+	add	x0, x0, :lo12:.LC36
 	bl	printf
 	ldr	x2, [x28, #:lo12:.LANCHOR108]
 	mov	w1, w20
@@ -7736,28 +7780,28 @@ FtlVendorPartRead:
 	add	x0, x0, :lo12:.LANCHOR161
 	bl	FtlMapWritePage
 	ldr	x5, [x29, 96]
-.L1073:
+.L1095:
 	ldr	x1, [x5, #:lo12:.LANCHOR108]
 	lsl	w23, w23, 7
 	mov	w2, w26
 	mov	x0, x25
 	add	x1, x1, x23, sxtw 2
 	bl	ftl_memcpy
-.L1074:
+.L1096:
 	add	w20, w20, 1
 	sub	w21, w21, w19
 	add	w22, w22, w19
 	add	x25, x25, x26, sxtw
-	b	.L1069
-.L1071:
+	b	.L1091
+.L1093:
 	mov	w2, w26
 	mov	w1, 0
 	mov	x0, x25
 	bl	ftl_memset
-	b	.L1074
-.L1076:
+	b	.L1096
+.L1098:
 	mov	w24, -1
-	b	.L1067
+	b	.L1089
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
 	.section	.text.FtlLoadEctTbl,"ax",@progbits
 	.align	2
@@ -7778,18 +7822,18 @@ FtlLoadEctTbl:
 	mov	w0, 17221
 	movk	w0, 0x4254, lsl 16
 	cmp	w1, w0
-	beq	.L1079
-	adrp	x1, .LC33
-	adrp	x0, .LC34
-	add	x1, x1, :lo12:.LC33
-	add	x0, x0, :lo12:.LC34
+	beq	.L1101
+	adrp	x1, .LC37
+	adrp	x0, .LC38
+	add	x1, x1, :lo12:.LC37
+	add	x0, x0, :lo12:.LC38
 	bl	printf
 	ldr	x0, [x19, #:lo12:.LANCHOR118]
 	mov	w1, 0
 	ldrh	w2, [x20, #:lo12:.LANCHOR116]
 	lsl	w2, w2, 9
 	bl	ftl_memset
-.L1079:
+.L1101:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -7814,18 +7858,18 @@ Ftl_load_ext_data:
 	mov	w20, 19539
 	movk	w20, 0x4654, lsl 16
 	cmp	w0, w20
-	beq	.L1082
+	beq	.L1104
 	mov	w2, 512
 	mov	w1, 0
 	mov	x0, x21
 	bl	ftl_memset
 	str	w20, [x19, #:lo12:.LANCHOR135]
-.L1082:
+.L1104:
 	ldr	w1, [x19, #:lo12:.LANCHOR135]
 	add	x0, x19, :lo12:.LANCHOR135
 	cmp	w1, w20
 	adrp	x1, .LANCHOR91
-	bne	.L1083
+	bne	.L1105
 	adrp	x2, .LANCHOR162
 	ldr	w3, [x0, 88]
 	str	w3, [x2, #:lo12:.LANCHOR162]
@@ -7860,7 +7904,7 @@ Ftl_load_ext_data:
 	ldr	w2, [x0, 48]
 	adrp	x0, .LANCHOR93
 	str	w2, [x0, #:lo12:.LANCHOR93]
-.L1083:
+.L1105:
 	adrp	x0, .LANCHOR14
 	adrp	x2, .LANCHOR90
 	ldr	w1, [x1, #:lo12:.LANCHOR91]
@@ -7873,8 +7917,8 @@ Ftl_load_ext_data:
 	ldp	x29, x30, [sp], 48
 	ldrh	w1, [x1, #:lo12:.LANCHOR5]
 	udiv	w0, w0, w1
-	adrp	x1, .LANCHOR145
-	str	w0, [x1, #:lo12:.LANCHOR145]
+	adrp	x1, .LANCHOR143
+	str	w0, [x1, #:lo12:.LANCHOR143]
 	ret
 	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
 	.section	.text.sftl_vendor_read,"ax",@progbits
@@ -7891,7 +7935,7 @@ sftl_vendor_read:
 	.type	FtlMapBlkWriteDump_data, %function
 FtlMapBlkWriteDump_data:
 	ldr	w1, [x0, 56]
-	cbz	w1, .L1086
+	cbz	w1, .L1108
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
@@ -7912,16 +7956,16 @@ FtlMapBlkWriteDump_data:
 	str	x24, [x21, 16]
 	str	wzr, [x19, 56]
 	ldr	x25, [x19, 40]
-	cbz	w0, .L1088
+	cbz	w0, .L1110
 	adrp	x1, .LANCHOR20
 	ldrh	w1, [x1, #:lo12:.LANCHOR20]
 	sub	w1, w1, #1
 	cmp	w0, w1
-	bge	.L1088
+	bge	.L1110
 	ldrh	w1, [x19]
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L1088
+	beq	.L1110
 	ldr	x2, [x19, 16]
 	ubfiz	x1, x1, 1, 16
 	sub	w0, w0, #1
@@ -7934,16 +7978,16 @@ FtlMapBlkWriteDump_data:
 	bl	FlashReadPages
 	ldr	w0, [x23, #:lo12:.LANCHOR138]
 	cmn	w0, #1
-	beq	.L1088
+	beq	.L1110
 	ldrh	w1, [x24, 8]
 	ldr	x2, [x19, 40]
 	ubfiz	x0, x1, 2, 16
 	ldr	w2, [x2, x0]
 	ldr	w0, [x21, 4]
 	cmp	w2, w0
-	bne	.L1088
+	bne	.L1110
 	ldr	x2, [x21, 8]
-.L1100:
+.L1122:
 	mov	x0, x19
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -7951,30 +7995,30 @@ FtlMapBlkWriteDump_data:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	b	FtlMapWritePage
-.L1088:
+.L1110:
 	sub	w20, w20, #1
 	and	w20, w20, 65535
 	ubfiz	x0, x20, 2, 16
 	ldr	w1, [x25, x0]
 	add	x0, x22, :lo12:.LANCHOR138
 	str	w1, [x0, 4]
-	cbz	w1, .L1089
+	cbz	w1, .L1111
 	mov	w2, 1
 	mov	w1, w2
 	bl	FlashReadPages
-.L1090:
+.L1112:
 	add	x22, x22, :lo12:.LANCHOR138
 	mov	w1, w20
 	ldr	x2, [x22, 8]
-	b	.L1100
-.L1089:
+	b	.L1122
+.L1111:
 	adrp	x1, .LANCHOR23
 	ldr	x0, [x0, 8]
 	ldrh	w2, [x1, #:lo12:.LANCHOR23]
 	mov	w1, 255
 	bl	ftl_memset
-	b	.L1090
-.L1086:
+	b	.L1112
+.L1108:
 	ret
 	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
 	.section	.text.FtlVpcTblFlush,"ax",@progbits
@@ -8094,7 +8138,7 @@ FtlVpcTblFlush:
 	add	x24, x24, :lo12:.LANCHOR20
 	str	w0, [x29, 108]
 	str	x24, [x29, 96]
-.L1102:
+.L1124:
 	ldrh	w2, [x28, 2]
 	ldrh	w1, [x28]
 	ldr	x0, [x22, #:lo12:.LANCHOR106]
@@ -8106,7 +8150,7 @@ FtlVpcTblFlush:
 	ldrh	w0, [x24]
 	sub	w0, w0, #1
 	cmp	w2, w0
-	blt	.L1103
+	blt	.L1125
 	ldrh	w0, [x28, 4]
 	strh	wzr, [x28, 2]
 	strh	w1, [x28, 4]
@@ -8121,7 +8165,7 @@ FtlVpcTblFlush:
 	str	w2, [x19, 4]
 	strh	w0, [x27, 2]
 	str	w1, [x27, 4]
-.L1103:
+.L1125:
 	ldrh	w1, [x26, #:lo12:.LANCHOR23]
 	ldr	x0, [x22, #:lo12:.LANCHOR106]
 	bl	js_hash
@@ -8137,49 +8181,49 @@ FtlVpcTblFlush:
 	and	w0, w0, 65535
 	strh	w0, [x28, 2]
 	cmn	w1, #1
-	bne	.L1104
+	bne	.L1126
 	cmp	w0, 1
-	bne	.L1105
+	bne	.L1127
 	adrp	x1, .LANCHOR165
 	adrp	x0, .LC1
 	mov	w2, 1138
 	add	x1, x1, :lo12:.LANCHOR165
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1105:
+.L1127:
 	ldrh	w0, [x28, 2]
 	cmp	w0, 1
-	bne	.L1106
+	bne	.L1128
 	ldr	x0, [x29, 96]
 	ldrh	w0, [x0]
 	sub	w0, w0, #1
 	strh	w0, [x28, 2]
-.L1106:
+.L1128:
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	cmp	w20, 3
-	bls	.L1102
+	bls	.L1124
 	add	x21, x21, :lo12:.LANCHOR138
-	adrp	x0, .LC35
+	adrp	x0, .LC39
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC35
+	add	x0, x0, :lo12:.LC39
 	ldr	w1, [x21, 4]
 	bl	printf
-.L1108:
-	b	.L1108
-.L1104:
+.L1130:
+	b	.L1130
+.L1126:
 	cmp	w0, 1
-	beq	.L1102
+	beq	.L1124
 	cmp	w1, 256
-	beq	.L1102
+	beq	.L1124
 	ldr	w1, [x29, 108]
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L1109
+	beq	.L1131
 	ldrh	w0, [x29, 108]
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.L1109:
+.L1131:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -8212,14 +8256,14 @@ sftl_deinit:
 	adrp	x0, .LANCHOR166
 	ldr	w0, [x0, #:lo12:.LANCHOR166]
 	cmp	w0, 1
-	bne	.L1122
+	bne	.L1144
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	FtlSysFlush
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1122:
+.L1144:
 	mov	w0, 0
 	ret
 	.size	sftl_deinit, .-sftl_deinit
@@ -8238,56 +8282,56 @@ FtlDiscard:
 	str	x23, [sp, 48]
 	ldr	w1, [x1, #:lo12:.LANCHOR34]
 	cmp	w2, w1
-	bhi	.L1133
+	bhi	.L1155
 	cmp	w19, 31
-	bhi	.L1127
-.L1141:
+	bhi	.L1149
+.L1163:
 	mov	w0, 0
-.L1125:
+.L1147:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1127:
+.L1149:
 	adrp	x21, .LANCHOR12
 	ldrh	w1, [x21, #:lo12:.LANCHOR12]
 	udiv	w20, w0, w1
 	msub	w0, w1, w20, w0
 	ands	w0, w0, 65535
-	beq	.L1128
+	beq	.L1150
 	sub	w1, w1, w0
 	add	w20, w20, 1
 	cmp	w1, w19
 	csel	w1, w1, w19, ls
 	sub	w19, w19, w1, uxth
-.L1128:
+.L1150:
 	adrp	x22, .LANCHOR167
 	adrp	x23, .LANCHOR86
 	add	x22, x22, :lo12:.LANCHOR167
 	add	x23, x23, :lo12:.LANCHOR86
 	mov	w0, -1
 	str	w0, [x29, 76]
-.L1129:
+.L1151:
 	ldrh	w0, [x21, #:lo12:.LANCHOR12]
 	cmp	w19, w0
-	bcs	.L1131
+	bcs	.L1153
 	adrp	x0, .LANCHOR167
 	ldr	w1, [x0, #:lo12:.LANCHOR167]
 	cmp	w1, 32
-	bls	.L1141
+	bls	.L1163
 	str	wzr, [x0, #:lo12:.LANCHOR167]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L1141
-.L1131:
+	b	.L1163
+.L1153:
 	mov	w2, 0
 	add	x1, x29, 72
 	mov	w0, w20
 	bl	log2phys
 	ldr	w0, [x29, 72]
 	cmn	w0, #1
-	beq	.L1130
+	beq	.L1152
 	ldr	w0, [x22]
 	mov	w2, 1
 	add	x1, x29, 76
@@ -8302,14 +8346,14 @@ FtlDiscard:
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L1130:
+.L1152:
 	ldrh	w0, [x21, #:lo12:.LANCHOR12]
 	add	w20, w20, 1
 	sub	w19, w19, w0
-	b	.L1129
-.L1133:
+	b	.L1151
+.L1155:
 	mov	w0, -1
-	b	.L1125
+	b	.L1147
 	.size	FtlDiscard, .-FtlDiscard
 	.section	.text.allocate_new_data_superblock,"ax",@progbits
 	.align	2
@@ -8325,25 +8369,25 @@ allocate_new_data_superblock:
 	adrp	x0, .LANCHOR5
 	ldrh	w0, [x0, #:lo12:.LANCHOR5]
 	cmp	w0, w19
-	bcs	.L1143
+	bcs	.L1165
 	adrp	x1, .LANCHOR168
 	adrp	x0, .LC1
-	mov	w2, 2760
+	mov	w2, 2755
 	add	x1, x1, :lo12:.LANCHOR168
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1143:
+.L1165:
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1144
+	beq	.L1166
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x19, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1145
+	cbz	w0, .L1167
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-.L1144:
+.L1166:
 	adrp	x1, .LANCHOR131
 	mov	w0, 1
 	strb	w0, [x21, 8]
@@ -8351,20 +8395,20 @@ allocate_new_data_superblock:
 	ldrh	w0, [x1, #:lo12:.LANCHOR131]
 	mov	x20, x1
 	cmp	w0, w2
-	beq	.L1146
+	beq	.L1168
 	cmp	w19, w0
-	bne	.L1147
+	bne	.L1169
 	adrp	x2, .LANCHOR42
 	ubfiz	x1, x0, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR42]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1148
-.L1147:
+	cbz	w1, .L1170
+.L1169:
 	bl	update_vpc_list
-.L1148:
+.L1170:
 	mov	w0, -1
 	strh	w0, [x20, #:lo12:.LANCHOR131]
-.L1146:
+.L1168:
 	mov	x0, x21
 	bl	allocate_data_superblock
 	bl	l2p_flush
@@ -8376,96 +8420,79 @@ allocate_new_data_superblock:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1145:
+.L1167:
 	mov	w0, w19
 	bl	INSERT_FREE_LIST
-	b	.L1144
+	b	.L1166
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
 	.section	.text.FtlProgPages,"ax",@progbits
 	.align	2
 	.global	FtlProgPages
 	.type	FtlProgPages, %function
 FtlProgPages:
-	stp	x29, x30, [sp, -96]!
+	stp	x29, x30, [sp, -80]!
 	mov	w2, 0
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	mov	x19, x3
-	stp	x23, x24, [sp, 48]
-	add	x20, x0, 4
+	mov	x20, x3
 	stp	x21, x22, [sp, 32]
 	mov	w21, w1
-	str	x25, [sp, 64]
+	stp	x23, x24, [sp, 48]
 	ubfiz	x21, x21, 5, 32
+	mov	x22, x0
 	add	x21, x21, 4
-	adrp	x24, .LANCHOR19
 	ldrb	w3, [x3, 9]
-	adrp	x23, .LANCHOR135
-	add	x21, x0, x21
-	add	x24, x24, :lo12:.LANCHOR19
-	add	x23, x23, :lo12:.LANCHOR135
+	adrp	x23, .LC40
+	adrp	x24, .LANCHOR3
+	add	x19, x22, 4
+	add	x21, x22, x21
+	add	x23, x23, :lo12:.LC40
+	add	x24, x24, :lo12:.LANCHOR3
 	bl	FlashProgPages
-.L1154:
-	cmp	x20, x21
-	beq	.L1161
-	sub	x22, x20, #4
-	adrp	x25, .LANCHOR42
-	b	.L1162
-.L1157:
-	ldr	w0, [x20]
+.L1176:
+	cmp	x21, x19
+	beq	.L1182
+	sub	x22, x19, #4
+	b	.L1183
+.L1178:
+	ldr	w1, [x19]
+	mov	x0, x23
+	bl	printf
+	ldr	w0, [x19]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-	ldrh	w1, [x19]
-	cmp	w1, w0, uxth
-	bne	.L1155
-	ldr	x2, [x25, #:lo12:.LANCHOR42]
-	ubfiz	x1, x1, 1, 16
-	ldrh	w3, [x19, 4]
-	ldrh	w0, [x2, x1]
-	sub	w0, w0, w3
-	strh	w0, [x2, x1]
-	strb	wzr, [x19, 6]
-	ldrh	w0, [x24]
-	strh	w0, [x19, 2]
-	strh	wzr, [x19, 4]
-.L1155:
-	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1156
-	mov	x0, x19
+	bl	decrement_vpc_count
+	ldrh	w0, [x20, 4]
+	cbnz	w0, .L1177
+	mov	x0, x20
 	bl	allocate_new_data_superblock
-.L1156:
-	ldr	w0, [x23, 96]
-	add	w0, w0, 1
-	str	w0, [x23, 96]
-	ldr	w0, [x20]
-	lsr	w0, w0, 10
-	bl	FtlGcMarkBadPhyBlk
-	mov	x0, x19
+.L1177:
+	mov	x0, x20
 	bl	get_new_active_ppa
-	str	w0, [x20]
+	str	w0, [x19]
 	mov	w2, 0
-	str	w0, [x29, 92]
+	str	w0, [x29, 76]
 	mov	w1, 1
-	ldrb	w3, [x19, 9]
+	ldrb	w3, [x20, 9]
 	mov	x0, x22
 	bl	FlashProgPages
-.L1162:
-	ldr	w0, [x20, -4]
-	cmn	w0, #1
-	beq	.L1157
-	adrp	x0, .LANCHOR3
-	ldrb	w1, [x19, 6]
-	ldrh	w0, [x0, #:lo12:.LANCHOR3]
+.L1183:
+	ldr	w2, [x19, -4]
+	cmp	w2, 256
+	ccmn	w2, #1, 4, ne
+	beq	.L1178
+	ldrb	w1, [x20, 6]
+	ldrh	w0, [x24]
 	cmp	w1, w0
-	bcc	.L1158
+	bcc	.L1179
 	adrp	x1, .LANCHOR169
 	adrp	x0, .LC1
-	mov	w2, 960
+	mov	w2, 982
 	add	x1, x1, :lo12:.LANCHOR169
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1158:
-	add	x1, x29, 96
+.L1179:
+	add	x1, x29, 80
 	ldr	w0, [x22, 4]
 	mov	w2, 1
 	str	w0, [x1, -4]!
@@ -8478,40 +8505,39 @@ FtlProgPages:
 	and	w1, w0, 65535
 	mov	w22, w1
 	cmn	w3, #1
-	beq	.L1159
+	beq	.L1180
 	adrp	x2, .LANCHOR42
 	ubfiz	x0, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR42]
 	ldrh	w0, [x2, x0]
-	cbnz	w0, .L1160
-	adrp	x0, .LC36
+	cbnz	w0, .L1181
+	adrp	x0, .LC41
 	mov	w2, 0
-	add	x0, x0, :lo12:.LC36
+	add	x0, x0, :lo12:.LC41
 	bl	printf
-.L1160:
+.L1181:
 	mov	w0, w22
 	bl	decrement_vpc_count
-.L1159:
-	add	x20, x20, 32
-	b	.L1154
-.L1161:
+.L1180:
+	add	x19, x19, 32
+	b	.L1176
+.L1182:
 	adrp	x0, .LANCHOR3
-	ldrb	w1, [x19, 6]
+	ldrb	w1, [x20, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1153
+	bcc	.L1175
 	adrp	x1, .LANCHOR169
 	adrp	x0, .LC1
-	mov	w2, 975
+	mov	w2, 997
 	add	x1, x1, :lo12:.LANCHOR169
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1153:
+.L1175:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldr	x25, [sp, 64]
-	ldp	x29, x30, [sp], 96
+	ldp	x29, x30, [sp], 80
 	ret
 	.size	FtlProgPages, .-FtlProgPages
 	.section	.text.FtlGcFreeTempBlock,"ax",@progbits
@@ -8525,64 +8551,25 @@ FtlGcFreeTempBlock:
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR53
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR133
-	ldrh	w20, [x19, #:lo12:.LANCHOR53]
+	ldrh	w2, [x19, #:lo12:.LANCHOR53]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	cmp	w20, w1
-	str	x27, [sp, 80]
-	beq	.L1169
+	cmp	w2, w1
+	stp	x27, x28, [sp, 80]
+	beq	.L1190
 	adrp	x1, .LANCHOR19
 	add	x0, x19, :lo12:.LANCHOR53
 	ldrh	w1, [x1, #:lo12:.LANCHOR19]
 	bl	FtlGcScanTempBlk
 	str	w0, [x29, 108]
-	cmn	w0, #1
-	beq	.L1169
-	adrp	x0, .LANCHOR43
-	ubfiz	x20, x20, 1, 16
-	ldr	x1, [x0, #:lo12:.LANCHOR43]
-	ldrh	w0, [x1, x20]
-	cmp	w0, 4
-	bls	.L1170
-	sub	w0, w0, #5
-	strh	w0, [x1, x20]
-	mov	w0, 1
-	bl	FtlEctTblFlush
-.L1170:
-	ldr	w0, [x21, #:lo12:.LANCHOR133]
-	cbnz	w0, .L1171
-	adrp	x0, .LANCHOR135
-	add	x0, x0, :lo12:.LANCHOR135
-	ldr	w1, [x0, 96]
-	add	w1, w1, 1
-	str	w1, [x0, 96]
-	ldr	w0, [x29, 108]
-	lsr	w0, w0, 10
-	bl	FtlBbmMapBadBlock
-	bl	FtlBbmTblFlush
-.L1171:
-	str	wzr, [x21, #:lo12:.LANCHOR133]
-	mov	w0, 1
-.L1168:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldr	x27, [sp, 80]
-	ldp	x29, x30, [sp], 112
-	ret
-.L1169:
+.L1190:
+	adrp	x0, .LANCHOR133
 	ldrh	w2, [x19, #:lo12:.LANCHOR53]
 	mov	w1, 65535
-	str	wzr, [x21, #:lo12:.LANCHOR133]
-	add	x0, x19, :lo12:.LANCHOR53
+	str	wzr, [x0, #:lo12:.LANCHOR133]
 	cmp	w2, w1
-	bne	.L1173
-.L1188:
-	mov	w0, 0
-	b	.L1168
-.L1173:
+	add	x0, x19, :lo12:.LANCHOR53
+	beq	.L1192
 	ldrb	w1, [x0, 7]
 	adrp	x0, .LANCHOR19
 	adrp	x20, .LANCHOR70
@@ -8591,25 +8578,25 @@ FtlGcFreeTempBlock:
 	ldrh	w2, [x20, #:lo12:.LANCHOR70]
 	mul	w1, w1, w3
 	cmp	w2, w1
-	beq	.L1174
+	beq	.L1193
 	adrp	x1, .LANCHOR170
 	adrp	x0, .LC1
-	mov	w2, 162
+	mov	w2, 164
 	add	x1, x1, :lo12:.LANCHOR170
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1174:
+.L1193:
 	add	x0, x19, :lo12:.LANCHOR53
-	adrp	x23, .LANCHOR42
+	adrp	x22, .LANCHOR42
 	ldrh	w3, [x21, #:lo12:.LANCHOR19]
 	adrp	x25, .LANCHOR152
 	ldrh	w2, [x19, #:lo12:.LANCHOR53]
-	adrp	x26, .LANCHOR170
+	add	x26, x20, :lo12:.LANCHOR70
 	ldrb	w0, [x0, 7]
 	add	x25, x25, :lo12:.LANCHOR152
-	ldr	x1, [x23, #:lo12:.LANCHOR42]
-	add	x26, x26, :lo12:.LANCHOR170
+	ldr	x1, [x22, #:lo12:.LANCHOR42]
 	mov	w21, 0
+	adrp	x27, .LANCHOR71
 	mul	w0, w0, w3
 	strh	w0, [x1, x2, lsl 1]
 	adrp	x1, .LANCHOR84
@@ -8617,19 +8604,19 @@ FtlGcFreeTempBlock:
 	ldr	w2, [x1, #:lo12:.LANCHOR84]
 	add	w0, w0, w2
 	str	w0, [x1, #:lo12:.LANCHOR84]
-.L1175:
-	ldrh	w0, [x20, #:lo12:.LANCHOR70]
+.L1194:
+	ldrh	w0, [x26]
 	cmp	w0, w21
-	bhi	.L1179
+	bhi	.L1198
 	mov	w0, -1
 	bl	decrement_vpc_count
 	ldrh	w0, [x19, #:lo12:.LANCHOR53]
-	ldr	x2, [x23, #:lo12:.LANCHOR42]
+	ldr	x2, [x22, #:lo12:.LANCHOR42]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1180
+	cbz	w1, .L1199
 	bl	INSERT_DATA_LIST
-.L1181:
+.L1200:
 	adrp	x0, .LANCHOR68
 	mov	w21, -1
 	strh	wzr, [x20, #:lo12:.LANCHOR70]
@@ -8637,66 +8624,69 @@ FtlGcFreeTempBlock:
 	strh	wzr, [x0, #:lo12:.LANCHOR68]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	adrp	x0, .LANCHOR144
-	strh	w21, [x0, #:lo12:.LANCHOR144]
+	adrp	x0, .LANCHOR145
+	strh	w21, [x0, #:lo12:.LANCHOR145]
 	adrp	x0, .LANCHOR48
 	ldrh	w1, [x0, #:lo12:.LANCHOR48]
 	adrp	x0, .LANCHOR171
 	ldrh	w0, [x0, #:lo12:.LANCHOR171]
 	add	w0, w0, w0, lsl 1
 	cmp	w1, w0, lsr 2
-	ble	.L1188
+	ble	.L1192
 	adrp	x0, .LANCHOR100
 	mov	w1, 20
 	strh	w1, [x0, #:lo12:.LANCHOR100]
-	b	.L1188
-.L1179:
-	adrp	x0, .LANCHOR71
+.L1192:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L1198:
 	mov	w24, 12
-	ldr	x27, [x0, #:lo12:.LANCHOR71]
+	ldr	x28, [x27, #:lo12:.LANCHOR71]
+	ldr	w1, [x25]
 	umull	x24, w21, w24
-	ldr	w0, [x25]
-	add	x22, x27, x24
-	ldr	w1, [x22, 8]
-	cmp	w1, w0
-	bcc	.L1176
-	adrp	x0, .LC1
-	mov	w2, 168
-	mov	x1, x26
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L1176:
-	ldr	w0, [x22, 8]
+	add	x23, x28, x24
+	ldr	w0, [x23, 8]
+	cmp	w0, w1
+	bcc	.L1195
+.L1203:
+	ldrh	w0, [x19, #:lo12:.LANCHOR53]
+	b	.L1204
+.L1195:
 	add	x1, x29, 108
 	mov	w2, 0
 	bl	log2phys
-	ldr	w0, [x27, x24]
+	ldr	w0, [x28, x24]
 	ldr	w1, [x29, 108]
 	cmp	w0, w1
-	bne	.L1177
+	bne	.L1197
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	mov	w24, w0
-	ldr	w0, [x22, 8]
+	ldr	w0, [x23, 8]
 	mov	w2, 1
-	add	x1, x22, 4
+	add	x1, x23, 4
 	bl	log2phys
 	mov	w0, w24
-.L1187:
+.L1204:
 	bl	decrement_vpc_count
-.L1178:
+	b	.L1196
+.L1197:
+	ldr	w0, [x23, 4]
+	cmp	w1, w0
+	bne	.L1203
+.L1196:
 	add	w21, w21, 1
 	and	w21, w21, 65535
-	b	.L1175
-.L1177:
-	ldr	w0, [x22, 4]
-	cmp	w1, w0
-	beq	.L1178
-	ldrh	w0, [x19, #:lo12:.LANCHOR53]
-	b	.L1187
-.L1180:
+	b	.L1194
+.L1199:
 	bl	INSERT_FREE_LIST
-	b	.L1181
+	b	.L1200
 	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
 	.section	.text.FtlGcPageRecovery,"ax",@progbits
 	.align	2
@@ -8715,7 +8705,7 @@ FtlGcPageRecovery:
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR19]
 	cmp	w1, w0
-	bcc	.L1189
+	bcc	.L1205
 	adrp	x0, .LANCHOR129
 	add	x0, x0, :lo12:.LANCHOR129
 	bl	FtlMapBlkWriteDump_data
@@ -8723,7 +8713,7 @@ FtlGcPageRecovery:
 	bl	FtlGcFreeTempBlock
 	adrp	x0, .LANCHOR133
 	str	wzr, [x0, #:lo12:.LANCHOR133]
-.L1189:
+.L1205:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -8775,59 +8765,44 @@ Ftl_gc_temp_data_write_back:
 	ldr	x0, [x20, #:lo12:.LANCHOR104]
 	bl	FlashProgPages
 	mov	w11, 0
-.L1195:
+.L1211:
 	ldr	w1, [x19]
 	cmp	w11, w1
-	bcc	.L1198
+	bcc	.L1214
 	ldr	x0, [x20, #:lo12:.LANCHOR104]
 	bl	FtlGcBufFree
 	str	wzr, [x19]
 	adrp	x0, .LANCHOR53+4
 	ldrh	w0, [x0, #:lo12:.LANCHOR53+4]
-	cbnz	w0, .L1199
+	cbnz	w0, .L1216
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
-	b	.L1201
-.L1198:
+	mov	w0, 1
+.L1210:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L1214:
 	ldr	x2, [x20, #:lo12:.LANCHOR104]
 	ubfiz	x0, x11, 5, 16
 	add	x1, x2, x0
 	ldr	w2, [x2, x0]
+	ldr	x3, [x1, 16]
 	cmn	w2, #1
-	bne	.L1196
-	adrp	x0, .LANCHOR53
-	adrp	x3, .LANCHOR42
-	ldrh	w4, [x0, #:lo12:.LANCHOR53]
-	ldr	x3, [x3, #:lo12:.LANCHOR42]
-	strh	wzr, [x3, x4, lsl 1]
-	strh	w2, [x0, #:lo12:.LANCHOR53]
-	adrp	x0, .LANCHOR135
-	add	x0, x0, :lo12:.LANCHOR135
-	ldr	w2, [x0, 96]
-	add	w2, w2, 1
-	str	w2, [x0, 96]
-	ldr	w0, [x1, 4]
-	lsr	w0, w0, 10
-	bl	FtlBbmMapBadBlock
-	bl	FtlBbmTblFlush
-	bl	FtlGcPageVarInit
-.L1201:
-	mov	w0, 1
-.L1194:
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	ret
-.L1196:
-	ldr	x0, [x1, 16]
+	bne	.L1212
+.L1218:
 	ldr	w1, [x1, 4]
-	ldp	w2, w0, [x0, 8]
+	ldr	w0, [x3, 12]
 	bl	FtlGcUpdatePage
 	add	w11, w11, 1
 	and	w11, w11, 65535
-	b	.L1195
-.L1199:
+	b	.L1211
+.L1212:
+	ldr	w2, [x3, 8]
+	b	.L1218
+.L1216:
 	mov	w0, 0
-	b	.L1194
+	b	.L1210
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
 	.section	.text.Ftl_get_new_temp_ppa,"ax",@progbits
 	.align	2
@@ -8842,11 +8817,11 @@ Ftl_get_new_temp_ppa:
 	mov	x19, x0
 	ldrh	w3, [x0, #:lo12:.LANCHOR53]
 	cmp	w3, w2
-	beq	.L1203
+	beq	.L1220
 	add	x1, x0, :lo12:.LANCHOR53
 	ldrh	w0, [x1, 4]
-	cbnz	w0, .L1204
-.L1203:
+	cbnz	w0, .L1221
+.L1220:
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
 	add	x0, x19, :lo12:.LANCHOR53
@@ -8860,7 +8835,7 @@ Ftl_get_new_temp_ppa:
 	mov	w0, 0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1204:
+.L1221:
 	add	x0, x19, :lo12:.LANCHOR53
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -8880,69 +8855,69 @@ rk_ftl_garbage_collect:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w1, .L1258
-	adrp	x1, .LANCHOR45
-	ldrh	w1, [x1, #:lo12:.LANCHOR45]
+	cbnz	w1, .L1280
+	adrp	x1, .LANCHOR44
+	ldrh	w1, [x1, #:lo12:.LANCHOR44]
 	cmp	w1, 47
-	bls	.L1258
+	bls	.L1280
 	adrp	x1, .LANCHOR73
 	mov	w4, 65535
 	ldrh	w3, [x1, #:lo12:.LANCHOR73]
 	cmp	w3, w4
-	beq	.L1208
+	beq	.L1225
 	adrp	x2, .LANCHOR72
 	ldrh	w5, [x2, #:lo12:.LANCHOR72]
 	cmp	w5, w4
-	bne	.L1208
+	bne	.L1225
 	strh	w3, [x2, #:lo12:.LANCHOR72]
 	mov	w2, -1
 	strh	w2, [x1, #:lo12:.LANCHOR73]
-.L1208:
-	cbnz	w0, .L1259
+.L1225:
+	cbnz	w0, .L1281
 	adrp	x1, .LANCHOR48
 	ldrh	w1, [x1, #:lo12:.LANCHOR48]
 	cmp	w1, 24
-	bhi	.L1260
+	bhi	.L1282
 	adrp	x2, .LANCHOR19
 	cmp	w1, 16
 	ldrh	w20, [x2, #:lo12:.LANCHOR19]
-	bls	.L1211
+	bls	.L1228
 	lsr	w20, w20, 5
-.L1210:
+.L1227:
 	adrp	x2, .LANCHOR100
 	ldrh	w3, [x2, #:lo12:.LANCHOR100]
 	cmp	w3, w1
 	mov	x3, x2
-	bcs	.L1214
+	bcs	.L1231
 	adrp	x1, .LANCHOR53
 	mov	w4, 65535
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	cmp	w1, w4
-	bne	.L1215
+	bne	.L1232
 	adrp	x4, .LANCHOR72
 	ldrh	w4, [x4, #:lo12:.LANCHOR72]
 	cmp	w4, w1
-	bne	.L1215
+	bne	.L1232
 	adrp	x0, .LANCHOR172
 	ldrh	w0, [x0, #:lo12:.LANCHOR172]
-	cbnz	w0, .L1216
+	cbnz	w0, .L1233
 	adrp	x1, .LANCHOR152
 	adrp	x4, .LANCHOR59
 	ldr	w1, [x1, #:lo12:.LANCHOR152]
 	ldr	w4, [x4, #:lo12:.LANCHOR59]
 	add	w1, w1, w1, lsl 1
 	cmp	w4, w1, lsr 2
-	bcs	.L1217
-.L1216:
+	bcs	.L1234
+.L1233:
 	adrp	x1, .LANCHOR171
 	ldrh	w1, [x1, #:lo12:.LANCHOR171]
 	add	w1, w1, w1, lsl 1
 	asr	w1, w1, 2
 	strh	w1, [x3, #:lo12:.LANCHOR100]
-.L1218:
+.L1235:
 	adrp	x1, .LANCHOR95
 	str	wzr, [x1, #:lo12:.LANCHOR95]
-.L1206:
+.L1223:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -8950,79 +8925,79 @@ rk_ftl_garbage_collect:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1211:
+.L1228:
 	cmp	w1, 12
-	bls	.L1212
+	bls	.L1229
 	lsr	w20, w20, 4
-	b	.L1210
-.L1212:
+	b	.L1227
+.L1229:
 	cmp	w1, 8
-	bls	.L1210
+	bls	.L1227
 	lsr	w20, w20, 2
-	b	.L1210
-.L1260:
+	b	.L1227
+.L1282:
 	mov	w20, 1
-	b	.L1210
-.L1217:
+	b	.L1227
+.L1234:
 	mov	w1, 18
 	strh	w1, [x2, #:lo12:.LANCHOR100]
-	b	.L1218
-.L1215:
+	b	.L1235
+.L1232:
 	adrp	x1, .LANCHOR171
 	ldrh	w1, [x1, #:lo12:.LANCHOR171]
 	add	w1, w1, w1, lsl 1
 	asr	w1, w1, 2
 	strh	w1, [x3, #:lo12:.LANCHOR100]
-.L1214:
+.L1231:
 	adrp	x1, .LANCHOR74
 	ldrh	w1, [x1, #:lo12:.LANCHOR74]
-	cbz	w1, .L1209
+	cbz	w1, .L1226
 	add	w20, w20, 32
 	and	w20, w20, 65535
-.L1209:
-	adrp	x19, .LANCHOR144
+.L1226:
+	adrp	x19, .LANCHOR145
 	str	w0, [x29, 152]
 	mov	w0, 65535
-	ldrh	w2, [x19, #:lo12:.LANCHOR144]
+	ldrh	w2, [x19, #:lo12:.LANCHOR145]
 	cmp	w2, w0
-	bne	.L1221
+	bne	.L1238
 	adrp	x0, .LANCHOR72
 	ldrh	w1, [x0, #:lo12:.LANCHOR72]
 	cmp	w1, w2
-	beq	.L1222
+	beq	.L1239
 	adrp	x2, .LANCHOR42
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR42]
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L1223
+	cbnz	w1, .L1240
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR72]
-.L1223:
+.L1240:
 	ldrh	w1, [x0, #:lo12:.LANCHOR72]
-	strh	w1, [x19, #:lo12:.LANCHOR144]
+	strh	w1, [x19, #:lo12:.LANCHOR145]
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR72]
-.L1222:
-	add	x0, x19, :lo12:.LANCHOR144
+.L1239:
+	add	x0, x19, :lo12:.LANCHOR145
 	mov	w1, 65535
 	strb	wzr, [x0, 8]
-	ldrh	w0, [x19, #:lo12:.LANCHOR144]
+	ldrh	w0, [x19, #:lo12:.LANCHOR145]
 	cmp	w0, w1
-	beq	.L1221
+	beq	.L1238
 	bl	IsBlkInGcList
-	cbz	w0, .L1225
+	cbz	w0, .L1242
 	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR144]
-.L1225:
-	ldrh	w1, [x19, #:lo12:.LANCHOR144]
+	strh	w0, [x19, #:lo12:.LANCHOR145]
+.L1242:
+	ldrh	w1, [x19, #:lo12:.LANCHOR145]
 	mov	w0, 65535
-	add	x22, x19, :lo12:.LANCHOR144
+	add	x22, x19, :lo12:.LANCHOR145
 	cmp	w1, w0
-	beq	.L1221
+	beq	.L1238
 	mov	x0, x22
 	bl	make_superblock
 	adrp	x0, .LANCHOR173
-	ldrh	w1, [x19, #:lo12:.LANCHOR144]
+	ldrh	w1, [x19, #:lo12:.LANCHOR145]
 	strh	wzr, [x22, 2]
 	strh	wzr, [x0, #:lo12:.LANCHOR173]
 	adrp	x0, .LANCHOR42
@@ -9031,56 +9006,60 @@ rk_ftl_garbage_collect:
 	ldrh	w1, [x0, x1, lsl 1]
 	adrp	x0, .LANCHOR174
 	strh	w1, [x0, #:lo12:.LANCHOR174]
-.L1221:
+.L1238:
 	adrp	x1, .LANCHOR51
-	ldrh	w0, [x19, #:lo12:.LANCHOR144]
+	ldrh	w0, [x19, #:lo12:.LANCHOR145]
 	str	x1, [x29, 128]
 	ldrh	w2, [x1, #:lo12:.LANCHOR51]
 	cmp	w2, w0
-	beq	.L1226
+	beq	.L1243
 	adrp	x1, .LANCHOR52
 	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bne	.L1227
-.L1226:
+	beq	.L1243
+	adrp	x1, .LANCHOR53
+	ldrh	w1, [x1, #:lo12:.LANCHOR53]
+	cmp	w1, w0
+	bne	.L1244
+.L1243:
 	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR144]
-.L1227:
+	strh	w0, [x19, #:lo12:.LANCHOR145]
+.L1244:
 	adrp	x25, .LANCHOR102
 	add	x26, x25, :lo12:.LANCHOR102
-.L1256:
-	ldrh	w1, [x19, #:lo12:.LANCHOR144]
+.L1278:
+	ldrh	w1, [x19, #:lo12:.LANCHOR145]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1228
+	bne	.L1245
 	adrp	x0, .LANCHOR95
 	adrp	x22, .LANCHOR19
 	add	x22, x22, :lo12:.LANCHOR19
 	str	wzr, [x0, #:lo12:.LANCHOR95]
-.L1229:
+.L1246:
 	ldrh	w5, [x25, #:lo12:.LANCHOR102]
 	add	x7, x25, :lo12:.LANCHOR102
 	mov	w0, w5
 	bl	List_get_gc_head_node
 	and	w6, w0, 65535
-	strh	w6, [x19, #:lo12:.LANCHOR144]
+	strh	w6, [x19, #:lo12:.LANCHOR145]
 	mov	w0, 65535
 	cmp	w6, w0
-	bne	.L1230
+	bne	.L1247
 	strh	wzr, [x7]
 	mov	w0, 8
-	b	.L1206
-.L1259:
+	b	.L1223
+.L1281:
 	mov	w20, 1
-	b	.L1209
-.L1230:
+	b	.L1226
+.L1247:
 	mov	w0, w6
 	bl	IsBlkInGcList
 	add	w5, w5, 1
-	cbz	w0, .L1231
+	cbz	w0, .L1248
 	strh	w5, [x25, #:lo12:.LANCHOR102]
-	b	.L1229
-.L1231:
+	b	.L1246
+.L1248:
 	adrp	x23, .LANCHOR42
 	adrp	x4, .LANCHOR3
 	ldrh	w0, [x22]
@@ -9092,82 +9071,82 @@ rk_ftl_garbage_collect:
 	ldrh	w3, [x2, x1]
 	mul	w0, w0, w4
 	cmp	w3, w0, asr 1
-	bgt	.L1233
+	bgt	.L1250
 	cmp	w5, 48
-	bls	.L1234
+	bls	.L1251
 	cmp	w3, 8
-	bls	.L1234
+	bls	.L1251
 	adrp	x3, .LANCHOR68
 	ldrh	w3, [x3, #:lo12:.LANCHOR68]
 	cmp	w3, 35
-	bhi	.L1234
-.L1233:
+	bhi	.L1251
+.L1250:
 	strh	wzr, [x26]
-.L1234:
+.L1251:
 	ldrh	w1, [x2, x1]
 	cmp	w0, w1
-	bgt	.L1235
+	bgt	.L1252
 	ldrh	w0, [x26]
 	cmp	w0, 3
-	bhi	.L1235
+	bhi	.L1252
 	mov	w0, -1
 	strh	wzr, [x26]
-	strh	w0, [x19, #:lo12:.LANCHOR144]
-.L1286:
+	strh	w0, [x19, #:lo12:.LANCHOR145]
+.L1311:
 	adrp	x0, .LANCHOR172
 	ldrh	w0, [x0, #:lo12:.LANCHOR172]
-	b	.L1206
-.L1235:
-	cbnz	w1, .L1236
+	b	.L1223
+.L1252:
+	cbnz	w1, .L1253
 	mov	w0, -1
 	bl	decrement_vpc_count
 	ldrh	w0, [x26]
 	add	w0, w0, 1
 	strh	w0, [x26]
-	b	.L1229
-.L1236:
-	add	x0, x19, :lo12:.LANCHOR144
+	b	.L1246
+.L1253:
+	add	x0, x19, :lo12:.LANCHOR145
 	strb	wzr, [x0, 8]
 	ldr	x0, [x29, 128]
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w6
-	bne	.L1237
+	bne	.L1254
 	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
-	mov	w2, 700
+	mov	w2, 717
 	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1237:
+.L1254:
 	adrp	x0, .LANCHOR52
-	ldrh	w1, [x19, #:lo12:.LANCHOR144]
+	ldrh	w1, [x19, #:lo12:.LANCHOR145]
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bne	.L1238
+	bne	.L1255
 	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
-	mov	w2, 701
+	mov	w2, 718
 	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1238:
+.L1255:
 	adrp	x0, .LANCHOR53
-	ldrh	w1, [x19, #:lo12:.LANCHOR144]
+	ldrh	w1, [x19, #:lo12:.LANCHOR145]
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L1239
+	bne	.L1256
 	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
-	mov	w2, 702
+	mov	w2, 719
 	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1239:
-	add	x22, x19, :lo12:.LANCHOR144
+.L1256:
+	add	x22, x19, :lo12:.LANCHOR145
 	mov	x0, x22
 	bl	make_superblock
 	adrp	x0, .LANCHOR173
-	ldrh	w1, [x19, #:lo12:.LANCHOR144]
+	ldrh	w1, [x19, #:lo12:.LANCHOR145]
 	strh	wzr, [x0, #:lo12:.LANCHOR173]
 	ldr	x0, [x23, #:lo12:.LANCHOR42]
 	ldrh	w1, [x0, x1, lsl 1]
@@ -9175,7 +9154,7 @@ rk_ftl_garbage_collect:
 	strh	wzr, [x22, 2]
 	strh	w1, [x0, #:lo12:.LANCHOR174]
 	strb	wzr, [x22, 6]
-.L1228:
+.L1245:
 	mov	w0, 1
 	str	w0, [x21, #:lo12:.LANCHOR94]
 	adrp	x0, .LANCHOR19
@@ -9183,9 +9162,9 @@ rk_ftl_garbage_collect:
 	ldrh	w1, [x0, #:lo12:.LANCHOR19]
 	ldr	w0, [x29, 152]
 	str	w1, [x29, 156]
-	cbz	w0, .L1240
+	cbz	w0, .L1257
 	adrp	x0, .LANCHOR3
-	ldrh	w2, [x19, #:lo12:.LANCHOR144]
+	ldrh	w2, [x19, #:lo12:.LANCHOR145]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	mul	w0, w0, w1
 	adrp	x1, .LANCHOR42
@@ -9196,24 +9175,24 @@ rk_ftl_garbage_collect:
 	sdiv	w0, w0, w1
 	add	w20, w20, w0
 	and	w20, w20, 65535
-.L1240:
-	add	x0, x19, :lo12:.LANCHOR144
+.L1257:
+	add	x0, x19, :lo12:.LANCHOR145
 	ldr	w2, [x29, 156]
 	ldrh	w0, [x0, 2]
 	add	w1, w0, w20
 	cmp	w1, w2
-	ble	.L1241
+	ble	.L1258
 	sub	w20, w2, w0
 	and	w20, w20, 65535
-.L1241:
+.L1258:
 	adrp	x0, .LANCHOR173
 	mov	w28, 0
 	add	x0, x0, :lo12:.LANCHOR173
 	str	x0, [x29, 144]
-.L1242:
+.L1259:
 	cmp	w20, w28, uxth
-	bls	.L1250
-	add	x1, x19, :lo12:.LANCHOR144
+	bls	.L1267
+	add	x1, x19, :lo12:.LANCHOR145
 	adrp	x0, .LANCHOR3
 	adrp	x23, .LANCHOR66
 	add	x1, x1, 16
@@ -9224,25 +9203,25 @@ rk_ftl_garbage_collect:
 	ldr	x0, [x23, #:lo12:.LANCHOR66]
 	mov	w6, 65535
 	add	w4, w4, w28
-	b	.L1251
-.L1244:
+	b	.L1268
+.L1261:
 	ldrh	w3, [x1]
 	cmp	w3, w6
-	beq	.L1243
+	beq	.L1260
 	ubfiz	x5, x22, 5, 16
 	add	w22, w22, 1
 	add	x5, x0, x5
 	and	w22, w22, 65535
 	orr	w3, w4, w3, lsl 10
 	str	w3, [x5, 4]
-.L1243:
+.L1260:
 	add	w2, w2, 1
 	add	x1, x1, 2
 	and	w2, w2, 65535
-.L1251:
+.L1268:
 	cmp	w2, w7
-	bne	.L1244
-	add	x1, x19, :lo12:.LANCHOR144
+	bne	.L1261
+	add	x1, x19, :lo12:.LANCHOR145
 	adrp	x24, .LANCHOR62
 	add	x24, x24, :lo12:.LANCHOR62
 	ldrb	w2, [x1, 8]
@@ -9251,45 +9230,45 @@ rk_ftl_garbage_collect:
 	ubfiz	x0, x22, 5, 16
 	mov	x22, 0
 	str	x0, [x29, 136]
-.L1245:
+.L1262:
 	ldr	x0, [x29, 136]
 	cmp	x22, x0
-	bne	.L1249
+	bne	.L1266
 	add	w28, w28, 1
-	b	.L1242
-.L1249:
+	b	.L1259
+.L1266:
 	ldr	x0, [x23, #:lo12:.LANCHOR66]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	beq	.L1246
+	beq	.L1263
 	ldr	x27, [x1, 16]
 	mov	w0, 61589
 	ldrh	w1, [x27]
 	cmp	w1, w0
-	bne	.L1246
+	bne	.L1263
 	ldr	w4, [x27, 8]
 	cmn	w4, #1
-	bne	.L1247
+	bne	.L1264
 	str	w4, [x29, 112]
-	mov	w2, 736
+	mov	w2, 753
 	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
 	ldr	w4, [x29, 112]
-.L1247:
+.L1264:
 	mov	w2, 0
-	add	x1, x29, 172
+	add	x1, x29, 168
 	mov	w0, w4
 	bl	log2phys
 	ldr	x0, [x23, #:lo12:.LANCHOR66]
-	ldr	w1, [x29, 172]
+	ldr	w1, [x29, 168]
 	add	x0, x0, x22
 	ldr	w2, [x0, 4]
 	cmp	w2, w1
-	bne	.L1246
+	bne	.L1263
 	ldr	x1, [x29, 144]
 	adrp	x4, .LANCHOR104
 	ldr	x2, [x29, 144]
@@ -9316,7 +9295,7 @@ rk_ftl_garbage_collect:
 	str	x4, [x2, 8]
 	ldr	x4, [x0, 16]
 	str	x4, [x2, 16]
-	ldr	w2, [x29, 172]
+	ldr	w2, [x29, 168]
 	str	w2, [x27, 12]
 	adrp	x2, .LANCHOR53
 	add	x11, x2, :lo12:.LANCHOR53
@@ -9331,65 +9310,111 @@ rk_ftl_garbage_collect:
 	ldrb	w1, [x11, 7]
 	ldr	w0, [x24]
 	cmp	w1, w0
-	beq	.L1248
+	beq	.L1265
 	ldrh	w0, [x11, 4]
-	cbnz	w0, .L1246
-.L1248:
+	cbnz	w0, .L1263
+.L1265:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	w0, .L1246
-.L1287:
+	cbz	w0, .L1263
+	add	x0, x19, :lo12:.LANCHOR145
+	mov	w1, -1
 	str	wzr, [x21, #:lo12:.LANCHOR94]
-	b	.L1286
-.L1246:
+	strh	w1, [x19, #:lo12:.LANCHOR145]
+	strh	wzr, [x0, 2]
+	b	.L1311
+.L1263:
 	add	x22, x22, 32
-	b	.L1245
-.L1250:
-	add	x1, x19, :lo12:.LANCHOR144
+	b	.L1262
+.L1267:
+	add	x1, x19, :lo12:.LANCHOR145
 	ldrh	w0, [x1, 2]
 	add	w20, w20, w0
 	ldr	w0, [x29, 156]
 	and	w20, w20, 65535
 	strh	w20, [x1, 2]
 	cmp	w0, w20
-	bhi	.L1252
+	bhi	.L1269
 	adrp	x0, .LANCHOR62
 	ldr	w0, [x0, #:lo12:.LANCHOR62]
-	cbz	w0, .L1253
+	cbz	w0, .L1270
 	bl	Ftl_gc_temp_data_write_back
-	cbnz	w0, .L1287
-.L1253:
+	cbz	w0, .L1270
+	str	wzr, [x21, #:lo12:.LANCHOR94]
+	b	.L1311
+.L1270:
 	adrp	x0, .LANCHOR173
 	ldrh	w0, [x0, #:lo12:.LANCHOR173]
-	cbnz	w0, .L1254
-	ldrh	w0, [x19, #:lo12:.LANCHOR144]
-	adrp	x1, .LANCHOR42
-	ldr	x1, [x1, #:lo12:.LANCHOR42]
-	lsl	x0, x0, 1
-	ldrh	w2, [x1, x0]
-	cbz	w2, .L1254
-	strh	wzr, [x1, x0]
-	ldrh	w0, [x19, #:lo12:.LANCHOR144]
+	cbnz	w0, .L1271
+	ldrh	w1, [x19, #:lo12:.LANCHOR145]
+	adrp	x20, .LANCHOR42
+	add	x0, x19, :lo12:.LANCHOR145
+	ldr	x3, [x20, #:lo12:.LANCHOR42]
+	ubfiz	x2, x1, 1, 16
+	ldrh	w4, [x3, x2]
+	cbz	w4, .L1271
+	adrp	x2, .LANCHOR174
+	adrp	x22, .LANCHOR152
+	add	x23, x22, :lo12:.LANCHOR152
+	mov	w24, 0
+	ldrh	w5, [x2, #:lo12:.LANCHOR174]
+	mov	w3, 0
+	ldrh	w2, [x0, 2]
+	adrp	x0, .LC42
+	add	x0, x0, :lo12:.LC42
+	bl	printf
+.L1272:
+	ldr	w0, [x23]
+	cmp	w24, w0
+	bcs	.L1274
+	mov	w2, 0
+	add	x1, x29, 172
+	mov	w0, w24
+	bl	log2phys
+	ldr	w3, [x29, 172]
+	cmn	w3, #1
+	beq	.L1273
+	lsr	w0, w3, 10
+	bl	P2V_block_in_plane
+	ldrh	w1, [x19, #:lo12:.LANCHOR145]
+	cmp	w1, w0, uxth
+	bne	.L1273
+	adrp	x0, .LC43
+	mov	w2, w3
+	mov	w1, w24
+	add	x0, x0, :lo12:.LC43
+	bl	printf
+.L1274:
+	ldr	w0, [x22, #:lo12:.LANCHOR152]
+	cmp	w24, w0
+	bcc	.L1271
+	ldrh	w1, [x19, #:lo12:.LANCHOR145]
+	ldr	x0, [x20, #:lo12:.LANCHOR42]
+	strh	wzr, [x0, x1, lsl 1]
+	ldrh	w0, [x19, #:lo12:.LANCHOR145]
 	bl	update_vpc_list
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1254:
+.L1271:
 	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR144]
-.L1252:
+	strh	w0, [x19, #:lo12:.LANCHOR145]
+.L1269:
 	adrp	x0, .LANCHOR48
 	str	wzr, [x21, #:lo12:.LANCHOR94]
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 2
-	bhi	.L1255
+	bhi	.L1277
 	ldr	x0, [x29, 120]
 	ldrh	w20, [x0, #:lo12:.LANCHOR19]
-	b	.L1256
-.L1255:
+	b	.L1278
+.L1273:
+	add	w24, w24, 1
+	b	.L1272
+.L1277:
 	add	w0, w0, 1
-	b	.L1206
-.L1258:
+	b	.L1223
+.L1280:
 	mov	w0, 0
-	b	.L1206
+	b	.L1223
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
 	.section	.text.FtlRead,"ax",@progbits
 	.align	2
@@ -9408,13 +9433,13 @@ FtlRead:
 	mov	w26, w2
 	stp	x21, x22, [sp, 32]
 	stp	x27, x28, [sp, 80]
-	bne	.L1289
+	bne	.L1313
 	mov	x2, x3
 	mov	w1, w26
 	add	w0, w19, 256
 	bl	FtlVendorPartRead
 	mov	w21, w0
-.L1288:
+.L1312:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9423,18 +9448,18 @@ FtlRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1289:
+.L1313:
 	add	w0, w1, w2
 	str	w0, [x29, 136]
 	adrp	x0, .LANCHOR34
 	add	w1, w1, w2
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	cmp	w1, w0
-	bhi	.L1310
+	bhi	.L1334
 	adrp	x0, .LANCHOR166
 	ldr	w21, [x0, #:lo12:.LANCHOR166]
 	cmn	w21, #1
-	beq	.L1288
+	beq	.L1312
 	adrp	x22, .LANCHOR12
 	adrp	x25, .LANCHOR135
 	add	x25, x25, :lo12:.LANCHOR135
@@ -9462,47 +9487,47 @@ FtlRead:
 	ldr	w0, [x1, #:lo12:.LANCHOR89]
 	add	w0, w0, w2
 	str	w0, [x1, #:lo12:.LANCHOR89]
-.L1291:
+.L1315:
 	ldr	w0, [x29, 156]
-	cbnz	w0, .L1308
+	cbnz	w0, .L1332
 	adrp	x0, .LANCHOR74
 	ldrh	w0, [x0, #:lo12:.LANCHOR74]
-	cbnz	w0, .L1309
+	cbnz	w0, .L1333
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 31
-	bhi	.L1288
-.L1309:
+	bhi	.L1312
+.L1333:
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-	b	.L1288
-.L1308:
+	b	.L1312
+.L1332:
 	add	x1, x29, 172
 	mov	w2, 0
 	mov	w0, w20
 	bl	log2phys
 	ldr	w1, [x29, 172]
 	cmn	w1, #1
-	bne	.L1292
+	bne	.L1316
 	add	x5, x22, :lo12:.LANCHOR12
 	mov	w4, 0
-.L1293:
+.L1317:
 	ldrh	w0, [x5]
 	cmp	w4, w0
-	bcc	.L1295
-.L1296:
+	bcc	.L1319
+.L1320:
 	ldr	w0, [x29, 156]
 	add	w20, w20, 1
 	subs	w0, w0, #1
 	str	w0, [x29, 156]
-	beq	.L1300
+	beq	.L1324
 	adrp	x0, .LANCHOR3
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w27, w0, lsl 2
-	bne	.L1291
-.L1300:
-	cbz	w27, .L1291
+	bne	.L1315
+.L1324:
+	cbz	w27, .L1315
 	ldr	x0, [x28, #:lo12:.LANCHOR103]
 	mov	w1, w27
 	mov	w2, 0
@@ -9521,57 +9546,57 @@ FtlRead:
 	str	x0, [x29, 104]
 	add	x0, x22, :lo12:.LANCHOR12
 	str	x0, [x29, 96]
-.L1307:
+.L1331:
 	ldr	x0, [x28, #:lo12:.LANCHOR103]
 	ldr	w2, [x29, 152]
 	add	x0, x0, x27
 	ldr	w1, [x0, 24]
 	cmp	w2, w1
-	bne	.L1302
+	bne	.L1326
 	ldr	x1, [x0, 8]
 	adrp	x0, .LANCHOR109
 	ldr	x0, [x0, #:lo12:.LANCHOR109]
 	cmp	x1, x0
-	bne	.L1303
+	bne	.L1327
 	ldr	x0, [x29, 128]
 	ldr	w2, [x29, 120]
 	add	x1, x1, x0
 	mov	x0, x23
-.L1321:
+.L1345:
 	bl	ftl_memcpy
-.L1303:
+.L1327:
 	ldr	x0, [x28, #:lo12:.LANCHOR103]
 	add	x0, x0, x27
 	ldr	x1, [x0, 16]
 	ldr	w2, [x0, 24]
 	ldr	w1, [x1, 8]
 	cmp	w2, w1
-	beq	.L1304
+	beq	.L1328
 	ldr	w1, [x25, 72]
 	add	w1, w1, 1
 	str	w1, [x25, 72]
-.L1304:
+.L1328:
 	ldr	w1, [x0]
 	cmn	w1, #1
-	bne	.L1305
+	bne	.L1329
 	ldr	w0, [x25, 72]
 	mov	w21, w1
 	add	w0, w0, 1
 	str	w0, [x25, 72]
-.L1306:
+.L1330:
 	ldr	x0, [x29, 104]
 	add	x27, x27, 32
 	cmp	x0, x27
-	bne	.L1307
+	bne	.L1331
 	mov	w27, 0
-	b	.L1291
-.L1295:
+	b	.L1315
+.L1319:
 	madd	w0, w20, w0, w4
 	cmp	w19, w0
-	bhi	.L1294
+	bhi	.L1318
 	ldr	w1, [x29, 136]
 	cmp	w1, w0
-	bls	.L1294
+	bls	.L1318
 	sub	w0, w0, w19
 	str	x5, [x29, 120]
 	lsl	w0, w0, 9
@@ -9582,17 +9607,17 @@ FtlRead:
 	bl	ftl_memset
 	ldr	w4, [x29, 128]
 	ldr	x5, [x29, 120]
-.L1294:
+.L1318:
 	add	w4, w4, 1
-	b	.L1293
-.L1292:
+	b	.L1317
+.L1316:
 	ldr	x2, [x28, #:lo12:.LANCHOR103]
 	ubfiz	x0, x27, 5, 32
 	add	x0, x2, x0
 	str	w1, [x0, 4]
 	ldr	w1, [x29, 152]
 	cmp	w20, w1
-	bne	.L1297
+	bne	.L1321
 	adrp	x1, .LANCHOR109
 	ldr	x1, [x1, #:lo12:.LANCHOR109]
 	str	x1, [x0, 8]
@@ -9605,9 +9630,9 @@ FtlRead:
 	csel	w2, w26, w2, ls
 	str	w2, [x29, 144]
 	cmp	w1, w2
-	bne	.L1298
+	bne	.L1322
 	str	x23, [x0, 8]
-.L1298:
+.L1322:
 	adrp	x1, .LANCHOR24
 	adrp	x2, .LANCHOR115
 	str	w20, [x0, 24]
@@ -9618,10 +9643,10 @@ FtlRead:
 	and	x1, x1, 4294967292
 	add	x1, x2, x1
 	str	x1, [x0, 16]
-	b	.L1296
-.L1297:
+	b	.L1320
+.L1321:
 	cmp	w20, w24
-	bne	.L1299
+	bne	.L1323
 	ldrh	w2, [x22, #:lo12:.LANCHOR12]
 	adrp	x1, .LANCHOR110
 	ldr	w3, [x29, 136]
@@ -9631,25 +9656,25 @@ FtlRead:
 	sub	w3, w3, w1
 	str	w3, [x29, 140]
 	cmp	w2, w3
-	bne	.L1298
-.L1320:
+	bne	.L1322
+.L1344:
 	sub	w1, w1, w19
 	lsl	w1, w1, 9
 	add	x1, x23, x1
 	str	x1, [x0, 8]
-	b	.L1298
-.L1299:
+	b	.L1322
+.L1323:
 	ldrh	w1, [x22, #:lo12:.LANCHOR12]
 	mul	w1, w1, w20
-	b	.L1320
-.L1302:
+	b	.L1344
+.L1326:
 	cmp	w24, w1
-	bne	.L1303
+	bne	.L1327
 	ldr	x1, [x0, 8]
 	adrp	x0, .LANCHOR110
 	ldr	x0, [x0, #:lo12:.LANCHOR110]
 	cmp	x1, x0
-	bne	.L1303
+	bne	.L1327
 	ldr	x0, [x29, 96]
 	ldr	w2, [x29, 116]
 	ldrh	w0, [x0]
@@ -9657,18 +9682,18 @@ FtlRead:
 	sub	w0, w0, w19
 	lsl	w0, w0, 9
 	add	x0, x23, x0
-	b	.L1321
-.L1305:
+	b	.L1345
+.L1329:
 	cmp	w1, 256
-	bne	.L1306
+	bne	.L1330
 	ldr	w0, [x0, 4]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-	b	.L1306
-.L1310:
+	b	.L1330
+.L1334:
 	mov	w21, -1
-	b	.L1288
+	b	.L1312
 	.size	FtlRead, .-FtlRead
 	.section	.text.sftl_read,"ax",@progbits
 	.align	2
@@ -9690,20 +9715,20 @@ FtlWrite:
 	and	w0, w0, 255
 	cmp	w0, 16
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	mov	w21, w1
+	stp	x23, x24, [sp, 48]
+	mov	w23, w1
 	stp	x25, x26, [sp, 64]
 	mov	x26, x3
 	stp	x19, x20, [sp, 16]
-	stp	x23, x24, [sp, 48]
+	stp	x21, x22, [sp, 32]
 	stp	x27, x28, [sp, 80]
-	str	w2, [x29, 164]
-	bne	.L1324
+	str	w2, [x29, 172]
+	bne	.L1348
 	add	w0, w1, 256
-	ldr	w1, [x29, 164]
+	ldr	w1, [x29, 172]
 	mov	x2, x3
 	bl	FtlVendorPartWrite
-.L1323:
+.L1347:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9711,46 +9736,47 @@ FtlWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 224
 	ret
-.L1324:
-	ldr	w0, [x29, 164]
+.L1348:
+	ldr	w0, [x29, 172]
 	add	w0, w1, w0
 	str	w0, [x29, 152]
 	adrp	x0, .LANCHOR34
 	ldr	w1, [x29, 152]
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	cmp	w1, w0
-	bhi	.L1356
+	bhi	.L1380
 	adrp	x0, .LANCHOR166
 	ldr	w0, [x0, #:lo12:.LANCHOR166]
 	cmn	w0, #1
-	beq	.L1323
+	beq	.L1347
 	adrp	x0, .LANCHOR176
 	mov	w1, 2048
-	adrp	x22, .LANCHOR12
-	ldr	w2, [x29, 164]
+	ldr	w2, [x29, 152]
 	str	w1, [x0, #:lo12:.LANCHOR176]
-	ldr	w1, [x29, 152]
-	ldrh	w0, [x22, #:lo12:.LANCHOR12]
-	sub	w1, w1, #1
-	udiv	w25, w21, w0
-	udiv	w0, w1, w0
-	adrp	x1, .LANCHOR162
+	adrp	x1, .LANCHOR12
+	sub	w2, w2, #1
+	ldr	w3, [x29, 172]
+	ldrh	w0, [x1, #:lo12:.LANCHOR12]
+	str	x1, [x29, 160]
+	udiv	w25, w23, w0
+	udiv	w0, w2, w0
+	adrp	x2, .LANCHOR162
 	mov	w19, w25
 	str	w0, [x29, 144]
 	sub	w0, w0, w25
 	add	w24, w0, 1
 	str	w0, [x29, 140]
-	ldr	w0, [x1, #:lo12:.LANCHOR162]
-	add	w0, w0, w2
-	str	w0, [x1, #:lo12:.LANCHOR162]
-	adrp	x1, .LANCHOR85
-	ldr	w0, [x1, #:lo12:.LANCHOR85]
+	ldr	w0, [x2, #:lo12:.LANCHOR162]
+	add	w0, w0, w3
+	str	w0, [x2, #:lo12:.LANCHOR162]
+	adrp	x2, .LANCHOR85
+	ldr	w0, [x2, #:lo12:.LANCHOR85]
 	add	w0, w0, w24
-	str	w0, [x1, #:lo12:.LANCHOR85]
+	str	w0, [x2, #:lo12:.LANCHOR85]
 	adrp	x0, .LANCHOR51
 	add	x20, x0, :lo12:.LANCHOR51
-.L1326:
-	cbnz	w24, .L1351
+.L1350:
+	cbnz	w24, .L1375
 	ldr	w1, [x29, 140]
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
@@ -9758,11 +9784,11 @@ FtlWrite:
 	mov	x22, x0
 	ldrh	w1, [x0, #:lo12:.LANCHOR48]
 	cmp	w1, 5
-	bls	.L1352
-.L1354:
+	bls	.L1376
+.L1378:
 	mov	w0, 0
-	b	.L1323
-.L1351:
+	b	.L1347
+.L1375:
 	adrp	x0, .LANCHOR51
 	add	x0, x0, :lo12:.LANCHOR51
 	adrp	x1, .LANCHOR3
@@ -9770,19 +9796,19 @@ FtlWrite:
 	ldrb	w2, [x0, 6]
 	ldrh	w0, [x1, #:lo12:.LANCHOR3]
 	cmp	w2, w0
-	bcc	.L1327
+	bcc	.L1351
 	adrp	x1, .LANCHOR177
 	adrp	x0, .LC1
-	mov	w2, 1016
+	mov	w2, 1038
 	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1327:
+.L1351:
 	ldrh	w0, [x20, 4]
-	cbnz	w0, .L1328
+	cbnz	w0, .L1352
 	mov	x0, x20
 	bl	allocate_new_data_superblock
-.L1328:
+.L1352:
 	ldrb	w0, [x20, 7]
 	ldrh	w1, [x20, 4]
 	lsl	w0, w0, 2
@@ -9795,244 +9821,251 @@ FtlWrite:
 	ldr	x0, [x29, 112]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1329
+	bcc	.L1353
 	adrp	x1, .LANCHOR177
 	adrp	x0, .LC1
-	mov	w2, 1049
+	mov	w2, 1071
 	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1329:
+.L1353:
 	adrp	x0, .LANCHOR24
 	add	x0, x0, :lo12:.LANCHOR24
-	str	xzr, [x29, 168]
+	mov	x28, 0
 	str	x0, [x29, 104]
 	adrp	x0, .LANCHOR23
 	add	x0, x0, :lo12:.LANCHOR23
 	str	x0, [x29, 96]
-.L1330:
-	ldr	w1, [x29, 148]
+.L1354:
+	ldr	w0, [x29, 148]
+	mov	w22, w28
 	adrp	x27, .LANCHOR105
-	ldr	w23, [x29, 168]
-	cmp	w23, w1
-	bcc	.L1349
-	mov	x23, x1
-.L1331:
+	cmp	w28, w0
+	bcc	.L1373
+	mov	x22, x0
+.L1355:
 	ldr	x0, [x27, #:lo12:.LANCHOR105]
 	mov	x3, x20
 	mov	w2, 0
-	mov	w1, w23
+	mov	w1, w22
 	bl	FtlProgPages
-	cmp	w24, w23
-	bcs	.L1350
+	cmp	w24, w22
+	bcs	.L1374
 	adrp	x1, .LANCHOR177
 	adrp	x0, .LC1
-	mov	w2, 1126
+	mov	w2, 1149
 	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1350:
-	sub	w24, w24, w23
-	b	.L1326
-.L1349:
+.L1374:
+	sub	w24, w24, w22
+	b	.L1350
+.L1373:
 	ldrh	w0, [x20, 4]
-	cbz	w0, .L1331
+	cbz	w0, .L1355
 	add	x1, x29, 188
 	mov	w2, 0
 	mov	w0, w19
 	bl	log2phys
 	mov	x0, x20
+	lsl	x21, x28, 5
 	bl	get_new_active_ppa
-	ldr	x1, [x29, 168]
-	lsl	x28, x1, 5
 	ldr	x1, [x27, #:lo12:.LANCHOR105]
-	add	x1, x1, x28
+	add	x1, x1, x21
 	str	w0, [x1, 4]
 	ldr	x0, [x29, 104]
 	str	w19, [x1, 24]
 	ldrh	w2, [x0]
-	mul	w23, w23, w2
-	and	x0, x23, 4294967292
+	mul	w22, w22, w2
+	and	x0, x22, 4294967292
 	str	x0, [x29, 128]
 	adrp	x0, .LANCHOR115
 	ldr	x3, [x29, 128]
 	ldr	x0, [x0, #:lo12:.LANCHOR115]
 	str	x0, [x29, 120]
-	add	x23, x0, x3
-	str	x23, [x1, 16]
-	mov	x0, x23
+	add	x22, x0, x3
+	str	x22, [x1, 16]
+	mov	x0, x22
 	mov	w1, 0
 	bl	ftl_memset
 	ldr	w0, [x29, 144]
 	cmp	w19, w25
 	ccmp	w19, w0, 4, ne
-	bne	.L1332
+	bne	.L1356
 	cmp	w19, w25
-	bne	.L1333
-	ldrh	w2, [x22, #:lo12:.LANCHOR12]
-	udiv	w0, w21, w2
-	msub	w0, w0, w2, w21
+	ldr	x0, [x29, 160]
+	bne	.L1357
+	ldrh	w2, [x0, #:lo12:.LANCHOR12]
+	udiv	w0, w23, w2
+	msub	w0, w0, w2, w23
 	str	w0, [x29, 156]
 	sub	w2, w2, w0
-	ldr	w0, [x29, 164]
+	ldr	w0, [x29, 172]
 	cmp	w2, w0
 	csel	w0, w2, w0, ls
-	str	w0, [x29, 160]
-.L1334:
-	ldrh	w0, [x22, #:lo12:.LANCHOR12]
-	ldr	w1, [x29, 160]
+	str	w0, [x29, 168]
+.L1358:
+	ldr	x0, [x29, 160]
+	ldr	w1, [x29, 168]
+	ldrh	w0, [x0, #:lo12:.LANCHOR12]
 	cmp	w1, w0
 	ldr	x0, [x27, #:lo12:.LANCHOR105]
-	bne	.L1335
-	add	x3, x0, x28
+	bne	.L1359
+	add	x21, x0, x21
 	cmp	w19, w25
-	bne	.L1336
-	str	x26, [x3, 8]
-.L1337:
+	bne	.L1360
+	str	x26, [x21, 8]
+.L1361:
 	ldr	x0, [x29, 112]
 	ldrb	w1, [x20, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1346
+	bcc	.L1370
 	adrp	x1, .LANCHOR177
 	adrp	x0, .LC1
-	mov	w2, 1117
+	mov	w2, 1140
 	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1346:
+.L1370:
 	ldp	x1, x2, [x29, 120]
 	mov	w0, -3947
+	add	x28, x28, 1
 	strh	w0, [x1, x2]
 	adrp	x1, .LANCHOR83
 	ldr	w0, [x1, #:lo12:.LANCHOR83]
-	stp	w0, w19, [x23, 4]
+	stp	w0, w19, [x22, 4]
 	add	w19, w19, 1
 	add	w0, w0, 1
 	cmn	w0, #1
 	csel	w0, w0, wzr, ne
 	str	w0, [x1, #:lo12:.LANCHOR83]
 	ldr	w0, [x29, 188]
-	str	w0, [x23, 12]
+	str	w0, [x22, 12]
 	ldrh	w0, [x20]
-	strh	w0, [x23, 2]
-	ldr	x0, [x29, 168]
-	add	x0, x0, 1
-	str	x0, [x29, 168]
-	b	.L1330
-.L1333:
+	strh	w0, [x22, 2]
+	b	.L1354
+.L1357:
+	ldrh	w2, [x0, #:lo12:.LANCHOR12]
 	ldr	w0, [x29, 152]
-	ldrh	w2, [x22, #:lo12:.LANCHOR12]
+	str	wzr, [x29, 156]
 	msub	w2, w19, w2, w0
 	and	w0, w2, 65535
-	stp	wzr, w0, [x29, 156]
-	b	.L1334
-.L1336:
-	ldr	w0, [x29, 160]
-.L1364:
+	str	w0, [x29, 168]
+	b	.L1358
+.L1360:
+	ldr	w0, [x29, 168]
+.L1388:
 	mul	w0, w0, w19
-	sub	w0, w0, w21
+	sub	w0, w0, w23
 	lsl	w0, w0, 9
 	add	x0, x26, x0
-	str	x0, [x3, 8]
-	b	.L1337
-.L1335:
-	add	x0, x0, x28
+	str	x0, [x21, 8]
+	b	.L1361
+.L1359:
+	add	x0, x0, x21
 	cmp	w19, w25
-	bne	.L1338
+	bne	.L1362
 	adrp	x1, .LANCHOR109
 	ldr	x1, [x1, #:lo12:.LANCHOR109]
-.L1363:
+.L1387:
 	str	x1, [x0, 8]
 	ldr	w0, [x29, 188]
 	cmn	w0, #1
-	beq	.L1340
+	beq	.L1364
 	str	w0, [x29, 196]
 	mov	w2, 0
 	ldr	x0, [x27, #:lo12:.LANCHOR105]
 	str	w19, [x29, 216]
-	add	x0, x0, x28
+	add	x0, x0, x21
 	ldp	x1, x0, [x0, 8]
 	stp	x1, x0, [x29, 200]
 	mov	w1, 1
 	add	x0, x29, 192
 	bl	FlashReadPages
-	ldr	w0, [x29, 192]
-	cmn	w0, #1
-	bne	.L1341
+	ldr	w3, [x29, 192]
+	cmn	w3, #1
+	bne	.L1365
 	adrp	x0, .LANCHOR135
 	add	x0, x0, :lo12:.LANCHOR135
+	mov	w2, w19
 	ldr	w1, [x0, 72]
 	add	w1, w1, 1
 	str	w1, [x0, 72]
-.L1344:
-	ldr	w0, [x29, 160]
+	ldr	w1, [x22, 8]
+	adrp	x0, .LC44
+	add	x0, x0, :lo12:.LC44
+	bl	printf
+.L1368:
+	ldr	w0, [x29, 168]
 	cmp	w19, w25
 	lsl	w2, w0, 9
-	bne	.L1345
+	bne	.L1369
 	ldr	x0, [x27, #:lo12:.LANCHOR105]
 	mov	x1, x26
-	add	x3, x0, x28
+	add	x21, x0, x21
 	ldr	w0, [x29, 156]
-	ldr	x3, [x3, 8]
+	ldr	x3, [x21, 8]
 	lsl	w0, w0, 9
 	add	x0, x3, x0
-.L1365:
+.L1389:
 	bl	ftl_memcpy
-	b	.L1337
-.L1338:
+	b	.L1361
+.L1362:
 	adrp	x1, .LANCHOR110
 	ldr	x1, [x1, #:lo12:.LANCHOR110]
-	b	.L1363
-.L1341:
-	ldr	w1, [x23, 8]
+	b	.L1387
+.L1365:
+	ldr	w1, [x22, 8]
 	cmp	w19, w1
-	beq	.L1343
+	beq	.L1367
 	adrp	x0, .LANCHOR135
 	add	x0, x0, :lo12:.LANCHOR135
 	ldr	w2, [x0, 72]
 	add	w2, w2, 1
 	str	w2, [x0, 72]
-	adrp	x0, .LC37
+	adrp	x0, .LC45
 	mov	w2, w19
-	add	x0, x0, :lo12:.LC37
+	add	x0, x0, :lo12:.LC45
 	bl	printf
-.L1343:
-	ldr	w0, [x23, 8]
+.L1367:
+	ldr	w0, [x22, 8]
 	cmp	w19, w0
-	beq	.L1344
-	mov	w2, 1102
+	beq	.L1368
+	mov	w2, 1125
 	adrp	x1, .LANCHOR177
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	b	.L1344
-.L1340:
+	b	.L1368
+.L1364:
 	ldr	x0, [x27, #:lo12:.LANCHOR105]
 	ldr	x1, [x29, 96]
-	add	x0, x0, x28
+	add	x0, x0, x21
 	ldrh	w2, [x1]
 	mov	w1, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	b	.L1344
-.L1345:
-	ldrh	w1, [x22, #:lo12:.LANCHOR12]
+	b	.L1368
+.L1369:
+	ldr	x0, [x29, 160]
+	ldrh	w1, [x0, #:lo12:.LANCHOR12]
 	ldr	x0, [x27, #:lo12:.LANCHOR105]
-	add	x3, x0, x28
+	add	x21, x0, x21
 	mul	w1, w1, w19
-	sub	w1, w1, w21
-	ldr	x0, [x3, 8]
+	sub	w1, w1, w23
+	ldr	x0, [x21, 8]
 	lsl	w1, w1, 9
 	add	x1, x26, x1
-	b	.L1365
-.L1332:
+	b	.L1389
+.L1356:
 	ldr	x0, [x27, #:lo12:.LANCHOR105]
-	add	x3, x0, x28
-	ldrh	w0, [x22, #:lo12:.LANCHOR12]
-	b	.L1364
-.L1352:
+	add	x21, x0, x21
+	ldr	x0, [x29, 160]
+	ldrh	w0, [x0, #:lo12:.LANCHOR12]
+	b	.L1388
+.L1376:
 	adrp	x23, .LANCHOR72
 	adrp	x20, .LANCHOR101
 	adrp	x21, .LANCHOR100
@@ -10040,19 +10073,19 @@ FtlWrite:
 	add	x20, x20, :lo12:.LANCHOR101
 	add	x21, x21, :lo12:.LANCHOR100
 	mov	w19, 256
-.L1355:
-	adrp	x0, .LANCHOR144
+.L1379:
+	adrp	x0, .LANCHOR145
 	mov	w1, 65535
-	ldrh	w0, [x0, #:lo12:.LANCHOR144]
+	ldrh	w0, [x0, #:lo12:.LANCHOR145]
 	cmp	w0, w1
-	bne	.L1353
+	bne	.L1377
 	ldrh	w1, [x23]
 	cmp	w1, w0
-	bne	.L1353
+	bne	.L1377
 	mov	w0, 0
 	bl	List_get_gc_head_node
 	bl	FtlGcRefreshBlock
-.L1353:
+.L1377:
 	mov	w0, 128
 	mov	w1, 1
 	strh	w0, [x20]
@@ -10064,13 +10097,13 @@ FtlWrite:
 	bl	rk_ftl_garbage_collect
 	ldrh	w0, [x22, #:lo12:.LANCHOR48]
 	cmp	w0, 2
-	bhi	.L1354
+	bhi	.L1378
 	subs	w19, w19, #1
-	bne	.L1355
-	b	.L1354
-.L1356:
+	bne	.L1379
+	b	.L1378
+.L1380:
 	mov	w0, -1
-	b	.L1323
+	b	.L1347
 	.size	FtlWrite, .-FtlWrite
 	.section	.text.sftl_gc,"ax",@progbits
 	.align	2
@@ -10112,10 +10145,10 @@ FtlLoadSysInfo:
 	ldrh	w0, [x20, #:lo12:.LANCHOR139]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L1368
-.L1379:
+	bne	.L1392
+.L1403:
 	mov	w0, -1
-.L1367:
+.L1391:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -10123,7 +10156,7 @@ FtlLoadSysInfo:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1368:
+.L1392:
 	add	x24, x20, :lo12:.LANCHOR139
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
@@ -10135,28 +10168,28 @@ FtlLoadSysInfo:
 	ldrsh	w24, [x20, #:lo12:.LANCHOR139]
 	add	x26, x26, :lo12:.LANCHOR23
 	add	x27, x27, :lo12:.LANCHOR178
-.L1370:
-	tbz	w28, #31, .L1376
+.L1394:
+	tbz	w28, #31, .L1400
 	adrp	x1, .LANCHOR178
 	adrp	x0, .LC1
 	mov	w2, 1465
 	add	x1, x1, :lo12:.LANCHOR178
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1375:
+.L1399:
 	adrp	x1, .LANCHOR23
 	ldrh	w0, [x21, #:lo12:.LANCHOR5]
 	ldrh	w1, [x1, #:lo12:.LANCHOR23]
 	add	x0, x0, 24
 	cmp	x1, x0, lsl 1
-	bcs	.L1378
+	bcs	.L1402
 	adrp	x1, .LANCHOR178
 	adrp	x0, .LC1
 	mov	w2, 1467
 	add	x1, x1, :lo12:.LANCHOR178
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1378:
+.L1402:
 	add	x24, x19, :lo12:.LANCHOR138
 	adrp	x19, .LANCHOR39
 	add	x22, x19, :lo12:.LANCHOR39
@@ -10185,7 +10218,7 @@ FtlLoadSysInfo:
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1379
+	bne	.L1403
 	add	x20, x20, :lo12:.LANCHOR139
 	adrp	x0, .LANCHOR10
 	ldrh	w1, [x22, 8]
@@ -10193,7 +10226,7 @@ FtlLoadSysInfo:
 	ldrh	w0, [x0, #:lo12:.LANCHOR10]
 	strh	w1, [x20, 6]
 	cmp	w2, w0
-	bne	.L1379
+	bne	.L1403
 	adrp	x0, .LANCHOR179
 	adrp	x2, .LANCHOR152
 	adrp	x3, .LANCHOR3
@@ -10218,18 +10251,18 @@ FtlLoadSysInfo:
 	udiv	w0, w0, w3
 	adrp	x3, .LANCHOR171
 	strh	w0, [x3, #:lo12:.LANCHOR171]
-	bls	.L1380
+	bls	.L1404
 	adrp	x1, .LANCHOR178
 	adrp	x0, .LC1
 	mov	w2, 1489
 	add	x1, x1, :lo12:.LANCHOR178
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1380:
+.L1404:
 	add	x4, x19, :lo12:.LANCHOR39
 	adrp	x0, .LANCHOR51
 	add	x2, x0, :lo12:.LANCHOR51
-	adrp	x5, .LANCHOR144
+	adrp	x5, .LANCHOR145
 	adrp	x20, .LANCHOR52
 	mov	x22, x5
 	ldrh	w1, [x4, 16]
@@ -10240,10 +10273,10 @@ FtlLoadSysInfo:
 	strb	w1, [x2, 6]
 	ldrb	w1, [x4, 11]
 	strb	w1, [x2, 8]
-	add	x1, x5, :lo12:.LANCHOR144
+	add	x1, x5, :lo12:.LANCHOR145
 	strh	w3, [x2, 2]
 	mov	w2, -1
-	strh	w2, [x5, #:lo12:.LANCHOR144]
+	strh	w2, [x5, #:lo12:.LANCHOR145]
 	add	x2, x20, :lo12:.LANCHOR52
 	strh	wzr, [x1, 2]
 	strb	wzr, [x1, 6]
@@ -10290,47 +10323,47 @@ FtlLoadSysInfo:
 	adrp	x1, .LANCHOR82
 	ldr	w4, [x1, #:lo12:.LANCHOR82]
 	cmp	w3, w4
-	bls	.L1381
+	bls	.L1405
 	str	w3, [x1, #:lo12:.LANCHOR82]
-.L1381:
+.L1405:
 	add	x19, x19, :lo12:.LANCHOR39
 	adrp	x1, .LANCHOR83
 	ldr	w3, [x1, #:lo12:.LANCHOR83]
 	ldr	w2, [x19, 36]
 	cmp	w2, w3
-	bls	.L1382
+	bls	.L1406
 	str	w2, [x1, #:lo12:.LANCHOR83]
-.L1382:
+.L1406:
 	mov	w1, 65535
 	cmp	w6, w1
-	beq	.L1383
+	beq	.L1407
 	add	x0, x0, :lo12:.LANCHOR51
 	bl	make_superblock
-.L1383:
+.L1407:
 	ldrh	w2, [x20, #:lo12:.LANCHOR52]
 	mov	w1, 65535
 	add	x0, x20, :lo12:.LANCHOR52
 	cmp	w2, w1
-	beq	.L1384
+	beq	.L1408
 	bl	make_superblock
-.L1384:
+.L1408:
 	ldrh	w2, [x21, #:lo12:.LANCHOR53]
 	mov	w1, 65535
 	add	x0, x21, :lo12:.LANCHOR53
 	cmp	w2, w1
-	beq	.L1385
+	beq	.L1409
 	bl	make_superblock
-.L1385:
-	ldrh	w2, [x22, #:lo12:.LANCHOR144]
+.L1409:
+	ldrh	w2, [x22, #:lo12:.LANCHOR145]
 	mov	w1, 65535
-	add	x0, x22, :lo12:.LANCHOR144
+	add	x0, x22, :lo12:.LANCHOR145
 	cmp	w2, w1
-	beq	.L1386
+	beq	.L1410
 	bl	make_superblock
-.L1386:
+.L1410:
 	mov	w0, 0
-	b	.L1367
-.L1376:
+	b	.L1391
+.L1400:
 	add	x3, x19, :lo12:.LANCHOR138
 	orr	w0, w28, w24, lsl 10
 	mov	w2, 1
@@ -10344,56 +10377,59 @@ FtlLoadSysInfo:
 	ldr	x3, [x29, 104]
 	ldr	x0, [x3, 16]
 	ldr	w8, [x0, 12]
-	cbz	w8, .L1371
+	cbz	w8, .L1395
+	ldr	w0, [x19, #:lo12:.LANCHOR138]
+	cmn	w0, #1
+	beq	.L1395
 	ldrh	w1, [x26]
 	ldr	x0, [x3, 8]
 	bl	js_hash
 	cmp	w8, w0
-	beq	.L1371
+	beq	.L1395
 	add	x10, x20, :lo12:.LANCHOR139
 	mov	w6, w0
 	mov	w5, w8
-	adrp	x0, .LC38
+	adrp	x0, .LC46
 	mov	w3, w28
 	mov	w2, w24
 	ldrh	w4, [x10, 4]
 	mov	x1, x27
-	add	x0, x0, :lo12:.LC38
+	add	x0, x0, :lo12:.LC46
 	str	x10, [x29, 104]
 	bl	printf
-	cbnz	w28, .L1372
+	cbnz	w28, .L1396
 	ldr	x10, [x29, 104]
 	ldrh	w0, [x10, 4]
 	cmp	w24, w0
-	beq	.L1372
+	beq	.L1396
 	sxth	w24, w0
 	adrp	x0, .LANCHOR20
 	ldrh	w7, [x0, #:lo12:.LANCHOR20]
 	sub	w7, w7, #1
-.L1395:
+.L1422:
 	sxth	w28, w7
-	b	.L1370
-.L1372:
+	b	.L1394
+.L1396:
 	mov	w0, -1
 	str	w0, [x19, #:lo12:.LANCHOR138]
-.L1371:
+.L1395:
 	ldr	w0, [x19, #:lo12:.LANCHOR138]
 	cmn	w0, #1
-	beq	.L1374
+	beq	.L1398
 	ldr	x0, [x22, #:lo12:.LANCHOR106]
 	mov	w1, 19539
 	movk	w1, 0x4654, lsl 16
 	ldr	w0, [x0]
 	cmp	w0, w1
-	bne	.L1374
+	bne	.L1398
 	ldr	x0, [x25, #:lo12:.LANCHOR114]
 	ldrh	w1, [x0]
 	mov	w0, 61604
 	cmp	w1, w0
-	beq	.L1375
-.L1374:
+	beq	.L1399
+.L1398:
 	sub	w7, w28, #1
-	b	.L1395
+	b	.L1422
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
 	.section	.text.FtlMapTblRecovery,"ax",@progbits
 	.align	2
@@ -10442,21 +10478,21 @@ FtlMapTblRecovery:
 	add	x0, x26, :lo12:.LANCHOR20
 	str	w1, [x19, 56]
 	str	x0, [x29, 96]
-.L1397:
+.L1424:
 	ldr	w0, [x29, 152]
 	cmp	w20, w0
-	bge	.L1416
+	bge	.L1443
 	ldr	w0, [x29, 108]
 	sxtw	x28, w20
 	cmp	w20, w0
-	bne	.L1398
+	bne	.L1425
 	lsl	x0, x28, 1
 	mov	w1, 1
 	add	x26, x24, x0
 	adrp	x27, .LANCHOR23
 	add	x27, x27, :lo12:.LANCHOR23
-	mov	w22, 0
 	ldrh	w0, [x24, x0]
+	mov	w24, 0
 	bl	FtlGetLastWrittenPage
 	sxth	w1, w0
 	add	w0, w0, 1
@@ -10469,22 +10505,22 @@ FtlMapTblRecovery:
 	str	w0, [x19, 48]
 	add	x28, x28, :lo12:.LANCHOR180
 	ldr	x0, [x29, 128]
-	add	x24, x0, :lo12:.LANCHOR138
-.L1399:
+	add	x22, x0, :lo12:.LANCHOR138
+.L1426:
 	ldr	w0, [x29, 152]
-	cmp	w22, w0
-	ble	.L1402
-.L1416:
+	cmp	w24, w0
+	ble	.L1429
+.L1443:
 	mov	x0, x19
 	bl	ftl_free_no_use_map_blk
 	adrp	x0, .LANCHOR20
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x0, #:lo12:.LANCHOR20]
 	cmp	w1, w0
-	bne	.L1404
+	bne	.L1431
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L1404:
+.L1431:
 	mov	x0, x19
 	bl	ftl_map_blk_gc
 	mov	x0, x19
@@ -10497,54 +10533,57 @@ FtlMapTblRecovery:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L1402:
+.L1429:
 	ldrh	w0, [x26]
 	mov	w2, 1
 	mov	w1, w2
-	orr	w0, w22, w0, lsl 10
-	str	w0, [x24, 4]
-	mov	x0, x24
+	orr	w0, w24, w0, lsl 10
+	str	w0, [x22, 4]
+	mov	x0, x22
 	bl	FlashReadPages
-	ldr	x0, [x24, 16]
+	ldr	x0, [x22, 16]
 	ldr	w0, [x0, 12]
 	str	w0, [x29, 156]
 	uxtw	x0, w0
-	cbz	w0, .L1400
+	cbz	w0, .L1427
+	ldr	w0, [x22]
+	cmn	w0, #1
+	beq	.L1427
 	ldrh	w1, [x27]
-	ldr	x0, [x24, 8]
+	ldr	x0, [x22, 8]
 	bl	js_hash
 	ldr	w1, [x29, 156]
 	cmp	w1, w0
-	beq	.L1400
+	beq	.L1427
 	mov	w5, w0
 	mov	x4, x1
-	mov	w3, w22
+	mov	w3, w24
 	mov	w2, w20
 	mov	x1, x28
-	adrp	x0, .LC39
-	add	x0, x0, :lo12:.LC39
+	adrp	x0, .LC47
+	add	x0, x0, :lo12:.LC47
 	bl	printf
 	mov	w0, -1
-	str	w0, [x24]
-.L1400:
-	ldr	w0, [x24]
+	str	w0, [x22]
+.L1427:
+	ldr	w0, [x22]
 	cmn	w0, #1
-	beq	.L1401
+	beq	.L1428
 	ldrh	w0, [x21, 8]
 	cmp	w25, w0
-	bls	.L1401
+	bls	.L1428
 	ldrh	w2, [x21]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
-	bne	.L1401
+	bne	.L1428
 	ubfiz	x0, x0, 2, 16
-	ldr	w1, [x24, 4]
+	ldr	w1, [x22, 4]
 	str	w1, [x23, x0]
-.L1401:
-	add	w22, w22, 1
-	sxth	w22, w22
-	b	.L1399
-.L1398:
+.L1428:
+	add	w6, w24, 1
+	sxth	w24, w6
+	b	.L1426
+.L1425:
 	lsl	x2, x28, 1
 	ldr	x0, [x22, #:lo12:.LANCHOR106]
 	str	x0, [x27, 8]
@@ -10561,16 +10600,16 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	w0, [x27]
 	cmn	w0, #1
-	beq	.L1418
+	beq	.L1445
 	ldrh	w1, [x21]
 	ldrh	w0, [x19, 4]
 	cmp	w1, w0
-	bne	.L1418
+	bne	.L1445
 	ldrh	w1, [x21, 8]
 	mov	w0, 64245
 	cmp	w1, w0
-	beq	.L1406
-.L1418:
+	beq	.L1433
+.L1445:
 	adrp	x0, .LANCHOR23
 	add	x0, x0, :lo12:.LANCHOR23
 	mov	w28, 0
@@ -10578,11 +10617,11 @@ FtlMapTblRecovery:
 	adrp	x0, .LANCHOR180
 	add	x0, x0, :lo12:.LANCHOR180
 	str	x0, [x29, 112]
-.L1407:
+.L1434:
 	ldr	x0, [x29, 96]
 	ldrh	w0, [x0]
 	cmp	w28, w0
-	bge	.L1414
+	bge	.L1441
 	ldr	x0, [x29, 136]
 	mov	w2, 1
 	mov	w1, w2
@@ -10595,69 +10634,72 @@ FtlMapTblRecovery:
 	ldr	w0, [x0, 12]
 	str	w0, [x29, 156]
 	uxtw	x0, w0
-	cbz	w0, .L1411
+	cbz	w0, .L1438
+	ldr	w0, [x27]
+	cmn	w0, #1
+	beq	.L1438
 	ldr	x0, [x29, 120]
 	ldrh	w1, [x0]
 	ldr	x0, [x27, 8]
 	bl	js_hash
 	ldr	w1, [x29, 156]
 	cmp	w1, w0
-	beq	.L1411
+	beq	.L1438
 	mov	x4, x1
 	ldr	x1, [x29, 112]
 	mov	w5, w0
 	mov	w3, w28
 	mov	w2, w20
-	adrp	x0, .LC40
-	add	x0, x0, :lo12:.LC40
+	adrp	x0, .LC48
+	add	x0, x0, :lo12:.LC48
 	bl	printf
 	mov	w0, -1
 	str	w0, [x27]
-.L1411:
+.L1438:
 	ldr	w0, [x27]
 	cmn	w0, #1
-	beq	.L1412
+	beq	.L1439
 	ldrh	w0, [x21, 8]
 	cmp	w25, w0
-	bls	.L1412
+	bls	.L1439
 	ldrh	w2, [x21]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
-	bne	.L1412
+	bne	.L1439
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x27, 4]
 	str	w1, [x23, x0]
-.L1412:
+.L1439:
 	add	w7, w28, 1
 	sxth	w28, w7
-	b	.L1407
-.L1406:
+	b	.L1434
+.L1433:
 	ldrh	w3, [x26, #:lo12:.LANCHOR20]
 	mov	w0, 0
 	ldr	x4, [x22, #:lo12:.LANCHOR106]
 	sub	w3, w3, #1
-.L1408:
+.L1435:
 	cmp	w0, w3
-	blt	.L1410
-.L1414:
+	blt	.L1437
+.L1441:
 	add	w20, w20, 1
 	sxth	w20, w20
-	b	.L1397
-.L1410:
+	b	.L1424
+.L1437:
 	lsl	w2, w0, 1
 	sxtw	x2, w2
 	lsl	x1, x2, 2
 	ldrh	w1, [x4, x1]
 	cmp	w25, w1
-	bls	.L1409
+	bls	.L1436
 	add	x2, x2, 1
 	ubfiz	x1, x1, 2, 16
 	ldr	w2, [x4, x2, lsl 2]
 	str	w2, [x23, x1]
-.L1409:
+.L1436:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L1408
+	b	.L1435
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
 	.section	.text.FtlLoadVonderInfo,"ax",@progbits
 	.align	2
@@ -10731,20 +10773,20 @@ FtlSysBlkInit:
 	ldrh	w1, [x0, #:lo12:.LANCHOR139]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1437
-.L1439:
+	bne	.L1470
+.L1472:
 	mov	w21, -1
-.L1436:
+.L1469:
 	mov	w0, w21
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1437:
+.L1470:
 	bl	FtlLoadSysInfo
 	mov	w21, w0
-	cbnz	w0, .L1439
+	cbnz	w0, .L1472
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -10760,19 +10802,19 @@ FtlSysBlkInit:
 	ldr	x1, [x0, #:lo12:.LANCHOR55]
 	mov	w0, 0
 	add	x1, x1, 4
-.L1440:
+.L1473:
 	cmp	w0, w2
-	bge	.L1445
+	bge	.L1478
 	ldr	w3, [x1], 16
-	tbz	w3, #31, .L1441
-.L1445:
+	tbz	w3, #31, .L1474
+.L1478:
 	adrp	x3, .LANCHOR83
 	cmp	w0, w2
 	ldr	w1, [x3, #:lo12:.LANCHOR83]
 	add	w1, w1, 32
 	str	w1, [x3, #:lo12:.LANCHOR83]
-	bge	.L1447
-.L1442:
+	bge	.L1480
+.L1475:
 	adrp	x23, .LANCHOR51
 	add	x20, x23, :lo12:.LANCHOR51
 	mov	x0, x20
@@ -10811,17 +10853,17 @@ FtlSysBlkInit:
 	strh	w1, [x0, 30]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1449:
+.L1482:
 	bl	FtlVpcTblFlush
-	b	.L1436
-.L1441:
+	b	.L1469
+.L1474:
 	add	w0, w0, 1
-	b	.L1440
-.L1447:
+	b	.L1473
+.L1480:
 	ldrh	w0, [x19, #:lo12:.LANCHOR156]
-	cbnz	w0, .L1442
+	cbnz	w0, .L1475
 	bl	l2p_flush
-	b	.L1449
+	b	.L1482
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.section	.text.ftl_low_format,"ax",@progbits
 	.align	2
@@ -10834,17 +10876,19 @@ ftl_low_format:
 	stp	x23, x24, [sp, 48]
 	adrp	x24, .LANCHOR4
 	str	wzr, [x0, #:lo12:.LANCHOR83]
-	ldrh	w0, [x24, #:lo12:.LANCHOR4]
+	adrp	x0, .LANCHOR143
 	stp	x19, x20, [sp, 16]
 	adrp	x20, .LANCHOR82
+	str	wzr, [x0, #:lo12:.LANCHOR143]
+	ldrh	w0, [x24, #:lo12:.LANCHOR4]
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	str	wzr, [x20, #:lo12:.LANCHOR82]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	w0, .L1451
+	cbz	w0, .L1484
 	bl	FtlMakeBbt
-.L1451:
+.L1484:
 	adrp	x23, .LANCHOR12
 	adrp	x0, .LANCHOR109
 	mov	w6, 23752
@@ -10855,31 +10899,31 @@ ftl_low_format:
 	lsl	w1, w1, 7
 	ldr	x5, [x0, #:lo12:.LANCHOR110]
 	mov	w0, 0
-.L1452:
+.L1485:
 	cmp	w0, w1
-	blt	.L1453
+	blt	.L1486
 	adrp	x21, .LANCHOR5
 	adrp	x22, .LANCHOR6
 	add	x26, x22, :lo12:.LANCHOR6
 	mov	w19, 0
 	ldrh	w25, [x21, #:lo12:.LANCHOR5]
-.L1454:
+.L1487:
 	ldrh	w0, [x26]
 	cmp	w0, w25
-	bhi	.L1455
+	bhi	.L1488
 	adrp	x25, .LANCHOR3
 	sub	w1, w19, #2
 	ldrh	w0, [x25, #:lo12:.LANCHOR3]
 	cmp	w1, w0, lsl 1
-	bgt	.L1456
-.L1460:
+	bgt	.L1489
+.L1493:
 	add	x26, x21, :lo12:.LANCHOR5
 	mov	w19, 0
 	mov	w24, 0
-.L1457:
+.L1490:
 	ldrh	w0, [x26]
 	cmp	w0, w24
-	bhi	.L1461
+	bhi	.L1494
 	adrp	x0, .LANCHOR99
 	ldrh	w1, [x22, #:lo12:.LANCHOR6]
 	ldrh	w4, [x25, #:lo12:.LANCHOR3]
@@ -10896,28 +10940,28 @@ ftl_low_format:
 	mov	w6, 24
 	mul	w6, w4, w6
 	cmp	w19, w6
-	ble	.L1462
+	ble	.L1495
 	sub	w1, w1, w19
 	udiv	w1, w1, w4
 	str	w1, [x3, #:lo12:.LANCHOR152]
 	lsr	w1, w1, 5
 	add	w1, w1, 24
 	strh	w1, [x2, #:lo12:.LANCHOR171]
-.L1462:
+.L1495:
 	adrp	x1, .LANCHOR15
 	ldrh	w1, [x1, #:lo12:.LANCHOR15]
-	cbz	w1, .L1464
+	cbz	w1, .L1497
 	ldrh	w6, [x2, #:lo12:.LANCHOR171]
 	add	w6, w6, w1, lsr 1
 	strh	w6, [x2, #:lo12:.LANCHOR171]
 	mul	w6, w1, w4
 	cmp	w19, w6
-	bge	.L1464
+	bge	.L1497
 	add	w1, w1, 32
 	str	w5, [x3, #:lo12:.LANCHOR152]
 	add	w1, w0, w1
 	strh	w1, [x2, #:lo12:.LANCHOR171]
-.L1464:
+.L1497:
 	ldrh	w1, [x2, #:lo12:.LANCHOR171]
 	adrp	x25, .LANCHOR179
 	ldr	w0, [x3, #:lo12:.LANCHOR152]
@@ -10941,11 +10985,11 @@ ftl_low_format:
 	lsl	w2, w2, 1
 	bl	ftl_memset
 	adrp	x0, .LANCHOR59
-	adrp	x1, .LANCHOR144
+	adrp	x1, .LANCHOR145
 	ldrh	w2, [x21, #:lo12:.LANCHOR5]
 	str	wzr, [x0, #:lo12:.LANCHOR59]
-	add	x0, x1, :lo12:.LANCHOR144
-	strh	w23, [x1, #:lo12:.LANCHOR144]
+	add	x0, x1, :lo12:.LANCHOR145
+	strh	w23, [x1, #:lo12:.LANCHOR145]
 	mov	w1, 255
 	lsr	w2, w2, 3
 	strh	wzr, [x0, 2]
@@ -10961,20 +11005,20 @@ ftl_low_format:
 	ldr	x0, [x0, #:lo12:.LANCHOR1]
 	strb	wzr, [x19, 6]
 	bl	ftl_memset
-.L1466:
+.L1499:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1467
+	cbnz	w1, .L1500
 	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L1466
-.L1453:
+	b	.L1499
+.L1486:
 	ubfiz	x3, x0, 2, 16
 	mvn	w2, w0
 	orr	w2, w0, w2, lsl 16
@@ -10982,8 +11026,8 @@ ftl_low_format:
 	and	w0, w0, 65535
 	str	w2, [x4, x3]
 	str	w6, [x5, x3]
-	b	.L1452
-.L1455:
+	b	.L1485
+.L1488:
 	mov	w0, w25
 	mov	w1, 1
 	add	w25, w25, 1
@@ -10991,8 +11035,8 @@ ftl_low_format:
 	add	w19, w19, w0
 	and	w25, w25, 65535
 	and	w19, w19, 65535
-	b	.L1454
-.L1456:
+	b	.L1487
+.L1489:
 	udiv	w0, w19, w0
 	adrp	x1, .LANCHOR31
 	ldr	w19, [x1, #:lo12:.LANCHOR31]
@@ -11002,17 +11046,17 @@ ftl_low_format:
 	add	x24, x22, :lo12:.LANCHOR6
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	w19, [x21, #:lo12:.LANCHOR5]
-.L1458:
+.L1491:
 	ldrh	w0, [x24]
 	cmp	w0, w19
-	bls	.L1460
+	bls	.L1493
 	mov	w0, w19
 	add	w19, w19, 1
 	mov	w1, 1
 	and	w19, w19, 65535
 	bl	FtlLowFormatEraseBlock
-	b	.L1458
-.L1461:
+	b	.L1491
+.L1494:
 	mov	w0, w24
 	mov	w1, 0
 	add	w24, w24, 1
@@ -11020,8 +11064,8 @@ ftl_low_format:
 	add	w19, w19, w0
 	and	w24, w24, 65535
 	and	w19, w19, 65535
-	b	.L1457
-.L1467:
+	b	.L1490
+.L1500:
 	ldr	w1, [x20, #:lo12:.LANCHOR82]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
@@ -11041,20 +11085,20 @@ ftl_low_format:
 	mov	w1, 1
 	strb	wzr, [x0, 6]
 	strb	w1, [x0, 8]
-.L1468:
+.L1501:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1469
+	cbnz	w1, .L1502
 	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L1468
-.L1469:
+	b	.L1501
+.L1502:
 	ldr	w1, [x20, #:lo12:.LANCHOR82]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
@@ -11080,11 +11124,11 @@ ftl_low_format:
 	str	w0, [x20, #:lo12:.LANCHOR82]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	w0, .L1470
+	cbnz	w0, .L1503
 	adrp	x0, .LANCHOR166
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR166]
-.L1470:
+.L1503:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11099,8 +11143,8 @@ ftl_low_format:
 	.type	sftl_init, %function
 sftl_init:
 	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LC41
-	add	x1, x1, :lo12:.LC41
+	adrp	x1, .LC49
+	add	x1, x1, :lo12:.LC49
 	mov	w0, -1
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
@@ -11108,8 +11152,8 @@ sftl_init:
 	adrp	x19, .LANCHOR181
 	add	x19, x19, :lo12:.LANCHOR181
 	str	w0, [x20, #:lo12:.LANCHOR166]
-	adrp	x0, .LC34
-	add	x0, x0, :lo12:.LC34
+	adrp	x0, .LC38
+	add	x0, x0, :lo12:.LC38
 	bl	printf
 	adrp	x0, .LANCHOR0
 	add	x0, x0, :lo12:.LANCHOR0
@@ -11119,34 +11163,21 @@ sftl_init:
 	adrp	x0, .LANCHOR4
 	ldrh	w0, [x0, #:lo12:.LANCHOR4]
 	bl	FtlFreeSysBlkQueueInit
-.L1476:
+.L1509:
 	bl	FtlLoadBbt
-	cbz	w0, .L1477
-.L1492:
+	cbz	w0, .L1510
+.L1520:
 	ldr	w0, [x19]
 	cmp	w0, 1
-	bne	.L1476
+	bne	.L1509
 	str	wzr, [x19]
 	bl	ftl_low_format
-	b	.L1476
-.L1477:
+	b	.L1509
+.L1510:
 	bl	FtlSysBlkInit
-	cbnz	w0, .L1492
-	mov	w0, 1
-	str	w0, [x20, #:lo12:.LANCHOR166]
-	adrp	x0, .LANCHOR48
-	ldrh	w0, [x0, #:lo12:.LANCHOR48]
-	cmp	w0, 15
-	bhi	.L1489
-	mov	w19, 8129
-.L1483:
+	cbnz	w0, .L1520
 	mov	w1, 1
-	mov	w0, 0
-	bl	rk_ftl_garbage_collect
-	subs	w19, w19, #1
-	bne	.L1483
-.L1489:
-	mov	w0, 0
+	str	w1, [x20, #:lo12:.LANCHOR166]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -11167,17 +11198,17 @@ FtlWriteToIDB:
 	stp	x21, x22, [sp, 32]
 	adrp	x24, .LANCHOR182
 	stp	x27, x28, [sp, 80]
-	bls	.L1494
+	bls	.L1522
 	mov	w19, w0
 	cmp	w0, 575
-	bls	.L1495
-.L1494:
+	bls	.L1523
+.L1522:
 	ldr	w0, [x24, #:lo12:.LANCHOR182]
-	cbnz	w0, .L1496
-.L1561:
+	cbnz	w0, .L1524
+.L1589:
 	mov	w19, 0
-	b	.L1493
-.L1496:
+	b	.L1521
+.L1524:
 	adrp	x0, .LANCHOR183
 	str	x0, [x29, 120]
 	mov	w1, 35899
@@ -11185,7 +11216,7 @@ FtlWriteToIDB:
 	movk	w1, 0xfcdc, lsl 16
 	ldr	w2, [x23]
 	cmp	w2, w1
-	bne	.L1498
+	bne	.L1526
 	adrp	x21, .LANCHOR0
 	add	x0, x21, :lo12:.LANCHOR0
 	mov	w19, 65535
@@ -11194,9 +11225,9 @@ FtlWriteToIDB:
 	mov	x0, 262140
 	add	x2, x23, x0
 	mov	w0, 0
-.L1502:
+.L1530:
 	ldr	w4, [x2]
-	cbnz	w4, .L1499
+	cbnz	w4, .L1527
 	ldr	w4, [x23, w0, uxtw 2]
 	add	w0, w0, 1
 	str	w4, [x2], -4
@@ -11204,13 +11235,13 @@ FtlWriteToIDB:
 	sub	w19, w19, #1
 	csel	w0, w0, wzr, cc
 	cmp	w19, 4096
-	bne	.L1502
+	bne	.L1530
 	mov	w19, 512
-	b	.L1501
-.L1499:
+	b	.L1529
+.L1527:
 	add	w19, w19, 127
 	lsr	w19, w19, 7
-.L1501:
+.L1529:
 	add	w0, w19, 4
 	ubfiz	w1, w1, 2, 14
 	mov	w22, 0
@@ -11221,7 +11252,7 @@ FtlWriteToIDB:
 	str	w0, [x29, 136]
 	adrp	x0, .LANCHOR78
 	add	x20, x0, :lo12:.LANCHOR78
-.L1524:
+.L1552:
 	adrp	x26, .LANCHOR184
 	mov	w1, 0
 	mov	x2, 512
@@ -11234,27 +11265,27 @@ FtlWriteToIDB:
 	add	x0, x0, :lo12:.LANCHOR78
 	ldr	x1, [x0, 32]
 	mul	w25, w27, w22
-	cbz	x1, .L1532
+	cbz	x1, .L1560
 	ldr	x0, [x0, 40]
 	mov	w26, 6
 	cmp	x0, 0
 	mov	w0, 9
 	csel	w26, w26, w0, eq
-.L1503:
+.L1531:
 	ldr	x2, [x20, 8]
 	mov	w1, w25
 	mov	w0, 0
 	blr	x2
 	ldr	w0, [x29, 156]
 	cmp	w0, 1
-	beq	.L1504
+	beq	.L1532
 	ldr	x2, [x20, 8]
 	add	w1, w27, w25
 	mov	w0, 0
 	blr	x2
-.L1504:
+.L1532:
 	cmp	w26, 9
-	bne	.L1534
+	bne	.L1562
 	ldr	x0, [x29, 144]
 	mov	w2, 1024
 	mov	w1, 0
@@ -11279,7 +11310,7 @@ FtlWriteToIDB:
 	add	x0, x28, 12
 	bl	js_hash
 	str	w0, [x28, 8]
-.L1505:
+.L1533:
 	ldr	w0, [x29, 156]
 	mov	x6, x23
 	mul	w0, w0, w27
@@ -11287,22 +11318,22 @@ FtlWriteToIDB:
 	str	w0, [x29, 140]
 	add	w0, w25, 1
 	str	w0, [x29, 132]
-.L1506:
+.L1534:
 	ldr	w0, [x29, 140]
 	mov	w1, w27
 	cmp	w27, w0
-	bcs	.L1513
+	bcs	.L1541
 	cmp	w26, 9
-	bne	.L1507
+	bne	.L1535
 	ldr	w0, [x29, 132]
 	add	w0, w0, w1
-.L1560:
+.L1588:
 	str	w0, [x29, 160]
 	mov	w0, 61424
 	str	w0, [x29, 164]
 	cmp	w1, 0
 	ccmp	w26, 9, 0, eq
-	bne	.L1509
+	bne	.L1537
 	ldr	x1, [x20, 32]
 	mov	w0, 70
 	str	x6, [x29, 104]
@@ -11322,8 +11353,8 @@ FtlWriteToIDB:
 	ldr	w1, [x29, 112]
 	ldr	x6, [x29, 104]
 	cmn	w1, #1
-	bne	.L1510
-.L1513:
+	bne	.L1538
+.L1541:
 	ldr	x0, [x29, 144]
 	ldr	x26, [x0, #:lo12:.LANCHOR184]
 	add	x0, x21, :lo12:.LANCHOR0
@@ -11332,21 +11363,21 @@ FtlWriteToIDB:
 	mul	w1, w0, w22
 	str	w1, [x29, 140]
 	ldr	x1, [x20, 32]
-	cbnz	x1, .L1511
+	cbnz	x1, .L1539
 	mov	w25, 6
-.L1512:
+.L1540:
 	ldr	w1, [x29, 156]
 	mov	x27, 0
 	mul	w0, w1, w0
 	str	w0, [x29, 132]
-.L1515:
+.L1543:
 	ldr	w0, [x29, 132]
 	mov	w1, w27
 	cmp	w27, w0
-	bcs	.L1519
+	bcs	.L1547
 	cmp	w27, 0
 	ccmp	w25, 9, 0, eq
-	bne	.L1516
+	bne	.L1544
 	ldr	x1, [x20, 32]
 	mov	w0, 70
 	blr	x1
@@ -11370,34 +11401,34 @@ FtlWriteToIDB:
 	mov	w1, 18766
 	movk	w1, 0x464e, lsl 16
 	cmp	w0, w1
-	beq	.L1517
-.L1519:
+	beq	.L1545
+.L1547:
 	ldr	x0, [x29, 144]
 	mov	x2, x23
 	mov	x1, 0
 	ldr	x0, [x0, #:lo12:.LANCHOR184]
-.L1518:
+.L1546:
 	ldr	w3, [x29, 136]
 	mov	w26, w1
 	cmp	w1, w3
-	bcc	.L1522
+	bcc	.L1550
 	ldr	w0, [x29, 152]
 	add	w0, w0, 1
 	str	w0, [x29, 152]
 	cmp	w0, 5
-	bls	.L1521
-	b	.L1525
-.L1532:
+	bls	.L1549
+	b	.L1553
+.L1560:
 	mov	w26, 6
-	b	.L1503
-.L1534:
+	b	.L1531
+.L1562:
 	mov	x28, 0
-	b	.L1505
-.L1507:
+	b	.L1533
+.L1535:
 	add	w0, w1, w25
 	lsl	w0, w0, 2
-	b	.L1560
-.L1509:
+	b	.L1588
+.L1537:
 	ldr	x7, [x20, 16]
 	add	x3, x29, 160
 	mov	x2, x6
@@ -11406,20 +11437,20 @@ FtlWriteToIDB:
 	str	x6, [x29, 112]
 	blr	x7
 	cmn	w0, #1
-	beq	.L1513
+	beq	.L1541
 	ldr	x6, [x29, 112]
 	add	x6, x6, 2048
-.L1510:
+.L1538:
 	add	x27, x27, 1
-	b	.L1506
-.L1511:
+	b	.L1534
+.L1539:
 	ldr	x1, [x20, 40]
 	mov	w25, 6
 	cmp	x1, 0
 	mov	w1, 9
 	csel	w25, w25, w1, eq
-	b	.L1512
-.L1516:
+	b	.L1540
+.L1544:
 	ldr	x6, [x20, 24]
 	add	x3, x29, 160
 	ldr	w0, [x29, 140]
@@ -11428,16 +11459,16 @@ FtlWriteToIDB:
 	mov	w0, 0
 	blr	x6
 	cmn	w0, #1
-	beq	.L1519
+	beq	.L1547
 	ldr	w0, [x29, 164]
 	mov	w1, 61424
 	cmp	w0, w1
-	bne	.L1519
+	bne	.L1547
 	add	x26, x26, 2048
-.L1517:
+.L1545:
 	add	x27, x27, 1
-	b	.L1515
-.L1522:
+	b	.L1543
+.L1550:
 	mov	x25, x2
 	ldr	w4, [x0, x1, lsl 2]
 	lsl	x27, x1, 2
@@ -11445,7 +11476,7 @@ FtlWriteToIDB:
 	add	x1, x1, 1
 	ldr	w3, [x25]
 	cmp	w4, w3
-	beq	.L1518
+	beq	.L1546
 	mov	x2, 512
 	mov	w1, 0
 	bl	memset
@@ -11455,8 +11486,8 @@ FtlWriteToIDB:
 	mov	w4, w26
 	ldr	x0, [x0, #:lo12:.LANCHOR184]
 	ldr	w2, [x0, x27]
-	adrp	x0, .LC42
-	add	x0, x0, :lo12:.LC42
+	adrp	x0, .LC50
+	add	x0, x0, :lo12:.LC50
 	bl	printf
 	add	x0, x21, :lo12:.LANCHOR0
 	ldr	x2, [x20, 8]
@@ -11464,16 +11495,16 @@ FtlWriteToIDB:
 	mov	w0, 0
 	mul	w1, w1, w22
 	blr	x2
-.L1521:
+.L1549:
 	ldr	w0, [x29, 156]
 	add	w22, w22, w0
 	cmp	w22, 15
-	bls	.L1524
+	bls	.L1552
 	ldr	w0, [x29, 152]
-	cbnz	w0, .L1525
-.L1498:
+	cbnz	w0, .L1553
+.L1526:
 	mov	w19, -1
-.L1525:
+.L1553:
 	ldr	x0, [x29, 120]
 	str	wzr, [x24, #:lo12:.LANCHOR182]
 	ldr	x0, [x0, #:lo12:.LANCHOR183]
@@ -11481,7 +11512,7 @@ FtlWriteToIDB:
 	adrp	x0, .LANCHOR184
 	ldr	x0, [x0, #:lo12:.LANCHOR184]
 	bl	free
-.L1493:
+.L1521:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11490,11 +11521,11 @@ FtlWriteToIDB:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 224
 	ret
-.L1495:
+.L1523:
 	mov	w21, w1
 	mov	x22, x2
 	cmp	w0, 64
-	bne	.L1526
+	bne	.L1554
 	adrp	x20, .LANCHOR183
 	mov	w0, 262144
 	bl	ftl_malloc
@@ -11505,55 +11536,55 @@ FtlWriteToIDB:
 	adrp	x0, .LANCHOR184
 	str	x1, [x0, #:lo12:.LANCHOR184]
 	ldr	x0, [x20, #:lo12:.LANCHOR183]
-	cbz	x0, .L1527
-	cbz	x1, .L1527
+	cbz	x0, .L1555
+	cbz	x1, .L1555
 	mov	w1, 1
 	mov	w2, 262144
 	str	w1, [x24, #:lo12:.LANCHOR182]
 	mov	w1, 0
 	bl	ftl_memset
-.L1526:
+.L1554:
 	ldr	w0, [x24, #:lo12:.LANCHOR182]
-	cbz	w0, .L1561
+	cbz	w0, .L1589
 	adrp	x0, .LANCHOR183
 	cmp	w19, 63
 	ldr	x1, [x0, #:lo12:.LANCHOR183]
-	bhi	.L1529
+	bhi	.L1557
 	mov	w0, 64
 	sub	w19, w0, w19
 	sub	w21, w21, w19
 	ubfiz	x19, x19, 9, 25
 	add	x22, x22, x19
 	mov	x20, x1
-.L1530:
+.L1558:
 	cmp	w25, 575
-	bls	.L1531
+	bls	.L1559
 	sub	w21, w21, w23
 	sub	w21, w21, #446
-.L1531:
+.L1559:
 	mov	w4, w21
 	mov	x3, x20
 	mov	w2, 262144
-	adrp	x0, .LC44
-	add	x0, x0, :lo12:.LC44
+	adrp	x0, .LC52
+	add	x0, x0, :lo12:.LC52
 	bl	printf
 	lsl	w2, w21, 9
 	mov	x1, x22
 	mov	x0, x20
 	bl	ftl_memcpy
-	b	.L1561
-.L1527:
+	b	.L1589
+.L1555:
 	adrp	x1, .LANCHOR185
-	adrp	x0, .LC43
+	adrp	x0, .LC51
 	add	x1, x1, :lo12:.LANCHOR185
-	add	x0, x0, :lo12:.LC43
+	add	x0, x0, :lo12:.LC51
 	bl	printf
-	b	.L1526
-.L1529:
+	b	.L1554
+.L1557:
 	lsl	w20, w19, 7
 	sub	w20, w20, #8192
 	add	x20, x1, x20, lsl 2
-	b	.L1530
+	b	.L1558
 	.size	FtlWriteToIDB, .-FtlWriteToIDB
 	.section	.text.sftl_write,"ax",@progbits
 	.align	2
@@ -12218,7 +12249,7 @@ g_gc_skip_write_count:
 	.zero	4
 	.section	.bss.g_gc_superblock,"aw",@nobits
 	.align	3
-	.set	.LANCHOR144,. + 0
+	.set	.LANCHOR145,. + 0
 	.type	g_gc_superblock, %object
 	.size	g_gc_superblock, 48
 g_gc_superblock:
@@ -12281,7 +12312,7 @@ g_nand_phy_info:
 	.zero	24
 	.section	.bss.g_num_data_superblocks,"aw",@nobits
 	.align	1
-	.set	.LANCHOR45,. + 0
+	.set	.LANCHOR44,. + 0
 	.type	g_num_data_superblocks, %object
 	.size	g_num_data_superblocks, 2
 g_num_data_superblocks:
@@ -12344,7 +12375,7 @@ g_tmp_data_superblock_id:
 	.zero	2
 	.section	.bss.g_totle_avg_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR145,. + 0
+	.set	.LANCHOR143,. + 0
 	.type	g_totle_avg_erase_count, %object
 	.size	g_totle_avg_erase_count, 4
 g_totle_avg_erase_count:
@@ -12532,21 +12563,21 @@ p_data_block_list_table:
 	.zero	8
 	.section	.bss.p_data_block_list_tail,"aw",@nobits
 	.align	3
-	.set	.LANCHOR44,. + 0
+	.set	.LANCHOR43,. + 0
 	.type	p_data_block_list_tail, %object
 	.size	p_data_block_list_tail, 8
 p_data_block_list_tail:
 	.zero	8
 	.section	.bss.p_erase_count_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR43,. + 0
+	.set	.LANCHOR47,. + 0
 	.type	p_erase_count_table, %object
 	.size	p_erase_count_table, 8
 p_erase_count_table:
 	.zero	8
 	.section	.bss.p_free_data_block_list_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR47,. + 0
+	.set	.LANCHOR46,. + 0
 	.type	p_free_data_block_list_head, %object
 	.size	p_free_data_block_list_head, 8
 p_free_data_block_list_head:
@@ -12816,345 +12847,363 @@ power_up_flag:
 .LC8:
 	.string	"not free: w: s:"
 	.section	.rodata.FlashProgPages.str1.1,"aMS",@progbits,1
-.LC11:
+.LC14:
 	.string	"prog read error: = %x\n"
-.LC12:
+.LC15:
+	.string	"prog read REFRESH: = %x\n"
+.LC16:
 	.string	"prog read s error: = %x %x %x\n"
-.LC13:
+.LC17:
 	.string	"prog read d error: = %x %x %x\n"
+	.section	.rodata.FlashReadPages.str1.1,"aMS",@progbits,1
+.LC11:
+	.string	"FlashReadPages %x %x error_ecc_bits %d\n"
+.LC12:
+	.string	"data:"
+.LC13:
+	.string	"spare:"
 	.section	.rodata.FtlBbmMapBadBlock.str1.1,"aMS",@progbits,1
 .LC0:
 	.string	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\n"
 	.section	.rodata.FtlBbmTblFlush.str1.1,"aMS",@progbits,1
-.LC14:
+.LC18:
 	.string	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\n"
-.LC15:
+.LC19:
 	.string	"FtlBbmTblFlush error:%x\n"
-.LC16:
+.LC20:
 	.string	"FtlBbmTblFlush error = %x error count = %d\n"
 	.section	.rodata.FtlFreeSysBlkQueueOut.str1.1,"aMS",@progbits,1
 .LC9:
 	.string	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\n"
 	.section	.rodata.FtlGcScanTempBlk.str1.1,"aMS",@progbits,1
-.LC31:
+.LC35:
 	.string	"FtlGcScanTempBlk Error ID %x %x!!!!!!! \n"
 	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",@progbits,1
-.LC33:
+.LC37:
 	.string	"no ect"
-.LC34:
+.LC38:
 	.string	"%s\n"
 	.section	.rodata.FtlLoadSysInfo.str1.1,"aMS",@progbits,1
-.LC38:
+.LC46:
 	.string	"%s hash error this.id =%x page =%x pre_id =%x hash =%x hash_r =%x\n"
 	.section	.rodata.FtlMapTblRecovery.str1.1,"aMS",@progbits,1
-.LC39:
+.LC47:
 	.string	"%s last blk_id =%x page =%x hash error hash =%x hash_r =%x\n"
-.LC40:
+.LC48:
 	.string	"%s scan blk_id =%x page =%x hash error hash =%x hash_r =%x\n"
 	.section	.rodata.FtlMapWritePage.str1.1,"aMS",@progbits,1
-.LC18:
+.LC22:
 	.string	"FtlMapWritePage error = %x \n"
-.LC19:
+.LC23:
 	.string	"FtlMapWritePage error = %x error count = %d\n"
 	.section	.rodata.FtlProgPages.str1.1,"aMS",@progbits,1
-.LC36:
+.LC40:
+	.string	"FtlProgPages error %x = %d\n"
+.LC41:
 	.string	"Ftlwrite decrement_vpc_count %x = %d\n"
 	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",@progbits,1
-.LC24:
+.LC27:
+	.string	"data prev_ppa = %x error...................\n"
+.LC28:
 	.string	"spuer block %x vpn is 0\n "
 	.section	.rodata.FtlVendorPartRead.str1.1,"aMS",@progbits,1
-.LC32:
+.LC36:
 	.string	"FtlVendorPartRead refresh = %x phyAddr = %x\n"
 	.section	.rodata.FtlVpcTblFlush.str1.1,"aMS",@progbits,1
-.LC35:
+.LC39:
 	.string	"FtlVpcTblFlush error = %x error count = %d\n"
 	.section	.rodata.FtlWrite.str1.1,"aMS",@progbits,1
-.LC37:
+.LC44:
+	.string	"FtlWrite: ecc error:%x %x %x\n"
+.LC45:
 	.string	"FtlWrite: lpa error:%x %x\n"
 	.section	.rodata.FtlWriteToIDB.str1.1,"aMS",@progbits,1
-.LC42:
+.LC50:
 	.string	"write_idblock fail! %x %x %x %x\n"
-.LC43:
+.LC51:
 	.string	"%s idb buffer alloc fail\n"
-.LC44:
+.LC52:
 	.string	"%p %x %p %x\n"
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",@progbits,1
 .LC1:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
-	.section	.rodata.__func__.6241,"a",@progbits
+	.section	.rodata.__func__.6243,"a",@progbits
 	.align	3
 	.set	.LANCHOR169,. + 0
-	.type	__func__.6241, %object
-	.size	__func__.6241, 13
-__func__.6241:
+	.type	__func__.6243, %object
+	.size	__func__.6243, 13
+__func__.6243:
 	.string	"FtlProgPages"
-	.section	.rodata.__func__.6269,"a",@progbits
+	.section	.rodata.__func__.6271,"a",@progbits
 	.align	3
 	.set	.LANCHOR177,. + 0
-	.type	__func__.6269, %object
-	.size	__func__.6269, 9
-__func__.6269:
+	.type	__func__.6271, %object
+	.size	__func__.6271, 9
+__func__.6271:
 	.string	"FtlWrite"
-	.section	.rodata.__func__.6344,"a",@progbits
+	.section	.rodata.__func__.6346,"a",@progbits
 	.align	3
 	.set	.LANCHOR128,. + 0
-	.type	__func__.6344, %object
-	.size	__func__.6344, 14
-__func__.6344:
+	.type	__func__.6346, %object
+	.size	__func__.6346, 14
+__func__.6346:
 	.string	"FtlBbt2Bitmap"
-	.section	.rodata.__func__.6379,"a",@progbits
+	.section	.rodata.__func__.6381,"a",@progbits
 	.align	3
 	.set	.LANCHOR141,. + 0
-	.type	__func__.6379, %object
-	.size	__func__.6379, 11
-__func__.6379:
+	.type	__func__.6381, %object
+	.size	__func__.6381, 11
+__func__.6381:
 	.string	"FtlLoadBbt"
-	.section	.rodata.__func__.6494,"a",@progbits
+	.section	.rodata.__func__.6496,"a",@progbits
 	.align	3
 	.set	.LANCHOR49,. + 0
-	.type	__func__.6494, %object
-	.size	__func__.6494, 17
-__func__.6494:
+	.type	__func__.6496, %object
+	.size	__func__.6496, 17
+__func__.6496:
 	.string	"INSERT_FREE_LIST"
-	.section	.rodata.__func__.6499,"a",@progbits
+	.section	.rodata.__func__.6501,"a",@progbits
 	.align	3
-	.set	.LANCHOR46,. + 0
-	.type	__func__.6499, %object
-	.size	__func__.6499, 17
-__func__.6499:
+	.set	.LANCHOR45,. + 0
+	.type	__func__.6501, %object
+	.size	__func__.6501, 17
+__func__.6501:
 	.string	"INSERT_DATA_LIST"
-	.section	.rodata.__func__.6530,"a",@progbits
+	.section	.rodata.__func__.6532,"a",@progbits
 	.align	3
 	.set	.LANCHOR50,. + 0
-	.type	__func__.6530, %object
-	.size	__func__.6530, 17
-__func__.6530:
+	.type	__func__.6532, %object
+	.size	__func__.6532, 17
+__func__.6532:
 	.string	"List_remove_node"
-	.section	.rodata.__func__.6562,"a",@progbits
+	.section	.rodata.__func__.6564,"a",@progbits
 	.align	3
 	.set	.LANCHOR54,. + 0
-	.type	__func__.6562, %object
-	.size	__func__.6562, 22
-__func__.6562:
+	.type	__func__.6564, %object
+	.size	__func__.6564, 22
+__func__.6564:
 	.string	"List_update_data_list"
-	.section	.rodata.__func__.6571,"a",@progbits
+	.section	.rodata.__func__.6573,"a",@progbits
 	.align	3
 	.set	.LANCHOR150,. + 0
-	.type	__func__.6571, %object
-	.size	__func__.6571, 16
-__func__.6571:
+	.type	__func__.6573, %object
+	.size	__func__.6573, 16
+__func__.6573:
 	.string	"load_l2p_region"
-	.section	.rodata.__func__.6604,"a",@progbits
+	.section	.rodata.__func__.6606,"a",@progbits
 	.align	3
 	.set	.LANCHOR81,. + 0
-	.type	__func__.6604, %object
-	.size	__func__.6604, 26
-__func__.6604:
+	.type	__func__.6606, %object
+	.size	__func__.6606, 26
+__func__.6606:
 	.string	"ftl_map_blk_alloc_new_blk"
-	.section	.rodata.__func__.6615,"a",@progbits
+	.section	.rodata.__func__.6617,"a",@progbits
 	.align	3
 	.set	.LANCHOR151,. + 0
-	.type	__func__.6615, %object
-	.size	__func__.6615, 15
-__func__.6615:
+	.type	__func__.6617, %object
+	.size	__func__.6617, 15
+__func__.6617:
 	.string	"ftl_map_blk_gc"
-	.section	.rodata.__func__.6630,"a",@progbits
+	.section	.rodata.__func__.6632,"a",@progbits
 	.align	3
 	.set	.LANCHOR148,. + 0
-	.type	__func__.6630, %object
-	.size	__func__.6630, 31
-__func__.6630:
+	.type	__func__.6632, %object
+	.size	__func__.6632, 31
+__func__.6632:
 	.string	"Ftl_write_map_blk_to_last_page"
-	.section	.rodata.__func__.6644,"a",@progbits
+	.section	.rodata.__func__.6646,"a",@progbits
 	.align	3
 	.set	.LANCHOR149,. + 0
-	.type	__func__.6644, %object
-	.size	__func__.6644, 16
-__func__.6644:
+	.type	__func__.6646, %object
+	.size	__func__.6646, 16
+__func__.6646:
 	.string	"FtlMapWritePage"
-	.section	.rodata.__func__.6669,"a",@progbits
+	.section	.rodata.__func__.6671,"a",@progbits
 	.align	3
 	.set	.LANCHOR57,. + 0
-	.type	__func__.6669, %object
-	.size	__func__.6669, 22
-__func__.6669:
+	.type	__func__.6671, %object
+	.size	__func__.6671, 22
+__func__.6671:
 	.string	"select_l2p_ram_region"
-	.section	.rodata.__func__.6686,"a",@progbits
+	.section	.rodata.__func__.6688,"a",@progbits
 	.align	3
 	.set	.LANCHOR153,. + 0
-	.type	__func__.6686, %object
-	.size	__func__.6686, 9
-__func__.6686:
+	.type	__func__.6688, %object
+	.size	__func__.6688, 9
+__func__.6688:
 	.string	"log2phys"
-	.section	.rodata.__func__.6750,"a",@progbits
+	.section	.rodata.__func__.6752,"a",@progbits
 	.align	3
 	.set	.LANCHOR165,. + 0
-	.type	__func__.6750, %object
-	.size	__func__.6750, 15
-__func__.6750:
+	.type	__func__.6752, %object
+	.size	__func__.6752, 15
+__func__.6752:
 	.string	"FtlVpcTblFlush"
-	.section	.rodata.__func__.6772,"a",@progbits
+	.section	.rodata.__func__.6774,"a",@progbits
 	.align	3
 	.set	.LANCHOR140,. + 0
-	.type	__func__.6772, %object
-	.size	__func__.6772, 14
-__func__.6772:
+	.type	__func__.6774, %object
+	.size	__func__.6774, 14
+__func__.6774:
 	.string	"FtlScanSysBlk"
-	.section	.rodata.__func__.6828,"a",@progbits
+	.section	.rodata.__func__.6830,"a",@progbits
 	.align	3
 	.set	.LANCHOR178,. + 0
-	.type	__func__.6828, %object
-	.size	__func__.6828, 15
-__func__.6828:
+	.type	__func__.6830, %object
+	.size	__func__.6830, 15
+__func__.6830:
 	.string	"FtlLoadSysInfo"
-	.section	.rodata.__func__.6850,"a",@progbits
+	.section	.rodata.__func__.6852,"a",@progbits
 	.align	3
 	.set	.LANCHOR180,. + 0
-	.type	__func__.6850, %object
-	.size	__func__.6850, 18
-__func__.6850:
+	.type	__func__.6852, %object
+	.size	__func__.6852, 18
+__func__.6852:
 	.string	"FtlMapTblRecovery"
-	.section	.rodata.__func__.6896,"a",@progbits
+	.section	.rodata.__func__.6898,"a",@progbits
 	.align	3
 	.set	.LANCHOR154,. + 0
-	.type	__func__.6896, %object
-	.size	__func__.6896, 16
-__func__.6896:
+	.type	__func__.6898, %object
+	.size	__func__.6898, 16
+__func__.6898:
 	.string	"FtlReUsePrevPpa"
-	.section	.rodata.__func__.6930,"a",@progbits
+	.section	.rodata.__func__.6932,"a",@progbits
 	.align	3
 	.set	.LANCHOR155,. + 0
-	.type	__func__.6930, %object
-	.size	__func__.6930, 22
-__func__.6930:
+	.type	__func__.6932, %object
+	.size	__func__.6932, 22
+__func__.6932:
 	.string	"FtlRecoverySuperblock"
-	.section	.rodata.__func__.6987,"a",@progbits
+	.section	.rodata.__func__.6989,"a",@progbits
 	.align	3
 	.set	.LANCHOR60,. + 0
-	.type	__func__.6987, %object
-	.size	__func__.6987, 16
-__func__.6987:
+	.type	__func__.6989, %object
+	.size	__func__.6989, 16
+__func__.6989:
 	.string	"make_superblock"
-	.section	.rodata.__func__.7008,"a",@progbits
+	.section	.rodata.__func__.7010,"a",@progbits
 	.align	3
 	.set	.LANCHOR136,. + 0
-	.type	__func__.7008, %object
-	.size	__func__.7008, 18
-__func__.7008:
+	.type	__func__.7010, %object
+	.size	__func__.7010, 18
+__func__.7010:
 	.string	"SupperBlkListInit"
-	.section	.rodata.__func__.7035,"a",@progbits
+	.section	.rodata.__func__.7037,"a",@progbits
 	.align	3
 	.set	.LANCHOR159,. + 0
-	.type	__func__.7035, %object
-	.size	__func__.7035, 14
-__func__.7035:
+	.type	__func__.7037, %object
+	.size	__func__.7037, 14
+__func__.7037:
 	.string	"ftl_check_vpc"
-	.section	.rodata.__func__.7100,"a",@progbits
+	.section	.rodata.__func__.7102,"a",@progbits
 	.align	3
-	.set	.LANCHOR143,. + 0
-	.type	__func__.7100, %object
-	.size	__func__.7100, 25
-__func__.7100:
+	.set	.LANCHOR144,. + 0
+	.type	__func__.7102, %object
+	.size	__func__.7102, 25
+__func__.7102:
 	.string	"allocate_data_superblock"
-	.section	.rodata.__func__.7121,"a",@progbits
+	.section	.rodata.__func__.7123,"a",@progbits
 	.align	3
 	.set	.LANCHOR168,. + 0
-	.type	__func__.7121, %object
-	.size	__func__.7121, 29
-__func__.7121:
+	.type	__func__.7123, %object
+	.size	__func__.7123, 29
+__func__.7123:
 	.string	"allocate_new_data_superblock"
-	.section	.rodata.__func__.7128,"a",@progbits
+	.section	.rodata.__func__.7130,"a",@progbits
 	.align	3
 	.set	.LANCHOR61,. + 0
-	.type	__func__.7128, %object
-	.size	__func__.7128, 19
-__func__.7128:
+	.type	__func__.7130, %object
+	.size	__func__.7130, 19
+__func__.7130:
 	.string	"get_new_active_ppa"
-	.section	.rodata.__func__.7141,"a",@progbits
+	.section	.rodata.__func__.7143,"a",@progbits
 	.align	3
 	.set	.LANCHOR146,. + 0
-	.type	__func__.7141, %object
-	.size	__func__.7141, 16
-__func__.7141:
+	.type	__func__.7143, %object
+	.size	__func__.7143, 16
+__func__.7143:
 	.string	"update_vpc_list"
-	.section	.rodata.__func__.7148,"a",@progbits
+	.section	.rodata.__func__.7150,"a",@progbits
 	.align	3
 	.set	.LANCHOR147,. + 0
-	.type	__func__.7148, %object
-	.size	__func__.7148, 20
-__func__.7148:
+	.type	__func__.7150, %object
+	.size	__func__.7150, 20
+__func__.7150:
 	.string	"decrement_vpc_count"
-	.section	.rodata.__func__.7218,"a",@progbits
+	.section	.rodata.__func__.7220,"a",@progbits
 	.align	3
 	.set	.LANCHOR170,. + 0
-	.type	__func__.7218, %object
-	.size	__func__.7218, 19
-__func__.7218:
+	.type	__func__.7220, %object
+	.size	__func__.7220, 19
+__func__.7220:
 	.string	"FtlGcFreeTempBlock"
-	.section	.rodata.__func__.7316,"a",@progbits
+	.section	.rodata.__func__.7319,"a",@progbits
 	.align	3
 	.set	.LANCHOR175,. + 0
-	.type	__func__.7316, %object
-	.size	__func__.7316, 23
-__func__.7316:
+	.type	__func__.7319, %object
+	.size	__func__.7319, 23
+__func__.7319:
 	.string	"rk_ftl_garbage_collect"
-	.section	.rodata.__func__.7578,"a",@progbits
+	.section	.rodata.__func__.7591,"a",@progbits
 	.align	3
 	.set	.LANCHOR137,. + 0
-	.type	__func__.7578, %object
-	.size	__func__.7578, 15
-__func__.7578:
+	.type	__func__.7591, %object
+	.size	__func__.7591, 15
+__func__.7591:
 	.string	"FlashReadPages"
-	.section	.rodata.__func__.7597,"a",@progbits
+	.section	.rodata.__func__.7610,"a",@progbits
 	.align	3
 	.set	.LANCHOR142,. + 0
-	.type	__func__.7597, %object
-	.size	__func__.7597, 15
-__func__.7597:
+	.type	__func__.7610, %object
+	.size	__func__.7610, 15
+__func__.7610:
 	.string	"FlashProgPages"
-	.section	.rodata.__func__.7621,"a",@progbits
+	.section	.rodata.__func__.7634,"a",@progbits
 	.align	3
 	.set	.LANCHOR77,. + 0
-	.type	__func__.7621, %object
-	.size	__func__.7621, 17
-__func__.7621:
+	.type	__func__.7634, %object
+	.size	__func__.7634, 17
+__func__.7634:
 	.string	"FlashEraseBlocks"
-	.section	.rodata.__func__.7736,"a",@progbits
+	.section	.rodata.__func__.7749,"a",@progbits
 	.align	3
 	.set	.LANCHOR185,. + 0
-	.type	__func__.7736, %object
-	.size	__func__.7736, 14
-__func__.7736:
+	.type	__func__.7749, %object
+	.size	__func__.7749, 14
+__func__.7749:
 	.string	"FtlWriteToIDB"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",@progbits,1
-.LC17:
+.LC21:
 	.string	"decrement_vpc_count %x = %d\n"
 	.section	.rodata.ftl_check_vpc.str1.1,"aMS",@progbits,1
-.LC25:
+.LC29:
 	.string	"...%s enter...\n"
-.LC26:
+.LC30:
 	.string	"FtlCheckVpc2 %x = %x  %x\n"
-.LC27:
+.LC31:
 	.string	"free blk vpc error %x = %x  %x\n"
 	.section	.rodata.ftl_map_blk_alloc_new_blk.str1.1,"aMS",@progbits,1
 .LC10:
 	.string	"FtlFreeSysBlkQueueOut = %x, free count = %d\n"
 	.section	.rodata.ftl_scan_all_data.str1.1,"aMS",@progbits,1
-.LC28:
+.LC32:
 	.string	"ftl_scan_all_data = %x\n"
-.LC29:
+.LC33:
 	.string	"scan lpa = %x ppa= %x\n"
-.LC30:
+.LC34:
 	.string	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\n"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",@progbits,1
-.LC20:
+.LC24:
 	.string	"region_id = %x phyAddr = %x\n"
-.LC21:
-	.string	"spare:"
-.LC22:
+.LC25:
 	.string	"map_ppn:"
-.LC23:
+.LC26:
 	.string	"load_l2p_region refresh = %x phyAddr = %x\n"
+	.section	.rodata.rk_ftl_garbage_collect.str1.1,"aMS",@progbits,1
+.LC42:
+	.string	"g_gc_superblock_free %x %x %x %x %x\n"
+.LC43:
+	.string	"lpa=%x, ppa=%x\n"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
 .LC2:
 	.string	"%s 0x%x:"
@@ -13165,6 +13214,6 @@ __func__.7736:
 .LC5:
 	.string	"\n"
 	.section	.rodata.sftl_init.str1.1,"aMS",@progbits,1
-.LC41:
-	.string	"SFTL version: 5.0.50 20181227"
+.LC49:
+	.string	"SFTL version: 5.0.50 20190215"
 	.hidden	free

commit 18601cb12a0ced8c672542509b9c3a35fd935607
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Feb 22 21:46:04 2019 +0800

    rockchip: dts: rk3308: add cd-gpios
    
    Add cd-gpios to test the mmc device whether exit.
    
    Change-Id: I6a07ff130e506678a20e5128ef4c8e608e0ec448
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-u-boot.dtsi b/arch/arm/dts/rk3308-u-boot.dtsi
index 4da226322c..fae2d4fb07 100644
--- a/arch/arm/dts/rk3308-u-boot.dtsi
+++ b/arch/arm/dts/rk3308-u-boot.dtsi
@@ -83,6 +83,11 @@
 	status = "okay";
 };
 
+&gpio0 {
+	u-boot,dm-pre-reloc;
+	status = "disabled";
+};
+
 &route_rgb {
 	status = "disabled";
 };
\ No newline at end of file
diff --git a/arch/arm/dts/rk3308.dtsi b/arch/arm/dts/rk3308.dtsi
index 1e9ec023e6..2d50ba881e 100644
--- a/arch/arm/dts/rk3308.dtsi
+++ b/arch/arm/dts/rk3308.dtsi
@@ -392,6 +392,7 @@
 			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
 		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
 		fifo-depth = <0x100>;
+		cd-gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>;
 		interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;

commit b73a762978a1a7333b0979df5ed6a98418ccc485
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Feb 22 18:19:45 2019 +0800

    dts: rockchip: rk3288: add cd-gpios
    
    Add cd-gpios to test the mmc device whether exit.
    
    Change-Id: I3d4839180b36de22ce1e5f2b26c9090b0686a8a0
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/dts/rk3288-u-boot.dtsi b/arch/arm/dts/rk3288-u-boot.dtsi
index 42e2b025ea..e51e5e0373 100644
--- a/arch/arm/dts/rk3288-u-boot.dtsi
+++ b/arch/arm/dts/rk3288-u-boot.dtsi
@@ -65,6 +65,10 @@
 	u-boot,dm-pre-reloc;
 };
 
+&gpio6 {
+	u-boot,dm-pre-reloc;
+};
+
 &usbphy0 {
 	u-boot,dm-pre-reloc;
 	status = "okay";
diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index 6e7418378e..10249bcbc9 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -211,6 +211,7 @@
 			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
 		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
 		fifo-depth = <0x100>;
+		cd-gpios = <&gpio6 RK_PC6 GPIO_ACTIVE_HIGH>;
 		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
 		reg = <0xff0c0000 0x4000>;
 		status = "disabled";

commit aa0fd9f34b65b181c5a5baa7057017a139d16482
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Feb 22 21:22:14 2019 +0800

    rockchip: px30: add cd-gpios
    
    Add cd-gpios to test the mmc device whether exit.
    
    Change-Id: Ie1cfffe0f7826eae47fab705d3a3bb7d1a85f8ce
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/dts/px30.dtsi b/arch/arm/dts/px30.dtsi
index 668eb51257..a62bc03a1d 100644
--- a/arch/arm/dts/px30.dtsi
+++ b/arch/arm/dts/px30.dtsi
@@ -807,6 +807,7 @@
 			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
 		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
 		fifo-depth = <0x100>;
+		cd-gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>;
 		interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_det &sdmmc_bus4>;

commit 01ff14b05457e995a5eee4ce4173555171474a0f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 6 18:03:47 2019 +0800

    rockchip: resource: add return value validation
    
    Change-Id: I3ed362564e7aed48fc212f299f3712fdbc19ee53
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 477aae70b2..fced26ff81 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -212,11 +212,16 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 #ifdef CONFIG_ANDROID_AB
 	char slot_suffix[3] = {0};
 
-	if (rk_avb_get_current_slot(slot_suffix))
+	if (rk_avb_get_current_slot(slot_suffix)) {
+		ret = -ENODEV;
 		goto out;
+	}
+
 	boot_partname = android_str_append(boot_partname, slot_suffix);
-	if (boot_partname == NULL)
+	if (!boot_partname) {
+		ret = -EINVAL;
 		goto out;
+	}
 #endif
 	ret = part_get_info_by_name(dev_desc, boot_partname, &part_info);
 	if (ret < 0) {
@@ -235,6 +240,7 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 	if (ret != 1) {
 		printf("%s: failed to read %s hdr, ret=%d\n",
 		       __func__, part_info.name, ret);
+		ret = -EIO;
 		goto out;
 	}
 	ret = android_image_check_header(andr_hdr);
@@ -274,17 +280,21 @@ next:
 	if (ret != 1) {
 		printf("%s: failed to read resource hdr, ret=%d\n",
 		       __func__, ret);
+		ret = -EIO;
 		goto out;
 	}
 
 	ret = resource_image_check_header(hdr);
-	if (ret < 0)
+	if (ret < 0) {
+		ret = -EINVAL;
 		goto out;
+	}
 
 	content = memalign(ARCH_DMA_MINALIGN,
 			   hdr->e_blks * hdr->e_nums * RK_BLK_SIZE);
 	if (!content) {
 		printf("%s: failed to alloc memory for content\n", __func__);
+		ret = -ENOMEM;
 		goto out;
 	}
 
@@ -294,6 +304,7 @@ next:
 	if (ret != (hdr->e_blks * hdr->e_nums)) {
 		printf("%s: failed to read resource entries, ret=%d\n",
 		       __func__, ret);
+		ret = -EIO;
 		goto err;
 	}
 
@@ -303,13 +314,14 @@ next:
 		add_file_to_list(entry, offset);
 	}
 
+	ret = 0;
 	printf("Load FDT from %s part\n", boot_partname);
 err:
 	free(content);
 out:
 	free(hdr);
 
-	return 0;
+	return ret;
 }
 
 static struct resource_file *get_file_info(struct resource_img_hdr *hdr,
@@ -318,8 +330,10 @@ static struct resource_file *get_file_info(struct resource_img_hdr *hdr,
 	struct resource_file *file;
 	struct list_head *node;
 
-	if (list_empty(&entrys_head))
-		init_resource_list(hdr);
+	if (list_empty(&entrys_head)) {
+		if (init_resource_list(hdr))
+			return NULL;
+	}
 
 	list_for_each(node, &entrys_head) {
 		file = list_entry(node, struct resource_file, link);
@@ -621,8 +635,11 @@ int rockchip_read_dtb_file(void *fdt_addr)
 	char *dtb_name = DTB_FILE;
 	int ret, size;
 
-	if (list_empty(&entrys_head))
-		init_resource_list(NULL);
+	if (list_empty(&entrys_head)) {
+		ret = init_resource_list(NULL);
+		if (ret)
+			return ret;
+	}
 
 	list_for_each(node, &entrys_head) {
 		file = list_entry(node, struct resource_file, link);

commit f4e1db9544a8994a69fe47e63f7735939641bbe4
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Mon Mar 4 10:35:12 2019 +0800

    lib: optee_client: add judgment of return value
    
    Change-Id: If616f89ffb2c3ea30afb7bced56a1ca28b1232b2
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/cmd/optee.c b/cmd/optee.c
index f1140176b6..705ac87433 100644
--- a/cmd/optee.c
+++ b/cmd/optee.c
@@ -30,9 +30,13 @@ int test_secure_storage_default(void)
 	}
 
 	debug("%s start\n", __func__);
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return -1;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return -1;
 
 	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
 						    TEEC_NONE,
@@ -164,9 +168,13 @@ int test_secure_storage_security_partition(void)
 	}
 
 	debug("%s start\n", __func__);
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return -1;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return -1;
 
 	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
 						    TEEC_NONE,
diff --git a/include/optee_include/OpteeClientInterface.h b/include/optee_include/OpteeClientInterface.h
index c2e6f90c8f..b99229ee90 100644
--- a/include/optee_include/OpteeClientInterface.h
+++ b/include/optee_include/OpteeClientInterface.h
@@ -14,7 +14,7 @@
 #define ATTEST_UUID_SIZE     (ATAP_HEX_UUID_LEN+1)
 #define ATTEST_CA_OUT_SIZE     256
 
-void test_optee(void);
+uint32_t test_optee(void);
 uint32_t trusty_read_rollback_index(uint32_t slot, uint64_t *value);
 uint32_t trusty_write_rollback_index(uint32_t slot, uint64_t value);
 uint32_t trusty_read_permanent_attributes(uint8_t *attributes, uint32_t size);
diff --git a/include/optee_include/OpteeClientMem.h b/include/optee_include/OpteeClientMem.h
index ba85f829c3..1b9affbf36 100644
--- a/include/optee_include/OpteeClientMem.h
+++ b/include/optee_include/OpteeClientMem.h
@@ -9,7 +9,7 @@
 
 #include <linux/types.h>
 
-void OpteeClientMemInit(void);
+int OpteeClientMemInit(void);
 
 void *OpteeClientMemAlloc(uint32_t length);
 
diff --git a/include/optee_include/OpteeClientRkFs-v2.h b/include/optee_include/OpteeClientRkFs-v2.h
index a8ee4d6c5b..fa710adb7e 100644
--- a/include/optee_include/OpteeClientRkFs-v2.h
+++ b/include/optee_include/OpteeClientRkFs-v2.h
@@ -70,6 +70,6 @@ int tee_supp_rk_fs_init(void);
 
 int tee_supp_rk_fs_process(size_t num_params,
 			struct tee_ioctl_param *params);
-void OpteeClientRkFsInit(void);
+int OpteeClientRkFsInit(void);
 
 #endif
diff --git a/include/optee_include/OpteeClientRkFs.h b/include/optee_include/OpteeClientRkFs.h
index d7f68bc277..ed91aa9c11 100644
--- a/include/optee_include/OpteeClientRkFs.h
+++ b/include/optee_include/OpteeClientRkFs.h
@@ -33,6 +33,6 @@ int tee_supp_rk_fs_init(void);
 
 int tee_supp_rk_fs_process(void *cmd, uint32_t cmd_size);
 
-void OpteeClientRkFsInit(void);
+int OpteeClientRkFsInit(void);
 
 #endif
diff --git a/lib/optee_clientApi/OpteeClientApiLib.c b/lib/optee_clientApi/OpteeClientApiLib.c
index a2f8c12ab4..01f24ddb3e 100644
--- a/lib/optee_clientApi/OpteeClientApiLib.c
+++ b/lib/optee_clientApi/OpteeClientApiLib.c
@@ -17,11 +17,18 @@ TEEC_Result OpteeClientApiLibInitialize(void)
 {
 	TEEC_Result status = TEEC_SUCCESS;
 
-	OpteeClientMemInit();
-
-	OpteeClientRkFsInit();
+	status = OpteeClientMemInit();
+	if (status != TEEC_SUCCESS) {
+		printf("OpteeClientMemInit fail!");
+		return status;
+	}
+	status = OpteeClientRkFsInit();
+	if (status != TEEC_SUCCESS) {
+		printf("OpteeClientRkFsInit fail!");
+		return status;
+	}
 
-	return status;
+	return TEEC_SUCCESS;
 }
 
 /*
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index d2d5c758f4..c2f931ecc3 100644
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -15,7 +15,7 @@
 
 #define	BOOT_FROM_EMMC	(1 << 1)
 
-void test_optee(void)
+uint32_t test_optee(void)
 {
 	TEEC_Result TeecResult;
 	TEEC_Context TeecContext;
@@ -29,13 +29,16 @@ void test_optee(void)
 	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {
 		printf("%s: dev_desc is NULL!\n", __func__);
-		return;
+		return -TEEC_ERROR_GENERIC;
 	}
 
-	debug("testmm start\n");
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
 						TEEC_NONE,
@@ -54,6 +57,8 @@ void test_optee(void)
 				NULL,
 				&TeecOperation,
 				&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
@@ -61,6 +66,8 @@ void test_optee(void)
 	SharedMem0.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	memcpy(SharedMem0.buffer, "filename_test", SharedMem0.size);
 
@@ -70,6 +77,8 @@ void test_optee(void)
 	SharedMem1.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	memset(SharedMem1.buffer, 'a', SharedMem1.size);
 
@@ -89,16 +98,14 @@ void test_optee(void)
 					1,
 					&TeecOperation,
 					&ErrorOrigin);
-
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
+exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
-
 	TEEC_CloseSession(&TeecSession);
-
 	TEEC_FinalizeContext(&TeecContext);
-
-	debug("testmm end\n");
-	debug("TeecResult %x\n", TeecResult);
+	return TeecResult;
 }
 
 static uint8_t b2hs_add_base(uint8_t in)
@@ -146,10 +153,14 @@ uint32_t trusty_read_rollback_index(uint32_t slot, uint64_t *value)
 	}
 
 	b2hs((uint8_t *)&slot, hs, 4, 9);
-	debug("testmm start\n");
-	OpteeClientApiLibInitialize();
+
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
 						TEEC_NONE,
@@ -167,8 +178,9 @@ uint32_t trusty_read_rollback_index(uint32_t slot, uint64_t *value)
 				TEEC_LOGIN_PUBLIC,
 				NULL,
 				&TeecOperation,
-
 				&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
@@ -176,6 +188,8 @@ uint32_t trusty_read_rollback_index(uint32_t slot, uint64_t *value)
 	SharedMem0.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	memcpy(SharedMem0.buffer, hs, SharedMem0.size);
 
@@ -185,6 +199,8 @@ uint32_t trusty_read_rollback_index(uint32_t slot, uint64_t *value)
 	SharedMem1.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
 	TeecOperation.params[0].tmpref.size = SharedMem0.size;
@@ -203,15 +219,12 @@ uint32_t trusty_read_rollback_index(uint32_t slot, uint64_t *value)
 					&ErrorOrigin);
 	if (TeecResult == TEEC_SUCCESS)
 		memcpy((char *)value, SharedMem1.buffer, SharedMem1.size);
-
+exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
-
 	TEEC_CloseSession(&TeecSession);
-
 	TEEC_FinalizeContext(&TeecContext);
 
-	debug("testmm end\n");
 	return TeecResult;
 }
 
@@ -234,9 +247,13 @@ uint32_t trusty_write_rollback_index(uint32_t slot, uint64_t value)
 	}
 
 	b2hs((uint8_t *)&slot, hs, 4, 9);
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
 						TEEC_NONE,
@@ -255,6 +272,8 @@ uint32_t trusty_write_rollback_index(uint32_t slot, uint64_t value)
 				NULL,
 				&TeecOperation,
 				&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
@@ -262,6 +281,8 @@ uint32_t trusty_write_rollback_index(uint32_t slot, uint64_t value)
 	SharedMem0.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	memcpy(SharedMem0.buffer, hs, SharedMem0.size);
 
@@ -271,6 +292,8 @@ uint32_t trusty_write_rollback_index(uint32_t slot, uint64_t value)
 	SharedMem1.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	memcpy(SharedMem1.buffer, (char *)&value, SharedMem1.size);
 
@@ -290,16 +313,14 @@ uint32_t trusty_write_rollback_index(uint32_t slot, uint64_t value)
 					1,
 					&TeecOperation,
 					&ErrorOrigin);
-
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
+exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
-
 	TEEC_CloseSession(&TeecSession);
-
 	TEEC_FinalizeContext(&TeecContext);
 
-	debug("testmm end\n");
-
 	return TeecResult;
 }
 
@@ -320,10 +341,13 @@ uint32_t trusty_read_permanent_attributes(uint8_t *attributes, uint32_t size)
 		return -TEEC_ERROR_GENERIC;
 	}
 
-	debug("testmm start\n");
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
 						TEEC_NONE,
@@ -342,6 +366,8 @@ uint32_t trusty_read_permanent_attributes(uint8_t *attributes, uint32_t size)
 				NULL,
 				&TeecOperation,
 				&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
@@ -349,6 +375,8 @@ uint32_t trusty_read_permanent_attributes(uint8_t *attributes, uint32_t size)
 	SharedMem0.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	memcpy(SharedMem0.buffer, "attributes", SharedMem0.size);
 
@@ -358,6 +386,8 @@ uint32_t trusty_read_permanent_attributes(uint8_t *attributes, uint32_t size)
 	SharedMem1.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
 	TeecOperation.params[0].tmpref.size = SharedMem0.size;
@@ -377,11 +407,11 @@ uint32_t trusty_read_permanent_attributes(uint8_t *attributes, uint32_t size)
 					&ErrorOrigin);
 	if (TeecResult == TEEC_SUCCESS)
 		memcpy(attributes, SharedMem1.buffer, SharedMem1.size);
+exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
 	TEEC_CloseSession(&TeecSession);
 	TEEC_FinalizeContext(&TeecContext);
-	debug("testmm end\n");
 
 	return TeecResult;
 }
@@ -403,10 +433,13 @@ uint32_t trusty_write_permanent_attributes(uint8_t *attributes, uint32_t size)
 		return -TEEC_ERROR_GENERIC;
 	}
 
-	debug("testmm start\n");
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
 						TEEC_NONE,
@@ -425,6 +458,8 @@ uint32_t trusty_write_permanent_attributes(uint8_t *attributes, uint32_t size)
 				NULL,
 				&TeecOperation,
 				&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
@@ -432,6 +467,8 @@ uint32_t trusty_write_permanent_attributes(uint8_t *attributes, uint32_t size)
 	SharedMem0.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	memcpy(SharedMem0.buffer, "attributes", SharedMem0.size);
 
@@ -441,6 +478,8 @@ uint32_t trusty_write_permanent_attributes(uint8_t *attributes, uint32_t size)
 	SharedMem1.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	memcpy(SharedMem1.buffer, attributes, SharedMem1.size);
 
@@ -460,12 +499,13 @@ uint32_t trusty_write_permanent_attributes(uint8_t *attributes, uint32_t size)
 					1,
 					&TeecOperation,
 					&ErrorOrigin);
-
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
+exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
 	TEEC_CloseSession(&TeecSession);
 	TEEC_FinalizeContext(&TeecContext);
-	debug("testmm end\n");
 
 	return TeecResult;
 }
@@ -489,9 +529,14 @@ uint32_t trusty_read_permanent_attributes_cer(uint8_t *attributes,
 		return -TEEC_ERROR_GENERIC;
 	}
 
-	debug("testmm start\n");
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
+
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
+
 	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
 						    TEEC_NONE,
 						    TEEC_NONE,
@@ -510,18 +555,24 @@ uint32_t trusty_read_permanent_attributes_cer(uint8_t *attributes,
 				      NULL,
 				      &TeecOperation,
 				      &ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
 	SharedMem0.size = sizeof("rsacer");
 	SharedMem0.flags = 0;
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 	memcpy(SharedMem0.buffer, "rsacer", SharedMem0.size);
 	TEEC_SharedMemory SharedMem1 = {0};
 
 	SharedMem1.size = size;
 	SharedMem1.flags = 0;
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
 	TeecOperation.params[0].tmpref.size = SharedMem0.size;
 	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
@@ -537,11 +588,11 @@ uint32_t trusty_read_permanent_attributes_cer(uint8_t *attributes,
 					&ErrorOrigin);
 	if (TeecResult == TEEC_SUCCESS)
 		memcpy(attributes, SharedMem1.buffer, SharedMem1.size);
+exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
 	TEEC_CloseSession(&TeecSession);
 	TEEC_FinalizeContext(&TeecContext);
-	debug("testmm end\n");
 
 	return TeecResult;
 }
@@ -565,9 +616,14 @@ uint32_t trusty_write_permanent_attributes_cer(uint8_t *attributes,
 		return -TEEC_ERROR_GENERIC;
 	}
 
-	debug("testmm start\n");
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
+
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
+
 	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
 						    TEEC_NONE,
 						    TEEC_NONE,
@@ -586,18 +642,24 @@ uint32_t trusty_write_permanent_attributes_cer(uint8_t *attributes,
 				      NULL,
 				      &TeecOperation,
 				      &ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
 	SharedMem0.size = sizeof("rsacer");
 	SharedMem0.flags = 0;
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 	memcpy(SharedMem0.buffer, "rsacer", SharedMem0.size);
 	TEEC_SharedMemory SharedMem1 = {0};
 
 	SharedMem1.size = size;
 	SharedMem1.flags = 0;
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 	memcpy(SharedMem1.buffer, attributes, SharedMem1.size);
 	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
 	TeecOperation.params[0].tmpref.size = SharedMem0.size;
@@ -612,12 +674,13 @@ uint32_t trusty_write_permanent_attributes_cer(uint8_t *attributes,
 					1,
 					&TeecOperation,
 					&ErrorOrigin);
-
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
+exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
 	TEEC_CloseSession(&TeecSession);
 	TEEC_FinalizeContext(&TeecContext);
-	debug("testmm end\n");
 
 	return TeecResult;
 }
@@ -639,10 +702,13 @@ uint32_t trusty_read_lock_state(uint8_t *lock_state)
 		return -TEEC_ERROR_GENERIC;
 	}
 
-	debug("testmm start\n");
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
 						TEEC_NONE,
@@ -661,6 +727,8 @@ uint32_t trusty_read_lock_state(uint8_t *lock_state)
 				NULL,
 				&TeecOperation,
 				&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
@@ -668,6 +736,8 @@ uint32_t trusty_read_lock_state(uint8_t *lock_state)
 	SharedMem0.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	memcpy(SharedMem0.buffer, "lock_state", SharedMem0.size);
 
@@ -677,6 +747,8 @@ uint32_t trusty_read_lock_state(uint8_t *lock_state)
 	SharedMem1.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
 	TeecOperation.params[0].tmpref.size = SharedMem0.size;
@@ -696,11 +768,11 @@ uint32_t trusty_read_lock_state(uint8_t *lock_state)
 					&ErrorOrigin);
 	if (TeecResult == TEEC_SUCCESS)
 		memcpy(lock_state, SharedMem1.buffer, SharedMem1.size);
+exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
 	TEEC_CloseSession(&TeecSession);
 	TEEC_FinalizeContext(&TeecContext);
-	debug("testmm end\n");
 
 	return TeecResult;
 }
@@ -722,10 +794,13 @@ uint32_t trusty_write_lock_state(uint8_t lock_state)
 		return -TEEC_ERROR_GENERIC;
 	}
 
-	debug("testmm start\n");
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
 						TEEC_NONE,
@@ -744,6 +819,8 @@ uint32_t trusty_write_lock_state(uint8_t lock_state)
 				NULL,
 				&TeecOperation,
 				&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
@@ -751,6 +828,8 @@ uint32_t trusty_write_lock_state(uint8_t lock_state)
 	SharedMem0.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	memcpy(SharedMem0.buffer, "lock_state", SharedMem0.size);
 
@@ -760,6 +839,8 @@ uint32_t trusty_write_lock_state(uint8_t lock_state)
 	SharedMem1.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	memcpy(SharedMem1.buffer, &lock_state, SharedMem1.size);
 
@@ -779,12 +860,13 @@ uint32_t trusty_write_lock_state(uint8_t lock_state)
 					1,
 					&TeecOperation,
 					&ErrorOrigin);
-
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
+exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
 	TEEC_CloseSession(&TeecSession);
 	TEEC_FinalizeContext(&TeecContext);
-	debug("testmm end\n");
 
 	return TeecResult;
 }
@@ -806,10 +888,13 @@ uint32_t trusty_read_flash_lock_state(uint8_t *flash_lock_state)
 		return -TEEC_ERROR_GENERIC;
 	}
 
-	debug("testmm start\n");
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
 						TEEC_NONE,
@@ -828,6 +913,8 @@ uint32_t trusty_read_flash_lock_state(uint8_t *flash_lock_state)
 				NULL,
 				&TeecOperation,
 				&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
@@ -835,6 +922,8 @@ uint32_t trusty_read_flash_lock_state(uint8_t *flash_lock_state)
 	SharedMem0.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	memcpy(SharedMem0.buffer, "flash_lock_state", SharedMem0.size);
 
@@ -844,6 +933,8 @@ uint32_t trusty_read_flash_lock_state(uint8_t *flash_lock_state)
 	SharedMem1.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
 	TeecOperation.params[0].tmpref.size = SharedMem0.size;
@@ -863,11 +954,11 @@ uint32_t trusty_read_flash_lock_state(uint8_t *flash_lock_state)
 					&ErrorOrigin);
 	if (TeecResult == TEEC_SUCCESS)
 		memcpy(flash_lock_state, SharedMem1.buffer, SharedMem1.size);
+exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
 	TEEC_CloseSession(&TeecSession);
 	TEEC_FinalizeContext(&TeecContext);
-	debug("testmm end\n");
 
 	return TeecResult;
 }
@@ -890,10 +981,13 @@ uint32_t trusty_write_flash_lock_state(uint8_t flash_lock_state)
 		return -TEEC_ERROR_GENERIC;
 	}
 
-	debug("testmm start\n");
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
 						TEEC_NONE,
@@ -912,6 +1006,8 @@ uint32_t trusty_write_flash_lock_state(uint8_t flash_lock_state)
 				NULL,
 				&TeecOperation,
 				&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
@@ -919,6 +1015,8 @@ uint32_t trusty_write_flash_lock_state(uint8_t flash_lock_state)
 	SharedMem0.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	memcpy(SharedMem0.buffer, "flash_lock_state", SharedMem0.size);
 
@@ -928,6 +1026,8 @@ uint32_t trusty_write_flash_lock_state(uint8_t flash_lock_state)
 	SharedMem1.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	memcpy(SharedMem1.buffer, &flash_lock_state, SharedMem1.size);
 
@@ -947,7 +1047,9 @@ uint32_t trusty_write_flash_lock_state(uint8_t flash_lock_state)
 					1,
 					&TeecOperation,
 					&ErrorOrigin);
-
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
+exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
 	TEEC_CloseSession(&TeecSession);
@@ -969,9 +1071,13 @@ uint32_t trusty_read_attribute_hash(uint32_t *buf, uint32_t length)
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
 
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				&TeecSession,
@@ -980,6 +1086,8 @@ uint32_t trusty_read_attribute_hash(uint32_t *buf, uint32_t length)
 				NULL,
 				NULL,
 				&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
@@ -987,6 +1095,8 @@ uint32_t trusty_read_attribute_hash(uint32_t *buf, uint32_t length)
 	SharedMem0.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
 	TeecOperation.params[0].tmpref.size = SharedMem0.size;
@@ -1003,7 +1113,7 @@ uint32_t trusty_read_attribute_hash(uint32_t *buf, uint32_t length)
 
 	if (TeecResult == TEEC_SUCCESS)
 		memcpy(buf, SharedMem0.buffer, SharedMem0.size);
-
+exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_CloseSession(&TeecSession);
 	TEEC_FinalizeContext(&TeecContext);
@@ -1023,9 +1133,13 @@ uint32_t trusty_write_attribute_hash(uint32_t *buf, uint32_t length)
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
 
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				&TeecSession,
@@ -1034,6 +1148,8 @@ uint32_t trusty_write_attribute_hash(uint32_t *buf, uint32_t length)
 				NULL,
 				NULL,
 				&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
@@ -1041,6 +1157,8 @@ uint32_t trusty_write_attribute_hash(uint32_t *buf, uint32_t length)
 	SharedMem0.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	memcpy(SharedMem0.buffer, buf, SharedMem0.size);
 
@@ -1056,7 +1174,9 @@ uint32_t trusty_write_attribute_hash(uint32_t *buf, uint32_t length)
 					1,
 					&TeecOperation,
 					&ErrorOrigin);
-
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
+exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_CloseSession(&TeecSession);
 	TEEC_FinalizeContext(&TeecContext);
@@ -1075,9 +1195,13 @@ uint32_t notify_optee_rpmb_ta(void)
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
 
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				&TeecSession,
@@ -1086,6 +1210,8 @@ uint32_t notify_optee_rpmb_ta(void)
 				NULL,
 				NULL,
 				&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_NONE,
 						TEEC_NONE,
@@ -1096,7 +1222,9 @@ uint32_t notify_optee_rpmb_ta(void)
 					2,
 					&TeecOperation,
 					&ErrorOrigin);
-
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
+exit:
 	TEEC_CloseSession(&TeecSession);
 	TEEC_FinalizeContext(&TeecContext);
 
@@ -1115,9 +1243,13 @@ uint32_t notify_optee_efuse_ta(void)
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
 
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				&TeecSession,
@@ -1126,6 +1258,8 @@ uint32_t notify_optee_efuse_ta(void)
 				NULL,
 				NULL,
 				&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_NONE,
 						TEEC_NONE,
@@ -1136,7 +1270,9 @@ uint32_t notify_optee_efuse_ta(void)
 					2,
 					&TeecOperation,
 					&ErrorOrigin);
-
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
+exit:
 	TEEC_CloseSession(&TeecSession);
 	TEEC_FinalizeContext(&TeecContext);
 
@@ -1163,9 +1299,13 @@ uint32_t trusty_read_vbootkey_hash(uint32_t *buf, uint32_t length)
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
 
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				&TeecSession,
@@ -1174,6 +1314,8 @@ uint32_t trusty_read_vbootkey_hash(uint32_t *buf, uint32_t length)
 				NULL,
 				NULL,
 				&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
@@ -1181,6 +1323,8 @@ uint32_t trusty_read_vbootkey_hash(uint32_t *buf, uint32_t length)
 	SharedMem0.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
 	TeecOperation.params[0].tmpref.size = SharedMem0.size;
@@ -1197,7 +1341,7 @@ uint32_t trusty_read_vbootkey_hash(uint32_t *buf, uint32_t length)
 
 	if (TeecResult == TEEC_SUCCESS)
 		memcpy(buf, SharedMem0.buffer, SharedMem0.size);
-
+exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_CloseSession(&TeecSession);
 	TEEC_FinalizeContext(&TeecContext);
@@ -1216,9 +1360,13 @@ uint32_t trusty_write_vbootkey_hash(uint32_t *buf, uint32_t length)
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
 
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				&TeecSession,
@@ -1227,6 +1375,8 @@ uint32_t trusty_write_vbootkey_hash(uint32_t *buf, uint32_t length)
 				NULL,
 				NULL,
 				&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
@@ -1234,6 +1384,8 @@ uint32_t trusty_write_vbootkey_hash(uint32_t *buf, uint32_t length)
 	SharedMem0.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	memcpy(SharedMem0.buffer, buf, SharedMem0.size);
 
@@ -1249,7 +1401,9 @@ uint32_t trusty_write_vbootkey_hash(uint32_t *buf, uint32_t length)
 					4,
 					&TeecOperation,
 					&ErrorOrigin);
-
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
+exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_CloseSession(&TeecSession);
 	TEEC_FinalizeContext(&TeecContext);
@@ -1270,9 +1424,13 @@ uint32_t trusty_read_vbootkey_enable_flag(uint8_t *flag)
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
 
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				&TeecSession,
@@ -1281,6 +1439,8 @@ uint32_t trusty_read_vbootkey_enable_flag(uint8_t *flag)
 				NULL,
 				NULL,
 				&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
@@ -1288,6 +1448,8 @@ uint32_t trusty_read_vbootkey_enable_flag(uint8_t *flag)
 	SharedMem0.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
 	TeecOperation.params[0].tmpref.size = SharedMem0.size;
@@ -1307,7 +1469,7 @@ uint32_t trusty_read_vbootkey_enable_flag(uint8_t *flag)
 		if (bootflag == 0x000000FF)
 			*flag = 1;
 	}
-
+exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_CloseSession(&TeecSession);
 	TEEC_FinalizeContext(&TeecContext);
@@ -1332,10 +1494,13 @@ uint32_t trusty_read_permanent_attributes_flag(uint8_t *attributes)
 		return -TEEC_ERROR_GENERIC;
 	}
 
-	debug("testmm start\n");
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
 						TEEC_NONE,
@@ -1354,6 +1519,8 @@ uint32_t trusty_read_permanent_attributes_flag(uint8_t *attributes)
 				NULL,
 				&TeecOperation,
 				&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
@@ -1361,6 +1528,8 @@ uint32_t trusty_read_permanent_attributes_flag(uint8_t *attributes)
 	SharedMem0.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	memcpy(SharedMem0.buffer, "attributes_flag", SharedMem0.size);
 
@@ -1370,6 +1539,8 @@ uint32_t trusty_read_permanent_attributes_flag(uint8_t *attributes)
 	SharedMem1.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
 	TeecOperation.params[0].tmpref.size = SharedMem0.size;
@@ -1388,11 +1559,11 @@ uint32_t trusty_read_permanent_attributes_flag(uint8_t *attributes)
 					&ErrorOrigin);
 	if (TeecResult == TEEC_SUCCESS)
 		memcpy(attributes, SharedMem1.buffer, SharedMem1.size);
+exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
 	TEEC_CloseSession(&TeecSession);
 	TEEC_FinalizeContext(&TeecContext);
-	debug("testmm end\n");
 
 	return TeecResult;
 }
@@ -1414,10 +1585,13 @@ uint32_t trusty_write_permanent_attributes_flag(uint8_t attributes)
 		return -TEEC_ERROR_GENERIC;
 	}
 
-	debug("testmm start\n");
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
 						TEEC_NONE,
@@ -1436,6 +1610,8 @@ uint32_t trusty_write_permanent_attributes_flag(uint8_t attributes)
 				NULL,
 				&TeecOperation,
 				&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
@@ -1443,6 +1619,8 @@ uint32_t trusty_write_permanent_attributes_flag(uint8_t attributes)
 	SharedMem0.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	memcpy(SharedMem0.buffer, "attributes_flag", SharedMem0.size);
 
@@ -1452,6 +1630,8 @@ uint32_t trusty_write_permanent_attributes_flag(uint8_t attributes)
 	SharedMem1.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	memcpy(SharedMem1.buffer, (char *)&attributes, SharedMem1.size);
 
@@ -1470,12 +1650,13 @@ uint32_t trusty_write_permanent_attributes_flag(uint8_t attributes)
 					1,
 					&TeecOperation,
 					&ErrorOrigin);
-
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
+exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
 	TEEC_CloseSession(&TeecSession);
 	TEEC_FinalizeContext(&TeecContext);
-	debug("testmm end\n");
 
 	return TeecResult;
 }
@@ -1500,9 +1681,13 @@ uint32_t trusty_attest_dh(uint8_t *dh, uint32_t *dh_size)
 		return -TEEC_ERROR_GENERIC;
 	}
 
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
 						TEEC_NONE,
@@ -1521,6 +1706,8 @@ uint32_t trusty_attest_dh(uint8_t *dh, uint32_t *dh_size)
 				      NULL,
 					&TeecOperation,
 				      &ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
@@ -1528,6 +1715,8 @@ uint32_t trusty_attest_dh(uint8_t *dh, uint32_t *dh_size)
 	SharedMem0.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
 	TeecOperation.params[0].tmpref.size = SharedMem0.size;
@@ -1541,14 +1730,15 @@ uint32_t trusty_attest_dh(uint8_t *dh, uint32_t *dh_size)
 					143,
 					&TeecOperation,
 					&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	*dh_size = TeecOperation.params[0].tmpref.size;
 	memcpy(dh, SharedMem0.buffer, SharedMem0.size);
-
+exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);
-
 	TEEC_CloseSession(&TeecSession);
-	TeecResult = TEEC_FinalizeContext(&TeecContext);
+	TEEC_FinalizeContext(&TeecContext);
 
 	return TeecResult;
 }
@@ -1573,9 +1763,13 @@ uint32_t trusty_attest_uuid(uint8_t *uuid, uint32_t *uuid_size)
 		return -TEEC_ERROR_GENERIC;
 	}
 
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
 						TEEC_NONE,
@@ -1594,6 +1788,8 @@ uint32_t trusty_attest_uuid(uint8_t *uuid, uint32_t *uuid_size)
 				      NULL,
 					&TeecOperation,
 				      &ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
@@ -1601,6 +1797,8 @@ uint32_t trusty_attest_uuid(uint8_t *uuid, uint32_t *uuid_size)
 	SharedMem0.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
 	TeecOperation.params[0].tmpref.size = SharedMem0.size;
@@ -1614,14 +1812,15 @@ uint32_t trusty_attest_uuid(uint8_t *uuid, uint32_t *uuid_size)
 					144,
 					&TeecOperation,
 					&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	*uuid_size = TeecOperation.params[0].tmpref.size;
 	memcpy(uuid, SharedMem0.buffer, SharedMem0.size);
-
+exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);
-
 	TEEC_CloseSession(&TeecSession);
-	TeecResult = TEEC_FinalizeContext(&TeecContext);
+	TEEC_FinalizeContext(&TeecContext);
 
 	return TeecResult;
 }
@@ -1636,8 +1835,6 @@ uint32_t trusty_attest_get_ca(uint8_t *operation_start,
 	TEEC_Session TeecSession;
 	uint32_t ErrorOrigin;
 
-	OpteeClientApiLibInitialize();
-
 	TEEC_UUID tempuuid = { 0x258be795, 0xf9ca, 0x40e6,
 				{ 0xa8, 0x69, 0x9c, 0xe6,
 				  0x88, 0x6c, 0x5d, 0x5d
@@ -1653,9 +1850,13 @@ uint32_t trusty_attest_get_ca(uint8_t *operation_start,
 		return -TEEC_ERROR_GENERIC;
 	}
 
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
 						TEEC_NONE,
@@ -1674,6 +1875,8 @@ uint32_t trusty_attest_get_ca(uint8_t *operation_start,
 				      NULL,
 					&TeecOperation,
 				      &ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
@@ -1681,6 +1884,8 @@ uint32_t trusty_attest_get_ca(uint8_t *operation_start,
 	SharedMem0.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	memcpy(SharedMem0.buffer, operation_start, SharedMem0.size);
 
@@ -1693,6 +1898,8 @@ uint32_t trusty_attest_get_ca(uint8_t *operation_start,
 	SharedMem1.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
 	TeecOperation.params[1].tmpref.size = SharedMem1.size;
@@ -1706,11 +1913,16 @@ uint32_t trusty_attest_get_ca(uint8_t *operation_start,
 					145,
 					&TeecOperation,
 					&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	*out_len = TeecOperation.params[1].tmpref.size;
 	memcpy(out, SharedMem1.buffer, SharedMem1.size);
+exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
+	TEEC_CloseSession(&TeecSession);
+	TEEC_FinalizeContext(&TeecContext);
 
 	return TeecResult;
 }
@@ -1734,8 +1946,13 @@ uint32_t trusty_attest_set_ca(uint8_t *ca_response, uint32_t *ca_response_size)
 		printf("%s: dev_desc is NULL!\n", __func__);
 		return -TEEC_ERROR_GENERIC;
 	}
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
 						TEEC_NONE,
@@ -1754,6 +1971,8 @@ uint32_t trusty_attest_set_ca(uint8_t *ca_response, uint32_t *ca_response_size)
 					NULL,
 					&TeecOperation,
 					&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
@@ -1761,6 +1980,8 @@ uint32_t trusty_attest_set_ca(uint8_t *ca_response, uint32_t *ca_response_size)
 	SharedMem0.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	memcpy(SharedMem0.buffer, ca_response, SharedMem0.size);
 
@@ -1776,11 +1997,12 @@ uint32_t trusty_attest_set_ca(uint8_t *ca_response, uint32_t *ca_response_size)
 					146,
 					&TeecOperation,
 					&ErrorOrigin);
-
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
+exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);
-
 	TEEC_CloseSession(&TeecSession);
-	TeecResult = TEEC_FinalizeContext(&TeecContext);
+	TEEC_FinalizeContext(&TeecContext);
 
 	return TeecResult;
 }
diff --git a/lib/optee_clientApi/OpteeClientMem.c b/lib/optee_clientApi/OpteeClientMem.c
index cec5b50c3b..d290567d83 100644
--- a/lib/optee_clientApi/OpteeClientMem.c
+++ b/lib/optee_clientApi/OpteeClientMem.c
@@ -14,7 +14,7 @@
 
 void *my_mem_start;
 uint32_t my_count;
-uint8_t *my_flag;
+uint8_t *my_flag = NULL;
 typedef struct {
 	void *addrBlock;
 	uint32_t sizeBlock;
@@ -22,14 +22,25 @@ typedef struct {
 } ALLOC_FLAG;
 ALLOC_FLAG alloc_flags[50];
 
-void my_malloc_init(void *start, uint32_t size)
+int my_malloc_init(void *start, uint32_t size)
 {
+	if (start == NULL || size == 0) {
+		printf("malloc init fail!");
+		return -1;
+	}
 	memset(start, 0, size);
 	my_mem_start = start;
 	my_count = size/4096;
-	my_flag = malloc(size/4096);
+	if (my_flag == NULL) {
+		my_flag = malloc(size/4096);
+		if (my_flag == NULL) {
+			printf("malloc fail!");
+			return -1;
+		}
+	}
 	memset(my_flag, 0, size/4096);
 	memset(alloc_flags, 0, 50 * sizeof(ALLOC_FLAG));
+	return 0;
 }
 
 void write_usedblock(void *addr, uint32_t size)
@@ -75,7 +86,8 @@ void *my_malloc(uint32_t size)
 	uint32_t i, j, k, num;
 
 	num = (size - 1) / 4096 + 1;
-
+	if (my_count < num)
+		return 0;
 	for (i = 0; i < my_count - num; i++) {
 		if (*(my_flag + i) == 0) {
 			for (j = 0; j < num; j++) {
@@ -127,7 +139,7 @@ void my_free(void *ptr)
  * Initlialize the memory component, for example providing the
  * containing drivers handle.
  */
-void OpteeClientMemInit(void)
+int OpteeClientMemInit(void)
 {
 	ARM_SMC_ARGS ArmSmcArgs = {0};
 
@@ -143,7 +155,7 @@ void OpteeClientMemInit(void)
 	debug("get share memory, arg0=0x%x arg1=0x%x arg2=0x%x arg3=0x%x\n",
 	      ArmSmcArgs.Arg0, ArmSmcArgs.Arg1, ArmSmcArgs.Arg2, ArmSmcArgs.Arg3);
 
-	my_malloc_init((void *)(size_t)ArmSmcArgs.Arg1, ArmSmcArgs.Arg2);
+	return my_malloc_init((void *)(size_t)ArmSmcArgs.Arg1, ArmSmcArgs.Arg2);
 }
 
 /*
diff --git a/lib/optee_clientApi/OpteeClientRkFs-v2.c b/lib/optee_clientApi/OpteeClientRkFs-v2.c
index 18be31a61f..b1f634997d 100644
--- a/lib/optee_clientApi/OpteeClientRkFs-v2.c
+++ b/lib/optee_clientApi/OpteeClientRkFs-v2.c
@@ -1233,10 +1233,10 @@ int tee_supp_rk_fs_init(void)
 	return TEEC_SUCCESS;
 }
 
-void OpteeClientRkFsInit(void)
+int OpteeClientRkFsInit(void)
 {
 	debug(" OpteeClientRkFsInit\n");
-	tee_supp_rk_fs_init();
+	return tee_supp_rk_fs_init();
 }
 bool tee_supp_param_is_value(struct tee_ioctl_param *param)
 {
diff --git a/lib/optee_clientApi/OpteeClientRkFs.c b/lib/optee_clientApi/OpteeClientRkFs.c
index 55dec3e212..25a639c5a8 100644
--- a/lib/optee_clientApi/OpteeClientRkFs.c
+++ b/lib/optee_clientApi/OpteeClientRkFs.c
@@ -1277,10 +1277,10 @@ int tee_supp_rk_fs_init(void)
 
 	return 0;
 }
-void OpteeClientRkFsInit(void)
+int OpteeClientRkFsInit(void)
 {
 	debug(" OpteeClientRkFsInit\n");
-	tee_supp_rk_fs_init();
+	return tee_supp_rk_fs_init();
 }
 
 static int rkss_step = 0;

commit d08ece9d972be224bb5c7deae6b3788017ba2035
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 6 14:19:36 2019 +0800

    configs: rk3399pro: enable CONFIG_DOS_PARTITION for fat fs
    
    Change-Id: I02f68c31399b695a81705b53e8dad161d5366002
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3399pro_defconfig b/configs/rk3399pro_defconfig
index 7e6c7a5231..95a3dc9559 100644
--- a/configs/rk3399pro_defconfig
+++ b/configs/rk3399pro_defconfig
@@ -48,7 +48,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_MISC is not set
-# CONFIG_DOS_PARTITION is not set
+# CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_ISO_PARTITION is not set
 CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_RKPARM_PARTITION=y

commit 2b3bb4e5c81f7f8bf4032a32524624f8002e78fb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 6 14:10:48 2019 +0800

    configs: rk3308: enable CONFIG_DOS_PARTITION for fat fs
    
    Change-Id: Ifb975cf96cdcc0d1d070bcc39bd4555828fb9fd0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3308-aarch32_defconfig b/configs/rk3308-aarch32_defconfig
index c1a2d8def6..956d0cd2aa 100644
--- a/configs/rk3308-aarch32_defconfig
+++ b/configs/rk3308-aarch32_defconfig
@@ -37,7 +37,6 @@ CONFIG_CMD_MMC=y
 # CONFIG_CMD_LED is not set
 # CONFIG_CMD_MISC is not set
 CONFIG_CMD_PMIC=y
-# CONFIG_DOS_PARTITION is not set
 # CONFIG_ISO_PARTITION is not set
 CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_OF_LIVE=y
diff --git a/configs/rk3308_defconfig b/configs/rk3308_defconfig
index 5be3f455a3..bacbaabd9d 100644
--- a/configs/rk3308_defconfig
+++ b/configs/rk3308_defconfig
@@ -36,7 +36,6 @@ CONFIG_CMD_MMC=y
 # CONFIG_CMD_LED is not set
 # CONFIG_CMD_MISC is not set
 CONFIG_CMD_PMIC=y
-# CONFIG_DOS_PARTITION is not set
 # CONFIG_ISO_PARTITION is not set
 CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_OF_LIVE=y

commit 688a40e1c9c8e2cc7a83a73c2c7373f3d9cb1fbc
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 6 14:07:39 2019 +0800

    configs: rk3126: enable CONFIG_DOS_PARTITION for fat fs
    
    Change-Id: I3837289269240d383bc3272840e6f27dd9406b00
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3126_defconfig b/configs/rk3126_defconfig
index 08fcb9b572..669761bf7a 100644
--- a/configs/rk3126_defconfig
+++ b/configs/rk3126_defconfig
@@ -36,7 +36,6 @@ CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_BMP=y
 # CONFIG_CMD_MISC is not set
-# CONFIG_DOS_PARTITION is not set
 # CONFIG_ISO_PARTITION is not set
 CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_RKPARM_PARTITION=y

commit 68373a9aa52803dd4f0c29948456759ffe399d73
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 6 13:11:57 2019 +0800

    configs: rk322x: enable CONFIG_DOS_PARTITION for fat fs
    
    Change-Id: I8435a6f1e0e802072279dabaa6887fd2f074a040
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk322x_defconfig b/configs/rk322x_defconfig
index 7ab87510ae..fd3f6306e0 100644
--- a/configs/rk322x_defconfig
+++ b/configs/rk322x_defconfig
@@ -53,7 +53,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_MISC is not set
-# CONFIG_DOS_PARTITION is not set
+# CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_ISO_PARTITION is not set
 CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_RKPARM_PARTITION=y

commit 4dc1628ce4572ea32a8511281a7bceb2d7707f01
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 6 13:10:05 2019 +0800

    configs: rk3368: enable CONFIG_DOS_PARTITION for fat fs
    
    Change-Id: Ie05cdec6c52c0173f2f8e8c2b3f47105b164f2c0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3368_defconfig b/configs/rk3368_defconfig
index 3f59cb3922..9dcdda9185 100644
--- a/configs/rk3368_defconfig
+++ b/configs/rk3368_defconfig
@@ -39,7 +39,6 @@ CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_NET is not set
 # CONFIG_CMD_MISC is not set
-# CONFIG_DOS_PARTITION is not set
 # CONFIG_ISO_PARTITION is not set
 CONFIG_RKPARM_PARTITION=y
 CONFIG_OF_LIVE=y

commit b08c9f9699ef875f725fe635a808524f72a510ad
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 6 11:58:41 2019 +0800

    configs: rk3326: enable CONFIG_DOS_PARTITION for fat fs
    
    Change-Id: Iefe882e6ff0738b3c22272bf284320c9934adb1f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-rk3326_defconfig b/configs/evb-rk3326_defconfig
index 2593b65933..27a9790679 100644
--- a/configs/evb-rk3326_defconfig
+++ b/configs/evb-rk3326_defconfig
@@ -49,7 +49,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_MISC is not set
-# CONFIG_DOS_PARTITION is not set
+# CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_ISO_PARTITION is not set
 CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_RKPARM_PARTITION=y
diff --git a/configs/rk3326_defconfig b/configs/rk3326_defconfig
index 4a80c269bd..b4e4487fff 100644
--- a/configs/rk3326_defconfig
+++ b/configs/rk3326_defconfig
@@ -52,7 +52,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_MISC is not set
-# CONFIG_DOS_PARTITION is not set
+# CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_ISO_PARTITION is not set
 CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_RKPARM_PARTITION=y

commit db9bf7701edd1aa66ea2a1ae2fcbd615930aa907
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 6 11:54:31 2019 +0800

    configs: px30: enable CONFIG_DOS_PARTITION for fat fs
    
    Change-Id: I9fa31901e54f0c1883a84589d717651e7587f59c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 06220ba79f..537eb862a0 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -49,7 +49,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_NET is not set
 # CONFIG_CMD_MISC is not set
-# CONFIG_DOS_PARTITION is not set
+# CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_ISO_PARTITION is not set
 CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_RKPARM_PARTITION=y
diff --git a/configs/px30_defconfig b/configs/px30_defconfig
index 70f39c138d..fa6f3ca739 100644
--- a/configs/px30_defconfig
+++ b/configs/px30_defconfig
@@ -51,7 +51,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_NET is not set
 # CONFIG_CMD_MISC is not set
-# CONFIG_DOS_PARTITION is not set
+# CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_ISO_PARTITION is not set
 CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_RKPARM_PARTITION=y

commit 27202cf9255531236ac583c5f359bf49d422b663
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 6 11:53:38 2019 +0800

    configs: rk3288: enable CONFIG_DOS_PARTITION for fat fs
    
    Change-Id: I45e8ed4c18288d4f845c786cdc577396271504f6
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3288_defconfig b/configs/rk3288_defconfig
index 4abb51d34e..3e80f41644 100644
--- a/configs/rk3288_defconfig
+++ b/configs/rk3288_defconfig
@@ -39,7 +39,7 @@ CONFIG_CMD_USB=y
 # CONFIG_CMD_MISC is not set
 CONFIG_CMD_PMIC=y
 CONFIG_CMD_REGULATOR=y
-# CONFIG_DOS_PARTITION is not set
+# CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_ISO_PARTITION is not set
 CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 # CONFIG_SPL_EFI_PARTITION is not set

commit 834f62e578a151ba39440f0d3164686312474aab
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 6 11:52:03 2019 +0800

    configs: rk3399: enable CONFIG_DOS_PARTITION for fat fs
    
    Change-Id: I5a03113550f164a3a4b25f04f07e072a117b5926
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
index 7bc6d8ccb5..ae4d35572b 100755
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -47,7 +47,7 @@ CONFIG_CMD_USB=y
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_MISC is not set
-# CONFIG_DOS_PARTITION is not set
+# CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_ISO_PARTITION is not set
 CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_RKPARM_PARTITION=y

commit 2a71d5332ec16049b6cb4324a1d17d2c785e03d3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 6 14:06:55 2019 +0800

    configs: rk3126: clean up with make savedefconfig
    
    Change-Id: Ic87ede0857de720e7d228409df95abdf6142c70c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3126_defconfig b/configs/rk3126_defconfig
index 447b70876f..08fcb9b572 100644
--- a/configs/rk3126_defconfig
+++ b/configs/rk3126_defconfig
@@ -54,7 +54,6 @@ CONFIG_GPIO_KEY=y
 CONFIG_RK_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y

commit 92eec20f9179ac87d6c63bc0c9af665bc355cb1c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 6 13:11:13 2019 +0800

    configs: rk322x: clean up with make savedefconfig
    
    Change-Id: I9105a5118f9658904d412e81cfa6286a4d33d3b4
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk322x_defconfig b/configs/rk322x_defconfig
index c7c22af77a..7ab87510ae 100644
--- a/configs/rk322x_defconfig
+++ b/configs/rk322x_defconfig
@@ -83,7 +83,6 @@ CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
-CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_PMIC=y

commit a050f450945ebaa1faa360216d6c686944e577c9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 6 12:01:15 2019 +0800

    configs: rk3368: clean up with make savedefconfig
    
    Change-Id: I37708be8dafada4b58202602ab98195727d5e204
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3368_defconfig b/configs/rk3368_defconfig
index 67b7d03ae7..3f59cb3922 100644
--- a/configs/rk3368_defconfig
+++ b/configs/rk3368_defconfig
@@ -12,6 +12,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ARCH_EARLY_INIT_R=y
 CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_ANDROID_AVB=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
@@ -55,7 +56,6 @@ CONFIG_GPIO_KEY=y
 CONFIG_RK_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
@@ -100,13 +100,12 @@ CONFIG_USE_TINY_PRINTF=y
 CONFIG_ERRNO_STR=y
 CONFIG_OF_LIBFDT_OVERLAY=y
 # CONFIG_EFI_LOADER is not set
-CONFIG_OPTEE_CLIENT=y
-CONFIG_OPTEE_V1=y
-CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
-CONFIG_ANDROID_AVB=y
 CONFIG_AVB_LIBAVB=y
 CONFIG_AVB_LIBAVB_AB=y
 CONFIG_AVB_LIBAVB_ATX=y
 CONFIG_AVB_LIBAVB_USER=y
 CONFIG_RK_AVB_LIBAVB_USER=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V1=y
+CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
 CONFIG_TEST_ROCKCHIP=y

commit b7d1cfcef7b73fcc6fb3a1cc33bc926e58a63496
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 6 11:56:03 2019 +0800

    configs: rk3326: clean up with make savedefconfig
    
    Change-Id: Ic34b6424d76743a54b74a59950a797cfdc08c034
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-rk3326_defconfig b/configs/evb-rk3326_defconfig
index e9a9db9e24..2593b65933 100644
--- a/configs/evb-rk3326_defconfig
+++ b/configs/evb-rk3326_defconfig
@@ -69,7 +69,6 @@ CONFIG_RK8XX_PWRKEY=y
 CONFIG_ADC_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
diff --git a/configs/rk3326_defconfig b/configs/rk3326_defconfig
index ab40b9e0e4..4a80c269bd 100644
--- a/configs/rk3326_defconfig
+++ b/configs/rk3326_defconfig
@@ -72,7 +72,6 @@ CONFIG_RK8XX_PWRKEY=y
 CONFIG_ADC_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y

commit d06ecfaad6ea947d0c6eccaf93a92853770de456
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 6 11:54:54 2019 +0800

    configs: evb-px30: clean up with make savedefconfig
    
    Change-Id: I467ec09bda0bd4d2c12ef81ca139a1b67b4da932
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 81f1884d78..06220ba79f 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -69,7 +69,6 @@ CONFIG_RK8XX_PWRKEY=y
 CONFIG_ADC_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y

commit cd8ac20fc3b7ad6e192fd678039ded8e7f3c041e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 6 11:52:47 2019 +0800

    configs: rk3288: clean up with make savedefconfig
    
    Change-Id: Ib787733eef6e225c983a457d5719b5800e20d46a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3288_defconfig b/configs/rk3288_defconfig
index 9f6672e555..4abb51d34e 100644
--- a/configs/rk3288_defconfig
+++ b/configs/rk3288_defconfig
@@ -13,6 +13,7 @@ CONFIG_BOOTDELAY=0
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_ANDROID_AVB=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 CONFIG_FASTBOOT_FLASH=y
@@ -105,14 +106,12 @@ CONFIG_USE_TINY_PRINTF=y
 CONFIG_CMD_DHRYSTONE=y
 CONFIG_ERRNO_STR=y
 # CONFIG_EFI_LOADER is not set
-CONFIG_TEST_ROCKCHIP=y
-CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
-CONFIG_OPTEE_CLIENT=y
-CONFIG_OPTEE_V1=y
-CONFIG_CMD_MMC=y
-CONFIG_ANDROID_AVB=y
 CONFIG_AVB_LIBAVB=y
 CONFIG_AVB_LIBAVB_AB=y
 CONFIG_AVB_LIBAVB_ATX=y
 CONFIG_AVB_LIBAVB_USER=y
 CONFIG_RK_AVB_LIBAVB_USER=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V1=y
+CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
+CONFIG_TEST_ROCKCHIP=y

commit 1927bb37f07b515f2d30b578a3234facd0ed159e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 6 11:51:21 2019 +0800

    config: rk3399: clean up with make savedefconfig
    
    Change-Id: I8a9be3430eb224f8e3ea2dc957dca9439f4dd662
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
index cc966e62a5..7bc6d8ccb5 100755
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -76,7 +76,6 @@ CONFIG_MMC_SDHCI_ROCKCHIP=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
-CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y

commit 641abd2eec0219a9ae0f59014a15039601ba3e76
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Jan 31 21:30:25 2019 +0800

    rockchip: atags: pass public key through atags
    
    Change-Id: I202f354a3b48b8e64c7b2ade7e3b65fa3b78500a
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rk_atags.h b/arch/arm/include/asm/arch-rockchip/rk_atags.h
index 0d0c496f69..20ada99821 100644
--- a/arch/arm/include/asm/arch-rockchip/rk_atags.h
+++ b/arch/arm/include/asm/arch-rockchip/rk_atags.h
@@ -17,6 +17,7 @@
 #define ATAG_TOS_MEM		0x54410053
 #define ATAG_RAM_PARTITION	0x54410054
 #define ATAG_ATF_MEM		0x54410055
+#define ATAG_PUB_KEY		0x54410056
 #define ATAG_MAX		0x544100ff
 
 /* Tag size and offset */
@@ -102,6 +103,14 @@ struct tag_atf_mem {
 	u32 hash;
 } __packed;
 
+struct tag_pub_key {
+	u32 version;
+	u32 len;
+	u8  data[768];
+	u32 reserved[6];
+	u32 hash;
+} __packed;
+
 struct tag_ram_partition {
 	u32 version;
 	u32 count;
@@ -139,6 +148,7 @@ struct tag {
 		struct tag_tos_mem	tos_mem;
 		struct tag_ram_partition ram_part;
 		struct tag_atf_mem	atf_mem;
+		struct tag_pub_key	pub_key;
 	} u;
 } __aligned(4);
 
diff --git a/arch/arm/mach-rockchip/rk_atags.c b/arch/arm/mach-rockchip/rk_atags.c
index b330a8c897..90a6e3ff89 100644
--- a/arch/arm/mach-rockchip/rk_atags.c
+++ b/arch/arm/mach-rockchip/rk_atags.c
@@ -196,6 +196,9 @@ int atags_set_tag(u32 magic, void *tagdata)
 	case ATAG_ATF_MEM:
 		size = tag_size(tag_atf_mem);
 		break;
+	case ATAG_PUB_KEY:
+		size = tag_size(tag_pub_key);
+		break;
 	};
 
 	if (!size)
@@ -393,6 +396,13 @@ void atags_print_tag(struct tag *t)
 			printf("    res[%d] = 0x%x\n", i, t->u.atf_mem.reserved[i]);
 		printf("      hash = 0x%x\n", t->u.atf_mem.hash);
 		break;
+	case ATAG_PUB_KEY:
+		printf("[pub_key_mem]:\n");
+		printf("     magic = 0x%x\n", t->hdr.magic);
+		printf("      size = 0x%x\n\n", t->hdr.size << 2);
+		printf("   version = 0x%x\n", t->u.pub_key.version);
+		printf("      hash = 0x%x\n", t->u.pub_key.hash);
+		break;
 	case ATAG_CORE:
 		printf("[core]:\n");
 		printf("     magic = 0x%x\n", t->hdr.magic);
@@ -434,6 +444,7 @@ void atags_test(void)
 	struct tag_tos_mem t_tos_mem;
 	struct tag_ram_partition t_ram_param;
 	struct tag_atf_mem t_atf_mem;
+	struct tag_pub_key t_pub_key;
 
 	memset(&t_serial,  0x1, sizeof(t_serial));
 	memset(&t_bootdev, 0x2, sizeof(t_bootdev));
@@ -441,6 +452,7 @@ void atags_test(void)
 	memset(&t_tos_mem, 0x4, sizeof(t_tos_mem));
 	memset(&t_ram_param, 0x0, sizeof(t_ram_param));
 	memset(&t_atf_mem, 0x5, sizeof(t_atf_mem));
+	memset(&t_pub_key, 0x6, sizeof(t_pub_key));
 
 	memcpy(&t_tos_mem.tee_mem.name, "tee_mem", 8);
 	memcpy(&t_tos_mem.drm_mem.name, "drm_mem", 8);
@@ -471,6 +483,7 @@ void atags_test(void)
 	atags_set_tag(ATAG_TOS_MEM, &t_tos_mem);
 	atags_set_tag(ATAG_RAM_PARTITION, &t_ram_param);
 	atags_set_tag(ATAG_ATF_MEM, &t_atf_mem);
+	atags_set_tag(ATAG_PUB_KEY, &t_pub_key);
 
 	atags_print_all_tags();
 	atags_stat();

commit d2280c00f25bad13d014c7097b44649f98c4a96b
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Feb 28 21:53:57 2019 +0800

    android: add brackets to fix compile error
    
    There is a compile error when enable AB config. The error message is
    "error: a label can only be part of a statement and a declaration isnot
    a statement". Add brackets to fix this error.
    
    Change-Id: I4ec3af984503e35fc1304d08cd7cd8ab587dfb0a
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index a0e8921be5..58b3815475 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -969,7 +969,8 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 		 * "skip_initramfs" to the cmdline to make it ignore the
 		 * recovery initramfs in the boot partition.
 		 */
-#if defined(CONFIG_ANDROID_AB) && !defined(CONFIG_ANDROID_AVB)
+#if (defined(CONFIG_ANDROID_AB) && !defined(CONFIG_ANDROID_AVB))
+	{
 		char root_partition[20] = {0};
 		char guid_buf[UUID_SIZE] = {0};
 		char root_partuuid[70] = "root=PARTUUID=";
@@ -979,6 +980,7 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 		get_partition_unique_uuid(root_partition, guid_buf, UUID_SIZE);
 		strcat(root_partuuid, guid_buf);
 		env_update("bootargs", root_partuuid);
+	}
 #endif
 
 #ifdef CONFIG_ANDROID_AB

commit 332992a7f2a4ec0f131d45858373de314b982144
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Feb 28 21:17:02 2019 +0800

    android: minus retry in AB system
    
    Change-Id: Icc9764fb10dc87d3c4f2f7417b971338a7f98ca4
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 799963c573..a0e8921be5 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -919,10 +919,48 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	if (rk_avb_get_current_slot(slot_suffix))
 		return -1;
 
-	if (slot_suffix[0] != '_') {
-		printf("There is no bootable slot!\n");
+	AvbOps *ops;
+	AvbABData ab_data;
+	AvbABData ab_data_orig;
+	size_t slot_index_to_boot = 0;
+
+	if (!strncmp(slot_suffix, "_a", 2))
+		slot_index_to_boot = 0;
+	else if (!strncmp(slot_suffix, "_b", 2))
+		slot_index_to_boot = 1;
+	else
+		slot_index_to_boot = 0;
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return -1;
+	}
+
+	if(load_metadata(ops->ab_ops, &ab_data, &ab_data_orig)) {
+		printf("Can not load metadata\n");
 		return -1;
 	}
+
+	/* ... and decrement tries remaining, if applicable. */
+	if (!ab_data.slots[slot_index_to_boot].successful_boot &&
+		ab_data.slots[slot_index_to_boot].tries_remaining > 0) {
+		ab_data.slots[slot_index_to_boot].tries_remaining -= 1;
+	}
+
+	if (save_metadata_if_changed(ops->ab_ops, &ab_data, &ab_data_orig)) {
+		printf("Can not save metadata\n");
+		return -1;
+	}
+
+	if (slot_suffix[0] != '_') {
+		printf("###There is no bootable slot, bring up lastboot!###\n");
+		if (rk_get_lastboot() == 1)
+			memcpy(slot_suffix, "_b", 2);
+		else if(rk_get_lastboot() == 0)
+			memcpy(slot_suffix, "_a", 2);
+		else
+			return -1;
+	}
 #endif
 
 	switch (mode) {

commit 7cca3dd4d769349b982f1e5888599796d495c789
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Feb 28 20:56:46 2019 +0800

    lib: avb: support last boot
    
    Change-Id: I803e3deda068be34061a302c27009db5e444f290
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/android_avb/avb_ab_flow.h b/include/android_avb/avb_ab_flow.h
index 0ba5ccd47c..152901b7c7 100755
--- a/include/android_avb/avb_ab_flow.h
+++ b/include/android_avb/avb_ab_flow.h
@@ -1,277 +1,278 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/*
-#if !defined(AVB_INSIDE_LIBAVB_AB_H) && !defined(AVB_COMPILATION)
-#error \
-    "Never include this file directly, include libavb_ab/libavb_ab.h instead."
-#endif
-*/
-
-#ifndef AVB_AB_FLOW_H_
-#define AVB_AB_FLOW_H_
-
-#include <android_avb/avb_ab_ops.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Magic for the A/B struct when serialized. */
-#define AVB_AB_MAGIC "\0AB0"
-#define AVB_AB_MAGIC_LEN 4
-
-/* Versioning for the on-disk A/B metadata - keep in sync with avbtool. */
-#define AVB_AB_MAJOR_VERSION 1
-#define AVB_AB_MINOR_VERSION 0
-
-/* Size of AvbABData struct. */
-#define AVB_AB_DATA_SIZE 32
-
-/* Maximum values for slot data */
-#define AVB_AB_MAX_PRIORITY 15
-#define AVB_AB_MAX_TRIES_REMAINING 7
-
-/* Struct used for recording per-slot metadata.
- *
- * When serialized, data is stored in network byte-order.
- */
-typedef struct AvbABSlotData {
-  /* Slot priority. Valid values range from 0 to AVB_AB_MAX_PRIORITY,
-   * both inclusive with 1 being the lowest and AVB_AB_MAX_PRIORITY
-   * being the highest. The special value 0 is used to indicate the
-   * slot is unbootable.
-   */
-  uint8_t priority;
-
-  /* Number of times left attempting to boot this slot ranging from 0
-   * to AVB_AB_MAX_TRIES_REMAINING.
-   */
-  uint8_t tries_remaining;
-
-  /* Non-zero if this slot has booted successfully, 0 otherwise. */
-  uint8_t successful_boot;
-
-  /* Reserved for future use. */
-  uint8_t reserved[1];
-} AVB_ATTR_PACKED AvbABSlotData;
-
-/* Struct used for recording A/B metadata.
- *
- * When serialized, data is stored in network byte-order.
- */
-typedef struct AvbABData {
-  /* Magic number used for identification - see AVB_AB_MAGIC. */
-  uint8_t magic[AVB_AB_MAGIC_LEN];
-
-  /* Version of on-disk struct - see AVB_AB_{MAJOR,MINOR}_VERSION. */
-  uint8_t version_major;
-  uint8_t version_minor;
-
-  /* Padding to ensure |slots| field start eight bytes in. */
-  uint8_t reserved1[2];
-
-  /* Per-slot metadata. */
-  AvbABSlotData slots[2];
-
-  /* Reserved for future use. */
-  uint8_t reserved2[12];
-
-  /* CRC32 of all 28 bytes preceding this field. */
-  uint32_t crc32;
-} AVB_ATTR_PACKED AvbABData;
-
-/* Copies |src| to |dest|, byte-swapping fields in the
- * process. Returns false if the data is invalid (e.g. wrong magic,
- * wrong CRC32 etc.), true otherwise.
- */
-bool avb_ab_data_verify_and_byteswap(const AvbABData* src, AvbABData* dest);
-
-/* Copies |src| to |dest|, byte-swapping fields in the process. Also
- * updates the |crc32| field in |dest|.
- */
-void avb_ab_data_update_crc_and_byteswap(const AvbABData* src, AvbABData* dest);
-
-/* Initializes |data| such that it has two slots and both slots have
- * maximum tries remaining. The CRC is not set.
- */
-void avb_ab_data_init(AvbABData* data);
-
-/* Reads A/B metadata from the 'misc' partition using |ops|. Returned
- * data is properly byteswapped. Returns AVB_IO_RESULT_OK on
- * success, error code otherwise.
- *
- * If the data read from disk is invalid (e.g. wrong magic or CRC
- * checksum failure), the metadata will be reset using
- * avb_ab_data_init() and then written to disk.
- */
-AvbIOResult avb_ab_data_read(AvbABOps* ab_ops, AvbABData* data);
-
-/* Writes A/B metadata to the 'misc' partition using |ops|. This will
- * byteswap and update the CRC as needed. Returns AVB_IO_RESULT_OK on
- * success, error code otherwise.
- */
-AvbIOResult avb_ab_data_write(AvbABOps* ab_ops, const AvbABData* data);
-
-/* Return codes used in avb_ab_flow(), see that function for
- * documentation of each value.
- */
-typedef enum {
-  AVB_AB_FLOW_RESULT_OK,
-  AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR,
-  AVB_AB_FLOW_RESULT_ERROR_OOM,
-  AVB_AB_FLOW_RESULT_ERROR_IO,
-  AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS,
-  AVB_AB_FLOW_RESULT_ERROR_INVALID_ARGUMENT
-} AvbABFlowResult;
-
-/* Get a textual representation of |result|. */
-const char* avb_ab_flow_result_to_string(AvbABFlowResult result);
-
-/* High-level function to select a slot to boot. The following
- * algorithm is used:
- *
- * 1. A/B metadata is loaded and validated using the
- * read_ab_metadata() operation. Typically this means it's read from
- * the 'misc' partition and if it's invalid then it's reset using
- * avb_ab_data_init() and this reset metadata is returned.
- *
- * 2. All bootable slots listed in the A/B metadata are verified using
- * avb_slot_verify(). If a slot is invalid or if it fails verification
- * (and AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR is not set, see
- * below), it will be marked as unbootable in the A/B metadata and the
- * metadata will be saved to disk before returning.
- *
- * 3. If there are no bootable slots, the value
- * AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS is returned.
- *
- * 4. For each bootable slot, the Stored Rollback Indexes are updated
- * such that for each rollback index location, the Stored Rollback
- * Index is the largest number smaller than or equal to the Rollback
- * Index of each slot.
- *
- * 5. The bootable slot with the highest priority is selected and
- * returned in |out_data|. If this slot is already marked as
- * successful, the A/B metadata is not modified. However, if the slot
- * is not marked as bootable its |tries_remaining| count is
- * decremented and the A/B metadata is saved to disk before returning.
- * In either case the value AVB_AB_FLOW_RESULT_OK is returning.
- *
- * The partitions to load is given in |requested_partitions| as a
- * NULL-terminated array of NUL-terminated strings. Typically the
- * |requested_partitions| array only contains a single item for the
- * boot partition, 'boot'.
- *
- * If the device is unlocked (and _only_ if it's unlocked), the
- * AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR flag should be set
- * in the |flags| parameter. This will allow considering slots as
- * verified even when avb_slot_verify() returns
- * AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED,
- * AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION, or
- * AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX for the slot in
- * question.
- *
- * Note that neither androidboot.slot_suffix nor androidboot.slot are
- * set in the |cmdline| field in |AvbSlotVerifyData| - you will have
- * to pass these yourself.
- *
- * If a slot was selected and it verified then AVB_AB_FLOW_RESULT_OK
- * is returned.
- *
- * If a slot was selected but it didn't verify then
- * AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR is returned. This can
- * only happen when the AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR
- * flag is set.
- *
- * If an I/O operation - such as loading/saving metadata or checking
- * rollback indexes - fail, the value AVB_AB_FLOW_RESULT_ERROR_IO is
- * returned.
- *
- * If memory allocation fails, AVB_AB_FLOW_RESULT_ERROR_OOM is
- * returned.
- *
- * If invalid arguments are passed,
- * AVB_AB_FLOW_RESULT_ERROR_INVALID_ARGUMENT is returned. For example
- * this can happen if using AVB_HASHTREE_ERROR_MODE_LOGGING without
- * AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR.
- *
- * Reasonable behavior for handling AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS
- * is to initiate device repair (which is device-dependent).
- */
-AvbABFlowResult avb_ab_flow(AvbABOps* ab_ops,
-                            const char* const* requested_partitions,
-                            AvbSlotVerifyFlags flags,
-                            AvbHashtreeErrorMode hashtree_error_mode,
-                            AvbSlotVerifyData** out_data);
-
-/* Marks the slot with the given slot number as active. Returns
- * AVB_IO_RESULT_OK on success, error code otherwise.
- *
- * This function is typically used by the OS updater when completing
- * an update. It can also used by the firmware for implementing the
- * "set_active" command.
- */
-AvbIOResult avb_ab_mark_slot_active(AvbABOps* ab_ops, unsigned int slot_number);
-
-/* Marks the slot with the given slot number as unbootable. Returns
- * AVB_IO_RESULT_OK on success, error code otherwise.
- *
- * This function is typically used by the OS updater before writing to
- * a slot.
- */
-AvbIOResult avb_ab_mark_slot_unbootable(AvbABOps* ab_ops,
-                                        unsigned int slot_number);
-
-/* Marks the slot with the given slot number as having booted
- * successfully. Returns AVB_IO_RESULT_OK on success, error code
- * otherwise.
- *
- * Calling this on an unbootable slot is an error - AVB_IO_RESULT_OK
- * will be returned yet the function will have no side-effects.
- *
- * This function is typically used by the OS updater after having
- * confirmed that the slot works as intended.
- */
-AvbIOResult avb_ab_mark_slot_successful(AvbABOps* ab_ops,
-                                        unsigned int slot_number);
-
-/*
- * Load metadata.
- */
-AvbIOResult load_metadata(AvbABOps* ab_ops,
-			  AvbABData* ab_data,
-			  AvbABData* ab_data_orig);
-
-/* Writes A/B metadata to disk only if it has changed - returns
- * AVB_IO_RESULT_OK on success, error code otherwise.
- */
-AvbIOResult save_metadata_if_changed(AvbABOps* ab_ops,
-				     AvbABData* ab_data,
-				     AvbABData* ab_data_orig);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* AVB_AB_FLOW_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_AB_H) && !defined(AVB_COMPILATION)
+#error \
+    "Never include this file directly, include libavb_ab/libavb_ab.h instead."
+#endif
+*/
+
+#ifndef AVB_AB_FLOW_H_
+#define AVB_AB_FLOW_H_
+
+#include <android_avb/avb_ab_ops.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Magic for the A/B struct when serialized. */
+#define AVB_AB_MAGIC "\0AB0"
+#define AVB_AB_MAGIC_LEN 4
+
+/* Versioning for the on-disk A/B metadata - keep in sync with avbtool. */
+#define AVB_AB_MAJOR_VERSION 1
+#define AVB_AB_MINOR_VERSION 0
+
+/* Size of AvbABData struct. */
+#define AVB_AB_DATA_SIZE 32
+
+/* Maximum values for slot data */
+#define AVB_AB_MAX_PRIORITY 15
+#define AVB_AB_MAX_TRIES_REMAINING 7
+
+/* Struct used for recording per-slot metadata.
+ *
+ * When serialized, data is stored in network byte-order.
+ */
+typedef struct AvbABSlotData {
+  /* Slot priority. Valid values range from 0 to AVB_AB_MAX_PRIORITY,
+   * both inclusive with 1 being the lowest and AVB_AB_MAX_PRIORITY
+   * being the highest. The special value 0 is used to indicate the
+   * slot is unbootable.
+   */
+  uint8_t priority;
+
+  /* Number of times left attempting to boot this slot ranging from 0
+   * to AVB_AB_MAX_TRIES_REMAINING.
+   */
+  uint8_t tries_remaining;
+
+  /* Non-zero if this slot has booted successfully, 0 otherwise. */
+  uint8_t successful_boot;
+
+  /* Reserved for future use. */
+  uint8_t reserved[1];
+} AVB_ATTR_PACKED AvbABSlotData;
+
+/* Struct used for recording A/B metadata.
+ *
+ * When serialized, data is stored in network byte-order.
+ */
+typedef struct AvbABData {
+  /* Magic number used for identification - see AVB_AB_MAGIC. */
+  uint8_t magic[AVB_AB_MAGIC_LEN];
+
+  /* Version of on-disk struct - see AVB_AB_{MAJOR,MINOR}_VERSION. */
+  uint8_t version_major;
+  uint8_t version_minor;
+
+  /* Padding to ensure |slots| field start eight bytes in. */
+  uint8_t reserved1[2];
+
+  /* Per-slot metadata. */
+  AvbABSlotData slots[2];
+
+  /* Reserved for future use. */
+  uint8_t last_boot;
+  uint8_t reserved2[11];
+
+  /* CRC32 of all 28 bytes preceding this field. */
+  uint32_t crc32;
+} AVB_ATTR_PACKED AvbABData;
+
+/* Copies |src| to |dest|, byte-swapping fields in the
+ * process. Returns false if the data is invalid (e.g. wrong magic,
+ * wrong CRC32 etc.), true otherwise.
+ */
+bool avb_ab_data_verify_and_byteswap(const AvbABData* src, AvbABData* dest);
+
+/* Copies |src| to |dest|, byte-swapping fields in the process. Also
+ * updates the |crc32| field in |dest|.
+ */
+void avb_ab_data_update_crc_and_byteswap(const AvbABData* src, AvbABData* dest);
+
+/* Initializes |data| such that it has two slots and both slots have
+ * maximum tries remaining. The CRC is not set.
+ */
+void avb_ab_data_init(AvbABData* data);
+
+/* Reads A/B metadata from the 'misc' partition using |ops|. Returned
+ * data is properly byteswapped. Returns AVB_IO_RESULT_OK on
+ * success, error code otherwise.
+ *
+ * If the data read from disk is invalid (e.g. wrong magic or CRC
+ * checksum failure), the metadata will be reset using
+ * avb_ab_data_init() and then written to disk.
+ */
+AvbIOResult avb_ab_data_read(AvbABOps* ab_ops, AvbABData* data);
+
+/* Writes A/B metadata to the 'misc' partition using |ops|. This will
+ * byteswap and update the CRC as needed. Returns AVB_IO_RESULT_OK on
+ * success, error code otherwise.
+ */
+AvbIOResult avb_ab_data_write(AvbABOps* ab_ops, const AvbABData* data);
+
+/* Return codes used in avb_ab_flow(), see that function for
+ * documentation of each value.
+ */
+typedef enum {
+  AVB_AB_FLOW_RESULT_OK,
+  AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR,
+  AVB_AB_FLOW_RESULT_ERROR_OOM,
+  AVB_AB_FLOW_RESULT_ERROR_IO,
+  AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS,
+  AVB_AB_FLOW_RESULT_ERROR_INVALID_ARGUMENT
+} AvbABFlowResult;
+
+/* Get a textual representation of |result|. */
+const char* avb_ab_flow_result_to_string(AvbABFlowResult result);
+
+/* High-level function to select a slot to boot. The following
+ * algorithm is used:
+ *
+ * 1. A/B metadata is loaded and validated using the
+ * read_ab_metadata() operation. Typically this means it's read from
+ * the 'misc' partition and if it's invalid then it's reset using
+ * avb_ab_data_init() and this reset metadata is returned.
+ *
+ * 2. All bootable slots listed in the A/B metadata are verified using
+ * avb_slot_verify(). If a slot is invalid or if it fails verification
+ * (and AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR is not set, see
+ * below), it will be marked as unbootable in the A/B metadata and the
+ * metadata will be saved to disk before returning.
+ *
+ * 3. If there are no bootable slots, the value
+ * AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS is returned.
+ *
+ * 4. For each bootable slot, the Stored Rollback Indexes are updated
+ * such that for each rollback index location, the Stored Rollback
+ * Index is the largest number smaller than or equal to the Rollback
+ * Index of each slot.
+ *
+ * 5. The bootable slot with the highest priority is selected and
+ * returned in |out_data|. If this slot is already marked as
+ * successful, the A/B metadata is not modified. However, if the slot
+ * is not marked as bootable its |tries_remaining| count is
+ * decremented and the A/B metadata is saved to disk before returning.
+ * In either case the value AVB_AB_FLOW_RESULT_OK is returning.
+ *
+ * The partitions to load is given in |requested_partitions| as a
+ * NULL-terminated array of NUL-terminated strings. Typically the
+ * |requested_partitions| array only contains a single item for the
+ * boot partition, 'boot'.
+ *
+ * If the device is unlocked (and _only_ if it's unlocked), the
+ * AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR flag should be set
+ * in the |flags| parameter. This will allow considering slots as
+ * verified even when avb_slot_verify() returns
+ * AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED,
+ * AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION, or
+ * AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX for the slot in
+ * question.
+ *
+ * Note that neither androidboot.slot_suffix nor androidboot.slot are
+ * set in the |cmdline| field in |AvbSlotVerifyData| - you will have
+ * to pass these yourself.
+ *
+ * If a slot was selected and it verified then AVB_AB_FLOW_RESULT_OK
+ * is returned.
+ *
+ * If a slot was selected but it didn't verify then
+ * AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR is returned. This can
+ * only happen when the AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR
+ * flag is set.
+ *
+ * If an I/O operation - such as loading/saving metadata or checking
+ * rollback indexes - fail, the value AVB_AB_FLOW_RESULT_ERROR_IO is
+ * returned.
+ *
+ * If memory allocation fails, AVB_AB_FLOW_RESULT_ERROR_OOM is
+ * returned.
+ *
+ * If invalid arguments are passed,
+ * AVB_AB_FLOW_RESULT_ERROR_INVALID_ARGUMENT is returned. For example
+ * this can happen if using AVB_HASHTREE_ERROR_MODE_LOGGING without
+ * AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR.
+ *
+ * Reasonable behavior for handling AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS
+ * is to initiate device repair (which is device-dependent).
+ */
+AvbABFlowResult avb_ab_flow(AvbABOps* ab_ops,
+                            const char* const* requested_partitions,
+                            AvbSlotVerifyFlags flags,
+                            AvbHashtreeErrorMode hashtree_error_mode,
+                            AvbSlotVerifyData** out_data);
+
+/* Marks the slot with the given slot number as active. Returns
+ * AVB_IO_RESULT_OK on success, error code otherwise.
+ *
+ * This function is typically used by the OS updater when completing
+ * an update. It can also used by the firmware for implementing the
+ * "set_active" command.
+ */
+AvbIOResult avb_ab_mark_slot_active(AvbABOps* ab_ops, unsigned int slot_number);
+
+/* Marks the slot with the given slot number as unbootable. Returns
+ * AVB_IO_RESULT_OK on success, error code otherwise.
+ *
+ * This function is typically used by the OS updater before writing to
+ * a slot.
+ */
+AvbIOResult avb_ab_mark_slot_unbootable(AvbABOps* ab_ops,
+                                        unsigned int slot_number);
+
+/* Marks the slot with the given slot number as having booted
+ * successfully. Returns AVB_IO_RESULT_OK on success, error code
+ * otherwise.
+ *
+ * Calling this on an unbootable slot is an error - AVB_IO_RESULT_OK
+ * will be returned yet the function will have no side-effects.
+ *
+ * This function is typically used by the OS updater after having
+ * confirmed that the slot works as intended.
+ */
+AvbIOResult avb_ab_mark_slot_successful(AvbABOps* ab_ops,
+                                        unsigned int slot_number);
+
+/*
+ * Load metadata.
+ */
+AvbIOResult load_metadata(AvbABOps* ab_ops,
+			  AvbABData* ab_data,
+			  AvbABData* ab_data_orig);
+
+/* Writes A/B metadata to disk only if it has changed - returns
+ * AVB_IO_RESULT_OK on success, error code otherwise.
+ */
+AvbIOResult save_metadata_if_changed(AvbABOps* ab_ops,
+				     AvbABData* ab_data,
+				     AvbABData* ab_data_orig);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_AB_FLOW_H_ */
diff --git a/include/android_avb/rk_avb_ops_user.h b/include/android_avb/rk_avb_ops_user.h
index 0a70e7096b..c9f3cd7927 100644
--- a/include/android_avb/rk_avb_ops_user.h
+++ b/include/android_avb/rk_avb_ops_user.h
@@ -267,6 +267,14 @@ int rk_auth_unlock(void *buffer, char *out_is_trusted);
  */
 int rk_generate_unlock_challenge(void *buffer, uint32_t *challenge_len);
 
+
+/**
+ * Get last boot slot
+ *
+ * @return 0 is slot A; 1 is slot B; -1 is error
+ */
+int rk_get_lastboot(void);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/lib/avb/libavb_ab/avb_ab_flow.c b/lib/avb/libavb_ab/avb_ab_flow.c
index 7ed1ab9107..c84131d6c3 100755
--- a/lib/avb/libavb_ab/avb_ab_flow.c
+++ b/lib/avb/libavb_ab/avb_ab_flow.c
@@ -1,531 +1,532 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include <android_avb/avb_ab_flow.h>
-
-bool avb_ab_data_verify_and_byteswap(const AvbABData* src, AvbABData* dest) {
-  /* Ensure magic is correct. */
-  if (avb_safe_memcmp(src->magic, AVB_AB_MAGIC, AVB_AB_MAGIC_LEN) != 0) {
-    avb_error("Magic is incorrect.\n");
-    return false;
-  }
-
-  avb_memcpy(dest, src, sizeof(AvbABData));
-  dest->crc32 = avb_be32toh(dest->crc32);
-
-  /* Ensure we don't attempt to access any fields if the major version
-   * is not supported.
-   */
-  if (dest->version_major > AVB_AB_MAJOR_VERSION) {
-    avb_error("No support for given major version.\n");
-    return false;
-  }
-
-  /* Bail if CRC32 doesn't match. */
-  if (dest->crc32 !=
-      avb_crc32((const uint8_t*)dest, sizeof(AvbABData) - sizeof(uint32_t))) {
-    avb_error("CRC32 does not match.\n");
-    return false;
-  }
-
-  return true;
-}
-
-void avb_ab_data_update_crc_and_byteswap(const AvbABData* src,
-                                         AvbABData* dest) {
-  avb_memcpy(dest, src, sizeof(AvbABData));
-  dest->crc32 = avb_htobe32(
-      avb_crc32((const uint8_t*)dest, sizeof(AvbABData) - sizeof(uint32_t)));
-}
-
-void avb_ab_data_init(AvbABData* data) {
-  avb_memset(data, '\0', sizeof(AvbABData));
-  avb_memcpy(data->magic, AVB_AB_MAGIC, AVB_AB_MAGIC_LEN);
-  data->version_major = AVB_AB_MAJOR_VERSION;
-  data->version_minor = AVB_AB_MINOR_VERSION;
-  data->slots[0].priority = AVB_AB_MAX_PRIORITY;
-  data->slots[0].tries_remaining = AVB_AB_MAX_TRIES_REMAINING;
-  data->slots[0].successful_boot = 0;
-  data->slots[1].priority = AVB_AB_MAX_PRIORITY - 1;
-  data->slots[1].tries_remaining = AVB_AB_MAX_TRIES_REMAINING;
-  data->slots[1].successful_boot = 0;
-}
-
-/* The AvbABData struct is stored 2048 bytes into the 'misc' partition
- * following the 'struct bootloader_message' field. The struct is
- * compatible with the guidelines in bootable/recovery/bootloader.h -
- * e.g. it is stored in the |slot_suffix| field, starts with a
- * NUL-byte, and is 32 bytes long.
- */
-#define AB_METADATA_MISC_PARTITION_OFFSET 2048
-
-AvbIOResult avb_ab_data_read(AvbABOps* ab_ops, AvbABData* data) {
-  AvbOps* ops = ab_ops->ops;
-  AvbABData serialized;
-  AvbIOResult io_ret;
-  size_t num_bytes_read;
-
-  io_ret = ops->read_from_partition(ops,
-                                    "misc",
-                                    AB_METADATA_MISC_PARTITION_OFFSET,
-                                    sizeof(AvbABData),
-                                    &serialized,
-                                    &num_bytes_read);
-  if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-    return AVB_IO_RESULT_ERROR_OOM;
-  } else if (io_ret != AVB_IO_RESULT_OK ||
-             num_bytes_read != sizeof(AvbABData)) {
-    avb_error("Error reading A/B metadata.\n");
-    return AVB_IO_RESULT_ERROR_IO;
-  }
-
-  if (!avb_ab_data_verify_and_byteswap(&serialized, data)) {
-    avb_error(
-        "Error validating A/B metadata from disk. "
-        "Resetting and writing new A/B metadata to disk.\n");
-    avb_ab_data_init(data);
-    return avb_ab_data_write(ab_ops, data);
-  }
-
-  return AVB_IO_RESULT_OK;
-}
-
-AvbIOResult avb_ab_data_write(AvbABOps* ab_ops, const AvbABData* data) {
-  AvbOps* ops = ab_ops->ops;
-  AvbABData serialized;
-  AvbIOResult io_ret;
-
-  avb_ab_data_update_crc_and_byteswap(data, &serialized);
-  io_ret = ops->write_to_partition(ops,
-                                   "misc",
-                                   AB_METADATA_MISC_PARTITION_OFFSET,
-                                   sizeof(AvbABData),
-                                   &serialized);
-  if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-    return AVB_IO_RESULT_ERROR_OOM;
-  } else if (io_ret != AVB_IO_RESULT_OK) {
-    avb_error("Error writing A/B metadata.\n");
-    return AVB_IO_RESULT_ERROR_IO;
-  }
-  return AVB_IO_RESULT_OK;
-}
-
-static bool slot_is_bootable(AvbABSlotData* slot) {
-  return slot->priority > 0 &&
-         (slot->successful_boot || (slot->tries_remaining > 0));
-}
-
-static void slot_set_unbootable(AvbABSlotData* slot) {
-  slot->priority = 0;
-  slot->tries_remaining = 0;
-  slot->successful_boot = 0;
-}
-
-/* Ensure all unbootable and/or illegal states are marked as the
- * canonical 'unbootable' state, e.g. priority=0, tries_remaining=0,
- * and successful_boot=0.
- */
-static void slot_normalize(AvbABSlotData* slot) {
-  if (slot->priority > 0) {
-    if (slot->tries_remaining == 0 && !slot->successful_boot) {
-      /* We've exhausted all tries -> unbootable. */
-      slot_set_unbootable(slot);
-    }
-    if (slot->tries_remaining > 0 && slot->successful_boot) {
-      /* Illegal state - avb_ab_mark_slot_successful() will clear
-       * tries_remaining when setting successful_boot.
-       */
-      slot_set_unbootable(slot);
-    }
-  } else {
-    slot_set_unbootable(slot);
-  }
-}
-
-static const char* slot_suffixes[2] = {"_a", "_b"};
-
-/* Helper function to load metadata - returns AVB_IO_RESULT_OK on
- * success, error code otherwise.
- */
-AvbIOResult load_metadata(AvbABOps* ab_ops,
-                                 AvbABData* ab_data,
-                                 AvbABData* ab_data_orig) {
-  AvbIOResult io_ret;
-
-  io_ret = ab_ops->read_ab_metadata(ab_ops, ab_data);
-  if (io_ret != AVB_IO_RESULT_OK) {
-    avb_error("I/O error while loading A/B metadata.\n");
-    return io_ret;
-  }
-  *ab_data_orig = *ab_data;
-
-  /* Ensure data is normalized, e.g. illegal states will be marked as
-   * unbootable and all unbootable states are represented with
-   * (priority=0, tries_remaining=0, successful_boot=0).
-   */
-  slot_normalize(&ab_data->slots[0]);
-  slot_normalize(&ab_data->slots[1]);
-  return AVB_IO_RESULT_OK;
-}
-
-/* Writes A/B metadata to disk only if it has changed - returns
- * AVB_IO_RESULT_OK on success, error code otherwise.
- */
-AvbIOResult save_metadata_if_changed(AvbABOps* ab_ops,
-                                            AvbABData* ab_data,
-                                            AvbABData* ab_data_orig) {
-  if (avb_safe_memcmp(ab_data, ab_data_orig, sizeof(AvbABData)) != 0) {
-    avb_debug("Writing A/B metadata to disk.\n");
-    return ab_ops->write_ab_metadata(ab_ops, ab_data);
-  }
-  return AVB_IO_RESULT_OK;
-}
-
-AvbABFlowResult avb_ab_flow(AvbABOps* ab_ops,
-                            const char* const* requested_partitions,
-                            AvbSlotVerifyFlags flags,
-                            AvbHashtreeErrorMode hashtree_error_mode,
-                            AvbSlotVerifyData** out_data) {
-  AvbOps* ops = ab_ops->ops;
-  AvbSlotVerifyData* slot_data[2] = {NULL, NULL};
-  AvbSlotVerifyData* data = NULL;
-  AvbABFlowResult ret;
-  AvbABData ab_data, ab_data_orig;
-  size_t slot_index_to_boot, n;
-  AvbIOResult io_ret;
-  bool saw_and_allowed_verification_error = false;
-
-  io_ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
-  if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-    ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
-    goto out;
-  } else if (io_ret != AVB_IO_RESULT_OK) {
-    ret = AVB_AB_FLOW_RESULT_ERROR_IO;
-    goto out;
-  }
-
-  /* Validate all bootable slots. */
-  for (n = 0; n < 2; n++) {
-    if (slot_is_bootable(&ab_data.slots[n])) {
-      AvbSlotVerifyResult verify_result;
-      bool set_slot_unbootable = false;
-
-      verify_result = avb_slot_verify(ops,
-                                      requested_partitions,
-                                      slot_suffixes[n],
-                                      flags,
-                                      hashtree_error_mode,
-                                      &slot_data[n]);
-      switch (verify_result) {
-        case AVB_SLOT_VERIFY_RESULT_ERROR_OOM:
-          ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
-          goto out;
-
-        case AVB_SLOT_VERIFY_RESULT_ERROR_IO:
-          ret = AVB_AB_FLOW_RESULT_ERROR_IO;
-          goto out;
-
-        case AVB_SLOT_VERIFY_RESULT_OK:
-          break;
-
-        case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA:
-        case AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION:
-          /* Even with AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR
-           * these mean game over.
-           */
-          set_slot_unbootable = true;
-          break;
-
-        /* explicit fallthrough. */
-        case AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION:
-        case AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX:
-        case AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED:
-          if (flags & AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR) {
-            /* Do nothing since we allow this. */
-            avb_debugv("Allowing slot ",
-                       slot_suffixes[n],
-                       " which verified "
-                       "with result ",
-                       avb_slot_verify_result_to_string(verify_result),
-                       " because "
-                       "AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR "
-                       "is set.\n",
-                       NULL);
-            saw_and_allowed_verification_error = true;
-          } else {
-            set_slot_unbootable = true;
-          }
-          break;
-
-        case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT:
-          ret = AVB_AB_FLOW_RESULT_ERROR_INVALID_ARGUMENT;
-          goto out;
-          /* Do not add a 'default:' case here because of -Wswitch. */
-      }
-
-      if (set_slot_unbootable) {
-        avb_errorv("Error verifying slot ",
-                   slot_suffixes[n],
-                   " with result ",
-                   avb_slot_verify_result_to_string(verify_result),
-                   " - setting unbootable.\n",
-                   NULL);
-        slot_set_unbootable(&ab_data.slots[n]);
-      }
-    }
-  }
-
-  if (slot_is_bootable(&ab_data.slots[0]) &&
-      slot_is_bootable(&ab_data.slots[1])) {
-    if (ab_data.slots[1].priority > ab_data.slots[0].priority) {
-      slot_index_to_boot = 1;
-    } else {
-      slot_index_to_boot = 0;
-    }
-  } else if (slot_is_bootable(&ab_data.slots[0])) {
-    slot_index_to_boot = 0;
-  } else if (slot_is_bootable(&ab_data.slots[1])) {
-    slot_index_to_boot = 1;
-  } else {
-    /* No bootable slots! */
-    avb_error("No bootable slots found.\n");
-    ret = AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS;
-    goto out;
-  }
-
-  /* Update stored rollback index such that the stored rollback index
-   * is the largest value supporting all currently bootable slots. Do
-   * this for every rollback index location.
-   */
-  for (n = 0; n < AVB_MAX_NUMBER_OF_ROLLBACK_INDEX_LOCATIONS; n++) {
-    uint64_t rollback_index_value = 0;
-
-    if (slot_data[0] != NULL && slot_data[1] != NULL) {
-      uint64_t a_rollback_index = slot_data[0]->rollback_indexes[n];
-      uint64_t b_rollback_index = slot_data[1]->rollback_indexes[n];
-      rollback_index_value =
-          (a_rollback_index < b_rollback_index ? a_rollback_index
-                                               : b_rollback_index);
-    } else if (slot_data[0] != NULL) {
-      rollback_index_value = slot_data[0]->rollback_indexes[n];
-    } else if (slot_data[1] != NULL) {
-      rollback_index_value = slot_data[1]->rollback_indexes[n];
-    }
-
-    if (rollback_index_value != 0) {
-      uint64_t current_rollback_index_value;
-      io_ret = ops->read_rollback_index(ops, n, &current_rollback_index_value);
-      if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-        ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
-        goto out;
-      } else if (io_ret != AVB_IO_RESULT_OK) {
-        avb_error("Error getting rollback index for slot.\n");
-        ret = AVB_AB_FLOW_RESULT_ERROR_IO;
-        goto out;
-      }
-      if (current_rollback_index_value != rollback_index_value) {
-        io_ret = ops->write_rollback_index(ops, n, rollback_index_value);
-        if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-          ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
-          goto out;
-        } else if (io_ret != AVB_IO_RESULT_OK) {
-          avb_error("Error setting stored rollback index.\n");
-          ret = AVB_AB_FLOW_RESULT_ERROR_IO;
-          goto out;
-        }
-      }
-    }
-  }
-
-  /* Finally, select this slot. */
-  avb_assert(slot_data[slot_index_to_boot] != NULL);
-  data = slot_data[slot_index_to_boot];
-  slot_data[slot_index_to_boot] = NULL;
-  if (saw_and_allowed_verification_error) {
-    avb_assert(flags & AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR);
-    ret = AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR;
-  } else {
-    ret = AVB_AB_FLOW_RESULT_OK;
-  }
-
-  /* ... and decrement tries remaining, if applicable. */
-  if (!ab_data.slots[slot_index_to_boot].successful_boot &&
-      ab_data.slots[slot_index_to_boot].tries_remaining > 0) {
-    ab_data.slots[slot_index_to_boot].tries_remaining -= 1;
-  }
-
-out:
-  io_ret = save_metadata_if_changed(ab_ops, &ab_data, &ab_data_orig);
-  if (io_ret != AVB_IO_RESULT_OK) {
-    if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-      ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
-    } else {
-      ret = AVB_AB_FLOW_RESULT_ERROR_IO;
-    }
-    if (data != NULL) {
-      avb_slot_verify_data_free(data);
-      data = NULL;
-    }
-  }
-
-  for (n = 0; n < 2; n++) {
-    if (slot_data[n] != NULL) {
-      avb_slot_verify_data_free(slot_data[n]);
-    }
-  }
-
-  if (out_data != NULL) {
-    *out_data = data;
-  } else {
-    if (data != NULL) {
-      avb_slot_verify_data_free(data);
-    }
-  }
-
-  return ret;
-}
-
-AvbIOResult avb_ab_mark_slot_active(AvbABOps* ab_ops,
-                                    unsigned int slot_number) {
-  AvbABData ab_data, ab_data_orig;
-  unsigned int other_slot_number;
-  AvbIOResult ret;
-
-  avb_assert(slot_number < 2);
-
-  ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
-  if (ret != AVB_IO_RESULT_OK) {
-    goto out;
-  }
-
-  /* Make requested slot top priority, unsuccessful, and with max tries. */
-  ab_data.slots[slot_number].priority = AVB_AB_MAX_PRIORITY;
-  ab_data.slots[slot_number].tries_remaining = AVB_AB_MAX_TRIES_REMAINING;
-  ab_data.slots[slot_number].successful_boot = 0;
-
-  /* Ensure other slot doesn't have as high a priority. */
-  other_slot_number = 1 - slot_number;
-  if (ab_data.slots[other_slot_number].priority == AVB_AB_MAX_PRIORITY) {
-    ab_data.slots[other_slot_number].priority = AVB_AB_MAX_PRIORITY - 1;
-  }
-
-  ret = AVB_IO_RESULT_OK;
-
-out:
-  if (ret == AVB_IO_RESULT_OK) {
-    ret = save_metadata_if_changed(ab_ops, &ab_data, &ab_data_orig);
-  }
-  return ret;
-}
-
-AvbIOResult avb_ab_mark_slot_unbootable(AvbABOps* ab_ops,
-                                        unsigned int slot_number) {
-  AvbABData ab_data, ab_data_orig;
-  AvbIOResult ret;
-
-  avb_assert(slot_number < 2);
-
-  ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
-  if (ret != AVB_IO_RESULT_OK) {
-    goto out;
-  }
-
-  slot_set_unbootable(&ab_data.slots[slot_number]);
-
-  ret = AVB_IO_RESULT_OK;
-
-out:
-  if (ret == AVB_IO_RESULT_OK) {
-    ret = save_metadata_if_changed(ab_ops, &ab_data, &ab_data_orig);
-  }
-  return ret;
-}
-
-AvbIOResult avb_ab_mark_slot_successful(AvbABOps* ab_ops,
-                                        unsigned int slot_number) {
-  AvbABData ab_data, ab_data_orig;
-  AvbIOResult ret;
-
-  avb_assert(slot_number < 2);
-
-  ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
-  if (ret != AVB_IO_RESULT_OK) {
-    goto out;
-  }
-
-  if (!slot_is_bootable(&ab_data.slots[slot_number])) {
-    avb_error("Cannot mark unbootable slot as successful.\n");
-    ret = AVB_IO_RESULT_OK;
-    goto out;
-  }
-
-  ab_data.slots[slot_number].tries_remaining = 0;
-  ab_data.slots[slot_number].successful_boot = 1;
-
-  ret = AVB_IO_RESULT_OK;
-
-out:
-  if (ret == AVB_IO_RESULT_OK) {
-    ret = save_metadata_if_changed(ab_ops, &ab_data, &ab_data_orig);
-  }
-  return ret;
-}
-
-const char* avb_ab_flow_result_to_string(AvbABFlowResult result) {
-  const char* ret = NULL;
-
-  switch (result) {
-    case AVB_AB_FLOW_RESULT_OK:
-      ret = "OK";
-      break;
-
-    case AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR:
-      ret = "OK_WITH_VERIFICATION_ERROR";
-      break;
-
-    case AVB_AB_FLOW_RESULT_ERROR_OOM:
-      ret = "ERROR_OOM";
-      break;
-
-    case AVB_AB_FLOW_RESULT_ERROR_IO:
-      ret = "ERROR_IO";
-      break;
-
-    case AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS:
-      ret = "ERROR_NO_BOOTABLE_SLOTS";
-      break;
-
-    case AVB_AB_FLOW_RESULT_ERROR_INVALID_ARGUMENT:
-      ret = "ERROR_INVALID_ARGUMENT";
-      break;
-      /* Do not add a 'default:' case here because of -Wswitch. */
-  }
-
-  if (ret == NULL) {
-    avb_error("Unknown AvbABFlowResult value.\n");
-    ret = "(unknown)";
-  }
-
-  return ret;
-}
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_ab_flow.h>
+
+bool avb_ab_data_verify_and_byteswap(const AvbABData* src, AvbABData* dest) {
+  /* Ensure magic is correct. */
+  if (avb_safe_memcmp(src->magic, AVB_AB_MAGIC, AVB_AB_MAGIC_LEN) != 0) {
+    avb_error("Magic is incorrect.\n");
+    return false;
+  }
+
+  avb_memcpy(dest, src, sizeof(AvbABData));
+  dest->crc32 = avb_be32toh(dest->crc32);
+
+  /* Ensure we don't attempt to access any fields if the major version
+   * is not supported.
+   */
+  if (dest->version_major > AVB_AB_MAJOR_VERSION) {
+    avb_error("No support for given major version.\n");
+    return false;
+  }
+
+  /* Bail if CRC32 doesn't match. */
+  if (dest->crc32 !=
+      avb_crc32((const uint8_t*)dest, sizeof(AvbABData) - sizeof(uint32_t))) {
+    avb_error("CRC32 does not match.\n");
+    return false;
+  }
+
+  return true;
+}
+
+void avb_ab_data_update_crc_and_byteswap(const AvbABData* src,
+                                         AvbABData* dest) {
+  avb_memcpy(dest, src, sizeof(AvbABData));
+  dest->crc32 = avb_htobe32(
+      avb_crc32((const uint8_t*)dest, sizeof(AvbABData) - sizeof(uint32_t)));
+}
+
+void avb_ab_data_init(AvbABData* data) {
+  avb_memset(data, '\0', sizeof(AvbABData));
+  avb_memcpy(data->magic, AVB_AB_MAGIC, AVB_AB_MAGIC_LEN);
+  data->version_major = AVB_AB_MAJOR_VERSION;
+  data->version_minor = AVB_AB_MINOR_VERSION;
+  data->last_boot = 0;
+  data->slots[0].priority = AVB_AB_MAX_PRIORITY;
+  data->slots[0].tries_remaining = AVB_AB_MAX_TRIES_REMAINING;
+  data->slots[0].successful_boot = 0;
+  data->slots[1].priority = AVB_AB_MAX_PRIORITY - 1;
+  data->slots[1].tries_remaining = AVB_AB_MAX_TRIES_REMAINING;
+  data->slots[1].successful_boot = 0;
+}
+
+/* The AvbABData struct is stored 2048 bytes into the 'misc' partition
+ * following the 'struct bootloader_message' field. The struct is
+ * compatible with the guidelines in bootable/recovery/bootloader.h -
+ * e.g. it is stored in the |slot_suffix| field, starts with a
+ * NUL-byte, and is 32 bytes long.
+ */
+#define AB_METADATA_MISC_PARTITION_OFFSET 2048
+
+AvbIOResult avb_ab_data_read(AvbABOps* ab_ops, AvbABData* data) {
+  AvbOps* ops = ab_ops->ops;
+  AvbABData serialized;
+  AvbIOResult io_ret;
+  size_t num_bytes_read;
+
+  io_ret = ops->read_from_partition(ops,
+                                    "misc",
+                                    AB_METADATA_MISC_PARTITION_OFFSET,
+                                    sizeof(AvbABData),
+                                    &serialized,
+                                    &num_bytes_read);
+  if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+    return AVB_IO_RESULT_ERROR_OOM;
+  } else if (io_ret != AVB_IO_RESULT_OK ||
+             num_bytes_read != sizeof(AvbABData)) {
+    avb_error("Error reading A/B metadata.\n");
+    return AVB_IO_RESULT_ERROR_IO;
+  }
+
+  if (!avb_ab_data_verify_and_byteswap(&serialized, data)) {
+    avb_error(
+        "Error validating A/B metadata from disk. "
+        "Resetting and writing new A/B metadata to disk.\n");
+    avb_ab_data_init(data);
+    return avb_ab_data_write(ab_ops, data);
+  }
+
+  return AVB_IO_RESULT_OK;
+}
+
+AvbIOResult avb_ab_data_write(AvbABOps* ab_ops, const AvbABData* data) {
+  AvbOps* ops = ab_ops->ops;
+  AvbABData serialized;
+  AvbIOResult io_ret;
+
+  avb_ab_data_update_crc_and_byteswap(data, &serialized);
+  io_ret = ops->write_to_partition(ops,
+                                   "misc",
+                                   AB_METADATA_MISC_PARTITION_OFFSET,
+                                   sizeof(AvbABData),
+                                   &serialized);
+  if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+    return AVB_IO_RESULT_ERROR_OOM;
+  } else if (io_ret != AVB_IO_RESULT_OK) {
+    avb_error("Error writing A/B metadata.\n");
+    return AVB_IO_RESULT_ERROR_IO;
+  }
+  return AVB_IO_RESULT_OK;
+}
+
+static bool slot_is_bootable(AvbABSlotData* slot) {
+  return slot->priority > 0 &&
+         (slot->successful_boot || (slot->tries_remaining > 0));
+}
+
+static void slot_set_unbootable(AvbABSlotData* slot) {
+  slot->priority = 0;
+  slot->tries_remaining = 0;
+  slot->successful_boot = 0;
+}
+
+/* Ensure all unbootable and/or illegal states are marked as the
+ * canonical 'unbootable' state, e.g. priority=0, tries_remaining=0,
+ * and successful_boot=0.
+ */
+static void slot_normalize(AvbABSlotData* slot) {
+  if (slot->priority > 0) {
+    if (slot->tries_remaining == 0 && !slot->successful_boot) {
+      /* We've exhausted all tries -> unbootable. */
+      slot_set_unbootable(slot);
+    }
+    if (slot->tries_remaining > 0 && slot->successful_boot) {
+      /* Illegal state - avb_ab_mark_slot_successful() will clear
+       * tries_remaining when setting successful_boot.
+       */
+      slot_set_unbootable(slot);
+    }
+  } else {
+    slot_set_unbootable(slot);
+  }
+}
+
+static const char* slot_suffixes[2] = {"_a", "_b"};
+
+/* Helper function to load metadata - returns AVB_IO_RESULT_OK on
+ * success, error code otherwise.
+ */
+AvbIOResult load_metadata(AvbABOps* ab_ops,
+                                 AvbABData* ab_data,
+                                 AvbABData* ab_data_orig) {
+  AvbIOResult io_ret;
+
+  io_ret = ab_ops->read_ab_metadata(ab_ops, ab_data);
+  if (io_ret != AVB_IO_RESULT_OK) {
+    avb_error("I/O error while loading A/B metadata.\n");
+    return io_ret;
+  }
+  *ab_data_orig = *ab_data;
+
+  /* Ensure data is normalized, e.g. illegal states will be marked as
+   * unbootable and all unbootable states are represented with
+   * (priority=0, tries_remaining=0, successful_boot=0).
+   */
+  slot_normalize(&ab_data->slots[0]);
+  slot_normalize(&ab_data->slots[1]);
+  return AVB_IO_RESULT_OK;
+}
+
+/* Writes A/B metadata to disk only if it has changed - returns
+ * AVB_IO_RESULT_OK on success, error code otherwise.
+ */
+AvbIOResult save_metadata_if_changed(AvbABOps* ab_ops,
+                                            AvbABData* ab_data,
+                                            AvbABData* ab_data_orig) {
+  if (avb_safe_memcmp(ab_data, ab_data_orig, sizeof(AvbABData)) != 0) {
+    avb_debug("Writing A/B metadata to disk.\n");
+    return ab_ops->write_ab_metadata(ab_ops, ab_data);
+  }
+  return AVB_IO_RESULT_OK;
+}
+
+AvbABFlowResult avb_ab_flow(AvbABOps* ab_ops,
+                            const char* const* requested_partitions,
+                            AvbSlotVerifyFlags flags,
+                            AvbHashtreeErrorMode hashtree_error_mode,
+                            AvbSlotVerifyData** out_data) {
+  AvbOps* ops = ab_ops->ops;
+  AvbSlotVerifyData* slot_data[2] = {NULL, NULL};
+  AvbSlotVerifyData* data = NULL;
+  AvbABFlowResult ret;
+  AvbABData ab_data, ab_data_orig;
+  size_t slot_index_to_boot, n;
+  AvbIOResult io_ret;
+  bool saw_and_allowed_verification_error = false;
+
+  io_ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
+  if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+    ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
+    goto out;
+  } else if (io_ret != AVB_IO_RESULT_OK) {
+    ret = AVB_AB_FLOW_RESULT_ERROR_IO;
+    goto out;
+  }
+
+  /* Validate all bootable slots. */
+  for (n = 0; n < 2; n++) {
+    if (slot_is_bootable(&ab_data.slots[n])) {
+      AvbSlotVerifyResult verify_result;
+      bool set_slot_unbootable = false;
+
+      verify_result = avb_slot_verify(ops,
+                                      requested_partitions,
+                                      slot_suffixes[n],
+                                      flags,
+                                      hashtree_error_mode,
+                                      &slot_data[n]);
+      switch (verify_result) {
+        case AVB_SLOT_VERIFY_RESULT_ERROR_OOM:
+          ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
+          goto out;
+
+        case AVB_SLOT_VERIFY_RESULT_ERROR_IO:
+          ret = AVB_AB_FLOW_RESULT_ERROR_IO;
+          goto out;
+
+        case AVB_SLOT_VERIFY_RESULT_OK:
+          break;
+
+        case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA:
+        case AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION:
+          /* Even with AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR
+           * these mean game over.
+           */
+          set_slot_unbootable = true;
+          break;
+
+        /* explicit fallthrough. */
+        case AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION:
+        case AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX:
+        case AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED:
+          if (flags & AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR) {
+            /* Do nothing since we allow this. */
+            avb_debugv("Allowing slot ",
+                       slot_suffixes[n],
+                       " which verified "
+                       "with result ",
+                       avb_slot_verify_result_to_string(verify_result),
+                       " because "
+                       "AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR "
+                       "is set.\n",
+                       NULL);
+            saw_and_allowed_verification_error = true;
+          } else {
+            set_slot_unbootable = true;
+          }
+          break;
+
+        case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT:
+          ret = AVB_AB_FLOW_RESULT_ERROR_INVALID_ARGUMENT;
+          goto out;
+          /* Do not add a 'default:' case here because of -Wswitch. */
+      }
+
+      if (set_slot_unbootable) {
+        avb_errorv("Error verifying slot ",
+                   slot_suffixes[n],
+                   " with result ",
+                   avb_slot_verify_result_to_string(verify_result),
+                   " - setting unbootable.\n",
+                   NULL);
+        slot_set_unbootable(&ab_data.slots[n]);
+      }
+    }
+  }
+
+  if (slot_is_bootable(&ab_data.slots[0]) &&
+      slot_is_bootable(&ab_data.slots[1])) {
+    if (ab_data.slots[1].priority > ab_data.slots[0].priority) {
+      slot_index_to_boot = 1;
+    } else {
+      slot_index_to_boot = 0;
+    }
+  } else if (slot_is_bootable(&ab_data.slots[0])) {
+    slot_index_to_boot = 0;
+  } else if (slot_is_bootable(&ab_data.slots[1])) {
+    slot_index_to_boot = 1;
+  } else {
+    /* No bootable slots! */
+    avb_error("No bootable slots found.\n");
+    ret = AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS;
+    goto out;
+  }
+
+  /* Update stored rollback index such that the stored rollback index
+   * is the largest value supporting all currently bootable slots. Do
+   * this for every rollback index location.
+   */
+  for (n = 0; n < AVB_MAX_NUMBER_OF_ROLLBACK_INDEX_LOCATIONS; n++) {
+    uint64_t rollback_index_value = 0;
+
+    if (slot_data[0] != NULL && slot_data[1] != NULL) {
+      uint64_t a_rollback_index = slot_data[0]->rollback_indexes[n];
+      uint64_t b_rollback_index = slot_data[1]->rollback_indexes[n];
+      rollback_index_value =
+          (a_rollback_index < b_rollback_index ? a_rollback_index
+                                               : b_rollback_index);
+    } else if (slot_data[0] != NULL) {
+      rollback_index_value = slot_data[0]->rollback_indexes[n];
+    } else if (slot_data[1] != NULL) {
+      rollback_index_value = slot_data[1]->rollback_indexes[n];
+    }
+
+    if (rollback_index_value != 0) {
+      uint64_t current_rollback_index_value;
+      io_ret = ops->read_rollback_index(ops, n, &current_rollback_index_value);
+      if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+        ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
+        goto out;
+      } else if (io_ret != AVB_IO_RESULT_OK) {
+        avb_error("Error getting rollback index for slot.\n");
+        ret = AVB_AB_FLOW_RESULT_ERROR_IO;
+        goto out;
+      }
+      if (current_rollback_index_value != rollback_index_value) {
+        io_ret = ops->write_rollback_index(ops, n, rollback_index_value);
+        if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+          ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
+          goto out;
+        } else if (io_ret != AVB_IO_RESULT_OK) {
+          avb_error("Error setting stored rollback index.\n");
+          ret = AVB_AB_FLOW_RESULT_ERROR_IO;
+          goto out;
+        }
+      }
+    }
+  }
+
+  /* Finally, select this slot. */
+  avb_assert(slot_data[slot_index_to_boot] != NULL);
+  data = slot_data[slot_index_to_boot];
+  slot_data[slot_index_to_boot] = NULL;
+  if (saw_and_allowed_verification_error) {
+    avb_assert(flags & AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR);
+    ret = AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR;
+  } else {
+    ret = AVB_AB_FLOW_RESULT_OK;
+  }
+
+  /* ... and decrement tries remaining, if applicable. */
+  if (!ab_data.slots[slot_index_to_boot].successful_boot &&
+      ab_data.slots[slot_index_to_boot].tries_remaining > 0) {
+    ab_data.slots[slot_index_to_boot].tries_remaining -= 1;
+  }
+
+out:
+  io_ret = save_metadata_if_changed(ab_ops, &ab_data, &ab_data_orig);
+  if (io_ret != AVB_IO_RESULT_OK) {
+    if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+      ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
+    } else {
+      ret = AVB_AB_FLOW_RESULT_ERROR_IO;
+    }
+    if (data != NULL) {
+      avb_slot_verify_data_free(data);
+      data = NULL;
+    }
+  }
+
+  for (n = 0; n < 2; n++) {
+    if (slot_data[n] != NULL) {
+      avb_slot_verify_data_free(slot_data[n]);
+    }
+  }
+
+  if (out_data != NULL) {
+    *out_data = data;
+  } else {
+    if (data != NULL) {
+      avb_slot_verify_data_free(data);
+    }
+  }
+
+  return ret;
+}
+
+AvbIOResult avb_ab_mark_slot_active(AvbABOps* ab_ops,
+                                    unsigned int slot_number) {
+  AvbABData ab_data, ab_data_orig;
+  unsigned int other_slot_number;
+  AvbIOResult ret;
+
+  avb_assert(slot_number < 2);
+
+  ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
+  if (ret != AVB_IO_RESULT_OK) {
+    goto out;
+  }
+
+  /* Make requested slot top priority, unsuccessful, and with max tries. */
+  ab_data.slots[slot_number].priority = AVB_AB_MAX_PRIORITY;
+  ab_data.slots[slot_number].tries_remaining = AVB_AB_MAX_TRIES_REMAINING;
+  ab_data.slots[slot_number].successful_boot = 0;
+
+  /* Ensure other slot doesn't have as high a priority. */
+  other_slot_number = 1 - slot_number;
+  if (ab_data.slots[other_slot_number].priority == AVB_AB_MAX_PRIORITY) {
+    ab_data.slots[other_slot_number].priority = AVB_AB_MAX_PRIORITY - 1;
+  }
+
+  ret = AVB_IO_RESULT_OK;
+
+out:
+  if (ret == AVB_IO_RESULT_OK) {
+    ret = save_metadata_if_changed(ab_ops, &ab_data, &ab_data_orig);
+  }
+  return ret;
+}
+
+AvbIOResult avb_ab_mark_slot_unbootable(AvbABOps* ab_ops,
+                                        unsigned int slot_number) {
+  AvbABData ab_data, ab_data_orig;
+  AvbIOResult ret;
+
+  avb_assert(slot_number < 2);
+
+  ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
+  if (ret != AVB_IO_RESULT_OK) {
+    goto out;
+  }
+
+  slot_set_unbootable(&ab_data.slots[slot_number]);
+
+  ret = AVB_IO_RESULT_OK;
+
+out:
+  if (ret == AVB_IO_RESULT_OK) {
+    ret = save_metadata_if_changed(ab_ops, &ab_data, &ab_data_orig);
+  }
+  return ret;
+}
+
+AvbIOResult avb_ab_mark_slot_successful(AvbABOps* ab_ops,
+                                        unsigned int slot_number) {
+  AvbABData ab_data, ab_data_orig;
+  AvbIOResult ret;
+
+  avb_assert(slot_number < 2);
+
+  ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
+  if (ret != AVB_IO_RESULT_OK) {
+    goto out;
+  }
+
+  if (!slot_is_bootable(&ab_data.slots[slot_number])) {
+    avb_error("Cannot mark unbootable slot as successful.\n");
+    ret = AVB_IO_RESULT_OK;
+    goto out;
+  }
+
+  ab_data.slots[slot_number].tries_remaining = 0;
+  ab_data.slots[slot_number].successful_boot = 1;
+
+  ret = AVB_IO_RESULT_OK;
+
+out:
+  if (ret == AVB_IO_RESULT_OK) {
+    ret = save_metadata_if_changed(ab_ops, &ab_data, &ab_data_orig);
+  }
+  return ret;
+}
+
+const char* avb_ab_flow_result_to_string(AvbABFlowResult result) {
+  const char* ret = NULL;
+
+  switch (result) {
+    case AVB_AB_FLOW_RESULT_OK:
+      ret = "OK";
+      break;
+
+    case AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR:
+      ret = "OK_WITH_VERIFICATION_ERROR";
+      break;
+
+    case AVB_AB_FLOW_RESULT_ERROR_OOM:
+      ret = "ERROR_OOM";
+      break;
+
+    case AVB_AB_FLOW_RESULT_ERROR_IO:
+      ret = "ERROR_IO";
+      break;
+
+    case AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS:
+      ret = "ERROR_NO_BOOTABLE_SLOTS";
+      break;
+
+    case AVB_AB_FLOW_RESULT_ERROR_INVALID_ARGUMENT:
+      ret = "ERROR_INVALID_ARGUMENT";
+      break;
+      /* Do not add a 'default:' case here because of -Wswitch. */
+  }
+
+  if (ret == NULL) {
+    avb_error("Unknown AvbABFlowResult value.\n");
+    ret = "(unknown)";
+  }
+
+  return ret;
+}
diff --git a/lib/avb/rk_avb_user/rk_avb_ops_user.c b/lib/avb/rk_avb_user/rk_avb_ops_user.c
index b58a81fe95..3edd428f98 100644
--- a/lib/avb/rk_avb_user/rk_avb_ops_user.c
+++ b/lib/avb/rk_avb_user/rk_avb_ops_user.c
@@ -117,8 +117,14 @@ int rk_avb_get_current_slot(char *select_slot)
 	}
 
 	if (rk_avb_ab_slot_select(ops->ab_ops, select_slot) != 0) {
-		printf("get_current_slot error!\n");
-		ret = -1;
+		printf("###There is no bootable slot, bring up last_boot!###\n");
+		if (rk_get_lastboot() == 1)
+			memcpy(select_slot, "_b", 2);
+		else if(rk_get_lastboot() == 0)
+			memcpy(select_slot, "_a", 2);
+		else
+			return -1;
+		ret = 0;
 	}
 
 	avb_ops_user_free(ops);
@@ -697,3 +703,30 @@ int rk_generate_unlock_challenge(void *buffer, uint32_t *challenge_len)
 	else
 		return -1;
 }
+
+int rk_get_lastboot(void)
+{
+
+	AvbIOResult io_ret = AVB_IO_RESULT_OK;
+	AvbABData ab_data;
+	int lastboot = -1;
+	AvbOps* ops;
+
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return -1;
+	}
+
+	io_ret = ops->ab_ops->read_ab_metadata(ops->ab_ops, &ab_data);
+	if (io_ret != AVB_IO_RESULT_OK) {
+		avb_error("I/O error while loading A/B metadata.\n");
+		goto out;
+	}
+
+	lastboot = ab_data.last_boot;
+out:
+	avb_ops_user_free(ops);
+
+	return lastboot;
+}

commit 4454e90b43786bac3a0d4c3bfddeafddf794d6c0
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Feb 28 20:09:50 2019 +0800

    lib: avb: change the output memssage I/O
    
    Since the stderr is not used in uboot, use printf to print the
    message.
    
    Change-Id: Ib522609e783acf8f407e2f9fb3805b553c543cba
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/lib/avb/libavb/avb_sysdeps_posix.c b/lib/avb/libavb/avb_sysdeps_posix.c
index 638ce9867a..413ac776eb 100755
--- a/lib/avb/libavb/avb_sysdeps_posix.c
+++ b/lib/avb/libavb/avb_sysdeps_posix.c
@@ -1,90 +1,90 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include <stdio.h>
-#include <common.h>
-#include <stdarg.h>
-#include <stdlib.h>
-#include <malloc.h>
-#include <errno.h>
-#include <asm/io.h>
-
-#include <android_avb/avb_sysdeps.h>
-
-void abort(void)
-{
-	
-}
-int avb_memcmp(const void* src1, const void* src2, size_t n) {
-  return memcmp(src1, src2, n);
-}
-
-void* avb_memcpy(void* dest, const void* src, size_t n) {
-  return memcpy(dest, src, n);
-}
-
-void* avb_memset(void* dest, const int c, size_t n) {
-  return memset(dest, c, n);
-}
-
-int avb_strcmp(const char* s1, const char* s2) {
-  return strcmp(s1, s2);
-}
-
-size_t avb_strlen(const char* str) {
-  return strlen(str);
-}
-
-void avb_abort(void) {
-  abort();
-}
-
-void avb_print(const char* message) {
-  fprintf(stderr, "%s", message);
-}
-
-void avb_printv(const char* message, ...) {
-  va_list ap;
-  const char* m;
-
-  va_start(ap, message);
-  for (m = message; m != NULL; m = va_arg(ap, const char*)) {
-    fprintf(stderr, "%s", m);
-  }
-  va_end(ap);
-}
-
-void* avb_malloc_(size_t size) {
-  return malloc(size);
-}
-
-void avb_free(void* ptr) {
-  free(ptr);
-}
-
-uint32_t avb_div_by_10(uint64_t* dividend) {
-  uint32_t rem = (uint32_t)(*dividend % 10);
-  *dividend /= 10;
-  return rem;
-}
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <stdio.h>
+#include <common.h>
+#include <stdarg.h>
+#include <stdlib.h>
+#include <malloc.h>
+#include <errno.h>
+#include <asm/io.h>
+
+#include <android_avb/avb_sysdeps.h>
+
+void abort(void)
+{
+	
+}
+int avb_memcmp(const void* src1, const void* src2, size_t n) {
+  return memcmp(src1, src2, n);
+}
+
+void* avb_memcpy(void* dest, const void* src, size_t n) {
+  return memcpy(dest, src, n);
+}
+
+void* avb_memset(void* dest, const int c, size_t n) {
+  return memset(dest, c, n);
+}
+
+int avb_strcmp(const char* s1, const char* s2) {
+  return strcmp(s1, s2);
+}
+
+size_t avb_strlen(const char* str) {
+  return strlen(str);
+}
+
+void avb_abort(void) {
+  abort();
+}
+
+void avb_print(const char* message) {
+  printf("%s", message);
+}
+
+void avb_printv(const char* message, ...) {
+  va_list ap;
+  const char* m;
+
+  va_start(ap, message);
+  for (m = message; m != NULL; m = va_arg(ap, const char*)) {
+    printf("%s", m);
+  }
+  va_end(ap);
+}
+
+void* avb_malloc_(size_t size) {
+  return malloc(size);
+}
+
+void avb_free(void* ptr) {
+  free(ptr);
+}
+
+uint32_t avb_div_by_10(uint64_t* dividend) {
+  uint32_t rem = (uint32_t)(*dividend % 10);
+  *dividend /= 10;
+  return rem;
+}

commit 2291ec7c6fbffd652da6118e45628578b7650a4a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Mar 1 14:47:18 2019 +0800

    rockchip: atags: add JShash for tag
    
    Since atags is passed between so many pre-loader, it's better
    add hash check for tag.
    
    It compatibles with legacy code and tag data, because 'hash'
    is reserved field in old tag data.
    
    Change-Id: I18b4c46f75b2c5a50194c23576e6f1437c83ccf5
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rk_atags.h b/arch/arm/include/asm/arch-rockchip/rk_atags.h
index 78c0039b1e..0d0c496f69 100644
--- a/arch/arm/include/asm/arch-rockchip/rk_atags.h
+++ b/arch/arm/include/asm/arch-rockchip/rk_atags.h
@@ -51,7 +51,8 @@ struct tag_serial {
 	u32 baudrate;
 	u32 m_mode;
 	u32 id;
-	u32 reserved[3];
+	u32 reserved[2];
+	u32 hash;
 } __packed;
 
 struct tag_bootdev {
@@ -59,14 +60,16 @@ struct tag_bootdev {
 	u32 devtype;
 	u32 devnum;
 	u32 mode;
-	u32 reserved[8];
+	u32 reserved[7];
+	u32 hash;
 } __packed;
 
 struct tag_ddr_mem {
 	u32 count;
 	u32 version;
 	u64 bank[20];
-	u32 reserved[4];
+	u32 reserved[3];
+	u32 hash;
 } __packed;
 
 struct tag_tos_mem {
@@ -85,7 +88,9 @@ struct tag_tos_mem {
 		u32 flags;
 	} drm_mem;
 
-	u64 reserved[8];
+	u64 reserved[7];
+	u32 reserved1;
+	u32 hash;
 } __packed;
 
 struct tag_atf_mem {
@@ -93,7 +98,8 @@ struct tag_atf_mem {
 	u64 phy_addr;
 	u32 size;
 	u32 flags;
-	u32 reserved[3];
+	u32 reserved[2];
+	u32 hash;
 } __packed;
 
 struct tag_ram_partition {
@@ -105,7 +111,10 @@ struct tag_ram_partition {
 		char name[16];
 		u64 start;
 		u64 size;
-	} part[16];
+	} part[6];
+
+	u32 reserved1[3];
+	u32 hash;
 } __packed;
 
 struct tag_core {
diff --git a/arch/arm/mach-rockchip/rk_atags.c b/arch/arm/mach-rockchip/rk_atags.c
index 8b9b9273c6..b330a8c897 100644
--- a/arch/arm/mach-rockchip/rk_atags.c
+++ b/arch/arm/mach-rockchip/rk_atags.c
@@ -10,6 +10,7 @@
 #include <debug_uart.h>
 #endif
 
+#define HASH_LEN	sizeof(u32)
 #define tag_next(t)	((struct tag *)((u32 *)(t) + (t)->hdr.size))
 #define tag_size(type)	((sizeof(struct tag_header) + sizeof(struct type)) >> 2)
 #define for_each_tag(t, base)		\
@@ -72,6 +73,20 @@ void *memcpy(void *dest, const void *src, size_t count)
 }
 #endif
 
+static u32 js_hash(void *buf, u32 len)
+{
+	u32 i, hash = 0x47C6A7E6;
+	char *data = buf;
+
+	if (!buf || !len)
+		return hash;
+
+	for (i = 0; i < len; i++)
+		hash ^= ((hash << 5) + data[i] + (hash >> 2));
+
+	return hash;
+}
+
 static int bad_magic(u32 magic)
 {
 	bool bad;
@@ -121,7 +136,7 @@ int atags_is_available(void)
 
 int atags_set_tag(u32 magic, void *tagdata)
 {
-	u32 length, size = 0;
+	u32 length, size = 0, hash;
 	struct tag *t = (struct tag *)ATAGS_PHYS_BASE;
 
 	if (!tagdata)
@@ -152,6 +167,10 @@ int atags_set_tag(u32 magic, void *tagdata)
 			if (bad_magic(t->hdr.magic))
 				return -EINVAL;
 
+			/* This is an old tag, override it */
+			if (t->hdr.magic == magic)
+				break;
+
 			if (t->hdr.magic == ATAG_NONE)
 				break;
 		}
@@ -188,8 +207,10 @@ int atags_set_tag(u32 magic, void *tagdata)
 	/* It's okay to setup a new tag */
 	t->hdr.magic = magic;
 	t->hdr.size = size;
-	length = (t->hdr.size << 2) - sizeof(struct tag_header);
+	length = (t->hdr.size << 2) - sizeof(struct tag_header) - HASH_LEN;
 	memcpy(&t->u, (char *)tagdata, length);
+	hash = js_hash(t, (size << 2) - HASH_LEN);
+	memcpy((char *)&t->u + length, &hash, HASH_LEN);
 
 	/* Next tag */
 	t = tag_next(t);
@@ -203,6 +224,7 @@ int atags_set_tag(u32 magic, void *tagdata)
 
 struct tag *atags_get_tag(u32 magic)
 {
+	u32 *hash, calc_hash, size;
 	struct tag *t;
 
 	if (!atags_is_available())
@@ -215,8 +237,25 @@ struct tag *atags_get_tag(u32 magic)
 		if (bad_magic(t->hdr.magic))
 			return NULL;
 
-		if (t->hdr.magic == magic)
+		if (t->hdr.magic != magic)
+			continue;
+
+		size = t->hdr.size;
+		hash = (u32 *)((ulong)t + (size << 2) - HASH_LEN);
+		if (!*hash) {
+			debug("No hash, magic(%x)\n", magic);
 			return t;
+		} else {
+			calc_hash = js_hash(t, (size << 2) - HASH_LEN);
+			if (calc_hash == *hash) {
+				debug("Hash okay, magic(%x)\n", magic);
+				return t;
+			} else {
+				debug("Hash bad, magic(%x), orgHash=%x, nowHash=%x\n",
+				      magic, *hash, calc_hash);
+				return NULL;
+			}
+		}
 	}
 
 	return NULL;
@@ -236,6 +275,9 @@ void atags_stat(void)
 	u32 start = ATAGS_PHYS_BASE, end = ATAGS_PHYS_BASE + ATAGS_SIZE;
 	struct tag *t;
 
+	if (!atags_is_available())
+		return;
+
 	for_each_tag(t, (struct tag *)ATAGS_PHYS_BASE) {
 		if (atags_overflow(t))
 			return;
@@ -275,6 +317,7 @@ void atags_print_tag(struct tag *t)
 		printf("        id = 0x%x\n", t->u.serial.id);
 		for (i = 0; i < ARRAY_SIZE(t->u.serial.reserved); i++)
 			printf("    res[%d] = 0x%x\n", i, t->u.serial.reserved[i]);
+		printf("      hash = 0x%x\n", t->u.serial.hash);
 		break;
 	case ATAG_BOOTDEV:
 		printf("[bootdev]:\n");
@@ -287,6 +330,7 @@ void atags_print_tag(struct tag *t)
 		for (i = 0; i < ARRAY_SIZE(t->u.bootdev.reserved); i++)
 			printf("    res[%d] = 0x%x\n",
 			       i, t->u.bootdev.reserved[i]);
+		printf("      hash = 0x%x\n", t->u.bootdev.hash);
 		break;
 	case ATAG_TOS_MEM:
 		printf("[tos_mem]:\n");
@@ -305,6 +349,8 @@ void atags_print_tag(struct tag *t)
 		printf("           flags = 0x%x\n", t->u.tos_mem.drm_mem.flags);
 		for (i = 0; i < ARRAY_SIZE(t->u.tos_mem.reserved); i++)
 			printf("   res[%d] = 0x%llx\n", i, t->u.tos_mem.reserved[i]);
+		printf("     res1 = 0x%x\n", t->u.tos_mem.reserved1);
+		printf("     hash = 0x%x\n", t->u.tos_mem.hash);
 		break;
 	case ATAG_DDR_MEM:
 		printf("[ddr_mem]:\n");
@@ -316,6 +362,7 @@ void atags_print_tag(struct tag *t)
 			printf("  bank[%d] = 0x%llx\n", i, t->u.ddr_mem.bank[i]);
 		for (i = 0; i < ARRAY_SIZE(t->u.ddr_mem.reserved); i++)
 			printf("    res[%d] = 0x%x\n", i, t->u.ddr_mem.reserved[i]);
+		printf("      hash = 0x%x\n", t->u.ddr_mem.hash);
 		break;
 	case ATAG_RAM_PARTITION:
 		printf("[ram_partition]:\n");
@@ -326,11 +373,14 @@ void atags_print_tag(struct tag *t)
 			printf("    res[%d] = 0x%x\n", i, t->u.ram_part.reserved[i]);
 
 		printf("    Part:  Name       Start Addr      Size\t\n");
-		for (i = 0; i < t->u.ram_part.count; i++)
+		for (i = 0; i < ARRAY_SIZE(t->u.ram_part.part); i++)
 			printf("%16s      0x%08llx      0x%08llx\n",
 			       t->u.ram_part.part[i].name,
 			       t->u.ram_part.part[i].start,
 			       t->u.ram_part.part[i].size);
+		for (i = 0; i < ARRAY_SIZE(t->u.ram_part.reserved1); i++)
+			printf("   res1[%d] = 0x%x\n", i, t->u.ram_part.reserved1[i]);
+		printf("      hash = 0x%x\n", t->u.ram_part.hash);
 		break;
 	case ATAG_ATF_MEM:
 		printf("[atf_mem]:\n");
@@ -341,6 +391,7 @@ void atags_print_tag(struct tag *t)
 		printf("      size = 0x%x\n", t->u.atf_mem.size);
 		for (i = 0; i < ARRAY_SIZE(t->u.atf_mem.reserved); i++)
 			printf("    res[%d] = 0x%x\n", i, t->u.atf_mem.reserved[i]);
+		printf("      hash = 0x%x\n", t->u.atf_mem.hash);
 		break;
 	case ATAG_CORE:
 		printf("[core]:\n");
@@ -361,6 +412,9 @@ void atags_print_all_tags(void)
 {
 	struct tag *t;
 
+	if (!atags_is_available())
+		return;
+
 	for_each_tag(t, (struct tag *)ATAGS_PHYS_BASE) {
 		if (atags_overflow(t))
 			return;

commit 716ab2e7e60a2ec837cf870216854108d7cf833f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Feb 28 11:05:58 2019 +0800

    rockchip: atags: add tag overflow check when tag lookup
    
    Change-Id: I0fca9559a6656338e4c956bffa3734ff744dcc4c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk_atags.c b/arch/arm/mach-rockchip/rk_atags.c
index 9c9adad3f7..8b9b9273c6 100644
--- a/arch/arm/mach-rockchip/rk_atags.c
+++ b/arch/arm/mach-rockchip/rk_atags.c
@@ -95,6 +95,23 @@ static int inline atags_size_overflow(struct tag *t, u32 tag_size)
 	return (unsigned long)t + (tag_size << 2) - ATAGS_PHYS_BASE > ATAGS_SIZE;
 }
 
+static int atags_overflow(struct tag *t)
+{
+	bool overflow;
+
+	overflow = atags_size_overflow(t, 0) ||
+		   atags_size_overflow(t, t->hdr.size);
+	if (overflow) {
+#if !CONFIG_IS_ENABLED(TINY_FRAMEWORK)
+		printf("Tag is overflow\n");
+#else
+		printascii("Tag is overflow\n");
+#endif
+	}
+
+	return overflow;
+}
+
 int atags_is_available(void)
 {
 	struct tag *t = (struct tag *)ATAGS_PHYS_BASE;
@@ -129,6 +146,9 @@ int atags_set_tag(u32 magic, void *tagdata)
 	} else {
 		/* Find the end, and use it as a new tag */
 		for_each_tag(t, (struct tag *)ATAGS_PHYS_BASE) {
+			if (atags_overflow(t))
+				return -EINVAL;
+
 			if (bad_magic(t->hdr.magic))
 				return -EINVAL;
 
@@ -159,16 +179,11 @@ int atags_set_tag(u32 magic, void *tagdata)
 		break;
 	};
 
-	if (atags_size_overflow(t, size)) {
-#if !CONFIG_IS_ENABLED(TINY_FRAMEWORK)
-		printf("%s: failed! no memory to setup magic(%x), max_mem=0x%x\n",
-		       __func__, magic, ATAGS_SIZE);
-#else
-		printascii("no memory to setup magic\n");
-#endif
+	if (!size)
+		return -EINVAL;
 
+	if (atags_size_overflow(t, size))
 		return -ENOMEM;
-	}
 
 	/* It's okay to setup a new tag */
 	t->hdr.magic = magic;
@@ -194,6 +209,9 @@ struct tag *atags_get_tag(u32 magic)
 		return NULL;
 
 	for_each_tag(t, (struct tag *)ATAGS_PHYS_BASE) {
+		if (atags_overflow(t))
+			return NULL;
+
 		if (bad_magic(t->hdr.magic))
 			return NULL;
 
@@ -219,6 +237,9 @@ void atags_stat(void)
 	struct tag *t;
 
 	for_each_tag(t, (struct tag *)ATAGS_PHYS_BASE) {
+		if (atags_overflow(t))
+			return;
+
 		if (bad_magic(t->hdr.magic))
 			return;
 
@@ -341,6 +362,9 @@ void atags_print_all_tags(void)
 	struct tag *t;
 
 	for_each_tag(t, (struct tag *)ATAGS_PHYS_BASE) {
+		if (atags_overflow(t))
+			return;
+
 		if (bad_magic(t->hdr.magic))
 			return;
 

commit 7b2d6d6e23cf9b7359349883cfd2480d91c32247
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Feb 28 10:48:21 2019 +0800

    rockchip: atags: move error message to bad_magic()
    
    Change-Id: I4c41fa05361f4c8ad2e33530764c2ba5090aeb00
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk_atags.c b/arch/arm/mach-rockchip/rk_atags.c
index cde2f23a3e..9c9adad3f7 100644
--- a/arch/arm/mach-rockchip/rk_atags.c
+++ b/arch/arm/mach-rockchip/rk_atags.c
@@ -72,11 +72,22 @@ void *memcpy(void *dest, const void *src, size_t count)
 }
 #endif
 
-static int inline bad_magic(u32 magic)
+static int bad_magic(u32 magic)
 {
-	return ((magic != ATAG_CORE) &&
-		(magic != ATAG_NONE) &&
-		(magic < ATAG_SERIAL || magic > ATAG_MAX));
+	bool bad;
+
+	bad = ((magic != ATAG_CORE) &&
+	       (magic != ATAG_NONE) &&
+	       (magic < ATAG_SERIAL || magic > ATAG_MAX));
+	if (bad) {
+#if !CONFIG_IS_ENABLED(TINY_FRAMEWORK)
+		printf("Magic(%x) is not support\n", magic);
+#else
+		printascii("Magic is not support\n");
+#endif
+	}
+
+	return bad;
 }
 
 static int inline atags_size_overflow(struct tag *t, u32 tag_size)
@@ -99,15 +110,8 @@ int atags_set_tag(u32 magic, void *tagdata)
 	if (!tagdata)
 		return -ENODATA;
 
-	if (bad_magic(magic)) {
-#if !CONFIG_IS_ENABLED(TINY_FRAMEWORK)
-		printf("%s: magic(%x) is not support\n", __func__, magic);
-#else
-		printascii("magic is not support\n");
-#endif
-
+	if (bad_magic(magic))
 		return -EINVAL;
-	}
 
 	/* Not allowed to be set by user directly, so do nothing */
 	if ((magic == ATAG_CORE) || (magic == ATAG_NONE))
@@ -125,21 +129,8 @@ int atags_set_tag(u32 magic, void *tagdata)
 	} else {
 		/* Find the end, and use it as a new tag */
 		for_each_tag(t, (struct tag *)ATAGS_PHYS_BASE) {
-			/*
-			 * We had better check magic to avoid traversing an
-			 * unknown tag, in case of atags has been damaged by
-			 * some unknown reason.
-			 */
-			if (bad_magic(t->hdr.magic)) {
-#if !CONFIG_IS_ENABLED(TINY_FRAMEWORK)
-				printf("%s: find unknown magic(%x)\n",
-				       __func__, t->hdr.magic);
-#else
-				printascii("find unknown magic\n");
-#endif
-
+			if (bad_magic(t->hdr.magic))
 				return -EINVAL;
-			}
 
 			if (t->hdr.magic == ATAG_NONE)
 				break;
@@ -203,15 +194,8 @@ struct tag *atags_get_tag(u32 magic)
 		return NULL;
 
 	for_each_tag(t, (struct tag *)ATAGS_PHYS_BASE) {
-		if (bad_magic(t->hdr.magic)) {
-#if !CONFIG_IS_ENABLED(TINY_FRAMEWORK)
-			printf("%s: find unknown magic(%x)\n",
-			       __func__, t->hdr.magic);
-#else
-			printascii("find unknown magic\n");
-#endif
+		if (bad_magic(t->hdr.magic))
 			return NULL;
-		}
 
 		if (t->hdr.magic == magic)
 			return t;
@@ -235,11 +219,8 @@ void atags_stat(void)
 	struct tag *t;
 
 	for_each_tag(t, (struct tag *)ATAGS_PHYS_BASE) {
-		if (bad_magic(t->hdr.magic)) {
-			printf("%s: find unknown magic(%x)\n",
-			       __func__, t->hdr.magic);
+		if (bad_magic(t->hdr.magic))
 			return;
-		}
 
 		in_use += (t->hdr.size << 2);
 	}
@@ -360,11 +341,8 @@ void atags_print_all_tags(void)
 	struct tag *t;
 
 	for_each_tag(t, (struct tag *)ATAGS_PHYS_BASE) {
-		if (bad_magic(t->hdr.magic)) {
-			printf("%s: find unknown magic(%x)\n",
-			       __func__, t->hdr.magic);
+		if (bad_magic(t->hdr.magic))
 			return;
-		}
 
 		atags_print_tag(t);
 	}

commit 82be0dc462e47efa557e4155a594e01f7eb17e5e
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Feb 28 19:29:08 2019 +0800

    configs: rk3128: add default CONFIG_FASTBOOT_BUF_ADDR
    
    The CONFIG_FASTBOOT_BUF_ADDR is 0x60800800.
    
    Change-Id: I14b9e6e28caf6309ac53f3096b3730d5851676dc
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/rk3128x_defconfig b/configs/rk3128x_defconfig
index 46c4f5da7b..511babf891 100644
--- a/configs/rk3128x_defconfig
+++ b/configs/rk3128x_defconfig
@@ -32,6 +32,7 @@ CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 CONFIG_SPL_OPTEE=y
 CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x60800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0

commit 591a6a81959525226cb65b98043d85260d79d904
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Feb 28 19:27:40 2019 +0800

    configs: rk1808: add default CONFIG_FASTBOOT_BUF_SIZE
    
    The CONFIG_FASTBOOT_BUF_SIZE is 0x04000000.
    
    Change-Id: Ic1da0b84fd84c328e062a278eda23c82525723f1
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/rk1808_defconfig b/configs/rk1808_defconfig
index 8ffec5633e..0f722cb02d 100644
--- a/configs/rk1808_defconfig
+++ b/configs/rk1808_defconfig
@@ -16,6 +16,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_FASTBOOT_BUF_ADDR=0x00800800
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_BOOTD is not set

commit 2fea0d71b52d427eebfa5714e98716bdc8531cce
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Feb 28 19:26:11 2019 +0800

    configs: rv1108: change the CONFIG_FASTBOOT_BUF_SIZE value
    
    Change the CONFIG_FASTBOOT_BUF_SIZE value to 0x4000000.
    
    Change-Id: Ia591a0daba78330b9c407f6eb473751135fd8cdf
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig
index 4afae952d0..8b3c477645 100644
--- a/configs/evb-rv1108_defconfig
+++ b/configs/evb-rv1108_defconfig
@@ -18,7 +18,7 @@ CONFIG_SPL_STACK_R=y
 CONFIG_TPL_TINY_FRAMEWORK=y
 CONFIG_TPL_SERIAL_SUPPORT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x62000000
-CONFIG_FASTBOOT_BUF_SIZE=0x08000000
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=1
 # CONFIG_CMD_IMLS is not set

commit 11980e05e6adfc08d0a48da9dd97cebc13268645
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Feb 28 18:14:22 2019 +0800

    configs: rk3399: change the CONFIG_FASTBOOT_BUF_SIZE value
    
    Change the CONFIG_FASTBOOT_BUF_SIZE value to 0x4000000
    
    Change-Id: Ic93057bf55b3ad6825650cd734c64826748e4a97
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index 2d3df130a2..c431b34bf8 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -20,7 +20,7 @@ CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_FASTBOOT_BUF_ADDR=0x00800800
-CONFIG_FASTBOOT_BUF_SIZE=0x08000000
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_CMD_BOOTZ=y
diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
index af958d7861..cc966e62a5 100755
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -23,7 +23,7 @@ CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_FASTBOOT_BUF_ADDR=0x00800800
-CONFIG_FASTBOOT_BUF_SIZE=0x08000000
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_BOOTD is not set
diff --git a/configs/rk3399pro_defconfig b/configs/rk3399pro_defconfig
index 778f0964b5..7e6c7a5231 100644
--- a/configs/rk3399pro_defconfig
+++ b/configs/rk3399pro_defconfig
@@ -23,7 +23,7 @@ CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_FASTBOOT_BUF_ADDR=0x00800800
-CONFIG_FASTBOOT_BUF_SIZE=0x08000000
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_BOOTD is not set

commit ef6ed4129d66dfa78991d2cd4f421e4115705a1b
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Feb 28 18:11:56 2019 +0800

    configs: rk3328: add default CONFIG_FASTBOOT_BUF_SIZE
    
    The CONFIG_FASTBOOT_BUF_SIZE is 0x4000000
    
    Change-Id: I813a6b117bbce7029ffe76516ed12b4e0d1e0940
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index 7bc65c73e5..2f2698ee51 100644
--- a/configs/evb-rk3328_defconfig
+++ b/configs/evb-rk3328_defconfig
@@ -25,6 +25,7 @@ CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_TPL_BOOTROM_SUPPORT=y
 CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
+CONFIG_FASTBOOT_BUF_SIZE=0x4000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=1
 CONFIG_CMD_BOOTZ=y
diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index 998e53f9f9..b1b5bf7fd2 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -30,6 +30,7 @@ CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_TPL_BOOTROM_SUPPORT=y
 CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
+CONFIG_FASTBOOT_BUF_SIZE=0x4000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_BDI is not set

commit 7a7d3f1dc947c36a36a3a748d09785c0bab760eb
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Feb 28 18:07:55 2019 +0800

    rk3288: add default CONFIG_FASTBOOT_BUF_ADDR & CONFIG_FASTBOOT_BUF_SIZE
    
    The CONFIG_FASTBOOT_BUF_ADDR is 0x800800.
    The CONFIG_FASTBOOT_BUF_SIZE is 0x4000000.
    
    Change-Id: Ic70898f61daff16caebdfb94a7e40d45b3bd6359
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/evb-rk3288-rk1608_defconfig b/configs/evb-rk3288-rk1608_defconfig
index 4c65113ff0..2dfa1e8c40 100644
--- a/configs/evb-rk3288-rk1608_defconfig
+++ b/configs/evb-rk3288-rk1608_defconfig
@@ -14,6 +14,8 @@ CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_BUF_ADDR=0x800800
+CONFIG_FASTBOOT_BUF_SIZE=0x4000000
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
diff --git a/configs/rk3288_defconfig b/configs/rk3288_defconfig
index e9e178100b..9f6672e555 100644
--- a/configs/rk3288_defconfig
+++ b/configs/rk3288_defconfig
@@ -17,6 +17,8 @@ CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_BUF_ADDR=0x800800
+CONFIG_FASTBOOT_BUF_SIZE=0x4000000
 # CONFIG_CMD_BOOTD is not set
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set

commit 3420d534ce2da36e8ec56610f2d5c14bb8c02494
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Feb 28 18:02:58 2019 +0800

    configs: rk3229: add default CONFIG_FASTBOOT_BUF_ADDR
    
    The CONFIG_FASTBOOT_BUF_ADDR is 0x60800800.
    
    Change-Id: I1fc730b09221d226dc38eb9880a6dd676c69a00d
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index a6c05c99da..99a232f563 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -30,6 +30,7 @@ CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 CONFIG_SPL_OPTEE=y
+CONFIG_FASTBOOT_BUF_ADDR=0x60800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
diff --git a/configs/rk322x_defconfig b/configs/rk322x_defconfig
index cc18398c46..c7c22af77a 100644
--- a/configs/rk322x_defconfig
+++ b/configs/rk322x_defconfig
@@ -31,6 +31,7 @@ CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 CONFIG_SPL_OPTEE=y
 CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x60800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0

commit 980e358fa0659ec03991f58d0a3b4d3d0007654f
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Feb 28 17:56:21 2019 +0800

    configs: rk3036: add default CONFIG_FASTBOOT_BUF_ADDR
    
    The CONFIG_FASTBOOT_BUF_ADDR is 0x60800800.
    
    Change-Id: I56c6f5468271ca71fdf8f0b0c5ce6e6fa54fa259
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/evb-rk3036_defconfig b/configs/evb-rk3036_defconfig
index 2e8fcf21ad..9166b2725f 100644
--- a/configs/evb-rk3036_defconfig
+++ b/configs/evb-rk3036_defconfig
@@ -30,6 +30,7 @@ CONFIG_SPL_OPTEE_SUPPORT=y
 CONFIG_SPL_OPTEE=y
 CONFIG_TPL_TINY_FRAMEWORK=y
 CONFIG_TPL_SERIAL_SUPPORT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x60800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
diff --git a/configs/rk3036_defconfig b/configs/rk3036_defconfig
index 62e45aa81b..acb901c273 100644
--- a/configs/rk3036_defconfig
+++ b/configs/rk3036_defconfig
@@ -32,6 +32,7 @@ CONFIG_SPL_OPTEE_SUPPORT=y
 CONFIG_SPL_OPTEE=y
 CONFIG_TPL_TINY_FRAMEWORK=y
 CONFIG_TPL_SERIAL_SUPPORT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x60800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0

commit a5e3baaa9355e34ae1ebb4a1e2394897f9332b49
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Mar 4 20:06:35 2019 +0800

    irq: disable all gpio interrupt by default
    
    Enable gpio irq only when child pin irq is request.
    
    Change-Id: I429839c7dcdcb90cfe58738eeb36c7445fb0152b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/irq/irq-gpio-switch.h b/drivers/irq/irq-gpio-switch.h
index 1442825132..a46604fb03 100644
--- a/drivers/irq/irq-gpio-switch.h
+++ b/drivers/irq/irq-gpio-switch.h
@@ -26,6 +26,7 @@ struct gpio_bank {
 	int id;
 	int irq_base;
 	int ngpio;
+	int use_count;
 };
 
 #define GPIO_BANK_REGISTER(ID, GPIO_BANK_NUM)	\
@@ -35,6 +36,7 @@ struct gpio_bank {
 		.id	  = ID,						\
 		.irq_base = PIN_BASE + (ID) * (GPIO_BANK_NUM),		\
 		.ngpio    = GPIO_BANK_NUM,				\
+		.use_count = 0						\
 	}
 
 /* gpio bank[31:8] and pin[7:0] */
diff --git a/drivers/irq/irq-gpio.c b/drivers/irq/irq-gpio.c
index ce88cc8f7b..3e61d188fa 100644
--- a/drivers/irq/irq-gpio.c
+++ b/drivers/irq/irq-gpio.c
@@ -276,6 +276,10 @@ static int gpio_irq_enable(int gpio_irq)
 
 	gpio_irq_unmask(bank->regbase, offset_to_bit(gpio));
 
+	if (bank->use_count == 0)
+		irq_handler_enable(IRQ_GPIO0 + bank->id);
+	bank->use_count++;
+
 	return 0;
 }
 
@@ -293,6 +297,10 @@ static int gpio_irq_disable(int irq)
 
 	gpio_irq_mask(bank->regbase, offset_to_bit(gpio));
 
+	if (bank->use_count == 1)
+		irq_handler_disable(IRQ_GPIO0 + bank->id);
+	bank->use_count--;
+
 	return 0;
 }
 
@@ -311,8 +319,8 @@ static int gpio_irq_init(void)
 			irq_install_handler(IRQ_GPIO0 + bank->id,
 			(interrupt_handler_t *)generic_gpio_handle_irq, NULL);
 
-			/* default enable all gpio group interrupt */
-			irq_handler_enable(IRQ_GPIO0 + bank->id);
+			/* default disable all gpio group interrupt */
+			irq_handler_disable(IRQ_GPIO0 + bank->id);
 		}
 	}
 

commit 005d29a79d84659e0e26de97107a4a3a0a9a510f
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Mar 4 14:48:16 2019 +0800

    video/drm: rockchip_display: support get display mode from edid if client is not present
    
    Change-Id: Ib8956972b7bbb6aaaac2e3c8a93e0d38d98abf6a
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index d5bf157274..9f8be7d2ba 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -465,8 +465,6 @@ bool drm_mode_is_420(const struct drm_display_info *display,
 static int display_get_timing(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
-	const struct rockchip_connector *conn = conn_state->connector;
-	const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
 	struct drm_display_mode *mode = &conn_state->mode;
 	const struct drm_display_mode *m;
 	struct panel_state *panel_state = &state->panel_state;
@@ -485,18 +483,6 @@ static int display_get_timing(struct display_state *state)
 		goto done;
 	}
 
-	if (conn_funcs->get_edid && !conn_funcs->get_edid(state)) {
-		int panel_bits_per_colourp;
-
-		if (!edid_get_drm_mode((void *)&conn_state->edid,
-				     sizeof(conn_state->edid), mode,
-				     &panel_bits_per_colourp)) {
-			printf("Using display timing from edid\n");
-			edid_print_info((void *)&conn_state->edid);
-			goto done;
-		}
-	}
-
 	printf("failed to find display timing\n");
 	return -ENODEV;
 done:
@@ -524,6 +510,7 @@ static int display_init(struct display_state *state)
 	struct rockchip_crtc *crtc = crtc_state->crtc;
 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
 	struct drm_display_mode *mode = &conn_state->mode;
+	int bpc;
 	int ret = 0;
 	static bool __print_once = false;
 
@@ -576,13 +563,9 @@ static int display_init(struct display_state *state)
 			goto deinit;
 	}
 
-	if (conn_funcs->get_timing) {
-		ret = conn_funcs->get_timing(state);
-	} else if (panel_state->panel) {
+	if (panel_state->panel) {
 		ret = display_get_timing(state);
 	} else if (conn_state->bridge) {
-		int bpc;
-
 		ret = video_bridge_read_edid(conn_state->bridge->dev,
 					     conn_state->edid, EDID_SIZE);
 		if (ret > 0) {
@@ -591,6 +574,17 @@ static int display_init(struct display_state *state)
 			if (!ret)
 				edid_print_info((void *)&conn_state->edid);
 		}
+	} else if (conn_funcs->get_timing) {
+		ret = conn_funcs->get_timing(state);
+	} else if (conn_funcs->get_edid) {
+		ret = conn_funcs->get_edid(state);
+		if (!ret) {
+			ret = edid_get_drm_mode((void *)&conn_state->edid,
+						sizeof(conn_state->edid), mode,
+						&bpc);
+			if (!ret)
+				edid_print_info((void *)&conn_state->edid);
+		}
 	}
 
 	if (ret)

commit bdeba276114bfc536d5b80e1dcc28cfef9a5b3d9
Author: Tony Xu <tony.xu@rock-chips.com>
Date:   Tue Mar 5 10:30:48 2019 +0800

    common: write_keybox: fix write attestation key compatibility error
    
    Using the same name when write key in new formation and old formation
    cause ta parse key data error when use key in old formation
    
    Change-Id: I7f83efc3672e903e608d89f7dc214465dc321502
    Signed-off-by: Tony Xu <tony.xu@rock-chips.com>

diff --git a/common/attestation_key.c b/common/attestation_key.c
index 0cfe2ef12e..3e3ecb64c9 100644
--- a/common/attestation_key.c
+++ b/common/attestation_key.c
@@ -199,12 +199,13 @@ static bool validate_ca_header(const uint8_t *buf, uint32_t buf_size)
 
 /* write key to security storage. */
 static uint32_t write_key(keymaster_algorithm_t key_type,
-				const uint8_t *key, uint32_t key_size)
+			  unsigned char *key_name,
+			  const uint8_t *key, uint32_t key_size)
 {
 	char key_file[STORAGE_ID_LENGTH_MAX] = {0};
 
-	snprintf(key_file, STORAGE_ID_LENGTH_MAX, "%s.%s", ATTESTATION_KEY_FILE,
-		get_keyslot_str(key_type));
+	snprintf(key_file, STORAGE_ID_LENGTH_MAX, "%s.%s", key_name,
+		 get_keyslot_str(key_type));
 	write_to_keymaster((uint8_t *)key_file, strlen(key_file),
 				(uint8_t *)key, key_size);
 	return 0;
@@ -243,6 +244,7 @@ atap_result load_attestation_key(struct blk_desc *dev_desc,
 				disk_partition_t *misc_partition)
 {
 	int ret;
+	unsigned char key_name[STORAGE_ID_LENGTH_MAX] = {0};
 
 	if (!dev_desc) {
 		printf("%s: Could not find device\n", __func__);
@@ -325,7 +327,9 @@ atap_result load_attestation_key(struct blk_desc *dev_desc,
 		return ATAP_RESULT_ERROR_BUF_COPY;
 	}
 	/* write rsa private key to security storage*/
-	write_key(KM_ALGORITHM_RSA, key.data, key.data_length);
+	memcpy(key_name, ATTESTATION_KEY_PREFIX,
+	       sizeof(ATTESTATION_KEY_PREFIX));
+	write_key(KM_ALGORITHM_RSA, key_name, key.data, key.data_length);
 
 	/* read rsa cert chain */
 	atap_certchain certchain;
@@ -359,7 +363,7 @@ atap_result load_attestation_key(struct blk_desc *dev_desc,
 	}
 
 	/* write ec private key to security storage*/
-	write_key(KM_ALGORITHM_EC, key.data, key.data_length);
+	write_key(KM_ALGORITHM_EC, key_name, key.data, key.data_length);
 
 	/* read ec cert chain */
 	free_cert_chain(certchain);
@@ -430,12 +434,14 @@ atap_result write_attestation_key_to_secure_storage(uint8_t *received_data,
 						    uint32_t len)
 {
 	unsigned char keybuf[ATTESTATION_DATA_OFFSET] = {0};
+	unsigned char key_name[STORAGE_ID_LENGTH_MAX] = {0};
 	uint32_t device_id_size = 0;
 	uint8_t device_id[32] = {0};
 	uint8_t *key_buf = NULL;
 	uint32_t algorithm;
 	uint8_t *key_data;
 	uint32_t key_data_length = 0;
+
 	/* skip the tag(4 byte) and the size of key(4 byte) */
 	memcpy(keybuf, received_data + 8, ATTESTATION_DATA_OFFSET);
 	key_data = malloc(ATTESTATION_DATA_OFFSET);
@@ -445,11 +451,11 @@ atap_result write_attestation_key_to_secure_storage(uint8_t *received_data,
 		printf("invalidate device_id_size:%d\n", device_id_size);
 		return ATAP_RESULT_ERROR_INVALID_DEVICE_ID;
 	}
-
 	memcpy(device_id, keybuf + CA_HEADER_LEN + sizeof(uint32_t),
 	       device_id_size);
 	printf("device_id:%s\n", device_id);
 
+	memcpy(key_name, ATTESTATION_KEY_FILE, sizeof(ATTESTATION_KEY_FILE));
 	/* read algorithm(RSA) from keybuf */
 	key_buf = keybuf + CA_HEADER_LEN + sizeof(uint32_t) + device_id_size;
 	copy_uint32_from_buf(&key_buf, &algorithm);
@@ -457,7 +463,7 @@ atap_result write_attestation_key_to_secure_storage(uint8_t *received_data,
 	/* read rsa key and certchain */
 	read_key_data(&key_buf, key_data, &key_data_length);
 	printf("write attestation key: RSA\n");
-	write_key(KM_ALGORITHM_RSA, key_data, key_data_length);
+	write_key(KM_ALGORITHM_RSA, key_name, key_data, key_data_length);
 
 	/* read algorithm(EC) from keybuf */
 	copy_uint32_from_buf(&key_buf, &algorithm);
@@ -465,7 +471,7 @@ atap_result write_attestation_key_to_secure_storage(uint8_t *received_data,
 	/* read ec key and certchain */
 	read_key_data(&key_buf, key_data, &key_data_length);
 	printf("write attestation key: EC\n");
-	write_key(KM_ALGORITHM_EC, key_data, key_data_length);
+	write_key(KM_ALGORITHM_EC, key_name, key_data, key_data_length);
 
 	memset(keybuf, 0, sizeof(keybuf));
 	free(key_data);

commit 785ce82a19631394ac43821e61acf483ee7600fa
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Feb 28 09:33:40 2019 +0800

    common: android: support misc partition absent
    
    Change-Id: Ida7780a1fd0981d8dbf01c0f25e283dfc6332eca
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index af912f98de..799963c573 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -878,7 +878,7 @@ bool android_avb_is_enabled(void)
 int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 				 unsigned long load_address)
 {
-	enum android_boot_mode mode;
+	enum android_boot_mode mode = ANDROID_BOOT_MODE_NORMAL;
 	disk_partition_t misc_part_info;
 	int part_num;
 	int ret;
@@ -895,22 +895,23 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	part_num = part_get_info_by_name(dev_desc, ANDROID_PARTITION_MISC,
 					 &misc_part_info);
 	if (part_num < 0) {
-		printf("%s Could not find misc partition\n", __func__);
-		return -ENODEV;
-	}
-
+		printf("Could not find misc partition\n");
+	} else {
 #ifdef CONFIG_ANDROID_KEYMASTER_CA
-	/* load attestation key from misc partition. */
-	load_attestation_key(dev_desc, &misc_part_info);
+		/* load attestation key from misc partition. */
+		load_attestation_key(dev_desc, &misc_part_info);
 #endif
 
-	mode = android_bootloader_load_and_clear_mode(dev_desc, &misc_part_info);
+		mode = android_bootloader_load_and_clear_mode(dev_desc,
+							      &misc_part_info);
 #ifdef CONFIG_RKIMG_BOOTLOADER
-	if (mode == ANDROID_BOOT_MODE_NORMAL) {
-		if (rockchip_get_boot_mode() == BOOT_MODE_RECOVERY)
-			mode = ANDROID_BOOT_MODE_RECOVERY;
-	}
+		if (mode == ANDROID_BOOT_MODE_NORMAL) {
+			if (rockchip_get_boot_mode() == BOOT_MODE_RECOVERY)
+				mode = ANDROID_BOOT_MODE_RECOVERY;
+		}
 #endif
+	}
+
 	printf("ANDROID: reboot reason: \"%s\"\n", android_boot_mode_str(mode));
 
 #ifdef CONFIG_ANDROID_AB

commit 30431185982382875ae12b04d831bdf49fe4b712
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Feb 28 10:42:56 2019 +0800

    rockchip: rk3308: disable uart2-m1 configure when pre-loader serial enable
    
    pre-loader has configure it.
    
    Change-Id: I2786ff7c438a38036a7a5be3337052f7e51423a3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3308/rk3308.c b/arch/arm/mach-rockchip/rk3308/rk3308.c
index c864b31c2e..0d11073ddf 100644
--- a/arch/arm/mach-rockchip/rk3308/rk3308.c
+++ b/arch/arm/mach-rockchip/rk3308/rk3308.c
@@ -10,6 +10,8 @@
 #include <asm/gpio.h>
 #include <debug_uart.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #ifdef CONFIG_ARM64
 #include <asm/armv8/mmu.h>
 static struct mm_region rk3308_mem_map[] = {
@@ -125,6 +127,9 @@ void board_debug_uart_init(void)
 {
 	static struct rk3308_grf * const grf = (void *)GRF_BASE;
 
+	if (gd && gd->serial.using_pre_serial)
+		return;
+
 	/* Enable early UART2 channel m1 on the rk3308 */
 	rk_clrsetreg(&grf->soc_con5, UART2_IO_SEL_MASK,
 		     UART2_IO_SEL_M1 << UART2_IO_SEL_SHIFT);

commit a0bf35b5828e532111a10d1b90bf6e9d401ce4a4
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Feb 28 11:20:44 2019 +0800

    mmc: rpmb: correct MMC_RSP_R1b to MMC_RSP_R1
    
    According to eMMC spec, the resp_type of MMC_CMD_WRITE_MULTIPLE_BLOCK
    is MMC_RSP_R1 but not MMC_RSP_R1b.
    
    If use MMC_RSP_R1b, this causes rpmb can not work with sdhci drive.
    
    Change-Id: I02ab825a4a526646079be6a7ae27326d1a3b7acf
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mmc/rpmb.c b/drivers/mmc/rpmb.c
index dda84de781..88136f0644 100644
--- a/drivers/mmc/rpmb.c
+++ b/drivers/mmc/rpmb.c
@@ -84,7 +84,7 @@ static int mmc_rpmb_request(struct mmc *mmc, const void *s,
 
 	cmd.cmdidx = MMC_CMD_WRITE_MULTIPLE_BLOCK;
 	cmd.cmdarg = 0;
-	cmd.resp_type = MMC_RSP_R1b;
+	cmd.resp_type = MMC_RSP_R1;
 
 	data.src = (const char *)s;
 	data.blocks = count;

commit 562a66d432702328bc8db5f42bb5e5811788fec0
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Feb 26 22:12:27 2019 +0800

    cmd: fastboot: test the fastboot memory space availability
    
    Use the sysmem to test fastboot memory is available or not.
    
    Change-Id: I021152827b6948fabd5ea41e111ea20adf43167f
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/cmd/fastboot.c b/cmd/fastboot.c
index 67aa7b8d7b..bb2f416b78 100644
--- a/cmd/fastboot.c
+++ b/cmd/fastboot.c
@@ -13,6 +13,7 @@
 #include <g_dnl.h>
 #include <net.h>
 #include <usb.h>
+#include <sysmem.h>
 
 static int do_fastboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 {
@@ -21,7 +22,6 @@ static int do_fastboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 	char *usb_controller;
 	int ret;
 #endif
-
 	if (argc < 2)
 		return CMD_RET_USAGE;
 
@@ -65,6 +65,13 @@ static int do_fastboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 		goto exit;
 	}
 
+	if (!sysmem_alloc_base("fastboot",
+			       CONFIG_FASTBOOT_BUF_ADDR,
+			       CONFIG_FASTBOOT_BUF_SIZE)) {
+		printf("The fastboot memory space is unusable!\n");
+		return CMD_RET_FAILURE;
+	}
+
 	printf("OK\n");
 
 	while (1) {
@@ -78,6 +85,7 @@ static int do_fastboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 	ret = CMD_RET_SUCCESS;
 
 exit:
+	sysmem_free(CONFIG_FASTBOOT_BUF_ADDR);
 	g_dnl_unregister();
 	g_dnl_clear_detach();
 	board_usb_cleanup(controller_index, USB_INIT_DEVICE);

commit 727ebf6de1e1558b976cad0e510c02f4272d2ef8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Mar 1 10:23:54 2019 +0800

    lib: sysmem: alloc base and size must be 4-byte aligned
    
    Change-Id: Icf59ee6522f2e0793605b03b0bcf05b58585069f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/lib/sysmem.c b/lib/sysmem.c
index 24bd4f91c9..2549de95f2 100644
--- a/lib/sysmem.c
+++ b/lib/sysmem.c
@@ -266,6 +266,14 @@ void *sysmem_alloc_align_base(const char *name,
 		return NULL;
 	}
 
+	if (!IS_ALIGNED(base, 4)) {
+		SYSMEM_E("\"%s\" base=0x%08lx is not 4-byte aligned\n", name, (ulong)base);
+		return NULL;
+	}
+
+	/* Must be 4-byte aligned */
+	size = ALIGN(size, 4);
+
 	/* Already allocated ? */
 	list_for_each(node, &sysmem->allocated_head) {
 		prop = list_entry(node, struct sysmem_property, node);

commit dd20212857596902abbb882c6cc871ac0ae29cbd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Feb 13 16:30:41 2019 +0800

    configs: rk3308 aarch32/64: enable led gpio support
    
    Change-Id: I833ea6788c036cb27df690cacf55e7b12788b4a2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3308-aarch32_defconfig b/configs/rk3308-aarch32_defconfig
index 0edc1895f0..c1a2d8def6 100644
--- a/configs/rk3308-aarch32_defconfig
+++ b/configs/rk3308-aarch32_defconfig
@@ -34,6 +34,7 @@ CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_LED is not set
 # CONFIG_CMD_MISC is not set
 CONFIG_CMD_PMIC=y
 # CONFIG_DOS_PARTITION is not set
@@ -49,6 +50,8 @@ CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y
 CONFIG_RK8XX_PWRKEY=y
 CONFIG_ADC_KEY=y
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PHY=y
diff --git a/configs/rk3308_defconfig b/configs/rk3308_defconfig
index b93cba6549..5be3f455a3 100644
--- a/configs/rk3308_defconfig
+++ b/configs/rk3308_defconfig
@@ -33,6 +33,7 @@ CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_LED is not set
 # CONFIG_CMD_MISC is not set
 CONFIG_CMD_PMIC=y
 # CONFIG_DOS_PARTITION is not set
@@ -48,6 +49,8 @@ CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y
 CONFIG_RK8XX_PWRKEY=y
 CONFIG_ADC_KEY=y
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PHY=y

commit 19066e99322ef4804b976438e16459c7ace9228c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Feb 13 16:29:00 2019 +0800

    led: led_gpio: add "default-state" apply
    
    It follows kernel led gpio initialization.
    
    Change-Id: I8c4af429f03bd373e76cd0607306950a2dce33de
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/led/led_gpio.c b/drivers/led/led_gpio.c
index 9976635887..56702a1417 100644
--- a/drivers/led/led_gpio.c
+++ b/drivers/led/led_gpio.c
@@ -60,11 +60,29 @@ static int led_gpio_probe(struct udevice *dev)
 {
 	struct led_uc_plat *uc_plat = dev_get_uclass_platdata(dev);
 	struct led_gpio_priv *priv = dev_get_priv(dev);
+	const char *state;
+	int ret;
 
 	/* Ignore the top-level LED node */
 	if (!uc_plat->label)
 		return 0;
-	return gpio_request_by_name(dev, "gpios", 0, &priv->gpio, GPIOD_IS_OUT);
+
+	ret = gpio_request_by_name(dev, "gpios", 0, &priv->gpio, GPIOD_IS_OUT);
+	if (ret) {
+		printf("Failed to request gpios of led '%s'\n", uc_plat->label);
+		return ret;
+	}
+
+	/* Apply default state */
+	state = dev_read_prop(dev, "default-state", NULL);
+	if (state) {
+		if (!strcmp(state, "on"))
+			ret = gpio_led_set_state(dev, LEDST_ON);
+		else if (!strcmp(state, "off"))
+			ret = gpio_led_set_state(dev, LEDST_OFF);
+	}
+
+	return ret;
 }
 
 static int led_gpio_remove(struct udevice *dev)

commit b3b8e4f06e650129e89736bf5fd63d77c543d687
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Fri Dec 7 17:42:40 2018 +0800

    drivers: rk_nand: support SKHynix 14nm 2D 16GB Nand Flash
    
    support SKHynix 14nm 2D 16GB NAND FLASH H27TDG8T2D8R.
    
    Change-Id: I60bb7aa145d2c6c6be90e91a8288300eacaeabb1
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/drivers/rknand/rk_ftl_arm_v7.S b/drivers/rknand/rk_ftl_arm_v7.S
index b16e02e93b..ff3d230ed4 100644
--- a/drivers/rknand/rk_ftl_arm_v7.S
+++ b/drivers/rknand/rk_ftl_arm_v7.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2018-09-5
+ * date: 2019-01-07
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -179,6 +179,38 @@ FlashSetRandomizer:
 	.word	.LANCHOR5
 	.word	.LANCHOR6
 	.size	FlashSetRandomizer, .-FlashSetRandomizer
+	.section	.text.FlashBlockAlignInit,"ax",%progbits
+	.align	1
+	.global	FlashBlockAlignInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashBlockAlignInit, %function
+FlashBlockAlignInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	cmp	r0, #256
+	ldr	r3, .L44
+	bls	.L40
+	mov	r2, #512
+.L43:
+	str	r2, [r3]
+	bx	lr
+.L40:
+	cmp	r0, #128
+	bhi	.L42
+	str	r0, [r3]
+	bx	lr
+.L42:
+	mov	r2, #256
+	b	.L43
+.L45:
+	.align	2
+.L44:
+	.word	.LANCHOR3
+	.size	FlashBlockAlignInit, .-FlashBlockAlignInit
 	.section	.text.FlashReadCmd,"ax",%progbits
 	.align	1
 	.global	FlashReadCmd
@@ -193,7 +225,7 @@ FlashReadCmd:
 	@ link register save eliminated.
 	push	{r4, r5}
 	lsrs	r2, r1, #16
-	ldr	r4, .L40
+	ldr	r4, .L47
 	ldr	r3, [r4, r0, lsl #3]
 	add	r4, r4, r0, lsl #3
 	ldrb	r4, [r4, #4]	@ zero_extendqisi2
@@ -211,9 +243,9 @@ FlashReadCmd:
 	str	r2, [r3, #2056]
 	pop	{r4, r5}
 	b	FlashSetRandomizer
-.L41:
+.L48:
 	.align	2
-.L40:
+.L47:
 	.word	.LANCHOR6
 	.size	FlashReadCmd, .-FlashReadCmd
 	.section	.text.FlashReadDpDataOutCmd,"ax",%progbits
@@ -228,10 +260,10 @@ FlashReadDpDataOutCmd:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L46
+	ldr	r2, .L53
 	push	{r4, r5, r6}
 	uxtb	r6, r1
-	ldr	r4, .L46+4
+	ldr	r4, .L53+4
 	lsrs	r5, r1, #8
 	ldr	r3, [r2, r0, lsl #3]
 	add	r2, r2, r0, lsl #3
@@ -241,7 +273,7 @@ FlashReadDpDataOutCmd:
 	lsr	r4, r1, #16
 	lsl	r2, r2, #8
 	add	r3, r3, r2
-	bne	.L43
+	bne	.L50
 	movs	r2, #6
 	str	r2, [r3, #2056]
 	movs	r2, #0
@@ -250,12 +282,12 @@ FlashReadDpDataOutCmd:
 	str	r6, [r3, #2052]
 	str	r5, [r3, #2052]
 	str	r4, [r3, #2052]
-.L45:
+.L52:
 	movs	r2, #224
 	str	r2, [r3, #2056]
 	pop	{r4, r5, r6}
 	b	FlashSetRandomizer
-.L43:
+.L50:
 	movs	r2, #0
 	str	r2, [r3, #2056]
 	str	r2, [r3, #2052]
@@ -267,73 +299,13 @@ FlashReadDpDataOutCmd:
 	str	r4, [r3, #2056]
 	str	r2, [r3, #2052]
 	str	r2, [r3, #2052]
-	b	.L45
-.L47:
-	.align	2
-.L46:
-	.word	.LANCHOR6
-	.word	.LANCHOR7
-	.size	FlashReadDpDataOutCmd, .-FlashReadDpDataOutCmd
-	.section	.text.flash_enter_slc_mode,"ax",%progbits
-	.align	1
-	.global	flash_enter_slc_mode
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	flash_enter_slc_mode, %function
-flash_enter_slc_mode:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L53
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L48
-	ldr	r3, .L53+4
-	ldr	r2, [r3, r0, lsl #3]
-	add	r3, r3, r0, lsl #3
-	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-	add	r3, r2, r3, lsl #8
-	movs	r2, #218
-	str	r2, [r3, #2056]
-.L48:
-	bx	lr
+	b	.L52
 .L54:
 	.align	2
 .L53:
-	.word	.LANCHOR8
-	.word	.LANCHOR6
-	.size	flash_enter_slc_mode, .-flash_enter_slc_mode
-	.section	.text.flash_exit_slc_mode,"ax",%progbits
-	.align	1
-	.global	flash_exit_slc_mode
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	flash_exit_slc_mode, %function
-flash_exit_slc_mode:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L60
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L55
-	ldr	r3, .L60+4
-	ldr	r2, [r3, r0, lsl #3]
-	add	r3, r3, r0, lsl #3
-	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-	add	r3, r2, r3, lsl #8
-	movs	r2, #223
-	str	r2, [r3, #2056]
-.L55:
-	bx	lr
-.L61:
-	.align	2
-.L60:
-	.word	.LANCHOR8
 	.word	.LANCHOR6
-	.size	flash_exit_slc_mode, .-flash_exit_slc_mode
+	.word	.LANCHOR7
+	.size	FlashReadDpDataOutCmd, .-FlashReadDpDataOutCmd
 	.section	.text.FlashProgFirstCmd,"ax",%progbits
 	.align	1
 	.global	FlashProgFirstCmd
@@ -348,7 +320,7 @@ FlashProgFirstCmd:
 	@ link register save eliminated.
 	push	{r4, r5}
 	lsrs	r2, r1, #16
-	ldr	r4, .L63
+	ldr	r4, .L56
 	ldr	r3, [r4, r0, lsl #3]
 	add	r4, r4, r0, lsl #3
 	ldrb	r4, [r4, #4]	@ zero_extendqisi2
@@ -365,9 +337,9 @@ FlashProgFirstCmd:
 	str	r2, [r3, #2052]
 	pop	{r4, r5}
 	b	FlashSetRandomizer
-.L64:
+.L57:
 	.align	2
-.L63:
+.L56:
 	.word	.LANCHOR6
 	.size	FlashProgFirstCmd, .-FlashProgFirstCmd
 	.section	.text.FlashEraseCmd,"ax",%progbits
@@ -382,12 +354,12 @@ FlashEraseCmd:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
-	ldr	r4, .L70
+	ldr	r4, .L63
 	ldr	r3, [r4, r0, lsl #3]
 	add	r4, r4, r0, lsl #3
 	ldrb	r0, [r4, #4]	@ zero_extendqisi2
 	lsls	r0, r0, #8
-	cbz	r2, .L66
+	cbz	r2, .L59
 	adds	r2, r3, r0
 	movs	r4, #96
 	str	r4, [r2, #2056]
@@ -397,10 +369,10 @@ FlashEraseCmd:
 	str	r4, [r2, #2052]
 	lsrs	r4, r1, #16
 	str	r4, [r2, #2052]
-	ldr	r2, .L70+4
+	ldr	r2, .L63+4
 	ldr	r2, [r2]
 	add	r1, r1, r2
-.L66:
+.L59:
 	add	r3, r3, r0
 	movs	r2, #96
 	str	r2, [r3, #2056]
@@ -413,9 +385,9 @@ FlashEraseCmd:
 	str	r1, [r3, #2052]
 	str	r2, [r3, #2056]
 	pop	{r4, pc}
-.L71:
+.L64:
 	.align	2
-.L70:
+.L63:
 	.word	.LANCHOR6
 	.word	.LANCHOR3
 	.size	FlashEraseCmd, .-FlashEraseCmd
@@ -433,11 +405,11 @@ FlashProgDpSecondCmd:
 	@ link register save eliminated.
 	push	{r4, r5}
 	lsrs	r2, r1, #16
-	ldr	r4, .L73
+	ldr	r4, .L66
 	ldr	r3, [r4, r0, lsl #3]
 	add	r4, r4, r0, lsl #3
 	ldrb	r5, [r4, #4]	@ zero_extendqisi2
-	ldr	r4, .L73+4
+	ldr	r4, .L66+4
 	ldrb	r4, [r4, #11]	@ zero_extendqisi2
 	add	r3, r3, r5, lsl #8
 	str	r4, [r3, #2056]
@@ -451,9 +423,9 @@ FlashProgDpSecondCmd:
 	str	r2, [r3, #2052]
 	pop	{r4, r5}
 	b	FlashSetRandomizer
-.L74:
+.L67:
 	.align	2
-.L73:
+.L66:
 	.word	.LANCHOR6
 	.word	.LANCHOR7
 	.size	FlashProgDpSecondCmd, .-FlashProgDpSecondCmd
@@ -469,7 +441,7 @@ FlashProgSecondCmd:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L76
+	ldr	r3, .L69
 	ldr	r2, [r3, r0, lsl #3]
 	add	r3, r3, r0, lsl #3
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
@@ -477,9 +449,9 @@ FlashProgSecondCmd:
 	movs	r2, #16
 	str	r2, [r3, #2056]
 	bx	lr
-.L77:
+.L70:
 	.align	2
-.L76:
+.L69:
 	.word	.LANCHOR6
 	.size	FlashProgSecondCmd, .-FlashProgSecondCmd
 	.section	.text.FlashProgDpFirstCmd,"ax",%progbits
@@ -494,8 +466,8 @@ FlashProgDpFirstCmd:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L79
-	ldr	r1, .L79+4
+	ldr	r3, .L72
+	ldr	r1, .L72+4
 	ldr	r2, [r3, r0, lsl #3]
 	add	r3, r3, r0, lsl #3
 	ldrb	r1, [r1, #10]	@ zero_extendqisi2
@@ -503,9 +475,9 @@ FlashProgDpFirstCmd:
 	add	r3, r2, r3, lsl #8
 	str	r1, [r3, #2056]
 	bx	lr
-.L80:
+.L73:
 	.align	2
-.L79:
+.L72:
 	.word	.LANCHOR6
 	.word	.LANCHOR7
 	.size	FlashProgDpFirstCmd, .-FlashProgDpFirstCmd
@@ -522,7 +494,7 @@ FlashReadStatus:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r2, #112
-	ldr	r3, .L82
+	ldr	r3, .L75
 	ldr	r5, [r3, r0, lsl #3]
 	add	r3, r3, r0, lsl #3
 	movs	r0, #80
@@ -534,42 +506,42 @@ FlashReadStatus:
 	bl	udelay
 	ldr	r0, [r5, r4]
 	pop	{r3, r4, r5, pc}
-.L83:
+.L76:
 	.align	2
-.L82:
+.L75:
 	.word	.LANCHOR6
 	.size	FlashReadStatus, .-FlashReadStatus
-	.section	.text.JSHash,"ax",%progbits
+	.section	.text.js_hash,"ax",%progbits
 	.align	1
-	.global	JSHash
+	.global	js_hash
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	JSHash, %function
-JSHash:
+	.type	js_hash, %function
+js_hash:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L87
+	ldr	r3, .L80
 	add	r1, r1, r0
 	push	{r4, lr}
-.L85:
+.L78:
 	cmp	r0, r1
-	bne	.L86
+	bne	.L79
 	mov	r0, r3
 	pop	{r4, pc}
-.L86:
+.L79:
 	lsrs	r2, r3, #2
 	ldrb	r4, [r0], #1	@ zero_extendqisi2
 	add	r2, r2, r3, lsl #5
 	add	r2, r2, r4
 	eors	r3, r3, r2
-	b	.L85
-.L88:
+	b	.L78
+.L81:
 	.align	2
-.L87:
+.L80:
 	.word	1204201446
-	.size	JSHash, .-JSHash
+	.size	js_hash, .-js_hash
 	.section	.text.FlashLoadIdbInfo,"ax",%progbits
 	.align	1
 	.global	FlashLoadIdbInfo
@@ -612,54 +584,54 @@ ToshibaSetRRPara:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
 	add	r7, r1, r1, lsl #2
-	ldr	r10, .L99+12
+	ldr	r10, .L92+12
 	mov	r5, r0
 	mov	r6, r1
 	movs	r4, #0
-	ldr	r8, .L99+16
-.L92:
+	ldr	r8, .L92+16
+.L85:
 	ldrb	r3, [r10]	@ zero_extendqisi2
 	cmp	r4, r3
-	bcc	.L96
+	bcc	.L89
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L96:
+.L89:
 	movs	r3, #85
 	movs	r0, #200
 	str	r3, [r5, #8]
 	ldrsb	r3, [r4, r8]
 	str	r3, [r5, #4]
 	bl	udelay
-	ldr	r3, .L99
+	ldr	r3, .L92
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #34
-	bne	.L93
+	bne	.L86
 	adds	r3, r4, r7
 	add	r3, r3, r8
-.L98:
+.L91:
 	ldrsb	r3, [r3, #5]
-.L97:
+.L90:
 	str	r3, [r5]
 	adds	r4, r4, #1
-	b	.L92
-.L93:
+	b	.L85
+.L86:
 	cmp	r3, #35
-	bne	.L95
-	ldr	r3, .L99+4
+	bne	.L88
+	ldr	r3, .L92+4
 	adds	r2, r4, r7
 	add	r3, r3, r2
-	b	.L98
-.L95:
-	ldr	r3, .L99+8
+	b	.L91
+.L88:
+	ldr	r3, .L92+8
 	ldrsb	r3, [r3, r6]
-	b	.L97
-.L100:
+	b	.L90
+.L93:
 	.align	2
-.L99:
+.L92:
+	.word	.LANCHOR9
 	.word	.LANCHOR10
 	.word	.LANCHOR11
 	.word	.LANCHOR12
-	.word	.LANCHOR13
-	.word	.LANCHOR9
+	.word	.LANCHOR8
 	.size	ToshibaSetRRPara, .-ToshibaSetRRPara
 	.section	.text.SamsungSetRRPara,"ax",%progbits
 	.align	1
@@ -674,18 +646,18 @@ SamsungSetRRPara:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
 	mov	r6, r0
-	ldr	r7, .L104
+	ldr	r7, .L97
 	movs	r4, #0
 	mov	r10, #161
-	ldr	r8, .L104+4
+	ldr	r8, .L97+4
 	add	r1, r7, r1, lsl #2
 	adds	r5, r1, #3
-.L102:
+.L95:
 	ldrb	r3, [r8]	@ zero_extendqisi2
 	cmp	r4, r3
-	bcc	.L103
+	bcc	.L96
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L103:
+.L96:
 	movs	r3, #0
 	str	r10, [r6, #8]
 	str	r3, [r6]
@@ -696,12 +668,12 @@ SamsungSetRRPara:
 	ldrsb	r3, [r5, #1]!
 	str	r3, [r6]
 	bl	udelay
-	b	.L102
-.L105:
+	b	.L95
+.L98:
 	.align	2
-.L104:
-	.word	.LANCHOR14
+.L97:
 	.word	.LANCHOR13
+	.word	.LANCHOR12
 	.size	SamsungSetRRPara, .-SamsungSetRRPara
 	.global	__aeabi_uidiv
 	.global	__aeabi_uidivmod
@@ -718,17 +690,17 @@ LogAddr2PhyAddr:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r6, r3
-	ldr	r3, .L111
+	ldr	r3, .L104
 	mov	r8, r1
 	mov	r7, r2
 	mov	r5, r0
 	ldrh	r4, [r3, #14]
 	ldrh	r3, [r3, #12]
 	smulbb	r4, r4, r3
-	ldr	r3, .L111+4
+	ldr	r3, .L104+4
 	ldrh	fp, [r3]
 	uxth	r4, r4
-	ldr	r3, .L111+8
+	ldr	r3, .L104+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #1
 	ldr	r3, [r0, #4]
@@ -751,14 +723,14 @@ LogAddr2PhyAddr:
 	cmp	r8, #1
 	uxth	r1, r1
 	ubfx	r3, r3, #0, #10
-	bne	.L108
-	ldr	r2, .L111+12
+	bne	.L101
+	ldr	r2, .L104+12
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbnz	r2, .L108
-	ldr	r2, .L111+16
+	cbnz	r2, .L101
+	ldr	r2, .L104+16
 	ldrh	r3, [r2, r3, lsl #1]
-.L108:
-	ldr	r2, .L111+20
+.L101:
+	ldr	r2, .L104+20
 	ldr	r2, [r2, r10, lsl #2]
 	mla	r1, fp, r1, r2
 	add	r1, r1, r3
@@ -766,27 +738,27 @@ LogAddr2PhyAddr:
 	str	r1, [r7]
 	str	r10, [r6]
 	cmp	r3, #1
-	bls	.L110
+	bls	.L103
 	ldr	r0, [r5, #4]
 	ldr	r3, [r5, #40]
 	add	r0, r0, #1024
 	subs	r3, r0, r3
 	rsbs	r0, r3, #0
 	adcs	r0, r0, r3
-.L109:
+.L102:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L110:
+.L103:
 	movs	r0, #0
-	b	.L109
-.L112:
+	b	.L102
+.L105:
 	.align	2
-.L111:
-	.word	.LANCHOR15
+.L104:
+	.word	.LANCHOR14
 	.word	.LANCHOR3
 	.word	.LANCHOR1
-	.word	.LANCHOR8
+	.word	.LANCHOR15
 	.word	.LANCHOR16
 	.word	.LANCHOR17
 	.size	LogAddr2PhyAddr, .-LogAddr2PhyAddr
@@ -801,56 +773,56 @@ LogAddr2PhyAddr:
 FlashReadStatusEN:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L125
+	ldr	r3, .L118
 	push	{r4, r5, r6, lr}
 	ldr	r5, [r3, r0, lsl #3]
 	add	r3, r3, r0, lsl #3
 	ldrb	r4, [r3, #4]	@ zero_extendqisi2
-	ldr	r3, .L125+4
+	ldr	r3, .L118+4
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #8]	@ zero_extendqisi2
 	cmp	r3, #2
 	lsl	r3, r4, #8
 	add	r4, r4, #8
-	bne	.L114
-	ldr	r0, .L125+8
-	cbnz	r2, .L115
+	bne	.L107
+	ldr	r0, .L118+8
+	cbnz	r2, .L108
 	ldrb	r2, [r0, #13]	@ zero_extendqisi2
-.L124:
+.L117:
 	add	r3, r3, r5
 	str	r2, [r3, #2056]
 	ldrb	r0, [r0, #15]	@ zero_extendqisi2
-	cbz	r0, .L119
+	cbz	r0, .L112
 	add	r6, r5, r4, lsl #8
 	movs	r2, #0
-.L118:
+.L111:
 	cmp	r2, r0
-	bcc	.L120
-.L119:
+	bcc	.L113
+.L112:
 	lsls	r4, r4, #8
 	movs	r0, #80
 	bl	udelay
 	ldr	r0, [r5, r4]
 	uxtb	r0, r0
 	pop	{r4, r5, r6, pc}
-.L115:
+.L108:
 	ldrb	r2, [r0, #14]	@ zero_extendqisi2
-	b	.L124
-.L120:
+	b	.L117
+.L113:
 	lsls	r3, r2, #3
 	adds	r2, r2, #1
 	lsr	r3, r1, r3
 	uxtb	r3, r3
 	str	r3, [r6, #4]
-	b	.L118
-.L114:
+	b	.L111
+.L107:
 	add	r3, r3, r5
 	movs	r2, #112
 	str	r2, [r3, #2056]
-	b	.L119
-.L126:
+	b	.L112
+.L119:
 	.align	2
-.L125:
+.L118:
 	.word	.LANCHOR6
 	.word	.LANCHOR18
 	.word	.LANCHOR7
@@ -870,16 +842,16 @@ FlashWaitReadyEN:
 	mov	r4, r0
 	mov	r5, r1
 	mov	r6, r2
-.L131:
+.L124:
 	mov	r2, r6
 	mov	r1, r5
 	mov	r0, r4
 	bl	FlashReadStatusEN
 	cmp	r0, #255
 	mov	r3, r0
-	beq	.L131
+	beq	.L124
 	lsls	r3, r3, #25
-	bpl	.L131
+	bpl	.L124
 	pop	{r4, r5, r6, pc}
 	.size	FlashWaitReadyEN, .-FlashWaitReadyEN
 	.section	.text.NandcReadDontCaseBusyEn,"ax",%progbits
@@ -908,16 +880,16 @@ NandcGetChipIf:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L136
+	ldr	r2, .L129
 	add	r3, r2, r0, lsl #3
 	ldr	r0, [r2, r0, lsl #3]
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	add	r0, r0, r3, lsl #8
 	bx	lr
-.L137:
+.L130:
 	.align	2
-.L136:
+.L129:
 	.word	.LANCHOR6
 	.size	NandcGetChipIf, .-NandcGetChipIf
 	.section	.text.NandcSetDdrPara,"ax",%progbits
@@ -932,16 +904,16 @@ NandcSetDdrPara:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L139
+	ldr	r3, .L132
 	ldr	r2, [r3]
 	lsls	r3, r0, #8
 	orr	r0, r3, r0, lsl #16
 	orr	r0, r0, #1
 	str	r0, [r2, #304]
 	bx	lr
-.L140:
+.L133:
 	.align	2
-.L139:
+.L132:
 	.word	.LANCHOR19
 	.size	NandcSetDdrPara, .-NandcSetDdrPara
 	.section	.text.NandcSetDdrDiv,"ax",%progbits
@@ -956,14 +928,14 @@ NandcSetDdrDiv:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L142
+	ldr	r3, .L135
 	orr	r0, r0, #16640
 	ldr	r3, [r3]
 	str	r0, [r3, #344]
 	bx	lr
-.L143:
+.L136:
 	.align	2
-.L142:
+.L135:
 	.word	.LANCHOR19
 	.size	NandcSetDdrDiv, .-NandcSetDdrDiv
 	.section	.text.NandcSetDdrMode,"ax",%progbits
@@ -978,20 +950,20 @@ NandcSetDdrMode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L147
+	ldr	r3, .L140
 	ldr	r2, [r3]
 	ldr	r3, [r2]
-	cbnz	r0, .L145
+	cbnz	r0, .L138
 	bfi	r3, r0, #13, #1
-.L146:
+.L139:
 	str	r3, [r2]
 	bx	lr
-.L145:
+.L138:
 	orr	r3, r3, #253952
-	b	.L146
-.L148:
+	b	.L139
+.L141:
 	.align	2
-.L147:
+.L140:
 	.word	.LANCHOR19
 	.size	NandcSetDdrMode, .-NandcSetDdrMode
 	.section	.text.NandcSetMode,"ax",%progbits
@@ -1006,16 +978,16 @@ NandcSetMode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L156
+	ldr	r3, .L149
 	ands	r1, r0, #6
 	ldr	r2, [r3]
 	ldr	r3, [r2]
-	beq	.L150
+	beq	.L143
 	lsls	r1, r0, #29
 	movw	r1, #16641
 	str	r1, [r2, #344]
 	orr	r3, r3, #24576
-	ldr	r1, .L156+4
+	ldr	r1, .L149+4
 	bfc	r3, #15, #1
 	orr	r3, r3, #196608
 	it	mi
@@ -1025,16 +997,16 @@ NandcSetMode:
 	str	r1, [r2, #308]
 	movs	r1, #39
 	str	r1, [r2, #308]
-.L152:
+.L145:
 	str	r3, [r2]
 	movs	r0, #0
 	bx	lr
-.L150:
+.L143:
 	bfi	r3, r1, #13, #1
-	b	.L152
-.L157:
+	b	.L145
+.L150:
 	.align	2
-.L156:
+.L149:
 	.word	.LANCHOR19
 	.word	1710595
 	.size	NandcSetMode, .-NandcSetMode
@@ -1050,7 +1022,7 @@ NandcFlashCs:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L159
+	ldr	r3, .L152
 	movs	r2, #1
 	ldr	r1, [r3, r0, lsl #3]
 	add	r0, r3, r0, lsl #3
@@ -1060,9 +1032,9 @@ NandcFlashCs:
 	bfi	r3, r2, #0, #8
 	str	r3, [r1]
 	bx	lr
-.L160:
+.L153:
 	.align	2
-.L159:
+.L152:
 	.word	.LANCHOR6
 	.size	NandcFlashCs, .-NandcFlashCs
 	.section	.text.NandcFlashDeCs,"ax",%progbits
@@ -1077,16 +1049,16 @@ NandcFlashDeCs:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L162
+	ldr	r3, .L155
 	ldr	r2, [r3, r0, lsl #3]
 	ldr	r3, [r2]
 	bfc	r3, #0, #8
 	bfc	r3, #17, #1
 	str	r3, [r2]
 	bx	lr
-.L163:
+.L156:
 	.align	2
-.L162:
+.L155:
 	.word	.LANCHOR6
 	.size	NandcFlashDeCs, .-NandcFlashDeCs
 	.section	.text.HynixSetRRPara,"ax",%progbits
@@ -1101,27 +1073,28 @@ HynixSetRRPara:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r7, r3
-	ldr	r3, .L171
+	mov	r6, r3
+	ldr	r3, .L166
 	mov	r5, r0
-	mov	r6, r1
+	mov	r7, r1
 	mov	r10, r2
-	ldr	r4, .L171+4
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	cmp	r3, #6
-	bne	.L165
-	movs	r3, #20
-	add	r3, r3, r0, lsl #6
-	add	r3, r3, r7, lsl #2
-.L170:
+	bne	.L158
+	movs	r4, #20
+	add	r4, r4, r0, lsl #6
+	add	r3, r4, r6, lsl #2
+.L164:
+	ldr	r4, .L166+4
+.L165:
 	add	r4, r4, r3
-.L166:
-	ldr	r3, .L171+8
+.L159:
+	ldr	r3, .L166+8
 	mov	r0, r5
-	subs	r6, r6, #1
+	subs	r7, r7, #1
 	subs	r4, r4, #1
-	add	r6, r6, r10
+	add	r7, r7, r10
 	ldr	r8, [r3, r5, lsl #3]
 	add	r3, r3, r5, lsl #3
 	ldrb	fp, [r3, #4]	@ zero_extendqisi2
@@ -1132,35 +1105,42 @@ HynixSetRRPara:
 	str	r3, [r0, #2056]
 	add	r3, r10, #-1
 	mov	r10, r0
-.L168:
-	cmp	r3, r6
-	bne	.L169
+.L162:
+	cmp	r3, r7
+	bne	.L163
 	movs	r3, #22
 	add	r8, r8, fp
 	str	r3, [r8, #2056]
 	mov	r0, r5
 	bl	NandcFlashDeCs
-	ldr	r3, .L171+12
-	strb	r7, [r3, r5]
+	ldr	r3, .L166+12
+	strb	r6, [r3, r5]
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L165:
+.L158:
 	cmp	r3, #7
-	bne	.L167
+	bne	.L160
+	movs	r4, #28
 	movs	r3, #160
-	movs	r2, #28
-	smlabb	r2, r3, r0, r2
-	movs	r3, #10
-	smlabb	r3, r3, r7, r2
-	b	.L170
-.L167:
-	adds	r3, r7, #2
-	add	r3, r3, r0, lsl #3
+	smlabb	r3, r3, r0, r4
+	movs	r4, #10
+	smlabb	r3, r4, r6, r3
+	b	.L164
+.L160:
+	cmp	r3, #8
+	bne	.L161
+	add	r4, r6, r6, lsl #2
+	ldr	r3, .L166+16
+	b	.L165
+.L161:
+	adds	r4, r6, #2
+	add	r3, r4, r0, lsl #3
+	ldr	r4, .L166+4
 	add	r4, r4, r3, lsl #3
 	adds	r4, r4, #4
-	b	.L166
-.L169:
+	b	.L159
+.L163:
 	ldrb	r2, [r3, #1]!	@ zero_extendqisi2
 	movs	r0, #200
 	str	r2, [r10, #2052]
@@ -1169,14 +1149,15 @@ HynixSetRRPara:
 	ldrsb	r2, [r4, #1]!
 	ldr	r3, [sp, #4]
 	str	r2, [r10, #2048]
-	b	.L168
-.L172:
+	b	.L162
+.L167:
 	.align	2
-.L171:
+.L166:
 	.word	.LANCHOR18
 	.word	.LANCHOR20
 	.word	.LANCHOR6
 	.word	.LANCHOR21
+	.word	.LANCHOR20+28
 	.size	HynixSetRRPara, .-HynixSetRRPara
 	.section	.text.FlashSetReadRetryDefault,"ax",%progbits
 	.align	1
@@ -1189,35 +1170,35 @@ HynixSetRRPara:
 FlashSetReadRetryDefault:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L179
+	ldr	r3, .L174
 	push	{r4, r5, r6, lr}
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r3, #1
-	cmp	r3, #6
-	bhi	.L173
-	ldr	r5, .L179+4
+	cmp	r3, #7
+	bhi	.L168
+	ldr	r5, .L174+4
 	movs	r4, #0
 	adds	r6, r5, #4
-.L176:
-	ldr	r3, .L179+8
+.L171:
+	ldr	r3, .L174+8
 	uxtb	r0, r4
 	ldrb	r3, [r3, r4, lsl #3]	@ zero_extendqisi2
 	cmp	r3, #173
-	bne	.L175
+	bne	.L170
 	movs	r3, #0
 	mov	r2, r6
 	ldrb	r1, [r5, #1]	@ zero_extendqisi2
 	bl	HynixSetRRPara
-.L175:
+.L170:
 	adds	r4, r4, #1
 	cmp	r4, #4
-	bne	.L176
-.L173:
+	bne	.L171
+.L168:
 	pop	{r4, r5, r6, pc}
-.L180:
+.L175:
 	.align	2
-.L179:
+.L174:
 	.word	.LANCHOR18
 	.word	.LANCHOR20
 	.word	.LANCHOR22
@@ -1233,17 +1214,17 @@ FlashSetReadRetryDefault:
 FlashWaitCmdDone:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L188
+	ldr	r2, .L183
 	lsls	r3, r0, #4
 	push	{r4, r5, r6, lr}
 	mov	r6, r0
 	adds	r4, r2, r3
 	ldr	r1, [r4, #8]
-	cbz	r1, .L183
+	cbz	r1, .L178
 	ldrb	r5, [r2, r3]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	NandcFlashCs
-	ldr	r3, .L188+4
+	ldr	r3, .L183+4
 	mov	r0, r5
 	ldr	r1, [r4, #4]
 	ldr	r2, [r3, r6, lsl #2]
@@ -1260,15 +1241,15 @@ FlashWaitCmdDone:
 	str	r1, [r3]
 	movs	r3, #0
 	str	r3, [r4, #8]
-	cbz	r2, .L183
+	cbz	r2, .L178
 	str	r1, [r2]
 	str	r3, [r4, #12]
-.L183:
+.L178:
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L189:
+.L184:
 	.align	2
-.L188:
+.L183:
 	.word	.LANCHOR23
 	.word	.LANCHOR17
 	.size	FlashWaitCmdDone, .-FlashWaitCmdDone
@@ -1288,6 +1269,45 @@ NandcDelayns:
 	movs	r0, #0
 	pop	{r3, pc}
 	.size	NandcDelayns, .-NandcDelayns
+	.section	.text.NandcWaitFlashReadyNoDelay,"ax",%progbits
+	.align	1
+	.global	NandcWaitFlashReadyNoDelay
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	NandcWaitFlashReadyNoDelay, %function
+NandcWaitFlashReadyNoDelay:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L191
+	push	{r0, r1, r2, r4, r5, lr}
+	ldr	r4, .L191+4
+	ldr	r5, [r3, r0, lsl #3]
+.L188:
+	ldr	r3, [r5]
+	str	r3, [sp, #4]
+	ldr	r3, [sp, #4]
+	lsls	r3, r3, #22
+	bmi	.L189
+	movs	r0, #10
+	bl	udelay
+	subs	r4, r4, #1
+	bne	.L188
+	mov	r0, #-1
+.L186:
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, pc}
+.L189:
+	movs	r0, #0
+	b	.L186
+.L192:
+	.align	2
+.L191:
+	.word	.LANCHOR6
+	.word	100000
+	.size	NandcWaitFlashReadyNoDelay, .-NandcWaitFlashReadyNoDelay
 	.section	.text.NandcWaitFlashReady,"ax",%progbits
 	.align	1
 	.global	NandcWaitFlashReady
@@ -1299,31 +1319,33 @@ NandcDelayns:
 NandcWaitFlashReady:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L196
 	push	{r0, r1, r2, r4, r5, lr}
-	ldr	r4, .L196+4
+	ldr	r3, .L198
+	ldr	r4, .L198+4
 	ldr	r5, [r3, r0, lsl #3]
-.L193:
-	movs	r0, #100
+	movs	r0, #150
 	bl	udelay
+.L195:
 	ldr	r3, [r5]
 	str	r3, [sp, #4]
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #22
-	bmi	.L194
+	bmi	.L196
+	movs	r0, #10
+	bl	udelay
 	subs	r4, r4, #1
-	bne	.L193
+	bne	.L195
 	mov	r0, #-1
-.L191:
+.L193:
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, pc}
-.L194:
+.L196:
 	movs	r0, #0
-	b	.L191
-.L197:
+	b	.L193
+.L199:
 	.align	2
-.L196:
+.L198:
 	.word	.LANCHOR6
 	.word	100000
 	.size	NandcWaitFlashReady, .-NandcWaitFlashReady
@@ -1338,7 +1360,7 @@ NandcWaitFlashReady:
 FlashReset:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L199
+	ldr	r3, .L201
 	push	{r4, r5, r6, lr}
 	mov	r4, r0
 	ldr	r5, [r3, r0, lsl #3]
@@ -1353,26 +1375,129 @@ FlashReset:
 	mov	r0, r4
 	pop	{r4, r5, r6, lr}
 	b	NandcFlashDeCs
-.L200:
+.L202:
 	.align	2
-.L199:
+.L201:
 	.word	.LANCHOR6
 	.size	FlashReset, .-FlashReset
-	.section	.text.FlashEraseBlock,"ax",%progbits
+	.section	.text.flash_enter_slc_mode,"ax",%progbits
 	.align	1
-	.global	FlashEraseBlock
+	.global	flash_enter_slc_mode
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashEraseBlock, %function
-FlashEraseBlock:
+	.type	flash_enter_slc_mode, %function
+flash_enter_slc_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, lr}
-	mov	r4, r0
-	mov	r5, r1
-	mov	r6, r2
+	push	{r3, r4, r5, lr}
+	mov	r5, r0
+	ldr	r3, .L205
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L203
+	bl	NandcFlashCs
+	ldr	r3, .L205+4
+	movs	r0, #100
+	ldr	r4, [r3, r5, lsl #3]
+	add	r3, r3, r5, lsl #3
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+	add	r4, r4, r3, lsl #8
+	movs	r3, #239
+	str	r3, [r4, #2056]
+	movs	r3, #145
+	str	r3, [r4, #2052]
+	bl	udelay
+	movs	r3, #0
+	movs	r2, #1
+	str	r3, [r4, #2048]
+	movs	r0, #100
+	str	r2, [r4, #2048]
+	str	r3, [r4, #2048]
+	str	r3, [r4, #2048]
+	bl	udelay
+	mov	r0, r5
+	bl	NandcWaitFlashReadyNoDelay
+	movs	r3, #218
+	mov	r0, r5
+	str	r3, [r4, #2056]
+	pop	{r3, r4, r5, lr}
+	b	NandcWaitFlashReady
+.L203:
+	pop	{r3, r4, r5, pc}
+.L206:
+	.align	2
+.L205:
+	.word	.LANCHOR15
+	.word	.LANCHOR6
+	.size	flash_enter_slc_mode, .-flash_enter_slc_mode
+	.section	.text.flash_exit_slc_mode,"ax",%progbits
+	.align	1
+	.global	flash_exit_slc_mode
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_exit_slc_mode, %function
+flash_exit_slc_mode:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	mov	r5, r0
+	ldr	r3, .L209
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L207
+	bl	NandcFlashCs
+	ldr	r3, .L209+4
+	movs	r0, #100
+	ldr	r4, [r3, r5, lsl #3]
+	add	r3, r3, r5, lsl #3
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+	add	r4, r4, r3, lsl #8
+	movs	r3, #239
+	str	r3, [r4, #2056]
+	movs	r3, #145
+	str	r3, [r4, #2052]
+	bl	udelay
+	movs	r3, #2
+	movs	r0, #100
+	str	r3, [r4, #2048]
+	movs	r3, #1
+	str	r3, [r4, #2048]
+	movs	r3, #0
+	str	r3, [r4, #2048]
+	str	r3, [r4, #2048]
+	bl	udelay
+	mov	r0, r5
+	bl	NandcWaitFlashReadyNoDelay
+	movs	r3, #223
+	mov	r0, r5
+	str	r3, [r4, #2056]
+	pop	{r3, r4, r5, lr}
+	b	NandcWaitFlashReady
+.L207:
+	pop	{r3, r4, r5, pc}
+.L210:
+	.align	2
+.L209:
+	.word	.LANCHOR15
+	.word	.LANCHOR6
+	.size	flash_exit_slc_mode, .-flash_exit_slc_mode
+	.section	.text.FlashEraseBlock,"ax",%progbits
+	.align	1
+	.global	FlashEraseBlock
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashEraseBlock, %function
+FlashEraseBlock:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	mov	r4, r0
+	mov	r5, r1
+	mov	r6, r2
 	bl	NandcWaitFlashReady
 	mov	r0, r4
 	bl	NandcFlashCs
@@ -1402,7 +1527,7 @@ FlashEraseBlock:
 FlashSetInterfaceMode:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L230
+	ldr	r3, .L240
 	mov	ip, #128
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r5, #0
@@ -1413,39 +1538,39 @@ FlashSetInterfaceMode:
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	and	r2, r3, #4
 	and	r3, r3, #1
-	str	r2, [sp]
+	str	r2, [sp, #4]
 	mov	r2, r5
-	str	r3, [sp, #4]
-.L212:
-	ldr	r3, .L230+4
+	str	r3, [sp]
+.L222:
+	ldr	r3, .L240+4
 	ldrb	r4, [r5, r3]	@ zero_extendqisi2
 	cmp	r4, #152
-	beq	.L203
+	beq	.L213
 	cmp	r4, #69
-	beq	.L203
+	beq	.L213
 	cmp	r4, #173
-	beq	.L203
+	beq	.L213
 	cmp	r4, #44
-	bne	.L204
-.L203:
-	ldr	r3, .L230+8
+	bne	.L214
+.L213:
+	ldr	r3, .L240+8
 	cmp	r0, #1
 	ldr	r1, [r5, r3]
 	add	r3, r3, r5
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-	bne	.L205
-	ldr	r6, [sp, #4]
-	cbz	r6, .L204
+	bne	.L215
+	ldr	r6, [sp]
+	cbz	r6, .L214
 	lsls	r3, r3, #8
 	cmp	r4, #173
 	add	fp, r1, r3
 	str	r7, [fp, #2056]
-	bne	.L206
+	bne	.L216
 	str	r0, [fp, #2052]
-.L229:
+.L239:
 	str	r2, [fp, #2048]
-	b	.L210
-.L206:
+	b	.L220
+.L216:
 	cmp	r4, #44
 	ittet	eq
 	moveq	r4, #5
@@ -1454,45 +1579,45 @@ FlashSetInterfaceMode:
 	streq	r4, [fp, #2048]
 	it	ne
 	strne	r0, [fp, #2048]
-.L210:
+.L220:
 	add	r3, r3, r1
 	str	r2, [r3, #2048]
 	str	r2, [r3, #2048]
 	str	r2, [r3, #2048]
-.L204:
+.L214:
 	adds	r5, r5, #8
 	cmp	r5, #32
-	bne	.L212
+	bne	.L222
 	movs	r0, #0
 	bl	NandcWaitFlashReady
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L205:
-	ldr	r6, [sp]
+.L215:
+	ldr	r6, [sp, #4]
 	cmp	r6, #0
-	beq	.L204
+	beq	.L214
 	lsls	r3, r3, #8
 	cmp	r4, #173
 	add	fp, r1, r3
 	str	r7, [fp, #2056]
-	bne	.L209
+	bne	.L219
 	str	lr, [fp, #2052]
 	str	r10, [fp, #2048]
-	b	.L210
-.L209:
+	b	.L220
+.L219:
 	cmp	r4, #44
-	bne	.L211
+	bne	.L221
 	str	lr, [fp, #2052]
 	str	r8, [fp, #2048]
-	b	.L210
-.L211:
+	b	.L220
+.L221:
 	str	ip, [fp, #2052]
-	b	.L229
-.L231:
+	b	.L239
+.L241:
 	.align	2
-.L230:
+.L240:
 	.word	.LANCHOR24
 	.word	.LANCHOR22
 	.word	.LANCHOR6
@@ -1517,21 +1642,21 @@ SandiskSetRRPara:
 	str	r3, [r0, #4]
 	movs	r0, #200
 	bl	udelay
-	ldr	r3, .L238
+	ldr	r3, .L248
 	add	r4, r4, r4, lsl #2
-	ldr	r6, .L238+4
+	ldr	r6, .L248+4
 	movs	r2, #0
-	ldr	r7, .L238+8
+	ldr	r7, .L248+8
 	ldrb	r1, [r3]	@ zero_extendqisi2
-	ldr	r3, .L238+12
+	ldr	r3, .L248+12
 	ldrb	r0, [r3]	@ zero_extendqisi2
-.L233:
+.L243:
 	cmp	r2, r1
-	bcc	.L236
+	bcc	.L246
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, lr}
 	b	NandcWaitFlashReady
-.L236:
+.L246:
 	adds	r3, r2, r4
 	cmp	r0, #67
 	ite	eq
@@ -1540,14 +1665,14 @@ SandiskSetRRPara:
 	ldrsb	r3, [r3, #5]
 	adds	r2, r2, #1
 	str	r3, [r5]
-	b	.L233
-.L239:
+	b	.L243
+.L249:
 	.align	2
-.L238:
-	.word	.LANCHOR13
-	.word	.LANCHOR11
-	.word	.LANCHOR9
+.L248:
+	.word	.LANCHOR12
 	.word	.LANCHOR10
+	.word	.LANCHOR8
+	.word	.LANCHOR9
 	.size	SandiskSetRRPara, .-SandiskSetRRPara
 	.section	.text.micron_auto_read_calibration_config,"ax",%progbits
 	.align	1
@@ -1564,7 +1689,7 @@ micron_auto_read_calibration_config:
 	mov	r5, r0
 	mov	r6, r1
 	bl	NandcWaitFlashReady
-	ldr	r0, .L241
+	ldr	r0, .L251
 	ldr	r4, [r0, r5, lsl #3]
 	add	r0, r0, r5, lsl #3
 	ldrb	r3, [r0, #4]	@ zero_extendqisi2
@@ -1581,9 +1706,9 @@ micron_auto_read_calibration_config:
 	str	r3, [r4, #2048]
 	str	r3, [r4, #2048]
 	pop	{r4, r5, r6, pc}
-.L242:
+.L252:
 	.align	2
-.L241:
+.L251:
 	.word	.LANCHOR6
 	.size	micron_auto_read_calibration_config, .-micron_auto_read_calibration_config
 	.section	.text.FlashEraseSLc2KBlocks,"ax",%progbits
@@ -1599,19 +1724,19 @@ FlashEraseSLc2KBlocks:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, lr}
 	mov	r7, r1
-	ldr	r8, .L253+12
+	ldr	r8, .L263+12
 	sub	sp, sp, #20
 	mov	r5, r0
 	movs	r6, #0
-	ldr	r10, .L253+16
-.L244:
+	ldr	r10, .L263+16
+.L254:
 	cmp	r6, r7
-	bne	.L249
+	bne	.L259
 	movs	r0, #0
 	add	sp, sp, #20
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L249:
+.L259:
 	subs	r3, r7, r6
 	add	r2, sp, #8
 	uxtb	r3, r3
@@ -1623,17 +1748,17 @@ FlashEraseSLc2KBlocks:
 	ldr	r3, [sp, #12]
 	ldrb	r2, [r8]	@ zero_extendqisi2
 	cmp	r2, r3
-	bhi	.L245
+	bhi	.L255
 	mov	r3, #-1
 	str	r3, [r5]
-.L246:
+.L256:
 	adds	r6, r6, #1
 	adds	r5, r5, #36
-	b	.L244
-.L245:
+	b	.L254
+.L255:
 	ldrb	r4, [r10, r3]	@ zero_extendqisi2
 	lsls	r3, r3, #4
-	ldr	r2, .L253
+	ldr	r2, .L263
 	mov	r0, r4
 	strb	r4, [r2, r3]
 	bl	NandcWaitFlashReady
@@ -1648,7 +1773,7 @@ FlashEraseSLc2KBlocks:
 	ldr	r1, [sp, #8]
 	mov	r0, r4
 	bl	FlashReadStatus
-	ldr	r3, .L253+4
+	ldr	r3, .L263+4
 	sbfx	r0, r0, #0, #1
 	str	r0, [r5]
 	movs	r2, #0
@@ -1668,17 +1793,17 @@ FlashEraseSLc2KBlocks:
 	strmi	r3, [r5]
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	bne	.L248
+	bne	.L258
 	ldr	r1, [sp, #8]
-	ldr	r0, .L253+8
+	ldr	r0, .L263+8
 	bl	printf
-.L248:
+.L258:
 	mov	r0, r4
 	bl	NandcFlashDeCs
-	b	.L246
-.L254:
+	b	.L256
+.L264:
 	.align	2
-.L253:
+.L263:
 	.word	.LANCHOR23
 	.word	.LANCHOR3
 	.word	.LC1
@@ -1696,41 +1821,41 @@ FlashEraseSLc2KBlocks:
 FlashEraseBlocks:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L286
+	ldr	r3, .L296
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r8, r0
 	sub	sp, sp, #24
 	mov	fp, r1
 	mov	r7, r2
 	ldrb	r4, [r3]	@ zero_extendqisi2
-	cbnz	r4, .L256
-	ldr	r10, .L286+8
-.L257:
+	cbnz	r4, .L266
+	ldr	r10, .L296+8
+.L267:
 	cmp	r4, r7
-	bcc	.L266
-	ldr	r5, .L286+4
+	bcc	.L276
+	ldr	r5, .L296+4
 	movs	r4, #0
-	ldr	r6, .L286+8
-.L267:
-	ldr	r3, .L286+12
+	ldr	r6, .L296+8
+.L277:
+	ldr	r3, .L296+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r4, r3
-	bcc	.L269
-	ldr	r3, .L286+16
+	bcc	.L279
+	ldr	r3, .L296+16
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L270
-.L271:
+	bne	.L280
+.L281:
 	movs	r0, #0
-	b	.L255
-.L256:
+	b	.L265
+.L266:
 	mov	r1, r2
 	bl	FlashEraseSLc2KBlocks
-.L255:
+.L265:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L266:
+.L276:
 	movs	r5, #36
 	add	r2, sp, #16
 	muls	r5, r4, r5
@@ -1743,29 +1868,29 @@ FlashEraseBlocks:
 	str	r3, [sp]
 	add	r3, sp, #20
 	bl	LogAddr2PhyAddr
-	ldr	r3, .L286+12
+	ldr	r3, .L296+12
 	mov	r6, r0
 	ldr	r0, [sp, #20]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r0
-	bhi	.L259
+	bhi	.L269
 	mov	r3, #-1
 	str	r3, [r8, r5]
-.L260:
+.L270:
 	adds	r4, r4, #1
-	b	.L257
-.L259:
-	ldr	r3, .L286+20
+	b	.L267
+.L269:
+	ldr	r3, .L296+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
 	add	r3, r10, r0, lsl #4
 	it	eq
 	moveq	r6, #0
 	ldr	r3, [r3, #8]
-	cbz	r3, .L262
+	cbz	r3, .L272
 	uxtb	r0, r0
 	bl	FlashWaitCmdDone
-.L262:
+.L272:
 	ldr	r1, [sp, #20]
 	ldr	r0, [sp, #12]
 	lsls	r2, r1, #4
@@ -1775,25 +1900,25 @@ FlashEraseBlocks:
 	str	r0, [r3, #12]
 	ldr	r0, [sp, #16]
 	str	r0, [r3, #4]
-	cbz	r6, .L263
+	cbz	r6, .L273
 	adds	r5, r5, #36
 	add	r5, r5, r8
 	str	r5, [r3, #12]
-.L263:
-	ldr	r3, .L286+24
+.L273:
+	ldr	r3, .L296+24
 	ldrb	r5, [r3, r1]	@ zero_extendqisi2
 	mov	r0, r5
 	strb	r5, [r10, r2]
 	bl	NandcFlashCs
 	cmp	fp, #1
 	mov	r0, r5
-	bne	.L264
-	ldr	r3, .L286+4
+	bne	.L274
+	ldr	r3, .L296+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L264
+	cbz	r3, .L274
 	bl	flash_enter_slc_mode
-.L265:
-	ldr	r3, .L286+28
+.L275:
+	ldr	r3, .L296+28
 	mov	r0, r5
 	ldr	r2, [sp, #20]
 	add	r4, r4, r6
@@ -1809,43 +1934,43 @@ FlashEraseBlocks:
 	bl	FlashEraseCmd
 	mov	r0, r5
 	bl	NandcFlashDeCs
-	b	.L260
-.L264:
+	b	.L270
+.L274:
 	bl	flash_exit_slc_mode
-	b	.L265
-.L269:
+	b	.L275
+.L279:
 	uxtb	r0, r4
 	bl	FlashWaitCmdDone
 	cmp	fp, #1
-	bne	.L268
+	bne	.L278
 	ldrb	r3, [r5]	@ zero_extendqisi2
-	cbz	r3, .L268
+	cbz	r3, .L278
 	lsls	r3, r4, #4
 	ldrb	r0, [r6, r3]	@ zero_extendqisi2
 	bl	flash_exit_slc_mode
-.L268:
+.L278:
 	adds	r4, r4, #1
-	b	.L267
-.L270:
-	ldr	r3, .L286+32
+	b	.L277
+.L280:
+	ldr	r3, .L296+32
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #69
-	bne	.L271
+	bne	.L281
 	movs	r3, #0
 	movs	r2, #36
 	mov	r1, r3
-.L272:
+.L282:
 	cmp	r3, r7
-	beq	.L271
+	beq	.L281
 	mul	r0, r2, r3
 	adds	r3, r3, #1
 	str	r1, [r8, r0]
-	b	.L272
-.L287:
+	b	.L282
+.L297:
 	.align	2
-.L286:
+.L296:
 	.word	.LANCHOR1
-	.word	.LANCHOR8
+	.word	.LANCHOR15
 	.word	.LANCHOR23
 	.word	.LANCHOR25
 	.word	.LANCHOR28
@@ -1867,7 +1992,7 @@ FlashReadDpCmd:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
 	mov	r5, r2
-	ldr	r3, .L292
+	ldr	r3, .L302
 	mov	r6, r1
 	uxtb	lr, r1
 	mov	r7, r0
@@ -1876,7 +2001,7 @@ FlashReadDpCmd:
 	ldr	r10, [r3, r0, lsl #3]
 	add	r3, r3, r0, lsl #3
 	ldrb	r4, [r3, #4]	@ zero_extendqisi2
-	ldr	r3, .L292+4
+	ldr	r3, .L302+4
 	ldrb	r2, [r3, #16]	@ zero_extendqisi2
 	lsls	r4, r4, #8
 	ldrb	ip, [r3, #8]	@ zero_extendqisi2
@@ -1885,7 +2010,7 @@ FlashReadDpCmd:
 	cmp	r2, #1
 	lsr	r2, r6, #16
 	str	ip, [r4, #2056]
-	bne	.L289
+	bne	.L299
 	mov	r10, #0
 	str	r10, [r4, #2052]
 	str	r10, [r4, #2052]
@@ -1897,7 +2022,7 @@ FlashReadDpCmd:
 	str	r10, [r4, #2056]
 	str	r10, [r4, #2052]
 	str	r10, [r4, #2052]
-.L291:
+.L301:
 	lsrs	r3, r5, #8
 	lsrs	r5, r5, #16
 	str	r8, [r4, #2052]
@@ -1909,15 +2034,15 @@ FlashReadDpCmd:
 	mov	r0, r7
 	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
 	b	FlashSetRandomizer
-.L289:
+.L299:
 	str	lr, [r4, #2052]
 	str	r1, [r4, #2052]
 	str	r2, [r4, #2052]
 	str	r3, [r4, #2056]
-	b	.L291
-.L293:
+	b	.L301
+.L303:
 	.align	2
-.L292:
+.L302:
 	.word	.LANCHOR6
 	.word	.LANCHOR7
 	.size	FlashReadDpCmd, .-FlashReadDpCmd
@@ -1936,38 +2061,38 @@ FlashDeInit:
 	movs	r0, #0
 	bl	NandcWaitFlashReady
 	bl	FlashSetReadRetryDefault
-	ldr	r3, .L303
-	ldr	r2, [r3]
-	ldr	r3, .L303+4
-	cmp	r2, r3
-	bne	.L295
+	ldr	r3, .L314
+	ldr	r0, [r3]
+	cbz	r0, .L305
 	movs	r0, #0
 	bl	flash_enter_slc_mode
-.L295:
-	ldr	r4, .L303+8
+.L306:
+	ldr	r4, .L314+4
 	ldrb	r3, [r4]	@ zero_extendqisi2
-	cbz	r3, .L296
-	ldr	r3, .L303+12
+	cbz	r3, .L307
+	ldr	r3, .L314+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	lsls	r3, r3, #31
-	bpl	.L296
+	bpl	.L307
 	movs	r0, #1
 	bl	FlashSetInterfaceMode
 	movs	r0, #1
 	bl	NandcSetMode
 	movs	r3, #0
 	strb	r3, [r4]
-.L296:
-	ldr	r3, .L303+16
+.L307:
+	ldr	r3, .L314+12
 	movs	r0, #0
 	ldr	r3, [r3]
 	str	r0, [r3, #336]
 	pop	{r4, pc}
-.L304:
+.L305:
+	bl	flash_exit_slc_mode
+	b	.L306
+.L315:
 	.align	2
-.L303:
+.L314:
 	.word	.LANCHOR29
-	.word	1446522928
 	.word	.LANCHOR30
 	.word	.LANCHOR24
 	.word	.LANCHOR6
@@ -1984,13 +2109,13 @@ NandcRandmzSel:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L306
+	ldr	r3, .L317
 	ldr	r3, [r3, r0, lsl #3]
 	str	r1, [r3, #336]
 	bx	lr
-.L307:
+.L318:
 	.align	2
-.L306:
+.L317:
 	.word	.LANCHOR6
 	.size	NandcRandmzSel, .-NandcRandmzSel
 	.section	.text.NandcTimeCfg,"ax",%progbits
@@ -2005,23 +2130,23 @@ NandcTimeCfg:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L313
+	ldr	r3, .L324
 	cmp	r0, #35
 	ldr	r3, [r3]
-	bhi	.L309
+	bhi	.L320
 	movw	r2, #4193
-.L312:
+.L323:
 	str	r2, [r3, #4]
 	bx	lr
-.L309:
+.L320:
 	cmp	r0, #99
 	ite	hi
 	movwhi	r2, #8322
 	movwls	r2, #4225
-	b	.L312
-.L314:
+	b	.L323
+.L325:
 	.align	2
-.L313:
+.L324:
 	.word	.LANCHOR19
 	.size	NandcTimeCfg, .-NandcTimeCfg
 	.section	.text.FlashTimingCfg,"ax",%progbits
@@ -2036,12 +2161,12 @@ FlashTimingCfg:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L316
+	ldr	r3, .L327
 	ldrb	r0, [r3, #21]	@ zero_extendqisi2
 	b	NandcTimeCfg
-.L317:
+.L328:
 	.align	2
-.L316:
+.L327:
 	.word	.LANCHOR31
 	.size	FlashTimingCfg, .-FlashTimingCfg
 	.section	.text.NandcBchSel,"ax",%progbits
@@ -2055,7 +2180,7 @@ FlashTimingCfg:
 NandcBchSel:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L326
+	ldr	r3, .L337
 	movs	r1, #0
 	push	{r4, lr}
 	movs	r4, #16
@@ -2063,32 +2188,32 @@ NandcBchSel:
 	ldr	r2, [r3]
 	mov	r3, #1
 	str	r3, [r2, #8]
-	ldr	r3, .L326+4
+	ldr	r3, .L337+4
 	str	r0, [r3]
 	mov	r3, r1
 	bfi	r3, r4, #8, #8
 	bfi	r3, r1, #18, #1
-	bne	.L319
-.L322:
+	bne	.L330
+.L333:
 	bfc	r3, #4, #1
-.L320:
+.L331:
 	orr	r3, r3, #1
 	str	r3, [r2, #12]
 	pop	{r4, pc}
-.L319:
+.L330:
 	cmp	r0, #24
-	bne	.L321
+	bne	.L332
 	orr	r3, r3, #16
-	b	.L320
-.L321:
+	b	.L331
+.L332:
 	cmp	r0, #40
 	orr	r3, r3, #262144
 	orr	r3, r3, #16
-	bne	.L320
-	b	.L322
-.L327:
+	bne	.L331
+	b	.L333
+.L338:
 	.align	2
-.L326:
+.L337:
 	.word	.LANCHOR19
 	.word	.LANCHOR32
 	.size	NandcBchSel, .-NandcBchSel
@@ -2104,12 +2229,12 @@ FlashBchSel:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L329
+	ldr	r3, .L340
 	strb	r0, [r3]
 	b	NandcBchSel
-.L330:
+.L341:
 	.align	2
-.L329:
+.L340:
 	.word	.LANCHOR33
 	.size	FlashBchSel, .-FlashBchSel
 	.section	.text.NandCIrqEnable,"ax",%progbits
@@ -2211,7 +2336,7 @@ NandcSendDumpDataStart:
 	@ link register save eliminated.
 	ldr	r2, [r0, #16]
 	sub	sp, sp, #8
-	ldr	r3, .L338
+	ldr	r3, .L349
 	str	r2, [sp, #4]
 	ldr	r2, [sp, #4]
 	bfc	r2, #2, #1
@@ -2224,9 +2349,9 @@ NandcSendDumpDataStart:
 	add	sp, sp, #8
 	@ sp needed
 	bx	lr
-.L339:
+.L350:
 	.align	2
-.L338:
+.L349:
 	.word	538969130
 	.size	NandcSendDumpDataStart, .-NandcSendDumpDataStart
 	.section	.text.NandcSendDumpDataDone,"ax",%progbits
@@ -2242,12 +2367,12 @@ NandcSendDumpDataDone:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	sub	sp, sp, #8
-.L341:
+.L352:
 	ldr	r3, [r0, #8]
 	str	r3, [sp, #4]
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #11
-	bpl	.L341
+	bpl	.L352
 	add	sp, sp, #8
 	@ sp needed
 	bx	lr
@@ -2270,12 +2395,12 @@ NandcXferStart:
 	str	r2, [sp, #4]
 	ldr	fp, [sp, #56]
 	cmp	r1, #0
-	bne	.L358
+	bne	.L369
 	adds	r5, fp, #0
 	it	ne
 	movne	r5, #1
-.L345:
-	ldr	r1, .L363
+.L356:
+	ldr	r1, .L374
 	movs	r4, #0
 	ldr	r6, [r1, r0, lsl #3]
 	add	r1, r1, r0, lsl #3
@@ -2293,29 +2418,29 @@ NandcXferStart:
 	orr	r4, r4, #536870912
 	orr	r4, r4, #1024
 	bfi	r4, r3, #4, #1
-	ldr	r3, .L363+4
+	ldr	r3, .L374+4
 	ldr	r3, [r3]
 	cmp	r3, #3
-	bls	.L346
+	bls	.L357
 	ldr	r3, [r6, #16]
 	str	r3, [sp, #20]
 	ldr	r3, [sp, #20]
 	bfc	r3, #2, #1
 	str	r3, [sp, #20]
 	cmp	r5, #0
-	beq	.L347
-	ldr	r5, .L363+8
+	beq	.L358
+	ldr	r5, .L374+8
 	cmp	r7, #0
-	bne	.L348
-.L356:
+	bne	.L359
+.L367:
 	ldr	r2, [sp, #4]
 	adds	r2, r2, #1
 	asrs	r2, r2, #1
 	bfi	r4, r2, #22, #6
 	cmp	fp, #0
-	beq	.L349
+	beq	.L360
 	mov	r0, fp
-.L350:
+.L361:
 	ldr	r3, [r5, #4]
 	add	r1, r0, #63
 	ubfx	r10, r4, #22, #5
@@ -2366,10 +2491,10 @@ NandcXferStart:
 	ldr	r3, [sp, #20]
 	orr	r3, r3, #1
 	str	r3, [sp, #20]
-.L347:
+.L358:
 	ldr	r3, [sp, #20]
 	str	r3, [r6, #16]
-.L346:
+.L357:
 	str	r8, [r6, #12]
 	str	r4, [r6, #8]
 	orr	r4, r4, #4
@@ -2377,11 +2502,11 @@ NandcXferStart:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L358:
+.L369:
 	movs	r5, #1
-	b	.L345
-.L348:
-	ldr	r3, .L363+12
+	b	.L356
+.L359:
+	ldr	r3, .L374+12
 	movs	r1, #0
 	ldr	lr, [r5, #4]
 	mov	r0, r1
@@ -2395,34 +2520,34 @@ NandcXferStart:
 	lsrs	r3, r3, #1
 	str	r3, [sp, #12]
 	ldr	r3, [sp, #60]
-.L352:
+.L363:
 	ldr	r2, [sp, #12]
 	cmp	r0, r2
-	bcs	.L356
+	bcs	.L367
 	ldr	r2, [sp, #60]
 	bic	r10, r1, #3
-	cbz	r2, .L353
+	cbz	r2, .L364
 	ldrh	ip, [r3]
 	adds	r3, r3, #4
 	ldrh	r2, [r3, #-2]
 	orr	ip, ip, r2, lsl #16
 	str	ip, [lr, r10]
-.L354:
+.L365:
 	ldr	r2, [sp, #8]
 	adds	r0, r0, #1
 	add	r1, r1, r2
-	b	.L352
-.L353:
+	b	.L363
+.L364:
 	mov	r2, #-1
 	str	r2, [lr, r10]
-	b	.L354
-.L349:
-	ldr	r3, .L363+8
+	b	.L365
+.L360:
+	ldr	r3, .L374+8
 	ldr	r0, [r3]
-	b	.L350
-.L364:
+	b	.L361
+.L375:
 	.align	2
-.L363:
+.L374:
 	.word	.LANCHOR6
 	.word	.LANCHOR34
 	.word	.LANCHOR35
@@ -2439,75 +2564,75 @@ NandcXferStart:
 NandcXferComp:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L393
+	ldr	r3, .L404
 	push	{r0, r1, r4, lr}
 	ldr	r1, [r3, r0, lsl #3]
-	ldr	r3, .L393+4
+	ldr	r3, .L404+4
 	ldr	r0, [r3]
 	cmp	r0, #3
-	bls	.L386
+	bls	.L397
 	ldr	r3, [r1, #16]
 	lsls	r2, r3, #29
-	bpl	.L386
+	bpl	.L397
 	ldr	r3, [r1, #16]
 	tst	r3, #2
 	ldr	r3, [r1, #8]
 	str	r3, [sp]
-	beq	.L373
-.L369:
+	beq	.L384
+.L380:
 	ldr	r2, [r1, #28]
 	ldr	r3, [sp]
 	ubfx	r2, r2, #16, #5
 	ubfx	r3, r3, #22, #6
 	cmp	r2, r3
-	bge	.L370
+	bge	.L381
 	cmp	r0, #5
-	bls	.L369
+	bls	.L380
 	ldr	r3, [r1]
 	str	r3, [sp, #4]
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #18
-	bpl	.L369
+	bpl	.L380
 	ldr	r3, [sp, #4]
 	lsls	r4, r3, #14
-	bpl	.L369
-.L370:
-	ldr	r3, .L393+8
+	bpl	.L380
+.L381:
+	ldr	r3, .L404+8
 	movs	r2, #0
 	str	r2, [r3, #24]
-.L365:
+.L376:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, pc}
-.L374:
+.L385:
 	ldr	r3, [r1, #8]
 	str	r3, [sp]
-.L373:
+.L384:
 	ldr	r3, [sp]
 	lsls	r2, r3, #11
-	bpl	.L374
-	ldr	r4, .L393+12
+	bpl	.L385
+	ldr	r4, .L404+12
 	ldr	r2, [r4]
-	cbz	r2, .L375
+	cbz	r2, .L386
 	mov	r0, r1
 	bl	NandcSendDumpDataStart
-.L375:
+.L386:
 	ldr	r3, [r4]
 	cmp	r3, #0
-	beq	.L370
+	beq	.L381
 	mov	r0, r1
 	bl	NandcSendDumpDataDone
-	b	.L370
-.L386:
+	b	.L381
+.L397:
 	ldr	r3, [r1, #8]
 	str	r3, [sp]
 	ldr	r3, [sp]
 	lsls	r3, r3, #11
-	bpl	.L386
-	b	.L365
-.L394:
+	bpl	.L397
+	b	.L376
+.L405:
 	.align	2
-.L393:
+.L404:
 	.word	.LANCHOR6
 	.word	.LANCHOR34
 	.word	.LANCHOR35
@@ -2527,17 +2652,17 @@ Ftl_log2:
 	@ link register save eliminated.
 	movs	r1, #0
 	movs	r2, #1
-.L396:
+.L407:
 	cmp	r2, r0
 	uxth	r3, r1
 	add	r1, r1, #1
-	bls	.L397
+	bls	.L408
 	subs	r0, r3, #1
 	uxth	r0, r0
 	bx	lr
-.L397:
+.L408:
 	lsls	r2, r2, #1
-	b	.L396
+	b	.L407
 	.size	Ftl_log2, .-Ftl_log2
 	.section	.text.FtlPrintInfo,"ax",%progbits
 	.align	1
@@ -2565,31 +2690,31 @@ FtlSysBlkNumInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L400
+	ldr	r3, .L411
 	cmp	r0, #24
 	it	cc
 	movcc	r0, #24
-	ldr	r2, .L400+4
+	ldr	r2, .L411+4
 	str	r0, [r3]
-	ldr	r3, .L400+8
+	ldr	r3, .L411+8
 	ldrh	r3, [r3]
 	muls	r3, r0, r3
 	str	r3, [r2]
-	ldr	r2, .L400+12
+	ldr	r2, .L411+12
 	ldrh	r2, [r2]
 	subs	r0, r2, r0
-	ldr	r2, .L400+16
+	ldr	r2, .L411+16
 	strh	r0, [r2]	@ movhi
 	movs	r0, #0
-	ldr	r2, .L400+20
+	ldr	r2, .L411+20
 	ldr	r2, [r2]
 	subs	r3, r2, r3
-	ldr	r2, .L400+24
+	ldr	r2, .L411+24
 	str	r3, [r2]
 	bx	lr
-.L401:
+.L412:
 	.align	2
-.L400:
+.L411:
 	.word	.LANCHOR37
 	.word	.LANCHOR39
 	.word	.LANCHOR38
@@ -2614,122 +2739,118 @@ FtlConstantsInit:
 	mov	r10, r0
 	ldrh	r7, [r0, #8]
 	sub	sp, sp, #24
-	ldr	r3, .L429
-	ldr	r1, .L429+4
-	ldrh	r6, [r10, #14]
-	ldr	r2, .L429+8
+	ldr	r3, .L440
+	ldrh	r2, [r0, #10]
+	ldrh	r6, [r0, #14]
 	strh	r7, [r3]	@ movhi
-	ldrh	r3, [r0, #10]
-	ldrh	r0, [r0, #12]
-	strh	r6, [r1]	@ movhi
-	str	r1, [sp, #20]
-	ldr	r1, .L429+12
-	ldr	r4, .L429+16
-	strh	r0, [r2]	@ movhi
-	movs	r2, #0
-	strh	r3, [r4]	@ movhi
+	ldrh	r3, [r0, #12]
+	ldr	r0, .L440+4
+	ldr	r1, .L440+8
+	ldr	r4, .L440+12
+	strh	r6, [r0]	@ movhi
+	str	r0, [sp, #20]
+	ldr	r0, .L440+16
+	strh	r3, [r1]	@ movhi
+	movs	r1, #0
+	strh	r2, [r4]	@ movhi
 	str	r4, [sp, #8]
-.L403:
-	strb	r2, [r2, r1]
-	adds	r2, r2, #1
-	cmp	r2, #32
-	bne	.L403
-	ldrh	r1, [r10, #14]
-	ldrh	r2, [r10, #20]
-	cmp	r2, r1, lsr #8
-	bcs	.L404
-	uxtb	r8, r0
-	lsl	r2, r8, #1
-	uxtb	r2, r2
-	str	r2, [sp, #4]
-	subs	r2, r3, #1
-	muls	r2, r0, r2
-	str	r2, [sp, #12]
-	movs	r2, #0
-.L405:
-	cmp	r2, r0
-	bcs	.L407
+.L414:
+	strb	r1, [r1, r0]
+	adds	r1, r1, #1
+	cmp	r1, #32
+	bne	.L414
+	ldrh	r0, [r10, #14]
+	ldrh	r1, [r10, #20]
+	cmp	r1, r0, lsr #8
+	bcs	.L415
+	uxtb	r8, r3
+	lsl	r1, r8, #1
+	uxtb	r1, r1
+	str	r1, [sp, #4]
+	subs	r1, r2, #1
+	muls	r1, r3, r1
+	str	r1, [sp, #12]
+	movs	r1, #0
+.L416:
+	cmp	r1, r3
+	bcs	.L418
 	ldr	r4, [sp, #12]
-	sub	fp, r2, r0
-	uxtb	r1, r2
-	adds	r5, r2, r4
-	ldr	r4, .L429+12
+	sub	fp, r1, r3
+	uxtb	r0, r1
+	adds	r5, r1, r4
+	ldr	r4, .L440+16
 	add	r4, r4, r5
 	movs	r5, #0
 	mov	lr, r4
-	ldr	r4, .L429+12
+	ldr	r4, .L440+16
 	mov	ip, r5
 	add	fp, fp, r4
-	b	.L408
-.L406:
-	add	r4, r8, r1
-	strb	r1, [fp, r5]
+	b	.L419
+.L417:
+	add	r4, r8, r0
+	strb	r0, [fp, r5]
 	str	r4, [sp, #16]
 	add	ip, ip, #1
 	ldrb	r4, [sp, #16]	@ zero_extendqisi2
 	strb	r4, [lr, r5]
 	ldr	r4, [sp, #4]
-	add	r1, r1, r4
-	uxtb	r1, r1
-.L408:
-	cmp	ip, r3
-	add	r5, r5, r0
-	bcc	.L406
-	adds	r2, r2, #1
-	b	.L405
-.L407:
-	ldr	r2, [sp, #8]
-	lsls	r3, r3, #1
-	lsrs	r6, r6, #1
-	strh	r3, [r2]	@ movhi
-	ldr	r3, .L429+4
-	strh	r6, [r3]	@ movhi
-.L404:
-	ldr	r3, .L429+20
-	movs	r2, #5
-	cmp	r7, #1
-	mov	r1, #0
-	strh	r2, [r3]	@ movhi
-	ldr	r2, .L429+24
+	add	r0, r0, r4
+	uxtb	r0, r0
+.L419:
+	cmp	ip, r2
+	add	r5, r5, r3
+	bcc	.L417
+	adds	r1, r1, #1
+	b	.L416
+.L418:
+	ldr	r1, [sp, #8]
+	lsls	r2, r2, #1
+	lsrs	r6, r6, #1
+	strh	r2, [r1]	@ movhi
+	ldr	r2, .L440+4
+	strh	r6, [r2]	@ movhi
+.L415:
+	ldr	r1, .L440+20
+	movs	r2, #5
+	cmp	r7, #1
+	mov	r0, #0
+	strh	r2, [r1]	@ movhi
+	ldr	r2, .L440+24
 	it	eq
-	strheq	r7, [r3]	@ movhi
-	ldr	r3, .L429+28
-	strh	r1, [r2]	@ movhi
-	mov	r1, #4352
-	strh	r1, [r3]	@ movhi
-	ldr	r1, .L429+32
-	ldrb	r1, [r1]	@ zero_extendqisi2
-	str	r1, [sp, #4]
-	cbz	r1, .L410
-	mov	r1, #384
-	strh	r1, [r3]	@ movhi
-.L410:
-	ldr	r3, [sp, #8]
+	strheq	r7, [r1]	@ movhi
+	ldr	r1, .L440+28
+	strh	r0, [r2]	@ movhi
+	mov	r0, #4352
+	strh	r0, [r1]	@ movhi
+	ldr	r0, .L440+32
+	ldrb	r0, [r0]	@ zero_extendqisi2
+	str	r0, [sp, #4]
+	cbz	r0, .L421
+	mov	r0, #384
+	strh	r0, [r1]	@ movhi
+.L421:
 	str	r2, [sp, #16]
-	ldr	fp, .L429+120
-	ldrh	r5, [r3]
-	ldr	r3, .L429+36
-	ldr	r8, .L429+124
-	smulbb	r5, r5, r0
-	uxth	r5, r5
-	strh	r5, [r3]	@ movhi
-	ldr	r3, [sp, #20]
-	ldrh	r4, [r3]
-	ldr	r3, .L429+40
-	smulbb	r0, r0, r4
-	uxth	r0, r0
-	strh	r0, [r3]	@ movhi
-	bl	Ftl_log2
-	ldr	r3, .L429+44
+	ldr	r2, [sp, #8]
+	ldr	r1, .L440+36
 	ldrh	r6, [r10, #16]
-	ldrh	r1, [r10, #18]
-	strh	r0, [r3]	@ movhi
-	ldr	r3, .L429+48
-	smulbb	r0, r5, r6
+	ldrh	r5, [r2]
+	ldr	r2, [sp, #20]
+	ldr	fp, .L440+116
+	ldr	r8, .L440+120
+	smulbb	r5, r5, r3
+	ldrh	r4, [r2]
 	strh	r6, [fp]	@ movhi
+	uxth	r5, r5
+	smulbb	r3, r3, r4
+	strh	r5, [r1]	@ movhi
+	smulbb	r0, r5, r6
+	ldr	r1, .L440+40
+	strh	r3, [r1]	@ movhi
+	ldrh	r1, [r10, #18]
+	ldr	r3, .L440+44
 	str	r1, [sp, #12]
 	strh	r1, [r3]	@ movhi
-	ldr	r3, .L429+52
+	ldr	r3, .L440+48
 	strh	r0, [r3]	@ movhi
 	ldrh	r3, [r10, #20]
 	mov	r0, r3
@@ -2738,9 +2859,9 @@ FtlConstantsInit:
 	bl	Ftl_log2
 	ldr	r3, [sp, #8]
 	mov	r7, r0
-	ldr	ip, .L429+128
+	ldr	ip, .L440+124
 	cmp	r4, #1024
-	ldr	lr, .L429+132
+	ldr	lr, .L440+128
 	ldr	r2, [sp, #16]
 	strh	r0, [ip]	@ movhi
 	lsl	r0, r3, #9
@@ -2748,15 +2869,15 @@ FtlConstantsInit:
 	uxth	r0, r0
 	strh	r0, [lr]	@ movhi
 	lsr	r0, r0, #8
-	ldr	lr, .L429+136
+	ldr	lr, .L440+132
 	mul	r1, r3, r1
 	strh	r0, [lr]	@ movhi
 	ldrh	lr, [r10, #26]
 	mov	r10, ip
-	ldr	r0, .L429+56
+	ldr	r0, .L440+52
 	strh	lr, [r0]	@ movhi
 	mul	lr, r4, r5
-	ldr	r0, .L429+60
+	ldr	r0, .L440+56
 	str	lr, [r0]
 	itt	hi
 	uxtbhi	r0, r4
@@ -2766,16 +2887,16 @@ FtlConstantsInit:
 	muls	r2, r5, r2
 	muls	r2, r3, r2
 	muls	r6, r2, r6
-	ldr	r2, .L429+64
+	ldr	r2, .L440+60
 	asrs	r6, r6, #11
 	str	r6, [r2]
-	ldr	r6, .L429+28
+	ldr	r6, .L440+28
 	ldrh	r0, [r6]
 	lsls	r0, r0, #3
 	bl	__aeabi_idiv
 	uxth	r0, r0
 	mov	r3, r6
-	ldr	r6, .L429+68
+	ldr	r6, .L440+64
 	cmp	r0, #4
 	itt	ls
 	movls	r2, #4
@@ -2783,22 +2904,22 @@ FtlConstantsInit:
 	ldr	r2, [sp, #4]
 	it	hi
 	strhhi	r0, [r6]	@ movhi
-	cbz	r2, .L414
+	cbz	r2, .L425
 	mov	r2, #640
 	strh	r2, [r3]	@ movhi
-.L414:
+.L425:
 	ldrh	r3, [r3]
 	lsls	r4, r4, #6
-	ldr	r2, .L429+72
+	ldr	r2, .L440+68
 	mov	r1, r5
 	ldrh	r0, [r6]
 	asrs	r3, r3, r7
 	adds	r7, r7, #9
 	asrs	r4, r4, r7
-	ldr	r7, .L429+76
+	ldr	r7, .L440+72
 	adds	r3, r3, #2
 	strh	r3, [r2]	@ movhi
-	ldr	r3, .L429+80
+	ldr	r3, .L440+76
 	strh	r4, [r3]	@ movhi
 	uxth	r4, r4
 	mul	r3, r4, r5
@@ -2806,9 +2927,9 @@ FtlConstantsInit:
 	str	r3, [r7]
 	bl	__aeabi_uidiv
 	uxtah	r0, r4, r0
-	ldr	r4, .L429+84
+	ldr	r4, .L440+80
 	cmp	r5, #1
-	ldr	r5, .L429+88
+	ldr	r5, .L440+84
 	it	eq
 	addeq	r0, r0, #4
 	str	r0, [r4]
@@ -2816,10 +2937,10 @@ FtlConstantsInit:
 	bl	FtlSysBlkNumInit
 	ldr	r2, [r4]
 	movs	r0, #24
-	ldr	r3, .L429+92
+	ldr	r3, .L440+88
 	ldrb	r5, [r5]	@ zero_extendqisi2
 	str	r2, [r3]
-	ldr	r3, .L429+96
+	ldr	r3, .L440+92
 	ldr	r2, [r3]
 	ldrh	r3, [fp]
 	lsls	r2, r2, #2
@@ -2827,14 +2948,14 @@ FtlConstantsInit:
 	ldrh	r2, [r10]
 	adds	r2, r2, #9
 	lsrs	r3, r3, r2
-	ldr	r2, .L429+100
+	ldr	r2, .L440+96
 	adds	r3, r3, #2
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L429+104
+	ldr	r2, .L440+100
 	strh	r0, [r2]	@ movhi
 	movs	r0, #0
-	ldr	r2, .L429+108
+	ldr	r2, .L440+104
 	str	r0, [r2]
 	ldrh	r0, [r6]
 	adds	r2, r0, #3
@@ -2842,17 +2963,17 @@ FtlConstantsInit:
 	ldr	r2, [r7]
 	adds	r4, r2, #3
 	str	r4, [r7]
-	cbz	r5, .L417
+	cbz	r5, .L428
 	adds	r2, r2, #5
 	adds	r0, r0, #4
 	strh	r0, [r6]	@ movhi
-.L428:
+.L439:
 	str	r2, [r7]
-.L418:
-	ldr	r1, .L429+112
+.L429:
+	ldr	r1, .L440+108
 	movs	r2, #0
 	strh	r2, [r1]	@ movhi
-	ldr	r2, .L429+116
+	ldr	r2, .L440+112
 	ldrh	r0, [r2]
 	lsrs	r2, r0, #3
 	add	r2, r2, r0, lsl #1
@@ -2867,49 +2988,48 @@ FtlConstantsInit:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L417:
+.L428:
 	cmp	r4, #7
-	bhi	.L418
+	bhi	.L429
 	movs	r2, #8
-	b	.L428
-.L430:
+	b	.L439
+.L441:
 	.align	2
-.L429:
+.L440:
 	.word	.LANCHOR44
 	.word	.LANCHOR41
 	.word	.LANCHOR46
-	.word	.LANCHOR47
 	.word	.LANCHOR45
+	.word	.LANCHOR47
 	.word	.LANCHOR48
 	.word	.LANCHOR49
 	.word	.LANCHOR50
 	.word	.LANCHOR1
 	.word	.LANCHOR38
 	.word	.LANCHOR51
-	.word	.LANCHOR52
+	.word	.LANCHOR53
 	.word	.LANCHOR54
-	.word	.LANCHOR55
-	.word	.LANCHOR60
+	.word	.LANCHOR59
 	.word	.LANCHOR43
+	.word	.LANCHOR60
 	.word	.LANCHOR61
 	.word	.LANCHOR62
-	.word	.LANCHOR63
-	.word	.LANCHOR65
 	.word	.LANCHOR64
+	.word	.LANCHOR63
 	.word	.LANCHOR37
-	.word	.LANCHOR8
-	.word	.LANCHOR66
+	.word	.LANCHOR15
+	.word	.LANCHOR65
 	.word	.LANCHOR42
+	.word	.LANCHOR66
 	.word	.LANCHOR67
 	.word	.LANCHOR68
 	.word	.LANCHOR69
-	.word	.LANCHOR70
 	.word	.LANCHOR40
-	.word	.LANCHOR53
+	.word	.LANCHOR52
+	.word	.LANCHOR55
 	.word	.LANCHOR56
 	.word	.LANCHOR57
 	.word	.LANCHOR58
-	.word	.LANCHOR59
 	.size	FtlConstantsInit, .-FtlConstantsInit
 	.section	.text.IsBlkInVendorPart,"ax",%progbits
 	.align	1
@@ -2923,32 +3043,32 @@ IsBlkInVendorPart:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L438
+	ldr	r3, .L449
 	ldrh	r3, [r3]
-	cbz	r3, .L437
-	ldr	r3, .L438+4
-	ldr	r2, .L438+8
+	cbz	r3, .L448
+	ldr	r3, .L449+4
+	ldr	r2, .L449+8
 	ldr	r3, [r3]
 	ldrh	r2, [r2]
 	add	r2, r3, r2, lsl #1
-.L433:
+.L444:
 	cmp	r3, r2
-	bne	.L434
-.L437:
+	bne	.L445
+.L448:
 	movs	r0, #0
 	bx	lr
-.L434:
+.L445:
 	ldrh	r1, [r3], #2
 	cmp	r0, r1
-	bne	.L433
+	bne	.L444
 	movs	r0, #1
 	bx	lr
-.L439:
+.L450:
 	.align	2
-.L438:
+.L449:
+	.word	.LANCHOR70
 	.word	.LANCHOR71
-	.word	.LANCHOR72
-	.word	.LANCHOR62
+	.word	.LANCHOR61
 	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
 	.section	.text.FtlGetCap,"ax",%progbits
 	.align	1
@@ -2962,13 +3082,13 @@ FtlGetCap:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L441
+	ldr	r3, .L452
 	ldr	r0, [r3]
 	bx	lr
-.L442:
+.L453:
 	.align	2
-.L441:
-	.word	.LANCHOR69
+.L452:
+	.word	.LANCHOR68
 	.size	FtlGetCap, .-FtlGetCap
 	.section	.text.FtlGetCapacity,"ax",%progbits
 	.align	1
@@ -2982,13 +3102,13 @@ FtlGetCapacity:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L444
+	ldr	r3, .L455
 	ldr	r0, [r3]
 	bx	lr
-.L445:
+.L456:
 	.align	2
-.L444:
-	.word	.LANCHOR69
+.L455:
+	.word	.LANCHOR68
 	.size	FtlGetCapacity, .-FtlGetCapacity
 	.section	.text.ftl_get_density,"ax",%progbits
 	.align	1
@@ -3002,13 +3122,13 @@ ftl_get_density:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L447
+	ldr	r3, .L458
 	ldr	r0, [r3]
 	bx	lr
-.L448:
+.L459:
 	.align	2
-.L447:
-	.word	.LANCHOR69
+.L458:
+	.word	.LANCHOR68
 	.size	ftl_get_density, .-ftl_get_density
 	.section	.text.FtlGetLpn,"ax",%progbits
 	.align	1
@@ -3022,13 +3142,13 @@ FtlGetLpn:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L450
+	ldr	r3, .L461
 	ldr	r0, [r3]
 	bx	lr
-.L451:
+.L462:
 	.align	2
-.L450:
-	.word	.LANCHOR73
+.L461:
+	.word	.LANCHOR72
 	.size	FtlGetLpn, .-FtlGetLpn
 	.section	.text.FtlGetCurEraseBlock,"ax",%progbits
 	.align	1
@@ -3042,16 +3162,16 @@ FtlGetCurEraseBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L453
-	ldr	r3, .L453+4
+	ldr	r2, .L464
+	ldr	r3, .L464+4
 	ldr	r0, [r2]
 	ldrh	r3, [r3]
 	muls	r0, r3, r0
 	bx	lr
-.L454:
+.L465:
 	.align	2
-.L453:
-	.word	.LANCHOR74
+.L464:
+	.word	.LANCHOR73
 	.word	.LANCHOR38
 	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
 	.section	.text.FtlGetAllBlockNum,"ax",%progbits
@@ -3066,15 +3186,15 @@ FtlGetAllBlockNum:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L456
-	ldr	r3, .L456+4
+	ldr	r2, .L467
+	ldr	r3, .L467+4
 	ldrh	r0, [r2]
 	ldrh	r3, [r3]
 	muls	r0, r3, r0
 	bx	lr
-.L457:
+.L468:
 	.align	2
-.L456:
+.L467:
 	.word	.LANCHOR38
 	.word	.LANCHOR41
 	.size	FtlGetAllBlockNum, .-FtlGetAllBlockNum
@@ -3089,14 +3209,14 @@ FtlGetAllBlockNum:
 FtlBbmMapBadBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L459
+	ldr	r3, .L470
 	push	{r0, r1, r2, r4, r5, r6, r7, lr}
 	mov	r5, r0
 	ldrh	r4, [r3]
 	mov	r1, r4
 	bl	__aeabi_uidiv
 	mov	r1, r4
-	ldr	r4, .L459+4
+	ldr	r4, .L470+4
 	uxth	r6, r0
 	mov	r0, r5
 	bl	__aeabi_uidivmod
@@ -3113,7 +3233,7 @@ FtlBbmMapBadBlock:
 	mov	r2, r6
 	str	r0, [sp]
 	mov	r1, r5
-	ldr	r0, .L459+8
+	ldr	r0, .L470+8
 	bl	printf
 	ldrh	r3, [r4, #6]
 	movs	r0, #0
@@ -3122,11 +3242,11 @@ FtlBbmMapBadBlock:
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, pc}
-.L460:
+.L471:
 	.align	2
-.L459:
+.L470:
 	.word	.LANCHOR51
-	.word	.LANCHOR75
+	.word	.LANCHOR74
 	.word	.LC2
 	.size	FtlBbmMapBadBlock, .-FtlBbmMapBadBlock
 	.section	.text.FtlBbmIsBadBlock,"ax",%progbits
@@ -3140,7 +3260,7 @@ FtlBbmMapBadBlock:
 FtlBbmIsBadBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L462
+	ldr	r3, .L473
 	push	{r4, r5, r6, lr}
 	mov	r6, r0
 	ldrh	r5, [r3]
@@ -3150,7 +3270,7 @@ FtlBbmIsBadBlock:
 	uxth	r4, r1
 	mov	r1, r5
 	bl	__aeabi_uidiv
-	ldr	r3, .L462+4
+	ldr	r3, .L473+4
 	uxth	r0, r0
 	lsrs	r2, r4, #5
 	and	r4, r4, #31
@@ -3160,11 +3280,11 @@ FtlBbmIsBadBlock:
 	lsrs	r0, r0, r4
 	and	r0, r0, #1
 	pop	{r4, r5, r6, pc}
-.L463:
+.L474:
 	.align	2
-.L462:
+.L473:
 	.word	.LANCHOR51
-	.word	.LANCHOR75
+	.word	.LANCHOR74
 	.size	FtlBbmIsBadBlock, .-FtlBbmIsBadBlock
 	.section	.text.FtlBbtInfoPrint,"ax",%progbits
 	.align	1
@@ -3193,12 +3313,12 @@ V2P_block:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r5, r1
-	ldr	r3, .L466
+	ldr	r3, .L477
 	mov	r7, r0
 	ldrh	r6, [r3]
 	mov	r1, r6
 	bl	__aeabi_uidiv
-	ldr	r3, .L466+4
+	ldr	r3, .L477+4
 	smulbb	r5, r6, r5
 	mov	r1, r6
 	ldrh	r4, [r3]
@@ -3209,9 +3329,9 @@ V2P_block:
 	add	r0, r0, r4
 	uxth	r0, r0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L467:
+.L478:
 	.align	2
-.L466:
+.L477:
 	.word	.LANCHOR46
 	.word	.LANCHOR51
 	.size	V2P_block, .-V2P_block
@@ -3226,11 +3346,11 @@ V2P_block:
 P2V_plane:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L469
+	ldr	r3, .L480
 	push	{r4, r5, r6, lr}
 	mov	r6, r0
 	ldrh	r5, [r3]
-	ldr	r3, .L469+4
+	ldr	r3, .L480+4
 	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
 	smulbb	r4, r0, r5
@@ -3240,9 +3360,9 @@ P2V_plane:
 	add	r1, r1, r4
 	uxth	r0, r1
 	pop	{r4, r5, r6, pc}
-.L470:
+.L481:
 	.align	2
-.L469:
+.L480:
 	.word	.LANCHOR46
 	.word	.LANCHOR51
 	.size	P2V_plane, .-P2V_plane
@@ -3258,18 +3378,18 @@ P2V_block_in_plane:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L472
+	ldr	r3, .L483
 	ldrh	r1, [r3]
 	bl	__aeabi_uidivmod
-	ldr	r3, .L472+4
+	ldr	r3, .L483+4
 	uxth	r0, r1
 	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
 	uxth	r0, r0
 	pop	{r3, pc}
-.L473:
+.L484:
 	.align	2
-.L472:
+.L483:
 	.word	.LANCHOR51
 	.word	.LANCHOR46
 	.size	P2V_block_in_plane, .-P2V_block_in_plane
@@ -3286,14 +3406,14 @@ ftl_cmp_data_ver:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	cmp	r0, r1
-	bls	.L475
+	bls	.L486
 	subs	r0, r0, r1
 	cmp	r0, #-2147483648
 	ite	hi
 	movhi	r0, #0
 	movls	r0, #1
 	bx	lr
-.L475:
+.L486:
 	subs	r0, r1, r0
 	cmp	r0, #-2147483648
 	ite	ls
@@ -3313,15 +3433,15 @@ FtlFreeSysBlkQueueEmpty:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L478
+	ldr	r3, .L489
 	ldrh	r0, [r3, #6]
 	clz	r0, r0
 	lsrs	r0, r0, #5
 	bx	lr
-.L479:
+.L490:
 	.align	2
-.L478:
-	.word	.LANCHOR76
+.L489:
+	.word	.LANCHOR75
 	.size	FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty
 	.section	.text.FtlFreeSysBlkQueueFull,"ax",%progbits
 	.align	1
@@ -3335,16 +3455,16 @@ FtlFreeSysBlkQueueFull:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L481
+	ldr	r3, .L492
 	ldrh	r0, [r3, #6]
 	sub	r3, r0, #1024
 	rsbs	r0, r3, #0
 	adcs	r0, r0, r3
 	bx	lr
-.L482:
+.L493:
 	.align	2
-.L481:
-	.word	.LANCHOR76
+.L492:
+	.word	.LANCHOR75
 	.size	FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull
 	.section	.text.FtlFreeSysBlkQueueIn,"ax",%progbits
 	.align	1
@@ -3363,17 +3483,17 @@ FtlFreeSysBlkQueueIn:
 	push	{r4, r5, r6, lr}
 	mov	r5, r0
 	cmp	r3, r2
-	bhi	.L483
-	ldr	r4, .L492
+	bhi	.L494
+	ldr	r4, .L503
 	ldrh	r3, [r4, #6]
 	cmp	r3, #1024
-	beq	.L483
-	cbz	r1, .L485
-	ldr	r3, .L492+4
+	beq	.L494
+	cbz	r1, .L496
+	ldr	r3, .L503+4
 	ldr	r3, [r3]
-	cbnz	r3, .L485
+	cbnz	r3, .L496
 	bl	P2V_block_in_plane
-	ldr	r3, .L492+8
+	ldr	r3, .L503+8
 	mov	r6, r0
 	movs	r2, #1
 	mov	r1, r2
@@ -3381,16 +3501,16 @@ FtlFreeSysBlkQueueIn:
 	lsls	r3, r5, #10
 	str	r3, [r0, #4]
 	bl	FlashEraseBlocks
-	ldr	r3, .L492+12
+	ldr	r3, .L503+12
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r6, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r6, lsl #1]	@ movhi
-	ldr	r2, .L492+16
+	ldr	r2, .L503+16
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
-.L485:
+.L496:
 	ldrh	r3, [r4, #6]
 	adds	r3, r3, #1
 	strh	r3, [r4, #6]	@ movhi
@@ -3400,16 +3520,16 @@ FtlFreeSysBlkQueueIn:
 	ubfx	r3, r3, #0, #10
 	strh	r5, [r4, r2, lsl #1]	@ movhi
 	strh	r3, [r4, #4]	@ movhi
-.L483:
+.L494:
 	pop	{r4, r5, r6, pc}
-.L493:
+.L504:
 	.align	2
-.L492:
+.L503:
+	.word	.LANCHOR75
 	.word	.LANCHOR76
 	.word	.LANCHOR77
 	.word	.LANCHOR78
 	.word	.LANCHOR79
-	.word	.LANCHOR80
 	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
 	.section	.text.FtlFreeSysBLkSort,"ax",%progbits
 	.align	1
@@ -3422,28 +3542,28 @@ FtlFreeSysBlkQueueIn:
 FtlFreeSysBLkSort:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L503
+	ldr	r3, .L514
 	push	{r4, r5, r6, lr}
 	ldrh	r2, [r3, #6]
-	cbz	r2, .L494
-	ldr	r2, .L503+4
+	cbz	r2, .L505
+	ldr	r2, .L514+4
 	movs	r6, #0
 	ldrh	r1, [r3, #2]
 	mov	r5, r6
 	ldrh	r4, [r2, #28]
 	ldrh	r2, [r3, #4]
 	and	r4, r4, #31
-.L496:
+.L507:
 	uxth	r0, r6
 	adds	r6, r6, #1
 	cmp	r4, r0
-	bgt	.L497
-	cbz	r5, .L494
+	bgt	.L508
+	cbz	r5, .L505
 	strh	r1, [r3, #2]	@ movhi
 	strh	r2, [r3, #4]	@ movhi
-.L494:
+.L505:
 	pop	{r4, r5, r6, pc}
-.L497:
+.L508:
 	adds	r0, r1, #4
 	adds	r1, r1, #1
 	ldrh	r5, [r3, r0, lsl #1]
@@ -3453,12 +3573,12 @@ FtlFreeSysBLkSort:
 	movs	r5, #1
 	add	r2, r2, r5
 	ubfx	r2, r2, #0, #10
-	b	.L496
-.L504:
+	b	.L507
+.L515:
 	.align	2
-.L503:
-	.word	.LANCHOR76
-	.word	.LANCHOR81
+.L514:
+	.word	.LANCHOR75
+	.word	.LANCHOR80
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
 	.section	.text.FtlFreeSysBlkQueueOut,"ax",%progbits
 	.align	1
@@ -3472,12 +3592,12 @@ FtlFreeSysBlkQueueOut:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	ldr	r4, .L515
+	ldr	r4, .L526
 	mov	r6, r4
-.L506:
+.L517:
 	ldrh	r1, [r4, #6]
 	cmp	r1, #0
-	beq	.L507
+	beq	.L518
 	ldrh	r3, [r4, #2]
 	subs	r1, r1, #1
 	strh	r1, [r4, #6]	@ movhi
@@ -3486,67 +3606,67 @@ FtlFreeSysBlkQueueOut:
 	ubfx	r3, r3, #0, #10
 	ldrh	r5, [r4, r2, lsl #1]
 	strh	r3, [r4, #2]	@ movhi
-	ldr	r3, .L515+4
+	ldr	r3, .L526+4
 	ldr	r10, [r3]
 	cmp	r10, #0
-	bne	.L508
-	ldr	r8, .L515+28
+	bne	.L519
+	ldr	r8, .L526+28
 	mov	r0, r5
 	bl	P2V_block_in_plane
 	mov	r7, r0
 	lsls	r3, r5, #10
 	ldr	r0, [r8]
 	str	r3, [r0, #4]
-	ldr	r3, .L515+8
+	ldr	r3, .L526+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L509
+	cbz	r3, .L520
 	movs	r2, #1
 	mov	r1, r10
 	bl	FlashEraseBlocks
-.L509:
+.L520:
 	movs	r2, #1
 	ldr	r0, [r8]
 	mov	r1, r2
 	bl	FlashEraseBlocks
-	ldr	r3, .L515+12
+	ldr	r3, .L526+12
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r7, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r7, lsl #1]	@ movhi
-	ldr	r2, .L515+16
+	ldr	r2, .L526+16
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
-.L508:
+.L519:
 	subs	r3, r5, #1
 	movw	r2, #65533
 	uxth	r3, r3
 	cmp	r3, r2
-	bls	.L511
+	bls	.L522
 	ldrh	r2, [r6, #6]
 	mov	r1, r5
-	ldr	r0, .L515+20
+	ldr	r0, .L526+20
 	bl	printf
-	b	.L506
-.L507:
-	ldr	r0, .L515+24
+	b	.L517
+.L518:
+	ldr	r0, .L526+24
 	bl	printf
-.L510:
-	b	.L510
-.L511:
+.L521:
+	b	.L521
+.L522:
 	mov	r0, r5
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L516:
+.L527:
 	.align	2
-.L515:
+.L526:
+	.word	.LANCHOR75
 	.word	.LANCHOR76
-	.word	.LANCHOR77
-	.word	.LANCHOR8
+	.word	.LANCHOR15
+	.word	.LANCHOR78
 	.word	.LANCHOR79
-	.word	.LANCHOR80
 	.word	.LC4
 	.word	.LC3
-	.word	.LANCHOR78
+	.word	.LANCHOR77
 	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
 	.section	.text.test_node_in_list,"ax",%progbits
 	.align	1
@@ -3559,35 +3679,35 @@ FtlFreeSysBlkQueueOut:
 test_node_in_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L522
+	ldr	r3, .L533
 	push	{r4, r5, lr}
 	movw	r5, #65535
 	ldr	r2, [r0]
 	ldr	r4, [r3]
 	subs	r3, r2, r4
 	asrs	r0, r3, #1
-	ldr	r3, .L522+4
+	ldr	r3, .L533+4
 	muls	r3, r0, r3
 	movs	r0, #6
 	uxth	r3, r3
-.L519:
+.L530:
 	cmp	r3, r1
-	beq	.L520
+	beq	.L531
 	ldrh	r3, [r2]
 	cmp	r3, r5
-	beq	.L521
+	beq	.L532
 	mla	r2, r0, r3, r4
-	b	.L519
-.L520:
+	b	.L530
+.L531:
 	movs	r0, #1
 	pop	{r4, r5, pc}
-.L521:
+.L532:
 	movs	r0, #0
 	pop	{r4, r5, pc}
-.L523:
+.L534:
 	.align	2
-.L522:
-	.word	.LANCHOR82
+.L533:
+	.word	.LANCHOR81
 	.word	-1431655765
 	.size	test_node_in_list, .-test_node_in_list
 	.section	.text.insert_data_list,"ax",%progbits
@@ -3602,11 +3722,11 @@ insert_data_list:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L540
+	ldr	r3, .L551
 	ldrh	lr, [r3]
 	cmp	lr, r0
-	bls	.L526
-	ldr	r3, .L540+4
+	bls	.L537
+	ldr	r3, .L551+4
 	movs	r5, #6
 	ldr	r4, [r3]
 	mul	r3, r5, r0
@@ -3616,109 +3736,109 @@ insert_data_list:
 	movw	r3, #65535
 	strh	r3, [r1, #2]	@ movhi
 	strh	r3, [r4, r2]	@ movhi
-	ldr	r3, .L540+8
+	ldr	r3, .L551+8
 	ldr	ip, [r3]
 	cmp	ip, #0
-	bne	.L527
-.L539:
+	bne	.L538
+.L550:
 	str	r1, [r3]
-.L526:
+.L537:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L527:
-	ldr	r3, .L540+12
+.L538:
+	ldr	r3, .L551+12
 	lsls	r2, r0, #1
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
 	ldrh	r6, [r3, r0, lsl #1]
 	ldrh	r3, [r1, #4]
-	cbz	r3, .L537
+	cbz	r3, .L548
 	mul	fp, r3, r6
-.L528:
+.L539:
 	sub	r3, ip, r4
 	asrs	r6, r3, #1
-	ldr	r3, .L540+16
+	ldr	r3, .L551+16
 	muls	r3, r6, r3
-	ldr	r6, .L540+20
+	ldr	r6, .L551+20
 	ldr	r8, [r6]
 	movs	r6, #0
 	uxth	r3, r3
 	add	r2, r8, r2
 	str	r2, [sp, #12]
 	mov	r2, ip
-.L535:
+.L546:
 	adds	r6, r6, #1
 	uxth	r6, r6
 	cmp	lr, r6
-	bcc	.L526
+	bcc	.L537
 	cmp	r3, r0
-	beq	.L526
+	beq	.L537
 	ldr	r7, [sp, #8]
 	lsl	r10, r3, #1
 	ldrh	r7, [r7, r3, lsl #1]
 	mov	r5, r7
 	ldrh	r7, [r2, #4]
-	cbz	r7, .L538
+	cbz	r7, .L549
 	muls	r7, r5, r7
-.L530:
+.L541:
 	cmp	fp, r7
-	bne	.L531
+	bne	.L542
 	ldr	r5, [sp, #12]
 	ldrh	r10, [r8, r10]
 	ldrh	r7, [r5]
 	cmp	r10, r7
-	bcc	.L533
-.L532:
+	bcc	.L544
+.L543:
 	ldr	r5, [sp, #4]
 	cmp	r2, ip
 	strh	r3, [r4, r5]	@ movhi
 	ldrh	r3, [r2, #2]
 	strh	r3, [r1, #2]	@ movhi
-	bne	.L536
+	bne	.L547
 	strh	r0, [r2, #2]	@ movhi
-	ldr	r3, .L540+8
-	b	.L539
-.L537:
+	ldr	r3, .L551+8
+	b	.L550
+.L548:
 	mov	fp, #-1
-	b	.L528
-.L538:
+	b	.L539
+.L549:
 	mov	r7, #-1
-	b	.L530
-.L531:
-	bcc	.L532
-.L533:
+	b	.L541
+.L542:
+	bcc	.L543
+.L544:
 	ldrh	r7, [r2]
 	movw	r5, #65535
 	cmp	r7, r5
-	bne	.L534
+	bne	.L545
 	strh	r3, [r1, #2]	@ movhi
 	strh	r0, [r2]	@ movhi
-	ldr	r3, .L540+24
-	b	.L539
-.L534:
+	ldr	r3, .L551+24
+	b	.L550
+.L545:
 	movs	r3, #6
 	mla	r2, r3, r7, r4
 	mov	r3, r7
-	b	.L535
-.L536:
+	b	.L546
+.L547:
 	ldrh	r1, [r2, #2]
 	movs	r3, #6
 	muls	r3, r1, r3
 	strh	r0, [r4, r3]	@ movhi
 	strh	r0, [r2, #2]	@ movhi
-	b	.L526
-.L541:
+	b	.L537
+.L552:
 	.align	2
-.L540:
+.L551:
 	.word	.LANCHOR40
+	.word	.LANCHOR81
 	.word	.LANCHOR82
 	.word	.LANCHOR83
-	.word	.LANCHOR84
 	.word	-1431655765
-	.word	.LANCHOR79
-	.word	.LANCHOR85
+	.word	.LANCHOR78
+	.word	.LANCHOR84
 	.size	insert_data_list, .-insert_data_list
 	.section	.text.INSERT_DATA_LIST,"ax",%progbits
 	.align	1
@@ -3733,31 +3853,31 @@ INSERT_DATA_LIST:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	insert_data_list
-	ldr	r2, .L544
+	ldr	r2, .L555
 	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L544+4
+	ldr	r2, .L555+4
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bcs	.L542
-	ldr	r1, .L544+8
+	bcs	.L553
+	ldr	r1, .L555+8
 	movs	r2, #210
-	ldr	r0, .L544+12
+	ldr	r0, .L555+12
 	bl	printf
-	ldr	r1, .L544+16
-	ldr	r0, .L544+20
+	ldr	r1, .L555+16
+	ldr	r0, .L555+20
 	pop	{r3, lr}
 	b	printf
-.L542:
+.L553:
 	pop	{r3, pc}
-.L545:
+.L556:
 	.align	2
-.L544:
-	.word	.LANCHOR86
+.L555:
+	.word	.LANCHOR85
 	.word	.LANCHOR40
-	.word	.LANCHOR87
+	.word	.LANCHOR86
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
@@ -3776,48 +3896,48 @@ insert_free_list:
 	movw	r1, #65535
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	cmp	r0, r1
-	beq	.L547
-	ldr	r3, .L553
+	beq	.L558
+	ldr	r3, .L564
 	mov	r10, #6
 	mul	r7, r10, r0
 	ldr	r4, [r3]
-	ldr	r3, .L553+4
+	ldr	r3, .L564+4
 	adds	r5, r4, r7
 	ldr	r6, [r3]
 	mov	lr, r3
 	strh	r1, [r5, #2]	@ movhi
 	strh	r1, [r4, r7]	@ movhi
-	cbnz	r6, .L548
+	cbnz	r6, .L559
 	str	r5, [r3]
-.L547:
+.L558:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L548:
-	ldr	r3, .L553+8
+.L559:
+	ldr	r3, .L564+8
 	subs	r2, r6, r4
 	mov	fp, r1
 	ldr	ip, [r3]
 	asrs	r3, r2, #1
-	ldr	r2, .L553+12
+	ldr	r2, .L564+12
 	ldrh	r8, [ip, r0, lsl #1]
 	muls	r2, r3, r2
 	mov	r3, r6
 	uxth	r2, r2
-.L551:
+.L562:
 	ldrh	r1, [ip, r2, lsl #1]
 	cmp	r1, r8
-	bcs	.L549
+	bcs	.L560
 	ldrh	r1, [r3]
 	cmp	r1, fp
-	bne	.L550
+	bne	.L561
 	strh	r2, [r5, #2]	@ movhi
 	strh	r0, [r3]	@ movhi
-	b	.L547
-.L550:
+	b	.L558
+.L561:
 	mla	r3, r10, r1, r4
 	mov	r2, r1
-	b	.L551
-.L549:
+	b	.L562
+.L560:
 	ldrh	r1, [r3, #2]
 	cmp	r3, r6
 	strh	r1, [r5, #2]	@ movhi
@@ -3832,13 +3952,13 @@ insert_free_list:
 	itt	ne
 	strhne	r0, [r4, r2]	@ movhi
 	strhne	r0, [r3, #2]	@ movhi
-	b	.L547
-.L554:
+	b	.L558
+.L565:
 	.align	2
-.L553:
-	.word	.LANCHOR82
-	.word	.LANCHOR88
-	.word	.LANCHOR79
+.L564:
+	.word	.LANCHOR81
+	.word	.LANCHOR87
+	.word	.LANCHOR78
 	.word	-1431655765
 	.size	insert_free_list, .-insert_free_list
 	.section	.text.INSERT_FREE_LIST,"ax",%progbits
@@ -3854,31 +3974,31 @@ INSERT_FREE_LIST:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	insert_free_list
-	ldr	r2, .L557
+	ldr	r2, .L568
 	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L557+4
+	ldr	r2, .L568+4
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bcs	.L555
-	ldr	r1, .L557+8
+	bcs	.L566
+	ldr	r1, .L568+8
 	movs	r2, #203
-	ldr	r0, .L557+12
+	ldr	r0, .L568+12
 	bl	printf
-	ldr	r1, .L557+16
-	ldr	r0, .L557+20
+	ldr	r1, .L568+16
+	ldr	r0, .L568+20
 	pop	{r3, lr}
 	b	printf
-.L555:
+.L566:
 	pop	{r3, pc}
-.L558:
+.L569:
 	.align	2
-.L557:
-	.word	.LANCHOR89
+.L568:
+	.word	.LANCHOR88
 	.word	.LANCHOR40
-	.word	.LANCHOR90
+	.word	.LANCHOR89
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
@@ -3896,7 +4016,7 @@ List_remove_node:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r6, #6
-	ldr	r5, .L565
+	ldr	r5, .L576
 	muls	r6, r1, r6
 	movw	r3, #65535
 	mov	r8, r0
@@ -3904,23 +4024,23 @@ List_remove_node:
 	adds	r4, r7, r6
 	ldrh	r2, [r4, #2]
 	cmp	r2, r3
-	bne	.L560
+	bne	.L571
 	ldr	r3, [r0]
 	cmp	r4, r3
-	beq	.L560
-	ldr	r1, .L565+4
+	beq	.L571
+	ldr	r1, .L576+4
 	mov	r2, #386
-	ldr	r0, .L565+8
+	ldr	r0, .L576+8
 	bl	printf
-	ldr	r1, .L565+12
-	ldr	r0, .L565+16
+	ldr	r1, .L576+12
+	ldr	r0, .L576+16
 	bl	printf
-.L560:
+.L571:
 	ldr	r3, [r8]
 	movw	r1, #65535
 	cmp	r4, r3
 	ldrh	r3, [r7, r6]
-	bne	.L561
+	bne	.L572
 	cmp	r3, r1
 	ittee	ne
 	ldrne	r0, [r5]
@@ -3931,24 +4051,24 @@ List_remove_node:
 	mlane	r3, r2, r3, r0
 	strne	r3, [r8]
 	strhne	r1, [r3, #2]	@ movhi
-.L563:
+.L574:
 	movw	r3, #65535
 	movs	r0, #0
 	strh	r3, [r7, r6]	@ movhi
 	strh	r3, [r4, #2]	@ movhi
 	pop	{r4, r5, r6, r7, r8, pc}
-.L561:
+.L572:
 	cmp	r3, r1
 	ldrh	r1, [r4, #2]
-	bne	.L564
+	bne	.L575
 	cmp	r1, r3
-	beq	.L563
+	beq	.L574
 	movs	r2, #6
 	ldr	r0, [r5]
 	muls	r1, r2, r1
 	strh	r3, [r0, r1]	@ movhi
-	b	.L563
-.L564:
+	b	.L574
+.L575:
 	ldr	r0, [r5]
 	movs	r2, #6
 	mla	r5, r2, r3, r0
@@ -3956,12 +4076,12 @@ List_remove_node:
 	ldrh	r1, [r4, #2]
 	muls	r2, r1, r2
 	strh	r3, [r0, r2]	@ movhi
-	b	.L563
-.L566:
+	b	.L574
+.L577:
 	.align	2
-.L565:
-	.word	.LANCHOR82
-	.word	.LANCHOR91
+.L576:
+	.word	.LANCHOR81
+	.word	.LANCHOR90
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
@@ -3979,15 +4099,15 @@ List_pop_index_node:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	ldr	r3, [r0]
 	push	{r4, r5, r6, lr}
-	cbz	r3, .L573
-	ldr	r2, .L574
+	cbz	r3, .L584
+	ldr	r2, .L585
 	movw	r5, #65535
 	movs	r6, #6
 	ldr	r2, [r2]
-.L569:
-	cbnz	r1, .L570
-.L572:
-	ldr	r4, .L574+4
+.L580:
+	cbnz	r1, .L581
+.L583:
+	ldr	r4, .L585+4
 	subs	r3, r3, r2
 	asrs	r3, r3, #1
 	muls	r4, r3, r4
@@ -3995,21 +4115,21 @@ List_pop_index_node:
 	bl	List_remove_node
 	uxth	r0, r4
 	pop	{r4, r5, r6, pc}
-.L570:
+.L581:
 	ldrh	r4, [r3]
 	cmp	r4, r5
-	beq	.L572
+	beq	.L583
 	subs	r1, r1, #1
 	mla	r3, r6, r4, r2
 	uxth	r1, r1
-	b	.L569
-.L573:
+	b	.L580
+.L584:
 	movw	r0, #65535
 	pop	{r4, r5, r6, pc}
-.L575:
+.L586:
 	.align	2
-.L574:
-	.word	.LANCHOR82
+.L585:
+	.word	.LANCHOR81
 	.word	-1431655765
 	.size	List_pop_index_node, .-List_pop_index_node
 	.section	.text.List_get_gc_head_node,"ax",%progbits
@@ -4023,39 +4143,39 @@ List_pop_index_node:
 List_get_gc_head_node:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L582
+	ldr	r3, .L593
 	push	{r4, lr}
 	ldr	r3, [r3]
-	cbz	r3, .L581
-	ldr	r2, .L582+4
+	cbz	r3, .L592
+	ldr	r2, .L593+4
 	movs	r4, #6
 	ldr	r1, [r2]
 	movw	r2, #65535
-.L578:
-	cbz	r0, .L579
+.L589:
+	cbz	r0, .L590
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bne	.L580
-.L581:
+	bne	.L591
+.L592:
 	movw	r0, #65535
 	pop	{r4, pc}
-.L580:
+.L591:
 	subs	r0, r0, #1
 	mla	r3, r4, r3, r1
 	uxth	r0, r0
-	b	.L578
-.L579:
-	ldr	r0, .L582+8
+	b	.L589
+.L590:
+	ldr	r0, .L593+8
 	subs	r3, r3, r1
 	asrs	r3, r3, #1
 	muls	r3, r0, r3
 	uxth	r0, r3
 	pop	{r4, pc}
-.L583:
+.L594:
 	.align	2
-.L582:
-	.word	.LANCHOR83
+.L593:
 	.word	.LANCHOR82
+	.word	.LANCHOR81
 	.word	-1431655765
 	.size	List_get_gc_head_node, .-List_get_gc_head_node
 	.section	.text.List_update_data_list,"ax",%progbits
@@ -4069,64 +4189,64 @@ List_get_gc_head_node:
 List_update_data_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L595
+	ldr	r3, .L606
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L586
-	ldr	r3, .L595+4
+	beq	.L597
+	ldr	r3, .L606+4
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L586
-	ldr	r3, .L595+8
+	beq	.L597
+	ldr	r3, .L606+8
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L586
-	ldr	r7, .L595+12
+	beq	.L597
+	ldr	r7, .L606+12
 	movs	r6, #6
-	ldr	r3, .L595+16
+	ldr	r3, .L606+16
 	muls	r6, r0, r6
 	ldr	fp, [r7]
 	ldr	r3, [r3]
 	add	r10, fp, r6
 	cmp	r10, r3
-	beq	.L586
-	ldr	r3, .L595+20
+	beq	.L597
+	ldr	r3, .L606+20
 	ldrh	r5, [r10, #4]
 	ldr	r2, [r3]
 	mov	r8, r3
 	ldrh	r2, [r2, r0, lsl #1]
 	cmp	r5, #0
-	beq	.L593
+	beq	.L604
 	muls	r5, r2, r5
-.L588:
+.L599:
 	ldrh	r3, [r10, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L589
+	bne	.L600
 	ldrh	r2, [fp, r6]
 	cmp	r2, r3
-	bne	.L589
-	ldr	r1, .L595+24
+	bne	.L600
+	ldr	r1, .L606+24
 	mov	r2, #504
-	ldr	r0, .L595+28
+	ldr	r0, .L606+28
 	bl	printf
-	ldr	r1, .L595+32
-	ldr	r0, .L595+36
+	ldr	r1, .L606+32
+	ldr	r0, .L606+36
 	bl	printf
-.L589:
+.L600:
 	ldrh	r3, [r10, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L590
+	bne	.L601
 	ldrh	r2, [fp, r6]
 	cmp	r2, r3
-	beq	.L586
-.L590:
+	beq	.L597
+.L601:
 	movs	r2, #6
 	muls	r2, r3, r2
-	ldr	r3, .L595+40
+	ldr	r3, .L606+40
 	asrs	r1, r2, #1
 	muls	r3, r1, r3
 	ldr	r1, [r8]
@@ -4134,54 +4254,54 @@ List_update_data_list:
 	ldr	r1, [r7]
 	add	r2, r2, r1
 	ldrh	r3, [r2, #4]
-	cbz	r3, .L594
+	cbz	r3, .L605
 	muls	r3, r0, r3
-.L591:
+.L602:
 	cmp	r5, r3
-	bcs	.L586
-	ldr	r5, .L595+44
+	bcs	.L597
+	ldr	r5, .L606+44
 	mov	r1, r4
-	ldr	r0, .L595+16
+	ldr	r0, .L606+16
 	bl	List_remove_node
 	ldrh	r3, [r5]
-	cbnz	r3, .L592
-	ldr	r1, .L595+24
+	cbnz	r3, .L603
+	ldr	r1, .L606+24
 	movw	r2, #515
-	ldr	r0, .L595+28
+	ldr	r0, .L606+28
 	bl	printf
-	ldr	r1, .L595+32
-	ldr	r0, .L595+36
+	ldr	r1, .L606+32
+	ldr	r0, .L606+36
 	bl	printf
-.L592:
+.L603:
 	ldrh	r3, [r5]
 	mov	r0, r4
 	subs	r3, r3, #1
 	strh	r3, [r5]	@ movhi
 	bl	INSERT_DATA_LIST
-.L586:
+.L597:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L593:
+.L604:
 	mov	r5, #-1
-	b	.L588
-.L594:
+	b	.L599
+.L605:
 	mov	r3, #-1
-	b	.L591
-.L596:
+	b	.L602
+.L607:
 	.align	2
-.L595:
+.L606:
+	.word	.LANCHOR91
 	.word	.LANCHOR92
 	.word	.LANCHOR93
-	.word	.LANCHOR94
+	.word	.LANCHOR81
 	.word	.LANCHOR82
 	.word	.LANCHOR83
-	.word	.LANCHOR84
-	.word	.LANCHOR95
+	.word	.LANCHOR94
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
 	.word	-1431655765
-	.word	.LANCHOR86
+	.word	.LANCHOR85
 	.size	List_update_data_list, .-List_update_data_list
 	.section	.text.ftl_map_blk_alloc_new_blk,"ax",%progbits
 	.align	1
@@ -4199,16 +4319,16 @@ ftl_map_blk_alloc_new_blk:
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r4, r0
 	movs	r3, #0
-.L598:
+.L609:
 	uxth	r5, r3
 	cmp	r5, r1
-	bcs	.L601
+	bcs	.L612
 	mov	r7, r2
 	adds	r3, r3, #1
 	ldrh	r6, [r7]
 	adds	r2, r2, #2
 	cmp	r6, #0
-	bne	.L598
+	bne	.L609
 	bl	FtlFreeSysBlkQueueOut
 	subs	r3, r0, #1
 	movw	r2, #65533
@@ -4216,14 +4336,14 @@ ftl_map_blk_alloc_new_blk:
 	mov	r1, r0
 	strh	r0, [r7]	@ movhi
 	cmp	r3, r2
-	bls	.L599
-	ldr	r3, .L605
-	ldr	r0, .L605+4
+	bls	.L610
+	ldr	r3, .L616
+	ldr	r0, .L616+4
 	ldrh	r2, [r3, #6]
 	bl	printf
-.L600:
-	b	.L600
-.L599:
+.L611:
+	b	.L611
+.L610:
 	ldr	r3, [r4, #28]
 	strh	r6, [r4, #2]	@ movhi
 	strh	r5, [r4]	@ movhi
@@ -4232,26 +4352,26 @@ ftl_map_blk_alloc_new_blk:
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-.L601:
+.L612:
 	ldrh	r3, [r4, #10]
 	cmp	r3, r5
-	bhi	.L603
-	ldr	r1, .L605+8
+	bhi	.L614
+	ldr	r1, .L616+8
 	movw	r2, #629
-	ldr	r0, .L605+12
+	ldr	r0, .L616+12
 	bl	printf
-	ldr	r1, .L605+16
-	ldr	r0, .L605+20
+	ldr	r1, .L616+16
+	ldr	r0, .L616+20
 	bl	printf
-.L603:
+.L614:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L606:
+.L617:
 	.align	2
-.L605:
-	.word	.LANCHOR76
+.L616:
+	.word	.LANCHOR75
 	.word	.LC8
-	.word	.LANCHOR96
+	.word	.LANCHOR95
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
@@ -4269,86 +4389,86 @@ select_l2p_ram_region:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r1, #0
-	ldr	r3, .L617
+	ldr	r3, .L628
 	movs	r0, #12
 	movw	r5, #65535
 	ldrh	r2, [r3]
-	ldr	r3, .L617+4
+	ldr	r3, .L628+4
 	ldr	r3, [r3]
-.L608:
+.L619:
 	uxth	r4, r1
 	cmp	r4, r2
-	bcc	.L610
+	bcc	.L621
 	mov	r4, r2
 	movs	r1, #0
 	mov	r6, #-2147483648
 	movs	r7, #12
-.L611:
+.L622:
 	uxth	r5, r1
 	cmp	r5, r2
-	bcc	.L613
+	bcc	.L624
 	cmp	r4, r2
-	bcc	.L609
-	ldr	r1, .L617+8
+	bcc	.L620
+	ldr	r1, .L628+8
 	mov	r4, r2
 	mov	r0, #-1
 	ldrh	r7, [r1]
 	movs	r1, #0
-.L614:
+.L625:
 	uxth	r5, r1
 	cmp	r5, r2
-	bcc	.L616
+	bcc	.L627
 	cmp	r4, r2
-	bcc	.L609
-	movw	r2, #855
-	ldr	r1, .L617+12
-	ldr	r0, .L617+16
+	bcc	.L620
+	movw	r2, #859
+	ldr	r1, .L628+12
+	ldr	r0, .L628+16
 	bl	printf
-	ldr	r1, .L617+20
-	ldr	r0, .L617+24
+	ldr	r1, .L628+20
+	ldr	r0, .L628+24
 	bl	printf
-	b	.L609
-.L610:
+	b	.L620
+.L621:
 	adds	r1, r1, #1
 	mla	r6, r0, r1, r3
 	ldrh	r6, [r6, #-12]
 	cmp	r6, r5
-	bne	.L608
-.L609:
+	bne	.L619
+.L620:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, pc}
-.L613:
+.L624:
 	mla	r0, r7, r1, r3
 	ldr	r0, [r0, #4]
 	cmp	r0, #0
-	blt	.L612
+	blt	.L623
 	cmp	r6, r0
 	itt	hi
 	movhi	r6, r0
 	movhi	r4, r5
-.L612:
+.L623:
 	adds	r1, r1, #1
-	b	.L611
-.L616:
+	b	.L622
+.L627:
 	ldr	r6, [r3, #4]
 	cmp	r0, r6
-	bls	.L615
+	bls	.L626
 	ldrh	ip, [r3]
 	cmp	ip, r7
 	itt	ne
 	movne	r0, r6
 	movne	r4, r5
-.L615:
+.L626:
 	adds	r1, r1, #1
 	adds	r3, r3, #12
-	b	.L614
-.L618:
+	b	.L625
+.L629:
 	.align	2
-.L617:
-	.word	.LANCHOR68
+.L628:
+	.word	.LANCHOR67
+	.word	.LANCHOR96
 	.word	.LANCHOR97
 	.word	.LANCHOR98
-	.word	.LANCHOR99
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
@@ -4364,49 +4484,49 @@ select_l2p_ram_region:
 FtlUpdateVaildLpn:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L629
+	ldr	r2, .L640
 	push	{r4, r5, r6, lr}
 	mov	r1, r2
 	ldrh	r3, [r2]
 	cmp	r3, #4
-	bhi	.L620
-	cbnz	r0, .L620
+	bhi	.L631
+	cbnz	r0, .L631
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
 	pop	{r4, r5, r6, pc}
-.L620:
+.L631:
 	movs	r3, #0
-	ldr	r0, .L629+4
+	ldr	r0, .L640+4
 	strh	r3, [r1]	@ movhi
 	movw	r6, #65535
-	ldr	r1, .L629+8
+	ldr	r1, .L640+8
 	ldrh	r4, [r0]
 	mov	r0, r3
-	ldr	r2, .L629+12
+	ldr	r2, .L640+12
 	ldr	r1, [r1]
 	str	r3, [r2]
 	add	r4, r1, r4, lsl #1
-.L621:
+.L632:
 	cmp	r1, r4
-	bne	.L623
-	cbz	r3, .L619
+	bne	.L634
+	cbz	r3, .L630
 	str	r0, [r2]
-.L619:
+.L630:
 	pop	{r4, r5, r6, pc}
-.L623:
+.L634:
 	ldrh	r5, [r1], #2
 	cmp	r5, r6
 	itt	ne
 	addne	r0, r0, r5
 	movne	r3, #1
-	b	.L621
-.L630:
+	b	.L632
+.L641:
 	.align	2
-.L629:
-	.word	.LANCHOR100
+.L640:
+	.word	.LANCHOR99
 	.word	.LANCHOR40
-	.word	.LANCHOR84
-	.word	.LANCHOR101
+	.word	.LANCHOR83
+	.word	.LANCHOR100
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
 	.section	.text.ftl_set_blk_mode,"ax",%progbits
 	.align	1
@@ -4421,10 +4541,10 @@ ftl_set_blk_mode:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	mov	r3, r0
-	cbz	r1, .L632
+	cbz	r1, .L643
 	b	ftl_set_blk_mode.part.10
-.L632:
-	ldr	r2, .L633
+.L643:
+	ldr	r2, .L644
 	lsrs	r0, r0, #5
 	and	r3, r3, #31
 	ldr	r1, [r2]
@@ -4434,9 +4554,9 @@ ftl_set_blk_mode:
 	bic	r2, r2, r3
 	str	r2, [r1, r0, lsl #2]
 	bx	lr
-.L634:
+.L645:
 	.align	2
-.L633:
+.L644:
 	.word	.LANCHOR0
 	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
 	.section	.text.ftl_get_blk_mode,"ax",%progbits
@@ -4451,7 +4571,7 @@ ftl_get_blk_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L636
+	ldr	r3, .L647
 	lsrs	r2, r0, #5
 	and	r0, r0, #31
 	ldr	r3, [r3]
@@ -4459,9 +4579,9 @@ ftl_get_blk_mode:
 	lsr	r0, r3, r0
 	and	r0, r0, #1
 	bx	lr
-.L637:
+.L648:
 	.align	2
-.L636:
+.L647:
 	.word	.LANCHOR0
 	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
 	.section	.text.ftl_sb_update_avl_pages,"ax",%progbits
@@ -4479,14 +4599,14 @@ ftl_sb_update_avl_pages:
 	push	{r4, r5, r6, lr}
 	strh	r3, [r0, #4]	@ movhi
 	movw	r6, #65535
-	ldr	r3, .L645
+	ldr	r3, .L656
 	ldrh	r4, [r3]
 	add	r3, r0, r2, lsl #1
 	adds	r3, r3, #14
-.L639:
+.L650:
 	cmp	r2, r4
-	bcc	.L641
-	ldr	r3, .L645+4
+	bcc	.L652
+	ldr	r3, .L656+4
 	add	r5, r0, #16
 	movw	r6, #65535
 	ldrh	r3, [r3]
@@ -4494,12 +4614,12 @@ ftl_sb_update_avl_pages:
 	subs	r1, r3, r1
 	movs	r3, #0
 	uxth	r1, r1
-.L642:
+.L653:
 	uxth	r2, r3
 	cmp	r4, r2
-	bhi	.L644
+	bhi	.L655
 	pop	{r4, r5, r6, pc}
-.L641:
+.L652:
 	ldrh	r5, [r3, #2]!
 	adds	r2, r2, #1
 	uxth	r2, r2
@@ -4508,8 +4628,8 @@ ftl_sb_update_avl_pages:
 	ldrhne	r5, [r0, #4]
 	addne	r5, r5, #1
 	strhne	r5, [r0, #4]	@ movhi
-	b	.L639
-.L644:
+	b	.L650
+.L655:
 	ldrh	r2, [r5], #2
 	adds	r3, r3, #1
 	cmp	r2, r6
@@ -4517,12 +4637,12 @@ ftl_sb_update_avl_pages:
 	ldrhne	r2, [r0, #4]
 	addne	r2, r2, r1
 	strhne	r2, [r0, #4]	@ movhi
-	b	.L642
-.L646:
+	b	.L653
+.L657:
 	.align	2
-.L645:
+.L656:
 	.word	.LANCHOR38
-	.word	.LANCHOR53
+	.word	.LANCHOR52
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
 	.section	.text.make_superblock,"ax",%progbits
 	.align	1
@@ -4535,44 +4655,44 @@ ftl_sb_update_avl_pages:
 make_superblock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L660
+	ldr	r3, .L671
 	ldrh	r2, [r0]
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L648
-	ldr	r1, .L660+4
-	mov	r2, #2544
-	ldr	r0, .L660+8
+	bcc	.L659
+	ldr	r1, .L671+4
+	movw	r2, #2575
+	ldr	r0, .L671+8
 	bl	printf
-	ldr	r1, .L660+12
-	ldr	r0, .L660+16
+	ldr	r1, .L671+12
+	ldr	r0, .L671+16
 	bl	printf
-.L648:
-	ldr	r3, .L660+20
+.L659:
+	ldr	r3, .L671+20
 	add	r6, r4, #16
-	ldr	r10, .L660+40
+	ldr	r10, .L671+40
 	movw	r7, #65535
 	movs	r5, #0
 	ldrh	r8, [r3]
 	strh	r5, [r4, #4]	@ movhi
 	strb	r5, [r4, #7]
-.L649:
+.L660:
 	uxth	r3, r5
 	cmp	r8, r3
-	bhi	.L651
-	ldr	r2, .L660+24
+	bhi	.L662
+	ldr	r2, .L671+24
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r2]
 	smulbb	r3, r3, r2
 	strh	r3, [r4, #4]	@ movhi
 	movs	r3, #0
 	strb	r3, [r4, #9]
-	ldr	r3, .L660+28
+	ldr	r3, .L671+28
 	ldr	r3, [r3]
-	cbz	r3, .L652
-	ldr	r3, .L660+32
+	cbz	r3, .L663
+	ldr	r3, .L671+32
 	ldrh	r2, [r4]
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r2, lsl #1]
@@ -4580,43 +4700,43 @@ make_superblock:
 	itt	ls
 	movls	r3, #1
 	strbls	r3, [r4, #9]
-.L652:
-	ldr	r3, .L660+36
+.L663:
+	ldr	r3, .L671+36
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L653
+	cbz	r3, .L664
 	movs	r3, #1
 	strb	r3, [r4, #9]
-.L653:
+.L664:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L651:
+.L662:
 	ldrh	r1, [r4]
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
 	strh	r7, [r6]	@ movhi
 	mov	fp, r0
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L650
+	cbnz	r0, .L661
 	strh	fp, [r6]	@ movhi
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	strb	r3, [r4, #7]
-.L650:
+.L661:
 	adds	r5, r5, #1
 	adds	r6, r6, #2
-	b	.L649
-.L661:
+	b	.L660
+.L672:
 	.align	2
-.L660:
+.L671:
 	.word	.LANCHOR40
-	.word	.LANCHOR102
+	.word	.LANCHOR101
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
 	.word	.LANCHOR38
-	.word	.LANCHOR53
+	.word	.LANCHOR52
 	.word	.LANCHOR28
-	.word	.LANCHOR79
+	.word	.LANCHOR78
 	.word	.LANCHOR1
 	.word	.LANCHOR47
 	.size	make_superblock, .-make_superblock
@@ -4633,49 +4753,49 @@ update_multiplier_value:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
 	movs	r5, #0
-	ldr	r3, .L668
+	ldr	r3, .L679
 	mov	r6, r0
 	mov	r4, r5
-	ldr	r10, .L668+12
+	ldr	r10, .L679+12
 	ldrh	r7, [r3]
-	ldr	r3, .L668+4
+	ldr	r3, .L679+4
 	ldrh	r8, [r3]
-.L663:
+.L674:
 	uxth	r3, r5
 	cmp	r7, r3
-	bhi	.L665
-	cbz	r4, .L667
+	bhi	.L676
+	cbz	r4, .L678
 	mov	r1, r4
 	mov	r0, #32768
 	bl	__aeabi_idiv
-.L666:
-	ldr	r3, .L668+8
+.L677:
+	ldr	r3, .L679+8
 	movs	r2, #6
 	ldr	r3, [r3]
 	mla	r6, r2, r6, r3
 	strh	r0, [r6, #4]	@ movhi
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L665:
+.L676:
 	mov	r1, r6
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L664
+	cbnz	r0, .L675
 	add	r4, r4, r8
 	uxth	r4, r4
-.L664:
+.L675:
 	adds	r5, r5, #1
-	b	.L663
-.L667:
+	b	.L674
+.L678:
 	mov	r0, r4
-	b	.L666
-.L669:
+	b	.L677
+.L680:
 	.align	2
-.L668:
+.L679:
 	.word	.LANCHOR38
-	.word	.LANCHOR53
-	.word	.LANCHOR82
+	.word	.LANCHOR52
+	.word	.LANCHOR81
 	.word	.LANCHOR47
 	.size	update_multiplier_value, .-update_multiplier_value
 	.section	.text.GetFreeBlockMinEraseCount,"ax",%progbits
@@ -4690,28 +4810,28 @@ GetFreeBlockMinEraseCount:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L673
+	ldr	r3, .L684
 	ldr	r0, [r3]
-	cbz	r0, .L671
-	ldr	r3, .L673+4
+	cbz	r0, .L682
+	ldr	r3, .L684+4
 	ldr	r3, [r3]
 	subs	r0, r0, r3
-	ldr	r3, .L673+8
+	ldr	r3, .L684+8
 	asrs	r0, r0, #1
 	muls	r0, r3, r0
-	ldr	r3, .L673+12
+	ldr	r3, .L684+12
 	ldr	r3, [r3]
 	uxth	r0, r0
 	ldrh	r0, [r3, r0, lsl #1]
-.L671:
+.L682:
 	bx	lr
-.L674:
+.L685:
 	.align	2
-.L673:
-	.word	.LANCHOR88
-	.word	.LANCHOR82
+.L684:
+	.word	.LANCHOR87
+	.word	.LANCHOR81
 	.word	-1431655765
-	.word	.LANCHOR79
+	.word	.LANCHOR78
 	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
 	.section	.text.GetFreeBlockMaxEraseCount,"ax",%progbits
 	.align	1
@@ -4724,11 +4844,11 @@ GetFreeBlockMinEraseCount:
 GetFreeBlockMaxEraseCount:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L683
+	ldr	r3, .L694
 	push	{r4, r5, r6, lr}
 	ldr	r3, [r3]
-	cbz	r3, .L681
-	ldr	r2, .L683+4
+	cbz	r3, .L692
+	ldr	r2, .L694+4
 	movs	r5, #6
 	movw	r6, #65535
 	ldrh	r2, [r2]
@@ -4737,42 +4857,42 @@ GetFreeBlockMaxEraseCount:
 	cmp	r0, r2
 	it	gt
 	uxthgt	r0, r2
-	ldr	r2, .L683+8
+	ldr	r2, .L694+8
 	ldr	r1, [r2]
-	ldr	r2, .L683+12
+	ldr	r2, .L694+12
 	subs	r3, r3, r1
 	asrs	r3, r3, #1
 	muls	r3, r2, r3
 	movs	r2, #0
 	uxth	r3, r3
-.L678:
+.L689:
 	uxth	r4, r2
 	cmp	r0, r4
-	bls	.L680
+	bls	.L691
 	mul	r4, r5, r3
 	adds	r2, r2, #1
 	ldrh	r4, [r1, r4]
 	cmp	r4, r6
-	bne	.L682
-.L680:
-	ldr	r2, .L683+16
+	bne	.L693
+.L691:
+	ldr	r2, .L694+16
 	ldr	r2, [r2]
 	ldrh	r0, [r2, r3, lsl #1]
 	pop	{r4, r5, r6, pc}
-.L682:
+.L693:
 	mov	r3, r4
-	b	.L678
-.L681:
+	b	.L689
+.L692:
 	mov	r0, r3
 	pop	{r4, r5, r6, pc}
-.L684:
+.L695:
 	.align	2
-.L683:
+.L694:
+	.word	.LANCHOR87
 	.word	.LANCHOR88
-	.word	.LANCHOR89
-	.word	.LANCHOR82
+	.word	.LANCHOR81
 	.word	-1431655765
-	.word	.LANCHOR79
+	.word	.LANCHOR78
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
 	.section	.text.free_data_superblock,"ax",%progbits
 	.align	1
@@ -4788,19 +4908,19 @@ free_data_superblock:
 	movw	r2, #65535
 	push	{r3, lr}
 	cmp	r0, r2
-	beq	.L686
-	ldr	r2, .L687
+	beq	.L697
+	ldr	r2, .L698
 	movs	r1, #0
 	ldr	r2, [r2]
 	strh	r1, [r2, r0, lsl #1]	@ movhi
 	bl	INSERT_FREE_LIST
-.L686:
+.L697:
 	movs	r0, #0
 	pop	{r3, pc}
-.L688:
+.L699:
 	.align	2
-.L687:
-	.word	.LANCHOR84
+.L698:
+	.word	.LANCHOR83
 	.size	free_data_superblock, .-free_data_superblock
 	.section	.text.FtlGcBufInit,"ax",%progbits
 	.align	1
@@ -4815,54 +4935,54 @@ FtlGcBufInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #0
-	ldr	r1, .L694
+	ldr	r1, .L705
 	mov	fp, #1
-	ldr	r2, .L694+4
+	ldr	r2, .L705+4
 	ldr	r5, [r1]
-	ldr	r1, .L694+8
+	ldr	r1, .L705+8
 	str	r3, [r2]
-	ldr	r2, .L694+12
+	ldr	r2, .L705+12
 	mov	r0, r5
 	ldr	r1, [r1]
 	ldrh	r2, [r2]
 	str	r1, [sp, #4]
-	ldr	r1, .L694+16
+	ldr	r1, .L705+16
 	ldrh	r1, [r1]
 	str	r1, [sp]
-	ldr	r1, .L694+20
+	ldr	r1, .L705+20
 	ldr	r10, [r1]
-	ldr	r1, .L694+24
+	ldr	r1, .L705+24
 	ldrh	r7, [r1]
-	ldr	r1, .L694+28
+	ldr	r1, .L705+28
 	ldr	r4, [r1]
 	movs	r1, #12
 	mla	r1, r2, r1, r1
 	adds	r4, r4, #8
 	add	r8, r5, r1
 	mov	r1, r3
-.L690:
+.L701:
 	adds	r0, r0, #12
 	ldr	r6, [sp]
 	cmp	r0, r8
 	add	ip, r3, r7
 	add	r4, r4, #36
 	add	lr, r1, r6
-	bne	.L691
-	ldr	r3, .L694+32
+	bne	.L702
+	ldr	r3, .L705+32
 	mov	lr, #12
 	mov	r8, #0
 	ldr	r0, [r3]
-	ldr	r3, .L694+8
+	ldr	r3, .L705+8
 	ldr	r4, [r3]
-	ldr	r3, .L694+20
+	ldr	r3, .L705+20
 	ldr	ip, [r3]
-.L692:
+.L703:
 	cmp	r2, r0
-	bcc	.L693
+	bcc	.L704
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L691:
+.L702:
 	bic	r1, r1, #3
 	bic	r3, r3, #3
 	mov	r6, r1
@@ -4876,8 +4996,8 @@ FtlGcBufInit:
 	str	r3, [r4, #-32]
 	mov	r3, ip
 	str	r6, [r4, #-36]
-	b	.L690
-.L693:
+	b	.L701
+.L704:
 	ldr	r3, [sp]
 	mul	r10, lr, r2
 	muls	r3, r2, r3
@@ -4892,19 +5012,19 @@ FtlGcBufInit:
 	bic	r3, r3, #3
 	add	r3, r3, ip
 	str	r3, [r1, #4]
-	b	.L692
-.L695:
+	b	.L703
+.L706:
 	.align	2
-.L694:
-	.word	.LANCHOR104
+.L705:
 	.word	.LANCHOR103
-	.word	.LANCHOR105
+	.word	.LANCHOR102
+	.word	.LANCHOR104
 	.word	.LANCHOR38
+	.word	.LANCHOR57
+	.word	.LANCHOR105
 	.word	.LANCHOR58
 	.word	.LANCHOR106
-	.word	.LANCHOR59
 	.word	.LANCHOR107
-	.word	.LANCHOR108
 	.size	FtlGcBufInit, .-FtlGcBufInit
 	.section	.text.FtlGcBufFree,"ax",%progbits
 	.align	1
@@ -4917,43 +5037,43 @@ FtlGcBufInit:
 FtlGcBufFree:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L703
+	ldr	r3, .L714
 	mov	ip, #12
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
 	mov	fp, #36
 	mov	lr, r4
 	ldr	r7, [r3]
-	ldr	r3, .L703+4
+	ldr	r3, .L714+4
 	ldr	r5, [r3]
-.L697:
+.L708:
 	uxth	r3, r4
 	cmp	r1, r3
-	bls	.L696
+	bls	.L707
 	mla	r8, fp, r3, r0
 	movs	r2, #0
-.L698:
+.L709:
 	uxth	r3, r2
 	cmp	r7, r3
-	bls	.L699
+	bls	.L710
 	mul	r3, ip, r3
 	ldr	r6, [r8, #8]
 	adds	r2, r2, #1
 	add	r10, r5, r3
 	ldr	r3, [r5, r3]
 	cmp	r3, r6
-	bne	.L698
+	bne	.L709
 	str	lr, [r10, #8]
-.L699:
+.L710:
 	adds	r4, r4, #1
-	b	.L697
-.L696:
+	b	.L708
+.L707:
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L704:
+.L715:
 	.align	2
-.L703:
-	.word	.LANCHOR108
-	.word	.LANCHOR104
+.L714:
+	.word	.LANCHOR107
+	.word	.LANCHOR103
 	.size	FtlGcBufFree, .-FtlGcBufFree
 	.section	.text.FtlGcBufAlloc,"ax",%progbits
 	.align	1
@@ -4966,45 +5086,45 @@ FtlGcBufFree:
 FtlGcBufAlloc:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L712
+	ldr	r3, .L723
 	movs	r2, #0
 	push	{r4, r5, r6, r7, r8, r10, lr}
 	mov	ip, #12
 	movs	r7, #1
 	mov	lr, #36
 	ldr	r4, [r3]
-	ldr	r3, .L712+4
+	ldr	r3, .L723+4
 	ldr	r5, [r3]
-.L706:
+.L717:
 	uxth	r8, r2
 	cmp	r1, r8
-	bhi	.L710
+	bhi	.L721
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L710:
+.L721:
 	mov	r10, #0
-.L707:
+.L718:
 	uxth	r3, r10
 	cmp	r4, r3
-	bls	.L708
+	bls	.L719
 	mla	r3, ip, r3, r5
 	add	r10, r10, #1
 	ldr	r6, [r3, #8]
 	cmp	r6, #0
-	bne	.L707
+	bne	.L718
 	mla	r8, lr, r8, r0
 	str	r7, [r3, #8]
 	ldr	r6, [r3]
 	ldr	r3, [r3, #4]
 	str	r6, [r8, #8]
 	str	r3, [r8, #12]
-.L708:
+.L719:
 	adds	r2, r2, #1
-	b	.L706
-.L713:
+	b	.L717
+.L724:
 	.align	2
-.L712:
-	.word	.LANCHOR108
-	.word	.LANCHOR104
+.L723:
+	.word	.LANCHOR107
+	.word	.LANCHOR103
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
 	.section	.text.IsBlkInGcList,"ax",%progbits
 	.align	1
@@ -5018,27 +5138,27 @@ IsBlkInGcList:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L719
-	ldr	r2, .L719+4
+	ldr	r3, .L730
+	ldr	r2, .L730+4
 	ldr	r3, [r3]
 	ldrh	r2, [r2]
 	add	r2, r3, r2, lsl #1
-.L715:
+.L726:
 	cmp	r3, r2
-	bne	.L717
+	bne	.L728
 	movs	r0, #0
 	bx	lr
-.L717:
+.L728:
 	ldrh	r1, [r3], #2
 	cmp	r1, r0
-	bne	.L715
+	bne	.L726
 	movs	r0, #1
 	bx	lr
-.L720:
+.L731:
 	.align	2
-.L719:
+.L730:
+	.word	.LANCHOR108
 	.word	.LANCHOR109
-	.word	.LANCHOR110
 	.size	IsBlkInGcList, .-IsBlkInGcList
 	.section	.text.FtlGcUpdatePage,"ax",%progbits
 	.align	1
@@ -5053,35 +5173,35 @@ FtlGcUpdatePage:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r5, r0
-	ldr	r4, .L725
+	ldr	r4, .L736
 	ubfx	r0, r0, #10, #16
 	mov	r6, r1
 	mov	r7, r2
 	bl	P2V_block_in_plane
-	ldr	r3, .L725+4
+	ldr	r3, .L736+4
 	ldrh	r1, [r4]
 	ldr	r2, [r3]
 	movs	r3, #0
-.L722:
+.L733:
 	uxth	ip, r3
 	cmp	ip, r1
-	bcc	.L724
-	bne	.L723
+	bcc	.L735
+	bne	.L734
 	strh	r0, [r2, ip, lsl #1]	@ movhi
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	b	.L723
-.L724:
+	b	.L734
+.L735:
 	adds	r3, r3, #1
 	add	ip, r2, r3, lsl #1
 	ldrh	ip, [ip, #-2]
 	cmp	ip, r0
-	bne	.L722
-.L723:
-	ldr	r2, .L725+8
+	bne	.L733
+.L734:
+	ldr	r2, .L736+8
 	movs	r0, #12
-	ldr	r1, .L725+12
+	ldr	r1, .L736+12
 	ldrh	r3, [r2]
 	ldr	r1, [r1]
 	muls	r0, r3, r0
@@ -5092,13 +5212,13 @@ FtlGcUpdatePage:
 	str	r5, [r1, r0]
 	strh	r3, [r2]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.L726:
+.L737:
 	.align	2
-.L725:
-	.word	.LANCHOR110
+.L736:
 	.word	.LANCHOR109
+	.word	.LANCHOR108
+	.word	.LANCHOR110
 	.word	.LANCHOR111
-	.word	.LANCHOR112
 	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
 	.section	.text.FtlGcRefreshOpenBlock,"ax",%progbits
 	.align	1
@@ -5111,52 +5231,52 @@ FtlGcUpdatePage:
 FtlGcRefreshOpenBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	ip, .L732+12
+	ldr	ip, .L743+12
 	push	{r4, r5, r6, r7, lr}
 	ldrh	lr, [ip]
 	cmp	lr, r0
-	beq	.L728
-	ldr	r6, .L732
+	beq	.L739
+	ldr	r6, .L743
 	ldrh	r7, [r6]
 	cmp	r0, r7
-	beq	.L728
-	ldr	r4, .L732+4
+	beq	.L739
+	ldr	r4, .L743+4
 	ldrh	r5, [r4]
 	cmp	r0, r5
-	beq	.L728
-	ldr	r2, .L732+8
+	beq	.L739
+	ldr	r2, .L743+8
 	ldrh	r1, [r2]
 	cmp	r0, r1
-	beq	.L728
+	beq	.L739
 	movw	r3, #65535
 	cmp	lr, r3
-	bne	.L729
+	bne	.L740
 	strh	r0, [ip]	@ movhi
-.L728:
+.L739:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, pc}
-.L729:
+.L740:
 	cmp	r7, r3
-	bne	.L730
+	bne	.L741
 	strh	r0, [r6]	@ movhi
-	b	.L728
-.L730:
+	b	.L739
+.L741:
 	cmp	r5, r3
-	bne	.L731
+	bne	.L742
 	strh	r0, [r4]	@ movhi
-	b	.L728
-.L731:
+	b	.L739
+.L742:
 	cmp	r1, r3
 	it	eq
 	strheq	r0, [r2]	@ movhi
-	b	.L728
-.L733:
+	b	.L739
+.L744:
 	.align	2
-.L732:
+.L743:
+	.word	.LANCHOR113
 	.word	.LANCHOR114
 	.word	.LANCHOR115
-	.word	.LANCHOR116
-	.word	.LANCHOR113
+	.word	.LANCHOR112
 	.size	FtlGcRefreshOpenBlock, .-FtlGcRefreshOpenBlock
 	.section	.text.FtlGcRefreshBlock,"ax",%progbits
 	.align	1
@@ -5169,55 +5289,55 @@ FtlGcRefreshOpenBlock:
 FtlGcRefreshBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	ip, .L744+12
+	ldr	ip, .L755+12
 	push	{r4, r5, r6, r7, lr}
 	ldrh	lr, [ip]
 	cmp	lr, r0
-	beq	.L742
-	ldr	r6, .L744
+	beq	.L753
+	ldr	r6, .L755
 	ldrh	r7, [r6]
 	cmp	r0, r7
-	beq	.L742
-	ldr	r4, .L744+4
+	beq	.L753
+	ldr	r4, .L755+4
 	ldrh	r5, [r4]
 	cmp	r0, r5
-	beq	.L742
-	ldr	r2, .L744+8
+	beq	.L753
+	ldr	r2, .L755+8
 	ldrh	r1, [r2]
 	cmp	r0, r1
-	beq	.L742
+	beq	.L753
 	movw	r3, #65535
 	cmp	lr, r3
-	bne	.L736
+	bne	.L747
 	strh	r0, [ip]	@ movhi
-.L742:
+.L753:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, pc}
-.L736:
+.L747:
 	cmp	r7, r3
-	bne	.L737
+	bne	.L748
 	strh	r0, [r6]	@ movhi
-	b	.L742
-.L737:
+	b	.L753
+.L748:
 	cmp	r5, r3
-	bne	.L738
+	bne	.L749
 	strh	r0, [r4]	@ movhi
-	b	.L742
-.L738:
+	b	.L753
+.L749:
 	cmp	r1, r3
-	bne	.L743
+	bne	.L754
 	strh	r0, [r2]	@ movhi
-	b	.L742
-.L743:
+	b	.L753
+.L754:
 	mov	r0, #-1
 	pop	{r4, r5, r6, r7, pc}
-.L745:
+.L756:
 	.align	2
-.L744:
+.L755:
+	.word	.LANCHOR113
 	.word	.LANCHOR114
 	.word	.LANCHOR115
-	.word	.LANCHOR116
-	.word	.LANCHOR113
+	.word	.LANCHOR112
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
 	.section	.text.FtlGcMarkBadPhyBlk,"ax",%progbits
 	.align	1
@@ -5235,48 +5355,48 @@ FtlGcMarkBadPhyBlk:
 	bl	P2V_block_in_plane
 	mov	r5, r0
 	bl	FtlGcRefreshBlock
-	ldr	r3, .L754
+	ldr	r3, .L765
 	ldr	r3, [r3]
-	cbz	r3, .L747
-	ldr	r3, .L754+4
+	cbz	r3, .L758
+	ldr	r3, .L765+4
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r5, lsl #1]
 	cmp	r3, #39
 	itt	hi
 	subhi	r3, r3, #40
 	strhhi	r3, [r2, r5, lsl #1]	@ movhi
-.L747:
-	ldr	r2, .L754+8
+.L758:
+	ldr	r2, .L765+8
 	movs	r1, #0
-	ldr	r5, .L754+12
+	ldr	r5, .L765+12
 	ldrh	r3, [r2]
-.L748:
+.L759:
 	uxth	r0, r1
 	cmp	r3, r0
-	bhi	.L750
+	bhi	.L761
 	cmp	r3, #15
 	itttt	ls
 	addls	r1, r3, #1
 	strhls	r1, [r2]	@ movhi
-	ldrls	r2, .L754+12
+	ldrls	r2, .L765+12
 	strhls	r4, [r2, r3, lsl #1]	@ movhi
-	b	.L749
-.L750:
+	b	.L760
+.L761:
 	adds	r1, r1, #1
 	add	r0, r5, r1, lsl #1
 	ldrh	r0, [r0, #-2]
 	cmp	r0, r4
-	bne	.L748
-.L749:
+	bne	.L759
+.L760:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L755:
+.L766:
 	.align	2
-.L754:
+.L765:
 	.word	.LANCHOR28
-	.word	.LANCHOR79
+	.word	.LANCHOR78
+	.word	.LANCHOR116
 	.word	.LANCHOR117
-	.word	.LANCHOR118
 	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
 	.section	.text.FtlGcReFreshBadBlk,"ax",%progbits
 	.align	1
@@ -5289,22 +5409,22 @@ FtlGcMarkBadPhyBlk:
 FtlGcReFreshBadBlk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L762
+	ldr	r3, .L773
 	push	{r4, lr}
 	ldrh	r3, [r3]
-	cbz	r3, .L757
-	ldr	r2, .L762+4
+	cbz	r3, .L768
+	ldr	r2, .L773+4
 	ldrh	r1, [r2]
 	movw	r2, #65535
 	cmp	r1, r2
-	bne	.L757
-	ldr	r4, .L762+8
+	bne	.L768
+	ldr	r4, .L773+8
 	ldrh	r2, [r4]
 	cmp	r2, r3
 	itt	cs
 	movcs	r3, #0
 	strhcs	r3, [r4]	@ movhi
-	ldr	r3, .L762+12
+	ldr	r3, .L773+12
 	ldrh	r2, [r4]
 	ldrh	r0, [r3, r2, lsl #1]
 	bl	P2V_block_in_plane
@@ -5312,16 +5432,16 @@ FtlGcReFreshBadBlk:
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-.L757:
+.L768:
 	movs	r0, #0
 	pop	{r4, pc}
-.L763:
+.L774:
 	.align	2
-.L762:
-	.word	.LANCHOR117
-	.word	.LANCHOR113
-	.word	.LANCHOR119
+.L773:
+	.word	.LANCHOR116
+	.word	.LANCHOR112
 	.word	.LANCHOR118
+	.word	.LANCHOR117
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
 	.section	.text.flash_boot_enter_slc_mode,"ax",%progbits
 	.align	1
@@ -5335,18 +5455,18 @@ flash_boot_enter_slc_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L766
+	ldr	r3, .L777
 	ldr	r2, [r3]
-	ldr	r3, .L766+4
+	ldr	r3, .L777+4
 	cmp	r2, r3
-	bne	.L764
+	bne	.L775
 	b	flash_enter_slc_mode
-.L764:
+.L775:
 	bx	lr
-.L767:
+.L778:
 	.align	2
-.L766:
-	.word	.LANCHOR29
+.L777:
+	.word	.LANCHOR119
 	.word	1446522928
 	.size	flash_boot_enter_slc_mode, .-flash_boot_enter_slc_mode
 	.section	.text.flash_boot_exit_slc_mode,"ax",%progbits
@@ -5361,18 +5481,18 @@ flash_boot_exit_slc_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L770
+	ldr	r3, .L781
 	ldr	r2, [r3]
-	ldr	r3, .L770+4
+	ldr	r3, .L781+4
 	cmp	r2, r3
-	bne	.L768
+	bne	.L779
 	b	flash_exit_slc_mode
-.L768:
+.L779:
 	bx	lr
-.L771:
+.L782:
 	.align	2
-.L770:
-	.word	.LANCHOR29
+.L781:
+	.word	.LANCHOR119
 	.word	1446522928
 	.size	flash_boot_exit_slc_mode, .-flash_boot_exit_slc_mode
 	.section	.text.FW_FlashBlockErase.constprop.41,"ax",%progbits
@@ -5385,27 +5505,28 @@ flash_boot_exit_slc_mode:
 FW_FlashBlockErase.constprop.41:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L773
-	push	{r4, lr}
+	push	{r3, r4, r5, lr}
 	mov	r4, r0
+	ldr	r3, .L784
 	movs	r0, #0
 	ldr	r3, [r3]
-	ldrb	r1, [r3, #9]	@ zero_extendqisi2
+	ldrb	r5, [r3, #9]	@ zero_extendqisi2
 	bl	flash_boot_enter_slc_mode
 	mov	r0, r4
+	mov	r1, r5
 	bl	__aeabi_uidiv
 	movs	r2, #0
 	mov	r1, r0
 	mov	r0, r2
 	bl	FlashEraseBlock
-	mov	r1, r0
+	mov	r4, r0
 	movs	r0, #0
 	bl	flash_boot_exit_slc_mode
-	uxtb	r0, r1
-	pop	{r4, pc}
-.L774:
+	uxtb	r0, r4
+	pop	{r3, r4, r5, pc}
+.L785:
 	.align	2
-.L773:
+.L784:
 	.word	.LANCHOR18
 	.size	FW_FlashBlockErase.constprop.41, .-FW_FlashBlockErase.constprop.41
 	.section	.text.ftl_memset,"ax",%progbits
@@ -5435,54 +5556,54 @@ BuildFlashLsbPageTable:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
 	mov	r4, r1
-	cbnz	r0, .L777
-	ldr	r3, .L814
-.L778:
+	cbnz	r0, .L788
+	ldr	r3, .L828
+.L789:
 	strh	r0, [r3, r0, lsl #1]	@ movhi
 	adds	r0, r0, #1
 	cmp	r0, #256
-	bne	.L778
-.L784:
+	bne	.L789
+.L795:
 	movs	r1, #255
 	mov	r2, #1024
-	ldr	r0, .L814+4
+	ldr	r0, .L828+4
 	uxth	r4, r4
 	bl	ftl_memset
-	ldr	r1, .L814
+	ldr	r1, .L828
 	movs	r3, #0
-	ldr	r0, .L814+4
-.L779:
+	ldr	r0, .L828+4
+.L790:
 	uxth	r2, r3
 	cmp	r4, r2
-	bhi	.L801
+	bhi	.L814
 	pop	{r4, pc}
-.L777:
+.L788:
 	cmp	r0, #1
-	bne	.L780
-	ldr	r1, .L814
+	bne	.L791
+	ldr	r1, .L828
 	movs	r3, #0
-.L783:
+.L794:
 	cmp	r3, #3
 	uxth	r2, r3
-	bls	.L781
+	bls	.L792
 	tst	r2, #1
 	ite	ne
 	movne	r0, #3
 	moveq	r0, #2
 	rsb	r2, r0, r2, lsl #1
 	uxth	r2, r2
-.L781:
+.L792:
 	strh	r2, [r1, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	cmp	r3, #256
-	bne	.L783
-	b	.L784
-.L780:
+	bne	.L794
+	b	.L795
+.L791:
 	cmp	r0, #2
-	bne	.L785
-	ldr	r1, .L814
+	bne	.L796
+	ldr	r1, .L828
 	movs	r2, #0
-.L787:
+.L798:
 	uxth	r3, r2
 	cmp	r2, #1
 	ittt	hi
@@ -5492,34 +5613,34 @@ BuildFlashLsbPageTable:
 	strh	r3, [r1, r2, lsl #1]	@ movhi
 	adds	r2, r2, #1
 	cmp	r2, #256
-	bne	.L787
-	b	.L784
-.L785:
+	bne	.L798
+	b	.L795
+.L796:
 	cmp	r0, #3
-	bne	.L788
-	ldr	r1, .L814
+	bne	.L799
+	ldr	r1, .L828
 	movs	r3, #0
-.L791:
+.L802:
 	cmp	r3, #5
 	uxth	r2, r3
-	bls	.L789
+	bls	.L800
 	tst	r2, #1
 	ite	ne
 	movne	r0, #5
 	moveq	r0, #4
 	rsb	r2, r0, r2, lsl #1
 	uxth	r2, r2
-.L789:
+.L800:
 	strh	r2, [r1, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	cmp	r3, #256
-	bne	.L791
-	b	.L784
-.L788:
+	bne	.L802
+	b	.L795
+.L799:
 	cmp	r0, #4
 	mov	r3, #0
-	bne	.L792
-	ldr	r2, .L814
+	bne	.L803
+	ldr	r2, .L828
 	strh	r3, [r2]	@ movhi
 	movs	r3, #1
 	strh	r3, [r2, #2]	@ movhi
@@ -5534,7 +5655,7 @@ BuildFlashLsbPageTable:
 	movs	r3, #8
 	strh	r0, [r2, #8]	@ movhi
 	strh	r3, [r2, #14]!	@ movhi
-.L794:
+.L805:
 	tst	r3, #1
 	ite	ne
 	movne	r1, #7
@@ -5544,56 +5665,75 @@ BuildFlashLsbPageTable:
 	uxth	r3, r3
 	strh	r1, [r2, #2]!	@ movhi
 	cmp	r3, #256
-	bne	.L794
-	b	.L784
-.L792:
+	bne	.L805
+	b	.L795
+.L803:
 	cmp	r0, #5
-	bne	.L795
-	ldr	r2, .L814
-.L796:
+	bne	.L806
+	ldr	r2, .L828
+.L807:
 	strh	r3, [r2, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	cmp	r3, #16
-	bne	.L796
-	ldr	r2, .L814+8
-.L797:
+	bne	.L807
+	ldr	r2, .L828+8
+.L808:
 	strh	r3, [r2, #2]!	@ movhi
 	adds	r3, r3, #2
 	uxth	r3, r3
 	cmp	r3, #496
-	bne	.L797
-	b	.L784
-.L795:
+	bne	.L808
+	b	.L795
+.L806:
 	cmp	r0, #6
-	bne	.L784
-	ldr	r0, .L814
+	bne	.L809
+	ldr	r0, .L828
 	mov	r1, r3
-.L800:
+.L812:
 	cmp	r1, #5
 	uxth	r2, r1
-	bls	.L798
+	bls	.L810
 	tst	r2, #1
 	ite	ne
 	movne	r2, #12
 	moveq	r2, #10
 	subs	r2, r3, r2
 	uxth	r2, r2
-.L798:
+.L810:
 	strh	r2, [r0, r1, lsl #1]	@ movhi
 	adds	r1, r1, #1
 	cmp	r1, #256
 	add	r3, r3, #3
 	uxth	r3, r3
-	bne	.L800
-	b	.L784
-.L801:
+	bne	.L812
+	b	.L795
+.L809:
+	cmp	r0, #9
+	bne	.L795
+	ldr	r2, .L828
+	movw	r1, #509
+	strh	r3, [r2]	@ movhi
+	movs	r3, #1
+	strh	r3, [r2, #2]	@ movhi
+	mov	r3, r2
+	movs	r2, #2
+	strh	r2, [r3, #4]!	@ movhi
+	movs	r2, #3
+.L813:
+	strh	r2, [r3, #2]!	@ movhi
+	adds	r2, r2, #2
+	uxth	r2, r2
+	cmp	r2, r1
+	bne	.L813
+	b	.L795
+.L814:
 	ldrh	r2, [r1, r3, lsl #1]
 	adds	r3, r3, #1
 	strh	r2, [r0, r2, lsl #1]	@ movhi
-	b	.L779
-.L815:
+	b	.L790
+.L829:
 	.align	2
-.L814:
+.L828:
 	.word	.LANCHOR16
 	.word	.LANCHOR120
 	.word	.LANCHOR16+30
@@ -5609,127 +5749,115 @@ BuildFlashLsbPageTable:
 FlashDieInfoInit:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L844
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r3, #0
-	ldr	r2, .L834
-	ldr	r4, .L834+4
-	strb	r3, [r2]
-	str	r2, [sp]
-	strb	r3, [r4]
-	ldr	r3, .L834+8
-	ldr	r7, .L834+12
-	ldrh	r3, [r3, #10]
-	cmp	r3, #256
-	bls	.L817
-	mov	r3, #512
-.L833:
+	movs	r4, #0
+	ldr	r5, .L844+4
+	ldr	fp, .L844+36
+	ldrh	r0, [r3, #10]
+	strb	r4, [r5]
+	strb	r4, [fp]
+	bl	FlashBlockAlignInit
 	movs	r2, #8
-	movs	r1, #0
-	ldr	r0, .L834+16
-	movs	r6, #0
-	str	r3, [r7]
+	mov	r1, r4
+	ldr	r0, .L844+8
 	bl	ftl_memset
 	movs	r2, #32
-	movs	r1, #0
-	ldr	r0, .L834+20
+	mov	r1, r4
+	ldr	r0, .L844+12
 	bl	ftl_memset
 	movs	r2, #128
-	movs	r1, #0
-	ldr	r0, .L834+24
+	mov	r1, r4
+	ldr	r0, .L844+16
 	bl	ftl_memset
-	ldr	r3, .L834+28
-	ldr	fp, .L834+36
-	ldr	r5, [r3]
-	ldr	r3, .L834+16
-	ldrb	r10, [r5]	@ zero_extendqisi2
-	add	r8, r5, #1
-.L821:
-	mov	r2, r10
-	add	r1, fp, r6, lsl #3
-	mov	r0, r8
+	ldr	r3, .L844+20
+	ldr	r10, .L844+32
+	ldr	r6, [r3]
+	ldr	r3, .L844+8
+	ldrb	r8, [r6]	@ zero_extendqisi2
+	adds	r7, r6, #1
+.L832:
+	mov	r2, r8
+	add	r1, r10, r4, lsl #3
+	mov	r0, r7
 	str	r3, [sp, #4]
 	bl	FlashMemCmp8
 	ldr	r3, [sp, #4]
-	cbnz	r0, .L820
-	ldrb	r2, [r4]	@ zero_extendqisi2
-	ldr	r1, .L834+20
-	strb	r6, [r3, r2]
+	cbnz	r0, .L831
+	ldrb	r2, [r5]	@ zero_extendqisi2
+	ldr	r1, .L844+12
+	strb	r4, [r3, r2]
 	str	r0, [r1, r2, lsl #2]
 	adds	r1, r2, #1
-	strb	r1, [r4]
-.L820:
-	adds	r6, r6, #1
-	cmp	r6, #4
-	bne	.L821
-	ldrb	r3, [r4]	@ zero_extendqisi2
-	ldr	r2, [sp]
-	strb	r3, [r2]
-	ldrb	r3, [r5, #8]	@ zero_extendqisi2
+	strb	r1, [r5]
+.L831:
+	adds	r4, r4, #1
+	cmp	r4, #4
+	bne	.L832
+	ldrb	r3, [r5]	@ zero_extendqisi2
+	strb	r3, [fp]
+	ldrb	r3, [r6, #8]	@ zero_extendqisi2
 	cmp	r3, #2
-	beq	.L822
-.L826:
-	ldrh	r2, [r5, #14]
-	ldrb	r3, [r4]	@ zero_extendqisi2
+	beq	.L833
+.L837:
+	ldrh	r2, [r6, #14]
+	ldrb	r3, [r5]	@ zero_extendqisi2
 	smulbb	r3, r3, r2
-	ldrb	r2, [r5, #13]	@ zero_extendqisi2
+	ldrb	r2, [r6, #13]	@ zero_extendqisi2
 	smulbb	r3, r3, r2
-	ldr	r2, .L834+32
+	ldr	r2, .L844+24
 	strh	r3, [r2]	@ movhi
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L817:
-	cmp	r3, #128
-	it	hi
-	movhi	r3, #256
-	b	.L833
-.L822:
-	ldr	fp, [r7]
-	movs	r6, #0
-	ldr	r7, .L834+20
-	ldr	r3, .L834+16
-.L825:
-	str	r3, [sp]
-	mov	r2, r10
-	ldr	r3, .L834+36
-	mov	r0, r8
-	add	r1, r3, r6, lsl #3
+.L833:
+	ldr	r3, .L844+28
+	movs	r4, #0
+	ldr	r10, .L844+12
+	ldr	fp, [r3]
+	ldr	r3, .L844+8
+.L836:
+	str	r3, [sp, #4]
+	mov	r2, r8
+	ldr	r3, .L844+32
+	mov	r0, r7
+	add	r1, r3, r4, lsl #3
 	bl	FlashMemCmp8
-	ldr	r3, [sp]
-	cbnz	r0, .L823
-	ldrh	r2, [r5, #14]
-	ldrb	r1, [r4]	@ zero_extendqisi2
+	ldr	r3, [sp, #4]
+	cbnz	r0, .L834
+	ldrh	r2, [r6, #14]
+	ldrb	r1, [r5]	@ zero_extendqisi2
 	and	r0, r2, #65280
-	ldrb	r2, [r5, #13]	@ zero_extendqisi2
+	ldrb	r2, [r6, #13]	@ zero_extendqisi2
 	mul	r2, fp, r2
 	muls	r2, r0, r2
-	str	r2, [r7, r1, lsl #2]
-	ldrb	r0, [r5, #23]	@ zero_extendqisi2
-	cbz	r0, .L824
+	str	r2, [r10, r1, lsl #2]
+	ldrb	r0, [r6, #23]	@ zero_extendqisi2
+	cbz	r0, .L835
 	lsls	r2, r2, #1
-	str	r2, [r7, r1, lsl #2]
-.L824:
-	adds	r2, r1, #1
-	strb	r6, [r3, r1]
-	strb	r2, [r4]
-.L823:
-	adds	r6, r6, #1
-	cmp	r6, #4
-	bne	.L825
-	b	.L826
+	str	r2, [r10, r1, lsl #2]
 .L835:
-	.align	2
+	adds	r2, r1, #1
+	strb	r4, [r3, r1]
+	strb	r2, [r5]
 .L834:
-	.word	.LANCHOR121
-	.word	.LANCHOR25
+	adds	r4, r4, #1
+	cmp	r4, #4
+	bne	.L836
+	b	.L837
+.L845:
+	.align	2
+.L844:
 	.word	.LANCHOR31
-	.word	.LANCHOR3
+	.word	.LANCHOR25
 	.word	.LANCHOR26
 	.word	.LANCHOR17
 	.word	.LANCHOR23
 	.word	.LANCHOR18
 	.word	.LANCHOR122
+	.word	.LANCHOR3
 	.word	.LANCHOR22
+	.word	.LANCHOR121
 	.size	FlashDieInfoInit, .-FlashDieInfoInit
 	.section	.text.ReadFlashInfo,"ax",%progbits
 	.align	1
@@ -5747,10 +5875,10 @@ ReadFlashInfo:
 	movs	r1, #0
 	mov	r4, r0
 	bl	ftl_memset
-	ldr	r3, .L839
+	ldr	r3, .L849
 	movs	r2, #0
 	ldr	r1, [r3]
-	ldr	r3, .L839+4
+	ldr	r3, .L849+4
 	ldrb	r0, [r1, #9]	@ zero_extendqisi2
 	ldr	r3, [r3]
 	smulbb	r3, r3, r0
@@ -5758,10 +5886,10 @@ ReadFlashInfo:
 	strb	r3, [r4, #4]
 	lsrs	r3, r3, #8
 	strb	r3, [r4, #5]
-	ldr	r3, .L839+8
+	ldr	r3, .L849+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	strb	r3, [r4, #7]
-	ldr	r3, .L839+12
+	ldr	r3, .L849+12
 	ldrb	r5, [r3]	@ zero_extendqisi2
 	strb	r5, [r4]
 	ldrb	r5, [r3, #1]	@ zero_extendqisi2
@@ -5775,32 +5903,32 @@ ReadFlashInfo:
 	movs	r3, #32
 	strb	r3, [r4, #8]
 	ldrb	r3, [r1, #7]	@ zero_extendqisi2
-	ldr	r0, .L839+16
+	ldr	r0, .L849+16
 	strb	r2, [r4, #10]
 	strb	r3, [r4, #9]
-	ldr	r3, .L839+20
+	ldr	r3, .L849+20
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	mov	r3, r2
-.L837:
+.L847:
 	uxtb	r2, r3
 	cmp	r1, r2
-	bhi	.L838
+	bhi	.L848
 	pop	{r4, r5, r6, pc}
-.L838:
+.L848:
 	ldrb	r2, [r3, r0]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	ldrb	r6, [r4, #10]	@ zero_extendqisi2
 	lsl	r2, r5, r2
 	orrs	r2, r2, r6
 	strb	r2, [r4, #10]
-	b	.L837
-.L840:
+	b	.L847
+.L850:
 	.align	2
-.L839:
+.L849:
 	.word	.LANCHOR18
 	.word	.LANCHOR3
 	.word	.LANCHOR33
-	.word	.LANCHOR69
+	.word	.LANCHOR68
 	.word	.LANCHOR26
 	.word	.LANCHOR25
 	.size	ReadFlashInfo, .-ReadFlashInfo
@@ -5815,35 +5943,35 @@ ReadFlashInfo:
 FtlBbt2Bitmap:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L847
+	ldr	r3, .L857
 	push	{r4, r5, r6, r7, r8, lr}
 	mov	r5, r0
-	ldr	r7, .L847+4
+	ldr	r7, .L857+4
 	mov	r6, r1
 	subs	r4, r5, #2
 	addw	r5, r5, #1022
 	ldrh	r2, [r3]
 	movs	r1, #0
-	ldr	r8, .L847+20
+	ldr	r8, .L857+20
 	mov	r0, r6
 	lsls	r2, r2, #2
 	bl	ftl_memset
-.L844:
+.L854:
 	ldrh	r3, [r4, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L841
+	beq	.L851
 	ldrh	r2, [r7]
 	cmp	r2, r3
-	bhi	.L843
+	bhi	.L853
 	mov	r1, r8
 	movs	r2, #79
-	ldr	r0, .L847+8
+	ldr	r0, .L857+8
 	bl	printf
-	ldr	r1, .L847+12
-	ldr	r0, .L847+16
+	ldr	r1, .L857+12
+	ldr	r0, .L857+16
 	bl	printf
-.L843:
+.L853:
 	ldrh	r3, [r4, #2]!
 	movs	r2, #1
 	cmp	r5, r4
@@ -5853,12 +5981,12 @@ FtlBbt2Bitmap:
 	ldr	r2, [r6, r1, lsl #2]
 	orr	r2, r2, r3
 	str	r2, [r6, r1, lsl #2]
-	bne	.L844
-.L841:
+	bne	.L854
+.L851:
 	pop	{r4, r5, r6, r7, r8, pc}
-.L848:
+.L858:
 	.align	2
-.L847:
+.L857:
 	.word	.LANCHOR123
 	.word	.LANCHOR51
 	.word	.LC5
@@ -5878,7 +6006,7 @@ FtlBbtMemInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r0, .L850
+	ldr	r0, .L860
 	movw	r3, #65535
 	movs	r2, #16
 	movs	r1, #255
@@ -5887,10 +6015,10 @@ FtlBbtMemInit:
 	strh	r3, [r0, #6]	@ movhi
 	adds	r0, r0, #12
 	b	ftl_memset
-.L851:
+.L861:
 	.align	2
-.L850:
-	.word	.LANCHOR75
+.L860:
+	.word	.LANCHOR74
 	.size	FtlBbtMemInit, .-FtlBbtMemInit
 	.section	.text.FtlFreeSysBlkQueueInit,"ax",%progbits
 	.align	1
@@ -5903,7 +6031,7 @@ FtlBbtMemInit:
 FtlFreeSysBlkQueueInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L853
+	ldr	r3, .L863
 	mov	r2, #2048
 	push	{r4, lr}
 	movs	r4, #0
@@ -5916,10 +6044,10 @@ FtlFreeSysBlkQueueInit:
 	bl	ftl_memset
 	mov	r0, r4
 	pop	{r4, pc}
-.L854:
+.L864:
 	.align	2
-.L853:
-	.word	.LANCHOR76
+.L863:
+	.word	.LANCHOR75
 	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
 	.section	.text.ftl_free_no_use_map_blk,"ax",%progbits
 	.align	1
@@ -5943,12 +6071,12 @@ ftl_free_no_use_map_blk:
 	mov	r0, r5
 	bl	ftl_memset
 	movs	r3, #0
-.L856:
+.L866:
 	ldrh	r1, [r4, #6]
 	uxth	r2, r3
 	cmp	r1, r2
-	bhi	.L860
-	ldr	r3, .L875
+	bhi	.L870
+	ldr	r3, .L885
 	movs	r6, #0
 	mov	r10, r6
 	ldrh	r2, [r3]
@@ -5956,59 +6084,59 @@ ftl_free_no_use_map_blk:
 	strh	r2, [r5, r3, lsl #1]	@ movhi
 	mov	r2, r6
 	ldrh	fp, [r5]
-.L861:
+.L871:
 	ldrh	r3, [r4, #10]
 	uxth	ip, r6
 	cmp	r3, ip
-	bhi	.L865
+	bhi	.L875
 	mov	r0, r10
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L860:
+.L870:
 	uxth	r2, r3
 	ldr	r1, [r6, r2, lsl #2]
 	movs	r2, #0
 	ubfx	r1, r1, #10, #16
-.L857:
+.L867:
 	ldrh	ip, [r4, #10]
 	uxth	r0, r2
 	cmp	ip, r0
-	bhi	.L859
+	bhi	.L869
 	adds	r3, r3, #1
-	b	.L856
-.L859:
+	b	.L866
+.L869:
 	uxth	r0, r2
 	ldrh	ip, [r7, r0, lsl #1]
 	cmp	ip, r1
-	bne	.L858
-	cbz	r1, .L858
+	bne	.L868
+	cbz	r1, .L868
 	ldrh	ip, [r5, r0, lsl #1]
 	add	ip, ip, #1
 	strh	ip, [r5, r0, lsl #1]	@ movhi
-.L858:
+.L868:
 	adds	r2, r2, #1
-	b	.L857
-.L865:
+	b	.L867
+.L875:
 	uxth	r1, r6
 	ldrh	r3, [r5, r1, lsl #1]
 	lsl	r8, r1, #1
 	cmp	fp, r3
-	bls	.L862
+	bls	.L872
 	ldrh	r0, [r7, r1, lsl #1]
 	add	r8, r8, r7
-	cbnz	r0, .L863
-.L864:
+	cbnz	r0, .L873
+.L874:
 	adds	r6, r6, #1
-	b	.L861
-.L862:
+	b	.L871
+.L872:
 	cmp	r3, #0
-	bne	.L864
+	bne	.L874
 	ldrh	r0, [r7, r1, lsl #1]
 	add	r8, r8, r7
 	cmp	r0, #0
-	beq	.L864
-.L866:
+	beq	.L874
+.L876:
 	movs	r1, #1
 	str	r2, [sp, #4]
 	bl	FtlFreeSysBlkQueueIn
@@ -6017,17 +6145,17 @@ ftl_free_no_use_map_blk:
 	ldrh	r3, [r4, #8]
 	subs	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	b	.L864
-.L863:
+	b	.L874
+.L873:
 	mov	r10, ip
 	mov	fp, r3
 	cmp	r3, #0
-	beq	.L866
-	b	.L864
-.L876:
+	beq	.L876
+	b	.L874
+.L886:
 	.align	2
-.L875:
-	.word	.LANCHOR54
+.L885:
+	.word	.LANCHOR53
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.section	.text.FtlL2PDataInit,"ax",%progbits
 	.align	1
@@ -6042,14 +6170,14 @@ FtlL2PDataInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r1, #0
-	ldr	r5, .L880
-	ldr	r4, .L880+4
+	ldr	r5, .L890
+	ldr	r4, .L890+4
 	ldr	r2, [r5]
-	ldr	r7, .L880+8
-	ldr	r6, .L880+12
+	ldr	r7, .L890+8
+	ldr	r6, .L890+12
 	ldr	r0, [r4]
 	lsls	r2, r2, #1
-	ldr	r8, .L880+44
+	ldr	r8, .L890+44
 	bl	ftl_memset
 	ldrh	r3, [r7]
 	movs	r1, #255
@@ -6057,7 +6185,7 @@ FtlL2PDataInit:
 	ldr	r0, [r8]
 	muls	r2, r3, r2
 	bl	ftl_memset
-	ldr	r3, .L880+16
+	ldr	r3, .L890+16
 	movw	r0, #65535
 	ldrh	r1, [r6]
 	ldr	ip, [r8]
@@ -6068,55 +6196,55 @@ FtlL2PDataInit:
 	adds	r1, r2, r3
 	movs	r3, #0
 	mov	lr, r3
-.L878:
+.L888:
 	adds	r2, r2, #12
 	adds	r6, r3, r7
 	cmp	r2, r1
-	bne	.L879
-	ldr	r3, .L880+20
+	bne	.L889
+	ldr	r3, .L890+20
 	ldr	r2, [r5]
 	strh	r0, [r3, #2]	@ movhi
 	strh	r2, [r3, #10]	@ movhi
 	movw	r2, #61634
 	strh	r2, [r3, #4]	@ movhi
-	ldr	r2, .L880+24
+	ldr	r2, .L890+24
 	strh	r0, [r3]	@ movhi
 	ldrh	r2, [r2]
 	strh	r2, [r3, #8]	@ movhi
-	ldr	r2, .L880+28
+	ldr	r2, .L890+28
 	ldrh	r2, [r2]
 	strh	r2, [r3, #6]	@ movhi
-	ldr	r2, .L880+32
+	ldr	r2, .L890+32
 	ldr	r2, [r2]
 	str	r2, [r3, #12]
-	ldr	r2, .L880+36
+	ldr	r2, .L890+36
 	ldr	r2, [r2]
 	str	r2, [r3, #16]
 	ldr	r2, [r4]
 	str	r2, [r3, #20]
-	ldr	r2, .L880+40
+	ldr	r2, .L890+40
 	ldr	r2, [r2]
 	str	r2, [r3, #24]
 	pop	{r4, r5, r6, r7, r8, pc}
-.L879:
+.L889:
 	bic	r3, r3, #3
 	str	lr, [r2, #-8]
 	add	r3, r3, ip
 	strh	r0, [r2, #-12]	@ movhi
 	str	r3, [r2, #-4]
 	mov	r3, r6
-	b	.L878
-.L881:
+	b	.L888
+.L891:
 	.align	2
-.L880:
-	.word	.LANCHOR65
+.L890:
+	.word	.LANCHOR64
 	.word	.LANCHOR125
-	.word	.LANCHOR58
-	.word	.LANCHOR68
-	.word	.LANCHOR97
+	.word	.LANCHOR57
+	.word	.LANCHOR67
+	.word	.LANCHOR96
 	.word	.LANCHOR127
 	.word	.LANCHOR128
-	.word	.LANCHOR67
+	.word	.LANCHOR66
 	.word	.LANCHOR129
 	.word	.LANCHOR130
 	.word	.LANCHOR131
@@ -6135,57 +6263,57 @@ FtlVariablesInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #0
-	ldr	r3, .L883
+	ldr	r3, .L893
 	movw	r2, #65535
 	mov	r1, r4
-	ldr	r5, .L883+4
+	ldr	r5, .L893+4
 	str	r4, [r3]
-	ldr	r3, .L883+8
+	ldr	r3, .L893+8
 	strh	r2, [r3]	@ movhi
 	mov	r2, #-1
-	ldr	r3, .L883+12
+	ldr	r3, .L893+12
 	str	r4, [r3]
-	ldr	r3, .L883+16
+	ldr	r3, .L893+16
 	str	r4, [r3]
-	ldr	r3, .L883+20
+	ldr	r3, .L893+20
 	str	r2, [r3]
-	ldr	r3, .L883+24
+	ldr	r3, .L893+24
 	str	r4, [r3]
-	ldr	r3, .L883+28
+	ldr	r3, .L893+28
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L883+32
+	ldr	r3, .L893+32
 	ldrh	r2, [r3]
-	ldr	r3, .L883+36
+	ldr	r3, .L893+36
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L883+40
+	ldr	r3, .L893+40
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L883+44
+	ldr	r3, .L893+44
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	mov	r1, r4
 	movs	r2, #48
-	ldr	r0, .L883+48
+	ldr	r0, .L893+48
 	bl	ftl_memset
 	mov	r2, #512
 	mov	r1, r4
-	ldr	r0, .L883+52
+	ldr	r0, .L893+52
 	bl	ftl_memset
 	bl	FtlGcBufInit
 	bl	FtlL2PDataInit
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L884:
+.L894:
 	.align	2
-.L883:
+.L893:
 	.word	.LANCHOR132
 	.word	.LANCHOR41
 	.word	.LANCHOR133
@@ -6193,12 +6321,12 @@ FtlVariablesInit:
 	.word	.LANCHOR135
 	.word	.LANCHOR136
 	.word	.LANCHOR28
+	.word	.LANCHOR70
+	.word	.LANCHOR61
 	.word	.LANCHOR71
-	.word	.LANCHOR62
-	.word	.LANCHOR72
-	.word	.LANCHOR79
+	.word	.LANCHOR78
 	.word	.LANCHOR137
-	.word	.LANCHOR81
+	.word	.LANCHOR80
 	.word	.LANCHOR138
 	.size	FtlVariablesInit, .-FtlVariablesInit
 	.section	.text.SupperBlkListInit,"ax",%progbits
@@ -6212,11 +6340,11 @@ FtlVariablesInit:
 SupperBlkListInit:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L896
+	ldr	r3, .L906
 	movs	r2, #6
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r1, #0
-	ldr	r6, .L896+4
+	ldr	r6, .L906+4
 	sub	sp, sp, #24
 	movs	r4, #0
 	ldrh	r3, [r3]
@@ -6226,39 +6354,39 @@ SupperBlkListInit:
 	mov	r10, r6
 	muls	r2, r3, r2
 	bl	ftl_memset
-	ldr	r3, .L896+8
-	ldr	r2, .L896+12
-	ldr	r1, .L896+16
+	ldr	r3, .L906+8
+	ldr	r2, .L906+12
+	ldr	r1, .L906+16
 	str	r4, [r3]
-	ldr	r3, .L896+20
+	ldr	r3, .L906+20
 	strh	r4, [r2]	@ movhi
 	strh	r4, [r1]	@ movhi
 	str	r4, [r3]
-	ldr	r3, .L896+24
+	ldr	r3, .L906+24
 	str	r2, [sp, #8]
 	str	r4, [r3]
-	ldr	r3, .L896+28
+	ldr	r3, .L906+28
 	mov	fp, r3
 	strh	r4, [r3]	@ movhi
-.L886:
-	ldr	r3, .L896+32
+.L896:
+	ldr	r3, .L906+32
 	sxth	r7, r4
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	bge	.L893
-	ldr	r3, .L896+36
+	bge	.L903
+	ldr	r3, .L906+36
 	uxth	r1, r4
 	str	r1, [sp, #12]
 	ldrh	r2, [r3]
-	ldr	r3, .L896+40
+	ldr	r3, .L906+40
 	ldrh	r3, [r3]
 	str	r3, [sp, #4]
 	movs	r3, #0
 	mov	r6, r3
-	b	.L894
-.L888:
+	b	.L904
+.L898:
 	str	r3, [sp, #20]
-	ldr	r3, .L896+44
+	ldr	r3, .L906+44
 	ldr	r1, [sp, #12]
 	str	r2, [sp, #16]
 	ldrb	r0, [r3, r0]	@ zero_extendqisi2
@@ -6266,101 +6394,101 @@ SupperBlkListInit:
 	bl	FtlBbmIsBadBlock
 	ldr	r2, [sp, #16]
 	ldr	r3, [sp, #20]
-	cbnz	r0, .L887
+	cbnz	r0, .L897
 	ldr	r1, [sp, #4]
 	add	r6, r6, r1
 	sxth	r6, r6
-.L887:
+.L897:
 	adds	r3, r3, #1
-.L894:
+.L904:
 	sxth	r0, r3
 	cmp	r0, r2
-	blt	.L888
+	blt	.L898
 	lsls	r3, r7, #1
-	cbz	r6, .L889
+	cbz	r6, .L899
 	mov	r1, r6
 	str	r3, [sp, #4]
 	mov	r0, #32768
 	bl	__aeabi_idiv
 	ldr	r3, [sp, #4]
 	sxth	r6, r0
-.L890:
+.L900:
 	ldr	r2, [r10]
 	add	r3, r3, r7
 	add	r2, r2, r3, lsl #1
-	ldr	r3, .L896+48
+	ldr	r3, .L906+48
 	strh	r6, [r2, #4]	@ movhi
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	beq	.L891
-	ldr	r3, .L896+52
+	beq	.L901
+	ldr	r3, .L906+52
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	beq	.L891
-	ldr	r3, .L896+56
+	beq	.L901
+	ldr	r3, .L906+56
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	beq	.L891
-	ldr	r3, .L896+60
+	beq	.L901
+	ldr	r3, .L906+60
 	uxth	r0, r4
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r7, lsl #1]
-	cbnz	r3, .L892
+	cbnz	r3, .L902
 	add	r8, r8, #1
 	uxth	r8, r8
 	bl	INSERT_FREE_LIST
-.L891:
+.L901:
 	adds	r4, r4, #1
-	b	.L886
-.L889:
-	ldr	r2, .L896+60
+	b	.L896
+.L899:
+	ldr	r2, .L906+60
 	movw	r1, #65535
 	ldr	r2, [r2]
 	strh	r1, [r2, r7, lsl #1]	@ movhi
-	b	.L890
-.L892:
+	b	.L900
+.L902:
 	adds	r5, r5, #1
 	uxth	r5, r5
 	bl	INSERT_DATA_LIST
-	b	.L891
-.L893:
+	b	.L901
+.L903:
 	ldr	r2, [sp, #8]
 	strh	r8, [fp]	@ movhi
 	strh	r5, [r2]	@ movhi
 	add	r5, r5, r8
 	cmp	r3, r5
-	bge	.L895
-	ldr	r1, .L896+64
-	movw	r2, #2614
-	ldr	r0, .L896+68
+	bge	.L905
+	ldr	r1, .L906+64
+	movw	r2, #2645
+	ldr	r0, .L906+68
 	bl	printf
-	ldr	r1, .L896+72
-	ldr	r0, .L896+76
+	ldr	r1, .L906+72
+	ldr	r0, .L906+76
 	bl	printf
-.L895:
+.L905:
 	movs	r0, #0
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L897:
+.L907:
 	.align	2
-.L896:
+.L906:
 	.word	.LANCHOR41
+	.word	.LANCHOR81
+	.word	.LANCHOR87
+	.word	.LANCHOR85
+	.word	.LANCHOR139
 	.word	.LANCHOR82
+	.word	.LANCHOR84
 	.word	.LANCHOR88
-	.word	.LANCHOR86
-	.word	.LANCHOR139
-	.word	.LANCHOR83
-	.word	.LANCHOR85
-	.word	.LANCHOR89
 	.word	.LANCHOR40
 	.word	.LANCHOR38
-	.word	.LANCHOR53
+	.word	.LANCHOR52
 	.word	.LANCHOR47
+	.word	.LANCHOR91
 	.word	.LANCHOR92
 	.word	.LANCHOR93
-	.word	.LANCHOR94
-	.word	.LANCHOR84
+	.word	.LANCHOR83
 	.word	.LANCHOR140
 	.word	.LC5
 	.word	.LC6
@@ -6377,16 +6505,16 @@ SupperBlkListInit:
 FtlGcPageVarInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L899
+	ldr	r2, .L909
 	movs	r3, #0
 	push	{r4, lr}
 	movs	r1, #255
-	ldr	r4, .L899+4
+	ldr	r4, .L909+4
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L899+8
+	ldr	r2, .L909+8
 	strh	r3, [r2]	@ movhi
 	ldrh	r2, [r4]
-	ldr	r3, .L899+12
+	ldr	r3, .L909+12
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
@@ -6394,19 +6522,19 @@ FtlGcPageVarInit:
 	movs	r2, #12
 	movs	r1, #255
 	muls	r2, r3, r2
-	ldr	r3, .L899+16
+	ldr	r3, .L909+16
 	ldr	r0, [r3]
 	bl	ftl_memset
 	pop	{r4, lr}
 	b	FtlGcBufInit
-.L900:
+.L910:
 	.align	2
-.L899:
+.L909:
+	.word	.LANCHOR109
+	.word	.LANCHOR54
 	.word	.LANCHOR110
-	.word	.LANCHOR55
+	.word	.LANCHOR108
 	.word	.LANCHOR111
-	.word	.LANCHOR109
-	.word	.LANCHOR112
 	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
 	.section	.text.idb_init,"ax",%progbits
 	.align	1
@@ -6422,13 +6550,13 @@ idb_init:
 	push	{r3, lr}
 	mov	r2, #262144
 	movs	r1, #0
-	ldr	r0, .L902
+	ldr	r0, .L912
 	bl	ftl_memset
 	movs	r0, #0
 	pop	{r3, pc}
-.L903:
+.L913:
 	.align	2
-.L902:
+.L912:
 	.word	idb_buf
 	.size	idb_init, .-idb_init
 	.section	.text.ftl_memcpy,"ax",%progbits
@@ -6458,13 +6586,13 @@ FlashReadIdbData:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	mov	r2, #2048
-	ldr	r1, .L906
+	ldr	r1, .L916
 	bl	ftl_memcpy
 	movs	r0, #0
 	pop	{r3, pc}
-.L907:
+.L917:
 	.align	2
-.L906:
+.L916:
 	.word	.LANCHOR141
 	.size	FlashReadIdbData, .-FlashReadIdbData
 	.section	.text.FlashLoadPhyInfoInRam,"ax",%progbits
@@ -6480,58 +6608,61 @@ FlashLoadPhyInfoInRam:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r6, #0
-	ldr	r7, .L916
-	ldr	r5, .L916+4
-.L911:
+	ldr	r7, .L926
+	ldr	r5, .L926+4
+.L921:
 	ldrb	r2, [r7, #-1]	@ zero_extendqisi2
 	mov	r1, r5
 	mov	r0, r7
 	lsl	r8, r6, #5
 	bl	FlashMemCmp8
 	mov	r4, r0
-	cbnz	r0, .L909
-	ldr	r5, .L916+8
+	cbnz	r0, .L919
+	ldr	r5, .L926+8
 	mov	r3, r4
-	ldr	r2, .L916+12
+	ldr	r2, .L926+12
 	add	r5, r5, r8
 	ldrb	r0, [r5, #22]	@ zero_extendqisi2
 	mov	r1, r2
-.L910:
+.L920:
 	lsls	r6, r3, #5
 	ldrb	r6, [r6, r2]	@ zero_extendqisi2
 	cmp	r6, r0
-	beq	.L913
+	beq	.L923
 	adds	r3, r3, #1
 	cmp	r3, #4
-	bne	.L910
-.L913:
+	bne	.L920
+.L923:
+	ldr	r6, .L926+16
 	add	r1, r1, r3, lsl #5
 	movs	r2, #32
-	ldr	r0, .L916+16
+	ldr	r0, .L926+20
 	bl	ftl_memcpy
 	movs	r2, #32
 	mov	r1, r5
-	ldr	r0, .L916+20
+	mov	r0, r6
 	bl	ftl_memcpy
-	b	.L908
-.L909:
+	ldrh	r0, [r6, #10]
+	bl	FlashBlockAlignInit
+	b	.L918
+.L919:
 	adds	r6, r6, #1
 	adds	r7, r7, #32
-	cmp	r6, #77
-	bne	.L911
+	cmp	r6, #81
+	bne	.L921
 	mov	r4, #-1
-.L908:
+.L918:
 	mov	r0, r4
 	pop	{r4, r5, r6, r7, r8, pc}
-.L917:
+.L927:
 	.align	2
-.L916:
+.L926:
 	.word	.LANCHOR142+1
 	.word	.LANCHOR22
 	.word	.LANCHOR142
 	.word	.LANCHOR143
-	.word	.LANCHOR7
 	.word	.LANCHOR31
+	.word	.LANCHOR7
 	.size	FlashLoadPhyInfoInRam, .-FlashLoadPhyInfoInRam
 	.section	.text.ftl_memcpy32,"ax",%progbits
 	.align	1
@@ -6546,15 +6677,15 @@ ftl_memcpy32:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	movs	r3, #0
 	push	{r4, lr}
-.L919:
+.L929:
 	cmp	r3, r2
-	bne	.L920
+	bne	.L930
 	pop	{r4, pc}
-.L920:
+.L930:
 	ldr	r4, [r1, r3, lsl #2]
 	str	r4, [r0, r3, lsl #2]
 	adds	r3, r3, #1
-	b	.L919
+	b	.L929
 	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.NandcCopy1KB,"ax",%progbits
 	.align	1
@@ -6574,15 +6705,15 @@ NandcCopy1KB:
 	add	r6, r0, #512
 	add	r0, r2, r4, lsl #9
 	ldr	r5, [sp, #16]
-	bne	.L922
-	cbz	r3, .L923
+	bne	.L932
+	cbz	r3, .L933
 	lsls	r1, r3, #30
-	bne	.L924
+	bne	.L934
 	mov	r2, #256
 	mov	r1, r3
 	bl	ftl_memcpy32
-.L923:
-	cbz	r5, .L921
+.L933:
+	cbz	r5, .L931
 	ldrb	r2, [r5, #1]	@ zero_extendqisi2
 	lsrs	r4, r4, #1
 	ldrb	r3, [r5]	@ zero_extendqisi2
@@ -6595,21 +6726,21 @@ NandcCopy1KB:
 	orr	r3, r3, r2, lsl #24
 	str	r3, [r6, r4]
 	pop	{r4, r5, r6, pc}
-.L924:
+.L934:
 	mov	r2, #1024
 	mov	r1, r3
 	bl	ftl_memcpy
-	b	.L923
-.L922:
-	cbz	r3, .L927
+	b	.L933
+.L932:
+	cbz	r3, .L937
 	lsls	r2, r3, #30
-	bne	.L928
+	bne	.L938
 	mov	r1, r0
 	mov	r2, #256
 	mov	r0, r3
 	bl	ftl_memcpy32
-.L927:
-	cbz	r5, .L921
+.L937:
+	cbz	r5, .L931
 	lsrs	r4, r4, #1
 	add	r4, r4, r4, lsl #1
 	lsls	r4, r4, #4
@@ -6621,14 +6752,14 @@ NandcCopy1KB:
 	lsrs	r3, r3, #24
 	strb	r2, [r5, #2]
 	strb	r3, [r5, #3]
-.L921:
+.L931:
 	pop	{r4, r5, r6, pc}
-.L928:
+.L938:
 	mov	r1, r0
 	mov	r2, #1024
 	mov	r0, r3
 	bl	ftl_memcpy
-	b	.L927
+	b	.L937
 	.size	NandcCopy1KB, .-NandcCopy1KB
 	.section	.text.NandcXferData,"ax",%progbits
 	.align	1
@@ -6643,7 +6774,7 @@ NandcXferData:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r7, r3
-	ldr	r3, .L975
+	ldr	r3, .L985
 	sub	sp, sp, #96
 	mov	r6, r0
 	mov	r10, r2
@@ -6651,14 +6782,14 @@ NandcXferData:
 	ldr	r5, [r3, r0, lsl #3]
 	lsls	r3, r7, #26
 	ldr	r4, [sp, #128]
-	bne	.L940
-	cbnz	r4, .L941
+	bne	.L950
+	cbnz	r4, .L951
 	add	r4, sp, #32
 	movs	r2, #64
 	movs	r1, #255
 	add	r0, sp, #32
 	bl	ftl_memset
-.L941:
+.L951:
 	movs	r3, #0
 	mov	r2, r10
 	ldr	r1, [sp, #12]
@@ -6670,10 +6801,10 @@ NandcXferData:
 	bl	NandcXferComp
 	ldr	r3, [sp, #12]
 	cmp	r3, #0
-	bne	.L965
-	ldr	r2, .L975+4
+	bne	.L975
+	ldr	r2, .L985+4
 	lsr	r0, r10, #1
-	ldr	ip, .L975+12
+	ldr	ip, .L985+12
 	ldr	r3, [r2]
 	cmp	r3, #25
 	ldr	r3, [sp, #12]
@@ -6681,31 +6812,31 @@ NandcXferData:
 	movcc	r7, #64
 	movcs	r7, #128
 	mov	r1, r3
-.L944:
+.L954:
 	cmp	r1, r0
 	add	r4, r4, #4
 	add	r6, r7, r3
-	bcc	.L945
-	ldr	r3, .L975+8
+	bcc	.L955
+	ldr	r3, .L985+8
 	lsr	r4, r10, #2
 	ldr	r0, [r2]
 	movs	r2, #0
 	mov	r8, r2
 	ldr	r1, [r3]
-.L946:
+.L956:
 	cmp	r2, r4
-	bcs	.L942
-	cbnz	r0, .L952
-.L942:
+	bcs	.L952
+	cbnz	r0, .L962
+.L952:
 	movs	r3, #0
 	str	r3, [r5, #16]
-.L953:
-	ldr	r3, .L975+8
+.L963:
+	ldr	r3, .L985+8
 	ldr	r3, [r3]
 	cmp	r3, #5
-	bls	.L939
+	bls	.L949
 	ldr	r3, [sp, #12]
-	cbnz	r3, .L939
+	cbnz	r3, .L949
 	ldr	r3, [r5]
 	and	r2, r3, #139264
 	cmp	r2, #139264
@@ -6713,12 +6844,12 @@ NandcXferData:
 	moveq	r8, #-1
 	orreq	r3, r3, #131072
 	streq	r3, [r5]
-.L939:
+.L949:
 	mov	r0, r8
 	add	sp, sp, #96
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L945:
+.L955:
 	bic	lr, r3, #3
 	ldr	r3, [ip, #4]
 	adds	r1, r1, #1
@@ -6731,20 +6862,20 @@ NandcXferData:
 	strb	lr, [r4, #-2]
 	strb	r3, [r4, #-1]
 	mov	r3, r6
-	b	.L944
-.L952:
+	b	.L954
+.L962:
 	add	r3, r2, #8
 	ldr	r3, [r5, r3, lsl #2]
 	str	r3, [sp, #28]
 	ldr	r3, [sp, #28]
 	lsls	r6, r3, #29
-	bmi	.L968
+	bmi	.L978
 	ldr	r3, [sp, #28]
 	ubfx	r3, r3, #15, #1
 	cmp	r3, #0
-	bne	.L968
+	bne	.L978
 	cmp	r1, #5
-	bls	.L948
+	bls	.L958
 	ldr	r6, [sp, #28]
 	ldr	r3, [sp, #28]
 	ubfx	r6, r6, #3, #5
@@ -6765,18 +6896,18 @@ NandcXferData:
 	ite	hi
 	ubfxhi	r6, r6, #27, #1
 	ubfxls	r6, r6, #29, #1
-.L974:
+.L984:
 	orr	r3, r3, r6, lsl #5
-.L950:
+.L960:
 	cmp	r8, r3
 	it	cc
 	movcc	r8, r3
-.L947:
+.L957:
 	adds	r2, r2, #1
-	b	.L946
-.L948:
+	b	.L956
+.L958:
 	cmp	r1, #3
-	bls	.L950
+	bls	.L960
 	ldr	r6, [sp, #28]
 	ldr	r3, [sp, #28]
 	ubfx	r6, r6, #3, #5
@@ -6797,33 +6928,33 @@ NandcXferData:
 	ite	hi
 	ubfxhi	r6, r6, #28, #1
 	ubfxls	r6, r6, #30, #1
-	b	.L974
-.L968:
+	b	.L984
+.L978:
 	mov	r8, #-1
-	b	.L947
-.L965:
+	b	.L957
+.L975:
 	mov	r8, #0
-	b	.L942
-.L940:
+	b	.L952
+.L950:
 	ldr	r3, [sp, #12]
 	cmp	r3, #1
-	bne	.L954
+	bne	.L964
 	cmp	r4, #0
 	mov	r8, #0
 	ite	ne
 	movne	r3, #4
 	moveq	r3, #0
 	str	r3, [sp, #16]
-.L955:
+.L965:
 	cmp	r8, r10
-	bcc	.L957
+	bcc	.L967
 	mov	r8, #0
-	b	.L953
-.L957:
+	b	.L963
+.L967:
 	and	fp, r8, #3
-	cbz	r7, .L970
+	cbz	r7, .L980
 	add	r3, r7, r8, lsl #9
-.L956:
+.L966:
 	str	r4, [sp]
 	mov	r2, fp
 	movs	r1, #1
@@ -6842,11 +6973,11 @@ NandcXferData:
 	bl	NandcXferComp
 	ldr	r3, [sp, #16]
 	add	r4, r4, r3
-	b	.L955
-.L970:
+	b	.L965
+.L980:
 	mov	r3, r7
-	b	.L956
-.L954:
+	b	.L966
+.L964:
 	mov	r8, #0
 	movs	r2, #2
 	mov	r3, r8
@@ -6862,16 +6993,16 @@ NandcXferData:
 	movne	r3, #4
 	moveq	r3, r8
 	str	r3, [sp, #20]
-.L958:
+.L968:
 	cmp	r4, r10
-	bcs	.L953
+	bcs	.L963
 	mov	r0, r6
 	adds	r4, r4, #2
 	bl	NandcXferComp
 	ldr	r3, [r5, #32]
 	cmp	r10, r4
 	str	r3, [sp, #28]
-	bls	.L959
+	bls	.L969
 	movs	r3, #0
 	movs	r2, #2
 	str	r3, [sp, #4]
@@ -6880,10 +7011,10 @@ NandcXferData:
 	mov	r0, r6
 	and	r3, r4, #3
 	bl	NandcXferStart
-.L959:
+.L969:
 	ldr	r3, [sp, #28]
 	lsls	r3, r3, #29
-	bmi	.L971
+	bmi	.L981
 	ldr	r3, [sp, #28]
 	ldr	r2, [sp, #28]
 	ubfx	r3, r3, #3, #5
@@ -6892,7 +7023,7 @@ NandcXferData:
 	cmp	r8, r3
 	it	cc
 	movcc	r8, r3
-.L960:
+.L970:
 	ldr	r3, [sp, #16]
 	cmp	r7, #0
 	sub	r2, r4, #2
@@ -6909,13 +7040,13 @@ NandcXferData:
 	ldr	r2, [sp, #20]
 	add	r3, r3, r2
 	str	r3, [sp, #16]
-	b	.L958
-.L971:
+	b	.L968
+.L981:
 	mov	r8, #-1
-	b	.L960
-.L976:
+	b	.L970
+.L986:
 	.align	2
-.L975:
+.L985:
 	.word	.LANCHOR6
 	.word	.LANCHOR32
 	.word	.LANCHOR34
@@ -6934,21 +7065,21 @@ FlashReadRawPage:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r8, r3
-	ldr	r3, .L979
+	ldr	r3, .L989
 	mov	r6, r1
 	mov	r7, r2
 	mov	r4, r0
 	ldrb	r5, [r3, #9]	@ zero_extendqisi2
-	cbnz	r0, .L978
-	ldr	r3, .L979+4
-	ldr	r2, .L979+8
+	cbnz	r0, .L988
+	ldr	r3, .L989+4
+	ldr	r2, .L989+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	ldr	r0, [r2]
 	muls	r0, r3, r0
 	cmp	r0, r1
 	it	hi
 	movhi	r5, #4
-.L978:
+.L988:
 	mov	r0, r4
 	bl	NandcWaitFlashReady
 	mov	r0, r4
@@ -6971,9 +7102,9 @@ FlashReadRawPage:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L980:
+.L990:
 	.align	2
-.L979:
+.L989:
 	.word	.LANCHOR31
 	.word	.LANCHOR2
 	.word	.LANCHOR3
@@ -6991,7 +7122,7 @@ FlashDdrTunningRead:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r7, r3
-	ldr	r3, .L1006
+	ldr	r3, .L1016
 	sub	sp, sp, #24
 	str	r0, [sp, #8]
 	ldr	r3, [r3]
@@ -6999,7 +7130,7 @@ FlashDdrTunningRead:
 	str	r2, [sp, #4]
 	ldr	r3, [r3, #304]
 	str	r3, [sp, #20]
-	ldr	r3, .L1006+4
+	ldr	r3, .L1016+4
 	ldr	r3, [r3]
 	cmp	r3, #8
 	ldr	r3, [sp, #56]
@@ -7007,9 +7138,9 @@ FlashDdrTunningRead:
 	movcc	fp, #6
 	movcs	fp, #12
 	cmp	r3, #0
-	beq	.L995
+	beq	.L1005
 	movs	r0, #1
-	ldr	r4, .L1006+8
+	ldr	r4, .L1016+8
 	bl	FlashSetInterfaceMode
 	movs	r0, #1
 	bl	NandcSetMode
@@ -7026,37 +7157,37 @@ FlashDdrTunningRead:
 	ldrb	r0, [r4]	@ zero_extendqisi2
 	bl	NandcSetMode
 	adds	r3, r6, #1
-	bne	.L984
-.L993:
+	bne	.L994
+.L1003:
 	mov	r6, #-1
-.L981:
+.L991:
 	mov	r0, r6
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L984:
+.L994:
 	mov	r2, r6
 	ldr	r1, [sp, #12]
-	ldr	r0, .L1006+12
+	ldr	r0, .L1016+12
 	bl	printf
-	ldr	r2, .L1006+16
+	ldr	r2, .L1016+16
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	cmp	r3, #2048
-	bcs	.L986
+	bcs	.L996
 	str	r3, [r2]
-	b	.L981
-.L986:
+	b	.L991
+.L996:
 	movs	r7, #0
 	str	r7, [r2]
 	str	r7, [sp, #4]
-.L983:
+.L993:
 	mov	r10, #0
 	mov	r8, #-1
 	mov	r5, r10
 	mov	r4, r10
 	str	r10, [sp, #16]
-.L991:
+.L1001:
 	uxtb	r0, fp
 	bl	NandcSetDdrPara
 	mov	r3, r7
@@ -7066,72 +7197,72 @@ FlashDdrTunningRead:
 	bl	FlashReadRawPage
 	adds	r3, r6, #1
 	cmp	r0, r3
-	bhi	.L987
-	cmp	r0, #2
 	bhi	.L997
+	cmp	r0, #2
+	bhi	.L1007
 	adds	r4, r4, #1
 	cmp	r4, #9
-	bls	.L997
+	bls	.L1007
 	mov	r3, r5
 	mov	r6, r0
 	sub	r5, fp, r4
 	mov	r8, #0
-.L989:
+.L999:
 	ldr	r2, [sp, #16]
 	cmp	r4, r2
 	it	ls
 	movls	r5, r3
-.L990:
-	cbz	r5, .L992
+.L1000:
+	cbz	r5, .L1002
 	mov	r1, r5
-	ldr	r0, .L1006+20
+	ldr	r0, .L1016+20
 	bl	printf
 	uxtb	r0, r5
 	bl	NandcSetDdrPara
-.L992:
+.L1002:
 	cmp	r8, #0
-	beq	.L981
+	beq	.L991
 	ldr	r2, [sp, #12]
 	ldr	r1, [sp, #8]
-	ldr	r0, .L1006+24
+	ldr	r0, .L1016+24
 	bl	printf
 	ldr	r3, [sp, #56]
 	cmp	r3, #0
-	beq	.L993
+	beq	.L1003
 	ldr	r3, [sp, #20]
 	ubfx	r0, r3, #8, #8
 	bl	NandcSetDdrPara
-	b	.L981
-.L995:
+	b	.L991
+.L1005:
 	mov	r6, #1024
-	b	.L983
-.L987:
+	b	.L993
+.L997:
 	ldr	r3, [sp, #16]
 	cmp	r4, r3
-	bls	.L998
+	bls	.L1008
 	cmp	r4, #7
 	sub	r5, r10, r4
-	bhi	.L990
+	bhi	.L1000
 	str	r4, [sp, #16]
-.L998:
+.L1008:
 	movs	r4, #0
-	b	.L988
-.L997:
+	b	.L998
+.L1007:
 	mov	r8, #0
 	mov	r10, fp
 	mov	r6, r0
 	mov	r7, r8
 	str	r8, [sp, #4]
-.L988:
+.L998:
 	add	fp, fp, #2
 	cmp	fp, #69
-	bls	.L991
+	bls	.L1001
 	mov	r3, r5
 	mov	r5, r10
-	b	.L989
-.L1007:
+	b	.L999
+.L1017:
 	.align	2
-.L1006:
+.L1016:
 	.word	.LANCHOR19
 	.word	.LANCHOR34
 	.word	.LANCHOR24
@@ -7159,16 +7290,16 @@ FlashReadPage:
 	bl	FlashReadRawPage
 	adds	r2, r0, #1
 	mov	r4, r0
-	bne	.L1009
-	ldr	r10, .L1027+20
+	bne	.L1019
+	ldr	r10, .L1037+20
 	ldrb	fp, [r10]	@ zero_extendqisi2
 	cmp	fp, #0
-	bne	.L1010
-.L1012:
-	ldr	r3, .L1027
+	bne	.L1020
+.L1022:
+	ldr	r3, .L1037
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1009
-	ldr	r3, .L1027+4
+	cbz	r3, .L1019
+	ldr	r3, .L1037+4
 	mov	r1, r6
 	mov	r2, r7
 	mov	r0, r5
@@ -7180,16 +7311,16 @@ FlashReadPage:
 	bl	FlashDdrTunningRead
 	adds	r1, r0, #1
 	mov	r4, r0
-	beq	.L1013
-	ldr	r3, .L1027+8
+	beq	.L1023
+	ldr	r3, .L1037+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r0, r3, lsr #1
-	bls	.L1009
-.L1013:
+	bls	.L1019
+.L1023:
 	ubfx	r0, r10, #8, #8
 	bl	NandcSetDdrPara
-	b	.L1009
-.L1010:
+	b	.L1019
+.L1020:
 	movs	r3, #0
 	mov	r2, r7
 	strb	r3, [r10]
@@ -7199,15 +7330,15 @@ FlashReadPage:
 	bl	FlashReadRawPage
 	adds	r3, r0, #1
 	strb	fp, [r10]
-	beq	.L1012
+	beq	.L1022
 	mov	r4, r0
-.L1009:
-	ldr	r10, .L1027+24
+.L1019:
+	ldr	r10, .L1037+24
 	ldr	fp, [r10]
 	cmp	fp, #0
-	beq	.L1008
+	beq	.L1018
 	adds	r2, r4, #1
-	bne	.L1008
+	bne	.L1018
 	mov	r3, r8
 	mov	r2, r7
 	mov	r1, r6
@@ -7217,13 +7348,13 @@ FlashReadPage:
 	mov	r4, r0
 	mov	r1, r0
 	mov	r2, r5
-	ldr	r0, .L1027+12
+	ldr	r0, .L1037+12
 	bl	printf
 	adds	r3, r4, #1
-	bne	.L1008
-	ldr	r3, .L1027+16
+	bne	.L1018
+	ldr	r3, .L1037+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1008
+	cbz	r3, .L1018
 	mov	r0, r5
 	bl	flash_enter_slc_mode
 	ldr	r4, [r10]
@@ -7235,19 +7366,19 @@ FlashReadPage:
 	mov	r4, r0
 	mov	r0, r5
 	bl	flash_exit_slc_mode
-.L1008:
+.L1018:
 	mov	r0, r4
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1028:
+.L1038:
 	.align	2
-.L1027:
+.L1037:
 	.word	.LANCHOR30
 	.word	.LANCHOR19
 	.word	.LANCHOR33
 	.word	.LC12
-	.word	.LANCHOR8
+	.word	.LANCHOR15
 	.word	.LANCHOR5
 	.word	.LANCHOR145
 	.size	FlashReadPage, .-FlashReadPage
@@ -7264,7 +7395,7 @@ FlashDdrParaScan:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r6, r0
-	ldr	r4, .L1040
+	ldr	r4, .L1050
 	movs	r5, #0
 	mov	r7, r1
 	ldrb	r0, [r4]	@ zero_extendqisi2
@@ -7282,33 +7413,33 @@ FlashDdrParaScan:
 	mov	r8, r0
 	mov	r1, r7
 	mov	r0, r6
-	ldr	r5, .L1040+4
+	ldr	r5, .L1050+4
 	bl	FlashReadRawPage
 	adds	r0, r0, #1
-	beq	.L1030
+	beq	.L1040
 	cmp	r8, #-1
-	bne	.L1031
-.L1030:
+	bne	.L1041
+.L1040:
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	lsls	r3, r3, #31
-	bpl	.L1031
+	bpl	.L1041
 	movs	r0, #1
 	bl	FlashSetInterfaceMode
 	movs	r0, #1
 	bl	NandcSetMode
 	movs	r3, #0
-.L1039:
+.L1049:
 	movs	r0, #0
 	strb	r3, [r5]
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1031:
-	movs	r3, #1
-	b	.L1039
 .L1041:
+	movs	r3, #1
+	b	.L1049
+.L1051:
 	.align	2
-.L1040:
+.L1050:
 	.word	.LANCHOR24
 	.word	.LANCHOR30
 	.size	FlashDdrParaScan, .-FlashDdrParaScan
@@ -7326,7 +7457,7 @@ FlashLoadPhyInfo:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #60
 	sub	sp, sp, #24
-	ldr	fp, .L1057+8
+	ldr	fp, .L1066+32
 	movs	r4, #0
 	movs	r7, #4
 	strb	r3, [sp, #20]
@@ -7335,25 +7466,25 @@ FlashLoadPhyInfo:
 	movs	r3, #24
 	strb	r3, [sp, #22]
 	movs	r3, #16
-	ldr	r1, .L1057
-	mov	r0, r4
 	strb	r3, [sp, #23]
+	mov	r0, r4
+	ldr	r3, [fp]
 	mov	r6, #-1
-	ldrh	r3, [fp, #10]
-	ldr	r8, .L1057+36
-	ldr	r5, .L1057+4
+	ldr	r8, .L1066+36
+	ldr	r10, .L1066+40
 	str	r3, [sp, #4]
-	ldr	r3, [r1]
-	str	r4, [r8]
+	ldr	r5, .L1066
+	ldr	r3, [r8]
+	str	r4, [r10]
 	str	r3, [r5]
 	bl	flash_enter_slc_mode
-	mov	r10, r1
-	str	r8, [sp, #12]
-.L1043:
+	str	r10, [sp, #12]
+	mov	r10, r8
+.L1053:
 	mov	r8, #0
 	adds	r3, r4, #1
 	str	r3, [sp, #8]
-.L1045:
+.L1055:
 	add	r3, sp, #20
 	ldrb	r0, [r3, r8]	@ zero_extendqisi2
 	bl	FlashBchSel
@@ -7363,95 +7494,96 @@ FlashLoadPhyInfo:
 	mov	r0, r3
 	bl	FlashReadRawPage
 	adds	r0, r0, #1
-	bne	.L1044
+	bne	.L1054
 	movs	r3, #0
 	ldr	r2, [r10]
 	ldr	r1, [sp, #8]
 	mov	r0, r3
 	bl	FlashReadRawPage
 	adds	r0, r0, #1
-	bne	.L1044
+	bne	.L1054
 	add	r8, r8, #1
 	cmp	r8, #4
-	bne	.L1045
-.L1046:
+	bne	.L1055
+.L1056:
 	ldr	r3, [sp, #4]
 	subs	r7, r7, #1
 	add	r4, r4, r3
-	bne	.L1043
+	bne	.L1053
 	mov	r0, r7
-	b	.L1056
-.L1047:
+	b	.L1065
+.L1057:
 	movw	r1, #2036
 	add	r0, r8, #12
-	bl	JSHash
+	bl	js_hash
 	ldr	r3, [r8, #8]
 	cmp	r3, r0
-	bne	.L1053
+	bne	.L1063
+	ldr	r6, .L1066+4
 	movs	r2, #32
 	add	r1, r8, #160
-	ldr	r0, .L1057+8
+	mov	r0, r6
 	bl	ftl_memcpy
 	ldr	r1, [r5]
 	movs	r2, #32
-	ldr	r0, .L1057+12
+	ldr	r0, .L1066+8
 	adds	r1, r1, #192
 	bl	ftl_memcpy
 	ldr	r1, [r5]
 	mov	r2, #852
-	ldr	r0, .L1057+16
+	ldr	r0, .L1066+12
 	adds	r1, r1, #224
 	bl	ftl_memcpy
+	ldrh	r0, [r6, #10]
+	bl	FlashBlockAlignInit
 	ldr	r6, [r5]
 	mov	r0, r4
-	ldr	r3, .L1057+20
-	ldrh	r1, [fp, #10]
+	ldr	r3, .L1066+16
+	ldr	r1, [fp]
 	ldr	r2, [r6, #1076]
 	strb	r2, [r3]
 	ldr	r3, [sp, #12]
 	str	r4, [r3]
 	bl	__aeabi_uidiv
-	ldr	r3, .L1057+24
-	adds	r2, r0, #1
-	cbz	r0, .L1049
-.L1055:
-	str	r2, [r3]
+	ldr	r3, .L1066+20
+	adds	r0, r0, #1
+	cmp	r0, #1
+	itte	ls
+	movls	r2, #2
+	strls	r2, [r3]
+	strhi	r0, [r3]
 	ldrh	r2, [r6, #14]
 	movs	r6, #0
-	ldr	r3, .L1057+28
+	ldr	r3, .L1066+24
 	strb	r2, [r3]
-	b	.L1046
-.L1049:
-	movs	r2, #2
-	b	.L1055
-.L1053:
+	b	.L1056
+.L1063:
 	mov	r6, #-1
-	b	.L1046
-.L1044:
+	b	.L1056
+.L1054:
 	ldr	r8, [r5]
-	ldr	r2, .L1057+32
+	ldr	r2, .L1066+28
 	ldr	r3, [r8]
 	cmp	r3, r2
-	bne	.L1046
+	bne	.L1056
 	cmp	r6, #0
-	bne	.L1047
-	ldrh	r1, [fp, #10]
+	bne	.L1057
+	ldr	r1, [fp]
 	mov	r0, r4
 	bl	__aeabi_uidiv
-	ldr	r3, .L1057+24
+	ldr	r3, .L1066+20
 	adds	r0, r0, #1
 	str	r0, [r3]
 	mov	r0, r6
-.L1056:
+.L1065:
 	bl	flash_exit_slc_mode
 	mov	r0, r6
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1058:
+.L1067:
 	.align	2
-.L1057:
-	.word	.LANCHOR147
+.L1066:
 	.word	.LANCHOR146
 	.word	.LANCHOR31
 	.word	.LANCHOR7
@@ -7460,6 +7592,8 @@ FlashLoadPhyInfo:
 	.word	.LANCHOR149
 	.word	.LANCHOR150
 	.word	1312902724
+	.word	.LANCHOR3
+	.word	.LANCHOR147
 	.word	.LANCHOR148
 	.size	FlashLoadPhyInfo, .-FlashLoadPhyInfo
 	.section	.text.ToshibaReadRetrial,"ax",%progbits
@@ -7480,8 +7614,8 @@ ToshibaReadRetrial:
 	mov	fp, r3
 	str	r1, [sp, #20]
 	bl	NandcWaitFlashReady
-	ldr	r3, .L1086
-	ldr	r2, .L1086+4
+	ldr	r3, .L1095
+	ldr	r2, .L1095+4
 	ldr	r4, [r3, r6, lsl #3]
 	add	r3, r3, r6, lsl #3
 	str	r2, [sp, #16]
@@ -7491,83 +7625,83 @@ ToshibaReadRetrial:
 	subs	r3, r3, #67
 	add	r5, r4, r5, lsl #8
 	cmp	r3, #1
-	bls	.L1076
-	ldr	r3, .L1086+8
+	bls	.L1085
+	ldr	r3, .L1095+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1077
+	cbz	r3, .L1086
 	movs	r0, #0
 	bl	NandcSetDdrMode
 	movs	r3, #1
-.L1077:
+.L1086:
 	str	r3, [sp, #8]
 	add	r3, r4, r7, lsl #8
 	movs	r2, #92
 	str	r2, [r3, #2056]
 	movs	r2, #197
 	str	r2, [r3, #2056]
-.L1060:
+.L1069:
 	mov	r8, #1
 	mov	r3, #-1
 	str	r3, [sp, #4]
-.L1062:
-	ldr	r3, .L1086+12
+.L1071:
+	ldr	r3, .L1095+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	cmp	r8, r3
-	bcc	.L1071
+	bcc	.L1080
 	ldr	r10, [sp, #4]
-.L1070:
+.L1079:
 	ldr	r3, [sp, #16]
 	movs	r1, #0
 	mov	r0, r5
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	subs	r2, r2, #67
 	cmp	r2, #1
-	bhi	.L1072
+	bhi	.L1081
 	bl	SandiskSetRRPara
-.L1073:
+.L1082:
 	add	r4, r4, r7, lsl #8
 	movs	r2, #255
 	str	r2, [r4, #2056]
-	ldr	r2, .L1086+16
+	ldr	r2, .L1095+16
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	add	r2, r2, r2, lsl #1
 	cmp	r10, r2, asr #2
-	bcc	.L1074
+	bcc	.L1083
 	cmp	r10, #-1
 	it	ne
 	movne	r10, #256
-.L1074:
+.L1083:
 	mov	r0, r6
 	bl	NandcWaitFlashReady
 	ldr	r3, [sp, #8]
-	cbz	r3, .L1059
+	cbz	r3, .L1068
 	movs	r0, #4
 	bl	NandcSetDdrMode
-.L1059:
+.L1068:
 	mov	r0, r10
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1076:
+.L1085:
 	movs	r3, #0
 	str	r3, [sp, #8]
-	b	.L1060
-.L1071:
+	b	.L1069
+.L1080:
 	ldr	r3, [sp, #16]
 	mov	r0, r5
 	uxtb	r1, r8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	subs	r3, r3, #67
 	cmp	r3, #1
-	bhi	.L1063
+	bhi	.L1072
 	bl	SandiskSetRRPara
-.L1064:
+.L1073:
 	ldr	r3, [sp, #16]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #34
-	bne	.L1065
-	ldr	r3, .L1086+12
+	bne	.L1074
+	ldr	r3, .L1095+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	subs	r3, r3, #3
 	cmp	r8, r3
@@ -7575,14 +7709,14 @@ ToshibaReadRetrial:
 	addeq	r3, r4, r7, lsl #8
 	moveq	r2, #179
 	streq	r2, [r3, #2056]
-.L1065:
+.L1074:
 	add	r3, r4, r7, lsl #8
 	movs	r2, #38
 	str	r2, [r3, #2056]
 	movs	r2, #93
 	str	r2, [r3, #2056]
 	ldr	r3, [sp, #8]
-	cbz	r3, .L1066
+	cbz	r3, .L1075
 	movs	r0, #4
 	bl	NandcSetDdrMode
 	mov	r3, fp
@@ -7593,10 +7727,10 @@ ToshibaReadRetrial:
 	mov	r10, r0
 	movs	r0, #0
 	bl	NandcSetDdrMode
-.L1067:
+.L1076:
 	cmp	r10, #-1
-	beq	.L1068
-	ldr	r2, .L1086+16
+	beq	.L1077
+	ldr	r2, .L1095+16
 	ldr	r3, [sp, #4]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r3, #-1
@@ -7605,31 +7739,31 @@ ToshibaReadRetrial:
 	str	r3, [sp, #4]
 	add	r2, r2, r2, lsl #1
 	cmp	r10, r2, asr #2
-	bcc	.L1070
+	bcc	.L1079
 	mov	fp, #0
 	str	fp, [sp, #12]
-.L1068:
+.L1077:
 	add	r8, r8, #1
-	b	.L1062
-.L1063:
+	b	.L1071
+.L1072:
 	bl	ToshibaSetRRPara
-	b	.L1064
-.L1066:
+	b	.L1073
+.L1075:
 	mov	r3, fp
 	ldr	r2, [sp, #12]
 	ldr	r1, [sp, #20]
 	mov	r0, r6
 	bl	FlashReadRawPage
 	mov	r10, r0
-	b	.L1067
-.L1072:
+	b	.L1076
+.L1081:
 	bl	ToshibaSetRRPara
-	b	.L1073
-.L1087:
+	b	.L1082
+.L1096:
 	.align	2
-.L1086:
+.L1095:
 	.word	.LANCHOR6
-	.word	.LANCHOR10
+	.word	.LANCHOR9
 	.word	.LANCHOR30
 	.word	.LANCHOR151
 	.word	.LANCHOR33
@@ -7652,35 +7786,35 @@ SamsungReadRetrial:
 	mov	fp, r1
 	movs	r6, #1
 	bl	NandcWaitFlashReady
-	ldr	r2, .L1101
+	ldr	r2, .L1110
 	mov	r4, #-1
 	add	r3, r2, r7, lsl #3
 	ldrb	r5, [r3, #4]	@ zero_extendqisi2
 	add	r3, r5, #8
 	ldr	r5, [r2, r7, lsl #3]
 	add	r5, r5, r3, lsl #8
-.L1089:
-	ldr	r3, .L1101+4
+.L1098:
+	ldr	r3, .L1110+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	cmp	r6, r3
-	bcc	.L1093
-.L1092:
+	bcc	.L1102
+.L1101:
 	movs	r1, #0
 	mov	r0, r5
 	bl	SamsungSetRRPara
-	ldr	r3, .L1101+8
+	ldr	r3, .L1110+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, asr #2
-	bcc	.L1088
+	bcc	.L1097
 	adds	r3, r4, #1
 	it	ne
 	movne	r4, #256
-.L1088:
+.L1097:
 	mov	r0, r4
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1093:
+.L1102:
 	uxtb	r1, r6
 	mov	r0, r5
 	bl	SamsungSetRRPara
@@ -7690,26 +7824,26 @@ SamsungReadRetrial:
 	mov	r0, r7
 	bl	FlashReadRawPage
 	adds	r2, r0, #1
-	beq	.L1090
-	ldr	r3, .L1101+8
+	beq	.L1099
+	ldr	r3, .L1110+8
 	cmp	r4, #-1
 	it	eq
 	moveq	r4, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r0, r3, asr #2
-	bcc	.L1096
+	bcc	.L1105
 	mov	r8, #0
 	mov	r10, r8
-.L1090:
+.L1099:
 	adds	r6, r6, #1
-	b	.L1089
-.L1096:
+	b	.L1098
+.L1105:
 	mov	r4, r0
-	b	.L1092
-.L1102:
+	b	.L1101
+.L1111:
 	.align	2
-.L1101:
+.L1110:
 	.word	.LANCHOR6
 	.word	.LANCHOR151
 	.word	.LANCHOR33
@@ -7727,28 +7861,28 @@ MicronReadRetrial:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r7, r3
-	ldr	r3, .L1128
+	ldr	r3, .L1137
 	sub	sp, sp, #40
 	mov	r5, r0
 	str	r2, [sp, #16]
 	ldrb	r2, [r3]	@ zero_extendqisi2
-	ldr	r3, .L1128+4
+	ldr	r3, .L1137+4
 	str	r1, [sp, #28]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1104
+	bne	.L1113
 	add	r2, r2, r2, lsl #1
 	asrs	r3, r2, #2
-.L1127:
-.L1105:
+.L1136:
+.L1114:
 	mov	r8, #0
 	str	r3, [sp, #12]
 	mov	r6, r8
-.L1115:
+.L1124:
 	mov	r0, r5
 	mov	r10, #0
 	bl	NandcWaitFlashReady
-	ldr	r3, .L1128+8
+	ldr	r3, .L1137+8
 	mov	r4, #-1
 	ldr	r2, [r3, r5, lsl #3]
 	add	r3, r3, r5, lsl #3
@@ -7756,12 +7890,12 @@ MicronReadRetrial:
 	str	r2, [sp, #24]
 	lsl	r3, fp, #8
 	str	r3, [sp, #32]
-.L1106:
-	ldr	r3, .L1128+12
+.L1115:
+	ldr	r3, .L1137+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r10, r3
-	bcc	.L1110
-.L1109:
+	bcc	.L1119
+.L1118:
 	ldr	r3, [sp, #24]
 	movs	r0, #200
 	add	fp, r3, fp, lsl #8
@@ -7776,7 +7910,7 @@ MicronReadRetrial:
 	cmp	r4, r3
 	str	r6, [fp, #2048]
 	str	r6, [fp, #2048]
-	bcc	.L1111
+	bcc	.L1120
 	adds	r1, r4, #1
 	mov	r3, r10
 	it	ne
@@ -7784,26 +7918,26 @@ MicronReadRetrial:
 	ldr	r2, [sp, #28]
 	str	r4, [sp]
 	mov	r1, r10
-	ldr	r0, .L1128+16
+	ldr	r0, .L1137+16
 	bl	printf
 	cmp	r8, #0
-	bne	.L1113
-	ldr	r3, .L1128+4
+	bne	.L1122
+	ldr	r3, .L1137+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1103
+	beq	.L1112
 	adds	r2, r4, #1
-	bne	.L1103
+	bne	.L1112
 	movs	r1, #3
 	mov	r0, r5
 	bl	micron_auto_read_calibration_config
 	mov	r8, #1
-	b	.L1115
-.L1104:
-	ldr	r3, .L1128+20
+	b	.L1124
+.L1113:
+	ldr	r3, .L1137+20
 	smull	r2, r3, r2, r3
-	b	.L1127
-.L1110:
+	b	.L1136
+.L1119:
 	ldr	r2, [sp, #32]
 	movs	r0, #200
 	ldr	r3, [sp, #24]
@@ -7828,48 +7962,48 @@ MicronReadRetrial:
 	mov	r3, r7
 	bl	FlashReadRawPage
 	adds	r3, r0, #1
-	beq	.L1107
+	beq	.L1116
 	ldr	r3, [sp, #12]
 	cmp	r4, #-1
 	it	eq
 	moveq	r4, r0
 	cmp	r0, r3
-	bcc	.L1117
+	bcc	.L1126
 	movs	r7, #0
 	str	r7, [sp, #16]
-.L1107:
+.L1116:
 	ldr	r10, [sp, #20]
-	b	.L1106
-.L1117:
+	b	.L1115
+.L1126:
 	movs	r7, #0
 	mov	r4, r0
 	str	r7, [sp, #16]
-	b	.L1109
-.L1113:
+	b	.L1118
+.L1122:
 	movs	r1, #0
 	mov	r0, r5
 	bl	micron_auto_read_calibration_config
 	adds	r3, r4, #1
 	it	ne
 	movne	r4, #256
-.L1103:
+.L1112:
 	mov	r0, r4
 	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1111:
+.L1120:
 	cmp	r8, #0
-	beq	.L1103
+	beq	.L1112
 	movs	r1, #0
 	mov	r0, r5
 	bl	micron_auto_read_calibration_config
 	mov	r4, #256
-	b	.L1103
-.L1129:
+	b	.L1112
+.L1138:
 	.align	2
-.L1128:
+.L1137:
 	.word	.LANCHOR33
-	.word	.LANCHOR8
+	.word	.LANCHOR15
 	.word	.LANCHOR6
 	.word	.LANCHOR151
 	.word	.LC13
@@ -7887,55 +8021,57 @@ HynixReadRetrial:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	fp, r2
-	ldr	r4, .L1147
+	mov	r10, r3
+	ldr	r4, .L1156
 	mov	r8, #0
 	mov	r6, #-1
-	mov	r10, r3
+	mov	fp, r2
 	mov	r7, r0
 	str	r1, [sp, #4]
-	ldrb	r2, [r4, #2]	@ zero_extendqisi2
-	adds	r3, r4, r0
-	ldrb	r5, [r3, #12]	@ zero_extendqisi2
-	str	r2, [sp]
-	ldr	r2, .L1147+4
-	ldr	r2, [r2]
-	ldrb	r2, [r2, #19]	@ zero_extendqisi2
-	cmp	r2, #7
-	it	eq
-	ldrbeq	r5, [r3, #20]	@ zero_extendqisi2
+	ldrb	r3, [r4, #2]	@ zero_extendqisi2
+	adds	r2, r4, r0
+	ldrb	r5, [r2, #12]	@ zero_extendqisi2
+	str	r3, [sp]
+	ldr	r3, .L1156+4
+	ldr	r3, [r3]
+	ldrb	r3, [r3, #19]	@ zero_extendqisi2
+	subs	r3, r3, #7
+	cmp	r3, #1
+	it	ls
+	ldrbls	r5, [r2, #20]	@ zero_extendqisi2
 	bl	NandcWaitFlashReady
-.L1132:
+.L1141:
 	ldr	r3, [sp]
 	cmp	r8, r3
-	bcc	.L1137
-.L1136:
-	ldr	r3, .L1147+4
+	bcc	.L1146
+.L1145:
+	ldr	r3, .L1156+4
 	add	r4, r4, r7
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
-	cmp	r3, #7
-	ldr	r3, .L1147+8
-	ite	eq
-	strbeq	r5, [r4, #20]
-	strbne	r5, [r4, #12]
+	subs	r3, r3, #7
+	cmp	r3, #1
+	ldr	r3, .L1156+8
+	ite	ls
+	strbls	r5, [r4, #20]
+	strbhi	r5, [r4, #12]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r6, r3, asr #2
-	bcc	.L1130
+	bcc	.L1139
 	adds	r3, r6, #1
 	it	ne
 	movne	r6, #256
-.L1130:
+.L1139:
 	mov	r0, r6
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1137:
+.L1146:
 	ldr	r3, [sp]
 	adds	r5, r5, #1
 	uxtb	r5, r5
-	ldr	r2, .L1147+12
+	ldr	r2, .L1156+12
 	ldrb	r1, [r4, #1]	@ zero_extendqisi2
 	mov	r0, r7
 	cmp	r3, r5
@@ -7949,26 +8085,26 @@ HynixReadRetrial:
 	mov	r0, r7
 	bl	FlashReadRawPage
 	adds	r2, r0, #1
-	beq	.L1134
-	ldr	r3, .L1147+8
+	beq	.L1143
+	ldr	r3, .L1156+8
 	cmp	r6, #-1
 	it	eq
 	moveq	r6, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r0, r3, asr #2
-	bcc	.L1141
+	bcc	.L1150
 	mov	r10, #0
 	mov	fp, r10
-.L1134:
+.L1143:
 	add	r8, r8, #1
-	b	.L1132
-.L1141:
+	b	.L1141
+.L1150:
 	mov	r6, r0
-	b	.L1136
-.L1148:
+	b	.L1145
+.L1157:
 	.align	2
-.L1147:
+.L1156:
 	.word	.LANCHOR20
 	.word	.LANCHOR18
 	.word	.LANCHOR33
@@ -7987,24 +8123,24 @@ FlashProgPage:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r8, r3
-	ldr	r3, .L1152
+	ldr	r3, .L1161
 	mov	r5, r1
 	mov	r7, r2
 	mov	r4, r0
 	ldrb	r6, [r3, #9]	@ zero_extendqisi2
-	cbnz	r0, .L1150
-	ldr	r3, .L1152+4
-	ldr	r2, .L1152+8
+	cbnz	r0, .L1159
+	ldr	r3, .L1161+4
+	ldr	r2, .L1161+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	ldr	r1, [r2]
 	muls	r1, r3, r1
 	cmp	r1, r5
-	bls	.L1150
-	ldr	r3, .L1152+12
+	bls	.L1159
+	ldr	r3, .L1161+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L1151
+	cbnz	r3, .L1160
 	subs	r6, r6, #2
-.L1150:
+.L1159:
 	mov	r0, r4
 	bl	NandcWaitFlashReady
 	mov	r0, r4
@@ -8033,12 +8169,12 @@ FlashProgPage:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1151:
+.L1160:
 	movs	r6, #4
-	b	.L1150
-.L1153:
+	b	.L1159
+.L1162:
 	.align	2
-.L1152:
+.L1161:
 	.word	.LANCHOR31
 	.word	.LANCHOR2
 	.word	.LANCHOR3
@@ -8056,13 +8192,14 @@ FlashSavePhyInfo:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r7, .L1163
-	ldr	r4, .L1163+4
+	ldr	r7, .L1172
+	ldr	r4, .L1172+4
 	ldr	r3, [r7]
-	ldr	r10, .L1163+60
-	ldr	r8, .L1163+64
+	ldr	r10, .L1172+56
+	ldr	fp, .L1172+60
 	str	r3, [r4]
-	ldr	r3, .L1163+8
+	ldr	r3, .L1172+8
+	ldr	r8, .L1172+64
 	ldrb	r0, [r3]	@ zero_extendqisi2
 	bl	FlashBchSel
 	mov	r2, #2048
@@ -8071,60 +8208,58 @@ FlashSavePhyInfo:
 	bl	ftl_memset
 	ldr	r0, [r4]
 	movs	r2, #32
-	ldr	r3, .L1163+12
-	ldr	r1, .L1163+16
+	ldr	r3, .L1172+12
+	ldr	r1, .L1172+16
 	str	r10, [r0]
 	adds	r0, r0, #16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	strh	r3, [r0, #-4]	@ movhi
-	ldr	r3, .L1163+20
+	ldr	r3, .L1172+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	strh	r3, [r0, #-2]	@ movhi
-	ldr	r3, .L1163+24
+	ldr	r3, .L1172+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r3, [r0, #1060]
 	bl	ftl_memcpy
 	ldr	r0, [r4]
 	movs	r2, #8
-	ldr	r1, .L1163+28
+	ldr	r1, .L1172+28
 	adds	r0, r0, #80
 	bl	ftl_memcpy
 	ldr	r0, [r4]
 	movs	r2, #32
-	ldr	r1, .L1163+32
+	ldr	r1, .L1172+32
 	adds	r0, r0, #96
 	bl	ftl_memcpy
 	ldr	r0, [r4]
 	movs	r2, #32
-	ldr	r1, .L1163+36
+	ldr	r1, .L1172+36
 	adds	r0, r0, #160
 	bl	ftl_memcpy
 	ldr	r0, [r4]
 	movs	r2, #32
-	ldr	r1, .L1163+40
+	ldr	r1, .L1172+40
 	adds	r0, r0, #192
 	bl	ftl_memcpy
 	ldr	r0, [r4]
 	mov	r2, #852
-	ldr	r1, .L1163+44
+	ldr	r1, .L1172+44
 	adds	r0, r0, #224
 	bl	ftl_memcpy
 	ldr	r5, [r4]
 	movw	r1, #2036
 	add	r0, r5, #12
-	bl	JSHash
-	ldr	r1, .L1163+48
+	bl	js_hash
 	mov	r3, #1592
-	str	r3, [r5, #4]
 	str	r0, [r5, #8]
-	movs	r0, #0
-	ldr	r3, [r1]
+	str	r3, [r5, #4]
 	movs	r5, #0
+	ldr	r3, [fp]
 	mov	r6, r5
+	movs	r0, #0
 	str	r3, [r4]
 	bl	flash_enter_slc_mode
-	mov	fp, r1
-.L1157:
+.L1166:
 	ldr	r1, [r8]
 	movs	r2, #0
 	mov	r0, r2
@@ -8151,35 +8286,35 @@ FlashSavePhyInfo:
 	bl	FlashReadRawPage
 	adds	r0, r0, #1
 	add	r2, r6, #1
-	beq	.L1155
+	beq	.L1164
 	ldr	r3, [r4]
 	ldr	r1, [r3]
 	cmp	r1, r10
-	bne	.L1155
+	bne	.L1164
 	add	r0, r3, #12
 	movw	r1, #2036
 	str	r2, [sp, #4]
 	str	r3, [sp]
-	bl	JSHash
+	bl	js_hash
 	ldr	r3, [sp]
 	ldr	r2, [sp, #4]
 	ldr	r3, [r3, #8]
 	cmp	r3, r0
-	bne	.L1155
-	ldr	r3, .L1163+52
+	bne	.L1164
+	ldr	r3, .L1172+48
 	cmp	r5, #1
 	str	r2, [r3]
 	ldr	r3, [r8]
 	mul	r6, r6, r3
-	ldr	r3, .L1163+56
+	ldr	r3, .L1172+52
 	str	r6, [r3]
-	beq	.L1158
+	beq	.L1167
 	movs	r5, #1
-.L1155:
+.L1164:
 	cmp	r2, #4
 	mov	r6, r2
-	bne	.L1157
-.L1156:
+	bne	.L1166
+.L1165:
 	movs	r0, #0
 	bl	flash_exit_slc_mode
 	clz	r0, r5
@@ -8188,12 +8323,12 @@ FlashSavePhyInfo:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1158:
+.L1167:
 	movs	r5, #2
-	b	.L1156
-.L1164:
+	b	.L1165
+.L1173:
 	.align	2
-.L1163:
+.L1172:
 	.word	.LANCHOR147
 	.word	.LANCHOR146
 	.word	.LANCHOR152
@@ -8206,10 +8341,10 @@ FlashSavePhyInfo:
 	.word	.LANCHOR31
 	.word	.LANCHOR7
 	.word	.LANCHOR20
-	.word	.LANCHOR153
 	.word	.LANCHOR149
 	.word	.LANCHOR148
 	.word	1312902724
+	.word	.LANCHOR153
 	.word	.LANCHOR3
 	.size	FlashSavePhyInfo, .-FlashSavePhyInfo
 	.section	.text.FlashReadIdbDataRaw,"ax",%progbits
@@ -8221,64 +8356,58 @@ FlashSavePhyInfo:
 	.fpu softvfp
 	.type	FlashReadIdbDataRaw, %function
 FlashReadIdbDataRaw:
-	@ args = 0, pretend = 0, frame = 24
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #60
-	sub	sp, sp, #24
-	ldr	r2, .L1177
-	mov	r10, r0
-	strb	r3, [sp, #20]
+	strb	r3, [sp, #12]
 	movs	r3, #40
-	strb	r3, [sp, #21]
+	mov	r10, r0
+	strb	r3, [sp, #13]
 	movs	r3, #24
-	strb	r3, [sp, #22]
+	strb	r3, [sp, #14]
 	movs	r3, #16
-	strb	r3, [sp, #23]
-	ldr	r3, .L1177+4
-	ldr	r1, [r2]
-	str	r2, [sp, #8]
+	strb	r3, [sp, #15]
+	ldr	r3, .L1192
 	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r3, [sp]
+	ldr	r3, .L1192+4
+	ldr	r2, [r3]
 	str	r3, [sp, #4]
-	ldr	r3, .L1177+8
-	cmp	r1, r3
-	str	r3, [sp, #12]
-	bne	.L1166
+	cbz	r2, .L1175
 	movs	r0, #0
 	bl	flash_enter_slc_mode
-.L1166:
+.L1175:
 	mov	r7, #-1
 	movs	r4, #2
 	mov	r2, #2048
 	movs	r1, #0
 	mov	r0, r10
 	bl	ftl_memset
-.L1167:
-	ldr	r3, .L1177+12
+.L1176:
+	ldr	r3, .L1192+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r4, r3
-	bcc	.L1172
-.L1171:
-	ldr	r0, [sp, #4]
+	bcc	.L1181
+.L1180:
+	ldr	r0, [sp]
 	bl	FlashBchSel
-	ldr	r3, [sp, #8]
-	ldr	r2, [sp, #12]
+	ldr	r3, [sp, #4]
 	ldr	r3, [r3]
-	cmp	r3, r2
-	bne	.L1165
+	cbz	r3, .L1174
 	movs	r0, #0
 	bl	flash_exit_slc_mode
-.L1165:
+.L1174:
 	mov	r0, r7
-	add	sp, sp, #24
+	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1172:
-	ldr	r5, .L1177+16
+.L1181:
+	ldr	r5, .L1192+12
 	movs	r6, #0
-	ldr	fp, .L1177+32
-.L1169:
-	add	r3, sp, #20
+	ldr	fp, .L1192+28
+.L1178:
+	add	r3, sp, #12
 	ldrb	r8, [r6, r3]	@ zero_extendqisi2
 	mov	r0, r8
 	bl	FlashBchSel
@@ -8289,47 +8418,46 @@ FlashReadIdbDataRaw:
 	muls	r1, r4, r1
 	bl	FlashReadRawPage
 	adds	r0, r0, #1
-	bne	.L1168
+	bne	.L1177
 	adds	r6, r6, #1
 	cmp	r6, #4
-	bne	.L1169
-.L1170:
+	bne	.L1178
+.L1179:
 	adds	r4, r4, #1
-	b	.L1167
-.L1175:
+	b	.L1176
+.L1184:
 	movs	r7, #0
-	b	.L1171
-.L1168:
+	b	.L1180
+.L1177:
 	ldr	r3, [r5]
 	ldr	r2, [r3]
-	ldr	r3, .L1177+20
+	ldr	r3, .L1192+16
 	cmp	r2, r3
-	bne	.L1170
+	bne	.L1179
 	mov	r1, r8
-	ldr	r0, .L1177+24
+	ldr	r0, .L1192+20
 	bl	printf
 	mov	r2, #2048
 	ldr	r1, [r5]
 	mov	r0, r10
 	bl	ftl_memcpy
 	ldr	r3, [r5]
-	ldr	r2, .L1177+12
+	ldr	r2, .L1192+8
 	ldr	r3, [r3, #512]
 	strb	r3, [r2]
-	ldr	r3, .L1177+28
+	ldr	r3, .L1192+24
 	ldr	r2, [r3]
 	cmp	r4, r2
-	bcs	.L1175
+	bcs	.L1184
 	str	r4, [r3]
 	movs	r7, #0
 	bl	FlashSavePhyInfo
-	b	.L1170
-.L1178:
+	b	.L1179
+.L1193:
 	.align	2
-.L1177:
-	.word	.LANCHOR29
+.L1192:
 	.word	.LANCHOR33
-	.word	1446522928
+	.word	.LANCHOR29
 	.word	.LANCHOR2
 	.word	.LANCHOR147
 	.word	-52655045
@@ -8348,70 +8476,71 @@ FlashReadIdbDataRaw:
 FlashPageProgMsbFFData:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	ldr	r3, .L1210
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r7, r0
+	mov	r8, r1
 	mov	r4, r2
-	ldr	r5, .L1189
-	mov	r6, r0
-	mov	r7, r1
-	ldr	r3, [r5]
-	ldrb	r2, [r3, #19]	@ zero_extendqisi2
-	ldr	r3, .L1189+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1180
-	ldr	r3, .L1189+8
-	ldr	r1, [r3]
-	ldr	r3, .L1189+12
-	cmp	r1, r3
-	beq	.L1179
-.L1180:
-	subs	r3, r2, #5
+	cbz	r3, .L1195
+	ldr	r3, .L1210+4
+	ldr	r3, [r3]
+	cmp	r3, #0
+	bne	.L1194
+.L1195:
+	ldr	r5, .L1210+8
+	ldr	r3, [r5]
+	ldrb	r6, [r3, #19]	@ zero_extendqisi2
+	subs	r3, r6, #5
 	uxtb	r3, r3
 	cmp	r3, #30
-	bhi	.L1181
-	ldr	r2, .L1189+16
+	bhi	.L1196
+	ldr	r2, .L1210+12
 	lsr	r3, r2, r3
 	lsls	r3, r3, #31
-	bmi	.L1183
-	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L1184:
-	ldrh	r2, [r10, r4, lsl #1]
+	bmi	.L1198
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1201:
+	ldrh	r2, [fp, r4, lsl #1]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1179
+	bne	.L1194
+	cmp	r6, #8
 	mov	r2, #32768
-	movs	r1, #255
-	ldr	r0, [r8]
+	ite	eq
+	moveq	r1, #0
+	movne	r1, #255
+	ldr	r0, [r10]
 	bl	ftl_memset
-	adds	r1, r4, r7
+	ldr	r3, [r10]
+	add	r1, r4, r8
 	adds	r4, r4, #1
+	mov	r0, r7
 	uxth	r4, r4
-	movs	r3, #0
-	ldr	r2, [r8]
-	mov	r0, r6
+	mov	r2, r3
 	bl	FlashProgPage
-.L1185:
+.L1202:
 	ldr	r3, [r5]
 	ldrh	r3, [r3, #10]
 	cmp	r3, r4
-	bhi	.L1184
-	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L1181:
-	cmp	r2, #68
-	bne	.L1179
-.L1183:
-	ldr	r10, .L1189+20
-	ldr	r8, .L1189+24
-	b	.L1185
-.L1179:
-	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L1190:
+	bhi	.L1201
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1196:
+	cmp	r6, #68
+	bne	.L1194
+.L1198:
+	ldr	fp, .L1210+16
+	ldr	r10, .L1210+20
+	b	.L1202
+.L1194:
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1211:
 	.align	2
-.L1189:
-	.word	.LANCHOR18
-	.word	.LANCHOR8
+.L1210:
+	.word	.LANCHOR15
 	.word	.LANCHOR29
-	.word	1446522928
-	.word	1073758215
+	.word	.LANCHOR18
+	.word	1073758223
 	.word	.LANCHOR120
 	.word	.LANCHOR153
 	.size	FlashPageProgMsbFFData, .-FlashPageProgMsbFFData
@@ -8432,45 +8561,45 @@ idb_write_data:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	cmp	r2, #63
 	sub	sp, sp, #104
-	bls	.L1192
+	bls	.L1213
 	cmp	r0, #576
-	bcs	.L1193
-	ldr	r2, .L1244
+	bcs	.L1214
+	ldr	r2, .L1265
 	cmp	r0, #64
 	mov	r4, #1
 	str	r4, [r2]
-	bhi	.L1194
+	bhi	.L1215
 	rsb	r0, r0, #64
 	subs	r2, r3, r0
 	add	r1, r1, r0, lsl #9
-	ldr	r0, .L1244+4
+	ldr	r0, .L1265+4
 	lsls	r2, r2, #9
-.L1243:
+.L1264:
 	bl	ftl_memcpy
-.L1232:
+.L1253:
 	movs	r0, #0
 	add	sp, sp, #104
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1194:
+.L1215:
 	rsb	r2, r0, #576
 	subs	r0, r0, #64
 	cmp	r2, r3
 	it	cs
 	movcs	r2, r3
-	ldr	r3, .L1244+4
+	ldr	r3, .L1265+4
 	lsls	r2, r2, #9
 	add	r0, r3, r0, lsl #9
-	b	.L1243
-.L1192:
+	b	.L1264
+.L1213:
 	cmp	r0, #576
-	bcc	.L1232
-.L1193:
-	ldr	r3, .L1244
+	bcc	.L1253
+.L1214:
+	ldr	r3, .L1265
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L1232
-	ldr	r3, .L1244+8
+	beq	.L1253
+	ldr	r3, .L1265+8
 	ldr	r2, [r3]
 	ldrb	r3, [r2, #9]	@ zero_extendqisi2
 	ldrh	r2, [r2, #10]
@@ -8480,14 +8609,14 @@ idb_write_data:
 	addw	r0, r3, #511
 	str	r3, [sp, #8]
 	bl	__aeabi_uidiv
-	ldr	r1, .L1244+4
+	ldr	r1, .L1265+4
 	movs	r3, #0
 	str	r0, [sp, #20]
 	movw	r2, #65535
 	mov	r0, r1
-.L1198:
+.L1219:
 	ldr	r4, [r1, r2, lsl #2]
-	cbnz	r4, .L1196
+	cbnz	r4, .L1217
 	ldr	r4, [r1, r3, lsl #2]
 	adds	r3, r3, #1
 	cmp	r3, #4096
@@ -8496,13 +8625,13 @@ idb_write_data:
 	str	r4, [r1, r2, lsl #2]
 	subs	r2, r2, #1
 	cmp	r2, #4096
-	bne	.L1198
-.L1196:
+	bne	.L1219
+.L1217:
 	ldr	r1, [r0, r2, lsl #2]
 	mov	r3, #512
-	ldr	r0, .L1244+12
+	ldr	r0, .L1265+12
 	bl	printf
-	ldr	r3, .L1244+16
+	ldr	r3, .L1265+16
 	ldr	r2, [sp, #8]
 	ldr	r3, [r3]
 	str	r3, [sp, #16]
@@ -8513,35 +8642,35 @@ idb_write_data:
 	mul	r4, r3, r2
 	movs	r3, #0
 	str	r3, [sp, #12]
-.L1199:
+.L1220:
 	ldr	r3, [sp, #16]
 	cmp	r3, #15
-	bls	.L1216
+	bls	.L1237
 	ldr	r3, [sp, #12]
-	cbnz	r3, .L1218
+	cbnz	r3, .L1239
 	mov	r1, r3
-	ldr	r0, .L1244+20
+	ldr	r0, .L1265+20
 	bl	printf
-.L1218:
-	ldr	r3, .L1244
+.L1239:
+	ldr	r3, .L1265
 	movs	r2, #0
 	str	r2, [r3]
-	b	.L1232
-.L1245:
+	b	.L1253
+.L1266:
 	.align	2
-.L1244:
+.L1265:
 	.word	.LANCHOR154
 	.word	idb_buf
 	.word	.LANCHOR18
 	.word	.LC15
 	.word	.LANCHOR149
 	.word	.LC17
-.L1216:
+.L1237:
 	mov	r2, #512
 	movs	r1, #0
-	ldr	r0, .L1246
+	ldr	r0, .L1267
 	bl	memset
-	ldr	r3, .L1246+4
+	ldr	r3, .L1267+4
 	mov	r0, r4
 	ldr	r3, [r3]
 	ldrb	fp, [r3, #9]	@ zero_extendqisi2
@@ -8550,61 +8679,61 @@ idb_write_data:
 	smulbb	r5, r5, fp
 	uxth	r5, r5
 	cmp	r5, #512
-	bcs	.L1200
+	bcs	.L1221
 	adds	r0, r5, r4
 	bl	FW_FlashBlockErase.constprop.41
-.L1200:
-	ldr	r7, .L1246+8
+.L1221:
+	ldr	r7, .L1267+8
 	mov	r1, r5
-	ldr	r10, .L1246+36
+	ldr	r10, .L1267+36
 	mov	r0, r4
 	bl	__aeabi_uidivmod
 	mov	r6, r1
 	subs	r3, r4, r1
 	str	r3, [sp, #24]
-.L1204:
+.L1225:
 	lsrs	r2, r6, #2
-	beq	.L1201
-	ldr	r0, .L1246+12
+	beq	.L1222
+	ldr	r0, .L1267+12
 	adds	r1, r2, #1
-	ldr	r3, .L1246+16
+	ldr	r3, .L1267+16
 	ldrb	r0, [r0]	@ zero_extendqisi2
 	ldrh	r3, [r3, r1, lsl #1]
-	cbz	r0, .L1202
+	cbz	r0, .L1223
 	ldr	r0, [r10]
-	ldr	r5, .L1246+20
+	ldr	r5, .L1267+20
 	cmp	r0, r5
 	it	eq
 	moveq	r3, r1
-.L1202:
+.L1223:
 	add	r3, r3, #1073741824
 	subs	r3, r3, #1
 	lsls	r3, r3, #2
 	str	r3, [sp, #40]
-.L1201:
+.L1222:
 	movw	r3, #61424
 	str	r3, [sp, #44]
-	ldr	r3, .L1246+16
+	ldr	r3, .L1267+16
 	ldrh	r5, [r3, r2, lsl #1]
-	ldr	r3, .L1246+12
+	ldr	r3, .L1267+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1203
+	cbz	r3, .L1224
 	ldr	r3, [r10]
-	ldr	r1, .L1246+20
+	ldr	r1, .L1267+20
 	cmp	r3, r1
 	it	eq
 	moveq	r5, r2
-.L1203:
+.L1224:
 	ldr	r3, [sp, #24]
 	adds	r6, r6, #4
-	ldr	r2, .L1246+24
-	ldr	r8, .L1246+4
+	ldr	r2, .L1267+24
+	ldr	r8, .L1267+4
 	mla	r3, r5, fp, r3
 	adds	r5, r5, #1
 	uxth	r5, r5
 	str	r3, [sp, #32]
 	ldrb	r3, [r2]	@ zero_extendqisi2
-	ldr	r2, .L1246+28
+	ldr	r2, .L1267+28
 	str	r3, [sp, #28]
 	ldrb	r0, [r2]	@ zero_extendqisi2
 	bl	FlashBchSel
@@ -8632,12 +8761,12 @@ idb_write_data:
 	mov	r1, r0
 	movs	r0, #0
 	bl	FlashPageProgMsbFFData
-	ldr	r3, .L1246+32
+	ldr	r3, .L1267+32
 	cmp	r7, r3
-	bne	.L1204
+	bne	.L1225
 	ldr	r3, [r8]
 	mov	r0, r4
-	ldr	r7, .L1246
+	ldr	r7, .L1267
 	movs	r6, #0
 	ldrb	r8, [r3, #9]	@ zero_extendqisi2
 	ldrh	r1, [r3, #10]
@@ -8649,47 +8778,47 @@ idb_write_data:
 	subs	r3, r4, r1
 	str	r3, [sp, #28]
 	ubfx	r5, r5, #2, #2
-.L1205:
+.L1226:
 	cmp	r6, #512
-	bcs	.L1212
-	ldr	r1, .L1246+12
+	bcs	.L1233
+	ldr	r1, .L1267+12
 	rsb	r3, r5, #4
 	uxth	r3, r3
-	ldr	r2, .L1246+16
+	ldr	r2, .L1267+16
 	ldrb	r1, [r1]	@ zero_extendqisi2
 	str	r3, [sp, #24]
 	add	r3, r10, r6
 	lsrs	r3, r3, #2
 	ldrh	r2, [r2, r3, lsl #1]
-	cbz	r1, .L1206
-	ldr	r1, .L1246+36
-	ldr	r0, .L1246+20
+	cbz	r1, .L1227
+	ldr	r1, .L1267+36
+	ldr	r0, .L1267+20
 	ldr	r1, [r1]
 	cmp	r1, r0
 	it	eq
 	moveq	r2, r3
-.L1206:
+.L1227:
 	ldr	r3, [sp, #28]
 	add	r5, r5, r3
-	ldr	r3, .L1246+24
+	ldr	r3, .L1267+24
 	mla	r5, r2, r8, r5
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r3, [sp, #32]
-	ldr	r3, .L1246+4
+	ldr	r3, .L1267+4
 	ldr	r3, [r3]
 	ldrb	fp, [r3, #9]	@ zero_extendqisi2
-	ldr	r3, .L1246+40
+	ldr	r3, .L1267+40
 	ldrh	r2, [r3, #26]
-	ldr	r3, .L1246+44
+	ldr	r3, .L1267+44
 	ldr	r3, [r3]
 	muls	r3, r2, r3
 	mul	r3, fp, r3
 	cmp	r5, r3
-	bcs	.L1207
-	ldr	r3, .L1246+28
+	bcs	.L1228
+	ldr	r3, .L1267+28
 	ldrb	r0, [r3]	@ zero_extendqisi2
 	bl	FlashBchSel
-.L1207:
+.L1228:
 	movs	r0, #0
 	bl	flash_boot_enter_slc_mode
 	mov	r1, fp
@@ -8703,11 +8832,11 @@ idb_write_data:
 	bl	FlashReadPage
 	adds	r3, r0, #1
 	mov	r5, r0
-	bne	.L1208
-	ldr	r3, .L1246+28
+	bne	.L1229
+	ldr	r3, .L1267+28
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #40
-	beq	.L1208
+	beq	.L1229
 	movs	r0, #40
 	bl	FlashBchSel
 	add	r3, sp, #40
@@ -8716,7 +8845,7 @@ idb_write_data:
 	movs	r0, #0
 	bl	FlashReadPage
 	mov	r5, r0
-.L1208:
+.L1229:
 	movs	r0, #0
 	bl	flash_boot_exit_slc_mode
 	ldr	r0, [sp, #32]
@@ -8725,74 +8854,74 @@ idb_write_data:
 	mov	r5, #-1
 	it	ne
 	movne	r5, #0
-	cbz	r5, .L1209
-.L1212:
-	ldr	r3, .L1246+8
+	cbz	r5, .L1230
+.L1233:
+	ldr	r3, .L1267+8
 	movs	r5, #0
-	ldr	r6, .L1246
-.L1210:
+	ldr	r6, .L1267
+.L1231:
 	mov	r7, r3
 	ldr	r1, [r6, r5, lsl #2]
 	ldr	r2, [r7]
 	adds	r3, r3, #4
 	cmp	r1, r2
-	beq	.L1213
+	beq	.L1234
 	mov	r2, #512
 	movs	r1, #0
-	ldr	r0, .L1246
+	ldr	r0, .L1267
 	bl	memset
 	str	r5, [sp]
 	mov	r1, r4
 	ldr	r3, [r7]
 	ldr	r2, [r6, r5, lsl #2]
-	ldr	r0, .L1246+48
+	ldr	r0, .L1267+48
 	bl	printf
 	mov	r0, r4
 	bl	FW_FlashBlockErase.constprop.41
 	ldr	r3, [sp, #20]
 	cmp	r3, #1
-	bls	.L1214
+	bls	.L1235
 	ldr	r3, [sp, #8]
 	adds	r0, r3, r4
 	bl	FW_FlashBlockErase.constprop.41
-.L1214:
+.L1235:
 	ldr	r3, [sp, #16]
 	ldr	r2, [sp, #20]
 	add	r3, r3, r2
 	str	r3, [sp, #16]
 	ldr	r3, [sp, #36]
 	add	r4, r4, r3
-	b	.L1199
-.L1209:
+	b	.L1220
+.L1230:
 	ldr	r3, [sp, #24]
 	add	r6, r6, r3
 	add	r7, r7, r3, lsl #9
 	uxth	r6, r6
-	b	.L1205
-.L1213:
+	b	.L1226
+.L1234:
 	adds	r5, r5, #1
 	cmp	r5, #65536
-	bne	.L1210
+	bne	.L1231
 	ldr	r3, [sp, #12]
 	adds	r3, r3, #1
 	cmp	r3, #5
 	str	r3, [sp, #12]
-	bls	.L1214
-	b	.L1218
-.L1247:
+	bls	.L1235
+	b	.L1239
+.L1268:
 	.align	2
-.L1246:
+.L1267:
 	.word	gp_flash_check_buf
 	.word	.LANCHOR18
 	.word	idb_buf
-	.word	.LANCHOR8
+	.word	.LANCHOR15
 	.word	.LANCHOR16
 	.word	1446522928
 	.word	.LANCHOR33
 	.word	.LANCHOR152
 	.word	idb_buf+262144
-	.word	.LANCHOR29
-	.word	.LANCHOR15
+	.word	.LANCHOR119
+	.word	.LANCHOR14
 	.word	.LANCHOR3
 	.word	.LC16
 	.size	idb_write_data, .-idb_write_data
@@ -8822,11 +8951,11 @@ rknand_get_clk_rate:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r0, .L1250
+	ldr	r0, .L1271
 	bx	lr
-.L1251:
+.L1272:
 	.align	2
-.L1250:
+.L1271:
 	.word	148000000
 	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
 	.section	.text.ftl_malloc,"ax",%progbits
@@ -8857,9 +8986,9 @@ NandcInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r2, #1
-	ldr	r3, .L1255
+	ldr	r3, .L1276
 	movs	r4, #0
-	ldr	r5, .L1255+4
+	ldr	r5, .L1276+4
 	str	r2, [r3, #12]
 	movs	r2, #2
 	str	r2, [r3, #20]
@@ -8869,8 +8998,8 @@ NandcInit:
 	str	r0, [r3, #16]
 	str	r2, [r3, #28]
 	str	r0, [r3, #24]
-	ldr	r3, .L1255+8
-	ldr	r2, .L1255+12
+	ldr	r3, .L1276+8
+	ldr	r2, .L1276+12
 	str	r0, [r3]
 	ldr	r3, [r0]
 	and	r3, r3, #253952
@@ -8879,7 +9008,7 @@ NandcInit:
 	str	r1, [r2]
 	orr	r3, r3, #256
 	ldr	r2, [r0, #352]
-	ldr	r1, .L1255+16
+	ldr	r1, .L1276+16
 	ubfx	r2, r2, #16, #4
 	str	r2, [r1]
 	ldr	r2, [r0, #352]
@@ -8895,25 +9024,25 @@ NandcInit:
 	str	r3, [r0, #4]
 	movw	r3, #8322
 	str	r3, [r0, #344]
-	ldr	r3, .L1255+20
+	ldr	r3, .L1276+20
 	str	r3, [r0, #304]
 	mov	r0, #36864
 	bl	ftl_malloc
-	ldr	r3, .L1255+24
+	ldr	r3, .L1276+24
 	str	r0, [r3]
-	ldr	r3, .L1255+28
+	ldr	r3, .L1276+28
 	str	r0, [r3]
 	add	r0, r0, #32768
 	str	r0, [r3, #4]
 	str	r4, [r3, #24]
-	ldr	r3, .L1255+32
+	ldr	r3, .L1276+32
 	str	r4, [r3]
 	pop	{r3, r4, r5, pc}
-.L1256:
+.L1277:
 	.align	2
-.L1255:
+.L1276:
 	.word	.LANCHOR6
-	.word	.LANCHOR29
+	.word	.LANCHOR119
 	.word	.LANCHOR19
 	.word	.LANCHOR155
 	.word	.LANCHOR34
@@ -8933,114 +9062,114 @@ NandcInit:
 FtlMemInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1262
+	ldr	r3, .L1283
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r2, .L1262+4
+	ldr	r2, .L1283+4
 	movs	r6, #12
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L1262+8
-	ldr	r5, .L1262+12
-	ldr	r10, .L1262+304
+	ldr	r3, .L1283+8
+	ldr	r5, .L1283+12
+	ldr	r10, .L1283+304
 	str	r4, [r3]
-	ldr	r3, .L1262+16
-	ldr	r8, .L1262+308
-	ldr	fp, .L1262+312
+	ldr	r3, .L1283+16
+	ldr	r8, .L1283+308
+	ldr	fp, .L1283+312
 	str	r4, [r3]
-	ldr	r3, .L1262+20
+	ldr	r3, .L1283+20
 	str	r4, [r3]
-	ldr	r3, .L1262+24
+	ldr	r3, .L1283+24
 	str	r4, [r3]
-	ldr	r3, .L1262+28
+	ldr	r3, .L1283+28
 	str	r4, [r3]
-	ldr	r3, .L1262+32
+	ldr	r3, .L1283+32
 	str	r4, [r3]
-	ldr	r3, .L1262+36
+	ldr	r3, .L1283+36
 	str	r4, [r3]
-	ldr	r3, .L1262+40
+	ldr	r3, .L1283+40
 	str	r4, [r3]
-	ldr	r3, .L1262+44
+	ldr	r3, .L1283+44
 	str	r4, [r3]
-	ldr	r3, .L1262+48
+	ldr	r3, .L1283+48
 	str	r4, [r3]
-	ldr	r3, .L1262+52
+	ldr	r3, .L1283+52
 	str	r4, [r3]
-	ldr	r3, .L1262+56
+	ldr	r3, .L1283+56
 	str	r4, [r3]
-	ldr	r3, .L1262+60
+	ldr	r3, .L1283+60
 	str	r4, [r3]
-	ldr	r3, .L1262+64
+	ldr	r3, .L1283+64
 	str	r4, [r3]
-	ldr	r3, .L1262+68
+	ldr	r3, .L1283+68
 	str	r4, [r3]
-	ldr	r3, .L1262+72
+	ldr	r3, .L1283+72
 	str	r4, [r3]
-	ldr	r3, .L1262+76
+	ldr	r3, .L1283+76
 	str	r4, [r3]
 	movw	r3, #65535
 	str	r3, [r2]
-	ldr	r2, .L1262+80
+	ldr	r2, .L1283+80
 	str	r4, [r2]
-	ldr	r2, .L1262+84
+	ldr	r2, .L1283+84
 	str	r4, [r2]
-	ldr	r2, .L1262+88
+	ldr	r2, .L1283+88
 	str	r4, [r2]
-	ldr	r2, .L1262+92
+	ldr	r2, .L1283+92
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L1262+96
+	ldr	r2, .L1283+96
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L1262+100
+	ldr	r2, .L1283+100
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L1262+104
+	ldr	r2, .L1283+104
 	strh	r3, [r2]	@ movhi
 	movs	r2, #32
-	ldr	r3, .L1262+108
+	ldr	r3, .L1283+108
 	strh	r2, [r3]	@ movhi
 	movs	r2, #128
-	ldr	r3, .L1262+112
+	ldr	r3, .L1283+112
 	strh	r2, [r3]	@ movhi
-	ldr	r3, .L1262+116
+	ldr	r3, .L1283+116
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L1262+120
+	ldr	r3, .L1283+120
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L1262+124
+	ldr	r3, .L1283+124
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L1262+128
+	ldr	r3, .L1283+128
 	strh	r4, [r3]	@ movhi
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L1262+132
+	ldr	r3, .L1283+132
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	movs	r5, #36
 	muls	r0, r6, r0
 	bl	ftl_malloc
-	ldr	r3, .L1262+136
+	ldr	r3, .L1283+136
 	str	r0, [r3]
 	ldrh	r3, [r10]
 	muls	r5, r3, r5
 	lsls	r7, r5, #2
 	mov	r0, r7
 	bl	ftl_malloc
-	ldr	r3, .L1262+140
+	ldr	r3, .L1283+140
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1262+144
+	ldr	r3, .L1283+144
 	str	r0, [r3]
 	mov	r0, r7
 	bl	ftl_malloc
-	ldr	r3, .L1262+148
-	ldr	r7, .L1262+152
+	ldr	r3, .L1283+148
+	ldr	r7, .L1283+152
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1262+156
+	ldr	r3, .L1283+156
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1262+160
+	ldr	r3, .L1283+160
 	ldrh	r5, [r7]
 	str	r0, [r3]
 	ldrh	r3, [r10]
@@ -9049,157 +9178,157 @@ FtlMemInit:
 	adds	r3, r3, #1
 	str	r3, [r8]
 	bl	ftl_malloc
-	ldr	r3, .L1262+164
+	ldr	r3, .L1283+164
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1262+168
+	ldr	r3, .L1283+168
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1262+172
+	ldr	r3, .L1283+172
 	str	r0, [r3]
 	ldr	r0, [r8]
 	muls	r0, r5, r0
 	bl	ftl_malloc
-	ldr	r3, .L1262+176
+	ldr	r3, .L1283+176
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1262+180
+	ldr	r3, .L1283+180
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1262+184
+	ldr	r3, .L1283+184
 	str	r0, [r3]
 	ldr	r0, [r8]
 	muls	r0, r6, r0
 	bl	ftl_malloc
-	ldr	r3, .L1262+188
+	ldr	r3, .L1283+188
 	ldrh	r5, [r10]
-	ldr	r10, .L1262+316
+	ldr	r10, .L1283+316
 	str	r0, [r3]
 	ldrh	r3, [fp]
 	muls	r5, r3, r5
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1262+192
+	ldr	r3, .L1283+192
 	str	r0, [r3]
 	lsls	r0, r5, #2
-	ldr	r5, .L1262+196
+	ldr	r5, .L1283+196
 	bl	ftl_malloc
-	ldr	r3, .L1262+200
+	ldr	r3, .L1283+200
 	str	r0, [r3]
 	ldrh	r3, [fp]
 	ldr	r0, [r8]
-	ldr	r8, .L1262+320
+	ldr	r8, .L1283+320
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L1262+204
+	ldr	r3, .L1283+204
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	uxth	r0, r0
 	strh	r0, [r8]	@ movhi
 	bl	ftl_malloc
-	ldr	r3, .L1262+208
+	ldr	r3, .L1283+208
 	str	r0, [r3]
 	ldrh	r3, [r8]
-	ldr	r0, .L1262+212
+	ldr	r0, .L1283+212
 	addw	r3, r3, #547
 	lsrs	r3, r3, #9
 	and	r0, r0, r3, lsl #9
 	strh	r3, [r8]	@ movhi
 	bl	ftl_malloc
-	ldr	r3, .L1262+216
+	ldr	r3, .L1283+216
 	str	r0, [r3]
 	adds	r0, r0, #32
-	ldr	r3, .L1262+220
+	ldr	r3, .L1283+220
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L1262+224
+	ldr	r3, .L1283+224
 	str	r0, [r3]
 	ldr	r3, [r10]
 	lsl	r8, r3, #1
 	mov	r0, r8
 	bl	ftl_malloc
-	ldr	r3, .L1262+228
+	ldr	r3, .L1283+228
 	str	r0, [r3]
 	mov	r0, r8
 	bl	ftl_malloc
-	ldr	r3, .L1262+232
-	ldr	r8, .L1262+324
+	ldr	r3, .L1283+232
+	ldr	r8, .L1283+324
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	lsrs	r0, r0, #3
 	adds	r0, r0, #4
 	bl	ftl_malloc
-	ldr	r3, .L1262+236
+	ldr	r3, .L1283+236
 	str	r0, [r3]
 	ldrh	r0, [r8]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L1262+240
+	ldr	r3, .L1283+240
 	str	r0, [r3]
 	ldrh	r0, [r8]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L1262+244
+	ldr	r3, .L1283+244
 	str	r0, [r3]
 	ldrh	r0, [r8]
-	ldr	r8, .L1262+328
+	ldr	r8, .L1283+328
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L1262+248
+	ldr	r3, .L1283+248
 	str	r0, [r3]
 	ldrh	r0, [r8]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
 	ldrh	r2, [r8]
 	mov	r1, r4
-	ldr	r3, .L1262+252
+	ldr	r3, .L1283+252
 	lsls	r2, r2, #2
 	str	r0, [r3]
 	bl	ftl_memset
-	ldr	r3, .L1262+256
+	ldr	r3, .L1283+256
 	ldrh	r4, [r3]
 	lsls	r4, r4, #2
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L1262+260
+	ldr	r3, .L1283+260
 	str	r0, [r3]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L1262+264
-	ldr	r4, .L1262+268
+	ldr	r3, .L1283+264
+	ldr	r4, .L1283+268
 	str	r0, [r3]
 	ldr	r0, [r10]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L1262+272
+	ldr	r3, .L1283+272
 	str	r0, [r3]
 	ldrh	r0, [r4]
 	muls	r0, r6, r0
-	ldr	r6, .L1262+276
+	ldr	r6, .L1283+276
 	bl	ftl_malloc
-	ldr	r3, .L1262+280
+	ldr	r3, .L1283+280
 	str	r0, [r3]
 	ldrh	r3, [r4]
 	ldrh	r0, [r7]
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L1262+284
+	ldr	r3, .L1283+284
 	str	r0, [r3]
 	movs	r0, #6
 	ldrh	r3, [r5]
-	ldr	r5, .L1262+288
+	ldr	r5, .L1283+288
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L1262+292
+	ldr	r3, .L1283+292
 	str	r0, [r3]
-	ldr	r3, .L1262+296
+	ldr	r3, .L1283+296
 	ldrh	r0, [r3]
 	ldrh	r3, [r6]
 	adds	r0, r0, #31
@@ -9210,19 +9339,19 @@ FtlMemInit:
 	bl	ftl_malloc
 	ldrh	r1, [r5]
 	movs	r2, #1
-	ldr	r3, .L1262+300
+	ldr	r3, .L1283+300
 	ldrh	r6, [r6]
 	lsls	r1, r1, #2
 	mov	r4, r3
 	str	r0, [r4, #28]!
-	b	.L1263
-.L1264:
+	b	.L1284
+.L1285:
 	.align	2
-.L1262:
+.L1283:
 	.word	.LANCHOR139
 	.word	.LANCHOR173
 	.word	.LANCHOR157
-	.word	.LANCHOR55
+	.word	.LANCHOR54
 	.word	.LANCHOR158
 	.word	.LANCHOR159
 	.word	.LANCHOR160
@@ -9234,102 +9363,102 @@ FtlMemInit:
 	.word	.LANCHOR166
 	.word	.LANCHOR167
 	.word	.LANCHOR168
-	.word	.LANCHOR80
+	.word	.LANCHOR79
 	.word	.LANCHOR169
 	.word	.LANCHOR170
 	.word	.LANCHOR171
 	.word	.LANCHOR172
 	.word	.LANCHOR174
 	.word	.LANCHOR175
-	.word	.LANCHOR74
+	.word	.LANCHOR73
+	.word	.LANCHOR112
 	.word	.LANCHOR113
 	.word	.LANCHOR114
 	.word	.LANCHOR115
-	.word	.LANCHOR116
 	.word	.LANCHOR176
 	.word	.LANCHOR177
 	.word	.LANCHOR178
-	.word	.LANCHOR117
+	.word	.LANCHOR116
 	.word	.LANCHOR179
-	.word	.LANCHOR119
-	.word	.LANCHOR109
-	.word	.LANCHOR112
+	.word	.LANCHOR118
+	.word	.LANCHOR108
+	.word	.LANCHOR111
 	.word	.LANCHOR180
 	.word	.LANCHOR181
 	.word	.LANCHOR182
-	.word	.LANCHOR58
-	.word	.LANCHOR78
-	.word	.LANCHOR107
+	.word	.LANCHOR57
+	.word	.LANCHOR77
+	.word	.LANCHOR106
 	.word	.LANCHOR183
 	.word	.LANCHOR184
 	.word	.LANCHOR185
-	.word	.LANCHOR105
+	.word	.LANCHOR104
 	.word	.LANCHOR186
 	.word	.LANCHOR187
-	.word	.LANCHOR104
+	.word	.LANCHOR103
 	.word	.LANCHOR188
 	.word	.LANCHOR41
 	.word	.LANCHOR189
-	.word	.LANCHOR106
+	.word	.LANCHOR105
 	.word	.LANCHOR137
 	.word	33553920
 	.word	.LANCHOR191
-	.word	.LANCHOR79
-	.word	.LANCHOR84
+	.word	.LANCHOR78
+	.word	.LANCHOR83
 	.word	.LANCHOR129
 	.word	.LANCHOR125
 	.word	.LANCHOR0
-	.word	.LANCHOR72
+	.word	.LANCHOR71
 	.word	.LANCHOR192
 	.word	.LANCHOR193
 	.word	.LANCHOR194
-	.word	.LANCHOR67
+	.word	.LANCHOR66
 	.word	.LANCHOR131
 	.word	.LANCHOR195
-	.word	.LANCHOR68
+	.word	.LANCHOR67
 	.word	.LANCHOR130
 	.word	.LANCHOR45
-	.word	.LANCHOR97
+	.word	.LANCHOR96
 	.word	.LANCHOR126
 	.word	.LANCHOR123
-	.word	.LANCHOR82
+	.word	.LANCHOR81
 	.word	.LANCHOR51
-	.word	.LANCHOR75
+	.word	.LANCHOR74
 	.word	.LANCHOR38
-	.word	.LANCHOR108
-	.word	.LANCHOR59
-	.word	.LANCHOR65
+	.word	.LANCHOR107
+	.word	.LANCHOR58
+	.word	.LANCHOR64
 	.word	.LANCHOR190
+	.word	.LANCHOR61
 	.word	.LANCHOR62
-	.word	.LANCHOR63
-.L1263:
+.L1284:
 	mov	r0, r1
-.L1258:
+.L1279:
 	cmp	r2, r6
-	bcc	.L1259
+	bcc	.L1280
 	add	r3, r3, r2, lsl #2
-	ldr	r2, .L1265
+	ldr	r2, .L1286
 	movs	r1, #0
 	adds	r3, r3, #24
-.L1260:
+.L1281:
 	cmp	r3, r2
-	bne	.L1261
+	bne	.L1282
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1259:
+.L1280:
 	ldr	r5, [r3, #28]
 	adds	r2, r2, #1
 	add	r5, r5, r0
 	add	r0, r0, r1
 	str	r5, [r4, #4]!
-	b	.L1258
-.L1261:
+	b	.L1279
+.L1282:
 	str	r1, [r3, #4]!
-	b	.L1260
-.L1266:
+	b	.L1281
+.L1287:
 	.align	2
-.L1265:
-	.word	.LANCHOR75+56
+.L1286:
+	.word	.LANCHOR74+56
 	.size	FtlMemInit, .-FtlMemInit
 	.section	.text.ftl_free,"ax",%progbits
 	.align	1
@@ -9428,13 +9557,13 @@ rk_ftl_get_capacity:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L1273
+	ldr	r3, .L1294
 	ldr	r0, [r3]
 	bx	lr
-.L1274:
+.L1295:
 	.align	2
-.L1273:
-	.word	.LANCHOR69
+.L1294:
+	.word	.LANCHOR68
 	.size	rk_ftl_get_capacity, .-rk_ftl_get_capacity
 	.section	.text.rknand_print_hex,"ax",%progbits
 	.align	1
@@ -9449,51 +9578,51 @@ rknand_print_hex:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r5, #0
-	ldr	r7, .L1284
+	ldr	r7, .L1305
 	mov	fp, r0
 	mov	r6, r1
 	mov	r8, r2
 	mov	r10, r3
 	mov	r4, r5
-.L1276:
+.L1297:
 	cmp	r4, r10
-	bne	.L1282
-	ldr	r1, .L1284+4
-	ldr	r0, .L1284+8
+	bne	.L1303
+	ldr	r1, .L1305+4
+	ldr	r0, .L1305+8
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
 	b	printf
-.L1282:
-	cbnz	r5, .L1277
+.L1303:
+	cbnz	r5, .L1298
 	mov	r2, r4
 	mov	r1, fp
-	ldr	r0, .L1284+12
+	ldr	r0, .L1305+12
 	bl	printf
-.L1277:
+.L1298:
 	cmp	r8, #4
-	bne	.L1278
+	bne	.L1299
 	ldr	r1, [r6, r4, lsl #2]
-.L1283:
+.L1304:
 	mov	r0, r7
 	adds	r5, r5, #1
 	bl	printf
 	cmp	r5, #15
-	bls	.L1281
+	bls	.L1302
 	movs	r5, #0
-	ldr	r1, .L1284+4
-	ldr	r0, .L1284+8
+	ldr	r1, .L1305+4
+	ldr	r0, .L1305+8
 	bl	printf
-.L1281:
+.L1302:
 	adds	r4, r4, #1
-	b	.L1276
-.L1278:
+	b	.L1297
+.L1299:
 	cmp	r8, #2
 	ite	eq
 	ldrsheq	r1, [r6, r4, lsl #1]
 	ldrbne	r1, [r6, r4]	@ zero_extendqisi2
-	b	.L1283
-.L1285:
+	b	.L1304
+.L1306:
 	.align	2
-.L1284:
+.L1305:
 	.word	.LC19
 	.word	.LC20
 	.word	.LC7
@@ -9512,7 +9641,7 @@ HynixGetReadRetryDefault:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #172
-	ldr	r5, .L1385
+	ldr	r5, .L1425
 	cmp	r0, #2
 	mov	r1, #173
 	mov	r2, #174
@@ -9524,18 +9653,19 @@ HynixGetReadRetryDefault:
 	strb	r1, [r5, #5]
 	strb	r2, [r5, #6]
 	strb	r3, [r5, #7]
-	bne	.L1287
+	bne	.L1308
 	movs	r3, #167
-	movs	r2, #247
+	mov	fp, #7
 	strb	r3, [r5, #4]
-	ldr	r3, .L1385+4
+	movs	r2, #247
+	ldr	r3, .L1425+4
 	strb	r2, [r3, #17]
-.L1343:
-	mov	r10, #7
-	b	.L1379
-.L1287:
+.L1418:
+	mov	r10, #4
+	b	.L1309
+.L1308:
 	cmp	r0, #3
-	bne	.L1289
+	bne	.L1310
 	movs	r3, #176
 	strb	r3, [r5, #4]
 	movs	r3, #177
@@ -9551,31 +9681,31 @@ HynixGetReadRetryDefault:
 	movs	r3, #182
 	strb	r3, [r5, #10]
 	movs	r3, #183
-.L1380:
-	mov	r10, #8
+.L1419:
+	mov	fp, #8
 	strb	r3, [r5, #11]
-	mov	fp, r10
-.L1288:
+	mov	r10, fp
+.L1309:
 	subs	r3, r4, #1
 	cmp	r3, #1
-	bhi	.L1293
+	bhi	.L1315
 	mov	r8, #0
-.L1294:
-	ldr	r3, .L1385+8
+.L1316:
+	ldr	r3, .L1425+8
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	uxtb	r3, r8
 	cmp	r2, r3
-	bhi	.L1300
-.L1301:
-	ldr	r3, .L1385
-	strb	fp, [r3, #1]
-	strb	r10, [r3, #2]
+	bhi	.L1322
+.L1323:
+	ldr	r3, .L1425
+	strb	r10, [r3, #1]
+	strb	fp, [r3, #2]
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1289:
+.L1310:
 	cmp	r0, #4
-	bne	.L1290
+	bne	.L1311
 	movs	r0, #204
 	strb	r1, [r5, #9]
 	strb	r0, [r5, #4]
@@ -9588,12 +9718,12 @@ HynixGetReadRetryDefault:
 	movs	r0, #205
 	strb	r0, [r5, #8]
 	strb	r2, [r5, #10]
-	b	.L1380
-.L1290:
+	b	.L1419
+.L1311:
 	cmp	r0, #5
-	bne	.L1291
+	bne	.L1312
 	movs	r3, #56
-	mov	r10, #8
+	mov	fp, #8
 	strb	r3, [r5, #4]
 	movs	r3, #57
 	strb	r3, [r5, #5]
@@ -9601,14 +9731,12 @@ HynixGetReadRetryDefault:
 	strb	r3, [r5, #6]
 	movs	r3, #59
 	strb	r3, [r5, #7]
-.L1379:
-	mov	fp, #4
-	b	.L1288
-.L1291:
+	b	.L1418
+.L1312:
 	cmp	r0, #6
-	bne	.L1292
+	bne	.L1313
 	movs	r3, #14
-	mov	r10, #12
+	mov	fp, #12
 	strb	r3, [r5, #4]
 	movs	r3, #15
 	strb	r3, [r5, #5]
@@ -9616,12 +9744,12 @@ HynixGetReadRetryDefault:
 	strb	r3, [r5, #6]
 	movs	r3, #17
 	strb	r3, [r5, #7]
-	b	.L1379
-.L1292:
+	b	.L1418
+.L1313:
 	cmp	r0, #7
-	bne	.L1343
+	bne	.L1314
 	movs	r3, #176
-	mov	r10, #12
+	mov	fp, #12
 	strb	r3, [r5, #4]
 	movs	r3, #177
 	strb	r3, [r5, #5]
@@ -9641,13 +9769,31 @@ HynixGetReadRetryDefault:
 	strb	r3, [r5, #12]
 	movs	r3, #213
 	strb	r3, [r5, #13]
-	mov	fp, #10
-	b	.L1288
-.L1300:
-	ldr	r2, .L1385+12
+	mov	r10, #10
+	b	.L1309
+.L1314:
+	cmp	r0, #8
+	mov	r3, #7
+	bne	.L1373
+	strb	r3, [r5, #5]
+	movs	r3, #9
+	movs	r2, #6
+	strb	r3, [r5, #7]
+	movs	r3, #10
+	strb	r2, [r5, #4]
+	strb	r0, [r5, #6]
+	mov	fp, #50
+	strb	r3, [r5, #8]
+	mov	r10, #5
+	b	.L1309
+.L1373:
+	mov	fp, r3
+	b	.L1418
+.L1322:
+	ldr	r2, .L1425+12
 	movs	r6, #0
 	ldrb	r2, [r2, r3]	@ zero_extendqisi2
-	ldr	r3, .L1385+16
+	ldr	r3, .L1425+16
 	ldr	r7, [r3, r2, lsl #3]
 	add	r4, r5, r2, lsl #6
 	add	r3, r3, r2, lsl #3
@@ -9656,41 +9802,41 @@ HynixGetReadRetryDefault:
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
 	add	r7, r7, r3, lsl #8
 	addw	r3, r7, #2056
-.L1295:
+.L1317:
 	adds	r1, r5, r6
 	str	r2, [r3]
 	ldrb	r1, [r1, #4]	@ zero_extendqisi2
 	movs	r0, #80
-	str	r2, [sp, #8]
-	str	r3, [sp, #4]
+	str	r2, [sp, #4]
+	str	r3, [sp]
 	str	r1, [r7, #2052]
 	bl	udelay
 	ldr	r1, [r7, #2048]
-	ldr	r3, [sp, #4]
-	ldr	r2, [sp, #8]
+	ldr	r3, [sp]
+	ldr	r2, [sp, #4]
 	strb	r1, [r4, r6]
 	adds	r6, r6, #1
 	uxtb	r1, r6
-	cmp	fp, r1
-	bhi	.L1295
-	ldr	r7, .L1385+4
+	cmp	r10, r1
+	bhi	.L1317
+	ldr	r7, .L1425+4
 	mov	r1, r4
 	movs	r2, #0
-.L1298:
+.L1320:
 	movs	r3, #1
 	adds	r6, r7, r2
-.L1297:
+.L1319:
 	ldrb	r0, [r6, r3, lsl #2]	@ zero_extendqisi2
 	ldrb	ip, [r1]	@ zero_extendqisi2
 	add	r0, r0, ip
 	strb	r0, [r1, r3, lsl #3]
 	adds	r3, r3, #1
 	cmp	r3, #7
-	bne	.L1297
+	bne	.L1319
 	adds	r2, r2, #1
 	adds	r1, r1, #1
 	cmp	r2, #4
-	bne	.L1298
+	bne	.L1320
 	movs	r3, #0
 	add	r8, r8, #1
 	strb	r3, [r4, #16]
@@ -9700,359 +9846,435 @@ HynixGetReadRetryDefault:
 	strb	r3, [r4, #48]
 	strb	r3, [r4, #41]
 	strb	r3, [r4, #49]
-	b	.L1294
-.L1293:
+	b	.L1316
+.L1315:
 	subs	r3, r4, #3
-	cmp	r3, #4
-	bhi	.L1301
-	smulbb	r3, r10, fp
-	asrs	r2, r3, #2
+	cmp	r3, #5
+	bhi	.L1323
+	smulbb	r3, fp, r10
+	asrs	r2, r3, #1
 	lsls	r3, r3, #4
-	str	r3, [sp, #52]
-	lsls	r3, r2, #3
-	str	r2, [sp, #12]
 	str	r3, [sp, #48]
 	lsls	r3, r2, #2
+	str	r2, [sp, #12]
+	str	r3, [sp, #44]
+	lsls	r3, r2, #1
 	str	r3, [sp, #32]
 	movs	r3, #0
-.L1384:
+.L1424:
 	str	r3, [sp, #28]
 	ldrb	r3, [sp, #28]	@ zero_extendqisi2
 	str	r3, [sp, #16]
-	ldr	r3, .L1385+8
+	ldr	r3, .L1425+8
 	ldr	r2, [sp, #16]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r2
-	bls	.L1301
+	bls	.L1323
 	ldr	r2, [sp, #16]
-	ldr	r3, .L1385+12
+	ldr	r3, .L1425+12
 	ldrb	r8, [r3, r2]	@ zero_extendqisi2
-	ldr	r3, .L1385+16
+	ldr	r3, .L1425+16
 	mov	r0, r8
 	ldr	r2, [r3, r8, lsl #3]
 	add	r3, r3, r8, lsl #3
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-	str	r2, [sp, #4]
-	str	r3, [sp, #8]
+	str	r2, [sp]
+	str	r3, [sp, #4]
 	mov	r3, r2
-	ldr	r2, [sp, #8]
-	add	r3, r3, r2, lsl #8
-	movs	r2, #255
-	str	r2, [r3, #2056]
+	ldr	r2, [sp, #4]
+	add	r5, r3, r2, lsl #8
+	movs	r3, #255
+	str	r3, [r5, #2056]
 	bl	NandcWaitFlashReady
-	ldr	r1, .L1385
 	cmp	r4, #7
-	it	eq
-	moveq	r3, #160
-	ldr	r2, [sp, #8]
-	itete	eq
-	mlaeq	r1, r3, r8, r1
-	addne	r1, r1, r8, lsl #6
-	addeq	r3, r1, #28
-	addne	r3, r1, #20
-	str	r3, [sp, #36]
+	bne	.L1325
+	ldr	r3, .L1425
+	movs	r0, #160
+	mla	r0, r0, r8, r3
+	add	r3, r0, #28
+.L1420:
+	ldr	r2, [sp, #4]
 	cmp	r4, #4
-	ldr	r3, [sp, #4]
+	str	r3, [sp, #20]
+	ldr	r3, [sp]
 	add	r3, r3, r2, lsl #8
 	mov	r2, #54
 	str	r2, [r3, #2056]
-	bne	.L1305
+	bne	.L1328
 	movs	r2, #255
 	str	r2, [r3, #2052]
 	movs	r2, #64
 	str	r2, [r3, #2048]
 	movs	r2, #204
-.L1382:
+.L1421:
 	str	r2, [r3, #2052]
 	movs	r2, #77
-	b	.L1383
-.L1305:
-	subs	r2, r4, #5
-	cmp	r2, #1
-	bhi	.L1307
-	ldr	r2, .L1385
-	ldrb	r2, [r2, #4]	@ zero_extendqisi2
+	b	.L1422
+.L1325:
+	cmp	r4, #8
+	beq	.L1327
+	ldr	r0, .L1425
+	add	r0, r0, r8, lsl #6
+	add	r3, r0, #20
+	b	.L1420
+.L1426:
+	.align	2
+.L1425:
+	.word	.LANCHOR20
+	.word	.LANCHOR196
+	.word	.LANCHOR25
+	.word	.LANCHOR26
+	.word	.LANCHOR6
+.L1328:
+	subs	r2, r4, #5
+	cmp	r2, #1
+	bhi	.L1330
+	ldr	r2, .L1427
+	ldrb	r2, [r2, #4]	@ zero_extendqisi2
 	str	r2, [r3, #2052]
 	movs	r2, #82
-.L1383:
+.L1422:
 	str	r2, [r3, #2048]
+.L1329:
+	ldr	r2, [sp, #4]
 	cmp	r4, #6
-	ldr	r3, [sp, #4]
-	mov	r0, r8
-	ldr	r2, [sp, #8]
-	add	r5, r3, r2, lsl #8
-	mov	r3, #22
-	ldr	r2, [sp, #8]
-	str	r3, [r5, #2056]
-	mov	r3, #23
-	str	r3, [r5, #2056]
-	mov	r3, #4
-	str	r3, [r5, #2056]
-	mov	r3, #25
-	str	r3, [r5, #2056]
-	mov	r3, #0
-	str	r3, [r5, #2056]
-	str	r3, [r5, #2052]
-	str	r3, [r5, #2052]
+	ldr	r3, [sp]
+	add	r3, r3, r2, lsl #8
+	mov	r2, #22
+	str	r2, [r3, #2056]
+	mov	r2, #23
+	str	r2, [r3, #2056]
+	mov	r2, #4
+	str	r2, [r3, #2056]
+	mov	r2, #25
+	str	r2, [r3, #2056]
+	mov	r2, #0
+	str	r2, [r3, #2056]
+	str	r2, [r3, #2052]
+	str	r2, [r3, #2052]
 	it	eq
-	moveq	r3, #31
-	str	r3, [r5, #2052]
-	movs	r3, #2
-	str	r3, [r5, #2052]
-	movs	r3, #0
-	str	r3, [r5, #2052]
-	ldr	r3, [sp, #4]
+	moveq	r2, #31
+	str	r2, [r3, #2052]
+	movs	r2, #2
+	str	r2, [r3, #2052]
+	movs	r2, #0
+	str	r2, [r3, #2052]
+.L1372:
+	ldr	r2, [sp, #4]
+	mov	r0, r8
+	ldr	r3, [sp]
 	add	r3, r3, r2, lsl #8
 	movs	r2, #48
 	str	r2, [r3, #2056]
 	bl	NandcWaitFlashReady
 	subs	r3, r4, #5
 	cmp	r3, #1
-	str	r3, [sp, #40]
-	bls	.L1344
+	str	r3, [sp, #36]
+	bls	.L1375
+	cmp	r4, #8
+	beq	.L1375
 	cmp	r4, #7
 	ite	eq
 	moveq	r2, #32
 	movne	r2, #2
-.L1310:
-	ldr	r3, .L1385+20
+.L1333:
+	ldr	r3, .L1427+4
 	subs	r2, r2, #1
+	ldm	sp, {r5, r6}
 	ldr	r3, [r3]
+	add	r5, r5, r6, lsl #8
 	subs	r1, r3, #1
 	uxtab	r2, r3, r2
 	mov	r0, r1
-.L1311:
-	ldr	r6, [r5, #2048]
-	strb	r6, [r0, #1]!
-	cmp	r2, r0
-	bne	.L1311
-	cmp	r4, #7
-	bne	.L1312
+	str	r5, [sp, #8]
+.L1334:
+	ldr	r5, [sp, #8]
+	ldr	r5, [r5, #2048]
+	strb	r5, [r0, #1]!
+	cmp	r0, r2
+	bne	.L1334
+	cmp	r4, #8
+	bne	.L1335
 	movs	r2, #0
-.L1314:
+.L1337:
 	ldrb	r0, [r3, r2, lsl #2]	@ zero_extendqisi2
 	uxtb	r1, r2
-	cmp	r0, #12
-	beq	.L1313
+	cmp	r0, #50
+	beq	.L1336
 	add	r0, r3, r2, lsl #2
 	ldrb	r0, [r0, #1]	@ zero_extendqisi2
-	cmp	r0, #10
-	beq	.L1313
+	cmp	r0, #5
+	beq	.L1336
 	adds	r2, r2, #1
 	cmp	r2, #8
-	bne	.L1314
-.L1315:
+	bne	.L1337
+.L1338:
 	movs	r1, #0
-	ldr	r0, .L1385+24
+	ldr	r0, .L1427+8
 	bl	printf
-.L1317:
-	b	.L1317
-.L1307:
+.L1340:
+	b	.L1340
+.L1330:
+	cmp	r4, #7
+	bne	.L1329
 	movs	r2, #174
 	str	r2, [r3, #2052]
 	movs	r2, #0
 	str	r2, [r3, #2048]
 	movs	r2, #176
-	b	.L1382
-.L1344:
+	b	.L1421
+.L1375:
 	movs	r2, #16
-	b	.L1310
-.L1386:
-	.align	2
-.L1385:
-	.word	.LANCHOR20
-	.word	.LANCHOR196
-	.word	.LANCHOR25
-	.word	.LANCHOR26
-	.word	.LANCHOR6
-	.word	.LANCHOR147
-	.word	.LC21
-.L1313:
+	b	.L1333
+.L1336:
 	cmp	r1, #6
-	bhi	.L1315
-.L1316:
-	ldr	r3, .L1387
-	ldr	lr, [r3]
-	mov	r3, lr
-.L1321:
-	ldr	r1, [sp, #52]
-	sub	r2, r3, lr
-	cmp	r1, r2
-	bgt	.L1322
-	ldr	r3, .L1387
+	bhi	.L1338
+.L1339:
+	ldr	r3, .L1427+4
+	ldr	r2, [r3]
+	mov	r3, r2
+.L1349:
+	ldr	r0, [sp, #48]
+	subs	r1, r3, r2
+	cmp	r1, r0
+	blt	.L1350
+	ldr	r3, .L1427+4
 	ldr	r1, [r3]
 	ldr	r3, [sp, #32]
 	adds	r0, r1, r3
 	movs	r3, #8
-.L1324:
-	mov	r7, r0
-	movs	r6, #0
-.L1323:
-	ldr	r2, [r7]
-	adds	r6, r6, #1
-	mvns	r2, r2
-	str	r2, [r7], #4
-	ldr	r2, [sp, #12]
-	cmp	r2, r6
-	bgt	.L1323
-	ldr	r2, [sp, #48]
+.L1352:
+	mov	r6, r0
+	movs	r5, #0
+.L1351:
+	ldrh	r7, [r6]
+	adds	r5, r5, #1
+	mvns	r7, r7
+	strh	r7, [r6], #2	@ movhi
+	ldr	r7, [sp, #12]
+	cmp	r7, r5
+	bgt	.L1351
+	ldr	r5, [sp, #44]
 	subs	r3, r3, #1
-	add	r0, r0, r2
-	bne	.L1324
-	str	r1, [sp, #20]
+	add	r0, r0, r5
+	bne	.L1352
+	mov	r7, r1
 	str	r3, [sp, #24]
-.L1330:
-	movs	r0, #0
-	mov	r2, r0
-.L1329:
+.L1358:
+	movs	r5, #0
+	mov	r0, r5
+.L1357:
 	movs	r3, #1
 	mov	ip, #0
-	lsl	r7, r3, r2
+	lsl	r6, r3, r0
 	movs	r3, #16
-	str	r3, [sp, #44]
+	str	r3, [sp, #40]
+	mov	lr, r6
 	mov	r6, r7
-	ldr	r7, [sp, #20]
-.L1327:
-	ldr	r3, [r7]
-	bics	r3, r6, r3
+.L1355:
+	ldrh	r3, [r6]
+	str	r3, [sp, #52]
+	ldr	r3, [sp, #52]
+	bics	r3, lr, r3
 	ldr	r3, [sp, #32]
 	it	eq
 	addeq	ip, ip, #1
-	add	r7, r7, r3
-	ldr	r3, [sp, #44]
+	add	r6, r6, r3
+	ldr	r3, [sp, #40]
 	subs	r3, r3, #1
-	str	r3, [sp, #44]
-	bne	.L1327
+	str	r3, [sp, #40]
+	bne	.L1355
 	cmp	ip, #8
-	add	r2, r2, #1
-	itt	hi
-	movhi	r3, r6
-	orrhi	r0, r0, r3
-	cmp	r2, #32
-	bne	.L1329
-	ldr	r3, [sp, #20]
-	str	r0, [r3], #4
-	str	r3, [sp, #20]
+	add	r0, r0, #1
+	ittt	hi
+	movhi	r3, lr
+	orrhi	r5, r5, r3
+	uxthhi	r5, r5
+	cmp	r0, #16
+	bne	.L1357
 	ldr	r3, [sp, #24]
+	strh	r5, [r7], #2	@ movhi
 	adds	r3, r3, #1
 	str	r3, [sp, #24]
-	ldr	r2, [sp, #24]
+	ldr	r0, [sp, #24]
 	ldr	r3, [sp, #12]
-	cmp	r3, r2
-	bgt	.L1330
-	subs	r2, r1, #4
-	add	r0, r1, #28
+	cmp	r3, r0
+	bgt	.L1358
+	subs	r0, r1, #4
+	add	r5, r1, #28
 	movs	r3, #0
-.L1333:
-	ldr	r6, [r2, #4]!
-	cbnz	r6, .L1332
+.L1361:
+	ldr	r6, [r0, #4]!
+	cbnz	r6, .L1360
 	adds	r3, r3, #1
-.L1332:
-	cmp	r0, r2
-	bne	.L1333
+.L1360:
+	cmp	r5, r0
+	bne	.L1361
 	cmp	r3, #7
-	ble	.L1334
-	ldr	r0, .L1387+4
+	ble	.L1362
+	ldr	r0, .L1427+12
 	mov	r3, #1024
 	movs	r2, #1
 	bl	rknand_print_hex
 	movs	r1, #0
-	ldr	r0, .L1387+8
+	ldr	r0, .L1427+8
 	bl	printf
+.L1363:
+	b	.L1363
 .L1335:
-	b	.L1335
-.L1312:
+	cmp	r4, #7
+	bne	.L1341
+	movs	r2, #0
+.L1343:
+	ldrb	r0, [r3, r2, lsl #2]	@ zero_extendqisi2
+	uxtb	r1, r2
+	cmp	r0, #12
+	beq	.L1342
+	add	r0, r3, r2, lsl #2
+	ldrb	r0, [r0, #1]	@ zero_extendqisi2
+	cmp	r0, #10
+	beq	.L1342
+	adds	r2, r2, #1
+	cmp	r2, #8
+	bne	.L1343
+.L1344:
+	movs	r1, #0
+	ldr	r0, .L1427+8
+	bl	printf
+.L1345:
+	b	.L1345
+.L1342:
+	cmp	r1, #6
+	bls	.L1339
+	b	.L1344
+.L1341:
 	cmp	r4, #6
-	bne	.L1316
+	bne	.L1339
 	adds	r3, r3, #7
-.L1318:
+.L1346:
 	ldrb	r2, [r1, #1]!	@ zero_extendqisi2
 	cmp	r2, #12
-	beq	.L1316
+	beq	.L1339
 	ldrb	r2, [r1, #8]	@ zero_extendqisi2
 	cmp	r2, #4
-	beq	.L1316
-	cmp	r3, r1
-	bne	.L1318
+	beq	.L1339
+	cmp	r1, r3
+	bne	.L1346
 	movs	r1, #0
-	ldr	r0, .L1387+8
+	ldr	r0, .L1427+8
 	bl	printf
-.L1320:
-	b	.L1320
-.L1322:
-	ldr	r2, [r5, #2048]
-	strb	r2, [r3], #1
-	b	.L1321
-.L1334:
+.L1348:
+	b	.L1348
+.L1350:
+	ldr	r1, [sp, #8]
+	ldr	r1, [r1, #2048]
+	strb	r1, [r3], #1
+	b	.L1349
+.L1362:
 	cmp	r4, #6
-	beq	.L1346
+	beq	.L1377
 	cmp	r4, #7
+	beq	.L1378
+	cmp	r4, #8
 	ite	eq
-	moveq	ip, #10
-	movne	ip, #8
-.L1336:
-	add	r3, fp, #-1
-	ldr	r1, [sp, #36]
+	moveq	r6, #5
+	movne	r6, #8
+.L1364:
+	add	r3, r10, #-1
+	ldr	r0, [sp, #20]
 	uxtb	r3, r3
-	movs	r0, #0
+	movs	r5, #0
 	adds	r3, r3, #1
-.L1337:
-	mov	r7, r1
-	mov	r2, lr
-.L1338:
-	ldrb	r6, [r2], #1	@ zero_extendqisi2
-	strb	r6, [r7], #1
-	sub	r6, r2, lr
-	uxtb	r6, r6
-	cmp	fp, r6
-	bhi	.L1338
-	adds	r0, r0, #1
-	add	lr, lr, r3
-	cmp	r10, r0
-	add	r1, r1, ip
-	bgt	.L1337
-	ldr	r3, [sp, #4]
+.L1365:
+	mov	ip, r0
+	mov	r1, r2
+.L1366:
+	ldrb	r7, [r1], #1	@ zero_extendqisi2
+	strb	r7, [ip], #1
+	subs	r7, r1, r2
+	uxtb	r7, r7
+	cmp	r10, r7
+	bhi	.L1366
+	adds	r5, r5, #1
+	add	r2, r2, r3
+	cmp	fp, r5
+	add	r0, r0, r6
+	bgt	.L1365
+	ldr	r3, [sp]
 	mov	r0, r8
-	ldr	r2, [sp, #8]
-	add	r6, r3, r2, lsl #8
+	ldr	r2, [sp, #4]
+	add	r5, r3, r2, lsl #8
 	movs	r3, #255
-	str	r3, [r6, #2056]
+	str	r3, [r5, #2056]
 	bl	NandcWaitFlashReady
-	ldr	r3, [sp, #40]
+	ldr	r3, [sp, #36]
 	cmp	r3, #1
-	bhi	.L1340
+	bhi	.L1368
 	movs	r3, #54
+	ldr	r2, [sp, #8]
+	str	r3, [r5, #2056]
 	mov	r1, #-1
-	str	r3, [r6, #2056]
-	ldr	r3, .L1387+12
+	ldr	r3, .L1427
 	ldr	r0, [sp, #16]
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-	str	r3, [r5, #2052]
+	str	r3, [r2, #2052]
 	movs	r3, #0
-	str	r3, [r5, #2048]
+	str	r3, [r2, #2048]
 	movs	r3, #22
-	str	r3, [r6, #2056]
+	str	r3, [r5, #2056]
 	bl	FlashReadCmd
-.L1341:
+.L1369:
 	mov	r0, r8
 	bl	NandcWaitFlashReady
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
-	b	.L1384
-.L1346:
-	mov	ip, #4
-	b	.L1336
-.L1340:
-	movs	r3, #56
-	str	r3, [r6, #2056]
-	b	.L1341
-.L1388:
+	b	.L1424
+.L1377:
+	movs	r6, #4
+	b	.L1364
+.L1378:
+	movs	r6, #10
+	b	.L1364
+.L1368:
+	cmp	r4, #8
+	ite	eq
+	moveq	r3, #190
+	movne	r3, #56
+	str	r3, [r5, #2056]
+	b	.L1369
+.L1327:
+	movs	r3, #120
+	movs	r2, #23
+	str	r3, [r5, #2056]
+	movs	r3, #0
+	str	r3, [r5, #2052]
+	movs	r1, #25
+	str	r3, [r5, #2052]
+	str	r3, [r5, #2052]
+	str	r2, [r5, #2056]
+	movs	r2, #4
+	str	r2, [r5, #2056]
+	str	r1, [r5, #2056]
+	movs	r1, #218
+	str	r1, [r5, #2056]
+	movs	r1, #21
+	str	r3, [r5, #2056]
+	str	r3, [r5, #2052]
+	str	r3, [r5, #2052]
+	str	r1, [r5, #2052]
+	str	r2, [r5, #2052]
+	str	r3, [r5, #2052]
+	ldr	r3, .L1427+16
+	str	r3, [sp, #20]
+	b	.L1372
+.L1428:
 	.align	2
-.L1387:
+.L1427:
+	.word	.LANCHOR20
 	.word	.LANCHOR147
-	.word	.LC22
 	.word	.LC21
-	.word	.LANCHOR20
+	.word	.LC22
+	.word	.LANCHOR20+28
 	.size	HynixGetReadRetryDefault, .-HynixGetReadRetryDefault
 	.section	.text.FlashGetReadRetryDefault,"ax",%progbits
 	.align	1
@@ -10067,76 +10289,76 @@ FlashGetReadRetryDefault:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	mov	r3, r0
-	cbz	r0, .L1389
+	cbz	r0, .L1429
 	subs	r2, r0, #1
-	cmp	r2, #6
-	bhi	.L1391
+	cmp	r2, #7
+	bhi	.L1431
 	b	HynixGetReadRetryDefault
-.L1391:
+.L1431:
 	cmp	r0, #49
-	bne	.L1392
-	ldr	r0, .L1412
+	bne	.L1432
+	ldr	r0, .L1452
 	movs	r2, #64
-	ldr	r1, .L1412+4
+	ldr	r1, .L1452+4
 	strb	r3, [r0]
 	movs	r3, #4
 	strb	r3, [r0, #1]
 	movs	r3, #15
 	strb	r3, [r0, #2]
-.L1410:
+.L1450:
 	adds	r0, r0, #4
 	b	ftl_memcpy
-.L1392:
+.L1432:
 	cmp	r0, #33
-	beq	.L1393
+	beq	.L1433
 	sub	r2, r0, #65
 	cmp	r2, #1
-	bhi	.L1394
-.L1393:
-	ldr	r0, .L1412
+	bhi	.L1434
+.L1433:
+	ldr	r0, .L1452
 	strb	r3, [r0]
 	movs	r3, #4
-.L1411:
+.L1451:
 	strb	r3, [r0, #1]
 	movs	r3, #7
 	strb	r3, [r0, #2]
 	movs	r2, #45
-	ldr	r1, .L1412+8
-	b	.L1410
-.L1394:
+	ldr	r1, .L1452+8
+	b	.L1450
+.L1434:
 	cmp	r0, #34
-	beq	.L1395
+	beq	.L1435
 	cmp	r0, #67
-	bne	.L1396
-.L1395:
-	ldr	r0, .L1412
+	bne	.L1436
+.L1435:
+	ldr	r0, .L1452
 	strb	r3, [r0]
 	movs	r3, #5
-	b	.L1411
-.L1396:
+	b	.L1451
+.L1436:
 	cmp	r0, #35
-	beq	.L1397
+	beq	.L1437
 	cmp	r0, #68
-	bne	.L1389
-.L1397:
-	ldr	r0, .L1412
+	bne	.L1429
+.L1437:
+	ldr	r0, .L1452
 	movs	r2, #95
-	ldr	r1, .L1412+12
+	ldr	r1, .L1452+12
 	strb	r3, [r0]
 	movs	r3, #5
 	strb	r3, [r0, #1]
 	movs	r3, #17
 	strb	r3, [r0, #2]
-	b	.L1410
-.L1389:
+	b	.L1450
+.L1429:
 	bx	lr
-.L1413:
+.L1453:
 	.align	2
-.L1412:
+.L1452:
 	.word	.LANCHOR20
-	.word	.LANCHOR14
-	.word	.LANCHOR9
-	.word	.LANCHOR11
+	.word	.LANCHOR13
+	.word	.LANCHOR8
+	.word	.LANCHOR10
 	.size	FlashGetReadRetryDefault, .-FlashGetReadRetryDefault
 	.section	.text.FlashInit,"ax",%progbits
 	.align	1
@@ -10155,28 +10377,28 @@ FlashInit:
 	mov	r0, #32768
 	movs	r5, #0
 	bl	ftl_malloc
-	ldr	r3, .L1507
-	ldr	r10, .L1507+132
-	ldr	r8, .L1507+136
+	ldr	r3, .L1554
+	ldr	r10, .L1554+120
+	ldr	r8, .L1554+124
 	str	r0, [r3]
 	mov	r0, #32768
 	bl	ftl_malloc
-	ldr	r3, .L1507+4
-	ldr	r6, .L1507+8
-	ldr	r7, .L1507+12
+	ldr	r3, .L1554+4
+	ldr	r6, .L1554+8
+	ldr	r7, .L1554+12
 	str	r0, [r3]
 	mov	r0, #4096
 	bl	ftl_malloc
-	ldr	r3, .L1507+16
+	ldr	r3, .L1554+16
 	str	r0, [r3]
 	mov	r0, #32768
 	bl	ftl_malloc
-	ldr	r3, .L1507+20
+	ldr	r3, .L1554+20
 	str	r0, [r3]
 	mov	r0, #4096
 	bl	ftl_malloc
-	ldr	r3, .L1507+24
-	ldr	r2, .L1507+28
+	ldr	r3, .L1554+24
+	ldr	r2, .L1554+28
 	strb	r5, [r8]
 	str	r0, [r3]
 	movs	r3, #50
@@ -10184,32 +10406,33 @@ FlashInit:
 	mov	r0, r4
 	strb	r3, [r2]
 	movs	r2, #128
-	ldr	r3, .L1507+32
-	ldr	r4, .L1507+36
+	ldr	r3, .L1554+32
+	ldr	r4, .L1554+36
 	strb	r5, [r7]
 	str	r5, [r3]
-	ldr	r3, .L1507+40
+	ldr	r3, .L1554+40
 	str	r2, [r3]
-	ldr	r3, .L1507+44
+	ldr	r3, .L1554+44
 	str	r5, [r3]
 	movs	r3, #60
 	strb	r3, [r6]
 	bl	NandcInit
 	str	r10, [sp, #20]
-	ldr	r10, .L1507+140
+	ldr	r10, .L1554+128
 	str	r8, [sp, #16]
 	mov	r8, r6
 	mov	r6, r4
-.L1419:
-	uxtb	fp, r5
-	mov	r0, fp
-	bl	FlashReset
+.L1459:
 	add	r1, r10, r5, lsl #3
+	uxtb	r2, r5
 	ldr	r3, [r10, r5, lsl #3]
-	mov	r0, fp
 	ldrb	r1, [r1, #4]	@ zero_extendqisi2
+	mov	fp, r2
+	mov	r0, r2
 	str	r3, [sp, #28]
 	str	r1, [sp, #24]
+	bl	FlashReset
+	mov	r0, fp
 	bl	NandcFlashCs
 	ldr	r1, [sp, #24]
 	movs	r0, #200
@@ -10240,10 +10463,10 @@ FlashInit:
 	subs	r3, r2, #1
 	uxtb	r3, r3
 	cmp	r3, #253
-	bhi	.L1415
+	bhi	.L1455
 	ldrb	r1, [r4, #5]	@ zero_extendqisi2
 	ldrb	r3, [r4, #1]	@ zero_extendqisi2
-	ldr	r0, .L1507+48
+	ldr	r0, .L1554+48
 	str	r1, [sp, #12]
 	ldrb	r1, [r4, #4]	@ zero_extendqisi2
 	str	r1, [sp, #8]
@@ -10253,17 +10476,17 @@ FlashInit:
 	str	r1, [sp]
 	adds	r1, r5, #1
 	bl	printf
-.L1415:
-	cbnz	r5, .L1416
+.L1455:
+	cbnz	r5, .L1456
 	ldrb	r3, [r6]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, #253
-	bhi	.L1460
+	bhi	.L1503
 	ldrb	r3, [r6, #1]	@ zero_extendqisi2
 	cmp	r3, #255
-	beq	.L1460
-.L1416:
+	beq	.L1503
+.L1456:
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	adds	r5, r5, #1
 	adds	r4, r4, #8
@@ -10272,195 +10495,195 @@ FlashInit:
 	moveq	r3, #44
 	strbeq	r3, [r4, #-8]
 	cmp	r5, #4
-	bne	.L1419
+	bne	.L1459
 	ldrb	r3, [r6]	@ zero_extendqisi2
 	cmp	r3, #173
-	beq	.L1420
-	ldr	r3, .L1507+52
+	beq	.L1460
+	ldr	r3, .L1554+52
 	ldr	r0, [r3]
 	bl	NandcSetDdrMode
-.L1420:
+.L1460:
 	mov	r2, #852
 	movs	r1, #0
-	ldr	r0, .L1507+56
+	ldr	r0, .L1554+56
 	bl	ftl_memset
-	ldr	r4, .L1507+60
-	ldr	r3, .L1507+64
-	ldr	r5, .L1507+68
+	ldr	r4, .L1554+60
+	movs	r2, #0
+	ldr	r3, .L1554+64
+	ldr	r5, .L1554+68
 	str	r3, [r4]
-	movs	r3, #0
-	strb	r3, [r5]
-	ldrb	r3, [r6, #1]	@ zero_extendqisi2
-	cmp	r3, #161
-	beq	.L1421
+	ldr	r3, .L1554+72
+	strb	r2, [r3]
+	mov	r10, r3
+	ldr	r2, .L1554+76
+	ldr	r1, [r2]
+	cmp	r1, r5
+	ittt	eq
+	ldreq	r3, .L1554+80
+	moveq	r2, #1
+	streq	r2, [r3]
+	ldrb	r3, [r6, #1]	@ zero_extendqisi2
+	cmp	r3, #161
+	beq	.L1462
+	cmp	r3, #241
+	beq	.L1462
 	cmp	r3, #218
-	beq	.L1421
-	and	r2, r3, #223
+	beq	.L1462
+	and	r2, r3, #253
 	cmp	r2, #209
-	beq	.L1421
+	beq	.L1462
 	cmp	r3, #220
-	bne	.L1422
+	bne	.L1463
 	ldrb	r2, [r6, #3]	@ zero_extendqisi2
 	cmp	r2, #149
-	bne	.L1422
-.L1421:
-	ldr	r1, [sp, #16]
+	bne	.L1463
+.L1462:
+	ldr	r0, [sp, #16]
 	movs	r2, #1
-	strb	r2, [r1]
+	strb	r2, [r0]
 	movs	r2, #16
-	ldr	r1, [sp, #20]
+	ldr	r0, [sp, #20]
 	strb	r2, [r8]
-	strb	r2, [r1]
-	ldrb	r1, [r6]	@ zero_extendqisi2
-	ldr	r2, .L1507+72
-	cmp	r1, #152
-	strb	r1, [r2, #1]
+	strb	r2, [r0]
+	ldrb	r0, [r6]	@ zero_extendqisi2
+	ldr	r2, .L1554+84
+	cmp	r0, #152
+	strb	r0, [r2, #1]
 	strb	r3, [r2, #2]
-	bne	.L1423
-	ldrsb	r1, [r6, #4]
-	cmp	r1, #0
+	bne	.L1464
+	ldrsb	r0, [r6, #4]
+	cmp	r0, #0
 	itt	ge
-	movge	r1, #24
-	strbge	r1, [r8]
-.L1423:
-	ldr	r1, .L1507+76
-	ldr	r0, .L1507+80
-	ldr	r1, [r1]
-	cmp	r1, r0
-	beq	.L1424
+	movge	r0, #24
+	strbge	r0, [r8]
+.L1464:
+	cmp	r1, r5
+	beq	.L1465
 	movw	r0, #2049
 	cmp	r1, r0
-	bne	.L1425
-.L1424:
+	bne	.L1466
+.L1465:
 	movs	r1, #16
 	strb	r1, [r8]
-.L1425:
+.L1466:
 	cmp	r3, #218
-	bne	.L1426
+	bne	.L1467
 	mov	r1, #2048
-.L1503:
+.L1550:
 	strh	r1, [r2, #14]	@ movhi
 	strb	r3, [r2, #2]
-.L1427:
+.L1468:
 	movs	r2, #32
-	ldr	r1, .L1507+84
-	ldr	r0, .L1507+88
+	ldr	r1, .L1554+88
+	ldr	r0, .L1554+92
 	bl	ftl_memcpy
 	movs	r2, #32
-	ldr	r1, .L1507+72
-	ldr	r0, .L1507+64
+	ldr	r1, .L1554+84
+	ldr	r0, .L1554+64
 	bl	ftl_memcpy
-.L1422:
+.L1463:
 	ldr	r3, [sp, #16]
-	ldr	r8, .L1507+144
+	ldr	r8, .L1554+132
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1429
+	bne	.L1471
 	bl	FlashLoadPhyInfoInRam
-	cbnz	r0, .L1431
+	cbnz	r0, .L1473
 	ldr	r3, [r4]
-	ldr	r10, .L1507+100
+	ldr	fp, .L1554+104
 	ldrh	r3, [r3, #16]
 	lsrs	r3, r3, #8
 	lsls	r1, r3, #31
 	and	r0, r3, #7
-	strb	r0, [r10]
-	bmi	.L1431
+	strb	r0, [fp]
+	bmi	.L1473
 	movs	r3, #1
 	strb	r3, [r7]
 	bl	FlashSetInterfaceMode
-	ldrb	r0, [r10]	@ zero_extendqisi2
+	ldrb	r0, [fp]	@ zero_extendqisi2
 	bl	NandcSetMode
-.L1431:
+.L1473:
 	ldr	r3, [r4]
 	ldrb	r3, [r3, #26]	@ zero_extendqisi2
 	strb	r3, [r8]
 	bl	FlashLoadPhyInfo
 	cmp	r0, #0
-	beq	.L1429
+	beq	.L1471
 	ldr	r3, [r4]
-	ldr	r0, .L1507+92
+	ldr	r0, .L1554+96
 	ldrh	r1, [r3, #14]
 	bl	printf
 	bl	FlashLoadPhyInfoInRam
 	adds	r2, r0, #1
-	beq	.L1414
+	beq	.L1454
 	bl	FlashDieInfoInit
 	ldr	r3, [r4]
 	ldrb	r0, [r3, #19]	@ zero_extendqisi2
 	bl	FlashGetReadRetryDefault
 	ldr	r3, [r4]
-	ldr	r2, .L1507+96
+	ldr	r2, .L1554+100
 	ldrb	r1, [r3, #9]	@ zero_extendqisi2
 	ldrh	r2, [r2]
 	addw	r2, r2, #4095
 	cmp	r1, r2, asr #12
-	blt	.L1434
+	blt	.L1476
 	ldrh	r2, [r3, #14]
 	adds	r2, r2, #255
 	cmp	r1, r2, asr #8
-	bge	.L1435
-.L1434:
+	bge	.L1477
+.L1476:
 	ldrh	r2, [r3, #14]
 	bic	r2, r2, #255
 	strh	r2, [r3, #14]	@ movhi
-.L1435:
-	ldr	r3, .L1507+100
+.L1477:
+	ldr	r3, .L1554+104
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	tst	r3, #6
-	beq	.L1436
+	beq	.L1478
 	bl	FlashSavePhyInfo
-	ldr	r3, .L1507+104
+	ldr	r3, .L1554+108
 	movs	r0, #0
 	ldr	r1, [r3]
 	bl	FlashDdrParaScan
-.L1436:
+.L1478:
 	bl	FlashSavePhyInfo
-.L1429:
+.L1471:
 	ldr	fp, [r4]
-	ldr	r10, .L1507+100
+	ldrh	r2, [fp, #16]
 	ldrb	r3, [fp, #26]	@ zero_extendqisi2
 	ldrh	r0, [fp, #10]
+	ubfx	r1, r2, #3, #1
 	strb	r3, [r8]
-	ldrh	r3, [fp, #16]
-	ubfx	r2, r3, #7, #1
-	ubfx	r1, r3, #3, #1
-	strb	r2, [r5]
-	ldr	r2, .L1507+108
-	ldr	r5, .L1507+112
-	strb	r1, [r2]
-	ubfx	r1, r3, #4, #1
-	ldr	r2, .L1507+116
-	ubfx	r3, r3, #8, #3
+	ubfx	r3, r2, #7, #1
 	strb	r3, [r10]
-	movs	r3, #0
-	str	r3, [r5]
-	strb	r1, [r2]
+	ldr	r3, .L1554+112
+	ldr	r10, .L1554+136
+	strb	r1, [r3]
+	ubfx	r1, r2, #4, #1
+	ldr	r3, .L1554+116
+	ubfx	r2, r2, #8, #3
+	strb	r1, [r3]
+	ldr	r3, .L1554+104
 	ldrb	r1, [fp, #12]	@ zero_extendqisi2
+	strb	r2, [r3]
+	movs	r2, #0
+	str	r2, [r10]
+	str	r3, [sp, #24]
 	bl	__aeabi_idiv
 	mov	r1, r0
 	ldrb	r0, [fp, #18]	@ zero_extendqisi2
 	bl	BuildFlashLsbPageTable
 	bl	FlashDieInfoInit
-	ldr	r3, [r4]
-	mov	ip, r5
-	ldrh	r2, [r3, #16]
-	tst	r2, #64
-	beq	.L1438
-	ldrb	r0, [r3, #19]	@ zero_extendqisi2
-	ldr	r3, .L1507+120
-	ldr	r2, .L1507+124
-	strb	r0, [r3]
-	ldr	r3, .L1507+56
-	ldrb	r1, [r3, #1]	@ zero_extendqisi2
-	ldrb	lr, [r3, #2]	@ zero_extendqisi2
-	strb	r1, [r2]
-	ldr	r1, .L1507+128
-	strb	lr, [r1]
-	b	.L1508
-.L1509:
-	.align	2
-.L1507:
+	ldr	r2, [r4]
+	ldr	r3, [sp, #24]
+	ldrh	r1, [r2, #16]
+	mov	fp, r3
+	tst	r1, #64
+	mov	r1, r10
+	b	.L1555
+.L1556:
+	.align	2
+.L1554:
 	.word	.LANCHOR147
 	.word	.LANCHOR153
 	.word	.LANCHOR152
@@ -10478,10 +10701,11 @@ FlashInit:
 	.word	.LANCHOR20
 	.word	.LANCHOR18
 	.word	.LANCHOR31
+	.word	1446522928
 	.word	.LANCHOR5
-	.word	.LANCHOR200
+	.word	.LANCHOR119
 	.word	.LANCHOR29
-	.word	1446522928
+	.word	.LANCHOR200
 	.word	.LANCHOR143+32
 	.word	.LANCHOR7
 	.word	.LC24
@@ -10489,94 +10713,112 @@ FlashInit:
 	.word	.LANCHOR24
 	.word	.LANCHOR148
 	.word	.LANCHOR201
-	.word	.LANCHOR145
 	.word	.LANCHOR27
-	.word	.LANCHOR10
-	.word	.LANCHOR13
-	.word	.LANCHOR151
 	.word	.LANCHOR2
 	.word	.LANCHOR1
 	.word	.LANCHOR6
-	.word	.LANCHOR8
-.L1508:
-	add	lr, r0, #-1
-	cmp	lr, #6
-	mov	lr, r1
-	bhi	.L1439
-	ldr	r2, .L1510
-	str	r2, [r5]
-	subs	r2, r0, #5
-	cmp	r2, #1
-	bhi	.L1440
-	ldr	r2, .L1510+4
-	adds	r3, r3, #20
-	movs	r1, #1
-	str	r1, [r2]
-.L1441:
+	.word	.LANCHOR15
+	.word	.LANCHOR145
+.L1555:
+	beq	.L1480
+	ldrb	r0, [r2, #19]	@ zero_extendqisi2
+	ldr	r3, .L1557
+	ldr	ip, .L1557+56
+	strb	r0, [r3]
+	ldrb	r2, [ip, #1]	@ zero_extendqisi2
+	ldr	r3, .L1557+4
+	ldrb	ip, [ip, #2]	@ zero_extendqisi2
+	strb	r2, [r3]
+	ldr	r2, .L1557+8
+	strb	ip, [r2]
+	add	ip, r0, #-1
+	cmp	ip, #7
+	mov	ip, r2
+	bhi	.L1481
+	ldr	r3, .L1557+12
+	str	r3, [r10]
+	subs	r3, r0, #5
+	cmp	r3, #1
+	bls	.L1482
+	cmp	r0, #8
+	bne	.L1483
+.L1482:
+	ldr	r3, .L1557+16
+	movs	r2, #1
+	str	r2, [r3]
+.L1483:
+	cmp	r0, #7
+	ldr	r3, .L1557+20
+	beq	.L1484
+	sub	r2, r3, #8
+	cmp	r0, #8
+	it	ne
+	movne	r3, r2
+.L1484:
 	subs	r1, r3, #1
 	movs	r2, #0
 	adds	r3, r3, #31
-.L1443:
-	ldrsb	r5, [r1, #1]!
-	cbnz	r5, .L1442
+.L1486:
+	ldrsb	ip, [r1, #1]!
+	cmp	ip, #0
+	bne	.L1485
 	adds	r2, r2, #1
-.L1442:
+.L1485:
 	cmp	r3, r1
-	bne	.L1443
+	bne	.L1486
 	cmp	r2, #27
-	bls	.L1438
+	bls	.L1480
 	bl	FlashGetReadRetryDefault
 	bl	FlashSavePhyInfo
-.L1438:
-	ldr	r3, .L1510+8
-	ldr	r2, [r3]
-	ldr	r3, .L1510+12
-	cmp	r2, r3
-	bne	.L1454
+.L1480:
+	ldr	r3, .L1557+24
+	ldr	r3, [r3]
+	cmp	r3, r5
+	bne	.L1497
 	ldrb	r3, [r8]	@ zero_extendqisi2
-	cbz	r3, .L1454
+	cbz	r3, .L1497
 	ldr	r3, [r4]
 	movs	r2, #0
 	strb	r2, [r3, #18]
-.L1454:
+.L1497:
 	ldrb	r3, [r6]	@ zero_extendqisi2
 	cmp	r3, #44
-	bne	.L1455
+	bne	.L1498
 	ldrb	r3, [r7]	@ zero_extendqisi2
-	cbz	r3, .L1455
+	cbz	r3, .L1498
 	movs	r3, #0
 	movs	r0, #1
 	strb	r3, [r7]
 	bl	FlashSetInterfaceMode
 	movs	r0, #1
 	bl	NandcSetMode
-.L1455:
-	movs	r0, #0
-	bl	flash_enter_slc_mode
-	ldrb	r3, [r10]	@ zero_extendqisi2
+.L1498:
+	ldrb	r3, [fp]	@ zero_extendqisi2
 	tst	r3, #6
-	beq	.L1456
+	beq	.L1499
 	ldrb	r2, [r7]	@ zero_extendqisi2
-	cbnz	r2, .L1457
+	cbnz	r2, .L1500
 	lsls	r3, r3, #31
-	bmi	.L1456
-.L1457:
-	ldr	r3, .L1510+16
+	bmi	.L1499
+.L1500:
+	movs	r0, #0
+	bl	flash_enter_slc_mode
+	ldr	r3, .L1557+28
 	movs	r0, #0
 	ldr	r1, [r3]
 	bl	FlashDdrParaScan
-.L1456:
 	movs	r0, #0
-	movs	r7, #16
 	bl	flash_exit_slc_mode
+.L1499:
 	ldr	r3, [r4]
+	movs	r7, #16
 	ldrb	r0, [r3, #20]	@ zero_extendqisi2
 	bl	FlashBchSel
-	ldr	r0, .L1510+20
+	ldr	r0, .L1557+32
 	bl	FlashReadIdbDataRaw
 	ldr	r8, [r4]
 	ldr	r3, [sp, #20]
-	ldr	r4, .L1510+24
+	ldr	r4, .L1557+36
 	ldrb	r1, [r8, #12]	@ zero_extendqisi2
 	strb	r7, [r3]
 	ldrh	r5, [r8, #10]
@@ -10587,7 +10829,7 @@ FlashInit:
 	ldr	r3, [r6]
 	ldrh	r6, [r8, #14]
 	str	r3, [r4]
-	ldr	r3, .L1510+28
+	ldr	r3, .L1557+40
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	strh	r3, [r4, #10]	@ movhi
 	ldrb	r3, [r8, #13]	@ zero_extendqisi2
@@ -10607,7 +10849,7 @@ FlashInit:
 	uxth	r5, r5
 	cmp	r2, #1
 	strh	r5, [r4, #22]	@ movhi
-	bne	.L1458
+	bne	.L1501
 	lsls	r3, r3, #1
 	lsrs	r2, r6, #1
 	lsls	r5, r5, #1
@@ -10616,104 +10858,108 @@ FlashInit:
 	strh	r2, [r4, #14]	@ movhi
 	strh	r5, [r4, #22]	@ movhi
 	strh	r3, [r4, #26]	@ movhi
-.L1458:
+.L1501:
 	ldrb	r0, [r8, #20]	@ zero_extendqisi2
 	bl	FlashBchSel
 	movs	r0, #0
-.L1414:
+.L1454:
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1426:
+.L1467:
 	cmp	r3, #220
-	bne	.L1427
+	bne	.L1469
 	mov	r1, #4096
-	b	.L1503
-.L1440:
-	add	r2, r3, #28
-	adds	r3, r3, #20
-	cmp	r0, #7
-	it	eq
-	moveq	r3, r2
-	b	.L1441
-.L1439:
-	sub	r3, r0, #17
-	cmp	r3, #2
-	bhi	.L1445
-	ldr	r3, .L1510+32
+	b	.L1550
+.L1469:
+	cmp	r3, #211
+	itttt	eq
+	moveq	r3, #4096
+	strheq	r3, [r2, #14]	@ movhi
+	moveq	r3, #2
+	strbeq	r3, [r2, #13]
+	b	.L1468
+.L1481:
+	sub	lr, r0, #17
+	cmp	lr, #2
+	bhi	.L1488
+	ldr	r3, .L1557+44
 	cmp	r0, #19
-	str	r3, [r5]
+	str	r3, [r10]
 	ite	ne
 	movne	r3, #7
 	moveq	r3, #15
-	strb	r3, [r1]
-	b	.L1438
-.L1445:
-	cmp	r0, #33
-	beq	.L1447
-	sub	r3, r0, #65
-	cmp	r3, #1
-	bhi	.L1448
-.L1447:
-	ldr	r3, .L1510+36
-	str	r3, [ip]
-	movs	r3, #4
 	strb	r3, [r2]
+	b	.L1480
+.L1488:
+	cmp	r0, #33
+	beq	.L1490
+	sub	r2, r0, #65
+	cmp	r2, #1
+	bhi	.L1491
+.L1490:
+	ldr	r2, .L1557+48
+	str	r2, [r1]
+	movs	r2, #4
+	strb	r2, [r3]
 	movs	r3, #7
-	strb	r3, [lr]
-	b	.L1438
-.L1448:
-	sub	r3, r0, #67
-	uxtb	r3, r3
-	cmp	r3, #1
-	bls	.L1449
-	sub	r1, r0, #34
-	cmp	r1, #1
-	bhi	.L1450
-.L1449:
-	ldr	r1, .L1510+36
+	strb	r3, [ip]
+	b	.L1480
+.L1491:
+	sub	r2, r0, #67
+	uxtb	r2, r2
+	cmp	r2, #1
+	bls	.L1492
+	sub	ip, r0, #34
+	cmp	ip, #1
+	bhi	.L1493
+.L1492:
+	ldr	ip, .L1557+48
 	cmp	r0, #35
-	str	r1, [ip]
-	ldr	r1, .L1510+40
-	beq	.L1451
+	str	ip, [r1]
+	ldr	r1, .L1557+8
+	beq	.L1494
 	cmp	r0, #68
-	beq	.L1451
+	beq	.L1494
 	movs	r0, #7
-.L1504:
-	cmp	r3, #1
+.L1551:
+	cmp	r2, #1
 	strb	r0, [r1]
 	ite	ls
-	movls	r3, #4
-	movhi	r3, #5
-	strb	r3, [r2]
-	b	.L1438
-.L1451:
+	movls	r2, #4
+	movhi	r2, #5
+	strb	r2, [r3]
+	b	.L1480
+.L1494:
 	movs	r0, #17
-	b	.L1504
-.L1450:
+	b	.L1551
+.L1493:
 	cmp	r0, #49
 	itt	eq
-	ldreq	r3, .L1510+44
-	streq	r3, [r5]
-	b	.L1438
-.L1460:
+	ldreq	r3, .L1557+52
+	streq	r3, [r10]
+	b	.L1480
+.L1503:
 	mvn	r0, #1
-	b	.L1414
-.L1511:
+	b	.L1454
+.L1558:
 	.align	2
-.L1510:
+.L1557:
+	.word	.LANCHOR9
+	.word	.LANCHOR12
+	.word	.LANCHOR151
 	.word	HynixReadRetrial
 	.word	.LANCHOR36
-	.word	.LANCHOR29
-	.word	1446522928
+	.word	.LANCHOR20+28
+	.word	.LANCHOR119
 	.word	.LANCHOR148
 	.word	.LANCHOR141
-	.word	.LANCHOR15
+	.word	.LANCHOR14
 	.word	.LANCHOR25
 	.word	MicronReadRetrial
 	.word	ToshibaReadRetrial
-	.word	.LANCHOR151
 	.word	SamsungReadRetrial
+	.word	.LANCHOR20
 	.size	FlashInit, .-FlashInit
 	.section	.text.FlashReadSlc2KPages,"ax",%progbits
 	.align	1
@@ -10728,19 +10974,19 @@ FlashReadSlc2KPages:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r8, r1
-	ldr	r3, .L1541
+	ldr	r3, .L1588
 	mov	fp, r2
 	mov	r4, r0
 	movs	r7, #0
 	ldrb	r10, [r3, #9]	@ zero_extendqisi2
-.L1513:
+.L1560:
 	cmp	r7, r8
-	bne	.L1526
+	bne	.L1573
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1526:
+.L1573:
 	sub	r3, r8, r7
 	add	r2, sp, #12
 	uxtb	r3, r3
@@ -10749,19 +10995,19 @@ FlashReadSlc2KPages:
 	str	r3, [sp]
 	add	r3, sp, #8
 	bl	LogAddr2PhyAddr
-	ldr	r2, .L1541+4
+	ldr	r2, .L1588+4
 	ldr	r3, [sp, #8]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, r3
-	bhi	.L1514
+	bhi	.L1561
 	mov	r3, #-1
 	str	r3, [r4]
-.L1515:
+.L1562:
 	adds	r7, r7, #1
 	adds	r4, r4, #36
-	b	.L1513
-.L1514:
-	ldr	r2, .L1541+8
+	b	.L1560
+.L1561:
+	ldr	r2, .L1588+8
 	ldrb	r5, [r2, r3]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	NandcWaitFlashReady
@@ -10779,7 +11025,7 @@ FlashReadSlc2KPages:
 	str	r3, [sp]
 	ldr	r3, [r4, #8]
 	bl	NandcXferData
-	ldr	r3, .L1541+12
+	ldr	r3, .L1588+12
 	mov	r6, r0
 	ldr	r1, [sp, #12]
 	mov	r0, r5
@@ -10787,13 +11033,13 @@ FlashReadSlc2KPages:
 	add	r1, r1, r3
 	bl	FlashReadCmd
 	ldr	r3, [r4, #8]
-	cbz	r3, .L1516
+	cbz	r3, .L1563
 	add	r3, r3, #2048
-.L1516:
+.L1563:
 	ldr	r2, [r4, #12]
-	cbz	r2, .L1517
+	cbz	r2, .L1564
 	adds	r2, r2, #8
-.L1517:
+.L1564:
 	str	r2, [sp]
 	movs	r1, #0
 	mov	r2, r10
@@ -10802,60 +11048,60 @@ FlashReadSlc2KPages:
 	mov	r1, r0
 	mov	r0, r5
 	bl	NandcFlashDeCs
-	ldr	r3, .L1541+16
+	ldr	r3, .L1588+16
 	cmp	r6, r1
 	it	cc
 	movcc	r6, r1
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	add	r3, r2, r2, lsl #1
 	cmp	r6, r3, asr #2
-	bls	.L1518
+	bls	.L1565
 	adds	r5, r6, #1
 	it	ne
 	movne	r6, #256
 	str	r6, [r4]
-.L1521:
+.L1568:
 	ldr	r3, [r4, #12]
-	cbz	r3, .L1522
+	cbz	r3, .L1569
 	ldr	r1, [r3, #12]
 	adds	r1, r1, #1
-	bne	.L1522
+	bne	.L1569
 	ldr	r1, [r3, #8]
 	adds	r0, r1, #1
-	bne	.L1522
+	bne	.L1569
 	ldr	r3, [r3]
 	adds	r3, r3, #1
 	it	ne
 	strne	r1, [r4]
-.L1522:
+.L1569:
 	ldr	r3, [r4]
 	adds	r1, r3, #1
-	bne	.L1515
+	bne	.L1562
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1541+20
+	ldr	r0, .L1588+20
 	bl	printf
 	ldr	r1, [r4, #8]
-	cbz	r1, .L1524
+	cbz	r1, .L1571
 	movs	r3, #8
 	movs	r2, #4
-	ldr	r0, .L1541+24
+	ldr	r0, .L1588+24
 	bl	rknand_print_hex
-.L1524:
+.L1571:
 	ldr	r1, [r4, #12]
 	cmp	r1, #0
-	beq	.L1515
+	beq	.L1562
 	movs	r3, #4
-	ldr	r0, .L1541+28
+	ldr	r0, .L1588+28
 	mov	r2, r3
 	bl	rknand_print_hex
-	b	.L1515
-.L1518:
+	b	.L1562
+.L1565:
 	movs	r3, #0
 	str	r3, [r4]
-	b	.L1521
-.L1542:
+	b	.L1568
+.L1589:
 	.align	2
-.L1541:
+.L1588:
 	.word	.LANCHOR31
 	.word	.LANCHOR25
 	.word	.LANCHOR26
@@ -10876,36 +11122,36 @@ FlashReadSlc2KPages:
 FlashReadPages:
 	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1634
+	ldr	r3, .L1681
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #40
 	mov	r10, r0
 	str	r1, [sp, #24]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r2, [sp, #12]
-	cbnz	r3, .L1544
-	ldr	r2, .L1634+4
+	cbnz	r3, .L1591
+	ldr	r2, .L1681+4
 	mov	r8, r3
 	str	r3, [sp, #8]
 	ldrb	r2, [r2, #9]	@ zero_extendqisi2
 	str	r2, [sp, #20]
-	ldr	r2, .L1634+8
+	ldr	r2, .L1681+8
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	str	r2, [sp, #28]
-.L1545:
+.L1592:
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #24]
 	cmp	r3, r2
-	bcc	.L1583
+	bcc	.L1630
 	movs	r0, #0
-	b	.L1543
-.L1544:
+	b	.L1590
+.L1591:
 	bl	FlashReadSlc2KPages
-.L1543:
+.L1590:
 	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1583:
+.L1630:
 	ldr	r2, [sp, #8]
 	movs	r3, #36
 	ldr	r1, [sp, #12]
@@ -10921,85 +11167,86 @@ FlashReadPages:
 	str	r3, [sp]
 	add	r3, sp, #32
 	bl	LogAddr2PhyAddr
-	ldr	r2, .L1634+12
+	ldr	r2, .L1681+12
 	mov	r5, r0
 	ldr	r3, [sp, #32]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, r3
-	bhi	.L1547
+	bhi	.L1594
 	mov	r3, #-1
 	str	r3, [r10, fp]
-.L1548:
+.L1595:
 	ldr	r3, [sp, #8]
 	adds	r3, r3, #1
 	str	r3, [sp, #8]
-	b	.L1545
-.L1547:
-	ldr	r2, .L1634+16
+	b	.L1592
+.L1594:
+	ldr	r2, .L1681+16
 	ldrb	r4, [r2, r3]	@ zero_extendqisi2
-	ldr	r3, .L1634+20
+	ldr	r3, .L1681+20
 	mov	r0, r4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
 	it	eq
 	moveq	r5, #0
 	bl	NandcWaitFlashReady
-	ldr	r3, .L1634+24
+	ldr	r3, .L1681+24
 	ldr	r3, [r3]
-	ldrb	r1, [r3, #19]	@ zero_extendqisi2
-	subs	r3, r1, #1
-	cmp	r3, #6
-	bhi	.L1550
-	ldr	r3, .L1634+28
-	cmp	r1, #7
-	add	r2, r3, r4
-	ldrb	r3, [r2, #12]	@ zero_extendqisi2
-	it	eq
-	ldrbeq	r3, [r2, #20]	@ zero_extendqisi2
-	ldr	r2, .L1634+32
+	ldrb	r2, [r3, #19]	@ zero_extendqisi2
+	subs	r3, r2, #1
+	cmp	r3, #7
+	bhi	.L1597
+	ldr	r3, .L1681+28
+	subs	r2, r2, #7
+	cmp	r2, #1
+	ldr	r2, .L1681+32
+	add	r1, r3, r4
+	ldrb	r3, [r1, #12]	@ zero_extendqisi2
 	ldrb	r2, [r2, r4]	@ zero_extendqisi2
+	it	ls
+	ldrbls	r3, [r1, #20]	@ zero_extendqisi2
 	cmp	r2, r3
-	beq	.L1550
-	ldr	r2, .L1634+36
+	beq	.L1597
+	ldr	r2, .L1681+36
 	mov	r0, r4
 	ldrb	r1, [r2, #-3]	@ zero_extendqisi2
 	bl	HynixSetRRPara
-.L1550:
+.L1597:
 	mov	r0, r4
 	bl	NandcFlashCs
 	ldr	r3, [sp, #12]
 	cmp	r3, #1
-	beq	.L1552
+	beq	.L1599
 	ldr	r3, [sp, #16]
 	cmp	r3, #0
-	bge	.L1553
-.L1552:
-	ldr	r3, .L1634+40
+	bge	.L1600
+.L1599:
+	ldr	r3, .L1681+40
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1553
+	cbz	r3, .L1600
 	mov	r0, r4
 	bl	flash_enter_slc_mode
-.L1560:
+.L1607:
 	ldr	r1, [sp, #36]
 	adds	r6, r1, #1
-	bne	.L1555
+	bne	.L1602
 	cmp	r4, #255
-	beq	.L1585
-.L1555:
-	cbz	r5, .L1557
-	ldr	r3, .L1634+44
+	beq	.L1632
+.L1602:
+	cbz	r5, .L1604
+	ldr	r3, .L1681+44
 	mov	r0, r4
 	ldr	r2, [r3]
 	add	r2, r2, r1
 	bl	FlashReadDpCmd
-.L1558:
+.L1605:
 	mov	r0, r4
 	bl	NandcWaitFlashReady
-	cbz	r5, .L1556
+	cbz	r5, .L1603
 	ldr	r1, [sp, #36]
 	mov	r0, r4
 	bl	FlashReadDpDataOutCmd
-.L1556:
+.L1603:
 	ldr	r3, [r7, #12]
 	movs	r1, #0
 	ldr	r2, [sp, #20]
@@ -11007,30 +11254,30 @@ FlashReadPages:
 	str	r3, [sp]
 	ldr	r3, [r7, #8]
 	bl	NandcXferData
-	ldr	r3, .L1634+8
+	ldr	r3, .L1681+8
 	mov	r6, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1559
+	cbz	r3, .L1606
 	adds	r0, r0, #1
-	bne	.L1559
-	ldr	r3, .L1634+8
+	bne	.L1606
+	ldr	r3, .L1681+8
 	movs	r5, #0
 	strb	r5, [r3]
-	b	.L1560
-.L1553:
+	b	.L1607
+.L1600:
 	mov	r0, r4
 	bl	flash_exit_slc_mode
-	b	.L1560
-.L1557:
+	b	.L1607
+.L1604:
 	mov	r0, r4
 	bl	FlashReadCmd
-	b	.L1558
-.L1585:
+	b	.L1605
+.L1632:
 	movs	r5, #0
-	b	.L1556
-.L1559:
-	cbz	r5, .L1561
-	ldr	r3, .L1634+44
+	b	.L1603
+.L1606:
+	cbz	r5, .L1608
+	ldr	r3, .L1681+44
 	mov	r0, r4
 	ldr	r1, [sp, #36]
 	ldr	r3, [r3]
@@ -11049,30 +11296,30 @@ FlashReadPages:
 	mov	r8, r0
 	it	eq
 	moveq	r5, #0
-.L1561:
+.L1608:
 	mov	r0, r4
 	bl	NandcFlashDeCs
-	ldr	r3, .L1634+8
+	ldr	r3, .L1681+8
 	adds	r1, r6, #1
 	ldrb	r2, [sp, #28]	@ zero_extendqisi2
 	strb	r2, [r3]
-	bne	.L1562
-	ldr	r3, .L1634+48
+	bne	.L1609
+	ldr	r3, .L1681+48
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L1563
-.L1567:
-	ldr	r3, .L1634+52
+	cbnz	r3, .L1610
+.L1614:
+	ldr	r3, .L1681+52
 	ldr	r5, [r3]
 	cmp	r5, #0
-	bne	.L1564
+	bne	.L1611
 	ldr	r3, [r7, #12]
 	mov	r0, r4
 	ldr	r2, [r7, #8]
 	ldr	r1, [sp, #36]
 	bl	FlashReadRawPage
-	b	.L1633
-.L1563:
-	ldr	r3, .L1634+56
+	b	.L1680
+.L1610:
+	ldr	r3, .L1681+56
 	mov	r0, r4
 	ldr	r1, [sp, #36]
 	ldr	r3, [r3]
@@ -11084,33 +11331,33 @@ FlashReadPages:
 	bl	FlashDdrTunningRead
 	adds	r2, r0, #1
 	mov	r6, r0
-	beq	.L1566
-	ldr	r3, .L1634+60
+	beq	.L1613
+	ldr	r3, .L1681+60
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r0, r3, lsr #1
-	bls	.L1586
-.L1566:
+	bls	.L1633
+.L1613:
 	ubfx	r0, r5, #8, #8
 	bl	NandcSetDdrPara
 	adds	r3, r6, #1
-	beq	.L1567
-.L1586:
+	beq	.L1614
+.L1633:
 	movs	r5, #0
-.L1562:
-	ldr	r3, .L1634+60
+.L1609:
+	ldr	r3, .L1681+60
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r6, r3, asr #2
-	bls	.L1575
-	ldr	r3, .L1634+52
+	bls	.L1622
+	ldr	r3, .L1681+52
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L1575
+	bne	.L1622
 	mov	r6, #256
-	b	.L1570
-.L1635:
+	b	.L1617
+.L1682:
 	.align	2
-.L1634:
+.L1681:
 	.word	.LANCHOR1
 	.word	.LANCHOR31
 	.word	.LANCHOR5
@@ -11121,13 +11368,13 @@ FlashReadPages:
 	.word	.LANCHOR20
 	.word	.LANCHOR21
 	.word	.LANCHOR20+4
-	.word	.LANCHOR8
+	.word	.LANCHOR15
 	.word	.LANCHOR3
 	.word	.LANCHOR30
 	.word	.LANCHOR145
 	.word	.LANCHOR19
 	.word	.LANCHOR33
-.L1564:
+.L1611:
 	ldr	r3, [r7, #12]
 	mov	r0, r4
 	ldr	r2, [r7, #8]
@@ -11135,133 +11382,133 @@ FlashReadPages:
 	blx	r5
 	adds	r5, r0, #1
 	mov	r6, r0
-	bne	.L1568
-	ldr	r3, .L1636
+	bne	.L1615
+	ldr	r3, .L1683
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r3, #1
-	cmp	r3, #6
-	bhi	.L1569
-	ldr	r2, .L1636+4
+	cmp	r3, #7
+	bhi	.L1616
+	ldr	r2, .L1683+4
 	movs	r3, #0
 	mov	r0, r4
 	ldrb	r1, [r2, #-3]	@ zero_extendqisi2
 	bl	HynixSetRRPara
-.L1569:
+.L1616:
 	ldr	r3, [r7, #12]
 	mov	r0, r4
 	ldr	r2, [r7, #8]
 	ldr	r1, [sp, #36]
 	bl	FlashReadRawPage
-	ldr	r2, .L1636+8
+	ldr	r2, .L1683+8
 	mov	r6, r0
 	mov	r3, r0
 	ldr	r1, [r7, #4]
-	ldr	r0, .L1636+12
+	ldr	r0, .L1683+12
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	bl	printf
 	adds	r0, r6, #1
-	bne	.L1568
-	ldr	r3, .L1636+16
+	bne	.L1615
+	ldr	r3, .L1683+16
 	ldrb	r5, [r3]	@ zero_extendqisi2
-	cbz	r5, .L1570
+	cbz	r5, .L1617
 	ldr	r3, [sp, #12]
 	mov	r0, r4
 	cmp	r3, #1
-	beq	.L1571
+	beq	.L1618
 	ldr	r3, [sp, #16]
 	cmp	r3, #0
-	bge	.L1572
-.L1571:
+	bge	.L1619
+.L1618:
 	bl	flash_enter_slc_mode
-.L1573:
-	ldr	r3, .L1636+20
+.L1620:
+	ldr	r3, .L1683+20
 	mov	r0, r4
 	ldr	r2, [r7, #8]
 	ldr	r1, [sp, #36]
 	ldr	r5, [r3]
 	ldr	r3, [r7, #12]
 	blx	r5
-.L1633:
+.L1680:
 	adds	r1, r0, #1
 	mov	r6, r0
 	mov	r5, #0
-	bne	.L1575
-.L1570:
+	bne	.L1622
+.L1617:
 	str	r6, [r10, fp]
-.L1576:
+.L1623:
 	ldr	r3, [r10, fp]
 	adds	r2, r3, #1
-	bne	.L1578
-	ldr	r2, .L1636+8
+	bne	.L1625
+	ldr	r2, .L1683+8
 	ldr	r1, [r7, #4]
-	ldr	r0, .L1636+24
+	ldr	r0, .L1683+24
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	bl	printf
 	ldr	r1, [r7, #12]
-	cbz	r1, .L1578
+	cbz	r1, .L1625
 	movs	r3, #4
-	ldr	r0, .L1636+28
+	ldr	r0, .L1683+28
 	mov	r2, r3
 	bl	rknand_print_hex
-.L1578:
-	cbz	r5, .L1580
-	ldr	r3, .L1636+8
+.L1625:
+	cbz	r5, .L1627
+	ldr	r3, .L1683+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r8, r3, asr #2
-	bls	.L1581
-	ldr	r3, .L1636+20
+	bls	.L1628
+	ldr	r3, .L1683+20
 	ldr	r3, [r3]
 	cmp	r3, #0
 	it	eq
 	moveq	r8, #256
-.L1581:
+.L1628:
 	cmp	r8, #-1
 	add	r3, fp, #36
 	str	r8, [r10, r3]
-	beq	.L1580
+	beq	.L1627
 	cmp	r8, #256
 	itt	ne
 	movne	r2, #0
 	strne	r2, [r10, r3]
-.L1580:
+.L1627:
 	ldr	r3, [sp, #8]
 	add	r3, r3, r5
 	str	r3, [sp, #8]
 	ldr	r3, [sp, #12]
 	cmp	r3, #1
-	beq	.L1582
+	beq	.L1629
 	ldr	r3, [sp, #16]
 	cmp	r3, #0
-	bge	.L1548
-.L1582:
-	ldr	r3, .L1636+16
+	bge	.L1595
+.L1629:
+	ldr	r3, .L1683+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1548
+	beq	.L1595
 	mov	r0, r4
 	bl	flash_exit_slc_mode
-	b	.L1548
-.L1572:
+	b	.L1595
+.L1619:
 	bl	flash_exit_slc_mode
-	b	.L1573
-.L1568:
+	b	.L1620
+.L1615:
 	movs	r5, #0
-.L1575:
+.L1622:
 	cmp	r6, #256
-	beq	.L1570
+	beq	.L1617
 	movs	r3, #0
 	str	r3, [r10, fp]
-	b	.L1576
-.L1637:
+	b	.L1623
+.L1684:
 	.align	2
-.L1636:
+.L1683:
 	.word	.LANCHOR18
 	.word	.LANCHOR20+4
 	.word	.LANCHOR33
 	.word	.LC28
-	.word	.LANCHOR8
+	.word	.LANCHOR15
 	.word	.LANCHOR145
 	.word	.LC25
 	.word	.LC27
@@ -11283,23 +11530,23 @@ FlashProgSlc2KPages:
 	mov	r8, r1
 	mov	r4, r0
 	mov	r6, r0
-	ldr	r3, .L1667
+	ldr	r3, .L1714
 	movs	r7, #0
-	ldr	fp, .L1667+28
+	ldr	fp, .L1714+28
 	str	r2, [sp, #8]
 	ldrb	r10, [r3, #9]	@ zero_extendqisi2
-.L1639:
+.L1686:
 	cmp	r7, r8
-	bne	.L1645
+	bne	.L1692
 	ldr	r3, [sp, #12]
 	cmp	r3, #0
-	bne	.L1656
-.L1666:
+	bne	.L1703
+.L1713:
 	movs	r0, #0
 	add	sp, sp, #64
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1645:
+.L1692:
 	sub	r3, r8, r7
 	add	r2, sp, #20
 	uxtb	r3, r3
@@ -11308,19 +11555,19 @@ FlashProgSlc2KPages:
 	str	r3, [sp]
 	add	r3, sp, #24
 	bl	LogAddr2PhyAddr
-	ldr	r2, .L1667+4
+	ldr	r2, .L1714+4
 	ldr	r3, [sp, #24]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, r3
-	bhi	.L1640
+	bhi	.L1687
 	mov	r3, #-1
 	str	r3, [r6]
-.L1641:
+.L1688:
 	adds	r7, r7, #1
 	adds	r6, r6, #36
-	b	.L1639
-.L1640:
-	ldr	r2, .L1667+8
+	b	.L1686
+.L1687:
+	ldr	r2, .L1714+8
 	ldrb	r5, [r2, r3]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	NandcWaitFlashReady
@@ -11352,13 +11599,13 @@ FlashProgSlc2KPages:
 	add	r1, r1, r3
 	bl	FlashProgFirstCmd
 	ldr	r3, [r6, #8]
-	cbz	r3, .L1642
+	cbz	r3, .L1689
 	add	r3, r3, #2048
-.L1642:
+.L1689:
 	ldr	r2, [r6, #12]
-	cbz	r2, .L1643
+	cbz	r2, .L1690
 	adds	r2, r2, #8
-.L1643:
+.L1690:
 	str	r2, [sp]
 	movs	r1, #1
 	mov	r2, r10
@@ -11380,24 +11627,24 @@ FlashProgSlc2KPages:
 	movmi	r3, #-1
 	strmi	r3, [r6]
 	bl	NandcFlashDeCs
-	b	.L1641
-.L1652:
+	b	.L1688
+.L1699:
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	bne	.L1647
+	bne	.L1694
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1667+12
+	ldr	r0, .L1714+12
 	bl	printf
-.L1648:
+.L1695:
 	add	r8, r8, #1
 	adds	r4, r4, #36
-.L1646:
+.L1693:
 	cmp	r7, r8
-	bne	.L1652
-	b	.L1666
-.L1647:
+	bne	.L1699
+	b	.L1713
+.L1694:
 	sub	r3, r7, r8
-	ldr	fp, .L1667+32
+	ldr	fp, .L1714+32
 	uxtb	r3, r3
 	add	r2, sp, #20
 	ldr	r1, [sp, #8]
@@ -11426,46 +11673,46 @@ FlashProgSlc2KPages:
 	bl	FlashReadPages
 	ldr	r5, [sp, #28]
 	adds	r3, r5, #1
-	bne	.L1649
+	bne	.L1696
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1667+16
+	ldr	r0, .L1714+16
 	bl	printf
 	str	r5, [r4]
-.L1649:
+.L1696:
 	ldr	r3, [r4, #12]
-	cbz	r3, .L1650
+	cbz	r3, .L1697
 	ldr	r2, [r3]
 	ldr	r3, [fp]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L1650
+	beq	.L1697
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1667+20
+	ldr	r0, .L1714+20
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4]
-.L1650:
+.L1697:
 	ldr	r3, [r4, #8]
 	cmp	r3, #0
-	beq	.L1648
+	beq	.L1695
 	ldr	r2, [r3]
 	ldr	r3, [r10]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L1648
+	beq	.L1695
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1667+24
+	ldr	r0, .L1714+24
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4]
-	b	.L1648
-.L1656:
+	b	.L1695
+.L1703:
 	mov	r8, #0
-	ldr	r10, .L1667+36
-	b	.L1646
-.L1668:
+	ldr	r10, .L1714+36
+	b	.L1693
+.L1715:
 	.align	2
-.L1667:
+.L1714:
 	.word	.LANCHOR31
 	.word	.LANCHOR25
 	.word	.LANCHOR26
@@ -11490,7 +11737,7 @@ FlashProgPages:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #72
-	ldr	r5, .L1721
+	ldr	r5, .L1768
 	mov	r4, r0
 	mov	r8, r2
 	str	r1, [sp, #8]
@@ -11498,36 +11745,36 @@ FlashProgPages:
 	str	r3, [sp, #20]
 	ldrb	r5, [r5, #19]	@ zero_extendqisi2
 	str	r5, [sp, #16]
-	ldr	r5, .L1721+4
+	ldr	r5, .L1768+4
 	ldrb	r7, [r5]	@ zero_extendqisi2
-	cbnz	r7, .L1670
-	ldr	r3, .L1721+8
+	cbnz	r7, .L1717
+	ldr	r3, .L1768+8
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
 	str	r3, [sp, #12]
-.L1671:
+.L1718:
 	ldr	r3, [sp, #8]
 	cmp	r7, r3
-	bcc	.L1684
-	ldr	r6, .L1721+12
+	bcc	.L1731
+	ldr	r6, .L1768+12
 	movs	r5, #0
-	ldr	r7, .L1721+16
-.L1685:
+	ldr	r7, .L1768+16
+.L1732:
 	ldrb	r3, [r6]	@ zero_extendqisi2
 	cmp	r5, r3
-	bcc	.L1687
+	bcc	.L1734
 	ldr	r3, [sp, #20]
 	cmp	r3, #0
-	bne	.L1688
-.L1696:
+	bne	.L1735
+.L1743:
 	movs	r0, #0
-	b	.L1669
-.L1670:
+	b	.L1716
+.L1717:
 	bl	FlashProgSlc2KPages
-.L1669:
+.L1716:
 	add	sp, sp, #72
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1684:
+.L1731:
 	ldr	r3, [sp, #8]
 	movs	r6, #36
 	muls	r6, r7, r6
@@ -11540,81 +11787,81 @@ FlashProgPages:
 	mov	r0, fp
 	add	r3, sp, #32
 	bl	LogAddr2PhyAddr
-	ldr	r3, .L1721+12
+	ldr	r3, .L1768+12
 	mov	r10, r0
 	ldr	r0, [sp, #32]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r0
-	bhi	.L1673
+	bhi	.L1720
 	mov	r3, #-1
 	str	r3, [r4, r6]
-.L1674:
+.L1721:
 	adds	r7, r7, #1
-	b	.L1671
-.L1673:
-	ldr	r3, .L1721+20
+	b	.L1718
+.L1720:
+	ldr	r3, .L1768+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	ldr	r3, .L1721+24
+	ldr	r3, .L1768+24
 	it	eq
 	moveq	r10, #0
 	add	r3, r3, r0, lsl #4
 	ldr	r3, [r3, #8]
-	cbz	r3, .L1676
+	cbz	r3, .L1723
 	uxtb	r0, r0
 	bl	FlashWaitCmdDone
-.L1676:
+.L1723:
 	ldr	r3, [sp, #32]
 	movs	r1, #0
-	ldr	r2, .L1721+24
+	ldr	r2, .L1768+24
 	add	r2, r2, r3, lsl #4
 	str	r1, [r2, #12]
 	ldr	r1, [sp, #28]
 	str	fp, [r2, #8]
 	str	r1, [r2, #4]
 	cmp	r10, #0
-	beq	.L1677
+	beq	.L1724
 	add	r1, r6, #36
 	add	r1, r1, r4
 	str	r1, [r2, #12]
-.L1677:
-	ldr	r2, .L1721+28
+.L1724:
+	ldr	r2, .L1768+28
 	ldrb	r5, [r2, r3]	@ zero_extendqisi2
 	lsls	r3, r3, #4
-	ldr	r2, .L1721+24
+	ldr	r2, .L1768+24
 	mov	r0, r5
 	strb	r5, [r2, r3]
-	ldr	r3, .L1721+12
+	ldr	r3, .L1768+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1678
+	bne	.L1725
 	bl	NandcWaitFlashReady
-.L1679:
+.L1726:
 	ldr	r3, [sp, #16]
 	subs	r3, r3, #1
-	cmp	r3, #6
-	bhi	.L1680
-	ldr	r3, .L1721+32
+	cmp	r3, #7
+	bhi	.L1727
+	ldr	r3, .L1768+32
 	ldrb	r3, [r3, r5]	@ zero_extendqisi2
-	cbz	r3, .L1680
-	ldr	r1, .L1721+36
+	cbz	r3, .L1727
+	ldr	r1, .L1768+36
 	movs	r3, #0
 	mov	r0, r5
 	adds	r2, r1, #4
 	ldrb	r1, [r1, #1]	@ zero_extendqisi2
 	bl	HynixSetRRPara
-.L1680:
+.L1727:
 	mov	r0, r5
 	bl	NandcFlashCs
 	cmp	r8, #1
 	mov	r0, r5
-	bne	.L1681
-	ldr	r3, .L1721+16
+	bne	.L1728
+	ldr	r3, .L1768+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1681
+	beq	.L1728
 	bl	flash_enter_slc_mode
-.L1682:
+.L1729:
 	ldr	r1, [sp, #28]
 	mov	r0, r5
 	bl	FlashProgFirstCmd
@@ -11626,11 +11873,11 @@ FlashProgPages:
 	ldr	r3, [fp, #8]
 	bl	NandcXferData
 	cmp	r10, #0
-	beq	.L1683
+	beq	.L1730
 	ldr	r1, [sp, #28]
 	mov	r0, r5
 	bl	FlashProgDpFirstCmd
-	ldr	r3, .L1721+40
+	ldr	r3, .L1768+40
 	mov	r0, r5
 	ldr	r2, [sp, #32]
 	adds	r6, r6, #36
@@ -11641,7 +11888,7 @@ FlashProgPages:
 	it	ne
 	movne	r2, #1
 	bl	FlashWaitReadyEN
-	ldr	r3, .L1721+44
+	ldr	r3, .L1768+44
 	mov	r0, r5
 	ldr	r1, [sp, #28]
 	ldr	r3, [r3]
@@ -11654,19 +11901,19 @@ FlashProgPages:
 	str	r3, [sp]
 	ldr	r3, [r6, #8]
 	bl	NandcXferData
-.L1683:
+.L1730:
 	ldr	r1, [sp, #28]
 	mov	r0, r5
 	bl	FlashProgSecondCmd
 	mov	r0, r5
 	add	r7, r7, r10
 	bl	NandcFlashDeCs
-	b	.L1674
-.L1678:
+	b	.L1721
+.L1725:
 	bl	NandcFlashCs
 	ldr	r2, [sp, #32]
 	mov	r0, r5
-	ldr	r3, .L1721+40
+	ldr	r3, .L1768+40
 	ldr	r1, [sp, #28]
 	ldr	r2, [r3, r2, lsl #2]
 	adds	r2, r2, #0
@@ -11675,45 +11922,45 @@ FlashProgPages:
 	bl	FlashWaitReadyEN
 	mov	r0, r5
 	bl	NandcFlashDeCs
-	b	.L1679
-.L1681:
+	b	.L1726
+.L1728:
 	bl	flash_exit_slc_mode
-	b	.L1682
-.L1687:
+	b	.L1729
+.L1734:
 	uxtb	r0, r5
 	bl	FlashWaitCmdDone
 	cmp	r8, #1
-	bne	.L1686
+	bne	.L1733
 	ldrb	r3, [r7]	@ zero_extendqisi2
-	cbz	r3, .L1686
-	ldr	r2, .L1721+24
+	cbz	r3, .L1733
+	ldr	r2, .L1768+24
 	lsls	r3, r5, #4
 	ldrb	r0, [r2, r3]	@ zero_extendqisi2
 	bl	flash_exit_slc_mode
-.L1686:
+.L1733:
 	adds	r5, r5, #1
-	b	.L1685
-.L1688:
-	ldr	r10, .L1721+64
+	b	.L1732
+.L1735:
+	ldr	r10, .L1768+64
 	movs	r7, #0
-.L1689:
+.L1736:
 	ldr	r3, [sp, #8]
 	cmp	r7, r3
-	beq	.L1696
+	beq	.L1743
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	bne	.L1690
+	bne	.L1737
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1721+48
+	ldr	r0, .L1768+48
 	bl	printf
-.L1691:
+.L1738:
 	adds	r7, r7, #1
 	adds	r4, r4, #36
-	b	.L1689
-.L1690:
+	b	.L1736
+.L1737:
 	ldr	r3, [sp, #8]
 	add	r2, sp, #28
-	ldr	fp, .L1721+68
+	ldr	fp, .L1768+68
 	mov	r1, r8
 	mov	r0, r4
 	mov	r6, r4
@@ -11742,47 +11989,47 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	r5, [sp, #36]
 	adds	r3, r5, #1
-	bne	.L1692
+	bne	.L1739
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1721+52
+	ldr	r0, .L1768+52
 	bl	printf
 	str	r5, [r4]
-.L1692:
+.L1739:
 	ldr	r3, [r4, #12]
-	cbz	r3, .L1693
+	cbz	r3, .L1740
 	ldr	r2, [r3]
 	ldr	r3, [fp]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L1693
+	beq	.L1740
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1721+56
+	ldr	r0, .L1768+56
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4]
-.L1693:
+.L1740:
 	ldr	r3, [r4, #8]
 	cmp	r3, #0
-	beq	.L1691
+	beq	.L1738
 	ldr	r2, [r3]
 	ldr	r3, [r10]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L1691
+	beq	.L1738
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1721+60
+	ldr	r0, .L1768+60
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4]
-	b	.L1691
-.L1722:
+	b	.L1738
+.L1769:
 	.align	2
-.L1721:
+.L1768:
 	.word	.LANCHOR18
 	.word	.LANCHOR1
 	.word	.LANCHOR31
 	.word	.LANCHOR25
-	.word	.LANCHOR8
+	.word	.LANCHOR15
 	.word	.LANCHOR27
 	.word	.LANCHOR23
 	.word	.LANCHOR26
@@ -11808,14 +12055,14 @@ FlashProgPages:
 FlashTestBlk:
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1726
+	ldr	r3, .L1773
 	push	{r4, r5, lr}
 	mov	r4, r0
 	sub	sp, sp, #108
 	ldr	r3, [r3]
 	cmp	r0, r3
-	bcc	.L1725
-	ldr	r5, .L1726+4
+	bcc	.L1772
+	ldr	r5, .L1773+4
 	add	r0, sp, #40
 	movs	r2, #32
 	movs	r1, #165
@@ -11847,17 +12094,17 @@ FlashTestBlk:
 	movne	r4, #1
 	negs	r4, r4
 	bl	FlashEraseBlocks
-.L1723:
+.L1770:
 	mov	r0, r4
 	add	sp, sp, #108
 	@ sp needed
 	pop	{r4, r5, pc}
-.L1725:
+.L1772:
 	movs	r4, #0
-	b	.L1723
-.L1727:
+	b	.L1770
+.L1774:
 	.align	2
-.L1726:
+.L1773:
 	.word	.LANCHOR149
 	.word	.LANCHOR153
 	.size	FlashTestBlk, .-FlashTestBlk
@@ -11872,48 +12119,48 @@ FlashTestBlk:
 FtlLowFormatEraseBlock:
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1773
+	ldr	r3, .L1820
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #40
 	str	r0, [sp, #8]
 	ldr	r3, [r3]
 	str	r1, [sp, #4]
 	cmp	r3, #0
-	bne	.L1755
-	ldr	r2, .L1773+4
+	bne	.L1802
+	ldr	r2, .L1820+4
 	mov	r10, r3
 	mov	r5, r3
 	mov	r4, r3
 	mov	r8, #36
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	str	r2, [sp, #20]
-	ldr	r2, .L1773+8
+	ldr	r2, .L1820+8
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	str	r2, [sp, #12]
-	ldr	r2, .L1773+12
+	ldr	r2, .L1820+12
 	str	r0, [r2]
-	ldr	r2, .L1773+16
+	ldr	r2, .L1820+16
 	ldrh	fp, [r2]
-	ldr	r2, .L1773+20
+	ldr	r2, .L1820+20
 	ldr	r7, [r2]
-	ldr	r2, .L1773+24
+	ldr	r2, .L1820+24
 	ldr	r2, [r2]
 	str	r2, [sp, #16]
-	ldr	r2, .L1773+28
+	ldr	r2, .L1820+28
 	ldrh	r2, [r2]
 	str	r2, [sp, #24]
-.L1730:
+.L1777:
 	uxth	r2, r10
 	cmp	fp, r2
-	bhi	.L1734
+	bhi	.L1781
 	cmp	r5, #0
-	beq	.L1728
+	beq	.L1775
 	ldr	r3, [sp, #12]
 	mov	r0, r7
-	ldr	r10, .L1773+4
+	ldr	r10, .L1820+4
 	mov	r8, #0
 	mov	r2, r5
-	ldr	r7, .L1773+20
+	ldr	r7, .L1820+20
 	adds	r6, r3, #0
 	it	ne
 	movne	r6, #1
@@ -11923,44 +12170,44 @@ FtlLowFormatEraseBlock:
 	ldrb	r3, [sp, #20]	@ zero_extendqisi2
 	strb	r3, [r10]
 	mov	r10, #36
-.L1736:
+.L1783:
 	uxth	r3, r8
 	cmp	r5, r3
-	bhi	.L1738
+	bhi	.L1785
 	ldr	r3, [sp, #4]
 	cmp	r3, #0
-	bne	.L1739
+	bne	.L1786
 	uxth	r6, r6
 	movs	r3, #6
 	str	r3, [sp, #16]
 	movs	r3, #1
 	str	r3, [sp, #12]
-.L1740:
+.L1787:
 	mov	r8, #0
-.L1749:
-	ldr	r3, .L1773+16
+.L1796:
+	ldr	r3, .L1820+16
 	mov	fp, #0
 	mov	r5, fp
 	ldrh	r3, [r3]
 	str	r3, [sp, #24]
-	ldr	r3, .L1773+20
+	ldr	r3, .L1820+20
 	ldr	r10, [r3]
-	ldr	r3, .L1773+32
+	ldr	r3, .L1820+32
 	ldr	r3, [r3]
 	str	r3, [sp, #28]
-	ldr	r3, .L1773+36
+	ldr	r3, .L1820+36
 	ldr	r3, [r3]
 	str	r3, [sp, #32]
-	ldr	r3, .L1773+28
+	ldr	r3, .L1820+28
 	ldrh	r3, [r3]
 	str	r3, [sp, #36]
-.L1741:
+.L1788:
 	ldr	r3, [sp, #24]
 	uxth	r2, fp
 	cmp	r3, r2
-	bhi	.L1744
-	cbz	r5, .L1728
-	ldr	fp, .L1773+4
+	bhi	.L1791
+	cbz	r5, .L1775
+	ldr	fp, .L1820+4
 	movs	r3, #1
 	mov	r0, r10
 	movs	r7, #0
@@ -11969,59 +12216,59 @@ FtlLowFormatEraseBlock:
 	strb	r7, [fp]
 	bl	FlashProgPages
 	ldrb	r3, [sp, #20]	@ zero_extendqisi2
-	ldr	r10, .L1773+20
+	ldr	r10, .L1820+20
 	strb	r3, [fp]
 	mov	fp, #36
-.L1746:
+.L1793:
 	uxth	r3, r7
 	cmp	r5, r3
-	bhi	.L1748
+	bhi	.L1795
 	ldr	r3, [sp, #16]
 	add	r8, r8, r3
 	ldr	r3, [sp, #12]
 	uxth	r8, r8
 	cmp	r3, r8
-	bhi	.L1749
-	ldr	r8, .L1773+20
+	bhi	.L1796
+	ldr	r8, .L1820+20
 	movs	r7, #0
 	mov	r10, #36
-.L1750:
+.L1797:
 	uxth	r3, r7
 	cmp	r5, r3
-	bhi	.L1752
+	bhi	.L1799
 	ldr	r3, [sp, #8]
 	cmp	r3, #63
-	bls	.L1753
+	bls	.L1800
 	ldr	r3, [sp, #4]
-	cbz	r3, .L1728
-.L1753:
-	ldr	r3, .L1773+20
+	cbz	r3, .L1775
+.L1800:
+	ldr	r3, .L1820+20
 	mov	r2, r5
 	mov	r1, r6
 	ldr	r0, [r3]
 	bl	FlashEraseBlocks
-.L1728:
+.L1775:
 	mov	r0, r4
 	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1734:
+.L1781:
 	mul	r2, r8, r10
 	movs	r3, #0
 	ldr	r1, [sp, #8]
 	str	r3, [r7, r2]
-	ldr	r3, .L1773+40
+	ldr	r3, .L1820+40
 	ldrb	r0, [r3, r10]	@ zero_extendqisi2
 	bl	V2P_block
 	ldr	r3, [sp, #4]
 	mov	r6, r0
-	cbz	r3, .L1731
+	cbz	r3, .L1778
 	bl	IsBlkInVendorPart
-	cbnz	r0, .L1732
-.L1731:
+	cbnz	r0, .L1779
+.L1778:
 	mov	r0, r6
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L1733
+	cbnz	r0, .L1780
 	ldr	r3, [sp, #24]
 	mla	r1, r8, r5, r7
 	lsls	r6, r6, #10
@@ -12034,62 +12281,62 @@ FtlLowFormatEraseBlock:
 	bic	r2, r2, #3
 	add	r2, r2, r3
 	str	r2, [r1, #12]
-.L1732:
+.L1779:
 	add	r10, r10, #1
-	b	.L1730
-.L1733:
+	b	.L1777
+.L1780:
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L1732
-.L1738:
+	b	.L1779
+.L1785:
 	mul	r3, r10, r8
 	ldr	r2, [r7]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
 	adds	r3, r3, #1
-	bne	.L1737
+	bne	.L1784
 	ldr	r0, [r1, #4]
 	adds	r4, r4, #1
 	uxth	r4, r4
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.L1737:
+.L1784:
 	add	r8, r8, #1
-	b	.L1736
-.L1739:
-	ldr	r3, .L1773+44
+	b	.L1783
+.L1786:
+	ldr	r3, .L1820+44
 	ldrh	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L1773+8
+	ldr	r3, .L1820+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L1756
+	cbnz	r3, .L1803
 	ldr	r3, [sp, #12]
 	movs	r6, #1
 	lsrs	r3, r3, #2
 	str	r3, [sp, #16]
-	b	.L1740
-.L1756:
+	b	.L1787
+.L1803:
 	movs	r6, #1
 	str	r6, [sp, #16]
-	b	.L1740
-.L1744:
+	b	.L1787
+.L1791:
 	movs	r3, #36
 	ldr	r1, [sp, #8]
 	mul	r2, r3, fp
 	movs	r3, #0
 	str	r3, [r10, r2]
-	ldr	r3, .L1773+40
+	ldr	r3, .L1820+40
 	ldrb	r0, [r3, fp]	@ zero_extendqisi2
 	bl	V2P_block
 	ldr	r3, [sp, #4]
 	mov	r7, r0
-	cbz	r3, .L1742
+	cbz	r3, .L1789
 	bl	IsBlkInVendorPart
-	cbnz	r0, .L1743
-.L1742:
+	cbnz	r0, .L1790
+.L1789:
 	mov	r0, r7
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L1743
+	cbnz	r0, .L1790
 	movs	r3, #36
 	add	r7, r8, r7, lsl #10
 	mla	r1, r3, r5, r10
@@ -12104,56 +12351,56 @@ FtlLowFormatEraseBlock:
 	bic	r2, r2, #3
 	add	r2, r2, r3
 	str	r2, [r1, #12]
-.L1743:
+.L1790:
 	add	fp, fp, #1
-	b	.L1741
-.L1748:
+	b	.L1788
+.L1795:
 	mul	r3, fp, r7
 	ldr	r2, [r10]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
-	cbz	r3, .L1747
+	cbz	r3, .L1794
 	ldr	r0, [r1, #4]
 	adds	r4, r4, #1
 	uxth	r4, r4
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.L1747:
+.L1794:
 	adds	r7, r7, #1
-	b	.L1746
-.L1752:
+	b	.L1793
+.L1799:
 	ldr	r3, [sp, #4]
-	cbz	r3, .L1751
+	cbz	r3, .L1798
 	mul	r3, r10, r7
 	ldr	r2, [r8]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
-	cbnz	r3, .L1751
+	cbnz	r3, .L1798
 	ldr	r0, [r1, #4]
 	movs	r1, #1
 	ubfx	r0, r0, #10, #16
 	bl	FtlFreeSysBlkQueueIn
-.L1751:
+.L1798:
 	adds	r7, r7, #1
-	b	.L1750
-.L1755:
+	b	.L1797
+.L1802:
 	movs	r4, #0
-	b	.L1728
-.L1774:
+	b	.L1775
+.L1821:
 	.align	2
-.L1773:
-	.word	.LANCHOR77
+.L1820:
+	.word	.LANCHOR76
 	.word	.LANCHOR27
-	.word	.LANCHOR8
-	.word	.LANCHOR74
+	.word	.LANCHOR15
+	.word	.LANCHOR73
 	.word	.LANCHOR38
-	.word	.LANCHOR78
+	.word	.LANCHOR77
 	.word	.LANCHOR189
-	.word	.LANCHOR59
+	.word	.LANCHOR58
 	.word	.LANCHOR186
 	.word	.LANCHOR187
 	.word	.LANCHOR47
-	.word	.LANCHOR54
+	.word	.LANCHOR53
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
 	.section	.text.FtlBbmTblFlush,"ax",%progbits
 	.align	1
@@ -12167,33 +12414,33 @@ FtlBbmTblFlush:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L1786
+	ldr	r3, .L1833
 	ldr	r4, [r3]
 	str	r3, [sp, #12]
 	cmp	r4, #0
-	bne	.L1777
-	ldr	r3, .L1786+4
+	bne	.L1824
+	ldr	r3, .L1833+4
 	mov	r1, r4
-	ldr	r7, .L1786+8
-	ldr	r5, .L1786+12
+	ldr	r7, .L1833+8
+	ldr	r5, .L1833+12
 	ldr	r3, [r3]
 	ldr	r0, [r7]
 	mov	r8, r7
-	ldr	r6, .L1786+16
+	ldr	r6, .L1833+16
 	str	r3, [r5, #12]
-	ldr	r7, .L1786+20
-	ldr	r3, .L1786+24
-	ldr	r10, .L1786+56
+	ldr	r7, .L1833+20
+	ldr	r3, .L1833+24
+	ldr	r10, .L1833+56
 	str	r0, [r5, #8]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-.L1778:
+.L1825:
 	ldrh	r3, [r7]
 	cmp	r4, r3
-	blt	.L1779
+	blt	.L1826
 	ldr	r6, [r5, #12]
 	movs	r2, #16
-	ldr	r4, .L1786+28
+	ldr	r4, .L1833+28
 	movs	r1, #255
 	movs	r7, #0
 	mov	r0, r6
@@ -12210,16 +12457,16 @@ FtlBbmTblFlush:
 	strh	r3, [r6, #8]	@ movhi
 	ldrh	r3, [r4, #6]
 	strh	r3, [r6, #10]	@ movhi
-	ldr	r3, .L1786+32
+	ldr	r3, .L1833+32
 	ldr	r3, [r3]
 	strh	r3, [r6, #12]	@ movhi
-.L1780:
+.L1827:
 	ldr	r3, [r8]
 	mov	fp, #0
 	ldrh	r2, [r4, #2]
 	ldrh	r1, [r4]
 	str	r3, [r5, #8]
-	ldr	r3, .L1786+4
+	ldr	r3, .L1833+4
 	ldrh	r0, [r6, #10]
 	str	fp, [r5]
 	ldr	r3, [r3]
@@ -12228,14 +12475,14 @@ FtlBbmTblFlush:
 	str	r3, [r5, #4]
 	ldrh	r3, [r4, #4]
 	str	r0, [sp]
-	ldr	r0, .L1786+36
+	ldr	r0, .L1833+36
 	bl	printf
-	ldr	r3, .L1786+40
+	ldr	r3, .L1833+40
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1781
+	blt	.L1828
 	ldr	r3, [r4, #8]
 	ldrh	r2, [r4]
 	strh	fp, [r4, #2]	@ movhi
@@ -12245,7 +12492,7 @@ FtlBbmTblFlush:
 	strh	r2, [r6, #8]	@ movhi
 	ldrh	r3, [r4, #4]
 	strh	r2, [r4, #4]	@ movhi
-	ldr	r2, .L1786+44
+	ldr	r2, .L1833+44
 	strh	r3, [r4]	@ movhi
 	lsls	r3, r3, #10
 	ldr	r0, [r2]
@@ -12254,9 +12501,9 @@ FtlBbmTblFlush:
 	mov	r1, r2
 	str	r3, [r0, #4]
 	bl	FlashEraseBlocks
-.L1781:
+.L1828:
 	movs	r3, #1
-	ldr	r0, .L1786+12
+	ldr	r0, .L1833+12
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
@@ -12265,27 +12512,27 @@ FtlBbmTblFlush:
 	strh	r3, [r10, #2]	@ movhi
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	bne	.L1782
+	bne	.L1829
 	adds	r7, r7, #1
 	ldr	r1, [r5, #4]
 	uxth	r7, r7
-	ldr	r0, .L1786+48
+	ldr	r0, .L1833+48
 	bl	printf
 	cmp	r7, #3
-	bls	.L1780
+	bls	.L1827
 	mov	r2, r7
 	ldr	r1, [r5, #4]
-	ldr	r0, .L1786+52
+	ldr	r0, .L1833+52
 	bl	printf
 	ldr	r2, [sp, #12]
 	movs	r3, #1
 	str	r3, [r2]
-.L1777:
+.L1824:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1779:
+.L1826:
 	ldrh	r2, [r10]
 	ldr	r3, [r5, #8]
 	ldr	r1, [r6, #4]!
@@ -12294,29 +12541,29 @@ FtlBbmTblFlush:
 	adds	r4, r4, #1
 	add	r0, r3, r0, lsl #2
 	bl	ftl_memcpy
-	b	.L1778
-.L1782:
+	b	.L1825
+.L1829:
 	ldr	r3, [sp, #8]
 	cmp	r3, #0
-	bne	.L1777
+	bne	.L1824
 	movs	r3, #1
 	str	r3, [sp, #8]
-	b	.L1780
-.L1787:
+	b	.L1827
+.L1834:
 	.align	2
-.L1786:
-	.word	.LANCHOR77
+.L1833:
+	.word	.LANCHOR76
 	.word	.LANCHOR188
 	.word	.LANCHOR183
 	.word	.LANCHOR202
-	.word	.LANCHOR75+24
+	.word	.LANCHOR74+24
 	.word	.LANCHOR45
-	.word	.LANCHOR58
-	.word	.LANCHOR75
+	.word	.LANCHOR57
+	.word	.LANCHOR74
 	.word	.LANCHOR37
 	.word	.LC33
-	.word	.LANCHOR54
-	.word	.LANCHOR78
+	.word	.LANCHOR53
+	.word	.LANCHOR77
 	.word	.LC34
 	.word	.LC35
 	.word	.LANCHOR123
@@ -12332,241 +12579,241 @@ FtlBbmTblFlush:
 allocate_data_superblock:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1853
+	ldr	r3, .L1900
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L1790
-.L1789:
-	ldr	r3, .L1853+4
-	ldr	r8, .L1853+60
-	ldr	r7, .L1853+8
+	bne	.L1837
+.L1836:
+	ldr	r3, .L1900+4
+	ldr	r8, .L1900+60
+	ldr	r7, .L1900+8
 	ldrh	r3, [r3]
 	ldrh	r2, [r8]
 	add	r3, r3, r2
 	ldrh	r2, [r7]
 	cmp	r3, r2
-	ble	.L1791
-	ldr	r1, .L1853+12
-	movw	r2, #3108
-	ldr	r0, .L1853+16
+	ble	.L1838
+	ldr	r1, .L1900+12
+	movw	r2, #3139
+	ldr	r0, .L1900+16
 	bl	printf
-	ldr	r1, .L1853+20
-	ldr	r0, .L1853+24
+	ldr	r1, .L1900+20
+	ldr	r0, .L1900+24
 	bl	printf
-.L1791:
-	ldr	r3, .L1853+28
+.L1838:
+	ldr	r3, .L1900+28
 	ldrb	r2, [r4, #8]	@ zero_extendqisi2
 	cmp	r4, r3
-	bne	.L1792
-	ldr	r3, .L1853+4
+	bne	.L1839
+	ldr	r3, .L1900+4
 	ldrh	r5, [r3]
-	ldr	r3, .L1853+32
+	ldr	r3, .L1900+32
 	ldr	r3, [r3]
 	lsrs	r0, r5, #1
 	adds	r1, r0, #1
 	mul	r6, r3, r5
 	add	r1, r1, r6, lsr #2
-	ldr	r6, .L1853+36
+	ldr	r6, .L1900+36
 	uxth	r1, r1
 	ldr	r6, [r6]
-	cbz	r6, .L1793
-	ldr	r6, .L1853+40
+	cbz	r6, .L1840
+	ldr	r6, .L1900+40
 	ldr	r6, [r6]
 	cmp	r6, #39
-	bhi	.L1793
+	bhi	.L1840
 	cmp	r6, #2
-	bls	.L1827
+	bls	.L1874
 	lsls	r1, r5, #31
-	bpl	.L1823
+	bpl	.L1870
 	cmp	r3, #0
-	beq	.L1827
-.L1823:
+	beq	.L1874
+.L1870:
 	mov	r1, r0
-	b	.L1793
-.L1792:
+	b	.L1840
+.L1839:
 	cmp	r2, #1
-	bne	.L1827
-	ldr	r3, .L1853+44
+	bne	.L1874
+	ldr	r3, .L1900+44
 	ldrh	r3, [r3]
 	cmp	r3, #1
-	beq	.L1827
-	ldr	r3, .L1853+48
+	beq	.L1874
+	ldr	r3, .L1900+48
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1827
-	ldr	r3, .L1853+4
-	ldr	r0, .L1853+36
+	bne	.L1874
+	ldr	r3, .L1900+4
+	ldr	r0, .L1900+36
 	ldrh	r3, [r3]
 	ldr	r0, [r0]
 	lsrs	r1, r3, #3
-	cbz	r0, .L1793
-	ldr	r0, .L1853+40
+	cbz	r0, .L1840
+	ldr	r0, .L1900+40
 	ldr	r0, [r0]
 	cmp	r0, #1
-	bhi	.L1793
+	bhi	.L1840
 	rsb	r3, r3, r3, lsl #3
 	ubfx	r1, r3, #3, #16
-.L1793:
-	cbz	r1, .L1794
+.L1840:
+	cbz	r1, .L1841
 	subs	r1, r1, #1
 	uxth	r1, r1
-.L1794:
-	ldr	r0, .L1853+52
+.L1841:
+	ldr	r0, .L1900+52
 	bl	List_pop_index_node
-	ldr	r3, .L1853+4
+	ldr	r3, .L1900+4
 	mov	r5, r0
 	uxth	r10, r0
 	ldrh	r3, [r3]
-	cbnz	r3, .L1795
-	ldr	r1, .L1853+12
-	movw	r2, #3128
-	ldr	r0, .L1853+16
+	cbnz	r3, .L1842
+	ldr	r1, .L1900+12
+	movw	r2, #3159
+	ldr	r0, .L1900+16
 	bl	printf
-	ldr	r1, .L1853+20
-	ldr	r0, .L1853+24
+	ldr	r1, .L1900+20
+	ldr	r0, .L1900+24
 	bl	printf
-.L1795:
-	ldr	r3, .L1853+4
-	ldr	r2, .L1853+4
+.L1842:
+	ldr	r3, .L1900+4
+	ldr	r2, .L1900+4
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	strh	r3, [r2]	@ movhi
 	ldrh	r3, [r7]
 	cmp	r3, r10
-	bls	.L1789
+	bls	.L1836
 	uxth	r5, r5
 	lsls	r3, r5, #1
 	str	r3, [sp]
-	ldr	r3, .L1853+56
+	ldr	r3, .L1900+56
 	ldr	r3, [r3]
 	ldrh	r6, [r3, r5, lsl #1]
 	cmp	r6, #0
-	bne	.L1789
+	bne	.L1836
 	strh	r10, [r4]	@ movhi
 	mov	r0, r4
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1797
-	ldr	r3, .L1853+56
+	bne	.L1844
+	ldr	r3, .L1900+56
 	movw	r2, #65535
 	ldr	r3, [r3]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
-	ldr	r3, .L1853+4
+	ldr	r3, .L1900+4
 	ldrh	r2, [r8]
 	ldrh	r3, [r3]
 	add	r3, r3, r2
 	ldrh	r2, [r7]
 	cmp	r3, r2
-	ble	.L1789
-	movw	r2, #3144
-	ldr	r1, .L1853+12
-	ldr	r0, .L1853+16
+	ble	.L1836
+	movw	r2, #3175
+	ldr	r1, .L1900+12
+	ldr	r0, .L1900+16
 	bl	printf
-	ldr	r1, .L1853+20
-	ldr	r0, .L1853+24
+	ldr	r1, .L1900+20
+	ldr	r0, .L1900+24
 	bl	printf
-	b	.L1789
-.L1827:
+	b	.L1836
+.L1874:
 	movs	r1, #0
-	b	.L1794
-.L1854:
+	b	.L1841
+.L1901:
 	.align	2
-.L1853:
-	.word	.LANCHOR77
-	.word	.LANCHOR89
+.L1900:
+	.word	.LANCHOR76
+	.word	.LANCHOR88
 	.word	.LANCHOR40
 	.word	.LANCHOR203
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LANCHOR94
+	.word	.LANCHOR93
 	.word	.LANCHOR172
 	.word	.LANCHOR28
 	.word	.LANCHOR170
 	.word	.LANCHOR44
-	.word	.LANCHOR8
-	.word	.LANCHOR88
-	.word	.LANCHOR84
-	.word	.LANCHOR86
-.L1797:
-	ldr	r3, .L1855
+	.word	.LANCHOR15
+	.word	.LANCHOR87
+	.word	.LANCHOR83
+	.word	.LANCHOR85
+.L1844:
+	ldr	r3, .L1902
 	ldrh	r2, [r8]
 	ldrh	r3, [r3]
 	add	r3, r3, r2
 	ldrh	r2, [r7]
 	cmp	r3, r2
-	ble	.L1799
-	ldr	r1, .L1855+4
-	movw	r2, #3147
-	ldr	r0, .L1855+8
+	ble	.L1846
+	ldr	r1, .L1902+4
+	movw	r2, #3178
+	ldr	r0, .L1902+8
 	bl	printf
-	ldr	r1, .L1855+12
-	ldr	r0, .L1855+16
+	ldr	r1, .L1902+12
+	ldr	r0, .L1902+16
 	bl	printf
-.L1799:
-	ldr	r3, .L1855+20
+.L1846:
+	ldr	r3, .L1902+20
 	add	lr, r4, #16
-	ldr	r2, .L1855+24
+	ldr	r2, .L1902+24
 	mov	r8, #0
 	ldr	ip, [r3]
 	ldrh	r0, [r2]
 	movs	r2, #36
 	mov	r3, ip
 	mla	r0, r2, r0, ip
-.L1800:
+.L1847:
 	cmp	r0, r3
-	bne	.L1802
-	cbnz	r6, .L1803
-	ldr	r1, .L1855+4
-	movw	r2, #3159
-	ldr	r0, .L1855+8
+	bne	.L1849
+	cbnz	r6, .L1850
+	ldr	r1, .L1902+4
+	movw	r2, #3190
+	ldr	r0, .L1902+8
 	bl	printf
-	ldr	r1, .L1855+12
-	ldr	r0, .L1855+16
+	ldr	r1, .L1902+12
+	ldr	r0, .L1902+16
 	bl	printf
-.L1803:
-	ldr	r3, .L1855+28
-	ldr	r8, .L1855+80
+.L1850:
+	ldr	r3, .L1902+28
+	ldr	r8, .L1902+80
 	ldr	r3, [r3]
-	cbz	r3, .L1804
-	ldr	r3, .L1855+32
+	cbz	r3, .L1851
+	ldr	r3, .L1902+32
 	cmp	r4, r3
-	bne	.L1804
+	bne	.L1851
 	ldr	r3, [r8]
 	ldrh	r3, [r3, r5, lsl #1]
 	cmp	r3, #40
 	itt	hi
 	movhi	r3, #0
 	strbhi	r3, [r4, #8]
-.L1804:
-	ldr	r3, .L1855+36
+.L1851:
+	ldr	r3, .L1902+36
 	ldrh	r3, [r3]
 	cmp	r3, r10
-	bne	.L1805
-	ldr	r1, .L1855+4
-	movw	r2, #3166
-	ldr	r0, .L1855+8
+	bne	.L1852
+	ldr	r1, .L1902+4
+	movw	r2, #3197
+	ldr	r0, .L1902+8
 	bl	printf
-	ldr	r1, .L1855+12
-	ldr	r0, .L1855+16
+	ldr	r1, .L1902+12
+	ldr	r0, .L1902+16
 	bl	printf
-.L1805:
+.L1852:
 	ldrb	r2, [r4, #8]	@ zero_extendqisi2
-	ldr	r3, .L1855+40
-	ldr	fp, .L1855+84
+	ldr	r3, .L1902+40
+	ldr	fp, .L1902+84
 	cmp	r2, #0
-	bne	.L1806
+	bne	.L1853
 	ldr	r1, [r8]
 	ldrh	r2, [r1, r5, lsl #1]
 	cmp	r2, #0
-	beq	.L1807
-	ldr	r0, .L1855+44
+	beq	.L1854
+	ldr	r0, .L1902+44
 	ldrh	r0, [r0]
 	add	r2, r2, r0
-.L1850:
+.L1897:
 	strh	r2, [r1, r5, lsl #1]	@ movhi
 	mov	r0, r10
 	ldr	r2, [r3]
@@ -12575,43 +12822,43 @@ allocate_data_superblock:
 	adds	r2, r2, #1
 	str	r2, [r3]
 	bl	ftl_set_blk_mode
-.L1851:
+.L1898:
 	ldr	r2, [r8]
 	ldr	r3, [sp, #4]
 	ldrh	r0, [r2, r5, lsl #1]
-	ldr	r2, .L1855+48
+	ldr	r2, .L1902+48
 	ldr	r1, [r2]
 	cmp	r0, r1
 	ldrh	r1, [r7]
 	it	hi
 	strhi	r0, [r2]
-	ldr	r2, .L1855+44
+	ldr	r2, .L1902+44
 	ldr	r0, [r3]
 	ldr	r3, [fp]
 	ldrh	r2, [r2]
-	ldr	r7, .L1855+52
+	ldr	r7, .L1902+52
 	mla	r0, r0, r2, r3
 	bl	__aeabi_uidiv
-	ldr	r3, .L1855+56
+	ldr	r3, .L1902+56
 	str	r0, [r3]
-	ldr	r3, .L1855+60
+	ldr	r3, .L1902+60
 	ldr	r2, [r3]
 	ldr	r3, [r2, #16]
 	adds	r3, r3, #1
 	str	r3, [r2, #16]
-	ldr	r3, .L1855+20
+	ldr	r3, .L1902+20
 	ldr	r0, [r3]
 	movs	r3, #36
 	adds	r1, r0, #4
 	mla	r3, r3, r6, r0
 	adds	r3, r3, #40
-.L1811:
+.L1858:
 	adds	r1, r1, #36
 	cmp	r3, r1
-	bne	.L1812
-	ldr	r3, .L1855+64
+	bne	.L1859
+	ldr	r3, .L1902+64
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1813
+	cbz	r3, .L1860
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	mov	r2, r6
 	cmp	r3, #1
@@ -12619,8 +12866,8 @@ allocate_data_superblock:
 	moveq	r1, #0
 	movne	r1, #1
 	bl	FlashEraseBlocks
-.L1813:
-	ldr	r3, .L1855+20
+.L1860:
+	ldr	r3, .L1902+20
 	movs	r7, #0
 	mov	r8, r7
 	mov	fp, #36
@@ -12628,43 +12875,43 @@ allocate_data_superblock:
 	ldrb	r1, [r4, #8]	@ zero_extendqisi2
 	ldr	r0, [r3]
 	bl	FlashEraseBlocks
-.L1815:
+.L1862:
 	uxth	r3, r7
 	cmp	r6, r3
-	bhi	.L1817
+	bhi	.L1864
 	cmp	r8, #0
-	beq	.L1818
+	beq	.L1865
 	mov	r0, r10
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L1818:
+.L1865:
 	ldrb	r2, [r4, #7]	@ zero_extendqisi2
 	cmp	r2, #0
-	bne	.L1819
-	ldr	r3, .L1855+68
+	bne	.L1866
+	ldr	r3, .L1902+68
 	movw	r2, #65535
 	ldr	r3, [r3]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
-	b	.L1789
-.L1802:
+	b	.L1836
+.L1849:
 	ldrh	r1, [lr], #2
 	movw	fp, #65535
 	str	r8, [r3, #8]
 	str	r8, [r3, #12]
 	cmp	r1, fp
-	beq	.L1801
+	beq	.L1848
 	mla	fp, r2, r6, ip
 	adds	r6, r6, #1
 	lsls	r1, r1, #10
 	uxth	r6, r6
 	str	r1, [fp, #4]
-.L1801:
+.L1848:
 	adds	r3, r3, #36
-	b	.L1800
-.L1807:
+	b	.L1847
+.L1854:
 	movs	r2, #2
-	b	.L1850
-.L1806:
+	b	.L1897
+.L1853:
 	ldr	r1, [r8]
 	mov	r0, r10
 	str	r3, [sp, #4]
@@ -12675,20 +12922,20 @@ allocate_data_superblock:
 	adds	r2, r2, #1
 	str	r2, [fp]
 	bl	ftl_set_blk_mode.part.10
-	b	.L1851
-.L1812:
+	b	.L1898
+.L1859:
 	ldr	r2, [r1, #-36]
 	ands	r2, r2, r7
 	str	r2, [r1, #-36]
-	b	.L1811
-.L1817:
-	ldr	r2, .L1855+20
+	b	.L1858
+.L1864:
+	ldr	r2, .L1902+20
 	mul	r3, fp, r7
 	ldr	r2, [r2]
 	adds	r1, r2, r3
 	ldr	r2, [r2, r3]
 	adds	r3, r2, #1
-	bne	.L1816
+	bne	.L1863
 	ldr	r0, [r1, #4]
 	add	r8, r8, #1
 	str	r2, [sp, #4]
@@ -12700,12 +12947,12 @@ allocate_data_superblock:
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	strb	r3, [r4, #7]
-.L1816:
+.L1863:
 	adds	r7, r7, #1
-	b	.L1815
-.L1819:
-	ldr	r3, .L1855+72
-	ldr	r1, .L1855+76
+	b	.L1862
+.L1866:
+	ldr	r3, .L1902+72
+	ldr	r1, .L1902+76
 	ldrh	r3, [r3]
 	strh	r10, [r4]	@ movhi
 	smulbb	r3, r3, r2
@@ -12718,39 +12965,39 @@ allocate_data_superblock:
 	str	r2, [r4, #12]
 	adds	r2, r2, #1
 	str	r2, [r1]
-	ldr	r2, .L1855+68
+	ldr	r2, .L1902+68
 	ldr	r1, [sp]
 	ldr	r2, [r2]
 	strh	r3, [r2, r1]	@ movhi
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L1820
+	cbz	r3, .L1867
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1790
-.L1820:
-	ldr	r1, .L1855+4
-	movw	r2, #3225
-	ldr	r0, .L1855+8
+	cbnz	r3, .L1837
+.L1867:
+	ldr	r1, .L1902+4
+	movw	r2, #3256
+	ldr	r0, .L1902+8
 	bl	printf
-	ldr	r1, .L1855+12
-	ldr	r0, .L1855+16
+	ldr	r1, .L1902+12
+	ldr	r0, .L1902+16
 	bl	printf
-.L1790:
+.L1837:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1856:
+.L1903:
 	.align	2
-.L1855:
-	.word	.LANCHOR89
+.L1902:
+	.word	.LANCHOR88
 	.word	.LANCHOR203
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LANCHOR78
+	.word	.LANCHOR77
 	.word	.LANCHOR38
 	.word	.LANCHOR28
-	.word	.LANCHOR92
+	.word	.LANCHOR91
 	.word	.LANCHOR204
 	.word	.LANCHOR167
 	.word	.LANCHOR48
@@ -12758,11 +13005,11 @@ allocate_data_superblock:
 	.word	-1024
 	.word	.LANCHOR205
 	.word	.LANCHOR191
-	.word	.LANCHOR8
-	.word	.LANCHOR84
-	.word	.LANCHOR53
+	.word	.LANCHOR15
+	.word	.LANCHOR83
+	.word	.LANCHOR52
 	.word	.LANCHOR159
-	.word	.LANCHOR79
+	.word	.LANCHOR78
 	.word	.LANCHOR168
 	.size	allocate_data_superblock, .-allocate_data_superblock
 	.section	.text.FtlGcFreeBadSuperBlk,"ax",%progbits
@@ -12778,43 +13025,43 @@ FtlGcFreeBadSuperBlk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, r0
-	ldr	r4, .L1869
+	ldr	r4, .L1916
 	ldrh	r3, [r4]
-	cbz	r3, .L1858
-	ldr	r8, .L1869+12
+	cbz	r3, .L1905
+	ldr	r8, .L1916+12
 	movs	r7, #0
-.L1859:
-	ldr	r3, .L1869+4
+.L1906:
+	ldr	r3, .L1916+4
 	ldrh	r2, [r3]
 	uxth	r3, r7
 	cmp	r2, r3
-	bhi	.L1865
+	bhi	.L1912
 	bl	FtlGcReFreshBadBlk
-.L1858:
+.L1905:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1865:
-	ldr	r2, .L1869+8
+.L1912:
+	ldr	r2, .L1916+8
 	uxth	r3, r7
 	mov	r1, r10
 	mov	fp, #0
 	ldrb	r0, [r2, r3]	@ zero_extendqisi2
 	bl	V2P_block
 	mov	r1, r0
-.L1860:
+.L1907:
 	ldrh	r3, [r4]
 	uxth	r5, fp
 	cmp	r3, r5
-	bhi	.L1864
+	bhi	.L1911
 	adds	r7, r7, #1
-	b	.L1859
-.L1864:
+	b	.L1906
+.L1911:
 	uxth	r6, fp
 	ldrh	r3, [r8, r6, lsl #1]
 	cmp	r3, r1
-	bne	.L1861
+	bne	.L1908
 	mov	r0, r1
 	str	r1, [sp, #4]
 	bl	FtlBbmMapBadBlock
@@ -12822,27 +13069,27 @@ FtlGcFreeBadSuperBlk:
 	ldrh	r2, [r4]
 	add	r3, r8, r6, lsl #1
 	ldr	r1, [sp, #4]
-.L1862:
+.L1909:
 	cmp	r5, r2
-	bcc	.L1863
+	bcc	.L1910
 	subs	r2, r2, #1
 	strh	r2, [r4]	@ movhi
-.L1861:
+.L1908:
 	add	fp, fp, #1
-	b	.L1860
-.L1863:
+	b	.L1907
+.L1910:
 	ldrh	r0, [r3, #2]!
 	adds	r5, r5, #1
 	uxth	r5, r5
 	strh	r0, [r3, #-2]	@ movhi
-	b	.L1862
-.L1870:
+	b	.L1909
+.L1917:
 	.align	2
-.L1869:
-	.word	.LANCHOR117
+.L1916:
+	.word	.LANCHOR116
 	.word	.LANCHOR38
 	.word	.LANCHOR47
-	.word	.LANCHOR118
+	.word	.LANCHOR117
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
 	.section	.text.update_vpc_list,"ax",%progbits
 	.align	1
@@ -12857,32 +13104,32 @@ update_vpc_list:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	mov	r4, r0
-	ldr	r3, .L1881
+	ldr	r3, .L1928
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	bne	.L1872
-	ldr	r2, .L1881+4
+	bne	.L1919
+	ldr	r2, .L1928+4
 	ldrh	r1, [r2]
 	cmp	r1, r0
-	bne	.L1873
+	bne	.L1920
 	movw	r3, #65535
 	strh	r3, [r2]	@ movhi
-.L1874:
-	ldr	r5, .L1881+8
+.L1921:
+	ldr	r5, .L1928+8
 	mov	r1, r4
-	ldr	r0, .L1881+12
+	ldr	r0, .L1928+12
 	bl	List_remove_node
 	ldrh	r3, [r5]
-	cbnz	r3, .L1876
-	ldr	r1, .L1881+16
-	movw	r2, #3336
-	ldr	r0, .L1881+20
+	cbnz	r3, .L1923
+	ldr	r1, .L1928+16
+	movw	r2, #3367
+	ldr	r0, .L1928+20
 	bl	printf
-	ldr	r1, .L1881+24
-	ldr	r0, .L1881+28
+	ldr	r1, .L1928+24
+	ldr	r0, .L1928+28
 	bl	printf
-.L1876:
+.L1923:
 	ldrh	r3, [r5]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -12890,60 +13137,60 @@ update_vpc_list:
 	bl	free_data_superblock
 	mov	r0, r4
 	bl	FtlGcFreeBadSuperBlk
-	ldr	r3, .L1881+32
+	ldr	r3, .L1928+32
 	ldrh	r2, [r5]
 	ldrh	r3, [r3]
 	add	r3, r3, r2
-	ldr	r2, .L1881+36
+	ldr	r2, .L1928+36
 	ldrh	r2, [r2]
 	cmp	r3, r2
-	ble	.L1880
-	ldr	r1, .L1881+16
-	movw	r2, #3339
-	ldr	r0, .L1881+20
+	ble	.L1927
+	ldr	r1, .L1928+16
+	movw	r2, #3370
+	ldr	r0, .L1928+20
 	bl	printf
-	ldr	r1, .L1881+24
-	ldr	r0, .L1881+28
+	ldr	r1, .L1928+24
+	ldr	r0, .L1928+28
 	bl	printf
-.L1880:
+.L1927:
 	movs	r3, #1
-	b	.L1871
-.L1873:
-	ldr	r2, .L1881+40
+	b	.L1918
+.L1920:
+	ldr	r2, .L1928+40
 	ldrh	r2, [r2]
 	cmp	r2, r0
-	beq	.L1871
-	ldr	r2, .L1881+44
+	beq	.L1918
+	ldr	r2, .L1928+44
 	ldrh	r2, [r2]
 	cmp	r2, r0
-	beq	.L1871
-	ldr	r2, .L1881+48
+	beq	.L1918
+	ldr	r2, .L1928+48
 	ldrh	r2, [r2]
 	cmp	r2, r0
-	bne	.L1874
-.L1871:
+	bne	.L1921
+.L1918:
 	mov	r0, r3
 	pop	{r3, r4, r5, pc}
-.L1872:
+.L1919:
 	bl	List_update_data_list
 	movs	r3, #0
-	b	.L1871
-.L1882:
+	b	.L1918
+.L1929:
 	.align	2
-.L1881:
-	.word	.LANCHOR84
-	.word	.LANCHOR204
-	.word	.LANCHOR86
+.L1928:
 	.word	.LANCHOR83
+	.word	.LANCHOR204
+	.word	.LANCHOR85
+	.word	.LANCHOR82
 	.word	.LANCHOR206
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LANCHOR89
+	.word	.LANCHOR88
 	.word	.LANCHOR40
+	.word	.LANCHOR91
 	.word	.LANCHOR92
 	.word	.LANCHOR93
-	.word	.LANCHOR94
 	.size	update_vpc_list, .-update_vpc_list
 	.section	.text.decrement_vpc_count,"ax",%progbits
 	.align	1
@@ -12960,47 +13207,47 @@ decrement_vpc_count:
 	push	{r4, r5, r6, lr}
 	cmp	r0, r3
 	mov	r4, r0
-	beq	.L1884
-	ldr	r5, .L1895
+	beq	.L1931
+	ldr	r5, .L1942
 	ldr	r3, [r5]
 	ldrh	r2, [r3, r0, lsl #1]
 	cmp	r2, #0
-	bne	.L1885
+	bne	.L1932
 	mov	r1, r0
-	ldr	r0, .L1895+4
+	ldr	r0, .L1942+4
 	bl	printf
 	ldr	r3, [r5]
 	ldrh	r3, [r3, r4, lsl #1]
-	cbnz	r3, .L1886
-	ldr	r1, .L1895+8
-	movw	r2, #3354
-	ldr	r0, .L1895+12
+	cbnz	r3, .L1933
+	ldr	r1, .L1942+8
+	movw	r2, #3385
+	ldr	r0, .L1942+12
 	bl	printf
-	ldr	r1, .L1895+16
-	ldr	r0, .L1895+20
+	ldr	r1, .L1942+16
+	ldr	r0, .L1942+20
 	bl	printf
-.L1886:
+.L1933:
 	ldr	r3, [r5]
 	movs	r2, #32
 	mov	r1, r4
-	ldr	r0, .L1895+24
+	ldr	r0, .L1942+24
 	strh	r2, [r3, r4, lsl #1]	@ movhi
 	bl	test_node_in_list
-	cbz	r0, .L1887
-	ldr	r6, .L1895+28
+	cbz	r0, .L1934
+	ldr	r6, .L1942+28
 	mov	r1, r4
-	ldr	r0, .L1895+24
+	ldr	r0, .L1942+24
 	bl	List_remove_node
 	ldrh	r3, [r6]
-	cbnz	r3, .L1888
-	ldr	r1, .L1895+8
-	movw	r2, #3358
-	ldr	r0, .L1895+12
+	cbnz	r3, .L1935
+	ldr	r1, .L1942+8
+	movw	r2, #3389
+	ldr	r0, .L1942+12
 	bl	printf
-	ldr	r1, .L1895+16
-	ldr	r0, .L1895+20
+	ldr	r1, .L1942+16
+	ldr	r0, .L1942+20
 	bl	printf
-.L1888:
+.L1935:
 	ldrh	r3, [r6]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -13008,33 +13255,33 @@ decrement_vpc_count:
 	bl	INSERT_DATA_LIST
 	ldr	r3, [r5]
 	mov	r1, r4
-	ldr	r0, .L1895+32
+	ldr	r0, .L1942+32
 	ldrh	r2, [r3, r4, lsl #1]
 	bl	printf
-.L1887:
+.L1934:
 	mov	r0, r4
 	bl	FtlGcRefreshBlock
-.L1891:
+.L1938:
 	movs	r5, #0
-	b	.L1883
-.L1885:
+	b	.L1930
+.L1932:
 	subs	r2, r2, #1
 	strh	r2, [r3, r0, lsl #1]	@ movhi
-.L1884:
-	ldr	r6, .L1895+36
+.L1931:
+	ldr	r6, .L1942+36
 	movw	r3, #65535
 	ldrh	r0, [r6]
 	cmp	r0, r3
-	bne	.L1890
+	bne	.L1937
 	strh	r4, [r6]	@ movhi
-	b	.L1891
-.L1890:
+	b	.L1938
+.L1937:
 	cmp	r4, r0
-	beq	.L1891
+	beq	.L1938
 	bl	update_vpc_list
-	ldr	r3, .L1895+40
+	ldr	r3, .L1942+40
 	adds	r5, r0, #0
-	ldr	r2, .L1895+44
+	ldr	r2, .L1942+44
 	it	ne
 	movne	r5, #1
 	strh	r4, [r6]	@ movhi
@@ -13042,40 +13289,40 @@ decrement_vpc_count:
 	ldr	r2, [r2]
 	subs	r3, r3, r2
 	asrs	r2, r3, #1
-	ldr	r3, .L1895+48
+	ldr	r3, .L1942+48
 	muls	r3, r2, r3
-	ldr	r2, .L1895
+	ldr	r2, .L1942
 	ldr	r2, [r2]
 	uxth	r1, r3
 	ldrh	r2, [r2, r1, lsl #1]
-	cbnz	r2, .L1883
+	cbnz	r2, .L1930
 	cmp	r4, r1
-	beq	.L1883
-	ldr	r1, .L1895+8
-	movw	r2, #3379
-	ldr	r0, .L1895+12
+	beq	.L1930
+	ldr	r1, .L1942+8
+	movw	r2, #3410
+	ldr	r0, .L1942+12
 	bl	printf
-	ldr	r1, .L1895+16
-	ldr	r0, .L1895+20
+	ldr	r1, .L1942+16
+	ldr	r0, .L1942+20
 	bl	printf
-.L1883:
+.L1930:
 	mov	r0, r5
 	pop	{r4, r5, r6, pc}
-.L1896:
+.L1943:
 	.align	2
-.L1895:
-	.word	.LANCHOR84
+.L1942:
+	.word	.LANCHOR83
 	.word	.LC36
 	.word	.LANCHOR207
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
+	.word	.LANCHOR87
 	.word	.LANCHOR88
-	.word	.LANCHOR89
 	.word	.LC37
 	.word	.LANCHOR133
-	.word	.LANCHOR83
 	.word	.LANCHOR82
+	.word	.LANCHOR81
 	.word	-1431655765
 	.size	decrement_vpc_count, .-decrement_vpc_count
 	.section	.text.FtlSlcSuperblockCheck,"ax",%progbits
@@ -13093,71 +13340,71 @@ FtlSlcSuperblockCheck:
 	push	{r4, r5, r6, lr}
 	mov	r4, r0
 	cmp	r3, #0
-	beq	.L1897
+	beq	.L1944
 	ldrh	r2, [r0]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1897
+	beq	.L1944
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
-	ldr	r5, .L1908
-	ldr	r6, .L1908+4
+	ldr	r5, .L1955
+	ldr	r6, .L1955+4
 	adds	r3, r3, #8
 	ldrh	r3, [r0, r3, lsl #1]
-.L1901:
+.L1948:
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L1903
+	beq	.L1950
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1904
+	bne	.L1951
 	ldrb	r1, [r5]	@ zero_extendqisi2
-	cbnz	r1, .L1904
+	cbnz	r1, .L1951
 	ldrh	r1, [r4, #2]
 	ldrh	r1, [r6, r1, lsl #1]
 	cmp	r1, r2
-	bne	.L1904
+	bne	.L1951
 	ldrh	r3, [r4, #4]
 	ldrh	r0, [r4]
 	subs	r3, r3, #1
 	strh	r3, [r4, #4]	@ movhi
 	bl	decrement_vpc_count
 	ldrh	r2, [r4, #4]
-	cbnz	r2, .L1903
+	cbnz	r2, .L1950
 	ldrh	r3, [r4, #2]
 	strb	r2, [r4, #6]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	pop	{r4, r5, r6, pc}
-.L1903:
+.L1950:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	ldr	r2, .L1908+8
+	ldr	r2, .L1955+8
 	adds	r3, r3, #1
 	ldrh	r2, [r2]
 	uxtb	r3, r3
 	strb	r3, [r4, #6]
 	cmp	r2, r3
-	bne	.L1902
+	bne	.L1949
 	ldrh	r3, [r4, #2]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [r4, #6]
-.L1902:
+.L1949:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r3, [r4, r3, lsl #1]
-	b	.L1901
-.L1904:
+	b	.L1948
+.L1951:
 	ldrb	r2, [r5]	@ zero_extendqisi2
-	cbz	r2, .L1897
+	cbz	r2, .L1944
 	cmp	r3, #1
-	bne	.L1897
-	ldr	r3, .L1908+12
+	bne	.L1944
+	ldr	r3, .L1955+12
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1897
-	ldr	r3, .L1908+16
+	bcc	.L1944
+	ldr	r3, .L1955+16
 	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
 	ldr	r2, [r3]
@@ -13165,22 +13412,22 @@ FtlSlcSuperblockCheck:
 	subs	r3, r3, r0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
 	movs	r3, #0
-	ldr	r2, .L1908+20
+	ldr	r2, .L1955+20
 	strh	r3, [r4, #4]	@ movhi
 	strb	r3, [r4, #6]
 	ldrh	r2, [r2]
 	strh	r2, [r4, #2]	@ movhi
-.L1897:
+.L1944:
 	pop	{r4, r5, r6, pc}
-.L1909:
+.L1956:
 	.align	2
-.L1908:
-	.word	.LANCHOR8
+.L1955:
+	.word	.LANCHOR15
 	.word	.LANCHOR120
 	.word	.LANCHOR38
-	.word	.LANCHOR54
-	.word	.LANCHOR84
 	.word	.LANCHOR53
+	.word	.LANCHOR83
+	.word	.LANCHOR52
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
 	.section	.text.get_new_active_ppa,"ax",%progbits
 	.align	1
@@ -13198,93 +13445,93 @@ get_new_active_ppa:
 	push	{r4, r5, r6, r7, r8, lr}
 	mov	r4, r0
 	cmp	r2, r3
-	bne	.L1911
-	ldr	r1, .L1932
-	movw	r2, #3276
-	ldr	r0, .L1932+4
+	bne	.L1958
+	ldr	r1, .L1979
+	movw	r2, #3307
+	ldr	r0, .L1979+4
 	bl	printf
-	ldr	r1, .L1932+8
-	ldr	r0, .L1932+12
+	ldr	r1, .L1979+8
+	ldr	r0, .L1979+12
 	bl	printf
-.L1911:
-	ldr	r5, .L1932+16
+.L1958:
+	ldr	r5, .L1979+16
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5]
 	cmp	r2, r3
-	bne	.L1912
-	ldr	r1, .L1932
-	movw	r2, #3277
-	ldr	r0, .L1932+4
+	bne	.L1959
+	ldr	r1, .L1979
+	movw	r2, #3308
+	ldr	r0, .L1979+4
 	bl	printf
-	ldr	r1, .L1932+8
-	ldr	r0, .L1932+12
+	ldr	r1, .L1979+8
+	ldr	r0, .L1979+12
 	bl	printf
-.L1912:
+.L1959:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1913
-	ldr	r1, .L1932
-	movw	r2, #3278
-	ldr	r0, .L1932+4
+	cbnz	r3, .L1960
+	ldr	r1, .L1979
+	movw	r2, #3309
+	ldr	r0, .L1979+4
 	bl	printf
-	ldr	r1, .L1932+8
-	ldr	r0, .L1932+12
+	ldr	r1, .L1979+8
+	ldr	r0, .L1979+12
 	bl	printf
-.L1913:
+.L1960:
 	movs	r3, #0
-	ldr	r7, .L1932+20
+	ldr	r7, .L1979+20
 	strb	r3, [r4, #10]
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	ldr	r6, .L1932+24
+	ldr	r6, .L1979+24
 	adds	r3, r3, #8
 	ldrh	r2, [r4, r3, lsl #1]
-.L1914:
+.L1961:
 	movw	r0, #65535
 	cmp	r2, r0
-	beq	.L1915
+	beq	.L1962
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	ldrh	r1, [r4, #2]
 	cmp	r3, #1
 	ldrh	r3, [r4, #4]
-	bne	.L1917
+	bne	.L1964
 	ldrb	ip, [r6]	@ zero_extendqisi2
 	cmp	ip, #0
-	bne	.L1917
-	ldr	ip, .L1932+28
+	bne	.L1964
+	ldr	ip, .L1979+28
 	ldrh	ip, [ip, r1, lsl #1]
 	cmp	ip, r0
-	bne	.L1917
+	bne	.L1964
 	subs	r3, r3, #1
 	ldrh	r0, [r4]
 	strh	r3, [r4, #4]	@ movhi
 	bl	decrement_vpc_count
-.L1915:
+.L1962:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	ldrh	r2, [r7]
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r2, r3
 	strb	r3, [r4, #6]
-	bne	.L1916
+	bne	.L1963
 	ldrh	r3, [r4, #2]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [r4, #6]
-.L1916:
+.L1963:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r2, [r4, r3, lsl #1]
-	b	.L1914
-.L1917:
-	ldr	r8, .L1932+24
+	b	.L1961
+.L1964:
+	ldr	r8, .L1979+24
 	orr	r6, r1, r2, lsl #10
 	subs	r3, r3, #1
 	strh	r3, [r4, #4]	@ movhi
-.L1918:
+.L1965:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	movw	r2, #65535
 	ldrh	r0, [r7]
-.L1920:
+.L1967:
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, r0
@@ -13296,31 +13543,31 @@ get_new_active_ppa:
 	add	r1, r3, #8
 	ldrh	r1, [r4, r1, lsl #1]
 	cmp	r1, r2
-	beq	.L1920
+	beq	.L1967
 	strb	r3, [r4, #6]
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1921
+	bne	.L1968
 	ldrb	r1, [r8]	@ zero_extendqisi2
 	ldrh	r3, [r4, #2]
-	cbnz	r1, .L1922
-	ldr	r1, .L1932+28
+	cbnz	r1, .L1969
+	ldr	r1, .L1979+28
 	ldrh	r3, [r1, r3, lsl #1]
 	cmp	r3, r2
-	bne	.L1921
+	bne	.L1968
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L1921
+	cbz	r3, .L1968
 	subs	r3, r3, #1
 	ldrh	r0, [r4]
 	strh	r3, [r4, #4]	@ movhi
 	bl	decrement_vpc_count
-	b	.L1918
-.L1922:
-	ldr	r2, .L1932+32
+	b	.L1965
+.L1969:
+	ldr	r2, .L1979+32
 	ldrh	r2, [r2]
 	cmp	r3, r2
-	bcc	.L1921
-	ldr	r3, .L1932+36
+	bcc	.L1968
+	ldr	r3, .L1979+36
 	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
 	ldr	r2, [r3]
@@ -13332,36 +13579,36 @@ get_new_active_ppa:
 	strh	r3, [r4, #4]	@ movhi
 	strb	r3, [r4, #6]
 	strh	r2, [r4, #2]	@ movhi
-.L1921:
+.L1968:
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5]
 	cmp	r2, r3
-	bne	.L1910
+	bne	.L1957
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L1910
-	ldr	r1, .L1932
-	movw	r2, #3322
-	ldr	r0, .L1932+4
+	cbz	r3, .L1957
+	ldr	r1, .L1979
+	movw	r2, #3353
+	ldr	r0, .L1979+4
 	bl	printf
-	ldr	r1, .L1932+8
-	ldr	r0, .L1932+12
+	ldr	r1, .L1979+8
+	ldr	r0, .L1979+12
 	bl	printf
-.L1910:
+.L1957:
 	mov	r0, r6
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1933:
+.L1980:
 	.align	2
-.L1932:
+.L1979:
 	.word	.LANCHOR208
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LANCHOR53
+	.word	.LANCHOR52
 	.word	.LANCHOR38
-	.word	.LANCHOR8
+	.word	.LANCHOR15
 	.word	.LANCHOR120
-	.word	.LANCHOR54
-	.word	.LANCHOR84
+	.word	.LANCHOR53
+	.word	.LANCHOR83
 	.size	get_new_active_ppa, .-get_new_active_ppa
 	.section	.text.FtlVpcTblFlush,"ax",%progbits
 	.align	1
@@ -13374,16 +13621,16 @@ get_new_active_ppa:
 FtlVpcTblFlush:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L1954
+	ldr	r2, .L2001
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	ldr	r3, [r2]
 	str	r2, [sp, #4]
 	cmp	r3, #0
-	bne	.L1936
-	ldr	r4, .L1954+4
-	ldr	fp, .L1954+108
-	ldr	r8, .L1954+112
-	ldr	r5, .L1954+8
+	bne	.L1983
+	ldr	r4, .L2001+4
+	ldr	fp, .L2001+108
+	ldr	r8, .L2001+112
+	ldr	r5, .L2001+8
 	ldr	r0, [fp]
 	ldr	r6, [r8]
 	ldrh	r2, [r4]
@@ -13391,21 +13638,21 @@ FtlVpcTblFlush:
 	str	r6, [r5, #12]
 	strh	r2, [r6, #2]	@ movhi
 	movw	r2, #61604
-	ldr	r7, .L1954+12
+	ldr	r7, .L2001+12
 	strh	r2, [r6]	@ movhi
 	str	r3, [r6, #12]
-	ldr	ip, .L1954+116
+	ldr	ip, .L2001+116
 	ldr	r2, [r4, #8]
 	str	r3, [r6, #8]
-	ldr	r3, .L1954+16
+	ldr	r3, .L2001+16
 	str	r2, [r6, #4]
 	stm	r7, {r3, ip}
 	ldrh	r3, [r4, #6]
 	strh	r3, [r7, #8]	@ movhi
-	ldr	r3, .L1954+20
+	ldr	r3, .L2001+20
 	ldrh	r3, [r3]
 	strb	r3, [r7, #10]
-	ldr	r3, .L1954+24
+	ldr	r3, .L2001+24
 	ldrh	r2, [r3]
 	ldrh	r1, [r3, #2]
 	strh	r2, [r7, #14]	@ movhi
@@ -13413,7 +13660,7 @@ FtlVpcTblFlush:
 	ldrb	r3, [r3, #8]	@ zero_extendqisi2
 	strb	r3, [r7, #11]
 	orr	r2, r2, r1, lsl #6
-	ldr	r3, .L1954+28
+	ldr	r3, .L2001+28
 	strh	r2, [r7, #16]	@ movhi
 	ldrh	r2, [r3]
 	ldrh	r1, [r3, #2]
@@ -13422,7 +13669,7 @@ FtlVpcTblFlush:
 	ldrb	r3, [r3, #8]	@ zero_extendqisi2
 	strb	r3, [r7, #12]
 	orr	r2, r2, r1, lsl #6
-	ldr	r3, .L1954+32
+	ldr	r3, .L2001+32
 	strh	r2, [r7, #20]	@ movhi
 	ldrh	r2, [r3]
 	strh	r2, [r7, #22]	@ movhi
@@ -13431,33 +13678,33 @@ FtlVpcTblFlush:
 	ldrb	r3, [r3, #8]	@ zero_extendqisi2
 	strb	r3, [r7, #13]
 	orr	r2, r2, r1, lsl #6
-	ldr	r3, .L1954+36
+	ldr	r3, .L2001+36
 	movs	r1, #255
 	strh	r2, [r7, #24]	@ movhi
 	ldr	r3, [r3]
 	str	r3, [r7, #32]
-	ldr	r3, .L1954+40
+	ldr	r3, .L2001+40
 	ldr	r3, [r3]
 	str	r3, [r7, #40]
-	ldr	r3, .L1954+44
+	ldr	r3, .L2001+44
 	ldr	r3, [r3]
 	str	r3, [r7, #36]
-	ldr	r3, .L1954+48
+	ldr	r3, .L2001+48
 	ldrh	r3, [r3]
 	strh	r3, [r7, #44]	@ movhi
-	ldr	r3, .L1954+52
+	ldr	r3, .L2001+52
 	ldrh	r3, [r3]
 	strh	r3, [r7, #46]	@ movhi
-	ldr	r3, .L1954+56
+	ldr	r3, .L2001+56
 	ldrh	r2, [r3]
 	bl	ftl_memset
 	mov	r1, r7
-	ldr	r7, .L1954+60
+	ldr	r7, .L2001+60
 	movs	r2, #48
 	ldr	r0, [r5, #8]
 	bl	ftl_memcpy
 	ldrh	r2, [r7]
-	ldr	r3, .L1954+64
+	ldr	r3, .L2001+64
 	ldr	r0, [r5, #8]
 	ldr	r1, [r3]
 	lsls	r2, r2, #1
@@ -13465,7 +13712,7 @@ FtlVpcTblFlush:
 	bl	ftl_memcpy
 	ldrh	r0, [r7]
 	ldr	r3, [r5, #8]
-	ldr	r1, .L1954+68
+	ldr	r1, .L2001+68
 	lsrs	r2, r0, #3
 	adds	r0, r0, #24
 	lsls	r0, r0, #1
@@ -13474,12 +13721,12 @@ FtlVpcTblFlush:
 	bic	r0, r0, #3
 	add	r0, r0, r3
 	bl	ftl_memcpy
-	ldr	r3, .L1954+72
+	ldr	r3, .L2001+72
 	ldrh	r3, [r3]
-	cbz	r3, .L1937
+	cbz	r3, .L1984
 	ldrh	r0, [r7]
-	ldr	r3, .L1954+76
-	ldr	r1, .L1954+80
+	ldr	r3, .L2001+76
+	ldr	r1, .L2001+80
 	ldrh	r2, [r3]
 	lsrs	r3, r0, #3
 	ldr	r1, [r1]
@@ -13490,12 +13737,12 @@ FtlVpcTblFlush:
 	ubfx	r3, r3, #2, #14
 	add	r0, r0, r3, lsl #2
 	bl	ftl_memcpy
-.L1937:
+.L1984:
 	movs	r7, #0
 	movw	r10, #65535
 	movs	r0, #0
 	bl	FtlUpdateVaildLpn
-.L1938:
+.L1985:
 	ldr	r3, [fp]
 	ldrh	r1, [r4, #2]
 	ldrh	r2, [r4]
@@ -13504,18 +13751,18 @@ FtlVpcTblFlush:
 	str	r3, [r5, #12]
 	orr	r3, r1, r2, lsl #10
 	str	r3, [r5, #4]
-	ldr	r3, .L1954+84
+	ldr	r3, .L2001+84
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r1, r3
-	blt	.L1939
+	blt	.L1986
 	movs	r3, #0
 	ldrh	r10, [r4, #4]
 	strh	r3, [r4, #2]	@ movhi
 	strh	r2, [r4, #4]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L1954+40
-	ldr	r1, .L1954+40
+	ldr	r3, .L2001+40
+	ldr	r1, .L2001+40
 	strh	r0, [r4]	@ movhi
 	ldr	r3, [r3]
 	adds	r2, r3, #1
@@ -13525,9 +13772,9 @@ FtlVpcTblFlush:
 	str	r2, [r5, #4]
 	str	r3, [r6, #4]
 	strh	r0, [r6, #2]	@ movhi
-.L1939:
+.L1986:
 	movs	r3, #1
-	ldr	r0, .L1954+8
+	ldr	r0, .L2001+8
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
@@ -13537,77 +13784,77 @@ FtlVpcTblFlush:
 	uxth	r3, r3
 	adds	r1, r2, #1
 	strh	r3, [r4, #2]	@ movhi
-	bne	.L1940
+	bne	.L1987
 	cmp	r3, #1
-	bne	.L1941
-	ldr	r1, .L1954+88
-	movw	r2, #1209
-	ldr	r0, .L1954+92
+	bne	.L1988
+	ldr	r1, .L2001+88
+	movw	r2, #1217
+	ldr	r0, .L2001+92
 	bl	printf
-	ldr	r1, .L1954+96
-	ldr	r0, .L1954+100
+	ldr	r1, .L2001+96
+	ldr	r0, .L2001+100
 	bl	printf
-.L1941:
+.L1988:
 	ldrh	r3, [r4, #2]
 	adds	r7, r7, #1
 	uxth	r7, r7
 	cmp	r3, #1
 	itttt	eq
-	ldreq	r3, .L1954+84
+	ldreq	r3, .L2001+84
 	ldrheq	r3, [r3]
 	addeq	r3, r3, #-1
 	strheq	r3, [r4, #2]	@ movhi
 	cmp	r7, #3
-	bls	.L1938
+	bls	.L1985
 	mov	r2, r7
 	ldr	r1, [r5, #4]
-	ldr	r0, .L1954+104
+	ldr	r0, .L2001+104
 	bl	printf
 	ldr	r2, [sp, #4]
 	movs	r3, #1
 	str	r3, [r2]
-.L1936:
+.L1983:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1940:
+.L1987:
 	cmp	r3, #1
-	beq	.L1938
+	beq	.L1985
 	cmp	r2, #256
-	beq	.L1938
+	beq	.L1985
 	movw	r3, #65535
 	cmp	r10, r3
-	beq	.L1936
+	beq	.L1983
 	movs	r1, #1
 	mov	r0, r10
 	bl	FtlFreeSysBlkQueueIn
-	b	.L1936
-.L1955:
+	b	.L1983
+.L2002:
 	.align	2
-.L1954:
-	.word	.LANCHOR77
+.L2001:
+	.word	.LANCHOR76
 	.word	.LANCHOR209
 	.word	.LANCHOR202
-	.word	.LANCHOR81
+	.word	.LANCHOR80
 	.word	1179929683
 	.word	.LANCHOR45
+	.word	.LANCHOR91
 	.word	.LANCHOR92
 	.word	.LANCHOR93
-	.word	.LANCHOR94
 	.word	.LANCHOR167
 	.word	.LANCHOR159
 	.word	.LANCHOR160
+	.word	.LANCHOR112
 	.word	.LANCHOR113
-	.word	.LANCHOR114
-	.word	.LANCHOR58
+	.word	.LANCHOR57
 	.word	.LANCHOR40
-	.word	.LANCHOR84
+	.word	.LANCHOR83
 	.word	.LANCHOR0
-	.word	.LANCHOR70
-	.word	.LANCHOR67
+	.word	.LANCHOR69
+	.word	.LANCHOR66
 	.word	.LANCHOR131
-	.word	.LANCHOR54
+	.word	.LANCHOR53
 	.word	.LANCHOR210
 	.word	.LC5
 	.word	.LC6
@@ -13615,7 +13862,7 @@ FtlVpcTblFlush:
 	.word	.LC38
 	.word	.LANCHOR183
 	.word	.LANCHOR188
-	.word	1342177360
+	.word	1342177363
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
 	.section	.text.FtlSuperblockPowerLostFix,"ax",%progbits
 	.align	1
@@ -13628,31 +13875,31 @@ FtlVpcTblFlush:
 FtlSuperblockPowerLostFix:
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1971
+	ldr	r3, .L2018
 	push	{r4, r5, r6, r7, r8, r10, lr}
 	mov	r4, r0
 	sub	sp, sp, #44
 	ldr	r8, [r3]
 	cmp	r8, #0
-	bne	.L1956
-	ldr	r3, .L1971+4
+	bne	.L2003
+	ldr	r3, .L2018+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1967
+	beq	.L2014
 	ldrb	r3, [r0, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1967
+	bne	.L2014
 	ldrh	r6, [r0, #4]
 	mov	r8, r3
-.L1958:
+.L2005:
 	mov	r3, #-1
-	ldr	r2, .L1971+8
+	ldr	r2, .L2018+8
 	str	r3, [sp, #20]
 	movs	r7, #0
-	ldr	r3, .L1971+12
+	ldr	r3, .L2018+12
 	ldr	r5, [r2]
 	mvn	r2, #2
-	ldr	r10, .L1971+24
+	ldr	r10, .L2018+24
 	ldr	r3, [r3]
 	str	r5, [sp, #16]
 	str	r3, [sp, #12]
@@ -13668,38 +13915,38 @@ FtlSuperblockPowerLostFix:
 	add	r2, r2, #1269760
 	addw	r2, r2, #1507
 	str	r2, [r3, #4]
-.L1959:
+.L2006:
 	adds	r6, r6, #-1
-	bcc	.L1962
+	bcc	.L2009
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1960
-.L1962:
-	ldr	r3, .L1971+16
+	cbnz	r3, .L2007
+.L2009:
+	ldr	r3, .L2018+16
 	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
-	ldr	r3, .L1971+20
+	ldr	r3, .L2018+20
 	ldrh	r3, [r3]
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [r4, #6]
 	strh	r3, [r4, #4]	@ movhi
-.L1956:
+.L2003:
 	add	sp, sp, #44
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L1967:
+.L2014:
 	movs	r6, #12
-	b	.L1958
-.L1960:
+	b	.L2005
+.L2007:
 	mov	r0, r4
 	bl	get_new_active_ppa
 	str	r0, [sp, #8]
 	adds	r0, r0, #1
-	beq	.L1962
+	beq	.L2009
 	ldr	r3, [r10]
 	movs	r1, #1
 	add	r0, sp, #4
@@ -13714,16 +13961,16 @@ FtlSuperblockPowerLostFix:
 	bl	FlashProgPages
 	ldrh	r0, [r4]
 	bl	decrement_vpc_count
-	b	.L1959
-.L1972:
+	b	.L2006
+.L2019:
 	.align	2
-.L1971:
-	.word	.LANCHOR77
-	.word	.LANCHOR8
+.L2018:
+	.word	.LANCHOR76
+	.word	.LANCHOR15
 	.word	.LANCHOR188
 	.word	.LANCHOR183
-	.word	.LANCHOR84
-	.word	.LANCHOR53
+	.word	.LANCHOR83
+	.word	.LANCHOR52
 	.word	.LANCHOR160
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
 	.section	.text.FtlLoadFactoryBbt,"ax",%progbits
@@ -13737,36 +13984,36 @@ FtlSuperblockPowerLostFix:
 FtlLoadFactoryBbt:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1983
+	ldr	r3, .L2030
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r6, #0
-	ldr	r5, .L1983+4
+	ldr	r5, .L2030+4
 	ldr	r3, [r3]
-	ldr	r7, .L1983+8
-	ldr	r10, .L1983+20
+	ldr	r7, .L2030+8
+	ldr	r10, .L2030+20
 	str	r3, [r5, #8]
-	ldr	r3, .L1983+12
+	ldr	r3, .L2030+12
 	ldr	r8, [r3]
 	str	r8, [r5, #12]
-.L1974:
-	ldr	r3, .L1983+16
+.L2021:
+	ldr	r3, .L2030+16
 	ldrh	r3, [r3]
 	cmp	r6, r3
-	bcc	.L1979
+	bcc	.L2026
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1979:
+.L2026:
 	ldrh	r4, [r10]
 	movw	r3, #65535
-	ldr	fp, .L1983+4
+	ldr	fp, .L2030+4
 	strh	r3, [r7, #2]!	@ movhi
 	subs	r4, r4, #1
 	uxth	r4, r4
-.L1975:
+.L2022:
 	ldrh	r3, [r10]
 	sub	r2, r3, #15
 	cmp	r2, r4
-	bgt	.L1977
+	bgt	.L2024
 	mla	r3, r6, r3, r4
 	movs	r2, #1
 	mov	r1, r2
@@ -13776,25 +14023,25 @@ FtlLoadFactoryBbt:
 	bl	FlashReadPages
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L1976
+	beq	.L2023
 	ldrh	r2, [r8]
 	movw	r3, #61664
 	cmp	r2, r3
-	bne	.L1976
+	bne	.L2023
 	strh	r4, [r7]	@ movhi
-.L1977:
+.L2024:
 	adds	r6, r6, #1
-	b	.L1974
-.L1976:
+	b	.L2021
+.L2023:
 	subs	r4, r4, #1
 	uxth	r4, r4
-	b	.L1975
-.L1984:
+	b	.L2022
+.L2031:
 	.align	2
-.L1983:
+.L2030:
 	.word	.LANCHOR183
 	.word	.LANCHOR202
-	.word	.LANCHOR75+10
+	.word	.LANCHOR74+10
 	.word	.LANCHOR188
 	.word	.LANCHOR45
 	.word	.LANCHOR51
@@ -13813,12 +14060,12 @@ FtlGetLastWrittenPage:
 	cmp	r1, #1
 	push	{r4, r5, r6, r7, r8, lr}
 	it	eq
-	ldreq	r3, .L1997
+	ldreq	r3, .L2044
 	sub	sp, sp, #104
 	lsl	r7, r0, #10
 	mov	r2, r1
 	it	ne
-	ldrne	r3, .L1997+4
+	ldrne	r3, .L2044+4
 	mov	r8, r1
 	movs	r6, #0
 	movs	r1, #1
@@ -13834,16 +14081,16 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	r3, [sp, #40]
 	adds	r3, r3, #1
-	bne	.L1988
-.L1989:
+	bne	.L2035
+.L2036:
 	cmp	r6, r5
-	ble	.L1992
-.L1988:
+	ble	.L2039
+.L2035:
 	mov	r0, r5
 	add	sp, sp, #104
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1992:
+.L2039:
 	adds	r3, r6, r5
 	mov	r2, r8
 	add	r3, r3, r3, lsr #31
@@ -13856,25 +14103,25 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	r3, [sp, #40]
 	adds	r3, r3, #1
-	bne	.L1990
+	bne	.L2037
 	ldr	r3, [sp, #44]
 	adds	r3, r3, #1
-	bne	.L1990
+	bne	.L2037
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
-	beq	.L1990
+	beq	.L2037
 	subs	r4, r4, #1
 	sxth	r5, r4
-	b	.L1989
-.L1990:
+	b	.L2036
+.L2037:
 	adds	r4, r4, #1
 	sxth	r6, r4
-	b	.L1989
-.L1998:
+	b	.L2036
+.L2045:
 	.align	2
-.L1997:
-	.word	.LANCHOR54
+.L2044:
 	.word	.LANCHOR53
+	.word	.LANCHOR52
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
 	.section	.text.FtlLoadBbt,"ax",%progbits
 	.align	1
@@ -13888,24 +14135,24 @@ FtlLoadBbt:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	ldr	r8, .L2028+48
-	ldr	r4, .L2028
+	ldr	r8, .L2075+48
+	ldr	r4, .L2075
 	ldr	r3, [r8]
-	ldr	r7, .L2028+4
+	ldr	r7, .L2075+4
 	mov	r10, r4
 	str	r3, [r4, #8]
-	ldr	r3, .L2028+8
+	ldr	r3, .L2075+8
 	ldr	r6, [r3]
 	str	r6, [r4, #12]
 	bl	FtlBbtMemInit
 	ldrh	r5, [r7]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L2000:
+.L2047:
 	ldrh	r3, [r7]
 	subs	r3, r3, #47
 	cmp	r3, r5
-	bgt	.L2003
+	bgt	.L2050
 	lsls	r3, r5, #10
 	movs	r2, #1
 	mov	r1, r2
@@ -13914,7 +14161,7 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	bne	.L2001
+	bne	.L2048
 	ldr	r3, [r4, #4]
 	movs	r2, #1
 	mov	r1, r2
@@ -13922,104 +14169,104 @@ FtlLoadBbt:
 	adds	r3, r3, #1
 	str	r3, [r4, #4]
 	bl	FlashReadPages
-.L2001:
+.L2048:
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L2002
+	beq	.L2049
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L2002
-	ldr	r3, .L2028+12
+	bne	.L2049
+	ldr	r3, .L2075+12
 	ldr	r2, [r6, #4]
 	strh	r5, [r3]	@ movhi
 	str	r2, [r3, #8]
 	ldrh	r2, [r6, #8]
 	strh	r2, [r3, #4]	@ movhi
-.L2003:
-	ldr	r5, .L2028+12
+.L2050:
+	ldr	r5, .L2075+12
 	movw	r2, #65535
 	ldrh	r3, [r5]
 	cmp	r3, r2
-	beq	.L2017
+	beq	.L2064
 	ldrh	r3, [r5, #4]
 	cmp	r3, r2
-	beq	.L2007
+	beq	.L2054
 	lsls	r3, r3, #10
 	movs	r2, #1
 	mov	r1, r2
-	ldr	r0, .L2028
+	ldr	r0, .L2075
 	str	r3, [r4, #4]
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L2007
+	beq	.L2054
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L2007
+	bne	.L2054
 	ldr	r3, [r6, #4]
 	ldr	r2, [r5, #8]
 	cmp	r3, r2
-	bls	.L2007
+	bls	.L2054
 	ldrh	r2, [r5, #4]
 	str	r3, [r5, #8]
 	ldrh	r3, [r6, #8]
 	strh	r2, [r5]	@ movhi
 	strh	r3, [r5, #4]	@ movhi
-.L2007:
-	ldr	r10, .L2028
+.L2054:
+	ldr	r10, .L2075
 	movs	r1, #1
 	ldrh	r0, [r5]
 	bl	FtlGetLastWrittenPage
 	sxth	r7, r0
 	adds	r0, r0, #1
 	strh	r0, [r5, #2]	@ movhi
-.L2009:
+.L2056:
 	cmp	r7, #0
-	bge	.L2012
-	ldr	r1, .L2028+16
+	bge	.L2059
+	ldr	r1, .L2075+16
 	movw	r2, #335
-	ldr	r0, .L2028+20
+	ldr	r0, .L2075+20
 	bl	printf
-	ldr	r1, .L2028+24
-	ldr	r0, .L2028+28
+	ldr	r1, .L2075+24
+	ldr	r0, .L2075+28
 	bl	printf
-.L2011:
+.L2058:
 	ldrh	r3, [r6, #10]
 	ldrh	r0, [r6, #12]
 	strh	r3, [r5, #6]	@ movhi
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L2014
-	ldr	r3, .L2028+32
+	beq	.L2061
+	ldr	r3, .L2075+32
 	ldr	r2, [r3]
 	cmp	r0, r2
-	beq	.L2014
-	ldr	r3, .L2028+36
+	beq	.L2061
+	ldr	r3, .L2075+36
 	ldrh	r3, [r3]
 	lsrs	r3, r3, #2
 	cmp	r2, r3
-	bcs	.L2014
+	bcs	.L2061
 	cmp	r0, r3
-	bcs	.L2014
+	bcs	.L2061
 	bl	FtlSysBlkNumInit
-.L2014:
-	ldr	r6, .L2028+40
+.L2061:
+	ldr	r6, .L2075+40
 	movs	r5, #0
-	ldr	r7, .L2028+44
-	ldr	r8, .L2028+52
-.L2015:
+	ldr	r7, .L2075+44
+	ldr	r8, .L2075+52
+.L2062:
 	ldrh	r3, [r7]
 	cmp	r5, r3
-	bcc	.L2016
+	bcc	.L2063
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L2002:
+.L2049:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L2000
-.L2012:
+	b	.L2047
+.L2059:
 	ldrh	r3, [r5]
 	movs	r2, #1
 	mov	r1, r2
@@ -14031,16 +14278,16 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L2010
+	beq	.L2057
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	beq	.L2011
-.L2010:
+	beq	.L2058
+.L2057:
 	subs	r7, r7, #1
 	sxth	r7, r7
-	b	.L2009
-.L2016:
+	b	.L2056
+.L2063:
 	ldrh	r2, [r8]
 	ldr	r1, [r4, #8]
 	ldr	r0, [r6, #4]!
@@ -14048,24 +14295,24 @@ FtlLoadBbt:
 	mla	r1, r5, r2, r1
 	adds	r5, r5, #1
 	bl	ftl_memcpy
-	b	.L2015
-.L2017:
+	b	.L2062
+.L2064:
 	mov	r0, #-1
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L2029:
+.L2076:
 	.align	2
-.L2028:
+.L2075:
 	.word	.LANCHOR202
 	.word	.LANCHOR51
 	.word	.LANCHOR188
-	.word	.LANCHOR75
+	.word	.LANCHOR74
 	.word	.LANCHOR211
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
 	.word	.LANCHOR37
 	.word	.LANCHOR41
-	.word	.LANCHOR75+24
+	.word	.LANCHOR74+24
 	.word	.LANCHOR45
 	.word	.LANCHOR183
 	.word	.LANCHOR123
@@ -14091,13 +14338,13 @@ ftl_map_blk_gc:
 	ldrh	r2, [r4, #8]
 	subs	r3, r3, #4
 	cmp	r2, r3
-	blt	.L2031
+	blt	.L2078
 	uxth	r0, r0
 	ldrh	r8, [r5, r0, lsl #1]
 	cmp	r8, #0
-	beq	.L2031
+	beq	.L2078
 	ldr	r3, [r4, #32]
-	cbnz	r3, .L2031
+	cbnz	r3, .L2078
 	movs	r2, #1
 	str	r2, [r4, #32]
 	strh	r3, [r5, r0, lsl #1]	@ movhi
@@ -14105,35 +14352,35 @@ ftl_map_blk_gc:
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	ldr	r3, .L2043
+	ldr	r3, .L2090
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L2032
+	bcc	.L2079
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L2032:
-	ldr	r5, .L2043+4
+.L2079:
+	ldr	r5, .L2090+4
 	movs	r6, #0
-.L2033:
+.L2080:
 	ldrh	r3, [r4, #6]
 	uxth	r10, r6
 	cmp	r3, r10
-	bhi	.L2039
+	bhi	.L2086
 	movs	r1, #1
 	mov	r0, r8
 	bl	FtlFreeSysBlkQueueIn
 	movs	r3, #0
 	str	r3, [r4, #32]
-.L2031:
-	ldr	r3, .L2043
+.L2078:
+	ldr	r3, .L2090
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L2037
+	bcc	.L2084
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-	b	.L2037
-.L2039:
+	b	.L2084
+.L2086:
 	ldr	r3, [sp]
 	uxth	fp, r6
 	add	r3, r3, fp, lsl #2
@@ -14141,66 +14388,66 @@ ftl_map_blk_gc:
 	ldr	r3, [sp]
 	ldr	r2, [r3, fp, lsl #2]
 	cmp	r8, r2, lsr #10
-	bne	.L2034
-	ldr	r3, .L2043+8
+	bne	.L2081
+	ldr	r3, .L2090+8
 	str	r2, [r5, #4]
 	movs	r2, #1
-	ldr	r0, .L2043+4
+	ldr	r0, .L2090+4
 	ldr	r1, [r3]
 	str	r1, [r5, #8]
-	ldr	r1, .L2043+12
+	ldr	r1, .L2090+12
 	ldr	r7, [r1]
 	mov	r1, r2
 	str	r7, [r5, #12]
 	bl	FlashReadPages
 	ldrh	r2, [r7, #8]
 	cmp	r2, r10
-	beq	.L2035
-	ldr	r1, .L2043+16
+	beq	.L2082
+	ldr	r1, .L2090+16
 	movw	r2, #661
-	ldr	r0, .L2043+20
+	ldr	r0, .L2090+20
 	bl	printf
-	ldr	r1, .L2043+24
-	ldr	r0, .L2043+28
+	ldr	r1, .L2090+24
+	ldr	r0, .L2090+28
 	bl	printf
-.L2035:
+.L2082:
 	ldr	r2, [r5]
 	adds	r2, r2, #1
 	ldrh	r2, [r7, #8]
-	bne	.L2036
-.L2038:
+	bne	.L2083
+.L2085:
 	ldr	r1, [sp, #4]
 	movs	r3, #0
-	ldr	r0, .L2043+32
+	ldr	r0, .L2090+32
 	str	r3, [r1]
 	ldr	r1, [r5, #4]
 	bl	printf
-	ldr	r3, .L2043+36
+	ldr	r3, .L2090+36
 	movs	r2, #1
 	str	r2, [r3]
-.L2037:
+.L2084:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2036:
+.L2083:
 	cmp	r2, r10
-	bne	.L2038
+	bne	.L2085
 	ldrh	r0, [r7]
 	ldrh	r1, [r4, #4]
 	cmp	r0, r1
-	bne	.L2038
+	bne	.L2085
 	ldr	r2, [r5, #8]
 	mov	r1, fp
 	mov	r0, r4
 	bl	FtlMapWritePage
-.L2034:
+.L2081:
 	adds	r6, r6, #1
-	b	.L2033
-.L2044:
+	b	.L2080
+.L2091:
 	.align	2
-.L2043:
-	.word	.LANCHOR54
+.L2090:
+	.word	.LANCHOR53
 	.word	.LANCHOR202
 	.word	.LANCHOR184
 	.word	.LANCHOR188
@@ -14209,7 +14456,7 @@ ftl_map_blk_gc:
 	.word	.LC6
 	.word	.LC7
 	.word	.LC39
-	.word	.LANCHOR77
+	.word	.LANCHOR76
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
 	.section	.text.Ftl_write_map_blk_to_last_page,"ax",%progbits
 	.align	1
@@ -14222,26 +14469,26 @@ ftl_map_blk_gc:
 Ftl_write_map_blk_to_last_page:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2055
-	push	{r4, r5, r6, r7, r8, lr}
+	ldr	r3, .L2106
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	ldr	r5, [r3]
-	cbnz	r5, .L2046
+	cbnz	r5, .L2093
 	ldrh	r3, [r0]
 	movw	r2, #65535
 	ldr	r6, [r0, #12]
 	cmp	r3, r2
-	bne	.L2047
+	bne	.L2094
 	ldrh	r3, [r0, #8]
-	cbz	r3, .L2048
-	ldr	r1, .L2055+4
+	cbz	r3, .L2095
+	ldr	r1, .L2106+4
 	movw	r2, #697
-	ldr	r0, .L2055+8
+	ldr	r0, .L2106+8
 	bl	printf
-	ldr	r1, .L2055+12
-	ldr	r0, .L2055+16
+	ldr	r1, .L2106+12
+	ldr	r0, .L2106+16
 	bl	printf
-.L2048:
+.L2095:
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
@@ -14253,77 +14500,88 @@ Ftl_write_map_blk_to_last_page:
 	ldr	r3, [r4, #28]
 	adds	r3, r3, #1
 	str	r3, [r4, #28]
-.L2046:
+.L2093:
 	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, pc}
-.L2047:
-	ldrh	r6, [r6, r3, lsl #1]
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2094:
+	ldrh	r8, [r6, r3, lsl #1]
 	movs	r1, #255
 	ldrh	r3, [r0, #2]
-	ldr	r2, .L2055+20
-	ldr	r8, .L2055+32
-	ldr	r7, [r0, #24]
-	orr	r3, r3, r6, lsl #10
-	ldr	r0, [r8]
-	str	r3, [r2, #4]
-	ldr	r3, .L2055+24
-	str	r0, [r2, #8]
-	ldr	r3, [r3]
-	str	r3, [r2, #12]
-	ldr	r2, [r4, #28]
-	str	r2, [r3, #4]
-	movw	r2, #64245
-	strh	r2, [r3, #8]	@ movhi
-	ldrh	r2, [r4, #4]
-	strh	r6, [r3, #2]	@ movhi
-	strh	r2, [r3]	@ movhi
-	ldr	r3, .L2055+28
+	ldr	r7, .L2106+20
+	ldr	fp, .L2106+40
+	ldr	r10, [r0, #24]
+	orr	r3, r3, r8, lsl #10
+	ldr	r0, [fp]
+	str	r3, [r7, #4]
+	ldr	r3, .L2106+24
+	str	r0, [r7, #8]
+	ldr	r6, [r3]
+	ldr	r3, [r4, #28]
+	str	r6, [r7, #12]
+	str	r3, [r6, #4]
+	movw	r3, #64245
+	strh	r3, [r6, #8]	@ movhi
+	ldrh	r3, [r4, #4]
+	strh	r8, [r6, #2]	@ movhi
+	strh	r3, [r6]	@ movhi
+	ldr	r3, .L2106+28
 	ldrh	r2, [r3]
 	lsls	r2, r2, #3
 	bl	ftl_memset
 	ldrh	ip, [r4, #6]
 	mov	r3, r5
-	ldr	r1, [r8]
+	ldr	r1, [fp]
 	mov	r2, r5
-.L2049:
+.L2096:
 	uxth	r0, r3
 	cmp	ip, r0
-	bhi	.L2051
+	bhi	.L2098
+	ldr	r3, .L2106+32
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2099
+	ldr	r3, .L2106+36
+	ldr	r0, [r7, #8]
+	ldrh	r1, [r3]
+	bl	js_hash
+	str	r0, [r6, #12]
+.L2099:
 	movs	r2, #1
 	movs	r3, #0
 	mov	r1, r2
-	ldr	r0, .L2055+20
+	ldr	r0, .L2106+20
 	bl	FlashProgPages
 	ldrh	r3, [r4, #2]
 	mov	r0, r4
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	bl	ftl_map_blk_gc
-	b	.L2046
-.L2051:
-	ldr	r0, [r7, r3, lsl #2]
-	cmp	r6, r0, lsr #10
-	bne	.L2050
+	b	.L2093
+.L2098:
+	ldr	r0, [r10, r3, lsl #2]
+	cmp	r8, r0, lsr #10
+	bne	.L2097
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r3, [r1, r2, lsl #3]
 	add	r5, r1, r2, lsl #3
-	ldr	r0, [r7, r3, lsl #2]
+	ldr	r0, [r10, r3, lsl #2]
 	str	r0, [r5, #4]
-.L2050:
+.L2097:
 	adds	r3, r3, #1
-	b	.L2049
-.L2056:
+	b	.L2096
+.L2107:
 	.align	2
-.L2055:
-	.word	.LANCHOR77
+.L2106:
+	.word	.LANCHOR76
 	.word	.LANCHOR213
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
 	.word	.LANCHOR202
 	.word	.LANCHOR188
-	.word	.LANCHOR54
+	.word	.LANCHOR53
+	.word	.LANCHOR1
+	.word	.LANCHOR57
 	.word	.LANCHOR183
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
 	.section	.text.FtlMapWritePage,"ax",%progbits
@@ -14339,13 +14597,12 @@ FtlMapWritePage:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-	ldr	r10, .L2079+40
+	ldr	r10, .L2134+44
 	mov	r8, r1
 	movs	r6, #0
 	str	r2, [sp, #4]
-	mov	fp, r10
-.L2058:
-	ldr	r2, .L2079
+.L2109:
+	ldr	r2, .L2134
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
@@ -14353,143 +14610,155 @@ FtlMapWritePage:
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	bge	.L2059
+	bge	.L2110
 	ldrh	r2, [r4]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L2060
-.L2059:
+	bne	.L2111
+.L2110:
 	mov	r0, r4
 	bl	Ftl_write_map_blk_to_last_page
-.L2060:
-	ldr	r3, .L2079+4
+.L2111:
+	ldr	r3, .L2134+4
 	ldr	r2, [r3]
 	str	r3, [sp, #8]
 	cmp	r2, #0
-	bne	.L2075
+	bne	.L2129
 	ldrh	r2, [r4]
 	ldr	r3, [r4, #12]
 	ldrh	r3, [r3, r2, lsl #1]
-	cbnz	r3, .L2062
-	ldr	r1, .L2079+8
-	movw	r2, #757
-	ldr	r0, .L2079+12
+	cbnz	r3, .L2113
+	ldr	r1, .L2134+8
+	movw	r2, #759
+	ldr	r0, .L2134+12
 	bl	printf
-	ldr	r1, .L2079+16
-	ldr	r0, .L2079+20
+	ldr	r1, .L2134+16
+	ldr	r0, .L2134+20
 	bl	printf
-.L2062:
+.L2113:
 	ldrh	r2, [r4]
 	ldrh	r3, [r4, #10]
 	cmp	r2, r3
-	bcc	.L2063
-	ldr	r1, .L2079+8
-	movw	r2, #758
-	ldr	r0, .L2079+12
+	bcc	.L2114
+	ldr	r1, .L2134+8
+	mov	r2, #760
+	ldr	r0, .L2134+12
 	bl	printf
-	ldr	r1, .L2079+16
-	ldr	r0, .L2079+20
+	ldr	r1, .L2134+16
+	ldr	r0, .L2134+20
 	bl	printf
-.L2063:
+.L2114:
 	ldrh	r2, [r4]
 	movs	r1, #0
 	ldr	r3, [r4, #12]
-	ldr	r5, .L2079+24
+	ldr	r5, .L2134+24
 	ldrh	r7, [r3, r2, lsl #1]
 	movs	r2, #16
 	ldrh	r3, [r4, #2]
+	mov	fp, r5
 	orr	r3, r3, r7, lsl #10
 	str	r3, [r5, #4]
 	ldr	r3, [sp, #4]
 	str	r3, [r5, #8]
-	ldr	r3, .L2079+28
+	ldr	r3, .L2134+28
 	ldr	r0, [r3]
 	str	r0, [r5, #12]
 	bl	ftl_memset
 	ldr	r3, [r5, #12]
-	mov	r0, r5
 	ldr	r2, [r4, #28]
-	strh	r8, [r3, #8]	@ movhi
+	str	r3, [sp, #12]
 	str	r2, [r3, #4]
 	ldrh	r2, [r4, #4]
+	strh	r8, [r3, #8]	@ movhi
 	strh	r7, [r3, #2]	@ movhi
 	strh	r2, [r3]	@ movhi
+	ldr	r2, .L2134+32
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbz	r2, .L2115
+	ldr	r2, .L2134+36
+	ldr	r0, [r5, #8]
+	ldrh	r1, [r2]
+	bl	js_hash
+	ldr	r3, [sp, #12]
+	str	r0, [r3, #12]
+.L2115:
 	movs	r3, #1
+	ldr	r0, .L2134+24
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-	ldrh	r2, [r4, #2]
-	ldr	r1, [r5]
-	adds	r2, r2, #1
-	uxth	r2, r2
-	adds	r3, r1, #1
-	mov	r3, r5
-	strh	r2, [r4, #2]	@ movhi
-	bne	.L2064
+	ldrh	r3, [r4, #2]
+	ldr	r2, [r5]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	adds	r1, r2, #1
+	strh	r3, [r4, #2]	@ movhi
+	bne	.L2116
 	ldr	r1, [r5, #4]
 	adds	r6, r6, #1
-	ldr	r0, .L2079+32
+	ldr	r0, .L2134+40
 	uxth	r6, r6
-	str	r5, [sp, #12]
 	bl	printf
-	ldrh	r2, [r4, #2]
-	ldr	r3, [sp, #12]
-	cmp	r2, #2
-	ittt	ls
-	ldrhls	r2, [fp]
-	addls	r2, r2, #-1
-	strhls	r2, [r4, #2]	@ movhi
+	ldrh	r3, [r4, #2]
+	cmp	r3, #2
+	itttt	ls
+	ldrls	r3, .L2134+44
+	ldrhls	r3, [r3]
+	addls	r3, r3, #-1
+	strhls	r3, [r4, #2]	@ movhi
 	cmp	r6, #3
-	bls	.L2058
+	bls	.L2109
 	mov	r2, r6
-	ldr	r1, [r3, #4]
-	ldr	r0, .L2079+36
+	ldr	r1, [fp, #4]
+	ldr	r0, .L2134+48
 	bl	printf
 	ldr	r2, [sp, #8]
 	movs	r3, #1
 	str	r3, [r2]
-.L2075:
+.L2129:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2064:
-	cbz	r1, .L2067
-	cmp	r2, #1
+.L2116:
+	cbz	r2, .L2119
+	cmp	r3, #1
 	strh	r7, [r4, #40]	@ movhi
-	bne	.L2068
-.L2069:
+	bne	.L2120
+.L2121:
 	movs	r3, #0
 	str	r3, [r4, #36]
-	b	.L2058
-.L2068:
-	cmp	r1, #256
-.L2078:
-	beq	.L2069
-	ldr	r2, [r4, #36]
-	cmp	r2, #0
-	bne	.L2069
-	ldr	r2, [r3, #4]
+	b	.L2109
+.L2120:
+	cmp	r2, #256
+.L2133:
+	beq	.L2121
+	ldr	r3, [r4, #36]
+	cmp	r3, #0
+	bne	.L2121
+	ldr	r2, [fp, #4]
 	ldr	r3, [r4, #24]
 	str	r2, [r3, r8, lsl #2]
-	b	.L2075
-.L2067:
-	cmp	r2, #1
-	b	.L2078
-.L2080:
+	b	.L2129
+.L2119:
+	cmp	r3, #1
+	b	.L2133
+.L2135:
 	.align	2
-.L2079:
+.L2134:
 	.word	.LANCHOR165
-	.word	.LANCHOR77
+	.word	.LANCHOR76
 	.word	.LANCHOR214
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
 	.word	.LANCHOR202
 	.word	.LANCHOR188
+	.word	.LANCHOR1
+	.word	.LANCHOR57
 	.word	.LC40
+	.word	.LANCHOR53
 	.word	.LC41
-	.word	.LANCHOR54
 	.size	FtlMapWritePage, .-FtlMapWritePage
 	.section	.text.flush_l2p_region,"ax",%progbits
 	.align	1
@@ -14504,9 +14773,9 @@ flush_l2p_region:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #12
-	ldr	r5, .L2082
+	ldr	r5, .L2137
 	muls	r4, r0, r4
-	ldr	r0, .L2082+4
+	ldr	r0, .L2137+4
 	ldr	r3, [r5]
 	adds	r2, r3, r4
 	ldrh	r1, [r3, r4]
@@ -14519,10 +14788,10 @@ flush_l2p_region:
 	bic	r3, r3, #-2147483648
 	str	r3, [r4, #4]
 	pop	{r3, r4, r5, pc}
-.L2083:
+.L2138:
 	.align	2
-.L2082:
-	.word	.LANCHOR97
+.L2137:
+	.word	.LANCHOR96
 	.word	.LANCHOR127
 	.size	flush_l2p_region, .-flush_l2p_region
 	.section	.text.l2p_flush,"ax",%progbits
@@ -14538,32 +14807,32 @@ l2p_flush:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
 	movs	r4, #0
-	ldr	r5, .L2088
-	ldr	r6, .L2088+4
-.L2085:
+	ldr	r5, .L2143
+	ldr	r6, .L2143+4
+.L2140:
 	ldrh	r3, [r5]
 	uxth	r0, r4
 	cmp	r3, r0
-	bhi	.L2087
+	bhi	.L2142
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L2087:
+.L2142:
 	ldr	r2, [r6]
 	uxth	r3, r4
 	movs	r1, #12
 	mla	r3, r1, r3, r2
 	ldr	r3, [r3, #4]
 	cmp	r3, #0
-	bge	.L2086
+	bge	.L2141
 	bl	flush_l2p_region
-.L2086:
+.L2141:
 	adds	r4, r4, #1
-	b	.L2085
-.L2089:
+	b	.L2140
+.L2144:
 	.align	2
-.L2088:
-	.word	.LANCHOR68
-	.word	.LANCHOR97
+.L2143:
+	.word	.LANCHOR67
+	.word	.LANCHOR96
 	.size	l2p_flush, .-l2p_flush
 	.section	.text.FtlVendorPartWrite,"ax",%progbits
 	.align	1
@@ -14576,7 +14845,7 @@ l2p_flush:
 FtlVendorPartWrite:
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2102
+	ldr	r3, .L2157
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #56
 	str	r2, [sp]
@@ -14585,26 +14854,26 @@ FtlVendorPartWrite:
 	mov	r5, r1
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L2098
-	ldr	r3, .L2102+4
+	bhi	.L2153
+	ldr	r3, .L2157+4
 	mov	r8, #0
 	ldrh	r6, [r3]
 	lsr	r6, r0, r6
 	lsl	fp, r6, #2
-.L2092:
-	cbnz	r5, .L2097
-.L2090:
+.L2147:
+	cbnz	r5, .L2152
+.L2145:
 	mov	r0, r8
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2097:
-	ldr	r3, .L2102+8
+.L2152:
+	ldr	r3, .L2157+8
 	mov	r0, r7
-	ldr	r10, .L2102+24
+	ldr	r10, .L2157+24
 	ldr	r3, [r3]
 	ldr	r2, [r3, fp]
-	ldr	r3, .L2102+12
+	ldr	r3, .L2157+12
 	str	r2, [sp, #12]
 	ldrh	r3, [r3]
 	mov	r1, r3
@@ -14618,9 +14887,9 @@ FtlVendorPartWrite:
 	cmp	r5, r4
 	it	cc
 	uxthcc	r4, r5
-	cbz	r2, .L2094
+	cbz	r2, .L2149
 	cmp	r4, r3
-	beq	.L2094
+	beq	.L2149
 	ldr	r3, [r10]
 	add	r0, sp, #20
 	str	r2, [sp, #24]
@@ -14630,7 +14899,7 @@ FtlVendorPartWrite:
 	movs	r3, #0
 	str	r3, [sp, #32]
 	bl	FlashReadPages
-.L2095:
+.L2150:
 	lsls	r3, r4, #9
 	ldr	r0, [r10]
 	subs	r5, r5, r4
@@ -14643,7 +14912,7 @@ FtlVendorPartWrite:
 	bl	ftl_memcpy
 	ldr	r2, [r10]
 	mov	r1, r6
-	ldr	r0, .L2102+16
+	ldr	r0, .L2157+16
 	adds	r6, r6, #1
 	bl	FtlMapWritePage
 	ldr	r3, [sp]
@@ -14654,26 +14923,26 @@ FtlVendorPartWrite:
 	ldr	r3, [sp, #8]
 	add	r2, r2, r3
 	str	r2, [sp]
-	b	.L2092
-.L2094:
-	ldr	r3, .L2102+20
+	b	.L2147
+.L2149:
+	ldr	r3, .L2157+20
 	movs	r1, #0
 	ldr	r0, [r10]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-	b	.L2095
-.L2098:
+	b	.L2150
+.L2153:
 	mov	r8, #-1
-	b	.L2090
-.L2103:
+	b	.L2145
+.L2158:
 	.align	2
-.L2102:
+.L2157:
 	.word	.LANCHOR50
-	.word	.LANCHOR57
-	.word	.LANCHOR194
 	.word	.LANCHOR56
+	.word	.LANCHOR194
+	.word	.LANCHOR55
 	.word	.LANCHOR215
-	.word	.LANCHOR58
+	.word	.LANCHOR57
 	.word	.LANCHOR185
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.section	.text.Ftl_save_ext_data,"ax",%progbits
@@ -14688,66 +14957,66 @@ Ftl_save_ext_data:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L2106
-	ldr	r3, .L2106+4
+	ldr	r2, .L2161
+	ldr	r3, .L2161+4
 	ldr	r1, [r2]
 	cmp	r1, r3
-	bne	.L2104
-	ldr	r3, .L2106+8
+	bne	.L2159
+	ldr	r3, .L2161+8
 	movs	r1, #1
 	movs	r0, #0
 	str	r3, [r2, #4]
-	ldr	r3, .L2106+12
+	ldr	r3, .L2161+12
 	ldr	r3, [r3]
 	str	r3, [r2, #88]
-	ldr	r3, .L2106+16
+	ldr	r3, .L2161+16
 	ldr	r3, [r3]
 	str	r3, [r2, #92]
-	ldr	r3, .L2106+20
+	ldr	r3, .L2161+20
 	ldr	r3, [r3]
 	str	r3, [r2, #8]
-	ldr	r3, .L2106+24
+	ldr	r3, .L2161+24
 	ldr	r3, [r3]
 	str	r3, [r2, #12]
-	ldr	r3, .L2106+28
+	ldr	r3, .L2161+28
 	ldr	r3, [r3]
 	str	r3, [r2, #16]
-	ldr	r3, .L2106+32
+	ldr	r3, .L2161+32
 	ldr	r3, [r3]
 	str	r3, [r2, #20]
-	ldr	r3, .L2106+36
+	ldr	r3, .L2161+36
 	ldr	r3, [r3]
 	str	r3, [r2, #28]
-	ldr	r3, .L2106+40
+	ldr	r3, .L2161+40
 	ldr	r3, [r3]
 	str	r3, [r2, #32]
-	ldr	r3, .L2106+44
+	ldr	r3, .L2161+44
 	ldr	r3, [r3]
 	str	r3, [r2, #36]
-	ldr	r3, .L2106+48
+	ldr	r3, .L2161+48
 	ldr	r3, [r3]
 	str	r3, [r2, #40]
-	ldr	r3, .L2106+52
+	ldr	r3, .L2161+52
 	ldr	r3, [r3]
 	str	r3, [r2, #44]
-	ldr	r3, .L2106+56
+	ldr	r3, .L2161+56
 	ldr	r3, [r3]
 	str	r3, [r2, #48]
-	ldr	r3, .L2106+60
+	ldr	r3, .L2161+60
 	ldr	r3, [r3]
 	str	r3, [r2, #60]
-	ldr	r3, .L2106+64
+	ldr	r3, .L2161+64
 	ldr	r3, [r3]
 	str	r3, [r2, #64]
 	b	FtlVendorPartWrite
-.L2104:
+.L2159:
 	bx	lr
-.L2107:
+.L2162:
 	.align	2
-.L2106:
+.L2161:
 	.word	.LANCHOR138
 	.word	1179929683
-	.word	1342177360
+	.word	1342177363
 	.word	.LANCHOR216
 	.word	.LANCHOR217
 	.word	.LANCHOR161
@@ -14755,7 +15024,7 @@ Ftl_save_ext_data:
 	.word	.LANCHOR166
 	.word	.LANCHOR165
 	.word	.LANCHOR168
-	.word	.LANCHOR80
+	.word	.LANCHOR79
 	.word	.LANCHOR163
 	.word	.LANCHOR164
 	.word	.LANCHOR169
@@ -14775,40 +15044,40 @@ FtlEctTblFlush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L2115
+	ldr	r3, .L2170
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L2113
-	ldr	r3, .L2115+4
+	beq	.L2168
+	ldr	r3, .L2170+4
 	ldr	r3, [r3]
 	cmp	r3, #39
 	ite	hi
 	movhi	r3, #32
 	movls	r3, #4
-.L2109:
-	ldr	r1, .L2115+8
+.L2164:
+	ldr	r1, .L2170+8
 	ldrh	r2, [r1]
 	cmp	r2, #31
 	ittt	ls
 	addls	r2, r2, #1
 	movls	r3, #1
 	strhls	r2, [r1]	@ movhi
-	ldr	r2, .L2115+12
-	cbnz	r0, .L2111
+	ldr	r2, .L2170+12
+	cbnz	r0, .L2166
 	ldr	r1, [r2]
 	ldr	r0, [r1, #20]
 	ldr	r1, [r1, #16]
 	add	r3, r3, r0
 	cmp	r1, r3
-	bcc	.L2112
-.L2111:
+	bcc	.L2167
+.L2166:
 	ldr	r2, [r2]
 	movs	r0, #64
 	ldr	r3, [r2, #16]
 	str	r3, [r2, #20]
-	ldr	r3, .L2115+16
+	ldr	r3, .L2170+16
 	str	r3, [r2]
-	ldr	r3, .L2115+20
+	ldr	r3, .L2170+20
 	ldrh	r1, [r3]
 	lsls	r3, r1, #9
 	str	r3, [r2, #12]
@@ -14819,15 +15088,15 @@ FtlEctTblFlush:
 	str	r3, [r2, #4]
 	bl	FtlVendorPartWrite
 	bl	Ftl_save_ext_data
-.L2112:
+.L2167:
 	movs	r0, #0
 	pop	{r3, pc}
-.L2113:
+.L2168:
 	movs	r3, #32
-	b	.L2109
-.L2116:
+	b	.L2164
+.L2171:
 	.align	2
-.L2115:
+.L2170:
 	.word	.LANCHOR28
 	.word	.LANCHOR170
 	.word	.LANCHOR218
@@ -14846,120 +15115,120 @@ FtlEctTblFlush:
 allocate_new_data_superblock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2144
+	ldr	r3, .L2199
 	push	{r4, r5, r6, lr}
 	mov	r4, r0
 	ldrh	r5, [r0]
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	bcs	.L2118
-	ldr	r1, .L2144+4
-	movw	r2, #3233
-	ldr	r0, .L2144+8
+	bcs	.L2173
+	ldr	r1, .L2199+4
+	mov	r2, #3264
+	ldr	r0, .L2199+8
 	bl	printf
-	ldr	r1, .L2144+12
-	ldr	r0, .L2144+16
+	ldr	r1, .L2199+12
+	ldr	r0, .L2199+16
 	bl	printf
-.L2118:
-	ldr	r3, .L2144+20
+.L2173:
+	ldr	r3, .L2199+20
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L2119
+	bne	.L2174
 	movw	r3, #65535
 	cmp	r5, r3
-	beq	.L2120
-	ldr	r3, .L2144+24
+	beq	.L2175
+	ldr	r3, .L2199+24
 	mov	r0, r5
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r5, lsl #1]
-	cbz	r3, .L2121
+	cbz	r3, .L2176
 	bl	INSERT_DATA_LIST
-.L2120:
+.L2175:
 	movs	r3, #0
 	strb	r3, [r4, #8]
-	ldr	r3, .L2144+28
+	ldr	r3, .L2199+28
 	cmp	r4, r3
-	beq	.L2122
-	ldr	r3, .L2144+32
+	beq	.L2177
+	ldr	r3, .L2199+32
 	ldrh	r2, [r3]
 	cmp	r2, #1
-	beq	.L2122
-	ldr	r3, .L2144+36
+	beq	.L2177
+	ldr	r3, .L2199+36
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2123
-.L2122:
+	cbz	r3, .L2178
+.L2177:
 	movs	r3, #1
 	strb	r3, [r4, #8]
-.L2124:
-	ldr	r6, .L2144+40
+.L2179:
+	ldr	r6, .L2199+40
 	movw	r2, #65535
 	ldrh	r0, [r6]
 	cmp	r0, r2
-	beq	.L2129
+	beq	.L2184
 	cmp	r5, r0
-	bne	.L2130
-	ldr	r3, .L2144+24
+	bne	.L2185
+	ldr	r3, .L2199+24
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L2131
-.L2130:
+	cbz	r3, .L2186
+.L2185:
 	bl	update_vpc_list
-.L2131:
+.L2186:
 	movw	r3, #65535
 	strh	r3, [r6]	@ movhi
-.L2129:
+.L2184:
 	mov	r0, r4
 	bl	allocate_data_superblock
 	bl	l2p_flush
 	movs	r0, #0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L2119:
+.L2174:
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L2121:
+.L2176:
 	bl	INSERT_FREE_LIST
-	b	.L2120
-.L2123:
-	ldr	r3, .L2144+44
+	b	.L2175
+.L2178:
+	ldr	r3, .L2199+44
 	cmp	r4, r3
-	bne	.L2124
+	bne	.L2179
 	cmp	r2, #3
-	beq	.L2126
-	ldr	r2, .L2144+48
+	beq	.L2181
+	ldr	r2, .L2199+48
 	ldr	r2, [r2]
 	cmp	r2, #1
-	bne	.L2127
-.L2126:
+	bne	.L2182
+.L2181:
 	movs	r2, #1
 	strb	r2, [r3, #8]
-.L2127:
-	ldr	r2, .L2144+52
+.L2182:
+	ldr	r2, .L2199+52
 	ldr	r2, [r2]
 	cmp	r2, #0
-	beq	.L2124
-	ldr	r2, .L2144+56
+	beq	.L2179
+	ldr	r2, .L2199+56
 	ldr	r2, [r2]
 	cmp	r2, #39
 	itt	ls
 	movls	r2, #1
 	strbls	r2, [r3, #8]
-	b	.L2124
-.L2145:
+	b	.L2179
+.L2200:
 	.align	2
-.L2144:
+.L2199:
 	.word	.LANCHOR40
 	.word	.LANCHOR219
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LANCHOR77
-	.word	.LANCHOR84
-	.word	.LANCHOR93
+	.word	.LANCHOR76
+	.word	.LANCHOR83
+	.word	.LANCHOR92
 	.word	.LANCHOR44
-	.word	.LANCHOR8
+	.word	.LANCHOR15
 	.word	.LANCHOR133
-	.word	.LANCHOR92
+	.word	.LANCHOR91
 	.word	.LANCHOR158
 	.word	.LANCHOR28
 	.word	.LANCHOR170
@@ -14975,7 +15244,7 @@ allocate_new_data_superblock:
 FtlVendorPartRead:
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2156
+	ldr	r3, .L2211
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, r2
 	adds	r2, r0, r1
@@ -14984,28 +15253,28 @@ FtlVendorPartRead:
 	mov	r6, r1
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L2155
-	ldr	r3, .L2156+4
+	bhi	.L2210
+	ldr	r3, .L2211+4
 	mov	r8, #0
-	ldr	fp, .L2156+28
+	ldr	fp, .L2211+28
 	ldrh	r5, [r3]
 	lsr	r5, r0, r5
 	lsls	r3, r5, #2
 	str	r3, [sp]
-.L2148:
-	cbnz	r6, .L2154
-.L2146:
+.L2203:
+	cbnz	r6, .L2209
+.L2201:
 	mov	r0, r8
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2154:
-	ldr	r3, .L2156+8
+.L2209:
+	ldr	r3, .L2211+8
 	mov	r0, r7
 	ldr	r2, [sp]
 	ldr	r3, [r3]
 	ldr	r3, [r3, r2]
-	ldr	r2, .L2156+12
+	ldr	r2, .L2211+12
 	str	r3, [sp, #8]
 	ldrh	r4, [r2]
 	mov	r1, r4
@@ -15020,7 +15289,7 @@ FtlVendorPartRead:
 	lsls	r2, r4, #9
 	str	r2, [sp, #8]
 	cmp	r3, #0
-	beq	.L2150
+	beq	.L2205
 	ldr	r2, [fp]
 	add	r0, sp, #20
 	str	r3, [sp, #24]
@@ -15034,28 +15303,28 @@ FtlVendorPartRead:
 	ldr	r2, [sp, #20]
 	ldr	r3, [sp, #12]
 	adds	r2, r2, #1
-	ldr	r2, .L2156+16
+	ldr	r2, .L2211+16
 	it	eq
 	moveq	r8, #-1
 	ldr	r2, [r2]
 	cmp	r2, #256
-	bne	.L2152
+	bne	.L2207
 	mov	r2, r3
 	mov	r1, r5
-	ldr	r0, .L2156+20
+	ldr	r0, .L2211+20
 	bl	printf
 	ldr	r2, [fp]
 	mov	r1, r5
-	ldr	r0, .L2156+24
+	ldr	r0, .L2211+24
 	bl	FtlMapWritePage
-.L2152:
+.L2207:
 	ldr	r1, [fp]
 	lsls	r2, r4, #9
 	ldr	r3, [sp, #4]
 	mov	r0, r10
 	add	r1, r1, r3, lsl #9
 	bl	ftl_memcpy
-.L2153:
+.L2208:
 	ldr	r3, [sp, #8]
 	adds	r5, r5, #1
 	subs	r6, r6, r4
@@ -15064,23 +15333,23 @@ FtlVendorPartRead:
 	ldr	r3, [sp]
 	adds	r3, r3, #4
 	str	r3, [sp]
-	b	.L2148
-.L2150:
+	b	.L2203
+.L2205:
 	lsls	r2, r4, #9
 	mov	r1, r3
 	mov	r0, r10
 	bl	ftl_memset
-	b	.L2153
-.L2155:
+	b	.L2208
+.L2210:
 	mov	r8, #-1
-	b	.L2146
-.L2157:
+	b	.L2201
+.L2212:
 	.align	2
-.L2156:
+.L2211:
 	.word	.LANCHOR50
-	.word	.LANCHOR57
-	.word	.LANCHOR194
 	.word	.LANCHOR56
+	.word	.LANCHOR194
+	.word	.LANCHOR55
 	.word	.LANCHOR202
 	.word	.LC42
 	.word	.LANCHOR215
@@ -15099,30 +15368,30 @@ FtlLoadEctTbl:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r0, #64
-	ldr	r4, .L2160
-	ldr	r5, .L2160+4
+	ldr	r4, .L2215
+	ldr	r5, .L2215+4
 	ldr	r2, [r4]
 	ldrh	r1, [r5]
 	bl	FtlVendorPartRead
 	ldr	r3, [r4]
 	ldr	r2, [r3]
-	ldr	r3, .L2160+8
+	ldr	r3, .L2215+8
 	cmp	r2, r3
-	beq	.L2159
-	ldr	r1, .L2160+12
-	ldr	r0, .L2160+16
+	beq	.L2214
+	ldr	r1, .L2215+12
+	ldr	r0, .L2215+16
 	bl	printf
 	ldrh	r2, [r5]
 	movs	r1, #0
 	ldr	r0, [r4]
 	lsls	r2, r2, #9
 	bl	ftl_memset
-.L2159:
+.L2214:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L2161:
+.L2216:
 	.align	2
-.L2160:
+.L2215:
 	.word	.LANCHOR191
 	.word	.LANCHOR190
 	.word	1112818501
@@ -15142,92 +15411,92 @@ Ftl_load_ext_data:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r1, #1
-	ldr	r4, .L2166
+	ldr	r4, .L2221
 	movs	r0, #0
-	ldr	r5, .L2166+4
+	ldr	r5, .L2221+4
 	mov	r2, r4
 	bl	FtlVendorPartRead
 	ldr	r3, [r4]
 	cmp	r3, r5
-	beq	.L2163
+	beq	.L2218
 	mov	r2, #512
 	movs	r1, #0
 	mov	r0, r4
 	bl	ftl_memset
 	str	r5, [r4]
-.L2163:
+.L2218:
 	ldr	r3, [r4]
 	cmp	r3, r5
-	ldr	r5, .L2166+8
-	bne	.L2164
+	ldr	r5, .L2221+8
+	bne	.L2219
 	ldr	r2, [r4, #88]
-	ldr	r3, .L2166+12
+	ldr	r3, .L2221+12
 	str	r2, [r3]
 	ldr	r2, [r4, #92]
-	ldr	r3, .L2166+16
+	ldr	r3, .L2221+16
 	str	r2, [r3]
 	ldr	r2, [r4, #8]
-	ldr	r3, .L2166+20
+	ldr	r3, .L2221+20
 	str	r2, [r3]
 	ldr	r2, [r4, #12]
-	ldr	r3, .L2166+24
+	ldr	r3, .L2221+24
 	str	r2, [r3]
 	ldr	r2, [r4, #16]
-	ldr	r3, .L2166+28
+	ldr	r3, .L2221+28
 	str	r2, [r3]
 	ldr	r2, [r4, #20]
-	ldr	r3, .L2166+32
+	ldr	r3, .L2221+32
 	str	r2, [r3]
 	ldr	r3, [r4, #28]
 	ldr	r2, [r4, #32]
 	str	r3, [r5]
-	ldr	r3, .L2166+36
+	ldr	r3, .L2221+36
 	str	r2, [r3]
 	ldr	r2, [r4, #36]
-	ldr	r3, .L2166+40
+	ldr	r3, .L2221+40
 	str	r2, [r3]
 	ldr	r2, [r4, #40]
-	ldr	r3, .L2166+44
+	ldr	r3, .L2221+44
 	str	r2, [r3]
 	ldr	r2, [r4, #44]
-	ldr	r3, .L2166+48
+	ldr	r3, .L2221+48
 	str	r2, [r3]
 	ldr	r2, [r4, #48]
-	ldr	r3, .L2166+52
+	ldr	r3, .L2221+52
 	str	r2, [r3]
 	ldr	r2, [r4, #60]
-	ldr	r3, .L2166+56
+	ldr	r3, .L2221+56
 	str	r2, [r3]
-.L2164:
-	ldr	r3, .L2166+60
+.L2219:
+	ldr	r3, .L2221+60
 	movs	r2, #0
 	str	r2, [r3]
 	ldr	r2, [r4, #68]
-	ldr	r3, .L2166+64
+	ldr	r3, .L2221+64
 	cmp	r2, r3
-	bne	.L2165
-	ldr	r3, .L2166+68
+	bne	.L2220
+	ldr	r3, .L2221+68
 	movs	r2, #1
-	ldr	r1, .L2166+72
-	ldr	r0, .L2166+76
+	ldr	r1, .L2221+72
+	ldr	r0, .L2221+76
 	str	r2, [r3]
 	bl	printf
-.L2165:
-	ldr	r3, .L2166+80
-	ldr	r1, .L2166+84
+.L2220:
+	ldr	r3, .L2221+80
+	ldr	r1, .L2221+84
 	ldrh	r2, [r3]
-	ldr	r3, .L2166+88
+	ldr	r3, .L2221+88
 	ldrh	r1, [r1]
 	ldr	r0, [r3]
 	ldr	r3, [r5]
 	mla	r0, r0, r2, r3
 	bl	__aeabi_uidiv
-	ldr	r3, .L2166+92
+	ldr	r3, .L2221+92
 	str	r0, [r3]
 	pop	{r3, r4, r5, pc}
-.L2167:
+.L2222:
 	.align	2
-.L2166:
+.L2221:
 	.word	.LANCHOR138
 	.word	1179929683
 	.word	.LANCHOR168
@@ -15237,7 +15506,7 @@ Ftl_load_ext_data:
 	.word	.LANCHOR162
 	.word	.LANCHOR166
 	.word	.LANCHOR165
-	.word	.LANCHOR80
+	.word	.LANCHOR79
 	.word	.LANCHOR163
 	.word	.LANCHOR164
 	.word	.LANCHOR169
@@ -15298,34 +15567,34 @@ FtlMapBlkWriteDumpData:
 	mov	r4, r0
 	ldr	r3, [r0, #36]
 	cmp	r3, #0
-	beq	.L2170
+	beq	.L2225
 	movs	r3, #0
 	ldrh	r6, [r0, #6]
 	str	r3, [r0, #36]
-	ldr	r3, .L2184
+	ldr	r3, .L2239
 	ldr	r10, [r0, #24]
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L2170
-	ldr	r3, .L2184+4
-	ldr	r5, .L2184+8
+	bne	.L2225
+	ldr	r3, .L2239+4
+	ldr	r5, .L2239+8
 	ldr	r3, [r3]
 	mov	r7, r5
 	str	r3, [r5, #8]
-	ldr	r3, .L2184+12
+	ldr	r3, .L2239+12
 	ldr	r8, [r3]
 	ldrh	r3, [r0, #2]
 	str	r8, [r5, #12]
-	cbz	r3, .L2174
-	ldr	r2, .L2184+16
+	cbz	r3, .L2229
+	ldr	r2, .L2239+16
 	ldrh	r2, [r2]
 	subs	r2, r2, #1
 	cmp	r3, r2
-	bge	.L2174
+	bge	.L2229
 	ldrh	r2, [r0]
 	movw	r1, #65535
 	cmp	r2, r1
-	beq	.L2174
+	beq	.L2229
 	ldr	r1, [r0, #12]
 	subs	r3, r3, #1
 	mov	r0, r5
@@ -15337,50 +15606,50 @@ FtlMapBlkWriteDumpData:
 	bl	FlashReadPages
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L2174
+	beq	.L2229
 	ldr	r3, [r4, #24]
 	ldrh	r1, [r8, #8]
 	ldr	r2, [r3, r1, lsl #2]
 	ldr	r3, [r5, #4]
 	cmp	r2, r3
-	bne	.L2174
+	bne	.L2229
 	ldr	r2, [r5, #8]
-.L2183:
+.L2238:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
 	b	FtlMapWritePage
-.L2174:
+.L2229:
 	subs	r6, r6, #1
 	uxth	r6, r6
 	ldr	r3, [r10, r6, lsl #2]
 	str	r3, [r7, #4]
-	cbz	r3, .L2175
+	cbz	r3, .L2230
 	movs	r2, #1
-	ldr	r0, .L2184+8
+	ldr	r0, .L2239+8
 	mov	r1, r2
 	bl	FlashReadPages
-.L2176:
+.L2231:
 	ldr	r2, [r7, #8]
 	mov	r1, r6
-	b	.L2183
-.L2175:
-	ldr	r3, .L2184+20
+	b	.L2238
+.L2230:
+	ldr	r3, .L2239+20
 	movs	r1, #255
 	ldr	r0, [r7, #8]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-	b	.L2176
-.L2170:
+	b	.L2231
+.L2225:
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L2185:
+.L2240:
 	.align	2
-.L2184:
-	.word	.LANCHOR77
+.L2239:
+	.word	.LANCHOR76
 	.word	.LANCHOR184
 	.word	.LANCHOR202
 	.word	.LANCHOR188
-	.word	.LANCHOR54
-	.word	.LANCHOR58
+	.word	.LANCHOR53
+	.word	.LANCHOR57
 	.size	FtlMapBlkWriteDumpData, .-FtlMapBlkWriteDumpData
 	.section	.text.FtlScanSysBlk,"ax",%progbits
 	.align	1
@@ -15395,69 +15664,69 @@ FtlScanSysBlk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r5, .L2268
+	ldr	r5, .L2323
 	sub	sp, sp, #32
 	mov	r1, r4
-	ldr	r3, .L2268+4
+	ldr	r3, .L2323+4
 	ldr	r2, [r5]
-	ldr	r6, .L2268+8
+	ldr	r6, .L2323+8
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L2268+12
+	ldr	r3, .L2323+12
 	lsls	r2, r2, #2
 	strh	r4, [r6]	@ movhi
-	ldr	r7, .L2268+16
+	ldr	r7, .L2323+16
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldr	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L2268+20
+	ldr	r3, .L2323+20
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r7]
 	mov	r1, r4
-	ldr	r3, .L2268+24
+	ldr	r3, .L2323+24
 	lsls	r2, r2, #2
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r7]
 	mov	r1, r4
-	ldr	r3, .L2268+28
+	ldr	r3, .L2323+28
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
-	movs	r2, #12
+	movs	r2, #16
 	movs	r1, #255
-	ldr	r0, .L2268+32
+	ldr	r0, .L2323+32
 	bl	ftl_memset
-	ldr	r3, .L2268+36
+	ldr	r3, .L2323+36
 	str	r6, [sp, #12]
 	str	r5, [sp, #16]
 	ldrh	r3, [r3]
 	str	r3, [sp, #4]
-.L2187:
-	ldr	r3, .L2268+40
+.L2242:
+	ldr	r3, .L2323+40
 	ldr	r2, [sp, #4]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bls	.L2229
-	ldr	r3, .L2268+44
+	bls	.L2284
+	ldr	r3, .L2323+44
 	movs	r5, #0
-	ldr	r1, .L2268+48
+	ldr	r1, .L2323+48
 	mov	fp, r5
 	movs	r7, #36
 	ldrh	r8, [r3]
-	ldr	r3, .L2268+52
+	ldr	r3, .L2323+52
 	ldr	r2, [r1]
-	ldr	r1, .L2268+56
+	ldr	r1, .L2323+56
 	ldr	r6, [r3]
-	ldr	r3, .L2268+60
+	ldr	r3, .L2323+60
 	str	r2, [sp, #8]
 	ldrh	r10, [r1]
 	ldr	r3, [r3]
-	ldr	r2, .L2268+64
-	b	.L2230
-.L2189:
+	ldr	r2, .L2323+64
+	b	.L2285
+.L2244:
 	ldrb	r0, [r2, r5]	@ zero_extendqisi2
 	ldr	r1, [sp, #4]
 	str	r3, [sp, #28]
@@ -15467,7 +15736,7 @@ FtlScanSysBlk:
 	bl	FtlBbmIsBadBlock
 	ldr	r2, [sp, #24]
 	ldr	r3, [sp, #28]
-	cbnz	r0, .L2188
+	cbnz	r0, .L2243
 	ldr	r1, [sp, #20]
 	mla	r0, r7, fp, r6
 	ldr	r4, [sp, #8]
@@ -15480,31 +15749,31 @@ FtlScanSysBlk:
 	str	r1, [r0, #12]
 	add	r1, fp, #1
 	uxth	fp, r1
-.L2188:
+.L2243:
 	adds	r5, r5, #1
-.L2230:
+.L2285:
 	uxth	r1, r5
 	cmp	r8, r1
-	bhi	.L2189
+	bhi	.L2244
 	cmp	fp, #0
-	bne	.L2190
-.L2228:
+	bne	.L2245
+.L2283:
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	str	r3, [sp, #4]
-	b	.L2187
-.L2190:
+	b	.L2242
+.L2245:
 	movs	r7, #0
 	movs	r2, #1
 	mov	r1, fp
 	mov	r0, r6
 	bl	FlashReadPages
-.L2191:
+.L2246:
 	uxth	r3, r7
 	cmp	fp, r3
-	bls	.L2228
-	ldr	r3, .L2268+52
+	bls	.L2283
+	ldr	r3, .L2323+52
 	mov	r8, #36
 	mul	r8, r8, r7
 	ldr	r3, [r3]
@@ -15514,10 +15783,10 @@ FtlScanSysBlk:
 	ldr	r6, [r2, #12]
 	adds	r3, r3, #1
 	ubfx	r5, r5, #10, #16
-	bne	.L2194
+	bne	.L2249
 	mov	r10, #16
-.L2196:
-	ldr	r3, .L2268+52
+.L2251:
+	ldr	r3, .L2323+52
 	movs	r2, #1
 	mov	r1, r2
 	ldr	r0, [r3]
@@ -15529,88 +15798,88 @@ FtlScanSysBlk:
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	ldr	r3, .L2268+52
+	ldr	r3, .L2323+52
 	ldr	r3, [r3]
-	bne	.L2193
+	bne	.L2248
 	mov	r2, #-1
 	str	r2, [r3, r8]
-	ldr	r3, .L2268+52
+	ldr	r3, .L2323+52
 	ldr	r3, [r3]
 	ldr	r3, [r3, r8]
 	cmp	r3, r2
-	beq	.L2195
-.L2194:
-	ldr	r3, .L2268+68
+	beq	.L2250
+.L2249:
+	ldr	r3, .L2323+68
 	ldr	r2, [r3]
 	ldr	r3, [r6, #4]
 	adds	r1, r2, #1
-	beq	.L2197
+	beq	.L2252
 	cmp	r2, r3
-	bhi	.L2198
-.L2197:
+	bhi	.L2253
+.L2252:
 	adds	r2, r3, #1
 	ittt	ne
-	ldrne	r1, .L2268+68
+	ldrne	r1, .L2323+68
 	addne	r2, r3, #1
 	strne	r2, [r1]
-.L2198:
+.L2253:
 	ldrh	r2, [r6]
 	movw	r1, #61604
 	cmp	r2, r1
-	beq	.L2200
-	bhi	.L2201
+	beq	.L2255
+	bhi	.L2256
 	movw	r3, #61574
 	cmp	r2, r3
-	beq	.L2202
-.L2199:
+	beq	.L2257
+.L2254:
 	adds	r7, r7, #1
-	b	.L2191
-.L2193:
+	b	.L2246
+.L2248:
 	ldr	r3, [r3, r8]
 	adds	r3, r3, #1
-	bne	.L2194
+	bne	.L2249
 	add	r10, r10, #-1
 	uxth	r10, r10
 	cmp	r10, #0
-	bne	.L2196
-.L2195:
-	ldr	r3, .L2268+72
+	bne	.L2251
+.L2250:
+	ldr	r3, .L2323+72
 	ldrb	r1, [r3]	@ zero_extendqisi2
-	cbnz	r1, .L2267
-.L2226:
+	cbnz	r1, .L2322
+.L2281:
 	mov	r0, r5
 	bl	FtlFreeSysBlkQueueIn
-	b	.L2199
-.L2201:
+	b	.L2254
+.L2256:
 	movw	r3, #61634
 	cmp	r2, r3
-	beq	.L2203
+	beq	.L2258
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L2199
-.L2267:
+	bne	.L2254
+.L2322:
 	movs	r1, #0
-	b	.L2226
-.L2203:
-	ldr	r3, .L2268+8
+	b	.L2281
+.L2258:
+	ldr	r3, .L2323+8
 	ldrh	r2, [r3]
-	ldr	r3, .L2268
+	ldr	r3, .L2323
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bls	.L2205
-	ldr	r1, .L2268+76
-	movw	r2, #1297
-	ldr	r0, .L2268+80
+	bls	.L2260
+	ldr	r1, .L2323+76
+	movw	r2, #1305
+	ldr	r0, .L2323+80
 	bl	printf
-	ldr	r1, .L2268+84
-	ldr	r0, .L2268+88
+	ldr	r1, .L2323+84
+	ldr	r0, .L2323+88
 	bl	printf
-.L2205:
+.L2260:
 	ldr	r3, [sp, #16]
 	ldr	r2, [sp, #12]
 	ldr	r1, [r3]
 	ldrh	r0, [r2]
-	ldr	r2, .L2268+12
+	ldr	r2, .L2323+12
 	uxth	r10, r1
 	ldr	ip, [r2]
 	add	r3, r10, #-1
@@ -15618,61 +15887,61 @@ FtlScanSysBlk:
 	add	r10, r10, #-1
 	sxth	r3, r3
 	sxth	r10, r10
-.L2206:
+.L2261:
 	cmp	r3, r10
-	bgt	.L2212
+	bgt	.L2267
 	cmp	r3, #0
-	bge	.L2245
-	b	.L2199
-.L2212:
+	bge	.L2300
+	b	.L2254
+.L2267:
 	ldr	r2, [ip, r3, lsl #2]
 	add	r8, ip, r3, lsl #2
 	ldr	r4, [r6, #4]
 	cmp	r4, r2
-	bls	.L2207
+	bls	.L2262
 	ldr	r2, [ip]
-	cbnz	r2, .L2208
+	cbnz	r2, .L2263
 	cmp	r1, r0
 	ittt	ne
-	ldrne	r2, .L2268+8
+	ldrne	r2, .L2323+8
 	addne	r0, r0, #1
 	strhne	r0, [r2]	@ movhi
-.L2208:
-	ldr	r2, .L2268+20
+.L2263:
+	ldr	r2, .L2323+20
 	uxth	r10, r3
 	ldr	r0, [r2]
 	movs	r2, #0
-.L2209:
+.L2264:
 	uxth	lr, r2
 	sxth	r1, r2
 	cmp	r10, lr
-	bhi	.L2210
+	bhi	.L2265
 	ldr	r2, [r6, #4]
 	cmp	r3, #0
 	str	r2, [r8]
 	strh	r5, [r0, r3, lsl #1]	@ movhi
-	blt	.L2199
-	ldr	r2, .L2268+8
+	blt	.L2254
+	ldr	r2, .L2323+8
 	ldrh	r0, [r2]
-	ldr	r2, .L2268
+	ldr	r2, .L2323
 	ldr	r2, [r2]
 	subs	r2, r2, r0
 	subs	r2, r2, #1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L2199
-.L2245:
-	ldr	r2, .L2268+8
+	bgt	.L2254
+.L2300:
+	ldr	r2, .L2323+8
 	adds	r0, r0, #1
 	strh	r0, [r2]	@ movhi
 	ldr	r2, [r6, #4]
 	str	r2, [ip, r3, lsl #2]
-	ldr	r2, .L2268+20
-.L2265:
+	ldr	r2, .L2323+20
+.L2320:
 	ldr	r2, [r2]
 	strh	r5, [r2, r3, lsl #1]	@ movhi
-	b	.L2199
-.L2210:
+	b	.L2254
+.L2265:
 	add	lr, ip, r1, lsl #2
 	adds	r2, r2, #1
 	ldr	r4, [lr, #4]
@@ -15680,106 +15949,106 @@ FtlScanSysBlk:
 	ldrh	lr, [lr, #2]
 	str	r4, [ip, r1, lsl #2]
 	strh	lr, [r0, r1, lsl #1]	@ movhi
-	b	.L2209
-.L2207:
+	b	.L2264
+.L2262:
 	subs	r3, r3, #1
 	sxth	r3, r3
-	b	.L2206
-.L2269:
+	b	.L2261
+.L2324:
 	.align	2
-.L2268:
-	.word	.LANCHOR65
-	.word	.LANCHOR71
+.L2323:
+	.word	.LANCHOR64
+	.word	.LANCHOR70
 	.word	.LANCHOR128
 	.word	.LANCHOR130
-	.word	.LANCHOR62
+	.word	.LANCHOR61
 	.word	.LANCHOR129
 	.word	.LANCHOR193
-	.word	.LANCHOR72
+	.word	.LANCHOR71
 	.word	.LANCHOR209
 	.word	.LANCHOR40
 	.word	.LANCHOR41
 	.word	.LANCHOR38
-	.word	.LANCHOR106
-	.word	.LANCHOR180
-	.word	.LANCHOR59
 	.word	.LANCHOR105
+	.word	.LANCHOR180
+	.word	.LANCHOR58
+	.word	.LANCHOR104
 	.word	.LANCHOR47
 	.word	.LANCHOR159
-	.word	.LANCHOR8
+	.word	.LANCHOR15
 	.word	.LANCHOR220
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-.L2202:
-	ldr	r8, .L2270+20
-	ldr	r10, .L2270+28
+.L2257:
+	ldr	r8, .L2325+20
+	ldr	r10, .L2325+28
 	ldrh	r2, [r8]
 	ldrh	r3, [r10]
 	cmp	r2, r3
-	bls	.L2215
-	ldr	r1, .L2270
-	mov	r2, #1344
-	ldr	r0, .L2270+4
+	bls	.L2270
+	ldr	r1, .L2325
+	mov	r2, #1352
+	ldr	r0, .L2325+4
 	bl	printf
-	ldr	r1, .L2270+8
-	ldr	r0, .L2270+12
+	ldr	r1, .L2325+8
+	ldr	r0, .L2325+12
 	bl	printf
-.L2215:
-	ldr	r2, .L2270+16
+.L2270:
+	ldr	r2, .L2325+16
 	ldrh	lr, [r10]
 	ldrh	ip, [r8]
 	ldr	r0, [r2]
 	add	r10, lr, #-1
 	sxth	r3, r10
 	sub	r10, r10, ip
-.L2216:
+.L2271:
 	cmp	r3, r10
-	ble	.L2221
+	ble	.L2276
 	ldr	r1, [r6, #4]
 	add	r8, r0, r3, lsl #2
 	ldr	r2, [r0, r3, lsl #2]
 	cmp	r1, r2
-	bls	.L2217
+	bls	.L2272
 	ldr	r2, [r0]
-	cbnz	r2, .L2218
+	cbnz	r2, .L2273
 	cmp	lr, ip
 	ittt	ne
-	ldrne	r2, .L2270+20
+	ldrne	r2, .L2325+20
 	addne	ip, ip, #1
 	strhne	ip, [r2]	@ movhi
-.L2218:
-	ldr	r2, .L2270+24
+.L2273:
+	ldr	r2, .L2325+24
 	uxth	r10, r3
 	ldr	ip, [r2]
 	movs	r2, #0
-.L2219:
+.L2274:
 	uxth	lr, r2
 	sxth	r1, r2
 	cmp	r10, lr
-	bhi	.L2220
+	bhi	.L2275
 	ldr	r2, [r6, #4]
 	str	r2, [r8]
 	strh	r5, [ip, r3, lsl #1]	@ movhi
-.L2221:
+.L2276:
 	cmp	r3, #0
-	blt	.L2199
-	ldr	r2, .L2270+28
-	ldr	ip, .L2270+20
+	blt	.L2254
+	ldr	r2, .L2325+28
+	ldr	ip, .L2325+20
 	ldrh	r2, [r2]
 	ldrh	r1, [ip]
 	subs	r2, r2, #1
 	subs	r2, r2, r1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L2199
+	bgt	.L2254
 	ldr	r2, [r6, #4]
 	adds	r1, r1, #1
 	strh	r1, [ip]	@ movhi
 	str	r2, [r0, r3, lsl #2]
-	ldr	r2, .L2270+24
-	b	.L2265
-.L2220:
+	ldr	r2, .L2325+24
+	b	.L2320
+.L2275:
 	add	lr, r0, r1, lsl #2
 	adds	r2, r2, #1
 	ldr	r4, [lr, #4]
@@ -15787,91 +16056,91 @@ FtlScanSysBlk:
 	ldrh	lr, [lr, #2]
 	str	r4, [r0, r1, lsl #2]
 	strh	lr, [ip, r1, lsl #1]	@ movhi
-	b	.L2219
-.L2217:
+	b	.L2274
+.L2272:
 	subs	r3, r3, #1
 	sxth	r3, r3
-	b	.L2216
-.L2200:
-	ldr	r8, .L2270+48
+	b	.L2271
+.L2255:
+	ldr	r8, .L2325+48
 	movw	r2, #65535
 	ldrh	r1, [r8]
 	cmp	r1, r2
-	bne	.L2223
-.L2266:
+	bne	.L2278
+.L2321:
 	strh	r5, [r8]	@ movhi
 	str	r3, [r8, #8]
-	b	.L2199
-.L2223:
+	b	.L2254
+.L2278:
 	ldrh	r0, [r8, #4]
 	cmp	r0, r2
-	beq	.L2224
+	beq	.L2279
 	movs	r1, #1
 	bl	FtlFreeSysBlkQueueIn
-.L2224:
+.L2279:
 	ldr	r3, [r6, #4]
 	ldr	r2, [r8, #8]
 	cmp	r2, r3
-	bcs	.L2225
+	bcs	.L2280
 	ldrh	r2, [r8]
 	strh	r2, [r8, #4]	@ movhi
-	b	.L2266
-.L2225:
+	b	.L2321
+.L2280:
 	strh	r5, [r8, #4]	@ movhi
-	b	.L2199
-.L2229:
-	ldr	r3, .L2270+32
+	b	.L2254
+.L2284:
+	ldr	r3, .L2325+32
 	ldr	r2, [r3]
 	ldrh	r3, [r2]
-	cbz	r3, .L2231
-.L2234:
-	ldr	r3, .L2270+24
+	cbz	r3, .L2286
+.L2289:
+	ldr	r3, .L2325+24
 	ldr	r4, [r3]
 	ldrh	r2, [r4]
 	cmp	r2, #0
-	beq	.L2232
-.L2233:
-	ldr	r3, .L2270+36
+	beq	.L2287
+.L2288:
+	ldr	r3, .L2325+36
 	ldrh	r2, [r3]
-	ldr	r3, .L2270+40
+	ldr	r3, .L2325+40
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bls	.L2264
-	ldr	r1, .L2270
-	movw	r2, #1478
-	ldr	r0, .L2270+4
+	bls	.L2319
+	ldr	r1, .L2325
+	movw	r2, #1486
+	ldr	r0, .L2325+4
 	bl	printf
-	ldr	r1, .L2270+8
-	ldr	r0, .L2270+12
+	ldr	r1, .L2325+8
+	ldr	r0, .L2325+12
 	bl	printf
-.L2264:
+.L2319:
 	movs	r0, #0
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2231:
-	ldr	r1, .L2270+36
+.L2286:
+	ldr	r1, .L2325+36
 	ldrh	r1, [r1]
 	cmp	r1, #0
-	beq	.L2234
-	ldr	r5, .L2270+40
+	beq	.L2289
+	ldr	r5, .L2325+40
 	ldr	r0, [r5]
-.L2235:
+.L2290:
 	sxth	r1, r3
 	cmp	r1, r0
-	bcs	.L2234
+	bcs	.L2289
 	ldrh	r4, [r2, r1, lsl #1]
 	adds	r3, r3, #1
 	cmp	r4, #0
-	beq	.L2235
-	ldr	r3, .L2270+44
+	beq	.L2290
+	ldr	r3, .L2325+44
 	movs	r6, #0
 	ldr	r0, [r3]
 	mov	r3, r1
-.L2236:
+.L2291:
 	ldr	r4, [r5]
 	cmp	r3, r4
-	bcs	.L2234
+	bcs	.L2289
 	ldrh	r7, [r2, r3, lsl #1]
 	subs	r4, r3, r1
 	strh	r7, [r2, r4, lsl #1]	@ movhi
@@ -15880,30 +16149,30 @@ FtlScanSysBlk:
 	strh	r6, [r2, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	sxth	r3, r3
-	b	.L2236
-.L2232:
-	ldr	r3, .L2270+20
+	b	.L2291
+.L2287:
+	ldr	r3, .L2325+20
 	ldrh	r3, [r3]
 	cmp	r3, #0
-	beq	.L2233
-	ldr	r5, .L2270+28
+	beq	.L2288
+	ldr	r5, .L2325+28
 	ldrh	r1, [r5]
-.L2241:
+.L2296:
 	sxth	r3, r2
 	cmp	r3, r1
 	mov	r6, r3
-	bge	.L2233
+	bge	.L2288
 	ldrh	r0, [r4, r3, lsl #1]
 	adds	r2, r2, #1
 	cmp	r0, #0
-	beq	.L2241
-	ldr	r2, .L2270+16
+	beq	.L2296
+	ldr	r2, .L2325+16
 	movs	r0, #0
 	ldr	r2, [r2]
-.L2242:
+.L2297:
 	ldrh	r1, [r5]
 	cmp	r3, r1
-	bge	.L2233
+	bge	.L2288
 	ldrh	r7, [r4, r3, lsl #1]
 	subs	r1, r3, r6
 	strh	r7, [r4, r1, lsl #1]	@ movhi
@@ -15912,21 +16181,21 @@ FtlScanSysBlk:
 	adds	r1, r3, #1
 	strh	r0, [r4, r3, lsl #1]	@ movhi
 	sxth	r3, r1
-	b	.L2242
-.L2271:
+	b	.L2297
+.L2326:
 	.align	2
-.L2270:
+.L2325:
 	.word	.LANCHOR220
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
 	.word	.LANCHOR193
+	.word	.LANCHOR70
 	.word	.LANCHOR71
-	.word	.LANCHOR72
-	.word	.LANCHOR62
+	.word	.LANCHOR61
 	.word	.LANCHOR129
 	.word	.LANCHOR128
-	.word	.LANCHOR65
+	.word	.LANCHOR64
 	.word	.LANCHOR130
 	.word	.LANCHOR209
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
@@ -15943,76 +16212,127 @@ FtlLoadSysInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r1, #0
-	ldr	r8, .L2297+156
-	ldr	r5, .L2297
+	ldr	r8, .L2361+164
+	ldr	r6, .L2361
 	ldr	r3, [r8]
-	ldr	r4, .L2297+4
-	ldr	r10, .L2297+160
-	ldrh	r2, [r5]
-	ldr	r7, .L2297+8
+	ldr	r4, .L2361+4
+	ldr	r10, .L2361+168
+	ldrh	r2, [r6]
+	ldr	r5, .L2361+8
 	str	r3, [r4, #8]
-	ldr	r6, .L2297+12
+	ldr	r7, .L2361+12
 	ldr	r3, [r10]
 	lsls	r2, r2, #1
-	ldr	r0, [r7]
+	ldr	r0, [r5]
 	str	r3, [r4, #12]
 	bl	ftl_memset
-	ldrh	r0, [r6]
+	ldrh	r0, [r7]
 	movw	r3, #65535
-	str	r7, [sp]
+	str	r5, [sp]
 	cmp	r0, r3
-	bne	.L2273
-.L2282:
+	bne	.L2328
+.L2340:
 	mov	r0, #-1
-.L2272:
+.L2327:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2273:
+.L2328:
 	movs	r1, #1
-	mov	fp, r4
 	bl	FtlGetLastWrittenPage
-	ldr	r3, .L2297+16
-	sxth	r7, r0
+	ldrsh	fp, [r7]
+	sxth	r5, r0
 	adds	r0, r0, #1
-	strh	r0, [r6, #2]	@ movhi
-.L2275:
-	cmp	r7, #0
-	bge	.L2278
-	ldr	r1, .L2297+20
-	movw	r2, #1538
-	ldr	r0, .L2297+24
+	strh	r0, [r7, #2]	@ movhi
+.L2330:
+	cmp	r5, #0
+	bge	.L2336
+	movw	r2, #1555
+	ldr	r1, .L2361+16
+	ldr	r0, .L2361+20
 	bl	printf
-	ldr	r1, .L2297+28
-	ldr	r0, .L2297+32
+	ldr	r1, .L2361+24
+	ldr	r0, .L2361+28
 	bl	printf
-.L2277:
-	ldr	r2, .L2297+36
-	ldrh	r3, [r5]
+	b	.L2335
+.L2336:
+	orr	r2, r5, fp, lsl #10
+	ldr	r0, .L2361+4
+	str	r2, [r4, #4]
+	ldr	r2, [r8]
+	str	r2, [r4, #8]
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+	ldr	r2, .L2361+32
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbz	r2, .L2331
+	ldr	r2, [r4, #12]
+	ldr	r2, [r2, #12]
+	str	r2, [sp, #4]
+	cbz	r2, .L2331
+	ldr	r1, .L2361+36
+	ldr	r0, [r4, #8]
+	ldrh	r1, [r1]
+	bl	js_hash
+	ldr	r2, [sp, #4]
+	cmp	r2, r0
+	beq	.L2331
+	cbnz	r5, .L2332
+	ldrh	r2, [r7, #4]
+	cmp	fp, r2
+	beq	.L2332
+	sxth	fp, r2
+	ldr	r2, .L2361+40
+	ldrh	r5, [r2]
+.L2334:
+	subs	r5, r5, #1
+	sxth	r5, r5
+	b	.L2330
+.L2332:
+	mov	r2, #-1
+	str	r2, [r4]
+.L2331:
+	ldr	r2, [r4]
+	adds	r2, r2, #1
+	beq	.L2334
+	ldr	r2, [r8]
+	ldr	r3, .L2361+44
+	ldr	r2, [r2]
+	cmp	r2, r3
+	bne	.L2334
+	ldr	r2, [r10]
+	ldrh	r1, [r2]
+	movw	r2, #61604
+	cmp	r1, r2
+	bne	.L2334
+.L2335:
+	ldr	r2, .L2361+36
+	ldrh	r3, [r6]
 	ldrh	r2, [r2]
 	adds	r3, r3, #24
 	cmp	r2, r3, lsl #1
-	bcs	.L2280
-	ldr	r1, .L2297+20
-	movw	r2, #1540
-	ldr	r0, .L2297+24
+	bcs	.L2338
+	ldr	r1, .L2361+16
+	movw	r2, #1557
+	ldr	r0, .L2361+20
 	bl	printf
-	ldr	r1, .L2297+28
-	ldr	r0, .L2297+32
+	ldr	r1, .L2361+24
+	ldr	r0, .L2361+28
 	bl	printf
-.L2280:
+.L2338:
 	movs	r2, #48
 	ldr	r1, [r4, #8]
-	ldr	r0, .L2297+40
+	ldr	r0, .L2361+48
 	bl	ftl_memcpy
-	ldrh	r2, [r5]
+	ldrh	r2, [r6]
 	ldr	r3, [sp]
 	ldr	r1, [r4, #8]
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	adds	r1, r1, #48
 	bl	ftl_memcpy
-	ldrh	r1, [r5]
+	ldrh	r1, [r6]
 	ldr	r3, [r4, #8]
 	lsrs	r2, r1, #3
 	adds	r1, r1, #24
@@ -16020,14 +16340,14 @@ FtlLoadSysInfo:
 	adds	r2, r2, #4
 	bic	r1, r1, #3
 	add	r1, r1, r3
-	ldr	r3, .L2297+44
+	ldr	r3, .L2361+52
 	ldr	r0, [r3]
 	bl	ftl_memcpy
-	ldr	r3, .L2297+48
+	ldr	r3, .L2361+56
 	ldrh	r3, [r3]
-	cbz	r3, .L2281
-	ldrh	r1, [r5]
-	ldr	r3, .L2297+52
+	cbz	r3, .L2339
+	ldrh	r1, [r6]
+	ldr	r3, .L2361+60
 	ldrh	r2, [r3]
 	lsrs	r3, r1, #3
 	add	r3, r3, r1, lsl #1
@@ -16036,65 +16356,65 @@ FtlLoadSysInfo:
 	lsls	r2, r2, #2
 	ubfx	r3, r3, #2, #14
 	add	r1, r1, r3, lsl #2
-	ldr	r3, .L2297+56
+	ldr	r3, .L2361+64
 	ldr	r0, [r3]
 	bl	ftl_memcpy
-.L2281:
-	ldr	r4, .L2297+40
-	ldr	r3, .L2297+16
+.L2339:
+	ldr	r4, .L2361+48
+	ldr	r3, .L2361+44
 	ldr	r2, [r4]
 	cmp	r2, r3
-	bne	.L2282
-	ldr	r3, .L2297+60
+	bne	.L2340
+	ldr	r3, .L2361+68
 	ldrb	r2, [r4, #10]	@ zero_extendqisi2
 	ldrh	r5, [r4, #8]
 	ldrh	r3, [r3]
-	strh	r5, [r6, #6]	@ movhi
+	strh	r5, [r7, #6]	@ movhi
 	cmp	r2, r3
-	bne	.L2282
-	ldr	r3, .L2297+64
-	ldr	r2, .L2297+68
+	bne	.L2340
+	ldr	r3, .L2361+72
+	ldr	r2, .L2361+76
 	str	r5, [r3]
-	ldr	r3, .L2297+72
+	ldr	r3, .L2361+80
 	ldrh	r3, [r3]
 	muls	r3, r5, r3
 	str	r3, [r2]
-	ldr	r2, .L2297+76
+	ldr	r2, .L2361+84
 	ldrh	r2, [r2]
 	muls	r3, r2, r3
-	ldr	r2, .L2297+80
+	ldr	r2, .L2361+88
 	str	r3, [r2]
-	ldr	r3, .L2297+84
+	ldr	r3, .L2361+92
 	ldr	r6, [r3]
-	ldr	r3, .L2297+88
+	ldr	r3, .L2361+96
 	ldrh	r0, [r3, #6]
-	ldr	r3, .L2297+92
+	ldr	r3, .L2361+100
 	subs	r0, r6, r0
 	ldrh	r1, [r3]
 	subs	r0, r0, r5
 	bl	__aeabi_uidiv
-	ldr	r3, .L2297+96
+	ldr	r3, .L2361+104
 	cmp	r5, r6
 	strh	r0, [r3]	@ movhi
-	bls	.L2283
-	ldr	r1, .L2297+20
-	movw	r2, #1567
-	ldr	r0, .L2297+24
+	bls	.L2341
+	ldr	r1, .L2361+16
+	mov	r2, #1584
+	ldr	r0, .L2361+20
 	bl	printf
-	ldr	r1, .L2297+28
-	ldr	r0, .L2297+32
+	ldr	r1, .L2361+24
+	ldr	r0, .L2361+28
 	bl	printf
-.L2283:
+.L2341:
 	ldrh	r2, [r4, #16]
-	ldr	r3, .L2297+100
+	ldr	r3, .L2361+108
 	ldrh	ip, [r4, #14]
-	ldr	r7, .L2297+104
+	ldr	r7, .L2361+112
 	lsrs	r1, r2, #6
 	and	r2, r2, #63
 	strb	r2, [r3, #6]
 	ldrb	r2, [r4, #11]	@ zero_extendqisi2
 	strh	r1, [r3, #2]	@ movhi
-	ldr	r1, .L2297+108
+	ldr	r1, .L2361+116
 	strb	r2, [r3, #8]
 	ldrh	r2, [r4, #18]
 	strh	ip, [r3]	@ movhi
@@ -16113,7 +16433,7 @@ FtlLoadSysInfo:
 	strh	r5, [r1, #2]	@ movhi
 	ldrh	r5, [r4, #22]
 	strb	r2, [r1, #8]
-	ldr	r2, .L2297+112
+	ldr	r2, .L2361+120
 	strh	r5, [r2]	@ movhi
 	ldrh	r5, [r4, #24]
 	lsrs	r6, r5, #6
@@ -16123,31 +16443,31 @@ FtlLoadSysInfo:
 	strh	r6, [r2, #2]	@ movhi
 	ldr	r6, [r4, #32]
 	strb	r5, [r2, #8]
-	ldr	r5, .L2297+116
+	ldr	r5, .L2361+124
 	str	r3, [r5]
-	ldr	r5, .L2297+120
+	ldr	r5, .L2361+128
 	str	r3, [r5]
-	ldr	r5, .L2297+124
+	ldr	r5, .L2361+132
 	str	r3, [r5]
-	ldr	r5, .L2297+128
+	ldr	r5, .L2361+136
 	str	r3, [r5]
-	ldr	r5, .L2297+132
+	ldr	r5, .L2361+140
 	str	r6, [r5]
 	mov	r6, r1
-	ldr	r5, .L2297+136
+	ldr	r5, .L2361+144
 	str	r3, [r5]
-	ldr	r5, .L2297+140
+	ldr	r5, .L2361+148
 	str	r3, [r5]
-	ldr	r5, .L2297+144
+	ldr	r5, .L2361+152
 	ldr	lr, [r4, #40]
 	str	r3, [r5]
-	ldr	r3, .L2297+148
+	ldr	r3, .L2361+156
 	ldr	r5, [r3]
 	cmp	lr, r5
 	mov	r5, r2
 	it	hi
 	strhi	lr, [r3]
-	ldr	r3, .L2297+152
+	ldr	r3, .L2361+160
 	ldr	r2, [r4, #36]
 	ldr	r1, [r3]
 	cmp	r2, r1
@@ -16155,93 +16475,67 @@ FtlLoadSysInfo:
 	strhi	r2, [r3]
 	movw	r3, #65535
 	cmp	ip, r3
-	beq	.L2286
-	ldr	r0, .L2297+100
+	beq	.L2344
+	ldr	r0, .L2361+108
 	bl	make_superblock
-.L2286:
+.L2344:
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2287
-	ldr	r0, .L2297+108
+	beq	.L2345
+	ldr	r0, .L2361+116
 	bl	make_superblock
-.L2287:
+.L2345:
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2288
-	ldr	r0, .L2297+112
+	beq	.L2346
+	ldr	r0, .L2361+120
 	bl	make_superblock
-.L2288:
+.L2346:
 	ldrh	r2, [r7]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2289
-	ldr	r0, .L2297+104
+	beq	.L2347
+	ldr	r0, .L2361+112
 	bl	make_superblock
-.L2289:
+.L2347:
 	movs	r0, #0
-	b	.L2272
-.L2278:
-	ldrh	r2, [r6]
-	mov	r0, fp
-	str	r3, [sp, #4]
-	orr	r2, r7, r2, lsl #10
-	str	r2, [r4, #4]
-	ldr	r2, [r8]
-	str	r2, [r4, #8]
-	movs	r2, #1
-	mov	r1, r2
-	bl	FlashReadPages
-	ldr	r2, [r4]
-	ldr	r3, [sp, #4]
-	adds	r2, r2, #1
-	beq	.L2276
-	ldr	r2, [r8]
-	ldr	r2, [r2]
-	cmp	r2, r3
-	bne	.L2276
-	ldr	r2, [r10]
-	ldrh	r1, [r2]
-	movw	r2, #61604
-	cmp	r1, r2
-	beq	.L2277
-.L2276:
-	subs	r7, r7, #1
-	sxth	r7, r7
-	b	.L2275
-.L2298:
+	b	.L2327
+.L2362:
 	.align	2
-.L2297:
+.L2361:
 	.word	.LANCHOR40
 	.word	.LANCHOR202
-	.word	.LANCHOR84
+	.word	.LANCHOR83
 	.word	.LANCHOR209
-	.word	1179929683
 	.word	.LANCHOR221
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LANCHOR58
-	.word	.LANCHOR81
+	.word	.LANCHOR1
+	.word	.LANCHOR57
+	.word	.LANCHOR53
+	.word	1179929683
+	.word	.LANCHOR80
 	.word	.LANCHOR0
-	.word	.LANCHOR70
-	.word	.LANCHOR67
+	.word	.LANCHOR69
+	.word	.LANCHOR66
 	.word	.LANCHOR195
 	.word	.LANCHOR45
 	.word	.LANCHOR222
-	.word	.LANCHOR73
-	.word	.LANCHOR53
-	.word	.LANCHOR56
-	.word	.LANCHOR69
+	.word	.LANCHOR72
+	.word	.LANCHOR52
+	.word	.LANCHOR55
+	.word	.LANCHOR68
 	.word	.LANCHOR42
-	.word	.LANCHOR75
+	.word	.LANCHOR74
 	.word	.LANCHOR38
 	.word	.LANCHOR223
-	.word	.LANCHOR92
+	.word	.LANCHOR91
 	.word	.LANCHOR204
+	.word	.LANCHOR92
 	.word	.LANCHOR93
-	.word	.LANCHOR94
 	.word	.LANCHOR161
 	.word	.LANCHOR162
 	.word	.LANCHOR166
@@ -16268,97 +16562,97 @@ FtlDumpBlockInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	ubfx	r0, r0, #10, #16
-	ldr	r4, .L2311
+	ldr	r4, .L2375
 	sub	sp, sp, #88
 	mov	r8, r1
 	ldrh	r3, [r4]
 	str	r3, [sp, #24]
 	bl	P2V_block_in_plane
-	ldr	r1, .L2311+4
+	ldr	r1, .L2375+4
 	mov	r6, r0
-	ldr	r0, .L2311+8
+	ldr	r0, .L2375+8
 	bl	printf
-	ldr	r3, .L2311+12
+	ldr	r3, .L2375+12
 	mov	r1, r6
-	ldr	r0, .L2311+16
+	ldr	r0, .L2375+16
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r6, lsl #1]
 	bl	printf
 	add	r0, sp, #88
 	strh	r6, [r0, #-48]!	@ movhi
 	bl	make_superblock
-	ldr	r3, .L2311+20
+	ldr	r3, .L2375+20
 	ldrb	r5, [r3]	@ zero_extendqisi2
-	cbz	r5, .L2300
+	cbz	r5, .L2364
 	cmp	r8, #0
-	bne	.L2309
+	bne	.L2373
 	mov	r0, r6
 	bl	ftl_get_blk_mode
 	cmp	r0, #1
 	mov	r5, r0
-	bne	.L2300
-	ldr	r3, .L2311+24
+	bne	.L2364
+	ldr	r3, .L2375+24
 	ldrh	r3, [r3]
 	str	r3, [sp, #24]
-.L2300:
+.L2364:
 	movs	r6, #0
 	ldrh	r3, [r4]
 	ldr	r2, [sp, #24]
 	mov	r1, r5
-	ldr	r0, .L2311+28
+	ldr	r0, .L2375+28
 	bl	printf
-.L2301:
-	ldr	r3, .L2311+32
+.L2365:
+	ldr	r3, .L2375+32
 	movs	r2, #0
 	add	ip, sp, #54
 	mov	r4, r2
 	movw	r10, #65535
 	mov	fp, #36
 	ldrh	lr, [r3]
-	ldr	r3, .L2311+36
+	ldr	r3, .L2375+36
 	ldr	r0, [r3]
-	ldr	r3, .L2311+40
+	ldr	r3, .L2375+40
 	ldr	r3, [r3]
 	str	r3, [sp, #28]
-	ldr	r3, .L2311+44
+	ldr	r3, .L2375+44
 	ldrh	r3, [r3]
 	str	r3, [sp, #32]
-	ldr	r3, .L2311+48
+	ldr	r3, .L2375+48
 	ldr	r3, [r3]
 	str	r3, [sp, #36]
-	ldr	r3, .L2311+52
+	ldr	r3, .L2375+52
 	ldrh	r8, [r3]
-.L2302:
+.L2366:
 	uxth	r3, r2
 	cmp	lr, r3
-	bhi	.L2304
-	ldr	fp, .L2311+56
+	bhi	.L2368
+	ldr	fp, .L2375+56
 	mov	r8, #0
 	mov	r10, #36
 	mov	r2, r5
 	mov	r1, r4
 	bl	FlashReadPages
-.L2305:
+.L2369:
 	uxth	r3, r8
 	cmp	r4, r3
-	bhi	.L2306
+	bhi	.L2370
 	adds	r6, r6, #1
 	ldr	r3, [sp, #24]
 	uxth	r6, r6
 	cmp	r3, r6
-	bne	.L2301
-.L2307:
+	bne	.L2365
+.L2371:
 	movs	r0, #0
 	add	sp, sp, #88
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2309:
+.L2373:
 	movs	r5, #0
-	b	.L2300
-.L2304:
+	b	.L2364
+.L2368:
 	ldrh	r3, [ip, #2]!
 	cmp	r3, r10
-	beq	.L2303
+	beq	.L2367
 	mla	r1, fp, r4, r0
 	ldr	r7, [sp, #28]
 	orr	r3, r6, r3, lsl #10
@@ -16375,11 +16669,11 @@ FtlDumpBlockInfo:
 	bic	r3, r3, #3
 	add	r3, r3, r7
 	str	r3, [r1, #12]
-.L2303:
+.L2367:
 	adds	r2, r2, #1
-	b	.L2302
-.L2306:
-	ldr	r3, .L2311+36
+	b	.L2366
+.L2370:
+	ldr	r3, .L2375+36
 	mul	r0, r10, r8
 	ldrh	r1, [sp, #40]
 	add	r8, r8, #1
@@ -16403,24 +16697,24 @@ FtlDumpBlockInfo:
 	ldr	r2, [ip, r0]
 	mov	r0, fp
 	bl	printf
-	b	.L2305
-.L2312:
+	b	.L2369
+.L2376:
 	.align	2
-.L2311:
-	.word	.LANCHOR53
+.L2375:
+	.word	.LANCHOR52
 	.word	.LANCHOR224
 	.word	.LC45
-	.word	.LANCHOR84
+	.word	.LANCHOR83
 	.word	.LC46
-	.word	.LANCHOR8
-	.word	.LANCHOR54
+	.word	.LANCHOR15
+	.word	.LANCHOR53
 	.word	.LC47
 	.word	.LANCHOR38
 	.word	.LANCHOR180
+	.word	.LANCHOR104
+	.word	.LANCHOR57
 	.word	.LANCHOR105
 	.word	.LANCHOR58
-	.word	.LANCHOR106
-	.word	.LANCHOR59
 	.word	.LC48
 	.size	FtlDumpBlockInfo, .-FtlDumpBlockInfo
 	.section	.text.FtlScanAllBlock,"ax",%progbits
@@ -16436,86 +16730,86 @@ FtlScanAllBlock:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #88
-	ldr	r6, .L2323
-	ldr	r1, .L2323+4
-	ldr	r0, .L2323+8
+	ldr	r6, .L2387
+	ldr	r1, .L2387+4
+	ldr	r0, .L2387+8
 	bl	printf
 	movs	r3, #0
 	str	r3, [sp, #28]
-.L2314:
-	ldr	r3, .L2323+12
+.L2378:
+	ldr	r3, .L2387+12
 	ldrh	r0, [sp, #28]
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bhi	.L2322
+	bhi	.L2386
 	movs	r0, #0
 	add	sp, sp, #88
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2322:
+.L2386:
 	add	r4, sp, #88
 	add	r7, sp, #54
 	strh	r0, [r4, #-48]!	@ movhi
 	movw	r10, #65535
 	bl	ftl_get_blk_mode
-	ldr	r3, .L2323+16
+	ldr	r3, .L2387+16
 	mov	fp, #36
 	ldrh	r1, [sp, #28]
 	ldr	r2, [r3]
 	mov	r3, r0
-	ldr	r0, .L2323+20
+	ldr	r0, .L2387+20
 	ldrh	r2, [r2, r1, lsl #1]
 	bl	printf
 	mov	r0, r4
 	bl	make_superblock
-	ldr	r3, .L2323+24
+	ldr	r3, .L2387+24
 	movs	r2, #0
 	ldr	r0, [r6]
 	mov	r4, r2
 	ldrh	lr, [r3]
-	ldr	r3, .L2323+28
+	ldr	r3, .L2387+28
 	ldr	r3, [r3]
 	str	r3, [sp, #32]
-	ldr	r3, .L2323+32
+	ldr	r3, .L2387+32
 	ldrh	ip, [r3]
-	ldr	r3, .L2323+36
+	ldr	r3, .L2387+36
 	ldr	r3, [r3]
 	str	r3, [sp, #36]
-	ldr	r3, .L2323+40
+	ldr	r3, .L2387+40
 	ldrh	r8, [r3]
-.L2315:
+.L2379:
 	uxth	r3, r2
 	cmp	lr, r3
-	bhi	.L2317
-	ldr	r10, .L2323+44
+	bhi	.L2381
+	ldr	r10, .L2387+44
 	movs	r7, #0
 	mov	r8, #36
 	movs	r2, #0
 	mov	r1, r4
 	bl	FlashReadPages
-.L2318:
+.L2382:
 	uxth	r3, r7
 	cmp	r4, r3
-	bhi	.L2319
-	ldr	r10, .L2323+48
+	bhi	.L2383
+	ldr	r10, .L2387+48
 	movs	r7, #0
 	mov	r8, #36
 	movs	r2, #1
 	mov	r1, r4
 	ldr	r0, [r6]
 	bl	FlashReadPages
-.L2320:
+.L2384:
 	uxth	r3, r7
 	cmp	r4, r3
-	bhi	.L2321
+	bhi	.L2385
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
 	str	r3, [sp, #28]
-	b	.L2314
-.L2317:
+	b	.L2378
+.L2381:
 	ldrh	r3, [r7, #2]!
 	cmp	r3, r10
-	beq	.L2316
+	beq	.L2380
 	mla	r1, fp, r4, r0
 	ldr	r5, [sp, #32]
 	lsls	r3, r3, #10
@@ -16531,10 +16825,10 @@ FtlScanAllBlock:
 	bic	r3, r3, #3
 	add	r3, r3, r5
 	str	r3, [r1, #12]
-.L2316:
+.L2380:
 	adds	r2, r2, #1
-	b	.L2315
-.L2319:
+	b	.L2379
+.L2383:
 	mul	r2, r8, r7
 	ldr	r0, [r6]
 	ldrh	r1, [sp, #40]
@@ -16558,8 +16852,8 @@ FtlScanAllBlock:
 	mov	r0, r10
 	ldr	r3, [lr, #4]
 	bl	printf
-	b	.L2318
-.L2321:
+	b	.L2382
+.L2385:
 	mul	r2, r8, r7
 	ldr	r0, [r6]
 	ldrh	r1, [sp, #40]
@@ -16583,21 +16877,21 @@ FtlScanAllBlock:
 	mov	r0, r10
 	ldr	r3, [lr, #4]
 	bl	printf
-	b	.L2320
-.L2324:
+	b	.L2384
+.L2388:
 	.align	2
-.L2323:
+.L2387:
 	.word	.LANCHOR180
 	.word	.LANCHOR225
 	.word	.LC45
 	.word	.LANCHOR41
-	.word	.LANCHOR84
+	.word	.LANCHOR83
 	.word	.LC49
 	.word	.LANCHOR38
+	.word	.LANCHOR104
+	.word	.LANCHOR57
 	.word	.LANCHOR105
 	.word	.LANCHOR58
-	.word	.LANCHOR106
-	.word	.LANCHOR59
 	.word	.LC50
 	.word	.LC51
 	.size	FtlScanAllBlock, .-FtlScanAllBlock
@@ -16612,77 +16906,79 @@ FtlScanAllBlock:
 FtlMapTblRecovery:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, [r0, #16]
+	ldr	r3, [r0, #24]
 	movs	r1, #0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #24
-	ldrh	fp, [r0, #6]
+	ldrh	r7, [r0, #6]
 	mov	r4, r0
 	movs	r6, #0
-	ldr	r8, [r0, #24]
+	str	r3, [sp]
+	ldr	r3, [r0, #16]
+	ldr	r10, [r0, #12]
+	lsls	r2, r7, #2
 	str	r3, [sp, #12]
 	ldrh	r3, [r0, #8]
-	lsl	r2, fp, #2
-	ldr	r10, [r0, #12]
-	mov	r0, r8
-	ldr	r5, .L2352
+	ldr	r0, [sp]
 	str	r3, [sp, #4]
 	bl	ftl_memset
-	ldr	r3, .L2352+4
+	ldr	r2, .L2430
+	ldr	r3, .L2430+4
 	str	r6, [r4, #32]
+	ldr	r1, [r2]
+	mov	fp, r3
 	str	r6, [r4, #28]
-	ldr	r2, [r3]
-	str	r3, [sp, #8]
-	str	r2, [r5, #8]
-	ldr	r2, .L2352+8
-	ldr	r7, [r2]
-	movw	r2, #65535
-	str	r7, [r5, #12]
-	strh	r2, [r4]	@ movhi
-	strh	r2, [r4, #2]	@ movhi
-	movs	r2, #1
-	str	r2, [r4, #36]
-.L2326:
+	str	r2, [sp, #8]
+	str	r1, [r3, #8]
+	ldr	r1, .L2430+8
+	ldr	r5, [r1]
+	movw	r1, #65535
+	str	r5, [r3, #12]
+	strh	r1, [r4]	@ movhi
+	strh	r1, [r4, #2]	@ movhi
+	movs	r1, #1
+	str	r1, [r4, #36]
+.L2390:
 	ldr	r2, [sp, #4]
 	sxth	r3, r6
 	cmp	r3, r2
-	bge	.L2343
+	bge	.L2409
 	ldr	r2, [sp, #4]
+	lsl	r8, r3, #1
 	subs	r2, r2, #1
 	cmp	r3, r2
-	lsl	r2, r3, #1
-	bne	.L2327
+	bne	.L2391
 	ldrh	r0, [r10, r3, lsl #1]
 	movs	r1, #1
-	add	r5, r10, r2
 	str	r3, [sp, #4]
+	mov	fp, #0
 	bl	FtlGetLastWrittenPage
 	ldr	r3, [sp, #12]
-	sxth	r10, r0
+	add	r8, r8, r10
 	strh	r6, [r4]	@ movhi
-	movs	r6, #0
+	sxth	r10, r0
+	ldr	r6, .L2430+4
 	adds	r0, r0, #1
 	mov	r2, r3
 	ldr	r3, [sp, #4]
 	strh	r0, [r4, #2]	@ movhi
 	ldr	r3, [r2, r3, lsl #2]
 	str	r3, [r4, #28]
-	ldr	r3, .L2352
-.L2328:
-	sxth	r2, r6
+.L2392:
+	sxth	r2, fp
 	cmp	r2, r10
-	ble	.L2330
-.L2343:
+	ble	.L2395
+.L2409:
 	mov	r0, r4
 	bl	ftl_free_no_use_map_blk
-	ldr	r3, .L2352+12
+	ldr	r3, .L2430+12
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L2332
+	bne	.L2397
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L2332:
+.L2397:
 	mov	r0, r4
 	bl	ftl_map_blk_gc
 	mov	r0, r4
@@ -16691,125 +16987,157 @@ FtlMapTblRecovery:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2330:
-	ldrh	r1, [r5]
-	ldr	r0, .L2352
-	str	r3, [sp, #4]
+.L2395:
+	ldrh	r1, [r8]
+	ldr	r0, .L2430+4
 	orr	r2, r2, r1, lsl #10
-	str	r2, [r3, #4]
+	str	r2, [r6, #4]
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-	ldr	r3, [sp, #4]
-	ldr	r2, [r3]
+	ldr	r3, .L2430+16
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	cbz	r2, .L2393
+	ldr	r2, [r6, #12]
+	ldr	r2, [r2, #12]
+	str	r2, [sp, #4]
+	cbz	r2, .L2393
+	ldr	r1, .L2430+20
+	ldr	r0, [r6, #8]
+	ldrh	r1, [r1]
+	bl	js_hash
+	ldr	r2, [sp, #4]
+	cmp	r2, r0
+	itt	ne
+	movne	r2, #-1
+	strne	r2, [r6]
+.L2393:
+	ldr	r2, [r6]
 	adds	r2, r2, #1
-	beq	.L2329
-	ldrh	r2, [r7, #8]
-	cmp	fp, r2
-	bls	.L2329
+	beq	.L2394
+	ldrh	r2, [r5, #8]
+	cmp	r7, r2
+	bls	.L2394
 	ldrh	r1, [r4, #4]
-	ldrh	r0, [r7]
+	ldrh	r0, [r5]
 	cmp	r0, r1
-	itt	eq
-	ldreq	r1, [r3, #4]
-	streq	r1, [r8, r2, lsl #2]
-.L2329:
-	adds	r6, r6, #1
-	b	.L2328
-.L2327:
-	ldr	r1, [sp, #8]
-	add	r2, r10, r2
+	ittt	eq
+	ldreq	r1, [r6, #4]
+	ldreq	r3, [sp]
+	streq	r1, [r3, r2, lsl #2]
+.L2394:
+	add	fp, fp, #1
+	b	.L2392
+.L2391:
+	ldr	r2, [sp, #8]
+	ldr	r0, .L2430+4
+	ldr	r2, [r2]
+	str	r2, [fp, #8]
+	add	r2, r10, r8
+	ldr	r8, .L2430+12
 	str	r2, [sp, #16]
-	ldr	r0, .L2352
-	ldr	r1, [r1]
-	str	r1, [r5, #8]
-	ldrh	r1, [r10, r3, lsl #1]
-	ldr	r3, .L2352+12
-	ldrh	r2, [r3]
-	str	r3, [sp, #20]
-	subs	r2, r2, #1
-	orr	r2, r2, r1, lsl #10
-	str	r2, [r5, #4]
+	ldrh	r2, [r10, r3, lsl #1]
+	ldrh	r3, [r8]
+	subs	r3, r3, #1
+	orr	r3, r3, r2, lsl #10
 	movs	r2, #1
 	mov	r1, r2
+	str	r3, [fp, #4]
 	bl	FlashReadPages
-	ldr	r2, [r5]
-	adds	r2, r2, #1
-	beq	.L2345
-	ldrh	r1, [r7]
-	ldrh	r2, [r4, #4]
-	ldr	r3, [sp, #20]
-	cmp	r1, r2
-	bne	.L2345
-	ldrh	r1, [r7, #8]
-	movw	r2, #64245
-	cmp	r1, r2
-	beq	.L2334
-.L2345:
-	movs	r3, #0
-.L2335:
-	ldr	r1, .L2352+12
-	sxth	r2, r3
-	ldrh	r1, [r1]
-	cmp	r2, r1
-	bge	.L2341
-	str	r3, [sp, #20]
-	ldr	r3, [sp, #16]
-	ldr	r0, .L2352
-	ldrh	r1, [r3]
-	orr	r2, r2, r1, lsl #10
-	str	r2, [r5, #4]
+	ldr	r3, [fp]
+	adds	r3, r3, #1
+	beq	.L2411
+	ldrh	r2, [r5]
+	ldrh	r3, [r4, #4]
+	cmp	r2, r3
+	bne	.L2411
+	ldrh	r2, [r5, #8]
+	movw	r3, #64245
+	cmp	r2, r3
+	beq	.L2399
+.L2411:
+	mov	r8, #0
+.L2400:
+	ldr	r2, .L2430+12
+	sxth	r3, r8
+	ldrh	r2, [r2]
+	cmp	r3, r2
+	bge	.L2407
+	ldr	r2, [sp, #16]
+	ldr	r0, .L2430+4
+	ldrh	r2, [r2]
+	orr	r3, r3, r2, lsl #10
 	movs	r2, #1
 	mov	r1, r2
+	str	r3, [fp, #4]
 	bl	FlashReadPages
-	ldr	r2, [r5]
+	ldr	r3, .L2430+16
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2404
+	ldr	r3, [fp, #12]
+	ldr	r3, [r3, #12]
+	str	r3, [sp, #20]
+	cbz	r3, .L2404
+	ldr	r2, .L2430+20
+	ldr	r0, [fp, #8]
+	ldrh	r1, [r2]
+	bl	js_hash
 	ldr	r3, [sp, #20]
-	adds	r2, r2, #1
-	beq	.L2339
-	ldrh	r2, [r7, #8]
-	cmp	fp, r2
-	bls	.L2339
-	ldrh	r1, [r4, #4]
-	ldrh	r0, [r7]
-	cmp	r0, r1
-	itt	eq
-	ldreq	r1, [r5, #4]
-	streq	r1, [r8, r2, lsl #2]
-.L2339:
+	cmp	r3, r0
+	itt	ne
+	movne	r3, #-1
+	strne	r3, [fp]
+.L2404:
+	ldr	r3, [fp]
 	adds	r3, r3, #1
-	b	.L2335
-.L2334:
-	ldrh	r2, [r3]
-	movs	r1, #0
+	beq	.L2405
+	ldrh	r3, [r5, #8]
+	cmp	r7, r3
+	bls	.L2405
+	ldrh	r1, [r5]
+	ldrh	r2, [r4, #4]
+	cmp	r1, r2
+	ittt	eq
+	ldreq	r2, [fp, #4]
+	ldreq	r1, [sp]
+	streq	r2, [r1, r3, lsl #2]
+.L2405:
+	add	r8, r8, #1
+	b	.L2400
+.L2399:
 	ldr	r3, [sp, #8]
-	subs	r2, r2, #1
+	movs	r1, #0
+	ldrh	r2, [r8]
 	ldr	ip, [r3]
-.L2336:
+	subs	r2, r2, #1
+.L2401:
 	sxth	r3, r1
 	cmp	r3, r2
-	blt	.L2338
-.L2341:
+	blt	.L2403
+.L2407:
 	adds	r6, r6, #1
-	b	.L2326
-.L2338:
+	b	.L2390
+.L2403:
 	lsls	r0, r3, #3
 	ldr	r3, [ip, r3, lsl #3]
 	adds	r1, r1, #1
 	uxth	lr, r3
-	cmp	fp, lr
+	cmp	r7, lr
 	itttt	hi
 	addhi	r0, r0, ip
-	movhi	r3, lr
+	ldrhi	r3, [sp]
 	ldrhi	r0, [r0, #4]
-	strhi	r0, [r8, r3, lsl #2]
-	b	.L2336
-.L2353:
+	strhi	r0, [r3, lr, lsl #2]
+	b	.L2401
+.L2431:
 	.align	2
-.L2352:
-	.word	.LANCHOR202
+.L2430:
 	.word	.LANCHOR183
+	.word	.LANCHOR202
 	.word	.LANCHOR188
-	.word	.LANCHOR54
+	.word	.LANCHOR53
+	.word	.LANCHOR1
+	.word	.LANCHOR57
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
 	.section	.text.FtlLoadVonderInfo,"ax",%progbits
 	.align	1
@@ -16823,41 +17151,41 @@ FtlLoadVonderInfo:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L2355
-	ldr	r0, .L2355+4
+	ldr	r3, .L2433
+	ldr	r0, .L2433+4
 	ldrh	r3, [r3]
 	strh	r3, [r0, #10]	@ movhi
 	movw	r3, #61574
 	strh	r3, [r0, #4]	@ movhi
-	ldr	r3, .L2355+8
+	ldr	r3, .L2433+8
 	ldrh	r3, [r3]
 	strh	r3, [r0, #8]	@ movhi
-	ldr	r3, .L2355+12
+	ldr	r3, .L2433+12
 	ldrh	r3, [r3]
 	strh	r3, [r0, #6]	@ movhi
-	ldr	r3, .L2355+16
+	ldr	r3, .L2433+16
 	ldr	r3, [r3]
 	str	r3, [r0, #12]
-	ldr	r3, .L2355+20
+	ldr	r3, .L2433+20
 	ldr	r3, [r3]
 	str	r3, [r0, #16]
-	ldr	r3, .L2355+24
+	ldr	r3, .L2433+24
 	ldr	r3, [r3]
 	str	r3, [r0, #20]
-	ldr	r3, .L2355+28
+	ldr	r3, .L2433+28
 	ldr	r3, [r3]
 	str	r3, [r0, #24]
 	bl	FtlMapTblRecovery
 	movs	r0, #0
 	pop	{r3, pc}
-.L2356:
+.L2434:
 	.align	2
-.L2355:
-	.word	.LANCHOR62
+.L2433:
+	.word	.LANCHOR61
 	.word	.LANCHOR215
+	.word	.LANCHOR70
+	.word	.LANCHOR62
 	.word	.LANCHOR71
-	.word	.LANCHOR63
-	.word	.LANCHOR72
 	.word	.LANCHOR193
 	.word	.LANCHOR192
 	.word	.LANCHOR194
@@ -16875,238 +17203,40 @@ FtlLoadMapInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	FtlL2PDataInit
-	ldr	r0, .L2358
+	ldr	r0, .L2436
 	bl	FtlMapTblRecovery
 	movs	r0, #0
 	pop	{r3, pc}
-.L2359:
+.L2437:
 	.align	2
-.L2358:
+.L2436:
 	.word	.LANCHOR127
 	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
-	.section	.text.FtlGcScanTempBlk,"ax",%progbits
+	.section	.text.FlashReadFacBbtData,"ax",%progbits
 	.align	1
-	.global	FtlGcScanTempBlk
+	.global	FlashReadFacBbtData
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlGcScanTempBlk, %function
-FtlGcScanTempBlk:
-	@ args = 0, pretend = 0, frame = 24
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2387
-	movw	r2, #65535
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #24
-	mov	r5, r0
-	ldrh	r4, [r3]
-	str	r3, [sp, #16]
-	cmp	r4, r2
-	beq	.L2378
-	cbnz	r4, .L2361
-.L2362:
-	bl	FtlGcPageVarInit
-	b	.L2363
-.L2378:
-	movs	r4, #0
-.L2361:
-	ldr	r3, .L2387+4
-	ldrh	r3, [r3]
-	cmp	r3, r1
-	beq	.L2362
-.L2363:
-	ldr	fp, .L2387+44
-	mov	r3, #-1
-	str	r3, [sp, #8]
-.L2375:
-	ldrh	r2, [r5]
-	movw	r3, #65535
-	movs	r0, #0
-	strb	r0, [r5, #8]
-	cmp	r2, r3
-	beq	.L2364
-.L2377:
-	ldr	r3, .L2387+8
-	movw	ip, #65535
-	ldr	r0, [fp]
-	mov	lr, #36
-	ldrh	r8, [r3]
-	ldr	r3, .L2387+12
-	ldr	r3, [r3]
-	str	r3, [sp, #12]
-	ldr	r3, .L2387+16
-	ldrh	r10, [r3]
-	add	r3, r5, #16
-	str	r3, [sp, #4]
-	movs	r3, #0
-	mov	r6, r3
-.L2365:
-	uxth	r2, r3
-	cmp	r8, r2
-	bhi	.L2367
-	movs	r7, #0
-	mov	r10, #36
-	movs	r2, #0
-	mov	r1, r6
-	bl	FlashReadPages
-.L2368:
-	uxth	r3, r7
-	cmp	r6, r3
-	bhi	.L2376
-	ldr	r3, .L2387+4
-	adds	r4, r4, #1
-	uxth	r4, r4
-	ldrh	r3, [r3]
-	cmp	r3, r4
-	bhi	.L2377
-	movs	r0, #0
-	b	.L2364
-.L2367:
-	ldr	r1, [sp, #4]
-	ldrh	r2, [r1], #2
-	cmp	r2, ip
-	str	r1, [sp, #4]
-	beq	.L2366
-	mla	r1, lr, r6, r0
-	orr	r2, r4, r2, lsl #10
-	str	r2, [r1, #4]
-	movs	r2, #0
-	str	r2, [r1, #8]
-	mul	r2, r10, r6
-	adds	r6, r6, #1
-	uxth	r6, r6
-	bic	r2, r2, #3
-	mov	r7, r2
-	ldr	r2, [sp, #12]
-	add	r7, r7, r2
-	str	r7, [r1, #12]
-.L2366:
-	adds	r3, r3, #1
-	b	.L2365
-.L2376:
-	mul	r8, r10, r7
-	ldr	r2, [fp]
-	str	r2, [sp, #20]
-	add	r3, r2, r8
-	ldr	r1, [r3, #4]
-	str	r3, [sp, #12]
-	ubfx	r0, r1, #10, #16
-	str	r1, [sp, #4]
-	bl	P2V_plane
-	ldr	r2, [sp, #20]
-	ldr	r1, [sp, #4]
-	ldr	r2, [r2, r8]
-	cbnz	r2, .L2369
-	ldr	r3, [sp, #12]
-	movw	ip, #65535
-	adds	r7, r7, #1
-	ldr	r3, [r3, #12]
-	ldrh	r2, [r3]
-	cmp	r2, ip
-	bne	.L2370
-	ldr	r3, .L2387+20
-	movs	r2, #1
-	str	r2, [r3]
-.L2364:
-	ldr	r2, [sp, #16]
-	movw	r3, #65535
-	strb	r0, [r5, #6]
-	mov	r1, r4
-	strh	r4, [r5, #2]	@ movhi
-	strh	r3, [r2]	@ movhi
-	mov	r2, r0
-	mov	r0, r5
-	bl	ftl_sb_update_avl_pages
-	ldr	r0, [sp, #8]
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2370:
-	ldr	r2, [r3, #8]
-	ldr	r0, [r3, #12]
-	bl	FtlGcUpdatePage
-	b	.L2368
-.L2369:
-	mov	r2, r1
-	ldr	r0, .L2387+24
-	ldrh	r1, [r5]
-	bl	printf
-	ldr	r3, .L2387+28
-	ldrh	r2, [r5]
-	ldr	r3, [r3]
-	cbnz	r3, .L2371
-	ldr	r3, .L2387+32
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2372
-.L2371:
-	ldr	r3, .L2387+36
-	ldr	r3, [r3]
-	ldrh	r3, [r3, r2, lsl #1]
-	cmp	r3, #159
-	bls	.L2373
-.L2372:
-	ldr	r3, [fp]
-	ldr	r3, [r3, r8]
-	adds	r3, r3, #1
-	bne	.L2374
-.L2373:
-	ldr	r3, [fp]
-	add	r3, r3, r8
-	ldr	r3, [r3, #4]
-	str	r3, [sp, #8]
-.L2374:
-	ldr	r3, .L2387+40
-	movs	r4, #0
-	ldr	r3, [r3]
-	strh	r4, [r3, r2, lsl #1]	@ movhi
-	ldrh	r0, [r5]
-	bl	INSERT_FREE_LIST
-	movw	r3, #65535
-	strh	r3, [r5]	@ movhi
-	bl	FtlGcPageVarInit
-	b	.L2375
-.L2388:
-	.align	2
-.L2387:
-	.word	.LANCHOR226
-	.word	.LANCHOR53
-	.word	.LANCHOR38
-	.word	.LANCHOR106
-	.word	.LANCHOR59
-	.word	.LANCHOR135
-	.word	.LC52
-	.word	.LANCHOR28
-	.word	.LANCHOR8
-	.word	.LANCHOR79
-	.word	.LANCHOR84
-	.word	.LANCHOR180
-	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
-	.section	.text.FlashReadFacBbtData,"ax",%progbits
-	.align	1
-	.global	FlashReadFacBbtData
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FlashReadFacBbtData, %function
-FlashReadFacBbtData:
-	@ args = 0, pretend = 0, frame = 48
+	.type	FlashReadFacBbtData, %function
+FlashReadFacBbtData:
+	@ args = 0, pretend = 0, frame = 48
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	fp, r2
-	ldr	r2, .L2402
+	ldr	r2, .L2451
 	sub	sp, sp, #48
 	mov	r6, r1
 	mov	r4, r0
-	ldr	r7, .L2402+4
+	ldr	r7, .L2451+4
 	ldrh	r3, [r2, #14]
 	ldrh	r2, [r2, #12]
 	smulbb	r3, r3, r2
 	ldr	r2, [r7]
 	uxth	r3, r3
 	str	r2, [sp, #20]
-	ldr	r2, .L2402+8
+	ldr	r2, .L2451+8
 	subs	r5, r3, #1
 	mul	r10, r6, r3
 	uxth	r5, r5
@@ -17114,12 +17244,12 @@ FlashReadFacBbtData:
 	ldr	r1, [r2]
 	mov	r8, r2
 	str	r1, [sp, #24]
-.L2390:
+.L2439:
 	cmp	r3, r5
-	ble	.L2397
+	ble	.L2446
 	mov	r0, #-1
-	b	.L2389
-.L2397:
+	b	.L2438
+.L2446:
 	add	r2, r5, r10
 	add	r0, sp, #12
 	lsls	r2, r2, #10
@@ -17131,60 +17261,60 @@ FlashReadFacBbtData:
 	ldr	r2, [sp, #12]
 	ldr	r3, [sp, #4]
 	adds	r2, r2, #1
-	beq	.L2391
+	beq	.L2440
 	ldr	r2, [r8]
 	ldrh	r1, [r2]
 	movw	r2, #61664
 	cmp	r1, r2
-	bne	.L2391
-	cbz	r4, .L2398
-	cbz	r6, .L2393
-.L2396:
+	bne	.L2440
+	cbz	r4, .L2447
+	cbz	r6, .L2442
+.L2445:
 	mov	r2, fp
 	ldr	r1, [r7]
 	mov	r0, r4
 	bl	ftl_memcpy
 	movs	r3, #4
-	ldr	r0, .L2402+12
+	ldr	r0, .L2451+12
 	mov	r2, r3
 	mov	r1, r4
 	bl	rknand_print_hex
 	movs	r0, #0
-.L2389:
+.L2438:
 	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2393:
+.L2442:
 	ldr	r1, [r7]
 	mov	ip, #1
-	ldr	r5, .L2402+16
-.L2394:
+	ldr	r5, .L2451+16
+.L2443:
 	ldr	r0, [r5]
 	uxth	r3, r6
 	adds	r6, r6, #1
 	cmp	r3, r0
-	bcs	.L2396
+	bcs	.L2445
 	lsrs	r0, r3, #5
 	and	r3, r3, #31
 	lsl	r3, ip, r3
 	ldr	r2, [r1, r0, lsl #2]
 	orrs	r3, r3, r2
 	str	r3, [r1, r0, lsl #2]
-	b	.L2394
-.L2391:
+	b	.L2443
+.L2440:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L2390
-.L2398:
+	b	.L2439
+.L2447:
 	mov	r0, r4
-	b	.L2389
-.L2403:
+	b	.L2438
+.L2452:
 	.align	2
-.L2402:
-	.word	.LANCHOR15
+.L2451:
+	.word	.LANCHOR14
 	.word	.LANCHOR147
 	.word	.LANCHOR197
-	.word	.LC53
+	.word	.LC52
 	.word	.LANCHOR149
 	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
 	.section	.text.FlashGetBadBlockList,"ax",%progbits
@@ -17200,8 +17330,8 @@ FlashGetBadBlockList:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r5, r0
-	ldr	r3, .L2414
-	ldr	r6, .L2414+4
+	ldr	r3, .L2463
+	ldr	r6, .L2463+4
 	ldr	r3, [r3]
 	ldr	r0, [r6]
 	ldrb	r4, [r3, #13]	@ zero_extendqisi2
@@ -17212,25 +17342,25 @@ FlashGetBadBlockList:
 	asrs	r2, r2, #3
 	bl	FlashReadFacBbtData
 	adds	r0, r0, #1
-	bne	.L2405
-.L2409:
+	bne	.L2454
+.L2458:
 	movs	r3, #0
-.L2406:
+.L2455:
 	movw	r2, #65535
 	movs	r0, #0
 	strh	r2, [r5, r3, lsl #1]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.L2405:
+.L2454:
 	ldr	r7, [r6]
 	movs	r2, #0
 	lsr	ip, r4, #4
 	mov	r3, r2
 	subs	r4, r4, #1
 	mov	lr, #1
-.L2407:
+.L2456:
 	uxth	r1, r2
 	cmp	r1, r4
-	bge	.L2406
+	bge	.L2455
 	lsrs	r6, r1, #5
 	and	r0, r1, #31
 	lsl	r0, lr, r0
@@ -17242,11 +17372,11 @@ FlashGetBadBlockList:
 	strhne	r1, [r5, r3, lsl #1]	@ movhi
 	uxthne	r3, r0
 	cmp	r3, ip
-	bcc	.L2407
-	b	.L2409
-.L2415:
+	bcc	.L2456
+	b	.L2458
+.L2464:
 	.align	2
-.L2414:
+.L2463:
 	.word	.LANCHOR18
 	.word	.LANCHOR153
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
@@ -17261,66 +17391,66 @@ FlashGetBadBlockList:
 FtlMakeBbt:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2436
+	ldr	r3, .L2485
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	ldr	r7, [r3]
 	cmp	r7, #0
-	bne	.L2417
-	ldr	r8, .L2436+40
-	ldr	r4, .L2436+4
+	bne	.L2466
+	ldr	r8, .L2485+40
+	ldr	r4, .L2485+4
 	bl	FtlBbtMemInit
 	sub	r10, r8, #18
 	bl	FtlLoadFactoryBbt
-.L2418:
-	ldr	r3, .L2436+8
+.L2467:
+	ldr	r3, .L2485+8
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	bcc	.L2424
-	ldr	r5, .L2436+12
+	bcc	.L2473
+	ldr	r5, .L2485+12
 	movs	r4, #0
-.L2425:
+.L2474:
 	ldrh	r3, [r5]
 	uxth	r0, r4
 	adds	r4, r4, #1
 	cmp	r3, r0
-	bhi	.L2426
-	ldr	r4, .L2436+16
+	bhi	.L2475
+	ldr	r4, .L2485+16
 	movw	r6, #65535
 	ldrh	r5, [r4, #12]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L2427:
+.L2476:
 	ldrh	r3, [r4, #12]
 	subs	r3, r3, #47
 	cmp	r3, r5
-	bgt	.L2431
+	bgt	.L2480
 	mov	r0, r5
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L2428
+	beq	.L2477
 	mov	r0, r5
 	bl	FlashTestBlk
 	cmp	r0, #0
-	beq	.L2429
+	beq	.L2478
 	mov	r0, r5
 	bl	FtlBbmMapBadBlock
-.L2428:
+.L2477:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L2427
-.L2424:
-	ldr	r3, .L2436+20
+	b	.L2476
+.L2473:
+	ldr	r3, .L2485+20
 	movw	r1, #65535
 	ldrh	r2, [r10, #2]!
 	ldr	r0, [r3]
-	ldr	r3, .L2436+24
+	ldr	r3, .L2485+24
 	cmp	r2, r1
 	str	r0, [r4, #8]
 	ldr	fp, [r3]
 	str	r3, [sp, #4]
-	ldr	r3, .L2436+28
+	ldr	r3, .L2485+28
 	str	fp, [r4, #12]
-	beq	.L2419
+	beq	.L2468
 	ldrh	r6, [r3]
 	mov	r0, r4
 	str	r3, [sp]
@@ -17337,13 +17467,13 @@ FtlMakeBbt:
 	adds	r2, r2, #7
 	asrs	r2, r2, #3
 	bl	ftl_memcpy
-.L2420:
+.L2469:
 	uxth	r0, r6
 	adds	r7, r7, #1
 	add	r8, r8, #4
 	bl	FtlBbmMapBadBlock
-	b	.L2418
-.L2419:
+	b	.L2467
+.L2468:
 	mov	r1, r7
 	str	r3, [sp]
 	bl	FlashGetBadBlockList
@@ -17352,17 +17482,17 @@ FtlMakeBbt:
 	bl	FtlBbt2Bitmap
 	ldr	r3, [sp]
 	ldrh	r5, [r3]
-.L2422:
+.L2471:
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L2421:
+.L2470:
 	ldr	r3, [sp]
 	ldrh	r0, [r3]
 	smlabb	r0, r0, r7, r5
 	uxth	r0, r0
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L2422
+	beq	.L2471
 	ldr	r3, [sp, #4]
 	movs	r2, #16
 	movs	r1, #0
@@ -17382,7 +17512,7 @@ FtlMakeBbt:
 	mla	r6, r7, r6, r3
 	lsls	r3, r6, #10
 	str	r3, [r4, #4]
-	ldr	r3, .L2436+32
+	ldr	r3, .L2485+32
 	ldrh	r2, [r3]
 	lsls	r2, r2, #2
 	bl	ftl_memcpy
@@ -17397,23 +17527,23 @@ FtlMakeBbt:
 	bl	FlashProgPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	bne	.L2420
+	bne	.L2469
 	uxth	r0, r6
 	bl	FtlBbmMapBadBlock
-	b	.L2421
-.L2426:
+	b	.L2470
+.L2475:
 	bl	FtlBbmMapBadBlock
-	b	.L2425
-.L2429:
+	b	.L2474
+.L2478:
 	ldrh	r3, [r4]
 	cmp	r3, r6
-	bne	.L2430
+	bne	.L2479
 	strh	r5, [r4]	@ movhi
-	b	.L2428
-.L2430:
+	b	.L2477
+.L2479:
 	strh	r5, [r4, #4]	@ movhi
-.L2431:
-	ldr	r3, .L2436+36
+.L2480:
+	ldr	r3, .L2485+36
 	movs	r5, #0
 	str	r5, [r4, #8]
 	movs	r2, #2
@@ -17441,25 +17571,25 @@ FtlMakeBbt:
 	strh	r2, [r4]	@ movhi
 	strh	r3, [r4, #4]	@ movhi
 	bl	FtlBbmTblFlush
-.L2417:
+.L2466:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2437:
+.L2486:
 	.align	2
-.L2436:
-	.word	.LANCHOR77
+.L2485:
+	.word	.LANCHOR76
 	.word	.LANCHOR202
 	.word	.LANCHOR45
-	.word	.LANCHOR60
-	.word	.LANCHOR75
+	.word	.LANCHOR59
+	.word	.LANCHOR74
 	.word	.LANCHOR183
 	.word	.LANCHOR188
 	.word	.LANCHOR51
 	.word	.LANCHOR123
-	.word	.LANCHOR78
-	.word	.LANCHOR75+28
+	.word	.LANCHOR77
+	.word	.LANCHOR74+28
 	.size	FtlMakeBbt, .-FtlMakeBbt
 	.section	.text.log2phys,"ax",%progbits
 	.align	1
@@ -17470,43 +17600,44 @@ FtlMakeBbt:
 	.fpu softvfp
 	.type	log2phys, %function
 log2phys:
-	@ args = 0, pretend = 0, frame = 16
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L2457
-	str	r2, [sp, #8]
-	ldrh	r3, [r3]
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #24
+	ldr	r4, .L2505
+	mov	fp, r0
+	str	r2, [sp, #16]
+	ldr	r2, [r4]
+	ldr	r3, .L2505+4
 	str	r1, [sp, #4]
-	adds	r2, r3, #7
-	movs	r3, #1
-	lsls	r3, r3, r2
-	lsr	r7, r0, r2
-	subs	r3, r3, #1
-	uxth	r6, r7
-	ands	r3, r3, r0
-	uxth	fp, r3
-	ldr	r3, .L2457+4
-	ldr	r3, [r3]
-	cmp	r0, r3
-	bcc	.L2439
-	ldr	r1, .L2457+8
-	mov	r2, #880
-	ldr	r0, .L2457+12
+	cmp	r0, r2
+	ldrh	r5, [r3]
+	bcc	.L2488
+	ldr	r1, .L2505+8
+	mov	r2, #884
+	ldr	r0, .L2505+12
 	bl	printf
-	ldr	r1, .L2457+16
-	ldr	r0, .L2457+20
+	ldr	r1, .L2505+16
+	ldr	r0, .L2505+20
 	bl	printf
-.L2439:
-	ldr	r5, .L2457+24
+.L2488:
+	ldr	r3, [r4]
+	cmp	fp, r3
+	bcs	.L2489
+	adds	r3, r5, #7
+	ldr	r5, .L2505+24
+	lsr	r7, fp, r3
+	str	r3, [sp, #8]
+	ldr	r3, .L2505+28
 	movs	r4, #12
-	ldr	r3, .L2457+28
 	ldr	r1, [r5]
+	uxth	r6, r7
 	ldrh	r2, [r3]
 	movs	r3, #0
-.L2440:
+.L2490:
 	uxth	r10, r3
 	cmp	r10, r2
-	bcc	.L2445
+	bcc	.L2495
 	bl	select_l2p_ram_region
 	muls	r4, r0, r4
 	ldr	r3, [r5]
@@ -17515,98 +17646,112 @@ log2phys:
 	adds	r2, r3, r4
 	movw	r3, #65535
 	cmp	r1, r3
-	beq	.L2446
+	beq	.L2496
 	ldr	r3, [r2, #4]
 	cmp	r3, #0
-	bge	.L2446
+	bge	.L2496
 	bl	flush_l2p_region
-.L2446:
-	ldr	r3, .L2457+32
+.L2496:
+	ldr	r3, .L2505+32
 	ldrh	r3, [r3]
 	cmp	r3, r6
-	bcs	.L2447
-	ldr	r1, .L2457+36
+	bcs	.L2497
+	ldr	r1, .L2505+36
 	movw	r2, #526
-	ldr	r0, .L2457+12
+	ldr	r0, .L2505+12
 	bl	printf
-	ldr	r1, .L2457+16
-	ldr	r0, .L2457+20
+	ldr	r1, .L2505+16
+	ldr	r0, .L2505+20
 	bl	printf
-.L2447:
-	ldr	r3, .L2457+40
+.L2497:
+	ldr	r3, .L2505+40
 	uxth	r7, r7
 	ldr	r3, [r3]
 	ldr	r3, [r3, r7, lsl #2]
 	cmp	r3, #0
-	bne	.L2448
+	bne	.L2498
 	ldr	r2, [r5]
 	movs	r1, #255
-	str	r3, [sp]
+	str	r3, [sp, #12]
 	adds	r0, r2, r4
-	ldr	r2, .L2457+44
+	ldr	r2, .L2505+44
 	ldr	r0, [r0, #8]
 	ldrh	r2, [r2]
 	bl	ftl_memset
 	ldr	r2, [r5]
-	ldr	r3, [sp]
+	ldr	r3, [sp, #12]
 	adds	r1, r2, r4
 	strh	r6, [r2, r4]	@ movhi
 	str	r3, [r1, #4]
-	b	.L2441
-.L2445:
+	b	.L2492
+.L2489:
+	ldr	r3, [sp, #16]
+	mov	r0, #-1
+	cbnz	r3, .L2487
+	ldr	r3, [sp, #4]
+	str	r0, [r3]
+.L2487:
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2495:
 	adds	r3, r3, #1
 	mla	r0, r4, r3, r1
 	ldrh	r0, [r0, #-12]
 	cmp	r0, r6
-	bne	.L2440
-.L2441:
+	bne	.L2490
+.L2492:
 	ldr	r2, [sp, #8]
-	movs	r3, #12
-	ldr	r1, .L2457+24
-	cbnz	r2, .L2442
-	ldr	r2, [r1]
-	mla	r3, r3, r10, r2
-	ldr	r2, [sp, #4]
-	ldr	r3, [r3, #8]
-	ldr	r3, [r3, fp, lsl #2]
-	str	r3, [r2]
-.L2443:
-	ldr	r2, [r1]
-	movs	r3, #12
+	movs	r3, #1
+	ldr	r0, [sp, #16]
+	ldr	r1, .L2505+24
+	lsls	r3, r3, r2
+	movs	r2, #12
+	subs	r3, r3, #1
+	and	r3, r3, fp
+	uxth	r3, r3
+	cbnz	r0, .L2493
+	ldr	r0, [r1]
+	mla	r2, r2, r10, r0
+	ldr	r2, [r2, #8]
+	ldr	r3, [r2, r3, lsl #2]
+	ldr	r2, [sp, #4]
+	str	r3, [r2]
+.L2494:
+	ldr	r2, [r1]
+	movs	r3, #12
 	mla	r10, r3, r10, r2
 	ldr	r3, [r10, #4]
 	adds	r2, r3, #1
-	beq	.L2454
+	beq	.L2503
 	adds	r3, r3, #1
 	str	r3, [r10, #4]
-.L2454:
+.L2503:
 	movs	r0, #0
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2442:
-	ldr	r2, [r5]
-	mla	r3, r3, r10, r2
-	ldr	r2, [sp, #4]
-	ldr	r0, [r2]
-	ldr	r2, [r3, #8]
-	str	r0, [r2, fp, lsl #2]
-	ldr	r2, [r3, #4]
-	orr	r2, r2, #-2147483648
-	str	r2, [r3, #4]
-	ldr	r3, .L2457+48
+	b	.L2487
+.L2493:
+	ldr	r0, [r1]
+	mla	r2, r2, r10, r0
+	ldr	r0, [sp, #4]
+	ldr	r4, [r0]
+	ldr	r0, [r2, #8]
+	str	r4, [r0, r3, lsl #2]
+	ldr	r3, [r2, #4]
+	orr	r3, r3, #-2147483648
+	str	r3, [r2, #4]
+	ldr	r3, .L2505+48
 	strh	r6, [r3]	@ movhi
-	b	.L2443
-.L2448:
+	b	.L2494
+.L2498:
 	ldr	r2, [r5]
-	ldr	r8, .L2457+80
-	str	r3, [sp, #12]
+	ldr	r8, .L2505+80
+	str	r3, [sp, #20]
 	add	r2, r2, r4
 	ldr	r2, [r2, #8]
 	mov	r0, r8
 	str	r3, [r8, #4]
 	str	r2, [r8, #8]
-	ldr	r2, .L2457+52
+	ldr	r2, .L2505+52
 	ldr	r2, [r2]
 	str	r2, [r8, #12]
 	movs	r2, #1
@@ -17614,86 +17759,86 @@ log2phys:
 	bl	FlashReadPages
 	ldr	r3, [r8, #12]
 	ldrh	r2, [r3, #8]
-	str	r3, [sp]
-	ldr	r3, [sp, #12]
+	str	r3, [sp, #12]
+	ldr	r3, [sp, #20]
 	cmp	r2, r6
-	beq	.L2449
+	beq	.L2499
 	mov	r2, r3
 	mov	r1, r7
-	ldr	r0, .L2457+56
+	ldr	r0, .L2505+56
 	bl	printf
 	movs	r3, #4
 	ldr	r1, [r8, #12]
 	mov	r2, r3
-	ldr	r0, .L2457+60
+	ldr	r0, .L2505+60
 	bl	rknand_print_hex
-	ldr	r3, .L2457+32
+	ldr	r3, .L2505+32
 	movs	r2, #4
-	ldr	r1, .L2457+40
-	ldr	r0, .L2457+64
+	ldr	r1, .L2505+40
+	ldr	r0, .L2505+64
 	ldrh	r3, [r3]
 	ldr	r1, [r1]
 	bl	rknand_print_hex
-	ldr	r3, .L2457+68
+	ldr	r3, .L2505+68
 	movs	r2, #1
 	str	r2, [r3]
-.L2450:
-	ldr	r3, [sp]
+.L2500:
+	ldr	r3, [sp, #12]
 	ldrh	r3, [r3, #8]
 	cmp	r3, r6
-	beq	.L2451
-	ldr	r1, .L2457+36
+	beq	.L2501
+	ldr	r1, .L2505+36
 	mov	r2, #552
-	ldr	r0, .L2457+12
+	ldr	r0, .L2505+12
 	bl	printf
-	ldr	r1, .L2457+16
-	ldr	r0, .L2457+20
+	ldr	r1, .L2505+16
+	ldr	r0, .L2505+20
 	bl	printf
-.L2451:
-	ldr	r3, .L2457+24
+.L2501:
+	ldr	r3, .L2505+24
 	movs	r1, #0
 	ldr	r3, [r3]
 	adds	r2, r3, r4
 	str	r1, [r2, #4]
 	strh	r6, [r3, r4]	@ movhi
-	b	.L2441
-.L2449:
+	b	.L2492
+.L2499:
 	ldr	r2, [r8]
 	cmp	r2, #256
-	bne	.L2450
+	bne	.L2500
 	mov	r2, r3
 	mov	r1, r7
-	ldr	r0, .L2457+72
+	ldr	r0, .L2505+72
 	bl	printf
 	ldr	r3, [r5]
 	mov	r1, r7
-	ldr	r0, .L2457+76
+	ldr	r0, .L2505+76
 	add	r3, r3, r4
 	ldr	r2, [r3, #8]
 	bl	FtlMapWritePage
-	b	.L2450
-.L2458:
+	b	.L2500
+.L2506:
 	.align	2
-.L2457:
-	.word	.LANCHOR57
-	.word	.LANCHOR73
-	.word	.LANCHOR227
+.L2505:
+	.word	.LANCHOR72
+	.word	.LANCHOR56
+	.word	.LANCHOR226
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LANCHOR97
-	.word	.LANCHOR68
+	.word	.LANCHOR96
 	.word	.LANCHOR67
-	.word	.LANCHOR228
+	.word	.LANCHOR66
+	.word	.LANCHOR227
 	.word	.LANCHOR131
-	.word	.LANCHOR58
-	.word	.LANCHOR98
+	.word	.LANCHOR57
+	.word	.LANCHOR97
 	.word	.LANCHOR188
-	.word	.LC54
+	.word	.LC53
 	.word	.LC27
+	.word	.LC54
+	.word	.LANCHOR76
 	.word	.LC55
-	.word	.LANCHOR77
-	.word	.LC56
 	.word	.LANCHOR127
 	.word	.LANCHOR202
 	.size	log2phys, .-log2phys
@@ -17710,73 +17855,73 @@ FtlProgPages:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r3
-	ldr	r3, .L2479
+	ldr	r3, .L2527
 	mov	r5, r0
 	mov	r10, r1
 	ldr	r7, [r3]
 	mov	r8, r3
-	cbnz	r7, .L2459
-	ldr	r3, .L2479+4
+	cbnz	r7, .L2507
+	ldr	r3, .L2527+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2474
+	cbz	r3, .L2522
 	ldrb	r6, [r4, #8]	@ zero_extendqisi2
 	subs	r3, r6, #1
 	rsbs	r6, r3, #0
 	adcs	r6, r6, r3
-.L2461:
-	ldr	fp, .L2479+40
+.L2509:
+	ldr	fp, .L2527+40
 	mov	r2, r6
 	ldrb	r3, [r4, #9]	@ zero_extendqisi2
 	mov	r1, r10
 	mov	r0, r5
 	bl	FlashProgPages
-.L2462:
+.L2510:
 	cmp	r7, r10
-	bne	.L2472
-	ldr	r3, .L2479+8
+	bne	.L2520
+	ldr	r3, .L2527+8
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L2459
-	ldr	r1, .L2479+12
+	bcc	.L2507
+	ldr	r1, .L2527+12
 	mov	r2, #1600
-	ldr	r0, .L2479+16
+	ldr	r0, .L2527+16
 	bl	printf
-	ldr	r1, .L2479+20
-	ldr	r0, .L2479+24
+	ldr	r1, .L2527+20
+	ldr	r0, .L2527+24
 	bl	printf
-.L2459:
+.L2507:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2474:
+.L2522:
 	mov	r6, r7
-	b	.L2461
-.L2465:
+	b	.L2509
+.L2513:
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r4]
 	cmp	r3, r0
-	bne	.L2463
+	bne	.L2511
 	ldr	r1, [fp]
 	ldrh	r0, [r4, #4]
 	ldrh	r2, [r1, r3, lsl #1]
 	subs	r2, r2, r0
 	strh	r2, [r1, r3, lsl #1]	@ movhi
-	ldr	r3, .L2479+28
+	ldr	r3, .L2527+28
 	ldrh	r3, [r3]
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [r4, #6]
 	strh	r3, [r4, #4]	@ movhi
-.L2463:
+.L2511:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L2464
+	cbnz	r3, .L2512
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-.L2464:
-	ldr	r2, .L2479+32
+.L2512:
+	ldr	r2, .L2527+32
 	ldr	r3, [r2, #96]
 	adds	r3, r3, #1
 	str	r3, [r2, #96]
@@ -17794,27 +17939,27 @@ FtlProgPages:
 	bl	FlashProgPages
 	ldr	r3, [r8]
 	cmp	r3, #0
-	bne	.L2459
-.L2472:
+	bne	.L2507
+.L2520:
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L2465
-	ldr	r3, .L2479+8
+	beq	.L2513
+	ldr	r3, .L2527+8
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L2466
-	ldr	r1, .L2479+12
+	bcc	.L2514
+	ldr	r1, .L2527+12
 	movw	r2, #1583
-	ldr	r0, .L2479+16
+	ldr	r0, .L2527+16
 	bl	printf
-	ldr	r1, .L2479+20
-	ldr	r0, .L2479+24
+	ldr	r1, .L2527+20
+	ldr	r0, .L2527+24
 	bl	printf
-.L2466:
+.L2514:
 	ldr	r3, [r5, #4]
-	cbnz	r6, .L2467
-.L2478:
+	cbnz	r6, .L2515
+.L2526:
 	movs	r2, #1
 	add	r1, sp, #12
 	ldr	r0, [r5, #16]
@@ -17828,39 +17973,39 @@ FtlProgPages:
 	ldr	r2, [sp, #4]
 	mov	r3, r0
 	adds	r2, r2, #1
-	beq	.L2469
+	beq	.L2517
 	ldr	r2, [fp]
 	ldrh	r2, [r2, r0, lsl #1]
-	cbnz	r2, .L2470
+	cbnz	r2, .L2518
 	mov	r1, r0
 	str	r0, [sp, #4]
-	ldr	r0, .L2479+36
+	ldr	r0, .L2527+36
 	bl	printf
 	ldr	r3, [sp, #4]
-.L2470:
+.L2518:
 	mov	r0, r3
 	bl	decrement_vpc_count
-.L2469:
+.L2517:
 	adds	r7, r7, #1
 	adds	r5, r5, #36
-	b	.L2462
-.L2467:
+	b	.L2510
+.L2515:
 	orr	r3, r3, #-2147483648
-	b	.L2478
-.L2480:
+	b	.L2526
+.L2528:
 	.align	2
-.L2479:
-	.word	.LANCHOR77
-	.word	.LANCHOR8
+.L2527:
+	.word	.LANCHOR76
+	.word	.LANCHOR15
 	.word	.LANCHOR38
-	.word	.LANCHOR229
+	.word	.LANCHOR228
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LANCHOR53
+	.word	.LANCHOR52
 	.word	.LANCHOR138
-	.word	.LC57
-	.word	.LANCHOR84
+	.word	.LC56
+	.word	.LANCHOR83
 	.size	FtlProgPages, .-FtlProgPages
 	.section	.text.FtlCacheWriteBack,"ax",%progbits
 	.align	1
@@ -17874,27 +18019,27 @@ FtlCacheWriteBack:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	ldr	r3, .L2486
+	ldr	r3, .L2534
 	ldr	r4, [r3]
-	cbnz	r4, .L2482
-	ldr	r5, .L2486+4
+	cbnz	r4, .L2530
+	ldr	r5, .L2534+4
 	ldr	r0, [r5]
-	cbz	r0, .L2482
-	ldr	r3, .L2486+8
+	cbz	r0, .L2530
+	ldr	r3, .L2534+8
 	mov	r2, r4
 	movs	r1, #1
 	ldr	r3, [r3]
 	bl	FtlProgPages
 	str	r4, [r5]
-.L2482:
+.L2530:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L2487:
+.L2535:
 	.align	2
-.L2486:
-	.word	.LANCHOR77
+.L2534:
+	.word	.LANCHOR76
 	.word	.LANCHOR132
-	.word	.LANCHOR230
+	.word	.LANCHOR229
 	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
 	.section	.text.FtlSysFlush,"ax",%progbits
 	.align	1
@@ -17908,21 +18053,21 @@ FtlSysFlush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L2490
+	ldr	r3, .L2538
 	ldr	r3, [r3]
-	cbnz	r3, .L2489
+	cbnz	r3, .L2537
 	bl	FtlCacheWriteBack
 	bl	l2p_flush
 	movs	r0, #1
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L2489:
+.L2537:
 	movs	r0, #0
 	pop	{r3, pc}
-.L2491:
+.L2539:
 	.align	2
-.L2490:
-	.word	.LANCHOR77
+.L2538:
+	.word	.LANCHOR76
 	.size	FtlSysFlush, .-FtlSysFlush
 	.section	.text.FtlDeInit,"ax",%progbits
 	.align	1
@@ -17936,18 +18081,18 @@ FtlDeInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L2494
+	ldr	r3, .L2542
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L2493
+	bne	.L2541
 	bl	FtlSysFlush
-.L2493:
+.L2541:
 	movs	r0, #0
 	pop	{r3, pc}
-.L2495:
+.L2543:
 	.align	2
-.L2494:
-	.word	.LANCHOR231
+.L2542:
+	.word	.LANCHOR230
 	.size	FtlDeInit, .-FtlDeInit
 	.section	.text.rk_ftl_de_init,"ax",%progbits
 	.align	1
@@ -17977,28 +18122,28 @@ rk_ftl_de_init:
 ftl_discard:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2512
+	ldr	r3, .L2560
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r5, r2
 	adds	r2, r1, r2
 	mov	r6, r1
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L2505
+	bhi	.L2553
 	cmp	r5, #31
-	bhi	.L2499
-.L2500:
+	bhi	.L2547
+.L2548:
 	movs	r0, #0
-.L2497:
+.L2545:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L2499:
-	ldr	r3, .L2512+4
+.L2547:
+	ldr	r3, .L2560+4
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L2500
-	ldr	r8, .L2512+16
+	bne	.L2548
+	ldr	r8, .L2560+16
 	bl	FtlCacheWriteBack
 	mov	r0, r6
 	ldrh	r4, [r8]
@@ -18008,7 +18153,7 @@ ftl_discard:
 	mov	r7, r0
 	subs	r6, r6, r3
 	uxth	r6, r6
-	cbz	r6, .L2501
+	cbz	r6, .L2549
 	subs	r4, r4, r6
 	adds	r7, r7, #1
 	cmp	r4, r5
@@ -18016,32 +18161,32 @@ ftl_discard:
 	movcs	r4, r5
 	uxth	r4, r4
 	subs	r5, r5, r4
-.L2501:
-	ldr	r4, .L2512+8
+.L2549:
+	ldr	r4, .L2560+8
 	mov	r3, #-1
-	ldr	r6, .L2512+12
+	ldr	r6, .L2560+12
 	str	r3, [sp, #4]
-.L2502:
+.L2550:
 	ldrh	r3, [r8]
 	cmp	r5, r3
-	bcs	.L2504
-	ldr	r3, .L2512+8
+	bcs	.L2552
+	ldr	r3, .L2560+8
 	ldr	r2, [r3]
 	cmp	r2, #32
-	bls	.L2500
+	bls	.L2548
 	movs	r4, #0
 	str	r4, [r3]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L2500
-.L2504:
+	b	.L2548
+.L2552:
 	movs	r2, #0
 	mov	r1, sp
 	mov	r0, r7
 	bl	log2phys
 	ldr	r3, [sp]
 	adds	r3, r3, #1
-	beq	.L2503
+	beq	.L2551
 	ldr	r3, [r4]
 	movs	r2, #1
 	add	r1, sp, #4
@@ -18056,22 +18201,22 @@ ftl_discard:
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L2503:
+.L2551:
 	ldrh	r3, [r8]
 	adds	r7, r7, #1
 	subs	r5, r5, r3
-	b	.L2502
-.L2505:
+	b	.L2550
+.L2553:
 	mov	r0, #-1
-	b	.L2497
-.L2513:
+	b	.L2545
+.L2561:
 	.align	2
-.L2512:
-	.word	.LANCHOR69
-	.word	.LANCHOR77
-	.word	.LANCHOR232
+.L2560:
+	.word	.LANCHOR68
+	.word	.LANCHOR76
+	.word	.LANCHOR231
 	.word	.LANCHOR163
-	.word	.LANCHOR56
+	.word	.LANCHOR55
 	.size	ftl_discard, .-ftl_discard
 	.section	.text.Ftlscanalldata,"ax",%progbits
 	.align	1
@@ -18086,60 +18231,60 @@ Ftlscanalldata:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r5, #0
-	ldr	r7, .L2528
+	ldr	r7, .L2576
 	sub	sp, sp, #32
 	movs	r1, #0
-	ldr	r8, .L2528+24
-	ldr	r0, .L2528+4
+	ldr	r8, .L2576+24
+	ldr	r0, .L2576+4
 	bl	printf
-.L2515:
+.L2563:
 	ldr	r3, [r7]
 	cmp	r5, r3
-	bcc	.L2521
+	bcc	.L2569
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L2521:
+.L2569:
 	movs	r2, #0
 	add	r1, sp, #28
 	mov	r0, r5
 	bl	log2phys
 	ubfx	r3, r5, #0, #11
-	cbnz	r3, .L2516
+	cbnz	r3, .L2564
 	ldr	r2, [sp, #28]
 	mov	r1, r5
 	mov	r0, r8
 	bl	printf
-.L2516:
+.L2564:
 	ldr	r3, [sp, #28]
 	adds	r2, r3, #1
-	beq	.L2518
-	ldr	r4, .L2528+8
+	beq	.L2566
+	ldr	r4, .L2576+8
 	movs	r2, #0
 	movs	r1, #1
 	str	r3, [r4, #4]
 	mov	r0, r4
-	ldr	r3, .L2528+12
+	ldr	r3, .L2576+12
 	str	r5, [r4, #16]
 	str	r2, [r4]
 	ldr	r3, [r3]
 	str	r3, [r4, #8]
-	ldr	r3, .L2528+16
+	ldr	r3, .L2576+16
 	ldr	r6, [r3]
 	str	r6, [r4, #12]
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	cmp	r3, #256
-	beq	.L2519
+	beq	.L2567
 	adds	r3, r3, #1
-	beq	.L2519
+	beq	.L2567
 	ldr	r3, [r6, #8]
 	cmp	r5, r3
-	beq	.L2518
-.L2519:
+	beq	.L2566
+.L2567:
 	ldr	r2, [r4, #8]
 	ldr	r3, [r4, #12]
-	ldr	r0, .L2528+20
+	ldr	r0, .L2576+20
 	ldr	r1, [r2, #4]
 	str	r1, [sp, #16]
 	mov	r1, r5
@@ -18154,19 +18299,19 @@ Ftlscanalldata:
 	ldr	r2, [r4, #4]
 	ldr	r3, [r3]
 	bl	printf
-.L2518:
+.L2566:
 	adds	r5, r5, #1
-	b	.L2515
-.L2529:
+	b	.L2563
+.L2577:
 	.align	2
-.L2528:
-	.word	.LANCHOR73
-	.word	.LC58
+.L2576:
+	.word	.LANCHOR72
+	.word	.LC57
 	.word	.LANCHOR202
 	.word	.LANCHOR183
 	.word	.LANCHOR188
-	.word	.LC60
 	.word	.LC59
+	.word	.LC58
 	.size	Ftlscanalldata, .-Ftlscanalldata
 	.section	.text.FtlReUsePrevPpa,"ax",%progbits
 	.align	1
@@ -18181,7 +18326,7 @@ FtlReUsePrevPpa:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r6, r0
-	ldr	r5, .L2540
+	ldr	r5, .L2588
 	ubfx	r0, r1, #10, #16
 	str	r1, [sp, #4]
 	bl	P2V_block_in_plane
@@ -18189,15 +18334,15 @@ FtlReUsePrevPpa:
 	mov	r7, r0
 	ldrh	r3, [r2, r0, lsl #1]
 	cmp	r3, #0
-	bne	.L2531
-	ldr	r2, .L2540+4
+	bne	.L2579
+	ldr	r2, .L2588+4
 	ldr	r4, [r2]
 	cmp	r4, #0
-	beq	.L2532
-	ldr	r2, .L2540+8
+	beq	.L2580
+	ldr	r2, .L2588+8
 	movw	lr, #65535
-	ldr	ip, .L2540+32
-	ldr	r0, .L2540+12
+	ldr	ip, .L2588+32
+	ldr	r0, .L2588+12
 	ldr	r2, [r2]
 	ldrh	r1, [r0]
 	mov	r8, r0
@@ -18206,25 +18351,25 @@ FtlReUsePrevPpa:
 	mul	r4, ip, r4
 	mov	ip, #6
 	uxth	r4, r4
-.L2533:
+.L2581:
 	uxth	r0, r3
 	cmp	r1, r0
-	bls	.L2532
+	bls	.L2580
 	cmp	r4, r7
-	bne	.L2534
+	bne	.L2582
 	mov	r1, r4
-	ldr	r0, .L2540+4
+	ldr	r0, .L2588+4
 	bl	List_remove_node
 	ldrh	r3, [r8]
-	cbnz	r3, .L2535
-	ldr	r1, .L2540+16
-	movw	r2, #2070
-	ldr	r0, .L2540+20
+	cbnz	r3, .L2583
+	ldr	r1, .L2588+16
+	movw	r2, #2097
+	ldr	r0, .L2588+20
 	bl	printf
-	ldr	r1, .L2540+24
-	ldr	r0, .L2540+28
+	ldr	r1, .L2588+24
+	ldr	r0, .L2588+28
 	bl	printf
-.L2535:
+.L2583:
 	ldrh	r3, [r8]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -18232,17 +18377,17 @@ FtlReUsePrevPpa:
 	bl	INSERT_DATA_LIST
 	ldr	r2, [r5]
 	ldrh	r3, [r2, r7, lsl #1]
-.L2531:
+.L2579:
 	adds	r3, r3, #1
 	strh	r3, [r2, r7, lsl #1]	@ movhi
-	b	.L2532
-.L2534:
+	b	.L2580
+.L2582:
 	mul	r4, ip, r4
 	adds	r3, r3, #1
 	ldrh	r4, [r2, r4]
 	cmp	r4, lr
-	bne	.L2533
-.L2532:
+	bne	.L2581
+.L2580:
 	movs	r2, #1
 	add	r1, sp, #4
 	mov	r0, r6
@@ -18250,14 +18395,14 @@ FtlReUsePrevPpa:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L2541:
+.L2589:
 	.align	2
-.L2540:
-	.word	.LANCHOR84
+.L2588:
+	.word	.LANCHOR83
+	.word	.LANCHOR87
+	.word	.LANCHOR81
 	.word	.LANCHOR88
-	.word	.LANCHOR82
-	.word	.LANCHOR89
-	.word	.LANCHOR233
+	.word	.LANCHOR232
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
@@ -18280,181 +18425,181 @@ FtlRecoverySuperblock:
 	mov	r10, r0
 	sub	sp, sp, #56
 	cmp	r3, r2
-	beq	.L2702
+	beq	.L2751
 	ldrh	r3, [r0, #2]
 	str	r3, [sp, #12]
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	ldr	r1, [sp, #12]
 	str	r3, [sp, #28]
-	ldr	r3, .L2711
+	ldr	r3, .L2760
 	ldrh	r3, [r3]
 	cmp	r3, r1
 	mov	r3, #0
-	bne	.L2545
+	bne	.L2593
 	strh	r3, [r0, #4]	@ movhi
-.L2709:
+.L2758:
 	strb	r3, [r10, #6]
-.L2702:
+.L2751:
 	movs	r0, #0
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2545:
+.L2593:
 	ldrh	r0, [r0, #16]
-.L2546:
+.L2594:
 	cmp	r0, r2
 	uxth	r5, r3
 	add	r3, r3, #1
-	beq	.L2547
+	beq	.L2595
 	ldrb	r1, [r10, #8]	@ zero_extendqisi2
 	cmp	r1, #1
-	bne	.L2548
+	bne	.L2596
 	bl	FtlGetLastWrittenPage
 	adds	r6, r0, #1
 	mov	r4, r0
-	beq	.L2549
-	ldr	r3, .L2711+4
+	beq	.L2597
+	ldr	r3, .L2760+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L2626
-	ldr	r3, .L2711+8
+	bne	.L2675
+	ldr	r3, .L2760+8
 	ldrh	r5, [r3, r0, lsl #1]
-.L2550:
-	ldr	r3, .L2711+12
+.L2598:
+	ldr	r3, .L2760+12
 	movw	r8, #65535
 	mov	fp, #36
 	ldrh	ip, [r3]
-	ldr	r3, .L2711+16
+	ldr	r3, .L2760+16
 	ldr	r0, [r3]
-	ldr	r3, .L2711+20
+	ldr	r3, .L2760+20
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
-	ldr	r3, .L2711+24
+	ldr	r3, .L2760+24
 	ldrh	lr, [r3]
 	add	r3, r10, #16
 	str	r3, [sp, #20]
 	str	r3, [sp, #4]
 	movs	r3, #0
 	mov	r6, r3
-.L2551:
+.L2599:
 	uxth	r2, r3
 	cmp	ip, r2
-	bhi	.L2555
+	bhi	.L2603
 	ldrb	r3, [r10, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L2627
-	ldr	r3, .L2711+4
+	bne	.L2676
+	ldr	r3, .L2760+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	adds	r3, r3, #0
 	it	ne
 	movne	r3, #1
-.L2703:
+.L2752:
 	str	r3, [sp, #36]
 	mov	r1, r6
 	ldr	r2, [sp, #36]
 	movs	r7, #0
 	bl	FlashReadPages
-	ldr	r3, .L2711+28
+	ldr	r3, .L2760+28
 	movw	fp, #65535
-	ldr	r8, .L2711+16
+	ldr	r8, .L2760+16
 	ldr	r3, [r3]
 	subs	r3, r3, #1
 	str	r3, [sp, #4]
-.L2557:
+.L2605:
 	uxth	r3, r7
 	cmp	r6, r3
-	bhi	.L2562
-	bne	.L2560
+	bhi	.L2610
+	bne	.L2608
 	adds	r4, r4, #1
 	uxth	r3, r4
 	str	r3, [sp, #8]
 	ldr	r3, [r8]
 	ldr	r0, [r3, #4]
-.L2704:
+.L2753:
 	ubfx	r0, r0, #10, #16
 	bl	P2V_plane
 	ldrb	r3, [r10, #8]	@ zero_extendqisi2
 	str	r0, [sp, #16]
 	cmp	r3, #1
-	bne	.L2564
-	ldr	r2, .L2711+4
+	bne	.L2612
+	ldr	r2, .L2760+4
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbnz	r2, .L2564
+	cbnz	r2, .L2612
 	ldr	r1, [sp, #8]
-	ldr	r2, .L2711+8
+	ldr	r2, .L2760+8
 	ldrh	r2, [r2, r1, lsl #1]
 	str	r2, [sp, #8]
-.L2564:
-	ldr	r2, .L2711
+.L2612:
+	ldr	r2, .L2760
 	ldr	r1, [sp, #8]
 	ldrh	r2, [r2]
 	cmp	r2, r1
-	bne	.L2565
+	bne	.L2613
 	ldrh	r2, [sp, #8]
 	strh	r2, [r10, #2]	@ movhi
 	movs	r2, #0
 	strb	r2, [r10, #6]
 	strh	r2, [r10, #4]	@ movhi
-.L2565:
+.L2613:
 	ldr	r2, [sp, #8]
 	ldr	r1, [sp, #12]
 	cmp	r2, r1
-	bne	.L2566
+	bne	.L2614
 	ldr	r2, [sp, #16]
 	ldr	r1, [sp, #28]
 	cmp	r2, r1
-	bne	.L2566
-.L2710:
+	bne	.L2614
+.L2759:
 	ldr	r1, [sp, #8]
 	mov	r0, r10
 	bl	ftl_sb_update_avl_pages
-	b	.L2702
-.L2547:
+	b	.L2751
+.L2595:
 	uxth	r1, r3
 	adds	r1, r1, #8
 	ldrh	r0, [r10, r1, lsl #1]
-	b	.L2546
-.L2548:
+	b	.L2594
+.L2596:
 	movs	r1, #0
 	bl	FtlGetLastWrittenPage
 	mov	r4, r0
 	adds	r0, r0, #1
-	beq	.L2549
-.L2626:
+	beq	.L2597
+.L2675:
 	mov	r5, r4
-	b	.L2550
-.L2549:
+	b	.L2598
+.L2597:
 	ldr	r3, [sp, #12]
-	cbz	r3, .L2552
-	ldr	r1, .L2711+32
-	movw	r2, #2141
-	ldr	r0, .L2711+36
+	cbz	r3, .L2600
+	ldr	r1, .L2760+32
+	movw	r2, #2168
+	ldr	r0, .L2760+36
 	bl	printf
-	ldr	r1, .L2711+40
-	ldr	r0, .L2711+44
+	ldr	r1, .L2760+40
+	ldr	r0, .L2760+44
 	bl	printf
-.L2552:
+.L2600:
 	ldr	r3, [sp, #28]
-	cbz	r3, .L2553
+	cbz	r3, .L2601
 	cmp	r5, r3
-	beq	.L2553
-	ldr	r1, .L2711+32
-	movw	r2, #2142
-	ldr	r0, .L2711+36
+	beq	.L2601
+	ldr	r1, .L2760+32
+	movw	r2, #2169
+	ldr	r0, .L2760+36
 	bl	printf
-	ldr	r1, .L2711+40
-	ldr	r0, .L2711+44
+	ldr	r1, .L2760+40
+	ldr	r0, .L2760+44
 	bl	printf
-.L2553:
+.L2601:
 	movs	r3, #0
 	strh	r3, [r10, #2]	@ movhi
-	b	.L2709
-.L2555:
+	b	.L2758
+.L2603:
 	ldr	r1, [sp, #4]
 	ldrh	r2, [r1], #2
 	cmp	r2, r8
 	str	r1, [sp, #4]
-	beq	.L2554
+	beq	.L2602
 	mla	r1, fp, r6, r0
 	orr	r2, r5, r2, lsl #10
 	str	r2, [r1, #4]
@@ -18468,36 +18613,36 @@ FtlRecoverySuperblock:
 	ldr	r2, [sp, #8]
 	add	r7, r7, r2
 	str	r7, [r1, #12]
-.L2554:
+.L2602:
 	adds	r3, r3, #1
-	b	.L2551
-.L2627:
+	b	.L2599
+.L2676:
 	movs	r3, #0
-	b	.L2703
-.L2562:
+	b	.L2752
+.L2610:
 	movs	r3, #36
 	ldr	r1, [r8]
 	muls	r3, r7, r3
 	adds	r2, r1, r3
 	ldr	r3, [r1, r3]
-	cbnz	r3, .L2558
+	cbnz	r3, .L2606
 	ldr	r2, [r2, #12]
 	ldr	r3, [r2, #4]
 	adds	r1, r3, #1
-	beq	.L2559
-	ldr	r1, .L2711+28
+	beq	.L2607
+	ldr	r1, .L2760+28
 	mov	r0, r3
 	ldr	r1, [r1]
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L2559
-	ldr	r1, .L2711+28
+	cbz	r0, .L2607
+	ldr	r1, .L2760+28
 	adds	r3, r3, #1
 	str	r3, [r1]
-.L2559:
+.L2607:
 	ldr	r3, [r2]
 	adds	r3, r3, #1
-	bne	.L2561
-.L2560:
+	bne	.L2609
+.L2608:
 	uxth	r3, r4
 	uxth	r7, r7
 	str	r3, [sp, #8]
@@ -18505,26 +18650,26 @@ FtlRecoverySuperblock:
 	ldr	r3, [r8]
 	mla	r7, r2, r7, r3
 	ldr	r0, [r7, #4]
-	b	.L2704
-.L2558:
+	b	.L2753
+.L2606:
 	ldr	r1, [r2, #4]
 	uxth	fp, r5
-	ldr	r0, .L2711+48
+	ldr	r0, .L2760+48
 	bl	printf
 	ldrh	r2, [r10]
-	ldr	r3, .L2711+52
+	ldr	r3, .L2760+52
 	strh	r2, [r3]	@ movhi
-.L2561:
+.L2609:
 	adds	r7, r7, #1
-	b	.L2557
-.L2566:
+	b	.L2605
+.L2614:
 	movw	r2, #65535
 	cmp	fp, r2
-	bne	.L2567
+	bne	.L2615
 	cmp	r3, #0
-	bne	.L2568
-.L2567:
-	ldr	r3, .L2711+56
+	bne	.L2616
+.L2615:
+	ldr	r3, .L2760+56
 	uxth	fp, r5
 	uxth	r5, r5
 	mov	r7, #-1
@@ -18543,193 +18688,193 @@ FtlRecoverySuperblock:
 	subgt	r4, fp, #7
 	ldrle	r4, [sp, #12]
 	uxthgt	r4, r4
-.L2571:
+.L2619:
 	cmp	r4, fp
-	bhi	.L2586
-	ldr	r3, .L2711+12
+	bhi	.L2634
+	ldr	r3, .L2760+12
 	movw	lr, #65535
 	mov	ip, #36
 	ldrh	r8, [r3]
-	ldr	r3, .L2711+16
+	ldr	r3, .L2760+16
 	ldr	r0, [r3]
 	ldr	r3, [sp, #20]
 	str	r3, [sp, #32]
 	movs	r3, #0
 	mov	r5, r3
-	b	.L2587
-.L2573:
+	b	.L2635
+.L2621:
 	ldr	r1, [sp, #32]
 	ldrh	r2, [r1], #2
 	cmp	r2, lr
 	str	r1, [sp, #32]
-	beq	.L2572
+	beq	.L2620
 	mla	r1, ip, r5, r0
 	adds	r5, r5, #1
 	orr	r2, r4, r2, lsl #10
 	uxth	r5, r5
 	str	r2, [r1, #4]
-.L2572:
+.L2620:
 	adds	r3, r3, #1
-.L2587:
+.L2635:
 	uxth	r2, r3
 	cmp	r8, r2
-	bhi	.L2573
+	bhi	.L2621
 	mov	r1, r5
 	ldr	r2, [sp, #36]
 	bl	FlashReadPages
-	ldr	r2, .L2711+4
+	ldr	r2, .L2760+4
 	movs	r1, #36
-	ldr	r3, .L2711+56
+	ldr	r3, .L2760+56
 	movs	r0, #0
 	movw	ip, #65535
 	ldrb	lr, [r2]	@ zero_extendqisi2
-	ldr	r2, .L2711+16
+	ldr	r2, .L2760+16
 	ldr	r3, [r3]
 	ldr	r2, [r2]
 	mla	r5, r1, r5, r2
-.L2574:
+.L2622:
 	cmp	r5, r2
-	bne	.L2584
-	cbz	r0, .L2585
-	ldr	r2, .L2711+56
+	bne	.L2632
+	cbz	r0, .L2633
+	ldr	r2, .L2760+56
 	str	r3, [r2]
-.L2585:
+.L2633:
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L2571
-.L2712:
+	b	.L2619
+.L2761:
 	.align	2
-.L2711:
-	.word	.LANCHOR53
-	.word	.LANCHOR8
+.L2760:
+	.word	.LANCHOR52
+	.word	.LANCHOR15
 	.word	.LANCHOR16
 	.word	.LANCHOR38
 	.word	.LANCHOR180
-	.word	.LANCHOR106
-	.word	.LANCHOR59
+	.word	.LANCHOR105
+	.word	.LANCHOR58
 	.word	.LANCHOR160
-	.word	.LANCHOR234
+	.word	.LANCHOR233
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC61
-	.word	.LANCHOR235
+	.word	.LC60
+	.word	.LANCHOR234
 	.word	.LANCHOR136
-.L2584:
+.L2632:
 	ldr	r1, [r2]
-	cbnz	r1, .L2575
+	cbnz	r1, .L2623
 	ldr	r1, [r2, #12]
 	ldrh	r8, [r1]
 	cmp	r8, ip
-	beq	.L2630
+	beq	.L2679
 	ldr	r1, [r1, #4]
 	cmp	r1, #-1
-	beq	.L2630
+	beq	.L2679
 	adds	r0, r7, #1
-	bne	.L2632
-	ldr	r0, .L2713
+	bne	.L2681
+	ldr	r0, .L2762
 	ldrh	r0, [r0, r4, lsl #1]
 	cmp	r0, ip
-	bne	.L2577
+	bne	.L2625
 	cmp	lr, #0
-	beq	.L2632
-.L2577:
+	beq	.L2681
+.L2625:
 	ldr	r0, [sp, #4]
 	cmp	r0, r3
 	it	ne
 	movne	r7, r3
-.L2632:
+.L2681:
 	movs	r0, #1
-	b	.L2576
-.L2575:
-	cbz	r0, .L2578
-	ldr	r2, .L2713+4
+	b	.L2624
+.L2623:
+	cbz	r0, .L2626
+	ldr	r2, .L2762+4
 	str	r3, [r2]
-.L2578:
-	ldr	r3, .L2713+8
+.L2626:
+	ldr	r3, .L2762+8
 	ldrh	r2, [r10]
 	strh	r2, [r3]	@ movhi
 	ldrb	r3, [r10, #8]	@ zero_extendqisi2
-	cbnz	r3, .L2568
-	ldr	r3, .L2713
+	cbnz	r3, .L2616
+	ldr	r3, .L2762
 	ldrh	r2, [r3, r4, lsl #1]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L2580
+	bne	.L2628
 	adds	r1, r7, #1
-	ldr	r3, .L2713+4
-	beq	.L2581
+	ldr	r3, .L2762+4
+	beq	.L2629
 	str	r7, [r3]
-.L2568:
+.L2616:
 	ldr	fp, [sp, #12]
 	movs	r2, #1
-	ldr	r6, .L2713+12
-	ldr	r3, .L2713+16
+	ldr	r6, .L2762+12
+	ldr	r3, .L2762+16
 	strh	r2, [r3]	@ movhi
-.L2588:
-	ldr	r3, .L2713+20
+.L2636:
+	ldr	r3, .L2762+20
 	movw	ip, #65535
 	ldr	r0, [r6]
 	mov	lr, #36
 	ldr	r1, [sp, #20]
 	movs	r2, #0
 	ldrh	r5, [r3]
-	ldr	r3, .L2713+24
+	ldr	r3, .L2762+24
 	str	r2, [sp, #24]
 	ldrb	r7, [r3]	@ zero_extendqisi2
-.L2589:
+.L2637:
 	uxth	r3, r2
 	cmp	r3, r5
-	bcc	.L2592
+	bcc	.L2640
 	ldr	r2, [sp, #36]
 	ldr	r1, [sp, #24]
 	bl	FlashReadPages
 	movs	r3, #0
-.L2708:
+.L2757:
 	str	r3, [sp, #32]
 	ldr	r2, [sp, #24]
 	ldrh	r3, [sp, #32]
 	cmp	r2, r3
-	bhi	.L2620
+	bhi	.L2669
 	ldrb	r3, [r10, #8]	@ zero_extendqisi2
 	add	fp, fp, #1
 	uxth	fp, fp
 	cmp	r3, #1
-	bne	.L2621
-	ldr	r3, .L2713+24
+	bne	.L2670
+	ldr	r3, .L2762+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2621
-	ldr	r3, .L2713+28
+	cbz	r3, .L2670
+	ldr	r3, .L2762+28
 	ldrh	r3, [r3]
 	cmp	r3, fp
-	bne	.L2621
+	bne	.L2670
 	ldr	r3, [sp, #8]
 	cmp	r3, fp
-	beq	.L2597
-.L2621:
-	ldr	r3, .L2713+32
+	beq	.L2645
+.L2670:
+	ldr	r3, .L2762+32
 	ldrh	r3, [r3]
 	cmp	r3, fp
-	bne	.L2588
-	ldr	r2, .L2713+20
+	bne	.L2636
+	ldr	r2, .L2762+20
 	movw	r0, #65535
 	movs	r3, #0
 	strh	fp, [r10, #2]	@ movhi
 	strh	r3, [r10, #4]	@ movhi
 	ldrh	r2, [r2]
-.L2622:
+.L2671:
 	uxth	r1, r3
 	cmp	r1, r2
-	bcs	.L2702
+	bcs	.L2751
 	ldr	r1, [sp, #20]
 	ldrh	r4, [r1], #2
 	cmp	r4, r0
 	str	r1, [sp, #20]
 	add	r1, r3, #1
-	bne	.L2709
+	bne	.L2758
 	mov	r3, r1
-	b	.L2622
-.L2581:
+	b	.L2671
+.L2629:
 	ldr	r2, [sp, #4]
 	ldr	r1, [sp, #24]
 	cmp	r2, r1
@@ -18737,62 +18882,62 @@ FtlRecoverySuperblock:
 	ldreq	r2, [r3]
 	movne	r2, r1
 	addeq	r2, r2, #-1
-.L2705:
+.L2754:
 	str	r2, [r3]
-	b	.L2568
-.L2580:
+	b	.L2616
+.L2628:
 	ldr	r3, [sp, #4]
 	cmp	r6, r3
-	beq	.L2583
+	beq	.L2631
 	adds	r2, r6, #1
-	beq	.L2568
-	ldr	r3, .L2713+4
+	beq	.L2616
+	ldr	r3, .L2762+4
 	str	r6, [r3]
-	b	.L2568
-.L2583:
-	ldr	r2, .L2713+4
+	b	.L2616
+.L2631:
+	ldr	r2, .L2762+4
 	ldr	r1, [sp, #4]
 	ldr	r3, [r2]
 	cmp	r1, r3
-	beq	.L2568
+	beq	.L2616
 	subs	r3, r3, #1
 	str	r3, [r2]
-	b	.L2568
-.L2630:
+	b	.L2616
+.L2679:
 	mov	r1, r3
 	mov	r3, r6
-.L2576:
+.L2624:
 	mov	r6, r3
 	adds	r2, r2, #36
 	mov	r3, r1
-	b	.L2574
-.L2586:
+	b	.L2622
+.L2634:
 	mov	r2, #-1
-	ldr	r3, .L2713+4
-	b	.L2705
-.L2592:
+	ldr	r3, .L2762+4
+	b	.L2754
+.L2640:
 	ldrh	r3, [r1], #2
 	cmp	r3, ip
-	beq	.L2590
+	beq	.L2638
 	ldr	r4, [sp, #24]
 	orr	r3, fp, r3, lsl #10
 	mla	r4, lr, r4, r0
 	str	r3, [r4, #4]
 	ldrb	r8, [r10, #8]	@ zero_extendqisi2
 	cmp	r8, #1
-	bne	.L2591
-	cbz	r7, .L2591
+	bne	.L2639
+	cbz	r7, .L2639
 	orr	r3, r3, #-2147483648
 	str	r3, [r4, #4]
-.L2591:
+.L2639:
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	str	r3, [sp, #24]
-.L2590:
+.L2638:
 	adds	r2, r2, #1
-	b	.L2589
-.L2620:
+	b	.L2637
+.L2669:
 	ldr	r3, [sp, #32]
 	movs	r5, #36
 	ldr	r8, [r6]
@@ -18804,45 +18949,45 @@ FtlRecoverySuperblock:
 	bl	P2V_plane
 	ldr	r3, [sp, #12]
 	cmp	fp, r3
-	bcc	.L2594
-	bne	.L2595
+	bcc	.L2642
+	bne	.L2643
 	ldr	r3, [sp, #28]
 	cmp	r3, r0
-	bhi	.L2594
-.L2595:
+	bhi	.L2642
+.L2643:
 	ldr	r3, [sp, #8]
 	cmp	fp, r3
-	bne	.L2596
+	bne	.L2644
 	ldr	r3, [sp, #16]
 	cmp	r3, r0
-	beq	.L2597
-.L2596:
+	beq	.L2645
+.L2644:
 	ldr	r3, [r8, r5]
 	adds	r3, r3, #1
-	beq	.L2598
+	beq	.L2646
 	ldr	r3, [r7, #12]
 	movw	r2, #61589
 	ldrh	r1, [r3]
 	cmp	r1, r2
-	beq	.L2599
+	beq	.L2647
 	ldrh	r0, [r10]
-.L2706:
+.L2755:
 	bl	decrement_vpc_count
-	b	.L2594
-.L2599:
+	b	.L2642
+.L2647:
 	ldr	r2, [r3, #4]
 	str	r2, [sp, #4]
 	adds	r2, r2, #1
-	beq	.L2600
-	ldr	r2, .L2713+36
+	beq	.L2648
+	ldr	r2, .L2762+36
 	ldr	r0, [sp, #4]
 	ldr	r1, [r2]
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L2600
+	cbz	r0, .L2648
 	ldr	r1, [sp, #4]
 	adds	r1, r1, #1
 	str	r1, [r2]
-.L2600:
+.L2648:
 	ldr	r4, [r3, #8]
 	add	r1, sp, #48
 	ldr	r3, [r3, #12]
@@ -18850,17 +18995,17 @@ FtlRecoverySuperblock:
 	mov	r0, r4
 	str	r3, [sp, #44]
 	bl	log2phys
-	ldr	r3, .L2713+4
+	ldr	r3, .L2762+4
 	ldr	r1, [r3]
 	adds	r3, r1, #1
-	beq	.L2601
+	beq	.L2649
 	ldr	r0, [sp, #4]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L2601
+	beq	.L2649
 	ldr	r3, [sp, #44]
 	adds	r7, r3, #1
-	beq	.L2602
+	beq	.L2650
 	ldr	r0, [r6]
 	movs	r2, #0
 	movs	r1, #1
@@ -18872,152 +19017,160 @@ FtlRecoverySuperblock:
 	ldr	r1, [r2, r5]
 	adds	r3, r2, r5
 	adds	r1, r1, #1
-	bne	.L2603
-.L2604:
+	bne	.L2651
+.L2652:
 	mov	r3, #-1
 	str	r3, [sp, #44]
-.L2611:
+.L2659:
 	ldr	r7, [sp, #44]
 	adds	r0, r7, #1
-	beq	.L2594
-.L2625:
+	beq	.L2642
+.L2674:
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L2713+40
+	ldr	r3, .L2762+40
 	mov	r4, r0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bhi	.L2616
-	ldr	r1, .L2713+44
-	movw	r2, #2425
-	ldr	r0, .L2713+48
+	bhi	.L2665
+	ldr	r1, .L2762+44
+	movw	r2, #2456
+	ldr	r0, .L2762+48
 	bl	printf
-	ldr	r1, .L2713+52
-	ldr	r0, .L2713+56
+	ldr	r1, .L2762+52
+	ldr	r0, .L2762+56
 	bl	printf
-.L2616:
-	ldr	r3, .L2713+60
+.L2665:
+	ldr	r3, .L2762+60
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
 	cmp	r3, #0
-	beq	.L2617
+	beq	.L2666
 	mov	r0, r4
-	b	.L2706
-.L2602:
+	b	.L2755
+.L2650:
 	ldr	r3, [sp, #52]
 	ldr	r2, [sp, #48]
 	cmp	r2, r3
-	bne	.L2594
+	bne	.L2642
 	movs	r2, #1
 	add	r1, sp, #44
 	mov	r0, r4
 	bl	log2phys
-.L2594:
+.L2642:
 	ldr	r3, [sp, #32]
 	adds	r3, r3, #1
-	b	.L2708
-.L2603:
+	b	.L2757
+.L2651:
 	ldr	r1, [r7, #8]
 	cmp	r4, r1
-	bne	.L2604
+	bne	.L2652
 	ldr	r8, [r7, #4]
-	ldr	r0, .L2713+4
+	ldr	r0, .L2762+4
 	mov	r1, r8
 	ldr	r0, [r0]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L2604
+	beq	.L2652
 	ldr	r1, [sp, #48]
 	ldr	r0, [sp, #52]
 	cmp	r1, r0
-	bne	.L2606
-.L2609:
+	bne	.L2654
+.L2657:
 	ldr	r1, [sp, #44]
 	mov	r0, r4
 	bl	FtlReUsePrevPpa
-	b	.L2604
-.L2714:
+	b	.L2652
+.L2763:
 	.align	2
-.L2713:
+.L2762:
 	.word	.LANCHOR120
 	.word	.LANCHOR136
-	.word	.LANCHOR235
+	.word	.LANCHOR234
 	.word	.LANCHOR180
-	.word	.LANCHOR236
+	.word	.LANCHOR235
 	.word	.LANCHOR38
-	.word	.LANCHOR8
-	.word	.LANCHOR54
+	.word	.LANCHOR15
 	.word	.LANCHOR53
+	.word	.LANCHOR52
 	.word	.LANCHOR160
 	.word	.LANCHOR40
-	.word	.LANCHOR234
+	.word	.LANCHOR233
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LANCHOR84
-.L2606:
+	.word	.LANCHOR83
+.L2654:
 	ldr	r0, [sp, #44]
 	cmp	r1, r0
-	beq	.L2604
+	beq	.L2652
 	adds	r0, r1, #1
-	beq	.L2607
+	beq	.L2655
 	str	r1, [r3, #4]
 	movs	r2, #0
 	movs	r1, #1
 	mov	r0, r3
 	ldr	r7, [r3, #12]
 	bl	FlashReadPages
-.L2608:
+.L2656:
 	ldr	r3, [r6]
 	ldr	r3, [r3, r5]
 	adds	r3, r3, #1
-	beq	.L2609
+	beq	.L2657
 	ldr	r3, [r7, #4]
-	ldr	r2, .L2715
+	ldr	r2, .L2764
 	mov	r1, r3
 	ldr	r0, [r2]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L2609
+	beq	.L2657
 	mov	r1, r3
 	mov	r0, r8
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L2604
-	b	.L2609
-.L2607:
+	beq	.L2652
+	b	.L2657
+.L2655:
 	str	r1, [r2, r5]
-	b	.L2608
-.L2601:
+	b	.L2656
+.L2649:
 	ldr	r3, [sp, #52]
 	ldr	r2, [sp, #48]
 	cmp	r2, r3
-	beq	.L2611
+	beq	.L2659
+	ldr	r2, .L2764+4
+	ldr	r3, [sp, #44]
+	ldr	r2, [r2]
+	cmp	r2, r3, lsr #10
+	bhi	.L2661
+	adds	r3, r3, #1
+	bne	.L2642
+.L2661:
 	movs	r2, #1
 	add	r1, sp, #52
 	mov	r0, r4
 	bl	log2phys
 	ldr	r7, [sp, #48]
 	adds	r5, r7, #1
-	beq	.L2611
+	beq	.L2659
 	ldr	r3, [sp, #44]
 	cmp	r7, r3
-	beq	.L2625
+	beq	.L2674
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L2715+4
+	ldr	r3, .L2764+8
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L2615
-	ldr	r3, .L2715+8
+	beq	.L2664
+	ldr	r3, .L2764+12
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L2615
-	ldr	r3, .L2715+12
+	beq	.L2664
+	ldr	r3, .L2764+16
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L2611
-.L2615:
+	bne	.L2659
+.L2664:
 	ldr	r0, [r6]
 	movs	r2, #0
 	movs	r1, #1
@@ -19027,76 +19180,339 @@ FtlRecoverySuperblock:
 	ldr	r3, [r6]
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L2611
+	beq	.L2659
 	ldr	r1, [r5, #4]
 	ldr	r0, [sp, #4]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	bne	.L2611
+	bne	.L2659
 	movs	r2, #1
 	add	r1, sp, #48
 	mov	r0, r4
 	bl	log2phys
-	b	.L2611
-.L2617:
+	b	.L2659
+.L2666:
 	mov	r1, r4
-	ldr	r0, .L2715+16
+	ldr	r0, .L2764+20
 	bl	printf
-	b	.L2594
-.L2598:
+	b	.L2642
+.L2646:
 	ldrh	r3, [r10]
 	mov	r1, r4
-	ldr	r2, .L2715+20
-	ldr	r0, .L2715+24
+	ldr	r2, .L2764+24
+	ldr	r0, .L2764+28
 	strh	r3, [r2]	@ movhi
 	ldr	r2, [sp, #4]
 	bl	printf
-	ldr	r2, .L2715+28
+	ldr	r2, .L2764+32
 	ldr	r3, [r2]
 	cmp	r3, #31
-	bhi	.L2618
+	bhi	.L2667
 	ldr	r0, [sp, #52]
-	ldr	r1, .L2715+32
+	ldr	r1, .L2764+36
 	str	r0, [r1, r3, lsl #2]
 	adds	r3, r3, #1
 	str	r3, [r2]
-.L2618:
+.L2667:
 	ldrh	r0, [r10]
 	bl	decrement_vpc_count
-	ldr	r3, .L2715
+	ldr	r3, .L2764
 	ldr	r2, [r3]
 	adds	r1, r2, #1
-	bne	.L2619
+	bne	.L2668
 	ldr	r2, [sp, #4]
-.L2707:
+.L2756:
 	str	r2, [r3]
-	b	.L2594
-.L2619:
+	b	.L2642
+.L2668:
 	ldr	r1, [sp, #4]
 	cmp	r1, r2
-	bcs	.L2594
+	bcs	.L2642
 	mov	r2, r1
-	b	.L2707
-.L2597:
+	b	.L2756
+.L2645:
 	ldrb	r3, [sp, #16]	@ zero_extendqisi2
 	ldr	r2, [sp, #16]
 	strb	r3, [r10, #6]
 	ldrh	r3, [sp, #8]
 	strh	r3, [r10, #2]	@ movhi
-	b	.L2710
-.L2716:
+	b	.L2759
+.L2765:
 	.align	2
-.L2715:
+.L2764:
 	.word	.LANCHOR136
+	.word	.LANCHOR43
+	.word	.LANCHOR91
 	.word	.LANCHOR92
 	.word	.LANCHOR93
-	.word	.LANCHOR94
+	.word	.LC61
+	.word	.LANCHOR234
 	.word	.LC62
-	.word	.LANCHOR235
-	.word	.LC63
+	.word	.LANCHOR236
 	.word	.LANCHOR237
-	.word	.LANCHOR238
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
+	.section	.text.FtlGcScanTempBlk,"ax",%progbits
+	.align	1
+	.global	FtlGcScanTempBlk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcScanTempBlk, %function
+FtlGcScanTempBlk:
+	@ args = 0, pretend = 0, frame = 64
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2804
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r0
+	sub	sp, sp, #64
+	ldrh	r5, [r3]
+	movw	r3, #65535
+	cmp	r5, r3
+	beq	.L2792
+	cbnz	r5, .L2767
+.L2768:
+	bl	FtlGcPageVarInit
+	b	.L2769
+.L2792:
+	movs	r5, #0
+.L2767:
+	ldr	r3, .L2804+4
+	ldrh	r3, [r3]
+	cmp	r3, r1
+	beq	.L2768
+.L2769:
+	ldr	r8, .L2804+72
+	mov	r3, #-1
+	str	r3, [sp, #8]
+.L2770:
+	ldrh	r2, [r4]
+	movs	r3, #0
+	strb	r3, [r4, #8]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L2771
+.L2791:
+	ldr	r3, .L2804+8
+	movs	r2, #0
+	ldr	r0, [r8]
+	mov	fp, r2
+	movw	ip, #65535
+	mov	lr, #36
+	ldrh	r10, [r3]
+	ldr	r3, .L2804+12
+	ldr	r3, [r3]
+	str	r3, [sp, #12]
+	ldr	r3, .L2804+16
+	ldrh	r3, [r3]
+	str	r3, [sp, #16]
+	ldr	r3, .L2804+20
+	ldr	r3, [r3]
+	str	r3, [sp, #20]
+	ldr	r3, .L2804+24
+	ldrh	r7, [r3]
+	add	r3, r4, #16
+	str	r3, [sp, #4]
+.L2772:
+	uxth	r3, r2
+	cmp	r10, r3
+	bhi	.L2774
+	mov	r10, #0
+	movs	r2, #0
+	mov	r1, fp
+	bl	FlashReadPages
+.L2775:
+	uxth	r3, r10
+	cmp	fp, r3
+	bhi	.L2790
+	ldr	r3, .L2804+4
+	adds	r5, r5, #1
+	uxth	r5, r5
+	ldrh	r3, [r3]
+	cmp	r3, r5
+	bhi	.L2791
+.L2771:
+	ldr	r3, .L2804
+	movw	r2, #65535
+	mov	r0, r4
+	strh	r5, [r4, #2]	@ movhi
+	mov	r1, r5
+	strh	r2, [r3]	@ movhi
+	movs	r2, #0
+	strb	r2, [r4, #6]
+	bl	ftl_sb_update_avl_pages
+	ldr	r0, [sp, #8]
+	add	sp, sp, #64
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2774:
+	ldr	r1, [sp, #4]
+	ldrh	r3, [r1], #2
+	cmp	r3, ip
+	str	r1, [sp, #4]
+	beq	.L2773
+	mla	r1, lr, fp, r0
+	ldr	r6, [sp, #12]
+	orr	r3, r5, r3, lsl #10
+	str	r3, [r1, #4]
+	ldr	r3, [sp, #16]
+	mul	r3, r3, fp
+	bic	r3, r3, #3
+	add	r3, r3, r6
+	ldr	r6, [sp, #20]
+	str	r3, [r1, #8]
+	mul	r3, r7, fp
+	bic	r3, r3, #3
+	add	r3, r3, r6
+	str	r3, [r1, #12]
+	add	r3, fp, #1
+	uxth	fp, r3
+.L2773:
+	adds	r2, r2, #1
+	b	.L2772
+.L2790:
+	movs	r7, #36
+	ldr	r2, [r8]
+	mul	r7, r7, r10
+	adds	r3, r2, r7
+	ldr	r6, [r2, r7]
+	ldr	r1, [r3, #4]
+	str	r1, [sp, #4]
+	cmp	r6, #0
+	bne	.L2776
+	ldr	r3, [r3, #12]
+	movw	r2, #65535
+	ldrh	r1, [r3]
+	cmp	r1, r2
+	beq	.L2803
+	ldr	r2, .L2804+28
+	ldr	r0, [r3, #8]
+	ldr	r2, [r2]
+	cmp	r0, r2
+	bls	.L2778
+.L2803:
+	ldrh	r2, [r4]
+.L2789:
+	ldr	r3, .L2804+32
+	movs	r1, #0
+	movs	r5, #0
+	ldr	r3, [r3]
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	ldrh	r0, [r4]
+	bl	INSERT_FREE_LIST
+	movw	r3, #65535
+	strh	r3, [r4]	@ movhi
+	bl	FtlGcPageVarInit
+	b	.L2770
+.L2778:
+	ldr	r2, .L2804+36
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbnz	r2, .L2780
+.L2781:
+	ldr	r2, [r3, #8]
+	add	r10, r10, #1
+	ldr	r1, [sp, #4]
+	ldr	r0, [r3, #12]
+	bl	FtlGcUpdatePage
+	b	.L2775
+.L2780:
+	mov	r2, r6
+	add	r1, sp, #24
+	str	r3, [sp, #12]
+	bl	log2phys
+	ldr	r3, [sp, #12]
+	ldr	r1, [sp, #24]
+	ldr	r2, [r3, #12]
+	cmp	r2, r1
+	bne	.L2781
+	adds	r1, r2, #1
+	beq	.L2781
+	str	r2, [sp, #32]
+	movs	r1, #1
+	ldr	r2, .L2804+40
+	add	r0, sp, #28
+	ldr	r2, [r2]
+	str	r2, [sp, #36]
+	ldr	r2, .L2804+44
+	ldr	r2, [r2]
+	str	r2, [sp, #40]
+	mov	r2, r6
+	bl	FlashReadPages
+	ldr	r2, .L2804+48
+	ldr	r1, [r8]
+	ldr	r0, [sp, #36]
+	ldrh	r2, [r2]
+	ldr	r3, [sp, #12]
+	add	r7, r7, r1
+	lsl	ip, r2, #7
+.L2782:
+	cmp	r6, ip
+	beq	.L2781
+	ldr	r1, [r7, #8]
+	ldr	r2, [r0, r6, lsl #2]
+	ldr	r1, [r1, r6, lsl #2]
+	cmp	r1, r2
+	beq	.L2783
+	ldr	r2, [sp, #32]
+	ldrh	r1, [r4]
+	ldr	r0, .L2804+52
+	bl	printf
+	b	.L2803
+.L2783:
+	adds	r6, r6, #1
+	b	.L2782
+.L2776:
+	ldr	r2, [sp, #4]
+	ldrh	r1, [r4]
+	ldr	r0, .L2804+56
+	bl	printf
+	ldr	r3, .L2804+60
+	ldrh	r2, [r4]
+	ldr	r3, [r3]
+	cbnz	r3, .L2786
+	ldr	r3, .L2804+64
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2787
+.L2786:
+	ldr	r3, .L2804+68
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r2, lsl #1]
+	cmp	r3, #159
+	bls	.L2788
+.L2787:
+	ldr	r3, [r8]
+	ldr	r3, [r3, r7]
+	adds	r3, r3, #1
+	bne	.L2789
+.L2788:
+	ldr	r3, [r8]
+	add	r7, r7, r3
+	ldr	r3, [r7, #4]
+	str	r3, [sp, #8]
+	b	.L2789
+.L2805:
+	.align	2
+.L2804:
+	.word	.LANCHOR238
+	.word	.LANCHOR52
+	.word	.LANCHOR38
+	.word	.LANCHOR104
+	.word	.LANCHOR57
+	.word	.LANCHOR105
+	.word	.LANCHOR58
+	.word	.LANCHOR72
+	.word	.LANCHOR83
+	.word	.LANCHOR1
+	.word	.LANCHOR187
+	.word	.LANCHOR189
+	.word	.LANCHOR55
+	.word	.LC63
+	.word	.LC64
+	.word	.LANCHOR28
+	.word	.LANCHOR15
+	.word	.LANCHOR78
+	.word	.LANCHOR180
+	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
 	.section	.text.FtlGcFreeTempBlock,"ax",%progbits
 	.align	1
 	.global	FtlGcFreeTempBlock
@@ -19109,42 +19525,42 @@ FtlGcFreeTempBlock:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L2740
+	ldr	r3, .L2829
 	ldr	r3, [r3]
-	cbz	r3, .L2718
-.L2723:
+	cbz	r3, .L2807
+.L2812:
 	movs	r0, #0
-.L2717:
+.L2806:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2718:
-	ldr	r0, .L2740+4
+.L2807:
+	ldr	r0, .L2829+4
 	movw	r3, #65535
-	ldr	r5, .L2740+8
+	ldr	r5, .L2829+8
 	ldrh	r6, [r0]
 	mov	r4, r0
 	cmp	r6, r3
-	beq	.L2720
-	ldr	r3, .L2740+12
+	beq	.L2809
+	ldr	r3, .L2829+12
 	ldrh	r1, [r3]
 	bl	FtlGcScanTempBlk
 	str	r0, [sp, #12]
 	adds	r0, r0, #1
-	beq	.L2720
-	ldr	r3, .L2740+16
+	beq	.L2809
+	ldr	r3, .L2829+16
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r6, lsl #1]
 	cmp	r3, #4
-	bls	.L2721
+	bls	.L2810
 	subs	r3, r3, #5
 	movs	r0, #1
 	strh	r3, [r2, r6, lsl #1]	@ movhi
 	bl	FtlEctTblFlush
-.L2721:
+.L2810:
 	ldr	r3, [r5]
-	cbnz	r3, .L2722
-	ldr	r2, .L2740+20
+	cbnz	r3, .L2811
+	ldr	r2, .L2829+20
 	ldr	r0, [sp, #12]
 	ldr	r3, [r2, #96]
 	ubfx	r0, r0, #10, #16
@@ -19152,73 +19568,73 @@ FtlGcFreeTempBlock:
 	str	r3, [r2, #96]
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
-.L2722:
+.L2811:
 	movs	r3, #0
 	movs	r0, #1
 	str	r3, [r5]
-	b	.L2717
-.L2720:
+	b	.L2806
+.L2809:
 	ldrh	r2, [r4]
 	movs	r3, #0
 	str	r3, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2723
-	ldr	r6, .L2740+12
+	beq	.L2812
+	ldr	r6, .L2829+12
 	bl	FtlCacheWriteBack
 	ldrb	r0, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r6]
-	ldr	r5, .L2740+24
+	ldr	r5, .L2829+24
 	muls	r2, r0, r2
 	ldrh	r1, [r5]
 	cmp	r1, r2
-	beq	.L2724
-	ldr	r1, .L2740+28
+	beq	.L2813
+	ldr	r1, .L2829+28
 	movs	r2, #163
-	ldr	r0, .L2740+32
+	ldr	r0, .L2829+32
 	bl	printf
-	ldr	r1, .L2740+36
-	ldr	r0, .L2740+40
+	ldr	r1, .L2829+36
+	ldr	r0, .L2829+40
 	bl	printf
-.L2724:
+.L2813:
 	ldrh	r6, [r6]
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	ldr	r2, .L2740+44
+	ldr	r2, .L2829+44
 	ldrh	r0, [r4]
-	ldr	fp, .L2740+84
+	ldr	fp, .L2829+84
 	smulbb	r3, r3, r6
 	ldr	r1, [r2]
 	movs	r6, #0
 	str	r2, [sp, #4]
 	strh	r3, [r1, r0, lsl #1]	@ movhi
-	ldr	r1, .L2740+48
+	ldr	r1, .L2829+48
 	ldrh	r3, [r5]
 	ldr	r0, [r1]
 	add	r3, r3, r0
 	str	r3, [r1]
-.L2725:
+.L2814:
 	ldrh	r2, [r5]
 	uxth	r3, r6
 	cmp	r2, r3
-	bhi	.L2729
+	bhi	.L2818
 	movw	r0, #65535
 	bl	decrement_vpc_count
-	ldr	r3, .L2740+52
+	ldr	r3, .L2829+52
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2730
+	cbz	r3, .L2819
 	ldrh	r1, [r4]
-	ldr	r0, .L2740+56
+	ldr	r0, .L2829+56
 	bl	printf
-.L2730:
+.L2819:
 	ldr	r3, [sp, #4]
 	ldrh	r0, [r4]
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	beq	.L2731
+	beq	.L2820
 	bl	INSERT_DATA_LIST
-.L2732:
-	ldr	r3, .L2740+60
+.L2821:
+	ldr	r3, .L2829+60
 	movw	r6, #65535
 	strh	r6, [r4]	@ movhi
 	movs	r4, #0
@@ -19226,39 +19642,39 @@ FtlGcFreeTempBlock:
 	strh	r4, [r3]	@ movhi
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	ldr	r3, .L2740+64
+	ldr	r3, .L2829+64
 	strh	r6, [r3]	@ movhi
-	ldr	r3, .L2740+68
+	ldr	r3, .L2829+68
 	ldrh	r2, [r3]
-	ldr	r3, .L2740+72
+	ldr	r3, .L2829+72
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, asr #2
-	ble	.L2723
-	ldr	r3, .L2740+76
+	ble	.L2812
+	ldr	r3, .L2829+76
 	movs	r2, #20
 	mov	r0, r4
 	strh	r2, [r3]	@ movhi
-	b	.L2717
-.L2729:
+	b	.L2806
+.L2818:
 	uxth	r3, r6
 	movs	r7, #12
 	ldr	r2, [fp]
 	muls	r7, r3, r7
-	ldr	r3, .L2740+80
+	ldr	r3, .L2829+80
 	ldr	r8, [r3]
 	add	r10, r8, r7
 	ldr	r1, [r10, #8]
 	cmp	r1, r2
-	bcc	.L2726
-	ldr	r1, .L2740+28
+	bcc	.L2815
+	ldr	r1, .L2829+28
 	movs	r2, #168
-	ldr	r0, .L2740+32
+	ldr	r0, .L2829+32
 	bl	printf
-	ldr	r1, .L2740+36
-	ldr	r0, .L2740+40
+	ldr	r1, .L2829+36
+	ldr	r0, .L2829+40
 	bl	printf
-.L2726:
+.L2815:
 	movs	r2, #0
 	add	r1, sp, #12
 	ldr	r0, [r10, #8]
@@ -19266,7 +19682,7 @@ FtlGcFreeTempBlock:
 	ldr	r2, [sp, #12]
 	ldr	r0, [r8, r7]
 	cmp	r0, r2
-	bne	.L2727
+	bne	.L2816
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	movs	r2, #1
@@ -19275,46 +19691,192 @@ FtlGcFreeTempBlock:
 	ldr	r0, [r10, #8]
 	bl	log2phys
 	mov	r0, r7
-.L2739:
+.L2828:
 	bl	decrement_vpc_count
-.L2728:
+.L2817:
 	adds	r6, r6, #1
-	b	.L2725
-.L2727:
+	b	.L2814
+.L2816:
 	ldr	r3, [r10, #4]
 	cmp	r2, r3
-	beq	.L2728
+	beq	.L2817
 	ldrh	r0, [r4]
-	b	.L2739
-.L2731:
+	b	.L2828
+.L2820:
 	bl	INSERT_FREE_LIST
-	b	.L2732
-.L2741:
+	b	.L2821
+.L2830:
 	.align	2
-.L2740:
-	.word	.LANCHOR77
-	.word	.LANCHOR94
+.L2829:
+	.word	.LANCHOR76
+	.word	.LANCHOR93
 	.word	.LANCHOR135
-	.word	.LANCHOR53
-	.word	.LANCHOR79
+	.word	.LANCHOR52
+	.word	.LANCHOR78
+	.word	.LANCHOR138
+	.word	.LANCHOR110
+	.word	.LANCHOR239
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LANCHOR83
+	.word	.LANCHOR161
+	.word	.LANCHOR15
+	.word	.LC65
+	.word	.LANCHOR109
+	.word	.LANCHOR204
+	.word	.LANCHOR88
+	.word	.LANCHOR223
+	.word	.LANCHOR176
+	.word	.LANCHOR111
+	.word	.LANCHOR72
+	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
+	.section	.text.Ftl_get_new_temp_ppa,"ax",%progbits
+	.align	1
+	.global	Ftl_get_new_temp_ppa
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	Ftl_get_new_temp_ppa, %function
+Ftl_get_new_temp_ppa:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	movw	r3, #65535
+	ldr	r4, .L2834
+	ldrh	r2, [r4]
+	cmp	r2, r3
+	beq	.L2832
+	ldrh	r3, [r4, #4]
+	cbnz	r3, .L2833
+.L2832:
+	bl	FtlCacheWriteBack
+	movs	r0, #0
+	movs	r5, #0
+	bl	FtlGcFreeTempBlock
+	ldr	r0, .L2834
+	strb	r5, [r4, #8]
+	bl	allocate_data_superblock
+	ldr	r3, .L2834+4
+	strh	r5, [r3]	@ movhi
+	ldr	r3, .L2834+8
+	strh	r5, [r3]	@ movhi
+	bl	l2p_flush
+	mov	r0, r5
+	bl	FtlEctTblFlush
+	bl	FtlVpcTblFlush
+.L2833:
+	ldr	r0, .L2834
+	pop	{r3, r4, r5, lr}
+	b	get_new_active_ppa
+.L2835:
+	.align	2
+.L2834:
+	.word	.LANCHOR93
+	.word	.LANCHOR109
+	.word	.LANCHOR110
+	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
+	.section	.text.Ftl_gc_temp_data_write_back,"ax",%progbits
+	.align	1
+	.global	Ftl_gc_temp_data_write_back
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	Ftl_gc_temp_data_write_back, %function
+Ftl_gc_temp_data_write_back:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	ldr	r3, .L2851
+	ldr	r3, [r3]
+	cbz	r3, .L2837
+.L2840:
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, pc}
+.L2837:
+	ldr	r3, .L2851+4
+	ldr	r5, .L2851+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2839
+	ldr	r3, [r5]
+	lsls	r2, r3, #31
+	bpl	.L2839
+	ldr	r3, .L2851+12
+	ldrh	r3, [r3, #4]
+	cmp	r3, #0
+	bne	.L2840
+.L2839:
+	ldr	r4, .L2851+16
+	movs	r3, #0
+	movs	r6, #0
+	movs	r7, #36
+	mov	r2, r3
+	ldr	r1, [r5]
+	ldr	r0, [r4]
+	bl	FlashProgPages
+.L2841:
+	ldr	r1, [r5]
+	uxth	r3, r6
+	cmp	r3, r1
+	bcc	.L2843
+	ldr	r0, [r4]
+	bl	FtlGcBufFree
+	movs	r3, #0
+	str	r3, [r5]
+	ldr	r3, .L2851+12
+	ldrh	r3, [r3, #4]
+	cmp	r3, #0
+	bne	.L2840
+	movs	r0, #1
+	bl	FtlGcFreeTempBlock
+	b	.L2850
+.L2843:
+	muls	r3, r7, r3
+	ldr	r2, [r4]
+	adds	r6, r6, #1
+	adds	r1, r2, r3
+	ldr	r2, [r2, r3]
+	adds	r3, r2, #1
+	bne	.L2842
+	ldr	r3, .L2851+12
+	movs	r5, #0
+	ldr	r0, .L2851+20
+	ldrh	r4, [r3]
+	ldr	r0, [r0]
+	strh	r5, [r0, r4, lsl #1]	@ movhi
+	strh	r2, [r3]	@ movhi
+	ldr	r2, .L2851+24
+	ldr	r0, [r1, #4]
+	ldr	r3, [r2, #96]
+	ubfx	r0, r0, #10, #16
+	adds	r3, r3, #1
+	str	r3, [r2, #96]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	bl	FtlGcPageVarInit
+.L2850:
+	movs	r0, #1
+	pop	{r3, r4, r5, r6, r7, pc}
+.L2842:
+	ldr	r3, [r1, #12]
+	ldr	r1, [r1, #4]
+	ldr	r2, [r3, #8]
+	ldr	r0, [r3, #12]
+	bl	FtlGcUpdatePage
+	b	.L2841
+.L2852:
+	.align	2
+.L2851:
+	.word	.LANCHOR76
+	.word	.LANCHOR15
+	.word	.LANCHOR102
+	.word	.LANCHOR93
+	.word	.LANCHOR181
+	.word	.LANCHOR83
 	.word	.LANCHOR138
-	.word	.LANCHOR111
-	.word	.LANCHOR239
-	.word	.LC5
-	.word	.LC6
-	.word	.LC7
-	.word	.LANCHOR84
-	.word	.LANCHOR161
-	.word	.LANCHOR8
-	.word	.LC64
-	.word	.LANCHOR110
-	.word	.LANCHOR204
-	.word	.LANCHOR89
-	.word	.LANCHOR223
-	.word	.LANCHOR176
-	.word	.LANCHOR112
-	.word	.LANCHOR73
-	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
+	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
 	.section	.text.FtlGcPageRecovery,"ax",%progbits
 	.align	1
 	.global	FtlGcPageRecovery
@@ -19327,29 +19889,29 @@ FtlGcPageRecovery:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	ldr	r4, .L2744
-	ldr	r5, .L2744+4
+	ldr	r4, .L2855
+	ldr	r5, .L2855+4
 	ldrh	r1, [r4]
 	mov	r0, r5
 	bl	FtlGcScanTempBlk
 	ldrh	r2, [r5, #2]
 	ldrh	r3, [r4]
 	cmp	r2, r3
-	bcc	.L2742
-	ldr	r0, .L2744+8
+	bcc	.L2853
+	ldr	r0, .L2855+8
 	bl	FtlMapBlkWriteDumpData
 	movs	r0, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r3, .L2744+12
+	ldr	r3, .L2855+12
 	movs	r2, #0
 	str	r2, [r3]
-.L2742:
+.L2853:
 	pop	{r3, r4, r5, pc}
-.L2745:
+.L2856:
 	.align	2
-.L2744:
-	.word	.LANCHOR53
-	.word	.LANCHOR94
+.L2855:
+	.word	.LANCHOR52
+	.word	.LANCHOR93
 	.word	.LANCHOR127
 	.word	.LANCHOR135
 	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
@@ -19366,13 +19928,13 @@ FtlPowerLostRecovery:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #0
-	ldr	r5, .L2747
-	ldr	r3, .L2747+4
+	ldr	r5, .L2858
+	ldr	r3, .L2858+4
 	mov	r0, r5
 	str	r4, [r3]
 	bl	FtlRecoverySuperblock
 	mov	r0, r5
-	ldr	r5, .L2747+8
+	ldr	r5, .L2858+8
 	bl	FtlSlcSuperblockCheck
 	mov	r0, r5
 	bl	FtlRecoverySuperblock
@@ -19383,12 +19945,12 @@ FtlPowerLostRecovery:
 	bl	decrement_vpc_count
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L2748:
+.L2859:
 	.align	2
-.L2747:
+.L2858:
+	.word	.LANCHOR91
+	.word	.LANCHOR236
 	.word	.LANCHOR92
-	.word	.LANCHOR237
-	.word	.LANCHOR93
 	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
 	.section	.text.FtlSysBlkInit,"ax",%progbits
 	.align	1
@@ -19403,30 +19965,30 @@ FtlSysBlkInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r3, #0
-	ldr	r4, .L2758
+	ldr	r4, .L2869
 	movw	r5, #65535
 	strh	r3, [r4]	@ movhi
-	ldr	r3, .L2758+4
+	ldr	r3, .L2869+4
 	strh	r5, [r3]	@ movhi
-	ldr	r3, .L2758+8
+	ldr	r3, .L2869+8
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlScanSysBlk
-	ldr	r3, .L2758+12
+	ldr	r3, .L2869+12
 	ldrh	r3, [r3]
 	cmp	r3, r5
 	mov	r5, r4
-	bne	.L2750
-.L2752:
+	bne	.L2861
+.L2863:
 	mov	r4, #-1
-.L2749:
+.L2860:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, pc}
-.L2750:
+.L2861:
 	bl	FtlLoadSysInfo
 	mov	r4, r0
 	cmp	r0, #0
-	bne	.L2752
+	bne	.L2863
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -19436,34 +19998,34 @@ FtlSysBlkInit:
 	bl	FtlPowerLostRecovery
 	movs	r0, #1
 	bl	FtlUpdateVaildLpn
-	ldr	r3, .L2758+16
+	ldr	r3, .L2869+16
 	movs	r0, #12
 	ldrh	r2, [r3]
-	ldr	r3, .L2758+20
+	ldr	r3, .L2869+20
 	ldr	r1, [r3]
 	mov	r3, r4
-.L2753:
+.L2864:
 	cmp	r3, r2
-	blt	.L2755
+	blt	.L2866
 	ldrh	r3, [r5]
 	cmp	r3, #0
-	beq	.L2756
-.L2754:
-	ldr	r3, .L2758+24
+	beq	.L2867
+.L2865:
+	ldr	r3, .L2869+24
 	ldr	r1, [r3]
-	ldr	r3, .L2758+28
+	ldr	r3, .L2869+28
 	ldrh	r0, [r3]
 	ldrh	r5, [r3, #4]
 	ldrh	r2, [r1, r0, lsl #1]
 	subs	r2, r2, r5
-	ldr	r5, .L2758+32
+	ldr	r5, .L2869+32
 	strh	r2, [r1, r0, lsl #1]	@ movhi
 	ldrh	r2, [r5]
 	strh	r2, [r3, #2]	@ movhi
 	movs	r2, #0
 	strh	r2, [r3, #4]	@ movhi
 	strb	r2, [r3, #6]
-	ldr	r3, .L2758+36
+	ldr	r3, .L2869+36
 	ldrh	r6, [r3]
 	ldrh	r7, [r3, #4]
 	ldrh	r0, [r1, r6, lsl #1]
@@ -19472,40 +20034,40 @@ FtlSysBlkInit:
 	strb	r2, [r3, #6]
 	ldrh	r1, [r5]
 	strh	r2, [r3, #4]	@ movhi
-	ldr	r2, .L2758+40
+	ldr	r2, .L2869+40
 	strh	r1, [r3, #2]	@ movhi
 	ldrh	r3, [r2, #30]
 	adds	r3, r3, #1
 	strh	r3, [r2, #30]	@ movhi
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L2757:
+.L2868:
 	bl	FtlVpcTblFlush
-	b	.L2749
-.L2755:
+	b	.L2860
+.L2866:
 	mla	r6, r0, r3, r1
 	ldr	r6, [r6, #4]
 	cmp	r6, #0
-	blt	.L2754
+	blt	.L2865
 	adds	r3, r3, #1
-	b	.L2753
-.L2756:
+	b	.L2864
+.L2867:
 	bl	l2p_flush
-	b	.L2757
-.L2759:
+	b	.L2868
+.L2870:
 	.align	2
-.L2758:
-	.word	.LANCHOR236
+.L2869:
 	.word	.LANCHOR235
+	.word	.LANCHOR234
 	.word	.LANCHOR39
 	.word	.LANCHOR209
-	.word	.LANCHOR68
-	.word	.LANCHOR97
-	.word	.LANCHOR84
+	.word	.LANCHOR67
+	.word	.LANCHOR96
+	.word	.LANCHOR83
+	.word	.LANCHOR91
+	.word	.LANCHOR52
 	.word	.LANCHOR92
-	.word	.LANCHOR53
-	.word	.LANCHOR93
-	.word	.LANCHOR81
+	.word	.LANCHOR80
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.section	.text.FtlLowFormat,"ax",%progbits
 	.align	1
@@ -19518,87 +20080,87 @@ FtlSysBlkInit:
 FtlLowFormat:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2791
+	ldr	r3, .L2902
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #24
 	ldr	r4, [r3]
 	cmp	r4, #0
-	bne	.L2762
-	ldr	r5, .L2791+4
+	bne	.L2873
+	ldr	r5, .L2902+4
 	mov	r1, r4
-	ldr	r3, .L2791+8
-	ldr	r6, .L2791+12
+	ldr	r3, .L2902+8
+	ldr	r6, .L2902+12
 	ldrh	r2, [r5]
 	ldr	r0, [r3]
 	lsls	r2, r2, #2
 	bl	ftl_memset
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L2791+16
-	ldr	r5, .L2791+20
+	ldr	r3, .L2902+16
+	ldr	r5, .L2902+20
 	lsls	r2, r2, #2
 	ldr	r0, [r3]
 	bl	ftl_memset
-	ldr	r3, .L2791+24
+	ldr	r3, .L2902+24
 	ldrh	r0, [r6]
 	str	r4, [r5]
 	str	r4, [r3]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	r0, .L2763
+	cbz	r0, .L2874
 	bl	FtlMakeBbt
-.L2763:
-	ldr	r3, .L2791+28
-	ldr	r2, .L2791+32
-	ldr	ip, .L2791+112
+.L2874:
+	ldr	r3, .L2902+28
+	ldr	r2, .L2902+32
+	ldr	ip, .L2902+112
 	ldrh	r1, [r3]
 	ldr	r4, [r2]
-	ldr	r2, .L2791+36
+	ldr	r2, .L2902+36
 	str	r3, [sp, #12]
 	lsls	r1, r1, #7
 	ldr	r7, [r2]
 	movs	r2, #0
-.L2764:
+.L2875:
 	uxth	r3, r2
 	adds	r2, r2, #1
 	cmp	r3, r1
-	blt	.L2765
-	ldr	r3, .L2791+40
+	blt	.L2876
+	ldr	r3, .L2902+40
 	movs	r7, #0
-	ldr	fp, .L2791+116
+	ldr	fp, .L2902+116
 	ldrh	r4, [r3]
 	mov	r8, r3
 	mov	r10, fp
-.L2766:
+.L2877:
 	ldrh	r3, [fp]
 	cmp	r3, r4
-	bhi	.L2767
-	ldr	r4, .L2791+44
+	bhi	.L2878
+	ldr	r4, .L2902+44
 	subs	r3, r7, #2
 	ldrh	r1, [r4]
 	cmp	r3, r1, lsl #1
-	bgt	.L2768
-.L2772:
+	bgt	.L2879
+.L2883:
 	movs	r7, #0
 	mov	r6, r7
-.L2769:
+.L2880:
 	ldrh	r3, [r8]
 	uxth	r0, r7
 	adds	r7, r7, #1
 	cmp	r3, r0
-	bhi	.L2773
+	bhi	.L2884
 	ldrh	r2, [r10]
-	ldr	r3, .L2791+48
+	ldr	r3, .L2902+48
 	ldrh	r4, [r4]
-	ldr	r7, .L2791+52
+	ldr	r7, .L2902+52
 	str	r2, [r3]
-	ldr	r3, .L2791+56
+	ldr	r3, .L2902+56
 	mov	r1, r4
 	ldr	r3, [r3]
 	mov	r0, r3
 	str	r3, [sp, #16]
 	bl	__aeabi_uidiv
-	ldr	r1, .L2791+60
+	ldr	r1, .L2902+60
 	ubfx	r3, r0, #5, #16
 	add	r2, r3, #36
 	mov	fp, r0
@@ -19609,7 +20171,7 @@ FtlLowFormat:
 	str	r3, [sp, #4]
 	str	r1, [sp, #8]
 	cmp	r6, r2
-	ble	.L2774
+	ble	.L2885
 	ldr	r3, [sp, #16]
 	mov	r1, r4
 	subs	r0, r3, r6
@@ -19619,12 +20181,12 @@ FtlLowFormat:
 	lsrs	r0, r0, #5
 	adds	r0, r0, #24
 	strh	r0, [r3]	@ movhi
-.L2774:
-	ldr	r3, .L2791+64
+.L2885:
+	ldr	r3, .L2902+64
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L2775
-	ldr	r2, .L2791+60
+	bne	.L2886
+	ldr	r2, .L2902+60
 	mov	r1, r4
 	mov	r0, r6
 	ldrh	r3, [r2]
@@ -19636,11 +20198,11 @@ FtlLowFormat:
 	uxtah	r0, r3, r0
 	add	r3, r3, r0, asr #2
 	strh	r3, [r2]	@ movhi
-.L2775:
-	ldr	r3, .L2791+68
+.L2886:
+	ldr	r3, .L2902+68
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2776
-	ldr	r2, .L2791+60
+	cbz	r3, .L2887
+	ldr	r2, .L2902+60
 	mov	r1, r4
 	mov	r0, r6
 	ldrh	r3, [r2]
@@ -19652,55 +20214,55 @@ FtlLowFormat:
 	uxtah	r0, r3, r0
 	add	r3, r3, r0, asr #2
 	strh	r3, [r2]	@ movhi
-.L2776:
-	ldr	r3, .L2791+72
+.L2887:
+	ldr	r3, .L2902+72
 	ldrh	r3, [r3]
-	cbz	r3, .L2778
-	ldr	r2, .L2791+60
+	cbz	r3, .L2889
+	ldr	r2, .L2902+60
 	ldrh	r1, [r2]
 	add	r1, r1, r3, lsr #1
 	strh	r1, [r2]	@ movhi
 	mul	r1, r4, r3
 	cmp	r6, r1
-	bge	.L2778
+	bge	.L2889
 	ldr	r1, [sp, #4]
 	adds	r3, r3, #32
 	str	fp, [r7]
 	add	r1, r1, r3
 	strh	r1, [r2]	@ movhi
-.L2778:
+.L2889:
 	ldr	r3, [sp, #8]
-	ldr	r6, .L2791+76
+	ldr	r6, .L2902+76
 	ldrh	r2, [r3]
 	ldr	r3, [r7]
 	subs	r3, r3, r2
 	muls	r4, r3, r4
-	ldr	r3, .L2791+80
+	ldr	r3, .L2902+80
 	ldrh	r3, [r3]
 	str	r4, [r6]
 	muls	r4, r3, r4
 	ldr	r3, [sp, #12]
 	ldrh	r3, [r3]
 	str	r4, [r7]
-	ldr	r7, .L2791+84
+	ldr	r7, .L2902+84
 	muls	r4, r3, r4
-	ldr	r3, .L2791+88
+	ldr	r3, .L2902+88
 	str	r4, [r3]
 	movw	r4, #65535
 	bl	FtlBbmTblFlush
 	ldrh	r2, [r10]
 	movs	r1, #0
-	ldr	r10, .L2791+120
+	ldr	r10, .L2902+120
 	lsls	r2, r2, #1
 	ldr	r0, [r10]
 	bl	ftl_memset
-	ldr	r2, .L2791+92
+	ldr	r2, .L2902+92
 	movs	r3, #0
 	strh	r3, [r7, #2]	@ movhi
 	movs	r1, #255
 	strb	r3, [r7, #6]
 	str	r3, [r2]
-	ldr	r2, .L2791+96
+	ldr	r2, .L2902+96
 	strh	r3, [r7]	@ movhi
 	strh	r3, [r2, #2]	@ movhi
 	strb	r3, [r2, #6]
@@ -19711,30 +20273,30 @@ FtlLowFormat:
 	mov	r8, r10
 	strb	r3, [r7, #8]
 	mov	r10, r7
-	ldr	r3, .L2791+100
+	ldr	r3, .L2902+100
 	lsrs	r2, r2, #3
 	ldr	r0, [r3]
 	bl	ftl_memset
-.L2780:
+.L2891:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r7, #7]	@ zero_extendqisi2
 	ldrh	r2, [r7]
 	cmp	r3, #0
-	bne	.L2781
+	bne	.L2892
 	ldr	r3, [r8]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r7]
 	adds	r3, r3, #1
 	strh	r3, [r7]	@ movhi
-	b	.L2780
-.L2765:
+	b	.L2891
+.L2876:
 	mvns	r0, r3
 	orr	r0, r3, r0, lsl #16
 	str	r0, [r4, r3, lsl #2]
 	str	ip, [r7, r3, lsl #2]
-	b	.L2764
-.L2767:
+	b	.L2875
+.L2878:
 	mov	r0, r4
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
@@ -19742,11 +20304,11 @@ FtlLowFormat:
 	add	r7, r7, r0
 	uxth	r7, r7
 	uxth	r4, r4
-	b	.L2766
-.L2768:
+	b	.L2877
+.L2879:
 	mov	r0, r7
 	bl	__aeabi_uidiv
-	ldr	r3, .L2791+104
+	ldr	r3, .L2902+104
 	ldr	r3, [r3]
 	add	r0, r0, r3
 	uxth	r0, r0
@@ -19754,26 +20316,26 @@ FtlLowFormat:
 	ldrh	r0, [r6]
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	r6, [r8]
-.L2770:
+.L2881:
 	ldrh	r3, [r10]
 	cmp	r3, r6
-	bls	.L2772
+	bls	.L2883
 	mov	r0, r6
 	movs	r1, #1
 	adds	r6, r6, #1
 	bl	FtlLowFormatEraseBlock
 	uxth	r6, r6
-	b	.L2770
-.L2773:
+	b	.L2881
+.L2884:
 	movs	r1, #0
 	bl	FtlLowFormatEraseBlock
 	add	r6, r6, r0
 	uxth	r6, r6
-	b	.L2769
-.L2781:
+	b	.L2880
+.L2892:
 	ldr	r3, [r5]
 	ldrh	r1, [r7, #4]
-	ldr	r4, .L2791+108
+	ldr	r4, .L2902+108
 	str	r3, [r7, #12]
 	adds	r3, r3, #1
 	str	r3, [r5]
@@ -19789,240 +20351,94 @@ FtlLowFormat:
 	strh	r3, [r4]	@ movhi
 	movs	r3, #1
 	strb	r3, [r4, #8]
-.L2782:
+.L2893:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r4]
 	cmp	r3, #0
-	bne	.L2783
+	bne	.L2894
 	ldr	r3, [r8]
 	strh	r7, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	b	.L2782
-.L2792:
+	b	.L2893
+.L2903:
 	.align	2
-.L2791:
-	.word	.LANCHOR77
-	.word	.LANCHOR67
+.L2902:
+	.word	.LANCHOR76
+	.word	.LANCHOR66
 	.word	.LANCHOR195
 	.word	.LANCHOR39
 	.word	.LANCHOR131
 	.word	.LANCHOR159
 	.word	.LANCHOR160
-	.word	.LANCHOR56
+	.word	.LANCHOR55
 	.word	.LANCHOR186
 	.word	.LANCHOR187
 	.word	.LANCHOR40
 	.word	.LANCHOR38
-	.word	.LANCHOR74
 	.word	.LANCHOR73
+	.word	.LANCHOR72
 	.word	.LANCHOR42
 	.word	.LANCHOR223
 	.word	.LANCHOR28
-	.word	.LANCHOR8
+	.word	.LANCHOR15
 	.word	.LANCHOR49
 	.word	.LANCHOR222
-	.word	.LANCHOR53
-	.word	.LANCHOR92
-	.word	.LANCHOR69
-	.word	.LANCHOR101
-	.word	.LANCHOR204
-	.word	.LANCHOR0
-	.word	.LANCHOR66
-	.word	.LANCHOR93
-	.word	168778952
-	.word	.LANCHOR41
-	.word	.LANCHOR84
-.L2783:
-	ldr	r3, [r5]
-	ldrh	r1, [r4, #4]
-	str	r3, [r4, #12]
-	adds	r3, r3, #1
-	str	r3, [r5]
-	movw	r4, #65535
-	ldr	r3, [r8]
-	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L2793
-	strh	r4, [r3]	@ movhi
-	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L2793+4
-	movs	r2, #0
-	strh	r2, [r3, #2]	@ movhi
-	ldr	r2, [r6]
-	strh	r0, [r3]	@ movhi
-	strh	r4, [r3, #4]	@ movhi
-	strh	r2, [r3, #6]	@ movhi
-	ldr	r2, [r5]
-	str	r2, [r3, #8]
-	adds	r2, r2, #1
-	str	r2, [r5]
-	bl	FtlVpcTblFlush
-	bl	FtlSysBlkInit
-	cbnz	r0, .L2762
-	ldr	r3, .L2793+8
-	movs	r2, #1
-	str	r2, [r3]
-.L2762:
-	movs	r0, #0
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2794:
-	.align	2
-.L2793:
-	.word	.LANCHOR94
-	.word	.LANCHOR209
-	.word	.LANCHOR231
-	.size	FtlLowFormat, .-FtlLowFormat
-	.section	.text.Ftl_get_new_temp_ppa,"ax",%progbits
-	.align	1
-	.global	Ftl_get_new_temp_ppa
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	Ftl_get_new_temp_ppa, %function
-Ftl_get_new_temp_ppa:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	movw	r3, #65535
-	ldr	r4, .L2798
-	ldrh	r2, [r4]
-	cmp	r2, r3
-	beq	.L2796
-	ldrh	r3, [r4, #4]
-	cbnz	r3, .L2797
-.L2796:
-	bl	FtlCacheWriteBack
-	movs	r0, #0
-	movs	r5, #0
-	bl	FtlGcFreeTempBlock
-	ldr	r0, .L2798
-	strb	r5, [r4, #8]
-	bl	allocate_data_superblock
-	ldr	r3, .L2798+4
-	strh	r5, [r3]	@ movhi
-	ldr	r3, .L2798+8
-	strh	r5, [r3]	@ movhi
-	bl	l2p_flush
-	mov	r0, r5
-	bl	FtlEctTblFlush
-	bl	FtlVpcTblFlush
-.L2797:
-	ldr	r0, .L2798
-	pop	{r3, r4, r5, lr}
-	b	get_new_active_ppa
-.L2799:
-	.align	2
-.L2798:
-	.word	.LANCHOR94
-	.word	.LANCHOR110
-	.word	.LANCHOR111
-	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
-	.section	.text.Ftl_gc_temp_data_write_back,"ax",%progbits
-	.align	1
-	.global	Ftl_gc_temp_data_write_back
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	Ftl_gc_temp_data_write_back, %function
-Ftl_gc_temp_data_write_back:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	ldr	r3, .L2815
-	ldr	r3, [r3]
-	cbz	r3, .L2801
-.L2804:
-	movs	r0, #0
-	pop	{r3, r4, r5, r6, r7, pc}
-.L2801:
-	ldr	r3, .L2815+4
-	ldr	r5, .L2815+8
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2803
-	ldr	r3, [r5]
-	lsls	r2, r3, #31
-	bpl	.L2803
-	ldr	r3, .L2815+12
-	ldrh	r3, [r3, #4]
-	cmp	r3, #0
-	bne	.L2804
-.L2803:
-	ldr	r4, .L2815+16
-	movs	r3, #0
-	movs	r6, #0
-	movs	r7, #36
-	mov	r2, r3
-	ldr	r1, [r5]
-	ldr	r0, [r4]
-	bl	FlashProgPages
-.L2805:
-	ldr	r1, [r5]
-	uxth	r3, r6
-	cmp	r3, r1
-	bcc	.L2807
-	ldr	r0, [r4]
-	bl	FtlGcBufFree
-	movs	r3, #0
-	str	r3, [r5]
-	ldr	r3, .L2815+12
-	ldrh	r3, [r3, #4]
-	cmp	r3, #0
-	bne	.L2804
-	movs	r0, #1
-	bl	FtlGcFreeTempBlock
-	b	.L2814
-.L2807:
-	muls	r3, r7, r3
-	ldr	r2, [r4]
-	adds	r6, r6, #1
-	adds	r1, r2, r3
-	ldr	r2, [r2, r3]
-	adds	r3, r2, #1
-	bne	.L2806
-	ldr	r3, .L2815+12
-	movs	r5, #0
-	ldr	r0, .L2815+20
-	ldrh	r4, [r3]
-	ldr	r0, [r0]
-	strh	r5, [r0, r4, lsl #1]	@ movhi
-	strh	r2, [r3]	@ movhi
-	ldr	r2, .L2815+24
-	ldr	r0, [r1, #4]
-	ldr	r3, [r2, #96]
-	ubfx	r0, r0, #10, #16
-	adds	r3, r3, #1
-	str	r3, [r2, #96]
-	bl	FtlBbmMapBadBlock
-	bl	FtlBbmTblFlush
-	bl	FtlGcPageVarInit
-.L2814:
-	movs	r0, #1
-	pop	{r3, r4, r5, r6, r7, pc}
-.L2806:
-	ldr	r3, [r1, #12]
-	ldr	r1, [r1, #4]
-	ldr	r2, [r3, #8]
-	ldr	r0, [r3, #12]
-	bl	FtlGcUpdatePage
-	b	.L2805
-.L2816:
+	.word	.LANCHOR52
+	.word	.LANCHOR91
+	.word	.LANCHOR68
+	.word	.LANCHOR100
+	.word	.LANCHOR204
+	.word	.LANCHOR0
+	.word	.LANCHOR65
+	.word	.LANCHOR92
+	.word	168778952
+	.word	.LANCHOR41
+	.word	.LANCHOR83
+.L2894:
+	ldr	r3, [r5]
+	ldrh	r1, [r4, #4]
+	str	r3, [r4, #12]
+	adds	r3, r3, #1
+	str	r3, [r5]
+	movw	r4, #65535
+	ldr	r3, [r8]
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	ldr	r3, .L2904
+	strh	r4, [r3]	@ movhi
+	bl	FtlFreeSysBlkQueueOut
+	ldr	r3, .L2904+4
+	movs	r2, #0
+	strh	r2, [r3, #2]	@ movhi
+	ldr	r2, [r6]
+	strh	r0, [r3]	@ movhi
+	strh	r4, [r3, #4]	@ movhi
+	strh	r2, [r3, #6]	@ movhi
+	ldr	r2, [r5]
+	str	r2, [r3, #8]
+	adds	r2, r2, #1
+	str	r2, [r5]
+	bl	FtlVpcTblFlush
+	bl	FtlSysBlkInit
+	cbnz	r0, .L2873
+	ldr	r3, .L2904+8
+	movs	r2, #1
+	str	r2, [r3]
+.L2873:
+	movs	r0, #0
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2905:
 	.align	2
-.L2815:
-	.word	.LANCHOR77
-	.word	.LANCHOR8
-	.word	.LANCHOR103
-	.word	.LANCHOR94
-	.word	.LANCHOR181
-	.word	.LANCHOR84
-	.word	.LANCHOR138
-	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
+.L2904:
+	.word	.LANCHOR93
+	.word	.LANCHOR209
+	.word	.LANCHOR230
+	.size	FtlLowFormat, .-FtlLowFormat
 	.section	.text.rk_ftl_garbage_collect,"ax",%progbits
 	.align	1
 	.global	rk_ftl_garbage_collect
@@ -20034,34 +20450,34 @@ Ftl_gc_temp_data_write_back:
 rk_ftl_garbage_collect:
 	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2907
+	ldr	r3, .L2996
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #40
 	ldr	r2, [r3]
 	cmp	r2, #0
-	bne	.L2869
-	ldr	r3, .L2907+4
+	bne	.L2958
+	ldr	r3, .L2996+4
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L2869
-	ldr	r2, .L2907+8
+	bne	.L2958
+	ldr	r2, .L2996+8
 	ldrh	r2, [r2]
 	cmp	r2, #47
-	bls	.L2871
-	ldr	r5, .L2907+12
+	bls	.L2960
+	ldr	r5, .L2996+12
 	movw	r2, #65535
 	ldrh	ip, [r5]
 	cmp	ip, r2
-	beq	.L2819
-	ldr	r7, .L2907+16
+	beq	.L2908
+	ldr	r7, .L2996+16
 	ldrh	r3, [r7]
 	cmp	r3, r2
-	bne	.L2819
-	ldr	r1, .L2907+20
+	bne	.L2908
+	ldr	r1, .L2996+20
 	ldrh	r6, [r1]
 	cmp	r6, r3
-	beq	.L2819
-	ldr	r2, .L2907+24
+	beq	.L2908
+	ldr	r2, .L2996+24
 	ldrh	r4, [r2]
 	cmp	r4, r3
 	itttt	ne
@@ -20069,164 +20485,164 @@ rk_ftl_garbage_collect:
 	strhne	r6, [r5]	@ movhi
 	strhne	r4, [r1]	@ movhi
 	strhne	r3, [r2]	@ movhi
-.L2819:
+.L2908:
 	cmp	r0, #0
-	bne	.L2872
-	ldr	r3, .L2907+28
+	bne	.L2961
+	ldr	r3, .L2996+28
 	ldrh	r3, [r3]
 	cmp	r3, #24
-	bhi	.L2873
-	ldr	r2, .L2907+32
+	bhi	.L2962
+	ldr	r2, .L2996+32
 	cmp	r3, #16
 	ldrh	r4, [r2]
-	bls	.L2822
+	bls	.L2911
 	lsrs	r4, r4, #5
-.L2821:
-	ldr	r2, .L2907+36
+.L2910:
+	ldr	r2, .L2996+36
 	ldrh	r1, [r2]
 	cmp	r1, r3
 	mov	r1, r2
-	bcs	.L2825
-	ldr	r3, .L2907+40
+	bcs	.L2914
+	ldr	r3, .L2996+40
 	movw	r0, #65535
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L2826
-	ldr	r0, .L2907+16
+	bne	.L2915
+	ldr	r0, .L2996+16
 	ldrh	r0, [r0]
 	cmp	r0, r3
-	bne	.L2826
-	ldr	r3, .L2907+44
+	bne	.L2915
+	ldr	r3, .L2996+44
 	ldrh	r0, [r3]
-	cbnz	r0, .L2827
-	ldr	r3, .L2907+48
-	ldr	r4, .L2907+52
+	cbnz	r0, .L2916
+	ldr	r3, .L2996+48
+	ldr	r4, .L2996+52
 	ldr	r3, [r3]
 	ldr	r4, [r4]
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, lsr #2
-	bcs	.L2828
-.L2827:
-	ldr	r3, .L2907+56
+	bcs	.L2917
+.L2916:
+	ldr	r3, .L2996+56
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r1]	@ movhi
-.L2829:
-	ldr	r3, .L2907+60
+.L2918:
+	ldr	r3, .L2996+60
 	movs	r2, #0
 	str	r2, [r3]
-.L2817:
+.L2906:
 	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2822:
+.L2911:
 	cmp	r3, #12
-	bls	.L2823
+	bls	.L2912
 	lsrs	r4, r4, #4
-	b	.L2821
-.L2823:
+	b	.L2910
+.L2912:
 	cmp	r3, #8
-	bls	.L2821
+	bls	.L2910
 	lsrs	r4, r4, #2
-	b	.L2821
-.L2873:
+	b	.L2910
+.L2962:
 	movs	r4, #1
-	b	.L2821
-.L2828:
+	b	.L2910
+.L2917:
 	movs	r3, #18
 	strh	r3, [r2]	@ movhi
-	b	.L2829
-.L2826:
-	ldr	r3, .L2907+56
+	b	.L2918
+.L2915:
+	ldr	r3, .L2996+56
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r1]	@ movhi
-.L2825:
-	ldr	r3, .L2907+64
+.L2914:
+	ldr	r3, .L2996+64
 	ldrh	r3, [r3]
-	cbz	r3, .L2820
+	cbz	r3, .L2909
 	adds	r4, r4, #32
 	uxth	r4, r4
-.L2820:
-	ldr	r5, .L2907+68
+.L2909:
+	ldr	r5, .L2996+68
 	movw	r3, #65535
 	ldrh	r2, [r5]
 	cmp	r2, r3
-	bne	.L2832
-	ldr	r3, .L2907+16
+	bne	.L2921
+	ldr	r3, .L2996+16
 	ldrh	r1, [r3]
 	cmp	r1, r2
-	beq	.L2833
-	ldr	r0, .L2907+72
+	beq	.L2922
+	ldr	r0, .L2996+72
 	ldr	r0, [r0]
 	ldrh	r1, [r0, r1, lsl #1]
-	cbnz	r1, .L2834
+	cbnz	r1, .L2923
 	strh	r2, [r3]	@ movhi
-.L2834:
+.L2923:
 	ldrh	r2, [r3]
 	strh	r2, [r5]	@ movhi
 	movw	r2, #65535
 	strh	r2, [r3]	@ movhi
-.L2833:
+.L2922:
 	ldrh	r0, [r5]
 	movw	r6, #65535
 	movs	r3, #0
 	strb	r3, [r5, #8]
 	cmp	r0, r6
-	beq	.L2832
+	beq	.L2921
 	bl	IsBlkInGcList
-	cbz	r0, .L2836
+	cbz	r0, .L2925
 	strh	r6, [r5]	@ movhi
-.L2836:
-	ldr	r3, .L2907+76
+.L2925:
+	ldr	r3, .L2996+76
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2837
+	cbz	r3, .L2926
 	ldrh	r0, [r5]
 	bl	ftl_get_blk_mode
 	strb	r0, [r5, #8]
-.L2837:
+.L2926:
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2832
-	ldr	r0, .L2907+68
+	beq	.L2921
+	ldr	r0, .L2996+68
 	bl	make_superblock
-	ldr	r2, .L2907+80
+	ldr	r2, .L2996+80
 	movs	r3, #0
 	strh	r3, [r5, #2]	@ movhi
 	strb	r3, [r5, #6]
 	strh	r3, [r2]	@ movhi
-	ldr	r3, .L2907+72
+	ldr	r3, .L2996+72
 	ldrh	r2, [r5]
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r2, lsl #1]
-	ldr	r3, .L2907+84
+	ldr	r3, .L2996+84
 	strh	r2, [r3]	@ movhi
-.L2832:
-	ldr	r2, .L2907+88
+.L2921:
+	ldr	r2, .L2996+88
 	ldrh	r3, [r5]
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L2838
-	ldr	r2, .L2907+92
+	beq	.L2927
+	ldr	r2, .L2996+92
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L2838
-	ldr	r5, .L2907+68
+	beq	.L2927
+	ldr	r5, .L2996+68
 	mov	r6, r5
-.L2839:
+.L2928:
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L2840
-	ldr	r10, .L2907+100
+	bne	.L2929
+	ldr	r10, .L2996+100
 	movs	r2, #0
-	ldr	r3, .L2907+60
+	ldr	r3, .L2996+60
 	mov	r7, r10
 	str	r2, [r3]
-.L2841:
+.L2930:
 	ldrh	r8, [r10]
 	mov	r0, r8
 	bl	List_get_gc_head_node
@@ -20234,36 +20650,36 @@ rk_ftl_garbage_collect:
 	movw	r3, #65535
 	cmp	fp, r3
 	strh	fp, [r6]	@ movhi
-	bne	.L2842
+	bne	.L2931
 	movs	r3, #0
 	movs	r0, #8
 	strh	r3, [r10]	@ movhi
-	b	.L2817
-.L2872:
+	b	.L2906
+.L2961:
 	movs	r4, #1
-	b	.L2820
-.L2838:
+	b	.L2909
+.L2927:
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.L2905:
-	ldr	r3, .L2907+44
+.L2994:
+	ldr	r3, .L2996+44
 	ldrh	r0, [r3]
-	b	.L2817
-.L2842:
+	b	.L2906
+.L2931:
 	str	r0, [sp, #8]
 	mov	r0, fp
 	bl	IsBlkInGcList
 	add	r3, r8, #1
 	ldr	r2, [sp, #8]
-	cbz	r0, .L2843
+	cbz	r0, .L2932
 	strh	r3, [r10]	@ movhi
-	b	.L2841
-.L2843:
-	ldr	r1, .L2907+32
+	b	.L2930
+.L2932:
+	ldr	r1, .L2996+32
 	uxth	r3, r3
-	ldr	lr, .L2907+104
+	ldr	lr, .L2996+104
 	uxth	r2, r2
-	ldr	r8, .L2907+72
+	ldr	r8, .L2996+72
 	ldrh	r1, [r1]
 	ldrh	lr, [lr]
 	ldr	r0, [r8]
@@ -20271,146 +20687,149 @@ rk_ftl_garbage_collect:
 	mul	r1, lr, r1
 	ldrh	ip, [r0, r2, lsl #1]
 	cmp	ip, r1, asr #1
-	bgt	.L2845
+	bgt	.L2934
 	cmp	r3, #48
-	bls	.L2846
+	bls	.L2935
 	cmp	ip, #8
-	bls	.L2846
-	ldr	r3, .L2907+96
+	bls	.L2935
+	ldr	r3, .L2996+96
 	ldrh	r3, [r3]
 	cmp	r3, #35
-	bhi	.L2846
-.L2845:
+	bhi	.L2935
+.L2934:
 	movs	r3, #0
 	strh	r3, [r7]	@ movhi
-.L2846:
+.L2935:
 	ldrh	r3, [r0, r2, lsl #1]
 	cmp	r1, r3
-	bgt	.L2847
+	bgt	.L2936
+	ldrh	r2, [r7]
+	cmp	r2, #3
+	bhi	.L2936
 	movw	r3, #65535
 	strh	r3, [r6]	@ movhi
 	movs	r3, #0
 	strh	r3, [r7]	@ movhi
-	b	.L2905
-.L2847:
+	b	.L2994
+.L2936:
 	cmp	r3, #0
-	bne	.L2848
+	bne	.L2937
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	ldrh	r3, [r7]
 	adds	r3, r3, #1
 	strh	r3, [r7]	@ movhi
-	b	.L2841
-.L2908:
+	b	.L2930
+.L2997:
 	.align	2
-.L2907:
-	.word	.LANCHOR77
+.L2996:
+	.word	.LANCHOR76
 	.word	.LANCHOR171
-	.word	.LANCHOR86
-	.word	.LANCHOR114
+	.word	.LANCHOR85
 	.word	.LANCHOR113
+	.word	.LANCHOR112
+	.word	.LANCHOR114
 	.word	.LANCHOR115
-	.word	.LANCHOR116
-	.word	.LANCHOR89
-	.word	.LANCHOR53
+	.word	.LANCHOR88
+	.word	.LANCHOR52
 	.word	.LANCHOR176
-	.word	.LANCHOR94
+	.word	.LANCHOR93
 	.word	.LANCHOR240
-	.word	.LANCHOR73
-	.word	.LANCHOR101
+	.word	.LANCHOR72
+	.word	.LANCHOR100
 	.word	.LANCHOR223
 	.word	.LANCHOR172
-	.word	.LANCHOR117
+	.word	.LANCHOR116
 	.word	.LANCHOR204
-	.word	.LANCHOR84
-	.word	.LANCHOR8
+	.word	.LANCHOR83
+	.word	.LANCHOR15
 	.word	.LANCHOR241
 	.word	.LANCHOR242
+	.word	.LANCHOR91
 	.word	.LANCHOR92
-	.word	.LANCHOR93
-	.word	.LANCHOR110
+	.word	.LANCHOR109
 	.word	.LANCHOR178
 	.word	.LANCHOR38
-.L2848:
+.L2937:
 	movs	r3, #0
 	strb	r3, [r6, #8]
-	ldr	r3, .L2909
+	ldr	r3, .L2998
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2849
+	cbz	r3, .L2938
 	mov	r0, fp
 	bl	ftl_get_blk_mode
 	strb	r0, [r6, #8]
-.L2849:
-	ldr	r3, .L2909+4
+.L2938:
+	ldr	r3, .L2998+4
 	ldrh	r3, [r3]
 	cmp	r3, fp
-	bne	.L2850
-	ldr	r1, .L2909+8
-	movw	r2, #857
-	ldr	r0, .L2909+12
+	bne	.L2939
+	ldr	r1, .L2998+8
+	movw	r2, #893
+	ldr	r0, .L2998+12
 	bl	printf
-	ldr	r1, .L2909+16
-	ldr	r0, .L2909+20
+	ldr	r1, .L2998+16
+	ldr	r0, .L2998+20
 	bl	printf
-.L2850:
-	ldr	r3, .L2909+24
+.L2939:
+	ldr	r3, .L2998+24
 	ldrh	r2, [r6]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L2851
-	ldr	r1, .L2909+8
-	movw	r2, #858
-	ldr	r0, .L2909+12
+	bne	.L2940
+	ldr	r1, .L2998+8
+	movw	r2, #894
+	ldr	r0, .L2998+12
 	bl	printf
-	ldr	r1, .L2909+16
-	ldr	r0, .L2909+20
+	ldr	r1, .L2998+16
+	ldr	r0, .L2998+20
 	bl	printf
-.L2851:
-	ldr	r3, .L2909+28
+.L2940:
+	ldr	r3, .L2998+28
 	ldrh	r2, [r6]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L2852
-	ldr	r1, .L2909+8
-	movw	r2, #859
-	ldr	r0, .L2909+12
+	bne	.L2941
+	ldr	r1, .L2998+8
+	movw	r2, #895
+	ldr	r0, .L2998+12
 	bl	printf
-	ldr	r1, .L2909+16
-	ldr	r0, .L2909+20
+	ldr	r1, .L2998+16
+	ldr	r0, .L2998+20
 	bl	printf
-.L2852:
+.L2941:
 	mov	r0, r5
 	bl	make_superblock
-	ldr	r2, .L2909+32
+	ldr	r2, .L2998+32
 	movs	r3, #0
 	ldrh	r1, [r6]
 	strh	r3, [r2]	@ movhi
 	ldr	r2, [r8]
 	ldrh	r1, [r2, r1, lsl #1]
-	ldr	r2, .L2909+36
+	ldr	r2, .L2998+36
 	strh	r3, [r6, #2]	@ movhi
 	strb	r3, [r6, #6]
 	strh	r1, [r2]	@ movhi
-.L2840:
-	ldr	r3, .L2909+40
+.L2929:
+	ldr	r3, .L2998+40
 	movs	r2, #1
 	str	r2, [r3]
-	ldr	r3, .L2909+44
+	ldr	r3, .L2998+44
 	ldrh	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L2909
+	ldr	r3, .L2998
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2853
+	cbz	r3, .L2942
 	ldrb	r3, [r6, #8]	@ zero_extendqisi2
 	cmp	r3, r2
 	ittt	eq
-	ldreq	r3, .L2909+48
+	ldreq	r3, .L2998+48
 	ldrheq	r3, [r3]
 	streq	r3, [sp, #12]
-.L2853:
+.L2942:
 	ldrh	r3, [r6, #2]
 	ldr	r1, [sp, #12]
-	ldr	fp, .L2909+84
+	ldr	fp, .L2998+84
 	adds	r2, r3, r4
 	cmp	r2, r1
 	itt	gt
@@ -20420,11 +20839,11 @@ rk_ftl_garbage_collect:
 	it	gt
 	uxthgt	r4, r4
 	str	r3, [sp, #20]
-.L2855:
+.L2944:
 	ldrh	r3, [sp, #20]
 	cmp	r4, r3
-	bls	.L2863
-	ldr	r3, .L2909+52
+	bls	.L2952
+	ldr	r3, .L2998+52
 	movw	r8, #65535
 	ldrh	lr, [r5, #2]
 	mov	r10, #36
@@ -20432,17 +20851,17 @@ rk_ftl_garbage_collect:
 	ldrh	r7, [r3]
 	ldr	r3, [sp, #20]
 	add	lr, lr, r3
-	ldr	r3, .L2909+56
+	ldr	r3, .L2998+56
 	str	r3, [sp, #16]
 	movs	r3, #0
 	str	r3, [sp, #8]
-	b	.L2864
-.L2857:
+	b	.L2953
+.L2946:
 	ldr	r1, [sp, #16]
 	ldrh	r2, [r1, #2]!
 	cmp	r2, r8
 	str	r1, [sp, #16]
-	beq	.L2856
+	beq	.L2945
 	ldr	r1, [sp, #8]
 	orr	r2, lr, r2, lsl #10
 	mla	ip, r10, r1, r0
@@ -20451,27 +20870,27 @@ rk_ftl_garbage_collect:
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r2, [sp, #8]
-.L2856:
+.L2945:
 	adds	r3, r3, #1
-.L2864:
+.L2953:
 	uxth	r2, r3
 	cmp	r2, r7
-	bcc	.L2857
+	bcc	.L2946
 	ldrb	r2, [r5, #8]	@ zero_extendqisi2
 	ldr	r1, [sp, #8]
 	bl	FlashReadPages
 	movs	r3, #0
-.L2904:
+.L2993:
 	str	r3, [sp, #16]
 	ldr	r2, [sp, #8]
 	ldrh	r3, [sp, #16]
 	cmp	r2, r3
-	bhi	.L2862
+	bhi	.L2951
 	ldr	r3, [sp, #20]
 	adds	r3, r3, #1
 	str	r3, [sp, #20]
-	b	.L2855
-.L2862:
+	b	.L2944
+.L2951:
 	ldr	r3, [sp, #16]
 	movs	r7, #36
 	muls	r7, r3, r7
@@ -20479,23 +20898,23 @@ rk_ftl_garbage_collect:
 	adds	r2, r3, r7
 	ldr	r3, [r3, r7]
 	adds	r3, r3, #1
-	beq	.L2859
+	beq	.L2948
 	ldr	r8, [r2, #12]
 	movw	r3, #61589
 	ldrh	r2, [r8]
 	cmp	r2, r3
-	bne	.L2859
+	bne	.L2948
 	ldr	r10, [r8, #8]
 	cmp	r10, #-1
-	bne	.L2860
-	ldr	r1, .L2909+8
-	movw	r2, #898
-	ldr	r0, .L2909+12
+	bne	.L2949
+	ldr	r1, .L2998+8
+	movw	r2, #934
+	ldr	r0, .L2998+12
 	bl	printf
-	ldr	r1, .L2909+16
-	ldr	r0, .L2909+20
+	ldr	r1, .L2998+16
+	ldr	r0, .L2998+20
 	bl	printf
-.L2860:
+.L2949:
 	movs	r2, #0
 	add	r1, sp, #36
 	mov	r0, r10
@@ -20506,10 +20925,10 @@ rk_ftl_garbage_collect:
 	ldr	r2, [r0, #4]
 	bic	r3, r3, #-2147483648
 	cmp	r3, r2
-	bne	.L2859
-	ldr	r2, .L2909+32
-	ldr	r1, .L2909+60
-	ldr	r10, .L2909+68
+	bne	.L2948
+	ldr	r2, .L2998+32
+	ldr	r1, .L2998+60
+	ldr	r10, .L2998+68
 	ldrh	r3, [r2]
 	str	r1, [sp, #28]
 	adds	r3, r3, #1
@@ -20531,7 +20950,7 @@ rk_ftl_garbage_collect:
 	ldr	r0, [fp]
 	mla	r2, r1, r3, r2
 	add	r0, r0, r7
-	ldr	r7, .L2909+28
+	ldr	r7, .L2998+28
 	ldr	r1, [r0, #8]
 	adds	r3, r3, #1
 	str	r1, [r2, #8]
@@ -20542,62 +20961,62 @@ rk_ftl_garbage_collect:
 	str	r2, [r8, #12]
 	ldrh	r2, [r7]
 	strh	r2, [r8, #2]	@ movhi
-	ldr	r2, .L2909+64
+	ldr	r2, .L2998+64
 	str	r3, [r10]
 	ldr	r2, [r2]
 	str	r2, [r8, #4]
 	bl	FtlGcBufAlloc
-	ldr	r3, .L2909
+	ldr	r3, .L2998
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L2861
+	cbnz	r3, .L2950
 	ldrb	r2, [r7, #7]	@ zero_extendqisi2
 	ldr	r3, [r10]
 	cmp	r2, r3
-	beq	.L2861
+	beq	.L2950
 	ldrh	r3, [r7, #4]
-	cbnz	r3, .L2859
-.L2861:
+	cbnz	r3, .L2948
+.L2950:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	r0, .L2859
-.L2906:
-	ldr	r3, .L2909+40
+	cbz	r0, .L2948
+.L2995:
+	ldr	r3, .L2998+40
 	movs	r2, #0
 	str	r2, [r3]
-	b	.L2905
-.L2859:
+	b	.L2994
+.L2948:
 	ldr	r3, [sp, #16]
 	adds	r3, r3, #1
-	b	.L2904
-.L2863:
+	b	.L2993
+.L2952:
 	ldrh	r3, [r5, #2]
 	add	r4, r4, r3
 	ldr	r3, [sp, #12]
 	uxth	r4, r4
 	cmp	r3, r4
 	strh	r4, [r5, #2]	@ movhi
-	bhi	.L2865
-	ldr	r3, .L2909+68
+	bhi	.L2954
+	ldr	r3, .L2998+68
 	ldr	r3, [r3]
-	cbz	r3, .L2866
+	cbz	r3, .L2955
 	bl	Ftl_gc_temp_data_write_back
 	cmp	r0, #0
-	bne	.L2906
-.L2866:
-	ldr	r3, .L2909+32
+	bne	.L2995
+.L2955:
+	ldr	r3, .L2998+32
 	ldrh	r4, [r3]
-	cbnz	r4, .L2867
-	ldr	r7, .L2909+72
+	cbnz	r4, .L2956
+	ldr	r7, .L2998+72
 	ldrh	r1, [r5]
 	ldr	r3, [r7]
 	ldrh	r3, [r3, r1, lsl #1]
-	cbz	r3, .L2867
-	ldr	r0, .L2909+36
+	cbz	r3, .L2956
+	ldr	r0, .L2998+36
 	ldrh	r2, [r5, #2]
 	ldrh	r0, [r0]
 	str	r3, [sp]
 	mov	r3, r4
 	str	r0, [sp, #4]
-	ldr	r0, .L2909+76
+	ldr	r0, .L2998+76
 	bl	printf
 	ldrh	r2, [r5]
 	ldr	r3, [r7]
@@ -20607,54 +21026,54 @@ rk_ftl_garbage_collect:
 	bl	FtlCacheWriteBack
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L2867:
+.L2956:
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.L2865:
-	ldr	r3, .L2909+80
+.L2954:
+	ldr	r3, .L2998+80
 	ldrh	r0, [r3]
 	cmp	r0, #2
-	bhi	.L2868
-	ldr	r3, .L2909+44
+	bhi	.L2957
+	ldr	r3, .L2998+44
 	ldrh	r4, [r3]
-	b	.L2839
-.L2868:
-	ldr	r3, .L2909+40
+	b	.L2928
+.L2957:
+	ldr	r3, .L2998+40
 	movs	r2, #0
 	adds	r0, r0, #1
 	str	r2, [r3]
-	b	.L2817
-.L2910:
+	b	.L2906
+.L2999:
 	.align	2
-.L2909:
-	.word	.LANCHOR8
-	.word	.LANCHOR92
+.L2998:
+	.word	.LANCHOR15
+	.word	.LANCHOR91
 	.word	.LANCHOR243
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
+	.word	.LANCHOR92
 	.word	.LANCHOR93
-	.word	.LANCHOR94
 	.word	.LANCHOR241
 	.word	.LANCHOR242
 	.word	.LANCHOR171
+	.word	.LANCHOR52
 	.word	.LANCHOR53
-	.word	.LANCHOR54
 	.word	.LANCHOR38
 	.word	.LANCHOR204+14
 	.word	.LANCHOR181
 	.word	.LANCHOR160
-	.word	.LANCHOR103
-	.word	.LANCHOR84
-	.word	.LC65
-	.word	.LANCHOR89
-	.word	.LANCHOR107
-.L2869:
+	.word	.LANCHOR102
+	.word	.LANCHOR83
+	.word	.LC66
+	.word	.LANCHOR88
+	.word	.LANCHOR106
+.L2958:
 	movs	r0, #0
-	b	.L2817
-.L2871:
+	b	.L2906
+.L2960:
 	mov	r0, r3
-	b	.L2817
+	b	.L2906
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
 	.section	.text.FtlInit,"ax",%progbits
 	.align	1
@@ -20669,68 +21088,68 @@ FtlInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	mov	r3, #-1
-	ldr	r4, .L2920
+	ldr	r4, .L3009
 	mov	r5, r0
-	ldr	r2, .L2920+4
+	ldr	r2, .L3009+4
 	str	r3, [r4]
 	movs	r3, #0
-	ldr	r1, .L2920+8
+	ldr	r1, .L3009+8
 	str	r3, [r2]
-	ldr	r2, .L2920+12
-	ldr	r0, .L2920+16
+	ldr	r2, .L3009+12
+	ldr	r0, .L3009+16
 	str	r3, [r2]
 	bl	printf
 	mov	r0, r5
 	bl	FtlConstantsInit
 	bl	FtlMemInit
 	bl	FtlVariablesInit
-	ldr	r3, .L2920+20
+	ldr	r3, .L3009+20
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	r0, .L2912
-	ldr	r1, .L2920+24
-	ldr	r0, .L2920+28
-.L2919:
+	cbz	r0, .L3001
+	ldr	r1, .L3009+24
+	ldr	r0, .L3009+28
+.L3008:
 	bl	printf
-.L2913:
+.L3002:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L2912:
+.L3001:
 	bl	FtlSysBlkInit
-	cbz	r0, .L2914
-	ldr	r1, .L2920+24
-	ldr	r0, .L2920+32
-	b	.L2919
-.L2914:
+	cbz	r0, .L3003
+	ldr	r1, .L3009+24
+	ldr	r0, .L3009+32
+	b	.L3008
+.L3003:
 	movs	r1, #1
 	str	r1, [r4]
 	bl	rk_ftl_garbage_collect
-	ldr	r3, .L2920+36
+	ldr	r3, .L3009+36
 	ldrh	r3, [r3]
 	cmp	r3, #15
-	bhi	.L2913
+	bhi	.L3002
 	mov	r4, #1024
-.L2916:
+.L3005:
 	movs	r1, #1
 	mov	r0, r1
 	bl	rk_ftl_garbage_collect
 	subs	r4, r4, #1
-	bne	.L2916
-	b	.L2913
-.L2921:
+	bne	.L3005
+	b	.L3002
+.L3010:
 	.align	2
-.L2920:
-	.word	.LANCHOR231
+.L3009:
+	.word	.LANCHOR230
 	.word	.LANCHOR244
-	.word	.LC66
-	.word	.LANCHOR77
+	.word	.LC67
+	.word	.LANCHOR76
 	.word	.LC7
 	.word	.LANCHOR39
 	.word	.LANCHOR245
-	.word	.LC67
 	.word	.LC68
-	.word	.LANCHOR89
+	.word	.LC69
+	.word	.LANCHOR88
 	.size	FtlInit, .-FtlInit
 	.section	.text.rk_ftl_init,"ax",%progbits
 	.align	1
@@ -20746,21 +21165,21 @@ rk_ftl_init:
 	push	{r4, lr}
 	bl	FlashInit
 	mov	r4, r0
-	cbnz	r0, .L2923
-	ldr	r0, .L2924
+	cbnz	r0, .L3012
+	ldr	r0, .L3013
 	bl	FtlInit
-.L2923:
+.L3012:
 	bl	idb_init
 	mov	r1, r4
-	ldr	r0, .L2924+4
+	ldr	r0, .L3013+4
 	bl	printf
 	mov	r0, r4
 	pop	{r4, pc}
-.L2925:
+.L3014:
 	.align	2
-.L2924:
-	.word	.LANCHOR15
-	.word	.LC69
+.L3013:
+	.word	.LANCHOR14
+	.word	.LC70
 	.size	rk_ftl_init, .-rk_ftl_init
 	.section	.text.ftl_fix_nand_power_lost_error,"ax",%progbits
 	.align	1
@@ -20773,20 +21192,20 @@ rk_ftl_init:
 ftl_fix_nand_power_lost_error:
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2940
+	ldr	r3, .L3029
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #56
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L2926
-	ldr	r7, .L2940+4
-	ldr	r6, .L2940+8
-	ldr	r10, .L2940+32
+	beq	.L3015
+	ldr	r7, .L3029+4
+	ldr	r6, .L3029+8
+	ldr	r10, .L3029+32
 	ldrh	r5, [r7]
 	ldr	r3, [r6]
-	ldr	r4, .L2940+12
+	ldr	r4, .L3029+12
 	mov	r1, r5
-	ldr	r0, .L2940+16
+	ldr	r0, .L3029+16
 	ldrh	r2, [r3, r5, lsl #1]
 	lsl	r8, r5, #1
 	bl	printf
@@ -20800,44 +21219,44 @@ ftl_fix_nand_power_lost_error:
 	movw	r4, #4097
 	bl	allocate_new_data_superblock
 	str	r7, [sp, #4]
-.L2928:
+.L3017:
 	subs	r4, r4, #1
-	beq	.L2932
+	beq	.L3021
 	movs	r1, #1
 	mov	r0, r1
 	bl	rk_ftl_garbage_collect
 	ldr	r3, [r6]
 	ldrh	r3, [r3, r8]
 	cmp	r3, #0
-	bne	.L2928
-.L2932:
+	bne	.L3017
+.L3021:
 	ldr	r3, [r6]
 	mov	r1, r5
-	ldr	r0, .L2940+16
+	ldr	r0, .L3029+16
 	ldrh	r2, [r3, r5, lsl #1]
 	bl	printf
 	ldr	r3, [r6]
 	ldrh	r4, [r3, r5, lsl #1]
-	cbnz	r4, .L2930
+	cbnz	r4, .L3019
 	add	r0, sp, #56
-	ldr	r7, .L2940+20
+	ldr	r7, .L3029+20
 	strh	r5, [r0, #-48]!	@ movhi
 	movw	r10, #65535
 	bl	make_superblock
-	ldr	r3, .L2940+24
+	ldr	r3, .L3029+24
 	add	r0, sp, #22
 	ldr	r8, [r7]
 	mov	r2, r4
 	mov	fp, #36
 	mov	ip, r4
 	ldrh	lr, [r3]
-.L2933:
+.L3022:
 	uxth	r3, r2
 	cmp	lr, r3
-	bhi	.L2935
+	bhi	.L3024
 	ldr	r3, [r6]
 	mov	r1, r5
-	ldr	r0, .L2940+28
+	ldr	r0, .L3029+28
 	ldrh	r2, [r3, r5, lsl #1]
 	bl	printf
 	mov	r2, r4
@@ -20848,18 +21267,18 @@ ftl_fix_nand_power_lost_error:
 	movs	r1, #1
 	ldr	r0, [r7]
 	bl	FlashEraseBlocks
-.L2930:
+.L3019:
 	ldr	r2, [sp, #4]
 	movw	r3, #65535
 	strh	r3, [r2]	@ movhi
-.L2926:
+.L3015:
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2935:
+.L3024:
 	ldrh	r3, [r0, #2]!
 	cmp	r3, r10
-	beq	.L2934
+	beq	.L3023
 	mla	r1, fp, r4, r8
 	adds	r4, r4, #1
 	lsls	r3, r3, #10
@@ -20867,21 +21286,21 @@ ftl_fix_nand_power_lost_error:
 	str	r3, [r1, #4]
 	str	ip, [r1, #8]
 	str	ip, [r1, #12]
-.L2934:
+.L3023:
 	adds	r2, r2, #1
-	b	.L2933
-.L2941:
+	b	.L3022
+.L3030:
 	.align	2
-.L2940:
-	.word	.LANCHOR8
-	.word	.LANCHOR235
-	.word	.LANCHOR84
-	.word	.LANCHOR93
-	.word	.LC70
-	.word	.LANCHOR78
-	.word	.LANCHOR38
-	.word	.LC71
+.L3029:
+	.word	.LANCHOR15
+	.word	.LANCHOR234
+	.word	.LANCHOR83
 	.word	.LANCHOR92
+	.word	.LC71
+	.word	.LANCHOR77
+	.word	.LANCHOR38
+	.word	.LC72
+	.word	.LANCHOR91
 	.size	ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error
 	.section	.text.ftl_read,"ax",%progbits
 	.align	1
@@ -20900,34 +21319,34 @@ ftl_read:
 	mov	r6, r1
 	mov	r7, r3
 	str	r2, [sp, #52]
-	bne	.L2943
+	bne	.L3032
 	mov	r2, r3
 	ldr	r1, [sp, #52]
 	add	r0, r6, #256
 	bl	FtlVendorPartRead
 	str	r0, [sp, #32]
-.L2942:
+.L3031:
 	ldr	r0, [sp, #32]
 	add	sp, sp, #88
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2943:
+.L3032:
 	ldr	r3, [sp, #52]
 	adds	r3, r1, r3
 	str	r3, [sp, #36]
-	ldr	r3, .L2981
+	ldr	r3, .L3070
 	ldr	r2, [sp, #36]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L2966
-	ldr	r3, .L2981+4
+	bhi	.L3055
+	ldr	r3, .L3070+4
 	ldr	r3, [r3]
 	adds	r4, r3, #1
-	beq	.L2967
+	beq	.L3056
 	bl	FtlCacheWriteBack
-	ldr	r3, .L2981+8
+	ldr	r3, .L3070+8
 	mov	r0, r6
-	ldr	r10, .L2981+52
+	ldr	r10, .L3070+52
 	ldrh	r4, [r3]
 	mov	r1, r4
 	bl	__aeabi_uidiv
@@ -20937,7 +21356,7 @@ ftl_read:
 	subs	r0, r3, #1
 	bl	__aeabi_uidiv
 	ldr	r3, [sp, #40]
-	ldr	r2, .L2981+12
+	ldr	r2, .L3070+12
 	ldr	r4, [sp, #40]
 	rsb	r3, r3, #1
 	str	r0, [sp, #44]
@@ -20952,44 +21371,44 @@ ftl_read:
 	str	r3, [sp, #24]
 	str	r3, [sp, #48]
 	str	r3, [sp, #32]
-.L2945:
+.L3034:
 	ldr	r3, [sp, #28]
-	cbnz	r3, .L2965
-	ldr	r3, .L2981+16
+	cbnz	r3, .L3054
+	ldr	r3, .L3070+16
 	ldrh	r3, [r3]
 	cmp	r3, #0
-	beq	.L2942
+	beq	.L3031
 	movs	r1, #1
 	ldr	r0, [sp, #28]
 	bl	rk_ftl_garbage_collect
-	b	.L2942
-.L2965:
+	b	.L3031
+.L3054:
 	movs	r2, #0
 	add	r1, sp, #84
 	mov	r0, r4
 	bl	log2phys
 	ldr	r3, [sp, #84]
 	adds	r0, r3, #1
-	bne	.L2946
-	ldr	fp, .L2981+8
+	bne	.L3035
+	ldr	fp, .L3070+8
 	mov	r8, #0
-.L2947:
+.L3036:
 	ldrh	r0, [fp]
 	cmp	r8, r0
-	bcc	.L2949
-.L2950:
+	bcc	.L3038
+.L3039:
 	ldr	r3, [sp, #28]
 	adds	r4, r4, #1
 	subs	r3, r3, #1
 	str	r3, [sp, #28]
-	beq	.L2954
-	ldr	r3, .L2981+20
+	beq	.L3043
+	ldr	r3, .L3070+20
 	ldrh	r3, [r3]
 	cmp	r5, r3, lsl #2
-	bne	.L2945
-.L2954:
+	bne	.L3034
+.L3043:
 	cmp	r5, #0
-	beq	.L2945
+	beq	.L3034
 	movs	r2, #0
 	mov	r1, r5
 	ldr	r0, [r10]
@@ -21004,7 +21423,7 @@ ftl_read:
 	ldr	r3, [sp, #48]
 	lsls	r3, r3, #9
 	str	r3, [sp, #64]
-.L2964:
+.L3053:
 	mov	r8, #36
 	ldr	r3, [r10]
 	mul	r8, r8, fp
@@ -21012,27 +21431,27 @@ ftl_read:
 	add	r3, r3, r8
 	ldr	r2, [r3, #16]
 	cmp	r1, r2
-	bne	.L2956
+	bne	.L3045
 	ldr	r1, [r3, #8]
-	ldr	r3, .L2981+24
+	ldr	r3, .L3070+24
 	ldr	r3, [r3]
 	cmp	r1, r3
-	bne	.L2957
+	bne	.L3046
 	ldr	r3, [sp, #60]
 	mov	r0, r7
 	ldr	r2, [sp, #64]
 	add	r1, r1, r3
-.L2980:
+.L3069:
 	bl	ftl_memcpy
-.L2957:
+.L3046:
 	ldr	r2, [r10]
 	add	r2, r2, r8
 	ldr	r3, [r2, #12]
 	ldr	lr, [r2, #16]
 	ldr	r0, [r3, #8]
 	cmp	lr, r0
-	beq	.L2958
-	ldr	ip, .L2981+32
+	beq	.L3047
+	ldr	ip, .L3070+32
 	ldr	r0, [ip, #72]
 	adds	r0, r0, #1
 	str	r0, [ip, #72]
@@ -21048,52 +21467,52 @@ ftl_read:
 	str	r0, [sp, #4]
 	ldr	r0, [r3, #4]
 	str	r0, [sp]
-	ldr	r0, .L2981+28
+	ldr	r0, .L3070+28
 	ldr	r3, [r3]
 	ldr	r2, [r2, #4]
 	bl	printf
-.L2958:
+.L3047:
 	ldr	r3, [r10]
 	add	r2, r3, r8
 	ldr	r3, [r3, r8]
 	adds	r1, r3, #1
-	bne	.L2959
-	ldr	r1, .L2981+32
+	bne	.L3048
+	ldr	r1, .L3070+32
 	str	r3, [sp, #32]
 	ldr	r2, [r1, #72]
 	adds	r2, r2, #1
 	str	r2, [r1, #72]
-.L2960:
+.L3049:
 	add	fp, fp, #1
 	cmp	r5, fp
-	bne	.L2964
+	bne	.L3053
 	movs	r5, #0
-	b	.L2945
-.L2949:
+	b	.L3034
+.L3038:
 	mla	r0, r0, r4, r8
 	cmp	r6, r0
-	bhi	.L2948
+	bhi	.L3037
 	ldr	r3, [sp, #36]
 	cmp	r3, r0
-	bls	.L2948
+	bls	.L3037
 	subs	r0, r0, r6
 	mov	r2, #512
 	movs	r1, #0
 	add	r0, r7, r0, lsl #9
 	bl	ftl_memset
-.L2948:
+.L3037:
 	add	r8, r8, #1
-	b	.L2947
-.L2946:
+	b	.L3036
+.L3035:
 	ldr	r2, [r10]
 	mov	r8, #36
 	mla	r8, r8, r5, r2
 	str	r3, [r8, #4]
 	ldr	r3, [sp, #40]
 	cmp	r4, r3
-	ldr	r3, .L2981+8
-	bne	.L2951
-	ldr	r2, .L2981+24
+	ldr	r3, .L3070+8
+	bne	.L3040
+	ldr	r2, .L3070+24
 	mov	r0, r6
 	ldrh	fp, [r3]
 	ldr	r2, [r2]
@@ -21108,11 +21527,11 @@ ftl_read:
 	movcs	r3, r2
 	cmp	fp, r3
 	str	r3, [sp, #48]
-	bne	.L2952
+	bne	.L3041
 	str	r7, [r8, #8]
-.L2952:
-	ldr	r3, .L2981+36
-	ldr	r2, .L2981+40
+.L3041:
+	ldr	r3, .L3070+36
+	ldr	r2, .L3070+40
 	str	r4, [r8, #16]
 	ldrh	r3, [r3]
 	ldr	r2, [r2]
@@ -21121,12 +21540,12 @@ ftl_read:
 	bic	r3, r3, #3
 	add	r3, r3, r2
 	str	r3, [r8, #12]
-	b	.L2950
-.L2951:
+	b	.L3039
+.L3040:
 	ldr	r2, [sp, #44]
 	cmp	r4, r2
-	bne	.L2953
-	ldr	r2, .L2981+44
+	bne	.L3042
+	ldr	r2, .L3070+44
 	ldr	r1, [sp, #36]
 	ldr	r2, [r2]
 	str	r2, [r8, #8]
@@ -21135,50 +21554,50 @@ ftl_read:
 	subs	r1, r1, r3
 	cmp	r2, r1
 	str	r1, [sp, #24]
-	bne	.L2952
-.L2979:
+	bne	.L3041
+.L3068:
 	subs	r3, r3, r6
 	add	r3, r7, r3, lsl #9
 	str	r3, [r8, #8]
-	b	.L2952
-.L2953:
+	b	.L3041
+.L3042:
 	ldrh	r3, [r3]
 	muls	r3, r4, r3
-	b	.L2979
-.L2956:
+	b	.L3068
+.L3045:
 	ldr	r1, [sp, #44]
 	cmp	r1, r2
-	bne	.L2957
+	bne	.L3046
 	ldr	r1, [r3, #8]
-	ldr	r3, .L2981+44
+	ldr	r3, .L3070+44
 	ldr	r3, [r3]
 	cmp	r1, r3
-	bne	.L2957
-	ldr	r3, .L2981+8
+	bne	.L3046
+	ldr	r3, .L3070+8
 	ldr	r2, [sp, #68]
 	ldrh	r0, [r3]
 	ldr	r3, [sp, #44]
 	muls	r0, r3, r0
 	subs	r0, r0, r6
 	add	r0, r7, r0, lsl #9
-	b	.L2980
-.L2959:
+	b	.L3069
+.L3048:
 	cmp	r3, #256
-	bne	.L2960
+	bne	.L3049
 	ldr	r0, [r2, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	mov	r8, r0
 	bl	FtlGcRefreshBlock
-	ldr	r2, .L2981+48
+	ldr	r2, .L3070+48
 	movw	r3, #2049
-.L2962:
+.L3051:
 	subs	r3, r3, #1
-	bne	.L2961
-.L2963:
+	bne	.L3050
+.L3052:
 	bl	FtlSysFlush
-	b	.L2960
-.L2961:
+	b	.L3049
+.L3050:
 	movs	r1, #1
 	str	r2, [sp, #76]
 	mov	r0, r1
@@ -21188,26 +21607,26 @@ ftl_read:
 	ldr	r3, [sp, #72]
 	ldrh	r1, [r2]
 	cmp	r1, r8
-	beq	.L2962
-	b	.L2963
-.L2966:
+	beq	.L3051
+	b	.L3052
+.L3055:
 	mov	r3, #-1
-.L2967:
+.L3056:
 	str	r3, [sp, #32]
-	b	.L2942
-.L2982:
+	b	.L3031
+.L3071:
 	.align	2
-.L2981:
-	.word	.LANCHOR69
-	.word	.LANCHOR231
-	.word	.LANCHOR56
+.L3070:
+	.word	.LANCHOR68
+	.word	.LANCHOR230
+	.word	.LANCHOR55
 	.word	.LANCHOR166
-	.word	.LANCHOR117
+	.word	.LANCHOR116
 	.word	.LANCHOR38
 	.word	.LANCHOR186
-	.word	.LC60
+	.word	.LC59
 	.word	.LANCHOR138
-	.word	.LANCHOR59
+	.word	.LANCHOR58
 	.word	.LANCHOR189
 	.word	.LANCHOR187
 	.word	.LANCHOR204
@@ -21226,39 +21645,39 @@ FtlWrite:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, r3
-	ldr	r3, .L3031
+	ldr	r3, .L3120
 	sub	sp, sp, #80
 	mov	r6, r1
 	str	r2, [sp, #12]
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L3016
+	bne	.L3105
 	cmp	r0, #16
-	bne	.L2985
+	bne	.L3074
 	mov	r2, r10
 	ldr	r1, [sp, #12]
 	add	r0, r6, #256
 	bl	FtlVendorPartWrite
-.L2983:
+.L3072:
 	add	sp, sp, #80
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2985:
+.L3074:
 	ldr	r3, [sp, #12]
 	adds	r5, r1, r3
-	ldr	r3, .L3031+4
+	ldr	r3, .L3120+4
 	ldr	r3, [r3]
 	cmp	r5, r3
-	bhi	.L3017
-	ldr	r3, .L3031+8
+	bhi	.L3106
+	ldr	r3, .L3120+8
 	ldr	r0, [r3]
 	adds	r4, r0, #1
-	beq	.L2983
-	ldr	r3, .L3031+12
+	beq	.L3072
+	ldr	r3, .L3120+12
 	mov	r2, #2048
 	mov	r0, r6
 	str	r2, [r3]
-	ldr	r3, .L3031+16
+	ldr	r3, .L3120+16
 	ldrh	r4, [r3]
 	mov	r1, r4
 	bl	__aeabi_uidiv
@@ -21266,7 +21685,7 @@ FtlWrite:
 	mov	r8, r0
 	subs	r0, r5, #1
 	bl	__aeabi_uidiv
-	ldr	r2, .L3031+20
+	ldr	r2, .L3120+20
 	sub	r5, r0, r8
 	adds	r3, r5, #1
 	adds	r1, r5, #1
@@ -21275,29 +21694,29 @@ FtlWrite:
 	str	r0, [sp, #16]
 	add	r3, r3, r1
 	str	r3, [r2]
-	ldr	r3, .L3031+24
+	ldr	r3, .L3120+24
 	ldr	fp, [r3]
 	cmp	fp, #0
-	beq	.L2987
+	beq	.L3076
 	ldr	r3, [fp, #16]
 	cmp	r8, r3
-	beq	.L2988
+	beq	.L3077
 	bl	FtlCacheWriteBack
-.L2987:
-	ldr	r7, .L3031+28
+.L3076:
+	ldr	r7, .L3120+28
 	mov	r4, r8
-.L2989:
+.L3078:
 	ldr	r3, [sp, #4]
-	cbnz	r3, .L3015
+	cbnz	r3, .L3104
 	ldr	r3, [sp, #16]
 	ldr	r0, [sp, #4]
 	sub	r1, r3, r8
 	bl	rk_ftl_garbage_collect
-.L3016:
+.L3105:
 	movs	r0, #0
-	b	.L2983
-.L2988:
-	ldr	r2, .L3031+32
+	b	.L3072
+.L3077:
+	ldr	r2, .L3120+32
 	mov	r1, r4
 	mov	r0, r6
 	ldr	r3, [r2]
@@ -21317,7 +21736,7 @@ FtlWrite:
 	mov	r2, r7
 	bl	ftl_memcpy
 	cmp	r5, #0
-	beq	.L3016
+	beq	.L3105
 	ldr	r3, [sp, #12]
 	add	r6, r6, r4
 	add	r10, r10, r7
@@ -21326,27 +21745,27 @@ FtlWrite:
 	str	r3, [sp, #12]
 	bl	FtlCacheWriteBack
 	str	r5, [sp, #4]
-	b	.L2987
-.L3015:
-	ldr	r5, .L3031+36
+	b	.L3076
+.L3104:
+	ldr	r5, .L3120+36
 	ldrb	r2, [r7, #6]	@ zero_extendqisi2
 	ldrh	r3, [r5]
 	cmp	r2, r3
-	bcc	.L2990
-	ldr	r1, .L3031+40
+	bcc	.L3079
+	ldr	r1, .L3120+40
 	movw	r2, #1668
-	ldr	r0, .L3031+44
+	ldr	r0, .L3120+44
 	bl	printf
-	ldr	r1, .L3031+48
-	ldr	r0, .L3031+52
+	ldr	r1, .L3120+48
+	ldr	r0, .L3120+52
 	bl	printf
-.L2990:
+.L3079:
 	ldrh	r3, [r7, #4]
-	cbnz	r3, .L2991
+	cbnz	r3, .L3080
 	bl	FtlCacheWriteBack
 	mov	r0, r7
 	bl	allocate_new_data_superblock
-.L2991:
+.L3080:
 	ldrb	r3, [r7, #7]	@ zero_extendqisi2
 	ldrh	r2, [r7, #4]
 	lsls	r3, r3, #2
@@ -21361,24 +21780,24 @@ FtlWrite:
 	str	r3, [sp, #36]
 	ldrh	r3, [r5]
 	cmp	r2, r3
-	bcc	.L2992
-	ldr	r1, .L3031+40
+	bcc	.L3081
+	ldr	r1, .L3120+40
 	movw	r2, #1701
-	ldr	r0, .L3031+44
+	ldr	r0, .L3120+44
 	bl	printf
-	ldr	r1, .L3031+48
-	ldr	r0, .L3031+52
+	ldr	r1, .L3120+48
+	ldr	r0, .L3120+52
 	bl	printf
-.L2992:
+.L3081:
 	movs	r3, #0
-.L3030:
+.L3119:
 	str	r3, [sp, #8]
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #36]
 	cmp	r3, r2
-	bne	.L3013
-.L2994:
-	ldr	r0, .L3031+56
+	bne	.L3102
+.L3083:
+	ldr	r0, .L3120+56
 	mov	r3, r7
 	movs	r2, #0
 	ldr	r1, [sp, #8]
@@ -21387,24 +21806,24 @@ FtlWrite:
 	ldr	r3, [sp, #4]
 	ldr	r2, [sp, #8]
 	cmp	r3, r2
-	bcs	.L3014
-	ldr	r1, .L3031+40
+	bcs	.L3103
+	ldr	r1, .L3120+40
 	movw	r2, #1790
-	ldr	r0, .L3031+44
+	ldr	r0, .L3120+44
 	bl	printf
-	ldr	r1, .L3031+48
-	ldr	r0, .L3031+52
+	ldr	r1, .L3120+48
+	ldr	r0, .L3120+52
 	bl	printf
-.L3014:
+.L3103:
 	ldr	r3, [sp, #4]
 	ldr	r2, [sp, #8]
 	subs	r3, r3, r2
 	str	r3, [sp, #4]
-	b	.L2989
-.L3013:
+	b	.L3078
+.L3102:
 	ldrh	r3, [r7, #4]
 	cmp	r3, #0
-	beq	.L2994
+	beq	.L3083
 	movs	r2, #0
 	add	r1, sp, #40
 	mov	r0, r4
@@ -21413,9 +21832,9 @@ FtlWrite:
 	mov	r0, r7
 	bl	get_new_active_ppa
 	ldr	r3, [sp, #8]
-	ldr	r2, .L3031+60
+	ldr	r2, .L3120+60
 	muls	r5, r3, r5
-	ldr	r3, .L3031+56
+	ldr	r3, .L3120+56
 	ldrh	r2, [r2]
 	ldr	r1, [r3]
 	str	r3, [sp, #20]
@@ -21425,7 +21844,7 @@ FtlWrite:
 	str	r4, [r1, #16]
 	mul	r0, r2, r3
 	bic	r3, r0, #3
-	ldr	r0, .L3031+64
+	ldr	r0, .L3120+64
 	str	r3, [sp, #28]
 	ldr	r3, [r0]
 	ldr	r0, [sp, #28]
@@ -21436,12 +21855,12 @@ FtlWrite:
 	movs	r1, #0
 	bl	ftl_memset
 	cmp	r4, r8
-	ldr	r1, .L3031+16
-	beq	.L2995
+	ldr	r1, .L3120+16
+	beq	.L3084
 	ldr	r3, [sp, #16]
 	cmp	r3, r4
 	ldr	r3, [sp, #20]
-	bne	.L3026
+	bne	.L3115
 	ldr	r3, [sp, #12]
 	adds	r2, r6, r3
 	ldrh	r3, [r1]
@@ -21452,8 +21871,8 @@ FtlWrite:
 	str	r3, [sp, #20]
 	movs	r3, #0
 	str	r3, [sp, #24]
-	b	.L2998
-.L2995:
+	b	.L3087
+.L3084:
 	ldrh	r2, [r1]
 	mov	r0, r6
 	mov	r1, r2
@@ -21468,14 +21887,14 @@ FtlWrite:
 	it	cs
 	movcs	r3, r1
 	str	r3, [sp, #20]
-.L2998:
-	ldr	r3, .L3031+16
+.L3087:
+	ldr	r3, .L3120+16
 	ldr	r2, [sp, #20]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	ldr	r3, .L3031+56
+	ldr	r3, .L3120+56
 	ldr	r3, [r3]
-	bne	.L2999
+	bne	.L3088
 	cmp	r4, r8
 	add	r5, r5, r3
 	itett	ne
@@ -21486,25 +21905,25 @@ FtlWrite:
 	itt	ne
 	addne	r2, r10, r2, lsl #9
 	strne	r2, [r5, #8]
-.L3001:
-	ldr	r3, .L3031+36
+.L3090:
+	ldr	r3, .L3120+36
 	ldrb	r2, [r7, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L3010
-	ldr	r1, .L3031+40
+	bcc	.L3099
+	ldr	r1, .L3120+40
 	movw	r2, #1775
-	ldr	r0, .L3031+44
+	ldr	r0, .L3120+44
 	bl	printf
-	ldr	r1, .L3031+48
-	ldr	r0, .L3031+52
+	ldr	r1, .L3120+48
+	ldr	r0, .L3120+52
 	bl	printf
-.L3010:
+.L3099:
 	ldr	r2, [sp, #32]
 	movw	r3, #61589
 	ldr	r1, [sp, #28]
 	strh	r3, [r2, r1]	@ movhi
-	ldr	r2, .L3031+68
+	ldr	r2, .L3120+68
 	str	r4, [fp, #8]
 	adds	r4, r4, #1
 	ldr	r3, [r2]
@@ -21520,18 +21939,18 @@ FtlWrite:
 	strh	r3, [fp, #2]	@ movhi
 	ldr	r3, [sp, #8]
 	adds	r3, r3, #1
-	b	.L3030
-.L3032:
+	b	.L3119
+.L3121:
 	.align	2
-.L3031:
-	.word	.LANCHOR77
-	.word	.LANCHOR69
-	.word	.LANCHOR231
+.L3120:
+	.word	.LANCHOR76
+	.word	.LANCHOR68
+	.word	.LANCHOR230
 	.word	.LANCHOR246
-	.word	.LANCHOR56
+	.word	.LANCHOR55
 	.word	.LANCHOR162
 	.word	.LANCHOR132
-	.word	.LANCHOR92
+	.word	.LANCHOR91
 	.word	.LANCHOR164
 	.word	.LANCHOR38
 	.word	.LANCHOR247
@@ -21539,21 +21958,21 @@ FtlWrite:
 	.word	.LC6
 	.word	.LC7
 	.word	.LANCHOR182
-	.word	.LANCHOR59
+	.word	.LANCHOR58
 	.word	.LANCHOR189
 	.word	.LANCHOR160
-.L2999:
+.L3088:
 	cmp	r4, r8
 	add	r3, r3, r5
 	ite	eq
-	ldreq	r2, .L3033
-	ldrne	r2, .L3033+4
+	ldreq	r2, .L3122
+	ldrne	r2, .L3122+4
 	ldr	r2, [r2]
 	str	r2, [r3, #8]
 	ldr	r2, [sp, #40]
-	ldr	r3, .L3033+8
+	ldr	r3, .L3122+8
 	adds	r0, r2, #1
-	beq	.L3004
+	beq	.L3093
 	ldr	r3, [r3]
 	movs	r1, #1
 	str	r2, [sp, #48]
@@ -21568,60 +21987,60 @@ FtlWrite:
 	bl	FlashReadPages
 	ldr	r3, [sp, #44]
 	adds	r3, r3, #1
-	bne	.L3005
-	ldr	r2, .L3033+12
+	bne	.L3094
+	ldr	r2, .L3122+12
 	ldr	r3, [r2, #72]
 	adds	r3, r3, #1
 	str	r3, [r2, #72]
-.L3008:
+.L3097:
 	ldr	r2, [sp, #20]
 	cmp	r4, r8
-	ldr	r3, .L3033+8
+	ldr	r3, .L3122+8
 	lsl	r2, r2, #9
-	bne	.L3009
+	bne	.L3098
 	ldr	r3, [r3]
 	mov	r1, r10
 	add	r5, r5, r3
 	ldr	r3, [sp, #24]
 	ldr	r0, [r5, #8]
 	add	r0, r0, r3, lsl #9
-.L3028:
+.L3117:
 	bl	ftl_memcpy
-	b	.L3001
-.L3005:
+	b	.L3090
+.L3094:
 	ldr	r1, [fp, #8]
 	cmp	r4, r1
-	beq	.L3007
-	ldr	r2, .L3033+12
-	ldr	r0, .L3033+16
+	beq	.L3096
+	ldr	r2, .L3122+12
+	ldr	r0, .L3122+16
 	ldr	r3, [r2, #72]
 	adds	r3, r3, #1
 	str	r3, [r2, #72]
 	mov	r2, r4
 	bl	printf
-.L3007:
+.L3096:
 	ldr	r3, [fp, #8]
 	cmp	r4, r3
-	beq	.L3008
+	beq	.L3097
 	movw	r2, #1754
-	ldr	r1, .L3033+20
-	ldr	r0, .L3033+24
+	ldr	r1, .L3122+20
+	ldr	r0, .L3122+24
 	bl	printf
-	ldr	r1, .L3033+28
-	ldr	r0, .L3033+32
+	ldr	r1, .L3122+28
+	ldr	r0, .L3122+32
 	bl	printf
-	b	.L3008
-.L3004:
+	b	.L3097
+.L3093:
 	ldr	r3, [r3]
 	movs	r1, #0
-	ldr	r2, .L3033+36
+	ldr	r2, .L3122+36
 	add	r3, r3, r5
 	ldrh	r2, [r2]
 	ldr	r0, [r3, #8]
 	bl	ftl_memset
-	b	.L3008
-.L3009:
-	ldr	r1, .L3033+40
+	b	.L3097
+.L3098:
+	ldr	r1, .L3122+40
 	ldr	r3, [r3]
 	ldrh	r1, [r1]
 	add	r5, r5, r3
@@ -21629,8 +22048,8 @@ FtlWrite:
 	muls	r1, r4, r1
 	subs	r1, r1, r6
 	add	r1, r10, r1, lsl #9
-	b	.L3028
-.L3026:
+	b	.L3117
+.L3115:
 	ldr	r3, [r3]
 	add	r5, r5, r3
 	ldrh	r3, [r1]
@@ -21638,24 +22057,24 @@ FtlWrite:
 	subs	r3, r3, r6
 	add	r3, r10, r3, lsl #9
 	str	r3, [r5, #8]
-	b	.L3001
-.L3017:
+	b	.L3090
+.L3106:
 	mov	r0, #-1
-	b	.L2983
-.L3034:
+	b	.L3072
+.L3123:
 	.align	2
-.L3033:
+.L3122:
 	.word	.LANCHOR186
 	.word	.LANCHOR187
 	.word	.LANCHOR182
 	.word	.LANCHOR138
-	.word	.LC72
+	.word	.LC73
 	.word	.LANCHOR247
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LANCHOR58
-	.word	.LANCHOR56
+	.word	.LANCHOR57
+	.word	.LANCHOR55
 	.size	FtlWrite, .-FtlWrite
 	.section	.text.ftl_vendor_write,"ax",%progbits
 	.align	1
@@ -21745,11 +22164,11 @@ ftl_write:
 	mov	r4, r2
 	mov	r5, r3
 	mov	r6, r0
-	cbnz	r0, .L3040
+	cbnz	r0, .L3129
 	mov	r3, r2
 	mov	r2, r5
 	bl	idb_write_data
-.L3040:
+.L3129:
 	mov	r3, r5
 	mov	r2, r4
 	mov	r1, r7
@@ -21770,69 +22189,69 @@ FtlCheckVpc:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r6, .L3065
-	ldr	r5, .L3065+4
-	ldr	r1, .L3065+8
-	ldr	r0, .L3065+12
+	ldr	r6, .L3154
+	ldr	r5, .L3154+4
+	ldr	r1, .L3154+8
+	ldr	r0, .L3154+12
 	bl	printf
 	mov	r2, #8192
 	movs	r1, #0
-	ldr	r0, .L3065+4
+	ldr	r0, .L3154+4
 	bl	memset
-.L3042:
+.L3131:
 	ldr	r3, [r6]
 	cmp	r4, r3
-	bcc	.L3044
-	ldr	r7, .L3065+16
+	bcc	.L3133
+	ldr	r7, .L3154+16
 	movs	r4, #0
-	ldr	r5, .L3065+20
+	ldr	r5, .L3154+20
 	movs	r2, #2
-	ldr	r10, .L3065+4
+	ldr	r10, .L3154+4
 	mov	r6, r4
-	ldr	fp, .L3065+60
+	ldr	fp, .L3154+60
 	mov	r8, r7
 	ldrh	r3, [r7]
 	ldr	r1, [r5]
-	ldr	r0, .L3065+24
+	ldr	r0, .L3154+24
 	bl	rknand_print_hex
 	ldrh	r3, [r7]
 	movs	r2, #2
-	ldr	r1, .L3065+4
-	ldr	r0, .L3065+28
+	ldr	r1, .L3154+4
+	ldr	r0, .L3154+28
 	bl	rknand_print_hex
-.L3045:
+.L3134:
 	ldrh	r2, [r8]
 	uxth	r3, r4
 	cmp	r2, r3
-	bhi	.L3047
-	ldr	r3, .L3065+32
+	bhi	.L3136
+	ldr	r3, .L3154+32
 	ldr	r4, [r3]
-	cbz	r4, .L3048
-	ldr	r3, .L3065+36
+	cbz	r4, .L3137
+	ldr	r3, .L3154+36
 	mov	r8, #0
-	ldr	r7, .L3065+40
-	ldr	fp, .L3065+64
+	ldr	r7, .L3154+40
+	ldr	fp, .L3154+64
 	ldrh	r10, [r3]
 	ldr	r3, [r7]
 	subs	r4, r4, r3
-	ldr	r3, .L3065+44
+	ldr	r3, .L3154+44
 	asrs	r4, r4, #1
 	muls	r4, r3, r4
 	uxth	r4, r4
-.L3049:
+.L3138:
 	uxth	r3, r8
 	cmp	r10, r3
-	bls	.L3048
+	bls	.L3137
 	ldr	r3, [r5]
 	ldrh	r2, [r3, r4, lsl #1]
-	cbz	r2, .L3050
-	ldr	r3, .L3065+4
+	cbz	r2, .L3139
+	ldr	r3, .L3154+4
 	movs	r6, #1
 	mov	r1, r4
 	mov	r0, fp
 	ldrh	r3, [r3, r4, lsl #1]
 	bl	printf
-.L3050:
+.L3139:
 	movs	r3, #6
 	ldr	r2, [r7]
 	muls	r4, r3, r4
@@ -21840,43 +22259,43 @@ FtlCheckVpc:
 	add	r8, r8, #1
 	ldrh	r4, [r2, r4]
 	cmp	r4, r3
-	bne	.L3049
-.L3048:
-	cbz	r6, .L3041
-	ldr	r1, .L3065+8
-	movw	r2, #1669
-	ldr	r0, .L3065+48
+	bne	.L3138
+.L3137:
+	cbz	r6, .L3130
+	ldr	r1, .L3154+8
+	movw	r2, #1686
+	ldr	r0, .L3154+48
 	bl	printf
-	ldr	r1, .L3065+52
-	ldr	r0, .L3065+56
+	ldr	r1, .L3154+52
+	ldr	r0, .L3154+56
 	bl	printf
-.L3041:
+.L3130:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3044:
+.L3133:
 	movs	r2, #0
 	add	r1, sp, #4
 	mov	r0, r4
 	bl	log2phys
 	ldr	r0, [sp, #4]
 	adds	r3, r0, #1
-	beq	.L3043
+	beq	.L3132
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r5, r0, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r5, r0, lsl #1]	@ movhi
-.L3043:
+.L3132:
 	adds	r4, r4, #1
-	b	.L3042
-.L3047:
+	b	.L3131
+.L3136:
 	ldr	r3, [r5]
 	uxth	r7, r4
 	ldrh	r2, [r3, r7, lsl #1]
 	ldrh	r3, [r10, r7, lsl #1]
 	cmp	r2, r3
-	beq	.L3046
+	beq	.L3135
 	mov	r1, r7
 	mov	r0, fp
 	bl	printf
@@ -21884,34 +22303,34 @@ FtlCheckVpc:
 	movw	r2, #65535
 	ldrh	r3, [r3, r7, lsl #1]
 	cmp	r3, r2
-	beq	.L3046
+	beq	.L3135
 	ldrh	r2, [r10, r7, lsl #1]
 	cmp	r2, r3
 	it	hi
 	movhi	r6, #1
-.L3046:
+.L3135:
 	adds	r4, r4, #1
-	b	.L3045
-.L3066:
+	b	.L3134
+.L3155:
 	.align	2
-.L3065:
-	.word	.LANCHOR73
+.L3154:
+	.word	.LANCHOR72
 	.word	check_valid_page_count_table
 	.word	.LANCHOR248
 	.word	.LC45
 	.word	.LANCHOR40
-	.word	.LANCHOR84
-	.word	.LC73
+	.word	.LANCHOR83
 	.word	.LC74
+	.word	.LC75
+	.word	.LANCHOR87
 	.word	.LANCHOR88
-	.word	.LANCHOR89
-	.word	.LANCHOR82
+	.word	.LANCHOR81
 	.word	-1431655765
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC75
 	.word	.LC76
+	.word	.LC77
 	.size	FtlCheckVpc, .-FtlCheckVpc
 	.section	.text.FtlDumpSysBlock,"ax",%progbits
 	.align	1
@@ -21926,27 +22345,27 @@ FtlDumpSysBlock:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	lsl	r10, r0, #10
-	ldr	r5, .L3074
+	ldr	r5, .L3163
 	sub	sp, sp, #24
 	mov	r7, r0
 	movs	r6, #0
-	ldr	r4, .L3074+4
+	ldr	r4, .L3163+4
 	ldr	r3, [r5]
-	ldr	r8, .L3074+20
+	ldr	r8, .L3163+20
 	mov	fp, r4
 	str	r3, [r4, #8]
-	ldr	r3, .L3074+8
+	ldr	r3, .L3163+8
 	ldr	r3, [r3]
 	str	r3, [r4, #12]
-.L3068:
+.L3157:
 	ldrh	r2, [r8]
 	sxth	r3, r6
 	cmp	r3, r2
-	blt	.L3070
+	blt	.L3159
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3070:
+.L3159:
 	movs	r2, #1
 	orr	r3, r3, r10
 	mov	r1, r2
@@ -21956,7 +22375,7 @@ FtlDumpSysBlock:
 	ldr	r2, [r4, #8]
 	mov	r1, r7
 	ldr	r3, [r4, #12]
-	ldr	r0, .L3074+12
+	ldr	r0, .L3163+12
 	ldr	r2, [r2]
 	str	r2, [sp, #16]
 	ldr	r2, [r3, #12]
@@ -21972,24 +22391,24 @@ FtlDumpSysBlock:
 	ldr	r3, [r4, #12]
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L3069
+	beq	.L3158
 	mov	r3, #768
 	movs	r2, #4
 	ldr	r1, [r5]
-	ldr	r0, .L3074+16
+	ldr	r0, .L3163+16
 	bl	rknand_print_hex
-.L3069:
+.L3158:
 	adds	r6, r6, #1
-	b	.L3068
-.L3075:
+	b	.L3157
+.L3164:
 	.align	2
-.L3074:
+.L3163:
 	.word	.LANCHOR183
 	.word	.LANCHOR202
 	.word	.LANCHOR188
-	.word	.LC77
 	.word	.LC78
-	.word	.LANCHOR54
+	.word	.LC79
+	.word	.LANCHOR53
 	.size	FtlDumpSysBlock, .-FtlDumpSysBlock
 	.section	.text.dump_map_info,"ax",%progbits
 	.align	1
@@ -22002,32 +22421,32 @@ FtlDumpSysBlock:
 dump_map_info:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L3090
+	ldr	r3, .L3179
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #40
-	ldr	r8, .L3090+72
+	ldr	r8, .L3179+72
 	ldrh	r5, [r3]
-.L3077:
-	ldr	r3, .L3090+4
+.L3166:
+	ldr	r3, .L3179+4
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	bhi	.L3084
-	ldr	r4, .L3090+8
+	bhi	.L3173
+	ldr	r4, .L3179+8
 	movs	r7, #0
-.L3085:
-	ldr	r3, .L3090+12
+.L3174:
+	ldr	r3, .L3179+12
 	sxth	r5, r7
 	ldrh	r3, [r3]
 	cmp	r5, r3
-	bge	.L3088
+	bge	.L3177
 	lsls	r5, r5, #1
 	movs	r6, #0
-	ldr	r8, .L3090+76
-	b	.L3089
-.L3079:
+	ldr	r8, .L3179+76
+	b	.L3178
+.L3168:
 	str	r3, [sp, #36]
 	mov	r1, r5
-	ldr	r3, .L3090+16
+	ldr	r3, .L3179+16
 	str	r2, [sp, #32]
 	ldrb	r0, [r3, r6]	@ zero_extendqisi2
 	bl	V2P_block
@@ -22035,7 +22454,7 @@ dump_map_info:
 	bl	FtlBbmIsBadBlock
 	ldr	r2, [sp, #32]
 	ldr	r3, [sp, #36]
-	cbnz	r0, .L3078
+	cbnz	r0, .L3167
 	ldr	r1, [sp, #28]
 	mla	r0, fp, r4, r7
 	lsls	r1, r1, #10
@@ -22048,29 +22467,29 @@ dump_map_info:
 	ldr	r1, [sp, #24]
 	add	r1, r1, ip
 	str	r1, [r0, #12]
-.L3078:
+.L3167:
 	adds	r6, r6, #1
-.L3086:
+.L3175:
 	uxth	r1, r6
 	cmp	r2, r1
-	bhi	.L3079
-	cbnz	r4, .L3080
-.L3083:
+	bhi	.L3168
+	cbnz	r4, .L3169
+.L3172:
 	adds	r5, r5, #1
 	uxth	r5, r5
-	b	.L3077
-.L3080:
-	ldr	r10, .L3090+80
+	b	.L3166
+.L3169:
+	ldr	r10, .L3179+80
 	mov	r0, r7
 	movs	r6, #0
 	movs	r7, #36
 	movs	r2, #1
 	mov	r1, r4
 	bl	FlashReadPages
-.L3081:
+.L3170:
 	uxth	r3, r6
 	cmp	r4, r3
-	bls	.L3083
+	bls	.L3172
 	ldr	r3, [r8]
 	mla	r3, r7, r6, r3
 	adds	r6, r6, #1
@@ -22091,24 +22510,24 @@ dump_map_info:
 	ldr	r3, [r1]
 	ubfx	r1, r2, #10, #16
 	bl	printf
-	b	.L3081
-.L3084:
-	ldr	r1, .L3090+20
+	b	.L3170
+.L3173:
+	ldr	r1, .L3179+20
 	movs	r6, #0
-	ldr	r3, .L3090+24
+	ldr	r3, .L3179+24
 	mov	r4, r6
 	ldr	r7, [r8]
 	mov	fp, #36
 	ldr	r1, [r1]
 	ldrh	r2, [r3]
-	ldr	r3, .L3090+28
+	ldr	r3, .L3179+28
 	str	r1, [sp, #24]
-	ldr	r1, .L3090+32
+	ldr	r1, .L3179+32
 	ldr	r3, [r3]
 	ldrh	r10, [r1]
-	b	.L3086
-.L3087:
-	ldr	r10, .L3090+44
+	b	.L3175
+.L3176:
+	ldr	r10, .L3179+44
 	mov	r0, r4
 	ldr	r2, [r10]
 	ldrh	r2, [r2, r5]
@@ -22124,7 +22543,7 @@ dump_map_info:
 	ldrh	r1, [r1, r5]
 	str	r0, [sp, #20]
 	ldr	r2, [r2]
-	ldr	r0, .L3090+36
+	ldr	r0, .L3179+36
 	str	r2, [sp, #16]
 	ldr	r2, [r3, #12]
 	str	r2, [sp, #12]
@@ -22136,62 +22555,62 @@ dump_map_info:
 	str	r3, [sp]
 	ldm	r4, {r2, r3}
 	bl	printf
-.L3089:
+.L3178:
 	ldrh	r2, [r8]
 	sxth	r3, r6
 	adds	r6, r6, #1
 	cmp	r3, r2
-	blt	.L3087
+	blt	.L3176
 	adds	r7, r7, #1
-	b	.L3085
-.L3088:
-	ldr	r3, .L3090+40
+	b	.L3174
+.L3177:
+	ldr	r3, .L3179+40
 	movs	r2, #2
-	ldr	r1, .L3090+44
-	ldr	r0, .L3090+48
+	ldr	r1, .L3179+44
+	ldr	r0, .L3179+48
 	ldr	r3, [r3]
 	ldr	r1, [r1]
 	bl	rknand_print_hex
-	ldr	r4, .L3090+52
+	ldr	r4, .L3179+52
 	movs	r2, #4
-	ldr	r1, .L3090+56
-	ldr	r0, .L3090+60
+	ldr	r1, .L3179+56
+	ldr	r0, .L3179+60
 	ldrh	r3, [r4]
 	ldr	r1, [r1]
 	bl	rknand_print_hex
-	ldr	r1, .L3090+64
+	ldr	r1, .L3179+64
 	movs	r2, #4
 	ldrh	r3, [r4]
-	ldr	r0, .L3090+68
+	ldr	r0, .L3179+68
 	ldr	r1, [r1]
 	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
 	b	rknand_print_hex
-.L3091:
+.L3180:
 	.align	2
-.L3090:
+.L3179:
 	.word	.LANCHOR40
 	.word	.LANCHOR41
 	.word	.LANCHOR202
 	.word	.LANCHOR128
 	.word	.LANCHOR47
-	.word	.LANCHOR106
-	.word	.LANCHOR38
 	.word	.LANCHOR105
-	.word	.LANCHOR59
+	.word	.LANCHOR38
+	.word	.LANCHOR104
+	.word	.LANCHOR58
 	.word	.LC48
-	.word	.LANCHOR65
+	.word	.LANCHOR64
 	.word	.LANCHOR129
-	.word	.LC80
-	.word	.LANCHOR67
-	.word	.LANCHOR131
 	.word	.LC81
-	.word	.LANCHOR195
+	.word	.LANCHOR66
+	.word	.LANCHOR131
 	.word	.LC82
+	.word	.LANCHOR195
+	.word	.LC83
 	.word	.LANCHOR180
-	.word	.LANCHOR54
-	.word	.LC79
+	.word	.LANCHOR53
+	.word	.LC80
 	.size	dump_map_info, .-dump_map_info
 	.global	FtlMallocOffset
 	.global	FtlMallocBuffer
@@ -22357,7 +22776,6 @@ dump_map_info:
 	.global	c_ftl_nand_ext_blk_pre_plane
 	.global	c_ftl_nand_blk_pre_plane
 	.global	c_ftl_nand_planes_num
-	.global	c_ftl_nand_blks_per_die_shift
 	.global	c_ftl_nand_blks_per_die
 	.global	c_ftl_nand_planes_per_die
 	.global	c_ftl_nand_die_num
@@ -22374,6 +22792,7 @@ dump_map_info:
 	.global	gNandcVer
 	.global	gNandChipMap
 	.global	gNandIDataBuf
+	.global	idb_flash_slc_mode
 	.global	FlashDdrTunningReadCount
 	.global	FlashWaitBusyScheduleEn
 	.global	gNandPhyInfo
@@ -22420,7 +22839,7 @@ dump_map_info:
 	.global	read_retry_cur_offset
 	.section	.bss.DeviceCapacity,"aw",%nobits
 	.align	2
-	.set	.LANCHOR61,. + 0
+	.set	.LANCHOR60,. + 0
 	.type	DeviceCapacity, %object
 	.size	DeviceCapacity, 4
 DeviceCapacity:
@@ -22460,7 +22879,7 @@ FtlMallocBuffer:
 	.space	1310720
 	.section	.bss.FtlUpdateVaildLpnCount,"aw",%nobits
 	.align	1
-	.set	.LANCHOR100,. + 0
+	.set	.LANCHOR99,. + 0
 	.type	FtlUpdateVaildLpnCount, %object
 	.size	FtlUpdateVaildLpnCount, 2
 FtlUpdateVaildLpnCount:
@@ -22492,24 +22911,17 @@ c_ftl_nand_blk_pre_plane:
 	.type	c_ftl_nand_blks_per_die, %object
 	.size	c_ftl_nand_blks_per_die, 2
 c_ftl_nand_blks_per_die:
-	.space	2
-	.section	.bss.c_ftl_nand_blks_per_die_shift,"aw",%nobits
-	.align	1
-	.set	.LANCHOR52,. + 0
-	.type	c_ftl_nand_blks_per_die_shift, %object
-	.size	c_ftl_nand_blks_per_die_shift, 2
-c_ftl_nand_blks_per_die_shift:
 	.space	2
 	.section	.bss.c_ftl_nand_byte_pre_oob,"aw",%nobits
 	.align	1
-	.set	.LANCHOR59,. + 0
+	.set	.LANCHOR58,. + 0
 	.type	c_ftl_nand_byte_pre_oob, %object
 	.size	c_ftl_nand_byte_pre_oob, 2
 c_ftl_nand_byte_pre_oob:
 	.space	2
 	.section	.bss.c_ftl_nand_byte_pre_page,"aw",%nobits
 	.align	1
-	.set	.LANCHOR58,. + 0
+	.set	.LANCHOR57,. + 0
 	.type	c_ftl_nand_byte_pre_page, %object
 	.size	c_ftl_nand_byte_pre_page, 2
 c_ftl_nand_byte_pre_page:
@@ -22544,28 +22956,28 @@ c_ftl_nand_ext_blk_pre_plane:
 	.space	2
 	.section	.bss.c_ftl_nand_init_sys_blks_per_plane,"aw",%nobits
 	.align	2
-	.set	.LANCHOR66,. + 0
+	.set	.LANCHOR65,. + 0
 	.type	c_ftl_nand_init_sys_blks_per_plane, %object
 	.size	c_ftl_nand_init_sys_blks_per_plane, 4
 c_ftl_nand_init_sys_blks_per_plane:
 	.space	4
 	.section	.bss.c_ftl_nand_l2pmap_ram_region_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR68,. + 0
+	.set	.LANCHOR67,. + 0
 	.type	c_ftl_nand_l2pmap_ram_region_num, %object
 	.size	c_ftl_nand_l2pmap_ram_region_num, 2
 c_ftl_nand_l2pmap_ram_region_num:
 	.space	2
 	.section	.bss.c_ftl_nand_map_blks_per_plane,"aw",%nobits
 	.align	1
-	.set	.LANCHOR64,. + 0
+	.set	.LANCHOR63,. + 0
 	.type	c_ftl_nand_map_blks_per_plane, %object
 	.size	c_ftl_nand_map_blks_per_plane, 2
 c_ftl_nand_map_blks_per_plane:
 	.space	2
 	.section	.bss.c_ftl_nand_map_region_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR67,. + 0
+	.set	.LANCHOR66,. + 0
 	.type	c_ftl_nand_map_region_num, %object
 	.size	c_ftl_nand_map_region_num, 2
 c_ftl_nand_map_region_num:
@@ -22579,7 +22991,7 @@ c_ftl_nand_max_data_blks:
 	.space	4
 	.section	.bss.c_ftl_nand_max_map_blks,"aw",%nobits
 	.align	2
-	.set	.LANCHOR65,. + 0
+	.set	.LANCHOR64,. + 0
 	.type	c_ftl_nand_max_map_blks, %object
 	.size	c_ftl_nand_max_map_blks, 4
 c_ftl_nand_max_map_blks:
@@ -22593,28 +23005,28 @@ c_ftl_nand_max_sys_blks:
 	.space	4
 	.section	.bss.c_ftl_nand_max_vendor_blks,"aw",%nobits
 	.align	1
-	.set	.LANCHOR62,. + 0
+	.set	.LANCHOR61,. + 0
 	.type	c_ftl_nand_max_vendor_blks, %object
 	.size	c_ftl_nand_max_vendor_blks, 2
 c_ftl_nand_max_vendor_blks:
 	.space	2
 	.section	.bss.c_ftl_nand_page_pre_blk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR53,. + 0
+	.set	.LANCHOR52,. + 0
 	.type	c_ftl_nand_page_pre_blk, %object
 	.size	c_ftl_nand_page_pre_blk, 2
 c_ftl_nand_page_pre_blk:
 	.space	2
 	.section	.bss.c_ftl_nand_page_pre_slc_blk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR54,. + 0
+	.set	.LANCHOR53,. + 0
 	.type	c_ftl_nand_page_pre_slc_blk, %object
 	.size	c_ftl_nand_page_pre_slc_blk, 2
 c_ftl_nand_page_pre_slc_blk:
 	.space	2
 	.section	.bss.c_ftl_nand_page_pre_super_blk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR55,. + 0
+	.set	.LANCHOR54,. + 0
 	.type	c_ftl_nand_page_pre_super_blk, %object
 	.size	c_ftl_nand_page_pre_super_blk, 2
 c_ftl_nand_page_pre_super_blk:
@@ -22635,21 +23047,21 @@ c_ftl_nand_planes_per_die:
 	.space	2
 	.section	.bss.c_ftl_nand_reserved_blks,"aw",%nobits
 	.align	1
-	.set	.LANCHOR60,. + 0
+	.set	.LANCHOR59,. + 0
 	.type	c_ftl_nand_reserved_blks, %object
 	.size	c_ftl_nand_reserved_blks, 2
 c_ftl_nand_reserved_blks:
 	.space	2
 	.section	.bss.c_ftl_nand_sec_pre_page,"aw",%nobits
 	.align	1
-	.set	.LANCHOR56,. + 0
+	.set	.LANCHOR55,. + 0
 	.type	c_ftl_nand_sec_pre_page, %object
 	.size	c_ftl_nand_sec_pre_page, 2
 c_ftl_nand_sec_pre_page:
 	.space	2
 	.section	.bss.c_ftl_nand_sec_pre_page_shift,"aw",%nobits
 	.align	1
-	.set	.LANCHOR57,. + 0
+	.set	.LANCHOR56,. + 0
 	.type	c_ftl_nand_sec_pre_page_shift, %object
 	.size	c_ftl_nand_sec_pre_page_shift, 2
 c_ftl_nand_sec_pre_page_shift:
@@ -22677,7 +23089,7 @@ c_ftl_nand_type:
 	.space	2
 	.section	.bss.c_ftl_nand_vendor_region_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR63,. + 0
+	.set	.LANCHOR62,. + 0
 	.type	c_ftl_nand_vendor_region_num, %object
 	.size	c_ftl_nand_vendor_region_num, 2
 c_ftl_nand_vendor_region_num:
@@ -22691,7 +23103,7 @@ c_ftl_vendor_part_size:
 	.space	2
 	.section	.bss.c_gc_page_buf_num,"aw",%nobits
 	.align	2
-	.set	.LANCHOR108,. + 0
+	.set	.LANCHOR107,. + 0
 	.type	c_gc_page_buf_num, %object
 	.size	c_gc_page_buf_num, 4
 c_gc_page_buf_num:
@@ -22718,7 +23130,7 @@ ftl_gc_temp_power_lost_recovery_flag:
 	.space	4
 	.section	.bss.gBbtInfo,"aw",%nobits
 	.align	2
-	.set	.LANCHOR75,. + 0
+	.set	.LANCHOR74,. + 0
 	.type	gBbtInfo, %object
 	.size	gBbtInfo, 60
 gBbtInfo:
@@ -22789,7 +23201,7 @@ gFlashProgCheckSpareBuffer:
 gFlashSdrModeEn:
 	.space	1
 	.section	.bss.gFlashSlcMode,"aw",%nobits
-	.set	.LANCHOR8,. + 0
+	.set	.LANCHOR15,. + 0
 	.type	gFlashSlcMode, %object
 	.size	gFlashSlcMode, 1
 gFlashSlcMode:
@@ -22923,7 +23335,7 @@ gNandOptPara:
 	.space	32
 	.section	.bss.gNandPhyInfo,"aw",%nobits
 	.align	2
-	.set	.LANCHOR15,. + 0
+	.set	.LANCHOR14,. + 0
 	.type	gNandPhyInfo, %object
 	.size	gNandPhyInfo, 28
 gNandPhyInfo:
@@ -22963,7 +23375,7 @@ gReadRetryInfo:
 	.space	852
 	.section	.bss.gSysFreeQueue,"aw",%nobits
 	.align	1
-	.set	.LANCHOR76,. + 0
+	.set	.LANCHOR75,. + 0
 	.type	gSysFreeQueue, %object
 	.size	gSysFreeQueue, 2056
 gSysFreeQueue:
@@ -22972,9 +23384,9 @@ gSysFreeQueue:
 	.align	2
 	.set	.LANCHOR209,. + 0
 	.type	gSysInfo, %object
-	.size	gSysInfo, 12
+	.size	gSysInfo, 16
 gSysInfo:
-	.space	12
+	.space	16
 	.section	.bss.gToggleModeClkDiv,"aw",%nobits
 	.align	2
 	.type	gToggleModeClkDiv, %object
@@ -23018,7 +23430,7 @@ g_LowFormat:
 	.space	4
 	.section	.bss.g_MaxLbaSector,"aw",%nobits
 	.align	2
-	.set	.LANCHOR69,. + 0
+	.set	.LANCHOR68,. + 0
 	.type	g_MaxLbaSector, %object
 	.size	g_MaxLbaSector, 4
 g_MaxLbaSector:
@@ -23032,7 +23444,7 @@ g_MaxLbn:
 	.space	4
 	.section	.bss.g_MaxLpn,"aw",%nobits
 	.align	2
-	.set	.LANCHOR73,. + 0
+	.set	.LANCHOR72,. + 0
 	.type	g_MaxLpn, %object
 	.size	g_MaxLpn, 4
 g_MaxLpn:
@@ -23046,14 +23458,14 @@ g_SlcPartLbaEndSector:
 	.space	4
 	.section	.bss.g_VaildLpn,"aw",%nobits
 	.align	2
-	.set	.LANCHOR101,. + 0
+	.set	.LANCHOR100,. + 0
 	.type	g_VaildLpn, %object
 	.size	g_VaildLpn, 4
 g_VaildLpn:
 	.space	4
 	.section	.bss.g_active_superblock,"aw",%nobits
 	.align	2
-	.set	.LANCHOR92,. + 0
+	.set	.LANCHOR91,. + 0
 	.type	g_active_superblock, %object
 	.size	g_active_superblock, 48
 g_active_superblock:
@@ -23067,14 +23479,14 @@ g_all_blk_used_slc_mode:
 	.space	4
 	.section	.bss.g_buffer_superblock,"aw",%nobits
 	.align	2
-	.set	.LANCHOR93,. + 0
+	.set	.LANCHOR92,. + 0
 	.type	g_buffer_superblock, %object
 	.size	g_buffer_superblock, 48
 g_buffer_superblock:
 	.space	48
 	.section	.bss.g_cur_erase_blk,"aw",%nobits
 	.align	2
-	.set	.LANCHOR74,. + 0
+	.set	.LANCHOR73,. + 0
 	.type	g_cur_erase_blk, %object
 	.size	g_cur_erase_blk, 4
 g_cur_erase_blk:
@@ -23095,7 +23507,7 @@ g_ect_tbl_power_up_flush:
 	.space	2
 	.section	.bss.g_flash_read_only_en,"aw",%nobits
 	.align	2
-	.set	.LANCHOR77,. + 0
+	.set	.LANCHOR76,. + 0
 	.type	g_flash_read_only_en, %object
 	.size	g_flash_read_only_en, 4
 g_flash_read_only_en:
@@ -23116,21 +23528,21 @@ g_ftl_nand_free_count:
 	.space	4
 	.section	.bss.g_gc_bad_block_gc_index,"aw",%nobits
 	.align	1
-	.set	.LANCHOR119,. + 0
+	.set	.LANCHOR118,. + 0
 	.type	g_gc_bad_block_gc_index, %object
 	.size	g_gc_bad_block_gc_index, 2
 g_gc_bad_block_gc_index:
 	.space	2
 	.section	.bss.g_gc_bad_block_temp_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR117,. + 0
+	.set	.LANCHOR116,. + 0
 	.type	g_gc_bad_block_temp_num, %object
 	.size	g_gc_bad_block_temp_num, 2
 g_gc_bad_block_temp_num:
 	.space	2
 	.section	.bss.g_gc_bad_block_temp_tbl,"aw",%nobits
 	.align	1
-	.set	.LANCHOR118,. + 0
+	.set	.LANCHOR117,. + 0
 	.type	g_gc_bad_block_temp_tbl, %object
 	.size	g_gc_bad_block_temp_tbl, 34
 g_gc_bad_block_temp_tbl:
@@ -23144,7 +23556,7 @@ g_gc_blk_index:
 	.space	2
 	.section	.bss.g_gc_blk_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR110,. + 0
+	.set	.LANCHOR109,. + 0
 	.type	g_gc_blk_num, %object
 	.size	g_gc_blk_num, 2
 g_gc_blk_num:
@@ -23193,42 +23605,42 @@ g_gc_merge_free_blk_threshold:
 	.space	2
 	.section	.bss.g_gc_next_blk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR113,. + 0
+	.set	.LANCHOR112,. + 0
 	.type	g_gc_next_blk, %object
 	.size	g_gc_next_blk, 2
 g_gc_next_blk:
 	.space	2
 	.section	.bss.g_gc_next_blk_1,"aw",%nobits
 	.align	1
-	.set	.LANCHOR114,. + 0
+	.set	.LANCHOR113,. + 0
 	.type	g_gc_next_blk_1, %object
 	.size	g_gc_next_blk_1, 2
 g_gc_next_blk_1:
 	.space	2
 	.section	.bss.g_gc_next_blk_2,"aw",%nobits
 	.align	1
-	.set	.LANCHOR115,. + 0
+	.set	.LANCHOR114,. + 0
 	.type	g_gc_next_blk_2, %object
 	.size	g_gc_next_blk_2, 2
 g_gc_next_blk_2:
 	.space	2
 	.section	.bss.g_gc_next_blk_3,"aw",%nobits
 	.align	1
-	.set	.LANCHOR116,. + 0
+	.set	.LANCHOR115,. + 0
 	.type	g_gc_next_blk_3, %object
 	.size	g_gc_next_blk_3, 2
 g_gc_next_blk_3:
 	.space	2
 	.section	.bss.g_gc_num_req,"aw",%nobits
 	.align	2
-	.set	.LANCHOR103,. + 0
+	.set	.LANCHOR102,. + 0
 	.type	g_gc_num_req, %object
 	.size	g_gc_num_req, 4
 g_gc_num_req:
 	.space	4
 	.section	.bss.g_gc_page_offset,"aw",%nobits
 	.align	1
-	.set	.LANCHOR111,. + 0
+	.set	.LANCHOR110,. + 0
 	.type	g_gc_page_offset, %object
 	.size	g_gc_page_offset, 2
 g_gc_page_offset:
@@ -23262,7 +23674,7 @@ g_gc_superblock:
 	.space	48
 	.section	.bss.g_gc_temp_superblock,"aw",%nobits
 	.align	2
-	.set	.LANCHOR94,. + 0
+	.set	.LANCHOR93,. + 0
 	.type	g_gc_temp_superblock, %object
 	.size	g_gc_temp_superblock, 48
 g_gc_temp_superblock:
@@ -23290,13 +23702,13 @@ g_inkDie_check_enable:
 	.space	4
 	.section	.bss.g_l2p_last_update_region_id,"aw",%nobits
 	.align	1
-	.set	.LANCHOR98,. + 0
+	.set	.LANCHOR97,. + 0
 	.type	g_l2p_last_update_region_id, %object
 	.size	g_l2p_last_update_region_id, 2
 g_l2p_last_update_region_id:
 	.space	2
 	.section	.bss.g_maxRegNum,"aw",%nobits
-	.set	.LANCHOR13,. + 0
+	.set	.LANCHOR12,. + 0
 	.type	g_maxRegNum, %object
 	.size	g_maxRegNum, 1
 g_maxRegNum:
@@ -23323,42 +23735,42 @@ g_min_erase_count:
 	.space	4
 	.section	.bss.g_nandc_version_data,"aw",%nobits
 	.align	2
-	.set	.LANCHOR29,. + 0
+	.set	.LANCHOR119,. + 0
 	.type	g_nandc_version_data, %object
 	.size	g_nandc_version_data, 4
 g_nandc_version_data:
 	.space	4
 	.section	.bss.g_num_data_superblocks,"aw",%nobits
 	.align	1
-	.set	.LANCHOR86,. + 0
+	.set	.LANCHOR85,. + 0
 	.type	g_num_data_superblocks, %object
 	.size	g_num_data_superblocks, 2
 g_num_data_superblocks:
 	.space	2
 	.section	.bss.g_num_free_superblocks,"aw",%nobits
 	.align	1
-	.set	.LANCHOR89,. + 0
+	.set	.LANCHOR88,. + 0
 	.type	g_num_free_superblocks, %object
 	.size	g_num_free_superblocks, 2
 g_num_free_superblocks:
 	.space	2
 	.section	.bss.g_page_map_check_enable,"aw",%nobits
 	.align	1
-	.set	.LANCHOR70,. + 0
+	.set	.LANCHOR69,. + 0
 	.type	g_page_map_check_enable, %object
 	.size	g_page_map_check_enable, 2
 g_page_map_check_enable:
 	.space	2
 	.section	.bss.g_power_lost_ecc_error_blk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR235,. + 0
+	.set	.LANCHOR234,. + 0
 	.type	g_power_lost_ecc_error_blk, %object
 	.size	g_power_lost_ecc_error_blk, 2
 g_power_lost_ecc_error_blk:
 	.space	2
 	.section	.bss.g_power_lost_recovery_flag,"aw",%nobits
 	.align	1
-	.set	.LANCHOR236,. + 0
+	.set	.LANCHOR235,. + 0
 	.type	g_power_lost_recovery_flag, %object
 	.size	g_power_lost_recovery_flag, 2
 g_power_lost_recovery_flag:
@@ -23372,14 +23784,14 @@ g_recovery_page_min_ver:
 	.space	4
 	.section	.bss.g_recovery_page_num,"aw",%nobits
 	.align	2
-	.set	.LANCHOR237,. + 0
+	.set	.LANCHOR236,. + 0
 	.type	g_recovery_page_num, %object
 	.size	g_recovery_page_num, 4
 g_recovery_page_num:
 	.space	4
 	.section	.bss.g_recovery_ppa_tbl,"aw",%nobits
 	.align	2
-	.set	.LANCHOR238,. + 0
+	.set	.LANCHOR237,. + 0
 	.type	g_recovery_ppa_tbl, %object
 	.size	g_recovery_ppa_tbl, 128
 g_recovery_ppa_tbl:
@@ -23392,7 +23804,7 @@ g_recovery_ppa_tbl:
 g_req_cache:
 	.space	4
 	.section	.bss.g_retryMode,"aw",%nobits
-	.set	.LANCHOR10,. + 0
+	.set	.LANCHOR9,. + 0
 	.type	g_retryMode, %object
 	.size	g_retryMode, 1
 g_retryMode:
@@ -23412,7 +23824,7 @@ g_sys_ext_data:
 	.space	512
 	.section	.bss.g_sys_save_data,"aw",%nobits
 	.align	2
-	.set	.LANCHOR81,. + 0
+	.set	.LANCHOR80,. + 0
 	.type	g_sys_save_data, %object
 	.size	g_sys_save_data, 48
 g_sys_save_data:
@@ -23503,14 +23915,14 @@ g_totle_swl_count:
 	.space	4
 	.section	.bss.g_totle_sys_slc_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR80,. + 0
+	.set	.LANCHOR79,. + 0
 	.type	g_totle_sys_slc_erase_count, %object
 	.size	g_totle_sys_slc_erase_count, 4
 g_totle_sys_slc_erase_count:
 	.space	4
 	.section	.bss.g_totle_vendor_block,"aw",%nobits
 	.align	1
-	.set	.LANCHOR71,. + 0
+	.set	.LANCHOR70,. + 0
 	.type	g_totle_vendor_block, %object
 	.size	g_totle_vendor_block, 2
 g_totle_vendor_block:
@@ -23531,7 +23943,7 @@ g_totle_write_sector:
 	.space	4
 	.section	.bss.gc_discard_updated,"aw",%nobits
 	.align	2
-	.set	.LANCHOR232,. + 0
+	.set	.LANCHOR231,. + 0
 	.type	gc_discard_updated, %object
 	.size	gc_discard_updated, 4
 gc_discard_updated:
@@ -23592,14 +24004,14 @@ gp_flash_check_buf:
 	.space	262144
 	.section	.bss.gp_gc_page_buf_info,"aw",%nobits
 	.align	2
-	.set	.LANCHOR104,. + 0
+	.set	.LANCHOR103,. + 0
 	.type	gp_gc_page_buf_info, %object
 	.size	gp_gc_page_buf_info, 4
 gp_gc_page_buf_info:
 	.space	4
 	.section	.bss.gp_last_act_superblock,"aw",%nobits
 	.align	2
-	.set	.LANCHOR230,. + 0
+	.set	.LANCHOR229,. + 0
 	.type	gp_last_act_superblock, %object
 	.size	gp_last_act_superblock, 4
 gp_last_act_superblock:
@@ -23610,6 +24022,13 @@ gp_last_act_superblock:
 	.size	idb_buf, 262144
 idb_buf:
 	.space	262144
+	.section	.bss.idb_flash_slc_mode,"aw",%nobits
+	.align	2
+	.set	.LANCHOR29,. + 0
+	.type	idb_flash_slc_mode, %object
+	.size	idb_flash_slc_mode, 4
+idb_flash_slc_mode:
+	.space	4
 	.section	.bss.idb_need_write_back,"aw",%nobits
 	.align	2
 	.set	.LANCHOR154,. + 0
@@ -23633,63 +24052,63 @@ p_blk_mode_table:
 	.space	4
 	.section	.bss.p_data_block_list_head,"aw",%nobits
 	.align	2
-	.set	.LANCHOR83,. + 0
+	.set	.LANCHOR82,. + 0
 	.type	p_data_block_list_head, %object
 	.size	p_data_block_list_head, 4
 p_data_block_list_head:
 	.space	4
 	.section	.bss.p_data_block_list_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR82,. + 0
+	.set	.LANCHOR81,. + 0
 	.type	p_data_block_list_table, %object
 	.size	p_data_block_list_table, 4
 p_data_block_list_table:
 	.space	4
 	.section	.bss.p_data_block_list_tail,"aw",%nobits
 	.align	2
-	.set	.LANCHOR85,. + 0
+	.set	.LANCHOR84,. + 0
 	.type	p_data_block_list_tail, %object
 	.size	p_data_block_list_tail, 4
 p_data_block_list_tail:
 	.space	4
 	.section	.bss.p_erase_count_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR79,. + 0
+	.set	.LANCHOR78,. + 0
 	.type	p_erase_count_table, %object
 	.size	p_erase_count_table, 4
 p_erase_count_table:
 	.space	4
 	.section	.bss.p_free_data_block_list_head,"aw",%nobits
 	.align	2
-	.set	.LANCHOR88,. + 0
+	.set	.LANCHOR87,. + 0
 	.type	p_free_data_block_list_head, %object
 	.size	p_free_data_block_list_head, 4
 p_free_data_block_list_head:
 	.space	4
 	.section	.bss.p_gc_blk_tbl,"aw",%nobits
 	.align	2
-	.set	.LANCHOR109,. + 0
+	.set	.LANCHOR108,. + 0
 	.type	p_gc_blk_tbl, %object
 	.size	p_gc_blk_tbl, 4
 p_gc_blk_tbl:
 	.space	4
 	.section	.bss.p_gc_data_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR105,. + 0
+	.set	.LANCHOR104,. + 0
 	.type	p_gc_data_buf, %object
 	.size	p_gc_data_buf, 4
 p_gc_data_buf:
 	.space	4
 	.section	.bss.p_gc_page_info,"aw",%nobits
 	.align	2
-	.set	.LANCHOR112,. + 0
+	.set	.LANCHOR111,. + 0
 	.type	p_gc_page_info, %object
 	.size	p_gc_page_info, 4
 p_gc_page_info:
 	.space	4
 	.section	.bss.p_gc_spare_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR106,. + 0
+	.set	.LANCHOR105,. + 0
 	.type	p_gc_spare_buf, %object
 	.size	p_gc_spare_buf, 4
 p_gc_spare_buf:
@@ -23724,7 +24143,7 @@ p_l2p_map_buf:
 	.space	4
 	.section	.bss.p_l2p_ram_map,"aw",%nobits
 	.align	2
-	.set	.LANCHOR97,. + 0
+	.set	.LANCHOR96,. + 0
 	.type	p_l2p_ram_map, %object
 	.size	p_l2p_ram_map, 4
 p_l2p_ram_map:
@@ -23806,14 +24225,14 @@ p_valid_page_count_check_table:
 	.space	4
 	.section	.bss.p_valid_page_count_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR84,. + 0
+	.set	.LANCHOR83,. + 0
 	.type	p_valid_page_count_table, %object
 	.size	p_valid_page_count_table, 4
 p_valid_page_count_table:
 	.space	4
 	.section	.bss.p_vendor_block_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR72,. + 0
+	.set	.LANCHOR71,. + 0
 	.type	p_vendor_block_table, %object
 	.size	p_vendor_block_table, 4
 p_vendor_block_table:
@@ -23854,14 +24273,14 @@ read_retry_cur_offset:
 	.space	4
 	.section	.bss.req_erase,"aw",%nobits
 	.align	2
-	.set	.LANCHOR78,. + 0
+	.set	.LANCHOR77,. + 0
 	.type	req_erase, %object
 	.size	req_erase, 4
 req_erase:
 	.space	4
 	.section	.bss.req_gc,"aw",%nobits
 	.align	2
-	.set	.LANCHOR107,. + 0
+	.set	.LANCHOR106,. + 0
 	.type	req_gc, %object
 	.size	req_gc, 4
 req_gc:
@@ -23917,7 +24336,7 @@ LastWritenPbaAddr:
 	.align	1
 	.set	.LANCHOR142,. + 0
 	.type	NandFlashParaTbl, %object
-	.size	NandFlashParaTbl, 2464
+	.size	NandFlashParaTbl, 2592
 NandFlashParaTbl:
 	.byte	6
 	.byte	44
@@ -24494,6 +24913,58 @@ NandFlashParaTbl:
 	.byte	5
 	.byte	44
 	.byte	-124
+	.byte	68
+	.byte	50
+	.byte	-86
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	32
+	.short	512
+	.byte	2
+	.byte	1
+	.short	2184
+	.short	1479
+	.byte	5
+	.byte	19
+	.byte	60
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	4
+	.byte	0
+	.byte	1
+	.byte	0
+	.space	4
+	.byte	5
+	.byte	44
+	.byte	-124
+	.byte	68
+	.byte	52
+	.byte	-86
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	32
+	.short	512
+	.byte	2
+	.byte	1
+	.short	2184
+	.short	1479
+	.byte	5
+	.byte	19
+	.byte	60
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	4
+	.byte	0
+	.byte	1
+	.byte	0
+	.space	4
+	.byte	5
+	.byte	44
+	.byte	-124
 	.byte	-60
 	.byte	52
 	.byte	-86
@@ -24543,6 +25014,32 @@ NandFlashParaTbl:
 	.byte	1
 	.byte	0
 	.space	4
+	.byte	5
+	.byte	44
+	.byte	-124
+	.byte	100
+	.byte	60
+	.byte	-87
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	32
+	.short	512
+	.byte	2
+	.byte	2
+	.short	1024
+	.short	479
+	.byte	3
+	.byte	17
+	.byte	40
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
 	.byte	6
 	.byte	-83
 	.byte	-34
@@ -24882,6 +25379,32 @@ NandFlashParaTbl:
 	.byte	0
 	.space	4
 	.byte	6
+	.byte	-83
+	.byte	58
+	.byte	20
+	.byte	3
+	.byte	8
+	.byte	80
+	.byte	2
+	.byte	1
+	.byte	32
+	.short	388
+	.byte	2
+	.byte	2
+	.short	1362
+	.short	473
+	.byte	9
+	.byte	8
+	.byte	40
+	.byte	32
+	.byte	3
+	.byte	1
+	.byte	3
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	6
 	.byte	-119
 	.byte	100
 	.byte	68
@@ -25078,7 +25601,7 @@ NandFlashParaTbl:
 	.byte	1
 	.short	1024
 	.short	455
-	.byte	3
+	.byte	4
 	.byte	17
 	.byte	40
 	.byte	32
@@ -26003,7 +26526,7 @@ NandOptPara:
 	.byte	0
 	.space	14
 	.section	.data.SamsungRefValue,"aw",%progbits
-	.set	.LANCHOR14,. + 0
+	.set	.LANCHOR13,. + 0
 	.type	SamsungRefValue, %object
 	.size	SamsungRefValue, 64
 SamsungRefValue:
@@ -26072,7 +26595,7 @@ SamsungRefValue:
 	.byte	2
 	.byte	0
 	.section	.data.Toshiba15RefValue,"aw",%progbits
-	.set	.LANCHOR11,. + 0
+	.set	.LANCHOR10,. + 0
 	.type	Toshiba15RefValue, %object
 	.size	Toshiba15RefValue, 95
 Toshiba15RefValue:
@@ -26172,7 +26695,7 @@ Toshiba15RefValue:
 	.byte	114
 	.byte	0
 	.section	.data.ToshibaA19RefValue,"aw",%progbits
-	.set	.LANCHOR9,. + 0
+	.set	.LANCHOR8,. + 0
 	.type	ToshibaA19RefValue, %object
 	.size	ToshibaA19RefValue, 45
 ToshibaA19RefValue:
@@ -26222,7 +26745,7 @@ ToshibaA19RefValue:
 	.byte	124
 	.byte	0
 	.section	.data.ToshibaRefValue,"aw",%progbits
-	.set	.LANCHOR12,. + 0
+	.set	.LANCHOR11,. + 0
 	.type	ToshibaRefValue, %object
 	.size	ToshibaRefValue, 8
 ToshibaRefValue:
@@ -26236,14 +26759,14 @@ ToshibaRefValue:
 	.byte	112
 	.section	.data.ftl_gc_temp_block_bops_scan_page_addr,"aw",%progbits
 	.align	1
-	.set	.LANCHOR226,. + 0
+	.set	.LANCHOR238,. + 0
 	.type	ftl_gc_temp_block_bops_scan_page_addr, %object
 	.size	ftl_gc_temp_block_bops_scan_page_addr, 2
 ftl_gc_temp_block_bops_scan_page_addr:
 	.short	-1
 	.section	.data.gFtlInitStatus,"aw",%progbits
 	.align	2
-	.set	.LANCHOR231,. + 0
+	.set	.LANCHOR230,. + 0
 	.type	gFtlInitStatus, %object
 	.size	gFtlInitStatus, 4
 gFtlInitStatus:
@@ -26506,7 +27029,7 @@ refValueDefault:
 .LC32:
 	.ascii	"prog read d error: = %x %x %x\012\000"
 	.section	.rodata.FlashReadFacBbtData.str1.1,"aMS",%progbits,1
-.LC53:
+.LC52:
 	.ascii	"BBT:\000"
 	.section	.rodata.FlashReadIdbDataRaw.str1.1,"aMS",%progbits,1
 .LC14:
@@ -26536,13 +27059,13 @@ refValueDefault:
 .LC35:
 	.ascii	"FtlBbmTblFlush error = %x error count = %d\012\000"
 	.section	.rodata.FtlCheckVpc.str1.1,"aMS",%progbits,1
-.LC73:
-	.ascii	"vpc1\000"
 .LC74:
-	.ascii	"vpc2\000"
+	.ascii	"vpc1\000"
 .LC75:
-	.ascii	"FtlCheckVpc2 %x = %x  %x\012\000"
+	.ascii	"vpc2\000"
 .LC76:
+	.ascii	"FtlCheckVpc2 %x = %x  %x\012\000"
+.LC77:
 	.ascii	"free blk vpc error %x = %x  %x\012\000"
 	.section	.rodata.FtlDumpBlockInfo.str1.1,"aMS",%progbits,1
 .LC45:
@@ -26555,10 +27078,10 @@ refValueDefault:
 	.ascii	"id = %x,%x addr= %x,spare= %x %x %x %x data=%x %x\012"
 	.ascii	"\000"
 	.section	.rodata.FtlDumpSysBlock.str1.1,"aMS",%progbits,1
-.LC77:
+.LC78:
 	.ascii	"id = %x,%x addr= %x,spare= %x %x %x %x data = %x\012"
 	.ascii	"\000"
-.LC78:
+.LC79:
 	.ascii	":\000"
 	.section	.rodata.FtlFreeSysBlkQueueOut.str1.1,"aMS",%progbits,1
 .LC3:
@@ -26567,18 +27090,20 @@ refValueDefault:
 	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\012"
 	.ascii	"\000"
 	.section	.rodata.FtlGcFreeTempBlock.str1.1,"aMS",%progbits,1
-.LC64:
+.LC65:
 	.ascii	"GC des block %x done\012\000"
 	.section	.rodata.FtlGcScanTempBlk.str1.1,"aMS",%progbits,1
-.LC52:
+.LC63:
+	.ascii	"FtlGcScanTempBlk Error ID %x %x!!!!!!! \012\000"
+.LC64:
 	.ascii	"FtlGcScanTempBlkError ID %x %x!!!!!!!\012\000"
 	.section	.rodata.FtlInit.str1.1,"aMS",%progbits,1
-.LC66:
-	.ascii	"FTL version: 5.0.50 20180905\000"
 .LC67:
+	.ascii	"FTL version: 5.0.53 20190107\000"
+.LC68:
 	.ascii	"...%s: no bad block mapping table, format device\012"
 	.ascii	"\000"
-.LC68:
+.LC69:
 	.ascii	"...%s FtlSysBlkInit error ,format device!\012\000"
 	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",%progbits,1
 .LC43:
@@ -26589,14 +27114,14 @@ refValueDefault:
 .LC41:
 	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
 	.section	.rodata.FtlProgPages.str1.1,"aMS",%progbits,1
-.LC57:
+.LC56:
 	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
 	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",%progbits,1
-.LC61:
+.LC60:
 	.ascii	"RSB refresh addr %x\012\000"
-.LC62:
+.LC61:
 	.ascii	"spuer block %x vpn is 0\012 \000"
-.LC63:
+.LC62:
 	.ascii	"g_recovery_ppa %x ver %x\012 \000"
 	.section	.rodata.FtlScanAllBlock.str1.1,"aMS",%progbits,1
 .LC49:
@@ -26614,17 +27139,17 @@ refValueDefault:
 .LC38:
 	.ascii	"FtlVpcTblFlush error = %x error count = %d\012\000"
 	.section	.rodata.FtlWrite.str1.1,"aMS",%progbits,1
-.LC72:
+.LC73:
 	.ascii	"FtlWrite: lpa error:%x %x\012\000"
 	.section	.rodata.Ftl_load_ext_data.str1.1,"aMS",%progbits,1
 .LC44:
 	.ascii	"slc mode\000"
 	.section	.rodata.Ftlscanalldata.str1.1,"aMS",%progbits,1
-.LC58:
+.LC57:
 	.ascii	"Ftlscanalldata = %x\012\000"
-.LC59:
+.LC58:
 	.ascii	"scan lpa = %x ppa= %x\012\000"
-.LC60:
+.LC59:
 	.ascii	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\012"
 	.ascii	"\000"
 	.section	.rodata.HynixGetReadRetryDefault.str1.1,"aMS",%progbits,1
@@ -26642,203 +27167,203 @@ refValueDefault:
 	.section	.rodata.MicronReadRetrial.str1.1,"aMS",%progbits,1
 .LC13:
 	.ascii	"micron RR %d row=%x,count %d,status=%d\012\000"
-	.section	.rodata.__func__.10408,"a",%progbits
+	.section	.rodata.__func__.10518,"a",%progbits
 	.set	.LANCHOR245,. + 0
-	.type	__func__.10408, %object
-	.size	__func__.10408, 8
-__func__.10408:
+	.type	__func__.10518, %object
+	.size	__func__.10518, 8
+__func__.10518:
 	.ascii	"FtlInit\000"
-	.section	.rodata.__func__.10468,"a",%progbits
-	.set	.LANCHOR229,. + 0
-	.type	__func__.10468, %object
-	.size	__func__.10468, 13
-__func__.10468:
+	.section	.rodata.__func__.10578,"a",%progbits
+	.set	.LANCHOR228,. + 0
+	.type	__func__.10578, %object
+	.size	__func__.10578, 13
+__func__.10578:
 	.ascii	"FtlProgPages\000"
-	.section	.rodata.__func__.10494,"a",%progbits
+	.section	.rodata.__func__.10604,"a",%progbits
 	.set	.LANCHOR247,. + 0
-	.type	__func__.10494, %object
-	.size	__func__.10494, 9
-__func__.10494:
+	.type	__func__.10604, %object
+	.size	__func__.10604, 9
+__func__.10604:
 	.ascii	"FtlWrite\000"
-	.section	.rodata.__func__.10577,"a",%progbits
+	.section	.rodata.__func__.10687,"a",%progbits
 	.set	.LANCHOR124,. + 0
-	.type	__func__.10577, %object
-	.size	__func__.10577, 14
-__func__.10577:
+	.type	__func__.10687, %object
+	.size	__func__.10687, 14
+__func__.10687:
 	.ascii	"FtlBbt2Bitmap\000"
-	.section	.rodata.__func__.10623,"a",%progbits
+	.section	.rodata.__func__.10733,"a",%progbits
 	.set	.LANCHOR211,. + 0
-	.type	__func__.10623, %object
-	.size	__func__.10623, 11
-__func__.10623:
+	.type	__func__.10733, %object
+	.size	__func__.10733, 11
+__func__.10733:
 	.ascii	"FtlLoadBbt\000"
-	.section	.rodata.__func__.10716,"a",%progbits
-	.set	.LANCHOR90,. + 0
-	.type	__func__.10716, %object
-	.size	__func__.10716, 17
-__func__.10716:
+	.section	.rodata.__func__.10826,"a",%progbits
+	.set	.LANCHOR89,. + 0
+	.type	__func__.10826, %object
+	.size	__func__.10826, 17
+__func__.10826:
 	.ascii	"INSERT_FREE_LIST\000"
-	.section	.rodata.__func__.10720,"a",%progbits
-	.set	.LANCHOR87,. + 0
-	.type	__func__.10720, %object
-	.size	__func__.10720, 17
-__func__.10720:
+	.section	.rodata.__func__.10830,"a",%progbits
+	.set	.LANCHOR86,. + 0
+	.type	__func__.10830, %object
+	.size	__func__.10830, 17
+__func__.10830:
 	.ascii	"INSERT_DATA_LIST\000"
-	.section	.rodata.__func__.10757,"a",%progbits
-	.set	.LANCHOR91,. + 0
-	.type	__func__.10757, %object
-	.size	__func__.10757, 17
-__func__.10757:
+	.section	.rodata.__func__.10867,"a",%progbits
+	.set	.LANCHOR90,. + 0
+	.type	__func__.10867, %object
+	.size	__func__.10867, 17
+__func__.10867:
 	.ascii	"List_remove_node\000"
-	.section	.rodata.__func__.10787,"a",%progbits
-	.set	.LANCHOR95,. + 0
-	.type	__func__.10787, %object
-	.size	__func__.10787, 22
-__func__.10787:
+	.section	.rodata.__func__.10897,"a",%progbits
+	.set	.LANCHOR94,. + 0
+	.type	__func__.10897, %object
+	.size	__func__.10897, 22
+__func__.10897:
 	.ascii	"List_update_data_list\000"
-	.section	.rodata.__func__.10794,"a",%progbits
-	.set	.LANCHOR228,. + 0
-	.type	__func__.10794, %object
-	.size	__func__.10794, 20
-__func__.10794:
+	.section	.rodata.__func__.10904,"a",%progbits
+	.set	.LANCHOR227,. + 0
+	.type	__func__.10904, %object
+	.size	__func__.10904, 20
+__func__.10904:
 	.ascii	"ftl_load_l2p_region\000"
-	.section	.rodata.__func__.10825,"a",%progbits
-	.set	.LANCHOR96,. + 0
-	.type	__func__.10825, %object
-	.size	__func__.10825, 26
-__func__.10825:
+	.section	.rodata.__func__.10935,"a",%progbits
+	.set	.LANCHOR95,. + 0
+	.type	__func__.10935, %object
+	.size	__func__.10935, 26
+__func__.10935:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.section	.rodata.__func__.10835,"a",%progbits
+	.section	.rodata.__func__.10945,"a",%progbits
 	.set	.LANCHOR212,. + 0
-	.type	__func__.10835, %object
-	.size	__func__.10835, 15
-__func__.10835:
+	.type	__func__.10945, %object
+	.size	__func__.10945, 15
+__func__.10945:
 	.ascii	"ftl_map_blk_gc\000"
-	.section	.rodata.__func__.10848,"a",%progbits
+	.section	.rodata.__func__.10958,"a",%progbits
 	.set	.LANCHOR213,. + 0
-	.type	__func__.10848, %object
-	.size	__func__.10848, 31
-__func__.10848:
+	.type	__func__.10958, %object
+	.size	__func__.10958, 31
+__func__.10958:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.section	.rodata.__func__.10861,"a",%progbits
+	.section	.rodata.__func__.10971,"a",%progbits
 	.set	.LANCHOR214,. + 0
-	.type	__func__.10861, %object
-	.size	__func__.10861, 16
-__func__.10861:
+	.type	__func__.10971, %object
+	.size	__func__.10971, 16
+__func__.10971:
 	.ascii	"FtlMapWritePage\000"
-	.section	.rodata.__func__.10881,"a",%progbits
-	.set	.LANCHOR99,. + 0
-	.type	__func__.10881, %object
-	.size	__func__.10881, 22
-__func__.10881:
+	.section	.rodata.__func__.10991,"a",%progbits
+	.set	.LANCHOR98,. + 0
+	.type	__func__.10991, %object
+	.size	__func__.10991, 22
+__func__.10991:
 	.ascii	"select_l2p_ram_region\000"
-	.section	.rodata.__func__.10897,"a",%progbits
-	.set	.LANCHOR227,. + 0
-	.type	__func__.10897, %object
-	.size	__func__.10897, 9
-__func__.10897:
+	.section	.rodata.__func__.11007,"a",%progbits
+	.set	.LANCHOR226,. + 0
+	.type	__func__.11007, %object
+	.size	__func__.11007, 9
+__func__.11007:
 	.ascii	"log2phys\000"
-	.section	.rodata.__func__.10959,"a",%progbits
+	.section	.rodata.__func__.11069,"a",%progbits
 	.set	.LANCHOR210,. + 0
-	.type	__func__.10959, %object
-	.size	__func__.10959, 15
-__func__.10959:
+	.type	__func__.11069, %object
+	.size	__func__.11069, 15
+__func__.11069:
 	.ascii	"FtlVpcTblFlush\000"
-	.section	.rodata.__func__.10978,"a",%progbits
+	.section	.rodata.__func__.11088,"a",%progbits
 	.set	.LANCHOR220,. + 0
-	.type	__func__.10978, %object
-	.size	__func__.10978, 14
-__func__.10978:
+	.type	__func__.11088, %object
+	.size	__func__.11088, 14
+__func__.11088:
 	.ascii	"FtlScanSysBlk\000"
-	.section	.rodata.__func__.11032,"a",%progbits
+	.section	.rodata.__func__.11143,"a",%progbits
 	.set	.LANCHOR221,. + 0
-	.type	__func__.11032, %object
-	.size	__func__.11032, 15
-__func__.11032:
+	.type	__func__.11143, %object
+	.size	__func__.11143, 15
+__func__.11143:
 	.ascii	"FtlLoadSysInfo\000"
-	.section	.rodata.__func__.11043,"a",%progbits
+	.section	.rodata.__func__.11154,"a",%progbits
 	.set	.LANCHOR248,. + 0
-	.type	__func__.11043, %object
-	.size	__func__.11043, 12
-__func__.11043:
+	.type	__func__.11154, %object
+	.size	__func__.11154, 12
+__func__.11154:
 	.ascii	"FtlCheckVpc\000"
-	.section	.rodata.__func__.11075,"a",%progbits
+	.section	.rodata.__func__.11186,"a",%progbits
 	.set	.LANCHOR224,. + 0
-	.type	__func__.11075, %object
-	.size	__func__.11075, 17
-__func__.11075:
+	.type	__func__.11186, %object
+	.size	__func__.11186, 17
+__func__.11186:
 	.ascii	"FtlDumpBlockInfo\000"
-	.section	.rodata.__func__.11094,"a",%progbits
+	.section	.rodata.__func__.11205,"a",%progbits
 	.set	.LANCHOR225,. + 0
-	.type	__func__.11094, %object
-	.size	__func__.11094, 16
-__func__.11094:
+	.type	__func__.11205, %object
+	.size	__func__.11205, 16
+__func__.11205:
 	.ascii	"FtlScanAllBlock\000"
-	.section	.rodata.__func__.11199,"a",%progbits
-	.set	.LANCHOR233,. + 0
-	.type	__func__.11199, %object
-	.size	__func__.11199, 16
-__func__.11199:
+	.section	.rodata.__func__.11310,"a",%progbits
+	.set	.LANCHOR232,. + 0
+	.type	__func__.11310, %object
+	.size	__func__.11310, 16
+__func__.11310:
 	.ascii	"FtlReUsePrevPpa\000"
-	.section	.rodata.__func__.11232,"a",%progbits
-	.set	.LANCHOR234,. + 0
-	.type	__func__.11232, %object
-	.size	__func__.11232, 22
-__func__.11232:
+	.section	.rodata.__func__.11343,"a",%progbits
+	.set	.LANCHOR233,. + 0
+	.type	__func__.11343, %object
+	.size	__func__.11343, 22
+__func__.11343:
 	.ascii	"FtlRecoverySuperblock\000"
-	.section	.rodata.__func__.11286,"a",%progbits
-	.set	.LANCHOR102,. + 0
-	.type	__func__.11286, %object
-	.size	__func__.11286, 16
-__func__.11286:
+	.section	.rodata.__func__.11397,"a",%progbits
+	.set	.LANCHOR101,. + 0
+	.type	__func__.11397, %object
+	.size	__func__.11397, 16
+__func__.11397:
 	.ascii	"make_superblock\000"
-	.section	.rodata.__func__.11306,"a",%progbits
+	.section	.rodata.__func__.11417,"a",%progbits
 	.set	.LANCHOR140,. + 0
-	.type	__func__.11306, %object
-	.size	__func__.11306, 18
-__func__.11306:
+	.type	__func__.11417, %object
+	.size	__func__.11417, 18
+__func__.11417:
 	.ascii	"SupperBlkListInit\000"
-	.section	.rodata.__func__.11383,"a",%progbits
+	.section	.rodata.__func__.11494,"a",%progbits
 	.set	.LANCHOR203,. + 0
-	.type	__func__.11383, %object
-	.size	__func__.11383, 25
-__func__.11383:
+	.type	__func__.11494, %object
+	.size	__func__.11494, 25
+__func__.11494:
 	.ascii	"allocate_data_superblock\000"
-	.section	.rodata.__func__.11397,"a",%progbits
+	.section	.rodata.__func__.11508,"a",%progbits
 	.set	.LANCHOR219,. + 0
-	.type	__func__.11397, %object
-	.size	__func__.11397, 29
-__func__.11397:
+	.type	__func__.11508, %object
+	.size	__func__.11508, 29
+__func__.11508:
 	.ascii	"allocate_new_data_superblock\000"
-	.section	.rodata.__func__.11403,"a",%progbits
+	.section	.rodata.__func__.11514,"a",%progbits
 	.set	.LANCHOR208,. + 0
-	.type	__func__.11403, %object
-	.size	__func__.11403, 19
-__func__.11403:
+	.type	__func__.11514, %object
+	.size	__func__.11514, 19
+__func__.11514:
 	.ascii	"get_new_active_ppa\000"
-	.section	.rodata.__func__.11414,"a",%progbits
+	.section	.rodata.__func__.11525,"a",%progbits
 	.set	.LANCHOR206,. + 0
-	.type	__func__.11414, %object
-	.size	__func__.11414, 16
-__func__.11414:
+	.type	__func__.11525, %object
+	.size	__func__.11525, 16
+__func__.11525:
 	.ascii	"update_vpc_list\000"
-	.section	.rodata.__func__.11419,"a",%progbits
+	.section	.rodata.__func__.11530,"a",%progbits
 	.set	.LANCHOR207,. + 0
-	.type	__func__.11419, %object
-	.size	__func__.11419, 20
-__func__.11419:
+	.type	__func__.11530, %object
+	.size	__func__.11530, 20
+__func__.11530:
 	.ascii	"decrement_vpc_count\000"
-	.section	.rodata.__func__.11487,"a",%progbits
+	.section	.rodata.__func__.11598,"a",%progbits
 	.set	.LANCHOR239,. + 0
-	.type	__func__.11487, %object
-	.size	__func__.11487, 19
-__func__.11487:
+	.type	__func__.11598, %object
+	.size	__func__.11598, 19
+__func__.11598:
 	.ascii	"FtlGcFreeTempBlock\000"
-	.section	.rodata.__func__.11581,"a",%progbits
+	.section	.rodata.__func__.11697,"a",%progbits
 	.set	.LANCHOR243,. + 0
-	.type	__func__.11581, %object
-	.size	__func__.11581, 23
-__func__.11581:
+	.type	__func__.11697, %object
+	.size	__func__.11697, 23
+__func__.11697:
 	.ascii	"rk_ftl_garbage_collect\000"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",%progbits,1
 .LC36:
@@ -26846,19 +27371,19 @@ __func__.11581:
 .LC37:
 	.ascii	"decrement_vpc_count %x = %d in free list\012\000"
 	.section	.rodata.dump_map_info.str1.1,"aMS",%progbits,1
-.LC79:
+.LC80:
 	.ascii	"phyBlk = %x,addr= %x,spare= %x %x %x %x data=%x %x\012"
 	.ascii	"\000"
-.LC80:
-	.ascii	"Mblk:\000"
 .LC81:
-	.ascii	"L2P:\000"
+	.ascii	"Mblk:\000"
 .LC82:
+	.ascii	"L2P:\000"
+.LC83:
 	.ascii	"L2PC:\000"
 	.section	.rodata.ftl_fix_nand_power_lost_error.str1.1,"aMS",%progbits,1
-.LC70:
-	.ascii	"fix power lost blk = %x vpc=%x\012\000"
 .LC71:
+	.ascii	"fix power lost blk = %x vpc=%x\012\000"
+.LC72:
 	.ascii	"erase power lost blk = %x vpc=%x\012\000"
 	.section	.rodata.ftl_map_blk_alloc_new_blk.str1.1,"aMS",%progbits,1
 .LC8:
@@ -26874,17 +27399,17 @@ __func__.11581:
 .LC17:
 	.ascii	"write_idblock fail! %x\012\000"
 	.section	.rodata.log2phys.str1.1,"aMS",%progbits,1
-.LC54:
+.LC53:
 	.ascii	"region_id = %x phyAddr = %x\012\000"
-.LC55:
+.LC54:
 	.ascii	"map_ppn:\000"
-.LC56:
+.LC55:
 	.ascii	"load_l2p_region refresh = %x phyAddr = %x\012\000"
 	.section	.rodata.rk_ftl_garbage_collect.str1.1,"aMS",%progbits,1
-.LC65:
+.LC66:
 	.ascii	"g_gc_superblock_free %x %x %x %x %x\012\000"
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",%progbits,1
-.LC69:
+.LC70:
 	.ascii	"FtlInit %x\012\000"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",%progbits,1
 .LC18:
diff --git a/drivers/rknand/rk_ftl_arm_v8.S b/drivers/rknand/rk_ftl_arm_v8.S
index d2d1e42d45..06eaf15721 100644
--- a/drivers/rknand/rk_ftl_arm_v8.S
+++ b/drivers/rknand/rk_ftl_arm_v8.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2018-09-05
+ * date: 2019-01-07
  */
 	.arch armv8-a
 	.file	"rk_ftl_arm_v8.c"
@@ -138,6 +138,25 @@ FlashSetRandomizer:
 	str	w4, [x0, 336]
 	ret
 	.size	FlashSetRandomizer, .-FlashSetRandomizer
+	.section	.text.FlashBlockAlignInit,"ax",@progbits
+	.align	2
+	.global	FlashBlockAlignInit
+	.type	FlashBlockAlignInit, %function
+FlashBlockAlignInit:
+	and	w0, w0, 65535
+	adrp	x1, .LANCHOR3
+	cmp	w0, 256
+	bls	.L36
+	mov	w0, 512
+.L39:
+	str	w0, [x1, #:lo12:.LANCHOR3]
+	ret
+.L36:
+	cmp	w0, 128
+	bls	.L39
+	mov	w0, 256
+	b	.L39
+	.size	FlashBlockAlignInit, .-FlashBlockAlignInit
 	.section	.text.FlashReadCmd,"ax",@progbits
 	.align	2
 	.global	FlashReadCmd
@@ -183,7 +202,7 @@ FlashReadDpDataOutCmd:
 	ldrb	w2, [x4, 8]
 	lsr	w4, w1, 8
 	add	x2, x6, x2, lsl 8
-	bne	.L37
+	bne	.L42
 	mov	w6, 6
 	str	w6, [x2, 2056]
 	str	wzr, [x2, 2052]
@@ -191,11 +210,11 @@ FlashReadDpDataOutCmd:
 	str	w5, [x2, 2052]
 	str	w4, [x2, 2052]
 	str	w3, [x2, 2052]
-.L39:
+.L44:
 	mov	w3, 224
 	str	w3, [x2, 2056]
 	b	FlashSetRandomizer
-.L37:
+.L42:
 	str	wzr, [x2, 2056]
 	str	wzr, [x2, 2052]
 	str	wzr, [x2, 2052]
@@ -206,52 +225,8 @@ FlashReadDpDataOutCmd:
 	str	w3, [x2, 2056]
 	str	wzr, [x2, 2052]
 	str	wzr, [x2, 2052]
-	b	.L39
+	b	.L44
 	.size	FlashReadDpDataOutCmd, .-FlashReadDpDataOutCmd
-	.section	.text.flash_enter_slc_mode,"ax",@progbits
-	.align	2
-	.global	flash_enter_slc_mode
-	.type	flash_enter_slc_mode, %function
-flash_enter_slc_mode:
-	adrp	x1, .LANCHOR8
-	and	w0, w0, 255
-	ldrb	w1, [x1, #:lo12:.LANCHOR8]
-	cbz	w1, .L40
-	sbfiz	x0, x0, 4, 32
-	adrp	x1, .LANCHOR6
-	add	x1, x1, :lo12:.LANCHOR6
-	add	x2, x1, x0
-	ldr	x1, [x1, x0]
-	ldrb	w0, [x2, 8]
-	add	x0, x0, 8
-	add	x0, x1, x0, lsl 8
-	mov	w1, 218
-	str	w1, [x0, 8]
-.L40:
-	ret
-	.size	flash_enter_slc_mode, .-flash_enter_slc_mode
-	.section	.text.flash_exit_slc_mode,"ax",@progbits
-	.align	2
-	.global	flash_exit_slc_mode
-	.type	flash_exit_slc_mode, %function
-flash_exit_slc_mode:
-	adrp	x1, .LANCHOR8
-	and	w0, w0, 255
-	ldrb	w1, [x1, #:lo12:.LANCHOR8]
-	cbz	w1, .L45
-	sbfiz	x0, x0, 4, 32
-	adrp	x1, .LANCHOR6
-	add	x1, x1, :lo12:.LANCHOR6
-	add	x2, x1, x0
-	ldr	x1, [x1, x0]
-	ldrb	w0, [x2, 8]
-	add	x0, x0, 8
-	add	x0, x1, x0, lsl 8
-	mov	w1, 223
-	str	w1, [x0, 8]
-.L45:
-	ret
-	.size	flash_exit_slc_mode, .-flash_exit_slc_mode
 	.section	.text.FlashProgFirstCmd,"ax",@progbits
 	.align	2
 	.global	FlashProgFirstCmd
@@ -288,7 +263,7 @@ FlashEraseCmd:
 	add	x4, x3, x0
 	ldr	x3, [x3, x0]
 	ldrb	w0, [x4, 8]
-	cbz	w2, .L52
+	cbz	w2, .L47
 	add	x2, x3, x0, lsl 8
 	mov	w4, 96
 	str	w4, [x2, 2056]
@@ -301,7 +276,7 @@ FlashEraseCmd:
 	adrp	x2, .LANCHOR3
 	ldr	w2, [x2, #:lo12:.LANCHOR3]
 	add	w1, w1, w2
-.L52:
+.L47:
 	add	x0, x3, x0, lsl 8
 	mov	w2, 96
 	str	w2, [x0, 2056]
@@ -400,28 +375,28 @@ FlashReadStatus:
 	ldp	x29, x30, [sp], 32
 	ret
 	.size	FlashReadStatus, .-FlashReadStatus
-	.section	.text.JSHash,"ax",@progbits
+	.section	.text.js_hash,"ax",@progbits
 	.align	2
-	.global	JSHash
-	.type	JSHash, %function
-JSHash:
+	.global	js_hash
+	.type	js_hash, %function
+js_hash:
 	mov	x4, x0
 	mov	w0, 42982
 	mov	x3, 0
 	movk	w0, 0x47c6, lsl 16
-.L62:
+.L57:
 	cmp	w1, w3
-	bhi	.L63
+	bhi	.L58
 	ret
-.L63:
+.L58:
 	lsr	w2, w0, 2
 	ldrb	w5, [x4, x3]
 	add	w2, w2, w0, lsl 5
 	add	x3, x3, 1
 	add	w2, w2, w5
 	eor	w0, w0, w2
-	b	.L62
-	.size	JSHash, .-JSHash
+	b	.L57
+	.size	js_hash, .-js_hash
 	.section	.text.FlashLoadIdbInfo,"ax",@progbits
 	.align	2
 	.global	FlashLoadIdbInfo
@@ -451,27 +426,27 @@ ToshibaSetRRPara:
 	mov	x21, x0
 	mov	w0, 5
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR9
+	adrp	x20, .LANCHOR8
 	umull	x2, w2, w0
 	stp	x23, x24, [sp, 48]
-	adrp	x0, .LANCHOR10
-	add	x20, x20, :lo12:.LANCHOR9
-	add	x24, x0, :lo12:.LANCHOR10
+	adrp	x0, .LANCHOR9
+	add	x20, x20, :lo12:.LANCHOR8
+	add	x24, x0, :lo12:.LANCHOR9
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LANCHOR13
-	adrp	x25, .LANCHOR11
-	adrp	x26, .LANCHOR12
-	add	x23, x23, :lo12:.LANCHOR13
-	add	x25, x25, :lo12:.LANCHOR11
-	add	x26, x26, :lo12:.LANCHOR12
+	adrp	x23, .LANCHOR12
+	adrp	x25, .LANCHOR10
+	adrp	x26, .LANCHOR11
+	add	x23, x23, :lo12:.LANCHOR12
+	add	x25, x25, :lo12:.LANCHOR10
+	add	x26, x26, :lo12:.LANCHOR11
 	add	x20, x20, x2
 	add	x24, x24, x2
 	mov	x22, x0
 	mov	x19, 0
-.L67:
+.L62:
 	ldrb	w0, [x23]
 	cmp	w0, w19
-	bhi	.L71
+	bhi	.L66
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -479,30 +454,30 @@ ToshibaSetRRPara:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L71:
+.L66:
 	mov	w0, 85
 	str	w0, [x21, 8]
-	add	x0, x22, :lo12:.LANCHOR10
+	add	x0, x22, :lo12:.LANCHOR9
 	ldrsb	w0, [x19, x0]
 	str	w0, [x21, 4]
 	mov	x0, 200
 	bl	udelay
 	ldrb	w0, [x25]
 	cmp	w0, 34
-	bne	.L68
+	bne	.L63
 	ldrsb	w0, [x24, x19]
-.L73:
+.L68:
 	add	x19, x19, 1
 	str	w0, [x21]
-	b	.L67
-.L68:
+	b	.L62
+.L63:
 	cmp	w0, 35
-	bne	.L70
+	bne	.L65
 	ldrsb	w0, [x20, x19]
-	b	.L73
-.L70:
+	b	.L68
+.L65:
 	ldrsb	w0, [x26, w27, sxtw]
-	b	.L73
+	b	.L68
 	.size	ToshibaSetRRPara, .-ToshibaSetRRPara
 	.section	.text.SamsungSetRRPara,"ax",@progbits
 	.align	2
@@ -515,26 +490,26 @@ SamsungSetRRPara:
 	ubfiz	x21, x1, 2, 8
 	mov	x22, x0
 	add	x21, x21, 4
-	adrp	x0, .LANCHOR14
-	add	x0, x0, :lo12:.LANCHOR14
+	adrp	x0, .LANCHOR13
+	add	x0, x0, :lo12:.LANCHOR13
 	stp	x19, x20, [sp, 16]
 	add	x21, x0, x21
 	stp	x23, x24, [sp, 48]
 	mov	x19, x0
-	adrp	x23, .LANCHOR13
-	add	x23, x23, :lo12:.LANCHOR13
+	adrp	x23, .LANCHOR12
+	add	x23, x23, :lo12:.LANCHOR12
 	mov	x20, 0
 	mov	w24, 161
-.L75:
+.L70:
 	ldrb	w0, [x23]
 	cmp	w0, w20
-	bhi	.L76
+	bhi	.L71
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L76:
+.L71:
 	str	w24, [x22, 8]
 	str	wzr, [x22]
 	ldrsb	w0, [x20, x19]
@@ -544,15 +519,15 @@ SamsungSetRRPara:
 	str	w0, [x22]
 	mov	x0, 300
 	bl	udelay
-	b	.L75
+	b	.L70
 	.size	SamsungSetRRPara, .-SamsungSetRRPara
 	.section	.text.LogAddr2PhyAddr,"ax",@progbits
 	.align	2
 	.global	LogAddr2PhyAddr
 	.type	LogAddr2PhyAddr, %function
 LogAddr2PhyAddr:
-	adrp	x6, .LANCHOR15
-	add	x6, x6, :lo12:.LANCHOR15
+	adrp	x6, .LANCHOR14
+	add	x6, x6, :lo12:.LANCHOR14
 	and	w4, w4, 255
 	ldrh	w8, [x6, 12]
 	ldrh	w5, [x6, 14]
@@ -573,14 +548,14 @@ LogAddr2PhyAddr:
 	and	w10, w5, 65535
 	msub	w5, w5, w8, w11
 	and	w5, w5, 65535
-	bne	.L80
-	adrp	x1, .LANCHOR8
-	ldrb	w1, [x1, #:lo12:.LANCHOR8]
-	cbnz	w1, .L80
+	bne	.L75
+	adrp	x1, .LANCHOR15
+	ldrb	w1, [x1, #:lo12:.LANCHOR15]
+	cbnz	w1, .L75
 	adrp	x1, .LANCHOR16
 	add	x1, x1, :lo12:.LANCHOR16
 	ldrh	w6, [x1, w6, sxtw 1]
-.L80:
+.L75:
 	uxtw	x8, w10
 	adrp	x1, .LANCHOR17
 	add	x1, x1, :lo12:.LANCHOR17
@@ -590,14 +565,14 @@ LogAddr2PhyAddr:
 	add	w5, w5, w6
 	str	w5, [x2]
 	str	w10, [x3]
-	bls	.L82
+	bls	.L77
 	ldr	w1, [x0, 4]
 	ldr	w0, [x0, 60]
 	add	w1, w1, 1024
 	cmp	w1, w0
 	cset	w0, eq
 	ret
-.L82:
+.L77:
 	mov	w0, 0
 	ret
 	.size	LogAddr2PhyAddr, .-LogAddr2PhyAddr
@@ -619,26 +594,26 @@ FlashReadStatusEN:
 	ldrb	w19, [x4, 8]
 	ldrb	w0, [x0, 8]
 	cmp	w0, 2
-	bne	.L84
+	bne	.L79
 	and	w2, w2, 255
 	adrp	x0, .LANCHOR7
-	cbnz	w2, .L85
+	cbnz	w2, .L80
 	add	x2, x0, :lo12:.LANCHOR7
 	ldrb	w3, [x2, 13]
-.L95:
+.L90:
 	add	x2, x19, 8
 	add	x0, x0, :lo12:.LANCHOR7
 	add	x2, x20, x2, lsl 8
 	str	w3, [x2, 8]
 	ldrb	w4, [x0, 15]
-	cbz	w4, .L89
+	cbz	w4, .L84
 	add	x3, x19, 8
 	mov	w2, 0
 	add	x3, x20, x3, lsl 8
-.L88:
+.L83:
 	cmp	w2, w4
-	bcc	.L90
-.L89:
+	bcc	.L85
+.L84:
 	add	x19, x19, 8
 	mov	x0, 80
 	lsl	x19, x19, 8
@@ -648,23 +623,23 @@ FlashReadStatusEN:
 	and	w0, w0, 255
 	ldp	x29, x30, [sp], 32
 	ret
-.L85:
+.L80:
 	add	x2, x0, :lo12:.LANCHOR7
 	ldrb	w3, [x2, 14]
-	b	.L95
-.L90:
+	b	.L90
+.L85:
 	lsl	w0, w2, 3
 	add	w2, w2, 1
 	lsr	w0, w1, w0
 	and	w0, w0, 255
 	str	w0, [x3, 4]
-	b	.L88
-.L84:
+	b	.L83
+.L79:
 	add	x0, x19, 8
 	mov	w1, 112
 	add	x0, x20, x0, lsl 8
 	str	w1, [x0, 8]
-	b	.L89
+	b	.L84
 	.size	FlashReadStatusEN, .-FlashReadStatusEN
 	.section	.text.FlashWaitReadyEN,"ax",@progbits
 	.align	2
@@ -678,15 +653,15 @@ FlashWaitReadyEN:
 	str	x21, [sp, 32]
 	mov	w20, w1
 	and	w21, w2, 255
-.L100:
+.L95:
 	mov	w1, w20
 	mov	w2, w21
 	mov	w0, w19
 	bl	FlashReadStatusEN
 	mov	w1, w0
 	cmp	w0, 255
-	beq	.L100
-	tbz	x1, 6, .L100
+	beq	.L95
+	tbz	x1, 6, .L95
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -766,7 +741,7 @@ NandcSetMode:
 	tst	w0, 6
 	ldr	x2, [x1, #:lo12:.LANCHOR19]
 	ldr	w1, [x2]
-	beq	.L112
+	beq	.L107
 	orr	w1, w1, 24576
 	tst	x0, 4
 	and	w1, w1, -32769
@@ -782,13 +757,13 @@ NandcSetMode:
 	str	w0, [x2, 308]
 	mov	w0, 39
 	str	w0, [x2, 308]
-.L114:
+.L109:
 	mov	w0, 0
 	str	w1, [x2]
 	ret
-.L112:
+.L107:
 	and	w1, w1, -8193
-	b	.L114
+	b	.L109
 	.size	NandcSetMode, .-NandcSetMode
 	.section	.text.NandcFlashCs,"ax",@progbits
 	.align	2
@@ -835,22 +810,22 @@ HynixSetRRPara:
 	adrp	x0, .LANCHOR18
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
-	mov	x21, x2
+	mov	x20, x2
 	ldr	x0, [x0, #:lo12:.LANCHOR18]
 	and	w26, w1, 255
 	stp	x23, x24, [sp, 48]
-	and	w20, w3, 255
+	and	w21, w3, 255
 	adrp	x19, .LANCHOR20
 	ldrb	w0, [x0, 19]
 	cmp	w0, 6
-	bne	.L120
+	bne	.L115
 	add	x0, x19, :lo12:.LANCHOR20
 	ubfiz	x19, x22, 6, 8
 	add	x19, x19, 20
-	add	x19, x19, x20, uxtw 2
-.L126:
+	add	x19, x19, x21, uxtw 2
+.L122:
 	add	x19, x0, x19
-.L121:
+.L116:
 	sxtw	x25, w22
 	adrp	x0, .LANCHOR6
 	lsl	x1, x25, 4
@@ -866,48 +841,57 @@ HynixSetRRPara:
 	add	x23, x23, x5
 	mov	w0, 54
 	str	w0, [x23, 2056]
-.L123:
+.L119:
 	cmp	x24, x26
-	bne	.L124
+	bne	.L120
 	mov	w0, 22
 	str	w0, [x23, 2056]
 	mov	w0, w22
 	bl	NandcFlashDeCs
 	adrp	x0, .LANCHOR21
 	add	x0, x0, :lo12:.LANCHOR21
-	strb	w20, [x0, x25]
+	strb	w21, [x0, x25]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L120:
+.L115:
 	cmp	w0, 7
+	bne	.L117
 	add	x0, x19, :lo12:.LANCHOR20
-	bne	.L122
-	mov	w19, 160
 	mov	x1, 28
+	mov	w19, 160
 	umaddl	x1, w19, w22, x1
 	mov	w19, 10
-	umaddl	x19, w20, w19, x1
-	b	.L126
-.L122:
-	and	x19, x20, 255
+	umaddl	x19, w21, w19, x1
+	b	.L122
+.L117:
+	cmp	w0, 8
+	bne	.L118
+	add	x19, x19, :lo12:.LANCHOR20
+	add	x0, x19, 28
+	add	w19, w21, w21, lsl 2
+	add	x19, x0, x19, sxtw
+	b	.L116
+.L118:
+	add	x0, x19, :lo12:.LANCHOR20
+	and	x19, x21, 255
 	add	x19, x19, 2
 	add	x19, x19, x22, uxtw 3
 	add	x19, x0, x19, lsl 3
 	add	x19, x19, 4
-	b	.L121
-.L124:
-	ldrb	w0, [x21, x24]
+	b	.L116
+.L120:
+	ldrb	w0, [x20, x24]
 	str	w0, [x23, 2052]
 	mov	x0, 200
 	bl	udelay
 	ldrsb	w0, [x19, x24]
 	add	x24, x24, 1
 	str	w0, [x23, 2048]
-	b	.L123
+	b	.L119
 	.size	HynixSetRRPara, .-HynixSetRRPara
 	.section	.text.FlashSetReadRetryDefault,"ax",@progbits
 	.align	2
@@ -919,8 +903,8 @@ FlashSetReadRetryDefault:
 	ldrb	w0, [x0, 19]
 	sub	w0, w0, #1
 	and	w0, w0, 255
-	cmp	w0, 6
-	bhi	.L134
+	cmp	w0, 7
+	bhi	.L130
 	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
@@ -931,25 +915,25 @@ FlashSetReadRetryDefault:
 	add	x22, x20, 4
 	add	x21, x21, :lo12:.LANCHOR22
 	mov	x19, 0
-.L130:
+.L126:
 	lsl	x1, x19, 3
 	and	w0, w19, 255
 	ldrb	w1, [x1, x21]
 	cmp	w1, 173
-	bne	.L129
+	bne	.L125
 	ldrb	w1, [x20, 1]
 	mov	w3, 0
 	mov	x2, x22
 	bl	HynixSetRRPara
-.L129:
+.L125:
 	add	x19, x19, 1
 	cmp	x19, 4
-	bne	.L130
+	bne	.L126
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L134:
+.L130:
 	ret
 	.size	FlashSetReadRetryDefault, .-FlashSetReadRetryDefault
 	.section	.text.FlashWaitCmdDone,"ax",@progbits
@@ -967,7 +951,7 @@ FlashWaitCmdDone:
 	stp	x19, x20, [sp, 16]
 	add	x19, x1, x0
 	ldr	x2, [x19, 8]
-	cbz	x2, .L139
+	cbz	x2, .L135
 	ldrb	w20, [x1, x0]
 	mov	w0, w20
 	bl	NandcFlashCs
@@ -987,10 +971,10 @@ FlashWaitCmdDone:
 	str	w0, [x1]
 	ldr	x1, [x19, 16]
 	str	xzr, [x19, 8]
-	cbz	x1, .L139
+	cbz	x1, .L135
 	str	w0, [x1]
 	str	xzr, [x19, 16]
-.L139:
+.L135:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -1009,6 +993,38 @@ NandcDelayns:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	NandcDelayns, .-NandcDelayns
+	.section	.text.NandcWaitFlashReadyNoDelay,"ax",@progbits
+	.align	2
+	.global	NandcWaitFlashReadyNoDelay
+	.type	NandcWaitFlashReadyNoDelay, %function
+NandcWaitFlashReadyNoDelay:
+	stp	x29, x30, [sp, -48]!
+	ubfiz	x0, x0, 4, 8
+	adrp	x1, .LANCHOR6
+	add	x1, x1, :lo12:.LANCHOR6
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w19, 34464
+	ldr	x20, [x1, x0]
+	movk	w19, 0x1, lsl 16
+.L145:
+	ldr	w0, [x20]
+	str	w0, [x29, 40]
+	ldr	w0, [x29, 40]
+	tbnz	x0, 9, .L146
+	mov	x0, 10
+	bl	udelay
+	subs	w19, w19, #1
+	bne	.L145
+	mov	w0, -1
+.L143:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+.L146:
+	mov	w0, 0
+	b	.L143
+	.size	NandcWaitFlashReadyNoDelay, .-NandcWaitFlashReadyNoDelay
 	.section	.text.NandcWaitFlashReady,"ax",@progbits
 	.align	2
 	.global	NandcWaitFlashReady
@@ -1021,25 +1037,27 @@ NandcWaitFlashReady:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w19, 34464
-	ldr	x20, [x1, x0]
 	movk	w19, 0x1, lsl 16
-.L149:
-	mov	x0, 100
+	ldr	x20, [x1, x0]
+	mov	x0, 150
 	bl	udelay
+.L151:
 	ldr	w0, [x20]
 	str	w0, [x29, 40]
 	ldr	w0, [x29, 40]
-	tbnz	x0, 9, .L150
+	tbnz	x0, 9, .L152
+	mov	x0, 10
+	bl	udelay
 	subs	w19, w19, #1
-	bne	.L149
+	bne	.L151
 	mov	w0, -1
-.L147:
+.L149:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L150:
+.L152:
 	mov	w0, 0
-	b	.L147
+	b	.L149
 	.size	NandcWaitFlashReady, .-NandcWaitFlashReady
 	.section	.text.FlashReset,"ax",@progbits
 	.align	2
@@ -1069,6 +1087,101 @@ FlashReset:
 	ldp	x29, x30, [sp], 32
 	b	NandcFlashDeCs
 	.size	FlashReset, .-FlashReset
+	.section	.text.flash_enter_slc_mode,"ax",@progbits
+	.align	2
+	.global	flash_enter_slc_mode
+	.type	flash_enter_slc_mode, %function
+flash_enter_slc_mode:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w20, w0, 255
+	adrp	x0, .LANCHOR15
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	cbz	w0, .L157
+	mov	w0, w20
+	bl	NandcFlashCs
+	sbfiz	x1, x20, 4, 32
+	adrp	x0, .LANCHOR6
+	add	x0, x0, :lo12:.LANCHOR6
+	add	x2, x0, x1
+	ldr	x0, [x0, x1]
+	ldrb	w19, [x2, 8]
+	add	x19, x0, x19, lsl 8
+	mov	w0, 239
+	str	w0, [x19, 2056]
+	mov	w0, 145
+	str	w0, [x19, 2052]
+	mov	x0, 100
+	bl	udelay
+	str	wzr, [x19, 2048]
+	mov	w0, 1
+	str	w0, [x19, 2048]
+	str	wzr, [x19, 2048]
+	mov	x0, 100
+	str	wzr, [x19, 2048]
+	bl	udelay
+	mov	w0, w20
+	bl	NandcWaitFlashReadyNoDelay
+	mov	w0, 218
+	str	w0, [x19, 2056]
+	mov	w0, w20
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	b	NandcWaitFlashReady
+.L157:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	flash_enter_slc_mode, .-flash_enter_slc_mode
+	.section	.text.flash_exit_slc_mode,"ax",@progbits
+	.align	2
+	.global	flash_exit_slc_mode
+	.type	flash_exit_slc_mode, %function
+flash_exit_slc_mode:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w20, w0, 255
+	adrp	x0, .LANCHOR15
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	cbz	w0, .L160
+	mov	w0, w20
+	bl	NandcFlashCs
+	sbfiz	x1, x20, 4, 32
+	adrp	x0, .LANCHOR6
+	add	x0, x0, :lo12:.LANCHOR6
+	add	x2, x0, x1
+	ldr	x0, [x0, x1]
+	ldrb	w19, [x2, 8]
+	add	x19, x0, x19, lsl 8
+	mov	w0, 239
+	str	w0, [x19, 2056]
+	mov	w0, 145
+	str	w0, [x19, 2052]
+	mov	x0, 100
+	bl	udelay
+	mov	w0, 2
+	str	w0, [x19, 2048]
+	mov	w0, 1
+	str	w0, [x19, 2048]
+	str	wzr, [x19, 2048]
+	mov	x0, 100
+	str	wzr, [x19, 2048]
+	bl	udelay
+	mov	w0, w20
+	bl	NandcWaitFlashReadyNoDelay
+	mov	w0, 223
+	str	w0, [x19, 2056]
+	mov	w0, w20
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	b	NandcWaitFlashReady
+.L160:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	flash_exit_slc_mode, .-flash_exit_slc_mode
 	.section	.text.FlashEraseBlock,"ax",@progbits
 	.align	2
 	.global	FlashEraseBlock
@@ -1128,71 +1241,71 @@ FlashSetInterfaceMode:
 	mov	w15, 32
 	mov	w16, 5
 	mov	w17, 44
-.L167:
+.L175:
 	ldrb	w3, [x5, x7]
 	ldrb	w4, [x2]
 	cmp	w3, 152
 	ccmp	w3, w13, 4, ne
-	beq	.L158
+	beq	.L166
 	cmp	w3, 173
 	ccmp	w3, w17, 4, ne
-	bne	.L159
-.L158:
+	bne	.L167
+.L166:
 	cmp	w0, 1
 	ldr	x1, [x2, -8]
-	bne	.L160
-	cbz	w6, .L159
+	bne	.L168
+	cbz	w6, .L167
 	ubfiz	x4, x4, 8, 8
 	cmp	w3, 173
 	add	x1, x1, x4
 	str	w8, [x1, 2056]
-	bne	.L161
+	bne	.L169
 	str	w0, [x1, 2052]
-.L179:
+.L187:
 	str	wzr, [x1, 2048]
-	b	.L165
-.L161:
+	b	.L173
+.L169:
 	cmp	w3, 44
-	bne	.L163
+	bne	.L171
 	str	w0, [x1, 2052]
 	str	w16, [x1, 2048]
-.L165:
+.L173:
 	str	wzr, [x1, 2048]
 	str	wzr, [x1, 2048]
 	str	wzr, [x1, 2048]
-.L159:
+.L167:
 	add	x5, x5, 8
 	add	x2, x2, 16
 	cmp	x5, 32
-	bne	.L167
+	bne	.L175
 	mov	w0, 0
 	bl	NandcWaitFlashReady
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L163:
+.L171:
 	str	w10, [x1, 2052]
 	str	w0, [x1, 2048]
-	b	.L165
-.L160:
-	cbz	w12, .L159
+	b	.L173
+.L168:
+	cbz	w12, .L167
 	ubfiz	x4, x4, 8, 8
 	cmp	w3, 173
 	add	x1, x1, x4
 	str	w8, [x1, 2056]
-	bne	.L164
+	bne	.L172
 	str	w11, [x1, 2052]
 	str	w15, [x1, 2048]
-	b	.L165
-.L164:
+	b	.L173
+.L172:
 	cmp	w3, 44
-	bne	.L166
+	bne	.L174
 	str	w11, [x1, 2052]
 	str	w14, [x1, 2048]
-	b	.L165
-.L166:
+	b	.L173
+.L174:
 	str	w10, [x1, 2052]
-	b	.L179
+	b	.L187
 	.size	FlashSetInterfaceMode, .-FlashSetInterfaceMode
 	.section	.text.SandiskSetRRPara,"ax",@progbits
 	.align	2
@@ -1210,38 +1323,38 @@ SandiskSetRRPara:
 	str	w0, [x20, 4]
 	mov	x0, 200
 	bl	udelay
-	adrp	x0, .LANCHOR13
+	adrp	x0, .LANCHOR12
 	add	w1, w19, 1
-	adrp	x2, .LANCHOR9
-	add	x2, x2, :lo12:.LANCHOR9
-	ldrb	w3, [x0, #:lo12:.LANCHOR13]
-	adrp	x0, .LANCHOR11
-	ldrb	w4, [x0, #:lo12:.LANCHOR11]
+	adrp	x2, .LANCHOR8
+	add	x2, x2, :lo12:.LANCHOR8
+	ldrb	w3, [x0, #:lo12:.LANCHOR12]
+	adrp	x0, .LANCHOR10
+	ldrb	w4, [x0, #:lo12:.LANCHOR10]
 	mov	w0, 5
 	umull	x1, w1, w0
-	adrp	x0, .LANCHOR10
-	add	x0, x0, :lo12:.LANCHOR10
+	adrp	x0, .LANCHOR9
+	add	x0, x0, :lo12:.LANCHOR9
 	add	x2, x2, x1
 	add	x1, x0, x1
 	mov	x0, 0
-.L181:
+.L189:
 	cmp	w3, w0
-	bhi	.L184
+	bhi	.L192
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x29, x30, [sp], 32
 	b	NandcWaitFlashReady
-.L184:
+.L192:
 	cmp	w4, 67
-	bne	.L182
+	bne	.L190
 	ldrsb	w5, [x1, x0]
-.L186:
+.L194:
 	add	x0, x0, 1
 	str	w5, [x20]
-	b	.L181
-.L182:
+	b	.L189
+.L190:
 	ldrsb	w5, [x2, x0]
-	b	.L186
+	b	.L194
 	.size	SandiskSetRRPara, .-SandiskSetRRPara
 	.section	.text.micron_auto_read_calibration_config,"ax",@progbits
 	.align	2
@@ -1293,16 +1406,16 @@ FlashEraseSLc2KBlocks:
 	mov	x20, x0
 	add	x23, x23, :lo12:.LANCHOR25
 	adrp	x24, .LANCHOR26
-.L190:
+.L198:
 	cmp	x20, x22
-	bne	.L195
+	bne	.L203
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L195:
+.L203:
 	mov	w1, 0
 	mov	w4, w21
 	add	x3, x29, 76
@@ -1312,15 +1425,15 @@ FlashEraseSLc2KBlocks:
 	ldrb	w1, [x23]
 	ldr	w0, [x29, 76]
 	cmp	w1, w0
-	bhi	.L191
+	bhi	.L199
 	mov	w0, -1
 	str	w0, [x20]
-.L192:
+.L200:
 	sub	w21, w21, #1
 	add	x20, x20, 56
 	and	w21, w21, 255
-	b	.L190
-.L191:
+	b	.L198
+.L199:
 	uxtw	x0, w0
 	add	x1, x24, :lo12:.LANCHOR26
 	ldrb	w19, [x1, x0]
@@ -1356,21 +1469,21 @@ FlashEraseSLc2KBlocks:
 	ldr	w1, [x29, 72]
 	mov	w0, w19
 	bl	FlashReadStatus
-	tbz	x0, 0, .L193
+	tbz	x0, 0, .L201
 	mov	w0, -1
 	str	w0, [x20]
-.L193:
+.L201:
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L194
+	bne	.L202
 	ldr	w1, [x29, 72]
 	adrp	x0, .LC1
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L194:
+.L202:
 	mov	w0, w19
 	bl	NandcFlashDeCs
-	b	.L192
+	b	.L200
 	.size	FlashEraseSLc2KBlocks, .-FlashEraseSLc2KBlocks
 	.section	.text.FlashEraseBlocks,"ax",@progbits
 	.align	2
@@ -1387,42 +1500,42 @@ FlashEraseBlocks:
 	mov	w22, w2
 	ldrb	w1, [x1, #:lo12:.LANCHOR1]
 	stp	x25, x26, [sp, 64]
-	cbnz	w1, .L201
+	cbnz	w1, .L209
 	adrp	x25, .LANCHOR23
 	mov	x19, x0
 	add	x26, x25, :lo12:.LANCHOR23
 	mov	w20, 0
-.L202:
+.L210:
 	cmp	w20, w22
 	adrp	x13, .LANCHOR25
-	bcc	.L211
-	adrp	x21, .LANCHOR8
+	bcc	.L219
+	adrp	x21, .LANCHOR15
 	adrp	x23, .LANCHOR23
 	add	x25, x13, :lo12:.LANCHOR25
-	add	x21, x21, :lo12:.LANCHOR8
+	add	x21, x21, :lo12:.LANCHOR15
 	add	x23, x23, :lo12:.LANCHOR23
 	mov	x20, 0
-.L212:
+.L220:
 	ldrb	w0, [x25]
 	cmp	w0, w20
-	bhi	.L214
+	bhi	.L222
 	adrp	x0, .LANCHOR28
 	ldr	w0, [x0, #:lo12:.LANCHOR28]
-	cbnz	w0, .L215
-.L216:
+	cbnz	w0, .L223
+.L224:
 	mov	w0, 0
-	b	.L200
-.L201:
+	b	.L208
+.L209:
 	mov	w1, w2
 	bl	FlashEraseSLc2KBlocks
-.L200:
+.L208:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L211:
+.L219:
 	mov	w12, 56
 	mov	w1, 0
 	sub	w4, w22, w20
@@ -1436,13 +1549,13 @@ FlashEraseBlocks:
 	ldrb	w1, [x13, #:lo12:.LANCHOR25]
 	ldr	w0, [x29, 92]
 	cmp	w1, w0
-	bhi	.L204
+	bhi	.L212
 	mov	w0, -1
 	str	w0, [x19, x12]
-.L205:
+.L213:
 	add	w20, w20, 1
-	b	.L202
-.L204:
+	b	.L210
+.L212:
 	adrp	x1, .LANCHOR27
 	add	x2, x25, :lo12:.LANCHOR23
 	mov	x3, 24
@@ -1452,20 +1565,20 @@ FlashEraseBlocks:
 	csel	w23, w23, wzr, ne
 	madd	x1, x1, x3, x2
 	ldr	x1, [x1, 8]
-	cbz	x1, .L207
+	cbz	x1, .L215
 	bl	FlashWaitCmdDone
-.L207:
+.L215:
 	ldp	w2, w1, [x29, 88]
 	mov	x0, 24
 	madd	x0, x1, x0, x26
 	str	w2, [x0, 4]
 	stp	x21, xzr, [x0, 8]
-	cbz	w23, .L208
+	cbz	w23, .L216
 	add	w2, w20, 1
 	mov	w3, 56
 	umaddl	x2, w2, w3, x19
 	str	x2, [x0, 16]
-.L208:
+.L216:
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w21, [x0, x1]
@@ -1475,13 +1588,13 @@ FlashEraseBlocks:
 	strb	w21, [x26, x1]
 	bl	NandcFlashCs
 	cmp	w24, 1
-	bne	.L209
-	adrp	x0, .LANCHOR8
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L209
+	bne	.L217
+	adrp	x0, .LANCHOR15
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	cbz	w0, .L217
 	mov	w0, w21
 	bl	flash_enter_slc_mode
-.L210:
+.L218:
 	ldr	w1, [x29, 92]
 	adrp	x0, .LANCHOR17
 	add	x0, x0, :lo12:.LANCHOR17
@@ -1498,37 +1611,37 @@ FlashEraseBlocks:
 	bl	FlashEraseCmd
 	mov	w0, w21
 	bl	NandcFlashDeCs
-	b	.L205
-.L209:
+	b	.L213
+.L217:
 	mov	w0, w21
 	bl	flash_exit_slc_mode
-	b	.L210
-.L214:
+	b	.L218
+.L222:
 	mov	w0, w20
 	bl	FlashWaitCmdDone
 	cmp	w24, 1
-	bne	.L213
+	bne	.L221
 	ldrb	w0, [x21]
-	cbz	w0, .L213
+	cbz	w0, .L221
 	mov	x0, 24
 	mul	x0, x20, x0
 	ldrb	w0, [x0, x23]
 	bl	flash_exit_slc_mode
-.L213:
+.L221:
 	add	x20, x20, 1
-	b	.L212
-.L215:
+	b	.L220
+.L223:
 	adrp	x0, .LANCHOR22
 	ldrb	w0, [x0, #:lo12:.LANCHOR22]
 	cmp	w0, 69
-	bne	.L216
+	bne	.L224
 	mov	w0, 56
 	umaddl	x22, w22, w0, x19
-.L217:
+.L225:
 	cmp	x22, x19
-	beq	.L216
+	beq	.L224
 	str	wzr, [x19], 56
-	b	.L217
+	b	.L225
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
 	.section	.text.FlashReadDpCmd,"ax",@progbits
 	.align	2
@@ -1562,7 +1675,7 @@ FlashReadDpCmd:
 	str	w5, [x19, 2056]
 	cmp	w1, 1
 	lsr	w1, w21, 16
-	bne	.L233
+	bne	.L241
 	str	wzr, [x19, 2052]
 	str	wzr, [x19, 2052]
 	str	w4, [x19, 2052]
@@ -1574,7 +1687,7 @@ FlashReadDpCmd:
 	str	wzr, [x19, 2056]
 	str	wzr, [x19, 2052]
 	str	wzr, [x19, 2052]
-.L236:
+.L244:
 	str	w24, [x19, 2052]
 	mov	w0, 48
 	str	w23, [x19, 2052]
@@ -1587,12 +1700,12 @@ FlashReadDpCmd:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	b	FlashSetRandomizer
-.L233:
+.L241:
 	str	w4, [x19, 2052]
 	str	w3, [x19, 2052]
 	str	w1, [x19, 2052]
 	str	w0, [x19, 2056]
-	b	.L236
+	b	.L244
 	.size	FlashReadDpCmd, .-FlashReadDpCmd
 	.section	.text.FlashDeInit,"ax",@progbits
 	.align	2
@@ -1606,26 +1719,23 @@ FlashDeInit:
 	bl	NandcWaitFlashReady
 	bl	FlashSetReadRetryDefault
 	adrp	x0, .LANCHOR29
-	ldr	w1, [x0, #:lo12:.LANCHOR29]
-	mov	w0, 12336
-	movk	w0, 0x5638, lsl 16
-	cmp	w1, w0
-	bne	.L238
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	cbz	w0, .L246
 	mov	w0, 0
 	bl	flash_enter_slc_mode
-.L238:
+.L247:
 	adrp	x19, .LANCHOR30
 	ldrb	w0, [x19, #:lo12:.LANCHOR30]
-	cbz	w0, .L239
+	cbz	w0, .L248
 	adrp	x0, .LANCHOR24
 	ldrb	w0, [x0, #:lo12:.LANCHOR24]
-	tbz	x0, 0, .L239
+	tbz	x0, 0, .L248
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
 	bl	NandcSetMode
 	strb	wzr, [x19, #:lo12:.LANCHOR30]
-.L239:
+.L248:
 	adrp	x0, .LANCHOR6
 	ldr	x0, [x0, #:lo12:.LANCHOR6]
 	str	wzr, [x0, 336]
@@ -1633,6 +1743,10 @@ FlashDeInit:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
+.L246:
+	mov	w0, 0
+	bl	flash_exit_slc_mode
+	b	.L247
 	.size	FlashDeInit, .-FlashDeInit
 	.section	.text.NandcRandmzSel,"ax",@progbits
 	.align	2
@@ -1653,21 +1767,21 @@ NandcRandmzSel:
 NandcTimeCfg:
 	cmp	w0, 35
 	adrp	x1, .LANCHOR19
-	bhi	.L249
+	bhi	.L258
 	ldr	x0, [x1, #:lo12:.LANCHOR19]
 	mov	w1, 4193
-.L252:
+.L261:
 	str	w1, [x0, 4]
 	ret
-.L249:
+.L258:
 	cmp	w0, 99
 	ldr	x0, [x1, #:lo12:.LANCHOR19]
-	bls	.L251
+	bls	.L260
 	mov	w1, 8322
-	b	.L252
-.L251:
+	b	.L261
+.L260:
 	mov	w1, 4225
-	b	.L252
+	b	.L261
 	.size	NandcTimeCfg, .-NandcTimeCfg
 	.section	.text.FlashTimingCfg,"ax",@progbits
 	.align	2
@@ -1692,24 +1806,24 @@ NandcBchSel:
 	adrp	x1, .LANCHOR32
 	str	w0, [x1, #:lo12:.LANCHOR32]
 	mov	w1, 4096
-	bne	.L255
-.L258:
+	bne	.L264
+.L267:
 	and	w1, w1, -17
-.L256:
+.L265:
 	orr	w1, w1, 1
 	str	w1, [x2, 12]
 	ret
-.L255:
+.L264:
 	cmp	w0, 24
-	bne	.L257
+	bne	.L266
 	orr	w1, w1, 16
-	b	.L256
-.L257:
+	b	.L265
+.L266:
 	orr	w1, w1, 262144
 	cmp	w0, 40
 	orr	w1, w1, 16
-	bne	.L256
-	b	.L258
+	bne	.L265
+	b	.L267
 	.size	NandcBchSel, .-NandcBchSel
 	.section	.text.FlashBchSel,"ax",@progbits
 	.align	2
@@ -1791,11 +1905,11 @@ NandcSendDumpDataStart:
 	.type	NandcSendDumpDataDone, %function
 NandcSendDumpDataDone:
 	sub	sp, sp, #16
-.L272:
+.L281:
 	ldr	w1, [x0, 8]
 	str	w1, [sp, 8]
 	ldr	w1, [sp, 8]
-	tbz	x1, 20, .L272
+	tbz	x1, 20, .L281
 	add	sp, sp, 16
 	ret
 	.size	NandcSendDumpDataDone, .-NandcSendDumpDataDone
@@ -1833,7 +1947,7 @@ NandcXferStart:
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	bfi	w19, w3, 4, 1
 	cmp	w0, 3
-	bls	.L277
+	bls	.L286
 	ldr	w0, [x21, 16]
 	cmp	x5, 0
 	str	w0, [x29, 88]
@@ -1841,11 +1955,11 @@ NandcXferStart:
 	ldr	w0, [x29, 88]
 	and	w0, w0, -5
 	str	w0, [x29, 88]
-	beq	.L278
+	beq	.L287
 	and	w2, w2, 255
 	adrp	x20, .LANCHOR35
-	cbnz	w24, .L279
-.L287:
+	cbnz	w24, .L288
+.L296:
 	ldr	x0, [x20, #:lo12:.LANCHOR35]
 	add	w2, w2, 1
 	cmp	x4, 0
@@ -1887,12 +2001,12 @@ NandcXferStart:
 	ldr	w0, [x29, 88]
 	orr	w0, w0, 448
 	str	w0, [x29, 88]
-	bne	.L288
+	bne	.L297
 	ldr	w0, [x29, 88]
 	mov	w1, 2
 	bfi	w0, w1, 3, 3
 	str	w0, [x29, 88]
-.L288:
+.L297:
 	ldr	w0, [x29, 88]
 	cmp	w24, 0
 	cset	w1, eq
@@ -1904,10 +2018,10 @@ NandcXferStart:
 	ldr	w0, [x29, 88]
 	orr	w0, w0, 1
 	str	w0, [x29, 88]
-.L278:
+.L287:
 	ldr	w0, [x29, 88]
 	str	w0, [x21, 16]
-.L277:
+.L286:
 	str	w22, [x21, 12]
 	str	w19, [x21, 8]
 	orr	w19, w19, 4
@@ -1918,7 +2032,7 @@ NandcXferStart:
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L279:
+.L288:
 	adrp	x0, .LANCHOR32
 	mov	w6, 64
 	lsr	w11, w2, 1
@@ -1932,24 +2046,24 @@ NandcXferStart:
 	csel	w6, w6, w0, cc
 	add	x0, x20, :lo12:.LANCHOR35
 	ldr	x10, [x0, 8]
-.L283:
+.L292:
 	cmp	w3, w11
-	bcs	.L287
+	bcs	.L296
 	lsr	w0, w7, 2
 	lsl	w0, w0, 2
-	cbz	x5, .L284
+	cbz	x5, .L293
 	ldrh	w13, [x1]
 	add	x1, x1, 4
 	ldrh	w8, [x1, -2]
 	orr	x8, x13, x8, lsl 16
 	str	w8, [x10, x0]
-.L285:
+.L294:
 	add	w3, w3, 1
 	add	w7, w7, w6
-	b	.L283
-.L284:
+	b	.L292
+.L293:
 	str	w12, [x10, x0]
-	b	.L285
+	b	.L294
 	.size	NandcXferStart, .-NandcXferStart
 	.section	.text.NandcXferComp,"ax",@progbits
 	.align	2
@@ -1965,57 +2079,57 @@ NandcXferComp:
 	adrp	x0, .LANCHOR34
 	ldr	w2, [x0, #:lo12:.LANCHOR34]
 	cmp	w2, 3
-	bls	.L316
+	bls	.L325
 	ldr	w0, [x3, 16]
-	tbz	x0, 2, .L316
+	tbz	x0, 2, .L325
 	ldr	w0, [x3, 16]
-	tbz	x0, 1, .L304
+	tbz	x0, 1, .L313
 	ldr	w0, [x3, 8]
 	str	w0, [x29, 16]
-.L299:
+.L308:
 	ldr	w1, [x3, 28]
 	ldr	w0, [x29, 16]
 	ubfx	x1, x1, 16, 5
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0
-	bge	.L300
+	bge	.L309
 	cmp	w2, 5
-	bls	.L299
+	bls	.L308
 	ldr	w0, [x3]
 	str	w0, [x29, 24]
 	ldr	w0, [x29, 24]
-	tbz	x0, 13, .L299
+	tbz	x0, 13, .L308
 	ldr	w0, [x29, 24]
-	tbz	x0, 17, .L299
-.L300:
+	tbz	x0, 17, .L308
+.L309:
 	adrp	x0, .LANCHOR35+40
 	str	wzr, [x0, #:lo12:.LANCHOR35+40]
-.L295:
+.L304:
 	ldp	x29, x30, [sp], 32
 	ret
-.L304:
+.L313:
 	ldr	w0, [x3, 8]
 	str	w0, [x29, 16]
 	ldr	w0, [x29, 16]
-	tbz	x0, 20, .L304
+	tbz	x0, 20, .L313
 	adrp	x0, .LANCHOR36
 	mov	x4, x0
 	ldr	w1, [x0, #:lo12:.LANCHOR36]
-	cbz	w1, .L305
+	cbz	w1, .L314
 	mov	x0, x3
 	bl	NandcSendDumpDataStart
-.L305:
+.L314:
 	ldr	w0, [x4, #:lo12:.LANCHOR36]
-	cbz	w0, .L300
+	cbz	w0, .L309
 	mov	x0, x3
 	bl	NandcSendDumpDataDone
-	b	.L300
-.L316:
+	b	.L309
+.L325:
 	ldr	w0, [x3, 8]
 	str	w0, [x29, 16]
 	ldr	w0, [x29, 16]
-	tbz	x0, 20, .L316
-	b	.L295
+	tbz	x0, 20, .L325
+	b	.L304
 	.size	NandcXferComp, .-NandcXferComp
 	.section	.text.Ftl_log2,"ax",@progbits
 	.align	2
@@ -2024,16 +2138,16 @@ NandcXferComp:
 Ftl_log2:
 	mov	w2, 1
 	mov	w1, 0
-.L325:
+.L334:
 	cmp	w2, w0
-	bls	.L326
+	bls	.L335
 	sub	w0, w1, #1
 	ret
-.L326:
+.L335:
 	add	w1, w1, 1
 	lsl	w2, w2, 1
 	and	w1, w1, 65535
-	b	.L325
+	b	.L334
 	.size	Ftl_log2, .-Ftl_log2
 	.section	.text.FtlPrintInfo,"ax",@progbits
 	.align	2
@@ -2096,28 +2210,28 @@ FtlConstantsInit:
 	strh	w2, [x4, #:lo12:.LANCHOR45]
 	strh	w8, [x6, #:lo12:.LANCHOR41]
 	str	x19, [sp, 16]
-.L330:
+.L339:
 	strb	w3, [x3, x7]
 	add	x3, x3, 1
 	cmp	x3, 32
-	bne	.L330
+	bne	.L339
 	ldrh	w7, [x5, 20]
 	ldrb	w3, [x5, 15]
 	cmp	w7, w3
-	bcs	.L331
+	bcs	.L340
 	and	w13, w0, 255
 	mul	w15, w0, w2
 	ubfiz	w14, w13, 1, 7
 	add	x1, x1, :lo12:.LANCHOR47
 	mov	w7, 0
-.L332:
+.L341:
 	cmp	w7, w0
-	bcs	.L334
+	bcs	.L343
 	and	w3, w7, 255
 	mov	w10, w7
 	mov	w12, 0
-	b	.L335
-.L333:
+	b	.L344
+.L342:
 	add	w16, w15, w10
 	strb	w3, [x1, w10, uxtw]
 	add	w17, w13, w3
@@ -2126,223 +2240,219 @@ FtlConstantsInit:
 	and	w3, w3, 255
 	add	w10, w10, w0
 	strb	w17, [x1, x16]
-.L335:
+.L344:
 	cmp	w12, w2
-	bcc	.L333
+	bcc	.L342
 	add	w7, w7, 1
-	b	.L332
-.L334:
+	b	.L341
+.L343:
 	ubfiz	w2, w2, 1, 15
 	lsr	w8, w8, 1
 	strh	w2, [x4, #:lo12:.LANCHOR45]
 	strh	w8, [x6, #:lo12:.LANCHOR41]
-.L331:
+.L340:
 	adrp	x1, .LANCHOR48
 	adrp	x13, .LANCHOR49
 	mov	w2, 5
 	cmp	w11, 1
 	strh	w2, [x1, #:lo12:.LANCHOR48]
 	strh	wzr, [x13, #:lo12:.LANCHOR49]
-	bne	.L336
+	bne	.L345
 	strh	w11, [x1, #:lo12:.LANCHOR48]
-.L336:
+.L345:
 	adrp	x8, .LANCHOR50
 	mov	w1, 4352
 	strh	w1, [x8, #:lo12:.LANCHOR50]
 	adrp	x1, .LANCHOR1
 	ldrb	w11, [x1, #:lo12:.LANCHOR1]
-	cbz	w11, .L337
+	cbz	w11, .L346
 	mov	w1, 384
 	strh	w1, [x8, #:lo12:.LANCHOR50]
-.L337:
+.L346:
 	ldrh	w4, [x4, #:lo12:.LANCHOR45]
 	adrp	x1, .LANCHOR38
 	ldrh	w3, [x6, #:lo12:.LANCHOR41]
+	adrp	x7, .LANCHOR52
+	ldrh	w19, [x5, 16]
+	adrp	x15, .LANCHOR55
+	ldrh	w10, [x5, 20]
 	mul	w4, w0, w4
+	ldrh	w14, [x5, 18]
 	mul	w0, w0, w3
+	strh	w19, [x7, #:lo12:.LANCHOR52]
 	and	w4, w4, 65535
 	strh	w4, [x1, #:lo12:.LANCHOR38]
 	adrp	x1, .LANCHOR51
-	and	w0, w0, 65535
+	strh	w10, [x15, #:lo12:.LANCHOR55]
 	strh	w0, [x1, #:lo12:.LANCHOR51]
-	bl	Ftl_log2
-	ldrh	w19, [x5, 16]
-	adrp	x1, .LANCHOR52
-	ldrh	w10, [x5, 20]
-	adrp	x7, .LANCHOR53
-	strh	w0, [x1, #:lo12:.LANCHOR52]
-	adrp	x0, .LANCHOR54
-	ldrh	w14, [x5, 18]
-	adrp	x15, .LANCHOR56
 	mul	w1, w4, w19
-	strh	w14, [x0, #:lo12:.LANCHOR54]
-	adrp	x0, .LANCHOR55
-	strh	w19, [x7, #:lo12:.LANCHOR53]
-	strh	w10, [x15, #:lo12:.LANCHOR56]
-	strh	w1, [x0, #:lo12:.LANCHOR55]
+	adrp	x0, .LANCHOR53
+	strh	w14, [x0, #:lo12:.LANCHOR53]
+	adrp	x0, .LANCHOR54
+	strh	w1, [x0, #:lo12:.LANCHOR54]
 	mov	w0, w10
 	bl	Ftl_log2
 	and	w12, w0, 65535
-	adrp	x6, .LANCHOR57
+	adrp	x6, .LANCHOR56
 	ubfiz	w2, w10, 9, 7
 	ldrh	w1, [x5, 26]
 	cmp	w3, 1024
-	strh	w0, [x6, #:lo12:.LANCHOR57]
+	strh	w0, [x6, #:lo12:.LANCHOR56]
+	adrp	x0, .LANCHOR57
+	strh	w2, [x0, #:lo12:.LANCHOR57]
 	adrp	x0, .LANCHOR58
+	ubfx	w2, w2, 8, 8
 	strh	w2, [x0, #:lo12:.LANCHOR58]
 	adrp	x0, .LANCHOR59
-	ubfx	w2, w2, 8, 8
-	strh	w2, [x0, #:lo12:.LANCHOR59]
-	adrp	x0, .LANCHOR60
-	strh	w1, [x0, #:lo12:.LANCHOR60]
+	strh	w1, [x0, #:lo12:.LANCHOR59]
 	adrp	x0, .LANCHOR43
 	mul	w1, w4, w3
 	str	w1, [x0, #:lo12:.LANCHOR43]
-	bls	.L338
+	bls	.L347
 	and	w0, w3, 255
 	strh	w0, [x13, #:lo12:.LANCHOR49]
-.L338:
+.L347:
 	ldrh	w0, [x13, #:lo12:.LANCHOR49]
-	adrp	x1, .LANCHOR61
+	adrp	x1, .LANCHOR60
 	sub	w0, w3, w0
 	mul	w0, w0, w4
 	mul	w0, w0, w10
 	mul	w0, w0, w19
 	asr	w0, w0, 11
-	str	w0, [x1, #:lo12:.LANCHOR61]
+	str	w0, [x1, #:lo12:.LANCHOR60]
 	ldrh	w0, [x8, #:lo12:.LANCHOR50]
 	mul	w1, w14, w10
-	adrp	x10, .LANCHOR62
+	adrp	x10, .LANCHOR61
 	lsl	w0, w0, 3
 	sdiv	w0, w0, w1
 	and	w0, w0, 65535
 	cmp	w0, 4
-	bls	.L339
-.L355:
-	strh	w0, [x10, #:lo12:.LANCHOR62]
-	cbz	w11, .L341
+	bls	.L348
+.L364:
+	strh	w0, [x10, #:lo12:.LANCHOR61]
+	cbz	w11, .L350
 	mov	w0, 640
 	strh	w0, [x8, #:lo12:.LANCHOR50]
-.L341:
+.L350:
 	ldrh	w0, [x8, #:lo12:.LANCHOR50]
-	adrp	x1, .LANCHOR63
+	adrp	x1, .LANCHOR62
 	lsl	w3, w3, 6
 	cmp	w4, 1
 	adrp	x8, .LANCHOR37
 	asr	w0, w0, w12
 	add	w0, w0, 2
-	strh	w0, [x1, #:lo12:.LANCHOR63]
+	strh	w0, [x1, #:lo12:.LANCHOR62]
 	add	w0, w12, 9
-	adrp	x1, .LANCHOR65
+	adrp	x1, .LANCHOR64
 	asr	w3, w3, w0
-	adrp	x0, .LANCHOR64
-	strh	w3, [x0, #:lo12:.LANCHOR64]
+	adrp	x0, .LANCHOR63
+	strh	w3, [x0, #:lo12:.LANCHOR63]
 	and	w3, w3, 65535
 	mul	w0, w4, w3
 	add	w3, w3, 8
-	str	w0, [x1, #:lo12:.LANCHOR65]
-	ldrh	w0, [x10, #:lo12:.LANCHOR62]
+	str	w0, [x1, #:lo12:.LANCHOR64]
+	ldrh	w0, [x10, #:lo12:.LANCHOR61]
 	udiv	w0, w0, w4
 	mov	x4, x1
 	add	w3, w0, w3
-	beq	.L342
-.L356:
+	beq	.L351
+.L365:
 	str	w3, [x8, #:lo12:.LANCHOR37]
 	ldrh	w0, [x8, #:lo12:.LANCHOR37]
 	bl	FtlSysBlkNumInit
 	ldr	w1, [x8, #:lo12:.LANCHOR37]
-	adrp	x0, .LANCHOR66
+	adrp	x0, .LANCHOR65
 	mov	w2, 24
-	str	w1, [x0, #:lo12:.LANCHOR66]
+	str	w1, [x0, #:lo12:.LANCHOR65]
 	adrp	x0, .LANCHOR42
-	ldrh	w1, [x7, #:lo12:.LANCHOR53]
+	ldrh	w1, [x7, #:lo12:.LANCHOR52]
 	ldr	w0, [x0, #:lo12:.LANCHOR42]
 	lsl	w0, w0, 2
 	mul	w0, w0, w1
-	ldrh	w1, [x6, #:lo12:.LANCHOR57]
-	adrp	x6, .LANCHOR8
+	ldrh	w1, [x6, #:lo12:.LANCHOR56]
+	adrp	x6, .LANCHOR15
 	add	w1, w1, 9
-	ldrb	w6, [x6, #:lo12:.LANCHOR8]
+	ldrb	w6, [x6, #:lo12:.LANCHOR15]
 	lsr	w0, w0, w1
-	adrp	x1, .LANCHOR67
+	adrp	x1, .LANCHOR66
 	add	w0, w0, 2
 	and	w0, w0, 65535
-	strh	w0, [x1, #:lo12:.LANCHOR67]
+	strh	w0, [x1, #:lo12:.LANCHOR66]
+	adrp	x1, .LANCHOR67
+	strh	w2, [x1, #:lo12:.LANCHOR67]
 	adrp	x1, .LANCHOR68
-	strh	w2, [x1, #:lo12:.LANCHOR68]
-	adrp	x1, .LANCHOR69
-	ldrh	w2, [x10, #:lo12:.LANCHOR62]
-	str	wzr, [x1, #:lo12:.LANCHOR69]
+	ldrh	w2, [x10, #:lo12:.LANCHOR61]
+	str	wzr, [x1, #:lo12:.LANCHOR68]
 	add	w1, w2, 3
-	strh	w1, [x10, #:lo12:.LANCHOR62]
-	ldr	w1, [x4, #:lo12:.LANCHOR65]
+	strh	w1, [x10, #:lo12:.LANCHOR61]
+	ldr	w1, [x4, #:lo12:.LANCHOR64]
 	add	w3, w1, 3
-	str	w3, [x4, #:lo12:.LANCHOR65]
-	cbz	w6, .L344
+	str	w3, [x4, #:lo12:.LANCHOR64]
+	cbz	w6, .L353
 	add	w1, w1, 5
 	add	w2, w2, 4
-	strh	w2, [x10, #:lo12:.LANCHOR62]
-.L357:
-	str	w1, [x4, #:lo12:.LANCHOR65]
-.L345:
+	strh	w2, [x10, #:lo12:.LANCHOR61]
+.L366:
+	str	w1, [x4, #:lo12:.LANCHOR64]
+.L354:
 	adrp	x1, .LANCHOR40
-	adrp	x3, .LANCHOR70
+	adrp	x3, .LANCHOR69
 	ldrh	w1, [x1, #:lo12:.LANCHOR40]
-	strh	wzr, [x3, #:lo12:.LANCHOR70]
+	strh	wzr, [x3, #:lo12:.LANCHOR69]
 	lsl	w2, w1, 1
 	lsr	w1, w1, 3
 	add	w2, w2, 48
 	add	w1, w1, 4
 	add	w0, w2, w0, lsl 2
 	add	w0, w0, w1
-	ldrh	w1, [x15, #:lo12:.LANCHOR56]
+	ldrh	w1, [x15, #:lo12:.LANCHOR55]
 	cmp	w0, w1, lsl 9
-	bcs	.L346
+	bcs	.L355
 	mov	w0, 1
-	strh	w0, [x3, #:lo12:.LANCHOR70]
-.L346:
+	strh	w0, [x3, #:lo12:.LANCHOR69]
+.L355:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L339:
+.L348:
 	mov	w0, 4
-	b	.L355
-.L342:
+	b	.L364
+.L351:
 	add	w3, w3, 4
-	b	.L356
-.L344:
+	b	.L365
+.L353:
 	cmp	w3, 7
-	bhi	.L345
+	bhi	.L354
 	mov	w1, 8
-	b	.L357
+	b	.L366
 	.size	FtlConstantsInit, .-FtlConstantsInit
 	.section	.text.IsBlkInVendorPart,"ax",@progbits
 	.align	2
 	.global	IsBlkInVendorPart
 	.type	IsBlkInVendorPart, %function
 IsBlkInVendorPart:
-	adrp	x1, .LANCHOR71
+	adrp	x1, .LANCHOR70
 	and	w0, w0, 65535
-	ldrh	w1, [x1, #:lo12:.LANCHOR71]
-	cbz	w1, .L362
-	adrp	x1, .LANCHOR62
-	ldrh	w2, [x1, #:lo12:.LANCHOR62]
-	adrp	x1, .LANCHOR72
-	ldr	x3, [x1, #:lo12:.LANCHOR72]
+	ldrh	w1, [x1, #:lo12:.LANCHOR70]
+	cbz	w1, .L371
+	adrp	x1, .LANCHOR61
+	ldrh	w2, [x1, #:lo12:.LANCHOR61]
+	adrp	x1, .LANCHOR71
+	ldr	x3, [x1, #:lo12:.LANCHOR71]
 	mov	x1, 0
-.L360:
+.L369:
 	cmp	w2, w1, uxth
-	bhi	.L361
-.L362:
+	bhi	.L370
+.L371:
 	mov	w0, 0
 	ret
-.L361:
+.L370:
 	add	x1, x1, 1
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w0
-	bne	.L360
+	bne	.L369
 	mov	w0, 1
 	ret
 	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
@@ -2351,8 +2461,8 @@ IsBlkInVendorPart:
 	.global	FtlGetCap
 	.type	FtlGetCap, %function
 FtlGetCap:
-	adrp	x0, .LANCHOR69
-	ldr	w0, [x0, #:lo12:.LANCHOR69]
+	adrp	x0, .LANCHOR68
+	ldr	w0, [x0, #:lo12:.LANCHOR68]
 	ret
 	.size	FtlGetCap, .-FtlGetCap
 	.section	.text.FtlGetCapacity,"ax",@progbits
@@ -2360,8 +2470,8 @@ FtlGetCap:
 	.global	FtlGetCapacity
 	.type	FtlGetCapacity, %function
 FtlGetCapacity:
-	adrp	x0, .LANCHOR69
-	ldr	w0, [x0, #:lo12:.LANCHOR69]
+	adrp	x0, .LANCHOR68
+	ldr	w0, [x0, #:lo12:.LANCHOR68]
 	ret
 	.size	FtlGetCapacity, .-FtlGetCapacity
 	.section	.text.ftl_get_density,"ax",@progbits
@@ -2369,8 +2479,8 @@ FtlGetCapacity:
 	.global	ftl_get_density
 	.type	ftl_get_density, %function
 ftl_get_density:
-	adrp	x0, .LANCHOR69
-	ldr	w0, [x0, #:lo12:.LANCHOR69]
+	adrp	x0, .LANCHOR68
+	ldr	w0, [x0, #:lo12:.LANCHOR68]
 	ret
 	.size	ftl_get_density, .-ftl_get_density
 	.section	.text.FtlGetLpn,"ax",@progbits
@@ -2378,8 +2488,8 @@ ftl_get_density:
 	.global	FtlGetLpn
 	.type	FtlGetLpn, %function
 FtlGetLpn:
-	adrp	x0, .LANCHOR73
-	ldr	w0, [x0, #:lo12:.LANCHOR73]
+	adrp	x0, .LANCHOR72
+	ldr	w0, [x0, #:lo12:.LANCHOR72]
 	ret
 	.size	FtlGetLpn, .-FtlGetLpn
 	.section	.text.FtlGetCurEraseBlock,"ax",@progbits
@@ -2389,8 +2499,8 @@ FtlGetLpn:
 FtlGetCurEraseBlock:
 	adrp	x0, .LANCHOR38
 	ldrh	w1, [x0, #:lo12:.LANCHOR38]
-	adrp	x0, .LANCHOR74
-	ldr	w0, [x0, #:lo12:.LANCHOR74]
+	adrp	x0, .LANCHOR73
+	ldr	w0, [x0, #:lo12:.LANCHOR73]
 	mul	w0, w1, w0
 	ret
 	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
@@ -2418,8 +2528,8 @@ FtlBbmMapBadBlock:
 	add	x29, sp, 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR75
-	add	x19, x19, :lo12:.LANCHOR75
+	adrp	x19, .LANCHOR74
+	add	x19, x19, :lo12:.LANCHOR74
 	udiv	w3, w1, w0
 	and	w2, w3, 65535
 	msub	w3, w3, w0, w1
@@ -2454,8 +2564,8 @@ FtlBbmIsBadBlock:
 	ldrh	w1, [x1, #:lo12:.LANCHOR51]
 	udiv	w2, w0, w1
 	msub	w0, w2, w1, w0
-	adrp	x1, .LANCHOR75
-	add	x1, x1, :lo12:.LANCHOR75
+	adrp	x1, .LANCHOR74
+	add	x1, x1, :lo12:.LANCHOR74
 	add	x2, x1, x2, uxth 3
 	and	w0, w0, 65535
 	ubfx	x3, x0, 5, 11
@@ -2529,12 +2639,12 @@ P2V_block_in_plane:
 ftl_cmp_data_ver:
 	cmp	w0, w1
 	mov	w2, -2147483648
-	bls	.L378
+	bls	.L387
 	sub	w1, w0, w1
 	cmp	w1, w2
 	cset	w0, ls
 	ret
-.L378:
+.L387:
 	sub	w1, w1, w0
 	cmp	w1, w2
 	cset	w0, hi
@@ -2545,8 +2655,8 @@ ftl_cmp_data_ver:
 	.global	FtlFreeSysBlkQueueEmpty
 	.type	FtlFreeSysBlkQueueEmpty, %function
 FtlFreeSysBlkQueueEmpty:
-	adrp	x0, .LANCHOR76+6
-	ldrh	w0, [x0, #:lo12:.LANCHOR76+6]
+	adrp	x0, .LANCHOR75+6
+	ldrh	w0, [x0, #:lo12:.LANCHOR75+6]
 	cmp	w0, 0
 	cset	w0, eq
 	ret
@@ -2556,8 +2666,8 @@ FtlFreeSysBlkQueueEmpty:
 	.global	FtlFreeSysBlkQueueFull
 	.type	FtlFreeSysBlkQueueFull, %function
 FtlFreeSysBlkQueueFull:
-	adrp	x0, .LANCHOR76+6
-	ldrh	w0, [x0, #:lo12:.LANCHOR76+6]
+	adrp	x0, .LANCHOR75+6
+	ldrh	w0, [x0, #:lo12:.LANCHOR75+6]
 	cmp	w0, 1024
 	cset	w0, eq
 	ret
@@ -2575,40 +2685,40 @@ FtlFreeSysBlkQueueIn:
 	sub	w2, w20, #1
 	mov	w0, 65533
 	cmp	w0, w2, uxth
-	bcc	.L382
-	adrp	x0, .LANCHOR76
-	add	x2, x0, :lo12:.LANCHOR76
+	bcc	.L391
+	adrp	x0, .LANCHOR75
+	add	x2, x0, :lo12:.LANCHOR75
 	mov	x19, x0
 	ldrh	w2, [x2, 6]
 	cmp	w2, 1024
-	beq	.L382
+	beq	.L391
 	and	w1, w1, 65535
-	cbz	w1, .L384
-	adrp	x0, .LANCHOR77
-	ldr	w0, [x0, #:lo12:.LANCHOR77]
-	cbnz	w0, .L384
+	cbz	w1, .L393
+	adrp	x0, .LANCHOR76
+	ldr	w0, [x0, #:lo12:.LANCHOR76]
+	cbnz	w0, .L393
 	mov	w0, w20
 	bl	P2V_block_in_plane
 	and	w21, w0, 65535
-	adrp	x0, .LANCHOR78
+	adrp	x0, .LANCHOR77
 	lsl	w1, w20, 10
 	mov	w2, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR78]
+	ldr	x0, [x0, #:lo12:.LANCHOR77]
 	str	w1, [x0, 4]
 	mov	w1, w2
 	bl	FlashEraseBlocks
-	adrp	x1, .LANCHOR79
+	adrp	x1, .LANCHOR78
 	ubfiz	x0, x21, 1, 16
-	ldr	x2, [x1, #:lo12:.LANCHOR79]
+	ldr	x2, [x1, #:lo12:.LANCHOR78]
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-	adrp	x1, .LANCHOR80
-	ldr	w0, [x1, #:lo12:.LANCHOR80]
+	adrp	x1, .LANCHOR79
+	ldr	w0, [x1, #:lo12:.LANCHOR79]
 	add	w0, w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR80]
-.L384:
-	add	x0, x19, :lo12:.LANCHOR76
+	str	w0, [x1, #:lo12:.LANCHOR79]
+.L393:
+	add	x0, x19, :lo12:.LANCHOR75
 	ldrh	w1, [x0, 6]
 	add	w1, w1, 1
 	strh	w1, [x0, 6]
@@ -2618,7 +2728,7 @@ FtlFreeSysBlkQueueIn:
 	and	w1, w1, 1023
 	strh	w1, [x0, 4]
 	strh	w20, [x2, 8]
-.L382:
+.L391:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -2629,27 +2739,27 @@ FtlFreeSysBlkQueueIn:
 	.global	FtlFreeSysBLkSort
 	.type	FtlFreeSysBLkSort, %function
 FtlFreeSysBLkSort:
-	adrp	x0, .LANCHOR76
-	add	x1, x0, :lo12:.LANCHOR76
+	adrp	x0, .LANCHOR75
+	add	x1, x0, :lo12:.LANCHOR75
 	ldrh	w2, [x1, 6]
-	cbz	w2, .L392
-	adrp	x2, .LANCHOR81+28
+	cbz	w2, .L401
+	adrp	x2, .LANCHOR80+28
 	ldrh	w3, [x1, 2]
 	mov	w6, 0
 	mov	w4, 0
-	ldrh	w5, [x2, #:lo12:.LANCHOR81+28]
+	ldrh	w5, [x2, #:lo12:.LANCHOR80+28]
 	ldrh	w2, [x1, 4]
 	and	w5, w5, 31
-.L394:
+.L403:
 	cmp	w5, w4
-	bgt	.L395
-	cbz	w6, .L392
-	add	x0, x0, :lo12:.LANCHOR76
+	bgt	.L404
+	cbz	w6, .L401
+	add	x0, x0, :lo12:.LANCHOR75
 	strh	w3, [x0, 2]
 	strh	w2, [x0, 4]
-.L392:
+.L401:
 	ret
-.L395:
+.L404:
 	add	x6, x1, x3, sxtw 1
 	add	w4, w4, 1
 	add	w3, w3, 1
@@ -2661,7 +2771,7 @@ FtlFreeSysBLkSort:
 	mov	w6, 1
 	add	w2, w2, w6
 	and	w2, w2, 1023
-	b	.L394
+	b	.L403
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
 	.section	.text.FtlFreeSysBlkQueueOut,"ax",@progbits
 	.align	2
@@ -2671,16 +2781,16 @@ FtlFreeSysBlkQueueOut:
 	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR76
-	add	x19, x19, :lo12:.LANCHOR76
+	adrp	x19, .LANCHOR75
+	add	x19, x19, :lo12:.LANCHOR75
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR77
+	adrp	x22, .LANCHOR76
 	mov	x23, x19
-	add	x22, x22, :lo12:.LANCHOR77
-.L402:
+	add	x22, x22, :lo12:.LANCHOR76
+.L411:
 	ldrh	w1, [x19, 6]
-	cbz	w1, .L403
+	cbz	w1, .L412
 	ldrh	w0, [x19, 2]
 	sub	w1, w1, #1
 	strh	w1, [x19, 6]
@@ -2690,55 +2800,55 @@ FtlFreeSysBlkQueueOut:
 	strh	w0, [x19, 2]
 	ldr	w0, [x22]
 	ldrh	w20, [x2, 8]
-	cbnz	w0, .L404
+	cbnz	w0, .L413
 	mov	w0, w20
 	bl	P2V_block_in_plane
-	adrp	x1, .LANCHOR78
+	adrp	x1, .LANCHOR77
 	and	w21, w0, 65535
 	lsl	w2, w20, 10
 	mov	x24, x1
-	ldr	x0, [x1, #:lo12:.LANCHOR78]
+	ldr	x0, [x1, #:lo12:.LANCHOR77]
 	str	w2, [x0, 4]
-	adrp	x2, .LANCHOR8
-	ldrb	w2, [x2, #:lo12:.LANCHOR8]
-	cbz	w2, .L405
+	adrp	x2, .LANCHOR15
+	ldrb	w2, [x2, #:lo12:.LANCHOR15]
+	cbz	w2, .L414
 	mov	w2, 1
 	mov	w1, 0
 	bl	FlashEraseBlocks
-.L405:
-	ldr	x0, [x24, #:lo12:.LANCHOR78]
+.L414:
+	ldr	x0, [x24, #:lo12:.LANCHOR77]
 	mov	w2, 1
 	mov	w1, w2
 	bl	FlashEraseBlocks
-	adrp	x1, .LANCHOR79
+	adrp	x1, .LANCHOR78
 	ubfiz	x0, x21, 1, 16
-	ldr	x2, [x1, #:lo12:.LANCHOR79]
+	ldr	x2, [x1, #:lo12:.LANCHOR78]
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-	adrp	x1, .LANCHOR80
-	ldr	w0, [x1, #:lo12:.LANCHOR80]
+	adrp	x1, .LANCHOR79
+	ldr	w0, [x1, #:lo12:.LANCHOR79]
 	add	w0, w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR80]
-.L404:
+	str	w0, [x1, #:lo12:.LANCHOR79]
+.L413:
 	sub	w0, w20, #1
 	mov	w1, 65533
 	cmp	w1, w0, uxth
-	bcs	.L407
+	bcs	.L416
 	ldrh	w2, [x23, 6]
 	mov	w1, w20
 	adrp	x0, .LC4
 	add	x0, x0, :lo12:.LC4
 	bl	printf
-	b	.L402
-.L403:
+	b	.L411
+.L412:
 	adrp	x0, .LC3
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC3
 	bl	printf
-.L406:
-	b	.L406
-.L407:
+.L415:
+	b	.L415
+.L416:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -2752,10 +2862,10 @@ FtlFreeSysBlkQueueOut:
 	.type	test_node_in_list, %function
 test_node_in_list:
 	ldr	x2, [x0]
-	adrp	x0, .LANCHOR82
+	adrp	x0, .LANCHOR81
 	mov	x4, -6148914691236517206
 	and	w1, w1, 65535
-	ldr	x3, [x0, #:lo12:.LANCHOR82]
+	ldr	x3, [x0, #:lo12:.LANCHOR81]
 	movk	x4, 0xaaab, lsl 0
 	mov	w5, 65535
 	sub	x0, x2, x3
@@ -2763,18 +2873,18 @@ test_node_in_list:
 	mul	x0, x0, x4
 	mov	w4, 6
 	and	w0, w0, 65535
-.L414:
+.L423:
 	cmp	w0, w1
-	beq	.L415
+	beq	.L424
 	ldrh	w0, [x2]
 	cmp	w0, w5
-	beq	.L416
+	beq	.L425
 	umaddl	x2, w0, w4, x3
-	b	.L414
-.L415:
+	b	.L423
+.L424:
 	mov	w0, 1
 	ret
-.L416:
+.L425:
 	mov	w0, 0
 	ret
 	.size	test_node_in_list, .-test_node_in_list
@@ -2787,30 +2897,30 @@ insert_data_list:
 	and	w0, w0, 65535
 	ldrh	w14, [x1, #:lo12:.LANCHOR40]
 	cmp	w14, w0
-	bls	.L433
-	adrp	x1, .LANCHOR82
+	bls	.L442
+	adrp	x1, .LANCHOR81
 	mov	w3, 6
-	ldr	x6, [x1, #:lo12:.LANCHOR82]
+	ldr	x6, [x1, #:lo12:.LANCHOR81]
 	umull	x13, w0, w3
 	mov	w1, -1
 	add	x5, x6, x13
 	strh	w1, [x5, 2]
 	strh	w1, [x6, x13]
-	adrp	x1, .LANCHOR83
+	adrp	x1, .LANCHOR82
 	mov	x15, x1
-	ldr	x12, [x1, #:lo12:.LANCHOR83]
-	cbnz	x12, .L420
-	str	x5, [x1, #:lo12:.LANCHOR83]
-.L433:
+	ldr	x12, [x1, #:lo12:.LANCHOR82]
+	cbnz	x12, .L429
+	str	x5, [x1, #:lo12:.LANCHOR82]
+.L442:
 	mov	w0, 0
 	ret
-.L420:
+.L429:
 	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LANCHOR84
+	adrp	x1, .LANCHOR83
 	ubfiz	x2, x0, 1, 16
 	mov	x4, -6148914691236517206
 	add	x29, sp, 0
-	ldr	x16, [x1, #:lo12:.LANCHOR84]
+	ldr	x16, [x1, #:lo12:.LANCHOR83]
 	movk	x4, 0xaaab, lsl 0
 	ldrh	w1, [x5, 4]
 	mov	w8, -1
@@ -2825,19 +2935,19 @@ insert_data_list:
 	csel	w7, w7, w8, ne
 	mov	w8, w3
 	mul	x1, x1, x4
-	adrp	x4, .LANCHOR79
-	ldr	x17, [x4, #:lo12:.LANCHOR79]
+	adrp	x4, .LANCHOR78
+	ldr	x17, [x4, #:lo12:.LANCHOR78]
 	and	w1, w1, 65535
 	mov	x4, x12
 	add	x10, x17, x2
 	mov	w2, 0
-.L428:
+.L437:
 	add	w2, w2, 1
 	and	w2, w2, 65535
 	cmp	w14, w2
-	bcc	.L419
+	bcc	.L428
 	cmp	w1, w0
-	beq	.L419
+	beq	.L428
 	ubfiz	x30, x1, 1, 16
 	ldrh	w19, [x4, 4]
 	cmp	w19, 0
@@ -2845,46 +2955,46 @@ insert_data_list:
 	mul	w3, w3, w19
 	csel	w3, w3, w11, ne
 	cmp	w7, w3
-	bne	.L424
+	bne	.L433
 	ldrh	w19, [x17, x30]
 	ldrh	w3, [x10]
 	cmp	w19, w3
-	bcc	.L426
-.L425:
+	bcc	.L435
+.L434:
 	strh	w1, [x6, x13]
 	cmp	x4, x12
 	ldrh	w1, [x4, 2]
 	strh	w1, [x5, 2]
-	bne	.L429
+	bne	.L438
 	strh	w0, [x4, 2]
-	str	x5, [x15, #:lo12:.LANCHOR83]
-	b	.L419
-.L424:
-	bcc	.L425
-.L426:
+	str	x5, [x15, #:lo12:.LANCHOR82]
+	b	.L428
+.L433:
+	bcc	.L434
+.L435:
 	ldrh	w3, [x4]
 	cmp	w3, w20
-	bne	.L427
+	bne	.L436
 	strh	w1, [x5, 2]
 	strh	w0, [x4]
-	adrp	x0, .LANCHOR85
-	str	x5, [x0, #:lo12:.LANCHOR85]
-.L419:
+	adrp	x0, .LANCHOR84
+	str	x5, [x0, #:lo12:.LANCHOR84]
+.L428:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L427:
+.L436:
 	umaddl	x4, w3, w8, x6
 	mov	w1, w3
-	b	.L428
-.L429:
+	b	.L437
+.L438:
 	ldrh	w1, [x4, 2]
 	mov	w2, 6
 	umull	x1, w1, w2
 	strh	w0, [x6, x1]
 	strh	w0, [x4, 2]
-	b	.L419
+	b	.L428
 	.size	insert_data_list, .-insert_data_list
 	.section	.text.INSERT_DATA_LIST,"ax",@progbits
 	.align	2
@@ -2894,19 +3004,19 @@ INSERT_DATA_LIST:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	insert_data_list
-	adrp	x1, .LANCHOR86
-	ldrh	w0, [x1, #:lo12:.LANCHOR86]
+	adrp	x1, .LANCHOR85
+	ldrh	w0, [x1, #:lo12:.LANCHOR85]
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	strh	w0, [x1, #:lo12:.LANCHOR86]
+	strh	w0, [x1, #:lo12:.LANCHOR85]
 	adrp	x1, .LANCHOR40
 	ldrh	w1, [x1, #:lo12:.LANCHOR40]
 	cmp	w1, w0
-	bcs	.L435
+	bcs	.L444
 	mov	w2, 210
-	adrp	x1, .LANCHOR87
+	adrp	x1, .LANCHOR86
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR87
+	add	x1, x1, :lo12:.LANCHOR86
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	ldp	x29, x30, [sp], 16
@@ -2915,7 +3025,7 @@ INSERT_DATA_LIST:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	b	printf
-.L435:
+.L444:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
@@ -2927,28 +3037,28 @@ insert_free_list:
 	and	w0, w0, 65535
 	mov	w7, 65535
 	cmp	w0, w7
-	beq	.L439
-	adrp	x1, .LANCHOR82
+	beq	.L448
+	adrp	x1, .LANCHOR81
 	mov	w6, 6
-	ldr	x3, [x1, #:lo12:.LANCHOR82]
+	ldr	x3, [x1, #:lo12:.LANCHOR81]
 	umull	x8, w0, w6
 	mov	w1, -1
 	add	x4, x3, x8
 	strh	w1, [x4, 2]
 	strh	w1, [x3, x8]
-	adrp	x1, .LANCHOR88
+	adrp	x1, .LANCHOR87
 	mov	x12, x1
-	ldr	x5, [x1, #:lo12:.LANCHOR88]
-	cbnz	x5, .L440
-	str	x4, [x1, #:lo12:.LANCHOR88]
-.L439:
+	ldr	x5, [x1, #:lo12:.LANCHOR87]
+	cbnz	x5, .L449
+	str	x4, [x1, #:lo12:.LANCHOR87]
+.L448:
 	mov	w0, 0
 	ret
-.L440:
-	adrp	x1, .LANCHOR79
+.L449:
+	adrp	x1, .LANCHOR78
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
-	ldr	x11, [x1, #:lo12:.LANCHOR79]
+	ldr	x11, [x1, #:lo12:.LANCHOR78]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w13, [x11, x1]
 	sub	x1, x5, x3
@@ -2956,37 +3066,37 @@ insert_free_list:
 	mul	x1, x1, x2
 	mov	x2, x5
 	and	w1, w1, 65535
-.L443:
+.L452:
 	ubfiz	x10, x1, 1, 16
 	ldrh	w10, [x11, x10]
 	cmp	w10, w13
-	bcs	.L441
+	bcs	.L450
 	ldrh	w10, [x2]
 	cmp	w10, w7
-	bne	.L442
+	bne	.L451
 	strh	w1, [x4, 2]
 	strh	w0, [x2]
-	b	.L439
-.L442:
+	b	.L448
+.L451:
 	umaddl	x2, w10, w6, x3
 	mov	w1, w10
-	b	.L443
-.L441:
+	b	.L452
+.L450:
 	ldrh	w6, [x2, 2]
 	cmp	x2, x5
 	strh	w6, [x4, 2]
 	strh	w1, [x3, x8]
-	bne	.L444
+	bne	.L453
 	strh	w0, [x2, 2]
-	str	x4, [x12, #:lo12:.LANCHOR88]
-	b	.L439
-.L444:
+	str	x4, [x12, #:lo12:.LANCHOR87]
+	b	.L448
+.L453:
 	ldrh	w1, [x2, 2]
 	mov	w4, 6
 	umull	x1, w1, w4
 	strh	w0, [x3, x1]
 	strh	w0, [x2, 2]
-	b	.L439
+	b	.L448
 	.size	insert_free_list, .-insert_free_list
 	.section	.text.INSERT_FREE_LIST,"ax",@progbits
 	.align	2
@@ -2996,19 +3106,19 @@ INSERT_FREE_LIST:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	insert_free_list
-	adrp	x1, .LANCHOR89
-	ldrh	w0, [x1, #:lo12:.LANCHOR89]
+	adrp	x1, .LANCHOR88
+	ldrh	w0, [x1, #:lo12:.LANCHOR88]
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	strh	w0, [x1, #:lo12:.LANCHOR89]
+	strh	w0, [x1, #:lo12:.LANCHOR88]
 	adrp	x1, .LANCHOR40
 	ldrh	w1, [x1, #:lo12:.LANCHOR40]
 	cmp	w1, w0
-	bcs	.L445
+	bcs	.L454
 	mov	w2, 203
-	adrp	x1, .LANCHOR90
+	adrp	x1, .LANCHOR89
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR90
+	add	x1, x1, :lo12:.LANCHOR89
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	ldp	x29, x30, [sp], 16
@@ -3017,7 +3127,7 @@ INSERT_FREE_LIST:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	b	printf
-.L445:
+.L454:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
@@ -3030,25 +3140,25 @@ List_remove_node:
 	and	w1, w1, 65535
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR82
+	adrp	x20, .LANCHOR81
 	stp	x21, x22, [sp, 32]
 	mov	x22, x0
 	mov	w0, 6
 	str	x23, [sp, 48]
-	ldr	x23, [x20, #:lo12:.LANCHOR82]
+	ldr	x23, [x20, #:lo12:.LANCHOR81]
 	umull	x21, w1, w0
 	mov	w0, 65535
 	add	x19, x23, x21
 	ldrh	w1, [x19, 2]
 	cmp	w1, w0
-	bne	.L449
+	bne	.L458
 	ldr	x0, [x22]
 	cmp	x19, x0
-	beq	.L449
+	beq	.L458
 	mov	w2, 386
-	adrp	x1, .LANCHOR91
+	adrp	x1, .LANCHOR90
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR91
+	add	x1, x1, :lo12:.LANCHOR90
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -3056,16 +3166,16 @@ List_remove_node:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L449:
+.L458:
 	ldr	x0, [x22]
 	mov	w1, 65535
 	cmp	x19, x0
 	ldrh	w0, [x23, x21]
-	bne	.L450
+	bne	.L459
 	cmp	w0, w1
-	bne	.L451
+	bne	.L460
 	str	xzr, [x22]
-.L452:
+.L461:
 	mov	w0, -1
 	strh	w0, [x23, x21]
 	strh	w0, [x19, 2]
@@ -3075,35 +3185,35 @@ List_remove_node:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L451:
-	ldr	x1, [x20, #:lo12:.LANCHOR82]
+.L460:
+	ldr	x1, [x20, #:lo12:.LANCHOR81]
 	mov	w2, 6
 	umaddl	x0, w0, w2, x1
 	mov	w1, -1
 	str	x0, [x22]
 	strh	w1, [x0, 2]
-	b	.L452
-.L450:
+	b	.L461
+.L459:
 	cmp	w0, w1
 	ldrh	w1, [x19, 2]
-	bne	.L453
+	bne	.L462
 	cmp	w1, w0
-	beq	.L452
+	beq	.L461
 	mov	w0, 6
 	mov	w2, -1
 	umull	x1, w1, w0
-	ldr	x0, [x20, #:lo12:.LANCHOR82]
+	ldr	x0, [x20, #:lo12:.LANCHOR81]
 	strh	w2, [x0, x1]
-	b	.L452
-.L453:
-	ldr	x2, [x20, #:lo12:.LANCHOR82]
+	b	.L461
+.L462:
+	ldr	x2, [x20, #:lo12:.LANCHOR81]
 	mov	w3, 6
 	umaddl	x4, w0, w3, x2
 	strh	w1, [x4, 2]
 	ldrh	w1, [x19, 2]
 	umull	x1, w1, w3
 	strh	w0, [x2, x1]
-	b	.L452
+	b	.L461
 	.size	List_remove_node, .-List_remove_node
 	.section	.text.List_pop_index_node,"ax",@progbits
 	.align	2
@@ -3111,18 +3221,18 @@ List_remove_node:
 	.type	List_pop_index_node, %function
 List_pop_index_node:
 	ldr	x2, [x0]
-	cbz	x2, .L461
+	cbz	x2, .L470
 	stp	x29, x30, [sp, -32]!
-	adrp	x3, .LANCHOR82
+	adrp	x3, .LANCHOR81
 	and	w1, w1, 65535
 	mov	w4, 65535
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	mov	w5, 6
-	ldr	x19, [x3, #:lo12:.LANCHOR82]
-.L457:
-	cbnz	w1, .L458
-.L460:
+	ldr	x19, [x3, #:lo12:.LANCHOR81]
+.L466:
+	cbnz	w1, .L467
+.L469:
 	sub	x19, x2, x19
 	mov	x2, -6148914691236517206
 	asr	x19, x19, 1
@@ -3135,15 +3245,15 @@ List_pop_index_node:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L458:
+.L467:
 	ldrh	w3, [x2]
 	cmp	w3, w4
-	beq	.L460
+	beq	.L469
 	sub	w1, w1, #1
 	umaddl	x2, w3, w5, x19
 	and	w1, w1, 65535
-	b	.L457
-.L461:
+	b	.L466
+.L470:
 	mov	w0, 65535
 	ret
 	.size	List_pop_index_node, .-List_pop_index_node
@@ -3153,28 +3263,28 @@ List_pop_index_node:
 	.type	List_get_gc_head_node, %function
 List_get_gc_head_node:
 	and	w2, w0, 65535
-	adrp	x0, .LANCHOR83
-	ldr	x1, [x0, #:lo12:.LANCHOR83]
-	cbz	x1, .L471
 	adrp	x0, .LANCHOR82
+	ldr	x1, [x0, #:lo12:.LANCHOR82]
+	cbz	x1, .L480
+	adrp	x0, .LANCHOR81
 	mov	w4, 6
-	ldr	x3, [x0, #:lo12:.LANCHOR82]
+	ldr	x3, [x0, #:lo12:.LANCHOR81]
 	mov	w0, 65535
-.L468:
-	cbz	w2, .L469
+.L477:
+	cbz	w2, .L478
 	ldrh	w1, [x1]
 	cmp	w1, w0
-	bne	.L470
+	bne	.L479
 	ret
-.L470:
+.L479:
 	sub	w2, w2, #1
 	umaddl	x1, w1, w4, x3
 	and	w2, w2, 65535
-	b	.L468
-.L471:
+	b	.L477
+.L480:
 	mov	w0, 65535
 	ret
-.L469:
+.L478:
 	sub	x0, x1, x3
 	mov	x1, -6148914691236517206
 	asr	x0, x0, 1
@@ -3192,35 +3302,35 @@ List_update_data_list:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w19, w0, 65535
-	adrp	x0, .LANCHOR92
+	adrp	x0, .LANCHOR91
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	ldrh	w0, [x0, #:lo12:.LANCHOR92]
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	stp	x25, x26, [sp, 64]
 	cmp	w0, w19
-	beq	.L474
+	beq	.L483
+	adrp	x0, .LANCHOR92
+	ldrh	w0, [x0, #:lo12:.LANCHOR92]
+	cmp	w0, w19
+	beq	.L483
 	adrp	x0, .LANCHOR93
 	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w0, w19
-	beq	.L474
-	adrp	x0, .LANCHOR94
-	ldrh	w0, [x0, #:lo12:.LANCHOR94]
-	cmp	w0, w19
-	beq	.L474
-	adrp	x0, .LANCHOR82
+	beq	.L483
+	adrp	x0, .LANCHOR81
 	mov	w21, 6
-	adrp	x24, .LANCHOR83
+	adrp	x24, .LANCHOR82
 	mov	x26, x0
 	umull	x21, w19, w21
-	ldr	x23, [x0, #:lo12:.LANCHOR82]
-	ldr	x1, [x24, #:lo12:.LANCHOR83]
+	ldr	x23, [x0, #:lo12:.LANCHOR81]
+	ldr	x1, [x24, #:lo12:.LANCHOR82]
 	add	x22, x23, x21
 	cmp	x22, x1
-	beq	.L474
-	adrp	x1, .LANCHOR84
+	beq	.L483
+	adrp	x1, .LANCHOR83
 	ubfiz	x0, x19, 1, 16
 	mov	x25, x1
-	ldr	x2, [x1, #:lo12:.LANCHOR84]
+	ldr	x2, [x1, #:lo12:.LANCHOR83]
 	mov	w1, 65535
 	ldrh	w20, [x2, x0]
 	ldrh	w0, [x22, 4]
@@ -3229,14 +3339,14 @@ List_update_data_list:
 	ldrh	w0, [x22, 2]
 	csinv	w20, w20, wzr, ne
 	cmp	w0, w1
-	bne	.L477
+	bne	.L486
 	ldrh	w1, [x23, x21]
 	cmp	w1, w0
-	bne	.L477
+	bne	.L486
 	mov	w2, 504
-	adrp	x1, .LANCHOR95
+	adrp	x1, .LANCHOR94
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR95
+	add	x1, x1, :lo12:.LANCHOR94
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -3244,41 +3354,41 @@ List_update_data_list:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L477:
+.L486:
 	ldrh	w0, [x22, 2]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L478
+	bne	.L487
 	ldrh	w1, [x23, x21]
 	cmp	w1, w0
-	beq	.L474
-.L478:
+	beq	.L483
+.L487:
 	mov	w1, 6
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
 	umull	x0, w0, w1
 	asr	x1, x0, 1
 	mul	x1, x1, x2
-	ldr	x2, [x25, #:lo12:.LANCHOR84]
+	ldr	x2, [x25, #:lo12:.LANCHOR83]
 	ldrh	w1, [x2, x1, lsl 1]
-	ldr	x2, [x26, #:lo12:.LANCHOR82]
+	ldr	x2, [x26, #:lo12:.LANCHOR81]
 	add	x0, x2, x0
 	ldrh	w2, [x0, 4]
 	cmp	w2, 0
 	mul	w0, w1, w2
 	csinv	w0, w0, wzr, ne
 	cmp	w20, w0
-	bcs	.L474
-	adrp	x20, .LANCHOR86
+	bcs	.L483
+	adrp	x20, .LANCHOR85
 	mov	w1, w19
-	add	x0, x24, :lo12:.LANCHOR83
+	add	x0, x24, :lo12:.LANCHOR82
 	bl	List_remove_node
-	ldrh	w0, [x20, #:lo12:.LANCHOR86]
-	cbnz	w0, .L480
+	ldrh	w0, [x20, #:lo12:.LANCHOR85]
+	cbnz	w0, .L489
 	mov	w2, 515
-	adrp	x1, .LANCHOR95
+	adrp	x1, .LANCHOR94
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR95
+	add	x1, x1, :lo12:.LANCHOR94
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -3286,13 +3396,13 @@ List_update_data_list:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L480:
-	ldrh	w0, [x20, #:lo12:.LANCHOR86]
+.L489:
+	ldrh	w0, [x20, #:lo12:.LANCHOR85]
 	sub	w0, w0, #1
-	strh	w0, [x20, #:lo12:.LANCHOR86]
+	strh	w0, [x20, #:lo12:.LANCHOR85]
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-.L474:
+.L483:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -3314,27 +3424,27 @@ ftl_map_blk_alloc_new_blk:
 	mov	w20, 0
 	ldr	x0, [x0, 16]
 	str	x21, [sp, 32]
-.L485:
+.L494:
 	cmp	w20, w1
-	beq	.L489
+	beq	.L498
 	mov	x21, x0
 	ldrh	w2, [x0], 2
-	cbnz	w2, .L486
+	cbnz	w2, .L495
 	bl	FtlFreeSysBlkQueueOut
 	and	w1, w0, 65535
 	strh	w0, [x21]
 	sub	w2, w1, #1
 	mov	w0, 65533
 	cmp	w0, w2, uxth
-	bcs	.L487
-	adrp	x0, .LANCHOR76+6
-	ldrh	w2, [x0, #:lo12:.LANCHOR76+6]
+	bcs	.L496
+	adrp	x0, .LANCHOR75+6
+	ldrh	w2, [x0, #:lo12:.LANCHOR75+6]
 	adrp	x0, .LC8
 	add	x0, x0, :lo12:.LC8
 	bl	printf
-.L488:
-	b	.L488
-.L487:
+.L497:
+	b	.L497
+.L496:
 	ldr	w0, [x19, 48]
 	strh	wzr, [x19, 2]
 	add	w0, w0, 1
@@ -3343,14 +3453,14 @@ ftl_map_blk_alloc_new_blk:
 	strh	w20, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
-.L489:
+.L498:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L491
+	bhi	.L500
 	mov	w2, 629
-	adrp	x1, .LANCHOR96
+	adrp	x1, .LANCHOR95
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR96
+	add	x1, x1, :lo12:.LANCHOR95
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -3358,16 +3468,16 @@ ftl_map_blk_alloc_new_blk:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L491:
+.L500:
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L486:
+.L495:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L485
+	b	.L494
 	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
 	.section	.text.select_l2p_ram_region,"ax",@progbits
 	.align	2
@@ -3375,41 +3485,41 @@ ftl_map_blk_alloc_new_blk:
 	.type	select_l2p_ram_region, %function
 select_l2p_ram_region:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR68
+	adrp	x0, .LANCHOR67
 	mov	x1, 0
 	mov	w3, 65535
 	add	x29, sp, 0
-	ldrh	w2, [x0, #:lo12:.LANCHOR68]
-	adrp	x0, .LANCHOR97
+	ldrh	w2, [x0, #:lo12:.LANCHOR67]
+	adrp	x0, .LANCHOR96
 	str	x19, [sp, 16]
-	ldr	x0, [x0, #:lo12:.LANCHOR97]
-.L494:
+	ldr	x0, [x0, #:lo12:.LANCHOR96]
+.L503:
 	and	w19, w1, 65535
 	cmp	w19, w2
-	bcc	.L496
+	bcc	.L505
 	add	x3, x0, 4
 	mov	w19, w2
 	mov	w5, -2147483648
 	mov	w1, 0
-.L497:
+.L506:
 	cmp	w1, w2
-	bne	.L499
+	bne	.L508
 	cmp	w19, w2
-	bcc	.L495
-	adrp	x1, .LANCHOR98
+	bcc	.L504
+	adrp	x1, .LANCHOR97
 	mov	w19, w2
 	mov	w3, -1
-	ldrh	w4, [x1, #:lo12:.LANCHOR98]
+	ldrh	w4, [x1, #:lo12:.LANCHOR97]
 	mov	w1, 0
-.L500:
+.L509:
 	cmp	w1, w2
-	bne	.L502
+	bne	.L511
 	cmp	w19, w1
-	bcc	.L495
-	mov	w2, 855
-	adrp	x1, .LANCHOR99
+	bcc	.L504
+	mov	w2, 859
+	adrp	x1, .LANCHOR98
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR99
+	add	x1, x1, :lo12:.LANCHOR98
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -3417,86 +3527,86 @@ select_l2p_ram_region:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-	b	.L495
-.L496:
+	b	.L504
+.L505:
 	add	x1, x1, 1
 	add	x4, x0, x1, lsl 4
 	ldrh	w4, [x4, -16]
 	cmp	w4, w3
-	bne	.L494
-.L495:
+	bne	.L503
+.L504:
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L499:
+.L508:
 	ldr	w4, [x3]
-	tbnz	w4, #31, .L498
+	tbnz	w4, #31, .L507
 	cmp	w5, w4
-	bls	.L498
+	bls	.L507
 	mov	w5, w4
 	mov	w19, w1
-.L498:
+.L507:
 	add	w1, w1, 1
 	add	x3, x3, 16
 	and	w1, w1, 65535
-	b	.L497
-.L502:
+	b	.L506
+.L511:
 	ldr	w6, [x0, 4]
 	cmp	w3, w6
-	bls	.L501
+	bls	.L510
 	ldrh	w5, [x0]
 	cmp	w5, w4
 	csel	w3, w3, w6, eq
 	csel	w19, w19, w1, eq
-.L501:
+.L510:
 	add	w1, w1, 1
 	add	x0, x0, 16
 	and	w1, w1, 65535
-	b	.L500
+	b	.L509
 	.size	select_l2p_ram_region, .-select_l2p_ram_region
 	.section	.text.FtlUpdateVaildLpn,"ax",@progbits
 	.align	2
 	.global	FtlUpdateVaildLpn
 	.type	FtlUpdateVaildLpn, %function
 FtlUpdateVaildLpn:
-	adrp	x2, .LANCHOR100
+	adrp	x2, .LANCHOR99
 	mov	x3, x2
-	ldrh	w1, [x2, #:lo12:.LANCHOR100]
+	ldrh	w1, [x2, #:lo12:.LANCHOR99]
 	cmp	w1, 4
-	bhi	.L505
-	cbnz	w0, .L505
+	bhi	.L514
+	cbnz	w0, .L514
 	add	w1, w1, 1
-	strh	w1, [x2, #:lo12:.LANCHOR100]
+	strh	w1, [x2, #:lo12:.LANCHOR99]
 	ret
-.L505:
+.L514:
 	adrp	x1, .LANCHOR40
-	adrp	x0, .LANCHOR101
-	strh	wzr, [x3, #:lo12:.LANCHOR100]
+	adrp	x0, .LANCHOR100
+	strh	wzr, [x3, #:lo12:.LANCHOR99]
 	mov	w2, 0
 	ldrh	w5, [x1, #:lo12:.LANCHOR40]
-	adrp	x1, .LANCHOR84
-	str	wzr, [x0, #:lo12:.LANCHOR101]
+	adrp	x1, .LANCHOR83
+	str	wzr, [x0, #:lo12:.LANCHOR100]
 	mov	w3, 0
-	ldr	x6, [x1, #:lo12:.LANCHOR84]
+	ldr	x6, [x1, #:lo12:.LANCHOR83]
 	mov	w7, 65535
 	mov	x1, 0
-.L506:
+.L515:
 	cmp	w5, w1, uxth
-	bhi	.L508
-	cbz	w3, .L504
-	str	w2, [x0, #:lo12:.LANCHOR101]
-.L504:
+	bhi	.L517
+	cbz	w3, .L513
+	str	w2, [x0, #:lo12:.LANCHOR100]
+.L513:
 	ret
-.L508:
+.L517:
 	ldrh	w4, [x6, x1, lsl 1]
 	cmp	w4, w7
-	beq	.L507
+	beq	.L516
 	add	w2, w2, w4
 	mov	w3, 1
-.L507:
+.L516:
 	add	x1, x1, 1
-	b	.L506
+	b	.L515
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
 	.section	.text.ftl_set_blk_mode,"ax",@progbits
 	.align	2
@@ -3504,9 +3614,9 @@ FtlUpdateVaildLpn:
 	.type	ftl_set_blk_mode, %function
 ftl_set_blk_mode:
 	and	w0, w0, 65535
-	cbz	w1, .L515
+	cbz	w1, .L524
 	b	ftl_set_blk_mode.part.10
-.L515:
+.L524:
 	adrp	x1, .LANCHOR0
 	ubfx	x2, x0, 5, 11
 	lsl	x2, x2, 2
@@ -3548,45 +3658,45 @@ ftl_sb_update_avl_pages:
 	add	x4, x0, x4
 	ldrh	w3, [x1, #:lo12:.LANCHOR38]
 	mov	w1, 65535
-.L518:
+.L527:
 	cmp	w2, w3
-	bcc	.L520
-	adrp	x1, .LANCHOR53
+	bcc	.L529
+	adrp	x1, .LANCHOR52
 	ubfiz	x3, x3, 1, 16
 	add	x3, x3, 16
 	add	x2, x0, 16
-	ldrh	w1, [x1, #:lo12:.LANCHOR53]
+	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	add	x3, x0, x3
 	mov	w5, 65535
 	sub	w1, w1, #1
 	and	w1, w1, 65535
 	sub	w1, w1, w6
-.L521:
+.L530:
 	cmp	x2, x3
-	bne	.L523
+	bne	.L532
 	ret
-.L520:
+.L529:
 	ldrh	w5, [x4]
 	cmp	w5, w1
-	beq	.L519
+	beq	.L528
 	ldrh	w5, [x0, 4]
 	add	w5, w5, 1
 	strh	w5, [x0, 4]
-.L519:
+.L528:
 	add	w2, w2, 1
 	add	x4, x4, 2
 	and	w2, w2, 65535
-	b	.L518
-.L523:
+	b	.L527
+.L532:
 	ldrh	w4, [x2]
 	cmp	w4, w5
-	beq	.L522
+	beq	.L531
 	ldrh	w4, [x0, 4]
 	add	w4, w1, w4
 	strh	w4, [x0, 4]
-.L522:
+.L531:
 	add	x2, x2, 2
-	b	.L521
+	b	.L530
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
 	.section	.text.make_superblock,"ax",@progbits
 	.align	2
@@ -3601,11 +3711,11 @@ make_superblock:
 	adrp	x0, .LANCHOR40
 	ldrh	w0, [x0, #:lo12:.LANCHOR40]
 	cmp	w1, w0
-	bcc	.L525
-	mov	w2, 2544
-	adrp	x1, .LANCHOR102
+	bcc	.L534
+	mov	w2, 2575
+	adrp	x1, .LANCHOR101
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR102
+	add	x1, x1, :lo12:.LANCHOR101
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -3613,7 +3723,7 @@ make_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L525:
+.L534:
 	adrp	x0, .LANCHOR38
 	adrp	x7, .LANCHOR47
 	add	x6, x19, 16
@@ -3623,53 +3733,53 @@ make_superblock:
 	strh	wzr, [x19, 4]
 	mov	w10, -1
 	strb	wzr, [x19, 7]
-.L526:
+.L535:
 	cmp	w8, w5, uxth
-	bhi	.L528
-	adrp	x1, .LANCHOR53
+	bhi	.L537
+	adrp	x1, .LANCHOR52
 	ldrb	w0, [x19, 7]
 	strb	wzr, [x19, 9]
-	ldrh	w1, [x1, #:lo12:.LANCHOR53]
+	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	mul	w0, w0, w1
 	strh	w0, [x19, 4]
 	adrp	x0, .LANCHOR28
 	ldr	w0, [x0, #:lo12:.LANCHOR28]
-	cbz	w0, .L529
-	adrp	x0, .LANCHOR79
+	cbz	w0, .L538
+	adrp	x0, .LANCHOR78
 	ldrh	w1, [x19]
-	ldr	x0, [x0, #:lo12:.LANCHOR79]
+	ldr	x0, [x0, #:lo12:.LANCHOR78]
 	ldrh	w0, [x0, x1, lsl 1]
 	cmp	w0, 79
-	bhi	.L529
+	bhi	.L538
 	mov	w0, 1
 	strb	w0, [x19, 9]
-.L529:
+.L538:
 	adrp	x0, .LANCHOR1
 	ldrb	w0, [x0, #:lo12:.LANCHOR1]
-	cbz	w0, .L530
+	cbz	w0, .L539
 	mov	w0, 1
 	strb	w0, [x19, 9]
-.L530:
+.L539:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L528:
+.L537:
 	ldrh	w1, [x19]
 	ldrb	w0, [x7, x5]
 	bl	V2P_block
 	mov	w4, w0
 	strh	w10, [x6]
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L527
+	cbnz	w0, .L536
 	strh	w4, [x6]
 	ldrb	w0, [x19, 7]
 	add	w0, w0, 1
 	strb	w0, [x19, 7]
-.L527:
+.L536:
 	add	x5, x5, 1
 	add	x6, x6, 2
-	b	.L526
+	b	.L535
 	.size	make_superblock, .-make_superblock
 	.section	.text.update_multiplier_value,"ax",@progbits
 	.align	2
@@ -3681,51 +3791,51 @@ update_multiplier_value:
 	mov	x7, 0
 	adrp	x8, .LANCHOR47
 	ldrh	w10, [x0, #:lo12:.LANCHOR38]
-	adrp	x0, .LANCHOR53
+	adrp	x0, .LANCHOR52
 	mov	w5, 0
 	add	x8, x8, :lo12:.LANCHOR47
-	ldrh	w11, [x0, #:lo12:.LANCHOR53]
+	ldrh	w11, [x0, #:lo12:.LANCHOR52]
 	cmp	w10, w7, uxth
-	bhi	.L550
-	cbz	w5, .L548
+	bhi	.L559
+	cbz	w5, .L557
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.L549:
-	adrp	x0, .LANCHOR82
+.L558:
+	adrp	x0, .LANCHOR81
 	mov	w1, 6
-	ldr	x0, [x0, #:lo12:.LANCHOR82]
+	ldr	x0, [x0, #:lo12:.LANCHOR81]
 	umaddl	x6, w6, w1, x0
 	mov	w0, 0
 	strh	w5, [x6, 4]
 	ret
-.L543:
+.L552:
 	mov	w5, 0
-	b	.L542
-.L548:
+	b	.L551
+.L557:
 	mov	w5, 0
-	b	.L549
-.L550:
+	b	.L558
+.L559:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
-.L541:
+.L550:
 	ldrb	w0, [x8, x7]
 	mov	w1, w6
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L540
+	cbnz	w0, .L549
 	add	w5, w5, w11
 	and	w5, w5, 65535
-.L540:
+.L549:
 	add	x7, x7, 1
 	cmp	w10, w7, uxth
-	bhi	.L541
-	cbz	w5, .L543
+	bhi	.L550
+	cbz	w5, .L552
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.L542:
-	adrp	x0, .LANCHOR82
+.L551:
+	adrp	x0, .LANCHOR81
 	mov	w1, 6
-	ldr	x0, [x0, #:lo12:.LANCHOR82]
+	ldr	x0, [x0, #:lo12:.LANCHOR81]
 	umaddl	x6, w6, w1, x0
 	mov	w0, 0
 	strh	w5, [x6, 4]
@@ -3737,22 +3847,22 @@ update_multiplier_value:
 	.global	GetFreeBlockMinEraseCount
 	.type	GetFreeBlockMinEraseCount, %function
 GetFreeBlockMinEraseCount:
-	adrp	x0, .LANCHOR88
-	ldr	x0, [x0, #:lo12:.LANCHOR88]
-	cbz	x0, .L553
-	adrp	x1, .LANCHOR82
-	ldr	x1, [x1, #:lo12:.LANCHOR82]
+	adrp	x0, .LANCHOR87
+	ldr	x0, [x0, #:lo12:.LANCHOR87]
+	cbz	x0, .L562
+	adrp	x1, .LANCHOR81
+	ldr	x1, [x1, #:lo12:.LANCHOR81]
 	sub	x0, x0, x1
 	mov	x1, -6148914691236517206
 	asr	x0, x0, 1
 	movk	x1, 0xaaab, lsl 0
 	mul	x0, x0, x1
-	adrp	x1, .LANCHOR79
-	ldr	x1, [x1, #:lo12:.LANCHOR79]
+	adrp	x1, .LANCHOR78
+	ldr	x1, [x1, #:lo12:.LANCHOR78]
 	and	x0, x0, 65535
 	ldrh	w0, [x1, x0, lsl 1]
 	ret
-.L553:
+.L562:
 	mov	w0, 0
 	ret
 	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
@@ -3761,21 +3871,21 @@ GetFreeBlockMinEraseCount:
 	.global	GetFreeBlockMaxEraseCount
 	.type	GetFreeBlockMaxEraseCount, %function
 GetFreeBlockMaxEraseCount:
-	adrp	x1, .LANCHOR88
+	adrp	x1, .LANCHOR87
 	and	w0, w0, 65535
-	ldr	x1, [x1, #:lo12:.LANCHOR88]
-	cbz	x1, .L561
-	adrp	x2, .LANCHOR89
+	ldr	x1, [x1, #:lo12:.LANCHOR87]
+	cbz	x1, .L570
+	adrp	x2, .LANCHOR88
 	mov	w3, 7
 	mov	w5, 6
 	mov	w6, 65535
-	ldrh	w2, [x2, #:lo12:.LANCHOR89]
+	ldrh	w2, [x2, #:lo12:.LANCHOR88]
 	mul	w2, w2, w3
 	asr	w2, w2, 3
 	cmp	w0, w2
 	csel	w0, w2, w0, gt
-	adrp	x2, .LANCHOR82
-	ldr	x3, [x2, #:lo12:.LANCHOR82]
+	adrp	x2, .LANCHOR81
+	ldr	x3, [x2, #:lo12:.LANCHOR81]
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
 	sub	x1, x1, x3
@@ -3783,25 +3893,25 @@ GetFreeBlockMaxEraseCount:
 	mul	x1, x1, x2
 	mov	w2, 0
 	and	w1, w1, 65535
-.L557:
+.L566:
 	cmp	w0, w2
-	beq	.L560
+	beq	.L569
 	umull	x4, w1, w5
 	ldrh	w4, [x3, x4]
 	cmp	w4, w6
-	bne	.L558
-.L560:
-	adrp	x0, .LANCHOR79
+	bne	.L567
+.L569:
+	adrp	x0, .LANCHOR78
 	ubfiz	x1, x1, 1, 16
-	ldr	x0, [x0, #:lo12:.LANCHOR79]
+	ldr	x0, [x0, #:lo12:.LANCHOR78]
 	ldrh	w0, [x0, x1]
 	ret
-.L558:
+.L567:
 	add	w2, w2, 1
 	mov	w1, w4
 	and	w2, w2, 65535
-	b	.L557
-.L561:
+	b	.L566
+.L570:
 	mov	w0, 0
 	ret
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
@@ -3813,18 +3923,18 @@ free_data_superblock:
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L565
+	beq	.L574
 	stp	x29, x30, [sp, -16]!
-	adrp	x2, .LANCHOR84
+	adrp	x2, .LANCHOR83
 	ubfiz	x1, x0, 1, 16
 	add	x29, sp, 0
-	ldr	x2, [x2, #:lo12:.LANCHOR84]
+	ldr	x2, [x2, #:lo12:.LANCHOR83]
 	strh	wzr, [x2, x1]
 	bl	INSERT_FREE_LIST
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L565:
+.L574:
 	mov	w0, 0
 	ret
 	.size	free_data_superblock, .-free_data_superblock
@@ -3833,45 +3943,45 @@ free_data_superblock:
 	.global	FtlGcBufInit
 	.type	FtlGcBufInit, %function
 FtlGcBufInit:
-	adrp	x1, .LANCHOR104
-	adrp	x0, .LANCHOR103
-	adrp	x7, .LANCHOR105
-	adrp	x6, .LANCHOR106
-	ldr	x5, [x1, #:lo12:.LANCHOR104]
-	adrp	x1, .LANCHOR58
-	str	wzr, [x0, #:lo12:.LANCHOR103]
+	adrp	x1, .LANCHOR103
+	adrp	x0, .LANCHOR102
+	adrp	x7, .LANCHOR104
+	adrp	x6, .LANCHOR105
+	ldr	x5, [x1, #:lo12:.LANCHOR103]
+	adrp	x1, .LANCHOR57
+	str	wzr, [x0, #:lo12:.LANCHOR102]
 	adrp	x0, .LANCHOR38
-	ldrh	w10, [x1, #:lo12:.LANCHOR58]
-	adrp	x1, .LANCHOR59
+	ldrh	w10, [x1, #:lo12:.LANCHOR57]
+	adrp	x1, .LANCHOR58
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	mov	w8, 24
-	ldrh	w11, [x1, #:lo12:.LANCHOR59]
-	adrp	x1, .LANCHOR107
-	ldr	x14, [x7, #:lo12:.LANCHOR105]
+	ldrh	w11, [x1, #:lo12:.LANCHOR58]
+	adrp	x1, .LANCHOR106
+	ldr	x14, [x7, #:lo12:.LANCHOR104]
 	mov	x3, x5
-	ldr	x4, [x1, #:lo12:.LANCHOR107]
+	ldr	x4, [x1, #:lo12:.LANCHOR106]
 	mov	w2, 0
-	ldr	x15, [x6, #:lo12:.LANCHOR106]
+	ldr	x15, [x6, #:lo12:.LANCHOR105]
 	nop // between mem op and mult-accumulate
 	umaddl	x8, w0, w8, x5
 	add	x4, x4, 8
 	mov	w1, 0
 	mov	w16, 1
-.L569:
+.L578:
 	add	w13, w2, w10
 	add	w12, w1, w11
 	cmp	x3, x8
-	bne	.L570
-	adrp	x1, .LANCHOR108
-	ldr	x7, [x7, #:lo12:.LANCHOR105]
-	ldr	x6, [x6, #:lo12:.LANCHOR106]
+	bne	.L579
+	adrp	x1, .LANCHOR107
+	ldr	x7, [x7, #:lo12:.LANCHOR104]
+	ldr	x6, [x6, #:lo12:.LANCHOR105]
 	mov	w8, 24
-	ldr	w4, [x1, #:lo12:.LANCHOR108]
-.L571:
+	ldr	w4, [x1, #:lo12:.LANCHOR107]
+.L580:
 	cmp	w0, w4
-	bcc	.L572
+	bcc	.L581
 	ret
-.L570:
+.L579:
 	asr	w2, w2, 2
 	asr	w1, w1, 2
 	add	x2, x14, x2, sxtw 2
@@ -3883,8 +3993,8 @@ FtlGcBufInit:
 	add	x4, x4, 56
 	mov	w1, w12
 	mov	w2, w13
-	b	.L569
-.L572:
+	b	.L578
+.L581:
 	umull	x3, w0, w8
 	mul	w1, w10, w0
 	add	x2, x5, x3
@@ -3898,44 +4008,44 @@ FtlGcBufInit:
 	asr	w1, w1, 2
 	add	x1, x6, x1, sxtw 2
 	str	x1, [x2, 8]
-	b	.L571
+	b	.L580
 	.size	FtlGcBufInit, .-FtlGcBufInit
 	.section	.text.FtlGcBufFree,"ax",@progbits
 	.align	2
 	.global	FtlGcBufFree
 	.type	FtlGcBufFree, %function
 FtlGcBufFree:
-	adrp	x2, .LANCHOR108
+	adrp	x2, .LANCHOR107
 	mov	w3, 0
 	mov	w7, 56
 	mov	w10, 24
-	ldr	w8, [x2, #:lo12:.LANCHOR108]
-	adrp	x2, .LANCHOR104
-	ldr	x4, [x2, #:lo12:.LANCHOR104]
-.L574:
+	ldr	w8, [x2, #:lo12:.LANCHOR107]
+	adrp	x2, .LANCHOR103
+	ldr	x4, [x2, #:lo12:.LANCHOR103]
+.L583:
 	cmp	w3, w1
-	bcs	.L573
+	bcs	.L582
 	umaddl	x6, w3, w7, x0
 	mov	w2, 0
-	b	.L579
-.L575:
+	b	.L588
+.L584:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-.L579:
+.L588:
 	cmp	w2, w8
-	bcs	.L576
+	bcs	.L585
 	umull	x5, w2, w10
 	add	x11, x4, x5
 	ldr	x12, [x4, x5]
 	ldr	x5, [x6, 8]
 	cmp	x12, x5
-	bne	.L575
+	bne	.L584
 	str	wzr, [x11, 16]
-.L576:
+.L585:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L574
-.L573:
+	b	.L583
+.L582:
 	ret
 	.size	FtlGcBufFree, .-FtlGcBufFree
 	.section	.text.FtlGcBufAlloc,"ax",@progbits
@@ -3943,38 +4053,38 @@ FtlGcBufFree:
 	.global	FtlGcBufAlloc
 	.type	FtlGcBufAlloc, %function
 FtlGcBufAlloc:
-	adrp	x2, .LANCHOR108
+	adrp	x2, .LANCHOR107
 	mov	w3, 0
 	mov	w7, 24
 	mov	w8, 1
-	ldr	w5, [x2, #:lo12:.LANCHOR108]
-	adrp	x2, .LANCHOR104
+	ldr	w5, [x2, #:lo12:.LANCHOR107]
+	adrp	x2, .LANCHOR103
 	mov	w10, 56
-	ldr	x6, [x2, #:lo12:.LANCHOR104]
-.L581:
+	ldr	x6, [x2, #:lo12:.LANCHOR103]
+.L590:
 	cmp	w3, w1
-	bcs	.L580
+	bcs	.L589
 	mov	w2, 0
-	b	.L586
-.L582:
+	b	.L595
+.L591:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-.L586:
+.L595:
 	cmp	w2, w5
-	bcs	.L583
+	bcs	.L592
 	umaddl	x4, w2, w7, x6
 	ldr	w11, [x4, 16]
-	cbnz	w11, .L582
+	cbnz	w11, .L591
 	umaddl	x2, w3, w10, x0
 	ldr	x11, [x4]
 	str	w8, [x4, 16]
 	ldr	x4, [x4, 8]
 	stp	x11, x4, [x2, 8]
-.L583:
+.L592:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L581
-.L580:
+	b	.L590
+.L589:
 	ret
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
 	.section	.text.IsBlkInGcList,"ax",@progbits
@@ -3982,23 +4092,23 @@ FtlGcBufAlloc:
 	.global	IsBlkInGcList
 	.type	IsBlkInGcList, %function
 IsBlkInGcList:
-	adrp	x1, .LANCHOR109
+	adrp	x1, .LANCHOR108
 	and	w0, w0, 65535
-	ldrh	w2, [x1, #:lo12:.LANCHOR109]
-	adrp	x1, .LANCHOR110
-	ldr	x3, [x1, #:lo12:.LANCHOR110]
+	ldrh	w2, [x1, #:lo12:.LANCHOR108]
+	adrp	x1, .LANCHOR109
+	ldr	x3, [x1, #:lo12:.LANCHOR109]
 	mov	x1, 0
-.L588:
+.L597:
 	cmp	w2, w1, uxth
-	bhi	.L590
+	bhi	.L599
 	mov	w0, 0
 	ret
-.L590:
+.L599:
 	add	x1, x1, 1
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w0
-	bne	.L588
+	bne	.L597
 	mov	w0, 1
 	ret
 	.size	IsBlkInGcList, .-IsBlkInGcList
@@ -4015,40 +4125,40 @@ FtlGcUpdatePage:
 	add	x29, sp, 0
 	bl	P2V_block_in_plane
 	and	w7, w0, 65535
-	adrp	x4, .LANCHOR109
-	adrp	x2, .LANCHOR110
+	adrp	x4, .LANCHOR108
+	adrp	x2, .LANCHOR109
 	mov	x3, 0
-	ldrh	w1, [x4, #:lo12:.LANCHOR109]
-	ldr	x5, [x2, #:lo12:.LANCHOR110]
-.L593:
+	ldrh	w1, [x4, #:lo12:.LANCHOR108]
+	ldr	x5, [x2, #:lo12:.LANCHOR109]
+.L602:
 	and	w2, w3, 65535
 	cmp	w2, w1
-	bcc	.L595
-	bne	.L594
+	bcc	.L604
+	bne	.L603
 	and	x3, x3, 65535
 	strh	w0, [x5, x3, lsl 1]
-	ldrh	w0, [x4, #:lo12:.LANCHOR109]
+	ldrh	w0, [x4, #:lo12:.LANCHOR108]
 	add	w0, w0, 1
-	strh	w0, [x4, #:lo12:.LANCHOR109]
-	b	.L594
-.L595:
+	strh	w0, [x4, #:lo12:.LANCHOR108]
+	b	.L603
+.L604:
 	add	x3, x3, 1
 	add	x2, x5, x3, lsl 1
 	ldrh	w2, [x2, -2]
 	cmp	w2, w7
-	bne	.L593
-.L594:
-	adrp	x4, .LANCHOR111
-	adrp	x1, .LANCHOR112
+	bne	.L602
+.L603:
+	adrp	x4, .LANCHOR110
+	adrp	x1, .LANCHOR111
 	mov	w3, 12
-	ldrh	w0, [x4, #:lo12:.LANCHOR111]
-	ldr	x5, [x1, #:lo12:.LANCHOR112]
+	ldrh	w0, [x4, #:lo12:.LANCHOR110]
+	ldr	x5, [x1, #:lo12:.LANCHOR111]
 	umull	x3, w0, w3
 	add	w0, w0, 1
 	add	x7, x5, x3
 	stp	w10, w8, [x7, 4]
 	str	w6, [x5, x3]
-	strh	w0, [x4, #:lo12:.LANCHOR111]
+	strh	w0, [x4, #:lo12:.LANCHOR110]
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
@@ -4057,91 +4167,91 @@ FtlGcUpdatePage:
 	.global	FtlGcRefreshOpenBlock
 	.type	FtlGcRefreshOpenBlock, %function
 FtlGcRefreshOpenBlock:
-	adrp	x8, .LANCHOR113
+	adrp	x8, .LANCHOR112
 	and	w0, w0, 65535
-	ldrh	w10, [x8, #:lo12:.LANCHOR113]
+	ldrh	w10, [x8, #:lo12:.LANCHOR112]
 	cmp	w10, w0
-	beq	.L598
-	adrp	x6, .LANCHOR114
-	ldrh	w7, [x6, #:lo12:.LANCHOR114]
+	beq	.L607
+	adrp	x6, .LANCHOR113
+	ldrh	w7, [x6, #:lo12:.LANCHOR113]
 	cmp	w0, w7
-	beq	.L598
-	adrp	x4, .LANCHOR115
-	ldrh	w5, [x4, #:lo12:.LANCHOR115]
+	beq	.L607
+	adrp	x4, .LANCHOR114
+	ldrh	w5, [x4, #:lo12:.LANCHOR114]
 	cmp	w0, w5
-	beq	.L598
-	adrp	x2, .LANCHOR116
-	ldrh	w3, [x2, #:lo12:.LANCHOR116]
+	beq	.L607
+	adrp	x2, .LANCHOR115
+	ldrh	w3, [x2, #:lo12:.LANCHOR115]
 	cmp	w0, w3
-	beq	.L598
+	beq	.L607
 	mov	w1, 65535
 	cmp	w10, w1
-	bne	.L599
-	strh	w0, [x8, #:lo12:.LANCHOR113]
-.L598:
+	bne	.L608
+	strh	w0, [x8, #:lo12:.LANCHOR112]
+.L607:
 	mov	w0, 0
 	ret
-.L599:
+.L608:
 	cmp	w7, w1
-	bne	.L600
-	strh	w0, [x6, #:lo12:.LANCHOR114]
-	b	.L598
-.L600:
+	bne	.L609
+	strh	w0, [x6, #:lo12:.LANCHOR113]
+	b	.L607
+.L609:
 	cmp	w5, w1
-	bne	.L601
-	strh	w0, [x4, #:lo12:.LANCHOR115]
-	b	.L598
-.L601:
+	bne	.L610
+	strh	w0, [x4, #:lo12:.LANCHOR114]
+	b	.L607
+.L610:
 	cmp	w3, w1
-	bne	.L598
-	strh	w0, [x2, #:lo12:.LANCHOR116]
-	b	.L598
+	bne	.L607
+	strh	w0, [x2, #:lo12:.LANCHOR115]
+	b	.L607
 	.size	FtlGcRefreshOpenBlock, .-FtlGcRefreshOpenBlock
 	.section	.text.FtlGcRefreshBlock,"ax",@progbits
 	.align	2
 	.global	FtlGcRefreshBlock
 	.type	FtlGcRefreshBlock, %function
 FtlGcRefreshBlock:
-	adrp	x8, .LANCHOR113
+	adrp	x8, .LANCHOR112
 	and	w0, w0, 65535
-	ldrh	w10, [x8, #:lo12:.LANCHOR113]
+	ldrh	w10, [x8, #:lo12:.LANCHOR112]
 	cmp	w10, w0
-	beq	.L610
-	adrp	x6, .LANCHOR114
-	ldrh	w7, [x6, #:lo12:.LANCHOR114]
+	beq	.L619
+	adrp	x6, .LANCHOR113
+	ldrh	w7, [x6, #:lo12:.LANCHOR113]
 	cmp	w0, w7
-	beq	.L610
-	adrp	x4, .LANCHOR115
-	ldrh	w5, [x4, #:lo12:.LANCHOR115]
+	beq	.L619
+	adrp	x4, .LANCHOR114
+	ldrh	w5, [x4, #:lo12:.LANCHOR114]
 	cmp	w0, w5
-	beq	.L610
-	adrp	x2, .LANCHOR116
-	ldrh	w3, [x2, #:lo12:.LANCHOR116]
+	beq	.L619
+	adrp	x2, .LANCHOR115
+	ldrh	w3, [x2, #:lo12:.LANCHOR115]
 	cmp	w0, w3
-	beq	.L610
+	beq	.L619
 	mov	w1, 65535
 	cmp	w10, w1
-	bne	.L604
-	strh	w0, [x8, #:lo12:.LANCHOR113]
-.L610:
+	bne	.L613
+	strh	w0, [x8, #:lo12:.LANCHOR112]
+.L619:
 	mov	w0, 0
 	ret
-.L604:
+.L613:
 	cmp	w7, w1
-	bne	.L605
-	strh	w0, [x6, #:lo12:.LANCHOR114]
-	b	.L610
-.L605:
+	bne	.L614
+	strh	w0, [x6, #:lo12:.LANCHOR113]
+	b	.L619
+.L614:
 	cmp	w5, w1
-	bne	.L606
-	strh	w0, [x4, #:lo12:.LANCHOR115]
-	b	.L610
-.L606:
+	bne	.L615
+	strh	w0, [x4, #:lo12:.LANCHOR114]
+	b	.L619
+.L615:
 	cmp	w3, w1
-	bne	.L611
-	strh	w0, [x2, #:lo12:.LANCHOR116]
-	b	.L610
-.L611:
+	bne	.L620
+	strh	w0, [x2, #:lo12:.LANCHOR115]
+	b	.L619
+.L620:
 	mov	w0, -1
 	ret
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
@@ -4159,39 +4269,39 @@ FtlGcMarkBadPhyBlk:
 	bl	FtlGcRefreshBlock
 	adrp	x0, .LANCHOR28
 	ldr	w0, [x0, #:lo12:.LANCHOR28]
-	cbz	w0, .L613
-	adrp	x1, .LANCHOR79
+	cbz	w0, .L622
+	adrp	x1, .LANCHOR78
 	ubfiz	x0, x11, 1, 16
-	ldr	x2, [x1, #:lo12:.LANCHOR79]
+	ldr	x2, [x1, #:lo12:.LANCHOR78]
 	ldrh	w1, [x2, x0]
 	cmp	w1, 39
-	bls	.L613
+	bls	.L622
 	sub	w1, w1, #40
 	strh	w1, [x2, x0]
-.L613:
-	adrp	x1, .LANCHOR117
-	adrp	x3, .LANCHOR118
-	add	x3, x3, :lo12:.LANCHOR118
+.L622:
+	adrp	x1, .LANCHOR116
+	adrp	x3, .LANCHOR117
+	add	x3, x3, :lo12:.LANCHOR117
 	mov	x2, 0
-	ldrh	w0, [x1, #:lo12:.LANCHOR117]
-.L614:
+	ldrh	w0, [x1, #:lo12:.LANCHOR116]
+.L623:
 	cmp	w0, w2, uxth
-	bhi	.L616
+	bhi	.L625
 	cmp	w0, 15
-	bhi	.L615
+	bhi	.L624
 	add	w2, w0, 1
-	strh	w2, [x1, #:lo12:.LANCHOR117]
-	adrp	x1, .LANCHOR118
-	add	x1, x1, :lo12:.LANCHOR118
+	strh	w2, [x1, #:lo12:.LANCHOR116]
+	adrp	x1, .LANCHOR117
+	add	x1, x1, :lo12:.LANCHOR117
 	strh	w12, [x1, w0, sxtw 1]
-	b	.L615
-.L616:
+	b	.L624
+.L625:
 	add	x2, x2, 1
 	add	x4, x3, x2, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w12
-	bne	.L614
-.L615:
+	bne	.L623
+.L624:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
@@ -4201,35 +4311,35 @@ FtlGcMarkBadPhyBlk:
 	.global	FtlGcReFreshBadBlk
 	.type	FtlGcReFreshBadBlk, %function
 FtlGcReFreshBadBlk:
-	adrp	x0, .LANCHOR117
-	ldrh	w0, [x0, #:lo12:.LANCHOR117]
-	cbz	w0, .L628
-	adrp	x1, .LANCHOR113
-	ldrh	w2, [x1, #:lo12:.LANCHOR113]
+	adrp	x0, .LANCHOR116
+	ldrh	w0, [x0, #:lo12:.LANCHOR116]
+	cbz	w0, .L637
+	adrp	x1, .LANCHOR112
+	ldrh	w2, [x1, #:lo12:.LANCHOR112]
 	mov	w1, 65535
 	cmp	w2, w1
-	bne	.L628
+	bne	.L637
 	stp	x29, x30, [sp, -16]!
-	adrp	x11, .LANCHOR119
+	adrp	x11, .LANCHOR118
 	add	x29, sp, 0
-	ldrh	w1, [x11, #:lo12:.LANCHOR119]
+	ldrh	w1, [x11, #:lo12:.LANCHOR118]
 	cmp	w1, w0
-	bcc	.L623
-	strh	wzr, [x11, #:lo12:.LANCHOR119]
-.L623:
-	ldrh	w1, [x11, #:lo12:.LANCHOR119]
-	adrp	x0, .LANCHOR118
-	add	x0, x0, :lo12:.LANCHOR118
+	bcc	.L632
+	strh	wzr, [x11, #:lo12:.LANCHOR118]
+.L632:
+	ldrh	w1, [x11, #:lo12:.LANCHOR118]
+	adrp	x0, .LANCHOR117
+	add	x0, x0, :lo12:.LANCHOR117
 	ldrh	w0, [x0, x1, lsl 1]
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-	ldrh	w0, [x11, #:lo12:.LANCHOR119]
+	ldrh	w0, [x11, #:lo12:.LANCHOR118]
 	ldp	x29, x30, [sp], 16
 	add	w0, w0, 1
-	strh	w0, [x11, #:lo12:.LANCHOR119]
+	strh	w0, [x11, #:lo12:.LANCHOR118]
 	mov	w0, 0
 	ret
-.L628:
+.L637:
 	mov	w0, 0
 	ret
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
@@ -4238,15 +4348,15 @@ FtlGcReFreshBadBlk:
 	.global	flash_boot_enter_slc_mode
 	.type	flash_boot_enter_slc_mode, %function
 flash_boot_enter_slc_mode:
-	adrp	x1, .LANCHOR29
+	adrp	x1, .LANCHOR119
 	and	w0, w0, 255
-	ldr	w2, [x1, #:lo12:.LANCHOR29]
+	ldr	w2, [x1, #:lo12:.LANCHOR119]
 	mov	w1, 12336
 	movk	w1, 0x5638, lsl 16
 	cmp	w2, w1
-	bne	.L631
+	bne	.L640
 	b	flash_enter_slc_mode
-.L631:
+.L640:
 	ret
 	.size	flash_boot_enter_slc_mode, .-flash_boot_enter_slc_mode
 	.section	.text.flash_boot_exit_slc_mode,"ax",@progbits
@@ -4254,38 +4364,40 @@ flash_boot_enter_slc_mode:
 	.global	flash_boot_exit_slc_mode
 	.type	flash_boot_exit_slc_mode, %function
 flash_boot_exit_slc_mode:
-	adrp	x1, .LANCHOR29
+	adrp	x1, .LANCHOR119
 	and	w0, w0, 255
-	ldr	w2, [x1, #:lo12:.LANCHOR29]
+	ldr	w2, [x1, #:lo12:.LANCHOR119]
 	mov	w1, 12336
 	movk	w1, 0x5638, lsl 16
 	cmp	w2, w1
-	bne	.L633
+	bne	.L642
 	b	flash_exit_slc_mode
-.L633:
+.L642:
 	ret
 	.size	flash_boot_exit_slc_mode, .-flash_boot_exit_slc_mode
 	.section	.text.FW_FlashBlockErase.constprop.41,"ax",@progbits
 	.align	2
 	.type	FW_FlashBlockErase.constprop.41, %function
 FW_FlashBlockErase.constprop.41:
-	stp	x29, x30, [sp, -16]!
-	mov	w4, w0
-	adrp	x0, .LANCHOR18
+	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w20, w0
+	adrp	x0, .LANCHOR18
 	ldr	x0, [x0, #:lo12:.LANCHOR18]
-	ldrb	w3, [x0, 9]
+	ldrb	w19, [x0, 9]
 	mov	w0, 0
 	bl	flash_boot_enter_slc_mode
-	udiv	w1, w4, w3
 	mov	w2, 0
 	mov	w0, 0
+	udiv	w1, w20, w19
 	bl	FlashEraseBlock
-	mov	w3, w0
+	mov	w19, w0
 	mov	w0, 0
 	bl	flash_boot_exit_slc_mode
-	and	w0, w3, 255
-	ldp	x29, x30, [sp], 16
+	and	w0, w19, 255
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
 	ret
 	.size	FW_FlashBlockErase.constprop.41, .-FW_FlashBlockErase.constprop.41
 	.section	.text.ftl_memset,"ax",@progbits
@@ -4305,16 +4417,16 @@ BuildFlashLsbPageTable:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w20, w1
-	cbnz	w0, .L639
+	cbnz	w0, .L648
 	adrp	x1, .LANCHOR16
 	add	x1, x1, :lo12:.LANCHOR16
 	mov	x0, 0
-.L640:
+.L649:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 256
-	bne	.L640
-.L646:
+	bne	.L649
+.L655:
 	adrp	x19, .LANCHOR120
 	add	x19, x19, :lo12:.LANCHOR120
 	mov	w1, 255
@@ -4325,41 +4437,41 @@ BuildFlashLsbPageTable:
 	and	w20, w20, 65535
 	add	x1, x1, :lo12:.LANCHOR16
 	mov	x0, 0
-.L641:
+.L650:
 	cmp	w20, w0, uxth
-	bhi	.L663
+	bhi	.L674
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L639:
+.L648:
 	cmp	w0, 1
-	bne	.L642
+	bne	.L651
 	adrp	x2, .LANCHOR16
 	add	x2, x2, :lo12:.LANCHOR16
 	mov	x1, 0
-.L645:
+.L654:
 	and	w0, w1, 65535
 	cmp	x1, 3
-	bls	.L643
+	bls	.L652
 	ubfiz	w3, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 2
 	sub	w0, w3, w0
 	and	w0, w0, 65535
-.L643:
+.L652:
 	strh	w0, [x2, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L645
-	b	.L646
-.L642:
+	bne	.L654
+	b	.L655
+.L651:
 	cmp	w0, 2
-	bne	.L647
+	bne	.L656
 	adrp	x2, .LANCHOR16
 	add	x2, x2, :lo12:.LANCHOR16
 	mov	w1, 65535
 	mov	x0, 0
-.L649:
+.L658:
 	cmp	x0, 2
 	and	w3, w0, 65535
 	csel	w3, w3, w1, cc
@@ -4368,32 +4480,32 @@ BuildFlashLsbPageTable:
 	add	x0, x0, 1
 	and	w1, w1, 65535
 	cmp	x0, 256
-	bne	.L649
-	b	.L646
-.L647:
+	bne	.L658
+	b	.L655
+.L656:
 	cmp	w0, 3
-	bne	.L650
+	bne	.L659
 	adrp	x2, .LANCHOR16
 	add	x2, x2, :lo12:.LANCHOR16
 	mov	x1, 0
-.L653:
+.L662:
 	and	w0, w1, 65535
 	cmp	x1, 5
-	bls	.L651
+	bls	.L660
 	ubfiz	w3, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 4
 	sub	w0, w3, w0
 	and	w0, w0, 65535
-.L651:
+.L660:
 	strh	w0, [x2, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L653
-	b	.L646
-.L650:
+	bne	.L662
+	b	.L655
+.L659:
 	cmp	w0, 4
-	bne	.L654
+	bne	.L663
 	adrp	x2, .LANCHOR16
 	add	x1, x2, :lo12:.LANCHOR16
 	add	x1, x1, 16
@@ -4412,7 +4524,7 @@ BuildFlashLsbPageTable:
 	strh	w2, [x1, -10]
 	strh	w0, [x1, -2]
 	mov	w0, 8
-.L656:
+.L665:
 	and	w3, w0, 1
 	ubfiz	w2, w0, 1, 15
 	add	w3, w3, 6
@@ -4421,57 +4533,76 @@ BuildFlashLsbPageTable:
 	strh	w2, [x1], 2
 	and	w0, w0, 65535
 	cmp	w0, 256
-	bne	.L656
-	b	.L646
-.L654:
+	bne	.L665
+	b	.L655
+.L663:
 	cmp	w0, 5
-	bne	.L657
+	bne	.L666
 	adrp	x1, .LANCHOR16
 	add	x1, x1, :lo12:.LANCHOR16
 	mov	x0, 0
-.L658:
+.L667:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 16
-	bne	.L658
+	bne	.L667
 	add	x1, x1, 32
-.L659:
+.L668:
 	strh	w0, [x1], 2
 	add	w0, w0, 2
 	and	w0, w0, 65535
 	cmp	w0, 496
-	bne	.L659
-	b	.L646
-.L657:
+	bne	.L668
+	b	.L655
+.L666:
 	cmp	w0, 6
-	bne	.L646
+	bne	.L669
 	adrp	x3, .LANCHOR16
 	add	x3, x3, :lo12:.LANCHOR16
 	mov	w1, 0
 	mov	x2, 0
 	mov	w4, 12
 	mov	w5, 10
-.L662:
+.L672:
 	and	w0, w2, 65535
 	cmp	x2, 5
-	bls	.L660
+	bls	.L670
 	tst	x0, 1
 	csel	w0, w4, w5, ne
 	sub	w0, w1, w0
 	and	w0, w0, 65535
-.L660:
+.L670:
 	strh	w0, [x3, x2, lsl 1]
 	add	w1, w1, 3
 	and	w1, w1, 65535
 	add	x2, x2, 1
 	cmp	w1, 768
-	bne	.L662
-	b	.L646
-.L663:
+	bne	.L672
+	b	.L655
+.L669:
+	cmp	w0, 9
+	bne	.L655
+	adrp	x1, .LANCHOR16
+	add	x0, x1, :lo12:.LANCHOR16
+	strh	wzr, [x1, #:lo12:.LANCHOR16]
+	mov	w1, 1
+	strh	w1, [x0, 2]
+	mov	w1, 2
+	strh	w1, [x0, 4]
+	add	x1, x0, 6
+	mov	w0, 3
+.L673:
+	strh	w0, [x1], 2
+	add	w0, w0, 2
+	and	w0, w0, 65535
+	cmp	w0, 509
+	bne	.L673
+	b	.L655
+.L674:
 	ldrh	w2, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	strh	w2, [x19, w2, sxtw 1]
-	b	.L641
+	b	.L650
 	.size	BuildFlashLsbPageTable, .-BuildFlashLsbPageTable
 	.section	.text.FlashDieInfoInit,"ax",@progbits
 	.align	2
@@ -4481,32 +4612,28 @@ FlashDieInfoInit:
 	stp	x29, x30, [sp, -80]!
 	adrp	x0, .LANCHOR31+10
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR25
-	adrp	x20, .LANCHOR121
-	stp	x23, x24, [sp, 48]
 	ldrh	w0, [x0, #:lo12:.LANCHOR31+10]
-	adrp	x23, .LANCHOR3
-	stp	x21, x22, [sp, 32]
-	strb	wzr, [x19, #:lo12:.LANCHOR25]
-	cmp	w0, 256
-	strb	wzr, [x20, #:lo12:.LANCHOR121]
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR121
 	str	x25, [sp, 64]
-	bls	.L679
-	mov	w0, 512
-.L696:
-	adrp	x25, .LANCHOR26
-	add	x22, x25, :lo12:.LANCHOR26
-	str	w0, [x23, #:lo12:.LANCHOR3]
+	adrp	x25, .LANCHOR25
+	stp	x21, x22, [sp, 32]
+	mov	x22, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x24, .LANCHOR26
+	strb	wzr, [x19, #:lo12:.LANCHOR121]
+	add	x21, x24, :lo12:.LANCHOR26
+	strb	wzr, [x25, #:lo12:.LANCHOR25]
+	bl	FlashBlockAlignInit
 	mov	w2, 8
 	mov	w1, 0
-	mov	x0, x22
-	adrp	x24, .LANCHOR17
+	adrp	x23, .LANCHOR17
+	mov	x0, x21
+	add	x20, x23, :lo12:.LANCHOR17
 	bl	ftl_memset
-	add	x21, x24, :lo12:.LANCHOR17
 	mov	w2, 32
 	mov	w1, 0
-	mov	x0, x21
+	mov	x0, x20
 	bl	ftl_memset
 	mov	w2, 192
 	mov	w1, 0
@@ -4514,35 +4641,34 @@ FlashDieInfoInit:
 	add	x0, x0, :lo12:.LANCHOR23
 	bl	ftl_memset
 	adrp	x0, .LANCHOR18
-	adrp	x12, .LANCHOR22
-	add	x14, x19, :lo12:.LANCHOR25
-	add	x15, x12, :lo12:.LANCHOR22
+	adrp	x13, .LANCHOR22
+	add	x15, x25, :lo12:.LANCHOR25
+	add	x10, x13, :lo12:.LANCHOR22
 	ldr	x7, [x0, #:lo12:.LANCHOR18]
-	mov	x8, 0
-	add	x10, x7, 1
-	ldrb	w11, [x7]
-.L683:
-	mov	w2, w11
-	add	x1, x15, x8, lsl 3
-	mov	x0, x10
+	add	x11, x7, 1
+	ldrb	w12, [x7]
+.L692:
+	mov	w2, w12
+	add	x1, x10, x22, lsl 3
+	mov	x0, x11
 	bl	FlashMemCmp8
-	cbnz	w0, .L682
-	ldrb	w1, [x14]
+	cbnz	w0, .L691
+	ldrb	w1, [x15]
 	add	w0, w1, 1
-	strb	w0, [x14]
-	str	wzr, [x21, x1, lsl 2]
-	strb	w8, [x22, x1]
-.L682:
-	add	x8, x8, 1
-	cmp	x8, 4
-	bne	.L683
-	ldrb	w0, [x19, #:lo12:.LANCHOR25]
-	strb	w0, [x20, #:lo12:.LANCHOR121]
+	strb	w0, [x15]
+	str	wzr, [x20, x1, lsl 2]
+	strb	w22, [x21, x1]
+.L691:
+	add	x22, x22, 1
+	cmp	x22, 4
+	bne	.L692
+	ldrb	w0, [x25, #:lo12:.LANCHOR25]
+	strb	w0, [x19, #:lo12:.LANCHOR121]
 	ldrb	w0, [x7, 8]
 	cmp	w0, 2
-	beq	.L684
-.L688:
-	ldrb	w0, [x19, #:lo12:.LANCHOR25]
+	beq	.L693
+.L697:
+	ldrb	w0, [x25, #:lo12:.LANCHOR25]
 	ldrh	w1, [x7, 14]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -4555,45 +4681,41 @@ FlashDieInfoInit:
 	ldp	x29, x30, [sp], 80
 	strh	w0, [x1, #:lo12:.LANCHOR122]
 	ret
-.L679:
-	cmp	w0, 128
-	bls	.L696
-	mov	w0, 256
-	b	.L696
-.L684:
-	ldr	w20, [x23, #:lo12:.LANCHOR3]
-	add	x12, x12, :lo12:.LANCHOR22
-	add	x14, x19, :lo12:.LANCHOR25
-	add	x24, x24, :lo12:.LANCHOR17
-	add	x13, x25, :lo12:.LANCHOR26
-	mov	x15, 0
-.L687:
-	mov	w2, w11
-	add	x1, x12, x15, lsl 3
-	mov	x0, x10
+.L693:
+	adrp	x0, .LANCHOR3
+	add	x13, x13, :lo12:.LANCHOR22
+	add	x15, x25, :lo12:.LANCHOR25
+	add	x23, x23, :lo12:.LANCHOR17
+	ldr	w20, [x0, #:lo12:.LANCHOR3]
+	add	x14, x24, :lo12:.LANCHOR26
+	mov	x19, 0
+.L696:
+	mov	w2, w12
+	add	x1, x13, x19, lsl 3
+	mov	x0, x11
 	bl	FlashMemCmp8
-	cbnz	w0, .L685
+	cbnz	w0, .L694
 	ldrb	w2, [x7, 13]
 	ldrh	w0, [x7, 14]
-	ldrb	w1, [x14]
+	ldrb	w1, [x15]
 	and	w0, w0, 65280
 	mul	w2, w2, w20
 	mul	w0, w0, w2
 	sxtw	x2, w1
-	str	w0, [x24, x2, lsl 2]
+	str	w0, [x23, x2, lsl 2]
 	ldrb	w3, [x7, 23]
-	cbz	w3, .L686
+	cbz	w3, .L695
 	lsl	w0, w0, 1
-	str	w0, [x24, x2, lsl 2]
-.L686:
+	str	w0, [x23, x2, lsl 2]
+.L695:
 	add	w1, w1, 1
-	strb	w15, [x13, x2]
-	strb	w1, [x14]
-.L685:
-	add	x15, x15, 1
-	cmp	x15, 4
-	bne	.L687
-	b	.L688
+	strb	w19, [x14, x2]
+	strb	w1, [x15]
+.L694:
+	add	x19, x19, 1
+	cmp	x19, 4
+	bne	.L696
+	b	.L697
 	.size	FlashDieInfoInit, .-FlashDieInfoInit
 	.section	.text.ReadFlashInfo,"ax",@progbits
 	.align	2
@@ -4608,7 +4730,7 @@ ReadFlashInfo:
 	mov	x19, x0
 	bl	ftl_memset
 	adrp	x0, .LANCHOR18
-	adrp	x3, .LANCHOR69
+	adrp	x3, .LANCHOR68
 	mov	w4, 1
 	ldr	x1, [x0, #:lo12:.LANCHOR18]
 	adrp	x0, .LANCHOR3
@@ -4621,8 +4743,8 @@ ReadFlashInfo:
 	adrp	x0, .LANCHOR33
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	strb	w0, [x19, 7]
-	add	x0, x3, :lo12:.LANCHOR69
-	ldrb	w3, [x3, #:lo12:.LANCHOR69]
+	add	x0, x3, :lo12:.LANCHOR68
+	ldrb	w3, [x3, #:lo12:.LANCHOR68]
 	strb	w3, [x19]
 	ldrb	w3, [x0, 1]
 	strb	w3, [x19, 1]
@@ -4641,20 +4763,20 @@ ReadFlashInfo:
 	adrp	x0, .LANCHOR25
 	strb	wzr, [x19, 10]
 	ldrb	w3, [x0, #:lo12:.LANCHOR25]
-.L698:
+.L706:
 	cmp	w3, w1, uxtb
-	bhi	.L699
+	bhi	.L707
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L699:
+.L707:
 	ldrb	w0, [x1, x2]
 	add	x1, x1, 1
 	ldrb	w5, [x19, 10]
 	lsl	w0, w4, w0
 	orr	w0, w0, w5
 	strb	w0, [x19, 10]
-	b	.L698
+	b	.L706
 	.size	ReadFlashInfo, .-ReadFlashInfo
 	.section	.text.FtlBbt2Bitmap,"ax",@progbits
 	.align	2
@@ -4680,13 +4802,13 @@ FtlBbt2Bitmap:
 	mov	w1, 0
 	mov	x0, x20
 	bl	ftl_memset
-.L704:
+.L712:
 	ldrh	w0, [x21, x19]
 	cmp	w0, w24
-	beq	.L701
+	beq	.L709
 	ldrh	w1, [x22]
 	cmp	w1, w0
-	bhi	.L703
+	bhi	.L711
 	mov	w2, 79
 	mov	x1, x23
 	adrp	x0, .LC5
@@ -4697,7 +4819,7 @@ FtlBbt2Bitmap:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L703:
+.L711:
 	ldrh	w1, [x21, x19]
 	mov	w2, 1
 	add	x19, x19, 2
@@ -4709,8 +4831,8 @@ FtlBbt2Bitmap:
 	ldr	w1, [x20, x0]
 	orr	w1, w1, w2
 	str	w1, [x20, x0]
-	bne	.L704
-.L701:
+	bne	.L712
+.L709:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -4722,11 +4844,11 @@ FtlBbt2Bitmap:
 	.global	FtlBbtMemInit
 	.type	FtlBbtMemInit, %function
 FtlBbtMemInit:
-	adrp	x1, .LANCHOR75
-	add	x0, x1, :lo12:.LANCHOR75
+	adrp	x1, .LANCHOR74
+	add	x0, x1, :lo12:.LANCHOR74
 	mov	w2, -1
 	add	x0, x0, 12
-	strh	w2, [x1, #:lo12:.LANCHOR75]
+	strh	w2, [x1, #:lo12:.LANCHOR74]
 	mov	w2, 16
 	strh	wzr, [x0, -6]
 	mov	w1, 255
@@ -4738,11 +4860,11 @@ FtlBbtMemInit:
 	.type	FtlFreeSysBlkQueueInit, %function
 FtlFreeSysBlkQueueInit:
 	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR76
-	add	x3, x1, :lo12:.LANCHOR76
+	adrp	x1, .LANCHOR75
+	add	x3, x1, :lo12:.LANCHOR75
 	mov	w2, 2048
 	add	x29, sp, 0
-	strh	w0, [x1, #:lo12:.LANCHOR76]
+	strh	w0, [x1, #:lo12:.LANCHOR75]
 	mov	w1, 0
 	strh	wzr, [x3, 2]
 	add	x0, x3, 8
@@ -4773,21 +4895,21 @@ ftl_free_no_use_map_blk:
 	str	x25, [sp, 64]
 	bl	ftl_memset
 	mov	w0, 0
-.L712:
+.L720:
 	ldrh	w1, [x19, 6]
 	cmp	w1, w0
-	bhi	.L716
-	adrp	x0, .LANCHOR54
+	bhi	.L724
+	adrp	x0, .LANCHOR53
 	mov	w23, 0
 	mov	w20, 0
-	ldrh	w1, [x0, #:lo12:.LANCHOR54]
+	ldrh	w1, [x0, #:lo12:.LANCHOR53]
 	ldrh	w0, [x19]
 	strh	w1, [x21, x0, lsl 1]
 	ldrh	w24, [x21]
-.L717:
+.L725:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L721
+	bhi	.L729
 	mov	w0, w23
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -4795,64 +4917,64 @@ ftl_free_no_use_map_blk:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L716:
+.L724:
 	ubfiz	x1, x0, 2, 16
 	ldr	w2, [x20, x1]
 	mov	w1, 0
 	ubfx	x2, x2, 10, 16
-.L713:
+.L721:
 	ldrh	w3, [x19, 10]
 	cmp	w3, w1
-	bhi	.L715
+	bhi	.L723
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L712
-.L715:
+	b	.L720
+.L723:
 	ubfiz	x3, x1, 1, 16
 	ldrh	w4, [x22, x3]
 	cmp	w4, w2
-	bne	.L714
-	cbz	w2, .L714
+	bne	.L722
+	cbz	w2, .L722
 	ldrh	w4, [x21, x3]
 	add	w4, w4, 1
 	strh	w4, [x21, x3]
-.L714:
+.L722:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L713
-.L721:
+	b	.L721
+.L729:
 	ubfiz	x0, x20, 1, 16
 	ldrh	w1, [x21, x0]
 	cmp	w24, w1
-	bls	.L718
+	bls	.L726
 	add	x25, x22, x0
 	ldrh	w0, [x22, x0]
-	cbnz	w0, .L719
-.L720:
+	cbnz	w0, .L727
+.L728:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L717
-.L718:
-	cbnz	w1, .L720
+	b	.L725
+.L726:
+	cbnz	w1, .L728
 	add	x25, x22, x0
 	ldrh	w0, [x22, x0]
-	cbz	w0, .L720
-.L722:
+	cbz	w0, .L728
+.L730:
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
 	strh	wzr, [x25]
 	ldrh	w0, [x19, 8]
 	sub	w0, w0, #1
 	strh	w0, [x19, 8]
-	b	.L720
-.L723:
+	b	.L728
+.L731:
 	mov	w24, 0
-	b	.L722
-.L719:
+	b	.L730
+.L727:
 	mov	w23, w20
-	cbz	w1, .L723
+	cbz	w1, .L731
 	mov	w24, w1
-	b	.L720
+	b	.L728
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.section	.text.FtlL2PDataInit,"ax",@progbits
 	.align	2
@@ -4864,39 +4986,39 @@ FtlL2PDataInit:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR125
-	adrp	x20, .LANCHOR65
+	adrp	x20, .LANCHOR64
 	stp	x21, x22, [sp, 32]
 	ldr	x0, [x19, #:lo12:.LANCHOR125]
-	adrp	x22, .LANCHOR58
-	ldr	w2, [x20, #:lo12:.LANCHOR65]
-	adrp	x21, .LANCHOR68
+	adrp	x22, .LANCHOR57
+	ldr	w2, [x20, #:lo12:.LANCHOR64]
+	adrp	x21, .LANCHOR67
 	str	x23, [sp, 48]
 	adrp	x23, .LANCHOR126
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	ldrh	w0, [x21, #:lo12:.LANCHOR68]
+	ldrh	w0, [x21, #:lo12:.LANCHOR67]
 	mov	w1, 255
-	ldrh	w2, [x22, #:lo12:.LANCHOR58]
+	ldrh	w2, [x22, #:lo12:.LANCHOR57]
 	mul	w2, w2, w0
 	ldr	x0, [x23, #:lo12:.LANCHOR126]
 	bl	ftl_memset
-	adrp	x0, .LANCHOR97
-	ldrh	w3, [x21, #:lo12:.LANCHOR68]
+	adrp	x0, .LANCHOR96
+	ldrh	w3, [x21, #:lo12:.LANCHOR67]
 	ldr	x6, [x23, #:lo12:.LANCHOR126]
 	mov	x1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR97]
+	ldr	x0, [x0, #:lo12:.LANCHOR96]
 	mov	w2, -1
-	ldrh	w5, [x22, #:lo12:.LANCHOR58]
+	ldrh	w5, [x22, #:lo12:.LANCHOR57]
 	add	x3, x0, x3, lsl 4
-.L733:
+.L741:
 	add	x4, x1, x5
 	cmp	x0, x3
-	bne	.L734
+	bne	.L742
 	adrp	x1, .LANCHOR127
 	add	x0, x1, :lo12:.LANCHOR127
 	ldp	x21, x22, [sp, 32]
 	strh	w2, [x1, #:lo12:.LANCHOR127]
-	ldr	w1, [x20, #:lo12:.LANCHOR65]
+	ldr	w1, [x20, #:lo12:.LANCHOR64]
 	strh	w1, [x0, 10]
 	mov	w1, -3902
 	strh	w1, [x0, 4]
@@ -4905,8 +5027,8 @@ FtlL2PDataInit:
 	strh	w2, [x0, 2]
 	ldrh	w1, [x1, #:lo12:.LANCHOR128]
 	strh	w1, [x0, 8]
-	adrp	x1, .LANCHOR67
-	ldrh	w1, [x1, #:lo12:.LANCHOR67]
+	adrp	x1, .LANCHOR66
+	ldrh	w1, [x1, #:lo12:.LANCHOR66]
 	strh	w1, [x0, 6]
 	adrp	x1, .LANCHOR129
 	ldr	x1, [x1, #:lo12:.LANCHOR129]
@@ -4922,7 +5044,7 @@ FtlL2PDataInit:
 	str	x1, [x0, 40]
 	ldp	x29, x30, [sp], 64
 	ret
-.L734:
+.L742:
 	and	x1, x1, -4
 	strh	w2, [x0]
 	add	x1, x6, x1
@@ -4930,7 +5052,7 @@ FtlL2PDataInit:
 	str	x1, [x0, 8]
 	add	x0, x0, 16
 	mov	x1, x4
-	b	.L733
+	b	.L741
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
 	.section	.text.FtlVariablesInit,"ax",@progbits
 	.align	2
@@ -4956,18 +5078,18 @@ FtlVariablesInit:
 	adrp	x0, .LANCHOR28
 	mov	w1, 0
 	str	wzr, [x0, #:lo12:.LANCHOR28]
+	adrp	x0, .LANCHOR70
+	strh	wzr, [x0, #:lo12:.LANCHOR70]
+	adrp	x0, .LANCHOR61
+	ldrh	w2, [x0, #:lo12:.LANCHOR61]
 	adrp	x0, .LANCHOR71
-	strh	wzr, [x0, #:lo12:.LANCHOR71]
-	adrp	x0, .LANCHOR62
-	ldrh	w2, [x0, #:lo12:.LANCHOR62]
-	adrp	x0, .LANCHOR72
-	ldr	x0, [x0, #:lo12:.LANCHOR72]
+	ldr	x0, [x0, #:lo12:.LANCHOR71]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	adrp	x0, .LANCHOR79
+	adrp	x0, .LANCHOR78
 	ldrh	w2, [x19, #:lo12:.LANCHOR41]
 	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR79]
+	ldr	x0, [x0, #:lo12:.LANCHOR78]
 	lsl	w2, w2, 1
 	bl	ftl_memset
 	adrp	x0, .LANCHOR137
@@ -4978,8 +5100,8 @@ FtlVariablesInit:
 	bl	ftl_memset
 	mov	w2, 48
 	mov	w1, 0
-	adrp	x0, .LANCHOR81
-	add	x0, x0, :lo12:.LANCHOR81
+	adrp	x0, .LANCHOR80
+	add	x0, x0, :lo12:.LANCHOR80
 	bl	ftl_memset
 	mov	w2, 512
 	mov	w1, 0
@@ -5005,13 +5127,13 @@ SupperBlkListInit:
 	ldrh	w2, [x0, #:lo12:.LANCHOR41]
 	mov	w0, 6
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR82
+	adrp	x24, .LANCHOR81
 	stp	x19, x20, [sp, 16]
-	adrp	x23, .LANCHOR86
+	adrp	x23, .LANCHOR85
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR89
+	adrp	x22, .LANCHOR88
 	mul	w2, w2, w0
-	ldr	x0, [x24, #:lo12:.LANCHOR82]
+	ldr	x0, [x24, #:lo12:.LANCHOR81]
 	stp	x25, x26, [sp, 64]
 	adrp	x25, .LANCHOR40
 	str	x27, [sp, 80]
@@ -5020,95 +5142,95 @@ SupperBlkListInit:
 	add	x26, x26, :lo12:.LANCHOR47
 	bl	ftl_memset
 	mov	w21, 0
-	adrp	x0, .LANCHOR88
+	adrp	x0, .LANCHOR87
 	mov	w20, 0
 	mov	w19, 0
-	strh	wzr, [x23, #:lo12:.LANCHOR86]
-	str	xzr, [x0, #:lo12:.LANCHOR88]
-	adrp	x0, .LANCHOR83
-	strh	wzr, [x22, #:lo12:.LANCHOR89]
+	strh	wzr, [x23, #:lo12:.LANCHOR85]
+	str	xzr, [x0, #:lo12:.LANCHOR87]
+	adrp	x0, .LANCHOR82
+	strh	wzr, [x22, #:lo12:.LANCHOR88]
 	adrp	x27, .LANCHOR38
-	str	xzr, [x0, #:lo12:.LANCHOR83]
-	adrp	x0, .LANCHOR85
-	str	xzr, [x0, #:lo12:.LANCHOR85]
+	str	xzr, [x0, #:lo12:.LANCHOR82]
+	adrp	x0, .LANCHOR84
+	str	xzr, [x0, #:lo12:.LANCHOR84]
 	adrp	x0, .LANCHOR139
 	strh	wzr, [x0, #:lo12:.LANCHOR139]
-.L739:
+.L747:
 	ldrh	w0, [x25]
 	cmp	w19, w0
-	bge	.L746
-	adrp	x0, .LANCHOR53
+	bge	.L754
+	adrp	x0, .LANCHOR52
 	ldrh	w8, [x27, #:lo12:.LANCHOR38]
 	mov	w5, 0
 	mov	w6, 0
-	ldrh	w7, [x0, #:lo12:.LANCHOR53]
-	b	.L747
-.L741:
+	ldrh	w7, [x0, #:lo12:.LANCHOR52]
+	b	.L755
+.L749:
 	ldrb	w0, [x26, w6, sxtw]
 	mov	w1, w19
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L740
+	cbnz	w0, .L748
 	add	w5, w7, w5
 	sxth	w5, w5
-.L740:
+.L748:
 	add	w6, w6, 1
 	sxth	w6, w6
-.L747:
+.L755:
 	cmp	w6, w8
-	blt	.L741
-	cbz	w5, .L742
+	blt	.L749
+	cbz	w5, .L750
 	mov	w0, 32768
 	sdiv	w5, w0, w5
 	sxth	w5, w5
-.L743:
-	ldr	x1, [x24, #:lo12:.LANCHOR82]
+.L751:
+	ldr	x1, [x24, #:lo12:.LANCHOR81]
 	mov	w0, 6
 	smaddl	x0, w19, w0, x1
 	strh	w5, [x0, 4]
+	adrp	x0, .LANCHOR91
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	cmp	w19, w0
+	beq	.L752
 	adrp	x0, .LANCHOR92
 	ldrh	w0, [x0, #:lo12:.LANCHOR92]
 	cmp	w19, w0
-	beq	.L744
+	beq	.L752
 	adrp	x0, .LANCHOR93
 	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w19, w0
-	beq	.L744
-	adrp	x0, .LANCHOR94
-	ldrh	w0, [x0, #:lo12:.LANCHOR94]
-	cmp	w19, w0
-	beq	.L744
-	adrp	x0, .LANCHOR84
-	ldr	x0, [x0, #:lo12:.LANCHOR84]
+	beq	.L752
+	adrp	x0, .LANCHOR83
+	ldr	x0, [x0, #:lo12:.LANCHOR83]
 	ldrh	w0, [x0, w19, sxtw 1]
-	cbnz	w0, .L745
+	cbnz	w0, .L753
 	add	w21, w21, 1
 	mov	w0, w19
 	and	w21, w21, 65535
 	bl	INSERT_FREE_LIST
-.L744:
+.L752:
 	add	w19, w19, 1
 	sxth	w19, w19
-	b	.L739
-.L742:
-	adrp	x0, .LANCHOR84
+	b	.L747
+.L750:
+	adrp	x0, .LANCHOR83
 	mov	w1, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR84]
+	ldr	x0, [x0, #:lo12:.LANCHOR83]
 	strh	w1, [x0, w19, sxtw 1]
-	b	.L743
-.L745:
+	b	.L751
+.L753:
 	add	w20, w20, 1
 	mov	w0, w19
 	and	w20, w20, 65535
 	bl	INSERT_DATA_LIST
-	b	.L744
-.L746:
-	strh	w20, [x23, #:lo12:.LANCHOR86]
+	b	.L752
+.L754:
+	strh	w20, [x23, #:lo12:.LANCHOR85]
 	add	w20, w20, w21
-	strh	w21, [x22, #:lo12:.LANCHOR89]
+	strh	w21, [x22, #:lo12:.LANCHOR88]
 	cmp	w0, w20
-	bge	.L748
-	mov	w2, 2614
+	bge	.L756
+	mov	w2, 2645
 	adrp	x1, .LANCHOR140
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR140
@@ -5119,7 +5241,7 @@ SupperBlkListInit:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L748:
+.L756:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -5135,25 +5257,25 @@ SupperBlkListInit:
 	.type	FtlGcPageVarInit, %function
 FtlGcPageVarInit:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR109
+	adrp	x0, .LANCHOR108
 	mov	w1, 255
 	add	x29, sp, 0
-	strh	wzr, [x0, #:lo12:.LANCHOR109]
-	adrp	x0, .LANCHOR111
-	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR55
-	strh	wzr, [x0, #:lo12:.LANCHOR111]
+	strh	wzr, [x0, #:lo12:.LANCHOR108]
 	adrp	x0, .LANCHOR110
-	ldrh	w2, [x19, #:lo12:.LANCHOR55]
-	ldr	x0, [x0, #:lo12:.LANCHOR110]
+	str	x19, [sp, 16]
+	adrp	x19, .LANCHOR54
+	strh	wzr, [x0, #:lo12:.LANCHOR110]
+	adrp	x0, .LANCHOR109
+	ldrh	w2, [x19, #:lo12:.LANCHOR54]
+	ldr	x0, [x0, #:lo12:.LANCHOR109]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	ldrh	w2, [x19, #:lo12:.LANCHOR55]
+	ldrh	w2, [x19, #:lo12:.LANCHOR54]
 	mov	w0, 12
 	mov	w1, 255
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR112
-	ldr	x0, [x0, #:lo12:.LANCHOR112]
+	adrp	x0, .LANCHOR111
+	ldr	x0, [x0, #:lo12:.LANCHOR111]
 	bl	ftl_memset
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -5203,7 +5325,7 @@ FlashReadIdbData:
 	.global	FlashLoadPhyInfoInRam
 	.type	FlashLoadPhyInfoInRam, %function
 FlashLoadPhyInfoInRam:
-	stp	x29, x30, [sp, -32]!
+	stp	x29, x30, [sp, -48]!
 	adrp	x0, .LANCHOR142
 	add	x8, x0, :lo12:.LANCHOR142
 	adrp	x11, .LANCHOR22
@@ -5213,57 +5335,62 @@ FlashLoadPhyInfoInRam:
 	add	x11, x11, :lo12:.LANCHOR22
 	stp	x19, x20, [sp, 16]
 	mov	x10, 0
-.L760:
+	str	x21, [sp, 32]
+.L768:
 	ldrb	w2, [x8, -1]
 	mov	w12, w10
-	lsl	x20, x10, 5
+	lsl	x21, x10, 5
 	mov	x1, x11
 	mov	x0, x8
 	bl	FlashMemCmp8
-	mov	w19, w0
-	cbnz	w0, .L758
+	mov	w20, w0
+	cbnz	w0, .L766
 	add	x0, x7, :lo12:.LANCHOR142
 	ubfiz	x12, x12, 5, 32
-	add	x20, x0, x20
+	add	x21, x0, x21
 	add	x0, x0, x12
 	adrp	x1, .LANCHOR143
 	add	x4, x1, :lo12:.LANCHOR143
 	ldrb	w3, [x0, 22]
 	mov	x0, 0
-.L759:
+.L767:
 	lsl	x5, x0, 5
 	mov	w2, w0
 	ldrb	w5, [x5, x4]
 	cmp	w5, w3
-	beq	.L762
+	beq	.L770
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L759
+	bne	.L767
 	mov	w2, w0
-.L762:
+.L770:
 	ubfiz	x0, x2, 5, 32
 	add	x1, x1, :lo12:.LANCHOR143
+	adrp	x19, .LANCHOR31
+	add	x19, x19, :lo12:.LANCHOR31
 	add	x1, x1, x0
 	mov	w2, 32
 	adrp	x0, .LANCHOR7
 	add	x0, x0, :lo12:.LANCHOR7
 	bl	ftl_memcpy
 	mov	w2, 32
-	mov	x1, x20
-	adrp	x0, .LANCHOR31
-	add	x0, x0, :lo12:.LANCHOR31
+	mov	x1, x21
+	mov	x0, x19
 	bl	ftl_memcpy
-	b	.L757
-.L758:
+	ldrh	w0, [x19, 10]
+	bl	FlashBlockAlignInit
+	b	.L765
+.L766:
 	add	x10, x10, 1
 	add	x8, x8, 32
-	cmp	x10, 77
-	bne	.L760
-	mov	w19, -1
-.L757:
-	mov	w0, w19
+	cmp	x10, 81
+	bne	.L768
+	mov	w20, -1
+.L765:
+	mov	w0, w20
+	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 32
+	ldp	x29, x30, [sp], 48
 	ret
 	.size	FlashLoadPhyInfoInRam, .-FlashLoadPhyInfoInRam
 	.section	.text.ftl_memcpy32,"ax",@progbits
@@ -5272,15 +5399,15 @@ FlashLoadPhyInfoInRam:
 	.type	ftl_memcpy32, %function
 ftl_memcpy32:
 	mov	x3, 0
-.L767:
+.L775:
 	cmp	w2, w3
-	bhi	.L768
+	bhi	.L776
 	ret
-.L768:
+.L776:
 	ldr	w4, [x1, x3, lsl 2]
 	str	w4, [x0, x3, lsl 2]
 	add	x3, x3, 1
-	b	.L767
+	b	.L775
 	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.NandcCopy1KB,"ax",@progbits
 	.align	2
@@ -5299,15 +5426,15 @@ NandcCopy1KB:
 	ubfiz	x0, x19, 9, 8
 	mov	x20, x4
 	add	x0, x2, x0
-	bne	.L770
-	cbz	x3, .L771
+	bne	.L778
+	cbz	x3, .L779
 	tst	x3, 3
-	bne	.L772
+	bne	.L780
 	mov	w2, 256
 	mov	x1, x3
 	bl	ftl_memcpy32
-.L771:
-	cbz	x20, .L769
+.L779:
+	cbz	x20, .L777
 	ldrb	w0, [x20]
 	lsr	w19, w19, 1
 	ldrb	w1, [x20, 1]
@@ -5319,26 +5446,26 @@ NandcCopy1KB:
 	mov	w1, 12
 	mul	w19, w19, w1
 	str	w0, [x21, w19, sxtw 2]
-.L769:
+.L777:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L772:
+.L780:
 	mov	w2, 1024
 	mov	x1, x3
 	bl	ftl_memcpy
-	b	.L771
-.L770:
-	cbz	x3, .L775
+	b	.L779
+.L778:
+	cbz	x3, .L783
 	tst	x3, 3
-	bne	.L776
+	bne	.L784
 	mov	x1, x0
 	mov	w2, 256
 	mov	x0, x3
 	bl	ftl_memcpy32
-.L775:
-	cbz	x20, .L769
+.L783:
+	cbz	x20, .L777
 	lsr	w19, w19, 1
 	mov	w0, 12
 	mul	w19, w19, w0
@@ -5350,13 +5477,13 @@ NandcCopy1KB:
 	lsr	w0, w0, 24
 	strb	w1, [x20, 2]
 	strb	w0, [x20, 3]
-	b	.L769
-.L776:
+	b	.L777
+.L784:
 	mov	x1, x0
 	mov	w2, 1024
 	mov	x0, x3
 	bl	ftl_memcpy
-	b	.L775
+	b	.L783
 	.size	NandcCopy1KB, .-NandcCopy1KB
 	.section	.text.NandcXferData,"ax",@progbits
 	.align	2
@@ -5380,14 +5507,14 @@ NandcXferData:
 	and	w24, w2, 255
 	mov	x21, x4
 	ldr	x19, [x0, x1]
-	bne	.L789
-	cbnz	x4, .L790
+	bne	.L797
+	cbnz	x4, .L798
 	add	x21, x29, 128
 	mov	w2, 64
 	mov	w1, 255
 	add	x0, x29, 128
 	bl	ftl_memset
-.L790:
+.L798:
 	mov	x5, x21
 	mov	x4, x26
 	mov	w2, w24
@@ -5397,7 +5524,7 @@ NandcXferData:
 	bl	NandcXferStart
 	mov	w0, w25
 	bl	NandcXferComp
-	cbnz	w20, .L814
+	cbnz	w20, .L822
 	adrp	x0, .LANCHOR32
 	adrp	x4, .LANCHOR35
 	mov	x1, x0
@@ -5410,38 +5537,38 @@ NandcXferData:
 	add	x2, x21, x2, lsl 2
 	csel	w3, w3, w0, cc
 	mov	w0, 0
-.L793:
+.L801:
 	add	w5, w3, w0
 	cmp	x21, x2
-	bne	.L794
+	bne	.L802
 	adrp	x0, .LANCHOR34
 	ldr	w4, [x1, #:lo12:.LANCHOR32]
 	lsr	w24, w24, 2
 	mov	w2, 0
 	ldr	w3, [x0, #:lo12:.LANCHOR34]
 	mov	w22, 0
-.L795:
+.L803:
 	cmp	w2, w24
-	bcs	.L791
-	cbnz	w4, .L801
-.L791:
+	bcs	.L799
+	cbnz	w4, .L809
+.L799:
 	str	wzr, [x19, 16]
-.L802:
+.L810:
 	adrp	x0, .LANCHOR34
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	cmp	w0, 5
-	bls	.L788
-	cbnz	w20, .L788
+	bls	.L796
+	cbnz	w20, .L796
 	ldr	w0, [x19]
 	mov	w1, 8192
 	movk	w1, 0x2, lsl 16
 	and	w1, w0, w1
 	cmp	w1, 139264
-	bne	.L788
+	bne	.L796
 	orr	w0, w0, 131072
 	mov	w22, -1
 	str	w0, [x19]
-.L788:
+.L796:
 	mov	w0, w22
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -5450,7 +5577,7 @@ NandcXferData:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L794:
+.L802:
 	ldr	x6, [x4, 8]
 	and	x0, x0, 4294967292
 	add	x21, x21, 4
@@ -5463,18 +5590,18 @@ NandcXferData:
 	lsr	w0, w0, 24
 	strb	w0, [x21, -1]
 	mov	w0, w5
-	b	.L793
-.L801:
+	b	.L801
+.L809:
 	uxtw	x0, w2
 	add	x0, x0, 8
 	ldr	w0, [x19, x0, lsl 2]
 	str	w0, [x29, 120]
 	ldr	w0, [x29, 120]
-	tbnz	x0, 2, .L817
+	tbnz	x0, 2, .L825
 	ldr	w0, [x29, 120]
-	tbnz	x0, 15, .L817
+	tbnz	x0, 15, .L825
 	cmp	w3, 5
-	bls	.L797
+	bls	.L805
 	ldr	w1, [x29, 120]
 	ubfx	x6, x1, 3, 5
 	ldr	w1, [x29, 120]
@@ -5487,26 +5614,26 @@ NandcXferData:
 	orr	w0, w5, w0, lsl 5
 	cmp	w1, w0
 	ldr	w0, [x29, 120]
-	bls	.L798
+	bls	.L806
 	ubfx	x1, x0, 3, 5
 	ldr	w0, [x29, 120]
 	ubfx	x0, x0, 27, 1
-.L823:
+.L831:
 	orr	w0, w1, w0, lsl 5
-.L799:
+.L807:
 	cmp	w22, w0
 	csel	w22, w22, w0, cs
-.L796:
+.L804:
 	add	w2, w2, 1
-	b	.L795
-.L798:
+	b	.L803
+.L806:
 	ubfx	x1, x0, 16, 5
 	ldr	w0, [x29, 120]
 	ubfx	x0, x0, 29, 1
-	b	.L823
-.L797:
+	b	.L831
+.L805:
 	cmp	w3, 3
-	bls	.L818
+	bls	.L826
 	ldr	w1, [x29, 120]
 	ubfx	x6, x1, 3, 5
 	ldr	w1, [x29, 120]
@@ -5519,45 +5646,45 @@ NandcXferData:
 	orr	w0, w5, w0, lsl 5
 	cmp	w1, w0
 	ldr	w0, [x29, 120]
-	bls	.L800
+	bls	.L808
 	ubfx	x1, x0, 3, 5
 	ldr	w0, [x29, 120]
 	ubfx	x0, x0, 28, 1
-	b	.L823
-.L800:
+	b	.L831
+.L808:
 	ubfx	x1, x0, 16, 5
 	ldr	w0, [x29, 120]
 	ubfx	x0, x0, 30, 1
-	b	.L823
-.L818:
+	b	.L831
+.L826:
 	mov	w0, 0
-	b	.L799
-.L817:
+	b	.L807
+.L825:
 	mov	w22, -1
-	b	.L796
-.L814:
+	b	.L804
+.L822:
 	mov	w22, 0
-	b	.L791
-.L789:
+	b	.L799
+.L797:
 	cmp	w20, 1
-	bne	.L803
+	bne	.L811
 	cmp	x4, 0
 	mov	w23, 2
 	csel	w23, w23, wzr, ne
 	mov	w27, 0
 	lsl	w23, w23, 1
 	mov	w22, 0
-.L804:
+.L812:
 	cmp	w22, w24
-	bcc	.L806
+	bcc	.L814
 	mov	w22, 0
-	b	.L802
-.L806:
+	b	.L810
+.L814:
 	and	w28, w22, 3
-	cbz	x26, .L819
+	cbz	x26, .L827
 	lsl	w3, w22, 9
 	add	x3, x26, x3
-.L805:
+.L813:
 	add	x4, x21, x27, uxtw
 	mov	w2, w28
 	mov	w1, 1
@@ -5574,11 +5701,11 @@ NandcXferData:
 	add	w27, w27, w23
 	mov	w0, w25
 	bl	NandcXferComp
-	b	.L804
-.L819:
+	b	.L812
+.L827:
 	mov	x3, 0
-	b	.L805
-.L803:
+	b	.L813
+.L811:
 	mov	w0, w25
 	mov	x5, 0
 	mov	x4, 0
@@ -5594,16 +5721,16 @@ NandcXferData:
 	lsl	w0, w27, 1
 	mov	w22, 0
 	str	w0, [x29, 108]
-.L807:
+.L815:
 	cmp	w24, w23
-	bls	.L802
+	bls	.L810
 	mov	w0, w25
 	bl	NandcXferComp
 	ldr	w0, [x19, 32]
 	add	w27, w23, 2
 	str	w0, [x29, 120]
 	cmp	w24, w27
-	bls	.L808
+	bls	.L816
 	mov	x5, 0
 	mov	x4, 0
 	and	w3, w27, 3
@@ -5611,9 +5738,9 @@ NandcXferData:
 	mov	w1, 0
 	mov	w0, w25
 	bl	NandcXferStart
-.L808:
+.L816:
 	ldr	w0, [x29, 120]
-	tbnz	x0, 2, .L820
+	tbnz	x0, 2, .L828
 	ldr	w0, [x29, 120]
 	ubfx	x1, x0, 3, 5
 	ldr	w0, [x29, 120]
@@ -5621,12 +5748,12 @@ NandcXferData:
 	orr	w0, w1, w0, lsl 5
 	cmp	w22, w0
 	csel	w22, w22, w0, cs
-.L809:
+.L817:
 	and	w2, w23, 3
-	cbz	x26, .L821
+	cbz	x26, .L829
 	lsl	w3, w23, 9
 	add	x3, x26, x3
-.L810:
+.L818:
 	add	x4, x21, x28, uxtw
 	mov	x0, x19
 	mov	w1, 0
@@ -5634,13 +5761,13 @@ NandcXferData:
 	ldr	w0, [x29, 108]
 	mov	w23, w27
 	add	w28, w28, w0
-	b	.L807
-.L820:
+	b	.L815
+.L828:
 	mov	w22, -1
-	b	.L809
-.L821:
+	b	.L817
+.L829:
 	mov	x3, 0
-	b	.L810
+	b	.L818
 	.size	NandcXferData, .-NandcXferData
 	.section	.text.FlashReadRawPage,"ax",@progbits
 	.align	2
@@ -5658,7 +5785,7 @@ FlashReadRawPage:
 	mov	x22, x2
 	mov	x23, x3
 	ldrb	w20, [x1, #:lo12:.LANCHOR31+9]
-	bne	.L825
+	bne	.L833
 	adrp	x0, .LANCHOR2
 	adrp	x1, .LANCHOR3
 	ldrb	w0, [x0, #:lo12:.LANCHOR2]
@@ -5667,7 +5794,7 @@ FlashReadRawPage:
 	cmp	w0, w21
 	mov	w0, 4
 	csel	w20, w20, w0, ls
-.L825:
+.L833:
 	mov	w0, w19
 	bl	NandcWaitFlashReady
 	mov	w0, w19
@@ -5720,7 +5847,7 @@ FlashDdrTunningRead:
 	cmp	w0, 8
 	mov	w0, 12
 	csel	w22, w22, w0, cc
-	cbz	w4, .L841
+	cbz	w4, .L849
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
@@ -5739,10 +5866,10 @@ FlashDdrTunningRead:
 	ldrb	w0, [x19, #:lo12:.LANCHOR24]
 	bl	NandcSetMode
 	cmn	w21, #1
-	bne	.L830
-.L839:
+	bne	.L838
+.L847:
 	mov	w21, -1
-.L827:
+.L835:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -5751,7 +5878,7 @@ FlashDdrTunningRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L830:
+.L838:
 	mov	w1, w25
 	mov	w2, w21
 	adrp	x0, .LC9
@@ -5761,20 +5888,20 @@ FlashDdrTunningRead:
 	ldr	w0, [x1, #:lo12:.LANCHOR144]
 	add	w0, w0, 1
 	cmp	w0, 2047
-	bhi	.L832
+	bhi	.L840
 	str	w0, [x1, #:lo12:.LANCHOR144]
-	b	.L827
-.L832:
+	b	.L835
+.L840:
 	str	wzr, [x1, #:lo12:.LANCHOR144]
 	mov	x28, 0
 	mov	x23, 0
-.L829:
+.L837:
 	mov	w5, 0
 	mov	w20, 0
 	mov	w6, 0
 	mov	w19, 0
 	mov	w27, -1
-.L837:
+.L845:
 	stp	w5, w6, [x29, 100]
 	mov	w0, w22
 	bl	NandcSetDdrPara
@@ -5786,65 +5913,65 @@ FlashDdrTunningRead:
 	add	w1, w21, 1
 	cmp	w0, w1
 	ldp	w5, w6, [x29, 100]
-	bhi	.L833
+	bhi	.L841
 	cmp	w0, 2
-	bhi	.L843
+	bhi	.L851
 	add	w19, w19, 1
 	cmp	w19, 9
-	bls	.L843
+	bls	.L851
 	mov	w1, w20
 	mov	w21, w0
 	sub	w20, w22, w19
 	mov	w27, 0
-.L835:
+.L843:
 	cmp	w19, w6
 	csel	w20, w20, w1, hi
-.L836:
-	cbz	w20, .L838
+.L844:
+	cbz	w20, .L846
 	mov	w1, w20
 	adrp	x0, .LC10
 	add	x0, x0, :lo12:.LC10
 	bl	printf
 	mov	w0, w20
 	bl	NandcSetDdrPara
-.L838:
-	cbz	w27, .L827
+.L846:
+	cbz	w27, .L835
 	adrp	x0, .LC11
 	mov	w2, w25
 	mov	w1, w24
 	add	x0, x0, :lo12:.LC11
 	bl	printf
-	cbz	w26, .L839
+	cbz	w26, .L847
 	ldr	w1, [x29, 108]
 	lsr	w0, w1, 8
 	bl	NandcSetDdrPara
-	b	.L827
-.L841:
+	b	.L835
+.L849:
 	mov	w21, 1024
-	b	.L829
-.L833:
+	b	.L837
+.L841:
 	cmp	w19, w6
-	bls	.L844
+	bls	.L852
 	sub	w20, w5, w19
 	cmp	w19, 7
-	bhi	.L836
+	bhi	.L844
 	mov	w6, w19
-.L844:
+.L852:
 	mov	w19, 0
-	b	.L834
-.L843:
+	b	.L842
+.L851:
 	mov	w5, w22
 	mov	w21, w0
 	mov	w27, 0
 	mov	x28, 0
 	mov	x23, 0
-.L834:
+.L842:
 	add	w22, w22, 2
 	cmp	w22, 69
-	bls	.L837
+	bls	.L845
 	mov	w1, w20
 	mov	w20, w5
-	b	.L835
+	b	.L843
 	.size	FlashDdrTunningRead, .-FlashDdrTunningRead
 	.section	.text.FlashReadPage,"ax",@progbits
 	.align	2
@@ -5865,14 +5992,14 @@ FlashReadPage:
 	bl	FlashReadRawPage
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L854
+	bne	.L862
 	adrp	x24, .LANCHOR5
 	ldrb	w25, [x24, #:lo12:.LANCHOR5]
-	cbnz	w25, .L855
-.L857:
+	cbnz	w25, .L863
+.L865:
 	adrp	x0, .LANCHOR30
 	ldrb	w0, [x0, #:lo12:.LANCHOR30]
-	cbz	w0, .L854
+	cbz	w0, .L862
 	adrp	x0, .LANCHOR19
 	mov	w4, 1
 	mov	x3, x23
@@ -5884,16 +6011,16 @@ FlashReadPage:
 	bl	FlashDdrTunningRead
 	mov	w19, w0
 	cmn	w0, #1
-	beq	.L858
+	beq	.L866
 	adrp	x0, .LANCHOR33
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	cmp	w19, w0, lsr 1
-	bls	.L854
-.L858:
+	bls	.L862
+.L866:
 	lsr	w0, w24, 8
 	bl	NandcSetDdrPara
-	b	.L854
-.L855:
+	b	.L862
+.L863:
 	strb	wzr, [x24, #:lo12:.LANCHOR5]
 	mov	x3, x23
 	mov	x2, x22
@@ -5902,14 +6029,14 @@ FlashReadPage:
 	bl	FlashReadRawPage
 	strb	w25, [x24, #:lo12:.LANCHOR5]
 	cmn	w0, #1
-	beq	.L857
+	beq	.L865
 	mov	w19, w0
-.L854:
+.L862:
 	adrp	x24, .LANCHOR145
 	ldr	x4, [x24, #:lo12:.LANCHOR145]
-	cbz	x4, .L853
+	cbz	x4, .L861
 	cmn	w19, #1
-	bne	.L853
+	bne	.L861
 	mov	x3, x23
 	mov	x2, x22
 	mov	w1, w21
@@ -5923,10 +6050,10 @@ FlashReadPage:
 	add	x0, x0, :lo12:.LC12
 	bl	printf
 	cmn	w19, #1
-	bne	.L853
-	adrp	x0, .LANCHOR8
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L853
+	bne	.L861
+	adrp	x0, .LANCHOR15
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	cbz	w0, .L861
 	mov	w0, w20
 	bl	flash_enter_slc_mode
 	ldr	x4, [x24, #:lo12:.LANCHOR145]
@@ -5938,7 +6065,7 @@ FlashReadPage:
 	mov	w19, w0
 	mov	w0, w20
 	bl	flash_exit_slc_mode
-.L853:
+.L861:
 	mov	w0, w19
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -5977,27 +6104,27 @@ FlashDdrParaScan:
 	adrp	x20, .LANCHOR30
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	beq	.L874
+	beq	.L882
 	cmn	w22, #1
-	bne	.L875
-.L874:
+	bne	.L883
+.L882:
 	ldrb	w0, [x19, #:lo12:.LANCHOR24]
-	tbz	x0, 0, .L875
+	tbz	x0, 0, .L883
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
 	bl	NandcSetMode
 	strb	wzr, [x20, #:lo12:.LANCHOR30]
-.L876:
+.L884:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L875:
+.L883:
 	mov	w0, 1
 	strb	w0, [x20, #:lo12:.LANCHOR30]
-	b	.L876
+	b	.L884
 	.size	FlashDdrParaScan, .-FlashDdrParaScan
 	.section	.text.FlashLoadPhyInfo,"ax",@progbits
 	.align	2
@@ -6007,10 +6134,10 @@ FlashLoadPhyInfo:
 	stp	x29, x30, [sp, -128]!
 	mov	w0, 60
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR31
 	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR3
 	adrp	x22, .LANCHOR147
+	stp	x19, x20, [sp, 16]
 	strb	w0, [x29, 120]
 	mov	w0, 40
 	strb	w0, [x29, 121]
@@ -6018,28 +6145,27 @@ FlashLoadPhyInfo:
 	strb	w0, [x29, 122]
 	mov	w0, 16
 	strb	w0, [x29, 123]
-	add	x0, x20, :lo12:.LANCHOR31
+	adrp	x20, .LANCHOR146
+	ldr	w0, [x21, #:lo12:.LANCHOR3]
+	mov	w19, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x21, .LANCHOR146
 	adrp	x24, .LANCHOR148
-	stp	x25, x26, [sp, 64]
-	ldrh	w0, [x0, 10]
-	adrp	x26, .LANCHOR7
 	str	w0, [x29, 108]
-	mov	w19, 0
-	ldr	x0, [x22, #:lo12:.LANCHOR147]
-	mov	w25, 4
-	str	x0, [x21, #:lo12:.LANCHOR146]
 	mov	w23, -1
+	ldr	x0, [x22, #:lo12:.LANCHOR147]
+	stp	x25, x26, [sp, 64]
+	adrp	x25, .LANCHOR31
+	str	x0, [x20, #:lo12:.LANCHOR146]
+	mov	w26, 4
 	stp	x27, x28, [sp, 80]
-	add	x26, x26, :lo12:.LANCHOR7
+	add	x25, x25, :lo12:.LANCHOR31
 	str	wzr, [x24, #:lo12:.LANCHOR148]
 	mov	w0, 0
 	bl	flash_enter_slc_mode
-.L885:
+.L893:
 	add	w28, w19, 1
 	mov	x27, 0
-.L887:
+.L895:
 	add	x0, x29, 120
 	ldrb	w0, [x0, x27]
 	bl	FlashBchSel
@@ -6049,85 +6175,86 @@ FlashLoadPhyInfo:
 	mov	w0, 0
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	bne	.L886
+	bne	.L894
 	ldr	x2, [x22, #:lo12:.LANCHOR147]
 	mov	x3, 0
 	mov	w1, w28
 	mov	w0, 0
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	bne	.L886
+	bne	.L894
 	add	x27, x27, 1
 	cmp	x27, 4
-	bne	.L887
-.L888:
+	bne	.L895
+.L896:
 	ldr	w0, [x29, 108]
-	subs	w25, w25, #1
+	subs	w26, w26, #1
 	add	w19, w19, w0
-	bne	.L885
-	b	.L893
-.L889:
+	bne	.L893
+	b	.L901
+.L897:
 	mov	w1, 2036
 	add	x0, x6, 12
-	bl	JSHash
+	bl	js_hash
 	ldr	w1, [x6, 8]
 	cmp	w1, w0
-	bne	.L895
-	add	x23, x20, :lo12:.LANCHOR31
+	bne	.L903
 	add	x1, x6, 160
 	mov	w2, 32
-	mov	x0, x23
+	mov	x0, x25
 	bl	ftl_memcpy
-	ldr	x1, [x21, #:lo12:.LANCHOR146]
+	ldr	x1, [x20, #:lo12:.LANCHOR146]
 	mov	w2, 32
-	mov	x0, x26
+	adrp	x0, .LANCHOR7
+	add	x0, x0, :lo12:.LANCHOR7
 	add	x1, x1, 192
 	bl	ftl_memcpy
-	ldr	x1, [x21, #:lo12:.LANCHOR146]
+	ldr	x1, [x20, #:lo12:.LANCHOR146]
 	mov	w2, 852
 	adrp	x0, .LANCHOR20
 	add	x0, x0, :lo12:.LANCHOR20
 	add	x1, x1, 224
 	bl	ftl_memcpy
-	ldr	x1, [x21, #:lo12:.LANCHOR146]
-	adrp	x0, .LANCHOR30
+	ldrh	w0, [x25, 10]
+	bl	FlashBlockAlignInit
 	str	w19, [x24, #:lo12:.LANCHOR148]
+	ldr	x1, [x20, #:lo12:.LANCHOR146]
+	adrp	x0, .LANCHOR30
 	ldr	w2, [x1, 1076]
 	strb	w2, [x0, #:lo12:.LANCHOR30]
-	ldrh	w0, [x23, 10]
+	ldr	w0, [x21, #:lo12:.LANCHOR3]
 	adrp	x2, .LANCHOR149
 	udiv	w0, w19, w0
-	add	w3, w0, 1
-	cbz	w0, .L891
-	str	w3, [x2, #:lo12:.LANCHOR149]
-.L892:
+	add	w0, w0, 1
+	cmp	w0, 1
+	bls	.L899
+.L906:
+	str	w0, [x2, #:lo12:.LANCHOR149]
 	adrp	x0, .LANCHOR150
 	ldrh	w1, [x1, 14]
 	mov	w23, 0
 	strb	w1, [x0, #:lo12:.LANCHOR150]
-	b	.L888
-.L891:
+	b	.L896
+.L899:
 	mov	w0, 2
-	str	w0, [x2, #:lo12:.LANCHOR149]
-	b	.L892
-.L895:
+	b	.L906
+.L903:
 	mov	w23, -1
-	b	.L888
-.L886:
-	ldr	x6, [x21, #:lo12:.LANCHOR146]
+	b	.L896
+.L894:
+	ldr	x6, [x20, #:lo12:.LANCHOR146]
 	mov	w1, 20036
 	movk	w1, 0x4e41, lsl 16
 	ldr	w0, [x6]
 	cmp	w0, w1
-	bne	.L888
-	cbnz	w23, .L889
-	add	x20, x20, :lo12:.LANCHOR31
-	ldrh	w0, [x20, 10]
+	bne	.L896
+	cbnz	w23, .L897
+	ldr	w0, [x21, #:lo12:.LANCHOR3]
 	udiv	w19, w19, w0
 	adrp	x0, .LANCHOR149
 	add	w19, w19, 1
 	str	w19, [x0, #:lo12:.LANCHOR149]
-.L893:
+.L901:
 	mov	w0, 0
 	bl	flash_exit_slc_mode
 	mov	w0, w23
@@ -6162,9 +6289,9 @@ ToshibaReadRetrial:
 	add	x0, x0, :lo12:.LANCHOR6
 	add	x2, x0, x1
 	ldr	x22, [x0, x1]
-	adrp	x1, .LANCHOR11
+	adrp	x1, .LANCHOR10
 	ldrb	w27, [x2, 8]
-	ldrb	w0, [x1, #:lo12:.LANCHOR11]
+	ldrb	w0, [x1, #:lo12:.LANCHOR10]
 	str	x1, [x29, 112]
 	add	x19, x27, 8
 	sub	w0, w0, #67
@@ -6172,44 +6299,44 @@ ToshibaReadRetrial:
 	and	w0, w0, 255
 	add	x19, x22, x19, lsl 8
 	cmp	w0, 1
-	bls	.L915
+	bls	.L924
 	adrp	x0, .LANCHOR30
 	ldrb	w0, [x0, #:lo12:.LANCHOR30]
-	cbz	w0, .L916
+	cbz	w0, .L925
 	mov	w23, 1
 	mov	w0, 0
 	bl	NandcSetDdrMode
-.L900:
+.L909:
 	add	x0, x22, x27, lsl 8
 	mov	w1, 92
 	str	w1, [x0, 2056]
 	mov	w1, 197
 	str	w1, [x0, 2056]
-.L899:
+.L908:
 	ldrsw	x0, [x29, 124]
 	mov	w20, 1
 	mov	w24, -1
 	add	x0, x0, 8
 	add	x0, x22, x0, lsl 8
 	str	x0, [x29, 104]
-.L901:
+.L910:
 	adrp	x0, .LANCHOR151
 	ldrb	w0, [x0, #:lo12:.LANCHOR151]
 	add	w0, w0, 1
 	cmp	w20, w0
-	bcc	.L910
+	bcc	.L919
 	mov	w28, w24
-.L909:
+.L918:
 	ldr	x0, [x29, 112]
 	mov	w1, 0
-	ldrb	w0, [x0, #:lo12:.LANCHOR11]
+	ldrb	w0, [x0, #:lo12:.LANCHOR10]
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x19
-	bhi	.L911
+	bhi	.L920
 	bl	SandiskSetRRPara
-.L912:
+.L921:
 	ldrsw	x0, [x29, 124]
 	add	x0, x0, 8
 	add	x22, x22, x0, lsl 8
@@ -6219,17 +6346,17 @@ ToshibaReadRetrial:
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L913
+	bcc	.L922
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L913:
+.L922:
 	mov	w0, w21
 	bl	NandcWaitFlashReady
-	cbz	w23, .L898
+	cbz	w23, .L907
 	mov	w0, 4
 	bl	NandcSetDdrMode
-.L898:
+.L907:
 	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6238,42 +6365,42 @@ ToshibaReadRetrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L916:
+.L925:
 	mov	w23, 0
-	b	.L900
-.L915:
+	b	.L909
+.L924:
 	mov	w23, 0
-	b	.L899
-.L910:
+	b	.L908
+.L919:
 	ldr	x0, [x29, 112]
 	mov	w1, w20
-	ldrb	w0, [x0, #:lo12:.LANCHOR11]
+	ldrb	w0, [x0, #:lo12:.LANCHOR10]
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x19
-	bhi	.L902
+	bhi	.L911
 	bl	SandiskSetRRPara
-.L903:
+.L912:
 	ldr	x0, [x29, 112]
-	ldrb	w0, [x0, #:lo12:.LANCHOR11]
+	ldrb	w0, [x0, #:lo12:.LANCHOR10]
 	cmp	w0, 34
-	bne	.L904
+	bne	.L913
 	adrp	x0, .LANCHOR151
 	ldrb	w0, [x0, #:lo12:.LANCHOR151]
 	sub	w0, w0, #3
 	cmp	w20, w0
-	bne	.L904
+	bne	.L913
 	ldr	x1, [x29, 104]
 	mov	w0, 179
 	str	w0, [x1, 8]
-.L904:
+.L913:
 	add	x0, x22, x27, lsl 8
 	mov	w1, 38
 	str	w1, [x0, 2056]
 	mov	w1, 93
 	str	w1, [x0, 2056]
-	cbz	w23, .L905
+	cbz	w23, .L914
 	mov	w0, 4
 	bl	NandcSetDdrMode
 	ldr	w1, [x29, 120]
@@ -6284,35 +6411,35 @@ ToshibaReadRetrial:
 	mov	w28, w0
 	mov	w0, 0
 	bl	NandcSetDdrMode
-.L906:
+.L915:
 	cmn	w28, #1
-	beq	.L907
+	beq	.L916
 	adrp	x0, .LANCHOR33
 	cmn	w24, #1
 	csel	w24, w24, w28, ne
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L909
+	bcc	.L918
 	mov	x26, 0
 	mov	x25, 0
-.L907:
+.L916:
 	add	w20, w20, 1
-	b	.L901
-.L902:
+	b	.L910
+.L911:
 	bl	ToshibaSetRRPara
-	b	.L903
-.L905:
+	b	.L912
+.L914:
 	ldr	w1, [x29, 120]
 	mov	x3, x26
 	mov	x2, x25
 	mov	w0, w21
 	bl	FlashReadRawPage
 	mov	w28, w0
-	b	.L906
-.L911:
+	b	.L915
+.L920:
 	bl	ToshibaSetRRPara
-	b	.L912
+	b	.L921
 	.size	ToshibaReadRetrial, .-ToshibaReadRetrial
 	.section	.text.SamsungReadRetrial,"ax",@progbits
 	.align	2
@@ -6346,12 +6473,12 @@ SamsungReadRetrial:
 	ldrb	w20, [x2, 8]
 	add	x20, x20, 8
 	add	x20, x0, x20, lsl 8
-.L927:
+.L936:
 	ldrb	w0, [x26]
 	add	w0, w0, 1
 	cmp	w21, w0
-	bcc	.L931
-.L930:
+	bcc	.L940
+.L939:
 	mov	x0, x20
 	mov	w1, 0
 	bl	SamsungSetRRPara
@@ -6359,11 +6486,11 @@ SamsungReadRetrial:
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L926
+	bcc	.L935
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L926:
+.L935:
 	mov	w0, w19
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -6372,7 +6499,7 @@ SamsungReadRetrial:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L931:
+.L940:
 	mov	w1, w21
 	mov	x0, x20
 	bl	SamsungSetRRPara
@@ -6382,21 +6509,21 @@ SamsungReadRetrial:
 	mov	w0, w22
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	beq	.L928
+	beq	.L937
 	ldrb	w1, [x27]
 	cmn	w19, #1
 	csel	w19, w19, w0, ne
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L933
+	bcc	.L942
 	mov	x25, 0
 	mov	x24, 0
-.L928:
+.L937:
 	add	w21, w21, 1
-	b	.L927
-.L933:
+	b	.L936
+.L942:
 	mov	w19, w0
-	b	.L930
+	b	.L939
 	.size	SamsungReadRetrial, .-SamsungReadRetrial
 	.section	.text.MicronReadRetrial,"ax",@progbits
 	.align	2
@@ -6412,23 +6539,23 @@ MicronReadRetrial:
 	str	w1, [x29, 140]
 	mov	x24, x2
 	ldrb	w19, [x0, #:lo12:.LANCHOR33]
-	adrp	x0, .LANCHOR8
+	adrp	x0, .LANCHOR15
 	stp	x25, x26, [sp, 64]
 	mov	x25, x3
-	ldrb	w1, [x0, #:lo12:.LANCHOR8]
+	ldrb	w1, [x0, #:lo12:.LANCHOR15]
 	stp	x21, x22, [sp, 32]
 	stp	x27, x28, [sp, 80]
 	str	x0, [x29, 128]
-	cbnz	w1, .L941
+	cbnz	w1, .L950
 	add	w19, w19, w19, lsl 1
 	asr	w19, w19, 2
-.L942:
+.L951:
 	adrp	x21, .LANCHOR6
 	add	x21, x21, :lo12:.LANCHOR6
 	add	x21, x21, x20, sxtw 4
 	mov	w23, 0
 	mov	w28, 137
-.L952:
+.L961:
 	mov	w0, w20
 	bl	NandcWaitFlashReady
 	ldrb	w4, [x21, 8]
@@ -6438,11 +6565,11 @@ MicronReadRetrial:
 	mov	w22, 0
 	mov	w26, -1
 	add	x27, x8, x4, lsl 8
-.L943:
+.L952:
 	ldrb	w0, [x7]
 	cmp	w22, w0
-	bcc	.L947
-.L946:
+	bcc	.L956
+.L955:
 	add	x4, x8, x4, lsl 8
 	mov	w0, 239
 	str	x4, [x29, 120]
@@ -6456,14 +6583,14 @@ MicronReadRetrial:
 	str	wzr, [x4, 2048]
 	str	wzr, [x4, 2048]
 	str	wzr, [x4, 2048]
-	bcc	.L948
+	bcc	.L957
 	cmn	w26, #1
 	mov	w0, 256
 	csel	w26, w26, w0, eq
-.L948:
+.L957:
 	cmp	w26, 256
 	ccmn	w26, #1, 4, ne
-	bne	.L949
+	bne	.L958
 	ldr	w2, [x29, 140]
 	adrp	x0, .LC13
 	mov	w4, w26
@@ -6471,22 +6598,22 @@ MicronReadRetrial:
 	mov	w1, w22
 	add	x0, x0, :lo12:.LC13
 	bl	printf
-	cbnz	w23, .L950
+	cbnz	w23, .L959
 	ldr	x0, [x29, 128]
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L940
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	cbz	w0, .L949
 	cmn	w26, #1
-	bne	.L940
+	bne	.L949
 	mov	w1, 3
 	mov	w0, w20
 	mov	w23, 1
 	bl	micron_auto_read_calibration_config
-	b	.L952
-.L941:
+	b	.L961
+.L950:
 	mov	w0, 3
 	sdiv	w19, w19, w0
-	b	.L942
-.L947:
+	b	.L951
+.L956:
 	mov	w0, 239
 	str	w0, [x27, 2056]
 	str	w28, [x27, 2052]
@@ -6509,29 +6636,29 @@ MicronReadRetrial:
 	ldr	w10, [x29, 120]
 	ldp	x4, x7, [x29, 96]
 	ldr	x8, [x29, 112]
-	beq	.L944
+	beq	.L953
 	cmn	w26, #1
 	csel	w26, w26, w0, ne
 	cmp	w0, w19
-	bcc	.L954
+	bcc	.L963
 	mov	x25, 0
 	mov	x24, 0
-.L944:
+.L953:
 	mov	w22, w10
-	b	.L943
-.L954:
+	b	.L952
+.L963:
 	mov	w26, w0
 	mov	x25, 0
 	mov	x24, 0
-	b	.L946
-.L950:
+	b	.L955
+.L959:
 	mov	w0, w20
 	mov	w1, 0
 	bl	micron_auto_read_calibration_config
 	cmn	w26, #1
 	mov	w0, 256
 	csel	w26, w26, w0, eq
-.L940:
+.L949:
 	mov	w0, w26
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6540,13 +6667,13 @@ MicronReadRetrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L949:
-	cbz	w23, .L940
+.L958:
+	cbz	w23, .L949
 	mov	w1, 0
 	mov	w0, w20
 	mov	w26, 256
 	bl	micron_auto_read_calibration_config
-	b	.L940
+	b	.L949
 	.size	MicronReadRetrial, .-MicronReadRetrial
 	.section	.text.HynixReadRetrial,"ax",@progbits
 	.align	2
@@ -6555,58 +6682,62 @@ MicronReadRetrial:
 HynixReadRetrial:
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
-	stp	x25, x26, [sp, 64]
-	mov	w25, w1
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR20
-	add	x1, x19, :lo12:.LANCHOR20
 	stp	x27, x28, [sp, 80]
-	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR18
-	stp	x23, x24, [sp, 48]
 	and	x28, x0, 255
-	add	x0, x1, x28
-	mov	x23, x28
-	ldrb	w24, [x1, 2]
-	mov	x26, x2
-	ldr	x1, [x22, #:lo12:.LANCHOR18]
-	mov	x27, x3
-	ldrb	w20, [x0, 12]
-	ldrb	w1, [x1, 19]
-	cmp	w1, 7
-	bne	.L966
-	ldrb	w20, [x0, 20]
-.L966:
-	mov	w0, w23
+	add	x0, x19, :lo12:.LANCHOR20
+	stp	x23, x24, [sp, 48]
+	stp	x21, x22, [sp, 32]
+	mov	w22, w1
+	stp	x25, x26, [sp, 64]
+	adrp	x25, .LANCHOR18
+	add	x1, x0, x28
+	mov	x20, x28
+	ldrb	w21, [x0, 2]
+	mov	x23, x2
+	ldr	x0, [x25, #:lo12:.LANCHOR18]
+	mov	x24, x3
+	ldrb	w26, [x1, 12]
+	ldrb	w0, [x0, 19]
+	sub	w0, w0, #7
+	and	w0, w0, 255
+	cmp	w0, 1
+	bhi	.L975
+	ldrb	w26, [x1, 20]
+.L975:
+	mov	w0, w20
 	bl	NandcWaitFlashReady
 	add	x6, x19, :lo12:.LANCHOR20
 	adrp	x5, .LANCHOR33
 	add	x7, x6, 4
 	add	x5, x5, :lo12:.LANCHOR33
 	mov	w4, 0
-	mov	w21, -1
-.L967:
-	cmp	w4, w24
-	bcc	.L972
-.L971:
-	ldr	x0, [x22, #:lo12:.LANCHOR18]
+	mov	w27, -1
+.L976:
+	cmp	w4, w21
+	bcc	.L981
+.L980:
+	ldr	x0, [x25, #:lo12:.LANCHOR18]
 	add	x19, x19, :lo12:.LANCHOR20
 	add	x19, x19, x28
 	ldrb	w0, [x0, 19]
-	cmp	w0, 7
-	bne	.L973
-	strb	w20, [x19, 20]
-.L974:
+	sub	w0, w0, #7
+	and	w0, w0, 255
+	cmp	w0, 1
+	bhi	.L982
+	strb	w26, [x19, 20]
+.L983:
 	adrp	x0, .LANCHOR33
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
-	cmp	w21, w0, lsr 2
-	bcc	.L965
-	cmn	w21, #1
+	cmp	w27, w0, lsr 2
+	bcc	.L974
+	cmn	w27, #1
 	mov	w0, 256
-	csel	w21, w21, w0, eq
-.L965:
-	mov	w0, w21
+	csel	w27, w27, w0, eq
+.L974:
+	mov	w0, w27
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -6614,46 +6745,46 @@ HynixReadRetrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L972:
-	add	w20, w20, 1
+.L981:
+	add	w26, w26, 1
 	ldrb	w1, [x6, 1]
-	and	w20, w20, 255
+	and	w26, w26, 255
 	mov	x2, x7
-	cmp	w24, w20
+	cmp	w21, w26
 	str	x5, [x29, 96]
-	csel	w20, w20, wzr, hi
+	csel	w26, w26, wzr, hi
 	str	w4, [x29, 108]
 	stp	x7, x6, [x29, 112]
-	mov	w3, w20
-	mov	w0, w23
+	mov	w3, w26
+	mov	w0, w20
 	bl	HynixSetRRPara
-	mov	x3, x27
-	mov	x2, x26
-	mov	w1, w25
-	mov	w0, w23
+	mov	x3, x24
+	mov	x2, x23
+	mov	w1, w22
+	mov	w0, w20
 	bl	FlashReadRawPage
 	cmn	w0, #1
 	ldr	w4, [x29, 108]
 	ldr	x5, [x29, 96]
 	ldp	x7, x6, [x29, 112]
-	beq	.L969
+	beq	.L978
 	ldrb	w1, [x5]
-	cmn	w21, #1
-	csel	w21, w21, w0, ne
+	cmn	w27, #1
+	csel	w27, w27, w0, ne
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L976
-	mov	x27, 0
-	mov	x26, 0
-.L969:
+	bcc	.L985
+	mov	x24, 0
+	mov	x23, 0
+.L978:
 	add	w4, w4, 1
-	b	.L967
-.L976:
-	mov	w21, w0
-	b	.L971
-.L973:
-	strb	w20, [x19, 12]
-	b	.L974
+	b	.L976
+.L985:
+	mov	w27, w0
+	b	.L980
+.L982:
+	strb	w26, [x19, 12]
+	b	.L983
 	.size	HynixReadRetrial, .-HynixReadRetrial
 	.section	.text.FlashProgPage,"ax",@progbits
 	.align	2
@@ -6671,19 +6802,19 @@ FlashProgPage:
 	ldrb	w21, [x1, #:lo12:.LANCHOR31+9]
 	ands	w19, w0, 255
 	mov	x23, x3
-	bne	.L984
+	bne	.L993
 	adrp	x0, .LANCHOR2
 	adrp	x1, .LANCHOR3
 	ldrb	w0, [x0, #:lo12:.LANCHOR2]
 	ldr	w1, [x1, #:lo12:.LANCHOR3]
 	mul	w0, w0, w1
 	cmp	w0, w20
-	bls	.L984
+	bls	.L993
 	adrp	x0, .LANCHOR1
 	ldrb	w0, [x0, #:lo12:.LANCHOR1]
-	cbnz	w0, .L985
+	cbnz	w0, .L994
 	sub	w21, w21, #2
-.L984:
+.L993:
 	mov	w0, w19
 	bl	NandcWaitFlashReady
 	mov	w0, w19
@@ -6714,9 +6845,9 @@ FlashProgPage:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L985:
+.L994:
 	mov	w21, 4
-	b	.L984
+	b	.L993
 	.size	FlashProgPage, .-FlashProgPage
 	.section	.text.FlashSavePhyInfo,"ax",@progbits
 	.align	2
@@ -6798,7 +6929,7 @@ FlashSavePhyInfo:
 	ldr	x6, [x19, #:lo12:.LANCHOR146]
 	mov	w1, 2036
 	add	x0, x6, 12
-	bl	JSHash
+	bl	js_hash
 	str	w0, [x6, 8]
 	mov	w0, 1592
 	str	w0, [x6, 4]
@@ -6806,7 +6937,7 @@ FlashSavePhyInfo:
 	str	x0, [x19, #:lo12:.LANCHOR146]
 	mov	w0, 0
 	bl	flash_enter_slc_mode
-.L990:
+.L999:
 	ldr	w1, [x21]
 	mov	w2, 0
 	mov	w0, 0
@@ -6833,30 +6964,30 @@ FlashSavePhyInfo:
 	bl	FlashReadRawPage
 	cmn	w0, #1
 	add	w7, w20, 1
-	beq	.L988
+	beq	.L997
 	ldr	x6, [x19, #:lo12:.LANCHOR146]
 	ldr	w0, [x6]
 	cmp	w0, w25
-	bne	.L988
+	bne	.L997
 	mov	w1, 2036
 	add	x0, x6, 12
-	bl	JSHash
+	bl	js_hash
 	ldr	w1, [x6, 8]
 	cmp	w1, w0
-	bne	.L988
+	bne	.L997
 	ldr	w0, [x21]
 	cmp	w23, 1
 	str	w7, [x26]
 	mul	w20, w0, w20
 	adrp	x0, .LANCHOR148
 	str	w20, [x0, #:lo12:.LANCHOR148]
-	beq	.L991
+	beq	.L1000
 	mov	w23, 1
-.L988:
+.L997:
 	mov	w20, w7
 	cmp	w7, 4
-	bne	.L990
-.L989:
+	bne	.L999
+.L998:
 	mov	w0, 0
 	bl	flash_exit_slc_mode
 	cmp	w23, 0
@@ -6867,9 +6998,9 @@ FlashSavePhyInfo:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L991:
+.L1000:
 	mov	w23, 2
-	b	.L989
+	b	.L998
 	.size	FlashSavePhyInfo, .-FlashSavePhyInfo
 	.section	.text.FlashReadIdbDataRaw,"ax",@progbits
 	.align	2
@@ -6877,8 +7008,6 @@ FlashSavePhyInfo:
 	.type	FlashReadIdbDataRaw, %function
 FlashReadIdbDataRaw:
 	stp	x29, x30, [sp, -144]!
-	mov	w1, 12336
-	movk	w1, 0x5638, lsl 16
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	mov	x23, x0
@@ -6896,14 +7025,13 @@ FlashReadIdbDataRaw:
 	ldrb	w26, [x0, #:lo12:.LANCHOR33]
 	adrp	x0, .LANCHOR29
 	stp	x21, x22, [sp, 32]
-	ldr	w2, [x0, #:lo12:.LANCHOR29]
+	ldr	w1, [x0, #:lo12:.LANCHOR29]
 	stp	x27, x28, [sp, 80]
 	str	x0, [x29, 120]
-	cmp	w2, w1
-	bne	.L998
+	cbz	w1, .L1007
 	mov	w0, 0
 	bl	flash_enter_slc_mode
-.L998:
+.L1007:
 	adrp	x24, .LANCHOR2
 	adrp	x22, .LANCHOR3
 	add	x27, x29, 136
@@ -6915,22 +7043,19 @@ FlashReadIdbDataRaw:
 	mov	w1, 0
 	mov	x0, x23
 	bl	ftl_memset
-.L999:
+.L1008:
 	ldrb	w0, [x24, #:lo12:.LANCHOR2]
 	cmp	w19, w0
-	bcc	.L1004
-.L1003:
+	bcc	.L1013
+.L1012:
 	mov	w0, w26
 	bl	FlashBchSel
 	ldr	x0, [x29, 120]
-	ldr	w1, [x0, #:lo12:.LANCHOR29]
-	mov	w0, 12336
-	movk	w0, 0x5638, lsl 16
-	cmp	w1, w0
-	bne	.L997
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	cbz	w0, .L1006
 	mov	w0, 0
 	bl	flash_exit_slc_mode
-.L997:
+.L1006:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6939,10 +7064,10 @@ FlashReadIdbDataRaw:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1004:
+.L1013:
 	mov	x4, 0
 	adrp	x25, .LANCHOR147
-.L1001:
+.L1010:
 	ldrb	w5, [x4, x27]
 	add	x21, x25, :lo12:.LANCHOR147
 	str	w5, [x29, 116]
@@ -6957,24 +7082,24 @@ FlashReadIdbDataRaw:
 	bl	FlashReadRawPage
 	cmn	w0, #1
 	ldr	w5, [x29, 116]
-	bne	.L1000
+	bne	.L1009
 	ldr	x4, [x29, 104]
 	add	x4, x4, 1
 	cmp	x4, 4
-	bne	.L1001
-.L1002:
+	bne	.L1010
+.L1011:
 	add	w19, w19, 1
-	b	.L999
-.L1007:
+	b	.L1008
+.L1016:
 	mov	w20, 0
-	b	.L1003
-.L1000:
+	b	.L1012
+.L1009:
 	ldr	x0, [x21]
 	ldr	w1, [x0]
 	mov	w0, 35899
 	movk	w0, 0xfcdc, lsl 16
 	cmp	w1, w0
-	bne	.L1002
+	bne	.L1011
 	mov	w1, w5
 	adrp	x0, .LC14
 	add	x0, x0, :lo12:.LC14
@@ -6989,11 +7114,11 @@ FlashReadIdbDataRaw:
 	adrp	x0, .LANCHOR149
 	ldr	w1, [x0, #:lo12:.LANCHOR149]
 	cmp	w19, w1
-	bcs	.L1007
+	bcs	.L1016
 	str	w19, [x0, #:lo12:.LANCHOR149]
 	mov	w20, 0
 	bl	FlashSavePhyInfo
-	b	.L1002
+	b	.L1011
 	.size	FlashReadIdbDataRaw, .-FlashReadIdbDataRaw
 	.section	.text.FlashPageProgMsbFFData,"ax",@progbits
 	.align	2
@@ -7001,69 +7126,72 @@ FlashReadIdbDataRaw:
 	.type	FlashPageProgMsbFFData, %function
 FlashPageProgMsbFFData:
 	stp	x29, x30, [sp, -80]!
-	adrp	x3, .LANCHOR8
 	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	and	w24, w0, 255
+	adrp	x0, .LANCHOR15
 	stp	x19, x20, [sp, 16]
-	and	w19, w2, 65535
-	adrp	x2, .LANCHOR18
 	stp	x21, x22, [sp, 32]
-	ldrb	w3, [x3, #:lo12:.LANCHOR8]
-	and	w21, w0, 255
-	ldr	x0, [x2, #:lo12:.LANCHOR18]
-	mov	x22, x2
-	stp	x23, x24, [sp, 48]
-	str	x25, [sp, 64]
-	ldrb	w0, [x0, 19]
-	cbz	w3, .L1011
-	adrp	x2, .LANCHOR29
-	ldr	w3, [x2, #:lo12:.LANCHOR29]
-	mov	w2, 12336
-	movk	w2, 0x5638, lsl 16
-	cmp	w3, w2
-	beq	.L1010
-.L1011:
-	sub	w0, w0, #5
-	and	w0, w0, 255
-	cmp	w0, 63
-	bhi	.L1010
-	mov	x2, 16391
+	and	w19, w2, 65535
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	stp	x25, x26, [sp, 64]
+	cbz	w0, .L1026
+	adrp	x0, .LANCHOR29
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	cbnz	w0, .L1025
+.L1026:
+	adrp	x2, .LANCHOR18
+	mov	x25, x2
+	ldr	x0, [x2, #:lo12:.LANCHOR18]
+	ldrb	w23, [x0, 19]
+	sub	w0, w23, #5
+	and	w3, w0, 255
+	cmp	w3, 63
+	bhi	.L1025
+	mov	x2, 16399
 	movk	x2, 0x4000, lsl 16
 	movk	x2, 0x8000, lsl 48
-	lsr	x0, x2, x0
-	tbz	x0, 0, .L1010
+	lsr	x0, x2, x3
+	tbz	x0, 0, .L1025
 	adrp	x20, .LANCHOR120
-	mov	w24, w1
+	mov	w22, w1
 	add	x20, x20, :lo12:.LANCHOR120
-	mov	w23, 65535
-	adrp	x25, .LANCHOR153
-.L1013:
-	ldr	x0, [x22, #:lo12:.LANCHOR18]
+	mov	w26, 65535
+	adrp	x21, .LANCHOR153
+.L1028:
+	ldr	x0, [x25, #:lo12:.LANCHOR18]
 	ldrh	w0, [x0, 10]
 	cmp	w0, w19
-	bhi	.L1014
-.L1010:
+	bhi	.L1031
+.L1025:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldr	x25, [sp, 64]
+	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1014:
+.L1031:
 	ldrh	w0, [x20, w19, sxtw 1]
-	cmp	w0, w23
-	bne	.L1010
-	ldr	x0, [x25, #:lo12:.LANCHOR153]
+	cmp	w0, w26
+	bne	.L1025
 	mov	w2, 32768
-	mov	w1, 255
+	cmp	w23, 8
+	bne	.L1029
+	mov	w1, 0
+.L1036:
+	ldr	x0, [x21, #:lo12:.LANCHOR153]
 	bl	ftl_memset
-	ldr	x2, [x25, #:lo12:.LANCHOR153]
-	add	w1, w19, w24
+	ldr	x3, [x21, #:lo12:.LANCHOR153]
+	add	w1, w19, w22
 	add	w19, w19, 1
-	mov	x3, 0
-	mov	w0, w21
+	mov	w0, w24
+	mov	x2, x3
 	and	w19, w19, 65535
 	bl	FlashProgPage
-	b	.L1013
+	b	.L1028
+.L1029:
+	mov	w1, 255
+	b	.L1036
 	.size	FlashPageProgMsbFFData, .-FlashPageProgMsbFFData
 	.section	.text.idb_write_data,"ax",@progbits
 	.align	2
@@ -7080,16 +7208,16 @@ idb_write_data:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	bls	.L1020
+	bls	.L1038
 	cmp	w1, 575
-	bhi	.L1021
+	bhi	.L1039
 	adrp	x0, .LANCHOR154
 	mov	x1, x2
 	mov	w2, 1
 	cmp	w4, 64
 	str	w2, [x0, #:lo12:.LANCHOR154]
 	adrp	x0, idb_buf
-	bhi	.L1022
+	bhi	.L1040
 	mov	w2, 64
 	sub	w4, w2, w4
 	sub	w2, w3, w4
@@ -7097,9 +7225,9 @@ idb_write_data:
 	lsl	w2, w2, 9
 	add	x1, x1, x4
 	add	x0, x0, :lo12:idb_buf
-.L1072:
+.L1090:
 	bl	ftl_memcpy
-.L1055:
+.L1073:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -7108,7 +7236,7 @@ idb_write_data:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 240
 	ret
-.L1022:
+.L1040:
 	mov	w2, 576
 	sub	w2, w2, w4
 	cmp	w3, w2
@@ -7118,15 +7246,15 @@ idb_write_data:
 	add	x0, x0, :lo12:idb_buf
 	lsl	w2, w2, 9
 	add	x0, x0, x4
-	b	.L1072
-.L1020:
+	b	.L1090
+.L1038:
 	cmp	w1, 575
-	bls	.L1055
-.L1021:
+	bls	.L1073
+.L1039:
 	adrp	x0, .LANCHOR154
-	str	x0, [x29, 112]
+	str	x0, [x29, 104]
 	ldr	w1, [x0, #:lo12:.LANCHOR154]
-	cbz	w1, .L1055
+	cbz	w1, .L1073
 	adrp	x21, .LANCHOR18
 	adrp	x1, idb_buf+262140
 	adrp	x25, idb_buf
@@ -7143,9 +7271,9 @@ idb_write_data:
 	udiv	w0, w0, w20
 	str	w0, [x29, 172]
 	mov	w0, 0
-.L1026:
+.L1044:
 	ldr	w4, [x1]
-	cbnz	w4, .L1024
+	cbnz	w4, .L1042
 	ldr	w4, [x5, w0, uxtw 2]
 	add	w0, w0, 1
 	str	w4, [x1], -4
@@ -7153,8 +7281,8 @@ idb_write_data:
 	sub	w2, w2, #1
 	csel	w0, w0, wzr, cc
 	cmp	w2, 4096
-	bne	.L1026
-.L1024:
+	bne	.L1044
+.L1042:
 	add	x0, x25, :lo12:idb_buf
 	mov	w3, 512
 	mov	w23, 0
@@ -7167,23 +7295,23 @@ idb_write_data:
 	ldr	w0, [x29, 172]
 	mul	w19, w20, w24
 	mul	w0, w20, w0
-	str	w0, [x29, 120]
+	str	w0, [x29, 136]
 	adrp	x0, .LANCHOR16
 	add	x0, x0, :lo12:.LANCHOR16
 	str	x0, [x29, 160]
-.L1027:
+.L1045:
 	cmp	w24, 15
-	bls	.L1045
-	cbnz	w23, .L1047
+	bls	.L1063
+	cbnz	w23, .L1065
 	adrp	x0, .LC17
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC17
 	bl	printf
-.L1047:
-	ldr	x0, [x29, 112]
+.L1065:
+	ldr	x0, [x29, 104]
 	str	wzr, [x0, #:lo12:.LANCHOR154]
-	b	.L1055
-.L1045:
+	b	.L1073
+.L1063:
 	adrp	x27, gp_flash_check_buf
 	mov	x2, 512
 	mov	w1, 0
@@ -7194,98 +7322,104 @@ idb_write_data:
 	ldrh	w26, [x0, 10]
 	mov	w0, w19
 	bl	FW_FlashBlockErase.constprop.41
-	str	x27, [x29, 136]
+	str	x27, [x29, 128]
 	mul	w26, w22, w26
 	and	w26, w26, 65535
 	cmp	w26, 511
-	bhi	.L1028
+	bhi	.L1046
 	add	w0, w26, w19
 	bl	FW_FlashBlockErase.constprop.41
-.L1028:
+.L1046:
 	udiv	w4, w19, w26
-	adrp	x5, .LANCHOR8
-	add	x5, x5, :lo12:.LANCHOR8
+	adrp	x5, .LANCHOR15
+	add	x5, x5, :lo12:.LANCHOR15
 	mov	x28, 0
 	msub	w4, w4, w26, w19
 	sub	w26, w19, w4
-.L1029:
-	add	x6, x25, :lo12:idb_buf
+.L1047:
+	add	x2, x25, :lo12:idb_buf
 	cmp	x28, 128
-	add	x6, x6, x28, lsl 11
-	bne	.L1033
+	add	x2, x2, x28, lsl 11
+	bne	.L1051
 	ldr	x0, [x21, #:lo12:.LANCHOR18]
 	mov	w26, 0
-	ldr	x1, [x29, 136]
+	ldr	x1, [x29, 128]
 	add	x27, x1, :lo12:gp_flash_check_buf
-	adrp	x1, .LANCHOR8
+	adrp	x1, .LANCHOR15
 	ldrb	w28, [x0, 9]
-	add	x1, x1, :lo12:.LANCHOR8
+	add	x1, x1, :lo12:.LANCHOR15
 	ldrh	w22, [x0, 10]
-	str	x1, [x29, 104]
+	str	x1, [x29, 96]
 	mul	w22, w28, w22
 	and	w0, w22, 65535
 	udiv	w22, w19, w0
 	msub	w22, w22, w0, w19
 	sub	w0, w19, w22
-	str	w0, [x29, 128]
+	str	w0, [x29, 120]
 	mul	w0, w22, w28
 	ubfx	x0, x0, 2, 2
-.L1034:
+.L1052:
 	cmp	w26, 511
-	bhi	.L1041
-	ldr	x3, [x29, 104]
+	bhi	.L1059
+	ldr	x3, [x29, 96]
 	mov	w1, 4
 	sub	w1, w1, w0
-	add	w2, w22, w26
+	ldr	x2, [x29, 160]
 	and	w1, w1, 65535
 	str	w1, [x29, 144]
-	ldr	x1, [x29, 160]
-	lsr	w2, w2, 2
+	add	w1, w22, w26
 	ldrb	w3, [x3]
-	ldrh	w1, [x1, w2, sxtw 1]
-	cbz	w3, .L1035
-	adrp	x3, .LANCHOR29
+	lsr	w1, w1, 2
+	ldrh	w2, [x2, w1, sxtw 1]
+	cbz	w3, .L1053
+	adrp	x3, .LANCHOR119
 	mov	w4, 12336
 	movk	w4, 0x5638, lsl 16
-	ldr	w3, [x3, #:lo12:.LANCHOR29]
+	ldr	w3, [x3, #:lo12:.LANCHOR119]
 	cmp	w3, w4
-	csel	w1, w1, w2, ne
-.L1035:
-	ldr	w2, [x29, 128]
-	add	w0, w0, w2
-	madd	w3, w28, w1, w0
-	adrp	x0, .LANCHOR33
+	csel	w2, w2, w1, ne
+.L1053:
+	ldr	w1, [x29, 120]
+	add	w0, w0, w1
 	adrp	x1, .LANCHOR3
+	ldr	w1, [x1, #:lo12:.LANCHOR3]
+	madd	w0, w28, w2, w0
+	str	w0, [x29, 168]
+	adrp	x0, .LANCHOR33
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
-	str	w0, [x29, 124]
+	str	w0, [x29, 112]
 	ldr	x0, [x21, #:lo12:.LANCHOR18]
-	ldr	w1, [x1, #:lo12:.LANCHOR3]
-	ldrb	w4, [x0, 9]
-	adrp	x0, .LANCHOR15+26
-	ldrh	w0, [x0, #:lo12:.LANCHOR15+26]
+	ldrb	w0, [x0, 9]
+	str	w0, [x29, 140]
+	adrp	x0, .LANCHOR14+26
+	ldrh	w0, [x0, #:lo12:.LANCHOR14+26]
 	mul	w0, w0, w1
-	mul	w0, w0, w4
-	cmp	w3, w0
-	bcs	.L1036
+	ldr	w1, [x29, 140]
+	mul	w0, w0, w1
+	ldr	w1, [x29, 168]
+	cmp	w1, w0
+	bcs	.L1054
 	adrp	x0, .LANCHOR152
 	ldrb	w0, [x0, #:lo12:.LANCHOR152]
 	bl	FlashBchSel
-.L1036:
+.L1054:
 	mov	w0, 0
 	bl	flash_boot_enter_slc_mode
-	udiv	w1, w3, w4
+	ldr	w0, [x29, 168]
 	add	x3, x29, 176
+	ldr	w1, [x29, 140]
 	mov	x2, x27
+	udiv	w1, w0, w1
 	mov	w0, 0
 	str	w1, [x29, 168]
 	bl	FlashReadPage
-	mov	w3, w0
+	mov	w1, w0
 	cmn	w0, #1
-	bne	.L1037
+	bne	.L1055
 	adrp	x0, .LANCHOR152
 	ldrb	w0, [x0, #:lo12:.LANCHOR152]
 	cmp	w0, 40
-	beq	.L1037
+	beq	.L1055
 	mov	w0, 40
 	bl	FlashBchSel
 	ldr	w1, [x29, 168]
@@ -7293,27 +7427,29 @@ idb_write_data:
 	mov	x2, x27
 	mov	w0, 0
 	bl	FlashReadPage
-	mov	w3, w0
-.L1037:
+	mov	w1, w0
+.L1055:
+	str	w1, [x29, 168]
 	mov	w0, 0
 	bl	flash_boot_exit_slc_mode
-	ldrb	w0, [x29, 124]
+	ldrb	w0, [x29, 112]
 	bl	FlashBchSel
-	cmn	w3, #1
-	bne	.L1038
-.L1041:
-	ldr	x0, [x29, 136]
+	ldr	w1, [x29, 168]
+	cmn	w1, #1
+	bne	.L1056
+.L1059:
+	ldr	x0, [x29, 128]
 	add	x1, x25, :lo12:idb_buf
 	mov	x22, 0
 	add	x26, x0, :lo12:gp_flash_check_buf
-.L1039:
+.L1057:
 	lsl	x0, x22, 2
 	mov	w27, w22
 	add	x28, x0, x1
 	ldr	w2, [x0, x26]
 	ldr	w0, [x0, x1]
 	cmp	w2, w0
-	beq	.L1042
+	beq	.L1060
 	mov	x2, 512
 	mov	w1, 0
 	mov	x0, x26
@@ -7329,80 +7465,81 @@ idb_write_data:
 	bl	FW_FlashBlockErase.constprop.41
 	ldr	w0, [x29, 172]
 	cmp	w0, 1
-	bls	.L1043
+	bls	.L1061
 	add	w0, w20, w19
 	bl	FW_FlashBlockErase.constprop.41
-.L1043:
+.L1061:
 	ldr	w0, [x29, 172]
 	add	w24, w24, w0
-	ldr	w0, [x29, 120]
+	ldr	w0, [x29, 136]
 	add	w19, w19, w0
-	b	.L1027
-.L1033:
+	b	.L1045
+.L1051:
 	add	w1, w4, w28, lsl 2
 	lsr	w1, w1, 2
-	cbz	w1, .L1030
+	cbz	w1, .L1048
 	ldr	x0, [x29, 160]
-	add	w2, w1, 1
-	ldrb	w3, [x5]
-	ldrh	w0, [x0, w2, sxtw 1]
-	cbz	w3, .L1031
-	adrp	x3, .LANCHOR29
+	add	w3, w1, 1
+	ldrb	w6, [x5]
+	ldrh	w0, [x0, w3, sxtw 1]
+	cbz	w6, .L1049
+	adrp	x6, .LANCHOR119
 	mov	w7, 12336
 	movk	w7, 0x5638, lsl 16
-	ldr	w3, [x3, #:lo12:.LANCHOR29]
-	cmp	w3, w7
-	csel	w0, w0, w2, ne
-.L1031:
+	ldr	w6, [x6, #:lo12:.LANCHOR119]
+	cmp	w6, w7
+	csel	w0, w0, w3, ne
+.L1049:
 	lsl	w0, w0, 2
 	sub	w0, w0, #4
 	str	w0, [x29, 176]
-.L1030:
+.L1048:
 	mov	w0, 61424
 	str	w0, [x29, 180]
 	ldr	x0, [x29, 160]
 	ldrh	w27, [x0, w1, sxtw 1]
 	ldrb	w0, [x5]
-	cbz	w0, .L1032
-	adrp	x0, .LANCHOR29
-	mov	w2, 12336
-	movk	w2, 0x5638, lsl 16
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	cmp	w0, w2
+	cbz	w0, .L1050
+	adrp	x0, .LANCHOR119
+	mov	w3, 12336
+	movk	w3, 0x5638, lsl 16
+	ldr	w0, [x0, #:lo12:.LANCHOR119]
+	cmp	w0, w3
 	csel	w27, w27, w1, ne
-.L1032:
+.L1050:
 	adrp	x0, .LANCHOR33
-	madd	w8, w22, w27, w26
-	str	x5, [x29, 128]
+	madd	w1, w22, w27, w26
+	stp	x5, x2, [x29, 112]
 	add	x28, x28, 1
-	ldrb	w7, [x0, #:lo12:.LANCHOR33]
+	ldrb	w6, [x0, #:lo12:.LANCHOR33]
 	adrp	x0, .LANCHOR152
-	str	w4, [x29, 168]
+	stp	w4, w6, [x29, 140]
 	ldrb	w0, [x0, #:lo12:.LANCHOR152]
-	str	w7, [x29, 144]
+	str	w1, [x29, 168]
 	bl	FlashBchSel
 	mov	w0, 0
 	bl	flash_boot_enter_slc_mode
 	ldr	x0, [x21, #:lo12:.LANCHOR18]
-	mov	x2, x6
 	add	x3, x29, 176
-	ldrb	w1, [x0, 9]
+	ldr	w1, [x29, 168]
+	ldr	x2, [x29, 120]
+	ldrb	w0, [x0, 9]
+	udiv	w1, w1, w0
 	mov	w0, 0
-	udiv	w1, w8, w1
 	bl	FlashProgPage
 	mov	w0, 0
 	bl	flash_boot_exit_slc_mode
-	ldr	w7, [x29, 144]
-	mov	w0, w7
+	ldr	w6, [x29, 144]
+	mov	w0, w6
 	bl	FlashBchSel
 	udiv	w1, w26, w22
 	add	w2, w27, 1
 	mov	w0, 0
 	bl	FlashPageProgMsbFFData
-	ldr	w4, [x29, 168]
-	ldr	x5, [x29, 128]
-	b	.L1029
-.L1038:
+	ldr	w4, [x29, 140]
+	ldr	x5, [x29, 112]
+	b	.L1047
+.L1056:
 	ldr	x0, [x29, 144]
 	ubfiz	x0, x0, 9, 16
 	add	x27, x27, x0
@@ -7410,15 +7547,15 @@ idb_write_data:
 	add	w26, w0, w26
 	mov	w0, 0
 	and	w26, w26, 65535
-	b	.L1034
-.L1042:
+	b	.L1052
+.L1060:
 	add	x22, x22, 1
 	cmp	x22, 65536
-	bne	.L1039
+	bne	.L1057
 	add	w23, w23, 1
 	cmp	w23, 5
-	bls	.L1043
-	b	.L1047
+	bls	.L1061
+	b	.L1065
 	.size	idb_write_data, .-idb_write_data
 	.section	.text.ftl_memcmp,"ax",@progbits
 	.align	2
@@ -7454,7 +7591,7 @@ NandcInit:
 	stp	x29, x30, [sp, -16]!
 	adrp	x2, .LANCHOR6
 	add	x1, x2, :lo12:.LANCHOR6
-	adrp	x4, .LANCHOR29
+	adrp	x4, .LANCHOR119
 	add	x29, sp, 0
 	str	x0, [x2, #:lo12:.LANCHOR6]
 	mov	w2, 1
@@ -7480,12 +7617,12 @@ NandcInit:
 	ubfx	x2, x2, 16, 4
 	str	w2, [x3, #:lo12:.LANCHOR34]
 	ldr	w2, [x0, 352]
-	str	w2, [x4, #:lo12:.LANCHOR29]
+	str	w2, [x4, #:lo12:.LANCHOR119]
 	cmp	w2, 2049
-	bne	.L1077
+	bne	.L1095
 	mov	w2, 8
 	str	w2, [x3, #:lo12:.LANCHOR34]
-.L1077:
+.L1095:
 	str	w1, [x0]
 	mov	w1, 4225
 	str	wzr, [x0, 336]
@@ -7522,7 +7659,7 @@ FtlMemInit:
 	strh	wzr, [x0, #:lo12:.LANCHOR139]
 	adrp	x0, .LANCHOR157
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR55
+	adrp	x19, .LANCHOR54
 	str	wzr, [x0, #:lo12:.LANCHOR157]
 	adrp	x0, .LANCHOR158
 	stp	x21, x22, [sp, 32]
@@ -7530,10 +7667,10 @@ FtlMemInit:
 	str	wzr, [x0, #:lo12:.LANCHOR158]
 	adrp	x0, .LANCHOR159
 	str	x23, [sp, 48]
-	adrp	x21, .LANCHOR58
+	adrp	x21, .LANCHOR57
 	str	wzr, [x0, #:lo12:.LANCHOR159]
 	adrp	x0, .LANCHOR160
-	adrp	x23, .LANCHOR59
+	adrp	x23, .LANCHOR58
 	str	wzr, [x0, #:lo12:.LANCHOR160]
 	adrp	x0, .LANCHOR161
 	str	wzr, [x0, #:lo12:.LANCHOR161]
@@ -7551,8 +7688,8 @@ FtlMemInit:
 	str	wzr, [x0, #:lo12:.LANCHOR167]
 	adrp	x0, .LANCHOR168
 	str	wzr, [x0, #:lo12:.LANCHOR168]
-	adrp	x0, .LANCHOR80
-	str	wzr, [x0, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR79
+	str	wzr, [x0, #:lo12:.LANCHOR79]
 	adrp	x0, .LANCHOR169
 	str	wzr, [x0, #:lo12:.LANCHOR169]
 	adrp	x0, .LANCHOR170
@@ -7564,20 +7701,20 @@ FtlMemInit:
 	adrp	x0, .LANCHOR173
 	str	w1, [x0, #:lo12:.LANCHOR173]
 	adrp	x0, .LANCHOR174
-	adrp	x1, .LANCHOR113
+	adrp	x1, .LANCHOR112
 	str	wzr, [x0, #:lo12:.LANCHOR174]
 	adrp	x0, .LANCHOR175
 	str	wzr, [x0, #:lo12:.LANCHOR175]
-	adrp	x0, .LANCHOR74
-	str	wzr, [x0, #:lo12:.LANCHOR74]
+	adrp	x0, .LANCHOR73
+	str	wzr, [x0, #:lo12:.LANCHOR73]
 	mov	w0, -1
+	strh	w0, [x1, #:lo12:.LANCHOR112]
+	adrp	x1, .LANCHOR113
 	strh	w0, [x1, #:lo12:.LANCHOR113]
 	adrp	x1, .LANCHOR114
 	strh	w0, [x1, #:lo12:.LANCHOR114]
 	adrp	x1, .LANCHOR115
 	strh	w0, [x1, #:lo12:.LANCHOR115]
-	adrp	x1, .LANCHOR116
-	strh	w0, [x1, #:lo12:.LANCHOR116]
 	adrp	x0, .LANCHOR176
 	mov	w1, 32
 	strh	w1, [x0, #:lo12:.LANCHOR176]
@@ -7586,24 +7723,24 @@ FtlMemInit:
 	strh	w1, [x0, #:lo12:.LANCHOR177]
 	adrp	x0, .LANCHOR178
 	strh	wzr, [x0, #:lo12:.LANCHOR178]
-	adrp	x0, .LANCHOR117
-	strh	wzr, [x0, #:lo12:.LANCHOR117]
+	adrp	x0, .LANCHOR116
+	strh	wzr, [x0, #:lo12:.LANCHOR116]
 	adrp	x0, .LANCHOR179
 	strh	wzr, [x0, #:lo12:.LANCHOR179]
-	adrp	x0, .LANCHOR119
-	strh	wzr, [x0, #:lo12:.LANCHOR119]
-	ldrh	w0, [x19, #:lo12:.LANCHOR55]
+	adrp	x0, .LANCHOR118
+	strh	wzr, [x0, #:lo12:.LANCHOR118]
+	ldrh	w0, [x19, #:lo12:.LANCHOR54]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR110
-	str	x0, [x1, #:lo12:.LANCHOR110]
+	adrp	x1, .LANCHOR109
+	str	x0, [x1, #:lo12:.LANCHOR109]
 	mov	w0, 12
-	ldrh	w1, [x19, #:lo12:.LANCHOR55]
+	ldrh	w1, [x19, #:lo12:.LANCHOR54]
 	mul	w0, w1, w0
 	bl	ftl_malloc
 	ldrh	w19, [x22, #:lo12:.LANCHOR38]
-	adrp	x1, .LANCHOR112
-	str	x0, [x1, #:lo12:.LANCHOR112]
+	adrp	x1, .LANCHOR111
+	str	x0, [x1, #:lo12:.LANCHOR111]
 	mov	w0, 56
 	mul	w19, w19, w0
 	lsl	w20, w19, 2
@@ -7617,22 +7754,22 @@ FtlMemInit:
 	str	x0, [x1, #:lo12:.LANCHOR181]
 	mov	w0, w20
 	bl	ftl_malloc
-	adrp	x20, .LANCHOR108
+	adrp	x20, .LANCHOR107
 	adrp	x1, .LANCHOR182
 	str	x0, [x1, #:lo12:.LANCHOR182]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR78
-	str	x0, [x1, #:lo12:.LANCHOR78]
+	adrp	x1, .LANCHOR77
+	str	x0, [x1, #:lo12:.LANCHOR77]
 	mov	w0, w19
 	bl	ftl_malloc
-	ldrh	w19, [x21, #:lo12:.LANCHOR58]
-	adrp	x1, .LANCHOR107
-	str	x0, [x1, #:lo12:.LANCHOR107]
+	ldrh	w19, [x21, #:lo12:.LANCHOR57]
+	adrp	x1, .LANCHOR106
+	str	x0, [x1, #:lo12:.LANCHOR106]
 	ldrh	w0, [x22, #:lo12:.LANCHOR38]
 	lsl	w0, w0, 1
 	add	w0, w0, 1
-	str	w0, [x20, #:lo12:.LANCHOR108]
+	str	w0, [x20, #:lo12:.LANCHOR107]
 	mov	w0, w19
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR183
@@ -7645,11 +7782,11 @@ FtlMemInit:
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR185
 	str	x0, [x1, #:lo12:.LANCHOR185]
-	ldr	w0, [x20, #:lo12:.LANCHOR108]
+	ldr	w0, [x20, #:lo12:.LANCHOR107]
 	mul	w0, w19, w0
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR105
-	str	x0, [x1, #:lo12:.LANCHOR105]
+	adrp	x1, .LANCHOR104
+	str	x0, [x1, #:lo12:.LANCHOR104]
 	mov	w0, w19
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR186
@@ -7659,14 +7796,14 @@ FtlMemInit:
 	adrp	x1, .LANCHOR187
 	str	x0, [x1, #:lo12:.LANCHOR187]
 	mov	w0, 24
-	ldr	w1, [x20, #:lo12:.LANCHOR108]
+	ldr	w1, [x20, #:lo12:.LANCHOR107]
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	ldrh	w19, [x23, #:lo12:.LANCHOR59]
-	adrp	x1, .LANCHOR104
-	str	x0, [x1, #:lo12:.LANCHOR104]
+	ldrh	w19, [x23, #:lo12:.LANCHOR58]
+	adrp	x1, .LANCHOR103
+	str	x0, [x1, #:lo12:.LANCHOR103]
 	ldrh	w0, [x22, #:lo12:.LANCHOR38]
-	adrp	x22, .LANCHOR65
+	adrp	x22, .LANCHOR64
 	mul	w19, w19, w0
 	mov	w0, w19
 	bl	ftl_malloc
@@ -7677,13 +7814,13 @@ FtlMemInit:
 	adrp	x19, .LANCHOR41
 	adrp	x1, .LANCHOR189
 	str	x0, [x1, #:lo12:.LANCHOR189]
-	ldrh	w1, [x23, #:lo12:.LANCHOR59]
-	ldr	w0, [x20, #:lo12:.LANCHOR108]
+	ldrh	w1, [x23, #:lo12:.LANCHOR58]
+	ldr	w0, [x20, #:lo12:.LANCHOR107]
 	adrp	x20, .LANCHOR190
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR106
-	str	x0, [x1, #:lo12:.LANCHOR106]
+	adrp	x1, .LANCHOR105
+	str	x0, [x1, #:lo12:.LANCHOR105]
 	ldrh	w0, [x19, #:lo12:.LANCHOR41]
 	ubfiz	w0, w0, 1, 15
 	strh	w0, [x20, #:lo12:.LANCHOR190]
@@ -7699,15 +7836,15 @@ FtlMemInit:
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR191
 	str	x0, [x1, #:lo12:.LANCHOR191]
-	adrp	x1, .LANCHOR79
+	adrp	x1, .LANCHOR78
 	add	x0, x0, 32
-	str	x0, [x1, #:lo12:.LANCHOR79]
+	str	x0, [x1, #:lo12:.LANCHOR78]
 	ldrh	w0, [x19, #:lo12:.LANCHOR41]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-	ldr	w20, [x22, #:lo12:.LANCHOR65]
-	adrp	x1, .LANCHOR84
-	str	x0, [x1, #:lo12:.LANCHOR84]
+	ldr	w20, [x22, #:lo12:.LANCHOR64]
+	adrp	x1, .LANCHOR83
+	str	x0, [x1, #:lo12:.LANCHOR83]
 	lsl	w20, w20, 1
 	mov	w0, w20
 	bl	ftl_malloc
@@ -7715,7 +7852,7 @@ FtlMemInit:
 	str	x0, [x1, #:lo12:.LANCHOR129]
 	mov	w0, w20
 	bl	ftl_malloc
-	adrp	x20, .LANCHOR62
+	adrp	x20, .LANCHOR61
 	adrp	x1, .LANCHOR125
 	str	x0, [x1, #:lo12:.LANCHOR125]
 	ldrh	w0, [x19, #:lo12:.LANCHOR41]
@@ -7724,33 +7861,33 @@ FtlMemInit:
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR0
 	str	x0, [x1, #:lo12:.LANCHOR0]
-	ldrh	w0, [x20, #:lo12:.LANCHOR62]
+	ldrh	w0, [x20, #:lo12:.LANCHOR61]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR72
-	str	x0, [x1, #:lo12:.LANCHOR72]
-	ldrh	w0, [x20, #:lo12:.LANCHOR62]
+	adrp	x1, .LANCHOR71
+	str	x0, [x1, #:lo12:.LANCHOR71]
+	ldrh	w0, [x20, #:lo12:.LANCHOR61]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR192
 	str	x0, [x1, #:lo12:.LANCHOR192]
-	ldrh	w0, [x20, #:lo12:.LANCHOR62]
-	adrp	x20, .LANCHOR63
+	ldrh	w0, [x20, #:lo12:.LANCHOR61]
+	adrp	x20, .LANCHOR62
 	lsl	w0, w0, 2
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR193
 	str	x0, [x1, #:lo12:.LANCHOR193]
-	ldrh	w0, [x20, #:lo12:.LANCHOR63]
+	ldrh	w0, [x20, #:lo12:.LANCHOR62]
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	ldrh	w2, [x20, #:lo12:.LANCHOR63]
+	ldrh	w2, [x20, #:lo12:.LANCHOR62]
 	adrp	x1, .LANCHOR194
 	str	x0, [x1, #:lo12:.LANCHOR194]
 	mov	w1, 0
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	adrp	x0, .LANCHOR67
-	ldrh	w20, [x0, #:lo12:.LANCHOR67]
+	adrp	x0, .LANCHOR66
+	ldrh	w20, [x0, #:lo12:.LANCHOR66]
 	lsl	w20, w20, 2
 	mov	w0, w20
 	bl	ftl_malloc
@@ -7758,22 +7895,22 @@ FtlMemInit:
 	str	x0, [x1, #:lo12:.LANCHOR131]
 	mov	w0, w20
 	bl	ftl_malloc
-	adrp	x20, .LANCHOR68
+	adrp	x20, .LANCHOR67
 	adrp	x1, .LANCHOR195
 	str	x0, [x1, #:lo12:.LANCHOR195]
-	ldr	w0, [x22, #:lo12:.LANCHOR65]
+	ldr	w0, [x22, #:lo12:.LANCHOR64]
 	lsl	w0, w0, 2
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR130
 	str	x0, [x1, #:lo12:.LANCHOR130]
-	ldrh	w0, [x20, #:lo12:.LANCHOR68]
+	ldrh	w0, [x20, #:lo12:.LANCHOR67]
 	lsl	w0, w0, 4
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR97
-	str	x0, [x1, #:lo12:.LANCHOR97]
-	ldrh	w1, [x20, #:lo12:.LANCHOR68]
+	adrp	x1, .LANCHOR96
+	str	x0, [x1, #:lo12:.LANCHOR96]
+	ldrh	w1, [x20, #:lo12:.LANCHOR67]
 	adrp	x20, .LANCHOR45
-	ldrh	w0, [x21, #:lo12:.LANCHOR58]
+	ldrh	w0, [x21, #:lo12:.LANCHOR57]
 	mul	w0, w1, w0
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR126
@@ -7783,8 +7920,8 @@ FtlMemInit:
 	adrp	x19, .LANCHOR123
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR82
-	str	x0, [x1, #:lo12:.LANCHOR82]
+	adrp	x1, .LANCHOR81
+	str	x0, [x1, #:lo12:.LANCHOR81]
 	adrp	x0, .LANCHOR51
 	ldrh	w1, [x20, #:lo12:.LANCHOR45]
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
@@ -7794,44 +7931,44 @@ FtlMemInit:
 	mul	w0, w1, w0
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR75
+	adrp	x1, .LANCHOR74
 	ldrh	w5, [x19, #:lo12:.LANCHOR123]
-	add	x2, x1, :lo12:.LANCHOR75
+	add	x2, x1, :lo12:.LANCHOR74
 	ldrh	w7, [x20, #:lo12:.LANCHOR45]
 	add	x6, x2, 40
 	mov	w3, w5
 	str	x0, [x2, 32]
 	mov	x0, 1
-.L1080:
+.L1098:
 	cmp	w0, w7
-	bcc	.L1081
+	bcc	.L1099
 	mov	w2, 8
 	sub	w2, w2, w0
 	add	x2, x2, 1
-	add	x1, x1, :lo12:.LANCHOR75
+	add	x1, x1, :lo12:.LANCHOR74
 	mov	x3, 0
-.L1082:
+.L1100:
 	add	x3, x3, 1
 	cmp	x2, x3
-	bne	.L1083
+	bne	.L1101
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1081:
+.L1099:
 	ldr	x4, [x2, 32]
 	add	w0, w0, 1
 	add	x4, x4, x3, uxtw 2
 	add	w3, w3, w5
 	str	x4, [x6], 8
-	b	.L1080
-.L1083:
+	b	.L1098
+.L1101:
 	add	x4, x0, x3
 	add	x4, x1, x4, lsl 3
 	str	xzr, [x4, 24]
-	b	.L1082
+	b	.L1100
 	.size	FtlMemInit, .-FtlMemInit
 	.section	.text.ftl_free,"ax",@progbits
 	.align	2
@@ -7892,8 +8029,8 @@ rk_nand_de_init:
 	.global	rk_ftl_get_capacity
 	.type	rk_ftl_get_capacity, %function
 rk_ftl_get_capacity:
-	adrp	x0, .LANCHOR69
-	ldr	w0, [x0, #:lo12:.LANCHOR69]
+	adrp	x0, .LANCHOR68
+	ldr	w0, [x0, #:lo12:.LANCHOR68]
 	ret
 	.size	rk_ftl_get_capacity, .-rk_ftl_get_capacity
 	.section	.text.rknand_print_hex,"ax",@progbits
@@ -7919,9 +8056,9 @@ rknand_print_hex:
 	mov	x19, 0
 	mov	w20, 0
 	adrp	x27, .LC20
-.L1093:
+.L1111:
 	cmp	x25, x19
-	bne	.L1099
+	bne	.L1117
 	ldp	x19, x20, [sp, 16]
 	adrp	x1, .LC20
 	ldp	x21, x22, [sp, 32]
@@ -7933,38 +8070,38 @@ rknand_print_hex:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	printf
-.L1099:
-	cbnz	w20, .L1094
+.L1117:
+	cbnz	w20, .L1112
 	mov	w2, w19
 	mov	x1, x26
 	mov	x0, x23
 	bl	printf
-.L1094:
+.L1112:
 	cmp	w24, 4
-	bne	.L1095
+	bne	.L1113
 	ldr	w1, [x22, x19, lsl 2]
-.L1101:
+.L1119:
 	mov	x0, x21
 	add	w20, w20, 1
 	bl	printf
 	cmp	w20, 15
-	bls	.L1098
+	bls	.L1116
 	mov	w20, 0
 	add	x1, x27, :lo12:.LC20
 	adrp	x0, .LC7
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1098:
+.L1116:
 	add	x19, x19, 1
-	b	.L1093
-.L1095:
+	b	.L1111
+.L1113:
 	cmp	w24, 2
-	bne	.L1097
+	bne	.L1115
 	ldrsh	w1, [x22, x19, lsl 1]
-	b	.L1101
-.L1097:
+	b	.L1119
+.L1115:
 	ldrb	w1, [x22, x19]
-	b	.L1101
+	b	.L1119
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.HynixGetReadRetryDefault,"ax",@progbits
 	.align	2
@@ -7991,18 +8128,18 @@ HynixGetReadRetryDefault:
 	strb	w4, [x0, 5]
 	strb	w3, [x0, 6]
 	strb	w1, [x0, 7]
-	bne	.L1103
+	bne	.L1121
 	mov	w1, -89
 	strb	w1, [x0, 4]
 	adrp	x0, .LANCHOR196+17
 	mov	w1, -9
 	strb	w1, [x0, #:lo12:.LANCHOR196+17]
-.L1159:
+.L1186:
 	mov	w27, 7
-	b	.L1194
-.L1103:
+	b	.L1230
+.L1121:
 	cmp	w26, 3
-	bne	.L1105
+	bne	.L1123
 	mov	w1, -80
 	strb	w1, [x0, 4]
 	mov	w1, -79
@@ -8018,14 +8155,14 @@ HynixGetReadRetryDefault:
 	mov	w1, -74
 	strb	w1, [x0, 10]
 	mov	w1, -73
-.L1195:
+.L1229:
 	mov	w27, 8
 	mov	w28, w27
 	strb	w1, [x0, 11]
-.L1104:
+.L1122:
 	sub	w0, w26, #1
 	cmp	w0, 1
-	bhi	.L1109
+	bhi	.L1128
 	adrp	x26, .LANCHOR25
 	adrp	x0, .LANCHOR26
 	adrp	x25, .LANCHOR6
@@ -8033,11 +8170,11 @@ HynixGetReadRetryDefault:
 	add	x4, x0, :lo12:.LANCHOR26
 	add	x25, x25, :lo12:.LANCHOR6
 	mov	w24, 0
-.L1110:
+.L1129:
 	ldrb	w0, [x26]
 	cmp	w0, w24
-	bhi	.L1116
-.L1117:
+	bhi	.L1135
+.L1136:
 	add	x20, x20, :lo12:.LANCHOR20
 	ldp	x21, x22, [sp, 32]
 	strb	w28, [x20, 1]
@@ -8048,9 +8185,9 @@ HynixGetReadRetryDefault:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1105:
+.L1123:
 	cmp	w26, 4
-	bne	.L1106
+	bne	.L1124
 	mov	w5, -52
 	strb	w5, [x0, 4]
 	mov	w5, -65
@@ -8063,10 +8200,10 @@ HynixGetReadRetryDefault:
 	mov	w5, -51
 	strb	w3, [x0, 10]
 	strb	w5, [x0, 8]
-	b	.L1195
-.L1106:
+	b	.L1229
+.L1124:
 	cmp	w26, 5
-	bne	.L1107
+	bne	.L1125
 	mov	w1, 56
 	strb	w1, [x0, 4]
 	mov	w1, 57
@@ -8076,12 +8213,12 @@ HynixGetReadRetryDefault:
 	strb	w1, [x0, 6]
 	mov	w1, 59
 	strb	w1, [x0, 7]
-.L1194:
+.L1230:
 	mov	w28, 4
-	b	.L1104
-.L1107:
+	b	.L1122
+.L1125:
 	cmp	w26, 6
-	bne	.L1108
+	bne	.L1126
 	mov	w1, 14
 	strb	w1, [x0, 4]
 	mov	w1, 15
@@ -8091,10 +8228,10 @@ HynixGetReadRetryDefault:
 	strb	w1, [x0, 6]
 	mov	w1, 17
 	strb	w1, [x0, 7]
-	b	.L1194
-.L1108:
+	b	.L1230
+.L1126:
 	cmp	w26, 7
-	bne	.L1159
+	bne	.L1127
 	mov	w1, -80
 	strb	w1, [x0, 4]
 	mov	w1, -79
@@ -8117,8 +8254,23 @@ HynixGetReadRetryDefault:
 	mov	w28, 10
 	mov	w1, -43
 	strb	w1, [x0, 13]
-	b	.L1104
-.L1116:
+	b	.L1122
+.L1127:
+	cmp	w26, 8
+	bne	.L1186
+	mov	w1, 6
+	strb	w1, [x0, 4]
+	mov	w1, 7
+	strb	w1, [x0, 5]
+	mov	w1, 9
+	strb	w26, [x0, 6]
+	strb	w1, [x0, 7]
+	mov	w27, 50
+	mov	w1, 10
+	mov	w28, 5
+	strb	w1, [x0, 8]
+	b	.L1122
+.L1135:
 	ldrb	w1, [x4, w24, sxtw]
 	add	x0, x20, :lo12:.LANCHOR20
 	mov	x21, x0
@@ -8132,7 +8284,7 @@ HynixGetReadRetryDefault:
 	ldrb	w23, [x2, 8]
 	add	x23, x1, x23, lsl 8
 	mov	w1, 55
-.L1111:
+.L1130:
 	add	x0, x21, x22
 	str	w1, [x23, 2056]
 	str	x4, [x29, 128]
@@ -8147,15 +8299,15 @@ HynixGetReadRetryDefault:
 	cmp	w28, w22, uxtb
 	ldr	w1, [x29, 140]
 	ldr	x4, [x29, 128]
-	bhi	.L1111
+	bhi	.L1130
 	adrp	x2, .LANCHOR196
 	add	x2, x2, :lo12:.LANCHOR196
 	mov	x0, 0
-.L1114:
+.L1133:
 	add	x7, x19, x0
 	add	x6, x2, x0
 	mov	x1, 1
-.L1113:
+.L1132:
 	lsl	x3, x1, 2
 	lsl	x8, x1, 3
 	ldrb	w10, [x19, x0]
@@ -8164,10 +8316,10 @@ HynixGetReadRetryDefault:
 	ldrb	w3, [x6, x3]
 	add	w3, w3, w10
 	strb	w3, [x7, x8]
-	bne	.L1113
+	bne	.L1132
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L1114
+	bne	.L1133
 	add	w24, w24, 1
 	strb	wzr, [x19, 16]
 	strb	wzr, [x19, 24]
@@ -8177,32 +8329,32 @@ HynixGetReadRetryDefault:
 	strb	wzr, [x19, 48]
 	strb	wzr, [x19, 41]
 	strb	wzr, [x19, 49]
-	b	.L1110
-.L1109:
+	b	.L1129
+.L1128:
 	sub	w0, w26, #3
-	cmp	w0, 4
-	bhi	.L1117
+	cmp	w0, 5
+	bhi	.L1136
 	mul	w24, w27, w28
 	adrp	x25, .LANCHOR25
 	sub	w22, w28, #1
 	mov	w21, 0
 	and	x22, x22, 255
 	lsl	w0, w24, 4
-	asr	w23, w24, 2
+	asr	w23, w24, 1
 	str	w0, [x29, 128]
 	lsl	w0, w23, 1
-	sbfiz	x24, x23, 2, 32
+	sbfiz	x24, x23, 1, 32
 	str	w0, [x29, 140]
 	add	x0, x25, :lo12:.LANCHOR25
 	sub	w25, w26, #5
 	str	x0, [x29, 120]
 	add	x0, x22, 1
 	str	x0, [x29, 112]
-.L1118:
+.L1137:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, w21
-	bls	.L1117
+	bls	.L1136
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w22, [x0, w21, sxtw]
@@ -8217,40 +8369,44 @@ HynixGetReadRetryDefault:
 	str	w0, [x19, 2056]
 	mov	w0, w22
 	bl	NandcWaitFlashReady
-	add	x1, x20, :lo12:.LANCHOR20
 	cmp	w26, 7
-	beq	.L1119
-	ubfiz	x0, x22, 6, 8
-	add	x0, x0, 20
-.L1196:
-	add	x3, x1, x0
+	bne	.L1138
+	mov	x1, 28
+	mov	w0, 160
+	add	x3, x20, :lo12:.LANCHOR20
+	umaddl	x0, w0, w22, x1
+.L1231:
+	add	x3, x3, x0
 	mov	w0, 54
 	str	w0, [x19, 2056]
 	cmp	w26, 4
-	bne	.L1121
+	bne	.L1141
 	mov	w0, 255
 	str	w0, [x19, 2052]
 	mov	w0, 64
 	str	w0, [x19, 2048]
 	mov	w0, 204
-.L1197:
+.L1232:
 	str	w0, [x19, 2052]
 	mov	w0, 77
-	b	.L1198
-.L1119:
-	mov	x3, 28
-	mov	w0, 160
-	umaddl	x0, w0, w22, x3
-	b	.L1196
-.L1121:
+	b	.L1233
+.L1138:
+	cmp	w26, 8
+	beq	.L1140
+	ubfiz	x0, x22, 6, 8
+	add	x3, x20, :lo12:.LANCHOR20
+	add	x0, x0, 20
+	b	.L1231
+.L1141:
 	cmp	w25, 1
-	bhi	.L1123
+	bhi	.L1143
 	add	x0, x20, :lo12:.LANCHOR20
 	ldrb	w0, [x0, 4]
 	str	w0, [x19, 2052]
 	mov	w0, 82
-.L1198:
+.L1233:
 	str	w0, [x19, 2048]
+.L1142:
 	mov	w0, 22
 	str	w0, [x19, 2056]
 	mov	w0, 23
@@ -8259,139 +8415,144 @@ HynixGetReadRetryDefault:
 	str	w0, [x19, 2056]
 	mov	w0, 25
 	str	w0, [x19, 2056]
-	cmp	w26, 6
 	str	wzr, [x19, 2056]
+	cmp	w26, 6
 	str	wzr, [x19, 2052]
 	str	wzr, [x19, 2052]
-	bne	.L1124
+	bne	.L1144
 	mov	w0, 31
 	str	w0, [x19, 2052]
-.L1125:
-	mov	w7, 2
-	str	w7, [x19, 2052]
+.L1145:
+	mov	w0, 2
+	str	w0, [x19, 2052]
 	str	wzr, [x19, 2052]
+.L1185:
 	mov	w0, 48
 	str	w0, [x19, 2056]
-	mov	w0, w22
 	str	x3, [x29, 104]
-	str	w7, [x29, 136]
+	mov	w0, w22
 	bl	NandcWaitFlashReady
 	cmp	w25, 1
 	ldr	x3, [x29, 104]
-	bls	.L1160
-	ldr	w7, [x29, 136]
+	ccmp	w26, 8, 4, hi
+	beq	.L1187
 	cmp	w26, 7
+	mov	w0, 2
 	mov	w1, 32
-	csel	w1, w1, w7, eq
-.L1126:
+	csel	w1, w1, w0, eq
+.L1146:
 	adrp	x8, .LANCHOR147
 	mov	x7, 0
 	ldr	x0, [x8, #:lo12:.LANCHOR147]
-.L1127:
+.L1147:
 	ldr	w10, [x19, 2048]
 	strb	w10, [x0, x7]
 	add	x7, x7, 1
 	cmp	w1, w7, uxtb
-	bhi	.L1127
-	cmp	w26, 7
-	bne	.L1128
+	bhi	.L1147
+	cmp	w26, 8
+	bne	.L1148
 	mov	w1, 0
-.L1130:
+.L1150:
 	ldrb	w7, [x0]
-	cmp	w7, 12
-	beq	.L1129
+	cmp	w7, 50
+	beq	.L1149
 	ldrb	w7, [x0, 1]
-	cmp	w7, 10
-	beq	.L1129
+	cmp	w7, 5
+	beq	.L1149
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 255
 	cmp	w1, 8
-	bne	.L1130
-.L1131:
+	bne	.L1150
+.L1151:
 	adrp	x0, .LC21
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC21
 	bl	printf
-.L1133:
-	b	.L1133
-.L1123:
+.L1153:
+	b	.L1153
+.L1143:
+	cmp	w26, 7
+	bne	.L1142
 	mov	w0, 174
 	str	w0, [x19, 2052]
 	str	wzr, [x19, 2048]
 	mov	w0, 176
-	b	.L1197
-.L1124:
+	b	.L1232
+.L1144:
 	str	wzr, [x19, 2052]
-	b	.L1125
-.L1160:
+	b	.L1145
+.L1187:
 	mov	w1, 16
-	b	.L1126
-.L1129:
+	b	.L1146
+.L1149:
 	cmp	w1, 6
-	bhi	.L1131
-.L1132:
+	bhi	.L1151
+.L1152:
 	ldr	x7, [x8, #:lo12:.LANCHOR147]
 	mov	x0, 0
-.L1137:
+.L1162:
 	ldr	w1, [x29, 128]
 	cmp	w1, w0
-	bgt	.L1138
+	bgt	.L1163
 	ldr	x1, [x8, #:lo12:.LANCHOR147]
 	mov	w10, 8
 	add	x8, x1, x24
-.L1140:
+.L1165:
 	mov	x0, 0
-.L1139:
-	ldr	w11, [x8, x0, lsl 2]
+.L1164:
+	ldrh	w11, [x8, x0, lsl 1]
 	mvn	w11, w11
-	str	w11, [x8, x0, lsl 2]
+	strh	w11, [x8, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	w23, w0
-	bgt	.L1139
+	bgt	.L1164
 	ldr	w0, [x29, 140]
 	subs	w10, w10, #1
-	add	x8, x8, x0, uxtw 2
-	bne	.L1140
-	mov	x11, x1
-	mov	w12, 0
+	add	x8, x8, x0, uxtw 1
+	bne	.L1165
+	mov	x10, x1
+	mov	w11, 0
 	mov	w16, 1
-.L1146:
-	mov	w8, 0
+.L1171:
 	mov	w0, 0
-.L1145:
-	mov	x15, x11
-	lsl	w10, w16, w0
-	mov	w14, 16
-	mov	w13, 0
-.L1143:
-	ldr	w17, [x15]
-	add	x15, x15, x24
-	bics	wzr, w10, w17
-	cinc	w13, w13, eq
-	subs	w14, w14, #1
-	bne	.L1143
-	cmp	w13, 9
-	orr	w10, w8, w10
-	add	w0, w0, 1
-	csel	w8, w10, w8, cs
-	cmp	w0, 32
-	bne	.L1145
-	str	w8, [x11], 4
-	add	w12, w12, 1
-	cmp	w23, w12
-	bgt	.L1146
+	mov	w8, 0
+.L1170:
+	mov	x14, x10
+	lsl	w15, w16, w8
+	mov	w13, 16
+	mov	w12, 0
+.L1168:
+	ldrh	w17, [x14]
+	add	x14, x14, x24
+	bics	wzr, w15, w17
+	cinc	w12, w12, eq
+	subs	w13, w13, #1
+	bne	.L1168
+	cmp	w12, 8
+	bls	.L1169
+	orr	w0, w0, w15
+	and	w0, w0, 65535
+.L1169:
+	add	w8, w8, 1
+	cmp	w8, 16
+	bne	.L1170
+	strh	w0, [x10], 2
+	add	w11, w11, 1
+	cmp	w23, w11
+	bgt	.L1171
 	mov	x0, 0
 	mov	w8, 0
-.L1149:
+.L1174:
 	ldr	w10, [x1, x0]
 	add	x0, x0, 4
 	cmp	w10, 0
 	cinc	w8, w8, eq
 	cmp	x0, 32
-	bne	.L1149
+	bne	.L1174
 	cmp	w8, 7
-	ble	.L1150
+	ble	.L1175
 	mov	w3, 1024
 	mov	w2, 1
 	adrp	x0, .LC22
@@ -8401,64 +8562,92 @@ HynixGetReadRetryDefault:
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC21
 	bl	printf
-.L1151:
-	b	.L1151
-.L1128:
+.L1176:
+	b	.L1176
+.L1148:
+	cmp	w26, 7
+	bne	.L1154
+	mov	w1, 0
+.L1156:
+	ldrb	w7, [x0]
+	cmp	w7, 12
+	beq	.L1155
+	ldrb	w7, [x0, 1]
+	cmp	w7, 10
+	beq	.L1155
+	add	w1, w1, 1
+	add	x0, x0, 4
+	and	w1, w1, 255
+	cmp	w1, 8
+	bne	.L1156
+.L1157:
+	adrp	x0, .LC21
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC21
+	bl	printf
+.L1158:
+	b	.L1158
+.L1155:
+	cmp	w1, 6
+	bls	.L1152
+	b	.L1157
+.L1154:
 	cmp	w26, 6
-	bne	.L1132
+	bne	.L1152
 	mov	x1, 0
-.L1134:
+.L1159:
 	ldrb	w7, [x0, x1]
 	cmp	w7, 12
-	beq	.L1132
+	beq	.L1152
 	add	x7, x0, x1
 	ldrb	w7, [x7, 8]
 	cmp	w7, 4
-	beq	.L1132
+	beq	.L1152
 	add	x1, x1, 1
 	cmp	x1, 8
-	bne	.L1134
+	bne	.L1159
 	adrp	x0, .LC21
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC21
 	bl	printf
-.L1136:
-	b	.L1136
-.L1138:
+.L1161:
+	b	.L1161
+.L1163:
 	ldr	w1, [x19, 2048]
 	strb	w1, [x7, x0]
 	add	x0, x0, 1
-	b	.L1137
-.L1150:
+	b	.L1162
+.L1175:
 	cmp	w26, 6
-	beq	.L1162
+	beq	.L1189
 	cmp	w26, 7
+	beq	.L1190
+	cmp	w26, 8
 	mov	x1, 8
-	mov	x0, 10
+	mov	x0, 5
 	csel	x0, x0, x1, eq
-.L1152:
-	mov	x1, x3
+.L1177:
 	mov	w8, 0
-.L1153:
-	mov	x3, 0
-.L1154:
-	ldrb	w10, [x7, x3]
-	strb	w10, [x1, x3]
-	add	x3, x3, 1
-	cmp	w28, w3, uxtb
-	bhi	.L1154
-	ldr	x2, [x29, 112]
+.L1178:
+	mov	x1, 0
+.L1179:
+	ldrb	w10, [x7, x1]
+	strb	w10, [x3, x1]
+	add	x1, x1, 1
+	cmp	w28, w1, uxtb
+	bhi	.L1179
+	ldr	x1, [x29, 112]
 	add	w8, w8, 1
-	add	x1, x1, x0
+	add	x3, x3, x0
 	cmp	w27, w8
-	add	x7, x7, x2
-	bgt	.L1153
+	add	x7, x7, x1
+	bgt	.L1178
 	mov	w0, 255
 	str	w0, [x19, 2056]
 	mov	w0, w22
 	bl	NandcWaitFlashReady
 	cmp	w25, 1
-	bhi	.L1156
+	bhi	.L1181
 	mov	w0, 54
 	str	w0, [x19, 2056]
 	adrp	x0, .LANCHOR20+4
@@ -8470,19 +8659,52 @@ HynixGetReadRetryDefault:
 	str	w0, [x19, 2056]
 	mov	w0, w21
 	bl	FlashReadCmd
-.L1157:
+.L1182:
 	add	w21, w21, 1
 	mov	w0, w22
 	and	w21, w21, 255
 	bl	NandcWaitFlashReady
-	b	.L1118
-.L1162:
+	b	.L1137
+.L1189:
 	mov	x0, 4
-	b	.L1152
-.L1156:
+	b	.L1177
+.L1190:
+	mov	x0, 10
+	b	.L1177
+.L1181:
+	cmp	w26, 8
+	bne	.L1183
+	mov	w0, 190
+.L1234:
+	str	w0, [x19, 2056]
+	b	.L1182
+.L1183:
 	mov	w0, 56
+	b	.L1234
+.L1140:
+	mov	w0, 120
 	str	w0, [x19, 2056]
-	b	.L1157
+	str	wzr, [x19, 2052]
+	mov	w0, 23
+	str	wzr, [x19, 2052]
+	mov	w1, 25
+	str	wzr, [x19, 2052]
+	add	x3, x20, :lo12:.LANCHOR20
+	str	w0, [x19, 2056]
+	mov	w0, 4
+	str	w0, [x19, 2056]
+	add	x3, x3, 28
+	str	w1, [x19, 2056]
+	mov	w1, 218
+	str	w1, [x19, 2056]
+	mov	w1, 21
+	str	wzr, [x19, 2056]
+	str	wzr, [x19, 2052]
+	str	wzr, [x19, 2052]
+	str	w1, [x19, 2052]
+	str	w0, [x19, 2052]
+	str	wzr, [x19, 2052]
+	b	.L1185
 	.size	HynixGetReadRetryDefault, .-HynixGetReadRetryDefault
 	.section	.text.FlashGetReadRetryDefault,"ax",@progbits
 	.align	2
@@ -8490,14 +8712,14 @@ HynixGetReadRetryDefault:
 	.type	FlashGetReadRetryDefault, %function
 FlashGetReadRetryDefault:
 	mov	w1, w0
-	cbz	w0, .L1199
+	cbz	w0, .L1235
 	sub	w2, w0, #1
-	cmp	w2, 6
-	bhi	.L1201
+	cmp	w2, 7
+	bhi	.L1237
 	b	HynixGetReadRetryDefault
-.L1201:
+.L1237:
 	cmp	w0, 49
-	bne	.L1202
+	bne	.L1238
 	adrp	x2, .LANCHOR20
 	add	x0, x2, :lo12:.LANCHOR20
 	strb	w1, [x2, #:lo12:.LANCHOR20]
@@ -8505,44 +8727,44 @@ FlashGetReadRetryDefault:
 	strb	w1, [x0, 1]
 	mov	w1, 15
 	strb	w1, [x0, 2]
-	adrp	x1, .LANCHOR14
-	add	x1, x1, :lo12:.LANCHOR14
+	adrp	x1, .LANCHOR13
+	add	x1, x1, :lo12:.LANCHOR13
 	mov	w2, 64
-.L1211:
+.L1247:
 	add	x0, x0, 4
 	b	ftl_memcpy
-.L1202:
+.L1238:
 	sub	w0, w0, #65
 	cmp	w1, 33
 	ccmp	w0, 1, 0, ne
-	bhi	.L1203
+	bhi	.L1239
 	adrp	x2, .LANCHOR20
 	add	x0, x2, :lo12:.LANCHOR20
 	strb	w1, [x2, #:lo12:.LANCHOR20]
 	mov	w1, 4
-.L1212:
+.L1248:
 	strb	w1, [x0, 1]
 	mov	w1, 7
 	mov	w2, 45
 	strb	w1, [x0, 2]
-	adrp	x1, .LANCHOR10
-	add	x1, x1, :lo12:.LANCHOR10
-	b	.L1211
-.L1203:
+	adrp	x1, .LANCHOR9
+	add	x1, x1, :lo12:.LANCHOR9
+	b	.L1247
+.L1239:
 	cmp	w1, 34
 	mov	w0, 67
 	ccmp	w1, w0, 4, ne
-	bne	.L1204
+	bne	.L1240
 	adrp	x2, .LANCHOR20
 	add	x0, x2, :lo12:.LANCHOR20
 	strb	w1, [x2, #:lo12:.LANCHOR20]
 	mov	w1, 5
-	b	.L1212
-.L1204:
+	b	.L1248
+.L1240:
 	cmp	w1, 35
 	mov	w0, 68
 	ccmp	w1, w0, 4, ne
-	bne	.L1199
+	bne	.L1235
 	adrp	x2, .LANCHOR20
 	add	x0, x2, :lo12:.LANCHOR20
 	strb	w1, [x2, #:lo12:.LANCHOR20]
@@ -8551,10 +8773,10 @@ FlashGetReadRetryDefault:
 	mov	w1, 17
 	mov	w2, 95
 	strb	w1, [x0, 2]
-	adrp	x1, .LANCHOR9
-	add	x1, x1, :lo12:.LANCHOR9
-	b	.L1211
-.L1199:
+	adrp	x1, .LANCHOR8
+	add	x1, x1, :lo12:.LANCHOR8
+	b	.L1247
+.L1235:
 	ret
 	.size	FlashGetReadRetryDefault, .-FlashGetReadRetryDefault
 	.section	.text.FlashInit,"ax",@progbits
@@ -8562,30 +8784,28 @@ FlashGetReadRetryDefault:
 	.global	FlashInit
 	.type	FlashInit, %function
 FlashInit:
-	stp	x29, x30, [sp, -112]!
+	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	x19, x0
 	stp	x21, x22, [sp, 32]
-	mov	w0, 32768
+	adrp	x22, .LANCHOR30
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR2
+	adrp	x24, .LANCHOR2
 	stp	x25, x26, [sp, 64]
-	adrp	x24, .LANCHOR152
+	adrp	x23, .LANCHOR1
 	stp	x27, x28, [sp, 80]
+	adrp	x25, .LANCHOR152
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	mov	w0, 32768
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR147
-	adrp	x21, .LANCHOR30
-	adrp	x22, .LANCHOR1
-	adrp	x20, .LANCHOR22
+	adrp	x21, .LANCHOR22
+	adrp	x26, .LC23
+	mov	w28, 0
 	str	x0, [x1, #:lo12:.LANCHOR147]
 	mov	w0, 32768
 	bl	ftl_malloc
-	adrp	x25, .LANCHOR6
 	adrp	x1, .LANCHOR153
-	add	x25, x25, :lo12:.LANCHOR6
-	adrp	x26, .LC23
-	mov	w28, 0
 	str	x0, [x1, #:lo12:.LANCHOR153]
 	mov	w0, 4096
 	bl	ftl_malloc
@@ -8597,13 +8817,13 @@ FlashInit:
 	str	x0, [x1, #:lo12:.LANCHOR198]
 	mov	w0, 4096
 	bl	ftl_malloc
-	strb	wzr, [x21, #:lo12:.LANCHOR30]
+	strb	wzr, [x22, #:lo12:.LANCHOR30]
 	adrp	x1, .LANCHOR199
-	strb	wzr, [x22, #:lo12:.LANCHOR1]
+	strb	wzr, [x23, #:lo12:.LANCHOR1]
 	str	x0, [x1, #:lo12:.LANCHOR199]
 	adrp	x1, .LANCHOR150
 	mov	w0, 50
-	strb	w0, [x23, #:lo12:.LANCHOR2]
+	strb	w0, [x24, #:lo12:.LANCHOR2]
 	strb	w0, [x1, #:lo12:.LANCHOR150]
 	adrp	x0, .LANCHOR149
 	mov	w1, 128
@@ -8613,41 +8833,43 @@ FlashInit:
 	adrp	x0, .LANCHOR144
 	str	wzr, [x0, #:lo12:.LANCHOR144]
 	mov	w0, 60
-	strb	w0, [x24, #:lo12:.LANCHOR152]
+	strb	w0, [x25, #:lo12:.LANCHOR152]
 	mov	x0, x19
-	add	x19, x20, :lo12:.LANCHOR22
 	bl	NandcInit
-	mov	x27, x19
+	add	x19, x21, :lo12:.LANCHOR22
+	adrp	x10, .LANCHOR6
+	add	x27, x10, :lo12:.LANCHOR6
 	add	x0, x26, :lo12:.LC23
-	str	x0, [x29, 104]
-.L1218:
-	and	w26, w28, 255
-	mov	w0, w26
+	stp	x0, x19, [x29, 112]
+.L1254:
+	ldrb	w2, [x27, 8]
+	and	w1, w28, 255
+	mov	w26, w1
+	mov	w0, w1
+	str	w2, [x29, 108]
+	ldr	x20, [x27]
 	bl	FlashReset
-	ldrb	w5, [x25, 8]
 	mov	w0, w26
-	ldr	x4, [x25]
 	bl	NandcFlashCs
-	ubfiz	x1, x5, 8, 8
-	add	x1, x4, x1
+	ldr	w2, [x29, 108]
 	mov	w0, 144
-	str	x1, [x29, 96]
-	str	w0, [x1, 2056]
+	ubfiz	x2, x2, 8, 8
+	add	x20, x20, x2
+	str	w0, [x20, 2056]
 	mov	x0, 200
-	str	wzr, [x1, 2052]
+	str	wzr, [x20, 2052]
 	bl	udelay
-	ldr	x1, [x29, 96]
-	ldr	w0, [x1, 2048]
+	ldr	w0, [x20, 2048]
 	strb	w0, [x19]
-	ldr	w0, [x1, 2048]
+	ldr	w0, [x20, 2048]
 	strb	w0, [x19, 1]
-	ldr	w0, [x1, 2048]
+	ldr	w0, [x20, 2048]
 	strb	w0, [x19, 2]
-	ldr	w0, [x1, 2048]
+	ldr	w0, [x20, 2048]
 	strb	w0, [x19, 3]
-	ldr	w0, [x1, 2048]
+	ldr	w0, [x20, 2048]
 	strb	w0, [x19, 4]
-	ldr	w0, [x1, 2048]
+	ldr	w0, [x20, 2048]
 	strb	w0, [x19, 5]
 	mov	w0, w26
 	bl	NandcFlashDeCs
@@ -8655,303 +8877,331 @@ FlashInit:
 	sub	w0, w2, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bhi	.L1214
+	bhi	.L1250
 	ldrb	w7, [x19, 5]
 	add	w1, w28, 1
 	ldrb	w6, [x19, 4]
 	ldrb	w5, [x19, 3]
 	ldrb	w4, [x19, 2]
 	ldrb	w3, [x19, 1]
-	ldr	x0, [x29, 104]
+	ldr	x0, [x29, 112]
 	bl	printf
-.L1214:
-	cbnz	w28, .L1215
-	ldrb	w0, [x27]
+.L1250:
+	cbnz	w28, .L1251
+	ldr	x0, [x29, 120]
+	ldrb	w0, [x0]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bhi	.L1256
-	ldrb	w0, [x27, 1]
+	bhi	.L1295
+	ldr	x0, [x29, 120]
+	ldrb	w0, [x0, 1]
 	cmp	w0, 255
-	beq	.L1256
-.L1215:
+	beq	.L1295
+.L1251:
 	ldrb	w0, [x19]
 	cmp	w0, 181
-	bne	.L1217
+	bne	.L1253
 	mov	w0, 44
 	strb	w0, [x19]
-.L1217:
+.L1253:
 	add	w28, w28, 1
-	add	x25, x25, 16
+	add	x27, x27, 16
 	add	x19, x19, 8
 	cmp	w28, 4
-	bne	.L1218
-	ldrb	w0, [x20, #:lo12:.LANCHOR22]
+	bne	.L1254
+	ldrb	w0, [x21, #:lo12:.LANCHOR22]
 	cmp	w0, 173
-	beq	.L1219
+	beq	.L1255
 	adrp	x0, .LANCHOR155
 	ldr	w0, [x0, #:lo12:.LANCHOR155]
 	bl	NandcSetDdrMode
-.L1219:
+.L1255:
+	adrp	x20, .LANCHOR18
+	adrp	x28, .LANCHOR5
+	adrp	x26, .LANCHOR119
+	adrp	x19, .LANCHOR20
 	mov	w2, 852
-	adrp	x26, .LANCHOR20
 	mov	w1, 0
-	add	x0, x26, :lo12:.LANCHOR20
-	adrp	x19, .LANCHOR18
+	add	x0, x19, :lo12:.LANCHOR20
 	bl	ftl_memset
-	adrp	x28, .LANCHOR31
-	add	x0, x28, :lo12:.LANCHOR31
-	str	x0, [x19, #:lo12:.LANCHOR18]
-	add	x0, x20, :lo12:.LANCHOR22
-	adrp	x27, .LANCHOR5
-	ldrb	w2, [x0, 1]
-	strb	wzr, [x27, #:lo12:.LANCHOR5]
-	cmp	w2, 161
-	beq	.L1220
-	cmp	w2, 218
-	beq	.L1220
-	and	w1, w2, -33
-	cmp	w1, 209
-	beq	.L1220
-	cmp	w2, 220
-	bne	.L1221
+	adrp	x3, .LANCHOR31
+	ldr	w4, [x26, #:lo12:.LANCHOR119]
+	add	x0, x3, :lo12:.LANCHOR31
+	strb	wzr, [x28, #:lo12:.LANCHOR5]
+	str	x0, [x20, #:lo12:.LANCHOR18]
+	mov	w0, 12336
+	movk	w0, 0x5638, lsl 16
+	cmp	w4, w0
+	bne	.L1256
+	adrp	x0, .LANCHOR29
+	mov	w1, 1
+	str	w1, [x0, #:lo12:.LANCHOR29]
+.L1256:
+	add	x0, x21, :lo12:.LANCHOR22
+	ldrb	w1, [x0, 1]
+	add	w0, w1, 95
+	and	w2, w0, 255
+	mov	x0, 1
+	cmp	w2, 57
+	bhi	.L1257
+	movk	x0, 0x205, lsl 48
+	lsr	x0, x0, x2
+	mvn	x0, x0
+.L1257:
+	cmp	w1, 241
+	and	w0, w0, 1
+	cset	w2, eq
+	eor	w0, w0, 1
+	orr	w0, w2, w0
+	cbnz	w0, .L1258
+	cmp	w1, 220
+	bne	.L1259
+	add	x0, x21, :lo12:.LANCHOR22
 	ldrb	w0, [x0, 3]
 	cmp	w0, 149
-	bne	.L1221
-.L1220:
+	bne	.L1259
+.L1258:
 	mov	w0, 1
-	adrp	x25, .LANCHOR200
-	add	x1, x25, :lo12:.LANCHOR200
-	strb	w0, [x22, #:lo12:.LANCHOR1]
+	adrp	x27, .LANCHOR200
+	add	x2, x27, :lo12:.LANCHOR200
+	strb	w0, [x23, #:lo12:.LANCHOR1]
 	mov	w0, 16
-	strb	w0, [x23, #:lo12:.LANCHOR2]
-	strb	w0, [x24, #:lo12:.LANCHOR152]
-	add	x3, x20, :lo12:.LANCHOR22
-	ldrb	w0, [x20, #:lo12:.LANCHOR22]
-	strb	w0, [x1, 1]
-	strb	w2, [x1, 2]
+	strb	w0, [x24, #:lo12:.LANCHOR2]
+	strb	w0, [x25, #:lo12:.LANCHOR152]
+	add	x5, x21, :lo12:.LANCHOR22
+	ldrb	w0, [x21, #:lo12:.LANCHOR22]
+	strb	w0, [x2, 1]
+	strb	w1, [x2, 2]
 	cmp	w0, 152
-	bne	.L1222
-	ldrsb	w0, [x3, 4]
-	tbnz	w0, #31, .L1222
+	bne	.L1260
+	ldrsb	w0, [x5, 4]
+	tbnz	w0, #31, .L1260
 	mov	w0, 24
-	strb	w0, [x24, #:lo12:.LANCHOR152]
-.L1222:
-	adrp	x0, .LANCHOR29
-	mov	w1, 12336
-	movk	w1, 0x5638, lsl 16
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	cmp	w0, 2049
-	ccmp	w0, w1, 4, ne
-	bne	.L1223
+	strb	w0, [x25, #:lo12:.LANCHOR152]
+.L1260:
+	cmp	w4, 2049
+	mov	w0, 12336
+	movk	w0, 0x5638, lsl 16
+	ccmp	w4, w0, 4, ne
+	bne	.L1261
 	mov	w0, 16
-	strb	w0, [x24, #:lo12:.LANCHOR152]
-.L1223:
-	cmp	w2, 218
-	bne	.L1224
-	add	x0, x25, :lo12:.LANCHOR200
+	strb	w0, [x25, #:lo12:.LANCHOR152]
+.L1261:
+	cmp	w1, 218
+	bne	.L1262
+	add	x0, x27, :lo12:.LANCHOR200
 	mov	w1, 2048
 	strh	w1, [x0, 14]
 	mov	w1, -38
-.L1294:
+.L1329:
 	strb	w1, [x0, 2]
-.L1225:
+.L1263:
 	adrp	x1, .LANCHOR143
 	add	x1, x1, :lo12:.LANCHOR143
 	mov	w2, 32
 	add	x1, x1, 32
+	str	x3, [x29, 120]
 	adrp	x0, .LANCHOR7
 	add	x0, x0, :lo12:.LANCHOR7
 	bl	ftl_memcpy
+	ldr	x3, [x29, 120]
 	mov	w2, 32
-	add	x1, x25, :lo12:.LANCHOR200
-	add	x0, x28, :lo12:.LANCHOR31
+	add	x1, x27, :lo12:.LANCHOR200
+	add	x0, x3, :lo12:.LANCHOR31
 	bl	ftl_memcpy
-.L1221:
-	ldrb	w0, [x22, #:lo12:.LANCHOR1]
-	adrp	x25, .LANCHOR8
-	cbnz	w0, .L1227
+.L1259:
+	ldrb	w0, [x23, #:lo12:.LANCHOR1]
+	adrp	x27, .LANCHOR15
+	cbnz	w0, .L1266
 	bl	FlashLoadPhyInfoInRam
-	cbnz	w0, .L1229
-	ldr	x0, [x19, #:lo12:.LANCHOR18]
-	adrp	x24, .LANCHOR24
+	cbnz	w0, .L1268
+	ldr	x0, [x20, #:lo12:.LANCHOR18]
+	adrp	x25, .LANCHOR24
 	ldrb	w1, [x0, 17]
 	and	w0, w1, 7
-	strb	w0, [x24, #:lo12:.LANCHOR24]
-	tbnz	x1, 0, .L1229
+	strb	w0, [x25, #:lo12:.LANCHOR24]
+	tbnz	x1, 0, .L1268
 	mov	w1, 1
-	strb	w1, [x21, #:lo12:.LANCHOR30]
+	strb	w1, [x22, #:lo12:.LANCHOR30]
 	bl	FlashSetInterfaceMode
-	ldrb	w0, [x24, #:lo12:.LANCHOR24]
+	ldrb	w0, [x25, #:lo12:.LANCHOR24]
 	bl	NandcSetMode
-.L1229:
-	ldr	x0, [x19, #:lo12:.LANCHOR18]
+.L1268:
+	ldr	x0, [x20, #:lo12:.LANCHOR18]
 	ldrb	w0, [x0, 26]
-	strb	w0, [x25, #:lo12:.LANCHOR8]
+	strb	w0, [x27, #:lo12:.LANCHOR15]
 	bl	FlashLoadPhyInfo
-	cbz	w0, .L1227
-	ldr	x0, [x19, #:lo12:.LANCHOR18]
+	cbz	w0, .L1266
+	ldr	x0, [x20, #:lo12:.LANCHOR18]
 	ldrh	w1, [x0, 14]
 	adrp	x0, .LC24
 	add	x0, x0, :lo12:.LC24
 	bl	printf
 	bl	FlashLoadPhyInfoInRam
 	cmn	w0, #1
-	beq	.L1213
+	beq	.L1249
 	bl	FlashDieInfoInit
-	ldr	x0, [x19, #:lo12:.LANCHOR18]
+	ldr	x0, [x20, #:lo12:.LANCHOR18]
 	ldrb	w0, [x0, 19]
 	bl	FlashGetReadRetryDefault
-	ldr	x0, [x19, #:lo12:.LANCHOR18]
+	ldr	x0, [x20, #:lo12:.LANCHOR18]
 	adrp	x1, .LANCHOR122
 	ldrh	w1, [x1, #:lo12:.LANCHOR122]
 	ldrb	w2, [x0, 9]
 	add	w1, w1, 4095
 	cmp	w2, w1, lsr 12
-	blt	.L1232
+	blt	.L1271
 	ldrh	w1, [x0, 14]
 	add	w1, w1, 255
 	cmp	w2, w1, lsr 8
-	bge	.L1233
-.L1232:
+	bge	.L1272
+.L1271:
 	ldrh	w1, [x0, 14]
 	and	w1, w1, -256
 	strh	w1, [x0, 14]
-.L1233:
+.L1272:
 	adrp	x0, .LANCHOR24
 	ldrb	w0, [x0, #:lo12:.LANCHOR24]
 	tst	w0, 6
-	beq	.L1234
+	beq	.L1273
 	bl	FlashSavePhyInfo
 	adrp	x0, .LANCHOR148
 	ldr	w1, [x0, #:lo12:.LANCHOR148]
 	mov	w0, 0
 	bl	FlashDdrParaScan
-.L1234:
+.L1273:
 	bl	FlashSavePhyInfo
-.L1227:
-	ldr	x2, [x19, #:lo12:.LANCHOR18]
-	adrp	x24, .LANCHOR24
+.L1266:
+	ldr	x2, [x20, #:lo12:.LANCHOR18]
+	adrp	x25, .LANCHOR24
 	ldrb	w0, [x2, 26]
-	strb	w0, [x25, #:lo12:.LANCHOR8]
+	strb	w0, [x27, #:lo12:.LANCHOR15]
 	ldrh	w0, [x2, 16]
 	ubfx	x1, x0, 7, 1
-	strb	w1, [x27, #:lo12:.LANCHOR5]
+	strb	w1, [x28, #:lo12:.LANCHOR5]
 	adrp	x1, .LANCHOR201
 	ubfx	x3, x0, 3, 1
-	adrp	x27, .LANCHOR145
+	adrp	x28, .LANCHOR145
 	strb	w3, [x1, #:lo12:.LANCHOR201]
 	adrp	x1, .LANCHOR27
 	ubfx	x3, x0, 4, 1
 	ubfx	x0, x0, 8, 3
 	strb	w3, [x1, #:lo12:.LANCHOR27]
-	strb	w0, [x24, #:lo12:.LANCHOR24]
+	strb	w0, [x25, #:lo12:.LANCHOR24]
 	ldrh	w1, [x2, 10]
 	ldrb	w0, [x2, 12]
-	str	xzr, [x27, #:lo12:.LANCHOR145]
+	str	xzr, [x28, #:lo12:.LANCHOR145]
 	sdiv	w1, w1, w0
 	ldrb	w0, [x2, 18]
 	bl	BuildFlashLsbPageTable
 	bl	FlashDieInfoInit
-	ldr	x0, [x19, #:lo12:.LANCHOR18]
+	ldr	x0, [x20, #:lo12:.LANCHOR18]
 	ldrh	w1, [x0, 16]
-	tbz	x1, 6, .L1236
-	adrp	x1, .LANCHOR11
+	tbz	x1, 6, .L1275
+	add	x3, x19, :lo12:.LANCHOR20
+	adrp	x1, .LANCHOR10
 	ldrb	w0, [x0, 19]
-	adrp	x3, .LANCHOR13
-	strb	w0, [x1, #:lo12:.LANCHOR11]
-	add	x1, x26, :lo12:.LANCHOR20
-	ldrb	w2, [x1, 1]
-	strb	w2, [x3, #:lo12:.LANCHOR13]
-	adrp	x2, .LANCHOR151
-	ldrb	w4, [x1, 2]
-	strb	w4, [x2, #:lo12:.LANCHOR151]
-	sub	w4, w0, #1
-	and	w4, w4, 255
-	cmp	w4, 6
-	mov	x4, x3
-	bhi	.L1237
-	adrp	x2, HynixReadRetrial
-	add	x2, x2, :lo12:HynixReadRetrial
-	str	x2, [x27, #:lo12:.LANCHOR145]
-	sub	w2, w0, #5
-	and	w2, w2, 255
-	cmp	w2, 1
-	bhi	.L1238
-	adrp	x2, .LANCHOR36
-	add	x1, x1, 20
-	mov	w3, 1
-	str	w3, [x2, #:lo12:.LANCHOR36]
-.L1239:
-	mov	x2, 0
-	mov	w3, 0
-.L1241:
-	ldrsb	w4, [x1, x2]
-	add	x2, x2, 1
-	cmp	w4, 0
-	cinc	w3, w3, eq
-	cmp	x2, 32
-	bne	.L1241
-	cmp	w3, 27
-	bls	.L1236
+	adrp	x2, .LANCHOR12
+	strb	w0, [x1, #:lo12:.LANCHOR10]
+	mov	x4, x2
+	ldrb	w1, [x3, 1]
+	strb	w1, [x2, #:lo12:.LANCHOR12]
+	adrp	x1, .LANCHOR151
+	ldrb	w3, [x3, 2]
+	strb	w3, [x1, #:lo12:.LANCHOR151]
+	sub	w3, w0, #1
+	and	w3, w3, 255
+	cmp	w3, 7
+	bhi	.L1276
+	adrp	x1, HynixReadRetrial
+	add	x1, x1, :lo12:HynixReadRetrial
+	str	x1, [x28, #:lo12:.LANCHOR145]
+	sub	w1, w0, #5
+	and	w1, w1, 255
+	cmp	w1, 1
+	ccmp	w0, 8, 4, hi
+	bne	.L1277
+	adrp	x1, .LANCHOR36
+	mov	w2, 1
+	str	w2, [x1, #:lo12:.LANCHOR36]
+.L1277:
+	add	x19, x19, :lo12:.LANCHOR20
+	cmp	w0, 7
+	beq	.L1330
+	cmp	w0, 8
+	bne	.L1298
+.L1330:
+	add	x19, x19, 28
+.L1278:
+	mov	x1, 0
+	mov	w2, 0
+.L1280:
+	ldrsb	w3, [x19, x1]
+	add	x1, x1, 1
+	cmp	w3, 0
+	cinc	w2, w2, eq
+	cmp	x1, 32
+	bne	.L1280
+	cmp	w2, 27
+	bls	.L1275
 	bl	FlashGetReadRetryDefault
 	bl	FlashSavePhyInfo
-.L1236:
-	adrp	x0, .LANCHOR29
-	ldr	w1, [x0, #:lo12:.LANCHOR29]
+.L1275:
+	ldr	w1, [x26, #:lo12:.LANCHOR119]
 	mov	w0, 12336
 	movk	w0, 0x5638, lsl 16
 	cmp	w1, w0
-	bne	.L1250
-	ldrb	w0, [x25, #:lo12:.LANCHOR8]
-	cbz	w0, .L1250
-	ldr	x0, [x19, #:lo12:.LANCHOR18]
+	bne	.L1289
+	ldrb	w0, [x27, #:lo12:.LANCHOR15]
+	cbz	w0, .L1289
+	ldr	x0, [x20, #:lo12:.LANCHOR18]
 	strb	wzr, [x0, 18]
-.L1250:
-	ldrb	w0, [x20, #:lo12:.LANCHOR22]
+.L1289:
+	ldrb	w0, [x21, #:lo12:.LANCHOR22]
 	cmp	w0, 44
-	bne	.L1251
-	ldrb	w0, [x21, #:lo12:.LANCHOR30]
-	cbz	w0, .L1251
-	strb	wzr, [x21, #:lo12:.LANCHOR30]
+	bne	.L1290
+	ldrb	w0, [x22, #:lo12:.LANCHOR30]
+	cbz	w0, .L1290
+	strb	wzr, [x22, #:lo12:.LANCHOR30]
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
 	bl	NandcSetMode
-.L1251:
+.L1290:
+	ldrb	w0, [x25, #:lo12:.LANCHOR24]
+	tst	w0, 6
+	beq	.L1291
+	ldrb	w1, [x22, #:lo12:.LANCHOR30]
+	cbnz	w1, .L1292
+	tbnz	x0, 0, .L1291
+.L1292:
 	mov	w0, 0
 	bl	flash_enter_slc_mode
-	ldrb	w0, [x24, #:lo12:.LANCHOR24]
-	tst	w0, 6
-	beq	.L1252
-	ldrb	w1, [x21, #:lo12:.LANCHOR30]
-	cbnz	w1, .L1253
-	tbnz	x0, 0, .L1252
-.L1253:
 	adrp	x0, .LANCHOR148
 	ldr	w1, [x0, #:lo12:.LANCHOR148]
 	mov	w0, 0
 	bl	FlashDdrParaScan
-.L1252:
 	mov	w0, 0
 	bl	flash_exit_slc_mode
-	ldr	x0, [x19, #:lo12:.LANCHOR18]
+.L1291:
+	ldr	x0, [x20, #:lo12:.LANCHOR18]
 	ldrb	w0, [x0, 20]
 	bl	FlashBchSel
 	adrp	x0, .LANCHOR141
 	add	x0, x0, :lo12:.LANCHOR141
 	bl	FlashReadIdbDataRaw
-	ldr	x2, [x19, #:lo12:.LANCHOR18]
+	ldr	x2, [x20, #:lo12:.LANCHOR18]
 	mov	w0, 16
-	adrp	x1, .LANCHOR15
-	strb	w0, [x23, #:lo12:.LANCHOR2]
-	add	x0, x1, :lo12:.LANCHOR15
+	adrp	x1, .LANCHOR14
+	strb	w0, [x24, #:lo12:.LANCHOR2]
+	add	x0, x1, :lo12:.LANCHOR14
 	ldrb	w3, [x2, 12]
 	strh	w3, [x0, 8]
 	ldrb	w4, [x2, 7]
 	str	w4, [x0, 4]
-	ldr	w4, [x20, #:lo12:.LANCHOR22]
-	str	w4, [x1, #:lo12:.LANCHOR15]
+	ldr	w4, [x21, #:lo12:.LANCHOR22]
+	str	w4, [x1, #:lo12:.LANCHOR14]
 	adrp	x1, .LANCHOR25
 	ldrh	w4, [x2, 14]
 	ldrb	w1, [x1, #:lo12:.LANCHOR25]
@@ -8973,9 +9223,9 @@ FlashInit:
 	and	w1, w1, 65535
 	strh	w5, [x0, 26]
 	strh	w1, [x0, 22]
-	ldrb	w5, [x22, #:lo12:.LANCHOR1]
+	ldrb	w5, [x23, #:lo12:.LANCHOR1]
 	cmp	w5, 1
-	bne	.L1254
+	bne	.L1293
 	ubfiz	w1, w1, 1, 15
 	lsr	w4, w4, 1
 	ubfiz	w3, w3, 1, 15
@@ -8984,102 +9234,108 @@ FlashInit:
 	mov	w1, 8
 	strh	w3, [x0, 20]
 	strh	w1, [x0, 26]
-.L1254:
+.L1293:
 	ldrb	w0, [x2, 20]
 	bl	FlashBchSel
 	mov	w0, 0
-.L1213:
+.L1249:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 112
+	ldp	x29, x30, [sp], 128
 	ret
-.L1224:
-	cmp	w2, 220
-	bne	.L1225
-	add	x0, x25, :lo12:.LANCHOR200
+.L1262:
+	cmp	w1, 220
+	bne	.L1264
+	add	x0, x27, :lo12:.LANCHOR200
 	mov	w1, 4096
 	strh	w1, [x0, 14]
 	mov	w1, -36
-	b	.L1294
-.L1238:
-	add	x2, x1, 20
-	cmp	w0, 7
-	add	x1, x1, 28
-	csel	x1, x1, x2, eq
-	b	.L1239
-.L1237:
-	sub	w1, w0, #17
-	and	w1, w1, 255
-	cmp	w1, 2
-	bhi	.L1243
-	adrp	x1, MicronReadRetrial
-	add	x1, x1, :lo12:MicronReadRetrial
-	str	x1, [x27, #:lo12:.LANCHOR145]
-	cmp	w0, 19
-	beq	.L1244
+	b	.L1329
+.L1264:
+	cmp	w1, 211
+	bne	.L1263
+	add	x0, x27, :lo12:.LANCHOR200
+	mov	w1, 4096
+	strh	w1, [x0, 14]
+	mov	w1, 2
+	strb	w1, [x0, 13]
+	b	.L1263
 .L1298:
+	add	x19, x19, 20
+	b	.L1278
+.L1276:
+	sub	w3, w0, #17
+	and	w3, w3, 255
+	cmp	w3, 2
+	bhi	.L1282
+	adrp	x2, MicronReadRetrial
+	add	x2, x2, :lo12:MicronReadRetrial
+	str	x2, [x28, #:lo12:.LANCHOR145]
+	cmp	w0, 19
+	beq	.L1283
+.L1334:
 	mov	w0, 7
-	b	.L1296
-.L1244:
+	b	.L1332
+.L1283:
 	mov	w0, 15
-.L1296:
-	strb	w0, [x2, #:lo12:.LANCHOR151]
-	b	.L1236
-.L1243:
-	sub	w1, w0, #65
+.L1332:
+	strb	w0, [x1, #:lo12:.LANCHOR151]
+	b	.L1275
+.L1282:
+	sub	w3, w0, #65
 	cmp	w0, 33
-	and	w1, w1, 255
-	ccmp	w1, 1, 0, ne
-	bhi	.L1245
+	and	w3, w3, 255
+	ccmp	w3, 1, 0, ne
+	bhi	.L1284
 	adrp	x0, ToshibaReadRetrial
 	add	x0, x0, :lo12:ToshibaReadRetrial
-	str	x0, [x27, #:lo12:.LANCHOR145]
+	str	x0, [x28, #:lo12:.LANCHOR145]
 	mov	w0, 4
-	strb	w0, [x3, #:lo12:.LANCHOR13]
-	b	.L1298
-.L1245:
+	strb	w0, [x2, #:lo12:.LANCHOR12]
+	b	.L1334
+.L1284:
 	sub	w3, w0, #34
-	sub	w1, w0, #67
+	sub	w2, w0, #67
 	and	w3, w3, 255
-	and	w1, w1, 255
+	and	w2, w2, 255
 	cmp	w3, 1
-	ccmp	w1, 1, 0, hi
-	bhi	.L1246
+	ccmp	w2, 1, 0, hi
+	bhi	.L1285
 	adrp	x3, ToshibaReadRetrial
 	add	x3, x3, :lo12:ToshibaReadRetrial
-	str	x3, [x27, #:lo12:.LANCHOR145]
+	str	x3, [x28, #:lo12:.LANCHOR145]
 	cmp	w0, 35
 	mov	w3, 68
 	ccmp	w0, w3, 4, ne
-	beq	.L1247
+	beq	.L1286
 	mov	w0, 7
-.L1295:
-	strb	w0, [x2, #:lo12:.LANCHOR151]
-	cmp	w1, 1
-	bhi	.L1249
+.L1331:
+	strb	w0, [x1, #:lo12:.LANCHOR151]
+	cmp	w2, 1
+	bhi	.L1288
 	mov	w0, 4
-.L1297:
-	strb	w0, [x4, #:lo12:.LANCHOR13]
-	b	.L1236
-.L1247:
+.L1333:
+	strb	w0, [x4, #:lo12:.LANCHOR12]
+	b	.L1275
+.L1286:
 	mov	w0, 17
-	b	.L1295
-.L1249:
+	b	.L1331
+.L1288:
 	mov	w0, 5
-	b	.L1297
-.L1246:
+	b	.L1333
+.L1285:
 	cmp	w0, 49
-	bne	.L1236
+	bne	.L1275
 	adrp	x0, SamsungReadRetrial
 	add	x0, x0, :lo12:SamsungReadRetrial
-	str	x0, [x27, #:lo12:.LANCHOR145]
-	b	.L1236
-.L1256:
+	str	x0, [x28, #:lo12:.LANCHOR145]
+	b	.L1275
+.L1295:
 	mov	w0, -2
-	b	.L1213
+	b	.L1249
 	.size	FlashInit, .-FlashInit
 	.section	.text.FlashReadSlc2KPages,"ax",@progbits
 	.align	2
@@ -9104,9 +9360,9 @@ FlashReadSlc2KPages:
 	add	x23, x23, :lo12:.LANCHOR25
 	adrp	x26, .LANCHOR26
 	str	x27, [sp, 80]
-.L1300:
+.L1336:
 	cmp	x22, x19
-	bne	.L1312
+	bne	.L1348
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -9115,7 +9371,7 @@ FlashReadSlc2KPages:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1312:
+.L1348:
 	mov	w1, w25
 	mov	w4, w21
 	add	x3, x29, 104
@@ -9125,15 +9381,15 @@ FlashReadSlc2KPages:
 	ldrb	w1, [x23]
 	ldr	w0, [x29, 104]
 	cmp	w1, w0
-	bhi	.L1301
+	bhi	.L1337
 	mov	w0, -1
 	str	w0, [x19]
-.L1302:
+.L1338:
 	sub	w21, w21, #1
 	add	x19, x19, 56
 	and	w21, w21, 255
-	b	.L1300
-.L1301:
+	b	.L1336
+.L1337:
 	add	x1, x26, :lo12:.LANCHOR26
 	ldrb	w27, [x1, w0, uxtw]
 	mov	w0, w27
@@ -9178,51 +9434,51 @@ FlashReadSlc2KPages:
 	ldrb	w2, [x1, #:lo12:.LANCHOR33]
 	add	w1, w2, w2, lsl 1
 	cmp	w0, w1, lsr 2
-	bls	.L1305
+	bls	.L1341
 	cmn	w0, #1
 	mov	w1, 256
 	csel	w0, w0, w1, eq
-.L1305:
+.L1341:
 	cmp	w0, 256
 	ccmn	w0, #1, 4, ne
 	csel	w0, w0, wzr, eq
 	str	w0, [x19]
 	ldr	x0, [x19, 16]
-	cbz	x0, .L1308
+	cbz	x0, .L1344
 	ldr	w1, [x0, 12]
 	cmn	w1, #1
-	bne	.L1308
+	bne	.L1344
 	ldr	w1, [x0, 8]
 	cmn	w1, #1
-	bne	.L1308
+	bne	.L1344
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L1308
+	beq	.L1344
 	str	w1, [x19]
-.L1308:
+.L1344:
 	ldr	w3, [x19]
 	cmn	w3, #1
-	bne	.L1302
+	bne	.L1338
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC25
 	add	x0, x0, :lo12:.LC25
 	bl	printf
 	ldr	x1, [x19, 8]
-	cbz	x1, .L1310
+	cbz	x1, .L1346
 	adrp	x0, .LC26
 	mov	w3, 8
 	mov	w2, 4
 	add	x0, x0, :lo12:.LC26
 	bl	rknand_print_hex
-.L1310:
+.L1346:
 	ldr	x1, [x19, 16]
-	cbz	x1, .L1302
+	cbz	x1, .L1338
 	mov	w3, 4
 	adrp	x0, .LC27
 	mov	w2, w3
 	add	x0, x0, :lo12:.LC27
 	bl	rknand_print_hex
-	b	.L1302
+	b	.L1338
 	.size	FlashReadSlc2KPages, .-FlashReadSlc2KPages
 	.section	.text.FlashReadPages,"ax",@progbits
 	.align	2
@@ -9239,7 +9495,7 @@ FlashReadPages:
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	stp	w2, w1, [x29, 148]
-	cbnz	w3, .L1331
+	cbnz	w3, .L1367
 	mov	x25, x0
 	adrp	x0, .LANCHOR31+9
 	adrp	x27, .LANCHOR20
@@ -9255,15 +9511,15 @@ FlashReadPages:
 	str	x0, [x29, 104]
 	add	x0, x0, 4
 	str	x0, [x29, 96]
-.L1332:
+.L1368:
 	ldr	w0, [x29, 152]
 	cmp	w22, w0
-	bcc	.L1366
+	bcc	.L1402
 	mov	w0, 0
-	b	.L1330
-.L1331:
+	b	.L1366
+.L1367:
 	bl	FlashReadSlc2KPages
-.L1330:
+.L1366:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9271,7 +9527,7 @@ FlashReadPages:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1366:
+.L1402:
 	mov	w26, 56
 	add	x3, x29, 168
 	ldp	w1, w0, [x29, 148]
@@ -9287,13 +9543,13 @@ FlashReadPages:
 	ldr	w1, [x29, 168]
 	ldrb	w0, [x0, #:lo12:.LANCHOR25]
 	cmp	w0, w1
-	bhi	.L1334
+	bhi	.L1370
 	mov	w0, -1
 	str	w0, [x25, x26]
-.L1335:
+.L1371:
 	add	w22, w22, 1
-	b	.L1332
-.L1334:
+	b	.L1368
+.L1370:
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w19, [x0, w1, uxtw]
@@ -9303,72 +9559,74 @@ FlashReadPages:
 	mov	w0, w19
 	csel	w20, w20, wzr, ne
 	bl	NandcWaitFlashReady
-	adrp	x1, .LANCHOR18
-	str	x1, [x29, 120]
-	ldr	x0, [x1, #:lo12:.LANCHOR18]
-	ldrb	w2, [x0, 19]
-	sub	w0, w2, #1
+	adrp	x2, .LANCHOR18
+	str	x2, [x29, 120]
+	ldr	x0, [x2, #:lo12:.LANCHOR18]
+	ldrb	w1, [x0, 19]
+	sub	w0, w1, #1
 	and	w0, w0, 255
-	cmp	w0, 6
-	bhi	.L1337
+	cmp	w0, 7
+	bhi	.L1373
 	add	x0, x27, :lo12:.LANCHOR20
-	sxtw	x1, w19
-	add	x0, x0, x1
-	cmp	w2, 7
+	sxtw	x2, w19
+	add	x0, x0, x2
+	sub	w1, w1, #7
+	and	w1, w1, 255
+	cmp	w1, 1
 	ldrb	w3, [x0, 12]
-	bne	.L1338
+	bhi	.L1374
 	ldrb	w3, [x0, 20]
-.L1338:
+.L1374:
 	adrp	x0, .LANCHOR21
 	add	x0, x0, :lo12:.LANCHOR21
-	ldrb	w0, [x0, x1]
+	ldrb	w0, [x0, x2]
 	cmp	w0, w3
-	beq	.L1337
+	beq	.L1373
 	ldp	x2, x0, [x29, 96]
 	ldrb	w1, [x0, 1]
 	mov	w0, w19
 	bl	HynixSetRRPara
-.L1337:
+.L1373:
 	mov	w0, w19
 	bl	NandcFlashCs
 	ldr	w0, [x29, 148]
 	cmp	w0, 1
 	cset	w0, eq
 	orr	w24, w0, w24, lsr 31
-	cbz	w24, .L1339
-	adrp	x0, .LANCHOR8
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L1339
+	cbz	w24, .L1375
+	adrp	x0, .LANCHOR15
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	cbz	w0, .L1375
 	mov	w0, w19
 	bl	flash_enter_slc_mode
-.L1340:
+.L1376:
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
 	str	x0, [x29, 112]
 	ldr	x0, [x29, 128]
 	add	x0, x0, :lo12:.LANCHOR5
 	str	x0, [x29, 136]
-.L1346:
+.L1382:
 	ldr	w1, [x29, 172]
 	cmn	w1, #1
-	bne	.L1341
+	bne	.L1377
 	cmp	w19, 255
-	beq	.L1368
-.L1341:
-	cbz	w20, .L1343
+	beq	.L1404
+.L1377:
+	cbz	w20, .L1379
 	ldr	x0, [x29, 112]
 	ldr	w2, [x0]
 	mov	w0, w19
 	add	w2, w1, w2
 	bl	FlashReadDpCmd
-.L1344:
+.L1380:
 	mov	w0, w19
 	bl	NandcWaitFlashReady
-	cbz	w20, .L1342
+	cbz	w20, .L1378
 	ldr	w1, [x29, 172]
 	mov	w0, w19
 	bl	FlashReadDpDataOutCmd
-.L1342:
+.L1378:
 	ldrb	w2, [x29, 156]
 	mov	w1, 0
 	ldp	x3, x4, [x21, 8]
@@ -9377,26 +9635,26 @@ FlashReadPages:
 	mov	w28, w0
 	ldr	x0, [x29, 136]
 	ldrb	w0, [x0]
-	cbz	w0, .L1345
+	cbz	w0, .L1381
 	cmn	w28, #1
-	bne	.L1345
+	bne	.L1381
 	ldr	x0, [x29, 136]
 	mov	w20, 0
 	strb	wzr, [x0]
-	b	.L1346
-.L1339:
+	b	.L1382
+.L1375:
 	mov	w0, w19
 	bl	flash_exit_slc_mode
-	b	.L1340
-.L1343:
+	b	.L1376
+.L1379:
 	mov	w0, w19
 	bl	FlashReadCmd
-	b	.L1344
-.L1368:
+	b	.L1380
+.L1404:
 	mov	w20, 0
-	b	.L1342
-.L1345:
-	cbz	w20, .L1347
+	b	.L1378
+.L1381:
+	cbz	w20, .L1383
 	adrp	x0, .LANCHOR3
 	ldr	w1, [x29, 172]
 	ldr	w0, [x0, #:lo12:.LANCHOR3]
@@ -9415,27 +9673,27 @@ FlashReadPages:
 	cmn	w0, #1
 	mov	w23, w0
 	csel	w20, w20, wzr, ne
-.L1347:
+.L1383:
 	mov	w0, w19
 	bl	NandcFlashDeCs
 	ldr	x0, [x29, 128]
 	cmn	w28, #1
 	ldrb	w1, [x29, 144]
 	strb	w1, [x0, #:lo12:.LANCHOR5]
-	bne	.L1348
+	bne	.L1384
 	adrp	x0, .LANCHOR30
 	ldrb	w0, [x0, #:lo12:.LANCHOR30]
-	cbnz	w0, .L1349
-.L1353:
+	cbnz	w0, .L1385
+.L1389:
 	adrp	x20, .LANCHOR145
 	ldr	x4, [x20, #:lo12:.LANCHOR145]
-	cbnz	x4, .L1350
+	cbnz	x4, .L1386
 	ldr	w1, [x29, 172]
 	mov	w0, w19
 	ldp	x2, x3, [x21, 8]
 	bl	FlashReadRawPage
-	b	.L1405
-.L1349:
+	b	.L1441
+.L1385:
 	adrp	x0, .LANCHOR19
 	ldr	w1, [x29, 172]
 	ldp	x2, x3, [x21, 8]
@@ -9446,36 +9704,36 @@ FlashReadPages:
 	bl	FlashDdrTunningRead
 	mov	w28, w0
 	cmn	w0, #1
-	beq	.L1352
+	beq	.L1388
 	adrp	x0, .LANCHOR33
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	cmp	w28, w0, lsr 1
-	bls	.L1369
-.L1352:
+	bls	.L1405
+.L1388:
 	lsr	w0, w20, 8
 	bl	NandcSetDdrPara
 	cmn	w28, #1
-	beq	.L1353
-.L1369:
+	beq	.L1389
+.L1405:
 	mov	w20, 0
-.L1348:
+.L1384:
 	adrp	x0, .LANCHOR33
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bls	.L1354
+	bls	.L1390
 	adrp	x0, .LANCHOR145
 	ldr	x0, [x0, #:lo12:.LANCHOR145]
 	cmp	x0, 0
 	mov	w0, 256
 	csel	w28, w28, w0, ne
-.L1354:
+.L1390:
 	cmp	w28, 256
 	ccmn	w28, #1, 4, ne
 	csel	w3, w28, wzr, eq
 	str	w3, [x25, x26]
 	cmn	w3, #1
-	bne	.L1361
+	bne	.L1397
 	adrp	x0, .LANCHOR33
 	ldr	w1, [x21, 4]
 	ldrb	w2, [x0, #:lo12:.LANCHOR33]
@@ -9483,25 +9741,25 @@ FlashReadPages:
 	add	x0, x0, :lo12:.LC25
 	bl	printf
 	ldr	x1, [x21, 16]
-	cbz	x1, .L1361
+	cbz	x1, .L1397
 	mov	w3, 4
 	adrp	x0, .LC27
 	mov	w2, w3
 	add	x0, x0, :lo12:.LC27
 	bl	rknand_print_hex
-.L1361:
-	cbz	w20, .L1363
+.L1397:
+	cbz	w20, .L1399
 	adrp	x0, .LANCHOR33
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w23, w0, lsr 2
-	bls	.L1364
+	bls	.L1400
 	adrp	x0, .LANCHOR145
 	ldr	x0, [x0, #:lo12:.LANCHOR145]
 	cmp	x0, 0
 	mov	w0, 256
 	csel	w23, w23, w0, ne
-.L1364:
+.L1400:
 	add	w0, w22, 1
 	mov	w1, 56
 	cmp	w23, 256
@@ -9509,37 +9767,37 @@ FlashReadPages:
 	umull	x0, w0, w1
 	csel	w1, w23, wzr, eq
 	str	w1, [x25, x0]
-.L1363:
+.L1399:
 	add	w22, w22, w20
-	cbz	w24, .L1335
-	adrp	x0, .LANCHOR8
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L1335
+	cbz	w24, .L1371
+	adrp	x0, .LANCHOR15
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	cbz	w0, .L1371
 	mov	w0, w19
 	bl	flash_exit_slc_mode
-	b	.L1335
-.L1350:
+	b	.L1371
+.L1386:
 	ldr	w1, [x29, 172]
 	mov	w0, w19
 	ldp	x2, x3, [x21, 8]
 	blr	x4
 	mov	w28, w0
 	cmn	w0, #1
-	bne	.L1372
+	bne	.L1408
 	ldr	x0, [x29, 120]
 	ldr	x0, [x0, #:lo12:.LANCHOR18]
 	ldrb	w0, [x0, 19]
 	sub	w0, w0, #1
 	and	w0, w0, 255
-	cmp	w0, 6
-	bhi	.L1355
+	cmp	w0, 7
+	bhi	.L1391
 	add	x0, x27, :lo12:.LANCHOR20
 	mov	w3, 0
 	add	x2, x0, 4
 	ldrb	w1, [x0, 1]
 	mov	w0, w19
 	bl	HynixSetRRPara
-.L1355:
+.L1391:
 	ldp	x2, x3, [x21, 8]
 	mov	w0, w19
 	ldr	w1, [x29, 172]
@@ -9553,27 +9811,27 @@ FlashReadPages:
 	add	x0, x0, :lo12:.LC28
 	bl	printf
 	cmn	w28, #1
-	bne	.L1372
-	adrp	x0, .LANCHOR8
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L1372
+	bne	.L1408
+	adrp	x0, .LANCHOR15
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	cbz	w0, .L1408
 	mov	w0, w19
-	cbz	w24, .L1356
+	cbz	w24, .L1392
 	bl	flash_enter_slc_mode
-.L1357:
+.L1393:
 	ldr	x4, [x20, #:lo12:.LANCHOR145]
 	mov	w0, w19
 	ldr	w1, [x29, 172]
 	ldp	x2, x3, [x21, 8]
 	blr	x4
-.L1405:
+.L1441:
 	mov	w28, w0
-.L1372:
+.L1408:
 	mov	w20, 0
-	b	.L1354
-.L1356:
+	b	.L1390
+.L1392:
 	bl	flash_exit_slc_mode
-	b	.L1357
+	b	.L1393
 	.size	FlashReadPages, .-FlashReadPages
 	.section	.text.FlashProgSlc2KPages,"ax",@progbits
 	.align	2
@@ -9600,12 +9858,12 @@ FlashProgSlc2KPages:
 	mov	x20, x0
 	add	x28, x26, :lo12:.LANCHOR3
 	str	w3, [x29, 108]
-.L1407:
+.L1443:
 	cmp	x20, x23
-	bne	.L1413
+	bne	.L1449
 	ldr	w0, [x29, 108]
-	cbnz	w0, .L1414
-.L1433:
+	cbnz	w0, .L1450
+.L1469:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -9614,7 +9872,7 @@ FlashProgSlc2KPages:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1413:
+.L1449:
 	mov	w1, w24
 	mov	w4, w22
 	add	x3, x29, 116
@@ -9625,15 +9883,15 @@ FlashProgSlc2KPages:
 	ldr	w1, [x29, 116]
 	ldrb	w0, [x0, #:lo12:.LANCHOR25]
 	cmp	w0, w1
-	bhi	.L1408
+	bhi	.L1444
 	mov	w0, -1
 	str	w0, [x20]
-.L1409:
+.L1445:
 	sub	w22, w22, #1
 	add	x20, x20, 56
 	and	w22, w22, 255
-	b	.L1407
-.L1408:
+	b	.L1443
+.L1444:
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w19, [x0, w1, uxtw]
@@ -9686,30 +9944,30 @@ FlashProgSlc2KPages:
 	ldr	w1, [x29, 112]
 	mov	w0, w19
 	bl	FlashReadStatus
-	tbz	x0, 0, .L1412
+	tbz	x0, 0, .L1448
 	mov	w0, -1
 	str	w0, [x20]
-.L1412:
+.L1448:
 	mov	w0, w19
 	bl	NandcFlashDeCs
-	b	.L1409
-.L1420:
+	b	.L1445
+.L1456:
 	ldr	w0, [x27]
 	cmn	w0, #1
-	bne	.L1415
+	bne	.L1451
 	ldr	w1, [x27, 4]
 	adrp	x0, .LC29
 	add	x0, x0, :lo12:.LC29
 	bl	printf
-.L1416:
+.L1452:
 	sub	w21, w21, #1
 	add	x27, x27, 56
 	and	w21, w21, 255
-.L1434:
+.L1470:
 	cmp	x27, x20
-	bne	.L1420
-	b	.L1433
-.L1415:
+	bne	.L1456
+	b	.L1469
+.L1451:
 	adrp	x19, .LANCHOR199
 	mov	w4, w21
 	add	x3, x29, 116
@@ -9732,45 +9990,45 @@ FlashProgSlc2KPages:
 	bl	FlashReadPages
 	ldr	w25, [x29, 120]
 	cmn	w25, #1
-	bne	.L1417
+	bne	.L1453
 	ldr	w1, [x27, 4]
 	adrp	x0, .LC30
 	add	x0, x0, :lo12:.LC30
 	bl	printf
 	str	w25, [x27]
-.L1417:
+.L1453:
 	ldr	x0, [x27, 16]
-	cbz	x0, .L1418
+	cbz	x0, .L1454
 	ldr	w2, [x0]
 	ldr	x0, [x19, #:lo12:.LANCHOR199]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1418
+	beq	.L1454
 	ldr	w1, [x27, 4]
 	adrp	x0, .LC31
 	add	x0, x0, :lo12:.LC31
 	bl	printf
 	mov	w0, -1
 	str	w0, [x27]
-.L1418:
+.L1454:
 	ldr	x0, [x27, 8]
-	cbz	x0, .L1416
+	cbz	x0, .L1452
 	ldr	w2, [x0]
 	ldr	x0, [x23, #:lo12:.LANCHOR198]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1416
+	beq	.L1452
 	ldr	w1, [x27, 4]
 	adrp	x0, .LC32
 	add	x0, x0, :lo12:.LC32
 	bl	printf
 	mov	w0, -1
 	str	w0, [x27]
-	b	.L1416
-.L1414:
+	b	.L1452
+.L1450:
 	adrp	x22, .LANCHOR198
 	mov	x23, x22
-	b	.L1434
+	b	.L1470
 	.size	FlashProgSlc2KPages, .-FlashProgSlc2KPages
 	.section	.text.FlashProgPages,"ax",@progbits
 	.align	2
@@ -9790,7 +10048,7 @@ FlashProgPages:
 	stp	w3, w4, [x29, 100]
 	adrp	x4, .LANCHOR1
 	ldrb	w4, [x4, #:lo12:.LANCHOR1]
-	cbnz	w4, .L1437
+	cbnz	w4, .L1473
 	mov	x19, x0
 	adrp	x0, .LANCHOR31+9
 	adrp	x27, .LANCHOR23
@@ -9800,28 +10058,28 @@ FlashProgPages:
 	add	x28, x27, :lo12:.LANCHOR23
 	mov	w21, 0
 	str	w0, [x29, 108]
-.L1438:
+.L1474:
 	cmp	w21, w24
 	adrp	x26, .LANCHOR25
-	bcc	.L1451
-	adrp	x21, .LANCHOR8
+	bcc	.L1487
+	adrp	x21, .LANCHOR15
 	adrp	x23, .LANCHOR23
 	add	x25, x26, :lo12:.LANCHOR25
-	add	x21, x21, :lo12:.LANCHOR8
+	add	x21, x21, :lo12:.LANCHOR15
 	add	x23, x23, :lo12:.LANCHOR23
 	mov	x20, 0
-.L1452:
+.L1488:
 	ldrb	w0, [x25]
 	cmp	w0, w20
-	bhi	.L1454
+	bhi	.L1490
 	ldr	w0, [x29, 100]
-	cbnz	w0, .L1455
-.L1463:
+	cbnz	w0, .L1491
+.L1499:
 	mov	w0, 0
-	b	.L1436
-.L1437:
+	b	.L1472
+.L1473:
 	bl	FlashProgSlc2KPages
-.L1436:
+.L1472:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9829,7 +10087,7 @@ FlashProgPages:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1451:
+.L1487:
 	mov	w12, 56
 	mov	w1, w22
 	sub	w4, w24, w21
@@ -9843,13 +10101,13 @@ FlashProgPages:
 	ldrb	w1, [x26, #:lo12:.LANCHOR25]
 	ldr	w0, [x29, 116]
 	cmp	w1, w0
-	bhi	.L1440
+	bhi	.L1476
 	mov	w0, -1
 	str	w0, [x19, x12]
-.L1441:
+.L1477:
 	add	w21, w21, 1
-	b	.L1438
-.L1440:
+	b	.L1474
+.L1476:
 	adrp	x1, .LANCHOR27
 	add	x2, x27, :lo12:.LANCHOR23
 	mov	x3, 24
@@ -9859,20 +10117,20 @@ FlashProgPages:
 	csel	w23, w23, wzr, ne
 	madd	x1, x1, x3, x2
 	ldr	x1, [x1, 8]
-	cbz	x1, .L1443
+	cbz	x1, .L1479
 	bl	FlashWaitCmdDone
-.L1443:
+.L1479:
 	ldp	w2, w1, [x29, 112]
 	mov	x0, 24
 	madd	x0, x1, x0, x28
 	str	w2, [x0, 4]
 	stp	x25, xzr, [x0, 8]
-	cbz	w23, .L1444
+	cbz	w23, .L1480
 	add	w2, w21, 1
 	mov	w3, 56
 	umaddl	x2, w2, w3, x19
 	str	x2, [x0, 16]
-.L1444:
+.L1480:
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w20, [x0, x1]
@@ -9882,17 +10140,17 @@ FlashProgPages:
 	cmp	w0, 1
 	mov	w0, w20
 	strb	w20, [x28, x1]
-	bne	.L1445
+	bne	.L1481
 	bl	NandcWaitFlashReady
-.L1446:
+.L1482:
 	ldr	w0, [x29, 104]
 	sub	w0, w0, #1
-	cmp	w0, 6
-	bhi	.L1447
+	cmp	w0, 7
+	bhi	.L1483
 	adrp	x0, .LANCHOR21
 	add	x0, x0, :lo12:.LANCHOR21
 	ldrb	w0, [x0, w20, sxtw]
-	cbz	w0, .L1447
+	cbz	w0, .L1483
 	adrp	x0, .LANCHOR20
 	add	x0, x0, :lo12:.LANCHOR20
 	add	x2, x0, 4
@@ -9900,17 +10158,17 @@ FlashProgPages:
 	ldrb	w1, [x0, 1]
 	mov	w0, w20
 	bl	HynixSetRRPara
-.L1447:
+.L1483:
 	mov	w0, w20
 	bl	NandcFlashCs
 	cmp	w22, 1
-	bne	.L1448
-	adrp	x0, .LANCHOR8
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L1448
+	bne	.L1484
+	adrp	x0, .LANCHOR15
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	cbz	w0, .L1484
 	mov	w0, w20
 	bl	flash_enter_slc_mode
-.L1449:
+.L1485:
 	ldr	w1, [x29, 112]
 	mov	w0, w20
 	bl	FlashProgFirstCmd
@@ -9919,7 +10177,7 @@ FlashProgPages:
 	ldp	x3, x4, [x25, 8]
 	mov	w0, w20
 	bl	NandcXferData
-	cbz	w23, .L1450
+	cbz	w23, .L1486
 	ldr	w1, [x29, 112]
 	mov	w0, w20
 	bl	FlashProgDpFirstCmd
@@ -9947,15 +10205,15 @@ FlashProgPages:
 	ldp	x3, x4, [x0, 8]
 	mov	w0, w20
 	bl	NandcXferData
-.L1450:
+.L1486:
 	ldr	w1, [x29, 112]
 	mov	w0, w20
 	add	w21, w21, w23
 	bl	FlashProgSecondCmd
 	mov	w0, w20
 	bl	NandcFlashDeCs
-	b	.L1441
-.L1445:
+	b	.L1477
+.L1481:
 	bl	NandcFlashCs
 	ldr	w1, [x29, 116]
 	adrp	x0, .LANCHOR17
@@ -9968,47 +10226,47 @@ FlashProgPages:
 	bl	FlashWaitReadyEN
 	mov	w0, w20
 	bl	NandcFlashDeCs
-	b	.L1446
-.L1448:
+	b	.L1482
+.L1484:
 	mov	w0, w20
 	bl	flash_exit_slc_mode
-	b	.L1449
-.L1454:
+	b	.L1485
+.L1490:
 	mov	w0, w20
 	bl	FlashWaitCmdDone
 	cmp	w22, 1
-	bne	.L1453
+	bne	.L1489
 	ldrb	w0, [x21]
-	cbz	w0, .L1453
+	cbz	w0, .L1489
 	mov	x0, 24
 	mul	x0, x20, x0
 	ldrb	w0, [x0, x23]
 	bl	flash_exit_slc_mode
-.L1453:
+.L1489:
 	add	x20, x20, 1
-	b	.L1452
-.L1455:
+	b	.L1488
+.L1491:
 	mov	w0, 56
 	and	w20, w24, 255
 	adrp	x23, .LANCHOR198
 	mov	x25, x23
 	umaddl	x24, w24, w0, x19
-.L1456:
+.L1492:
 	cmp	x24, x19
-	beq	.L1463
+	beq	.L1499
 	ldr	w0, [x19]
 	cmn	w0, #1
-	bne	.L1457
+	bne	.L1493
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC29
 	add	x0, x0, :lo12:.LC29
 	bl	printf
-.L1458:
+.L1494:
 	sub	w20, w20, #1
 	add	x19, x19, 56
 	and	w20, w20, 255
-	b	.L1456
-.L1457:
+	b	.L1492
+.L1493:
 	adrp	x21, .LANCHOR199
 	mov	w4, w20
 	add	x3, x29, 116
@@ -10031,41 +10289,41 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	w26, [x29, 120]
 	cmn	w26, #1
-	bne	.L1459
+	bne	.L1495
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC30
 	add	x0, x0, :lo12:.LC30
 	bl	printf
 	str	w26, [x19]
-.L1459:
+.L1495:
 	ldr	x0, [x19, 16]
-	cbz	x0, .L1460
+	cbz	x0, .L1496
 	ldr	w2, [x0]
 	ldr	x0, [x21, #:lo12:.LANCHOR199]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1460
+	beq	.L1496
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC31
 	add	x0, x0, :lo12:.LC31
 	bl	printf
 	mov	w0, -1
 	str	w0, [x19]
-.L1460:
+.L1496:
 	ldr	x0, [x19, 8]
-	cbz	x0, .L1458
+	cbz	x0, .L1494
 	ldr	w2, [x0]
 	ldr	x0, [x25, #:lo12:.LANCHOR198]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1458
+	beq	.L1494
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC32
 	add	x0, x0, :lo12:.LC32
 	bl	printf
 	mov	w0, -1
 	str	w0, [x19]
-	b	.L1458
+	b	.L1494
 	.size	FlashProgPages, .-FlashProgPages
 	.section	.text.FlashTestBlk,"ax",@progbits
 	.align	2
@@ -10079,7 +10337,7 @@ FlashTestBlk:
 	adrp	x0, .LANCHOR149
 	ldr	w0, [x0, #:lo12:.LANCHOR149]
 	cmp	w19, w0
-	bcc	.L1491
+	bcc	.L1527
 	adrp	x20, .LANCHOR153
 	mov	w2, 32
 	mov	w1, 165
@@ -10110,14 +10368,14 @@ FlashTestBlk:
 	add	x0, x29, 40
 	csetm	w19, ne
 	bl	FlashEraseBlocks
-.L1489:
+.L1525:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 160
 	ret
-.L1491:
+.L1527:
 	mov	w19, 0
-	b	.L1489
+	b	.L1525
 	.size	FlashTestBlk, .-FlashTestBlk
 	.section	.text.FtlLowFormatEraseBlock,"ax",@progbits
 	.align	2
@@ -10128,42 +10386,42 @@ FtlLowFormatEraseBlock:
 	add	x29, sp, 0
 	stp	x25, x26, [sp, 64]
 	and	w26, w0, 65535
-	adrp	x0, .LANCHOR77
+	adrp	x0, .LANCHOR76
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	ldr	w0, [x0, #:lo12:.LANCHOR77]
+	ldr	w0, [x0, #:lo12:.LANCHOR76]
 	stp	x23, x24, [sp, 48]
 	stp	x27, x28, [sp, 80]
-	cbnz	w0, .L1516
+	cbnz	w0, .L1552
 	adrp	x23, .LANCHOR27
 	and	w25, w1, 255
-	adrp	x20, .LANCHOR8
+	adrp	x20, .LANCHOR15
 	adrp	x1, .LANCHOR38
 	ldrb	w0, [x23, #:lo12:.LANCHOR27]
-	adrp	x21, .LANCHOR78
+	adrp	x21, .LANCHOR77
 	str	w0, [x29, 136]
 	mov	x8, 56
-	adrp	x0, .LANCHOR74
-	ldrb	w10, [x20, #:lo12:.LANCHOR8]
+	adrp	x0, .LANCHOR73
+	ldrb	w10, [x20, #:lo12:.LANCHOR15]
 	ldrh	w11, [x1, #:lo12:.LANCHOR38]
 	adrp	x7, .LANCHOR47
-	str	w26, [x0, #:lo12:.LANCHOR74]
+	str	w26, [x0, #:lo12:.LANCHOR73]
 	adrp	x0, .LANCHOR189
-	ldr	x6, [x21, #:lo12:.LANCHOR78]
+	ldr	x6, [x21, #:lo12:.LANCHOR77]
 	add	x7, x7, :lo12:.LANCHOR47
 	ldr	x12, [x0, #:lo12:.LANCHOR189]
-	adrp	x0, .LANCHOR59
+	adrp	x0, .LANCHOR58
 	mov	w14, w8
 	mov	x5, 0
-	ldrh	w13, [x0, #:lo12:.LANCHOR59]
+	ldrh	w13, [x0, #:lo12:.LANCHOR58]
 	mov	w24, 0
 	mov	w19, 0
 	str	x1, [x29, 128]
 	str	x0, [x29, 120]
-.L1495:
+.L1531:
 	cmp	w11, w5, uxth
-	bhi	.L1499
-	cbz	w24, .L1493
+	bhi	.L1535
+	cbz	w24, .L1529
 	cmp	w10, 0
 	mov	w2, w24
 	cset	w22, ne
@@ -10176,34 +10434,34 @@ FtlLowFormatEraseBlock:
 	strb	w0, [x23, #:lo12:.LANCHOR27]
 	mov	w0, 56
 	umull	x24, w24, w0
-.L1502:
-	ldr	x0, [x21, #:lo12:.LANCHOR78]
+.L1538:
+	ldr	x0, [x21, #:lo12:.LANCHOR77]
 	add	x1, x0, x27
 	ldr	w0, [x0, x27]
 	cmn	w0, #1
-	bne	.L1501
+	bne	.L1537
 	ldr	w0, [x1, 4]
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.L1501:
+.L1537:
 	add	x27, x27, 56
 	cmp	x27, x24
-	bne	.L1502
-	cbnz	w25, .L1503
+	bne	.L1538
+	cbnz	w25, .L1539
 	and	w22, w22, 65535
 	mov	w28, 6
 	mov	w27, 1
-.L1504:
+.L1540:
 	adrp	x0, .LANCHOR47
 	mov	w24, 0
 	add	x0, x0, :lo12:.LANCHOR47
 	str	x0, [x29, 112]
-.L1512:
+.L1548:
 	ldr	x0, [x29, 128]
 	mov	x5, 0
-	ldr	x6, [x21, #:lo12:.LANCHOR78]
+	ldr	x6, [x21, #:lo12:.LANCHOR77]
 	mov	w20, 0
 	mov	w12, 56
 	ldrh	w7, [x0, #:lo12:.LANCHOR38]
@@ -10212,11 +10470,11 @@ FtlLowFormatEraseBlock:
 	adrp	x0, .LANCHOR187
 	ldr	x10, [x0, #:lo12:.LANCHOR187]
 	ldr	x0, [x29, 120]
-	ldrh	w11, [x0, #:lo12:.LANCHOR59]
-.L1505:
+	ldrh	w11, [x0, #:lo12:.LANCHOR58]
+.L1541:
 	cmp	w7, w5, uxth
-	bhi	.L1508
-	cbz	w20, .L1493
+	bhi	.L1544
+	cbz	w20, .L1529
 	mov	w2, w22
 	mov	w1, w20
 	strb	wzr, [x23, #:lo12:.LANCHOR27]
@@ -10228,11 +10486,11 @@ FtlLowFormatEraseBlock:
 	strb	w0, [x23, #:lo12:.LANCHOR27]
 	mov	x2, 0
 	umull	x1, w20, w1
-.L1511:
-	ldr	x0, [x21, #:lo12:.LANCHOR78]
+.L1547:
+	ldr	x0, [x21, #:lo12:.LANCHOR77]
 	add	x3, x0, x2
 	ldr	w0, [x0, x2]
-	cbz	w0, .L1510
+	cbz	w0, .L1546
 	ldr	w0, [x3, 4]
 	add	w19, w19, 1
 	stp	x2, x1, [x29, 96]
@@ -10240,39 +10498,39 @@ FtlLowFormatEraseBlock:
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
 	ldp	x2, x1, [x29, 96]
-.L1510:
+.L1546:
 	add	x2, x2, 56
 	cmp	x1, x2
-	bne	.L1511
+	bne	.L1547
 	add	w24, w24, w28
 	and	w24, w24, 65535
 	cmp	w27, w24
-	bhi	.L1512
+	bhi	.L1548
 	mov	x23, 0
-.L1514:
-	cbz	w25, .L1513
-	ldr	x0, [x21, #:lo12:.LANCHOR78]
+.L1550:
+	cbz	w25, .L1549
+	ldr	x0, [x21, #:lo12:.LANCHOR77]
 	add	x1, x0, x23
 	ldr	w0, [x0, x23]
-	cbnz	w0, .L1513
+	cbnz	w0, .L1549
 	ldr	w0, [x1, 4]
 	mov	w1, 1
 	str	x2, [x29, 136]
 	lsr	w0, w0, 10
 	bl	FtlFreeSysBlkQueueIn
 	ldr	x2, [x29, 136]
-.L1513:
+.L1549:
 	add	x23, x23, 56
 	cmp	x23, x2
-	bne	.L1514
+	bne	.L1550
 	cmp	w26, 63
 	ccmp	w25, 0, 0, hi
-	beq	.L1493
-	ldr	x0, [x21, #:lo12:.LANCHOR78]
+	beq	.L1529
+	ldr	x0, [x21, #:lo12:.LANCHOR77]
 	mov	w2, w20
 	mov	w1, w22
 	bl	FlashEraseBlocks
-.L1493:
+.L1529:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10281,7 +10539,7 @@ FtlLowFormatEraseBlock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1499:
+.L1535:
 	mul	x0, x5, x8
 	mov	w1, w26
 	str	wzr, [x6, x0]
@@ -10289,13 +10547,13 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	and	w15, w0, 65535
 	mov	w22, w15
-	cbz	w25, .L1496
+	cbz	w25, .L1532
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L1497
-.L1496:
+	cbnz	w0, .L1533
+.L1532:
 	mov	w0, w22
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L1498
+	cbnz	w0, .L1534
 	umaddl	x1, w24, w14, x6
 	lsl	w15, w15, 10
 	mul	w0, w24, w13
@@ -10305,26 +10563,26 @@ FtlLowFormatEraseBlock:
 	str	w15, [x1, 4]
 	add	x0, x12, x0, sxtw 2
 	stp	xzr, x0, [x1, 8]
-.L1497:
+.L1533:
 	add	x5, x5, 1
-	b	.L1495
-.L1498:
+	b	.L1531
+.L1534:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1497
-.L1503:
-	adrp	x0, .LANCHOR54
-	ldrh	w27, [x0, #:lo12:.LANCHOR54]
-	ldrb	w0, [x20, #:lo12:.LANCHOR8]
-	cbnz	w0, .L1517
+	b	.L1533
+.L1539:
+	adrp	x0, .LANCHOR53
+	ldrh	w27, [x0, #:lo12:.LANCHOR53]
+	ldrb	w0, [x20, #:lo12:.LANCHOR15]
+	cbnz	w0, .L1553
 	lsr	w28, w27, 2
 	mov	w22, 1
-	b	.L1504
-.L1517:
+	b	.L1540
+.L1553:
 	mov	w22, 1
 	mov	w28, w22
-	b	.L1504
-.L1508:
+	b	.L1540
+.L1544:
 	mov	x0, 56
 	mov	w1, w26
 	mul	x0, x5, x0
@@ -10334,13 +10592,13 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	and	w13, w0, 65535
 	mov	w14, w13
-	cbz	w25, .L1506
+	cbz	w25, .L1542
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L1507
-.L1506:
+	cbnz	w0, .L1543
+.L1542:
 	mov	w0, w14
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L1507
+	cbnz	w0, .L1543
 	umaddl	x1, w20, w12, x6
 	add	w13, w24, w13, lsl 10
 	mul	w0, w20, w11
@@ -10350,12 +10608,12 @@ FtlLowFormatEraseBlock:
 	str	w13, [x1, 4]
 	add	x0, x10, x0, sxtw 2
 	stp	x8, x0, [x1, 8]
-.L1507:
+.L1543:
 	add	x5, x5, 1
-	b	.L1505
-.L1516:
+	b	.L1541
+.L1552:
 	mov	w19, 0
-	b	.L1493
+	b	.L1529
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
 	.section	.text.FtlBbmTblFlush,"ax",@progbits
 	.align	2
@@ -10365,45 +10623,45 @@ FtlBbmTblFlush:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR77
+	adrp	x22, .LANCHOR76
 	stp	x19, x20, [sp, 16]
-	ldr	w0, [x22, #:lo12:.LANCHOR77]
+	ldr	w0, [x22, #:lo12:.LANCHOR76]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w0, .L1540
+	cbnz	w0, .L1576
 	adrp	x24, .LANCHOR188
 	adrp	x23, .LANCHOR183
 	adrp	x20, .LANCHOR202
 	add	x19, x20, :lo12:.LANCHOR202
 	ldr	x1, [x24, #:lo12:.LANCHOR188]
-	adrp	x21, .LANCHOR75
+	adrp	x21, .LANCHOR74
 	ldr	x0, [x23, #:lo12:.LANCHOR183]
-	add	x26, x21, :lo12:.LANCHOR75
+	add	x26, x21, :lo12:.LANCHOR74
 	stp	x0, x1, [x19, 8]
-	adrp	x1, .LANCHOR58
+	adrp	x1, .LANCHOR57
 	adrp	x27, .LANCHOR45
 	adrp	x28, .LANCHOR123
-	ldrh	w2, [x1, #:lo12:.LANCHOR58]
+	ldrh	w2, [x1, #:lo12:.LANCHOR57]
 	add	x26, x26, 32
 	mov	w25, 0
 	add	x27, x27, :lo12:.LANCHOR45
 	add	x28, x28, :lo12:.LANCHOR123
 	mov	w1, 0
 	bl	ftl_memset
-.L1541:
+.L1577:
 	ldrh	w0, [x27]
 	cmp	w25, w0
-	blt	.L1542
+	blt	.L1578
 	add	x20, x20, :lo12:.LANCHOR202
-	add	x19, x21, :lo12:.LANCHOR75
+	add	x19, x21, :lo12:.LANCHOR74
 	mov	w2, 16
 	mov	w1, 255
 	adrp	x25, .LC33
-	adrp	x27, .LANCHOR54
+	adrp	x27, .LANCHOR53
 	ldr	x28, [x20, 16]
 	add	x25, x25, :lo12:.LC33
-	add	x27, x27, :lo12:.LANCHOR54
+	add	x27, x27, :lo12:.LANCHOR53
 	mov	w26, 0
 	mov	x0, x28
 	bl	ftl_memset
@@ -10411,7 +10669,7 @@ FtlBbmTblFlush:
 	strh	w0, [x28]
 	ldr	w0, [x19, 8]
 	str	w0, [x28, 4]
-	ldrh	w0, [x21, #:lo12:.LANCHOR75]
+	ldrh	w0, [x21, #:lo12:.LANCHOR74]
 	mov	w21, 0
 	strh	w0, [x28, 2]
 	ldrh	w0, [x19, 4]
@@ -10421,7 +10679,7 @@ FtlBbmTblFlush:
 	adrp	x0, .LANCHOR37
 	ldr	w0, [x0, #:lo12:.LANCHOR37]
 	strh	w0, [x28, 12]
-.L1543:
+.L1579:
 	ldrh	w1, [x19]
 	ldrh	w4, [x28, 10]
 	ldrh	w2, [x19, 2]
@@ -10439,7 +10697,7 @@ FtlBbmTblFlush:
 	ldrh	w1, [x19, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L1544
+	blt	.L1580
 	ldr	w0, [x19, 8]
 	mov	w2, 1
 	ldrh	w1, [x19, 4]
@@ -10449,16 +10707,16 @@ FtlBbmTblFlush:
 	ldrh	w0, [x19]
 	strh	w0, [x28, 8]
 	strh	w0, [x19, 4]
-	adrp	x0, .LANCHOR78
+	adrp	x0, .LANCHOR77
 	strh	w1, [x19]
 	lsl	w1, w1, 10
-	ldr	x0, [x0, #:lo12:.LANCHOR78]
+	ldr	x0, [x0, #:lo12:.LANCHOR77]
 	str	w1, [x20, 4]
 	strh	wzr, [x19, 2]
 	str	w1, [x0, 4]
 	mov	w1, w2
 	bl	FlashEraseBlocks
-.L1544:
+.L1580:
 	mov	w3, 1
 	mov	x0, x20
 	mov	w2, w3
@@ -10469,7 +10727,7 @@ FtlBbmTblFlush:
 	strh	w0, [x19, 2]
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L1545
+	bne	.L1581
 	ldr	w1, [x20, 4]
 	add	w21, w21, 1
 	adrp	x0, .LC34
@@ -10477,15 +10735,15 @@ FtlBbmTblFlush:
 	add	x0, x0, :lo12:.LC34
 	bl	printf
 	cmp	w21, 3
-	bls	.L1543
+	bls	.L1579
 	ldr	w1, [x20, 4]
 	mov	w2, w21
 	adrp	x0, .LC35
 	add	x0, x0, :lo12:.LC35
 	bl	printf
 	mov	w0, 1
-	str	w0, [x22, #:lo12:.LANCHOR77]
-.L1540:
+	str	w0, [x22, #:lo12:.LANCHOR76]
+.L1576:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10494,7 +10752,7 @@ FtlBbmTblFlush:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1542:
+.L1578:
 	ldrh	w2, [x28]
 	ldr	x1, [x26], 8
 	ldr	x0, [x19, 8]
@@ -10503,44 +10761,44 @@ FtlBbmTblFlush:
 	add	w25, w25, 1
 	add	x0, x0, x3, sxtw 2
 	bl	ftl_memcpy
-	b	.L1541
-.L1545:
-	cbnz	w26, .L1540
+	b	.L1577
+.L1581:
+	cbnz	w26, .L1576
 	mov	w26, 1
-	b	.L1543
+	b	.L1579
 	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
 	.section	.text.allocate_data_superblock,"ax",@progbits
 	.align	2
 	.global	allocate_data_superblock
 	.type	allocate_data_superblock, %function
 allocate_data_superblock:
-	adrp	x1, .LANCHOR77
-	ldr	w1, [x1, #:lo12:.LANCHOR77]
-	cbnz	w1, .L1614
+	adrp	x1, .LANCHOR76
+	ldr	w1, [x1, #:lo12:.LANCHOR76]
+	cbnz	w1, .L1650
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
 	stp	x27, x28, [sp, 80]
-	adrp	x27, .LANCHOR86
-	add	x0, x27, :lo12:.LANCHOR86
+	adrp	x27, .LANCHOR85
+	add	x0, x27, :lo12:.LANCHOR85
 	stp	x23, x24, [sp, 48]
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR89
-	add	x23, x0, :lo12:.LANCHOR89
+	adrp	x0, .LANCHOR88
+	add	x23, x0, :lo12:.LANCHOR88
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
-.L1605:
+.L1641:
 	ldr	x1, [x29, 120]
-	adrp	x0, .LANCHOR89
+	adrp	x0, .LANCHOR88
 	adrp	x24, .LANCHOR40
-	ldrh	w0, [x0, #:lo12:.LANCHOR89]
+	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	ldrh	w1, [x1]
 	add	w0, w0, w1
 	ldrh	w1, [x24, #:lo12:.LANCHOR40]
 	cmp	w0, w1
-	ble	.L1553
-	mov	w2, 3108
+	ble	.L1589
+	mov	w2, 3139
 	adrp	x1, .LANCHOR203
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR203
@@ -10551,11 +10809,11 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1553:
-	adrp	x0, .LANCHOR94
-	add	x0, x0, :lo12:.LANCHOR94
+.L1589:
+	adrp	x0, .LANCHOR93
+	add	x0, x0, :lo12:.LANCHOR93
 	cmp	x19, x0
-	bne	.L1554
+	bne	.L1590
 	adrp	x1, .LANCHOR172
 	ldrh	w2, [x23]
 	ldr	w3, [x1, #:lo12:.LANCHOR172]
@@ -10566,54 +10824,54 @@ allocate_data_superblock:
 	adrp	x4, .LANCHOR28
 	and	w1, w1, 65535
 	ldr	w4, [x4, #:lo12:.LANCHOR28]
-	cbz	w4, .L1555
+	cbz	w4, .L1591
 	adrp	x4, .LANCHOR170
 	ldr	w4, [x4, #:lo12:.LANCHOR170]
 	cmp	w4, 39
-	bhi	.L1555
+	bhi	.L1591
 	cmp	w4, 2
-	bls	.L1589
-	tbz	x2, 0, .L1585
-	cbz	w3, .L1589
-.L1585:
+	bls	.L1625
+	tbz	x2, 0, .L1621
+	cbz	w3, .L1625
+.L1621:
 	mov	w1, w0
-	b	.L1555
-.L1554:
+	b	.L1591
+.L1590:
 	ldrb	w0, [x19, 8]
 	cmp	w0, 1
-	bne	.L1589
+	bne	.L1625
 	adrp	x0, .LANCHOR44
 	ldrh	w0, [x0, #:lo12:.LANCHOR44]
 	cmp	w0, 1
-	beq	.L1589
-	adrp	x0, .LANCHOR8
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbnz	w0, .L1589
+	beq	.L1625
+	adrp	x0, .LANCHOR15
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	cbnz	w0, .L1625
 	adrp	x2, .LANCHOR28
 	ldrh	w0, [x23]
 	ldr	w2, [x2, #:lo12:.LANCHOR28]
 	lsr	w1, w0, 3
-	cbz	w2, .L1555
+	cbz	w2, .L1591
 	adrp	x2, .LANCHOR170
 	ldr	w2, [x2, #:lo12:.LANCHOR170]
 	cmp	w2, 1
-	bhi	.L1555
+	bhi	.L1591
 	mov	w1, 7
 	mul	w1, w0, w1
 	lsr	w1, w1, 3
-.L1555:
-	cbz	w1, .L1556
+.L1591:
+	cbz	w1, .L1592
 	sub	w1, w1, #1
 	and	w1, w1, 65535
-.L1556:
+.L1592:
 	ldrb	w2, [x19, 8]
-	adrp	x0, .LANCHOR88
-	add	x0, x0, :lo12:.LANCHOR88
+	adrp	x0, .LANCHOR87
+	add	x0, x0, :lo12:.LANCHOR87
 	bl	List_pop_index_node
 	and	w22, w0, 65535
 	ldrh	w0, [x23]
-	cbnz	w0, .L1557
-	mov	w2, 3128
+	cbnz	w0, .L1593
+	mov	w2, 3159
 	adrp	x1, .LANCHOR203
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR203
@@ -10624,33 +10882,33 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1557:
+.L1593:
 	ldrh	w0, [x23]
 	sub	w0, w0, #1
 	strh	w0, [x23]
 	ldrh	w0, [x24, #:lo12:.LANCHOR40]
 	cmp	w0, w22
-	bls	.L1605
-	adrp	x25, .LANCHOR84
+	bls	.L1641
+	adrp	x25, .LANCHOR83
 	ubfiz	x21, x22, 1, 16
-	ldr	x0, [x25, #:lo12:.LANCHOR84]
+	ldr	x0, [x25, #:lo12:.LANCHOR83]
 	ldrh	w20, [x0, x21]
-	cbnz	w20, .L1605
+	cbnz	w20, .L1641
 	strh	w22, [x19]
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L1559
-	ldr	x0, [x25, #:lo12:.LANCHOR84]
+	cbnz	w0, .L1595
+	ldr	x0, [x25, #:lo12:.LANCHOR83]
 	mov	w1, -1
 	strh	w1, [x0, x21]
-	ldrh	w1, [x27, #:lo12:.LANCHOR86]
+	ldrh	w1, [x27, #:lo12:.LANCHOR85]
 	ldrh	w0, [x23]
 	add	w0, w0, w1
 	ldrh	w1, [x24, #:lo12:.LANCHOR40]
 	cmp	w0, w1
-	ble	.L1605
-	mov	w2, 3144
+	ble	.L1641
+	mov	w2, 3175
 	adrp	x1, .LANCHOR203
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR203
@@ -10661,18 +10919,18 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-	b	.L1605
-.L1589:
+	b	.L1641
+.L1625:
 	mov	w1, 0
-	b	.L1556
-.L1559:
-	ldrh	w1, [x27, #:lo12:.LANCHOR86]
+	b	.L1592
+.L1595:
+	ldrh	w1, [x27, #:lo12:.LANCHOR85]
 	ldrh	w0, [x23]
 	add	w0, w0, w1
 	ldrh	w1, [x24, #:lo12:.LANCHOR40]
 	cmp	w0, w1
-	ble	.L1561
-	mov	w2, 3147
+	ble	.L1597
+	mov	w2, 3178
 	adrp	x1, .LANCHOR203
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR203
@@ -10683,24 +10941,24 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1561:
+.L1597:
 	adrp	x1, .LANCHOR38
-	adrp	x25, .LANCHOR78
+	adrp	x25, .LANCHOR77
 	mov	w2, 56
 	mov	x3, 8
 	ldrh	w1, [x1, #:lo12:.LANCHOR38]
 	add	x26, x19, 16
-	ldr	x4, [x25, #:lo12:.LANCHOR78]
+	ldr	x4, [x25, #:lo12:.LANCHOR77]
 	mov	x5, x26
 	mov	w6, 65535
 	add	x0, x4, 8
 	umaddl	x1, w2, w1, x3
 	add	x1, x4, x1
-.L1562:
+.L1598:
 	cmp	x1, x0
-	bne	.L1564
-	cbnz	w20, .L1565
-	mov	w2, 3159
+	bne	.L1600
+	cbnz	w20, .L1601
+	mov	w2, 3190
 	adrp	x1, .LANCHOR203
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR203
@@ -10711,26 +10969,26 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1565:
+.L1601:
 	adrp	x0, .LANCHOR28
-	adrp	x28, .LANCHOR79
+	adrp	x28, .LANCHOR78
 	ldr	w0, [x0, #:lo12:.LANCHOR28]
-	cbz	w0, .L1566
-	adrp	x0, .LANCHOR92
-	add	x0, x0, :lo12:.LANCHOR92
+	cbz	w0, .L1602
+	adrp	x0, .LANCHOR91
+	add	x0, x0, :lo12:.LANCHOR91
 	cmp	x19, x0
-	bne	.L1566
-	ldr	x0, [x28, #:lo12:.LANCHOR79]
+	bne	.L1602
+	ldr	x0, [x28, #:lo12:.LANCHOR78]
 	ldrh	w0, [x0, x21]
 	cmp	w0, 40
-	bls	.L1566
+	bls	.L1602
 	strb	wzr, [x19, 8]
-.L1566:
+.L1602:
 	adrp	x0, .LANCHOR204
 	ldrh	w0, [x0, #:lo12:.LANCHOR204]
 	cmp	w0, w22
-	bne	.L1567
-	mov	w2, 3166
+	bne	.L1603
+	mov	w2, 3197
 	adrp	x1, .LANCHOR203
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR203
@@ -10741,18 +10999,18 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1567:
+.L1603:
 	ldrb	w0, [x19, 8]
 	adrp	x6, .LANCHOR48
 	adrp	x5, .LANCHOR167
 	adrp	x4, .LANCHOR168
-	ldr	x1, [x28, #:lo12:.LANCHOR79]
-	cbnz	w0, .L1568
+	ldr	x1, [x28, #:lo12:.LANCHOR78]
+	cbnz	w0, .L1604
 	ldrh	w0, [x1, x21]
-	cbz	w0, .L1569
+	cbz	w0, .L1605
 	ldrh	w2, [x6, #:lo12:.LANCHOR48]
 	add	w0, w0, w2
-.L1617:
+.L1653:
 	strh	w0, [x1, x21]
 	mov	w1, 0
 	ldr	w0, [x5, #:lo12:.LANCHOR167]
@@ -10760,15 +11018,15 @@ allocate_data_superblock:
 	str	w0, [x5, #:lo12:.LANCHOR167]
 	mov	w0, w22
 	bl	ftl_set_blk_mode
-.L1571:
-	ldr	x0, [x28, #:lo12:.LANCHOR79]
+.L1607:
+	ldr	x0, [x28, #:lo12:.LANCHOR78]
 	ldrh	w1, [x0, x21]
 	adrp	x0, .LANCHOR169
 	ldr	w2, [x0, #:lo12:.LANCHOR169]
 	cmp	w1, w2
-	bls	.L1572
+	bls	.L1608
 	str	w1, [x0, #:lo12:.LANCHOR169]
-.L1572:
+.L1608:
 	ldr	w2, [x5, #:lo12:.LANCHOR167]
 	mov	x3, 4
 	ldr	w1, [x4, #:lo12:.LANCHOR168]
@@ -10784,65 +11042,65 @@ allocate_data_superblock:
 	add	w0, w0, 1
 	str	w0, [x1, 16]
 	mov	w1, 56
-	ldr	x0, [x25, #:lo12:.LANCHOR78]
+	ldr	x0, [x25, #:lo12:.LANCHOR77]
 	nop // between mem op and mult-accumulate
 	umaddl	x1, w1, w20, x3
 	add	x2, x0, 4
 	add	x1, x0, x1
-.L1573:
+.L1609:
 	cmp	x1, x2
-	bne	.L1574
-	adrp	x1, .LANCHOR8
-	ldrb	w1, [x1, #:lo12:.LANCHOR8]
-	cbz	w1, .L1575
+	bne	.L1610
+	adrp	x1, .LANCHOR15
+	ldrb	w1, [x1, #:lo12:.LANCHOR15]
+	cbz	w1, .L1611
 	ldrb	w1, [x19, 8]
 	mov	w2, w20
 	cmp	w1, 1
-	bne	.L1576
+	bne	.L1612
 	mov	w1, 0
-.L1618:
+.L1654:
 	bl	FlashEraseBlocks
-.L1575:
+.L1611:
 	ldrb	w1, [x19, 8]
 	mov	w2, w20
-	ldr	x0, [x25, #:lo12:.LANCHOR78]
+	ldr	x0, [x25, #:lo12:.LANCHOR77]
 	mov	x24, 0
 	bl	FlashEraseBlocks
 	mov	w1, 0
 	mov	x3, 56
-.L1577:
+.L1613:
 	cmp	w20, w24, uxth
-	bhi	.L1579
-	cbz	w1, .L1580
+	bhi	.L1615
+	cbz	w1, .L1616
 	mov	w0, w22
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L1580:
+.L1616:
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L1581
-	adrp	x0, .LANCHOR84
+	cbnz	w0, .L1617
+	adrp	x0, .LANCHOR83
 	mov	w1, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR84]
+	ldr	x0, [x0, #:lo12:.LANCHOR83]
 	strh	w1, [x0, x21]
-	b	.L1605
-.L1564:
+	b	.L1641
+.L1600:
 	ldrh	w3, [x5]
 	stp	xzr, xzr, [x0]
 	cmp	w3, w6
-	beq	.L1563
+	beq	.L1599
 	umaddl	x7, w20, w2, x4
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	lsl	w3, w3, 10
 	str	w3, [x7, 4]
-.L1563:
+.L1599:
 	add	x0, x0, 56
 	add	x5, x5, 2
-	b	.L1562
-.L1569:
+	b	.L1598
+.L1605:
 	mov	w0, 2
-	b	.L1617
-.L1568:
+	b	.L1653
+.L1604:
 	ldrh	w0, [x1, x21]
 	add	w0, w0, 1
 	strh	w0, [x1, x21]
@@ -10851,22 +11109,22 @@ allocate_data_superblock:
 	str	w0, [x4, #:lo12:.LANCHOR168]
 	mov	w0, w22
 	bl	ftl_set_blk_mode.part.10
-	b	.L1571
-.L1574:
+	b	.L1607
+.L1610:
 	ldr	w3, [x2]
 	and	w3, w3, -1024
 	str	w3, [x2], 56
-	b	.L1573
-.L1576:
+	b	.L1609
+.L1612:
 	mov	w1, 1
-	b	.L1618
-.L1579:
+	b	.L1654
+.L1615:
 	mul	x0, x24, x3
-	ldr	x2, [x25, #:lo12:.LANCHOR78]
+	ldr	x2, [x25, #:lo12:.LANCHOR77]
 	add	x4, x2, x0
 	ldr	w2, [x2, x0]
 	cmn	w2, #1
-	bne	.L1578
+	bne	.L1614
 	add	w1, w1, 1
 	ldr	w0, [x4, 4]
 	str	x3, [x29, 104]
@@ -10879,15 +11137,15 @@ allocate_data_superblock:
 	ldrb	w0, [x19, 7]
 	sub	w0, w0, #1
 	strb	w0, [x19, 7]
-.L1578:
+.L1614:
 	add	x24, x24, 1
 	add	x26, x26, 2
-	b	.L1577
-.L1581:
-	adrp	x1, .LANCHOR53
+	b	.L1613
+.L1617:
+	adrp	x1, .LANCHOR52
 	adrp	x2, .LANCHOR159
 	strh	wzr, [x19, 2]
-	ldrh	w1, [x1, #:lo12:.LANCHOR53]
+	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	strh	w22, [x19]
 	strb	wzr, [x19, 6]
 	mul	w0, w0, w1
@@ -10895,17 +11153,17 @@ allocate_data_superblock:
 	str	w1, [x19, 12]
 	add	w1, w1, 1
 	str	w1, [x2, #:lo12:.LANCHOR159]
-	adrp	x1, .LANCHOR84
+	adrp	x1, .LANCHOR83
 	and	w0, w0, 65535
 	strh	w0, [x19, 4]
-	ldr	x1, [x1, #:lo12:.LANCHOR84]
+	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	strh	w0, [x1, x21]
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1582
+	cbz	w0, .L1618
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L1552
-.L1582:
-	mov	w2, 3225
+	cbnz	w0, .L1588
+.L1618:
+	mov	w2, 3256
 	adrp	x1, .LANCHOR203
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR203
@@ -10916,7 +11174,7 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1552:
+.L1588:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -10925,7 +11183,7 @@ allocate_data_superblock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1614:
+.L1650:
 	mov	w0, 0
 	ret
 	.size	allocate_data_superblock, .-allocate_data_superblock
@@ -10937,24 +11195,24 @@ FtlGcFreeBadSuperBlk:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR117
+	adrp	x21, .LANCHOR116
 	stp	x25, x26, [sp, 64]
 	and	w25, w0, 65535
-	ldrh	w0, [x21, #:lo12:.LANCHOR117]
+	ldrh	w0, [x21, #:lo12:.LANCHOR116]
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	str	x27, [sp, 80]
-	cbz	w0, .L1620
-	adrp	x23, .LANCHOR118
-	add	x24, x23, :lo12:.LANCHOR118
+	cbz	w0, .L1656
+	adrp	x23, .LANCHOR117
+	add	x24, x23, :lo12:.LANCHOR117
 	mov	w19, 0
-.L1621:
+.L1657:
 	adrp	x0, .LANCHOR38
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w0, w19
-	bhi	.L1627
+	bhi	.L1663
 	bl	FtlGcReFreshBadBlk
-.L1620:
+.L1656:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -10963,28 +11221,28 @@ FtlGcFreeBadSuperBlk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1627:
+.L1663:
 	adrp	x0, .LANCHOR47
 	add	x0, x0, :lo12:.LANCHOR47
 	mov	w1, w25
-	add	x22, x21, :lo12:.LANCHOR117
+	add	x22, x21, :lo12:.LANCHOR116
 	mov	w20, 0
 	ldrb	w0, [x0, w19, sxtw]
 	bl	V2P_block
 	and	w26, w0, 65535
-.L1622:
+.L1658:
 	ldrh	w0, [x22]
 	cmp	w0, w20
-	bhi	.L1626
+	bhi	.L1662
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1621
-.L1626:
-	add	x0, x23, :lo12:.LANCHOR118
+	b	.L1657
+.L1662:
+	add	x0, x23, :lo12:.LANCHOR117
 	add	w27, w20, 1
 	ldrh	w0, [x0, w20, sxtw 1]
 	cmp	w0, w26
-	bne	.L1623
+	bne	.L1659
 	mov	w0, w26
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
@@ -10992,22 +11250,22 @@ FtlGcFreeBadSuperBlk:
 	sxtw	x3, w27
 	and	x4, x20, 65535
 	mov	x0, 0
-.L1624:
+.L1660:
 	add	w2, w20, w0
 	cmp	w1, w2, uxth
-	bhi	.L1625
+	bhi	.L1661
 	sub	w1, w1, #1
 	strh	w1, [x22]
-.L1623:
+.L1659:
 	and	w20, w27, 65535
-	b	.L1622
-.L1625:
+	b	.L1658
+.L1661:
 	add	x2, x3, x0
 	ldrh	w5, [x24, x2, lsl 1]
 	add	x2, x4, x0
 	add	x0, x0, 1
 	strh	w5, [x24, x2, lsl 1]
-	b	.L1624
+	b	.L1660
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
 	.section	.text.update_vpc_list,"ax",@progbits
 	.align	2
@@ -11015,29 +11273,29 @@ FtlGcFreeBadSuperBlk:
 	.type	update_vpc_list, %function
 update_vpc_list:
 	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LANCHOR84
+	adrp	x1, .LANCHOR83
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w19, w0, 65535
-	ldr	x1, [x1, #:lo12:.LANCHOR84]
+	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	ubfiz	x0, x19, 1, 16
 	ldrh	w0, [x1, x0]
-	cbnz	w0, .L1633
+	cbnz	w0, .L1669
 	adrp	x0, .LANCHOR204
 	ldrh	w1, [x0, #:lo12:.LANCHOR204]
 	cmp	w1, w19
-	bne	.L1634
+	bne	.L1670
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR204]
-.L1635:
-	adrp	x20, .LANCHOR86
+.L1671:
+	adrp	x20, .LANCHOR85
 	mov	w1, w19
-	adrp	x0, .LANCHOR83
-	add	x0, x0, :lo12:.LANCHOR83
+	adrp	x0, .LANCHOR82
+	add	x0, x0, :lo12:.LANCHOR82
 	bl	List_remove_node
-	ldrh	w0, [x20, #:lo12:.LANCHOR86]
-	cbnz	w0, .L1637
-	mov	w2, 3336
+	ldrh	w0, [x20, #:lo12:.LANCHOR85]
+	cbnz	w0, .L1673
+	mov	w2, 3367
 	adrp	x1, .LANCHOR206
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR206
@@ -11048,23 +11306,23 @@ update_vpc_list:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1637:
-	ldrh	w0, [x20, #:lo12:.LANCHOR86]
+.L1673:
+	ldrh	w0, [x20, #:lo12:.LANCHOR85]
 	sub	w0, w0, #1
-	strh	w0, [x20, #:lo12:.LANCHOR86]
+	strh	w0, [x20, #:lo12:.LANCHOR85]
 	mov	w0, w19
 	bl	free_data_superblock
 	mov	w0, w19
 	bl	FtlGcFreeBadSuperBlk
-	adrp	x0, .LANCHOR89
-	ldrh	w1, [x20, #:lo12:.LANCHOR86]
-	ldrh	w0, [x0, #:lo12:.LANCHOR89]
+	adrp	x0, .LANCHOR88
+	ldrh	w1, [x20, #:lo12:.LANCHOR85]
+	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	add	w0, w0, w1
 	adrp	x1, .LANCHOR40
 	ldrh	w1, [x1, #:lo12:.LANCHOR40]
 	cmp	w0, w1
-	ble	.L1641
-	mov	w2, 3339
+	ble	.L1677
+	mov	w2, 3370
 	adrp	x1, .LANCHOR206
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR206
@@ -11075,32 +11333,32 @@ update_vpc_list:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1641:
+.L1677:
 	mov	w0, 1
-	b	.L1632
-.L1634:
+	b	.L1668
+.L1670:
+	adrp	x0, .LANCHOR91
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	cmp	w0, w19
+	beq	.L1676
 	adrp	x0, .LANCHOR92
 	ldrh	w0, [x0, #:lo12:.LANCHOR92]
 	cmp	w0, w19
-	beq	.L1640
+	beq	.L1676
 	adrp	x0, .LANCHOR93
 	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w0, w19
-	beq	.L1640
-	adrp	x0, .LANCHOR94
-	ldrh	w0, [x0, #:lo12:.LANCHOR94]
-	cmp	w0, w19
-	bne	.L1635
-.L1640:
+	bne	.L1671
+.L1676:
 	mov	w0, 0
-.L1632:
+.L1668:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1633:
+.L1669:
 	mov	w0, w19
 	bl	List_update_data_list
-	b	.L1640
+	b	.L1676
 	.size	update_vpc_list, .-update_vpc_list
 	.section	.text.decrement_vpc_count,"ax",@progbits
 	.align	2
@@ -11114,21 +11372,21 @@ decrement_vpc_count:
 	stp	x21, x22, [sp, 32]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1644
-	adrp	x20, .LANCHOR84
+	beq	.L1680
+	adrp	x20, .LANCHOR83
 	ubfiz	x21, x19, 1, 16
-	ldr	x1, [x20, #:lo12:.LANCHOR84]
+	ldr	x1, [x20, #:lo12:.LANCHOR83]
 	ldrh	w0, [x1, x21]
-	cbnz	w0, .L1645
+	cbnz	w0, .L1681
 	mov	w2, 0
 	mov	w1, w19
 	adrp	x0, .LC36
 	add	x0, x0, :lo12:.LC36
 	bl	printf
-	ldr	x0, [x20, #:lo12:.LANCHOR84]
+	ldr	x0, [x20, #:lo12:.LANCHOR83]
 	ldrh	w0, [x0, x21]
-	cbnz	w0, .L1646
-	mov	w2, 3354
+	cbnz	w0, .L1682
+	mov	w2, 3385
 	adrp	x1, .LANCHOR207
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR207
@@ -11139,23 +11397,23 @@ decrement_vpc_count:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1646:
-	ldr	x0, [x20, #:lo12:.LANCHOR84]
-	adrp	x6, .LANCHOR88
-	add	x6, x6, :lo12:.LANCHOR88
+.L1682:
+	ldr	x0, [x20, #:lo12:.LANCHOR83]
+	adrp	x6, .LANCHOR87
+	add	x6, x6, :lo12:.LANCHOR87
 	mov	w1, 32
 	strh	w1, [x0, x21]
 	mov	w1, w19
 	mov	x0, x6
 	bl	test_node_in_list
-	cbz	w0, .L1647
-	adrp	x22, .LANCHOR89
+	cbz	w0, .L1683
+	adrp	x22, .LANCHOR88
 	mov	w1, w19
 	mov	x0, x6
 	bl	List_remove_node
-	ldrh	w0, [x22, #:lo12:.LANCHOR89]
-	cbnz	w0, .L1648
-	mov	w2, 3358
+	ldrh	w0, [x22, #:lo12:.LANCHOR88]
+	cbnz	w0, .L1684
+	mov	w2, 3389
 	adrp	x1, .LANCHOR207
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR207
@@ -11166,59 +11424,59 @@ decrement_vpc_count:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1648:
-	ldrh	w0, [x22, #:lo12:.LANCHOR89]
+.L1684:
+	ldrh	w0, [x22, #:lo12:.LANCHOR88]
 	sub	w0, w0, #1
-	strh	w0, [x22, #:lo12:.LANCHOR89]
+	strh	w0, [x22, #:lo12:.LANCHOR88]
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-	ldr	x0, [x20, #:lo12:.LANCHOR84]
+	ldr	x0, [x20, #:lo12:.LANCHOR83]
 	mov	w1, w19
 	ldrh	w2, [x0, x21]
 	adrp	x0, .LC37
 	add	x0, x0, :lo12:.LC37
 	bl	printf
-.L1647:
+.L1683:
 	mov	w0, w19
 	bl	FtlGcRefreshBlock
-.L1651:
+.L1687:
 	mov	w20, 0
-	b	.L1643
-.L1645:
+	b	.L1679
+.L1681:
 	sub	w0, w0, #1
 	strh	w0, [x1, x21]
-.L1644:
+.L1680:
 	adrp	x21, .LANCHOR133
 	mov	w1, 65535
 	ldrh	w0, [x21, #:lo12:.LANCHOR133]
 	cmp	w0, w1
-	bne	.L1650
+	bne	.L1686
 	strh	w19, [x21, #:lo12:.LANCHOR133]
-	b	.L1651
-.L1650:
+	b	.L1687
+.L1686:
 	cmp	w19, w0
-	beq	.L1651
+	beq	.L1687
 	bl	update_vpc_list
 	cmp	w0, 0
-	adrp	x1, .LANCHOR82
-	adrp	x0, .LANCHOR83
+	adrp	x1, .LANCHOR81
+	adrp	x0, .LANCHOR82
 	strh	w19, [x21, #:lo12:.LANCHOR133]
 	cset	w20, ne
-	ldr	x1, [x1, #:lo12:.LANCHOR82]
-	ldr	x0, [x0, #:lo12:.LANCHOR83]
+	ldr	x1, [x1, #:lo12:.LANCHOR81]
+	ldr	x0, [x0, #:lo12:.LANCHOR82]
 	sub	x0, x0, x1
 	mov	x1, -6148914691236517206
 	asr	x0, x0, 1
 	movk	x1, 0xaaab, lsl 0
 	mul	x0, x0, x1
-	adrp	x1, .LANCHOR84
-	ldr	x1, [x1, #:lo12:.LANCHOR84]
+	adrp	x1, .LANCHOR83
+	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	and	x2, x0, 65535
 	ldrh	w1, [x1, x2, lsl 1]
-	cbnz	w1, .L1643
+	cbnz	w1, .L1679
 	cmp	w19, w0, uxth
-	beq	.L1643
-	mov	w2, 3379
+	beq	.L1679
+	mov	w2, 3410
 	adrp	x1, .LANCHOR207
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR207
@@ -11229,7 +11487,7 @@ decrement_vpc_count:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1643:
+.L1679:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11242,7 +11500,7 @@ decrement_vpc_count:
 	.type	FtlSlcSuperblockCheck, %function
 FtlSlcSuperblockCheck:
 	ldrh	w1, [x0, 4]
-	cbz	w1, .L1668
+	cbz	w1, .L1704
 	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
@@ -11251,46 +11509,46 @@ FtlSlcSuperblockCheck:
 	stp	x21, x22, [sp, 32]
 	str	x23, [sp, 48]
 	cmp	w1, w20
-	beq	.L1656
+	beq	.L1692
 	mov	x19, x0
 	ldrb	w0, [x0, 6]
-	adrp	x22, .LANCHOR8
+	adrp	x22, .LANCHOR15
 	adrp	x21, .LANCHOR120
 	add	x0, x0, 8
-	add	x23, x22, :lo12:.LANCHOR8
+	add	x23, x22, :lo12:.LANCHOR15
 	add	x21, x21, :lo12:.LANCHOR120
 	ldrh	w0, [x19, x0, lsl 1]
-.L1660:
+.L1696:
 	cmp	w0, w20
-	beq	.L1662
+	beq	.L1698
 	ldrb	w0, [x19, 8]
 	cmp	w0, 1
-	bne	.L1663
+	bne	.L1699
 	ldrb	w1, [x23]
-	cbnz	w1, .L1663
+	cbnz	w1, .L1699
 	ldrh	w1, [x19, 2]
 	ldrh	w1, [x21, x1, lsl 1]
 	cmp	w1, w20
-	bne	.L1663
+	bne	.L1699
 	ldrh	w0, [x19, 4]
 	sub	w0, w0, #1
 	strh	w0, [x19, 4]
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1662
+	cbnz	w0, .L1698
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
-.L1671:
+.L1707:
 	strh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
-.L1656:
+.L1692:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1662:
+.L1698:
 	ldrb	w0, [x19, 6]
 	adrp	x1, .LANCHOR38
 	add	w0, w0, 1
@@ -11298,39 +11556,39 @@ FtlSlcSuperblockCheck:
 	and	w0, w0, 255
 	strb	w0, [x19, 6]
 	cmp	w1, w0
-	bne	.L1661
+	bne	.L1697
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L1661:
+.L1697:
 	ldrb	w0, [x19, 6]
 	add	x0, x0, 8
 	ldrh	w0, [x19, x0, lsl 1]
-	b	.L1660
-.L1663:
-	ldrb	w1, [x22, #:lo12:.LANCHOR8]
-	cbz	w1, .L1656
+	b	.L1696
+.L1699:
+	ldrb	w1, [x22, #:lo12:.LANCHOR15]
+	cbz	w1, .L1692
 	cmp	w0, 1
-	bne	.L1656
-	adrp	x0, .LANCHOR54
+	bne	.L1692
+	adrp	x0, .LANCHOR53
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x0, #:lo12:.LANCHOR54]
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bcc	.L1656
+	bcc	.L1692
 	ldrh	w0, [x19]
-	adrp	x1, .LANCHOR84
+	adrp	x1, .LANCHOR83
 	ldrh	w3, [x19, 4]
-	ldr	x2, [x1, #:lo12:.LANCHOR84]
+	ldr	x2, [x1, #:lo12:.LANCHOR83]
 	lsl	x0, x0, 1
 	ldrh	w1, [x2, x0]
 	sub	w1, w1, w3
 	strh	w1, [x2, x0]
-	adrp	x0, .LANCHOR53
+	adrp	x0, .LANCHOR52
 	strh	wzr, [x19, 4]
-	ldrh	w0, [x0, #:lo12:.LANCHOR53]
-	b	.L1671
-.L1668:
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
+	b	.L1707
+.L1704:
 	ret
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
 	.section	.text.get_new_active_ppa,"ax",@progbits
@@ -11348,8 +11606,8 @@ get_new_active_ppa:
 	stp	x23, x24, [sp, 48]
 	cmp	w1, w0
 	str	x25, [sp, 64]
-	bne	.L1673
-	mov	w2, 3276
+	bne	.L1709
+	mov	w2, 3307
 	adrp	x1, .LANCHOR208
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR208
@@ -11360,13 +11618,13 @@ get_new_active_ppa:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1673:
-	adrp	x20, .LANCHOR53
+.L1709:
+	adrp	x20, .LANCHOR52
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x20, #:lo12:.LANCHOR53]
+	ldrh	w0, [x20, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bne	.L1674
-	mov	w2, 3277
+	bne	.L1710
+	mov	w2, 3308
 	adrp	x1, .LANCHOR208
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR208
@@ -11377,10 +11635,10 @@ get_new_active_ppa:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1674:
+.L1710:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1675
-	mov	w2, 3278
+	cbnz	w0, .L1711
+	mov	w2, 3309
 	adrp	x1, .LANCHOR208
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR208
@@ -11391,120 +11649,120 @@ get_new_active_ppa:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1675:
+.L1711:
 	ldrb	w0, [x19, 6]
 	adrp	x21, .LANCHOR38
 	strb	wzr, [x19, 10]
-	adrp	x23, .LANCHOR8
+	adrp	x23, .LANCHOR15
 	add	x0, x0, 8
 	adrp	x24, .LANCHOR120
-	add	x23, x23, :lo12:.LANCHOR8
+	add	x23, x23, :lo12:.LANCHOR15
 	add	x24, x24, :lo12:.LANCHOR120
 	add	x25, x21, :lo12:.LANCHOR38
 	ldrh	w22, [x19, x0, lsl 1]
-.L1676:
+.L1712:
 	mov	w2, 65535
 	cmp	w22, w2
-	beq	.L1677
+	beq	.L1713
 	ldrb	w0, [x19, 8]
 	ldrh	w1, [x19, 4]
 	cmp	w0, 1
 	ldrh	w0, [x19, 2]
-	bne	.L1679
+	bne	.L1715
 	ldrb	w3, [x23]
-	cbnz	w3, .L1679
+	cbnz	w3, .L1715
 	ldrh	w3, [x24, w0, sxtw 1]
 	cmp	w3, w2
-	bne	.L1679
+	bne	.L1715
 	ldrh	w0, [x19]
 	sub	w1, w1, #1
 	strh	w1, [x19, 4]
 	bl	decrement_vpc_count
-.L1677:
+.L1713:
 	ldrb	w0, [x19, 6]
 	ldrh	w1, [x25]
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x19, 6]
 	cmp	w1, w0
-	bne	.L1678
+	bne	.L1714
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L1678:
+.L1714:
 	ldrb	w0, [x19, 6]
 	add	x0, x0, 8
 	ldrh	w22, [x19, x0, lsl 1]
-	b	.L1676
-.L1679:
-	adrp	x23, .LANCHOR8
+	b	.L1712
+.L1715:
+	adrp	x23, .LANCHOR15
 	adrp	x24, .LANCHOR120
 	orr	w22, w0, w22, lsl 10
-	add	x23, x23, :lo12:.LANCHOR8
+	add	x23, x23, :lo12:.LANCHOR15
 	add	x24, x24, :lo12:.LANCHOR120
 	sub	w1, w1, #1
 	strh	w1, [x19, 4]
-.L1680:
+.L1716:
 	ldrb	w0, [x19, 6]
 	mov	w1, 65535
 	ldrh	w3, [x21, #:lo12:.LANCHOR38]
-.L1682:
+.L1718:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	cmp	w0, w3
-	bne	.L1681
+	bne	.L1717
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
 	mov	w0, 0
-.L1681:
+.L1717:
 	add	x2, x19, x0, sxtw 1
 	ldrh	w2, [x2, 16]
 	cmp	w2, w1
-	beq	.L1682
+	beq	.L1718
 	strb	w0, [x19, 6]
 	ldrb	w0, [x19, 8]
 	cmp	w0, 1
-	bne	.L1683
+	bne	.L1719
 	ldrb	w2, [x23]
 	ldrh	w0, [x19, 2]
-	cbnz	w2, .L1684
+	cbnz	w2, .L1720
 	ldrh	w0, [x24, w0, sxtw 1]
 	cmp	w0, w1
-	bne	.L1683
+	bne	.L1719
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1683
+	cbz	w0, .L1719
 	sub	w0, w0, #1
 	strh	w0, [x19, 4]
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-	b	.L1680
-.L1684:
-	adrp	x1, .LANCHOR54
-	ldrh	w1, [x1, #:lo12:.LANCHOR54]
+	b	.L1716
+.L1720:
+	adrp	x1, .LANCHOR53
+	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	cmp	w0, w1
-	bcc	.L1683
+	bcc	.L1719
 	ldrh	w0, [x19]
-	adrp	x1, .LANCHOR84
+	adrp	x1, .LANCHOR83
 	ldrh	w3, [x19, 4]
-	ldr	x2, [x1, #:lo12:.LANCHOR84]
+	ldr	x2, [x1, #:lo12:.LANCHOR83]
 	lsl	x0, x0, 1
 	ldrh	w1, [x2, x0]
 	sub	w1, w1, w3
 	strh	w1, [x2, x0]
 	strh	wzr, [x19, 4]
-	ldrh	w0, [x20, #:lo12:.LANCHOR53]
+	ldrh	w0, [x20, #:lo12:.LANCHOR52]
 	strh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
-.L1683:
+.L1719:
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x20, #:lo12:.LANCHOR53]
+	ldrh	w0, [x20, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bne	.L1672
+	bne	.L1708
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1672
-	mov	w2, 3322
+	cbz	w0, .L1708
+	mov	w2, 3353
 	adrp	x1, .LANCHOR208
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR208
@@ -11515,7 +11773,7 @@ get_new_active_ppa:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1672:
+.L1708:
 	mov	w0, w22
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -11532,14 +11790,14 @@ FtlVpcTblFlush:
 	stp	x29, x30, [sp, -112]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR77
+	adrp	x24, .LANCHOR76
 	stp	x19, x20, [sp, 16]
-	ldr	w0, [x24, #:lo12:.LANCHOR77]
+	ldr	w0, [x24, #:lo12:.LANCHOR76]
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	str	x24, [x29, 104]
-	cbnz	w0, .L1697
+	cbnz	w0, .L1733
 	adrp	x26, .LANCHOR188
 	adrp	x28, .LANCHOR202
 	adrp	x23, .LANCHOR209
@@ -11560,20 +11818,20 @@ FtlVpcTblFlush:
 	adrp	x27, .LANCHOR40
 	ldrh	w1, [x1, 6]
 	stp	w2, wzr, [x20, 4]
-	adrp	x2, .LANCHOR81
-	add	x19, x2, :lo12:.LANCHOR81
+	adrp	x2, .LANCHOR80
+	add	x19, x2, :lo12:.LANCHOR80
 	str	wzr, [x20, 12]
-	str	w3, [x2, #:lo12:.LANCHOR81]
-	mov	w2, 80
+	str	w3, [x2, #:lo12:.LANCHOR80]
+	mov	w2, 83
 	movk	w2, 0x5000, lsl 16
 	strh	w1, [x19, 8]
 	adrp	x1, .LANCHOR45
 	str	w2, [x19, 4]
-	adrp	x2, .LANCHOR92
+	adrp	x2, .LANCHOR91
 	ldrh	w1, [x1, #:lo12:.LANCHOR45]
 	strb	w1, [x19, 10]
-	add	x1, x2, :lo12:.LANCHOR92
-	ldrh	w2, [x2, #:lo12:.LANCHOR92]
+	add	x1, x2, :lo12:.LANCHOR91
+	ldrh	w2, [x2, #:lo12:.LANCHOR91]
 	strh	w2, [x19, 14]
 	ldrb	w3, [x1, 6]
 	ldrh	w2, [x1, 2]
@@ -11581,9 +11839,9 @@ FtlVpcTblFlush:
 	strb	w1, [x19, 11]
 	orr	w2, w3, w2, lsl 6
 	strh	w2, [x19, 16]
-	adrp	x2, .LANCHOR93
-	add	x1, x2, :lo12:.LANCHOR93
-	ldrh	w2, [x2, #:lo12:.LANCHOR93]
+	adrp	x2, .LANCHOR92
+	add	x1, x2, :lo12:.LANCHOR92
+	ldrh	w2, [x2, #:lo12:.LANCHOR92]
 	ldrb	w3, [x1, 6]
 	strh	w2, [x19, 18]
 	ldrh	w2, [x1, 2]
@@ -11591,9 +11849,9 @@ FtlVpcTblFlush:
 	strb	w1, [x19, 12]
 	orr	w2, w3, w2, lsl 6
 	strh	w2, [x19, 20]
-	adrp	x2, .LANCHOR94
-	add	x1, x2, :lo12:.LANCHOR94
-	ldrh	w2, [x2, #:lo12:.LANCHOR94]
+	adrp	x2, .LANCHOR93
+	add	x1, x2, :lo12:.LANCHOR93
+	ldrh	w2, [x2, #:lo12:.LANCHOR93]
 	strh	w2, [x19, 22]
 	ldrb	w3, [x1, 6]
 	ldrh	w2, [x1, 2]
@@ -11609,14 +11867,14 @@ FtlVpcTblFlush:
 	adrp	x1, .LANCHOR160
 	ldr	w1, [x1, #:lo12:.LANCHOR160]
 	str	w1, [x19, 36]
+	adrp	x1, .LANCHOR112
+	ldrh	w1, [x1, #:lo12:.LANCHOR112]
+	strh	w1, [x19, 44]
 	adrp	x1, .LANCHOR113
 	ldrh	w1, [x1, #:lo12:.LANCHOR113]
-	strh	w1, [x19, 44]
-	adrp	x1, .LANCHOR114
-	ldrh	w1, [x1, #:lo12:.LANCHOR114]
 	strh	w1, [x19, 46]
-	adrp	x1, .LANCHOR58
-	ldrh	w2, [x1, #:lo12:.LANCHOR58]
+	adrp	x1, .LANCHOR57
+	ldrh	w2, [x1, #:lo12:.LANCHOR57]
 	mov	w1, 255
 	bl	ftl_memset
 	ldr	x0, [x21, 8]
@@ -11624,10 +11882,10 @@ FtlVpcTblFlush:
 	mov	w2, 48
 	mov	x19, x28
 	bl	ftl_memcpy
-	adrp	x1, .LANCHOR84
+	adrp	x1, .LANCHOR83
 	ldrh	w2, [x27, #:lo12:.LANCHOR40]
 	ldr	x0, [x21, 8]
-	ldr	x1, [x1, #:lo12:.LANCHOR84]
+	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	lsl	w2, w2, 1
 	add	x0, x0, 48
 	bl	ftl_memcpy
@@ -11642,13 +11900,13 @@ FtlVpcTblFlush:
 	and	x0, x0, -4
 	add	x0, x3, x0
 	bl	ftl_memcpy
-	adrp	x0, .LANCHOR70
-	ldrh	w0, [x0, #:lo12:.LANCHOR70]
-	cbz	w0, .L1698
+	adrp	x0, .LANCHOR69
+	ldrh	w0, [x0, #:lo12:.LANCHOR69]
+	cbz	w0, .L1734
 	ldrh	w0, [x27, #:lo12:.LANCHOR40]
-	adrp	x1, .LANCHOR67
+	adrp	x1, .LANCHOR66
 	ldr	x3, [x21, 8]
-	ldrh	w2, [x1, #:lo12:.LANCHOR67]
+	ldrh	w2, [x1, #:lo12:.LANCHOR66]
 	lsr	w1, w0, 3
 	add	w0, w1, w0, lsl 1
 	adrp	x1, .LANCHOR131
@@ -11658,17 +11916,17 @@ FtlVpcTblFlush:
 	and	x0, x0, 65532
 	add	x0, x3, x0
 	bl	ftl_memcpy
-.L1698:
+.L1734:
 	add	x28, x19, :lo12:.LANCHOR202
 	mov	w0, 0
 	add	x24, x23, :lo12:.LANCHOR209
 	bl	FtlUpdateVaildLpn
-	adrp	x23, .LANCHOR54
+	adrp	x23, .LANCHOR53
 	mov	w21, 0
-	add	x23, x23, :lo12:.LANCHOR54
+	add	x23, x23, :lo12:.LANCHOR53
 	mov	w27, 65535
 	str	x23, [x29, 96]
-.L1699:
+.L1735:
 	ldrh	w2, [x24, 2]
 	ldrh	w1, [x24]
 	ldr	x0, [x25, #:lo12:.LANCHOR183]
@@ -11680,7 +11938,7 @@ FtlVpcTblFlush:
 	ldrh	w0, [x23]
 	sub	w0, w0, #1
 	cmp	w2, w0
-	blt	.L1700
+	blt	.L1736
 	ldrh	w27, [x24, 4]
 	strh	wzr, [x24, 2]
 	strh	w1, [x24, 4]
@@ -11694,7 +11952,7 @@ FtlVpcTblFlush:
 	strh	w0, [x24]
 	strh	w0, [x20, 2]
 	str	w1, [x20, 4]
-.L1700:
+.L1736:
 	mov	w3, 1
 	mov	x0, x28
 	mov	w1, w3
@@ -11706,10 +11964,10 @@ FtlVpcTblFlush:
 	and	w0, w0, 65535
 	strh	w0, [x24, 2]
 	cmn	w1, #1
-	bne	.L1701
+	bne	.L1737
 	cmp	w0, 1
-	bne	.L1702
-	mov	w2, 1209
+	bne	.L1738
+	mov	w2, 1217
 	adrp	x1, .LANCHOR210
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR210
@@ -11720,19 +11978,19 @@ FtlVpcTblFlush:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1702:
+.L1738:
 	ldrh	w0, [x24, 2]
 	cmp	w0, 1
-	bne	.L1703
+	bne	.L1739
 	ldr	x0, [x29, 96]
 	ldrh	w0, [x0]
 	sub	w0, w0, #1
 	strh	w0, [x24, 2]
-.L1703:
+.L1739:
 	add	w21, w21, 1
 	and	w21, w21, 65535
 	cmp	w21, 3
-	bls	.L1699
+	bls	.L1735
 	add	x19, x19, :lo12:.LANCHOR202
 	mov	w2, w21
 	adrp	x0, .LC38
@@ -11741,8 +11999,8 @@ FtlVpcTblFlush:
 	bl	printf
 	ldr	x1, [x29, 104]
 	mov	w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR77]
-.L1697:
+	str	w0, [x1, #:lo12:.LANCHOR76]
+.L1733:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -11751,18 +12009,18 @@ FtlVpcTblFlush:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1701:
+.L1737:
 	cmp	w0, 1
-	beq	.L1699
+	beq	.L1735
 	cmp	w1, 256
-	beq	.L1699
+	beq	.L1735
 	mov	w0, 65535
 	cmp	w27, w0
-	beq	.L1697
+	beq	.L1733
 	mov	w1, 1
 	mov	w0, w27
 	bl	FtlFreeSysBlkQueueIn
-	b	.L1697
+	b	.L1733
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
 	.section	.text.FtlSuperblockPowerLostFix,"ax",@progbits
 	.align	2
@@ -11770,22 +12028,22 @@ FtlVpcTblFlush:
 	.type	FtlSuperblockPowerLostFix, %function
 FtlSuperblockPowerLostFix:
 	stp	x29, x30, [sp, -128]!
-	adrp	x1, .LANCHOR77
+	adrp	x1, .LANCHOR76
 	add	x29, sp, 0
 	str	x23, [sp, 48]
-	ldr	w23, [x1, #:lo12:.LANCHOR77]
+	ldr	w23, [x1, #:lo12:.LANCHOR76]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	cbnz	w23, .L1716
-	adrp	x1, .LANCHOR8
-	ldrb	w1, [x1, #:lo12:.LANCHOR8]
-	cbz	w1, .L1727
+	cbnz	w23, .L1752
+	adrp	x1, .LANCHOR15
+	ldrb	w1, [x1, #:lo12:.LANCHOR15]
+	cbz	w1, .L1763
 	ldrb	w1, [x0, 8]
 	cmp	w1, 1
-	bne	.L1727
+	bne	.L1763
 	ldrh	w21, [x0, 4]
 	mov	w23, w1
-.L1718:
+.L1754:
 	adrp	x1, .LANCHOR188
 	mov	x19, x0
 	mov	w0, -1
@@ -11809,41 +12067,41 @@ FtlSuperblockPowerLostFix:
 	mov	w1, 22136
 	movk	w1, 0x1234, lsl 16
 	str	w1, [x0, 4]
-.L1719:
+.L1755:
 	sub	w21, w21, #1
 	cmn	w21, #1
-	beq	.L1722
+	beq	.L1758
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1720
-.L1722:
+	cbnz	w0, .L1756
+.L1758:
 	ldrh	w0, [x19]
-	adrp	x1, .LANCHOR84
+	adrp	x1, .LANCHOR83
 	ldrh	w3, [x19, 4]
-	ldr	x2, [x1, #:lo12:.LANCHOR84]
+	ldr	x2, [x1, #:lo12:.LANCHOR83]
 	lsl	x0, x0, 1
 	ldrh	w1, [x2, x0]
 	sub	w1, w1, w3
 	strh	w1, [x2, x0]
-	adrp	x0, .LANCHOR53
+	adrp	x0, .LANCHOR52
 	strb	wzr, [x19, 6]
 	strh	wzr, [x19, 4]
-	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	strh	w0, [x19, 2]
-.L1716:
+.L1752:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1727:
+.L1763:
 	mov	w21, 12
-	b	.L1718
-.L1720:
+	b	.L1754
+.L1756:
 	mov	x0, x19
 	bl	get_new_active_ppa
 	str	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L1722
+	beq	.L1758
 	ldr	w0, [x22]
 	mov	w3, 0
 	str	w0, [x20, 4]
@@ -11857,7 +12115,7 @@ FtlSuperblockPowerLostFix:
 	bl	FlashProgPages
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-	b	.L1719
+	b	.L1755
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
 	.section	.text.FtlLoadFactoryBbt,"ax",@progbits
 	.align	2
@@ -11877,9 +12135,9 @@ FtlLoadFactoryBbt:
 	stp	x27, x28, [sp, 80]
 	add	x28, x26, :lo12:.LANCHOR51
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR75
+	adrp	x20, .LANCHOR74
 	stp	x23, x24, [sp, 48]
-	add	x20, x20, :lo12:.LANCHOR75
+	add	x20, x20, :lo12:.LANCHOR74
 	str	x2, [x1, 8]
 	adrp	x2, .LANCHOR188
 	adrp	x23, .LANCHOR45
@@ -11889,10 +12147,10 @@ FtlLoadFactoryBbt:
 	mov	w21, 0
 	mov	w27, -1
 	str	x25, [x1, 16]
-.L1733:
+.L1769:
 	ldrh	w0, [x23]
 	cmp	w21, w0
-	bcc	.L1738
+	bcc	.L1774
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -11901,18 +12159,18 @@ FtlLoadFactoryBbt:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1738:
+.L1774:
 	ldrh	w19, [x26, #:lo12:.LANCHOR51]
 	add	x24, x22, :lo12:.LANCHOR202
 	strh	w27, [x20]
 	mov	w3, 61664
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L1734:
+.L1770:
 	ldrh	w0, [x28]
 	sub	w1, w0, #15
 	cmp	w1, w19
-	bgt	.L1736
+	bgt	.L1772
 	madd	w0, w0, w21, w19
 	mov	w2, 1
 	str	w3, [x29, 108]
@@ -11924,19 +12182,19 @@ FtlLoadFactoryBbt:
 	ldr	w0, [x24]
 	ldr	w3, [x29, 108]
 	cmn	w0, #1
-	beq	.L1735
+	beq	.L1771
 	ldrh	w0, [x25]
 	cmp	w0, w3
-	bne	.L1735
+	bne	.L1771
 	strh	w19, [x20]
-.L1736:
+.L1772:
 	add	w21, w21, 1
 	add	x20, x20, 2
-	b	.L1733
-.L1735:
+	b	.L1769
+.L1771:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L1734
+	b	.L1770
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
 	.section	.text.FtlGetLastWrittenPage,"ax",@progbits
 	.align	2
@@ -11950,10 +12208,10 @@ FtlGetLastWrittenPage:
 	mov	w23, w1
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	bne	.L1744
-	adrp	x1, .LANCHOR54
-	ldrh	w19, [x1, #:lo12:.LANCHOR54]
-.L1745:
+	bne	.L1780
+	adrp	x1, .LANCHOR53
+	ldrh	w19, [x1, #:lo12:.LANCHOR53]
+.L1781:
 	sub	w19, w19, #1
 	lsl	w21, w0, 10
 	sxth	w19, w19
@@ -11967,24 +12225,24 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 128]
 	cmn	w0, #1
-	bne	.L1746
+	bne	.L1782
 	mov	w22, 0
 	mov	w24, 2
-.L1747:
+.L1783:
 	cmp	w22, w19
-	ble	.L1750
-.L1746:
+	ble	.L1786
+.L1782:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 192
 	ret
-.L1744:
-	adrp	x1, .LANCHOR53
-	ldrh	w19, [x1, #:lo12:.LANCHOR53]
-	b	.L1745
-.L1750:
+.L1780:
+	adrp	x1, .LANCHOR52
+	ldrh	w19, [x1, #:lo12:.LANCHOR52]
+	b	.L1781
+.L1786:
 	add	w20, w22, w19
 	mov	w2, w23
 	mov	w1, 1
@@ -11996,20 +12254,20 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 128]
 	cmn	w0, #1
-	bne	.L1748
+	bne	.L1784
 	ldr	w0, [x29, 132]
 	cmn	w0, #1
-	bne	.L1748
+	bne	.L1784
 	ldr	w0, [x29, 72]
 	cmn	w0, #1
-	beq	.L1748
+	beq	.L1784
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L1747
-.L1748:
+	b	.L1783
+.L1784:
 	add	w20, w20, 1
 	sxth	w22, w20
-	b	.L1747
+	b	.L1783
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
 	.section	.text.FtlLoadBbt,"ax",@progbits
 	.align	2
@@ -12037,11 +12295,11 @@ FtlLoadBbt:
 	add	x24, x24, :lo12:.LANCHOR51
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L1756:
+.L1792:
 	ldrh	w0, [x24]
 	sub	w0, w0, #47
 	cmp	w0, w19
-	bgt	.L1759
+	bgt	.L1795
 	lsl	w0, w19, 10
 	mov	w2, 1
 	str	w0, [x20, 4]
@@ -12050,7 +12308,7 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L1757
+	bne	.L1793
 	ldr	w0, [x20, 4]
 	mov	w2, 1
 	mov	w1, w2
@@ -12058,30 +12316,30 @@ FtlLoadBbt:
 	str	w0, [x20, 4]
 	mov	x0, x20
 	bl	FlashReadPages
-.L1757:
+.L1793:
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L1758
+	beq	.L1794
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	bne	.L1758
-	adrp	x1, .LANCHOR75
-	add	x0, x1, :lo12:.LANCHOR75
-	strh	w19, [x1, #:lo12:.LANCHOR75]
+	bne	.L1794
+	adrp	x1, .LANCHOR74
+	add	x0, x1, :lo12:.LANCHOR74
+	strh	w19, [x1, #:lo12:.LANCHOR74]
 	ldr	w1, [x21, 4]
 	str	w1, [x0, 8]
 	ldrh	w1, [x21, 8]
 	strh	w1, [x0, 4]
-.L1759:
-	adrp	x19, .LANCHOR75
+.L1795:
+	adrp	x19, .LANCHOR74
 	mov	w0, 65535
-	add	x20, x19, :lo12:.LANCHOR75
-	ldrh	w1, [x19, #:lo12:.LANCHOR75]
+	add	x20, x19, :lo12:.LANCHOR74
+	ldrh	w1, [x19, #:lo12:.LANCHOR74]
 	cmp	w1, w0
-	beq	.L1773
+	beq	.L1809
 	ldrh	w1, [x20, 4]
 	cmp	w1, w0
-	beq	.L1763
+	beq	.L1799
 	add	x0, x22, :lo12:.LANCHOR202
 	lsl	w1, w1, 10
 	mov	w2, 1
@@ -12090,23 +12348,23 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x22, #:lo12:.LANCHOR202]
 	cmn	w0, #1
-	beq	.L1763
+	beq	.L1799
 	ldrh	w1, [x21]
 	mov	w0, 61649
 	cmp	w1, w0
-	bne	.L1763
+	bne	.L1799
 	ldr	w1, [x20, 8]
 	ldr	w0, [x21, 4]
 	cmp	w0, w1
-	bls	.L1763
+	bls	.L1799
 	ldrh	w1, [x20, 4]
 	str	w0, [x20, 8]
 	ldrh	w0, [x21, 8]
-	strh	w1, [x19, #:lo12:.LANCHOR75]
+	strh	w1, [x19, #:lo12:.LANCHOR74]
 	strh	w0, [x20, 4]
-.L1763:
-	ldrh	w0, [x19, #:lo12:.LANCHOR75]
-	add	x24, x19, :lo12:.LANCHOR75
+.L1799:
+	ldrh	w0, [x19, #:lo12:.LANCHOR74]
+	add	x24, x19, :lo12:.LANCHOR74
 	mov	w1, 1
 	mov	w25, 61649
 	bl	FtlGetLastWrittenPage
@@ -12114,8 +12372,8 @@ FtlLoadBbt:
 	add	w0, w0, 1
 	strh	w0, [x24, 2]
 	add	x24, x22, :lo12:.LANCHOR202
-.L1765:
-	tbz	w20, #31, .L1768
+.L1801:
+	tbz	w20, #31, .L1804
 	mov	w2, 335
 	adrp	x1, .LANCHOR211
 	adrp	x0, .LC5
@@ -12127,28 +12385,28 @@ FtlLoadBbt:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1767:
-	add	x0, x19, :lo12:.LANCHOR75
+.L1803:
+	add	x0, x19, :lo12:.LANCHOR74
 	ldrh	w1, [x21, 10]
 	strh	w1, [x0, 6]
 	mov	w1, 65535
 	ldrh	w0, [x21, 12]
 	cmp	w0, w1
-	beq	.L1770
+	beq	.L1806
 	adrp	x1, .LANCHOR37
 	ldr	w2, [x1, #:lo12:.LANCHOR37]
 	cmp	w0, w2
-	beq	.L1770
+	beq	.L1806
 	adrp	x1, .LANCHOR41
 	ldrh	w1, [x1, #:lo12:.LANCHOR41]
 	lsr	w1, w1, 2
 	cmp	w2, w1
-	bcs	.L1770
+	bcs	.L1806
 	cmp	w0, w1
-	bcs	.L1770
+	bcs	.L1806
 	bl	FtlSysBlkNumInit
-.L1770:
-	add	x19, x19, :lo12:.LANCHOR75
+.L1806:
+	add	x19, x19, :lo12:.LANCHOR74
 	adrp	x21, .LANCHOR45
 	adrp	x23, .LANCHOR123
 	add	x19, x19, 32
@@ -12156,24 +12414,24 @@ FtlLoadBbt:
 	add	x23, x23, :lo12:.LANCHOR123
 	add	x22, x22, :lo12:.LANCHOR202
 	mov	w20, 0
-.L1771:
+.L1807:
 	ldrh	w0, [x21]
 	cmp	w20, w0
-	bcc	.L1772
+	bcc	.L1808
 	mov	w0, 0
-.L1755:
+.L1791:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1758:
+.L1794:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L1756
-.L1768:
-	ldrh	w0, [x19, #:lo12:.LANCHOR75]
+	b	.L1792
+.L1804:
+	ldrh	w0, [x19, #:lo12:.LANCHOR74]
 	mov	w2, 1
 	mov	w1, w2
 	orr	w0, w20, w0, lsl 10
@@ -12184,15 +12442,15 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x24]
 	cmn	w0, #1
-	beq	.L1766
+	beq	.L1802
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	beq	.L1767
-.L1766:
+	beq	.L1803
+.L1802:
 	sub	w20, w20, #1
 	sxth	w20, w20
-	b	.L1765
-.L1772:
+	b	.L1801
+.L1808:
 	ldrh	w2, [x23]
 	ldr	x0, [x22, 8]
 	mul	w1, w2, w20
@@ -12201,10 +12459,10 @@ FtlLoadBbt:
 	add	x1, x0, x1, lsl 2
 	ldr	x0, [x19], 8
 	bl	ftl_memcpy
-	b	.L1771
-.L1773:
+	b	.L1807
+.L1809:
 	mov	w0, -1
-	b	.L1755
+	b	.L1791
 	.size	FtlLoadBbt, .-FtlLoadBbt
 	.section	.text.ftl_map_blk_gc,"ax",@progbits
 	.align	2
@@ -12216,7 +12474,7 @@ ftl_map_blk_gc:
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR54
+	adrp	x25, .LANCHOR53
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	stp	x27, x28, [sp, 80]
@@ -12227,12 +12485,12 @@ ftl_map_blk_gc:
 	ldrh	w2, [x19, 8]
 	sub	w1, w1, #4
 	cmp	w2, w1
-	blt	.L1786
+	blt	.L1822
 	ubfiz	x0, x0, 1, 16
 	ldrh	w21, [x20, x0]
-	cbz	w21, .L1786
+	cbz	w21, .L1822
 	ldr	w1, [x19, 52]
-	cbnz	w1, .L1786
+	cbnz	w1, .L1822
 	mov	w1, 1
 	str	w1, [x19, 52]
 	strh	wzr, [x20, x0]
@@ -12240,41 +12498,41 @@ ftl_map_blk_gc:
 	ldrh	w1, [x19, 2]
 	sub	w0, w0, #1
 	strh	w0, [x19, 8]
-	ldrh	w0, [x25, #:lo12:.LANCHOR54]
+	ldrh	w0, [x25, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bcc	.L1787
+	bcc	.L1823
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L1787:
+.L1823:
 	adrp	x22, .LANCHOR202
 	adrp	x24, .LANCHOR212
 	mov	x23, x22
 	add	x27, x22, :lo12:.LANCHOR202
 	add	x24, x24, :lo12:.LANCHOR212
 	mov	w20, 0
-.L1788:
+.L1824:
 	ldrh	w0, [x19, 6]
 	cmp	w0, w20
-	bhi	.L1794
+	bhi	.L1830
 	mov	w1, 1
 	mov	w0, w21
 	bl	FtlFreeSysBlkQueueIn
 	str	wzr, [x19, 52]
-.L1786:
+.L1822:
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x25, #:lo12:.LANCHOR54]
+	ldrh	w0, [x25, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bcc	.L1792
+	bcc	.L1828
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-	b	.L1792
-.L1794:
+	b	.L1828
+.L1830:
 	ubfiz	x0, x20, 2, 16
 	add	x1, x26, x0
 	str	x1, [x29, 104]
 	ldr	w1, [x26, x0]
 	cmp	w21, w1, lsr 10
-	bne	.L1789
+	bne	.L1825
 	adrp	x2, .LANCHOR184
 	add	x0, x22, :lo12:.LANCHOR202
 	ldr	x2, [x2, #:lo12:.LANCHOR184]
@@ -12288,7 +12546,7 @@ ftl_map_blk_gc:
 	bl	FlashReadPages
 	ldrh	w0, [x28, 8]
 	cmp	w0, w20
-	beq	.L1790
+	beq	.L1826
 	mov	w2, 661
 	mov	x1, x24
 	adrp	x0, .LC5
@@ -12299,12 +12557,12 @@ ftl_map_blk_gc:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1790:
+.L1826:
 	ldr	w0, [x27]
 	ldrh	w2, [x28, 8]
 	cmn	w0, #1
-	bne	.L1791
-.L1793:
+	bne	.L1827
+.L1829:
 	ldr	x0, [x29, 104]
 	add	x23, x23, :lo12:.LANCHOR202
 	str	wzr, [x0]
@@ -12312,10 +12570,10 @@ ftl_map_blk_gc:
 	add	x0, x0, :lo12:.LC39
 	ldr	w1, [x23, 4]
 	bl	printf
-	adrp	x0, .LANCHOR77
+	adrp	x0, .LANCHOR76
 	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR77]
-.L1792:
+	str	w1, [x0, #:lo12:.LANCHOR76]
+.L1828:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -12324,30 +12582,30 @@ ftl_map_blk_gc:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1791:
+.L1827:
 	cmp	w2, w20
-	bne	.L1793
+	bne	.L1829
 	ldrh	w1, [x28]
 	ldrh	w0, [x19, 4]
 	cmp	w1, w0
-	bne	.L1793
+	bne	.L1829
 	ldr	x2, [x27, 8]
 	mov	w1, w20
 	mov	x0, x19
 	bl	FtlMapWritePage
-.L1789:
+.L1825:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L1788
+	b	.L1824
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
 	.section	.text.Ftl_write_map_blk_to_last_page,"ax",@progbits
 	.align	2
 	.global	Ftl_write_map_blk_to_last_page
 	.type	Ftl_write_map_blk_to_last_page, %function
 Ftl_write_map_blk_to_last_page:
-	adrp	x1, .LANCHOR77
-	ldr	w1, [x1, #:lo12:.LANCHOR77]
-	cbnz	w1, .L1810
+	adrp	x1, .LANCHOR76
+	ldr	w1, [x1, #:lo12:.LANCHOR76]
+	cbnz	w1, .L1850
 	stp	x29, x30, [sp, -64]!
 	mov	w1, 65535
 	add	x29, sp, 0
@@ -12355,12 +12613,12 @@ Ftl_write_map_blk_to_last_page:
 	mov	x19, x0
 	stp	x21, x22, [sp, 32]
 	ldrh	w0, [x0]
-	ldr	x20, [x19, 16]
-	str	x23, [sp, 48]
+	stp	x23, x24, [sp, 48]
 	cmp	w0, w1
-	bne	.L1801
+	ldr	x20, [x19, 16]
+	bne	.L1837
 	ldrh	w0, [x19, 8]
-	cbz	w0, .L1802
+	cbz	w0, .L1838
 	mov	w2, 697
 	adrp	x1, .LANCHOR213
 	adrp	x0, .LC5
@@ -12372,7 +12630,7 @@ Ftl_write_map_blk_to_last_page:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1802:
+.L1838:
 	ldrh	w0, [x19, 8]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
@@ -12383,73 +12641,83 @@ Ftl_write_map_blk_to_last_page:
 	add	w0, w0, 1
 	strh	wzr, [x19]
 	str	w0, [x19, 48]
-.L1800:
+.L1836:
 	mov	w0, 0
-	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1801:
+.L1837:
 	ubfiz	x0, x0, 1, 16
-	adrp	x1, .LANCHOR188
-	adrp	x23, .LANCHOR183
-	ldr	x22, [x19, 40]
-	ldr	x1, [x1, #:lo12:.LANCHOR188]
-	ldrh	w21, [x20, x0]
-	adrp	x20, .LANCHOR202
+	adrp	x2, .LANCHOR188
+	adrp	x21, .LANCHOR202
+	add	x1, x21, :lo12:.LANCHOR202
+	adrp	x24, .LANCHOR183
+	ldr	x23, [x19, 40]
+	ldrh	w22, [x20, x0]
 	ldrh	w0, [x19, 2]
-	add	x2, x20, :lo12:.LANCHOR202
-	orr	w0, w0, w21, lsl 10
-	str	w0, [x2, 4]
-	ldr	x0, [x23, #:lo12:.LANCHOR183]
-	str	x1, [x2, 16]
-	str	x0, [x2, 8]
-	ldr	w2, [x19, 48]
-	str	w2, [x1, 4]
-	mov	w2, -1291
-	strh	w2, [x1, 8]
-	ldrh	w2, [x19, 4]
-	strh	w2, [x1]
-	strh	w21, [x1, 2]
-	adrp	x1, .LANCHOR54
-	ldrh	w2, [x1, #:lo12:.LANCHOR54]
+	ldr	x20, [x2, #:lo12:.LANCHOR188]
+	str	x20, [x1, 16]
+	orr	w0, w0, w22, lsl 10
+	str	w0, [x1, 4]
+	ldr	x0, [x24, #:lo12:.LANCHOR183]
+	str	x0, [x1, 8]
+	ldr	w1, [x19, 48]
+	str	w1, [x20, 4]
+	mov	w1, -1291
+	strh	w1, [x20, 8]
+	ldrh	w1, [x19, 4]
+	strh	w1, [x20]
+	adrp	x1, .LANCHOR53
+	strh	w22, [x20, 2]
+	ldrh	w2, [x1, #:lo12:.LANCHOR53]
 	mov	w1, 255
 	lsl	w2, w2, 3
 	bl	ftl_memset
 	ldrh	w4, [x19, 6]
 	mov	x1, 0
-	ldr	x3, [x23, #:lo12:.LANCHOR183]
-	mov	w2, 0
-.L1803:
+	ldr	x3, [x24, #:lo12:.LANCHOR183]
+	mov	w0, 0
+.L1839:
 	cmp	w4, w1, uxth
-	bhi	.L1805
+	bhi	.L1841
+	adrp	x0, .LANCHOR1
+	ldrb	w0, [x0, #:lo12:.LANCHOR1]
+	cbz	w0, .L1842
+	add	x0, x21, :lo12:.LANCHOR202
+	adrp	x1, .LANCHOR57
+	ldrh	w1, [x1, #:lo12:.LANCHOR57]
+	ldr	x0, [x0, 8]
+	bl	js_hash
+	str	w0, [x20, 12]
+.L1842:
 	mov	w2, 1
 	mov	w3, 0
 	mov	w1, w2
-	add	x0, x20, :lo12:.LANCHOR202
+	add	x0, x21, :lo12:.LANCHOR202
 	bl	FlashProgPages
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-	b	.L1800
-.L1805:
-	ldr	w0, [x22, x1, lsl 2]
-	cmp	w21, w0, lsr 10
-	bne	.L1804
-	add	w2, w2, 1
-	and	w2, w2, 65535
-	ubfiz	x0, x2, 1, 16
-	str	w1, [x3, x0, lsl 2]
-	add	x0, x0, 1
-	ldr	w5, [x22, x1, lsl 2]
-	str	w5, [x3, x0, lsl 2]
-.L1804:
+	b	.L1836
+.L1841:
+	ldr	w2, [x23, x1, lsl 2]
+	cmp	w22, w2, lsr 10
+	bne	.L1840
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	ubfiz	x2, x0, 1, 16
+	str	w1, [x3, x2, lsl 2]
+	add	x2, x2, 1
+	ldr	w5, [x23, x1, lsl 2]
+	str	w5, [x3, x2, lsl 2]
+.L1840:
 	add	x1, x1, 1
-	b	.L1803
-.L1810:
+	b	.L1839
+.L1850:
 	mov	w0, 0
 	ret
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
@@ -12460,45 +12728,46 @@ Ftl_write_map_blk_to_last_page:
 FtlMapWritePage:
 	stp	x29, x30, [sp, -112]!
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR165
-	stp	x23, x24, [sp, 48]
-	add	x22, x22, :lo12:.LANCHOR165
+	stp	x19, x20, [sp, 16]
+	mov	w19, 0
 	stp	x25, x26, [sp, 64]
-	mov	w23, w1
+	adrp	x26, .LANCHOR53
 	stp	x27, x28, [sp, 80]
-	adrp	x25, .LANCHOR77
-	add	x27, x25, :lo12:.LANCHOR77
-	stp	x19, x20, [sp, 16]
-	adrp	x24, .LANCHOR54
-	mov	x19, x0
-	mov	w21, 0
-	add	x0, x24, :lo12:.LANCHOR54
-	stp	x0, x2, [x29, 96]
-.L1814:
-	ldr	w0, [x22]
-	ldrh	w1, [x19, 2]
+	mov	w25, w1
+	stp	x21, x22, [sp, 32]
+	mov	x27, x0
+	adrp	x22, .LANCHOR202
+	stp	x23, x24, [sp, 48]
+	mov	x20, x22
+	add	x23, x22, :lo12:.LANCHOR202
+	add	x28, x26, :lo12:.LANCHOR53
+	str	x2, [x29, 104]
+.L1854:
+	adrp	x1, .LANCHOR165
+	ldr	w0, [x1, #:lo12:.LANCHOR165]
 	add	w0, w0, 1
-	str	w0, [x22]
-	ldrh	w0, [x24, #:lo12:.LANCHOR54]
+	str	w0, [x1, #:lo12:.LANCHOR165]
+	ldrh	w0, [x26, #:lo12:.LANCHOR53]
+	ldrh	w1, [x27, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	bge	.L1815
-	ldrh	w1, [x19]
+	bge	.L1855
+	ldrh	w1, [x27]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1816
-.L1815:
-	mov	x0, x19
+	bne	.L1856
+.L1855:
+	mov	x0, x27
 	bl	Ftl_write_map_blk_to_last_page
-.L1816:
-	ldr	w0, [x27]
-	cbnz	w0, .L1829
-	ldrh	w1, [x19]
-	ldr	x0, [x19, 16]
+.L1856:
+	adrp	x21, .LANCHOR76
+	ldr	w0, [x21, #:lo12:.LANCHOR76]
+	cbnz	w0, .L1871
+	ldrh	w1, [x27]
+	ldr	x0, [x27, 16]
 	ldrh	w0, [x0, x1, lsl 1]
-	cbnz	w0, .L1818
-	mov	w2, 757
+	cbnz	w0, .L1858
+	mov	w2, 759
 	adrp	x1, .LANCHOR214
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR214
@@ -12509,12 +12778,12 @@ FtlMapWritePage:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1818:
-	ldrh	w1, [x19]
-	ldrh	w0, [x19, 10]
+.L1858:
+	ldrh	w1, [x27]
+	ldrh	w0, [x27, 10]
 	cmp	w1, w0
-	bcc	.L1819
-	mov	w2, 758
+	bcc	.L1859
+	mov	w2, 760
 	adrp	x1, .LANCHOR214
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR214
@@ -12525,67 +12794,76 @@ FtlMapWritePage:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1819:
-	ldrh	w1, [x19]
-	adrp	x20, .LANCHOR202
-	ldr	x0, [x19, 16]
-	add	x28, x20, :lo12:.LANCHOR202
+.L1859:
+	ldrh	w1, [x27]
+	add	x3, x22, :lo12:.LANCHOR202
+	ldr	x0, [x27, 16]
 	mov	w2, 16
-	ldrh	w26, [x0, x1, lsl 1]
+	str	x3, [x29, 96]
+	ldrh	w24, [x0, x1, lsl 1]
 	mov	w1, 0
-	ldrh	w0, [x19, 2]
-	orr	w0, w0, w26, lsl 10
-	str	w0, [x28, 4]
+	ldrh	w0, [x27, 2]
+	orr	w0, w0, w24, lsl 10
+	str	w0, [x3, 4]
 	ldr	x0, [x29, 104]
-	str	x0, [x28, 8]
+	str	x0, [x3, 8]
 	adrp	x0, .LANCHOR188
 	ldr	x0, [x0, #:lo12:.LANCHOR188]
-	str	x0, [x28, 16]
+	str	x0, [x3, 16]
 	bl	ftl_memset
-	ldr	x0, [x28, 16]
+	ldr	x3, [x29, 96]
+	ldr	w0, [x27, 48]
+	ldr	x6, [x3, 16]
+	str	w0, [x6, 4]
+	ldrh	w0, [x27, 4]
+	strh	w0, [x6]
+	adrp	x0, .LANCHOR1
+	strh	w25, [x6, 8]
+	strh	w24, [x6, 2]
+	ldrb	w0, [x0, #:lo12:.LANCHOR1]
+	cbz	w0, .L1860
+	adrp	x0, .LANCHOR57
+	ldrh	w1, [x0, #:lo12:.LANCHOR57]
+	ldr	x0, [x3, 8]
+	bl	js_hash
+	str	w0, [x6, 12]
+.L1860:
 	mov	w3, 1
-	ldr	w1, [x19, 48]
-	mov	w2, w3
-	str	w1, [x0, 4]
-	ldrh	w1, [x19, 4]
-	strh	w1, [x0]
+	mov	x0, x23
 	mov	w1, w3
-	strh	w23, [x0, 8]
-	strh	w26, [x0, 2]
-	mov	x0, x28
+	mov	w2, w3
 	bl	FlashProgPages
-	ldrh	w0, [x19, 2]
-	ldr	w1, [x20, #:lo12:.LANCHOR202]
+	ldrh	w0, [x27, 2]
+	ldr	w1, [x23]
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	strh	w0, [x19, 2]
+	strh	w0, [x27, 2]
 	cmn	w1, #1
-	bne	.L1820
-	ldr	w1, [x28, 4]
+	bne	.L1861
+	ldr	w1, [x23, 4]
 	adrp	x0, .LC40
 	add	x0, x0, :lo12:.LC40
-	add	w21, w21, 1
-	and	w21, w21, 65535
+	add	w19, w19, 1
+	and	w19, w19, 65535
 	bl	printf
-	ldrh	w0, [x19, 2]
+	ldrh	w0, [x27, 2]
 	cmp	w0, 2
-	bhi	.L1821
-	ldr	x0, [x29, 96]
-	ldrh	w0, [x0]
+	bhi	.L1862
+	ldrh	w0, [x28]
 	sub	w0, w0, #1
-	strh	w0, [x19, 2]
-.L1821:
-	cmp	w21, 3
-	bls	.L1814
+	strh	w0, [x27, 2]
+.L1862:
+	cmp	w19, 3
+	bls	.L1854
 	add	x20, x20, :lo12:.LANCHOR202
-	mov	w2, w21
+	mov	w2, w19
 	adrp	x0, .LC41
 	add	x0, x0, :lo12:.LC41
 	ldr	w1, [x20, 4]
 	bl	printf
 	mov	w0, 1
-	str	w0, [x25, #:lo12:.LANCHOR77]
-.L1829:
+	str	w0, [x21, #:lo12:.LANCHOR76]
+.L1871:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -12594,28 +12872,28 @@ FtlMapWritePage:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1820:
-	cbz	w1, .L1823
-	strh	w26, [x19, 60]
+.L1861:
+	cbz	w1, .L1864
+	strh	w24, [x27, 60]
 	cmp	w0, 1
-	bne	.L1824
-.L1825:
-	str	wzr, [x19, 56]
-	b	.L1814
-.L1824:
+	bne	.L1865
+.L1866:
+	str	wzr, [x27, 56]
+	b	.L1854
+.L1865:
 	cmp	w1, 256
-.L1835:
-	beq	.L1825
-	ldr	w0, [x19, 56]
-	cbnz	w0, .L1825
+.L1879:
+	beq	.L1866
+	ldr	w0, [x27, 56]
+	cbnz	w0, .L1866
 	add	x20, x20, :lo12:.LANCHOR202
-	ldr	x0, [x19, 40]
+	ldr	x0, [x27, 40]
 	ldr	w1, [x20, 4]
-	str	w1, [x0, w23, uxtw 2]
-	b	.L1829
-.L1823:
+	str	w1, [x0, w25, uxtw 2]
+	b	.L1871
+.L1864:
 	cmp	w0, 1
-	b	.L1835
+	b	.L1879
 	.size	FtlMapWritePage, .-FtlMapWritePage
 	.section	.text.flush_l2p_region,"ax",@progbits
 	.align	2
@@ -12625,16 +12903,16 @@ flush_l2p_region:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR97
+	adrp	x20, .LANCHOR96
 	ubfiz	x19, x0, 4, 16
-	ldr	x0, [x20, #:lo12:.LANCHOR97]
+	ldr	x0, [x20, #:lo12:.LANCHOR96]
 	add	x1, x0, x19
 	ldr	x2, [x1, 8]
 	ldrh	w1, [x0, x19]
 	adrp	x0, .LANCHOR127
 	add	x0, x0, :lo12:.LANCHOR127
 	bl	FtlMapWritePage
-	ldr	x0, [x20, #:lo12:.LANCHOR97]
+	ldr	x0, [x20, #:lo12:.LANCHOR96]
 	add	x0, x0, x19
 	ldp	x19, x20, [sp, 16]
 	ldr	w1, [x0, 4]
@@ -12652,32 +12930,32 @@ l2p_flush:
 	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR68
-	add	x20, x20, :lo12:.LANCHOR68
+	adrp	x20, .LANCHOR67
+	add	x20, x20, :lo12:.LANCHOR67
 	str	x21, [sp, 32]
 	mov	w19, 0
-	adrp	x21, .LANCHOR97
-.L1839:
+	adrp	x21, .LANCHOR96
+.L1883:
 	ldrh	w0, [x20]
 	cmp	w0, w19
-	bhi	.L1841
+	bhi	.L1885
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1841:
-	ldr	x1, [x21, #:lo12:.LANCHOR97]
+.L1885:
+	ldr	x1, [x21, #:lo12:.LANCHOR96]
 	ubfiz	x0, x19, 4, 16
 	add	x0, x1, x0
 	ldr	w0, [x0, 4]
-	tbz	w0, #31, .L1840
+	tbz	w0, #31, .L1884
 	mov	w0, w19
 	bl	flush_l2p_region
-.L1840:
+.L1884:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1839
+	b	.L1883
 	.size	l2p_flush, .-l2p_flush
 	.section	.text.FtlVendorPartWrite,"ax",@progbits
 	.align	2
@@ -12697,19 +12975,19 @@ FtlVendorPartWrite:
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	cmp	w1, w0
-	bhi	.L1851
-	adrp	x0, .LANCHOR57
-	adrp	x26, .LANCHOR56
-	adrp	x27, .LANCHOR58
+	bhi	.L1895
+	adrp	x0, .LANCHOR56
+	adrp	x26, .LANCHOR55
+	adrp	x27, .LANCHOR57
 	mov	x25, x2
-	ldrh	w21, [x0, #:lo12:.LANCHOR57]
-	add	x26, x26, :lo12:.LANCHOR56
-	add	x27, x27, :lo12:.LANCHOR58
+	ldrh	w21, [x0, #:lo12:.LANCHOR56]
+	add	x26, x26, :lo12:.LANCHOR55
+	add	x27, x27, :lo12:.LANCHOR57
 	mov	w24, 0
 	lsr	w21, w22, w21
-.L1845:
-	cbnz	w20, .L1850
-.L1843:
+.L1889:
+	cbnz	w20, .L1894
+.L1887:
 	mov	w0, w24
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -12718,7 +12996,7 @@ FtlVendorPartWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1850:
+.L1894:
 	ldrh	w1, [x26]
 	adrp	x0, .LANCHOR194
 	adrp	x28, .LANCHOR185
@@ -12731,9 +13009,9 @@ FtlVendorPartWrite:
 	and	w19, w19, 65535
 	cmp	w20, w19
 	csel	w19, w0, w19, cc
-	cbz	w2, .L1847
+	cbz	w2, .L1891
 	cmp	w19, w1
-	beq	.L1847
+	beq	.L1891
 	ldr	x0, [x28, #:lo12:.LANCHOR185]
 	str	w2, [x29, 124]
 	mov	w2, 1
@@ -12741,7 +13019,7 @@ FtlVendorPartWrite:
 	mov	w1, w2
 	add	x0, x29, 120
 	bl	FlashReadPages
-.L1848:
+.L1892:
 	lsl	w3, w19, 9
 	ldr	x0, [x28, #:lo12:.LANCHOR185]
 	lsl	w23, w23, 7
@@ -12762,16 +13040,16 @@ FtlVendorPartWrite:
 	ldr	w3, [x29, 108]
 	csinv	w24, w24, wzr, ne
 	add	x25, x25, x3, sxtw
-	b	.L1845
-.L1847:
+	b	.L1889
+.L1891:
 	ldrh	w2, [x27]
 	mov	w1, 0
 	ldr	x0, [x28, #:lo12:.LANCHOR185]
 	bl	ftl_memset
-	b	.L1848
-.L1851:
+	b	.L1892
+.L1895:
 	mov	w24, -1
-	b	.L1843
+	b	.L1887
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.section	.text.Ftl_save_ext_data,"ax",@progbits
 	.align	2
@@ -12784,8 +13062,8 @@ Ftl_save_ext_data:
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1856
-	mov	w0, 80
+	bne	.L1900
+	mov	w0, 83
 	mov	w1, 1
 	movk	w0, 0x5000, lsl 16
 	str	w0, [x2, 4]
@@ -12810,8 +13088,8 @@ Ftl_save_ext_data:
 	adrp	x0, .LANCHOR168
 	ldr	w0, [x0, #:lo12:.LANCHOR168]
 	str	w0, [x2, 28]
-	adrp	x0, .LANCHOR80
-	ldr	w0, [x0, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR79
+	ldr	w0, [x0, #:lo12:.LANCHOR79]
 	str	w0, [x2, 32]
 	adrp	x0, .LANCHOR163
 	ldr	w0, [x0, #:lo12:.LANCHOR163]
@@ -12833,7 +13111,7 @@ Ftl_save_ext_data:
 	str	w0, [x2, 64]
 	mov	w0, 0
 	b	FtlVendorPartWrite
-.L1856:
+.L1900:
 	ret
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
 	.section	.text.FtlEctTblFlush,"ax",@progbits
@@ -12843,31 +13121,31 @@ Ftl_save_ext_data:
 FtlEctTblFlush:
 	adrp	x1, .LANCHOR28
 	ldr	w1, [x1, #:lo12:.LANCHOR28]
-	cbz	w1, .L1863
+	cbz	w1, .L1907
 	adrp	x1, .LANCHOR170
 	mov	w2, 4
 	ldr	w1, [x1, #:lo12:.LANCHOR170]
 	cmp	w1, 39
 	mov	w1, 32
 	csel	w1, w1, w2, hi
-.L1859:
+.L1903:
 	adrp	x3, .LANCHOR218
 	ldrh	w2, [x3, #:lo12:.LANCHOR218]
 	cmp	w2, 31
-	bhi	.L1860
+	bhi	.L1904
 	add	w2, w2, 1
 	mov	w1, 1
 	strh	w2, [x3, #:lo12:.LANCHOR218]
-.L1860:
+.L1904:
 	adrp	x2, .LANCHOR191
-	cbnz	w0, .L1861
+	cbnz	w0, .L1905
 	ldr	x0, [x2, #:lo12:.LANCHOR191]
 	ldr	w3, [x0, 20]
 	ldr	w0, [x0, 16]
 	add	w1, w1, w3
 	cmp	w0, w1
-	bcc	.L1866
-.L1861:
+	bcc	.L1910
+.L1905:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	ldr	x2, [x2, #:lo12:.LANCHOR191]
@@ -12890,10 +13168,10 @@ FtlEctTblFlush:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1863:
+.L1907:
 	mov	w1, 32
-	b	.L1859
-.L1866:
+	b	.L1903
+.L1910:
 	mov	w0, 0
 	ret
 	.size	FtlEctTblFlush, .-FtlEctTblFlush
@@ -12911,8 +13189,8 @@ allocate_new_data_superblock:
 	str	x21, [sp, 32]
 	ldrh	w0, [x0, #:lo12:.LANCHOR40]
 	cmp	w0, w20
-	bcs	.L1869
-	mov	w2, 3233
+	bcs	.L1913
+	mov	w2, 3264
 	adrp	x1, .LANCHOR219
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR219
@@ -12923,99 +13201,99 @@ allocate_new_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1869:
-	adrp	x0, .LANCHOR77
-	ldr	w0, [x0, #:lo12:.LANCHOR77]
-	cbnz	w0, .L1870
+.L1913:
+	adrp	x0, .LANCHOR76
+	ldr	w0, [x0, #:lo12:.LANCHOR76]
+	cbnz	w0, .L1914
 	mov	w0, 65535
 	cmp	w20, w0
-	beq	.L1871
-	adrp	x1, .LANCHOR84
+	beq	.L1915
+	adrp	x1, .LANCHOR83
 	ubfiz	x0, x20, 1, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR84]
+	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1872
+	cbz	w0, .L1916
 	mov	w0, w20
 	bl	INSERT_DATA_LIST
-.L1871:
+.L1915:
 	strb	wzr, [x19, 8]
-	adrp	x0, .LANCHOR93
-	add	x0, x0, :lo12:.LANCHOR93
+	adrp	x0, .LANCHOR92
+	add	x0, x0, :lo12:.LANCHOR92
 	cmp	x19, x0
-	beq	.L1873
+	beq	.L1917
 	adrp	x0, .LANCHOR44
 	ldrh	w1, [x0, #:lo12:.LANCHOR44]
 	cmp	w1, 1
-	beq	.L1873
-	adrp	x0, .LANCHOR8
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L1874
-.L1873:
+	beq	.L1917
+	adrp	x0, .LANCHOR15
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	cbz	w0, .L1918
+.L1917:
 	mov	w0, 1
 	strb	w0, [x19, 8]
-.L1875:
+.L1919:
 	adrp	x1, .LANCHOR133
 	mov	w2, 65535
 	mov	x21, x1
 	ldrh	w0, [x1, #:lo12:.LANCHOR133]
 	cmp	w0, w2
-	beq	.L1880
+	beq	.L1924
 	cmp	w20, w0
-	bne	.L1881
-	adrp	x2, .LANCHOR84
+	bne	.L1925
+	adrp	x2, .LANCHOR83
 	ubfiz	x1, x0, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR84]
+	ldr	x2, [x2, #:lo12:.LANCHOR83]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1882
-.L1881:
+	cbz	w1, .L1926
+.L1925:
 	bl	update_vpc_list
-.L1882:
+.L1926:
 	mov	w0, -1
 	strh	w0, [x21, #:lo12:.LANCHOR133]
-.L1880:
+.L1924:
 	mov	x0, x19
 	bl	allocate_data_superblock
 	bl	l2p_flush
 	mov	w0, 0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1870:
+.L1914:
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1872:
+.L1916:
 	mov	w0, w20
 	bl	INSERT_FREE_LIST
-	b	.L1871
-.L1874:
-	adrp	x0, .LANCHOR92
-	add	x2, x0, :lo12:.LANCHOR92
+	b	.L1915
+.L1918:
+	adrp	x0, .LANCHOR91
+	add	x2, x0, :lo12:.LANCHOR91
 	cmp	x19, x2
-	bne	.L1875
+	bne	.L1919
 	cmp	w1, 3
-	beq	.L1877
+	beq	.L1921
 	adrp	x1, .LANCHOR158
 	ldr	w1, [x1, #:lo12:.LANCHOR158]
 	cmp	w1, 1
-	bne	.L1878
-.L1877:
-	add	x1, x0, :lo12:.LANCHOR92
+	bne	.L1922
+.L1921:
+	add	x1, x0, :lo12:.LANCHOR91
 	mov	w2, 1
 	strb	w2, [x1, 8]
-.L1878:
+.L1922:
 	adrp	x1, .LANCHOR28
 	ldr	w1, [x1, #:lo12:.LANCHOR28]
-	cbz	w1, .L1875
+	cbz	w1, .L1919
 	adrp	x1, .LANCHOR170
 	ldr	w1, [x1, #:lo12:.LANCHOR170]
 	cmp	w1, 39
-	bhi	.L1875
-	add	x0, x0, :lo12:.LANCHOR92
+	bhi	.L1919
+	add	x0, x0, :lo12:.LANCHOR91
 	mov	w1, 1
 	strb	w1, [x0, 8]
-	b	.L1875
+	b	.L1919
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
 	.section	.text.FtlVendorPartRead,"ax",@progbits
 	.align	2
@@ -13035,20 +13313,20 @@ FtlVendorPartRead:
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	cmp	w1, w0
-	bhi	.L1905
-	adrp	x0, .LANCHOR57
+	bhi	.L1949
+	adrp	x0, .LANCHOR56
 	adrp	x26, .LANCHOR185
 	mov	x25, x2
 	mov	x28, x26
-	ldrh	w20, [x0, #:lo12:.LANCHOR57]
+	ldrh	w20, [x0, #:lo12:.LANCHOR56]
 	mov	w24, 0
-	adrp	x0, .LANCHOR56
-	add	x0, x0, :lo12:.LANCHOR56
+	adrp	x0, .LANCHOR55
+	add	x0, x0, :lo12:.LANCHOR55
 	str	x0, [x29, 104]
 	lsr	w20, w22, w20
-.L1898:
-	cbnz	w21, .L1904
-.L1896:
+.L1942:
+	cbnz	w21, .L1948
+.L1940:
 	mov	w0, w24
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -13057,7 +13335,7 @@ FtlVendorPartRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1904:
+.L1948:
 	adrp	x0, .LANCHOR194
 	ldr	x0, [x0, #:lo12:.LANCHOR194]
 	ldr	w3, [x0, w20, uxtw 2]
@@ -13071,7 +13349,7 @@ FtlVendorPartRead:
 	cmp	w21, w19
 	csel	w19, w0, w19, cc
 	lsl	w27, w19, 9
-	cbz	w3, .L1900
+	cbz	w3, .L1944
 	ldr	x0, [x26, #:lo12:.LANCHOR185]
 	mov	w2, 1
 	str	w3, [x29, 100]
@@ -13087,7 +13365,7 @@ FtlVendorPartRead:
 	csinv	w24, w24, wzr, ne
 	ldr	w0, [x0, #:lo12:.LANCHOR202]
 	cmp	w0, 256
-	bne	.L1902
+	bne	.L1946
 	mov	w2, w3
 	mov	w1, w20
 	adrp	x0, .LC42
@@ -13098,28 +13376,28 @@ FtlVendorPartRead:
 	mov	w1, w20
 	add	x0, x0, :lo12:.LANCHOR215
 	bl	FtlMapWritePage
-.L1902:
+.L1946:
 	ldr	x1, [x28, #:lo12:.LANCHOR185]
 	lsl	w23, w23, 7
 	mov	w2, w27
 	mov	x0, x25
 	add	x1, x1, x23, sxtw 2
 	bl	ftl_memcpy
-.L1903:
+.L1947:
 	add	w20, w20, 1
 	sub	w21, w21, w19
 	add	w22, w22, w19
 	add	x25, x25, x27, sxtw
-	b	.L1898
-.L1900:
+	b	.L1942
+.L1944:
 	mov	w2, w27
 	mov	w1, 0
 	mov	x0, x25
 	bl	ftl_memset
-	b	.L1903
-.L1905:
+	b	.L1947
+.L1949:
 	mov	w24, -1
-	b	.L1896
+	b	.L1940
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
 	.section	.text.FtlLoadEctTbl,"ax",@progbits
 	.align	2
@@ -13140,7 +13418,7 @@ FtlLoadEctTbl:
 	mov	w0, 17221
 	movk	w0, 0x4254, lsl 16
 	cmp	w1, w0
-	beq	.L1908
+	beq	.L1952
 	adrp	x1, .LC43
 	adrp	x0, .LC7
 	add	x1, x1, :lo12:.LC43
@@ -13151,7 +13429,7 @@ FtlLoadEctTbl:
 	ldrh	w2, [x20, #:lo12:.LANCHOR190]
 	lsl	w2, w2, 9
 	bl	ftl_memset
-.L1908:
+.L1952:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -13176,18 +13454,18 @@ Ftl_load_ext_data:
 	mov	w20, 19539
 	movk	w20, 0x4654, lsl 16
 	cmp	w0, w20
-	beq	.L1911
+	beq	.L1955
 	mov	w2, 512
 	mov	w1, 0
 	mov	x0, x21
 	bl	ftl_memset
 	str	w20, [x19, #:lo12:.LANCHOR138]
-.L1911:
+.L1955:
 	ldr	w1, [x19, #:lo12:.LANCHOR138]
 	add	x0, x19, :lo12:.LANCHOR138
 	cmp	w1, w20
 	adrp	x20, .LANCHOR168
-	bne	.L1912
+	bne	.L1956
 	adrp	x1, .LANCHOR216
 	ldr	w2, [x0, 88]
 	str	w2, [x1, #:lo12:.LANCHOR216]
@@ -13208,8 +13486,8 @@ Ftl_load_ext_data:
 	str	w2, [x1, #:lo12:.LANCHOR165]
 	ldp	w1, w2, [x0, 28]
 	str	w1, [x20, #:lo12:.LANCHOR168]
-	adrp	x1, .LANCHOR80
-	str	w2, [x1, #:lo12:.LANCHOR80]
+	adrp	x1, .LANCHOR79
+	str	w2, [x1, #:lo12:.LANCHOR79]
 	adrp	x1, .LANCHOR163
 	ldr	w2, [x0, 36]
 	str	w2, [x1, #:lo12:.LANCHOR163]
@@ -13225,7 +13503,7 @@ Ftl_load_ext_data:
 	ldr	w1, [x0, 60]
 	adrp	x0, .LANCHOR158
 	str	w1, [x0, #:lo12:.LANCHOR158]
-.L1912:
+.L1956:
 	add	x19, x19, :lo12:.LANCHOR138
 	adrp	x0, .LANCHOR157
 	str	wzr, [x0, #:lo12:.LANCHOR157]
@@ -13233,7 +13511,7 @@ Ftl_load_ext_data:
 	ldr	w1, [x19, 68]
 	movk	w0, 0x1234, lsl 16
 	cmp	w1, w0
-	bne	.L1913
+	bne	.L1957
 	adrp	x0, .LANCHOR28
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR28]
@@ -13242,7 +13520,7 @@ Ftl_load_ext_data:
 	add	x1, x1, :lo12:.LC44
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1913:
+.L1957:
 	adrp	x1, .LANCHOR167
 	adrp	x0, .LANCHOR48
 	ldr	x21, [sp, 32]
@@ -13281,11 +13559,11 @@ ftl_sys_read:
 	.type	FtlMapBlkWriteDumpData, %function
 FtlMapBlkWriteDumpData:
 	ldr	w1, [x0, 56]
-	cbz	w1, .L1931
+	cbz	w1, .L1975
 	stp	x29, x30, [sp, -80]!
-	adrp	x1, .LANCHOR77
+	adrp	x1, .LANCHOR76
 	add	x29, sp, 0
-	ldr	w1, [x1, #:lo12:.LANCHOR77]
+	ldr	w1, [x1, #:lo12:.LANCHOR76]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
@@ -13293,7 +13571,7 @@ FtlMapBlkWriteDumpData:
 	str	x25, [sp, 64]
 	str	wzr, [x0, 56]
 	ldr	x25, [x0, 40]
-	cbnz	w1, .L1917
+	cbnz	w1, .L1961
 	mov	x19, x0
 	adrp	x0, .LANCHOR184
 	adrp	x23, .LANCHOR202
@@ -13305,16 +13583,16 @@ FtlMapBlkWriteDumpData:
 	ldr	x24, [x0, #:lo12:.LANCHOR188]
 	ldrh	w0, [x19, 2]
 	str	x24, [x21, 16]
-	cbz	w0, .L1921
-	adrp	x1, .LANCHOR54
-	ldrh	w1, [x1, #:lo12:.LANCHOR54]
+	cbz	w0, .L1965
+	adrp	x1, .LANCHOR53
+	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	sub	w1, w1, #1
 	cmp	w0, w1
-	bge	.L1921
+	bge	.L1965
 	ldrh	w1, [x19]
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L1921
+	beq	.L1965
 	ldr	x2, [x19, 16]
 	ubfiz	x1, x1, 1, 16
 	sub	w0, w0, #1
@@ -13327,16 +13605,16 @@ FtlMapBlkWriteDumpData:
 	bl	FlashReadPages
 	ldr	w0, [x23, #:lo12:.LANCHOR202]
 	cmn	w0, #1
-	beq	.L1921
+	beq	.L1965
 	ldrh	w1, [x24, 8]
 	ldr	x2, [x19, 40]
 	ubfiz	x0, x1, 2, 16
 	ldr	w2, [x2, x0]
 	ldr	w0, [x21, 4]
 	cmp	w2, w0
-	bne	.L1921
+	bne	.L1965
 	ldr	x2, [x21, 8]
-.L1934:
+.L1978:
 	mov	x0, x19
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -13344,37 +13622,37 @@ FtlMapBlkWriteDumpData:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	b	FtlMapWritePage
-.L1921:
+.L1965:
 	sub	w20, w20, #1
 	and	w20, w20, 65535
 	ubfiz	x0, x20, 2, 16
 	ldr	w1, [x25, x0]
 	add	x0, x22, :lo12:.LANCHOR202
 	str	w1, [x0, 4]
-	cbz	w1, .L1922
+	cbz	w1, .L1966
 	mov	w2, 1
 	mov	w1, w2
 	bl	FlashReadPages
-.L1923:
+.L1967:
 	add	x22, x22, :lo12:.LANCHOR202
 	mov	w1, w20
 	ldr	x2, [x22, 8]
-	b	.L1934
-.L1922:
-	adrp	x1, .LANCHOR58
+	b	.L1978
+.L1966:
+	adrp	x1, .LANCHOR57
 	ldr	x0, [x0, 8]
-	ldrh	w2, [x1, #:lo12:.LANCHOR58]
+	ldrh	w2, [x1, #:lo12:.LANCHOR57]
 	mov	w1, 255
 	bl	ftl_memset
-	b	.L1923
-.L1917:
+	b	.L1967
+.L1961:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1931:
+.L1975:
 	ret
 	.size	FtlMapBlkWriteDumpData, .-FtlMapBlkWriteDumpData
 	.section	.text.FtlScanSysBlk,"ax",@progbits
@@ -13388,39 +13666,39 @@ FtlScanSysBlk:
 	stp	x25, x26, [sp, 64]
 	adrp	x25, .LANCHOR130
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR65
+	adrp	x21, .LANCHOR64
 	ldr	x0, [x25, #:lo12:.LANCHOR130]
 	adrp	x22, .LANCHOR193
-	ldr	w2, [x21, #:lo12:.LANCHOR65]
+	ldr	w2, [x21, #:lo12:.LANCHOR64]
 	stp	x19, x20, [sp, 16]
 	adrp	x20, .LANCHOR128
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR71
+	adrp	x23, .LANCHOR70
 	stp	x27, x28, [sp, 80]
 	adrp	x27, .LANCHOR129
 	lsl	w2, w2, 2
 	strh	wzr, [x20, #:lo12:.LANCHOR128]
-	strh	wzr, [x23, #:lo12:.LANCHOR71]
+	strh	wzr, [x23, #:lo12:.LANCHOR70]
 	bl	ftl_memset
 	ldr	x0, [x27, #:lo12:.LANCHOR129]
 	mov	w1, 0
-	ldr	w2, [x21, #:lo12:.LANCHOR65]
-	adrp	x19, .LANCHOR62
-	adrp	x28, .LANCHOR72
+	ldr	w2, [x21, #:lo12:.LANCHOR64]
+	adrp	x19, .LANCHOR61
+	adrp	x28, .LANCHOR71
 	adrp	x24, .LANCHOR209
 	lsl	w2, w2, 1
 	bl	ftl_memset
 	ldr	x0, [x22, #:lo12:.LANCHOR193]
 	mov	w1, 0
-	ldrh	w2, [x19, #:lo12:.LANCHOR62]
+	ldrh	w2, [x19, #:lo12:.LANCHOR61]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	ldr	x0, [x28, #:lo12:.LANCHOR72]
+	ldr	x0, [x28, #:lo12:.LANCHOR71]
 	mov	w1, 0
-	ldrh	w2, [x19, #:lo12:.LANCHOR62]
+	ldrh	w2, [x19, #:lo12:.LANCHOR61]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	mov	w2, 12
+	mov	w2, 16
 	mov	w1, 255
 	add	x0, x24, :lo12:.LANCHOR209
 	bl	ftl_memset
@@ -13435,35 +13713,35 @@ FtlScanSysBlk:
 	adrp	x0, .LANCHOR159
 	add	x0, x0, :lo12:.LANCHOR159
 	str	x0, [x29, 112]
-.L1936:
+.L1980:
 	ldr	x0, [x29, 120]
 	ldr	w1, [x29, 172]
 	ldrh	w0, [x0]
 	cmp	w0, w1
-	bls	.L1977
+	bls	.L2021
 	adrp	x0, .LANCHOR38
 	adrp	x25, .LANCHOR180
 	adrp	x6, .LANCHOR47
 	mov	x5, 0
 	ldrh	w13, [x0, #:lo12:.LANCHOR38]
-	adrp	x0, .LANCHOR105
+	adrp	x0, .LANCHOR104
 	ldr	x7, [x25, #:lo12:.LANCHOR180]
 	mov	w22, 0
-	ldr	x12, [x0, #:lo12:.LANCHOR105]
-	adrp	x0, .LANCHOR106
+	ldr	x12, [x0, #:lo12:.LANCHOR104]
+	adrp	x0, .LANCHOR105
 	add	x6, x6, :lo12:.LANCHOR47
 	mov	w8, 56
-	ldr	x11, [x0, #:lo12:.LANCHOR106]
-	adrp	x0, .LANCHOR59
-	ldrh	w10, [x0, #:lo12:.LANCHOR59]
-	b	.L1978
-.L1938:
+	ldr	x11, [x0, #:lo12:.LANCHOR105]
+	adrp	x0, .LANCHOR58
+	ldrh	w10, [x0, #:lo12:.LANCHOR58]
+	b	.L2022
+.L1982:
 	ldrh	w1, [x29, 172]
 	ldrb	w0, [x6, x5]
 	bl	V2P_block
 	and	w4, w0, 65535
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L1937
+	cbnz	w0, .L1981
 	umaddl	x1, w22, w8, x7
 	lsl	w4, w4, 10
 	mul	w0, w22, w10
@@ -13473,19 +13751,19 @@ FtlScanSysBlk:
 	str	w4, [x1, 4]
 	add	x0, x11, x0, sxtw 2
 	stp	x12, x0, [x1, 8]
-.L1937:
+.L1981:
 	add	x5, x5, 1
-.L1978:
+.L2022:
 	cmp	w13, w5, uxth
-	bhi	.L1938
-	cbnz	w22, .L1939
-.L1976:
+	bhi	.L1982
+	cbnz	w22, .L1983
+.L2020:
 	ldr	w0, [x29, 172]
 	add	w26, w0, 1
 	and	w0, w26, 65535
 	str	w0, [x29, 172]
-	b	.L1936
-.L1939:
+	b	.L1980
+.L1983:
 	mov	w1, w22
 	mov	w2, 1
 	mov	x0, x7
@@ -13497,7 +13775,7 @@ FtlScanSysBlk:
 	adrp	x0, .LANCHOR220
 	add	x0, x0, :lo12:.LANCHOR220
 	str	x0, [x29, 136]
-.L1975:
+.L2019:
 	ldr	x0, [x25, #:lo12:.LANCHOR180]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
@@ -13505,10 +13783,10 @@ FtlScanSysBlk:
 	cmn	w0, #1
 	ldr	x27, [x1, 16]
 	ubfx	x26, x3, 10, 16
-	bne	.L1942
+	bne	.L1986
 	mov	w5, 16
 	mov	w7, 65535
-.L1944:
+.L1988:
 	ldr	x0, [x25, #:lo12:.LANCHOR180]
 	add	x6, x25, :lo12:.LANCHOR180
 	mov	w2, 1
@@ -13526,71 +13804,71 @@ FtlScanSysBlk:
 	ldr	w5, [x29, 168]
 	cmp	w0, w7
 	ldr	x6, [x29, 104]
-	bne	.L1941
+	bne	.L1985
 	ldr	x0, [x6]
 	mov	w1, -1
 	str	w1, [x0, x22]
 	ldr	x0, [x6]
 	ldr	w0, [x0, x22]
 	cmp	w0, w1
-	beq	.L2014
-.L1942:
+	beq	.L2058
+.L1986:
 	adrp	x0, .LANCHOR159
 	ldr	w1, [x0, #:lo12:.LANCHOR159]
 	ldr	w0, [x27, 4]
 	cmn	w1, #1
-	beq	.L1945
+	beq	.L1989
 	cmp	w1, w0
-	bhi	.L1946
-.L1945:
+	bhi	.L1990
+.L1989:
 	cmn	w0, #1
-	beq	.L1946
+	beq	.L1990
 	ldr	x2, [x29, 112]
 	add	w1, w0, 1
 	str	w1, [x2]
-.L1946:
+.L1990:
 	ldrh	w1, [x27]
 	mov	w2, 61604
 	cmp	w1, w2
-	beq	.L1948
-	bhi	.L1949
+	beq	.L1992
+	bhi	.L1993
 	mov	w0, 61574
 	cmp	w1, w0
-	beq	.L1950
-.L1947:
+	beq	.L1994
+.L1991:
 	ldr	x0, [x29, 128]
 	add	x22, x22, 56
 	cmp	x0, x22
-	bne	.L1975
-	b	.L1976
-.L1941:
+	bne	.L2019
+	b	.L2020
+.L1985:
 	ldr	x0, [x25, #:lo12:.LANCHOR180]
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	bne	.L1942
+	bne	.L1986
 	sub	w5, w5, #1
 	ands	w5, w5, 65535
-	bne	.L1944
-.L2014:
+	bne	.L1988
+.L2058:
 	mov	w1, 0
 	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-	b	.L1947
-.L1949:
+	b	.L1991
+.L1993:
 	mov	w0, 61634
 	cmp	w1, w0
-	beq	.L1951
+	beq	.L1995
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L2014
-	b	.L1947
-.L1951:
+	beq	.L2058
+	b	.L1991
+.L1995:
 	ldrh	w1, [x20, #:lo12:.LANCHOR128]
-	ldr	w0, [x21, #:lo12:.LANCHOR65]
+	ldr	w0, [x21, #:lo12:.LANCHOR64]
 	cmp	w1, w0
-	bls	.L1953
+	bls	.L1997
 	ldr	x1, [x29, 136]
-	mov	w2, 1297
+	mov	w2, 1305
 	adrp	x0, .LC5
 	add	x0, x0, :lo12:.LC5
 	bl	printf
@@ -13599,8 +13877,8 @@ FtlScanSysBlk:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1953:
-	ldr	w6, [x21, #:lo12:.LANCHOR65]
+.L1997:
+	ldr	w6, [x21, #:lo12:.LANCHOR64]
 	ldr	x3, [x29, 152]
 	ldrh	w1, [x20, #:lo12:.LANCHOR128]
 	and	w2, w6, 65535
@@ -13610,53 +13888,53 @@ FtlScanSysBlk:
 	sub	w2, w2, #1
 	ldr	x5, [x3, #:lo12:.LANCHOR130]
 	sxth	w2, w2
-.L1954:
+.L1998:
 	cmp	w0, w2
-	bgt	.L1960
-	tbz	w0, #31, .L1995
-	b	.L1947
-.L1960:
+	bgt	.L2004
+	tbz	w0, #31, .L2039
+	b	.L1991
+.L2004:
 	sxtw	x8, w0
 	ldr	w11, [x27, 4]
 	lsl	x7, x8, 2
 	add	x10, x5, x7
 	ldr	w7, [x5, x7]
 	cmp	w11, w7
-	bls	.L1955
+	bls	.L1999
 	ldr	w2, [x5]
-	cbnz	w2, .L1956
+	cbnz	w2, .L2000
 	cmp	w6, w1
-	beq	.L1956
+	beq	.L2000
 	add	w1, w1, 1
 	strh	w1, [x20, #:lo12:.LANCHOR128]
-.L1956:
+.L2000:
 	ldr	x1, [x29, 160]
 	ldr	x6, [x1, #:lo12:.LANCHOR129]
 	mov	w1, 0
-.L1957:
+.L2001:
 	cmp	w1, w0
-	bne	.L1958
+	bne	.L2002
 	ldr	w1, [x27, 4]
 	str	w1, [x10]
 	strh	w26, [x6, x8, lsl 1]
-	tbnz	w0, #31, .L1947
+	tbnz	w0, #31, .L1991
 	ldrh	w1, [x20, #:lo12:.LANCHOR128]
-	ldr	w2, [x21, #:lo12:.LANCHOR65]
+	ldr	w2, [x21, #:lo12:.LANCHOR64]
 	sub	w2, w2, w1
 	sub	w2, w2, #1
 	cmp	w0, w2, sxth
-	bgt	.L1947
-.L1995:
+	bgt	.L1991
+.L2039:
 	add	w1, w1, 1
 	strh	w1, [x20, #:lo12:.LANCHOR128]
 	ldr	w1, [x27, 4]
 	str	w1, [x5, x0, lsl 2]
 	ldr	x1, [x29, 160]
 	ldr	x1, [x1, #:lo12:.LANCHOR129]
-.L2013:
+.L2057:
 	strh	w26, [x1, x0, lsl 1]
-	b	.L1947
-.L1958:
+	b	.L1991
+.L2002:
 	sxtw	x2, w1
 	add	w1, w1, 1
 	lsl	x7, x2, 2
@@ -13668,18 +13946,18 @@ FtlScanSysBlk:
 	add	x7, x6, x2
 	ldrh	w7, [x7, 2]
 	strh	w7, [x6, x2]
-	b	.L1957
-.L1955:
+	b	.L2001
+.L1999:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L1954
-.L1950:
-	ldrh	w1, [x23, #:lo12:.LANCHOR71]
-	ldrh	w0, [x19, #:lo12:.LANCHOR62]
+	b	.L1998
+.L1994:
+	ldrh	w1, [x23, #:lo12:.LANCHOR70]
+	ldrh	w0, [x19, #:lo12:.LANCHOR61]
 	cmp	w1, w0
-	bls	.L1963
+	bls	.L2007
 	ldr	x1, [x29, 136]
-	mov	w2, 1344
+	mov	w2, 1352
 	adrp	x0, .LC5
 	add	x0, x0, :lo12:.LC5
 	bl	printf
@@ -13688,54 +13966,54 @@ FtlScanSysBlk:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1963:
-	ldrh	w6, [x19, #:lo12:.LANCHOR62]
-	ldrh	w2, [x23, #:lo12:.LANCHOR71]
+.L2007:
+	ldrh	w6, [x19, #:lo12:.LANCHOR61]
+	ldrh	w2, [x23, #:lo12:.LANCHOR70]
 	sub	w1, w6, #1
 	sxth	x0, w1
 	sub	w5, w1, w2
 	ldr	x1, [x29, 144]
 	ldr	x1, [x1, #:lo12:.LANCHOR193]
-.L1964:
+.L2008:
 	cmp	w0, w5
-	ble	.L1969
+	ble	.L2013
 	sxtw	x7, w0
 	ldr	w11, [x27, 4]
 	lsl	x8, x7, 2
 	add	x10, x1, x8
 	ldr	w8, [x1, x8]
 	cmp	w11, w8
-	bls	.L1965
+	bls	.L2009
 	ldr	w5, [x1]
-	cbnz	w5, .L1966
+	cbnz	w5, .L2010
 	cmp	w6, w2
-	beq	.L1966
+	beq	.L2010
 	add	w2, w2, 1
-	strh	w2, [x23, #:lo12:.LANCHOR71]
-.L1966:
-	ldr	x6, [x28, #:lo12:.LANCHOR72]
+	strh	w2, [x23, #:lo12:.LANCHOR70]
+.L2010:
+	ldr	x6, [x28, #:lo12:.LANCHOR71]
 	mov	w2, 0
-.L1967:
+.L2011:
 	cmp	w2, w0
-	bne	.L1968
+	bne	.L2012
 	ldr	w2, [x27, 4]
 	str	w2, [x10]
 	strh	w26, [x6, x7, lsl 1]
-.L1969:
-	tbnz	w0, #31, .L1947
-	ldrh	w2, [x19, #:lo12:.LANCHOR62]
-	ldrh	w5, [x23, #:lo12:.LANCHOR71]
+.L2013:
+	tbnz	w0, #31, .L1991
+	ldrh	w2, [x19, #:lo12:.LANCHOR61]
+	ldrh	w5, [x23, #:lo12:.LANCHOR70]
 	sub	w2, w2, #1
 	sub	w2, w2, w5
 	cmp	w0, w2, sxth
-	bgt	.L1947
+	bgt	.L1991
 	add	w5, w5, 1
 	ldr	w2, [x27, 4]
-	strh	w5, [x23, #:lo12:.LANCHOR71]
+	strh	w5, [x23, #:lo12:.LANCHOR70]
 	str	w2, [x1, x0, lsl 2]
-	ldr	x1, [x28, #:lo12:.LANCHOR72]
-	b	.L2013
-.L1968:
+	ldr	x1, [x28, #:lo12:.LANCHOR71]
+	b	.L2057
+.L2012:
 	sxtw	x5, w2
 	add	w2, w2, 1
 	lsl	x8, x5, 2
@@ -13747,55 +14025,55 @@ FtlScanSysBlk:
 	add	x8, x6, x5
 	ldrh	w8, [x8, 2]
 	strh	w8, [x6, x5]
-	b	.L1967
-.L1965:
+	b	.L2011
+.L2009:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L1964
-.L1948:
+	b	.L2008
+.L1992:
 	ldrh	w5, [x24, #:lo12:.LANCHOR209]
 	mov	w1, 65535
 	add	x2, x24, :lo12:.LANCHOR209
 	cmp	w5, w1
-	bne	.L1971
+	bne	.L2015
 	strh	w26, [x24, #:lo12:.LANCHOR209]
 	str	w0, [x2, 8]
-	b	.L1947
-.L1971:
+	b	.L1991
+.L2015:
 	ldrh	w0, [x2, 4]
 	cmp	w0, w1
-	beq	.L1972
+	beq	.L2016
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.L1972:
+.L2016:
 	add	x0, x24, :lo12:.LANCHOR209
 	ldr	w1, [x27, 4]
 	ldr	w2, [x0, 8]
 	cmp	w2, w1
-	bcs	.L1973
+	bcs	.L2017
 	ldrh	w2, [x24, #:lo12:.LANCHOR209]
 	strh	w2, [x0, 4]
 	strh	w26, [x24, #:lo12:.LANCHOR209]
 	str	w1, [x0, 8]
-	b	.L1947
-.L1973:
+	b	.L1991
+.L2017:
 	strh	w26, [x0, 4]
-	b	.L1947
-.L1977:
+	b	.L1991
+.L2021:
 	ldr	x0, [x29, 160]
 	ldr	x2, [x0, #:lo12:.LANCHOR129]
 	ldrh	w0, [x2]
-	cbz	w0, .L1979
-.L1982:
-	ldr	x1, [x28, #:lo12:.LANCHOR72]
+	cbz	w0, .L2023
+.L2026:
+	ldr	x1, [x28, #:lo12:.LANCHOR71]
 	ldrh	w0, [x1]
-	cbz	w0, .L1980
-.L1981:
+	cbz	w0, .L2024
+.L2025:
 	ldrh	w1, [x20, #:lo12:.LANCHOR128]
-	ldr	w0, [x21, #:lo12:.LANCHOR65]
+	ldr	w0, [x21, #:lo12:.LANCHOR64]
 	cmp	w1, w0
-	bls	.L2011
-	mov	w2, 1478
+	bls	.L2055
+	mov	w2, 1486
 	adrp	x1, .LANCHOR220
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR220
@@ -13806,7 +14084,7 @@ FtlScanSysBlk:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2011:
+.L2055:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -13815,24 +14093,24 @@ FtlScanSysBlk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1979:
+.L2023:
 	ldrh	w0, [x20, #:lo12:.LANCHOR128]
-	cbz	w0, .L1982
-	ldr	w1, [x21, #:lo12:.LANCHOR65]
+	cbz	w0, .L2026
+	ldr	w1, [x21, #:lo12:.LANCHOR64]
 	mov	w0, 0
-.L1983:
+.L2027:
 	cmp	w0, w1
-	bcs	.L1982
+	bcs	.L2026
 	ldrh	w3, [x2, w0, sxtw 1]
-	cbz	w3, .L1984
+	cbz	w3, .L2028
 	ldr	x1, [x29, 152]
-	add	x7, x21, :lo12:.LANCHOR65
+	add	x7, x21, :lo12:.LANCHOR64
 	ldr	x4, [x1, #:lo12:.LANCHOR130]
 	mov	w1, w0
-.L1985:
+.L2029:
 	ldr	w3, [x7]
 	cmp	w1, w3
-	bcs	.L1982
+	bcs	.L2026
 	sxtw	x6, w1
 	sub	w3, w1, w0
 	lsl	x5, x6, 1
@@ -13844,29 +14122,29 @@ FtlScanSysBlk:
 	strh	w8, [x2, x3, lsl 1]
 	str	w6, [x4, x3, lsl 2]
 	strh	wzr, [x2, x5]
-	b	.L1985
-.L1984:
+	b	.L2029
+.L2028:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L1983
-.L1980:
-	ldrh	w0, [x23, #:lo12:.LANCHOR71]
-	cbz	w0, .L1981
-	ldrh	w2, [x19, #:lo12:.LANCHOR62]
+	b	.L2027
+.L2024:
+	ldrh	w0, [x23, #:lo12:.LANCHOR70]
+	cbz	w0, .L2025
+	ldrh	w2, [x19, #:lo12:.LANCHOR61]
 	mov	w0, 0
-.L1990:
+.L2034:
 	mov	w6, w0
 	cmp	w0, w2
-	bge	.L1981
+	bge	.L2025
 	ldrh	w3, [x1, w0, sxtw 1]
-	cbz	w3, .L1991
+	cbz	w3, .L2035
 	ldr	x2, [x29, 144]
-	add	x19, x19, :lo12:.LANCHOR62
+	add	x19, x19, :lo12:.LANCHOR61
 	ldr	x3, [x2, #:lo12:.LANCHOR193]
-.L1992:
+.L2036:
 	ldrh	w2, [x19]
 	cmp	w0, w2
-	bge	.L1981
+	bge	.L2025
 	sxtw	x5, w0
 	sub	w2, w0, w6
 	lsl	x4, x5, 1
@@ -13878,67 +14156,69 @@ FtlScanSysBlk:
 	strh	w7, [x1, x2, lsl 1]
 	str	w5, [x3, x2, lsl 2]
 	strh	wzr, [x1, x4]
-	b	.L1992
-.L1991:
+	b	.L2036
+.L2035:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L1990
+	b	.L2034
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
 	.section	.text.FtlLoadSysInfo,"ax",@progbits
 	.align	2
 	.global	FtlLoadSysInfo
 	.type	FtlLoadSysInfo, %function
 FtlLoadSysInfo:
-	stp	x29, x30, [sp, -96]!
-	mov	w1, 0
+	stp	x29, x30, [sp, -112]!
 	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR183
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR202
-	stp	x23, x24, [sp, 48]
-	add	x20, x19, :lo12:.LANCHOR202
-	adrp	x24, .LANCHOR183
+	add	x0, x19, :lo12:.LANCHOR202
 	stp	x25, x26, [sp, 64]
-	adrp	x26, .LANCHOR188
+	adrp	x25, .LANCHOR188
 	stp	x21, x22, [sp, 32]
 	stp	x27, x28, [sp, 80]
-	adrp	x25, .LANCHOR84
-	ldr	x0, [x24, #:lo12:.LANCHOR183]
+	adrp	x24, .LANCHOR83
+	ldr	x1, [x23, #:lo12:.LANCHOR183]
 	adrp	x22, .LANCHOR40
-	str	x0, [x20, 8]
+	str	x1, [x0, 8]
 	adrp	x21, .LANCHOR209
-	ldr	x0, [x26, #:lo12:.LANCHOR188]
-	str	x0, [x20, 16]
-	ldr	x0, [x25, #:lo12:.LANCHOR84]
+	ldr	x1, [x25, #:lo12:.LANCHOR188]
+	str	x1, [x0, 16]
+	ldr	x0, [x24, #:lo12:.LANCHOR83]
+	mov	w1, 0
 	ldrh	w2, [x22, #:lo12:.LANCHOR40]
 	lsl	w2, w2, 1
 	bl	ftl_memset
 	ldrh	w0, [x21, #:lo12:.LANCHOR209]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L2016
-.L2025:
+	bne	.L2060
+.L2072:
 	mov	w0, -1
-.L2015:
+.L2059:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 96
+	ldp	x29, x30, [sp], 112
 	ret
-.L2016:
-	add	x27, x21, :lo12:.LANCHOR209
+.L2060:
+	add	x26, x21, :lo12:.LANCHOR209
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
-	sxth	w23, w0
+	ldrsh	w28, [x21, #:lo12:.LANCHOR209]
+	sxth	w20, w0
+	adrp	x27, .LANCHOR57
 	add	w0, w0, 1
-	mov	w28, 61604
-	strh	w0, [x27, 2]
-	mov	w27, 19539
-	movk	w27, 0x4654, lsl 16
-.L2018:
-	tbz	w23, #31, .L2021
-	mov	w2, 1538
+	add	x27, x27, :lo12:.LANCHOR57
+	strh	w0, [x26, 2]
+	adrp	x26, .LANCHOR1
+	add	x26, x26, :lo12:.LANCHOR1
+.L2062:
+	tbz	w20, #31, .L2068
+	mov	w2, 1555
 	adrp	x1, .LANCHOR221
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR221
@@ -13949,14 +14229,67 @@ FtlLoadSysInfo:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2020:
-	adrp	x1, .LANCHOR58
+	b	.L2067
+.L2068:
+	add	x3, x19, :lo12:.LANCHOR202
+	orr	w0, w20, w28, lsl 10
+	mov	w2, 1
+	str	x3, [x29, 104]
+	mov	w1, w2
+	str	w0, [x3, 4]
+	ldr	x0, [x23, #:lo12:.LANCHOR183]
+	str	x0, [x3, 8]
+	mov	x0, x3
+	bl	FlashReadPages
+	ldrb	w0, [x26]
+	cbz	w0, .L2063
+	ldr	x3, [x29, 104]
+	ldr	x0, [x3, 16]
+	ldr	w6, [x0, 12]
+	cbz	w6, .L2063
+	ldrh	w1, [x27]
+	ldr	x0, [x3, 8]
+	bl	js_hash
+	cmp	w6, w0
+	beq	.L2063
+	cbnz	w20, .L2064
+	add	x0, x21, :lo12:.LANCHOR209
+	ldrh	w0, [x0, 4]
+	cmp	w28, w0
+	beq	.L2064
+	sxth	w28, w0
+	adrp	x0, .LANCHOR53
+	ldrh	w20, [x0, #:lo12:.LANCHOR53]
+.L2066:
+	sub	w20, w20, #1
+	sxth	w20, w20
+	b	.L2062
+.L2064:
+	mov	w0, -1
+	str	w0, [x19, #:lo12:.LANCHOR202]
+.L2063:
+	ldr	w0, [x19, #:lo12:.LANCHOR202]
+	cmn	w0, #1
+	beq	.L2066
+	ldr	x0, [x23, #:lo12:.LANCHOR183]
+	mov	w1, 19539
+	movk	w1, 0x4654, lsl 16
+	ldr	w0, [x0]
+	cmp	w0, w1
+	bne	.L2066
+	ldr	x0, [x25, #:lo12:.LANCHOR188]
+	ldrh	w1, [x0]
+	mov	w0, 61604
+	cmp	w1, w0
+	bne	.L2066
+.L2067:
+	adrp	x1, .LANCHOR57
 	ldrh	w0, [x22, #:lo12:.LANCHOR40]
-	ldrh	w1, [x1, #:lo12:.LANCHOR58]
+	ldrh	w1, [x1, #:lo12:.LANCHOR57]
 	add	x0, x0, 24
 	cmp	x1, x0, lsl 1
-	bcs	.L2023
-	mov	w2, 1540
+	bcs	.L2070
+	mov	w2, 1557
 	adrp	x1, .LANCHOR221
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR221
@@ -13967,14 +14300,14 @@ FtlLoadSysInfo:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2023:
+.L2070:
 	add	x19, x19, :lo12:.LANCHOR202
 	mov	w2, 48
-	adrp	x20, .LANCHOR81
-	add	x0, x20, :lo12:.LANCHOR81
+	adrp	x20, .LANCHOR80
+	add	x0, x20, :lo12:.LANCHOR80
 	ldr	x1, [x19, 8]
 	bl	ftl_memcpy
-	ldr	x0, [x25, #:lo12:.LANCHOR84]
+	ldr	x0, [x24, #:lo12:.LANCHOR83]
 	ldrh	w2, [x22, #:lo12:.LANCHOR40]
 	ldr	x1, [x19, 8]
 	lsl	w2, w2, 1
@@ -13991,12 +14324,12 @@ FtlLoadSysInfo:
 	adrp	x0, .LANCHOR0
 	ldr	x0, [x0, #:lo12:.LANCHOR0]
 	bl	ftl_memcpy
-	adrp	x0, .LANCHOR70
-	ldrh	w0, [x0, #:lo12:.LANCHOR70]
-	cbz	w0, .L2024
+	adrp	x0, .LANCHOR69
+	ldrh	w0, [x0, #:lo12:.LANCHOR69]
+	cbz	w0, .L2071
 	ldrh	w1, [x22, #:lo12:.LANCHOR40]
-	adrp	x0, .LANCHOR67
-	ldrh	w2, [x0, #:lo12:.LANCHOR67]
+	adrp	x0, .LANCHOR66
+	ldrh	w2, [x0, #:lo12:.LANCHOR66]
 	lsr	w0, w1, 3
 	add	w1, w0, w1, lsl 1
 	ldr	x0, [x19, 8]
@@ -14007,13 +14340,13 @@ FtlLoadSysInfo:
 	adrp	x0, .LANCHOR195
 	ldr	x0, [x0, #:lo12:.LANCHOR195]
 	bl	ftl_memcpy
-.L2024:
-	ldr	w2, [x20, #:lo12:.LANCHOR81]
+.L2071:
+	ldr	w2, [x20, #:lo12:.LANCHOR80]
 	mov	w1, 19539
 	movk	w1, 0x4654, lsl 16
-	add	x0, x20, :lo12:.LANCHOR81
+	add	x0, x20, :lo12:.LANCHOR80
 	cmp	w2, w1
-	bne	.L2025
+	bne	.L2072
 	add	x21, x21, :lo12:.LANCHOR209
 	ldrh	w1, [x0, 8]
 	ldrb	w2, [x0, 10]
@@ -14021,33 +14354,33 @@ FtlLoadSysInfo:
 	strh	w1, [x21, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR45]
 	cmp	w2, w0
-	bne	.L2025
+	bne	.L2072
 	adrp	x0, .LANCHOR222
-	adrp	x2, .LANCHOR73
+	adrp	x2, .LANCHOR72
 	adrp	x3, .LANCHOR38
 	str	w1, [x0, #:lo12:.LANCHOR222]
-	adrp	x0, .LANCHOR53
+	adrp	x0, .LANCHOR52
 	ldrh	w3, [x3, #:lo12:.LANCHOR38]
-	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	mul	w0, w0, w1
-	str	w0, [x2, #:lo12:.LANCHOR73]
-	adrp	x2, .LANCHOR56
-	ldrh	w2, [x2, #:lo12:.LANCHOR56]
+	str	w0, [x2, #:lo12:.LANCHOR72]
+	adrp	x2, .LANCHOR55
+	ldrh	w2, [x2, #:lo12:.LANCHOR55]
 	mul	w0, w2, w0
-	adrp	x2, .LANCHOR69
-	str	w0, [x2, #:lo12:.LANCHOR69]
+	adrp	x2, .LANCHOR68
+	str	w0, [x2, #:lo12:.LANCHOR68]
 	adrp	x0, .LANCHOR42
 	ldr	w2, [x0, #:lo12:.LANCHOR42]
-	adrp	x0, .LANCHOR75+6
-	ldrh	w0, [x0, #:lo12:.LANCHOR75+6]
+	adrp	x0, .LANCHOR74+6
+	ldrh	w0, [x0, #:lo12:.LANCHOR74+6]
 	cmp	w1, w2
 	sub	w0, w2, w0
 	sub	w0, w0, w1
 	udiv	w0, w0, w3
 	adrp	x3, .LANCHOR223
 	strh	w0, [x3, #:lo12:.LANCHOR223]
-	bls	.L2026
-	mov	w2, 1567
+	bls	.L2073
+	mov	w2, 1584
 	adrp	x1, .LANCHOR221
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR221
@@ -14058,136 +14391,111 @@ FtlLoadSysInfo:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2026:
-	add	x1, x20, :lo12:.LANCHOR81
-	adrp	x0, .LANCHOR92
-	add	x3, x0, :lo12:.LANCHOR92
-	adrp	x19, .LANCHOR204
-	ldrh	w2, [x1, 16]
-	ldrh	w6, [x1, 14]
-	strh	w6, [x0, #:lo12:.LANCHOR92]
-	lsr	w4, w2, 6
-	and	w2, w2, 63
-	strb	w2, [x3, 6]
-	ldrb	w2, [x1, 11]
-	strb	w2, [x3, 8]
-	add	x2, x19, :lo12:.LANCHOR204
-	strh	w4, [x3, 2]
-	mov	w3, -1
-	strh	w3, [x19, #:lo12:.LANCHOR204]
-	strh	wzr, [x2, 2]
-	strb	wzr, [x2, 6]
-	strb	wzr, [x2, 8]
+.L2073:
+	add	x4, x20, :lo12:.LANCHOR80
+	adrp	x0, .LANCHOR91
+	add	x2, x0, :lo12:.LANCHOR91
+	adrp	x5, .LANCHOR204
+	adrp	x19, .LANCHOR92
+	mov	x22, x5
+	ldrh	w1, [x4, 16]
+	ldrh	w6, [x4, 14]
+	strh	w6, [x0, #:lo12:.LANCHOR91]
+	lsr	w3, w1, 6
+	and	w1, w1, 63
+	strb	w1, [x2, 6]
+	ldrb	w1, [x4, 11]
+	strb	w1, [x2, 8]
+	add	x1, x5, :lo12:.LANCHOR204
+	strh	w3, [x2, 2]
+	mov	w2, -1
+	strh	w2, [x5, #:lo12:.LANCHOR204]
+	add	x2, x19, :lo12:.LANCHOR92
+	strh	wzr, [x1, 2]
+	strb	wzr, [x1, 6]
+	strb	wzr, [x1, 8]
+	ldrh	w1, [x4, 18]
+	strh	w1, [x19, #:lo12:.LANCHOR92]
+	ldrh	w1, [x4, 20]
+	lsr	w3, w1, 6
+	and	w1, w1, 63
+	strb	w1, [x2, 6]
+	ldrb	w1, [x4, 12]
+	strh	w3, [x2, 2]
+	strb	w1, [x2, 8]
 	adrp	x2, .LANCHOR93
-	ldrh	w3, [x1, 18]
-	add	x4, x2, :lo12:.LANCHOR93
-	strh	w3, [x2, #:lo12:.LANCHOR93]
+	ldrh	w1, [x4, 22]
+	add	x3, x2, :lo12:.LANCHOR93
+	strh	w1, [x2, #:lo12:.LANCHOR93]
 	mov	x21, x2
-	ldrh	w3, [x1, 20]
-	lsr	w5, w3, 6
-	and	w3, w3, 63
-	strb	w3, [x4, 6]
-	ldrb	w3, [x1, 12]
-	strh	w5, [x4, 2]
-	strb	w3, [x4, 8]
-	adrp	x4, .LANCHOR94
-	ldrh	w3, [x1, 22]
-	add	x5, x4, :lo12:.LANCHOR94
-	strh	w3, [x4, #:lo12:.LANCHOR94]
-	mov	x22, x4
-	ldrh	w3, [x1, 24]
-	lsr	w7, w3, 6
-	and	w3, w3, 63
-	strb	w3, [x5, 6]
-	ldrb	w3, [x1, 13]
-	strb	w3, [x5, 8]
-	adrp	x3, .LANCHOR161
-	strh	w7, [x5, 2]
-	ldr	w5, [x1, 32]
-	str	wzr, [x3, #:lo12:.LANCHOR161]
-	adrp	x3, .LANCHOR162
-	str	wzr, [x3, #:lo12:.LANCHOR162]
-	adrp	x3, .LANCHOR166
-	str	wzr, [x3, #:lo12:.LANCHOR166]
-	adrp	x3, .LANCHOR165
-	str	wzr, [x3, #:lo12:.LANCHOR165]
-	adrp	x3, .LANCHOR167
-	str	w5, [x3, #:lo12:.LANCHOR167]
-	adrp	x3, .LANCHOR168
-	str	wzr, [x3, #:lo12:.LANCHOR168]
-	adrp	x3, .LANCHOR169
-	str	wzr, [x3, #:lo12:.LANCHOR169]
-	adrp	x3, .LANCHOR164
-	str	wzr, [x3, #:lo12:.LANCHOR164]
-	ldr	w3, [x1, 40]
+	ldrh	w1, [x4, 24]
+	lsr	w7, w1, 6
+	and	w1, w1, 63
+	strb	w1, [x3, 6]
+	ldrb	w1, [x4, 13]
+	strb	w1, [x3, 8]
+	adrp	x1, .LANCHOR161
+	strh	w7, [x3, 2]
+	ldr	w3, [x4, 32]
+	str	wzr, [x1, #:lo12:.LANCHOR161]
+	adrp	x1, .LANCHOR162
+	str	wzr, [x1, #:lo12:.LANCHOR162]
+	adrp	x1, .LANCHOR166
+	str	wzr, [x1, #:lo12:.LANCHOR166]
+	adrp	x1, .LANCHOR165
+	str	wzr, [x1, #:lo12:.LANCHOR165]
+	adrp	x1, .LANCHOR167
+	str	w3, [x1, #:lo12:.LANCHOR167]
+	adrp	x1, .LANCHOR168
+	str	wzr, [x1, #:lo12:.LANCHOR168]
+	adrp	x1, .LANCHOR169
+	str	wzr, [x1, #:lo12:.LANCHOR169]
+	adrp	x1, .LANCHOR164
+	ldr	w3, [x4, 40]
+	str	wzr, [x1, #:lo12:.LANCHOR164]
 	adrp	x1, .LANCHOR159
-	ldr	w5, [x1, #:lo12:.LANCHOR159]
-	cmp	w3, w5
-	bls	.L2027
+	ldr	w4, [x1, #:lo12:.LANCHOR159]
+	cmp	w3, w4
+	bls	.L2074
 	str	w3, [x1, #:lo12:.LANCHOR159]
-.L2027:
-	add	x20, x20, :lo12:.LANCHOR81
+.L2074:
+	add	x20, x20, :lo12:.LANCHOR80
 	adrp	x1, .LANCHOR160
 	ldr	w3, [x1, #:lo12:.LANCHOR160]
 	ldr	w2, [x20, 36]
 	cmp	w2, w3
-	bls	.L2028
+	bls	.L2075
 	str	w2, [x1, #:lo12:.LANCHOR160]
-.L2028:
+.L2075:
 	mov	w1, 65535
 	cmp	w6, w1
-	beq	.L2029
-	add	x0, x0, :lo12:.LANCHOR92
+	beq	.L2076
+	add	x0, x0, :lo12:.LANCHOR91
 	bl	make_superblock
-.L2029:
-	ldrh	w2, [x21, #:lo12:.LANCHOR93]
+.L2076:
+	ldrh	w2, [x19, #:lo12:.LANCHOR92]
 	mov	w1, 65535
-	add	x0, x21, :lo12:.LANCHOR93
+	add	x0, x19, :lo12:.LANCHOR92
 	cmp	w2, w1
-	beq	.L2030
+	beq	.L2077
 	bl	make_superblock
-.L2030:
-	ldrh	w2, [x22, #:lo12:.LANCHOR94]
+.L2077:
+	ldrh	w2, [x21, #:lo12:.LANCHOR93]
 	mov	w1, 65535
-	add	x0, x22, :lo12:.LANCHOR94
+	add	x0, x21, :lo12:.LANCHOR93
 	cmp	w2, w1
-	beq	.L2031
+	beq	.L2078
 	bl	make_superblock
-.L2031:
-	ldrh	w2, [x19, #:lo12:.LANCHOR204]
+.L2078:
+	ldrh	w2, [x22, #:lo12:.LANCHOR204]
 	mov	w1, 65535
-	add	x0, x19, :lo12:.LANCHOR204
+	add	x0, x22, :lo12:.LANCHOR204
 	cmp	w2, w1
-	beq	.L2032
+	beq	.L2079
 	bl	make_superblock
-.L2032:
+.L2079:
 	mov	w0, 0
-	b	.L2015
-.L2021:
-	ldrh	w0, [x21, #:lo12:.LANCHOR209]
-	mov	w2, 1
-	mov	w1, w2
-	orr	w0, w23, w0, lsl 10
-	str	w0, [x20, 4]
-	ldr	x0, [x24, #:lo12:.LANCHOR183]
-	str	x0, [x20, 8]
-	mov	x0, x20
-	bl	FlashReadPages
-	ldr	w0, [x20]
-	cmn	w0, #1
-	beq	.L2019
-	ldr	x0, [x24, #:lo12:.LANCHOR183]
-	ldr	w0, [x0]
-	cmp	w0, w27
-	bne	.L2019
-	ldr	x0, [x26, #:lo12:.LANCHOR188]
-	ldrh	w0, [x0]
-	cmp	w0, w28
-	beq	.L2020
-.L2019:
-	sub	w23, w23, #1
-	sxth	w23, w23
-	b	.L2018
+	b	.L2059
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
 	.section	.text.FtlDumpBlockInfo,"ax",@progbits
 	.align	2
@@ -14199,7 +14507,7 @@ FtlDumpBlockInfo:
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x19, x20, [sp, 32]
-	adrp	x19, .LANCHOR53
+	adrp	x19, .LANCHOR52
 	stp	x21, x22, [sp, 48]
 	and	w22, w1, 255
 	stp	x23, x24, [sp, 64]
@@ -14207,16 +14515,16 @@ FtlDumpBlockInfo:
 	stp	x25, x26, [sp, 80]
 	str	x27, [sp, 96]
 	bl	P2V_block_in_plane
-	ldrh	w25, [x19, #:lo12:.LANCHOR53]
+	ldrh	w25, [x19, #:lo12:.LANCHOR52]
 	and	w21, w0, 65535
 	adrp	x1, .LANCHOR224
 	adrp	x0, .LC45
 	add	x1, x1, :lo12:.LANCHOR224
 	add	x0, x0, :lo12:.LC45
 	bl	printf
-	adrp	x1, .LANCHOR84
+	adrp	x1, .LANCHOR83
 	ubfiz	x0, x21, 1, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR84]
+	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	ldrh	w2, [x1, x0]
 	mov	w1, w21
 	adrp	x0, .LC46
@@ -14225,19 +14533,19 @@ FtlDumpBlockInfo:
 	strh	w21, [x23, -48]!
 	mov	x0, x23
 	bl	make_superblock
-	adrp	x0, .LANCHOR8
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L2051
-	cbnz	w22, .L2051
+	adrp	x0, .LANCHOR15
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	cbz	w0, .L2104
+	cbnz	w22, .L2104
 	mov	w0, w21
 	bl	ftl_get_blk_mode
 	mov	w21, w0
 	cmp	w0, 1
-	bne	.L2042
-	adrp	x0, .LANCHOR54
-	ldrh	w25, [x0, #:lo12:.LANCHOR54]
-.L2042:
-	ldrh	w3, [x19, #:lo12:.LANCHOR53]
+	bne	.L2095
+	adrp	x0, .LANCHOR53
+	ldrh	w25, [x0, #:lo12:.LANCHOR53]
+.L2095:
+	ldrh	w3, [x19, #:lo12:.LANCHOR52]
 	adrp	x26, .LC48
 	add	x26, x26, :lo12:.LC48
 	mov	w20, 0
@@ -14247,39 +14555,39 @@ FtlDumpBlockInfo:
 	adrp	x0, .LC47
 	add	x0, x0, :lo12:.LC47
 	bl	printf
-.L2043:
-	adrp	x1, .LANCHOR105
+.L2096:
+	adrp	x1, .LANCHOR104
 	adrp	x0, .LANCHOR38
 	adrp	x24, .LANCHOR180
 	add	x3, x23, 16
-	ldr	x6, [x1, #:lo12:.LANCHOR105]
-	adrp	x1, .LANCHOR58
+	ldr	x6, [x1, #:lo12:.LANCHOR104]
+	adrp	x1, .LANCHOR57
 	ldrh	w5, [x0, #:lo12:.LANCHOR38]
 	mov	w19, 0
-	ldrh	w7, [x1, #:lo12:.LANCHOR58]
-	adrp	x1, .LANCHOR106
+	ldrh	w7, [x1, #:lo12:.LANCHOR57]
+	adrp	x1, .LANCHOR105
 	ldr	x0, [x24, #:lo12:.LANCHOR180]
 	mov	w11, 65535
-	ldr	x8, [x1, #:lo12:.LANCHOR106]
-	adrp	x1, .LANCHOR59
-	ldrh	w10, [x1, #:lo12:.LANCHOR59]
+	ldr	x8, [x1, #:lo12:.LANCHOR105]
+	adrp	x1, .LANCHOR58
+	ldrh	w10, [x1, #:lo12:.LANCHOR58]
 	mov	w1, 0
-.L2044:
+.L2097:
 	cmp	w1, w5
-	bne	.L2046
+	bne	.L2099
 	mov	w1, w19
 	umull	x19, w19, w27
 	mov	x22, 0
 	mov	w2, w21
 	bl	FlashReadPages
-.L2047:
+.L2100:
 	cmp	x22, x19
-	bne	.L2048
+	bne	.L2101
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	cmp	w25, w20
-	bne	.L2043
-.L2049:
+	bne	.L2096
+.L2102:
 	ldp	x19, x20, [sp, 32]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 48]
@@ -14289,13 +14597,13 @@ FtlDumpBlockInfo:
 	ldr	x27, [sp, 96]
 	add	sp, sp, 160
 	ret
-.L2051:
+.L2104:
 	mov	w21, 0
-	b	.L2042
-.L2046:
+	b	.L2095
+.L2099:
 	ldrh	w2, [x3]
 	cmp	w2, w11
-	beq	.L2045
+	beq	.L2098
 	umaddl	x4, w19, w27, x0
 	orr	w2, w20, w2, lsl 10
 	str	w2, [x4, 4]
@@ -14309,12 +14617,12 @@ FtlDumpBlockInfo:
 	asr	w2, w2, 2
 	add	x2, x8, x2, sxtw 2
 	str	x2, [x4, 16]
-.L2045:
+.L2098:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	and	w1, w1, 65535
-	b	.L2044
-.L2048:
+	b	.L2097
+.L2101:
 	ldr	x8, [x24, #:lo12:.LANCHOR180]
 	ldrh	w1, [x29, 96]
 	add	x2, x8, x22
@@ -14330,7 +14638,7 @@ FtlDumpBlockInfo:
 	ldr	w2, [x8, x22]
 	add	x22, x22, 56
 	bl	printf
-	b	.L2047
+	b	.L2100
 	.size	FtlDumpBlockInfo, .-FtlDumpBlockInfo
 	.section	.text.FtlScanAllBlock,"ax",@progbits
 	.align	2
@@ -14354,10 +14662,10 @@ FtlScanAllBlock:
 	add	x24, x24, :lo12:.LC50
 	str	x25, [sp, 80]
 	bl	printf
-.L2055:
+.L2108:
 	ldrh	w0, [x23]
 	cmp	w0, w20
-	bhi	.L2063
+	bhi	.L2116
 	ldp	x19, x20, [sp, 32]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 48]
@@ -14366,16 +14674,16 @@ FtlScanAllBlock:
 	ldr	x25, [sp, 80]
 	add	sp, sp, 144
 	ret
-.L2063:
+.L2116:
 	strh	w20, [x29, 80]
 	mov	w0, w20
 	bl	ftl_get_blk_mode
 	mov	w3, w0
-	adrp	x2, .LANCHOR84
+	adrp	x2, .LANCHOR83
 	ubfiz	x1, x20, 1, 16
 	adrp	x0, .LC49
 	add	x0, x0, :lo12:.LC49
-	ldr	x2, [x2, #:lo12:.LANCHOR84]
+	ldr	x2, [x2, #:lo12:.LANCHOR83]
 	adrp	x22, .LANCHOR180
 	mov	w19, 0
 	ldrh	w2, [x2, x1]
@@ -14383,33 +14691,33 @@ FtlScanAllBlock:
 	bl	printf
 	add	x0, x29, 80
 	bl	make_superblock
-	adrp	x1, .LANCHOR105
+	adrp	x1, .LANCHOR104
 	adrp	x0, .LANCHOR38
 	add	x3, x29, 96
 	mov	w11, 65535
-	ldr	x6, [x1, #:lo12:.LANCHOR105]
-	adrp	x1, .LANCHOR58
+	ldr	x6, [x1, #:lo12:.LANCHOR104]
+	adrp	x1, .LANCHOR57
 	ldrh	w5, [x0, #:lo12:.LANCHOR38]
 	mov	w12, 56
-	ldrh	w7, [x1, #:lo12:.LANCHOR58]
-	adrp	x1, .LANCHOR106
+	ldrh	w7, [x1, #:lo12:.LANCHOR57]
+	adrp	x1, .LANCHOR105
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
-	ldr	x8, [x1, #:lo12:.LANCHOR106]
-	adrp	x1, .LANCHOR59
-	ldrh	w10, [x1, #:lo12:.LANCHOR59]
+	ldr	x8, [x1, #:lo12:.LANCHOR105]
+	adrp	x1, .LANCHOR58
+	ldrh	w10, [x1, #:lo12:.LANCHOR58]
 	mov	w1, 0
-.L2056:
+.L2109:
 	cmp	w1, w5
-	bne	.L2058
+	bne	.L2111
 	mov	w25, 56
 	mov	x21, 0
 	mov	w2, 0
 	mov	w1, w19
 	umull	x25, w19, w25
 	bl	FlashReadPages
-.L2059:
+.L2112:
 	cmp	x21, x25
-	bne	.L2060
+	bne	.L2113
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	adrp	x25, .LC51
 	add	x25, x25, :lo12:.LC51
@@ -14417,16 +14725,16 @@ FtlScanAllBlock:
 	mov	x19, 0
 	mov	w2, 1
 	bl	FlashReadPages
-.L2061:
+.L2114:
 	cmp	x21, x19
-	bne	.L2062
+	bne	.L2115
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2055
-.L2058:
+	b	.L2108
+.L2111:
 	ldrh	w2, [x3]
 	cmp	w2, w11
-	beq	.L2057
+	beq	.L2110
 	umaddl	x4, w19, w12, x0
 	lsl	w2, w2, 10
 	str	w2, [x4, 4]
@@ -14440,12 +14748,12 @@ FtlScanAllBlock:
 	asr	w2, w2, 2
 	add	x2, x8, x2, sxtw 2
 	str	x2, [x4, 16]
-.L2057:
+.L2110:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	and	w1, w1, 65535
-	b	.L2056
-.L2060:
+	b	.L2109
+.L2113:
 	ldr	x8, [x22, #:lo12:.LANCHOR180]
 	ldrh	w1, [x29, 80]
 	add	x2, x8, x21
@@ -14461,8 +14769,8 @@ FtlScanAllBlock:
 	ldr	w2, [x8, x21]
 	add	x21, x21, 56
 	bl	printf
-	b	.L2059
-.L2062:
+	b	.L2112
+.L2115:
 	ldr	x8, [x22, #:lo12:.LANCHOR180]
 	ldrh	w1, [x29, 80]
 	add	x2, x8, x19
@@ -14478,96 +14786,99 @@ FtlScanAllBlock:
 	ldr	w2, [x8, x19]
 	add	x19, x19, 56
 	bl	printf
-	b	.L2061
+	b	.L2114
 	.size	FtlScanAllBlock, .-FtlScanAllBlock
 	.section	.text.FtlMapTblRecovery,"ax",@progbits
 	.align	2
 	.global	FtlMapTblRecovery
 	.type	FtlMapTblRecovery, %function
 FtlMapTblRecovery:
-	stp	x29, x30, [sp, -144]!
+	stp	x29, x30, [sp, -160]!
 	mov	w1, 0
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	x19, x0
+	stp	x27, x28, [sp, 80]
+	mov	x28, x0
 	stp	x23, x24, [sp, 48]
-	adrp	x20, .LANCHOR202
-	ldrh	w23, [x0, 6]
-	adrp	x24, .LANCHOR54
+	ldrh	w24, [x0, 6]
 	stp	x21, x22, [sp, 32]
-	ldr	x21, [x0, 40]
-	ldr	x22, [x0, 16]
-	lsl	w2, w23, 2
+	adrp	x21, .LANCHOR183
+	ldr	x22, [x0, 40]
+	ldr	x23, [x0, 16]
+	lsl	w2, w24, 2
 	ldr	x0, [x0, 24]
-	str	x0, [x29, 128]
-	ldrh	w0, [x19, 8]
+	str	x0, [x29, 144]
+	ldrh	w0, [x28, 8]
+	stp	x19, x20, [sp, 16]
+	mov	w19, 0
 	stp	x25, x26, [sp, 64]
-	stp	x27, x28, [sp, 80]
-	mov	w27, 0
-	str	w0, [x29, 140]
-	mov	x0, x21
+	adrp	x25, .LANCHOR53
+	str	w0, [x29, 156]
+	mov	x0, x22
 	bl	ftl_memset
-	str	x20, [x29, 120]
-	adrp	x7, .LANCHOR183
-	add	x3, x20, :lo12:.LANCHOR202
-	mov	x26, x7
-	mov	x20, x3
-	ldr	x0, [x7, #:lo12:.LANCHOR183]
-	str	x0, [x3, 8]
-	adrp	x0, .LANCHOR188
-	stp	wzr, wzr, [x19, 48]
-	ldr	x25, [x0, #:lo12:.LANCHOR188]
-	mov	w0, -1
-	str	x25, [x3, 16]
-	strh	w0, [x19]
-	strh	w0, [x19, 2]
-	mov	w0, 1
-	str	w0, [x19, 56]
-	ldr	w0, [x29, 140]
+	stp	wzr, wzr, [x28, 48]
+	adrp	x0, .LANCHOR202
+	add	x4, x0, :lo12:.LANCHOR202
+	ldr	x1, [x21, #:lo12:.LANCHOR183]
+	mov	x27, x4
+	str	x0, [x29, 128]
+	str	x1, [x4, 8]
+	adrp	x1, .LANCHOR188
+	ldr	w0, [x29, 156]
+	ldr	x20, [x1, #:lo12:.LANCHOR188]
+	mov	w1, -1
+	str	x20, [x4, 16]
 	sub	w0, w0, #1
-	str	w0, [x29, 136]
-	add	x0, x24, :lo12:.LANCHOR54
-	str	x0, [x29, 112]
-.L2066:
-	ldr	w0, [x29, 140]
-	cmp	w27, w0
-	bge	.L2083
-	ldr	w0, [x29, 136]
-	sxtw	x28, w27
-	cmp	w27, w0
-	bne	.L2067
-	lsl	x0, x28, 1
+	strh	w1, [x28]
+	strh	w1, [x28, 2]
 	mov	w1, 1
-	add	x24, x22, x0
-	ldrh	w0, [x22, x0]
-	mov	w22, 0
+	str	w0, [x29, 116]
+	add	x0, x25, :lo12:.LANCHOR53
+	str	w1, [x28, 56]
+	str	x0, [x29, 104]
+.L2119:
+	ldr	w0, [x29, 156]
+	cmp	w19, w0
+	bge	.L2138
+	ldr	w0, [x29, 116]
+	sxtw	x26, w19
+	cmp	w19, w0
+	bne	.L2120
+	lsl	x0, x26, 1
+	mov	w1, 1
+	add	x21, x23, x0
+	adrp	x27, .LANCHOR57
+	add	x27, x27, :lo12:.LANCHOR57
+	mov	w25, 0
+	ldrh	w0, [x23, x0]
 	bl	FtlGetLastWrittenPage
-	sxth	w26, w0
+	sxth	w23, w0
 	add	w0, w0, 1
-	strh	w0, [x19, 2]
+	strh	w0, [x28, 2]
+	ldr	x0, [x29, 144]
+	strh	w19, [x28]
+	ldr	w0, [x0, x26, lsl 2]
+	adrp	x26, .LANCHOR1
+	str	w0, [x28, 48]
+	add	x26, x26, :lo12:.LANCHOR1
 	ldr	x0, [x29, 128]
-	strh	w27, [x19]
-	ldr	w0, [x0, x28, lsl 2]
-	str	w0, [x19, 48]
-	ldr	x0, [x29, 120]
-	add	x20, x0, :lo12:.LANCHOR202
-.L2068:
-	cmp	w22, w26
-	ble	.L2070
-.L2083:
-	mov	x0, x19
+	add	x19, x0, :lo12:.LANCHOR202
+.L2121:
+	cmp	w25, w23
+	ble	.L2124
+.L2138:
+	mov	x0, x28
 	bl	ftl_free_no_use_map_blk
-	adrp	x0, .LANCHOR54
-	ldrh	w1, [x19, 2]
-	ldrh	w0, [x0, #:lo12:.LANCHOR54]
+	adrp	x0, .LANCHOR53
+	ldrh	w1, [x28, 2]
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L2072
-	mov	x0, x19
+	bne	.L2126
+	mov	x0, x28
 	bl	ftl_map_blk_alloc_new_blk
-.L2072:
-	mov	x0, x19
+.L2126:
+	mov	x0, x28
 	bl	ftl_map_blk_gc
-	mov	x0, x19
+	mov	x0, x28
 	bl	ftl_map_blk_gc
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
@@ -14575,118 +14886,160 @@ FtlMapTblRecovery:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 144
+	ldp	x29, x30, [sp], 160
 	ret
-.L2070:
-	ldrh	w0, [x24]
+.L2124:
+	ldrh	w0, [x21]
 	mov	w2, 1
 	mov	w1, w2
-	orr	w0, w22, w0, lsl 10
-	str	w0, [x20, 4]
-	mov	x0, x20
+	orr	w0, w25, w0, lsl 10
+	str	w0, [x19, 4]
+	mov	x0, x19
 	bl	FlashReadPages
-	ldr	w0, [x20]
+	ldrb	w0, [x26]
+	cbz	w0, .L2122
+	ldr	x0, [x19, 16]
+	ldr	w0, [x0, 12]
+	str	w0, [x29, 156]
+	uxtw	x0, w0
+	cbz	w0, .L2122
+	ldrh	w1, [x27]
+	ldr	x0, [x19, 8]
+	bl	js_hash
+	ldr	w1, [x29, 156]
+	cmp	w1, w0
+	beq	.L2122
+	mov	w0, -1
+	str	w0, [x19]
+.L2122:
+	ldr	w0, [x19]
 	cmn	w0, #1
-	beq	.L2069
-	ldrh	w0, [x25, 8]
-	cmp	w23, w0
-	bls	.L2069
-	ldrh	w2, [x25]
-	ldrh	w1, [x19, 4]
+	beq	.L2123
+	ldrh	w0, [x20, 8]
+	cmp	w24, w0
+	bls	.L2123
+	ldrh	w2, [x20]
+	ldrh	w1, [x28, 4]
 	cmp	w2, w1
-	bne	.L2069
+	bne	.L2123
 	ubfiz	x0, x0, 2, 16
-	ldr	w1, [x20, 4]
-	str	w1, [x21, x0]
-.L2069:
-	add	w22, w22, 1
-	sxth	w22, w22
-	b	.L2068
-.L2067:
-	ldr	x0, [x26, #:lo12:.LANCHOR183]
+	ldr	w1, [x19, 4]
+	str	w1, [x22, x0]
+.L2123:
+	add	w25, w25, 1
+	sxth	w25, w25
+	b	.L2121
+.L2120:
+	lsl	x26, x26, 1
+	ldr	x0, [x21, #:lo12:.LANCHOR183]
+	str	x0, [x27, 8]
+	add	x0, x23, x26
+	ldrh	w1, [x25, #:lo12:.LANCHOR53]
 	mov	w2, 1
-	str	x0, [x20, 8]
-	lsl	x0, x28, 1
-	ldrh	w1, [x24, #:lo12:.LANCHOR54]
-	add	x28, x22, x0
-	ldrh	w0, [x22, x0]
+	str	x0, [x29, 136]
+	ldrh	w0, [x23, x26]
 	sub	w1, w1, #1
 	orr	w0, w1, w0, lsl 10
 	mov	w1, w2
-	str	w0, [x20, 4]
-	mov	x0, x20
+	str	w0, [x27, 4]
+	mov	x0, x27
 	bl	FlashReadPages
-	ldr	w0, [x20]
+	ldr	w0, [x27]
 	cmn	w0, #1
-	beq	.L2085
-	ldrh	w1, [x25]
-	ldrh	w0, [x19, 4]
+	beq	.L2140
+	ldrh	w1, [x20]
+	ldrh	w0, [x28, 4]
 	cmp	w1, w0
-	bne	.L2085
-	ldrh	w1, [x25, 8]
+	bne	.L2140
+	ldrh	w1, [x20, 8]
 	mov	w0, 64245
 	cmp	w1, w0
-	beq	.L2074
-.L2085:
+	beq	.L2128
+.L2140:
+	adrp	x26, .LANCHOR57
+	add	x26, x26, :lo12:.LANCHOR57
+	adrp	x0, .LANCHOR1
 	mov	w5, 0
-.L2075:
-	ldr	x0, [x29, 112]
+	add	x0, x0, :lo12:.LANCHOR1
+	str	x0, [x29, 120]
+.L2129:
+	ldr	x0, [x29, 104]
 	ldrh	w0, [x0]
 	cmp	w5, w0
-	bge	.L2081
-	ldrh	w0, [x28]
+	bge	.L2136
+	ldr	x0, [x29, 136]
 	mov	w2, 1
-	str	w5, [x29, 108]
+	str	w5, [x29, 152]
 	mov	w1, w2
+	ldrh	w0, [x0]
 	orr	w0, w5, w0, lsl 10
-	str	w0, [x20, 4]
-	mov	x0, x20
+	str	w0, [x27, 4]
+	mov	x0, x27
 	bl	FlashReadPages
-	ldr	w0, [x20]
-	ldr	w5, [x29, 108]
+	ldr	x0, [x29, 120]
+	ldr	w5, [x29, 152]
+	ldrb	w0, [x0]
+	cbz	w0, .L2133
+	ldr	x0, [x27, 16]
+	ldr	w0, [x0, 12]
+	str	w0, [x29, 152]
+	uxtw	x0, w0
+	cbz	w0, .L2133
+	ldrh	w1, [x26]
+	ldr	x0, [x27, 8]
+	str	w5, [x29, 112]
+	bl	js_hash
+	ldr	w1, [x29, 152]
+	ldr	w5, [x29, 112]
+	cmp	w1, w0
+	beq	.L2133
+	mov	w0, -1
+	str	w0, [x27]
+.L2133:
+	ldr	w0, [x27]
 	cmn	w0, #1
-	beq	.L2079
-	ldrh	w0, [x25, 8]
-	cmp	w23, w0
-	bls	.L2079
-	ldrh	w2, [x25]
-	ldrh	w1, [x19, 4]
+	beq	.L2134
+	ldrh	w0, [x20, 8]
+	cmp	w24, w0
+	bls	.L2134
+	ldrh	w2, [x20]
+	ldrh	w1, [x28, 4]
 	cmp	w2, w1
-	bne	.L2079
+	bne	.L2134
 	ubfiz	x0, x0, 2, 16
-	ldr	w1, [x20, 4]
-	str	w1, [x21, x0]
-.L2079:
+	ldr	w1, [x27, 4]
+	str	w1, [x22, x0]
+.L2134:
 	add	w5, w5, 1
 	sxth	w5, w5
-	b	.L2075
-.L2074:
-	ldrh	w5, [x24, #:lo12:.LANCHOR54]
+	b	.L2129
+.L2128:
+	ldrh	w5, [x25, #:lo12:.LANCHOR53]
 	mov	w0, 0
-	ldr	x10, [x26, #:lo12:.LANCHOR183]
+	ldr	x6, [x21, #:lo12:.LANCHOR183]
 	sub	w5, w5, #1
-.L2076:
+.L2130:
 	cmp	w0, w5
-	blt	.L2078
-.L2081:
-	add	w4, w27, 1
-	sxth	w27, w4
-	b	.L2066
-.L2078:
+	blt	.L2132
+.L2136:
+	add	w19, w19, 1
+	sxth	w19, w19
+	b	.L2119
+.L2132:
 	lsl	w2, w0, 1
 	sxtw	x2, w2
 	lsl	x1, x2, 2
-	ldrh	w1, [x10, x1]
-	cmp	w23, w1
-	bls	.L2077
+	ldrh	w1, [x6, x1]
+	cmp	w24, w1
+	bls	.L2131
 	add	x2, x2, 1
 	ubfiz	x1, x1, 2, 16
-	ldr	w2, [x10, x2, lsl 2]
-	str	w2, [x21, x1]
-.L2077:
+	ldr	w2, [x6, x2, lsl 2]
+	str	w2, [x22, x1]
+.L2131:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L2076
+	b	.L2130
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
 	.section	.text.FtlLoadVonderInfo,"ax",@progbits
 	.align	2
@@ -14694,22 +15047,22 @@ FtlMapTblRecovery:
 	.type	FtlLoadVonderInfo, %function
 FtlLoadVonderInfo:
 	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR62
+	adrp	x1, .LANCHOR61
 	adrp	x0, .LANCHOR215
 	add	x0, x0, :lo12:.LANCHOR215
 	add	x29, sp, 0
-	ldrh	w1, [x1, #:lo12:.LANCHOR62]
+	ldrh	w1, [x1, #:lo12:.LANCHOR61]
 	strh	w1, [x0, 10]
 	mov	w1, -3962
 	strh	w1, [x0, 4]
-	adrp	x1, .LANCHOR71
-	ldrh	w1, [x1, #:lo12:.LANCHOR71]
+	adrp	x1, .LANCHOR70
+	ldrh	w1, [x1, #:lo12:.LANCHOR70]
 	strh	w1, [x0, 8]
-	adrp	x1, .LANCHOR63
-	ldrh	w1, [x1, #:lo12:.LANCHOR63]
+	adrp	x1, .LANCHOR62
+	ldrh	w1, [x1, #:lo12:.LANCHOR62]
 	strh	w1, [x0, 6]
-	adrp	x1, .LANCHOR72
-	ldr	x1, [x1, #:lo12:.LANCHOR72]
+	adrp	x1, .LANCHOR71
+	ldr	x1, [x1, #:lo12:.LANCHOR71]
 	str	x1, [x0, 16]
 	adrp	x1, .LANCHOR193
 	ldr	x1, [x1, #:lo12:.LANCHOR193]
@@ -14740,188 +15093,19 @@ FtlLoadMapInfo:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
-	.section	.text.FtlGcScanTempBlk,"ax",@progbits
+	.section	.text.FlashReadFacBbtData,"ax",@progbits
 	.align	2
-	.global	FtlGcScanTempBlk
-	.type	FtlGcScanTempBlk, %function
-FtlGcScanTempBlk:
-	stp	x29, x30, [sp, -96]!
+	.global	FlashReadFacBbtData
+	.type	FlashReadFacBbtData, %function
+FlashReadFacBbtData:
+	stp	x29, x30, [sp, -160]!
 	add	x29, sp, 0
+	stp	x25, x26, [sp, 64]
+	mov	w25, w1
+	adrp	x1, .LANCHOR14
+	add	x1, x1, :lo12:.LANCHOR14
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR226
-	stp	x19, x20, [sp, 16]
-	mov	x20, x0
-	ldrh	w19, [x23, #:lo12:.LANCHOR226]
-	mov	w0, 65535
-	stp	x21, x22, [sp, 32]
-	stp	x25, x26, [sp, 64]
-	cmp	w19, w0
-	stp	x27, x28, [sp, 80]
-	beq	.L2115
-	cbnz	w19, .L2098
-.L2099:
-	bl	FtlGcPageVarInit
-	b	.L2100
-.L2115:
-	mov	w19, 0
-.L2098:
-	adrp	x0, .LANCHOR53
-	ldrh	w0, [x0, #:lo12:.LANCHOR53]
-	cmp	w0, w1
-	beq	.L2099
-.L2100:
-	adrp	x25, .LANCHOR59
-	add	x25, x25, :lo12:.LANCHOR59
-	mov	w26, -1
-	mov	w24, 65535
-.L2112:
-	ldrh	w0, [x20]
-	strb	wzr, [x20, 8]
-	cmp	w0, w24
-	beq	.L2116
-	mov	w27, 56
-.L2114:
-	adrp	x1, .LANCHOR106
-	adrp	x22, .LANCHOR180
-	ldrh	w6, [x25]
-	add	x3, x20, 16
-	ldr	x5, [x1, #:lo12:.LANCHOR106]
-	adrp	x1, .LANCHOR38
-	ldr	x0, [x22, #:lo12:.LANCHOR180]
-	mov	w21, 0
-	ldrh	w1, [x1, #:lo12:.LANCHOR38]
-	add	x1, x1, 8
-	add	x1, x20, x1, lsl 1
-.L2102:
-	cmp	x3, x1
-	bne	.L2104
-	mov	w1, w21
-	umull	x21, w21, w27
-	mov	x28, 0
-	mov	w2, 0
-	bl	FlashReadPages
-.L2105:
-	cmp	x28, x21
-	bne	.L2113
-	adrp	x0, .LANCHOR53
-	add	w19, w19, 1
-	and	w19, w19, 65535
-	ldrh	w0, [x0, #:lo12:.LANCHOR53]
-	cmp	w0, w19
-	bhi	.L2114
-.L2116:
-	mov	w2, 0
-	b	.L2101
-.L2104:
-	ldrh	w2, [x3]
-	cmp	w2, w24
-	beq	.L2103
-	umaddl	x4, w21, w27, x0
-	orr	w2, w19, w2, lsl 10
-	str	w2, [x4, 4]
-	mul	w2, w21, w6
-	add	w21, w21, 1
-	str	xzr, [x4, 8]
-	and	w21, w21, 65535
-	asr	w2, w2, 2
-	add	x2, x5, x2, sxtw 2
-	str	x2, [x4, 16]
-.L2103:
-	add	x3, x3, 2
-	b	.L2102
-.L2113:
-	ldr	x6, [x22, #:lo12:.LANCHOR180]
-	add	x5, x6, x28
-	ldr	w4, [x5, 4]
-	lsr	w0, w4, 10
-	bl	P2V_plane
-	and	w2, w0, 65535
-	ldr	w0, [x6, x28]
-	cbnz	w0, .L2106
-	ldr	x0, [x5, 16]
-	add	x28, x28, 56
-	ldrh	w1, [x0]
-	cmp	w1, w24
-	bne	.L2107
-	adrp	x0, .LANCHOR135
-	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR135]
-.L2101:
-	strb	w2, [x20, 6]
-	mov	w0, -1
-	strh	w19, [x20, 2]
-	mov	w1, w19
-	strh	w0, [x23, #:lo12:.LANCHOR226]
-	mov	x0, x20
-	bl	ftl_sb_update_avl_pages
-	mov	w0, w26
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 96
-	ret
-.L2107:
-	ldp	w2, w0, [x0, 8]
-	mov	w1, w4
-	bl	FtlGcUpdatePage
-	b	.L2105
-.L2106:
-	ldrh	w1, [x20]
-	mov	w2, w4
-	adrp	x0, .LC52
-	add	x0, x0, :lo12:.LC52
-	bl	printf
-	adrp	x0, .LANCHOR28
-	ldr	w1, [x0, #:lo12:.LANCHOR28]
-	ldrh	w0, [x20]
-	cbnz	w1, .L2108
-	adrp	x1, .LANCHOR8
-	ldrb	w1, [x1, #:lo12:.LANCHOR8]
-	cbz	w1, .L2109
-.L2108:
-	adrp	x2, .LANCHOR79
-	ubfiz	x1, x0, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR79]
-	ldrh	w1, [x2, x1]
-	cmp	w1, 159
-	bls	.L2110
-.L2109:
-	ldr	x1, [x22, #:lo12:.LANCHOR180]
-	ldr	w1, [x1, x28]
-	cmn	w1, #1
-	bne	.L2111
-.L2110:
-	ldr	x1, [x22, #:lo12:.LANCHOR180]
-	add	x28, x1, x28
-	ldr	w26, [x28, 4]
-.L2111:
-	adrp	x1, .LANCHOR84
-	ubfiz	x0, x0, 1, 16
-	mov	w19, 0
-	ldr	x1, [x1, #:lo12:.LANCHOR84]
-	strh	wzr, [x1, x0]
-	ldrh	w0, [x20]
-	bl	INSERT_FREE_LIST
-	mov	w0, -1
-	strh	w0, [x20]
-	bl	FtlGcPageVarInit
-	b	.L2112
-	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
-	.section	.text.FlashReadFacBbtData,"ax",@progbits
-	.align	2
-	.global	FlashReadFacBbtData
-	.type	FlashReadFacBbtData, %function
-FlashReadFacBbtData:
-	stp	x29, x30, [sp, -160]!
-	add	x29, sp, 0
-	stp	x25, x26, [sp, 64]
-	mov	w25, w1
-	adrp	x1, .LANCHOR15
-	add	x1, x1, :lo12:.LANCHOR15
-	stp	x23, x24, [sp, 48]
-	mov	x23, x0
+	mov	x23, x0
 	stp	x21, x22, [sp, 32]
 	adrp	x21, .LANCHOR147
 	ldrh	w0, [x1, 14]
@@ -14942,11 +15126,11 @@ FlashReadFacBbtData:
 	mul	w26, w0, w25
 	mov	x22, x1
 	str	x2, [x29, 120]
-.L2126:
+.L2165:
 	cmp	w19, w20
-	ble	.L2133
+	ble	.L2172
 	mov	w0, -1
-.L2125:
+.L2164:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -14954,7 +15138,7 @@ FlashReadFacBbtData:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L2133:
+.L2172:
 	add	w0, w20, w26
 	mov	w2, 1
 	lsl	w0, w0, 10
@@ -14964,37 +15148,37 @@ FlashReadFacBbtData:
 	bl	FlashReadPages
 	ldr	w0, [x29, 104]
 	cmn	w0, #1
-	beq	.L2127
+	beq	.L2166
 	ldr	x0, [x22, #:lo12:.LANCHOR197]
 	ldrh	w0, [x0]
 	cmp	w0, w27
-	bne	.L2127
-	cbz	x23, .L2134
-	cbz	w25, .L2129
-.L2132:
+	bne	.L2166
+	cbz	x23, .L2173
+	cbz	w25, .L2168
+.L2171:
 	ldr	x1, [x21, #:lo12:.LANCHOR147]
 	mov	w2, w24
 	mov	x0, x23
 	bl	ftl_memcpy
 	mov	w3, 4
-	adrp	x0, .LC53
+	adrp	x0, .LC52
 	mov	w2, w3
 	mov	x1, x23
-	add	x0, x0, :lo12:.LC53
+	add	x0, x0, :lo12:.LC52
 	bl	rknand_print_hex
-.L2134:
+.L2173:
 	mov	w0, 0
-	b	.L2125
-.L2129:
+	b	.L2164
+.L2168:
 	ldr	x5, [x21, #:lo12:.LANCHOR147]
 	adrp	x2, .LANCHOR149
 	add	x2, x2, :lo12:.LANCHOR149
 	mov	w0, 0
 	mov	w6, 1
-.L2130:
+.L2169:
 	ldr	w1, [x2]
 	cmp	w0, w1
-	bcs	.L2132
+	bcs	.L2171
 	ubfx	x1, x0, 5, 11
 	and	w3, w0, 31
 	lsl	x1, x1, 2
@@ -15004,11 +15188,11 @@ FlashReadFacBbtData:
 	ldr	w3, [x5, x1]
 	orr	w3, w3, w4
 	str	w3, [x5, x1]
-	b	.L2130
-.L2127:
+	b	.L2169
+.L2166:
 	sub	w20, w20, #1
 	and	w20, w20, 65535
-	b	.L2126
+	b	.L2165
 	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
 	.section	.text.FlashGetBadBlockList,"ax",@progbits
 	.align	2
@@ -15032,10 +15216,10 @@ FlashGetBadBlockList:
 	lsr	w2, w2, 3
 	bl	FlashReadFacBbtData
 	cmn	w0, #1
-	bne	.L2140
-.L2144:
+	bne	.L2179
+.L2183:
 	mov	w0, 0
-.L2141:
+.L2180:
 	ubfiz	x0, x0, 1, 16
 	mov	w1, -1
 	ldr	x21, [sp, 32]
@@ -15044,32 +15228,32 @@ FlashGetBadBlockList:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L2140:
+.L2179:
 	ldr	x4, [x21, #:lo12:.LANCHOR153]
 	lsr	w5, w19, 4
 	sub	w19, w19, #1
 	mov	w1, 0
 	mov	w0, 0
 	mov	w6, 1
-.L2142:
+.L2181:
 	cmp	w1, w19
-	bge	.L2141
+	bge	.L2180
 	ubfx	x3, x1, 5, 11
 	and	w2, w1, 31
 	lsl	w2, w6, w2
 	ldr	w3, [x4, x3, lsl 2]
 	tst	w2, w3
-	beq	.L2143
+	beq	.L2182
 	add	w2, w0, 1
 	ubfiz	x0, x0, 1, 16
 	strh	w1, [x20, x0]
 	and	w0, w2, 65535
-.L2143:
+.L2182:
 	cmp	w0, w5
-	bcs	.L2144
+	bcs	.L2183
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L2142
+	b	.L2181
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
 	.section	.text.FtlMakeBbt,"ax",@progbits
 	.align	2
@@ -15077,18 +15261,18 @@ FlashGetBadBlockList:
 	.type	FtlMakeBbt, %function
 FtlMakeBbt:
 	stp	x29, x30, [sp, -128]!
-	adrp	x0, .LANCHOR77
+	adrp	x0, .LANCHOR76
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	ldr	w21, [x0, #:lo12:.LANCHOR77]
+	ldr	w21, [x0, #:lo12:.LANCHOR76]
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w21, .L2151
+	cbnz	w21, .L2190
 	bl	FtlBbtMemInit
-	adrp	x20, .LANCHOR75
-	add	x22, x20, :lo12:.LANCHOR75
+	adrp	x20, .LANCHOR74
+	add	x22, x20, :lo12:.LANCHOR74
 	bl	FtlLoadFactoryBbt
 	add	x24, x22, 32
 	adrp	x28, .LANCHOR202
@@ -15097,42 +15281,42 @@ FtlMakeBbt:
 	adrp	x0, .LANCHOR45
 	add	x0, x0, :lo12:.LANCHOR45
 	str	x0, [x29, 120]
-.L2152:
+.L2191:
 	ldr	x0, [x29, 120]
 	ldrh	w0, [x0]
 	cmp	w21, w0
-	bcc	.L2158
-	adrp	x21, .LANCHOR60
-	add	x21, x21, :lo12:.LANCHOR60
+	bcc	.L2197
+	adrp	x21, .LANCHOR59
+	add	x21, x21, :lo12:.LANCHOR59
 	mov	w19, 0
-.L2159:
+.L2198:
 	ldrh	w0, [x21]
 	cmp	w0, w19
-	bhi	.L2160
-	add	x21, x20, :lo12:.LANCHOR75
+	bhi	.L2199
+	add	x21, x20, :lo12:.LANCHOR74
 	mov	w22, 65535
 	ldrh	w19, [x21, 12]
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L2161:
+.L2200:
 	ldrh	w0, [x21, 12]
 	sub	w0, w0, #47
 	cmp	w0, w19
-	bgt	.L2165
+	bgt	.L2204
 	mov	w0, w19
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L2162
+	beq	.L2201
 	mov	w0, w19
 	bl	FlashTestBlk
-	cbz	w0, .L2163
+	cbz	w0, .L2202
 	mov	w0, w19
 	bl	FtlBbmMapBadBlock
-.L2162:
+.L2201:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L2161
-.L2158:
+	b	.L2200
+.L2197:
 	adrp	x2, .LANCHOR188
 	adrp	x0, .LANCHOR183
 	add	x19, x28, :lo12:.LANCHOR202
@@ -15144,7 +15328,7 @@ FtlMakeBbt:
 	stp	x0, x26, [x19, 8]
 	adrp	x23, .LANCHOR51
 	str	x2, [x29, 112]
-	beq	.L2153
+	beq	.L2192
 	ldrh	w4, [x23, #:lo12:.LANCHOR51]
 	mov	w2, 1
 	madd	w27, w4, w21, w1
@@ -15159,14 +15343,14 @@ FtlMakeBbt:
 	add	w2, w2, 7
 	lsr	w2, w2, 3
 	bl	ftl_memcpy
-.L2154:
+.L2193:
 	mov	w0, w27
 	add	w21, w21, 1
 	bl	FtlBbmMapBadBlock
 	add	x24, x24, 8
 	add	x22, x22, 2
-	b	.L2152
-.L2153:
+	b	.L2191
+.L2192:
 	mov	w1, w21
 	bl	FlashGetBadBlockList
 	ldr	x0, [x19, 8]
@@ -15179,12 +15363,12 @@ FtlMakeBbt:
 	sub	w19, w19, #1
 	str	x0, [x29, 104]
 	and	w19, w19, 65535
-.L2155:
+.L2194:
 	ldrh	w0, [x23]
 	madd	w0, w21, w0, w19
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L2156
+	beq	.L2195
 	ldr	x0, [x29, 112]
 	mov	w2, 16
 	strh	w19, [x22]
@@ -15217,34 +15401,34 @@ FtlMakeBbt:
 	bl	FlashProgPages
 	ldr	w0, [x25]
 	cmn	w0, #1
-	bne	.L2154
+	bne	.L2193
 	mov	w0, w27
 	bl	FtlBbmMapBadBlock
-	b	.L2155
-.L2156:
+	b	.L2194
+.L2195:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L2155
-.L2160:
+	b	.L2194
+.L2199:
 	mov	w0, w19
 	add	w19, w19, 1
 	bl	FtlBbmMapBadBlock
 	and	w19, w19, 65535
-	b	.L2159
-.L2163:
+	b	.L2198
+.L2202:
 	ldrh	w0, [x21]
 	cmp	w0, w22
-	bne	.L2164
+	bne	.L2203
 	strh	w19, [x21]
-	b	.L2162
-.L2164:
+	b	.L2201
+.L2203:
 	strh	w19, [x21, 4]
-.L2165:
-	adrp	x0, .LANCHOR78
-	add	x19, x20, :lo12:.LANCHOR75
-	ldrh	w1, [x20, #:lo12:.LANCHOR75]
+.L2204:
+	adrp	x0, .LANCHOR77
+	add	x19, x20, :lo12:.LANCHOR74
+	ldrh	w1, [x20, #:lo12:.LANCHOR74]
 	mov	w2, 2
-	ldr	x0, [x0, #:lo12:.LANCHOR78]
+	ldr	x0, [x0, #:lo12:.LANCHOR77]
 	str	wzr, [x19, 8]
 	lsl	w1, w1, 10
 	strh	wzr, [x19, 2]
@@ -15254,7 +15438,7 @@ FtlMakeBbt:
 	str	w1, [x0, 60]
 	mov	w1, 1
 	bl	FlashEraseBlocks
-	ldrh	w0, [x20, #:lo12:.LANCHOR75]
+	ldrh	w0, [x20, #:lo12:.LANCHOR74]
 	bl	FtlBbmMapBadBlock
 	ldrh	w0, [x19, 4]
 	bl	FtlBbmMapBadBlock
@@ -15264,11 +15448,11 @@ FtlMakeBbt:
 	ldrh	w1, [x19, 4]
 	add	w0, w0, 1
 	str	w0, [x19, 8]
-	ldrh	w0, [x20, #:lo12:.LANCHOR75]
+	ldrh	w0, [x20, #:lo12:.LANCHOR74]
 	strh	w0, [x19, 4]
-	strh	w1, [x20, #:lo12:.LANCHOR75]
+	strh	w1, [x20, #:lo12:.LANCHOR74]
 	bl	FtlBbmTblFlush
-.L2151:
+.L2190:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -15285,31 +15469,25 @@ FtlMakeBbt:
 log2phys:
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
+	stp	x25, x26, [sp, 64]
+	mov	w25, w0
+	adrp	x0, .LANCHOR56
 	stp	x23, x24, [sp, 48]
-	mov	x23, x1
-	adrp	x1, .LANCHOR57
 	stp	x19, x20, [sp, 16]
+	mov	x26, x1
+	ldrh	w24, [x0, #:lo12:.LANCHOR56]
+	adrp	x0, .LANCHOR72
 	stp	x21, x22, [sp, 32]
-	ldrh	w20, [x1, #:lo12:.LANCHOR57]
-	stp	x25, x26, [sp, 64]
-	add	w1, w20, 7
-	mov	x20, 1
+	mov	x19, x0
+	ldr	w1, [x0, #:lo12:.LANCHOR72]
 	stp	x27, x28, [sp, 80]
-	lsl	x20, x20, x1
-	sub	w20, w20, #1
-	and	w20, w20, w0
-	lsr	w22, w0, w1
-	and	w1, w20, 65535
-	stp	w2, w1, [x29, 120]
-	adrp	x1, .LANCHOR73
-	and	w21, w22, 65535
-	ldr	w1, [x1, #:lo12:.LANCHOR73]
-	cmp	w0, w1
-	bcc	.L2172
-	mov	w2, 880
-	adrp	x1, .LANCHOR227
+	str	w2, [x29, 116]
+	cmp	w25, w1
+	bcc	.L2211
+	mov	w2, 884
+	adrp	x1, .LANCHOR226
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR227
+	add	x1, x1, :lo12:.LANCHOR226
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -15317,37 +15495,44 @@ log2phys:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2172:
-	adrp	x19, .LANCHOR97
-	adrp	x0, .LANCHOR68
-	ldr	x2, [x19, #:lo12:.LANCHOR97]
-	ldrh	w1, [x0, #:lo12:.LANCHOR68]
+.L2211:
+	ldr	w0, [x19, #:lo12:.LANCHOR72]
+	cmp	w25, w0
+	bcs	.L2212
+	adrp	x19, .LANCHOR96
+	add	w24, w24, 7
+	adrp	x0, .LANCHOR67
+	ldr	x2, [x19, #:lo12:.LANCHOR96]
+	lsr	w23, w25, w24
+	and	w22, w23, 65535
+	ldrh	w1, [x0, #:lo12:.LANCHOR67]
 	mov	x0, 0
-.L2173:
-	and	x25, x0, 65535
-	cmp	w25, w1
-	bcc	.L2178
+.L2213:
+	and	x20, x0, 65535
+	cmp	w20, w1
+	bcc	.L2218
 	bl	select_l2p_ram_region
-	and	x25, x0, 65535
-	ldr	x1, [x19, #:lo12:.LANCHOR97]
-	ubfiz	x26, x25, 4, 16
-	add	x2, x1, x26
-	ldrh	w3, [x1, x26]
+	and	x20, x0, 65535
+	ldr	x1, [x19, #:lo12:.LANCHOR96]
+	ubfiz	x21, x20, 4, 16
+	add	x2, x1, x21
+	ldrh	w3, [x1, x21]
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L2179
+	beq	.L2219
 	ldr	w1, [x2, 4]
-	tbz	w1, #31, .L2179
+	tbz	w1, #31, .L2219
 	bl	flush_l2p_region
-.L2179:
-	adrp	x28, .LANCHOR67
-	ldrh	w0, [x28, #:lo12:.LANCHOR67]
-	cmp	w0, w21
-	bcs	.L2180
+.L2219:
+	adrp	x0, .LANCHOR66
+	str	x0, [x29, 104]
+	ldrh	w1, [x0, #:lo12:.LANCHOR66]
+	cmp	w1, w22
+	bcs	.L2220
 	mov	w2, 526
-	adrp	x1, .LANCHOR228
+	adrp	x1, .LANCHOR227
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR228
+	add	x1, x1, :lo12:.LANCHOR227
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -15355,118 +15540,133 @@ log2phys:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2180:
-	adrp	x24, .LANCHOR131
-	ubfiz	x0, x21, 2, 16
-	ldr	x1, [x24, #:lo12:.LANCHOR131]
+.L2220:
+	adrp	x27, .LANCHOR131
+	ubfiz	x0, x22, 2, 16
+	ldr	x1, [x27, #:lo12:.LANCHOR131]
 	ldr	w3, [x1, x0]
-	cbnz	w3, .L2181
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	adrp	x1, .LANCHOR58
-	add	x0, x0, x26
-	ldrh	w2, [x1, #:lo12:.LANCHOR58]
+	cbnz	w3, .L2221
+	ldr	x0, [x19, #:lo12:.LANCHOR96]
+	adrp	x1, .LANCHOR57
+	add	x0, x0, x21
+	ldrh	w2, [x1, #:lo12:.LANCHOR57]
 	mov	w1, 255
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	add	x1, x0, x26
-	strh	w21, [x0, x26]
+	ldr	x0, [x19, #:lo12:.LANCHOR96]
+	add	x1, x0, x21
+	strh	w22, [x0, x21]
 	str	wzr, [x1, 4]
-	b	.L2174
-.L2178:
-	add	x0, x0, 1
-	add	x3, x2, x0, lsl 4
-	ldrh	w3, [x3, -16]
-	cmp	w3, w21
-	bne	.L2173
-.L2174:
-	ldp	w0, w20, [x29, 120]
-	cbnz	w0, .L2175
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	add	x0, x0, x25, lsl 4
-	ldr	x0, [x0, 8]
-	ldr	w0, [x0, x20, lsl 2]
-	str	w0, [x23]
-.L2176:
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	add	x25, x0, x25, lsl 4
-	ldr	w0, [x25, 4]
-	cmn	w0, #1
-	beq	.L2186
-	add	w0, w0, 1
-	str	w0, [x25, 4]
-.L2186:
+	b	.L2215
+.L2212:
+	ldr	w1, [x29, 116]
+	mov	w0, -1
+	cbnz	w1, .L2210
+	str	w0, [x26]
+.L2210:
 	ldp	x19, x20, [sp, 16]
-	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2175:
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	ldr	w2, [x23]
-	add	x0, x0, x25, lsl 4
+.L2218:
+	add	x0, x0, 1
+	add	x3, x2, x0, lsl 4
+	ldrh	w3, [x3, -16]
+	cmp	w3, w22
+	bne	.L2213
+.L2215:
+	mov	x0, 1
+	lsl	x24, x0, x24
+	ldr	w0, [x29, 116]
+	sub	w24, w24, #1
+	and	w25, w24, w25
+	and	x25, x25, 65535
+	cbnz	w0, .L2216
+	ldr	x0, [x19, #:lo12:.LANCHOR96]
+	add	x0, x0, x20, lsl 4
+	ldr	x0, [x0, 8]
+	ldr	w0, [x0, x25, lsl 2]
+	str	w0, [x26]
+.L2217:
+	ldr	x0, [x19, #:lo12:.LANCHOR96]
+	add	x20, x0, x20, lsl 4
+	ldr	w0, [x20, 4]
+	cmn	w0, #1
+	beq	.L2226
+	add	w0, w0, 1
+	str	w0, [x20, 4]
+.L2226:
+	mov	w0, 0
+	b	.L2210
+.L2216:
+	ldr	x0, [x19, #:lo12:.LANCHOR96]
+	ldr	w2, [x26]
+	add	x0, x0, x20, lsl 4
 	ldr	x1, [x0, 8]
-	str	w2, [x1, x20, lsl 2]
+	str	w2, [x1, x25, lsl 2]
 	ldr	w1, [x0, 4]
 	orr	w1, w1, -2147483648
 	str	w1, [x0, 4]
-	adrp	x0, .LANCHOR98
-	strh	w21, [x0, #:lo12:.LANCHOR98]
-	b	.L2176
-.L2181:
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	adrp	x0, .LANCHOR97
+	strh	w22, [x0, #:lo12:.LANCHOR97]
+	b	.L2217
+.L2221:
+	ldr	x0, [x19, #:lo12:.LANCHOR96]
 	adrp	x5, .LANCHOR202
-	add	x20, x5, :lo12:.LANCHOR202
+	add	x28, x5, :lo12:.LANCHOR202
 	mov	w2, 1
-	add	x0, x0, x26
-	str	x5, [x29, 104]
-	str	w3, [x29, 116]
+	add	x0, x0, x21
+	str	x5, [x29, 96]
+	str	w3, [x29, 112]
 	mov	w1, w2
-	str	w3, [x20, 4]
+	str	w3, [x28, 4]
 	ldr	x0, [x0, 8]
-	str	x0, [x20, 8]
+	str	x0, [x28, 8]
 	adrp	x0, .LANCHOR188
 	ldr	x0, [x0, #:lo12:.LANCHOR188]
-	str	x0, [x20, 16]
-	mov	x0, x20
+	str	x0, [x28, 16]
+	mov	x0, x28
 	bl	FlashReadPages
-	ldr	x27, [x20, 16]
-	ldr	w3, [x29, 116]
-	ldr	x5, [x29, 104]
-	ldrh	w0, [x27, 8]
-	cmp	w0, w21
-	beq	.L2182
+	ldr	x0, [x28, 16]
+	str	x0, [x29, 120]
+	ldr	w3, [x29, 112]
+	ldr	x5, [x29, 96]
+	ldrh	w0, [x0, 8]
+	cmp	w0, w22
+	beq	.L2222
 	mov	w2, w3
-	and	w1, w22, 65535
-	adrp	x0, .LC54
-	add	x0, x0, :lo12:.LC54
+	and	w1, w23, 65535
+	adrp	x0, .LC53
+	add	x0, x0, :lo12:.LC53
 	bl	printf
-	ldr	x1, [x20, 16]
+	ldr	x1, [x28, 16]
 	mov	w3, 4
 	adrp	x0, .LC27
 	mov	w2, w3
 	add	x0, x0, :lo12:.LC27
 	bl	rknand_print_hex
-	ldr	x1, [x24, #:lo12:.LANCHOR131]
+	ldr	x0, [x29, 104]
 	mov	w2, 4
-	ldrh	w3, [x28, #:lo12:.LANCHOR67]
-	adrp	x0, .LC55
-	add	x0, x0, :lo12:.LC55
+	ldr	x1, [x27, #:lo12:.LANCHOR131]
+	ldrh	w3, [x0, #:lo12:.LANCHOR66]
+	adrp	x0, .LC54
+	add	x0, x0, :lo12:.LC54
 	bl	rknand_print_hex
-	adrp	x0, .LANCHOR77
+	adrp	x0, .LANCHOR76
 	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR77]
-.L2183:
-	ldrh	w0, [x27, 8]
-	cmp	w0, w21
-	beq	.L2184
+	str	w1, [x0, #:lo12:.LANCHOR76]
+.L2223:
+	ldr	x0, [x29, 120]
+	ldrh	w0, [x0, 8]
+	cmp	w0, w22
+	beq	.L2224
 	mov	w2, 552
-	adrp	x1, .LANCHOR228
+	adrp	x1, .LANCHOR227
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR228
+	add	x1, x1, :lo12:.LANCHOR227
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -15474,30 +15674,30 @@ log2phys:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2184:
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	add	x1, x0, x26
+.L2224:
+	ldr	x0, [x19, #:lo12:.LANCHOR96]
+	add	x1, x0, x21
 	str	wzr, [x1, 4]
-	strh	w21, [x0, x26]
-	b	.L2174
-.L2182:
+	strh	w22, [x0, x21]
+	b	.L2215
+.L2222:
 	ldr	w0, [x5, #:lo12:.LANCHOR202]
 	cmp	w0, 256
-	bne	.L2183
-	and	w22, w22, 65535
+	bne	.L2223
+	and	w23, w23, 65535
 	mov	w2, w3
-	mov	w1, w22
-	adrp	x0, .LC56
-	add	x0, x0, :lo12:.LC56
+	mov	w1, w23
+	adrp	x0, .LC55
+	add	x0, x0, :lo12:.LC55
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	mov	w1, w22
-	add	x0, x0, x26
+	ldr	x0, [x19, #:lo12:.LANCHOR96]
+	mov	w1, w23
+	add	x0, x0, x21
 	ldr	x2, [x0, 8]
 	adrp	x0, .LANCHOR127
 	add	x0, x0, :lo12:.LANCHOR127
 	bl	FtlMapWritePage
-	b	.L2183
+	b	.L2223
 	.size	log2phys, .-log2phys
 	.section	.text.FtlProgPages,"ax",@progbits
 	.align	2
@@ -15507,47 +15707,47 @@ FtlProgPages:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR77
+	adrp	x23, .LANCHOR76
 	stp	x19, x20, [sp, 16]
-	ldr	w2, [x23, #:lo12:.LANCHOR77]
+	ldr	w2, [x23, #:lo12:.LANCHOR76]
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
-	cbnz	w2, .L2191
-	adrp	x2, .LANCHOR8
-	ldrb	w2, [x2, #:lo12:.LANCHOR8]
-	cbz	w2, .L2206
+	cbnz	w2, .L2229
+	adrp	x2, .LANCHOR15
+	ldrb	w2, [x2, #:lo12:.LANCHOR15]
+	cbz	w2, .L2244
 	ldrb	w2, [x3, 8]
 	cmp	w2, 1
 	cset	w22, eq
-.L2193:
+.L2231:
 	mov	x20, x3
 	ldrb	w3, [x3, 9]
 	mov	w21, w1
 	mov	x19, x0
 	mov	w2, w22
-	adrp	x25, .LANCHOR53
+	adrp	x25, .LANCHOR52
 	adrp	x24, .LANCHOR138
-	add	x25, x25, :lo12:.LANCHOR53
+	add	x25, x25, :lo12:.LANCHOR52
 	bl	FlashProgPages
 	add	x24, x24, :lo12:.LANCHOR138
 	mov	w1, 56
 	umaddl	x21, w21, w1, x19
-.L2194:
+.L2232:
 	cmp	x19, x21
-	beq	.L2203
-	adrp	x26, .LANCHOR84
-	b	.L2204
-.L2206:
+	beq	.L2241
+	adrp	x26, .LANCHOR83
+	b	.L2242
+.L2244:
 	mov	w22, 0
-	b	.L2193
-.L2197:
+	b	.L2231
+.L2235:
 	ldr	w0, [x19, 4]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	ldrh	w1, [x20]
 	cmp	w1, w0, uxth
-	bne	.L2195
-	ldr	x2, [x26, #:lo12:.LANCHOR84]
+	bne	.L2233
+	ldr	x2, [x26, #:lo12:.LANCHOR83]
 	ubfiz	x1, x1, 1, 16
 	ldrh	w3, [x20, 4]
 	ldrh	w0, [x2, x1]
@@ -15557,12 +15757,12 @@ FtlProgPages:
 	ldrh	w0, [x25]
 	strh	w0, [x20, 2]
 	strh	wzr, [x20, 4]
-.L2195:
+.L2233:
 	ldrh	w0, [x20, 4]
-	cbnz	w0, .L2196
+	cbnz	w0, .L2234
 	mov	x0, x20
 	bl	allocate_new_data_superblock
-.L2196:
+.L2234:
 	ldr	w0, [x24, 96]
 	add	w0, w0, 1
 	str	w0, [x24, 96]
@@ -15578,21 +15778,21 @@ FtlProgPages:
 	ldrb	w3, [x20, 9]
 	mov	x0, x19
 	bl	FlashProgPages
-	ldr	w0, [x23, #:lo12:.LANCHOR77]
-	cbnz	w0, .L2191
-.L2204:
+	ldr	w0, [x23, #:lo12:.LANCHOR76]
+	cbnz	w0, .L2229
+.L2242:
 	ldr	w0, [x19]
 	cmn	w0, #1
-	beq	.L2197
+	beq	.L2235
 	adrp	x0, .LANCHOR38
 	ldrb	w1, [x20, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w1, w0
-	bcc	.L2198
+	bcc	.L2236
 	mov	w2, 1583
-	adrp	x1, .LANCHOR229
+	adrp	x1, .LANCHOR228
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR229
+	add	x1, x1, :lo12:.LANCHOR228
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -15600,10 +15800,10 @@ FtlProgPages:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2198:
+.L2236:
 	ldr	w0, [x19, 4]
-	cbnz	w22, .L2199
-.L2211:
+	cbnz	w22, .L2237
+.L2249:
 	str	w0, [x29, 92]
 	add	x1, x29, 92
 	ldr	w0, [x19, 24]
@@ -15616,35 +15816,35 @@ FtlProgPages:
 	and	w1, w0, 65535
 	mov	w26, w1
 	cmn	w3, #1
-	beq	.L2201
-	adrp	x2, .LANCHOR84
+	beq	.L2239
+	adrp	x2, .LANCHOR83
 	ubfiz	x0, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR84]
+	ldr	x2, [x2, #:lo12:.LANCHOR83]
 	ldrh	w0, [x2, x0]
-	cbnz	w0, .L2202
-	adrp	x0, .LC57
+	cbnz	w0, .L2240
+	adrp	x0, .LC56
 	mov	w2, 0
-	add	x0, x0, :lo12:.LC57
+	add	x0, x0, :lo12:.LC56
 	bl	printf
-.L2202:
+.L2240:
 	mov	w0, w26
 	bl	decrement_vpc_count
-.L2201:
+.L2239:
 	add	x19, x19, 56
-	b	.L2194
-.L2199:
+	b	.L2232
+.L2237:
 	orr	w0, w0, -2147483648
-	b	.L2211
-.L2203:
+	b	.L2249
+.L2241:
 	adrp	x0, .LANCHOR38
 	ldrb	w1, [x20, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w1, w0
-	bcc	.L2191
+	bcc	.L2229
 	mov	w2, 1600
-	adrp	x1, .LANCHOR229
+	adrp	x1, .LANCHOR228
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR229
+	add	x1, x1, :lo12:.LANCHOR228
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -15652,7 +15852,7 @@ FtlProgPages:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2191:
+.L2229:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -15665,27 +15865,27 @@ FtlProgPages:
 	.global	FtlCacheWriteBack
 	.type	FtlCacheWriteBack, %function
 FtlCacheWriteBack:
-	adrp	x0, .LANCHOR77
-	ldr	w0, [x0, #:lo12:.LANCHOR77]
-	cbnz	w0, .L2218
+	adrp	x0, .LANCHOR76
+	ldr	w0, [x0, #:lo12:.LANCHOR76]
+	cbnz	w0, .L2256
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	adrp	x19, .LANCHOR132
 	ldr	x0, [x19, #:lo12:.LANCHOR132]
-	cbz	x0, .L2213
-	adrp	x1, .LANCHOR230
+	cbz	x0, .L2251
+	adrp	x1, .LANCHOR229
 	mov	w2, 0
-	ldr	x3, [x1, #:lo12:.LANCHOR230]
+	ldr	x3, [x1, #:lo12:.LANCHOR229]
 	mov	w1, 1
 	bl	FtlProgPages
 	str	xzr, [x19, #:lo12:.LANCHOR132]
-.L2213:
+.L2251:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2218:
+.L2256:
 	mov	w0, 0
 	ret
 	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
@@ -15694,9 +15894,9 @@ FtlCacheWriteBack:
 	.global	FtlSysFlush
 	.type	FtlSysFlush, %function
 FtlSysFlush:
-	adrp	x0, .LANCHOR77
-	ldr	w0, [x0, #:lo12:.LANCHOR77]
-	cbnz	w0, .L2224
+	adrp	x0, .LANCHOR76
+	ldr	w0, [x0, #:lo12:.LANCHOR76]
+	cbnz	w0, .L2262
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	FtlCacheWriteBack
@@ -15707,7 +15907,7 @@ FtlSysFlush:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L2224:
+.L2262:
 	mov	w0, 0
 	ret
 	.size	FtlSysFlush, .-FtlSysFlush
@@ -15716,17 +15916,17 @@ FtlSysFlush:
 	.global	FtlDeInit
 	.type	FtlDeInit, %function
 FtlDeInit:
-	adrp	x0, .LANCHOR231
-	ldr	w0, [x0, #:lo12:.LANCHOR231]
+	adrp	x0, .LANCHOR230
+	ldr	w0, [x0, #:lo12:.LANCHOR230]
 	cmp	w0, 1
-	bne	.L2230
+	bne	.L2268
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	FtlSysFlush
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L2230:
+.L2268:
 	mov	w0, 0
 	ret
 	.size	FtlDeInit, .-FtlDeInit
@@ -15748,70 +15948,70 @@ rk_ftl_de_init:
 	.type	ftl_discard, %function
 ftl_discard:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR69
+	adrp	x0, .LANCHOR68
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w20, w1
-	ldr	w0, [x0, #:lo12:.LANCHOR69]
+	ldr	w0, [x0, #:lo12:.LANCHOR68]
 	add	w1, w1, w2
 	stp	x21, x22, [sp, 32]
 	str	x23, [sp, 48]
 	cmp	w1, w0
-	bhi	.L2243
+	bhi	.L2281
 	mov	w19, w2
 	cmp	w2, 31
-	bhi	.L2237
-.L2251:
+	bhi	.L2275
+.L2289:
 	mov	w0, 0
-.L2235:
+.L2273:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2237:
-	adrp	x0, .LANCHOR77
-	ldr	w0, [x0, #:lo12:.LANCHOR77]
-	cbnz	w0, .L2251
-	adrp	x22, .LANCHOR56
+.L2275:
+	adrp	x0, .LANCHOR76
+	ldr	w0, [x0, #:lo12:.LANCHOR76]
+	cbnz	w0, .L2289
+	adrp	x22, .LANCHOR55
 	bl	FtlCacheWriteBack
-	ldrh	w0, [x22, #:lo12:.LANCHOR56]
+	ldrh	w0, [x22, #:lo12:.LANCHOR55]
 	udiv	w21, w20, w0
 	msub	w20, w0, w21, w20
 	ands	w20, w20, 65535
-	beq	.L2239
+	beq	.L2277
 	sub	w0, w0, w20
 	add	w21, w21, 1
 	cmp	w0, w19
 	csel	w0, w0, w19, ls
 	sub	w19, w19, w0, uxth
-.L2239:
-	adrp	x20, .LANCHOR232
+.L2277:
+	adrp	x20, .LANCHOR231
 	adrp	x23, .LANCHOR163
-	add	x20, x20, :lo12:.LANCHOR232
+	add	x20, x20, :lo12:.LANCHOR231
 	add	x23, x23, :lo12:.LANCHOR163
 	mov	w0, -1
 	str	w0, [x29, 76]
-.L2240:
-	ldrh	w0, [x22, #:lo12:.LANCHOR56]
+.L2278:
+	ldrh	w0, [x22, #:lo12:.LANCHOR55]
 	cmp	w19, w0
-	bcs	.L2242
-	adrp	x0, .LANCHOR232
-	ldr	w1, [x0, #:lo12:.LANCHOR232]
+	bcs	.L2280
+	adrp	x0, .LANCHOR231
+	ldr	w1, [x0, #:lo12:.LANCHOR231]
 	cmp	w1, 32
-	bls	.L2251
-	str	wzr, [x0, #:lo12:.LANCHOR232]
+	bls	.L2289
+	str	wzr, [x0, #:lo12:.LANCHOR231]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L2251
-.L2242:
+	b	.L2289
+.L2280:
 	mov	w2, 0
 	add	x1, x29, 72
 	mov	w0, w21
 	bl	log2phys
 	ldr	w0, [x29, 72]
 	cmn	w0, #1
-	beq	.L2241
+	beq	.L2279
 	ldr	w0, [x20]
 	mov	w2, 1
 	add	x1, x29, 76
@@ -15826,14 +16026,14 @@ ftl_discard:
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L2241:
-	ldrh	w0, [x22, #:lo12:.LANCHOR56]
+.L2279:
+	ldrh	w0, [x22, #:lo12:.LANCHOR55]
 	add	w21, w21, 1
 	sub	w19, w19, w0
-	b	.L2240
-.L2243:
+	b	.L2278
+.L2281:
 	mov	w0, -1
-	b	.L2235
+	b	.L2273
 	.size	ftl_discard, .-ftl_discard
 	.section	.text.Ftlscanalldata,"ax",@progbits
 	.align	2
@@ -15841,46 +16041,46 @@ ftl_discard:
 	.type	Ftlscanalldata, %function
 Ftlscanalldata:
 	sub	sp, sp, #96
-	adrp	x0, .LC58
+	adrp	x0, .LC57
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC58
+	add	x0, x0, :lo12:.LC57
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x19, x20, [sp, 32]
 	adrp	x20, .LANCHOR202
 	stp	x21, x22, [sp, 48]
 	mov	w19, 0
-	adrp	x21, .LANCHOR73
+	adrp	x21, .LANCHOR72
 	add	x22, x20, :lo12:.LANCHOR202
-	add	x21, x21, :lo12:.LANCHOR73
+	add	x21, x21, :lo12:.LANCHOR72
 	str	x23, [sp, 64]
 	bl	printf
-.L2253:
+.L2291:
 	ldr	w0, [x21]
 	cmp	w19, w0
-	bcc	.L2259
+	bcc	.L2297
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x29, x30, [sp, 16]
 	ldr	x23, [sp, 64]
 	add	sp, sp, 96
 	ret
-.L2259:
+.L2297:
 	mov	w2, 0
 	add	x1, x29, 76
 	mov	w0, w19
 	bl	log2phys
 	tst	x19, 2047
-	bne	.L2254
+	bne	.L2292
 	ldr	w2, [x29, 76]
-	adrp	x0, .LC59
+	adrp	x0, .LC58
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC59
+	add	x0, x0, :lo12:.LC58
 	bl	printf
-.L2254:
+.L2292:
 	ldr	w1, [x29, 76]
 	cmn	w1, #1
-	beq	.L2256
+	beq	.L2294
 	add	x0, x20, :lo12:.LANCHOR202
 	str	wzr, [x20, #:lo12:.LANCHOR202]
 	mov	w2, 0
@@ -15897,25 +16097,25 @@ Ftlscanalldata:
 	ldr	w0, [x20, #:lo12:.LANCHOR202]
 	cmp	w0, 256
 	ccmn	w0, #1, 4, ne
-	beq	.L2257
+	beq	.L2295
 	ldr	w0, [x23, 8]
 	cmp	w19, w0
-	beq	.L2256
-.L2257:
+	beq	.L2294
+.L2295:
 	ldp	x1, x0, [x22, 8]
 	ldr	w2, [x1, 4]
 	str	w2, [sp]
 	ldr	w2, [x22, 4]
 	ldp	w3, w4, [x0]
 	ldp	w5, w6, [x0, 8]
-	adrp	x0, .LC60
+	adrp	x0, .LC59
 	ldr	w7, [x1]
-	add	x0, x0, :lo12:.LC60
+	add	x0, x0, :lo12:.LC59
 	mov	w1, w19
 	bl	printf
-.L2256:
+.L2294:
 	add	w19, w19, 1
-	b	.L2253
+	b	.L2291
 	.size	Ftlscanalldata, .-Ftlscanalldata
 	.section	.text.FtlReUsePrevPpa,"ax",@progbits
 	.align	2
@@ -15925,47 +16125,47 @@ FtlReUsePrevPpa:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR84
+	adrp	x22, .LANCHOR83
 	stp	x19, x20, [sp, 16]
 	mov	w21, w0
 	str	w1, [x29, 76]
 	lsr	w0, w1, 10
 	str	x23, [sp, 48]
 	bl	P2V_block_in_plane
-	ldr	x2, [x22, #:lo12:.LANCHOR84]
+	ldr	x2, [x22, #:lo12:.LANCHOR83]
 	and	w3, w0, 65535
 	ubfiz	x20, x3, 1, 16
 	ldrh	w1, [x2, x20]
-	cbnz	w1, .L2262
-	adrp	x0, .LANCHOR88
-	ldr	x19, [x0, #:lo12:.LANCHOR88]
-	cbz	x19, .L2263
-	adrp	x2, .LANCHOR82
+	cbnz	w1, .L2300
+	adrp	x0, .LANCHOR87
+	ldr	x19, [x0, #:lo12:.LANCHOR87]
+	cbz	x19, .L2301
+	adrp	x2, .LANCHOR81
 	mov	x5, -6148914691236517206
 	movk	x5, 0xaaab, lsl 0
-	adrp	x23, .LANCHOR89
-	ldr	x2, [x2, #:lo12:.LANCHOR82]
+	adrp	x23, .LANCHOR88
+	ldr	x2, [x2, #:lo12:.LANCHOR81]
 	mov	w6, 65535
-	ldrh	w4, [x23, #:lo12:.LANCHOR89]
+	ldrh	w4, [x23, #:lo12:.LANCHOR88]
 	sub	x19, x19, x2
 	asr	x19, x19, 1
 	mul	x19, x19, x5
 	mov	w5, 6
 	and	w19, w19, 65535
-.L2264:
+.L2302:
 	cmp	w1, w4
-	beq	.L2263
+	beq	.L2301
 	cmp	w19, w3
-	bne	.L2265
+	bne	.L2303
 	mov	w1, w19
-	add	x0, x0, :lo12:.LANCHOR88
+	add	x0, x0, :lo12:.LANCHOR87
 	bl	List_remove_node
-	ldrh	w0, [x23, #:lo12:.LANCHOR89]
-	cbnz	w0, .L2266
-	mov	w2, 2070
-	adrp	x1, .LANCHOR233
+	ldrh	w0, [x23, #:lo12:.LANCHOR88]
+	cbnz	w0, .L2304
+	mov	w2, 2097
+	adrp	x1, .LANCHOR232
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR233
+	add	x1, x1, :lo12:.LANCHOR232
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -15973,17 +16173,17 @@ FtlReUsePrevPpa:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2266:
-	ldrh	w0, [x23, #:lo12:.LANCHOR89]
+.L2304:
+	ldrh	w0, [x23, #:lo12:.LANCHOR88]
 	sub	w0, w0, #1
-	strh	w0, [x23, #:lo12:.LANCHOR89]
+	strh	w0, [x23, #:lo12:.LANCHOR88]
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-	ldr	x1, [x22, #:lo12:.LANCHOR84]
+	ldr	x1, [x22, #:lo12:.LANCHOR83]
 	ldrh	w0, [x1, x20]
 	add	w0, w0, 1
 	strh	w0, [x1, x20]
-.L2263:
+.L2301:
 	add	x1, x29, 76
 	mov	w2, 1
 	mov	w0, w21
@@ -15993,18 +16193,18 @@ FtlReUsePrevPpa:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2265:
+.L2303:
 	umull	x19, w19, w5
 	ldrh	w19, [x2, x19]
 	cmp	w19, w6
-	beq	.L2263
+	beq	.L2301
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L2264
-.L2262:
+	b	.L2302
+.L2300:
 	add	w1, w1, 1
 	strh	w1, [x2, x20]
-	b	.L2263
+	b	.L2301
 	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
 	.section	.text.FtlRecoverySuperblock,"ax",@progbits
 	.align	2
@@ -16022,19 +16222,19 @@ FtlRecoverySuperblock:
 	stp	x25, x26, [sp, 64]
 	cmp	w0, w1
 	stp	x27, x28, [sp, 80]
-	beq	.L2430
+	beq	.L2469
 	ldrb	w0, [x19, 6]
 	str	w0, [x29, 180]
-	adrp	x0, .LANCHOR53
+	adrp	x0, .LANCHOR52
 	ldrh	w26, [x19, 2]
 	str	x0, [x29, 144]
-	ldrh	w2, [x0, #:lo12:.LANCHOR53]
+	ldrh	w2, [x0, #:lo12:.LANCHOR52]
 	cmp	w2, w26
-	bne	.L2275
+	bne	.L2313
 	strh	wzr, [x19, 4]
-.L2437:
+.L2476:
 	strb	wzr, [x19, 6]
-.L2430:
+.L2469:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -16043,35 +16243,35 @@ FtlRecoverySuperblock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 208
 	ret
-.L2275:
+.L2313:
 	ldrh	w0, [x19, 16]
 	mov	w21, 0
-.L2276:
+.L2314:
 	cmp	w0, w1
-	beq	.L2277
+	beq	.L2315
 	ldrb	w1, [x19, 8]
 	cmp	w1, 1
-	bne	.L2278
+	bne	.L2316
 	bl	FtlGetLastWrittenPage
 	mov	w20, w0
 	cmn	w0, #1
-	beq	.L2279
-	adrp	x0, .LANCHOR8
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbnz	w0, .L2355
+	beq	.L2317
+	adrp	x0, .LANCHOR15
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	cbnz	w0, .L2394
 	adrp	x0, .LANCHOR16
 	add	x0, x0, :lo12:.LANCHOR16
 	ldrh	w23, [x0, w20, sxtw 1]
-.L2280:
-	adrp	x1, .LANCHOR106
+.L2318:
+	adrp	x1, .LANCHOR105
 	adrp	x2, .LANCHOR38
 	adrp	x22, .LANCHOR180
 	add	x4, x19, 16
-	ldr	x6, [x1, #:lo12:.LANCHOR106]
-	adrp	x1, .LANCHOR59
+	ldr	x6, [x1, #:lo12:.LANCHOR105]
+	adrp	x1, .LANCHOR58
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	mov	w27, 0
-	ldrh	w7, [x1, #:lo12:.LANCHOR59]
+	ldrh	w7, [x1, #:lo12:.LANCHOR58]
 	add	x1, x19, 16
 	str	x1, [x29, 184]
 	mov	w8, 65535
@@ -16080,24 +16280,24 @@ FtlRecoverySuperblock:
 	str	x2, [x29, 160]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.L2281:
+.L2319:
 	cmp	x1, x4
-	bne	.L2285
+	bne	.L2323
 	ldrb	w1, [x19, 8]
 	cmp	w1, 1
-	bne	.L2356
-	adrp	x1, .LANCHOR8
-	ldrb	w1, [x1, #:lo12:.LANCHOR8]
+	bne	.L2395
+	adrp	x1, .LANCHOR15
+	ldrb	w1, [x1, #:lo12:.LANCHOR15]
 	cmp	w1, 0
 	cset	w1, ne
 	str	w1, [x29, 176]
-.L2286:
+.L2324:
 	ldr	w2, [x29, 176]
 	mov	w1, w27
-	adrp	x24, .LC61
-	adrp	x25, .LANCHOR235
-	add	x24, x24, :lo12:.LC61
-	add	x25, x25, :lo12:.LANCHOR235
+	adrp	x24, .LC60
+	adrp	x25, .LANCHOR234
+	add	x24, x24, :lo12:.LC60
+	add	x25, x25, :lo12:.LANCHOR234
 	mov	x28, 0
 	bl	FlashReadPages
 	adrp	x0, .LANCHOR160
@@ -16105,71 +16305,71 @@ FtlRecoverySuperblock:
 	str	x0, [x29, 168]
 	ldr	w21, [x0, #:lo12:.LANCHOR160]
 	sub	w21, w21, #1
-.L2287:
+.L2325:
 	and	w0, w28, 65535
 	cmp	w27, w0
-	bhi	.L2292
-	bne	.L2290
+	bhi	.L2330
+	bne	.L2328
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	ldr	w0, [x0, 4]
-.L2432:
+.L2471:
 	lsr	w0, w0, 10
 	bl	P2V_plane
 	ldrb	w1, [x19, 8]
 	and	w27, w0, 65535
 	cmp	w1, 1
-	bne	.L2294
-	adrp	x0, .LANCHOR8
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbnz	w0, .L2294
+	bne	.L2332
+	adrp	x0, .LANCHOR15
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	cbnz	w0, .L2332
 	adrp	x0, .LANCHOR16
 	add	x0, x0, :lo12:.LANCHOR16
 	ldrh	w20, [x0, w20, sxtw 1]
-.L2294:
+.L2332:
 	ldr	x0, [x29, 144]
-	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w20
-	bne	.L2295
+	bne	.L2333
 	strh	w20, [x19, 2]
 	strb	wzr, [x19, 6]
 	strh	wzr, [x19, 4]
-.L2295:
+.L2333:
 	ldr	w0, [x29, 180]
 	cmp	w20, w26
 	cset	w2, eq
 	cmp	w27, w0
 	cset	w0, eq
 	tst	w2, w0
-	beq	.L2296
-.L2438:
+	beq	.L2334
+.L2477:
 	mov	w2, w27
 	mov	w1, w20
 	mov	x0, x19
 	bl	ftl_sb_update_avl_pages
-	b	.L2430
-.L2277:
+	b	.L2469
+.L2315:
 	add	w21, w21, 1
 	and	w21, w21, 65535
 	add	x0, x19, x21, sxtw 1
 	ldrh	w0, [x0, 16]
-	b	.L2276
-.L2278:
+	b	.L2314
+.L2316:
 	mov	w1, 0
 	bl	FtlGetLastWrittenPage
 	mov	w20, w0
 	cmn	w0, #1
-	beq	.L2279
-.L2355:
+	beq	.L2317
+.L2394:
 	mov	w23, w20
-	b	.L2280
-.L2279:
-	cbz	w26, .L2282
-	mov	w2, 2141
-	adrp	x1, .LANCHOR234
+	b	.L2318
+.L2317:
+	cbz	w26, .L2320
+	mov	w2, 2168
+	adrp	x1, .LANCHOR233
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR234
+	add	x1, x1, :lo12:.LANCHOR233
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -16177,15 +16377,15 @@ FtlRecoverySuperblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2282:
+.L2320:
 	ldr	w0, [x29, 180]
 	cmp	w0, 0
 	ccmp	w21, w0, 4, ne
-	beq	.L2283
-	mov	w2, 2142
-	adrp	x1, .LANCHOR234
+	beq	.L2321
+	mov	w2, 2169
+	adrp	x1, .LANCHOR233
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR234
+	add	x1, x1, :lo12:.LANCHOR233
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -16193,13 +16393,13 @@ FtlRecoverySuperblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2283:
+.L2321:
 	strh	wzr, [x19, 2]
-	b	.L2437
-.L2285:
+	b	.L2476
+.L2323:
 	ldrh	w2, [x4]
 	cmp	w2, w8
-	beq	.L2284
+	beq	.L2322
 	umaddl	x5, w27, w10, x0
 	orr	w2, w23, w2, lsl 10
 	add	w3, w27, 1
@@ -16210,81 +16410,81 @@ FtlRecoverySuperblock:
 	asr	w2, w2, 2
 	add	x2, x6, x2, sxtw 2
 	str	x2, [x5, 16]
-.L2284:
+.L2322:
 	add	x4, x4, 2
-	b	.L2281
-.L2356:
+	b	.L2319
+.L2395:
 	str	wzr, [x29, 176]
-	b	.L2286
-.L2292:
+	b	.L2324
+.L2330:
 	mov	x0, 56
 	ldr	x2, [x22, #:lo12:.LANCHOR180]
 	mul	x0, x28, x0
 	add	x1, x2, x0
 	ldr	w0, [x2, x0]
-	cbnz	w0, .L2288
+	cbnz	w0, .L2326
 	ldr	x6, [x1, 16]
 	ldr	w4, [x6, 4]
 	cmn	w4, #1
-	beq	.L2289
+	beq	.L2327
 	ldr	x0, [x29, 168]
 	ldr	w1, [x0, #:lo12:.LANCHOR160]
 	mov	w0, w4
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2289
+	cbz	w0, .L2327
 	ldr	x0, [x29, 168]
 	add	w4, w4, 1
 	str	w4, [x0, #:lo12:.LANCHOR160]
-.L2289:
+.L2327:
 	ldr	w0, [x6]
 	cmn	w0, #1
-	bne	.L2291
-.L2290:
+	bne	.L2329
+.L2328:
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	and	x28, x28, 65535
 	mov	x1, 56
 	and	w20, w20, 65535
 	madd	x28, x28, x1, x0
 	ldr	w0, [x28, 4]
-	b	.L2432
-.L2288:
+	b	.L2471
+.L2326:
 	ldr	w1, [x1, 4]
 	mov	x0, x24
 	bl	printf
 	ldrh	w0, [x19]
 	and	w5, w23, 65535
 	strh	w0, [x25]
-.L2291:
+.L2329:
 	add	x28, x28, 1
-	b	.L2287
-.L2296:
+	b	.L2325
+.L2334:
 	mov	w0, 65535
 	cmp	w5, w0
-	bne	.L2297
-	cbnz	w1, .L2298
-.L2297:
+	bne	.L2335
+	cbnz	w1, .L2336
+.L2335:
 	adrp	x24, .LANCHOR136
 	and	w6, w23, 65535
 	ldr	w0, [x24, #:lo12:.LANCHOR136]
 	cmn	w0, #1
-	bne	.L2299
+	bne	.L2337
 	str	w21, [x24, #:lo12:.LANCHOR136]
-.L2299:
+.L2337:
 	add	w0, w26, 7
 	ldr	w7, [x24, #:lo12:.LANCHOR136]
 	cmp	w0, w23, uxth
-	bge	.L2357
+	bge	.L2396
 	sub	w23, w6, #7
 	and	w23, w23, 65535
-.L2300:
+.L2338:
 	mov	w3, -1
 	adrp	x5, .LANCHOR120
 	mov	w28, w3
 	add	x5, x5, :lo12:.LANCHOR120
 	mov	w4, 65535
-.L2301:
+.L2339:
 	cmp	w23, w6
-	bhi	.L2316
+	bhi	.L2354
 	ldr	x1, [x29, 160]
 	mov	w25, 0
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
@@ -16293,24 +16493,24 @@ FtlRecoverySuperblock:
 	ldrh	w1, [x1, #:lo12:.LANCHOR38]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-	b	.L2317
-.L2357:
+	b	.L2355
+.L2396:
 	mov	w23, w26
-	b	.L2300
-.L2303:
+	b	.L2338
+.L2341:
 	ldrh	w8, [x2]
 	cmp	w8, w4
-	beq	.L2302
+	beq	.L2340
 	umaddl	x11, w25, w10, x0
 	add	w25, w25, 1
 	and	w25, w25, 65535
 	orr	w8, w23, w8, lsl 10
 	str	w8, [x11, 4]
-.L2302:
+.L2340:
 	add	x2, x2, 2
-.L2317:
+.L2355:
 	cmp	x2, x1
-	bne	.L2303
+	bne	.L2341
 	ldr	w2, [x29, 176]
 	mov	w1, w25
 	str	x5, [x29, 112]
@@ -16319,11 +16519,11 @@ FtlRecoverySuperblock:
 	str	w6, [x29, 136]
 	str	w3, [x29, 152]
 	bl	FlashReadPages
-	adrp	x1, .LANCHOR8
+	adrp	x1, .LANCHOR15
 	mov	w2, 56
 	ldr	w0, [x24, #:lo12:.LANCHOR136]
 	sxtw	x12, w23
-	ldrb	w10, [x1, #:lo12:.LANCHOR8]
+	ldrb	w10, [x1, #:lo12:.LANCHOR15]
 	mov	w11, 1
 	ldr	x1, [x22, #:lo12:.LANCHOR180]
 	ldr	w4, [x29, 120]
@@ -16334,81 +16534,81 @@ FtlRecoverySuperblock:
 	umaddl	x25, w25, w2, x1
 	ldr	x5, [x29, 112]
 	mov	w2, 0
-.L2304:
+.L2342:
 	cmp	x25, x1
-	bne	.L2314
-	cbz	w2, .L2315
+	bne	.L2352
+	cbz	w2, .L2353
 	str	w0, [x24, #:lo12:.LANCHOR136]
-.L2315:
+.L2353:
 	add	w23, w23, 1
 	and	w23, w23, 65535
-	b	.L2301
-.L2314:
+	b	.L2339
+.L2352:
 	ldr	w8, [x1]
-	cbnz	w8, .L2305
+	cbnz	w8, .L2343
 	ldr	x8, [x1, 16]
 	ldrh	w13, [x8]
 	cmp	w13, w4
-	beq	.L2359
+	beq	.L2398
 	ldr	w8, [x8, 4]
 	cmn	w8, #1
-	beq	.L2359
+	beq	.L2398
 	cmn	w3, #1
-	bne	.L2361
+	bne	.L2400
 	ldrh	w2, [x5, x12, lsl 1]
 	cmp	w2, w4
-	bne	.L2307
-	cbz	w10, .L2361
-.L2307:
+	bne	.L2345
+	cbz	w10, .L2400
+.L2345:
 	cmp	w21, w0
 	mov	w2, w11
 	csel	w3, w3, w0, eq
-.L2306:
+.L2344:
 	mov	w28, w0
 	add	x1, x1, 56
 	mov	w0, w8
-	b	.L2304
-.L2305:
-	cbz	w2, .L2308
+	b	.L2342
+.L2343:
+	cbz	w2, .L2346
 	str	w0, [x24, #:lo12:.LANCHOR136]
-.L2308:
-	adrp	x0, .LANCHOR235
+.L2346:
+	adrp	x0, .LANCHOR234
 	ldrh	w1, [x19]
-	strh	w1, [x0, #:lo12:.LANCHOR235]
+	strh	w1, [x0, #:lo12:.LANCHOR234]
 	ldrb	w0, [x19, 8]
-	cbnz	w0, .L2298
+	cbnz	w0, .L2336
 	adrp	x0, .LANCHOR120
 	add	x0, x0, :lo12:.LANCHOR120
 	ldrh	w1, [x0, w23, sxtw 1]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2310
+	bne	.L2348
 	cmn	w3, #1
-	beq	.L2311
+	beq	.L2349
 	str	w3, [x24, #:lo12:.LANCHOR136]
-.L2298:
-	adrp	x0, .LANCHOR236
+.L2336:
+	adrp	x0, .LANCHOR235
 	mov	w23, w26
 	mov	w1, 1
 	adrp	x28, .LANCHOR136
-	strh	w1, [x0, #:lo12:.LANCHOR236]
+	strh	w1, [x0, #:lo12:.LANCHOR235]
 	add	x0, x28, :lo12:.LANCHOR136
 	str	x0, [x29, 112]
-.L2318:
+.L2356:
 	ldr	x2, [x29, 160]
-	adrp	x1, .LANCHOR8
+	adrp	x1, .LANCHOR15
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	mov	w24, 0
-	ldrb	w5, [x1, #:lo12:.LANCHOR8]
+	ldrb	w5, [x1, #:lo12:.LANCHOR15]
 	mov	w6, 65535
 	ldr	x3, [x29, 184]
 	ldrh	w2, [x2, #:lo12:.LANCHOR38]
 	str	x1, [x29, 128]
 	add	x2, x2, 8
 	add	x2, x19, x2, lsl 1
-.L2319:
+.L2357:
 	cmp	x2, x3
-	bne	.L2322
+	bne	.L2360
 	ldr	w2, [x29, 176]
 	mov	w1, w24
 	mov	x25, 0
@@ -16416,103 +16616,103 @@ FtlRecoverySuperblock:
 	mov	w0, 56
 	umull	x0, w24, w0
 	str	x0, [x29, 136]
-	adrp	x0, .LANCHOR235
-	add	x0, x0, :lo12:.LANCHOR235
+	adrp	x0, .LANCHOR234
+	add	x0, x0, :lo12:.LANCHOR234
 	str	x0, [x29, 120]
-.L2323:
+.L2361:
 	ldr	x0, [x29, 136]
 	cmp	x25, x0
-	bne	.L2348
+	bne	.L2387
 	ldrb	w0, [x19, 8]
 	add	w23, w23, 1
 	and	w23, w23, 65535
 	cmp	w0, 1
-	bne	.L2349
+	bne	.L2388
 	ldr	x0, [x29, 128]
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L2349
-	adrp	x0, .LANCHOR54
-	ldrh	w0, [x0, #:lo12:.LANCHOR54]
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	cbz	w0, .L2388
+	adrp	x0, .LANCHOR53
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w23
-	bne	.L2349
+	bne	.L2388
 	cmp	w20, w23
-	beq	.L2325
-.L2349:
+	beq	.L2363
+.L2388:
 	ldr	x0, [x29, 144]
-	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w23
-	bne	.L2318
+	bne	.L2356
 	ldr	x0, [x29, 160]
 	mov	w2, 65535
 	strh	w23, [x19, 2]
 	strh	wzr, [x19, 4]
 	ldrh	w1, [x0, #:lo12:.LANCHOR38]
 	mov	w0, 0
-.L2350:
+.L2389:
 	cmp	w0, w1
-	beq	.L2430
+	beq	.L2469
 	ldr	x4, [x29, 184]
 	ldrh	w3, [x4], 2
 	str	x4, [x29, 184]
 	cmp	w3, w2
-	beq	.L2351
+	beq	.L2390
 	strb	w0, [x19, 6]
-	b	.L2430
-.L2311:
+	b	.L2469
+.L2349:
 	cmp	w21, w7
-	beq	.L2312
+	beq	.L2350
 	str	w7, [x24, #:lo12:.LANCHOR136]
-	b	.L2298
-.L2312:
+	b	.L2336
+.L2350:
 	ldr	w0, [x24, #:lo12:.LANCHOR136]
-.L2439:
+.L2478:
 	sub	w0, w0, #1
-.L2433:
+.L2472:
 	str	w0, [x24, #:lo12:.LANCHOR136]
-	b	.L2298
-.L2310:
+	b	.L2336
+.L2348:
 	cmp	w28, w21
-	beq	.L2313
+	beq	.L2351
 	cmn	w28, #1
-	beq	.L2298
+	beq	.L2336
 	str	w28, [x24, #:lo12:.LANCHOR136]
-	b	.L2298
-.L2313:
+	b	.L2336
+.L2351:
 	ldr	w0, [x24, #:lo12:.LANCHOR136]
 	cmp	w21, w0
-	bne	.L2439
-	b	.L2298
-.L2359:
+	bne	.L2478
+	b	.L2336
+.L2398:
 	mov	w8, w0
 	mov	w0, w28
-	b	.L2306
-.L2361:
+	b	.L2344
+.L2400:
 	mov	w2, 1
-	b	.L2306
-.L2316:
+	b	.L2344
+.L2354:
 	mov	w0, -1
-	b	.L2433
-.L2322:
+	b	.L2472
+.L2360:
 	ldrh	w1, [x3]
 	cmp	w1, w6
-	beq	.L2320
+	beq	.L2358
 	mov	w4, 56
 	orr	w1, w23, w1, lsl 10
 	umaddl	x4, w24, w4, x0
 	str	w1, [x4, 4]
 	ldrb	w7, [x19, 8]
 	cmp	w7, 1
-	bne	.L2321
-	cbz	w5, .L2321
+	bne	.L2359
+	cbz	w5, .L2359
 	orr	w1, w1, -2147483648
 	str	w1, [x4, 4]
-.L2321:
+.L2359:
 	add	w24, w24, 1
 	and	w24, w24, 65535
-.L2320:
+.L2358:
 	add	x3, x3, 2
-	b	.L2319
-.L2348:
+	b	.L2357
+.L2387:
 	ldr	x4, [x22, #:lo12:.LANCHOR180]
 	add	x4, x4, x25
 	ldr	w5, [x4, 4]
@@ -16521,38 +16721,38 @@ FtlRecoverySuperblock:
 	bl	P2V_plane
 	and	w0, w0, 65535
 	cmp	w23, w26
-	bcc	.L2324
+	bcc	.L2362
 	ldr	w1, [x29, 180]
 	ccmp	w1, w0, 0, eq
-	bhi	.L2324
+	bhi	.L2362
 	cmp	w23, w20
 	ccmp	w27, w0, 0, eq
-	beq	.L2325
+	beq	.L2363
 	ldr	w0, [x4]
 	cmn	w0, #1
-	beq	.L2326
+	beq	.L2364
 	ldr	x3, [x4, 16]
 	mov	w0, 61589
 	ldrh	w1, [x3]
 	cmp	w1, w0
-	beq	.L2327
+	beq	.L2365
 	ldrh	w0, [x19]
-.L2435:
+.L2474:
 	bl	decrement_vpc_count
-	b	.L2324
-.L2327:
+	b	.L2362
+.L2365:
 	ldr	w21, [x3, 4]
 	cmn	w21, #1
-	beq	.L2328
+	beq	.L2366
 	ldr	x0, [x29, 168]
 	ldr	w1, [x0, #:lo12:.LANCHOR160]
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2328
+	cbz	w0, .L2366
 	ldr	x1, [x29, 168]
 	add	w0, w21, 1
 	str	w0, [x1, #:lo12:.LANCHOR160]
-.L2328:
+.L2366:
 	ldp	w24, w0, [x3, 8]
 	add	x1, x29, 200
 	str	w0, [x29, 196]
@@ -16560,36 +16760,36 @@ FtlRecoverySuperblock:
 	mov	w0, w24
 	bl	log2phys
 	ldr	w1, [x28, #:lo12:.LANCHOR136]
+	ldr	w3, [x29, 196]
 	cmn	w1, #1
-	beq	.L2329
+	beq	.L2367
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2329
-	ldr	w1, [x29, 196]
-	cmn	w1, #1
-	beq	.L2330
+	cbz	w0, .L2367
+	cmn	w3, #1
+	beq	.L2368
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	mov	w2, 0
-	add	x0, x0, x25
-	ldr	x3, [x0, 16]
-	str	w1, [x0, 4]
 	mov	w1, 1
-	str	x3, [x29, 152]
+	add	x0, x0, x25
+	ldr	x4, [x0, 16]
+	str	w3, [x0, 4]
+	str	x4, [x29, 152]
 	bl	FlashReadPages
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
-	ldr	x3, [x29, 152]
-	add	x4, x0, x25
+	ldr	x4, [x29, 152]
+	add	x3, x0, x25
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	bne	.L2331
-.L2332:
+	bne	.L2369
+.L2370:
 	mov	w0, -1
 	str	w0, [x29, 196]
-.L2339:
+.L2377:
 	ldr	w3, [x29, 196]
 	cmn	w3, #1
-	beq	.L2324
-.L2354:
+	beq	.L2362
+.L2393:
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
 	and	w24, w0, 65535
@@ -16597,11 +16797,11 @@ FtlRecoverySuperblock:
 	mov	w3, w24
 	ldrh	w0, [x0, #:lo12:.LANCHOR40]
 	cmp	w0, w24
-	bhi	.L2344
-	mov	w2, 2425
-	adrp	x1, .LANCHOR234
+	bhi	.L2383
+	mov	w2, 2456
+	adrp	x1, .LANCHOR233
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR234
+	add	x1, x1, :lo12:.LANCHOR233
 	add	x0, x0, :lo12:.LC5
 	str	w24, [x29, 152]
 	bl	printf
@@ -16611,109 +16811,116 @@ FtlRecoverySuperblock:
 	add	x0, x0, :lo12:.LC7
 	bl	printf
 	ldr	w3, [x29, 152]
-.L2344:
-	adrp	x1, .LANCHOR84
+.L2383:
+	adrp	x1, .LANCHOR83
 	ubfiz	x0, x24, 1, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR84]
+	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L2345
+	cbz	w0, .L2384
 	mov	w0, w3
-	b	.L2435
-.L2330:
+	b	.L2474
+.L2368:
 	ldp	w1, w0, [x29, 200]
 	cmp	w1, w0
-	bne	.L2324
+	bne	.L2362
 	mov	w2, 1
 	add	x1, x29, 196
 	mov	w0, w24
 	bl	log2phys
-.L2324:
+.L2362:
 	add	x25, x25, 56
-	b	.L2323
-.L2331:
-	ldr	w0, [x3, 8]
+	b	.L2361
+.L2369:
+	ldr	w0, [x4, 8]
 	cmp	w24, w0
-	bne	.L2332
-	ldr	w0, [x3, 4]
+	bne	.L2370
+	ldr	w0, [x4, 4]
 	str	w0, [x29, 152]
-	str	x3, [x29, 104]
+	str	x4, [x29, 104]
 	uxtw	x1, w0
 	ldr	w0, [x28, #:lo12:.LANCHOR136]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2332
+	cbz	w0, .L2370
 	ldp	w0, w1, [x29, 200]
-	ldr	x3, [x29, 104]
+	ldr	x4, [x29, 104]
 	cmp	w0, w1
 	ldr	w1, [x29, 196]
-	bne	.L2334
-.L2434:
+	bne	.L2372
+.L2473:
 	mov	w0, w24
 	bl	FtlReUsePrevPpa
-	b	.L2332
-.L2334:
+	b	.L2370
+.L2372:
 	cmp	w0, w1
-	beq	.L2332
+	beq	.L2370
 	cmn	w0, #1
-	beq	.L2335
-	ldr	x3, [x4, 16]
+	beq	.L2373
+	ldr	x4, [x3, 16]
 	mov	w2, 0
-	str	w0, [x4, 4]
+	str	w0, [x3, 4]
 	mov	w1, 1
-	str	x3, [x29, 104]
-	mov	x0, x4
+	str	x4, [x29, 104]
+	mov	x0, x3
 	bl	FlashReadPages
-	ldr	x3, [x29, 104]
-.L2336:
+	ldr	x4, [x29, 104]
+.L2374:
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	beq	.L2337
+	beq	.L2375
 	ldr	x0, [x29, 112]
-	ldr	w3, [x3, 4]
+	ldr	w3, [x4, 4]
 	mov	w1, w3
 	ldr	w0, [x0]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2337
+	cbz	w0, .L2375
 	ldr	w0, [x29, 152]
 	mov	w1, w3
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2332
-.L2337:
+	cbz	w0, .L2370
+.L2375:
 	ldr	w1, [x29, 196]
-	b	.L2434
-.L2335:
-	str	w0, [x4]
-	b	.L2336
-.L2329:
+	b	.L2473
+.L2373:
+	str	w0, [x3]
+	b	.L2374
+.L2367:
 	ldp	w1, w0, [x29, 200]
 	cmp	w1, w0
-	beq	.L2339
+	beq	.L2377
+	adrp	x0, .LANCHOR43
+	ldr	w0, [x0, #:lo12:.LANCHOR43]
+	cmp	w0, w3, lsr 10
+	bhi	.L2379
+	cmn	w3, #1
+	bne	.L2362
+.L2379:
 	mov	w2, 1
 	add	x1, x29, 204
 	mov	w0, w24
 	bl	log2phys
 	ldr	w3, [x29, 200]
 	cmn	w3, #1
-	beq	.L2339
+	beq	.L2377
 	ldr	w0, [x29, 196]
 	cmp	w3, w0
-	beq	.L2354
+	beq	.L2393
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
-	adrp	x1, .LANCHOR92
+	adrp	x1, .LANCHOR91
 	and	w0, w0, 65535
+	ldrh	w1, [x1, #:lo12:.LANCHOR91]
+	cmp	w1, w0
+	beq	.L2382
+	adrp	x1, .LANCHOR92
 	ldrh	w1, [x1, #:lo12:.LANCHOR92]
 	cmp	w1, w0
-	beq	.L2343
+	beq	.L2382
 	adrp	x1, .LANCHOR93
 	ldrh	w1, [x1, #:lo12:.LANCHOR93]
 	cmp	w1, w0
-	beq	.L2343
-	adrp	x1, .LANCHOR94
-	ldrh	w1, [x1, #:lo12:.LANCHOR94]
-	cmp	w1, w0
-	bne	.L2339
-.L2343:
+	bne	.L2377
+.L2382:
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	mov	w2, 0
 	mov	w1, 1
@@ -16724,108 +16931,343 @@ FtlRecoverySuperblock:
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L2339
+	beq	.L2377
 	ldr	x4, [x29, 152]
 	mov	w0, w21
 	ldr	w1, [x4, 4]
 	bl	ftl_cmp_data_ver
-	cbnz	w0, .L2339
+	cbnz	w0, .L2377
 	mov	w2, 1
 	add	x1, x29, 200
 	mov	w0, w24
 	bl	log2phys
-	b	.L2339
-.L2345:
+	b	.L2377
+.L2384:
 	mov	w1, w24
-	adrp	x0, .LC62
-	add	x0, x0, :lo12:.LC62
+	adrp	x0, .LC61
+	add	x0, x0, :lo12:.LC61
 	bl	printf
-	b	.L2324
-.L2326:
+	b	.L2362
+.L2364:
 	ldr	x1, [x29, 120]
 	mov	w2, w21
 	ldrh	w0, [x19]
 	strh	w0, [x1]
 	mov	w1, w5
-	adrp	x0, .LC63
-	add	x0, x0, :lo12:.LC63
+	adrp	x0, .LC62
+	add	x0, x0, :lo12:.LC62
 	bl	printf
-	adrp	x2, .LANCHOR237
-	ldr	w0, [x2, #:lo12:.LANCHOR237]
+	adrp	x2, .LANCHOR236
+	ldr	w0, [x2, #:lo12:.LANCHOR236]
 	cmp	w0, 31
-	bhi	.L2346
-	adrp	x1, .LANCHOR238
-	add	x1, x1, :lo12:.LANCHOR238
+	bhi	.L2385
+	adrp	x1, .LANCHOR237
+	add	x1, x1, :lo12:.LANCHOR237
 	ldr	w3, [x29, 204]
 	str	w3, [x1, w0, uxtw 2]
 	add	w0, w0, 1
-	str	w0, [x2, #:lo12:.LANCHOR237]
-.L2346:
+	str	w0, [x2, #:lo12:.LANCHOR236]
+.L2385:
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
 	ldr	w0, [x28, #:lo12:.LANCHOR136]
 	cmn	w0, #1
-	bne	.L2347
-.L2436:
+	bne	.L2386
+.L2475:
 	str	w21, [x28, #:lo12:.LANCHOR136]
-	b	.L2324
-.L2347:
+	b	.L2362
+.L2386:
 	cmp	w21, w0
-	bcs	.L2324
-	b	.L2436
-.L2351:
+	bcs	.L2362
+	b	.L2475
+.L2390:
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L2350
-.L2325:
+	b	.L2389
+.L2363:
 	strb	w27, [x19, 6]
 	strh	w20, [x19, 2]
-	b	.L2438
+	b	.L2477
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
+	.section	.text.FtlGcScanTempBlk,"ax",@progbits
+	.align	2
+	.global	FtlGcScanTempBlk
+	.type	FtlGcScanTempBlk, %function
+FtlGcScanTempBlk:
+	stp	x29, x30, [sp, -176]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR238
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	ldrh	w20, [x23, #:lo12:.LANCHOR238]
+	mov	w0, 65535
+	stp	x21, x22, [sp, 32]
+	stp	x25, x26, [sp, 64]
+	cmp	w20, w0
+	stp	x27, x28, [sp, 80]
+	beq	.L2504
+	cbnz	w20, .L2480
+.L2481:
+	bl	FtlGcPageVarInit
+	b	.L2482
+.L2504:
+	mov	w20, 0
+.L2480:
+	adrp	x0, .LANCHOR52
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
+	cmp	w0, w1
+	beq	.L2481
+.L2482:
+	adrp	x24, .LANCHOR72
+	add	x24, x24, :lo12:.LANCHOR72
+	mov	w26, -1
+.L2483:
+	ldrh	w1, [x19]
+	mov	w0, 65535
+	strb	wzr, [x19, 8]
+	cmp	w1, w0
+	beq	.L2484
+	mov	w27, 56
+.L2503:
+	adrp	x1, .LANCHOR104
+	adrp	x22, .LANCHOR180
+	add	x3, x19, 16
+	mov	w21, 0
+	ldr	x5, [x1, #:lo12:.LANCHOR104]
+	adrp	x1, .LANCHOR57
+	ldr	x0, [x22, #:lo12:.LANCHOR180]
+	mov	w10, 65535
+	ldrh	w6, [x1, #:lo12:.LANCHOR57]
+	adrp	x1, .LANCHOR105
+	ldr	x7, [x1, #:lo12:.LANCHOR105]
+	adrp	x1, .LANCHOR58
+	ldrh	w8, [x1, #:lo12:.LANCHOR58]
+	adrp	x1, .LANCHOR38
+	ldrh	w1, [x1, #:lo12:.LANCHOR38]
+	add	x1, x1, 8
+	add	x1, x19, x1, lsl 1
+.L2485:
+	cmp	x3, x1
+	bne	.L2487
+	mov	w1, w21
+	mov	w2, 0
+	bl	FlashReadPages
+	adrp	x25, .LANCHOR1
+	umull	x0, w21, w27
+	mov	x21, 0
+	str	x0, [x29, 104]
+	add	x0, x25, :lo12:.LANCHOR1
+	str	x0, [x29, 96]
+.L2488:
+	ldr	x0, [x29, 104]
+	cmp	x0, x21
+	bne	.L2502
+	adrp	x0, .LANCHOR52
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
+	cmp	w0, w20
+	bhi	.L2503
+.L2484:
+	strh	w20, [x19, 2]
+	mov	w0, -1
+	strb	wzr, [x19, 6]
+	mov	w1, w20
+	strh	w0, [x23, #:lo12:.LANCHOR238]
+	mov	w2, 0
+	mov	x0, x19
+	bl	ftl_sb_update_avl_pages
+	mov	w0, w26
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 176
+	ret
+.L2487:
+	ldrh	w2, [x3]
+	cmp	w2, w10
+	beq	.L2486
+	umaddl	x4, w21, w27, x0
+	orr	w2, w20, w2, lsl 10
+	str	w2, [x4, 4]
+	mul	w2, w21, w6
+	asr	w2, w2, 2
+	add	x2, x5, x2, sxtw 2
+	str	x2, [x4, 8]
+	mul	w2, w21, w8
+	add	w21, w21, 1
+	and	w21, w21, 65535
+	asr	w2, w2, 2
+	add	x2, x7, x2, sxtw 2
+	str	x2, [x4, 16]
+.L2486:
+	add	x3, x3, 2
+	b	.L2485
+.L2502:
+	ldr	x1, [x22, #:lo12:.LANCHOR180]
+	add	x0, x1, x21
+	ldr	w1, [x1, x21]
+	ldr	w28, [x0, 4]
+	cbnz	w1, .L2489
+	ldr	x25, [x0, 16]
+	mov	w0, 65535
+	ldrh	w1, [x25]
+	cmp	w1, w0
+	beq	.L2518
+	ldr	w1, [x24]
+	ldr	w0, [x25, 8]
+	cmp	w0, w1
+	bls	.L2491
+.L2518:
+	adrp	x0, .LANCHOR83
+	ldrh	w1, [x19]
+	ldr	x0, [x0, #:lo12:.LANCHOR83]
+	strh	wzr, [x0, x1, lsl 1]
+.L2517:
+	ldrh	w0, [x19]
+	mov	w20, 0
+	bl	INSERT_FREE_LIST
+	mov	w0, -1
+	strh	w0, [x19]
+	bl	FtlGcPageVarInit
+	b	.L2483
+.L2491:
+	ldr	x1, [x29, 96]
+	ldrb	w1, [x1]
+	cbnz	w1, .L2493
+.L2494:
+	ldp	w2, w0, [x25, 8]
+	mov	w1, w28
+	add	x21, x21, 56
+	bl	FtlGcUpdatePage
+	b	.L2488
+.L2493:
+	add	x1, x29, 116
+	mov	w2, 0
+	bl	log2phys
+	ldr	w0, [x25, 12]
+	ldr	w1, [x29, 116]
+	cmp	w0, w1
+	bne	.L2494
+	cmn	w0, #1
+	beq	.L2494
+	str	w0, [x29, 124]
+	adrp	x0, .LANCHOR187
+	mov	w2, 0
+	mov	w1, 1
+	ldr	x0, [x0, #:lo12:.LANCHOR187]
+	str	x0, [x29, 128]
+	adrp	x0, .LANCHOR189
+	ldr	x0, [x0, #:lo12:.LANCHOR189]
+	str	x0, [x29, 136]
+	add	x0, x29, 120
+	bl	FlashReadPages
+	adrp	x0, .LANCHOR55
+	ldr	x2, [x22, #:lo12:.LANCHOR180]
+	ldr	x5, [x29, 128]
+	ldrh	w1, [x0, #:lo12:.LANCHOR55]
+	add	x2, x2, x21
+	mov	x0, 0
+	ubfiz	x1, x1, 9, 16
+.L2495:
+	cmp	x0, x1
+	beq	.L2494
+	ldr	x6, [x2, 8]
+	ldr	w7, [x6, x0]
+	add	x0, x0, 4
+	add	x6, x5, x0
+	ldr	w6, [x6, -4]
+	cmp	w7, w6
+	beq	.L2495
+	ldrh	w1, [x19]
+	adrp	x0, .LC63
+	ldr	w2, [x29, 124]
+	add	x0, x0, :lo12:.LC63
+	bl	printf
+	b	.L2518
+.L2489:
+	ldrh	w1, [x19]
+	mov	w2, w28
+	adrp	x0, .LC64
+	add	x0, x0, :lo12:.LC64
+	bl	printf
+	adrp	x0, .LANCHOR28
+	ldr	w1, [x0, #:lo12:.LANCHOR28]
+	ldrh	w0, [x19]
+	cbnz	w1, .L2498
+	adrp	x1, .LANCHOR15
+	ldrb	w1, [x1, #:lo12:.LANCHOR15]
+	cbz	w1, .L2499
+.L2498:
+	adrp	x2, .LANCHOR78
+	ubfiz	x1, x0, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR78]
+	ldrh	w1, [x2, x1]
+	cmp	w1, 159
+	bls	.L2500
+.L2499:
+	ldr	x1, [x22, #:lo12:.LANCHOR180]
+	ldr	w1, [x1, x21]
+	cmn	w1, #1
+	bne	.L2501
+.L2500:
+	ldr	x1, [x22, #:lo12:.LANCHOR180]
+	add	x3, x1, x21
+	ldr	w26, [x3, 4]
+.L2501:
+	adrp	x1, .LANCHOR83
+	ubfiz	x0, x0, 1, 16
+	ldr	x1, [x1, #:lo12:.LANCHOR83]
+	strh	wzr, [x1, x0]
+	b	.L2517
+	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
 	.section	.text.FtlGcFreeTempBlock,"ax",@progbits
 	.align	2
 	.global	FtlGcFreeTempBlock
 	.type	FtlGcFreeTempBlock, %function
 FtlGcFreeTempBlock:
-	adrp	x0, .LANCHOR77
-	ldr	w0, [x0, #:lo12:.LANCHOR77]
-	cbz	w0, .L2441
+	adrp	x0, .LANCHOR76
+	ldr	w0, [x0, #:lo12:.LANCHOR76]
+	cbz	w0, .L2520
 	mov	w0, 0
 	ret
-.L2441:
+.L2520:
 	stp	x29, x30, [sp, -112]!
 	mov	w1, 65535
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR94
+	adrp	x19, .LANCHOR93
 	stp	x21, x22, [sp, 32]
-	add	x0, x19, :lo12:.LANCHOR94
-	ldrh	w20, [x19, #:lo12:.LANCHOR94]
+	add	x0, x19, :lo12:.LANCHOR93
+	ldrh	w20, [x19, #:lo12:.LANCHOR93]
 	adrp	x21, .LANCHOR135
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w20, w1
 	str	x27, [sp, 80]
-	beq	.L2443
-	adrp	x1, .LANCHOR53
-	ldrh	w1, [x1, #:lo12:.LANCHOR53]
+	beq	.L2522
+	adrp	x1, .LANCHOR52
+	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	bl	FtlGcScanTempBlk
 	str	w0, [x29, 108]
 	cmn	w0, #1
-	beq	.L2443
-	adrp	x0, .LANCHOR79
+	beq	.L2522
+	adrp	x0, .LANCHOR78
 	ubfiz	x20, x20, 1, 16
-	ldr	x1, [x0, #:lo12:.LANCHOR79]
+	ldr	x1, [x0, #:lo12:.LANCHOR78]
 	ldrh	w0, [x1, x20]
 	cmp	w0, 4
-	bls	.L2444
+	bls	.L2523
 	sub	w0, w0, #5
 	strh	w0, [x1, x20]
 	mov	w0, 1
 	bl	FtlEctTblFlush
-.L2444:
+.L2523:
 	ldr	w0, [x21, #:lo12:.LANCHOR135]
-	cbnz	w0, .L2445
+	cbnz	w0, .L2524
 	adrp	x0, .LANCHOR138
 	add	x0, x0, :lo12:.LANCHOR138
 	ldr	w1, [x0, 96]
@@ -16835,10 +17277,10 @@ FtlGcFreeTempBlock:
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
-.L2445:
+.L2524:
 	str	wzr, [x21, #:lo12:.LANCHOR135]
 	mov	w0, 1
-.L2440:
+.L2519:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -16846,23 +17288,23 @@ FtlGcFreeTempBlock:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2443:
+.L2522:
 	str	wzr, [x21, #:lo12:.LANCHOR135]
 	mov	w0, 65535
-	ldrh	w1, [x19, #:lo12:.LANCHOR94]
-	add	x21, x19, :lo12:.LANCHOR94
+	ldrh	w1, [x19, #:lo12:.LANCHOR93]
+	add	x21, x19, :lo12:.LANCHOR93
 	cmp	w1, w0
-	beq	.L2466
+	beq	.L2545
 	bl	FtlCacheWriteBack
-	adrp	x20, .LANCHOR111
-	adrp	x0, .LANCHOR53
+	adrp	x20, .LANCHOR110
+	adrp	x0, .LANCHOR52
 	ldrb	w1, [x21, 7]
-	ldrh	w2, [x20, #:lo12:.LANCHOR111]
+	ldrh	w2, [x20, #:lo12:.LANCHOR110]
 	mov	x21, x0
-	ldrh	w3, [x0, #:lo12:.LANCHOR53]
+	ldrh	w3, [x0, #:lo12:.LANCHOR52]
 	mul	w1, w1, w3
 	cmp	w2, w1
-	beq	.L2447
+	beq	.L2526
 	mov	w2, 163
 	adrp	x1, .LANCHOR239
 	adrp	x0, .LC5
@@ -16874,78 +17316,78 @@ FtlGcFreeTempBlock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2447:
-	add	x0, x19, :lo12:.LANCHOR94
-	adrp	x23, .LANCHOR84
-	ldrh	w3, [x21, #:lo12:.LANCHOR53]
-	adrp	x25, .LANCHOR73
-	ldrh	w2, [x19, #:lo12:.LANCHOR94]
+.L2526:
+	add	x0, x19, :lo12:.LANCHOR93
+	adrp	x23, .LANCHOR83
+	ldrh	w3, [x21, #:lo12:.LANCHOR52]
+	adrp	x25, .LANCHOR72
+	ldrh	w2, [x19, #:lo12:.LANCHOR93]
 	adrp	x26, .LANCHOR239
 	ldrb	w0, [x0, 7]
-	add	x25, x25, :lo12:.LANCHOR73
-	ldr	x1, [x23, #:lo12:.LANCHOR84]
+	add	x25, x25, :lo12:.LANCHOR72
+	ldr	x1, [x23, #:lo12:.LANCHOR83]
 	add	x26, x26, :lo12:.LANCHOR239
 	mov	w21, 0
 	mul	w0, w0, w3
 	strh	w0, [x1, x2, lsl 1]
 	adrp	x1, .LANCHOR161
-	ldrh	w0, [x20, #:lo12:.LANCHOR111]
+	ldrh	w0, [x20, #:lo12:.LANCHOR110]
 	ldr	w2, [x1, #:lo12:.LANCHOR161]
 	add	w0, w0, w2
 	str	w0, [x1, #:lo12:.LANCHOR161]
-.L2448:
-	ldrh	w0, [x20, #:lo12:.LANCHOR111]
+.L2527:
+	ldrh	w0, [x20, #:lo12:.LANCHOR110]
 	cmp	w0, w21
-	bhi	.L2452
+	bhi	.L2531
 	mov	w0, -1
 	bl	decrement_vpc_count
-	adrp	x0, .LANCHOR8
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L2453
-	ldrh	w1, [x19, #:lo12:.LANCHOR94]
-	adrp	x0, .LC64
-	add	x0, x0, :lo12:.LC64
+	adrp	x0, .LANCHOR15
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	cbz	w0, .L2532
+	ldrh	w1, [x19, #:lo12:.LANCHOR93]
+	adrp	x0, .LC65
+	add	x0, x0, :lo12:.LC65
 	bl	printf
-.L2453:
-	ldrh	w0, [x19, #:lo12:.LANCHOR94]
-	ldr	x2, [x23, #:lo12:.LANCHOR84]
+.L2532:
+	ldrh	w0, [x19, #:lo12:.LANCHOR93]
+	ldr	x2, [x23, #:lo12:.LANCHOR83]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L2454
+	cbz	w1, .L2533
 	bl	INSERT_DATA_LIST
-.L2455:
-	adrp	x0, .LANCHOR109
+.L2534:
+	adrp	x0, .LANCHOR108
 	mov	w21, -1
-	strh	wzr, [x20, #:lo12:.LANCHOR111]
-	strh	w21, [x19, #:lo12:.LANCHOR94]
-	strh	wzr, [x0, #:lo12:.LANCHOR109]
+	strh	wzr, [x20, #:lo12:.LANCHOR110]
+	strh	w21, [x19, #:lo12:.LANCHOR93]
+	strh	wzr, [x0, #:lo12:.LANCHOR108]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
 	adrp	x0, .LANCHOR204
 	strh	w21, [x0, #:lo12:.LANCHOR204]
-	adrp	x0, .LANCHOR89
-	ldrh	w1, [x0, #:lo12:.LANCHOR89]
+	adrp	x0, .LANCHOR88
+	ldrh	w1, [x0, #:lo12:.LANCHOR88]
 	adrp	x0, .LANCHOR223
 	ldrh	w0, [x0, #:lo12:.LANCHOR223]
 	add	w0, w0, w0, lsl 1
 	cmp	w1, w0, lsr 2
-	ble	.L2466
+	ble	.L2545
 	adrp	x0, .LANCHOR176
 	mov	w1, 20
 	strh	w1, [x0, #:lo12:.LANCHOR176]
-.L2466:
+.L2545:
 	mov	w0, 0
-	b	.L2440
-.L2452:
-	adrp	x0, .LANCHOR112
+	b	.L2519
+.L2531:
+	adrp	x0, .LANCHOR111
 	mov	w24, 12
-	ldr	x27, [x0, #:lo12:.LANCHOR112]
+	ldr	x27, [x0, #:lo12:.LANCHOR111]
 	umull	x24, w21, w24
 	ldr	w0, [x25]
 	add	x22, x27, x24
 	ldr	w1, [x22, 8]
 	cmp	w1, w0
-	bcc	.L2449
+	bcc	.L2528
 	mov	w2, 168
 	mov	x1, x26
 	adrp	x0, .LC5
@@ -16956,7 +17398,7 @@ FtlGcFreeTempBlock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2449:
+.L2528:
 	ldr	w0, [x22, 8]
 	add	x1, x29, 108
 	mov	w2, 0
@@ -16964,31 +17406,156 @@ FtlGcFreeTempBlock:
 	ldr	w0, [x27, x24]
 	ldr	w1, [x29, 108]
 	cmp	w0, w1
-	bne	.L2450
+	bne	.L2529
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+	mov	w24, w0
+	ldr	w0, [x22, 8]
+	mov	w2, 1
+	add	x1, x22, 4
+	bl	log2phys
+	mov	w0, w24
+.L2544:
+	bl	decrement_vpc_count
+.L2530:
+	add	w21, w21, 1
+	and	w21, w21, 65535
+	b	.L2527
+.L2529:
+	ldr	w0, [x22, 4]
+	cmp	w1, w0
+	beq	.L2530
+	ldrh	w0, [x19, #:lo12:.LANCHOR93]
+	b	.L2544
+.L2533:
+	bl	INSERT_FREE_LIST
+	b	.L2534
+	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
+	.section	.text.Ftl_get_new_temp_ppa,"ax",@progbits
+	.align	2
+	.global	Ftl_get_new_temp_ppa
+	.type	Ftl_get_new_temp_ppa, %function
+Ftl_get_new_temp_ppa:
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR93
+	mov	w2, 65535
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	mov	x19, x0
+	ldrh	w3, [x0, #:lo12:.LANCHOR93]
+	cmp	w3, w2
+	beq	.L2547
+	add	x1, x0, :lo12:.LANCHOR93
+	ldrh	w0, [x1, 4]
+	cbnz	w0, .L2548
+.L2547:
+	bl	FtlCacheWriteBack
+	mov	w0, 0
+	bl	FtlGcFreeTempBlock
+	add	x0, x19, :lo12:.LANCHOR93
+	strb	wzr, [x0, 8]
+	bl	allocate_data_superblock
+	adrp	x0, .LANCHOR108
+	strh	wzr, [x0, #:lo12:.LANCHOR108]
+	adrp	x0, .LANCHOR110
+	strh	wzr, [x0, #:lo12:.LANCHOR110]
+	bl	l2p_flush
+	mov	w0, 0
+	bl	FtlEctTblFlush
+	bl	FtlVpcTblFlush
+.L2548:
+	add	x0, x19, :lo12:.LANCHOR93
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	b	get_new_active_ppa
+	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
+	.section	.text.Ftl_gc_temp_data_write_back,"ax",@progbits
+	.align	2
+	.global	Ftl_gc_temp_data_write_back
+	.type	Ftl_gc_temp_data_write_back, %function
+Ftl_gc_temp_data_write_back:
+	adrp	x0, .LANCHOR76
+	ldr	w0, [x0, #:lo12:.LANCHOR76]
+	cbz	w0, .L2551
+	mov	w0, 0
+	ret
+.L2554:
+	mov	w0, 0
+.L2550:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L2551:
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR15
+	add	x29, sp, 0
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR102
+	cbz	w0, .L2553
+	ldr	w0, [x19, #:lo12:.LANCHOR102]
+	tbz	x0, 0, .L2553
+	adrp	x0, .LANCHOR93+4
+	ldrh	w0, [x0, #:lo12:.LANCHOR93+4]
+	cbnz	w0, .L2554
+.L2553:
+	adrp	x20, .LANCHOR181
+	ldr	w1, [x19, #:lo12:.LANCHOR102]
+	mov	w3, 0
+	mov	w2, 0
+	ldr	x0, [x20, #:lo12:.LANCHOR181]
+	add	x19, x19, :lo12:.LANCHOR102
+	bl	FlashProgPages
+	mov	w11, 0
+	mov	w12, 56
+.L2555:
+	ldr	w1, [x19]
+	cmp	w11, w1
+	bcc	.L2557
+	ldr	x0, [x20, #:lo12:.LANCHOR181]
+	bl	FtlGcBufFree
+	str	wzr, [x19]
+	adrp	x0, .LANCHOR93+4
+	ldrh	w0, [x0, #:lo12:.LANCHOR93+4]
+	cbnz	w0, .L2554
+	mov	w0, 1
+	bl	FtlGcFreeTempBlock
+	b	.L2567
+.L2557:
+	umull	x0, w11, w12
+	ldr	x2, [x20, #:lo12:.LANCHOR181]
+	add	x1, x2, x0
+	ldr	w2, [x2, x0]
+	cmn	w2, #1
+	bne	.L2556
+	adrp	x0, .LANCHOR93
+	adrp	x3, .LANCHOR83
+	ldrh	w4, [x0, #:lo12:.LANCHOR93]
+	ldr	x3, [x3, #:lo12:.LANCHOR83]
+	strh	wzr, [x3, x4, lsl 1]
+	strh	w2, [x0, #:lo12:.LANCHOR93]
+	adrp	x0, .LANCHOR138
+	add	x0, x0, :lo12:.LANCHOR138
+	ldr	w2, [x0, 96]
+	add	w2, w2, 1
+	str	w2, [x0, 96]
+	ldr	w0, [x1, 4]
 	lsr	w0, w0, 10
-	bl	P2V_block_in_plane
-	mov	w24, w0
-	ldr	w0, [x22, 8]
-	mov	w2, 1
-	add	x1, x22, 4
-	bl	log2phys
-	mov	w0, w24
-.L2465:
-	bl	decrement_vpc_count
-.L2451:
-	add	w21, w21, 1
-	and	w21, w21, 65535
-	b	.L2448
-.L2450:
-	ldr	w0, [x22, 4]
-	cmp	w1, w0
-	beq	.L2451
-	ldrh	w0, [x19, #:lo12:.LANCHOR94]
-	b	.L2465
-.L2454:
-	bl	INSERT_FREE_LIST
-	b	.L2455
-	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	bl	FtlGcPageVarInit
+.L2567:
+	mov	w0, 1
+	b	.L2550
+.L2556:
+	ldr	x0, [x1, 16]
+	ldr	w1, [x1, 4]
+	ldp	w2, w0, [x0, 8]
+	bl	FtlGcUpdatePage
+	add	w11, w11, 1
+	and	w11, w11, 65535
+	b	.L2555
+	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
 	.section	.text.FtlGcPageRecovery,"ax",@progbits
 	.align	2
 	.global	FtlGcPageRecovery
@@ -16997,16 +17564,16 @@ FtlGcPageRecovery:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR53
-	adrp	x19, .LANCHOR94
-	add	x19, x19, :lo12:.LANCHOR94
-	ldrh	w1, [x20, #:lo12:.LANCHOR53]
+	adrp	x20, .LANCHOR52
+	adrp	x19, .LANCHOR93
+	add	x19, x19, :lo12:.LANCHOR93
+	ldrh	w1, [x20, #:lo12:.LANCHOR52]
 	mov	x0, x19
 	bl	FtlGcScanTempBlk
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x20, #:lo12:.LANCHOR53]
+	ldrh	w0, [x20, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bcc	.L2467
+	bcc	.L2568
 	adrp	x0, .LANCHOR127
 	add	x0, x0, :lo12:.LANCHOR127
 	bl	FtlMapBlkWriteDumpData
@@ -17014,7 +17581,7 @@ FtlGcPageRecovery:
 	bl	FtlGcFreeTempBlock
 	adrp	x0, .LANCHOR135
 	str	wzr, [x0, #:lo12:.LANCHOR135]
-.L2467:
+.L2568:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -17025,18 +17592,18 @@ FtlGcPageRecovery:
 	.type	FtlPowerLostRecovery, %function
 FtlPowerLostRecovery:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR237
+	adrp	x0, .LANCHOR236
 	add	x29, sp, 0
 	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR92
-	add	x19, x19, :lo12:.LANCHOR92
-	str	wzr, [x0, #:lo12:.LANCHOR237]
+	adrp	x19, .LANCHOR91
+	add	x19, x19, :lo12:.LANCHOR91
+	str	wzr, [x0, #:lo12:.LANCHOR236]
 	mov	x0, x19
 	bl	FtlRecoverySuperblock
 	mov	x0, x19
-	adrp	x19, .LANCHOR93
+	adrp	x19, .LANCHOR92
 	bl	FtlSlcSuperblockCheck
-	add	x19, x19, :lo12:.LANCHOR93
+	add	x19, x19, :lo12:.LANCHOR92
 	mov	x0, x19
 	bl	FtlRecoverySuperblock
 	mov	x0, x19
@@ -17055,33 +17622,33 @@ FtlPowerLostRecovery:
 	.type	FtlSysBlkInit, %function
 FtlSysBlkInit:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR235
+	adrp	x0, .LANCHOR234
 	mov	w1, -1
 	add	x29, sp, 0
-	strh	w1, [x0, #:lo12:.LANCHOR235]
+	strh	w1, [x0, #:lo12:.LANCHOR234]
 	adrp	x0, .LANCHOR39
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR236
+	adrp	x20, .LANCHOR235
 	ldrh	w0, [x0, #:lo12:.LANCHOR39]
-	strh	wzr, [x20, #:lo12:.LANCHOR236]
+	strh	wzr, [x20, #:lo12:.LANCHOR235]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlScanSysBlk
 	adrp	x0, .LANCHOR209
 	ldrh	w1, [x0, #:lo12:.LANCHOR209]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2473
-.L2475:
+	bne	.L2574
+.L2576:
 	mov	w19, -1
-.L2472:
+.L2573:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2473:
+.L2574:
 	bl	FtlLoadSysInfo
 	mov	w19, w0
-	cbnz	w0, .L2475
+	cbnz	w0, .L2576
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -17091,80 +17658,80 @@ FtlSysBlkInit:
 	bl	FtlPowerLostRecovery
 	mov	w0, 1
 	bl	FtlUpdateVaildLpn
-	adrp	x2, .LANCHOR68
-	adrp	x0, .LANCHOR97
+	adrp	x2, .LANCHOR67
+	adrp	x0, .LANCHOR96
 	mov	x3, 4
-	ldrh	w2, [x2, #:lo12:.LANCHOR68]
-	ldr	x0, [x0, #:lo12:.LANCHOR97]
+	ldrh	w2, [x2, #:lo12:.LANCHOR67]
+	ldr	x0, [x0, #:lo12:.LANCHOR96]
 	add	x2, x3, x2, uxtw 4
 	add	x1, x0, 4
 	add	x0, x0, x2
-.L2476:
+.L2577:
 	cmp	x1, x0
-	bne	.L2478
-	ldrh	w0, [x20, #:lo12:.LANCHOR236]
-	cbnz	w0, .L2477
+	bne	.L2579
+	ldrh	w0, [x20, #:lo12:.LANCHOR235]
+	cbnz	w0, .L2578
 	bl	l2p_flush
-	b	.L2481
-.L2478:
+	b	.L2582
+.L2579:
 	ldr	w2, [x1], 16
-	tbz	w2, #31, .L2476
-.L2477:
-	adrp	x0, .LANCHOR84
-	adrp	x1, .LANCHOR92
-	ldr	x2, [x0, #:lo12:.LANCHOR84]
-	add	x0, x1, :lo12:.LANCHOR92
-	ldrh	w1, [x1, #:lo12:.LANCHOR92]
+	tbz	w2, #31, .L2577
+.L2578:
+	adrp	x0, .LANCHOR83
+	adrp	x1, .LANCHOR91
+	ldr	x2, [x0, #:lo12:.LANCHOR83]
+	add	x0, x1, :lo12:.LANCHOR91
+	ldrh	w1, [x1, #:lo12:.LANCHOR91]
 	ldrh	w4, [x0, 4]
 	lsl	x1, x1, 1
 	ldrh	w3, [x2, x1]
 	sub	w3, w3, w4
-	adrp	x4, .LANCHOR53
+	adrp	x4, .LANCHOR52
 	strh	w3, [x2, x1]
 	strh	wzr, [x0, 4]
-	ldrh	w1, [x4, #:lo12:.LANCHOR53]
+	ldrh	w1, [x4, #:lo12:.LANCHOR52]
 	strh	w1, [x0, 2]
-	adrp	x1, .LANCHOR93
+	adrp	x1, .LANCHOR92
 	strb	wzr, [x0, 6]
-	add	x0, x1, :lo12:.LANCHOR93
-	ldrh	w1, [x1, #:lo12:.LANCHOR93]
+	add	x0, x1, :lo12:.LANCHOR92
+	ldrh	w1, [x1, #:lo12:.LANCHOR92]
 	ldrh	w5, [x0, 4]
 	lsl	x1, x1, 1
 	ldrh	w3, [x2, x1]
 	sub	w3, w3, w5
 	strh	w3, [x2, x1]
 	strb	wzr, [x0, 6]
-	ldrh	w1, [x4, #:lo12:.LANCHOR53]
+	ldrh	w1, [x4, #:lo12:.LANCHOR52]
 	strh	w1, [x0, 2]
 	strh	wzr, [x0, 4]
-	adrp	x0, .LANCHOR81
-	add	x0, x0, :lo12:.LANCHOR81
+	adrp	x0, .LANCHOR80
+	add	x0, x0, :lo12:.LANCHOR80
 	ldrh	w1, [x0, 30]
 	add	w1, w1, 1
 	strh	w1, [x0, 30]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L2481:
+.L2582:
 	bl	FtlVpcTblFlush
-	b	.L2472
+	b	.L2573
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.section	.text.FtlLowFormat,"ax",@progbits
 	.align	2
 	.global	FtlLowFormat
 	.type	FtlLowFormat, %function
 FtlLowFormat:
-	adrp	x0, .LANCHOR77
-	ldr	w0, [x0, #:lo12:.LANCHOR77]
-	cbnz	w0, .L2514
+	adrp	x0, .LANCHOR76
+	ldr	w0, [x0, #:lo12:.LANCHOR76]
+	cbnz	w0, .L2615
 	stp	x29, x30, [sp, -80]!
 	adrp	x0, .LANCHOR195
 	mov	w1, 0
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR67
+	adrp	x19, .LANCHOR66
 	ldr	x0, [x0, #:lo12:.LANCHOR195]
 	adrp	x20, .LANCHOR159
-	ldrh	w2, [x19, #:lo12:.LANCHOR67]
+	ldrh	w2, [x19, #:lo12:.LANCHOR66]
 	stp	x25, x26, [sp, 64]
 	adrp	x25, .LANCHOR39
 	stp	x21, x22, [sp, 32]
@@ -17172,7 +17739,7 @@ FtlLowFormat:
 	lsl	w2, w2, 2
 	bl	ftl_memset
 	adrp	x0, .LANCHOR131
-	ldrh	w2, [x19, #:lo12:.LANCHOR67]
+	ldrh	w2, [x19, #:lo12:.LANCHOR66]
 	mov	w1, 0
 	ldr	x0, [x0, #:lo12:.LANCHOR131]
 	lsl	w2, w2, 2
@@ -17183,127 +17750,127 @@ FtlLowFormat:
 	ldrh	w0, [x25, #:lo12:.LANCHOR39]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	w0, .L2485
+	cbz	w0, .L2586
 	bl	FtlMakeBbt
-.L2485:
-	adrp	x22, .LANCHOR56
+.L2586:
+	adrp	x22, .LANCHOR55
 	adrp	x0, .LANCHOR186
 	mov	w6, 23752
-	ldrh	w1, [x22, #:lo12:.LANCHOR56]
+	ldrh	w1, [x22, #:lo12:.LANCHOR55]
 	movk	w6, 0xa0f, lsl 16
 	ldr	x4, [x0, #:lo12:.LANCHOR186]
 	adrp	x0, .LANCHOR187
 	lsl	w1, w1, 7
 	ldr	x5, [x0, #:lo12:.LANCHOR187]
 	mov	w0, 0
-.L2486:
+.L2587:
 	cmp	w0, w1
-	blt	.L2487
+	blt	.L2588
 	adrp	x21, .LANCHOR40
 	adrp	x19, .LANCHOR41
 	add	x26, x19, :lo12:.LANCHOR41
 	mov	w23, 0
 	ldrh	w24, [x21, #:lo12:.LANCHOR40]
-.L2488:
+.L2589:
 	ldrh	w0, [x26]
 	cmp	w0, w24
-	bhi	.L2489
+	bhi	.L2590
 	adrp	x24, .LANCHOR38
 	sub	w1, w23, #2
 	ldrh	w0, [x24, #:lo12:.LANCHOR38]
 	cmp	w1, w0, lsl 1
-	bgt	.L2490
-.L2494:
+	bgt	.L2591
+.L2595:
 	add	x26, x21, :lo12:.LANCHOR40
 	mov	w23, 0
 	mov	w25, 0
-.L2491:
+.L2592:
 	ldrh	w0, [x26]
 	cmp	w0, w25
-	bhi	.L2495
-	adrp	x0, .LANCHOR74
+	bhi	.L2596
+	adrp	x0, .LANCHOR73
 	ldrh	w1, [x19, #:lo12:.LANCHOR41]
 	ldrh	w3, [x24, #:lo12:.LANCHOR38]
-	str	w1, [x0, #:lo12:.LANCHOR74]
+	str	w1, [x0, #:lo12:.LANCHOR73]
 	adrp	x0, .LANCHOR42
 	adrp	x1, .LANCHOR223
 	ldr	w2, [x0, #:lo12:.LANCHOR42]
-	adrp	x0, .LANCHOR73
+	adrp	x0, .LANCHOR72
 	udiv	w6, w2, w3
 	ubfx	x5, x6, 5, 16
-	str	w6, [x0, #:lo12:.LANCHOR73]
+	str	w6, [x0, #:lo12:.LANCHOR72]
 	add	w4, w5, 36
 	strh	w4, [x1, #:lo12:.LANCHOR223]
 	mov	w4, 24
 	mul	w4, w3, w4
 	cmp	w23, w4
-	ble	.L2496
+	ble	.L2597
 	sub	w2, w2, w23
 	udiv	w2, w2, w3
-	str	w2, [x0, #:lo12:.LANCHOR73]
+	str	w2, [x0, #:lo12:.LANCHOR72]
 	lsr	w2, w2, 5
 	add	w2, w2, 24
 	strh	w2, [x1, #:lo12:.LANCHOR223]
-.L2496:
+.L2597:
 	adrp	x2, .LANCHOR28
 	ldr	w2, [x2, #:lo12:.LANCHOR28]
 	cmp	w2, 1
-	bne	.L2497
+	bne	.L2598
 	udiv	w4, w23, w3
 	ldrh	w2, [x1, #:lo12:.LANCHOR223]
 	add	w4, w4, w2
 	add	w4, w2, w4, asr 2
 	strh	w4, [x1, #:lo12:.LANCHOR223]
-.L2497:
-	adrp	x2, .LANCHOR8
-	ldrb	w2, [x2, #:lo12:.LANCHOR8]
-	cbz	w2, .L2498
+.L2598:
+	adrp	x2, .LANCHOR15
+	ldrb	w2, [x2, #:lo12:.LANCHOR15]
+	cbz	w2, .L2599
 	udiv	w4, w23, w3
 	ldrh	w2, [x1, #:lo12:.LANCHOR223]
 	add	w4, w4, w2
 	add	w4, w2, w4, asr 2
 	strh	w4, [x1, #:lo12:.LANCHOR223]
-.L2498:
+.L2599:
 	adrp	x2, .LANCHOR49
 	ldrh	w2, [x2, #:lo12:.LANCHOR49]
-	cbz	w2, .L2500
+	cbz	w2, .L2601
 	ldrh	w4, [x1, #:lo12:.LANCHOR223]
 	add	w4, w4, w2, lsr 1
 	strh	w4, [x1, #:lo12:.LANCHOR223]
 	mul	w4, w2, w3
 	cmp	w23, w4
-	bge	.L2500
+	bge	.L2601
 	add	w2, w2, 32
-	str	w6, [x0, #:lo12:.LANCHOR73]
+	str	w6, [x0, #:lo12:.LANCHOR72]
 	add	w2, w5, w2
 	strh	w2, [x1, #:lo12:.LANCHOR223]
-.L2500:
+.L2601:
 	ldrh	w2, [x1, #:lo12:.LANCHOR223]
 	adrp	x25, .LANCHOR222
-	ldr	w1, [x0, #:lo12:.LANCHOR73]
-	adrp	x24, .LANCHOR84
+	ldr	w1, [x0, #:lo12:.LANCHOR72]
+	adrp	x24, .LANCHOR83
 	mov	w23, -1
 	sub	w1, w1, w2
 	mul	w3, w1, w3
-	adrp	x1, .LANCHOR53
+	adrp	x1, .LANCHOR52
 	str	w3, [x25, #:lo12:.LANCHOR222]
-	ldrh	w1, [x1, #:lo12:.LANCHOR53]
+	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	mul	w3, w1, w3
-	str	w3, [x0, #:lo12:.LANCHOR73]
-	ldrh	w0, [x22, #:lo12:.LANCHOR56]
+	str	w3, [x0, #:lo12:.LANCHOR72]
+	ldrh	w0, [x22, #:lo12:.LANCHOR55]
 	mul	w3, w0, w3
-	adrp	x0, .LANCHOR69
-	str	w3, [x0, #:lo12:.LANCHOR69]
+	adrp	x0, .LANCHOR68
+	str	w3, [x0, #:lo12:.LANCHOR68]
 	bl	FtlBbmTblFlush
-	ldr	x0, [x24, #:lo12:.LANCHOR84]
+	ldr	x0, [x24, #:lo12:.LANCHOR83]
 	mov	w1, 0
 	ldrh	w2, [x19, #:lo12:.LANCHOR41]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	adrp	x0, .LANCHOR101
+	adrp	x0, .LANCHOR100
 	adrp	x1, .LANCHOR204
 	ldrh	w2, [x21, #:lo12:.LANCHOR40]
-	str	wzr, [x0, #:lo12:.LANCHOR101]
+	str	wzr, [x0, #:lo12:.LANCHOR100]
 	add	x0, x1, :lo12:.LANCHOR204
 	strh	w23, [x1, #:lo12:.LANCHOR204]
 	mov	w1, 255
@@ -17311,9 +17878,9 @@ FtlLowFormat:
 	strh	wzr, [x0, 2]
 	strb	wzr, [x0, 6]
 	strb	wzr, [x0, 8]
-	adrp	x0, .LANCHOR92
-	add	x19, x0, :lo12:.LANCHOR92
-	strh	wzr, [x0, #:lo12:.LANCHOR92]
+	adrp	x0, .LANCHOR91
+	add	x19, x0, :lo12:.LANCHOR91
+	strh	wzr, [x0, #:lo12:.LANCHOR91]
 	mov	w0, 1
 	strb	w0, [x19, 8]
 	adrp	x0, .LANCHOR0
@@ -17321,20 +17888,20 @@ FtlLowFormat:
 	ldr	x0, [x0, #:lo12:.LANCHOR0]
 	strb	wzr, [x19, 6]
 	bl	ftl_memset
-.L2502:
+.L2603:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L2503
-	ldr	x1, [x24, #:lo12:.LANCHOR84]
+	cbnz	w1, .L2604
+	ldr	x1, [x24, #:lo12:.LANCHOR83]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L2502
-.L2487:
+	b	.L2603
+.L2588:
 	ubfiz	x3, x0, 2, 16
 	mvn	w2, w0
 	orr	w2, w0, w2, lsl 16
@@ -17342,8 +17909,8 @@ FtlLowFormat:
 	and	w0, w0, 65535
 	str	w2, [x4, x3]
 	str	w6, [x5, x3]
-	b	.L2486
-.L2489:
+	b	.L2587
+.L2590:
 	mov	w0, w24
 	mov	w1, 1
 	add	w24, w24, 1
@@ -17351,28 +17918,28 @@ FtlLowFormat:
 	add	w23, w23, w0
 	and	w24, w24, 65535
 	and	w23, w23, 65535
-	b	.L2488
-.L2490:
+	b	.L2589
+.L2591:
 	udiv	w0, w23, w0
-	adrp	x1, .LANCHOR66
-	ldr	w23, [x1, #:lo12:.LANCHOR66]
+	adrp	x1, .LANCHOR65
+	ldr	w23, [x1, #:lo12:.LANCHOR65]
 	add	w0, w0, w23
 	bl	FtlSysBlkNumInit
 	ldrh	w0, [x25, #:lo12:.LANCHOR39]
 	add	x25, x19, :lo12:.LANCHOR41
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	w23, [x21, #:lo12:.LANCHOR40]
-.L2492:
+.L2593:
 	ldrh	w0, [x25]
 	cmp	w0, w23
-	bls	.L2494
+	bls	.L2595
 	mov	w0, w23
 	add	w23, w23, 1
 	mov	w1, 1
 	and	w23, w23, 65535
 	bl	FtlLowFormatEraseBlock
-	b	.L2492
-.L2495:
+	b	.L2593
+.L2596:
 	mov	w0, w25
 	mov	w1, 0
 	add	w25, w25, 1
@@ -17380,215 +17947,90 @@ FtlLowFormat:
 	add	w23, w23, w0
 	and	w25, w25, 65535
 	and	w23, w23, 65535
-	b	.L2491
-.L2503:
+	b	.L2592
+.L2604:
 	ldr	w1, [x20, #:lo12:.LANCHOR159]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
 	mov	w23, -1
 	add	w1, w1, 1
 	str	w1, [x20, #:lo12:.LANCHOR159]
-	ldr	x1, [x24, #:lo12:.LANCHOR84]
+	ldr	x1, [x24, #:lo12:.LANCHOR83]
 	ldrh	w2, [x19, 4]
 	strh	w2, [x1, x0]
-	adrp	x2, .LANCHOR93
-	add	x0, x2, :lo12:.LANCHOR93
+	adrp	x2, .LANCHOR92
+	add	x0, x2, :lo12:.LANCHOR92
 	ldrh	w1, [x19]
 	mov	x19, x0
 	add	w1, w1, 1
 	strh	wzr, [x0, 2]
-	strh	w1, [x2, #:lo12:.LANCHOR93]
+	strh	w1, [x2, #:lo12:.LANCHOR92]
 	mov	w1, 1
 	strb	wzr, [x0, 6]
 	strb	w1, [x0, 8]
-.L2504:
+.L2605:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L2505
-	ldr	x1, [x24, #:lo12:.LANCHOR84]
-	ubfiz	x0, x0, 1, 16
-	strh	w23, [x1, x0]
-	ldrh	w0, [x19]
-	add	w0, w0, 1
-	strh	w0, [x19]
-	b	.L2504
-.L2505:
-	ldr	w1, [x20, #:lo12:.LANCHOR159]
-	ubfiz	x0, x0, 1, 16
-	str	w1, [x19, 12]
-	add	w1, w1, 1
-	str	w1, [x20, #:lo12:.LANCHOR159]
-	ldr	x1, [x24, #:lo12:.LANCHOR84]
-	ldrh	w2, [x19, 4]
-	mov	w19, -1
-	strh	w2, [x1, x0]
-	adrp	x0, .LANCHOR94
-	strh	w19, [x0, #:lo12:.LANCHOR94]
-	bl	FtlFreeSysBlkQueueOut
-	adrp	x2, .LANCHOR209
-	add	x1, x2, :lo12:.LANCHOR209
-	strh	w0, [x2, #:lo12:.LANCHOR209]
-	ldr	w0, [x25, #:lo12:.LANCHOR222]
-	strh	w0, [x1, 6]
-	ldr	w0, [x20, #:lo12:.LANCHOR159]
-	str	w0, [x1, 8]
-	add	w0, w0, 1
-	strh	wzr, [x1, 2]
-	strh	w19, [x1, 4]
-	str	w0, [x20, #:lo12:.LANCHOR159]
-	bl	FtlVpcTblFlush
-	bl	FtlSysBlkInit
-	cbnz	w0, .L2484
-	adrp	x0, .LANCHOR231
-	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR231]
-.L2484:
-	mov	w0, 0
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
-	ret
-.L2514:
-	mov	w0, 0
-	ret
-	.size	FtlLowFormat, .-FtlLowFormat
-	.section	.text.Ftl_get_new_temp_ppa,"ax",@progbits
-	.align	2
-	.global	Ftl_get_new_temp_ppa
-	.type	Ftl_get_new_temp_ppa, %function
-Ftl_get_new_temp_ppa:
-	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR94
-	mov	w2, 65535
-	add	x29, sp, 0
-	str	x19, [sp, 16]
-	mov	x19, x0
-	ldrh	w3, [x0, #:lo12:.LANCHOR94]
-	cmp	w3, w2
-	beq	.L2518
-	add	x1, x0, :lo12:.LANCHOR94
-	ldrh	w0, [x1, 4]
-	cbnz	w0, .L2519
-.L2518:
-	bl	FtlCacheWriteBack
-	mov	w0, 0
-	bl	FtlGcFreeTempBlock
-	add	x0, x19, :lo12:.LANCHOR94
-	strb	wzr, [x0, 8]
-	bl	allocate_data_superblock
-	adrp	x0, .LANCHOR109
-	strh	wzr, [x0, #:lo12:.LANCHOR109]
-	adrp	x0, .LANCHOR111
-	strh	wzr, [x0, #:lo12:.LANCHOR111]
-	bl	l2p_flush
-	mov	w0, 0
-	bl	FtlEctTblFlush
-	bl	FtlVpcTblFlush
-.L2519:
-	add	x0, x19, :lo12:.LANCHOR94
-	ldr	x19, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	b	get_new_active_ppa
-	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
-	.section	.text.Ftl_gc_temp_data_write_back,"ax",@progbits
-	.align	2
-	.global	Ftl_gc_temp_data_write_back
-	.type	Ftl_gc_temp_data_write_back, %function
-Ftl_gc_temp_data_write_back:
-	adrp	x0, .LANCHOR77
-	ldr	w0, [x0, #:lo12:.LANCHOR77]
-	cbz	w0, .L2522
-	mov	w0, 0
-	ret
-.L2525:
-	mov	w0, 0
-.L2521:
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	ret
-.L2522:
-	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR8
-	add	x29, sp, 0
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR103
-	cbz	w0, .L2524
-	ldr	w0, [x19, #:lo12:.LANCHOR103]
-	tbz	x0, 0, .L2524
-	adrp	x0, .LANCHOR94+4
-	ldrh	w0, [x0, #:lo12:.LANCHOR94+4]
-	cbnz	w0, .L2525
-.L2524:
-	adrp	x20, .LANCHOR181
-	ldr	w1, [x19, #:lo12:.LANCHOR103]
-	mov	w3, 0
-	mov	w2, 0
-	ldr	x0, [x20, #:lo12:.LANCHOR181]
-	add	x19, x19, :lo12:.LANCHOR103
-	bl	FlashProgPages
-	mov	w11, 0
-	mov	w12, 56
-.L2526:
-	ldr	w1, [x19]
-	cmp	w11, w1
-	bcc	.L2528
-	ldr	x0, [x20, #:lo12:.LANCHOR181]
-	bl	FtlGcBufFree
-	str	wzr, [x19]
-	adrp	x0, .LANCHOR94+4
-	ldrh	w0, [x0, #:lo12:.LANCHOR94+4]
-	cbnz	w0, .L2525
-	mov	w0, 1
-	bl	FtlGcFreeTempBlock
-	b	.L2538
-.L2528:
-	umull	x0, w11, w12
-	ldr	x2, [x20, #:lo12:.LANCHOR181]
-	add	x1, x2, x0
-	ldr	w2, [x2, x0]
-	cmn	w2, #1
-	bne	.L2527
-	adrp	x0, .LANCHOR94
-	adrp	x3, .LANCHOR84
-	ldrh	w4, [x0, #:lo12:.LANCHOR94]
-	ldr	x3, [x3, #:lo12:.LANCHOR84]
-	strh	wzr, [x3, x4, lsl 1]
-	strh	w2, [x0, #:lo12:.LANCHOR94]
-	adrp	x0, .LANCHOR138
-	add	x0, x0, :lo12:.LANCHOR138
-	ldr	w2, [x0, 96]
-	add	w2, w2, 1
-	str	w2, [x0, 96]
-	ldr	w0, [x1, 4]
-	lsr	w0, w0, 10
-	bl	FtlBbmMapBadBlock
-	bl	FtlBbmTblFlush
-	bl	FtlGcPageVarInit
-.L2538:
-	mov	w0, 1
-	b	.L2521
-.L2527:
-	ldr	x0, [x1, 16]
-	ldr	w1, [x1, 4]
-	ldp	w2, w0, [x0, 8]
-	bl	FtlGcUpdatePage
-	add	w11, w11, 1
-	and	w11, w11, 65535
-	b	.L2526
-	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
+	cbnz	w1, .L2606
+	ldr	x1, [x24, #:lo12:.LANCHOR83]
+	ubfiz	x0, x0, 1, 16
+	strh	w23, [x1, x0]
+	ldrh	w0, [x19]
+	add	w0, w0, 1
+	strh	w0, [x19]
+	b	.L2605
+.L2606:
+	ldr	w1, [x20, #:lo12:.LANCHOR159]
+	ubfiz	x0, x0, 1, 16
+	str	w1, [x19, 12]
+	add	w1, w1, 1
+	str	w1, [x20, #:lo12:.LANCHOR159]
+	ldr	x1, [x24, #:lo12:.LANCHOR83]
+	ldrh	w2, [x19, 4]
+	mov	w19, -1
+	strh	w2, [x1, x0]
+	adrp	x0, .LANCHOR93
+	strh	w19, [x0, #:lo12:.LANCHOR93]
+	bl	FtlFreeSysBlkQueueOut
+	adrp	x2, .LANCHOR209
+	add	x1, x2, :lo12:.LANCHOR209
+	strh	w0, [x2, #:lo12:.LANCHOR209]
+	ldr	w0, [x25, #:lo12:.LANCHOR222]
+	strh	w0, [x1, 6]
+	ldr	w0, [x20, #:lo12:.LANCHOR159]
+	str	w0, [x1, 8]
+	add	w0, w0, 1
+	strh	wzr, [x1, 2]
+	strh	w19, [x1, 4]
+	str	w0, [x20, #:lo12:.LANCHOR159]
+	bl	FtlVpcTblFlush
+	bl	FtlSysBlkInit
+	cbnz	w0, .L2585
+	adrp	x0, .LANCHOR230
+	mov	w1, 1
+	str	w1, [x0, #:lo12:.LANCHOR230]
+.L2585:
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L2615:
+	mov	w0, 0
+	ret
+	.size	FtlLowFormat, .-FtlLowFormat
 	.section	.text.rk_ftl_garbage_collect,"ax",@progbits
 	.align	2
 	.global	rk_ftl_garbage_collect
 	.type	rk_ftl_garbage_collect, %function
 rk_ftl_garbage_collect:
-	adrp	x1, .LANCHOR77
-	ldr	w1, [x1, #:lo12:.LANCHOR77]
-	cbnz	w1, .L2591
+	adrp	x1, .LANCHOR76
+	ldr	w1, [x1, #:lo12:.LANCHOR76]
+	cbnz	w1, .L2670
 	stp	x29, x30, [sp, -192]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
@@ -17598,79 +18040,79 @@ rk_ftl_garbage_collect:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w1, .L2593
-	adrp	x1, .LANCHOR86
-	ldrh	w1, [x1, #:lo12:.LANCHOR86]
+	cbnz	w1, .L2672
+	adrp	x1, .LANCHOR85
+	ldrh	w1, [x1, #:lo12:.LANCHOR85]
 	cmp	w1, 47
-	bls	.L2593
-	adrp	x5, .LANCHOR114
+	bls	.L2672
+	adrp	x5, .LANCHOR113
 	mov	w2, 65535
-	ldrh	w8, [x5, #:lo12:.LANCHOR114]
+	ldrh	w8, [x5, #:lo12:.LANCHOR113]
 	cmp	w8, w2
-	beq	.L2541
-	adrp	x7, .LANCHOR113
-	ldrh	w1, [x7, #:lo12:.LANCHOR113]
+	beq	.L2620
+	adrp	x7, .LANCHOR112
+	ldrh	w1, [x7, #:lo12:.LANCHOR112]
 	cmp	w1, w2
-	bne	.L2541
-	adrp	x3, .LANCHOR115
-	ldrh	w6, [x3, #:lo12:.LANCHOR115]
+	bne	.L2620
+	adrp	x3, .LANCHOR114
+	ldrh	w6, [x3, #:lo12:.LANCHOR114]
 	cmp	w6, w1
-	beq	.L2541
-	adrp	x2, .LANCHOR116
-	ldrh	w4, [x2, #:lo12:.LANCHOR116]
+	beq	.L2620
+	adrp	x2, .LANCHOR115
+	ldrh	w4, [x2, #:lo12:.LANCHOR115]
 	cmp	w4, w1
-	beq	.L2541
+	beq	.L2620
 	mov	w1, -1
-	strh	w8, [x7, #:lo12:.LANCHOR113]
-	strh	w6, [x5, #:lo12:.LANCHOR114]
-	strh	w4, [x3, #:lo12:.LANCHOR115]
-	strh	w1, [x2, #:lo12:.LANCHOR116]
-.L2541:
-	cbnz	w0, .L2594
-	adrp	x0, .LANCHOR89
-	ldrh	w0, [x0, #:lo12:.LANCHOR89]
+	strh	w8, [x7, #:lo12:.LANCHOR112]
+	strh	w6, [x5, #:lo12:.LANCHOR113]
+	strh	w4, [x3, #:lo12:.LANCHOR114]
+	strh	w1, [x2, #:lo12:.LANCHOR115]
+.L2620:
+	cbnz	w0, .L2673
+	adrp	x0, .LANCHOR88
+	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w0, 24
-	bhi	.L2595
-	adrp	x1, .LANCHOR53
+	bhi	.L2674
+	adrp	x1, .LANCHOR52
 	cmp	w0, 16
-	ldrh	w20, [x1, #:lo12:.LANCHOR53]
-	bls	.L2544
+	ldrh	w20, [x1, #:lo12:.LANCHOR52]
+	bls	.L2623
 	lsr	w20, w20, 5
-.L2543:
+.L2622:
 	adrp	x2, .LANCHOR176
 	mov	x3, x2
 	ldrh	w1, [x2, #:lo12:.LANCHOR176]
 	cmp	w1, w0
-	bcs	.L2547
-	adrp	x0, .LANCHOR94
+	bcs	.L2626
+	adrp	x0, .LANCHOR93
 	mov	w1, 65535
-	ldrh	w0, [x0, #:lo12:.LANCHOR94]
+	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w0, w1
-	bne	.L2548
-	adrp	x1, .LANCHOR113
-	ldrh	w1, [x1, #:lo12:.LANCHOR113]
+	bne	.L2627
+	adrp	x1, .LANCHOR112
+	ldrh	w1, [x1, #:lo12:.LANCHOR112]
 	cmp	w1, w0
-	bne	.L2548
+	bne	.L2627
 	adrp	x0, .LANCHOR240
 	ldrh	w0, [x0, #:lo12:.LANCHOR240]
-	cbnz	w0, .L2549
-	adrp	x1, .LANCHOR73
-	adrp	x4, .LANCHOR101
-	ldr	w1, [x1, #:lo12:.LANCHOR73]
-	ldr	w4, [x4, #:lo12:.LANCHOR101]
+	cbnz	w0, .L2628
+	adrp	x1, .LANCHOR72
+	adrp	x4, .LANCHOR100
+	ldr	w1, [x1, #:lo12:.LANCHOR72]
+	ldr	w4, [x4, #:lo12:.LANCHOR100]
 	add	w1, w1, w1, lsl 1
 	cmp	w4, w1, lsr 2
-	bcs	.L2550
-.L2549:
+	bcs	.L2629
+.L2628:
 	adrp	x1, .LANCHOR223
 	ldrh	w1, [x1, #:lo12:.LANCHOR223]
 	add	w1, w1, w1, lsl 1
 	asr	w1, w1, 2
 	strh	w1, [x3, #:lo12:.LANCHOR176]
-.L2551:
+.L2630:
 	adrp	x1, .LANCHOR172
 	str	wzr, [x1, #:lo12:.LANCHOR172]
-.L2539:
+.L2618:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -17678,206 +18120,204 @@ rk_ftl_garbage_collect:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L2544:
+.L2623:
 	cmp	w0, 12
-	bls	.L2545
+	bls	.L2624
 	lsr	w20, w20, 4
-	b	.L2543
-.L2545:
+	b	.L2622
+.L2624:
 	cmp	w0, 8
-	bls	.L2543
+	bls	.L2622
 	lsr	w20, w20, 2
-	b	.L2543
-.L2595:
+	b	.L2622
+.L2674:
 	mov	w20, 1
-	b	.L2543
-.L2550:
+	b	.L2622
+.L2629:
 	mov	w1, 18
 	strh	w1, [x2, #:lo12:.LANCHOR176]
-	b	.L2551
-.L2548:
+	b	.L2630
+.L2627:
 	adrp	x0, .LANCHOR223
 	ldrh	w0, [x0, #:lo12:.LANCHOR223]
 	add	w0, w0, w0, lsl 1
 	asr	w0, w0, 2
 	strh	w0, [x3, #:lo12:.LANCHOR176]
-.L2547:
-	adrp	x0, .LANCHOR117
-	ldrh	w0, [x0, #:lo12:.LANCHOR117]
-	cbz	w0, .L2542
+.L2626:
+	adrp	x0, .LANCHOR116
+	ldrh	w0, [x0, #:lo12:.LANCHOR116]
+	cbz	w0, .L2621
 	add	w20, w20, 32
 	and	w20, w20, 65535
-.L2542:
+.L2621:
 	adrp	x19, .LANCHOR204
 	mov	w0, 65535
 	ldrh	w2, [x19, #:lo12:.LANCHOR204]
 	cmp	w2, w0
-	bne	.L2554
-	adrp	x0, .LANCHOR113
-	ldrh	w1, [x0, #:lo12:.LANCHOR113]
+	bne	.L2633
+	adrp	x0, .LANCHOR112
+	ldrh	w1, [x0, #:lo12:.LANCHOR112]
 	cmp	w1, w2
-	beq	.L2555
-	adrp	x2, .LANCHOR84
+	beq	.L2634
+	adrp	x2, .LANCHOR83
 	ubfiz	x1, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR84]
+	ldr	x2, [x2, #:lo12:.LANCHOR83]
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L2556
+	cbnz	w1, .L2635
 	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR113]
-.L2556:
-	ldrh	w1, [x0, #:lo12:.LANCHOR113]
+	strh	w1, [x0, #:lo12:.LANCHOR112]
+.L2635:
+	ldrh	w1, [x0, #:lo12:.LANCHOR112]
 	strh	w1, [x19, #:lo12:.LANCHOR204]
 	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR113]
-.L2555:
+	strh	w1, [x0, #:lo12:.LANCHOR112]
+.L2634:
 	add	x0, x19, :lo12:.LANCHOR204
 	mov	w1, 65535
 	strb	wzr, [x0, 8]
 	ldrh	w0, [x19, #:lo12:.LANCHOR204]
 	cmp	w0, w1
-	beq	.L2554
+	beq	.L2633
 	bl	IsBlkInGcList
-	cbz	w0, .L2558
+	cbz	w0, .L2637
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR204]
-.L2558:
-	adrp	x0, .LANCHOR8
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L2559
+.L2637:
+	adrp	x0, .LANCHOR15
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	cbz	w0, .L2638
 	ldrh	w0, [x19, #:lo12:.LANCHOR204]
 	add	x3, x19, :lo12:.LANCHOR204
 	bl	ftl_get_blk_mode
 	strb	w0, [x3, 8]
-.L2559:
+.L2638:
 	ldrh	w1, [x19, #:lo12:.LANCHOR204]
 	mov	w0, 65535
 	add	x22, x19, :lo12:.LANCHOR204
 	cmp	w1, w0
-	beq	.L2554
+	beq	.L2633
 	mov	x0, x22
 	bl	make_superblock
 	adrp	x0, .LANCHOR241
 	ldrh	w1, [x19, #:lo12:.LANCHOR204]
 	strh	wzr, [x22, 2]
 	strh	wzr, [x0, #:lo12:.LANCHOR241]
-	adrp	x0, .LANCHOR84
+	adrp	x0, .LANCHOR83
 	strb	wzr, [x22, 6]
-	ldr	x0, [x0, #:lo12:.LANCHOR84]
+	ldr	x0, [x0, #:lo12:.LANCHOR83]
 	ldrh	w1, [x0, x1, lsl 1]
 	adrp	x0, .LANCHOR242
 	strh	w1, [x0, #:lo12:.LANCHOR242]
-.L2554:
-	adrp	x0, .LANCHOR92
+.L2633:
+	adrp	x0, .LANCHOR91
 	ldrh	w1, [x19, #:lo12:.LANCHOR204]
 	str	x0, [x29, 144]
-	ldrh	w2, [x0, #:lo12:.LANCHOR92]
+	ldrh	w2, [x0, #:lo12:.LANCHOR91]
 	cmp	w2, w1
-	beq	.L2560
-	adrp	x0, .LANCHOR93
+	beq	.L2639
+	adrp	x0, .LANCHOR92
 	str	x0, [x29, 136]
-	ldrh	w2, [x0, #:lo12:.LANCHOR93]
+	ldrh	w2, [x0, #:lo12:.LANCHOR92]
 	cmp	w2, w1
-	beq	.L2560
-	adrp	x23, .LANCHOR178
-	add	x0, x23, :lo12:.LANCHOR178
-	str	x0, [x29, 168]
-.L2561:
+	beq	.L2639
+	adrp	x25, .LANCHOR178
+	add	x26, x25, :lo12:.LANCHOR178
+.L2640:
 	ldrh	w1, [x19, #:lo12:.LANCHOR204]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2562
+	bne	.L2641
 	adrp	x0, .LANCHOR172
-	adrp	x22, .LANCHOR53
-	add	x22, x22, :lo12:.LANCHOR53
+	adrp	x22, .LANCHOR52
+	add	x22, x22, :lo12:.LANCHOR52
 	str	wzr, [x0, #:lo12:.LANCHOR172]
-.L2563:
-	ldrh	w5, [x23, #:lo12:.LANCHOR178]
-	add	x7, x23, :lo12:.LANCHOR178
+.L2642:
+	ldrh	w5, [x25, #:lo12:.LANCHOR178]
+	add	x7, x25, :lo12:.LANCHOR178
 	mov	w0, w5
 	bl	List_get_gc_head_node
 	and	w6, w0, 65535
 	strh	w6, [x19, #:lo12:.LANCHOR204]
 	mov	w0, 65535
 	cmp	w6, w0
-	bne	.L2564
+	bne	.L2643
 	strh	wzr, [x7]
 	mov	w0, 8
-	b	.L2539
-.L2594:
+	b	.L2618
+.L2673:
 	mov	w20, 1
-	b	.L2542
-.L2560:
+	b	.L2621
+.L2639:
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR204]
-.L2630:
+.L2709:
 	adrp	x0, .LANCHOR240
 	ldrh	w0, [x0, #:lo12:.LANCHOR240]
-	b	.L2539
-.L2564:
+	b	.L2618
+.L2643:
 	mov	w0, w6
 	bl	IsBlkInGcList
 	add	w5, w5, 1
-	cbz	w0, .L2565
-	strh	w5, [x23, #:lo12:.LANCHOR178]
-	b	.L2563
-.L2565:
-	adrp	x24, .LANCHOR84
+	cbz	w0, .L2644
+	strh	w5, [x25, #:lo12:.LANCHOR178]
+	b	.L2642
+.L2644:
+	adrp	x23, .LANCHOR83
 	adrp	x4, .LANCHOR38
 	ldrh	w0, [x22]
 	ubfiz	x1, x6, 1, 16
-	ldr	x2, [x24, #:lo12:.LANCHOR84]
+	ldr	x2, [x23, #:lo12:.LANCHOR83]
 	and	w5, w5, 65535
 	ldrh	w4, [x4, #:lo12:.LANCHOR38]
-	strh	w5, [x23, #:lo12:.LANCHOR178]
+	strh	w5, [x25, #:lo12:.LANCHOR178]
 	ldrh	w3, [x2, x1]
 	mul	w0, w0, w4
 	cmp	w3, w0, asr 1
-	bgt	.L2567
+	bgt	.L2646
 	cmp	w5, 48
-	bls	.L2568
+	bls	.L2647
 	cmp	w3, 8
-	bls	.L2568
-	adrp	x3, .LANCHOR109
-	ldrh	w3, [x3, #:lo12:.LANCHOR109]
+	bls	.L2647
+	adrp	x3, .LANCHOR108
+	ldrh	w3, [x3, #:lo12:.LANCHOR108]
 	cmp	w3, 35
-	bhi	.L2568
-.L2567:
-	ldr	x3, [x29, 168]
-	strh	wzr, [x3]
-.L2568:
+	bhi	.L2647
+.L2646:
+	strh	wzr, [x26]
+.L2647:
 	ldrh	w1, [x2, x1]
 	cmp	w0, w1
-	bgt	.L2569
+	bgt	.L2648
+	ldrh	w0, [x26]
+	cmp	w0, 3
+	bhi	.L2648
 	mov	w0, -1
+	strh	wzr, [x26]
 	strh	w0, [x19, #:lo12:.LANCHOR204]
-	adrp	x0, .LANCHOR178
-	strh	wzr, [x0, #:lo12:.LANCHOR178]
-	b	.L2630
-.L2569:
-	cbnz	w1, .L2570
+	b	.L2709
+.L2648:
+	cbnz	w1, .L2649
 	mov	w0, -1
 	bl	decrement_vpc_count
-	ldr	x0, [x29, 168]
-	ldr	x1, [x29, 168]
-	ldrh	w0, [x0]
+	ldrh	w0, [x26]
 	add	w0, w0, 1
-	strh	w0, [x1]
-	b	.L2563
-.L2570:
-	adrp	x0, .LANCHOR8
+	strh	w0, [x26]
+	b	.L2642
+.L2649:
+	adrp	x0, .LANCHOR15
 	add	x3, x19, :lo12:.LANCHOR204
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
 	strb	wzr, [x3, 8]
-	cbz	w0, .L2571
+	cbz	w0, .L2650
 	mov	w0, w6
 	bl	ftl_get_blk_mode
 	strb	w0, [x3, 8]
-.L2571:
+.L2650:
 	ldr	x0, [x29, 144]
-	ldrh	w0, [x0, #:lo12:.LANCHOR92]
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	cmp	w0, w6
-	bne	.L2572
-	mov	w2, 857
+	bne	.L2651
+	mov	w2, 893
 	adrp	x1, .LANCHOR243
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR243
@@ -17888,13 +18328,13 @@ rk_ftl_garbage_collect:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2572:
+.L2651:
 	ldr	x0, [x29, 136]
 	ldrh	w1, [x19, #:lo12:.LANCHOR204]
-	ldrh	w0, [x0, #:lo12:.LANCHOR93]
+	ldrh	w0, [x0, #:lo12:.LANCHOR92]
 	cmp	w1, w0
-	bne	.L2573
-	mov	w2, 858
+	bne	.L2652
+	mov	w2, 894
 	adrp	x1, .LANCHOR243
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR243
@@ -17905,13 +18345,13 @@ rk_ftl_garbage_collect:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2573:
-	adrp	x0, .LANCHOR94
+.L2652:
+	adrp	x0, .LANCHOR93
 	ldrh	w1, [x19, #:lo12:.LANCHOR204]
-	ldrh	w0, [x0, #:lo12:.LANCHOR94]
+	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w1, w0
-	bne	.L2574
-	mov	w2, 859
+	bne	.L2653
+	mov	w2, 895
 	adrp	x1, .LANCHOR243
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR243
@@ -17922,82 +18362,86 @@ rk_ftl_garbage_collect:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2574:
+.L2653:
 	add	x22, x19, :lo12:.LANCHOR204
 	mov	x0, x22
 	bl	make_superblock
 	adrp	x0, .LANCHOR241
 	ldrh	w1, [x19, #:lo12:.LANCHOR204]
 	strh	wzr, [x0, #:lo12:.LANCHOR241]
-	ldr	x0, [x24, #:lo12:.LANCHOR84]
+	ldr	x0, [x23, #:lo12:.LANCHOR83]
 	ldrh	w1, [x0, x1, lsl 1]
 	adrp	x0, .LANCHOR242
 	strh	wzr, [x22, 2]
 	strh	w1, [x0, #:lo12:.LANCHOR242]
 	strb	wzr, [x22, 6]
-.L2562:
+.L2641:
+	adrp	x1, .LANCHOR52
 	mov	w0, 1
 	str	w0, [x21, #:lo12:.LANCHOR171]
-	adrp	x0, .LANCHOR8
-	adrp	x1, .LANCHOR53
-	stp	x0, x1, [x29, 120]
-	ldrb	w2, [x0, #:lo12:.LANCHOR8]
-	ldrh	w26, [x1, #:lo12:.LANCHOR53]
-	cbz	w2, .L2575
+	ldrh	w0, [x1, #:lo12:.LANCHOR52]
+	str	w0, [x29, 172]
+	adrp	x0, .LANCHOR15
+	str	x1, [x29, 128]
+	str	x0, [x29, 120]
+	ldrb	w2, [x0, #:lo12:.LANCHOR15]
+	cbz	w2, .L2654
 	add	x0, x19, :lo12:.LANCHOR204
 	ldrb	w0, [x0, 8]
 	cmp	w0, 1
-	bne	.L2575
-	adrp	x0, .LANCHOR54
-	ldrh	w26, [x0, #:lo12:.LANCHOR54]
-.L2575:
+	bne	.L2654
+	adrp	x0, .LANCHOR53
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+	str	w0, [x29, 172]
+.L2654:
 	add	x0, x19, :lo12:.LANCHOR204
+	ldr	w2, [x29, 172]
 	ldrh	w0, [x0, 2]
 	add	w1, w0, w20
-	cmp	w1, w26
-	ble	.L2576
-	sub	w20, w26, w0
+	cmp	w1, w2
+	ble	.L2655
+	sub	w20, w2, w0
 	and	w20, w20, 65535
-.L2576:
+.L2655:
 	adrp	x0, .LANCHOR241
-	mov	w27, 0
+	mov	w28, 0
 	add	x0, x0, :lo12:.LANCHOR241
 	str	x0, [x29, 160]
-.L2577:
-	cmp	w20, w27, uxth
-	bls	.L2585
+.L2656:
+	cmp	w20, w28, uxth
+	bls	.L2664
 	add	x1, x19, :lo12:.LANCHOR204
 	adrp	x0, .LANCHOR38
-	adrp	x24, .LANCHOR107
+	adrp	x23, .LANCHOR106
 	add	x1, x1, 16
 	ldrh	w7, [x0, #:lo12:.LANCHOR38]
 	mov	w22, 0
 	ldrh	w4, [x1, -14]
 	mov	w2, 0
-	ldr	x0, [x24, #:lo12:.LANCHOR107]
+	ldr	x0, [x23, #:lo12:.LANCHOR106]
 	mov	w6, 65535
-	add	w4, w4, w27
+	add	w4, w4, w28
 	mov	w5, 56
-	b	.L2586
-.L2579:
+	b	.L2665
+.L2658:
 	ldrh	w3, [x1]
 	cmp	w3, w6
-	beq	.L2578
+	beq	.L2657
 	umaddl	x8, w22, w5, x0
 	add	w22, w22, 1
 	and	w22, w22, 65535
 	orr	w3, w4, w3, lsl 10
 	str	w3, [x8, 4]
-.L2578:
+.L2657:
 	add	w2, w2, 1
 	add	x1, x1, 2
 	and	w2, w2, 65535
-.L2586:
+.L2665:
 	cmp	w2, w7
-	bne	.L2579
+	bne	.L2658
 	add	x1, x19, :lo12:.LANCHOR204
-	adrp	x25, .LANCHOR103
-	add	x25, x25, :lo12:.LANCHOR103
+	adrp	x24, .LANCHOR102
+	add	x24, x24, :lo12:.LANCHOR102
 	ldrb	w2, [x1, 8]
 	mov	w1, w22
 	bl	FlashReadPages
@@ -18005,27 +18449,27 @@ rk_ftl_garbage_collect:
 	umull	x0, w22, w0
 	mov	x22, 0
 	str	x0, [x29, 152]
-.L2580:
+.L2659:
 	ldr	x0, [x29, 152]
 	cmp	x22, x0
-	bne	.L2584
-	add	w27, w27, 1
-	b	.L2577
-.L2584:
-	ldr	x0, [x24, #:lo12:.LANCHOR107]
+	bne	.L2663
+	add	w28, w28, 1
+	b	.L2656
+.L2663:
+	ldr	x0, [x23, #:lo12:.LANCHOR106]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	beq	.L2581
-	ldr	x28, [x1, 16]
+	beq	.L2660
+	ldr	x27, [x1, 16]
 	mov	w0, 61589
-	ldrh	w1, [x28]
+	ldrh	w1, [x27]
 	cmp	w1, w0
-	bne	.L2581
-	ldr	w4, [x28, 8]
+	bne	.L2660
+	ldr	w4, [x27, 8]
 	cmn	w4, #1
-	bne	.L2582
-	mov	w2, 898
+	bne	.L2661
+	mov	w2, 934
 	str	w4, [x29, 112]
 	adrp	x1, .LANCHOR243
 	adrp	x0, .LC5
@@ -18038,43 +18482,41 @@ rk_ftl_garbage_collect:
 	add	x0, x0, :lo12:.LC7
 	bl	printf
 	ldr	w4, [x29, 112]
-.L2582:
+.L2661:
 	mov	w2, 0
 	add	x1, x29, 188
 	mov	w0, w4
 	bl	log2phys
-	ldr	x0, [x24, #:lo12:.LANCHOR107]
+	ldr	x0, [x23, #:lo12:.LANCHOR106]
 	ldr	w1, [x29, 188]
 	add	x0, x0, x22
 	and	w1, w1, 2147483647
 	ldr	w2, [x0, 4]
 	cmp	w1, w2
-	bne	.L2581
+	bne	.L2660
 	ldr	x1, [x29, 160]
 	adrp	x4, .LANCHOR181
 	ldr	x2, [x29, 160]
 	ldr	x5, [x4, #:lo12:.LANCHOR181]
 	ldr	w0, [x0, 24]
 	ldrh	w1, [x1]
-	str	x4, [x29, 96]
 	add	w1, w1, 1
 	strh	w1, [x2]
-	ldr	w2, [x25]
+	ldr	w2, [x24]
 	mov	w1, 56
-	str	w1, [x29, 108]
+	str	w1, [x29, 168]
 	nop // between mem op and mult-accumulate
 	umaddl	x2, w2, w1, x5
-	str	x2, [x29, 112]
+	stp	x4, x2, [x29, 104]
 	str	w0, [x2, 24]
 	bl	Ftl_get_new_temp_ppa
-	ldr	x4, [x29, 96]
-	ldr	x2, [x29, 112]
-	ldr	w1, [x29, 108]
+	ldp	x4, x2, [x29, 104]
+	ldr	w1, [x29, 168]
 	str	w0, [x2, 4]
 	ldr	x0, [x4, #:lo12:.LANCHOR181]
-	ldr	w2, [x25]
+	ldr	w2, [x24]
 	umaddl	x1, w2, w1, x0
-	ldr	x0, [x24, #:lo12:.LANCHOR107]
+	ldr	x0, [x23, #:lo12:.LANCHOR106]
 	add	w2, w2, 1
 	add	x0, x0, x22
 	ldr	x4, [x0, 8]
@@ -18082,95 +18524,96 @@ rk_ftl_garbage_collect:
 	ldr	x4, [x0, 16]
 	str	x4, [x1, 16]
 	ldr	w1, [x29, 188]
-	str	w1, [x28, 12]
-	adrp	x1, .LANCHOR94
-	add	x12, x1, :lo12:.LANCHOR94
-	ldrh	w1, [x1, #:lo12:.LANCHOR94]
-	strh	w1, [x28, 2]
+	str	w1, [x27, 12]
+	adrp	x1, .LANCHOR93
+	add	x12, x1, :lo12:.LANCHOR93
+	ldrh	w1, [x1, #:lo12:.LANCHOR93]
+	strh	w1, [x27, 2]
 	adrp	x1, .LANCHOR160
-	str	w2, [x25]
+	str	w2, [x24]
 	ldr	w1, [x1, #:lo12:.LANCHOR160]
-	str	w1, [x28, 4]
+	str	w1, [x27, 4]
 	mov	w1, 1
 	bl	FtlGcBufAlloc
 	ldr	x0, [x29, 120]
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbnz	w0, .L2583
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	cbnz	w0, .L2662
 	ldrb	w1, [x12, 7]
-	ldr	w0, [x25]
+	ldr	w0, [x24]
 	cmp	w1, w0
-	beq	.L2583
+	beq	.L2662
 	ldrh	w0, [x12, 4]
-	cbnz	w0, .L2581
-.L2583:
+	cbnz	w0, .L2660
+.L2662:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	w0, .L2581
-.L2631:
+	cbz	w0, .L2660
+.L2710:
 	str	wzr, [x21, #:lo12:.LANCHOR171]
-	b	.L2630
-.L2581:
+	b	.L2709
+.L2660:
 	add	x22, x22, 56
-	b	.L2580
-.L2585:
+	b	.L2659
+.L2664:
 	add	x1, x19, :lo12:.LANCHOR204
 	ldrh	w0, [x1, 2]
 	add	w20, w20, w0
+	ldr	w0, [x29, 172]
 	and	w20, w20, 65535
 	strh	w20, [x1, 2]
-	cmp	w26, w20
-	bhi	.L2587
-	adrp	x0, .LANCHOR103
-	ldr	w0, [x0, #:lo12:.LANCHOR103]
-	cbz	w0, .L2588
+	cmp	w0, w20
+	bhi	.L2666
+	adrp	x0, .LANCHOR102
+	ldr	w0, [x0, #:lo12:.LANCHOR102]
+	cbz	w0, .L2667
 	bl	Ftl_gc_temp_data_write_back
-	cbnz	w0, .L2631
-.L2588:
+	cbnz	w0, .L2710
+.L2667:
 	adrp	x0, .LANCHOR241
 	ldrh	w0, [x0, #:lo12:.LANCHOR241]
-	cbnz	w0, .L2589
+	cbnz	w0, .L2668
 	ldrh	w1, [x19, #:lo12:.LANCHOR204]
-	adrp	x20, .LANCHOR84
+	adrp	x20, .LANCHOR83
 	add	x0, x19, :lo12:.LANCHOR204
-	ldr	x3, [x20, #:lo12:.LANCHOR84]
+	ldr	x3, [x20, #:lo12:.LANCHOR83]
 	ubfiz	x2, x1, 1, 16
 	ldrh	w4, [x3, x2]
-	cbz	w4, .L2589
+	cbz	w4, .L2668
 	adrp	x2, .LANCHOR242
 	mov	w3, 0
 	ldrh	w5, [x2, #:lo12:.LANCHOR242]
 	ldrh	w2, [x0, 2]
-	adrp	x0, .LC65
-	add	x0, x0, :lo12:.LC65
+	adrp	x0, .LC66
+	add	x0, x0, :lo12:.LC66
 	bl	printf
 	ldrh	w1, [x19, #:lo12:.LANCHOR204]
-	ldr	x0, [x20, #:lo12:.LANCHOR84]
+	ldr	x0, [x20, #:lo12:.LANCHOR83]
 	strh	wzr, [x0, x1, lsl 1]
 	ldrh	w0, [x19, #:lo12:.LANCHOR204]
 	bl	update_vpc_list
 	bl	FtlCacheWriteBack
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L2589:
+.L2668:
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR204]
-.L2587:
-	adrp	x0, .LANCHOR89
-	ldrh	w0, [x0, #:lo12:.LANCHOR89]
+.L2666:
+	adrp	x0, .LANCHOR88
+	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w0, 2
-	bhi	.L2590
+	bhi	.L2669
 	ldr	x0, [x29, 128]
-	ldrh	w20, [x0, #:lo12:.LANCHOR53]
-	b	.L2561
-.L2590:
+	ldrh	w20, [x0, #:lo12:.LANCHOR52]
+	b	.L2640
+.L2669:
 	str	wzr, [x21, #:lo12:.LANCHOR171]
 	add	w0, w0, 1
-	b	.L2539
-.L2591:
+	b	.L2618
+.L2670:
 	mov	w0, 0
 	ret
-.L2593:
+.L2672:
 	mov	w0, 0
-	b	.L2539
+	b	.L2618
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
 	.section	.text.FtlInit,"ax",@progbits
 	.align	2
@@ -18178,18 +18621,18 @@ rk_ftl_garbage_collect:
 	.type	FtlInit, %function
 FtlInit:
 	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LC66
-	add	x1, x1, :lo12:.LC66
+	adrp	x1, .LC67
+	add	x1, x1, :lo12:.LC67
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR231
+	adrp	x19, .LANCHOR230
 	mov	x20, x0
 	mov	w0, -1
-	str	w0, [x19, #:lo12:.LANCHOR231]
+	str	w0, [x19, #:lo12:.LANCHOR230]
 	adrp	x0, .LANCHOR244
 	str	wzr, [x0, #:lo12:.LANCHOR244]
-	adrp	x0, .LANCHOR77
-	str	wzr, [x0, #:lo12:.LANCHOR77]
+	adrp	x0, .LANCHOR76
+	str	wzr, [x0, #:lo12:.LANCHOR76]
 	adrp	x0, .LC7
 	add	x0, x0, :lo12:.LC7
 	bl	printf
@@ -18201,42 +18644,42 @@ FtlInit:
 	ldrh	w0, [x0, #:lo12:.LANCHOR39]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	w0, .L2633
+	cbz	w0, .L2712
 	adrp	x1, .LANCHOR245
-	adrp	x0, .LC67
+	adrp	x0, .LC68
 	add	x1, x1, :lo12:.LANCHOR245
-	add	x0, x0, :lo12:.LC67
-.L2641:
+	add	x0, x0, :lo12:.LC68
+.L2720:
 	bl	printf
-.L2634:
+.L2713:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2633:
+.L2712:
 	bl	FtlSysBlkInit
-	cbz	w0, .L2635
+	cbz	w0, .L2714
 	adrp	x1, .LANCHOR245
-	adrp	x0, .LC68
+	adrp	x0, .LC69
 	add	x1, x1, :lo12:.LANCHOR245
-	add	x0, x0, :lo12:.LC68
-	b	.L2641
-.L2635:
+	add	x0, x0, :lo12:.LC69
+	b	.L2720
+.L2714:
 	mov	w1, 1
-	str	w1, [x19, #:lo12:.LANCHOR231]
+	str	w1, [x19, #:lo12:.LANCHOR230]
 	bl	rk_ftl_garbage_collect
-	adrp	x0, .LANCHOR89
-	ldrh	w0, [x0, #:lo12:.LANCHOR89]
+	adrp	x0, .LANCHOR88
+	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w0, 15
-	bhi	.L2634
+	bhi	.L2713
 	mov	w19, 1024
-.L2637:
+.L2716:
 	mov	w1, 1
 	mov	w0, w1
 	bl	rk_ftl_garbage_collect
 	subs	w19, w19, #1
-	bne	.L2637
-	b	.L2634
+	bne	.L2716
+	b	.L2713
 	.size	FtlInit, .-FtlInit
 	.section	.text.rk_ftl_init,"ax",@progbits
 	.align	2
@@ -18248,15 +18691,15 @@ rk_ftl_init:
 	str	x19, [sp, 16]
 	bl	FlashInit
 	mov	w19, w0
-	cbnz	w0, .L2643
-	adrp	x0, .LANCHOR15
-	add	x0, x0, :lo12:.LANCHOR15
+	cbnz	w0, .L2722
+	adrp	x0, .LANCHOR14
+	add	x0, x0, :lo12:.LANCHOR14
 	bl	FtlInit
-.L2643:
+.L2722:
 	bl	idb_init
 	mov	w1, w19
-	adrp	x0, .LC69
-	add	x0, x0, :lo12:.LC69
+	adrp	x0, .LC70
+	add	x0, x0, :lo12:.LC70
 	bl	printf
 	mov	w0, w19
 	ldr	x19, [sp, 16]
@@ -18268,110 +18711,110 @@ rk_ftl_init:
 	.global	ftl_fix_nand_power_lost_error
 	.type	ftl_fix_nand_power_lost_error, %function
 ftl_fix_nand_power_lost_error:
-	adrp	x0, .LANCHOR8
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L2660
+	adrp	x0, .LANCHOR15
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	cbz	w0, .L2739
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
 	str	x25, [sp, 64]
-	adrp	x25, .LANCHOR235
+	adrp	x25, .LANCHOR234
 	stp	x23, x24, [sp, 48]
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR84
-	ldrh	w23, [x25, #:lo12:.LANCHOR235]
-	ldr	x0, [x21, #:lo12:.LANCHOR84]
+	adrp	x21, .LANCHOR83
+	ldrh	w23, [x25, #:lo12:.LANCHOR234]
+	ldr	x0, [x21, #:lo12:.LANCHOR83]
 	mov	w1, w23
 	stp	x19, x20, [sp, 16]
 	ubfiz	x24, x23, 1, 16
-	adrp	x19, .LC70
+	adrp	x19, .LC71
 	ldrh	w2, [x0, x24]
-	add	x0, x19, :lo12:.LC70
+	add	x0, x19, :lo12:.LC71
 	bl	printf
+	adrp	x0, .LANCHOR91
+	add	x11, x0, :lo12:.LANCHOR91
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	bl	FtlGcRefreshOpenBlock
 	adrp	x0, .LANCHOR92
-	add	x11, x0, :lo12:.LANCHOR92
+	add	x20, x0, :lo12:.LANCHOR92
 	ldrh	w0, [x0, #:lo12:.LANCHOR92]
 	bl	FtlGcRefreshOpenBlock
-	adrp	x0, .LANCHOR93
-	add	x20, x0, :lo12:.LANCHOR93
-	ldrh	w0, [x0, #:lo12:.LANCHOR93]
-	bl	FtlGcRefreshOpenBlock
 	mov	x0, x11
 	bl	allocate_new_data_superblock
 	mov	x0, x20
 	mov	w20, 4097
 	bl	allocate_new_data_superblock
-.L2647:
+.L2726:
 	subs	w20, w20, #1
-	beq	.L2651
+	beq	.L2730
 	mov	w1, 1
 	mov	w0, w1
 	bl	rk_ftl_garbage_collect
-	ldr	x0, [x21, #:lo12:.LANCHOR84]
+	ldr	x0, [x21, #:lo12:.LANCHOR83]
 	ldrh	w0, [x0, x24]
-	cbnz	w0, .L2647
-.L2651:
-	ldr	x0, [x21, #:lo12:.LANCHOR84]
+	cbnz	w0, .L2726
+.L2730:
+	ldr	x0, [x21, #:lo12:.LANCHOR83]
 	mov	w1, w23
 	ldrh	w2, [x0, x24]
-	add	x0, x19, :lo12:.LC70
+	add	x0, x19, :lo12:.LC71
 	bl	printf
-	ldr	x0, [x21, #:lo12:.LANCHOR84]
+	ldr	x0, [x21, #:lo12:.LANCHOR83]
 	ldrh	w19, [x0, x24]
-	cbnz	w19, .L2649
+	cbnz	w19, .L2728
 	add	x20, x29, 128
-	adrp	x22, .LANCHOR78
+	adrp	x22, .LANCHOR77
 	strh	w23, [x20, -48]!
 	mov	x0, x20
 	bl	make_superblock
 	adrp	x0, .LANCHOR38
-	ldr	x4, [x22, #:lo12:.LANCHOR78]
+	ldr	x4, [x22, #:lo12:.LANCHOR77]
 	add	x20, x20, 16
 	mov	w5, 65535
 	ldrh	w3, [x0, #:lo12:.LANCHOR38]
 	mov	w6, 56
 	mov	w0, 0
-.L2652:
+.L2731:
 	cmp	w0, w3
-	bne	.L2654
-	ldr	x0, [x21, #:lo12:.LANCHOR84]
+	bne	.L2733
+	ldr	x0, [x21, #:lo12:.LANCHOR83]
 	mov	w1, w23
 	ldrh	w2, [x0, x24]
-	adrp	x0, .LC71
-	add	x0, x0, :lo12:.LC71
+	adrp	x0, .LC72
+	add	x0, x0, :lo12:.LC72
 	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR78]
+	ldr	x0, [x22, #:lo12:.LANCHOR77]
 	mov	w2, w19
 	mov	w1, 0
 	bl	FlashEraseBlocks
-	ldr	x0, [x22, #:lo12:.LANCHOR78]
+	ldr	x0, [x22, #:lo12:.LANCHOR77]
 	mov	w2, w19
 	mov	w1, 1
 	bl	FlashEraseBlocks
-.L2649:
+.L2728:
 	mov	w0, -1
-	strh	w0, [x25, #:lo12:.LANCHOR235]
+	strh	w0, [x25, #:lo12:.LANCHOR234]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2654:
+.L2733:
 	ldrh	w1, [x20]
 	cmp	w1, w5
-	beq	.L2653
+	beq	.L2732
 	umaddl	x2, w19, w6, x4
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	lsl	w1, w1, 10
 	stp	xzr, xzr, [x2, 8]
 	str	w1, [x2, 4]
-.L2653:
+.L2732:
 	add	w0, w0, 1
 	add	x20, x20, 2
 	and	w0, w0, 65535
-	b	.L2652
-.L2660:
+	b	.L2731
+.L2739:
 	ret
 	.size	ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error
 	.section	.text.ftl_read,"ax",@progbits
@@ -18392,13 +18835,13 @@ ftl_read:
 	mov	w27, w2
 	stp	x21, x22, [sp, 48]
 	stp	x25, x26, [sp, 80]
-	bne	.L2664
+	bne	.L2743
 	mov	x2, x3
 	mov	w1, w27
 	add	w0, w19, 256
 	bl	FtlVendorPartRead
 	mov	w21, w0
-.L2663:
+.L2742:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
@@ -18408,23 +18851,23 @@ ftl_read:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 208
 	ret
-.L2664:
+.L2743:
 	add	w0, w1, w2
 	str	w0, [x29, 148]
-	adrp	x0, .LANCHOR69
+	adrp	x0, .LANCHOR68
 	add	w1, w1, w2
-	ldr	w0, [x0, #:lo12:.LANCHOR69]
+	ldr	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w1, w0
-	bhi	.L2687
-	adrp	x0, .LANCHOR231
-	ldr	w21, [x0, #:lo12:.LANCHOR231]
+	bhi	.L2766
+	adrp	x0, .LANCHOR230
+	ldr	w21, [x0, #:lo12:.LANCHOR230]
 	cmn	w21, #1
-	beq	.L2663
-	adrp	x22, .LANCHOR56
+	beq	.L2742
+	adrp	x22, .LANCHOR55
 	bl	FtlCacheWriteBack
 	adrp	x25, .LANCHOR138
 	add	x25, x25, :lo12:.LANCHOR138
-	ldrh	w0, [x22, #:lo12:.LANCHOR56]
+	ldrh	w0, [x22, #:lo12:.LANCHOR55]
 	mov	w24, 0
 	mov	w21, 0
 	adrp	x26, .LANCHOR180
@@ -18445,42 +18888,42 @@ ftl_read:
 	ldr	w2, [x29, 172]
 	add	w0, w0, w2
 	str	w0, [x1, #:lo12:.LANCHOR166]
-.L2666:
+.L2745:
 	ldr	w0, [x29, 172]
-	cbnz	w0, .L2686
-	adrp	x0, .LANCHOR117
-	ldrh	w0, [x0, #:lo12:.LANCHOR117]
-	cbz	w0, .L2663
+	cbnz	w0, .L2765
+	adrp	x0, .LANCHOR116
+	ldrh	w0, [x0, #:lo12:.LANCHOR116]
+	cbz	w0, .L2742
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-	b	.L2663
-.L2686:
+	b	.L2742
+.L2765:
 	add	x1, x29, 188
 	mov	w2, 0
 	mov	w0, w20
 	bl	log2phys
 	ldr	w1, [x29, 188]
 	cmn	w1, #1
-	bne	.L2667
-	add	x3, x22, :lo12:.LANCHOR56
+	bne	.L2746
+	add	x3, x22, :lo12:.LANCHOR55
 	mov	w28, 0
-.L2668:
+.L2747:
 	ldrh	w0, [x3]
 	cmp	w28, w0
-	bcc	.L2670
-.L2671:
+	bcc	.L2749
+.L2750:
 	ldr	w0, [x29, 172]
 	add	w20, w20, 1
 	subs	w0, w0, #1
 	str	w0, [x29, 172]
-	beq	.L2675
+	beq	.L2754
 	adrp	x0, .LANCHOR38
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w24, w0, lsl 2
-	bne	.L2666
-.L2675:
-	cbz	w24, .L2666
+	bne	.L2745
+.L2754:
+	cbz	w24, .L2745
 	ldr	x0, [x26, #:lo12:.LANCHOR180]
 	mov	w1, w24
 	mov	w2, 0
@@ -18499,35 +18942,35 @@ ftl_read:
 	umull	x0, w24, w0
 	mov	x24, 0
 	str	x0, [x29, 120]
-	adrp	x0, .LC60
-	add	x0, x0, :lo12:.LC60
+	adrp	x0, .LC59
+	add	x0, x0, :lo12:.LC59
 	str	x0, [x29, 112]
-.L2685:
+.L2764:
 	ldr	x0, [x26, #:lo12:.LANCHOR180]
 	ldr	w2, [x29, 168]
 	add	x0, x0, x24
 	ldr	w1, [x0, 24]
 	cmp	w2, w1
-	bne	.L2677
+	bne	.L2756
 	ldr	x1, [x0, 8]
 	adrp	x0, .LANCHOR186
 	ldr	x0, [x0, #:lo12:.LANCHOR186]
 	cmp	x1, x0
-	bne	.L2678
+	bne	.L2757
 	ldr	x0, [x29, 136]
 	ldr	w2, [x29, 144]
 	add	x1, x1, x0
 	mov	x0, x23
-.L2702:
+.L2781:
 	bl	ftl_memcpy
-.L2678:
+.L2757:
 	ldr	x0, [x26, #:lo12:.LANCHOR180]
 	add	x0, x0, x24
 	ldr	x2, [x0, 16]
 	ldr	w1, [x0, 24]
 	ldr	w3, [x2, 8]
 	cmp	w1, w3
-	beq	.L2679
+	beq	.L2758
 	ldr	w3, [x25, 72]
 	add	w3, w3, 1
 	str	w3, [x25, 72]
@@ -18541,30 +18984,30 @@ ftl_read:
 	ldr	w2, [x0, 4]
 	ldr	x0, [x29, 112]
 	bl	printf
-.L2679:
+.L2758:
 	ldr	x0, [x26, #:lo12:.LANCHOR180]
 	add	x1, x0, x24
 	ldr	w0, [x0, x24]
 	cmn	w0, #1
-	bne	.L2680
+	bne	.L2759
 	ldr	w1, [x25, 72]
 	mov	w21, w0
 	add	w1, w1, 1
 	str	w1, [x25, 72]
-.L2681:
+.L2760:
 	ldr	x0, [x29, 120]
 	add	x24, x24, 56
 	cmp	x0, x24
-	bne	.L2685
+	bne	.L2764
 	mov	w24, 0
-	b	.L2666
-.L2670:
+	b	.L2745
+.L2749:
 	madd	w0, w20, w0, w28
 	cmp	w19, w0
-	bhi	.L2669
+	bhi	.L2748
 	ldr	w1, [x29, 148]
 	cmp	w1, w0
-	bls	.L2669
+	bls	.L2748
 	sub	w0, w0, w19
 	str	x3, [x29, 136]
 	lsl	w0, w0, 9
@@ -18573,21 +19016,21 @@ ftl_read:
 	add	x0, x23, x0
 	bl	ftl_memset
 	ldr	x3, [x29, 136]
-.L2669:
+.L2748:
 	add	w28, w28, 1
-	b	.L2668
-.L2667:
+	b	.L2747
+.L2746:
 	ldr	x0, [x26, #:lo12:.LANCHOR180]
 	mov	w2, 56
 	umaddl	x0, w24, w2, x0
 	str	w1, [x0, 4]
 	ldr	w1, [x29, 168]
 	cmp	w20, w1
-	bne	.L2672
+	bne	.L2751
 	adrp	x1, .LANCHOR186
 	ldr	x1, [x1, #:lo12:.LANCHOR186]
 	str	x1, [x0, 8]
-	ldrh	w1, [x22, #:lo12:.LANCHOR56]
+	ldrh	w1, [x22, #:lo12:.LANCHOR55]
 	udiv	w2, w19, w1
 	msub	w2, w2, w1, w19
 	str	w2, [x29, 152]
@@ -18596,25 +19039,25 @@ ftl_read:
 	csel	w2, w27, w2, ls
 	str	w2, [x29, 160]
 	cmp	w1, w2
-	bne	.L2673
+	bne	.L2752
 	str	x23, [x0, 8]
-.L2673:
-	adrp	x1, .LANCHOR59
+.L2752:
+	adrp	x1, .LANCHOR58
 	adrp	x2, .LANCHOR189
 	str	w20, [x0, 24]
-	ldrh	w1, [x1, #:lo12:.LANCHOR59]
+	ldrh	w1, [x1, #:lo12:.LANCHOR58]
 	ldr	x2, [x2, #:lo12:.LANCHOR189]
 	mul	w1, w1, w24
 	add	w24, w24, 1
 	and	x1, x1, 4294967292
 	add	x1, x2, x1
 	str	x1, [x0, 16]
-	b	.L2671
-.L2672:
+	b	.L2750
+.L2751:
 	ldr	w1, [x29, 164]
 	cmp	w20, w1
-	bne	.L2674
-	ldrh	w2, [x22, #:lo12:.LANCHOR56]
+	bne	.L2753
+	ldrh	w2, [x22, #:lo12:.LANCHOR55]
 	adrp	x1, .LANCHOR187
 	ldr	w3, [x29, 148]
 	ldr	x1, [x1, #:lo12:.LANCHOR187]
@@ -18623,35 +19066,35 @@ ftl_read:
 	sub	w3, w3, w1
 	str	w3, [x29, 156]
 	cmp	w2, w3
-	bne	.L2673
-.L2701:
+	bne	.L2752
+.L2780:
 	sub	w1, w1, w19
 	lsl	w1, w1, 9
 	add	x1, x23, x1
 	str	x1, [x0, 8]
-	b	.L2673
-.L2674:
-	ldrh	w1, [x22, #:lo12:.LANCHOR56]
+	b	.L2752
+.L2753:
+	ldrh	w1, [x22, #:lo12:.LANCHOR55]
 	mul	w1, w1, w20
-	b	.L2701
-.L2677:
+	b	.L2780
+.L2756:
 	ldr	w2, [x29, 164]
 	cmp	w2, w1
-	bne	.L2678
+	bne	.L2757
 	ldr	x1, [x0, 8]
 	ldr	x0, [x28, #:lo12:.LANCHOR187]
 	cmp	x1, x0
-	bne	.L2678
-	ldrh	w0, [x22, #:lo12:.LANCHOR56]
+	bne	.L2757
+	ldrh	w0, [x22, #:lo12:.LANCHOR55]
 	mul	w0, w0, w2
 	ldr	w2, [x29, 132]
 	sub	w0, w0, w19
 	lsl	w0, w0, 9
 	add	x0, x23, x0
-	b	.L2702
-.L2680:
+	b	.L2781
+.L2759:
 	cmp	w0, 256
-	bne	.L2681
+	bne	.L2760
 	ldr	w0, [x1, 4]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
@@ -18660,13 +19103,13 @@ ftl_read:
 	bl	FtlGcRefreshBlock
 	mov	w2, 2049
 	adrp	x3, .LANCHOR204
-.L2683:
+.L2762:
 	subs	w2, w2, #1
-	bne	.L2682
-.L2684:
+	bne	.L2761
+.L2763:
 	bl	FtlSysFlush
-	b	.L2681
-.L2682:
+	b	.L2760
+.L2761:
 	mov	w1, 1
 	str	x3, [x29, 96]
 	mov	w0, w1
@@ -18677,11 +19120,11 @@ ftl_read:
 	ldr	w2, [x29, 108]
 	ldrh	w0, [x3, #:lo12:.LANCHOR204]
 	cmp	w0, w1
-	beq	.L2683
-	b	.L2684
-.L2687:
+	beq	.L2762
+	b	.L2763
+.L2766:
 	mov	w21, -1
-	b	.L2663
+	b	.L2742
 	.size	ftl_read, .-ftl_read
 	.section	.text.FtlWrite,"ax",@progbits
 	.align	2
@@ -18692,23 +19135,23 @@ FtlWrite:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	mov	w21, w1
-	adrp	x1, .LANCHOR77
+	adrp	x1, .LANCHOR76
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
-	ldr	w1, [x1, #:lo12:.LANCHOR77]
+	ldr	w1, [x1, #:lo12:.LANCHOR76]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w1, .L2735
+	cbnz	w1, .L2814
 	and	w0, w0, 255
 	mov	w23, w2
 	mov	x24, x3
 	cmp	w0, 16
-	bne	.L2705
+	bne	.L2784
 	mov	x2, x3
 	mov	w1, w23
 	add	w0, w21, 256
 	bl	FtlVendorPartWrite
-.L2703:
+.L2782:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -18716,22 +19159,22 @@ FtlWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 240
 	ret
-.L2705:
-	adrp	x0, .LANCHOR69
+.L2784:
+	adrp	x0, .LANCHOR68
 	add	w2, w21, w2
-	ldr	w0, [x0, #:lo12:.LANCHOR69]
+	ldr	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w2, w0
-	bhi	.L2736
-	adrp	x0, .LANCHOR231
-	ldr	w0, [x0, #:lo12:.LANCHOR231]
+	bhi	.L2815
+	adrp	x0, .LANCHOR230
+	ldr	w0, [x0, #:lo12:.LANCHOR230]
 	cmn	w0, #1
-	beq	.L2703
+	beq	.L2782
 	adrp	x0, .LANCHOR246
-	adrp	x26, .LANCHOR56
+	adrp	x26, .LANCHOR55
 	mov	w1, 2048
 	sub	w2, w2, #1
 	str	w1, [x0, #:lo12:.LANCHOR246]
-	ldrh	w1, [x26, #:lo12:.LANCHOR56]
+	ldrh	w1, [x26, #:lo12:.LANCHOR55]
 	str	x26, [x29, 160]
 	udiv	w0, w2, w1
 	adrp	x2, .LANCHOR162
@@ -18744,25 +19187,25 @@ FtlWrite:
 	str	w0, [x2, #:lo12:.LANCHOR162]
 	adrp	x0, .LANCHOR132
 	ldr	x2, [x0, #:lo12:.LANCHOR132]
-	cbz	x2, .L2707
+	cbz	x2, .L2786
 	ldr	w0, [x2, 24]
 	cmp	w20, w0
-	beq	.L2708
+	beq	.L2787
 	bl	FtlCacheWriteBack
-.L2707:
-	adrp	x0, .LANCHOR92
+.L2786:
+	adrp	x0, .LANCHOR91
 	mov	w19, w20
-	add	x22, x0, :lo12:.LANCHOR92
-.L2709:
-	cbnz	w25, .L2734
+	add	x22, x0, :lo12:.LANCHOR91
+.L2788:
+	cbnz	w25, .L2813
 	ldr	w0, [x29, 152]
 	sub	w1, w0, w20
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-.L2735:
+.L2814:
 	mov	w0, 0
-	b	.L2703
-.L2708:
+	b	.L2782
+.L2787:
 	adrp	x3, .LANCHOR164
 	ldr	w0, [x3, #:lo12:.LANCHOR164]
 	add	w0, w0, 1
@@ -18778,23 +19221,23 @@ FtlWrite:
 	mov	x1, x24
 	mov	w2, w22
 	bl	ftl_memcpy
-	cbz	w27, .L2735
+	cbz	w27, .L2814
 	sub	w23, w23, w19
 	add	w21, w21, w19
 	add	x24, x24, x22
 	add	w20, w20, 1
 	bl	FtlCacheWriteBack
 	mov	w25, w27
-	b	.L2707
-.L2734:
-	adrp	x0, .LANCHOR92
-	add	x0, x0, :lo12:.LANCHOR92
+	b	.L2786
+.L2813:
+	adrp	x0, .LANCHOR91
+	add	x0, x0, :lo12:.LANCHOR91
 	adrp	x1, .LANCHOR38
 	str	x1, [x29, 120]
 	ldrb	w2, [x0, 6]
 	ldrh	w0, [x1, #:lo12:.LANCHOR38]
 	cmp	w2, w0
-	bcc	.L2710
+	bcc	.L2789
 	mov	w2, 1668
 	adrp	x1, .LANCHOR247
 	adrp	x0, .LC5
@@ -18806,13 +19249,13 @@ FtlWrite:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2710:
+.L2789:
 	ldrh	w0, [x22, 4]
-	cbnz	w0, .L2711
+	cbnz	w0, .L2790
 	bl	FtlCacheWriteBack
 	mov	x0, x22
 	bl	allocate_new_data_superblock
-.L2711:
+.L2790:
 	ldrb	w0, [x22, 7]
 	ldrh	w1, [x22, 4]
 	lsl	w0, w0, 2
@@ -18825,7 +19268,7 @@ FtlWrite:
 	ldr	x0, [x29, 120]
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w1, w0
-	bcc	.L2712
+	bcc	.L2791
 	mov	w2, 1701
 	adrp	x1, .LANCHOR247
 	adrp	x0, .LC5
@@ -18837,29 +19280,29 @@ FtlWrite:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2712:
-	adrp	x0, .LANCHOR59
-	add	x0, x0, :lo12:.LANCHOR59
-	str	xzr, [x29, 168]
-	str	x0, [x29, 112]
+.L2791:
 	adrp	x0, .LANCHOR58
 	add	x0, x0, :lo12:.LANCHOR58
+	str	xzr, [x29, 168]
+	str	x0, [x29, 112]
+	adrp	x0, .LANCHOR57
+	add	x0, x0, :lo12:.LANCHOR57
 	str	x0, [x29, 104]
-.L2713:
+.L2792:
 	ldr	w1, [x29, 144]
 	adrp	x28, .LANCHOR182
 	ldr	w27, [x29, 168]
 	cmp	w27, w1
-	bcc	.L2732
+	bcc	.L2811
 	mov	x27, x1
-.L2714:
+.L2793:
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
 	mov	x3, x22
 	mov	w2, 0
 	mov	w1, w27
 	bl	FtlProgPages
 	cmp	w25, w27
-	bcs	.L2733
+	bcs	.L2812
 	mov	w2, 1790
 	adrp	x1, .LANCHOR247
 	adrp	x0, .LC5
@@ -18871,12 +19314,12 @@ FtlWrite:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2733:
+.L2812:
 	sub	w25, w25, w27
-	b	.L2709
-.L2732:
+	b	.L2788
+.L2811:
 	ldrh	w0, [x22, 4]
-	cbz	w0, .L2714
+	cbz	w0, .L2793
 	add	x1, x29, 180
 	mov	w2, 0
 	mov	w0, w19
@@ -18907,11 +19350,11 @@ FtlWrite:
 	ldr	w0, [x29, 152]
 	cmp	w19, w20
 	ccmp	w0, w19, 4, ne
-	bne	.L2715
+	bne	.L2794
 	cmp	w19, w20
-	bne	.L2716
+	bne	.L2795
 	ldr	x0, [x29, 160]
-	ldrh	w2, [x0, #:lo12:.LANCHOR56]
+	ldrh	w2, [x0, #:lo12:.LANCHOR55]
 	udiv	w0, w21, w2
 	msub	w0, w0, w2, w21
 	str	w0, [x29, 148]
@@ -18919,23 +19362,23 @@ FtlWrite:
 	cmp	w2, w23
 	csel	w0, w2, w23, ls
 	str	w0, [x29, 156]
-.L2717:
+.L2796:
 	ldr	x0, [x29, 160]
 	ldr	w1, [x29, 156]
-	ldrh	w0, [x0, #:lo12:.LANCHOR56]
+	ldrh	w0, [x0, #:lo12:.LANCHOR55]
 	cmp	w0, w1
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
-	bne	.L2718
+	bne	.L2797
 	add	x3, x0, x26
 	cmp	w19, w20
-	bne	.L2719
+	bne	.L2798
 	str	x24, [x3, 8]
-.L2720:
+.L2799:
 	ldr	x0, [x29, 120]
 	ldrb	w1, [x22, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w1, w0
-	bcc	.L2729
+	bcc	.L2808
 	mov	w2, 1775
 	adrp	x1, .LANCHOR247
 	adrp	x0, .LC5
@@ -18947,7 +19390,7 @@ FtlWrite:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2729:
+.L2808:
 	ldp	x1, x2, [x29, 128]
 	mov	w0, -3947
 	strh	w0, [x1, x2]
@@ -18966,36 +19409,36 @@ FtlWrite:
 	ldr	x0, [x29, 168]
 	add	x0, x0, 1
 	str	x0, [x29, 168]
-	b	.L2713
-.L2716:
+	b	.L2792
+.L2795:
 	ldr	x0, [x29, 160]
 	add	w2, w21, w23
 	str	wzr, [x29, 148]
-	ldrh	w0, [x0, #:lo12:.LANCHOR56]
+	ldrh	w0, [x0, #:lo12:.LANCHOR55]
 	msub	w2, w19, w0, w2
 	and	w0, w2, 65535
 	str	w0, [x29, 156]
-	b	.L2717
-.L2719:
+	b	.L2796
+.L2798:
 	ldr	w0, [x29, 156]
-.L2747:
+.L2826:
 	mul	w0, w0, w19
 	sub	w0, w0, w21
 	lsl	w0, w0, 9
 	add	x0, x24, x0
 	str	x0, [x3, 8]
-	b	.L2720
-.L2718:
+	b	.L2799
+.L2797:
 	add	x0, x0, x26
 	cmp	w19, w20
-	bne	.L2721
+	bne	.L2800
 	adrp	x1, .LANCHOR186
 	ldr	x1, [x1, #:lo12:.LANCHOR186]
-.L2746:
+.L2825:
 	str	x1, [x0, 8]
 	ldr	w0, [x29, 180]
 	cmn	w0, #1
-	beq	.L2723
+	beq	.L2802
 	str	w0, [x29, 188]
 	mov	w2, 0
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
@@ -19008,17 +19451,17 @@ FtlWrite:
 	bl	FlashReadPages
 	ldr	w0, [x29, 184]
 	cmn	w0, #1
-	bne	.L2724
+	bne	.L2803
 	adrp	x0, .LANCHOR138
 	add	x0, x0, :lo12:.LANCHOR138
 	ldr	w1, [x0, 72]
 	add	w1, w1, 1
 	str	w1, [x0, 72]
-.L2727:
+.L2806:
 	ldr	w0, [x29, 156]
 	cmp	w19, w20
 	lsl	w2, w0, 9
-	bne	.L2728
+	bne	.L2807
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
 	mov	x1, x24
 	add	x3, x0, x26
@@ -19026,30 +19469,30 @@ FtlWrite:
 	ldr	x3, [x3, 8]
 	lsl	w0, w0, 9
 	add	x0, x3, x0
-.L2748:
+.L2827:
 	bl	ftl_memcpy
-	b	.L2720
-.L2721:
+	b	.L2799
+.L2800:
 	adrp	x1, .LANCHOR187
 	ldr	x1, [x1, #:lo12:.LANCHOR187]
-	b	.L2746
-.L2724:
+	b	.L2825
+.L2803:
 	ldr	w1, [x27, 8]
 	cmp	w19, w1
-	beq	.L2726
+	beq	.L2805
 	adrp	x0, .LANCHOR138
 	add	x0, x0, :lo12:.LANCHOR138
 	ldr	w2, [x0, 72]
 	add	w2, w2, 1
 	str	w2, [x0, 72]
-	adrp	x0, .LC72
+	adrp	x0, .LC73
 	mov	w2, w19
-	add	x0, x0, :lo12:.LC72
+	add	x0, x0, :lo12:.LC73
 	bl	printf
-.L2726:
+.L2805:
 	ldr	w0, [x27, 8]
 	cmp	w19, w0
-	beq	.L2727
+	beq	.L2806
 	mov	w2, 1754
 	adrp	x1, .LANCHOR247
 	adrp	x0, .LC5
@@ -19061,8 +19504,8 @@ FtlWrite:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-	b	.L2727
-.L2723:
+	b	.L2806
+.L2802:
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
 	ldr	x1, [x29, 104]
 	add	x0, x0, x26
@@ -19070,10 +19513,10 @@ FtlWrite:
 	mov	w1, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	b	.L2727
-.L2728:
+	b	.L2806
+.L2807:
 	ldr	x0, [x29, 160]
-	ldrh	w1, [x0, #:lo12:.LANCHOR56]
+	ldrh	w1, [x0, #:lo12:.LANCHOR55]
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
 	add	x3, x0, x26
 	mul	w1, w1, w19
@@ -19081,16 +19524,16 @@ FtlWrite:
 	ldr	x0, [x3, 8]
 	lsl	w1, w1, 9
 	add	x1, x24, x1
-	b	.L2748
-.L2715:
+	b	.L2827
+.L2794:
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
 	add	x3, x0, x26
 	ldr	x0, [x29, 160]
-	ldrh	w0, [x0, #:lo12:.LANCHOR56]
-	b	.L2747
-.L2736:
+	ldrh	w0, [x0, #:lo12:.LANCHOR55]
+	b	.L2826
+.L2815:
 	mov	w0, -1
-	b	.L2703
+	b	.L2782
 	.size	FtlWrite, .-FtlWrite
 	.section	.text.ftl_vendor_write,"ax",@progbits
 	.align	2
@@ -19149,12 +19592,12 @@ ftl_write:
 	mov	x20, x3
 	mov	w22, w1
 	ands	w21, w0, 255
-	bne	.L2754
+	bne	.L2833
 	mov	w3, w2
 	mov	w0, 0
 	mov	x2, x20
 	bl	idb_write_data
-.L2754:
+.L2833:
 	mov	x3, x20
 	mov	w2, w19
 	mov	w1, w22
@@ -19174,8 +19617,8 @@ FtlCheckVpc:
 	add	x0, x0, :lo12:.LC45
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR73
-	add	x23, x23, :lo12:.LANCHOR73
+	adrp	x23, .LANCHOR72
+	add	x23, x23, :lo12:.LANCHOR72
 	stp	x21, x22, [sp, 32]
 	mov	w21, 0
 	stp	x19, x20, [sp, 16]
@@ -19190,47 +19633,47 @@ FtlCheckVpc:
 	mov	w1, 0
 	mov	x0, x19
 	bl	memset
-.L2757:
+.L2836:
 	ldr	w0, [x23]
 	cmp	w21, w0
-	bcc	.L2759
+	bcc	.L2838
 	adrp	x24, .LANCHOR40
-	adrp	x23, .LANCHOR84
+	adrp	x23, .LANCHOR83
 	mov	w2, 2
-	adrp	x0, .LC73
+	adrp	x0, .LC74
 	ldrh	w3, [x24, #:lo12:.LANCHOR40]
-	add	x0, x0, :lo12:.LC73
-	ldr	x1, [x23, #:lo12:.LANCHOR84]
+	add	x0, x0, :lo12:.LC74
+	ldr	x1, [x23, #:lo12:.LANCHOR83]
 	add	x21, x20, :lo12:check_valid_page_count_table
-	adrp	x26, .LC75
-	add	x26, x26, :lo12:.LC75
+	adrp	x26, .LC76
+	add	x26, x26, :lo12:.LC76
 	mov	w25, 0
 	mov	w19, 0
 	bl	rknand_print_hex
 	ldrh	w3, [x24, #:lo12:.LANCHOR40]
 	mov	w2, 2
 	mov	x1, x21
-	adrp	x0, .LC74
+	adrp	x0, .LC75
 	add	x24, x24, :lo12:.LANCHOR40
-	add	x0, x0, :lo12:.LC74
+	add	x0, x0, :lo12:.LC75
 	bl	rknand_print_hex
 	mov	w4, 65535
-.L2760:
+.L2839:
 	ldrh	w0, [x24]
 	cmp	w0, w19
-	bhi	.L2762
+	bhi	.L2841
+	adrp	x0, .LANCHOR87
+	ldr	x19, [x0, #:lo12:.LANCHOR87]
+	cbz	x19, .L2842
 	adrp	x0, .LANCHOR88
-	ldr	x19, [x0, #:lo12:.LANCHOR88]
-	cbz	x19, .L2763
-	adrp	x0, .LANCHOR89
-	adrp	x26, .LC76
+	adrp	x26, .LC77
 	add	x20, x20, :lo12:check_valid_page_count_table
-	add	x26, x26, :lo12:.LC76
-	ldrh	w27, [x0, #:lo12:.LANCHOR89]
-	adrp	x0, .LANCHOR82
+	add	x26, x26, :lo12:.LC77
+	ldrh	w27, [x0, #:lo12:.LANCHOR88]
+	adrp	x0, .LANCHOR81
 	mov	x24, x0
 	mov	w21, 0
-	ldr	x1, [x0, #:lo12:.LANCHOR82]
+	ldr	x1, [x0, #:lo12:.LANCHOR81]
 	mov	w28, 6
 	mov	w4, 65535
 	sub	x19, x19, x1
@@ -19239,12 +19682,12 @@ FtlCheckVpc:
 	movk	x1, 0xaaab, lsl 0
 	mul	x19, x19, x1
 	and	w19, w19, 65535
-.L2764:
+.L2843:
 	cmp	w21, w27
-	bne	.L2766
-.L2763:
-	cbz	w25, .L2756
-	mov	w2, 1669
+	bne	.L2845
+.L2842:
+	cbz	w25, .L2835
+	mov	w2, 1686
 	add	x1, x22, :lo12:.LANCHOR248
 	adrp	x0, .LC5
 	add	x0, x0, :lo12:.LC5
@@ -19254,7 +19697,7 @@ FtlCheckVpc:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2756:
+.L2835:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -19262,52 +19705,52 @@ FtlCheckVpc:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2759:
+.L2838:
 	mov	w2, 0
 	add	x1, x29, 124
 	mov	w0, w21
 	bl	log2phys
 	ldr	w0, [x29, 124]
 	cmn	w0, #1
-	beq	.L2758
+	beq	.L2837
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	and	x0, x0, 65535
 	ldrh	w1, [x19, x0, lsl 1]
 	add	w1, w1, 1
 	strh	w1, [x19, x0, lsl 1]
-.L2758:
+.L2837:
 	add	w21, w21, 1
-	b	.L2757
-.L2762:
-	ldr	x0, [x23, #:lo12:.LANCHOR84]
+	b	.L2836
+.L2841:
+	ldr	x0, [x23, #:lo12:.LANCHOR83]
 	ubfiz	x28, x19, 1, 16
 	sxtw	x27, w19
 	ldrh	w2, [x0, x28]
 	ldrh	w3, [x21, x27, lsl 1]
 	cmp	w2, w3
-	beq	.L2761
+	beq	.L2840
 	str	w4, [x29, 108]
 	mov	w1, w19
 	mov	x0, x26
 	bl	printf
-	ldr	x0, [x23, #:lo12:.LANCHOR84]
+	ldr	x0, [x23, #:lo12:.LANCHOR83]
 	ldr	w4, [x29, 108]
 	ldrh	w0, [x0, x28]
 	cmp	w0, w4
-	beq	.L2761
+	beq	.L2840
 	ldrh	w1, [x21, x27, lsl 1]
 	cmp	w1, w0
 	csinc	w25, w25, wzr, ls
-.L2761:
+.L2840:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L2760
-.L2766:
-	ldr	x1, [x23, #:lo12:.LANCHOR84]
+	b	.L2839
+.L2845:
+	ldr	x1, [x23, #:lo12:.LANCHOR83]
 	ubfiz	x0, x19, 1, 16
 	ldrh	w2, [x1, x0]
-	cbz	w2, .L2765
+	cbz	w2, .L2844
 	ldrh	w3, [x20, w19, sxtw 1]
 	mov	w1, w19
 	str	w4, [x29, 108]
@@ -19315,15 +19758,15 @@ FtlCheckVpc:
 	mov	w25, 1
 	bl	printf
 	ldr	w4, [x29, 108]
-.L2765:
+.L2844:
 	umull	x19, w19, w28
-	ldr	x0, [x24, #:lo12:.LANCHOR82]
+	ldr	x0, [x24, #:lo12:.LANCHOR81]
 	ldrh	w19, [x0, x19]
 	cmp	w19, w4
-	beq	.L2763
+	beq	.L2842
 	add	w21, w21, 1
 	and	w21, w21, 65535
-	b	.L2764
+	b	.L2843
 	.size	FtlCheckVpc, .-FtlCheckVpc
 	.section	.text.FtlDumpSysBlock,"ax",@progbits
 	.align	2
@@ -19340,26 +19783,26 @@ FtlDumpSysBlock:
 	adrp	x21, .LANCHOR202
 	add	x1, x21, :lo12:.LANCHOR202
 	ldr	x2, [x0, #:lo12:.LANCHOR183]
-	adrp	x22, .LANCHOR54
+	adrp	x22, .LANCHOR53
 	stp	x23, x24, [sp, 64]
 	lsl	w26, w25, 10
 	stp	x19, x20, [sp, 32]
-	adrp	x23, .LC77
+	adrp	x23, .LC78
 	str	x27, [sp, 96]
-	adrp	x24, .LC78
+	adrp	x24, .LC79
 	str	x2, [x1, 8]
 	adrp	x2, .LANCHOR188
-	add	x22, x22, :lo12:.LANCHOR54
-	add	x23, x23, :lo12:.LC77
+	add	x22, x22, :lo12:.LANCHOR53
+	add	x23, x23, :lo12:.LC78
 	ldr	x2, [x2, #:lo12:.LANCHOR188]
-	add	x24, x24, :lo12:.LC78
+	add	x24, x24, :lo12:.LC79
 	mov	x27, x0
 	mov	w19, 0
 	str	x2, [x1, 16]
-.L2782:
+.L2861:
 	ldrh	w0, [x22]
 	cmp	w19, w0
-	blt	.L2784
+	blt	.L2863
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -19368,7 +19811,7 @@ FtlDumpSysBlock:
 	ldr	x27, [sp, 96]
 	add	sp, sp, 112
 	ret
-.L2784:
+.L2863:
 	add	x20, x21, :lo12:.LANCHOR202
 	orr	w0, w19, w26
 	mov	w2, 1
@@ -19389,16 +19832,16 @@ FtlDumpSysBlock:
 	ldr	x0, [x20, 16]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L2783
+	beq	.L2862
 	ldr	x1, [x27, #:lo12:.LANCHOR183]
 	mov	w3, 768
 	mov	w2, 4
 	mov	x0, x24
 	bl	rknand_print_hex
-.L2783:
+.L2862:
 	add	w19, w19, 1
 	sxth	w19, w19
-	b	.L2782
+	b	.L2861
 	.size	FtlDumpSysBlock, .-FtlDumpSysBlock
 	.section	.text.dump_map_info,"ax",@progbits
 	.align	2
@@ -19419,33 +19862,33 @@ dump_map_info:
 	add	x22, x22, :lo12:.LANCHOR41
 	stp	x25, x26, [sp, 80]
 	adrp	x24, .LANCHOR38
-.L2790:
+.L2869:
 	ldrh	w0, [x22]
 	cmp	w0, w20
-	bhi	.L2796
+	bhi	.L2875
 	adrp	x25, .LANCHOR128
 	adrp	x19, .LANCHOR202
 	add	x25, x25, :lo12:.LANCHOR128
 	add	x19, x19, :lo12:.LANCHOR202
 	mov	w26, 0
-.L2797:
+.L2876:
 	ldrh	w0, [x25]
 	cmp	w26, w0
-	bge	.L2800
-	adrp	x21, .LANCHOR54
+	bge	.L2879
+	adrp	x21, .LANCHOR53
 	adrp	x0, .LC48
 	sbfiz	x23, x26, 1, 32
 	mov	w20, 0
-	add	x21, x21, :lo12:.LANCHOR54
+	add	x21, x21, :lo12:.LANCHOR53
 	add	x24, x0, :lo12:.LC48
-	b	.L2801
-.L2792:
+	b	.L2880
+.L2871:
 	ldrb	w0, [x23, x5]
 	mov	w1, w20
 	bl	V2P_block
 	and	w4, w0, 65535
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L2791
+	cbnz	w0, .L2870
 	umaddl	x1, w19, w7, x6
 	lsl	w4, w4, 10
 	mul	w0, w19, w8
@@ -19455,27 +19898,27 @@ dump_map_info:
 	str	w4, [x1, 4]
 	add	x0, x10, x0, sxtw 2
 	stp	x11, x0, [x1, 8]
-.L2791:
+.L2870:
 	add	x5, x5, 1
-.L2798:
+.L2877:
 	cmp	w12, w5, uxth
-	bhi	.L2792
-	cbnz	w19, .L2793
-.L2795:
+	bhi	.L2871
+	cbnz	w19, .L2872
+.L2874:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2790
-.L2793:
+	b	.L2869
+.L2872:
 	mov	w1, w19
 	mov	w2, 1
 	mov	x0, x6
 	bl	FlashReadPages
 	mov	w0, 56
-	adrp	x26, .LC79
-	add	x26, x26, :lo12:.LC79
+	adrp	x26, .LC80
+	add	x26, x26, :lo12:.LC80
 	mov	x25, 0
 	umull	x19, w19, w0
-.L2794:
+.L2873:
 	ldr	x0, [x21, #:lo12:.LANCHOR180]
 	add	x0, x0, x25
 	add	x25, x25, 56
@@ -19491,23 +19934,23 @@ dump_map_info:
 	ubfx	x1, x2, 10, 16
 	bl	printf
 	cmp	x25, x19
-	bne	.L2794
-	b	.L2795
-.L2796:
-	adrp	x0, .LANCHOR105
+	bne	.L2873
+	b	.L2874
+.L2875:
+	adrp	x0, .LANCHOR104
 	adrp	x21, .LANCHOR180
 	ldrh	w12, [x24, #:lo12:.LANCHOR38]
 	mov	x5, 0
-	ldr	x11, [x0, #:lo12:.LANCHOR105]
-	adrp	x0, .LANCHOR106
+	ldr	x11, [x0, #:lo12:.LANCHOR104]
+	adrp	x0, .LANCHOR105
 	ldr	x6, [x21, #:lo12:.LANCHOR180]
 	mov	w19, 0
-	ldr	x10, [x0, #:lo12:.LANCHOR106]
-	adrp	x0, .LANCHOR59
+	ldr	x10, [x0, #:lo12:.LANCHOR105]
+	adrp	x0, .LANCHOR58
 	mov	w7, 56
-	ldrh	w8, [x0, #:lo12:.LANCHOR59]
-	b	.L2798
-.L2799:
+	ldrh	w8, [x0, #:lo12:.LANCHOR58]
+	b	.L2877
+.L2878:
 	adrp	x22, .LANCHOR129
 	mov	w2, 1
 	mov	w1, w2
@@ -19531,38 +19974,38 @@ dump_map_info:
 	mov	x0, x24
 	ldp	w2, w3, [x19]
 	bl	printf
-.L2801:
+.L2880:
 	ldrh	w0, [x21]
 	cmp	w20, w0
-	blt	.L2799
+	blt	.L2878
 	add	w0, w26, 1
 	sxth	w26, w0
-	b	.L2797
-.L2800:
-	adrp	x0, .LANCHOR65
+	b	.L2876
+.L2879:
+	adrp	x0, .LANCHOR64
 	mov	w2, 2
-	adrp	x19, .LANCHOR67
-	ldr	w3, [x0, #:lo12:.LANCHOR65]
+	adrp	x19, .LANCHOR66
+	ldr	w3, [x0, #:lo12:.LANCHOR64]
 	adrp	x0, .LANCHOR129
 	ldr	x1, [x0, #:lo12:.LANCHOR129]
-	adrp	x0, .LC80
-	add	x0, x0, :lo12:.LC80
+	adrp	x0, .LC81
+	add	x0, x0, :lo12:.LC81
 	bl	rknand_print_hex
 	adrp	x0, .LANCHOR131
-	ldrh	w3, [x19, #:lo12:.LANCHOR67]
+	ldrh	w3, [x19, #:lo12:.LANCHOR66]
 	mov	w2, 4
 	ldr	x1, [x0, #:lo12:.LANCHOR131]
-	adrp	x0, .LC81
-	add	x0, x0, :lo12:.LC81
+	adrp	x0, .LC82
+	add	x0, x0, :lo12:.LC82
 	bl	rknand_print_hex
 	adrp	x0, .LANCHOR195
-	ldrh	w3, [x19, #:lo12:.LANCHOR67]
+	ldrh	w3, [x19, #:lo12:.LANCHOR66]
 	ldp	x21, x22, [sp, 48]
 	mov	w2, 4
 	ldr	x1, [x0, #:lo12:.LANCHOR195]
-	adrp	x0, .LC82
+	adrp	x0, .LC83
 	ldp	x19, x20, [sp, 32]
-	add	x0, x0, :lo12:.LC82
+	add	x0, x0, :lo12:.LC83
 	ldp	x23, x24, [sp, 64]
 	ldp	x25, x26, [sp, 80]
 	ldp	x29, x30, [sp, 16]
@@ -19733,7 +20176,6 @@ dump_map_info:
 	.global	c_ftl_nand_ext_blk_pre_plane
 	.global	c_ftl_nand_blk_pre_plane
 	.global	c_ftl_nand_planes_num
-	.global	c_ftl_nand_blks_per_die_shift
 	.global	c_ftl_nand_blks_per_die
 	.global	c_ftl_nand_planes_per_die
 	.global	c_ftl_nand_die_num
@@ -19750,6 +20192,7 @@ dump_map_info:
 	.global	gNandcVer
 	.global	gNandChipMap
 	.global	gNandIDataBuf
+	.global	idb_flash_slc_mode
 	.global	FlashDdrTunningReadCount
 	.global	FlashWaitBusyScheduleEn
 	.global	gNandPhyInfo
@@ -19796,7 +20239,7 @@ dump_map_info:
 	.global	read_retry_cur_offset
 	.section	.bss.DeviceCapacity,"aw",@nobits
 	.align	2
-	.set	.LANCHOR61,. + 0
+	.set	.LANCHOR60,. + 0
 	.type	DeviceCapacity, %object
 	.size	DeviceCapacity, 4
 DeviceCapacity:
@@ -19836,7 +20279,7 @@ FtlMallocBuffer:
 	.zero	1310720
 	.section	.bss.FtlUpdateVaildLpnCount,"aw",@nobits
 	.align	1
-	.set	.LANCHOR100,. + 0
+	.set	.LANCHOR99,. + 0
 	.type	FtlUpdateVaildLpnCount, %object
 	.size	FtlUpdateVaildLpnCount, 2
 FtlUpdateVaildLpnCount:
@@ -19868,24 +20311,17 @@ c_ftl_nand_blk_pre_plane:
 	.type	c_ftl_nand_blks_per_die, %object
 	.size	c_ftl_nand_blks_per_die, 2
 c_ftl_nand_blks_per_die:
-	.zero	2
-	.section	.bss.c_ftl_nand_blks_per_die_shift,"aw",@nobits
-	.align	1
-	.set	.LANCHOR52,. + 0
-	.type	c_ftl_nand_blks_per_die_shift, %object
-	.size	c_ftl_nand_blks_per_die_shift, 2
-c_ftl_nand_blks_per_die_shift:
 	.zero	2
 	.section	.bss.c_ftl_nand_byte_pre_oob,"aw",@nobits
 	.align	1
-	.set	.LANCHOR59,. + 0
+	.set	.LANCHOR58,. + 0
 	.type	c_ftl_nand_byte_pre_oob, %object
 	.size	c_ftl_nand_byte_pre_oob, 2
 c_ftl_nand_byte_pre_oob:
 	.zero	2
 	.section	.bss.c_ftl_nand_byte_pre_page,"aw",@nobits
 	.align	1
-	.set	.LANCHOR58,. + 0
+	.set	.LANCHOR57,. + 0
 	.type	c_ftl_nand_byte_pre_page, %object
 	.size	c_ftl_nand_byte_pre_page, 2
 c_ftl_nand_byte_pre_page:
@@ -19920,28 +20356,28 @@ c_ftl_nand_ext_blk_pre_plane:
 	.zero	2
 	.section	.bss.c_ftl_nand_init_sys_blks_per_plane,"aw",@nobits
 	.align	2
-	.set	.LANCHOR66,. + 0
+	.set	.LANCHOR65,. + 0
 	.type	c_ftl_nand_init_sys_blks_per_plane, %object
 	.size	c_ftl_nand_init_sys_blks_per_plane, 4
 c_ftl_nand_init_sys_blks_per_plane:
 	.zero	4
 	.section	.bss.c_ftl_nand_l2pmap_ram_region_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR68,. + 0
+	.set	.LANCHOR67,. + 0
 	.type	c_ftl_nand_l2pmap_ram_region_num, %object
 	.size	c_ftl_nand_l2pmap_ram_region_num, 2
 c_ftl_nand_l2pmap_ram_region_num:
 	.zero	2
 	.section	.bss.c_ftl_nand_map_blks_per_plane,"aw",@nobits
 	.align	1
-	.set	.LANCHOR64,. + 0
+	.set	.LANCHOR63,. + 0
 	.type	c_ftl_nand_map_blks_per_plane, %object
 	.size	c_ftl_nand_map_blks_per_plane, 2
 c_ftl_nand_map_blks_per_plane:
 	.zero	2
 	.section	.bss.c_ftl_nand_map_region_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR67,. + 0
+	.set	.LANCHOR66,. + 0
 	.type	c_ftl_nand_map_region_num, %object
 	.size	c_ftl_nand_map_region_num, 2
 c_ftl_nand_map_region_num:
@@ -19955,7 +20391,7 @@ c_ftl_nand_max_data_blks:
 	.zero	4
 	.section	.bss.c_ftl_nand_max_map_blks,"aw",@nobits
 	.align	2
-	.set	.LANCHOR65,. + 0
+	.set	.LANCHOR64,. + 0
 	.type	c_ftl_nand_max_map_blks, %object
 	.size	c_ftl_nand_max_map_blks, 4
 c_ftl_nand_max_map_blks:
@@ -19969,28 +20405,28 @@ c_ftl_nand_max_sys_blks:
 	.zero	4
 	.section	.bss.c_ftl_nand_max_vendor_blks,"aw",@nobits
 	.align	1
-	.set	.LANCHOR62,. + 0
+	.set	.LANCHOR61,. + 0
 	.type	c_ftl_nand_max_vendor_blks, %object
 	.size	c_ftl_nand_max_vendor_blks, 2
 c_ftl_nand_max_vendor_blks:
 	.zero	2
 	.section	.bss.c_ftl_nand_page_pre_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR53,. + 0
+	.set	.LANCHOR52,. + 0
 	.type	c_ftl_nand_page_pre_blk, %object
 	.size	c_ftl_nand_page_pre_blk, 2
 c_ftl_nand_page_pre_blk:
 	.zero	2
 	.section	.bss.c_ftl_nand_page_pre_slc_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR54,. + 0
+	.set	.LANCHOR53,. + 0
 	.type	c_ftl_nand_page_pre_slc_blk, %object
 	.size	c_ftl_nand_page_pre_slc_blk, 2
 c_ftl_nand_page_pre_slc_blk:
 	.zero	2
 	.section	.bss.c_ftl_nand_page_pre_super_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR55,. + 0
+	.set	.LANCHOR54,. + 0
 	.type	c_ftl_nand_page_pre_super_blk, %object
 	.size	c_ftl_nand_page_pre_super_blk, 2
 c_ftl_nand_page_pre_super_blk:
@@ -20011,21 +20447,21 @@ c_ftl_nand_planes_per_die:
 	.zero	2
 	.section	.bss.c_ftl_nand_reserved_blks,"aw",@nobits
 	.align	1
-	.set	.LANCHOR60,. + 0
+	.set	.LANCHOR59,. + 0
 	.type	c_ftl_nand_reserved_blks, %object
 	.size	c_ftl_nand_reserved_blks, 2
 c_ftl_nand_reserved_blks:
 	.zero	2
 	.section	.bss.c_ftl_nand_sec_pre_page,"aw",@nobits
 	.align	1
-	.set	.LANCHOR56,. + 0
+	.set	.LANCHOR55,. + 0
 	.type	c_ftl_nand_sec_pre_page, %object
 	.size	c_ftl_nand_sec_pre_page, 2
 c_ftl_nand_sec_pre_page:
 	.zero	2
 	.section	.bss.c_ftl_nand_sec_pre_page_shift,"aw",@nobits
 	.align	1
-	.set	.LANCHOR57,. + 0
+	.set	.LANCHOR56,. + 0
 	.type	c_ftl_nand_sec_pre_page_shift, %object
 	.size	c_ftl_nand_sec_pre_page_shift, 2
 c_ftl_nand_sec_pre_page_shift:
@@ -20053,7 +20489,7 @@ c_ftl_nand_type:
 	.zero	2
 	.section	.bss.c_ftl_nand_vendor_region_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR63,. + 0
+	.set	.LANCHOR62,. + 0
 	.type	c_ftl_nand_vendor_region_num, %object
 	.size	c_ftl_nand_vendor_region_num, 2
 c_ftl_nand_vendor_region_num:
@@ -20067,7 +20503,7 @@ c_ftl_vendor_part_size:
 	.zero	2
 	.section	.bss.c_gc_page_buf_num,"aw",@nobits
 	.align	2
-	.set	.LANCHOR108,. + 0
+	.set	.LANCHOR107,. + 0
 	.type	c_gc_page_buf_num, %object
 	.size	c_gc_page_buf_num, 4
 c_gc_page_buf_num:
@@ -20094,7 +20530,7 @@ ftl_gc_temp_power_lost_recovery_flag:
 	.zero	4
 	.section	.bss.gBbtInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR75,. + 0
+	.set	.LANCHOR74,. + 0
 	.type	gBbtInfo, %object
 	.size	gBbtInfo, 96
 gBbtInfo:
@@ -20165,7 +20601,7 @@ gFlashProgCheckSpareBuffer:
 gFlashSdrModeEn:
 	.zero	1
 	.section	.bss.gFlashSlcMode,"aw",@nobits
-	.set	.LANCHOR8,. + 0
+	.set	.LANCHOR15,. + 0
 	.type	gFlashSlcMode, %object
 	.size	gFlashSlcMode, 1
 gFlashSlcMode:
@@ -20300,7 +20736,7 @@ gNandOptPara:
 	.zero	32
 	.section	.bss.gNandPhyInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR15,. + 0
+	.set	.LANCHOR14,. + 0
 	.type	gNandPhyInfo, %object
 	.size	gNandPhyInfo, 28
 gNandPhyInfo:
@@ -20341,7 +20777,7 @@ gReadRetryInfo:
 	.zero	852
 	.section	.bss.gSysFreeQueue,"aw",@nobits
 	.align	3
-	.set	.LANCHOR76,. + 0
+	.set	.LANCHOR75,. + 0
 	.type	gSysFreeQueue, %object
 	.size	gSysFreeQueue, 2056
 gSysFreeQueue:
@@ -20350,9 +20786,9 @@ gSysFreeQueue:
 	.align	3
 	.set	.LANCHOR209,. + 0
 	.type	gSysInfo, %object
-	.size	gSysInfo, 12
+	.size	gSysInfo, 16
 gSysInfo:
-	.zero	12
+	.zero	16
 	.section	.bss.gToggleModeClkDiv,"aw",@nobits
 	.align	2
 	.type	gToggleModeClkDiv, %object
@@ -20396,7 +20832,7 @@ g_LowFormat:
 	.zero	4
 	.section	.bss.g_MaxLbaSector,"aw",@nobits
 	.align	2
-	.set	.LANCHOR69,. + 0
+	.set	.LANCHOR68,. + 0
 	.type	g_MaxLbaSector, %object
 	.size	g_MaxLbaSector, 4
 g_MaxLbaSector:
@@ -20410,7 +20846,7 @@ g_MaxLbn:
 	.zero	4
 	.section	.bss.g_MaxLpn,"aw",@nobits
 	.align	2
-	.set	.LANCHOR73,. + 0
+	.set	.LANCHOR72,. + 0
 	.type	g_MaxLpn, %object
 	.size	g_MaxLpn, 4
 g_MaxLpn:
@@ -20424,14 +20860,14 @@ g_SlcPartLbaEndSector:
 	.zero	4
 	.section	.bss.g_VaildLpn,"aw",@nobits
 	.align	2
-	.set	.LANCHOR101,. + 0
+	.set	.LANCHOR100,. + 0
 	.type	g_VaildLpn, %object
 	.size	g_VaildLpn, 4
 g_VaildLpn:
 	.zero	4
 	.section	.bss.g_active_superblock,"aw",@nobits
 	.align	3
-	.set	.LANCHOR92,. + 0
+	.set	.LANCHOR91,. + 0
 	.type	g_active_superblock, %object
 	.size	g_active_superblock, 48
 g_active_superblock:
@@ -20445,14 +20881,14 @@ g_all_blk_used_slc_mode:
 	.zero	4
 	.section	.bss.g_buffer_superblock,"aw",@nobits
 	.align	3
-	.set	.LANCHOR93,. + 0
+	.set	.LANCHOR92,. + 0
 	.type	g_buffer_superblock, %object
 	.size	g_buffer_superblock, 48
 g_buffer_superblock:
 	.zero	48
 	.section	.bss.g_cur_erase_blk,"aw",@nobits
 	.align	2
-	.set	.LANCHOR74,. + 0
+	.set	.LANCHOR73,. + 0
 	.type	g_cur_erase_blk, %object
 	.size	g_cur_erase_blk, 4
 g_cur_erase_blk:
@@ -20473,7 +20909,7 @@ g_ect_tbl_power_up_flush:
 	.zero	2
 	.section	.bss.g_flash_read_only_en,"aw",@nobits
 	.align	2
-	.set	.LANCHOR77,. + 0
+	.set	.LANCHOR76,. + 0
 	.type	g_flash_read_only_en, %object
 	.size	g_flash_read_only_en, 4
 g_flash_read_only_en:
@@ -20494,21 +20930,21 @@ g_ftl_nand_free_count:
 	.zero	4
 	.section	.bss.g_gc_bad_block_gc_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR119,. + 0
+	.set	.LANCHOR118,. + 0
 	.type	g_gc_bad_block_gc_index, %object
 	.size	g_gc_bad_block_gc_index, 2
 g_gc_bad_block_gc_index:
 	.zero	2
 	.section	.bss.g_gc_bad_block_temp_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR117,. + 0
+	.set	.LANCHOR116,. + 0
 	.type	g_gc_bad_block_temp_num, %object
 	.size	g_gc_bad_block_temp_num, 2
 g_gc_bad_block_temp_num:
 	.zero	2
 	.section	.bss.g_gc_bad_block_temp_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR118,. + 0
+	.set	.LANCHOR117,. + 0
 	.type	g_gc_bad_block_temp_tbl, %object
 	.size	g_gc_bad_block_temp_tbl, 34
 g_gc_bad_block_temp_tbl:
@@ -20522,7 +20958,7 @@ g_gc_blk_index:
 	.zero	2
 	.section	.bss.g_gc_blk_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR109,. + 0
+	.set	.LANCHOR108,. + 0
 	.type	g_gc_blk_num, %object
 	.size	g_gc_blk_num, 2
 g_gc_blk_num:
@@ -20571,42 +21007,42 @@ g_gc_merge_free_blk_threshold:
 	.zero	2
 	.section	.bss.g_gc_next_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR113,. + 0
+	.set	.LANCHOR112,. + 0
 	.type	g_gc_next_blk, %object
 	.size	g_gc_next_blk, 2
 g_gc_next_blk:
 	.zero	2
 	.section	.bss.g_gc_next_blk_1,"aw",@nobits
 	.align	1
-	.set	.LANCHOR114,. + 0
+	.set	.LANCHOR113,. + 0
 	.type	g_gc_next_blk_1, %object
 	.size	g_gc_next_blk_1, 2
 g_gc_next_blk_1:
 	.zero	2
 	.section	.bss.g_gc_next_blk_2,"aw",@nobits
 	.align	1
-	.set	.LANCHOR115,. + 0
+	.set	.LANCHOR114,. + 0
 	.type	g_gc_next_blk_2, %object
 	.size	g_gc_next_blk_2, 2
 g_gc_next_blk_2:
 	.zero	2
 	.section	.bss.g_gc_next_blk_3,"aw",@nobits
 	.align	1
-	.set	.LANCHOR116,. + 0
+	.set	.LANCHOR115,. + 0
 	.type	g_gc_next_blk_3, %object
 	.size	g_gc_next_blk_3, 2
 g_gc_next_blk_3:
 	.zero	2
 	.section	.bss.g_gc_num_req,"aw",@nobits
 	.align	2
-	.set	.LANCHOR103,. + 0
+	.set	.LANCHOR102,. + 0
 	.type	g_gc_num_req, %object
 	.size	g_gc_num_req, 4
 g_gc_num_req:
 	.zero	4
 	.section	.bss.g_gc_page_offset,"aw",@nobits
 	.align	1
-	.set	.LANCHOR111,. + 0
+	.set	.LANCHOR110,. + 0
 	.type	g_gc_page_offset, %object
 	.size	g_gc_page_offset, 2
 g_gc_page_offset:
@@ -20640,7 +21076,7 @@ g_gc_superblock:
 	.zero	48
 	.section	.bss.g_gc_temp_superblock,"aw",@nobits
 	.align	3
-	.set	.LANCHOR94,. + 0
+	.set	.LANCHOR93,. + 0
 	.type	g_gc_temp_superblock, %object
 	.size	g_gc_temp_superblock, 48
 g_gc_temp_superblock:
@@ -20668,13 +21104,13 @@ g_inkDie_check_enable:
 	.zero	4
 	.section	.bss.g_l2p_last_update_region_id,"aw",@nobits
 	.align	1
-	.set	.LANCHOR98,. + 0
+	.set	.LANCHOR97,. + 0
 	.type	g_l2p_last_update_region_id, %object
 	.size	g_l2p_last_update_region_id, 2
 g_l2p_last_update_region_id:
 	.zero	2
 	.section	.bss.g_maxRegNum,"aw",@nobits
-	.set	.LANCHOR13,. + 0
+	.set	.LANCHOR12,. + 0
 	.type	g_maxRegNum, %object
 	.size	g_maxRegNum, 1
 g_maxRegNum:
@@ -20701,42 +21137,42 @@ g_min_erase_count:
 	.zero	4
 	.section	.bss.g_nandc_version_data,"aw",@nobits
 	.align	2
-	.set	.LANCHOR29,. + 0
+	.set	.LANCHOR119,. + 0
 	.type	g_nandc_version_data, %object
 	.size	g_nandc_version_data, 4
 g_nandc_version_data:
 	.zero	4
 	.section	.bss.g_num_data_superblocks,"aw",@nobits
 	.align	1
-	.set	.LANCHOR86,. + 0
+	.set	.LANCHOR85,. + 0
 	.type	g_num_data_superblocks, %object
 	.size	g_num_data_superblocks, 2
 g_num_data_superblocks:
 	.zero	2
 	.section	.bss.g_num_free_superblocks,"aw",@nobits
 	.align	1
-	.set	.LANCHOR89,. + 0
+	.set	.LANCHOR88,. + 0
 	.type	g_num_free_superblocks, %object
 	.size	g_num_free_superblocks, 2
 g_num_free_superblocks:
 	.zero	2
 	.section	.bss.g_page_map_check_enable,"aw",@nobits
 	.align	1
-	.set	.LANCHOR70,. + 0
+	.set	.LANCHOR69,. + 0
 	.type	g_page_map_check_enable, %object
 	.size	g_page_map_check_enable, 2
 g_page_map_check_enable:
 	.zero	2
 	.section	.bss.g_power_lost_ecc_error_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR235,. + 0
+	.set	.LANCHOR234,. + 0
 	.type	g_power_lost_ecc_error_blk, %object
 	.size	g_power_lost_ecc_error_blk, 2
 g_power_lost_ecc_error_blk:
 	.zero	2
 	.section	.bss.g_power_lost_recovery_flag,"aw",@nobits
 	.align	1
-	.set	.LANCHOR236,. + 0
+	.set	.LANCHOR235,. + 0
 	.type	g_power_lost_recovery_flag, %object
 	.size	g_power_lost_recovery_flag, 2
 g_power_lost_recovery_flag:
@@ -20750,14 +21186,14 @@ g_recovery_page_min_ver:
 	.zero	4
 	.section	.bss.g_recovery_page_num,"aw",@nobits
 	.align	2
-	.set	.LANCHOR237,. + 0
+	.set	.LANCHOR236,. + 0
 	.type	g_recovery_page_num, %object
 	.size	g_recovery_page_num, 4
 g_recovery_page_num:
 	.zero	4
 	.section	.bss.g_recovery_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR238,. + 0
+	.set	.LANCHOR237,. + 0
 	.type	g_recovery_ppa_tbl, %object
 	.size	g_recovery_ppa_tbl, 128
 g_recovery_ppa_tbl:
@@ -20770,7 +21206,7 @@ g_recovery_ppa_tbl:
 g_req_cache:
 	.zero	8
 	.section	.bss.g_retryMode,"aw",@nobits
-	.set	.LANCHOR11,. + 0
+	.set	.LANCHOR10,. + 0
 	.type	g_retryMode, %object
 	.size	g_retryMode, 1
 g_retryMode:
@@ -20790,7 +21226,7 @@ g_sys_ext_data:
 	.zero	512
 	.section	.bss.g_sys_save_data,"aw",@nobits
 	.align	3
-	.set	.LANCHOR81,. + 0
+	.set	.LANCHOR80,. + 0
 	.type	g_sys_save_data, %object
 	.size	g_sys_save_data, 48
 g_sys_save_data:
@@ -20881,14 +21317,14 @@ g_totle_swl_count:
 	.zero	4
 	.section	.bss.g_totle_sys_slc_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR80,. + 0
+	.set	.LANCHOR79,. + 0
 	.type	g_totle_sys_slc_erase_count, %object
 	.size	g_totle_sys_slc_erase_count, 4
 g_totle_sys_slc_erase_count:
 	.zero	4
 	.section	.bss.g_totle_vendor_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR71,. + 0
+	.set	.LANCHOR70,. + 0
 	.type	g_totle_vendor_block, %object
 	.size	g_totle_vendor_block, 2
 g_totle_vendor_block:
@@ -20909,7 +21345,7 @@ g_totle_write_sector:
 	.zero	4
 	.section	.bss.gc_discard_updated,"aw",@nobits
 	.align	2
-	.set	.LANCHOR232,. + 0
+	.set	.LANCHOR231,. + 0
 	.type	gc_discard_updated, %object
 	.size	gc_discard_updated, 4
 gc_discard_updated:
@@ -20970,14 +21406,14 @@ gp_flash_check_buf:
 	.zero	262144
 	.section	.bss.gp_gc_page_buf_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR104,. + 0
+	.set	.LANCHOR103,. + 0
 	.type	gp_gc_page_buf_info, %object
 	.size	gp_gc_page_buf_info, 8
 gp_gc_page_buf_info:
 	.zero	8
 	.section	.bss.gp_last_act_superblock,"aw",@nobits
 	.align	3
-	.set	.LANCHOR230,. + 0
+	.set	.LANCHOR229,. + 0
 	.type	gp_last_act_superblock, %object
 	.size	gp_last_act_superblock, 8
 gp_last_act_superblock:
@@ -20988,6 +21424,13 @@ gp_last_act_superblock:
 	.size	idb_buf, 262144
 idb_buf:
 	.zero	262144
+	.section	.bss.idb_flash_slc_mode,"aw",@nobits
+	.align	2
+	.set	.LANCHOR29,. + 0
+	.type	idb_flash_slc_mode, %object
+	.size	idb_flash_slc_mode, 4
+idb_flash_slc_mode:
+	.zero	4
 	.section	.bss.idb_need_write_back,"aw",@nobits
 	.align	2
 	.set	.LANCHOR154,. + 0
@@ -21011,63 +21454,63 @@ p_blk_mode_table:
 	.zero	8
 	.section	.bss.p_data_block_list_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR83,. + 0
+	.set	.LANCHOR82,. + 0
 	.type	p_data_block_list_head, %object
 	.size	p_data_block_list_head, 8
 p_data_block_list_head:
 	.zero	8
 	.section	.bss.p_data_block_list_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR82,. + 0
+	.set	.LANCHOR81,. + 0
 	.type	p_data_block_list_table, %object
 	.size	p_data_block_list_table, 8
 p_data_block_list_table:
 	.zero	8
 	.section	.bss.p_data_block_list_tail,"aw",@nobits
 	.align	3
-	.set	.LANCHOR85,. + 0
+	.set	.LANCHOR84,. + 0
 	.type	p_data_block_list_tail, %object
 	.size	p_data_block_list_tail, 8
 p_data_block_list_tail:
 	.zero	8
 	.section	.bss.p_erase_count_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR79,. + 0
+	.set	.LANCHOR78,. + 0
 	.type	p_erase_count_table, %object
 	.size	p_erase_count_table, 8
 p_erase_count_table:
 	.zero	8
 	.section	.bss.p_free_data_block_list_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR88,. + 0
+	.set	.LANCHOR87,. + 0
 	.type	p_free_data_block_list_head, %object
 	.size	p_free_data_block_list_head, 8
 p_free_data_block_list_head:
 	.zero	8
 	.section	.bss.p_gc_blk_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR110,. + 0
+	.set	.LANCHOR109,. + 0
 	.type	p_gc_blk_tbl, %object
 	.size	p_gc_blk_tbl, 8
 p_gc_blk_tbl:
 	.zero	8
 	.section	.bss.p_gc_data_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR105,. + 0
+	.set	.LANCHOR104,. + 0
 	.type	p_gc_data_buf, %object
 	.size	p_gc_data_buf, 8
 p_gc_data_buf:
 	.zero	8
 	.section	.bss.p_gc_page_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR112,. + 0
+	.set	.LANCHOR111,. + 0
 	.type	p_gc_page_info, %object
 	.size	p_gc_page_info, 8
 p_gc_page_info:
 	.zero	8
 	.section	.bss.p_gc_spare_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR106,. + 0
+	.set	.LANCHOR105,. + 0
 	.type	p_gc_spare_buf, %object
 	.size	p_gc_spare_buf, 8
 p_gc_spare_buf:
@@ -21102,7 +21545,7 @@ p_l2p_map_buf:
 	.zero	8
 	.section	.bss.p_l2p_ram_map,"aw",@nobits
 	.align	3
-	.set	.LANCHOR97,. + 0
+	.set	.LANCHOR96,. + 0
 	.type	p_l2p_ram_map, %object
 	.size	p_l2p_ram_map, 8
 p_l2p_ram_map:
@@ -21185,14 +21628,14 @@ p_valid_page_count_check_table:
 	.zero	8
 	.section	.bss.p_valid_page_count_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR84,. + 0
+	.set	.LANCHOR83,. + 0
 	.type	p_valid_page_count_table, %object
 	.size	p_valid_page_count_table, 8
 p_valid_page_count_table:
 	.zero	8
 	.section	.bss.p_vendor_block_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR72,. + 0
+	.set	.LANCHOR71,. + 0
 	.type	p_vendor_block_table, %object
 	.size	p_vendor_block_table, 8
 p_vendor_block_table:
@@ -21234,14 +21677,14 @@ read_retry_cur_offset:
 	.zero	4
 	.section	.bss.req_erase,"aw",@nobits
 	.align	3
-	.set	.LANCHOR78,. + 0
+	.set	.LANCHOR77,. + 0
 	.type	req_erase, %object
 	.size	req_erase, 8
 req_erase:
 	.zero	8
 	.section	.bss.req_gc,"aw",@nobits
 	.align	3
-	.set	.LANCHOR107,. + 0
+	.set	.LANCHOR106,. + 0
 	.type	req_gc, %object
 	.size	req_gc, 8
 req_gc:
@@ -21297,7 +21740,7 @@ LastWritenPbaAddr:
 	.align	3
 	.set	.LANCHOR142,. + 0
 	.type	NandFlashParaTbl, %object
-	.size	NandFlashParaTbl, 2464
+	.size	NandFlashParaTbl, 2592
 NandFlashParaTbl:
 	.byte	6
 	.byte	44
@@ -21874,6 +22317,58 @@ NandFlashParaTbl:
 	.byte	5
 	.byte	44
 	.byte	-124
+	.byte	68
+	.byte	50
+	.byte	-86
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	32
+	.hword	512
+	.byte	2
+	.byte	1
+	.hword	2184
+	.hword	1479
+	.byte	5
+	.byte	19
+	.byte	60
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	4
+	.byte	0
+	.byte	1
+	.byte	0
+	.zero	4
+	.byte	5
+	.byte	44
+	.byte	-124
+	.byte	68
+	.byte	52
+	.byte	-86
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	32
+	.hword	512
+	.byte	2
+	.byte	1
+	.hword	2184
+	.hword	1479
+	.byte	5
+	.byte	19
+	.byte	60
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	4
+	.byte	0
+	.byte	1
+	.byte	0
+	.zero	4
+	.byte	5
+	.byte	44
+	.byte	-124
 	.byte	-60
 	.byte	52
 	.byte	-86
@@ -21923,6 +22418,32 @@ NandFlashParaTbl:
 	.byte	1
 	.byte	0
 	.zero	4
+	.byte	5
+	.byte	44
+	.byte	-124
+	.byte	100
+	.byte	60
+	.byte	-87
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	32
+	.hword	512
+	.byte	2
+	.byte	2
+	.hword	1024
+	.hword	479
+	.byte	3
+	.byte	17
+	.byte	40
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.zero	4
 	.byte	6
 	.byte	-83
 	.byte	-34
@@ -22262,6 +22783,32 @@ NandFlashParaTbl:
 	.byte	0
 	.zero	4
 	.byte	6
+	.byte	-83
+	.byte	58
+	.byte	20
+	.byte	3
+	.byte	8
+	.byte	80
+	.byte	2
+	.byte	1
+	.byte	32
+	.hword	388
+	.byte	2
+	.byte	2
+	.hword	1362
+	.hword	473
+	.byte	9
+	.byte	8
+	.byte	40
+	.byte	32
+	.byte	3
+	.byte	1
+	.byte	3
+	.byte	0
+	.byte	0
+	.byte	0
+	.zero	4
+	.byte	6
 	.byte	-119
 	.byte	100
 	.byte	68
@@ -22458,7 +23005,7 @@ NandFlashParaTbl:
 	.byte	1
 	.hword	1024
 	.hword	455
-	.byte	3
+	.byte	4
 	.byte	17
 	.byte	40
 	.byte	32
@@ -23385,7 +23932,7 @@ NandOptPara:
 	.zero	14
 	.section	.data.SamsungRefValue,"aw",@progbits
 	.align	3
-	.set	.LANCHOR14,. + 0
+	.set	.LANCHOR13,. + 0
 	.type	SamsungRefValue, %object
 	.size	SamsungRefValue, 64
 SamsungRefValue:
@@ -23455,7 +24002,7 @@ SamsungRefValue:
 	.byte	0
 	.section	.data.Toshiba15RefValue,"aw",@progbits
 	.align	3
-	.set	.LANCHOR9,. + 0
+	.set	.LANCHOR8,. + 0
 	.type	Toshiba15RefValue, %object
 	.size	Toshiba15RefValue, 95
 Toshiba15RefValue:
@@ -23556,7 +24103,7 @@ Toshiba15RefValue:
 	.byte	0
 	.section	.data.ToshibaA19RefValue,"aw",@progbits
 	.align	3
-	.set	.LANCHOR10,. + 0
+	.set	.LANCHOR9,. + 0
 	.type	ToshibaA19RefValue, %object
 	.size	ToshibaA19RefValue, 45
 ToshibaA19RefValue:
@@ -23607,7 +24154,7 @@ ToshibaA19RefValue:
 	.byte	0
 	.section	.data.ToshibaRefValue,"aw",@progbits
 	.align	3
-	.set	.LANCHOR12,. + 0
+	.set	.LANCHOR11,. + 0
 	.type	ToshibaRefValue, %object
 	.size	ToshibaRefValue, 8
 ToshibaRefValue:
@@ -23621,14 +24168,14 @@ ToshibaRefValue:
 	.byte	112
 	.section	.data.ftl_gc_temp_block_bops_scan_page_addr,"aw",@progbits
 	.align	1
-	.set	.LANCHOR226,. + 0
+	.set	.LANCHOR238,. + 0
 	.type	ftl_gc_temp_block_bops_scan_page_addr, %object
 	.size	ftl_gc_temp_block_bops_scan_page_addr, 2
 ftl_gc_temp_block_bops_scan_page_addr:
 	.hword	-1
 	.section	.data.gFtlInitStatus,"aw",@progbits
 	.align	2
-	.set	.LANCHOR231,. + 0
+	.set	.LANCHOR230,. + 0
 	.type	gFtlInitStatus, %object
 	.size	gFtlInitStatus, 4
 gFtlInitStatus:
@@ -23892,7 +24439,7 @@ refValueDefault:
 .LC32:
 	.string	"prog read d error: = %x %x %x\n"
 	.section	.rodata.FlashReadFacBbtData.str1.1,"aMS",@progbits,1
-.LC53:
+.LC52:
 	.string	"BBT:"
 	.section	.rodata.FlashReadIdbDataRaw.str1.1,"aMS",@progbits,1
 .LC14:
@@ -23921,13 +24468,13 @@ refValueDefault:
 .LC35:
 	.string	"FtlBbmTblFlush error = %x error count = %d\n"
 	.section	.rodata.FtlCheckVpc.str1.1,"aMS",@progbits,1
-.LC73:
-	.string	"vpc1"
 .LC74:
-	.string	"vpc2"
+	.string	"vpc1"
 .LC75:
-	.string	"FtlCheckVpc2 %x = %x  %x\n"
+	.string	"vpc2"
 .LC76:
+	.string	"FtlCheckVpc2 %x = %x  %x\n"
+.LC77:
 	.string	"free blk vpc error %x = %x  %x\n"
 	.section	.rodata.FtlDumpBlockInfo.str1.1,"aMS",@progbits,1
 .LC45:
@@ -23939,9 +24486,9 @@ refValueDefault:
 .LC48:
 	.string	"id = %x,%x addr= %x,spare= %x %x %x %x data=%x %x\n"
 	.section	.rodata.FtlDumpSysBlock.str1.1,"aMS",@progbits,1
-.LC77:
-	.string	"id = %x,%x addr= %x,spare= %x %x %x %x data = %x\n"
 .LC78:
+	.string	"id = %x,%x addr= %x,spare= %x %x %x %x data = %x\n"
+.LC79:
 	.string	":"
 	.section	.rodata.FtlFreeSysBlkQueueOut.str1.1,"aMS",@progbits,1
 .LC3:
@@ -23949,17 +24496,19 @@ refValueDefault:
 .LC4:
 	.string	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\n"
 	.section	.rodata.FtlGcFreeTempBlock.str1.1,"aMS",@progbits,1
-.LC64:
+.LC65:
 	.string	"GC des block %x done\n"
 	.section	.rodata.FtlGcScanTempBlk.str1.1,"aMS",@progbits,1
-.LC52:
+.LC63:
+	.string	"FtlGcScanTempBlk Error ID %x %x!!!!!!! \n"
+.LC64:
 	.string	"FtlGcScanTempBlkError ID %x %x!!!!!!!\n"
 	.section	.rodata.FtlInit.str1.1,"aMS",@progbits,1
-.LC66:
-	.string	"FTL version: 5.0.50 20180905"
 .LC67:
-	.string	"...%s: no bad block mapping table, format device\n"
+	.string	"FTL version: 5.0.53 20190107"
 .LC68:
+	.string	"...%s: no bad block mapping table, format device\n"
+.LC69:
 	.string	"...%s FtlSysBlkInit error ,format device!\n"
 	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",@progbits,1
 .LC43:
@@ -23970,14 +24519,14 @@ refValueDefault:
 .LC41:
 	.string	"FtlMapWritePage error = %x error count = %d\n"
 	.section	.rodata.FtlProgPages.str1.1,"aMS",@progbits,1
-.LC57:
+.LC56:
 	.string	"Ftlwrite decrement_vpc_count %x = %d\n"
 	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",@progbits,1
-.LC61:
+.LC60:
 	.string	"RSB refresh addr %x\n"
-.LC62:
+.LC61:
 	.string	"spuer block %x vpn is 0\n "
-.LC63:
+.LC62:
 	.string	"g_recovery_ppa %x ver %x\n "
 	.section	.rodata.FtlScanAllBlock.str1.1,"aMS",@progbits,1
 .LC49:
@@ -23993,17 +24542,17 @@ refValueDefault:
 .LC38:
 	.string	"FtlVpcTblFlush error = %x error count = %d\n"
 	.section	.rodata.FtlWrite.str1.1,"aMS",@progbits,1
-.LC72:
+.LC73:
 	.string	"FtlWrite: lpa error:%x %x\n"
 	.section	.rodata.Ftl_load_ext_data.str1.1,"aMS",@progbits,1
 .LC44:
 	.string	"slc mode"
 	.section	.rodata.Ftlscanalldata.str1.1,"aMS",@progbits,1
-.LC58:
+.LC57:
 	.string	"Ftlscanalldata = %x\n"
-.LC59:
+.LC58:
 	.string	"scan lpa = %x ppa= %x\n"
-.LC60:
+.LC59:
 	.string	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\n"
 	.section	.rodata.HynixGetReadRetryDefault.str1.1,"aMS",@progbits,1
 .LC21:
@@ -24020,255 +24569,255 @@ refValueDefault:
 	.section	.rodata.MicronReadRetrial.str1.1,"aMS",@progbits,1
 .LC13:
 	.string	"micron RR %d row=%x,count %d,status=%d\n"
-	.section	.rodata.__func__.10011,"a",@progbits
+	.section	.rodata.__func__.10005,"a",@progbits
+	.align	3
+	.set	.LANCHOR220,. + 0
+	.type	__func__.10005, %object
+	.size	__func__.10005, 14
+__func__.10005:
+	.string	"FtlScanSysBlk"
+	.section	.rodata.__func__.10060,"a",@progbits
+	.align	3
+	.set	.LANCHOR221,. + 0
+	.type	__func__.10060, %object
+	.size	__func__.10060, 15
+__func__.10060:
+	.string	"FtlLoadSysInfo"
+	.section	.rodata.__func__.10071,"a",@progbits
+	.align	3
+	.set	.LANCHOR248,. + 0
+	.type	__func__.10071, %object
+	.size	__func__.10071, 12
+__func__.10071:
+	.string	"FtlCheckVpc"
+	.section	.rodata.__func__.10103,"a",@progbits
+	.align	3
+	.set	.LANCHOR224,. + 0
+	.type	__func__.10103, %object
+	.size	__func__.10103, 17
+__func__.10103:
+	.string	"FtlDumpBlockInfo"
+	.section	.rodata.__func__.10122,"a",@progbits
 	.align	3
 	.set	.LANCHOR225,. + 0
-	.type	__func__.10011, %object
-	.size	__func__.10011, 16
-__func__.10011:
+	.type	__func__.10122, %object
+	.size	__func__.10122, 16
+__func__.10122:
 	.string	"FtlScanAllBlock"
-	.section	.rodata.__func__.10116,"a",@progbits
+	.section	.rodata.__func__.10227,"a",@progbits
 	.align	3
-	.set	.LANCHOR233,. + 0
-	.type	__func__.10116, %object
-	.size	__func__.10116, 16
-__func__.10116:
+	.set	.LANCHOR232,. + 0
+	.type	__func__.10227, %object
+	.size	__func__.10227, 16
+__func__.10227:
 	.string	"FtlReUsePrevPpa"
-	.section	.rodata.__func__.10149,"a",@progbits
+	.section	.rodata.__func__.10260,"a",@progbits
 	.align	3
-	.set	.LANCHOR234,. + 0
-	.type	__func__.10149, %object
-	.size	__func__.10149, 22
-__func__.10149:
+	.set	.LANCHOR233,. + 0
+	.type	__func__.10260, %object
+	.size	__func__.10260, 22
+__func__.10260:
 	.string	"FtlRecoverySuperblock"
-	.section	.rodata.__func__.10203,"a",@progbits
+	.section	.rodata.__func__.10314,"a",@progbits
 	.align	3
-	.set	.LANCHOR102,. + 0
-	.type	__func__.10203, %object
-	.size	__func__.10203, 16
-__func__.10203:
+	.set	.LANCHOR101,. + 0
+	.type	__func__.10314, %object
+	.size	__func__.10314, 16
+__func__.10314:
 	.string	"make_superblock"
-	.section	.rodata.__func__.10223,"a",@progbits
+	.section	.rodata.__func__.10334,"a",@progbits
 	.align	3
 	.set	.LANCHOR140,. + 0
-	.type	__func__.10223, %object
-	.size	__func__.10223, 18
-__func__.10223:
+	.type	__func__.10334, %object
+	.size	__func__.10334, 18
+__func__.10334:
 	.string	"SupperBlkListInit"
-	.section	.rodata.__func__.10300,"a",@progbits
+	.section	.rodata.__func__.10411,"a",@progbits
 	.align	3
 	.set	.LANCHOR203,. + 0
-	.type	__func__.10300, %object
-	.size	__func__.10300, 25
-__func__.10300:
+	.type	__func__.10411, %object
+	.size	__func__.10411, 25
+__func__.10411:
 	.string	"allocate_data_superblock"
-	.section	.rodata.__func__.10314,"a",@progbits
+	.section	.rodata.__func__.10425,"a",@progbits
 	.align	3
 	.set	.LANCHOR219,. + 0
-	.type	__func__.10314, %object
-	.size	__func__.10314, 29
-__func__.10314:
+	.type	__func__.10425, %object
+	.size	__func__.10425, 29
+__func__.10425:
 	.string	"allocate_new_data_superblock"
-	.section	.rodata.__func__.10320,"a",@progbits
+	.section	.rodata.__func__.10431,"a",@progbits
 	.align	3
 	.set	.LANCHOR208,. + 0
-	.type	__func__.10320, %object
-	.size	__func__.10320, 19
-__func__.10320:
+	.type	__func__.10431, %object
+	.size	__func__.10431, 19
+__func__.10431:
 	.string	"get_new_active_ppa"
-	.section	.rodata.__func__.10331,"a",@progbits
+	.section	.rodata.__func__.10442,"a",@progbits
 	.align	3
 	.set	.LANCHOR206,. + 0
-	.type	__func__.10331, %object
-	.size	__func__.10331, 16
-__func__.10331:
+	.type	__func__.10442, %object
+	.size	__func__.10442, 16
+__func__.10442:
 	.string	"update_vpc_list"
-	.section	.rodata.__func__.10336,"a",@progbits
+	.section	.rodata.__func__.10447,"a",@progbits
 	.align	3
 	.set	.LANCHOR207,. + 0
-	.type	__func__.10336, %object
-	.size	__func__.10336, 20
-__func__.10336:
+	.type	__func__.10447, %object
+	.size	__func__.10447, 20
+__func__.10447:
 	.string	"decrement_vpc_count"
-	.section	.rodata.__func__.10404,"a",@progbits
+	.section	.rodata.__func__.10515,"a",@progbits
 	.align	3
 	.set	.LANCHOR239,. + 0
-	.type	__func__.10404, %object
-	.size	__func__.10404, 19
-__func__.10404:
+	.type	__func__.10515, %object
+	.size	__func__.10515, 19
+__func__.10515:
 	.string	"FtlGcFreeTempBlock"
-	.section	.rodata.__func__.10498,"a",@progbits
+	.section	.rodata.__func__.10614,"a",@progbits
 	.align	3
 	.set	.LANCHOR243,. + 0
-	.type	__func__.10498, %object
-	.size	__func__.10498, 23
-__func__.10498:
+	.type	__func__.10614, %object
+	.size	__func__.10614, 23
+__func__.10614:
 	.string	"rk_ftl_garbage_collect"
-	.section	.rodata.__func__.9325,"a",@progbits
+	.section	.rodata.__func__.9435,"a",@progbits
 	.align	3
 	.set	.LANCHOR245,. + 0
-	.type	__func__.9325, %object
-	.size	__func__.9325, 8
-__func__.9325:
+	.type	__func__.9435, %object
+	.size	__func__.9435, 8
+__func__.9435:
 	.string	"FtlInit"
-	.section	.rodata.__func__.9385,"a",@progbits
+	.section	.rodata.__func__.9495,"a",@progbits
 	.align	3
-	.set	.LANCHOR229,. + 0
-	.type	__func__.9385, %object
-	.size	__func__.9385, 13
-__func__.9385:
+	.set	.LANCHOR228,. + 0
+	.type	__func__.9495, %object
+	.size	__func__.9495, 13
+__func__.9495:
 	.string	"FtlProgPages"
-	.section	.rodata.__func__.9411,"a",@progbits
+	.section	.rodata.__func__.9521,"a",@progbits
 	.align	3
 	.set	.LANCHOR247,. + 0
-	.type	__func__.9411, %object
-	.size	__func__.9411, 9
-__func__.9411:
+	.type	__func__.9521, %object
+	.size	__func__.9521, 9
+__func__.9521:
 	.string	"FtlWrite"
-	.section	.rodata.__func__.9494,"a",@progbits
+	.section	.rodata.__func__.9604,"a",@progbits
 	.align	3
 	.set	.LANCHOR124,. + 0
-	.type	__func__.9494, %object
-	.size	__func__.9494, 14
-__func__.9494:
+	.type	__func__.9604, %object
+	.size	__func__.9604, 14
+__func__.9604:
 	.string	"FtlBbt2Bitmap"
-	.section	.rodata.__func__.9540,"a",@progbits
+	.section	.rodata.__func__.9650,"a",@progbits
 	.align	3
 	.set	.LANCHOR211,. + 0
-	.type	__func__.9540, %object
-	.size	__func__.9540, 11
-__func__.9540:
+	.type	__func__.9650, %object
+	.size	__func__.9650, 11
+__func__.9650:
 	.string	"FtlLoadBbt"
-	.section	.rodata.__func__.9633,"a",@progbits
+	.section	.rodata.__func__.9743,"a",@progbits
 	.align	3
-	.set	.LANCHOR90,. + 0
-	.type	__func__.9633, %object
-	.size	__func__.9633, 17
-__func__.9633:
+	.set	.LANCHOR89,. + 0
+	.type	__func__.9743, %object
+	.size	__func__.9743, 17
+__func__.9743:
 	.string	"INSERT_FREE_LIST"
-	.section	.rodata.__func__.9637,"a",@progbits
+	.section	.rodata.__func__.9747,"a",@progbits
 	.align	3
-	.set	.LANCHOR87,. + 0
-	.type	__func__.9637, %object
-	.size	__func__.9637, 17
-__func__.9637:
+	.set	.LANCHOR86,. + 0
+	.type	__func__.9747, %object
+	.size	__func__.9747, 17
+__func__.9747:
 	.string	"INSERT_DATA_LIST"
-	.section	.rodata.__func__.9674,"a",@progbits
+	.section	.rodata.__func__.9784,"a",@progbits
 	.align	3
-	.set	.LANCHOR91,. + 0
-	.type	__func__.9674, %object
-	.size	__func__.9674, 17
-__func__.9674:
+	.set	.LANCHOR90,. + 0
+	.type	__func__.9784, %object
+	.size	__func__.9784, 17
+__func__.9784:
 	.string	"List_remove_node"
-	.section	.rodata.__func__.9704,"a",@progbits
+	.section	.rodata.__func__.9814,"a",@progbits
 	.align	3
-	.set	.LANCHOR95,. + 0
-	.type	__func__.9704, %object
-	.size	__func__.9704, 22
-__func__.9704:
+	.set	.LANCHOR94,. + 0
+	.type	__func__.9814, %object
+	.size	__func__.9814, 22
+__func__.9814:
 	.string	"List_update_data_list"
-	.section	.rodata.__func__.9711,"a",@progbits
+	.section	.rodata.__func__.9821,"a",@progbits
 	.align	3
-	.set	.LANCHOR228,. + 0
-	.type	__func__.9711, %object
-	.size	__func__.9711, 20
-__func__.9711:
+	.set	.LANCHOR227,. + 0
+	.type	__func__.9821, %object
+	.size	__func__.9821, 20
+__func__.9821:
 	.string	"ftl_load_l2p_region"
-	.section	.rodata.__func__.9742,"a",@progbits
+	.section	.rodata.__func__.9852,"a",@progbits
 	.align	3
-	.set	.LANCHOR96,. + 0
-	.type	__func__.9742, %object
-	.size	__func__.9742, 26
-__func__.9742:
+	.set	.LANCHOR95,. + 0
+	.type	__func__.9852, %object
+	.size	__func__.9852, 26
+__func__.9852:
 	.string	"ftl_map_blk_alloc_new_blk"
-	.section	.rodata.__func__.9752,"a",@progbits
+	.section	.rodata.__func__.9862,"a",@progbits
 	.align	3
 	.set	.LANCHOR212,. + 0
-	.type	__func__.9752, %object
-	.size	__func__.9752, 15
-__func__.9752:
+	.type	__func__.9862, %object
+	.size	__func__.9862, 15
+__func__.9862:
 	.string	"ftl_map_blk_gc"
-	.section	.rodata.__func__.9765,"a",@progbits
+	.section	.rodata.__func__.9875,"a",@progbits
 	.align	3
 	.set	.LANCHOR213,. + 0
-	.type	__func__.9765, %object
-	.size	__func__.9765, 31
-__func__.9765:
+	.type	__func__.9875, %object
+	.size	__func__.9875, 31
+__func__.9875:
 	.string	"Ftl_write_map_blk_to_last_page"
-	.section	.rodata.__func__.9778,"a",@progbits
+	.section	.rodata.__func__.9888,"a",@progbits
 	.align	3
 	.set	.LANCHOR214,. + 0
-	.type	__func__.9778, %object
-	.size	__func__.9778, 16
-__func__.9778:
+	.type	__func__.9888, %object
+	.size	__func__.9888, 16
+__func__.9888:
 	.string	"FtlMapWritePage"
-	.section	.rodata.__func__.9798,"a",@progbits
+	.section	.rodata.__func__.9908,"a",@progbits
 	.align	3
-	.set	.LANCHOR99,. + 0
-	.type	__func__.9798, %object
-	.size	__func__.9798, 22
-__func__.9798:
+	.set	.LANCHOR98,. + 0
+	.type	__func__.9908, %object
+	.size	__func__.9908, 22
+__func__.9908:
 	.string	"select_l2p_ram_region"
-	.section	.rodata.__func__.9814,"a",@progbits
+	.section	.rodata.__func__.9924,"a",@progbits
 	.align	3
-	.set	.LANCHOR227,. + 0
-	.type	__func__.9814, %object
-	.size	__func__.9814, 9
-__func__.9814:
+	.set	.LANCHOR226,. + 0
+	.type	__func__.9924, %object
+	.size	__func__.9924, 9
+__func__.9924:
 	.string	"log2phys"
-	.section	.rodata.__func__.9876,"a",@progbits
+	.section	.rodata.__func__.9986,"a",@progbits
 	.align	3
 	.set	.LANCHOR210,. + 0
-	.type	__func__.9876, %object
-	.size	__func__.9876, 15
-__func__.9876:
+	.type	__func__.9986, %object
+	.size	__func__.9986, 15
+__func__.9986:
 	.string	"FtlVpcTblFlush"
-	.section	.rodata.__func__.9895,"a",@progbits
-	.align	3
-	.set	.LANCHOR220,. + 0
-	.type	__func__.9895, %object
-	.size	__func__.9895, 14
-__func__.9895:
-	.string	"FtlScanSysBlk"
-	.section	.rodata.__func__.9949,"a",@progbits
-	.align	3
-	.set	.LANCHOR221,. + 0
-	.type	__func__.9949, %object
-	.size	__func__.9949, 15
-__func__.9949:
-	.string	"FtlLoadSysInfo"
-	.section	.rodata.__func__.9960,"a",@progbits
-	.align	3
-	.set	.LANCHOR248,. + 0
-	.type	__func__.9960, %object
-	.size	__func__.9960, 12
-__func__.9960:
-	.string	"FtlCheckVpc"
-	.section	.rodata.__func__.9992,"a",@progbits
-	.align	3
-	.set	.LANCHOR224,. + 0
-	.type	__func__.9992, %object
-	.size	__func__.9992, 17
-__func__.9992:
-	.string	"FtlDumpBlockInfo"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",@progbits,1
 .LC36:
 	.string	"decrement_vpc_count %x = %d\n"
 .LC37:
 	.string	"decrement_vpc_count %x = %d in free list\n"
 	.section	.rodata.dump_map_info.str1.1,"aMS",@progbits,1
-.LC79:
-	.string	"phyBlk = %x,addr= %x,spare= %x %x %x %x data=%x %x\n"
 .LC80:
-	.string	"Mblk:"
+	.string	"phyBlk = %x,addr= %x,spare= %x %x %x %x data=%x %x\n"
 .LC81:
-	.string	"L2P:"
+	.string	"Mblk:"
 .LC82:
+	.string	"L2P:"
+.LC83:
 	.string	"L2PC:"
 	.section	.rodata.ftl_fix_nand_power_lost_error.str1.1,"aMS",@progbits,1
-.LC70:
-	.string	"fix power lost blk = %x vpc=%x\n"
 .LC71:
+	.string	"fix power lost blk = %x vpc=%x\n"
+.LC72:
 	.string	"erase power lost blk = %x vpc=%x\n"
 	.section	.rodata.ftl_map_blk_alloc_new_blk.str1.1,"aMS",@progbits,1
 .LC8:
@@ -24284,17 +24833,17 @@ __func__.9992:
 .LC17:
 	.string	"write_idblock fail! %x\n"
 	.section	.rodata.log2phys.str1.1,"aMS",@progbits,1
-.LC54:
+.LC53:
 	.string	"region_id = %x phyAddr = %x\n"
-.LC55:
+.LC54:
 	.string	"map_ppn:"
-.LC56:
+.LC55:
 	.string	"load_l2p_region refresh = %x phyAddr = %x\n"
 	.section	.rodata.rk_ftl_garbage_collect.str1.1,"aMS",@progbits,1
-.LC65:
+.LC66:
 	.string	"g_gc_superblock_free %x %x %x %x %x\n"
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",@progbits,1
-.LC69:
+.LC70:
 	.string	"FtlInit %x\n"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
 .LC18:
diff --git a/drivers/rknand/rk_zftl_arm_v8.S b/drivers/rknand/rk_zftl_arm_v8.S
index 125ba6d30c..8e0423e3d2 100644
--- a/drivers/rknand/rk_zftl_arm_v8.S
+++ b/drivers/rknand/rk_zftl_arm_v8.S
@@ -5,10 +5,10 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2018-09-08
+ * date: 2019-01-07
  */
 	.arch armv8-a
-	.file	"rk_zftl_arm_v8.S"
+	.file	"rk_zftl_arm_v8.c"
 	.section	.text.flash_mem_cmp8,"ax",@progbits
 	.align	2
 	.type	flash_mem_cmp8, %function
@@ -540,10 +540,10 @@ zftl_get_gc_node.part.9:
 	ldr	x0, [x0, #:lo12:.LANCHOR12]
 	b	_list_get_gc_head_node.isra.2
 	.size	zftl_get_gc_node.part.9, .-zftl_get_gc_node.part.9
-	.section	.text.nandc_de_cs.constprop.29,"ax",@progbits
+	.section	.text.nandc_de_cs.constprop.28,"ax",@progbits
 	.align	2
-	.type	nandc_de_cs.constprop.29, %function
-nandc_de_cs.constprop.29:
+	.type	nandc_de_cs.constprop.28, %function
+nandc_de_cs.constprop.28:
 	adrp	x0, .LANCHOR13
 	ldr	x1, [x0, #:lo12:.LANCHOR13]
 	ldr	w0, [x1]
@@ -551,7 +551,7 @@ nandc_de_cs.constprop.29:
 	and	w0, w0, -131073
 	str	w0, [x1]
 	ret
-	.size	nandc_de_cs.constprop.29, .-nandc_de_cs.constprop.29
+	.size	nandc_de_cs.constprop.28, .-nandc_de_cs.constprop.28
 	.section	.text.nand_flash_print_info,"ax",@progbits
 	.align	2
 	.global	nand_flash_print_info
@@ -957,43 +957,47 @@ toshiba_set_rr_para:
 hynix_set_rr_para:
 	adrp	x2, .LANCHOR26
 	and	w1, w1, 255
-	mov	x3, 32
 	and	w0, w0, 255
-	ldr	x2, [x2, #:lo12:.LANCHOR26]
-	mov	x4, 0
-	add	x6, x2, 128
-	add	x2, x2, 112
-	ldrb	w5, [x2, 1]
-	cmp	w5, w4, uxtb
-	umaddl	x3, w1, w5, x3
-	mov	w1, 160
-	umaddl	x1, w1, w0, x3
+	ldr	x3, [x2, #:lo12:.LANCHOR26]
+	adrp	x2, .LANCHOR13
+	add	x6, x3, 128
+	add	x4, x3, 112
+	ldr	x2, [x2, #:lo12:.LANCHOR13]
+	ldrb	w5, [x3, 113]
+	ldrb	w3, [x3, 112]
+	cmp	w3, 8
+	mov	x3, 32
+	umaddl	x1, w1, w5, x3
+	beq	.L223
+	mov	w3, 160
+	umaddl	x1, w3, w0, x1
+.L223:
 	ubfiz	x0, x0, 8, 8
-	add	x2, x2, x1
-	adrp	x1, .LANCHOR13
-	ldr	x3, [x1, #:lo12:.LANCHOR13]
-	add	x3, x3, x0
+	mov	x3, 0
+	add	x2, x2, x0
 	mov	w0, 54
-	str	w0, [x3, 2056]
-	bhi	.L228
+	add	x4, x4, x1
+	cmp	w5, w3, uxtb
+	str	w0, [x2, 2056]
+	bhi	.L230
 	mov	w0, 22
-	str	w0, [x3, 2056]
+	str	w0, [x2, 2056]
 	ret
-.L228:
+.L230:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
-.L224:
-	ldrb	w0, [x6, x4]
-	str	w0, [x3, 2052]
+.L226:
+	ldrb	w0, [x6, x3]
+	str	w0, [x2, 2052]
 	mov	w0, 120
 	bl	timer_delay_ns
-	ldrsb	w0, [x2, x4]
-	str	w0, [x3, 2048]
-	add	x4, x4, 1
-	cmp	w5, w4, uxtb
-	bhi	.L224
+	ldrsb	w0, [x4, x3]
+	str	w0, [x2, 2048]
+	add	x3, x3, 1
+	cmp	w5, w3, uxtb
+	bhi	.L226
 	mov	w0, 22
-	str	w0, [x3, 2056]
+	str	w0, [x2, 2056]
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	hynix_set_rr_para, .-hynix_set_rr_para
@@ -1006,15 +1010,15 @@ hynix_reconfig_rr_para:
 	ldrb	w1, [x1, #:lo12:.LANCHOR23]
 	sub	w1, w1, #1
 	and	w1, w1, 255
-	cmp	w1, 6
-	bhi	.L235
+	cmp	w1, 7
+	bhi	.L237
 	adrp	x8, .LANCHOR26
 	and	w0, w0, 255
 	sxtw	x7, w0
 	ldr	x1, [x8, #:lo12:.LANCHOR26]
 	add	x1, x1, x7
 	ldrb	w1, [x1, 120]
-	cbz	w1, .L235
+	cbz	w1, .L237
 	stp	x29, x30, [sp, -16]!
 	mov	w1, 0
 	add	x29, sp, 0
@@ -1024,7 +1028,7 @@ hynix_reconfig_rr_para:
 	strb	wzr, [x0, 120]
 	ldp	x29, x30, [sp], 16
 	ret
-.L235:
+.L237:
 	ret
 	.size	hynix_reconfig_rr_para, .-hynix_reconfig_rr_para
 	.section	.text.nandc_set_ddr_para,"ax",@progbits
@@ -1042,10 +1046,10 @@ nandc_set_ddr_para:
 	lsl	w0, w0, 8
 	orr	w1, w1, w0
 	orr	w1, w1, 3
-	bne	.L239
+	bne	.L241
 	str	w1, [x2, 80]
 	ret
-.L239:
+.L241:
 	str	w1, [x2, 304]
 	ret
 	.size	nandc_set_ddr_para, .-nandc_set_ddr_para
@@ -1059,14 +1063,14 @@ nandc_get_ddr_para:
 	cmp	w0, 9
 	adrp	x0, .LANCHOR13
 	ldr	x0, [x0, #:lo12:.LANCHOR13]
-	bne	.L242
+	bne	.L244
 	ldr	w0, [x0, 80]
-.L244:
+.L246:
 	ubfx	x0, x0, 8, 8
 	ret
-.L242:
+.L244:
 	ldr	w0, [x0, 304]
-	b	.L244
+	b	.L246
 	.size	nandc_get_ddr_para, .-nandc_get_ddr_para
 	.section	.text.nandc_set_if_mode,"ax",@progbits
 	.align	2
@@ -1078,7 +1082,7 @@ nandc_set_if_mode:
 	tst	w0, 6
 	ldr	x2, [x1, #:lo12:.LANCHOR13]
 	ldr	w1, [x2]
-	beq	.L246
+	beq	.L248
 	tst	x0, 4
 	orr	w1, w1, 24576
 	adrp	x0, .LANCHOR27
@@ -1090,7 +1094,7 @@ nandc_set_if_mode:
 	cmp	w0, 9
 	mov	w0, 4099
 	movk	w0, 0x10, lsl 16
-	bne	.L248
+	bne	.L250
 	mov	w3, 8321
 	str	w3, [x2, 8]
 	str	w0, [x2, 80]
@@ -1098,10 +1102,10 @@ nandc_set_if_mode:
 	str	w0, [x2, 84]
 	mov	w0, 39
 	str	w0, [x2, 84]
-.L249:
+.L251:
 	str	w1, [x2]
 	ret
-.L248:
+.L250:
 	mov	w3, 8322
 	str	w3, [x2, 344]
 	str	w0, [x2, 304]
@@ -1109,10 +1113,10 @@ nandc_set_if_mode:
 	str	w0, [x2, 308]
 	mov	w0, 39
 	str	w0, [x2, 308]
-	b	.L249
-.L246:
+	b	.L251
+.L248:
 	and	w1, w1, -8193
-	b	.L249
+	b	.L251
 	.size	nandc_set_if_mode, .-nandc_set_if_mode
 	.section	.text.nandc_cs,"ax",@progbits
 	.align	2
@@ -1143,14 +1147,14 @@ flash_wait_device_ready_raw:
 	mov	w20, w2
 	ldrb	w0, [x0, #:lo12:.LANCHOR18]
 	cmp	w0, w21
-	bhi	.L254
+	bhi	.L256
 	adrp	x1, .LANCHOR28
 	adrp	x0, .LC0
-	mov	w2, 606
+	mov	w2, 677
 	add	x1, x1, :lo12:.LANCHOR28
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L254:
+.L256:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w5, [x0, w21, sxtw]
@@ -1164,7 +1168,7 @@ flash_wait_device_ready_raw:
 	and	w19, w19, 255
 	add	x2, x4, x2
 	mov	w4, 120
-.L257:
+.L259:
 	str	w4, [x2, 2056]
 	mov	w0, 120
 	str	w19, [x2, 2052]
@@ -1174,10 +1178,10 @@ flash_wait_device_ready_raw:
 	ldr	w3, [x2, 2048]
 	and	w3, w3, 255
 	bics	wzr, w20, w3
-	bne	.L257
+	bne	.L259
 	cmp	w3, 255
-	beq	.L257
-	bl	nandc_de_cs.constprop.29
+	beq	.L259
+	bl	nandc_de_cs.constprop.28
 	ldr	x21, [sp, 32]
 	mov	w0, w3
 	ldp	x19, x20, [sp, 16]
@@ -1193,31 +1197,31 @@ flash_wait_device_ready:
 	ubfx	x6, x0, 21, 3
 	and	w1, w0, 2097151
 	tst	x0, 50331648
-	bne	.L261
+	bne	.L263
 	adrp	x0, .LANCHOR0
 	adrp	x5, .LANCHOR1
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L262
+	cbz	w0, .L264
 	ldrb	w0, [x5, #:lo12:.LANCHOR1]
-	cbz	w0, .L261
-.L262:
+	cbz	w0, .L263
+.L264:
 	adrp	x0, .LANCHOR2
 	ldrh	w3, [x0, #:lo12:.LANCHOR2]
 	ldrb	w0, [x5, #:lo12:.LANCHOR1]
 	udiv	w4, w1, w3
 	mul	w4, w4, w3
 	sub	w3, w1, w4
-	cbz	w0, .L263
+	cbz	w0, .L265
 	add	w1, w4, w3, lsl 1
-.L261:
+.L263:
 	mov	w0, w6
 	b	flash_wait_device_ready_raw
-.L263:
+.L265:
 	adrp	x5, .LANCHOR3
 	add	x5, x5, :lo12:.LANCHOR3
 	ldrh	w3, [x5, w3, uxtw 1]
 	add	w1, w3, w4
-	b	.L261
+	b	.L263
 	.size	flash_wait_device_ready, .-flash_wait_device_ready
 	.section	.text.nandc_de_cs,"ax",@progbits
 	.align	2
@@ -1232,33 +1236,289 @@ nandc_de_cs:
 	str	w0, [x1]
 	ret
 	.size	nandc_de_cs, .-nandc_de_cs
-	.section	.text.nandc_wait_flash_ready,"ax",@progbits
+	.section	.text.nandc_wait_flash_ready_no_delay,"ax",@progbits
 	.align	2
-	.global	nandc_wait_flash_ready
-	.type	nandc_wait_flash_ready, %function
-nandc_wait_flash_ready:
+	.global	nandc_wait_flash_ready_no_delay
+	.type	nandc_wait_flash_ready_no_delay, %function
+nandc_wait_flash_ready_no_delay:
 	mov	w2, 34464
 	stp	x29, x30, [sp, -32]!
 	movk	w2, 0x1, lsl 16
 	adrp	x3, .LANCHOR13
 	add	x29, sp, 0
+.L275:
+	ldr	x0, [x3, #:lo12:.LANCHOR13]
+	ldr	w0, [x0]
+	str	w0, [x29, 24]
+	ldr	w0, [x29, 24]
+	tbnz	x0, 9, .L276
+	mov	w0, 10
+	bl	timer_delay_ns
+	subs	w2, w2, #1
+	bne	.L275
+	mov	w0, -1
 .L273:
-	mov	w0, 100
+	ldp	x29, x30, [sp], 32
+	ret
+.L276:
+	mov	w0, 0
+	b	.L273
+	.size	nandc_wait_flash_ready_no_delay, .-nandc_wait_flash_ready_no_delay
+	.section	.text.zftl_flash_enter_slc_mode,"ax",@progbits
+	.align	2
+	.global	zftl_flash_enter_slc_mode
+	.type	zftl_flash_enter_slc_mode, %function
+zftl_flash_enter_slc_mode:
+	adrp	x1, .LANCHOR0
+	ldrb	w1, [x1, #:lo12:.LANCHOR0]
+	cbz	w1, .L279
+	adrp	x2, .LANCHOR13
+	and	x0, x0, 255
+	cmp	w1, 1
+	ldr	x4, [x2, #:lo12:.LANCHOR13]
+	bne	.L282
+.L302:
+	adrp	x1, .LANCHOR30+29
+	ldrb	w1, [x1, #:lo12:.LANCHOR30+29]
+	cbz	w1, .L279
+	add	x0, x0, 8
+	add	x0, x4, x0, lsl 8
+	str	w1, [x0, 8]
+	ret
+.L282:
+	cmp	w1, 2
+	bne	.L284
+	adrp	x1, .LANCHOR31
+	add	x1, x1, :lo12:.LANCHOR31
+	ldrb	w2, [x1, x0]
+	cbz	w2, .L279
+	strb	wzr, [x1, x0]
+	b	.L302
+.L284:
+	cmp	w1, 3
+	bne	.L279
+	adrp	x1, .LANCHOR31
+	sxtw	x2, w0
+	add	x1, x1, :lo12:.LANCHOR31
+	ldrb	w3, [x1, x2]
+	cbz	w3, .L279
+	ubfiz	x0, x0, 8, 8
+	stp	x29, x30, [sp, -16]!
+	add	x4, x4, x0
+	mov	w0, 239
+	add	x29, sp, 0
+	strb	wzr, [x1, x2]
+	str	w0, [x4, 2056]
+	mov	w0, 145
+	str	w0, [x4, 2052]
+	mov	w0, 50
+	bl	timer_delay_ns
+	str	wzr, [x4, 2048]
+	mov	w0, 1
+	str	w0, [x4, 2048]
+	str	wzr, [x4, 2048]
+	mov	w0, 150
+	str	wzr, [x4, 2048]
+	bl	timer_delay_ns
+	bl	nandc_wait_flash_ready_no_delay
+	mov	w0, 218
+	str	w0, [x4, 2056]
+	mov	w0, 150
+	bl	timer_delay_ns
+	ldp	x29, x30, [sp], 16
+	b	nandc_wait_flash_ready_no_delay
+.L279:
+	ret
+	.size	zftl_flash_enter_slc_mode, .-zftl_flash_enter_slc_mode
+	.section	.text.zftl_flash_exit_slc_mode,"ax",@progbits
+	.align	2
+	.global	zftl_flash_exit_slc_mode
+	.type	zftl_flash_exit_slc_mode, %function
+zftl_flash_exit_slc_mode:
+	adrp	x1, .LANCHOR0
+	ldrb	w1, [x1, #:lo12:.LANCHOR0]
+	cbz	w1, .L303
+	adrp	x2, .LANCHOR13
+	and	x0, x0, 255
+	cmp	w1, 1
+	ldr	x4, [x2, #:lo12:.LANCHOR13]
+	bne	.L306
+	adrp	x1, .LANCHOR30+30
+	ldrb	w1, [x1, #:lo12:.LANCHOR30+30]
+.L328:
+	cbz	w1, .L303
+	add	x0, x0, 8
+	add	x0, x4, x0, lsl 8
+	str	w1, [x0, 8]
+	ret
+.L306:
+	cmp	w1, 2
+	bne	.L308
+	adrp	x2, .LANCHOR31
+	add	x2, x2, :lo12:.LANCHOR31
+	ldrb	w1, [x2, x0]
+	cbnz	w1, .L303
+	adrp	x1, .LANCHOR30
+	add	x1, x1, :lo12:.LANCHOR30
+	mov	w5, 4
+	ldrb	w3, [x1, 12]
+	ldrb	w1, [x1, 30]
+	cmp	w3, 2
+	csel	w3, w3, w5, eq
+	strb	w3, [x2, x0]
+	b	.L328
+.L308:
+	cmp	w1, 3
+	bne	.L303
+	adrp	x2, .LANCHOR31
+	sxtw	x5, w0
+	add	x2, x2, :lo12:.LANCHOR31
+	ldrb	w1, [x2, x5]
+	cbnz	w1, .L303
+	adrp	x3, .LANCHOR30
+	add	x3, x3, :lo12:.LANCHOR30
+	stp	x29, x30, [sp, -16]!
+	ubfiz	x0, x0, 8, 8
+	add	x4, x4, x0
+	mov	w6, 4
+	add	x29, sp, 0
+	ldrb	w1, [x3, 12]
+	mov	w0, 239
+	str	w0, [x4, 2056]
+	mov	w0, 145
+	cmp	w1, 2
+	str	w0, [x4, 2052]
+	csel	w1, w1, w6, eq
+	mov	w0, 50
+	strb	w1, [x2, x5]
+	bl	timer_delay_ns
+	ldrb	w0, [x3, 7]
+	cmp	w0, 9
+	mov	w0, 1
+	bne	.L311
+	str	w0, [x4, 2048]
+.L312:
+	str	w0, [x4, 2048]
+	mov	w0, 150
+	str	wzr, [x4, 2048]
+	str	wzr, [x4, 2048]
+	bl	timer_delay_ns
+	bl	nandc_wait_flash_ready_no_delay
+	mov	w0, 223
+	str	w0, [x4, 2056]
+	mov	w0, 150
+	bl	timer_delay_ns
+	ldp	x29, x30, [sp], 16
+	b	nandc_wait_flash_ready_no_delay
+.L311:
+	ldrb	w1, [x2, x5]
+	str	w1, [x4, 2048]
+	b	.L312
+.L303:
+	ret
+	.size	zftl_flash_exit_slc_mode, .-zftl_flash_exit_slc_mode
+	.section	.text.flash_start_page_read,"ax",@progbits
+	.align	2
+	.global	flash_start_page_read
+	.type	flash_start_page_read, %function
+flash_start_page_read:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w20, w0, 255
+	adrp	x0, .LANCHOR18
+	stp	x21, x22, [sp, 32]
+	ubfx	x22, x1, 21, 3
+	and	w19, w1, 2097151
+	ldrb	w0, [x0, #:lo12:.LANCHOR18]
+	ubfx	x21, x1, 24, 2
+	cmp	w0, w22
+	bhi	.L330
+	adrp	x1, .LANCHOR32
+	adrp	x0, .LC0
+	mov	w2, 845
+	add	x1, x1, :lo12:.LANCHOR32
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L330:
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
+	ldrb	w8, [x0, w22, sxtw]
+	adrp	x0, .LANCHOR13
+	ldr	x7, [x0, #:lo12:.LANCHOR13]
+	mov	w0, w8
+	bl	nandc_cs
+	cbnz	w21, .L331
+	mov	w0, w19
+	bl	slc_phy_page_address_calc
+	mov	w19, w0
+	adrp	x0, .LANCHOR0
+	ldrb	w0, [x0, #:lo12:.LANCHOR0]
+	cbz	w0, .L332
+	mov	w0, w8
+	bl	zftl_flash_enter_slc_mode
+.L332:
+	ubfiz	x1, x8, 8, 8
+	and	w0, w19, 255
+	add	x1, x7, x1
+	ldp	x21, x22, [sp, 32]
+	str	wzr, [x1, 2056]
+	str	wzr, [x1, 2052]
+	str	wzr, [x1, 2052]
+	str	w0, [x1, 2052]
+	lsr	w0, w19, 8
+	str	w0, [x1, 2052]
+	lsr	w19, w19, 16
+	str	w19, [x1, 2052]
+	str	w20, [x1, 2056]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	b	nandc_de_cs.constprop.28
+.L331:
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
+	ldrb	w0, [x0, 12]
+	cmp	w0, 3
+	bne	.L333
+	sxtw	x0, w8
+	add	x0, x0, 8
+	add	x0, x7, x0, lsl 8
+	str	w21, [x0, 8]
+	b	.L332
+.L333:
+	mov	w0, w8
+	bl	zftl_flash_exit_slc_mode
+	b	.L332
+	.size	flash_start_page_read, .-flash_start_page_read
+	.section	.text.nandc_wait_flash_ready,"ax",@progbits
+	.align	2
+	.global	nandc_wait_flash_ready
+	.type	nandc_wait_flash_ready, %function
+nandc_wait_flash_ready:
+	stp	x29, x30, [sp, -32]!
+	mov	w0, 150
+	add	x29, sp, 0
 	bl	timer_delay_ns
+	mov	w2, 34464
+	adrp	x3, .LANCHOR13
+	movk	w2, 0x1, lsl 16
+.L340:
 	ldr	x0, [x3, #:lo12:.LANCHOR13]
 	ldr	w0, [x0]
 	str	w0, [x29, 24]
 	ldr	w0, [x29, 24]
-	tbnz	x0, 9, .L274
+	tbnz	x0, 9, .L341
+	mov	w0, 10
+	bl	timer_delay_ns
 	subs	w2, w2, #1
-	bne	.L273
+	bne	.L340
 	mov	w0, -1
-.L271:
+.L338:
 	ldp	x29, x30, [sp], 32
 	ret
-.L274:
+.L341:
 	mov	w0, 0
-	b	.L271
+	b	.L338
 	.size	nandc_wait_flash_ready, .-nandc_wait_flash_ready
 	.section	.text.sandisk_set_rr_para,"ax",@progbits
 	.align	2
@@ -1289,22 +1549,22 @@ sandisk_set_rr_para:
 	add	x2, x2, x1
 	add	x1, x0, x1
 	mov	x0, 0
-.L278:
+.L345:
 	cmp	w4, w0
-	bhi	.L281
+	bhi	.L348
 	ldp	x29, x30, [sp], 16
 	b	nandc_wait_flash_ready
-.L281:
+.L348:
 	cmp	w5, 67
-	bne	.L279
+	bne	.L346
 	ldrsb	w6, [x1, x0]
-.L283:
+.L350:
 	add	x0, x0, 1
 	str	w6, [x3]
-	b	.L278
-.L279:
+	b	.L345
+.L346:
 	ldrsb	w6, [x2, x0]
-	b	.L283
+	b	.L350
 	.size	sandisk_set_rr_para, .-sandisk_set_rr_para
 	.section	.text.toshiba_3d_set_tlc_rr_para,"ax",@progbits
 	.align	2
@@ -1323,8 +1583,8 @@ toshiba_3d_set_tlc_rr_para:
 	madd	x1, x2, x1, x1
 	mov	w0, -119
 	str	w0, [x4, 4]
-	adrp	x0, .LANCHOR30
-	add	x0, x0, :lo12:.LANCHOR30
+	adrp	x0, .LANCHOR33
+	add	x0, x0, :lo12:.LANCHOR33
 	add	x5, x0, x1
 	ldrsb	w0, [x0, x1]
 	str	w0, [x4]
@@ -1359,8 +1619,8 @@ toshiba_3d_set_slc_rr_para:
 	str	wzr, [x0, 4]
 	mov	w2, -117
 	str	w2, [x0, 4]
-	adrp	x2, .LANCHOR31
-	add	x2, x2, :lo12:.LANCHOR31
+	adrp	x2, .LANCHOR34
+	add	x2, x2, :lo12:.LANCHOR34
 	add	x1, x2, x1, uxtb
 	ldrsb	w1, [x1, 1]
 	str	w1, [x0]
@@ -1376,7 +1636,7 @@ toshiba_3d_set_slc_rr_para:
 toshiba_tlc_set_rr_para:
 	mov	w6, 239
 	uxtw	x1, w1
-	cbz	w2, .L288
+	cbz	w2, .L355
 	stp	x29, x30, [sp, -16]!
 	mov	x4, x0
 	mov	x2, 7
@@ -1385,8 +1645,8 @@ toshiba_tlc_set_rr_para:
 	str	w6, [x4, 8]
 	mul	x1, x1, x2
 	str	w0, [x4, 4]
-	adrp	x0, .LANCHOR32
-	add	x0, x0, :lo12:.LANCHOR32
+	adrp	x0, .LANCHOR35
+	add	x0, x0, :lo12:.LANCHOR35
 	add	x5, x0, x1
 	ldrb	w0, [x0, x1]
 	str	w0, [x4]
@@ -1408,215 +1668,22 @@ toshiba_tlc_set_rr_para:
 	str	w0, [x4]
 	str	wzr, [x4]
 	ldp	x29, x30, [sp], 16
-.L291:
+.L358:
 	b	nandc_wait_flash_ready
-.L288:
+.L355:
 	str	w6, [x0, 8]
 	mov	w2, 20
 	str	w2, [x0, 4]
-	adrp	x2, .LANCHOR33
-	add	x2, x2, :lo12:.LANCHOR33
+	adrp	x2, .LANCHOR36
+	add	x2, x2, :lo12:.LANCHOR36
 	ldrb	w1, [x2, x1]
 	str	w1, [x0]
 	str	wzr, [x0]
 	str	wzr, [x0]
 	str	wzr, [x0]
-	b	.L291
+	b	.L358
 	.size	toshiba_tlc_set_rr_para, .-toshiba_tlc_set_rr_para
-	.section	.text.zftl_flash_enter_slc_mode,"ax",@progbits
-	.align	2
-	.global	zftl_flash_enter_slc_mode
-	.type	zftl_flash_enter_slc_mode, %function
-zftl_flash_enter_slc_mode:
-	adrp	x1, .LANCHOR0
-	and	x0, x0, 255
-	ldrb	w2, [x1, #:lo12:.LANCHOR0]
-	cbz	w2, .L294
-	adrp	x1, .LANCHOR13
-	cmp	w2, 1
-	ldr	x1, [x1, #:lo12:.LANCHOR13]
-	bne	.L297
-.L314:
-	adrp	x2, .LANCHOR34+29
-	ldrb	w2, [x2, #:lo12:.LANCHOR34+29]
-	cbz	w2, .L294
-	add	x0, x0, 8
-	add	x0, x1, x0, lsl 8
-	str	w2, [x0, 8]
-	ret
-.L297:
-	cmp	w2, 2
-	bne	.L299
-	adrp	x2, .LANCHOR35
-	add	x2, x2, :lo12:.LANCHOR35
-	ldrb	w3, [x2, x0]
-	cbz	w3, .L294
-	strb	wzr, [x2, x0]
-	b	.L314
-.L299:
-	cmp	w2, 3
-	bne	.L294
-	adrp	x2, .LANCHOR35
-	sxtw	x3, w0
-	add	x2, x2, :lo12:.LANCHOR35
-	ldrb	w4, [x2, x3]
-	cbz	w4, .L294
-	ubfiz	x0, x0, 8, 8
-	strb	wzr, [x2, x3]
-	add	x0, x1, x0
-	mov	w1, 239
-	str	w1, [x0, 2056]
-	mov	w1, 145
-	str	w1, [x0, 2052]
-	mov	w1, 1
-	str	wzr, [x0, 2048]
-	str	w1, [x0, 2048]
-	str	wzr, [x0, 2048]
-	str	wzr, [x0, 2048]
-	b	nandc_wait_flash_ready
-.L294:
-	ret
-	.size	zftl_flash_enter_slc_mode, .-zftl_flash_enter_slc_mode
-	.section	.text.zftl_flash_exit_slc_mode,"ax",@progbits
-	.align	2
-	.global	zftl_flash_exit_slc_mode
-	.type	zftl_flash_exit_slc_mode, %function
-zftl_flash_exit_slc_mode:
-	adrp	x1, .LANCHOR0
-	and	x0, x0, 255
-	ldrb	w2, [x1, #:lo12:.LANCHOR0]
-	cbz	w2, .L315
-	adrp	x1, .LANCHOR13
-	cmp	w2, 1
-	ldr	x1, [x1, #:lo12:.LANCHOR13]
-	bne	.L318
-	adrp	x2, .LANCHOR34+30
-	ldrb	w2, [x2, #:lo12:.LANCHOR34+30]
-.L335:
-	cbz	w2, .L315
-	add	x0, x0, 8
-	add	x0, x1, x0, lsl 8
-	str	w2, [x0, 8]
-	ret
-.L318:
-	cmp	w2, 2
-	bne	.L320
-	adrp	x3, .LANCHOR35
-	add	x3, x3, :lo12:.LANCHOR35
-	ldrb	w2, [x3, x0]
-	cbnz	w2, .L315
-	adrp	x2, .LANCHOR34
-	add	x2, x2, :lo12:.LANCHOR34
-	mov	w5, 4
-	ldrb	w4, [x2, 12]
-	ldrb	w2, [x2, 30]
-	cmp	w4, 2
-	csel	w4, w4, w5, eq
-	strb	w4, [x3, x0]
-	b	.L335
-.L320:
-	cmp	w2, 3
-	bne	.L315
-	adrp	x3, .LANCHOR35
-	sxtw	x4, w0
-	add	x3, x3, :lo12:.LANCHOR35
-	ldrb	w2, [x3, x4]
-	cbnz	w2, .L315
-	ubfiz	x0, x0, 8, 8
-	adrp	x2, .LANCHOR34+12
-	add	x0, x1, x0
-	mov	w1, 239
-	ldrb	w2, [x2, #:lo12:.LANCHOR34+12]
-	mov	w5, 4
-	str	w1, [x0, 2056]
-	cmp	w2, 2
-	mov	w1, 145
-	str	w1, [x0, 2052]
-	csel	w2, w2, w5, eq
-	str	w2, [x0, 2048]
-	mov	w1, 1
-	str	w1, [x0, 2048]
-	str	wzr, [x0, 2048]
-	str	wzr, [x0, 2048]
-	strb	w2, [x3, x4]
-	b	nandc_wait_flash_ready
-.L315:
-	ret
-	.size	zftl_flash_exit_slc_mode, .-zftl_flash_exit_slc_mode
-	.section	.text.flash_start_page_read,"ax",@progbits
-	.align	2
-	.global	flash_start_page_read
-	.type	flash_start_page_read, %function
-flash_start_page_read:
-	stp	x29, x30, [sp, -48]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	and	w20, w0, 255
-	adrp	x0, .LANCHOR18
-	stp	x21, x22, [sp, 32]
-	ubfx	x22, x1, 21, 3
-	and	w19, w1, 2097151
-	ldrb	w0, [x0, #:lo12:.LANCHOR18]
-	ubfx	x21, x1, 24, 2
-	cmp	w0, w22
-	bhi	.L337
-	adrp	x1, .LANCHOR36
-	adrp	x0, .LC0
-	mov	w2, 748
-	add	x1, x1, :lo12:.LANCHOR36
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L337:
-	adrp	x0, .LANCHOR29
-	add	x0, x0, :lo12:.LANCHOR29
-	ldrb	w7, [x0, w22, sxtw]
-	adrp	x0, .LANCHOR13
-	ldr	x6, [x0, #:lo12:.LANCHOR13]
-	mov	w0, w7
-	bl	nandc_cs
-	cbnz	w21, .L338
-	mov	w0, w19
-	bl	slc_phy_page_address_calc
-	mov	w19, w0
-	adrp	x0, .LANCHOR0
-	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L339
-	mov	w0, w7
-	bl	zftl_flash_enter_slc_mode
-.L339:
-	ubfiz	x1, x7, 8, 8
-	and	w0, w19, 255
-	add	x1, x6, x1
-	ldp	x21, x22, [sp, 32]
-	str	wzr, [x1, 2056]
-	str	wzr, [x1, 2052]
-	str	wzr, [x1, 2052]
-	str	w0, [x1, 2052]
-	lsr	w0, w19, 8
-	str	w0, [x1, 2052]
-	lsr	w19, w19, 16
-	str	w19, [x1, 2052]
-	str	w20, [x1, 2056]
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
-	b	nandc_de_cs.constprop.29
-.L338:
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
-	ldrb	w0, [x0, 12]
-	cmp	w0, 3
-	bne	.L340
-	sxtw	x0, w7
-	add	x0, x0, 8
-	add	x0, x6, x0, lsl 8
-	str	w21, [x0, 8]
-	b	.L339
-.L340:
-	mov	w0, w7
-	bl	zftl_flash_exit_slc_mode
-	b	.L339
-	.size	flash_start_page_read, .-flash_start_page_read
-	.section	.text.flash_erase_duplane_block,"ax",@progbits
+	.section	.text.flash_erase_duplane_block,"ax",@progbits
 	.align	2
 	.global	flash_erase_duplane_block
 	.type	flash_erase_duplane_block, %function
@@ -1634,14 +1701,14 @@ flash_erase_duplane_block:
 	stp	x23, x24, [sp, 48]
 	and	w25, w1, 255
 	cmp	w0, w19
-	bhi	.L346
+	bhi	.L362
 	adrp	x1, .LANCHOR37
 	adrp	x0, .LC0
-	mov	w2, 517
+	mov	w2, 588
 	add	x1, x1, :lo12:.LANCHOR37
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L346:
+.L362:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w22, [x0, w19, sxtw]
@@ -1652,21 +1719,21 @@ flash_erase_duplane_block:
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	add	x23, x19, 8
 	add	x23, x24, x23, lsl 8
-	tbz	x0, 4, .L347
+	tbz	x0, 4, .L363
 	adrp	x0, .LC31
 	mov	w3, w20
 	mov	w2, w21
 	mov	w1, w22
 	add	x0, x0, :lo12:.LC31
 	bl	printf
-.L347:
+.L363:
 	bl	nandc_wait_flash_ready
 	mov	w0, w22
 	bl	nandc_cs
 	mov	w0, w22
-	cbnz	w25, .L348
+	cbnz	w25, .L364
 	bl	zftl_flash_enter_slc_mode
-.L349:
+.L365:
 	add	x24, x24, x19, lsl 8
 	mov	w0, 96
 	str	w0, [x24, 2056]
@@ -1678,7 +1745,7 @@ flash_erase_duplane_block:
 	str	w0, [x24, 2052]
 	adrp	x0, .LANCHOR38
 	ldrb	w0, [x0, #:lo12:.LANCHOR38]
-	cbnz	w0, .L352
+	cbnz	w0, .L368
 	mov	w0, 208
 	str	w0, [x24, 2056]
 	mov	w19, 5
@@ -1686,7 +1753,7 @@ flash_erase_duplane_block:
 	mov	x0, x23
 	bl	flash_read_status
 	and	w5, w0, w19
-.L350:
+.L366:
 	mov	w0, 96
 	str	w0, [x24, 2056]
 	and	w0, w20, 255
@@ -1702,15 +1769,15 @@ flash_erase_duplane_block:
 	mov	x0, x23
 	bl	flash_read_status
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.29
+	bl	nandc_de_cs.constprop.28
 	and	w19, w2, w19
 	orr	w19, w19, w5
-	cbz	w19, .L351
+	cbz	w19, .L367
 	adrp	x0, .LC32
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC32
 	bl	printf
-.L351:
+.L367:
 	mov	w0, w19
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -1718,12 +1785,12 @@ flash_erase_duplane_block:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L348:
+.L364:
 	bl	zftl_flash_exit_slc_mode
-	b	.L349
-.L352:
+	b	.L365
+.L368:
 	mov	w5, 0
-	b	.L350
+	b	.L366
 	.size	flash_erase_duplane_block, .-flash_erase_duplane_block
 	.section	.text.flash_erase_block_en,"ax",@progbits
 	.align	2
@@ -1743,14 +1810,14 @@ flash_erase_block_en:
 	stp	x19, x20, [sp, 16]
 	and	w22, w2, 2097151
 	cmp	w0, w23
-	bhi	.L361
+	bhi	.L377
 	adrp	x1, .LANCHOR39
 	adrp	x0, .LC0
-	mov	w2, 562
+	mov	w2, 633
 	add	x1, x1, :lo12:.LANCHOR39
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L361:
+.L377:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w20, [x0, w23, sxtw]
@@ -1761,21 +1828,21 @@ flash_erase_block_en:
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	add	x24, x19, 8
 	add	x24, x25, x24, lsl 8
-	tbz	x0, 4, .L362
+	tbz	x0, 4, .L378
 	adrp	x0, .LC33
 	mov	w3, w26
 	mov	w2, w21
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC33
 	bl	printf
-.L362:
+.L378:
 	bl	nandc_wait_flash_ready
 	mov	w0, w20
 	bl	nandc_cs
 	mov	w0, w20
-	cbnz	w26, .L363
+	cbnz	w26, .L379
 	bl	zftl_flash_enter_slc_mode
-.L364:
+.L380:
 	add	x0, x25, x19, lsl 8
 	mov	w1, 96
 	str	w1, [x0, 2056]
@@ -1791,10 +1858,10 @@ flash_erase_block_en:
 	mov	x0, x24
 	bl	flash_read_status
 	mov	w19, w0
-	bl	nandc_de_cs.constprop.29
+	bl	nandc_de_cs.constprop.28
 	mov	w0, 5
 	ands	w19, w19, w0
-	beq	.L365
+	beq	.L381
 	adrp	x0, .LANCHOR2
 	mov	w3, w19
 	mov	w1, w23
@@ -1803,7 +1870,7 @@ flash_erase_block_en:
 	add	x0, x0, :lo12:.LC34
 	udiv	w2, w21, w2
 	bl	printf
-.L365:
+.L381:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -1811,9 +1878,9 @@ flash_erase_block_en:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L363:
+.L379:
 	bl	zftl_flash_exit_slc_mode
-	b	.L364
+	b	.L380
 	.size	flash_erase_block_en, .-flash_erase_block_en
 	.section	.text.flash_erase_block,"ax",@progbits
 	.align	2
@@ -1830,8 +1897,8 @@ flash_erase_block:
 	.type	flash_erase_all, %function
 flash_erase_all:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR34
-	add	x0, x0, :lo12:.LANCHOR34
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w19, 0
@@ -1847,10 +1914,10 @@ flash_erase_all:
 	ldrb	w1, [x0, 13]
 	mul	w20, w20, w1
 	and	w20, w20, 65535
-.L375:
+.L391:
 	ldrb	w0, [x22]
 	cmp	w0, w19
-	bhi	.L378
+	bhi	.L394
 	ldp	x19, x20, [sp, 16]
 	mov	w1, 0
 	ldp	x21, x22, [sp, 32]
@@ -1860,23 +1927,23 @@ flash_erase_all:
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	b	printf
-.L378:
+.L394:
 	add	x0, x24, :lo12:.LANCHOR29
 	mov	w21, 0
 	ldrb	w25, [x0, w19, sxtw]
-.L376:
+.L392:
 	cmp	w20, w21, uxth
-	bhi	.L377
+	bhi	.L393
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L375
-.L377:
+	b	.L391
+.L393:
 	ldrh	w1, [x23]
 	mov	w0, w25
 	mul	w1, w1, w21
 	add	w21, w21, 1
 	bl	flash_erase_block
-	b	.L376
+	b	.L392
 	.size	flash_erase_all, .-flash_erase_all
 	.section	.text.flash_start_plane_read,"ax",@progbits
 	.align	2
@@ -1894,23 +1961,23 @@ flash_start_plane_read:
 	and	w20, w1, 2097151
 	ldrb	w0, [x0, #:lo12:.LANCHOR18]
 	cmp	w0, w22
-	bhi	.L381
+	bhi	.L397
 	adrp	x1, .LANCHOR40
 	adrp	x0, .LC0
-	mov	w2, 843
+	mov	w2, 940
 	add	x1, x1, :lo12:.LANCHOR40
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L381:
+.L397:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
-	ldrb	w6, [x0, w22, sxtw]
+	ldrb	w7, [x0, w22, sxtw]
 	adrp	x0, .LANCHOR13
-	ldr	x8, [x0, #:lo12:.LANCHOR13]
-	mov	w0, w6
+	ldr	x10, [x0, #:lo12:.LANCHOR13]
+	mov	w0, w7
 	bl	nandc_cs
-	adrp	x7, .LANCHOR16
-	cbnz	w19, .L382
+	adrp	x8, .LANCHOR16
+	cbnz	w19, .L398
 	mov	w0, w21
 	bl	slc_phy_page_address_calc
 	mov	w21, w0
@@ -1919,25 +1986,25 @@ flash_start_plane_read:
 	mov	w20, w0
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L383
-	mov	w0, w6
+	cbz	w0, .L399
+	mov	w0, w7
 	bl	zftl_flash_enter_slc_mode
-.L383:
-	and	x4, x6, 255
+.L399:
 	adrp	x0, .LANCHOR19
+	and	x4, x7, 255
 	add	x1, x0, :lo12:.LANCHOR19
-	add	x4, x8, x4, lsl 8
+	add	x4, x10, x4, lsl 8
 	and	w3, w21, 255
 	and	w6, w20, 255
 	lsr	w5, w20, 8
 	lsr	w20, w20, 16
-	ldrb	w10, [x1, 8]
+	ldrb	w11, [x1, 8]
 	ldrb	w2, [x1, 16]
-	str	w10, [x4, 2056]
+	str	w11, [x4, 2056]
 	cmp	w2, 1
 	lsr	w2, w21, 8
 	lsr	w21, w21, 16
-	bne	.L385
+	bne	.L401
 	str	wzr, [x4, 2052]
 	str	wzr, [x4, 2052]
 	str	w3, [x4, 2052]
@@ -1946,17 +2013,17 @@ flash_start_plane_read:
 	str	w21, [x4, 2052]
 	str	w0, [x4, 2056]
 	bl	nandc_wait_flash_ready
-	ldr	x0, [x7, #:lo12:.LANCHOR16]
+	ldr	x0, [x8, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L386
-	cbz	w19, .L386
+	bne	.L402
+	cbz	w19, .L402
 	str	w19, [x4, 2056]
-.L386:
+.L402:
 	str	wzr, [x4, 2056]
 	str	wzr, [x4, 2052]
 	str	wzr, [x4, 2052]
-.L399:
+.L415:
 	ldp	x21, x22, [sp, 32]
 	str	w6, [x4, 2052]
 	str	w5, [x4, 2052]
@@ -1965,36 +2032,36 @@ flash_start_plane_read:
 	str	w0, [x4, 2056]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
-	b	nandc_de_cs.constprop.29
-.L382:
-	ldr	x0, [x7, #:lo12:.LANCHOR16]
+	b	nandc_de_cs.constprop.28
+.L398:
+	ldr	x0, [x8, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L384
-	sxtw	x0, w6
+	bne	.L400
+	sxtw	x0, w7
 	add	x0, x0, 8
-	add	x0, x8, x0, lsl 8
+	add	x0, x10, x0, lsl 8
 	str	w19, [x0, 8]
-	b	.L383
-.L384:
-	mov	w0, w6
+	b	.L399
+.L400:
+	mov	w0, w7
 	bl	zftl_flash_exit_slc_mode
-	b	.L383
-.L385:
+	b	.L399
+.L401:
 	str	w3, [x4, 2052]
-	ldr	x1, [x7, #:lo12:.LANCHOR16]
+	ldr	x1, [x8, #:lo12:.LANCHOR16]
 	str	w2, [x4, 2052]
 	str	w21, [x4, 2052]
 	ldrb	w1, [x1, 12]
 	cmp	w1, 3
-	bne	.L388
-	cbz	w19, .L388
+	bne	.L404
+	cbz	w19, .L404
 	str	w19, [x4, 2056]
-.L388:
+.L404:
 	add	x0, x0, :lo12:.LANCHOR19
 	ldrb	w0, [x0, 9]
 	str	w0, [x4, 2056]
-	b	.L399
+	b	.L415
 	.size	flash_start_plane_read, .-flash_start_plane_read
 	.section	.text.flash_set_interface_mode,"ax",@progbits
 	.align	2
@@ -2004,61 +2071,70 @@ flash_set_interface_mode:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR42
+	adrp	x22, .LANCHOR41
+	stp	x19, x20, [sp, 16]
+	adrp	x21, .LANCHOR14
 	stp	x23, x24, [sp, 48]
-	add	x22, x22, :lo12:.LANCHOR42
-	adrp	x24, .LANCHOR41
-	adrp	x23, .LANCHOR14
+	adrp	x20, .LANCHOR42
+	mov	w23, w0
+	add	x22, x22, :lo12:.LANCHOR41
+	add	x20, x20, :lo12:.LANCHOR42
+	add	x21, x21, :lo12:.LANCHOR14
 	str	x25, [sp, 64]
-	add	x24, x24, :lo12:.LANCHOR41
-	add	x23, x23, :lo12:.LANCHOR14
-	mov	w25, w0
-	stp	x19, x20, [sp, 16]
-	mov	x21, 0
-.L410:
-	lsl	x0, x21, 3
-	ldrb	w19, [x0, x24]
-	mov	w0, 69
-	cmp	w19, 152
-	ccmp	w19, w0, 4, ne
-	beq	.L401
-	cmp	w19, 44
-	mov	w0, 137
-	ccmp	w19, w0, 4, ne
-	bne	.L402
-.L401:
+	mov	x25, 0
+.L429:
 	adrp	x0, .LANCHOR13
-	ldrb	w1, [x22]
-	cmp	w25, 1
-	ldr	x20, [x0, #:lo12:.LANCHOR13]
-	bne	.L403
-	tbz	x1, 0, .L402
-	ldr	w0, [x23]
-	tbz	x0, 12, .L404
+	ldr	x19, [x0, #:lo12:.LANCHOR13]
+	lsl	x0, x25, 3
+	ldrb	w24, [x0, x22]
+	cmp	w24, 69
+	beq	.L417
+	add	w0, w24, 119
+	cmp	w24, 44
+	and	w1, w0, 255
+	cset	w2, eq
+	cmp	w1, 18
+	bhi	.L430
+	mov	x0, 32769
+	movk	x0, 0x4, lsl 16
+	lsr	x0, x0, x1
+	mvn	x0, x0
+.L418:
+	and	w0, w0, 1
+	eor	w0, w0, 1
+	orr	w0, w2, w0
+	cbz	w0, .L419
+.L417:
+	ldrb	w1, [x20]
+	cmp	w23, 1
+	bne	.L420
+	tbz	x1, 0, .L419
+	ldr	w0, [x21]
+	tbz	x0, 12, .L421
 	adrp	x0, .LC36
 	add	x0, x0, :lo12:.LC36
 	bl	printf
-.L404:
-	add	x0, x20, x21, lsl 8
+.L421:
+	add	x0, x19, x25, lsl 8
 	mov	w1, 239
-	cmp	w19, 44
+	cmp	w24, 44
 	str	w1, [x0, 2056]
 	mov	w1, 137
-	ccmp	w19, w1, 4, ne
+	ccmp	w24, w1, 4, ne
 	mov	w1, 1
-	bne	.L405
+	bne	.L422
 	str	w1, [x0, 2052]
 	mov	w1, 5
-.L428:
+.L452:
 	str	w1, [x0, 2048]
-.L409:
+.L427:
 	str	wzr, [x0, 2048]
 	str	wzr, [x0, 2048]
 	str	wzr, [x0, 2048]
-.L402:
-	add	x21, x21, 1
-	cmp	x21, 4
-	bne	.L410
+.L419:
+	add	x25, x25, 1
+	cmp	x25, 4
+	bne	.L429
 	bl	nandc_wait_flash_ready
 	ldr	x25, [sp, 64]
 	mov	w0, 0
@@ -2067,34 +2143,50 @@ flash_set_interface_mode:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L405:
+.L430:
+	mov	x0, 1
+	b	.L418
+.L422:
+	cmp	w24, 155
+	bne	.L424
+	str	w1, [x0, 2052]
+	mov	w1, 3
+	b	.L452
+.L424:
 	mov	w2, 128
 	str	w2, [x0, 2052]
-	b	.L428
-.L403:
-	tbz	x1, 2, .L402
-	ldr	w0, [x23]
-	tbz	x0, 12, .L407
+	b	.L452
+.L420:
+	tbz	x1, 2, .L419
+	ldr	w0, [x21]
+	tbz	x0, 12, .L425
 	adrp	x0, .LC37
 	add	x0, x0, :lo12:.LC37
 	bl	printf
-.L407:
-	add	x0, x20, x21, lsl 8
+.L425:
+	add	x0, x19, x25, lsl 8
 	mov	w1, 239
-	cmp	w19, 44
+	cmp	w24, 44
 	str	w1, [x0, 2056]
 	mov	w1, 137
-	ccmp	w19, w1, 4, ne
-	bne	.L408
+	ccmp	w24, w1, 4, ne
+	bne	.L426
 	mov	w1, 1
 	str	w1, [x0, 2052]
 	mov	w1, 35
-	b	.L428
-.L408:
+	b	.L452
+.L426:
+	cmp	w24, 155
+	bne	.L428
+	mov	w1, 1
+	str	w1, [x0, 2052]
+	mov	w1, 37
+	b	.L452
+.L428:
 	mov	w1, 128
 	str	w1, [x0, 2052]
 	str	wzr, [x0, 2048]
-	b	.L409
+	b	.L427
 	.size	flash_set_interface_mode, .-flash_set_interface_mode
 	.section	.text.flash_reset,"ax",@progbits
 	.align	2
@@ -2148,12 +2240,12 @@ flash_read_id:
 	strb	w0, [x8, 6]
 	ldr	w0, [x2, 2048]
 	strb	w0, [x8, 7]
-	bl	nandc_de_cs.constprop.29
+	bl	nandc_de_cs.constprop.28
 	ldrb	w2, [x8]
 	sub	w0, w2, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bhi	.L430
+	bhi	.L454
 	ldrb	w7, [x8, 5]
 	add	w1, w10, 1
 	ldrb	w6, [x8, 4]
@@ -2164,7 +2256,7 @@ flash_read_id:
 	ldrb	w3, [x8, 1]
 	ldp	x29, x30, [sp], 16
 	b	printf
-.L430:
+.L454:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	flash_read_id, .-flash_read_id
@@ -2175,10 +2267,10 @@ flash_read_id:
 flash_read_spare:
 	stp	x29, x30, [sp, -16]!
 	mov	x5, x2
-	adrp	x2, .LANCHOR34+9
+	adrp	x2, .LANCHOR30+9
 	ubfiz	x0, x0, 8, 8
 	add	x29, sp, 0
-	ldrb	w3, [x2, #:lo12:.LANCHOR34+9]
+	ldrb	w3, [x2, #:lo12:.LANCHOR30+9]
 	adrp	x2, .LANCHOR13
 	ldr	x4, [x2, #:lo12:.LANCHOR13]
 	lsl	w3, w3, 9
@@ -2201,6 +2293,81 @@ flash_read_spare:
 	strb	w0, [x5]
 	ret
 	.size	flash_read_spare, .-flash_read_spare
+	.section	.text.flash_read_otp_data,"ax",@progbits
+	.align	2
+	.global	flash_read_otp_data
+	.type	flash_read_otp_data, %function
+flash_read_otp_data:
+	stp	x29, x30, [sp, -48]!
+	and	w4, w0, 255
+	adrp	x0, .LANCHOR13
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w20, w1
+	ldr	x19, [x0, #:lo12:.LANCHOR13]
+	mov	w0, w4
+	str	x21, [sp, 32]
+	mov	x21, x2
+	bl	nandc_cs
+	ubfiz	x4, x4, 8, 8
+	add	x19, x19, x4
+	mov	w0, 239
+	mov	w4, 144
+	str	w0, [x19, 2056]
+	mov	w0, 50
+	str	w4, [x19, 2052]
+	bl	timer_delay_ns
+	mov	w0, 1
+	str	w0, [x19, 2048]
+	str	wzr, [x19, 2048]
+	str	wzr, [x19, 2048]
+	str	wzr, [x19, 2048]
+	bl	nandc_wait_flash_ready
+	mov	w0, 238
+	str	w0, [x19, 2056]
+	str	w4, [x19, 2052]
+	mov	w1, w20
+	adrp	x0, .LC39
+	add	x0, x0, :lo12:.LC39
+	ldr	w2, [x19, 2048]
+	ldr	w3, [x19, 2048]
+	ldr	w4, [x19, 2048]
+	bl	printf
+	bl	nandc_wait_flash_ready
+	str	wzr, [x19, 2056]
+	str	wzr, [x19, 2052]
+	and	w0, w20, 255
+	str	wzr, [x19, 2052]
+	str	w0, [x19, 2052]
+	lsr	w0, w20, 8
+	str	w0, [x19, 2052]
+	lsr	w20, w20, 16
+	str	w20, [x19, 2052]
+	mov	w0, 48
+	str	w0, [x19, 2056]
+	bl	nandc_wait_flash_ready
+	mov	x0, 0
+.L460:
+	ldr	w1, [x19, 2048]
+	strb	w1, [x21, x0]
+	add	x0, x0, 1
+	cmp	x0, 16384
+	bne	.L460
+	mov	w0, 239
+	str	w0, [x19, 2056]
+	mov	w0, 144
+	str	w0, [x19, 2052]
+	mov	w0, 50
+	bl	timer_delay_ns
+	ldr	x21, [sp, 32]
+	str	wzr, [x19, 2048]
+	str	wzr, [x19, 2048]
+	str	wzr, [x19, 2048]
+	str	wzr, [x19, 2048]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	b	nandc_de_cs.constprop.28
+	.size	flash_read_otp_data, .-flash_read_otp_data
 	.section	.text.sandisk_prog_test_bad_block,"ax",@progbits
 	.align	2
 	.global	sandisk_prog_test_bad_block
@@ -2212,14 +2379,14 @@ sandisk_prog_test_bad_block:
 	and	x2, x0, 255
 	add	x29, sp, 0
 	ldr	x4, [x1, #:lo12:.LANCHOR13]
-	adrp	x1, .LANCHOR34+29
+	adrp	x1, .LANCHOR30+29
 	str	x19, [sp, 16]
 	mov	x0, x2
-	ldrb	w1, [x1, #:lo12:.LANCHOR34+29]
+	ldrb	w1, [x1, #:lo12:.LANCHOR30+29]
 	add	x2, x2, 8
 	add	x2, x4, x2, lsl 8
-	cbz	w1, .L436
-.L446:
+	cbz	w1, .L464
+.L474:
 	ubfiz	x0, x0, 8, 8
 	str	w1, [x2, 8]
 	add	x4, x4, x0
@@ -2243,22 +2410,22 @@ sandisk_prog_test_bad_block:
 	ldr	w2, [x4, 2048]
 	mov	w0, 5
 	ands	w19, w2, w0
-	beq	.L435
+	beq	.L463
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L435
-	adrp	x0, .LC39
+	tbz	x0, 12, .L463
+	adrp	x0, .LC40
 	mov	w1, w5
-	add	x0, x0, :lo12:.LC39
+	add	x0, x0, :lo12:.LC40
 	bl	printf
-.L435:
+.L463:
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L436:
+.L464:
 	mov	w1, 162
-	b	.L446
+	b	.L474
 	.size	sandisk_prog_test_bad_block, .-sandisk_prog_test_bad_block
 	.section	.text.nandc_rdy_status,"ax",@progbits
 	.align	2
@@ -2288,48 +2455,48 @@ nandc_bch_sel:
 	cmp	w2, 9
 	adrp	x2, .LANCHOR13
 	ldr	x2, [x2, #:lo12:.LANCHOR13]
-	bne	.L450
+	bne	.L478
 	str	w1, [x2, 16]
 	cmp	w0, 70
-	beq	.L457
+	beq	.L485
 	cmp	w0, 60
-	beq	.L458
+	beq	.L486
 	cmp	w0, 40
 	cset	w1, eq
 	add	w1, w1, 1
-.L451:
+.L479:
 	lsl	w1, w1, 25
 	orr	w1, w1, 1
 	str	w1, [x2, 32]
 	ret
-.L457:
+.L485:
 	mov	w1, 0
-	b	.L451
-.L458:
+	b	.L479
+.L486:
 	mov	w1, 3
-	b	.L451
-.L450:
+	b	.L479
+.L478:
 	str	w1, [x2, 8]
 	cmp	w0, 16
 	mov	w1, 4096
-	bne	.L453
-.L456:
+	bne	.L481
+.L484:
 	and	w1, w1, -17
-.L454:
+.L482:
 	orr	w1, w1, 1
 	str	w1, [x2, 12]
 	ret
-.L453:
+.L481:
 	cmp	w0, 24
-	bne	.L455
+	bne	.L483
 	orr	w1, w1, 16
-	b	.L454
-.L455:
+	b	.L482
+.L483:
 	orr	w1, w1, 262144
 	cmp	w0, 40
 	orr	w1, w1, 16
-	bne	.L454
-	b	.L456
+	bne	.L482
+	b	.L484
 	.size	nandc_bch_sel, .-nandc_bch_sel
 	.section	.text.zftl_nandc_get_irq_status,"ax",@progbits
 	.align	2
@@ -2339,10 +2506,10 @@ zftl_nandc_get_irq_status:
 	adrp	x1, .LANCHOR27
 	ldrb	w1, [x1, #:lo12:.LANCHOR27]
 	cmp	w1, 9
-	bne	.L464
+	bne	.L492
 	ldr	w0, [x0, 296]
 	ret
-.L464:
+.L492:
 	ldr	w0, [x0, 372]
 	ret
 	.size	zftl_nandc_get_irq_status, .-zftl_nandc_get_irq_status
@@ -2385,7 +2552,7 @@ nandc_xfer_start:
 	ldrb	w0, [x0, #:lo12:.LANCHOR27]
 	adrp	x24, .LANCHOR13
 	cmp	w0, 9
-	bne	.L470
+	bne	.L498
 	ubfiz	w19, w23, 1, 1
 	mov	w0, 1
 	orr	w19, w19, 8
@@ -2398,13 +2565,13 @@ nandc_xfer_start:
 	and	w19, w19, -17
 	bfi	w19, w20, 22, 6
 	orr	w19, w19, 128
-	cbz	w0, .L471
+	cbz	w0, .L499
 	adrp	x0, .LANCHOR45
 	ldrb	w1, [x0, #:lo12:.LANCHOR45]
 	orr	w0, w19, 512
 	cmp	w1, 0
 	csel	w19, w0, w19, ne
-.L471:
+.L499:
 	add	x21, x4, :lo12:.LANCHOR46
 	add	x0, x2, 63
 	and	w20, w20, 63
@@ -2447,13 +2614,13 @@ nandc_xfer_start:
 	str	w19, [x1, 16]
 	orr	w19, w19, 4
 	str	w19, [x1, 16]
-.L469:
+.L497:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L470:
+.L498:
 	ldr	x0, [x24, #:lo12:.LANCHOR13]
 	ubfiz	w19, w23, 1, 1
 	orr	w19, w19, 8
@@ -2469,7 +2636,7 @@ nandc_xfer_start:
 	orr	w19, w19, 1024
 	and	w19, w19, -17
 	bfi	w19, w20, 22, 6
-	cbz	w23, .L473
+	cbz	w23, .L501
 	adrp	x0, .LANCHOR43
 	ubfx	x1, x1, 1, 7
 	ldr	x8, [x4, #:lo12:.LANCHOR46]
@@ -2480,11 +2647,11 @@ nandc_xfer_start:
 	mov	w0, 64
 	csel	w5, w5, w0, hi
 	mov	w0, 0
-.L475:
+.L503:
 	add	w7, w5, w0
 	cmp	x3, x1
-	bne	.L476
-.L477:
+	bne	.L504
+.L505:
 	add	x21, x4, :lo12:.LANCHOR46
 	ldr	x0, [x4, #:lo12:.LANCHOR46]
 	and	w20, w20, 63
@@ -2520,8 +2687,8 @@ nandc_xfer_start:
 	str	w19, [x1, 8]
 	orr	w19, w19, 4
 	str	w19, [x1, 8]
-	b	.L469
-.L476:
+	b	.L497
+.L504:
 	ldrh	w10, [x3]
 	and	x0, x0, 4294967292
 	ldrh	w6, [x3, 2]
@@ -2529,11 +2696,11 @@ nandc_xfer_start:
 	orr	x6, x10, x6, lsl 16
 	str	w6, [x8, x0]
 	mov	w0, w7
-	b	.L475
-.L473:
+	b	.L503
+.L501:
 	ldr	x1, [x4, #:lo12:.LANCHOR46]
 	str	w0, [x1]
-	b	.L477
+	b	.L505
 	.size	nandc_xfer_start, .-nandc_xfer_start
 	.section	.text.nandc_set_seed,"ax",@progbits
 	.align	2
@@ -2554,10 +2721,10 @@ nandc_set_seed:
 	cmp	w1, 9
 	adrp	x1, .LANCHOR13
 	ldr	x1, [x1, #:lo12:.LANCHOR13]
-	bne	.L487
+	bne	.L515
 	str	w0, [x1, 520]
 	ret
-.L487:
+.L515:
 	str	w0, [x1, 336]
 	ret
 	.size	nandc_set_seed, .-nandc_set_seed
@@ -2570,29 +2737,37 @@ zftl_flash_de_init:
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	bl	nandc_wait_flash_ready
+	adrp	x0, .LANCHOR0
+	ldrb	w0, [x0, #:lo12:.LANCHOR0]
+	cbz	w0, .L520
+	adrp	x0, .LANCHOR49
+	ldrb	w0, [x0, #:lo12:.LANCHOR49]
+	cbnz	w0, .L520
+	bl	zftl_flash_exit_slc_mode
+.L520:
 	adrp	x19, .LANCHOR20
 	mov	w0, 0
 	bl	hynix_reconfig_rr_para
 	ldrb	w0, [x19, #:lo12:.LANCHOR20]
-	cbz	w0, .L492
+	cbz	w0, .L521
 	adrp	x0, .LANCHOR42
 	ldrb	w0, [x0, #:lo12:.LANCHOR42]
-	tbz	x0, 0, .L492
+	tbz	x0, 0, .L521
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
 	bl	nandc_set_if_mode
 	strb	wzr, [x19, #:lo12:.LANCHOR20]
-.L492:
+.L521:
 	adrp	x3, .LANCHOR45
 	ldrb	w0, [x3, #:lo12:.LANCHOR45]
-	cbz	w0, .L493
+	cbz	w0, .L522
 	mov	w0, 0
 	strb	wzr, [x3, #:lo12:.LANCHOR45]
 	bl	nandc_set_seed
 	mov	w0, 1
 	strb	w0, [x3, #:lo12:.LANCHOR45]
-.L493:
+.L522:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -2624,10 +2799,10 @@ nandc_get_chip_if:
 	.global	buf_reinit
 	.type	buf_reinit, %function
 buf_reinit:
-	adrp	x0, .LANCHOR49
-	add	x1, x0, :lo12:.LANCHOR49
+	adrp	x0, .LANCHOR50
+	add	x1, x0, :lo12:.LANCHOR50
 	mov	w2, 0
-.L507:
+.L539:
 	and	w3, w2, 255
 	strb	wzr, [x1, 2]
 	add	w4, w3, 1
@@ -2637,14 +2812,14 @@ buf_reinit:
 	str	xzr, [x1, 16]
 	cmp	w2, 32
 	add	x1, x1, 64
-	bne	.L507
-	add	x0, x0, :lo12:.LANCHOR49
+	bne	.L539
+	add	x0, x0, :lo12:.LANCHOR50
 	mov	w1, -1
 	strb	w1, [x0, 1984]
-	adrp	x0, .LANCHOR50
-	strb	wzr, [x0, #:lo12:.LANCHOR50]
 	adrp	x0, .LANCHOR51
-	strb	w2, [x0, #:lo12:.LANCHOR51]
+	strb	wzr, [x0, #:lo12:.LANCHOR51]
+	adrp	x0, .LANCHOR52
+	strb	w2, [x0, #:lo12:.LANCHOR52]
 	ret
 	.size	buf_reinit, .-buf_reinit
 	.section	.text.buf_add_tail,"ax",@progbits
@@ -2662,49 +2837,49 @@ buf_add_tail:
 	mov	x20, x1
 	ldrb	w1, [x19]
 	cmp	w1, 255
-	bne	.L515
+	bne	.L547
 	ldrb	w0, [x20, 1]
 	cmp	w0, 255
-	bne	.L511
-	adrp	x1, .LANCHOR52
+	bne	.L543
+	adrp	x1, .LANCHOR53
 	adrp	x0, .LC0
 	mov	w2, 74
-	add	x1, x1, :lo12:.LANCHOR52
+	add	x1, x1, :lo12:.LANCHOR53
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L511:
+.L543:
 	ldrb	w0, [x20, 1]
 	strb	w0, [x19]
-.L509:
+.L541:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L515:
-	adrp	x0, .LANCHOR49
-	add	x2, x0, :lo12:.LANCHOR49
+.L547:
+	adrp	x0, .LANCHOR50
+	add	x2, x0, :lo12:.LANCHOR50
 	mov	x19, x0
-.L516:
+.L548:
 	sbfiz	x0, x1, 6, 32
 	mov	w21, w1
 	ldrb	w1, [x2, x0]
 	cmp	w1, 255
-	bne	.L516
+	bne	.L548
 	ldrb	w0, [x20, 1]
 	cmp	w0, 255
-	bne	.L513
-	adrp	x1, .LANCHOR52
+	bne	.L545
+	adrp	x1, .LANCHOR53
 	adrp	x0, .LC0
 	mov	w2, 81
-	add	x1, x1, :lo12:.LANCHOR52
+	add	x1, x1, :lo12:.LANCHOR53
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L513:
-	add	x0, x19, :lo12:.LANCHOR49
+.L545:
+	add	x0, x19, :lo12:.LANCHOR50
 	sbfiz	x21, x21, 6, 32
 	ldrb	w1, [x20, 1]
 	strb	w1, [x0, x21]
-	b	.L509
+	b	.L541
 	.size	buf_add_tail, .-buf_add_tail
 	.section	.text.queue_read_cmd,"ax",@progbits
 	.align	2
@@ -2723,9 +2898,9 @@ queue_read_cmd:
 	mov	w0, -1
 	strb	w0, [x19]
 	mov	x1, x19
-	adrp	x0, .LANCHOR53
+	adrp	x0, .LANCHOR54
 	ldr	x19, [sp, 16]
-	add	x0, x0, :lo12:.LANCHOR53
+	add	x0, x0, :lo12:.LANCHOR54
 	ldp	x29, x30, [sp], 32
 	b	buf_add_tail
 	.size	queue_read_cmd, .-queue_read_cmd
@@ -2735,33 +2910,33 @@ queue_read_cmd:
 	.type	buf_free, %function
 buf_free:
 	ldrb	w1, [x0, 2]
-	adrp	x2, .LANCHOR50
+	adrp	x2, .LANCHOR51
 	and	w1, w1, 8
 	strb	w1, [x0, 2]
-	cbz	w1, .L521
+	cbz	w1, .L553
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L521
+	beq	.L553
 	stp	x29, x30, [sp, -16]!
 	mov	x1, x0
-	add	x0, x2, :lo12:.LANCHOR50
+	add	x0, x2, :lo12:.LANCHOR51
 	add	x29, sp, 0
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR51
+	adrp	x1, .LANCHOR52
 	ldp	x29, x30, [sp], 16
-	ldrb	w0, [x1, #:lo12:.LANCHOR51]
+	ldrb	w0, [x1, #:lo12:.LANCHOR52]
 	add	w0, w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR51]
+	strb	w0, [x1, #:lo12:.LANCHOR52]
 	ret
-.L521:
-	ldrb	w1, [x2, #:lo12:.LANCHOR50]
+.L553:
+	ldrb	w1, [x2, #:lo12:.LANCHOR51]
 	strb	w1, [x0]
-	adrp	x1, .LANCHOR51
+	adrp	x1, .LANCHOR52
 	ldrb	w0, [x0, 1]
-	strb	w0, [x2, #:lo12:.LANCHOR50]
-	ldrb	w0, [x1, #:lo12:.LANCHOR51]
+	strb	w0, [x2, #:lo12:.LANCHOR51]
+	ldrb	w0, [x1, #:lo12:.LANCHOR52]
 	add	w0, w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR51]
+	strb	w0, [x1, #:lo12:.LANCHOR52]
 	ret
 	.size	buf_free, .-buf_free
 	.section	.text.buf_alloc,"ax",@progbits
@@ -2772,29 +2947,29 @@ buf_alloc:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR51
+	adrp	x19, .LANCHOR52
 	and	w20, w0, 255
-	ldrb	w0, [x19, #:lo12:.LANCHOR51]
-	cbz	w0, .L534
-.L537:
-	adrp	x2, .LANCHOR50
-	adrp	x1, .LANCHOR49
-	add	x0, x1, :lo12:.LANCHOR49
-	ldrb	w3, [x2, #:lo12:.LANCHOR50]
+	ldrb	w0, [x19, #:lo12:.LANCHOR52]
+	cbz	w0, .L566
+.L569:
+	adrp	x2, .LANCHOR51
+	adrp	x1, .LANCHOR50
+	add	x0, x1, :lo12:.LANCHOR50
+	ldrb	w3, [x2, #:lo12:.LANCHOR51]
 	ubfiz	x4, x3, 6, 8
 	add	x0, x0, x4
 	mov	x4, x2
-	cbz	w20, .L535
-.L536:
-	add	x1, x1, :lo12:.LANCHOR49
+	cbz	w20, .L567
+.L568:
+	add	x1, x1, :lo12:.LANCHOR50
 	sbfiz	x3, x3, 6, 32
 	add	x2, x1, x3
 	ldrb	w5, [x1, x3]
-	strb	w5, [x4, #:lo12:.LANCHOR50]
-	ldrb	w4, [x19, #:lo12:.LANCHOR51]
+	strb	w5, [x4, #:lo12:.LANCHOR51]
+	ldrb	w4, [x19, #:lo12:.LANCHOR52]
 	strh	wzr, [x2, 50]
 	sub	w4, w4, #1
-	strb	w4, [x19, #:lo12:.LANCHOR51]
+	strb	w4, [x19, #:lo12:.LANCHOR52]
 	mov	w4, 1
 	strb	wzr, [x2, 56]
 	strb	w4, [x2, 2]
@@ -2804,27 +2979,27 @@ buf_alloc:
 	mov	w1, -1
 	str	xzr, [x2, 16]
 	str	w1, [x2, 36]
-	b	.L533
-.L534:
+	b	.L565
+.L566:
 	mov	w2, 121
-	adrp	x1, .LANCHOR54
+	adrp	x1, .LANCHOR55
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR54
+	add	x1, x1, :lo12:.LANCHOR55
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	ldrb	w0, [x19, #:lo12:.LANCHOR51]
-	cbnz	w0, .L537
-.L539:
+	ldrb	w0, [x19, #:lo12:.LANCHOR52]
+	cbnz	w0, .L569
+.L571:
 	mov	x0, 0
-.L533:
+.L565:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L535:
-	ldrb	w2, [x19, #:lo12:.LANCHOR51]
+.L567:
+	ldrb	w2, [x19, #:lo12:.LANCHOR52]
 	cmp	w2, 1
-	bne	.L536
-	b	.L539
+	bne	.L568
+	b	.L571
 	.size	buf_alloc, .-buf_alloc
 	.section	.text.buf_remove_buf,"ax",@progbits
 	.align	2
@@ -2834,30 +3009,30 @@ buf_remove_buf:
 	ldrb	w4, [x1, 1]
 	ldrb	w2, [x0]
 	cmp	w4, w2
-	bne	.L547
+	bne	.L579
 	ldrb	w1, [x1]
 	strb	w1, [x0]
-.L551:
+.L583:
 	mov	w0, 1
 	ret
-.L548:
+.L580:
 	mov	w3, w2
 	sbfiz	x2, x2, 6, 32
 	ldrb	w2, [x0, x2]
 	cmp	w4, w2
-	bne	.L549
+	bne	.L581
 	sbfiz	x3, x3, 6, 32
 	ldrb	w2, [x1]
 	strb	w2, [x0, x3]
 	mov	w0, -1
 	strb	w0, [x1]
-	b	.L551
-.L547:
-	adrp	x0, .LANCHOR49
-	add	x0, x0, :lo12:.LANCHOR49
-.L549:
+	b	.L583
+.L579:
+	adrp	x0, .LANCHOR50
+	add	x0, x0, :lo12:.LANCHOR50
+.L581:
 	cmp	w2, 255
-	bne	.L548
+	bne	.L580
 	mov	w0, 0
 	ret
 	.size	buf_remove_buf, .-buf_remove_buf
@@ -2869,32 +3044,32 @@ buf_remove_free:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR51
+	adrp	x19, .LANCHOR52
 	mov	x20, x0
-	ldrb	w0, [x19, #:lo12:.LANCHOR51]
-	cbnz	w0, .L553
-	adrp	x1, .LANCHOR55
+	ldrb	w0, [x19, #:lo12:.LANCHOR52]
+	cbnz	w0, .L585
+	adrp	x1, .LANCHOR56
 	adrp	x0, .LC0
 	mov	w2, 172
-	add	x1, x1, :lo12:.LANCHOR55
+	add	x1, x1, :lo12:.LANCHOR56
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L553:
-	ldrb	w0, [x19, #:lo12:.LANCHOR51]
-	cbz	w0, .L552
+.L585:
+	ldrb	w0, [x19, #:lo12:.LANCHOR52]
+	cbz	w0, .L584
 	mov	x1, x20
-	adrp	x0, .LANCHOR50
-	add	x0, x0, :lo12:.LANCHOR50
+	adrp	x0, .LANCHOR51
+	add	x0, x0, :lo12:.LANCHOR51
 	bl	buf_remove_buf
 	cmp	w0, 1
-	bne	.L552
-	ldrb	w0, [x19, #:lo12:.LANCHOR51]
+	bne	.L584
+	ldrb	w0, [x19, #:lo12:.LANCHOR52]
 	sub	w0, w0, #1
-	strb	w0, [x19, #:lo12:.LANCHOR51]
+	strb	w0, [x19, #:lo12:.LANCHOR52]
 	ldrb	w0, [x20, 2]
 	orr	w0, w0, 1
 	strb	w0, [x20, 2]
-.L552:
+.L584:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -2904,8 +3079,8 @@ buf_remove_free:
 	.global	flash_check_bad_block
 	.type	flash_check_bad_block, %function
 flash_check_bad_block:
-	adrp	x3, .LANCHOR34
-	add	x3, x3, :lo12:.LANCHOR34
+	adrp	x3, .LANCHOR30
+	add	x3, x3, :lo12:.LANCHOR30
 	and	w5, w0, 255
 	lsr	w4, w1, 5
 	and	w1, w1, 31
@@ -2936,14 +3111,14 @@ flash_mask_bad_block:
 	add	x29, sp, 0
 	str	x21, [sp, 32]
 	and	w21, w0, 255
-	adrp	x0, .LANCHOR34
-	add	x0, x0, :lo12:.LANCHOR34
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
 	stp	x19, x20, [sp, 16]
 	mov	w20, w1
 	ldrh	w19, [x0, 14]
 	ldrb	w1, [x0, 13]
-	adrp	x0, .LC40
-	add	x0, x0, :lo12:.LC40
+	adrp	x0, .LC41
+	add	x0, x0, :lo12:.LC41
 	mul	w19, w19, w1
 	mov	w1, w21
 	bl	printf
@@ -2979,15 +3154,15 @@ ftl_gc_write_buf:
 	orr	w1, w1, 2
 	strb	w1, [x0, 2]
 	mov	x1, x0
-	adrp	x0, .LANCHOR56
-	add	x0, x0, :lo12:.LANCHOR56
+	adrp	x0, .LANCHOR57
+	add	x0, x0, :lo12:.LANCHOR57
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR57
+	adrp	x1, .LANCHOR58
 	ldp	x29, x30, [sp], 16
-	ldrb	w0, [x1, #:lo12:.LANCHOR57]
+	ldrb	w0, [x1, #:lo12:.LANCHOR58]
 	add	w0, w0, 1
 	and	w0, w0, 255
-	strb	w0, [x1, #:lo12:.LANCHOR57]
+	strb	w0, [x1, #:lo12:.LANCHOR58]
 	ret
 	.size	ftl_gc_write_buf, .-ftl_gc_write_buf
 	.section	.text.zftl_cache_flush,"ax",@progbits
@@ -3002,11 +3177,11 @@ zftl_cache_flush:
 	.global	zftl_get_density
 	.type	zftl_get_density, %function
 zftl_get_density:
-	cbnz	w0, .L565
-	adrp	x0, .LANCHOR58
-	ldr	w0, [x0, #:lo12:.LANCHOR58]
+	cbnz	w0, .L597
+	adrp	x0, .LANCHOR59
+	ldr	w0, [x0, #:lo12:.LANCHOR59]
 	ret
-.L565:
+.L597:
 	cmp	w0, 4
 	cset	w0, cc
 	lsl	w0, w0, 13
@@ -3031,8 +3206,8 @@ vpn_check:
 	.global	FtlGetCurEraseBlock
 	.type	FtlGetCurEraseBlock, %function
 FtlGetCurEraseBlock:
-	adrp	x0, .LANCHOR59
-	ldrh	w0, [x0, #:lo12:.LANCHOR59]
+	adrp	x0, .LANCHOR60
+	ldrh	w0, [x0, #:lo12:.LANCHOR60]
 	ret
 	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
 	.section	.text.FtlGetAllBlockNum,"ax",@progbits
@@ -3070,14 +3245,14 @@ gc_add_sblk:
 	stp	x21, x22, [sp, 32]
 	str	x27, [sp, 80]
 	cmp	w0, w20
-	bhi	.L574
-	adrp	x1, .LANCHOR60
+	bhi	.L606
+	adrp	x1, .LANCHOR61
 	adrp	x0, .LC0
-	mov	w2, 259
-	add	x1, x1, :lo12:.LANCHOR60
+	mov	w2, 339
+	add	x1, x1, :lo12:.LANCHOR61
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L574:
+.L606:
 	adrp	x22, .LANCHOR9
 	uxtw	x19, w20
 	lsl	x26, x19, 1
@@ -3086,127 +3261,127 @@ gc_add_sblk:
 	adrp	x27, .LANCHOR7
 	ldrh	w21, [x0, x26]
 	ldr	w0, [x23, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L575
+	tbz	x0, 8, .L607
 	ldr	x0, [x27, #:lo12:.LANCHOR7]
 	mov	w4, w21
 	mov	w2, w24
 	mov	w1, w20
 	add	x0, x0, x19, lsl 2
 	ldrb	w3, [x0, 2]
-	adrp	x0, .LANCHOR61
-	ldrh	w6, [x0, #:lo12:.LANCHOR61]
-	adrp	x0, .LANCHOR62+56
+	adrp	x0, .LANCHOR62
+	ldrh	w6, [x0, #:lo12:.LANCHOR62]
+	adrp	x0, .LANCHOR63+56
 	ubfx	x3, x3, 5, 3
-	ldrh	w5, [x0, #:lo12:.LANCHOR62+56]
-	adrp	x0, .LC41
-	add	x0, x0, :lo12:.LC41
+	ldrh	w5, [x0, #:lo12:.LANCHOR63+56]
+	adrp	x0, .LC42
+	add	x0, x0, :lo12:.LC42
 	bl	printf
-.L575:
+.L607:
 	ldr	x0, [x27, #:lo12:.LANCHOR7]
 	add	x19, x0, x19, lsl 2
 	ldrb	w2, [x19, 2]
 	tst	w2, 224
-	bne	.L576
-	cbz	w21, .L596
-	adrp	x1, .LANCHOR60
+	bne	.L608
+	cbz	w21, .L628
+	adrp	x1, .LANCHOR61
 	adrp	x0, .LC0
-	mov	w2, 264
-	add	x1, x1, :lo12:.LANCHOR60
+	mov	w2, 344
+	add	x1, x1, :lo12:.LANCHOR61
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L596:
+.L628:
 	mov	w0, 0
-	b	.L573
-.L576:
-	adrp	x0, .LANCHOR62
-	add	x1, x0, :lo12:.LANCHOR62
-	ldrh	w0, [x0, #:lo12:.LANCHOR62]
+	b	.L605
+.L608:
+	adrp	x0, .LANCHOR63
+	add	x1, x0, :lo12:.LANCHOR63
+	ldrh	w0, [x0, #:lo12:.LANCHOR63]
 	cmp	w0, w20
-	beq	.L596
+	beq	.L628
 	adrp	x21, .LANCHOR10
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	ldrh	w3, [x0, 48]
 	cmp	w3, w20
-	beq	.L596
+	beq	.L628
 	ldrh	w3, [x0, 16]
 	cmp	w3, w20
-	beq	.L596
+	beq	.L628
 	ldrh	w3, [x0, 80]
 	cmp	w3, w20
-	beq	.L596
+	beq	.L628
 	ldrh	w4, [x1, 56]
 	add	x1, x1, 58
 	mov	w3, 0
-.L578:
+.L610:
 	cmp	w3, w4
-	bcc	.L579
-	cbnz	w24, .L583
-	adrp	x1, .LANCHOR63
-	ldrh	w5, [x1, #:lo12:.LANCHOR63]
+	bcc	.L611
+	cbnz	w24, .L615
+	adrp	x1, .LANCHOR64
+	ldrh	w5, [x1, #:lo12:.LANCHOR64]
 	cmp	w20, w5
-	beq	.L596
-	adrp	x3, .LANCHOR64
-	add	x3, x3, :lo12:.LANCHOR64
+	beq	.L628
+	adrp	x3, .LANCHOR65
+	add	x3, x3, :lo12:.LANCHOR65
 	mov	x1, 0
-.L582:
+.L614:
 	ldrh	w6, [x1, x3]
 	cmp	w20, w6
-	bne	.L581
+	bne	.L613
 	ldr	w0, [x23, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L596
+	tbz	x0, 8, .L628
 	ldr	x0, [x22, #:lo12:.LANCHOR9]
 	mov	w4, w20
 	ubfx	x2, x2, 5, 3
 	mov	w1, w20
 	ldrh	w3, [x0, x26]
-	adrp	x0, .LC42
-	add	x0, x0, :lo12:.LC42
+	adrp	x0, .LC43
+	add	x0, x0, :lo12:.LC43
 	bl	printf
-	b	.L596
-.L579:
+	b	.L628
+.L611:
 	ldrh	w5, [x1], 2
 	cmp	w5, w20
-	beq	.L596
+	beq	.L628
 	add	w3, w3, 1
-	b	.L578
-.L581:
+	b	.L610
+.L613:
 	add	x1, x1, 2
 	cmp	x1, 16
-	bne	.L582
+	bne	.L614
 	ubfiz	x19, x25, 7, 16
 	add	x19, x19, 136
 	add	x19, x0, x19
-.L584:
+.L616:
 	ldr	w0, [x23, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L585
+	tbz	x0, 8, .L617
 	ldr	x0, [x22, #:lo12:.LANCHOR9]
-	adrp	x1, .LANCHOR61
+	adrp	x1, .LANCHOR62
 	mov	w5, w4
 	ubfx	x3, x2, 5, 3
-	ldrh	w6, [x1, #:lo12:.LANCHOR61]
+	ldrh	w6, [x1, #:lo12:.LANCHOR62]
 	mov	w2, w24
 	mov	w1, w20
 	ldrh	w4, [x0, x26]
-	adrp	x0, .LC41
-	add	x0, x0, :lo12:.LC41
+	adrp	x0, .LC42
+	add	x0, x0, :lo12:.LC42
 	bl	printf
-.L585:
+.L617:
 	mov	x0, x19
 	add	x1, x19, 128
 	mov	w2, 65535
-.L588:
+.L620:
 	ldrh	w3, [x0]
 	cmp	w3, w2
-	bne	.L586
+	bne	.L618
 	strh	w20, [x0]
-	cbz	w24, .L587
+	cbz	w24, .L619
 	ldr	x1, [x21, #:lo12:.LANCHOR10]
 	ldrh	w0, [x1, 124]
 	add	w0, w0, 1
 	strh	w0, [x1, 124]
-.L606:
+.L638:
 	mov	w0, 1
-.L573:
+.L605:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -3214,30 +3389,30 @@ gc_add_sblk:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L583:
+.L615:
 	add	x19, x0, 392
-	b	.L584
-.L587:
+	b	.L616
+.L619:
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	add	x25, x0, x25, uxth 1
 	ldrh	w0, [x25, 120]
 	add	w0, w0, 1
 	strh	w0, [x25, 120]
-	b	.L606
-.L586:
+	b	.L638
+.L618:
 	add	x0, x0, 2
 	cmp	x1, x0
-	bne	.L588
-	b	.L606
+	bne	.L620
+	b	.L638
 	.size	gc_add_sblk, .-gc_add_sblk
 	.section	.text.gc_get_src_ppa_from_index,"ax",@progbits
 	.align	2
 	.global	gc_get_src_ppa_from_index
 	.type	gc_get_src_ppa_from_index, %function
 gc_get_src_ppa_from_index:
-	adrp	x1, .LANCHOR65
+	adrp	x1, .LANCHOR66
 	ubfiz	x0, x0, 2, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR65]
+	ldr	x1, [x1, #:lo12:.LANCHOR66]
 	ldr	w0, [x1, x0]
 	ret
 	.size	gc_get_src_ppa_from_index, .-gc_get_src_ppa_from_index
@@ -3248,19 +3423,19 @@ gc_get_src_ppa_from_index:
 gc_write_completed:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR66
 	stp	x21, x22, [sp, 32]
-	adrp	x24, .LANCHOR49
-	add	x23, x23, :lo12:.LANCHOR66
-	add	x22, x24, :lo12:.LANCHOR49
+	adrp	x22, .LANCHOR67
+	stp	x23, x24, [sp, 48]
+	add	x22, x22, :lo12:.LANCHOR67
+	adrp	x23, .LANCHOR50
+	add	x21, x23, :lo12:.LANCHOR50
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-.L609:
-	ldrb	w19, [x23]
-	cmp	w19, 255
-	bne	.L620
+.L641:
+	ldrb	w0, [x22]
+	cmp	w0, 255
+	bne	.L654
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -3268,117 +3443,138 @@ gc_write_completed:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L620:
-	lsl	x1, x19, 6
-	add	x0, x24, :lo12:.LANCHOR49
-	add	x2, x0, x1
-	ldrb	w0, [x0, x1]
+.L654:
+	sxtw	x26, w0
+	add	x1, x23, :lo12:.LANCHOR50
+	lsl	x3, x26, 6
+	add	x2, x1, x3
+	ldrb	w0, [x1, x3]
 	ldr	w1, [x2, 52]
-	strb	w0, [x23]
-	ldrh	w25, [x2, 48]
-	cbz	w1, .L610
+	strb	w0, [x22]
+	ldrh	w24, [x2, 48]
+	cbz	w1, .L642
 	ldr	w2, [x2, 40]
-	adrp	x0, .LANCHOR62
-	add	x0, x0, :lo12:.LANCHOR62
+	adrp	x0, .LANCHOR63
+	add	x0, x0, :lo12:.LANCHOR63
 	mov	w3, 1
 	str	w2, [x0, 324]
 	strh	w3, [x0, 320]
-	adrp	x0, .LC43
-	add	x0, x0, :lo12:.LC43
+	adrp	x0, .LC44
+	add	x0, x0, :lo12:.LC44
 	bl	printf
-	adrp	x1, .LANCHOR67
+	adrp	x1, .LANCHOR68
 	adrp	x0, .LC0
-	mov	w2, 545
-	add	x1, x1, :lo12:.LANCHOR67
+	mov	w2, 625
+	add	x1, x1, :lo12:.LANCHOR68
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L610:
-	adrp	x26, .LANCHOR68
-	ldrb	w0, [x26, #:lo12:.LANCHOR68]
+.L642:
+	adrp	x25, .LANCHOR69
+	ldrb	w0, [x25, #:lo12:.LANCHOR69]
 	cmp	w0, 3
-	bne	.L621
+	bne	.L643
 	adrp	x0, .LANCHOR10
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
-	ldrb	w20, [x0, 89]
-	add	w20, w20, w20, lsl 1
-	and	w20, w20, 1023
-.L611:
+	ldrb	w19, [x0, 89]
+	add	w19, w19, w19, lsl 1
+	and	w19, w19, 1023
+.L644:
 	adrp	x0, .LANCHOR14
-	adrp	x28, .LANCHOR69
-	and	x21, x25, 65535
+	adrp	x28, .LANCHOR72
+	and	x20, x24, 65535
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L612
-	ldr	x1, [x28, #:lo12:.LANCHOR69]
-	add	x0, x22, x19, lsl 6
-	mov	w3, w25
+	tbz	x0, 8, .L645
+	ldr	x1, [x28, #:lo12:.LANCHOR72]
+	add	x0, x21, x26, lsl 6
+	mov	w3, w24
 	ldrb	w2, [x0, 1]
-	adrp	x0, .LC44
-	ldrb	w4, [x1, x21]
-	add	x0, x0, :lo12:.LC44
-	mov	w1, w25
+	adrp	x0, .LC45
+	ldrb	w4, [x1, x20]
+	add	x0, x0, :lo12:.LC45
+	mov	w1, w24
 	bl	printf
-.L612:
-	ldr	x1, [x28, #:lo12:.LANCHOR69]
-	add	x0, x22, x19, lsl 6
-	mov	x27, x21
+.L645:
+	ldr	x1, [x28, #:lo12:.LANCHOR72]
+	add	x0, x21, x26, lsl 6
+	mov	x27, x20
 	ldrb	w0, [x0, 1]
-	ldrb	w1, [x1, x21]
+	ldrb	w1, [x1, x20]
 	cmp	w1, w0
-	beq	.L613
-	adrp	x1, .LANCHOR67
+	beq	.L646
+	adrp	x1, .LANCHOR68
 	adrp	x0, .LC0
-	mov	w2, 552
-	add	x1, x1, :lo12:.LANCHOR67
+	mov	w2, 634
+	add	x1, x1, :lo12:.LANCHOR68
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L613:
-	add	x19, x22, x19, lsl 6
-	ldrb	w0, [x19, 61]
+.L646:
+	add	x0, x21, x26, lsl 6
+	ldrb	w0, [x0, 61]
 	cmp	w0, 3
-	beq	.L614
-	ldrb	w0, [x26, #:lo12:.LANCHOR68]
+	beq	.L647
+	ldrb	w0, [x25, #:lo12:.LANCHOR69]
 	cmp	w0, 3
-	bne	.L614
+	bne	.L647
+	adrp	x0, .LANCHOR73
+	ldrb	w0, [x0, #:lo12:.LANCHOR73]
+	cbnz	w0, .L647
 	adrp	x0, .LANCHOR70
 	ldrb	w0, [x0, #:lo12:.LANCHOR70]
-	cbnz	w0, .L614
-	ldr	x1, [x28, #:lo12:.LANCHOR69]
+	cbz	w0, .L648
+	adrp	x0, .LANCHOR71
+	ldrb	w0, [x0, #:lo12:.LANCHOR71]
+	cbnz	w0, .L647
+.L648:
+	ldr	x1, [x28, #:lo12:.LANCHOR72]
 	mov	x0, 0
-	add	x21, x1, x21
-.L615:
-	cmp	w20, w0, uxth
-	bls	.L609
-	ldrb	w1, [x21, x0]
+	add	x20, x1, x20
+.L649:
+	cmp	w19, w0, uxth
+	bls	.L641
+	ldrb	w1, [x20, x0]
 	add	x0, x0, 1
-	add	x1, x22, x1, lsl 6
+	add	x1, x21, x1, lsl 6
 	strb	wzr, [x1, 61]
-	b	.L615
-.L621:
-	mov	w20, 1
-	b	.L611
-.L614:
-	adrp	x19, .LANCHOR62
-	add	x19, x19, :lo12:.LANCHOR62
-	add	x20, x21, x20, uxth
-	mov	w21, -1
-	strh	w25, [x19, 316]
-.L616:
-	cmp	x20, x27
-	beq	.L609
-	ldr	x1, [x28, #:lo12:.LANCHOR69]
+	b	.L649
+.L643:
+	adrp	x0, .LANCHOR70
+	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	cbz	w0, .L656
+	adrp	x0, .LANCHOR71
+	ldrb	w0, [x0, #:lo12:.LANCHOR71]
+	cbz	w0, .L656
+	adrp	x0, .LANCHOR10
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	ldrb	w19, [x0, 89]
+	ubfiz	w19, w19, 1, 8
+	b	.L644
+.L656:
+	mov	w19, 1
+	b	.L644
+.L647:
+	adrp	x0, .LANCHOR63
+	add	x0, x0, :lo12:.LANCHOR63
+	add	x19, x20, x19, uxth
+	mov	x20, x0
+	strh	w24, [x0, 316]
+	mov	w24, -1
+.L650:
+	cmp	x19, x27
+	beq	.L641
+	ldr	x1, [x28, #:lo12:.LANCHOR72]
 	ldrb	w0, [x1, x27]
-	strb	w21, [x1, x27]
+	strb	w24, [x1, x27]
 	add	x27, x27, 1
 	sbfiz	x1, x0, 6, 32
 	ubfiz	x0, x0, 6, 8
-	add	x1, x22, x1
-	add	x0, x22, x0
+	add	x1, x21, x1
+	add	x0, x21, x0
 	strb	wzr, [x1, 61]
 	bl	buf_free
-	ldrb	w0, [x19, 7]
+	ldrb	w0, [x20, 7]
 	sub	w0, w0, #1
-	strb	w0, [x19, 7]
-	b	.L616
+	strb	w0, [x20, 7]
+	b	.L650
 	.size	gc_write_completed, .-gc_write_completed
 	.section	.text.gc_get_src_blk,"ax",@progbits
 	.align	2
@@ -3387,47 +3583,47 @@ gc_write_completed:
 gc_get_src_blk:
 	adrp	x0, .LANCHOR10
 	ldr	x2, [x0, #:lo12:.LANCHOR10]
-	adrp	x0, .LANCHOR71
-	ldrb	w3, [x0, #:lo12:.LANCHOR71]
+	adrp	x0, .LANCHOR74
+	ldrb	w3, [x0, #:lo12:.LANCHOR74]
 	ldrh	w0, [x2, 124]
-	cbz	w0, .L633
+	cbz	w0, .L671
 	add	x1, x2, 392
 	mov	w4, 1
-.L634:
+.L672:
 	add	x5, x1, 128
 	mov	w6, 65535
-.L638:
+.L676:
 	ldrh	w0, [x1]
 	cmp	w0, w6
-	beq	.L636
+	beq	.L674
 	mov	w5, -1
 	strh	w5, [x1]
-	cbz	w4, .L637
+	cbz	w4, .L675
 	ldrh	w1, [x2, 124]
 	sub	w1, w1, #1
 	strh	w1, [x2, 124]
 	ret
-.L633:
+.L671:
 	add	x0, x2, x3, sxtw 1
 	ldrh	w0, [x0, 120]
-	cbz	w0, .L639
+	cbz	w0, .L677
 	ubfiz	x1, x3, 7, 8
 	mov	w4, 0
 	add	x1, x1, 136
 	add	x1, x2, x1
-	b	.L634
-.L637:
+	b	.L672
+.L675:
 	add	x2, x2, x3, uxtb 1
 	ldrh	w1, [x2, 120]
 	sub	w1, w1, #1
 	strh	w1, [x2, 120]
 	ret
-.L636:
+.L674:
 	add	x1, x1, 2
 	cmp	x1, x5
-	bne	.L638
+	bne	.L676
 	ret
-.L639:
+.L677:
 	mov	w0, 65535
 	ret
 	.size	gc_get_src_blk, .-gc_get_src_blk
@@ -3439,90 +3635,90 @@ gc_free_temp_buf:
 	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR62
-	add	x0, x20, :lo12:.LANCHOR62
+	adrp	x20, .LANCHOR63
+	add	x0, x20, :lo12:.LANCHOR63
 	stp	x21, x22, [sp, 32]
 	ldrb	w1, [x0, 7]
-	cbz	w1, .L648
-	adrp	x1, .LANCHOR51
-	ldrb	w1, [x1, #:lo12:.LANCHOR51]
+	cbz	w1, .L686
+	adrp	x1, .LANCHOR52
+	ldrb	w1, [x1, #:lo12:.LANCHOR52]
 	cmp	w1, 1
-	bhi	.L648
+	bhi	.L686
 	ldrh	w19, [x0, 316]
-	adrp	x2, .LANCHOR73
-	adrp	x0, .LANCHOR72
-	adrp	x21, .LANCHOR69
-	ldrb	w2, [x2, #:lo12:.LANCHOR73]
+	adrp	x2, .LANCHOR76
+	adrp	x0, .LANCHOR75
+	adrp	x21, .LANCHOR72
+	ldrb	w2, [x2, #:lo12:.LANCHOR76]
 	add	w1, w19, 24
-	ldrh	w0, [x0, #:lo12:.LANCHOR72]
-	ldr	x4, [x21, #:lo12:.LANCHOR69]
+	ldrh	w0, [x0, #:lo12:.LANCHOR75]
+	ldr	x4, [x21, #:lo12:.LANCHOR72]
 	mul	w0, w0, w2
 	cmp	w0, w1
 	csel	w1, w0, w1, ls
-	adrp	x0, .LANCHOR49
-	add	x0, x0, :lo12:.LANCHOR49
-.L643:
+	adrp	x0, .LANCHOR50
+	add	x0, x0, :lo12:.LANCHOR50
+.L681:
 	cmp	w19, w1
-	bcc	.L646
-.L648:
+	bcc	.L684
+.L686:
 	mov	w0, 0
-	b	.L641
-.L646:
+	b	.L679
+.L684:
 	uxtw	x22, w19
 	ldrb	w2, [x4, x22]
 	cmp	w2, 255
-	beq	.L644
+	beq	.L682
 	sbfiz	x3, x2, 6, 32
 	add	x3, x0, x3
 	ldrb	w3, [x3, 61]
-	cbnz	w3, .L644
+	cbnz	w3, .L682
 	ubfiz	x2, x2, 6, 8
 	add	x0, x0, x2
 	bl	buf_free
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L645
-	ldr	x0, [x21, #:lo12:.LANCHOR69]
+	tbz	x0, 8, .L683
+	ldr	x0, [x21, #:lo12:.LANCHOR72]
 	mov	w1, w19
 	ldrb	w2, [x0, x22]
-	adrp	x0, .LC45
-	add	x0, x0, :lo12:.LC45
+	adrp	x0, .LC46
+	add	x0, x0, :lo12:.LC46
 	bl	printf
-.L645:
-	ldr	x0, [x21, #:lo12:.LANCHOR69]
-	add	x20, x20, :lo12:.LANCHOR62
+.L683:
+	ldr	x0, [x21, #:lo12:.LANCHOR72]
+	add	x20, x20, :lo12:.LANCHOR63
 	mov	w1, -1
 	strb	w1, [x0, x22]
 	ldrb	w0, [x20, 7]
 	sub	w0, w0, #1
 	strb	w0, [x20, 7]
 	mov	w0, 1
-.L641:
+.L679:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L644:
+.L682:
 	add	w19, w19, 1
-	b	.L643
+	b	.L681
 	.size	gc_free_temp_buf, .-gc_free_temp_buf
 	.section	.text.print_gc_debug_info,"ax",@progbits
 	.align	2
 	.global	print_gc_debug_info
 	.type	print_gc_debug_info, %function
 print_gc_debug_info:
-	adrp	x2, .LANCHOR74
-	adrp	x1, .LANCHOR62
-	add	x0, x1, :lo12:.LANCHOR62
-	ldrh	w6, [x2, #:lo12:.LANCHOR74]
-	adrp	x2, .LANCHOR51
-	ldrh	w1, [x1, #:lo12:.LANCHOR62]
+	adrp	x2, .LANCHOR77
+	adrp	x1, .LANCHOR63
+	add	x0, x1, :lo12:.LANCHOR63
+	ldrh	w6, [x2, #:lo12:.LANCHOR77]
+	adrp	x2, .LANCHOR52
+	ldrh	w1, [x1, #:lo12:.LANCHOR63]
 	ldrb	w5, [x0, 7]
-	ldrb	w4, [x2, #:lo12:.LANCHOR51]
+	ldrb	w4, [x2, #:lo12:.LANCHOR52]
 	ldrh	w3, [x0, 314]
 	ldrh	w2, [x0, 2]
-	adrp	x0, .LC46
-	add	x0, x0, :lo12:.LC46
+	adrp	x0, .LC47
+	add	x0, x0, :lo12:.LC47
 	b	printf
 	.size	print_gc_debug_info, .-print_gc_debug_info
 	.section	.text.zftl_get_gc_node,"ax",@progbits
@@ -3533,21 +3729,21 @@ zftl_get_gc_node:
 	and	w1, w1, 65535
 	and	w0, w0, 65535
 	cmp	w1, 5
-	bne	.L658
+	bne	.L696
 	mov	w1, w0
-	adrp	x0, .LANCHOR75
-	ldr	x0, [x0, #:lo12:.LANCHOR75]
-.L660:
+	adrp	x0, .LANCHOR78
+	ldr	x0, [x0, #:lo12:.LANCHOR78]
+.L698:
 	b	_list_get_gc_head_node.isra.2
-.L658:
+.L696:
 	cmp	w1, 2
-	bne	.L659
+	bne	.L697
 	b	zftl_get_gc_node.part.9
-.L659:
+.L697:
 	mov	w1, w0
-	adrp	x0, .LANCHOR76
-	ldr	x0, [x0, #:lo12:.LANCHOR76]
-	b	.L660
+	adrp	x0, .LANCHOR79
+	ldr	x0, [x0, #:lo12:.LANCHOR79]
+	b	.L698
 	.size	zftl_get_gc_node, .-zftl_get_gc_node
 	.section	.text.gc_search_src_blk,"ax",@progbits
 	.align	2
@@ -3568,9 +3764,9 @@ gc_search_src_blk:
 	stp	x27, x28, [sp, 80]
 	add	x0, x0, x21, sxtw 1
 	ldrh	w19, [x0, 120]
-	cbz	w19, .L662
+	cbz	w19, .L700
 	mov	w0, w19
-.L661:
+.L699:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -3578,72 +3774,72 @@ gc_search_src_blk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L662:
+.L700:
 	and	w20, w2, 255
-	cbnz	w21, .L664
-	adrp	x24, .LANCHOR77
+	cbnz	w21, .L702
+	adrp	x24, .LANCHOR80
 	adrp	x26, .LANCHOR14
-	adrp	x27, .LC47
+	adrp	x27, .LC48
 	and	w22, w20, 65535
 	add	x26, x26, :lo12:.LANCHOR14
-	add	x27, x27, :lo12:.LC47
-	strh	wzr, [x24, #:lo12:.LANCHOR77]
+	add	x27, x27, :lo12:.LC48
+	strh	wzr, [x24, #:lo12:.LANCHOR80]
 	mov	w23, 0
 	mov	w25, 0
-.L665:
+.L703:
 	cmp	w25, w22
-	bcs	.L670
-	ldrh	w6, [x24, #:lo12:.LANCHOR77]
-	add	x7, x24, :lo12:.LANCHOR77
+	bcs	.L708
+	ldrh	w6, [x24, #:lo12:.LANCHOR80]
+	add	x7, x24, :lo12:.LANCHOR80
 	mov	w1, 3
 	mov	w0, w6
 	bl	zftl_get_gc_node
 	add	w2, w6, 1
 	and	w2, w2, 65535
-	strh	w2, [x24, #:lo12:.LANCHOR77]
+	strh	w2, [x24, #:lo12:.LANCHOR80]
 	and	w1, w0, 65535
 	mov	w0, 65535
 	mov	w28, w1
 	cmp	w1, w0
-	beq	.L666
+	beq	.L704
 	ldr	w0, [x26]
 	adrp	x6, .LANCHOR9
 	uxtw	x4, w1
-	tbz	x0, 8, .L667
+	tbz	x0, 8, .L705
 	ldr	x0, [x6, #:lo12:.LANCHOR9]
 	stp	x6, x4, [x29, 96]
 	ldrh	w3, [x0, x4, lsl 1]
 	mov	x0, x27
 	bl	printf
 	ldp	x6, x4, [x29, 96]
-.L667:
+.L705:
 	ldr	x0, [x6, #:lo12:.LANCHOR9]
 	ldrh	w1, [x0, x4, lsl 1]
-	adrp	x0, .LANCHOR61
-	ldrh	w0, [x0, #:lo12:.LANCHOR61]
+	adrp	x0, .LANCHOR62
+	ldrh	w0, [x0, #:lo12:.LANCHOR62]
 	cmp	w1, w0
-	bcs	.L668
+	bcs	.L706
 	mov	w2, 0
 	mov	w1, 0
 	mov	w0, w28
 	bl	gc_add_sblk
-	cbz	w0, .L669
+	cbz	w0, .L707
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w22, w23
-	bcs	.L669
-.L670:
+	bcs	.L707
+.L708:
 	ldr	x0, [x29, 112]
-	tbz	x0, 1, .L672
-	adrp	x25, .LANCHOR79
-	adrp	x24, .LANCHOR78
-	add	x27, x25, :lo12:.LANCHOR79
-	add	x24, x24, :lo12:.LANCHOR78
+	tbz	x0, 1, .L710
+	adrp	x25, .LANCHOR82
+	adrp	x24, .LANCHOR81
+	add	x27, x25, :lo12:.LANCHOR82
+	add	x24, x24, :lo12:.LANCHOR81
 	mov	w28, 0
 	mov	w26, 65535
-.L673:
+.L711:
 	cmp	w28, w22
-	beq	.L677
+	beq	.L715
 	ldrh	w6, [x24]
 	mov	w1, 5
 	mov	w0, w6
@@ -3652,219 +3848,219 @@ gc_search_src_blk:
 	strh	w6, [x24]
 	and	w1, w0, 65535
 	cmp	w1, w26
-	beq	.L674
+	beq	.L712
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x1]
 	ldrh	w1, [x27]
 	cmp	w2, w1
-	bcs	.L674
+	bcs	.L712
 	mov	w2, 0
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L676
+	cbz	w0, .L714
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w22, w23
-	bcs	.L676
-.L677:
+	bcs	.L714
+.L715:
 	cmp	w23, w22
-	adrp	x0, .LANCHOR80
-	bcs	.L679
-	ldrh	w1, [x0, #:lo12:.LANCHOR80]
-	adrp	x3, .LANCHOR73
-	adrp	x0, .LANCHOR72
-	ldrh	w2, [x25, #:lo12:.LANCHOR79]
-	ldrb	w3, [x3, #:lo12:.LANCHOR73]
-	ldrh	w0, [x0, #:lo12:.LANCHOR72]
+	adrp	x0, .LANCHOR83
+	bcs	.L717
+	ldrh	w1, [x0, #:lo12:.LANCHOR83]
+	adrp	x3, .LANCHOR76
+	adrp	x0, .LANCHOR75
+	ldrh	w2, [x25, #:lo12:.LANCHOR82]
+	ldrb	w3, [x3, #:lo12:.LANCHOR76]
+	ldrh	w0, [x0, #:lo12:.LANCHOR75]
 	mul	w0, w0, w3
 	sub	w0, w0, w1, lsr 2
 	cmp	w2, w0
-	bge	.L672
+	bge	.L710
 	add	w1, w2, w1, lsr 3
-	strh	w1, [x25, #:lo12:.LANCHOR79]
-.L672:
+	strh	w1, [x25, #:lo12:.LANCHOR82]
+.L710:
 	ldr	x0, [x29, 112]
-	tbz	x0, 0, .L680
+	tbz	x0, 0, .L718
 	cmp	w23, w22
-	bcs	.L680
-	adrp	x24, .LANCHOR81
-	add	x24, x24, :lo12:.LANCHOR81
+	bcs	.L718
+	adrp	x24, .LANCHOR84
+	add	x24, x24, :lo12:.LANCHOR84
 	mov	w25, 65535
-.L685:
+.L723:
 	ldrh	w6, [x24]
 	mov	w0, w6
 	bl	zftl_get_gc_node.part.9
 	add	w6, w6, 1
 	strh	w6, [x24]
 	cmp	w25, w0, uxth
-	beq	.L681
+	beq	.L719
 	mov	w2, 0
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L682
+	cbz	w0, .L720
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w22, w23
-	bhi	.L682
-.L683:
-	adrp	x0, .LANCHOR80
-	adrp	x1, .LANCHOR61
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
-	ldrh	w2, [x1, #:lo12:.LANCHOR61]
+	bhi	.L720
+.L721:
+	adrp	x0, .LANCHOR83
+	adrp	x1, .LANCHOR62
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	ldrh	w2, [x1, #:lo12:.LANCHOR62]
 	cmp	w2, w0, lsr 1
-	bls	.L680
+	bls	.L718
 	sub	w0, w2, w0, lsr 3
-	b	.L760
-.L668:
-	strh	wzr, [x24, #:lo12:.LANCHOR77]
-	b	.L670
-.L666:
+	b	.L798
+.L706:
+	strh	wzr, [x24, #:lo12:.LANCHOR80]
+	b	.L708
+.L704:
 	strh	wzr, [x7]
-	b	.L670
-.L669:
+	b	.L708
+.L707:
 	add	w25, w25, 1
 	and	w25, w25, 65535
-	b	.L665
-.L674:
+	b	.L703
+.L712:
 	strh	wzr, [x24]
-	b	.L677
-.L676:
+	b	.L715
+.L714:
 	add	w28, w28, 1
 	and	w28, w28, 65535
-	b	.L673
-.L679:
-	ldrh	w1, [x25, #:lo12:.LANCHOR79]
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	b	.L711
+.L717:
+	ldrh	w1, [x25, #:lo12:.LANCHOR82]
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
 	cmp	w1, w0
-	bls	.L672
+	bls	.L710
 	sub	w0, w1, w0, lsr 3
-	strh	w0, [x25, #:lo12:.LANCHOR79]
-	b	.L672
-.L681:
+	strh	w0, [x25, #:lo12:.LANCHOR82]
+	b	.L710
+.L719:
 	strh	wzr, [x24]
-.L684:
+.L722:
 	cmp	w23, w22
-	bcs	.L683
-	adrp	x1, .LANCHOR61
-	adrp	x0, .LANCHOR80
-	ldrh	w2, [x1, #:lo12:.LANCHOR61]
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	bcs	.L721
+	adrp	x1, .LANCHOR62
+	adrp	x0, .LANCHOR83
+	ldrh	w2, [x1, #:lo12:.LANCHOR62]
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
 	cmp	w2, w0
-	bcs	.L680
+	bcs	.L718
 	add	w0, w2, w0, lsr 3
-.L760:
-	strh	w0, [x1, #:lo12:.LANCHOR61]
-.L680:
+.L798:
+	strh	w0, [x1, #:lo12:.LANCHOR62]
+.L718:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L707
+	tbz	x0, 8, .L745
 	ldr	w2, [x29, 112]
-	adrp	x0, .LC48
+	adrp	x0, .LC49
 	mov	w4, w20
 	mov	w3, w23
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC48
+	add	x0, x0, :lo12:.LC49
 	bl	printf
-.L707:
+.L745:
 	mov	w0, w23
-	b	.L661
-.L682:
+	b	.L699
+.L720:
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	cmp	w22, w19
-	bne	.L685
-	b	.L684
-.L664:
-	adrp	x0, .LANCHOR62+318
-	strh	wzr, [x0, #:lo12:.LANCHOR62+318]
-	adrp	x0, .LANCHOR82
-	strh	wzr, [x0, #:lo12:.LANCHOR82]
+	bne	.L723
+	b	.L722
+.L702:
+	adrp	x0, .LANCHOR63+318
+	strh	wzr, [x0, #:lo12:.LANCHOR63+318]
+	adrp	x0, .LANCHOR85
+	strh	wzr, [x0, #:lo12:.LANCHOR85]
 	ldr	w0, [x29, 112]
 	and	w0, w0, 1
 	str	w0, [x29, 104]
 	ldr	x0, [x29, 112]
-	tbz	x0, 0, .L710
-	adrp	x1, .LANCHOR84
-	adrp	x25, .LANCHOR83
+	tbz	x0, 0, .L748
+	adrp	x1, .LANCHOR87
+	adrp	x25, .LANCHOR86
 	str	x1, [x29, 96]
-	adrp	x26, .LANCHOR85
-	ldrh	w0, [x25, #:lo12:.LANCHOR83]
-	ldrh	w2, [x1, #:lo12:.LANCHOR84]
+	adrp	x26, .LANCHOR88
+	ldrh	w0, [x25, #:lo12:.LANCHOR86]
+	ldrh	w2, [x1, #:lo12:.LANCHOR87]
 	cmp	w0, w2, lsr 2
-	bcc	.L687
-	ldrh	w1, [x26, #:lo12:.LANCHOR85]
+	bcc	.L725
+	ldrh	w1, [x26, #:lo12:.LANCHOR88]
 	cmp	w1, w0
-	bls	.L711
-.L687:
-	ldrh	w0, [x26, #:lo12:.LANCHOR85]
-	adrp	x22, .LANCHOR81
+	bls	.L749
+.L725:
+	ldrh	w0, [x26, #:lo12:.LANCHOR88]
+	adrp	x22, .LANCHOR84
 	lsr	w0, w0, 2
-	strh	w0, [x22, #:lo12:.LANCHOR81]
+	strh	w0, [x22, #:lo12:.LANCHOR84]
 	mov	w0, 0
 	bl	zftl_get_gc_node.part.9
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L713
+	beq	.L751
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x3, [x2, #:lo12:.LANCHOR9]
-	adrp	x2, .LANCHOR80
-	ldrh	w2, [x2, #:lo12:.LANCHOR80]
+	adrp	x2, .LANCHOR83
+	ldrh	w2, [x2, #:lo12:.LANCHOR83]
 	ldrh	w1, [x3, x1]
 	cmp	w1, w2, lsr 2
-	bcs	.L713
-	strh	wzr, [x22, #:lo12:.LANCHOR81]
+	bcs	.L751
+	strh	wzr, [x22, #:lo12:.LANCHOR84]
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
 	cmp	w0, 0
 	cset	w23, ne
-.L689:
-	add	x22, x22, :lo12:.LANCHOR81
+.L727:
+	add	x22, x22, :lo12:.LANCHOR84
 	and	w28, w20, 65535
 	mov	w24, 64
 	mov	w27, 65535
-.L691:
+.L729:
 	ldrh	w6, [x22]
 	mov	w0, w6
 	bl	zftl_get_gc_node.part.9
 	add	w6, w6, 1
 	strh	w6, [x22]
 	cmp	w27, w0, uxth
-	beq	.L688
+	beq	.L726
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L690
+	cbz	w0, .L728
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w23, w28
-	bcs	.L688
-.L690:
+	bcs	.L726
+.L728:
 	sub	w24, w24, #1
 	ands	w24, w24, 65535
-	bne	.L691
-.L688:
+	bne	.L729
+.L726:
 	ldr	x0, [x29, 96]
-	ldrh	w1, [x25, #:lo12:.LANCHOR83]
-	ldrh	w0, [x0, #:lo12:.LANCHOR84]
+	ldrh	w1, [x25, #:lo12:.LANCHOR86]
+	ldrh	w0, [x0, #:lo12:.LANCHOR87]
 	cmp	w1, w0, lsr 3
-	bhi	.L708
-	ldrh	w0, [x26, #:lo12:.LANCHOR85]
+	bhi	.L746
+	ldrh	w0, [x26, #:lo12:.LANCHOR88]
 	add	w0, w0, 8
 	cmp	w1, w0
-	ble	.L686
-.L708:
-	adrp	x24, .LANCHOR77
+	ble	.L724
+.L746:
+	adrp	x24, .LANCHOR80
 	and	w26, w20, 65535
 	mov	w22, 64
 	mov	w25, 65535
-	strh	wzr, [x24, #:lo12:.LANCHOR77]
-	add	x24, x24, :lo12:.LANCHOR77
-.L693:
+	strh	wzr, [x24, #:lo12:.LANCHOR80]
+	add	x24, x24, :lo12:.LANCHOR80
+.L731:
 	ldrh	w6, [x24]
 	mov	w1, 3
 	mov	w0, w6
@@ -3872,31 +4068,31 @@ gc_search_src_blk:
 	add	w6, w6, 1
 	strh	w6, [x24]
 	cmp	w25, w0, uxth
-	beq	.L686
+	beq	.L724
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L692
+	cbz	w0, .L730
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w23, w26
-	bcs	.L686
-.L692:
+	bcs	.L724
+.L730:
 	sub	w22, w22, #1
 	ands	w22, w22, 65535
-	bne	.L693
-.L686:
+	bne	.L731
+.L724:
 	ldr	x0, [x29, 112]
-	tbz	x0, 1, .L694
-	adrp	x24, .LANCHOR78
-	adrp	x28, .LANCHOR86
-	adrp	x25, .LANCHOR73
-	add	x26, x24, :lo12:.LANCHOR78
-	add	x27, x28, :lo12:.LANCHOR86
-	add	x25, x25, :lo12:.LANCHOR73
-	strh	wzr, [x24, #:lo12:.LANCHOR78]
+	tbz	x0, 1, .L732
+	adrp	x24, .LANCHOR81
+	adrp	x28, .LANCHOR89
+	adrp	x25, .LANCHOR76
+	add	x26, x24, :lo12:.LANCHOR81
+	add	x27, x28, :lo12:.LANCHOR89
+	add	x25, x25, :lo12:.LANCHOR76
+	strh	wzr, [x24, #:lo12:.LANCHOR81]
 	mov	w22, 64
-.L699:
+.L737:
 	ldrh	w6, [x26]
 	mov	w1, 5
 	mov	w0, w6
@@ -3906,159 +4102,159 @@ gc_search_src_blk:
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L695
+	beq	.L733
 	cmp	w20, 1
-	bne	.L696
-	adrp	x3, .LANCHOR72
+	bne	.L734
+	adrp	x3, .LANCHOR75
 	ldrb	w2, [x25]
-	ldrh	w3, [x3, #:lo12:.LANCHOR72]
+	ldrh	w3, [x3, #:lo12:.LANCHOR75]
 	mul	w3, w2, w3
-	adrp	x2, .LANCHOR80
-	ldrh	w2, [x2, #:lo12:.LANCHOR80]
+	adrp	x2, .LANCHOR83
+	ldrh	w2, [x2, #:lo12:.LANCHOR83]
 	sub	w2, w3, w2, lsr 3
 	strh	w2, [x27]
-.L696:
+.L734:
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x1]
 	ldrh	w1, [x27]
 	cmp	w2, w1
-	bcs	.L697
+	bcs	.L735
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L698
+	cbz	w0, .L736
 	add	w5, w23, 1
 	add	w19, w19, 1
 	and	w23, w5, 65535
 	and	w19, w19, 65535
 	cmp	w23, w20
-	bcc	.L698
-.L695:
+	bcc	.L736
+.L733:
 	cmp	w23, w20
-	adrp	x0, .LANCHOR80
-	adrp	x3, .LANCHOR73
-	bcc	.L700
-	cbnz	w19, .L701
-	adrp	x1, .LANCHOR87
-	ldrh	w2, [x1, #:lo12:.LANCHOR87]
-	adrp	x1, .LANCHOR88
-	ldrh	w1, [x1, #:lo12:.LANCHOR88]
+	adrp	x0, .LANCHOR83
+	adrp	x3, .LANCHOR76
+	bcc	.L738
+	cbnz	w19, .L739
+	adrp	x1, .LANCHOR90
+	ldrh	w2, [x1, #:lo12:.LANCHOR90]
+	adrp	x1, .LANCHOR91
+	ldrh	w1, [x1, #:lo12:.LANCHOR91]
 	cmp	w2, w1
-	bls	.L701
-.L700:
-	ldrh	w2, [x0, #:lo12:.LANCHOR80]
-	adrp	x0, .LANCHOR72
-	ldrb	w3, [x3, #:lo12:.LANCHOR73]
-	ldrh	w0, [x0, #:lo12:.LANCHOR72]
-	ldrh	w1, [x28, #:lo12:.LANCHOR86]
+	bls	.L739
+.L738:
+	ldrh	w2, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR75
+	ldrb	w3, [x3, #:lo12:.LANCHOR76]
+	ldrh	w0, [x0, #:lo12:.LANCHOR75]
+	ldrh	w1, [x28, #:lo12:.LANCHOR89]
 	lsr	w2, w2, 3
 	mul	w0, w0, w3
 	sub	w0, w0, w2
 	cmp	w1, w0
-	bge	.L694
+	bge	.L732
 	add	w1, w1, w2
-	strh	w1, [x28, #:lo12:.LANCHOR86]
-.L694:
+	strh	w1, [x28, #:lo12:.LANCHOR89]
+.L732:
 	ldr	w0, [x29, 104]
-	cbz	w0, .L680
-	adrp	x25, .LANCHOR77
-	adrp	x22, .LANCHOR89
-	adrp	x26, .LANCHOR84
-	adrp	x27, .LANCHOR83
-	add	x28, x22, :lo12:.LANCHOR89
-	add	x26, x26, :lo12:.LANCHOR84
-	add	x27, x27, :lo12:.LANCHOR83
-	strh	wzr, [x25, #:lo12:.LANCHOR77]
+	cbz	w0, .L718
+	adrp	x25, .LANCHOR80
+	adrp	x22, .LANCHOR92
+	adrp	x26, .LANCHOR87
+	adrp	x27, .LANCHOR86
+	add	x28, x22, :lo12:.LANCHOR92
+	add	x26, x26, :lo12:.LANCHOR87
+	add	x27, x27, :lo12:.LANCHOR86
+	strh	wzr, [x25, #:lo12:.LANCHOR80]
 	mov	w24, 64
-.L705:
-	ldrh	w6, [x25, #:lo12:.LANCHOR77]
+.L743:
+	ldrh	w6, [x25, #:lo12:.LANCHOR80]
 	mov	w1, 3
 	mov	w0, w6
 	bl	zftl_get_gc_node
 	add	w6, w6, 1
-	strh	w6, [x25, #:lo12:.LANCHOR77]
+	strh	w6, [x25, #:lo12:.LANCHOR80]
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L702
+	beq	.L740
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w1, [x2, x1]
 	ldrh	w2, [x28]
 	cmp	w2, w1
-	bls	.L703
+	bls	.L741
 	cmp	w1, 2
-	bls	.L703
+	bls	.L741
 	ldrh	w2, [x26]
 	ldrh	w1, [x27]
 	cmp	w1, w2, lsr 1
-	bls	.L702
-.L703:
+	bls	.L740
+.L741:
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L704
+	cbz	w0, .L742
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w23, w20
-	bcs	.L702
-.L704:
+	bcs	.L740
+.L742:
 	sub	w24, w24, #1
 	ands	w24, w24, 65535
-	bne	.L705
-.L702:
+	bne	.L743
+.L740:
 	cmp	w23, w20
-	adrp	x0, .LANCHOR80
-	bcs	.L706
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
-	ldrh	w1, [x22, #:lo12:.LANCHOR89]
+	adrp	x0, .LANCHOR83
+	bcs	.L744
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	ldrh	w1, [x22, #:lo12:.LANCHOR92]
 	cmp	w1, w0, lsr 1
-	bls	.L680
+	bls	.L718
 	sub	w0, w1, w0, lsr 3
-	strh	w0, [x22, #:lo12:.LANCHOR89]
-	b	.L680
-.L713:
+	strh	w0, [x22, #:lo12:.LANCHOR92]
+	b	.L718
+.L751:
 	mov	w23, 0
-	b	.L689
-.L710:
+	b	.L727
+.L748:
 	mov	w23, 0
-	b	.L686
-.L697:
-	strh	wzr, [x24, #:lo12:.LANCHOR78]
-	b	.L695
-.L698:
+	b	.L724
+.L735:
+	strh	wzr, [x24, #:lo12:.LANCHOR81]
+	b	.L733
+.L736:
 	sub	w22, w22, #1
 	ands	w22, w22, 65535
-	bne	.L699
-	b	.L695
-.L701:
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
-	ldrb	w1, [x3, #:lo12:.LANCHOR73]
-	ldrh	w2, [x28, #:lo12:.LANCHOR86]
+	bne	.L737
+	b	.L733
+.L739:
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	ldrb	w1, [x3, #:lo12:.LANCHOR76]
+	ldrh	w2, [x28, #:lo12:.LANCHOR89]
 	mul	w1, w1, w0
 	cmp	w2, w1
-	ble	.L694
+	ble	.L732
 	sub	w0, w2, w0, lsr 3
-	strh	w0, [x28, #:lo12:.LANCHOR86]
-	b	.L694
-.L706:
-	ldrh	w1, [x0, #:lo12:.LANCHOR80]
-	adrp	x0, .LANCHOR73
-	ldrh	w2, [x22, #:lo12:.LANCHOR89]
-	ldrb	w0, [x0, #:lo12:.LANCHOR73]
+	strh	w0, [x28, #:lo12:.LANCHOR89]
+	b	.L732
+.L744:
+	ldrh	w1, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR76
+	ldrh	w2, [x22, #:lo12:.LANCHOR92]
+	ldrb	w0, [x0, #:lo12:.LANCHOR76]
 	mul	w0, w0, w1
 	sub	w0, w0, #32
 	cmp	w2, w0
-	bge	.L680
+	bge	.L718
 	add	w1, w2, w1, lsr 3
-	strh	w1, [x22, #:lo12:.LANCHOR89]
-	b	.L680
-.L711:
+	strh	w1, [x22, #:lo12:.LANCHOR92]
+	b	.L718
+.L749:
 	mov	w23, 0
-	b	.L688
+	b	.L726
 	.size	gc_search_src_blk, .-gc_search_src_blk
 	.section	.text.zftl_insert_free_list,"ax",@progbits
 	.align	2
@@ -4071,27 +4267,27 @@ zftl_insert_free_list:
 	add	x0, x0, x1, uxth 2
 	ldrb	w0, [x0, 2]
 	ands	w0, w0, 24
-	bne	.L762
-	adrp	x2, .LANCHOR90
-	adrp	x0, .LANCHOR91
-	add	x2, x2, :lo12:.LANCHOR90
-	add	x0, x0, :lo12:.LANCHOR91
-.L764:
+	bne	.L800
+	adrp	x2, .LANCHOR93
+	adrp	x0, .LANCHOR94
+	add	x2, x2, :lo12:.LANCHOR93
+	add	x0, x0, :lo12:.LANCHOR94
+.L802:
 	b	_insert_free_list
-.L762:
+.L800:
 	cmp	w0, 16
-	bne	.L763
-	adrp	x2, .LANCHOR92
-	adrp	x0, .LANCHOR93
-	add	x2, x2, :lo12:.LANCHOR92
-	add	x0, x0, :lo12:.LANCHOR93
-	b	.L764
-.L763:
-	adrp	x2, .LANCHOR94
-	adrp	x0, .LANCHOR95
-	add	x2, x2, :lo12:.LANCHOR94
-	add	x0, x0, :lo12:.LANCHOR95
-	b	.L764
+	bne	.L801
+	adrp	x2, .LANCHOR95
+	adrp	x0, .LANCHOR96
+	add	x2, x2, :lo12:.LANCHOR95
+	add	x0, x0, :lo12:.LANCHOR96
+	b	.L802
+.L801:
+	adrp	x2, .LANCHOR97
+	adrp	x0, .LANCHOR98
+	add	x2, x2, :lo12:.LANCHOR97
+	add	x0, x0, :lo12:.LANCHOR98
+	b	.L802
 	.size	zftl_insert_free_list, .-zftl_insert_free_list
 	.section	.text.zftl_insert_data_list,"ax",@progbits
 	.align	2
@@ -4105,30 +4301,30 @@ zftl_insert_data_list:
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L766
-	adrp	x2, .LANCHOR85
+	bne	.L804
+	adrp	x2, .LANCHOR88
 	adrp	x0, .LANCHOR12
-	add	x2, x2, :lo12:.LANCHOR85
+	add	x2, x2, :lo12:.LANCHOR88
 	add	x0, x0, :lo12:.LANCHOR12
-.L769:
+.L807:
 	b	_insert_data_list
-.L766:
+.L804:
 	cmp	w2, 96
-	bne	.L767
-	adrp	x2, .LANCHOR83
-	adrp	x0, .LANCHOR76
-	add	x2, x2, :lo12:.LANCHOR83
-	add	x0, x0, :lo12:.LANCHOR76
-	b	.L769
-.L767:
+	bne	.L805
+	adrp	x2, .LANCHOR86
+	adrp	x0, .LANCHOR79
+	add	x2, x2, :lo12:.LANCHOR86
+	add	x0, x0, :lo12:.LANCHOR79
+	b	.L807
+.L805:
 	cmp	w2, 160
-	bne	.L765
-	adrp	x2, .LANCHOR87
-	adrp	x0, .LANCHOR75
-	add	x2, x2, :lo12:.LANCHOR87
-	add	x0, x0, :lo12:.LANCHOR75
-	b	.L769
-.L765:
+	bne	.L803
+	adrp	x2, .LANCHOR90
+	adrp	x0, .LANCHOR78
+	add	x2, x2, :lo12:.LANCHOR90
+	add	x0, x0, :lo12:.LANCHOR78
+	b	.L807
+.L803:
 	ret
 	.size	zftl_insert_data_list, .-zftl_insert_data_list
 	.section	.text.zftl_gc_get_free_sblk,"ax",@progbits
@@ -4147,55 +4343,55 @@ zftl_gc_get_free_sblk:
 	ldrh	w19, [x0, 588]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L771
-	cbnz	w21, .L771
+	beq	.L809
+	cbnz	w21, .L809
 	mov	w1, w19
-	adrp	x0, .LC49
-	add	x0, x0, :lo12:.LC49
+	adrp	x0, .LC50
+	add	x0, x0, :lo12:.LC50
 	bl	printf
 	ldr	x0, [x20, #:lo12:.LANCHOR10]
 	mov	w1, -1
 	strh	w1, [x0, 588]
-.L772:
+.L810:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L771:
-	adrp	x2, .LANCHOR92
-	adrp	x20, .LANCHOR94
-	ldrh	w0, [x2, #:lo12:.LANCHOR92]
-	ldrh	w1, [x20, #:lo12:.LANCHOR94]
+.L809:
+	adrp	x2, .LANCHOR95
+	adrp	x20, .LANCHOR97
+	ldrh	w0, [x2, #:lo12:.LANCHOR95]
+	ldrh	w1, [x20, #:lo12:.LANCHOR97]
 	cmp	w0, w1
-	bls	.L773
+	bls	.L811
 	lsr	w1, w0, 3
 	cmp	w21, 0
-	adrp	x0, .LANCHOR93
+	adrp	x0, .LANCHOR96
 	csel	w1, w1, wzr, ne
-	add	x2, x2, :lo12:.LANCHOR92
-	add	x0, x0, :lo12:.LANCHOR93
-.L787:
+	add	x2, x2, :lo12:.LANCHOR95
+	add	x0, x0, :lo12:.LANCHOR96
+.L825:
 	bl	_list_pop_index_node
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	bne	.L778
-	adrp	x0, .LANCHOR90
-	ldrh	w5, [x20, #:lo12:.LANCHOR94]
+	bne	.L816
+	adrp	x0, .LANCHOR93
+	ldrh	w5, [x20, #:lo12:.LANCHOR97]
 	mov	w2, w22
 	mov	w1, w19
-	ldrh	w4, [x0, #:lo12:.LANCHOR90]
-	adrp	x0, .LANCHOR91
-	ldr	x3, [x0, #:lo12:.LANCHOR91]
-	adrp	x0, .LC50
-	add	x0, x0, :lo12:.LC50
+	ldrh	w4, [x0, #:lo12:.LANCHOR93]
+	adrp	x0, .LANCHOR94
+	ldr	x3, [x0, #:lo12:.LANCHOR94]
+	adrp	x0, .LC51
+	add	x0, x0, :lo12:.LC51
 	bl	printf
-.L778:
-	cbz	w21, .L772
+.L816:
+	cbz	w21, .L810
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L772
+	tbz	x0, 8, .L810
 	adrp	x4, .LANCHOR9
 	adrp	x1, .LANCHOR7
 	uxtw	x3, w19
@@ -4209,26 +4405,26 @@ zftl_gc_get_free_sblk:
 	ldrh	w5, [x1, x0]
 	ubfx	x4, x4, 11, 8
 	mov	w1, w19
-	adrp	x0, .LC51
+	adrp	x0, .LC52
 	ubfx	x3, x2, 3, 2
 	and	w5, w5, 2047
 	ubfx	x2, x2, 5, 3
-	add	x0, x0, :lo12:.LC51
+	add	x0, x0, :lo12:.LC52
 	bl	printf
-	b	.L772
-.L773:
-	cbnz	w21, .L776
+	b	.L810
+.L811:
+	cbnz	w21, .L814
 	lsr	w1, w1, 2
-.L777:
-	adrp	x0, .LANCHOR95
-	add	x2, x20, :lo12:.LANCHOR94
-	add	x0, x0, :lo12:.LANCHOR95
-	b	.L787
-.L776:
+.L815:
+	adrp	x0, .LANCHOR98
+	add	x2, x20, :lo12:.LANCHOR97
+	add	x0, x0, :lo12:.LANCHOR98
+	b	.L825
+.L814:
 	mov	w1, 7
 	mul	w1, w0, w1
 	lsr	w1, w1, 3
-	b	.L777
+	b	.L815
 	.size	zftl_gc_get_free_sblk, .-zftl_gc_get_free_sblk
 	.section	.text.zftl_get_free_sblk,"ax",@progbits
 	.align	2
@@ -4241,99 +4437,99 @@ zftl_get_free_sblk:
 	and	w20, w1, 65535
 	str	x21, [sp, 32]
 	cmp	w20, 5
-	bne	.L789
-	adrp	x2, .LANCHOR92
-	adrp	x0, .LANCHOR94
-	ldrh	w3, [x2, #:lo12:.LANCHOR92]
-	ldrh	w1, [x0, #:lo12:.LANCHOR94]
+	bne	.L827
+	adrp	x2, .LANCHOR95
+	adrp	x0, .LANCHOR97
+	ldrh	w3, [x2, #:lo12:.LANCHOR95]
+	ldrh	w1, [x0, #:lo12:.LANCHOR97]
 	cmp	w3, w1
-	bcc	.L790
-	adrp	x4, .LANCHOR90
-	ldrh	w4, [x4, #:lo12:.LANCHOR90]
+	bcc	.L828
+	adrp	x4, .LANCHOR93
+	ldrh	w4, [x4, #:lo12:.LANCHOR93]
 	cmp	w4, w3
-	bls	.L791
-	cbz	w1, .L791
-.L790:
-	add	x2, x0, :lo12:.LANCHOR94
+	bls	.L829
+	cbz	w1, .L829
+.L828:
+	add	x2, x0, :lo12:.LANCHOR97
 	lsr	w1, w1, 1
-.L810:
-	adrp	x0, .LANCHOR95
-	add	x0, x0, :lo12:.LANCHOR95
-	b	.L809
-.L791:
-	adrp	x0, .LANCHOR93
-	add	x2, x2, :lo12:.LANCHOR92
-	add	x0, x0, :lo12:.LANCHOR93
+.L848:
+	adrp	x0, .LANCHOR98
+	add	x0, x0, :lo12:.LANCHOR98
+	b	.L847
+.L829:
+	adrp	x0, .LANCHOR96
+	add	x2, x2, :lo12:.LANCHOR95
+	add	x0, x0, :lo12:.LANCHOR96
 	mov	w1, 0
-.L809:
+.L847:
 	bl	_list_pop_index_node
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	bne	.L794
-	adrp	x0, .LANCHOR94
+	bne	.L832
+	adrp	x0, .LANCHOR97
 	mov	w2, w20
 	mov	w1, w19
-	ldrh	w5, [x0, #:lo12:.LANCHOR94]
-	adrp	x0, .LANCHOR90
-	ldrh	w4, [x0, #:lo12:.LANCHOR90]
-	adrp	x0, .LANCHOR91
-	ldr	x3, [x0, #:lo12:.LANCHOR91]
-	adrp	x0, .LC50
-	add	x0, x0, :lo12:.LC50
+	ldrh	w5, [x0, #:lo12:.LANCHOR97]
+	adrp	x0, .LANCHOR93
+	ldrh	w4, [x0, #:lo12:.LANCHOR93]
+	adrp	x0, .LANCHOR94
+	ldr	x3, [x0, #:lo12:.LANCHOR94]
+	adrp	x0, .LC51
+	add	x0, x0, :lo12:.LC51
 	bl	printf
-	b	.L794
-.L789:
+	b	.L832
+.L827:
 	adrp	x21, .LANCHOR10
 	and	w0, w0, 65535
 	ldr	x1, [x21, #:lo12:.LANCHOR10]
 	ldrh	w19, [x1, 590]
 	mov	w1, 65535
 	cmp	w19, w1
-	beq	.L793
+	beq	.L831
 	cmp	w20, 1
-	beq	.L793
+	beq	.L831
 	mov	w1, w19
-	adrp	x0, .LC52
-	add	x0, x0, :lo12:.LC52
+	adrp	x0, .LC53
+	add	x0, x0, :lo12:.LC53
 	bl	printf
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	mov	w1, -1
 	strh	w1, [x0, 590]
-.L794:
+.L832:
 	mov	w0, w19
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L793:
-	adrp	x2, .LANCHOR90
-	adrp	x4, .LANCHOR94
-	ldrh	w1, [x2, #:lo12:.LANCHOR90]
-	ldrh	w3, [x4, #:lo12:.LANCHOR94]
+.L831:
+	adrp	x2, .LANCHOR93
+	adrp	x4, .LANCHOR97
+	ldrh	w1, [x2, #:lo12:.LANCHOR93]
+	ldrh	w3, [x4, #:lo12:.LANCHOR97]
 	cmp	w1, w3
-	bcc	.L795
-	adrp	x5, .LANCHOR92
-	ldrh	w5, [x5, #:lo12:.LANCHOR92]
+	bcc	.L833
+	adrp	x5, .LANCHOR95
+	ldrh	w5, [x5, #:lo12:.LANCHOR95]
 	cmp	w5, w1
-	bls	.L796
-	cbz	w3, .L796
-.L795:
+	bls	.L834
+	cbz	w3, .L834
+.L833:
 	cmp	w20, 1
 	lsr	w3, w3, 1
 	csel	w0, w3, w0, eq
-	add	x2, x4, :lo12:.LANCHOR94
+	add	x2, x4, :lo12:.LANCHOR97
 	mov	w1, w0
-	b	.L810
-.L796:
+	b	.L848
+.L834:
 	lsr	w1, w1, 1
 	cmp	w20, 1
 	csel	w0, w1, w0, eq
-	add	x2, x2, :lo12:.LANCHOR90
+	add	x2, x2, :lo12:.LANCHOR93
 	mov	w1, w0
-	adrp	x0, .LANCHOR91
-	add	x0, x0, :lo12:.LANCHOR91
-	b	.L809
+	adrp	x0, .LANCHOR94
+	add	x0, x0, :lo12:.LANCHOR94
+	b	.L847
 	.size	zftl_get_free_sblk, .-zftl_get_free_sblk
 	.section	.text.zftl_remove_data_node,"ax",@progbits
 	.align	2
@@ -4347,30 +4543,30 @@ zftl_remove_data_node:
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L812
-	adrp	x2, .LANCHOR85
+	bne	.L850
+	adrp	x2, .LANCHOR88
 	adrp	x0, .LANCHOR12
-	add	x2, x2, :lo12:.LANCHOR85
+	add	x2, x2, :lo12:.LANCHOR88
 	add	x0, x0, :lo12:.LANCHOR12
-.L815:
+.L853:
 	b	_list_remove_node
-.L812:
+.L850:
 	cmp	w2, 96
-	bne	.L813
-	adrp	x2, .LANCHOR83
-	adrp	x0, .LANCHOR76
-	add	x2, x2, :lo12:.LANCHOR83
-	add	x0, x0, :lo12:.LANCHOR76
-	b	.L815
-.L813:
+	bne	.L851
+	adrp	x2, .LANCHOR86
+	adrp	x0, .LANCHOR79
+	add	x2, x2, :lo12:.LANCHOR86
+	add	x0, x0, :lo12:.LANCHOR79
+	b	.L853
+.L851:
 	cmp	w2, 160
-	bne	.L811
-	adrp	x2, .LANCHOR87
-	adrp	x0, .LANCHOR75
-	add	x2, x2, :lo12:.LANCHOR87
-	add	x0, x0, :lo12:.LANCHOR75
-	b	.L815
-.L811:
+	bne	.L849
+	adrp	x2, .LANCHOR90
+	adrp	x0, .LANCHOR78
+	add	x2, x2, :lo12:.LANCHOR90
+	add	x0, x0, :lo12:.LANCHOR78
+	b	.L853
+.L849:
 	ret
 	.size	zftl_remove_data_node, .-zftl_remove_data_node
 	.section	.text.zftl_remove_free_node,"ax",@progbits
@@ -4384,27 +4580,27 @@ zftl_remove_free_node:
 	add	x0, x0, x1, uxth 2
 	ldrb	w0, [x0, 2]
 	ands	w0, w0, 24
-	bne	.L817
-	adrp	x2, .LANCHOR90
-	adrp	x0, .LANCHOR91
-	add	x2, x2, :lo12:.LANCHOR90
-	add	x0, x0, :lo12:.LANCHOR91
-.L819:
+	bne	.L855
+	adrp	x2, .LANCHOR93
+	adrp	x0, .LANCHOR94
+	add	x2, x2, :lo12:.LANCHOR93
+	add	x0, x0, :lo12:.LANCHOR94
+.L857:
 	b	_list_remove_node
-.L817:
+.L855:
 	cmp	w0, 16
-	bne	.L818
-	adrp	x2, .LANCHOR92
-	adrp	x0, .LANCHOR93
-	add	x2, x2, :lo12:.LANCHOR92
-	add	x0, x0, :lo12:.LANCHOR93
-	b	.L819
-.L818:
-	adrp	x2, .LANCHOR94
-	adrp	x0, .LANCHOR95
-	add	x2, x2, :lo12:.LANCHOR94
-	add	x0, x0, :lo12:.LANCHOR95
-	b	.L819
+	bne	.L856
+	adrp	x2, .LANCHOR95
+	adrp	x0, .LANCHOR96
+	add	x2, x2, :lo12:.LANCHOR95
+	add	x0, x0, :lo12:.LANCHOR96
+	b	.L857
+.L856:
+	adrp	x2, .LANCHOR97
+	adrp	x0, .LANCHOR98
+	add	x2, x2, :lo12:.LANCHOR97
+	add	x0, x0, :lo12:.LANCHOR98
+	b	.L857
 	.size	zftl_remove_free_node, .-zftl_remove_free_node
 	.section	.text.zftl_list_update_data_list,"ax",@progbits
 	.align	2
@@ -4418,30 +4614,30 @@ zftl_list_update_data_list:
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L821
-	adrp	x2, .LANCHOR85
+	bne	.L859
+	adrp	x2, .LANCHOR88
 	adrp	x0, .LANCHOR12
-	add	x2, x2, :lo12:.LANCHOR85
+	add	x2, x2, :lo12:.LANCHOR88
 	add	x0, x0, :lo12:.LANCHOR12
-.L824:
+.L862:
 	b	_list_update_data_list
-.L821:
+.L859:
 	cmp	w2, 96
-	bne	.L822
-	adrp	x2, .LANCHOR83
-	adrp	x0, .LANCHOR76
-	add	x2, x2, :lo12:.LANCHOR83
-	add	x0, x0, :lo12:.LANCHOR76
-	b	.L824
-.L822:
+	bne	.L860
+	adrp	x2, .LANCHOR86
+	adrp	x0, .LANCHOR79
+	add	x2, x2, :lo12:.LANCHOR86
+	add	x0, x0, :lo12:.LANCHOR79
+	b	.L862
+.L860:
 	cmp	w2, 160
-	bne	.L820
-	adrp	x2, .LANCHOR87
-	adrp	x0, .LANCHOR75
-	add	x2, x2, :lo12:.LANCHOR87
-	add	x0, x0, :lo12:.LANCHOR75
-	b	.L824
-.L820:
+	bne	.L858
+	adrp	x2, .LANCHOR90
+	adrp	x0, .LANCHOR78
+	add	x2, x2, :lo12:.LANCHOR90
+	add	x0, x0, :lo12:.LANCHOR78
+	b	.L862
+.L858:
 	ret
 	.size	zftl_list_update_data_list, .-zftl_list_update_data_list
 	.section	.text.print_list_info,"ax",@progbits
@@ -4457,21 +4653,21 @@ print_list_info:
 	stp	x19, x20, [sp, 48]
 	mov	x19, x0
 	stp	x21, x22, [sp, 64]
-	adrp	x0, .LC53
+	adrp	x0, .LC54
 	stp	x23, x24, [sp, 80]
-	add	x0, x0, :lo12:.LC53
+	add	x0, x0, :lo12:.LC54
 	bl	printf
 	ldr	x19, [x19]
-	cbz	x19, .L825
+	cbz	x19, .L863
 	mov	x24, -6148914691236517206
-	adrp	x22, .LC54
-	adrp	x21, .LANCHOR96
-	add	x22, x22, :lo12:.LC54
-	add	x21, x21, :lo12:.LANCHOR96
+	adrp	x22, .LC55
+	adrp	x21, .LANCHOR99
+	add	x22, x22, :lo12:.LC55
+	add	x21, x21, :lo12:.LANCHOR99
 	mov	w20, 0
 	adrp	x23, .LANCHOR4
 	movk	x24, 0xaaab, lsl 0
-.L829:
+.L867:
 	ldr	x2, [x23, #:lo12:.LANCHOR4]
 	adrp	x1, .LANCHOR7
 	adrp	x8, .LANCHOR9
@@ -4504,7 +4700,7 @@ print_list_info:
 	ldrh	w19, [x19]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L825
+	beq	.L863
 	ldr	x0, [x23, #:lo12:.LANCHOR4]
 	mov	w1, 6
 	add	w20, w20, 1
@@ -4512,8 +4708,8 @@ print_list_info:
 	umaddl	x19, w19, w1, x0
 	ldrh	w0, [x21]
 	cmp	w0, w20
-	bcs	.L829
-.L825:
+	bcs	.L867
+.L863:
 	ldp	x19, x20, [sp, 48]
 	ldp	x21, x22, [sp, 64]
 	ldp	x23, x24, [sp, 80]
@@ -4527,37 +4723,37 @@ print_list_info:
 	.type	dump_all_list_info, %function
 dump_all_list_info:
 	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR90
-	adrp	x0, .LANCHOR91
-	add	x1, x1, :lo12:.LANCHOR90
+	adrp	x1, .LANCHOR93
+	adrp	x0, .LANCHOR94
+	add	x1, x1, :lo12:.LANCHOR93
 	add	x29, sp, 0
-	add	x0, x0, :lo12:.LANCHOR91
+	add	x0, x0, :lo12:.LANCHOR94
 	bl	print_list_info
-	adrp	x1, .LANCHOR92
-	adrp	x0, .LANCHOR93
-	add	x1, x1, :lo12:.LANCHOR92
-	add	x0, x0, :lo12:.LANCHOR93
+	adrp	x1, .LANCHOR95
+	adrp	x0, .LANCHOR96
+	add	x1, x1, :lo12:.LANCHOR95
+	add	x0, x0, :lo12:.LANCHOR96
 	bl	print_list_info
-	adrp	x1, .LANCHOR94
-	adrp	x0, .LANCHOR95
-	add	x1, x1, :lo12:.LANCHOR94
-	add	x0, x0, :lo12:.LANCHOR95
+	adrp	x1, .LANCHOR97
+	adrp	x0, .LANCHOR98
+	add	x1, x1, :lo12:.LANCHOR97
+	add	x0, x0, :lo12:.LANCHOR98
 	bl	print_list_info
-	adrp	x1, .LANCHOR85
+	adrp	x1, .LANCHOR88
 	adrp	x0, .LANCHOR12
-	add	x1, x1, :lo12:.LANCHOR85
+	add	x1, x1, :lo12:.LANCHOR88
 	add	x0, x0, :lo12:.LANCHOR12
 	bl	print_list_info
-	adrp	x1, .LANCHOR83
-	adrp	x0, .LANCHOR76
-	add	x1, x1, :lo12:.LANCHOR83
-	add	x0, x0, :lo12:.LANCHOR76
+	adrp	x1, .LANCHOR86
+	adrp	x0, .LANCHOR79
+	add	x1, x1, :lo12:.LANCHOR86
+	add	x0, x0, :lo12:.LANCHOR79
 	bl	print_list_info
 	ldp	x29, x30, [sp], 16
-	adrp	x1, .LANCHOR87
-	adrp	x0, .LANCHOR75
-	add	x1, x1, :lo12:.LANCHOR87
-	add	x0, x0, :lo12:.LANCHOR75
+	adrp	x1, .LANCHOR90
+	adrp	x0, .LANCHOR78
+	add	x1, x1, :lo12:.LANCHOR90
+	add	x0, x0, :lo12:.LANCHOR78
 	b	print_list_info
 	.size	dump_all_list_info, .-dump_all_list_info
 	.section	.text.ftl_tmp_into_update,"ax",@progbits
@@ -4565,40 +4761,40 @@ dump_all_list_info:
 	.global	ftl_tmp_into_update
 	.type	ftl_tmp_into_update, %function
 ftl_tmp_into_update:
-	adrp	x0, .LANCHOR97
-	ldr	x0, [x0, #:lo12:.LANCHOR97]
+	adrp	x0, .LANCHOR100
+	ldr	x0, [x0, #:lo12:.LANCHOR100]
 	ldr	w1, [x0, 16]
 	cmp	w1, 2048
-	bls	.L834
+	bls	.L872
 	ldr	w2, [x0, 20]
 	add	w2, w2, w1, lsr 11
 	and	w1, w1, 2047
 	stp	w1, w2, [x0, 16]
-.L834:
+.L872:
 	ldr	w1, [x0, 24]
 	cmp	w1, 2048
-	bls	.L835
+	bls	.L873
 	ldr	w2, [x0, 28]
 	add	w2, w2, w1, lsr 11
 	and	w1, w1, 2047
 	stp	w1, w2, [x0, 24]
-.L835:
+.L873:
 	ldr	w1, [x0, 32]
 	cmp	w1, 1024
-	bls	.L836
+	bls	.L874
 	ldr	w2, [x0, 36]
 	add	w2, w2, w1, lsr 10
 	and	w1, w1, 1023
 	stp	w1, w2, [x0, 32]
-.L836:
+.L874:
 	ldr	w1, [x0, 40]
 	cmp	w1, 1024
-	bls	.L833
+	bls	.L871
 	ldr	w2, [x0, 44]
 	add	w2, w2, w1, lsr 10
 	and	w1, w1, 1023
 	stp	w1, w2, [x0, 40]
-.L833:
+.L871:
 	ret
 	.size	ftl_tmp_into_update, .-ftl_tmp_into_update
 	.section	.text.ftl_get_blk_list_in_sblk,"ax",@progbits
@@ -4608,35 +4804,35 @@ ftl_tmp_into_update:
 ftl_get_blk_list_in_sblk:
 	adrp	x2, .LANCHOR7
 	and	w0, w0, 65535
-	adrp	x7, .LANCHOR99
-	add	x7, x7, :lo12:.LANCHOR99
+	adrp	x7, .LANCHOR102
+	add	x7, x7, :lo12:.LANCHOR102
 	ldr	x2, [x2, #:lo12:.LANCHOR7]
 	mov	w3, 0
 	mov	w13, 21
 	add	x2, x2, x0, uxth 2
 	ldrb	w12, [x2, 3]
-	adrp	x2, .LANCHOR73
-	ldrb	w10, [x2, #:lo12:.LANCHOR73]
-	adrp	x2, .LANCHOR98
-	ldrb	w6, [x2, #:lo12:.LANCHOR98]
+	adrp	x2, .LANCHOR76
+	ldrb	w10, [x2, #:lo12:.LANCHOR76]
+	adrp	x2, .LANCHOR101
+	ldrb	w6, [x2, #:lo12:.LANCHOR101]
 	and	w2, w6, 65535
 	mul	w0, w0, w2
 	sub	w2, w2, #1
 	sxth	w5, w2
 	and	w4, w0, 65535
 	mov	w0, 0
-.L839:
+.L877:
 	cmp	w3, w10
-	blt	.L843
+	blt	.L881
 	sxtw	x2, w0
 	mov	w3, -1
-.L844:
+.L882:
 	cmp	w10, w2
-	bgt	.L845
+	bgt	.L883
 	ret
-.L843:
+.L881:
 	asr	w2, w12, w3
-	tbnz	x2, 0, .L840
+	tbnz	x2, 0, .L878
 	sdiv	w2, w3, w6
 	ldrh	w8, [x7]
 	sbfiz	x11, x0, 1, 32
@@ -4645,21 +4841,21 @@ ftl_get_blk_list_in_sblk:
 	lsl	w2, w2, w8
 	add	w2, w4, w2
 	and	w2, w2, 65535
-	bhi	.L841
-.L846:
+	bhi	.L879
+.L884:
 	add	w0, w0, 1
 	strh	w2, [x1, x11]
-.L840:
+.L878:
 	add	w3, w3, 1
-	b	.L839
-.L841:
+	b	.L877
+.L879:
 	and	w8, w5, w3
 	add	w2, w2, w8
-	b	.L846
-.L845:
+	b	.L884
+.L883:
 	strh	w3, [x1, x2, lsl 1]
 	add	x2, x2, 1
-	b	.L844
+	b	.L882
 	.size	ftl_get_blk_list_in_sblk, .-ftl_get_blk_list_in_sblk
 	.section	.text.ftl_free_sblk,"ax",@progbits
 	.align	2
@@ -4678,14 +4874,14 @@ ftl_free_sblk:
 	mov	x19, x23
 	add	x20, x4, x21
 	ldrb	w0, [x20, 2]
-	tbz	x0, 3, .L849
-	adrp	x1, .LANCHOR97
+	tbz	x0, 3, .L887
+	adrp	x1, .LANCHOR100
 	ldrh	w2, [x4, x21]
-	adrp	x8, .LANCHOR100
-	ldr	x7, [x1, #:lo12:.LANCHOR97]
+	adrp	x8, .LANCHOR103
+	ldr	x7, [x1, #:lo12:.LANCHOR100]
 	and	w3, w2, 2047
 	ldr	w2, [x4, x21]
-	ldrh	w8, [x8, #:lo12:.LANCHOR100]
+	ldrh	w8, [x8, #:lo12:.LANCHOR103]
 	ldrh	w1, [x7, 74]
 	ubfx	x6, x2, 11, 8
 	adrp	x2, .LANCHOR8
@@ -4698,26 +4894,26 @@ ftl_free_sblk:
 	and	w1, w1, 65535
 	add	w7, w7, w1
 	cmp	w7, w8
-	ble	.L850
-	adrp	x1, .LANCHOR88
-	adrp	x7, .LANCHOR92
-	ldrh	w5, [x1, #:lo12:.LANCHOR88]
-	adrp	x1, .LANCHOR87
-	ldrh	w7, [x7, #:lo12:.LANCHOR92]
-	ldrh	w1, [x1, #:lo12:.LANCHOR87]
+	ble	.L888
+	adrp	x1, .LANCHOR91
+	adrp	x7, .LANCHOR95
+	ldrh	w5, [x1, #:lo12:.LANCHOR91]
+	adrp	x1, .LANCHOR90
+	ldrh	w7, [x7, #:lo12:.LANCHOR95]
+	ldrh	w1, [x1, #:lo12:.LANCHOR90]
 	add	w5, w5, 7
 	add	w1, w1, w7
 	cmp	w5, w1
-	blt	.L851
-.L866:
+	blt	.L889
+.L904:
 	mov	w1, 2
 	bfi	w0, w1, 3, 2
-.L864:
+.L902:
 	strb	w0, [x20, 2]
-.L852:
+.L890:
 	ldrb	w0, [x20, 2]
 	ands	w0, w0, 24
-	bne	.L856
+	bne	.L894
 	mul	w2, w6, w2
 	ldrh	w0, [x4, x21]
 	add	w2, w2, w2, lsl 1
@@ -4725,7 +4921,7 @@ ftl_free_sblk:
 	ubfx	x2, x2, 2, 9
 	bfi	w0, w2, 0, 11
 	strh	w0, [x4, x21]
-.L849:
+.L887:
 	mov	w0, w19
 	bl	zftl_remove_data_node
 	ldr	x0, [x22, #:lo12:.LANCHOR7]
@@ -4737,78 +4933,78 @@ ftl_free_sblk:
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x23, lsl 1]
 	ldrb	w0, [x20, 2]
-	tbz	x0, 3, .L858
+	tbz	x0, 3, .L896
 	adrp	x0, .LANCHOR10
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldrh	w1, [x0, 584]
 	cmp	w1, w19
-	bne	.L859
+	bne	.L897
 	mov	w1, -1
 	ldrh	w2, [x0, 588]
 	strh	w1, [x0, 584]
 	mov	w1, 65535
 	cmp	w2, w1
-	bne	.L858
+	bne	.L896
 	strh	w19, [x0, 588]
 	mov	w1, w19
-	adrp	x0, .LC55
-	add	x0, x0, :lo12:.LC55
-.L865:
+	adrp	x0, .LC56
+	add	x0, x0, :lo12:.LC56
+.L903:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	b	printf
-.L851:
-	adrp	x1, .LANCHOR101
-	adrp	x7, .LANCHOR90
-	ldrh	w5, [x1, #:lo12:.LANCHOR101]
-	adrp	x1, .LANCHOR85
-	ldrh	w7, [x7, #:lo12:.LANCHOR90]
-	ldrh	w1, [x1, #:lo12:.LANCHOR85]
+.L889:
+	adrp	x1, .LANCHOR104
+	adrp	x7, .LANCHOR93
+	ldrh	w5, [x1, #:lo12:.LANCHOR104]
+	adrp	x1, .LANCHOR88
+	ldrh	w7, [x7, #:lo12:.LANCHOR93]
+	ldrh	w1, [x1, #:lo12:.LANCHOR88]
 	add	w5, w5, 7
 	add	w1, w1, w7
-	adrp	x7, .LANCHOR83
-	ldrh	w7, [x7, #:lo12:.LANCHOR83]
+	adrp	x7, .LANCHOR86
+	ldrh	w7, [x7, #:lo12:.LANCHOR86]
 	add	w1, w1, w7
 	cmp	w5, w1
-	blt	.L866
-.L855:
+	blt	.L904
+.L893:
 	and	w0, w0, -25
-	b	.L864
-.L850:
+	b	.L902
+.L888:
 	madd	w1, w2, w1, w5
-	adrp	x5, .LANCHOR102
-	ldrh	w5, [x5, #:lo12:.LANCHOR102]
+	adrp	x5, .LANCHOR105
+	ldrh	w5, [x5, #:lo12:.LANCHOR105]
 	cmp	w1, w5
-	ble	.L852
-	adrp	x1, .LANCHOR101
-	adrp	x7, .LANCHOR90
-	ldrh	w5, [x1, #:lo12:.LANCHOR101]
-	adrp	x1, .LANCHOR85
-	ldrh	w7, [x7, #:lo12:.LANCHOR90]
-	ldrh	w1, [x1, #:lo12:.LANCHOR85]
+	ble	.L890
+	adrp	x1, .LANCHOR104
+	adrp	x7, .LANCHOR93
+	ldrh	w5, [x1, #:lo12:.LANCHOR104]
+	adrp	x1, .LANCHOR88
+	ldrh	w7, [x7, #:lo12:.LANCHOR93]
+	ldrh	w1, [x1, #:lo12:.LANCHOR88]
 	add	w5, w5, 7
 	add	w1, w1, w7
-	adrp	x7, .LANCHOR83
-	ldrh	w7, [x7, #:lo12:.LANCHOR83]
+	adrp	x7, .LANCHOR86
+	ldrh	w7, [x7, #:lo12:.LANCHOR86]
 	add	w1, w1, w7
 	cmp	w5, w1
-	bge	.L855
-	adrp	x1, .LANCHOR88
-	adrp	x7, .LANCHOR92
-	ldrh	w5, [x1, #:lo12:.LANCHOR88]
-	adrp	x1, .LANCHOR87
-	ldrh	w7, [x7, #:lo12:.LANCHOR92]
-	ldrh	w1, [x1, #:lo12:.LANCHOR87]
+	bge	.L893
+	adrp	x1, .LANCHOR91
+	adrp	x7, .LANCHOR95
+	ldrh	w5, [x1, #:lo12:.LANCHOR91]
+	adrp	x1, .LANCHOR90
+	ldrh	w7, [x7, #:lo12:.LANCHOR95]
+	ldrh	w1, [x1, #:lo12:.LANCHOR90]
 	add	w5, w5, 7
 	add	w1, w1, w7
 	cmp	w5, w1
-	blt	.L855
-	b	.L866
-.L856:
+	blt	.L893
+	b	.L904
+.L894:
 	cmp	w0, 16
-	bne	.L849
+	bne	.L887
 	sdiv	w2, w3, w2
 	ldr	w0, [x4, x21]
 	add	w2, w2, w2, lsl 1
@@ -4816,23 +5012,23 @@ ftl_free_sblk:
 	ubfx	x2, x2, 2, 6
 	bfi	w0, w2, 11, 8
 	str	w0, [x4, x21]
-	b	.L849
-.L859:
+	b	.L887
+.L897:
 	ldrh	w1, [x0, 586]
 	cmp	w1, w19
-	bne	.L858
+	bne	.L896
 	mov	w1, -1
 	ldrh	w2, [x0, 590]
 	strh	w1, [x0, 586]
 	mov	w1, 65535
 	cmp	w2, w1
-	bne	.L858
+	bne	.L896
 	strh	w19, [x0, 590]
 	mov	w1, w19
-	adrp	x0, .LC56
-	add	x0, x0, :lo12:.LC56
-	b	.L865
-.L858:
+	adrp	x0, .LC57
+	add	x0, x0, :lo12:.LC57
+	b	.L903
+.L896:
 	mov	w0, w19
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -4848,20 +5044,20 @@ gc_free_src_blk:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR62
+	adrp	x21, .LANCHOR63
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LC57
+	adrp	x22, .LC58
 	adrp	x23, .LANCHOR9
-	add	x21, x21, :lo12:.LANCHOR62
+	add	x21, x21, :lo12:.LANCHOR63
 	mov	x24, x23
-	add	x22, x22, :lo12:.LC57
+	add	x22, x22, :lo12:.LC58
 	stp	x19, x20, [sp, 16]
 	mov	w20, 0
 	stp	x25, x26, [sp, 64]
-.L868:
+.L906:
 	ldrh	w0, [x21, 56]
 	cmp	w0, w20
-	bhi	.L882
+	bhi	.L920
 	strh	wzr, [x21, 56]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -4869,18 +5065,18 @@ gc_free_src_blk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L882:
+.L920:
 	add	x0, x21, x20, sxtw 1
 	ldrh	w25, [x0, 58]
 	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	mov	x19, x25
 	lsl	x26, x25, 1
 	ldrh	w2, [x0, x26]
-	cbz	w2, .L869
+	cbz	w2, .L907
 	mov	w1, w25
 	mov	x0, x22
 	bl	printf
-.L869:
+.L907:
 	ldr	x0, [x24, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x26]
 	adrp	x0, .LANCHOR7
@@ -4888,95 +5084,95 @@ gc_free_src_blk:
 	add	x25, x0, x25, lsl 2
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L870
+	tbz	x0, 8, .L908
 	ldrb	w2, [x25, 2]
-	adrp	x0, .LC58
+	adrp	x0, .LC59
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC58
+	add	x0, x0, :lo12:.LC59
 	ubfx	x2, x2, 5, 3
 	bl	printf
-.L870:
+.L908:
 	ldrb	w0, [x25, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L871
+	beq	.L909
 	tst	w0, 192
-	bne	.L872
-.L871:
-	adrp	x1, .LANCHOR103
+	bne	.L910
+.L909:
+	adrp	x1, .LANCHOR106
 	adrp	x0, .LC0
-	mov	w2, 799
-	add	x1, x1, :lo12:.LANCHOR103
+	mov	w2, 884
+	add	x1, x1, :lo12:.LANCHOR106
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L872:
+.L910:
 	mov	w0, w19
 	bl	ftl_free_sblk
 	adrp	x0, .LANCHOR10
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldrh	w2, [x0, 124]
-	cbz	w2, .L873
+	cbz	w2, .L911
 	add	x3, x0, 392
 	mov	w1, 0
-.L875:
+.L913:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L874
+	bne	.L912
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 392]
 	strh	w2, [x0, 124]
-.L873:
+.L911:
 	ldrh	w2, [x0, 120]
-	cbz	w2, .L876
+	cbz	w2, .L914
 	add	x3, x0, 136
 	mov	w1, 0
-.L878:
+.L916:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L877
+	bne	.L915
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 136]
 	strh	w2, [x0, 120]
-.L876:
+.L914:
 	ldrh	w2, [x0, 122]
-	cbz	w2, .L879
+	cbz	w2, .L917
 	add	x3, x0, 264
 	mov	w1, 0
-.L881:
+.L919:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L880
+	bne	.L918
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 264]
 	strh	w2, [x0, 122]
-.L879:
+.L917:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L868
-.L874:
+	b	.L906
+.L912:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L875
-	b	.L873
-.L877:
+	bne	.L913
+	b	.L911
+.L915:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L878
-	b	.L876
-.L880:
+	bne	.L916
+	b	.L914
+.L918:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L881
-	b	.L879
+	bne	.L919
+	b	.L917
 	.size	gc_free_src_blk, .-gc_free_src_blk
 	.section	.text.ftl_erase_phy_blk,"ax",@progbits
 	.align	2
@@ -4988,29 +5184,32 @@ ftl_erase_phy_blk:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	mov	w21, w1
-	adrp	x1, .LANCHOR99
+	adrp	x1, .LANCHOR102
 	stp	x19, x20, [sp, 16]
 	mov	w19, 21
-	adrp	x22, .LANCHOR105
-	ldrh	w1, [x1, #:lo12:.LANCHOR99]
+	adrp	x22, .LANCHOR107
+	ldrh	w1, [x1, #:lo12:.LANCHOR102]
 	sub	w1, w19, w1
 	mov	w19, 1
 	lsl	w19, w19, w1
 	sub	w19, w19, #1
 	and	w19, w19, w0
 	asr	w20, w0, w1
-	adrp	x0, .LANCHOR104
+	adrp	x0, .LANCHOR70
 	sxth	w19, w19
-	ldrb	w0, [x0, #:lo12:.LANCHOR104]
-	cbz	w0, .L906
-	ldrh	w2, [x22, #:lo12:.LANCHOR105]
+	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	cbz	w0, .L944
+	adrp	x0, .LANCHOR71
+	ldrb	w0, [x0, #:lo12:.LANCHOR71]
+	cbnz	w0, .L944
+	ldrh	w2, [x22, #:lo12:.LANCHOR107]
 	cmp	w21, 0
 	cset	w1, eq
 	mov	w0, w20
 	mul	w2, w2, w19
 	bl	flash_erase_block_en
-.L906:
-	ldrh	w2, [x22, #:lo12:.LANCHOR105]
+.L944:
+	ldrh	w2, [x22, #:lo12:.LANCHOR107]
 	mov	w1, w21
 	mov	w0, w20
 	ldp	x21, x22, [sp, 32]
@@ -5031,56 +5230,56 @@ ftl_erase_sblk:
 	stp	x25, x26, [sp, 64]
 	and	w26, w0, 65535
 	ldr	x0, [x23, #:lo12:.LANCHOR7]
-	adrp	x25, .LANCHOR106
+	adrp	x25, .LANCHOR108
 	stp	x21, x22, [sp, 32]
 	ubfiz	x22, x26, 2, 16
 	add	x0, x0, x22
 	stp	x27, x28, [sp, 80]
 	stp	x19, x20, [sp, 16]
-	adrp	x24, .LANCHOR98
+	adrp	x24, .LANCHOR101
 	mov	w20, w1
-	add	x25, x25, :lo12:.LANCHOR106
+	add	x25, x25, :lo12:.LANCHOR108
 	ldrb	w28, [x0, 3]
-	add	x24, x24, :lo12:.LANCHOR98
+	add	x24, x24, :lo12:.LANCHOR101
 	add	x27, x29, 112
 	mov	w19, 0
-.L912:
+.L950:
 	ldrb	w0, [x25]
 	cmp	w19, w0
-	bge	.L923
+	bge	.L961
 	ldrb	w1, [x24]
-	adrp	x0, .LANCHOR105
+	adrp	x0, .LANCHOR107
 	mov	w21, 0
-	ldrh	w3, [x0, #:lo12:.LANCHOR105]
+	ldrh	w3, [x0, #:lo12:.LANCHOR107]
 	sub	w4, w1, #1
 	mov	w0, 0
 	mul	w6, w19, w1
 	mul	w5, w26, w1
-	b	.L924
-.L914:
+	b	.L962
+.L952:
 	add	w2, w0, w6
 	asr	w2, w28, w2
-	tbnz	x2, 0, .L913
+	tbnz	x2, 0, .L951
 	and	w2, w0, w4
 	add	w2, w2, w5
 	mul	w2, w2, w3
 	str	w2, [x27, w21, sxtw 2]
 	add	w21, w21, 1
-.L913:
+.L951:
 	add	w0, w0, 1
-.L924:
+.L962:
 	cmp	w0, w1
-	blt	.L914
+	blt	.L952
 	cmp	w1, 4
-	bne	.L915
+	bne	.L953
 	mov	x3, 0
-.L916:
+.L954:
 	cmp	w21, w3
-	bgt	.L917
-.L918:
+	bgt	.L955
+.L956:
 	add	w19, w19, 1
-	b	.L912
-.L917:
+	b	.L950
+.L955:
 	ldr	w2, [x27, x3, lsl 2]
 	mov	w1, w20
 	str	x3, [x29, 104]
@@ -5088,59 +5287,65 @@ ftl_erase_sblk:
 	bl	flash_erase_block_en
 	ldr	x3, [x29, 104]
 	add	x3, x3, 1
-	b	.L916
-.L915:
+	b	.L954
+.L953:
 	cmp	w21, 2
-	bne	.L919
-	adrp	x0, .LANCHOR104
-	ldrb	w0, [x0, #:lo12:.LANCHOR104]
-	cbz	w0, .L920
+	bne	.L957
+	adrp	x0, .LANCHOR70
+	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	cbz	w0, .L958
+	adrp	x0, .LANCHOR71
+	ldrb	w0, [x0, #:lo12:.LANCHOR71]
+	cbnz	w0, .L958
 	ldp	w2, w3, [x29, 112]
 	cmp	w20, 0
 	cset	w1, eq
 	mov	w0, w19
 	bl	flash_erase_duplane_block
-.L920:
+.L958:
 	ldp	w2, w3, [x29, 112]
 	mov	w1, w20
 	mov	w0, w19
 	bl	flash_erase_duplane_block
-	b	.L918
-.L919:
+	b	.L956
+.L957:
 	cmp	w21, 1
-	bne	.L918
-	adrp	x0, .LANCHOR104
-	ldrb	w0, [x0, #:lo12:.LANCHOR104]
-	cbz	w0, .L922
+	bne	.L956
+	adrp	x0, .LANCHOR70
+	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	cbz	w0, .L960
+	adrp	x0, .LANCHOR71
+	ldrb	w0, [x0, #:lo12:.LANCHOR71]
+	cbnz	w0, .L960
 	ldr	w2, [x29, 112]
 	cmp	w20, 0
 	cset	w1, eq
 	mov	w0, w19
 	bl	flash_erase_block_en
-.L922:
+.L960:
 	ldr	w2, [x29, 112]
 	mov	w1, w20
 	mov	w0, w19
 	bl	flash_erase_block_en
-	b	.L918
-.L923:
-	adrp	x2, .LANCHOR97
+	b	.L956
+.L961:
+	adrp	x2, .LANCHOR100
 	ldr	x3, [x23, #:lo12:.LANCHOR7]
-	cbnz	w20, .L925
+	cbnz	w20, .L963
 	ldrh	w1, [x3, x22]
 	add	w0, w1, 1
 	and	w0, w0, 2047
 	bfi	w1, w0, 0, 11
 	strh	w1, [x3, x22]
-	ldr	x1, [x2, #:lo12:.LANCHOR97]
+	ldr	x1, [x2, #:lo12:.LANCHOR100]
 	ldr	w2, [x1, 84]
 	add	w2, w2, 1
 	str	w2, [x1, 84]
 	ldrh	w2, [x1, 96]
 	cmp	w2, w0
-	bge	.L927
+	bge	.L965
 	strh	w0, [x1, 96]
-.L927:
+.L965:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -5149,7 +5354,7 @@ ftl_erase_sblk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L925:
+.L963:
 	ldr	w1, [x3, x22]
 	ubfx	x0, x1, 11, 8
 	add	w0, w0, 1
@@ -5157,15 +5362,15 @@ ftl_erase_sblk:
 	bfi	w1, w0, 11, 8
 	str	w1, [x3, x22]
 	and	w0, w0, 65535
-	ldr	x1, [x2, #:lo12:.LANCHOR97]
+	ldr	x1, [x2, #:lo12:.LANCHOR100]
 	ldr	w2, [x1, 80]
 	add	w2, w2, 1
 	str	w2, [x1, 80]
 	ldrh	w2, [x1, 98]
 	cmp	w2, w0
-	bcs	.L927
+	bcs	.L965
 	strh	w0, [x1, 98]
-	b	.L927
+	b	.L965
 	.size	ftl_erase_sblk, .-ftl_erase_sblk
 	.section	.text.ftl_alloc_sys_blk,"ax",@progbits
 	.align	2
@@ -5173,44 +5378,44 @@ ftl_erase_sblk:
 	.type	ftl_alloc_sys_blk, %function
 ftl_alloc_sys_blk:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR97
+	adrp	x0, .LANCHOR100
 	add	x29, sp, 0
-	ldr	x1, [x0, #:lo12:.LANCHOR97]
+	ldr	x1, [x0, #:lo12:.LANCHOR100]
 	ldrh	w2, [x1, 136]
 	str	x19, [sp, 16]
 	mov	x19, x0
 	cmp	w2, 63
-	bls	.L937
+	bls	.L975
 	strh	wzr, [x1, 136]
-.L937:
+.L975:
 	ldrh	w0, [x1, 112]
-	cbnz	w0, .L938
-	adrp	x1, .LANCHOR107
+	cbnz	w0, .L976
+	adrp	x1, .LANCHOR109
 	adrp	x0, .LC0
 	mov	w2, 1117
-	add	x1, x1, :lo12:.LANCHOR107
+	add	x1, x1, :lo12:.LANCHOR109
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L938:
-	ldr	x1, [x19, #:lo12:.LANCHOR97]
+.L976:
+	ldr	x1, [x19, #:lo12:.LANCHOR100]
 	mov	w5, 65535
-.L941:
+.L979:
 	ldrh	w2, [x1, 136]
-.L939:
+.L977:
 	mov	w3, w2
 	cmp	w2, 63
-	ble	.L940
+	ble	.L978
 	strh	wzr, [x1, 136]
-	b	.L941
-.L940:
+	b	.L979
+.L978:
 	add	x4, x2, 1
 	add	x0, x1, x4, lsl 1
 	ldrh	w0, [x0, 158]
 	cmp	w0, w5
-	bne	.L944
+	bne	.L982
 	mov	x2, x4
-	b	.L939
-.L944:
+	b	.L977
+.L982:
 	add	x3, x1, x3, sxtw 1
 	mov	w4, -1
 	ldr	x19, [sp, 16]
@@ -5231,40 +5436,40 @@ ftl_free_sys_blk:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 65535
-	adrp	x0, .LANCHOR97
+	adrp	x0, .LANCHOR100
 	mov	x19, x0
-	ldr	x1, [x0, #:lo12:.LANCHOR97]
+	ldr	x1, [x0, #:lo12:.LANCHOR100]
 	ldrh	w2, [x1, 138]
 	cmp	w2, 63
-	bls	.L947
+	bls	.L985
 	strh	wzr, [x1, 138]
-.L947:
+.L985:
 	ldrh	w0, [x1, 112]
 	cmp	w0, 63
-	bls	.L948
-	adrp	x1, .LANCHOR108
+	bls	.L986
+	adrp	x1, .LANCHOR110
 	adrp	x0, .LC0
 	mov	w2, 1141
-	add	x1, x1, :lo12:.LANCHOR108
+	add	x1, x1, :lo12:.LANCHOR110
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L948:
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+.L986:
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	mov	w4, 65535
-.L951:
+.L989:
 	ldrh	w1, [x0, 138]
-.L949:
+.L987:
 	mov	w2, w1
 	cmp	w1, 63
-	ble	.L950
+	ble	.L988
 	strh	wzr, [x0, 138]
-	b	.L951
-.L950:
+	b	.L989
+.L988:
 	add	x3, x1, 1
 	add	x5, x0, x3, lsl 1
 	ldrh	w5, [x5, 158]
 	cmp	w5, w4
-	bne	.L952
+	bne	.L990
 	add	x2, x0, x2, sxtw 1
 	strh	w20, [x2, 160]
 	strh	w1, [x0, 138]
@@ -5274,9 +5479,9 @@ ftl_free_sys_blk:
 	strh	w1, [x0, 112]
 	ldp	x29, x30, [sp], 32
 	ret
-.L952:
+.L990:
 	mov	x1, x3
-	b	.L949
+	b	.L987
 	.size	ftl_free_sys_blk, .-ftl_free_sys_blk
 	.section	.text.ftl_info_data_recovery,"ax",@progbits
 	.align	2
@@ -5286,7 +5491,7 @@ ftl_info_data_recovery:
 	ldrh	w2, [x0]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L965
+	beq	.L1003
 	stp	x29, x30, [sp, -48]!
 	adrp	x1, .LANCHOR7
 	add	x29, sp, 0
@@ -5297,25 +5502,25 @@ ftl_info_data_recovery:
 	add	x21, x20, x19
 	ldrb	w1, [x21, 2]
 	tst	w1, 224
-	bne	.L955
+	bne	.L993
 	ldrb	w0, [x0, 4]
 	bfi	w1, w0, 5, 3
 	strb	w1, [x21, 2]
 	mov	w0, w2
 	bl	zftl_remove_free_node
 	ldrb	w0, [x21, 2]
-	adrp	x1, .LANCHOR97
-	ldr	x3, [x1, #:lo12:.LANCHOR97]
-	tbz	x0, 3, .L959
+	adrp	x1, .LANCHOR100
+	ldr	x3, [x1, #:lo12:.LANCHOR100]
+	tbz	x0, 3, .L997
 	ldrh	w2, [x3, 116]
 	sub	w2, w2, #1
 	strh	w2, [x3, 116]
-.L960:
+.L998:
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L962
+	bne	.L1000
 	ldr	w0, [x20, x19]
-	ldr	x1, [x1, #:lo12:.LANCHOR97]
+	ldr	x1, [x1, #:lo12:.LANCHOR100]
 	ubfx	x2, x0, 11, 8
 	add	w2, w2, 1
 	bfi	w0, w2, 11, 8
@@ -5323,44 +5528,44 @@ ftl_info_data_recovery:
 	ldrh	w0, [x1, 120]
 	sub	w0, w0, #1
 	strh	w0, [x1, 120]
-.L955:
+.L993:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L959:
+.L997:
 	tst	w0, 24
-	bne	.L961
+	bne	.L999
 	ldrh	w2, [x3, 114]
 	sub	w2, w2, #1
 	strh	w2, [x3, 114]
-	b	.L960
-.L961:
+	b	.L998
+.L999:
 	ldrh	w2, [x3, 118]
 	sub	w2, w2, #1
 	strh	w2, [x3, 118]
-	b	.L960
-.L962:
+	b	.L998
+.L1000:
 	ldrh	w2, [x20, x19]
 	cmp	w0, 64
 	add	w3, w2, 1
 	bfi	w2, w3, 0, 11
 	strh	w2, [x20, x19]
-	bne	.L963
-	ldr	x1, [x1, #:lo12:.LANCHOR97]
+	bne	.L1001
+	ldr	x1, [x1, #:lo12:.LANCHOR100]
 	ldrh	w0, [x1, 122]
 	sub	w0, w0, #1
 	strh	w0, [x1, 122]
-	b	.L955
-.L963:
+	b	.L993
+.L1001:
 	cmp	w0, 96
-	bne	.L955
-	ldr	x1, [x1, #:lo12:.LANCHOR97]
+	bne	.L993
+	ldr	x1, [x1, #:lo12:.LANCHOR100]
 	ldrh	w0, [x1, 124]
 	sub	w0, w0, #1
 	strh	w0, [x1, 124]
-	b	.L955
-.L965:
+	b	.L993
+.L1003:
 	ret
 	.size	ftl_info_data_recovery, .-ftl_info_data_recovery
 	.section	.text.ftl_get_ppa_from_index,"ax",@progbits
@@ -5370,19 +5575,19 @@ ftl_info_data_recovery:
 ftl_get_ppa_from_index:
 	stp	x29, x30, [sp, -32]!
 	adrp	x1, .LANCHOR10
-	adrp	x3, .LANCHOR73
+	adrp	x3, .LANCHOR76
 	and	w0, w0, 65535
 	add	x29, sp, 0
 	ldr	x2, [x1, #:lo12:.LANCHOR10]
-	adrp	x1, .LANCHOR80
-	ldrb	w3, [x3, #:lo12:.LANCHOR73]
-	ldrh	w1, [x1, #:lo12:.LANCHOR80]
+	adrp	x1, .LANCHOR83
+	ldrb	w3, [x3, #:lo12:.LANCHOR76]
+	ldrh	w1, [x1, #:lo12:.LANCHOR83]
 	stp	x19, x20, [sp, 16]
 	mul	w1, w1, w3
 	cmp	w0, w1
-	bge	.L969
+	bge	.L1007
 	add	x2, x2, 16
-.L970:
+.L1008:
 	ldrb	w1, [x2, 9]
 	sdiv	w19, w0, w1
 	msub	w0, w19, w1, w0
@@ -5390,25 +5595,25 @@ ftl_get_ppa_from_index:
 	ldrh	w20, [x0, 16]
 	mov	w0, 65535
 	cmp	w20, w0
-	bne	.L971
-	adrp	x1, .LANCHOR109
+	bne	.L1009
+	adrp	x1, .LANCHOR111
 	adrp	x0, .LC0
-	mov	w2, 1528
-	add	x1, x1, :lo12:.LANCHOR109
+	mov	w2, 1580
+	add	x1, x1, :lo12:.LANCHOR111
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L971:
-	adrp	x0, .LANCHOR105
-	ldrh	w0, [x0, #:lo12:.LANCHOR105]
+.L1009:
+	adrp	x0, .LANCHOR107
+	ldrh	w0, [x0, #:lo12:.LANCHOR107]
 	madd	w0, w0, w20, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L969:
+.L1007:
 	sub	w0, w0, w1
 	add	x2, x2, 48
 	and	w0, w0, 65535
-	b	.L970
+	b	.L1008
 	.size	ftl_get_ppa_from_index, .-ftl_get_ppa_from_index
 	.section	.text.lpa_hash_get_ppa,"ax",@progbits
 	.align	2
@@ -5416,29 +5621,29 @@ ftl_get_ppa_from_index:
 	.type	lpa_hash_get_ppa, %function
 lpa_hash_get_ppa:
 	and	x2, x0, 255
-	adrp	x1, .LANCHOR110
-	add	x1, x1, :lo12:.LANCHOR110
+	adrp	x1, .LANCHOR112
+	add	x1, x1, :lo12:.LANCHOR112
 	mov	w3, 65535
 	ldrh	w1, [x1, x2, lsl 1]
-	adrp	x2, .LANCHOR111
-	ldr	x4, [x2, #:lo12:.LANCHOR111]
-	adrp	x2, .LANCHOR112
-	ldr	x5, [x2, #:lo12:.LANCHOR112]
-.L974:
+	adrp	x2, .LANCHOR113
+	ldr	x4, [x2, #:lo12:.LANCHOR113]
+	adrp	x2, .LANCHOR114
+	ldr	x5, [x2, #:lo12:.LANCHOR114]
+.L1012:
 	cmp	w1, w3
-	bne	.L976
+	bne	.L1014
 	mov	w0, -1
 	ret
-.L976:
+.L1014:
 	uxtw	x2, w1
 	ldr	w6, [x4, x2, lsl 2]
 	cmp	w0, w6
-	bne	.L975
+	bne	.L1013
 	mov	w0, w1
 	b	ftl_get_ppa_from_index
-.L975:
+.L1013:
 	ldrh	w1, [x5, x2, lsl 1]
-	b	.L974
+	b	.L1012
 	.size	lpa_hash_get_ppa, .-lpa_hash_get_ppa
 	.section	.text.ftl_get_new_free_page,"ax",@progbits
 	.align	2
@@ -5452,50 +5657,50 @@ ftl_get_new_free_page:
 	mov	x19, x0
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L978
-	adrp	x1, .LANCHOR113
+	bne	.L1016
+	adrp	x1, .LANCHOR115
 	adrp	x0, .LC0
-	mov	w2, 1643
-	add	x1, x1, :lo12:.LANCHOR113
+	mov	w2, 1695
+	add	x1, x1, :lo12:.LANCHOR115
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L978:
-	adrp	x0, .LANCHOR80
+.L1016:
+	adrp	x0, .LANCHOR83
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
 	cmp	w1, w0
-	bne	.L979
-	adrp	x1, .LANCHOR113
+	bne	.L1017
+	adrp	x1, .LANCHOR115
 	adrp	x0, .LC0
-	mov	w2, 1644
-	add	x1, x1, :lo12:.LANCHOR113
+	mov	w2, 1696
+	add	x1, x1, :lo12:.LANCHOR115
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L979:
+.L1017:
 	ldrh	w0, [x19, 6]
-	cbnz	w0, .L980
-	adrp	x1, .LANCHOR113
+	cbnz	w0, .L1018
+	adrp	x1, .LANCHOR115
 	adrp	x0, .LC0
-	mov	w2, 1645
-	add	x1, x1, :lo12:.LANCHOR113
+	mov	w2, 1697
+	add	x1, x1, :lo12:.LANCHOR115
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L980:
+.L1018:
 	ldrb	w0, [x19, 5]
 	mov	w2, 65535
 	add	x0, x0, 8
 	ldrh	w3, [x19, x0, lsl 1]
-	adrp	x0, .LANCHOR73
-	ldrb	w4, [x0, #:lo12:.LANCHOR73]
-.L981:
+	adrp	x0, .LANCHOR76
+	ldrb	w4, [x0, #:lo12:.LANCHOR76]
+.L1019:
 	cmp	w3, w2
 	ldrb	w1, [x19, 5]
-	beq	.L983
-	adrp	x0, .LANCHOR105
+	beq	.L1021
+	adrp	x0, .LANCHOR107
 	add	w1, w1, 1
 	and	w1, w1, 255
 	ldrh	w2, [x19, 2]
-	ldrh	w0, [x0, #:lo12:.LANCHOR105]
+	ldrh	w0, [x0, #:lo12:.LANCHOR107]
 	cmp	w4, w1
 	strb	w1, [x19, 5]
 	mul	w0, w0, w3
@@ -5506,29 +5711,29 @@ ftl_get_new_free_page:
 	orr	w0, w0, w2
 	add	w3, w3, 1
 	strh	w3, [x19, 10]
-	bne	.L977
+	bne	.L1015
 	add	w2, w2, 1
 	strb	wzr, [x19, 5]
 	strh	w2, [x19, 2]
-.L977:
+.L1015:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L983:
+.L1021:
 	add	w1, w1, 1
 	and	w1, w1, 255
 	strb	w1, [x19, 5]
 	cmp	w1, w4
-	bne	.L982
+	bne	.L1020
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 5]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L982:
+.L1020:
 	ldrb	w0, [x19, 5]
 	add	x0, x0, 8
 	ldrh	w3, [x19, x0, lsl 1]
-	b	.L981
+	b	.L1019
 	.size	ftl_get_new_free_page, .-ftl_get_new_free_page
 	.section	.text.ftl_ext_alloc_new_blk,"ax",@progbits
 	.align	2
@@ -5544,22 +5749,22 @@ ftl_ext_alloc_new_blk:
 	mov	w19, w0
 	sub	w0, w0, #1
 	cmp	w1, w0, uxth
-	bcs	.L987
-	adrp	x1, .LANCHOR114
+	bcs	.L1025
+	adrp	x1, .LANCHOR116
 	adrp	x0, .LC0
-	mov	w2, 1676
-	add	x1, x1, :lo12:.LANCHOR114
+	mov	w2, 1728
+	add	x1, x1, :lo12:.LANCHOR116
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L987:
-	adrp	x20, .LANCHOR97
+.L1025:
+	adrp	x20, .LANCHOR100
 	mov	w1, 0
 	mov	w0, w19
 	bl	ftl_erase_phy_blk
-	ldr	x0, [x20, #:lo12:.LANCHOR97]
+	ldr	x0, [x20, #:lo12:.LANCHOR100]
 	ldrh	w0, [x0, 130]
 	bl	ftl_free_sys_blk
-	ldr	x0, [x20, #:lo12:.LANCHOR97]
+	ldr	x0, [x20, #:lo12:.LANCHOR100]
 	strh	w19, [x0, 130]
 	strh	wzr, [x0, 140]
 	mov	w0, 0
@@ -5572,18 +5777,18 @@ ftl_ext_alloc_new_blk:
 	.global	ftl_total_vpn_update
 	.type	ftl_total_vpn_update, %function
 ftl_total_vpn_update:
-	adrp	x2, .LANCHOR115
+	adrp	x2, .LANCHOR117
 	mov	x3, x2
-	ldrh	w1, [x2, #:lo12:.LANCHOR115]
+	ldrh	w1, [x2, #:lo12:.LANCHOR117]
 	cmp	w1, 4
-	bhi	.L990
-	cbnz	w0, .L990
+	bhi	.L1028
+	cbnz	w0, .L1028
 	add	w1, w1, 1
-	strh	w1, [x2, #:lo12:.LANCHOR115]
+	strh	w1, [x2, #:lo12:.LANCHOR117]
 	ret
-.L990:
+.L1028:
 	adrp	x0, .LANCHOR6
-	strh	wzr, [x3, #:lo12:.LANCHOR115]
+	strh	wzr, [x3, #:lo12:.LANCHOR117]
 	mov	x1, 0
 	mov	w2, 0
 	ldrh	w5, [x0, #:lo12:.LANCHOR6]
@@ -5593,37 +5798,37 @@ ftl_total_vpn_update:
 	adrp	x0, .LANCHOR7
 	ldr	x7, [x0, #:lo12:.LANCHOR7]
 	mov	w0, 0
-.L992:
+.L1030:
 	cmp	w5, w1, uxth
-	bhi	.L995
+	bhi	.L1033
 	adrp	x1, .LANCHOR10
 	ldr	x1, [x1, #:lo12:.LANCHOR10]
 	str	w2, [x1, 524]
-	adrp	x2, .LANCHOR97
+	adrp	x2, .LANCHOR100
 	str	w0, [x1, 528]
-	ldr	x2, [x2, #:lo12:.LANCHOR97]
+	ldr	x2, [x2, #:lo12:.LANCHOR100]
 	ldrh	w2, [x2, 120]
-	cbz	w2, .L989
+	cbz	w2, .L1027
 	udiv	w0, w0, w2
 	str	w0, [x1, 532]
-.L989:
+.L1027:
 	ret
-.L995:
+.L1033:
 	ldrh	w3, [x6, x1, lsl 1]
 	cmp	w3, w8
-	beq	.L993
+	beq	.L1031
 	add	x4, x7, x1, lsl 2
 	ldrb	w4, [x4, 2]
 	and	w4, w4, 224
 	cmp	w4, 160
-	bne	.L994
+	bne	.L1032
 	add	w0, w0, w3
-.L993:
+.L1031:
 	add	x1, x1, 1
-	b	.L992
-.L994:
+	b	.L1030
+.L1032:
 	add	w2, w2, w3
-	b	.L993
+	b	.L1031
 	.size	ftl_total_vpn_update, .-ftl_total_vpn_update
 	.section	.text.ftl_debug_info_fill,"ax",@progbits
 	.align	2
@@ -5648,17 +5853,17 @@ ftl_vpn_update:
 	ubfiz	x19, x19, 1, 16
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, x19]
-	cbnz	w0, .L1003
-	adrp	x1, .LANCHOR116
+	cbnz	w0, .L1041
+	adrp	x1, .LANCHOR118
 	mov	w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR116]
-.L1001:
+	str	w0, [x1, #:lo12:.LANCHOR118]
+.L1039:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1003:
+.L1041:
 	mov	w0, 0
-	b	.L1001
+	b	.L1039
 	.size	ftl_vpn_update, .-ftl_vpn_update
 	.section	.text.ftl_vpn_decrement,"ax",@progbits
 	.align	2
@@ -5671,57 +5876,57 @@ ftl_vpn_decrement:
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1006
+	beq	.L1044
 	adrp	x0, .LANCHOR9
 	uxtw	x1, w19
 	lsl	x2, x1, 1
 	ldr	x3, [x0, #:lo12:.LANCHOR9]
 	ldrh	w0, [x3, x2]
-	cbnz	w0, .L1007
+	cbnz	w0, .L1045
 	adrp	x0, .LANCHOR7
 	mov	w2, 0
 	ldr	x0, [x0, #:lo12:.LANCHOR7]
 	add	x1, x0, x1, lsl 2
-	adrp	x0, .LC59
-	add	x0, x0, :lo12:.LC59
+	adrp	x0, .LC60
+	add	x0, x0, :lo12:.LC60
 	ldrb	w3, [x1, 2]
 	mov	w1, w19
 	ubfx	x3, x3, 5, 3
 	bl	printf
-.L1012:
+.L1050:
 	mov	w0, 0
-	b	.L1005
-.L1007:
+	b	.L1043
+.L1045:
 	sub	w0, w0, #1
 	strh	w0, [x3, x2]
-.L1006:
-	adrp	x20, .LANCHOR63
-	ldrh	w0, [x20, #:lo12:.LANCHOR63]
+.L1044:
+	adrp	x20, .LANCHOR64
+	ldrh	w0, [x20, #:lo12:.LANCHOR64]
 	cmp	w19, w0
-	beq	.L1012
+	beq	.L1050
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L1009
-	strh	w19, [x20, #:lo12:.LANCHOR63]
-	b	.L1012
-.L1009:
+	bne	.L1047
+	strh	w19, [x20, #:lo12:.LANCHOR64]
+	b	.L1050
+.L1047:
 	bl	ftl_vpn_update
 	cmp	w0, 0
-	adrp	x1, .LANCHOR117
+	adrp	x1, .LANCHOR119
 	cset	w0, ne
-	ldrh	w3, [x20, #:lo12:.LANCHOR63]
-	ldrh	w2, [x1, #:lo12:.LANCHOR117]
-	strh	w19, [x20, #:lo12:.LANCHOR63]
+	ldrh	w3, [x20, #:lo12:.LANCHOR64]
+	ldrh	w2, [x1, #:lo12:.LANCHOR119]
+	strh	w19, [x20, #:lo12:.LANCHOR64]
 	add	w2, w2, 1
 	and	w2, w2, 65535
 	cmp	w2, 7
 	csel	w2, w2, wzr, ls
-	strh	w2, [x1, #:lo12:.LANCHOR117]
+	strh	w2, [x1, #:lo12:.LANCHOR119]
 	and	x2, x2, 65535
-	adrp	x1, .LANCHOR64
-	add	x1, x1, :lo12:.LANCHOR64
+	adrp	x1, .LANCHOR65
+	add	x1, x1, :lo12:.LANCHOR65
 	strh	w3, [x1, x2, lsl 1]
-.L1005:
+.L1043:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -5731,50 +5936,50 @@ ftl_vpn_decrement:
 	.global	lpa_hash_update_ppa
 	.type	lpa_hash_update_ppa, %function
 lpa_hash_update_ppa:
-	adrp	x3, .LANCHOR110
+	adrp	x3, .LANCHOR112
 	and	x5, x0, 255
-	add	x4, x3, :lo12:.LANCHOR110
+	add	x4, x3, :lo12:.LANCHOR112
 	mov	w7, 65535
 	and	w2, w2, 65535
 	mov	w12, w7
 	ldrh	w6, [x4, x5, lsl 1]
-	adrp	x4, .LANCHOR111
-	ldr	x8, [x4, #:lo12:.LANCHOR111]
-	adrp	x4, .LANCHOR112
-	ldr	x4, [x4, #:lo12:.LANCHOR112]
-.L1015:
+	adrp	x4, .LANCHOR113
+	ldr	x8, [x4, #:lo12:.LANCHOR113]
+	adrp	x4, .LANCHOR114
+	ldr	x4, [x4, #:lo12:.LANCHOR114]
+.L1053:
 	cmp	w6, w12
-	beq	.L1019
+	beq	.L1057
 	uxtw	x11, w6
 	lsl	x10, x11, 2
 	add	x13, x8, x10
 	ldr	w10, [x8, x10]
 	cmp	w0, w10
 	lsl	x10, x11, 1
-	bne	.L1016
+	bne	.L1054
 	mov	w6, -1
 	str	w6, [x13]
 	cmp	w7, w12
-	bne	.L1017
-	add	x6, x3, :lo12:.LANCHOR110
+	bne	.L1055
+	add	x6, x3, :lo12:.LANCHOR112
 	ldrh	w7, [x4, x10]
 	strh	w7, [x6, x5, lsl 1]
-.L1018:
+.L1056:
 	mov	w6, -1
 	strh	w6, [x4, x11, lsl 1]
-.L1019:
+.L1057:
 	uxtw	x6, w2
-	add	x3, x3, :lo12:.LANCHOR110
+	add	x3, x3, :lo12:.LANCHOR112
 	cmn	w1, #1
 	str	w0, [x8, x6, lsl 2]
 	ldrh	w0, [x3, x5, lsl 1]
 	strh	w2, [x3, x5, lsl 1]
 	strh	w0, [x4, x6, lsl 1]
-	beq	.L1026
+	beq	.L1064
 	stp	x29, x30, [sp, -16]!
-	adrp	x0, .LANCHOR99
+	adrp	x0, .LANCHOR102
 	add	x29, sp, 0
-	ldrh	w3, [x0, #:lo12:.LANCHOR99]
+	ldrh	w3, [x0, #:lo12:.LANCHOR102]
 	mov	w0, 21
 	sub	w2, w0, w3
 	mov	w0, 1
@@ -5782,22 +5987,22 @@ lpa_hash_update_ppa:
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
 	and	w1, w0, w1
-	adrp	x0, .LANCHOR98
-	ldrb	w0, [x0, #:lo12:.LANCHOR98]
+	adrp	x0, .LANCHOR101
+	ldrb	w0, [x0, #:lo12:.LANCHOR101]
 	udiv	w0, w1, w0
 	bl	ftl_vpn_decrement
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
-.L1017:
+.L1055:
 	ldrh	w6, [x4, x10]
 	strh	w6, [x4, w7, uxtw 1]
-	b	.L1018
-.L1016:
+	b	.L1056
+.L1054:
 	mov	w7, w6
 	ldrh	w6, [x4, x10]
-	b	.L1015
-.L1026:
+	b	.L1053
+.L1064:
 	mov	w0, -1
 	ret
 	.size	lpa_hash_update_ppa, .-lpa_hash_update_ppa
@@ -5807,10 +6012,10 @@ lpa_hash_update_ppa:
 	.type	ftl_mask_bad_block, %function
 ftl_mask_bad_block:
 	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LANCHOR99
+	adrp	x1, .LANCHOR102
 	mov	w2, 21
 	add	x29, sp, 0
-	ldrh	w3, [x1, #:lo12:.LANCHOR99]
+	ldrh	w3, [x1, #:lo12:.LANCHOR102]
 	stp	x19, x20, [sp, 16]
 	ubfx	x20, x0, 21, 3
 	sub	w1, w2, w3
@@ -5819,23 +6024,23 @@ ftl_mask_bad_block:
 	lsl	w2, w2, w1
 	sub	w2, w2, #1
 	and	w2, w2, w0
-	adrp	x0, .LANCHOR98
-	ldrb	w0, [x0, #:lo12:.LANCHOR98]
+	adrp	x0, .LANCHOR101
+	ldrb	w0, [x0, #:lo12:.LANCHOR101]
 	udiv	w2, w2, w0
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	and	w19, w2, 65535
-	tbz	x0, 14, .L1030
-	adrp	x0, .LC60
+	tbz	x0, 14, .L1068
+	adrp	x0, .LC61
 	mov	w2, w19
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC60
+	add	x0, x0, :lo12:.LC61
 	bl	printf
-.L1030:
+.L1068:
 	adrp	x0, .LANCHOR6
 	ldrh	w0, [x0, #:lo12:.LANCHOR6]
 	cmp	w0, w19
-	bls	.L1029
+	bls	.L1067
 	adrp	x0, .LANCHOR7
 	mov	w1, 1
 	lsl	w1, w1, w20
@@ -5844,7 +6049,7 @@ ftl_mask_bad_block:
 	ldrb	w0, [x19, 3]
 	orr	w1, w1, w0
 	strb	w1, [x19, 3]
-.L1029:
+.L1067:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -5855,52 +6060,57 @@ ftl_mask_bad_block:
 	.type	print_ftl_debug_info, %function
 print_ftl_debug_info:
 	sub	sp, sp, #64
-	adrp	x1, .LANCHOR87
-	adrp	x0, .LANCHOR10
-	adrp	x7, .LANCHOR118
+	adrp	x2, .LANCHOR86
+	adrp	x8, .LANCHOR120
 	stp	x29, x30, [sp, 32]
 	add	x29, sp, 32
-	ldrh	w6, [x1, #:lo12:.LANCHOR87]
-	adrp	x1, .LANCHOR83
-	ldr	x0, [x0, #:lo12:.LANCHOR10]
-	ldr	w7, [x7, #:lo12:.LANCHOR118]
-	ldrh	w5, [x1, #:lo12:.LANCHOR83]
-	adrp	x1, .LANCHOR85
-	str	w7, [sp, 8]
-	ldrh	w4, [x1, #:lo12:.LANCHOR85]
-	adrp	x1, .LANCHOR94
-	ldr	w7, [x0, 528]
-	ldrh	w3, [x1, #:lo12:.LANCHOR94]
-	adrp	x1, .LANCHOR92
-	str	w7, [sp]
-	ldrh	w2, [x1, #:lo12:.LANCHOR92]
-	adrp	x1, .LANCHOR90
-	ldr	w7, [x0, 524]
-	adrp	x0, .LC61
-	ldrh	w1, [x1, #:lo12:.LANCHOR90]
-	add	x0, x0, :lo12:.LC61
-	str	x19, [sp, 48]
-	adrp	x19, .LANCHOR97
+	ldrh	w7, [x2, #:lo12:.LANCHOR86]
+	adrp	x2, .LANCHOR88
+	stp	x19, x20, [sp, 48]
+	adrp	x19, .LANCHOR100
+	adrp	x20, .LANCHOR10
+	ldrh	w6, [x2, #:lo12:.LANCHOR88]
+	adrp	x2, .LANCHOR97
+	ldr	x1, [x19, #:lo12:.LANCHOR100]
+	ldrh	w5, [x2, #:lo12:.LANCHOR97]
+	adrp	x2, .LANCHOR95
+	ldr	x0, [x20, #:lo12:.LANCHOR10]
+	ldrh	w4, [x2, #:lo12:.LANCHOR95]
+	adrp	x2, .LANCHOR93
+	ldr	w8, [x8, #:lo12:.LANCHOR120]
+	ldrh	w3, [x2, #:lo12:.LANCHOR93]
+	ldrh	w2, [x1, 146]
+	ldrh	w1, [x1, 148]
+	str	w8, [sp, 24]
+	ldr	w8, [x0, 528]
+	str	w8, [sp, 16]
+	ldr	w0, [x0, 524]
+	str	w0, [sp, 8]
+	adrp	x0, .LANCHOR90
+	ldrh	w0, [x0, #:lo12:.LANCHOR90]
+	str	w0, [sp]
+	adrp	x0, .LC62
+	add	x0, x0, :lo12:.LC62
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	adrp	x1, .LANCHOR119
-	ldrb	w3, [x1, #:lo12:.LANCHOR119]
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	adrp	x1, .LANCHOR121
+	ldrb	w3, [x1, #:lo12:.LANCHOR121]
 	ldr	w4, [x0, 8]
 	ldr	w5, [x0, 64]
 	ldr	w1, [x0, 20]
 	ldr	w2, [x0, 28]
-	adrp	x0, .LC62
-	add	x0, x0, :lo12:.LC62
+	adrp	x0, .LC63
+	add	x0, x0, :lo12:.LC63
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	ldr	w1, [x0, 52]
 	ldr	w2, [x0, 60]
 	ldr	w3, [x0, 16]
-	adrp	x0, .LC63
-	add	x0, x0, :lo12:.LC63
+	adrp	x0, .LC64
+	add	x0, x0, :lo12:.LC64
 	lsr	w3, w3, 11
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	ldrh	w2, [x0, 98]
 	ldrh	w6, [x0, 72]
 	ldrh	w5, [x0, 96]
@@ -5913,24 +6123,32 @@ print_ftl_debug_info:
 	ldrh	w2, [x0, 90]
 	str	w2, [sp]
 	ldp	w7, w2, [x0, 80]
-	adrp	x0, .LC64
-	add	x0, x0, :lo12:.LC64
+	adrp	x0, .LC65
+	add	x0, x0, :lo12:.LC65
 	bl	printf
-	ldr	x19, [sp, 48]
-	adrp	x0, .LANCHOR74
+	adrp	x0, .LANCHOR77
+	ldrh	w5, [x0, #:lo12:.LANCHOR77]
+	adrp	x0, .LANCHOR82
+	ldrh	w4, [x0, #:lo12:.LANCHOR82]
+	adrp	x0, .LANCHOR62
+	ldrh	w3, [x0, #:lo12:.LANCHOR62]
+	adrp	x0, .LANCHOR92
+	ldrh	w2, [x0, #:lo12:.LANCHOR92]
+	adrp	x0, .LANCHOR89
+	ldrh	w1, [x0, #:lo12:.LANCHOR89]
+	adrp	x0, .LC66
+	add	x0, x0, :lo12:.LC66
+	bl	printf
+	ldr	x0, [x20, #:lo12:.LANCHOR10]
 	ldp	x29, x30, [sp, 32]
+	ldp	x19, x20, [sp, 48]
 	add	sp, sp, 64
-	ldrh	w5, [x0, #:lo12:.LANCHOR74]
-	adrp	x0, .LANCHOR79
-	ldrh	w4, [x0, #:lo12:.LANCHOR79]
-	adrp	x0, .LANCHOR61
-	ldrh	w3, [x0, #:lo12:.LANCHOR61]
-	adrp	x0, .LANCHOR89
-	ldrh	w2, [x0, #:lo12:.LANCHOR89]
-	adrp	x0, .LANCHOR86
-	ldrh	w1, [x0, #:lo12:.LANCHOR86]
-	adrp	x0, .LC65
-	add	x0, x0, :lo12:.LC65
+	ldrh	w4, [x0, 590]
+	ldrh	w3, [x0, 588]
+	ldrh	w2, [x0, 586]
+	ldrh	w1, [x0, 584]
+	adrp	x0, .LC67
+	add	x0, x0, :lo12:.LC67
 	b	printf
 	.size	print_ftl_debug_info, .-print_ftl_debug_info
 	.section	.text.ftl_write_buf,"ax",@progbits
@@ -5942,65 +6160,65 @@ ftl_write_buf:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	str	x21, [sp, 32]
-	cbnz	x0, .L1039
-	adrp	x1, .LANCHOR120
-	add	x1, x1, :lo12:.LANCHOR120
-	mov	w2, 662
+	cbnz	x0, .L1077
+	adrp	x1, .LANCHOR122
+	add	x1, x1, :lo12:.LANCHOR122
+	mov	w2, 667
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	bl	print_ftl_debug_info
 	mov	w0, -1
-.L1038:
+.L1076:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1042:
+.L1080:
 	mov	x1, x19
-	adrp	x0, .LANCHOR56
-	add	x0, x0, :lo12:.LANCHOR56
+	adrp	x0, .LANCHOR57
+	add	x0, x0, :lo12:.LANCHOR57
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR97
+	adrp	x1, .LANCHOR100
 	ldrb	w3, [x19, 56]
-	ldrb	w0, [x21, #:lo12:.LANCHOR57]
-	ldr	x1, [x1, #:lo12:.LANCHOR97]
+	ldrb	w0, [x21, #:lo12:.LANCHOR58]
+	ldr	x1, [x1, #:lo12:.LANCHOR100]
 	add	w0, w0, 1
 	and	w0, w0, 255
-	strb	w0, [x21, #:lo12:.LANCHOR57]
+	strb	w0, [x21, #:lo12:.LANCHOR58]
 	ldr	w2, [x1, 16]
 	add	w2, w2, w3
 	str	w2, [x1, 16]
 	ldr	w2, [x1, 32]
 	add	w2, w2, 1
 	str	w2, [x1, 32]
-	b	.L1038
-.L1039:
+	b	.L1076
+.L1077:
 	mov	x19, x0
-	adrp	x0, .LANCHOR121
+	adrp	x0, .LANCHOR123
 	mov	x20, x0
-	ldrb	w1, [x0, #:lo12:.LANCHOR121]
+	ldrb	w1, [x0, #:lo12:.LANCHOR123]
 	ldrb	w2, [x19, 56]
 	cmp	w2, w1
-	bls	.L1044
-	adrp	x1, .LANCHOR120
+	bls	.L1082
+	adrp	x1, .LANCHOR122
 	adrp	x0, .LC0
-	mov	w2, 667
-	add	x1, x1, :lo12:.LANCHOR120
+	mov	w2, 672
+	add	x1, x1, :lo12:.LANCHOR122
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1044:
+.L1082:
 	ldrb	w0, [x19, 56]
-	adrp	x21, .LANCHOR57
-	cbz	w0, .L1041
-	ldrb	w1, [x20, #:lo12:.LANCHOR121]
+	adrp	x21, .LANCHOR58
+	cbz	w0, .L1079
+	ldrb	w1, [x20, #:lo12:.LANCHOR123]
 	cmp	w1, w0
-	bcs	.L1042
-.L1041:
+	bcs	.L1080
+.L1079:
 	mov	x0, x19
 	bl	buf_free
-	ldrb	w0, [x21, #:lo12:.LANCHOR57]
-	b	.L1038
+	ldrb	w0, [x21, #:lo12:.LANCHOR58]
+	b	.L1076
 	.size	ftl_write_buf, .-ftl_write_buf
 	.section	.text.ftl_write_completed,"ax",@progbits
 	.align	2
@@ -6010,26 +6228,26 @@ ftl_write_completed:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR122
+	adrp	x20, .LANCHOR124
 	stp	x21, x22, [sp, 32]
-	adrp	x19, .LANCHOR49
-	adrp	x22, .LANCHOR99
-	add	x20, x20, :lo12:.LANCHOR122
-	add	x19, x19, :lo12:.LANCHOR49
-	add	x22, x22, :lo12:.LANCHOR99
+	adrp	x19, .LANCHOR50
+	adrp	x22, .LANCHOR102
+	add	x20, x20, :lo12:.LANCHOR124
+	add	x19, x19, :lo12:.LANCHOR50
+	add	x22, x22, :lo12:.LANCHOR102
 	stp	x23, x24, [sp, 48]
 	str	x25, [sp, 64]
-.L1050:
+.L1088:
 	ldrb	w0, [x20]
 	cmp	w0, 255
-	bne	.L1056
+	bne	.L1094
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1056:
+.L1094:
 	ubfiz	x21, x0, 6, 8
 	sbfiz	x0, x0, 6, 32
 	add	x23, x19, x0
@@ -6038,7 +6256,7 @@ ftl_write_completed:
 	strb	w0, [x20]
 	ldr	w0, [x23, 52]
 	cmn	w0, #1
-	bne	.L1051
+	bne	.L1089
 	ldp	w2, w3, [x23, 36]
 	mov	w1, 21
 	ldrh	w0, [x22]
@@ -6048,11 +6266,11 @@ ftl_write_completed:
 	lsl	w1, w25, w1
 	sub	w1, w1, #1
 	and	w1, w1, w0
-	adrp	x0, .LANCHOR98
-	ldrb	w0, [x0, #:lo12:.LANCHOR98]
+	adrp	x0, .LANCHOR101
+	ldrb	w0, [x0, #:lo12:.LANCHOR101]
 	udiv	w1, w1, w0
-	adrp	x0, .LC66
-	add	x0, x0, :lo12:.LC66
+	adrp	x0, .LC68
+	add	x0, x0, :lo12:.LC68
 	and	w24, w1, 65535
 	mov	w1, w24
 	bl	printf
@@ -6067,32 +6285,32 @@ ftl_write_completed:
 	str	w1, [x0, 556]
 	ldrh	w1, [x0, 16]
 	cmp	w1, w24
-	bne	.L1052
+	bne	.L1090
 	strh	wzr, [x0, 22]
-.L1053:
+.L1091:
 	mov	x0, x21
 	bl	ftl_write_buf
-	b	.L1050
-.L1052:
+	b	.L1088
+.L1090:
 	ldrh	w1, [x0, 48]
 	cmp	w1, w24
-	bne	.L1053
+	bne	.L1091
 	strh	wzr, [x0, 54]
-	b	.L1053
-.L1051:
+	b	.L1091
+.L1089:
 	ldrh	w2, [x23, 48]
 	ldr	w0, [x23, 36]
 	ldr	w1, [x23, 44]
 	bl	lpa_hash_update_ppa
 	ldrb	w0, [x23, 2]
-	tbz	x0, 2, .L1055
+	tbz	x0, 2, .L1093
 	and	w0, w0, -3
 	strb	w0, [x23, 2]
-	b	.L1050
-.L1055:
+	b	.L1088
+.L1093:
 	mov	x0, x21
 	bl	buf_free
-	b	.L1050
+	b	.L1088
 	.size	ftl_write_completed, .-ftl_write_completed
 	.section	.text.zftl_add_read_buf,"ax",@progbits
 	.align	2
@@ -6102,40 +6320,40 @@ zftl_add_read_buf:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	str	x19, [sp, 16]
-	cbnz	x0, .L1059
-	mov	w2, 949
-	adrp	x1, .LANCHOR123
+	cbnz	x0, .L1097
+	mov	w2, 954
+	adrp	x1, .LANCHOR125
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR123
+	add	x1, x1, :lo12:.LANCHOR125
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	print_ftl_debug_info
-.L1059:
+.L1097:
 	ldrb	w1, [x0, 56]
 	mov	x19, x0
-	adrp	x0, .LANCHOR121
-	ldrb	w0, [x0, #:lo12:.LANCHOR121]
+	adrp	x0, .LANCHOR123
+	ldrb	w0, [x0, #:lo12:.LANCHOR123]
 	cmp	w1, w0
-	bls	.L1061
-	adrp	x1, .LANCHOR123
+	bls	.L1099
+	adrp	x1, .LANCHOR125
 	adrp	x0, .LC0
-	mov	w2, 954
-	add	x1, x1, :lo12:.LANCHOR123
+	mov	w2, 959
+	add	x1, x1, :lo12:.LANCHOR125
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1061:
+.L1099:
 	mov	x1, x19
-	adrp	x0, .LANCHOR124
-	add	x0, x0, :lo12:.LANCHOR124
+	adrp	x0, .LANCHOR126
+	add	x0, x0, :lo12:.LANCHOR126
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR125
+	adrp	x1, .LANCHOR127
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	ldrb	w0, [x1, #:lo12:.LANCHOR125]
+	ldrb	w0, [x1, #:lo12:.LANCHOR127]
 	add	w0, w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR125]
+	strb	w0, [x1, #:lo12:.LANCHOR127]
 	ret
 	.size	zftl_add_read_buf, .-zftl_add_read_buf
 	.section	.text.ftl_alloc_sblk,"ax",@progbits
@@ -6158,39 +6376,39 @@ ftl_alloc_sblk:
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1066
+	beq	.L1104
 	adrp	x0, .LANCHOR7
 	lsl	w22, w22, 1
 	ldr	x21, [x0, #:lo12:.LANCHOR7]
 	add	x21, x21, x19, uxth 2
 	ldrb	w0, [x21, 2]
 	tst	w0, 224
-	beq	.L1067
-	adrp	x1, .LANCHOR126
+	beq	.L1105
+	adrp	x1, .LANCHOR128
 	adrp	x0, .LC0
 	mov	w2, 827
-	add	x1, x1, :lo12:.LANCHOR126
+	add	x1, x1, :lo12:.LANCHOR128
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1067:
+.L1105:
 	ldrb	w0, [x21, 2]
 	bfi	w0, w20, 5, 3
 	ubfx	x1, x0, 3, 2
 	orr	w22, w22, w1
 	bfi	w0, w22, 3, 2
 	strb	w0, [x21, 2]
-.L1068:
+.L1106:
 	mov	w0, w19
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1066:
+.L1104:
 	bl	print_ftl_debug_info
-	adrp	x21, .LC67
+	adrp	x21, .LC69
 	mov	w2, w20
-	add	x21, x21, :lo12:.LC67
+	add	x21, x21, :lo12:.LC69
 	mov	w1, w19
 	mov	x0, x21
 	bl	printf
@@ -6204,27 +6422,27 @@ ftl_alloc_sblk:
 	bl	printf
 	bl	dump_all_list_info
 	mov	w2, 837
-	adrp	x1, .LANCHOR126
+	adrp	x1, .LANCHOR128
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR126
+	add	x1, x1, :lo12:.LANCHOR128
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L1068
+	b	.L1106
 	.size	ftl_alloc_sblk, .-ftl_alloc_sblk
 	.section	.text.sblk_init,"ax",@progbits
 	.align	2
 	.global	sblk_init
 	.type	sblk_init, %function
 sblk_init:
-	adrp	x1, .LANCHOR53
+	adrp	x1, .LANCHOR54
 	mov	w0, -1
-	strb	w0, [x1, #:lo12:.LANCHOR53]
-	adrp	x1, .LANCHOR122
-	strb	w0, [x1, #:lo12:.LANCHOR122]
-	adrp	x1, .LANCHOR127
-	strb	w0, [x1, #:lo12:.LANCHOR127]
-	adrp	x1, .LANCHOR66
-	strb	w0, [x1, #:lo12:.LANCHOR66]
+	strb	w0, [x1, #:lo12:.LANCHOR54]
+	adrp	x1, .LANCHOR124
+	strb	w0, [x1, #:lo12:.LANCHOR124]
+	adrp	x1, .LANCHOR129
+	strb	w0, [x1, #:lo12:.LANCHOR129]
+	adrp	x1, .LANCHOR67
+	strb	w0, [x1, #:lo12:.LANCHOR67]
 	mov	w0, 0
 	ret
 	.size	sblk_init, .-sblk_init
@@ -6234,25 +6452,25 @@ sblk_init:
 	.type	dump_sblk_queue, %function
 dump_sblk_queue:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LC68
-	add	x0, x0, :lo12:.LC68
+	adrp	x0, .LC70
+	add	x0, x0, :lo12:.LC70
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR53
+	adrp	x19, .LANCHOR54
 	str	x21, [sp, 32]
-	ldrb	w1, [x19, #:lo12:.LANCHOR53]
+	ldrb	w1, [x19, #:lo12:.LANCHOR54]
 	bl	printf
-	ldrb	w19, [x19, #:lo12:.LANCHOR53]
+	ldrb	w19, [x19, #:lo12:.LANCHOR54]
 	cmp	w19, 255
-	beq	.L1075
-	adrp	x1, .LANCHOR49
+	beq	.L1113
+	adrp	x1, .LANCHOR50
 	ubfiz	x19, x19, 6, 8
-	add	x1, x1, :lo12:.LANCHOR49
-	adrp	x21, .LC69
+	add	x1, x1, :lo12:.LANCHOR50
+	adrp	x21, .LC71
 	add	x19, x1, x19
-	add	x21, x21, :lo12:.LC69
+	add	x21, x21, :lo12:.LC71
 	mov	x20, x1
-.L1077:
+.L1115:
 	ldrb	w2, [x19, 58]
 	mov	x0, x21
 	ldrb	w1, [x19, 1]
@@ -6260,11 +6478,11 @@ dump_sblk_queue:
 	bl	printf
 	ldrb	w19, [x19]
 	cmp	w19, 255
-	beq	.L1075
+	beq	.L1113
 	ubfiz	x19, x19, 6, 8
 	add	x19, x20, x19
-	b	.L1077
-.L1075:
+	b	.L1115
+.L1113:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -6275,82 +6493,82 @@ dump_sblk_queue:
 	.global	queue_lun_state
 	.type	queue_lun_state, %function
 queue_lun_state:
-	adrp	x2, .LANCHOR53
-	ldrb	w2, [x2, #:lo12:.LANCHOR53]
+	adrp	x2, .LANCHOR54
+	ldrb	w2, [x2, #:lo12:.LANCHOR54]
 	cmp	w2, 255
-	beq	.L1093
-	adrp	x3, .LANCHOR99
-	adrp	x7, .LANCHOR49
-	add	x7, x7, :lo12:.LANCHOR49
-	adrp	x10, .L1089
-	ldrh	w8, [x3, #:lo12:.LANCHOR99]
+	beq	.L1131
+	adrp	x3, .LANCHOR102
+	adrp	x7, .LANCHOR50
+	add	x7, x7, :lo12:.LANCHOR50
+	adrp	x10, .L1127
+	ldrh	w8, [x3, #:lo12:.LANCHOR102]
 	mov	w3, 21
 	ubfx	x11, x0, 21, 3
-	add	x10, x10, :lo12:.L1089
+	add	x10, x10, :lo12:.L1127
 	sub	w4, w3, w8
 	mov	w3, 1
 	mov	x12, x7
 	lsl	w3, w3, w4
-	adrp	x4, .LANCHOR98
+	adrp	x4, .LANCHOR101
 	sub	w3, w3, #1
-	ldrb	w6, [x4, #:lo12:.LANCHOR98]
+	ldrb	w6, [x4, #:lo12:.LANCHOR101]
 	and	w3, w3, 65535
 	asr	w4, w0, w8
 	sub	w6, w6, #1
 	and	w6, w6, 65535
 	and	w4, w4, w6
 	and	w4, w4, w3
-.L1092:
+.L1130:
 	add	x0, x7, x2, lsl 6
 	ldr	w5, [x0, 40]
 	ubfx	x13, x5, 21, 3
 	cmp	w11, w13
-	bne	.L1087
+	bne	.L1125
 	lsr	w5, w5, w8
 	and	w5, w6, w5
 	and	w5, w3, w5
 	ldrb	w0, [x0, 58]
 	cmp	w4, w5
-	bne	.L1088
+	bne	.L1126
 	cmp	w1, 1
-	bne	.L1085
-	cmp	w0, 6
-	ccmp	w0, 8, 4, ne
-	beq	.L1087
+	bne	.L1123
+	cmp	w0, 7
+	ccmp	w0, 9, 4, ne
+	beq	.L1125
 	ret
-.L1088:
+.L1126:
 	cmp	w1, 3
-	bhi	.L1087
+	bhi	.L1125
 	ldrb	w5, [x10,w1,uxtw]
-	adr	x13, .Lrtx1089
+	adr	x13, .Lrtx1127
 	add	x5, x13, w5, sxtb #2
 	br	x5
-.Lrtx1089:
+.Lrtx1127:
 	.section	.rodata.queue_lun_state,"a",@progbits
 	.align	0
 	.align	2
-.L1089:
-	.byte	(.L1085 - .Lrtx1089) / 4
-	.byte	(.L1090 - .Lrtx1089) / 4
-	.byte	(.L1091 - .Lrtx1089) / 4
-	.byte	(.L1085 - .Lrtx1089) / 4
+.L1127:
+	.byte	(.L1123 - .Lrtx1127) / 4
+	.byte	(.L1128 - .Lrtx1127) / 4
+	.byte	(.L1129 - .Lrtx1127) / 4
+	.byte	(.L1123 - .Lrtx1127) / 4
 	.section	.text.queue_lun_state
-.L1090:
-	cmp	w0, 6
-	ccmp	w0, 8, 4, ne
-	beq	.L1087
+.L1128:
+	cmp	w0, 7
+	ccmp	w0, 9, 4, ne
+	beq	.L1125
 	ret
-.L1091:
-	cmp	w0, 10
-	bne	.L1085
-.L1087:
+.L1129:
+	cmp	w0, 11
+	bne	.L1123
+.L1125:
 	lsl	x2, x2, 6
 	ldrb	w2, [x12, x2]
 	cmp	w2, 255
-	bne	.L1092
-.L1093:
+	bne	.L1130
+.L1131:
 	mov	w0, 0
-.L1085:
+.L1123:
 	ret
 	.size	queue_lun_state, .-queue_lun_state
 	.section	.text.queue_remove_completed_req,"ax",@progbits
@@ -6358,87 +6576,87 @@ queue_lun_state:
 	.global	queue_remove_completed_req
 	.type	queue_remove_completed_req, %function
 queue_remove_completed_req:
-	adrp	x4, .LANCHOR122
-	adrp	x8, .LANCHOR66
-	adrp	x1, .LANCHOR53
-	adrp	x7, .LANCHOR127
-	adrp	x3, .LANCHOR49
-	ldrb	w14, [x4, #:lo12:.LANCHOR122]
-	add	x5, x3, :lo12:.LANCHOR49
-	ldrb	w2, [x1, #:lo12:.LANCHOR53]
-	ldrb	w12, [x8, #:lo12:.LANCHOR66]
+	adrp	x4, .LANCHOR124
+	adrp	x8, .LANCHOR67
+	adrp	x1, .LANCHOR54
+	adrp	x7, .LANCHOR129
+	adrp	x3, .LANCHOR50
+	ldrb	w14, [x4, #:lo12:.LANCHOR124]
+	add	x5, x3, :lo12:.LANCHOR50
+	ldrb	w2, [x1, #:lo12:.LANCHOR54]
+	ldrb	w12, [x8, #:lo12:.LANCHOR67]
 	mov	x11, x5
-	ldrb	w13, [x7, #:lo12:.LANCHOR127]
-	add	x16, x8, :lo12:.LANCHOR66
-	add	x7, x7, :lo12:.LANCHOR127
-	add	x10, x4, :lo12:.LANCHOR122
+	ldrb	w13, [x7, #:lo12:.LANCHOR129]
+	add	x16, x8, :lo12:.LANCHOR67
+	add	x7, x7, :lo12:.LANCHOR129
+	add	x10, x4, :lo12:.LANCHOR124
 	mov	w6, 0
 	mov	w15, -1
-.L1096:
+.L1134:
 	cmp	w2, 255
-	beq	.L1097
+	beq	.L1135
 	sbfiz	x8, x2, 6, 32
 	sxtw	x0, w2
 	add	x4, x5, x8
 	ldrb	w4, [x4, 58]
-	sub	w4, w4, #11
+	sub	w4, w4, #12
 	and	w4, w4, 255
 	cmp	w4, 1
-	bls	.L1098
-	cbz	w6, .L1095
-	strb	w2, [x1, #:lo12:.LANCHOR53]
+	bls	.L1136
+	cbz	w6, .L1133
+	strb	w2, [x1, #:lo12:.LANCHOR54]
 	ret
-.L1098:
+.L1136:
 	lsl	x6, x0, 6
 	ldrb	w2, [x5, x8]
 	add	x4, x5, x6
 	strb	w15, [x5, x6]
 	ldrb	w6, [x4, 59]
 	cmp	w6, 1
-	bne	.L1101
+	bne	.L1139
 	ldrh	w4, [x4, 50]
-	cbnz	w4, .L1109
+	cbnz	w4, .L1147
 	mov	w4, w14
 	mov	x6, x10
-.L1102:
+.L1140:
 	cmp	w4, 255
-	bne	.L1107
-	add	x3, x3, :lo12:.LANCHOR49
-	strb	w2, [x1, #:lo12:.LANCHOR53]
+	bne	.L1145
+	add	x3, x3, :lo12:.LANCHOR50
+	strb	w2, [x1, #:lo12:.LANCHOR54]
 	add	x0, x3, x0, lsl 6
 	ldrb	w0, [x0, 1]
 	strb	w0, [x6]
 	ret
-.L1101:
-	cbnz	w6, .L1103
+.L1139:
+	cbnz	w6, .L1141
 	ldr	w4, [x4, 36]
 	cmn	w4, #1
-	beq	.L1103
+	beq	.L1141
 	mov	w4, w13
 	mov	x6, x7
-	b	.L1102
-.L1109:
+	b	.L1140
+.L1147:
 	mov	w4, w12
 	mov	x6, x16
-	b	.L1102
-.L1107:
+	b	.L1140
+.L1145:
 	mov	w6, w4
 	sbfiz	x4, x4, 6, 32
 	ldrb	w4, [x11, x4]
 	cmp	w4, 255
-	bne	.L1107
+	bne	.L1145
 	add	x0, x11, x0, lsl 6
 	sbfiz	x6, x6, 6, 32
 	ldrb	w0, [x0, 1]
 	strb	w0, [x11, x6]
-.L1103:
+.L1141:
 	mov	w6, 1
-	b	.L1096
-.L1097:
-	cbz	w6, .L1095
+	b	.L1134
+.L1135:
+	cbz	w6, .L1133
 	mov	w0, -1
-	strb	w0, [x1, #:lo12:.LANCHOR53]
-.L1095:
+	strb	w0, [x1, #:lo12:.LANCHOR54]
+.L1133:
 	ret
 	.size	queue_remove_completed_req, .-queue_remove_completed_req
 	.section	.text.pm_alloc_new_blk,"ax",@progbits
@@ -6447,42 +6665,42 @@ queue_remove_completed_req:
 	.type	pm_alloc_new_blk, %function
 pm_alloc_new_blk:
 	stp	x29, x30, [sp, -64]!
-	adrp	x2, .LANCHOR73
+	adrp	x2, .LANCHOR76
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR97
+	adrp	x20, .LANCHOR100
 	stp	x21, x22, [sp, 32]
-	ldr	x1, [x20, #:lo12:.LANCHOR97]
-	ldrb	w2, [x2, #:lo12:.LANCHOR73]
+	ldr	x1, [x20, #:lo12:.LANCHOR100]
+	ldrb	w2, [x2, #:lo12:.LANCHOR76]
 	ldrh	w0, [x1, 690]
 	str	x23, [sp, 48]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	strh	w0, [x1, 690]
 	cmp	w2, w0
-	bls	.L1120
+	bls	.L1158
 	add	x0, x1, x0, sxtw 1
 	ldrh	w1, [x0, 672]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1121
-.L1120:
-	adrp	x19, .LC70
-	add	x19, x19, :lo12:.LC70
+	bne	.L1159
+.L1158:
+	adrp	x19, .LC72
+	add	x19, x19, :lo12:.LC72
 	adrp	x23, .LANCHOR7
-.L1133:
+.L1171:
 	mov	w0, 1
 	bl	ftl_alloc_sblk
 	mov	w1, 0
 	and	w21, w0, 65535
 	bl	ftl_erase_sblk
-	add	x14, x20, :lo12:.LANCHOR97
-	ldr	x1, [x20, #:lo12:.LANCHOR97]
+	add	x14, x20, :lo12:.LANCHOR100
+	ldr	x1, [x20, #:lo12:.LANCHOR100]
 	mov	w0, w21
 	add	x1, x1, 672
 	bl	ftl_get_blk_list_in_sblk
 	tst	w0, 65535
-	bne	.L1122
+	bne	.L1160
 	mov	w1, w21
 	mov	x0, x19
 	bl	printf
@@ -6491,58 +6709,58 @@ pm_alloc_new_blk:
 	ldrb	w0, [x1, 2]
 	orr	w0, w0, -32
 	strb	w0, [x1, 2]
-	b	.L1133
-.L1122:
+	b	.L1171
+.L1160:
 	ldr	x0, [x14]
-	adrp	x1, .LANCHOR128
+	adrp	x1, .LANCHOR130
 	mov	w2, 1
 	mov	w19, 0
 	add	x0, x0, 416
-	str	w2, [x1, #:lo12:.LANCHOR128]
+	str	w2, [x1, #:lo12:.LANCHOR130]
 	mov	w1, 65535
 	strh	wzr, [x0, 274]
-.L1124:
+.L1162:
 	ldrh	w2, [x0]
 	cmp	w2, w1
-	beq	.L1123
+	beq	.L1161
 	add	w19, w19, 1
 	add	x0, x0, 2
 	and	w19, w19, 65535
 	cmp	w19, 128
-	bne	.L1124
-	adrp	x1, .LANCHOR129
+	bne	.L1162
+	adrp	x1, .LANCHOR131
 	adrp	x0, .LC0
 	mov	w2, 194
-	add	x1, x1, :lo12:.LANCHOR129
+	add	x1, x1, :lo12:.LANCHOR131
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1123:
-	ldr	x0, [x20, #:lo12:.LANCHOR97]
+.L1161:
+	ldr	x0, [x20, #:lo12:.LANCHOR100]
 	add	x19, x0, x19, sxtw 1
 	ldrh	w1, [x0, 688]
 	strh	w21, [x19, 416]
 	add	w1, w1, 1
 	strh	w1, [x0, 688]
-.L1121:
-	ldr	x1, [x20, #:lo12:.LANCHOR97]
+.L1159:
+	ldr	x1, [x20, #:lo12:.LANCHOR100]
 	ldrh	w0, [x1, 690]
 	add	x0, x0, 336
 	ldrh	w19, [x1, x0, lsl 1]
 	mov	w0, 65533
 	sub	w1, w19, #1
 	cmp	w0, w1, uxth
-	bcs	.L1126
-	adrp	x1, .LANCHOR129
+	bcs	.L1164
+	adrp	x1, .LANCHOR131
 	adrp	x0, .LC0
 	mov	w2, 199
-	add	x1, x1, :lo12:.LANCHOR129
+	add	x1, x1, :lo12:.LANCHOR131
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1126:
-	adrp	x1, .LANCHOR99
-	ldr	x0, [x20, #:lo12:.LANCHOR97]
+.L1164:
+	adrp	x1, .LANCHOR102
+	ldr	x0, [x20, #:lo12:.LANCHOR100]
 	mov	w2, 21
-	ldrh	w1, [x1, #:lo12:.LANCHOR99]
+	ldrh	w1, [x1, #:lo12:.LANCHOR102]
 	sub	w2, w2, w1
 	strh	wzr, [x0, 696]
 	strh	w19, [x0, 692]
@@ -6550,17 +6768,17 @@ pm_alloc_new_blk:
 	strh	w4, [x0, 694]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1129
+	tbz	x0, 12, .L1167
 	mov	w0, 1
 	and	w4, w4, 65535
 	lsl	w2, w0, w2
 	mov	w3, w19
-	adrp	x0, .LC71
+	adrp	x0, .LC73
 	sub	w2, w2, #1
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC71
+	add	x0, x0, :lo12:.LC73
 	bl	printf
-.L1129:
+.L1167:
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -6574,73 +6792,87 @@ pm_alloc_new_blk:
 	.type	pm_select_ram_region, %function
 pm_select_ram_region:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR130
-	add	x0, x0, :lo12:.LANCHOR130
+	adrp	x0, .LANCHOR132
+	add	x0, x0, :lo12:.LANCHOR132
 	mov	x1, 0
 	add	x29, sp, 0
 	mov	w2, 65535
 	str	x19, [sp, 16]
-.L1138:
+.L1176:
 	lsl	x3, x1, 4
 	and	w19, w1, 65535
 	ldrh	w3, [x3, x0]
 	cmp	w3, w2
-	beq	.L1137
+	beq	.L1175
 	add	x1, x1, 1
 	cmp	x1, 32
-	bne	.L1138
+	bne	.L1176
 	add	x0, x0, 2
 	mov	w19, w1
 	mov	x2, x0
 	mov	w4, 32768
 	mov	w1, 0
-.L1140:
+.L1178:
 	ldrh	w3, [x2]
-	tbnz	x3, 15, .L1139
+	tbnz	x3, 15, .L1177
 	cmp	w3, w4
-	bcs	.L1139
+	bcs	.L1177
 	mov	w4, w3
 	mov	w19, w1
-.L1139:
+.L1177:
 	add	w1, w1, 1
 	add	x2, x2, 16
 	and	w1, w1, 65535
 	cmp	w1, 32
-	bne	.L1140
+	bne	.L1178
 	cmp	w19, 32
-	bne	.L1137
-	adrp	x1, .LANCHOR131
+	bne	.L1175
+	adrp	x1, .LANCHOR133
 	mov	w2, -1
-	ldrb	w3, [x1, #:lo12:.LANCHOR131]
+	ldrb	w3, [x1, #:lo12:.LANCHOR133]
 	mov	w1, 0
-.L1142:
+.L1180:
 	ldrh	w5, [x0]
 	cmp	w5, w2
-	bcs	.L1141
+	bcs	.L1179
 	ldrh	w4, [x0, -2]
 	cmp	w4, w3
 	csel	w2, w2, w5, eq
 	csel	w19, w19, w1, eq
-.L1141:
+.L1179:
 	add	w1, w1, 1
 	add	x0, x0, 16
 	and	w1, w1, 65535
 	cmp	w1, 32
-	bne	.L1142
+	bne	.L1180
 	cmp	w19, 32
-	bne	.L1137
-	adrp	x1, .LANCHOR132
+	bne	.L1175
+	adrp	x1, .LANCHOR134
 	adrp	x0, .LC0
 	mov	w2, 297
-	add	x1, x1, :lo12:.LANCHOR132
+	add	x1, x1, :lo12:.LANCHOR134
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1137:
+.L1175:
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
 	.size	pm_select_ram_region, .-pm_select_ram_region
+	.section	.text.idb_init,"ax",@progbits
+	.align	2
+	.global	idb_init
+	.type	idb_init, %function
+idb_init:
+	adrp	x0, .LANCHOR135
+	str	xzr, [x0, #:lo12:.LANCHOR135]
+	adrp	x0, .LANCHOR136
+	str	wzr, [x0, #:lo12:.LANCHOR136]
+	adrp	x0, .LANCHOR137
+	str	xzr, [x0, #:lo12:.LANCHOR137]
+	mov	w0, 0
+	ret
+	.size	idb_init, .-idb_init
 	.section	.text.ftl_memset,"ax",@progbits
 	.align	2
 	.global	ftl_memset
@@ -6658,59 +6890,59 @@ flash_lsb_page_tbl_build:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR3
-	cbnz	w0, .L1149
+	cbnz	w0, .L1188
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1150:
+.L1189:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 256
-	bne	.L1150
-.L1156:
-	adrp	x20, .LANCHOR133
-	add	x20, x20, :lo12:.LANCHOR133
+	bne	.L1189
+.L1195:
+	adrp	x20, .LANCHOR138
+	add	x20, x20, :lo12:.LANCHOR138
 	mov	w2, 1024
 	mov	w1, 255
 	mov	x0, x20
 	add	x19, x19, :lo12:.LANCHOR3
 	bl	ftl_memset
 	mov	x0, 0
-.L1151:
+.L1190:
 	ldrh	w1, [x0, x19]
 	add	x0, x0, 2
 	cmp	x0, 512
 	strh	w1, [x20, w1, sxtw 1]
-	bne	.L1151
+	bne	.L1190
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1149:
+.L1188:
 	cmp	w0, 1
-	bne	.L1152
+	bne	.L1191
 	add	x3, x19, :lo12:.LANCHOR3
 	mov	x1, 0
-.L1155:
+.L1194:
 	and	w0, w1, 65535
 	cmp	x1, 3
-	bls	.L1153
+	bls	.L1192
 	ubfiz	w2, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 2
 	sub	w0, w2, w0
 	and	w0, w0, 65535
-.L1153:
+.L1192:
 	strh	w0, [x3, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L1155
-	b	.L1156
-.L1152:
+	bne	.L1194
+	b	.L1195
+.L1191:
 	cmp	w0, 2
-	bne	.L1157
+	bne	.L1196
 	add	x3, x19, :lo12:.LANCHOR3
 	mov	w1, 65535
 	mov	x0, 0
-.L1159:
+.L1198:
 	cmp	x0, 2
 	and	w2, w0, 65535
 	csel	w2, w2, w1, cc
@@ -6719,31 +6951,31 @@ flash_lsb_page_tbl_build:
 	add	x0, x0, 1
 	and	w1, w1, 65535
 	cmp	x0, 256
-	bne	.L1159
-	b	.L1156
-.L1157:
+	bne	.L1198
+	b	.L1195
+.L1196:
 	cmp	w0, 3
-	bne	.L1160
+	bne	.L1199
 	add	x3, x19, :lo12:.LANCHOR3
 	mov	x1, 0
-.L1163:
+.L1202:
 	and	w0, w1, 65535
 	cmp	x1, 5
-	bls	.L1161
+	bls	.L1200
 	ubfiz	w2, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 4
 	sub	w0, w2, w0
 	and	w0, w0, 65535
-.L1161:
+.L1200:
 	strh	w0, [x3, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L1163
-	b	.L1156
-.L1160:
+	bne	.L1202
+	b	.L1195
+.L1199:
 	cmp	w0, 4
-	bne	.L1164
+	bne	.L1203
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	w2, 1
 	add	x1, x1, 16
@@ -6761,7 +6993,7 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1, -10]
 	strh	w0, [x1, -2]
 	mov	w0, 8
-.L1166:
+.L1205:
 	and	w3, w0, 1
 	ubfiz	w2, w0, 1, 15
 	add	w3, w3, 6
@@ -6770,37 +7002,55 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1], 2
 	and	w0, w0, 65535
 	cmp	w0, 256
-	bne	.L1166
-	b	.L1156
-.L1164:
+	bne	.L1205
+	b	.L1195
+.L1203:
 	cmp	w0, 5
-	bne	.L1167
+	bne	.L1206
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1168:
+.L1207:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 16
-	bne	.L1168
+	bne	.L1207
 	add	x1, x1, 32
-.L1169:
+.L1208:
 	strh	w0, [x1], 2
 	add	w0, w0, 2
 	and	w0, w0, 65535
 	cmp	w0, 496
-	bne	.L1169
-	b	.L1156
-.L1167:
+	bne	.L1208
+	b	.L1195
+.L1206:
 	cmp	w0, 8
-	bne	.L1156
+	bne	.L1209
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1170:
+.L1210:
 	strh	w0, [x0, x1]
 	add	x0, x0, 2
 	cmp	x0, 512
-	bne	.L1170
-	b	.L1156
+	bne	.L1210
+	b	.L1195
+.L1209:
+	cmp	w0, 9
+	bne	.L1195
+	add	x0, x19, :lo12:.LANCHOR3
+	mov	w1, 1
+	add	x0, x0, 6
+	strh	wzr, [x19, #:lo12:.LANCHOR3]
+	strh	w1, [x0, -4]
+	mov	w1, 2
+	strh	w1, [x0, -2]
+	mov	w1, 3
+.L1211:
+	strh	w1, [x0], 2
+	add	w1, w1, 2
+	and	w1, w1, 65535
+	cmp	w1, 509
+	bne	.L1211
+	b	.L1195
 	.size	flash_lsb_page_tbl_build, .-flash_lsb_page_tbl_build
 	.section	.text.flash_die_info_init,"ax",@progbits
 	.align	2
@@ -6814,54 +7064,54 @@ flash_die_info_init:
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	tbz	x0, 12, .L1186
-	adrp	x1, .LANCHOR134
+	tbz	x0, 12, .L1228
+	adrp	x1, .LANCHOR139
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR134
+	add	x1, x1, :lo12:.LANCHOR139
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1186:
-	adrp	x22, .LANCHOR34
-	add	x19, x22, :lo12:.LANCHOR34
+.L1228:
+	adrp	x22, .LANCHOR30
+	add	x19, x22, :lo12:.LANCHOR30
 	adrp	x23, .LANCHOR2
 	adrp	x24, .LANCHOR18
 	adrp	x21, .LANCHOR29
 	mov	w2, 8
 	ldrh	w0, [x19, 26]
-	adrp	x20, .LANCHOR136
+	adrp	x20, .LANCHOR141
 	ldrb	w1, [x19, 12]
 	strh	w0, [x23, #:lo12:.LANCHOR2]
 	ldrh	w0, [x19, 10]
 	strb	wzr, [x24, #:lo12:.LANCHOR18]
 	sdiv	w0, w0, w1
-	adrp	x1, .LANCHOR135
-	strh	w0, [x1, #:lo12:.LANCHOR135]
+	adrp	x1, .LANCHOR140
+	strh	w0, [x1, #:lo12:.LANCHOR140]
 	mov	w1, 0
 	add	x0, x21, :lo12:.LANCHOR29
 	bl	ftl_memset
-	add	x0, x20, :lo12:.LANCHOR136
+	add	x0, x20, :lo12:.LANCHOR141
 	mov	w2, 32
 	mov	w1, 0
 	bl	ftl_memset
 	mov	x15, x21
 	mov	x11, x20
-	adrp	x12, .LANCHOR35
+	adrp	x12, .LANCHOR31
 	adrp	x14, .LANCHOR41
 	mov	x7, x22
-	add	x12, x12, :lo12:.LANCHOR35
+	add	x12, x12, :lo12:.LANCHOR31
 	add	x20, x14, :lo12:.LANCHOR41
 	add	x21, x19, 1
 	mov	x10, 0
-.L1188:
+.L1230:
 	ldrb	w2, [x19]
 	mov	w0, 2
 	strb	w0, [x10, x12]
 	add	x1, x20, x10, lsl 3
 	mov	x0, x21
 	bl	flash_mem_cmp8
-	cbnz	w0, .L1187
+	cbnz	w0, .L1229
 	ldrb	w2, [x24, #:lo12:.LANCHOR18]
-	add	x1, x11, :lo12:.LANCHOR136
+	add	x1, x11, :lo12:.LANCHOR141
 	add	w0, w2, 1
 	strb	w0, [x24, #:lo12:.LANCHOR18]
 	and	w0, w10, 255
@@ -6869,16 +7119,16 @@ flash_die_info_init:
 	add	x1, x15, :lo12:.LANCHOR29
 	strb	w0, [x1, x2]
 	bl	zftl_flash_enter_slc_mode
-.L1187:
+.L1229:
 	add	x10, x10, 1
 	cmp	x10, 4
-	bne	.L1188
-	add	x0, x7, :lo12:.LANCHOR34
+	bne	.L1230
+	add	x0, x7, :lo12:.LANCHOR30
 	ldrb	w1, [x0, 8]
 	cmp	w1, 2
-	beq	.L1189
-.L1193:
-	add	x7, x7, :lo12:.LANCHOR34
+	beq	.L1231
+.L1235:
+	add	x7, x7, :lo12:.LANCHOR30
 	ldrb	w0, [x24, #:lo12:.LANCHOR18]
 	ldp	x19, x20, [sp, 16]
 	ldrb	w1, [x7, 13]
@@ -6888,18 +7138,18 @@ flash_die_info_init:
 	ldrh	w1, [x7, 14]
 	ldp	x29, x30, [sp], 64
 	mul	w0, w0, w1
-	adrp	x1, .LANCHOR137
-	strh	w0, [x1, #:lo12:.LANCHOR137]
+	adrp	x1, .LANCHOR142
+	strh	w0, [x1, #:lo12:.LANCHOR142]
 	ret
-.L1189:
+.L1231:
 	ldrh	w1, [x23, #:lo12:.LANCHOR2]
 	add	x14, x14, :lo12:.LANCHOR41
 	ldrb	w12, [x0, 13]
 	add	x10, x0, 1
-	ldrb	w20, [x7, #:lo12:.LANCHOR34]
+	ldrb	w20, [x7, #:lo12:.LANCHOR30]
 	add	x19, x24, :lo12:.LANCHOR18
 	ldrb	w21, [x0, 23]
-	add	x11, x11, :lo12:.LANCHOR136
+	add	x11, x11, :lo12:.LANCHOR141
 	add	x15, x15, :lo12:.LANCHOR29
 	mov	x13, 0
 	mul	w12, w12, w1
@@ -6907,12 +7157,12 @@ flash_die_info_init:
 	and	w1, w1, 65280
 	mul	w12, w12, w1
 	lsl	w22, w12, 1
-.L1192:
+.L1234:
 	mov	w2, w20
 	add	x1, x14, x13, lsl 3
 	mov	x0, x10
 	bl	flash_mem_cmp8
-	cbnz	w0, .L1190
+	cbnz	w0, .L1232
 	ldrb	w1, [x19]
 	cmp	w21, 0
 	csel	w2, w12, w22, eq
@@ -6920,11 +7170,11 @@ flash_die_info_init:
 	strb	w0, [x19]
 	str	w2, [x11, x1, lsl 2]
 	strb	w13, [x15, x1]
-.L1190:
+.L1232:
 	add	x13, x13, 1
 	cmp	x13, 4
-	bne	.L1192
-	b	.L1193
+	bne	.L1234
+	b	.L1235
 	.size	flash_die_info_init, .-flash_die_info_init
 	.section	.text.lpa_hash_init,"ax",@progbits
 	.align	2
@@ -6934,19 +7184,19 @@ lpa_hash_init:
 	stp	x29, x30, [sp, -16]!
 	mov	w2, 512
 	mov	w1, 255
-	adrp	x0, .LANCHOR110
+	adrp	x0, .LANCHOR112
 	add	x29, sp, 0
-	add	x0, x0, :lo12:.LANCHOR110
+	add	x0, x0, :lo12:.LANCHOR112
 	bl	ftl_memset
-	adrp	x0, .LANCHOR80
+	adrp	x0, .LANCHOR83
 	mov	w1, 255
 	ldp	x29, x30, [sp], 16
-	ldrh	w2, [x0, #:lo12:.LANCHOR80]
-	adrp	x0, .LANCHOR73
-	ldrb	w0, [x0, #:lo12:.LANCHOR73]
+	ldrh	w2, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR76
+	ldrb	w0, [x0, #:lo12:.LANCHOR76]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR112
-	ldr	x0, [x0, #:lo12:.LANCHOR112]
+	adrp	x0, .LANCHOR114
+	ldr	x0, [x0, #:lo12:.LANCHOR114]
 	lsl	w2, w2, 2
 	b	ftl_memset
 	.size	lpa_hash_init, .-lpa_hash_init
@@ -6961,59 +7211,59 @@ lpa_rebuild_hash:
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	tbz	x0, 12, .L1206
-	adrp	x1, .LANCHOR138
-	adrp	x0, .LC72
+	tbz	x0, 12, .L1248
+	adrp	x1, .LANCHOR143
+	adrp	x0, .LC74
 	mov	w3, 0
-	mov	w2, 222
-	add	x1, x1, :lo12:.LANCHOR138
-	add	x0, x0, :lo12:.LC72
+	mov	w2, 224
+	add	x1, x1, :lo12:.LANCHOR143
+	add	x0, x0, :lo12:.LC74
 	bl	printf
-.L1206:
-	adrp	x20, .LANCHOR80
-	adrp	x22, .LANCHOR73
-	adrp	x19, .LANCHOR110
-	add	x19, x19, :lo12:.LANCHOR110
+.L1248:
+	adrp	x20, .LANCHOR83
+	adrp	x22, .LANCHOR76
+	adrp	x19, .LANCHOR112
+	add	x19, x19, :lo12:.LANCHOR112
 	mov	w2, 512
 	mov	w1, 255
 	mov	x0, x19
 	bl	ftl_memset
-	ldrh	w2, [x20, #:lo12:.LANCHOR80]
-	adrp	x21, .LANCHOR112
-	ldrb	w0, [x22, #:lo12:.LANCHOR73]
+	ldrh	w2, [x20, #:lo12:.LANCHOR83]
+	adrp	x21, .LANCHOR114
+	ldrb	w0, [x22, #:lo12:.LANCHOR76]
 	mov	w1, 255
-	add	x20, x20, :lo12:.LANCHOR80
+	add	x20, x20, :lo12:.LANCHOR83
 	mul	w2, w2, w0
-	ldr	x0, [x21, #:lo12:.LANCHOR112]
+	ldr	x0, [x21, #:lo12:.LANCHOR114]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	adrp	x0, .LANCHOR111
-	ldrb	w3, [x22, #:lo12:.LANCHOR73]
-	ldr	x5, [x21, #:lo12:.LANCHOR112]
+	adrp	x0, .LANCHOR113
+	ldrb	w3, [x22, #:lo12:.LANCHOR76]
+	ldr	x5, [x21, #:lo12:.LANCHOR114]
 	mov	w1, 0
-	ldr	x4, [x0, #:lo12:.LANCHOR111]
-.L1207:
+	ldr	x4, [x0, #:lo12:.LANCHOR113]
+.L1249:
 	ldrh	w0, [x20]
 	mul	w0, w0, w3
 	cmp	w1, w0, lsl 1
-	blt	.L1209
+	blt	.L1251
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1209:
+.L1251:
 	uxtw	x2, w1
 	ldr	w0, [x4, x2, lsl 2]
 	cmn	w0, #1
-	beq	.L1208
+	beq	.L1250
 	and	x0, x0, 255
 	ldrh	w6, [x19, x0, lsl 1]
 	strh	w1, [x19, x0, lsl 1]
 	strh	w6, [x5, x2, lsl 1]
-.L1208:
+.L1250:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L1207
+	b	.L1249
 	.size	lpa_rebuild_hash, .-lpa_rebuild_hash
 	.section	.text.zftl_read_flash_info,"ax",@progbits
 	.align	2
@@ -7027,10 +7277,10 @@ zftl_read_flash_info:
 	str	x19, [sp, 16]
 	mov	x19, x0
 	bl	ftl_memset
-	adrp	x1, .LANCHOR34
-	add	x1, x1, :lo12:.LANCHOR34
+	adrp	x1, .LANCHOR30
+	add	x1, x1, :lo12:.LANCHOR30
 	adrp	x0, .LANCHOR2
-	adrp	x3, .LANCHOR58
+	adrp	x3, .LANCHOR59
 	strb	wzr, [x19, 10]
 	mov	w4, 1
 	ldrb	w2, [x1, 9]
@@ -7042,8 +7292,8 @@ zftl_read_flash_info:
 	adrp	x0, .LANCHOR43
 	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	strb	w0, [x19, 7]
-	add	x0, x3, :lo12:.LANCHOR58
-	ldrb	w3, [x3, #:lo12:.LANCHOR58]
+	add	x0, x3, :lo12:.LANCHOR59
+	ldrb	w3, [x3, #:lo12:.LANCHOR59]
 	strb	w3, [x19]
 	ldrb	w3, [x0, 1]
 	strb	w3, [x19, 1]
@@ -7061,20 +7311,20 @@ zftl_read_flash_info:
 	strb	w0, [x19, 9]
 	adrp	x0, .LANCHOR18
 	ldrb	w3, [x0, #:lo12:.LANCHOR18]
-.L1218:
+.L1260:
 	cmp	w3, w1, uxtb
-	bhi	.L1219
+	bhi	.L1261
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1219:
+.L1261:
 	ldrb	w0, [x1, x2]
 	add	x1, x1, 1
 	ldrb	w5, [x19, 10]
 	lsl	w0, w4, w0
 	orr	w0, w0, w5
 	strb	w0, [x19, 10]
-	b	.L1218
+	b	.L1260
 	.size	zftl_read_flash_info, .-zftl_read_flash_info
 	.section	.text.gc_static_wearleveling,"ax",@progbits
 	.align	2
@@ -7084,18 +7334,18 @@ gc_static_wearleveling:
 	stp	x29, x30, [sp, -160]!
 	add	x29, sp, 0
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR97
+	adrp	x25, .LANCHOR100
 	stp	x19, x20, [sp, 16]
-	ldr	x0, [x25, #:lo12:.LANCHOR97]
+	ldr	x0, [x25, #:lo12:.LANCHOR100]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	stp	x27, x28, [sp, 80]
 	ldr	w1, [x0, 32]
 	mov	w0, 10240
 	cmp	w1, w0
-	bls	.L1222
+	bls	.L1264
 	bl	ftl_tmp_into_update
-.L1222:
+.L1264:
 	adrp	x19, .LANCHOR10
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldr	w1, [x0, 568]
@@ -7103,15 +7353,15 @@ gc_static_wearleveling:
 	add	w1, w1, 860160
 	add	w1, w1, 3840
 	cmp	w2, w1
-	bhi	.L1223
-	ldr	x3, [x25, #:lo12:.LANCHOR97]
+	bhi	.L1265
+	ldr	x3, [x25, #:lo12:.LANCHOR100]
 	ldr	w1, [x0, 572]
 	add	w1, w1, 32
 	ldr	w3, [x3, 36]
 	cmp	w3, w1
-	bls	.L1272
-.L1223:
-	ldr	x1, [x25, #:lo12:.LANCHOR97]
+	bls	.L1314
+.L1265:
+	ldr	x1, [x25, #:lo12:.LANCHOR100]
 	mov	w20, 65535
 	adrp	x8, .LANCHOR14
 	mov	w21, w20
@@ -7130,10 +7380,10 @@ gc_static_wearleveling:
 	str	wzr, [x29, 136]
 	stp	wzr, wzr, [x29, 148]
 	str	wzr, [x29, 156]
-.L1225:
+.L1267:
 	ldrh	w0, [x10]
 	cmp	w0, w24
-	bhi	.L1234
+	bhi	.L1276
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w2, 128
 	mov	w1, 255
@@ -7148,14 +7398,14 @@ gc_static_wearleveling:
 	mov	x1, x5
 	lsl	x0, x5, 2
 	add	x26, x2, x0
-	tbz	x3, 10, .L1235
+	tbz	x3, 10, .L1277
 	adrp	x3, .LANCHOR9
 	ldrb	w4, [x26, 2]
 	ldr	x6, [x3, #:lo12:.LANCHOR9]
 	ldr	w3, [x2, x0]
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC74
-	add	x0, x0, :lo12:.LC74
+	adrp	x0, .LC76
+	add	x0, x0, :lo12:.LC76
 	ldrh	w7, [x6, x5, lsl 1]
 	ubfx	x3, x3, 11, 8
 	ldrb	w6, [x26, 3]
@@ -7163,22 +7413,22 @@ gc_static_wearleveling:
 	and	w2, w2, 2047
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1235:
+.L1277:
 	ldrb	w0, [x26, 2]
-	tbz	x0, 3, .L1236
+	tbz	x0, 3, .L1278
 	ldrb	w0, [x26, 2]
 	and	w1, w0, 192
 	cmp	w1, 64
-	bne	.L1237
+	bne	.L1279
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w1, 0
 	mov	w2, 1
 	ldrh	w0, [x0, 586]
 	bl	gc_add_sblk
-	adrp	x0, .LANCHOR62+318
+	adrp	x0, .LANCHOR63+318
 	mov	w1, 1
-	strh	w1, [x0, #:lo12:.LANCHOR62+318]
-.L1236:
+	strh	w1, [x0, #:lo12:.LANCHOR63+318]
+.L1278:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldr	w3, [x24, #:lo12:.LANCHOR14]
 	ldr	x2, [x23, #:lo12:.LANCHOR7]
@@ -7186,14 +7436,14 @@ gc_static_wearleveling:
 	mov	x1, x5
 	lsl	x0, x5, 2
 	add	x26, x2, x0
-	tbz	x3, 10, .L1238
+	tbz	x3, 10, .L1280
 	adrp	x3, .LANCHOR9
 	ldrb	w4, [x26, 2]
 	ldr	x6, [x3, #:lo12:.LANCHOR9]
 	ldr	w3, [x2, x0]
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC75
-	add	x0, x0, :lo12:.LC75
+	adrp	x0, .LC77
+	add	x0, x0, :lo12:.LC77
 	ldrh	w7, [x6, x5, lsl 1]
 	ubfx	x3, x3, 11, 8
 	ldrb	w6, [x26, 3]
@@ -7201,24 +7451,24 @@ gc_static_wearleveling:
 	and	w2, w2, 2047
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1238:
+.L1280:
 	ldrb	w0, [x26, 2]
-	tbz	x0, 3, .L1239
+	tbz	x0, 3, .L1281
 	ldrb	w0, [x26, 2]
 	and	w1, w0, 192
 	cmp	w1, 64
-	bne	.L1240
+	bne	.L1282
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w1, 0
 	mov	w2, 1
 	ldrh	w0, [x0, 584]
 	bl	gc_add_sblk
-	adrp	x0, .LANCHOR62+318
+	adrp	x0, .LANCHOR63+318
 	mov	w1, 1
-	strh	w1, [x0, #:lo12:.LANCHOR62+318]
-.L1239:
+	strh	w1, [x0, #:lo12:.LANCHOR63+318]
+.L1281:
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1241
+	tbz	x0, 10, .L1283
 	ldr	w6, [x29, 128]
 	adrp	x2, .LANCHOR9
 	ldr	x1, [x23, #:lo12:.LANCHOR7]
@@ -7227,9 +7477,9 @@ gc_static_wearleveling:
 	add	x5, x1, x0
 	ldr	w3, [x1, x0]
 	ldrh	w2, [x1, x0]
-	adrp	x0, .LC76
+	adrp	x0, .LC78
 	ldrh	w7, [x7, x6, lsl 1]
-	add	x0, x0, :lo12:.LC76
+	add	x0, x0, :lo12:.LC78
 	ldrb	w6, [x5, 3]
 	ubfx	x3, x3, 11, 8
 	ldr	w1, [x29, 128]
@@ -7238,9 +7488,9 @@ gc_static_wearleveling:
 	ubfx	x5, x4, 5, 3
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1241:
+.L1283:
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1242
+	tbz	x0, 10, .L1284
 	ldr	w6, [x29, 136]
 	adrp	x2, .LANCHOR9
 	ldr	x1, [x23, #:lo12:.LANCHOR7]
@@ -7249,9 +7499,9 @@ gc_static_wearleveling:
 	add	x5, x1, x0
 	ldr	w3, [x1, x0]
 	ldrh	w2, [x1, x0]
-	adrp	x0, .LC77
+	adrp	x0, .LC79
 	ldrh	w7, [x7, x6, lsl 1]
-	add	x0, x0, :lo12:.LC77
+	add	x0, x0, :lo12:.LC79
 	ldrb	w6, [x5, 3]
 	ubfx	x3, x3, 11, 8
 	ldr	w1, [x29, 136]
@@ -7260,8 +7510,8 @@ gc_static_wearleveling:
 	ubfx	x5, x4, 5, 3
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1242:
-	ldr	x0, [x25, #:lo12:.LANCHOR97]
+.L1284:
+	ldr	x0, [x25, #:lo12:.LANCHOR100]
 	ldrh	w1, [x29, 156]
 	strh	w1, [x0, 96]
 	ldr	w1, [x29, 148]
@@ -7274,126 +7524,126 @@ gc_static_wearleveling:
 	strh	w3, [x0, 88]
 	strh	w4, [x0, 90]
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1243
-	adrp	x0, .LC78
+	tbz	x0, 10, .L1285
+	adrp	x0, .LC80
 	and	w4, w4, 65535
 	and	w3, w3, 65535
 	mov	w2, w28
 	mov	w1, w27
-	add	x0, x0, :lo12:.LC78
+	add	x0, x0, :lo12:.LC80
 	bl	printf
-.L1243:
+.L1285:
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1244
-	adrp	x0, .LANCHOR139
+	tbz	x0, 10, .L1286
+	adrp	x0, .LANCHOR144
 	ldr	w3, [x29, 156]
 	mov	w4, w22
 	mov	w2, w21
-	ldrh	w6, [x0, #:lo12:.LANCHOR139]
-	adrp	x0, .LANCHOR140
+	ldrh	w6, [x0, #:lo12:.LANCHOR144]
+	adrp	x0, .LANCHOR145
 	mov	w1, w20
-	ldrh	w5, [x0, #:lo12:.LANCHOR140]
-	adrp	x0, .LC79
-	add	x0, x0, :lo12:.LC79
+	ldrh	w5, [x0, #:lo12:.LANCHOR145]
+	adrp	x0, .LC81
+	add	x0, x0, :lo12:.LC81
 	bl	printf
-.L1244:
+.L1286:
 	sub	w0, w22, w21
 	str	w0, [x29, 148]
-	adrp	x0, .LANCHOR139
+	adrp	x0, .LANCHOR144
 	ldr	w1, [x29, 148]
-	ldrh	w0, [x0, #:lo12:.LANCHOR139]
+	ldrh	w0, [x0, #:lo12:.LANCHOR144]
 	cmp	w1, w0
-	bgt	.L1245
-	adrp	x1, .LANCHOR140
+	bgt	.L1287
+	adrp	x1, .LANCHOR145
 	ldr	w0, [x29, 156]
-	ldrh	w1, [x1, #:lo12:.LANCHOR140]
+	ldrh	w1, [x1, #:lo12:.LANCHOR145]
 	sub	w0, w0, w20
 	cmp	w0, w1
-	ble	.L1273
-.L1245:
+	ble	.L1315
+.L1287:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
-	adrp	x28, .LANCHOR62
-	add	x28, x28, :lo12:.LANCHOR62
+	adrp	x28, .LANCHOR63
+	add	x28, x28, :lo12:.LANCHOR63
 	mov	w27, 0
 	mov	w22, 0
 	ldrh	w26, [x0, 580]
-	ldr	x0, [x25, #:lo12:.LANCHOR97]
+	ldr	x0, [x25, #:lo12:.LANCHOR100]
 	ldrh	w0, [x0, 134]
 	str	w0, [x29, 152]
 	adrp	x0, .LANCHOR6
 	add	x0, x0, :lo12:.LANCHOR6
 	str	x0, [x29, 136]
-	adrp	x0, .LANCHOR140
-	add	x0, x0, :lo12:.LANCHOR140
+	adrp	x0, .LANCHOR145
+	add	x0, x0, :lo12:.LANCHOR145
 	str	x0, [x29, 128]
-.L1247:
+.L1289:
 	ldr	x0, [x29, 136]
 	ldr	w1, [x29, 152]
 	ldrh	w0, [x0]
 	cmp	w1, w0
-	bcc	.L1257
-.L1256:
+	bcc	.L1299
+.L1298:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	str	w26, [x0, 580]
-.L1246:
-	cbz	w21, .L1259
-	ldr	x2, [x25, #:lo12:.LANCHOR97]
+.L1288:
+	cbz	w21, .L1301
+	ldr	x2, [x25, #:lo12:.LANCHOR100]
 	adrp	x0, .LANCHOR6
 	ldrh	w5, [x0, #:lo12:.LANCHOR6]
 	ldr	x0, [x23, #:lo12:.LANCHOR7]
 	ldrh	w1, [x2, 134]
 	add	x0, x0, x1, uxth 2
-.L1260:
+.L1302:
 	cmp	w1, w5
-	bcc	.L1262
+	bcc	.L1304
 	ldrh	w0, [x2, 72]
 	add	w0, w21, w0
 	strh	w0, [x2, 72]
 	ldrh	w0, [x2, 98]
 	cmp	w21, w0
-	bcs	.L1259
+	bcs	.L1301
 	sub	w21, w0, w21
 	strh	w21, [x2, 98]
-.L1259:
-	cbz	w20, .L1265
-	ldr	x2, [x25, #:lo12:.LANCHOR97]
+.L1301:
+	cbz	w20, .L1307
+	ldr	x2, [x25, #:lo12:.LANCHOR100]
 	adrp	x0, .LANCHOR6
 	ldrh	w6, [x0, #:lo12:.LANCHOR6]
 	ldr	x0, [x23, #:lo12:.LANCHOR7]
 	ldrh	w1, [x2, 134]
 	add	x0, x0, x1, uxth 2
-.L1266:
+.L1308:
 	cmp	w1, w6
-	bcc	.L1268
+	bcc	.L1310
 	ldrh	w0, [x2, 74]
 	add	w0, w20, w0
 	strh	w0, [x2, 74]
 	ldrh	w0, [x2, 96]
 	cmp	w20, w0
-	bcs	.L1265
+	bcs	.L1307
 	sub	w20, w0, w20
 	strh	w20, [x2, 96]
-.L1265:
+.L1307:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L1224
+	beq	.L1266
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x1]
-	adrp	x1, .LANCHOR80
-	ldrh	w1, [x1, #:lo12:.LANCHOR80]
+	adrp	x1, .LANCHOR83
+	ldrh	w1, [x1, #:lo12:.LANCHOR83]
 	cmp	w2, w1
-	bhi	.L1224
+	bhi	.L1266
 	add	w22, w22, 1
 	mov	w2, 1
 	mov	w1, 0
 	bl	gc_add_sblk
-.L1224:
+.L1266:
 	add	w0, w22, w27
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -7402,7 +7652,7 @@ gc_static_wearleveling:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L1234:
+.L1276:
 	uxtw	x7, w24
 	ldr	x6, [x23, #:lo12:.LANCHOR7]
 	lsl	x2, x7, 2
@@ -7410,40 +7660,40 @@ gc_static_wearleveling:
 	ldrb	w0, [x11, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L1226
+	beq	.L1268
 	ubfx	x4, x0, 3, 2
-	tbz	x4, 0, .L1227
+	tbz	x4, 0, .L1269
 	ldr	w0, [x6, x2]
 	ldrh	w1, [x6, x2]
 	ubfx	x0, x0, 11, 8
 	and	w1, w1, 2047
-.L1228:
+.L1270:
 	ldr	w3, [x29, 148]
 	add	w27, w27, 1
 	and	w27, w27, 65535
 	cmp	w20, w1
 	add	w3, w3, w1
 	str	w3, [x29, 148]
-	bls	.L1271
+	bls	.L1313
 	ldr	x3, [x19, #:lo12:.LANCHOR10]
 	mov	w20, w1
 	strh	w24, [x3, 586]
-.L1271:
+.L1313:
 	ldr	w3, [x29, 156]
 	cmp	w3, w1
-	bcs	.L1231
+	bcs	.L1273
 	str	w24, [x29, 128]
 	str	w1, [x29, 156]
-.L1231:
+.L1273:
 	mov	w3, 65535
 	cmp	w0, w3
-	bne	.L1230
-.L1232:
+	bne	.L1272
+.L1274:
 	cmp	w0, 9
 	ccmp	w1, 9, 0, hi
-	bhi	.L1226
+	bhi	.L1268
 	ldr	w0, [x8]
-	tbz	x0, 8, .L1226
+	tbz	x0, 8, .L1268
 	adrp	x0, .LANCHOR9
 	ldr	w3, [x6, x2]
 	ldrh	w2, [x6, x2]
@@ -7455,82 +7705,82 @@ gc_static_wearleveling:
 	and	w2, w2, 2047
 	stp	x8, x10, [x29, 112]
 	ldrh	w7, [x0, x7, lsl 1]
-	adrp	x0, .LC73
+	adrp	x0, .LC75
 	ubfx	x5, x5, 5, 3
-	add	x0, x0, :lo12:.LC73
+	add	x0, x0, :lo12:.LC75
 	bl	printf
 	ldp	x8, x10, [x29, 112]
-.L1226:
+.L1268:
 	add	w24, w24, 1
 	and	w24, w24, 65535
-	b	.L1225
-.L1227:
+	b	.L1267
+.L1269:
 	tst	w0, 24
-	bne	.L1229
+	bne	.L1271
 	ldrh	w1, [x6, x2]
 	mov	w0, 65535
 	and	w1, w1, 2047
-	b	.L1228
-.L1229:
+	b	.L1270
+.L1271:
 	ldr	w0, [x6, x2]
 	mov	w1, 65535
 	ubfx	x0, x0, 11, 8
-.L1230:
+.L1272:
 	ldr	w3, [x29, 152]
 	add	w28, w28, 1
 	and	w28, w28, 65535
 	cmp	w21, w0
 	add	w3, w3, w0
 	str	w3, [x29, 152]
-	bls	.L1233
+	bls	.L1275
 	ldr	x3, [x19, #:lo12:.LANCHOR10]
 	mov	w21, w0
 	strh	w24, [x3, 584]
-.L1233:
+.L1275:
 	cmp	w22, w0
-	bcs	.L1232
+	bcs	.L1274
 	mov	w22, w0
 	str	w24, [x29, 136]
-	b	.L1232
-.L1237:
+	b	.L1274
+.L1279:
 	tst	w0, 224
-	bne	.L1236
+	bne	.L1278
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
 	mov	w0, 65535
 	ldrh	w2, [x1, 590]
 	cmp	w2, w0
-	bne	.L1236
+	bne	.L1278
 	ldrh	w0, [x1, 586]
 	ldrh	w1, [x1, 588]
 	cmp	w1, w0
-	beq	.L1236
+	beq	.L1278
 	bl	zftl_remove_free_node
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldrh	w1, [x0, 586]
 	strh	w1, [x0, 590]
 	mov	w1, -1
 	strh	w1, [x0, 586]
-	b	.L1236
-.L1240:
+	b	.L1278
+.L1282:
 	tst	w0, 224
-	bne	.L1239
+	bne	.L1281
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
 	mov	w0, 65535
 	ldrh	w2, [x1, 588]
 	cmp	w2, w0
-	bne	.L1239
+	bne	.L1281
 	ldrh	w0, [x1, 584]
 	ldrh	w1, [x1, 590]
 	cmp	w1, w0
-	beq	.L1239
+	beq	.L1281
 	bl	zftl_remove_free_node
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldrh	w1, [x0, 584]
 	strh	w1, [x0, 588]
 	mov	w1, -1
 	strh	w1, [x0, 584]
-	b	.L1239
-.L1257:
+	b	.L1281
+.L1299:
 	add	w7, w26, 1
 	ldr	x4, [x23, #:lo12:.LANCHOR7]
 	and	w26, w7, 65535
@@ -7541,31 +7791,31 @@ gc_static_wearleveling:
 	add	x0, x4, x3
 	ldrb	w0, [x0, 2]
 	tst	w0, 192
-	beq	.L1249
+	beq	.L1291
 	and	w2, w0, 224
 	cmp	w2, 224
-	beq	.L1249
+	beq	.L1291
 	ubfx	x0, x0, 3, 2
 	and	w1, w0, 1
-	tbz	x0, 0, .L1250
+	tbz	x0, 0, .L1292
 	cmp	w2, 160
-.L1337:
-	bne	.L1252
-	adrp	x0, .LANCHOR139
+.L1379:
+	bne	.L1294
+	adrp	x0, .LANCHOR144
 	ldr	w2, [x29, 148]
-	ldrh	w0, [x0, #:lo12:.LANCHOR139]
+	ldrh	w0, [x0, #:lo12:.LANCHOR144]
 	cmp	w2, w0
-	ble	.L1253
+	ble	.L1295
 	ldr	w0, [x4, x3]
 	ubfx	x0, x0, 11, 8
 	cmp	w0, w21
-	bls	.L1254
-	cbz	w1, .L1253
+	bls	.L1296
+	cbz	w1, .L1295
 	ldrh	w0, [x4, x3]
 	and	w0, w0, 2047
 	cmp	w0, w20
-	bgt	.L1253
-.L1254:
+	bgt	.L1295
+.L1296:
 	stp	x4, x8, [x29, 104]
 	mov	w2, 1
 	str	x3, [x29, 120]
@@ -7578,7 +7828,7 @@ gc_static_wearleveling:
 	add	w22, w22, 1
 	ldp	x4, x8, [x29, 104]
 	ldr	x3, [x29, 120]
-	tbz	x0, 10, .L1253
+	tbz	x0, 10, .L1295
 	adrp	x0, .LANCHOR9
 	ldr	w6, [x4, x3]
 	ldrh	w5, [x4, x3]
@@ -7588,46 +7838,46 @@ gc_static_wearleveling:
 	ldrh	w4, [x28, 56]
 	and	w5, w5, 2047
 	add	x3, x0, x3
-	adrp	x0, .LC80
-	add	x0, x0, :lo12:.LC80
+	adrp	x0, .LC82
+	add	x0, x0, :lo12:.LC82
 	ldrb	w2, [x3, 2]
 	ldrh	w3, [x1, x8, lsl 1]
 	mov	w1, w26
 	ubfx	x2, x2, 5, 3
-.L1338:
+.L1380:
 	bl	printf
-.L1253:
+.L1295:
 	cmp	w22, 4
 	ccmp	w27, 4, 2, ls
-	bhi	.L1256
-.L1249:
+	bhi	.L1298
+.L1291:
 	ldr	w0, [x29, 152]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	str	w0, [x29, 152]
-	b	.L1247
-.L1250:
+	b	.L1289
+.L1292:
 	cmp	w0, 2
-	b	.L1337
-.L1252:
+	b	.L1379
+.L1294:
 	ldr	x2, [x29, 128]
 	ldr	w0, [x29, 156]
 	sub	w0, w0, w20
 	ldrh	w2, [x2]
 	cmp	w0, w2
-	ble	.L1253
+	ble	.L1295
 	ldrh	w0, [x4, x3]
 	add	w2, w20, 8
 	and	w0, w0, 2047
 	cmp	w0, w2
-	ble	.L1255
-	cbz	w1, .L1253
+	ble	.L1297
+	cbz	w1, .L1295
 	ldr	w0, [x4, x3]
 	add	w1, w21, 4
 	ubfx	x0, x0, 11, 8
 	cmp	w0, w1
-	bgt	.L1253
-.L1255:
+	bgt	.L1295
+.L1297:
 	stp	x4, x8, [x29, 104]
 	mov	w2, 1
 	str	x3, [x29, 120]
@@ -7640,7 +7890,7 @@ gc_static_wearleveling:
 	add	w27, w27, 1
 	ldp	x4, x8, [x29, 104]
 	ldr	x3, [x29, 120]
-	tbz	x0, 10, .L1253
+	tbz	x0, 10, .L1295
 	adrp	x0, .LANCHOR9
 	ldr	w6, [x4, x3]
 	ldrh	w5, [x4, x3]
@@ -7650,54 +7900,54 @@ gc_static_wearleveling:
 	and	w5, w5, 2047
 	ldrh	w4, [x28, 56]
 	add	x3, x0, x3
-	adrp	x0, .LC81
-	add	x0, x0, :lo12:.LC81
+	adrp	x0, .LC83
+	add	x0, x0, :lo12:.LC83
 	ldrb	w2, [x3, 2]
 	ldrh	w3, [x1, x8, lsl 1]
 	mov	w1, w26
 	ubfx	x2, x2, 5, 3
-	b	.L1338
-.L1273:
+	b	.L1380
+.L1315:
 	mov	w27, 0
 	mov	w22, 0
-	b	.L1246
-.L1262:
+	b	.L1288
+.L1304:
 	ldr	w3, [x0]
 	ubfx	x4, x3, 11, 8
 	cmp	w21, w4
-	bhi	.L1261
+	bhi	.L1303
 	ldrb	w6, [x0, 2]
 	tst	w6, 24
-	beq	.L1261
+	beq	.L1303
 	sub	w4, w4, w21
 	bfi	w3, w4, 11, 8
 	str	w3, [x0]
-.L1261:
+.L1303:
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 65535
-	b	.L1260
-.L1268:
+	b	.L1302
+.L1310:
 	ldrh	w3, [x0]
 	and	w4, w3, 2047
 	cmp	w4, w20
-	blt	.L1267
+	blt	.L1309
 	ldrb	w5, [x0, 2]
 	and	w5, w5, 24
 	cmp	w5, 16
-	beq	.L1267
+	beq	.L1309
 	sub	w4, w4, w20
 	bfi	w3, w4, 0, 11
 	strh	w3, [x0]
-.L1267:
+.L1309:
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 65535
-	b	.L1266
-.L1272:
+	b	.L1308
+.L1314:
 	mov	w27, 0
 	mov	w22, 0
-	b	.L1224
+	b	.L1266
 	.size	gc_static_wearleveling, .-gc_static_wearleveling
 	.section	.text.zftl_sblk_list_init,"ax",@progbits
 	.align	2
@@ -7713,80 +7963,80 @@ zftl_sblk_list_init:
 	adrp	x28, .LANCHOR4
 	stp	x19, x20, [sp, 16]
 	ldrh	w2, [x27, #:lo12:.LANCHOR6]
-	adrp	x20, .LANCHOR87
+	adrp	x20, .LANCHOR90
 	stp	x21, x22, [sp, 32]
-	adrp	x19, .LANCHOR83
+	adrp	x19, .LANCHOR86
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR94
+	adrp	x22, .LANCHOR97
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR97
+	adrp	x25, .LANCHOR100
 	mul	w2, w2, w0
 	ldr	x0, [x28, #:lo12:.LANCHOR4]
-	adrp	x24, .LANCHOR90
-	adrp	x23, .LANCHOR92
-	adrp	x21, .LANCHOR85
+	adrp	x24, .LANCHOR93
+	adrp	x23, .LANCHOR95
+	adrp	x21, .LANCHOR88
 	bl	ftl_memset
 	str	x28, [x29, 168]
-	adrp	x0, .LANCHOR96
-	adrp	x2, .LANCHOR73
-	adrp	x3, .LANCHOR72
+	adrp	x0, .LANCHOR99
+	adrp	x2, .LANCHOR76
+	adrp	x3, .LANCHOR75
 	mov	w1, 16
-	strh	w1, [x0, #:lo12:.LANCHOR96]
-	adrp	x10, .LANCHOR91
-	ldrb	w0, [x2, #:lo12:.LANCHOR73]
-	adrp	x8, .LANCHOR93
-	ldrh	w1, [x3, #:lo12:.LANCHOR72]
-	adrp	x7, .LANCHOR95
-	adrp	x6, .LANCHOR76
+	strh	w1, [x0, #:lo12:.LANCHOR99]
+	adrp	x10, .LANCHOR94
+	ldrb	w0, [x2, #:lo12:.LANCHOR76]
+	adrp	x8, .LANCHOR96
+	ldrh	w1, [x3, #:lo12:.LANCHOR75]
+	adrp	x7, .LANCHOR98
+	adrp	x6, .LANCHOR79
 	adrp	x5, .LANCHOR12
-	adrp	x4, .LANCHOR75
-	str	xzr, [x10, #:lo12:.LANCHOR91]
-	str	xzr, [x8, #:lo12:.LANCHOR93]
+	adrp	x4, .LANCHOR78
+	str	xzr, [x10, #:lo12:.LANCHOR94]
+	str	xzr, [x8, #:lo12:.LANCHOR96]
 	adrp	x28, .LANCHOR7
 	mul	w1, w0, w1
 	mov	w0, 32768
-	str	xzr, [x7, #:lo12:.LANCHOR95]
-	str	xzr, [x6, #:lo12:.LANCHOR76]
+	str	xzr, [x7, #:lo12:.LANCHOR98]
+	str	xzr, [x6, #:lo12:.LANCHOR79]
 	str	xzr, [x5, #:lo12:.LANCHOR12]
 	sdiv	w0, w0, w1
-	str	xzr, [x4, #:lo12:.LANCHOR75]
-	strh	wzr, [x24, #:lo12:.LANCHOR90]
-	strh	wzr, [x23, #:lo12:.LANCHOR92]
-	strh	wzr, [x22, #:lo12:.LANCHOR94]
+	str	xzr, [x4, #:lo12:.LANCHOR78]
+	strh	wzr, [x24, #:lo12:.LANCHOR93]
+	strh	wzr, [x23, #:lo12:.LANCHOR95]
+	strh	wzr, [x22, #:lo12:.LANCHOR97]
 	sxth	w0, w0
 	str	w0, [x29, 188]
-	ldr	x0, [x25, #:lo12:.LANCHOR97]
-	strh	wzr, [x21, #:lo12:.LANCHOR85]
-	strh	wzr, [x20, #:lo12:.LANCHOR87]
-	strh	wzr, [x19, #:lo12:.LANCHOR83]
+	ldr	x0, [x25, #:lo12:.LANCHOR100]
+	strh	wzr, [x21, #:lo12:.LANCHOR88]
+	strh	wzr, [x20, #:lo12:.LANCHOR90]
+	strh	wzr, [x19, #:lo12:.LANCHOR86]
 	strh	wzr, [x0, 146]
 	ldrsh	w26, [x0, 134]
 	add	x0, x27, :lo12:.LANCHOR6
-	adrp	x27, .LC82
-	add	x27, x27, :lo12:.LC82
+	adrp	x27, .LC84
+	add	x27, x27, :lo12:.LC84
 	stp	x3, x2, [x29, 104]
 	stp	x4, x5, [x29, 120]
 	stp	x6, x7, [x29, 136]
 	stp	x8, x10, [x29, 152]
 	str	x0, [x29, 176]
-.L1340:
+.L1382:
 	ldr	x0, [x29, 176]
 	ldrh	w0, [x0]
 	cmp	w26, w0
-	blt	.L1356
-	ldr	x0, [x25, #:lo12:.LANCHOR97]
-	ldrh	w1, [x24, #:lo12:.LANCHOR90]
+	blt	.L1398
+	ldr	x0, [x25, #:lo12:.LANCHOR100]
+	ldrh	w1, [x24, #:lo12:.LANCHOR93]
 	ldp	x25, x26, [sp, 64]
 	strh	w1, [x0, 114]
-	ldrh	w1, [x23, #:lo12:.LANCHOR92]
+	ldrh	w1, [x23, #:lo12:.LANCHOR95]
 	strh	w1, [x0, 118]
-	ldrh	w1, [x22, #:lo12:.LANCHOR94]
+	ldrh	w1, [x22, #:lo12:.LANCHOR97]
 	strh	w1, [x0, 116]
-	ldrh	w1, [x21, #:lo12:.LANCHOR85]
+	ldrh	w1, [x21, #:lo12:.LANCHOR88]
 	strh	w1, [x0, 122]
-	ldrh	w1, [x20, #:lo12:.LANCHOR87]
+	ldrh	w1, [x20, #:lo12:.LANCHOR90]
 	strh	w1, [x0, 120]
-	ldrh	w1, [x19, #:lo12:.LANCHOR83]
+	ldrh	w1, [x19, #:lo12:.LANCHOR86]
 	strh	w1, [x0, 124]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -7794,28 +8044,28 @@ zftl_sblk_list_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L1356:
+.L1398:
 	ldr	x4, [x28, #:lo12:.LANCHOR7]
 	sxtw	x2, w26
 	add	x4, x4, x2, lsl 2
 	ldrb	w6, [x4, 3]
-	cbz	w6, .L1357
+	cbz	w6, .L1399
 	ldr	x0, [x29, 112]
 	mov	w1, 0
-	ldr	x7, [x25, #:lo12:.LANCHOR97]
-	ldrb	w8, [x0, #:lo12:.LANCHOR73]
+	ldr	x7, [x25, #:lo12:.LANCHOR100]
+	ldrb	w8, [x0, #:lo12:.LANCHOR76]
 	ldr	x0, [x29, 104]
-	ldrh	w10, [x0, #:lo12:.LANCHOR72]
+	ldrh	w10, [x0, #:lo12:.LANCHOR75]
 	mov	w0, 0
-.L1342:
+.L1384:
 	cmp	w1, w8
-	blt	.L1345
-	cbz	w0, .L1346
+	blt	.L1387
+	cbz	w0, .L1388
 	mov	w1, 32768
 	sdiv	w0, w1, w0
 	add	w0, w0, 1
 	sxth	w0, w0
-.L1341:
+.L1383:
 	ldr	x3, [x29, 168]
 	mov	w1, 6
 	smull	x1, w26, w1
@@ -7830,44 +8080,44 @@ zftl_sblk_list_init:
 	and	w0, w1, 224
 	cmp	w0, 32
 	ccmp	w0, w5, 4, ne
-	beq	.L1347
+	beq	.L1389
 	adrp	x5, .LANCHOR10
 	ldr	x5, [x5, #:lo12:.LANCHOR10]
 	ldrh	w6, [x5, 16]
 	cmp	w26, w6
-	beq	.L1347
+	beq	.L1389
 	ldrh	w6, [x5, 48]
 	cmp	w26, w6
-	beq	.L1347
+	beq	.L1389
 	ldrh	w5, [x5, 80]
 	cmp	w26, w5
-	beq	.L1347
+	beq	.L1389
 	cmp	w0, 64
-	bne	.L1348
+	bne	.L1390
 	ldr	x0, [x29, 128]
-	add	x2, x21, :lo12:.LANCHOR85
+	add	x2, x21, :lo12:.LANCHOR88
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR12
-.L1360:
+.L1402:
 	bl	_insert_data_list
-.L1347:
+.L1389:
 	add	w3, w26, 1
 	sxth	w26, w3
-	b	.L1340
-.L1345:
+	b	.L1382
+.L1387:
 	asr	w5, w6, w1
-	tbnz	x5, 0, .L1343
+	tbnz	x5, 0, .L1385
 	add	w0, w10, w0
 	sxth	w0, w0
-.L1344:
+.L1386:
 	add	w1, w1, 1
-	b	.L1342
-.L1343:
+	b	.L1384
+.L1385:
 	ldrh	w5, [x7, 146]
 	add	w5, w5, 1
 	strh	w5, [x7, 146]
-	b	.L1344
-.L1346:
+	b	.L1386
+.L1388:
 	ldrb	w1, [x4, 2]
 	mov	w5, -1
 	orr	w1, w1, -32
@@ -7875,75 +8125,75 @@ zftl_sblk_list_init:
 	adrp	x1, .LANCHOR9
 	ldr	x1, [x1, #:lo12:.LANCHOR9]
 	strh	w5, [x1, x2, lsl 1]
-	b	.L1341
-.L1357:
+	b	.L1383
+.L1399:
 	ldr	w0, [x29, 188]
-	b	.L1341
-.L1348:
+	b	.L1383
+.L1390:
 	cmp	w0, 96
-	bne	.L1349
+	bne	.L1391
 	ldr	x0, [x29, 136]
-	add	x2, x19, :lo12:.LANCHOR83
+	add	x2, x19, :lo12:.LANCHOR86
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR76
-	b	.L1360
-.L1349:
+	add	x0, x0, :lo12:.LANCHOR79
+	b	.L1402
+.L1391:
 	cmp	w0, 160
-	bne	.L1350
+	bne	.L1392
 	ldr	x0, [x29, 120]
-	add	x2, x20, :lo12:.LANCHOR87
+	add	x2, x20, :lo12:.LANCHOR90
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR75
-	b	.L1360
-.L1350:
-	cbnz	w0, .L1347
+	add	x0, x0, :lo12:.LANCHOR78
+	b	.L1402
+.L1392:
+	cbnz	w0, .L1389
 	adrp	x0, .LANCHOR9
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w2, [x0, x2, lsl 1]
-	cbz	w2, .L1351
+	cbz	w2, .L1393
 	str	x4, [x29, 96]
 	mov	w1, w26
 	mov	x0, x27
 	bl	printf
 	ldr	x4, [x29, 96]
 	ldrb	w0, [x4, 2]
-	tbz	x0, 4, .L1352
+	tbz	x0, 4, .L1394
 	mov	w1, 5
-.L1359:
+.L1401:
 	bfi	w0, w1, 5, 3
 	strb	w0, [x4, 2]
 	mov	w2, 0
 	mov	w1, 1
 	mov	w0, w26
 	bl	gc_add_sblk
-	b	.L1347
-.L1352:
+	b	.L1389
+.L1394:
 	mov	w1, 2
-	b	.L1359
-.L1351:
+	b	.L1401
+.L1393:
 	ands	w1, w1, 24
-	bne	.L1354
+	bne	.L1396
 	ldr	x0, [x29, 160]
-	add	x2, x24, :lo12:.LANCHOR90
+	add	x2, x24, :lo12:.LANCHOR93
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR91
-.L1361:
+	add	x0, x0, :lo12:.LANCHOR94
+.L1403:
 	bl	_insert_free_list
-	b	.L1347
-.L1354:
+	b	.L1389
+.L1396:
 	cmp	w1, 16
-	bne	.L1355
+	bne	.L1397
 	ldr	x0, [x29, 152]
-	add	x2, x23, :lo12:.LANCHOR92
+	add	x2, x23, :lo12:.LANCHOR95
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR93
-	b	.L1361
-.L1355:
+	add	x0, x0, :lo12:.LANCHOR96
+	b	.L1403
+.L1397:
 	ldr	x0, [x29, 144]
-	add	x2, x22, :lo12:.LANCHOR94
+	add	x2, x22, :lo12:.LANCHOR97
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR95
-	b	.L1361
+	add	x0, x0, :lo12:.LANCHOR98
+	b	.L1403
 	.size	zftl_sblk_list_init, .-zftl_sblk_list_init
 	.section	.text.ftl_open_sblk_init,"ax",@progbits
 	.align	2
@@ -7953,19 +8203,19 @@ ftl_open_sblk_init:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR73
+	adrp	x20, .LANCHOR76
 	stp	x21, x22, [sp, 32]
 	mov	x19, x0
 	stp	x23, x24, [sp, 48]
-	adrp	x21, .LC70
-	adrp	x23, .LANCHOR80
+	adrp	x21, .LC72
+	adrp	x23, .LANCHOR83
 	mov	w22, w1
-	add	x23, x23, :lo12:.LANCHOR80
-	add	x20, x20, :lo12:.LANCHOR73
-	add	x21, x21, :lo12:.LC70
+	add	x23, x23, :lo12:.LANCHOR83
+	add	x20, x20, :lo12:.LANCHOR76
+	add	x21, x21, :lo12:.LC72
 	stp	x25, x26, [sp, 64]
-.L1363:
-.L1366:
+.L1405:
+.L1408:
 	mov	w0, w22
 	bl	ftl_alloc_sblk
 	mov	w1, 0
@@ -7985,18 +8235,18 @@ ftl_open_sblk_init:
 	strh	w0, [x19, 6]
 	strh	wzr, [x19, 10]
 	strb	w22, [x19, 4]
-	beq	.L1367
+	beq	.L1409
 	ldrb	w0, [x20]
 	mul	w0, w1, w0
 	and	w0, w0, 65535
-.L1364:
+.L1406:
 	ldrb	w2, [x20]
 	adrp	x26, .LANCHOR9
 	strh	w0, [x19, 12]
 	ubfiz	x25, x24, 1, 16
 	mul	w2, w2, w1
-	adrp	x1, .LANCHOR111
-	ldr	x3, [x1, #:lo12:.LANCHOR111]
+	adrp	x1, .LANCHOR113
+	ldr	x3, [x1, #:lo12:.LANCHOR113]
 	mov	w1, 255
 	lsl	w2, w2, 2
 	add	x0, x3, x0, uxth 2
@@ -8005,7 +8255,7 @@ ftl_open_sblk_init:
 	ldrh	w1, [x19, 6]
 	strh	w1, [x0, x25]
 	ldrb	w0, [x19, 9]
-	cbnz	w0, .L1362
+	cbnz	w0, .L1404
 	mov	w1, w24
 	mov	x0, x21
 	bl	printf
@@ -8014,11 +8264,11 @@ ftl_open_sblk_init:
 	strh	w1, [x0, x25]
 	mov	w0, 7
 	strb	w0, [x19, 4]
-	b	.L1366
-.L1367:
+	b	.L1408
+.L1409:
 	mov	w0, 0
-	b	.L1364
-.L1362:
+	b	.L1406
+.L1404:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -8034,34 +8284,34 @@ pm_free_sblk:
 	stp	x29, x30, [sp, -368]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR141
+	adrp	x20, .LANCHOR146
 	stp	x21, x22, [sp, 32]
-	ldrh	w0, [x20, #:lo12:.LANCHOR141]
+	ldrh	w0, [x20, #:lo12:.LANCHOR146]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w0, 128
 	stp	x27, x28, [sp, 80]
-	bls	.L1370
-	adrp	x1, .LANCHOR142
+	bls	.L1412
+	adrp	x1, .LANCHOR147
 	adrp	x0, .LC0
 	mov	w2, 78
-	add	x1, x1, :lo12:.LANCHOR142
+	add	x1, x1, :lo12:.LANCHOR147
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1370:
+.L1412:
 	add	x28, x29, 112
 	mov	w2, 256
 	mov	w1, 0
 	mov	x0, x28
 	bl	ftl_memset
-	adrp	x23, .LANCHOR98
-	adrp	x5, .LANCHOR97
-	adrp	x0, .LANCHOR99
+	adrp	x23, .LANCHOR101
+	adrp	x5, .LANCHOR100
+	adrp	x0, .LANCHOR102
 	mov	w2, 21
-	ldrb	w12, [x23, #:lo12:.LANCHOR98]
-	ldr	x7, [x5, #:lo12:.LANCHOR97]
-	ldrh	w11, [x0, #:lo12:.LANCHOR99]
-	ldrh	w13, [x20, #:lo12:.LANCHOR141]
+	ldrb	w12, [x23, #:lo12:.LANCHOR101]
+	ldr	x7, [x5, #:lo12:.LANCHOR100]
+	ldrh	w11, [x0, #:lo12:.LANCHOR102]
+	ldrh	w13, [x20, #:lo12:.LANCHOR146]
 	add	x4, x7, 704
 	sub	w0, w2, w11
 	mov	w2, 1
@@ -8070,26 +8320,26 @@ pm_free_sblk:
 	sub	w2, w2, #1
 	add	x1, x1, 176
 	add	x1, x7, x1, lsl 2
-.L1371:
+.L1413:
 	cmp	x4, x1
-	bne	.L1375
-	adrp	x24, .LANCHOR73
-	adrp	x25, .LANCHOR80
+	bne	.L1417
+	adrp	x24, .LANCHOR76
+	adrp	x25, .LANCHOR83
 	adrp	x26, .LANCHOR14
-	adrp	x27, .LC83
-	ldrb	w22, [x24, #:lo12:.LANCHOR73]
-	add	x20, x20, :lo12:.LANCHOR141
-	ldrh	w0, [x25, #:lo12:.LANCHOR80]
+	adrp	x27, .LC85
+	ldrb	w22, [x24, #:lo12:.LANCHOR76]
+	add	x20, x20, :lo12:.LANCHOR146
+	ldrh	w0, [x25, #:lo12:.LANCHOR83]
 	add	x26, x26, :lo12:.LANCHOR14
-	add	x27, x27, :lo12:.LC83
+	add	x27, x27, :lo12:.LC85
 	mov	w19, 0
 	str	wzr, [x29, 108]
 	mul	w22, w22, w0
 	and	w22, w22, 65535
-.L1376:
+.L1418:
 	ldrh	w0, [x20]
 	cmp	w0, w19
-	bhi	.L1382
+	bhi	.L1424
 	ldr	w0, [x29, 108]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -8098,7 +8348,7 @@ pm_free_sblk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 368
 	ret
-.L1375:
+.L1417:
 	ldr	w0, [x4]
 	add	x8, x7, 416
 	mov	x3, 0
@@ -8106,47 +8356,47 @@ pm_free_sblk:
 	and	w0, w0, w2
 	udiv	w0, w0, w12
 	and	w0, w0, 65535
-.L1372:
+.L1414:
 	cmp	w13, w3, uxth
-	bhi	.L1374
+	bhi	.L1416
 	add	x4, x4, 4
-	b	.L1371
-.L1374:
+	b	.L1413
+.L1416:
 	ldrh	w10, [x8]
 	cmp	w10, w0
-	bne	.L1373
+	bne	.L1415
 	ldrh	w10, [x28, x3, lsl 1]
 	add	w10, w10, 1
 	strh	w10, [x28, x3, lsl 1]
-.L1373:
+.L1415:
 	add	x3, x3, 1
 	add	x8, x8, 2
-	b	.L1372
-.L1382:
-	ldr	x1, [x5, #:lo12:.LANCHOR97]
+	b	.L1414
+.L1424:
+	ldr	x1, [x5, #:lo12:.LANCHOR100]
 	sxtw	x21, w19
 	add	x0, x21, 208
-	ldrb	w2, [x23, #:lo12:.LANCHOR98]
+	ldrb	w2, [x23, #:lo12:.LANCHOR101]
 	ldrh	w3, [x1, x0, lsl 1]
 	ldrh	w0, [x1, 692]
 	sdiv	w0, w0, w2
 	cmp	w0, w3
-	bne	.L1377
-	ldrb	w0, [x24, #:lo12:.LANCHOR73]
-	ldrh	w2, [x25, #:lo12:.LANCHOR80]
+	bne	.L1419
+	ldrb	w0, [x24, #:lo12:.LANCHOR76]
+	ldrh	w2, [x25, #:lo12:.LANCHOR83]
 	mul	w0, w0, w2
 	strh	w0, [x28, x21, lsl 1]
-.L1377:
+.L1419:
 	ldrh	w0, [x28, x21, lsl 1]
 	cmp	w22, w0
-	bls	.L1378
-	cbnz	w0, .L1383
-.L1380:
+	bls	.L1420
+	cbnz	w0, .L1425
+.L1422:
 	mov	w0, 65535
 	cmp	w3, w0
-	beq	.L1379
+	beq	.L1421
 	ldr	w0, [x26]
-	tbz	x0, 12, .L1381
+	tbz	x0, 12, .L1423
 	ldrh	w4, [x1, 688]
 	mov	w2, 0
 	str	x5, [x29, 96]
@@ -8154,47 +8404,31 @@ pm_free_sblk:
 	mov	x0, x27
 	bl	printf
 	ldr	x5, [x29, 96]
-.L1381:
-	ldr	x0, [x5, #:lo12:.LANCHOR97]
+.L1423:
+	ldr	x0, [x5, #:lo12:.LANCHOR100]
 	add	x21, x21, 208
 	str	x5, [x29, 96]
 	ldrh	w0, [x0, x21, lsl 1]
 	bl	ftl_free_sblk
 	ldr	x5, [x29, 96]
 	mov	w1, -1
-	ldr	x0, [x5, #:lo12:.LANCHOR97]
+	ldr	x0, [x5, #:lo12:.LANCHOR100]
 	strh	w1, [x0, x21, lsl 1]
 	ldrh	w1, [x0, 688]
 	sub	w1, w1, #1
 	strh	w1, [x0, 688]
-	b	.L1379
-.L1378:
-	cbz	w0, .L1380
-.L1379:
+	b	.L1421
+.L1420:
+	cbz	w0, .L1422
+.L1421:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1376
-.L1383:
+	b	.L1418
+.L1425:
 	mov	w22, w0
 	str	w19, [x29, 108]
-	b	.L1379
+	b	.L1421
 	.size	pm_free_sblk, .-pm_free_sblk
-	.section	.text.idb_init,"ax",@progbits
-	.align	2
-	.global	idb_init
-	.type	idb_init, %function
-idb_init:
-	stp	x29, x30, [sp, -16]!
-	mov	w2, 262144
-	mov	w1, 0
-	adrp	x0, idb_buf
-	add	x29, sp, 0
-	add	x0, x0, :lo12:idb_buf
-	bl	ftl_memset
-	mov	w0, 0
-	ldp	x29, x30, [sp], 16
-	ret
-	.size	idb_init, .-idb_init
 	.section	.text.ftl_memcpy,"ax",@progbits
 	.align	2
 	.global	ftl_memcpy
@@ -8213,14 +8447,14 @@ flash_info_data_init:
 	add	x29, sp, 0
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	str	x19, [sp, 16]
-	tbz	x0, 12, .L1392
-	adrp	x2, .LANCHOR143
-	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR143
-	mov	w1, 100
-	add	x0, x0, :lo12:.LC84
+	tbz	x0, 12, .L1432
+	adrp	x2, .LANCHOR148
+	adrp	x0, .LC86
+	add	x2, x2, :lo12:.LANCHOR148
+	mov	w1, 105
+	add	x0, x0, :lo12:.LC86
 	bl	printf
-.L1392:
+.L1432:
 	adrp	x19, .LANCHOR26
 	mov	w2, 2048
 	mov	w1, 0
@@ -8242,9 +8476,9 @@ flash_info_data_init:
 	ldr	x0, [x19, #:lo12:.LANCHOR26]
 	mov	w2, 32
 	ldr	x19, [sp, 16]
-	adrp	x1, .LANCHOR34
+	adrp	x1, .LANCHOR30
 	ldp	x29, x30, [sp], 32
-	add	x1, x1, :lo12:.LANCHOR34
+	add	x1, x1, :lo12:.LANCHOR30
 	add	x0, x0, 48
 	b	ftl_memcpy
 	.size	flash_info_data_init, .-flash_info_data_init
@@ -8254,15 +8488,15 @@ flash_info_data_init:
 	.type	ftl_memcpy32, %function
 ftl_memcpy32:
 	mov	x3, 0
-.L1398:
+.L1438:
 	cmp	w2, w3
-	bhi	.L1399
+	bhi	.L1439
 	ret
-.L1399:
+.L1439:
 	ldr	w4, [x1, x3, lsl 2]
 	str	w4, [x0, x3, lsl 2]
 	add	x3, x3, 1
-	b	.L1398
+	b	.L1438
 	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.ftl_memcmp,"ax",@progbits
 	.align	2
@@ -8303,14 +8537,14 @@ nandc_init:
 	mov	x19, x0
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
 	str	wzr, [x29, 56]
-	tbz	x0, 12, .L1404
-	adrp	x1, .LANCHOR144
-	adrp	x0, .LC85
+	tbz	x0, 12, .L1444
+	adrp	x1, .LANCHOR149
+	adrp	x0, .LC87
 	mov	x2, x19
-	add	x1, x1, :lo12:.LANCHOR144
-	add	x0, x0, :lo12:.LC85
+	add	x1, x1, :lo12:.LANCHOR149
+	add	x0, x0, :lo12:.LC87
 	bl	printf
-.L1404:
+.L1444:
 	adrp	x20, .LANCHOR27
 	mov	w0, 6
 	ldr	w2, [x19, 352]
@@ -8321,22 +8555,22 @@ nandc_init:
 	mov	x22, x0
 	str	x19, [x0, #:lo12:.LANCHOR13]
 	cmp	w2, w1
-	bne	.L1405
+	bne	.L1445
 	mov	w0, 8
 	strb	w0, [x20, #:lo12:.LANCHOR27]
-.L1405:
+.L1445:
 	ldr	w1, [x19, 128]
 	mov	w0, 12336
 	movk	w0, 0x5639, lsl 16
 	cmp	w1, w0
-	bne	.L1406
+	bne	.L1446
 	mov	w0, 9
 	strb	w0, [x20, #:lo12:.LANCHOR27]
-.L1406:
+.L1446:
 	ldrb	w0, [x20, #:lo12:.LANCHOR27]
 	cmp	w0, 9
 	adrp	x0, .LANCHOR44
-	bne	.L1407
+	bne	.L1447
 	mov	w1, 1
 	strb	w1, [x0, #:lo12:.LANCHOR44]
 	ldr	w0, [x29, 56]
@@ -8361,17 +8595,17 @@ nandc_init:
 	mov	w0, 39
 	str	w0, [x19, 84]
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1409
+	tbz	x0, 12, .L1449
 	ldr	w1, [x19]
 	ldr	w2, [x19, 8]
 	ldr	w3, [x19, 80]
 	ldr	w4, [x19, 84]
 	ldr	w5, [x19, 88]
-.L1422:
-	adrp	x0, .LC86
-	add	x0, x0, :lo12:.LC86
+.L1462:
+	adrp	x0, .LC88
+	add	x0, x0, :lo12:.LC88
 	bl	printf
-.L1409:
+.L1449:
 	adrp	x0, .LANCHOR45
 	mov	w1, 1
 	strb	w1, [x0, #:lo12:.LANCHOR45]
@@ -8380,17 +8614,17 @@ nandc_init:
 	adrp	x0, .LANCHOR43
 	strb	wzr, [x0, #:lo12:.LANCHOR43]
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1403
+	tbz	x0, 12, .L1443
 	ldrb	w1, [x20, #:lo12:.LANCHOR27]
-	adrp	x0, .LC87
-	add	x0, x0, :lo12:.LC87
+	adrp	x0, .LC89
+	add	x0, x0, :lo12:.LC89
 	bl	printf
-.L1403:
+.L1443:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1407:
+.L1447:
 	strb	wzr, [x0, #:lo12:.LANCHOR44]
 	mov	w1, 1
 	ldr	w0, [x29, 56]
@@ -8418,14 +8652,14 @@ nandc_init:
 	adrp	x1, .LANCHOR46
 	str	x0, [x1, #:lo12:.LANCHOR46]
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1409
+	tbz	x0, 12, .L1449
 	ldr	x0, [x22, #:lo12:.LANCHOR13]
 	ldr	w1, [x0]
 	ldr	w2, [x0, 344]
 	ldr	w3, [x0, 304]
 	ldr	w4, [x0, 308]
 	ldr	w5, [x0, 312]
-	b	.L1422
+	b	.L1462
 	.size	nandc_init, .-nandc_init
 	.section	.text.buf_init,"ax",@progbits
 	.align	2
@@ -8433,16 +8667,16 @@ nandc_init:
 	.type	buf_init, %function
 buf_init:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LANCHOR49
+	adrp	x0, .LANCHOR50
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	add	x19, x0, :lo12:.LANCHOR49
+	add	x19, x0, :lo12:.LANCHOR50
 	stp	x21, x22, [sp, 32]
 	mov	x20, x0
-	adrp	x22, .LANCHOR121
-	add	x22, x22, :lo12:.LANCHOR121
+	adrp	x22, .LANCHOR123
+	add	x22, x22, :lo12:.LANCHOR123
 	mov	w21, 0
-.L1424:
+.L1464:
 	and	w0, w21, 255
 	strb	w0, [x19, 1]
 	add	w1, w0, 1
@@ -8460,15 +8694,15 @@ buf_init:
 	bl	ftl_malloc
 	str	x0, [x19, -40]
 	cmp	w21, 32
-	bne	.L1424
-	add	x0, x20, :lo12:.LANCHOR49
+	bne	.L1464
+	add	x0, x20, :lo12:.LANCHOR50
 	mov	w1, -1
 	strb	w1, [x0, 1984]
-	adrp	x0, .LANCHOR50
-	strb	wzr, [x0, #:lo12:.LANCHOR50]
 	adrp	x0, .LANCHOR51
+	strb	wzr, [x0, #:lo12:.LANCHOR51]
+	adrp	x0, .LANCHOR52
 	ldp	x19, x20, [sp, 16]
-	strb	w21, [x0, #:lo12:.LANCHOR51]
+	strb	w21, [x0, #:lo12:.LANCHOR52]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
@@ -8479,91 +8713,91 @@ buf_init:
 	.type	gc_init, %function
 gc_init:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR71
+	adrp	x0, .LANCHOR74
 	mov	w2, 328
 	mov	w1, 0
 	add	x29, sp, 0
-	strb	wzr, [x0, #:lo12:.LANCHOR71]
-	adrp	x0, .LANCHOR145
+	strb	wzr, [x0, #:lo12:.LANCHOR74]
+	adrp	x0, .LANCHOR150
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR62
-	strb	wzr, [x0, #:lo12:.LANCHOR145]
-	adrp	x0, .LANCHOR146
-	add	x19, x20, :lo12:.LANCHOR62
-	str	wzr, [x0, #:lo12:.LANCHOR146]
-	adrp	x0, .LANCHOR82
-	strh	wzr, [x0, #:lo12:.LANCHOR82]
+	adrp	x20, .LANCHOR63
+	strb	wzr, [x0, #:lo12:.LANCHOR150]
+	adrp	x0, .LANCHOR151
+	add	x19, x20, :lo12:.LANCHOR63
+	str	wzr, [x0, #:lo12:.LANCHOR151]
+	adrp	x0, .LANCHOR85
+	strh	wzr, [x0, #:lo12:.LANCHOR85]
 	mov	x0, x19
 	bl	ftl_memset
 	str	xzr, [x19, 8]
 	mov	w0, -1
-	strh	w0, [x20, #:lo12:.LANCHOR62]
-	adrp	x0, .LANCHOR80
-	adrp	x4, .LANCHOR89
-	adrp	x20, .LANCHOR72
-	ldrh	w1, [x0, #:lo12:.LANCHOR80]
+	strh	w0, [x20, #:lo12:.LANCHOR63]
+	adrp	x0, .LANCHOR83
+	adrp	x4, .LANCHOR92
+	adrp	x20, .LANCHOR75
+	ldrh	w1, [x0, #:lo12:.LANCHOR83]
 	lsr	w2, w1, 1
 	lsr	w0, w1, 2
 	strh	w2, [x19, 38]
-	adrp	x2, .LANCHOR81
+	adrp	x2, .LANCHOR84
 	strh	w0, [x19, 36]
-	adrp	x19, .LANCHOR73
-	strh	wzr, [x2, #:lo12:.LANCHOR81]
-	adrp	x2, .LANCHOR77
-	ldrb	w3, [x19, #:lo12:.LANCHOR73]
-	strh	wzr, [x2, #:lo12:.LANCHOR77]
-	adrp	x2, .LANCHOR78
-	strh	wzr, [x2, #:lo12:.LANCHOR78]
+	adrp	x19, .LANCHOR76
+	strh	wzr, [x2, #:lo12:.LANCHOR84]
+	adrp	x2, .LANCHOR80
+	ldrb	w3, [x19, #:lo12:.LANCHOR76]
+	strh	wzr, [x2, #:lo12:.LANCHOR80]
+	adrp	x2, .LANCHOR81
+	strh	wzr, [x2, #:lo12:.LANCHOR81]
 	mul	w2, w1, w3
 	and	w2, w2, 65535
 	sub	w5, w2, #32
-	strh	w5, [x4, #:lo12:.LANCHOR89]
-	adrp	x4, .LANCHOR86
-	strh	w2, [x4, #:lo12:.LANCHOR86]
-	adrp	x2, .LANCHOR79
-	strh	w1, [x2, #:lo12:.LANCHOR79]
-	adrp	x1, .LANCHOR61
-	strh	w0, [x1, #:lo12:.LANCHOR61]
-	ldrh	w0, [x20, #:lo12:.LANCHOR72]
+	strh	w5, [x4, #:lo12:.LANCHOR92]
+	adrp	x4, .LANCHOR89
+	strh	w2, [x4, #:lo12:.LANCHOR89]
+	adrp	x2, .LANCHOR82
+	strh	w1, [x2, #:lo12:.LANCHOR82]
+	adrp	x1, .LANCHOR62
+	strh	w0, [x1, #:lo12:.LANCHOR62]
+	ldrh	w0, [x20, #:lo12:.LANCHOR75]
 	mul	w0, w0, w3
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR147
-	str	x0, [x1, #:lo12:.LANCHOR147]
-	ldrb	w1, [x19, #:lo12:.LANCHOR73]
-	ldrh	w0, [x20, #:lo12:.LANCHOR72]
+	adrp	x1, .LANCHOR152
+	str	x0, [x1, #:lo12:.LANCHOR152]
+	ldrb	w1, [x19, #:lo12:.LANCHOR76]
+	ldrh	w0, [x20, #:lo12:.LANCHOR75]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR148
-	str	x0, [x1, #:lo12:.LANCHOR148]
-	ldrh	w1, [x20, #:lo12:.LANCHOR72]
-	ldrb	w0, [x19, #:lo12:.LANCHOR73]
+	adrp	x1, .LANCHOR153
+	str	x0, [x1, #:lo12:.LANCHOR153]
+	ldrh	w1, [x20, #:lo12:.LANCHOR75]
+	ldrb	w0, [x19, #:lo12:.LANCHOR76]
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR69
-	str	x0, [x1, #:lo12:.LANCHOR69]
-	ldrb	w1, [x19, #:lo12:.LANCHOR73]
-	ldrh	w0, [x20, #:lo12:.LANCHOR72]
+	adrp	x1, .LANCHOR72
+	str	x0, [x1, #:lo12:.LANCHOR72]
+	ldrb	w1, [x19, #:lo12:.LANCHOR76]
+	ldrh	w0, [x20, #:lo12:.LANCHOR75]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR65
-	str	x0, [x1, #:lo12:.LANCHOR65]
-	ldrb	w1, [x19, #:lo12:.LANCHOR73]
-	ldrh	w0, [x20, #:lo12:.LANCHOR72]
+	adrp	x1, .LANCHOR66
+	str	x0, [x1, #:lo12:.LANCHOR66]
+	ldrb	w1, [x19, #:lo12:.LANCHOR76]
+	ldrh	w0, [x20, #:lo12:.LANCHOR75]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR149
+	adrp	x1, .LANCHOR154
 	ldp	x19, x20, [sp, 16]
-	str	x0, [x1, #:lo12:.LANCHOR149]
-	adrp	x0, .LANCHOR84
-	adrp	x1, .LANCHOR74
+	str	x0, [x1, #:lo12:.LANCHOR154]
+	adrp	x0, .LANCHOR87
+	adrp	x1, .LANCHOR77
 	ldp	x29, x30, [sp], 32
-	ldrh	w0, [x0, #:lo12:.LANCHOR84]
+	ldrh	w0, [x0, #:lo12:.LANCHOR87]
 	lsr	w0, w0, 2
-	strh	w0, [x1, #:lo12:.LANCHOR74]
+	strh	w0, [x1, #:lo12:.LANCHOR77]
 	ret
 	.size	gc_init, .-gc_init
 	.section	.text.ftl_free,"ax",@progbits
@@ -8582,18 +8816,18 @@ js_hash:
 	mov	w0, 42982
 	mov	x3, 0
 	movk	w0, 0x47c6, lsl 16
-.L1431:
+.L1471:
 	cmp	w1, w3
-	bhi	.L1432
+	bhi	.L1472
 	ret
-.L1432:
+.L1472:
 	lsr	w2, w0, 2
 	ldrb	w5, [x4, x3]
 	add	w2, w2, w0, lsl 5
 	add	x3, x3, 1
 	add	w2, w2, w5
 	eor	w0, w0, w2
-	b	.L1431
+	b	.L1471
 	.size	js_hash, .-js_hash
 	.section	.text.timer_get_time,"ax",@progbits
 	.align	2
@@ -8630,8 +8864,8 @@ ftl_get_density:
 	.global	ftl_get_capacity
 	.type	ftl_get_capacity, %function
 ftl_get_capacity:
-	adrp	x0, .LANCHOR58
-	ldr	w0, [x0, #:lo12:.LANCHOR58]
+	adrp	x0, .LANCHOR59
+	ldr	w0, [x0, #:lo12:.LANCHOR59]
 	ret
 	.size	ftl_get_capacity, .-ftl_get_capacity
 	.section	.text.rknand_print_hex,"ax",@progbits
@@ -8642,592 +8876,634 @@ rknand_print_hex:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LC89
+	adrp	x21, .LC91
 	stp	x23, x24, [sp, 48]
 	mov	x22, x1
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LC88
+	adrp	x23, .LC90
 	mov	x26, x0
 	mov	w24, w2
 	uxtw	x25, w3
-	add	x23, x23, :lo12:.LC88
-	add	x21, x21, :lo12:.LC89
+	add	x23, x23, :lo12:.LC90
+	add	x21, x21, :lo12:.LC91
 	stp	x19, x20, [sp, 16]
 	str	x27, [sp, 80]
 	mov	x19, 0
 	mov	w20, 0
-	adrp	x27, .LC90
-.L1439:
+	adrp	x27, .LC92
+.L1479:
 	cmp	x25, x19
-	bne	.L1445
+	bne	.L1485
 	ldp	x19, x20, [sp, 16]
-	adrp	x1, .LC90
+	adrp	x1, .LC92
 	ldp	x21, x22, [sp, 32]
-	add	x1, x1, :lo12:.LC90
+	add	x1, x1, :lo12:.LC92
 	ldp	x23, x24, [sp, 48]
-	adrp	x0, .LC91
+	adrp	x0, .LC93
 	ldp	x25, x26, [sp, 64]
-	add	x0, x0, :lo12:.LC91
+	add	x0, x0, :lo12:.LC93
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	printf
-.L1445:
-	cbnz	w20, .L1440
+.L1485:
+	cbnz	w20, .L1480
 	mov	w2, w19
 	mov	x1, x26
 	mov	x0, x23
 	bl	printf
-.L1440:
+.L1480:
 	cmp	w24, 4
-	bne	.L1441
+	bne	.L1481
 	ldr	w1, [x22, x19, lsl 2]
-.L1447:
+.L1487:
 	mov	x0, x21
 	add	w20, w20, 1
 	bl	printf
 	cmp	w20, 15
-	bls	.L1444
+	bls	.L1484
 	mov	w20, 0
-	add	x1, x27, :lo12:.LC90
-	adrp	x0, .LC91
-	add	x0, x0, :lo12:.LC91
+	add	x1, x27, :lo12:.LC92
+	adrp	x0, .LC93
+	add	x0, x0, :lo12:.LC93
 	bl	printf
-.L1444:
+.L1484:
 	add	x19, x19, 1
-	b	.L1439
-.L1441:
+	b	.L1479
+.L1481:
 	cmp	w24, 2
-	bne	.L1443
+	bne	.L1483
 	ldrsh	w1, [x22, x19, lsl 1]
-	b	.L1447
-.L1443:
+	b	.L1487
+.L1483:
 	ldrb	w1, [x22, x19]
-	b	.L1447
+	b	.L1487
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.hynix_get_read_retry_default,"ax",@progbits
 	.align	2
 	.global	hynix_get_read_retry_default
 	.type	hynix_get_read_retry_default, %function
 hynix_get_read_retry_default:
-	stp	x29, x30, [sp, -144]!
+	stp	x29, x30, [sp, -96]!
+	mov	w8, w0
+	adrp	x0, .LANCHOR26
 	mov	w2, -83
-	mov	w1, -82
 	add	x29, sp, 0
-	stp	x27, x28, [sp, 80]
-	stp	x21, x22, [sp, 32]
-	str	w0, [x29, 140]
-	adrp	x0, .LANCHOR26
+	ldr	x7, [x0, #:lo12:.LANCHOR26]
+	mov	w0, -84
 	stp	x19, x20, [sp, 16]
-	ldr	x28, [x0, #:lo12:.LANCHOR26]
+	mov	w1, -82
+	stp	x21, x22, [sp, 32]
+	add	x6, x7, 128
 	stp	x23, x24, [sp, 48]
-	add	x0, x28, 112
-	str	x0, [x29, 112]
-	ldrb	w0, [x29, 140]
-	add	x22, x28, 128
+	add	x12, x7, 112
 	stp	x25, x26, [sp, 64]
-	strb	w0, [x28, 112]
-	mov	w0, -84
-	ldr	w3, [x29, 140]
-	strb	w0, [x28, 128]
+	cmp	w8, 2
+	str	x27, [sp, 80]
+	strb	w0, [x7, 128]
 	mov	w0, -81
-	strb	w2, [x28, 129]
-	cmp	w3, 2
-	strb	w1, [x28, 130]
-	strb	w0, [x28, 131]
-	bne	.L1449
+	strb	w8, [x7, 112]
+	strb	w2, [x7, 129]
+	strb	w1, [x7, 130]
+	strb	w0, [x7, 131]
+	bne	.L1489
 	mov	w0, -89
-	strb	w0, [x28, 128]
-	adrp	x0, .LANCHOR150+17
+	strb	w0, [x12, 16]
+	adrp	x0, .LANCHOR155+17
 	mov	w1, -9
-	strb	w1, [x0, #:lo12:.LANCHOR150+17]
-.L1504:
-	mov	w0, 7
-	b	.L1539
-.L1449:
-	ldr	w3, [x29, 140]
-	cmp	w3, 3
-	bne	.L1451
-	mov	x7, 0
-.L1452:
-	sub	w0, w7, #80
-	strb	w0, [x22, x7]
-	add	x7, x7, 1
-	cmp	x7, 8
-	bne	.L1452
-	stp	w7, w7, [x29, 132]
-.L1450:
-	ldr	w0, [x29, 140]
-	sub	w0, w0, #1
+	strb	w1, [x0, #:lo12:.LANCHOR155+17]
+.L1553:
+	mov	w23, 7
+	b	.L1596
+.L1489:
+	cmp	w8, 3
+	bne	.L1491
+	mov	x10, 0
+.L1492:
+	sub	w0, w10, #80
+	strb	w0, [x6, x10]
+	add	x10, x10, 1
+	cmp	x10, 8
+	bne	.L1492
+	mov	w23, w10
+.L1490:
+	sub	w0, w8, #1
 	cmp	w0, 1
-	bhi	.L1457
-	adrp	x6, .LANCHOR18
+	bhi	.L1498
+	adrp	x7, .LANCHOR18
 	adrp	x8, .LANCHOR29
-	add	x24, x6, :lo12:.LANCHOR18
-	add	x25, x8, :lo12:.LANCHOR29
-	mov	w20, 0
-	mov	w26, 55
-.L1458:
-	ldrb	w0, [x24]
-	cmp	w0, w20
-	bhi	.L1464
-.L1465:
-	ldr	x0, [x29, 112]
-	ldrb	w1, [x29, 136]
-	strb	w1, [x0, 1]
-	ldrb	w1, [x29, 132]
-	strb	w1, [x0, 2]
+	add	x7, x7, :lo12:.LANCHOR18
+	add	x8, x8, :lo12:.LANCHOR29
+	mov	w5, 0
+	mov	w11, 55
+.L1499:
+	ldrb	w0, [x7]
+	cmp	w0, w5
+	bhi	.L1505
+.L1506:
+	strb	w10, [x12, 1]
+	strb	w23, [x12, 2]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 144
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 96
 	ret
-.L1451:
-	ldr	w3, [x29, 140]
-	cmp	w3, 4
-	bne	.L1453
+.L1491:
+	cmp	w8, 4
+	bne	.L1493
 	mov	w3, -52
-	strb	w3, [x28, 128]
+	strb	w3, [x7, 128]
 	mov	w3, -65
-	strb	w3, [x28, 129]
+	strb	w3, [x7, 129]
 	mov	w3, -86
-	strb	w3, [x28, 130]
+	strb	w3, [x7, 130]
 	mov	w3, -85
-	strb	w0, [x28, 135]
-	strb	w3, [x28, 131]
-	mov	w0, 8
+	mov	w23, 8
+	strb	w3, [x7, 131]
+	mov	w10, w23
 	mov	w3, -51
-	strb	w2, [x28, 133]
-	strb	w3, [x28, 132]
-	strb	w1, [x28, 134]
-	str	w0, [x29, 132]
-.L1540:
-	str	w0, [x29, 136]
-	b	.L1450
-.L1453:
-	ldr	w0, [x29, 140]
-	cmp	w0, 5
-	bne	.L1454
+	strb	w2, [x7, 133]
+	strb	w3, [x7, 132]
+	strb	w1, [x7, 134]
+	strb	w0, [x7, 135]
+	b	.L1490
+.L1493:
+	cmp	w8, 5
+	bne	.L1494
 	mov	w0, 56
-	strb	w0, [x28, 128]
+	strb	w0, [x7, 128]
 	mov	w0, 57
-	strb	w0, [x28, 129]
+	strb	w0, [x7, 129]
 	mov	w0, 58
-	strb	w0, [x28, 130]
+	mov	w23, 8
+	strb	w0, [x7, 130]
 	mov	w0, 59
-	strb	w0, [x28, 131]
-	mov	w0, 8
-.L1539:
-	str	w0, [x29, 132]
-	mov	w0, 4
-	b	.L1540
-.L1454:
-	ldr	w0, [x29, 140]
-	cmp	w0, 6
-	bne	.L1455
+	strb	w0, [x7, 131]
+.L1596:
+	mov	w10, 4
+	b	.L1490
+.L1494:
+	cmp	w8, 6
+	bne	.L1495
 	mov	w0, 14
-	strb	w0, [x28, 128]
+	strb	w0, [x7, 128]
 	mov	w0, 15
-	strb	w0, [x28, 129]
+	strb	w0, [x7, 129]
 	mov	w0, 16
-	strb	w0, [x28, 130]
+	mov	w23, 12
+	strb	w0, [x7, 130]
 	mov	w0, 17
-	strb	w0, [x28, 131]
-	mov	w0, 12
-	b	.L1539
-.L1455:
-	ldr	w0, [x29, 140]
-	cmp	w0, 7
-	bne	.L1504
+	strb	w0, [x7, 131]
+	b	.L1596
+.L1495:
+	cmp	w8, 7
+	bne	.L1496
 	mov	x0, 0
-.L1456:
+.L1497:
 	sub	w1, w0, #80
-	strb	w1, [x22, x0]
+	strb	w1, [x6, x0]
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L1456
+	bne	.L1497
 	mov	w0, -44
-	strb	w0, [x28, 136]
+	mov	w23, 12
+	strb	w0, [x7, 136]
+	mov	w10, 10
 	mov	w0, -43
-	strb	w0, [x28, 137]
-	mov	w0, 12
-	str	w0, [x29, 132]
+	strb	w0, [x7, 137]
+	b	.L1490
+.L1496:
+	cmp	w8, 8
+	bne	.L1553
+	mov	w0, 6
+	strb	w0, [x7, 128]
+	mov	w0, 7
+	strb	w0, [x7, 129]
+	mov	w0, 9
+	strb	w8, [x7, 130]
+	strb	w0, [x7, 131]
+	mov	w23, 50
 	mov	w0, 10
-	b	.L1540
-.L1464:
-	ldrb	w0, [x25, w20, sxtw]
+	mov	w10, 5
+	strb	w0, [x7, 132]
+	b	.L1490
+.L1505:
+	ldrb	w0, [x8, w5, sxtw]
 	mov	x1, 32
 	mov	w2, 160
-	mov	x21, 0
+	mov	x3, 0
 	umaddl	x2, w2, w0, x1
-	ldr	x1, [x29, 112]
-	ubfiz	x0, x0, 8, 8
-	add	x19, x1, x2
 	adrp	x1, .LANCHOR13
+	ubfiz	x0, x0, 8, 8
 	ldr	x4, [x1, #:lo12:.LANCHOR13]
-	add	x23, x4, x0
-.L1459:
-	str	w26, [x23, 2056]
-	ldrb	w0, [x22, x21]
-	str	w0, [x23, 2052]
+	add	x2, x12, x2
+	add	x4, x4, x0
+.L1500:
+	str	w11, [x4, 2056]
+	ldrb	w0, [x6, x3]
+	str	w0, [x4, 2052]
 	mov	w0, 80
 	bl	timer_delay_ns
-	ldr	w0, [x23, 2048]
-	strb	w0, [x19, x21]
-	add	x21, x21, 1
-	ldr	w0, [x29, 136]
-	cmp	w0, w21, uxtb
-	bhi	.L1459
-	adrp	x3, .LANCHOR150
-	add	x3, x3, :lo12:.LANCHOR150
+	ldr	w0, [x4, 2048]
+	strb	w0, [x2, x3]
+	add	x3, x3, 1
+	cmp	w10, w3, uxtb
+	bhi	.L1500
+	adrp	x3, .LANCHOR155
+	add	x3, x3, :lo12:.LANCHOR155
 	mov	x0, 0
-.L1462:
-	add	x15, x19, x0
-	add	x14, x3, x0
+.L1503:
+	add	x14, x2, x0
+	add	x13, x3, x0
 	mov	x1, 1
-.L1461:
+.L1502:
 	lsl	x4, x1, 2
-	lsl	x16, x1, 3
-	ldrb	w17, [x19, x0]
+	lsl	x15, x1, 3
+	ldrb	w16, [x2, x0]
 	add	x1, x1, 1
 	cmp	x1, 7
-	ldrb	w4, [x14, x4]
-	add	w4, w4, w17
-	strb	w4, [x15, x16]
-	bne	.L1461
+	ldrb	w4, [x13, x4]
+	add	w4, w4, w16
+	strb	w4, [x14, x15]
+	bne	.L1502
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L1462
-	add	w5, w20, 1
-	strb	wzr, [x19, 16]
-	strb	wzr, [x19, 24]
-	and	w20, w5, 255
-	strb	wzr, [x19, 32]
-	strb	wzr, [x19, 40]
-	strb	wzr, [x19, 48]
-	strb	wzr, [x19, 41]
-	strb	wzr, [x19, 49]
-	b	.L1458
-.L1457:
-	ldr	w0, [x29, 140]
-	sub	w0, w0, #3
-	cmp	w0, 4
-	bhi	.L1465
-	ldp	w0, w1, [x29, 132]
+	bne	.L1503
+	add	w5, w5, 1
+	strb	wzr, [x2, 16]
+	strb	wzr, [x2, 24]
+	and	w5, w5, 255
+	strb	wzr, [x2, 32]
+	strb	wzr, [x2, 40]
+	strb	wzr, [x2, 48]
+	strb	wzr, [x2, 41]
+	strb	wzr, [x2, 49]
+	b	.L1499
+.L1498:
+	sub	w0, w8, #3
+	cmp	w0, 5
+	bhi	.L1506
+	mul	w15, w23, w10
+	sub	w13, w10, #1
+	and	x13, x13, 255
 	adrp	x19, .LANCHOR18
+	sub	w20, w8, #5
 	add	x19, x19, :lo12:.LANCHOR18
-	sub	w13, w1, #1
-	mul	w15, w0, w1
-	and	x13, x13, 255
-	asr	w0, w15, 2
-	stp	w0, wzr, [x29, 124]
-	lsl	w0, w15, 4
-	str	w0, [x29, 120]
-	ldr	w0, [x29, 124]
-	lsl	w22, w0, 1
-	sbfiz	x21, x0, 2, 32
-	ldr	w0, [x29, 140]
-	sub	w20, w0, #5
-	add	x0, x13, 1
-	str	x0, [x29, 96]
-.L1466:
+	asr	w14, w15, 1
+	add	x13, x13, 1
+	lsl	w15, w15, 4
+	lsl	w22, w14, 1
+	sbfiz	x21, x14, 1, 32
+	mov	w11, 0
+.L1507:
 	ldrb	w0, [x19]
-	ldr	w1, [x29, 128]
-	cmp	w0, w1
-	bls	.L1465
-	ldr	w1, [x29, 128]
+	cmp	w0, w11
+	bls	.L1506
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
-	ldrb	w23, [x0, w1, sxtw]
-	mov	w0, w23
+	ldrb	w24, [x0, w11, sxtw]
+	mov	w0, w24
 	bl	zftl_flash_exit_slc_mode
-	mov	x0, 32
-	mov	w5, 160
-	umaddl	x5, w5, w23, x0
-	ldr	x0, [x29, 112]
-	ubfiz	x23, x23, 8, 8
-	add	x0, x0, x5
-	str	x0, [x29, 104]
 	adrp	x0, .LANCHOR13
+	mov	x5, 32
+	mov	w1, 160
+	mov	w6, 255
 	ldr	x4, [x0, #:lo12:.LANCHOR13]
-	add	x27, x4, x23
-	mov	w23, 255
-	str	w23, [x27, 2056]
+	nop // between mem op and mult-accumulate
+	umaddl	x1, w1, w24, x5
+	ubfiz	x24, x24, 8, 8
+	add	x4, x4, x24
+	add	x5, x12, x1
+	str	w6, [x4, 2056]
 	bl	nandc_wait_flash_ready
-	mov	w0, 54
-	str	w0, [x27, 2056]
-	ldr	w0, [x29, 140]
-	cmp	w0, 4
-	bne	.L1467
-	mov	w0, 64
-	str	w23, [x27, 2052]
-	str	w0, [x27, 2048]
-	mov	w0, 204
-.L1541:
-	str	w0, [x27, 2052]
-	mov	w0, 77
-	b	.L1542
-.L1467:
-	cmp	w20, 1
-	bhi	.L1469
-	ldrb	w0, [x28, 128]
-	str	w0, [x27, 2052]
-	mov	w0, 82
-.L1542:
-	str	w0, [x27, 2048]
-	mov	w0, 22
-	str	w0, [x27, 2056]
+	cmp	w8, 8
+	bne	.L1508
+	mov	w0, 120
+	str	w0, [x4, 2056]
+	str	wzr, [x4, 2052]
 	mov	w0, 23
-	str	w0, [x27, 2056]
+	str	wzr, [x4, 2052]
+	mov	w1, 25
+	str	wzr, [x4, 2052]
+	add	x5, x7, 144
+	str	w0, [x4, 2056]
 	mov	w0, 4
-	str	w0, [x27, 2056]
-	mov	w0, 25
-	str	w0, [x27, 2056]
-	str	wzr, [x27, 2056]
-	str	wzr, [x27, 2052]
-	ldr	w0, [x29, 140]
-	str	wzr, [x27, 2052]
-	cmp	w0, 6
-	bne	.L1470
-	mov	w0, 31
-	str	w0, [x27, 2052]
-.L1471:
-	mov	w23, 2
-	str	w23, [x27, 2052]
-	str	wzr, [x27, 2052]
+	str	w0, [x4, 2056]
+	str	w1, [x4, 2056]
+	mov	w1, 218
+	str	w1, [x4, 2056]
+	mov	w1, 21
+	str	wzr, [x4, 2056]
+	str	wzr, [x4, 2052]
+	str	wzr, [x4, 2052]
+	str	w1, [x4, 2052]
+.L1599:
+	str	w0, [x4, 2052]
 	mov	w0, 48
-	str	w0, [x27, 2056]
+	str	wzr, [x4, 2052]
+	str	w0, [x4, 2056]
 	bl	nandc_wait_flash_ready
 	cmp	w20, 1
-	bls	.L1505
-	ldr	w0, [x29, 140]
-	cmp	w0, 7
+	ccmp	w8, 8, 4, hi
+	beq	.L1554
+	cmp	w8, 7
 	mov	w0, 32
-	csel	w23, w23, w0, ne
-.L1472:
-	adrp	x3, .LANCHOR151
-	mov	x1, 0
-	ldr	x0, [x3, #:lo12:.LANCHOR151]
-.L1473:
-	ldr	w2, [x27, 2048]
-	strb	w2, [x0, x1]
-	add	x1, x1, 1
-	cmp	w23, w1, uxtb
-	bhi	.L1473
-	ldr	w1, [x29, 140]
-	cmp	w1, 7
-	bne	.L1474
+	mov	w1, 2
+	csel	w1, w1, w0, ne
+.L1515:
+	adrp	x6, .LANCHOR156
+	mov	x2, 0
+	ldr	x0, [x6, #:lo12:.LANCHOR156]
+.L1516:
+	ldr	w3, [x4, 2048]
+	strb	w3, [x0, x2]
+	add	x2, x2, 1
+	cmp	w1, w2, uxtb
+	bhi	.L1516
+	cmp	w8, 8
+	bne	.L1517
 	mov	w1, 0
-.L1476:
+.L1519:
 	ldrb	w2, [x0]
-	cmp	w2, 12
-	beq	.L1475
+	cmp	w2, 50
+	beq	.L1518
 	ldrb	w2, [x0, 1]
-	cmp	w2, 10
-	beq	.L1475
+	cmp	w2, 5
+	beq	.L1518
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 255
 	cmp	w1, 8
-	bne	.L1476
-.L1477:
-	adrp	x0, .LC92
+	bne	.L1519
+.L1520:
+	adrp	x0, .LC94
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC92
+	add	x0, x0, :lo12:.LC94
 	bl	printf
-.L1479:
-	b	.L1479
-.L1469:
+.L1522:
+	b	.L1522
+.L1508:
+	mov	w0, 54
+	str	w0, [x4, 2056]
+	cmp	w8, 4
+	bne	.L1510
+	mov	w0, 64
+	str	w6, [x4, 2052]
+	str	w0, [x4, 2048]
+	mov	w0, 204
+.L1597:
+	str	w0, [x4, 2052]
+	mov	w0, 77
+	b	.L1598
+.L1510:
+	cmp	w20, 1
+	bhi	.L1512
+	ldrb	w0, [x7, 128]
+	str	w0, [x4, 2052]
+	mov	w0, 82
+.L1598:
+	str	w0, [x4, 2048]
+.L1511:
+	mov	w0, 22
+	str	w0, [x4, 2056]
+	mov	w0, 23
+	str	w0, [x4, 2056]
+	mov	w0, 4
+	str	w0, [x4, 2056]
+	mov	w0, 25
+	str	w0, [x4, 2056]
+	str	wzr, [x4, 2056]
+	cmp	w8, 6
+	str	wzr, [x4, 2052]
+	str	wzr, [x4, 2052]
+	bne	.L1513
+	mov	w0, 31
+	str	w0, [x4, 2052]
+.L1514:
+	mov	w0, 2
+	b	.L1599
+.L1512:
+	cmp	w8, 7
+	bne	.L1511
 	mov	w0, 174
-	str	w0, [x27, 2052]
-	str	wzr, [x27, 2048]
+	str	w0, [x4, 2052]
+	str	wzr, [x4, 2048]
 	mov	w0, 176
-	b	.L1541
-.L1470:
-	str	wzr, [x27, 2052]
-	b	.L1471
-.L1505:
-	mov	w23, 16
-	b	.L1472
-.L1475:
+	b	.L1597
+.L1513:
+	str	wzr, [x4, 2052]
+	b	.L1514
+.L1554:
+	mov	w1, 16
+	b	.L1515
+.L1518:
 	cmp	w1, 6
-	bhi	.L1477
-.L1478:
-	ldr	x2, [x3, #:lo12:.LANCHOR151]
+	bhi	.L1520
+.L1521:
+	ldr	x3, [x6, #:lo12:.LANCHOR156]
 	mov	x0, 0
-.L1483:
-	ldr	w1, [x29, 120]
-	cmp	w1, w0
-	bgt	.L1484
-	ldr	x1, [x3, #:lo12:.LANCHOR151]
-	mov	w16, 8
-	add	x3, x1, x21
-.L1486:
+.L1531:
+	cmp	w15, w0
+	bgt	.L1532
+	ldr	x1, [x6, #:lo12:.LANCHOR156]
+	mov	w6, 8
+	add	x2, x1, x21
+.L1534:
 	mov	x0, 0
-.L1485:
-	ldr	w17, [x3, x0, lsl 2]
-	ldr	w4, [x29, 124]
-	mvn	w17, w17
-	str	w17, [x3, x0, lsl 2]
+.L1533:
+	ldrh	w16, [x2, x0, lsl 1]
+	mvn	w16, w16
+	strh	w16, [x2, x0, lsl 1]
 	add	x0, x0, 1
-	cmp	w4, w0
-	bgt	.L1485
-	add	x3, x3, x22, uxtw 2
-	subs	w16, w16, #1
-	bne	.L1486
-	mov	x17, x1
-	mov	w23, 0
+	cmp	w14, w0
+	bgt	.L1533
+	add	x2, x2, x22, uxtw 1
+	subs	w6, w6, #1
+	bne	.L1534
+	mov	x6, x1
+	mov	w16, 0
 	mov	w26, 1
-.L1487:
-	mov	w3, 0
+.L1535:
 	mov	w0, 0
-.L1491:
-	mov	x25, x17
-	lsl	w16, w26, w0
+	mov	w2, 0
+.L1539:
+	mov	x30, x6
+	lsl	w25, w26, w2
 	mov	w24, 16
-	mov	w30, 0
-.L1489:
-	ldr	w4, [x25]
-	add	x25, x25, x21
-	bics	wzr, w16, w4
-	cinc	w30, w30, eq
+	mov	w17, 0
+.L1537:
+	ldrh	w27, [x30]
+	add	x30, x30, x21
+	bics	wzr, w25, w27
+	cinc	w17, w17, eq
 	subs	w24, w24, #1
-	bne	.L1489
-	cmp	w30, 9
-	orr	w16, w3, w16
-	add	w0, w0, 1
-	csel	w3, w16, w3, cs
-	cmp	w0, 32
-	bne	.L1491
-	ldr	w0, [x29, 124]
-	add	w23, w23, 1
-	str	w3, [x17], 4
-	cmp	w0, w23
-	bgt	.L1487
+	bne	.L1537
+	cmp	w17, 8
+	bls	.L1538
+	orr	w0, w0, w25
+	and	w0, w0, 65535
+.L1538:
+	add	w2, w2, 1
+	cmp	w2, 16
+	bne	.L1539
+	strh	w0, [x6], 2
+	add	w16, w16, 1
+	cmp	w14, w16
+	bgt	.L1535
 	mov	x0, 0
-	mov	w3, 0
-.L1494:
-	ldr	w16, [x1, x0]
+	mov	w2, 0
+.L1542:
+	ldr	w6, [x1, x0]
 	add	x0, x0, 4
-	cmp	w16, 0
-	cinc	w3, w3, eq
+	cmp	w6, 0
+	cinc	w2, w2, eq
 	cmp	x0, 32
-	bne	.L1494
-	cmp	w3, 7
-	ble	.L1495
+	bne	.L1542
+	cmp	w2, 7
+	ble	.L1543
 	mov	w3, 1024
 	mov	w2, 1
-	adrp	x0, .LC93
-	add	x0, x0, :lo12:.LC93
+	adrp	x0, .LC95
+	add	x0, x0, :lo12:.LC95
 	bl	rknand_print_hex
-	adrp	x0, .LC92
+	adrp	x0, .LC94
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC92
+	add	x0, x0, :lo12:.LC94
 	bl	printf
-.L1496:
-	b	.L1496
-.L1474:
-	ldr	w1, [x29, 140]
+.L1544:
+	b	.L1544
+.L1517:
+	cmp	w8, 7
+	bne	.L1523
+	mov	w1, 0
+.L1525:
+	ldrb	w2, [x0]
+	cmp	w2, 12
+	beq	.L1524
+	ldrb	w2, [x0, 1]
+	cmp	w2, 10
+	beq	.L1524
+	add	w1, w1, 1
+	add	x0, x0, 4
+	and	w1, w1, 255
+	cmp	w1, 8
+	bne	.L1525
+.L1526:
+	adrp	x0, .LC94
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC94
+	bl	printf
+.L1527:
+	b	.L1527
+.L1524:
 	cmp	w1, 6
-	bne	.L1478
+	bls	.L1521
+	b	.L1526
+.L1523:
+	cmp	w8, 6
+	bne	.L1521
 	mov	x1, 0
-.L1480:
+.L1528:
 	ldrb	w2, [x0, x1]
 	cmp	w2, 12
-	beq	.L1478
+	beq	.L1521
 	add	x2, x0, x1
 	ldrb	w2, [x2, 8]
 	cmp	w2, 4
-	beq	.L1478
+	beq	.L1521
 	add	x1, x1, 1
 	cmp	x1, 8
-	bne	.L1480
-	adrp	x0, .LC92
+	bne	.L1528
+	adrp	x0, .LC94
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC92
+	add	x0, x0, :lo12:.LC94
 	bl	printf
-.L1482:
-	b	.L1482
-.L1484:
-	ldr	w1, [x27, 2048]
-	strb	w1, [x2, x0]
+.L1530:
+	b	.L1530
+.L1532:
+	ldr	w1, [x4, 2048]
+	strb	w1, [x3, x0]
 	add	x0, x0, 1
-	b	.L1483
-.L1495:
-	ldr	w0, [x29, 140]
-	cmp	w0, 6
-	beq	.L1507
-	cmp	w0, 7
-	mov	x1, 10
+	b	.L1531
+.L1543:
+	cmp	w8, 6
+	beq	.L1556
+	cmp	w8, 7
+	beq	.L1557
+	cmp	w8, 8
+	mov	x1, 5
 	mov	x0, 8
 	csel	x0, x0, x1, ne
-.L1497:
-	ldr	x5, [x29, 104]
-	mov	w3, 0
-.L1498:
-	mov	x1, 0
-.L1499:
-	ldrb	w16, [x2, x1]
-	ldr	w4, [x29, 136]
-	strb	w16, [x5, x1]
-	add	x1, x1, 1
-	cmp	w4, w1, uxtb
-	bhi	.L1499
-	ldr	x1, [x29, 96]
-	add	w3, w3, 1
-	add	x5, x5, x0
-	add	x2, x2, x1
-	ldr	w1, [x29, 132]
-	cmp	w1, w3
-	bgt	.L1498
-	mov	w23, 255
-	str	w23, [x27, 2056]
+.L1545:
+	mov	x1, x5
+	mov	w5, 0
+.L1546:
+	mov	x2, 0
+.L1547:
+	ldrb	w6, [x3, x2]
+	strb	w6, [x1, x2]
+	add	x2, x2, 1
+	cmp	w10, w2, uxtb
+	bhi	.L1547
+	add	w5, w5, 1
+	add	x3, x3, x13
+	add	x1, x1, x0
+	cmp	w23, w5
+	bgt	.L1546
+	mov	w5, 255
+	str	w5, [x4, 2056]
 	bl	nandc_wait_flash_ready
 	cmp	w20, 1
-	bhi	.L1501
+	bhi	.L1549
 	mov	w0, 54
-	str	w0, [x27, 2056]
-	ldrb	w0, [x28, 128]
-	str	w0, [x27, 2052]
-	str	wzr, [x27, 2048]
+	str	w0, [x4, 2056]
+	ldrb	w0, [x7, 128]
+	str	w0, [x4, 2052]
+	str	wzr, [x4, 2048]
 	mov	w0, 22
-	str	w0, [x27, 2056]
+	str	w0, [x4, 2056]
 	mov	w0, 48
-	str	wzr, [x27, 2056]
-	str	wzr, [x27, 2052]
-	str	wzr, [x27, 2052]
-	str	w23, [x27, 2052]
-	str	w23, [x27, 2052]
-	str	w23, [x27, 2052]
-.L1543:
-	str	w0, [x27, 2056]
+	str	wzr, [x4, 2056]
+	str	wzr, [x4, 2052]
+	str	wzr, [x4, 2052]
+	str	w5, [x4, 2052]
+	str	w5, [x4, 2052]
+	str	w5, [x4, 2052]
+.L1600:
+	str	w0, [x4, 2056]
 	bl	nandc_wait_flash_ready
-	ldr	w0, [x29, 128]
-	add	w11, w0, 1
-	and	w0, w11, 255
-	str	w0, [x29, 128]
-	b	.L1466
-.L1507:
+	add	w11, w11, 1
+	and	w11, w11, 255
+	b	.L1507
+.L1556:
 	mov	x0, 4
-	b	.L1497
-.L1501:
+	b	.L1545
+.L1557:
+	mov	x0, 10
+	b	.L1545
+.L1549:
+	cmp	w8, 8
+	bne	.L1551
+	mov	w0, 190
+	b	.L1600
+.L1551:
 	mov	w0, 56
-	b	.L1543
+	b	.L1600
 	.size	hynix_get_read_retry_default, .-hynix_get_read_retry_default
 	.section	.text.flash_get_read_retry_tbl,"ax",@progbits
 	.align	2
 	.global	flash_get_read_retry_tbl
 	.type	flash_get_read_retry_tbl, %function
 flash_get_read_retry_tbl:
-	adrp	x0, .LANCHOR34+19
-	ldrb	w0, [x0, #:lo12:.LANCHOR34+19]
+	adrp	x0, .LANCHOR30+19
+	ldrb	w0, [x0, #:lo12:.LANCHOR30+19]
 	sub	w1, w0, #1
 	and	w1, w1, 255
-	cmp	w1, 6
-	bhi	.L1544
+	cmp	w1, 7
+	bhi	.L1601
 	b	hynix_get_read_retry_default
-.L1544:
+.L1601:
 	ret
 	.size	flash_get_read_retry_tbl, .-flash_get_read_retry_tbl
 	.section	.text.nandc_xfer_done,"ax",@progbits
@@ -9236,7 +9512,7 @@ flash_get_read_retry_tbl:
 	.type	nandc_xfer_done, %function
 nandc_xfer_done:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR152
+	adrp	x0, .LANCHOR157
 	adrp	x1, .LANCHOR27
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
@@ -9245,28 +9521,28 @@ nandc_xfer_done:
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	cmp	w1, 9
-	strb	wzr, [x0, #:lo12:.LANCHOR152]
-	bne	.L1547
+	strb	wzr, [x0, #:lo12:.LANCHOR157]
+	bne	.L1604
 	ldr	x20, [x19, #:lo12:.LANCHOR13]
 	mov	x24, x0
 	mov	w21, 0
 	ldr	w0, [x20, 16]
 	str	w0, [x29, 64]
 	ldr	w0, [x20, 48]
-	tbnz	x0, 1, .L1548
-	adrp	x22, .LC97
-	adrp	x23, .LC96
-	add	x22, x22, :lo12:.LC97
-	add	x23, x23, :lo12:.LC96
-.L1549:
+	tbnz	x0, 1, .L1605
+	adrp	x22, .LC99
+	adrp	x23, .LC98
+	add	x22, x22, :lo12:.LC99
+	add	x23, x23, :lo12:.LC98
+.L1606:
 	ldr	w0, [x29, 64]
-	tbnz	x0, 20, .L1552
+	tbnz	x0, 20, .L1609
 	ldr	x0, [x19, #:lo12:.LANCHOR13]
 	add	w21, w21, 1
 	tst	x21, 16777215
 	ldr	w0, [x0, 16]
 	str	w0, [x29, 64]
-	bne	.L1549
+	bne	.L1606
 	ldr	w2, [x29, 64]
 	mov	w1, w21
 	ldr	w3, [x20, 64]
@@ -9278,39 +9554,39 @@ nandc_xfer_done:
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1549
-.L1548:
-	adrp	x22, .LC95
-	adrp	x23, .LC96
-	add	x22, x22, :lo12:.LC95
-	add	x23, x23, :lo12:.LC96
-.L1550:
+	b	.L1606
+.L1605:
+	adrp	x22, .LC97
+	adrp	x23, .LC98
+	add	x22, x22, :lo12:.LC97
+	add	x23, x23, :lo12:.LC98
+.L1607:
 	ldr	w1, [x20, 64]
 	ldr	w0, [x29, 64]
 	ubfx	x1, x1, 16, 6
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0
-	bge	.L1552
+	bge	.L1609
 	ldr	x0, [x19, #:lo12:.LANCHOR13]
 	ldr	w0, [x0]
 	str	w0, [x29, 72]
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1551
+	tbz	x0, 13, .L1608
 	ldr	w0, [x29, 72]
-	tbz	x0, 17, .L1551
+	tbz	x0, 17, .L1608
 	ldr	w1, [x29, 72]
-	adrp	x0, .LC94
-	add	x0, x0, :lo12:.LC94
+	adrp	x0, .LC96
+	add	x0, x0, :lo12:.LC96
 	ubfx	x1, x1, 17, 1
-.L1584:
+.L1641:
 	bl	printf
-	b	.L1552
-.L1551:
+	b	.L1609
+.L1608:
 	ldr	w0, [x29, 64]
 	add	w21, w21, 1
 	ubfx	x0, x0, 22, 6
 	cmp	w21, w0, lsl 12
-	bne	.L1550
+	bne	.L1607
 	ldr	w2, [x20, 64]
 	mov	w1, w21
 	ldr	w3, [x29, 64]
@@ -9324,10 +9600,10 @@ nandc_xfer_done:
 	mov	w2, 4
 	bl	rknand_print_hex
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1550
+	tbz	x0, 13, .L1607
 	mov	w0, 1
-	strb	w0, [x24, #:lo12:.LANCHOR152]
-.L1552:
+	strb	w0, [x24, #:lo12:.LANCHOR157]
+.L1609:
 	adrp	x0, .LANCHOR46+32
 	ldp	x19, x20, [sp, 16]
 	str	wzr, [x0, #:lo12:.LANCHOR46+32]
@@ -9335,26 +9611,26 @@ nandc_xfer_done:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1547:
+.L1604:
 	ldr	x20, [x19, #:lo12:.LANCHOR13]
 	mov	w21, 0
 	ldr	w0, [x20, 8]
 	str	w0, [x29, 64]
 	ldr	w0, [x20, 16]
-	tbnz	x0, 1, .L1558
-	adrp	x22, .LC97
-	adrp	x23, .LC96
-	add	x22, x22, :lo12:.LC97
-	add	x23, x23, :lo12:.LC96
-.L1559:
+	tbnz	x0, 1, .L1615
+	adrp	x22, .LC99
+	adrp	x23, .LC98
+	add	x22, x22, :lo12:.LC99
+	add	x23, x23, :lo12:.LC98
+.L1616:
 	ldr	w0, [x29, 64]
-	tbnz	x0, 20, .L1552
+	tbnz	x0, 20, .L1609
 	ldr	x0, [x19, #:lo12:.LANCHOR13]
 	add	w21, w21, 1
 	tst	x21, 16777215
 	ldr	w0, [x0, 8]
 	str	w0, [x29, 64]
-	bne	.L1559
+	bne	.L1616
 	ldr	w2, [x29, 64]
 	mov	w1, w21
 	ldr	w3, [x20, 28]
@@ -9366,34 +9642,34 @@ nandc_xfer_done:
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1559
-.L1558:
-	adrp	x22, .LC95
-	adrp	x23, .LC96
-	add	x22, x22, :lo12:.LC95
-	add	x23, x23, :lo12:.LC96
-.L1560:
+	b	.L1616
+.L1615:
+	adrp	x22, .LC97
+	adrp	x23, .LC98
+	add	x22, x22, :lo12:.LC97
+	add	x23, x23, :lo12:.LC98
+.L1617:
 	ldr	w1, [x20, 28]
 	ldr	w0, [x29, 64]
 	ubfx	x1, x1, 16, 5
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0
-	bge	.L1552
+	bge	.L1609
 	ldr	x0, [x19, #:lo12:.LANCHOR13]
 	ldr	w0, [x0]
 	str	w0, [x29, 72]
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1561
+	tbz	x0, 13, .L1618
 	ldr	w0, [x29, 72]
-	tbz	x0, 17, .L1561
-	adrp	x0, .LC98
+	tbz	x0, 17, .L1618
+	adrp	x0, .LC100
 	ldr	w1, [x29, 72]
-	add	x0, x0, :lo12:.LC98
-	b	.L1584
-.L1561:
+	add	x0, x0, :lo12:.LC100
+	b	.L1641
+.L1618:
 	add	w21, w21, 1
 	tst	x21, 16777215
-	bne	.L1560
+	bne	.L1617
 	ldr	w2, [x20, 28]
 	mov	w1, w21
 	ldr	w3, [x29, 64]
@@ -9406,7 +9682,7 @@ nandc_xfer_done:
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1560
+	b	.L1617
 	.size	nandc_xfer_done, .-nandc_xfer_done
 	.section	.text.nandc_xfer,"ax",@progbits
 	.align	2
@@ -9427,20 +9703,20 @@ nandc_xfer:
 	mov	x21, x4
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
-	cbnz	w22, .L1604
+	cbnz	w22, .L1661
 	adrp	x0, .LANCHOR27
 	ldrb	w0, [x0, #:lo12:.LANCHOR27]
 	cmp	w0, 9
-	bne	.L1587
+	bne	.L1644
 	adrp	x22, .LANCHOR13
 	lsr	w19, w19, 2
 	mov	w3, 1
 	mov	w2, 0
 	ldr	x5, [x22, #:lo12:.LANCHOR13]
 	mov	w0, 0
-.L1588:
+.L1645:
 	cmp	w2, w19
-	bcc	.L1592
+	bcc	.L1649
 	ldr	w19, [x5]
 	cmp	w3, 0
 	mov	w1, 512
@@ -9449,35 +9725,35 @@ nandc_xfer:
 	movk	w1, 0x2, lsl 16
 	and	w1, w19, w1
 	cmp	w1, 139264
-	bne	.L1594
+	bne	.L1651
 	mov	w1, w19
-	adrp	x0, .LC99
-	add	x0, x0, :lo12:.LC99
+	adrp	x0, .LC101
+	add	x0, x0, :lo12:.LC101
 	bl	printf
 	ldr	x0, [x22, #:lo12:.LANCHOR13]
 	orr	w19, w19, 131072
 	str	w19, [x0]
 	mov	w0, -1
-.L1594:
-	tbz	x19, 13, .L1595
-	adrp	x1, .LANCHOR152
-	ldrb	w1, [x1, #:lo12:.LANCHOR152]
-	cbz	w1, .L1595
+.L1651:
+	tbz	x19, 13, .L1652
+	adrp	x1, .LANCHOR157
+	ldrb	w1, [x1, #:lo12:.LANCHOR157]
+	cbz	w1, .L1652
 	mov	w1, w19
-	adrp	x0, .LC100
-	add	x0, x0, :lo12:.LC100
+	adrp	x0, .LC102
+	add	x0, x0, :lo12:.LC102
 	bl	printf
 	ldr	x0, [x22, #:lo12:.LANCHOR13]
 	mov	w1, 1
 	str	w1, [x0, 16]
-.L1623:
+.L1680:
 	mov	w0, -1
-.L1586:
+.L1643:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1592:
+.L1649:
 	uxtw	x1, w2
 	add	x1, x1, 84
 	ldr	w1, [x5, x1, lsl 2]
@@ -9488,30 +9764,30 @@ nandc_xfer:
 	and	w1, w4, w1, lsr 10
 	and	w3, w3, w1
 	ldr	w1, [x29, 56]
-	tbnz	x1, 2, .L1606
+	tbnz	x1, 2, .L1663
 	ldr	w1, [x29, 56]
-	tbnz	x1, 18, .L1606
+	tbnz	x1, 18, .L1663
 	ldr	w4, [x29, 56]
 	ldr	w1, [x29, 56]
 	ubfx	x4, x4, 3, 7
 	ubfx	x1, x1, 19, 7
 	cmp	w4, w1
 	ldr	w1, [x29, 56]
-	ble	.L1590
+	ble	.L1647
 	ubfx	x1, x1, 3, 7
-.L1591:
+.L1648:
 	cmp	w0, w1
 	csel	w0, w0, w1, cs
-.L1589:
+.L1646:
 	add	w2, w2, 1
-	b	.L1588
-.L1590:
+	b	.L1645
+.L1647:
 	ubfx	x1, x1, 19, 7
-	b	.L1591
-.L1606:
+	b	.L1648
+.L1663:
 	mov	w0, -1
-	b	.L1589
-.L1587:
+	b	.L1646
+.L1644:
 	adrp	x0, .LANCHOR43
 	lsr	w4, w19, 1
 	mov	w3, 64
@@ -9523,34 +9799,34 @@ nandc_xfer:
 	mov	w0, 128
 	csel	w3, w3, w0, cc
 	mov	w0, 0
-.L1597:
+.L1654:
 	add	w5, w3, w0
 	cmp	w2, w4
-	bcc	.L1598
+	bcc	.L1655
 	adrp	x22, .LANCHOR13
 	lsr	w19, w19, 2
 	mov	w3, 0
 	mov	w0, 0
 	ldr	x4, [x22, #:lo12:.LANCHOR13]
-.L1599:
+.L1656:
 	cmp	w3, w19
-	bcc	.L1603
+	bcc	.L1660
 	str	wzr, [x4, 16]
 	mov	w1, 8192
 	movk	w1, 0x2, lsl 16
 	ldr	w19, [x4]
 	and	w1, w19, w1
 	cmp	w1, 139264
-	bne	.L1595
+	bne	.L1652
 	mov	w1, w19
-	adrp	x0, .LC101
-	add	x0, x0, :lo12:.LC101
+	adrp	x0, .LC103
+	add	x0, x0, :lo12:.LC103
 	bl	printf
 	ldr	x0, [x22, #:lo12:.LANCHOR13]
 	orr	w19, w19, 131072
 	str	w19, [x0]
-	b	.L1623
-.L1598:
+	b	.L1680
+.L1655:
 	ldr	x7, [x6, #:lo12:.LANCHOR46]
 	and	x0, x0, 4294967292
 	ldr	w0, [x7, x0]
@@ -9567,16 +9843,16 @@ nandc_xfer:
 	add	w1, w1, 4
 	strb	w0, [x21, x7]
 	mov	w0, w5
-	b	.L1597
-.L1603:
+	b	.L1654
+.L1660:
 	uxtw	x1, w3
 	add	x1, x1, 8
 	ldr	w1, [x4, x1, lsl 2]
 	str	w1, [x29, 56]
 	ldr	w1, [x29, 56]
-	tbnz	x1, 2, .L1609
+	tbnz	x1, 2, .L1666
 	ldr	w1, [x29, 56]
-	tbnz	x1, 15, .L1609
+	tbnz	x1, 15, .L1666
 	ldr	w2, [x29, 56]
 	ubfx	x6, x2, 3, 5
 	ldr	w2, [x29, 56]
@@ -9589,42 +9865,42 @@ nandc_xfer:
 	orr	w1, w5, w1, lsl 5
 	cmp	w2, w1
 	ldr	w1, [x29, 56]
-	bls	.L1601
+	bls	.L1658
 	ubfx	x2, x1, 3, 5
 	ldr	w1, [x29, 56]
 	ubfx	x1, x1, 27, 1
-.L1622:
+.L1679:
 	orr	w1, w2, w1, lsl 5
 	cmp	w0, w1
 	csel	w0, w0, w1, cs
-.L1600:
+.L1657:
 	add	w3, w3, 1
-	b	.L1599
-.L1601:
+	b	.L1656
+.L1658:
 	ubfx	x2, x1, 16, 5
 	ldr	w1, [x29, 56]
 	ubfx	x1, x1, 29, 1
-	b	.L1622
-.L1609:
+	b	.L1679
+.L1666:
 	mov	w0, -1
-	b	.L1600
-.L1595:
+	b	.L1657
+.L1652:
 	cmn	w0, #1
-	beq	.L1586
+	beq	.L1643
 	ldr	w1, [x21]
 	cmn	w1, #1
-	bne	.L1586
+	bne	.L1643
 	ldr	w1, [x21, 4]
 	cmn	w1, #1
-	bne	.L1586
+	bne	.L1643
 	ldr	w1, [x20]
 	cmn	w1, #1
 	mov	w1, 512
 	csel	w0, w0, w1, ne
-	b	.L1586
-.L1604:
+	b	.L1643
+.L1661:
 	mov	w0, 0
-	b	.L1586
+	b	.L1643
 	.size	nandc_xfer, .-nandc_xfer
 	.section	.text.flash_read_page,"ax",@progbits
 	.align	2
@@ -9648,22 +9924,22 @@ flash_read_page:
 	mov	x26, x3
 	and	w20, w1, 2097151
 	ubfx	x23, x22, 24, 2
-	tbz	x0, 4, .L1625
+	tbz	x0, 4, .L1682
 	mov	w3, w1
-	adrp	x0, .LC102
+	adrp	x0, .LC104
 	mov	w2, w23
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC102
+	add	x0, x0, :lo12:.LC104
 	bl	printf
-.L1625:
+.L1682:
 	bl	nandc_wait_flash_ready
 	mov	w0, w21
 	bl	nandc_cs
-	adrp	x6, .LANCHOR16
-	cbnz	w23, .L1626
+	adrp	x7, .LANCHOR16
+	cbnz	w23, .L1683
 	mov	w0, w21
 	bl	zftl_flash_enter_slc_mode
-.L1627:
+.L1684:
 	ubfiz	x4, x21, 8, 8
 	lsr	w0, w20, 8
 	add	x4, x19, x4
@@ -9677,15 +9953,15 @@ flash_read_page:
 	str	w0, [x4, 2052]
 	mov	w0, 48
 	str	w0, [x4, 2056]
-	ldr	x0, [x6, #:lo12:.LANCHOR16]
+	ldr	x0, [x7, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1629
-	cbz	w23, .L1629
+	bne	.L1686
+	cbz	w23, .L1686
 	add	w20, w20, w20, lsl 1
 	sub	w0, w20, #1
 	add	w0, w0, w23
-.L1638:
+.L1695:
 	bl	nandc_set_seed
 	bl	nandc_wait_flash_ready
 	mov	w0, 5
@@ -9701,7 +9977,7 @@ flash_read_page:
 	mov	w0, w21
 	bl	nandc_xfer
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.29
+	bl	nandc_de_cs.constprop.28
 	mov	w0, w2
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9709,23 +9985,23 @@ flash_read_page:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1626:
-	ldr	x0, [x6, #:lo12:.LANCHOR16]
+.L1683:
+	ldr	x0, [x7, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1628
+	bne	.L1685
 	sxtw	x0, w21
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 8
 	str	w23, [x0, 8]
-	b	.L1627
-.L1628:
+	b	.L1684
+.L1685:
 	mov	w0, w21
 	bl	zftl_flash_exit_slc_mode
-	b	.L1627
-.L1629:
+	b	.L1684
+.L1686:
 	mov	w0, w20
-	b	.L1638
+	b	.L1695
 	.size	flash_read_page, .-flash_read_page
 	.section	.text.micron_read_retrial,"ax",@progbits
 	.align	2
@@ -9755,20 +10031,20 @@ micron_read_retrial:
 	ldr	x0, [x0, #:lo12:.LANCHOR13]
 	asr	w20, w20, 2
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR154
-	add	x0, x0, :lo12:.LANCHOR154
+	adrp	x0, .LANCHOR159
+	add	x0, x0, :lo12:.LANCHOR159
 	str	x0, [x29, 104]
 	ldr	x0, [x29, 120]
 	add	x23, x0, x19, lsl 8
 	adrp	x0, .LANCHOR14
 	add	x0, x0, :lo12:.LANCHOR14
 	str	x0, [x29, 96]
-.L1640:
+.L1697:
 	ldr	x0, [x29, 104]
 	ldrb	w0, [x0]
 	cmp	w21, w0
-	bcc	.L1645
-.L1644:
+	bcc	.L1702
+.L1701:
 	ldr	x0, [x29, 120]
 	add	x19, x0, x19, lsl 8
 	mov	w0, 239
@@ -9782,22 +10058,23 @@ micron_read_retrial:
 	cmp	w28, w20
 	str	wzr, [x19, 2048]
 	str	wzr, [x19, 2048]
-	bcc	.L1646
+	bcc	.L1703
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L1646:
+.L1703:
 	cmp	w28, 256
 	ccmn	w28, #1, 4, ne
-	bne	.L1639
-	adrp	x0, .LC104
+	bne	.L1704
+	adrp	x0, .LC106
 	mov	w4, w28
 	mov	w3, w21
 	mov	w2, w22
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC104
+	add	x0, x0, :lo12:.LC106
 	bl	printf
-.L1639:
+.L1704:
+	bl	nandc_wait_flash_ready
 	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9806,7 +10083,7 @@ micron_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1645:
+.L1702:
 	mov	w0, 239
 	str	w0, [x23, 2056]
 	mov	w0, 137
@@ -9827,33 +10104,33 @@ micron_read_retrial:
 	mov	w7, w0
 	ldr	x0, [x29, 96]
 	ldr	w0, [x0]
-	tbz	x0, 12, .L1641
+	tbz	x0, 12, .L1698
 	mov	w4, w7
 	str	w7, [x29, 112]
 	mov	w3, w28
 	mov	w2, w22
 	mov	w1, w21
-	adrp	x0, .LC103
-	add	x0, x0, :lo12:.LC103
+	adrp	x0, .LC105
+	add	x0, x0, :lo12:.LC105
 	bl	printf
 	ldr	w7, [x29, 112]
-.L1641:
+.L1698:
 	cmn	w7, #1
-	beq	.L1642
-	adrp	x0, .LANCHOR151
+	beq	.L1699
+	adrp	x0, .LANCHOR156
 	cmn	w28, #1
 	csel	w28, w28, w7, ne
 	cmp	w7, w20
-	ldr	x25, [x0, #:lo12:.LANCHOR151]
-	adrp	x0, .LANCHOR153
-	ldr	x26, [x0, #:lo12:.LANCHOR153]
-	bcc	.L1648
-.L1642:
+	ldr	x25, [x0, #:lo12:.LANCHOR156]
+	adrp	x0, .LANCHOR158
+	ldr	x26, [x0, #:lo12:.LANCHOR158]
+	bcc	.L1705
+.L1699:
 	mov	w21, w27
-	b	.L1640
-.L1648:
+	b	.L1697
+.L1705:
 	mov	w28, w7
-	b	.L1644
+	b	.L1701
 	.size	micron_read_retrial, .-micron_read_retrial
 	.section	.text.toshiba_3d_read_retrial,"ax",@progbits
 	.align	2
@@ -9894,17 +10171,17 @@ toshiba_3d_read_retrial:
 	csel	w0, w1, w0, ne
 	str	w0, [x29, 136]
 	add	x0, x22, :lo12:.LANCHOR23
-	cbnz	w4, .L1663
+	cbnz	w4, .L1720
 	str	x0, [x29, 120]
 	sxtw	x0, w24
 	add	x0, x0, 8
 	add	x0, x25, x0, lsl 8
 	str	x0, [x29, 112]
-.L1670:
+.L1727:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, 36
-	bne	.L1664
+	bne	.L1721
 	mov	w1, w20
 	mov	x0, x21
 	mov	w2, 0
@@ -9912,7 +10189,7 @@ toshiba_3d_read_retrial:
 	ldr	x1, [x29, 112]
 	mov	w0, 93
 	str	w0, [x1, 8]
-.L1665:
+.L1722:
 	mov	w4, w28
 	mov	x3, x27
 	mov	x2, x26
@@ -9922,60 +10199,60 @@ toshiba_3d_read_retrial:
 	mov	w4, w0
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 4, .L1666
+	tbz	x0, 4, .L1723
 	mov	w3, w4
 	str	w4, [x29, 108]
 	mov	w2, w23
 	mov	w1, w20
-	adrp	x0, .LC105
-	add	x0, x0, :lo12:.LC105
+	adrp	x0, .LC107
+	add	x0, x0, :lo12:.LC107
 	bl	printf
 	ldr	w4, [x29, 108]
-.L1666:
+.L1723:
 	cmn	w4, #1
-	beq	.L1667
-	adrp	x0, .LANCHOR151
+	beq	.L1724
+	adrp	x0, .LANCHOR156
 	cmn	w19, #1
 	csel	w19, w19, w4, ne
-	ldr	x26, [x0, #:lo12:.LANCHOR151]
-	adrp	x0, .LANCHOR153
-	ldr	x27, [x0, #:lo12:.LANCHOR153]
+	ldr	x26, [x0, #:lo12:.LANCHOR156]
+	adrp	x0, .LANCHOR158
+	ldr	x27, [x0, #:lo12:.LANCHOR158]
 	adrp	x0, .LANCHOR43
 	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1685
-.L1667:
+	bcc	.L1742
+.L1724:
 	ldr	w0, [x29, 136]
 	add	w20, w20, 1
 	cmp	w0, w20
-	bne	.L1670
-.L1669:
+	bne	.L1727
+.L1726:
 	ldrb	w0, [x22, #:lo12:.LANCHOR23]
 	cmp	w0, 36
-	bne	.L1671
+	bne	.L1728
 	mov	w2, 0
-.L1708:
+.L1765:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_tlc_set_rr_para
-	b	.L1672
-.L1664:
+	b	.L1729
+.L1721:
 	mov	w1, w20
 	mov	x0, x21
 	bl	toshiba_3d_set_slc_rr_para
-	b	.L1665
-.L1685:
+	b	.L1722
+.L1742:
 	mov	w19, w4
-	b	.L1669
-.L1671:
+	b	.L1726
+.L1728:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_3d_set_slc_rr_para
-.L1672:
+.L1729:
 	ldrb	w0, [x22, #:lo12:.LANCHOR23]
 	cmp	w0, 36
-	bne	.L1681
+	bne	.L1738
 	ldr	x0, [x29, 128]
 	add	x25, x25, x0, lsl 8
 	mov	w0, 85
@@ -9984,27 +10261,27 @@ toshiba_3d_read_retrial:
 	str	wzr, [x25, 2052]
 	str	wzr, [x25, 2048]
 	str	w0, [x25, 2056]
-.L1681:
+.L1738:
 	adrp	x0, .LANCHOR43
 	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L1682
+	bcc	.L1739
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L1682:
+.L1739:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L1683
-	adrp	x0, .LC107
+	bne	.L1740
+	adrp	x0, .LC109
 	mov	w4, w19
 	mov	w3, w20
 	mov	w2, w23
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC107
+	add	x0, x0, :lo12:.LC109
 	bl	printf
-.L1683:
+.L1740:
 	bl	nandc_wait_flash_ready
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
@@ -10014,23 +10291,23 @@ toshiba_3d_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1663:
+.L1720:
 	str	x0, [x29, 112]
 	sxtw	x0, w24
 	add	x0, x0, 8
 	add	x0, x25, x0, lsl 8
 	str	x0, [x29, 136]
-.L1679:
+.L1736:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
 	cmp	w0, 36
-	bne	.L1673
+	bne	.L1730
 	mov	x0, x21
 	mov	w2, 1
 	mov	w1, w20
 	bl	toshiba_tlc_set_rr_para
 	mov	w0, 93
-.L1707:
+.L1764:
 	ldr	x1, [x29, 136]
 	mov	w4, w28
 	mov	x3, x27
@@ -10042,54 +10319,54 @@ toshiba_3d_read_retrial:
 	mov	w4, w0
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 4, .L1675
+	tbz	x0, 4, .L1732
 	mov	w3, w4
 	str	w4, [x29, 108]
 	mov	w2, w23
 	mov	w1, w20
-	adrp	x0, .LC106
-	add	x0, x0, :lo12:.LC106
+	adrp	x0, .LC108
+	add	x0, x0, :lo12:.LC108
 	bl	printf
 	ldr	w4, [x29, 108]
-.L1675:
+.L1732:
 	cmn	w4, #1
-	beq	.L1676
-	adrp	x0, .LANCHOR151
+	beq	.L1733
+	adrp	x0, .LANCHOR156
 	cmn	w19, #1
 	csel	w19, w19, w4, ne
-	ldr	x26, [x0, #:lo12:.LANCHOR151]
-	adrp	x0, .LANCHOR153
-	ldr	x27, [x0, #:lo12:.LANCHOR153]
+	ldr	x26, [x0, #:lo12:.LANCHOR156]
+	adrp	x0, .LANCHOR158
+	ldr	x27, [x0, #:lo12:.LANCHOR158]
 	adrp	x0, .LANCHOR43
 	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1686
-.L1676:
+	bcc	.L1743
+.L1733:
 	ldr	w0, [x29, 120]
 	add	w20, w20, 1
 	cmp	w0, w20
-	bne	.L1679
-.L1678:
+	bne	.L1736
+.L1735:
 	ldrb	w0, [x22, #:lo12:.LANCHOR23]
 	cmp	w0, 36
-	bne	.L1680
+	bne	.L1737
 	mov	w2, 1
-	b	.L1708
-.L1673:
+	b	.L1765
+.L1730:
 	mov	x0, x21
 	mov	w1, w20
 	bl	toshiba_3d_set_tlc_rr_para
 	mov	w0, 38
-	b	.L1707
-.L1686:
+	b	.L1764
+.L1743:
 	mov	w19, w4
-	b	.L1678
-.L1680:
+	b	.L1735
+.L1737:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_3d_set_tlc_rr_para
-	b	.L1672
+	b	.L1729
 	.size	toshiba_3d_read_retrial, .-toshiba_3d_read_retrial
 	.section	.text.toshiba_read_retrial,"ax",@progbits
 	.align	2
@@ -10121,35 +10398,35 @@ toshiba_read_retrial:
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
-	bls	.L1727
+	bls	.L1784
 	adrp	x0, .LANCHOR20
 	ldrb	w0, [x0, #:lo12:.LANCHOR20]
-	cbz	w0, .L1728
+	cbz	w0, .L1785
 	mov	w23, 1
 	mov	w0, 1
 	bl	nandc_set_if_mode
-.L1711:
+.L1768:
 	and	x0, x19, 255
 	mov	w1, 92
 	add	x0, x22, x0, lsl 8
 	str	w1, [x0, 2056]
 	mov	w1, 197
 	str	w1, [x0, 2056]
-.L1710:
+.L1767:
 	sxtw	x0, w19
 	mov	w20, 1
 	add	x0, x0, 8
 	mov	w24, -1
 	add	x0, x22, x0, lsl 8
 	str	x0, [x29, 96]
-.L1712:
-	adrp	x0, .LANCHOR154
-	ldrb	w0, [x0, #:lo12:.LANCHOR154]
+.L1769:
+	adrp	x0, .LANCHOR159
+	ldrb	w0, [x0, #:lo12:.LANCHOR159]
 	add	w0, w0, 1
 	cmp	w20, w0
-	bcc	.L1721
+	bcc	.L1778
 	mov	w28, w24
-.L1720:
+.L1777:
 	ldr	x0, [x29, 120]
 	mov	w1, 0
 	ldrb	w0, [x0, #:lo12:.LANCHOR23]
@@ -10157,9 +10434,9 @@ toshiba_read_retrial:
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x21
-	bhi	.L1722
+	bhi	.L1779
 	bl	sandisk_set_rr_para
-.L1723:
+.L1780:
 	sxtw	x19, w19
 	mov	w0, 255
 	add	x19, x19, 8
@@ -10169,27 +10446,27 @@ toshiba_read_retrial:
 	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L1724
+	bcc	.L1781
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L1724:
+.L1781:
 	cmp	w28, 256
 	ccmn	w28, #1, 4, ne
-	bne	.L1725
-	adrp	x0, .LC107
+	bne	.L1782
+	adrp	x0, .LC109
 	mov	w4, w28
 	mov	w3, w20
 	mov	w2, w25
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC107
+	add	x0, x0, :lo12:.LC109
 	bl	printf
-.L1725:
+.L1782:
 	bl	nandc_wait_flash_ready
-	cbz	w23, .L1709
+	cbz	w23, .L1766
 	mov	w0, 4
 	bl	nandc_set_if_mode
-.L1709:
+.L1766:
 	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10198,13 +10475,13 @@ toshiba_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1728:
+.L1785:
 	mov	w23, 0
-	b	.L1711
-.L1727:
+	b	.L1768
+.L1784:
 	mov	w23, 0
-	b	.L1710
-.L1721:
+	b	.L1767
+.L1778:
 	ldr	x0, [x29, 120]
 	mov	w1, w20
 	ldrb	w0, [x0, #:lo12:.LANCHOR23]
@@ -10212,22 +10489,22 @@ toshiba_read_retrial:
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x21
-	bhi	.L1713
+	bhi	.L1770
 	bl	sandisk_set_rr_para
-.L1714:
+.L1771:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0, #:lo12:.LANCHOR23]
 	cmp	w0, 34
-	bne	.L1715
-	adrp	x0, .LANCHOR154
-	ldrb	w0, [x0, #:lo12:.LANCHOR154]
+	bne	.L1772
+	adrp	x0, .LANCHOR159
+	ldrb	w0, [x0, #:lo12:.LANCHOR159]
 	sub	w0, w0, #3
 	cmp	w20, w0
-	bne	.L1715
+	bne	.L1772
 	ldr	x1, [x29, 96]
 	mov	w0, 179
 	str	w0, [x1, 8]
-.L1715:
+.L1772:
 	ldr	x0, [x29, 104]
 	mov	w1, 38
 	ldr	w4, [x29, 116]
@@ -10242,27 +10519,27 @@ toshiba_read_retrial:
 	bl	flash_read_page
 	mov	w28, w0
 	cmn	w0, #1
-	beq	.L1718
+	beq	.L1775
 	cmn	w24, #1
 	csel	w24, w24, w0, ne
-	adrp	x0, .LANCHOR151
-	ldr	x26, [x0, #:lo12:.LANCHOR151]
-	adrp	x0, .LANCHOR153
-	ldr	x27, [x0, #:lo12:.LANCHOR153]
+	adrp	x0, .LANCHOR156
+	ldr	x26, [x0, #:lo12:.LANCHOR156]
+	adrp	x0, .LANCHOR158
+	ldr	x27, [x0, #:lo12:.LANCHOR158]
 	adrp	x0, .LANCHOR43
 	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L1720
-.L1718:
+	bcc	.L1777
+.L1775:
 	add	w20, w20, 1
-	b	.L1712
-.L1713:
+	b	.L1769
+.L1770:
 	bl	toshiba_set_rr_para
-	b	.L1714
-.L1722:
+	b	.L1771
+.L1779:
 	bl	toshiba_set_rr_para
-	b	.L1723
+	b	.L1780
 	.size	toshiba_read_retrial, .-toshiba_read_retrial
 	.section	.text.hynix_read_retrial,"ax",@progbits
 	.align	2
@@ -10293,34 +10570,35 @@ hynix_read_retrial:
 	adrp	x6, .LANCHOR43
 	add	x6, x6, :lo12:.LANCHOR43
 	mov	w5, 0
-	adrp	x7, .LANCHOR151
-	adrp	x8, .LANCHOR153
-.L1742:
+	adrp	x7, .LANCHOR156
+	adrp	x8, .LANCHOR158
+.L1799:
 	cmp	w5, w24
-	bcc	.L1747
-.L1746:
+	bcc	.L1804
+.L1803:
 	adrp	x0, .LANCHOR43
 	add	x23, x28, x23
 	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	strb	w20, [x23, 8]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L1748
+	bcc	.L1805
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L1748:
+.L1805:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L1741
-	adrp	x0, .LC108
+	bne	.L1806
+	adrp	x0, .LC110
 	mov	w4, w19
 	mov	w3, w5
 	mov	w2, w22
 	mov	w1, w5
-	add	x0, x0, :lo12:.LC108
+	add	x0, x0, :lo12:.LC110
 	bl	printf
-.L1741:
+.L1806:
+	bl	nandc_wait_flash_ready
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10329,7 +10607,7 @@ hynix_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1747:
+.L1804:
 	add	w20, w20, 1
 	stp	x6, x8, [x29, 96]
 	and	w20, w20, 255
@@ -10350,21 +10628,21 @@ hynix_read_retrial:
 	cmn	w0, #1
 	ldp	x6, x8, [x29, 96]
 	ldr	x7, [x29, 112]
-	beq	.L1744
+	beq	.L1801
 	ldrb	w1, [x6]
 	cmn	w19, #1
 	csel	w19, w19, w0, ne
-	ldr	x25, [x7, #:lo12:.LANCHOR151]
-	ldr	x26, [x8, #:lo12:.LANCHOR153]
+	ldr	x25, [x7, #:lo12:.LANCHOR156]
+	ldr	x26, [x8, #:lo12:.LANCHOR158]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L1750
-.L1744:
+	bcc	.L1807
+.L1801:
 	add	w5, w5, 1
-	b	.L1742
-.L1750:
+	b	.L1799
+.L1807:
 	mov	w19, w0
-	b	.L1746
+	b	.L1803
 	.size	hynix_read_retrial, .-hynix_read_retrial
 	.section	.text.flash_ddr_tuning_read,"ax",@progbits
 	.align	2
@@ -10392,15 +10670,15 @@ flash_ddr_tuning_read:
 	mov	w28, 0
 	str	x0, [x29, 120]
 	mov	w26, 0
-	adrp	x0, .LC109
+	adrp	x0, .LC111
 	mov	w27, 0
-	add	x0, x0, :lo12:.LC109
+	add	x0, x0, :lo12:.LC111
 	mov	w19, 1024
 	mov	w21, -1
 	mov	w7, 6
 	str	wzr, [x29, 140]
 	str	x0, [x29, 112]
-.L1766:
+.L1823:
 	mov	w0, w7
 	str	w7, [x29, 128]
 	bl	nandc_set_ddr_para
@@ -10414,7 +10692,7 @@ flash_ddr_tuning_read:
 	ldr	x0, [x29, 120]
 	ldr	w7, [x29, 128]
 	ldr	w0, [x0]
-	tbz	x0, 4, .L1761
+	tbz	x0, 4, .L1818
 	ldr	x0, [x29, 112]
 	mov	w3, w4
 	mov	w1, w7
@@ -10424,47 +10702,47 @@ flash_ddr_tuning_read:
 	bl	printf
 	ldr	w4, [x29, 108]
 	ldr	w7, [x29, 128]
-.L1761:
+.L1818:
 	add	w0, w19, 1
 	cmp	w4, w0
-	bhi	.L1762
-	adrp	x0, .LANCHOR151
-	ldr	x23, [x0, #:lo12:.LANCHOR151]
-	adrp	x0, .LANCHOR153
-	ldr	x24, [x0, #:lo12:.LANCHOR153]
+	bhi	.L1819
+	adrp	x0, .LANCHOR156
+	ldr	x23, [x0, #:lo12:.LANCHOR156]
+	adrp	x0, .LANCHOR158
+	ldr	x24, [x0, #:lo12:.LANCHOR158]
 	ldrb	w0, [x25]
 	cmp	w4, w0, lsr 2
-	bcs	.L1772
+	bcs	.L1829
 	add	w27, w27, 1
 	cmp	w27, 7
-	bls	.L1772
+	bls	.L1829
 	sub	w28, w7, w27
 	mov	w19, w4
 	mov	w21, 0
-.L1764:
+.L1821:
 	ldr	w0, [x29, 140]
 	cmp	w27, w26
 	csel	w28, w28, w0, cs
-.L1765:
-	cbz	w28, .L1767
+.L1822:
+	cbz	w28, .L1824
 	adrp	x0, .LANCHOR43
 	mov	w1, 3
 	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	udiv	w0, w0, w1
 	cmp	w0, w19
-	bls	.L1767
+	bls	.L1824
 	mov	w1, w28
-	adrp	x0, .LC110
-	add	x0, x0, :lo12:.LC110
+	adrp	x0, .LC112
+	add	x0, x0, :lo12:.LC112
 	bl	printf
 	mov	w0, w28
-.L1783:
+.L1840:
 	bl	nandc_set_ddr_para
-	cbz	w21, .L1760
+	cbz	w21, .L1817
 	mov	w2, w22
 	mov	w1, w20
-	adrp	x0, .LC111
-	add	x0, x0, :lo12:.LC111
+	adrp	x0, .LC113
+	add	x0, x0, :lo12:.LC113
 	bl	printf
 	mov	w0, w20
 	bl	flash_reset
@@ -10472,8 +10750,8 @@ flash_ddr_tuning_read:
 	bl	flash_set_interface_mode
 	mov	w0, 1
 	bl	nandc_set_if_mode
-	adrp	x0, .LANCHOR35
-	add	x0, x0, :lo12:.LANCHOR35
+	adrp	x0, .LANCHOR31
+	add	x0, x0, :lo12:.LANCHOR31
 	mov	w1, 2
 	strb	w1, [x0, w20, sxtw]
 	mov	w0, w20
@@ -10488,22 +10766,22 @@ flash_ddr_tuning_read:
 	mov	w3, w0
 	mov	w2, w22
 	mov	w1, w20
-	adrp	x0, .LC112
-	add	x0, x0, :lo12:.LC112
+	adrp	x0, .LC114
+	add	x0, x0, :lo12:.LC114
 	bl	printf
 	adrp	x0, .LANCHOR43
 	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	cmp	w19, w0
-	bhi	.L1774
-	adrp	x1, .LANCHOR155
-	ldr	w0, [x1, #:lo12:.LANCHOR155]
+	bhi	.L1831
+	adrp	x1, .LANCHOR160
+	ldr	w0, [x1, #:lo12:.LANCHOR160]
 	add	w0, w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR155]
+	str	w0, [x1, #:lo12:.LANCHOR160]
 	cmp	w0, 100
-	bls	.L1770
+	bls	.L1827
 	adrp	x0, .LANCHOR20
 	strb	wzr, [x0, #:lo12:.LANCHOR20]
-.L1760:
+.L1817:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10512,180 +10790,177 @@ flash_ddr_tuning_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1762:
+.L1819:
 	cmp	w27, w26
-	bls	.L1773
+	bls	.L1830
 	sub	w0, w28, w27
 	str	w0, [x29, 140]
 	cmp	w27, 7
-	bhi	.L1765
+	bhi	.L1822
 	mov	w26, w27
-.L1773:
+.L1830:
 	mov	w27, 0
-	b	.L1763
-.L1772:
+	b	.L1820
+.L1829:
 	mov	w28, w7
 	mov	w19, w4
 	mov	w21, 0
-.L1763:
+.L1820:
 	add	w7, w7, 2
 	cmp	w7, 50
-	bne	.L1766
-	b	.L1764
-.L1767:
+	bne	.L1823
+	b	.L1821
+.L1824:
 	ldrb	w0, [x29, 132]
-	b	.L1783
-.L1774:
+	b	.L1840
+.L1831:
 	mov	w19, w21
-.L1770:
+.L1827:
 	adrp	x20, .LANCHOR42
 	ldrb	w0, [x20, #:lo12:.LANCHOR42]
 	bl	flash_set_interface_mode
 	ldrb	w0, [x20, #:lo12:.LANCHOR42]
 	bl	nandc_set_if_mode
-	b	.L1760
+	b	.L1817
 	.size	flash_ddr_tuning_read, .-flash_ddr_tuning_read
 	.section	.text.flash_read_page_en,"ax",@progbits
 	.align	2
 	.global	flash_read_page_en
 	.type	flash_read_page_en, %function
 flash_read_page_en:
-	stp	x29, x30, [sp, -96]!
+	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	and	w21, w0, 255
+	stp	x19, x20, [sp, 16]
+	and	w20, w0, 255
 	adrp	x0, .LANCHOR18
 	stp	x23, x24, [sp, 48]
-	stp	x25, x26, [sp, 64]
-	mov	x22, x2
-	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
 	mov	w19, w1
-	str	x27, [sp, 80]
-	mov	x23, x3
+	str	x25, [sp, 64]
+	mov	x22, x2
 	ldrb	w1, [x0, #:lo12:.LANCHOR18]
+	mov	x23, x3
 	mov	w24, w4
-	ubfx	x26, x19, 24, 2
 	mov	x25, x0
-	cmp	w1, w21
-	bhi	.L1785
-	adrp	x1, .LANCHOR156
+	cmp	w1, w20
+	bhi	.L1842
+	adrp	x1, .LANCHOR161
 	adrp	x0, .LC0
-	mov	w2, 382
-	add	x1, x1, :lo12:.LANCHOR156
+	mov	w2, 398
+	add	x1, x1, :lo12:.LANCHOR161
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1785:
+.L1842:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
-	ldrb	w20, [x0, w21, sxtw]
+	ldrb	w21, [x0, w20, sxtw]
 	ldrb	w0, [x25, #:lo12:.LANCHOR18]
-	cmp	w0, w21
-	bcs	.L1786
+	cmp	w0, w20
+	bcs	.L1843
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 6, .L1786
-	adrp	x0, .LC113
+	tbnz	x0, 6, .L1844
+.L1868:
+	mov	w0, -1
+.L1841:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L1844:
 	mov	w3, w19
-	mov	w2, w21
-	mov	w1, w20
-	add	x0, x0, :lo12:.LC113
+	mov	w2, w20
+	mov	w1, w21
+	adrp	x0, .LC115
+	add	x0, x0, :lo12:.LC115
 	bl	printf
-.L1786:
-	cbnz	w26, .L1787
+	b	.L1868
+.L1843:
+	tst	x19, 50331648
+	bne	.L1846
 	adrp	x0, .LANCHOR0
 	adrp	x1, .LANCHOR1
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L1788
+	cbz	w0, .L1847
 	ldrb	w0, [x1, #:lo12:.LANCHOR1]
-	cbz	w0, .L1787
-.L1788:
+	cbz	w0, .L1846
+.L1847:
 	adrp	x0, .LANCHOR2
 	ldrb	w1, [x1, #:lo12:.LANCHOR1]
 	ldrh	w2, [x0, #:lo12:.LANCHOR2]
 	udiv	w0, w19, w2
 	mul	w0, w0, w2
 	sub	w19, w19, w0
-	cbz	w1, .L1789
+	cbz	w1, .L1848
 	add	w19, w0, w19, lsl 1
-.L1787:
+.L1846:
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
 	mov	w1, w19
-	mov	w0, w20
+	mov	w0, w21
 	bl	flash_read_page
-	mov	w21, w0
 	cmn	w0, #1
-	bne	.L1784
-	adrp	x25, .LANCHOR45
-	mov	x26, x25
-	ldrb	w27, [x25, #:lo12:.LANCHOR45]
-	cbnz	w27, .L1791
-.L1794:
-	adrp	x0, .LANCHOR157
-	ldr	x5, [x0, #:lo12:.LANCHOR157]
-	cbnz	x5, .L1792
-.L1793:
-	ldrb	w4, [x26, #:lo12:.LANCHOR45]
+	bne	.L1841
+	adrp	x20, .LANCHOR45
+	ldrb	w25, [x20, #:lo12:.LANCHOR45]
+	cbnz	w25, .L1849
+.L1852:
+	adrp	x0, .LANCHOR162
+	ldr	x5, [x0, #:lo12:.LANCHOR162]
+	cbnz	x5, .L1850
+.L1851:
+	ldrb	w4, [x20, #:lo12:.LANCHOR45]
 	mov	w3, -1
 	mov	w2, w19
 	mov	w1, 0
-	adrp	x0, .LC114
-	add	x0, x0, :lo12:.LC114
+	adrp	x0, .LC116
+	add	x0, x0, :lo12:.LC116
 	bl	printf
 	adrp	x0, .LANCHOR20
 	ldrb	w0, [x0, #:lo12:.LANCHOR20]
-	cbz	w0, .L1784
+	cbz	w0, .L1868
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
 	mov	w1, w19
-	mov	w0, w20
-	ldr	x27, [sp, 80]
+	mov	w0, w21
+	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 96
+	ldp	x29, x30, [sp], 80
 	b	flash_ddr_tuning_read
-.L1789:
+.L1848:
 	adrp	x1, .LANCHOR3
 	add	x1, x1, :lo12:.LANCHOR3
 	ldrh	w19, [x1, w19, uxtw 1]
 	add	w19, w19, w0
-	b	.L1787
-.L1791:
-	strb	wzr, [x25, #:lo12:.LANCHOR45]
+	b	.L1846
+.L1849:
+	strb	wzr, [x20, #:lo12:.LANCHOR45]
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
 	mov	w1, w19
-	mov	w0, w20
+	mov	w0, w21
 	bl	flash_read_page
-	strb	w27, [x25, #:lo12:.LANCHOR45]
+	strb	w25, [x20, #:lo12:.LANCHOR45]
 	cmn	w0, #1
-	beq	.L1794
-.L1812:
-	mov	w21, w0
-.L1784:
-	mov	w0, w21
-	ldr	x27, [sp, 80]
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 96
-	ret
-.L1792:
+	beq	.L1852
+	b	.L1841
+.L1850:
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
 	mov	w1, w19
-	mov	w0, w20
+	mov	w0, w21
 	blr	x5
 	cmn	w0, #1
-	beq	.L1793
-	b	.L1812
+	beq	.L1851
+	b	.L1841
 	.size	flash_read_page_en, .-flash_read_page_en
 	.section	.text.flash_get_last_written_page,"ax",@progbits
 	.align	2
@@ -10696,15 +10971,15 @@ flash_get_last_written_page:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	w23, w0, 255
-	adrp	x0, .LANCHOR135
+	adrp	x0, .LANCHOR140
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
 	mov	x24, x2
-	ldrh	w19, [x0, #:lo12:.LANCHOR135]
-	adrp	x0, .LANCHOR34+26
+	ldrh	w19, [x0, #:lo12:.LANCHOR140]
+	adrp	x0, .LANCHOR30+26
 	stp	x21, x22, [sp, 32]
 	and	w21, w1, 65535
-	ldrh	w26, [x0, #:lo12:.LANCHOR34+26]
+	ldrh	w26, [x0, #:lo12:.LANCHOR30+26]
 	sub	w19, w19, #1
 	sxth	w19, w19
 	stp	x27, x28, [sp, 80]
@@ -10715,23 +10990,23 @@ flash_get_last_written_page:
 	add	w1, w19, w26
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L1814
+	bne	.L1870
 	mov	w27, 0
 	mov	w28, 2
-.L1815:
+.L1871:
 	cmp	w27, w19
-	ble	.L1818
-.L1814:
+	ble	.L1874
+.L1870:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1819
+	tbz	x0, 12, .L1875
 	ldr	w3, [x22]
-	adrp	x0, .LC115
+	adrp	x0, .LC117
 	mov	w2, w19
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC115
+	add	x0, x0, :lo12:.LC117
 	bl	printf
-.L1819:
+.L1875:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10740,7 +11015,7 @@ flash_get_last_written_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1818:
+.L1874:
 	add	w20, w27, w19
 	mov	w4, w25
 	mov	x3, x22
@@ -10750,25 +11025,25 @@ flash_get_last_written_page:
 	add	w1, w26, w20, sxth
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L1816
+	bne	.L1872
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L1815
-.L1816:
+	b	.L1871
+.L1872:
 	add	w20, w20, 1
 	sxth	w27, w20
-	b	.L1815
+	b	.L1871
 	.size	flash_get_last_written_page, .-flash_get_last_written_page
 	.section	.text.flash_get_last_written_page_ext,"ax",@progbits
 	.align	2
 	.global	flash_get_last_written_page_ext
 	.type	flash_get_last_written_page_ext, %function
 flash_get_last_written_page_ext:
-	adrp	x4, .LANCHOR99
+	adrp	x4, .LANCHOR102
 	mov	w6, 21
 	and	w0, w0, 65535
 	mov	w5, 1
-	ldrh	w4, [x4, #:lo12:.LANCHOR99]
+	ldrh	w4, [x4, #:lo12:.LANCHOR102]
 	sub	w6, w6, w4
 	mov	w4, w3
 	mov	x3, x2
@@ -10779,165 +11054,6 @@ flash_get_last_written_page_ext:
 	asr	w0, w0, w6
 	b	flash_get_last_written_page
 	.size	flash_get_last_written_page_ext, .-flash_get_last_written_page_ext
-	.section	.text.flash_info_blk_init,"ax",@progbits
-	.align	2
-	.global	flash_info_blk_init
-	.type	flash_info_blk_init, %function
-flash_info_blk_init:
-	stp	x29, x30, [sp, -96]!
-	adrp	x0, .LANCHOR14
-	add	x29, sp, 0
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR26
-	stp	x21, x22, [sp, 32]
-	stp	x23, x24, [sp, 48]
-	stp	x25, x26, [sp, 64]
-	str	x27, [sp, 80]
-	tbz	x0, 12, .L1826
-	ldr	x4, [x20, #:lo12:.LANCHOR26]
-	adrp	x2, .LANCHOR158
-	adrp	x0, .LC116
-	mov	w3, 2048
-	add	x2, x2, :lo12:.LANCHOR158
-	mov	w1, 49
-	add	x0, x0, :lo12:.LC116
-	bl	printf
-.L1826:
-	adrp	x21, .LANCHOR159
-	adrp	x23, .LANCHOR2
-	mov	w24, 21321
-	add	x26, x23, :lo12:.LANCHOR2
-	mov	x22, x21
-	mov	w19, 4
-	movk	w24, 0x5359, lsl 16
-.L1829:
-	ldrh	w1, [x26]
-	mov	w4, 4
-	ldr	x3, [x21, #:lo12:.LANCHOR159]
-	mov	w0, 0
-	ldr	x2, [x20, #:lo12:.LANCHOR26]
-	add	x27, x21, :lo12:.LANCHOR159
-	add	x25, x20, :lo12:.LANCHOR26
-	mul	w1, w1, w19
-	bl	flash_read_page_en
-	cmn	w0, #1
-	beq	.L1827
-	ldr	x2, [x20, #:lo12:.LANCHOR26]
-	ldr	w0, [x2]
-	cmp	w0, w24
-	beq	.L1828
-.L1827:
-	add	w19, w19, 1
-	cmp	w19, 16
-	bne	.L1829
-.L1853:
-	mov	w0, -1
-.L1825:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldr	x27, [sp, 80]
-	ldp	x29, x30, [sp], 96
-	ret
-.L1837:
-	ldr	x0, [x25]
-	ldr	w1, [x0]
-	cmp	w1, w24
-	bne	.L1838
-	ldr	w19, [x0, 4]
-.L1831:
-	add	x24, x21, :lo12:.LANCHOR160
-	ldrh	w0, [x23, #:lo12:.LANCHOR2]
-	ldr	x3, [x22, #:lo12:.LANCHOR159]
-	mov	w4, 4
-	ldr	x2, [x20, #:lo12:.LANCHOR26]
-	ldrb	w1, [x24, 1]
-	mul	w1, w1, w0
-	mov	w0, 0
-	bl	flash_read_page_en
-	cmn	w0, #1
-	beq	.L1832
-	ldr	x0, [x20, #:lo12:.LANCHOR26]
-	mov	w1, 21321
-	movk	w1, 0x5359, lsl 16
-	ldr	w2, [x0]
-	cmp	w2, w1
-	bne	.L1832
-	ldr	w1, [x0, 4]
-	cmp	w19, w1
-	bcs	.L1832
-	ldrb	w1, [x0, 37]
-	ldrb	w0, [x0, 36]
-	strb	w1, [x21, #:lo12:.LANCHOR160]
-	strb	w0, [x24, 1]
-.L1832:
-	ldrb	w1, [x21, #:lo12:.LANCHOR160]
-	add	x24, x21, :lo12:.LANCHOR160
-	ldr	x3, [x22, #:lo12:.LANCHOR159]
-	mov	w4, 4
-	ldr	x2, [x20, #:lo12:.LANCHOR26]
-	mov	w0, 0
-	bl	flash_get_last_written_page
-	sxth	w19, w0
-	add	w0, w0, 1
-	ldrb	w21, [x21, #:lo12:.LANCHOR160]
-	strh	w0, [x24, 2]
-	ldrh	w0, [x23, #:lo12:.LANCHOR2]
-	mov	w23, 21321
-	movk	w23, 0x5359, lsl 16
-	madd	w21, w21, w0, w19
-.L1833:
-	tbz	w19, #31, .L1835
-	cmn	w19, #1
-	bne	.L1836
-	ldr	x0, [x20, #:lo12:.LANCHOR26]
-	ldr	w1, [x0]
-	adrp	x0, .LC117
-	add	x0, x0, :lo12:.LC117
-	bl	printf
-	b	.L1853
-.L1835:
-	ldr	x3, [x22, #:lo12:.LANCHOR159]
-	mov	w4, 4
-	ldr	x2, [x20, #:lo12:.LANCHOR26]
-	mov	w1, w21
-	mov	w0, 0
-	bl	flash_read_page_en
-	cmn	w0, #1
-	beq	.L1834
-	ldr	x0, [x20, #:lo12:.LANCHOR26]
-	ldr	w0, [x0]
-	cmp	w0, w23
-	bne	.L1834
-.L1836:
-	mov	w0, 0
-	b	.L1825
-.L1834:
-	sub	w19, w19, #1
-	sub	w21, w21, #1
-	sxth	w19, w19
-	b	.L1833
-.L1828:
-	adrp	x21, .LANCHOR160
-	add	x1, x21, :lo12:.LANCHOR160
-	ldrb	w3, [x2, 37]
-	mov	w4, 4
-	ldrb	w0, [x2, 36]
-	strb	w3, [x1, 1]
-	ldrh	w1, [x26]
-	ldr	x3, [x27]
-	strb	w0, [x21, #:lo12:.LANCHOR160]
-	mul	w1, w1, w0
-	mov	w0, 0
-	bl	flash_read_page_en
-	cmn	w0, #1
-	bne	.L1837
-.L1838:
-	mov	w19, 0
-	b	.L1831
-	.size	flash_info_blk_init, .-flash_info_blk_init
 	.section	.text.flash_ddr_para_scan,"ax",@progbits
 	.align	2
 	.global	flash_ddr_para_scan
@@ -10956,34 +11072,34 @@ flash_ddr_para_scan:
 	mov	w23, w1
 	str	x25, [sp, 64]
 	strb	w21, [x19, #:lo12:.LANCHOR20]
-	adrp	x24, .LANCHOR162
+	adrp	x24, .LANCHOR164
 	bl	flash_set_interface_mode
-	adrp	x25, .LANCHOR161
+	adrp	x25, .LANCHOR163
 	ldrb	w0, [x20, #:lo12:.LANCHOR42]
 	bl	nandc_set_if_mode
-	ldr	x3, [x25, #:lo12:.LANCHOR161]
+	ldr	x3, [x25, #:lo12:.LANCHOR163]
 	mov	w4, 4
-	ldr	x2, [x24, #:lo12:.LANCHOR162]
+	ldr	x2, [x24, #:lo12:.LANCHOR164]
 	mov	w1, w23
 	mov	w0, w22
 	bl	flash_ddr_tuning_read
-	ldr	x3, [x25, #:lo12:.LANCHOR161]
+	ldr	x3, [x25, #:lo12:.LANCHOR163]
 	mov	w4, 4
-	ldr	x2, [x24, #:lo12:.LANCHOR162]
+	ldr	x2, [x24, #:lo12:.LANCHOR164]
 	mov	w1, w23
 	mov	w0, w22
 	bl	flash_read_page
 	cmn	w0, #1
 	mov	x0, x19
-	bne	.L1855
+	bne	.L1882
 	ldrb	w1, [x20, #:lo12:.LANCHOR42]
-	tbz	x1, 0, .L1855
+	tbz	x1, 0, .L1882
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, w21
 	bl	nandc_set_if_mode
 	strb	wzr, [x19, #:lo12:.LANCHOR20]
-.L1856:
+.L1883:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -10991,10 +11107,10 @@ flash_ddr_para_scan:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1855:
+.L1882:
 	mov	w1, 1
 	strb	w1, [x0, #:lo12:.LANCHOR20]
-	b	.L1856
+	b	.L1883
 	.size	flash_ddr_para_scan, .-flash_ddr_para_scan
 	.section	.text.flash_complete_plane_page_read,"ax",@progbits
 	.align	2
@@ -11014,14 +11130,14 @@ flash_complete_plane_page_read:
 	ldrb	w0, [x0, #:lo12:.LANCHOR18]
 	mov	x22, x2
 	cmp	w0, w23
-	bhi	.L1862
-	adrp	x1, .LANCHOR163
+	bhi	.L1889
+	adrp	x1, .LANCHOR165
 	adrp	x0, .LC0
-	mov	w2, 789
-	add	x1, x1, :lo12:.LANCHOR163
+	mov	w2, 886
+	add	x1, x1, :lo12:.LANCHOR165
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1862:
+.L1889:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w6, [x0, w23, sxtw]
@@ -11029,11 +11145,11 @@ flash_complete_plane_page_read:
 	ldr	x4, [x0, #:lo12:.LANCHOR13]
 	mov	w0, w6
 	bl	nandc_cs
-	cbnz	w20, .L1863
+	cbnz	w20, .L1890
 	mov	w0, w19
 	bl	slc_phy_page_address_calc
 	mov	w19, w0
-.L1863:
+.L1890:
 	adrp	x0, .LANCHOR19+16
 	and	x1, x6, 255
 	and	w3, w19, 255
@@ -11042,53 +11158,53 @@ flash_complete_plane_page_read:
 	adrp	x5, .LANCHOR16
 	cmp	w0, 1
 	lsr	w0, w19, 16
-	bne	.L1864
+	bne	.L1891
 	add	x1, x4, x1, lsl 8
 	mov	w4, 6
-.L1875:
+.L1902:
 	str	w4, [x1, 2056]
 	str	wzr, [x1, 2052]
 	str	wzr, [x1, 2052]
 	str	w3, [x1, 2052]
 	str	w2, [x1, 2052]
 	str	w0, [x1, 2052]
-.L1873:
+.L1900:
 	mov	w0, 224
 	str	w0, [x1, 2056]
 	ldr	x0, [x5, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1867
-	cbz	w20, .L1867
+	bne	.L1894
+	cbz	w20, .L1894
 	add	w19, w19, w19, lsl 1
 	sub	w20, w20, #1
 	add	w0, w19, w20
-.L1874:
+.L1901:
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR34+9
+	adrp	x0, .LANCHOR30+9
 	mov	x4, x22
 	mov	x3, x21
 	mov	w1, 0
-	ldrb	w2, [x0, #:lo12:.LANCHOR34+9]
+	ldrb	w2, [x0, #:lo12:.LANCHOR30+9]
 	mov	w0, w6
 	bl	nandc_xfer
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.29
+	bl	nandc_de_cs.constprop.28
 	ldr	x23, [sp, 48]
 	mov	w0, w2
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1864:
+.L1891:
 	ldr	x7, [x5, #:lo12:.LANCHOR16]
 	add	x1, x4, x1, lsl 8
 	ldrb	w7, [x7, 12]
 	cmp	w7, 3
-	bne	.L1866
+	bne	.L1893
 	mov	w4, 5
-	b	.L1875
-.L1866:
+	b	.L1902
+.L1893:
 	str	wzr, [x1, 2056]
 	str	wzr, [x1, 2052]
 	str	wzr, [x1, 2052]
@@ -11099,10 +11215,10 @@ flash_complete_plane_page_read:
 	str	w0, [x1, 2056]
 	str	wzr, [x1, 2052]
 	str	wzr, [x1, 2052]
-	b	.L1873
-.L1867:
+	b	.L1900
+.L1894:
 	mov	w0, w19
-	b	.L1874
+	b	.L1901
 	.size	flash_complete_plane_page_read, .-flash_complete_plane_page_read
 	.section	.text.flash_complete_page_read,"ax",@progbits
 	.align	2
@@ -11125,14 +11241,14 @@ flash_complete_page_read:
 	mov	x25, x2
 	ubfx	x21, x23, 24, 2
 	cmp	w0, w20
-	bhi	.L1877
-	adrp	x1, .LANCHOR164
+	bhi	.L1904
+	adrp	x1, .LANCHOR166
 	adrp	x0, .LC0
-	mov	w2, 911
-	add	x1, x1, :lo12:.LANCHOR164
+	mov	w2, 1008
+	add	x1, x1, :lo12:.LANCHOR166
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1877:
+.L1904:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w22, [x0, w20, sxtw]
@@ -11140,11 +11256,11 @@ flash_complete_page_read:
 	ldr	x4, [x0, #:lo12:.LANCHOR13]
 	mov	w0, w22
 	bl	nandc_cs
-	cbnz	w21, .L1878
+	cbnz	w21, .L1905
 	mov	w0, w19
 	bl	slc_phy_page_address_calc
 	mov	w19, w0
-.L1878:
+.L1905:
 	ubfiz	x0, x22, 8, 8
 	mov	w1, 5
 	add	x0, x4, x0
@@ -11163,14 +11279,14 @@ flash_complete_page_read:
 	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1879
-	cbz	w21, .L1879
+	bne	.L1906
+	cbz	w21, .L1906
 	sub	w0, w21, #1
 	add	w1, w19, w19, lsl 1
 	add	w0, w0, w1
-.L1906:
-	adrp	x20, .LANCHOR34
-	add	x28, x20, :lo12:.LANCHOR34
+.L1933:
+	adrp	x20, .LANCHOR30
+	add	x28, x20, :lo12:.LANCHOR30
 	bl	nandc_set_seed
 	mov	x4, x25
 	mov	x3, x24
@@ -11179,10 +11295,10 @@ flash_complete_page_read:
 	mov	w0, w22
 	bl	nandc_xfer
 	cmn	w0, #1
-	bne	.L1881
+	bne	.L1908
 	adrp	x26, .LANCHOR45
 	ldrb	w27, [x26, #:lo12:.LANCHOR45]
-	cbz	w27, .L1882
+	cbz	w27, .L1909
 	ldrb	w4, [x28, 9]
 	mov	x3, x25
 	strb	wzr, [x26, #:lo12:.LANCHOR45]
@@ -11191,24 +11307,24 @@ flash_complete_page_read:
 	mov	w0, w22
 	bl	flash_read_page
 	strb	w27, [x26, #:lo12:.LANCHOR45]
-	cbnz	w21, .L1883
-.L1888:
+	cbnz	w21, .L1910
+.L1915:
 	adrp	x1, .LANCHOR0
 	ldrb	w1, [x1, #:lo12:.LANCHOR0]
-	cbz	w1, .L1883
+	cbz	w1, .L1910
 	adrp	x1, .LANCHOR43
 	ldrb	w1, [x1, #:lo12:.LANCHOR43]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	blt	.L1883
-	add	x20, x20, :lo12:.LANCHOR34
+	blt	.L1910
+	add	x20, x20, :lo12:.LANCHOR30
 	ldrb	w1, [x20, 19]
 	sub	w1, w1, #4
 	and	w1, w1, 255
-	cmp	w1, 3
+	cmp	w1, 4
 	mov	w1, 256
 	csel	w0, w0, w1, hi
-.L1876:
+.L1903:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -11216,17 +11332,17 @@ flash_complete_page_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1879:
+.L1906:
 	mov	w0, w19
-	b	.L1906
-.L1883:
+	b	.L1933
+.L1910:
 	cmn	w0, #1
-	bne	.L1876
-.L1889:
-	adrp	x0, .LANCHOR157
-	ldr	x5, [x0, #:lo12:.LANCHOR157]
-	cbnz	x5, .L1885
-.L1887:
+	bne	.L1903
+.L1916:
+	adrp	x0, .LANCHOR162
+	ldr	x5, [x0, #:lo12:.LANCHOR162]
+	cbnz	x5, .L1912
+.L1914:
 	adrp	x0, .LANCHOR45
 	mov	w3, -1
 	mov	w2, w23
@@ -11237,11 +11353,11 @@ flash_complete_page_read:
 	bl	printf
 	adrp	x0, .LANCHOR20
 	ldrb	w0, [x0, #:lo12:.LANCHOR20]
-	cbnz	w0, .L1886
+	cbnz	w0, .L1913
 	mov	w0, -1
-	b	.L1876
-.L1885:
-	add	x0, x20, :lo12:.LANCHOR34
+	b	.L1903
+.L1912:
+	add	x0, x20, :lo12:.LANCHOR30
 	mov	x3, x25
 	mov	x2, x24
 	orr	w1, w19, w21, lsl 24
@@ -11249,10 +11365,10 @@ flash_complete_page_read:
 	mov	w0, w22
 	blr	x5
 	cmn	w0, #1
-	beq	.L1887
-	b	.L1876
-.L1886:
-	add	x20, x20, :lo12:.LANCHOR34
+	beq	.L1914
+	b	.L1903
+.L1913:
+	add	x20, x20, :lo12:.LANCHOR30
 	orr	w1, w19, w21, lsl 24
 	mov	x3, x25
 	mov	x2, x24
@@ -11265,120 +11381,121 @@ flash_complete_page_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	flash_ddr_tuning_read
-.L1881:
-	cbz	w21, .L1888
-	b	.L1876
-.L1882:
-	cbnz	w21, .L1889
-	b	.L1888
+.L1908:
+	cbz	w21, .L1915
+	b	.L1903
+.L1909:
+	cbnz	w21, .L1916
+	b	.L1915
 	.size	flash_complete_page_read, .-flash_complete_page_read
 	.section	.text.queue_wait_first_req_completed,"ax",@progbits
 	.align	2
 	.type	queue_wait_first_req_completed, %function
 queue_wait_first_req_completed:
 	stp	x29, x30, [sp, -96]!
-	adrp	x0, .LANCHOR53
+	adrp	x0, .LANCHOR54
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	ldrb	w0, [x0, #:lo12:.LANCHOR53]
+	ldrb	w0, [x0, #:lo12:.LANCHOR54]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	cmp	w0, 255
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	bne	.L1908
-.L1937:
+	bne	.L1935
+.L1964:
 	mov	w21, 0
-	b	.L1907
-.L1908:
-	adrp	x19, .LANCHOR49
+	b	.L1934
+.L1935:
+	adrp	x19, .LANCHOR50
 	sxtw	x20, w0
-	add	x1, x19, :lo12:.LANCHOR49
+	add	x1, x19, :lo12:.LANCHOR50
 	add	x1, x1, x20, lsl 6
 	ldrb	w2, [x1, 58]
 	ldr	w24, [x1, 40]
 	sub	w3, w2, #1
-	cmp	w3, 9
-	bhi	.L1937
-	adrp	x1, .L1911
-	add	x1, x1, :lo12:.L1911
+	cmp	w3, 10
+	bhi	.L1964
+	adrp	x1, .L1938
+	add	x1, x1, :lo12:.L1938
 	ldrh	w1, [x1,w3,uxtw #1]
-	adr	x3, .Lrtx1911
+	adr	x3, .Lrtx1938
 	add	x1, x3, w1, sxth #2
 	br	x1
-.Lrtx1911:
+.Lrtx1938:
 	.section	.rodata.queue_wait_first_req_completed,"a",@progbits
 	.align	0
 	.align	2
-.L1911:
-	.2byte	(.L1910 - .Lrtx1911) / 4
-	.2byte	(.L1912 - .Lrtx1911) / 4
-	.2byte	(.L1913 - .Lrtx1911) / 4
-	.2byte	(.L1913 - .Lrtx1911) / 4
-	.2byte	(.L1913 - .Lrtx1911) / 4
-	.2byte	(.L1914 - .Lrtx1911) / 4
-	.2byte	(.L1915 - .Lrtx1911) / 4
-	.2byte	(.L1916 - .Lrtx1911) / 4
-	.2byte	(.L1913 - .Lrtx1911) / 4
-	.2byte	(.L1916 - .Lrtx1911) / 4
+.L1938:
+	.2byte	(.L1937 - .Lrtx1938) / 4
+	.2byte	(.L1939 - .Lrtx1938) / 4
+	.2byte	(.L1940 - .Lrtx1938) / 4
+	.2byte	(.L1940 - .Lrtx1938) / 4
+	.2byte	(.L1940 - .Lrtx1938) / 4
+	.2byte	(.L1940 - .Lrtx1938) / 4
+	.2byte	(.L1941 - .Lrtx1938) / 4
+	.2byte	(.L1942 - .Lrtx1938) / 4
+	.2byte	(.L1943 - .Lrtx1938) / 4
+	.2byte	(.L1940 - .Lrtx1938) / 4
+	.2byte	(.L1943 - .Lrtx1938) / 4
 	.section	.text.queue_wait_first_req_completed
-.L1910:
+.L1937:
 	mov	w1, 64
 	mov	w0, w24
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1937
-	add	x0, x19, :lo12:.LANCHOR49
+	tbz	x0, 6, .L1964
+	add	x0, x19, :lo12:.LANCHOR50
 	add	x0, x0, x20, lsl 6
 	ldp	x1, x2, [x0, 8]
-	cbz	x2, .L1918
+	cbz	x2, .L1945
 	ldrb	w3, [x0, 56]
-	adrp	x0, .LANCHOR121
-	ldrb	w0, [x0, #:lo12:.LANCHOR121]
+	adrp	x0, .LANCHOR123
+	ldrb	w0, [x0, #:lo12:.LANCHOR123]
 	cmp	w3, w0
 	csel	x1, x1, x2, ne
-.L1918:
-	add	x19, x19, :lo12:.LANCHOR49
+.L1945:
+	add	x19, x19, :lo12:.LANCHOR50
 	mov	w0, w24
 	add	x20, x19, x20, lsl 6
 	ldr	x2, [x20, 24]
 	bl	flash_complete_page_read
 	str	w0, [x20, 52]
-	mov	w0, 12
+	mov	w0, 13
 	strb	w0, [x20, 58]
 	ldrb	w0, [x20, 2]
 	orr	w0, w0, 8
 	strb	w0, [x20, 2]
-	b	.L1937
-.L1912:
+	b	.L1964
+.L1939:
 	mov	w1, 64
 	mov	w0, w24
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1937
-	add	x0, x19, :lo12:.LANCHOR49
+	tbz	x0, 6, .L1964
+	add	x0, x19, :lo12:.LANCHOR50
 	lsl	x2, x20, 6
 	add	x1, x0, x2
 	ldrb	w21, [x0, x2]
 	add	x0, x0, x21, lsl 6
 	ldr	x24, [x0, 8]
 	ldp	x26, x0, [x1, 8]
-	cbz	x0, .L1919
+	cbz	x0, .L1946
 	ldrb	w2, [x1, 56]
-	adrp	x1, .LANCHOR121
-	ldrb	w1, [x1, #:lo12:.LANCHOR121]
+	adrp	x1, .LANCHOR123
+	ldrb	w1, [x1, #:lo12:.LANCHOR123]
 	cmp	w2, w1
 	csel	x26, x26, x0, ne
-.L1919:
-	add	x0, x19, :lo12:.LANCHOR49
+.L1946:
+	add	x0, x19, :lo12:.LANCHOR50
 	add	x0, x0, x21, lsl 6
 	ldr	x1, [x0, 16]
-	cbz	x1, .L1920
+	cbz	x1, .L1947
 	ldrb	w2, [x0, 56]
-	adrp	x0, .LANCHOR121
-	ldrb	w0, [x0, #:lo12:.LANCHOR121]
+	adrp	x0, .LANCHOR123
+	ldrb	w0, [x0, #:lo12:.LANCHOR123]
 	cmp	w2, w0
 	csel	x24, x24, x1, ne
-.L1920:
-	add	x22, x19, :lo12:.LANCHOR49
+.L1947:
+	add	x22, x19, :lo12:.LANCHOR50
 	mov	x1, x26
 	add	x27, x22, x20, lsl 6
 	add	x22, x22, x21, lsl 6
@@ -11392,19 +11509,19 @@ queue_wait_first_req_completed:
 	bl	flash_complete_plane_page_read
 	mov	w25, w0
 	cmn	w23, #1
-	beq	.L1921
+	beq	.L1948
 	ldr	w0, [x27, 36]
 	cmn	w0, #1
-	beq	.L1922
+	beq	.L1949
 	ldr	x1, [x27, 24]
 	ldr	w1, [x1, 4]
 	cmp	w0, w1
-	beq	.L1922
-.L1921:
-	add	x22, x19, :lo12:.LANCHOR49
-	adrp	x2, .LANCHOR121
+	beq	.L1949
+.L1948:
+	add	x22, x19, :lo12:.LANCHOR50
+	adrp	x2, .LANCHOR123
 	add	x22, x22, x20, lsl 6
-	ldrb	w4, [x2, #:lo12:.LANCHOR121]
+	ldrb	w4, [x2, #:lo12:.LANCHOR123]
 	mov	x2, x26
 	ldr	x3, [x22, 24]
 	ldr	w1, [x22, 40]
@@ -11414,38 +11531,38 @@ queue_wait_first_req_completed:
 	mov	w23, w0
 	ldr	w2, [x22, 36]
 	cmn	w2, #1
-	beq	.L1923
+	beq	.L1950
 	ldr	x0, [x22, 24]
 	ldr	w4, [x0, 4]
 	cmp	w2, w4
-	beq	.L1923
+	beq	.L1950
 	adrp	x1, .LANCHOR14
 	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 6, .L1923
+	tbz	x1, 6, .L1950
 	ldr	w3, [x0]
 	adrp	x0, .LC119
 	ldr	w1, [x22, 40]
 	add	x0, x0, :lo12:.LC119
 	bl	printf
-.L1923:
-	add	x0, x19, :lo12:.LANCHOR49
+.L1950:
+	add	x0, x19, :lo12:.LANCHOR50
 	add	x0, x0, x20, lsl 6
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L1922
+	beq	.L1949
 	ldr	x0, [x0, 24]
 	ldr	w0, [x0, 4]
 	cmp	w1, w0
-	beq	.L1922
-	adrp	x1, .LANCHOR165
+	beq	.L1949
+	adrp	x1, .LANCHOR167
 	adrp	x0, .LC0
-	mov	w2, 338
-	add	x1, x1, :lo12:.LANCHOR165
+	mov	w2, 360
+	add	x1, x1, :lo12:.LANCHOR167
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1922:
-	add	x0, x19, :lo12:.LANCHOR49
-	mov	w1, 12
+.L1949:
+	add	x0, x19, :lo12:.LANCHOR50
+	mov	w1, 13
 	add	x20, x0, x20, lsl 6
 	cmn	w25, #1
 	strb	w1, [x20, 58]
@@ -11453,20 +11570,20 @@ queue_wait_first_req_completed:
 	str	w23, [x20, 52]
 	orr	w1, w1, 8
 	strb	w1, [x20, 2]
-	beq	.L1924
+	beq	.L1951
 	add	x0, x0, x21, lsl 6
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L1926
+	beq	.L1953
 	ldr	x0, [x0, 24]
 	ldr	w0, [x0, 4]
 	cmp	w1, w0
-	beq	.L1926
-.L1924:
-	add	x20, x19, :lo12:.LANCHOR49
-	adrp	x2, .LANCHOR121
+	beq	.L1953
+.L1951:
+	add	x20, x19, :lo12:.LANCHOR50
+	adrp	x2, .LANCHOR123
 	add	x20, x20, x21, lsl 6
-	ldrb	w4, [x2, #:lo12:.LANCHOR121]
+	ldrb	w4, [x2, #:lo12:.LANCHOR123]
 	mov	x2, x24
 	ldr	x3, [x20, 24]
 	ldr	w1, [x20, 40]
@@ -11475,127 +11592,127 @@ queue_wait_first_req_completed:
 	bl	flash_read_page_en
 	ldr	w2, [x20, 36]
 	cmn	w2, #1
-	beq	.L1928
+	beq	.L1955
 	ldr	x0, [x20, 24]
 	ldr	w4, [x0, 4]
 	cmp	w2, w4
-	beq	.L1928
+	beq	.L1955
 	adrp	x1, .LANCHOR14
 	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 6, .L1928
+	tbz	x1, 6, .L1955
 	ldr	w3, [x0]
 	adrp	x0, .LC119
 	ldr	w1, [x20, 40]
 	add	x0, x0, :lo12:.LC119
 	bl	printf
-.L1928:
-	add	x0, x19, :lo12:.LANCHOR49
+.L1955:
+	add	x0, x19, :lo12:.LANCHOR50
 	add	x0, x0, x21, lsl 6
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L1926
+	beq	.L1953
 	ldr	x0, [x0, 24]
 	ldr	w0, [x0, 4]
 	cmp	w1, w0
-	beq	.L1926
-	adrp	x1, .LANCHOR165
+	beq	.L1953
+	adrp	x1, .LANCHOR167
 	adrp	x0, .LC0
-	mov	w2, 353
-	add	x1, x1, :lo12:.LANCHOR165
+	mov	w2, 375
+	add	x1, x1, :lo12:.LANCHOR167
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1926:
-	add	x19, x19, :lo12:.LANCHOR49
-	mov	w0, 12
+.L1953:
+	add	x19, x19, :lo12:.LANCHOR50
+	mov	w0, 13
 	add	x21, x19, x21, lsl 6
 	strb	w0, [x21, 58]
 	ldrb	w0, [x21, 2]
 	str	w23, [x21, 52]
 	orr	w0, w0, 8
 	strb	w0, [x21, 2]
-	b	.L1937
-.L1913:
+	b	.L1964
+.L1940:
 	mov	w1, 64
 	mov	w0, w24
 	bl	flash_wait_device_ready
 	mov	w21, w0
-	tbz	x21, 6, .L1937
-	add	x19, x19, :lo12:.LANCHOR49
+	tbz	x21, 6, .L1964
+	add	x19, x19, :lo12:.LANCHOR50
 	mov	w0, 5
 	add	x20, x19, x20, lsl 6
 	tst	w21, w0
-	beq	.L1936
+	beq	.L1963
 	ldrb	w1, [x20, 1]
-	mov	w0, 11
+	mov	w0, 12
 	ldr	w3, [x20, 40]
-	mov	w4, 11
+	mov	w4, 12
 	strb	w0, [x20, 58]
 	mov	w2, w21
 	adrp	x0, .LC120
 	add	x0, x0, :lo12:.LC120
 	bl	printf
-.L1997:
+.L2024:
 	mov	w0, -1
 	str	w0, [x20, 52]
-	b	.L1907
-.L1916:
-	cmp	w2, 10
-	add	x21, x19, :lo12:.LANCHOR49
+	b	.L1934
+.L1943:
+	cmp	w2, 11
+	add	x21, x19, :lo12:.LANCHOR50
 	ubfiz	x0, x0, 6, 8
 	mov	w1, 3
-	mov	w2, 9
+	mov	w2, 10
 	add	x0, x21, x0
 	csel	w2, w2, w1, eq
 	ubfx	x3, x24, 21, 3
 	mov	x22, x21
-.L1931:
+.L1958:
 	ldrb	w1, [x0]
 	cmp	w1, 255
-	bne	.L1935
+	bne	.L1962
 	mov	w21, -1
-	b	.L1907
-.L1935:
+	b	.L1934
+.L1962:
 	sxtw	x23, w1
 	ubfiz	x0, x1, 6, 8
 	add	x1, x22, x23, lsl 6
 	add	x0, x22, x0
 	ldrb	w4, [x1, 58]
 	cmp	w4, w2
-	bne	.L1931
+	bne	.L1958
 	ldr	w1, [x1, 40]
 	ubfx	x1, x1, 21, 3
 	cmp	w3, w1
-	bne	.L1931
+	bne	.L1958
 	mov	w0, w24
 	mov	w1, 64
 	bl	flash_wait_device_ready
 	mov	w24, w0
 	and	w21, w0, 64
-	tbz	x24, 6, .L1933
+	tbz	x24, 6, .L1960
 	add	x22, x22, x20, lsl 6
 	ands	w21, w0, 15
-	beq	.L1934
+	beq	.L1961
 	ldrb	w1, [x22, 1]
 	mov	w2, w0
 	ldr	w3, [x22, 40]
-	mov	w4, 11
+	mov	w4, 12
 	adrp	x0, .LC121
 	add	x0, x0, :lo12:.LC121
 	mov	w21, w24
 	bl	printf
-	mov	w0, 11
+	mov	w0, 12
 	strb	w0, [x22, 58]
 	mov	w0, -1
 	str	w0, [x22, 52]
-.L1933:
-	add	x1, x19, :lo12:.LANCHOR49
+.L1960:
+	add	x1, x19, :lo12:.LANCHOR50
 	add	x20, x1, x20, lsl 6
 	add	x1, x1, x23, lsl 6
 	ldrb	w0, [x20, 58]
 	strb	w0, [x1, 58]
 	ldr	w0, [x20, 52]
 	str	w0, [x1, 52]
-.L1907:
+.L1934:
 	mov	w0, w21
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -11604,40 +11721,40 @@ queue_wait_first_req_completed:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1934:
-	mov	w0, 12
+.L1961:
+	mov	w0, 13
 	str	wzr, [x22, 52]
 	strb	w0, [x22, 58]
-	b	.L1933
-.L1914:
+	b	.L1960
+.L1941:
 	mov	w1, 32
 	mov	w0, w24
 	bl	flash_wait_device_ready
 	mov	w21, w0
-	tbz	x21, 5, .L1937
-	add	x19, x19, :lo12:.LANCHOR49
+	tbz	x21, 5, .L1964
+	add	x19, x19, :lo12:.LANCHOR50
 	tst	x21, 15
 	add	x20, x19, x20, lsl 6
-	beq	.L1936
-	mov	w0, 11
-	strb	w0, [x20, 58]
-	b	.L1997
-.L1936:
+	beq	.L1963
 	mov	w0, 12
+	strb	w0, [x20, 58]
+	b	.L2024
+.L1963:
+	mov	w0, 13
 	str	wzr, [x20, 52]
 	strb	w0, [x20, 58]
-	b	.L1937
-.L1915:
+	b	.L1964
+.L1942:
 	mov	w1, 64
 	mov	w0, w24
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1937
-	add	x19, x19, :lo12:.LANCHOR49
+	tbz	x0, 6, .L1964
+	add	x19, x19, :lo12:.LANCHOR50
 	add	x19, x19, x20, lsl 6
 	str	w0, [x19, 52]
-	mov	w0, 6
+	mov	w0, 7
 	strb	w0, [x19, 58]
-	b	.L1937
+	b	.L1964
 	.size	queue_wait_first_req_completed, .-queue_wait_first_req_completed
 	.section	.text.sblk_wait_write_queue_completed,"ax",@progbits
 	.align	2
@@ -11647,19 +11764,19 @@ sblk_wait_write_queue_completed:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR53
-	add	x19, x19, :lo12:.LANCHOR53
-.L1999:
+	adrp	x19, .LANCHOR54
+	add	x19, x19, :lo12:.LANCHOR54
+.L2026:
 	ldrb	w0, [x19]
 	cmp	w0, 255
-	bne	.L2000
+	bne	.L2027
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2000:
+.L2027:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L1999
+	b	.L2026
 	.size	sblk_wait_write_queue_completed, .-sblk_wait_write_queue_completed
 	.section	.text.ftl_read_page,"ax",@progbits
 	.align	2
@@ -11722,24 +11839,24 @@ sblk_read_page:
 	stp	x21, x22, [sp, 32]
 	and	w22, w1, 255
 	stp	x19, x20, [sp, 16]
-	adrp	x21, .LANCHOR49
+	adrp	x21, .LANCHOR50
 	stp	x23, x24, [sp, 48]
 	mov	x19, x0
 	stp	x25, x26, [sp, 64]
 	mov	x23, x0
-	adrp	x26, .LANCHOR166
+	adrp	x26, .LANCHOR168
 	mov	w20, w22
-	add	x26, x26, :lo12:.LANCHOR166
-	add	x21, x21, :lo12:.LANCHOR49
+	add	x26, x26, :lo12:.LANCHOR168
+	add	x21, x21, :lo12:.LANCHOR50
 	stp	x27, x28, [sp, 80]
-	adrp	x27, .LANCHOR105
-.L2007:
-	cbnz	w20, .L2017
-.L2030:
-	adrp	x19, .LANCHOR49
-	add	x19, x19, :lo12:.LANCHOR49
-.L2018:
-	cbnz	w22, .L2020
+	adrp	x27, .LANCHOR107
+.L2034:
+	cbnz	w20, .L2044
+.L2057:
+	adrp	x19, .LANCHOR50
+	add	x19, x19, :lo12:.LANCHOR50
+.L2045:
+	cbnz	w22, .L2047
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -11748,55 +11865,55 @@ sblk_read_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2017:
+.L2044:
 	ldrb	w24, [x19]
 	ldr	w25, [x19, 40]
-.L2008:
+.L2035:
 	mov	w1, 0
 	mov	w0, w25
 	bl	queue_lun_state
-	cbnz	w0, .L2009
+	cbnz	w0, .L2036
 	cmp	w20, 1
-	beq	.L2014
+	beq	.L2041
 	ldrb	w0, [x26]
-	cbnz	w0, .L2011
-.L2014:
+	cbnz	w0, .L2038
+.L2041:
 	mov	x0, x19
 	bl	queue_read_cmd
-	b	.L2012
-.L2009:
+	b	.L2039
+.L2036:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2008
-.L2011:
+	b	.L2035
+.L2038:
 	ldrb	w0, [x19]
 	ubfx	x4, x25, 21, 3
 	cmp	w0, 255
-	bne	.L2013
+	bne	.L2040
 	str	w4, [x29, 124]
-	mov	w2, 624
-	adrp	x1, .LANCHOR167
+	mov	w2, 652
+	adrp	x1, .LANCHOR169
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR167
+	add	x1, x1, :lo12:.LANCHOR169
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	ldr	w4, [x29, 124]
-.L2013:
+.L2040:
 	ldrb	w28, [x19]
 	sbfiz	x2, x28, 6, 32
 	add	x3, x21, x2
 	ldr	w1, [x3, 40]
 	ubfx	x0, x1, 21, 3
 	cmp	w4, w0
-	bne	.L2014
-	ldrh	w0, [x27, #:lo12:.LANCHOR105]
+	bne	.L2041
+	ldrh	w0, [x27, #:lo12:.LANCHOR107]
 	add	w25, w0, w25
 	cmp	w1, w25
-	bne	.L2014
+	bne	.L2041
 	ldr	w0, [x19, 40]
-	adrp	x25, .LANCHOR53
+	adrp	x25, .LANCHOR54
 	ldrb	w24, [x21, x2]
-	add	x25, x25, :lo12:.LANCHOR53
+	add	x25, x25, :lo12:.LANCHOR54
 	stp	x3, x2, [x29, 104]
 	sub	w20, w20, #1
 	bl	flash_start_plane_read
@@ -11818,26 +11935,26 @@ sblk_read_page:
 	add	x1, x21, x1
 	strb	w4, [x21, x2]
 	bl	buf_add_tail
-.L2012:
+.L2039:
 	subs	w20, w20, #1
-	beq	.L2030
+	beq	.L2057
 	ubfiz	x19, x24, 6, 8
 	add	x19, x21, x19
-	b	.L2007
-.L2020:
+	b	.L2034
+.L2047:
 	ldrb	w0, [x23, 58]
-	cmp	w0, 12
-	bne	.L2019
+	cmp	w0, 13
+	bne	.L2046
 	ldrb	w0, [x23]
 	sub	w22, w22, #1
 	cmp	w0, 255
-	beq	.L2019
+	beq	.L2046
 	ubfiz	x23, x0, 6, 8
 	add	x23, x19, x23
-.L2019:
+.L2046:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2018
+	b	.L2045
 	.size	sblk_read_page, .-sblk_read_page
 	.section	.text.flash_prog_page,"ax",@progbits
 	.align	2
@@ -11848,86 +11965,84 @@ flash_prog_page:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 255
-	stp	x21, x22, [sp, 32]
 	adrp	x0, .LANCHOR13
-	adrp	x22, .LANCHOR14
+	stp	x23, x24, [sp, 48]
+	stp	x21, x22, [sp, 32]
+	and	x19, x20, 255
+	ldr	x24, [x0, #:lo12:.LANCHOR13]
+	adrp	x0, .LANCHOR14
 	stp	x25, x26, [sp, 64]
-	ldr	x25, [x0, #:lo12:.LANCHOR13]
 	mov	w21, w1
-	ldr	w0, [x22, #:lo12:.LANCHOR14]
-	and	x19, x20, 255
-	stp	x23, x24, [sp, 48]
-	add	x23, x19, 8
-	stp	x27, x28, [sp, 80]
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	add	x22, x19, 8
+	str	x27, [sp, 80]
 	mov	x26, x2
+	add	x22, x24, x22, lsl 8
+	and	w23, w1, 2097151
+	ubfx	x25, x21, 24, 2
 	mov	x27, x3
-	add	x23, x25, x23, lsl 8
-	and	w24, w1, 2097151
-	ubfx	x28, x21, 24, 2
-	tbz	x0, 4, .L2033
+	tbz	x0, 4, .L2060
 	adrp	x0, .LC122
 	mov	w3, w4
-	mov	w2, w28
+	mov	w2, w25
 	add	x0, x0, :lo12:.LC122
 	bl	printf
-.L2033:
+.L2060:
 	bl	nandc_wait_flash_ready
 	mov	w0, w20
 	bl	hynix_reconfig_rr_para
 	mov	w0, w20
 	bl	nandc_cs
 	mov	w0, w20
-	cbnz	w28, .L2034
+	cbnz	w25, .L2061
 	bl	zftl_flash_enter_slc_mode
-.L2035:
-	add	x19, x25, x19, lsl 8
+.L2062:
+	add	x19, x24, x19, lsl 8
 	mov	w0, 128
 	str	w0, [x19, 2056]
 	and	w0, w21, 255
 	str	wzr, [x19, 2052]
 	str	wzr, [x19, 2052]
 	str	w0, [x19, 2052]
-	lsr	w0, w24, 8
+	lsr	w0, w23, 8
 	str	w0, [x19, 2052]
-	lsr	w0, w24, 16
+	lsr	w0, w23, 16
 	str	w0, [x19, 2052]
-	mov	w0, w24
+	mov	w0, w23
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR34+9
+	adrp	x0, .LANCHOR30+9
 	mov	x3, x27
 	mov	x2, x26
-	ldrb	w1, [x0, #:lo12:.LANCHOR34+9]
+	ldrb	w1, [x0, #:lo12:.LANCHOR30+9]
 	mov	w0, 1
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
 	mov	w0, 16
 	str	w0, [x19, 2056]
 	bl	nandc_wait_flash_ready
-	mov	x0, x23
+	mov	x0, x22
 	bl	flash_read_status
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.29
+	bl	nandc_de_cs.constprop.28
 	and	w19, w2, 4
-	tbz	x2, 2, .L2032
-	ldr	w0, [x22, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2032
+	tbz	x2, 2, .L2059
 	adrp	x0, .LC123
 	mov	w2, w19
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC123
 	bl	printf
-.L2032:
+.L2059:
 	mov	w0, w19
+	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2034:
+.L2061:
 	bl	zftl_flash_exit_slc_mode
-	b	.L2035
+	b	.L2062
 	.size	flash_prog_page, .-flash_prog_page
 	.section	.text.flash_test_blk,"ax",@progbits
 	.align	2
@@ -11938,16 +12053,16 @@ flash_test_blk:
 	mov	w2, 32
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR151
+	adrp	x22, .LANCHOR156
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 255
-	ldr	x0, [x22, #:lo12:.LANCHOR151]
-	adrp	x21, .LANCHOR153
+	ldr	x0, [x22, #:lo12:.LANCHOR156]
+	adrp	x21, .LANCHOR158
 	and	w19, w1, 65535
 	str	x23, [sp, 48]
 	mov	w1, 165
 	bl	ftl_memset
-	ldr	x0, [x21, #:lo12:.LANCHOR153]
+	ldr	x0, [x21, #:lo12:.LANCHOR158]
 	mov	w2, 8
 	mov	w1, 90
 	bl	ftl_memset
@@ -11958,10 +12073,10 @@ flash_test_blk:
 	mov	w1, w19
 	bl	flash_erase_block
 	cmn	w0, #1
-	bne	.L2048
-.L2050:
+	bne	.L2072
+.L2074:
 	mov	w21, -1
-.L2049:
+.L2073:
 	mov	w1, w19
 	mov	w0, w20
 	bl	flash_erase_block
@@ -11971,38 +12086,38 @@ flash_test_blk:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2048:
-	adrp	x23, .LANCHOR34
-	add	x23, x23, :lo12:.LANCHOR34
-	ldr	x3, [x21, #:lo12:.LANCHOR153]
+.L2072:
+	adrp	x23, .LANCHOR30
+	add	x23, x23, :lo12:.LANCHOR30
+	ldr	x3, [x21, #:lo12:.LANCHOR158]
 	mov	w1, w19
-	ldr	x2, [x22, #:lo12:.LANCHOR151]
+	ldr	x2, [x22, #:lo12:.LANCHOR156]
 	mov	w0, w20
 	ldrb	w4, [x23, 9]
 	bl	flash_prog_page
 	cmn	w0, #1
-	beq	.L2050
+	beq	.L2074
 	ldrb	w4, [x23, 9]
 	mov	w1, w19
-	ldr	x3, [x21, #:lo12:.LANCHOR153]
+	ldr	x3, [x21, #:lo12:.LANCHOR158]
 	mov	w0, w20
-	ldr	x2, [x22, #:lo12:.LANCHOR151]
+	ldr	x2, [x22, #:lo12:.LANCHOR156]
 	bl	flash_read_page
 	cmn	w0, #1
-	beq	.L2050
-	ldr	x0, [x22, #:lo12:.LANCHOR151]
+	beq	.L2074
+	ldr	x0, [x22, #:lo12:.LANCHOR156]
 	ldr	w1, [x0]
 	mov	w0, 42405
 	movk	w0, 0xa5a5, lsl 16
 	cmp	w1, w0
-	bne	.L2050
-	ldr	x0, [x21, #:lo12:.LANCHOR153]
+	bne	.L2074
+	ldr	x0, [x21, #:lo12:.LANCHOR158]
 	ldr	w1, [x0]
 	mov	w0, 23130
 	movk	w0, 0x5a5a, lsl 16
 	cmp	w1, w0
 	csetm	w21, ne
-	b	.L2049
+	b	.L2073
 	.size	flash_test_blk, .-flash_test_blk
 	.section	.text.id_block_prog_msb_ff_data,"ax",@progbits
 	.align	2
@@ -12013,50 +12128,50 @@ id_block_prog_msb_ff_data:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	and	w22, w0, 255
-	adrp	x0, .LANCHOR168
+	adrp	x0, .LANCHOR49
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
-	ldrb	w0, [x0, #:lo12:.LANCHOR168]
+	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	str	x25, [sp, 64]
-	cbnz	w0, .L2058
-	adrp	x20, .LANCHOR34
-	add	x20, x20, :lo12:.LANCHOR34
+	cbnz	w0, .L2082
+	adrp	x20, .LANCHOR30
+	add	x20, x20, :lo12:.LANCHOR30
 	ldrb	w0, [x20, 19]
 	sub	w0, w0, #5
 	and	w3, w0, 255
 	cmp	w3, 63
-	bhi	.L2058
+	bhi	.L2082
 	and	w19, w2, 65535
 	mov	x2, 16391
 	movk	x2, 0x4000, lsl 16
 	movk	x2, 0x8000, lsl 48
 	lsr	x0, x2, x3
-	tbz	x0, 0, .L2058
-	adrp	x21, .LANCHOR133
+	tbz	x0, 0, .L2082
+	adrp	x21, .LANCHOR138
 	mov	w23, w1
-	add	x21, x21, :lo12:.LANCHOR133
+	add	x21, x21, :lo12:.LANCHOR138
 	mov	w25, 65535
-	adrp	x24, .LANCHOR151
-.L2060:
+	adrp	x24, .LANCHOR156
+.L2084:
 	ldrh	w0, [x20, 10]
 	cmp	w0, w19
-	bhi	.L2061
-.L2058:
+	bhi	.L2085
+.L2082:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2061:
+.L2085:
 	ldrh	w0, [x21, w19, sxtw 1]
 	cmp	w0, w25
-	bne	.L2058
-	ldr	x0, [x24, #:lo12:.LANCHOR151]
+	bne	.L2082
+	ldr	x0, [x24, #:lo12:.LANCHOR156]
 	mov	w2, 16384
 	mov	w1, 255
 	bl	ftl_memset
-	ldr	x3, [x24, #:lo12:.LANCHOR151]
+	ldr	x3, [x24, #:lo12:.LANCHOR156]
 	add	w1, w19, w23
 	ldrb	w4, [x20, 9]
 	add	w19, w19, 1
@@ -12064,497 +12179,707 @@ id_block_prog_msb_ff_data:
 	mov	w0, w22
 	and	w19, w19, 65535
 	bl	flash_prog_page
-	b	.L2060
+	b	.L2084
 	.size	id_block_prog_msb_ff_data, .-id_block_prog_msb_ff_data
+	.section	.text.flash_dual_page_prog,"ax",@progbits
+	.align	2
+	.global	flash_dual_page_prog
+	.type	flash_dual_page_prog, %function
+flash_dual_page_prog:
+	stp	x29, x30, [sp, -112]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	and	w22, w0, 255
+	adrp	x0, .LANCHOR13
+	stp	x23, x24, [sp, 48]
+	stp	x19, x20, [sp, 16]
+	and	x19, x22, 255
+	ldr	x23, [x0, #:lo12:.LANCHOR13]
+	add	x0, x19, 8
+	stp	x27, x28, [sp, 80]
+	mov	x27, x2
+	stp	x25, x26, [sp, 64]
+	mov	w21, w1
+	add	x0, x23, x0, lsl 8
+	str	x0, [x29, 104]
+	adrp	x0, .LANCHOR14
+	str	x0, [x29, 96]
+	mov	x28, x3
+	mov	x25, x4
+	ldr	w2, [x0, #:lo12:.LANCHOR14]
+	mov	x26, x5
+	and	w20, w1, 2097151
+	ubfx	x24, x21, 24, 2
+	tbz	x2, 4, .L2088
+	adrp	x0, .LC122
+	mov	w3, w6
+	mov	w2, w24
+	add	x0, x0, :lo12:.LC122
+	bl	printf
+.L2088:
+	bl	nandc_wait_flash_ready
+	mov	w0, w22
+	bl	nandc_cs
+	mov	w0, w22
+	cbnz	w24, .L2089
+	bl	zftl_flash_enter_slc_mode
+.L2090:
+	add	x19, x23, x19, lsl 8
+	mov	w24, 128
+	and	w0, w21, 255
+	adrp	x22, .LANCHOR30
+	add	x22, x22, :lo12:.LANCHOR30
+	mov	w23, 16
+	str	w24, [x19, 2056]
+	str	wzr, [x19, 2052]
+	str	wzr, [x19, 2052]
+	str	w0, [x19, 2052]
+	lsr	w0, w20, 8
+	str	w0, [x19, 2052]
+	lsr	w0, w20, 16
+	str	w0, [x19, 2052]
+	mov	w0, w20
+	bl	nandc_set_seed
+	ldrb	w1, [x22, 9]
+	mov	x3, x28
+	mov	x2, x27
+	mov	w0, 1
+	bl	nandc_xfer_start
+	bl	nandc_xfer_done
+	str	w23, [x19, 2056]
+	bl	nandc_wait_flash_ready
+	str	w24, [x19, 2056]
+	str	wzr, [x19, 2052]
+	add	w0, w20, 1
+	str	wzr, [x19, 2052]
+	and	w1, w0, 255
+	str	w1, [x19, 2052]
+	lsr	w1, w0, 8
+	str	w1, [x19, 2052]
+	lsr	w1, w0, 16
+	str	w1, [x19, 2052]
+	bl	nandc_set_seed
+	ldrb	w1, [x22, 9]
+	mov	x3, x26
+	mov	x2, x25
+	mov	w0, 1
+	bl	nandc_xfer_start
+	bl	nandc_xfer_done
+	str	w23, [x19, 2056]
+	bl	nandc_wait_flash_ready
+	ldr	x0, [x29, 104]
+	bl	flash_read_status
+	mov	w2, w0
+	bl	nandc_de_cs.constprop.28
+	and	w19, w2, 4
+	tbz	x2, 2, .L2087
+	ldr	x0, [x29, 96]
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2087
+	adrp	x0, .LC123
+	mov	w2, w19
+	mov	w1, w21
+	add	x0, x0, :lo12:.LC123
+	bl	printf
+.L2087:
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L2089:
+	bl	zftl_flash_exit_slc_mode
+	b	.L2090
+	.size	flash_dual_page_prog, .-flash_dual_page_prog
+	.section	.text.fw_flash_page_prog.constprop.25,"ax",@progbits
+	.align	2
+	.type	fw_flash_page_prog.constprop.25, %function
+fw_flash_page_prog.constprop.25:
+	stp	x29, x30, [sp, -64]!
+	adrp	x4, .LANCHOR30
+	add	x4, x4, :lo12:.LANCHOR30
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x20, x1
+	stp	x21, x22, [sp, 32]
+	mov	x21, x2
+	str	x23, [sp, 48]
+	ldrb	w19, [x4, 9]
+	udiv	w19, w0, w19
+	adrp	x0, .LANCHOR43
+	ldrb	w23, [x0, #:lo12:.LANCHOR43]
+	adrp	x0, .LANCHOR17
+	ldrb	w0, [x0, #:lo12:.LANCHOR17]
+	bl	nandc_bch_sel
+	ldrb	w0, [x4, 7]
+	cmp	w0, 9
+	bne	.L2103
+	adrp	x22, .LANCHOR156
+	mov	w2, 16384
+	mov	w1, 255
+	ldr	x0, [x22, #:lo12:.LANCHOR156]
+	bl	ftl_memset
+	ldr	x5, [x22, #:lo12:.LANCHOR156]
+	mov	w6, 4
+	mov	x3, x21
+	mov	x2, x20
+	mov	x4, x5
+	mov	w1, w19
+	mov	w0, 0
+	bl	flash_dual_page_prog
+.L2106:
+	mov	w3, w0
+	mov	w0, w23
+	bl	nandc_bch_sel
+	ldr	x23, [sp, 48]
+	mov	w0, w3
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+.L2103:
+	mov	w4, 4
+	mov	x3, x21
+	mov	x2, x20
+	mov	w1, w19
+	mov	w0, 0
+	bl	flash_prog_page
+	b	.L2106
+	.size	fw_flash_page_prog.constprop.25, .-fw_flash_page_prog.constprop.25
 	.section	.text.idb_write_data,"ax",@progbits
 	.align	2
 	.global	idb_write_data
 	.type	idb_write_data, %function
 idb_write_data:
-	stp	x29, x30, [sp, -256]!
+	stp	x29, x30, [sp, -272]!
 	add	w0, w1, w3
-	mov	w4, w1
 	cmp	w0, 63
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
+	mov	w19, w1
 	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR135
+	stp	x27, x28, [sp, 80]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	stp	x27, x28, [sp, 80]
-	bls	.L2064
+	ldr	x28, [x22, #:lo12:.LANCHOR135]
+	bls	.L2108
 	cmp	w1, 575
-	bhi	.L2065
-	adrp	x0, .LANCHOR169
-	mov	x1, x2
-	mov	w2, 1
-	cmp	w4, 64
-	str	w2, [x0, #:lo12:.LANCHOR169]
-	adrp	x0, idb_buf
-	bhi	.L2066
-	mov	w2, 64
-	sub	w4, w2, w4
-	sub	w2, w3, w4
-	ubfiz	x4, x4, 9, 25
-	lsl	w2, w2, 9
-	add	x1, x1, x4
-	add	x0, x0, :lo12:idb_buf
-.L2142:
-	bl	ftl_memcpy
-.L2121:
+	bhi	.L2109
+	mov	x21, x2
+	mov	w20, w3
+	cbnz	x28, .L2110
+	mov	w0, 262144
+	bl	ftl_malloc
+	str	x0, [x22, #:lo12:.LANCHOR135]
+	cbnz	x0, .L2111
+.L2116:
+	mov	w0, -1
+.L2107:
 	ldp	x19, x20, [sp, 16]
-	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 256
+	ldp	x29, x30, [sp], 272
 	ret
-.L2066:
+.L2111:
+	mov	w2, 262144
+	mov	w1, 0
+	bl	ftl_memset
+.L2110:
+	adrp	x23, .LANCHOR137
+	ldr	x0, [x23, #:lo12:.LANCHOR137]
+	cbz	x0, .L2113
+.L2117:
+	adrp	x1, .LANCHOR136
+	mov	w2, 1
+	ldr	x0, [x22, #:lo12:.LANCHOR135]
+	cmp	w19, 64
+	str	w2, [x1, #:lo12:.LANCHOR136]
+	bhi	.L2213
+	mov	w1, 64
+	sub	w19, w1, w19
+	sub	w2, w20, w19
+	ubfiz	x19, x19, 9, 25
+	lsl	w2, w2, 9
+	add	x1, x21, x19
+.L2219:
+	bl	ftl_memcpy
+.L2218:
+	mov	w0, 0
+	b	.L2107
+.L2113:
+	mov	w0, 262144
+	bl	ftl_malloc
+	str	x0, [x23, #:lo12:.LANCHOR137]
+	cbnz	x0, .L2117
+	b	.L2116
+.L2213:
 	mov	w2, 576
-	sub	w2, w2, w4
-	cmp	w3, w2
-	sub	w4, w4, #64
-	csel	w2, w3, w2, ls
-	ubfiz	x4, x4, 9, 25
-	add	x0, x0, :lo12:idb_buf
+	sub	w2, w2, w19
+	cmp	w20, w2
+	sub	w19, w19, #64
+	csel	w2, w20, w2, ls
+	ubfiz	x19, x19, 9, 25
 	lsl	w2, w2, 9
-	add	x0, x0, x4
-	b	.L2142
-.L2064:
+	mov	x1, x21
+	add	x0, x0, x19
+	b	.L2219
+.L2108:
 	cmp	w1, 575
-	bls	.L2121
-.L2065:
-	adrp	x0, .LANCHOR169
-	ldr	w0, [x0, #:lo12:.LANCHOR169]
-	cbz	w0, .L2121
-	adrp	x0, idb_buf
-	mov	w1, 35899
-	movk	w1, 0xfcdc, lsl 16
-	ldr	w2, [x0, #:lo12:idb_buf]
-	cmp	w2, w1
-	bne	.L2069
-	adrp	x3, .LANCHOR34
-	add	x1, x3, :lo12:.LANCHOR34
-	str	x3, [x29, 176]
-	add	x6, x0, :lo12:idb_buf
-	adrp	x3, idb_buf+262140
-	add	x3, x3, :lo12:idb_buf+262140
-	ldrh	w2, [x1, 10]
-	ldrb	w4, [x1, 12]
-	ldrb	w20, [x1, 9]
-	lsl	w2, w2, 2
-	ldrh	w19, [x1, 26]
-	mov	w1, 0
-	sdiv	w27, w2, w4
-	mov	w2, 512
-	mov	w4, 4097
-	cmp	w27, 512
-	csel	w27, w27, w2, lt
+	bls	.L2218
+.L2109:
+	adrp	x0, .LANCHOR136
+	ldr	w0, [x0, #:lo12:.LANCHOR136]
+	cbz	w0, .L2218
+	adrp	x1, .LANCHOR30
+	add	x0, x1, :lo12:.LANCHOR30
+	str	x1, [x29, 152]
+	adrp	x8, .LANCHOR49
+	ldrb	w20, [x0, 9]
+	ldrh	w19, [x0, 26]
+	adrp	x0, .LANCHOR0
+	mov	x7, x0
+	ldrb	w2, [x0, #:lo12:.LANCHOR0]
+	str	w2, [x29, 160]
+	uxtw	x0, w2
+	cbz	w0, .L2166
+	ldrb	w0, [x8, #:lo12:.LANCHOR49]
+	cmp	w0, 0
+	cset	w0, eq
+	str	w0, [x29, 164]
+.L2119:
+	mov	w0, 0
+	bl	zftl_flash_exit_slc_mode
+	ldrb	w0, [x8, #:lo12:.LANCHOR49]
+	strb	w0, [x7, #:lo12:.LANCHOR0]
+	mov	w0, 35899
+	ldr	w1, [x28]
+	movk	w0, 0xfcdc, lsl 16
+	cmp	w1, w0
+	bne	.L2121
+	ldr	x0, [x29, 152]
 	mov	w2, 65535
-.L2073:
-	ldr	w5, [x3]
-	cbnz	w5, .L2071
-	ldr	w5, [x6, w1, uxtw 2]
-	add	w1, w1, 1
-	str	w5, [x3], -4
-	cmp	w1, w4
+	mov	w3, 4097
+	add	x1, x0, :lo12:.LANCHOR30
+	ldrh	w0, [x1, 10]
+	ldrb	w1, [x1, 12]
+	lsl	w0, w0, 2
+	sdiv	w25, w0, w1
+	mov	w0, 512
+	cmp	w25, 512
+	csel	w25, w25, w0, lt
+	mov	x0, 262140
+	add	x1, x28, x0
+	mov	w0, 0
+.L2125:
+	ldr	w4, [x1]
+	cbnz	w4, .L2123
+	ldr	w4, [x28, w0, uxtw 2]
+	add	w0, w0, 1
+	str	w4, [x1], -4
+	cmp	w0, w3
 	sub	w2, w2, #1
-	csel	w1, w1, wzr, cc
+	csel	w0, w0, wzr, cc
 	cmp	w2, 4096
-	bne	.L2073
-.L2071:
-	add	x0, x0, :lo12:idb_buf
+	bne	.L2125
+.L2123:
+	ldr	w1, [x28, w2, uxtw 2]
 	mul	w19, w19, w20
-	mov	w3, w27
-	ldr	w1, [x0, w2, uxtw 2]
+	mov	w3, w25
 	adrp	x0, .LC124
 	add	x0, x0, :lo12:.LC124
 	bl	printf
-	stp	wzr, wzr, [x29, 168]
+	stp	wzr, wzr, [x29, 192]
 	and	w0, w19, 65535
-	str	w0, [x29, 132]
-	adrp	x0, gp_flash_check_buf
-	add	x0, x0, :lo12:gp_flash_check_buf
-	str	x0, [x29, 184]
-.L2107:
-	adrp	x0, gp_flash_check_buf
-	add	x20, x0, :lo12:gp_flash_check_buf
+	str	w0, [x29, 140]
+	adrp	x0, .LANCHOR45
+	add	x0, x0, :lo12:.LANCHOR45
+	str	x0, [x29, 200]
+.L2162:
+	adrp	x20, .LANCHOR137
 	mov	w1, 0
 	mov	w2, 512
-	mov	x0, x20
+	ldr	x0, [x20, #:lo12:.LANCHOR137]
 	bl	ftl_memset
 	adrp	x0, .LANCHOR26
-	ldr	w1, [x29, 172]
+	ldr	w1, [x29, 196]
 	ldr	x0, [x0, #:lo12:.LANCHOR26]
 	add	x0, x0, x1, uxtw
 	ldrb	w0, [x0, 32]
 	cmp	w0, 255
-	beq	.L2074
-	ldr	w1, [x29, 132]
-	adrp	x19, .LANCHOR45
+	beq	.L2126
+	ldr	w1, [x29, 140]
 	mul	w26, w0, w1
-	ldr	x0, [x29, 176]
-	add	x25, x0, :lo12:.LANCHOR34
-	ldrb	w0, [x19, #:lo12:.LANCHOR45]
-	str	w0, [x29, 128]
-	strb	wzr, [x19, #:lo12:.LANCHOR45]
+	ldr	w0, [x29, 164]
+	cbz	w0, .L2127
 	mov	w0, 0
-	ldrb	w21, [x25, 9]
-	ldrh	w23, [x25, 26]
+	bl	zftl_flash_exit_slc_mode
+	adrp	x0, .LANCHOR0
+	strb	wzr, [x0, #:lo12:.LANCHOR0]
+	adrp	x0, .LANCHOR49
+	strb	wzr, [x0, #:lo12:.LANCHOR49]
+.L2127:
+	ldr	x0, [x29, 152]
+	add	x24, x0, :lo12:.LANCHOR30
+	ldr	x0, [x29, 200]
+	ldrb	w21, [x24, 9]
+	ldrb	w0, [x0]
+	str	w0, [x29, 136]
+	ldr	x0, [x29, 200]
 	udiv	w1, w26, w21
-	mul	w23, w21, w23
-	and	w22, w23, 65535
+	ldrh	w22, [x24, 26]
+	strb	wzr, [x0]
+	mov	w0, 0
 	bl	flash_erase_block
-	udiv	w23, w26, w22
-	msub	w23, w23, w22, w26
-	sub	w24, w26, w23
-	cmp	w26, w24
-	bne	.L2111
+	mul	w22, w21, w22
+	ldrh	w0, [x24, 10]
+	and	w19, w22, 65535
+	ldrb	w1, [x24, 12]
+	lsl	w0, w0, 2
+	udiv	w22, w26, w19
+	sdiv	w0, w0, w1
+	msub	w22, w22, w19, w26
+	str	w0, [x29, 184]
+	sub	w23, w26, w22
+	cmp	w26, w23
+	bne	.L2169
 	adrp	x0, .LANCHOR27
 	ldrb	w0, [x0, #:lo12:.LANCHOR27]
 	cmp	w0, 9
-	bne	.L2111
+	bne	.L2169
+	ldr	x27, [x20, #:lo12:.LANCHOR137]
 	mov	w2, 1024
 	mov	w1, 0
-	mov	x0, x20
+	mov	x0, x27
 	bl	ftl_memset
-	adrp	x1, gp_flash_check_buf
 	mov	w0, 18766
 	movk	w0, 0x464e, lsl 16
-	ldrb	w2, [x25, 12]
-	str	w0, [x1, #:lo12:gp_flash_check_buf]
-	cmp	w21, 8
-	ldrb	w0, [x25, 29]
-	mov	w1, 12
-	strb	w0, [x20, 16]
+	str	w0, [x27]
+	mov	w0, 12
+	str	w0, [x27, 4]
+	adrp	x0, .LANCHOR49
+	strb	wzr, [x27, 16]
+	str	wzr, [x27, 12]
+	ldrb	w0, [x0, #:lo12:.LANCHOR49]
+	cbz	w0, .L2129
+	ldrb	w0, [x24, 29]
+	strb	w0, [x27, 16]
+.L2129:
 	mov	w0, 4
-	strb	w0, [x20, 17]
-	ldrh	w0, [x25, 10]
-	str	w1, [x20, 4]
-	strb	wzr, [x20, 20]
-	str	wzr, [x20, 12]
-	sdiv	w0, w0, w2
-	mov	w2, 16
-	strh	w0, [x20, 18]
+	strb	w0, [x27, 17]
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
+	cmp	w21, 8
+	strb	wzr, [x27, 20]
+	strh	wzr, [x27, 22]
+	ldrh	w1, [x0, 10]
+	ldrb	w0, [x0, 12]
+	sdiv	w0, w1, w0
+	mov	w1, 16
+	strh	w0, [x27, 18]
 	mov	w0, 70
-	csel	w0, w0, w2, hi
-	ldr	x2, [x29, 184]
-	strb	w0, [x2, 21]
-	adrp	x0, gp_flash_check_buf+12
-	strh	wzr, [x2, 22]
-	add	x0, x0, :lo12:gp_flash_check_buf+12
+	csel	w0, w0, w1, hi
+	strb	w0, [x27, 21]
+	mov	w1, 12
+	add	x0, x27, 12
 	bl	js_hash
-	ldr	x1, [x29, 184]
-	mov	x6, x1
-	str	w0, [x1, 8]
-	sub	w0, w27, #4
-	str	w0, [x29, 164]
-.L2075:
-	adrp	x22, idb_buf
-	adrp	x28, .LANCHOR168
-	add	x22, x22, :lo12:idb_buf
-	add	x0, x28, :lo12:.LANCHOR168
-	adrp	x25, .LANCHOR3
-	str	x0, [x29, 152]
-	mov	w20, 0
-	add	x0, x25, :lo12:.LANCHOR3
-	str	x0, [x29, 144]
-.L2077:
-	cmp	w27, w20
-	bhi	.L2088
-	ldr	x0, [x29, 176]
-	add	x25, x19, :lo12:.LANCHOR45
-	strb	wzr, [x19, #:lo12:.LANCHOR45]
+	str	w0, [x27, 8]
+	sub	w0, w25, #4
+	str	w0, [x29, 188]
+.L2128:
+	adrp	x0, .LANCHOR49
+	mov	x24, x28
+	add	x0, x0, :lo12:.LANCHOR49
+	mov	w19, 0
+	str	x0, [x29, 176]
+	adrp	x0, .LANCHOR3
+	add	x0, x0, :lo12:.LANCHOR3
+	str	x0, [x29, 168]
+.L2131:
+	ldr	w0, [x29, 184]
+	cmp	w0, w19
+	bhi	.L2142
+	ldr	x0, [x29, 152]
 	mov	w21, 4
-	add	x0, x0, :lo12:.LANCHOR34
+	ldr	x20, [x20, #:lo12:.LANCHOR137]
 	mov	w22, 0
-	str	wzr, [x29, 144]
+	add	x0, x0, :lo12:.LANCHOR30
+	str	wzr, [x29, 176]
 	ldrb	w1, [x0, 9]
-	ldrh	w28, [x0, 26]
+	ldrh	w27, [x0, 26]
 	uxtw	x0, w1
-	mul	w28, w0, w28
-	and	w28, w28, 65535
-	udiv	w0, w26, w28
-	msub	w28, w0, w28, w26
-	sub	w0, w26, w28
-	stp	w0, w1, [x29, 136]
-	and	w0, w28, 3
-	str	w0, [x29, 152]
-	ldr	w0, [x29, 164]
-	str	w0, [x29, 160]
-	adrp	x0, gp_flash_check_buf
-	add	x20, x0, :lo12:gp_flash_check_buf
+	mul	w27, w0, w27
+	adrp	x0, .LANCHOR45
+	and	w27, w27, 65535
+	strb	wzr, [x0, #:lo12:.LANCHOR45]
+	udiv	w0, w26, w27
+	msub	w27, w0, w27, w26
+	sub	w0, w26, w27
+	stp	w0, w1, [x29, 144]
+	and	w0, w27, 3
+	str	w0, [x29, 184]
+	ldr	w0, [x29, 188]
+	str	w0, [x29, 168]
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
-	str	x0, [x29, 104]
-.L2089:
-	ldr	w0, [x29, 160]
+	str	x0, [x29, 112]
+.L2143:
+	ldr	w0, [x29, 168]
 	cmp	w22, w0
-	bcc	.L2103
-	adrp	x0, .LANCHOR45
-	ldrb	w1, [x29, 128]
-	adrp	x3, idb_buf
-	add	x3, x3, :lo12:idb_buf
-	strb	w1, [x0, #:lo12:.LANCHOR45]
-	mov	x1, 0
-	ldr	w0, [x29, 164]
-	lsl	w0, w0, 7
-.L2104:
-	mov	w19, w1
-	cmp	w1, w0
-	bcc	.L2105
-	ldr	w0, [x29, 168]
+	bcc	.L2157
+	ldr	x0, [x29, 200]
+	ldrb	w1, [x29, 136]
+	strb	w1, [x0]
+	ldr	w0, [x29, 164]
+	cbz	w0, .L2158
+	mov	w0, 0
+	bl	zftl_flash_exit_slc_mode
+	adrp	x0, .LANCHOR0
+	strb	wzr, [x0, #:lo12:.LANCHOR0]
+	adrp	x0, .LANCHOR49
+	strb	wzr, [x0, #:lo12:.LANCHOR49]
+.L2158:
+	ldr	w0, [x29, 188]
+	mov	x2, 0
+	lsl	w1, w0, 7
+	adrp	x0, .LANCHOR137
+	ldr	x0, [x0, #:lo12:.LANCHOR137]
+.L2159:
+	mov	w19, w2
+	cmp	w2, w1
+	bcc	.L2160
+	ldr	w0, [x29, 192]
 	add	w0, w0, 1
-	str	w0, [x29, 168]
+	str	w0, [x29, 192]
 	cmp	w0, 5
-	bls	.L2074
-	b	.L2069
-.L2111:
-	mov	x6, 0
-	str	w27, [x29, 164]
-	b	.L2075
-.L2088:
-	ldr	x2, [x29, 152]
-	add	w5, w23, w20
-	lsr	w5, w5, 2
-	add	x0, x25, :lo12:.LANCHOR3
-	add	w1, w5, 1
+	bls	.L2126
+	b	.L2165
+.L2166:
+	str	wzr, [x29, 164]
+	b	.L2119
+.L2169:
+	mov	x27, 0
+	str	w25, [x29, 188]
+	b	.L2128
+.L2142:
+	ldr	x2, [x29, 176]
+	add	w4, w22, w19
+	lsr	w4, w4, 2
+	adrp	x0, .LANCHOR3
+	add	w1, w4, 1
+	add	x0, x0, :lo12:.LANCHOR3
 	ldrb	w2, [x2]
 	ldrh	w0, [x0, w1, sxtw 1]
-	cbz	w2, .L2079
+	cbz	w2, .L2133
 	adrp	x0, .LANCHOR1
-	ldrb	w3, [x0, #:lo12:.LANCHOR1]
+	ldrb	w5, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w1, 1
-	cmp	w3, 0
+	cmp	w5, 0
 	csel	w0, w0, w1, ne
-.L2079:
+.L2133:
 	adrp	x1, .LANCHOR27
 	ldrb	w1, [x1, #:lo12:.LANCHOR27]
 	cmp	w1, 9
-	bne	.L2081
-.L2140:
-	str	w0, [x29, 192]
+	bne	.L2135
+.L2216:
+	str	w0, [x29, 208]
 	mov	w0, 61424
-	str	w0, [x29, 196]
-	ldr	x0, [x29, 144]
-	ldrh	w0, [x0, w5, sxtw 1]
-	cbnz	w2, .L2083
-	mov	w5, w0
-.L2084:
-	mul	w1, w21, w5
-	adrp	x2, .LANCHOR43
-	adrp	x0, .LANCHOR17
-	cbnz	x6, .L2085
-	ldr	x3, [x29, 176]
-	add	w1, w1, w24
-	ldrb	w7, [x2, #:lo12:.LANCHOR43]
-	add	x3, x3, :lo12:.LANCHOR34
-	ldrb	w0, [x0, #:lo12:.LANCHOR17]
-	str	w5, [x29, 140]
-	str	w7, [x29, 160]
-	ldrb	w6, [x3, 9]
-	udiv	w6, w1, w6
-	bl	nandc_bch_sel
-	mov	w1, w6
-	mov	w4, 4
-	add	x3, x29, 192
-	mov	x2, x22
-	mov	w0, 0
-	bl	flash_prog_page
-	ldr	w7, [x29, 160]
-	mov	w0, w7
-	bl	nandc_bch_sel
-	ldrb	w0, [x28, #:lo12:.LANCHOR168]
-	ldr	w5, [x29, 140]
-	cbnz	w0, .L2086
-	udiv	w1, w24, w21
-	add	w2, w5, 1
+	str	w0, [x29, 212]
+	ldr	x0, [x29, 168]
+	ldrh	w0, [x0, w4, sxtw 1]
+	cbnz	w2, .L2137
+	mov	w4, w0
+.L2138:
+	mul	w0, w21, w4
+	cbnz	x27, .L2139
+	str	w4, [x29, 148]
+	add	x2, x29, 208
+	mov	x1, x24
+	add	w0, w0, w23
+	bl	fw_flash_page_prog.constprop.25
+	adrp	x0, .LANCHOR49
+	ldr	w4, [x29, 148]
+	ldrb	w0, [x0, #:lo12:.LANCHOR49]
+	cbnz	w0, .L2140
+	udiv	w1, w23, w21
+	add	w2, w4, 1
 	bl	id_block_prog_msb_ff_data
-.L2086:
-	add	x22, x22, 2048
-.L2087:
-	add	w20, w20, 4
-	mov	x6, 0
-	and	w20, w20, 65535
-	b	.L2077
-.L2081:
+.L2140:
+	add	x24, x24, 2048
+.L2141:
+	add	w19, w19, 4
+	mov	x27, 0
+	and	w19, w19, 65535
+	b	.L2131
+.L2135:
 	sub	w0, w0, #1
 	lsl	w0, w0, 2
-	b	.L2140
-.L2083:
+	b	.L2216
+.L2137:
 	adrp	x0, .LANCHOR1
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
-	lsl	w0, w5, 1
+	lsl	w0, w4, 1
 	cmp	w1, 0
-	csel	w5, w0, w5, ne
-	b	.L2084
-.L2085:
-	ldr	x3, [x29, 176]
-	add	w1, w1, w24
-	ldrb	w7, [x2, #:lo12:.LANCHOR43]
-	add	x3, x3, :lo12:.LANCHOR34
-	ldrb	w0, [x0, #:lo12:.LANCHOR17]
-	str	w7, [x29, 160]
-	ldrb	w5, [x3, 9]
-	udiv	w5, w1, w5
-	bl	nandc_bch_sel
-	mov	x2, x6
-	mov	w4, 4
-	add	x3, x29, 192
-	mov	w1, w5
-	mov	w0, 0
-	bl	flash_prog_page
-	ldr	w7, [x29, 160]
-	mov	w0, w7
-	bl	nandc_bch_sel
-	b	.L2087
-.L2103:
-	add	w19, w28, w22
-	ldr	w0, [x29, 152]
-	adrp	x1, .LANCHOR168
+	csel	w4, w0, w4, ne
+	b	.L2138
+.L2139:
+	add	x2, x29, 208
+	mov	x1, x27
+	add	w0, w0, w23
+	bl	fw_flash_page_prog.constprop.25
+	b	.L2141
+.L2157:
+	add	w19, w27, w22
+	ldr	w0, [x29, 184]
+	adrp	x1, .LANCHOR49
 	sub	w24, w21, w0
-	ldr	x0, [x29, 104]
+	ldr	x0, [x29, 112]
 	udiv	w19, w19, w21
-	ldrb	w1, [x1, #:lo12:.LANCHOR168]
+	ldrb	w1, [x1, #:lo12:.LANCHOR49]
 	and	w24, w24, 65535
 	and	w19, w19, 65535
 	ldrh	w0, [x0, w19, sxtw 1]
-	cbnz	w1, .L2090
+	cbnz	w1, .L2144
 	mov	w19, w0
-.L2091:
+.L2145:
 	adrp	x0, .LANCHOR17
-	ldr	w1, [x29, 136]
+	ldr	w1, [x29, 144]
 	ldrb	w23, [x0, #:lo12:.LANCHOR17]
-	ldr	w0, [x29, 152]
+	ldr	w0, [x29, 184]
 	add	w0, w0, w1
-	ldr	w1, [x29, 140]
+	ldr	w1, [x29, 148]
 	madd	w19, w1, w19, w0
-	ldr	x0, [x29, 176]
-	add	x0, x0, :lo12:.LANCHOR34
-	ldrb	w0, [x0, 9]
+	adrp	x0, .LANCHOR30+9
+	ldrb	w0, [x0, #:lo12:.LANCHOR30+9]
 	udiv	w19, w19, w0
 	adrp	x0, .LANCHOR43
 	ldrb	w0, [x0, #:lo12:.LANCHOR43]
-	str	w0, [x29, 124]
+	str	w0, [x29, 132]
 	mov	w0, w23
 	bl	nandc_bch_sel
 	adrp	x0, .LANCHOR20
 	add	x0, x0, :lo12:.LANCHOR20
-	str	x0, [x29, 112]
-.L2092:
+	str	x0, [x29, 120]
+.L2146:
 	mov	w4, w21
-	add	x3, x29, 192
+	add	x3, x29, 208
 	mov	x2, x20
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_read_page
 	mov	w5, w0
 	cmn	w0, #1
-	bne	.L2093
-	ldrb	w6, [x25]
-	cbnz	w6, .L2094
-.L2097:
-	adrp	x0, .LANCHOR157
-	ldr	x6, [x0, #:lo12:.LANCHOR157]
-	cbnz	x6, .L2095
-.L2096:
-	ldr	x0, [x29, 112]
+	bne	.L2147
+	ldr	x0, [x29, 200]
+	ldrb	w6, [x0]
+	cbnz	w6, .L2148
+.L2151:
+	adrp	x0, .LANCHOR162
+	ldr	x6, [x0, #:lo12:.LANCHOR162]
+	cbnz	x6, .L2149
+.L2150:
+	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
-	cbz	w0, .L2093
+	cbz	w0, .L2147
 	mov	w4, w21
-	add	x3, x29, 192
+	add	x3, x29, 208
 	mov	x2, x20
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_ddr_tuning_read
-	b	.L2141
-.L2090:
+	b	.L2217
+.L2144:
 	adrp	x0, .LANCHOR1
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w19, 1
 	cmp	w1, 0
 	csel	w19, w0, w19, ne
-	b	.L2091
-.L2094:
-	str	w6, [x29, 100]
+	b	.L2145
+.L2148:
+	ldr	x0, [x29, 200]
+	mov	w1, w19
+	str	w6, [x29, 108]
 	mov	w4, w21
-	str	w5, [x29, 120]
-	add	x3, x29, 192
-	strb	wzr, [x25]
+	str	w5, [x29, 128]
+	add	x3, x29, 208
 	mov	x2, x20
-	mov	w1, w19
+	strb	wzr, [x0]
 	mov	w0, 0
 	bl	flash_read_page
 	cmn	w0, #1
-	ldr	w6, [x29, 100]
-	strb	w6, [x25]
-	ldr	w5, [x29, 120]
-	beq	.L2097
-.L2141:
+	ldr	x1, [x29, 200]
+	ldr	w6, [x29, 108]
+	ldr	w5, [x29, 128]
+	strb	w6, [x1]
+	beq	.L2151
+.L2217:
 	mov	w5, w0
-.L2093:
+.L2147:
 	cmn	w5, #1
 	cset	w3, eq
 	cmp	w23, 16
 	cset	w0, ne
 	tst	w3, w0
-	beq	.L2099
+	beq	.L2153
 	mov	w0, 16
 	mov	w23, 16
 	bl	nandc_bch_sel
-	b	.L2092
-.L2095:
-	str	w5, [x29, 120]
+	b	.L2146
+.L2149:
+	str	w5, [x29, 128]
 	mov	w4, w21
-	add	x3, x29, 192
+	add	x3, x29, 208
 	mov	x2, x20
 	mov	w1, w19
 	mov	w0, 0
 	blr	x6
 	cmn	w0, #1
-	ldr	w5, [x29, 120]
-	beq	.L2096
-	b	.L2141
-.L2099:
-	ldr	w0, [x29, 124]
+	ldr	w5, [x29, 128]
+	beq	.L2150
+	b	.L2217
+.L2153:
+	ldr	w0, [x29, 132]
 	bl	nandc_bch_sel
 	cmp	w3, 0
-	ldr	w0, [x29, 144]
+	ldr	w0, [x29, 176]
 	csinv	w0, w0, wzr, eq
-	str	w0, [x29, 144]
-	ldr	w0, [x29, 136]
+	str	w0, [x29, 176]
+	ldr	w0, [x29, 144]
 	cmp	w22, 0
 	ccmp	w26, w0, 0, eq
-	bne	.L2101
-	ldr	w0, [x29, 144]
-	cbnz	w0, .L2101
+	bne	.L2155
+	ldr	w0, [x29, 176]
+	cbnz	w0, .L2155
 	ldr	w1, [x20]
 	mov	w0, 18766
 	movk	w0, 0x464e, lsl 16
 	cmp	w1, w0
-	bne	.L2101
-	ldr	w0, [x29, 160]
+	bne	.L2155
+	ldr	w0, [x29, 168]
 	ldrb	w21, [x20, 17]
 	add	w0, w0, w24
-	str	w0, [x29, 160]
-.L2102:
+	str	w0, [x29, 168]
+.L2156:
 	add	w22, w24, w22
 	and	w22, w22, 65535
-	b	.L2089
-.L2101:
+	b	.L2143
+.L2155:
 	ubfiz	x0, x24, 9, 16
-	str	wzr, [x29, 152]
+	str	wzr, [x29, 184]
 	add	x20, x20, x0
-	b	.L2102
-.L2105:
-	ldr	x4, [x29, 184]
-	lsl	x2, x1, 2
-	add	x1, x1, 1
-	ldr	w4, [x2, x4]
-	ldr	w2, [x3, x2]
-	cmp	w4, w2
-	beq	.L2104
-	ldr	x0, [x29, 184]
+	b	.L2156
+.L2160:
+	ldr	w4, [x0, x2, lsl 2]
+	add	x2, x2, 1
+	add	x3, x28, x2, lsl 2
+	ldr	w3, [x3, -4]
+	cmp	w4, w3
+	beq	.L2159
 	mov	w2, 512
 	mov	w1, 0
 	bl	ftl_memset
@@ -12565,22 +12890,42 @@ idb_write_data:
 	mov	w1, w26
 	mov	w0, 0
 	bl	flash_erase_block
-.L2074:
-	ldr	w0, [x29, 172]
+.L2126:
+	ldr	w0, [x29, 196]
 	add	w0, w0, 1
-	str	w0, [x29, 172]
+	str	w0, [x29, 196]
 	cmp	w0, 4
-	bne	.L2107
-	ldr	w0, [x29, 168]
-	cbnz	w0, .L2069
+	bne	.L2162
+.L2165:
+	ldrb	w1, [x29, 160]
+	adrp	x0, .LANCHOR0
+	strb	w1, [x0, #:lo12:.LANCHOR0]
+	mov	w1, 2
+	adrp	x0, .LANCHOR31
+	strb	w1, [x0, #:lo12:.LANCHOR31]
+	mov	w0, 0
+	bl	zftl_flash_enter_slc_mode
+	ldr	w0, [x29, 192]
+	cbnz	w0, .L2121
 	adrp	x0, .LC126
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC126
 	bl	printf
-.L2069:
-	adrp	x0, .LANCHOR169
-	str	wzr, [x0, #:lo12:.LANCHOR169]
-	b	.L2121
+.L2121:
+	adrp	x0, .LANCHOR136
+	adrp	x19, .LANCHOR135
+	str	wzr, [x0, #:lo12:.LANCHOR136]
+	ldr	x0, [x19, #:lo12:.LANCHOR135]
+	cbz	x0, .L2164
+	bl	free
+	str	xzr, [x19, #:lo12:.LANCHOR135]
+.L2164:
+	adrp	x19, .LANCHOR137
+	ldr	x0, [x19, #:lo12:.LANCHOR137]
+	cbz	x0, .L2218
+	bl	free
+	str	xzr, [x19, #:lo12:.LANCHOR137]
+	b	.L2218
 	.size	idb_write_data, .-idb_write_data
 	.section	.text.flash_start_tlc_page_prog,"ax",@progbits
 	.align	2
@@ -12603,14 +12948,14 @@ flash_start_tlc_page_prog:
 	mov	x23, x5
 	mov	x24, x6
 	cmp	w0, w19
-	bhi	.L2144
+	bhi	.L2221
 	adrp	x1, .LANCHOR170
 	adrp	x0, .LC0
-	mov	w2, 655
+	mov	w2, 726
 	add	x1, x1, :lo12:.LANCHOR170
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2144:
+.L2221:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w4, [x0, w19, sxtw]
@@ -12618,12 +12963,12 @@ flash_start_tlc_page_prog:
 	ldr	x19, [x0, #:lo12:.LANCHOR13]
 	mov	w0, w4
 	bl	nandc_cs
-	cbz	w25, .L2145
+	cbz	w25, .L2222
 	sxtw	x0, w4
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 8
 	str	w25, [x0, 8]
-.L2145:
+.L2222:
 	ubfiz	x4, x4, 8, 8
 	mov	w0, 128
 	add	x19, x19, x4
@@ -12641,10 +12986,10 @@ flash_start_tlc_page_prog:
 	sub	w0, w20, #1
 	add	w0, w0, w21
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR34+9
+	adrp	x0, .LANCHOR30+9
 	mov	x3, x24
 	mov	x2, x23
-	ldrb	w1, [x0, #:lo12:.LANCHOR34+9]
+	ldrb	w1, [x0, #:lo12:.LANCHOR30+9]
 	mov	w0, 1
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
@@ -12654,7 +12999,7 @@ flash_start_tlc_page_prog:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 80
-	b	nandc_de_cs.constprop.29
+	b	nandc_de_cs.constprop.28
 	.size	flash_start_tlc_page_prog, .-flash_start_tlc_page_prog
 	.section	.text.queue_tlc_prog_cmd,"ax",@progbits
 	.align	2
@@ -12705,8 +13050,8 @@ queue_tlc_prog_cmd:
 	strb	w0, [x1, 59]
 	mov	w0, -1
 	strb	w0, [x1]
-	adrp	x0, .LANCHOR53
-	add	x0, x0, :lo12:.LANCHOR53
+	adrp	x0, .LANCHOR54
+	add	x0, x0, :lo12:.LANCHOR54
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -12723,21 +13068,21 @@ sblk_tlc_prog_one_page:
 	mov	x19, x0
 	ldr	x0, [x0]
 	ldr	w20, [x0, 40]
-.L2153:
+.L2230:
 	mov	w1, 1
 	mov	w0, w20
 	bl	queue_lun_state
-	cbnz	w0, .L2154
+	cbnz	w0, .L2231
 	mov	x0, x19
 	bl	queue_tlc_prog_cmd
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2154:
+.L2231:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2153
+	b	.L2230
 	.size	sblk_tlc_prog_one_page, .-sblk_tlc_prog_one_page
 	.section	.text.sblk_xlc_prog_pages,"ax",@progbits
 	.align	2
@@ -12754,13 +13099,13 @@ sblk_xlc_prog_pages:
 	stp	x23, x24, [sp, 48]
 	mov	w24, w2
 	ldr	w20, [x0, 40]
-.L2157:
+.L2234:
 	mov	w1, 1
 	mov	w0, w20
 	bl	queue_lun_state
-	cbnz	w0, .L2158
+	cbnz	w0, .L2235
 	cmp	w24, 2
-	bne	.L2159
+	bne	.L2236
 	ldr	x0, [x19]
 	mov	w2, 17
 	ldr	x1, [x22]
@@ -12837,83 +13182,113 @@ sblk_xlc_prog_pages:
 	strb	w0, [x1, 59]
 	mov	w0, -1
 	strb	w0, [x1]
-	adrp	x0, .LANCHOR53
-	add	x0, x0, :lo12:.LANCHOR53
+	adrp	x0, .LANCHOR54
+	add	x0, x0, :lo12:.LANCHOR54
 	bl	buf_add_tail
-.L2160:
+.L2237:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2158:
+.L2235:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2157
-.L2159:
+	b	.L2234
+.L2236:
 	mov	x0, x19
 	bl	queue_tlc_prog_cmd
-	b	.L2160
+	b	.L2237
 	.size	sblk_xlc_prog_pages, .-sblk_xlc_prog_pages
-	.section	.text.flash_start_page_prog,"ax",@progbits
+	.section	.text.sblk_3d_tlc_dump_prog,"ax",@progbits
 	.align	2
-	.global	flash_start_page_prog
-	.type	flash_start_page_prog, %function
-flash_start_page_prog:
-	stp	x29, x30, [sp, -96]!
+	.global	sblk_3d_tlc_dump_prog
+	.type	sblk_3d_tlc_dump_prog, %function
+sblk_3d_tlc_dump_prog:
+	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR18
-	stp	x25, x26, [sp, 64]
-	and	w24, w0, 255
 	stp	x19, x20, [sp, 16]
-	mov	x25, x2
+	mov	x19, x0
+	adrp	x0, .LC127
+	add	x0, x0, :lo12:.LC127
+	ldr	w3, [x19, 40]
+	str	x21, [sp, 32]
+	and	w20, w3, 2097151
+	mov	w2, w3
+	ubfx	x21, x3, 21, 3
+	mov	w1, w20
+	bl	printf
+	ldr	x5, [x19, 8]
+	mov	w4, w20
+	ldr	x6, [x19, 24]
+	mov	w3, w21
+	mov	w2, 26
+	mov	w1, 1
+	mov	w0, 0
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x5, [x19, 8]
+	mov	w4, w20
+	ldr	x6, [x19, 24]
+	mov	w3, w21
+	mov	w2, 26
+	mov	w1, 2
+	mov	w0, 0
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x5, [x19, 8]
+	mov	w4, w20
+	ldr	x6, [x19, 24]
+	mov	w3, w21
+	mov	w2, 16
+	mov	w1, 3
+	mov	w0, 0
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x21, [sp, 32]
+	ldr	w0, [x19, 40]
+	mov	w1, 64
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	b	flash_wait_device_ready
+	.size	sblk_3d_tlc_dump_prog, .-sblk_3d_tlc_dump_prog
+	.section	.text.flash_start_3d_mlc_page_prog,"ax",@progbits
+	.align	2
+	.global	flash_start_3d_mlc_page_prog
+	.type	flash_start_3d_mlc_page_prog, %function
+flash_start_3d_mlc_page_prog:
+	stp	x29, x30, [sp, -64]!
+	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	mov	x26, x3
-	ldrb	w0, [x23, #:lo12:.LANCHOR18]
-	and	w20, w1, 2097151
-	str	x27, [sp, 80]
-	ubfx	x27, x1, 21, 3
-	ubfx	x22, x1, 24, 2
-	cmp	w0, w27
-	bhi	.L2163
+	and	w21, w0, 255
+	adrp	x0, .LANCHOR18
+	stp	x19, x20, [sp, 16]
+	str	x23, [sp, 48]
+	and	w19, w1, 255
+	ldrb	w0, [x0, #:lo12:.LANCHOR18]
+	mov	w20, w2
+	mov	x22, x3
+	mov	x23, x4
+	cmp	w0, w19
+	bhi	.L2242
 	adrp	x1, .LANCHOR171
 	adrp	x0, .LC0
-	mov	w2, 706
+	mov	w2, 756
 	add	x1, x1, :lo12:.LANCHOR171
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2163:
+.L2242:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
-	ldrb	w21, [x0, w27, sxtw]
+	ldrb	w4, [x0, w19, sxtw]
 	adrp	x0, .LANCHOR13
 	ldr	x19, [x0, #:lo12:.LANCHOR13]
-	bl	nandc_rdy_status
-	cbnz	w0, .L2164
-	ldrb	w0, [x23, #:lo12:.LANCHOR18]
-	cmp	w0, 1
-	bne	.L2165
-	bl	nandc_wait_flash_ready
-.L2164:
-	mov	w0, w21
-	bl	hynix_reconfig_rr_para
-	mov	w0, w21
+	mov	w0, w4
 	bl	nandc_cs
-	cbnz	w22, .L2166
-	mov	w0, w20
-	bl	slc_phy_page_address_calc
-	mov	w20, w0
-	adrp	x0, .LANCHOR0
-	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L2167
-	mov	w0, w21
-	bl	zftl_flash_enter_slc_mode
-.L2167:
-	ubfiz	x21, x21, 8, 8
+	ubfiz	x4, x4, 8, 8
+	add	x19, x19, x4
 	mov	w0, 128
-	add	x19, x19, x21
 	str	w0, [x19, 2056]
 	and	w0, w20, 255
 	str	wzr, [x19, 2052]
@@ -12925,37 +13300,225 @@ flash_start_page_prog:
 	str	w0, [x19, 2052]
 	mov	w0, w20
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR34+9
-	mov	x3, x26
-	mov	x2, x25
-	ldrb	w1, [x0, #:lo12:.LANCHOR34+9]
+	adrp	x0, .LANCHOR30+9
+	mov	x3, x23
+	mov	x2, x22
+	ldrb	w1, [x0, #:lo12:.LANCHOR30+9]
 	mov	w0, 1
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
-	ldr	x27, [sp, 80]
-	ldp	x21, x22, [sp, 32]
-	ldp	x25, x26, [sp, 64]
-	str	w24, [x19, 2056]
+	ldr	x23, [sp, 48]
+	str	w21, [x19, 2056]
 	ldp	x19, x20, [sp, 16]
-	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 96
-	b	nandc_de_cs.constprop.29
-.L2165:
-	mov	w2, 64
-	mov	w1, w20
-	mov	w0, w27
-	bl	flash_wait_device_ready_raw
-	b	.L2164
-.L2166:
-	mov	w0, w21
-	bl	zftl_flash_exit_slc_mode
-	b	.L2167
-	.size	flash_start_page_prog, .-flash_start_page_prog
-	.section	.text.queue_prog_cmd,"ax",@progbits
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+	.size	flash_start_3d_mlc_page_prog, .-flash_start_3d_mlc_page_prog
+	.section	.text.sblk_3d_mlc_prog_pages,"ax",@progbits
 	.align	2
-	.type	queue_prog_cmd, %function
-queue_prog_cmd:
-	stp	x29, x30, [sp, -32]!
+	.global	sblk_3d_mlc_prog_pages
+	.type	sblk_3d_mlc_prog_pages, %function
+sblk_3d_mlc_prog_pages:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x20, x0
+	ldr	x0, [x0]
+	ldr	w19, [x0, 40]
+	str	x21, [sp, 32]
+.L2245:
+	mov	w1, 1
+	mov	w0, w19
+	bl	queue_lun_state
+	cbnz	w0, .L2246
+	ldr	x0, [x20]
+	ldr	w19, [x0, 40]
+	and	w21, w19, 2097151
+	ubfx	x19, x19, 21, 3
+	mov	w0, w19
+	bl	zftl_flash_exit_slc_mode
+	ldr	x0, [x20]
+	mov	w2, w21
+	mov	w1, w19
+	ldr	x3, [x0, 8]
+	ldr	x4, [x0, 24]
+	mov	w0, 16
+	bl	flash_start_3d_mlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x0, [x20, 8]
+	add	w2, w21, 1
+	mov	w1, w19
+	ldr	x3, [x0, 8]
+	ldr	x4, [x0, 24]
+	mov	w0, 16
+	bl	flash_start_3d_mlc_page_prog
+	bl	nandc_de_cs.constprop.28
+	ldr	x1, [x20]
+	mov	w0, 4
+	strb	w0, [x1, 58]
+	mov	w0, 1
+	strb	w0, [x1, 59]
+	mov	w0, -1
+	strb	w0, [x1]
+	adrp	x0, .LANCHOR54
+	add	x0, x0, :lo12:.LANCHOR54
+	bl	buf_add_tail
+	ldr	x21, [sp, 32]
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+.L2246:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L2245
+	.size	sblk_3d_mlc_prog_pages, .-sblk_3d_mlc_prog_pages
+	.section	.text.sblk_mlc_dump_prog,"ax",@progbits
+	.align	2
+	.global	sblk_mlc_dump_prog
+	.type	sblk_mlc_dump_prog, %function
+sblk_mlc_dump_prog:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	ldr	w20, [x0, 40]
+	str	x21, [sp, 32]
+	and	w21, w20, 2097151
+	ubfx	x20, x20, 21, 3
+	mov	w0, w20
+	bl	zftl_flash_exit_slc_mode
+	ldr	w2, [x19, 40]
+	mov	w1, w21
+	adrp	x0, .LC128
+	add	x0, x0, :lo12:.LC128
+	add	w3, w2, 1
+	bl	printf
+	ldr	x3, [x19, 8]
+	mov	w2, w21
+	ldr	x4, [x19, 24]
+	mov	w1, w20
+	mov	w0, 16
+	bl	flash_start_3d_mlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x3, [x19, 8]
+	add	w2, w21, 1
+	ldr	x4, [x19, 24]
+	mov	w1, w20
+	mov	w0, 16
+	bl	flash_start_3d_mlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	w0, [x19, 40]
+	mov	w1, 64
+	bl	flash_wait_device_ready
+	mov	w2, w0
+	bl	nandc_de_cs.constprop.28
+	ldr	x21, [sp, 32]
+	mov	w0, w2
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+	.size	sblk_mlc_dump_prog, .-sblk_mlc_dump_prog
+	.section	.text.flash_start_page_prog,"ax",@progbits
+	.align	2
+	.global	flash_start_page_prog
+	.type	flash_start_page_prog, %function
+flash_start_page_prog:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR18
+	stp	x25, x26, [sp, 64]
+	and	w24, w0, 255
+	stp	x19, x20, [sp, 16]
+	mov	x25, x2
+	stp	x21, x22, [sp, 32]
+	mov	x26, x3
+	ldrb	w0, [x23, #:lo12:.LANCHOR18]
+	and	w20, w1, 2097151
+	str	x27, [sp, 80]
+	ubfx	x27, x1, 21, 3
+	ubfx	x22, x1, 24, 2
+	cmp	w0, w27
+	bhi	.L2251
+	adrp	x1, .LANCHOR172
+	adrp	x0, .LC0
+	mov	w2, 803
+	add	x1, x1, :lo12:.LANCHOR172
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2251:
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
+	ldrb	w21, [x0, w27, sxtw]
+	adrp	x0, .LANCHOR13
+	ldr	x19, [x0, #:lo12:.LANCHOR13]
+	bl	nandc_rdy_status
+	cbnz	w0, .L2252
+	ldrb	w0, [x23, #:lo12:.LANCHOR18]
+	cmp	w0, 1
+	bne	.L2253
+	bl	nandc_wait_flash_ready
+.L2252:
+	mov	w0, w21
+	bl	hynix_reconfig_rr_para
+	mov	w0, w21
+	bl	nandc_cs
+	cbnz	w22, .L2254
+	mov	w0, w20
+	bl	slc_phy_page_address_calc
+	mov	w20, w0
+	adrp	x0, .LANCHOR0
+	ldrb	w0, [x0, #:lo12:.LANCHOR0]
+	cbz	w0, .L2255
+	mov	w0, w21
+	bl	zftl_flash_enter_slc_mode
+.L2255:
+	ubfiz	x21, x21, 8, 8
+	mov	w0, 128
+	add	x19, x19, x21
+	str	w0, [x19, 2056]
+	and	w0, w20, 255
+	str	wzr, [x19, 2052]
+	str	wzr, [x19, 2052]
+	str	w0, [x19, 2052]
+	lsr	w0, w20, 8
+	str	w0, [x19, 2052]
+	lsr	w0, w20, 16
+	str	w0, [x19, 2052]
+	mov	w0, w20
+	bl	nandc_set_seed
+	adrp	x0, .LANCHOR30+9
+	mov	x3, x26
+	mov	x2, x25
+	ldrb	w1, [x0, #:lo12:.LANCHOR30+9]
+	mov	w0, 1
+	bl	nandc_xfer_start
+	bl	nandc_xfer_done
+	ldr	x27, [sp, 80]
+	ldp	x21, x22, [sp, 32]
+	ldp	x25, x26, [sp, 64]
+	str	w24, [x19, 2056]
+	ldp	x19, x20, [sp, 16]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 96
+	b	nandc_de_cs.constprop.28
+.L2253:
+	mov	w2, 64
+	mov	w1, w20
+	mov	w0, w27
+	bl	flash_wait_device_ready_raw
+	b	.L2252
+.L2254:
+	mov	w0, w21
+	bl	zftl_flash_exit_slc_mode
+	b	.L2255
+	.size	flash_start_page_prog, .-flash_start_page_prog
+	.section	.text.queue_prog_cmd,"ax",@progbits
+	.align	2
+	.type	queue_prog_cmd, %function
+queue_prog_cmd:
+	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	ldr	w1, [x0, 40]
 	ldr	x3, [x0, 24]
@@ -12964,27 +13527,27 @@ queue_prog_cmd:
 	mov	x19, x0
 	mov	w0, 16
 	bl	flash_start_page_prog
-	adrp	x0, .LANCHOR53
+	adrp	x0, .LANCHOR54
 	ldr	w3, [x19, 40]
-	ldrb	w1, [x0, #:lo12:.LANCHOR53]
+	ldrb	w1, [x0, #:lo12:.LANCHOR54]
 	cmp	w1, 255
-	beq	.L2173
-	adrp	x2, .LANCHOR49
-	add	x2, x2, :lo12:.LANCHOR49
+	beq	.L2261
+	adrp	x2, .LANCHOR50
+	add	x2, x2, :lo12:.LANCHOR50
 	ubfx	x3, x3, 21, 3
 	mov	x6, x2
-.L2175:
+.L2263:
 	add	x4, x2, x1, lsl 6
 	ldr	w5, [x4, 40]
 	ubfx	x5, x5, 21, 3
 	cmp	w3, w5
-	bne	.L2174
+	bne	.L2262
 	ldrb	w5, [x4, 58]
-	cmp	w5, 6
-	bne	.L2174
+	cmp	w5, 7
+	bne	.L2262
 	mov	w1, 3
 	strb	w1, [x4, 58]
-.L2173:
+.L2261:
 	mov	w1, 3
 	strb	w1, [x19, 58]
 	mov	w1, 1
@@ -12992,16 +13555,16 @@ queue_prog_cmd:
 	mov	w1, -1
 	strb	w1, [x19]
 	mov	x1, x19
-	add	x0, x0, :lo12:.LANCHOR53
+	add	x0, x0, :lo12:.LANCHOR54
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	buf_add_tail
-.L2174:
+.L2262:
 	lsl	x1, x1, 6
 	ldrb	w1, [x6, x1]
 	cmp	w1, 255
-	bne	.L2175
-	b	.L2173
+	bne	.L2263
+	b	.L2261
 	.size	queue_prog_cmd, .-queue_prog_cmd
 	.section	.text.sblk_prog_page,"ax",@progbits
 	.align	2
@@ -13018,25 +13581,25 @@ sblk_prog_page:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	cbz	w0, .L2182
+	cbz	w0, .L2270
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2182
+	tbz	x0, 8, .L2270
 	ldr	w1, [x19, 40]
-	adrp	x0, .LC127
+	adrp	x0, .LC129
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC127
+	add	x0, x0, :lo12:.LC129
 	bl	printf
-.L2182:
+.L2270:
 	adrp	x25, .LANCHOR38
-	adrp	x23, .LANCHOR49
+	adrp	x23, .LANCHOR50
 	add	x25, x25, :lo12:.LANCHOR38
-	add	x23, x23, :lo12:.LANCHOR49
+	add	x23, x23, :lo12:.LANCHOR50
 	mov	w21, 0
 	mov	w24, 1
-.L2183:
-	cbnz	w20, .L2194
-.L2207:
+.L2271:
+	cbnz	w20, .L2282
+.L2295:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -13045,53 +13608,53 @@ sblk_prog_page:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2194:
+.L2282:
 	ldrb	w26, [x19]
 	ldr	w22, [x19, 40]
-.L2184:
+.L2272:
 	mov	w1, 1
 	mov	w0, w22
 	bl	queue_lun_state
-	cbnz	w0, .L2185
+	cbnz	w0, .L2273
 	cmp	w20, 1
-	beq	.L2186
+	beq	.L2274
 	ldrb	w0, [x25]
-	cbnz	w0, .L2187
-.L2186:
+	cbnz	w0, .L2275
+.L2274:
 	mov	x0, x19
 	bl	queue_prog_cmd
-.L2188:
+.L2276:
 	subs	w20, w20, #1
-	beq	.L2207
+	beq	.L2295
 	ubfiz	x19, x26, 6, 8
 	add	x19, x23, x19
-	b	.L2183
-.L2185:
+	b	.L2271
+.L2273:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2184
-.L2187:
+	b	.L2272
+.L2275:
 	ldrb	w0, [x19]
 	ubfx	x27, x22, 21, 3
 	cmp	w0, 255
-	bne	.L2189
-	adrp	x1, .LANCHOR172
+	bne	.L2277
+	adrp	x1, .LANCHOR173
 	adrp	x0, .LC0
-	mov	w2, 546
-	add	x1, x1, :lo12:.LANCHOR172
+	mov	w2, 574
+	add	x1, x1, :lo12:.LANCHOR173
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2189:
+.L2277:
 	ldrb	w0, [x19]
 	add	x0, x23, x0, lsl 6
 	ldr	w5, [x0, 40]
 	ubfx	x0, x5, 21, 3
 	cmp	w27, w0
-	bne	.L2190
-	adrp	x0, .LANCHOR99
-	ldrh	w2, [x0, #:lo12:.LANCHOR99]
-	adrp	x0, .LANCHOR98
-	ldrb	w3, [x0, #:lo12:.LANCHOR98]
+	bne	.L2278
+	adrp	x0, .LANCHOR102
+	ldrh	w2, [x0, #:lo12:.LANCHOR102]
+	adrp	x0, .LANCHOR101
+	ldrb	w3, [x0, #:lo12:.LANCHOR101]
 	mov	w0, 21
 	sub	w0, w0, w2
 	lsl	w1, w24, w2
@@ -13110,9 +13673,9 @@ sblk_prog_page:
 	cmp	w4, w0
 	and	w1, w1, w5
 	ccmp	w22, w1, 0, ne
-	bne	.L2190
+	bne	.L2278
 	cmp	w21, w3
-	beq	.L2190
+	beq	.L2278
 	ldr	w1, [x19, 40]
 	mov	w0, 17
 	ldr	x2, [x19, 8]
@@ -13120,20 +13683,20 @@ sblk_prog_page:
 	ldr	x3, [x19, 24]
 	bl	flash_start_page_prog
 	strb	w24, [x19, 59]
-	mov	w0, 8
+	mov	w0, 9
 	strb	w0, [x19, 58]
 	mov	w0, -1
 	strb	w0, [x19]
 	mov	x1, x19
-	adrp	x0, .LANCHOR53
-	add	x0, x0, :lo12:.LANCHOR53
+	adrp	x0, .LANCHOR54
+	add	x0, x0, :lo12:.LANCHOR54
 	bl	buf_add_tail
-	b	.L2188
-.L2190:
+	b	.L2276
+.L2278:
 	mov	x0, x19
 	mov	w21, 0
 	bl	queue_prog_cmd
-	b	.L2188
+	b	.L2276
 	.size	sblk_prog_page, .-sblk_prog_page
 	.section	.text.ftl_flush,"ax",@progbits
 	.align	2
@@ -13141,22 +13704,22 @@ sblk_prog_page:
 	.type	ftl_flush, %function
 ftl_flush:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR119
+	adrp	x0, .LANCHOR121
 	add	x29, sp, 0
-	ldrb	w1, [x0, #:lo12:.LANCHOR119]
+	ldrb	w1, [x0, #:lo12:.LANCHOR121]
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	adrp	x20, .LANCHOR173
-	cbz	w1, .L2210
-	ldrb	w2, [x20, #:lo12:.LANCHOR173]
-	adrp	x0, .LANCHOR49
-	add	x0, x0, :lo12:.LANCHOR49
+	adrp	x20, .LANCHOR174
+	cbz	w1, .L2298
+	ldrb	w2, [x20, #:lo12:.LANCHOR174]
+	adrp	x0, .LANCHOR50
+	add	x0, x0, :lo12:.LANCHOR50
 	add	x0, x0, x2, lsl 6
 	bl	sblk_prog_page
-.L2210:
+.L2298:
 	mov	w0, -1
-	strb	wzr, [x19, #:lo12:.LANCHOR119]
-	strb	w0, [x20, #:lo12:.LANCHOR173]
+	strb	wzr, [x19, #:lo12:.LANCHOR121]
+	strb	w0, [x20, #:lo12:.LANCHOR174]
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	ldp	x19, x20, [sp, 16]
@@ -13169,146 +13732,167 @@ ftl_flush:
 	.global	flash_prog_page_en
 	.type	flash_prog_page_en, %function
 flash_prog_page_en:
-	stp	x29, x30, [sp, -80]!
+	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	and	w24, w0, 255
-	adrp	x0, .LANCHOR18
+	and	w23, w0, 255
+	and	w0, w5, 255
 	stp	x19, x20, [sp, 16]
+	str	w0, [x29, 124]
+	adrp	x0, .LANCHOR18
 	stp	x21, x22, [sp, 32]
 	mov	w20, w1
-	stp	x25, x26, [sp, 64]
-	mov	x23, x2
+	stp	x27, x28, [sp, 80]
+	mov	x22, x2
 	ldrb	w0, [x0, #:lo12:.LANCHOR18]
-	mov	x22, x3
-	mov	w25, w4
-	and	w21, w5, 255
+	mov	x21, x3
+	stp	x25, x26, [sp, 64]
+	mov	w28, w4
 	ubfx	x19, x20, 24, 2
-	cmp	w0, w24
-	bhi	.L2216
-	adrp	x1, .LANCHOR174
+	cmp	w0, w23
+	bhi	.L2304
+	adrp	x1, .LANCHOR175
 	adrp	x0, .LC0
-	mov	w2, 478
-	add	x1, x1, :lo12:.LANCHOR174
+	mov	w2, 546
+	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2216:
+.L2304:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
-	ldrb	w26, [x0, w24, sxtw]
-	cbnz	w19, .L2226
+	ldrb	w27, [x0, w23, sxtw]
+	cbnz	w19, .L2315
 	adrp	x0, .LANCHOR0
 	ldrb	w1, [x0, #:lo12:.LANCHOR0]
 	adrp	x0, .LANCHOR1
-	cbz	w1, .L2218
+	cbz	w1, .L2306
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
-	cbz	w1, .L2226
-.L2218:
+	cbz	w1, .L2315
+.L2306:
 	adrp	x1, .LANCHOR2
 	ldrb	w0, [x0, #:lo12:.LANCHOR1]
 	ldrh	w1, [x1, #:lo12:.LANCHOR2]
 	udiv	w19, w20, w1
 	mul	w19, w19, w1
 	sub	w1, w20, w19
-	cbz	w0, .L2219
+	cbz	w0, .L2307
 	add	w19, w19, w1, lsl 1
-.L2217:
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 4, .L2220
-	adrp	x0, .LC128
+.L2305:
+	adrp	x24, .LANCHOR14
+	adrp	x25, .LC130
+	add	x24, x24, :lo12:.LANCHOR14
+	add	x25, x25, :lo12:.LC130
+	adrp	x26, .LANCHOR163
+.L2311:
+	ldr	w0, [x24]
+	tbz	x0, 4, .L2308
+	mov	w3, w19
 	mov	w2, w20
-	mov	w1, w26
-	add	x0, x0, :lo12:.LC128
+	mov	w1, w27
+	mov	x0, x25
 	bl	printf
-.L2220:
+.L2308:
+	mov	w4, w28
+	mov	x3, x21
+	mov	x2, x22
 	mov	w1, w19
-	mov	w4, w25
-	mov	x3, x22
-	mov	x2, x23
-	mov	w0, w26
+	mov	w0, w27
 	bl	flash_prog_page
-	mov	w19, w0
-	cbz	w21, .L2221
-	adrp	x26, .LANCHOR161
-	adrp	x21, .LANCHOR162
-	mov	w4, w25
+	mov	w5, w0
+	ldr	w0, [x29, 124]
+	cbz	w0, .L2309
+	adrp	x6, .LANCHOR164
+	ldr	x3, [x26, #:lo12:.LANCHOR163]
+	mov	w4, w28
+	str	x6, [x29, 112]
+	ldr	x2, [x6, #:lo12:.LANCHOR164]
 	mov	w1, w20
-	ldr	x3, [x26, #:lo12:.LANCHOR161]
-	mov	w0, w24
-	ldr	x2, [x21, #:lo12:.LANCHOR162]
+	mov	w0, w23
+	str	w5, [x29, 104]
 	bl	flash_read_page_en
 	cmp	w0, 512
+	ldr	x6, [x29, 112]
+	mov	w4, w0
 	ccmn	w0, #1, 4, ne
-	beq	.L2222
-	ldr	x0, [x21, #:lo12:.LANCHOR162]
-	ldr	w1, [x23]
+	mov	x7, x6
+	beq	.L2310
+	ldr	x0, [x6, #:lo12:.LANCHOR164]
+	ldr	w1, [x22]
+	ldr	w5, [x29, 104]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	bne	.L2222
-	ldr	x0, [x26, #:lo12:.LANCHOR161]
-	ldr	w1, [x22]
+	bne	.L2310
+	ldr	x0, [x26, #:lo12:.LANCHOR163]
+	ldr	w1, [x21]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	beq	.L2221
-.L2222:
+	beq	.L2309
+.L2310:
+	str	w4, [x29, 112]
 	mov	w3, 4
-	mov	x1, x23
+	str	x7, [x29, 104]
 	mov	w2, w3
-	adrp	x0, .LC129
-	add	x0, x0, :lo12:.LC129
-	bl	rknand_print_hex
-	mov	w3, 4
 	mov	x1, x22
-	mov	w2, w3
-	adrp	x0, .LC130
-	add	x0, x0, :lo12:.LC130
-	bl	rknand_print_hex
-	ldr	x1, [x26, #:lo12:.LANCHOR161]
-	mov	w3, 4
 	adrp	x0, .LC131
-	mov	w2, w3
 	add	x0, x0, :lo12:.LC131
 	bl	rknand_print_hex
-	ldr	x1, [x21, #:lo12:.LANCHOR162]
 	mov	w3, 4
-	adrp	x0, .LC132
+	mov	x1, x21
 	mov	w2, w3
+	adrp	x0, .LC132
 	add	x0, x0, :lo12:.LC132
 	bl	rknand_print_hex
-.L2223:
-	mov	w1, w20
+	adrp	x0, .LANCHOR163
+	mov	w3, 4
+	mov	w2, w3
+	ldr	x1, [x0, #:lo12:.LANCHOR163]
 	adrp	x0, .LC133
 	add	x0, x0, :lo12:.LC133
+	bl	rknand_print_hex
+	ldr	x7, [x29, 104]
+	mov	w3, 4
+	adrp	x0, .LC134
+	mov	w2, w3
+	add	x0, x0, :lo12:.LC134
+	ldr	x1, [x7, #:lo12:.LANCHOR164]
+	bl	rknand_print_hex
+	ldr	w4, [x29, 112]
+	cmp	w4, 512
+	beq	.L2311
+.L2313:
+	mov	w1, w20
+	adrp	x0, .LC135
+	add	x0, x0, :lo12:.LC135
 	bl	printf
-	mov	w2, 506
-	adrp	x1, .LANCHOR174
+	mov	w2, 577
+	adrp	x1, .LANCHOR175
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR174
+	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	mov	w0, -1
-	b	.L2224
-.L2219:
-	adrp	x0, .LANCHOR3
-	add	x0, x0, :lo12:.LANCHOR3
-	ldrh	w0, [x0, w1, uxtw 1]
-	add	w19, w0, w19
-	b	.L2217
-.L2226:
-	mov	w19, w20
-	b	.L2217
-.L2221:
-	mov	w0, w19
-	cmn	w19, #1
-	beq	.L2223
-.L2224:
+.L2312:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
 	ret
+.L2307:
+	adrp	x0, .LANCHOR3
+	add	x0, x0, :lo12:.LANCHOR3
+	ldrh	w0, [x0, w1, uxtw 1]
+	add	w19, w0, w19
+	b	.L2305
+.L2315:
+	mov	w19, w20
+	b	.L2305
+.L2309:
+	mov	w0, w5
+	cmn	w5, #1
+	bne	.L2312
+	b	.L2313
 	.size	flash_prog_page_en, .-flash_prog_page_en
 	.section	.text.ftl_test_block,"ax",@progbits
 	.align	2
@@ -13320,113 +13904,113 @@ ftl_test_block:
 	stp	x23, x24, [sp, 48]
 	adrp	x24, ftl_tmp_buffer
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR175
+	adrp	x25, .LANCHOR176
 	stp	x21, x22, [sp, 32]
-	adrp	x26, .LANCHOR106
+	adrp	x26, .LANCHOR108
 	and	w21, w0, 65535
-	add	x0, x26, :lo12:.LANCHOR106
+	add	x0, x26, :lo12:.LANCHOR108
 	stp	x19, x20, [sp, 16]
 	mov	w23, 0
 	stp	x27, x28, [sp, 80]
 	mov	w20, 0
-	adrp	x27, .LANCHOR98
+	adrp	x27, .LANCHOR101
 	str	x0, [x29, 112]
 	str	wzr, [x24, #:lo12:ftl_tmp_buffer]
-	add	x0, x27, :lo12:.LANCHOR98
-	str	wzr, [x25, #:lo12:.LANCHOR175]
+	add	x0, x27, :lo12:.LANCHOR101
+	str	wzr, [x25, #:lo12:.LANCHOR176]
 	str	x0, [x29, 96]
-.L2238:
+.L2332:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
 	cmp	w0, w20
-	bls	.L2248
-	add	x0, x27, :lo12:.LANCHOR98
+	bls	.L2342
+	add	x0, x27, :lo12:.LANCHOR101
 	mov	w22, 0
 	str	x0, [x29, 120]
 	adrp	x0, .LANCHOR14
 	add	x0, x0, :lo12:.LANCHOR14
 	str	x0, [x29, 104]
-	b	.L2249
-.L2247:
+	b	.L2343
+.L2341:
 	ldr	x0, [x29, 104]
 	ldr	w0, [x0]
-	tbz	x0, 12, .L2239
-	adrp	x0, .LC134
+	tbz	x0, 12, .L2333
+	adrp	x0, .LC136
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC134
+	add	x0, x0, :lo12:.LC136
 	bl	printf
-.L2239:
+.L2333:
 	ldr	x0, [x29, 96]
 	ldrb	w19, [x0]
 	madd	w19, w21, w19, w22
 	and	w19, w19, 65535
-	cbnz	w20, .L2240
+	cbnz	w20, .L2334
 	adrp	x0, .LANCHOR26
 	ldr	x0, [x0, #:lo12:.LANCHOR26]
 	ldrb	w0, [x0, 47]
 	cmp	w0, w19
-	bcs	.L2241
-.L2240:
+	bcs	.L2335
+.L2334:
 	and	w28, w20, 255
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_check_bad_block
-	cbnz	w0, .L2241
-	adrp	x0, .LANCHOR105
+	cbnz	w0, .L2335
+	adrp	x0, .LANCHOR107
 	mov	w1, w23
-	ldrh	w7, [x0, #:lo12:.LANCHOR105]
+	ldrh	w7, [x0, #:lo12:.LANCHOR107]
 	mov	w0, w28
 	mul	w26, w7, w19
 	mov	w2, w26
 	bl	flash_erase_block_en
-	cbz	w0, .L2242
-	adrp	x0, .LANCHOR68
-	ldrb	w0, [x0, #:lo12:.LANCHOR68]
+	cbz	w0, .L2336
+	adrp	x0, .LANCHOR69
+	ldrb	w0, [x0, #:lo12:.LANCHOR69]
 	cmp	w0, 2
-	bne	.L2264
+	bne	.L2358
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L2264
+	cbz	w0, .L2358
 	mov	w2, w26
 	mov	w1, 1
 	mov	w0, w28
 	bl	flash_erase_block_en
-	cbnz	w0, .L2264
-.L2246:
-	adrp	x0, .LANCHOR68
+	cbnz	w0, .L2358
+.L2340:
+	adrp	x0, .LANCHOR69
 	mov	w23, 1
-	ldrb	w0, [x0, #:lo12:.LANCHOR68]
+	ldrb	w0, [x0, #:lo12:.LANCHOR69]
 	add	w26, w26, w0, lsl 24
-.L2245:
-	adrp	x0, .LANCHOR121
+.L2339:
+	adrp	x0, .LANCHOR123
 	mov	w5, 1
-	add	x3, x25, :lo12:.LANCHOR175
+	add	x3, x25, :lo12:.LANCHOR176
 	add	x2, x24, :lo12:ftl_tmp_buffer
-	ldrb	w4, [x0, #:lo12:.LANCHOR121]
+	ldrb	w4, [x0, #:lo12:.LANCHOR123]
 	mov	w1, w26
 	mov	w0, w28
 	bl	flash_prog_page_en
-	cbz	w0, .L2241
-.L2264:
+	cbz	w0, .L2335
+.L2358:
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_mask_bad_block
-.L2241:
+.L2335:
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L2249:
+.L2343:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, w22
-	bhi	.L2247
+	bhi	.L2341
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2238
-.L2242:
-	cbz	w23, .L2245
-	b	.L2246
-.L2248:
-	cbz	w23, .L2250
+	b	.L2332
+.L2336:
+	cbz	w23, .L2339
+	b	.L2340
+.L2342:
+	cbz	w23, .L2344
 	adrp	x0, .LANCHOR7
 	mov	w1, 2
 	ldr	x0, [x0, #:lo12:.LANCHOR7]
@@ -13434,7 +14018,7 @@ ftl_test_block:
 	ldrb	w0, [x21, 2]
 	bfi	w0, w1, 3, 2
 	strb	w0, [x21, 2]
-.L2250:
+.L2344:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -13469,18 +14053,18 @@ ftl_prog_page:
 	bl	flash_prog_page_en
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L2265
-	mov	w2, 2150
-	adrp	x1, .LANCHOR176
+	bne	.L2359
+	mov	w2, 2203
+	adrp	x1, .LANCHOR177
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR176
+	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	adrp	x0, .LC133
+	adrp	x0, .LC135
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC133
+	add	x0, x0, :lo12:.LC135
 	bl	printf
-.L2265:
+.L2359:
 	mov	w0, w19
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -13497,68 +14081,68 @@ ftl_info_flush:
 	mov	w1, 0
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR121
+	adrp	x21, .LANCHOR123
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR178
+	adrp	x22, .LANCHOR179
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LANCHOR105
+	adrp	x23, .LANCHOR107
 	stp	x27, x28, [sp, 80]
 	mov	x26, x23
-	ldrb	w2, [x21, #:lo12:.LANCHOR121]
-	add	x25, x22, :lo12:.LANCHOR178
-	add	x28, x23, :lo12:.LANCHOR105
+	ldrb	w2, [x21, #:lo12:.LANCHOR123]
+	add	x25, x22, :lo12:.LANCHOR179
+	add	x28, x23, :lo12:.LANCHOR107
 	mov	w24, 0
 	stp	x19, x20, [sp, 16]
 	mov	w27, w0
-	adrp	x20, .LANCHOR177
+	adrp	x20, .LANCHOR178
 	lsl	w2, w2, 1
-	add	x0, x20, :lo12:.LANCHOR177
+	add	x0, x20, :lo12:.LANCHOR178
 	bl	ftl_memset
-.L2269:
-	add	x0, x22, :lo12:.LANCHOR178
-	ldrb	w6, [x22, #:lo12:.LANCHOR178]
-	ldrh	w19, [x23, #:lo12:.LANCHOR105]
+.L2363:
+	add	x0, x22, :lo12:.LANCHOR179
+	ldrb	w6, [x22, #:lo12:.LANCHOR179]
+	ldrh	w19, [x23, #:lo12:.LANCHOR107]
 	ldrh	w4, [x0, 2]
-	adrp	x0, .LANCHOR97
-	ldr	x0, [x0, #:lo12:.LANCHOR97]
+	adrp	x0, .LANCHOR100
+	ldr	x0, [x0, #:lo12:.LANCHOR100]
 	ldr	w3, [x0, 4]
 	add	w3, w3, 1
 	str	w3, [x0, 4]
-	add	x0, x20, :lo12:.LANCHOR177
-	str	w27, [x20, #:lo12:.LANCHOR177]
+	add	x0, x20, :lo12:.LANCHOR178
+	str	w27, [x20, #:lo12:.LANCHOR178]
 	str	w3, [x0, 4]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2270
+	tbz	x0, 12, .L2364
 	mov	w2, w4
 	mov	w1, w6
 	str	w4, [x29, 96]
-	adrp	x0, .LC135
+	adrp	x0, .LC137
 	str	w6, [x29, 104]
-	add	x0, x0, :lo12:.LC135
+	add	x0, x0, :lo12:.LC137
 	bl	printf
 	ldr	w4, [x29, 96]
 	ldr	w6, [x29, 104]
-.L2270:
-	adrp	x1, .LANCHOR80
+.L2364:
+	adrp	x1, .LANCHOR83
 	ldrh	w0, [x25, 2]
-	ldrh	w1, [x1, #:lo12:.LANCHOR80]
+	ldrh	w1, [x1, #:lo12:.LANCHOR83]
 	cmp	w1, w0
-	bhi	.L2271
-	adrp	x19, .LANCHOR179
+	bhi	.L2365
+	adrp	x19, .LANCHOR180
 	adrp	x3, .LC0
-	add	x19, x19, :lo12:.LANCHOR179
+	add	x19, x19, :lo12:.LANCHOR180
 	add	x3, x3, :lo12:.LC0
-.L2278:
+.L2372:
 	ldrb	w0, [x25, 1]
 	adrp	x4, .LANCHOR26
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x25, 1]
 	cmp	w0, 7
-	bls	.L2272
+	bls	.L2366
 	mov	x0, 0
-.L2277:
+.L2371:
 	ldr	x2, [x4, #:lo12:.LANCHOR26]
 	add	w1, w0, 8
 	and	w24, w0, 65535
@@ -13567,32 +14151,32 @@ ftl_info_flush:
 	add	w1, w2, 127
 	and	w1, w1, 255
 	cmp	w1, 125
-	bhi	.L2273
+	bhi	.L2367
 	mov	x0, x3
 	stp	x4, x3, [x29, 96]
 	mov	w2, 742
 	mov	x1, x19
 	bl	printf
 	ldp	x4, x3, [x29, 96]
-.L2276:
+.L2370:
 	strb	w24, [x25, 1]
 	mov	w24, 1
-.L2272:
+.L2366:
 	ldr	x0, [x4, #:lo12:.LANCHOR26]
 	ldrb	w1, [x25, 1]
 	add	x0, x0, x1
 	ldrb	w0, [x0, 40]
 	strb	w0, [x25]
 	cmp	w0, 255
-	beq	.L2278
+	beq	.L2372
 	ldrh	w19, [x28]
 	mul	w19, w19, w0
 	mov	w0, 0
 	mov	w1, w19
 	bl	flash_erase_block
-	ldrb	w4, [x21, #:lo12:.LANCHOR121]
+	ldrb	w4, [x21, #:lo12:.LANCHOR123]
 	mov	w1, w19
-	add	x3, x20, :lo12:.LANCHOR177
+	add	x3, x20, :lo12:.LANCHOR178
 	adrp	x2, ftl_info_data_buffer
 	mov	w0, 0
 	add	x2, x2, :lo12:ftl_info_data_buffer
@@ -13600,53 +14184,53 @@ ftl_info_flush:
 	bl	ftl_prog_page
 	mov	w0, 1
 	strh	w0, [x25, 2]
-.L2279:
-	ldrb	w4, [x21, #:lo12:.LANCHOR121]
+.L2373:
+	ldrb	w4, [x21, #:lo12:.LANCHOR123]
 	mov	w1, w19
-	add	x3, x20, :lo12:.LANCHOR177
+	add	x3, x20, :lo12:.LANCHOR178
 	adrp	x2, ftl_info_data_buffer
 	mov	w0, 0
 	add	x2, x2, :lo12:ftl_info_data_buffer
 	bl	ftl_prog_page
 	cmn	w0, #1
 	ldrh	w1, [x25, 2]
-	adrp	x0, .LANCHOR180
+	adrp	x0, .LANCHOR181
 	add	w1, w1, 1
 	strh	w1, [x25, 2]
-	beq	.L2280
-	ldrb	w1, [x0, #:lo12:.LANCHOR180]
-	cbz	w1, .L2281
-.L2280:
-	strb	wzr, [x0, #:lo12:.LANCHOR180]
-	b	.L2269
-.L2273:
+	beq	.L2374
+	ldrb	w1, [x0, #:lo12:.LANCHOR181]
+	cbz	w1, .L2375
+.L2374:
+	strb	wzr, [x0, #:lo12:.LANCHOR181]
+	b	.L2363
+.L2367:
 	cmp	w2, 255
-	bne	.L2276
+	bne	.L2370
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L2277
+	bne	.L2371
 	mov	w24, w0
-	b	.L2276
-.L2271:
+	b	.L2370
+.L2365:
 	madd	w19, w19, w6, w4
-	cbnz	w0, .L2279
+	cbnz	w0, .L2373
 	mov	w1, w19
 	bl	flash_erase_block
-	b	.L2279
-.L2281:
-	cbnz	w24, .L2282
-.L2290:
-	adrp	x0, .LANCHOR178
-	ldrb	w0, [x0, #:lo12:.LANCHOR178]
+	b	.L2373
+.L2375:
+	cbnz	w24, .L2376
+.L2384:
+	adrp	x0, .LANCHOR179
+	ldrb	w0, [x0, #:lo12:.LANCHOR179]
 	cmp	w0, 255
-	bne	.L2284
-	adrp	x1, .LANCHOR179
+	bne	.L2378
+	adrp	x1, .LANCHOR180
 	adrp	x0, .LC0
 	mov	w2, 778
-	add	x1, x1, :lo12:.LANCHOR179
+	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2284:
+.L2378:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -13655,17 +14239,17 @@ ftl_info_flush:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2282:
+.L2376:
 	ldrb	w19, [x25, 1]
-	adrp	x20, .LANCHOR179
+	adrp	x20, .LANCHOR180
 	adrp	x21, .LC0
-	add	x20, x20, :lo12:.LANCHOR179
+	add	x20, x20, :lo12:.LANCHOR180
 	add	w19, w19, 1
 	add	x21, x21, :lo12:.LC0
 	adrp	x22, .LANCHOR26
-.L2285:
+.L2379:
 	cmp	w19, 7
-	bhi	.L2290
+	bhi	.L2384
 	ldr	x1, [x22, #:lo12:.LANCHOR26]
 	add	w0, w19, 8
 	add	x0, x1, x0, sxtw
@@ -13673,24 +14257,24 @@ ftl_info_flush:
 	add	w0, w23, 127
 	and	w0, w0, 255
 	cmp	w0, 125
-	bhi	.L2286
+	bhi	.L2380
 	mov	w2, 771
 	mov	x1, x20
 	mov	x0, x21
 	bl	printf
-.L2287:
-	ldrh	w1, [x26, #:lo12:.LANCHOR105]
+.L2381:
+	ldrh	w1, [x26, #:lo12:.LANCHOR107]
 	mov	w0, 0
 	mul	w1, w1, w23
 	bl	flash_erase_block
-	b	.L2288
-.L2286:
+	b	.L2382
+.L2380:
 	cmp	w23, 255
-	bne	.L2287
-.L2288:
+	bne	.L2381
+.L2382:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L2285
+	b	.L2379
 	.size	ftl_info_flush, .-ftl_info_flush
 	.section	.text.ftl_info_blk_init,"ax",@progbits
 	.align	2
@@ -13698,32 +14282,32 @@ ftl_info_flush:
 	.type	ftl_info_blk_init, %function
 ftl_info_blk_init:
 	stp	x29, x30, [sp, -128]!
-	adrp	x0, .LANCHOR181
-	adrp	x1, .LANCHOR180
+	adrp	x0, .LANCHOR182
+	adrp	x1, .LANCHOR181
 	mov	w2, 16384
 	add	x29, sp, 0
-	strb	wzr, [x0, #:lo12:.LANCHOR181]
+	strb	wzr, [x0, #:lo12:.LANCHOR182]
 	mov	w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR180]
-	adrp	x1, .LANCHOR182
+	strb	w0, [x1, #:lo12:.LANCHOR181]
+	adrp	x1, .LANCHOR183
 	stp	x19, x20, [sp, 16]
 	adrp	x20, ftl_info_data_buffer
-	strb	w0, [x1, #:lo12:.LANCHOR182]
+	strb	w0, [x1, #:lo12:.LANCHOR183]
 	adrp	x1, .LANCHOR7
 	add	x0, x20, :lo12:ftl_info_data_buffer
 	stp	x21, x22, [sp, 32]
 	str	x0, [x1, #:lo12:.LANCHOR7]
 	adrp	x1, .LANCHOR6
-	adrp	x22, .LANCHOR97
+	adrp	x22, .LANCHOR100
 	stp	x25, x26, [sp, 64]
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
-	adrp	x21, .LANCHOR178
+	adrp	x21, .LANCHOR179
 	stp	x23, x24, [sp, 48]
 	adrp	x23, .LANCHOR26
 	stp	x27, x28, [sp, 80]
-	adrp	x26, .LANCHOR105
+	adrp	x26, .LANCHOR107
 	add	x1, x0, x1, lsl 2
-	str	x1, [x22, #:lo12:.LANCHOR97]
+	str	x1, [x22, #:lo12:.LANCHOR100]
 	mov	w1, 0
 	bl	ftl_memset
 	mov	w1, 0
@@ -13731,19 +14315,19 @@ ftl_info_blk_init:
 	adrp	x0, ftl_ext_info_data_buffer
 	add	x0, x0, :lo12:ftl_ext_info_data_buffer
 	bl	ftl_memset
-	adrp	x25, .LANCHOR121
+	adrp	x25, .LANCHOR123
 	ldr	x1, [x23, #:lo12:.LANCHOR26]
-	add	x0, x21, :lo12:.LANCHOR178
+	add	x0, x21, :lo12:.LANCHOR179
 	mov	w27, 21574
-	add	x26, x26, :lo12:.LANCHOR105
-	add	x25, x25, :lo12:.LANCHOR121
+	add	x26, x26, :lo12:.LANCHOR107
+	add	x25, x25, :lo12:.LANCHOR123
 	mov	x19, 7
 	strb	wzr, [x0, 1]
 	movk	w27, 0x494c, lsl 16
 	ldrb	w1, [x1, 40]
-	strb	w1, [x21, #:lo12:.LANCHOR178]
+	strb	w1, [x21, #:lo12:.LANCHOR179]
 	strh	wzr, [x0, 2]
-.L2306:
+.L2400:
 	ldr	x1, [x23, #:lo12:.LANCHOR26]
 	add	w0, w19, 8
 	sxth	w24, w19
@@ -13751,31 +14335,31 @@ ftl_info_blk_init:
 	add	x0, x1, x0, sxtw
 	ldrb	w0, [x0, 32]
 	cmp	w0, 255
-	bne	.L2305
-.L2310:
+	bne	.L2399
+.L2404:
 	sub	x19, x19, #1
 	cmn	x19, #1
-	bne	.L2306
+	bne	.L2400
 	mov	w24, 0
-.L2307:
+.L2401:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2311
-	ldr	x0, [x22, #:lo12:.LANCHOR97]
+	tbz	x0, 12, .L2405
+	ldr	x0, [x22, #:lo12:.LANCHOR100]
 	mov	w2, 4800
 	mov	w1, w19
 	ldr	w3, [x0]
-	adrp	x0, .LC137
-	add	x0, x0, :lo12:.LC137
+	adrp	x0, .LC139
+	add	x0, x0, :lo12:.LC139
 	bl	printf
-.L2311:
+.L2405:
 	cmn	w19, #1
-	bne	.L2312
+	bne	.L2406
 	mov	w1, 0
 	mov	w2, 16384
 	add	x0, x20, :lo12:ftl_info_data_buffer
 	bl	ftl_memset
-	ldr	x0, [x22, #:lo12:.LANCHOR97]
+	ldr	x0, [x22, #:lo12:.LANCHOR100]
 	mov	w1, 21574
 	movk	w1, 0x494c, lsl 16
 	str	w1, [x0]
@@ -13783,7 +14367,7 @@ ftl_info_blk_init:
 	movk	w1, 0x6, lsl 16
 	str	w1, [x0, 12]
 	mov	w0, w19
-.L2304:
+.L2398:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -13791,12 +14375,12 @@ ftl_info_blk_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2305:
+.L2399:
 	ldrh	w6, [x26]
 	add	x8, x20, :lo12:ftl_info_data_buffer
 	ldrb	w4, [x25]
-	adrp	x7, .LANCHOR177
-	add	x7, x7, :lo12:.LANCHOR177
+	adrp	x7, .LANCHOR178
+	add	x7, x7, :lo12:.LANCHOR178
 	mov	x2, x8
 	mov	x3, x7
 	stp	x7, x8, [x29, 104]
@@ -13809,7 +14393,7 @@ ftl_info_blk_init:
 	cmn	w0, #1
 	ldr	w6, [x29, 124]
 	ldp	x7, x8, [x29, 104]
-	bne	.L2308
+	bne	.L2402
 	ldrb	w4, [x25]
 	mov	x3, x7
 	mov	x2, x8
@@ -13817,58 +14401,58 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_read_page
 	mov	w5, w0
-.L2308:
+.L2402:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2309
-	ldr	x0, [x22, #:lo12:.LANCHOR97]
+	tbz	x0, 12, .L2403
+	ldr	x0, [x22, #:lo12:.LANCHOR100]
 	mov	w2, w5
 	str	w5, [x29, 124]
 	mov	w3, 672
 	mov	w1, w28
 	ldr	w4, [x0]
-	adrp	x0, .LC136
-	add	x0, x0, :lo12:.LC136
+	adrp	x0, .LC138
+	add	x0, x0, :lo12:.LC138
 	bl	printf
 	ldr	w5, [x29, 124]
-.L2309:
+.L2403:
 	cmn	w5, #1
-	beq	.L2310
-	ldr	x0, [x22, #:lo12:.LANCHOR97]
+	beq	.L2404
+	ldr	x0, [x22, #:lo12:.LANCHOR100]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L2310
+	bne	.L2404
 	mov	w19, w24
-	b	.L2307
-.L2312:
+	b	.L2401
+.L2406:
 	ldr	x1, [x23, #:lo12:.LANCHOR26]
 	add	w0, w24, 8
 	add	x20, x20, :lo12:ftl_info_data_buffer
 	mov	w4, 4
 	mov	x2, x20
-	adrp	x26, .LANCHOR121
+	adrp	x26, .LANCHOR123
 	add	x0, x1, x0, sxtw
 	mov	w27, 21574
-	add	x26, x26, :lo12:.LANCHOR121
+	add	x26, x26, :lo12:.LANCHOR123
 	movk	w27, 0x494c, lsl 16
 	ldrb	w1, [x0, 32]
-	add	x0, x21, :lo12:.LANCHOR178
-	strb	w1, [x21, #:lo12:.LANCHOR178]
+	add	x0, x21, :lo12:.LANCHOR179
+	strb	w1, [x21, #:lo12:.LANCHOR179]
 	strb	w24, [x0, 1]
-	adrp	x24, .LANCHOR177
-	add	x24, x24, :lo12:.LANCHOR177
+	adrp	x24, .LANCHOR178
+	add	x24, x24, :lo12:.LANCHOR178
 	mov	w0, 0
 	mov	x3, x24
 	bl	flash_get_last_written_page
 	sxth	w23, w0
 	add	w0, w0, 1
 	and	w19, w0, 65535
-	adrp	x0, .LANCHOR105
-	ldrb	w25, [x21, #:lo12:.LANCHOR178]
-	ldrh	w0, [x0, #:lo12:.LANCHOR105]
+	adrp	x0, .LANCHOR107
+	ldrb	w25, [x21, #:lo12:.LANCHOR179]
+	ldrh	w0, [x0, #:lo12:.LANCHOR107]
 	madd	w25, w25, w0, w23
-.L2314:
-	tbnz	w23, #31, .L2317
+.L2408:
+	tbnz	w23, #31, .L2411
 	ldrb	w4, [x26]
 	mov	x3, x24
 	mov	x2, x20
@@ -13876,16 +14460,16 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_read_page
 	cmn	w0, #1
-	beq	.L2315
-	ldr	x0, [x22, #:lo12:.LANCHOR97]
+	beq	.L2409
+	ldr	x0, [x22, #:lo12:.LANCHOR100]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L2315
-.L2317:
-	add	x21, x21, :lo12:.LANCHOR178
+	bne	.L2409
+.L2411:
+	add	x21, x21, :lo12:.LANCHOR179
 	strh	w19, [x21, 2]
 	bl	ftl_tmp_into_update
-	ldr	x1, [x22, #:lo12:.LANCHOR97]
+	ldr	x1, [x22, #:lo12:.LANCHOR100]
 	ldr	w0, [x1, 64]
 	add	w0, w0, 1
 	str	w0, [x1, 64]
@@ -13894,12 +14478,12 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_info_flush
 	mov	w0, 0
-	b	.L2304
-.L2315:
+	b	.L2398
+.L2409:
 	sub	w23, w23, #1
 	sub	w25, w25, #1
 	sxth	w23, w23
-	b	.L2314
+	b	.L2408
 	.size	ftl_info_blk_init, .-ftl_info_blk_init
 	.section	.text.ftl_ext_info_flush,"ax",@progbits
 	.align	2
@@ -13916,48 +14500,48 @@ ftl_ext_info_flush:
 	ldr	w1, [x0, 520]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbz	w1, .L2333
+	cbz	w1, .L2427
 	str	wzr, [x0, 520]
-.L2333:
-	adrp	x20, .LANCHOR80
-	adrp	x22, .LANCHOR183
-	adrp	x21, .LANCHOR99
-	add	x20, x20, :lo12:.LANCHOR80
-	add	x22, x22, :lo12:.LANCHOR183
-	add	x21, x21, :lo12:.LANCHOR99
+.L2427:
+	adrp	x20, .LANCHOR83
+	adrp	x22, .LANCHOR184
+	adrp	x21, .LANCHOR102
+	add	x20, x20, :lo12:.LANCHOR83
+	add	x22, x22, :lo12:.LANCHOR184
+	add	x21, x21, :lo12:.LANCHOR102
 	mov	w0, 0
 	bl	ftl_total_vpn_update
-.L2334:
-	adrp	x23, .LANCHOR97
+.L2428:
+	adrp	x23, .LANCHOR100
 	mov	x24, x23
-.L2337:
-	ldr	x0, [x23, #:lo12:.LANCHOR97]
+.L2431:
+	ldr	x0, [x23, #:lo12:.LANCHOR100]
 	ldr	w1, [x0, 56]
 	add	w1, w1, 1
 	str	w1, [x0, 56]
 	ldrh	w1, [x0, 140]
 	ldrh	w0, [x20]
 	cmp	w1, w0
-	bcc	.L2335
+	bcc	.L2429
 	bl	ftl_ext_alloc_new_blk
-.L2335:
-	ldr	x0, [x24, #:lo12:.LANCHOR97]
+.L2429:
+	ldr	x0, [x24, #:lo12:.LANCHOR100]
 	ldrh	w1, [x0, 130]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2336
+	bne	.L2430
 	adrp	x0, .LC0
-	mov	w2, 1746
+	mov	w2, 1798
 	mov	x1, x22
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2336:
-	ldr	x1, [x24, #:lo12:.LANCHOR97]
+.L2430:
+	ldr	x1, [x24, #:lo12:.LANCHOR100]
 	mov	w19, 21
 	ldrh	w0, [x21]
-	adrp	x26, .LANCHOR121
-	adrp	x27, .LANCHOR177
-	add	x25, x27, :lo12:.LANCHOR177
+	adrp	x26, .LANCHOR123
+	adrp	x27, .LANCHOR178
+	add	x25, x27, :lo12:.LANCHOR178
 	sub	w0, w19, w0
 	mov	w19, 1
 	ldrh	w2, [x1, 130]
@@ -13965,43 +14549,43 @@ ftl_ext_info_flush:
 	sub	w19, w19, #1
 	and	w19, w19, w2
 	asr	w28, w2, w0
-	adrp	x0, .LANCHOR105
-	ldrh	w2, [x0, #:lo12:.LANCHOR105]
+	adrp	x0, .LANCHOR107
+	ldrh	w2, [x0, #:lo12:.LANCHOR107]
 	ldrh	w0, [x1, 140]
 	mov	w1, 0
 	madd	w19, w19, w2, w0
-	ldrb	w2, [x26, #:lo12:.LANCHOR121]
+	ldrb	w2, [x26, #:lo12:.LANCHOR123]
 	mov	x0, x25
 	and	w19, w19, 65535
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	ldr	x0, [x24, #:lo12:.LANCHOR97]
+	ldr	x0, [x24, #:lo12:.LANCHOR100]
 	mov	w1, w19
-	ldrb	w4, [x26, #:lo12:.LANCHOR121]
+	ldrb	w4, [x26, #:lo12:.LANCHOR123]
 	mov	x3, x25
-	str	wzr, [x27, #:lo12:.LANCHOR177]
+	str	wzr, [x27, #:lo12:.LANCHOR178]
 	adrp	x2, ftl_ext_info_data_buffer
 	add	x2, x2, :lo12:ftl_ext_info_data_buffer
 	ldr	w0, [x0, 56]
 	str	w0, [x25, 4]
 	mov	w0, w28
 	bl	ftl_prog_page
-	ldr	x2, [x24, #:lo12:.LANCHOR97]
+	ldr	x2, [x24, #:lo12:.LANCHOR100]
 	ldrh	w1, [x2, 140]
 	add	w1, w1, 1
 	and	w1, w1, 65535
 	strh	w1, [x2, 140]
 	cmp	w1, 1
-	beq	.L2337
+	beq	.L2431
 	cmn	w0, #1
-	adrp	x0, .LANCHOR182
-	beq	.L2338
-	ldrb	w1, [x0, #:lo12:.LANCHOR182]
-	cbz	w1, .L2339
-.L2338:
-	strb	wzr, [x0, #:lo12:.LANCHOR182]
-	b	.L2334
-.L2339:
+	adrp	x0, .LANCHOR183
+	beq	.L2432
+	ldrb	w1, [x0, #:lo12:.LANCHOR183]
+	cbz	w1, .L2433
+.L2432:
+	strb	wzr, [x0, #:lo12:.LANCHOR183]
+	b	.L2428
+.L2433:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -14017,23 +14601,23 @@ ftl_ext_info_flush:
 	.type	ftl_ext_info_init, %function
 ftl_ext_info_init:
 	stp	x29, x30, [sp, -112]!
-	adrp	x0, .LANCHOR115
+	adrp	x0, .LANCHOR117
 	mov	w4, 4
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR97
-	strh	wzr, [x0, #:lo12:.LANCHOR115]
+	adrp	x20, .LANCHOR100
+	strh	wzr, [x0, #:lo12:.LANCHOR117]
 	mov	w19, 21
-	ldr	x0, [x20, #:lo12:.LANCHOR97]
+	ldr	x0, [x20, #:lo12:.LANCHOR100]
 	stp	x21, x22, [sp, 32]
 	stp	x27, x28, [sp, 80]
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR177
+	adrp	x24, .LANCHOR178
 	ldrh	w1, [x0, 130]
-	adrp	x0, .LANCHOR99
+	adrp	x0, .LANCHOR102
 	stp	x25, x26, [sp, 64]
-	add	x3, x24, :lo12:.LANCHOR177
-	ldrh	w0, [x0, #:lo12:.LANCHOR99]
+	add	x3, x24, :lo12:.LANCHOR178
+	ldrh	w0, [x0, #:lo12:.LANCHOR102]
 	adrp	x25, ftl_ext_info_data_buffer
 	add	x2, x25, :lo12:ftl_ext_info_data_buffer
 	sub	w0, w19, w0
@@ -14049,33 +14633,33 @@ ftl_ext_info_init:
 	sxth	w22, w0
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2350
-	ldr	x0, [x20, #:lo12:.LANCHOR97]
-	adrp	x1, .LANCHOR184
+	tbz	x0, 12, .L2444
+	ldr	x0, [x20, #:lo12:.LANCHOR100]
+	adrp	x1, .LANCHOR185
 	and	w4, w21, 65535
 	mov	w3, w22
-	mov	w2, 1790
-	add	x1, x1, :lo12:.LANCHOR184
+	mov	w2, 1842
+	add	x1, x1, :lo12:.LANCHOR185
 	ldrh	w5, [x0, 130]
-	adrp	x0, .LC138
-	add	x0, x0, :lo12:.LC138
+	adrp	x0, .LC140
+	add	x0, x0, :lo12:.LC140
 	bl	printf
-.L2350:
-	adrp	x26, .LANCHOR121
-	adrp	x28, .LANCHOR105
+.L2444:
+	adrp	x26, .LANCHOR123
+	adrp	x28, .LANCHOR107
 	mov	w5, 20038
-	add	x26, x26, :lo12:.LANCHOR121
-	add	x28, x28, :lo12:.LANCHOR105
+	add	x26, x26, :lo12:.LANCHOR123
+	add	x28, x28, :lo12:.LANCHOR107
 	mov	w23, 0
 	movk	w5, 0x4549, lsl 16
-.L2351:
+.L2445:
 	and	w21, w22, 65535
 	sub	w0, w21, w23
-	tbnz	x0, 15, .L2356
+	tbnz	x0, 15, .L2450
 	ldrh	w0, [x28]
 	sub	w1, w22, w23
 	ldrb	w4, [x26]
-	add	x3, x24, :lo12:.LANCHOR177
+	add	x3, x24, :lo12:.LANCHOR178
 	str	w5, [x29, 108]
 	add	x2, x25, :lo12:ftl_ext_info_data_buffer
 	madd	w1, w0, w19, w1
@@ -14084,22 +14668,22 @@ ftl_ext_info_init:
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
 	ldr	w5, [x29, 108]
-	beq	.L2352
+	beq	.L2446
 	adrp	x0, .LANCHOR10
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x0]
 	cmp	w0, w5
-	bne	.L2352
-.L2356:
+	bne	.L2446
+.L2450:
 	bl	zftl_sblk_list_init
-	ldr	x0, [x20, #:lo12:.LANCHOR97]
+	ldr	x0, [x20, #:lo12:.LANCHOR100]
 	ldrh	w1, [x0, 140]
 	cmp	w1, w22
-	bgt	.L2354
+	bgt	.L2448
 	add	w21, w21, 1
 	strh	w21, [x0, 140]
 	bl	ftl_ext_info_flush
-.L2354:
+.L2448:
 	adrp	x0, .LANCHOR10
 	mov	w1, -1
 	ldp	x19, x20, [sp, 16]
@@ -14115,14 +14699,14 @@ ftl_ext_info_init:
 	str	wzr, [x0, 520]
 	str	wzr, [x0, 604]
 	str	wzr, [x0, 608]
-	adrp	x0, .LANCHOR63
-	strh	w1, [x0, #:lo12:.LANCHOR63]
+	adrp	x0, .LANCHOR64
+	strh	w1, [x0, #:lo12:.LANCHOR64]
 	mov	w0, 0
 	ldp	x29, x30, [sp], 112
 	ret
-.L2352:
+.L2446:
 	add	w23, w23, 1
-	b	.L2351
+	b	.L2445
 	.size	ftl_ext_info_init, .-ftl_ext_info_init
 	.section	.text.ftl_low_format_data_init,"ax",@progbits
 	.align	2
@@ -14139,44 +14723,44 @@ ftl_low_format_data_init:
 	str	x21, [sp, 32]
 	bl	ftl_memset
 	bl	zftl_sblk_list_init
-	adrp	x19, .LANCHOR97
+	adrp	x19, .LANCHOR100
 	mov	w0, 1
 	bl	ftl_alloc_sblk
 	mov	w1, 0
 	mov	w21, w0
 	bl	ftl_erase_sblk
-	ldr	x1, [x19, #:lo12:.LANCHOR97]
+	ldr	x1, [x19, #:lo12:.LANCHOR100]
 	mov	w0, w21
 	add	x1, x1, 672
 	bl	ftl_get_blk_list_in_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	ldrh	w20, [x0, 672]
 	strh	wzr, [x0, 690]
 	mov	w0, 65533
 	sub	w1, w20, #1
 	cmp	w0, w1, uxth
-	bcs	.L2365
-	adrp	x1, .LANCHOR185
+	bcs	.L2459
+	adrp	x1, .LANCHOR186
 	adrp	x0, .LC0
-	mov	w2, 1973
-	add	x1, x1, :lo12:.LANCHOR185
+	mov	w2, 2025
+	add	x1, x1, :lo12:.LANCHOR186
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2365:
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+.L2459:
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	mov	w2, 256
 	mov	w1, 255
 	add	x0, x0, 416
 	strh	wzr, [x0, 280]
 	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	mov	w2, 4096
 	mov	w1, 0
 	add	x0, x0, 704
 	bl	ftl_memset
-	adrp	x1, .LANCHOR99
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	ldrh	w2, [x1, #:lo12:.LANCHOR99]
+	adrp	x1, .LANCHOR102
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldrh	w2, [x1, #:lo12:.LANCHOR102]
 	mov	w1, 21
 	sub	w1, w1, w2
 	strh	w21, [x0, 416]
@@ -14186,8 +14770,8 @@ ftl_low_format_data_init:
 	strh	w1, [x0, 694]
 	mov	w1, 1
 	strh	w1, [x0, 688]
-	adrp	x1, .LANCHOR186
-	ldrh	w1, [x1, #:lo12:.LANCHOR186]
+	adrp	x1, .LANCHOR187
+	ldrh	w1, [x1, #:lo12:.LANCHOR187]
 	strh	w1, [x0, 698]
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	mov	w1, 20038
@@ -14197,7 +14781,7 @@ ftl_low_format_data_init:
 	mov	w20, w0
 	mov	w1, 0
 	bl	ftl_erase_phy_blk
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	mov	w1, 2
 	strh	w20, [x0, 130]
 	mov	w20, -1
@@ -14213,7 +14797,7 @@ ftl_low_format_data_init:
 	mov	w1, 3
 	add	x0, x0, 48
 	bl	ftl_open_sblk_init
-	ldr	x1, [x19, #:lo12:.LANCHOR97]
+	ldr	x1, [x19, #:lo12:.LANCHOR100]
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	add	x0, x0, 136
 	ldrh	w2, [x1, 134]
@@ -14254,13 +14838,13 @@ ftl_low_format_data_init:
 ftl_low_format:
 	stp	x29, x30, [sp, -80]!
 	mov	w1, 0
-	adrp	x0, .LC139
-	add	x0, x0, :lo12:.LC139
+	adrp	x0, .LC141
+	add	x0, x0, :lo12:.LC141
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR187
+	adrp	x20, .LANCHOR188
 	stp	x21, x22, [sp, 32]
-	add	x20, x20, :lo12:.LANCHOR187
+	add	x20, x20, :lo12:.LANCHOR188
 	stp	x25, x26, [sp, 64]
 	adrp	x22, .LANCHOR26
 	mov	x25, x22
@@ -14268,30 +14852,30 @@ ftl_low_format:
 	mov	w19, 8
 	adrp	x23, .LC0
 	bl	printf
-.L2370:
+.L2464:
 	ldr	x0, [x22, #:lo12:.LANCHOR26]
 	add	x0, x0, x19, sxtw
 	ldrb	w21, [x0, 32]
 	add	w0, w21, 127
 	and	w0, w0, 255
 	cmp	w0, 125
-	bhi	.L2368
-	mov	w2, 2027
+	bhi	.L2462
+	mov	w2, 2079
 	mov	x1, x20
 	add	x0, x23, :lo12:.LC0
 	bl	printf
-.L2368:
+.L2462:
 	cmp	w21, 255
-	beq	.L2369
-	adrp	x0, .LANCHOR105
-	ldrh	w1, [x0, #:lo12:.LANCHOR105]
+	beq	.L2463
+	adrp	x0, .LANCHOR107
+	ldrh	w1, [x0, #:lo12:.LANCHOR107]
 	mov	w0, 0
 	mul	w1, w1, w21
 	bl	flash_erase_block
-.L2369:
+.L2463:
 	add	w19, w19, 1
 	cmp	w19, 16
-	bne	.L2370
+	bne	.L2464
 	bl	sblk_init
 	adrp	x22, .LANCHOR7
 	bl	ftl_info_blk_init
@@ -14305,29 +14889,29 @@ ftl_low_format:
 	mov	w3, 1
 	ldrh	w2, [x19, #:lo12:.LANCHOR6]
 	add	x2, x0, x2, lsl 2
-.L2371:
+.L2465:
 	cmp	x0, x2
-	bne	.L2372
-	adrp	x21, .LANCHOR97
+	bne	.L2466
+	adrp	x21, .LANCHOR100
 	mov	w1, 21574
-	adrp	x24, .LANCHOR59
-	add	x24, x24, :lo12:.LANCHOR59
-	ldr	x0, [x21, #:lo12:.LANCHOR97]
+	adrp	x24, .LANCHOR60
+	add	x24, x24, :lo12:.LANCHOR60
+	ldr	x0, [x21, #:lo12:.LANCHOR100]
 	movk	w1, 0x494c, lsl 16
 	mov	w20, 0
 	mov	w26, 1
 	strh	wzr, [x0, 148]
 	str	w1, [x0]
-.L2373:
+.L2467:
 	ldrh	w0, [x19, #:lo12:.LANCHOR6]
-	adrp	x23, .LANCHOR98
+	adrp	x23, .LANCHOR101
 	cmp	w0, w20
-	bhi	.L2381
+	bhi	.L2476
 	ldr	x0, [x25, #:lo12:.LANCHOR26]
 	mov	w4, 3
-	ldrb	w2, [x23, #:lo12:.LANCHOR98]
+	ldrb	w2, [x23, #:lo12:.LANCHOR101]
 	mov	w10, 15
-	ldr	x6, [x21, #:lo12:.LANCHOR97]
+	ldr	x6, [x21, #:lo12:.LANCHOR100]
 	cmp	w2, 1
 	ldr	x1, [x22, #:lo12:.LANCHOR7]
 	ldrb	w0, [x0, 47]
@@ -14341,7 +14925,7 @@ ftl_low_format:
 	add	x0, x0, 4
 	add	w20, w5, 1
 	add	x0, x1, x0
-.L2384:
+.L2479:
 	cmp	w2, 4
 	add	x1, x1, 4
 	csel	w7, w10, w4, eq
@@ -14350,10 +14934,10 @@ ftl_low_format:
 	orr	w7, w7, -32
 	strb	w7, [x1, -2]
 	cmp	x1, x0
-	bne	.L2384
+	bne	.L2479
 	mul	w5, w5, w8
 	mov	w4, 16
-	add	w0, w3, w8
+	add	w0, w8, w3
 	sdiv	w4, w4, w2
 	add	w0, w5, w0, uxth
 	strh	w0, [x6, 148]
@@ -14362,28 +14946,28 @@ ftl_low_format:
 	add	w4, w20, w4
 	and	w4, w4, 65535
 	strh	w4, [x6, 134]
-	tbz	x0, 12, .L2385
-	adrp	x0, .LC140
+	tbz	x0, 12, .L2480
+	adrp	x0, .LC142
 	mov	w3, w20
 	mov	w2, 128
-	mov	w1, 2073
-	add	x0, x0, :lo12:.LC140
+	mov	w1, 2126
+	add	x0, x0, :lo12:.LC142
 	bl	printf
-.L2385:
-	ldr	x0, [x21, #:lo12:.LANCHOR97]
+.L2480:
+	ldr	x0, [x21, #:lo12:.LANCHOR100]
 	mov	w2, 128
 	mov	w1, 255
 	add	x0, x0, 160
 	bl	ftl_memset
-	adrp	x0, .LANCHOR106
-	ldrb	w13, [x23, #:lo12:.LANCHOR98]
-	ldr	x2, [x21, #:lo12:.LANCHOR97]
+	adrp	x0, .LANCHOR108
+	ldrb	w13, [x23, #:lo12:.LANCHOR101]
+	ldr	x2, [x21, #:lo12:.LANCHOR100]
 	mov	w4, 21
-	ldrb	w15, [x0, #:lo12:.LANCHOR106]
-	adrp	x0, .LANCHOR99
+	ldrb	w15, [x0, #:lo12:.LANCHOR108]
+	adrp	x0, .LANCHOR102
 	and	w16, w13, 65535
 	ldr	x14, [x22, #:lo12:.LANCHOR7]
-	ldrh	w0, [x0, #:lo12:.LANCHOR99]
+	ldrh	w0, [x0, #:lo12:.LANCHOR102]
 	mov	w3, 0
 	ldrh	w12, [x2, 134]
 	sub	w0, w4, w0
@@ -14392,9 +14976,9 @@ ftl_low_format:
 	lsl	w4, w4, w0
 	and	w1, w1, 65535
 	and	w4, w4, 65535
-.L2386:
+.L2481:
 	cmp	w20, w12
-	bcc	.L2392
+	bcc	.L2487
 	ldrh	w0, [x19, #:lo12:.LANCHOR6]
 	strh	w3, [x2, 112]
 	sub	w0, w0, w12
@@ -14410,37 +14994,41 @@ ftl_low_format:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2372:
+.L2466:
 	ldrb	w1, [x0, 2]
 	add	x0, x0, 4
 	and	w1, w1, 31
 	bfi	w1, w3, 3, 2
 	strb	w1, [x0, -2]
-	b	.L2371
-.L2381:
+	b	.L2465
+.L2476:
+	adrp	x0, .LANCHOR71
 	strh	w20, [x24]
+	ldrb	w0, [x0, #:lo12:.LANCHOR71]
+	cbnz	w0, .L2468
 	mov	w0, w20
 	bl	ftl_test_block
-	ldrb	w11, [x23, #:lo12:.LANCHOR98]
-	adrp	x0, .LANCHOR106
+.L2468:
+	ldrb	w11, [x23, #:lo12:.LANCHOR101]
+	adrp	x0, .LANCHOR108
 	ldr	x6, [x22, #:lo12:.LANCHOR7]
 	mov	w7, 0
-	ldrb	w14, [x0, #:lo12:.LANCHOR106]
+	ldrb	w14, [x0, #:lo12:.LANCHOR108]
 	mov	w10, 0
-	ldr	x13, [x21, #:lo12:.LANCHOR97]
+	ldr	x13, [x21, #:lo12:.LANCHOR100]
 	mov	w8, 0
 	mul	w12, w20, w11
 	add	x6, x6, x20, uxth 2
-.L2374:
+.L2469:
 	cmp	w8, w14
-	bcs	.L2378
+	bcs	.L2473
 	add	w15, w11, w7
-	b	.L2379
-.L2377:
+	b	.L2474
+.L2472:
 	add	w1, w7, w12
 	mov	w0, w8
 	bl	flash_check_bad_block
-	cbz	w0, .L2375
+	cbz	w0, .L2470
 	ldrb	w1, [x6, 3]
 	lsl	w0, w26, w7
 	orr	w0, w0, w1
@@ -14448,29 +15036,29 @@ ftl_low_format:
 	ldrh	w0, [x13, 148]
 	add	w0, w0, 1
 	strh	w0, [x13, 148]
-.L2376:
+.L2471:
 	add	w7, w7, 1
-.L2379:
+.L2474:
 	cmp	w7, w15
-	bne	.L2377
+	bne	.L2472
 	add	w8, w8, 1
 	sub	w12, w12, w11
 	and	w8, w8, 65535
-	b	.L2374
-.L2375:
+	b	.L2469
+.L2470:
 	add	w10, w10, 1
 	and	w10, w10, 65535
-	b	.L2376
-.L2378:
-	cbnz	w10, .L2380
+	b	.L2471
+.L2473:
+	cbnz	w10, .L2475
 	ldrb	w0, [x6, 2]
 	orr	w0, w0, -32
 	strb	w0, [x6, 2]
-.L2380:
+.L2475:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2373
-.L2392:
+	b	.L2467
+.L2487:
 	add	x10, x14, x20, uxth 2
 	mov	w6, 0
 	mov	w8, 0
@@ -14478,48 +15066,48 @@ ftl_low_format:
 	ldrb	w0, [x10, 2]
 	orr	w0, w0, -32
 	strb	w0, [x10, 2]
-.L2387:
+.L2482:
 	cmp	w5, w15
-	bcc	.L2394
+	bcc	.L2489
 	add	w20, w20, 1
-	add	w1, w16, w1
+	add	w1, w1, w16
 	and	w20, w20, 65535
 	and	w1, w1, 65535
-	b	.L2386
-.L2390:
+	b	.L2481
+.L2485:
 	ldrb	w11, [x10, 3]
 	add	w17, w8, w7
 	asr	w11, w11, w17
-	tbnz	x11, 0, .L2388
+	tbnz	x11, 0, .L2483
 	cmp	w13, 1
-	bls	.L2393
+	bls	.L2488
 	and	w0, w0, 1
 	add	w0, w1, w0
 	and	w0, w0, 65535
-.L2389:
+.L2484:
 	add	x11, x2, x3, sxtw 1
 	add	w3, w3, 1
 	and	w3, w3, 65535
 	add	w0, w0, w6
 	strh	w0, [x11, 160]
-.L2388:
+.L2483:
 	add	x7, x7, 1
-.L2391:
+.L2486:
 	and	w0, w7, 65535
 	cmp	w0, w16
-	bcc	.L2390
+	bcc	.L2485
 	add	w5, w5, 1
-	add	w6, w6, w4
+	add	w6, w4, w6
 	and	w5, w5, 65535
 	add	w8, w8, w13
 	and	w6, w6, 65535
-	b	.L2387
-.L2393:
+	b	.L2482
+.L2488:
 	mov	w0, w1
-	b	.L2389
-.L2394:
+	b	.L2484
+.L2489:
 	mov	x7, 0
-	b	.L2391
+	b	.L2486
 	.size	ftl_low_format, .-ftl_low_format
 	.section	.text.ftl_re_low_format,"ax",@progbits
 	.align	2
@@ -14528,27 +15116,27 @@ ftl_low_format:
 ftl_re_low_format:
 	stp	x29, x30, [sp, -16]!
 	mov	w1, 1
-	adrp	x0, .LC141
-	add	x0, x0, :lo12:.LC141
+	adrp	x0, .LC143
+	add	x0, x0, :lo12:.LC143
 	add	x29, sp, 0
 	bl	printf
 	bl	sblk_init
 	bl	ftl_info_blk_init
 	bl	ftl_ext_info_init
-	adrp	x0, .LANCHOR97
+	adrp	x0, .LANCHOR100
 	adrp	x2, .LANCHOR6
 	mov	w3, 0
 	mov	w4, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR97]
+	ldr	x0, [x0, #:lo12:.LANCHOR100]
 	mov	w5, 0
 	ldrh	w7, [x2, #:lo12:.LANCHOR6]
 	adrp	x2, .LANCHOR7
 	ldr	x2, [x2, #:lo12:.LANCHOR7]
 	ldrh	w1, [x0, 134]
 	add	x2, x2, x1, uxth 2
-.L2405:
+.L2500:
 	cmp	w1, w7
-	bcc	.L2409
+	bcc	.L2504
 	strh	w5, [x0, 114]
 	strh	w4, [x0, 118]
 	strh	w3, [x0, 116]
@@ -14559,29 +15147,29 @@ ftl_re_low_format:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L2409:
+.L2504:
 	ldrb	w6, [x2, 2]
 	and	w8, w6, 31
 	strb	w8, [x2, 2]
 	ands	w6, w6, 24
-	bne	.L2406
+	bne	.L2501
 	add	w5, w5, 1
 	and	w5, w5, 65535
-.L2407:
+.L2502:
 	add	w1, w1, 1
 	add	x2, x2, 4
 	and	w1, w1, 65535
-	b	.L2405
-.L2406:
+	b	.L2500
+.L2501:
 	cmp	w6, 16
-	bne	.L2408
+	bne	.L2503
 	add	w4, w4, 1
 	and	w4, w4, 65535
-	b	.L2407
-.L2408:
+	b	.L2502
+.L2503:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L2407
+	b	.L2502
 	.size	ftl_re_low_format, .-ftl_re_low_format
 	.section	.text.ftl_prog_ppa_page,"ax",@progbits
 	.align	2
@@ -14603,50 +15191,50 @@ ftl_prog_ppa_page:
 ftl_write_last_log_page:
 	ldrh	w1, [x0, 6]
 	cmp	w1, 1
-	bne	.L2414
+	bne	.L2509
 	stp	x29, x30, [sp, -48]!
-	adrp	x1, .LANCHOR111
+	adrp	x1, .LANCHOR113
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
 	stp	x21, x22, [sp, 32]
-	ldr	x20, [x1, #:lo12:.LANCHOR111]
+	ldr	x20, [x1, #:lo12:.LANCHOR113]
 	ldrh	w22, [x0, 12]
 	bl	ftl_get_new_free_page
 	mov	w21, w0
 	cmn	w0, #1
-	beq	.L2415
+	beq	.L2510
 	ldrh	w0, [x19]
 	add	x20, x20, x22, uxth 2
 	bl	ftl_vpn_decrement
-	adrp	x0, .LANCHOR175
+	adrp	x0, .LANCHOR176
 	mov	w1, 15555
-	add	x6, x0, :lo12:.LANCHOR175
+	add	x6, x0, :lo12:.LANCHOR176
 	movk	w1, 0xf55f, lsl 16
-	str	w1, [x0, #:lo12:.LANCHOR175]
-	adrp	x0, .LANCHOR80
-	ldrh	w1, [x0, #:lo12:.LANCHOR80]
-	adrp	x0, .LANCHOR73
-	ldrb	w0, [x0, #:lo12:.LANCHOR73]
+	str	w1, [x0, #:lo12:.LANCHOR176]
+	adrp	x0, .LANCHOR83
+	ldrh	w1, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR76
+	ldrb	w0, [x0, #:lo12:.LANCHOR76]
 	mul	w1, w1, w0
 	mov	x0, x20
 	lsl	w1, w1, 2
 	bl	js_hash
 	stp	w0, wzr, [x6, 4]
-	adrp	x0, .LANCHOR121
+	adrp	x0, .LANCHOR123
 	mov	x2, x6
 	mov	x1, x20
-	ldrb	w3, [x0, #:lo12:.LANCHOR121]
+	ldrb	w3, [x0, #:lo12:.LANCHOR123]
 	mov	w0, w21
 	str	wzr, [x6, 12]
 	bl	ftl_prog_ppa_page
-.L2415:
+.L2510:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L2414:
+.L2509:
 	mov	w0, -1
 	ret
 	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
@@ -14655,377 +15243,502 @@ ftl_write_last_log_page:
 	.global	ftl_open_sblk_recovery
 	.type	ftl_open_sblk_recovery, %function
 ftl_open_sblk_recovery:
-	stp	x29, x30, [sp, -144]!
+	stp	x29, x30, [sp, -224]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR14
-	stp	x27, x28, [sp, 80]
-	mov	x28, x0
-	ldr	w0, [x22, #:lo12:.LANCHOR14]
+	adrp	x21, .LANCHOR14
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
 	stp	x25, x26, [sp, 64]
 	mov	x25, x1
-	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
-	tbz	x0, 12, .L2421
-	ldrh	w1, [x28, 2]
-	adrp	x0, .LC142
-	add	x0, x0, :lo12:.LC142
-	bl	printf
-.L2421:
-	ldr	w0, [x22, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2422
-	ldrb	w1, [x28, 5]
-	adrp	x0, .LC143
-	add	x0, x0, :lo12:.LC143
-	bl	printf
-.L2422:
-	ldr	w0, [x22, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2423
-	ldrh	w1, [x28]
+	stp	x27, x28, [sp, 80]
+	tbz	x0, 12, .L2516
+	ldrh	w1, [x19, 2]
 	adrp	x0, .LC144
 	add	x0, x0, :lo12:.LC144
 	bl	printf
-.L2423:
-	ldr	w0, [x22, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2424
-	ldrh	w2, [x28, 18]
+.L2516:
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2517
+	ldrb	w1, [x19, 5]
 	adrp	x0, .LC145
-	ldrh	w1, [x28, 16]
 	add	x0, x0, :lo12:.LC145
 	bl	printf
-.L2424:
-	ldrh	w0, [x28, 10]
-	strh	w0, [x28, 14]
+.L2517:
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2518
+	ldrh	w1, [x19]
+	adrp	x0, .LC146
+	add	x0, x0, :lo12:.LC146
+	bl	printf
+.L2518:
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2519
+	ldrh	w2, [x19, 18]
+	adrp	x0, .LC147
+	ldrh	w1, [x19, 16]
+	add	x0, x0, :lo12:.LC147
+	bl	printf
+.L2519:
+	ldrh	w0, [x19, 10]
+	strh	w0, [x19, 14]
 	adrp	x0, .LANCHOR6
-	ldrh	w1, [x28]
+	ldrh	w1, [x19]
 	ldrh	w0, [x0, #:lo12:.LANCHOR6]
 	cmp	w1, w0
-	bcs	.L2420
+	bcs	.L2515
 	mov	w0, 1
+	add	x26, x29, 160
 	bl	buf_alloc
-	ldrb	w20, [x28, 5]
-	mov	x19, x0
-	ldrh	w21, [x28, 2]
-	adrp	x26, .LANCHOR121
-	mov	w27, 0
-	add	x0, x26, :lo12:.LANCHOR121
-	adrp	x23, .LANCHOR80
+	mov	x20, x0
+	mov	w2, 64
+	mov	w1, 255
+	mov	x0, x26
+	bl	ftl_memset
+	ldrb	w22, [x19, 5]
+	adrp	x0, .LANCHOR123
+	ldrh	w23, [x19, 2]
+	add	x0, x0, :lo12:.LANCHOR123
+	mov	w27, 2
+	adrp	x24, .LANCHOR83
 	str	x0, [x29, 128]
-.L2427:
-	ldrh	w0, [x23, #:lo12:.LANCHOR80]
-	cmp	w0, w21
-	bhi	.L2440
-.L2430:
-	ldrh	w0, [x28, 10]
-	ldrh	w1, [x28, 6]
-	ldrh	w2, [x23, #:lo12:.LANCHOR80]
+	str	wzr, [x29, 152]
+.L2521:
+	ldrh	w0, [x24, #:lo12:.LANCHOR83]
+	cmp	w0, w23
+	bhi	.L2534
+.L2524:
+	ldrh	w0, [x19, 10]
+	ldrh	w1, [x19, 6]
+	ldrh	w2, [x24, #:lo12:.LANCHOR83]
 	add	w1, w1, w0
-	ldrb	w0, [x28, 9]
-	strh	w21, [x28, 2]
-	strb	w20, [x28, 5]
+	ldrb	w0, [x19, 9]
+	strh	w23, [x19, 2]
+	strb	w22, [x19, 5]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L2441
-	adrp	x1, .LANCHOR188
+	beq	.L2535
+	adrp	x1, .LANCHOR189
 	adrp	x0, .LC0
-	mov	w2, 1472
-	add	x1, x1, :lo12:.LANCHOR188
+	mov	w2, 1480
+	add	x1, x1, :lo12:.LANCHOR189
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2441:
-	adrp	x21, .LANCHOR111
-	ldrh	w3, [x28, 10]
+.L2535:
+	adrp	x2, .LANCHOR113
+	ldrh	w3, [x19, 10]
 	mov	w0, 0
 	mov	w1, 0
-	ldr	x5, [x21, #:lo12:.LANCHOR111]
-.L2442:
+	ldr	x4, [x2, #:lo12:.LANCHOR113]
+	str	x2, [x29, 136]
+.L2536:
 	cmp	w1, w3
-	bcc	.L2444
-	ldrb	w20, [x28, 9]
-	adrp	x24, .LANCHOR9
-	ldrh	w1, [x23, #:lo12:.LANCHOR80]
-	madd	w20, w20, w1, w0
-	ldr	w0, [x22, #:lo12:.LANCHOR14]
-	sub	w20, w20, w3
-	and	w20, w20, 65535
-	tbz	x0, 12, .L2445
-	ldrh	w1, [x28]
-	ldr	x2, [x24, #:lo12:.LANCHOR9]
+	bcc	.L2538
+	ldrb	w22, [x19, 9]
+	adrp	x23, .LANCHOR9
+	ldrh	w1, [x24, #:lo12:.LANCHOR83]
+	madd	w22, w22, w1, w0
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	sub	w22, w22, w3
+	and	w22, w22, 65535
+	tbz	x0, 12, .L2539
+	ldrh	w1, [x19]
+	ldr	x2, [x23, #:lo12:.LANCHOR9]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w3, [x2, x0]
-	adrp	x0, .LC146
-	mov	w2, w20
-	add	x0, x0, :lo12:.LC146
+	adrp	x0, .LC148
+	mov	w2, w22
+	add	x0, x0, :lo12:.LC148
 	bl	printf
-.L2445:
-	ldr	x0, [x24, #:lo12:.LANCHOR9]
-	adrp	x25, .LANCHOR121
-	ldrh	w1, [x28]
-	adrp	x24, .LANCHOR73
-	adrp	x26, .LC147
-	add	x24, x24, :lo12:.LANCHOR73
-	add	x25, x25, :lo12:.LANCHOR121
-	add	x26, x26, :lo12:.LC147
-	strh	w20, [x0, x1, lsl 1]
-	mov	w20, 0
-	mov	x0, x19
+.L2539:
+	ldr	x0, [x23, #:lo12:.LANCHOR9]
+	ldrh	w1, [x19]
+	strh	w22, [x0, x1, lsl 1]
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 14, .L2540
+	ldp	w1, w2, [x29, 160]
+	adrp	x0, .LC149
+	ldp	w3, w4, [x29, 168]
+	add	x0, x0, :lo12:.LC149
+	bl	printf
+.L2540:
+	adrp	x25, .LANCHOR123
+	ldr	x0, [x20, 8]
+	mov	w1, 0
+	mov	x23, 0
+	ldrb	w2, [x25, #:lo12:.LANCHOR123]
+	lsl	w2, w2, 9
+	bl	ftl_memset
+	adrp	x0, .LC151
+	add	x0, x0, :lo12:.LC151
+	str	x0, [x29, 120]
+	adrp	x0, .LANCHOR76
+	add	x0, x0, :lo12:.LANCHOR76
+	str	x0, [x29, 112]
+.L2541:
+	adrp	x0, .LANCHOR76
+	str	w23, [x29, 148]
+	ldrb	w0, [x0, #:lo12:.LANCHOR76]
+	mul	w0, w0, w27
+	cmp	w23, w0
+	bcc	.L2554
+	mov	x0, x20
 	bl	buf_free
-.L2446:
-	ldrb	w0, [x24]
-	cmp	w20, w0, lsl 1
-	bcc	.L2449
-	ldrh	w1, [x28, 12]
-	ldrh	w0, [x23, #:lo12:.LANCHOR80]
-	ldrb	w2, [x28, 9]
+	ldrh	w1, [x19, 12]
+	ldrh	w0, [x24, #:lo12:.LANCHOR83]
+	ldrb	w2, [x19, 9]
 	madd	w0, w0, w2, w1
 	mov	x1, -4
 	add	x0, x1, x0, sxtw 2
-	ldr	x1, [x21, #:lo12:.LANCHOR111]
+	ldr	x1, [x29, 136]
+	ldr	x1, [x1, #:lo12:.LANCHOR113]
 	ldr	w0, [x1, x0]
 	cmn	w0, #1
-	beq	.L2450
-	adrp	x1, .LANCHOR188
+	beq	.L2555
+	adrp	x1, .LANCHOR189
 	adrp	x0, .LC0
-	mov	w2, 1502
-	add	x1, x1, :lo12:.LANCHOR188
+	mov	w2, 1554
+	add	x1, x1, :lo12:.LANCHOR189
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2450:
-	ldrh	w0, [x28, 6]
+.L2555:
+	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bne	.L2420
+	bne	.L2515
+	mov	x0, x19
+	bl	ftl_write_last_log_page
+.L2515:
 	ldp	x19, x20, [sp, 16]
-	mov	x0, x28
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 144
-	b	ftl_write_last_log_page
-.L2440:
-	ldrb	w20, [x28, 5]
-	adrp	x24, .LANCHOR105
-	add	x0, x24, :lo12:.LANCHOR105
+	ldp	x29, x30, [sp], 224
+	ret
+.L2534:
+	ldrb	w22, [x19, 5]
+	adrp	x0, .LANCHOR107
+	add	x0, x0, :lo12:.LANCHOR107
 	str	x0, [x29, 136]
-.L2428:
-	ldrb	w0, [x28, 9]
-	cmp	w0, w20
-	bhi	.L2439
-	add	w21, w21, 1
-	strb	wzr, [x28, 5]
-	and	w21, w21, 65535
-	b	.L2427
-.L2439:
-	add	x0, x28, x20, sxtw 1
+.L2522:
+	ldrb	w0, [x19, 9]
+	cmp	w0, w22
+	bhi	.L2533
+	add	w23, w23, 1
+	strb	wzr, [x19, 5]
+	and	w23, w23, 65535
+	b	.L2521
+.L2533:
+	add	x0, x19, x22, sxtw 1
 	mov	w1, 65535
 	ldrh	w0, [x0, 16]
 	cmp	w0, w1
-	beq	.L2429
+	beq	.L2523
 	ldr	x1, [x29, 136]
-	ldrb	w3, [x26, #:lo12:.LANCHOR121]
-	ldr	x2, [x19, 24]
-	ldrh	w5, [x1]
-	ldr	x1, [x19, 8]
-	madd	w0, w5, w0, w21
+	ldr	x2, [x20, 24]
+	ldrh	w1, [x1]
+	madd	w0, w1, w0, w23
+	ldr	x1, [x20, 8]
+	str	w0, [x29, 148]
+	adrp	x0, .LANCHOR123
+	ldrb	w3, [x0, #:lo12:.LANCHOR123]
+	ldr	w0, [x29, 148]
 	bl	ftl_read_ppa_page
-	mov	w24, w0
+	mov	w28, w0
 	cmp	w0, 512
-	beq	.L2430
+	beq	.L2524
 	cmn	w0, #1
-	beq	.L2431
-	ldr	x0, [x19, 24]
+	beq	.L2525
+	ldr	x0, [x20, 24]
 	ldr	w1, [x0]
 	cmn	w1, #1
-	bne	.L2431
+	bne	.L2525
 	ldr	w0, [x0, 4]
 	cmn	w0, #1
-	bne	.L2431
-	ldr	x0, [x19, 8]
+	bne	.L2525
+	ldr	x0, [x20, 8]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L2430
-.L2431:
-	adrp	x0, .LANCHOR181
+	beq	.L2524
+.L2525:
+	adrp	x0, .LANCHOR182
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR181]
-	ldrb	w0, [x28, 9]
-	ldrh	w1, [x28, 10]
-	madd	w0, w0, w21, w20
+	strb	w1, [x0, #:lo12:.LANCHOR182]
+	ldrb	w0, [x19, 9]
+	ldrh	w1, [x19, 10]
+	madd	w0, w0, w23, w22
 	cmp	w1, w0
-	beq	.L2432
-	adrp	x1, .LANCHOR188
+	beq	.L2526
+	adrp	x1, .LANCHOR189
 	adrp	x0, .LC0
-	mov	w2, 1395
-	add	x1, x1, :lo12:.LANCHOR188
+	mov	w2, 1399
+	add	x1, x1, :lo12:.LANCHOR189
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2432:
-	ldrh	w0, [x28, 10]
-	ldrh	w1, [x28, 6]
-	ldrb	w2, [x28, 9]
+.L2526:
+	ldrh	w0, [x19, 10]
+	ldrh	w1, [x19, 6]
+	ldrb	w2, [x19, 9]
 	add	w1, w1, w0
-	ldrh	w0, [x23, #:lo12:.LANCHOR80]
+	ldrh	w0, [x24, #:lo12:.LANCHOR83]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L2433
-	adrp	x1, .LANCHOR188
+	beq	.L2527
+	adrp	x1, .LANCHOR189
 	adrp	x0, .LC0
-	mov	w2, 1396
-	add	x1, x1, :lo12:.LANCHOR188
+	mov	w2, 1400
+	add	x1, x1, :lo12:.LANCHOR189
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2433:
-	cmn	w24, #1
-	beq	.L2435
-	ldr	x0, [x19, 24]
+.L2527:
+	cmn	w28, #1
+	beq	.L2529
+	ldr	x0, [x20, 24]
 	ldr	w0, [x0, 4]
 	cmn	w0, #1
-	beq	.L2435
+	beq	.L2529
 	bl	lpa_hash_get_ppa
-	cbz	x25, .L2437
-	ldr	x3, [x19, 24]
+	cbz	x25, .L2531
+	ldr	x3, [x20, 24]
 	ldr	w1, [x3, 8]
 	cmp	w0, w1
-	beq	.L2437
+	beq	.L2531
 	cmn	w0, #1
-	beq	.L2437
-	adrp	x6, .LANCHOR99
-	mov	w5, 21
+	beq	.L2531
+	adrp	x4, .LANCHOR102
+	mov	w28, 21
 	mov	w27, 1
-	ldrh	w7, [x6, #:lo12:.LANCHOR99]
-	sub	w1, w5, w7
-	lsr	w2, w0, w7
-	adrp	x7, .LANCHOR98
+	ldrh	w5, [x4, #:lo12:.LANCHOR102]
+	sub	w1, w28, w5
+	lsr	w2, w0, w5
+	adrp	x5, .LANCHOR101
 	lsl	w1, w27, w1
 	sub	w1, w1, #1
 	and	w1, w1, w2
-	ldrb	w2, [x7, #:lo12:.LANCHOR98]
+	ldrb	w2, [x5, #:lo12:.LANCHOR101]
 	udiv	w1, w1, w2
 	ldrh	w2, [x25]
 	cmp	w2, w1, uxth
-	bne	.L2437
+	bne	.L2531
 	ldr	x1, [x29, 128]
-	adrp	x8, .LANCHOR177
-	ldr	w10, [x3]
-	add	x2, x8, :lo12:.LANCHOR177
-	stp	w5, w10, [x29, 112]
-	str	x8, [x29, 120]
+	adrp	x6, .LANCHOR178
+	ldr	w7, [x3]
+	add	x2, x6, :lo12:.LANCHOR178
+	str	w7, [x29, 120]
+	str	x6, [x29, 152]
 	ldrb	w3, [x1]
-	ldr	x1, [x19, 8]
-	stp	x7, x6, [x29, 96]
+	ldr	x1, [x20, 8]
+	stp	x5, x4, [x29, 104]
 	bl	ftl_read_ppa_page
-	ldr	x8, [x29, 120]
-	ldr	w10, [x29, 116]
-	ldr	w0, [x8, #:lo12:.LANCHOR177]
-	cmp	w10, w0
-	bhi	.L2437
-	ldr	x0, [x19, 24]
+	ldr	x6, [x29, 152]
+	ldr	w7, [x29, 120]
+	ldr	w0, [x6, #:lo12:.LANCHOR178]
+	cmp	w7, w0
+	bhi	.L2531
+	ldr	x0, [x20, 24]
 	ldr	w0, [x0, 8]
 	cmn	w0, #1
-	beq	.L2435
-	ldp	x7, x6, [x29, 96]
-	ldr	w5, [x29, 112]
-	ldrh	w1, [x6, #:lo12:.LANCHOR99]
-	sub	w5, w5, w1
+	beq	.L2529
+	ldp	x5, x4, [x29, 104]
+	ldrh	w1, [x4, #:lo12:.LANCHOR102]
+	sub	w28, w28, w1
 	lsr	w0, w0, w1
-	lsl	w27, w27, w5
+	lsl	w27, w27, w28
 	sub	w27, w27, #1
 	and	w27, w27, w0
-	ldrb	w0, [x7, #:lo12:.LANCHOR98]
+	ldrb	w0, [x5, #:lo12:.LANCHOR101]
 	udiv	w0, w27, w0
 	bl	ftl_vpn_decrement
-.L2435:
-	ldrh	w0, [x28, 6]
-	mov	w27, 1
+.L2529:
+	ldrh	w0, [x19, 6]
+	mov	w27, 4
 	sub	w0, w0, #1
-	strh	w0, [x28, 6]
-	ldrh	w0, [x28, 10]
+	strh	w0, [x19, 6]
+	ldrh	w0, [x19, 10]
 	add	w0, w0, 1
-	strh	w0, [x28, 10]
-.L2429:
-	add	w20, w20, 1
-	and	w20, w20, 65535
-	b	.L2428
-.L2444:
-	ldrh	w2, [x28, 12]
+	strh	w0, [x19, 10]
+	mov	w0, 1
+	str	w0, [x29, 152]
+.L2523:
+	add	w22, w22, 1
+	and	w22, w22, 65535
+	b	.L2522
+.L2538:
+	ldrh	w2, [x19, 12]
 	add	w2, w2, w1
-	ldr	w2, [x5, x2, lsl 2]
+	ldr	w2, [x4, x2, lsl 2]
 	cmn	w2, #1
-	beq	.L2443
-	add	w20, w0, 1
-	and	w0, w20, 65535
-.L2443:
+	beq	.L2537
+	add	w22, w0, 1
+	and	w0, w22, 65535
+.L2537:
 	add	w1, w1, 1
-	b	.L2442
-.L2449:
-	cbz	w27, .L2447
-	ldrh	w0, [x28, 6]
+	b	.L2536
+.L2554:
+	ldr	w0, [x26, x23, lsl 2]
+	adrp	x28, .LANCHOR100
+	cmn	w0, #1
+	bne	.L2542
+.L2546:
+	ldr	x1, [x28, #:lo12:.LANCHOR100]
+	mov	w22, -1
+	ldr	x0, [x20, 24]
+	ldr	w1, [x1, 8]
+	stp	w1, w22, [x0]
+	stp	w22, wzr, [x0, 8]
+	ldr	x0, [x20, 8]
+	str	wzr, [x0]
+.L2543:
+	ldr	w0, [x29, 152]
+	cbz	w0, .L2548
+	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bls	.L2447
-	mov	x0, x28
+	bls	.L2548
+	add	x0, x21, :lo12:.LANCHOR14
+	mov	x28, x0
+	add	x0, x25, :lo12:.LANCHOR123
+	str	x0, [x29, 128]
+.L2595:
+	mov	x0, x19
 	bl	ftl_get_new_free_page
 	mov	w4, w0
-	ldr	w0, [x22, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2448
+	ldr	w0, [x28]
+	tbz	x0, 14, .L2550
+	ldr	x0, [x20, 24]
 	mov	w1, w4
-	str	w4, [x29, 136]
-	mov	x0, x26
+	str	w4, [x29, 104]
+	ldr	w2, [x0, 4]
+	ldr	x0, [x29, 120]
 	bl	printf
-	ldr	w4, [x29, 136]
-.L2448:
-	adrp	x0, .LANCHOR97
-	ldr	x2, [x19, 24]
-	ldr	x1, [x19, 8]
-	ldr	x0, [x0, #:lo12:.LANCHOR97]
-	ldr	w0, [x0, 8]
-	str	w0, [x2]
-	str	wzr, [x2, 12]
-	mov	w0, -1
-	stp	w0, w0, [x2, 4]
+	ldr	w4, [x29, 104]
+.L2550:
+	ldr	x0, [x29, 112]
+	ldr	w2, [x29, 148]
+	ldrh	w1, [x19, 6]
+	ldrb	w0, [x0]
+	mul	w0, w0, w27
+	add	w0, w0, 1
+	sub	w0, w0, w2
+	cmp	w1, w0
+	bls	.L2548
+	ldr	x0, [x29, 128]
+	ldr	x1, [x20, 8]
+	ldr	x2, [x20, 24]
+	ldrb	w3, [x0]
 	mov	w0, w4
-	str	wzr, [x1]
-	ldrb	w3, [x25]
 	bl	ftl_prog_ppa_page
-	ldrh	w0, [x28]
+	mov	w1, w0
+	ldrh	w0, [x19]
+	str	w1, [x29, 104]
 	bl	ftl_vpn_decrement
-.L2447:
-	add	w20, w20, 1
-	b	.L2446
-.L2437:
-	ldr	x3, [x19, 24]
-	adrp	x0, .LANCHOR118
-	ldr	w0, [x0, #:lo12:.LANCHOR118]
+	ldr	w1, [x29, 104]
+	cmn	w22, #1
+	ccmn	w1, #1, 4, ne
+	beq	.L2551
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 14, .L2552
+	ldr	x0, [x20, 24]
+	ldrh	w1, [x19, 12]
+	ldrh	w3, [x19, 10]
+	add	w3, w3, w1
+	ldp	w1, w2, [x0, 4]
+	sub	w3, w3, #1
+	adrp	x0, .LC152
+	add	x0, x0, :lo12:.LC152
+	bl	printf
+.L2552:
+	ldr	x0, [x20, 24]
+	ldrh	w1, [x19, 12]
+	ldrh	w2, [x19, 10]
+	add	w2, w2, w1
+	ldr	w1, [x0, 8]
+	ldr	w0, [x0, 4]
+	sub	w2, w2, #1
+	bl	lpa_hash_update_ppa
+.L2548:
+	add	x23, x23, 1
+	b	.L2541
+.L2542:
+	ldrb	w3, [x25, #:lo12:.LANCHOR123]
+	ldr	x1, [x20, 8]
+	ldr	x2, [x20, 24]
+	bl	ftl_read_ppa_page
+	mov	w22, w0
+	ldr	x0, [x20, 24]
+	ldr	w0, [x0, 4]
+	bl	lpa_hash_get_ppa
+	mov	w4, w0
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 14, .L2544
+	ldr	x0, [x20, 24]
+	mov	w1, w4
+	ldr	w2, [x26, x23, lsl 2]
+	str	w4, [x29, 128]
+	ldr	w3, [x0, 4]
+	adrp	x0, .LC150
+	add	x0, x0, :lo12:.LC150
+	bl	printf
+	ldr	w4, [x29, 128]
+.L2544:
+	ldr	x2, [x28, #:lo12:.LANCHOR100]
+	ldr	w0, [x26, x23, lsl 2]
+	cmp	w4, w0
+	ldr	x0, [x20, 24]
+	ldr	w1, [x2, 8]
+	csinv	w22, w22, wzr, eq
+	cmn	w22, #1
+	add	w3, w1, 1
+	str	w3, [x2, 8]
+	str	w1, [x0]
+	mov	w1, 1
+	str	w4, [x0, 8]
+	str	w1, [x0, 12]
+	bne	.L2543
+	b	.L2546
+.L2551:
+	ldrh	w0, [x19, 6]
+	cmp	w0, 1
+	bls	.L2548
+	cmn	w22, #1
+	bne	.L2595
+	b	.L2548
+.L2531:
+	ldr	x3, [x20, 24]
+	adrp	x0, .LANCHOR120
+	ldr	w0, [x0, #:lo12:.LANCHOR120]
 	ldr	w1, [x3, 4]
 	cmp	w1, w0
-	bcs	.L2435
-	ldrb	w0, [x28, 9]
-	ldrh	w1, [x23, #:lo12:.LANCHOR80]
-	ldrh	w2, [x28, 10]
+	bcs	.L2529
+	ldrb	w0, [x19, 9]
+	ldrh	w1, [x24, #:lo12:.LANCHOR83]
+	ldrh	w2, [x19, 10]
 	mul	w0, w0, w1
 	sub	w0, w0, #1
 	cmp	w2, w0
-	bge	.L2435
-	adrp	x0, .LANCHOR97
+	bge	.L2529
+	adrp	x0, .LANCHOR100
 	ldr	w1, [x3]
-	ldr	x0, [x0, #:lo12:.LANCHOR97]
-	ldr	w5, [x0, 8]
-	cmp	w1, w5
-	bls	.L2438
+	ldr	x0, [x0, #:lo12:.LANCHOR100]
+	ldr	w4, [x0, 8]
+	cmp	w1, w4
+	bls	.L2532
 	str	w1, [x0, 8]
-.L2438:
-	ldrh	w0, [x28, 12]
+.L2532:
+	ldrh	w0, [x19, 12]
 	add	w2, w2, w0
 	ldp	w0, w1, [x3, 4]
 	bl	lpa_hash_update_ppa
-	b	.L2435
-.L2420:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 144
-	ret
+	ldr	w0, [x29, 164]
+	str	w0, [x29, 160]
+	ldr	w0, [x29, 168]
+	str	w0, [x29, 164]
+	ldr	w0, [x29, 172]
+	str	w0, [x29, 168]
+	ldr	w0, [x29, 148]
+	str	w0, [x29, 172]
+	b	.L2529
 	.size	ftl_open_sblk_recovery, .-ftl_open_sblk_recovery
 	.section	.text.pm_write_page,"ax",@progbits
 	.align	2
@@ -15037,103 +15750,379 @@ pm_write_page:
 	stp	x19, x20, [sp, 16]
 	mov	w19, w0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR80
+	adrp	x21, .LANCHOR83
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR105
+	adrp	x22, .LANCHOR107
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LANCHOR97
+	adrp	x23, .LANCHOR100
 	mov	x25, x1
-	add	x21, x21, :lo12:.LANCHOR80
+	add	x21, x21, :lo12:.LANCHOR83
 	mov	x20, x23
-	add	x22, x22, :lo12:.LANCHOR105
+	add	x22, x22, :lo12:.LANCHOR107
 	mov	w24, 65535
 	str	x27, [sp, 80]
-.L2500:
-	ldr	x0, [x23, #:lo12:.LANCHOR97]
+.L2618:
+	ldr	x0, [x23, #:lo12:.LANCHOR100]
 	ldr	w1, [x0, 48]
 	ldrh	w2, [x0, 696]
 	add	w1, w1, 1
 	str	w1, [x0, 48]
 	ldrh	w1, [x21]
 	cmp	w2, w1
-	bcs	.L2501
+	bcs	.L2619
 	ldrh	w0, [x0, 692]
 	cmp	w0, w24
-	bne	.L2502
-.L2501:
+	bne	.L2620
+.L2619:
 	bl	pm_alloc_new_blk
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2502:
-	ldr	x0, [x20, #:lo12:.LANCHOR97]
+.L2620:
+	ldr	x0, [x20, #:lo12:.LANCHOR100]
 	ldrh	w0, [x0, 692]
 	cmp	w0, w24
-	bne	.L2503
-	adrp	x1, .LANCHOR189
+	bne	.L2621
+	adrp	x1, .LANCHOR190
 	adrp	x0, .LC0
 	mov	w2, 230
-	add	x1, x1, :lo12:.LANCHOR189
+	add	x1, x1, :lo12:.LANCHOR190
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2503:
-	ldr	x0, [x20, #:lo12:.LANCHOR97]
-	adrp	x27, .LANCHOR190
+.L2621:
+	ldr	x0, [x20, #:lo12:.LANCHOR100]
+	adrp	x27, .LANCHOR191
 	ldrh	w1, [x22]
 	mov	w2, 64
 	ldrh	w26, [x0, 692]
 	ldrh	w0, [x0, 696]
 	madd	w26, w26, w1, w0
-	ldr	x0, [x27, #:lo12:.LANCHOR190]
+	ldr	x0, [x27, #:lo12:.LANCHOR191]
 	mov	w1, 0
 	bl	ftl_memset
-	ldr	x3, [x27, #:lo12:.LANCHOR190]
+	ldr	x3, [x27, #:lo12:.LANCHOR191]
 	mov	x2, x25
-	ldr	x0, [x20, #:lo12:.LANCHOR97]
+	ldr	x0, [x20, #:lo12:.LANCHOR100]
 	str	w19, [x3]
 	ldr	w1, [x0, 48]
 	ldrb	w0, [x0, 694]
 	str	w1, [x3, 4]
-	adrp	x1, .LANCHOR121
-	ldrb	w4, [x1, #:lo12:.LANCHOR121]
+	adrp	x1, .LANCHOR123
+	ldrb	w4, [x1, #:lo12:.LANCHOR123]
 	mov	w1, w26
 	bl	ftl_prog_page
-	ldr	x2, [x20, #:lo12:.LANCHOR97]
+	ldr	x2, [x20, #:lo12:.LANCHOR100]
 	ldrh	w1, [x2, 696]
 	add	w1, w1, 1
 	and	w1, w1, 65535
 	strh	w1, [x2, 696]
 	cmp	w1, 1
-	adrp	x1, .LANCHOR191
-	beq	.L2504
-	ldrb	w3, [x1, #:lo12:.LANCHOR191]
-	cbz	w3, .L2505
-.L2504:
-	strb	wzr, [x1, #:lo12:.LANCHOR191]
-	b	.L2500
-.L2505:
+	adrp	x1, .LANCHOR192
+	beq	.L2622
+	ldrb	w3, [x1, #:lo12:.LANCHOR192]
+	cbz	w3, .L2623
+.L2622:
+	strb	wzr, [x1, #:lo12:.LANCHOR192]
+	b	.L2618
+.L2623:
 	cmn	w0, #1
-	bne	.L2507
+	bne	.L2625
 	mov	w1, w26
-	adrp	x0, .LC148
-	add	x0, x0, :lo12:.LC148
+	adrp	x0, .LC153
+	add	x0, x0, :lo12:.LC153
+	bl	printf
+	b	.L2618
+.L2625:
+	ldrh	w0, [x2, 698]
+	cmp	w19, w0
+	bcs	.L2626
+	add	x19, x2, x19, uxtw 2
+	str	w26, [x19, 704]
+.L2626:
+	mov	w0, 0
+	ldr	x27, [sp, 80]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	ret
+	.size	pm_write_page, .-pm_write_page
+	.section	.text.ftl_dump_write_open_sblk,"ax",@progbits
+	.align	2
+	.global	ftl_dump_write_open_sblk
+	.type	ftl_dump_write_open_sblk, %function
+ftl_dump_write_open_sblk:
+	sub	sp, sp, #224
+	stp	x29, x30, [sp, 48]
+	add	x29, sp, 48
+	stp	x19, x20, [sp, 64]
+	and	w20, w0, 65535
+	adrp	x0, .LANCHOR6
+	stp	x21, x22, [sp, 80]
+	stp	x23, x24, [sp, 96]
+	ldrh	w0, [x0, #:lo12:.LANCHOR6]
+	stp	x25, x26, [sp, 112]
+	stp	x27, x28, [sp, 128]
+	cmp	w0, w20
+	bls	.L2631
+	adrp	x25, .LANCHOR73
+	str	x25, [x29, 136]
+	ldrb	w0, [x25, #:lo12:.LANCHOR73]
+	cbnz	w0, .L2633
+	adrp	x0, .LANCHOR70
+	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	cbz	w0, .L2631
+.L2633:
+	adrp	x0, .LANCHOR7
+	ubfiz	x14, x20, 2, 16
+	mov	x15, x0
+	ldr	x1, [x0, #:lo12:.LANCHOR7]
+	add	x1, x1, x14
+	ldrb	w1, [x1, 2]
+	and	w1, w1, 224
+	cmp	w1, 160
+	bne	.L2653
+	adrp	x0, .LANCHOR69
+	ldrb	w10, [x0, #:lo12:.LANCHOR69]
+.L2634:
+	add	x22, x29, 176
+	adrp	x23, .LANCHOR83
+	str	w10, [x29, 128]
+	mov	w0, w20
+	mov	w24, 0
+	mov	w25, 0
+	strh	w20, [x22, -32]!
+	mov	w27, 0
+	add	x1, x22, 16
+	bl	ftl_get_blk_list_in_sblk
+	ldrh	w1, [x23, #:lo12:.LANCHOR83]
+	and	w0, w0, 255
+	strb	w0, [x29, 153]
+	strb	wzr, [x29, 149]
+	strh	wzr, [x29, 146]
+	mul	w0, w0, w1
+	strh	wzr, [x29, 154]
+	strh	w0, [x29, 150]
+	ldr	x0, [x15, #:lo12:.LANCHOR7]
+	add	x1, x0, x14
+	ldr	w5, [x0, x14]
+	ldrb	w2, [x1, 2]
+	mov	w1, w20
+	ldrh	w4, [x0, x14]
+	adrp	x0, .LC154
+	ubfx	x5, x5, 11, 8
+	add	x0, x0, :lo12:.LC154
+	ubfx	x3, x2, 3, 2
+	and	w4, w4, 2047
+	ubfx	x2, x2, 5, 3
+	bl	printf
+	mov	w0, 1
+	bl	buf_alloc
+	mov	x19, x0
+	ldr	w10, [x29, 128]
+	adrp	x12, .LANCHOR107
+	add	x14, x23, :lo12:.LANCHOR83
+	add	x12, x12, :lo12:.LANCHOR107
+.L2635:
+	ldrh	w0, [x14]
+	cmp	w0, w25
+	bls	.L2641
+	lsl	w11, w25, 1
+	adrp	x26, .LC155
+	sub	w11, w11, #1
+	mov	w27, 0
+	add	x26, x26, :lo12:.LC155
+	b	.L2645
+.L2653:
+	mov	w10, 1
+	b	.L2634
+.L2643:
+	ldrh	w13, [x22, x28]
+	mov	w0, 65535
+	cmp	w13, w0
+	bne	.L2636
+.L2642:
+	add	w24, w24, 1
+	and	w24, w24, 65535
+.L2637:
+	cmp	w10, w24
+	bcs	.L2643
+	add	w27, w27, 1
+	and	w27, w27, 65535
+.L2645:
+	ldrb	w0, [x29, 153]
+	cmp	w0, w27
+	bls	.L2644
+	sxtw	x28, w27
+	mov	w24, 1
+	add	x28, x28, 8
+	lsl	x28, x28, 1
+	b	.L2637
+.L2636:
+	ldrh	w21, [x12]
+	cmp	w10, 3
+	mul	w21, w21, w13
+	bne	.L2638
+	add	w21, w25, w21
+	orr	w21, w21, w24, lsl 24
+.L2639:
+	str	w21, [x19, 40]
+	mov	w1, 1
+	stp	x12, x14, [x29, 96]
+	mov	x0, x19
+	stp	w11, w10, [x29, 116]
+	str	w13, [x29, 124]
+	bl	sblk_read_page
+	ldr	x1, [x19, 24]
+	mov	w3, w21
+	ldr	x0, [x19, 8]
+	ldr	w15, [x19, 52]
+	ldr	w13, [x29, 124]
+	ldr	w2, [x1, 12]
+	mov	w4, w15
+	str	w2, [sp, 32]
+	str	w15, [x29, 128]
+	ldr	w2, [x1, 8]
+	str	w2, [sp, 24]
+	ldr	w2, [x1, 4]
+	str	w2, [sp, 16]
+	mov	w2, w25
+	ldr	w1, [x1]
+	str	w1, [sp, 8]
+	ldr	w1, [x0, 12]
+	str	w1, [sp]
+	mov	w1, w13
+	ldp	w5, w6, [x0]
+	ldr	w7, [x0, 8]
+	mov	x0, x26
+	bl	printf
+	ldr	w15, [x29, 128]
+	ldp	w11, w10, [x29, 116]
+	cmp	w15, 512
+	ldp	x12, x14, [x29, 96]
+	bne	.L2642
+.L2641:
+	mov	w4, w24
+	mov	w3, w27
+	mov	w2, w25
+	mov	w1, w20
+	adrp	x24, .LANCHOR123
+	adrp	x0, .LC156
+	add	x0, x0, :lo12:.LC156
 	bl	printf
-	b	.L2500
-.L2507:
-	ldrh	w0, [x2, 698]
-	cmp	w19, w0
-	bcs	.L2508
-	add	x19, x2, x19, uxtw 2
-	str	w26, [x19, 704]
-.L2508:
-	mov	w0, 0
-	ldr	x27, [sp, 80]
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 96
+	ldr	x0, [x19, 8]
+	mov	w1, 0
+	ldrb	w2, [x24, #:lo12:.LANCHOR123]
+	adrp	x26, .LC157
+	adrp	x27, .LANCHOR69
+	add	x26, x26, :lo12:.LC157
+	add	x27, x27, :lo12:.LANCHOR69
+	lsl	w2, w2, 9
+	bl	ftl_memset
+	ldr	x0, [x19, 24]
+	mov	w1, 0
+	ldrb	w2, [x24, #:lo12:.LANCHOR123]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+.L2646:
+	ldrh	w0, [x23, #:lo12:.LANCHOR83]
+	cmp	w0, w25
+	bls	.L2651
+	ldr	x0, [x29, 136]
+	lsl	w28, w25, 1
+	mov	w21, 0
+	add	x0, x0, :lo12:.LANCHOR73
+	str	x0, [x29, 128]
+	b	.L2652
+.L2638:
+	cmp	w10, 2
+	bne	.L2640
+	adrp	x0, .LANCHOR69
+	add	w21, w21, w11
+	add	w21, w21, w24
+	ldrb	w3, [x0, #:lo12:.LANCHOR69]
+	orr	w21, w21, w3, lsl 24
+	b	.L2639
+.L2640:
+	add	w21, w25, w21
+	b	.L2639
+.L2644:
+	add	w8, w25, 1
+	and	w25, w8, 65535
+	b	.L2635
+.L2650:
+	mov	w2, w21
+	mov	w1, w25
+	mov	x0, x26
+	bl	printf
+	ldr	x0, [x29, 128]
+	adrp	x2, .LANCHOR107
+	ldrb	w1, [x0]
+	sxtw	x0, w21
+	cbz	w1, .L2647
+	add	x0, x0, 8
+	ldrh	w1, [x2, #:lo12:.LANCHOR107]
+	ldrh	w0, [x22, x0, lsl 1]
+	mul	w0, w0, w1
+	orr	w0, w0, w25
+	str	w0, [x19, 40]
+	mov	x0, x19
+	bl	sblk_3d_tlc_dump_prog
+.L2648:
+	add	w21, w21, 1
+	and	w21, w21, 65535
+.L2652:
+	ldrb	w0, [x29, 153]
+	cmp	w0, w21
+	bhi	.L2650
+	add	w8, w25, 1
+	and	w25, w8, 65535
+	b	.L2646
+.L2647:
+	ldrb	w1, [x27]
+	add	x0, x0, 8
+	cmp	w1, 2
+	bne	.L2649
+	ldrh	w0, [x22, x0, lsl 1]
+	ldrh	w1, [x2, #:lo12:.LANCHOR107]
+	mul	w0, w0, w1
+	orr	w0, w0, w28
+	orr	w0, w0, 33554432
+	str	w0, [x19, 40]
+	mov	x0, x19
+	bl	sblk_mlc_dump_prog
+	b	.L2648
+.L2649:
+	ldrh	w1, [x22, x0, lsl 1]
+	mov	w5, 0
+	ldrh	w0, [x2, #:lo12:.LANCHOR107]
+	ldrb	w4, [x24, #:lo12:.LANCHOR123]
+	ldr	x2, [x19, 8]
+	ldr	x3, [x19, 24]
+	mul	w1, w1, w0
+	orr	w1, w1, w25
+	str	w1, [x19, 40]
+	ubfx	x0, x1, 21, 3
+	and	w1, w1, -14680065
+	bl	flash_prog_page_en
+	b	.L2648
+.L2651:
+	mov	x0, x19
+	bl	buf_free
+	adrp	x0, .LC158
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC158
+	bl	printf
+.L2631:
+	ldp	x19, x20, [sp, 64]
+	ldp	x21, x22, [sp, 80]
+	ldp	x23, x24, [sp, 96]
+	ldp	x25, x26, [sp, 112]
+	ldp	x27, x28, [sp, 128]
+	ldp	x29, x30, [sp, 48]
+	add	sp, sp, 224
 	ret
-	.size	pm_write_page, .-pm_write_page
+	.size	ftl_dump_write_open_sblk, .-ftl_dump_write_open_sblk
 	.section	.text.flash_info_flush,"ax",@progbits
 	.align	2
 	.global	flash_info_flush
@@ -15148,33 +16137,33 @@ flash_info_flush:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2514
-	adrp	x2, .LANCHOR192
-	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR192
-	mov	w1, 250
-	add	x0, x0, :lo12:.LC84
-	bl	printf
-.L2514:
-	adrp	x23, .LANCHOR159
+	tbz	x0, 12, .L2662
+	adrp	x2, .LANCHOR193
+	adrp	x0, .LC86
+	add	x2, x2, :lo12:.LANCHOR193
+	mov	w1, 324
+	add	x0, x0, :lo12:.LC86
+	bl	printf
+.L2662:
+	adrp	x23, .LANCHOR194
 	adrp	x20, .LANCHOR26
 	mov	w2, 64
 	mov	w1, 0
-	ldr	x0, [x23, #:lo12:.LANCHOR159]
-	adrp	x21, .LANCHOR160
+	ldr	x0, [x23, #:lo12:.LANCHOR194]
+	adrp	x21, .LANCHOR195
 	adrp	x22, .LANCHOR2
-	adrp	x24, .LC150
-	adrp	x25, .LANCHOR135
+	adrp	x24, .LC160
+	adrp	x25, .LANCHOR140
 	add	x22, x22, :lo12:.LANCHOR2
-	add	x24, x24, :lo12:.LC150
-	add	x25, x25, :lo12:.LANCHOR135
+	add	x24, x24, :lo12:.LC160
+	add	x25, x25, :lo12:.LANCHOR140
 	bl	ftl_memset
-	add	x27, x21, :lo12:.LANCHOR160
+	add	x27, x21, :lo12:.LANCHOR195
 	ldr	x1, [x20, #:lo12:.LANCHOR26]
 	mov	w3, 16
 	mov	w2, 4
-	adrp	x0, .LC149
-	add	x0, x0, :lo12:.LC149
+	adrp	x0, .LC159
+	add	x0, x0, :lo12:.LC159
 	mov	w26, 0
 	bl	rknand_print_hex
 	ldr	x6, [x20, #:lo12:.LANCHOR26]
@@ -15182,9 +16171,9 @@ flash_info_flush:
 	ldr	w1, [x6, 8]
 	bl	js_hash
 	str	w0, [x6, 12]
-.L2515:
-	add	x28, x21, :lo12:.LANCHOR160
-	ldrb	w4, [x21, #:lo12:.LANCHOR160]
+.L2663:
+	add	x28, x21, :lo12:.LANCHOR195
+	ldrb	w4, [x21, #:lo12:.LANCHOR195]
 	ldrh	w19, [x22]
 	mov	x0, x24
 	mov	w1, w4
@@ -15197,7 +16186,7 @@ flash_info_flush:
 	sub	w0, w0, #1
 	cmp	w1, w0
 	ldp	w3, w4, [x29, 104]
-	blt	.L2516
+	blt	.L2664
 	ldr	x6, [x20, #:lo12:.LANCHOR26]
 	ldrb	w7, [x28, 1]
 	strh	wzr, [x28, 2]
@@ -15205,32 +16194,32 @@ flash_info_flush:
 	ldrh	w1, [x6, 16]
 	add	w0, w0, 1
 	str	w0, [x6, 4]
-	ldrb	w0, [x21, #:lo12:.LANCHOR160]
+	ldrb	w0, [x21, #:lo12:.LANCHOR195]
 	add	w1, w1, 1
 	strb	w0, [x28, 1]
 	mov	x0, x6
-	strb	w7, [x21, #:lo12:.LANCHOR160]
+	strb	w7, [x21, #:lo12:.LANCHOR195]
 	strh	w1, [x0, 16]!
 	ldr	w1, [x6, 8]
 	bl	js_hash
 	ldrh	w19, [x22]
 	str	w0, [x6, 12]
 	mul	w19, w19, w7
-.L2525:
+.L2673:
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_erase_block
-	b	.L2517
-.L2520:
+	b	.L2665
+.L2668:
 	mov	w26, 1
-	b	.L2515
-.L2516:
+	b	.L2663
+.L2664:
 	madd	w19, w19, w4, w3
-	cbz	w1, .L2525
-.L2517:
+	cbz	w1, .L2673
+.L2665:
 	ldr	x2, [x20, #:lo12:.LANCHOR26]
 	mov	w1, w19
-	ldr	x3, [x23, #:lo12:.LANCHOR159]
+	ldr	x3, [x23, #:lo12:.LANCHOR194]
 	mov	w5, 1
 	mov	w4, 4
 	ldr	w0, [x2, 4]
@@ -15244,14 +16233,14 @@ flash_info_flush:
 	ldrh	w1, [x27, 2]
 	add	w1, w1, 1
 	strh	w1, [x27, 2]
-	bne	.L2518
+	bne	.L2666
 	mov	w1, w19
-	adrp	x0, .LC151
-	add	x0, x0, :lo12:.LC151
+	adrp	x0, .LC161
+	add	x0, x0, :lo12:.LC161
 	bl	printf
-	b	.L2515
-.L2518:
-	cbz	w26, .L2520
+	b	.L2663
+.L2666:
+	cbz	w26, .L2668
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -15261,6 +16250,171 @@ flash_info_flush:
 	ldp	x29, x30, [sp], 112
 	ret
 	.size	flash_info_flush, .-flash_info_flush
+	.section	.text.flash_info_blk_init,"ax",@progbits
+	.align	2
+	.global	flash_info_blk_init
+	.type	flash_info_blk_init, %function
+flash_info_blk_init:
+	stp	x29, x30, [sp, -96]!
+	adrp	x0, .LANCHOR14
+	add	x29, sp, 0
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR26
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	str	x27, [sp, 80]
+	tbz	x0, 12, .L2675
+	ldr	x4, [x20, #:lo12:.LANCHOR26]
+	adrp	x2, .LANCHOR196
+	adrp	x0, .LC162
+	mov	w3, 2048
+	add	x2, x2, :lo12:.LANCHOR196
+	mov	w1, 50
+	add	x0, x0, :lo12:.LC162
+	bl	printf
+.L2675:
+	adrp	x21, .LANCHOR194
+	adrp	x24, .LANCHOR2
+	mov	w22, 21321
+	add	x26, x24, :lo12:.LANCHOR2
+	mov	x23, x21
+	mov	w19, 4
+	movk	w22, 0x5359, lsl 16
+.L2678:
+	ldrh	w1, [x26]
+	mov	w4, 4
+	ldr	x3, [x21, #:lo12:.LANCHOR194]
+	mov	w0, 0
+	ldr	x2, [x20, #:lo12:.LANCHOR26]
+	add	x27, x21, :lo12:.LANCHOR194
+	add	x25, x20, :lo12:.LANCHOR26
+	mul	w1, w1, w19
+	bl	flash_read_page_en
+	cmn	w0, #1
+	beq	.L2676
+	ldr	x2, [x20, #:lo12:.LANCHOR26]
+	ldr	w0, [x2]
+	cmp	w0, w22
+	beq	.L2677
+.L2676:
+	add	w19, w19, 1
+	cmp	w19, 16
+	bne	.L2678
+.L2703:
+	mov	w0, -1
+.L2674:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	ret
+.L2686:
+	ldr	x0, [x25]
+	ldr	w1, [x0]
+	cmp	w1, w22
+	bne	.L2687
+	ldr	w21, [x0, 4]
+.L2680:
+	add	x22, x19, :lo12:.LANCHOR195
+	ldrh	w0, [x24, #:lo12:.LANCHOR2]
+	ldr	x3, [x23, #:lo12:.LANCHOR194]
+	mov	w4, 4
+	ldr	x2, [x20, #:lo12:.LANCHOR26]
+	ldrb	w1, [x22, 1]
+	mul	w1, w1, w0
+	mov	w0, 0
+	bl	flash_read_page_en
+	cmn	w0, #1
+	beq	.L2681
+	ldr	x0, [x20, #:lo12:.LANCHOR26]
+	mov	w1, 21321
+	movk	w1, 0x5359, lsl 16
+	ldr	w2, [x0]
+	cmp	w2, w1
+	bne	.L2681
+	ldr	w1, [x0, 4]
+	cmp	w21, w1
+	bcs	.L2681
+	ldrb	w1, [x0, 37]
+	ldrb	w0, [x0, 36]
+	strb	w1, [x19, #:lo12:.LANCHOR195]
+	strb	w0, [x22, 1]
+.L2681:
+	ldrb	w1, [x19, #:lo12:.LANCHOR195]
+	add	x21, x19, :lo12:.LANCHOR195
+	ldr	x3, [x23, #:lo12:.LANCHOR194]
+	mov	w4, 4
+	ldr	x2, [x20, #:lo12:.LANCHOR26]
+	mov	w0, 0
+	bl	flash_get_last_written_page
+	and	w25, w0, 65535
+	add	w1, w25, 1
+	ldrb	w22, [x19, #:lo12:.LANCHOR195]
+	strh	w1, [x21, 2]
+	mov	w21, 0
+	ldrh	w1, [x24, #:lo12:.LANCHOR2]
+	mov	w24, 21321
+	movk	w24, 0x5359, lsl 16
+	mul	w22, w22, w1
+	add	w22, w22, w0, sxth
+.L2682:
+	sub	w0, w25, w21
+	sxth	w19, w0
+	tbz	w19, #31, .L2685
+	cmn	w19, #1
+	bne	.L2684
+	ldr	x0, [x20, #:lo12:.LANCHOR26]
+	ldr	w1, [x0]
+	adrp	x0, .LC163
+	add	x0, x0, :lo12:.LC163
+	bl	printf
+	b	.L2703
+.L2685:
+	ldr	x3, [x23, #:lo12:.LANCHOR194]
+	mov	w4, 4
+	ldr	x2, [x20, #:lo12:.LANCHOR26]
+	sub	w1, w22, w21
+	mov	w0, 0
+	bl	flash_read_page_en
+	cmn	w0, #1
+	beq	.L2683
+	ldr	x0, [x20, #:lo12:.LANCHOR26]
+	ldr	w0, [x0]
+	cmp	w0, w24
+	beq	.L2684
+.L2683:
+	add	w21, w21, 1
+	b	.L2682
+.L2684:
+	cmp	w21, 1
+	bls	.L2688
+	bl	flash_info_flush
+.L2688:
+	mov	w0, 0
+	b	.L2674
+.L2677:
+	adrp	x19, .LANCHOR195
+	add	x1, x19, :lo12:.LANCHOR195
+	ldrb	w3, [x2, 37]
+	mov	w4, 4
+	ldrb	w0, [x2, 36]
+	strb	w3, [x1, 1]
+	ldrh	w1, [x26]
+	ldr	x3, [x27]
+	strb	w0, [x19, #:lo12:.LANCHOR195]
+	mul	w1, w1, w0
+	mov	w0, 0
+	bl	flash_read_page_en
+	cmn	w0, #1
+	bne	.L2686
+.L2687:
+	mov	w21, 0
+	b	.L2680
+	.size	flash_info_blk_init, .-flash_info_blk_init
 	.section	.text.nand_flash_init,"ax",@progbits
 	.align	2
 	.global	nand_flash_init
@@ -15268,35 +16422,35 @@ flash_info_flush:
 nand_flash_init:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR14
 	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR14
 	mov	x19, x0
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	stp	x21, x22, [sp, 32]
+	ldr	w0, [x20, #:lo12:.LANCHOR14]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	tbz	x0, 12, .L2527
-	adrp	x2, .LANCHOR193
-	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR193
-	mov	w1, 2239
-	add	x0, x0, :lo12:.LC84
+	tbz	x0, 12, .L2705
+	adrp	x2, .LANCHOR197
+	adrp	x0, .LC86
+	add	x2, x2, :lo12:.LANCHOR197
+	mov	w1, 2459
+	add	x0, x0, :lo12:.LC86
 	bl	printf
-.L2527:
-	adrp	x0, .LANCHOR155
+.L2705:
+	adrp	x0, .LANCHOR160
 	adrp	x23, .LANCHOR16
 	adrp	x22, .LANCHOR41
 	add	x24, x22, :lo12:.LANCHOR41
-	str	wzr, [x0, #:lo12:.LANCHOR155]
+	str	wzr, [x0, #:lo12:.LANCHOR160]
 	mov	x0, x19
 	bl	nandc_init
-	adrp	x19, .LANCHOR34
-	add	x0, x19, :lo12:.LANCHOR34
+	adrp	x19, .LANCHOR30
+	add	x0, x19, :lo12:.LANCHOR30
 	mov	x25, x24
 	str	x0, [x23, #:lo12:.LANCHOR16]
 	adrp	x0, .LANCHOR18
 	mov	w1, 1
-	mov	w20, 0
+	mov	w21, 0
 	mov	w26, 44
 	strb	w1, [x0, #:lo12:.LANCHOR18]
 	mov	w2, 8
@@ -15306,22 +16460,22 @@ nand_flash_init:
 	bl	ftl_memset
 	mov	w2, 32
 	mov	w1, 0
-	adrp	x0, .LANCHOR136
-	add	x0, x0, :lo12:.LANCHOR136
+	adrp	x0, .LANCHOR141
+	add	x0, x0, :lo12:.LANCHOR141
 	bl	ftl_memset
-.L2533:
+.L2711:
 	mov	x1, x24
-	mov	w0, w20
+	mov	w0, w21
 	bl	flash_read_id
-	cbnz	w20, .L2528
+	cbnz	w21, .L2706
 	ldrb	w0, [x25]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bls	.L2529
-.L2531:
+	bls	.L2707
+.L2709:
 	mov	w19, -2
-.L2526:
+.L2704:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -15329,326 +16483,344 @@ nand_flash_init:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2529:
+.L2707:
 	ldrb	w0, [x25, 1]
 	cmp	w0, 255
-	beq	.L2531
-.L2528:
+	beq	.L2709
+.L2706:
 	ldrb	w0, [x24]
 	cmp	w0, 181
-	bne	.L2532
+	bne	.L2710
 	strb	w26, [x24]
-.L2532:
-	add	w20, w20, 1
+.L2710:
+	add	w21, w21, 1
 	add	x24, x24, 8
-	and	w20, w20, 255
-	cmp	w20, 4
-	bne	.L2533
-	adrp	x0, .LANCHOR194
-	add	x8, x0, :lo12:.LANCHOR194
+	and	w21, w21, 255
+	cmp	w21, 4
+	bne	.L2711
+	adrp	x0, .LANCHOR198
+	add	x8, x0, :lo12:.LANCHOR198
 	add	x8, x8, 1
 	mov	x7, x0
 	add	x12, x22, :lo12:.LANCHOR41
 	mov	x10, 0
-.L2536:
+.L2714:
 	ldrb	w2, [x8, -1]
 	mov	w11, w10
 	lsl	x24, x10, 5
 	mov	x1, x12
 	mov	x0, x8
 	bl	flash_mem_cmp8
-	cbnz	w0, .L2534
-	add	x0, x7, :lo12:.LANCHOR194
+	cbnz	w0, .L2712
+	add	x0, x7, :lo12:.LANCHOR198
 	ubfiz	x11, x11, 5, 32
 	add	x24, x0, x24
 	add	x0, x0, x11
-	adrp	x1, .LANCHOR195
-	add	x4, x1, :lo12:.LANCHOR195
+	adrp	x1, .LANCHOR199
+	add	x4, x1, :lo12:.LANCHOR199
 	ldrb	w3, [x0, 22]
 	mov	x0, 0
-.L2535:
+.L2713:
 	lsl	x5, x0, 5
 	mov	w2, w0
 	ldrb	w5, [x5, x4]
 	cmp	w5, w3
-	beq	.L2537
+	beq	.L2715
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L2535
+	bne	.L2713
 	mov	w2, w0
-.L2537:
+.L2715:
 	ubfiz	x0, x2, 5, 32
-	add	x1, x1, :lo12:.LANCHOR195
+	add	x1, x1, :lo12:.LANCHOR199
 	add	x1, x1, x0
 	mov	w2, 32
 	adrp	x0, .LANCHOR19
 	add	x0, x0, :lo12:.LANCHOR19
 	bl	ftl_memcpy
-	add	x20, x19, :lo12:.LANCHOR34
+	add	x21, x19, :lo12:.LANCHOR30
 	mov	x1, x24
 	adrp	x24, .LANCHOR27
 	mov	w2, 32
-	mov	x0, x20
+	mov	x0, x21
 	bl	ftl_memcpy
 	ldrb	w0, [x24, #:lo12:.LANCHOR27]
 	cmp	w0, 8
-	bhi	.L2538
-	ldrb	w1, [x20, 20]
+	bhi	.L2716
+	ldrb	w1, [x21, 20]
 	cmp	w1, 60
-	bls	.L2539
+	bls	.L2717
 	mov	w1, 60
-	strb	w1, [x20, 20]
-.L2539:
+	strb	w1, [x21, 20]
+.L2717:
 	cmp	w0, 8
-	bne	.L2538
+	bne	.L2716
 	ldrb	w0, [x22, #:lo12:.LANCHOR41]
 	mov	w1, 137
 	cmp	w0, 44
 	ccmp	w0, w1, 4, ne
-	bne	.L2538
-	add	x0, x19, :lo12:.LANCHOR34
+	bne	.L2716
+	add	x0, x19, :lo12:.LANCHOR30
 	ldrb	w1, [x0, 28]
 	cmp	w1, 3
-	bne	.L2538
+	bne	.L2716
 	strb	wzr, [x0, 28]
-.L2538:
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2540
-	adrp	x2, .LANCHOR193
-	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR193
-	mov	w1, 2264
-	add	x0, x0, :lo12:.LC84
+.L2716:
+	ldr	w0, [x20, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2718
+	adrp	x2, .LANCHOR197
+	adrp	x0, .LC86
+	add	x2, x2, :lo12:.LANCHOR197
+	mov	w1, 2484
+	add	x0, x0, :lo12:.LC86
 	bl	printf
-.L2540:
+.L2718:
 	mov	w0, 16384
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR162
+	adrp	x1, .LANCHOR164
 	adrp	x22, .LANCHOR26
-	add	x20, x19, :lo12:.LANCHOR34
-	str	x0, [x1, #:lo12:.LANCHOR162]
+	add	x21, x19, :lo12:.LANCHOR30
+	str	x0, [x1, #:lo12:.LANCHOR164]
 	mov	w0, 16384
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR151
-	str	x0, [x1, #:lo12:.LANCHOR151]
+	adrp	x1, .LANCHOR156
+	str	x0, [x1, #:lo12:.LANCHOR156]
 	mov	w0, 2048
 	bl	ftl_malloc
 	str	x0, [x22, #:lo12:.LANCHOR26]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR161
-	str	x0, [x1, #:lo12:.LANCHOR161]
+	adrp	x1, .LANCHOR163
+	str	x0, [x1, #:lo12:.LANCHOR163]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR153
-	str	x0, [x1, #:lo12:.LANCHOR153]
+	adrp	x1, .LANCHOR158
+	str	x0, [x1, #:lo12:.LANCHOR158]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR159
-	str	x0, [x1, #:lo12:.LANCHOR159]
-	adrp	x0, .LANCHOR196
-	strb	wzr, [x0, #:lo12:.LANCHOR196]
+	adrp	x1, .LANCHOR194
+	str	x0, [x1, #:lo12:.LANCHOR194]
+	adrp	x0, .LANCHOR200
+	strb	wzr, [x0, #:lo12:.LANCHOR200]
 	bl	flash_die_info_init
-	ldrb	w0, [x20, 18]
+	ldrb	w0, [x21, 18]
 	bl	flash_lsb_page_tbl_build
-	ldrb	w0, [x20, 20]
-	adrp	x20, .LANCHOR157
+	ldrb	w0, [x21, 20]
+	adrp	x21, .LANCHOR162
 	bl	nandc_bch_sel
-	str	xzr, [x20, #:lo12:.LANCHOR157]
+	str	xzr, [x21, #:lo12:.LANCHOR162]
 	ldr	x1, [x23, #:lo12:.LANCHOR16]
 	adrp	x23, .LANCHOR42
 	ldrh	w0, [x1, 16]
+	ldrb	w1, [x1, 28]
 	ubfx	x2, x0, 8, 3
 	strb	w2, [x23, #:lo12:.LANCHOR42]
-	adrp	x2, .LANCHOR166
+	adrp	x2, .LANCHOR168
 	ubfx	x3, x0, 3, 1
-	strb	w3, [x2, #:lo12:.LANCHOR166]
+	strb	w3, [x2, #:lo12:.LANCHOR168]
 	adrp	x2, .LANCHOR38
 	ubfx	x3, x0, 4, 1
 	strb	w3, [x2, #:lo12:.LANCHOR38]
-	adrp	x2, .LANCHOR70
+	adrp	x2, .LANCHOR73
 	ubfx	x3, x0, 12, 1
-	strb	w3, [x2, #:lo12:.LANCHOR70]
-	adrp	x2, .LANCHOR104
+	strb	w3, [x2, #:lo12:.LANCHOR73]
+	adrp	x2, .LANCHOR70
 	ubfx	x3, x0, 13, 1
-	ubfx	x0, x0, 14, 1
-	strb	w3, [x2, #:lo12:.LANCHOR104]
+	strb	w3, [x2, #:lo12:.LANCHOR70]
 	adrp	x2, .LANCHOR1
-	strb	w0, [x2, #:lo12:.LANCHOR1]
+	ubfx	x3, x0, 14, 1
+	lsr	w0, w0, 15
+	strb	w3, [x2, #:lo12:.LANCHOR1]
+	adrp	x2, .LANCHOR71
+	strb	w0, [x2, #:lo12:.LANCHOR71]
+	adrp	x0, .LANCHOR0
 	mov	w2, 60
-	ldrb	w0, [x1, 28]
-	adrp	x1, .LANCHOR0
-	strb	w0, [x1, #:lo12:.LANCHOR0]
-	adrp	x1, .LANCHOR17
-	strb	w2, [x1, #:lo12:.LANCHOR17]
+	strb	w1, [x0, #:lo12:.LANCHOR0]
+	adrp	x0, .LANCHOR17
+	strb	w2, [x0, #:lo12:.LANCHOR17]
 	ldrb	w2, [x24, #:lo12:.LANCHOR27]
 	cmp	w2, 9
-	bne	.L2541
+	bne	.L2719
 	mov	w2, 70
-	strb	w2, [x1, #:lo12:.LANCHOR17]
-.L2541:
-	add	x19, x19, :lo12:.LANCHOR34
-	adrp	x1, .LANCHOR168
+	strb	w2, [x0, #:lo12:.LANCHOR17]
+.L2719:
+	adrp	x0, .LANCHOR49
+	strb	w1, [x0, #:lo12:.LANCHOR49]
+	add	x1, x19, :lo12:.LANCHOR30
+	ldrb	w1, [x1, 7]
+	cmp	w1, 9
+	bne	.L2720
+	strb	wzr, [x0, #:lo12:.LANCHOR49]
+.L2720:
+	add	x19, x19, :lo12:.LANCHOR30
 	adrp	x25, .LANCHOR23
-	strb	w0, [x1, #:lo12:.LANCHOR168]
 	ldrh	w1, [x19, 16]
 	ldrb	w0, [x19, 19]
 	strb	w0, [x25, #:lo12:.LANCHOR23]
-	tbz	x1, 6, .L2542
+	tbz	x1, 6, .L2722
 	sub	w1, w0, #17
 	and	w1, w1, 255
 	cmp	w1, 2
-	bhi	.L2543
-	adrp	x0, micron_read_retrial
+	ccmp	w0, 21, 4, hi
+	bne	.L2723
+	adrp	x1, micron_read_retrial
+	add	x1, x1, :lo12:micron_read_retrial
+	str	x1, [x21, #:lo12:.LANCHOR162]
+	cmp	w0, 21
+	adrp	x0, .LANCHOR159
+	beq	.L2724
 	mov	w1, 15
-	add	x0, x0, :lo12:micron_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR157]
-.L2593:
-	adrp	x0, .LANCHOR154
-	strb	w1, [x0, #:lo12:.LANCHOR154]
-	b	.L2542
-.L2534:
+.L2771:
+	strb	w1, [x0, #:lo12:.LANCHOR159]
+	b	.L2722
+.L2712:
 	add	x10, x10, 1
 	add	x8, x8, 32
-	cmp	x10, 36
-	bne	.L2536
-	b	.L2531
-.L2543:
+	cmp	x10, 38
+	bne	.L2714
+	b	.L2709
+.L2724:
+	mov	w1, 4
+	b	.L2771
+.L2723:
 	sub	w1, w0, #65
 	cmp	w0, 33
 	and	w1, w1, 255
 	ccmp	w1, 1, 0, ne
-	bhi	.L2544
+	bhi	.L2726
 	adrp	x0, toshiba_read_retrial
 	add	x0, x0, :lo12:toshiba_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR157]
+	str	x0, [x21, #:lo12:.LANCHOR162]
 	adrp	x0, .LANCHOR25
 	mov	w1, 4
 	strb	w1, [x0, #:lo12:.LANCHOR25]
-.L2592:
+.L2773:
 	mov	w1, 7
-	b	.L2593
-.L2544:
+	adrp	x0, .LANCHOR159
+	b	.L2771
+.L2726:
 	sub	w2, w0, #34
 	sub	w1, w0, #67
 	and	w2, w2, 255
 	and	w1, w1, 255
 	cmp	w2, 1
 	ccmp	w1, 1, 0, hi
-	bhi	.L2545
+	bhi	.L2727
 	adrp	x2, toshiba_read_retrial
 	add	x2, x2, :lo12:toshiba_read_retrial
-	str	x2, [x20, #:lo12:.LANCHOR157]
+	str	x2, [x21, #:lo12:.LANCHOR162]
 	cmp	w0, 35
 	mov	w2, 68
 	ccmp	w0, w2, 4, ne
-	adrp	x0, .LANCHOR154
-	beq	.L2546
+	adrp	x0, .LANCHOR159
+	beq	.L2728
 	mov	w2, 7
-.L2591:
-	strb	w2, [x0, #:lo12:.LANCHOR154]
+.L2770:
+	strb	w2, [x0, #:lo12:.LANCHOR159]
 	cmp	w1, 1
 	adrp	x0, .LANCHOR25
-	bhi	.L2548
+	bhi	.L2730
 	mov	w1, 4
-.L2594:
+.L2772:
 	strb	w1, [x0, #:lo12:.LANCHOR25]
-.L2542:
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2549
-	adrp	x2, .LANCHOR193
-	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR193
-	mov	w1, 2312
-	add	x0, x0, :lo12:.LC84
+.L2722:
+	ldr	w0, [x20, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2731
+	adrp	x2, .LANCHOR197
+	adrp	x0, .LC86
+	add	x2, x2, :lo12:.LANCHOR197
+	mov	w1, 2537
+	add	x0, x0, :lo12:.LC86
 	bl	printf
-.L2549:
+.L2731:
 	adrp	x24, .LANCHOR20
 	ldrb	w0, [x23, #:lo12:.LANCHOR42]
 	strb	wzr, [x24, #:lo12:.LANCHOR20]
-	tbz	x0, 0, .L2550
+	tbz	x0, 0, .L2732
 	mov	w0, 4
 	bl	nandc_set_if_mode
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
-.L2595:
+.L2774:
 	bl	nandc_set_if_mode
 	bl	flash_info_blk_init
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L2552
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2553
-	adrp	x2, .LANCHOR193
-	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR193
-	mov	w1, 2347
-	add	x0, x0, :lo12:.LC84
+	bne	.L2734
+	ldr	w0, [x20, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2735
+	adrp	x2, .LANCHOR197
+	adrp	x0, .LC86
+	add	x2, x2, :lo12:.LANCHOR197
+	mov	w1, 2568
+	add	x0, x0, :lo12:.LC86
 	bl	printf
-.L2553:
+.L2735:
 	ldr	x0, [x22, #:lo12:.LANCHOR26]
 	mov	w1, 17
 	strb	w1, [x0, 32]
-	b	.L2526
-.L2546:
+	mov	w0, 0
+	bl	zftl_flash_exit_slc_mode
+	b	.L2704
+.L2728:
 	mov	w2, 17
-	b	.L2591
-.L2548:
+	b	.L2770
+.L2730:
 	mov	w1, 5
-	b	.L2594
-.L2545:
+	b	.L2772
+.L2727:
 	sub	w0, w0, #36
 	and	w0, w0, 255
 	cmp	w0, 1
-	bhi	.L2542
+	bhi	.L2722
 	adrp	x0, toshiba_3d_read_retrial
 	add	x0, x0, :lo12:toshiba_3d_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR157]
-	b	.L2592
-.L2550:
+	str	x0, [x21, #:lo12:.LANCHOR162]
+	b	.L2773
+.L2732:
 	mov	w0, 4
-	b	.L2595
-.L2552:
+	b	.L2774
+.L2734:
 	ldrb	w0, [x25, #:lo12:.LANCHOR23]
 	sub	w0, w0, #1
 	and	w0, w0, 255
-	cmp	w0, 6
-	bhi	.L2554
+	cmp	w0, 7
+	bhi	.L2736
 	adrp	x0, hynix_read_retrial
 	add	x0, x0, :lo12:hynix_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR157]
-.L2554:
+	str	x0, [x21, #:lo12:.LANCHOR162]
+.L2736:
 	ldrb	w0, [x23, #:lo12:.LANCHOR42]
-	tbz	x0, 2, .L2556
+	tbz	x0, 2, .L2738
 	ldr	x0, [x22, #:lo12:.LANCHOR26]
 	ldrb	w0, [x0, 19]
-	cbz	w0, .L2556
-	adrp	x0, .LANCHOR160
-	ldrb	w1, [x0, #:lo12:.LANCHOR160]
+	cbz	w0, .L2738
+	adrp	x0, .LANCHOR195
+	ldrb	w1, [x0, #:lo12:.LANCHOR195]
 	adrp	x0, .LANCHOR2
 	ldrh	w0, [x0, #:lo12:.LANCHOR2]
 	mul	w1, w1, w0
 	mov	w0, 0
 	bl	flash_ddr_para_scan
 	ldrb	w0, [x24, #:lo12:.LANCHOR20]
-	cbnz	w0, .L2556
+	cbnz	w0, .L2738
 	ldr	x0, [x22, #:lo12:.LANCHOR26]
 	strb	wzr, [x0, 19]
 	bl	flash_info_flush
-.L2556:
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2558
-	adrp	x2, .LANCHOR193
-	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR193
-	mov	w1, 2404
-	add	x0, x0, :lo12:.LC84
+.L2738:
+	ldr	w0, [x20, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2740
+	adrp	x2, .LANCHOR197
+	adrp	x0, .LC86
+	add	x2, x2, :lo12:.LANCHOR197
+	mov	w1, 2634
+	add	x0, x0, :lo12:.LC86
 	bl	printf
-.L2558:
+.L2740:
 	bl	nand_flash_print_info
 	mov	w19, 0
-	b	.L2526
+	b	.L2704
 	.size	nand_flash_init, .-nand_flash_init
 	.section	.text.ftl_sysblk_dump,"ax",@progbits
 	.align	2
@@ -15665,31 +16837,31 @@ ftl_sysblk_dump:
 	stp	x25, x26, [sp, 112]
 	mov	w0, 1
 	stp	x27, x28, [sp, 128]
-	adrp	x26, .LANCHOR80
+	adrp	x26, .LANCHOR83
 	stp	x21, x22, [sp, 80]
 	bl	buf_alloc
 	ldr	x24, [x0, 8]
-	adrp	x27, .LANCHOR105
-	adrp	x28, .LANCHOR121
+	adrp	x27, .LANCHOR107
+	adrp	x28, .LANCHOR123
 	mov	x25, x0
-	add	x26, x26, :lo12:.LANCHOR80
-	add	x27, x27, :lo12:.LANCHOR105
-	add	x28, x28, :lo12:.LANCHOR121
+	add	x26, x26, :lo12:.LANCHOR83
+	add	x27, x27, :lo12:.LANCHOR107
+	add	x28, x28, :lo12:.LANCHOR123
 	mov	w19, 0
-.L2597:
+.L2776:
 	ldrh	w0, [x26]
 	cmp	w0, w19
-	bhi	.L2599
+	bhi	.L2778
 	mov	x0, x25
 	bl	buf_free
-	cbz	w20, .L2600
-	adrp	x1, .LANCHOR197
+	cbz	w20, .L2779
+	adrp	x1, .LANCHOR201
 	adrp	x0, .LC0
 	mov	w2, 1338
-	add	x1, x1, :lo12:.LANCHOR197
+	add	x1, x1, :lo12:.LANCHOR201
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2600:
+.L2779:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
@@ -15699,7 +16871,7 @@ ftl_sysblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 144
 	ret
-.L2599:
+.L2778:
 	ldrh	w21, [x27]
 	ldrb	w3, [x28]
 	ldr	x1, [x25, 8]
@@ -15728,19 +16900,19 @@ ftl_sysblk_dump:
 	mov	w1, w23
 	ldp	w5, w6, [x0]
 	ldr	w7, [x0, 8]
-	adrp	x0, .LC152
-	add	x0, x0, :lo12:.LC152
+	adrp	x0, .LC155
+	add	x0, x0, :lo12:.LC155
 	bl	printf
 	mov	w3, 32
 	mov	w2, 4
 	add	x1, x24, 704
-	adrp	x0, .LC153
-	add	x0, x0, :lo12:.LC153
+	adrp	x0, .LC164
+	add	x0, x0, :lo12:.LC164
 	bl	rknand_print_hex
 	cmp	w22, 512
 	ccmn	w22, #1, 4, ne
 	csinc	w20, w20, wzr, ne
-	b	.L2597
+	b	.L2776
 	.size	ftl_sysblk_dump, .-ftl_sysblk_dump
 	.section	.text.dump_ftl_info,"ax",@progbits
 	.align	2
@@ -15748,35 +16920,35 @@ ftl_sysblk_dump:
 	.type	dump_ftl_info, %function
 dump_ftl_info:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LANCHOR51
+	adrp	x0, .LANCHOR52
 	add	x29, sp, 0
-	ldrb	w1, [x0, #:lo12:.LANCHOR51]
-	adrp	x0, .LC154
+	ldrb	w1, [x0, #:lo12:.LANCHOR52]
+	adrp	x0, .LC165
 	stp	x19, x20, [sp, 16]
-	add	x0, x0, :lo12:.LC154
+	add	x0, x0, :lo12:.LC165
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR97
+	adrp	x22, .LANCHOR100
 	adrp	x19, .LANCHOR10
-	adrp	x20, .LANCHOR80
+	adrp	x20, .LANCHOR83
 	bl	printf
 	adrp	x21, .LANCHOR6
-	adrp	x0, .LANCHOR178
-	add	x1, x0, :lo12:.LANCHOR178
+	adrp	x0, .LANCHOR179
+	add	x1, x0, :lo12:.LANCHOR179
 	ldrh	w3, [x1, 2]
 	ldrb	w2, [x1, 1]
-	ldrb	w1, [x0, #:lo12:.LANCHOR178]
-	adrp	x0, .LC155
-	add	x0, x0, :lo12:.LC155
+	ldrb	w1, [x0, #:lo12:.LANCHOR179]
+	adrp	x0, .LC166
+	add	x0, x0, :lo12:.LC166
 	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR97]
+	ldr	x0, [x22, #:lo12:.LANCHOR100]
 	ldrh	w2, [x0, 140]
 	ldrh	w1, [x0, 130]
-	adrp	x0, .LC156
-	add	x0, x0, :lo12:.LC156
+	adrp	x0, .LC167
+	add	x0, x0, :lo12:.LC167
 	bl	printf
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
-	adrp	x0, .LC157
-	add	x0, x0, :lo12:.LC157
+	adrp	x0, .LC168
+	add	x0, x0, :lo12:.LC168
 	ldrh	w5, [x1, 26]
 	ldrh	w4, [x1, 22]
 	ldrb	w3, [x1, 21]
@@ -15784,8 +16956,8 @@ dump_ftl_info:
 	ldrh	w1, [x1, 16]
 	bl	printf
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
-	adrp	x0, .LC158
-	add	x0, x0, :lo12:.LC158
+	adrp	x0, .LC169
+	add	x0, x0, :lo12:.LC169
 	ldrh	w5, [x1, 58]
 	ldrh	w4, [x1, 54]
 	ldrb	w3, [x1, 53]
@@ -15793,36 +16965,36 @@ dump_ftl_info:
 	ldrh	w1, [x1, 48]
 	bl	printf
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
-	adrp	x19, .LANCHOR73
-	adrp	x0, .LC159
-	add	x0, x0, :lo12:.LC159
+	adrp	x19, .LANCHOR76
+	adrp	x0, .LC170
+	add	x0, x0, :lo12:.LC170
 	ldrh	w5, [x1, 90]
 	ldrh	w4, [x1, 86]
 	ldrb	w3, [x1, 85]
 	ldrh	w2, [x1, 82]
 	ldrh	w1, [x1, 80]
 	bl	printf
-	ldrb	w0, [x19, #:lo12:.LANCHOR73]
+	ldrb	w0, [x19, #:lo12:.LANCHOR76]
 	mov	w2, 4
-	ldrh	w3, [x20, #:lo12:.LANCHOR80]
+	ldrh	w3, [x20, #:lo12:.LANCHOR83]
 	mul	w3, w3, w0
-	adrp	x0, .LANCHOR111
-	ldr	x1, [x0, #:lo12:.LANCHOR111]
-	adrp	x0, .LC160
+	adrp	x0, .LANCHOR113
+	ldr	x1, [x0, #:lo12:.LANCHOR113]
+	adrp	x0, .LC171
 	lsl	w3, w3, 1
-	add	x0, x0, :lo12:.LC160
+	add	x0, x0, :lo12:.LC171
 	bl	rknand_print_hex
 	adrp	x0, .LANCHOR9
 	ldrh	w3, [x21, #:lo12:.LANCHOR6]
 	mov	w2, 2
 	ldr	x1, [x0, #:lo12:.LANCHOR9]
-	adrp	x0, .LC161
-	add	x0, x0, :lo12:.LC161
+	adrp	x0, .LC172
+	add	x0, x0, :lo12:.LC172
 	bl	rknand_print_hex
-	ldr	x1, [x22, #:lo12:.LANCHOR97]
+	ldr	x1, [x22, #:lo12:.LANCHOR100]
 	mov	w2, 4
-	adrp	x0, .LC153
-	add	x0, x0, :lo12:.LC153
+	adrp	x0, .LC164
+	add	x0, x0, :lo12:.LC164
 	add	x1, x1, 704
 	ldrh	w3, [x1, -6]
 	bl	rknand_print_hex
@@ -15830,28 +17002,28 @@ dump_ftl_info:
 	ldrh	w3, [x21, #:lo12:.LANCHOR6]
 	mov	w2, 4
 	ldr	x1, [x0, #:lo12:.LANCHOR7]
-	adrp	x0, .LC162
-	add	x0, x0, :lo12:.LC162
+	adrp	x0, .LC173
+	add	x0, x0, :lo12:.LC173
 	bl	rknand_print_hex
 	mov	w3, 256
 	mov	w2, 2
-	adrp	x1, .LANCHOR110
-	adrp	x0, .LC163
-	add	x1, x1, :lo12:.LANCHOR110
-	add	x0, x0, :lo12:.LC163
+	adrp	x1, .LANCHOR112
+	adrp	x0, .LC174
+	add	x1, x1, :lo12:.LANCHOR112
+	add	x0, x0, :lo12:.LC174
 	bl	rknand_print_hex
-	ldrb	w0, [x19, #:lo12:.LANCHOR73]
+	ldrb	w0, [x19, #:lo12:.LANCHOR76]
 	mov	w2, 2
-	ldrh	w3, [x20, #:lo12:.LANCHOR80]
+	ldrh	w3, [x20, #:lo12:.LANCHOR83]
 	ldp	x21, x22, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	mul	w3, w3, w0
-	adrp	x0, .LANCHOR112
+	adrp	x0, .LANCHOR114
 	ldp	x29, x30, [sp], 48
 	lsl	w3, w3, 1
-	ldr	x1, [x0, #:lo12:.LANCHOR112]
-	adrp	x0, .LC164
-	add	x0, x0, :lo12:.LC164
+	ldr	x1, [x0, #:lo12:.LANCHOR114]
+	adrp	x0, .LC175
+	add	x0, x0, :lo12:.LC175
 	b	rknand_print_hex
 	.size	dump_ftl_info, .-dump_ftl_info
 	.section	.text.pm_ppa_update_check,"ax",@progbits
@@ -15859,17 +17031,17 @@ dump_ftl_info:
 	.global	pm_ppa_update_check
 	.type	pm_ppa_update_check, %function
 pm_ppa_update_check:
-	adrp	x3, .LANCHOR99
+	adrp	x3, .LANCHOR102
 	mov	w4, 21
-	ldrh	w3, [x3, #:lo12:.LANCHOR99]
+	ldrh	w3, [x3, #:lo12:.LANCHOR102]
 	sub	w5, w4, w3
 	mov	w4, 1
 	lsr	w3, w2, w3
 	lsl	w4, w4, w5
 	sub	w4, w4, #1
 	and	w4, w4, w3
-	adrp	x3, .LANCHOR98
-	ldrb	w3, [x3, #:lo12:.LANCHOR98]
+	adrp	x3, .LANCHOR101
+	ldrb	w3, [x3, #:lo12:.LANCHOR101]
 	udiv	w4, w4, w3
 	adrp	x3, .LANCHOR7
 	ldr	x3, [x3, #:lo12:.LANCHOR7]
@@ -15878,20 +17050,20 @@ pm_ppa_update_check:
 	ubfx	x3, x3, 5, 3
 	cmp	w3, 1
 	ccmp	w3, 7, 4, ne
-	bne	.L2611
+	bne	.L2790
 	stp	x29, x30, [sp, -16]!
 	mov	w3, w2
 	mov	w2, w1
 	mov	x1, x0
 	add	x29, sp, 0
-	adrp	x0, .LC165
-	add	x0, x0, :lo12:.LC165
+	adrp	x0, .LC176
+	add	x0, x0, :lo12:.LC176
 	bl	printf
 	bl	dump_ftl_info
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
-.L2611:
+.L2790:
 	mov	w0, 0
 	ret
 	.size	pm_ppa_update_check, .-pm_ppa_update_check
@@ -15907,113 +17079,113 @@ load_l2p_region:
 	and	w19, w0, 65535
 	stp	x23, x24, [sp, 48]
 	cmp	w20, 31
-	bls	.L2617
-	adrp	x1, .LANCHOR198
+	bls	.L2796
+	adrp	x1, .LANCHOR202
 	adrp	x0, .LC0
 	mov	w2, 31
-	add	x1, x1, :lo12:.LANCHOR198
+	add	x1, x1, :lo12:.LANCHOR202
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2617:
-	adrp	x22, .LANCHOR97
-	ldr	x0, [x22, #:lo12:.LANCHOR97]
+.L2796:
+	adrp	x22, .LANCHOR100
+	ldr	x0, [x22, #:lo12:.LANCHOR100]
 	ldrh	w2, [x0, 698]
 	cmp	w2, w19
-	bcs	.L2618
+	bcs	.L2797
 	mov	w1, w19
-	adrp	x0, .LC166
-	add	x0, x0, :lo12:.LC166
+	adrp	x0, .LC177
+	add	x0, x0, :lo12:.LC177
 	bl	printf
-	adrp	x0, .LANCHOR199
+	adrp	x0, .LANCHOR203
 	mov	w1, 255
-	ldrh	w2, [x0, #:lo12:.LANCHOR199]
+	ldrh	w2, [x0, #:lo12:.LANCHOR203]
 	mov	x0, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	ldr	x0, [x22, #:lo12:.LANCHOR97]
+	ldr	x0, [x22, #:lo12:.LANCHOR100]
 	ldrh	w0, [x0, 698]
 	cmp	w0, w19
-	bcs	.L2620
+	bcs	.L2799
 	mov	w2, 35
-.L2625:
-	adrp	x1, .LANCHOR198
+.L2804:
+	adrp	x1, .LANCHOR202
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR198
+	add	x1, x1, :lo12:.LANCHOR202
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L2620
-.L2618:
+	b	.L2799
+.L2797:
 	add	x0, x0, x19, sxtw 2
 	sbfiz	x20, x20, 4, 32
 	ldr	w21, [x0, 704]
-	adrp	x0, .LANCHOR130
-	add	x0, x0, :lo12:.LANCHOR130
+	adrp	x0, .LANCHOR132
+	add	x0, x0, :lo12:.LANCHOR132
 	add	x23, x0, x20
 	strh	w19, [x0, x20]
 	strh	wzr, [x23, 2]
-	cbnz	w21, .L2621
+	cbnz	w21, .L2800
 	mov	w2, 0
 	mov	w1, w19
-	adrp	x0, .LC167
-	add	x0, x0, :lo12:.LC167
+	adrp	x0, .LC178
+	add	x0, x0, :lo12:.LC178
 	bl	printf
-	adrp	x0, .LANCHOR199
+	adrp	x0, .LANCHOR203
 	mov	w1, 255
-	ldrh	w2, [x0, #:lo12:.LANCHOR199]
+	ldrh	w2, [x0, #:lo12:.LANCHOR203]
 	ldr	x0, [x23, 8]
 	bl	ftl_memset
-.L2620:
+.L2799:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2621:
-	adrp	x20, .LANCHOR190
-	adrp	x24, .LANCHOR121
+.L2800:
+	adrp	x20, .LANCHOR191
+	adrp	x24, .LANCHOR123
 	ldr	x1, [x23, 8]
 	mov	w0, w21
-	ldr	x2, [x20, #:lo12:.LANCHOR190]
-	ldrb	w3, [x24, #:lo12:.LANCHOR121]
+	ldr	x2, [x20, #:lo12:.LANCHOR191]
+	ldrb	w3, [x24, #:lo12:.LANCHOR123]
 	bl	ftl_read_ppa_page
-	ldr	x1, [x20, #:lo12:.LANCHOR190]
+	ldr	x1, [x20, #:lo12:.LANCHOR191]
 	ldr	w2, [x1]
 	cmp	w2, w19
-	beq	.L2622
+	beq	.L2801
 	mov	w4, w21
 	mov	w3, w0
 	mov	w1, w19
-	adrp	x0, .LC168
-	add	x0, x0, :lo12:.LC168
+	adrp	x0, .LC179
+	add	x0, x0, :lo12:.LC179
 	bl	printf
-	ldr	x1, [x22, #:lo12:.LANCHOR97]
+	ldr	x1, [x22, #:lo12:.LANCHOR100]
 	mov	w2, 4
-	adrp	x0, .LC169
-	add	x0, x0, :lo12:.LC169
+	adrp	x0, .LC180
+	add	x0, x0, :lo12:.LC180
 	add	x1, x1, 704
 	ldrh	w3, [x1, -6]
 	bl	rknand_print_hex
 	ldr	x1, [x23, 8]
 	mov	w2, 4
-	ldrb	w3, [x24, #:lo12:.LANCHOR121]
-	adrp	x0, .LC170
-	add	x0, x0, :lo12:.LC170
+	ldrb	w3, [x24, #:lo12:.LANCHOR123]
+	adrp	x0, .LC181
+	add	x0, x0, :lo12:.LC181
 	lsl	w3, w3, 7
 	bl	rknand_print_hex
-	ldr	x1, [x20, #:lo12:.LANCHOR190]
-	adrp	x0, .LC171
+	ldr	x1, [x20, #:lo12:.LANCHOR191]
+	adrp	x0, .LC182
 	mov	w3, 16
 	mov	w2, 4
-	add	x0, x0, :lo12:.LC171
+	add	x0, x0, :lo12:.LC182
 	bl	rknand_print_hex
-.L2622:
-	ldr	x0, [x20, #:lo12:.LANCHOR190]
+.L2801:
+	ldr	x0, [x20, #:lo12:.LANCHOR191]
 	ldr	w0, [x0]
 	cmp	w19, w0
-	beq	.L2620
+	beq	.L2799
 	mov	w2, 59
-	b	.L2625
+	b	.L2804
 	.size	load_l2p_region, .-load_l2p_region
 	.section	.text.pm_gc,"ax",@progbits
 	.align	2
@@ -16023,73 +17195,73 @@ pm_gc:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR97
-	adrp	x19, .LANCHOR141
+	adrp	x20, .LANCHOR100
+	adrp	x19, .LANCHOR146
 	stp	x21, x22, [sp, 32]
-	ldr	x0, [x20, #:lo12:.LANCHOR97]
+	ldr	x0, [x20, #:lo12:.LANCHOR100]
 	stp	x23, x24, [sp, 48]
 	ldrh	w1, [x0, 688]
-	ldrh	w0, [x19, #:lo12:.LANCHOR141]
+	ldrh	w0, [x19, #:lo12:.LANCHOR146]
 	str	x25, [sp, 64]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L2628
+	blt	.L2807
 	bl	pm_free_sblk
-	ldr	x2, [x20, #:lo12:.LANCHOR97]
-	ldrh	w1, [x19, #:lo12:.LANCHOR141]
+	ldr	x2, [x20, #:lo12:.LANCHOR100]
+	ldrh	w1, [x19, #:lo12:.LANCHOR146]
 	sub	w1, w1, #1
 	ldrh	w3, [x2, 688]
 	cmp	w3, w1
-	blt	.L2628
+	blt	.L2807
 	add	x0, x2, x0, uxth 1
 	ldrh	w21, [x0, 416]
 	mov	w0, 65535
 	cmp	w21, w0
-	bne	.L2630
-	adrp	x1, .LANCHOR200
-	add	x1, x1, :lo12:.LANCHOR200
+	bne	.L2809
+	adrp	x1, .LANCHOR204
+	add	x1, x1, :lo12:.LANCHOR204
 	mov	w2, 131
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	bl	pm_free_sblk
-	ldr	x1, [x20, #:lo12:.LANCHOR97]
+	ldr	x1, [x20, #:lo12:.LANCHOR100]
 	add	x0, x1, x0, uxth 1
 	ldrh	w21, [x0, 416]
-.L2630:
+.L2809:
 	bl	pm_select_ram_region
 	and	x24, x0, 65535
-	adrp	x1, .LANCHOR130
+	adrp	x1, .LANCHOR132
 	lsl	x0, x24, 4
-	add	x2, x1, :lo12:.LANCHOR130
+	add	x2, x1, :lo12:.LANCHOR132
 	mov	x22, x24
 	add	x19, x2, x0
 	mov	x23, x1
 	ldrh	w0, [x2, x0]
 	mov	w2, 65535
 	cmp	w0, w2
-	beq	.L2631
+	beq	.L2810
 	ldr	x1, [x19, 8]
-	cbz	x1, .L2631
+	cbz	x1, .L2810
 	ldrsh	w2, [x19, 2]
-	tbz	w2, #31, .L2631
+	tbz	w2, #31, .L2810
 	bl	pm_write_page
 	ldrh	w0, [x19, 2]
 	and	w0, w0, 32767
 	strh	w0, [x19, 2]
-.L2631:
-	add	x1, x23, :lo12:.LANCHOR130
-	adrp	x25, .LANCHOR99
+.L2810:
+	add	x1, x23, :lo12:.LANCHOR132
+	adrp	x25, .LANCHOR102
 	add	x24, x1, x24, lsl 4
-	add	x25, x25, :lo12:.LANCHOR99
+	add	x25, x25, :lo12:.LANCHOR102
 	mov	w19, 0
-.L2632:
-	ldr	x1, [x20, #:lo12:.LANCHOR97]
+.L2811:
+	ldr	x1, [x20, #:lo12:.LANCHOR100]
 	ldrh	w0, [x1, 698]
 	cmp	w0, w19
-	bhi	.L2634
+	bhi	.L2813
 	bl	pm_free_sblk
-.L2628:
+.L2807:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -16097,7 +17269,7 @@ pm_gc:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2634:
+.L2813:
 	add	x1, x1, x19, sxtw 2
 	ldrh	w3, [x25]
 	mov	w0, 21
@@ -16108,11 +17280,11 @@ pm_gc:
 	sub	w0, w0, #1
 	lsr	w1, w1, w3
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR98
-	ldrb	w1, [x1, #:lo12:.LANCHOR98]
+	adrp	x1, .LANCHOR101
+	ldrb	w1, [x1, #:lo12:.LANCHOR101]
 	udiv	w0, w0, w1
 	cmp	w21, w0, uxth
-	bne	.L2633
+	bne	.L2812
 	mov	w1, w22
 	mov	w0, w19
 	bl	load_l2p_region
@@ -16121,10 +17293,10 @@ pm_gc:
 	bl	pm_write_page
 	mov	w0, -1
 	strh	w0, [x24]
-.L2633:
+.L2812:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L2632
+	b	.L2811
 	.size	pm_gc, .-pm_gc
 	.section	.text.pm_flush_id,"ax",@progbits
 	.align	2
@@ -16133,8 +17305,8 @@ pm_gc:
 pm_flush_id:
 	stp	x29, x30, [sp, -32]!
 	ubfiz	x0, x0, 4, 16
-	adrp	x2, .LANCHOR130
-	add	x2, x2, :lo12:.LANCHOR130
+	adrp	x2, .LANCHOR132
+	add	x2, x2, :lo12:.LANCHOR132
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	add	x19, x2, x0
@@ -16144,12 +17316,12 @@ pm_flush_id:
 	ldrh	w0, [x19, 2]
 	and	w0, w0, 32767
 	strh	w0, [x19, 2]
-	adrp	x19, .LANCHOR128
-	ldr	w0, [x19, #:lo12:.LANCHOR128]
-	cbz	w0, .L2640
+	adrp	x19, .LANCHOR130
+	ldr	w0, [x19, #:lo12:.LANCHOR130]
+	cbz	w0, .L2819
 	bl	pm_gc
-	str	wzr, [x19, #:lo12:.LANCHOR128]
-.L2640:
+	str	wzr, [x19, #:lo12:.LANCHOR130]
+.L2819:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -16163,21 +17335,21 @@ pm_flush:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR130
-	add	x19, x19, :lo12:.LANCHOR130
+	adrp	x19, .LANCHOR132
+	add	x19, x19, :lo12:.LANCHOR132
 	mov	w20, 0
 	add	x19, x19, 2
-.L2647:
+.L2826:
 	ldrsh	w0, [x19]
-	tbz	w0, #31, .L2646
+	tbz	w0, #31, .L2825
 	mov	w0, w20
 	bl	pm_flush_id
-.L2646:
+.L2825:
 	add	w20, w20, 1
 	add	x19, x19, 16
 	and	w20, w20, 65535
 	cmp	w20, 32
-	bne	.L2647
+	bne	.L2826
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -16226,83 +17398,90 @@ pm_init:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	mov	w24, w0
-	adrp	x0, .LANCHOR128
+	adrp	x0, .LANCHOR130
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	adrp	x20, .LANCHOR130
-	str	wzr, [x0, #:lo12:.LANCHOR128]
-	adrp	x0, .LANCHOR191
+	adrp	x19, .LANCHOR132
+	str	wzr, [x0, #:lo12:.LANCHOR130]
+	adrp	x0, .LANCHOR192
 	stp	x25, x26, [sp, 64]
-	add	x19, x20, :lo12:.LANCHOR130
-	strb	w1, [x0, #:lo12:.LANCHOR191]
+	add	x21, x19, :lo12:.LANCHOR132
+	strb	w1, [x0, #:lo12:.LANCHOR192]
 	mov	w0, 64
 	stp	x27, x28, [sp, 80]
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR190
-	adrp	x22, .LANCHOR121
-	add	x23, x19, 512
-	mov	x21, x1
-	add	x22, x22, :lo12:.LANCHOR121
-	str	x0, [x1, #:lo12:.LANCHOR190]
+	adrp	x1, .LANCHOR191
+	mov	x20, x19
+	add	x23, x21, 512
+	adrp	x19, .LANCHOR123
+	mov	x22, x1
+	add	x19, x19, :lo12:.LANCHOR123
+	str	x0, [x1, #:lo12:.LANCHOR191]
 	mov	w25, -1
-.L2657:
-	strh	w25, [x19]
-	strh	wzr, [x19, 2]
-	cbz	w24, .L2656
-	ldrb	w0, [x22]
+.L2836:
+	strh	w25, [x21]
+	strh	wzr, [x21, 2]
+	cbz	w24, .L2835
+	ldrb	w0, [x19]
 	lsl	w0, w0, 9
 	bl	ftl_malloc
-	str	x0, [x19, 8]
-.L2656:
-	add	x19, x19, 16
-	cmp	x19, x23
-	bne	.L2657
-	add	x0, x20, :lo12:.LANCHOR130
-	adrp	x19, .LANCHOR97
-	ldr	x24, [x21, #:lo12:.LANCHOR190]
+	str	x0, [x21, 8]
+.L2835:
+	add	x21, x21, 16
+	cmp	x21, x23
+	bne	.L2836
+	add	x0, x20, :lo12:.LANCHOR132
+	adrp	x19, .LANCHOR100
+	ldr	x24, [x22, #:lo12:.LANCHOR191]
 	mov	w4, 4
 	ldr	x25, [x0, 8]
 	mov	x3, x24
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	mov	x2, x25
 	ldrh	w1, [x0, 692]
 	ldrb	w0, [x0, 694]
 	bl	flash_get_last_written_page
 	sxth	w26, w0
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	mov	w23, w26
 	ldrh	w2, [x0, 696]
 	cmp	w2, w26
-	bgt	.L2658
+	bgt	.L2837
 	ldrh	w1, [x0, 692]
 	mov	w3, w26
-	adrp	x0, .LC172
-	add	x0, x0, :lo12:.LC172
-	adrp	x27, .LANCHOR105
-	adrp	x28, .LANCHOR121
-	add	x27, x27, :lo12:.LANCHOR105
-	add	x28, x28, :lo12:.LANCHOR121
+	adrp	x0, .LC183
+	add	x0, x0, :lo12:.LC183
+	adrp	x27, .LANCHOR107
+	adrp	x28, .LANCHOR123
+	add	x27, x27, :lo12:.LANCHOR107
+	add	x28, x28, :lo12:.LANCHOR123
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	ldrsh	w21, [x0, 696]
-.L2659:
+.L2838:
 	cmp	w21, w26
-	ble	.L2661
-	adrp	x0, .LANCHOR181
+	ble	.L2840
+	adrp	x0, .LANCHOR182
 	mov	w1, 1
-	add	x20, x20, :lo12:.LANCHOR130
 	add	w23, w23, 1
-	strb	w1, [x0, #:lo12:.LANCHOR181]
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	strb	w1, [x0, #:lo12:.LANCHOR182]
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	strh	w23, [x0, 696]
 	bl	pm_free_sblk
+.L2837:
+	add	x20, x20, :lo12:.LANCHOR132
+	mov	w0, -1
+	ldr	x1, [x20, 8]
+	bl	pm_write_page
+	ldr	x1, [x20, 8]
+	mov	w0, -1
+	bl	pm_write_page
 	ldr	x1, [x20, 8]
 	mov	w0, -1
 	bl	pm_write_page
 	ldr	x1, [x20, 8]
 	mov	w0, -1
 	bl	pm_write_page
-.L2658:
 	bl	pm_free_sblk
 	bl	pm_gc
 	mov	w0, 0
@@ -16313,8 +17492,8 @@ pm_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2661:
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+.L2840:
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	mov	x3, x24
 	ldrh	w1, [x27]
 	mov	x2, x25
@@ -16325,138 +17504,143 @@ pm_init:
 	mov	w1, w22
 	bl	flash_read_page_en
 	mov	w4, w0
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	str	w4, [x29, 108]
 	mov	w2, w22
 	ldr	w1, [x0, 48]
 	ldrh	w3, [x0, 694]
 	add	w1, w1, 1
 	str	w1, [x0, 48]
-	adrp	x0, .LC173
-	add	x0, x0, :lo12:.LC173
+	adrp	x0, .LC184
+	add	x0, x0, :lo12:.LC184
 	ldr	w1, [x24]
 	bl	printf
 	ldr	w4, [x29, 108]
 	cmp	w4, 512
 	ccmn	w4, #1, 4, ne
-	beq	.L2660
-	ldr	x1, [x19, #:lo12:.LANCHOR97]
+	beq	.L2839
+	ldr	x1, [x19, #:lo12:.LANCHOR100]
 	ldr	w0, [x24]
 	ldrh	w2, [x1, 698]
 	cmp	w0, w2
-	bcs	.L2660
+	bcs	.L2839
 	add	x0, x1, x0, uxtw 2
 	str	w22, [x0, 704]
-.L2660:
+.L2839:
 	add	w21, w21, 1
 	sxth	w21, w21
-	b	.L2659
+	b	.L2838
 	.size	pm_init, .-pm_init
 	.section	.text.pm_log2phys,"ax",@progbits
 	.align	2
 	.global	pm_log2phys
 	.type	pm_log2phys, %function
 pm_log2phys:
-	stp	x29, x30, [sp, -80]!
+	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	mov	x22, x1
-	adrp	x1, .LANCHOR121
-	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
-	ldrb	w1, [x1, #:lo12:.LANCHOR121]
+	mov	w25, w0
+	adrp	x0, .LANCHOR120
 	stp	x23, x24, [sp, 48]
-	mov	w23, w2
-	lsl	w21, w1, 7
-	ubfiz	w20, w1, 7, 9
-	adrp	x1, .LANCHOR118
-	udiv	w21, w0, w21
-	ldr	w2, [x1, #:lo12:.LANCHOR118]
-	cmp	w0, w2
-	and	w25, w21, 65535
-	msub	w20, w25, w20, w0
-	bcc	.L2671
-	mov	w1, w0
-	adrp	x0, .LC174
-	add	x0, x0, :lo12:.LC174
+	stp	x19, x20, [sp, 16]
+	mov	w24, w2
+	stp	x21, x22, [sp, 32]
+	mov	x23, x1
+	ldr	w2, [x0, #:lo12:.LANCHOR120]
+	str	x27, [sp, 80]
+	cmp	w25, w2
+	bcc	.L2850
+	mov	w1, w25
+	adrp	x0, .LC185
+	add	x0, x0, :lo12:.LC185
 	bl	printf
 	mov	w0, -1
-.L2670:
+	cbnz	w24, .L2849
+	str	w0, [x23]
+.L2849:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 96
 	ret
-.L2671:
-	adrp	x24, .LANCHOR130
-	add	x0, x24, :lo12:.LANCHOR130
-	and	x20, x20, 65535
-	add	x0, x0, 8
+.L2850:
+	adrp	x0, .LANCHOR123
+	adrp	x21, .LANCHOR132
 	mov	x19, 0
-.L2677:
+	ldrb	w20, [x0, #:lo12:.LANCHOR123]
+	add	x0, x21, :lo12:.LANCHOR132
+	add	x0, x0, 8
+	lsl	w22, w20, 7
+	udiv	w22, w25, w22
+	and	w26, w22, 65535
+.L2856:
 	ldr	x1, [x0]
-	cbz	x1, .L2673
+	cbz	x1, .L2852
 	ldrh	w1, [x0, -8]
-	cmp	w1, w25
-	bne	.L2673
-.L2674:
-	cbnz	w23, .L2675
-	add	x0, x24, :lo12:.LANCHOR130
+	cmp	w1, w26
+	bne	.L2852
+.L2853:
+	ubfiz	w20, w20, 7, 9
+	msub	w25, w26, w20, w25
+	and	x25, x25, 65535
+	cbnz	w24, .L2854
+	add	x0, x21, :lo12:.LANCHOR132
 	add	x0, x0, x19, lsl 4
 	ldr	x0, [x0, 8]
-	ldr	w0, [x0, x20, lsl 2]
-	str	w0, [x22]
-.L2676:
-	add	x24, x24, :lo12:.LANCHOR130
-	add	x19, x24, x19, lsl 4
+	ldr	w0, [x0, x25, lsl 2]
+	str	w0, [x23]
+.L2855:
+	add	x21, x21, :lo12:.LANCHOR132
+	add	x19, x21, x19, lsl 4
 	ldrh	w0, [x19, 2]
 	mvn	x1, x0
 	tst	x1, 32767
-	beq	.L2679
+	beq	.L2859
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L2679:
+.L2859:
 	mov	w0, 0
-	b	.L2670
-.L2675:
-	add	x0, x24, :lo12:.LANCHOR130
-	ldr	w2, [x22]
+	b	.L2849
+.L2854:
+	add	x0, x21, :lo12:.LANCHOR132
+	ldr	w2, [x23]
 	add	x0, x0, x19, lsl 4
 	ldr	x1, [x0, 8]
-	str	w2, [x1, x20, lsl 2]
+	str	w2, [x1, x25, lsl 2]
 	ldrh	w1, [x0, 2]
 	orr	w1, w1, -32768
 	strh	w1, [x0, 2]
-	adrp	x0, .LANCHOR131
-	strb	w21, [x0, #:lo12:.LANCHOR131]
-	b	.L2676
-.L2673:
+	adrp	x0, .LANCHOR133
+	strb	w22, [x0, #:lo12:.LANCHOR133]
+	b	.L2855
+.L2852:
 	add	w19, w19, 1
 	add	x0, x0, 16
 	and	x19, x19, 65535
 	cmp	w19, 32
-	bne	.L2677
+	bne	.L2856
 	bl	pm_select_ram_region
 	and	x19, x0, 65535
 	sbfiz	x1, x19, 4, 32
-	add	x2, x24, :lo12:.LANCHOR130
+	add	x2, x21, :lo12:.LANCHOR132
 	add	x3, x2, x1
-	mov	w26, w0
+	mov	w27, w0
 	ldrh	w2, [x2, x1]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L2678
+	beq	.L2857
 	ldrsh	w1, [x3, 2]
-	tbz	w1, #31, .L2678
+	tbz	w1, #31, .L2857
 	bl	pm_flush_id
-.L2678:
-	adrp	x0, .LANCHOR201
-	mov	w1, w26
-	strb	w19, [x0, #:lo12:.LANCHOR201]
-	mov	w0, w25
+.L2857:
+	adrp	x0, .LANCHOR205
+	mov	w1, w27
+	strb	w19, [x0, #:lo12:.LANCHOR205]
+	mov	w0, w26
 	bl	load_l2p_region
-	b	.L2674
+	b	.L2853
 	.size	pm_log2phys, .-pm_log2phys
 	.section	.text.gc_recovery,"ax",@progbits
 	.align	2
@@ -16464,17 +17648,17 @@ pm_log2phys:
 	.type	gc_recovery, %function
 gc_recovery:
 	sub	sp, sp, #240
-	adrp	x0, .LANCHOR71
+	adrp	x0, .LANCHOR74
 	stp	x29, x30, [sp, 32]
 	add	x29, sp, 32
 	stp	x21, x22, [sp, 64]
 	adrp	x21, .LANCHOR10
 	stp	x19, x20, [sp, 48]
 	ldr	x20, [x21, #:lo12:.LANCHOR10]
-	strb	wzr, [x0, #:lo12:.LANCHOR71]
-	adrp	x0, .LANCHOR145
+	strb	wzr, [x0, #:lo12:.LANCHOR74]
+	adrp	x0, .LANCHOR150
 	stp	x23, x24, [sp, 80]
-	strb	wzr, [x0, #:lo12:.LANCHOR145]
+	strb	wzr, [x0, #:lo12:.LANCHOR150]
 	stp	x25, x26, [sp, 96]
 	stp	x27, x28, [sp, 112]
 	bl	gc_init
@@ -16484,7 +17668,7 @@ gc_recovery:
 	mov	w0, 65535
 	cmp	w1, w0
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
-	beq	.L2686
+	beq	.L2866
 	mov	w1, -1
 	strh	w1, [x0, 130]
 	mov	w0, 1
@@ -16492,41 +17676,41 @@ gc_recovery:
 	mov	x26, x0
 	ldrb	w0, [x20, 89]
 	add	x1, x20, 80
-	adrp	x3, .LANCHOR105
-	adrp	x2, .LANCHOR68
+	adrp	x3, .LANCHOR107
+	adrp	x2, .LANCHOR69
 	sub	w0, w0, #1
 	str	x3, [x29, 152]
 	add	x0, x1, x0, sxtw 1
-	ldrh	w1, [x3, #:lo12:.LANCHOR105]
+	ldrh	w1, [x3, #:lo12:.LANCHOR107]
 	str	x2, [x29, 168]
 	ldrh	w0, [x0, 16]
 	mul	w1, w0, w1
-	ldrb	w0, [x2, #:lo12:.LANCHOR68]
+	ldrb	w0, [x2, #:lo12:.LANCHOR69]
 	str	w1, [x29, 200]
 	cmp	w0, 3
-	bne	.L2687
-	adrp	x0, .LANCHOR80
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	bne	.L2867
+	adrp	x0, .LANCHOR83
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
 	sub	w0, w0, #1
 	add	w0, w0, w1
 	orr	w0, w0, 50331648
-.L2731:
+.L2911:
 	str	w0, [x26, 40]
-.L2688:
+.L2868:
 	mov	w1, 1
 	mov	x0, x26
 	bl	sblk_read_page
 	ldr	w0, [x26, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2689
+	beq	.L2869
 	ldr	x0, [x26, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L2690
-.L2689:
+	beq	.L2870
+.L2869:
 	mov	x0, x26
 	bl	buf_free
 	ldr	x1, [x26, 24]
@@ -16539,13 +17723,13 @@ gc_recovery:
 	str	w2, [sp]
 	ldp	w3, w4, [x0]
 	ldp	w5, w6, [x0, 8]
-	adrp	x0, .LC175
+	adrp	x0, .LC186
 	ldr	w7, [x1]
-	add	x0, x0, :lo12:.LC175
+	add	x0, x0, :lo12:.LC186
 	ldr	w1, [x26, 40]
 	ldr	w2, [x26, 52]
 	bl	printf
-.L2735:
+.L2915:
 	adrp	x0, .LANCHOR9
 	ldrh	w1, [x20, 80]
 	mov	w22, 0
@@ -16554,11 +17738,13 @@ gc_recovery:
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	ldrh	w1, [x20, 80]
 	strh	w1, [x0, 130]
-.L2691:
+.L2871:
+	ldrh	w0, [x20, 80]
+	bl	ftl_dump_write_open_sblk
 	ldrh	w1, [x20, 80]
 	mov	w2, w22
-	adrp	x0, .LC177
-	add	x0, x0, :lo12:.LC177
+	adrp	x0, .LC188
+	add	x0, x0, :lo12:.LC188
 	bl	printf
 	mov	w0, -1
 	strh	w0, [x20, 80]
@@ -16568,18 +17754,18 @@ gc_recovery:
 	mov	w1, 65535
 	ldrh	w0, [x0, 130]
 	cmp	w0, w1
-	beq	.L2718
+	beq	.L2898
 	bl	ftl_free_sblk
-.L2718:
-	adrp	x0, .LANCHOR97
-	ldr	x1, [x0, #:lo12:.LANCHOR97]
+.L2898:
+	adrp	x0, .LANCHOR100
+	ldr	x1, [x0, #:lo12:.LANCHOR100]
 	mov	w0, -1
 	strh	w0, [x1, 126]
 	ldr	x1, [x21, #:lo12:.LANCHOR10]
 	strh	w0, [x1, 130]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2685:
+.L2865:
 	ldp	x19, x20, [sp, 48]
 	ldp	x21, x22, [sp, 64]
 	ldp	x23, x24, [sp, 80]
@@ -16588,64 +17774,64 @@ gc_recovery:
 	ldp	x29, x30, [sp, 32]
 	add	sp, sp, 240
 	ret
-.L2687:
+.L2867:
 	cmp	w0, 2
-	bne	.L2688
-	adrp	x0, .LANCHOR80
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	bne	.L2868
+	adrp	x0, .LANCHOR83
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
 	add	w0, w1, w0, lsl 1
 	sub	w0, w0, #1
 	orr	w0, w0, 33554432
-	b	.L2731
-.L2690:
-	adrp	x28, .LANCHOR72
-	adrp	x22, .LANCHOR73
-	adrp	x27, .LANCHOR147
+	b	.L2911
+.L2870:
+	adrp	x28, .LANCHOR75
+	adrp	x22, .LANCHOR76
+	adrp	x27, .LANCHOR152
 	ldr	x1, [x26, 8]
-	ldrb	w0, [x22, #:lo12:.LANCHOR73]
-	adrp	x24, .LANCHOR148
-	ldrh	w2, [x28, #:lo12:.LANCHOR72]
+	ldrb	w0, [x22, #:lo12:.LANCHOR76]
+	adrp	x24, .LANCHOR153
+	ldrh	w2, [x28, #:lo12:.LANCHOR75]
 	mul	w2, w2, w0
-	ldr	x0, [x27, #:lo12:.LANCHOR147]
+	ldr	x0, [x27, #:lo12:.LANCHOR152]
 	lsl	w2, w2, 2
 	bl	ftl_memcpy
-	ldrb	w1, [x22, #:lo12:.LANCHOR73]
-	ldrh	w0, [x28, #:lo12:.LANCHOR72]
+	ldrb	w1, [x22, #:lo12:.LANCHOR76]
+	ldrh	w0, [x28, #:lo12:.LANCHOR75]
 	mul	w0, w0, w1
 	ldr	x1, [x26, 8]
 	lsl	w2, w0, 2
 	add	x1, x1, x0, sxtw 2
-	ldr	x0, [x24, #:lo12:.LANCHOR148]
+	ldr	x0, [x24, #:lo12:.LANCHOR153]
 	bl	ftl_memcpy
 	str	x28, [x29, 144]
-	adrp	x0, .LANCHOR80
-	ldrh	w14, [x0, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR83
+	ldrh	w14, [x0, #:lo12:.LANCHOR83]
 	ldr	x0, [x29, 168]
-	ldrb	w0, [x0, #:lo12:.LANCHOR68]
+	ldrb	w0, [x0, #:lo12:.LANCHOR69]
 	cmp	w0, 2
-	beq	.L2692
-.L2732:
+	beq	.L2872
+.L2912:
 	str	w0, [x29, 184]
-	adrp	x25, .LC176
+	adrp	x25, .LC187
 	ldr	x0, [x29, 152]
 	mov	w23, 0
 	mov	w22, 0
-	add	x0, x0, :lo12:.LANCHOR105
+	add	x0, x0, :lo12:.LANCHOR107
 	str	x0, [x29, 128]
-	add	x0, x25, :lo12:.LC176
+	add	x0, x25, :lo12:.LC187
 	str	x0, [x29, 120]
-.L2694:
+.L2874:
 	sub	w0, w23, #1
 	str	w0, [x29, 188]
 	cmp	w23, w14
-	beq	.L2703
+	beq	.L2883
 	mov	x19, 0
-	b	.L2704
-.L2692:
+	b	.L2884
+.L2872:
 	lsl	w14, w14, 1
 	mov	w0, 1
-	b	.L2732
-.L2700:
+	b	.L2912
+.L2880:
 	ldr	x1, [x29, 128]
 	ldr	x0, [x29, 160]
 	ldrh	w1, [x1]
@@ -16655,29 +17841,29 @@ gc_recovery:
 	str	w0, [x29, 200]
 	ldrb	w1, [x1]
 	cmp	w1, 3
-	bne	.L2695
+	bne	.L2875
 	add	w0, w23, w0
 	orr	w0, w0, w25, lsl 24
-.L2733:
+.L2913:
 	str	w0, [x26, 40]
 	mov	w1, 1
 	str	w14, [x29, 112]
 	mov	x0, x26
 	bl	sblk_read_page
-	ldr	x0, [x27, #:lo12:.LANCHOR147]
+	ldr	x0, [x27, #:lo12:.LANCHOR152]
 	ldr	w14, [x29, 112]
 	ldr	w3, [x0, x28]
 	ldr	x0, [x26, 24]
 	ldr	w6, [x0, 4]
 	cmp	w3, w6
-	bne	.L2698
-	ldr	x1, [x24, #:lo12:.LANCHOR148]
+	bne	.L2878
+	ldr	x1, [x24, #:lo12:.LANCHOR153]
 	ldr	w2, [x1, x28]
 	ldr	w1, [x0, 8]
 	cmp	w2, w1
-	beq	.L2699
-.L2698:
-	ldr	x1, [x24, #:lo12:.LANCHOR148]
+	beq	.L2879
+.L2878:
+	ldr	x1, [x24, #:lo12:.LANCHOR153]
 	ldr	w2, [x0, 12]
 	str	w2, [sp]
 	str	w14, [x29, 112]
@@ -16688,51 +17874,51 @@ gc_recovery:
 	ldr	w2, [x26, 52]
 	ldr	x0, [x29, 120]
 	bl	printf
-	ldr	x0, [x27, #:lo12:.LANCHOR147]
+	ldr	x0, [x27, #:lo12:.LANCHOR152]
 	ldr	w14, [x29, 112]
 	ldr	w0, [x0, x28]
 	cmn	w0, #1
-	beq	.L2699
+	beq	.L2879
 	mov	x0, x26
 	bl	buf_free
-	b	.L2735
-.L2695:
+	b	.L2915
+.L2875:
 	cmp	w1, 2
-	bne	.L2697
+	bne	.L2877
 	ldr	w1, [x29, 188]
 	add	w0, w0, w1
 	add	w0, w0, w25
 	orr	w0, w0, 33554432
-	b	.L2733
-.L2697:
+	b	.L2913
+.L2877:
 	add	w0, w23, w0
-	b	.L2733
-.L2699:
+	b	.L2913
+.L2879:
 	add	w22, w22, 1
 	add	w25, w25, 1
 	add	x28, x28, 4
-.L2702:
+.L2882:
 	ldr	w0, [x29, 184]
 	cmp	w0, w25
-	bcs	.L2700
+	bcs	.L2880
 	add	x19, x19, 1
-.L2704:
+.L2884:
 	ldr	x0, [x29, 176]
 	ldrb	w0, [x0, 9]
 	cmp	w0, w19
-	ble	.L2701
+	ble	.L2881
 	add	x0, x20, x19, lsl 1
 	str	x0, [x29, 160]
 	ldr	x0, [x29, 168]
 	sbfiz	x28, x22, 2, 32
 	mov	w25, 1
-	add	x0, x0, :lo12:.LANCHOR68
+	add	x0, x0, :lo12:.LANCHOR69
 	str	x0, [x29, 136]
-	b	.L2702
-.L2701:
+	b	.L2882
+.L2881:
 	add	w23, w23, 1
-	b	.L2694
-.L2703:
+	b	.L2874
+.L2883:
 	mov	x0, x26
 	bl	buf_free
 	ldr	x3, [x29, 144]
@@ -16742,30 +17928,30 @@ gc_recovery:
 	ldrh	w2, [x20, 80]
 	mov	w28, 0
 	ldr	x1, [x25, #:lo12:.LANCHOR9]
-	ldrh	w3, [x3, #:lo12:.LANCHOR72]
+	ldrh	w3, [x3, #:lo12:.LANCHOR75]
 	ldrb	w0, [x0, 9]
 	str	x25, [x29, 144]
 	str	wzr, [x29, 188]
 	mul	w0, w0, w3
 	strh	w0, [x1, x2, lsl 1]
-	adrp	x0, .LANCHOR99
-	add	x0, x0, :lo12:.LANCHOR99
+	adrp	x0, .LANCHOR102
+	add	x0, x0, :lo12:.LANCHOR102
 	str	x0, [x29, 112]
-.L2705:
+.L2885:
 	sub	w0, w28, #1
 	str	w0, [x29, 136]
 	cmp	w23, w28
-	beq	.L2716
+	beq	.L2896
 	mov	x26, 0
-	b	.L2717
-.L2713:
+	b	.L2897
+.L2893:
 	ldr	w0, [x29, 188]
-	ldr	x1, [x27, #:lo12:.LANCHOR147]
+	ldr	x1, [x27, #:lo12:.LANCHOR152]
 	sbfiz	x0, x0, 2, 32
 	ldr	w5, [x1, x0]
 	cmn	w5, #1
-	beq	.L2706
-	ldr	x1, [x24, #:lo12:.LANCHOR148]
+	beq	.L2886
+	ldr	x1, [x24, #:lo12:.LANCHOR153]
 	str	w5, [x29, 108]
 	ldr	w0, [x1, x0]
 	str	w0, [x29, 160]
@@ -16774,26 +17960,26 @@ gc_recovery:
 	str	w0, [x29, 204]
 	cmn	w0, #1
 	ldr	w5, [x29, 108]
-	bne	.L2707
+	bne	.L2887
 	mov	w0, w5
 	str	w5, [x29, 108]
 	mov	w2, 0
 	add	x1, x29, 204
 	bl	pm_log2phys
 	ldr	w5, [x29, 108]
-.L2707:
+.L2887:
 	ldr	x0, [x29, 128]
 	ldr	x1, [x29, 152]
 	ldrh	w0, [x0, 96]
-	ldrh	w1, [x1, #:lo12:.LANCHOR105]
+	ldrh	w1, [x1, #:lo12:.LANCHOR107]
 	mul	w0, w0, w1
 	ldr	x1, [x29, 168]
-	ldrb	w1, [x1, #:lo12:.LANCHOR68]
+	ldrb	w1, [x1, #:lo12:.LANCHOR69]
 	cmp	w1, 3
-	bne	.L2708
+	bne	.L2888
 	add	w0, w28, w0
 	orr	w0, w0, w25, lsl 24
-.L2734:
+.L2914:
 	str	w0, [x29, 200]
 	mov	w19, 21
 	ldr	x0, [x29, 112]
@@ -16811,14 +17997,14 @@ gc_recovery:
 	ldr	w0, [x29, 204]
 	cmp	w1, w0
 	and	x19, x19, 65535
-	bne	.L2711
+	bne	.L2891
 	add	x1, x29, 200
 	mov	w0, w5
 	bl	pm_log2phys
 	add	w22, w22, 1
 	mov	w0, w19
 	bl	ftl_vpn_decrement
-.L2712:
+.L2892:
 	ldr	w0, [x29, 188]
 	add	w0, w0, 1
 	str	w0, [x29, 188]
@@ -16827,82 +18013,82 @@ gc_recovery:
 	add	x0, x0, x19, lsl 2
 	ldrb	w0, [x0, 2]
 	tst	w0, 224
-	bne	.L2706
+	bne	.L2886
 	ldr	x0, [x29, 144]
 	lsl	x19, x19, 1
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x0, x19]
-	cbz	w1, .L2706
+	cbz	w1, .L2886
 	strh	wzr, [x0, x19]
-.L2706:
+.L2886:
 	add	w25, w25, 1
-.L2715:
+.L2895:
 	ldr	w0, [x29, 184]
 	cmp	w0, w25
-	bcs	.L2713
+	bcs	.L2893
 	add	x26, x26, 1
-.L2717:
+.L2897:
 	ldr	x0, [x29, 176]
 	ldrb	w0, [x0, 9]
 	cmp	w0, w26
-	ble	.L2714
+	ble	.L2894
 	add	x0, x20, x26, lsl 1
 	mov	w25, 1
 	str	x0, [x29, 128]
-	adrp	x0, .LANCHOR98
-	add	x0, x0, :lo12:.LANCHOR98
+	adrp	x0, .LANCHOR101
+	add	x0, x0, :lo12:.LANCHOR101
 	str	x0, [x29, 120]
-	b	.L2715
-.L2708:
+	b	.L2895
+.L2888:
 	cmp	w1, 2
-	bne	.L2710
+	bne	.L2890
 	ldr	w1, [x29, 136]
 	add	w0, w0, w1
 	add	w0, w0, w25
 	orr	w0, w0, 33554432
-	b	.L2734
-.L2710:
+	b	.L2914
+.L2890:
 	add	w0, w28, w0
-	b	.L2734
-.L2711:
+	b	.L2914
+.L2891:
 	ldr	w1, [x29, 200]
 	cmp	w0, w1
 	cinc	w22, w22, eq
-	b	.L2712
-.L2714:
+	b	.L2892
+.L2894:
 	add	w28, w28, 1
-	b	.L2705
-.L2716:
+	b	.L2885
+.L2896:
 	ldr	x0, [x29, 144]
 	ldrh	w1, [x20, 80]
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	strh	w22, [x0, x1, lsl 1]
 	ldrh	w0, [x20, 80]
 	bl	zftl_insert_data_list
-	b	.L2691
-.L2686:
+	b	.L2871
+.L2866:
 	ldrh	w0, [x0, 130]
 	cmp	w0, w1
-	beq	.L2685
-	adrp	x19, .LANCHOR97
-	ldr	x1, [x19, #:lo12:.LANCHOR97]
+	beq	.L2865
+	adrp	x19, .LANCHOR100
+	ldr	x1, [x19, #:lo12:.LANCHOR100]
 	ldrh	w1, [x1, 126]
 	cmp	w1, w0
-	bne	.L2720
+	bne	.L2900
 	bl	pm_flush
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	ldrh	w0, [x0, 130]
 	bl	ftl_free_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	mov	w1, -1
 	strh	w1, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2720:
+.L2900:
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	mov	w1, -1
 	strh	w1, [x0, 130]
-	b	.L2685
+	b	.L2865
 	.size	gc_recovery, .-gc_recovery
 	.section	.text.zftl_init,"ax",@progbits
 	.align	2
@@ -16910,232 +18096,232 @@ gc_recovery:
 	.type	zftl_init, %function
 zftl_init:
 	stp	x29, x30, [sp, -112]!
-	adrp	x1, .LANCHOR56
+	adrp	x1, .LANCHOR57
 	mov	w0, -1
 	add	x29, sp, 0
-	strb	w0, [x1, #:lo12:.LANCHOR56]
-	adrp	x1, .LANCHOR57
+	strb	w0, [x1, #:lo12:.LANCHOR57]
+	adrp	x1, .LANCHOR58
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR80
-	strb	wzr, [x1, #:lo12:.LANCHOR57]
-	adrp	x1, .LANCHOR124
+	adrp	x22, .LANCHOR83
+	strb	wzr, [x1, #:lo12:.LANCHOR58]
+	adrp	x1, .LANCHOR126
 	stp	x19, x20, [sp, 16]
-	adrp	x21, .LANCHOR73
-	strb	w0, [x1, #:lo12:.LANCHOR124]
-	adrp	x1, .LANCHOR125
+	adrp	x21, .LANCHOR76
+	strb	w0, [x1, #:lo12:.LANCHOR126]
+	adrp	x1, .LANCHOR127
 	stp	x23, x24, [sp, 48]
-	adrp	x20, .LANCHOR199
-	strb	wzr, [x1, #:lo12:.LANCHOR125]
-	adrp	x1, .LANCHOR173
+	adrp	x20, .LANCHOR203
+	strb	wzr, [x1, #:lo12:.LANCHOR127]
+	adrp	x1, .LANCHOR174
 	stp	x25, x26, [sp, 64]
 	adrp	x23, .LANCHOR6
-	strb	w0, [x1, #:lo12:.LANCHOR173]
-	adrp	x0, .LANCHOR119
+	strb	w0, [x1, #:lo12:.LANCHOR174]
+	adrp	x0, .LANCHOR121
 	mov	w1, -1
 	stp	x27, x28, [sp, 80]
-	strb	wzr, [x0, #:lo12:.LANCHOR119]
-	adrp	x0, .LANCHOR202
-	str	w1, [x0, #:lo12:.LANCHOR202]
-	adrp	x1, .LC178
-	adrp	x0, .LC91
-	add	x1, x1, :lo12:.LC178
-	add	x0, x0, :lo12:.LC91
-	bl	printf
-	adrp	x1, .LANCHOR34
-	add	x1, x1, :lo12:.LANCHOR34
-	adrp	x0, .LANCHOR68
-	adrp	x2, .LANCHOR121
-	adrp	x3, .LANCHOR72
-	adrp	x4, .LANCHOR98
+	strb	wzr, [x0, #:lo12:.LANCHOR121]
+	adrp	x0, .LANCHOR206
+	str	w1, [x0, #:lo12:.LANCHOR206]
+	adrp	x1, .LC189
+	adrp	x0, .LC93
+	add	x1, x1, :lo12:.LC189
+	add	x0, x0, :lo12:.LC93
+	bl	printf
+	adrp	x1, .LANCHOR30
+	add	x1, x1, :lo12:.LANCHOR30
+	adrp	x0, .LANCHOR69
+	adrp	x2, .LANCHOR123
+	adrp	x3, .LANCHOR75
+	adrp	x4, .LANCHOR101
 	ldrb	w5, [x1, 12]
-	strb	w5, [x0, #:lo12:.LANCHOR68]
+	strb	w5, [x0, #:lo12:.LANCHOR69]
 	ldrb	w0, [x1, 9]
-	strb	w0, [x2, #:lo12:.LANCHOR121]
+	strb	w0, [x2, #:lo12:.LANCHOR123]
 	ldrh	w2, [x1, 10]
-	strh	w2, [x3, #:lo12:.LANCHOR72]
+	strh	w2, [x3, #:lo12:.LANCHOR75]
 	adrp	x3, .LANCHOR18
 	ldrh	w7, [x1, 14]
 	ubfiz	w10, w0, 9, 7
 	ldrb	w6, [x3, #:lo12:.LANCHOR18]
-	adrp	x3, .LANCHOR106
+	adrp	x3, .LANCHOR108
 	sdiv	w8, w2, w5
 	strh	w7, [x23, #:lo12:.LANCHOR6]
-	strb	w6, [x3, #:lo12:.LANCHOR106]
+	strb	w6, [x3, #:lo12:.LANCHOR108]
 	ldrb	w3, [x1, 13]
 	adrp	x1, .LANCHOR2
-	strb	w3, [x4, #:lo12:.LANCHOR98]
+	strb	w3, [x4, #:lo12:.LANCHOR101]
 	ldrh	w4, [x1, #:lo12:.LANCHOR2]
-	adrp	x1, .LANCHOR105
-	strh	w8, [x22, #:lo12:.LANCHOR80]
+	adrp	x1, .LANCHOR107
+	strh	w8, [x22, #:lo12:.LANCHOR83]
 	mul	w6, w6, w3
-	strh	w4, [x1, #:lo12:.LANCHOR105]
-	strh	w10, [x20, #:lo12:.LANCHOR199]
+	strh	w4, [x1, #:lo12:.LANCHOR107]
+	strh	w10, [x20, #:lo12:.LANCHOR203]
 	mov	w3, 1
 	and	w6, w6, 255
 	mov	w1, 0
-	strb	w6, [x21, #:lo12:.LANCHOR73]
-.L2737:
+	strb	w6, [x21, #:lo12:.LANCHOR76]
+.L2917:
 	cmp	w4, w3
-	bcs	.L2738
+	bcs	.L2918
 	mul	w2, w0, w2
-	adrp	x3, .LANCHOR99
+	adrp	x3, .LANCHOR102
 	sub	w1, w1, #1
 	mov	w4, 0
-	strh	w1, [x3, #:lo12:.LANCHOR99]
+	strh	w1, [x3, #:lo12:.LANCHOR102]
 	mov	w1, 1
 	mul	w3, w2, w7
 	lsr	w11, w3, 21
-.L2739:
+.L2919:
 	cmp	w11, w1
-	bcs	.L2740
+	bcs	.L2920
 	mov	w1, 57344
 	sub	w4, w4, #1
 	movk	w1, 0x1c, lsl 16
 	mul	w3, w3, w6
-	adrp	x28, .LANCHOR118
+	adrp	x28, .LANCHOR120
 	sub	w11, w10, #1
 	mul	w1, w6, w1
-	adrp	x24, .LANCHOR186
+	adrp	x24, .LANCHOR187
 	mul	w8, w8, w6
-	adrp	x27, .LANCHOR204
+	adrp	x27, .LANCHOR208
 	mul	w2, w2, w6
-	adrp	x26, .LANCHOR141
+	adrp	x26, .LANCHOR146
 	lsl	w1, w1, w4
-	adrp	x4, .LANCHOR58
+	adrp	x4, .LANCHOR59
 	sub	w2, w2, #1
-	adrp	x25, .LANCHOR84
-	str	w1, [x4, #:lo12:.LANCHOR58]
-	adrp	x4, .LANCHOR203
-	str	w3, [x4, #:lo12:.LANCHOR203]
+	adrp	x25, .LANCHOR87
+	str	w1, [x4, #:lo12:.LANCHOR59]
+	adrp	x4, .LANCHOR207
+	str	w3, [x4, #:lo12:.LANCHOR207]
 	add	w3, w1, 24576
-	str	w3, [x27, #:lo12:.LANCHOR204]
+	str	w3, [x27, #:lo12:.LANCHOR208]
 	udiv	w0, w3, w0
 	udiv	w3, w3, w2
-	adrp	x2, .LANCHOR101
-	str	w0, [x28, #:lo12:.LANCHOR118]
+	adrp	x2, .LANCHOR104
+	str	w0, [x28, #:lo12:.LANCHOR120]
 	add	w0, w11, w0, lsl 2
 	add	w3, w3, 8
 	udiv	w0, w0, w10
-	strh	w0, [x24, #:lo12:.LANCHOR186]
+	strh	w0, [x24, #:lo12:.LANCHOR187]
 	ubfiz	w0, w0, 4, 16
 	sdiv	w0, w0, w8
-	adrp	x8, .LANCHOR88
+	adrp	x8, .LANCHOR91
 	str	x8, [x29, 104]
-	strh	w3, [x8, #:lo12:.LANCHOR88]
-	strh	w0, [x26, #:lo12:.LANCHOR141]
+	strh	w3, [x8, #:lo12:.LANCHOR91]
+	strh	w0, [x26, #:lo12:.LANCHOR146]
 	add	w0, w7, w7, lsl 1
 	asr	w0, w0, 2
-	strh	w0, [x2, #:lo12:.LANCHOR101]
+	strh	w0, [x2, #:lo12:.LANCHOR104]
 	lsr	w0, w7, 4
-	strh	w0, [x25, #:lo12:.LANCHOR84]
+	strh	w0, [x25, #:lo12:.LANCHOR87]
 	cmp	w0, 79
-	bhi	.L2741
+	bhi	.L2921
 	mov	w0, 80
-	strh	w0, [x25, #:lo12:.LANCHOR84]
-.L2741:
-	adrp	x7, .LANCHOR102
+	strh	w0, [x25, #:lo12:.LANCHOR87]
+.L2921:
+	adrp	x7, .LANCHOR105
 	mov	w0, 2000
-	adrp	x3, .LANCHOR100
-	adrp	x6, .LANCHOR140
-	strh	w0, [x7, #:lo12:.LANCHOR102]
+	adrp	x3, .LANCHOR103
+	adrp	x6, .LANCHOR145
+	strh	w0, [x7, #:lo12:.LANCHOR105]
 	mov	w0, 50
-	adrp	x2, .LANCHOR139
-	strh	w0, [x3, #:lo12:.LANCHOR100]
+	adrp	x2, .LANCHOR144
+	strh	w0, [x3, #:lo12:.LANCHOR103]
 	mov	w0, 256
-	strh	w0, [x6, #:lo12:.LANCHOR140]
+	strh	w0, [x6, #:lo12:.LANCHOR145]
 	mov	w0, 48
-	strh	w0, [x2, #:lo12:.LANCHOR139]
+	strh	w0, [x2, #:lo12:.LANCHOR144]
 	adrp	x0, .LANCHOR8
 	mov	w8, 32
 	cmp	w5, 2
 	strh	w8, [x0, #:lo12:.LANCHOR8]
-	beq	.L2742
-	adrp	x5, .LANCHOR70
-	ldrb	w5, [x5, #:lo12:.LANCHOR70]
-	cbz	w5, .L2743
-.L2742:
+	beq	.L2922
+	adrp	x5, .LANCHOR73
+	ldrb	w5, [x5, #:lo12:.LANCHOR73]
+	cbz	w5, .L2923
+.L2922:
 	mov	w5, 150
-	strh	w5, [x3, #:lo12:.LANCHOR100]
+	strh	w5, [x3, #:lo12:.LANCHOR103]
 	mov	w3, 64
-	strh	w3, [x2, #:lo12:.LANCHOR139]
+	strh	w3, [x2, #:lo12:.LANCHOR144]
 	mov	w2, 12
 	strh	w2, [x0, #:lo12:.LANCHOR8]
 	adrp	x2, .LANCHOR0
 	ldrb	w2, [x2, #:lo12:.LANCHOR0]
-	cbnz	w2, .L2743
+	cbnz	w2, .L2923
 	mov	w2, 4
 	strh	w2, [x0, #:lo12:.LANCHOR8]
 	mov	w0, 600
-	strh	w0, [x7, #:lo12:.LANCHOR102]
+	strh	w0, [x7, #:lo12:.LANCHOR105]
 	mov	w0, 128
-	strh	w0, [x6, #:lo12:.LANCHOR140]
-.L2743:
+	strh	w0, [x6, #:lo12:.LANCHOR145]
+.L2923:
 	adrp	x19, .LANCHOR14
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2745
+	tbz	x0, 12, .L2925
 	str	x4, [x29, 96]
-	adrp	x0, .LC179
-	add	x0, x0, :lo12:.LC179
+	adrp	x0, .LC190
+	add	x0, x0, :lo12:.LC190
 	bl	printf
 	ldr	x4, [x29, 96]
-.L2745:
+.L2925:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2746
-	ldr	w1, [x4, #:lo12:.LANCHOR203]
-	adrp	x0, .LC180
-	add	x0, x0, :lo12:.LC180
+	tbz	x0, 12, .L2926
+	ldr	w1, [x4, #:lo12:.LANCHOR207]
+	adrp	x0, .LC191
+	add	x0, x0, :lo12:.LC191
 	bl	printf
-.L2746:
+.L2926:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2747
-	ldr	w1, [x28, #:lo12:.LANCHOR118]
-	adrp	x0, .LC181
-	add	x0, x0, :lo12:.LC181
+	tbz	x0, 12, .L2927
+	ldr	w1, [x28, #:lo12:.LANCHOR120]
+	adrp	x0, .LC192
+	add	x0, x0, :lo12:.LC192
 	bl	printf
-.L2747:
+.L2927:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2748
-	ldr	w1, [x27, #:lo12:.LANCHOR204]
-	adrp	x0, .LC182
-	add	x0, x0, :lo12:.LC182
+	tbz	x0, 12, .L2928
+	ldr	w1, [x27, #:lo12:.LANCHOR208]
+	adrp	x0, .LC193
+	add	x0, x0, :lo12:.LC193
 	bl	printf
-.L2748:
+.L2928:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2749
-	ldrh	w1, [x24, #:lo12:.LANCHOR186]
-	adrp	x0, .LC183
-	add	x0, x0, :lo12:.LC183
+	tbz	x0, 12, .L2929
+	ldrh	w1, [x24, #:lo12:.LANCHOR187]
+	adrp	x0, .LC194
+	add	x0, x0, :lo12:.LC194
 	bl	printf
-.L2749:
+.L2929:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2750
-	ldrh	w1, [x20, #:lo12:.LANCHOR199]
-	adrp	x0, .LC184
-	add	x0, x0, :lo12:.LC184
+	tbz	x0, 12, .L2930
+	ldrh	w1, [x20, #:lo12:.LANCHOR203]
+	adrp	x0, .LC195
+	add	x0, x0, :lo12:.LC195
 	bl	printf
-.L2750:
+.L2930:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2751
-	ldrh	w1, [x26, #:lo12:.LANCHOR141]
-	adrp	x0, .LC185
-	add	x0, x0, :lo12:.LC185
+	tbz	x0, 12, .L2931
+	ldrh	w1, [x26, #:lo12:.LANCHOR146]
+	adrp	x0, .LC196
+	add	x0, x0, :lo12:.LC196
 	bl	printf
-.L2751:
+.L2931:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2752
-	ldrh	w1, [x25, #:lo12:.LANCHOR84]
-	adrp	x0, .LC186
-	add	x0, x0, :lo12:.LC186
+	tbz	x0, 12, .L2932
+	ldrh	w1, [x25, #:lo12:.LANCHOR87]
+	adrp	x0, .LC197
+	add	x0, x0, :lo12:.LC197
 	bl	printf
-.L2752:
+.L2932:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2753
+	tbz	x0, 12, .L2933
 	ldr	x0, [x29, 104]
-	ldrh	w1, [x0, #:lo12:.LANCHOR88]
-	adrp	x0, .LC187
-	add	x0, x0, :lo12:.LC187
+	ldrh	w1, [x0, #:lo12:.LANCHOR91]
+	adrp	x0, .LC198
+	add	x0, x0, :lo12:.LC198
 	bl	printf
-.L2753:
+.L2933:
 	bl	buf_init
 	adrp	x25, .LANCHOR10
 	ldrh	w1, [x23, #:lo12:.LANCHOR6]
@@ -17144,19 +18330,19 @@ zftl_init:
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR4
 	str	x0, [x1, #:lo12:.LANCHOR4]
-	ldrb	w1, [x21, #:lo12:.LANCHOR73]
-	ldrh	w0, [x22, #:lo12:.LANCHOR80]
+	ldrb	w1, [x21, #:lo12:.LANCHOR76]
+	ldrh	w0, [x22, #:lo12:.LANCHOR83]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR112
+	adrp	x1, .LANCHOR114
 	adrp	x2, ftl_ext_info_data_buffer
 	add	x2, x2, :lo12:ftl_ext_info_data_buffer
-	str	x0, [x1, #:lo12:.LANCHOR112]
-	adrp	x0, .LANCHOR111
-	ldrh	w1, [x22, #:lo12:.LANCHOR80]
-	str	x2, [x0, #:lo12:.LANCHOR111]
-	ldrb	w0, [x21, #:lo12:.LANCHOR73]
+	str	x0, [x1, #:lo12:.LANCHOR114]
+	adrp	x0, .LANCHOR113
+	ldrh	w1, [x22, #:lo12:.LANCHOR83]
+	str	x2, [x0, #:lo12:.LANCHOR113]
+	ldrb	w0, [x21, #:lo12:.LANCHOR76]
 	mul	w1, w1, w0
 	lsl	w0, w1, 1
 	adrp	x1, .LANCHOR9
@@ -17167,15 +18353,15 @@ zftl_init:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	add	x1, x2, x1, sxtw 2
 	str	x1, [x25, #:lo12:.LANCHOR10]
-	tbz	x0, 12, .L2754
-	adrp	x0, .LC188
-	add	x0, x0, :lo12:.LC188
+	tbz	x0, 12, .L2934
+	adrp	x0, .LC199
+	add	x0, x0, :lo12:.LC199
 	bl	printf
-.L2754:
-	ldrh	w0, [x22, #:lo12:.LANCHOR80]
-	ldrb	w21, [x21, #:lo12:.LANCHOR73]
+.L2934:
+	ldrh	w0, [x22, #:lo12:.LANCHOR83]
+	ldrb	w21, [x21, #:lo12:.LANCHOR76]
 	ldrh	w1, [x23, #:lo12:.LANCHOR6]
-	ldrh	w22, [x24, #:lo12:.LANCHOR186]
+	ldrh	w22, [x24, #:lo12:.LANCHOR187]
 	mul	w21, w0, w21
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	add	w21, w1, w21, lsl 2
@@ -17184,39 +18370,39 @@ zftl_init:
 	add	w22, w1, w22, lsl 2
 	add	w21, w21, 632
 	add	w22, w22, 704
-	tbz	x0, 12, .L2755
-	ldrh	w3, [x20, #:lo12:.LANCHOR199]
-	adrp	x0, .LC189
+	tbz	x0, 12, .L2935
+	ldrh	w3, [x20, #:lo12:.LANCHOR203]
+	adrp	x0, .LC200
 	mov	w2, w22
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC189
+	add	x0, x0, :lo12:.LC200
 	bl	printf
-.L2755:
-	ldrh	w0, [x20, #:lo12:.LANCHOR199]
+.L2935:
+	ldrh	w0, [x20, #:lo12:.LANCHOR203]
 	cmp	w21, w0
-	bhi	.L2756
+	bhi	.L2936
 	cmp	w22, w0
-	bls	.L2757
-.L2756:
-.L2800:
-	b	.L2800
-.L2738:
+	bls	.L2937
+.L2936:
+.L2980:
+	b	.L2980
+.L2918:
 	add	w1, w1, 1
 	lsl	w3, w3, 1
 	and	w1, w1, 65535
-	b	.L2737
-.L2740:
+	b	.L2917
+.L2920:
 	add	w4, w4, 1
 	lsl	w1, w1, 1
 	and	w4, w4, 65535
-	b	.L2739
-.L2757:
+	b	.L2919
+.L2937:
 	bl	sblk_init
 	bl	ftl_info_blk_init
 	cmn	w0, #1
-	beq	.L2736
+	beq	.L2916
 	bl	ftl_ext_info_init
-	adrp	x19, .LANCHOR97
+	adrp	x19, .LANCHOR100
 	mov	w0, 1
 	bl	pm_init
 	bl	lpa_rebuild_hash
@@ -17228,7 +18414,7 @@ zftl_init:
 	add	x1, x0, 16
 	add	x0, x0, 48
 	bl	ftl_open_sblk_recovery
-	ldr	x1, [x19, #:lo12:.LANCHOR97]
+	ldr	x1, [x19, #:lo12:.LANCHOR100]
 	ldr	w0, [x1, 8]
 	add	w0, w0, 16
 	str	w0, [x1, 8]
@@ -17245,20 +18431,20 @@ zftl_init:
 	bl	pm_flush
 	mov	w0, 1
 	bl	ftl_total_vpn_update
-	adrp	x0, .LANCHOR181
-	ldrb	w0, [x0, #:lo12:.LANCHOR181]
-	cbz	w0, .L2759
-	ldr	x1, [x19, #:lo12:.LANCHOR97]
+	adrp	x0, .LANCHOR182
+	ldrb	w0, [x0, #:lo12:.LANCHOR182]
+	cbz	w0, .L2939
+	ldr	x1, [x19, #:lo12:.LANCHOR100]
 	ldr	w0, [x1, 68]
 	add	w0, w0, 1
 	str	w0, [x1, 68]
-.L2759:
+.L2939:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
 	bl	print_ftl_debug_info
 	mov	w0, 0
-.L2736:
+.L2916:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -17276,14 +18462,14 @@ rk_ftl_init:
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	bl	nand_flash_init
-	cbnz	w0, .L2804
+	cbnz	w0, .L2984
 	bl	zftl_init
-.L2804:
+.L2984:
 	mov	w19, w0
 	bl	idb_init
 	mov	w1, w19
-	adrp	x0, .LC190
-	add	x0, x0, :lo12:.LC190
+	adrp	x0, .LC201
+	add	x0, x0, :lo12:.LC201
 	bl	printf
 	mov	w0, w19
 	ldr	x19, [sp, 16]
@@ -17297,12 +18483,12 @@ rk_ftl_init:
 gc_update_l2p_map_new:
 	stp	x29, x30, [sp, -176]!
 	adrp	x0, .LANCHOR10
-	adrp	x1, .LANCHOR72
+	adrp	x1, .LANCHOR75
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	ldr	x21, [x0, #:lo12:.LANCHOR10]
 	stp	x25, x26, [sp, 64]
-	ldrh	w26, [x1, #:lo12:.LANCHOR72]
+	ldrh	w26, [x1, #:lo12:.LANCHOR75]
 	add	x1, x21, 80
 	stp	x23, x24, [sp, 48]
 	adrp	x24, .LANCHOR14
@@ -17312,12 +18498,12 @@ gc_update_l2p_map_new:
 	ldrb	w1, [x1, 9]
 	mul	w26, w26, w1
 	ldr	w1, [x24, #:lo12:.LANCHOR14]
-	tbz	x1, 8, .L2807
+	tbz	x1, 8, .L2987
 	ldrh	w1, [x21, 80]
-	adrp	x0, .LC191
-	add	x0, x0, :lo12:.LC191
+	adrp	x0, .LC202
+	add	x0, x0, :lo12:.LC202
 	bl	printf
-.L2807:
+.L2987:
 	adrp	x23, .LANCHOR9
 	ldrh	w1, [x21, 80]
 	sub	w2, w26, #1
@@ -17325,15 +18511,15 @@ gc_update_l2p_map_new:
 	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	mov	w25, 0
 	strh	w2, [x0, x1, lsl 1]
-	adrp	x0, .LANCHOR121
-	add	x0, x0, :lo12:.LANCHOR121
+	adrp	x0, .LANCHOR123
+	add	x0, x0, :lo12:.LANCHOR123
 	str	x0, [x29, 104]
-.L2808:
+.L2988:
 	mov	w28, w22
 	cmp	w26, w22
-	bhi	.L2818
+	bhi	.L2998
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2819
+	tbz	x0, 8, .L2999
 	ldr	x0, [x29, 128]
 	mov	w3, w25
 	ldr	x1, [x23, #:lo12:.LANCHOR9]
@@ -17341,22 +18527,22 @@ gc_update_l2p_map_new:
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldrh	w2, [x1, x2, lsl 1]
 	ldrh	w1, [x0, 80]
-	adrp	x0, .LC194
-	add	x0, x0, :lo12:.LC194
+	adrp	x0, .LC205
+	add	x0, x0, :lo12:.LC205
 	bl	printf
-.L2819:
+.L2999:
 	ldrh	w1, [x21, 80]
 	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, x1, lsl 1]
 	cmp	w25, w0
-	beq	.L2820
-	adrp	x1, .LANCHOR205
+	beq	.L3000
+	adrp	x1, .LANCHOR209
 	adrp	x0, .LC0
-	mov	w2, 489
-	add	x1, x1, :lo12:.LANCHOR205
+	mov	w2, 569
+	add	x1, x1, :lo12:.LANCHOR209
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2820:
+.L3000:
 	ldrh	w1, [x21, 80]
 	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	strh	w25, [x0, x1, lsl 1]
@@ -17369,77 +18555,77 @@ gc_update_l2p_map_new:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L2818:
-	adrp	x27, .LANCHOR147
+.L2998:
+	adrp	x27, .LANCHOR152
 	lsl	x19, x22, 2
-	ldr	x0, [x27, #:lo12:.LANCHOR147]
+	ldr	x0, [x27, #:lo12:.LANCHOR152]
 	ldr	w2, [x0, x19]
 	cmn	w2, #1
-	beq	.L2809
-	adrp	x0, .LANCHOR121
-	ldrb	w20, [x0, #:lo12:.LANCHOR121]
+	beq	.L2989
+	adrp	x0, .LANCHOR123
+	ldrb	w20, [x0, #:lo12:.LANCHOR123]
 	lsl	w20, w20, 7
 	udiv	w20, w2, w20
 	and	w0, w20, 65535
 	str	w0, [x29, 156]
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2810
+	tbz	x0, 8, .L2990
 	ldr	w1, [x29, 156]
-	adrp	x0, .LC192
+	adrp	x0, .LC203
 	mov	w3, w22
-	add	x0, x0, :lo12:.LC192
+	add	x0, x0, :lo12:.LC203
 	bl	printf
-.L2810:
+.L2990:
 	sub	w28, w26, w28
 	add	x28, x28, x22
 	lsl	x0, x28, 2
 	str	x0, [x29, 144]
-	adrp	x0, .LC193
-	add	x0, x0, :lo12:.LC193
+	adrp	x0, .LC204
+	add	x0, x0, :lo12:.LC204
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR99
-	add	x0, x0, :lo12:.LANCHOR99
+	adrp	x0, .LANCHOR102
+	add	x0, x0, :lo12:.LANCHOR102
 	str	x0, [x29, 112]
-.L2811:
+.L2991:
 	ldr	x0, [x29, 144]
 	cmp	x0, x19
-	bne	.L2817
-.L2809:
+	bne	.L2997
+.L2989:
 	add	x22, x22, 1
-	b	.L2808
-.L2817:
-	ldr	x0, [x27, #:lo12:.LANCHOR147]
+	b	.L2988
+.L2997:
+	ldr	x0, [x27, #:lo12:.LANCHOR152]
 	ldr	w20, [x0, x19]
 	cmn	w20, #1
-	beq	.L2812
+	beq	.L2992
 	ldr	x0, [x29, 104]
 	ldr	w1, [x29, 156]
 	ldrb	w0, [x0]
 	lsl	w0, w0, 7
 	udiv	w0, w20, w0
 	cmp	w1, w0, uxth
-	bne	.L2812
-	adrp	x0, .LANCHOR148
-	ldr	x0, [x0, #:lo12:.LANCHOR148]
+	bne	.L2992
+	adrp	x0, .LANCHOR153
+	ldr	x0, [x0, #:lo12:.LANCHOR153]
 	ldr	w28, [x0, x19]
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 172]
 	cmn	w0, #1
-	bne	.L2813
+	bne	.L2993
 	mov	w2, 0
 	add	x1, x29, 172
 	mov	w0, w20
 	bl	pm_log2phys
-.L2813:
+.L2993:
 	ldr	w3, [x29, 172]
 	cmp	w28, w3
-	bne	.L2814
-	adrp	x0, .LANCHOR149
+	bne	.L2994
+	adrp	x0, .LANCHOR154
 	mov	w2, 1
 	add	x1, x29, 168
 	add	w25, w25, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR149]
+	ldr	x0, [x0, #:lo12:.LANCHOR154]
 	ldr	w0, [x0, x19]
 	str	w0, [x29, 168]
 	mov	w0, w20
@@ -17453,28 +18639,28 @@ gc_update_l2p_map_new:
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
 	and	w28, w0, w28
-	adrp	x0, .LANCHOR98
-	ldrb	w0, [x0, #:lo12:.LANCHOR98]
+	adrp	x0, .LANCHOR101
+	ldrb	w0, [x0, #:lo12:.LANCHOR101]
 	udiv	w0, w28, w0
-.L2840:
+.L3020:
 	bl	ftl_vpn_decrement
-	ldr	x0, [x27, #:lo12:.LANCHOR147]
+	ldr	x0, [x27, #:lo12:.LANCHOR152]
 	mov	w1, -1
 	str	w1, [x0, x19]
-.L2812:
+.L2992:
 	add	x19, x19, 4
-	b	.L2811
-.L2814:
+	b	.L2991
+.L2994:
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2816
+	tbz	x0, 8, .L2996
 	ldr	x0, [x29, 120]
 	mov	w2, w28
 	mov	w1, w20
 	bl	printf
-.L2816:
+.L2996:
 	ldr	x0, [x29, 136]
 	ldrh	w0, [x0]
-	b	.L2840
+	b	.L3020
 	.size	gc_update_l2p_map_new, .-gc_update_l2p_map_new
 	.section	.text.gc_scan_src_blk_one_page,"ax",@progbits
 	.align	2
@@ -17487,56 +18673,56 @@ gc_scan_src_blk_one_page:
 	mov	w5, 65535
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR62
-	add	x1, x19, :lo12:.LANCHOR62
+	adrp	x19, .LANCHOR63
+	add	x1, x19, :lo12:.LANCHOR63
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	adrp	x20, .LANCHOR73
+	adrp	x20, .LANCHOR76
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	ldrb	w6, [x20, #:lo12:.LANCHOR73]
+	ldrb	w6, [x20, #:lo12:.LANCHOR76]
 	ldrb	w0, [x1, 4]
 	add	x2, x1, x0, sxtw 1
 	ldrh	w21, [x2, 40]
 	ldrh	w2, [x1, 2]
-.L2842:
+.L3022:
 	cmp	w21, w5
-	beq	.L2844
-	cbz	w4, .L2845
-	add	x1, x19, :lo12:.LANCHOR62
+	beq	.L3024
+	cbz	w4, .L3025
+	add	x1, x19, :lo12:.LANCHOR63
 	strh	w2, [x1, 2]
-.L2845:
-	cbz	w3, .L2846
-	add	x1, x19, :lo12:.LANCHOR62
+.L3025:
+	cbz	w3, .L3026
+	add	x1, x19, :lo12:.LANCHOR63
 	strb	w0, [x1, 4]
-.L2846:
+.L3026:
 	mov	w0, 1
-	adrp	x22, .LANCHOR105
+	adrp	x22, .LANCHOR107
 	bl	buf_alloc
-	adrp	x23, .LANCHOR68
+	adrp	x23, .LANCHOR69
 	mov	x24, x0
-	add	x22, x22, :lo12:.LANCHOR105
-	add	x23, x23, :lo12:.LANCHOR68
+	add	x22, x22, :lo12:.LANCHOR107
+	add	x23, x23, :lo12:.LANCHOR69
 	mov	w26, 1
-.L2847:
-	add	x25, x19, :lo12:.LANCHOR62
+.L3027:
+	add	x25, x19, :lo12:.LANCHOR63
 	ldrb	w1, [x25, 6]
 	cmp	w26, w1
-	ble	.L2855
+	ble	.L3035
 	mov	x0, x24
 	bl	buf_free
 	ldrb	w0, [x25, 4]
-	ldrb	w1, [x20, #:lo12:.LANCHOR73]
+	ldrb	w1, [x20, #:lo12:.LANCHOR76]
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x25, 4]
 	cmp	w1, w0
-	bne	.L2841
+	bne	.L3021
 	ldrh	w0, [x25, 2]
 	strb	wzr, [x25, 4]
 	add	w0, w0, 1
 	strh	w0, [x25, 2]
-.L2841:
+.L3021:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -17544,29 +18730,29 @@ gc_scan_src_blk_one_page:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2844:
+.L3024:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	cmp	w0, w6
-	bne	.L2843
+	bne	.L3023
 	add	w2, w2, 1
 	mov	w0, 0
 	and	w2, w2, 65535
 	mov	w4, 1
-.L2843:
+.L3023:
 	add	x3, x1, x0, sxtw 1
 	ldrh	w21, [x3, 40]
 	mov	w3, 1
-	b	.L2842
-.L2855:
+	b	.L3022
+.L3035:
 	ldrh	w0, [x22]
 	cmp	w1, 3
 	mul	w2, w0, w21
 	ldrh	w0, [x25, 2]
-	bne	.L2848
+	bne	.L3028
 	add	w0, w0, w2
 	orr	w0, w0, w26, lsl 24
-.L2864:
+.L3044:
 	str	w0, [x24, 40]
 	mov	w1, 1
 	mov	x0, x24
@@ -17575,51 +18761,51 @@ gc_scan_src_blk_one_page:
 	ldr	w0, [x24, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2852
+	beq	.L3032
 	ldr	x0, [x24, 24]
 	ldr	w27, [x0, 4]
 	mov	w0, w27
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 108]
 	cmn	w0, #1
-	bne	.L2853
+	bne	.L3033
 	mov	w2, 0
 	add	x1, x29, 108
 	mov	w0, w27
 	bl	pm_log2phys
-.L2853:
+.L3033:
 	ldr	w1, [x24, 40]
 	ldr	w0, [x29, 108]
 	cmp	w1, w0
-	bne	.L2852
-	add	x1, x19, :lo12:.LANCHOR62
-	adrp	x3, .LANCHOR65
-	ldr	x3, [x3, #:lo12:.LANCHOR65]
+	bne	.L3032
+	add	x1, x19, :lo12:.LANCHOR63
+	adrp	x3, .LANCHOR66
+	ldr	x3, [x3, #:lo12:.LANCHOR66]
 	ldrh	w0, [x1, 24]
 	ubfiz	x2, x0, 2, 16
 	add	w0, w0, 1
 	str	w25, [x3, x2]
 	strh	w0, [x1, 24]
-.L2852:
-	add	x1, x19, :lo12:.LANCHOR62
+.L3032:
+	add	x1, x19, :lo12:.LANCHOR63
 	add	w26, w26, 1
 	ldrh	w0, [x1, 26]
 	add	w0, w0, 1
 	strh	w0, [x1, 26]
-	b	.L2847
-.L2848:
+	b	.L3027
+.L3028:
 	cmp	w1, 2
-	bne	.L2850
+	bne	.L3030
 	lsl	w0, w0, 1
 	sub	w1, w0, #1
 	add	w0, w26, w2
 	add	w0, w1, w0
 	ldrb	w1, [x23]
 	orr	w0, w0, w1, lsl 24
-	b	.L2864
-.L2850:
+	b	.L3044
+.L3030:
 	add	w0, w0, w2
-	b	.L2864
+	b	.L3044
 	.size	gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page
 	.section	.text.gc_scan_src_blk,"ax",@progbits
 	.align	2
@@ -17630,50 +18816,50 @@ gc_scan_src_blk:
 	mov	w0, 65535
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR62
+	adrp	x19, .LANCHOR63
 	stp	x21, x22, [sp, 32]
-	ldrh	w1, [x19, #:lo12:.LANCHOR62]
+	ldrh	w1, [x19, #:lo12:.LANCHOR63]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w1, w0
-	bne	.L2866
-	adrp	x1, .LANCHOR206
+	bne	.L3046
+	adrp	x1, .LANCHOR210
 	adrp	x0, .LC0
-	mov	w2, 919
-	add	x1, x1, :lo12:.LANCHOR206
+	mov	w2, 1004
+	add	x1, x1, :lo12:.LANCHOR210
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2866:
-	ldrh	w1, [x19, #:lo12:.LANCHOR62]
+.L3046:
+	ldrh	w1, [x19, #:lo12:.LANCHOR63]
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L2886
+	beq	.L3066
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2868
+	tbz	x0, 8, .L3048
 	adrp	x2, .LANCHOR9
 	ubfiz	x0, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC195
-	add	x0, x0, :lo12:.LC195
+	adrp	x0, .LC206
+	add	x0, x0, :lo12:.LC206
 	bl	printf
-.L2868:
-	ldrh	w0, [x19, #:lo12:.LANCHOR62]
-	add	x14, x19, :lo12:.LANCHOR62
+.L3048:
+	ldrh	w0, [x19, #:lo12:.LANCHOR63]
+	add	x14, x19, :lo12:.LANCHOR63
 	add	x1, x14, 40
 	bl	ftl_get_blk_list_in_sblk
 	and	w1, w0, 255
 	strb	w1, [x14, 5]
-	cbnz	w1, .L2869
+	cbnz	w1, .L3049
 	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR62]
-.L2886:
+	strh	w0, [x19, #:lo12:.LANCHOR63]
+.L3066:
 	mov	w0, 0
-	b	.L2865
-.L2869:
+	b	.L3045
+.L3049:
 	adrp	x4, .LANCHOR7
-	ldrh	w3, [x19, #:lo12:.LANCHOR62]
+	ldrh	w3, [x19, #:lo12:.LANCHOR63]
 	mov	x22, x4
 	ldr	x1, [x4, #:lo12:.LANCHOR7]
 	mov	x2, x3
@@ -17681,67 +18867,67 @@ gc_scan_src_blk:
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 32
-	beq	.L2870
+	beq	.L3050
 	cmp	w1, 224
-	beq	.L2870
-	cbz	w1, .L2871
+	beq	.L3050
+	cbz	w1, .L3051
 	adrp	x1, .LANCHOR10
 	ldr	x1, [x1, #:lo12:.LANCHOR10]
 	ldrh	w3, [x1, 16]
 	cmp	w3, w2
-	beq	.L2870
+	beq	.L3050
 	ldrh	w3, [x1, 48]
 	cmp	w3, w2
-	beq	.L2870
+	beq	.L3050
 	ldrh	w1, [x1, 80]
 	cmp	w1, w2
-	bne	.L2900
-.L2870:
-	add	x0, x19, :lo12:.LANCHOR62
+	bne	.L3080
+.L3050:
+	add	x0, x19, :lo12:.LANCHOR63
 	mov	w1, -1
-	strh	w1, [x19, #:lo12:.LANCHOR62]
+	strh	w1, [x19, #:lo12:.LANCHOR63]
 	strh	wzr, [x0, 24]
-	b	.L2886
-.L2871:
+	b	.L3066
+.L3051:
 	adrp	x0, .LANCHOR9
 	mov	x20, x0
 	ldr	x1, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x1, x3, lsl 1]
-	cbz	w1, .L2873
-	adrp	x1, .LANCHOR206
+	cbz	w1, .L3053
+	adrp	x1, .LANCHOR210
 	adrp	x0, .LC0
-	mov	w2, 939
-	add	x1, x1, :lo12:.LANCHOR206
+	mov	w2, 1024
+	add	x1, x1, :lo12:.LANCHOR210
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2873:
-	ldrh	w1, [x19, #:lo12:.LANCHOR62]
+.L3053:
+	ldrh	w1, [x19, #:lo12:.LANCHOR63]
 	ldr	x0, [x20, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x1, lsl 1]
-	b	.L2870
-.L2900:
+	b	.L3050
+.L3080:
 	and	w0, w0, 255
 	sub	w0, w0, #1
 	add	x0, x14, x0, sxtw 1
 	ldrh	w21, [x0, 40]
 	mov	w0, 65535
 	cmp	w21, w0
-	bne	.L2874
-	adrp	x1, .LANCHOR206
+	bne	.L3054
+	adrp	x1, .LANCHOR210
 	adrp	x0, .LC0
-	mov	w2, 947
-	add	x1, x1, :lo12:.LANCHOR206
+	mov	w2, 1032
+	add	x1, x1, :lo12:.LANCHOR210
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2874:
-	adrp	x1, .LANCHOR105
+.L3054:
+	adrp	x1, .LANCHOR107
 	ldr	x3, [x22, #:lo12:.LANCHOR7]
-	adrp	x2, .LANCHOR80
-	adrp	x23, .LANCHOR72
-	ldrh	w20, [x1, #:lo12:.LANCHOR105]
+	adrp	x2, .LANCHOR83
+	adrp	x23, .LANCHOR75
+	ldrh	w20, [x1, #:lo12:.LANCHOR107]
 	mov	x24, x2
-	ldrh	w1, [x19, #:lo12:.LANCHOR62]
-	ldrh	w0, [x2, #:lo12:.LANCHOR80]
+	ldrh	w1, [x19, #:lo12:.LANCHOR63]
+	ldrh	w0, [x2, #:lo12:.LANCHOR83]
 	add	x1, x3, x1, lsl 2
 	sub	w0, w0, #1
 	and	w0, w0, 65535
@@ -17749,15 +18935,15 @@ gc_scan_src_blk:
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 160
-	bne	.L2887
-	adrp	x1, .LANCHOR68
-	ldrb	w21, [x1, #:lo12:.LANCHOR68]
+	bne	.L3067
+	adrp	x1, .LANCHOR69
+	ldrb	w21, [x1, #:lo12:.LANCHOR69]
 	cmp	w21, 2
 	orr	w20, w20, w21, lsl 24
-	beq	.L2876
+	beq	.L3056
 	and	w21, w21, 65535
-.L2875:
-	add	x22, x19, :lo12:.LANCHOR62
+.L3055:
+	add	x22, x19, :lo12:.LANCHOR63
 	orr	w20, w0, w20
 	mov	w0, 1
 	strb	w21, [x22, 6]
@@ -17769,106 +18955,106 @@ gc_scan_src_blk:
 	str	w20, [x0, 40]
 	mov	x25, x0
 	mov	w1, 1
-	adrp	x20, .LANCHOR65
+	adrp	x20, .LANCHOR66
 	bl	sblk_read_page
-	ldrh	w2, [x23, #:lo12:.LANCHOR72]
-	adrp	x23, .LANCHOR73
+	ldrh	w2, [x23, #:lo12:.LANCHOR75]
+	adrp	x23, .LANCHOR76
 	mov	w1, 255
-	ldrb	w0, [x23, #:lo12:.LANCHOR73]
+	ldrb	w0, [x23, #:lo12:.LANCHOR76]
 	mul	w2, w2, w0
-	ldr	x0, [x20, #:lo12:.LANCHOR65]
+	ldr	x0, [x20, #:lo12:.LANCHOR66]
 	lsl	w2, w2, 2
 	bl	ftl_memset
 	strh	wzr, [x22, 24]
 	ldr	w0, [x25, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L2877
-.L2902:
+	bne	.L3057
+.L3082:
 	mov	x0, x25
 	bl	buf_free
 	mov	w0, -1
-.L2865:
+.L3045:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2876:
-	ldrh	w0, [x23, #:lo12:.LANCHOR72]
+.L3056:
+	ldrh	w0, [x23, #:lo12:.LANCHOR75]
 	sub	w0, w0, #1
 	and	w0, w0, 65535
-	b	.L2875
-.L2887:
+	b	.L3055
+.L3067:
 	mov	w21, 1
-	b	.L2875
-.L2877:
+	b	.L3055
+.L3057:
 	ldr	x0, [x25, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L2878
-	mov	w2, 980
-	adrp	x1, .LANCHOR206
+	beq	.L3058
+	mov	w2, 1065
+	adrp	x1, .LANCHOR210
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR206
+	add	x1, x1, :lo12:.LANCHOR210
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L2902
-.L2878:
-	ldrb	w0, [x23, #:lo12:.LANCHOR73]
-	adrp	x22, .LANCHOR99
-	ldrh	w1, [x24, #:lo12:.LANCHOR80]
-	adrp	x23, .LANCHOR98
+	b	.L3082
+.L3058:
+	ldrb	w0, [x23, #:lo12:.LANCHOR76]
+	adrp	x22, .LANCHOR102
+	ldrh	w1, [x24, #:lo12:.LANCHOR83]
+	adrp	x23, .LANCHOR101
 	ldr	x24, [x25, 8]
-	add	x22, x22, :lo12:.LANCHOR99
-	add	x23, x23, :lo12:.LANCHOR98
+	add	x22, x22, :lo12:.LANCHOR102
+	add	x23, x23, :lo12:.LANCHOR101
 	mov	x26, 0
 	mul	w0, w0, w1
 	mul	w21, w21, w0
 	and	w21, w21, 65535
-.L2879:
+.L3059:
 	cmp	w21, w26
-	bgt	.L2884
+	bgt	.L3064
 	mov	x0, x25
 	bl	buf_free
 	adrp	x0, .LANCHOR9
-	ldrh	w1, [x19, #:lo12:.LANCHOR62]
-	add	x3, x19, :lo12:.LANCHOR62
+	ldrh	w1, [x19, #:lo12:.LANCHOR63]
+	add	x3, x19, :lo12:.LANCHOR63
 	mov	x20, x0
 	ldr	x4, [x0, #:lo12:.LANCHOR9]
 	ubfiz	x2, x1, 1, 16
 	ldrh	w3, [x3, 24]
 	ldrh	w2, [x4, x2]
 	cmp	w2, w3
-	beq	.L2885
-	adrp	x0, .LC196
-	add	x0, x0, :lo12:.LC196
+	beq	.L3065
+	adrp	x0, .LC207
+	add	x0, x0, :lo12:.LC207
 	bl	printf
-.L2885:
-	add	x0, x19, :lo12:.LANCHOR62
-	ldrh	w2, [x19, #:lo12:.LANCHOR62]
+.L3065:
+	add	x0, x19, :lo12:.LANCHOR63
+	ldrh	w2, [x19, #:lo12:.LANCHOR63]
 	ldr	x1, [x20, #:lo12:.LANCHOR9]
 	ldrh	w3, [x0, 24]
 	strh	w3, [x1, x2, lsl 1]
 	strh	wzr, [x0, 28]
 	ldrh	w0, [x0, 24]
-	b	.L2865
-.L2884:
+	b	.L3045
+.L3064:
 	ldr	w0, [x24, x26, lsl 2]
 	cmn	w0, #1
-	beq	.L2881
+	beq	.L3061
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 92]
 	cmn	w0, #1
-	bne	.L2882
+	bne	.L3062
 	ldr	w0, [x24, x26, lsl 2]
 	mov	w2, 0
 	add	x1, x29, 92
 	bl	pm_log2phys
-.L2882:
+.L3062:
 	ldrh	w1, [x22]
 	mov	w0, 21
 	ldr	w3, [x29, 92]
@@ -17879,20 +19065,20 @@ gc_scan_src_blk:
 	lsr	w1, w3, w1
 	and	w0, w0, w1
 	ldrb	w1, [x23]
-	ldrh	w2, [x19, #:lo12:.LANCHOR62]
+	ldrh	w2, [x19, #:lo12:.LANCHOR63]
 	udiv	w0, w0, w1
-	add	x1, x19, :lo12:.LANCHOR62
+	add	x1, x19, :lo12:.LANCHOR63
 	cmp	w0, w2
-	bne	.L2881
+	bne	.L3061
 	ldrh	w0, [x1, 24]
-	ldr	x4, [x20, #:lo12:.LANCHOR65]
+	ldr	x4, [x20, #:lo12:.LANCHOR66]
 	ubfiz	x2, x0, 2, 16
 	add	w0, w0, 1
 	str	w3, [x4, x2]
 	strh	w0, [x1, 24]
-.L2881:
+.L3061:
 	add	x26, x26, 1
-	b	.L2879
+	b	.L3059
 	.size	gc_scan_src_blk, .-gc_scan_src_blk
 	.section	.text.gc_scan_static_data,"ax",@progbits
 	.align	2
@@ -17908,13 +19094,13 @@ gc_scan_static_data:
 	ldr	w1, [x0, 544]
 	str	x23, [sp, 48]
 	cmn	w1, #1
-	beq	.L2904
-	adrp	x21, .LANCHOR207
+	beq	.L3084
+	adrp	x21, .LANCHOR211
 	adrp	x22, .LC0
-	add	x21, x21, :lo12:.LANCHOR207
+	add	x21, x21, :lo12:.LANCHOR211
 	add	x22, x22, :lo12:.LC0
 	mov	w20, 11
-.L2912:
+.L3092:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w2, 0
 	add	x1, x29, 76
@@ -17922,7 +19108,7 @@ gc_scan_static_data:
 	bl	pm_log2phys
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L2905
+	beq	.L3085
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 76]
@@ -17932,45 +19118,45 @@ gc_scan_static_data:
 	bl	sblk_read_page
 	ldr	w0, [x23, 52]
 	cmp	w0, 256
-	bne	.L2906
-	adrp	x0, .LANCHOR99
+	bne	.L3086
+	adrp	x0, .LANCHOR102
 	ldr	w2, [x29, 76]
 	mov	w1, 1
-	ldrh	w3, [x0, #:lo12:.LANCHOR99]
+	ldrh	w3, [x0, #:lo12:.LANCHOR102]
 	mov	w0, 21
 	sub	w0, w0, w3
 	lsr	w2, w2, w3
 	lsl	w0, w1, w0
 	sub	w0, w0, #1
 	and	w0, w0, w2
-	adrp	x2, .LANCHOR98
-	ldrb	w3, [x2, #:lo12:.LANCHOR98]
+	adrp	x2, .LANCHOR101
+	ldrb	w3, [x2, #:lo12:.LANCHOR101]
 	mov	w2, 0
 	udiv	w0, w0, w3
 	bl	gc_add_sblk
-.L2906:
+.L3086:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldr	x1, [x23, 24]
 	ldr	w0, [x0, 544]
 	ldr	w1, [x1, 4]
 	cmp	w1, w0
-	beq	.L2907
-	mov	w2, 1419
+	beq	.L3087
+	mov	w2, 1504
 	mov	x1, x21
 	mov	x0, x22
 	bl	printf
-.L2907:
+.L3087:
 	mov	x0, x23
 	bl	buf_free
-.L2905:
+.L3085:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
-	adrp	x2, .LANCHOR118
-	ldr	w2, [x2, #:lo12:.LANCHOR118]
+	adrp	x2, .LANCHOR120
+	ldr	w2, [x2, #:lo12:.LANCHOR120]
 	ldr	w1, [x0, 544]
 	add	w1, w1, 1
 	str	w1, [x0, 544]
 	cmp	w1, w2
-	bcc	.L2908
+	bcc	.L3088
 	mov	w1, -1
 	str	w1, [x0, 544]
 	ldr	w1, [x0, 548]
@@ -17981,42 +19167,42 @@ gc_scan_static_data:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2903:
+.L3083:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2908:
+.L3088:
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	bne	.L2903
+	bne	.L3083
 	sub	w20, w20, #1
 	ands	w20, w20, 65535
-	bne	.L2912
-	b	.L2903
-.L2904:
+	bne	.L3092
+	b	.L3083
+.L3084:
 	ldr	w1, [x0, 536]
-	adrp	x3, .LANCHOR97
+	adrp	x3, .LANCHOR100
 	ldr	w2, [x0, 12]
 	add	w1, w1, 12959744
 	add	w1, w1, 256
 	cmp	w2, w1
-	bhi	.L2914
-	ldr	x4, [x3, #:lo12:.LANCHOR97]
+	bhi	.L3094
+	ldr	x4, [x3, #:lo12:.LANCHOR100]
+	mov	w5, 5000
 	ldr	w1, [x0, 540]
-	add	w1, w1, 98304
+	add	w1, w1, w5
 	ldr	w4, [x4, 44]
-	add	w1, w1, 1696
 	cmp	w4, w1
-	bls	.L2903
-.L2914:
-	ldr	x1, [x3, #:lo12:.LANCHOR97]
+	bls	.L3083
+.L3094:
+	ldr	x1, [x3, #:lo12:.LANCHOR100]
 	ldr	w1, [x1, 44]
 	str	w1, [x0, 540]
 	str	w2, [x0, 536]
 	str	wzr, [x0, 544]
-	b	.L2903
+	b	.L3083
 	.size	gc_scan_static_data, .-gc_scan_static_data
 	.section	.text.ftl_sblk_dump,"ax",@progbits
 	.align	2
@@ -18042,49 +19228,49 @@ ftl_sblk_dump:
 	ldrb	w2, [x1, 2]
 	mov	w1, w21
 	ldrh	w4, [x0, x23]
-	adrp	x0, .LC197
+	adrp	x0, .LC208
 	ubfx	x5, x5, 11, 8
-	add	x0, x0, :lo12:.LC197
+	add	x0, x0, :lo12:.LC208
 	ubfx	x3, x2, 3, 2
 	and	w4, w4, 2047
 	ubfx	x2, x2, 5, 3
 	bl	printf
 	mov	w0, 65535
 	cmp	w21, w0
-	beq	.L2941
+	beq	.L3121
 	adrp	x0, .LANCHOR6
 	ldrh	w0, [x0, #:lo12:.LANCHOR6]
 	cmp	w0, w21
-	bls	.L2941
+	bls	.L3121
 	ldr	x0, [x24, #:lo12:.LANCHOR7]
 	add	x0, x0, x23
 	ldrb	w0, [x0, 2]
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L2942
-	adrp	x0, .LANCHOR68
-	ldrb	w25, [x0, #:lo12:.LANCHOR68]
-.L2922:
+	bne	.L3122
+	adrp	x0, .LANCHOR69
+	ldrb	w25, [x0, #:lo12:.LANCHOR69]
+.L3102:
 	add	x28, x29, 224
-	adrp	x19, .LANCHOR80
+	adrp	x19, .LANCHOR83
 	mov	w0, w21
 	mov	w27, 0
 	mov	w20, 0
 	strh	w21, [x28, -32]!
 	add	x1, x28, 16
 	bl	ftl_get_blk_list_in_sblk
-	ldrh	w2, [x19, #:lo12:.LANCHOR80]
+	ldrh	w2, [x19, #:lo12:.LANCHOR83]
 	and	w1, w0, 255
 	strb	w1, [x29, 201]
 	and	w4, w0, 255
 	strb	wzr, [x29, 197]
 	mov	w3, w25
 	strh	wzr, [x29, 194]
-	adrp	x0, .LC198
+	adrp	x0, .LC209
 	mul	w1, w1, w2
 	strh	wzr, [x29, 202]
 	strh	w1, [x29, 198]
-	add	x0, x0, :lo12:.LC198
+	add	x0, x0, :lo12:.LC209
 	ldr	x1, [x24, #:lo12:.LANCHOR7]
 	add	x1, x1, x23
 	ldrb	w2, [x1, 2]
@@ -18096,39 +19282,39 @@ ftl_sblk_dump:
 	str	x19, [x29, 136]
 	mov	x26, x0
 	stp	wzr, wzr, [x29, 164]
-	adrp	x0, .LANCHOR105
-	add	x0, x0, :lo12:.LANCHOR105
+	adrp	x0, .LANCHOR107
+	add	x0, x0, :lo12:.LANCHOR107
 	str	x0, [x29, 112]
-.L2923:
+.L3103:
 	ldr	x0, [x29, 136]
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
 	cmp	w0, w20
-	bls	.L2938
+	bls	.L3118
 	lsl	w0, w20, 1
 	str	wzr, [x29, 172]
 	sub	w0, w0, #1
 	str	w0, [x29, 160]
-	adrp	x0, .LC152
-	add	x0, x0, :lo12:.LC152
+	adrp	x0, .LC155
+	add	x0, x0, :lo12:.LC155
 	str	x0, [x29, 120]
-	b	.L2939
-.L2942:
+	b	.L3119
+.L3122:
 	mov	w25, 1
-	b	.L2922
-.L2935:
+	b	.L3102
+.L3115:
 	ldr	x0, [x29, 128]
 	ldrh	w10, [x28, x0]
 	mov	w0, 65535
 	cmp	w10, w0
-	beq	.L2924
+	beq	.L3104
 	ldr	x0, [x29, 112]
 	cmp	w25, 3
 	ldrh	w19, [x0]
 	mul	w19, w19, w10
-	bne	.L2925
+	bne	.L3105
 	add	w19, w20, w19
 	orr	w19, w19, w22, lsl 24
-.L2926:
+.L3106:
 	str	w19, [x26, 40]
 	mov	w1, 1
 	str	w10, [x29, 104]
@@ -18170,22 +19356,22 @@ ftl_sblk_dump:
 	and	w0, w0, 224
 	cmp	w0, 224
 	ccmp	w0, w1, 4, ne
-	beq	.L2924
+	beq	.L3104
 	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L2929
+	bne	.L3109
 	ldr	x0, [x26, 24]
 	mov	w2, 0
 	add	x1, x29, 188
 	ldr	w0, [x0, 4]
 	bl	pm_log2phys
-.L2929:
+.L3109:
 	ldr	w0, [x29, 188]
 	cmp	w19, w0
-	bne	.L2930
+	bne	.L3110
 	ldr	w0, [x29, 168]
 	mov	w1, w19
 	add	w0, w0, 1
@@ -18193,81 +19379,81 @@ ftl_sblk_dump:
 	ldr	x0, [x26, 24]
 	ldr	w3, [x29, 168]
 	ldr	w2, [x0, 4]
-	adrp	x0, .LC199
-	add	x0, x0, :lo12:.LC199
+	adrp	x0, .LC210
+	add	x0, x0, :lo12:.LC210
 	bl	printf
-.L2930:
+.L3110:
 	ldr	x0, [x29, 152]
-	cbz	x0, .L2932
+	cbz	x0, .L3112
 	ubfiz	x19, x27, 2, 32
 	ldr	w2, [x0, x19]
 	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	cmp	w0, w2
-	beq	.L2933
+	beq	.L3113
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2933
-	adrp	x0, .LC200
+	tbz	x0, 12, .L3113
+	adrp	x0, .LC211
 	mov	w1, w27
-	add	x0, x0, :lo12:.LC200
+	add	x0, x0, :lo12:.LC211
 	bl	printf
-.L2933:
+.L3113:
 	ldr	x1, [x26, 24]
 	ldr	x0, [x29, 152]
 	ldr	w1, [x1, 4]
 	ldr	w0, [x0, x19]
 	cmp	w1, w0
-	beq	.L2932
+	beq	.L3112
 	cmn	w0, #1
-	beq	.L2932
-	adrp	x1, .LANCHOR208
+	beq	.L3112
+	adrp	x1, .LANCHOR212
 	adrp	x0, .LC0
 	mov	w2, 1299
-	add	x1, x1, :lo12:.LANCHOR208
+	add	x1, x1, :lo12:.LANCHOR212
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2932:
+.L3112:
 	add	w27, w27, 1
-.L2924:
+.L3104:
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L2937:
+.L3117:
 	cmp	w25, w22
-	bcs	.L2935
+	bcs	.L3115
 	ldr	w0, [x29, 172]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	str	w0, [x29, 172]
-.L2939:
+.L3119:
 	ldrb	w0, [x29, 201]
 	ldr	w1, [x29, 172]
 	cmp	w0, w1
-	bls	.L2936
+	bls	.L3116
 	ldrsw	x0, [x29, 172]
 	mov	w22, 1
 	add	x0, x0, 8
 	lsl	x0, x0, 1
 	str	x0, [x29, 128]
-	b	.L2937
-.L2925:
+	b	.L3117
+.L3105:
 	cmp	w25, 2
-	bne	.L2927
+	bne	.L3107
 	ldr	w0, [x29, 160]
 	add	w19, w19, w0
-	adrp	x0, .LANCHOR68
+	adrp	x0, .LANCHOR69
 	add	w19, w19, w22
-	ldrb	w0, [x0, #:lo12:.LANCHOR68]
+	ldrb	w0, [x0, #:lo12:.LANCHOR69]
 	orr	w19, w19, w0, lsl 24
-	b	.L2926
-.L2927:
+	b	.L3106
+.L3107:
 	add	w19, w20, w19
-	b	.L2926
-.L2936:
+	b	.L3106
+.L3116:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2923
-.L2938:
+	b	.L3103
+.L3118:
 	mov	x0, x26
 	bl	buf_free
 	adrp	x0, .LANCHOR9
@@ -18276,11 +19462,11 @@ ftl_sblk_dump:
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w2, [x0, x1, lsl 1]
 	mov	w1, w21
-	adrp	x0, .LC201
-	add	x0, x0, :lo12:.LC201
+	adrp	x0, .LC212
+	add	x0, x0, :lo12:.LC212
 	bl	printf
 	ldr	w0, [x29, 164]
-.L2920:
+.L3100:
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
 	ldp	x23, x24, [sp, 96]
@@ -18289,92 +19475,94 @@ ftl_sblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 272
 	ret
-.L2941:
+.L3121:
 	mov	w0, 0
-	b	.L2920
+	b	.L3100
 	.size	ftl_sblk_dump, .-ftl_sblk_dump
 	.section	.text.zftl_read,"ax",@progbits
 	.align	2
 	.global	zftl_read
 	.type	zftl_read, %function
 zftl_read:
-	stp	x29, x30, [sp, -192]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
+	sub	sp, sp, #208
+	stp	x29, x30, [sp, 16]
+	add	x29, sp, 16
+	stp	x19, x20, [sp, 32]
 	mov	w20, w0
 	adrp	x0, .LANCHOR14
-	stp	x21, x22, [sp, 32]
-	stp	x25, x26, [sp, 64]
+	stp	x21, x22, [sp, 48]
+	stp	x25, x26, [sp, 80]
 	mov	w19, w1
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	mov	w26, w2
-	stp	x23, x24, [sp, 48]
+	stp	x23, x24, [sp, 64]
 	mov	x22, x3
-	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2953
+	stp	x27, x28, [sp, 96]
+	tbz	x0, 12, .L3133
 	mov	w3, w2
-	adrp	x0, .LC202
+	adrp	x0, .LC213
 	mov	w2, w1
-	add	x0, x0, :lo12:.LC202
+	add	x0, x0, :lo12:.LC213
 	mov	w1, w20
 	bl	printf
-.L2953:
-	cbnz	w20, .L2954
-	adrp	x0, .LANCHOR58
+.L3133:
+	cbnz	w20, .L3134
+	adrp	x0, .LANCHOR59
 	mov	w20, 24576
-	ldr	w0, [x0, #:lo12:.LANCHOR58]
-.L2955:
+	ldr	w0, [x0, #:lo12:.LANCHOR59]
+.L3135:
 	add	w1, w19, w26
 	cmp	w0, w1
-	bcc	.L2983
-	adrp	x1, .LANCHOR97
+	bcc	.L3163
+	adrp	x1, .LANCHOR100
 	add	w20, w20, w19
 	add	w3, w26, w20
 	stp	w3, wzr, [x29, 160]
-	ldr	x2, [x1, #:lo12:.LANCHOR97]
+	ldr	x2, [x1, #:lo12:.LANCHOR100]
 	sub	w3, w3, #1
 	str	x1, [x29, 120]
 	ldr	w0, [x2, 24]
 	add	w0, w0, w26
 	str	w0, [x2, 24]
-	adrp	x0, .LANCHOR121
+	adrp	x0, .LANCHOR123
 	str	x0, [x29, 168]
-	ldrb	w2, [x0, #:lo12:.LANCHOR121]
-	adrp	x0, .LANCHOR125
-	add	x28, x0, :lo12:.LANCHOR125
+	ldrb	w2, [x0, #:lo12:.LANCHOR123]
+	adrp	x0, .LANCHOR127
+	add	x28, x0, :lo12:.LANCHOR127
 	udiv	w27, w20, w2
 	udiv	w2, w3, w2
 	mov	w21, w27
 	sub	w25, w2, w27
 	str	w2, [x29, 156]
 	add	w25, w25, 1
-.L2957:
-	cbnz	w25, .L2981
+.L3137:
+	cbnz	w25, .L3161
 	ldr	w0, [x29, 164]
-.L2952:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 192
+.L3132:
+	ldp	x19, x20, [sp, 32]
+	ldp	x21, x22, [sp, 48]
+	ldp	x23, x24, [sp, 64]
+	ldp	x25, x26, [sp, 80]
+	ldp	x27, x28, [sp, 96]
+	ldp	x29, x30, [sp, 16]
+	add	sp, sp, 208
 	ret
-.L2954:
+.L3134:
 	cmp	w20, 3
-	bhi	.L2983
+	bhi	.L3163
 	lsl	w20, w20, 13
 	mov	w0, 8192
-	b	.L2955
-.L2981:
+	b	.L3135
+.L3161:
 	ldr	x0, [x29, 168]
 	cmp	w21, w27
-	ldrb	w1, [x0, #:lo12:.LANCHOR121]
+	ldrb	w1, [x0, #:lo12:.LANCHOR123]
 	ldr	w0, [x29, 156]
 	and	w19, w1, 65535
 	ccmp	w21, w0, 4, ne
-	bne	.L2984
+	bne	.L3164
 	cmp	w21, w27
-	bne	.L2959
+	bne	.L3139
 	udiv	w24, w20, w1
 	and	w0, w26, 65535
 	msub	w1, w24, w1, w20
@@ -18383,18 +19571,18 @@ zftl_read:
 	and	w19, w19, 65535
 	cmp	w26, w19
 	csel	w19, w0, w19, cc
-.L2958:
-	adrp	x23, .LANCHOR49
-	add	x1, x23, :lo12:.LANCHOR49
+.L3138:
+	adrp	x23, .LANCHOR50
+	add	x1, x23, :lo12:.LANCHOR50
 	add	x1, x1, 2
 	mov	w0, 0
-.L2962:
+.L3142:
 	ldr	w2, [x1, 34]
 	cmp	w21, w2
-	bne	.L2960
+	bne	.L3140
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L2960
-	add	x1, x23, :lo12:.LANCHOR49
+	tbz	x2, 3, .L3140
+	add	x1, x23, :lo12:.LANCHOR50
 	ubfiz	x0, x0, 6, 32
 	add	x0, x1, x0
 	lsl	w2, w19, 9
@@ -18405,89 +19593,89 @@ zftl_read:
 	add	x22, x22, x19
 	add	x1, x1, x24
 	bl	ftl_memcpy
-.L2961:
+.L3141:
 	add	w21, w21, 1
 	sub	w25, w25, #1
-.L2968:
-	adrp	x0, .LANCHOR51
-	ldrb	w0, [x0, #:lo12:.LANCHOR51]
+.L3148:
+	adrp	x0, .LANCHOR52
+	ldrb	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, 2
-	bls	.L2969
-	cbnz	w25, .L2957
-.L2969:
-	adrp	x0, .LANCHOR125
-	ldrb	w1, [x0, #:lo12:.LANCHOR125]
-	cbz	w1, .L2957
-	adrp	x24, .LANCHOR124
-	add	x0, x23, :lo12:.LANCHOR49
-	ldrb	w2, [x24, #:lo12:.LANCHOR124]
+	bls	.L3149
+	cbnz	w25, .L3137
+.L3149:
+	adrp	x0, .LANCHOR127
+	ldrb	w1, [x0, #:lo12:.LANCHOR127]
+	cbz	w1, .L3137
+	adrp	x24, .LANCHOR126
+	add	x0, x23, :lo12:.LANCHOR50
+	ldrb	w2, [x24, #:lo12:.LANCHOR126]
 	add	x0, x0, x2, lsl 6
 	bl	sblk_read_page
-	adrp	x0, .LANCHOR209
-	add	x0, x0, :lo12:.LANCHOR209
+	adrp	x0, .LANCHOR213
+	add	x0, x0, :lo12:.LANCHOR213
 	str	x0, [x29, 136]
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	str	x0, [x29, 128]
-.L2971:
+.L3151:
 	ldrb	w0, [x28]
-	cbnz	w0, .L2980
+	cbnz	w0, .L3160
 	mov	w0, -1
 	strb	wzr, [x28]
-	strb	w0, [x24, #:lo12:.LANCHOR124]
-	b	.L2957
-.L2959:
+	strb	w0, [x24, #:lo12:.LANCHOR126]
+	b	.L3137
+.L3139:
 	ldr	w0, [x29, 160]
 	msub	w19, w1, w21, w0
 	and	w19, w19, 255
-.L2984:
+.L3164:
 	mov	w24, 0
-	b	.L2958
-.L2960:
+	b	.L3138
+.L3140:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 32
-	bne	.L2962
+	bne	.L3142
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L2963
+	bne	.L3143
 	mov	w2, 0
 	add	x1, x29, 188
 	mov	w0, w21
 	bl	pm_log2phys
-.L2963:
+.L3143:
 	ldr	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L2964
+	bne	.L3144
 	ldr	x0, [x29, 168]
 	mov	w19, 0
-	add	x24, x0, :lo12:.LANCHOR121
-.L2965:
+	add	x24, x0, :lo12:.LANCHOR123
+.L3145:
 	ldrb	w0, [x24]
 	cmp	w19, w0
-	bcs	.L2961
+	bcs	.L3141
 	madd	w0, w21, w0, w19
 	cmp	w20, w0
-	bhi	.L2966
+	bhi	.L3146
 	ldr	w1, [x29, 160]
 	cmp	w1, w0
-	bls	.L2966
+	bls	.L3146
 	mov	x0, x22
 	add	x22, x22, 512
 	mov	w2, 512
 	mov	w1, 0
 	bl	ftl_memset
-.L2966:
+.L3146:
 	add	w19, w19, 1
-	b	.L2965
-.L2964:
+	b	.L3145
+.L3144:
 	mov	w0, 0
 	bl	buf_alloc
-	cbz	x0, .L2968
+	cbz	x0, .L3148
 	ldr	x2, [x29, 120]
-	ldr	x3, [x2, #:lo12:.LANCHOR97]
+	ldr	x3, [x2, #:lo12:.LANCHOR100]
 	ldr	w2, [x3, 40]
 	add	w2, w2, 1
 	str	w2, [x3, 40]
@@ -18500,58 +19688,61 @@ zftl_read:
 	stp	w21, w2, [x0, 36]
 	str	w2, [x0, 44]
 	bl	zftl_add_read_buf
-	b	.L2961
-.L2980:
-	ldrb	w0, [x24, #:lo12:.LANCHOR124]
+	b	.L3141
+.L3160:
+	ldrb	w0, [x24, #:lo12:.LANCHOR126]
 	cmp	w0, 255
-	bne	.L2972
+	bne	.L3152
 	ldp	x0, x1, [x29, 128]
-	mov	w2, 1065
+	mov	w2, 1070
 	bl	printf
-.L2972:
-	ldrb	w19, [x24, #:lo12:.LANCHOR124]
-	add	x0, x23, :lo12:.LANCHOR49
+.L3152:
+	ldrb	w19, [x24, #:lo12:.LANCHOR126]
+	add	x0, x23, :lo12:.LANCHOR50
 	ubfiz	x1, x19, 6, 8
 	lsl	x2, x19, 6
 	add	x1, x0, x1
 	str	x1, [x29, 144]
 	add	x1, x0, x2
 	ldrb	w0, [x0, x2]
-	strb	w0, [x24, #:lo12:.LANCHOR124]
+	strb	w0, [x24, #:lo12:.LANCHOR126]
 	ldr	w8, [x1, 52]
 	cmn	w8, #1
-	bne	.L2973
+	bne	.L3153
 	adrp	x0, .LANCHOR10
 	str	w8, [x29, 164]
 	ldr	x1, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x1, 552]
 	add	w0, w0, 1
 	str	w0, [x1, 552]
-.L2974:
-	add	x10, x23, :lo12:.LANCHOR49
+.L3154:
+	add	x10, x23, :lo12:.LANCHOR50
 	add	x10, x10, x19, lsl 6
 	ldr	x0, [x10, 24]
-	ldr	w2, [x10, 36]
+	ldr	w3, [x10, 36]
 	ldr	w1, [x0, 4]
-	cmp	w1, w2
-	beq	.L2975
+	cmp	w1, w3
+	beq	.L3155
 	adrp	x1, .LANCHOR10
 	str	w8, [x29, 152]
 	str	x10, [x29, 112]
-	ldr	x3, [x1, #:lo12:.LANCHOR10]
-	ldr	w1, [x3, 552]
+	ldr	x2, [x1, #:lo12:.LANCHOR10]
+	ldr	w1, [x2, 552]
 	add	w1, w1, 1
-	str	w1, [x3, 552]
+	str	w1, [x2, 552]
 	ldrb	w1, [x10, 1]
-	ldp	w4, w5, [x0]
-	ldp	w6, w7, [x0, 8]
-	adrp	x0, .LC204
-	ldr	w3, [x10, 40]
-	add	x0, x0, :lo12:.LC204
+	ldr	w2, [x0, 12]
+	str	w2, [sp]
+	mov	w2, w8
+	ldp	w5, w6, [x0]
+	ldr	w7, [x0, 8]
+	adrp	x0, .LC215
+	ldr	w4, [x10, 40]
+	add	x0, x0, :lo12:.LC215
 	bl	printf
 	ldr	x10, [x29, 112]
-	adrp	x0, .LANCHOR99
-	ldrh	w3, [x0, #:lo12:.LANCHOR99]
+	adrp	x0, .LANCHOR102
+	ldrh	w3, [x0, #:lo12:.LANCHOR102]
 	mov	w0, 21
 	ldr	w1, [x10, 40]
 	sub	w2, w0, w3
@@ -18560,34 +19751,34 @@ zftl_read:
 	sub	w0, w0, #1
 	lsr	w1, w1, w3
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR98
-	ldrb	w2, [x1, #:lo12:.LANCHOR98]
+	adrp	x1, .LANCHOR101
+	ldrb	w2, [x1, #:lo12:.LANCHOR101]
 	mov	x1, 0
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
 	ldr	w8, [x29, 152]
-.L2975:
-	add	x0, x23, :lo12:.LANCHOR49
+.L3155:
+	add	x0, x23, :lo12:.LANCHOR50
 	add	x0, x0, x19, lsl 6
 	ldr	x1, [x0, 24]
 	ldr	w0, [x0, 36]
 	ldr	w1, [x1, 4]
 	cmp	w1, w0
-	bne	.L2976
+	bne	.L3156
 	cmn	w8, #1
-	bne	.L2977
-.L2976:
+	bne	.L3157
+.L3156:
 	ldp	x0, x1, [x29, 128]
-	mov	w2, 1086
+	mov	w2, 1091
 	bl	printf
-.L2977:
-	add	x0, x23, :lo12:.LANCHOR49
+.L3157:
+	add	x0, x23, :lo12:.LANCHOR50
 	add	x19, x0, x19, lsl 6
 	ldr	x0, [x29, 168]
 	ldrb	w2, [x19, 56]
-	ldrb	w0, [x0, #:lo12:.LANCHOR121]
+	ldrb	w0, [x0, #:lo12:.LANCHOR123]
 	cmp	w0, w2
-	bls	.L2978
+	bls	.L3158
 	ldrb	w0, [x19, 57]
 	lsl	w2, w2, 9
 	ldr	x1, [x19, 8]
@@ -18595,55 +19786,55 @@ zftl_read:
 	add	x1, x1, x0
 	ldr	x0, [x19, 16]
 	bl	ftl_memcpy
-.L2979:
+.L3159:
 	ldr	x1, [x29, 144]
-	adrp	x0, .LANCHOR127
-	add	x0, x0, :lo12:.LANCHOR127
+	adrp	x0, .LANCHOR129
+	add	x0, x0, :lo12:.LANCHOR129
 	bl	buf_remove_buf
 	ldr	x0, [x29, 144]
 	bl	buf_free
 	ldrb	w0, [x28]
 	sub	w0, w0, #1
 	strb	w0, [x28]
-	b	.L2971
-.L2973:
+	b	.L3151
+.L3153:
 	cmp	w8, 256
-	bne	.L2974
-	adrp	x0, .LANCHOR99
+	bne	.L3154
+	adrp	x0, .LANCHOR102
 	mov	w4, 21
 	ldp	w2, w3, [x1, 36]
 	mov	w5, 1
-	ldrh	w0, [x0, #:lo12:.LANCHOR99]
-	str	w5, [x29, 152]
+	ldrh	w0, [x0, #:lo12:.LANCHOR102]
+	stp	w8, w5, [x29, 108]
 	sub	w4, w4, w0
 	lsr	w0, w3, w0
 	lsl	w4, w5, w4
 	sub	w4, w4, #1
 	and	w4, w4, w0
-	adrp	x0, .LANCHOR98
-	ldrb	w0, [x0, #:lo12:.LANCHOR98]
+	adrp	x0, .LANCHOR101
+	ldrb	w0, [x0, #:lo12:.LANCHOR101]
 	udiv	w4, w4, w0
-	adrp	x0, .LC203
-	add	x0, x0, :lo12:.LC203
-	stp	w8, w4, [x29, 108]
+	adrp	x0, .LC214
+	add	x0, x0, :lo12:.LC214
 	and	w1, w4, 65535
+	str	w4, [x29, 152]
 	bl	printf
-	ldr	w4, [x29, 112]
+	ldr	w5, [x29, 112]
 	mov	w2, 0
-	ldr	w5, [x29, 152]
-	mov	w0, w4
+	ldr	w4, [x29, 152]
 	mov	w1, w5
+	mov	w0, w4
 	bl	gc_add_sblk
 	ldr	w8, [x29, 108]
-	b	.L2974
-.L2978:
+	b	.L3154
+.L3158:
 	ldrb	w0, [x19, 2]
 	and	w0, w0, -9
 	strb	w0, [x19, 2]
-	b	.L2979
-.L2983:
+	b	.L3159
+.L3163:
 	mov	w0, -1
-	b	.L2952
+	b	.L3132
 	.size	zftl_read, .-zftl_read
 	.section	.text.ftl_vendor_read,"ax",@progbits
 	.align	2
@@ -18717,125 +19908,125 @@ gc_check_data_one_wl:
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x19, x20, [sp, 32]
-	adrp	x19, .LANCHOR62
+	adrp	x19, .LANCHOR63
 	stp	x21, x22, [sp, 48]
-	add	x22, x19, :lo12:.LANCHOR62
+	add	x22, x19, :lo12:.LANCHOR63
 	adrp	x20, .LANCHOR10
 	stp	x23, x24, [sp, 64]
 	stp	x25, x26, [sp, 80]
 	ldr	x0, [x22, 8]
 	stp	x27, x28, [sp, 96]
 	ldr	x21, [x20, #:lo12:.LANCHOR10]
-	cbnz	x0, .L3006
+	cbnz	x0, .L3186
 	mov	w0, 1
 	bl	buf_alloc
 	str	x0, [x22, 8]
-.L3006:
-	add	x0, x19, :lo12:.LANCHOR62
+.L3186:
+	add	x0, x19, :lo12:.LANCHOR63
 	ldr	x22, [x0, 8]
-	cbnz	x22, .L3007
-	adrp	x1, .LANCHOR210
+	cbnz	x22, .L3187
+	adrp	x1, .LANCHOR214
 	adrp	x0, .LC0
-	mov	w2, 367
-	add	x1, x1, :lo12:.LANCHOR210
+	mov	w2, 447
+	add	x1, x1, :lo12:.LANCHOR214
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3007:
-	adrp	x2, .LANCHOR105
+.L3187:
+	adrp	x2, .LANCHOR107
 	add	x28, x21, 96
 	add	x27, x21, 80
-	add	x2, x2, :lo12:.LANCHOR105
+	add	x2, x2, :lo12:.LANCHOR107
 	mov	w26, 0
-.L3008:
+.L3188:
 	ldrb	w0, [x27, 9]
 	cmp	w26, w0
-	bge	.L3017
-	adrp	x25, .LANCHOR68
+	bge	.L3197
+	adrp	x25, .LANCHOR69
 	mov	w24, 1
-	add	x23, x19, :lo12:.LANCHOR62
-	add	x25, x25, :lo12:.LANCHOR68
-	b	.L3018
-.L3016:
+	add	x23, x19, :lo12:.LANCHOR63
+	add	x25, x25, :lo12:.LANCHOR69
+	b	.L3198
+.L3196:
 	ldrh	w0, [x28]
 	ldrh	w1, [x2]
 	ldrb	w3, [x25]
 	cmp	w3, 3
 	mul	w1, w0, w1
 	ldrh	w0, [x23, 16]
-	bne	.L3009
+	bne	.L3189
 	add	w0, w0, w1
 	orr	w0, w0, w24, lsl 24
-.L3030:
+.L3210:
 	str	w0, [x22, 40]
 	mov	w1, 1
 	str	x2, [x29, 104]
 	mov	x0, x22
 	bl	sblk_read_page
 	ldr	w0, [x22, 52]
-	adrp	x1, .LANCHOR147
+	adrp	x1, .LANCHOR152
 	ldr	x2, [x29, 104]
 	cmn	w0, #1
-	beq	.L3012
+	beq	.L3192
 	ldrh	w0, [x23, 22]
-	ldr	x4, [x1, #:lo12:.LANCHOR147]
+	ldr	x4, [x1, #:lo12:.LANCHOR152]
 	ldr	x3, [x22, 24]
 	lsl	x0, x0, 2
 	ldr	w5, [x4, x0]
 	ldr	w4, [x3, 4]
 	cmp	w5, w4
-	bne	.L3012
-	adrp	x4, .LANCHOR148
-	ldr	x4, [x4, #:lo12:.LANCHOR148]
+	bne	.L3192
+	adrp	x4, .LANCHOR153
+	ldr	x4, [x4, #:lo12:.LANCHOR153]
 	ldr	w4, [x4, x0]
 	ldr	w0, [x3, 8]
 	cmp	w4, w0
-	beq	.L3013
-.L3012:
-	add	x4, x1, :lo12:.LANCHOR147
+	beq	.L3193
+.L3192:
+	add	x4, x1, :lo12:.LANCHOR152
 	ldrh	w0, [x23, 22]
-	ldr	x1, [x1, #:lo12:.LANCHOR147]
+	ldr	x1, [x1, #:lo12:.LANCHOR152]
 	ldr	w0, [x1, x0, lsl 2]
 	cmn	w0, #1
-	beq	.L3013
-	adrp	x19, .LANCHOR72
+	beq	.L3193
+	adrp	x19, .LANCHOR75
 	ldrb	w3, [x27, 9]
 	str	x4, [x29, 104]
 	mov	w2, 4
-	ldrh	w0, [x19, #:lo12:.LANCHOR72]
+	ldrh	w0, [x19, #:lo12:.LANCHOR75]
 	mul	w3, w3, w0
-	adrp	x0, .LC205
-	add	x0, x0, :lo12:.LC205
+	adrp	x0, .LC216
+	add	x0, x0, :lo12:.LC216
 	bl	rknand_print_hex
-	ldrh	w0, [x19, #:lo12:.LANCHOR72]
-	adrp	x19, .LANCHOR148
+	ldrh	w0, [x19, #:lo12:.LANCHOR75]
+	adrp	x19, .LANCHOR153
 	ldrb	w3, [x27, 9]
 	mov	w2, 4
-	ldr	x1, [x19, #:lo12:.LANCHOR148]
+	ldr	x1, [x19, #:lo12:.LANCHOR153]
 	mul	w3, w3, w0
-	adrp	x0, .LC206
-	add	x0, x0, :lo12:.LC206
+	adrp	x0, .LC217
+	add	x0, x0, :lo12:.LC217
 	bl	rknand_print_hex
 	adrp	x0, .LANCHOR14
 	ldr	x4, [x29, 104]
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L3014
+	tbz	x0, 10, .L3194
 	ldr	x1, [x22, 24]
 	ldrh	w0, [x23, 22]
 	ldr	x2, [x4]
-	ldr	x3, [x19, #:lo12:.LANCHOR148]
+	ldr	x3, [x19, #:lo12:.LANCHOR153]
 	lsl	x0, x0, 2
 	ldr	w4, [x1, 12]
 	str	w4, [sp]
 	ldr	w4, [x3, x0]
 	ldp	w5, w6, [x1]
 	ldr	w3, [x2, x0]
-	adrp	x0, .LC207
+	adrp	x0, .LC218
 	ldr	w7, [x1, 8]
-	add	x0, x0, :lo12:.LC207
+	add	x0, x0, :lo12:.LC218
 	ldr	w1, [x22, 40]
 	ldr	w2, [x22, 52]
 	bl	printf
-.L3014:
+.L3194:
 	ldr	x0, [x20, #:lo12:.LANCHOR10]
 	mov	x1, 0
 	ldrh	w0, [x0, 80]
@@ -18845,7 +20036,7 @@ gc_check_data_one_wl:
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x1, lsl 1]
 	mov	w0, -1
-.L3005:
+.L3185:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -18854,43 +20045,43 @@ gc_check_data_one_wl:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 128
 	ret
-.L3009:
+.L3189:
 	cmp	w3, 2
-	bne	.L3011
+	bne	.L3191
 	sub	w0, w0, #1
 	add	w1, w24, w1
 	add	w0, w0, w1
 	orr	w0, w0, 33554432
-	b	.L3030
-.L3011:
+	b	.L3210
+.L3191:
 	add	w0, w0, w1
-	b	.L3030
-.L3013:
+	b	.L3210
+.L3193:
 	ldrh	w0, [x23, 22]
 	add	w24, w24, 1
 	add	w0, w0, 1
 	strh	w0, [x23, 22]
-.L3018:
+.L3198:
 	ldrh	w0, [x23, 20]
 	cmp	w24, w0
-	ble	.L3016
+	ble	.L3196
 	add	w26, w26, 1
 	add	x28, x28, 2
-	b	.L3008
-.L3017:
-	add	x19, x19, :lo12:.LANCHOR62
+	b	.L3188
+.L3197:
+	add	x19, x19, :lo12:.LANCHOR63
 	ldrh	w0, [x19, 16]
 	add	w1, w0, 1
 	strh	w1, [x19, 16]
-	adrp	x1, .LANCHOR104
-	ldrb	w1, [x1, #:lo12:.LANCHOR104]
-	cbz	w1, .L3019
+	adrp	x1, .LANCHOR70
+	ldrb	w1, [x1, #:lo12:.LANCHOR70]
+	cbz	w1, .L3199
 	add	w0, w0, 2
 	strh	w0, [x19, 16]
-.L3019:
-.L3015:
+.L3199:
+.L3195:
 	mov	w0, 0
-	b	.L3005
+	b	.L3185
 	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
 	.section	.text.ftl_update_l2p_map,"ax",@progbits
 	.align	2
@@ -18902,50 +20093,50 @@ ftl_update_l2p_map:
 	stp	x21, x22, [sp, 32]
 	mov	x22, x0
 	stp	x19, x20, [sp, 16]
-	adrp	x0, .LANCHOR80
+	adrp	x0, .LANCHOR83
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	ldrh	w23, [x0, #:lo12:.LANCHOR80]
+	ldrh	w23, [x0, #:lo12:.LANCHOR83]
 	ldrb	w0, [x22, 9]
 	ldrh	w19, [x22, 12]
 	mul	w23, w23, w0
-	adrp	x0, .LANCHOR111
+	adrp	x0, .LANCHOR113
 	str	x0, [x29, 104]
-	ldr	x1, [x0, #:lo12:.LANCHOR111]
+	ldr	x1, [x0, #:lo12:.LANCHOR113]
 	add	x19, x1, x19, lsl 2
 	add	x1, x19, x23, sxtw 2
 	ldr	w1, [x1, -4]
 	cmn	w1, #1
-	beq	.L3032
-	adrp	x1, .LANCHOR211
+	beq	.L3212
+	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
-	mov	w2, 1575
-	add	x1, x1, :lo12:.LANCHOR211
+	mov	w2, 1627
+	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3032:
-	adrp	x27, .LANCHOR121
+.L3212:
+	adrp	x27, .LANCHOR123
 	mov	x24, 0
-	add	x0, x27, :lo12:.LANCHOR121
+	add	x0, x27, :lo12:.LANCHOR123
 	mov	w21, 0
 	str	x0, [x29, 96]
-.L3033:
+.L3213:
 	cmp	w24, w23
-	blt	.L3039
+	blt	.L3219
 	adrp	x0, .LANCHOR14
 	adrp	x19, .LANCHOR9
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3040
+	tbz	x0, 12, .L3220
 	ldrh	w1, [x22]
 	ldr	x2, [x19, #:lo12:.LANCHOR9]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w3, [x2, x0]
-	adrp	x0, .LC211
+	adrp	x0, .LC222
 	mov	w2, w21
-	add	x0, x0, :lo12:.LC211
+	add	x0, x0, :lo12:.LC222
 	bl	printf
-.L3040:
+.L3220:
 	ldrh	w1, [x22]
 	ldr	x0, [x19, #:lo12:.LANCHOR9]
 	ldp	x23, x24, [sp, 48]
@@ -18956,38 +20147,38 @@ ftl_update_l2p_map:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L3039:
+.L3219:
 	ldr	w2, [x19, x24, lsl 2]
 	cmn	w2, #1
-	beq	.L3034
-	ldrb	w20, [x27, #:lo12:.LANCHOR121]
+	beq	.L3214
+	ldrb	w20, [x27, #:lo12:.LANCHOR123]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	lsl	w20, w20, 7
 	udiv	w20, w2, w20
 	and	w20, w20, 65535
-	tbz	x0, 12, .L3035
-	adrp	x0, .LC208
+	tbz	x0, 12, .L3215
+	adrp	x0, .LC219
 	mov	w3, w24
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC208
+	add	x0, x0, :lo12:.LC219
 	bl	printf
-.L3035:
-	adrp	x25, .LANCHOR105
-	adrp	x26, .LC209
+.L3215:
+	adrp	x25, .LANCHOR107
+	adrp	x26, .LC220
 	mov	x28, x24
-	add	x25, x25, :lo12:.LANCHOR105
-	add	x26, x26, :lo12:.LC209
-.L3038:
+	add	x25, x25, :lo12:.LANCHOR107
+	add	x26, x26, :lo12:.LC220
+.L3218:
 	ldr	w1, [x19, x28, lsl 2]
 	cmn	w1, #1
-	beq	.L3036
+	beq	.L3216
 	ldr	x0, [x29, 96]
 	ldrb	w2, [x0]
 	lsl	w2, w2, 7
 	udiv	w1, w1, w2
 	cmp	w20, w1, uxth
-	bne	.L3036
+	bne	.L3216
 	ldrb	w0, [x22, 9]
 	sdiv	w1, w28, w0
 	msub	w0, w1, w0, w28
@@ -18999,15 +20190,15 @@ ftl_update_l2p_map:
 	str	w2, [x29, 124]
 	ldr	w1, [x19, x28, lsl 2]
 	bl	pm_ppa_update_check
-	cbz	w0, .L3037
+	cbz	w0, .L3217
 	ldr	x0, [x29, 104]
 	mov	w3, w23
 	mov	w2, 4
-	ldr	x1, [x0, #:lo12:.LANCHOR111]
-	adrp	x0, .LC210
-	add	x0, x0, :lo12:.LC210
+	ldr	x1, [x0, #:lo12:.LANCHOR113]
+	adrp	x0, .LC221
+	add	x0, x0, :lo12:.LC221
 	bl	rknand_print_hex
-.L3037:
+.L3217:
 	ldr	w0, [x19, x28, lsl 2]
 	add	w21, w21, 1
 	mov	w2, 1
@@ -19016,13 +20207,13 @@ ftl_update_l2p_map:
 	bl	pm_log2phys
 	mov	w0, -1
 	str	w0, [x19, x28, lsl 2]
-.L3036:
+.L3216:
 	add	x28, x28, 1
 	cmp	w23, w28
-	bgt	.L3038
-.L3034:
+	bgt	.L3218
+.L3214:
 	add	x24, x24, 1
-	b	.L3033
+	b	.L3213
 	.size	ftl_update_l2p_map, .-ftl_update_l2p_map
 	.section	.text.ftl_alloc_new_data_sblk,"ax",@progbits
 	.align	2
@@ -19038,9 +20229,9 @@ ftl_alloc_new_data_sblk:
 	ldrh	w0, [x19]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3062
+	beq	.L3242
 	bl	zftl_insert_data_list
-.L3062:
+.L3242:
 	adrp	x0, .LANCHOR10
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	add	x0, x0, 16
@@ -19064,54 +20255,54 @@ ftl_alloc_new_data_sblk:
 	.type	ftl_write_commit, %function
 ftl_write_commit:
 	stp	x29, x30, [sp, -144]!
-	adrp	x0, .LANCHOR49
+	adrp	x0, .LANCHOR50
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	add	x23, x0, :lo12:.LANCHOR49
+	add	x23, x0, :lo12:.LANCHOR50
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-.L3067:
-	adrp	x2, .LANCHOR57
-	ldrb	w1, [x2, #:lo12:.LANCHOR57]
-	cbz	w1, .L3069
-	adrp	x3, .LANCHOR56
-	adrp	x0, .LANCHOR49
-	add	x0, x0, :lo12:.LANCHOR49
+.L3247:
+	adrp	x2, .LANCHOR58
+	ldrb	w1, [x2, #:lo12:.LANCHOR58]
+	cbz	w1, .L3249
+	adrp	x3, .LANCHOR57
+	adrp	x0, .LANCHOR50
+	add	x0, x0, :lo12:.LANCHOR50
 	sub	w1, w1, #1
-	ldrb	w4, [x3, #:lo12:.LANCHOR56]
-	strb	w1, [x2, #:lo12:.LANCHOR57]
+	ldrb	w4, [x3, #:lo12:.LANCHOR57]
+	strb	w1, [x2, #:lo12:.LANCHOR58]
 	ubfiz	x27, x4, 6, 8
 	add	x5, x0, x27
 	stp	x4, x5, [x29, 112]
 	lsl	x4, x4, 6
 	add	x5, x0, x4
 	ldrb	w0, [x0, x4]
-	strb	w0, [x3, #:lo12:.LANCHOR56]
-	adrp	x0, .LANCHOR118
+	strb	w0, [x3, #:lo12:.LANCHOR57]
+	adrp	x0, .LANCHOR120
 	ldr	w2, [x5, 36]
 	mov	x19, x0
-	ldr	w1, [x0, #:lo12:.LANCHOR118]
+	ldr	w1, [x0, #:lo12:.LANCHOR120]
 	cmp	w2, w1
-	bcc	.L3071
-	adrp	x1, .LANCHOR212
+	bcc	.L3251
+	adrp	x1, .LANCHOR216
 	adrp	x0, .LC0
-	mov	w2, 496
-	add	x1, x1, :lo12:.LANCHOR212
+	mov	w2, 501
+	add	x1, x1, :lo12:.LANCHOR216
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3071:
+.L3251:
 	ldr	x0, [x29, 112]
-	ldr	w1, [x19, #:lo12:.LANCHOR118]
+	ldr	w1, [x19, #:lo12:.LANCHOR120]
 	add	x0, x23, x0, lsl 6
 	ldr	w22, [x0, 36]
 	cmp	w22, w1
-	bcc	.L3072
+	bcc	.L3252
 	ldr	x0, [x29, 120]
 	bl	buf_free
 	mov	w0, -1
-.L3066:
+.L3246:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -19119,25 +20310,25 @@ ftl_write_commit:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L3072:
+.L3252:
 	ldrb	w21, [x0, 57]
 	ldrb	w20, [x0, 56]
 	ldr	x26, [x0, 8]
 	ldr	x28, [x0, 24]
-	adrp	x0, .LANCHOR119
+	adrp	x0, .LANCHOR121
 	str	x0, [x29, 104]
-	ldrb	w1, [x0, #:lo12:.LANCHOR119]
-	cbz	w1, .L3074
-	adrp	x0, .LANCHOR173
-	ldrb	w1, [x0, #:lo12:.LANCHOR173]
+	ldrb	w1, [x0, #:lo12:.LANCHOR121]
+	cbz	w1, .L3254
+	adrp	x0, .LANCHOR174
+	ldrb	w1, [x0, #:lo12:.LANCHOR174]
 	add	x1, x23, x1, lsl 6
-.L3075:
+.L3255:
 	ldrb	w0, [x1]
 	cmp	w0, 255
-	bne	.L3076
+	bne	.L3256
 	ldr	w0, [x1, 36]
 	cmp	w22, w0
-	bne	.L3074
+	bne	.L3254
 	ldr	x0, [x1, 8]
 	ubfiz	x21, x21, 9, 8
 	lsl	w2, w20, 9
@@ -19146,33 +20337,33 @@ ftl_write_commit:
 	bl	ftl_memcpy
 	ldr	x0, [x29, 120]
 	bl	buf_free
-	b	.L3067
-.L3076:
+	b	.L3247
+.L3256:
 	ubfiz	x1, x0, 6, 8
 	add	x1, x23, x1
-	b	.L3075
-.L3074:
+	b	.L3255
+.L3254:
 	mov	w0, w22
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 140]
 	cmn	w0, #1
-	bne	.L3078
+	bne	.L3258
 	mov	w2, 0
 	add	x1, x29, 140
 	mov	w0, w22
 	bl	pm_log2phys
-.L3078:
+.L3258:
 	adrp	x25, .LANCHOR10
 	add	x1, x23, 2
 	mov	w0, 0
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 16
-.L3081:
+.L3261:
 	ldr	w2, [x1, 34]
 	cmp	w22, w2
-	bne	.L3079
+	bne	.L3259
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L3079
+	tbz	x2, 3, .L3259
 	ubfiz	x0, x0, 6, 32
 	and	w2, w2, -9
 	add	x0, x23, x0
@@ -19180,50 +20371,50 @@ ftl_write_commit:
 	ldr	x24, [x0, 8]
 	ldr	w0, [x0, 40]
 	str	w0, [x29, 140]
-.L3080:
-	adrp	x0, .LANCHOR121
+.L3260:
+	adrp	x0, .LANCHOR123
 	str	x0, [x29, 96]
-	ldrb	w1, [x0, #:lo12:.LANCHOR121]
+	ldrb	w1, [x0, #:lo12:.LANCHOR123]
 	cmp	w20, w1
-	bcs	.L3105
+	bcs	.L3285
 	add	w20, w21, w20
-	cbz	x24, .L3083
-	cbz	w21, .L3084
+	cbz	x24, .L3263
+	cbz	w21, .L3264
 	lsl	w2, w21, 9
 	mov	x1, x24
 	mov	x0, x26
 	bl	ftl_memcpy
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 48
-.L3084:
+.L3264:
 	ldr	x0, [x29, 96]
-	ldrb	w2, [x0, #:lo12:.LANCHOR121]
+	ldrb	w2, [x0, #:lo12:.LANCHOR123]
 	cmp	w20, w2
-	bcc	.L3085
+	bcc	.L3265
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 16
-.L3105:
+.L3285:
 	mov	w24, 0
-	b	.L3082
-.L3079:
+	b	.L3262
+.L3259:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 32
-	bne	.L3081
+	bne	.L3261
 	mov	x24, 0
-	b	.L3080
-.L3085:
+	b	.L3260
+.L3265:
 	ubfiz	x0, x20, 9, 9
 	sub	w2, w2, w20
 	add	x1, x24, x0
 	lsl	w2, w2, 9
 	add	x0, x26, x0
 	bl	ftl_memcpy
-	b	.L3105
-.L3083:
+	b	.L3285
+.L3263:
 	ldr	w0, [x29, 140]
 	cmn	w0, #1
-	beq	.L3086
+	beq	.L3266
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 140]
@@ -19236,11 +20427,11 @@ ftl_write_commit:
 	ldr	w0, [x0, 4]
 	add	w24, w24, 1
 	cmp	w22, w0
-	bne	.L3087
+	bne	.L3267
 	ldr	w0, [x27, 52]
 	cmn	w0, #1
-	bne	.L3088
-.L3087:
+	bne	.L3268
+.L3267:
 	ldr	x1, [x25, #:lo12:.LANCHOR10]
 	mov	w3, w22
 	ldr	w4, [x27, 52]
@@ -19248,73 +20439,73 @@ ftl_write_commit:
 	ldr	w0, [x1, 552]
 	add	w0, w0, 1
 	str	w0, [x1, 552]
-	adrp	x0, .LC212
-	add	x0, x0, :lo12:.LC212
+	adrp	x0, .LC223
+	add	x0, x0, :lo12:.LC223
 	ldrb	w1, [x27, 1]
 	bl	printf
 	ldr	x1, [x27, 24]
 	mov	w3, 4
-	adrp	x0, .LC171
+	adrp	x0, .LC182
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC171
+	add	x0, x0, :lo12:.LC182
 	bl	rknand_print_hex
-.L3088:
+.L3268:
 	ldr	x0, [x27, 24]
 	ldr	w0, [x0, 4]
 	cmp	w22, w0
-	bne	.L3089
+	bne	.L3269
 	ldr	w0, [x27, 52]
 	cmn	w0, #1
-	bne	.L3090
-.L3089:
-	adrp	x1, .LANCHOR212
+	bne	.L3270
+.L3269:
+	adrp	x1, .LANCHOR216
 	adrp	x0, .LC0
-	mov	w2, 567
-	add	x1, x1, :lo12:.LANCHOR212
+	mov	w2, 572
+	add	x1, x1, :lo12:.LANCHOR216
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3090:
-	cbz	w21, .L3091
+.L3270:
+	cbz	w21, .L3271
 	ldr	w0, [x29, 140]
 	lsl	w2, w21, 9
 	cmn	w0, #1
-	beq	.L3092
+	beq	.L3272
 	ldr	x1, [x27, 8]
 	mov	x0, x26
 	bl	ftl_memcpy
-.L3093:
+.L3273:
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 48
-.L3091:
+.L3271:
 	ldr	x0, [x29, 96]
-	ldrb	w2, [x0, #:lo12:.LANCHOR121]
+	ldrb	w2, [x0, #:lo12:.LANCHOR123]
 	cmp	w20, w2
-	bcc	.L3094
-	bls	.L3095
+	bcc	.L3274
+	bls	.L3275
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 16
-.L3095:
-	cbz	x27, .L3082
+.L3275:
+	cbz	x27, .L3262
 	ldrb	w0, [x27, 2]
 	mov	x1, x27
 	and	w0, w0, -9
 	strb	w0, [x27, 2]
-	adrp	x0, .LANCHOR127
-	add	x0, x0, :lo12:.LANCHOR127
+	adrp	x0, .LANCHOR129
+	add	x0, x0, :lo12:.LANCHOR129
 	bl	buf_remove_buf
 	mov	x0, x27
 	bl	buf_free
-.L3082:
+.L3262:
 	ldrh	w0, [x19, 6]
-	cbnz	w0, .L3097
+	cbnz	w0, .L3277
 	bl	ftl_flush
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L3097:
+.L3277:
 	mov	x0, x19
 	bl	ftl_get_new_free_page
 	ldr	x1, [x29, 112]
-	adrp	x20, .LANCHOR173
+	adrp	x20, .LANCHOR174
 	lsl	x2, x1, 6
 	add	x1, x23, x2
 	ldr	w3, [x1, 32]
@@ -19335,94 +20526,94 @@ ftl_write_commit:
 	sub	w0, w0, #1
 	strh	w0, [x1, 48]
 	ldr	x1, [x29, 120]
-	add	x0, x20, :lo12:.LANCHOR173
+	add	x0, x20, :lo12:.LANCHOR174
 	bl	buf_add_tail
 	ldr	x0, [x29, 104]
-	ldrb	w2, [x0, #:lo12:.LANCHOR119]
+	ldrb	w2, [x0, #:lo12:.LANCHOR121]
 	add	w2, w2, 1
 	and	w2, w2, 255
-	strb	w2, [x0, #:lo12:.LANCHOR119]
-	adrp	x0, .LANCHOR213
+	strb	w2, [x0, #:lo12:.LANCHOR121]
+	adrp	x0, .LANCHOR217
 	cmp	w2, 2
-	str	wzr, [x0, #:lo12:.LANCHOR213]
+	str	wzr, [x0, #:lo12:.LANCHOR217]
 	ldrh	w0, [x19, 6]
-	bhi	.L3098
+	bhi	.L3278
 	cmp	w0, 1
-	bne	.L3070
-.L3098:
+	bne	.L3250
+.L3278:
 	ldrb	w1, [x19, 5]
 	cmp	w1, 0
 	mov	w1, 0
 	cset	w4, ne
 	cmp	w0, 1
-	ldrb	w0, [x20, #:lo12:.LANCHOR173]
+	ldrb	w0, [x20, #:lo12:.LANCHOR174]
 	csinc	w4, w2, w4, eq
 	mov	w3, w0
-.L3102:
+.L3282:
 	cmp	w1, w4
-	bne	.L3103
-	strb	w3, [x20, #:lo12:.LANCHOR173]
+	bne	.L3283
+	strb	w3, [x20, #:lo12:.LANCHOR174]
 	and	w1, w1, 255
 	ldr	x3, [x29, 104]
 	sub	w2, w2, w1
 	ubfiz	x0, x0, 6, 8
 	add	x0, x23, x0
-	strb	w2, [x3, #:lo12:.LANCHOR119]
+	strb	w2, [x3, #:lo12:.LANCHOR121]
 	bl	sblk_prog_page
 	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bne	.L3070
+	bne	.L3250
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	mov	x0, x19
 	bl	ftl_write_last_log_page
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L3070:
-	adrp	x0, .LANCHOR57
-	ldrb	w0, [x0, #:lo12:.LANCHOR57]
-	cbnz	w0, .L3067
-.L3069:
+.L3250:
+	adrp	x0, .LANCHOR58
+	ldrb	w0, [x0, #:lo12:.LANCHOR58]
+	cbnz	w0, .L3247
+.L3249:
 	bl	ftl_write_completed
 	mov	w0, 0
-	b	.L3066
-.L3094:
+	b	.L3246
+.L3274:
 	ldr	w0, [x29, 140]
 	sub	w2, w2, w20
 	lsl	w2, w2, 9
 	cmn	w0, #1
 	ubfiz	x0, x20, 7, 9
-	beq	.L3096
+	beq	.L3276
 	ldr	x1, [x27, 8]
 	lsl	x0, x0, 2
 	add	x1, x1, x0
 	add	x0, x26, x0
 	bl	ftl_memcpy
-	b	.L3095
-.L3096:
+	b	.L3275
+.L3276:
 	mov	w1, 0
 	add	x0, x26, x0, lsl 2
 	bl	ftl_memset
-	b	.L3095
-.L3103:
+	b	.L3275
+.L3283:
 	ubfiz	x3, x3, 6, 8
 	add	w1, w1, 1
 	ldrb	w3, [x23, x3]
-	b	.L3102
-.L3104:
+	b	.L3282
+.L3284:
 	lsl	w2, w21, 9
 	mov	x27, 0
 	mov	w24, 0
-.L3092:
+.L3272:
 	mov	w1, 0
 	mov	x0, x26
 	bl	ftl_memset
-	b	.L3093
-.L3086:
-	cbnz	w21, .L3104
+	b	.L3273
+.L3266:
+	cbnz	w21, .L3284
 	mov	w24, 0
 	mov	x27, 0
-	b	.L3091
+	b	.L3271
 	.size	ftl_write_commit, .-ftl_write_commit
 	.section	.text.gc_do_copy_back,"ax",@progbits
 	.align	2
@@ -19430,21 +20621,21 @@ ftl_write_commit:
 	.type	gc_do_copy_back, %function
 gc_do_copy_back:
 	sub	sp, sp, #224
-	adrp	x0, .LANCHOR71
+	adrp	x0, .LANCHOR74
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
-	ldrb	w0, [x0, #:lo12:.LANCHOR71]
+	ldrb	w0, [x0, #:lo12:.LANCHOR74]
 	stp	x19, x20, [sp, 32]
 	stp	x21, x22, [sp, 48]
 	stp	x23, x24, [sp, 64]
 	stp	x25, x26, [sp, 80]
 	stp	x27, x28, [sp, 96]
-	cbnz	w0, .L3128
+	cbnz	w0, .L3308
 	bl	buf_alloc
 	mov	x19, x0
-	cbz	x0, .L3127
-	adrp	x20, .LANCHOR62
-	add	x3, x20, :lo12:.LANCHOR62
+	cbz	x0, .L3307
+	adrp	x20, .LANCHOR63
+	add	x3, x20, :lo12:.LANCHOR63
 	ldrh	w2, [x3, 26]
 	mov	w0, w2
 	bl	gc_get_src_ppa_from_index
@@ -19458,52 +20649,52 @@ gc_do_copy_back:
 	ldr	w0, [x19, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3130
-	adrp	x1, .LANCHOR214
+	bne	.L3310
+	adrp	x1, .LANCHOR218
 	adrp	x0, .LC0
-	mov	w2, 601
-	add	x1, x1, :lo12:.LANCHOR214
+	mov	w2, 684
+	add	x1, x1, :lo12:.LANCHOR218
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3130:
+.L3310:
 	ldr	x0, [x19, 24]
 	ldr	w21, [x0, 4]
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 160]
 	cmn	w0, #1
-	bne	.L3131
+	bne	.L3311
 	mov	w2, 0
 	add	x1, x29, 160
 	mov	w0, w21
 	bl	pm_log2phys
-.L3131:
+.L3311:
 	ldr	w23, [x29, 160]
 	cmp	w22, w23
-	bne	.L3132
-	adrp	x0, .LANCHOR49
-	add	x0, x0, :lo12:.LANCHOR49
+	bne	.L3312
+	adrp	x0, .LANCHOR50
+	add	x0, x0, :lo12:.LANCHOR50
 	add	x1, x0, 2
 	add	x0, x0, 2050
-.L3135:
+.L3315:
 	ldr	w2, [x1, 34]
 	cmp	w21, w2
-	bne	.L3133
+	bne	.L3313
 	ldrb	w2, [x1]
-	tbz	x2, 1, .L3133
+	tbz	x2, 1, .L3313
 	mov	x0, x19
 	bl	buf_free
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3127
-	add	x20, x20, :lo12:.LANCHOR62
-	adrp	x0, .LC213
+	tbz	x0, 8, .L3307
+	add	x20, x20, :lo12:.LANCHOR63
+	adrp	x0, .LC224
 	mov	w2, w22
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC213
+	add	x0, x0, :lo12:.LC224
 	ldrh	w3, [x20, 26]
 	bl	printf
-.L3127:
+.L3307:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -19512,14 +20703,14 @@ gc_do_copy_back:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 224
 	ret
-.L3133:
+.L3313:
 	add	x1, x1, 64
-	cmp	x0, x1
-	bne	.L3135
-	adrp	x0, .LANCHOR121
+	cmp	x1, x0
+	bne	.L3315
+	adrp	x0, .LANCHOR123
 	mov	w1, 10
 	strb	wzr, [x19, 57]
-	ldrb	w0, [x0, #:lo12:.LANCHOR121]
+	ldrb	w0, [x0, #:lo12:.LANCHOR123]
 	strb	w0, [x19, 56]
 	ldrb	w0, [x19, 2]
 	str	w21, [x19, 36]
@@ -19530,65 +20721,65 @@ gc_do_copy_back:
 	str	w0, [x19, 32]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3136
+	tbz	x0, 8, .L3316
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
-	add	x1, x20, :lo12:.LANCHOR62
+	add	x1, x20, :lo12:.LANCHOR63
 	mov	w3, w0
 	mov	w4, w22
-	adrp	x0, .LC214
+	adrp	x0, .LC225
 	mov	w2, w23
-	add	x0, x0, :lo12:.LC214
+	add	x0, x0, :lo12:.LC225
 	ldrh	w5, [x1, 26]
 	mov	w1, w21
 	bl	printf
-.L3136:
+.L3316:
 	mov	x0, x19
 	bl	ftl_gc_write_buf
 	bl	ftl_write_commit
-	add	x20, x20, :lo12:.LANCHOR62
-	adrp	x0, .LANCHOR97
-	ldr	x1, [x0, #:lo12:.LANCHOR97]
+	add	x20, x20, :lo12:.LANCHOR63
+	adrp	x0, .LANCHOR100
+	ldr	x1, [x0, #:lo12:.LANCHOR100]
 	ldr	w0, [x1, 60]
 	add	w0, w0, 1
 	str	w0, [x1, 60]
 	ldrh	w0, [x20, 28]
 	add	w0, w0, 1
 	strh	w0, [x20, 28]
-	b	.L3127
-.L3132:
+	b	.L3307
+.L3312:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3137
-	add	x20, x20, :lo12:.LANCHOR62
+	tbz	x0, 8, .L3317
+	add	x20, x20, :lo12:.LANCHOR63
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	mov	w3, w0
 	mov	w4, w22
-	adrp	x0, .LC214
+	adrp	x0, .LC225
 	ldrh	w5, [x20, 26]
 	mov	w2, w23
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC214
+	add	x0, x0, :lo12:.LC225
 	bl	printf
-.L3137:
+.L3317:
 	mov	x0, x19
 	bl	buf_free
-	b	.L3127
-.L3128:
+	b	.L3307
+.L3308:
 	adrp	x1, .LANCHOR10
-	adrp	x0, .LANCHOR68
+	adrp	x0, .LANCHOR69
 	stp	x0, x1, [x29, 128]
-	adrp	x24, .LANCHOR62
+	adrp	x24, .LANCHOR63
 	ldr	x22, [x1, #:lo12:.LANCHOR10]
-	ldrb	w25, [x0, #:lo12:.LANCHOR68]
+	ldrb	w25, [x0, #:lo12:.LANCHOR69]
 	add	x22, x22, 80
 	cmp	w25, 3
-	bne	.L3138
-	adrp	x0, .LANCHOR70
-	ldrb	w0, [x0, #:lo12:.LANCHOR70]
-	cbz	w0, .L3139
-	add	x0, x24, :lo12:.LANCHOR62
+	bne	.L3318
+	adrp	x0, .LANCHOR73
+	ldrb	w0, [x0, #:lo12:.LANCHOR73]
+	cbz	w0, .L3319
+	add	x0, x24, :lo12:.LANCHOR63
 	ldrb	w19, [x22, 9]
 	ldrh	w20, [x0, 314]
 	add	w21, w19, w19, lsl 1
@@ -19596,30 +20787,30 @@ gc_do_copy_back:
 	sdiv	w21, w20, w21
 	madd	w19, w21, w19, w20
 	and	w19, w19, 65535
-.L3140:
-	adrp	x1, .LANCHOR72
+.L3320:
+	adrp	x1, .LANCHOR75
 	ldrb	w0, [x22, 9]
-	add	x4, x24, :lo12:.LANCHOR62
+	add	x4, x24, :lo12:.LANCHOR63
 	mov	w2, 0
-	ldrh	w3, [x1, #:lo12:.LANCHOR72]
+	ldrh	w3, [x1, #:lo12:.LANCHOR75]
 	mul	w8, w25, w0
 	ldrh	w10, [x4, 24]
 	mul	w3, w3, w0
-	adrp	x0, .LANCHOR148
-	ldr	x7, [x0, #:lo12:.LANCHOR148]
+	adrp	x0, .LANCHOR153
+	ldr	x7, [x0, #:lo12:.LANCHOR153]
 	sub	w3, w3, #1
-.L3143:
+.L3323:
 	cmp	w2, w8
-	blt	.L3145
-.L3172:
+	blt	.L3325
+.L3354:
 	mov	w23, 1
-	b	.L3141
-.L3139:
-	add	x0, x24, :lo12:.LANCHOR62
+	b	.L3321
+.L3319:
+	add	x0, x24, :lo12:.LANCHOR63
 	ldrb	w20, [x22, 9]
 	ldrh	w1, [x0, 314]
-	adrp	x0, .LANCHOR215
-	add	x0, x0, :lo12:.LANCHOR215
+	adrp	x0, .LANCHOR219
+	add	x0, x0, :lo12:.LANCHOR219
 	sdiv	w19, w1, w20
 	ldrh	w23, [x0, w19, sxtw 1]
 	msub	w19, w19, w20, w1
@@ -19630,110 +20821,106 @@ gc_do_copy_back:
 	madd	w20, w21, w20, w19
 	add	w20, w20, w20, lsl 1
 	and	w20, w20, 65535
-	beq	.L3140
-.L3141:
+	beq	.L3320
+.L3321:
 	adrp	x0, .LANCHOR14
 	str	x0, [x29, 112]
 	ldr	w1, [x0, #:lo12:.LANCHOR14]
-	tbz	x1, 8, .L3146
-	adrp	x0, .LANCHOR148
+	tbz	x1, 8, .L3326
+	adrp	x0, .LANCHOR153
 	ubfiz	x1, x20, 2, 16
 	mov	w6, w20
 	mov	w3, w19
-	ldr	x2, [x0, #:lo12:.LANCHOR148]
-	add	x0, x24, :lo12:.LANCHOR62
+	ldr	x2, [x0, #:lo12:.LANCHOR153]
+	add	x0, x24, :lo12:.LANCHOR63
 	ldrh	w4, [x0, 314]
-	adrp	x0, .LC215
+	adrp	x0, .LC226
 	ldr	w5, [x2, x1]
-	add	x0, x0, :lo12:.LC215
+	add	x0, x0, :lo12:.LC226
 	mov	w2, w23
 	mov	w1, w21
 	bl	printf
-.L3146:
-	adrp	x0, .LANCHOR49
+.L3326:
+	adrp	x0, .LANCHOR50
 	str	wzr, [x29, 152]
-	add	x0, x0, :lo12:.LANCHOR49
+	add	x0, x0, :lo12:.LANCHOR50
 	str	x0, [x29, 120]
-.L3147:
-	ldrb	w2, [x22, 9]
+.L3327:
+	ldrb	w1, [x22, 9]
 	ldr	w0, [x29, 152]
 	ldrh	w26, [x29, 152]
 	and	w0, w0, 65535
 	str	w0, [x29, 156]
-	mul	w1, w25, w2
-	cmp	w0, w1
-	blt	.L3159
+	mul	w3, w25, w1
+	cmp	w0, w3
+	blt	.L3339
 	ldr	x0, [x29, 128]
-	ldrb	w0, [x0, #:lo12:.LANCHOR68]
+	ldrb	w0, [x0, #:lo12:.LANCHOR69]
 	cmp	w0, 3
 	add	x0, x29, 160
-	beq	.L3160
-	sub	w3, w1, #1
-	mov	w2, 0
-.L3161:
-	cmp	w2, w3
-	blt	.L3167
-	ldr	x0, [x0, w3, sxtw 3]
-	mov	w2, -1
-	strb	w2, [x0]
-	ldr	x0, [x29, 160]
-	bl	sblk_prog_page
-	b	.L3166
-.L3138:
-	adrp	x0, .LANCHOR104
-	ldrb	w0, [x0, #:lo12:.LANCHOR104]
-	cbnz	w0, .L3142
-	add	x0, x24, :lo12:.LANCHOR62
+	bne	.L3340
+	adrp	x2, .LANCHOR73
+	ldr	x3, [x29, 160]
+	ldrb	w2, [x2, #:lo12:.LANCHOR73]
+	cbz	w2, .L3341
+.L3344:
+	strb	wzr, [x3, 60]
+	b	.L3342
+.L3318:
+	adrp	x0, .LANCHOR70
+	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	cbnz	w0, .L3322
+	add	x0, x24, :lo12:.LANCHOR63
 	ldrb	w19, [x22, 9]
 	mov	w25, 1
 	ldrh	w20, [x0, 314]
 	sdiv	w21, w20, w19
 	msub	w19, w21, w19, w20
 	and	w19, w19, 65535
-	b	.L3140
-.L3142:
-	add	x0, x24, :lo12:.LANCHOR62
+	b	.L3320
+.L3322:
+	add	x0, x24, :lo12:.LANCHOR63
 	ldrb	w19, [x22, 9]
 	mov	w25, 2
 	ldrh	w20, [x0, 314]
 	sdiv	w21, w20, w19
 	msub	w19, w21, w19, w20
 	and	w19, w19, 65535
-	b	.L3140
-.L3145:
+	b	.L3320
+.L3325:
 	add	w5, w20, w2
 	cmp	w5, w3
-	beq	.L3172
+	beq	.L3354
 	sbfiz	x5, x5, 2, 32
 	ldr	w0, [x7, x5]
 	cmn	w0, #1
-	bne	.L3144
+	bne	.L3324
 	ldrh	w6, [x4, 26]
 	cmp	w6, w10
-	bcs	.L3127
+	bcs	.L3307
 	mov	w0, w6
 	bl	gc_get_src_ppa_from_index
 	add	w6, w6, 1
 	strh	w6, [x4, 26]
 	str	w0, [x7, x5]
-.L3144:
+.L3324:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-	b	.L3143
-.L3159:
+	b	.L3323
+.L3339:
 	ldr	w0, [x29, 156]
 	add	w0, w20, w0
 	str	w0, [x29, 144]
 	sxtw	x27, w0
-	adrp	x0, .LANCHOR69
-	ldr	x0, [x0, #:lo12:.LANCHOR69]
+	adrp	x0, .LANCHOR72
+	ldr	x0, [x0, #:lo12:.LANCHOR72]
 	ldrb	w0, [x0, x27]
 	cmp	w0, 255
-	bne	.L3148
+	bne	.L3328
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbnz	x0, .L3149
+	cbnz	x0, .L3329
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	bl	gc_write_completed
@@ -19741,17 +20928,17 @@ gc_do_copy_back:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbz	x0, .L3127
-.L3149:
-	adrp	x0, .LANCHOR69
+	cbz	x0, .L3307
+.L3329:
+	adrp	x0, .LANCHOR72
 	ldrb	w1, [x28, 1]
-	adrp	x5, .LANCHOR72
-	adrp	x6, .LANCHOR148
-	ldr	x0, [x0, #:lo12:.LANCHOR69]
+	adrp	x5, .LANCHOR75
+	adrp	x6, .LANCHOR153
+	ldr	x0, [x0, #:lo12:.LANCHOR72]
 	strb	w1, [x0, x27]
-	add	x1, x24, :lo12:.LANCHOR62
+	add	x1, x24, :lo12:.LANCHOR63
 	strb	w23, [x28, 61]
-	ldrh	w7, [x5, #:lo12:.LANCHOR72]
+	ldrh	w7, [x5, #:lo12:.LANCHOR75]
 	ldrb	w0, [x1, 7]
 	add	w0, w0, 1
 	strb	w0, [x1, 7]
@@ -19762,32 +20949,32 @@ gc_do_copy_back:
 	mul	w0, w0, w7
 	sub	w0, w0, #1
 	cmp	w1, w0
-	bne	.L3150
-	adrp	x0, .LANCHOR147
-	adrp	x4, .LANCHOR73
+	bne	.L3330
+	adrp	x0, .LANCHOR152
+	adrp	x4, .LANCHOR76
 	stp	x6, x5, [x29, 96]
-	ldr	x1, [x0, #:lo12:.LANCHOR147]
+	ldr	x1, [x0, #:lo12:.LANCHOR152]
 	mov	w0, -1
 	str	x4, [x29, 144]
 	str	w0, [x1, x27, lsl 2]
 	ldr	x0, [x28, 8]
-	ldrb	w2, [x4, #:lo12:.LANCHOR73]
+	ldrb	w2, [x4, #:lo12:.LANCHOR76]
 	mul	w2, w2, w7
 	lsl	w2, w2, 2
 	bl	ftl_memcpy
 	ldp	x6, x5, [x29, 96]
 	ldr	x4, [x29, 144]
 	ldr	x7, [x28, 8]
-	ldrh	w0, [x5, #:lo12:.LANCHOR72]
-	ldrb	w1, [x4, #:lo12:.LANCHOR73]
+	ldrh	w0, [x5, #:lo12:.LANCHOR75]
+	ldrb	w1, [x4, #:lo12:.LANCHOR76]
 	mul	w0, w0, w1
-	ldr	x1, [x6, #:lo12:.LANCHOR148]
+	ldr	x1, [x6, #:lo12:.LANCHOR153]
 	lsl	w2, w0, 2
 	add	x0, x7, x0, sxtw 2
 	bl	ftl_memcpy
-	adrp	x0, .LANCHOR121
+	adrp	x0, .LANCHOR123
 	mov	w1, 0
-	ldrb	w2, [x0, #:lo12:.LANCHOR121]
+	ldrb	w2, [x0, #:lo12:.LANCHOR123]
 	ldr	x0, [x28, 24]
 	lsl	w2, w2, 1
 	bl	ftl_memset
@@ -19796,9 +20983,9 @@ gc_do_copy_back:
 	ldr	x5, [x29, 104]
 	movk	w0, 0xf55f, lsl 16
 	ldr	x4, [x29, 144]
-	ldrh	w1, [x5, #:lo12:.LANCHOR72]
+	ldrh	w1, [x5, #:lo12:.LANCHOR75]
 	str	w0, [x6]
-	ldrb	w0, [x4, #:lo12:.LANCHOR73]
+	ldrb	w0, [x4, #:lo12:.LANCHOR76]
 	mul	w1, w1, w0
 	ldr	x0, [x28, 8]
 	lsl	w1, w1, 2
@@ -19808,29 +20995,29 @@ gc_do_copy_back:
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x0, 132]
 	str	w0, [x6, 8]
-.L3148:
-	adrp	x0, .LANCHOR69
+.L3328:
+	adrp	x0, .LANCHOR72
 	ldr	w5, [x29, 156]
 	add	x1, x29, 160
-	ldr	x4, [x0, #:lo12:.LANCHOR69]
-	adrp	x0, .LANCHOR49
-	add	x3, x0, :lo12:.LANCHOR49
+	ldr	x4, [x0, #:lo12:.LANCHOR72]
+	adrp	x0, .LANCHOR50
+	add	x3, x0, :lo12:.LANCHOR50
 	ldrb	w2, [x4, x27]
 	ubfiz	x0, x2, 6, 8
 	add	x0, x3, x0
 	add	x3, x3, x2, lsl 6
 	str	x0, [x1, w5, sxtw 3]
 	mov	w0, 2
-	adrp	x5, .LANCHOR149
+	adrp	x5, .LANCHOR154
 	strh	w0, [x3, 50]
 	ldr	x0, [x29, 128]
 	strb	w23, [x3, 61]
-	ldrb	w0, [x0, #:lo12:.LANCHOR68]
+	ldrb	w0, [x0, #:lo12:.LANCHOR69]
 	cmp	w0, 3
-	bne	.L3154
+	bne	.L3334
 	udiv	w0, w26, w0
-	adrp	x6, .LANCHOR105
-	ldrh	w6, [x6, #:lo12:.LANCHOR105]
+	adrp	x6, .LANCHOR107
+	ldrh	w6, [x6, #:lo12:.LANCHOR107]
 	add	w1, w0, w19
 	add	w0, w0, w0, lsl 1
 	add	x1, x22, x1, sxtw 1
@@ -19842,18 +21029,18 @@ gc_do_copy_back:
 	ldrh	w6, [x3, 48]
 	orr	w1, w1, w21
 	str	w1, [x3, 40]
-	ldr	x3, [x5, #:lo12:.LANCHOR149]
+	ldr	x3, [x5, #:lo12:.LANCHOR154]
 	orr	w0, w1, w0, lsl 24
 	str	w0, [x3, x6, lsl 2]
-.L3155:
+.L3335:
 	ldr	x0, [x29, 112]
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3158
+	tbz	x0, 8, .L3338
 	ldr	x0, [x29, 120]
 	ldrb	w4, [x4, x27]
 	ldr	w1, [x29, 156]
 	add	x2, x0, x2, lsl 6
-	add	x0, x24, :lo12:.LANCHOR62
+	add	x0, x24, :lo12:.LANCHOR63
 	ldrb	w3, [x0, 6]
 	ldr	x0, [x2, 24]
 	ldrb	w7, [x2, 1]
@@ -19862,22 +21049,22 @@ gc_do_copy_back:
 	str	w0, [sp, 8]
 	mov	w0, 3
 	udiv	w26, w26, w0
-	adrp	x0, .LC216
-	add	x0, x0, :lo12:.LC216
+	adrp	x0, .LC227
+	add	x0, x0, :lo12:.LC227
 	add	w26, w26, w19
 	str	w26, [sp]
 	ldr	w5, [x2, 40]
 	mov	w2, w23
 	bl	printf
-.L3158:
+.L3338:
 	ldr	w0, [x29, 152]
 	add	w0, w0, 1
 	str	w0, [x29, 152]
-	b	.L3147
-.L3150:
+	b	.L3327
+.L3330:
 	lsl	x0, x27, 2
 	str	x0, [x29, 144]
-	ldr	x0, [x6, #:lo12:.LANCHOR148]
+	ldr	x0, [x6, #:lo12:.LANCHOR153]
 	lsl	x1, x27, 2
 	ldr	w0, [x0, x1]
 	mov	w1, 1
@@ -19887,10 +21074,10 @@ gc_do_copy_back:
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3152
-	adrp	x0, .LANCHOR99
+	bne	.L3332
+	adrp	x0, .LANCHOR102
 	ldr	w1, [x28, 40]
-	ldrh	w4, [x0, #:lo12:.LANCHOR99]
+	ldrh	w4, [x0, #:lo12:.LANCHOR102]
 	mov	w0, 21
 	sub	w2, w0, w4
 	mov	w0, 1
@@ -19898,146 +21085,164 @@ gc_do_copy_back:
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR98
-	ldrb	w2, [x1, #:lo12:.LANCHOR98]
+	adrp	x1, .LANCHOR101
+	ldrb	w2, [x1, #:lo12:.LANCHOR101]
 	mov	x1, 0
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3152
+	bne	.L3332
 	ldr	x0, [x28, 24]
 	mov	w1, -1
 	str	w1, [x0, 4]
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmp	w0, w1, 4, ne
-	bne	.L3152
-	adrp	x1, .LANCHOR214
+	bne	.L3332
+	adrp	x1, .LANCHOR218
 	adrp	x0, .LC0
-	mov	w2, 716
-	add	x1, x1, :lo12:.LANCHOR214
+	mov	w2, 799
+	add	x1, x1, :lo12:.LANCHOR218
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3152:
+.L3332:
 	ldr	x0, [x28, 24]
-	adrp	x1, .LANCHOR118
-	ldr	w1, [x1, #:lo12:.LANCHOR118]
+	adrp	x1, .LANCHOR120
+	ldr	w1, [x1, #:lo12:.LANCHOR120]
 	ldr	w2, [x0, 4]
 	cmp	w2, w1
-	bcc	.L3153
+	bcc	.L3333
 	mov	w1, -1
 	str	w1, [x0, 4]
-.L3153:
-	adrp	x1, .LANCHOR147
+.L3333:
+	adrp	x1, .LANCHOR152
 	lsl	x3, x27, 2
 	ldr	w2, [x0, 4]
-	ldr	x1, [x1, #:lo12:.LANCHOR147]
+	ldr	x1, [x1, #:lo12:.LANCHOR152]
 	str	w2, [x1, x3]
 	ldr	w1, [x28, 40]
 	str	w1, [x0, 8]
-	b	.L3148
-.L3154:
+	b	.L3328
+.L3334:
 	cmp	w0, 2
-	bne	.L3156
-	adrp	x0, .LANCHOR104
-	adrp	x1, .LANCHOR105
-	ldrb	w0, [x0, #:lo12:.LANCHOR104]
-	cbnz	w0, .L3157
+	bne	.L3336
+	adrp	x0, .LANCHOR70
+	adrp	x1, .LANCHOR107
+	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	cbnz	w0, .L3337
 	ldr	w0, [x29, 156]
-	ldrh	w1, [x1, #:lo12:.LANCHOR105]
+	ldrh	w1, [x1, #:lo12:.LANCHOR107]
 	add	w0, w19, w0
 	add	x0, x22, x0, sxtw 1
 	ldrh	w0, [x0, 16]
 	madd	w0, w0, w1, w21
-.L3215:
+.L3398:
 	orr	w0, w0, 33554432
 	str	w0, [x3, 40]
-.L3156:
+.L3336:
 	ldr	x0, [x29, 120]
 	add	x0, x0, x2, lsl 6
 	ldrh	w1, [x0, 48]
 	ldr	w3, [x0, 40]
-	ldr	x0, [x5, #:lo12:.LANCHOR149]
+	ldr	x0, [x5, #:lo12:.LANCHOR154]
 	str	w3, [x0, x1, lsl 2]
-	b	.L3155
-.L3157:
+	b	.L3335
+.L3337:
 	add	w0, w19, w26, lsr 1
-	ldrh	w1, [x1, #:lo12:.LANCHOR105]
+	ldrh	w1, [x1, #:lo12:.LANCHOR107]
 	add	x0, x22, x0, sxtw 1
 	ldrh	w0, [x0, 16]
 	madd	w0, w0, w1, w21
 	and	w1, w26, 1
 	add	w0, w0, w1
-	b	.L3215
-.L3160:
-	adrp	x1, .LANCHOR70
-	ldrb	w3, [x1, #:lo12:.LANCHOR70]
-	ldr	x1, [x29, 160]
-	cbz	w3, .L3162
-.L3165:
-	strb	wzr, [x1, 60]
-	b	.L3163
-.L3162:
+	b	.L3398
+.L3341:
 	cmp	w23, 1
-	bne	.L3164
-	mov	w3, 9
-.L3214:
-	strb	w3, [x1, 60]
-.L3163:
+	bne	.L3343
+	mov	w2, 9
+.L3397:
+	strb	w2, [x3, 60]
+.L3342:
+	mov	w2, w1
 	add	x1, x0, 24
 	bl	sblk_xlc_prog_pages
-.L3166:
-	adrp	x1, .LANCHOR70
+.L3345:
+	adrp	x1, .LANCHOR73
 	ldrb	w3, [x22, 9]
-	ldrb	w1, [x1, #:lo12:.LANCHOR70]
+	ldrb	w1, [x1, #:lo12:.LANCHOR73]
 	and	w0, w3, 65535
-	cbz	w1, .L3168
+	cbz	w1, .L3350
 	add	w0, w0, w0, lsl 1
-.L3169:
-	adrp	x1, .LANCHOR97
-	add	x24, x24, :lo12:.LANCHOR62
-	ldr	x1, [x1, #:lo12:.LANCHOR97]
+.L3351:
+	adrp	x1, .LANCHOR100
+	add	x24, x24, :lo12:.LANCHOR63
+	ldr	x1, [x1, #:lo12:.LANCHOR100]
 	ldr	w2, [x1, 52]
 	add	w2, w2, w0
 	str	w2, [x1, 52]
 	ldrh	w1, [x24, 314]
 	add	w0, w0, w1
-	adrp	x1, .LANCHOR72
+	adrp	x1, .LANCHOR75
 	and	w0, w0, 65535
 	strh	w0, [x24, 314]
-	ldrh	w1, [x1, #:lo12:.LANCHOR72]
+	ldrh	w1, [x1, #:lo12:.LANCHOR75]
 	mul	w1, w1, w3
 	cmp	w0, w1
-	blt	.L3170
+	blt	.L3352
 	ldr	x0, [x29, 136]
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	strh	wzr, [x0, 86]
-.L3170:
+.L3352:
 	bl	gc_write_completed
-	b	.L3127
-.L3164:
+	b	.L3307
+.L3343:
 	cmp	w23, 2
-	bne	.L3165
-	mov	w3, 13
-	b	.L3214
-.L3167:
+	bne	.L3344
+	mov	w2, 13
+	b	.L3397
+.L3340:
+	adrp	x2, .LANCHOR70
+	ldrb	w2, [x2, #:lo12:.LANCHOR70]
+	cbz	w2, .L3355
+	adrp	x2, .LANCHOR71
+	ldrb	w2, [x2, #:lo12:.LANCHOR71]
+	cbnz	w2, .L3347
+.L3346:
+	sub	w1, w3, #1
+.L3348:
+	cmp	w2, w1
+	blt	.L3349
+	ldr	x0, [x0, w1, sxtw 3]
+	mov	w1, -1
+	strb	w1, [x0]
+	mov	w1, w3
+	ldr	x0, [x29, 160]
+	bl	sblk_prog_page
+	b	.L3345
+.L3355:
+	mov	w2, 0
+	b	.L3346
+.L3347:
+	bl	sblk_3d_mlc_prog_pages
+	b	.L3345
+.L3349:
 	ldr	x4, [x0, w2, sxtw 3]
 	add	w2, w2, 1
 	ldr	x5, [x0, w2, sxtw 3]
 	and	w2, w2, 65535
 	ldrb	w5, [x5, 1]
 	strb	w5, [x4]
-	b	.L3161
-.L3168:
-	adrp	x1, .LANCHOR104
-	ldrb	w2, [x1, #:lo12:.LANCHOR104]
+	b	.L3348
+.L3350:
+	adrp	x1, .LANCHOR70
+	ldrb	w2, [x1, #:lo12:.LANCHOR70]
 	mov	w1, w0
 	ubfiz	w0, w0, 1, 15
 	cmp	w2, 0
 	csel	w0, w0, w1, ne
-	b	.L3169
+	b	.L3351
 	.size	gc_do_copy_back, .-gc_do_copy_back
 	.section	.text.zftl_do_gc,"ax",@progbits
 	.align	2
@@ -20045,231 +21250,247 @@ gc_do_copy_back:
 	.type	zftl_do_gc, %function
 zftl_do_gc:
 	sub	sp, sp, #128
-	adrp	x1, .LANCHOR94
+	adrp	x1, .LANCHOR97
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
-	stp	x21, x22, [sp, 48]
 	stp	x19, x20, [sp, 32]
-	adrp	x19, .LANCHOR145
-	ldrh	w22, [x1, #:lo12:.LANCHOR94]
-	adrp	x1, .LANCHOR90
+	adrp	x19, .LANCHOR150
+	stp	x21, x22, [sp, 48]
+	ldrh	w22, [x1, #:lo12:.LANCHOR97]
+	adrp	x1, .LANCHOR93
 	stp	x23, x24, [sp, 64]
 	adrp	x23, .LANCHOR10
-	ldrh	w21, [x1, #:lo12:.LANCHOR90]
+	ldrh	w21, [x1, #:lo12:.LANCHOR93]
 	stp	x25, x26, [sp, 80]
-	ldrb	w1, [x19, #:lo12:.LANCHOR145]
+	ldrb	w1, [x19, #:lo12:.LANCHOR150]
 	add	w21, w22, w21
 	stp	x27, x28, [sp, 96]
-	ldr	x24, [x23, #:lo12:.LANCHOR10]
+	ldr	x20, [x23, #:lo12:.LANCHOR10]
 	cmp	w1, 6
-	bhi	.L3323
-	mov	w26, w0
+	bhi	.L3507
+	mov	w25, w0
 	and	w21, w21, 65535
-	adrp	x0, .L3219
-	add	x0, x0, :lo12:.L3219
+	adrp	x0, .L3402
+	add	x0, x0, :lo12:.L3402
 	ldrh	w0, [x0,w1,uxtw #1]
-	adr	x1, .Lrtx3219
+	adr	x1, .Lrtx3402
 	add	x0, x1, w0, sxth #2
 	br	x0
-.Lrtx3219:
+.Lrtx3402:
 	.section	.rodata.zftl_do_gc,"a",@progbits
 	.align	0
 	.align	2
-.L3219:
-	.2byte	(.L3218 - .Lrtx3219) / 4
-	.2byte	(.L3220 - .Lrtx3219) / 4
-	.2byte	(.L3221 - .Lrtx3219) / 4
-	.2byte	(.L3222 - .Lrtx3219) / 4
-	.2byte	(.L3223 - .Lrtx3219) / 4
-	.2byte	(.L3224 - .Lrtx3219) / 4
-	.2byte	(.L3225 - .Lrtx3219) / 4
+.L3402:
+	.2byte	(.L3401 - .Lrtx3402) / 4
+	.2byte	(.L3403 - .Lrtx3402) / 4
+	.2byte	(.L3404 - .Lrtx3402) / 4
+	.2byte	(.L3405 - .Lrtx3402) / 4
+	.2byte	(.L3406 - .Lrtx3402) / 4
+	.2byte	(.L3407 - .Lrtx3402) / 4
+	.2byte	(.L3408 - .Lrtx3402) / 4
 	.section	.text.zftl_do_gc
-.L3224:
-	adrp	x20, .LANCHOR62
-	add	x24, x20, :lo12:.LANCHOR62
+.L3407:
+	adrp	x20, .LANCHOR63
+	add	x24, x20, :lo12:.LANCHOR63
 	mov	w22, 0
-.L3226:
+.L3409:
 	bl	gc_check_data_one_wl
-	cbz	w0, .L3319
+	cbz	w0, .L3503
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
-	add	x20, x20, :lo12:.LANCHOR62
+	add	x20, x20, :lo12:.LANCHOR63
 	strh	wzr, [x20, 56]
 	ldrh	w0, [x0, 80]
 	bl	ftl_free_sblk
-	adrp	x2, .LANCHOR97
+	adrp	x2, .LANCHOR100
 	ldr	x1, [x23, #:lo12:.LANCHOR10]
 	mov	w0, -1
-	ldr	x2, [x2, #:lo12:.LANCHOR97]
+	ldr	x2, [x2, #:lo12:.LANCHOR100]
 	strh	w0, [x1, 80]
 	strh	w0, [x2, 126]
 	strh	w0, [x1, 130]
 	ldr	x0, [x20, 8]
 	bl	buf_free
-	strb	wzr, [x19, #:lo12:.LANCHOR145]
+	strb	wzr, [x19, #:lo12:.LANCHOR150]
 	str	xzr, [x20, 8]
-	b	.L3387
-.L3218:
-	adrp	x0, .LANCHOR92
-	adrp	x28, .LANCHOR85
-	adrp	x27, .LANCHOR83
-	ldrh	w1, [x24, 80]
-	ldrh	w0, [x0, #:lo12:.LANCHOR92]
-	ldrh	w25, [x28, #:lo12:.LANCHOR85]
+	b	.L3574
+.L3401:
+	adrp	x0, .LANCHOR95
+	adrp	x27, .LANCHOR88
+	ldrh	w2, [x20, 80]
+	ldrh	w0, [x0, #:lo12:.LANCHOR95]
+	ldrh	w24, [x27, #:lo12:.LANCHOR88]
 	add	w22, w22, w0
-	ldrh	w0, [x27, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR86
+	str	x0, [x29, 104]
 	and	w22, w22, 65535
-	add	w25, w25, w0
-	mov	w0, 65535
-	and	w25, w25, 65535
-	cmp	w1, w0
-	beq	.L3227
-	cbnz	w26, .L3228
-	adrp	x0, .LANCHOR74
-	ldrh	w0, [x0, #:lo12:.LANCHOR74]
+	ldrh	w1, [x0, #:lo12:.LANCHOR86]
+	add	w24, w24, w1
+	mov	w1, 65535
+	and	w24, w24, 65535
+	cmp	w2, w1
+	beq	.L3410
+	cbnz	w25, .L3411
+	adrp	x0, .LANCHOR77
+	ldrh	w0, [x0, #:lo12:.LANCHOR77]
 	cmp	w21, w0, lsl 1
-	blt	.L3228
-.L3323:
+	blt	.L3411
+.L3507:
 	mov	w20, 16
-	b	.L3216
-.L3228:
-	adrp	x5, .LANCHOR82
+	b	.L3399
+.L3411:
+	adrp	x5, .LANCHOR85
 	mov	w1, 5
-	adrp	x26, .LANCHOR71
-	ldrh	w0, [x5, #:lo12:.LANCHOR82]
+	adrp	x25, .LANCHOR74
+	ldrh	w0, [x5, #:lo12:.LANCHOR85]
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	strh	w0, [x5, #:lo12:.LANCHOR82]
+	strh	w0, [x5, #:lo12:.LANCHOR85]
 	bl	zftl_get_gc_node
 	and	w3, w0, 65535
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L3229
+	beq	.L3412
 	adrp	x4, .LANCHOR9
 	ubfiz	x3, x3, 1, 16
-	adrp	x1, .LANCHOR146
-	mov	x20, x1
+	adrp	x1, .LANCHOR151
+	mov	x26, x1
 	ldr	x4, [x4, #:lo12:.LANCHOR9]
-	ldr	w2, [x1, #:lo12:.LANCHOR146]
+	ldr	w2, [x1, #:lo12:.LANCHOR151]
 	add	w2, w2, 1
-	str	w2, [x1, #:lo12:.LANCHOR146]
+	str	w2, [x1, #:lo12:.LANCHOR151]
 	ldrh	w3, [x4, x3]
-	adrp	x4, .LANCHOR80
-	ldrh	w4, [x4, #:lo12:.LANCHOR80]
+	adrp	x4, .LANCHOR83
+	ldrh	w4, [x4, #:lo12:.LANCHOR83]
 	cmp	w4, w3
-	bcs	.L3230
+	bcs	.L3413
 	adrp	x1, .LANCHOR6
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	cmp	w2, w1, lsr 4
-	bls	.L3229
-	adrp	x1, .LANCHOR86
-	ldrh	w1, [x1, #:lo12:.LANCHOR86]
+	bls	.L3412
+	adrp	x1, .LANCHOR89
+	ldrh	w1, [x1, #:lo12:.LANCHOR89]
 	cmp	w1, w3
-	bls	.L3229
-.L3230:
-	ldrb	w2, [x26, #:lo12:.LANCHOR71]
+	bls	.L3412
+.L3413:
+	ldrb	w2, [x25, #:lo12:.LANCHOR74]
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L3231
+	cbz	w0, .L3414
 	mov	w0, 1
-	str	wzr, [x20, #:lo12:.LANCHOR146]
-	strb	w0, [x19, #:lo12:.LANCHOR145]
-	b	.L3323
-.L3229:
-	strh	wzr, [x5, #:lo12:.LANCHOR82]
-.L3231:
+	str	wzr, [x26, #:lo12:.LANCHOR151]
+	strb	w0, [x19, #:lo12:.LANCHOR150]
+	b	.L3507
+.L3412:
+	strh	wzr, [x5, #:lo12:.LANCHOR85]
+.L3414:
 	cmp	w22, 15
-	bls	.L3325
-	adrp	x0, .LANCHOR87
-	ldrh	w1, [x0, #:lo12:.LANCHOR87]
-	adrp	x0, .LANCHOR88
-	ldrh	w0, [x0, #:lo12:.LANCHOR88]
+	bls	.L3509
+	adrp	x0, .LANCHOR90
+	ldrh	w1, [x0, #:lo12:.LANCHOR90]
+	adrp	x0, .LANCHOR91
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	cmp	w1, w0
-	bhi	.L3325
-	cmp	w25, 0
-	cset	w20, eq
-	add	w20, w20, 1
-.L3232:
+	bhi	.L3509
+	cmp	w24, 0
+	cset	w24, eq
+	add	w24, w24, 1
+.L3415:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3233
+	tbz	x0, 8, .L3416
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	mov	w4, w22
-	ldrb	w2, [x26, #:lo12:.LANCHOR71]
+	ldrb	w2, [x25, #:lo12:.LANCHOR74]
 	mov	w3, w21
-	mov	w1, 1850
+	mov	w1, 1935
 	ldrh	w7, [x0, 122]
 	ldrh	w6, [x0, 120]
 	ldrh	w5, [x0, 124]
-	ldrh	w0, [x24, 80]
+	ldrh	w0, [x20, 80]
 	str	w0, [sp]
-	adrp	x0, .LC217
-	add	x0, x0, :lo12:.LC217
+	adrp	x0, .LC228
+	add	x0, x0, :lo12:.LC228
 	bl	printf
-.L3233:
-	ldrb	w0, [x26, #:lo12:.LANCHOR71]
+.L3416:
+	ldrb	w0, [x25, #:lo12:.LANCHOR74]
 	mov	w2, 1
-	mov	w1, w20
+	mov	w1, w24
 	bl	gc_search_src_blk
 	cmp	w0, 0
-	ble	.L3234
-.L3235:
+	ble	.L3417
+.L3418:
 	mov	w0, 1
-.L3389:
-	strb	w0, [x19, #:lo12:.LANCHOR145]
-	b	.L3323
-.L3325:
-	mov	w20, 2
-	b	.L3232
-.L3234:
-	ldrb	w0, [x26, #:lo12:.LANCHOR71]
+.L3576:
+	strb	w0, [x19, #:lo12:.LANCHOR150]
+	b	.L3507
+.L3509:
+	mov	w24, 2
+	b	.L3415
+.L3417:
+	ldrb	w0, [x25, #:lo12:.LANCHOR74]
 	mov	w2, 1
 	mov	w1, 3
 	bl	gc_search_src_blk
 	cmp	w0, 0
-	bgt	.L3235
-	b	.L3323
-.L3227:
-	cmp	w26, 1
-	bne	.L3237
+	bgt	.L3418
+	b	.L3507
+.L3410:
+	adrp	x28, .LANCHOR14
+	ldr	w0, [x28, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L3420
+	adrp	x0, .LANCHOR74
+	ldrh	w7, [x20, 122]
+	ldrh	w6, [x20, 120]
+	mov	w4, w22
+	ldrh	w5, [x20, 124]
+	mov	w3, w21
+	ldrb	w2, [x0, #:lo12:.LANCHOR74]
+	mov	w1, 1947
+	str	w25, [sp]
+	adrp	x0, .LC228
+	add	x0, x0, :lo12:.LC228
+	bl	printf
+.L3420:
+	cmp	w25, 1
+	bne	.L3421
 	bl	gc_scan_static_data
-	adrp	x24, .LANCHOR71
+	adrp	x26, .LANCHOR74
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	ldrh	w0, [x0, 122]
-	cbz	w0, .L3238
-.L3239:
+	cbz	w0, .L3422
+.L3423:
 	mov	w0, 1
-	strb	w0, [x24, #:lo12:.LANCHOR71]
-	b	.L3389
-.L3238:
+	strb	w0, [x26, #:lo12:.LANCHOR74]
+	b	.L3576
+.L3422:
 	bl	gc_static_wearleveling
 	mov	w20, w0
-	cbnz	w0, .L3239
-	cbnz	w22, .L3240
-.L3244:
+	cbnz	w0, .L3423
+	cbnz	w22, .L3424
+.L3428:
 	mov	w20, 16
-.L3241:
+.L3425:
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
-	adrp	x3, .LANCHOR71
+	adrp	x3, .LANCHOR74
 	mov	w1, 1
 	mov	x23, x3
-	strb	w1, [x3, #:lo12:.LANCHOR71]
+	strb	w1, [x3, #:lo12:.LANCHOR74]
 	ldrh	w5, [x0, 124]
-	cbz	w5, .L3249
-	strb	w1, [x19, #:lo12:.LANCHOR145]
-	adrp	x1, .LANCHOR14
-	strb	wzr, [x3, #:lo12:.LANCHOR71]
-	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 8, .L3216
+	cbz	w5, .L3433
+	strb	w1, [x19, #:lo12:.LANCHOR150]
+	ldr	w1, [x28, #:lo12:.LANCHOR14]
+	strb	wzr, [x3, #:lo12:.LANCHOR74]
+	tbz	x1, 8, .L3399
 	ldrh	w7, [x0, 122]
 	mov	w4, w22
 	ldrh	w6, [x0, 120]
 	mov	w3, w21
-	adrp	x0, .LC218
+	adrp	x0, .LC229
 	mov	w2, 0
-	mov	w1, 1948
-	add	x0, x0, :lo12:.LC218
+	mov	w1, 2037
+	add	x0, x0, :lo12:.LC229
 	bl	printf
-.L3216:
+.L3399:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
@@ -20279,663 +21500,662 @@ zftl_do_gc:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 128
 	ret
-.L3240:
-	cmp	w21, w25
-	adrp	x1, .LANCHOR87
-	adrp	x2, .LANCHOR84
-	bcs	.L3242
-	ldrh	w0, [x2, #:lo12:.LANCHOR84]
-	cmp	w21, w0, lsl 1
-	blt	.L3243
-.L3242:
-	ldrh	w2, [x2, #:lo12:.LANCHOR84]
-	add	w0, w21, w25
-	cmp	w0, w2, lsl 1
-	blt	.L3243
-	adrp	x0, .LANCHOR88
-	ldrh	w2, [x1, #:lo12:.LANCHOR87]
-	ldrh	w0, [x0, #:lo12:.LANCHOR88]
+.L3424:
+	cmp	w21, w24
+	adrp	x1, .LANCHOR90
+	adrp	x2, .LANCHOR87
+	bcs	.L3426
+	ldrh	w0, [x2, #:lo12:.LANCHOR87]
+	cmp	w0, w21
+	bhi	.L3427
+.L3426:
+	ldrh	w2, [x2, #:lo12:.LANCHOR87]
+	add	w0, w21, w24
+	cmp	w0, w2
+	blt	.L3427
+	adrp	x0, .LANCHOR91
+	ldrh	w2, [x1, #:lo12:.LANCHOR90]
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	cmp	w2, w0
-	bcc	.L3244
-.L3243:
-	adrp	x5, .LANCHOR146
+	bcc	.L3428
+.L3427:
+	adrp	x5, .LANCHOR151
 	adrp	x2, .LANCHOR6
 	mov	w6, 1
-	strb	w6, [x24, #:lo12:.LANCHOR71]
-	ldr	w0, [x5, #:lo12:.LANCHOR146]
+	strb	w6, [x26, #:lo12:.LANCHOR74]
+	ldr	w0, [x5, #:lo12:.LANCHOR151]
 	ldrh	w2, [x2, #:lo12:.LANCHOR6]
 	add	w0, w0, 1
-	str	w0, [x5, #:lo12:.LANCHOR146]
+	str	w0, [x5, #:lo12:.LANCHOR151]
 	cmp	w0, w2, lsr 5
-	bls	.L3245
-	ldrh	w0, [x1, #:lo12:.LANCHOR87]
+	bls	.L3429
+	ldrh	w0, [x1, #:lo12:.LANCHOR90]
 	cmp	w0, w22
-	bls	.L3245
+	bls	.L3429
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3244
+	beq	.L3428
 	adrp	x1, .LANCHOR9
 	ubfiz	x0, x0, 1, 16
-	adrp	x2, .LANCHOR73
+	adrp	x2, .LANCHOR76
 	ldr	x1, [x1, #:lo12:.LANCHOR9]
-	ldrb	w2, [x2, #:lo12:.LANCHOR73]
+	ldrb	w2, [x2, #:lo12:.LANCHOR76]
 	ldrh	w1, [x1, x0]
-	adrp	x0, .LANCHOR80
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR83
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	bgt	.L3244
+	bgt	.L3428
 	mov	w0, w6
-	str	wzr, [x5, #:lo12:.LANCHOR146]
+	str	wzr, [x5, #:lo12:.LANCHOR151]
 	mov	w2, 4
 	mov	w1, 2
-.L3377:
+.L3564:
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-	cbz	w0, .L3244
-	b	.L3235
-.L3245:
-	adrp	x0, .LANCHOR88
-	ldrh	w1, [x1, #:lo12:.LANCHOR87]
-	ldrh	w0, [x0, #:lo12:.LANCHOR88]
+	cbz	w0, .L3428
+	b	.L3418
+.L3429:
+	adrp	x0, .LANCHOR91
+	ldrh	w1, [x1, #:lo12:.LANCHOR90]
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	cmp	w1, w0
-	bcc	.L3247
+	bcc	.L3431
 	mov	w2, 1
 	mov	w1, 2
 	mov	w0, w2
-	b	.L3377
-.L3247:
-	ldrh	w0, [x28, #:lo12:.LANCHOR85]
-	cbnz	w0, .L3248
-	ldrh	w0, [x27, #:lo12:.LANCHOR83]
+	b	.L3564
+.L3431:
+	ldrh	w0, [x27, #:lo12:.LANCHOR88]
+	cbnz	w0, .L3432
+	ldr	x0, [x29, 104]
+	ldrh	w0, [x0, #:lo12:.LANCHOR86]
 	cmp	w0, 8
-	bls	.L3241
-.L3248:
+	bls	.L3425
+.L3432:
 	mov	w1, 1
 	mov	w2, 4
 	mov	w0, w1
-	b	.L3377
-.L3237:
-	adrp	x0, .LANCHOR74
-	ldrh	w0, [x0, #:lo12:.LANCHOR74]
+	b	.L3564
+.L3421:
+	adrp	x0, .LANCHOR77
+	ldrh	w0, [x0, #:lo12:.LANCHOR77]
 	cmp	w0, w21
-	bcc	.L3323
-	b	.L3244
-.L3249:
-	adrp	x2, .LANCHOR74
-	mov	x24, x2
-	ldrh	w4, [x2, #:lo12:.LANCHOR74]
+	bcc	.L3507
+	b	.L3428
+.L3433:
+	adrp	x2, .LANCHOR77
+	mov	x26, x2
+	ldrh	w4, [x2, #:lo12:.LANCHOR77]
 	cmp	w21, w4
-	bcs	.L3250
-	cbz	w22, .L3251
+	bcs	.L3434
+	cbz	w22, .L3435
 	cmp	w22, 16
-	bls	.L3252
-	adrp	x0, .LANCHOR87
-	ldrh	w2, [x0, #:lo12:.LANCHOR87]
-	adrp	x0, .LANCHOR88
-	ldrh	w0, [x0, #:lo12:.LANCHOR88]
+	bls	.L3436
+	adrp	x0, .LANCHOR90
+	ldrh	w2, [x0, #:lo12:.LANCHOR90]
+	adrp	x0, .LANCHOR91
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	cmp	w2, w0
-	bhi	.L3252
+	bhi	.L3436
 	str	x3, [x29, 104]
 	mov	w2, 4
 	mov	w0, w1
 	bl	gc_search_src_blk
 	ldr	x3, [x29, 104]
 	tst	w0, 65535
-	bne	.L3253
-	ldrb	w0, [x3, #:lo12:.LANCHOR71]
+	bne	.L3437
+	ldrb	w0, [x3, #:lo12:.LANCHOR74]
 	mov	w2, 4
 	mov	w1, 3
-.L3379:
+.L3570:
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-.L3254:
-	cbnz	w0, .L3256
-	b	.L3216
-.L3253:
+.L3438:
+	cbnz	w0, .L3440
+	b	.L3399
+.L3437:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	and	w3, w0, 65535
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L3256
+	beq	.L3440
 	adrp	x4, .LANCHOR9
 	ubfiz	x3, x3, 1, 16
-	adrp	x1, .LANCHOR146
+	adrp	x1, .LANCHOR151
 	mov	x21, x1
 	ldr	x4, [x4, #:lo12:.LANCHOR9]
-	ldr	w2, [x1, #:lo12:.LANCHOR146]
+	ldr	w2, [x1, #:lo12:.LANCHOR151]
 	add	w2, w2, 1
-	str	w2, [x1, #:lo12:.LANCHOR146]
+	str	w2, [x1, #:lo12:.LANCHOR151]
 	ldrh	w3, [x4, x3]
-	adrp	x4, .LANCHOR80
-	ldrh	w4, [x4, #:lo12:.LANCHOR80]
+	adrp	x4, .LANCHOR83
+	ldrh	w4, [x4, #:lo12:.LANCHOR83]
 	cmp	w4, w3
-	bcs	.L3257
+	bcs	.L3441
 	adrp	x1, .LANCHOR6
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	cmp	w2, w1, lsr 4
-	bls	.L3256
-	adrp	x1, .LANCHOR86
-	ldrh	w1, [x1, #:lo12:.LANCHOR86]
+	bls	.L3440
+	adrp	x1, .LANCHOR89
+	ldrh	w1, [x1, #:lo12:.LANCHOR89]
 	cmp	w1, w3
-	bls	.L3256
-.L3257:
-	ldrb	w2, [x23, #:lo12:.LANCHOR71]
+	bls	.L3440
+.L3441:
+	ldrb	w2, [x23, #:lo12:.LANCHOR74]
 	mov	w1, 0
 	bl	gc_add_sblk
-	str	wzr, [x21, #:lo12:.LANCHOR146]
-	adrp	x0, .LANCHOR116
+	str	wzr, [x21, #:lo12:.LANCHOR151]
+	adrp	x0, .LANCHOR118
 	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR116]
-.L3256:
+	str	w1, [x0, #:lo12:.LANCHOR118]
+.L3440:
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR145]
-	b	.L3216
-.L3252:
+	strb	w0, [x19, #:lo12:.LANCHOR150]
+	b	.L3399
+.L3436:
 	mov	w2, 1
 	mov	w0, w2
 	mov	w1, 2
-.L3386:
+.L3573:
 	bl	gc_search_src_blk
 	tst	w0, 65535
-	bne	.L3256
+	bne	.L3440
 	mov	w2, 2
-.L3382:
-	mov	w1, 3
-	ldrb	w0, [x23, #:lo12:.LANCHOR71]
-	b	.L3379
-.L3251:
-	adrp	x1, .LANCHOR14
-	strb	wzr, [x3, #:lo12:.LANCHOR71]
-	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 8, .L3259
+	b	.L3566
+.L3435:
+	ldr	w1, [x28, #:lo12:.LANCHOR14]
+	strb	wzr, [x3, #:lo12:.LANCHOR74]
+	tbz	x1, 8, .L3443
 	ldrh	w7, [x0, 122]
 	mov	w5, 0
 	ldrh	w6, [x0, 120]
 	mov	w4, 0
-	adrp	x0, .LC218
+	adrp	x0, .LC229
 	mov	w3, w21
 	mov	w2, 0
-	mov	w1, 1978
-	add	x0, x0, :lo12:.LC218
+	mov	w1, 2067
+	add	x0, x0, :lo12:.LC229
 	bl	printf
-.L3259:
+.L3443:
 	cmp	w21, 16
-	bls	.L3260
+	bls	.L3444
 	mov	w2, 4
-	b	.L3382
-.L3260:
+.L3566:
+	mov	w1, 3
+	ldrb	w0, [x23, #:lo12:.LANCHOR74]
+	b	.L3570
+.L3444:
 	mov	w2, 1
-	ldrb	w0, [x23, #:lo12:.LANCHOR71]
+	ldrb	w0, [x23, #:lo12:.LANCHOR74]
 	mov	w1, w2
-	b	.L3386
-.L3250:
-	cmp	w26, 1
-	bne	.L3216
+	b	.L3573
+.L3434:
+	cmp	w25, 1
+	bne	.L3399
 	cmp	w21, w4, lsl 1
-	bge	.L3261
-	cmp	w25, w22, lsr 1
-	bcs	.L3262
-	adrp	x0, .LANCHOR87
-	ldrh	w1, [x0, #:lo12:.LANCHOR87]
-	adrp	x0, .LANCHOR88
-	ldrh	w0, [x0, #:lo12:.LANCHOR88]
+	bge	.L3445
+	cmp	w24, w22, lsr 1
+	bcs	.L3446
+	adrp	x0, .LANCHOR90
+	ldrh	w1, [x0, #:lo12:.LANCHOR90]
+	adrp	x0, .LANCHOR91
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	cmp	w1, w0
-	bcs	.L3262
-	adrp	x0, .LANCHOR84
-	ldrh	w0, [x0, #:lo12:.LANCHOR84]
+	bcs	.L3446
+	adrp	x0, .LANCHOR87
+	ldrh	w0, [x0, #:lo12:.LANCHOR87]
 	lsr	w0, w0, 2
-	strh	w0, [x2, #:lo12:.LANCHOR74]
-	b	.L3216
-.L3262:
+	strh	w0, [x2, #:lo12:.LANCHOR77]
+	b	.L3399
+.L3446:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
-	and	w26, w0, 65535
+	and	w25, w0, 65535
 	mov	w1, 65535
-	mov	w3, w26
-	cmp	w26, w1
-	bne	.L3263
-.L3268:
+	mov	w28, w25
+	cmp	w25, w1
+	bne	.L3447
+.L3452:
 	cmp	w22, 1
-	bhi	.L3264
-.L3265:
-	cmp	w21, w25
-	adrp	x21, .LANCHOR84
-	bcs	.L3272
-	strb	wzr, [x23, #:lo12:.LANCHOR71]
+	bhi	.L3448
+.L3449:
+	cmp	w21, w24
+	adrp	x21, .LANCHOR87
+	bcs	.L3456
+	strb	wzr, [x23, #:lo12:.LANCHOR74]
 	mov	w0, 4
 	bl	zftl_get_gc_node.part.9
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3272
+	beq	.L3456
 	adrp	x1, .LANCHOR9
 	ubfiz	x0, x0, 1, 16
-	adrp	x2, .LANCHOR73
+	adrp	x2, .LANCHOR76
 	ldr	x1, [x1, #:lo12:.LANCHOR9]
-	ldrb	w2, [x2, #:lo12:.LANCHOR73]
+	ldrb	w2, [x2, #:lo12:.LANCHOR76]
 	ldrh	w1, [x1, x0]
-	adrp	x0, .LANCHOR80
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR83
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
 	mul	w0, w0, w2
 	cmp	w1, w0, lsr 1
-	ble	.L3274
-.L3272:
-	ldrh	w0, [x21, #:lo12:.LANCHOR84]
+	ble	.L3458
+.L3456:
+	ldrh	w0, [x21, #:lo12:.LANCHOR87]
 	lsr	w0, w0, 2
-	strh	w0, [x24, #:lo12:.LANCHOR74]
-	b	.L3216
-.L3263:
-	adrp	x2, .LANCHOR146
-	adrp	x4, .LANCHOR6
-	uxtw	x26, w26
-	ldr	w1, [x2, #:lo12:.LANCHOR146]
-	ldrh	w4, [x4, #:lo12:.LANCHOR6]
+	strh	w0, [x26, #:lo12:.LANCHOR77]
+	b	.L3399
+.L3447:
+	adrp	x2, .LANCHOR151
+	adrp	x3, .LANCHOR6
+	uxtw	x25, w25
+	ldr	w1, [x2, #:lo12:.LANCHOR151]
+	ldrh	w3, [x3, #:lo12:.LANCHOR6]
 	add	w1, w1, 1
-	str	w1, [x2, #:lo12:.LANCHOR146]
-	cmp	w1, w4, lsr 4
-	adrp	x4, .LANCHOR9
-	bls	.L3266
-	ldr	x1, [x4, #:lo12:.LANCHOR9]
-	str	wzr, [x2, #:lo12:.LANCHOR146]
-	ldrh	w2, [x1, x26, lsl 1]
-	adrp	x1, .LANCHOR86
-	ldrh	w1, [x1, #:lo12:.LANCHOR86]
+	str	w1, [x2, #:lo12:.LANCHOR151]
+	cmp	w1, w3, lsr 4
+	adrp	x3, .LANCHOR9
+	bls	.L3450
+	ldr	x1, [x3, #:lo12:.LANCHOR9]
+	str	wzr, [x2, #:lo12:.LANCHOR151]
+	ldrh	w2, [x1, x25, lsl 1]
+	adrp	x1, .LANCHOR89
+	ldrh	w1, [x1, #:lo12:.LANCHOR89]
 	cmp	w2, w1
-	bcs	.L3266
-	str	x4, [x29, 96]
+	bcs	.L3450
+	str	x3, [x29, 96]
 	mov	w2, 1
-	str	w3, [x29, 104]
 	mov	w1, 0
 	bl	gc_add_sblk
-	ldr	w3, [x29, 104]
-	ldr	x4, [x29, 96]
-	cbnz	w0, .L3256
-.L3266:
-	ldr	x0, [x4, #:lo12:.LANCHOR9]
-	ldrh	w1, [x0, x26, lsl 1]
-	adrp	x0, .LANCHOR80
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	ldr	x3, [x29, 96]
+	cbnz	w0, .L3440
+.L3450:
+	ldr	x0, [x3, #:lo12:.LANCHOR9]
+	ldrh	w1, [x0, x25, lsl 1]
+	adrp	x0, .LANCHOR83
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
 	cmp	w1, w0, lsr 1
-	bhi	.L3267
+	bhi	.L3451
 	mov	w2, 0
 	mov	w1, 1
-	mov	w0, w3
+	mov	w0, w28
 	bl	gc_add_sblk
-	b	.L3256
-.L3267:
-	ldrh	w2, [x27, #:lo12:.LANCHOR83]
-	ldrh	w0, [x28, #:lo12:.LANCHOR85]
+	b	.L3440
+.L3451:
+	ldr	x2, [x29, 104]
+	ldrh	w0, [x27, #:lo12:.LANCHOR88]
+	ldrh	w2, [x2, #:lo12:.LANCHOR86]
 	add	w0, w0, w2
-	adrp	x2, .LANCHOR84
-	ldrh	w2, [x2, #:lo12:.LANCHOR84]
+	adrp	x2, .LANCHOR87
+	ldrh	w2, [x2, #:lo12:.LANCHOR87]
 	cmp	w0, w2, lsl 1
-	ble	.L3268
-	adrp	x0, .LANCHOR86
-	ldrh	w0, [x0, #:lo12:.LANCHOR86]
+	ble	.L3452
+	adrp	x0, .LANCHOR89
+	ldrh	w0, [x0, #:lo12:.LANCHOR89]
 	cmp	w0, w1
-	bcc	.L3265
-	b	.L3268
-.L3264:
+	bcc	.L3449
+	b	.L3452
+.L3448:
 	mov	w1, 1
-	strb	w1, [x23, #:lo12:.LANCHOR71]
+	strb	w1, [x23, #:lo12:.LANCHOR74]
 	cmp	w22, 16
-	bls	.L3269
-	adrp	x0, .LANCHOR87
-	ldrh	w2, [x0, #:lo12:.LANCHOR87]
-	adrp	x0, .LANCHOR88
-	ldrh	w0, [x0, #:lo12:.LANCHOR88]
+	bls	.L3453
+	adrp	x0, .LANCHOR90
+	ldrh	w2, [x0, #:lo12:.LANCHOR90]
+	adrp	x0, .LANCHOR91
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	cmp	w2, w0
-	bhi	.L3269
+	bhi	.L3453
 	mov	w2, 4
 	mov	w0, w1
 	bl	gc_search_src_blk
 	ands	w0, w0, 65535
-	bne	.L3270
+	bne	.L3454
 	mov	w2, 4
-.L3378:
-	ldrb	w0, [x23, #:lo12:.LANCHOR71]
+.L3565:
+	ldrb	w0, [x23, #:lo12:.LANCHOR74]
 	mov	w1, 3
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-.L3270:
-	adrp	x1, .LANCHOR84
-	cmp	w21, w25, lsr 1
-	ldrh	w1, [x1, #:lo12:.LANCHOR84]
-	bls	.L3380
+.L3454:
+	adrp	x1, .LANCHOR87
+	cmp	w21, w24, lsr 1
+	ldrh	w1, [x1, #:lo12:.LANCHOR87]
+	bls	.L3568
 	lsr	w1, w1, 2
-.L3381:
-	strh	w1, [x24, #:lo12:.LANCHOR74]
-	b	.L3254
-.L3269:
+.L3569:
+	strh	w1, [x26, #:lo12:.LANCHOR77]
+	b	.L3438
+.L3453:
 	mov	w2, 1
 	mov	w1, 2
 	mov	w0, w2
 	bl	gc_search_src_blk
 	ands	w0, w0, 65535
-	bne	.L3270
+	bne	.L3454
 	mov	w2, 2
-	b	.L3378
-.L3274:
+	b	.L3565
+.L3458:
 	mov	w1, 3
 	mov	w2, 4
 	mov	w0, 0
 	bl	gc_search_src_blk
-	ldrh	w1, [x21, #:lo12:.LANCHOR84]
+	ldrh	w1, [x21, #:lo12:.LANCHOR87]
 	and	w0, w0, 65535
-.L3380:
+.L3568:
 	lsr	w1, w1, 1
-	b	.L3381
-.L3261:
-	adrp	x0, .LANCHOR84
+	b	.L3569
+.L3445:
+	adrp	x0, .LANCHOR87
 	mov	w20, 0
-	ldrh	w0, [x0, #:lo12:.LANCHOR84]
+	ldrh	w0, [x0, #:lo12:.LANCHOR87]
 	lsr	w0, w0, 2
-	strh	w0, [x2, #:lo12:.LANCHOR74]
-	b	.L3216
-.L3220:
-	adrp	x7, .LANCHOR62
+	strh	w0, [x2, #:lo12:.LANCHOR77]
+	b	.L3399
+.L3403:
+	adrp	x7, .LANCHOR63
 	mov	w0, 65535
-	ldrh	w1, [x7, #:lo12:.LANCHOR62]
+	ldrh	w1, [x7, #:lo12:.LANCHOR63]
 	cmp	w1, w0
-	bne	.L3275
+	bne	.L3459
 	bl	gc_get_src_blk
-	strh	w0, [x7, #:lo12:.LANCHOR62]
-.L3275:
-	ldrh	w3, [x7, #:lo12:.LANCHOR62]
+	strh	w0, [x7, #:lo12:.LANCHOR63]
+.L3459:
+	ldrh	w3, [x7, #:lo12:.LANCHOR63]
 	mov	w0, 65535
-	add	x1, x7, :lo12:.LANCHOR62
+	add	x1, x7, :lo12:.LANCHOR63
 	cmp	w3, w0
-	beq	.L3388
+	beq	.L3575
 	adrp	x0, .LANCHOR7
 	ldrh	w5, [x1, 56]
 	uxtw	x4, w3
 	ldr	x2, [x0, #:lo12:.LANCHOR7]
 	add	x2, x2, x4, lsl 2
-	cbz	w5, .L3277
+	cbz	w5, .L3461
 	add	x1, x1, 58
 	mov	w0, 0
-.L3279:
+.L3463:
 	ldrh	w6, [x1], 2
 	cmp	w6, w3
-	bne	.L3278
-.L3283:
-	adrp	x0, .LANCHOR62
+	bne	.L3462
+.L3467:
+	adrp	x0, .LANCHOR63
 	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR62]
-	b	.L3323
-.L3278:
+	strh	w1, [x0, #:lo12:.LANCHOR63]
+	b	.L3507
+.L3462:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w5, w0
-	bne	.L3279
-.L3277:
+	bne	.L3463
+.L3461:
 	ldrb	w0, [x2, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L3280
+	beq	.L3464
 	tst	w0, 192
-	bne	.L3281
-.L3280:
+	bne	.L3465
+.L3464:
 	adrp	x0, .LANCHOR9
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, x4, lsl 1]
-	cbz	w0, .L3283
-	mov	w2, 2211
-	adrp	x1, .LANCHOR216
+	cbz	w0, .L3467
+	mov	w2, 2300
+	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR216
+	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3283
-.L3281:
+	b	.L3467
+.L3465:
 	mov	w0, 2
-	b	.L3389
-.L3221:
+	b	.L3576
+.L3404:
 	bl	gc_scan_src_blk
 	cmn	w0, #1
-	bne	.L3284
+	bne	.L3468
 	mov	w0, 3
-	b	.L3389
-.L3284:
-	adrp	x20, .LANCHOR62
+	b	.L3576
+.L3468:
+	adrp	x20, .LANCHOR63
 	mov	w2, 65535
-	add	x0, x20, :lo12:.LANCHOR62
-	ldrh	w1, [x20, #:lo12:.LANCHOR62]
+	add	x0, x20, :lo12:.LANCHOR63
+	ldrh	w1, [x20, #:lo12:.LANCHOR63]
 	cmp	w1, w2
-	beq	.L3235
+	beq	.L3418
 	ldrh	w2, [x0, 24]
-	cbz	w2, .L3285
+	cbz	w2, .L3469
 	mov	w1, 4
 	strh	wzr, [x0, 26]
-	strb	w1, [x19, #:lo12:.LANCHOR145]
-	b	.L3323
-.L3285:
+	strb	w1, [x19, #:lo12:.LANCHOR150]
+	b	.L3507
+.L3469:
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR145]
+	strb	w0, [x19, #:lo12:.LANCHOR150]
 	adrp	x0, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	mov	x19, x0
 	ldr	x2, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L3286
-	adrp	x1, .LANCHOR216
+	cbz	w1, .L3470
+	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
-	mov	w2, 2239
-	add	x1, x1, :lo12:.LANCHOR216
+	mov	w2, 2328
+	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3286:
-	ldrh	w0, [x20, #:lo12:.LANCHOR62]
-	add	x21, x20, :lo12:.LANCHOR62
+.L3470:
+	ldrh	w0, [x20, #:lo12:.LANCHOR63]
+	add	x21, x20, :lo12:.LANCHOR63
 	bl	ftl_free_sblk
 	ldr	x0, [x19, #:lo12:.LANCHOR9]
-	ldrh	w1, [x20, #:lo12:.LANCHOR62]
+	ldrh	w1, [x20, #:lo12:.LANCHOR63]
 	strh	wzr, [x0, x1, lsl 1]
 	ldrh	w0, [x21, 30]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w0, 8
-	bhi	.L3287
+	bhi	.L3471
 	strh	w0, [x21, 30]
-	b	.L3283
-.L3287:
+	b	.L3467
+.L3471:
 	strh	wzr, [x21, 30]
 	bl	ftl_flush
 	bl	pm_flush
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L3283
-.L3222:
-	adrp	x20, .LANCHOR62
-	adrp	x23, .LANCHOR80
-	add	x22, x20, :lo12:.LANCHOR62
-	add	x23, x23, :lo12:.LANCHOR80
-.L3358:
+	b	.L3467
+.L3405:
+	adrp	x20, .LANCHOR63
+	adrp	x23, .LANCHOR83
+	add	x22, x20, :lo12:.LANCHOR63
+	add	x23, x23, :lo12:.LANCHOR83
+.L3544:
 	bl	gc_scan_src_blk_one_page
 	ldrh	w1, [x22, 2]
 	ldrh	w0, [x23]
 	cmp	w1, w0
-	bcs	.L3289
+	bcs	.L3473
 	cmp	w21, 7
-	bls	.L3358
-	b	.L3323
-.L3289:
+	bls	.L3544
+	b	.L3507
+.L3473:
 	ldrh	w3, [x22, 24]
 	adrp	x0, .LANCHOR14
-	cbz	w3, .L3290
+	cbz	w3, .L3474
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	mov	w1, 4
 	strh	wzr, [x22, 26]
-	strb	w1, [x19, #:lo12:.LANCHOR145]
+	strb	w1, [x19, #:lo12:.LANCHOR150]
 	adrp	x19, .LANCHOR9
-	tbz	x0, 8, .L3291
+	tbz	x0, 8, .L3475
 	ldrh	w1, [x22]
 	ldr	x2, [x19, #:lo12:.LANCHOR9]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC219
-	add	x0, x0, :lo12:.LC219
+	adrp	x0, .LC230
+	add	x0, x0, :lo12:.LC230
 	bl	printf
-.L3291:
-	ldrh	w2, [x20, #:lo12:.LANCHOR62]
-	add	x0, x20, :lo12:.LANCHOR62
+.L3475:
+	ldrh	w2, [x20, #:lo12:.LANCHOR63]
+	add	x0, x20, :lo12:.LANCHOR63
 	ldr	x1, [x19, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, 24]
 	ldrh	w1, [x1, x2, lsl 1]
 	cmp	w1, w0
-	beq	.L3292
-	adrp	x1, .LANCHOR216
+	beq	.L3476
+	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
-	mov	w2, 2273
-	add	x1, x1, :lo12:.LANCHOR216
+	mov	w2, 2362
+	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3292:
-	add	x0, x20, :lo12:.LANCHOR62
-	ldrh	w1, [x20, #:lo12:.LANCHOR62]
+.L3476:
+	add	x0, x20, :lo12:.LANCHOR63
+	ldrh	w1, [x20, #:lo12:.LANCHOR63]
 	ldrh	w2, [x0, 24]
 	ldr	x0, [x19, #:lo12:.LANCHOR9]
 	strh	w2, [x0, x1, lsl 1]
-	b	.L3323
-.L3290:
+	b	.L3507
+.L3474:
 	adrp	x2, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	ldrh	w1, [x22]
 	ldr	x21, [x2, #:lo12:.LANCHOR7]
 	mov	w2, 1
-	strb	w2, [x19, #:lo12:.LANCHOR145]
+	strb	w2, [x19, #:lo12:.LANCHOR150]
 	add	x21, x21, x1, uxth 2
-	tbz	x0, 8, .L3293
+	tbz	x0, 8, .L3477
 	ldrb	w2, [x21, 2]
-	adrp	x0, .LC220
-	add	x0, x0, :lo12:.LC220
+	adrp	x0, .LC231
+	add	x0, x0, :lo12:.LC231
 	ubfx	x2, x2, 5, 3
 	bl	printf
-.L3293:
+.L3477:
 	ldrb	w0, [x21, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L3294
+	beq	.L3478
 	tst	w0, 192
-	bne	.L3295
-.L3294:
-	adrp	x1, .LANCHOR216
+	bne	.L3479
+.L3478:
+	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
-	mov	w2, 2283
-	add	x1, x1, :lo12:.LANCHOR216
+	mov	w2, 2372
+	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3295:
-	ldrh	w0, [x20, #:lo12:.LANCHOR62]
-	add	x19, x20, :lo12:.LANCHOR62
+.L3479:
+	ldrh	w0, [x20, #:lo12:.LANCHOR63]
+	add	x19, x20, :lo12:.LANCHOR63
 	bl	ftl_free_sblk
 	mov	w0, -1
-	strh	w0, [x20, #:lo12:.LANCHOR62]
+	strh	w0, [x20, #:lo12:.LANCHOR63]
 	ldrh	w0, [x19, 30]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w0, 8
-	bhi	.L3296
+	bhi	.L3480
 	strh	w0, [x19, 30]
-	b	.L3323
-.L3296:
+	b	.L3507
+.L3480:
 	strh	wzr, [x19, 30]
-.L3387:
+.L3574:
 	bl	flt_sys_flush
-	b	.L3323
-.L3223:
-	ldrh	w1, [x24, 80]
+	b	.L3507
+.L3406:
+	ldrh	w1, [x20, 80]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L3297
-	adrp	x0, .LANCHOR71
-	ldrb	w22, [x0, #:lo12:.LANCHOR71]
+	bne	.L3481
+	adrp	x0, .LANCHOR74
+	ldrb	w22, [x0, #:lo12:.LANCHOR74]
 	cmp	w22, 1
-	bne	.L3297
+	bne	.L3481
 	bl	ftl_flush
-	adrp	x0, .LANCHOR62
-	add	x1, x0, :lo12:.LANCHOR62
-	mov	x20, x0
+	adrp	x0, .LANCHOR63
+	add	x1, x0, :lo12:.LANCHOR63
+	mov	x21, x0
 	ldrh	w1, [x1, 318]
-	cbz	w1, .L3298
+	cbz	w1, .L3482
 	mov	w0, w22
 	mov	w1, 5
-.L3384:
+.L3571:
 	bl	zftl_gc_get_free_sblk
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L3300
+	beq	.L3484
 	adrp	x0, .LANCHOR7
-	ldr	x21, [x0, #:lo12:.LANCHOR7]
-	add	x21, x21, x19, uxth 2
-	ldrb	w0, [x21, 2]
+	ldr	x22, [x0, #:lo12:.LANCHOR7]
+	add	x22, x22, x19, uxth 2
+	ldrb	w0, [x22, 2]
 	tst	w0, 224
-	beq	.L3301
-	adrp	x1, .LANCHOR216
+	beq	.L3485
+	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
-	mov	w2, 2312
-	add	x1, x1, :lo12:.LANCHOR216
+	mov	w2, 2401
+	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3301:
-	ldrb	w0, [x21, 2]
+.L3485:
+	ldrb	w0, [x22, 2]
 	mov	w1, 5
 	bfi	w0, w1, 5, 3
 	orr	w0, w0, 16
-	strb	w0, [x21, 2]
-.L3322:
+	strb	w0, [x22, 2]
+.L3506:
 	mov	w1, 1
 	mov	w0, w19
 	bl	ftl_erase_sblk
-	adrp	x22, .LANCHOR72
+	adrp	x22, .LANCHOR75
 	mov	w0, 5
-	strb	w0, [x24, 84]
-	add	x1, x24, 96
+	strb	w0, [x20, 84]
+	add	x1, x20, 96
 	mov	w0, w19
 	bl	ftl_get_blk_list_in_sblk
 	and	w0, w0, 255
-	adrp	x1, .LANCHOR80
-	adrp	x21, .LANCHOR73
-	strb	w0, [x24, 89]
-	ldrh	w1, [x1, #:lo12:.LANCHOR80]
-	ldrh	w2, [x22, #:lo12:.LANCHOR72]
-	strh	w19, [x24, 80]
-	strh	wzr, [x24, 82]
+	adrp	x1, .LANCHOR83
+	strb	w0, [x20, 89]
+	strh	w19, [x20, 80]
+	ldrh	w1, [x1, #:lo12:.LANCHOR83]
+	strh	wzr, [x20, 82]
+	strb	wzr, [x20, 85]
+	strh	wzr, [x20, 90]
 	mul	w0, w0, w1
-	strb	wzr, [x24, 85]
-	strh	w0, [x24, 86]
+	ldrh	w2, [x22, #:lo12:.LANCHOR75]
+	strh	w0, [x20, 86]
+	adrp	x20, .LANCHOR76
 	mov	w1, 255
-	ldrb	w0, [x21, #:lo12:.LANCHOR73]
-	strh	wzr, [x24, 90]
+	ldrb	w0, [x20, #:lo12:.LANCHOR76]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR147
-	ldr	x0, [x0, #:lo12:.LANCHOR147]
+	adrp	x0, .LANCHOR152
+	ldr	x0, [x0, #:lo12:.LANCHOR152]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	ldrb	w0, [x21, #:lo12:.LANCHOR73]
+	ldrb	w0, [x20, #:lo12:.LANCHOR76]
 	mov	w1, 255
-	ldrh	w2, [x22, #:lo12:.LANCHOR72]
+	ldrh	w2, [x22, #:lo12:.LANCHOR75]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR148
-	ldr	x0, [x0, #:lo12:.LANCHOR148]
+	adrp	x0, .LANCHOR153
+	ldr	x0, [x0, #:lo12:.LANCHOR153]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	ldrb	w0, [x21, #:lo12:.LANCHOR73]
+	ldrb	w0, [x20, #:lo12:.LANCHOR76]
 	mov	w1, 255
-	ldrh	w2, [x22, #:lo12:.LANCHOR72]
+	ldrh	w2, [x22, #:lo12:.LANCHOR75]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR69
-	ldr	x0, [x0, #:lo12:.LANCHOR69]
+	adrp	x0, .LANCHOR72
+	ldr	x0, [x0, #:lo12:.LANCHOR72]
 	bl	ftl_memset
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	mov	w1, -1
@@ -20944,11 +22164,11 @@ zftl_do_gc:
 	strh	w1, [x0, 130]
 	bl	pm_flush
 	bl	ftl_ext_info_flush
-	adrp	x0, .LANCHOR97
+	adrp	x0, .LANCHOR100
 	mov	w1, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR97]
+	ldr	x0, [x0, #:lo12:.LANCHOR100]
 	strh	w19, [x0, 126]
-	add	x0, x20, :lo12:.LANCHOR62
+	add	x0, x21, :lo12:.LANCHOR63
 	str	w1, [x0, 324]
 	strh	wzr, [x0, 314]
 	strh	wzr, [x0, 56]
@@ -20956,217 +22176,217 @@ zftl_do_gc:
 	strh	wzr, [x0, 320]
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L3323
-.L3298:
+	b	.L3507
+.L3482:
 	mov	w1, 5
 	mov	w0, 0
-	b	.L3384
-.L3297:
-	cmp	w26, 1
+	b	.L3571
+.L3481:
+	cmp	w25, 1
 	mov	w22, 4
 	csinc	w22, w22, wzr, eq
 	cmp	w21, 15
 	mov	w0, w22
 	add	w22, w22, 4
-	adrp	x25, .LANCHOR71
-	adrp	x21, .LANCHOR62
+	adrp	x25, .LANCHOR74
+	adrp	x24, .LANCHOR63
 	csel	w22, w22, w0, ls
-	add	x25, x25, :lo12:.LANCHOR71
-	add	x20, x21, :lo12:.LANCHOR62
-	add	x26, x24, 80
-.L3304:
+	add	x25, x25, :lo12:.LANCHOR74
+	add	x21, x24, :lo12:.LANCHOR63
+	add	x26, x20, 80
+.L3488:
 	sub	w22, w22, #1
 	and	w22, w22, 255
 	cmp	w22, 255
-	beq	.L3323
+	beq	.L3507
 	bl	gc_do_copy_back
 	ldrb	w0, [x25]
-	cbnz	w0, .L3305
-	adrp	x0, .LANCHOR51
-	ldrb	w0, [x0, #:lo12:.LANCHOR51]
+	cbnz	w0, .L3489
+	adrp	x0, .LANCHOR52
+	ldrb	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, 3
-	bhi	.L3306
+	bhi	.L3490
 	bl	ftl_write_commit
-.L3306:
-	ldrh	w1, [x20, 26]
-	ldrh	w0, [x20, 24]
+.L3490:
+	ldrh	w1, [x21, 26]
+	ldrh	w0, [x21, 24]
 	cmp	w1, w0
-	bcc	.L3304
+	bcc	.L3488
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR145]
+	strb	w0, [x19, #:lo12:.LANCHOR150]
 	bl	ftl_write_commit
 	bl	ftl_flush
 	adrp	x0, .LANCHOR9
-	ldrh	w2, [x20]
+	ldrh	w2, [x21]
 	mov	x19, x0
 	ldr	x1, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x1, x2, lsl 1]
-	cbz	w1, .L3308
-	adrp	x1, .LANCHOR216
+	cbz	w1, .L3492
+	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
-	mov	w2, 2387
-	add	x1, x1, :lo12:.LANCHOR216
+	mov	w2, 2476
+	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3308:
-	ldrh	w0, [x21, #:lo12:.LANCHOR62]
+.L3492:
+	ldrh	w0, [x24, #:lo12:.LANCHOR63]
 	ldr	x2, [x19, #:lo12:.LANCHOR9]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L3309
+	cbnz	w1, .L3493
 	bl	ftl_free_sblk
-	b	.L3283
-.L3309:
+	b	.L3467
+.L3493:
 	mov	w2, 1
 	mov	w1, 0
 	bl	gc_add_sblk
-	b	.L3283
-.L3305:
-	ldrh	w0, [x20, 320]
-	cbz	w0, .L3310
-	strh	wzr, [x20, 320]
+	b	.L3467
+.L3489:
+	ldrh	w0, [x21, 320]
+	cbz	w0, .L3494
+	strh	wzr, [x21, 320]
 	bl	sblk_wait_write_queue_completed
 	bl	gc_write_completed
-	ldr	w0, [x20, 324]
+	ldr	w0, [x21, 324]
 	cmn	w0, #1
-	beq	.L3311
+	beq	.L3495
 	bl	ftl_mask_bad_block
-.L3311:
+.L3495:
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
-	add	x20, x21, :lo12:.LANCHOR62
+	add	x20, x24, :lo12:.LANCHOR63
 	strh	wzr, [x20, 56]
 	ldrh	w0, [x0, 80]
 	str	wzr, [x20, 324]
 	bl	ftl_free_sblk
-	adrp	x2, .LANCHOR97
+	adrp	x2, .LANCHOR100
 	ldr	x1, [x23, #:lo12:.LANCHOR10]
 	mov	w0, -1
-	ldr	x2, [x2, #:lo12:.LANCHOR97]
+	ldr	x2, [x2, #:lo12:.LANCHOR100]
 	strh	w0, [x1, 80]
 	strh	w0, [x2, 126]
 	strh	w0, [x1, 130]
 	ldr	x0, [x20, 8]
-	cbz	x0, .L3312
+	cbz	x0, .L3496
 	bl	buf_free
-.L3312:
-	add	x21, x21, :lo12:.LANCHOR62
-	str	xzr, [x21, 8]
+.L3496:
+	add	x24, x24, :lo12:.LANCHOR63
+	str	xzr, [x24, 8]
 	bl	flt_sys_flush
-	mov	w2, 2425
-	strb	wzr, [x19, #:lo12:.LANCHOR145]
-	adrp	x1, .LANCHOR216
+	mov	w2, 2514
+	strb	wzr, [x19, #:lo12:.LANCHOR150]
+	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR216
+	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3323
-.L3310:
+	b	.L3507
+.L3494:
 	ldrh	w0, [x26, 6]
-	ldrh	w1, [x20, 26]
+	ldrh	w1, [x21, 26]
 	cmp	w0, 1
-	ldrh	w0, [x20, 24]
-	bls	.L3313
+	ldrh	w0, [x21, 24]
+	bls	.L3497
 	cmp	w1, w0
-	bcc	.L3304
+	bcc	.L3488
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR145]
-	ldrh	w0, [x20, 56]
+	strb	w0, [x19, #:lo12:.LANCHOR150]
+	ldrh	w0, [x21, 56]
 	add	w1, w0, 1
-	strh	w1, [x20, 56]
-	add	x0, x20, x0, sxtw 1
-	ldrh	w1, [x20]
+	strh	w1, [x21, 56]
+	add	x0, x21, x0, sxtw 1
+	ldrh	w1, [x21]
 	strh	w1, [x0, 58]
 	mov	w0, -1
-	strh	w0, [x20]
-	b	.L3323
-.L3313:
+	strh	w0, [x21]
+	b	.L3507
+.L3497:
 	mov	w2, 5
-	strb	w2, [x19, #:lo12:.LANCHOR145]
+	strb	w2, [x19, #:lo12:.LANCHOR150]
 	cmp	w1, w0
-	bcc	.L3314
-	ldrh	w0, [x20, 56]
+	bcc	.L3498
+	ldrh	w0, [x21, 56]
 	add	w1, w0, 1
-	strh	w1, [x20, 56]
-	add	x0, x20, x0, sxtw 1
-	ldrh	w1, [x20]
+	strh	w1, [x21, 56]
+	add	x0, x21, x0, sxtw 1
+	ldrh	w1, [x21]
 	strh	w1, [x0, 58]
 	mov	w0, -1
-	strh	w0, [x20]
-.L3314:
+	strh	w0, [x21]
+.L3498:
 	bl	ftl_flush
 	bl	sblk_wait_write_queue_completed
 	bl	gc_write_completed
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
-	ldrh	w1, [x24, 80]
+	ldrh	w1, [x20, 80]
 	strh	w1, [x0, 128]
 	bl	pm_flush
 	bl	ftl_ext_info_flush
-	add	x0, x21, :lo12:.LANCHOR62
-	adrp	x1, .LANCHOR80
-	adrp	x2, .LANCHOR68
-	ldrh	w1, [x1, #:lo12:.LANCHOR80]
-	ldrb	w2, [x2, #:lo12:.LANCHOR68]
+	add	x0, x24, :lo12:.LANCHOR63
+	adrp	x1, .LANCHOR83
+	adrp	x2, .LANCHOR69
+	ldrh	w1, [x1, #:lo12:.LANCHOR83]
+	ldrb	w2, [x2, #:lo12:.LANCHOR69]
 	strh	wzr, [x0, 16]
 	strh	w1, [x0, 18]
 	cmp	w2, 2
 	strh	w2, [x0, 20]
-	bne	.L3316
+	bne	.L3500
 	ubfiz	w1, w1, 1, 15
 	strh	w1, [x0, 18]
-	adrp	x1, .LANCHOR104
-	ldrb	w1, [x1, #:lo12:.LANCHOR104]
-	cbnz	w1, .L3316
+	adrp	x1, .LANCHOR70
+	ldrb	w1, [x1, #:lo12:.LANCHOR70]
+	cbnz	w1, .L3500
 	mov	w1, 1
 	strh	w1, [x0, 20]
-.L3316:
-	add	x21, x21, :lo12:.LANCHOR62
-	strh	wzr, [x21, 22]
-	b	.L3323
-.L3319:
+.L3500:
+	add	x24, x24, :lo12:.LANCHOR63
+	strh	wzr, [x24, 22]
+	b	.L3507
+.L3503:
 	ldrh	w1, [x24, 16]
 	ldrh	w0, [x24, 18]
 	cmp	w1, w0
-	bcc	.L3320
+	bcc	.L3504
 	mov	w0, 6
-	strb	w0, [x19, #:lo12:.LANCHOR145]
+	strb	w0, [x19, #:lo12:.LANCHOR150]
 	ldr	x0, [x24, 8]
 	bl	buf_free
 	str	xzr, [x24, 8]
-	b	.L3323
-.L3320:
+	b	.L3507
+.L3504:
 	cmp	w21, 15
-	bls	.L3226
-	cmp	w26, 1
-	bne	.L3323
+	bls	.L3409
+	cmp	w25, 1
+	bne	.L3507
 	add	w22, w22, 1
 	and	w22, w22, 255
 	cmp	w22, 4
-	bls	.L3226
-	b	.L3323
-.L3225:
+	bls	.L3409
+	b	.L3507
+.L3408:
 	bl	gc_update_l2p_map_new
-	mov	w20, -1
+	mov	w21, -1
 	bl	gc_free_src_blk
 	bl	ftl_flush
 	bl	pm_flush
-	strh	w20, [x24, 80]
+	strh	w21, [x20, 80]
 	bl	ftl_ext_info_flush
-	adrp	x0, .LANCHOR97
-	ldr	x0, [x0, #:lo12:.LANCHOR97]
-	strh	w20, [x0, 126]
+	adrp	x0, .LANCHOR100
+	ldr	x0, [x0, #:lo12:.LANCHOR100]
+	strh	w21, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L3388:
-	strb	wzr, [x19, #:lo12:.LANCHOR145]
-	b	.L3323
-.L3300:
-	mov	w2, 2318
-	adrp	x1, .LANCHOR216
+.L3575:
+	strb	wzr, [x19, #:lo12:.LANCHOR150]
+	b	.L3507
+.L3484:
+	mov	w2, 2407
+	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR216
+	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3322
+	b	.L3506
 	.size	zftl_do_gc, .-zftl_do_gc
 	.section	.text.zftl_write,"ax",@progbits
 	.align	2
@@ -21184,31 +22404,32 @@ zftl_write:
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	mov	w20, w2
 	stp	x21, x22, [sp, 32]
-	mov	x24, x3
+	mov	x23, x3
 	stp	x25, x26, [sp, 64]
-	tbz	x0, 12, .L3391
+	tbz	x0, 12, .L3578
+	ldr	w4, [x23]
 	mov	w3, w2
-	adrp	x0, .LC221
+	adrp	x0, .LC232
 	mov	w2, w1
-	add	x0, x0, :lo12:.LC221
+	add	x0, x0, :lo12:.LC232
 	mov	w1, w27
 	bl	printf
-.L3391:
-	cbnz	w27, .L3392
-	adrp	x0, .LANCHOR58
+.L3578:
+	cbnz	w27, .L3579
+	adrp	x0, .LANCHOR59
 	mov	w27, 24576
-	ldr	w0, [x0, #:lo12:.LANCHOR58]
-.L3393:
+	ldr	w0, [x0, #:lo12:.LANCHOR59]
+.L3580:
 	add	w1, w19, w20
 	cmp	w0, w1
-	bcc	.L3407
-	adrp	x23, .LANCHOR121
+	bcc	.L3594
+	adrp	x24, .LANCHOR123
 	add	w27, w27, w19
 	sub	w19, w20, #1
-	adrp	x25, .LANCHOR97
-	ldrb	w0, [x23, #:lo12:.LANCHOR121]
+	adrp	x25, .LANCHOR100
+	ldrb	w0, [x24, #:lo12:.LANCHOR123]
 	add	w19, w19, w27
-	add	x23, x23, :lo12:.LANCHOR121
+	add	x24, x24, :lo12:.LANCHOR123
 	udiv	w22, w27, w0
 	udiv	w19, w19, w0
 	add	w0, w27, w20
@@ -21216,25 +22437,25 @@ zftl_write:
 	mov	w26, w22
 	sub	w21, w19, w22
 	add	w21, w21, 1
-.L3395:
-	cbnz	w21, .L3403
-	adrp	x20, .LANCHOR90
-	adrp	x19, .LANCHOR94
-	add	x20, x20, :lo12:.LANCHOR90
-	add	x19, x19, :lo12:.LANCHOR94
+.L3582:
+	cbnz	w21, .L3590
+	adrp	x20, .LANCHOR93
+	adrp	x19, .LANCHOR97
+	add	x20, x20, :lo12:.LANCHOR93
+	add	x19, x19, :lo12:.LANCHOR97
 	bl	ftl_write_commit
 	bl	ftl_flush
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
-.L3404:
+.L3591:
 	ldrh	w0, [x20]
 	ldrh	w1, [x19]
 	add	w0, w0, w1
 	cmp	w0, 7
-	ble	.L3405
+	ble	.L3592
 	mov	w0, 0
-.L3390:
+.L3577:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -21242,28 +22463,28 @@ zftl_write:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L3392:
+.L3579:
 	cmp	w27, 3
-	bhi	.L3407
+	bhi	.L3594
 	lsl	w27, w27, 13
 	mov	w0, 8192
-	b	.L3393
-.L3403:
+	b	.L3580
+.L3590:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbnz	x0, .L3396
+	cbnz	x0, .L3583
 	bl	ftl_write_commit
-	b	.L3395
-.L3396:
-	ldrb	w3, [x23]
+	b	.L3582
+.L3583:
+	ldrb	w3, [x24]
 	cmp	w26, w22
 	strb	wzr, [x0, 57]
 	ccmp	w26, w19, 4, ne
 	strb	w3, [x0, 56]
-	bne	.L3399
+	bne	.L3586
 	cmp	w26, w22
-	bne	.L3400
+	bne	.L3587
 	udiv	w0, w27, w3
 	msub	w0, w0, w3, w27
 	and	w0, w0, 255
@@ -21272,11 +22493,11 @@ zftl_write:
 	and	w3, w3, 255
 	cmp	w20, w3
 	csel	w3, w20, w3, cc
-.L3412:
+.L3599:
 	strb	w3, [x28, 56]
-.L3399:
+.L3586:
 	ldr	x3, [x28, 8]
-	mov	x1, x24
+	mov	x1, x23
 	ldrb	w0, [x28, 57]
 	sub	w21, w21, #1
 	ldrb	w2, [x28, 56]
@@ -21284,7 +22505,7 @@ zftl_write:
 	lsl	w2, w2, 9
 	add	x0, x3, x0
 	bl	ftl_memcpy
-	ldr	x1, [x25, #:lo12:.LANCHOR97]
+	ldr	x1, [x25, #:lo12:.LANCHOR100]
 	ldr	w0, [x1, 8]
 	str	w26, [x28, 36]
 	add	w26, w26, 1
@@ -21295,20 +22516,20 @@ zftl_write:
 	bl	ftl_write_buf
 	ldrb	w0, [x28, 56]
 	ubfiz	x0, x0, 9, 8
-	add	x24, x24, x0
-	b	.L3395
-.L3400:
+	add	x23, x23, x0
+	b	.L3582
+.L3587:
 	ldr	w0, [x29, 108]
 	msub	w3, w3, w26, w0
-	b	.L3412
-.L3405:
+	b	.L3599
+.L3592:
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
-	b	.L3404
-.L3407:
+	b	.L3591
+.L3594:
 	mov	w0, -1
-	b	.L3390
+	b	.L3577
 	.size	zftl_write, .-zftl_write
 	.section	.text.ftl_vendor_write,"ax",@progbits
 	.align	2
@@ -21367,12 +22588,12 @@ ftl_write:
 	mov	x20, x3
 	mov	w22, w1
 	ands	w21, w0, 255
-	bne	.L3418
+	bne	.L3605
 	mov	w3, w2
 	mov	w0, 0
 	mov	x2, x20
 	bl	idb_write_data
-.L3418:
+.L3605:
 	mov	x3, x20
 	mov	w2, w19
 	mov	w1, w22
@@ -21388,46 +22609,46 @@ ftl_write:
 	.type	zftl_discard, %function
 zftl_discard:
 	stp	x29, x30, [sp, -128]!
-	adrp	x2, .LANCHOR58
+	adrp	x2, .LANCHOR59
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w19, w1
-	ldr	w2, [x2, #:lo12:.LANCHOR58]
+	ldr	w2, [x2, #:lo12:.LANCHOR59]
 	add	w1, w0, w1
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	cmp	w2, w1
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	bcc	.L3441
-	adrp	x24, .LANCHOR217
+	bcc	.L3628
+	adrp	x24, .LANCHOR221
 	add	w22, w0, 24576
 	adrp	x0, .LANCHOR14
 	str	x0, [x29, 104]
-	ldr	w1, [x24, #:lo12:.LANCHOR217]
+	ldr	w1, [x24, #:lo12:.LANCHOR221]
 	ldr	w2, [x0, #:lo12:.LANCHOR14]
 	add	w1, w19, w1
-	str	w1, [x24, #:lo12:.LANCHOR217]
-	tbz	x2, 12, .L3422
-	adrp	x0, .LC222
+	str	w1, [x24, #:lo12:.LANCHOR221]
+	tbz	x2, 12, .L3609
+	adrp	x0, .LC233
 	mov	w4, 0
 	mov	w3, w19
 	mov	w2, w22
-	add	x0, x0, :lo12:.LC222
+	add	x0, x0, :lo12:.LC233
 	bl	printf
-.L3422:
-	adrp	x23, .LANCHOR97
-	adrp	x26, .LANCHOR121
-	ldr	x0, [x23, #:lo12:.LANCHOR97]
+.L3609:
+	adrp	x23, .LANCHOR100
+	adrp	x26, .LANCHOR123
+	ldr	x0, [x23, #:lo12:.LANCHOR100]
 	ldr	w27, [x0, 8]
 	add	w1, w27, 1
 	str	w1, [x0, 8]
 	bl	ftl_write_commit
 	bl	ftl_flush
-	ldrb	w21, [x26, #:lo12:.LANCHOR121]
+	ldrb	w21, [x26, #:lo12:.LANCHOR123]
 	udiv	w20, w22, w21
 	msub	w25, w20, w21, w22
-	cbz	w25, .L3423
+	cbz	w25, .L3610
 	sub	w21, w21, w25
 	mov	w0, w20
 	cmp	w21, w19
@@ -21435,20 +22656,20 @@ zftl_discard:
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	bne	.L3424
+	bne	.L3611
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
-.L3424:
+.L3611:
 	ldr	w0, [x29, 120]
 	and	w28, w21, 65535
 	cmn	w0, #1
-	beq	.L3426
+	beq	.L3613
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x3, x0
-	cbz	x0, .L3426
+	cbz	x0, .L3613
 	strb	w25, [x0, 57]
 	ubfiz	x25, x25, 9, 25
 	strb	w21, [x0, 56]
@@ -21463,57 +22684,57 @@ zftl_discard:
 	mov	x0, x3
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-	ldr	x1, [x23, #:lo12:.LANCHOR97]
+	ldr	x1, [x23, #:lo12:.LANCHOR100]
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3426:
+.L3613:
 	add	w20, w20, 1
 	sub	w19, w19, w28
-.L3423:
-	cbz	w19, .L3428
+.L3610:
+	cbz	w19, .L3615
 	bl	ftl_flush
-.L3428:
-	adrp	x25, .LANCHOR99
-	add	x21, x26, :lo12:.LANCHOR121
-	add	x25, x25, :lo12:.LANCHOR99
+.L3615:
+	adrp	x25, .LANCHOR102
+	add	x21, x26, :lo12:.LANCHOR123
+	add	x25, x25, :lo12:.LANCHOR102
 	mov	w0, -1
 	str	w0, [x29, 124]
-.L3429:
+.L3616:
 	ldrb	w0, [x21]
 	cmp	w19, w0
-	bcs	.L3434
-	cbz	w19, .L3436
+	bcs	.L3621
+	cbz	w19, .L3623
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	bne	.L3437
+	bne	.L3624
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
-.L3437:
+.L3624:
 	ldr	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3436
+	beq	.L3623
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x21, x0
-	cbz	x0, .L3436
+	cbz	x0, .L3623
 	strb	wzr, [x0, 57]
 	strb	w19, [x0, 56]
 	stp	w27, w20, [x21, 32]
-	ldrb	w0, [x26, #:lo12:.LANCHOR121]
+	ldrb	w0, [x26, #:lo12:.LANCHOR123]
 	cmp	w19, w0
-	bcc	.L3439
-	adrp	x1, .LANCHOR218
+	bcc	.L3626
+	adrp	x1, .LANCHOR222
 	adrp	x0, .LC0
-	mov	w2, 1236
-	add	x1, x1, :lo12:.LANCHOR218
+	mov	w2, 1241
+	add	x1, x1, :lo12:.LANCHOR222
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3439:
+.L3626:
 	ldr	x0, [x21, 8]
 	lsl	w2, w19, 9
 	mov	w1, 0
@@ -21521,42 +22742,42 @@ zftl_discard:
 	mov	x0, x21
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-	ldr	x1, [x23, #:lo12:.LANCHOR97]
+	ldr	x1, [x23, #:lo12:.LANCHOR100]
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3436:
-	ldr	w1, [x24, #:lo12:.LANCHOR217]
+.L3623:
+	ldr	w1, [x24, #:lo12:.LANCHOR221]
 	cmp	w1, 8192
-	bls	.L3442
+	bls	.L3629
 	ldr	x0, [x29, 104]
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3440
-	adrp	x0, .LC222
+	tbz	x0, 12, .L3627
+	adrp	x0, .LC233
 	mov	w4, 0
 	mov	w3, w19
 	mov	w2, w22
-	add	x0, x0, :lo12:.LC222
+	add	x0, x0, :lo12:.LC233
 	bl	printf
-.L3440:
-	str	wzr, [x24, #:lo12:.LANCHOR217]
+.L3627:
+	str	wzr, [x24, #:lo12:.LANCHOR221]
 	bl	flt_sys_flush
-	adrp	x0, .LANCHOR116
+	adrp	x0, .LANCHOR118
 	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR116]
-.L3442:
+	str	w1, [x0, #:lo12:.LANCHOR118]
+.L3629:
 	mov	w0, 0
-	b	.L3420
-.L3434:
+	b	.L3607
+.L3621:
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3430
+	beq	.L3617
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbz	x0, .L3432
+	cbz	x0, .L3619
 	ldrb	w2, [x21]
 	mov	w1, 0
 	strb	w2, [x0, 56]
@@ -21568,24 +22789,24 @@ zftl_discard:
 	mov	x0, x28
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-.L3468:
-	ldr	x1, [x23, #:lo12:.LANCHOR97]
+.L3655:
+	ldr	x1, [x23, #:lo12:.LANCHOR100]
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3432:
+.L3619:
 	ldrb	w0, [x21]
 	add	w20, w20, 1
 	sub	w19, w19, w0
-	b	.L3429
-.L3430:
+	b	.L3616
+.L3617:
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
 	ldr	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3432
+	beq	.L3619
 	add	x1, x29, 124
 	mov	w2, 1
 	mov	w0, w20
@@ -21599,14 +22820,14 @@ zftl_discard:
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR98
-	ldrb	w1, [x1, #:lo12:.LANCHOR98]
+	adrp	x1, .LANCHOR101
+	ldrb	w1, [x1, #:lo12:.LANCHOR101]
 	udiv	w0, w0, w1
 	bl	ftl_vpn_decrement
-	b	.L3468
-.L3441:
+	b	.L3655
+.L3628:
 	mov	w0, -1
-.L3420:
+.L3607:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -21764,6 +22985,7 @@ ftl_discard:
 	.global	g_flash_interface_mode
 	.global	g_idb_ecc_bits
 	.global	g_idb_slc_mode_enable
+	.global	g_one_pass_program
 	.global	g_slc_mode_addr2
 	.global	g_slc_mode_enable
 	.global	g_flash_cur_mode
@@ -21794,21 +23016,21 @@ _c_ftl_blk_pre_plane:
 	.zero	2
 	.section	.bss._c_ftl_block_addr_log2,"aw",@nobits
 	.align	1
-	.set	.LANCHOR99,. + 0
+	.set	.LANCHOR102,. + 0
 	.type	_c_ftl_block_addr_log2, %object
 	.size	_c_ftl_block_addr_log2, 2
 _c_ftl_block_addr_log2:
 	.zero	2
 	.section	.bss._c_ftl_block_align_addr,"aw",@nobits
 	.align	1
-	.set	.LANCHOR105,. + 0
+	.set	.LANCHOR107,. + 0
 	.type	_c_ftl_block_align_addr, %object
 	.size	_c_ftl_block_align_addr, 2
 _c_ftl_block_align_addr:
 	.zero	2
 	.section	.bss._c_ftl_byte_pre_page,"aw",@nobits
 	.align	1
-	.set	.LANCHOR199,. + 0
+	.set	.LANCHOR203,. + 0
 	.type	_c_ftl_byte_pre_page, %object
 	.size	_c_ftl_byte_pre_page, 2
 _c_ftl_byte_pre_page:
@@ -21820,73 +23042,73 @@ _c_ftl_byte_pre_page:
 _c_ftl_nand_blks_per_die:
 	.zero	2
 	.section	.bss._c_ftl_nand_die_num,"aw",@nobits
-	.set	.LANCHOR106,. + 0
+	.set	.LANCHOR108,. + 0
 	.type	_c_ftl_nand_die_num, %object
 	.size	_c_ftl_nand_die_num, 1
 _c_ftl_nand_die_num:
 	.zero	1
 	.section	.bss._c_ftl_nand_planes_num,"aw",@nobits
-	.set	.LANCHOR73,. + 0
+	.set	.LANCHOR76,. + 0
 	.type	_c_ftl_nand_planes_num, %object
 	.size	_c_ftl_nand_planes_num, 1
 _c_ftl_nand_planes_num:
 	.zero	1
 	.section	.bss._c_ftl_nand_type,"aw",@nobits
-	.set	.LANCHOR68,. + 0
+	.set	.LANCHOR69,. + 0
 	.type	_c_ftl_nand_type, %object
 	.size	_c_ftl_nand_type, 1
 _c_ftl_nand_type:
 	.zero	1
 	.section	.bss._c_ftl_page_pre_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR72,. + 0
+	.set	.LANCHOR75,. + 0
 	.type	_c_ftl_page_pre_blk, %object
 	.size	_c_ftl_page_pre_blk, 2
 _c_ftl_page_pre_blk:
 	.zero	2
 	.section	.bss._c_ftl_page_pre_slc_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR80,. + 0
+	.set	.LANCHOR83,. + 0
 	.type	_c_ftl_page_pre_slc_blk, %object
 	.size	_c_ftl_page_pre_slc_blk, 2
 _c_ftl_page_pre_slc_blk:
 	.zero	2
 	.section	.bss._c_ftl_planes_per_die,"aw",@nobits
-	.set	.LANCHOR98,. + 0
+	.set	.LANCHOR101,. + 0
 	.type	_c_ftl_planes_per_die, %object
 	.size	_c_ftl_planes_per_die, 1
 _c_ftl_planes_per_die:
 	.zero	1
 	.section	.bss._c_ftl_pm_page_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR186,. + 0
+	.set	.LANCHOR187,. + 0
 	.type	_c_ftl_pm_page_num, %object
 	.size	_c_ftl_pm_page_num, 2
 _c_ftl_pm_page_num:
 	.zero	2
 	.section	.bss._c_ftl_sec_per_page,"aw",@nobits
-	.set	.LANCHOR121,. + 0
+	.set	.LANCHOR123,. + 0
 	.type	_c_ftl_sec_per_page, %object
 	.size	_c_ftl_sec_per_page, 1
 _c_ftl_sec_per_page:
 	.zero	1
 	.section	.bss._c_max_pm_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR141,. + 0
+	.set	.LANCHOR146,. + 0
 	.type	_c_max_pm_sblk, %object
 	.size	_c_max_pm_sblk, 2
 _c_max_pm_sblk:
 	.zero	2
 	.section	.bss._c_mix_max_slc_ec_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR102,. + 0
+	.set	.LANCHOR105,. + 0
 	.type	_c_mix_max_slc_ec_count, %object
 	.size	_c_mix_max_slc_ec_count, 2
 _c_mix_max_slc_ec_count:
 	.zero	2
 	.section	.bss._c_mix_max_xlc_ec_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR100,. + 0
+	.set	.LANCHOR103,. + 0
 	.type	_c_mix_max_xlc_ec_count, %object
 	.size	_c_mix_max_xlc_ec_count, 2
 _c_mix_max_xlc_ec_count:
@@ -21900,49 +23122,49 @@ _c_slc_to_xlc_ec_ratio:
 	.zero	2
 	.section	.bss._c_swl_slc_gc_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR140,. + 0
+	.set	.LANCHOR145,. + 0
 	.type	_c_swl_slc_gc_th, %object
 	.size	_c_swl_slc_gc_th, 2
 _c_swl_slc_gc_th:
 	.zero	2
 	.section	.bss._c_swl_xlc_gc_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR139,. + 0
+	.set	.LANCHOR144,. + 0
 	.type	_c_swl_xlc_gc_th, %object
 	.size	_c_swl_xlc_gc_th, 2
 _c_swl_xlc_gc_th:
 	.zero	2
 	.section	.bss._c_totle_data_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR204,. + 0
+	.set	.LANCHOR208,. + 0
 	.type	_c_totle_data_density, %object
 	.size	_c_totle_data_density, 4
 _c_totle_data_density:
 	.zero	4
 	.section	.bss._c_totle_log_page,"aw",@nobits
 	.align	2
-	.set	.LANCHOR118,. + 0
+	.set	.LANCHOR120,. + 0
 	.type	_c_totle_log_page, %object
 	.size	_c_totle_log_page, 4
 _c_totle_log_page:
 	.zero	4
 	.section	.bss._c_totle_phy_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR203,. + 0
+	.set	.LANCHOR207,. + 0
 	.type	_c_totle_phy_density, %object
 	.size	_c_totle_phy_density, 4
 _c_totle_phy_density:
 	.zero	4
 	.section	.bss._c_user_data_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR58,. + 0
+	.set	.LANCHOR59,. + 0
 	.type	_c_user_data_density, %object
 	.size	_c_user_data_density, 4
 _c_user_data_density:
 	.zero	4
 	.section	.bss._gc_after_discard_en,"aw",@nobits
 	.align	2
-	.set	.LANCHOR116,. + 0
+	.set	.LANCHOR118,. + 0
 	.type	_gc_after_discard_en, %object
 	.size	_gc_after_discard_en, 4
 _gc_after_discard_en:
@@ -21961,28 +23183,28 @@ _last_write_time:
 	.zero	4
 	.section	.bss._max_slc_super_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR101,. + 0
+	.set	.LANCHOR104,. + 0
 	.type	_max_slc_super_block, %object
 	.size	_max_slc_super_block, 2
 _max_slc_super_block:
 	.zero	2
 	.section	.bss._max_xlc_super_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR88,. + 0
+	.set	.LANCHOR91,. + 0
 	.type	_max_xlc_super_block, %object
 	.size	_max_xlc_super_block, 2
 _max_xlc_super_block:
 	.zero	2
 	.section	.bss._min_slc_super_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR84,. + 0
+	.set	.LANCHOR87,. + 0
 	.type	_min_slc_super_block, %object
 	.size	_min_slc_super_block, 2
 _min_slc_super_block:
 	.zero	2
 	.section	.bss.discard_sector_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR217,. + 0
+	.set	.LANCHOR221,. + 0
 	.type	discard_sector_count, %object
 	.size	discard_sector_count, 4
 discard_sector_count:
@@ -21996,41 +23218,41 @@ fill_spare_size:
 	.zero	2
 	.section	.bss.flash_ddr_tuning_sdr_read_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR155,. + 0
+	.set	.LANCHOR160,. + 0
 	.type	flash_ddr_tuning_sdr_read_count, %object
 	.size	flash_ddr_tuning_sdr_read_count, 4
 flash_ddr_tuning_sdr_read_count:
 	.zero	4
 	.section	.bss.flash_read_retry,"aw",@nobits
 	.align	3
-	.set	.LANCHOR157,. + 0
+	.set	.LANCHOR162,. + 0
 	.type	flash_read_retry, %object
 	.size	flash_read_retry, 8
 flash_read_retry:
 	.zero	8
 	.section	.bss.free_buf_count,"aw",@nobits
-	.set	.LANCHOR51,. + 0
+	.set	.LANCHOR52,. + 0
 	.type	free_buf_count, %object
 	.size	free_buf_count, 1
 free_buf_count:
 	.zero	1
 	.section	.bss.free_mix_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR94,. + 0
+	.set	.LANCHOR97,. + 0
 	.type	free_mix_sblk, %object
 	.size	free_mix_sblk, 2
 free_mix_sblk:
 	.zero	2
 	.section	.bss.free_slc_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR90,. + 0
+	.set	.LANCHOR93,. + 0
 	.type	free_slc_sblk, %object
 	.size	free_slc_sblk, 2
 free_slc_sblk:
 	.zero	2
 	.section	.bss.free_xlc_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR92,. + 0
+	.set	.LANCHOR95,. + 0
 	.type	free_xlc_sblk, %object
 	.size	free_xlc_sblk, 2
 free_xlc_sblk:
@@ -22042,14 +23264,14 @@ free_xlc_sblk:
 ftl_ext_info_data_buffer:
 	.zero	16384
 	.section	.bss.ftl_ext_info_first_write,"aw",@nobits
-	.set	.LANCHOR182,. + 0
+	.set	.LANCHOR183,. + 0
 	.type	ftl_ext_info_first_write, %object
 	.size	ftl_ext_info_first_write, 1
 ftl_ext_info_first_write:
 	.zero	1
 	.section	.bss.ftl_flush_jiffies,"aw",@nobits
 	.align	2
-	.set	.LANCHOR213,. + 0
+	.set	.LANCHOR217,. + 0
 	.type	ftl_flush_jiffies, %object
 	.size	ftl_flush_jiffies, 4
 ftl_flush_jiffies:
@@ -22062,41 +23284,41 @@ ftl_info_data_buffer:
 	.zero	16384
 	.section	.bss.ftl_info_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR177,. + 0
+	.set	.LANCHOR178,. + 0
 	.type	ftl_info_spare, %object
 	.size	ftl_info_spare, 256
 ftl_info_spare:
 	.zero	256
 	.section	.bss.ftl_low_format_cur_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR59,. + 0
+	.set	.LANCHOR60,. + 0
 	.type	ftl_low_format_cur_blk, %object
 	.size	ftl_low_format_cur_blk, 2
 ftl_low_format_cur_blk:
 	.zero	2
 	.section	.bss.ftl_power_lost_flag,"aw",@nobits
-	.set	.LANCHOR181,. + 0
+	.set	.LANCHOR182,. + 0
 	.type	ftl_power_lost_flag, %object
 	.size	ftl_power_lost_flag, 1
 ftl_power_lost_flag:
 	.zero	1
 	.section	.bss.ftl_sblk_lpa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR111,. + 0
+	.set	.LANCHOR113,. + 0
 	.type	ftl_sblk_lpa_tbl, %object
 	.size	ftl_sblk_lpa_tbl, 8
 ftl_sblk_lpa_tbl:
 	.zero	8
 	.section	.bss.ftl_sblk_update_list,"aw",@nobits
 	.align	3
-	.set	.LANCHOR64,. + 0
+	.set	.LANCHOR65,. + 0
 	.type	ftl_sblk_update_list, %object
 	.size	ftl_sblk_update_list, 16
 ftl_sblk_update_list:
 	.zero	16
 	.section	.bss.ftl_sblk_update_list_offset,"aw",@nobits
 	.align	1
-	.set	.LANCHOR117,. + 0
+	.set	.LANCHOR119,. + 0
 	.type	ftl_sblk_update_list_offset, %object
 	.size	ftl_sblk_update_list_offset, 2
 ftl_sblk_update_list_offset:
@@ -22110,13 +23332,13 @@ ftl_sblk_vpn:
 	.zero	8
 	.section	.bss.ftl_sblk_vpn_update_id,"aw",@nobits
 	.align	1
-	.set	.LANCHOR63,. + 0
+	.set	.LANCHOR64,. + 0
 	.type	ftl_sblk_vpn_update_id, %object
 	.size	ftl_sblk_vpn_update_id, 2
 ftl_sblk_vpn_update_id:
 	.zero	2
 	.section	.bss.ftl_sys_info_first_write,"aw",@nobits
-	.set	.LANCHOR180,. + 0
+	.set	.LANCHOR181,. + 0
 	.type	ftl_sys_info_first_write, %object
 	.size	ftl_sys_info_first_write, 1
 ftl_sys_info_first_write:
@@ -22129,14 +23351,14 @@ ftl_tmp_buffer:
 	.zero	16384
 	.section	.bss.ftl_tmp_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR175,. + 0
+	.set	.LANCHOR176,. + 0
 	.type	ftl_tmp_spare, %object
 	.size	ftl_tmp_spare, 256
 ftl_tmp_spare:
 	.zero	256
 	.section	.bss.ftl_vpn_update_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR115,. + 0
+	.set	.LANCHOR117,. + 0
 	.type	ftl_vpn_update_count, %object
 	.size	ftl_vpn_update_count, 2
 ftl_vpn_update_count:
@@ -22150,14 +23372,14 @@ g_block_align_addr:
 	.zero	2
 	.section	.bss.g_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR49,. + 0
+	.set	.LANCHOR50,. + 0
 	.type	g_buf, %object
 	.size	g_buf, 2048
 g_buf:
 	.zero	2048
 	.section	.bss.g_die_addr,"aw",@nobits
 	.align	2
-	.set	.LANCHOR136,. + 0
+	.set	.LANCHOR141,. + 0
 	.type	g_die_addr, %object
 	.size	g_die_addr, 32
 g_die_addr:
@@ -22170,27 +23392,27 @@ g_die_addr:
 g_die_cs_idx:
 	.zero	8
 	.section	.bss.g_flash_3d_mlc_flag,"aw",@nobits
-	.set	.LANCHOR104,. + 0
+	.set	.LANCHOR70,. + 0
 	.type	g_flash_3d_mlc_flag, %object
 	.size	g_flash_3d_mlc_flag, 1
 g_flash_3d_mlc_flag:
 	.zero	1
 	.section	.bss.g_flash_3d_tlc_flag,"aw",@nobits
-	.set	.LANCHOR70,. + 0
+	.set	.LANCHOR73,. + 0
 	.type	g_flash_3d_tlc_flag, %object
 	.size	g_flash_3d_tlc_flag, 1
 g_flash_3d_tlc_flag:
 	.zero	1
 	.section	.bss.g_flash_blk_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR160,. + 0
+	.set	.LANCHOR195,. + 0
 	.type	g_flash_blk_info, %object
 	.size	g_flash_blk_info, 4
 g_flash_blk_info:
 	.zero	4
 	.section	.bss.g_flash_cur_mode,"aw",@nobits
 	.align	3
-	.set	.LANCHOR35,. + 0
+	.set	.LANCHOR31,. + 0
 	.type	g_flash_cur_mode, %object
 	.size	g_flash_cur_mode, 4
 g_flash_cur_mode:
@@ -22208,20 +23430,20 @@ g_flash_interface_mode:
 g_flash_multi_page_prog_en:
 	.zero	1
 	.section	.bss.g_flash_multi_page_read_en,"aw",@nobits
-	.set	.LANCHOR166,. + 0
+	.set	.LANCHOR168,. + 0
 	.type	g_flash_multi_page_read_en, %object
 	.size	g_flash_multi_page_read_en, 1
 g_flash_multi_page_read_en:
 	.zero	1
 	.section	.bss.g_flash_page_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR162,. + 0
+	.set	.LANCHOR164,. + 0
 	.type	g_flash_page_buffer, %object
 	.size	g_flash_page_buffer, 8
 g_flash_page_buffer:
 	.zero	8
 	.section	.bss.g_flash_reversd_blks,"aw",@nobits
-	.set	.LANCHOR196,. + 0
+	.set	.LANCHOR200,. + 0
 	.type	g_flash_reversd_blks, %object
 	.size	g_flash_reversd_blks, 1
 g_flash_reversd_blks:
@@ -22234,28 +23456,28 @@ g_flash_slc_mode:
 	.zero	1
 	.section	.bss.g_flash_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR161,. + 0
+	.set	.LANCHOR163,. + 0
 	.type	g_flash_spare_buffer, %object
 	.size	g_flash_spare_buffer, 8
 g_flash_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_sys_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR159,. + 0
+	.set	.LANCHOR194,. + 0
 	.type	g_flash_sys_spare_buffer, %object
 	.size	g_flash_sys_spare_buffer, 8
 g_flash_sys_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_tmp_page_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR151,. + 0
+	.set	.LANCHOR156,. + 0
 	.type	g_flash_tmp_page_buffer, %object
 	.size	g_flash_tmp_page_buffer, 8
 g_flash_tmp_page_buffer:
 	.zero	8
 	.section	.bss.g_flash_tmp_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR153,. + 0
+	.set	.LANCHOR158,. + 0
 	.type	g_flash_tmp_spare_buffer, %object
 	.size	g_flash_tmp_spare_buffer, 8
 g_flash_tmp_spare_buffer:
@@ -22268,14 +23490,14 @@ g_flash_toggle_mode_en:
 	.zero	1
 	.section	.bss.g_ftl_info_blk,"aw",@nobits
 	.align	6
-	.set	.LANCHOR178,. + 0
+	.set	.LANCHOR179,. + 0
 	.type	g_ftl_info_blk, %object
 	.size	g_ftl_info_blk, 4
 g_ftl_info_blk:
 	.zero	4
 	.section	.bss.g_gc_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR62,. + 0
+	.set	.LANCHOR63,. + 0
 	.type	g_gc_info, %object
 	.size	g_gc_info, 328
 g_gc_info:
@@ -22287,7 +23509,7 @@ g_gc_info:
 g_idb_ecc_bits:
 	.zero	1
 	.section	.bss.g_idb_slc_mode_enable,"aw",@nobits
-	.set	.LANCHOR168,. + 0
+	.set	.LANCHOR49,. + 0
 	.type	g_idb_slc_mode_enable, %object
 	.size	g_idb_slc_mode_enable, 1
 g_idb_slc_mode_enable:
@@ -22306,14 +23528,14 @@ g_lsb_page_tbl:
 g_maxRegNum:
 	.zero	1
 	.section	.bss.g_maxRetryCount,"aw",@nobits
-	.set	.LANCHOR154,. + 0
+	.set	.LANCHOR159,. + 0
 	.type	g_maxRetryCount, %object
 	.size	g_maxRetryCount, 1
 g_maxRetryCount:
 	.zero	1
 	.section	.bss.g_msb_page_tbl,"aw",@nobits
 	.align	2
-	.set	.LANCHOR133,. + 0
+	.set	.LANCHOR138,. + 0
 	.type	g_msb_page_tbl, %object
 	.size	g_msb_page_tbl, 1024
 g_msb_page_tbl:
@@ -22338,7 +23560,7 @@ g_nand_opt_para:
 g_nandc_ecc_bits:
 	.zero	1
 	.section	.bss.g_nandc_tran_timeout,"aw",@nobits
-	.set	.LANCHOR152,. + 0
+	.set	.LANCHOR157,. + 0
 	.type	g_nandc_tran_timeout, %object
 	.size	g_nandc_tran_timeout, 1
 g_nandc_tran_timeout:
@@ -22355,10 +23577,16 @@ g_nandc_v6_master_info:
 	.type	g_nandc_ver, %object
 	.size	g_nandc_ver, 1
 g_nandc_ver:
+	.zero	1
+	.section	.bss.g_one_pass_program,"aw",@nobits
+	.set	.LANCHOR71,. + 0
+	.type	g_one_pass_program, %object
+	.size	g_one_pass_program, 1
+g_one_pass_program:
 	.zero	1
 	.section	.bss.g_pm_spare,"aw",@nobits
 	.align	3
-	.set	.LANCHOR190,. + 0
+	.set	.LANCHOR191,. + 0
 	.type	g_pm_spare, %object
 	.size	g_pm_spare, 8
 g_pm_spare:
@@ -22382,131 +23610,131 @@ g_slc_mode_enable:
 	.zero	1
 	.section	.bss.g_slc_page_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR135,. + 0
+	.set	.LANCHOR140,. + 0
 	.type	g_slc_page_num, %object
 	.size	g_slc_page_num, 2
 g_slc_page_num:
 	.zero	2
 	.section	.bss.g_totle_phy_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR137,. + 0
+	.set	.LANCHOR142,. + 0
 	.type	g_totle_phy_block, %object
 	.size	g_totle_phy_block, 2
 g_totle_phy_block:
 	.zero	2
 	.section	.bss.gc_des_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR149,. + 0
+	.set	.LANCHOR154,. + 0
 	.type	gc_des_ppa_tbl, %object
 	.size	gc_des_ppa_tbl, 8
 gc_des_ppa_tbl:
 	.zero	8
 	.section	.bss.gc_free_slc_sblk_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR74,. + 0
+	.set	.LANCHOR77,. + 0
 	.type	gc_free_slc_sblk_th, %object
 	.size	gc_free_slc_sblk_th, 2
 gc_free_slc_sblk_th:
 	.zero	2
 	.section	.bss.gc_lpa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR147,. + 0
+	.set	.LANCHOR152,. + 0
 	.type	gc_lpa_tbl, %object
 	.size	gc_lpa_tbl, 8
 gc_lpa_tbl:
 	.zero	8
 	.section	.bss.gc_mode,"aw",@nobits
-	.set	.LANCHOR71,. + 0
+	.set	.LANCHOR74,. + 0
 	.type	gc_mode, %object
 	.size	gc_mode, 1
 gc_mode:
 	.zero	1
 	.section	.bss.gc_page_buf_id,"aw",@nobits
 	.align	3
-	.set	.LANCHOR69,. + 0
+	.set	.LANCHOR72,. + 0
 	.type	gc_page_buf_id, %object
 	.size	gc_page_buf_id, 8
 gc_page_buf_id:
 	.zero	8
 	.section	.bss.gc_pre_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR148,. + 0
+	.set	.LANCHOR153,. + 0
 	.type	gc_pre_ppa_tbl, %object
 	.size	gc_pre_ppa_tbl, 8
 gc_pre_ppa_tbl:
 	.zero	8
 	.section	.bss.gc_search_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR146,. + 0
+	.set	.LANCHOR151,. + 0
 	.type	gc_search_count, %object
 	.size	gc_search_count, 4
 gc_search_count:
 	.zero	4
 	.section	.bss.gc_slc_cache_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR77,. + 0
+	.set	.LANCHOR80,. + 0
 	.type	gc_slc_cache_index, %object
 	.size	gc_slc_cache_index, 2
 gc_slc_cache_index:
 	.zero	2
 	.section	.bss.gc_slc_data_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR81,. + 0
+	.set	.LANCHOR84,. + 0
 	.type	gc_slc_data_index, %object
 	.size	gc_slc_data_index, 2
 gc_slc_data_index:
 	.zero	2
 	.section	.bss.gc_slc_mode_tlc_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR79,. + 0
+	.set	.LANCHOR82,. + 0
 	.type	gc_slc_mode_tlc_vpn_th, %object
 	.size	gc_slc_mode_tlc_vpn_th, 2
 gc_slc_mode_tlc_vpn_th:
 	.zero	2
 	.section	.bss.gc_slc_mode_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR61,. + 0
+	.set	.LANCHOR62,. + 0
 	.type	gc_slc_mode_vpn_th, %object
 	.size	gc_slc_mode_vpn_th, 2
 gc_slc_mode_vpn_th:
 	.zero	2
 	.section	.bss.gc_state,"aw",@nobits
-	.set	.LANCHOR145,. + 0
+	.set	.LANCHOR150,. + 0
 	.type	gc_state, %object
 	.size	gc_state, 1
 gc_state:
 	.zero	1
 	.section	.bss.gc_tlc_mode_slc_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR89,. + 0
+	.set	.LANCHOR92,. + 0
 	.type	gc_tlc_mode_slc_vpn_th, %object
 	.size	gc_tlc_mode_slc_vpn_th, 2
 gc_tlc_mode_slc_vpn_th:
 	.zero	2
 	.section	.bss.gc_tlc_mode_tlc_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR86,. + 0
+	.set	.LANCHOR89,. + 0
 	.type	gc_tlc_mode_tlc_vpn_th, %object
 	.size	gc_tlc_mode_tlc_vpn_th, 2
 gc_tlc_mode_tlc_vpn_th:
 	.zero	2
 	.section	.bss.gc_valid_page_ppa,"aw",@nobits
 	.align	3
-	.set	.LANCHOR65,. + 0
+	.set	.LANCHOR66,. + 0
 	.type	gc_valid_page_ppa, %object
 	.size	gc_valid_page_ppa, 8
 gc_valid_page_ppa:
 	.zero	8
 	.section	.bss.gc_xlc_data_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR78,. + 0
+	.set	.LANCHOR81,. + 0
 	.type	gc_xlc_data_index, %object
 	.size	gc_xlc_data_index, 2
 gc_xlc_data_index:
 	.zero	2
 	.section	.bss.gc_xlc_search_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR82,. + 0
+	.set	.LANCHOR85,. + 0
 	.type	gc_xlc_search_index, %object
 	.size	gc_xlc_search_index, 2
 gc_xlc_search_index:
@@ -22520,7 +23748,7 @@ gp_blk_info:
 	.zero	8
 	.section	.bss.gp_data_slc_cache_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR76,. + 0
+	.set	.LANCHOR79,. + 0
 	.type	gp_data_slc_cache_head, %object
 	.size	gp_data_slc_cache_head, 8
 gp_data_slc_cache_head:
@@ -22534,17 +23762,18 @@ gp_data_slc_data_head:
 	.zero	8
 	.section	.bss.gp_data_xlc_data_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR75,. + 0
+	.set	.LANCHOR78,. + 0
 	.type	gp_data_xlc_data_head, %object
 	.size	gp_data_xlc_data_head, 8
 gp_data_xlc_data_head:
 	.zero	8
 	.section	.bss.gp_flash_check_buf,"aw",@nobits
 	.align	3
+	.set	.LANCHOR137,. + 0
 	.type	gp_flash_check_buf, %object
-	.size	gp_flash_check_buf, 262144
+	.size	gp_flash_check_buf, 8
 gp_flash_check_buf:
-	.zero	262144
+	.zero	8
 	.section	.bss.gp_flash_info,"aw",@nobits
 	.align	3
 	.set	.LANCHOR26,. + 0
@@ -22554,21 +23783,21 @@ gp_flash_info:
 	.zero	8
 	.section	.bss.gp_free_mix_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR95,. + 0
+	.set	.LANCHOR98,. + 0
 	.type	gp_free_mix_head, %object
 	.size	gp_free_mix_head, 8
 gp_free_mix_head:
 	.zero	8
 	.section	.bss.gp_free_slc_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR91,. + 0
+	.set	.LANCHOR94,. + 0
 	.type	gp_free_slc_head, %object
 	.size	gp_free_slc_head, 8
 gp_free_slc_head:
 	.zero	8
 	.section	.bss.gp_free_xlc_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR93,. + 0
+	.set	.LANCHOR96,. + 0
 	.type	gp_free_xlc_head, %object
 	.size	gp_free_xlc_head, 8
 gp_free_xlc_head:
@@ -22582,7 +23811,7 @@ gp_ftl_ext_info:
 	.zero	8
 	.section	.bss.gp_ftl_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR97,. + 0
+	.set	.LANCHOR100,. + 0
 	.type	gp_ftl_info, %object
 	.size	gp_ftl_info, 8
 gp_ftl_info:
@@ -22610,27 +23839,28 @@ gp_sblk_list_tbl:
 	.zero	8
 	.section	.bss.idb_buf,"aw",@nobits
 	.align	3
+	.set	.LANCHOR135,. + 0
 	.type	idb_buf, %object
-	.size	idb_buf, 262144
+	.size	idb_buf, 8
 idb_buf:
-	.zero	262144
+	.zero	8
 	.section	.bss.idb_need_write_back,"aw",@nobits
 	.align	2
-	.set	.LANCHOR169,. + 0
+	.set	.LANCHOR136,. + 0
 	.type	idb_need_write_back, %object
 	.size	idb_need_write_back, 4
 idb_need_write_back:
 	.zero	4
 	.section	.bss.lpa_hash,"aw",@nobits
 	.align	3
-	.set	.LANCHOR110,. + 0
+	.set	.LANCHOR112,. + 0
 	.type	lpa_hash, %object
 	.size	lpa_hash, 512
 lpa_hash:
 	.zero	512
 	.section	.bss.lpa_hash_index,"aw",@nobits
 	.align	3
-	.set	.LANCHOR112,. + 0
+	.set	.LANCHOR114,. + 0
 	.type	lpa_hash_index, %object
 	.size	lpa_hash_index, 8
 lpa_hash_index:
@@ -22654,7 +23884,7 @@ nandc_hw_seed:
 nandc_randomizer_en:
 	.zero	1
 	.section	.bss.p_free_buf_head,"aw",@nobits
-	.set	.LANCHOR50,. + 0
+	.set	.LANCHOR51,. + 0
 	.type	p_free_buf_head, %object
 	.size	p_free_buf_head, 1
 p_free_buf_head:
@@ -22666,135 +23896,135 @@ p_free_buf_head:
 p_read_ahead_ext_buf:
 	.zero	8
 	.section	.bss.pm_first_write,"aw",@nobits
-	.set	.LANCHOR191,. + 0
+	.set	.LANCHOR192,. + 0
 	.type	pm_first_write, %object
 	.size	pm_first_write, 1
 pm_first_write:
 	.zero	1
 	.section	.bss.pm_gc_enable,"aw",@nobits
 	.align	2
-	.set	.LANCHOR128,. + 0
+	.set	.LANCHOR130,. + 0
 	.type	pm_gc_enable, %object
 	.size	pm_gc_enable, 4
 pm_gc_enable:
 	.zero	4
 	.section	.bss.pm_last_load_ram_id,"aw",@nobits
-	.set	.LANCHOR201,. + 0
+	.set	.LANCHOR205,. + 0
 	.type	pm_last_load_ram_id, %object
 	.size	pm_last_load_ram_id, 1
 pm_last_load_ram_id:
 	.zero	1
 	.section	.bss.pm_last_update_ram_id,"aw",@nobits
-	.set	.LANCHOR131,. + 0
+	.set	.LANCHOR133,. + 0
 	.type	pm_last_update_ram_id, %object
 	.size	pm_last_update_ram_id, 1
 pm_last_update_ram_id:
 	.zero	1
 	.section	.bss.pm_ram_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR130,. + 0
+	.set	.LANCHOR132,. + 0
 	.type	pm_ram_info, %object
 	.size	pm_ram_info, 512
 pm_ram_info:
 	.zero	512
 	.section	.bss.read_ahead_lpa,"aw",@nobits
 	.align	2
-	.set	.LANCHOR202,. + 0
+	.set	.LANCHOR206,. + 0
 	.type	read_ahead_lpa, %object
 	.size	read_ahead_lpa, 4
 read_ahead_lpa:
 	.zero	4
 	.section	.bss.read_buf_count,"aw",@nobits
-	.set	.LANCHOR125,. + 0
+	.set	.LANCHOR127,. + 0
 	.type	read_buf_count, %object
 	.size	read_buf_count, 1
 read_buf_count:
 	.zero	1
 	.section	.bss.read_buf_head,"aw",@nobits
-	.set	.LANCHOR124,. + 0
+	.set	.LANCHOR126,. + 0
 	.type	read_buf_head, %object
 	.size	read_buf_head, 1
 read_buf_head:
 	.zero	1
 	.section	.bss.sblk_gc_write_completed_queue_head,"aw",@nobits
-	.set	.LANCHOR66,. + 0
+	.set	.LANCHOR67,. + 0
 	.type	sblk_gc_write_completed_queue_head, %object
 	.size	sblk_gc_write_completed_queue_head, 1
 sblk_gc_write_completed_queue_head:
 	.zero	1
 	.section	.bss.sblk_queue_head,"aw",@nobits
-	.set	.LANCHOR53,. + 0
+	.set	.LANCHOR54,. + 0
 	.type	sblk_queue_head, %object
 	.size	sblk_queue_head, 1
 sblk_queue_head:
 	.zero	1
 	.section	.bss.sblk_read_completed_queue_head,"aw",@nobits
-	.set	.LANCHOR127,. + 0
+	.set	.LANCHOR129,. + 0
 	.type	sblk_read_completed_queue_head, %object
 	.size	sblk_read_completed_queue_head, 1
 sblk_read_completed_queue_head:
 	.zero	1
 	.section	.bss.sblk_write_completed_queue_head,"aw",@nobits
-	.set	.LANCHOR122,. + 0
+	.set	.LANCHOR124,. + 0
 	.type	sblk_write_completed_queue_head, %object
 	.size	sblk_write_completed_queue_head, 1
 sblk_write_completed_queue_head:
 	.zero	1
 	.section	.bss.slc_cache_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR83,. + 0
+	.set	.LANCHOR86,. + 0
 	.type	slc_cache_sblk, %object
 	.size	slc_cache_sblk, 2
 slc_cache_sblk:
 	.zero	2
 	.section	.bss.slc_data_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR85,. + 0
+	.set	.LANCHOR88,. + 0
 	.type	slc_data_sblk, %object
 	.size	slc_data_sblk, 2
 slc_data_sblk:
 	.zero	2
 	.section	.bss.write_buf_count,"aw",@nobits
-	.set	.LANCHOR57,. + 0
+	.set	.LANCHOR58,. + 0
 	.type	write_buf_count, %object
 	.size	write_buf_count, 1
 write_buf_count:
 	.zero	1
 	.section	.bss.write_buf_head,"aw",@nobits
-	.set	.LANCHOR56,. + 0
+	.set	.LANCHOR57,. + 0
 	.type	write_buf_head, %object
 	.size	write_buf_head, 1
 write_buf_head:
 	.zero	1
 	.section	.bss.write_commit_count,"aw",@nobits
-	.set	.LANCHOR119,. + 0
+	.set	.LANCHOR121,. + 0
 	.type	write_commit_count, %object
 	.size	write_commit_count, 1
 write_commit_count:
 	.zero	1
 	.section	.bss.write_commit_head,"aw",@nobits
-	.set	.LANCHOR173,. + 0
+	.set	.LANCHOR174,. + 0
 	.type	write_commit_head, %object
 	.size	write_commit_head, 1
 write_commit_head:
 	.zero	1
 	.section	.bss.xlc_data_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR87,. + 0
+	.set	.LANCHOR90,. + 0
 	.type	xlc_data_sblk, %object
 	.size	xlc_data_sblk, 2
 xlc_data_sblk:
 	.zero	2
 	.section	.bss.zftl_print_list_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR96,. + 0
+	.set	.LANCHOR99,. + 0
 	.type	zftl_print_list_count, %object
 	.size	zftl_print_list_count, 2
 zftl_print_list_count:
 	.zero	2
 	.section	.data.g_nand_para_info,"aw",@progbits
 	.align	3
-	.set	.LANCHOR34,. + 0
+	.set	.LANCHOR30,. + 0
 	.type	g_nand_para_info, %object
 	.size	g_nand_para_info, 32
 g_nand_para_info:
@@ -22828,7 +24058,7 @@ g_nand_para_info:
 	.byte	0
 	.section	.data.hy_f26_ref_value,"aw",@progbits
 	.align	3
-	.set	.LANCHOR150,. + 0
+	.set	.LANCHOR155,. + 0
 	.type	hy_f26_ref_value, %object
 	.size	hy_f26_ref_value, 28
 hy_f26_ref_value:
@@ -22862,7 +24092,7 @@ hy_f26_ref_value:
 	.byte	-37
 	.section	.data.nand_opt_para,"aw",@progbits
 	.align	3
-	.set	.LANCHOR195,. + 0
+	.set	.LANCHOR199,. + 0
 	.type	nand_opt_para, %object
 	.size	nand_opt_para, 128
 nand_opt_para:
@@ -22944,7 +24174,7 @@ nand_opt_para:
 	.zero	14
 	.section	.data.sd15_slc_rr,"aw",@progbits
 	.align	3
-	.set	.LANCHOR33,. + 0
+	.set	.LANCHOR36,. + 0
 	.type	sd15_slc_rr, %object
 	.size	sd15_slc_rr, 25
 sd15_slc_rr:
@@ -22975,7 +24205,7 @@ sd15_slc_rr:
 	.byte	112
 	.section	.data.sd15_tlc_rr,"aw",@progbits
 	.align	3
-	.set	.LANCHOR32,. + 0
+	.set	.LANCHOR35,. + 0
 	.type	sd15_tlc_rr, %object
 	.size	sd15_tlc_rr, 329
 sd15_tlc_rr:
@@ -23310,7 +24540,7 @@ sd15_tlc_rr:
 	.byte	0
 	.section	.data.tlc_prog_order,"aw",@progbits
 	.align	3
-	.set	.LANCHOR215,. + 0
+	.set	.LANCHOR219,. + 0
 	.type	tlc_prog_order, %object
 	.size	tlc_prog_order, 768
 tlc_prog_order:
@@ -23707,9 +24937,9 @@ zftl_debug:
 	.word	17476
 	.section	.data.zftl_nand_flash_para_tbl,"aw",@progbits
 	.align	3
-	.set	.LANCHOR194,. + 0
+	.set	.LANCHOR198,. + 0
 	.type	zftl_nand_flash_para_tbl, %object
-	.size	zftl_nand_flash_para_tbl, 1152
+	.size	zftl_nand_flash_para_tbl, 1216
 zftl_nand_flash_para_tbl:
 	.byte	6
 	.byte	-104
@@ -24428,7 +25658,7 @@ zftl_nand_flash_para_tbl:
 	.hword	9671
 	.byte	5
 	.byte	19
-	.byte	60
+	.byte	70
 	.byte	32
 	.byte	1
 	.byte	0
@@ -24456,7 +25686,7 @@ zftl_nand_flash_para_tbl:
 	.hword	9671
 	.byte	5
 	.byte	19
-	.byte	60
+	.byte	70
 	.byte	32
 	.byte	1
 	.byte	0
@@ -24496,6 +25726,34 @@ zftl_nand_flash_para_tbl:
 	.byte	-33
 	.byte	0
 	.byte	6
+	.byte	-101
+	.byte	73
+	.byte	1
+	.byte	0
+	.byte	-101
+	.byte	73
+	.byte	9
+	.byte	1
+	.byte	32
+	.hword	256
+	.byte	2
+	.byte	1
+	.hword	2144
+	.hword	-23097
+	.byte	8
+	.byte	21
+	.byte	70
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	8
+	.byte	0
+	.hword	256
+	.byte	3
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	6
 	.byte	-83
 	.byte	-34
 	.byte	20
@@ -24644,24 +25902,52 @@ zftl_nand_flash_para_tbl:
 	.byte	74
 	.byte	2
 	.byte	1
-	.byte	16
-	.hword	256
+	.byte	16
+	.hword	256
+	.byte	2
+	.byte	2
+	.hword	1056
+	.hword	473
+	.byte	2
+	.byte	5
+	.byte	40
+	.byte	32
+	.byte	4
+	.byte	1
+	.byte	3
+	.byte	0
+	.hword	256
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	6
+	.byte	-83
+	.byte	58
+	.byte	20
+	.byte	3
+	.byte	8
+	.byte	80
+	.byte	2
+	.byte	1
+	.byte	32
+	.hword	388
 	.byte	2
 	.byte	2
-	.hword	1056
+	.hword	1362
 	.hword	473
-	.byte	2
-	.byte	5
+	.byte	9
+	.byte	8
 	.byte	40
 	.byte	32
-	.byte	4
-	.byte	1
 	.byte	3
+	.byte	1
+	.byte	4
 	.byte	0
-	.hword	256
-	.byte	0
-	.byte	0
-	.byte	0
+	.hword	512
+	.byte	2
+	.byte	-65
+	.byte	-66
 	.byte	0
 	.byte	5
 	.byte	-119
@@ -24678,7 +25964,7 @@ zftl_nand_flash_para_tbl:
 	.byte	1
 	.hword	1024
 	.hword	455
-	.byte	3
+	.byte	4
 	.byte	17
 	.byte	40
 	.byte	32
@@ -24706,7 +25992,7 @@ zftl_nand_flash_para_tbl:
 	.byte	2
 	.hword	1024
 	.hword	455
-	.byte	3
+	.byte	4
 	.byte	17
 	.byte	40
 	.byte	32
@@ -24719,489 +26005,496 @@ zftl_nand_flash_para_tbl:
 	.byte	0
 	.byte	0
 	.byte	0
-	.section	.rodata.__func__.10060,"a",@progbits
+	.section	.rodata.__func__.10010,"a",@progbits
+	.align	3
+	.set	.LANCHOR211,. + 0
+	.type	__func__.10010, %object
+	.size	__func__.10010, 20
+__func__.10010:
+	.string	"gc_scan_static_data"
+	.section	.rodata.__func__.10077,"a",@progbits
+	.align	3
+	.set	.LANCHOR220,. + 0
+	.type	__func__.10077, %object
+	.size	__func__.10077, 11
+__func__.10077:
+	.string	"zftl_do_gc"
+	.section	.rodata.__func__.10170,"a",@progbits
 	.align	3
 	.set	.LANCHOR5,. + 0
-	.type	__func__.10060, %object
-	.size	__func__.10060, 18
-__func__.10060:
+	.type	__func__.10170, %object
+	.size	__func__.10170, 18
+__func__.10170:
 	.string	"_list_remove_node"
-	.section	.rodata.__func__.10085,"a",@progbits
+	.section	.rodata.__func__.10195,"a",@progbits
 	.align	3
 	.set	.LANCHOR11,. + 0
-	.type	__func__.10085, %object
-	.size	__func__.10085, 23
-__func__.10085:
+	.type	__func__.10195, %object
+	.size	__func__.10195, 23
+__func__.10195:
 	.string	"_list_update_data_list"
-	.section	.rodata.__func__.10193,"a",@progbits
+	.section	.rodata.__func__.10303,"a",@progbits
 	.align	3
-	.set	.LANCHOR179,. + 0
-	.type	__func__.10193, %object
-	.size	__func__.10193, 15
-__func__.10193:
+	.set	.LANCHOR180,. + 0
+	.type	__func__.10303, %object
+	.size	__func__.10303, 15
+__func__.10303:
 	.string	"ftl_info_flush"
-	.section	.rodata.__func__.10225,"a",@progbits
+	.section	.rodata.__func__.10335,"a",@progbits
 	.align	3
-	.set	.LANCHOR126,. + 0
-	.type	__func__.10225, %object
-	.size	__func__.10225, 15
-__func__.10225:
+	.set	.LANCHOR128,. + 0
+	.type	__func__.10335, %object
+	.size	__func__.10335, 15
+__func__.10335:
 	.string	"ftl_alloc_sblk"
-	.section	.rodata.__func__.10266,"a",@progbits
+	.section	.rodata.__func__.10376,"a",@progbits
 	.align	3
-	.set	.LANCHOR107,. + 0
-	.type	__func__.10266, %object
-	.size	__func__.10266, 18
-__func__.10266:
+	.set	.LANCHOR109,. + 0
+	.type	__func__.10376, %object
+	.size	__func__.10376, 18
+__func__.10376:
 	.string	"ftl_alloc_sys_blk"
-	.section	.rodata.__func__.10276,"a",@progbits
+	.section	.rodata.__func__.10386,"a",@progbits
 	.align	3
-	.set	.LANCHOR108,. + 0
-	.type	__func__.10276, %object
-	.size	__func__.10276, 17
-__func__.10276:
+	.set	.LANCHOR110,. + 0
+	.type	__func__.10386, %object
+	.size	__func__.10386, 17
+__func__.10386:
 	.string	"ftl_free_sys_blk"
-	.section	.rodata.__func__.10311,"a",@progbits
+	.section	.rodata.__func__.10421,"a",@progbits
 	.align	3
-	.set	.LANCHOR208,. + 0
-	.type	__func__.10311, %object
-	.size	__func__.10311, 14
-__func__.10311:
+	.set	.LANCHOR212,. + 0
+	.type	__func__.10421, %object
+	.size	__func__.10421, 14
+__func__.10421:
 	.string	"ftl_sblk_dump"
-	.section	.rodata.__func__.10335,"a",@progbits
+	.section	.rodata.__func__.10445,"a",@progbits
 	.align	3
-	.set	.LANCHOR197,. + 0
-	.type	__func__.10335, %object
-	.size	__func__.10335, 16
-__func__.10335:
+	.set	.LANCHOR201,. + 0
+	.type	__func__.10445, %object
+	.size	__func__.10445, 16
+__func__.10445:
 	.string	"ftl_sysblk_dump"
-	.section	.rodata.__func__.10354,"a",@progbits
+	.section	.rodata.__func__.10467,"a",@progbits
 	.align	3
-	.set	.LANCHOR188,. + 0
-	.type	__func__.10354, %object
-	.size	__func__.10354, 23
-__func__.10354:
+	.set	.LANCHOR189,. + 0
+	.type	__func__.10467, %object
+	.size	__func__.10467, 23
+__func__.10467:
 	.string	"ftl_open_sblk_recovery"
-	.section	.rodata.__func__.10380,"a",@progbits
+	.section	.rodata.__func__.10497,"a",@progbits
 	.align	3
-	.set	.LANCHOR109,. + 0
-	.type	__func__.10380, %object
-	.size	__func__.10380, 23
-__func__.10380:
+	.set	.LANCHOR111,. + 0
+	.type	__func__.10497, %object
+	.size	__func__.10497, 23
+__func__.10497:
 	.string	"ftl_get_ppa_from_index"
-	.section	.rodata.__func__.10401,"a",@progbits
+	.section	.rodata.__func__.10518,"a",@progbits
 	.align	3
-	.set	.LANCHOR211,. + 0
-	.type	__func__.10401, %object
-	.size	__func__.10401, 19
-__func__.10401:
+	.set	.LANCHOR215,. + 0
+	.type	__func__.10518, %object
+	.size	__func__.10518, 19
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+	.size	__func__.9857, 19
+__func__.9857:
 	.string	"gc_write_completed"
-	.section	.rodata.__func__.9776,"a",@progbits
+	.section	.rodata.__func__.9886,"a",@progbits
 	.align	3
-	.set	.LANCHOR214,. + 0
-	.type	__func__.9776, %object
-	.size	__func__.9776, 16
-__func__.9776:
+	.set	.LANCHOR218,. + 0
+	.type	__func__.9886, %object
+	.size	__func__.9886, 16
+__func__.9886:
 	.string	"gc_do_copy_back"
-	.section	.rodata.__func__.9798,"a",@progbits
+	.section	.rodata.__func__.9908,"a",@progbits
 	.align	3
-	.set	.LANCHOR103,. + 0
-	.type	__func__.9798, %object
-	.size	__func__.9798, 16
-__func__.9798:
+	.set	.LANCHOR106,. + 0
+	.type	__func__.9908, %object
+	.size	__func__.9908, 16
+__func__.9908:
 	.string	"gc_free_src_blk"
-	.section	.rodata.__func__.9842,"a",@progbits
+	.section	.rodata.__func__.9952,"a",@progbits
 	.align	3
-	.set	.LANCHOR206,. + 0
-	.type	__func__.9842, %object
-	.size	__func__.9842, 16
-__func__.9842:
+	.set	.LANCHOR210,. + 0
+	.type	__func__.9952, %object
+	.size	__func__.9952, 16
+__func__.9952:
 	.string	"gc_scan_src_blk"
-	.section	.rodata.__func__.9900,"a",@progbits
-	.align	3
-	.set	.LANCHOR207,. + 0
-	.type	__func__.9900, %object
-	.size	__func__.9900, 20
-__func__.9900:
-	.string	"gc_scan_static_data"
-	.section	.rodata.__func__.9967,"a",@progbits
-	.align	3
-	.set	.LANCHOR216,. + 0
-	.type	__func__.9967, %object
-	.size	__func__.9967, 11
-__func__.9967:
-	.string	"zftl_do_gc"
 	.section	.rodata._list_remove_node.str1.1,"aMS",@progbits,1
 .LC0:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
 	.section	.rodata.dump_ftl_info.str1.1,"aMS",@progbits,1
-.LC154:
+.LC165:
 	.string	"free_buf_count: %d\n"
-.LC155:
+.LC166:
 	.string	"g_ftl_info_blk blk:0x%x, index:0x%x, page:0x%x\n"
-.LC156:
+.LC167:
 	.string	"ftl_ext_info_blk blk:0x%x, page:0x%x\n"
-.LC157:
+.LC168:
 	.string	"ac_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC158:
+.LC169:
 	.string	"tmp_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC159:
+.LC170:
 	.string	"gc_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC160:
+.LC171:
 	.string	"lpa:"
-.LC161:
+.LC172:
 	.string	"vpn:"
-.LC162:
+.LC173:
 	.string	"sblk:"
-.LC163:
+.LC174:
 	.string	"lpa_hash:"
-.LC164:
+.LC175:
 	.string	"lpa_hash_index:"
 	.section	.rodata.dump_sblk_queue.str1.1,"aMS",@progbits,1
-.LC68:
+.LC70:
 	.string	"dump_sblk_queue: %d\n"
-.LC69:
+.LC71:
 	.string	"buf id= %d state = %d ppa = %x\n"
 	.section	.rodata.flash_complete_page_read.str1.1,"aMS",@progbits,1
 .LC118:
 	.string	"flash_complete_page_read %x %x error_ecc %d %d\n"
 	.section	.rodata.flash_ddr_tuning_read.str1.1,"aMS",@progbits,1
-.LC109:
+.LC111:
 	.string	"%d flash_ddr_tuning_read %x ecc=%d\n"
-.LC110:
+.LC112:
 	.string	"sync para %d\n"
-.LC111:
+.LC113:
 	.string	"DDR mode Read error %x %x\n"
-.LC112:
+.LC114:
 	.string	"SDR mode Read %x %x ecc:%x\n"
 	.section	.rodata.flash_erase_all.str1.1,"aMS",@progbits,1
 .LC35:
@@ -25217,25 +26510,25 @@ __func__.9967:
 .LC32:
 	.string	"flash_erase_duplane_block pageadd = %x status = %x\n"
 	.section	.rodata.flash_get_last_written_page.str1.1,"aMS",@progbits,1
-.LC115:
+.LC117:
 	.string	"flash_get_last_written_page: %x %x %x\n"
 	.section	.rodata.flash_info_blk_init.str1.1,"aMS",@progbits,1
-.LC116:
+.LC162:
 	.string	"...%d @ %s %d %p\n"
-.LC117:
+.LC163:
 	.string	"no sys info %x\n"
 	.section	.rodata.flash_info_data_init.str1.1,"aMS",@progbits,1
-.LC84:
+.LC86:
 	.string	"...%d @ %s\n"
 	.section	.rodata.flash_info_flush.str1.1,"aMS",@progbits,1
-.LC149:
+.LC159:
 	.string	"finfo:"
-.LC150:
+.LC160:
 	.string	"flash_info_flush id = %x, page = %x\n"
-.LC151:
+.LC161:
 	.string	"sys_info_flush error:%x\n"
 	.section	.rodata.flash_mask_bad_block.str1.1,"aMS",@progbits,1
-.LC40:
+.LC41:
 	.string	"flash_mask_bad_block %d %d\n"
 	.section	.rodata.flash_prog_page.str1.1,"aMS",@progbits,1
 .LC122:
@@ -25243,28 +26536,31 @@ __func__.9967:
 .LC123:
 	.string	"flash_prog_page page_addr = %x status = %x\n"
 	.section	.rodata.flash_prog_page_en.str1.1,"aMS",@progbits,1
-.LC128:
-	.string	"flash_prog_page_en:%x %x\n"
-.LC129:
-	.string	"w d:"
 .LC130:
-	.string	"w s:"
+	.string	"flash_prog_page_en:%x %x %x\n"
 .LC131:
-	.string	"spare"
+	.string	"w d:"
 .LC132:
-	.string	"data"
+	.string	"w s:"
 .LC133:
+	.string	"spare"
+.LC134:
+	.string	"data"
+.LC135:
 	.string	"write error: %x\n"
 	.section	.rodata.flash_read_id.str1.1,"aMS",@progbits,1
 .LC38:
 	.string	"No.%d FLASH ID:%x %x %x %x %x %x\n"
+	.section	.rodata.flash_read_otp_data.str1.1,"aMS",@progbits,1
+.LC39:
+	.string	"otp:%x %x %x %x\n"
 	.section	.rodata.flash_read_page.str1.1,"aMS",@progbits,1
-.LC102:
+.LC104:
 	.string	"flash_read_page %x %x %x\n"
 	.section	.rodata.flash_read_page_en.str1.1,"aMS",@progbits,1
-.LC113:
+.LC115:
 	.string	"flash_read_page_en %x %x %x\n"
-.LC114:
+.LC116:
 	.string	"flash_read_page_en %x %x error_ecc %d %d\n"
 	.section	.rodata.flash_set_interface_mode.str1.1,"aMS",@progbits,1
 .LC36:
@@ -25272,171 +26568,186 @@ __func__.9967:
 .LC37:
 	.string	"nand ddr mode %x\n"
 	.section	.rodata.ftl_alloc_sblk.str1.1,"aMS",@progbits,1
-.LC67:
+.LC69:
 	.string	"alloc sblk %x %d\n"
+	.section	.rodata.ftl_dump_write_open_sblk.str1.1,"aMS",@progbits,1
+.LC154:
+	.string	"ftl_sblk_dump_write = %x %d %d %d %d\n"
+.LC155:
+	.string	"blk= %x, page=%x, ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
+.LC156:
+	.string	"ftl_sblk_dump_write2 = %x %d %d %d\n"
+.LC157:
+	.string	"ftl_sblk_dump_write = %x %x\n"
+.LC158:
+	.string	"ftl_sblk_dump_write done = %x\n"
 	.section	.rodata.ftl_ext_info_init.str1.1,"aMS",@progbits,1
-.LC138:
+.LC140:
 	.string	"%s %d %d %x %x\n"
 	.section	.rodata.ftl_free_sblk.str1.1,"aMS",@progbits,1
-.LC55:
-	.string	"swl_tlc_free_mini_ec_blk sblk %x\n"
 .LC56:
+	.string	"swl_tlc_free_mini_ec_blk sblk %x\n"
+.LC57:
 	.string	"swl_slc_free_mini_ec_blk sblk %x\n"
 	.section	.rodata.ftl_info_blk_init.str1.1,"aMS",@progbits,1
-.LC136:
+.LC138:
 	.string	"%d %x @%d %x\n"
-.LC137:
+.LC139:
 	.string	"ftl_info_blk_init %d %d %x\n"
 	.section	.rodata.ftl_info_flush.str1.1,"aMS",@progbits,1
-.LC135:
+.LC137:
 	.string	"g_ftl_info_blk blk = %x, page = %x version = %d\n"
 	.section	.rodata.ftl_low_format.str1.1,"aMS",@progbits,1
-.LC139:
+.LC141:
 	.string	"ftl_low_format %d\n"
-.LC140:
+.LC142:
 	.string	"low format %d %d %d %d\n"
 	.section	.rodata.ftl_mask_bad_block.str1.1,"aMS",@progbits,1
-.LC60:
+.LC61:
 	.string	"mask bad block:cs %x block: %x\n"
 	.section	.rodata.ftl_open_sblk_recovery.str1.1,"aMS",@progbits,1
-.LC142:
+.LC144:
 	.string	"saved_active_page  = %x\n"
-.LC143:
+.LC145:
 	.string	"saved_active_plane = %x\n"
-.LC144:
+.LC146:
 	.string	"sblk = %x\n"
-.LC145:
+.LC147:
 	.string	"phy_blk = %x %x\n"
-.LC146:
+.LC148:
 	.string	"sblk = %x, vpn0 = %d, vpn1 = %d\n"
-.LC147:
-	.string	"dump write = %x\n"
+.LC149:
+	.string	"dump_write_lpa = %x %x %x %x\n"
+.LC150:
+	.string	"dump write new ppa = %x, last ppa = %x lpa = %x\n"
+.LC151:
+	.string	"dump write = %x %x\n"
+.LC152:
+	.string	"dump write hash update = %x %x %x\n"
 	.section	.rodata.ftl_re_low_format.str1.1,"aMS",@progbits,1
-.LC141:
+.LC143:
 	.string	"re low format %d\n"
 	.section	.rodata.ftl_sblk_dump.str1.1,"aMS",@progbits,1
-.LC197:
+.LC208:
 	.string	"ftl_sblk_dump = %x %d %d %d %d\n"
-.LC198:
+.LC209:
 	.string	"ftl_sblk_dump = %x %x %x %x\n"
-.LC199:
+.LC210:
 	.string	"page_addr = %x, lpa=%x vpn = %d\n"
-.LC200:
+.LC211:
 	.string	"index= %x, lpa=%x\n"
-.LC201:
+.LC212:
 	.string	"block = %x, vpn=%x check vpn = %d\n"
 	.section	.rodata.ftl_sysblk_dump.str1.1,"aMS",@progbits,1
-.LC152:
-	.string	"blk= %x, page=%x, ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
-.LC153:
+.LC164:
 	.string	"l2p:"
 	.section	.rodata.ftl_test_block.str1.1,"aMS",@progbits,1
-.LC134:
+.LC136:
 	.string	"low format %d\n"
 	.section	.rodata.ftl_update_l2p_map.str1.1,"aMS",@progbits,1
-.LC208:
+.LC219:
 	.string	"ftl_update_l2p_map: %x %x %x\n"
-.LC209:
+.LC220:
 	.string	"ftl_update_l2p_map"
-.LC210:
+.LC221:
 	.string	"lpa_tbl:"
-.LC211:
+.LC222:
 	.string	"sblk %x vpn: %d %d\n"
 	.section	.rodata.ftl_vpn_decrement.str1.1,"aMS",@progbits,1
-.LC59:
+.LC60:
 	.string	"ftl_vpn_decrement %x = %d, %d\n"
 	.section	.rodata.ftl_write_commit.str1.1,"aMS",@progbits,1
-.LC212:
+.LC223:
 	.string	"%d read error: ppa:%x, lpa:%x, status:%x\n"
 	.section	.rodata.ftl_write_completed.str1.1,"aMS",@progbits,1
-.LC66:
+.LC68:
 	.string	"ftl prog error =%x, lpa = %x, ppa= %x\n"
 	.section	.rodata.gc_add_sblk.str1.1,"aMS",@progbits,1
-.LC41:
-	.string	"gc_add_sblk = %d, %d, %d, %d, %d, %d\n"
 .LC42:
+	.string	"gc_add_sblk = %d, %d, %d, %d, %d, %d\n"
+.LC43:
 	.string	"gc_add_sblk = %d, %d, %d,last update:%d, %d\n"
 	.section	.rodata.gc_check_data_one_wl.str1.1,"aMS",@progbits,1
-.LC205:
+.LC216:
 	.string	"gc_lpa:"
-.LC206:
+.LC217:
 	.string	"gc_ppa:"
-.LC207:
+.LC218:
 	.string	"err: ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
 	.section	.rodata.gc_do_copy_back.str1.1,"aMS",@progbits,1
-.LC213:
+.LC224:
 	.string	"gc page in buf: lpa %x ppa = %x pageindex= %x\n"
-.LC214:
+.LC225:
 	.string	"gc_do_copy_back: lpa %x des_ppa = %x %x gc_ppa= %x page_index= %d\n"
-.LC215:
+.LC226:
 	.string	"gc_do_copy_back: %x %x %x %x gc_ppa:%x %x\n"
-.LC216:
+.LC227:
 	.string	"%d prog_step: %x %x buf id= %x ppa = %x hash=%x id = %x plane = %x lpa=%x\n"
 	.section	.rodata.gc_free_src_blk.str1.1,"aMS",@progbits,1
-.LC57:
-	.string	"gc_free_src_blk = %x, vpn = %d\n"
 .LC58:
+	.string	"gc_free_src_blk = %x, vpn = %d\n"
+.LC59:
 	.string	"gc_free_src_blk %x, %d\n"
 	.section	.rodata.gc_free_temp_buf.str1.1,"aMS",@progbits,1
-.LC45:
+.LC46:
 	.string	"%d gc_free_temp_buf buf id= %x\n"
 	.section	.rodata.gc_recovery.str1.1,"aMS",@progbits,1
-.LC175:
+.LC186:
 	.string	"ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
-.LC176:
+.LC187:
 	.string	"ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
-.LC177:
+.LC188:
 	.string	"gc_recovery: %x vpn = %x\n"
 	.section	.rodata.gc_scan_src_blk.str1.1,"aMS",@progbits,1
-.LC195:
+.LC206:
 	.string	"gc_scan_src_blk = %x, vpn = %d\n"
-.LC196:
+.LC207:
 	.string	"gc_scan_src_blk = %x, s vpn0 = %d, c vpn1 = %d\n"
 	.section	.rodata.gc_search_src_blk.str1.1,"aMS",@progbits,1
-.LC47:
-	.string	"zftl_get_gc_node cache = %x index = %d vpn = %x\n"
 .LC48:
+	.string	"zftl_get_gc_node cache = %x index = %d vpn = %x\n"
+.LC49:
 	.string	"gc_search_src_blk mode = %x, src mode = %x, count= %d %d\n"
 	.section	.rodata.gc_static_wearleveling.str1.1,"aMS",@progbits,1
-.LC73:
+.LC75:
 	.string	"gc_static_wearleveling: min blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
-.LC74:
+.LC76:
 	.string	"gc_static_wearleveling: min slc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
-.LC75:
+.LC77:
 	.string	"gc_static_wearleveling: min tlc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
-.LC76:
+.LC78:
 	.string	"gc_static_wearleveling: max slc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
-.LC77:
+.LC79:
 	.string	"gc_static_wearleveling: max xlc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
-.LC78:
+.LC80:
 	.string	"gc_static_wearleveling: slc blk: %x, tlc blk: %d avg slc ec: %d, avg tlc ec: %d \n"
-.LC79:
+.LC81:
 	.string	"gc_static_wearleveling: min slc ec: %x, min tlc ec: %d max slc ec: %d, max tlc ec: %d; %d %d\n"
-.LC80:
+.LC82:
 	.string	"swl add tlc gc = %x, %d, %d, %d, %d, %d\n"
-.LC81:
+.LC83:
 	.string	"swl add slc gc  = %x, %d, %d, %d, %d, %d\n"
 	.section	.rodata.gc_update_l2p_map_new.str1.1,"aMS",@progbits,1
-.LC191:
+.LC202:
 	.string	"gc_update_l2p_map_new sblk %x\n"
-.LC192:
+.LC203:
 	.string	"gc_update_l2p_map_new: %x %x %x\n"
-.LC193:
+.LC204:
 	.string	"lpa: %x %x %x\n"
-.LC194:
+.LC205:
 	.string	"gc_update_l2p_map_new: %x vpn = %x vpn1 = %x done\n"
 	.section	.rodata.gc_write_completed.str1.1,"aMS",@progbits,1
-.LC43:
-	.string	"status: %x, ppa: %x\n"
 .LC44:
+	.string	"status: %x, ppa: %x\n"
+.LC45:
 	.string	"gc_write_completed: %x  %x  %x %x\n"
 	.section	.rodata.hynix_get_read_retry_default.str1.1,"aMS",@progbits,1
-.LC92:
+.LC94:
 	.string	"otp error! %d"
-.LC93:
+.LC95:
 	.string	"rr"
 	.section	.rodata.hynix_read_retrial.str1.1,"aMS",@progbits,1
-.LC108:
+.LC110:
 	.string	"hynix RR %d row=%x, count %d, status=%d\n"
 	.section	.rodata.idb_write_data.str1.1,"aMS",@progbits,1
 .LC124:
@@ -25446,25 +26757,25 @@ __func__.9967:
 .LC126:
 	.string	"write_idblock fail! %x\n"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",@progbits,1
-.LC166:
+.LC177:
 	.string	"region_id = %d, pm_max_region = %d\n"
-.LC167:
+.LC178:
 	.string	"load_l2p_region no ppa = %x , %x, all setting 0xff....\n"
-.LC168:
+.LC179:
 	.string	"load_l2p_region = %x,%x,%x, %x\n"
-.LC169:
+.LC180:
 	.string	"pm_ppa:"
-.LC170:
+.LC181:
 	.string	"data:"
-.LC171:
+.LC182:
 	.string	"spare:"
 	.section	.rodata.lpa_rebuild_hash.str1.1,"aMS",@progbits,1
-.LC72:
+.LC74:
 	.string	"%s %d %d\n"
 	.section	.rodata.micron_read_retrial.str1.1,"aMS",@progbits,1
-.LC103:
+.LC105:
 	.string	"micron %d row=%x,last status %d,status = %d\n"
-.LC104:
+.LC106:
 	.string	"micron RR %d row=%x,count %d,status=%d\n"
 	.section	.rodata.nand_flash_print_info.str1.1,"aMS",@progbits,1
 .LC1:
@@ -25528,70 +26839,72 @@ __func__.9967:
 .LC30:
 	.string	"g_flash_toggle_mode_en: %x\n"
 	.section	.rodata.nandc_init.str1.1,"aMS",@progbits,1
-.LC85:
+.LC87:
 	.string	"...%s enter... %p\n"
-.LC86:
+.LC88:
 	.string	"0:%x %x %x %x %x\n"
-.LC87:
+.LC89:
 	.string	"g_nandc_ver...%d\n"
 	.section	.rodata.nandc_xfer.str1.1,"aMS",@progbits,1
-.LC99:
+.LC101:
 	.string	"dqs data abort %x\n"
-.LC100:
+.LC102:
 	.string	"dqs data timeout %x\n"
-.LC101:
+.LC103:
 	.string	"xfer error %x\n"
 	.section	.rodata.nandc_xfer_done.str1.1,"aMS",@progbits,1
-.LC94:
+.LC96:
 	.string	"flash_abort_clear = %d\n"
-.LC95:
+.LC97:
 	.string	"%d mtrans_cnt = %d page_num = %d\n"
-.LC96:
+.LC98:
 	.string	"nandc:"
-.LC97:
+.LC99:
 	.string	"%d flReg.d32=%x %x\n"
-.LC98:
+.LC100:
 	.string	"nandc_xfer_done read error %x\n"
 	.section	.rodata.pm_alloc_new_blk.str1.1,"aMS",@progbits,1
-.LC70:
+.LC72:
 	.string	"blk %x is bad block\n"
-.LC71:
+.LC73:
 	.string	"pm_alloc_new_blk: %x %x %x %x\n"
 	.section	.rodata.pm_free_sblk.str1.1,"aMS",@progbits,1
-.LC83:
+.LC85:
 	.string	"ftl_free_no_use_map_blk %x %x %x %d\n"
 	.section	.rodata.pm_init.str1.1,"aMS",@progbits,1
-.LC172:
+.LC183:
 	.string	"pm_init posr %x %x %x\n"
-.LC173:
+.LC184:
 	.string	"pm_init recovery %x %x %x\n"
 	.section	.rodata.pm_log2phys.str1.1,"aMS",@progbits,1
-.LC174:
+.LC185:
 	.string	"pm_log2phys  lpn = %d, max lpn = %d\n"
 	.section	.rodata.pm_ppa_update_check.str1.1,"aMS",@progbits,1
-.LC165:
+.LC176:
 	.string	"%s w error lpn = %x, max ppa = %d\n"
 	.section	.rodata.pm_write_page.str1.1,"aMS",@progbits,1
-.LC148:
+.LC153:
 	.string	"pm_write_page write error: %x\n"
 	.section	.rodata.print_ftl_debug_info.str1.1,"aMS",@progbits,1
-.LC61:
-	.string	"free blk: s:%x,t:%x,m:%x, data blk:s:%x,%x,t%x vpn: s:%x t:%x, max_vpn: %x\n"
 .LC62:
-	.string	"totle w: %d MB,r: %d MB %d dv:0x%X,poc:%d\n"
+	.string	"bad blk = %x, %x free blk: s:%x,t:%x,m:%x, data blk:s:%x,%x,t%x vpn: s:%x t:%x, max_vpn: %x\n"
 .LC63:
-	.string	"gc xlc page: %d,gc slc page: %d, tmp w: %d MB\n"
+	.string	"totle w: %d MB,r: %d MB %d dv:0x%X,poc:%d\n"
 .LC64:
-	.string	"slc ec: %d,%d,%d,%d,%d,tlc ec: %d,%d,%d,%d,%d\n"
+	.string	"gc xlc page: %d,gc slc page: %d, tmp w: %d MB\n"
 .LC65:
+	.string	"slc ec: %d,%d,%d,%d,%d,tlc ec: %d,%d,%d,%d,%d\n"
+.LC66:
 	.string	"gc th: tlc_tlc: %d tlc_slc: %d slc_slc: %d slc_tlc:%d free_th: %d\n"
+.LC67:
+	.string	"swl : %x %x %x %x\n"
 	.section	.rodata.print_gc_debug_info.str1.1,"aMS",@progbits,1
-.LC46:
+.LC47:
 	.string	"gc: b:%x,p:%x,i:%x; free buf=%d %d free slc th: %d\n"
 	.section	.rodata.print_list_info.str1.1,"aMS",@progbits,1
-.LC53:
-	.string	"list count:%p %d\n"
 .LC54:
+	.string	"list count:%p %d\n"
+.LC55:
 	.string	"%d: node:%x %x %x %x, %d %d %d %d %d\n"
 	.section	.rodata.queue_wait_first_req_completed.str1.1,"aMS",@progbits,1
 .LC119:
@@ -25735,22 +27048,28 @@ random_seed:
 	.hword	17598
 	.hword	28087
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",@progbits,1
-.LC190:
+.LC201:
 	.string	"zftl_init %x\n"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
-.LC88:
+.LC90:
 	.string	"%s 0x%x:"
-.LC89:
+.LC91:
 	.string	"%x "
-.LC90:
+.LC92:
 	.string	""
-.LC91:
+.LC93:
 	.string	"%s\n"
 	.section	.rodata.sandisk_prog_test_bad_block.str1.1,"aMS",@progbits,1
-.LC39:
+.LC40:
 	.string	"bad block test:%x %x\n"
-	.section	.rodata.sblk_prog_page.str1.1,"aMS",@progbits,1
+	.section	.rodata.sblk_3d_tlc_dump_prog.str1.1,"aMS",@progbits,1
 .LC127:
+	.string	"sblk_3d_tlc_dump_prog wl_addr= %x ppa = %x ppa = %x\n"
+	.section	.rodata.sblk_mlc_dump_prog.str1.1,"aMS",@progbits,1
+.LC128:
+	.string	"sblk_mlc_dump_prog wl_addr= %x ppa = %x ppa = %x\n"
+	.section	.rodata.sblk_prog_page.str1.1,"aMS",@progbits,1
+.LC129:
 	.string	"sblk_prog_page ppa = %x, count = %d\n"
 	.section	.rodata.toshiba_15ref_value,"a",@progbits
 	.align	3
@@ -25855,7 +27174,7 @@ toshiba_15ref_value:
 	.byte	0
 	.section	.rodata.toshiba_3D_slc_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR31,. + 0
+	.set	.LANCHOR34,. + 0
 	.type	toshiba_3D_slc_value, %object
 	.size	toshiba_3D_slc_value, 11
 toshiba_3D_slc_value:
@@ -25872,7 +27191,7 @@ toshiba_3D_slc_value:
 	.byte	56
 	.section	.rodata.toshiba_3D_tlc_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR30,. + 0
+	.set	.LANCHOR33,. + 0
 	.type	toshiba_3D_tlc_value, %object
 	.size	toshiba_3D_tlc_value, 399
 toshiba_3D_tlc_value:
@@ -26276,11 +27595,11 @@ toshiba_3D_tlc_value:
 	.byte	12
 	.byte	14
 	.section	.rodata.toshiba_3d_read_retrial.str1.1,"aMS",@progbits,1
-.LC105:
+.LC107:
 	.string	"toshiba SRR %d row=%x, status=%d\n"
-.LC106:
+.LC108:
 	.string	"toshiba TRR %d row=%x, status=%d\n"
-.LC107:
+.LC109:
 	.string	"toshiba RR %d row=%x,count %d,status=%d\n"
 	.section	.rodata.toshiba_A19ref_value,"a",@progbits
 	.align	3
@@ -26348,63 +27667,63 @@ toshiba_ref_value:
 	.byte	12
 	.byte	112
 	.section	.rodata.zftl_discard.str1.1,"aMS",@progbits,1
-.LC222:
+.LC233:
 	.string	"ftl_discard:(%x, %x, %x, %x)\n"
 	.section	.rodata.zftl_do_gc.str1.1,"aMS",@progbits,1
-.LC217:
+.LC228:
 	.string	"gc %d: %d %d %d %d %d %d %d\n"
-.LC218:
+.LC229:
 	.string	"gc %d: %d %d %d %d %d %d\n"
-.LC219:
+.LC230:
 	.string	"GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\n"
-.LC220:
+.LC231:
 	.string	"gc free %x, %d\n"
 	.section	.rodata.zftl_gc_get_free_sblk.str1.1,"aMS",@progbits,1
-.LC49:
-	.string	"swl_tlc_free_mini_ec_blk alloc sblk %x\n"
 .LC50:
-	.string	"zftl_get_free_sblk %x %d, %p %d %d\n"
+	.string	"swl_tlc_free_mini_ec_blk alloc sblk %x\n"
 .LC51:
+	.string	"zftl_get_free_sblk %x %d, %p %d %d\n"
+.LC52:
 	.string	"zftl_gc_get_free_sblk %x %x %x, %d %d %d\n"
 	.section	.rodata.zftl_get_free_sblk.str1.1,"aMS",@progbits,1
-.LC52:
+.LC53:
 	.string	"swl_slc_free_mini_ec_blk alloc sblk %x\n"
 	.section	.rodata.zftl_init.str1.1,"aMS",@progbits,1
-.LC178:
-	.string	"FTL version: 6.0.14 20180908"
-.LC179:
+.LC189:
+	.string	"FTL version: 6.0.14 20181128"
+.LC190:
 	.string	"_c_user_data_density := %d\n"
-.LC180:
+.LC191:
 	.string	"_c_totle_phy_density := %d\n"
-.LC181:
+.LC192:
 	.string	"_c_totle_log_page := %d\n"
-.LC182:
+.LC193:
 	.string	"_c_totle_data_density := %d\n"
-.LC183:
+.LC194:
 	.string	"_c_ftl_pm_page_num := %d\n"
-.LC184:
+.LC195:
 	.string	"_c_ftl_byte_pre_page := %d\n"
-.LC185:
+.LC196:
 	.string	"_c_max_pm_sblk := %d\n"
-.LC186:
+.LC197:
 	.string	"_min_slc_super_block := %d\n"
-.LC187:
+.LC198:
 	.string	"_max_xlc_super_block := %d\n"
-.LC188:
+.LC199:
 	.string	"gp_ftl_ext_info %p %p %p\n"
-.LC189:
+.LC200:
 	.string	"flash info size: %d %d %d\n"
 	.section	.rodata.zftl_read.str1.1,"aMS",@progbits,1
-.LC202:
+.LC213:
 	.string	"ftl_read %x %x %x\n"
-.LC203:
+.LC214:
 	.string	"ftl_read refresh =%x, lpa = %x, ppa= %x\n"
-.LC204:
-	.string	"id=%d, lpa = %x, ppa = %x spare = %x %x %x %x\n"
+.LC215:
+	.string	"id=%d, status = %x, lpa = %x, ppa = %x spare = %x %x %x %x\n"
 	.section	.rodata.zftl_sblk_list_init.str1.1,"aMS",@progbits,1
-.LC82:
+.LC84:
 	.string	"free blk vpn error: %x %x\n"
 	.section	.rodata.zftl_write.str1.1,"aMS",@progbits,1
-.LC221:
-	.string	"ftlwrite %x %x %x\n"
+.LC232:
+	.string	"ftlwrite %x %x %x %x\n"
 	.hidden	free

commit 4f11086738999c35edfe5d4d093f6f0ce875dade
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Feb 21 15:18:49 2019 +0800

    Kconfig: disable SYS_MALLOC_CLEAR_ON_INIT for rockchip
    
    It really saves a lot of boot time.
    
    Change-Id: I22b1259c865f91816f54f87fe7b3d893d8c70522
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/Kconfig b/Kconfig
index 03153dd933..082dab44ea 100644
--- a/Kconfig
+++ b/Kconfig
@@ -133,7 +133,7 @@ menuconfig EXPERT
 if EXPERT
 	config SYS_MALLOC_CLEAR_ON_INIT
 	bool "Init with zeros the memory reserved for malloc (slow)"
-	default y
+	default y if !ARCH_ROCKCHIP
 	help
 	  This setting is enabled by default. The reserved malloc
 	  memory is initialized with zeros, so first malloc calls

commit 628c8271948b899f8b016e16d4c310ee40547c5d
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Feb 25 17:13:51 2019 +0800

    usb: rockusb: forbid reading data beyond addr 32MB
    
    Forbid reading data beyong addr 32MB to protect user data & firmware. Excess
    partial is filled with 0xcc. The addr 32MB is quoted from pre-loader.
    
    Change-Id: I96f4fb3bb0d88a309fef20650863011cd9f0dfd9
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/cmd/rockusb.c b/cmd/rockusb.c
index 35d7020db8..4062f368cf 100644
--- a/cmd/rockusb.c
+++ b/cmd/rockusb.c
@@ -24,7 +24,12 @@ static int rkusb_read_sector(struct ums *ums_dev,
 	struct blk_desc *block_dev = &ums_dev->block_dev;
 	lbaint_t blkstart = start + ums_dev->start_sector;
 
-	return blk_dread(block_dev, blkstart, blkcnt, buf);
+	if (blkstart > RKUSB_READ_LIMIT_ADDR) {
+		memset(buf, 0xcc, blkcnt * SECTOR_SIZE);
+		return blkcnt;
+	} else {
+		return blk_dread(block_dev, blkstart, blkcnt, buf);
+	}
 }
 
 static int rkusb_write_sector(struct ums *ums_dev,
diff --git a/include/rockusb.h b/include/rockusb.h
index 48eb9d6152..2eace128cf 100644
--- a/include/rockusb.h
+++ b/include/rockusb.h
@@ -75,6 +75,8 @@ static inline int rkusb_cmd_process(struct fsg_common *common,
 #define RKUSB_CABLE_READY_TIMEOUT	60
 #define SECTOR_SIZE			0x200
 
+#define RKUSB_READ_LIMIT_ADDR	        (32 * 2048)	/* 32MB */
+
 struct rockusb {
 	struct ums *ums;
 	int ums_cnt;

commit b671af0a931aa9f53843c2580d8e18e7496cbd5c
Author: Tony Xu <tony.xu@rock-chips.com>
Date:   Thu Feb 21 19:54:01 2019 +0800

    common: write keybox: fix some non-standard code style
    
    Change-Id: If202eb86ceed4a358939e1f4d6f36c678afee3e9
    Signed-off-by: Tony Xu <tony.xu@rock-chips.com>

diff --git a/common/write_keybox.c b/common/write_keybox.c
index 54f73f0f3e..164d802353 100644
--- a/common/write_keybox.c
+++ b/common/write_keybox.c
@@ -4,15 +4,18 @@
  */
 
 #include <common.h>
-#include <optee_include/OpteeClientApiLib.h>
-#include <optee_include/tee_client_api.h>
-#include <optee_include/tee_api_defines.h>
 #include <boot_rkimg.h>
 #include <stdlib.h>
 #include <attestation_key.h>
-#include "write_keybox.h"
+#include <write_keybox.h>
 #include <keymaster.h>
+#include <optee_include/OpteeClientApiLib.h>
+#include <optee_include/tee_client_api.h>
+#include <optee_include/tee_api_defines.h>
 
+#define STORAGE_CMD_WRITE	6
+#define	SIZE_OF_TAG		4
+#define	SIZE_OF_USB_CMD	8
 #define	BOOT_FROM_EMMC	(1 << 1)
 #define	WIDEVINE_TAG	"KBOX"
 #define	ATTESTATION_TAG	"ATTE"
@@ -23,12 +26,15 @@ uint32_t rk_send_keybox_to_ta(uint8_t *filename, uint32_t filename_size,
 			      uint8_t *key, uint32_t key_size,
 			      uint8_t *data, uint32_t data_size)
 {
+	uint32_t ErrorOrigin;
 	TEEC_Result TeecResult;
 	TEEC_Context TeecContext;
 	TEEC_Session TeecSession;
-	uint32_t ErrorOrigin;
 	TEEC_UUID *TeecUuid = &uuid;
 	TEEC_Operation TeecOperation = {0};
+	TEEC_SharedMemory SharedMem0 = {0};
+	TEEC_SharedMemory SharedMem1 = {0};
+	TEEC_SharedMemory SharedMem2 = {0};
 	struct blk_desc *dev_desc;
 
 	dev_desc = rockchip_get_bootdev();
@@ -37,8 +43,12 @@ uint32_t rk_send_keybox_to_ta(uint8_t *filename, uint32_t filename_size,
 		return -TEEC_ERROR_GENERIC;
 	}
 
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
 						    TEEC_NONE,
 						    TEEC_NONE,
@@ -57,24 +67,28 @@ uint32_t rk_send_keybox_to_ta(uint8_t *filename, uint32_t filename_size,
 				      NULL,
 				      &TeecOperation,
 				      &ErrorOrigin);
-
-	TEEC_SharedMemory SharedMem0 = {0};
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	SharedMem0.size = filename_size;
 	SharedMem0.flags = 0;
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 	memcpy(SharedMem0.buffer, filename, SharedMem0.size);
-	TEEC_SharedMemory SharedMem1 = {0};
 
 	SharedMem1.size = key_size;
 	SharedMem1.flags = 0;
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 	memcpy(SharedMem1.buffer, key, SharedMem1.size);
-	TEEC_SharedMemory SharedMem2 = {0};
 
 	SharedMem2.size = data_size;
 	SharedMem2.flags = 0;
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem2);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 	memcpy(SharedMem2.buffer, data, SharedMem2.size);
 
 	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
@@ -91,7 +105,7 @@ uint32_t rk_send_keybox_to_ta(uint8_t *filename, uint32_t filename_size,
 
 	printf("write keybox to secure storage\n");
 	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					6,
+					STORAGE_CMD_WRITE,
 					&TeecOperation,
 					&ErrorOrigin);
 	if (TeecResult != TEEC_SUCCESS)
@@ -113,21 +127,22 @@ uint32_t write_keybox_to_secure_storage(uint8_t *received_data, uint32_t len)
 {
 	uint32_t key_size;
 	uint32_t data_size;
-	TEEC_Result ret;
 	int rc = 0;
+	TEEC_Result ret;
 
-	if (memcmp(received_data, WIDEVINE_TAG, 4) == 0) {
+	if (memcmp(received_data, WIDEVINE_TAG, SIZE_OF_TAG) == 0) {
 		/* widevine keybox */
 		TEEC_UUID widevine_uuid = { 0x1b484ea5, 0x698b, 0x4142,
 			{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
 
-		key_size = *(received_data + 4);
-		data_size = *(received_data + 8);
+		key_size = *(received_data + SIZE_OF_TAG);
+		data_size = *(received_data + SIZE_OF_TAG + sizeof(key_size));
 
 		ret = rk_send_keybox_to_ta((uint8_t *)"widevine_keybox",
 					   sizeof("widevine_keybox"),
 					   widevine_uuid,
-					   received_data + 12,
+					   received_data + SIZE_OF_TAG +
+					   sizeof(key_size) + sizeof(data_size),
 					   key_size,
 					   received_data + 12 + key_size,
 					   data_size);
@@ -138,7 +153,7 @@ uint32_t write_keybox_to_secure_storage(uint8_t *received_data, uint32_t len)
 			rc = -EIO;
 			printf("write widevine keybox to secure storage fail\n");
 		}
-	} else if (memcmp(received_data, ATTESTATION_TAG, 4) == 0) {
+	} else if (memcmp(received_data, ATTESTATION_TAG, SIZE_OF_TAG) == 0) {
 		/* attestation key */
 		atap_result ret;
 
@@ -150,14 +165,16 @@ uint32_t write_keybox_to_secure_storage(uint8_t *received_data, uint32_t len)
 			rc = -EIO;
 			printf("write attestation key to secure storage fail\n");
 		}
-	} else if (memcmp(received_data, PLAYREADY30_TAG, 4) == 0) {
+	} else if (memcmp(received_data, PLAYREADY30_TAG, SIZE_OF_TAG) == 0) {
 		/* PlayReady SL3000 root key */
 		uint32_t ret;
 
-		data_size = *(received_data + 4);
+		data_size = *(received_data + SIZE_OF_TAG);
 		ret = write_to_keymaster((uint8_t *)"PlayReady_SL3000",
 					 sizeof("PlayReady_SL3000"),
-					 received_data + 8, data_size);
+					 received_data + SIZE_OF_TAG +
+					 sizeof(data_size),
+					 data_size);
 		if (ret == TEEC_SUCCESS) {
 			rc = 0;
 			printf("write PlayReady SL3000 root key to secure storage success\n");
@@ -187,10 +204,10 @@ uint32_t read_raw_data_from_secure_storage(uint8_t *data, uint32_t data_size)
 	uint32_t rc;
 
 	rc = read_from_keymaster((uint8_t *)"raw_data", sizeof("raw_data"),
-				 data, data_size - 8);
+				 data, data_size - SIZE_OF_USB_CMD);
 	if (rc != TEEC_SUCCESS)
 		return 0;
-	rc = data_size - 8;
+	rc = data_size - SIZE_OF_USB_CMD;
 
 	return rc;
 }

commit 269512fdf664a9334e63d8da8a58d2b0323eff68
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Feb 19 09:14:05 2019 +0800

    irq: clean up code
    
    - using IRQ_X() to print message;
    - update some comment;
    - rename some function;
    - add more strict irq sanity;
    
    Change-Id: If5432818d4bc12fc1aa0b8aca6898bbf79dfa9fb
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/irq/irq-generic.c b/drivers/irq/irq-generic.c
index 7fffacff6b..4d9406b278 100644
--- a/drivers/irq/irq-generic.c
+++ b/drivers/irq/irq-generic.c
@@ -21,16 +21,19 @@ static struct irq_desc irqs_desc[PLATFORM_MAX_IRQS_NR];
 static struct irq_chip *gic_irq_chip, *gpio_irq_chip;
 static bool initialized;
 
-static int irq_bad(int irq)
+static int bad_irq(int irq)
 {
 	if (irq >= PLATFORM_MAX_IRQS_NR) {
-		printf("WARN: IRQ %d is out of max supported IRQ %d\n",
-		       irq, PLATFORM_MAX_IRQS_NR);
+		IRQ_W("IRQ %d is out of max supported IRQ(%d)\n",
+		      irq, PLATFORM_MAX_IRQS_NR);
 		return -EINVAL;
 	}
 
+	if (!irqs_desc[irq].handle_irq)
+		return -EINVAL;
+
 	if (!initialized) {
-		printf("WARN: Interrupt framework is not initialized\n");
+		IRQ_W("Interrupt framework is not initialized\n");
 		return -EINVAL;
 	}
 
@@ -38,13 +41,13 @@ static int irq_bad(int irq)
 }
 
 /* general interrupt handler for gpio chip */
-void _generic_gpio_handle_irq(int irq)
+void __generic_gpio_handle_irq(int irq)
 {
-	if (irq_bad(irq))
+	if (bad_irq(irq))
 		return;
 
 	if (irq < PLATFORM_GIC_IRQS_NR) {
-		printf("WRAN: IRQ %d is not a GPIO irq\n", irq);
+		IRQ_W("IRQ %d is not a GPIO irq\n", irq);
 		return;
 	}
 
@@ -52,7 +55,7 @@ void _generic_gpio_handle_irq(int irq)
 		irqs_desc[irq].handle_irq(irq, irqs_desc[irq].data);
 }
 
-void _do_generic_irq_handler(void)
+void __do_generic_irq_handler(void)
 {
 	u32 irq = gic_irq_chip->irq_get();
 
@@ -69,7 +72,7 @@ int irq_is_busy(int irq)
 	return (irq >= 0 && irqs_desc[irq].handle_irq) ? -EBUSY : 0;
 }
 
-static int chip_irq_bad(struct irq_chip *chip)
+static int bad_irq_chip(struct irq_chip *chip)
 {
 	if (!chip->name ||
 	    !chip->irq_init ||
@@ -81,19 +84,19 @@ static int chip_irq_bad(struct irq_chip *chip)
 	return 0;
 }
 
-static int _do_arch_irq_init(void)
+static int __do_arch_irq_init(void)
 {
 	int irq, err = -EINVAL;
 
 	/* After relocation done, bss data initialized */
 	if (!(gd->flags & GD_FLG_RELOC)) {
-		printf("WARN: interrupt should be init after reloc\n");
+		IRQ_W("Interrupt framework should initialize after reloc\n");
 		return -EINVAL;
 	}
 
 	/*
-	 * should set true before arch_gpio_irq_init(), otherwise
-	 *  can't request irqs for gpio banks.
+	 * We set true before arch_gpio_irq_init() to avoid fail when
+	 * request irq for gpio banks.
 	 */
 	initialized = true;
 
@@ -103,26 +106,26 @@ static int _do_arch_irq_init(void)
 	}
 
 	gic_irq_chip = arch_gic_irq_init();
-	if (chip_irq_bad(gic_irq_chip)) {
-		printf("ERROR: bad gic irq chip\n");
+	if (bad_irq_chip(gic_irq_chip)) {
+		IRQ_E("Bad gic irq chip\n");
 		goto out;
 	}
 
 	gpio_irq_chip = arch_gpio_irq_init();
-	if (chip_irq_bad(gpio_irq_chip)) {
-		printf("ERROR: bad gpio irq chip\n");
+	if (bad_irq_chip(gpio_irq_chip)) {
+		IRQ_E("Bad gpio irq chip\n");
 		goto out;
 	}
 
 	err = gic_irq_chip->irq_init();
 	if (err) {
-		printf("ERROR: gic interrupt init failed\n");
+		IRQ_E("GIC interrupt initial failed, ret=%d\n", err);
 		goto out;
 	}
 
 	err = gpio_irq_chip->irq_init();
 	if (err) {
-		printf("ERROR: gpio interrupt init failed\n");
+		IRQ_E("GPIO interrupt initial failed, ret=%d\n", err);
 		goto out;
 	}
 
@@ -136,7 +139,7 @@ out:
 
 int irq_handler_enable(int irq)
 {
-	if (irq_bad(irq))
+	if (bad_irq(irq))
 		return -EINVAL;
 
 	if (irq < PLATFORM_GIC_IRQS_NR)
@@ -147,7 +150,7 @@ int irq_handler_enable(int irq)
 
 int irq_handler_disable(int irq)
 {
-	if (irq_bad(irq))
+	if (bad_irq(irq))
 		return -EINVAL;
 
 	if (irq < PLATFORM_GIC_IRQS_NR)
@@ -158,7 +161,7 @@ int irq_handler_disable(int irq)
 
 int irq_set_irq_type(int irq, unsigned int type)
 {
-	if (irq_bad(irq))
+	if (bad_irq(irq))
 		return -EINVAL;
 
 	if (irq < PLATFORM_GIC_IRQS_NR)
@@ -169,7 +172,7 @@ int irq_set_irq_type(int irq, unsigned int type)
 
 int irq_revert_irq_type(int irq)
 {
-	if (irq_bad(irq))
+	if (bad_irq(irq))
 		return -EINVAL;
 
 	if (irq < PLATFORM_GIC_IRQS_NR)
@@ -180,7 +183,7 @@ int irq_revert_irq_type(int irq)
 
 int irq_get_gpio_level(int irq)
 {
-	if (irq_bad(irq))
+	if (bad_irq(irq))
 		return -EINVAL;
 
 	if (irq < PLATFORM_GIC_IRQS_NR)
@@ -191,9 +194,20 @@ int irq_get_gpio_level(int irq)
 
 void irq_install_handler(int irq, interrupt_handler_t *handler, void *data)
 {
-	if (irq_bad(irq))
+	if (irq >= PLATFORM_MAX_IRQS_NR) {
+		IRQ_W("IRQ %d is out of max supported IRQ(%d)\n",
+		      irq, PLATFORM_MAX_IRQS_NR);
+		return;
+	}
+
+	if (!handler || irqs_desc[irq].handle_irq)
 		return;
 
+	if (!initialized) {
+		IRQ_W("Interrupt framework is not initialized\n");
+		return;
+	}
+
 	irqs_desc[irq].handle_irq = handler;
 	irqs_desc[irq].data = data;
 }
@@ -213,7 +227,7 @@ int irqs_suspend(void)
 
 	err = gic_irq_chip->irq_suspend();
 	if (err) {
-		printf("ERROR: irqs suspend failed\n");
+		IRQ_E("IRQs suspend failed, ret=%d\n", err);
 		return err;
 	}
 
@@ -226,7 +240,7 @@ int irqs_resume(void)
 
 	err = gic_irq_chip->irq_resume();
 	if (err) {
-		printf("ERROR: irqs resume failed\n");
+		IRQ_E("IRQs resume failed, ret=%d\n", err);
 		return err;
 	}
 
@@ -242,7 +256,6 @@ static void cpu_local_irq_enable(void)
 static int cpu_local_irq_disable(void)
 {
 	asm volatile("msr daifset, #0x02");
-
 	return 0;
 }
 
@@ -253,7 +266,7 @@ void do_irq(struct pt_regs *pt_regs, unsigned int esr)
 	show_regs(pt_regs);
 #endif
 
-	_do_generic_irq_handler();
+	__do_generic_irq_handler();
 }
 #else
 static void cpu_local_irq_enable(void)
@@ -287,7 +300,7 @@ void do_irq(struct pt_regs *pt_regs)
 	show_regs(pt_regs);
 #endif
 
-	_do_generic_irq_handler();
+	__do_generic_irq_handler();
 }
 #endif
 
@@ -318,7 +331,7 @@ int arch_interrupt_init(void)
 			     : "r" (cpsr)
 			     : "memory");
 #endif
-	return _do_arch_irq_init();
+	return __do_arch_irq_init();
 }
 
 int interrupt_init(void)
diff --git a/drivers/irq/irq-gic.c b/drivers/irq/irq-gic.c
index 4be2f2c158..dbd515cb0a 100644
--- a/drivers/irq/irq-gic.c
+++ b/drivers/irq/irq-gic.c
@@ -211,10 +211,8 @@ static void gic_irq_eoi(int irq)
 #ifdef CONFIG_GICV2
 	gicc_writel(irq, GICC_EOIR);
 #else
-	asm volatile("msr " __stringify(ICC_EOIR1_EL1) ", %0"
-			: : "r" ((u64)irq));
-	asm volatile("msr " __stringify(ICC_DIR_EL1) ", %0"
-			: : "r" ((u64)irq));
+	asm volatile("msr " __stringify(ICC_EOIR1_EL1) ", %0" : : "r" ((u64)irq));
+	asm volatile("msr " __stringify(ICC_DIR_EL1) ", %0" : : "r" ((u64)irq));
 	isb();
 #endif
 }
diff --git a/drivers/irq/irq-gpio-switch.c b/drivers/irq/irq-gpio-switch.c
index c8bc722d8a..cb228a2f61 100644
--- a/drivers/irq/irq-gpio-switch.c
+++ b/drivers/irq/irq-gpio-switch.c
@@ -45,16 +45,18 @@ static struct gpio_bank gpio_banks[GPIO_BANK_NUM] = {
 
 static int gpio_is_valid(u32 gpio)
 {
-	if ((gpio == EINVAL_GPIO) || !GPIO_BANK_VALID(gpio) ||
+	if ((gpio == EINVAL_GPIO) ||
+	    !GPIO_BANK_VALID(gpio) ||
 	    !GPIO_PIN_VALID(gpio)) {
-		printf("gpio = 0x%x is not valid!\n", gpio);
+		IRQ_E("gpio-%d(bank-%d, pin-%d) is invalid!\n",
+		      gpio, GPIO_BANK(gpio), GPIO_PIN(gpio));
 		return 0;
 	}
 
 	return 1;
 }
 
-static int _hard_gpio_to_irq(u32 gpio)
+static int __hard_gpio_to_irq(u32 gpio)
 {
 	int idx, bank = 0, pin = 0;
 	int irq;
@@ -77,36 +79,36 @@ static int _hard_gpio_to_irq(u32 gpio)
 	return -EINVAL;
 }
 
-static int _phandle_gpio_to_irq(u32 gpio_phandle, u32 offset)
+static int __phandle_gpio_to_irq(u32 gpio_phandle, u32 offset)
 {
 	int irq_gpio, bank, ret = EINVAL_GPIO;
-	bool found;
 	const char *name;
 	char *name_tok;
+	bool found;
 	int node;
 
 	node = fdt_node_offset_by_phandle(gd->fdt_blob, gpio_phandle);
 	if (node < 0) {
-		printf("can't find node by gpio_phandle %d, ret=%d\n",
-		       gpio_phandle, node);
+		IRQ_E("Can't find node by gpio_phandle=%d, ret=%d\n",
+		      gpio_phandle, node);
 		return EINVAL_GPIO;
 	}
 
 	name = fdt_get_name(gd->fdt_blob, node, NULL);
 	if (!name) {
-		printf("can't find device name for the gpio bank\n");
+		IRQ_E("Can't find gpio bank for phandle=%d\n", gpio_phandle);
 		return EINVAL_GPIO;
 	}
 
 	name_tok = strdup(name);
 	if (!name_tok) {
-		printf("Error: strdup in %s failed!\n", __func__);
+		IRQ_E("Strdup '%s' failed!\n", name);
 		return -ENOMEM;
 	}
 
 	name = strtok(name_tok, "@");
 	if (!name) {
-		printf("can't find correct device name for the gpio bank\n");
+		IRQ_E("Can't strtok '@' for '%s'\n", name_tok);
 		goto out;
 	}
 
@@ -118,24 +120,24 @@ static int _phandle_gpio_to_irq(u32 gpio_phandle, u32 offset)
 	}
 
 	if (!found) {
-		printf("irq gpio framework can't find %s\n", name);
+		IRQ_E("GPIO irq framework can't find '%s'\n", name);
 		goto out;
 	}
 
-	debug("%s: gpio%d-%d\n", __func__, bank, offset);
+	IRQ_D("%s: gpio%d-%d\n", __func__, bank, offset);
 	irq_gpio = RK_IRQ_GPIO(bank, offset);
 	if (!gpio_is_valid(irq_gpio))
 		goto out;
 
 	free(name_tok);
-	return _hard_gpio_to_irq(irq_gpio);
+	return __hard_gpio_to_irq(irq_gpio);
 
 out:
 	free(name_tok);
 	return ret;
 }
 
-static int _irq_to_gpio(int irq)
+static int __irq_to_gpio(int irq)
 {
 	int bank, pin, idx;
 
@@ -155,23 +157,23 @@ static int _irq_to_gpio(int irq)
 int gpio_to_irq(struct gpio_desc *gpio)
 {
 	int irq_gpio, bank, ret = EINVAL_GPIO;
-	bool found;
 	char *name, *name_tok;
+	bool found;
 
 	if (!gpio->dev->name) {
-		printf("can't find device name for the gpio bank\n");
+		IRQ_E("Can't find dev name for gpio bank\n");
 		return EINVAL_GPIO;
 	}
 
 	name_tok = strdup(gpio->dev->name);
 	if (!name_tok) {
-		printf("Error: strdup in %s failed!\n", __func__);
+		IRQ_E("Strdup '%s' failed!\n", gpio->dev->name);
 		return -ENOMEM;
 	}
 
 	name = strtok(name_tok, "@");
 	if (!name) {
-		printf("can't find correct device name for the gpio bank\n");
+		IRQ_E("Can't strtok '@' for '%s'\n", name_tok);
 		goto out;
 	}
 
@@ -183,7 +185,7 @@ int gpio_to_irq(struct gpio_desc *gpio)
 	}
 
 	if (!found) {
-		printf("irq gpio framework can't find %s\n", name);
+		IRQ_E("GPIO irq framework can't find '%s'\n", name);
 		goto out;
 	}
 
@@ -192,7 +194,7 @@ int gpio_to_irq(struct gpio_desc *gpio)
 		goto out;
 
 	free(name_tok);
-	return _hard_gpio_to_irq(irq_gpio);
+	return __hard_gpio_to_irq(irq_gpio);
 
 out:
 	free(name_tok);
@@ -204,7 +206,7 @@ int hard_gpio_to_irq(u32 gpio)
 	if (!gpio_is_valid(gpio))
 		return EINVAL_GPIO;
 
-	return _hard_gpio_to_irq(gpio);
+	return __hard_gpio_to_irq(gpio);
 }
 
 int phandle_gpio_to_irq(u32 gpio_phandle, u32 pin)
@@ -212,12 +214,12 @@ int phandle_gpio_to_irq(u32 gpio_phandle, u32 pin)
 	if (gpio_phandle < 0)
 		return EINVAL_GPIO;
 
-	return _phandle_gpio_to_irq(gpio_phandle, pin);
+	return __phandle_gpio_to_irq(gpio_phandle, pin);
 }
 
 int irq_to_gpio(int irq)
 {
-	return _irq_to_gpio(irq);
+	return __irq_to_gpio(irq);
 }
 
 struct gpio_bank *gpio_id_to_bank(u32 id)
diff --git a/drivers/irq/irq-gpio.c b/drivers/irq/irq-gpio.c
index 7a2a22248d..ce88cc8f7b 100644
--- a/drivers/irq/irq-gpio.c
+++ b/drivers/irq/irq-gpio.c
@@ -101,15 +101,15 @@ static void generic_gpio_handle_irq(int irq, void *data __always_unused)
 		gpio_irq_ack(bank->regbase, offset_to_bit(pin));
 
 		/*
-		 * if gpio is edge triggered, clear condition before executing
-		 * the handler so that we don't miss edges
+		 * If gpio is edge triggered, clear condition before executing
+		 * the handler, so that we don't miss next edges trigger.
 		 */
 		if (ilr & (1 << pin)) {
 			unmasked = 1;
 			gpio_irq_unmask(bank->regbase, offset_to_bit(pin));
 		}
 
-		_generic_gpio_handle_irq(gpio_irq + pin);
+		__generic_gpio_handle_irq(gpio_irq + pin);
 
 		isr &= ~(1 << pin);
 
diff --git a/include/irq-generic.h b/include/irq-generic.h
index 62e611b33d..41b8c1223c 100644
--- a/include/irq-generic.h
+++ b/include/irq-generic.h
@@ -11,6 +11,11 @@
 #include <common.h>
 #include <dt-bindings/pinctrl/rockchip.h>
 
+#define IRQ_I(fmt, args...)	printf("IRQ: "fmt, ##args)
+#define IRQ_W(fmt, args...)	printf("IRQ Warn: "fmt, ##args)
+#define IRQ_E(fmt, args...)	printf("IRQ Err: "fmt, ##args)
+#define IRQ_D(fmt, args...)	 debug("IRQ Debug "fmt, ##args)
+
 /*
  * IRQ line status.
  *
@@ -84,10 +89,11 @@ int gpio_to_irq(struct gpio_desc *gpio);
  */
 #define GPIO_BANK_SHIFT			8
 #define RK_IRQ_GPIO(bank, pin) 		(((bank) << GPIO_BANK_SHIFT) | (pin))
+
 int hard_gpio_to_irq(unsigned gpio);
 int phandle_gpio_to_irq(u32 gpio_phandle, u32 pin);
 
-/* only irq-gpio.c can use it */
-void _generic_gpio_handle_irq(int irq);
+/* Only irq-gpio.c can call it */
+void __generic_gpio_handle_irq(int irq);
 
 #endif /* _IRQ_GENERIC_H */

commit ebe3d004b5204f9b59ee847789b50de99cba5bdc
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Feb 13 15:12:41 2019 +0800

    power: charge animation: clean up code
    
    Change-Id: I0d76d7ad28ef3683bbc78f36d4a0f00d5517e2fa
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 1b90421f00..3a0e885689 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -32,7 +32,10 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define IMAGE_SHOW_RESET			-1
+#define IMAGE_RESET_IDX				-1
+#define IMAGE_SOC_100_IDX(n)			((n) - 2)
+#define IMAGE_LOWPOWER_IDX(n)			((n) - 1)
+
 #define FUEL_GAUGE_POLL_MS			1000
 
 #define LED_CHARGING_NAME			"battery_charging"
@@ -143,7 +146,7 @@ static int check_key_press(struct udevice *dev)
 
 	/* Fixup key state for following cases */
 	if (pdata->auto_wakeup_interval) {
-		if  (pdata->auto_wakeup_screen_invert) {
+		if (pdata->auto_wakeup_screen_invert) {
 			if (priv->auto_wakeup_key_state == KEY_PRESS_DOWN) {
 				/* Value is updated in timer interrupt */
 				priv->auto_wakeup_key_state = KEY_PRESS_NONE;
@@ -216,6 +219,7 @@ static int system_suspend_enter(struct charge_animation_pdata *pdata)
 
 	return 0;
 }
+
 static void timer_irq_handler(int irq, void *data)
 {
 	struct udevice *dev = data;
@@ -387,7 +391,7 @@ static int charge_animation_show(struct udevice *dev)
 	ulong show_start = 0, charge_start = 0, debug_start = 0;
 	ulong delta;
 	ulong ms = 0, sec = 0;
-	int start_idx = 0, show_idx = -1, old_show_idx = IMAGE_SHOW_RESET;
+	int start_idx = 0, show_idx = -1, old_show_idx = IMAGE_RESET_IDX;
 	int soc, voltage, current, key_state;
 	int i, charging = 1, ret;
 	int boot_mode;
@@ -496,8 +500,8 @@ static int charge_animation_show(struct udevice *dev)
 
 		/*
 		 * Most fuel gauge is I2C interface, it shouldn't be interrupted
-		 * during tansfer. The power key event depends on interrupt, so
-		 * so we should disable local irq when update fuel gauge.
+		 * during transfer. The power key event depends on interrupt, so
+		 * we should disable local irq when update fuel gauge.
 		 */
 		local_irq_disable();
 
@@ -537,8 +541,8 @@ static int charge_animation_show(struct udevice *dev)
 			printf("get current failed: %d\n", current);
 			continue;
 		}
-		first_poll_fg = 0;
 
+		first_poll_fg = 0;
 		local_irq_enable();
 
 show_images:
@@ -550,7 +554,8 @@ show_images:
 			debug_start = get_timer(0);
 		if (get_timer(debug_start) > 20000) {
 			debug_start = get_timer(0);
-			printf("[%8ld]: soc=%d%%, vol=%dmv, c=%dma, online=%d, screen_on=%d\n",
+			printf("[%8ld]: soc=%d%%, vol=%dmv, c=%dma, "
+			       "online=%d, screen_on=%d\n",
 			       get_timer(0)/1000, soc, voltage,
 			       current, charging, screen_on);
 		}
@@ -570,24 +575,24 @@ show_images:
 
 		/*
 		 * Auto turn on screen when voltage higher than Vol screen on.
-		 * 'ever_lowpower_screen_off' means enter while loop with
+		 * 'ever_lowpower_screen_off' means enter the while(1) loop with
 		 * screen off.
 		 */
 		if ((ever_lowpower_screen_off) &&
 		    (voltage > pdata->screen_on_voltage)) {
 			ever_lowpower_screen_off = false;
 			screen_on = true;
-			show_idx = IMAGE_SHOW_RESET;
+			show_idx = IMAGE_RESET_IDX;
 		}
 
 		/*
-		 * IMAGE_SHOW_RESET means show_idx show be update by start_idx.
+		 * IMAGE_RESET_IDX means show_idx show be update by start_idx.
 		 * When short key pressed event trigged, we will set show_idx
-		 * as IMAGE_SHOW_RESET which updates images index from start_idx
+		 * as IMAGE_RESET_IDX which updates images index from start_idx
 		 * that calculate by current soc.
 		 */
-		if (show_idx == IMAGE_SHOW_RESET) {
-			for (i = 0; i < image_num - 2; i++) {
+		if (show_idx == IMAGE_RESET_IDX) {
+			for (i = 0; i < IMAGE_SOC_100_IDX(image_num); i++) {
 				/* Find out which image we start to show */
 				if ((soc >= image[i].soc) &&
 				    (soc < image[i + 1].soc)) {
@@ -596,7 +601,7 @@ show_images:
 				}
 
 				if (soc >= 100) {
-					start_idx = image_num - 2;
+					start_idx = IMAGE_SOC_100_IDX(image_num);
 					break;
 				}
 			}
@@ -619,7 +624,7 @@ show_images:
 				debug("SHOW: %s\n", image[show_idx].name);
 				charge_show_bmp(image[show_idx].name);
 			}
-			/* Re calculate timeout to off screen */
+			/* Re-calculate timeout to off screen */
 			if (priv->auto_screen_off_timeout == 0)
 				priv->auto_screen_off_timeout = get_timer(0);
 		} else {
@@ -635,8 +640,8 @@ show_images:
 			show_start = get_timer(0);
 			/* Update to next image */
 			show_idx++;
-			if (show_idx > (image_num - 2))
-				show_idx = IMAGE_SHOW_RESET;
+			if (show_idx > IMAGE_SOC_100_IDX(image_num))
+				show_idx = IMAGE_RESET_IDX;
 		}
 
 		debug("step4 (%d)... \n", screen_on);
@@ -649,21 +654,15 @@ show_images:
 		 */
 		key_state = check_key_press(dev);
 		if (key_state == KEY_PRESS_DOWN) {
-			old_show_idx = IMAGE_SHOW_RESET;
-
-			/* NULL means show nothing, ie. turn off screen */
-			if (screen_on)
-				charge_show_bmp(NULL);
-
 			/*
 			 * Clear current image index, and show image
 			 * from start_idx
 			 */
-			show_idx = IMAGE_SHOW_RESET;
+			old_show_idx = IMAGE_RESET_IDX;
+			show_idx = IMAGE_RESET_IDX;
 
 			/*
-			 * We turn off screen by charge_show_bmp(NULL), so we
-			 * should tell while loop to stop show images any more.
+			 *	Reverse the screen state
 			 *
 			 * If screen_on=false, means this short key pressed
 			 * event turn on the screen and we need show images.
@@ -671,12 +670,14 @@ show_images:
 			 * If screen_on=true, means this short key pressed
 			 * event turn off the screen and we never show images.
 			 */
-			if (screen_on)
+			if (screen_on) {
+				charge_show_bmp(NULL); /* Turn off screen */
 				screen_on = false;
-			else
+			} else {
 				screen_on = true;
+			}
 		} else if (key_state == KEY_PRESS_LONG_DOWN) {
-			/* Only long pressed while screen off needs screen_on true */
+			/* Set screen_on=true anyway when key long pressed */
 			if (!screen_on)
 				screen_on = true;
 
@@ -685,7 +686,7 @@ show_images:
 				printf("soc=%d%%, threshold soc=%d%%\n",
 				       soc, pdata->exit_charge_level);
 				printf("Low power, unable to boot, charging...\n");
-				show_idx = image_num - 1;
+				show_idx = IMAGE_LOWPOWER_IDX(image_num);
 				continue;
 			}
 
@@ -693,7 +694,7 @@ show_images:
 				printf("voltage=%dmv, threshold voltage=%dmv\n",
 				       voltage, pdata->exit_charge_voltage);
 				printf("Low power, unable to boot, charging...\n");
-				show_idx = image_num - 1;
+				show_idx = IMAGE_LOWPOWER_IDX(image_num);
 				continue;
 			}
 
@@ -738,11 +739,10 @@ static const struct dm_charge_display_ops charge_animation_ops = {
 static int charge_animation_probe(struct udevice *dev)
 {
 	struct charge_animation_priv *priv = dev_get_priv(dev);
-	struct udevice *fg, *pmic, *rtc;
 	int ret, soc;
 
 	/* Get PMIC: used for power off system  */
-	ret = uclass_get_device(UCLASS_PMIC, 0, &pmic);
+	ret = uclass_get_device(UCLASS_PMIC, 0, &priv->pmic);
 	if (ret) {
 		if (ret == -ENODEV)
 			printf("Can't find PMIC\n");
@@ -750,10 +750,9 @@ static int charge_animation_probe(struct udevice *dev)
 			printf("Get UCLASS PMIC failed: %d\n", ret);
 		return ret;
 	}
-	priv->pmic = pmic;
 
 	/* Get fuel gauge: used for charging */
-	ret = uclass_get_device(UCLASS_FG, 0, &fg);
+	ret = uclass_get_device(UCLASS_FG, 0, &priv->fg);
 	if (ret) {
 		if (ret == -ENODEV)
 			debug("Can't find FG\n");
@@ -761,17 +760,15 @@ static int charge_animation_probe(struct udevice *dev)
 			debug("Get UCLASS FG failed: %d\n", ret);
 		return ret;
 	}
-	priv->fg = fg;
 
 	/* Get rtc: used for power on */
-	ret = uclass_get_device(UCLASS_RTC, 0, &rtc);
+	ret = uclass_get_device(UCLASS_RTC, 0, &priv->rtc);
 	if (ret) {
 		if (ret == -ENODEV)
 			debug("Can't find RTC\n");
 		else
 			debug("Get UCLASS RTC failed: %d\n", ret);
 	}
-	priv->rtc = rtc;
 
 	/* Get PWRKEY: used for wakeup and turn off/on LCD */
 	if (key_read(KEY_POWER) == KEY_NOT_EXIST) {
@@ -780,7 +777,7 @@ static int charge_animation_probe(struct udevice *dev)
 	}
 
 	/* Initialize charge current */
-	soc = fuel_gauge_get_soc(fg);
+	soc = fuel_gauge_get_soc(priv->fg);
 	if (soc < 0 || soc > 100) {
 		debug("get soc failed: %d\n", soc);
 		return -EINVAL;
diff --git a/include/power/charge_animation.h b/include/power/charge_animation.h
index a0a3c1565c..9288718cf7 100644
--- a/include/power/charge_animation.h
+++ b/include/power/charge_animation.h
@@ -8,18 +8,18 @@
 #define _CHARGE_ANIMATION_H_
 
 struct charge_animation_pdata {
-	int android_charge;
-	int uboot_charge;
+	int android_charge;	/* android charge, 1: enable, 0: disable */
+	int uboot_charge;	/* u-boot charge, 1: enable, 0: disable */
 
-	int exit_charge_voltage;
-	int exit_charge_level;
-	int low_power_voltage;
-	int screen_on_voltage;
+	int exit_charge_voltage;/* lowest voltage allowed to exit charging */
+	int exit_charge_level;  /* lowest soc level allowed to exit charging */
+	int low_power_voltage;	/* below this voltage, force system into charge mode anyway */
+	int screen_on_voltage;	/* lowest voltage allowed to turn on screen */
 
-	int system_suspend;
-	int auto_wakeup_interval;
-	int auto_wakeup_screen_invert;
-	int auto_off_screen_interval;
+	int system_suspend;	/* enter ATF system suspend, 1: enable, 0: disable */
+	int auto_wakeup_interval;/* timeout seconds to auto wakeup system */
+	int auto_wakeup_screen_invert;/* auto wakeup system, 1: enable, 0: disable */
+	int auto_off_screen_interval;/* timeout seconds to auto turn off screen */
 };
 
 #endif

commit 1b3009debef44d7904f509dd74d65ffcf15d23e3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Feb 13 16:16:37 2019 +0800

    power: charge animation: add leds support
    
    It supports charging and charging-full leds which
    depends on soc value.
    
    Change-Id: I6b37919c5bedf9b81d388853996cf83c6f75a73a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index eac327c61d..1b90421f00 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -11,6 +11,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <key.h>
+#include <led.h>
 #include <rtc.h>
 #include <pwm.h>
 #include <asm/arch/rockchip_smccc.h>
@@ -34,6 +35,9 @@ DECLARE_GLOBAL_DATA_PTR;
 #define IMAGE_SHOW_RESET			-1
 #define FUEL_GAUGE_POLL_MS			1000
 
+#define LED_CHARGING_NAME			"battery_charging"
+#define LED_CHARGING_FULL_NAME			"battery_full"
+
 struct charge_image {
 	const char *name;
 	int soc;
@@ -44,6 +48,10 @@ struct charge_animation_priv {
 	struct udevice *pmic;
 	struct udevice *fg;
 	struct udevice *rtc;
+#ifdef CONFIG_LED
+	struct udevice *led_charging;
+	struct udevice *led_full;
+#endif
 	const struct charge_image *image;
 	int image_num;
 
@@ -259,6 +267,43 @@ static void charge_show_bmp(const char *name) {}
 static void charge_show_logo(void) {}
 #endif
 
+#ifdef CONFIG_LED
+static int leds_update(struct udevice *dev, int soc)
+{
+	struct charge_animation_priv *priv = dev_get_priv(dev);
+	static int old_soc = -1;
+	int ret, ledst;
+
+	if (old_soc == soc)
+		return 0;
+
+	old_soc = soc;
+	if (priv->led_charging) {
+		ledst = (soc < 100) ? LEDST_ON : LEDST_OFF;
+		ret = led_set_state(priv->led_charging, ledst);
+		if (ret) {
+			printf("set charging led %s failed, ret=%d\n",
+			       (ledst == LEDST_ON) ? "ON" : "OFF", ret);
+			return ret;
+		}
+	}
+
+	if (priv->led_full) {
+		ledst = (soc == 100) ? LEDST_ON : LEDST_OFF;
+		ret = led_set_state(priv->led_full, ledst);
+		if (ret) {
+			printf("set charging full led %s failed, ret=%d\n",
+			       ledst == LEDST_ON ? "ON" : "OFF", ret);
+			return ret;
+		}
+	}
+
+	return 0;
+}
+#else
+static int leds_update(struct udevice *dev, int soc) { return 0; }
+#endif
+
 static int charge_extrem_low_power(struct udevice *dev)
 {
 	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
@@ -267,6 +312,7 @@ static int charge_extrem_low_power(struct udevice *dev)
 	struct udevice *fg = priv->fg;
 	int voltage, soc, charging = 1;
 	static int timer_initialized;
+	int ret;
 
 	voltage = fuel_gauge_get_voltage(fg);
 	if (voltage < 0)
@@ -303,6 +349,11 @@ static int charge_extrem_low_power(struct udevice *dev)
 			continue;
 		}
 
+		/* Update led */
+		ret = leds_update(dev, soc);
+		if (ret)
+			printf("update led failed: %d\n", ret);
+
 		printf("Extrem low power, force charging... threshold=%dmv, now=%dmv\n",
 		       pdata->low_power_voltage, voltage);
 
@@ -504,6 +555,11 @@ show_images:
 			       current, charging, screen_on);
 		}
 
+		/* Update leds */
+		ret = leds_update(dev, soc);
+		if (ret)
+			printf("update led failed: %d\n", ret);
+
 		/*
 		 * If ever lowpower screen off, force screen_on=false, which
 		 * means key event can't modify screen_on, only voltage higher
@@ -730,6 +786,16 @@ static int charge_animation_probe(struct udevice *dev)
 		return -EINVAL;
 	}
 
+	/* Get leds */
+#ifdef CONFIG_LED
+	ret = led_get_by_label(LED_CHARGING_NAME, &priv->led_charging);
+	if (!ret)
+		printf("Found Charging LED\n");
+	ret = led_get_by_label(LED_CHARGING_FULL_NAME, &priv->led_full);
+	if (!ret)
+		printf("Found Charging-Full LED\n");
+#endif
+
 	/* Get charge images */
 	priv->image = image;
 	priv->image_num = ARRAY_SIZE(image);

commit 0023d94b4b4c60ffb8c6c01cac46d5fbeab0b1f9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Feb 21 16:54:05 2019 +0800

    arm: dts: rk3399pro-npu-evb: remove unused node
    
    Change-Id: Ib8ee8e69b6fb92038ad6fb7cd6bf5eac456bb1d6
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3399pro-npu-evb.dts b/arch/arm/dts/rk3399pro-npu-evb.dts
index 939baf5842..752ed00a85 100644
--- a/arch/arm/dts/rk3399pro-npu-evb.dts
+++ b/arch/arm/dts/rk3399pro-npu-evb.dts
@@ -6,7 +6,6 @@
 
 /dts-v1/;
 #include "rk1808.dtsi"
-#include "rk1808-u-boot.dtsi"
 #include <dt-bindings/input/input.h>
 #include <linux/media-bus-format.h>
 
@@ -23,36 +22,26 @@
 		compatible = "ramdisk-readonly";
 		status = "okay";
 	};
+};
 
-	xin24m: xin24m {
-		compatible = "fixed-clock";
-		#clock-cells = <0>;
-		clock-frequency = <24000000>;
-		clock-output-names = "xin24m";
-	};
+&dmc {
+	u-boot,dm-pre-reloc;
 };
 
-&emmc {
-	fifo-mode;
-	bus-width = <8>;
-	cap-mmc-highspeed;
-	supports-emmc;
-	disable-wp;
-	non-removable;
-	num-slots = <1>;
+&cru {
+	u-boot,dm-pre-reloc;
+};
 
-	status = "okay";
+&grf {
+	u-boot,dm-pre-reloc;
 };
 
-&sdmmc {
-	supports-sd;
-	status = "disabled";
+&pmugrf {
+	u-boot,dm-pre-reloc;
 };
 
 &uart2 {
+	u-boot,dm-pre-reloc;
 	clock-frequency = <24000000>;
-	clocks = <&xin24m>, <&xin24m>;
-	clock-names = "baudclk", "apb_pclk";
-
 	status = "okay";
 };

commit b1d40cc9b72c260960a3ab8c9013bc8dec4ea766
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Feb 22 10:53:46 2019 +0800

    configs: rk3399pro-npu: remove unused modules
    
    Change-Id: I4ca66fab70b042e407805061950cc857bc51579a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3399pro-npu_defconfig b/configs/rk3399pro-npu_defconfig
index e0d6fab83e..7b59efdf56 100644
--- a/configs/rk3399pro-npu_defconfig
+++ b/configs/rk3399pro-npu_defconfig
@@ -2,9 +2,9 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK1808=y
+CONFIG_COPROCESSOR_RK1808=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_RKIMG_BOOTLOADER=y
-CONFIG_COPROCESSOR_RK1808=y
 CONFIG_TARGET_EVB_RK1808=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3399pro-npu-evb"
 CONFIG_DEBUG_UART=y
@@ -19,6 +19,7 @@ CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_CONSOLE is not set
 # CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_BOOTI is not set
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
@@ -34,14 +35,12 @@ CONFIG_RANDOM_UUID=y
 # CONFIG_CMD_LOADB is not set
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_BOOT_ANDROID=y
-CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_PART=y
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_NET is not set
+# CONFIG_CMD_NFS is not set
 # CONFIG_CMD_MISC is not set
-# CONFIG_DOS_PARTITION is not set
-# CONFIG_ISO_PARTITION is not set
 CONFIG_RKPARM_PARTITION=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
@@ -53,7 +52,6 @@ CONFIG_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 # CONFIG_MMC is not set
-CONFIG_PHY=y
 CONFIG_PINCTRL=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_RAM=y

commit 73595a322aa5c9532c3202d400520316d42d2ae5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Feb 22 10:53:17 2019 +0800

    rockchip: rk1808: select GICV3 if !COPROCESSOR_RK1808
    
    Change-Id: Id2593e1172e02c8a8aa296efd43bc7e6c1e0d88d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 8cb2a4c10d..11402c8b42 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -358,7 +358,7 @@ config ROCKCHIP_RK1808
 	bool "Support Rockchip RK1808"
 	select ARM64
 	select ARM_SMCCC
-	select GICV3
+	select GICV3 if !COPROCESSOR_RK1808
 	select DEBUG_UART_BOARD_INIT
 	help
 	  The Rockchip RK1808 is a ARM-based Soc which embedded with dual

commit 2549364d441deeb8557bd34754384657a088f6ab
Author: lanshh <lsh@rock-chips.com>
Date:   Thu Feb 21 15:28:16 2019 +0800

    rockchip: board: set macaddr from vendor storage
    
    Change-Id: Ic80a036977fb67fb22892664d9c69ac7a38704de
    Signed-off-by: lanshh <lsh@rock-chips.com>
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 1130dc46a6..2244eaffef 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -50,6 +50,22 @@ DECLARE_GLOBAL_DATA_PTR;
 #define CPUID_LEN       0x10
 #define CPUID_OFF       0x7
 
+static int rockchip_set_ethaddr(void)
+{
+#ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
+	int ret;
+	u8 ethaddr[ARP_HLEN];
+	char buf[ARP_HLEN_ASCII + 1];
+
+	ret = vendor_storage_read(VENDOR_LAN_MAC_ID, ethaddr, sizeof(ethaddr));
+	if (ret > 0 && is_valid_ethaddr(ethaddr)) {
+		sprintf(buf, "%pM", ethaddr);
+		env_set("ethaddr", buf);
+	}
+#endif
+	return 0;
+}
+
 static int rockchip_set_serialno(void)
 {
 	char serialno_str[VENDOR_SN_MAX];
@@ -137,6 +153,7 @@ __weak int set_armclk_rate(void)
 
 int board_late_init(void)
 {
+	rockchip_set_ethaddr();
 	rockchip_set_serialno();
 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0)
 	setup_boot_mode();

commit 8b436ce576efdf257ebd79c2b3ded29790c0aecc
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Feb 5 03:00:55 2019 +0800

    power: charge animation: add rtc alarm check
    
    Under the charging interface,if the rtc alarm is
    triggered, boot on the system.
    
    Change-Id: I6a921bd5c6971c45b02b2be84d9d6d79e9b17a36
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 9d147de49a..eac327c61d 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -11,6 +11,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <key.h>
+#include <rtc.h>
 #include <pwm.h>
 #include <asm/arch/rockchip_smccc.h>
 #include <asm/suspend.h>
@@ -42,6 +43,7 @@ struct charge_image {
 struct charge_animation_priv {
 	struct udevice *pmic;
 	struct udevice *fg;
+	struct udevice *rtc;
 	const struct charge_image *image;
 	int image_num;
 
@@ -112,7 +114,16 @@ static int check_key_press(struct udevice *dev)
 {
 	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
 	struct charge_animation_priv *priv = dev_get_priv(dev);
-	u32 state;
+	u32 state, rtc_state = 0;
+
+#ifdef CONFIG_DM_RTC
+	if (priv->rtc)
+		rtc_state = rtc_alarm_trigger(priv->rtc);
+#endif
+	if (rtc_state) {
+		printf("rtc alarm trigger...\n");
+		return KEY_PRESS_LONG_DOWN;
+	}
 
 	state = key_read(KEY_POWER);
 	if (state < 0)
@@ -671,7 +682,7 @@ static const struct dm_charge_display_ops charge_animation_ops = {
 static int charge_animation_probe(struct udevice *dev)
 {
 	struct charge_animation_priv *priv = dev_get_priv(dev);
-	struct udevice *fg, *pmic;
+	struct udevice *fg, *pmic, *rtc;
 	int ret, soc;
 
 	/* Get PMIC: used for power off system  */
@@ -696,6 +707,16 @@ static int charge_animation_probe(struct udevice *dev)
 	}
 	priv->fg = fg;
 
+	/* Get rtc: used for power on */
+	ret = uclass_get_device(UCLASS_RTC, 0, &rtc);
+	if (ret) {
+		if (ret == -ENODEV)
+			debug("Can't find RTC\n");
+		else
+			debug("Get UCLASS RTC failed: %d\n", ret);
+	}
+	priv->rtc = rtc;
+
 	/* Get PWRKEY: used for wakeup and turn off/on LCD */
 	if (key_read(KEY_POWER) == KEY_NOT_EXIST) {
 		debug("Can't find power key\n");

commit 47bc0dad56f5a93b28a4a644068fb9424cfc5975
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Feb 5 02:59:49 2019 +0800

    rtc: add rk8xx rtc support
    
    support rtc alarm interrupt and alarm trigger power up.
    
    Change-Id: I7752f173d524f579b57b862d2788296ab1486c14
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index d7ae6caa17..02ea363e1a 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -37,6 +37,11 @@ static const struct pmic_child_info power_key_info[] = {
 	{ },
 };
 
+static const struct pmic_child_info rtc_info[] = {
+	{ .prefix = "rtc", .driver = "rk8xx_rtc"},
+	{ },
+};
+
 static const struct pmic_child_info fuel_gauge_info[] = {
 	{ .prefix = "battery", .driver = "rk818_fg"},
 	{ .prefix = "battery", .driver = "rk817_fg"},
@@ -147,6 +152,10 @@ static int rk8xx_bind(struct udevice *dev)
 	if (!children)
 		debug("%s: %s - no child found\n", __func__, dev->name);
 
+	children = pmic_bind_children(dev, dev->node, rtc_info);
+	if (!children)
+		debug("%s: %s - no child found\n", __func__, dev->name);
+
 	children = pmic_bind_children(dev, dev->node, fuel_gauge_info);
 	if (!children)
 		debug("%s: %s - no child found\n", __func__, dev->name);
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index d06130c7a2..81f81e68be 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -30,4 +30,10 @@ config RTC_DS1307
 	  Support for Dallas Semiconductor (now Maxim) DS1307 and DS1338/9 and
 	  compatible Real Time Clock devices.
 
+config RTC_RK8XX
+	bool "Enable RK808/RK818/RK805/816/817 rtc support"
+	depends on DM_RTC && PMIC_RK8XX
+	help
+	  This adds a driver for the RK808/RK818/RK805/816/817 rtc support.
+
 endmenu
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 003e31aeba..c129d90ded 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -45,6 +45,7 @@ obj-$(CONFIG_RTC_PCF8563) += pcf8563.o
 obj-$(CONFIG_RTC_PCF2127) += pcf2127.o
 obj-$(CONFIG_RTC_PL031) += pl031.o
 obj-$(CONFIG_RTC_PT7C4338) += pt7c4338.o
+obj-$(CONFIG_RTC_RK8XX) += rk8xx_rtc.o
 obj-$(CONFIG_RTC_RS5C372A) += rs5c372.o
 obj-$(CONFIG_RTC_RV3029) += rv3029.o
 obj-$(CONFIG_RTC_RX8025) += rx8025.o
diff --git a/drivers/rtc/rk8xx_rtc.c b/drivers/rtc/rk8xx_rtc.c
new file mode 100644
index 0000000000..7d9152a889
--- /dev/null
+++ b/drivers/rtc/rk8xx_rtc.c
@@ -0,0 +1,232 @@
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <power/pmic.h>
+#include <power/rk8xx_pmic.h>
+#include <irq-generic.h>
+#include <asm/arch/periph.h>
+#include <dm/pinctrl.h>
+#include <rtc.h>
+
+#define	RK817_INT_STS_REG0	0xf8
+#define	RK817_INT_MSK_REG0	0xf9
+
+#define	RK816_INT_STS_REG2	0x4c
+#define	RK816_INT_MSK_REG2	0x4d
+
+#define	RK808_INT_STS_REG1	0x4c
+#define	RK808_INT_MSK_REG1	0x4d
+
+#define	RK805_INT_STS_REG	0x4c
+#define	RK805_INT_MSK_REG	0x4d
+
+#define RK808_RTC_CTRL_REG	0x10
+#define RK808_RTC_STATUS_REG	0x11
+#define RK808_RTC_INT_REG	0x12
+
+#define RK817_RTC_CTRL_REG	0x0d
+#define RK817_RTC_STATUS_REG	0x0e
+#define RK817_RTC_INT_REG	0x0f
+
+#define RTC_ALARM_EN		5
+#define RTC_ALARM_STATUS	BIT(6)
+
+struct rk8xx_rtc_priv {
+	u8 rtc_int_sts_reg;
+	u8 rtc_int_msk_reg;
+	u8 int_sts_reg;
+	u8 int_msk_reg;
+	int rtc_alarm_trigger;
+	int irq_is_busy;
+};
+
+static void rtc_irq_handler(int irq, void *data)
+{
+	struct udevice *dev = data;
+	struct rk8xx_rtc_priv *priv = dev_get_priv(dev);
+	int ret, val;
+
+	debug("%s: irq = %d\n", __func__, irq);
+
+	if (priv->rtc_int_sts_reg) {
+		val = pmic_reg_read(dev->parent, priv->rtc_int_sts_reg);
+		if (val < 0) {
+			printf("%s: i2c read reg 0x%x failed, ret=%d\n",
+			       __func__, priv->rtc_int_sts_reg, val);
+			return;
+		}
+
+		if (val & RTC_ALARM_STATUS) {
+			priv->rtc_alarm_trigger = 1;
+			printf("RTC: alarm interrupt\n");
+		}
+
+		ret = pmic_reg_write(dev->parent,
+				     priv->rtc_int_sts_reg, 0xfe);
+		if (ret < 0) {
+			printf("%s: i2c write reg 0x%x failed, ret=%d\n",
+			       __func__, priv->rtc_int_sts_reg, ret);
+			return;
+		}
+	}
+
+	ret = pmic_reg_write(dev->parent,
+			     priv->int_sts_reg, 0xff);
+	if (ret < 0) {
+		printf("%s: i2c write reg 0x%x failed, ret=%d\n",
+		       __func__, priv->int_sts_reg, ret);
+		return;
+	}
+	debug("%s: reg[0x%x] = 0x%x\n", __func__, priv->int_sts_reg,
+	      pmic_reg_read(dev->parent, priv->int_sts_reg));
+}
+
+static int rtc_interrupt_init(struct udevice *dev)
+{
+	struct rk8xx_rtc_priv *priv = dev_get_priv(dev);
+	u32 interrupt[2], phandle;
+	int irq, ret;
+
+	phandle = dev_read_u32_default(dev->parent, "interrupt-parent", -1);
+	if (phandle < 0) {
+		printf("failed get 'interrupt-parent', ret=%d\n", phandle);
+		return phandle;
+	}
+
+	ret = dev_read_u32_array(dev->parent, "interrupts", interrupt, 2);
+	if (ret) {
+		printf("failed get 'interrupt', ret=%d\n", ret);
+		return ret;
+	}
+
+	irq = phandle_gpio_to_irq(phandle, interrupt[0]);
+	if (irq < 0) {
+		if (irq == -EBUSY) {
+			priv->irq_is_busy = 1;
+			return 0;
+		}
+		return irq;
+	}
+	irq_install_handler(irq, rtc_irq_handler, dev);
+	irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);
+	irq_handler_enable(irq);
+
+	return 0;
+}
+
+static int rk8xx_rtc_alarm_trigger(struct udevice *dev)
+{
+	struct rk8xx_rtc_priv *priv = dev_get_priv(dev);
+	int val, ret, alarm_trigger = 0;
+
+	if (priv->irq_is_busy) {
+		val = pmic_reg_read(dev->parent, priv->rtc_int_sts_reg);
+		if (val < 0) {
+			printf("%s: i2c read reg 0x%x failed, ret=%d\n",
+			       __func__, priv->rtc_int_sts_reg, val);
+			return val;
+		}
+		if (val & RTC_ALARM_STATUS) {
+			alarm_trigger = 1;
+			printf("rtc alarm interrupt\n");
+		}
+		ret = pmic_reg_write(dev->parent,
+				     priv->rtc_int_sts_reg, 0xfe);
+		if (ret < 0) {
+			printf("%s: i2c write reg 0x%x failed, ret=%d\n",
+			       __func__, priv->rtc_int_sts_reg, ret);
+			return ret;
+		}
+		return alarm_trigger;
+	} else {
+		return priv->rtc_alarm_trigger;
+	}
+}
+
+static struct rtc_ops rk8xx_rtc_ops = {
+	.alarm_trigger = rk8xx_rtc_alarm_trigger,
+};
+
+static int rk8xx_rtc_probe(struct udevice *dev)
+{
+	struct rk8xx_priv *rk8xx = dev_get_priv(dev->parent);
+	struct rk8xx_rtc_priv *priv = dev_get_priv(dev);
+	int ret, val;
+
+	priv->rtc_int_sts_reg = RK808_RTC_STATUS_REG;
+	priv->rtc_int_msk_reg = RK808_RTC_INT_REG;
+	switch (rk8xx->variant) {
+	case RK808_ID:
+	case RK818_ID:
+		priv->int_msk_reg = RK808_INT_MSK_REG1;
+		priv->int_sts_reg = RK808_INT_STS_REG1;
+		break;
+	case RK805_ID:
+		priv->int_msk_reg = RK805_INT_MSK_REG;
+		priv->int_sts_reg = RK805_INT_STS_REG;
+		break;
+	case RK816_ID:
+		priv->int_msk_reg = RK816_INT_MSK_REG2;
+		priv->int_sts_reg = RK816_INT_STS_REG2;
+		break;
+	case RK809_ID:
+	case RK817_ID:
+		priv->rtc_int_sts_reg = RK817_RTC_STATUS_REG;
+		priv->rtc_int_msk_reg = RK817_RTC_INT_REG;
+		priv->int_msk_reg = RK817_INT_MSK_REG0;
+		priv->int_sts_reg = RK817_INT_STS_REG0;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	priv->rtc_alarm_trigger = 0;
+	priv->irq_is_busy = 0;
+	/* mask and clear interrupt */
+	val = pmic_reg_read(dev->parent, priv->int_msk_reg);
+	if (val < 0) {
+		printf("%s: i2c read reg 0x%x failed, ret=%d\n",
+		       __func__, priv->int_msk_reg, val);
+		return val;
+	}
+	ret = pmic_reg_write(dev->parent,
+			     priv->int_msk_reg, val | 0xc1);
+	if (ret < 0) {
+		printf("%s: i2c write reg 0x%x failed, ret=%d\n",
+		       __func__, priv->int_msk_reg, ret);
+		return ret;
+	}
+	val = pmic_reg_read(dev->parent, priv->int_sts_reg);
+	if (val < 0) {
+		printf("%s: i2c read reg 0x%x failed, ret=%d\n",
+		       __func__, priv->int_sts_reg, val);
+		return val;
+	}
+	ret = pmic_reg_write(dev->parent,
+			     priv->int_sts_reg,
+			     val | (1 << RTC_ALARM_EN));
+	if (ret < 0) {
+		printf("%s: i2c write reg 0x%x failed, ret=%d\n",
+		       __func__, priv->int_sts_reg, ret);
+		return ret;
+	}
+	debug("%s: reg[0x%x] = 0x%x\n", __func__, priv->int_msk_reg,
+	      pmic_reg_read(dev->parent, priv->int_msk_reg));
+	debug("%s: reg[0x%x] = 0x%x\n", __func__, priv->int_sts_reg,
+	      pmic_reg_read(dev->parent, priv->int_sts_reg));
+
+	return rtc_interrupt_init(dev);
+}
+
+U_BOOT_DRIVER(rk8xx_rtc) = {
+	.name   = "rk8xx_rtc",
+	.id     = UCLASS_RTC,
+	.probe  = rk8xx_rtc_probe,
+	.ops	= &rk8xx_rtc_ops,
+	.priv_auto_alloc_size = sizeof(struct rk8xx_rtc_priv),
+};
diff --git a/drivers/rtc/rtc-uclass.c b/drivers/rtc/rtc-uclass.c
index 89312c51ff..38e6b73839 100644
--- a/drivers/rtc/rtc-uclass.c
+++ b/drivers/rtc/rtc-uclass.c
@@ -120,6 +120,16 @@ int rtc_write32(struct udevice *dev, unsigned int reg, u32 value)
 	return 0;
 }
 
+int rtc_alarm_trigger(struct udevice *dev)
+{
+	const struct rtc_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->alarm_trigger)
+		return 0;
+
+	return ops->alarm_trigger(dev);
+}
+
 UCLASS_DRIVER(rtc) = {
 	.name		= "rtc",
 	.id		= UCLASS_RTC,
diff --git a/include/rtc.h b/include/rtc.h
index 49142b6e18..e429c7899f 100644
--- a/include/rtc.h
+++ b/include/rtc.h
@@ -72,6 +72,13 @@ struct rtc_ops {
 	* @return 0 if OK, -ve on error
 	*/
 	int (*write8)(struct udevice *dev, unsigned int reg, int val);
+
+	/**
+	 * alarm_trigger()
+	 * @dev:		Device to write to
+	 * @return 1 if rtc alarm trigger boot on
+	 */
+	int (*alarm_trigger)(struct udevice *dev);
 };
 
 /* Access the operations for an RTC device */
@@ -167,6 +174,13 @@ int rtc_read32(struct udevice *dev, unsigned int reg, u32 *valuep);
  */
 int rtc_write32(struct udevice *dev, unsigned int reg, u32 value);
 
+/**
+ * rtc_alarm_trigger()
+ *
+ * @dev:	Device to write to
+ * @return 1 if rtc alarm trigger boot on
+ */
+int rtc_alarm_trigger(struct udevice *dev);
 #else
 int rtc_get (struct rtc_time *);
 int rtc_set (struct rtc_time *);

commit 8696cc387516eca1bf061458d593868dcc1fc20b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Feb 19 11:10:52 2019 +0800

    irq: add irq busy validation
    
    return -EBUSY when this irq is occupied.
    
    Change-Id: I75ad6c0b13e167762cab2b8f9a2b786e588b2ade
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/irq/irq-generic.c b/drivers/irq/irq-generic.c
index b4362e9d77..7fffacff6b 100644
--- a/drivers/irq/irq-generic.c
+++ b/drivers/irq/irq-generic.c
@@ -64,6 +64,11 @@ void _do_generic_irq_handler(void)
 	gic_irq_chip->irq_eoi(irq);
 }
 
+int irq_is_busy(int irq)
+{
+	return (irq >= 0 && irqs_desc[irq].handle_irq) ? -EBUSY : 0;
+}
+
 static int chip_irq_bad(struct irq_chip *chip)
 {
 	if (!chip->name ||
diff --git a/drivers/irq/irq-gpio-switch.c b/drivers/irq/irq-gpio-switch.c
index c1529ef62d..c8bc722d8a 100644
--- a/drivers/irq/irq-gpio-switch.c
+++ b/drivers/irq/irq-gpio-switch.c
@@ -57,6 +57,7 @@ static int gpio_is_valid(u32 gpio)
 static int _hard_gpio_to_irq(u32 gpio)
 {
 	int idx, bank = 0, pin = 0;
+	int irq;
 
 	if (!gpio_is_valid(gpio))
 		return -EINVAL;
@@ -65,8 +66,12 @@ static int _hard_gpio_to_irq(u32 gpio)
 	pin = (gpio & GPIO_PIN_MASK) >> GPIO_PIN_OFFSET;
 
 	for (idx = 0; idx < ARRAY_SIZE(gpio_banks); idx++) {
-		if (gpio_banks[idx].id == bank)
-			return (gpio_banks[idx].irq_base + pin);
+		if (gpio_banks[idx].id == bank) {
+			irq = (gpio_banks[idx].irq_base + pin);
+			if (irq_is_busy(irq))
+				return -EBUSY;
+			return irq;
+		}
 	}
 
 	return -EINVAL;
diff --git a/include/irq-generic.h b/include/irq-generic.h
index eaa7331686..62e611b33d 100644
--- a/include/irq-generic.h
+++ b/include/irq-generic.h
@@ -69,6 +69,7 @@ int irq_handler_disable(int irq);
 int irq_get_gpio_level(int irq);
 int irqs_suspend(void);
 int irqs_resume(void);
+int irq_is_busy(int irq);
 int gpio_to_irq(struct gpio_desc *gpio);
 
 /*

commit 0a53d515e64d3f82c23f3fc7c84e5f630e1aa7a4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Feb 20 20:14:25 2019 +0800

    lib: initcall: add system total boot time debug
    
    Change-Id: I3d4cd151acf699b25c9caab0452e40fddb6c31e1
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/board_f.c b/common/board_f.c
index 58b72b01e6..888dc367ae 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -702,8 +702,6 @@ static int initf_bootstage(void)
 			IS_ENABLED(CONFIG_BOOTSTAGE_STASH);
 	int ret;
 
-	gd->sys_start_tick = get_ticks();
-
 	ret = bootstage_init(!from_spl);
 	if (ret)
 		return ret;
diff --git a/lib/initcall.c b/lib/initcall.c
index 73c72cf1a5..6a625ad24e 100644
--- a/lib/initcall.c
+++ b/lib/initcall.c
@@ -10,7 +10,9 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define SYS_TICKS_TO_US(ticks)	 ((ticks) / (COUNTER_FREQUENCY / 1000000))
+#define TICKS_TO_US(ticks)	((ticks) / (COUNTER_FREQUENCY / 1000000))
+#define US_TO_MS(ticks)		((ticks) / 1000)
+#define US_TO_US(ticks)		((ticks) % 1000)
 
 #ifdef DEBUG
 static inline void call_get_ticks(ulong *ticks) { *ticks = get_ticks(); }
@@ -21,7 +23,10 @@ static inline void call_get_ticks(ulong *ticks) { }
 int initcall_run_list(const init_fnc_t init_sequence[])
 {
 	const init_fnc_t *init_fnc_ptr;
-	__maybe_unused ulong start = 0, end = 0;
+	ulong start = 0, end = 0, sum = 0;
+
+	if (!gd->sys_start_tick)
+		gd->sys_start_tick = get_ticks();
 
 	for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) {
 		unsigned long reloc_ofs = 0;
@@ -40,8 +45,12 @@ int initcall_run_list(const init_fnc_t init_sequence[])
 		call_get_ticks(&start);
 		ret = (*init_fnc_ptr)();
 		call_get_ticks(&end);
-		if (start != end)
-			debug("\t\t\t\t\t\t\t\t#%6ld us\n", SYS_TICKS_TO_US(end - start));
+
+		if (start != end) {
+			sum = TICKS_TO_US(end - gd->sys_start_tick);
+			debug("\t\t\t\t\t\t\t\t#%8ld us #%4ld.%3ld ms\n",
+			      TICKS_TO_US(end - start), US_TO_MS(sum), US_TO_US(sum));
+		}
 		if (ret) {
 			printf("initcall sequence %p failed at call %p (err=%d)\n",
 			       init_sequence,

commit 79d3f33751d70d2a6a1ad2187d835a332d7a5a53
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Feb 19 15:54:53 2019 +0800

    irq: gic v2/v3: support set target cpu by mpidr dynamiclly
    
    Change-Id: I4a45ad1d81ab9b2e8ae958e6307030200bb405f1
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/irq/irq-gic.c b/drivers/irq/irq-gic.c
index 95491e1b56..4be2f2c158 100644
--- a/drivers/irq/irq-gic.c
+++ b/drivers/irq/irq-gic.c
@@ -4,6 +4,7 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 
+#include <common.h>
 #include <asm/io.h>
 #include <asm/gic.h>
 #include <config.h>
@@ -15,6 +16,9 @@
 #define gicd_writel(v, offset)	writel(v, (void *)GICD_BASE + (offset))
 #define gicc_writel(v, offset)	writel(v, (void *)GICC_BASE + (offset))
 
+/* 64-bit write */
+#define gicd_writeq(v, offset)	writeq(v, (void *)GICD_BASE + (offset))
+
 #define IRQ_REG_X4(irq)		(4 * ((irq) / 4))
 #define IRQ_REG_X16(irq)	(4 * ((irq) / 16))
 #define IRQ_REG_X32(irq)	(4 * ((irq) / 32))
@@ -22,6 +26,14 @@
 #define IRQ_REG_X16_OFFSET(irq)	((irq) % 16)
 #define IRQ_REG_X32_OFFSET(irq)	((irq) % 32)
 
+#define MPIDR_CPU_MASK		0xff
+
+#define IROUTER_IRM_SHIFT	31
+#define IROUTER_IRM_MASK	0x1
+#define gicd_irouter_val_from_mpidr(mpidr, irm)		\
+	((mpidr & ~(0xff << 24)) |			\
+	 (irm & IROUTER_IRM_MASK) << IROUTER_IRM_SHIFT)
+
 typedef enum INT_TRIG {
 	INT_LEVEL_TRIGGER,
 	INT_EDGE_TRIGGER
@@ -45,27 +57,6 @@ struct gic_cpu_data {
 static struct gic_dist_data gicd_save;
 static struct gic_cpu_data gicc_save;
 
-__maybe_unused static u8 g_gic_cpumask = 0x01;
-
-__maybe_unused static u32 gic_get_cpumask(void)
-{
-	u32 mask = 0, i;
-
-	for (i = mask = 0; i < 32; i += 4) {
-		mask = gicd_readl(GICD_ITARGETSRn + 4 * i);
-		mask |= mask >> 16;
-		mask |= mask >> 8;
-		if (mask)
-			break;
-	}
-
-	if (!mask)
-		printf("GIC CPU mask not found.\n");
-
-	debug("GIC CPU mask = 0x%08x\n", mask);
-	return mask;
-}
-
 static inline void int_set_prio_filter(u32 priority)
 {
 	gicc_writel(priority & 0xff, GICC_PMR);
@@ -145,7 +136,7 @@ static int gic_irq_set_trigger(int irq, eINT_TRIG trig)
 static int gic_irq_enable(int irq)
 {
 #ifdef CONFIG_GICV2
-	u32 val;
+	u32 val, cpu_mask;
 	u32 shift = (irq % 4) * 8;
 
 	if (irq >= PLATFORM_GIC_IRQS_NR)
@@ -156,19 +147,24 @@ static int gic_irq_enable(int irq)
 	val |= 1 << IRQ_REG_X32_OFFSET(irq);
 	gicd_writel(val, GICD_ISENABLERn + IRQ_REG_X32(irq));
 
-
 	/* set target */
+	cpu_mask = 1 << (read_mpidr() & MPIDR_CPU_MASK);
 	val = gicd_readl(GICD_ITARGETSRn + IRQ_REG_X4(irq));
 	val &= ~(0xFF << shift);
-	val |= (g_gic_cpumask << shift);
+	val |= (cpu_mask << shift);
 	gicd_writel(val, GICD_ITARGETSRn + IRQ_REG_X4(irq));
-
 #else
 	u32 val;
+	u64 affinity_val;
 
+	/* set enable */
 	val = gicd_readl(GICD_ISENABLERn + IRQ_REG_X32(irq));
 	val |= 1 << IRQ_REG_X32_OFFSET(irq);
 	gicd_writel(val, GICD_ISENABLERn + IRQ_REG_X32(irq));
+
+	/* set itouter(target) */
+	affinity_val = gicd_irouter_val_from_mpidr(read_mpidr(), 0);
+	gicd_writeq(affinity_val, GICD_IROUTERn + (irq << 3));
 #endif
 
 	return 0;
@@ -360,8 +356,6 @@ static int gic_irq_init(void)
 	int_enable_secure_signal();
 	int_enable_nosecure_signal();
 	int_enable_distributor();
-
-	g_gic_cpumask = gic_get_cpumask();
 #endif
 
 	return 0;

commit f2835bc289af9ef3158072e33bf13fa306f16f3a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Feb 19 15:54:13 2019 +0800

    arm: asm: add read_mpidr() for 32-bit ARM
    
    Change-Id: I2556d589802d2290da129e03bb33ec11536119cd
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index e2af2969e0..ac42cf80ca 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -405,6 +405,14 @@ static inline void set_dacr(unsigned int val)
 	isb();
 }
 
+static inline unsigned int read_mpidr(void)
+{
+	unsigned int mpidr;
+
+	asm volatile ("mrc p15, 0, %[mpidr], c0, c0, 5" : [mpidr] "=r" (mpidr));
+	return mpidr;
+}
+
 #ifdef CONFIG_ARMV7_LPAE
 /* Long-Descriptor Translation Table Level 1/2 Bits */
 #define TTB_SECT_XN_MASK	(1ULL << 54)

commit 595f057c4e84a39938ae345246bdfc1b8520debf
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Feb 19 12:58:20 2019 +0800

    lib: Kconfig: set SYS_STACK_SIZE 2MB size
    
    128KB maybe not enough at sometimes.
    
    Change-Id: I06746b98e005955d4b88904c04ed0af753db6acf
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/lib/Kconfig b/lib/Kconfig
index ec9212de0b..0699984837 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -37,7 +37,7 @@ config SYS_HZ
 
 config SYS_STACK_SIZE
 	hex
-	default 0x20000
+	default 0x200000
 	help
 	 The system stack size.
 
@@ -316,5 +316,4 @@ source lib/avb/libavb_atx/Kconfig
 source lib/avb/libavb_user/Kconfig
 source lib/avb/rk_avb_user/Kconfig
 source lib/optee_clientApi/Kconfig
-
 endmenu

commit ba70cc538e6f964b9109152b83125bcd50ef087a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 22 19:23:28 2019 +0800

    rockchip: boot_mode: fix enter recovery mode failed
    
    enter recovery mode when recovery key is pressed but usb is absent.
    
    Change-Id: I4e29d657e6c42f04db1076a2eaed23974e375404
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index daccbcf587..a738bfd79c 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -145,14 +145,18 @@ void rockchip_dnl_mode_check(void)
 			/* If there is no recovery partition, just boot on */
 			struct blk_desc *dev_desc;
 			disk_partition_t part_info;
+			int ret;
 
 			dev_desc = rockchip_get_bootdev();
 			if (!dev_desc) {
 				printf("%s: dev_desc is NULL!\n", __func__);
 				return;
 			}
-			if (part_get_info_by_name(dev_desc, PART_RECOVERY,
-						  &part_info)) {
+
+			ret = part_get_info_by_name(dev_desc,
+						    PART_RECOVERY,
+						    &part_info);
+			if (ret < 0) {
 				debug("%s: no recovery partition\n", __func__);
 				return;
 			}

commit 75d7f9972ba6d2aa0291785471d214c92807cd61
Author: Tony Xu <tony.xu@rock-chips.com>
Date:   Thu Jan 24 15:33:35 2019 +0800

    common: write keybox: write Playready SL3000 root key to secure storage
    
    Change-Id: Ia202f7f81c7c618e7d6fc8ecb28ceb8a65157a1c
    Signed-off-by: Tony Xu <tony.xu@rock-chips.com>

diff --git a/common/write_keybox.c b/common/write_keybox.c
index 91a8b4e736..54f73f0f3e 100644
--- a/common/write_keybox.c
+++ b/common/write_keybox.c
@@ -16,6 +16,7 @@
 #define	BOOT_FROM_EMMC	(1 << 1)
 #define	WIDEVINE_TAG	"KBOX"
 #define	ATTESTATION_TAG	"ATTE"
+#define PLAYREADY30_TAG	"SL30"
 
 uint32_t rk_send_keybox_to_ta(uint8_t *filename, uint32_t filename_size,
 			      TEEC_UUID uuid,
@@ -149,7 +150,23 @@ uint32_t write_keybox_to_secure_storage(uint8_t *received_data, uint32_t len)
 			rc = -EIO;
 			printf("write attestation key to secure storage fail\n");
 		}
+	} else if (memcmp(received_data, PLAYREADY30_TAG, 4) == 0) {
+		/* PlayReady SL3000 root key */
+		uint32_t ret;
+
+		data_size = *(received_data + 4);
+		ret = write_to_keymaster((uint8_t *)"PlayReady_SL3000",
+					 sizeof("PlayReady_SL3000"),
+					 received_data + 8, data_size);
+		if (ret == TEEC_SUCCESS) {
+			rc = 0;
+			printf("write PlayReady SL3000 root key to secure storage success\n");
+		} else {
+			rc = -EIO;
+			printf("write PlayReady SL3000 root key to secure storage fail\n");
+		}
 	}
+
 	/* write all data to secure storage for readback check */
 	if (!rc) {
 		uint32_t ret;

commit b68be486b3f753dfd38b304cdf2f4e8c1b8a4a19
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Feb 25 09:01:35 2019 +0800

    cmd: optee: remove write data to efuse
    
    Preventing customer misoperation causing efuse unused.
    
    Change-Id: Ie0fc3e5d73fb005d73beb0c035580ca13b9b3ba1
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/cmd/mmc.c b/cmd/mmc.c
index a853d97e4d..f802f6b9e1 100644
--- a/cmd/mmc.c
+++ b/cmd/mmc.c
@@ -168,20 +168,8 @@ static int do_mmc_test_secure_storage(cmd_tbl_t *cmdtp,
 static int do_mmc_testefuse(cmd_tbl_t *cmdtp,
 		int flag, int argc, char * const argv[])
 {
-	uint32_t buf32[8];
 	uint32_t outbuf32[8];
 
-	buf32[0] = 0x01020304;
-	buf32[1] = 0x05060708;
-	buf32[2] = 0x090a0b0c;
-	buf32[3] = 0x0d0e0f10;
-	buf32[4] = 0x11121314;
-	buf32[5] = 0x15161718;
-	buf32[6] = 0x191a1b1c;
-	buf32[7] = 0x1d1e1f20;
-
-	trusty_write_attribute_hash(buf32, 8);
-
 	trusty_read_attribute_hash(outbuf32, 8);
 
 	printf(" 0x%x  0x%x  0x%x  0x%x \n",

commit af5a20123463b447fd35ae438828df990208d9c3
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Feb 12 15:29:38 2019 +0800

    usb: gadget: rockusb: test IF_TYPE_SD when read capacity
    
    Since the sd card is similar to mmc device.
    
    Change-Id: Ifb21a58f96f806388f5e2bb50b607678fce0d97b
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index f85b5b75f8..39e0a30c3a 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -467,7 +467,7 @@ static int rkusb_do_read_capacity(struct fsg_common *common,
 	 * bit[5:63}: Reserved.
 	 */
 	memset((void *)&buf[0], 0, len);
-	if (type == IF_TYPE_MMC)
+	if (type == IF_TYPE_MMC || type == IF_TYPE_SD)
 		buf[0] = BIT(0) | BIT(2) | BIT(4);
 	else
 		buf[0] = BIT(0) | BIT(4);

commit 8a127f59e0ceb1970f6cad34b85439fce4094dd6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Jan 26 12:02:06 2019 +0800

    common: rkimg: skip ramdisk and fdt relocation
    
    It saves boot time and make final load address is where we expect.
    
    Change-Id: I1e7c3bba48c9b318e7016bf15acf0a3bc8047cb3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index acd27024f1..0d48232e3e 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -425,6 +425,25 @@ fallback:
 	return boot_mode;
 }
 
+static void fdt_ramdisk_skip_relocation(void)
+{
+	char *ramdisk_high = env_get("initrd_high");
+	char *fdt_high = env_get("fdt_high");
+
+	if (!fdt_high) {
+		env_set_hex("fdt_high", -1UL);
+		printf("Fdt ");
+	}
+
+	if (!ramdisk_high) {
+		env_set_hex("initrd_high", -1UL);
+		printf("Ramdisk ");
+	}
+
+	if (!fdt_high || !ramdisk_high)
+		printf("skip relocation\n");
+}
+
 int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 {
 	ulong fdt_addr_r = env_get_ulong("fdt_addr_r", 16, 0);
@@ -485,6 +504,7 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 	printf("kernel   @ 0x%08lx (0x%08x)\n", kernel_addr_r, kernel_size);
 	printf("ramdisk  @ 0x%08lx (0x%08x)\n", ramdisk_addr_r, ramdisk_size);
 
+	fdt_ramdisk_skip_relocation();
 	sysmem_dump_check();
 
 #if defined(CONFIG_ARM64)

commit cf0aae68390104bafe919ec6f2d5c344119e0937
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Tue Feb 19 08:46:14 2019 +0800

    video/drm: rk618_lvds: Add support for MEDIA_BUS_FMT_RGB666_1X7X3_JEIDA bus format
    
    Change-Id: I12480932e3f5fa6ea1dc4684be697989eff304fc
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rk618_lvds.c b/drivers/video/drm/rk618_lvds.c
index ad1e35979d..4584147325 100644
--- a/drivers/video/drm/rk618_lvds.c
+++ b/drivers/video/drm/rk618_lvds.c
@@ -44,17 +44,18 @@ static void rk618_lvds_bridge_enable(struct rockchip_bridge *bridge)
 	rk618_frc_dclk_invert(priv->parent);
 
 	switch (panel->bus_format) {
-	case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:	/* jeida-18 */
+	case MEDIA_BUS_FMT_RGB666_1X7X3_JEIDA:	/* jeida-18 */
 		format = LVDS_6BIT_MODE;
 		break;
 	case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:	/* jeida-24 */
 		format = LVDS_8BIT_MODE_FORMAT_2;
 		break;
-	case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:	/* vesa-24 */
-		format = LVDS_8BIT_MODE_FORMAT_1;
+	case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:	/* vesa-18 */
+		format = LVDS_8BIT_MODE_FORMAT_3;
 		break;
+	case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:	/* vesa-24 */
 	default:
-		format = LVDS_8BIT_MODE_FORMAT_3;
+		format = LVDS_8BIT_MODE_FORMAT_1;
 		break;
 	}
 

commit 9c5e1148eced9edc91e5226bbc26f715f2e4add6
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Feb 18 17:38:44 2019 +0800

    video/drm: vop: Add support lvds bus format
    
    Change-Id: I9674d3478d279f0e0fd47529f96d336c4027cd13
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index 8113a4e395..c46b705cc9 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -339,6 +339,8 @@ static int rockchip_vop_init(struct display_state *state)
 		break;
 	case MEDIA_BUS_FMT_RGB666_1X18:
 	case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
+	case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
+	case MEDIA_BUS_FMT_RGB666_1X7X3_JEIDA:
 		val = DITHER_DOWN_EN(1) | DITHER_DOWN_MODE(RGB888_TO_RGB666);
 		break;
 	case MEDIA_BUS_FMT_YUV8_1X24:
@@ -350,6 +352,8 @@ static int rockchip_vop_init(struct display_state *state)
 		val = DITHER_DOWN_EN(0) | PRE_DITHER_DOWN_EN(0);
 		break;
 	case MEDIA_BUS_FMT_RGB888_1X24:
+	case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
+	case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
 	default:
 		val = DITHER_DOWN_EN(0) | PRE_DITHER_DOWN_EN(0);
 		break;

commit 4888f8a48ab3553e384a7696c98b863ca15bbad6
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Feb 18 17:27:46 2019 +0800

    video/drm: lvds: Add support for MEDIA_BUS_FMT_RGB666_1X7X3_JEIDA bus format
    
    Change-Id: Id8b17e482036ce7c8eb543a673eb1b745958c7c3
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index a29bf0a7f7..698a017158 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -100,12 +100,15 @@ static int rockchip_lvds_connector_init(struct display_state *state)
 	lvds->phy = conn_state->phy;
 
 	switch (panel->bus_format) {
-	case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:	/* jeida-18 */
+	case MEDIA_BUS_FMT_RGB666_1X7X3_JEIDA:	/* jeida-18 */
 		lvds->format = LVDS_6BIT_MODE;
 		break;
 	case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:	/* jeida-24 */
 		lvds->format = LVDS_8BIT_MODE_FORMAT_2;
 		break;
+	case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:	/* vesa-18 */
+		lvds->format = LVDS_8BIT_MODE_FORMAT_3;
+		break;
 	case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:	/* vesa-24 */
 	default:
 		lvds->format = LVDS_8BIT_MODE_FORMAT_1;

commit cfb50d9acf53f8d5c833d9da69d239789c5ecdb6
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Feb 18 17:23:26 2019 +0800

    media: Add MEDIA_BUS_FMT_RGB666_1X7X3_JEIDA media bus code definitions
    
    This patch adds a new RGB media bus formats that describe
    18-bit samples transferred over an LVDS bus with three
    differential data pairs, serialized into 7 time slots,
    using standard JEIDA data ordering.
    
    Change-Id: I54b674aa8b067452007de076010dbd6a3c7f4a52
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/include/linux/media-bus-format.h b/include/linux/media-bus-format.h
index 37ca603fe2..56265cf85b 100644
--- a/include/linux/media-bus-format.h
+++ b/include/linux/media-bus-format.h
@@ -34,7 +34,7 @@
 
 #define MEDIA_BUS_FMT_FIXED			0x0001
 
-/* RGB - next is	0x1018 */
+/* RGB - next is	0x101c */
 #define MEDIA_BUS_FMT_RGB444_1X12		0x1016
 #define MEDIA_BUS_FMT_RGB444_2X8_PADHI_BE	0x1001
 #define MEDIA_BUS_FMT_RGB444_2X8_PADHI_LE	0x1002
@@ -61,6 +61,7 @@
 #define MEDIA_BUS_FMT_RGB101010_1X30		0x1018
 #define MEDIA_BUS_FMT_RGB121212_1X36		0x1019
 #define MEDIA_BUS_FMT_RGB161616_1X48		0x101a
+#define MEDIA_BUS_FMT_RGB666_1X7X3_JEIDA	0x101b
 
 /* YUV (including grey) - next is	0x2026 */
 #define MEDIA_BUS_FMT_Y8_1X8			0x2001

commit 31018a86a8e54592f3733266e8e85df9ae7240db
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Feb 18 17:07:11 2019 +0800

    video/drm: lvds: Correct P2S_EN register field on px30
    
    Change-Id: I464df20abe7a3fb1d1fb5f275a9c79a672008a96
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index 4e81a3549d..a29bf0a7f7 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -27,7 +27,7 @@
 #define PX30_LVDS_SELECT(x)		HIWORD_UPDATE(x, 14, 13)
 #define PX30_LVDS_MODE_EN(x)		HIWORD_UPDATE(x, 12, 12)
 #define PX30_LVDS_MSBSEL(x)		HIWORD_UPDATE(x, 11, 11)
-#define PX30_LVDS_P2S_EN(x)		HIWORD_UPDATE(x, 10, 10)
+#define PX30_LVDS_P2S_EN(x)		HIWORD_UPDATE(x,  6,  6)
 #define PX30_LVDS_VOP_SEL(x)		HIWORD_UPDATE(x,  1,  1)
 
 #define RK3126_GRF_LVDS_CON0		0x0150

commit e7c5611148b57eb7f5d11a361e3c6230303d7359
Author: Shunqing Chen <csq@rock-chips.com>
Date:   Fri Feb 15 15:27:19 2019 +0800

    power: fuel gauge: fix rk818/rk816 gpio_desc null pointer issue
    
    Change-Id: I2289eed51eadb0b7b11e9c81d6154f27f138c97f
    Signed-off-by: Shunqing Chen <csq@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk816.c b/drivers/power/fuel_gauge/fg_rk816.c
index 64b10f3cdd..0f0798ca92 100644
--- a/drivers/power/fuel_gauge/fg_rk816.c
+++ b/drivers/power/fuel_gauge/fg_rk816.c
@@ -153,7 +153,7 @@ struct battery_priv {
 	int		dts_cur_input;
 	int		dts_cur_sel;
 	int		max_soc_offset;
-	struct gpio_desc *dc_det;
+	struct gpio_desc dc_det;
 	int		dc_type;
 	int		dc_det_adc;
 	ulong		vol_mode_base;
@@ -946,7 +946,7 @@ static int rk816_bat_get_dc_state(struct battery_priv *di)
 		*/
 		return NO_CHARGER;
 	} else {
-		return (dm_gpio_get_value(di->dc_det)) ?
+		return (dm_gpio_get_value(&di->dc_det)) ?
 			DC_CHARGER : NO_CHARGER;
 	}
 }
@@ -1423,7 +1423,7 @@ static int rk816_fg_ofdata_to_platdata(struct udevice *dev)
 	di->dc_det_adc = dev_read_u32_default(dev, "dc_det_adc", 0);
 	if (di->dc_det_adc <= 0) {
 		if (!gpio_request_by_name_nodev(dev_ofnode(dev), "dc_det_gpio",
-						0, di->dc_det, GPIOD_IS_IN)) {
+						0, &di->dc_det, GPIOD_IS_IN)) {
 			di->dc_type = DC_TYPE_OF_GPIO;
 		} else {
 			di->dc_type = DC_TYPE_OF_NONE;
diff --git a/drivers/power/fuel_gauge/fg_rk818.c b/drivers/power/fuel_gauge/fg_rk818.c
index b45388020a..d77a5341fb 100644
--- a/drivers/power/fuel_gauge/fg_rk818.c
+++ b/drivers/power/fuel_gauge/fg_rk818.c
@@ -203,7 +203,7 @@ struct battery_priv {
 	int		max_soc_offset;
 	int		sample_res;
 	int		res_div;
-	struct gpio_desc *dc_det;
+	struct gpio_desc dc_det;
 	int		dc_det_adc;
 	ulong		finish_chrg_base;
 	ulong		term_sig_base;
@@ -1232,7 +1232,7 @@ static int rk818_bat_get_dc_state(struct battery_priv *di)
 	if (!di->dc_is_valid)
 		return NO_CHARGER;
 
-	return dm_gpio_get_value(di->dc_det) ? DC_CHARGER : NO_CHARGER;
+	return dm_gpio_get_value(&di->dc_det) ? DC_CHARGER : NO_CHARGER;
 }
 
 static int rk818_bat_get_charger_type(struct battery_priv *di)
@@ -1821,7 +1821,7 @@ static int rk818_fg_ofdata_to_platdata(struct udevice *dev)
 				SAMPLE_RES_DIV1 : SAMPLE_RES_DIV2;
 
 	ret = gpio_request_by_name_nodev(dev_ofnode(dev), "dc_det_gpio",
-					 0, di->dc_det, GPIOD_IS_IN);
+					 0, &di->dc_det, GPIOD_IS_IN);
 	if (!ret) {
 		di->dc_is_valid = 1;
 		debug("DC is valid\n");

commit 2c9d117912719dca97b8973eeed469b5fa5dce1a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 29 21:22:38 2019 +0800

    sysmem: fdt: reserve more CONFIG_SYS_FDT_PAD size for fdt
    
    Sometimes, framework or user would call fdt_increase_size() to update
    fdt size, it's better reserve more space to avoid sysmem gives the fdt
    region overflow report.
    
    The CONFIG_SYS_FDT_PAD default value is sync with bootm framework
    in: common/image-fdt.c
    
    Change-Id: I363e9a4182e13b1628a76666acd8272d25db659d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 20d3c61c36..477aae70b2 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -648,7 +648,7 @@ int rockchip_read_dtb_file(void *fdt_addr)
 		return size;
 
 	if (!sysmem_alloc_base("fdt", (phys_addr_t)fdt_addr,
-			       ALIGN(size, RK_BLK_SIZE)))
+			       ALIGN(size, RK_BLK_SIZE) + CONFIG_SYS_FDT_PAD))
 		return -ENOMEM;
 
 	ret = rockchip_read_resource_file((void *)fdt_addr, dtb_name, 0, 0);
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index feec2fda13..af912f98de 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -811,9 +811,10 @@ int android_fdt_overlay_apply(void *fdt_addr)
 				fdt_totalsize((void *)fdt_dtbo);
 		if (sysmem_free((phys_addr_t)fdt_addr))
 			goto out;
+
 		if (!sysmem_alloc_base("fdt(dtbo)",
 				       (phys_addr_t)fdt_addr,
-					fdt_size))
+					fdt_size + CONFIG_SYS_FDT_PAD))
 			goto out;
 		fdt_increase_size(fdt_addr, fdt_totalsize((void *)fdt_dtbo));
 		ret = fdt_overlay_apply(fdt_addr, (void *)fdt_dtbo);
diff --git a/common/image-android.c b/common/image-android.c
index e980f7eb6d..f37123efaa 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -349,7 +349,8 @@ static int android_image_load_separate(struct blk_desc *dev_desc,
 		blk_cnt = DIV_ROUND_UP(hdr->second_size, dev_desc->blksz);
 		if (!sysmem_alloc_base("fdt(AOSP)",
 				       fdt_addr_r,
-				       blk_cnt * dev_desc->blksz))
+				       blk_cnt * dev_desc->blksz +
+				       CONFIG_SYS_FDT_PAD))
 			return -ENXIO;
 
 		ret = blk_dread(dev_desc, blk_start, blk_cnt, (void *)fdt_addr_r);
diff --git a/include/sysmem.h b/include/sysmem.h
index 308b8e2653..58de824968 100644
--- a/include/sysmem.h
+++ b/include/sysmem.h
@@ -13,6 +13,14 @@
 #undef	MAX_LMB_REGIONS
 #define	MAX_LMB_REGIONS			MAX_SYSMEM_REGIONS
 
+/*
+ * CONFIG_SYS_FDT_PAD default value is sync with bootm framework in:
+ * common/image-fdt.c
+ */
+#ifndef CONFIG_SYS_FDT_PAD
+#define CONFIG_SYS_FDT_PAD		0x3000
+#endif
+
 struct sysmem_property {
 	const char *name;
 	phys_addr_t base;
diff --git a/lib/sysmem.c b/lib/sysmem.c
index f44b78ca61..24bd4f91c9 100644
--- a/lib/sysmem.c
+++ b/lib/sysmem.c
@@ -373,7 +373,7 @@ int sysmem_free(phys_addr_t base)
 
 	ret = lmb_free(&sysmem->lmb, prop->base, prop->size);
 	if (ret >= 0) {
-		SYSMEM_I("Free: \"%s\", paddr=0x%lx, size=0x%lx\n",
+		SYSMEM_D("Free: \"%s\", paddr=0x%lx, size=0x%lx\n",
 			 prop->name, (ulong)prop->base, (ulong)prop->size);
 		sysmem->allocated_cnt--;
 		list_del(&prop->node);

commit d01ceddd38f3aecff8122c3fc4a88847c0bf12c7
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Thu Oct 18 16:46:08 2018 +0800

    configs: rk3328_defconfig: enable avb
    
    Change-Id: I1eb26f5f643e6ce5898e17a6a18ca6c37579e7c1
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index dbc6b370a7..998e53f9f9 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -22,6 +22,7 @@ CONFIG_BOOTDELAY=0
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_ANDROID_AVB=y
 CONFIG_TPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_ATF=y
@@ -120,4 +121,11 @@ CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
 # CONFIG_EFI_LOADER is not set
+CONFIG_AVB_LIBAVB=y
+CONFIG_AVB_LIBAVB_AB=y
+CONFIG_AVB_LIBAVB_ATX=y
+CONFIG_AVB_LIBAVB_USER=y
+CONFIG_RK_AVB_LIBAVB_USER=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V1=y
 CONFIG_TEST_ROCKCHIP=y

commit 039b194e004ee0a427d9abe022ecb2c796eb21c8
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Feb 18 12:53:57 2019 +0800

    rockchip: dts: rv1108: add nandc node
    
    Change-Id: I1256b84cc40fc2836d301027b1c1ef25aa537ec4
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/dts/rv1108.dtsi b/arch/arm/dts/rv1108.dtsi
index 5331c9a9ee..349e72a987 100644
--- a/arch/arm/dts/rv1108.dtsi
+++ b/arch/arm/dts/rv1108.dtsi
@@ -268,6 +268,16 @@
 		reg = <0x202a0000 0x1000>;
 	};
 
+	nandc: nandc@30100000 {
+		compatible = "rockchip,rk-nandc";
+		reg = <0x30100000 0x1000>;
+		interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
+		nandc_id = <0>;
+		clocks = <&cru SCLK_NANDC>, <&cru HCLK_NANDC>;
+		clock-names = "clk_nandc", "hclk_nandc";
+		status = "disabled";
+	};
+
 	emmc: dwmmc@30110000 {
 		compatible = "rockchip,rv1108-dw-mshc", "rockchip,rk3288-dw-mshc";
 		clock-freq-min-max = <400000 150000000>;

commit e72a66c380254d5fbc029605e6d597fe2d86f286
Author: Leo Wen <leo.wen@rock-chips.com>
Date:   Wed Feb 13 15:08:14 2019 +0800

    configs: evb-rk3326: disable CONFIG_FASTBOOT_OEM_UNLOCK
    
    Change-Id: I509a19819fa687cdc87148181865595380900aaa
    Signed-off-by: Leo Wen <leo.wen@rock-chips.com>

diff --git a/configs/evb-rk3326_defconfig b/configs/evb-rk3326_defconfig
index 7f0192c2bb..e9a9db9e24 100644
--- a/configs/evb-rk3326_defconfig
+++ b/configs/evb-rk3326_defconfig
@@ -29,7 +29,6 @@ CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
-CONFIG_FASTBOOT_OEM_UNLOCK=y
 # CONFIG_CMD_BOOTD is not set
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set

commit db7863d082b058e1e569beaafc0ed6fa3fadb400
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Feb 15 14:50:22 2019 +0800

    video/drm: lvds: Remove unused file
    
    Change-Id: If7398e132de477079a366e0b1df82b83856e9b05
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_lvds.h b/drivers/video/drm/rockchip_lvds.h
deleted file mode 100644
index 2d56410478..0000000000
--- a/drivers/video/drm/rockchip_lvds.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/*
- * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef _ROCKCHIP_LVDS_H_
-#define _ROCKCHIP_LVDS_H_
-
-#define LVDS_24BIT				(0 << 1)
-#define LVDS_18BIT				(1 << 1)
-#define LVDS_FORMAT_VESA			(0 << 0)
-#define LVDS_FORMAT_JEIDA			(1 << 0)
-
-#define DISPLAY_OUTPUT_LVDS		1
-#define DISPLAY_OUTPUT_DUAL_LVDS	2
-
-#endif

commit deebadb707945dabc9fd1bcb59e8723f3765177c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 16 14:33:57 2019 +0800

    cmd: fastboot: print mode state
    
    This avoids user misunderstanding the system is hang
    when enter fastboot mode without any warning message.
    
    Change-Id: Ie6238c825342c8e322b2a5be746e4bba020e1ec9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/cmd/fastboot.c b/cmd/fastboot.c
index ce5ac1e55b..67aa7b8d7b 100644
--- a/cmd/fastboot.c
+++ b/cmd/fastboot.c
@@ -25,6 +25,8 @@ static int do_fastboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 	if (argc < 2)
 		return CMD_RET_USAGE;
 
+	printf("Enter fastboot...");
+
 	if (!strcmp(argv[1], "udp")) {
 #ifndef CONFIG_UDP_FUNCTION_FASTBOOT
 		pr_err("Fastboot UDP not enabled\n");
@@ -41,6 +43,7 @@ static int do_fastboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 	pr_err("Fastboot USB not enabled\n");
 	return -1;
 #else
+
 	usb_controller = argv[2];
 	controller_index = simple_strtoul(usb_controller, NULL, 0);
 
@@ -62,6 +65,8 @@ static int do_fastboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 		goto exit;
 	}
 
+	printf("OK\n");
+
 	while (1) {
 		if (g_dnl_detach())
 			break;

commit 3befe43d907ef2b615f68ddeb032ba74e0375df1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Feb 14 16:50:12 2019 +0800

    lib: sysmem: ignore sysmem reserve warning
    
    Change-Id: I970da1456388f825a351dc26d725bb3ba10d41a4
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/lib/sysmem.c b/lib/sysmem.c
index 705ba34771..f44b78ca61 100644
--- a/lib/sysmem.c
+++ b/lib/sysmem.c
@@ -218,7 +218,7 @@ int sysmem_reserve(const char *name, phys_addr_t base, phys_size_t size)
 			SYSMEM_E("Failed to double reserve for existence \"%s\"\n", name);
 			return -EEXIST;
 		} else if (sysmem_is_overlap(prop->base, prop->size, base, size)) {
-			SYSMEM_W("\"%s\" (base=0x%08lx, size=0x%lx) reserve is "
+			SYSMEM_D("\"%s\" (base=0x%08lx, size=0x%lx) reserve is "
 				 "overlap with existence \"%s\" (base=0x%08lx, size=0x%lx)\n",
 				 name, (ulong)base, (ulong)size, prop->name,
 				 (ulong)prop->base, (ulong)prop->size);

commit 1485a1b3384e1b38fd019ee6216e39218af6c6e6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Feb 18 11:49:10 2019 +0800

    common: boot rkimg: print boot mode
    
    Change-Id: I75ddae437315a148871756ef88ff03cdca0c301d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index d6326ae933..acd27024f1 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -352,8 +352,10 @@ int rockchip_get_boot_mode(void)
 	 * USB attach will do env_set("reboot_mode", "recovery");
 	 */
 	env_reboot_mode = env_get("reboot_mode");
-	if (env_reboot_mode && !strcmp(env_reboot_mode, "recovery"))
+	if (env_reboot_mode && !strcmp(env_reboot_mode, "recovery")) {
 		boot_mode = BOOT_MODE_RECOVERY;
+		printf("boot mode: recovery\n");
+	}
 
 	if (boot_mode != -1)
 		return boot_mode;
@@ -383,6 +385,7 @@ fallback:
 	/* Mode from misc partition */
 	if (bmsg && !strcmp(bmsg->command, "boot-recovery")) {
 		boot_mode = BOOT_MODE_RECOVERY;
+		printf("boot mode: recovery\n");
 	} else {
 		/* Mode from boot mode register */
 		reg_boot_mode = readl((void *)CONFIG_ROCKCHIP_BOOT_MODE_REG);

commit 4faa6c1a351356fc6229b2c2cef9f572a73110e8
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Feb 15 11:09:48 2019 +0800

    rockchip: px3se: extend SYS_MALLOC_F_LEN to 0x1000
    
    Change-Id: I5f57a15d50ac685dccfae462cfc9fbc30c07fe34
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-px3se_defconfig b/configs/evb-px3se_defconfig
index 43e453a914..f122ef935a 100644
--- a/configs/evb-px3se_defconfig
+++ b/configs/evb-px3se_defconfig
@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0x1000
 CONFIG_ROCKCHIP_RK3128=y
 CONFIG_ROCKCHIP_PX3SE=y
 CONFIG_RKIMG_BOOTLOADER=y

commit 1953e619473876f2a3732065877a2599a0b6e3b6
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Thu Jan 31 10:07:23 2019 +0800

    video/drm: Sync MIPI DSI Bus helper from Linux 4.9
    
    This imports drivers/gpu/drm/drm_mipi_dsi.c from Linux kernel 4.9.
    It can be very helpful when porting Linux mipi dsi driver to U-Boot.
    
    DSI hosts expose operations which can be used by DSI peripheral drivers
    to access associated devices.
    
    Change-Id: Iccfa9d946f33458867f4d4db0ce04aeb1918e855
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/Kconfig b/drivers/video/drm/Kconfig
index 56a0ce3177..d2f5f0f998 100644
--- a/drivers/video/drm/Kconfig
+++ b/drivers/video/drm/Kconfig
@@ -13,7 +13,8 @@ menuconfig DRM_ROCKCHIP
 
 config DRM_ROCKCHIP_PANEL
 	bool "Rockchip Panel Support"
-	select DRM_ROCKCHIP_MIPI_DSI
+	depends on DRM_ROCKCHIP
+	select DRM_MIPI_DSI
 
 config DRM_ROCKCHIP_DW_HDMI
 	bool "Rockchip specific extensions for Synopsys DW HDMI"
@@ -52,13 +53,14 @@ config DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY
 	  Enable this to support the Rockchip MIPI/LVDS/TTL PHY
 	  with Innosilicon IP block.
 
-config DRM_ROCKCHIP_MIPI_DSI
+config DRM_MIPI_DSI
 	bool
+	depends on DRM_ROCKCHIP
 
 config DRM_ROCKCHIP_DW_MIPI_DSI
 	tristate "Rockchip specific extensions for Synopsys DW MIPI DSI"
 	depends on DRM_ROCKCHIP
-	select DRM_ROCKCHIP_MIPI_DSI
+	select DRM_MIPI_DSI
 	select DRM_ROCKCHIP_PANEL
 	help
 	 This selects support for Rockchip SoC specific extensions
diff --git a/drivers/video/drm/Makefile b/drivers/video/drm/Makefile
index 1cb4c53d03..46ae58c942 100644
--- a/drivers/video/drm/Makefile
+++ b/drivers/video/drm/Makefile
@@ -7,7 +7,7 @@
 obj-y += rockchip_display.o rockchip_crtc.o rockchip_phy.o rockchip_bridge.o \
 		rockchip_vop.o rockchip_vop_reg.o bmp_helper.o
 
-obj-$(CONFIG_DRM_ROCKCHIP_MIPI_DSI)	+= rockchip_mipi_dsi.o
+obj-$(CONFIG_DRM_MIPI_DSI) += drm_mipi_dsi.o
 obj-$(CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI) += dw_mipi_dsi.o
 obj-$(CONFIG_DRM_ROCKCHIP_DW_HDMI) += rockchip_dw_hdmi.o dw_hdmi.o
 obj-$(CONFIG_ROCKCHIP_INNO_HDMI_PHY) += rockchip-inno-hdmi-phy.o
diff --git a/drivers/video/drm/drm_mipi_dsi.c b/drivers/video/drm/drm_mipi_dsi.c
new file mode 100644
index 0000000000..106f9f37c0
--- /dev/null
+++ b/drivers/video/drm/drm_mipi_dsi.c
@@ -0,0 +1,744 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * MIPI DSI Bus
+ *
+ * Copyright (C) 2012-2013, Samsung Electronics, Co., Ltd.
+ * Andrzej Hajda <a.hajda@samsung.com>
+ */
+
+#include <drm/drm_mipi_dsi.h>
+
+#include <config.h>
+#include <common.h>
+#include <errno.h>
+#include <malloc.h>
+
+/**
+ * mipi_dsi_attach - attach a DSI device to its DSI host
+ * @dsi: DSI peripheral
+ */
+int mipi_dsi_attach(struct mipi_dsi_device *dsi)
+{
+	const struct mipi_dsi_host_ops *ops = dsi->host->ops;
+
+	if (!ops || !ops->attach)
+		return -ENOSYS;
+
+	return ops->attach(dsi->host, dsi);
+}
+
+/**
+ * mipi_dsi_detach - detach a DSI device from its DSI host
+ * @dsi: DSI peripheral
+ */
+int mipi_dsi_detach(struct mipi_dsi_device *dsi)
+{
+	const struct mipi_dsi_host_ops *ops = dsi->host->ops;
+
+	if (!ops || !ops->detach)
+		return -ENOSYS;
+
+	return ops->detach(dsi->host, dsi);
+}
+
+static ssize_t mipi_dsi_device_transfer(struct mipi_dsi_device *dsi,
+					struct mipi_dsi_msg *msg)
+{
+	const struct mipi_dsi_host_ops *ops = dsi->host->ops;
+
+	if (!ops || !ops->transfer)
+		return -ENOSYS;
+
+	if (dsi->mode_flags & MIPI_DSI_MODE_LPM)
+		msg->flags |= MIPI_DSI_MSG_USE_LPM;
+
+	return ops->transfer(dsi->host, msg);
+}
+
+/**
+ * mipi_dsi_packet_format_is_short - check if a packet is of the short format
+ * @type: MIPI DSI data type of the packet
+ *
+ * Return: true if the packet for the given data type is a short packet, false
+ * otherwise.
+ */
+bool mipi_dsi_packet_format_is_short(u8 type)
+{
+	switch (type) {
+	case MIPI_DSI_V_SYNC_START:
+	case MIPI_DSI_V_SYNC_END:
+	case MIPI_DSI_H_SYNC_START:
+	case MIPI_DSI_H_SYNC_END:
+	case MIPI_DSI_END_OF_TRANSMISSION:
+	case MIPI_DSI_COLOR_MODE_OFF:
+	case MIPI_DSI_COLOR_MODE_ON:
+	case MIPI_DSI_SHUTDOWN_PERIPHERAL:
+	case MIPI_DSI_TURN_ON_PERIPHERAL:
+	case MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM:
+	case MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM:
+	case MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM:
+	case MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM:
+	case MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM:
+	case MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM:
+	case MIPI_DSI_DCS_SHORT_WRITE:
+	case MIPI_DSI_DCS_SHORT_WRITE_PARAM:
+	case MIPI_DSI_DCS_READ:
+	case MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE:
+		return true;
+	}
+
+	return false;
+}
+
+/**
+ * mipi_dsi_packet_format_is_long - check if a packet is of the long format
+ * @type: MIPI DSI data type of the packet
+ *
+ * Return: true if the packet for the given data type is a long packet, false
+ * otherwise.
+ */
+bool mipi_dsi_packet_format_is_long(u8 type)
+{
+	switch (type) {
+	case MIPI_DSI_NULL_PACKET:
+	case MIPI_DSI_BLANKING_PACKET:
+	case MIPI_DSI_GENERIC_LONG_WRITE:
+	case MIPI_DSI_DCS_LONG_WRITE:
+	case MIPI_DSI_LOOSELY_PACKED_PIXEL_STREAM_YCBCR20:
+	case MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR24:
+	case MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16:
+	case MIPI_DSI_PACKED_PIXEL_STREAM_30:
+	case MIPI_DSI_PACKED_PIXEL_STREAM_36:
+	case MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR12:
+	case MIPI_DSI_PACKED_PIXEL_STREAM_16:
+	case MIPI_DSI_PACKED_PIXEL_STREAM_18:
+	case MIPI_DSI_PIXEL_STREAM_3BYTE_18:
+	case MIPI_DSI_PACKED_PIXEL_STREAM_24:
+		return true;
+	}
+
+	return false;
+}
+
+/**
+ * mipi_dsi_create_packet - create a packet from a message according to the
+ *	DSI protocol
+ * @packet: pointer to a DSI packet structure
+ * @msg: message to translate into a packet
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int mipi_dsi_create_packet(struct mipi_dsi_packet *packet,
+			   const struct mipi_dsi_msg *msg)
+{
+	if (!packet || !msg)
+		return -EINVAL;
+
+	/* do some minimum sanity checking */
+	if (!mipi_dsi_packet_format_is_short(msg->type) &&
+	    !mipi_dsi_packet_format_is_long(msg->type))
+		return -EINVAL;
+
+	if (msg->channel > 3)
+		return -EINVAL;
+
+	memset(packet, 0, sizeof(*packet));
+	packet->header[0] = ((msg->channel & 0x3) << 6) | (msg->type & 0x3f);
+	if (mipi_dsi_packet_format_is_long(msg->type)) {
+		packet->header[1] = (msg->tx_len >> 0) & 0xff;
+		packet->header[2] = (msg->tx_len >> 8) & 0xff;
+
+		packet->payload_length = msg->tx_len;
+		packet->payload = msg->tx_buf;
+	} else {
+		const u8 *tx = msg->tx_buf;
+
+		packet->header[1] = (msg->tx_len > 0) ? tx[0] : 0;
+		packet->header[2] = (msg->tx_len > 1) ? tx[1] : 0;
+	}
+
+	packet->size = sizeof(packet->header) + packet->payload_length;
+
+	return 0;
+}
+
+/**
+ * mipi_dsi_shutdown_peripheral() - sends a Shutdown Peripheral command
+ * @dsi: DSI peripheral device
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int mipi_dsi_shutdown_peripheral(struct mipi_dsi_device *dsi)
+{
+	struct mipi_dsi_msg msg = {
+		.channel = dsi->channel,
+		.type = MIPI_DSI_SHUTDOWN_PERIPHERAL,
+		.tx_buf = (u8 [2]) { 0, 0 },
+		.tx_len = 2,
+	};
+	int ret = mipi_dsi_device_transfer(dsi, &msg);
+
+	return (ret < 0) ? ret : 0;
+}
+
+/**
+ * mipi_dsi_turn_on_peripheral() - sends a Turn On Peripheral command
+ * @dsi: DSI peripheral device
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int mipi_dsi_turn_on_peripheral(struct mipi_dsi_device *dsi)
+{
+	struct mipi_dsi_msg msg = {
+		.channel = dsi->channel,
+		.type = MIPI_DSI_TURN_ON_PERIPHERAL,
+		.tx_buf = (u8 [2]) { 0, 0 },
+		.tx_len = 2,
+	};
+	int ret = mipi_dsi_device_transfer(dsi, &msg);
+
+	return (ret < 0) ? ret : 0;
+}
+
+/*
+ * mipi_dsi_set_maximum_return_packet_size() - specify the maximum size of the
+ *	the payload in a long packet transmitted from the peripheral back to the
+ *	host processor
+ * @dsi: DSI peripheral device
+ * @value: the maximum size of the payload
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int mipi_dsi_set_maximum_return_packet_size(struct mipi_dsi_device *dsi,
+					    u16 value)
+{
+	u8 tx[2] = { value & 0xff, value >> 8 };
+	struct mipi_dsi_msg msg = {
+		.channel = dsi->channel,
+		.type = MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE,
+		.tx_len = sizeof(tx),
+		.tx_buf = tx,
+	};
+	int ret = mipi_dsi_device_transfer(dsi, &msg);
+
+	return (ret < 0) ? ret : 0;
+}
+
+/**
+ * mipi_dsi_generic_write() - transmit data using a generic write packet
+ * @dsi: DSI peripheral device
+ * @payload: buffer containing the payload
+ * @size: size of payload buffer
+ *
+ * This function will automatically choose the right data type depending on
+ * the payload length.
+ *
+ * Return: The number of bytes transmitted on success or a negative error code
+ * on failure.
+ */
+ssize_t mipi_dsi_generic_write(struct mipi_dsi_device *dsi, const void *payload,
+			       size_t size)
+{
+	struct mipi_dsi_msg msg = {
+		.channel = dsi->channel,
+		.tx_buf = payload,
+		.tx_len = size
+	};
+
+	switch (size) {
+	case 0:
+		msg.type = MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM;
+		break;
+	case 1:
+		msg.type = MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM;
+		break;
+	case 2:
+		msg.type = MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM;
+		break;
+	default:
+		msg.type = MIPI_DSI_GENERIC_LONG_WRITE;
+		break;
+	}
+
+	return mipi_dsi_device_transfer(dsi, &msg);
+}
+
+/**
+ * mipi_dsi_generic_read() - receive data using a generic read packet
+ * @dsi: DSI peripheral device
+ * @params: buffer containing the request parameters
+ * @num_params: number of request parameters
+ * @data: buffer in which to return the received data
+ * @size: size of receive buffer
+ *
+ * This function will automatically choose the right data type depending on
+ * the number of parameters passed in.
+ *
+ * Return: The number of bytes successfully read or a negative error code on
+ * failure.
+ */
+ssize_t mipi_dsi_generic_read(struct mipi_dsi_device *dsi, const void *params,
+			      size_t num_params, void *data, size_t size)
+{
+	struct mipi_dsi_msg msg = {
+		.channel = dsi->channel,
+		.tx_len = num_params,
+		.tx_buf = params,
+		.rx_len = size,
+		.rx_buf = data
+	};
+
+	switch (num_params) {
+	case 0:
+		msg.type = MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM;
+		break;
+
+	case 1:
+		msg.type = MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM;
+		break;
+
+	case 2:
+		msg.type = MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM;
+		break;
+
+	default:
+		return -EINVAL;
+	}
+
+	return mipi_dsi_device_transfer(dsi, &msg);
+}
+
+/**
+ * mipi_dsi_dcs_write_buffer() - transmit a DCS command with payload
+ * @dsi: DSI peripheral device
+ * @data: buffer containing data to be transmitted
+ * @len: size of transmission buffer
+ *
+ * This function will automatically choose the right data type depending on
+ * the command payload length.
+ *
+ * Return: The number of bytes successfully transmitted or a negative error
+ * code on failure.
+ */
+ssize_t mipi_dsi_dcs_write_buffer(struct mipi_dsi_device *dsi,
+				  const void *data, size_t len)
+{
+	struct mipi_dsi_msg msg = {
+		.channel = dsi->channel,
+		.tx_buf = data,
+		.tx_len = len
+	};
+
+	switch (len) {
+	case 0:
+		return -EINVAL;
+
+	case 1:
+		msg.type = MIPI_DSI_DCS_SHORT_WRITE;
+		break;
+
+	case 2:
+		msg.type = MIPI_DSI_DCS_SHORT_WRITE_PARAM;
+		break;
+
+	default:
+		msg.type = MIPI_DSI_DCS_LONG_WRITE;
+		break;
+	}
+
+	return mipi_dsi_device_transfer(dsi, &msg);
+}
+
+/**
+ * mipi_dsi_dcs_write() - send DCS write command
+ * @dsi: DSI peripheral device
+ * @cmd: DCS command
+ * @data: buffer containing the command payload
+ * @len: command payload length
+ *
+ * This function will automatically choose the right data type depending on
+ * the command payload length.
+ *
+ * Return: The number of bytes successfully transmitted or a negative error
+ * code on failure.
+ */
+ssize_t mipi_dsi_dcs_write(struct mipi_dsi_device *dsi, u8 cmd,
+			   const void *data, size_t len)
+{
+	ssize_t err;
+	size_t size;
+	u8 *tx;
+
+	if (len > 0) {
+		size = 1 + len;
+
+		tx = malloc(size);
+		if (!tx)
+			return -ENOMEM;
+
+		/* concatenate the DCS command byte and the payload */
+		tx[0] = cmd;
+		memcpy(&tx[1], data, len);
+	} else {
+		tx = &cmd;
+		size = 1;
+	}
+
+	err = mipi_dsi_dcs_write_buffer(dsi, tx, size);
+
+	if (len > 0)
+		free(tx);
+
+	return err;
+}
+
+/**
+ * mipi_dsi_dcs_read() - send DCS read request command
+ * @dsi: DSI peripheral device
+ * @cmd: DCS command
+ * @data: buffer in which to receive data
+ * @len: size of receive buffer
+ * Return: The number of bytes read or a negative error code on failure.
+ */
+ssize_t mipi_dsi_dcs_read(struct mipi_dsi_device *dsi, u8 cmd, void *data,
+			  size_t len)
+{
+	struct mipi_dsi_msg msg = {
+		.channel = dsi->channel,
+		.type = MIPI_DSI_DCS_READ,
+		.tx_buf = &cmd,
+		.tx_len = 1,
+		.rx_buf = data,
+		.rx_len = len
+	};
+
+	return mipi_dsi_device_transfer(dsi, &msg);
+}
+
+/**
+ * mipi_dsi_dcs_nop() - send DCS nop packet
+ * @dsi: DSI peripheral device
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int mipi_dsi_dcs_nop(struct mipi_dsi_device *dsi)
+{
+	ssize_t err;
+
+	err = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, NULL, 0);
+	if (err < 0)
+		return err;
+
+	return 0;
+}
+
+/**
+ * mipi_dsi_dcs_soft_reset() - perform a software reset of the display module
+ * @dsi: DSI peripheral device
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int mipi_dsi_dcs_soft_reset(struct mipi_dsi_device *dsi)
+{
+	ssize_t err;
+
+	err = mipi_dsi_dcs_write(dsi, MIPI_DCS_SOFT_RESET, NULL, 0);
+	if (err < 0)
+		return err;
+
+	return 0;
+}
+
+/**
+ * mipi_dsi_dcs_get_power_mode() - query the display module's current power
+ *	mode
+ * @dsi: DSI peripheral device
+ * @mode: return location for the current power mode
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int mipi_dsi_dcs_get_power_mode(struct mipi_dsi_device *dsi, u8 *mode)
+{
+	ssize_t err;
+
+	err = mipi_dsi_dcs_read(dsi, MIPI_DCS_GET_POWER_MODE, mode,
+				sizeof(*mode));
+	if (err <= 0) {
+		if (err == 0)
+			err = -ENODATA;
+
+		return err;
+	}
+
+	return 0;
+}
+
+/**
+ * mipi_dsi_dcs_get_pixel_format() - gets the pixel format for the RGB image
+ *	data used by the interface
+ * @dsi: DSI peripheral device
+ * @format: return location for the pixel format
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int mipi_dsi_dcs_get_pixel_format(struct mipi_dsi_device *dsi, u8 *format)
+{
+	ssize_t err;
+
+	err = mipi_dsi_dcs_read(dsi, MIPI_DCS_GET_PIXEL_FORMAT, format,
+				sizeof(*format));
+	if (err <= 0) {
+		if (err == 0)
+			err = -ENODATA;
+
+		return err;
+	}
+
+	return 0;
+}
+
+/**
+ * mipi_dsi_dcs_enter_sleep_mode() - disable all unnecessary blocks inside the
+ *	display module except interface communication
+ * @dsi: DSI peripheral device
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int mipi_dsi_dcs_enter_sleep_mode(struct mipi_dsi_device *dsi)
+{
+	ssize_t err;
+
+	err = mipi_dsi_dcs_write(dsi, MIPI_DCS_ENTER_SLEEP_MODE, NULL, 0);
+	if (err < 0)
+		return err;
+
+	return 0;
+}
+
+/**
+ * mipi_dsi_dcs_exit_sleep_mode() - enable all blocks inside the display
+ *	module
+ * @dsi: DSI peripheral device
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int mipi_dsi_dcs_exit_sleep_mode(struct mipi_dsi_device *dsi)
+{
+	ssize_t err;
+
+	err = mipi_dsi_dcs_write(dsi, MIPI_DCS_EXIT_SLEEP_MODE, NULL, 0);
+	if (err < 0)
+		return err;
+
+	return 0;
+}
+
+/**
+ * mipi_dsi_dcs_set_display_off() - stop displaying the image data on the
+ *	display device
+ * @dsi: DSI peripheral device
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int mipi_dsi_dcs_set_display_off(struct mipi_dsi_device *dsi)
+{
+	ssize_t err;
+
+	err = mipi_dsi_dcs_write(dsi, MIPI_DCS_SET_DISPLAY_OFF, NULL, 0);
+	if (err < 0)
+		return err;
+
+	return 0;
+}
+
+/**
+ * mipi_dsi_dcs_set_display_on() - start displaying the image data on the
+ *	display device
+ * @dsi: DSI peripheral device
+ *
+ * Return: 0 on success or a negative error code on failure
+ */
+int mipi_dsi_dcs_set_display_on(struct mipi_dsi_device *dsi)
+{
+	ssize_t err;
+
+	err = mipi_dsi_dcs_write(dsi, MIPI_DCS_SET_DISPLAY_ON, NULL, 0);
+	if (err < 0)
+		return err;
+
+	return 0;
+}
+
+/**
+ * mipi_dsi_dcs_set_column_address() - define the column extent of the frame
+ *	memory accessed by the host processor
+ * @dsi: DSI peripheral device
+ * @start: first column of frame memory
+ * @end: last column of frame memory
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int mipi_dsi_dcs_set_column_address(struct mipi_dsi_device *dsi, u16 start,
+				    u16 end)
+{
+	u8 payload[4] = { start >> 8, start & 0xff, end >> 8, end & 0xff };
+	ssize_t err;
+
+	err = mipi_dsi_dcs_write(dsi, MIPI_DCS_SET_COLUMN_ADDRESS, payload,
+				 sizeof(payload));
+	if (err < 0)
+		return err;
+
+	return 0;
+}
+
+/**
+ * mipi_dsi_dcs_set_page_address() - define the page extent of the frame
+ *	memory accessed by the host processor
+ * @dsi: DSI peripheral device
+ * @start: first page of frame memory
+ * @end: last page of frame memory
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int mipi_dsi_dcs_set_page_address(struct mipi_dsi_device *dsi, u16 start,
+				  u16 end)
+{
+	u8 payload[4] = { start >> 8, start & 0xff, end >> 8, end & 0xff };
+	ssize_t err;
+
+	err = mipi_dsi_dcs_write(dsi, MIPI_DCS_SET_PAGE_ADDRESS, payload,
+				 sizeof(payload));
+	if (err < 0)
+		return err;
+
+	return 0;
+}
+
+/**
+ * mipi_dsi_dcs_set_tear_off() - turn off the display module's Tearing Effect
+ *	output signal on the TE signal line
+ * @dsi: DSI peripheral device
+ *
+ * Return: 0 on success or a negative error code on failure
+ */
+int mipi_dsi_dcs_set_tear_off(struct mipi_dsi_device *dsi)
+{
+	ssize_t err;
+
+	err = mipi_dsi_dcs_write(dsi, MIPI_DCS_SET_TEAR_OFF, NULL, 0);
+	if (err < 0)
+		return err;
+
+	return 0;
+}
+
+/**
+ * mipi_dsi_dcs_set_tear_on() - turn on the display module's Tearing Effect
+ *	output signal on the TE signal line.
+ * @dsi: DSI peripheral device
+ * @mode: the Tearing Effect Output Line mode
+ *
+ * Return: 0 on success or a negative error code on failure
+ */
+int mipi_dsi_dcs_set_tear_on(struct mipi_dsi_device *dsi,
+			     enum mipi_dsi_dcs_tear_mode mode)
+{
+	u8 value = mode;
+	ssize_t err;
+
+	err = mipi_dsi_dcs_write(dsi, MIPI_DCS_SET_TEAR_ON, &value,
+				 sizeof(value));
+	if (err < 0)
+		return err;
+
+	return 0;
+}
+
+/**
+ * mipi_dsi_dcs_set_pixel_format() - sets the pixel format for the RGB image
+ *	data used by the interface
+ * @dsi: DSI peripheral device
+ * @format: pixel format
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int mipi_dsi_dcs_set_pixel_format(struct mipi_dsi_device *dsi, u8 format)
+{
+	ssize_t err;
+
+	err = mipi_dsi_dcs_write(dsi, MIPI_DCS_SET_PIXEL_FORMAT, &format,
+				 sizeof(format));
+	if (err < 0)
+		return err;
+
+	return 0;
+}
+
+/**
+ * mipi_dsi_dcs_set_tear_scanline() - set the scanline to use as trigger for
+ *	the Tearing Effect output signal of the display module
+ * @dsi: DSI peripheral device
+ * @scanline: scanline to use as trigger
+ *
+ * Return: 0 on success or a negative error code on failure
+ */
+int mipi_dsi_dcs_set_tear_scanline(struct mipi_dsi_device *dsi, u16 scanline)
+{
+	u8 payload[3] = { MIPI_DCS_SET_TEAR_SCANLINE, scanline >> 8,
+				scanline & 0xff };
+	ssize_t err;
+
+	err = mipi_dsi_generic_write(dsi, payload, sizeof(payload));
+	if (err < 0)
+		return err;
+
+	return 0;
+}
+
+/**
+ * mipi_dsi_dcs_set_display_brightness() - sets the brightness value of the
+ *	display
+ * @dsi: DSI peripheral device
+ * @brightness: brightness value
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int mipi_dsi_dcs_set_display_brightness(struct mipi_dsi_device *dsi,
+					u16 brightness)
+{
+	u8 payload[2] = { brightness & 0xff, brightness >> 8 };
+	ssize_t err;
+
+	err = mipi_dsi_dcs_write(dsi, MIPI_DCS_SET_DISPLAY_BRIGHTNESS,
+				 payload, sizeof(payload));
+	if (err < 0)
+		return err;
+
+	return 0;
+}
+
+/**
+ * mipi_dsi_dcs_get_display_brightness() - gets the current brightness value
+ *	of the display
+ * @dsi: DSI peripheral device
+ * @brightness: brightness value
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int mipi_dsi_dcs_get_display_brightness(struct mipi_dsi_device *dsi,
+					u16 *brightness)
+{
+	ssize_t err;
+
+	err = mipi_dsi_dcs_read(dsi, MIPI_DCS_GET_DISPLAY_BRIGHTNESS,
+				brightness, sizeof(*brightness));
+	if (err <= 0) {
+		if (err == 0)
+			err = -ENODATA;
+
+		return err;
+	}
+
+	return 0;
+}
diff --git a/drivers/video/drm/dw_mipi_dsi.c b/drivers/video/drm/dw_mipi_dsi.c
index ed831ed371..263bb7ac44 100644
--- a/drivers/video/drm/dw_mipi_dsi.c
+++ b/drivers/video/drm/dw_mipi_dsi.c
@@ -4,6 +4,8 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
+#include <drm/drm_mipi_dsi.h>
+
 #include <config.h>
 #include <common.h>
 #include <errno.h>
@@ -15,13 +17,15 @@
 #include <dm/of_access.h>
 #include <syscon.h>
 #include <asm/arch-rockchip/clock.h>
+#include <linux/iopoll.h>
 
 #include "rockchip_display.h"
 #include "rockchip_crtc.h"
 #include "rockchip_connector.h"
 #include "rockchip_panel.h"
 #include "rockchip_phy.h"
-#include "rockchip_mipi_dsi.h"
+
+#define UPDATE(v, h, l)		(((v) << (l)) & GENMASK((h), (l)))
 
 #define DSI_VERSION			0x00
 #define DSI_PWR_UP			0x04
@@ -300,7 +304,7 @@ static int genif_wait_w_pld_fifo_not_full(struct dw_mipi_dsi *dsi)
 	int ret;
 
 	ret = readl_poll_timeout(dsi->base + DSI_CMD_PKT_STATUS,
-				 sts, !(sts & GEN_PLD_W_FULL), 10,
+				 sts, !(sts & GEN_PLD_W_FULL),
 				 CMD_PKT_STATUS_TIMEOUT_US);
 	if (ret < 0) {
 		printf("generic write payload fifo is full\n");
@@ -316,7 +320,7 @@ static int genif_wait_cmd_fifo_not_full(struct dw_mipi_dsi *dsi)
 	int ret;
 
 	ret = readl_poll_timeout(dsi->base + DSI_CMD_PKT_STATUS,
-				 sts, !(sts & GEN_CMD_FULL), 10,
+				 sts, !(sts & GEN_CMD_FULL),
 				 CMD_PKT_STATUS_TIMEOUT_US);
 	if (ret < 0) {
 		printf("generic write cmd fifo is full\n");
@@ -334,7 +338,7 @@ static int genif_wait_write_fifo_empty(struct dw_mipi_dsi *dsi)
 
 	mask = GEN_CMD_EMPTY | GEN_PLD_W_EMPTY;
 	ret = readl_poll_timeout(dsi->base + DSI_CMD_PKT_STATUS,
-				 sts, (sts & mask) == mask, 10,
+				 sts, (sts & mask) == mask,
 				 CMD_PKT_STATUS_TIMEOUT_US);
 	if (ret < 0) {
 		printf("generic write fifo is full\n");
@@ -469,8 +473,7 @@ static int mipi_dphy_power_on(struct dw_mipi_dsi *dsi)
 	}
 
 	ret = readl_poll_timeout(dsi->base + DSI_PHY_STATUS,
-				 val, val & PHY_LOCK,
-				 1000, PHY_STATUS_TIMEOUT_US);
+				 val, val & PHY_LOCK, PHY_STATUS_TIMEOUT_US);
 	if (ret < 0) {
 		dev_err(dsi->dev, "PHY is not locked\n");
 		return ret;
@@ -481,7 +484,7 @@ static int mipi_dphy_power_on(struct dw_mipi_dsi *dsi)
 	mask = PHY_STOPSTATELANE;
 	ret = readl_poll_timeout(dsi->base + DSI_PHY_STATUS,
 				 val, (val & mask) == mask,
-				 1000, PHY_STATUS_TIMEOUT_US);
+				 PHY_STATUS_TIMEOUT_US);
 	if (ret < 0) {
 		dev_err(dsi->dev, "lane module is not in stop state\n");
 		return ret;
@@ -525,7 +528,7 @@ static void dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi)
 	testif_write(dsi, 0x44, HSFREQRANGE(hsfreqrange));
 
 	txbyteclkhs = dsi->lane_mbps >> 3;
-	counter = txbyteclkhs * 60 / NSEC_PER_USEC;
+	counter = txbyteclkhs * 60 / 1000;
 	testif_write(dsi, 0x60, 0x80 | counter);
 	testif_write(dsi, 0x70, 0x80 | counter);
 
@@ -549,7 +552,7 @@ static unsigned long dw_mipi_dsi_get_lane_rate(struct dw_mipi_dsi *dsi)
 	/* optional override of the desired bandwidth */
 	value = dev_read_u32_default(dsi->dev, "rockchip,lane-rate", 0);
 	if (value > 0)
-		return value * USEC_PER_SEC;
+		return value * 1000 * 1000;
 
 	bpp = mipi_dsi_pixel_format_to_bpp(dsi->format);
 	if (bpp < 0)
@@ -629,7 +632,7 @@ static void dw_mipi_dsi_set_pll(struct dw_mipi_dsi *dsi, unsigned long rate)
 		}
 	}
 
-	dsi->lane_mbps = best_freq / USEC_PER_SEC;
+	dsi->lane_mbps = best_freq / 1000 / 1000;
 	dsi->dphy.input_div = best_prediv;
 	dsi->dphy.feedback_div = best_fbdiv;
 	if (dsi->slave) {
@@ -648,7 +651,7 @@ static int dw_mipi_dsi_read_from_fifo(struct dw_mipi_dsi *dsi,
 	int ret;
 
 	ret = readl_poll_timeout(dsi->base + DSI_CMD_PKT_STATUS,
-				 val, !(val & GEN_RD_CMD_BUSY), 50, 5000);
+				 val, !(val & GEN_RD_CMD_BUSY), 5000);
 	if (ret) {
 		printf("entire response isn't stored in the FIFO\n");
 		return ret;
@@ -657,8 +660,7 @@ static int dw_mipi_dsi_read_from_fifo(struct dw_mipi_dsi *dsi,
 	/* Receive payload */
 	for (length = msg->rx_len; length; length -= 4) {
 		ret = readl_poll_timeout(dsi->base + DSI_CMD_PKT_STATUS,
-					 val, !(val & GEN_PLD_R_EMPTY),
-					 50, 5000);
+					 val, !(val & GEN_PLD_R_EMPTY), 5000);
 		if (ret) {
 			printf("Read payload FIFO is empty\n");
 			return ret;
@@ -713,7 +715,7 @@ static ssize_t dw_mipi_dsi_transfer(struct dw_mipi_dsi *dsi,
 	int ret;
 	int val;
 
-	if (dsi->mode_flags & MIPI_DSI_MODE_LPM) {
+	if (msg->flags & MIPI_DSI_MSG_USE_LPM) {
 		dsi_update_bits(dsi, DSI_VID_MODE_CFG, LP_CMD_EN, LP_CMD_EN);
 		dsi_update_bits(dsi, DSI_LPCLK_CTRL, PHY_TXREQUESTCLKHS, 0);
 	} else {
@@ -858,15 +860,6 @@ static ssize_t dw_mipi_dsi_transfer(struct dw_mipi_dsi *dsi,
 	return msg->rx_len ? msg->rx_len : msg->tx_len;
 }
 
-static ssize_t dw_mipi_dsi_connector_transfer(struct display_state *state,
-					      const struct mipi_dsi_msg *msg)
-{
-	struct connector_state *conn_state = &state->conn_state;
-	struct dw_mipi_dsi *dsi = dev_get_priv(conn_state->dev);
-
-	return dw_mipi_dsi_transfer(dsi, msg);
-}
-
 static void dw_mipi_dsi_video_mode_config(struct dw_mipi_dsi *dsi)
 {
 	u32 val = LP_VACT_EN | LP_VFP_EN | LP_VBP_EN | LP_VSA_EN |
@@ -1017,7 +1010,7 @@ static int dw_mipi_dsi_get_hcomponent_lbcc(struct dw_mipi_dsi *dsi,
 {
 	u32 lbcc;
 
-	lbcc = hcomponent * dsi->lane_mbps * MSEC_PER_SEC / 8;
+	lbcc = hcomponent * dsi->lane_mbps * 1000 / 8;
 
 	if (dsi->mode->clock == 0) {
 		printf("dsi mode clock is 0!\n");
@@ -1089,20 +1082,9 @@ static int dw_mipi_dsi_connector_init(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
 	struct dw_mipi_dsi *dsi = dev_get_priv(conn_state->dev);
-	struct rockchip_panel *panel = state_get_panel(state);
 
 	dsi->dphy.phy = conn_state->phy;
 
-	dsi->lanes = dev_read_u32_default(panel->dev, "dsi,lanes", 4);
-	dsi->format = dev_read_u32_default(panel->dev, "dsi,format",
-					   MIPI_DSI_FMT_RGB888);
-	dsi->mode_flags = dev_read_u32_default(panel->dev, "dsi,flags",
-					       MIPI_DSI_MODE_VIDEO |
-					       MIPI_DSI_MODE_VIDEO_BURST |
-					       MIPI_DSI_MODE_LPM |
-					       MIPI_DSI_MODE_EOT_PACKET);
-	dsi->channel = dev_read_u32_default(panel->dev, "reg", 0);
-
 	conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
 	conn_state->color_space = V4L2_COLORSPACE_DEFAULT;
 	conn_state->type = DRM_MODE_CONNECTOR_DSI;
@@ -1122,7 +1104,7 @@ static int dw_mipi_dsi_connector_init(struct display_state *state)
 static void dw_mipi_dsi_set_hs_clk(struct dw_mipi_dsi *dsi, unsigned long rate)
 {
 	rate = rockchip_phy_set_pll(dsi->dphy.phy, rate);
-	dsi->lane_mbps = rate / USEC_PER_SEC;
+	dsi->lane_mbps = rate / 1000 / 1000;
 }
 
 static void dw_mipi_dsi_host_init(struct dw_mipi_dsi *dsi)
@@ -1256,7 +1238,6 @@ static const struct rockchip_connector_funcs dw_mipi_dsi_connector_funcs = {
 	.unprepare = dw_mipi_dsi_connector_unprepare,
 	.enable = dw_mipi_dsi_connector_enable,
 	.disable = dw_mipi_dsi_connector_disable,
-	.transfer = dw_mipi_dsi_connector_transfer,
 };
 
 static int dw_mipi_dsi_dual_channel_probe(struct dw_mipi_dsi *master)
@@ -1515,11 +1496,89 @@ static const struct udevice_id dw_mipi_dsi_ids[] = {
 	{}
 };
 
+static ssize_t dw_mipi_dsi_host_transfer(struct mipi_dsi_host *host,
+					 const struct mipi_dsi_msg *msg)
+{
+	struct dw_mipi_dsi *dsi = dev_get_priv(host->dev);
+
+	return dw_mipi_dsi_transfer(dsi, msg);
+}
+
+static int dw_mipi_dsi_host_attach(struct mipi_dsi_host *host,
+				   struct mipi_dsi_device *device)
+{
+	struct dw_mipi_dsi *dsi = dev_get_priv(host->dev);
+
+	if (device->lanes < 1 || device->lanes > 8)
+		return -EINVAL;
+
+	dsi->lanes = device->lanes;
+	dsi->channel = device->channel;
+	dsi->format = device->format;
+	dsi->mode_flags = device->mode_flags;
+
+	return 0;
+}
+
+static const struct mipi_dsi_host_ops dw_mipi_dsi_host_ops = {
+	.attach = dw_mipi_dsi_host_attach,
+	.transfer = dw_mipi_dsi_host_transfer,
+};
+
+static int dw_mipi_dsi_bind(struct udevice *dev)
+{
+	struct mipi_dsi_host *host = dev_get_platdata(dev);
+
+	host->dev = dev;
+	host->ops = &dw_mipi_dsi_host_ops;
+
+	return dm_scan_fdt_dev(dev);
+}
+
+static int dw_mipi_dsi_child_post_bind(struct udevice *dev)
+{
+	struct mipi_dsi_host *host = dev_get_platdata(dev->parent);
+	struct mipi_dsi_device *device = dev_get_parent_platdata(dev);
+
+	device->dev = dev;
+	device->host = host;
+	device->lanes = dev_read_u32_default(dev, "dsi,lanes", 4);
+	device->format = dev_read_u32_default(dev, "dsi,format",
+					      MIPI_DSI_FMT_RGB888);
+	device->mode_flags = dev_read_u32_default(dev, "dsi,flags",
+						  MIPI_DSI_MODE_VIDEO |
+						  MIPI_DSI_MODE_VIDEO_BURST |
+						  MIPI_DSI_MODE_VIDEO_HBP |
+						  MIPI_DSI_MODE_LPM |
+						  MIPI_DSI_MODE_EOT_PACKET);
+	device->channel = dev_read_u32_default(dev, "reg", 0);
+
+	return 0;
+}
+
+static int dw_mipi_dsi_child_pre_probe(struct udevice *dev)
+{
+	struct mipi_dsi_device *device = dev_get_parent_platdata(dev);
+	int ret;
+
+	ret = mipi_dsi_attach(device);
+	if (ret) {
+		dev_err(dev, "mipi_dsi_attach() failed: %d\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
 U_BOOT_DRIVER(dw_mipi_dsi) = {
 	.name = "dw_mipi_dsi",
 	.id = UCLASS_DISPLAY,
 	.of_match = dw_mipi_dsi_ids,
 	.probe = dw_mipi_dsi_probe,
-	.bind = dm_scan_fdt_dev,
+	.bind = dw_mipi_dsi_bind,
 	.priv_auto_alloc_size = sizeof(struct dw_mipi_dsi),
+	.per_child_platdata_auto_alloc_size = sizeof(struct mipi_dsi_device),
+	.platdata_auto_alloc_size = sizeof(struct mipi_dsi_host),
+	.child_post_bind = dw_mipi_dsi_child_post_bind,
+	.child_pre_probe = dw_mipi_dsi_child_pre_probe,
 };
diff --git a/drivers/video/drm/rockchip-inno-hdmi-phy.c b/drivers/video/drm/rockchip-inno-hdmi-phy.c
index 783280083d..71c710fc86 100644
--- a/drivers/video/drm/rockchip-inno-hdmi-phy.c
+++ b/drivers/video/drm/rockchip-inno-hdmi-phy.c
@@ -20,11 +20,10 @@
 
 #include "rockchip_display.h"
 #include "rockchip_crtc.h"
-#include "rockchip_connector.h"
 #include "rockchip_phy.h"
 
 #define INNO_HDMI_PHY_TIMEOUT_LOOP_COUNT	1000
-/*#define UPDATE(x, h, l)	(((x) << (l)) & GENMASK((h), (l)))*/
+#define UPDATE(x, h, l)	(((x) << (l)) & GENMASK((h), (l)))
 
 /* REG: 0x00 */
 #define PRE_PLL_REFCLK_SEL_MASK			BIT(0)
diff --git a/drivers/video/drm/rockchip_connector.h b/drivers/video/drm/rockchip_connector.h
index 1ed54647c5..642238b1a7 100644
--- a/drivers/video/drm/rockchip_connector.h
+++ b/drivers/video/drm/rockchip_connector.h
@@ -7,8 +7,6 @@
 #ifndef _ROCKCHIP_CONNECTOR_H_
 #define _ROCKCHIP_CONNECTOR_H_
 
-#include "rockchip_mipi_dsi.h"
-
 struct rockchip_connector {
 	const struct rockchip_connector_funcs *funcs;
 
@@ -58,9 +56,6 @@ struct rockchip_connector_funcs {
 	 * Save data to dts, then you can share data to kernel space.
 	 */
 	int (*fixup_dts)(struct display_state *state, void *blob);
-	/* transmit a DSI packet */
-	ssize_t (*transfer)(struct display_state *state,
-			    const struct mipi_dsi_msg *msg);
 };
 
 const struct rockchip_connector *
diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index b36c30d2f0..4e81a3549d 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -20,7 +20,8 @@
 #include "rockchip_connector.h"
 #include "rockchip_phy.h"
 #include "rockchip_panel.h"
-#include "rockchip_lvds.h"
+
+#define HIWORD_UPDATE(v, h, l)		(((v) << (l)) | (GENMASK(h, l) << 16))
 
 #define PX30_GRF_PD_VO_CON1		0x0438
 #define PX30_LVDS_SELECT(x)		HIWORD_UPDATE(x, 14, 13)
diff --git a/drivers/video/drm/rockchip_mipi_dsi.c b/drivers/video/drm/rockchip_mipi_dsi.c
deleted file mode 100644
index 649f74281a..0000000000
--- a/drivers/video/drm/rockchip_mipi_dsi.c
+++ /dev/null
@@ -1,340 +0,0 @@
-/*
- * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <config.h>
-#include <common.h>
-#include <errno.h>
-#include <malloc.h>
-#include <asm/unaligned.h>
-#include <linux/list.h>
-
-#include "rockchip_display.h"
-#include "rockchip_crtc.h"
-#include "rockchip_connector.h"
-#include "rockchip_mipi_dsi.h"
-
-void mipi_dphy_timing_get_default(struct mipi_dphy_timing *timing,
-				  unsigned long period)
-{
-	/* Global Operation Timing Parameters */
-	timing->clkmiss = 0;
-	timing->clkpost = 70 + 52 * period;
-	timing->clkpre = 8 * period;
-	timing->clkprepare = 65;
-	timing->clksettle = 95;
-	timing->clktermen = 0;
-	timing->clktrail = 80;
-	timing->clkzero = 260;
-	timing->dtermen = 0;
-	timing->eot = 0;
-	timing->hsexit = 120;
-	timing->hsprepare = 65 + 4 * period;
-	timing->hszero = 145 + 6 * period;
-	timing->hssettle = 85 + 6 * period;
-	timing->hsskip = 40;
-	timing->hstrail = max(8 * period, 60 + 4 * period);
-	timing->init = 100000;
-	timing->lpx = 60;
-	timing->taget = 5 * timing->lpx;
-	timing->tago = 4 * timing->lpx;
-	timing->tasure = 2 * timing->lpx;
-	timing->wakeup = 1000000;
-}
-
-ssize_t mipi_dsi_generic_write(struct display_state *state,
-			       const void *payload, size_t size)
-{
-	struct connector_state *conn_state = &state->conn_state;
-	const struct rockchip_connector *connector = conn_state->connector;
-	struct mipi_dsi_msg msg;
-
-	if (!connector || !connector->funcs || !connector->funcs->transfer) {
-		printf("%s: failed to find connector transfer funcs\n", __func__);
-		return -ENODEV;
-	}
-
-	memset(&msg, 0, sizeof(msg));
-	msg.channel = 0;
-	msg.tx_buf = payload;
-	msg.tx_len = size;
-	msg.flags |= MIPI_DSI_MSG_USE_LPM;
-
-	switch (size) {
-	case 0:
-		msg.type = MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM;
-		break;
-	case 1:
-		msg.type = MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM;
-		break;
-	case 2:
-		msg.type = MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM;
-		break;
-	default:
-		msg.type = MIPI_DSI_GENERIC_LONG_WRITE;
-		break;
-	}
-
-	return connector->funcs->transfer(state, &msg);
-}
-
-ssize_t mipi_dsi_dcs_write(struct display_state *state,
-			   const void *payload, size_t size)
-{
-	struct connector_state *conn_state = &state->conn_state;
-	const struct rockchip_connector *connector = conn_state->connector;
-	struct mipi_dsi_msg msg;
-
-	if (!connector || !connector->funcs || !connector->funcs->transfer) {
-		printf("%s: failed to find connector transfer funcs\n", __func__);
-		return -ENODEV;
-	}
-
-	memset(&msg, 0, sizeof(msg));
-	msg.channel = 0;
-	msg.tx_buf = payload;
-	msg.tx_len = size;
-	msg.flags |= MIPI_DSI_MSG_USE_LPM;
-
-	switch (size) {
-	case 0:
-		return -EINVAL;
-	case 1:
-		msg.type = MIPI_DSI_DCS_SHORT_WRITE;
-		break;
-	case 2:
-		msg.type = MIPI_DSI_DCS_SHORT_WRITE_PARAM;
-		break;
-	default:
-		msg.type = MIPI_DSI_DCS_LONG_WRITE;
-		break;
-	}
-
-	return connector->funcs->transfer(state, &msg);
-}
-
-ssize_t mipi_dsi_generic_read(struct display_state *state, const void *params,
-			      size_t num_params, void *data, size_t size)
-{
-	struct connector_state *conn_state = &state->conn_state;
-	const struct rockchip_connector *connector = conn_state->connector;
-	struct mipi_dsi_msg msg;
-
-	if (!connector || !connector->funcs || !connector->funcs->transfer) {
-		printf("%s: failed to find connector transfer funcs\n", __func__);
-		return -ENODEV;
-	}
-
-	memset(&msg, 0, sizeof(msg));
-	msg.channel = 0;
-	msg.tx_buf = params;
-	msg.tx_len = num_params;
-	msg.rx_len = size;
-	msg.rx_buf = data;
-	msg.flags |= MIPI_DSI_MSG_USE_LPM;
-
-	switch (num_params) {
-	case 0:
-		msg.type = MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM;
-		break;
-	case 1:
-		msg.type = MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM;
-		break;
-	case 2:
-		msg.type = MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM;
-		break;
-	default:
-		return -EINVAL;
-	}
-
-	return connector->funcs->transfer(state, &msg);
-}
-
-ssize_t mipi_dsi_dcs_read(struct display_state *state, u8 cmd, void *data,
-			  size_t len)
-{
-	struct connector_state *conn_state = &state->conn_state;
-	const struct rockchip_connector *connector = conn_state->connector;
-	struct mipi_dsi_msg msg;
-
-	if (!connector || !connector->funcs || !connector->funcs->transfer) {
-		printf("%s: failed to find connector transfer funcs\n", __func__);
-		return -ENODEV;
-	}
-
-	memset(&msg, 0, sizeof(msg));
-	msg.channel = 0;
-	msg.type = MIPI_DSI_DCS_READ;
-	msg.tx_buf = &cmd;
-	msg.tx_len = 1;
-	msg.rx_len = len;
-	msg.rx_buf = data;
-	msg.flags |= MIPI_DSI_MSG_USE_LPM;
-
-	return connector->funcs->transfer(state, &msg);
-}
-
-ssize_t mipi_dsi_shutdown_peripheral(struct display_state *state)
-{
-	struct connector_state *conn_state = &state->conn_state;
-	const struct rockchip_connector *connector = conn_state->connector;
-	struct mipi_dsi_msg msg = {
-		.channel = 0,
-		.type = MIPI_DSI_SHUTDOWN_PERIPHERAL,
-		.tx_buf = (u8 [2]) { 0, 0 },
-		.tx_len = 2,
-		.flags = MIPI_DSI_MSG_USE_LPM,
-	};
-
-	if (!connector)
-		return -ENODEV;
-
-	if (!connector->funcs || !connector->funcs->transfer)
-		return -ENOSYS;
-
-	return connector->funcs->transfer(state, &msg);
-}
-
-ssize_t mipi_dsi_turn_on_peripheral(struct display_state *state)
-{
-	struct connector_state *conn_state = &state->conn_state;
-	const struct rockchip_connector *connector = conn_state->connector;
-	struct mipi_dsi_msg msg = {
-		.channel = 0,
-		.type = MIPI_DSI_TURN_ON_PERIPHERAL,
-		.tx_buf = (u8 [2]) { 0, 0 },
-		.tx_len = 2,
-		.flags = MIPI_DSI_MSG_USE_LPM,
-	};
-
-	if (!connector)
-		return -ENODEV;
-
-	if (!connector->funcs || !connector->funcs->transfer)
-		return -ENOSYS;
-
-	return connector->funcs->transfer(state, &msg);
-}
-
-int mipi_dsi_dcs_get_power_mode(struct display_state *state, u8 *mode)
-{
-	ssize_t err;
-
-	err = mipi_dsi_dcs_read(state, MIPI_DCS_GET_POWER_MODE, mode,
-				sizeof(*mode));
-	if (err <= 0) {
-		if (err == 0)
-			err = -ENODATA;
-
-		return err;
-	}
-
-	return 0;
-}
-
-int mipi_dsi_set_maximum_return_packet_size(struct display_state *state,
-					    u16 value)
-{
-	struct connector_state *conn_state = &state->conn_state;
-	const struct rockchip_connector *connector = conn_state->connector;
-	u8 tx[2] = { value & 0xff, value >> 8 };
-	struct mipi_dsi_msg msg = {
-		.channel = 0,
-		.type = MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE,
-		.tx_len = sizeof(tx),
-		.tx_buf = tx,
-	};
-
-	if (!connector)
-		return -ENODEV;
-
-	if (!connector->funcs || !connector->funcs->transfer)
-		return -ENOSYS;
-
-	return connector->funcs->transfer(state, &msg);
-}
-
-static bool mipi_dsi_packet_format_is_short(u8 type)
-{
-	switch (type) {
-	case MIPI_DSI_V_SYNC_START:
-	case MIPI_DSI_V_SYNC_END:
-	case MIPI_DSI_H_SYNC_START:
-	case MIPI_DSI_H_SYNC_END:
-	case MIPI_DSI_END_OF_TRANSMISSION:
-	case MIPI_DSI_COLOR_MODE_OFF:
-	case MIPI_DSI_COLOR_MODE_ON:
-	case MIPI_DSI_SHUTDOWN_PERIPHERAL:
-	case MIPI_DSI_TURN_ON_PERIPHERAL:
-	case MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM:
-	case MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM:
-	case MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM:
-	case MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM:
-	case MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM:
-	case MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM:
-	case MIPI_DSI_DCS_SHORT_WRITE:
-	case MIPI_DSI_DCS_SHORT_WRITE_PARAM:
-	case MIPI_DSI_DCS_READ:
-	case MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE:
-		return true;
-	}
-
-	return false;
-}
-
-static bool mipi_dsi_packet_format_is_long(u8 type)
-{
-	switch (type) {
-	case MIPI_DSI_NULL_PACKET:
-	case MIPI_DSI_BLANKING_PACKET:
-	case MIPI_DSI_GENERIC_LONG_WRITE:
-	case MIPI_DSI_DCS_LONG_WRITE:
-	case MIPI_DSI_LOOSELY_PACKED_PIXEL_STREAM_YCBCR20:
-	case MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR24:
-	case MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16:
-	case MIPI_DSI_PACKED_PIXEL_STREAM_30:
-	case MIPI_DSI_PACKED_PIXEL_STREAM_36:
-	case MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR12:
-	case MIPI_DSI_PACKED_PIXEL_STREAM_16:
-	case MIPI_DSI_PACKED_PIXEL_STREAM_18:
-	case MIPI_DSI_PIXEL_STREAM_3BYTE_18:
-	case MIPI_DSI_PACKED_PIXEL_STREAM_24:
-		return true;
-	}
-
-	return false;
-}
-
-int mipi_dsi_create_packet(struct mipi_dsi_packet *packet,
-			   const struct mipi_dsi_msg *msg)
-{
-	if (!packet || !msg)
-		return -EINVAL;
-
-	/* do some minimum sanity checking */
-	if (!mipi_dsi_packet_format_is_short(msg->type) &&
-	    !mipi_dsi_packet_format_is_long(msg->type))
-		return -EINVAL;
-
-	if (msg->channel > 3)
-		return -EINVAL;
-
-	memset(packet, 0, sizeof(*packet));
-	packet->header[0] = ((msg->channel & 0x3) << 6) | (msg->type & 0x3f);
-	if (mipi_dsi_packet_format_is_long(msg->type)) {
-		packet->header[1] = (msg->tx_len >> 0) & 0xff;
-		packet->header[2] = (msg->tx_len >> 8) & 0xff;
-		packet->payload_length = msg->tx_len;
-		packet->payload = msg->tx_buf;
-	} else {
-		const u8 *tx = msg->tx_buf;
-		packet->header[1] = (msg->tx_len > 0) ? tx[0] : 0;
-		packet->header[2] = (msg->tx_len > 1) ? tx[1] : 0;
-	}
-
-	packet->size = sizeof(packet->header) + packet->payload_length;
-
-	return 0;
-}
diff --git a/drivers/video/drm/rockchip_mipi_dsi.h b/drivers/video/drm/rockchip_mipi_dsi.h
deleted file mode 100644
index b3919a86a8..0000000000
--- a/drivers/video/drm/rockchip_mipi_dsi.h
+++ /dev/null
@@ -1,202 +0,0 @@
-/*
- * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef __ROCKCHIP_MIPI_DSI_H__
-#define __ROCKCHIP_MIPI_DSI_H__
-
-#include <mipi_display.h>
-
-#define MSEC_PER_SEC	1000L
-#define USEC_PER_MSEC	1000L
-#define NSEC_PER_USEC	1000L
-#define NSEC_PER_MSEC	1000000L
-#define USEC_PER_SEC	1000000L
-#define NSEC_PER_SEC	1000000000L
-#define FSEC_PER_SEC	1000000000000000LL
-
-#define GENMASK(h, l)	(((~0UL) << (l)) & (~0UL >> (BITS_PER_LONG - 1 - (h))))
-#define UPDATE(v, h, l)	(((v) << (l)) & GENMASK((h), (l)))
-#define HIWORD_UPDATE(v, h, l)	(((v) << (l)) | (GENMASK(h, l) << 16))
-
-#define readl_poll_timeout(addr, val, cond, sleep_us, timeout_us)	\
-({ \
-	int try = 100; \
-	for (;;) { \
-		(val) = readl(addr); \
-		if (cond) \
-			break; \
-		try--; \
-		if (!try) \
-			break; \
-		if (sleep_us) \
-			udelay(sleep_us >> 2); \
-	} \
-	(cond) ? 0 : -ETIMEDOUT; \
-})
-
-/* request ACK from peripheral */
-#define MIPI_DSI_MSG_REQ_ACK	BIT(0)
-/* use Low Power Mode to transmit message */
-#define MIPI_DSI_MSG_USE_LPM	BIT(1)
-
-/**
- * struct mipi_dsi_msg - read/write DSI buffer
- * @channel: virtual channel id
- * @type: payload data type
- * @flags: flags controlling this message transmission
- * @tx_len: length of @tx_buf
- * @tx_buf: data to be written
- * @rx_len: length of @rx_buf
- * @rx_buf: data to be read, or NULL
- */
-struct mipi_dsi_msg {
-	u8 channel;
-	u8 type;
-	u16 flags;
-
-	size_t tx_len;
-	const void *tx_buf;
-
-	size_t rx_len;
-	void *rx_buf;
-};
-
-/**
- * struct mipi_dsi_packet - represents a MIPI DSI packet in protocol format
- * @size: size (in bytes) of the packet
- * @header: the four bytes that make up the header (Data ID, Word Count or
- *     Packet Data, and ECC)
- * @payload_length: number of bytes in the payload
- * @payload: a pointer to a buffer containing the payload, if any
- */
-struct mipi_dsi_packet {
-	size_t size;
-	u8 header[4];
-	size_t payload_length;
-	const u8 *payload;
-};
-
-
-/* DSI mode flags */
-
-/* video mode */
-#define MIPI_DSI_MODE_VIDEO		BIT(0)
-/* video burst mode */
-#define MIPI_DSI_MODE_VIDEO_BURST	BIT(1)
-/* video pulse mode */
-#define MIPI_DSI_MODE_VIDEO_SYNC_PULSE	BIT(2)
-/* enable auto vertical count mode */
-#define MIPI_DSI_MODE_VIDEO_AUTO_VERT	BIT(3)
-/* enable hsync-end packets in vsync-pulse and v-porch area */
-#define MIPI_DSI_MODE_VIDEO_HSE		BIT(4)
-/* disable hfront-porch area */
-#define MIPI_DSI_MODE_VIDEO_HFP		BIT(5)
-/* disable hback-porch area */
-#define MIPI_DSI_MODE_VIDEO_HBP		BIT(6)
-/* disable hsync-active area */
-#define MIPI_DSI_MODE_VIDEO_HSA		BIT(7)
-/* flush display FIFO on vsync pulse */
-#define MIPI_DSI_MODE_VSYNC_FLUSH	BIT(8)
-/* disable EoT packets in HS mode */
-#define MIPI_DSI_MODE_EOT_PACKET	BIT(9)
-/* device supports non-continuous clock behavior (DSI spec 5.6.1) */
-#define MIPI_DSI_CLOCK_NON_CONTINUOUS	BIT(10)
-/* transmit data in low power */
-#define MIPI_DSI_MODE_LPM		BIT(11)
-
-enum mipi_dsi_pixel_format {
-	MIPI_DSI_FMT_RGB888,
-	MIPI_DSI_FMT_RGB666,
-	MIPI_DSI_FMT_RGB666_PACKED,
-	MIPI_DSI_FMT_RGB565,
-};
-
-/**
- * mipi_dsi_pixel_format_to_bpp - obtain the number of bits per pixel for any
- *                                given pixel format defined by the MIPI DSI
- *                                specification
- * @fmt: MIPI DSI pixel format
- *
- * Returns: The number of bits per pixel of the given pixel format.
- */
-static inline int mipi_dsi_pixel_format_to_bpp(enum mipi_dsi_pixel_format fmt)
-{
-	switch (fmt) {
-	case MIPI_DSI_FMT_RGB888:
-	case MIPI_DSI_FMT_RGB666:
-		return 24;
-
-	case MIPI_DSI_FMT_RGB666_PACKED:
-		return 18;
-
-	case MIPI_DSI_FMT_RGB565:
-		return 16;
-	}
-
-	return -EINVAL;
-}
-
-/**
- * enum mipi_dsi_dcs_tear_mode - Tearing Effect Output Line mode
- * @MIPI_DSI_DCS_TEAR_MODE_VBLANK: the TE output line consists of V-Blanking
- *    information only
- * @MIPI_DSI_DCS_TEAR_MODE_VHBLANK : the TE output line consists of both
- *    V-Blanking and H-Blanking information
- */
-enum mipi_dsi_dcs_tear_mode {
-	MIPI_DSI_DCS_TEAR_MODE_VBLANK,
-	MIPI_DSI_DCS_TEAR_MODE_VHBLANK,
-};
-
-#define MIPI_DSI_DCS_POWER_MODE_DISPLAY (1 << 2)
-#define MIPI_DSI_DCS_POWER_MODE_NORMAL  (1 << 3)
-#define MIPI_DSI_DCS_POWER_MODE_SLEEP   (1 << 4)
-#define MIPI_DSI_DCS_POWER_MODE_PARTIAL (1 << 5)
-#define MIPI_DSI_DCS_POWER_MODE_IDLE    (1 << 6)
-
-struct mipi_dphy_timing {
-	unsigned int clkmiss;
-	unsigned int clkpost;
-	unsigned int clkpre;
-	unsigned int clkprepare;
-	unsigned int clksettle;
-	unsigned int clktermen;
-	unsigned int clktrail;
-	unsigned int clkzero;
-	unsigned int dtermen;
-	unsigned int eot;
-	unsigned int hsexit;
-	unsigned int hsprepare;
-	unsigned int hszero;
-	unsigned int hssettle;
-	unsigned int hsskip;
-	unsigned int hstrail;
-	unsigned int init;
-	unsigned int lpx;
-	unsigned int taget;
-	unsigned int tago;
-	unsigned int tasure;
-	unsigned int wakeup;
-};
-
-void mipi_dphy_timing_get_default(struct mipi_dphy_timing *timing,
-				  unsigned long period);
-ssize_t mipi_dsi_dcs_write(struct display_state *state,
-			   const void *payload, size_t size);
-ssize_t mipi_dsi_generic_write(struct display_state *state,
-			       const void *payload, size_t size);
-int mipi_dsi_create_packet(struct mipi_dsi_packet *packet,
-			   const struct mipi_dsi_msg *msg);
-ssize_t mipi_dsi_dcs_read(struct display_state *state, u8 cmd, void *data,
-			  size_t len);
-ssize_t mipi_dsi_generic_read(struct display_state *state, const void *params,
-			      size_t num_params, void *data, size_t size);
-ssize_t mipi_dsi_shutdown_peripheral(struct display_state *state);
-ssize_t mipi_dsi_turn_on_peripheral(struct display_state *state);
-int mipi_dsi_set_maximum_return_packet_size(struct display_state *state,
-					    u16 value);
-int mipi_dsi_dcs_get_pixel_format(struct display_state *state, u8 *format);
-#endif /* __ROCKCHIP_MIPI_DSI__ */
diff --git a/drivers/video/drm/rockchip_panel.c b/drivers/video/drm/rockchip_panel.c
index 8f953ee141..57bf479c74 100644
--- a/drivers/video/drm/rockchip_panel.c
+++ b/drivers/video/drm/rockchip_panel.c
@@ -4,6 +4,8 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
+#include <drm/drm_mipi_dsi.h>
+
 #include <config.h>
 #include <common.h>
 #include <errno.h>
@@ -21,7 +23,6 @@
 #include "rockchip_display.h"
 #include "rockchip_crtc.h"
 #include "rockchip_connector.h"
-#include "rockchip_mipi_dsi.h"
 #include "rockchip_panel.h"
 
 struct rockchip_cmd_header {
@@ -209,7 +210,7 @@ static int rockchip_panel_send_spi_cmds(struct display_state *state,
 	return 0;
 }
 
-static int rockchip_panel_send_dsi_cmds(struct display_state *state,
+static int rockchip_panel_send_dsi_cmds(struct mipi_dsi_device *dsi,
 					struct rockchip_panel_cmds *cmds)
 {
 	int i, ret;
@@ -219,24 +220,25 @@ static int rockchip_panel_send_dsi_cmds(struct display_state *state,
 
 	for (i = 0; i < cmds->cmd_cnt; i++) {
 		struct rockchip_cmd_desc *desc = &cmds->cmds[i];
+		const struct rockchip_cmd_header *header = &desc->header;
 
-		switch (desc->header.data_type) {
+		switch (header->data_type) {
 		case MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM:
 		case MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM:
 		case MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM:
 		case MIPI_DSI_GENERIC_LONG_WRITE:
-			ret = mipi_dsi_generic_write(state, desc->payload,
-						     desc->header.payload_length);
+			ret = mipi_dsi_generic_write(dsi, desc->payload,
+						     header->payload_length);
 			break;
 		case MIPI_DSI_DCS_SHORT_WRITE:
 		case MIPI_DSI_DCS_SHORT_WRITE_PARAM:
 		case MIPI_DSI_DCS_LONG_WRITE:
-			ret = mipi_dsi_dcs_write(state, desc->payload,
-						 desc->header.payload_length);
+			ret = mipi_dsi_dcs_write_buffer(dsi, desc->payload,
+							header->payload_length);
 			break;
 		default:
 			printf("unsupport command data type: %d\n",
-			       desc->header.data_type);
+			       header->data_type);
 			return -EINVAL;
 		}
 
@@ -245,8 +247,8 @@ static int rockchip_panel_send_dsi_cmds(struct display_state *state,
 			return ret;
 		}
 
-		if (desc->header.delay_ms)
-			mdelay(desc->header.delay_ms);
+		if (header->delay_ms)
+			mdelay(header->delay_ms);
 	}
 
 	return 0;
@@ -256,6 +258,7 @@ static void panel_simple_prepare(struct rockchip_panel *panel)
 {
 	struct rockchip_panel_plat *plat = dev_get_platdata(panel->dev);
 	struct rockchip_panel_priv *priv = dev_get_priv(panel->dev);
+	struct mipi_dsi_device *dsi = dev_get_parent_platdata(panel->dev);
 	int ret;
 
 	if (priv->prepared)
@@ -290,8 +293,7 @@ static void panel_simple_prepare(struct rockchip_panel *panel)
 			ret = rockchip_panel_send_mcu_cmds(panel->state,
 							   plat->on_cmds);
 		else
-			ret = rockchip_panel_send_dsi_cmds(panel->state,
-							   plat->on_cmds);
+			ret = rockchip_panel_send_dsi_cmds(dsi, plat->on_cmds);
 		if (ret)
 			printf("failed to send on cmds: %d\n", ret);
 	}
@@ -303,6 +305,7 @@ static void panel_simple_unprepare(struct rockchip_panel *panel)
 {
 	struct rockchip_panel_plat *plat = dev_get_platdata(panel->dev);
 	struct rockchip_panel_priv *priv = dev_get_priv(panel->dev);
+	struct mipi_dsi_device *dsi = dev_get_parent_platdata(panel->dev);
 	int ret;
 
 	if (!priv->prepared)
@@ -316,8 +319,7 @@ static void panel_simple_unprepare(struct rockchip_panel *panel)
 			ret = rockchip_panel_send_mcu_cmds(panel->state,
 							   plat->off_cmds);
 		else
-			ret = rockchip_panel_send_dsi_cmds(panel->state,
-							   plat->off_cmds);
+			ret = rockchip_panel_send_dsi_cmds(dsi, plat->off_cmds);
 		if (ret)
 			printf("failed to send off cmds: %d\n", ret);
 	}
diff --git a/drivers/video/drm/rockchip_rgb.c b/drivers/video/drm/rockchip_rgb.c
index 95fcad5023..60b09df21e 100644
--- a/drivers/video/drm/rockchip_rgb.c
+++ b/drivers/video/drm/rockchip_rgb.c
@@ -17,6 +17,8 @@
 #include "rockchip_connector.h"
 #include "rockchip_phy.h"
 
+#define HIWORD_UPDATE(v, h, l)		(((v) << (l)) | (GENMASK(h, l) << 16))
+
 #define PX30_GRF_PD_VO_CON1		0x0438
 #define PX30_RGB_DATA_SYNC_BYPASS(v)	HIWORD_UPDATE(v, 3, 3)
 #define PX30_RGB_VOP_SEL(v)		HIWORD_UPDATE(v, 2, 2)
diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h
new file mode 100644
index 0000000000..d05c07b7f5
--- /dev/null
+++ b/include/drm/drm_mipi_dsi.h
@@ -0,0 +1,252 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * MIPI DSI Bus
+ *
+ * Copyright (C) 2012-2013, Samsung Electronics, Co., Ltd.
+ * Andrzej Hajda <a.hajda@samsung.com>
+ */
+
+#ifndef __DRM_MIPI_DSI_H__
+#define __DRM_MIPI_DSI_H__
+
+#include <mipi_display.h>
+#include <dm/device.h>
+
+struct mipi_dsi_host;
+struct mipi_dsi_device;
+
+/* request ACK from peripheral */
+#define MIPI_DSI_MSG_REQ_ACK	BIT(0)
+/* use Low Power Mode to transmit message */
+#define MIPI_DSI_MSG_USE_LPM	BIT(1)
+
+/**
+ * struct mipi_dsi_msg - read/write DSI buffer
+ * @channel: virtual channel id
+ * @type: payload data type
+ * @flags: flags controlling this message transmission
+ * @tx_len: length of @tx_buf
+ * @tx_buf: data to be written
+ * @rx_len: length of @rx_buf
+ * @rx_buf: data to be read, or NULL
+ */
+struct mipi_dsi_msg {
+	u8 channel;
+	u8 type;
+	u16 flags;
+
+	size_t tx_len;
+	const void *tx_buf;
+
+	size_t rx_len;
+	void *rx_buf;
+};
+
+bool mipi_dsi_packet_format_is_short(u8 type);
+bool mipi_dsi_packet_format_is_long(u8 type);
+
+/**
+ * struct mipi_dsi_packet - represents a MIPI DSI packet in protocol format
+ * @size: size (in bytes) of the packet
+ * @header: the four bytes that make up the header (Data ID, Word Count or
+ *     Packet Data, and ECC)
+ * @payload_length: number of bytes in the payload
+ * @payload: a pointer to a buffer containing the payload, if any
+ */
+struct mipi_dsi_packet {
+	size_t size;
+	u8 header[4];
+	size_t payload_length;
+	const u8 *payload;
+};
+
+int mipi_dsi_create_packet(struct mipi_dsi_packet *packet,
+			   const struct mipi_dsi_msg *msg);
+
+/**
+ * struct mipi_dsi_host_ops - DSI bus operations
+ * @attach: attach DSI device to DSI host
+ * @detach: detach DSI device from DSI host
+ * @transfer: transmit a DSI packet
+ *
+ * DSI packets transmitted by .transfer() are passed in as mipi_dsi_msg
+ * structures. This structure contains information about the type of packet
+ * being transmitted as well as the transmit and receive buffers. When an
+ * error is encountered during transmission, this function will return a
+ * negative error code. On success it shall return the number of bytes
+ * transmitted for write packets or the number of bytes received for read
+ * packets.
+ *
+ * Note that typically DSI packet transmission is atomic, so the .transfer()
+ * function will seldomly return anything other than the number of bytes
+ * contained in the transmit buffer on success.
+ */
+struct mipi_dsi_host_ops {
+	int (*attach)(struct mipi_dsi_host *host,
+		      struct mipi_dsi_device *dsi);
+	int (*detach)(struct mipi_dsi_host *host,
+		      struct mipi_dsi_device *dsi);
+	ssize_t (*transfer)(struct mipi_dsi_host *host,
+			    const struct mipi_dsi_msg *msg);
+};
+
+/**
+ * struct mipi_dsi_host - DSI host device
+ * @dev: driver model device node for this DSI host
+ * @ops: DSI host operations
+ * @list: list management
+ */
+struct mipi_dsi_host {
+	struct udevice *dev;
+	const struct mipi_dsi_host_ops *ops;
+};
+
+/* DSI mode flags */
+
+/* video mode */
+#define MIPI_DSI_MODE_VIDEO		BIT(0)
+/* video burst mode */
+#define MIPI_DSI_MODE_VIDEO_BURST	BIT(1)
+/* video pulse mode */
+#define MIPI_DSI_MODE_VIDEO_SYNC_PULSE	BIT(2)
+/* enable auto vertical count mode */
+#define MIPI_DSI_MODE_VIDEO_AUTO_VERT	BIT(3)
+/* enable hsync-end packets in vsync-pulse and v-porch area */
+#define MIPI_DSI_MODE_VIDEO_HSE		BIT(4)
+/* disable hfront-porch area */
+#define MIPI_DSI_MODE_VIDEO_HFP		BIT(5)
+/* disable hback-porch area */
+#define MIPI_DSI_MODE_VIDEO_HBP		BIT(6)
+/* disable hsync-active area */
+#define MIPI_DSI_MODE_VIDEO_HSA		BIT(7)
+/* flush display FIFO on vsync pulse */
+#define MIPI_DSI_MODE_VSYNC_FLUSH	BIT(8)
+/* disable EoT packets in HS mode */
+#define MIPI_DSI_MODE_EOT_PACKET	BIT(9)
+/* device supports non-continuous clock behavior (DSI spec 5.6.1) */
+#define MIPI_DSI_CLOCK_NON_CONTINUOUS	BIT(10)
+/* transmit data in low power */
+#define MIPI_DSI_MODE_LPM		BIT(11)
+
+enum mipi_dsi_pixel_format {
+	MIPI_DSI_FMT_RGB888,
+	MIPI_DSI_FMT_RGB666,
+	MIPI_DSI_FMT_RGB666_PACKED,
+	MIPI_DSI_FMT_RGB565,
+};
+
+#define DSI_DEV_NAME_SIZE		20
+
+/**
+ * struct mipi_dsi_device - DSI peripheral device
+ * @host: DSI host for this peripheral
+ * @dev: driver model device node for this peripheral
+ * @name: DSI peripheral chip type
+ * @channel: virtual channel assigned to the peripheral
+ * @format: pixel format for video mode
+ * @lanes: number of active data lanes
+ * @mode_flags: DSI operation mode related flags
+ * @hs_rate: maximum lane frequency for high speed mode in hertz, this should
+ * be set to the real limits of the hardware, zero is only accepted for
+ * legacy drivers
+ * @lp_rate: maximum lane frequency for low power mode in hertz, this should
+ * be set to the real limits of the hardware, zero is only accepted for
+ * legacy drivers
+ */
+struct mipi_dsi_device {
+	struct mipi_dsi_host *host;
+	struct udevice *dev;
+
+	char name[DSI_DEV_NAME_SIZE];
+	unsigned int channel;
+	unsigned int lanes;
+	enum mipi_dsi_pixel_format format;
+	unsigned long mode_flags;
+	unsigned long hs_rate;
+	unsigned long lp_rate;
+};
+
+/**
+ * mipi_dsi_pixel_format_to_bpp - obtain the number of bits per pixel for any
+ *                                given pixel format defined by the MIPI DSI
+ *                                specification
+ * @fmt: MIPI DSI pixel format
+ *
+ * Returns: The number of bits per pixel of the given pixel format.
+ */
+static inline int mipi_dsi_pixel_format_to_bpp(enum mipi_dsi_pixel_format fmt)
+{
+	switch (fmt) {
+	case MIPI_DSI_FMT_RGB888:
+	case MIPI_DSI_FMT_RGB666:
+		return 24;
+
+	case MIPI_DSI_FMT_RGB666_PACKED:
+		return 18;
+
+	case MIPI_DSI_FMT_RGB565:
+		return 16;
+	}
+
+	return -EINVAL;
+}
+
+int mipi_dsi_attach(struct mipi_dsi_device *dsi);
+int mipi_dsi_detach(struct mipi_dsi_device *dsi);
+int mipi_dsi_shutdown_peripheral(struct mipi_dsi_device *dsi);
+int mipi_dsi_turn_on_peripheral(struct mipi_dsi_device *dsi);
+int mipi_dsi_set_maximum_return_packet_size(struct mipi_dsi_device *dsi,
+					    u16 value);
+
+ssize_t mipi_dsi_generic_write(struct mipi_dsi_device *dsi, const void *payload,
+			       size_t size);
+ssize_t mipi_dsi_generic_read(struct mipi_dsi_device *dsi, const void *params,
+			      size_t num_params, void *data, size_t size);
+
+/**
+ * enum mipi_dsi_dcs_tear_mode - Tearing Effect Output Line mode
+ * @MIPI_DSI_DCS_TEAR_MODE_VBLANK: the TE output line consists of V-Blanking
+ *    information only
+ * @MIPI_DSI_DCS_TEAR_MODE_VHBLANK : the TE output line consists of both
+ *    V-Blanking and H-Blanking information
+ */
+enum mipi_dsi_dcs_tear_mode {
+	MIPI_DSI_DCS_TEAR_MODE_VBLANK,
+	MIPI_DSI_DCS_TEAR_MODE_VHBLANK,
+};
+
+#define MIPI_DSI_DCS_POWER_MODE_DISPLAY BIT(2)
+#define MIPI_DSI_DCS_POWER_MODE_NORMAL  BIT(3)
+#define MIPI_DSI_DCS_POWER_MODE_SLEEP   BIT(4)
+#define MIPI_DSI_DCS_POWER_MODE_PARTIAL BIT(5)
+#define MIPI_DSI_DCS_POWER_MODE_IDLE    BIT(6)
+
+ssize_t mipi_dsi_dcs_write_buffer(struct mipi_dsi_device *dsi,
+				  const void *data, size_t len);
+ssize_t mipi_dsi_dcs_write(struct mipi_dsi_device *dsi, u8 cmd,
+			   const void *data, size_t len);
+ssize_t mipi_dsi_dcs_read(struct mipi_dsi_device *dsi, u8 cmd, void *data,
+			  size_t len);
+int mipi_dsi_dcs_nop(struct mipi_dsi_device *dsi);
+int mipi_dsi_dcs_soft_reset(struct mipi_dsi_device *dsi);
+int mipi_dsi_dcs_get_power_mode(struct mipi_dsi_device *dsi, u8 *mode);
+int mipi_dsi_dcs_get_pixel_format(struct mipi_dsi_device *dsi, u8 *format);
+int mipi_dsi_dcs_enter_sleep_mode(struct mipi_dsi_device *dsi);
+int mipi_dsi_dcs_exit_sleep_mode(struct mipi_dsi_device *dsi);
+int mipi_dsi_dcs_set_display_off(struct mipi_dsi_device *dsi);
+int mipi_dsi_dcs_set_display_on(struct mipi_dsi_device *dsi);
+int mipi_dsi_dcs_set_column_address(struct mipi_dsi_device *dsi, u16 start,
+				    u16 end);
+int mipi_dsi_dcs_set_page_address(struct mipi_dsi_device *dsi, u16 start,
+				  u16 end);
+int mipi_dsi_dcs_set_tear_off(struct mipi_dsi_device *dsi);
+int mipi_dsi_dcs_set_tear_on(struct mipi_dsi_device *dsi,
+			     enum mipi_dsi_dcs_tear_mode mode);
+int mipi_dsi_dcs_set_pixel_format(struct mipi_dsi_device *dsi, u8 format);
+int mipi_dsi_dcs_set_tear_scanline(struct mipi_dsi_device *dsi, u16 scanline);
+int mipi_dsi_dcs_set_display_brightness(struct mipi_dsi_device *dsi,
+					u16 brightness);
+int mipi_dsi_dcs_get_display_brightness(struct mipi_dsi_device *dsi,
+					u16 *brightness);
+
+#endif /* __DRM_MIPI_DSI__ */

commit c5bb939d42fe776e1a5d44803fd616d8ac407b16
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Thu Jan 31 14:15:59 2019 +0800

    include: mipi_display: Add new DCS commands in the enum list
    
    Adding new DCS commands which are specified in the
    DCS 1.3 spec related to CABC.
    
    Change-Id: I42aeb4189f3444a8387a868ae25c8518a2f8d596
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/include/mipi_display.h b/include/mipi_display.h
index ddcc8ca731..c86be58bb2 100644
--- a/include/mipi_display.h
+++ b/include/mipi_display.h
@@ -115,6 +115,14 @@ enum {
 	MIPI_DCS_READ_MEMORY_CONTINUE	= 0x3E,
 	MIPI_DCS_SET_TEAR_SCANLINE	= 0x44,
 	MIPI_DCS_GET_SCANLINE		= 0x45,
+	MIPI_DCS_SET_DISPLAY_BRIGHTNESS	= 0x51,		/* MIPI DCS 1.3 */
+	MIPI_DCS_GET_DISPLAY_BRIGHTNESS	= 0x52,		/* MIPI DCS 1.3 */
+	MIPI_DCS_WRITE_CONTROL_DISPLAY	= 0x53,		/* MIPI DCS 1.3 */
+	MIPI_DCS_GET_CONTROL_DISPLAY	= 0x54,		/* MIPI DCS 1.3 */
+	MIPI_DCS_WRITE_POWER_SAVE	= 0x55,		/* MIPI DCS 1.3 */
+	MIPI_DCS_GET_POWER_SAVE		= 0x56,		/* MIPI DCS 1.3 */
+	MIPI_DCS_SET_CABC_MIN_BRIGHTNESS = 0x5E,	/* MIPI DCS 1.3 */
+	MIPI_DCS_GET_CABC_MIN_BRIGHTNESS = 0x5F,	/* MIPI DCS 1.3 */
 	MIPI_DCS_READ_DDB_START		= 0xA1,
 	MIPI_DCS_READ_DDB_CONTINUE	= 0xA8,
 };

commit 85e15df95e1008d95d0fe725b30986161a7c52dd
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Thu Jan 31 08:58:51 2019 +0800

    video/drm: Rename rockchip-inno-mipi-dphy.c to inno_mipi_phy.c
    
    Change-Id: I20b9c24fc7df3f4fb74eb8ce7b722b945ac7d245
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/Kconfig b/drivers/video/drm/Kconfig
index 635e66b4ef..56a0ce3177 100644
--- a/drivers/video/drm/Kconfig
+++ b/drivers/video/drm/Kconfig
@@ -31,6 +31,13 @@ config ROCKCHIP_INNO_HDMI_PHY
 	 use HDMI or TVE in RK322XH or RK322X, you should selet
 	 this option.
 
+config DRM_ROCKCHIP_INNO_MIPI_PHY
+	tristate "Rockchip INNO MIPI PHY driver"
+	depends on DRM_ROCKCHIP
+	help
+	  Enable this to support the Rockchip MIPI PHY
+	  with Innosilicon IP block.
+
 config DRM_ROCKCHIP_INNO_VIDEO_PHY
 	tristate "Rockchip INNO LVDS/TTL PHY driver"
 	depends on DRM_ROCKCHIP
diff --git a/drivers/video/drm/Makefile b/drivers/video/drm/Makefile
index ca4579c88f..1cb4c53d03 100644
--- a/drivers/video/drm/Makefile
+++ b/drivers/video/drm/Makefile
@@ -8,10 +8,10 @@ obj-y += rockchip_display.o rockchip_crtc.o rockchip_phy.o rockchip_bridge.o \
 		rockchip_vop.o rockchip_vop_reg.o bmp_helper.o
 
 obj-$(CONFIG_DRM_ROCKCHIP_MIPI_DSI)	+= rockchip_mipi_dsi.o
-obj-$(CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI) += dw_mipi_dsi.o \
-					  rockchip-inno-mipi-dphy.o
+obj-$(CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI) += dw_mipi_dsi.o
 obj-$(CONFIG_DRM_ROCKCHIP_DW_HDMI) += rockchip_dw_hdmi.o dw_hdmi.o
 obj-$(CONFIG_ROCKCHIP_INNO_HDMI_PHY) += rockchip-inno-hdmi-phy.o
+obj-$(CONFIG_DRM_ROCKCHIP_INNO_MIPI_PHY) += inno_mipi_phy.o
 obj-$(CONFIG_DRM_ROCKCHIP_INNO_VIDEO_PHY) += inno_video_phy.o
 obj-$(CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY) += inno_video_combo_phy.o
 obj-$(CONFIG_ROCKCHIP_DRM_TVE) += rockchip_drm_tve.o
diff --git a/drivers/video/drm/rockchip-inno-mipi-dphy.c b/drivers/video/drm/inno_mipi_phy.c
similarity index 91%
rename from drivers/video/drm/rockchip-inno-mipi-dphy.c
rename to drivers/video/drm/inno_mipi_phy.c
index 4ef418c060..9f41260c0b 100644
--- a/drivers/video/drm/rockchip-inno-mipi-dphy.c
+++ b/drivers/video/drm/inno_mipi_phy.c
@@ -17,11 +17,13 @@
 #include <dm/uclass.h>
 #include <dm/uclass-id.h>
 
-#include "rockchip_display.h"
-#include "rockchip_crtc.h"
-#include "rockchip_connector.h"
 #include "rockchip_phy.h"
-#include "rockchip_mipi_dsi.h"
+
+#define NSEC_PER_USEC		1000L
+#define USEC_PER_SEC		1000000L
+#define NSEC_PER_SEC		1000000000L
+
+#define UPDATE(v, h, l)		(((v) << (l)) & GENMASK((h), (l)))
 
 /* Innosilicon MIPI D-PHY registers */
 #define INNO_PHY_LANE_CTRL	0x00000
@@ -115,6 +117,31 @@ enum lane_type {
 	DATA_LANE_3,
 };
 
+struct mipi_dphy_timing {
+	unsigned int clkmiss;
+	unsigned int clkpost;
+	unsigned int clkpre;
+	unsigned int clkprepare;
+	unsigned int clksettle;
+	unsigned int clktermen;
+	unsigned int clktrail;
+	unsigned int clkzero;
+	unsigned int dtermen;
+	unsigned int eot;
+	unsigned int hsexit;
+	unsigned int hsprepare;
+	unsigned int hszero;
+	unsigned int hssettle;
+	unsigned int hsskip;
+	unsigned int hstrail;
+	unsigned int init;
+	unsigned int lpx;
+	unsigned int taget;
+	unsigned int tago;
+	unsigned int tasure;
+	unsigned int wakeup;
+};
+
 struct inno_mipi_dphy_timing {
 	u8 lpx;
 	u8 hs_prepare;
@@ -205,6 +232,34 @@ static inline void inno_update_bits(struct inno_mipi_dphy *inno, u32 reg,
 	inno_write(inno, reg, tmp);
 }
 
+static void mipi_dphy_timing_get_default(struct mipi_dphy_timing *timing,
+					 unsigned long period)
+{
+	/* Global Operation Timing Parameters */
+	timing->clkmiss = 0;
+	timing->clkpost = 70 + 52 * period;
+	timing->clkpre = 8 * period;
+	timing->clkprepare = 65;
+	timing->clksettle = 95;
+	timing->clktermen = 0;
+	timing->clktrail = 80;
+	timing->clkzero = 260;
+	timing->dtermen = 0;
+	timing->eot = 0;
+	timing->hsexit = 120;
+	timing->hsprepare = 65 + 4 * period;
+	timing->hszero = 145 + 6 * period;
+	timing->hssettle = 85 + 6 * period;
+	timing->hsskip = 40;
+	timing->hstrail = max(8 * period, 60 + 4 * period);
+	timing->init = 100000;
+	timing->lpx = 60;
+	timing->taget = 5 * timing->lpx;
+	timing->tago = 4 * timing->lpx;
+	timing->tasure = 2 * timing->lpx;
+	timing->wakeup = 1000000;
+}
+
 static void inno_mipi_dphy_timing_update(struct inno_mipi_dphy *inno,
 					 enum lane_type lane_type,
 					 struct inno_mipi_dphy_timing *t)

commit a492b30692db39dd0829b4f78a32d320b2a81485
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Mon Jan 7 16:42:04 2019 +0800

    cmd: ddr_tool: update ddr tool to version 1.01
    
    Change-Id: I05ffb164dfa6bb8aa997ab5783c274215dc938f5
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/cmd/ddr_tool/Makefile b/cmd/ddr_tool/Makefile
index 1fd808bbdd..08fab7e45b 100644
--- a/cmd/ddr_tool/Makefile
+++ b/cmd/ddr_tool/Makefile
@@ -17,4 +17,7 @@ endif
 ifdef CONFIG_ROCKCHIP_RK1808
 obj-$(CONFIG_CMD_DDR_TEST_TOOL) = ddr_test_rk1808.o
 endif
-
+ifndef CONFIG_CMD_MEMTESTER
+obj-$(CONFIG_CMD_DDR_TEST_TOOL) += ../memtester/ddr_tester_common.o
+obj-$(CONFIG_CMD_DDR_TEST_TOOL) += ../memtester/io_map.o
+endif
diff --git a/cmd/ddr_tool/ddr_test_px30.S b/cmd/ddr_tool/ddr_test_px30.S
index 985d7be5cb..a6c7352e3a 100644
--- a/cmd/ddr_tool/ddr_test_px30.S
+++ b/cmd/ddr_tool/ddr_test_px30.S
@@ -1,324 +1,388 @@
+/* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
+/*
+ * Copyright (C) 2019 Rockchip Electronics Co., Ltd.
+ */
+
 	.arch armv8-a+nosimd
 	.file	"ddr_test_code.c"
 	.text
 .Ltext0:
 	.cfi_sections	.debug_frame
-	.section	.text.set_ddr_freq,"ax",@progbits
+	.section	.text.crosstalk,"ax",@progbits
 	.align	2
-	.type	set_ddr_freq, %function
-set_ddr_freq:
-.LFB256:
-	.file 1 "cmd/ddr_tool/ddr_tool.c"
-	.loc 1 147 0
+	.global	crosstalk
+	.type	crosstalk, %function
+crosstalk:
+.LFB200:
+	.file 1 "cmd/ddr_tool/crosstalk.c"
+	.loc 1 46 0
 	.cfi_startproc
 .LVL0:
-	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 1 149 0
-	mov	x1, 16959
-	movk	x1, 0xf, lsl 16
-	cmp	x0, x1
-	.loc 1 147 0
+	stp	x29, x30, [sp, -144]!
+	.cfi_def_cfa_offset 144
+	.cfi_offset 29, -144
+	.cfi_offset 30, -136
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	str	x19, [sp, 16]
-	.cfi_offset 19, -16
-	.loc 1 149 0
-	bhi	.L2
-	.loc 1 150 0
-	add	x1, x1, 1
-	mul	x0, x0, x1
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -112
+	.cfi_offset 22, -104
+	.loc 1 66 0
+	adrp	x22, .LC2
+	.loc 1 46 0
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -96
+	.cfi_offset 24, -88
+	mov	x23, x0
+	stp	x19, x20, [sp, 16]
+	mov	x24, x1
+	stp	x25, x26, [sp, 64]
+	.loc 1 63 0
+	adrp	x0, .LC1
 .LVL1:
-	.loc 1 151 0
-	cbz	x0, .L3
-.L2:
-	.loc 1 152 0
-	bl	rockchip_ddrclk_sip_round_rate_v2
+	.loc 1 46 0
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 19, -128
+	.cfi_offset 20, -120
+	.cfi_offset 25, -80
+	.cfi_offset 26, -72
+	.cfi_offset 27, -64
+	.cfi_offset 28, -56
+	.loc 1 63 0
+	add	x0, x0, :lo12:.LC1
+	bl	printf
 .LVL2:
-	.loc 1 153 0
-	bl	rockchip_ddrclk_sip_set_rate_v2
+	.loc 1 71 0
+	add	x21, x29, 112
+	.loc 1 66 0
+	add	x0, x22, :lo12:.LC2
+	.loc 1 68 0
+	adrp	x25, .LC3
+	.loc 1 66 0
+	str	x0, [x29, 104]
+	.loc 1 64 0
+	mov	w20, 0
+	.loc 1 68 0
+	add	x0, x25, :lo12:.LC3
+	str	x0, [x29, 96]
 .LVL3:
-.L3:
-	.loc 1 155 0
-	bl	rockchip_ddrclk_sip_recalc_rate_v2
+.L6:
+	.loc 1 66 0
+	ldr	x0, [x29, 104]
+	.loc 1 71 0
+	mov	w26, 1
+	.loc 1 66 0
+	mov	w1, w20
+	.loc 1 71 0
+	lsl	w26, w26, w20
+	.loc 1 65 0
+	mov	w28, -1
+	.loc 1 67 0
+	mov	w27, 0
+	.loc 1 66 0
+	bl	printf
 .LVL4:
-	mov	x19, x0
+.L5:
+	.loc 1 68 0
+	ldr	x0, [x29, 96]
+	mov	w1, w27
+	.loc 1 69 0
+	mvn	w28, w28
 .LVL5:
-	.loc 1 156 0
-	mov	x1, x0
-	adrp	x0, .LC1
-.LVL6:
-	add	x0, x0, :lo12:.LC1
+	mov	x19, 0
+	.loc 1 68 0
 	bl	printf
+.LVL6:
+.L2:
+	.loc 1 71 0 discriminator 3
+	eor	w0, w26, w28
+	str	w0, [x19, x21]
+	add	x19, x19, 4
+	.loc 1 72 0 discriminator 3
+	mvn	w28, w28
 .LVL7:
-	.loc 1 162 0
-	mov	w0, w19
-	ldr	x19, [sp, 16]
+	.loc 1 70 0 discriminator 3
+	cmp	x19, 32
+	bne	.L2
+	.loc 1 74 0
+	mov	w1, w19
+	mov	x0, x21
+	bl	data_cpu_2_io
 .LVL8:
-	ldp	x29, x30, [sp], 32
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_def_cfa 31, 0
-	ret
-	.cfi_endproc
-.LFE256:
-	.size	set_ddr_freq, .-set_ddr_freq
-	.section	.text.set_vdd_logic,"ax",@progbits
-	.align	2
-	.type	set_vdd_logic, %function
-set_vdd_logic:
-.LFB257:
-	.loc 1 165 0
-	.cfi_startproc
+	.loc 1 75 0
+	mov	x3, x24
+	mov	x2, x23
+	mov	w1, w19
+	mov	x0, x21
+	bl	write_buf_to_ddr
 .LVL9:
-	stp	x29, x30, [sp, -48]!
-	.cfi_def_cfa_offset 48
-	.cfi_offset 29, -48
-	.cfi_offset 30, -40
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
-	.loc 1 169 0
-	add	x1, x29, 40
-	.loc 1 165 0
-	mov	w20, w0
-	.loc 1 169 0
-	adrp	x0, .LC2
+	.loc 1 76 0
+	mov	w4, 1
+	mov	x3, x24
+	mov	x2, x23
+	mov	w1, w19
+	mov	x0, x21
+	bl	cmp_buf_data
 .LVL10:
-	add	x0, x0, :lo12:.LC2
-	bl	regulator_get_by_platname
+	cbz	x0, .L3
 .LVL11:
-	.loc 1 170 0
-	cbz	w0, .L9
-	mov	w19, w0
-	.loc 1 171 0
-	adrp	x0, .LC3
-.LVL12:
-	add	x0, x0, :lo12:.LC3
-.LVL13:
-.L15:
-	.loc 1 179 0
-	bl	printf
-.LVL14:
-.L8:
-	.loc 1 181 0
-	mov	w0, w19
+.L11:
+	.loc 1 78 0
+	mov	w0, -1
+.L1:
+	.loc 1 111 0
 	ldp	x19, x20, [sp, 16]
-.LVL15:
-	ldp	x29, x30, [sp], 48
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+.LVL12:
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 144
 	.cfi_remember_state
 	.cfi_restore 30
 	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
 	.cfi_restore 19
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL16:
-.L9:
+.LVL13:
+.L3:
 	.cfi_restore_state
-	.loc 1 176 0
-	ldr	x0, [x29, 40]
+	.loc 1 67 0 discriminator 2
+	add	w27, w27, 1
+.LVL14:
+	cmp	w27, 2
+	bne	.L5
+	.loc 1 64 0 discriminator 2
+	add	w20, w20, 1
+.LVL15:
+	cmp	w20, 32
+	bne	.L6
+	.loc 1 85 0
+	adrp	x0, .LC4
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+.LVL16:
+	.loc 1 86 0
+	mov	x0, 128
+	bl	malloc
 .LVL17:
-	mov	w1, w20
-	bl	regulator_set_value
+	mov	x21, x0
 .LVL18:
-	mov	w19, w0
+	.loc 1 87 0
+	cbnz	x0, .L7
+	.loc 1 88 0
+	adrp	x0, .LC5
 .LVL19:
-	.loc 1 177 0
-	mov	x0, 100
+	mov	x1, 128
+	add	x0, x0, :lo12:.LC5
+	bl	printf
 .LVL20:
-	bl	udelay
+.L7:
+	adrp	x26, .LANCHOR0
+	.loc 1 91 0
+	add	x27, x22, :lo12:.LC2
 .LVL21:
-	.loc 1 178 0
-	cbz	w19, .L8
-	.loc 1 179 0
-	adrp	x0, .LC4
-	add	x0, x0, :lo12:.LC4
-	b	.L15
+	.loc 1 93 0
+	add	x25, x25, :lo12:.LC3
+	.loc 1 98 0
+	add	x26, x26, :lo12:.LANCHOR0
+	.loc 1 69 0
+	mov	w20, 0
+.LVL22:
+.L14:
+	.loc 1 92 0
+	mov	w22, 0
+	.loc 1 96 0
+	mov	w28, 1
+	.loc 1 91 0
+	mov	w1, w20
+	mov	x0, x27
+	bl	printf
+.LVL23:
+.L13:
+	.loc 1 93 0
+	mov	w1, w22
+	mov	x0, x25
+	bl	printf
+.LVL24:
+	.loc 1 96 0
+	mov	x19, 0
+	lsl	w1, w28, w22
+.LVL25:
+.L10:
+	ldr	w0, [x19, x26]
+	.loc 1 95 0
+	cbz	w20, .L8
+	.loc 1 96 0
+	eor	w0, w0, w1
+.L8:
+	.loc 1 98 0
+	str	w0, [x21, x19]
+	add	x19, x19, 4
+	.loc 1 94 0
+	cmp	x19, 128
+	bne	.L10
+	.loc 1 100 0
+	mov	w1, w19
+	mov	x0, x21
+	bl	data_cpu_2_io
+.LVL26:
+	.loc 1 101 0
+	mov	x3, x24
+	mov	x2, x23
+	mov	w1, w19
+	mov	x0, x21
+	bl	write_buf_to_ddr
+.LVL27:
+	.loc 1 103 0
+	mov	w4, 1
+	mov	x3, x24
+	mov	x2, x23
+	mov	w1, w19
+	mov	x0, x21
+	bl	cmp_buf_data
+.LVL28:
+	cbnz	x0, .L11
+	.loc 1 106 0
+	cbz	w20, .L12
+	.loc 1 92 0 discriminator 2
+	add	w22, w22, 1
+.LVL29:
+	cmp	w22, 32
+	bne	.L13
+.L12:
+	.loc 1 90 0 discriminator 2
+	add	w20, w20, 1
+.LVL30:
+	cmp	w20, 2
+	bne	.L14
+	.loc 1 110 0
+	mov	w0, 0
+	b	.L1
+	.cfi_endproc
+.LFE200:
+	.size	crosstalk, .-crosstalk
+	.section	.text.set_ddr_freq,"ax",@progbits
+	.align	2
+	.weak	set_ddr_freq
+	.type	set_ddr_freq, %function
+set_ddr_freq:
+.LFB253:
+	.file 2 "cmd/ddr_tool/ddr_tool.c"
+	.loc 2 45 0
+	.cfi_startproc
+.LVL31:
+	.loc 2 47 0
+	mov	w0, 0
+.LVL32:
+	ret
+	.cfi_endproc
+.LFE253:
+	.size	set_ddr_freq, .-set_ddr_freq
+	.section	.text.set_vdd_logic,"ax",@progbits
+	.align	2
+	.weak	set_vdd_logic
+	.type	set_vdd_logic, %function
+set_vdd_logic:
+.LFB254:
+	.loc 2 50 0
+	.cfi_startproc
+.LVL33:
+	.loc 2 52 0
+	mov	w0, -1
+.LVL34:
+	ret
 	.cfi_endproc
-.LFE257:
+.LFE254:
 	.size	set_vdd_logic, .-set_vdd_logic
-	.section	.text.random_test,"ax",@progbits
+	.section	.text.diagonalscan,"ax",@progbits
 	.align	2
-	.global	random_test
-	.type	random_test, %function
-random_test:
-.LFB274:
-	.file 2 "cmd/ddr_tool/random_test.c"
-	.loc 2 88 0
+	.global	diagonalscan
+	.type	diagonalscan, %function
+diagonalscan:
+.LFB268:
+	.file 3 "cmd/ddr_tool/diagonalscan.c"
+	.loc 3 16 0
 	.cfi_startproc
-.LVL22:
+.LVL35:
 	stp	x29, x30, [sp, -112]!
 	.cfi_def_cfa_offset 112
 	.cfi_offset 29, -112
 	.cfi_offset 30, -104
-.LBB12:
-.LBB13:
-	.loc 2 18 0
-	mov	x2, x1
-.LBE13:
-.LBE12:
-	.loc 2 88 0
+	.loc 3 19 0
+	mov	x2, 32
+	.loc 3 16 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -80
 	.cfi_offset 22, -72
-	mov	x22, x0
-.LVL23:
+	mov	x22, x1
 	stp	x23, x24, [sp, 48]
-.LBB18:
-.LBB14:
-	.loc 2 37 0
-	adrp	x21, .LC6
-.LBE14:
-.LBE18:
-	.loc 2 88 0
-	stp	x27, x28, [sp, 80]
 	.cfi_offset 23, -64
 	.cfi_offset 24, -56
-	.cfi_offset 27, -32
-	.cfi_offset 28, -24
-	mov	x23, x1
-.LVL24:
+	sub	x23, x1, #32
+	.loc 3 19 0
+	adrp	x1, .LANCHOR1
+.LVL36:
+	add	x1, x1, :lo12:.LANCHOR1
+	.loc 3 16 0
 	stp	x19, x20, [sp, 16]
-.LBB19:
-.LBB15:
-	.loc 2 18 0
-	mov	w1, -2139062144
-.LVL25:
-.LBE15:
-.LBE19:
-	.loc 2 88 0
 	stp	x25, x26, [sp, 64]
 	.cfi_offset 19, -96
 	.cfi_offset 20, -88
 	.cfi_offset 25, -48
 	.cfi_offset 26, -40
-.LBB20:
-.LBB16:
-	.loc 2 23 0
-	adrp	x24, .LC5
-	.loc 2 18 0
-	bl	memset
-.LVL26:
-	.loc 2 23 0
-	add	x24, x24, :lo12:.LC5
-	.loc 2 37 0
-	add	x21, x21, :lo12:.LC6
-	.loc 2 24 0
-	lsr	x0, x23, 2
-	.loc 2 14 0
-	mov	w27, 0
-	.loc 2 20 0
-	mov	w25, 1077952576
-	.loc 2 19 0
-	mov	w20, -2139062144
-	.loc 2 22 0
-	mov	w28, 0
-	.loc 2 24 0
-	str	x0, [x29, 96]
-.LVL27:
-.L22:
-	.loc 2 23 0
-	mov	w1, w28
-	mov	x0, x24
-	bl	printf
-.LVL28:
-	.loc 2 24 0
-	mov	w1, 0
-.LVL29:
-.L17:
-	ldr	x2, [x29, 96]
-	uxtw	x0, w1
-	cmp	x0, x2
-	bcc	.L21
-.LVL30:
-.L20:
-	.loc 2 37 0
-	mov	x0, x21
-	.loc 2 22 0
-	add	w28, w28, 1
-.LVL31:
-	.loc 2 37 0
+	.loc 3 16 0
+	mov	x25, x0
+	.loc 3 19 0
+	add	x0, x29, 80
+.LVL37:
+	bl	memcpy
+.LVL38:
+	.loc 3 24 0
+	adrp	x0, .LC6
+	add	x0, x0, :lo12:.LC6
 	bl	printf
-.LVL32:
-	.loc 2 35 0
-	lsr	w25, w25, 1
-.LVL33:
-	.loc 2 36 0
-	lsr	w20, w20, 1
-.LVL34:
-	.loc 2 22 0
-	cmp	w28, 8
-	bne	.L22
-	mov	x19, -1
-	b	.L19
-.LVL35:
-.L21:
-	.loc 2 25 0
-	lsl	x0, x0, 2
-	add	x19, x22, x0
-	ldr	w2, [x22, x0]
-	str	w2, [x29, 108]
-	.loc 2 26 0
-	uxtw	x2, w2
-	cmp	w2, w20
-	beq	.L18
-.LVL36:
-	.loc 2 28 0
-	ldr	w27, [x19]
-	.loc 2 33 0
-	cmn	x19, #1
-	beq	.L20
-.LVL37:
-.L19:
-	.loc 2 39 0
+.LVL39:
+	.loc 3 25 0
+	bl	get_page_size
+.LVL40:
+	sxtw	x19, w0
+.LVL41:
+	.loc 3 27 0
+	tbz	w19, #31, .L28
+	.loc 3 28 0
+	mov	w1, w19
 	adrp	x0, .LC7
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.LVL38:
-	.loc 2 40 0
-	cmn	x19, #1
-	beq	.L23
-	.loc 2 41 0
-	ldr	w2, [x29, 108]
-	adrp	x0, .LC8
-	mov	w4, w20
-	mov	w3, w27
-	mov	x1, x19
-	add	x0, x0, :lo12:.LC8
-	bl	printf
-.LVL39:
-.L36:
-.LBE16:
-.LBE20:
-.LBB21:
-.LBB22:
-	.loc 2 82 0
+.LVL42:
+	.loc 3 29 0
 	mov	w0, -1
-.L16:
-.LBE22:
-.LBE21:
-	.loc 2 96 0
+.L31:
+.LVL43:
+.L27:
+	.loc 3 64 0
 	ldp	x19, x20, [sp, 16]
+.LVL44:
 	ldp	x21, x22, [sp, 32]
-.LVL40:
 	ldp	x23, x24, [sp, 48]
-.LVL41:
 	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
+.LVL45:
 	ldp	x29, x30, [sp], 112
 	.cfi_remember_state
 	.cfi_restore 30
 	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
 	.cfi_restore 25
 	.cfi_restore 26
 	.cfi_restore 23
@@ -329,295 +393,276 @@ random_test:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL42:
-.L18:
-	.cfi_restore_state
-.LBB24:
-.LBB17:
-	.loc 2 31 0
-	str	w25, [x22, x0]
-	.loc 2 24 0
-	add	w1, w1, 1
-.LVL43:
-	b	.L17
-.LVL44:
-.L23:
-.LBE17:
-.LBE24:
-.LBB25:
-.LBB23:
-	.loc 2 58 0
-	adrp	x25, .LC9
-.LVL45:
-	.loc 2 76 0
-	adrp	x24, .LC10
-	.loc 2 66 0
-	lsr	x28, x23, 3
 .LVL46:
-	.loc 2 58 0
-	add	x25, x25, :lo12:.LC9
-	.loc 2 76 0
-	add	x24, x24, :lo12:.LC10
-	.loc 2 66 0
-	mov	x27, 0
-	mov	x19, 0
+.L28:
+	.cfi_restore_state
+	.loc 3 40 0
+	lsr	x22, x22, 1
 .LVL47:
-.L30:
-	.loc 2 58 0
-	mov	x1, x19
-	mov	x0, x25
-	bl	printf
+	add	x23, x25, x23
 .LVL48:
-	.loc 2 60 0
-	lsl	x20, x19, 8
-	lsl	x0, x19, 24
-	orr	x20, x20, x19, lsl 16
-	orr	x0, x0, x19, lsl 32
-	.loc 2 64 0
-	mov	x2, x23
-	.loc 2 60 0
-	orr	x20, x20, x0
-	lsl	x0, x19, 40
-	orr	x0, x0, x19, lsl 48
-	orr	x20, x20, x0
-	orr	x0, x19, x19, lsl 56
-	orr	x20, x20, x0
+	mov	w21, 0
+	mov	x20, 0
+	.loc 3 37 0
+	mov	w1, 32
+	add	x0, x29, 80
+	bl	data_cpu_2_io
 .LVL49:
-	.loc 2 64 0
-	mov	x0, x22
-	mov	w1, w20
-	bl	memset
+	.loc 3 39 0
+	mov	x2, 32
+	add	x1, x29, 80
+	mov	x0, x25
+	bl	memcpy
 .LVL50:
-	.loc 2 66 0
+.L30:
+	.loc 3 40 0 discriminator 1
+	cmp	x20, x22
+	bcc	.L34
 	mov	x0, 0
 .LVL51:
-.L25:
-	cmp	x0, x28
-	bne	.L29
+	.loc 3 63 0
+	b	.L27
 .LVL52:
-.L28:
-	.loc 2 76 0
-	mov	x0, x24
+.L34:
+	.loc 3 41 0
+	uxtw	x24, w21
+	mov	x2, 32
+	sub	x26, x23, x24
+	add	x1, x29, 80
+	mov	x0, x26
+	bl	memcpy
 .LVL53:
-	.loc 2 57 0
-	add	x19, x19, 1
+	.loc 3 44 0
+	add	x2, x20, x25
+	.loc 3 43 0
+	mov	x3, 32
+	mov	w4, 1
+	add	x2, x2, x24
+	mov	w1, w3
+	add	x0, x29, 80
+	bl	cmp_buf_data
 .LVL54:
-	.loc 2 76 0
-	bl	printf
+	.loc 3 45 0
+	cbnz	x0, .L27
+	.loc 3 48 0
+	add	x24, x24, 40
+	add	x20, x20, x19
 .LVL55:
-	.loc 2 57 0
-	cmp	x19, 256
-	bne	.L30
-	mov	x21, -1
-	b	.L27
+	cmp	x19, x24
+	add	w21, w21, 8
 .LVL56:
-.L29:
-	lsl	x1, x0, 3
-	add	x21, x1, x22
-	.loc 2 67 0
-	ldr	x26, [x1, x22]
+	csel	w21, w21, wzr, cs
 .LVL57:
-	.loc 2 68 0
-	cmp	x20, x26
-	beq	.L26
+	.loc 3 50 0
+	cmp	x22, x20
+	bls	.L33
+	.loc 3 51 0
+	add	x0, x25, x20
 .LVL58:
-	.loc 2 70 0
-	ldr	x27, [x21]
+	mov	x2, 32
+	add	x1, x29, 80
+	add	x0, x0, x21, uxtw
+	bl	memcpy
 .LVL59:
-	.loc 2 74 0
-	cmn	x21, #1
-	beq	.L28
-.LVL60:
-.L27:
-	.loc 2 78 0
-	adrp	x0, .LC11
-	add	x0, x0, :lo12:.LC11
-	bl	printf
-.LVL61:
-	.loc 2 84 0
-	mov	w0, 0
-	.loc 2 79 0
-	cmn	x21, #1
-	beq	.L16
-	.loc 2 80 0
-	mov	x4, x20
-	mov	x3, x27
+.L33:
+	.loc 3 53 0
+	mov	x3, 32
+	mov	w4, 1
 	mov	x2, x26
-	mov	x1, x21
-	adrp	x0, .LC12
-	add	x0, x0, :lo12:.LC12
-	bl	printf
-.LVL62:
-	b	.L36
-.LVL63:
-.L26:
-	.loc 2 66 0
-	add	x0, x0, 1
-.LVL64:
-	b	.L25
-.LBE23:
-.LBE25:
+	mov	w1, w3
+	add	x0, x29, 80
+	sub	x23, x23, x19
+	bl	cmp_buf_data
+.LVL60:
+	.loc 3 56 0
+	cbz	x0, .L30
+	b	.L27
 	.cfi_endproc
-.LFE274:
-	.size	random_test, .-random_test
-	.section	.text.scan_freq,"ax",@progbits
+.LFE268:
+	.size	diagonalscan, .-diagonalscan
+	.section	.text.random_test,"ax",@progbits
 	.align	2
-	.type	scan_freq, %function
-scan_freq:
-.LFB255:
-	.loc 1 104 0
+	.global	random_test
+	.type	random_test, %function
+random_test:
+.LFB271:
+	.file 4 "cmd/ddr_tool/random_test.c"
+	.loc 4 97 0
 	.cfi_startproc
-.LVL65:
-	stp	x29, x30, [sp, -96]!
-	.cfi_def_cfa_offset 96
-	.cfi_offset 29, -96
-	.cfi_offset 30, -88
+.LVL61:
+	stp	x29, x30, [sp, -112]!
+	.cfi_def_cfa_offset 112
+	.cfi_offset 29, -112
+	.cfi_offset 30, -104
+.LBB6:
+.LBB7:
+	.loc 4 19 0
+	mov	x2, x1
+.LBE7:
+.LBE6:
+	.loc 4 97 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -80
-	.cfi_offset 20, -72
-	mov	w20, w0
-	stp	x23, x24, [sp, 48]
-	.loc 1 111 0
-	mov	w0, 16960
-.LVL66:
-	.loc 1 104 0
+	.cfi_offset 19, -96
+	.cfi_offset 20, -88
+	mov	x20, x1
 	stp	x21, x22, [sp, 32]
-	.loc 1 111 0
-	movk	w0, 0xf, lsl 16
-	.loc 1 104 0
+	mov	x19, x0
+.LVL62:
+	stp	x23, x24, [sp, 48]
+.LBB12:
+.LBB8:
+	.loc 4 19 0
+	mov	w1, -2139062144
+.LVL63:
+.LBE8:
+.LBE12:
+	.loc 4 97 0
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 21, -80
+	.cfi_offset 22, -72
+	.cfi_offset 23, -64
+	.cfi_offset 24, -56
+	.cfi_offset 27, -32
+	.cfi_offset 28, -24
+.LBB13:
+.LBB9:
+	.loc 4 24 0
+	adrp	x24, .LC8
+.LBE9:
+.LBE13:
+	.loc 4 97 0
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 23, -48
-	.cfi_offset 24, -40
-	.cfi_offset 21, -64
-	.cfi_offset 22, -56
-	.cfi_offset 25, -32
-	.cfi_offset 26, -24
-	mov	x24, x2
-	str	x27, [sp, 80]
-	.cfi_offset 27, -16
-	.loc 1 111 0
-	cmp	w20, w0
-	bls	.L38
-	.loc 1 112 0
-	udiv	w20, w20, w0
+	.cfi_offset 25, -48
+	.cfi_offset 26, -40
+.LBB14:
+.LBB10:
+	.loc 4 19 0
+	bl	memset
+.LVL64:
+	.loc 4 25 0
+	lsr	x0, x20, 2
+	.loc 4 24 0
+	add	x24, x24, :lo12:.LC8
+	.loc 4 25 0
+	str	x0, [x29, 104]
+	.loc 4 15 0
+	mov	w27, 0
+	.loc 4 41 0
+	adrp	x0, .LC9
+	.loc 4 21 0
+	mov	w23, 1077952576
+	.loc 4 41 0
+	add	x0, x0, :lo12:.LC9
+	.loc 4 20 0
+	mov	w21, -2139062144
+	.loc 4 23 0
+	mov	w22, 0
+	.loc 4 41 0
+	str	x0, [x29, 96]
+.LVL65:
+.L43:
+	.loc 4 24 0
+	mov	w1, w22
+	mov	x0, x24
+	bl	printf
+.LVL66:
+	.loc 4 25 0
+	mov	w1, 0
 .LVL67:
 .L38:
-	.loc 1 113 0
-	cmp	w1, w0
-	bls	.L39
-	.loc 1 114 0
-	udiv	w1, w1, w0
+	ldr	x2, [x29, 104]
+	uxtw	x0, w1
+	cmp	x0, x2
+	bcc	.L42
 .LVL68:
-.L39:
-	.loc 1 116 0
-	cmp	w20, w1
-	bls	.L40
-	mov	w0, w20
-	mov	w20, w1
+.L41:
+	.loc 4 41 0
+	ldr	x0, [x29, 96]
+	.loc 4 23 0
+	add	w22, w22, 1
 .LVL69:
-	mov	w1, w0
+	.loc 4 39 0
+	lsr	w23, w23, 1
 .LVL70:
-.L40:
-	.loc 1 125 0
-	mov	w25, 16960
-	.loc 1 126 0
-	adrp	x22, .LC13
-	.loc 1 129 0
-	adrp	x23, .LC14
-	.loc 1 121 0
-	sub	w19, w1, w20
+	.loc 4 40 0
+	lsr	w21, w21, 1
 .LVL71:
-	.loc 1 126 0
-	add	x22, x22, :lo12:.LC13
-	.loc 1 129 0
-	add	x23, x23, :lo12:.LC14
-	.loc 1 123 0
-	mov	w21, 0
-	.loc 1 125 0
-	movk	w25, 0xf, lsl 16
+	.loc 4 41 0
+	bl	printf
 .LVL72:
-.L41:
-	.loc 1 123 0 discriminator 1
-	cmp	x24, x21, uxtw
-	bhi	.L45
-	.loc 1 123 0 is_stmt 0 discriminator 3
-	cbnz	x24, .L46
-.L45:
-	.loc 1 124 0 is_stmt 1
-	bl	rand
+	.loc 4 23 0
+	cmp	w22, 8
+	bne	.L43
+	mov	x28, -1
+	b	.L40
 .LVL73:
-	udiv	w1, w0, w19
-	msub	w0, w1, w19, w0
+.L42:
+	.loc 4 26 0
+	lsl	x0, x0, 2
+	add	x5, x19, x0
+	ldr	w26, [x19, x0]
+	.loc 4 27 0
+	cmp	w26, w21
+	beq	.L39
+	.loc 4 28 0
+	mov	x28, x5
 .LVL74:
-	add	w0, w0, w20
-	.loc 1 125 0
-	mul	w0, w0, w25
-	and	x0, x0, 4294967232
-	bl	rockchip_ddrclk_sip_round_rate_v2
+	.loc 4 29 0
+	add	x1, x5, 4
 .LVL75:
-	.loc 1 126 0
-	mov	w1, w21
-	mov	w2, w0
-	.loc 1 125 0
-	mov	x26, x0
+	mov	x0, x5
+	bl	flush_dcache_range
 .LVL76:
-	.loc 1 126 0
-	mov	x0, x22
+	.loc 4 37 0
+	cmn	x28, #1
+	.loc 4 32 0
+	ldr	w27, [x28]
+	.loc 4 37 0
+	beq	.L41
 .LVL77:
+.L40:
+	.loc 4 43 0
+	adrp	x0, .LC10
+	add	x0, x0, :lo12:.LC10
 	bl	printf
 .LVL78:
-	.loc 1 127 0
-	uxtw	x0, w26
-	bl	rockchip_ddrclk_sip_set_rate_v2
-.LVL79:
-	.loc 1 128 0
-	bl	rockchip_ddrclk_sip_recalc_rate_v2
-.LVL80:
-	.loc 1 129 0
-	mov	w1, w0
-	.loc 1 128 0
-	mov	x27, x0
-.LVL81:
-	.loc 1 129 0
-	mov	x0, x23
-.LVL82:
-	bl	printf
-.LVL83:
-	.loc 1 132 0
-	ldr	x0, [x18]
-	mov	x1, 1048576
-	ldr	x0, [x0, 136]
-	bl	random_test
-.LVL84:
-	mov	w26, w0
-.LVL85:
-	.loc 1 133 0
-	cbz	w0, .L42
-	.loc 1 134 0
-	adrp	x0, .LC15
-.LVL86:
-	mov	w1, w27
-	add	x0, x0, :lo12:.LC15
+	.loc 4 44 0
+	cmn	x28, #1
+	beq	.L44
+	.loc 4 45 0
+	adrp	x0, .LC11
+	mov	w4, w21
+	mov	w3, w27
+	mov	w2, w26
+	mov	x1, x28
+	add	x0, x0, :lo12:.LC11
 	bl	printf
-.LVL87:
+.LVL79:
+.L57:
+.LBE10:
+.LBE14:
+.LBB15:
+.LBB16:
+	.loc 4 91 0
+	mov	w0, -1
 .L37:
-	.loc 1 144 0
-	mov	w0, w26
-	ldr	x27, [sp, 80]
+.LBE16:
+.LBE15:
+	.loc 4 105 0
 	ldp	x19, x20, [sp, 16]
-.LVL88:
+.LVL80:
 	ldp	x21, x22, [sp, 32]
-.LVL89:
 	ldp	x23, x24, [sp, 48]
-.LVL90:
 	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 96
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
 	.cfi_remember_state
 	.cfi_restore 30
 	.cfi_restore 29
 	.cfi_restore 27
+	.cfi_restore 28
 	.cfi_restore 25
 	.cfi_restore 26
 	.cfi_restore 23
@@ -628,328 +673,275 @@ scan_freq:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL91:
-.L42:
+.LVL81:
+.L39:
 	.cfi_restore_state
-	.loc 1 137 0
-	bl	ctrlc
-.LVL92:
-	cbz	w0, .L44
-.LVL93:
-.L46:
-	.loc 1 123 0
-	mov	w26, 0
-	b	.L37
-.LVL94:
+.LBB18:
+.LBB11:
+	.loc 4 35 0
+	str	w23, [x19, x0]
+	.loc 4 25 0
+	add	w1, w1, 1
+.LVL82:
+	b	.L38
+.LVL83:
 .L44:
-	.loc 1 123 0 is_stmt 0 discriminator 2
-	add	w21, w21, 1
-.LVL95:
-	b	.L41
-	.cfi_endproc
-.LFE255:
-	.size	scan_freq, .-scan_freq
-	.section	.text.cpu_2_io,"ax",@progbits
-	.align	2
-	.global	cpu_2_io
-	.type	cpu_2_io, %function
-cpu_2_io:
-.LFB275:
-	.file 3 "cmd/ddr_tool/tool_common.c"
-	.loc 3 11 0 is_stmt 1
-	.cfi_startproc
-.LVL96:
-	ret
-	.cfi_endproc
-.LFE275:
-	.size	cpu_2_io, .-cpu_2_io
-	.section	.text.write_buf_to_ddr,"ax",@progbits
-	.align	2
-	.global	write_buf_to_ddr
-	.type	write_buf_to_ddr, %function
-write_buf_to_ddr:
-.LFB276:
-	.loc 3 29 0
-	.cfi_startproc
+.LBE11:
+.LBE18:
+.LBB19:
+.LBB17:
+	.loc 4 64 0
+	adrp	x26, .LC12
+	.loc 4 84 0
+	adrp	x24, .LC13
+	.loc 4 72 0
+	lsr	x28, x20, 3
+	.loc 4 64 0
+	add	x26, x26, :lo12:.LC12
+	.loc 4 84 0
+	add	x24, x24, :lo12:.LC13
+	.loc 4 72 0
+	mov	x27, 0
+	mov	x21, 0
+.LVL84:
+.L51:
+	.loc 4 64 0
+	mov	x1, x21
+	mov	x0, x26
+	bl	printf
+.LVL85:
+	.loc 4 66 0
+	lsl	x22, x21, 24
+	lsl	x0, x21, 8
+	orr	x22, x22, x21, lsl 32
+	orr	x0, x0, x21, lsl 16
+	.loc 4 70 0
+	mov	x2, x20
+	.loc 4 66 0
+	orr	x22, x22, x0
+	lsl	x0, x21, 40
+	orr	x0, x0, x21, lsl 48
+	orr	x22, x22, x0
+	orr	x0, x21, x21, lsl 56
+	orr	x22, x22, x0
+.LVL86:
+	.loc 4 70 0
+	mov	x0, x19
+	mov	w1, w22
+	bl	memset
+.LVL87:
+	.loc 4 72 0
+	mov	x0, 0
+.LVL88:
+.L46:
+	cmp	x0, x28
+	bne	.L50
+.LVL89:
+.L49:
+	.loc 4 84 0
+	mov	x0, x24
+	.loc 4 63 0
+	add	x21, x21, 1
+.LVL90:
+	.loc 4 84 0
+	bl	printf
+.LVL91:
+	.loc 4 63 0
+	cmp	x21, 256
+	bne	.L51
+	mov	x23, -1
+	b	.L48
+.LVL92:
+.L50:
+	lsl	x1, x0, 3
+	add	x23, x1, x19
+	.loc 4 73 0
+	ldr	x25, [x1, x19]
+.LVL93:
+	.loc 4 74 0
+	cmp	x22, x25
+	beq	.L47
+.LVL94:
+	.loc 4 76 0
+	add	x1, x23, 4
+	mov	x0, x23
+.LVL95:
+	bl	flush_dcache_range
+.LVL96:
+	.loc 4 78 0
+	ldr	x27, [x23]
 .LVL97:
-	.loc 3 37 0
-	lsr	w1, w1, 3
+	.loc 4 82 0
+	cmn	x23, #1
+	beq	.L49
 .LVL98:
-	.loc 3 39 0
-	lsr	x3, x3, 3
+.L48:
+	.loc 4 86 0
+	adrp	x0, .LC14
+	add	x0, x0, :lo12:.LC14
+	bl	printf
 .LVL99:
-	.loc 3 37 0
-	sub	w1, w1, #1
+	.loc 4 93 0
+	mov	w0, 0
+	.loc 4 87 0
+	cmn	x23, #1
+	beq	.L37
+	.loc 4 88 0
+	mov	x4, x22
+	mov	x3, x27
+	mov	x2, x25
+	mov	x1, x23
+	adrp	x0, .LC15
+	add	x0, x0, :lo12:.LC15
+	bl	printf
 .LVL100:
-	.loc 3 39 0
-	mov	w4, 0
-	mov	w5, 0
+	b	.L57
 .LVL101:
-.L53:
-	.loc 3 39 0 is_stmt 0 discriminator 1
-	uxtw	x6, w5
-	cmp	x6, x3
-	bcc	.L54
-	.loc 3 44 0 is_stmt 1
-	ret
-.L54:
-	.loc 3 40 0 discriminator 3
-	ldr	x7, [x0, w4, uxtw 3]
-	.loc 3 41 0 discriminator 3
-	add	w4, w4, 1
+.L47:
+	.loc 4 72 0
+	add	x0, x0, 1
 .LVL102:
-	.loc 3 40 0 discriminator 3
-	str	x7, [x2, x6, lsl 3]
-	.loc 3 42 0 discriminator 3
-	and	w4, w1, w4
-.LVL103:
-	.loc 3 39 0 discriminator 3
-	add	w5, w5, 1
-.LVL104:
-	b	.L53
+	b	.L46
+.LBE17:
+.LBE19:
 	.cfi_endproc
-.LFE276:
-	.size	write_buf_to_ddr, .-write_buf_to_ddr
-	.section	.text.cmp_buf_data,"ax",@progbits
+.LFE271:
+	.size	random_test, .-random_test
+	.section	.text.scan_freq,"ax",@progbits
 	.align	2
-	.global	cmp_buf_data
-	.type	cmp_buf_data, %function
-cmp_buf_data:
-.LFB277:
-	.loc 3 48 0
+	.type	scan_freq, %function
+scan_freq:
+.LFB255:
+	.loc 2 55 0
 	.cfi_startproc
-.LVL105:
-	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 3 60 0
-	lsr	w1, w1, 3
-.LVL106:
-	.loc 3 48 0
-	mov	w10, w4
-	.loc 3 60 0
-	sub	w1, w1, #1
-	.loc 3 48 0
+.LVL103:
+	stp	x29, x30, [sp, -80]!
+	.cfi_def_cfa_offset 80
+	.cfi_offset 29, -80
+	.cfi_offset 30, -72
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	.loc 3 62 0
-	lsr	x3, x3, 3
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -64
+	.cfi_offset 20, -56
+	mov	w19, w0
+	stp	x21, x22, [sp, 32]
+	.loc 2 61 0
+	mov	w0, 16960
+.LVL104:
+	.loc 2 55 0
+	stp	x23, x24, [sp, 48]
+	.loc 2 61 0
+	movk	w0, 0xf, lsl 16
+	.loc 2 55 0
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 21, -48
+	.cfi_offset 22, -40
+	.cfi_offset 23, -32
+	.cfi_offset 24, -24
+	.cfi_offset 25, -16
+	.cfi_offset 26, -8
+	.loc 2 55 0
+	mov	x22, x2
+	.loc 2 61 0
+	cmp	w19, w0
+	bls	.L59
+	.loc 2 62 0
+	udiv	w19, w19, w0
+.LVL105:
+.L59:
+	.loc 2 63 0
+	cmp	w1, w0
+	bls	.L60
+	.loc 2 64 0
+	udiv	w1, w1, w0
+.LVL106:
+.L60:
+	.loc 2 66 0
+	cmp	w19, w1
+	bls	.L61
+	mov	w0, w19
+	mov	w19, w1
 .LVL107:
-	.loc 3 48 0
-	mov	x8, x2
+	mov	w1, w0
 .LVL108:
-	.loc 3 62 0
-	mov	w6, 0
-	.loc 3 56 0
-	mov	x2, 0
+.L61:
+	.loc 2 75 0
+	mov	w25, 16960
+	adrp	x24, .LC16
+	.loc 2 71 0
+	sub	w21, w1, w19
 .LVL109:
-	.loc 3 62 0
-	mov	w7, 0
-	.loc 3 48 0
-	str	x19, [sp, 16]
-	.cfi_offset 19, -16
+	.loc 2 75 0
+	add	x24, x24, :lo12:.LC16
+	.loc 2 73 0
+	mov	w23, 0
+	.loc 2 75 0
+	movk	w25, 0xf, lsl 16
 .LVL110:
-.L56:
-	.loc 3 62 0 discriminator 1
-	uxtw	x5, w7
-	cmp	x5, x3
-	bcc	.L59
-	.loc 3 61 0
-	mov	x19, 0
-	.loc 3 54 0
-	mov	x3, 0
-	.loc 3 55 0
-	mov	x4, 0
-	b	.L58
-.L59:
-	.loc 3 63 0
-	lsl	x5, x5, 3
-	.loc 3 64 0
-	ldr	x4, [x0, w6, uxtw 3]
-	.loc 3 63 0
-	add	x19, x8, x5
-	ldr	x2, [x8, x5]
+.L62:
+	.loc 2 73 0 discriminator 1
+	cmp	x22, x23, uxtw
+	bhi	.L66
+	.loc 2 73 0 is_stmt 0 discriminator 3
+	cbnz	x22, .L67
+.L66:
+	.loc 2 74 0 is_stmt 1
+	bl	rand
 .LVL111:
-	.loc 3 64 0
-	cmp	x2, x4
-	beq	.L57
-	.loc 3 65 0
-	ldr	x3, [x19]
+	udiv	w20, w0, w21
+	.loc 2 75 0
+	mov	w1, w23
+	.loc 2 74 0
+	msub	w20, w20, w21, w0
+	.loc 2 75 0
+	mov	x0, x24
 .LVL112:
-.L58:
-	.loc 3 73 0
-	cmp	x19, 0
-	ccmp	w10, 0, 4, ne
-	beq	.L55
-	.loc 3 74 0
-	adrp	x0, .LC16
+	.loc 2 74 0
+	add	w20, w20, w19
+	.loc 2 75 0
+	mul	w20, w20, w25
+	mov	w2, w20
+	bl	printf
 .LVL113:
-	mov	x1, x19
+	.loc 2 76 0
+	and	x0, x20, 4294967232
+	bl	set_ddr_freq
 .LVL114:
-	add	x0, x0, :lo12:.LC16
-	bl	printf
+	mov	w26, w0
 .LVL115:
-.L55:
-	.loc 3 78 0
-	mov	x0, x19
-	ldr	x19, [sp, 16]
+	.loc 2 79 0
+	ldr	x0, [x18]
 .LVL116:
-	ldp	x29, x30, [sp], 32
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_def_cfa 31, 0
-	ret
+	mov	x1, 1048576
+	ldr	x0, [x0, 136]
+	bl	random_test
 .LVL117:
-.L57:
-	.cfi_restore_state
-	.loc 3 70 0 discriminator 2
-	add	w6, w6, 1
+	mov	w20, w0
 .LVL118:
-	.loc 3 62 0 discriminator 2
-	add	w7, w7, 1
-.LVL119:
-	.loc 3 71 0 discriminator 2
-	and	w6, w1, w6
-.LVL120:
-	b	.L56
-	.cfi_endproc
-.LFE277:
-	.size	cmp_buf_data, .-cmp_buf_data
-	.section	.text.crosstalk,"ax",@progbits
-	.align	2
-	.global	crosstalk
-	.type	crosstalk, %function
-crosstalk:
-.LFB200:
-	.file 4 "cmd/ddr_tool/crosstalk.c"
-	.loc 4 46 0
-	.cfi_startproc
-.LVL121:
-	stp	x29, x30, [sp, -144]!
-	.cfi_def_cfa_offset 144
-	.cfi_offset 29, -144
-	.cfi_offset 30, -136
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -128
-	.cfi_offset 20, -120
-	.loc 4 71 0
-	add	x20, x29, 112
-	.loc 4 46 0
-	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -112
-	.cfi_offset 22, -104
-	mov	x22, x0
-	stp	x23, x24, [sp, 48]
-	.loc 4 63 0
+	.loc 2 80 0
+	cbz	w0, .L63
+	.loc 2 81 0
 	adrp	x0, .LC17
-.LVL122:
-	.loc 4 46 0
-	stp	x27, x28, [sp, 80]
-	.cfi_offset 23, -96
-	.cfi_offset 24, -88
-	.cfi_offset 27, -64
-	.cfi_offset 28, -56
-	mov	x23, x1
-	stp	x25, x26, [sp, 64]
-	.cfi_offset 25, -80
-	.cfi_offset 26, -72
-	.loc 4 63 0
-	add	x0, x0, :lo12:.LC17
-	.loc 4 68 0
-	adrp	x24, .LC19
-	.loc 4 63 0
-	bl	printf
-.LVL123:
-	.loc 4 68 0
-	add	x27, x24, :lo12:.LC19
-	.loc 4 66 0
-	adrp	x21, .LC18
-	.loc 4 64 0
-	mov	w19, 0
-	.loc 4 66 0
-	add	x0, x21, :lo12:.LC18
-	str	x0, [x29, 104]
-.LVL124:
-.L70:
-	ldr	x0, [x29, 104]
-	.loc 4 71 0
-	mov	w25, 1
-	.loc 4 66 0
-	mov	w1, w19
-	.loc 4 71 0
-	lsl	w25, w25, w19
-	.loc 4 65 0
-	mov	w28, -1
-	.loc 4 67 0
-	mov	w26, 0
-	.loc 4 66 0
-	bl	printf
-.LVL125:
-.L69:
-	.loc 4 68 0
+.LVL119:
 	mov	w1, w26
-	mov	x0, x27
-	.loc 4 69 0
-	mvn	w28, w28
-.LVL126:
-	.loc 4 68 0
+	add	x0, x0, :lo12:.LC17
 	bl	printf
-.LVL127:
-	.loc 4 69 0
-	mov	x8, 0
-.LVL128:
-.L66:
-	.loc 4 71 0 discriminator 3
-	eor	w0, w25, w28
-	str	w0, [x8, x20]
-	add	x8, x8, 4
-	.loc 4 72 0 discriminator 3
-	mvn	w28, w28
-.LVL129:
-	.loc 4 70 0 discriminator 3
-	cmp	x8, 32
-	bne	.L66
-	.loc 4 77 0
-	mov	x3, x23
-	mov	x2, x22
-	mov	w1, w8
-	mov	x0, x20
-	bl	write_buf_to_ddr
-.LVL130:
-	.loc 4 78 0
-	mov	w1, w8
-	mov	w4, 1
-	mov	x3, x23
-	mov	x2, x22
-	mov	x0, x20
-	bl	cmp_buf_data
-.LVL131:
-	cbz	x0, .L67
-.LVL132:
-.L75:
-	.loc 4 80 0
-	mov	w0, -1
-.L65:
-	.loc 4 115 0
+.LVL120:
+.L58:
+	.loc 2 91 0
+	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
+.LVL121:
 	ldp	x21, x22, [sp, 32]
-.LVL133:
+.LVL122:
 	ldp	x23, x24, [sp, 48]
-.LVL134:
+.LVL123:
 	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-.LVL135:
-	ldp	x29, x30, [sp], 144
+	ldp	x29, x30, [sp], 80
 	.cfi_remember_state
 	.cfi_restore 30
 	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
 	.cfi_restore 25
 	.cfi_restore 26
 	.cfi_restore 23
@@ -960,1114 +952,623 @@ crosstalk:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL136:
-.L67:
+.LVL124:
+.L63:
 	.cfi_restore_state
-	.loc 4 67 0 discriminator 2
-	add	w26, w26, 1
-.LVL137:
-	cmp	w26, 2
-	bne	.L69
-	.loc 4 64 0 discriminator 2
-	add	w19, w19, 1
-.LVL138:
-	cmp	w19, 32
-	bne	.L70
-	.loc 4 87 0
-	adrp	x0, .LC20
-	add	x0, x0, :lo12:.LC20
+	.loc 2 84 0
+	bl	ctrlc
+.LVL125:
+	cbz	w0, .L65
+.LVL126:
+.L67:
+	.loc 2 73 0
+	mov	w20, 0
+	b	.L58
+.LVL127:
+.L65:
+	.loc 2 73 0 is_stmt 0 discriminator 2
+	add	w23, w23, 1
+.LVL128:
+	b	.L62
+	.cfi_endproc
+.LFE255:
+	.size	scan_freq, .-scan_freq
+	.section	.text.do_ddr_test,"ax",@progbits
+	.align	2
+	.type	do_ddr_test, %function
+do_ddr_test:
+.LFB256:
+	.loc 2 100 0 is_stmt 1
+	.cfi_startproc
+.LVL129:
+	stp	x29, x30, [sp, -224]!
+	.cfi_def_cfa_offset 224
+	.cfi_offset 29, -224
+	.cfi_offset 30, -216
+	.loc 2 113 0
+	adrp	x0, .LC18
+.LVL130:
+	add	x0, x0, :lo12:.LC18
+	.loc 2 100 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -208
+	.cfi_offset 20, -200
+	.loc 2 115 0
+	add	x20, x29, 152
+	.loc 2 100 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -192
+	.cfi_offset 22, -184
+	.loc 2 115 0
+	add	x21, x29, 120
+	.loc 2 100 0
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -176
+	.cfi_offset 24, -168
+	mov	w23, w2
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 25, -160
+	.cfi_offset 26, -152
+	mov	x26, x3
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 27, -144
+	.cfi_offset 28, -136
+	.loc 2 103 0
+	stp	xzr, xzr, [x29, 184]
+	stp	xzr, xzr, [x29, 200]
+	str	xzr, [x29, 216]
+.LVL131:
+	.loc 2 113 0
 	bl	printf
-.LVL139:
-	.loc 4 88 0
-	mov	x0, 128
-	bl	malloc
-.LVL140:
-	mov	x20, x0
+.LVL132:
+	.loc 2 115 0
+	mov	w2, 1
+	mov	x1, x20
+	mov	x0, x21
+	bl	get_print_available_addr
+.LVL133:
+	.loc 2 117 0
+	cmp	w23, 1
+	ble	.L160
+	.loc 2 121 0
+	adrp	x24, .LANCHOR2
+	add	x27, x24, :lo12:.LANCHOR2
+	mov	x25, 0
+	str	x24, [x29, 104]
+.L75:
+	ldr	x1, [x27, x25, lsl 3]
+	mov	w19, w25
+.LVL134:
+	ldr	x0, [x26, 8]
+	bl	strcasecmp
+.LVL135:
+	cbz	w0, .L74
+.LVL136:
+	add	x25, x25, 1
+	.loc 2 120 0 discriminator 2
+	cmp	x25, 7
+	bne	.L75
+	.loc 2 128 0
+	adrp	x0, .LC27
+	add	x0, x0, :lo12:.LC27
+	b	.L161
+.LVL137:
+.L112:
+	.loc 2 133 0
+	adrp	x0, .LC19
+	add	x0, x0, :lo12:.LC19
+.LVL138:
+.L161:
+	.loc 2 128 0
+	bl	printf
+.LVL139:
+.L160:
+	.loc 2 129 0
+	mov	w23, -1
+	b	.L72
+.LVL140:
+.L78:
+	.loc 2 138 0
+	add	x0, x26, x27
+	add	x1, x29, 184
+	add	x2, x1, x27
+	mov	w1, 0
+	add	x27, x27, 8
+	ldr	x0, [x0, 16]
+	bl	strict_strtoul
 .LVL141:
-	.loc 4 89 0
-	cbnz	x0, .L71
-	.loc 4 90 0
-	adrp	x0, .LC21
+	tbz	w0, #31, .L77
+	.loc 2 139 0
+	adrp	x0, .LC20
+	add	x0, x0, :lo12:.LC20
+	b	.L161
 .LVL142:
-	mov	x1, 128
-	add	x0, x0, :lo12:.LC21
-	bl	printf
+.L79:
+	.loc 2 157 0
+	bl	data_cpu_2_io_init
 .LVL143:
-.L71:
-	adrp	x25, .LANCHOR0
-	.loc 4 93 0
-	add	x26, x21, :lo12:.LC18
+	.loc 2 159 0
+	cbnz	w19, .L80
+	.loc 2 161 0
+	ldr	x0, [x29, 192]
+	cbz	x0, .L81
+	.loc 2 162 0
+	bl	set_vdd_logic
 .LVL144:
-	.loc 4 95 0
-	add	x24, x24, :lo12:.LC19
-	.loc 4 100 0
-	add	x25, x25, :lo12:.LANCHOR0
-	.loc 4 69 0
-	mov	w19, 0
+.L81:
+	.loc 2 163 0
+	ldr	x0, [x29, 184]
+	bl	set_ddr_freq
 .LVL145:
-.L78:
-	.loc 4 94 0
-	mov	w21, 0
-	.loc 4 98 0
-	mov	w27, 1
-	.loc 4 93 0
-	mov	w1, w19
-	mov	x0, x26
+.L82:
+	.loc 2 305 0
+	adrp	x0, .LC26
+	add	x0, x0, :lo12:.LC26
 	bl	printf
 .LVL146:
-.L77:
-	.loc 4 95 0
-	mov	w1, w21
-	mov	x0, x24
-	bl	printf
+	b	.L72
 .LVL147:
-	.loc 4 98 0
-	lsl	w1, w27, w21
-	mov	x8, 0
+.L80:
+	.loc 2 164 0
+	cmp	w19, 1
+	bne	.L83
+	.loc 2 166 0
+	ldr	x0, [x29, 208]
+	cbz	x0, .L84
+	.loc 2 167 0
+	bl	set_vdd_logic
 .LVL148:
-.L74:
-	ldr	w0, [x8, x25]
-	.loc 4 97 0
-	cbz	w19, .L72
-	.loc 4 98 0
-	eor	w0, w0, w1
-.L72:
-	.loc 4 100 0
-	str	w0, [x20, x8]
-	add	x8, x8, 4
-	.loc 4 96 0
-	cmp	x8, 128
-	bne	.L74
-	.loc 4 105 0
-	mov	x3, x23
-	mov	x2, x22
-	mov	w1, w8
-	mov	x0, x20
-	bl	write_buf_to_ddr
+.L84:
+	.loc 2 168 0
+	ldr	w0, [x29, 184]
+	ldr	w1, [x29, 192]
+	ldr	x2, [x29, 200]
+	bl	scan_freq
 .LVL149:
-	.loc 4 107 0
-	mov	w1, w8
-	mov	w4, 1
-	mov	x3, x23
-	mov	x2, x22
-	mov	x0, x20
-	bl	cmp_buf_data
+	b	.L82
+.L83:
+	.loc 2 169 0
+	sub	w25, w25, #5
+	cmp	w25, 1
+	bhi	.L85
+	.loc 2 171 0
+	ldr	x0, [x29, 208]
+	cbz	x0, .L86
+	.loc 2 172 0
+	bl	set_vdd_logic
 .LVL150:
-	cbnz	x0, .L75
-	.loc 4 110 0
-	cbz	w19, .L76
-	.loc 4 94 0 discriminator 2
-	add	w21, w21, 1
+.L86:
+	.loc 2 173 0
+	cmp	w19, 5
+	bne	.L114
+	.loc 2 175 0
+	mov	x1, 65535
+	mov	x0, 0
+	movk	x1, 0x9f, lsl 16
+.L90:
 .LVL151:
-	cmp	w21, 32
-	bne	.L77
-.L76:
-	.loc 4 92 0 discriminator 2
-	add	w19, w19, 1
+	ldr	x2, [x20, x0, lsl 3]
+	cmp	x2, x1
+	bls	.L88
+	.loc 2 176 0
+	mov	w1, w0
 .LVL152:
-	cmp	w19, 2
-	bne	.L78
-	.loc 4 114 0
-	mov	w0, 0
-	b	.L65
-	.cfi_endproc
-.LFE200:
-	.size	crosstalk, .-crosstalk
-	.section	.text.diagonalscan,"ax",@progbits
-	.align	2
-	.global	diagonalscan
-	.type	diagonalscan, %function
-diagonalscan:
-.LFB271:
-	.file 5 "cmd/ddr_tool/diagonalscan.c"
-	.loc 5 49 0
-	.cfi_startproc
+	.loc 2 185 0
+	mov	x2, 10485760
+	str	x2, [x20, w0, uxtw 3]
 .LVL153:
-	stp	x29, x30, [sp, -112]!
-	.cfi_def_cfa_offset 112
-	.cfi_offset 29, -112
-	.cfi_offset 30, -104
-	.loc 5 55 0
-	mov	x2, 32
-	.loc 5 49 0
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -96
-	.cfi_offset 20, -88
-	mov	x19, x1
-	.loc 5 55 0
-	adrp	x1, .LANCHOR1
+.L89:
+	.loc 2 108 0 discriminator 1
+	mov	x0, 0
 .LVL154:
-	add	x1, x1, :lo12:.LANCHOR1
-	.loc 5 49 0
-	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -64
-	.cfi_offset 24, -56
-	mov	x23, x0
-	stp	x21, x22, [sp, 32]
-	.loc 5 55 0
-	add	x0, x29, 80
+.L93:
+	.loc 2 188 0
+	cmp	w1, w0
+	beq	.L92
+	.loc 2 190 0
+	str	xzr, [x21, x0, lsl 3]
+	.loc 2 191 0
+	str	xzr, [x20, x0, lsl 3]
+.L92:
 .LVL155:
-	.loc 5 49 0
-	stp	x25, x26, [sp, 64]
-	.cfi_offset 21, -80
-	.cfi_offset 22, -72
-	.cfi_offset 25, -48
-	.cfi_offset 26, -40
-	.loc 5 55 0
-	bl	memcpy
+	add	x0, x0, 1
 .LVL156:
-	.loc 5 60 0
-	adrp	x0, .LC22
-	add	x0, x0, :lo12:.LC22
-	bl	printf
+	.loc 2 187 0 discriminator 2
+	cmp	x0, 4
+	bne	.L93
+	.loc 2 193 0
+	mov	w28, 60
+.L87:
 .LVL157:
-.LBB29:
-.LBB30:
-.LBB31:
-	.loc 5 19 0
-	mov	x0, 520
-	movk	x0, 0xff01, lsl 16
-	ldr	w20, [x0]
+	.loc 2 201 0
+	adrp	x26, .LC22
 .LVL158:
-#APP
-// 19 "cmd/ddr_tool/diagonalscan.c" 1
-	dmb sy
-// 0 "" 2
+	.loc 2 205 0
+	adrp	x27, .LC23
+	.loc 2 201 0
+	add	x26, x26, :lo12:.LC22
+	.loc 2 205 0
+	add	x27, x27, :lo12:.LC23
+	.loc 2 198 0
+	mov	w25, 0
 .LVL159:
-#NO_APP
-.LBE31:
-.LBE30:
-.LBE29:
-	.loc 5 75 0
-	mov	x2, 32
-	add	x1, x29, 80
-	mov	x0, x23
-	bl	memcpy
+.L94:
+	.loc 2 199 0
+	ldr	x0, [x29, 200]
+	cbz	x0, .L100
+	.loc 2 199 0 is_stmt 0 discriminator 1
+	cmp	x0, x25, uxtw
+	bls	.L82
+.L100:
+	.loc 2 201 0 is_stmt 1
+	mov	x19, 0
+	.loc 2 200 0
+	add	w25, w25, 1
 .LVL160:
-.LBB34:
-.LBB32:
-	.loc 5 40 0
-	ubfx	x0, x20, 9, 2
-	.loc 5 41 0
-	ubfx	x20, x20, 2, 2
+	.loc 2 201 0
+	mov	w1, w25
+	mov	x0, x26
+	bl	printf
 .LVL161:
-	.loc 5 40 0
-	add	w0, w0, 9
-	.loc 5 41 0
-	mov	w1, 2
-	asr	w20, w1, w20
-.LBE32:
-.LBE34:
-	.loc 5 76 0
-	lsr	x24, x19, 1
-.LBB35:
-.LBB33:
-	.loc 5 43 0
-	add	w0, w0, w20
-	sub	x19, x19, #32
+.L98:
+	.loc 2 203 0
+	ldr	x3, [x20, x19, lsl 3]
+	cbz	x3, .L95
+	.loc 2 205 0
+	ldr	x2, [x21, x19, lsl 3]
+	mov	w1, w19
+	mov	x0, x27
+	bl	printf
 .LVL162:
-	mov	w25, 1
-	add	x19, x19, x23
+	.loc 2 207 0
+	ldr	x0, [x29, 192]
+	bl	set_ddr_freq
 .LVL163:
-	lsl	w25, w25, w0
-.LBE33:
-.LBE35:
-	.loc 5 76 0
-	mov	w21, 0
-	mov	x20, 0
+	.loc 2 208 0
+	ldr	x1, [x20, x19, lsl 3]
+	ldr	x0, [x21, x19, lsl 3]
+	bl	random_test
 .LVL164:
-.L90:
-	.loc 5 76 0 is_stmt 0 discriminator 1
-	cmp	x20, x24
-	bcc	.L94
-	mov	x0, 0
-	b	.L91
-.L94:
-	.loc 5 77 0 is_stmt 1
-	uxtw	x22, w21
-	mov	x2, 32
-	sub	x26, x19, x22
-	add	x1, x29, 80
-	mov	x0, x26
-	bl	memcpy
+	mov	w24, w0
 .LVL165:
-	.loc 5 80 0
-	add	x2, x20, x23
-	.loc 5 79 0
-	mov	x3, 32
-	mov	w4, 1
-	add	x2, x2, x22
-	mov	w1, w3
-	add	x0, x29, 80
-	bl	cmp_buf_data
+	.loc 2 210 0
+	cbnz	w0, .L115
+	.loc 2 211 0
+	ldr	x1, [x20, x19, lsl 3]
+	ldr	x0, [x21, x19, lsl 3]
 .LVL166:
-	.loc 5 81 0
-	cbnz	x0, .L91
-	.loc 5 84 0
-	add	x22, x22, 40
-	add	x20, x20, x25
+	bl	crosstalk
 .LVL167:
-	cmp	x25, x22
-	add	w21, w21, 8
+	mov	w24, w0
 .LVL168:
-	csel	w21, w21, wzr, cs
+	.loc 2 215 0
+	cbnz	w0, .L116
+	.loc 2 216 0
+	ldr	x1, [x20, x19, lsl 3]
+	ldr	x0, [x21, x19, lsl 3]
 .LVL169:
-	.loc 5 86 0
-	cmp	x24, x20
-	bls	.L93
-	.loc 5 87 0
-	add	x0, x23, x20
+	bl	diagonalscan
 .LVL170:
-	mov	x2, 32
-	add	x1, x29, 80
-	add	x0, x0, x21, uxtw
-	bl	memcpy
+	mov	w24, w0
 .LVL171:
-.L93:
-	.loc 5 89 0
-	mov	x3, 32
-	mov	w4, 1
-	mov	x2, x26
-	mov	w1, w3
-	add	x0, x29, 80
-	sub	x19, x19, x25
-	bl	cmp_buf_data
+	.loc 2 220 0
+	cbnz	w0, .L117
+	.loc 2 221 0
+	ldr	w0, [x29, 184]
 .LVL172:
-	.loc 5 92 0
-	cbz	x0, .L90
+	and	x2, x28, 1020
+	ldr	w1, [x29, 192]
+	.loc 2 224 0
+	mov	w22, 1
+	.loc 2 221 0
+	bl	scan_freq
 .LVL173:
-.L91:
-	.loc 5 100 0
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
+	mov	w24, w0
 .LVL174:
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 112
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
-	ret
-	.cfi_endproc
-.LFE271:
-	.size	diagonalscan, .-diagonalscan
-	.section	.text.do_ddr_test,"ax",@progbits
-	.align	2
-	.type	do_ddr_test, %function
-do_ddr_test:
-.LFB258:
-	.loc 1 190 0
-	.cfi_startproc
+.L96:
+	.loc 2 226 0
+	ldr	x0, [x29, 184]
 .LVL175:
-	stp	x29, x30, [sp, -240]!
-	.cfi_def_cfa_offset 240
-	.cfi_offset 29, -240
-	.cfi_offset 30, -232
-.LBB40:
-.LBB41:
-	.loc 1 50 0
-	mov	x0, 0
+	bl	set_ddr_freq
 .LVL176:
-.LBE41:
-.LBE40:
-	.loc 1 190 0
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -208
-	.cfi_offset 22, -200
-	mov	w22, w2
-	stp	x19, x20, [sp, 16]
-.LBB48:
-.LBB42:
-	.loc 1 50 0
-	mov	x2, x18
+	.loc 2 227 0
+	cbnz	w24, .L118
+	.loc 2 228 0
+	ldr	x1, [x20, x19, lsl 3]
+	ldr	x0, [x21, x19, lsl 3]
+	bl	random_test
 .LVL177:
-.LBE42:
-.LBE48:
-	.loc 1 190 0
-	stp	x25, x26, [sp, 64]
-	.cfi_offset 19, -224
-	.cfi_offset 20, -216
-	.cfi_offset 25, -176
-	.cfi_offset 26, -168
-.LBB49:
-.LBB43:
-	.loc 1 52 0
-	add	x20, x29, 136
-.LBE43:
-.LBE49:
-	.loc 1 190 0
-	mov	x25, x3
-.LBB50:
-.LBB44:
-	.loc 1 53 0
-	add	x21, x29, 168
-.LBE44:
-.LBE50:
-	.loc 1 190 0
-	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -192
-	.cfi_offset 24, -184
-.LBB51:
-.LBB45:
-	.loc 1 47 0
-	mov	w24, 0
-.LBE45:
-.LBE51:
-	.loc 1 190 0
-	stp	x27, x28, [sp, 80]
-	.cfi_offset 27, -160
-	.cfi_offset 28, -152
-	.loc 1 193 0
-	stp	xzr, xzr, [x29, 200]
-	stp	xzr, xzr, [x29, 216]
-	str	xzr, [x29, 232]
+	mov	w2, w0
 .LVL178:
-.L99:
-.LBB52:
-.LBB46:
-	.loc 1 50 0
-	ldr	x1, [x2]
-	ubfiz	x3, x0, 4, 32
-	.loc 1 52 0
-	str	xzr, [x20, x0, lsl 3]
-	.loc 1 50 0
-	add	x1, x1, x3
-	.loc 1 53 0
-	str	xzr, [x21, x0, lsl 3]
-	.loc 1 50 0
-	ldr	x1, [x1, 136]
-	cmp	x1, 0
-	csinc	w24, w24, w0, eq
+	.loc 2 232 0
+	cbnz	w0, .L119
+	.loc 2 233 0
+	ldr	x1, [x20, x19, lsl 3]
+	ldr	x0, [x21, x19, lsl 3]
 .LVL179:
-	add	x0, x0, 1
+	str	w2, [x29, 100]
+	bl	crosstalk
 .LVL180:
-	.loc 1 49 0
-	cmp	x0, 4
-	bne	.L99
-	mov	x0, 0
-.L100:
+	mov	w22, w0
 .LVL181:
-	.loc 1 56 0
-	cmp	w0, w24
-	bcc	.L101
-	.loc 1 61 0
-	sub	w1, w24, #1
-	ldr	x0, [x2, 128]
+	.loc 2 237 0
+	ldr	w2, [x29, 100]
+	cbnz	w0, .L120
+	.loc 2 238 0
+	ldr	x1, [x20, x19, lsl 3]
+	ldr	x0, [x21, x19, lsl 3]
 .LVL182:
-	lsl	x1, x1, 3
-	.loc 1 67 0
-	adrp	x26, .LC25
-	.loc 1 61 0
-	sub	x0, x0, #1048576
-	.loc 1 64 0
-	mov	x23, 0
-	.loc 1 67 0
-	add	x26, x26, :lo12:.LC25
-	.loc 1 61 0
-	ldr	x2, [x20, x1]
-	sub	x0, x0, x2
-	.loc 1 62 0
-	and	x0, x0, -4096
-	.loc 1 61 0
-	str	x0, [x21, x1]
-	.loc 1 63 0
-	adrp	x0, .LC23
-	add	x0, x0, :lo12:.LC23
-	bl	printf
+	bl	diagonalscan
 .LVL183:
-	.loc 1 64 0
-	adrp	x0, .LC24
-	add	x0, x0, :lo12:.LC24
-	bl	printf
+	mov	w24, w0
 .LVL184:
-.L102:
-	.loc 1 65 0
-	cmp	w24, w23
-	bhi	.L104
+	.loc 2 243 0
+	cbnz	w0, .L121
+	.loc 2 245 0
+	bl	ctrlc
 .LVL185:
-.LBE46:
-.LBE52:
-	.loc 1 205 0
-	cmp	w22, 1
-	ble	.L214
-	.loc 1 209 0
-	adrp	x0, .LANCHOR2
-	add	x26, x0, :lo12:.LANCHOR2
-	mov	x24, 0
-	str	x0, [x29, 120]
-.L107:
-	ldr	x1, [x26, x24, lsl 3]
-	mov	w23, w24
+	cbnz	w0, .L122
+	.loc 2 240 0
+	mov	w22, 4
 .LVL186:
-	ldr	x0, [x25, 8]
-	bl	strcasecmp
+.L95:
+	add	x19, x19, 1
 .LVL187:
-	cbz	w0, .L106
+	.loc 2 202 0 discriminator 2
+	cmp	x19, 4
+	bne	.L98
+	mov	w2, 0
+	mov	w24, 0
 .LVL188:
-	add	x24, x24, 1
-	.loc 1 208 0 discriminator 2
-	cmp	x24, 7
-	bne	.L107
-	.loc 1 216 0
-	adrp	x0, .LC37
-	add	x0, x0, :lo12:.LC37
-	b	.L215
+.L97:
+	.loc 2 250 0
+	orr	w2, w24, w2
 .LVL189:
-.L101:
-.LBB53:
-.LBB47:
-	.loc 1 57 0
-	ubfiz	x1, x0, 4, 32
-	ldr	x3, [x2]
-	add	x1, x1, 128
-	add	x3, x3, x1
-	ldr	x3, [x3, 8]
-	str	x3, [x20, x0, lsl 3]
-	.loc 1 58 0
-	ldr	x3, [x2]
-	add	x1, x3, x1
-	ldr	x1, [x1, 16]
-	str	x1, [x21, x0, lsl 3]
+	cbz	w2, .L94
 .LVL190:
-	add	x0, x0, 1
+.L99:
+	.loc 2 302 0
+	cbz	w24, .L82
+	.loc 2 303 0
+	ldr	x0, [x29, 104]
+	add	x24, x0, :lo12:.LANCHOR2
 .LVL191:
-	b	.L100
-.LVL192:
-.L104:
-	.loc 1 66 0
-	ldr	x1, [x20, x23, lsl 3]
-	cbz	x1, .L103
-	.loc 1 67 0
-	ldr	x3, [x21, x23, lsl 3]
-	mov	x0, x26
-	add	x2, x1, x3
+	adrp	x0, .LC25
+	add	x0, x0, :lo12:.LC25
+	ldr	x1, [x24, w22, sxtw 3]
 	bl	printf
+.LVL192:
+	b	.L72
 .LVL193:
-.L103:
-	add	x23, x23, 1
+.L88:
+	add	x0, x0, 1
 .LVL194:
-	b	.L102
+	.loc 2 174 0 discriminator 2
+	cmp	x0, 4
+	bne	.L90
+	.loc 2 181 0
+	ldr	x2, [x29, 152]
+	mov	w1, 10
+	adrp	x0, .LC28
+	add	x0, x0, :lo12:.LC28
+	lsr	x2, x2, 20
+	bl	printf
 .LVL195:
-.L150:
-.LBE47:
-.LBE53:
-	.loc 1 221 0
-	adrp	x0, .LC26
-	add	x0, x0, :lo12:.LC26
+	.loc 2 108 0
+	mov	w1, 0
+	b	.L89
+.L114:
+	.loc 2 195 0
+	mov	w28, 1000
+	b	.L87
 .LVL196:
-.L215:
-	.loc 1 216 0
-	bl	printf
+.L115:
+	.loc 2 209 0
+	mov	w22, 2
+	b	.L96
 .LVL197:
-.L214:
-	.loc 1 217 0
-	mov	w22, -1
-	b	.L97
+.L116:
+	.loc 2 213 0
+	mov	w22, 3
+	b	.L96
 .LVL198:
-.L110:
-	.loc 1 226 0
-	add	x0, x25, x26
-	add	x1, x29, 200
-	add	x2, x1, x26
-	mov	w1, 0
-	add	x26, x26, 8
-	ldr	x0, [x0, 16]
-	bl	strict_strtoul
+.L117:
+	.loc 2 218 0
+	mov	w22, 4
+	b	.L96
 .LVL199:
-	tbz	w0, #31, .L109
-	.loc 1 227 0
-	adrp	x0, .LC27
-	add	x0, x0, :lo12:.LC27
-	b	.L215
+.L118:
+	mov	w2, 0
+	b	.L97
 .LVL200:
-.L111:
-	.loc 1 247 0
-	cbnz	w23, .L112
-	.loc 1 249 0
-	ldr	x0, [x29, 208]
+.L119:
+	.loc 2 228 0
+	mov	w24, w0
+	mov	w2, 0
+	.loc 2 230 0
+	mov	w22, 2
+	b	.L97
 .LVL201:
-	cbz	x0, .L113
-	.loc 1 250 0
-	bl	set_vdd_logic
+.L120:
+	.loc 2 233 0
+	mov	w24, w0
+	.loc 2 235 0
+	mov	w22, 3
+	b	.L97
 .LVL202:
-.L113:
-	.loc 1 251 0
-	ldr	x0, [x29, 200]
-	bl	set_ddr_freq
+.L121:
+	mov	w2, w22
 .LVL203:
-.L114:
-	.loc 1 384 0
-	adrp	x0, .LC36
-	add	x0, x0, :lo12:.LC36
-	bl	printf
-.LVL204:
+.L158:
+	.loc 2 240 0
+	mov	w22, 4
 	b	.L97
+.L122:
+	.loc 2 246 0
+	mov	w2, -1
+	b	.L158
+.LVL204:
+.L85:
+	.loc 2 259 0
+	mov	x2, x20
+	mov	x1, x21
+	add	x0, x29, 200
+	bl	judge_test_addr
 .LVL205:
-.L112:
-	.loc 1 252 0
-	cmp	w23, 1
-	bne	.L115
-	.loc 1 254 0
-	ldr	x0, [x29, 224]
+	mov	w27, w0
 .LVL206:
-	cbz	x0, .L116
-	.loc 1 255 0
-	bl	set_vdd_logic
+	.loc 2 260 0
+	cbz	w0, .L123
+	.loc 2 263 0
+	ldr	x0, [x29, 184]
 .LVL207:
-.L116:
-	.loc 1 256 0
-	ldr	w0, [x29, 200]
-	ldr	w1, [x29, 208]
-	ldr	x2, [x29, 216]
-	bl	scan_freq
+	bl	set_ddr_freq
 .LVL208:
-	b	.L114
+	.loc 2 265 0
+	ldr	x0, [x29, 216]
+	cbz	x0, .L102
+	.loc 2 266 0
+	bl	set_vdd_logic
 .LVL209:
-.L115:
-	.loc 1 257 0
-	sub	w24, w24, #5
-	cmp	w24, 1
-	bls	.L117
+.L102:
+	.loc 2 270 0
+	adrp	x26, .LC24
 .LVL210:
-.LBB54:
-.LBB55:
-	.loc 1 79 0
-	ldr	x0, [x29, 144]
+	mov	w25, 0
+	add	x26, x26, :lo12:.LC24
+	b	.L110
 .LVL211:
-	.loc 1 82 0
-	ldr	x3, [x29, 224]
-	.loc 1 79 0
-	cmp	x0, 0
-	ldr	x0, [x29, 152]
-	ldr	x1, [x29, 160]
-	cset	w24, ne
-	.loc 1 80 0
-	cmp	x0, 0
-	mov	w0, 3
-	csinc	w0, w0, w24, ne
+.L111:
+	.loc 2 271 0
+	mov	x28, 0
+	.loc 2 269 0
+	add	w25, w25, 1
 .LVL212:
-	cmp	x1, 0
-	mov	w1, 4
-	csel	w0, w0, w1, eq
+	.loc 2 270 0
+	mov	w1, w25
+	mov	x0, x26
+	bl	printf
 .LVL213:
-	.loc 1 82 0
-	cbnz	x3, .L209
-	.loc 1 83 0
-	mov	w24, w0
+.L103:
+	.loc 2 271 0 discriminator 1
+	cmp	w27, w28
+	bhi	.L109
+	mov	w0, 0
+	mov	w24, 0
 .LVL214:
-.L134:
-.LBE55:
-.LBE54:
-	.loc 1 342 0
-	ldr	x0, [x29, 200]
-	bl	set_ddr_freq
+.L108:
+	.loc 2 297 0
+	orr	w0, w24, w0
 .LVL215:
-	.loc 1 344 0
-	ldr	x0, [x29, 232]
-	cbz	x0, .L140
-	.loc 1 345 0
-	bl	set_vdd_logic
+	cbnz	w0, .L99
 .LVL216:
-.L140:
-	.loc 1 349 0
-	adrp	x26, .LC34
-	mov	w25, 0
+.L110:
+	.loc 2 268 0
+	ldr	x0, [x29, 192]
+	cbz	x0, .L111
+	.loc 2 268 0 is_stmt 0 discriminator 1
+	cmp	x0, x25, uxtw
+	bhi	.L111
+	b	.L82
 .LVL217:
-	add	x26, x26, :lo12:.LC34
-	b	.L148
+.L109:
+	.loc 2 278 0 is_stmt 1
+	ldr	x1, [x20, x28, lsl 3]
+	.loc 2 272 0
+	cmp	w19, 3
+	.loc 2 278 0
+	ldr	x0, [x21, x28, lsl 3]
+	.loc 2 272 0
+	beq	.L105
+	cmp	w19, 4
+	beq	.L106
+	.loc 2 274 0
+	bl	random_test
 .LVL218:
-.L117:
-	.loc 1 259 0
-	ldr	x0, [x29, 224]
+.L159:
+	.loc 2 282 0
+	mov	w24, w0
 .LVL219:
-	cbz	x0, .L123
-	.loc 1 260 0
-	bl	set_vdd_logic
+	.loc 2 290 0
+	bl	ctrlc
 .LVL220:
-.L123:
-	.loc 1 261 0
-	cmp	w23, 5
-	bne	.L155
-	.loc 1 262 0
-	ldr	x1, [x29, 168]
-	mov	x0, 65535
-	movk	x0, 0x9f, lsl 16
-	cmp	x1, x0
-	bhi	.L125
-	.loc 1 263 0
-	lsr	x2, x1, 20
-	adrp	x0, .LC30
-	mov	w1, 10
-	add	x0, x0, :lo12:.LC30
-	bl	printf
+	cbnz	w0, .L124
+	add	x28, x28, 1
 .LVL221:
-.L211:
-	.loc 1 272 0
-	mov	w27, 60
+	mov	w22, w19
+	.loc 2 294 0
+	cbz	w24, .L103
+	mov	w22, w19
+	b	.L108
 .LVL222:
-.L124:
-	.loc 1 280 0
-	adrp	x0, .LC31
-	add	x0, x0, :lo12:.LC31
-	.loc 1 284 0
-	adrp	x28, .LC32
-	.loc 1 280 0
-	str	x0, [x29, 112]
-	.loc 1 277 0
-	mov	w26, 0
-	.loc 1 284 0
-	add	x0, x28, :lo12:.LC32
-	str	x0, [x29, 104]
+.L105:
+	.loc 2 278 0
+	bl	crosstalk
 .LVL223:
-.L126:
-	.loc 1 278 0
-	ldr	x0, [x29, 216]
-	cbz	x0, .L132
-	.loc 1 278 0 is_stmt 0 discriminator 1
-	cmp	x0, x26, uxtw
-	bls	.L114
-.L132:
-	.loc 1 280 0 is_stmt 1
-	ldr	x0, [x29, 112]
-	.loc 1 279 0
-	add	w26, w26, 1
+	b	.L159
+.L106:
+	.loc 2 282 0
+	bl	diagonalscan
 .LVL224:
-	.loc 1 280 0
-	mov	w1, w26
-	mov	x25, 0
-	bl	printf
+	b	.L159
 .LVL225:
-.L130:
-	.loc 1 282 0
-	ldr	x23, [x20, x25, lsl 3]
-	cbz	x23, .L127
-	.loc 1 284 0
-	ldr	x0, [x29, 104]
-	mov	x2, x23
-	ldr	x24, [x21, x25, lsl 3]
-	mov	w1, w25
-	mov	x3, x24
-	bl	printf
+.L124:
+	mov	w22, w19
+	.loc 2 291 0
+	mov	w0, -1
+	b	.L108
 .LVL226:
-	.loc 1 286 0
-	ldr	x0, [x29, 208]
-	bl	set_ddr_freq
+.L123:
+	.loc 2 261 0
+	mov	w23, 1
 .LVL227:
-	.loc 1 287 0
-	mov	x1, x24
-	mov	x0, x23
-	bl	random_test
+	b	.L72
 .LVL228:
-	mov	w28, w0
-.LVL229:
-	.loc 1 289 0
-	cbnz	w0, .L156
-	.loc 1 290 0
-	mov	x1, x24
-	mov	x0, x23
-.LVL230:
-	bl	crosstalk
-.LVL231:
-	mov	w28, w0
-.LVL232:
-	.loc 1 294 0
-	cbnz	w0, .L157
-	.loc 1 295 0
-	mov	x1, x24
-	mov	x0, x23
-.LVL233:
-	bl	diagonalscan
-.LVL234:
-	mov	w28, w0
-.LVL235:
-	.loc 1 299 0
-	cbnz	w0, .L158
-	.loc 1 300 0
-	ldr	w0, [x29, 200]
-.LVL236:
-	and	x2, x27, 1020
-	ldr	w1, [x29, 208]
-	.loc 1 303 0
-	mov	w19, 1
-	.loc 1 300 0
-	bl	scan_freq
-.LVL237:
-	mov	w28, w0
-.LVL238:
-.L128:
-	.loc 1 305 0
-	ldr	x0, [x29, 200]
-.LVL239:
-	bl	set_ddr_freq
-.LVL240:
-	.loc 1 306 0
-	cbnz	w28, .L159
-	.loc 1 307 0
-	mov	x1, x24
-	mov	x0, x23
-	bl	random_test
-.LVL241:
-	mov	w2, w0
-.LVL242:
-	.loc 1 311 0
-	cbnz	w0, .L160
-	str	w2, [x29, 100]
-	.loc 1 312 0
-	mov	x1, x24
-	mov	x0, x23
-.LVL243:
-	bl	crosstalk
-.LVL244:
-	.loc 1 316 0
-	ldr	w2, [x29, 100]
-	.loc 1 312 0
-	mov	w19, w0
-.LVL245:
-	.loc 1 316 0
-	cbnz	w0, .L161
-	.loc 1 317 0
-	mov	x1, x24
-	mov	x0, x23
-.LVL246:
-	bl	diagonalscan
-.LVL247:
-	mov	w28, w0
-.LVL248:
-	.loc 1 322 0
-	cbnz	w0, .L162
-	.loc 1 324 0
-	bl	ctrlc
-.LVL249:
-	cbnz	w0, .L163
-	.loc 1 319 0
-	mov	w19, 4
-.LVL250:
-.L127:
-	add	x25, x25, 1
-.LVL251:
-	.loc 1 281 0 discriminator 2
-	cmp	x25, 4
-	bne	.L130
-	mov	w2, 0
-	mov	w28, 0
-.LVL252:
-.L129:
-	.loc 1 329 0
-	orr	w2, w28, w2
-.LVL253:
-	cbz	w2, .L126
-.LVL254:
-.L131:
-	.loc 1 381 0
-	cbz	w28, .L114
-	.loc 1 382 0
-	ldr	x0, [x29, 120]
-	add	x0, x0, :lo12:.LANCHOR2
-	ldr	x1, [x0, w19, sxtw 3]
-	adrp	x0, .LC35
-	add	x0, x0, :lo12:.LC35
-	bl	printf
-.LVL255:
-	b	.L97
-.LVL256:
-.L125:
-	.loc 1 266 0
-	mov	x0, 10485760
-	.loc 1 268 0
-	stp	xzr, xzr, [x29, 144]
-	.loc 1 266 0
-	stp	xzr, x0, [x29, 160]
-.LVL257:
-	.loc 1 269 0
-	stp	xzr, xzr, [x29, 176]
-.LVL258:
-	str	xzr, [x29, 192]
-	b	.L211
-.LVL259:
-.L155:
-	.loc 1 274 0
-	mov	w27, 1000
-	b	.L124
-.LVL260:
-.L156:
-	.loc 1 288 0
-	mov	w19, 2
-	b	.L128
-.LVL261:
-.L157:
-	.loc 1 292 0
-	mov	w19, 3
-	b	.L128
-.LVL262:
-.L158:
-	.loc 1 297 0
-	mov	w19, 4
-	b	.L128
-.LVL263:
-.L159:
-	mov	w2, 0
-	b	.L129
-.LVL264:
-.L160:
-	.loc 1 307 0
-	mov	w28, w0
-	mov	w2, 0
-	.loc 1 309 0
-	mov	w19, 2
-	b	.L129
-.LVL265:
-.L161:
-	.loc 1 312 0
-	mov	w28, w0
-	.loc 1 314 0
-	mov	w19, 3
-	b	.L129
-.LVL266:
-.L162:
-	mov	w2, w19
-.LVL267:
-.L212:
-	.loc 1 319 0
-	mov	w19, 4
-	b	.L129
-.L163:
-	.loc 1 325 0
-	mov	w2, -1
-	b	.L212
-.LVL268:
-.L209:
-.LBB58:
-.LBB56:
-	.loc 1 86 0
-	ldr	x4, [x29, 216]
-	.loc 1 87 0
-	mov	x1, 0
-	mov	w24, 0
-	.loc 1 88 0
-	mov	w6, 1
-	.loc 1 87 0
-	add	x5, x3, x4
-.LVL269:
-.L136:
-	.loc 1 86 0
-	ldr	x2, [x20, x1, lsl 3]
-	cmp	x4, x2
-	bcc	.L135
-	.loc 1 87 0
-	ldr	x7, [x21, x1, lsl 3]
-	add	x2, x2, x7
-	.loc 1 88 0
-	cmp	x5, x2
-	csel	w24, w24, w6, hi
-.LVL270:
-.L135:
-	add	x1, x1, 1
-.LVL271:
-	.loc 1 85 0
-	cmp	w0, w1
-	bhi	.L136
-	.loc 1 89 0
-	cbnz	w24, .L137
-	.loc 1 90 0
-	adrp	x0, .LC33
-	add	x0, x0, :lo12:.LC33
-	bl	printf
-.LVL272:
-.L138:
-.LBE56:
-.LBE58:
-	.loc 1 339 0
-	cbnz	w24, .L134
-	.loc 1 340 0
-	mov	w22, 1
-.LVL273:
-	b	.L97
-.LVL274:
-.L137:
-.LBB59:
-.LBB57:
-	.loc 1 92 0
-	str	x4, [x29, 136]
-	.loc 1 94 0
-	cmp	w0, 1
-	.loc 1 93 0
-	str	x3, [x29, 168]
-.LVL275:
-	.loc 1 94 0
-	beq	.L138
-	.loc 1 95 0
-	str	xzr, [x29, 144]
-	.loc 1 94 0
-	cmp	w0, 2
-	.loc 1 96 0
-	str	xzr, [x29, 176]
-.LVL276:
-	.loc 1 94 0
-	beq	.L138
-	.loc 1 95 0
-	str	xzr, [x29, 152]
-	.loc 1 94 0
-	cmp	w0, 4
-	.loc 1 96 0
-	str	xzr, [x29, 184]
-.LVL277:
-	.loc 1 94 0
-	bne	.L138
-	.loc 1 95 0
-	str	xzr, [x29, 160]
-	.loc 1 96 0
-	str	xzr, [x29, 192]
-.LVL278:
-	b	.L138
-.LVL279:
-.L149:
-.LBE57:
-.LBE59:
-	.loc 1 350 0
-	mov	x27, 0
-	.loc 1 348 0
-	add	w25, w25, 1
-.LVL280:
-	.loc 1 349 0
-	mov	w1, w25
-	mov	x0, x26
-	bl	printf
-.LVL281:
-.L141:
-	.loc 1 350 0 discriminator 1
-	cmp	w24, w27
-	bhi	.L147
-	mov	w0, 0
-	mov	w28, 0
-.LVL282:
-.L146:
-	.loc 1 376 0
-	orr	w0, w28, w0
-.LVL283:
-	cbnz	w0, .L131
-.LVL284:
-.L148:
-	.loc 1 347 0
-	ldr	x0, [x29, 208]
-	cbz	x0, .L149
-	.loc 1 347 0 is_stmt 0 discriminator 1
-	cmp	x0, x25, uxtw
-	bhi	.L149
-	b	.L114
-.LVL285:
-.L147:
-	.loc 1 357 0 is_stmt 1
-	ldr	x1, [x21, x27, lsl 3]
-	.loc 1 351 0
-	cmp	w23, 3
-	.loc 1 357 0
-	ldr	x0, [x20, x27, lsl 3]
-	.loc 1 351 0
-	beq	.L143
-	cmp	w23, 4
-	beq	.L144
-	.loc 1 353 0
-	bl	random_test
-.LVL286:
-.L213:
-	.loc 1 361 0
-	mov	w28, w0
-.LVL287:
-	.loc 1 369 0
-	bl	ctrlc
-.LVL288:
-	cbnz	w0, .L166
-	add	x27, x27, 1
-.LVL289:
-	mov	w19, w23
-	.loc 1 373 0
-	cbz	w28, .L141
-.LVL290:
-	mov	w19, w23
-.LVL291:
-	b	.L146
-.LVL292:
-.L143:
-	.loc 1 357 0
-	bl	crosstalk
-.LVL293:
-	b	.L213
-.L144:
-	.loc 1 361 0
-	bl	diagonalscan
-.LVL294:
-	b	.L213
-.LVL295:
-.L166:
-	mov	w19, w23
-	.loc 1 370 0
-	mov	w0, -1
-	b	.L146
-.LVL296:
-.L106:
-	.loc 1 220 0
+.L74:
+	.loc 2 132 0
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
-	ldrb	w0, [x0, w24, sxtw]
-	cmp	w22, w0
-	blt	.L150
-	sub	w22, w22, #2
-.LVL297:
-	.loc 1 220 0 is_stmt 0 discriminator 1
-	mov	x26, 0
-	lsl	x22, x22, 3
-.LVL298:
-.L109:
-	.loc 1 225 0 is_stmt 1 discriminator 1
-	cmp	x26, x22
-	bne	.L110
-	.loc 1 232 0
-	ldp	x2, x3, [x29, 200]
-	mov	w1, w23
-	ldp	x4, x5, [x29, 216]
-	adrp	x0, .LC28
-	ldr	x6, [x29, 232]
-	add	x0, x0, :lo12:.LC28
-	bl	printf
-.LVL299:
-	.loc 1 238 0
-	add	x2, x29, 128
+	ldrb	w0, [x0, w25, sxtw]
+	cmp	w23, w0
+	blt	.L112
+	sub	w23, w23, #2
+.LVL229:
+	.loc 2 132 0 is_stmt 0 discriminator 1
+	mov	x27, 0
+	lsl	x23, x23, 3
+.LVL230:
+.L77:
+	.loc 2 137 0 is_stmt 1 discriminator 1
+	cmp	x27, x23
+	bne	.L78
+	.loc 2 147 0
+	add	x2, x29, 112
 	mov	w1, 0
 	mov	w0, 53
 	bl	uclass_get_device
-.LVL300:
-	mov	w22, w0
-.LVL301:
-	.loc 1 239 0
-	cbz	w0, .L111
-	.loc 1 240 0
+.LVL231:
+	mov	w23, w0
+.LVL232:
+	.loc 2 148 0
+	cbz	w0, .L79
+	.loc 2 149 0
 	mov	w1, w0
-	adrp	x0, .LC29
-.LVL302:
-	add	x0, x0, :lo12:.LC29
+	adrp	x0, .LC21
+.LVL233:
+	add	x0, x0, :lo12:.LC21
 	bl	printf
-.LVL303:
-.L97:
-	.loc 1 387 0
-	mov	w0, w22
+.LVL234:
+.L72:
+	.loc 2 308 0
+	mov	w0, w23
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 240
+	ldp	x29, x30, [sp], 224
 	.cfi_restore 30
 	.cfi_restore 29
 	.cfi_restore 27
@@ -2083,83 +1584,8 @@ do_ddr_test:
 	.cfi_def_cfa 31, 0
 	ret
 	.cfi_endproc
-.LFE258:
+.LFE256:
 	.size	do_ddr_test, .-do_ddr_test
-	.section	.text.print_memory,"ax",@progbits
-	.align	2
-	.global	print_memory
-	.type	print_memory, %function
-print_memory:
-.LFB278:
-	.loc 3 81 0
-	.cfi_startproc
-.LVL304:
-	stp	x29, x30, [sp, -48]!
-	.cfi_def_cfa_offset 48
-	.cfi_offset 29, -48
-	.cfi_offset 30, -40
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
-	mov	x20, x0
-.LVL305:
-	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -16
-	.cfi_offset 22, -8
-	.loc 3 86 0
-	adrp	x21, .LC38
-	.loc 3 85 0
-	lsr	x22, x1, 2
-	.loc 3 86 0
-	add	x21, x21, :lo12:.LC38
-	.loc 3 85 0
-	mov	w19, 0
-.LVL306:
-.L217:
-	.loc 3 85 0 is_stmt 0 discriminator 1
-	uxtw	x1, w19
-	cmp	x1, x22
-	bcc	.L218
-	.loc 3 89 0 is_stmt 1
-	ldp	x19, x20, [sp, 16]
-.LVL307:
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 48
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
-	ret
-.LVL308:
-.L218:
-	.cfi_restore_state
-	.loc 3 87 0 discriminator 3
-	add	w3, w19, 3
-	add	w2, w19, 2
-	add	w0, w19, 1
-	lsl	x1, x1, 2
-	.loc 3 85 0 discriminator 3
-	add	w19, w19, 4
-.LVL309:
-	.loc 3 86 0 discriminator 3
-	ldr	w5, [x20, x3, lsl 2]
-	ldr	w4, [x20, x2, lsl 2]
-	ldr	w3, [x20, x0, lsl 2]
-	mov	x0, x21
-	ldr	w2, [x20, x1]
-	add	x1, x20, x1
-	bl	printf
-.LVL310:
-	b	.L217
-	.cfi_endproc
-.LFE278:
-	.size	print_memory, .-print_memory
 	.global	_u_boot_list_2_cmd_2_ddr_test
 	.section	.rodata
 	.align	3
@@ -2173,54 +1599,45 @@ print_memory:
 	.word	267448335
 	.word	0
 	.word	-1
-	.section	.rodata.cmp_buf_data.str1.1,"aMS",@progbits,1
-.LC16:
-	.string	"test fail:address:0x%lx,read:0x%lx,reread:0x%lx,expect:0x%lx\n"
 	.section	.rodata.crosstalk.str1.1,"aMS",@progbits,1
-.LC17:
+.LC1:
 	.string	"\nbitflip:   \n"
-.LC18:
+.LC2:
 	.string	"\b\b\b%3u"
-.LC19:
+.LC3:
 	.string	"%3u\b\b\b"
-.LC20:
+.LC4:
 	.string	"\nISI:\n"
-.LC21:
+.LC5:
 	.string	"malloc %lu byte fail\n"
 	.section	.rodata.diagonalscan.str1.1,"aMS",@progbits,1
-.LC22:
+.LC6:
 	.string	"\nDiagonalScan\n"
+.LC7:
+	.string	"get page size fail:0x%x\n"
 	.section	.rodata.do_ddr_test.str1.1,"aMS",@progbits,1
-.LC23:
-	.string	"available memory for test:\n"
-.LC24:
-	.string	"\tstart\t\t end\tlength\n"
-.LC25:
-	.string	"\t0x%08lx - 0x%08lx 0x%08lx\n"
-.LC26:
+.LC18:
+	.string	"ddr tester version 1.0.1\n"
+.LC19:
 	.string	"test parameters error\n"
-.LC27:
+.LC20:
 	.string	"test pattern error\n"
-.LC28:
-	.string	"test pattern:%d, arg:0x%lx,0x%lx,0x%lx,0x%lx,0x%lx\n"
-.LC29:
+.LC21:
 	.string	"rockchip dmc probe fail: %d\n"
-.LC30:
-	.string	"fasttest need %uMB, but actually only %luMB\n"
-.LC31:
+.LC22:
 	.string	"\rtimes:%08u:\n"
-.LC32:
+.LC23:
 	.string	"loop:%d, start:0x%lx, len:0x%lx\n"
-.LC33:
-	.string	"Invalid test address\n"
-.LC34:
+.LC24:
 	.string	"\rtimes:%08u, "
-.LC35:
+.LC25:
 	.string	"\n%s test fail\n"
-.LC36:
+.LC26:
 	.string	"\ntest pass\n"
-.LC37:
+.LC27:
 	.string	"test pattern unsupported\n"
+.LC28:
+	.string	"fasttest need %uMB, but actually only %luMB\n"
 	.section	.rodata.g_isi_pattern,"a",@progbits
 	.align	3
 	.set	.LANCHOR0,. + 0
@@ -2259,49 +1676,34 @@ g_isi_pattern:
 	.word	0
 	.word	0
 	.word	0
-	.section	.rodata.print_memory.str1.1,"aMS",@progbits,1
-.LC38:
-	.string	"0x%08lx: 0x%08x, 0x%08x, 0x%08x, 0x%08x\n"
 	.section	.rodata.random_test.str1.1,"aMS",@progbits,1
-.LC5:
+.LC8:
 	.string	"%u"
-.LC6:
+.LC9:
 	.string	"\b"
-.LC7:
+.LC10:
 	.string	" "
-.LC8:
+.LC11:
 	.string	"\nrandom test1 fail:address:0x%lx,read:0x%x,reread:0x%x,expect:0x%x\n"
-.LC9:
+.LC12:
 	.string	"%4lu"
-.LC10:
+.LC13:
 	.string	"\b\b\b\b"
-.LC11:
+.LC14:
 	.string	"    "
-.LC12:
+.LC15:
 	.string	"\nrandom test2 fail:address:0x%lx,read:0x%lx,reread:0x%lx,expect:0x%lx\n"
 	.section	.rodata.scan_freq.str1.1,"aMS",@progbits,1
-.LC13:
+.LC16:
 	.string	"% d:change freq to %d Hz\n"
-.LC14:
-	.string	"\tchange freq success: %d Hz\n"
-.LC15:
+.LC17:
 	.string	"check data fail at %d Hz\n"
-	.section	.rodata.set_ddr_freq.str1.1,"aMS",@progbits,1
-.LC1:
-	.string	"current freq:%lu Hz\n"
-	.section	.rodata.set_vdd_logic.str1.1,"aMS",@progbits,1
-.LC2:
-	.string	"vdd_logic"
-.LC3:
-	.string	"Cannot set regulator name\n"
-.LC4:
-	.string	"set vdd_logic fail\n"
 	.section	.rodata.str1.1,"aMS",@progbits,1
-.LC39:
+.LC29:
 	.string	"ddr_test"
-.LC40:
+.LC30:
 	.string	"for dram simple test\n"
-.LC41:
+.LC31:
 	.ascii	"arg1: test pattern include:\n\tchangefreq\n\tscanfreq\n\tran"
 	.ascii	"dom\n\tcrosstalk\n\tdiagonalscan\n\tfast_test\n\tfull_test\n"
 	.ascii	"for changereq: arg2:freq(Hz),arg3[option]:volt\nfor scanfreq"
@@ -2324,19 +1726,19 @@ g_isi_pattern:
 	.ascii	"anfreq 200000000 786000000 100'\ndoing random test 10 times "
 	.ascii	"start from"
 	.string	" physical address 0x200000 and\nlength is 128MB, freq:786MHz, if freq=0 may keep current freq:\n\t 'ddr_test random 786000000 10 0x200000 0x8000000'\ndoing fast test for dram between 200MHz to 786MHz with 10 times:\n\t 'ddr_test fast_test 200000000 786000000 10'"
-.LC42:
+.LC32:
 	.string	"changefreq"
-.LC43:
+.LC33:
 	.string	"scanfreq"
-.LC44:
+.LC34:
 	.string	"random"
-.LC45:
+.LC35:
 	.string	"crosstalk"
-.LC46:
+.LC36:
 	.string	"diagonalscan"
-.LC47:
+.LC37:
 	.string	"fast_test"
-.LC48:
+.LC38:
 	.string	"full_test"
 	.section	.rodata.test_pat_param,"a",@progbits
 	.align	3
@@ -2357,44 +1759,45 @@ test_pat_param:
 	.type	test_pattern, %object
 	.size	test_pattern, 56
 test_pattern:
-	.xword	.LC42
-	.xword	.LC43
-	.xword	.LC44
-	.xword	.LC45
-	.xword	.LC46
-	.xword	.LC47
-	.xword	.LC48
+	.xword	.LC32
+	.xword	.LC33
+	.xword	.LC34
+	.xword	.LC35
+	.xword	.LC36
+	.xword	.LC37
+	.xword	.LC38
 	.section	.u_boot_list_2_cmd_2_ddr_test,"aw",@progbits
 	.align	2
 	.type	_u_boot_list_2_cmd_2_ddr_test, %object
 	.size	_u_boot_list_2_cmd_2_ddr_test, 48
 _u_boot_list_2_cmd_2_ddr_test:
-	.8byte	.LC39
+	.8byte	.LC29
 	.word	7
 	.word	1
 	.8byte	do_ddr_test
-	.8byte	.LC40
-	.8byte	.LC41
+	.8byte	.LC30
+	.8byte	.LC31
 	.8byte	0
 	.text
 .Letext0:
-	.file 6 "include/common.h"
-	.file 7 "./arch/arm/include/asm/types.h"
-	.file 8 "include/linux/types.h"
-	.file 9 "include/errno.h"
-	.file 10 "include/linux/string.h"
-	.file 11 "include/efi.h"
-	.file 12 "include/dm/device.h"
-	.file 13 "include/ide.h"
-	.file 14 "include/linux/list.h"
-	.file 15 "include/part.h"
-	.file 16 "include/flash.h"
-	.file 17 "include/lmb.h"
-	.file 18 "include/asm-generic/u-boot.h"
-	.file 19 "./arch/arm/include/asm/u-boot-arm.h"
-	.file 20 "include/command.h"
-	.file 21 "include/../scripts/dtc/libfdt/fdt.h"
-	.file 22 "include/libfdt_env.h"
+	.file 5 "include/common.h"
+	.file 6 "./arch/arm/include/asm/types.h"
+	.file 7 "include/linux/types.h"
+	.file 8 "include/errno.h"
+	.file 9 "include/linux/string.h"
+	.file 10 "include/efi.h"
+	.file 11 "include/dm/device.h"
+	.file 12 "include/ide.h"
+	.file 13 "include/linux/list.h"
+	.file 14 "include/part.h"
+	.file 15 "include/flash.h"
+	.file 16 "include/lmb.h"
+	.file 17 "include/asm-generic/u-boot.h"
+	.file 18 "./arch/arm/include/asm/u-boot-arm.h"
+	.file 19 "include/command.h"
+	.file 20 "include/linux/libfdt_env.h"
+	.file 21 "include/linux/../../scripts/dtc/libfdt/fdt.h"
+	.file 22 "include/linux/libfdt.h"
 	.file 23 "include/image.h"
 	.file 24 "include/dm/uclass-id.h"
 	.file 25 "./arch/arm/include/asm/global_data.h"
@@ -2410,27 +1813,27 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.file 35 "include/iomux.h"
 	.file 36 "include/log.h"
 	.file 37 "include/stdio.h"
-	.file 38 "include/vsprintf.h"
-	.file 39 "include/power/regulator.h"
-	.file 40 "include/linux/delay.h"
-	.file 41 "./arch/arm/include/asm/arch/rockchip_dmc.h"
+	.file 38 "./arch/arm/include/asm/arch/sdram_common.h"
+	.file 39 "cmd/ddr_tool/../memtester/io_map.h"
+	.file 40 "cmd/ddr_tool/../memtester/ddr_tester_common.h"
+	.file 41 "include/vsprintf.h"
 	.section	.debug_info,"",@progbits
 .Ldebug_info0:
-	.4byte	0x2c16
+	.4byte	0x27ad
 	.2byte	0x4
 	.4byte	.Ldebug_abbrev0
 	.byte	0x8
 	.uleb128 0x1
-	.4byte	.LASF486
+	.4byte	.LASF478
 	.byte	0xc
-	.4byte	.LASF487
-	.4byte	.LASF488
-	.4byte	.Ldebug_ranges0+0x190
+	.4byte	.LASF479
+	.4byte	.LASF480
+	.4byte	.Ldebug_ranges0+0x90
 	.8byte	0
 	.4byte	.Ldebug_line0
 	.uleb128 0x2
 	.4byte	.LASF4
-	.byte	0x6
+	.byte	0x5
 	.byte	0xd
 	.4byte	0x34
 	.uleb128 0x3
@@ -2449,7 +1852,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF2
 	.uleb128 0x5
 	.4byte	.LASF21
-	.byte	0x9
+	.byte	0x8
 	.byte	0xc
 	.4byte	0x59
 	.uleb128 0x6
@@ -2462,7 +1865,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF3
 	.uleb128 0x2
 	.4byte	.LASF5
-	.byte	0x7
+	.byte	0x6
 	.byte	0xc
 	.4byte	0x34
 	.uleb128 0x3
@@ -2471,7 +1874,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF6
 	.uleb128 0x2
 	.4byte	.LASF7
-	.byte	0x7
+	.byte	0x6
 	.byte	0x12
 	.4byte	0x84
 	.uleb128 0x3
@@ -2488,26 +1891,26 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF10
 	.uleb128 0x7
 	.string	"u8"
-	.byte	0x7
+	.byte	0x6
 	.byte	0x1f
 	.4byte	0x34
 	.uleb128 0x8
 	.4byte	0x99
 	.uleb128 0x7
 	.string	"u32"
-	.byte	0x7
+	.byte	0x6
 	.byte	0x25
 	.4byte	0x84
 	.uleb128 0x4
 	.4byte	0xa8
 	.uleb128 0x2
 	.4byte	.LASF11
-	.byte	0x7
+	.byte	0x6
 	.byte	0x31
 	.4byte	0x92
 	.uleb128 0x2
 	.4byte	.LASF12
-	.byte	0x7
+	.byte	0x6
 	.byte	0x32
 	.4byte	0x92
 	.uleb128 0x3
@@ -2536,34 +1939,34 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0xf3
 	.uleb128 0x2
 	.4byte	.LASF16
-	.byte	0x8
+	.byte	0x7
 	.byte	0x59
 	.4byte	0x47
 	.uleb128 0x2
 	.4byte	.LASF17
-	.byte	0x8
+	.byte	0x7
 	.byte	0x5b
 	.4byte	0x3b
 	.uleb128 0x2
 	.4byte	.LASF18
-	.byte	0x8
+	.byte	0x7
 	.byte	0x69
 	.4byte	0x67
 	.uleb128 0x2
 	.4byte	.LASF19
-	.byte	0x8
+	.byte	0x7
 	.byte	0x6b
 	.4byte	0x79
 	.uleb128 0x2
 	.4byte	.LASF20
-	.byte	0x8
+	.byte	0x7
 	.byte	0x97
 	.4byte	0x79
 	.uleb128 0xa
 	.byte	0x8
 	.uleb128 0x5
 	.4byte	.LASF22
-	.byte	0xa
+	.byte	0x9
 	.byte	0xb
 	.4byte	0xf3
 	.uleb128 0x3
@@ -2577,130 +1980,130 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0xd
 	.4byte	.LASF24
-	.byte	0xb
+	.byte	0xa
 	.2byte	0x140
 	.4byte	0x149
 	.uleb128 0xd
 	.4byte	.LASF25
-	.byte	0xb
+	.byte	0xa
 	.2byte	0x143
 	.4byte	0x149
 	.uleb128 0xd
 	.4byte	.LASF26
-	.byte	0xb
+	.byte	0xa
 	.2byte	0x143
 	.4byte	0x149
 	.uleb128 0xe
 	.4byte	.LASF45
 	.byte	0xa0
-	.byte	0xc
+	.byte	0xb
 	.byte	0x80
 	.4byte	0x25d
 	.uleb128 0xf
 	.4byte	.LASF27
-	.byte	0xc
+	.byte	0xb
 	.byte	0x81
-	.4byte	0x1505
+	.4byte	0x1517
 	.byte	0
 	.uleb128 0xf
 	.4byte	.LASF28
-	.byte	0xc
+	.byte	0xb
 	.byte	0x82
 	.4byte	0xd5
 	.byte	0x8
 	.uleb128 0xf
 	.4byte	.LASF29
-	.byte	0xc
+	.byte	0xb
 	.byte	0x83
 	.4byte	0x135
 	.byte	0x10
 	.uleb128 0xf
 	.4byte	.LASF30
-	.byte	0xc
+	.byte	0xb
 	.byte	0x84
 	.4byte	0x135
 	.byte	0x18
 	.uleb128 0xf
 	.4byte	.LASF31
-	.byte	0xc
+	.byte	0xb
 	.byte	0x85
 	.4byte	0x135
 	.byte	0x20
 	.uleb128 0xf
 	.4byte	.LASF32
-	.byte	0xc
+	.byte	0xb
 	.byte	0x86
-	.4byte	0x14d0
+	.4byte	0x14e2
 	.byte	0x28
 	.uleb128 0xf
 	.4byte	.LASF33
-	.byte	0xc
+	.byte	0xb
 	.byte	0x87
 	.4byte	0x109
 	.byte	0x30
 	.uleb128 0xf
 	.4byte	.LASF34
-	.byte	0xc
+	.byte	0xb
 	.byte	0x88
 	.4byte	0x25d
 	.byte	0x38
 	.uleb128 0xf
 	.4byte	.LASF35
-	.byte	0xc
+	.byte	0xb
 	.byte	0x89
 	.4byte	0x135
 	.byte	0x40
 	.uleb128 0xf
 	.4byte	.LASF36
-	.byte	0xc
+	.byte	0xb
 	.byte	0x8a
-	.4byte	0x1548
+	.4byte	0x155a
 	.byte	0x48
 	.uleb128 0xf
 	.4byte	.LASF37
-	.byte	0xc
+	.byte	0xb
 	.byte	0x8b
 	.4byte	0x135
 	.byte	0x50
 	.uleb128 0xf
 	.4byte	.LASF38
-	.byte	0xc
+	.byte	0xb
 	.byte	0x8c
 	.4byte	0x135
 	.byte	0x58
 	.uleb128 0xf
 	.4byte	.LASF39
-	.byte	0xc
+	.byte	0xb
 	.byte	0x8d
 	.4byte	0x290
 	.byte	0x60
 	.uleb128 0xf
 	.4byte	.LASF40
-	.byte	0xc
+	.byte	0xb
 	.byte	0x8e
 	.4byte	0x290
 	.byte	0x70
 	.uleb128 0xf
 	.4byte	.LASF41
-	.byte	0xc
+	.byte	0xb
 	.byte	0x8f
 	.4byte	0x290
 	.byte	0x80
 	.uleb128 0xf
 	.4byte	.LASF42
-	.byte	0xc
+	.byte	0xb
 	.byte	0x90
 	.4byte	0x11f
 	.byte	0x90
 	.uleb128 0xf
 	.4byte	.LASF43
-	.byte	0xc
+	.byte	0xb
 	.byte	0x91
 	.4byte	0x59
 	.byte	0x94
 	.uleb128 0x10
 	.string	"seq"
-	.byte	0xc
+	.byte	0xb
 	.byte	0x92
 	.4byte	0x59
 	.byte	0x98
@@ -2719,7 +2122,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0x5
 	.4byte	.LASF44
-	.byte	0xd
+	.byte	0xc
 	.byte	0x10
 	.4byte	0x26a
 	.uleb128 0xb
@@ -2732,18 +2135,18 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xe
 	.4byte	.LASF46
 	.byte	0x10
-	.byte	0xe
+	.byte	0xd
 	.byte	0x16
 	.4byte	0x2b5
 	.uleb128 0xf
 	.4byte	.LASF47
-	.byte	0xe
+	.byte	0xd
 	.byte	0x17
 	.4byte	0x2b5
 	.byte	0
 	.uleb128 0xf
 	.4byte	.LASF48
-	.byte	0xe
+	.byte	0xd
 	.byte	0x17
 	.4byte	0x2b5
 	.byte	0x8
@@ -2754,18 +2157,18 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xe
 	.4byte	.LASF49
 	.byte	0x10
-	.byte	0xf
+	.byte	0xe
 	.byte	0xf
 	.4byte	0x2e0
 	.uleb128 0xf
 	.4byte	.LASF28
-	.byte	0xf
+	.byte	0xe
 	.byte	0x10
 	.4byte	0xf3
 	.byte	0
 	.uleb128 0xf
 	.4byte	.LASF50
-	.byte	0xf
+	.byte	0xe
 	.byte	0x11
 	.4byte	0x2f9
 	.byte	0x8
@@ -2792,41 +2195,41 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0x2ff
 	.uleb128 0x5
 	.4byte	.LASF49
-	.byte	0xf
+	.byte	0xe
 	.byte	0xce
 	.4byte	0x30a
 	.uleb128 0x15
 	.2byte	0x1218
-	.byte	0x10
+	.byte	0xf
 	.byte	0x13
 	.4byte	0x361
 	.uleb128 0xf
 	.4byte	.LASF51
-	.byte	0x10
+	.byte	0xf
 	.byte	0x14
 	.4byte	0x109
 	.byte	0
 	.uleb128 0xf
 	.4byte	.LASF52
-	.byte	0x10
+	.byte	0xf
 	.byte	0x15
 	.4byte	0xfe
 	.byte	0x8
 	.uleb128 0xf
 	.4byte	.LASF53
-	.byte	0x10
+	.byte	0xf
 	.byte	0x16
 	.4byte	0x109
 	.byte	0x10
 	.uleb128 0xf
 	.4byte	.LASF54
-	.byte	0x10
+	.byte	0xf
 	.byte	0x17
 	.4byte	0x361
 	.byte	0x18
 	.uleb128 0x16
 	.4byte	.LASF55
-	.byte	0x10
+	.byte	0xf
 	.byte	0x18
 	.4byte	0x372
 	.2byte	0x1018
@@ -2847,7 +2250,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0x2
 	.4byte	.LASF56
-	.byte	0x10
+	.byte	0xf
 	.byte	0x32
 	.4byte	0x31a
 	.uleb128 0xb
@@ -2857,7 +2260,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0x5
 	.4byte	.LASF57
-	.byte	0x10
+	.byte	0xf
 	.byte	0x34
 	.4byte	0x38e
 	.uleb128 0x3
@@ -2867,18 +2270,18 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xe
 	.4byte	.LASF59
 	.byte	0x10
-	.byte	0x11
+	.byte	0x10
 	.byte	0x10
 	.4byte	0x3d0
 	.uleb128 0xf
 	.4byte	.LASF60
-	.byte	0x11
+	.byte	0x10
 	.byte	0x11
 	.4byte	0xb8
 	.byte	0
 	.uleb128 0xf
 	.4byte	.LASF51
-	.byte	0x11
+	.byte	0x10
 	.byte	0x12
 	.4byte	0xc3
 	.byte	0x8
@@ -2886,24 +2289,24 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xe
 	.4byte	.LASF61
 	.byte	0xa0
-	.byte	0x11
+	.byte	0x10
 	.byte	0x15
 	.4byte	0x401
 	.uleb128 0x10
 	.string	"cnt"
-	.byte	0x11
+	.byte	0x10
 	.byte	0x16
 	.4byte	0x3b
 	.byte	0
 	.uleb128 0xf
 	.4byte	.LASF51
-	.byte	0x11
+	.byte	0x10
 	.byte	0x17
 	.4byte	0xc3
 	.byte	0x8
 	.uleb128 0xf
 	.4byte	.LASF62
-	.byte	0x11
+	.byte	0x10
 	.byte	0x18
 	.4byte	0x401
 	.byte	0x10
@@ -2918,41 +2321,41 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x18
 	.string	"lmb"
 	.2byte	0x140
-	.byte	0x11
+	.byte	0x10
 	.byte	0x1b
 	.4byte	0x437
 	.uleb128 0xf
 	.4byte	.LASF63
-	.byte	0x11
+	.byte	0x10
 	.byte	0x1c
 	.4byte	0x3d0
 	.byte	0
 	.uleb128 0xf
 	.4byte	.LASF64
-	.byte	0x11
+	.byte	0x10
 	.byte	0x1d
 	.4byte	0x3d0
 	.byte	0xa0
 	.byte	0
 	.uleb128 0x19
 	.string	"lmb"
-	.byte	0x11
+	.byte	0x10
 	.byte	0x20
 	.4byte	0x411
 	.uleb128 0x1a
 	.byte	0x10
-	.byte	0x12
+	.byte	0x11
 	.byte	0x5a
 	.4byte	0x463
 	.uleb128 0xf
 	.4byte	.LASF54
-	.byte	0x12
+	.byte	0x11
 	.byte	0x5b
 	.4byte	0xb8
 	.byte	0
 	.uleb128 0xf
 	.4byte	.LASF51
-	.byte	0x12
+	.byte	0x11
 	.byte	0x5c
 	.4byte	0xc3
 	.byte	0x8
@@ -2960,120 +2363,120 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xe
 	.4byte	.LASF65
 	.byte	0xc8
-	.byte	0x12
+	.byte	0x11
 	.byte	0x1b
 	.4byte	0x554
 	.uleb128 0xf
 	.4byte	.LASF66
-	.byte	0x12
+	.byte	0x11
 	.byte	0x1c
 	.4byte	0x3b
 	.byte	0
 	.uleb128 0xf
 	.4byte	.LASF67
-	.byte	0x12
+	.byte	0x11
 	.byte	0x1d
 	.4byte	0xc3
 	.byte	0x8
 	.uleb128 0xf
 	.4byte	.LASF68
-	.byte	0x12
+	.byte	0x11
 	.byte	0x1e
 	.4byte	0x3b
 	.byte	0x10
 	.uleb128 0xf
 	.4byte	.LASF69
-	.byte	0x12
+	.byte	0x11
 	.byte	0x1f
 	.4byte	0x3b
 	.byte	0x18
 	.uleb128 0xf
 	.4byte	.LASF70
-	.byte	0x12
+	.byte	0x11
 	.byte	0x20
 	.4byte	0x3b
 	.byte	0x20
 	.uleb128 0xf
 	.4byte	.LASF71
-	.byte	0x12
+	.byte	0x11
 	.byte	0x21
 	.4byte	0x3b
 	.byte	0x28
 	.uleb128 0xf
 	.4byte	.LASF72
-	.byte	0x12
+	.byte	0x11
 	.byte	0x22
 	.4byte	0x3b
 	.byte	0x30
 	.uleb128 0xf
 	.4byte	.LASF73
-	.byte	0x12
+	.byte	0x11
 	.byte	0x24
 	.4byte	0x3b
 	.byte	0x38
 	.uleb128 0xf
 	.4byte	.LASF74
-	.byte	0x12
+	.byte	0x11
 	.byte	0x25
 	.4byte	0x3b
 	.byte	0x40
 	.uleb128 0xf
 	.4byte	.LASF75
-	.byte	0x12
+	.byte	0x11
 	.byte	0x26
 	.4byte	0x3b
 	.byte	0x48
 	.uleb128 0xf
 	.4byte	.LASF76
-	.byte	0x12
+	.byte	0x11
 	.byte	0x31
 	.4byte	0x3b
 	.byte	0x50
 	.uleb128 0xf
 	.4byte	.LASF77
-	.byte	0x12
+	.byte	0x11
 	.byte	0x32
 	.4byte	0x3b
 	.byte	0x58
 	.uleb128 0xf
 	.4byte	.LASF78
-	.byte	0x12
+	.byte	0x11
 	.byte	0x33
 	.4byte	0x280
 	.byte	0x60
 	.uleb128 0xf
 	.4byte	.LASF79
-	.byte	0x12
+	.byte	0x11
 	.byte	0x34
 	.4byte	0x47
 	.byte	0x66
 	.uleb128 0xf
 	.4byte	.LASF80
-	.byte	0x12
+	.byte	0x11
 	.byte	0x35
 	.4byte	0x3b
 	.byte	0x68
 	.uleb128 0xf
 	.4byte	.LASF81
-	.byte	0x12
+	.byte	0x11
 	.byte	0x36
 	.4byte	0x3b
 	.byte	0x70
 	.uleb128 0xf
 	.4byte	.LASF82
-	.byte	0x12
+	.byte	0x11
 	.byte	0x57
 	.4byte	0x109
 	.byte	0x78
 	.uleb128 0xf
 	.4byte	.LASF83
-	.byte	0x12
+	.byte	0x11
 	.byte	0x58
 	.4byte	0x109
 	.byte	0x80
 	.uleb128 0xf
 	.4byte	.LASF84
-	.byte	0x12
+	.byte	0x11
 	.byte	0x5d
 	.4byte	0x554
 	.byte	0x88
@@ -3087,89 +2490,89 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0x2
 	.4byte	.LASF85
-	.byte	0x12
+	.byte	0x11
 	.byte	0x5f
 	.4byte	0x463
 	.uleb128 0x5
 	.4byte	.LASF86
-	.byte	0x13
+	.byte	0x12
 	.byte	0x13
 	.4byte	0x109
 	.uleb128 0x5
 	.4byte	.LASF87
-	.byte	0x13
+	.byte	0x12
 	.byte	0x14
 	.4byte	0x109
 	.uleb128 0x5
 	.4byte	.LASF88
-	.byte	0x13
+	.byte	0x12
 	.byte	0x15
 	.4byte	0x109
 	.uleb128 0x5
 	.4byte	.LASF89
-	.byte	0x13
+	.byte	0x12
 	.byte	0x16
 	.4byte	0x109
 	.uleb128 0x5
 	.4byte	.LASF90
-	.byte	0x13
+	.byte	0x12
 	.byte	0x17
 	.4byte	0x109
 	.uleb128 0x5
 	.4byte	.LASF91
-	.byte	0x13
+	.byte	0x12
 	.byte	0x18
 	.4byte	0x109
 	.uleb128 0x5
 	.4byte	.LASF92
-	.byte	0x13
+	.byte	0x12
 	.byte	0x19
 	.4byte	0x109
 	.uleb128 0xe
 	.4byte	.LASF93
 	.byte	0x30
-	.byte	0x14
+	.byte	0x13
 	.byte	0x1e
 	.4byte	0x61d
 	.uleb128 0xf
 	.4byte	.LASF28
-	.byte	0x14
+	.byte	0x13
 	.byte	0x1f
 	.4byte	0xf3
 	.byte	0
 	.uleb128 0xf
 	.4byte	.LASF94
-	.byte	0x14
+	.byte	0x13
 	.byte	0x20
 	.4byte	0x59
 	.byte	0x8
 	.uleb128 0xf
 	.4byte	.LASF95
-	.byte	0x14
+	.byte	0x13
 	.byte	0x21
 	.4byte	0x59
 	.byte	0xc
 	.uleb128 0x10
 	.string	"cmd"
-	.byte	0x14
+	.byte	0x13
 	.byte	0x23
 	.4byte	0x647
 	.byte	0x10
 	.uleb128 0xf
 	.4byte	.LASF96
-	.byte	0x14
+	.byte	0x13
 	.byte	0x24
 	.4byte	0xf3
 	.byte	0x18
 	.uleb128 0xf
 	.4byte	.LASF97
-	.byte	0x14
+	.byte	0x13
 	.byte	0x26
 	.4byte	0xf3
 	.byte	0x20
 	.uleb128 0xf
 	.4byte	.LASF98
-	.byte	0x14
+	.byte	0x13
 	.byte	0x2a
 	.4byte	0x676
 	.byte	0x28
@@ -3217,14 +2620,14 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0x64d
 	.uleb128 0x2
 	.4byte	.LASF99
-	.byte	0x14
+	.byte	0x13
 	.byte	0x2e
 	.4byte	0x5bc
 	.uleb128 0x1b
 	.4byte	.LASF167
 	.byte	0x4
 	.4byte	0x59
-	.byte	0x14
+	.byte	0x13
 	.byte	0x7a
 	.4byte	0x6aa
 	.uleb128 0x1c
@@ -3237,92 +2640,92 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF102
 	.sleb128 -1
 	.byte	0
-	.uleb128 0xe
+	.uleb128 0x2
 	.4byte	.LASF103
+	.byte	0x14
+	.byte	0x11
+	.4byte	0x12a
+	.uleb128 0xe
+	.4byte	.LASF104
 	.byte	0x28
 	.byte	0x15
 	.byte	0x39
-	.4byte	0x72f
+	.4byte	0x73a
 	.uleb128 0xf
-	.4byte	.LASF104
+	.4byte	.LASF105
 	.byte	0x15
 	.byte	0x3a
-	.4byte	0x740
+	.4byte	0x6aa
 	.byte	0
 	.uleb128 0xf
-	.4byte	.LASF105
+	.4byte	.LASF106
 	.byte	0x15
 	.byte	0x3b
-	.4byte	0x740
+	.4byte	0x6aa
 	.byte	0x4
 	.uleb128 0xf
-	.4byte	.LASF106
+	.4byte	.LASF107
 	.byte	0x15
 	.byte	0x3c
-	.4byte	0x740
+	.4byte	0x6aa
 	.byte	0x8
 	.uleb128 0xf
-	.4byte	.LASF107
+	.4byte	.LASF108
 	.byte	0x15
 	.byte	0x3d
-	.4byte	0x740
+	.4byte	0x6aa
 	.byte	0xc
 	.uleb128 0xf
-	.4byte	.LASF108
+	.4byte	.LASF109
 	.byte	0x15
 	.byte	0x3e
-	.4byte	0x740
+	.4byte	0x6aa
 	.byte	0x10
 	.uleb128 0xf
-	.4byte	.LASF109
+	.4byte	.LASF110
 	.byte	0x15
 	.byte	0x3f
-	.4byte	0x740
+	.4byte	0x6aa
 	.byte	0x14
 	.uleb128 0xf
-	.4byte	.LASF110
+	.4byte	.LASF111
 	.byte	0x15
 	.byte	0x40
-	.4byte	0x740
+	.4byte	0x6aa
 	.byte	0x18
 	.uleb128 0xf
-	.4byte	.LASF111
+	.4byte	.LASF112
 	.byte	0x15
 	.byte	0x43
-	.4byte	0x740
+	.4byte	0x6aa
 	.byte	0x1c
 	.uleb128 0xf
-	.4byte	.LASF112
+	.4byte	.LASF113
 	.byte	0x15
 	.byte	0x46
-	.4byte	0x740
+	.4byte	0x6aa
 	.byte	0x20
 	.uleb128 0xf
-	.4byte	.LASF113
+	.4byte	.LASF114
 	.byte	0x15
 	.byte	0x49
-	.4byte	0x740
+	.4byte	0x6aa
 	.byte	0x24
 	.byte	0
-	.uleb128 0x5
-	.4byte	.LASF114
+	.uleb128 0xd
+	.4byte	.LASF115
 	.byte	0x16
-	.byte	0xf
-	.4byte	0x73a
+	.2byte	0x136
+	.4byte	0x746
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x6aa
-	.uleb128 0x2
-	.4byte	.LASF115
-	.byte	0x16
-	.byte	0x12
-	.4byte	0x12a
+	.4byte	0x6b5
 	.uleb128 0x1e
 	.4byte	.LASF116
 	.byte	0x40
 	.byte	0x17
 	.2byte	0x134
-	.4byte	0x7f5
+	.4byte	0x7f6
 	.uleb128 0x1f
 	.4byte	.LASF117
 	.byte	0x17
@@ -3393,12 +2796,12 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF128
 	.byte	0x17
 	.2byte	0x140
-	.4byte	0x7f5
+	.4byte	0x7f6
 	.byte	0x20
 	.byte	0
 	.uleb128 0xb
 	.4byte	0x114
-	.4byte	0x805
+	.4byte	0x806
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x1f
@@ -3407,13 +2810,13 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF129
 	.byte	0x17
 	.2byte	0x141
-	.4byte	0x74b
+	.4byte	0x74c
 	.uleb128 0x1e
 	.4byte	.LASF130
 	.byte	0x30
 	.byte	0x17
 	.2byte	0x143
-	.4byte	0x893
+	.4byte	0x894
 	.uleb128 0x1f
 	.4byte	.LASF54
 	.byte	0x17
@@ -3473,24 +2876,24 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF137
 	.byte	0x17
 	.2byte	0x149
-	.4byte	0x811
+	.4byte	0x812
 	.uleb128 0x22
 	.4byte	.LASF138
 	.2byte	0x280
 	.byte	0x17
 	.2byte	0x14f
-	.4byte	0xa3c
+	.4byte	0xa3d
 	.uleb128 0x1f
 	.4byte	.LASF139
 	.byte	0x17
 	.2byte	0x155
-	.4byte	0xa3c
+	.4byte	0xa3d
 	.byte	0
 	.uleb128 0x1f
 	.4byte	.LASF140
 	.byte	0x17
 	.2byte	0x156
-	.4byte	0x805
+	.4byte	0x806
 	.byte	0x8
 	.uleb128 0x1f
 	.4byte	.LASF141
@@ -3580,7 +2983,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.string	"os"
 	.byte	0x17
 	.2byte	0x16e
-	.4byte	0x893
+	.4byte	0x894
 	.byte	0xb8
 	.uleb128 0x21
 	.string	"ep"
@@ -3640,7 +3043,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.string	"kbd"
 	.byte	0x17
 	.2byte	0x17a
-	.4byte	0xa42
+	.4byte	0xa43
 	.2byte	0x130
 	.uleb128 0x23
 	.4byte	.LASF163
@@ -3663,7 +3066,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x805
+	.4byte	0x806
 	.uleb128 0x9
 	.byte	0x8
 	.4byte	0x564
@@ -3671,19 +3074,19 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF165
 	.byte	0x17
 	.2byte	0x18f
-	.4byte	0x89f
+	.4byte	0x8a0
 	.uleb128 0xd
 	.4byte	.LASF166
 	.byte	0x17
 	.2byte	0x191
-	.4byte	0xa48
+	.4byte	0xa49
 	.uleb128 0x1b
 	.4byte	.LASF168
 	.byte	0x4
 	.4byte	0x59
 	.byte	0x18
 	.byte	0xe
-	.4byte	0xc75
+	.4byte	0xc7c
 	.uleb128 0x1c
 	.4byte	.LASF169
 	.byte	0
@@ -3939,8 +3342,11 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x1c
 	.4byte	.LASF253
 	.byte	0x54
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF254
+	.byte	0x55
+	.uleb128 0x1d
+	.4byte	.LASF255
 	.sleb128 -1
 	.byte	0
 	.uleb128 0x25
@@ -3948,19 +3354,19 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0x84
 	.byte	0x24
 	.byte	0xe0
-	.4byte	0xc88
+	.4byte	0xc8f
 	.uleb128 0x1c
-	.4byte	.LASF255
+	.4byte	.LASF256
 	.byte	0x5
 	.byte	0
 	.uleb128 0xe
-	.4byte	.LASF256
+	.4byte	.LASF257
 	.byte	0x40
 	.byte	0x19
 	.byte	0xc
-	.4byte	0xd01
+	.4byte	0xd08
 	.uleb128 0xf
-	.4byte	.LASF257
+	.4byte	.LASF258
 	.byte	0x19
 	.byte	0x22
 	.4byte	0x3b
@@ -3978,50 +3384,50 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0x84
 	.byte	0xc
 	.uleb128 0xf
-	.4byte	.LASF258
+	.4byte	.LASF259
 	.byte	0x19
 	.byte	0x25
 	.4byte	0x3b
 	.byte	0x10
 	.uleb128 0xf
-	.4byte	.LASF259
+	.4byte	.LASF260
 	.byte	0x19
 	.byte	0x26
 	.4byte	0x92
 	.byte	0x18
 	.uleb128 0xf
-	.4byte	.LASF260
+	.4byte	.LASF261
 	.byte	0x19
 	.byte	0x28
 	.4byte	0x3b
 	.byte	0x20
 	.uleb128 0xf
-	.4byte	.LASF261
+	.4byte	.LASF262
 	.byte	0x19
 	.byte	0x29
 	.4byte	0x3b
 	.byte	0x28
 	.uleb128 0xf
-	.4byte	.LASF262
+	.4byte	.LASF263
 	.byte	0x19
 	.byte	0x2b
 	.4byte	0x3b
 	.byte	0x30
 	.uleb128 0xf
-	.4byte	.LASF263
+	.4byte	.LASF264
 	.byte	0x19
 	.byte	0x2c
 	.4byte	0x3b
 	.byte	0x38
 	.byte	0
 	.uleb128 0xe
-	.4byte	.LASF264
+	.4byte	.LASF265
 	.byte	0x18
 	.byte	0x1a
 	.byte	0x22
-	.4byte	0xd3d
+	.4byte	0xd44
 	.uleb128 0xf
-	.4byte	.LASF265
+	.4byte	.LASF266
 	.byte	0x1a
 	.byte	0x23
 	.4byte	0xa8
@@ -4033,29 +3439,29 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0xa8
 	.byte	0x4
 	.uleb128 0xf
-	.4byte	.LASF266
+	.4byte	.LASF267
 	.byte	0x1a
 	.byte	0x25
 	.4byte	0xa8
 	.byte	0x8
 	.uleb128 0xf
-	.4byte	.LASF267
+	.4byte	.LASF268
 	.byte	0x1a
 	.byte	0x26
 	.4byte	0x109
 	.byte	0x10
 	.byte	0
 	.uleb128 0x26
-	.4byte	.LASF268
-	.2byte	0x198
+	.4byte	.LASF269
+	.2byte	0x1a0
 	.byte	0x1a
 	.byte	0x29
-	.4byte	0xf28
+	.4byte	0xf3c
 	.uleb128 0x10
 	.string	"bd"
 	.byte	0x1a
 	.byte	0x2a
-	.4byte	0xa42
+	.4byte	0xa43
 	.byte	0
 	.uleb128 0xf
 	.4byte	.LASF42
@@ -4064,193 +3470,193 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0x3b
 	.byte	0x8
 	.uleb128 0xf
-	.4byte	.LASF266
+	.4byte	.LASF267
 	.byte	0x1a
 	.byte	0x2c
 	.4byte	0x84
 	.byte	0x10
 	.uleb128 0xf
-	.4byte	.LASF269
+	.4byte	.LASF270
 	.byte	0x1a
 	.byte	0x2d
 	.4byte	0x3b
 	.byte	0x18
 	.uleb128 0xf
-	.4byte	.LASF270
+	.4byte	.LASF271
 	.byte	0x1a
 	.byte	0x2e
 	.4byte	0x3b
 	.byte	0x20
 	.uleb128 0xf
-	.4byte	.LASF271
+	.4byte	.LASF272
 	.byte	0x1a
 	.byte	0x30
 	.4byte	0x3b
 	.byte	0x28
 	.uleb128 0xf
-	.4byte	.LASF272
+	.4byte	.LASF273
 	.byte	0x1a
 	.byte	0x31
 	.4byte	0x3b
 	.byte	0x30
 	.uleb128 0xf
-	.4byte	.LASF273
+	.4byte	.LASF274
 	.byte	0x1a
 	.byte	0x33
 	.4byte	0x3b
 	.byte	0x38
 	.uleb128 0xf
-	.4byte	.LASF274
+	.4byte	.LASF275
 	.byte	0x1a
 	.byte	0x3d
 	.4byte	0x3b
 	.byte	0x40
 	.uleb128 0xf
-	.4byte	.LASF275
+	.4byte	.LASF276
 	.byte	0x1a
 	.byte	0x41
 	.4byte	0x3b
 	.byte	0x48
 	.uleb128 0xf
-	.4byte	.LASF276
+	.4byte	.LASF277
 	.byte	0x1a
 	.byte	0x42
 	.4byte	0x3b
 	.byte	0x50
 	.uleb128 0xf
-	.4byte	.LASF277
+	.4byte	.LASF278
 	.byte	0x1a
 	.byte	0x44
 	.4byte	0x3b
 	.byte	0x58
 	.uleb128 0xf
-	.4byte	.LASF278
+	.4byte	.LASF279
 	.byte	0x1a
 	.byte	0x45
 	.4byte	0x3b
 	.byte	0x60
 	.uleb128 0xf
-	.4byte	.LASF279
+	.4byte	.LASF280
 	.byte	0x1a
 	.byte	0x46
 	.4byte	0xc3
 	.byte	0x68
 	.uleb128 0xf
-	.4byte	.LASF280
+	.4byte	.LASF281
 	.byte	0x1a
 	.byte	0x47
 	.4byte	0x3b
 	.byte	0x70
 	.uleb128 0xf
-	.4byte	.LASF281
+	.4byte	.LASF282
 	.byte	0x1a
 	.byte	0x48
 	.4byte	0x3b
 	.byte	0x78
 	.uleb128 0xf
-	.4byte	.LASF282
+	.4byte	.LASF283
 	.byte	0x1a
 	.byte	0x49
 	.4byte	0x3b
 	.byte	0x80
 	.uleb128 0xf
-	.4byte	.LASF283
+	.4byte	.LASF284
 	.byte	0x1a
 	.byte	0x4a
 	.4byte	0x3b
 	.byte	0x88
 	.uleb128 0xf
-	.4byte	.LASF284
+	.4byte	.LASF285
 	.byte	0x1a
 	.byte	0x4b
-	.4byte	0xf28
+	.4byte	0xf3c
 	.byte	0x90
 	.uleb128 0xf
-	.4byte	.LASF285
+	.4byte	.LASF286
 	.byte	0x1a
 	.byte	0x4e
 	.4byte	0x25d
 	.byte	0x98
 	.uleb128 0xf
-	.4byte	.LASF286
+	.4byte	.LASF287
 	.byte	0x1a
 	.byte	0x4f
 	.4byte	0x25d
 	.byte	0xa0
 	.uleb128 0xf
-	.4byte	.LASF287
+	.4byte	.LASF288
 	.byte	0x1a
 	.byte	0x50
 	.4byte	0x290
 	.byte	0xa8
 	.uleb128 0xf
-	.4byte	.LASF288
+	.4byte	.LASF289
 	.byte	0x1a
 	.byte	0x56
 	.4byte	0x263
 	.byte	0xb8
 	.uleb128 0xf
-	.4byte	.LASF289
+	.4byte	.LASF290
 	.byte	0x1a
 	.byte	0x57
 	.4byte	0x135
 	.byte	0xc0
 	.uleb128 0xf
-	.4byte	.LASF290
+	.4byte	.LASF291
 	.byte	0x1a
 	.byte	0x58
 	.4byte	0x3b
 	.byte	0xc8
 	.uleb128 0xf
-	.4byte	.LASF291
+	.4byte	.LASF292
 	.byte	0x1a
 	.byte	0x5a
-	.4byte	0xfa0
+	.4byte	0xfb4
 	.byte	0xd0
 	.uleb128 0x10
 	.string	"jt"
 	.byte	0x1a
 	.byte	0x5c
-	.4byte	0xfab
+	.4byte	0xfbf
 	.byte	0xd8
 	.uleb128 0xf
-	.4byte	.LASF292
+	.4byte	.LASF293
 	.byte	0x1a
 	.byte	0x5d
-	.4byte	0xfb1
+	.4byte	0xfc5
 	.byte	0xe0
 	.uleb128 0x16
-	.4byte	.LASF293
+	.4byte	.LASF294
 	.byte	0x1a
 	.byte	0x67
 	.4byte	0x84
 	.2byte	0x100
 	.uleb128 0x16
-	.4byte	.LASF294
+	.4byte	.LASF295
 	.byte	0x1a
 	.byte	0x68
 	.4byte	0x84
 	.2byte	0x104
 	.uleb128 0x16
-	.4byte	.LASF295
+	.4byte	.LASF296
 	.byte	0x1a
 	.byte	0x6a
 	.4byte	0x3b
 	.2byte	0x108
 	.uleb128 0x16
-	.4byte	.LASF296
+	.4byte	.LASF297
 	.byte	0x1a
 	.byte	0x6b
 	.4byte	0x3b
 	.2byte	0x110
 	.uleb128 0x16
-	.4byte	.LASF297
+	.4byte	.LASF298
 	.byte	0x1a
 	.byte	0x6c
 	.4byte	0x3b
 	.2byte	0x118
 	.uleb128 0x16
-	.4byte	.LASF298
+	.4byte	.LASF299
 	.byte	0x1a
 	.byte	0x75
 	.4byte	0x25d
@@ -4259,42 +3665,48 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF136
 	.byte	0x1a
 	.byte	0x76
-	.4byte	0xc88
+	.4byte	0xc8f
 	.2byte	0x128
 	.uleb128 0x16
-	.4byte	.LASF299
+	.4byte	.LASF300
 	.byte	0x1a
 	.byte	0x7c
 	.4byte	0x109
 	.2byte	0x168
 	.uleb128 0x16
-	.4byte	.LASF300
+	.4byte	.LASF301
 	.byte	0x1a
 	.byte	0x7d
 	.4byte	0x109
 	.2byte	0x170
 	.uleb128 0x16
-	.4byte	.LASF301
+	.4byte	.LASF302
 	.byte	0x1a
 	.byte	0x83
 	.4byte	0xb8
 	.2byte	0x178
 	.uleb128 0x16
-	.4byte	.LASF302
+	.4byte	.LASF303
 	.byte	0x1a
 	.byte	0x88
-	.4byte	0xd01
+	.4byte	0xd08
 	.2byte	0x180
+	.uleb128 0x16
+	.4byte	.LASF304
+	.byte	0x1a
+	.byte	0x89
+	.4byte	0x109
+	.2byte	0x198
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0xd3d
+	.4byte	0xd44
 	.uleb128 0xe
-	.4byte	.LASF303
+	.4byte	.LASF305
 	.byte	0x40
 	.byte	0x1b
 	.byte	0x2c
-	.4byte	0xf9b
+	.4byte	0xfaf
 	.uleb128 0xf
 	.4byte	.LASF28
 	.byte	0x1b
@@ -4308,109 +3720,109 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0xd5
 	.byte	0x8
 	.uleb128 0xf
-	.4byte	.LASF304
+	.4byte	.LASF306
 	.byte	0x1b
 	.byte	0x2f
-	.4byte	0x1448
+	.4byte	0x145c
 	.byte	0x10
 	.uleb128 0xf
-	.4byte	.LASF305
+	.4byte	.LASF307
 	.byte	0x1b
 	.byte	0x30
 	.4byte	0xd5
 	.byte	0x18
 	.uleb128 0xf
-	.4byte	.LASF306
+	.4byte	.LASF308
 	.byte	0x1b
 	.byte	0x32
-	.4byte	0x1490
+	.4byte	0x14a4
 	.byte	0x20
 	.uleb128 0xf
 	.4byte	.LASF34
 	.byte	0x1b
 	.byte	0x33
-	.4byte	0xfa0
+	.4byte	0xfb4
 	.byte	0x28
 	.uleb128 0xf
-	.4byte	.LASF307
+	.4byte	.LASF309
 	.byte	0x1b
 	.byte	0x34
-	.4byte	0xfa0
+	.4byte	0xfb4
 	.byte	0x30
 	.uleb128 0xf
-	.4byte	.LASF308
+	.4byte	.LASF310
 	.byte	0x1b
 	.byte	0x35
-	.4byte	0xfa0
+	.4byte	0xfb4
 	.byte	0x38
 	.byte	0
 	.uleb128 0x8
-	.4byte	0xf2e
+	.4byte	0xf42
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0xf2e
+	.4byte	0xf42
 	.uleb128 0x27
-	.4byte	.LASF489
+	.4byte	.LASF481
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0xfa6
+	.4byte	0xfba
 	.uleb128 0xb
 	.4byte	0xe0
-	.4byte	0xfc1
+	.4byte	0xfd5
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x1f
 	.byte	0
 	.uleb128 0x2
-	.4byte	.LASF309
+	.4byte	.LASF311
 	.byte	0x1a
-	.byte	0x8e
-	.4byte	0xd3d
+	.byte	0x8f
+	.4byte	0xd44
 	.uleb128 0x4
-	.4byte	0xfc1
+	.4byte	0xfd5
 	.uleb128 0x5
-	.4byte	.LASF310
-	.byte	0x6
+	.4byte	.LASF312
+	.byte	0x5
 	.byte	0xab
 	.4byte	0x109
 	.uleb128 0xb
 	.4byte	0x99
-	.4byte	0xfe7
+	.4byte	0xffb
 	.uleb128 0xc
 	.byte	0
 	.uleb128 0x5
-	.4byte	.LASF311
-	.byte	0x6
+	.4byte	.LASF313
+	.byte	0x5
 	.byte	0xad
-	.4byte	0xfdc
+	.4byte	0xff0
 	.uleb128 0x5
-	.4byte	.LASF312
-	.byte	0x6
+	.4byte	.LASF314
+	.byte	0x5
 	.byte	0xae
-	.4byte	0xfdc
+	.4byte	0xff0
 	.uleb128 0x5
-	.4byte	.LASF313
-	.byte	0x6
+	.4byte	.LASF315
+	.byte	0x5
 	.byte	0xfc
 	.4byte	0x109
 	.uleb128 0x5
-	.4byte	.LASF314
-	.byte	0x6
+	.4byte	.LASF316
+	.byte	0x5
 	.byte	0xfd
 	.4byte	0x109
 	.uleb128 0x5
-	.4byte	.LASF315
-	.byte	0x6
+	.4byte	.LASF317
+	.byte	0x5
 	.byte	0xfe
 	.4byte	0x109
 	.uleb128 0xe
-	.4byte	.LASF316
+	.4byte	.LASF318
 	.byte	0x4
 	.byte	0x1c
 	.byte	0x2e
-	.4byte	0x1037
+	.4byte	0x104b
 	.uleb128 0xf
-	.4byte	.LASF317
+	.4byte	.LASF319
 	.byte	0x1c
 	.byte	0x2f
 	.4byte	0x12a
@@ -4420,25 +3832,25 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0x8
 	.4byte	0x29
 	.uleb128 0xe
-	.4byte	.LASF318
+	.4byte	.LASF320
 	.byte	0x68
 	.byte	0x1c
 	.byte	0xa6
-	.4byte	0x10da
+	.4byte	0x10ee
 	.uleb128 0xf
 	.4byte	.LASF28
 	.byte	0x1c
 	.byte	0xa8
-	.4byte	0x10da
+	.4byte	0x10ee
 	.byte	0
 	.uleb128 0xf
-	.4byte	.LASF319
+	.4byte	.LASF321
 	.byte	0x1c
 	.byte	0xa9
 	.4byte	0x280
 	.byte	0x10
 	.uleb128 0xf
-	.4byte	.LASF320
+	.4byte	.LASF322
 	.byte	0x1c
 	.byte	0xaa
 	.4byte	0xb8
@@ -4450,43 +3862,43 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0x59
 	.byte	0x20
 	.uleb128 0xf
-	.4byte	.LASF321
+	.4byte	.LASF323
 	.byte	0x1c
 	.byte	0xad
-	.4byte	0x1104
+	.4byte	0x1118
 	.byte	0x28
 	.uleb128 0xf
-	.4byte	.LASF322
+	.4byte	.LASF324
 	.byte	0x1c
 	.byte	0xae
-	.4byte	0x1123
+	.4byte	0x1137
 	.byte	0x30
 	.uleb128 0xf
-	.4byte	.LASF323
+	.4byte	.LASF325
 	.byte	0x1c
 	.byte	0xaf
-	.4byte	0x1138
+	.4byte	0x114c
 	.byte	0x38
 	.uleb128 0xf
-	.4byte	.LASF324
+	.4byte	.LASF326
 	.byte	0x1c
 	.byte	0xb0
-	.4byte	0x1149
+	.4byte	0x115d
 	.byte	0x40
 	.uleb128 0xf
-	.4byte	.LASF325
+	.4byte	.LASF327
 	.byte	0x1c
 	.byte	0xb4
-	.4byte	0x1138
+	.4byte	0x114c
 	.byte	0x48
 	.uleb128 0xf
 	.4byte	.LASF47
 	.byte	0x1c
 	.byte	0xb5
-	.4byte	0x10fe
+	.4byte	0x1112
 	.byte	0x50
 	.uleb128 0xf
-	.4byte	.LASF326
+	.4byte	.LASF328
 	.byte	0x1c
 	.byte	0xb6
 	.4byte	0x59
@@ -4500,30 +3912,30 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0xb
 	.4byte	0xe0
-	.4byte	0x10ea
+	.4byte	0x10fe
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0xf
 	.byte	0
 	.uleb128 0x13
 	.4byte	0x59
-	.4byte	0x10fe
+	.4byte	0x1112
 	.uleb128 0x14
-	.4byte	0x10fe
+	.4byte	0x1112
 	.uleb128 0x14
-	.4byte	0xa42
+	.4byte	0xa43
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x103d
+	.4byte	0x1051
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x10ea
+	.4byte	0x10fe
 	.uleb128 0x13
 	.4byte	0x59
-	.4byte	0x1123
+	.4byte	0x1137
 	.uleb128 0x14
-	.4byte	0x10fe
+	.4byte	0x1112
 	.uleb128 0x14
 	.4byte	0x135
 	.uleb128 0x14
@@ -4531,248 +3943,248 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x110a
+	.4byte	0x111e
 	.uleb128 0x13
 	.4byte	0x59
-	.4byte	0x1138
+	.4byte	0x114c
 	.uleb128 0x14
-	.4byte	0x10fe
+	.4byte	0x1112
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x1129
+	.4byte	0x113d
 	.uleb128 0x28
-	.4byte	0x1149
+	.4byte	0x115d
 	.uleb128 0x14
-	.4byte	0x10fe
+	.4byte	0x1112
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x113e
+	.4byte	0x1152
 	.uleb128 0x5
-	.4byte	.LASF327
+	.4byte	.LASF329
 	.byte	0x1c
 	.byte	0xbd
-	.4byte	0x10fe
+	.4byte	0x1112
 	.uleb128 0x28
-	.4byte	0x116a
+	.4byte	0x117e
 	.uleb128 0x14
 	.4byte	0x135
 	.uleb128 0x14
 	.4byte	0x59
 	.byte	0
 	.uleb128 0xd
-	.4byte	.LASF328
+	.4byte	.LASF330
 	.byte	0x1c
 	.2byte	0x11e
-	.4byte	0x1176
+	.4byte	0x118a
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x115a
+	.4byte	0x116e
 	.uleb128 0xb
 	.4byte	0x99
-	.4byte	0x118c
+	.4byte	0x11a0
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x5
 	.byte	0
 	.uleb128 0xd
-	.4byte	.LASF329
+	.4byte	.LASF331
 	.byte	0x1c
 	.2byte	0x1fd
-	.4byte	0x101e
+	.4byte	0x1032
 	.uleb128 0xd
-	.4byte	.LASF330
+	.4byte	.LASF332
 	.byte	0x1c
 	.2byte	0x1fe
-	.4byte	0x101e
+	.4byte	0x1032
 	.uleb128 0xd
-	.4byte	.LASF331
+	.4byte	.LASF333
 	.byte	0x1c
 	.2byte	0x200
-	.4byte	0x101e
+	.4byte	0x1032
 	.uleb128 0xd
-	.4byte	.LASF332
+	.4byte	.LASF334
 	.byte	0x1c
 	.2byte	0x205
-	.4byte	0xfb1
+	.4byte	0xfc5
 	.uleb128 0xd
-	.4byte	.LASF333
+	.4byte	.LASF335
 	.byte	0x1c
 	.2byte	0x206
-	.4byte	0xfb1
+	.4byte	0xfc5
 	.uleb128 0xb
 	.4byte	0xe0
-	.4byte	0x11d8
+	.4byte	0x11ec
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x3f
 	.byte	0
 	.uleb128 0xd
-	.4byte	.LASF334
+	.4byte	.LASF336
 	.byte	0x1c
 	.2byte	0x207
-	.4byte	0x11c8
+	.4byte	0x11dc
 	.uleb128 0xd
-	.4byte	.LASF335
+	.4byte	.LASF337
 	.byte	0x1c
 	.2byte	0x209
-	.4byte	0x117c
+	.4byte	0x1190
 	.uleb128 0xd
-	.4byte	.LASF336
+	.4byte	.LASF338
 	.byte	0x1c
 	.2byte	0x20a
-	.4byte	0x117c
+	.4byte	0x1190
 	.uleb128 0xd
-	.4byte	.LASF337
+	.4byte	.LASF339
 	.byte	0x1c
 	.2byte	0x20b
-	.4byte	0x101e
+	.4byte	0x1032
 	.uleb128 0xd
-	.4byte	.LASF338
+	.4byte	.LASF340
 	.byte	0x1c
 	.2byte	0x20c
-	.4byte	0x101e
+	.4byte	0x1032
 	.uleb128 0xd
-	.4byte	.LASF339
+	.4byte	.LASF341
 	.byte	0x1c
 	.2byte	0x20d
-	.4byte	0x1037
+	.4byte	0x104b
 	.uleb128 0xb
-	.4byte	0x1037
-	.4byte	0x1230
+	.4byte	0x104b
+	.4byte	0x1244
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x3
 	.byte	0
 	.uleb128 0xd
-	.4byte	.LASF340
+	.4byte	.LASF342
 	.byte	0x1c
 	.2byte	0x20e
-	.4byte	0x1220
+	.4byte	0x1234
 	.uleb128 0xd
-	.4byte	.LASF341
+	.4byte	.LASF343
 	.byte	0x1c
 	.2byte	0x20f
-	.4byte	0x1037
+	.4byte	0x104b
 	.uleb128 0xd
-	.4byte	.LASF342
+	.4byte	.LASF344
 	.byte	0x1c
 	.2byte	0x210
 	.4byte	0x59
 	.uleb128 0xb
 	.4byte	0xa3
-	.4byte	0x1264
+	.4byte	0x1278
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x5
 	.byte	0
 	.uleb128 0x8
-	.4byte	0x1254
+	.4byte	0x1268
 	.uleb128 0xd
-	.4byte	.LASF343
+	.4byte	.LASF345
 	.byte	0x1c
 	.2byte	0x211
-	.4byte	0x1264
+	.4byte	0x1278
 	.uleb128 0xd
-	.4byte	.LASF344
+	.4byte	.LASF346
 	.byte	0x1c
 	.2byte	0x212
-	.4byte	0x1264
+	.4byte	0x1278
 	.uleb128 0xd
-	.4byte	.LASF345
+	.4byte	.LASF347
 	.byte	0x1c
 	.2byte	0x216
 	.4byte	0xfe
 	.uleb128 0xd
-	.4byte	.LASF346
+	.4byte	.LASF348
 	.byte	0x1c
 	.2byte	0x217
 	.4byte	0xfe
 	.uleb128 0xd
-	.4byte	.LASF347
+	.4byte	.LASF349
 	.byte	0x1c
 	.2byte	0x219
 	.4byte	0x59
 	.uleb128 0xb
 	.4byte	0xe0
-	.4byte	0x12b6
+	.4byte	0x12ca
 	.uleb128 0x17
 	.4byte	0xce
 	.2byte	0x3ff
 	.byte	0
 	.uleb128 0xd
-	.4byte	.LASF348
+	.4byte	.LASF350
 	.byte	0x1c
 	.2byte	0x220
-	.4byte	0x12a5
+	.4byte	0x12b9
 	.uleb128 0xd
-	.4byte	.LASF349
+	.4byte	.LASF351
 	.byte	0x1c
 	.2byte	0x222
 	.4byte	0xa8
 	.uleb128 0xd
-	.4byte	.LASF350
+	.4byte	.LASF352
 	.byte	0x1c
 	.2byte	0x224
 	.4byte	0xa8
 	.uleb128 0xd
-	.4byte	.LASF351
+	.4byte	.LASF353
 	.byte	0x1c
 	.2byte	0x230
-	.4byte	0x101e
+	.4byte	0x1032
 	.uleb128 0x29
-	.4byte	.LASF352
+	.4byte	.LASF354
 	.byte	0x4
 	.4byte	0x84
 	.byte	0x1c
 	.2byte	0x286
-	.4byte	0x1310
+	.4byte	0x1324
 	.uleb128 0x1c
-	.4byte	.LASF353
+	.4byte	.LASF355
 	.byte	0
 	.uleb128 0x1c
-	.4byte	.LASF354
+	.4byte	.LASF356
 	.byte	0x1
 	.uleb128 0x1c
-	.4byte	.LASF355
+	.4byte	.LASF357
 	.byte	0x2
 	.uleb128 0x1c
-	.4byte	.LASF356
+	.4byte	.LASF358
 	.byte	0x3
 	.byte	0
 	.uleb128 0xd
-	.4byte	.LASF357
+	.4byte	.LASF359
 	.byte	0x1c
 	.2byte	0x28c
-	.4byte	0x12e6
+	.4byte	0x12fa
 	.uleb128 0xd
-	.4byte	.LASF358
+	.4byte	.LASF360
 	.byte	0x1d
 	.2byte	0x3ba
 	.4byte	0x109
 	.uleb128 0xd
-	.4byte	.LASF359
+	.4byte	.LASF361
 	.byte	0x1d
 	.2byte	0x3bb
 	.4byte	0x109
 	.uleb128 0xd
-	.4byte	.LASF360
+	.4byte	.LASF362
 	.byte	0x1d
 	.2byte	0x3bc
 	.4byte	0x109
 	.uleb128 0xb
 	.4byte	0xa8
-	.4byte	0x1350
+	.4byte	0x1364
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x1f
 	.byte	0
 	.uleb128 0x2a
-	.4byte	.LASF415
-	.byte	0x4
+	.4byte	.LASF379
+	.byte	0x1
 	.byte	0xa
-	.4byte	0x1340
+	.4byte	0x1354
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_isi_pattern
@@ -4782,125 +4194,125 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xe
 	.4byte	.LASF27
 	.byte	0x78
-	.byte	0xc
+	.byte	0xb
 	.byte	0xee
-	.4byte	0x1443
+	.4byte	0x1457
 	.uleb128 0xf
 	.4byte	.LASF28
-	.byte	0xc
+	.byte	0xb
 	.byte	0xef
 	.4byte	0xf3
 	.byte	0
 	.uleb128 0x10
 	.string	"id"
-	.byte	0xc
+	.byte	0xb
 	.byte	0xf0
-	.4byte	0xa60
+	.4byte	0xa61
 	.byte	0x8
 	.uleb128 0xf
-	.4byte	.LASF361
-	.byte	0xc
+	.4byte	.LASF363
+	.byte	0xb
 	.byte	0xf1
-	.4byte	0x1578
+	.4byte	0x158a
 	.byte	0x10
 	.uleb128 0xf
-	.4byte	.LASF362
-	.byte	0xc
+	.4byte	.LASF364
+	.byte	0xb
 	.byte	0xf2
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x18
 	.uleb128 0xf
-	.4byte	.LASF363
-	.byte	0xc
+	.4byte	.LASF365
+	.byte	0xb
 	.byte	0xf3
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x20
 	.uleb128 0xf
-	.4byte	.LASF364
-	.byte	0xc
+	.4byte	.LASF366
+	.byte	0xb
 	.byte	0xf4
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x28
 	.uleb128 0xf
-	.4byte	.LASF365
-	.byte	0xc
+	.4byte	.LASF367
+	.byte	0xb
 	.byte	0xf5
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x30
 	.uleb128 0xf
-	.4byte	.LASF366
-	.byte	0xc
+	.4byte	.LASF368
+	.byte	0xb
 	.byte	0xf6
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x38
 	.uleb128 0xf
-	.4byte	.LASF367
-	.byte	0xc
+	.4byte	.LASF369
+	.byte	0xb
 	.byte	0xf7
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x40
 	.uleb128 0xf
-	.4byte	.LASF368
-	.byte	0xc
+	.4byte	.LASF370
+	.byte	0xb
 	.byte	0xf8
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x48
 	.uleb128 0xf
-	.4byte	.LASF369
-	.byte	0xc
+	.4byte	.LASF371
+	.byte	0xb
 	.byte	0xf9
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x50
 	.uleb128 0xf
-	.4byte	.LASF370
-	.byte	0xc
+	.4byte	.LASF372
+	.byte	0xb
 	.byte	0xfa
 	.4byte	0x59
 	.byte	0x58
 	.uleb128 0xf
-	.4byte	.LASF371
-	.byte	0xc
+	.4byte	.LASF373
+	.byte	0xb
 	.byte	0xfb
 	.4byte	0x59
 	.byte	0x5c
 	.uleb128 0xf
-	.4byte	.LASF372
-	.byte	0xc
+	.4byte	.LASF374
+	.byte	0xb
 	.byte	0xfc
 	.4byte	0x59
 	.byte	0x60
 	.uleb128 0xf
-	.4byte	.LASF373
-	.byte	0xc
+	.4byte	.LASF375
+	.byte	0xb
 	.byte	0xfd
 	.4byte	0x59
 	.byte	0x64
 	.uleb128 0x10
 	.string	"ops"
-	.byte	0xc
+	.byte	0xb
 	.byte	0xfe
 	.4byte	0x263
 	.byte	0x68
 	.uleb128 0xf
 	.4byte	.LASF42
-	.byte	0xc
+	.byte	0xb
 	.byte	0xff
 	.4byte	0x11f
 	.byte	0x70
 	.byte	0
 	.uleb128 0x8
-	.4byte	0x136b
+	.4byte	0x137f
 	.uleb128 0x2
-	.4byte	.LASF304
+	.4byte	.LASF306
 	.byte	0x1b
 	.byte	0xf
 	.4byte	0xa8
 	.uleb128 0xe
-	.4byte	.LASF374
+	.4byte	.LASF376
 	.byte	0x20
 	.byte	0x1b
 	.byte	0x19
-	.4byte	0x1490
+	.4byte	0x14a4
 	.uleb128 0xf
 	.4byte	.LASF28
 	.byte	0x1b
@@ -4908,13 +4320,13 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0xf3
 	.byte	0
 	.uleb128 0xf
-	.4byte	.LASF375
+	.4byte	.LASF377
 	.byte	0x1b
 	.byte	0x1b
 	.4byte	0x59
 	.byte	0x8
 	.uleb128 0xf
-	.4byte	.LASF376
+	.4byte	.LASF378
 	.byte	0x1b
 	.byte	0x1c
 	.4byte	0x135
@@ -4923,53 +4335,51 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF47
 	.byte	0x1b
 	.byte	0x1d
-	.4byte	0x1490
+	.4byte	0x14a4
 	.byte	0x18
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x1453
+	.4byte	0x1467
 	.uleb128 0x2b
 	.string	"gd"
 	.byte	0x1b
 	.byte	0x57
-	.4byte	0x14a2
-	.uleb128 0x1
-	.byte	0x62
+	.4byte	0x14b4
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0xfcc
+	.4byte	0xfe0
 	.uleb128 0x2c
-	.4byte	.LASF490
+	.4byte	.LASF482
 	.byte	0x8
 	.byte	0x1e
 	.byte	0x33
-	.4byte	0x14ca
+	.4byte	0x14dc
 	.uleb128 0x2d
 	.string	"np"
 	.byte	0x1e
 	.byte	0x34
-	.4byte	0x14ca
+	.4byte	0x14dc
 	.uleb128 0x2e
-	.4byte	.LASF377
+	.4byte	.LASF380
 	.byte	0x1e
 	.byte	0x35
 	.4byte	0xec
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0xf9b
+	.4byte	0xfaf
 	.uleb128 0x2
-	.4byte	.LASF378
+	.4byte	.LASF381
 	.byte	0x1e
 	.byte	0x36
-	.4byte	0x14a8
+	.4byte	0x14ba
 	.uleb128 0xe
-	.4byte	.LASF379
+	.4byte	.LASF382
 	.byte	0x4
 	.byte	0x1f
 	.byte	0xc
-	.4byte	0x14f4
+	.4byte	0x1506
 	.uleb128 0x10
 	.string	"pid"
 	.byte	0x1f
@@ -4978,22 +4388,22 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.byte	0
 	.uleb128 0x5
-	.4byte	.LASF380
+	.4byte	.LASF383
 	.byte	0x1f
 	.byte	0x10
-	.4byte	0x14ff
+	.4byte	0x1511
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x14db
+	.4byte	0x14ed
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x1443
+	.4byte	0x1457
 	.uleb128 0xe
 	.4byte	.LASF36
 	.byte	0x30
 	.byte	0x20
 	.byte	0x23
-	.4byte	0x1548
+	.4byte	0x155a
 	.uleb128 0xf
 	.4byte	.LASF35
 	.byte	0x20
@@ -5001,13 +4411,13 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0x135
 	.byte	0
 	.uleb128 0xf
-	.4byte	.LASF381
+	.4byte	.LASF384
 	.byte	0x20
 	.byte	0x25
-	.4byte	0x1677
+	.4byte	0x1689
 	.byte	0x8
 	.uleb128 0xf
-	.4byte	.LASF382
+	.4byte	.LASF385
 	.byte	0x20
 	.byte	0x26
 	.4byte	0x290
@@ -5021,46 +4431,46 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x150b
+	.4byte	0x151d
 	.uleb128 0xe
-	.4byte	.LASF383
+	.4byte	.LASF386
 	.byte	0x10
-	.byte	0xc
+	.byte	0xb
 	.byte	0xb5
-	.4byte	0x1573
+	.4byte	0x1585
 	.uleb128 0xf
-	.4byte	.LASF384
-	.byte	0xc
+	.4byte	.LASF387
+	.byte	0xb
 	.byte	0xb6
 	.4byte	0xd5
 	.byte	0
 	.uleb128 0xf
-	.4byte	.LASF385
-	.byte	0xc
+	.4byte	.LASF388
+	.byte	0xb
 	.byte	0xb7
 	.4byte	0x109
 	.byte	0x8
 	.byte	0
 	.uleb128 0x8
-	.4byte	0x154e
+	.4byte	0x1560
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x1573
+	.4byte	0x1585
 	.uleb128 0x13
 	.4byte	0x59
-	.4byte	0x158d
+	.4byte	0x159f
 	.uleb128 0x14
 	.4byte	0x25d
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x157e
+	.4byte	0x1590
 	.uleb128 0xe
-	.4byte	.LASF386
+	.4byte	.LASF389
 	.byte	0x80
 	.byte	0x20
 	.byte	0x54
-	.4byte	0x1677
+	.4byte	0x1689
 	.uleb128 0xf
 	.4byte	.LASF28
 	.byte	0x20
@@ -5071,88 +4481,88 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.string	"id"
 	.byte	0x20
 	.byte	0x56
-	.4byte	0xa60
+	.4byte	0xa61
 	.byte	0x8
 	.uleb128 0xf
-	.4byte	.LASF387
+	.4byte	.LASF390
 	.byte	0x20
 	.byte	0x57
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x10
 	.uleb128 0xf
-	.4byte	.LASF388
+	.4byte	.LASF391
 	.byte	0x20
 	.byte	0x58
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x18
 	.uleb128 0xf
-	.4byte	.LASF389
+	.4byte	.LASF392
 	.byte	0x20
 	.byte	0x59
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x20
 	.uleb128 0xf
-	.4byte	.LASF390
+	.4byte	.LASF393
 	.byte	0x20
 	.byte	0x5a
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x28
 	.uleb128 0xf
-	.4byte	.LASF391
+	.4byte	.LASF394
 	.byte	0x20
 	.byte	0x5b
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x30
 	.uleb128 0xf
-	.4byte	.LASF367
+	.4byte	.LASF369
 	.byte	0x20
 	.byte	0x5c
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x38
 	.uleb128 0xf
-	.4byte	.LASF368
+	.4byte	.LASF370
 	.byte	0x20
 	.byte	0x5d
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x40
 	.uleb128 0xf
-	.4byte	.LASF321
+	.4byte	.LASF323
 	.byte	0x20
 	.byte	0x5e
-	.4byte	0x168c
+	.4byte	0x169e
 	.byte	0x48
 	.uleb128 0xf
-	.4byte	.LASF392
+	.4byte	.LASF395
 	.byte	0x20
 	.byte	0x5f
-	.4byte	0x168c
+	.4byte	0x169e
 	.byte	0x50
 	.uleb128 0xf
-	.4byte	.LASF370
+	.4byte	.LASF372
 	.byte	0x20
 	.byte	0x60
 	.4byte	0x59
 	.byte	0x58
 	.uleb128 0xf
-	.4byte	.LASF393
+	.4byte	.LASF396
 	.byte	0x20
 	.byte	0x61
 	.4byte	0x59
 	.byte	0x5c
 	.uleb128 0xf
-	.4byte	.LASF394
+	.4byte	.LASF397
 	.byte	0x20
 	.byte	0x62
 	.4byte	0x59
 	.byte	0x60
 	.uleb128 0xf
-	.4byte	.LASF372
+	.4byte	.LASF374
 	.byte	0x20
 	.byte	0x63
 	.4byte	0x59
 	.byte	0x64
 	.uleb128 0xf
-	.4byte	.LASF373
+	.4byte	.LASF375
 	.byte	0x20
 	.byte	0x64
 	.4byte	0x59
@@ -5172,27 +4582,27 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x1593
+	.4byte	0x15a5
 	.uleb128 0x13
 	.4byte	0x59
-	.4byte	0x168c
+	.4byte	0x169e
 	.uleb128 0x14
-	.4byte	0x1548
+	.4byte	0x155a
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x167d
+	.4byte	0x168f
 	.uleb128 0x5
-	.4byte	.LASF395
+	.4byte	.LASF398
 	.byte	0x21
 	.byte	0xb
 	.4byte	0x149
 	.uleb128 0xe
-	.4byte	.LASF396
+	.4byte	.LASF399
 	.byte	0x70
 	.byte	0x22
 	.byte	0x16
-	.4byte	0x172e
+	.4byte	0x1740
 	.uleb128 0xf
 	.4byte	.LASF42
 	.byte	0x22
@@ -5209,43 +4619,43 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF28
 	.byte	0x22
 	.byte	0x19
-	.4byte	0xfb1
+	.4byte	0xfc5
 	.byte	0x8
 	.uleb128 0xf
 	.4byte	.LASF54
 	.byte	0x22
 	.byte	0x1d
-	.4byte	0x1743
+	.4byte	0x1755
 	.byte	0x28
 	.uleb128 0xf
-	.4byte	.LASF397
+	.4byte	.LASF400
 	.byte	0x22
 	.byte	0x1e
-	.4byte	0x1743
+	.4byte	0x1755
 	.byte	0x30
 	.uleb128 0xf
-	.4byte	.LASF398
+	.4byte	.LASF401
 	.byte	0x22
 	.byte	0x23
-	.4byte	0x1759
+	.4byte	0x176b
 	.byte	0x38
 	.uleb128 0xf
-	.4byte	.LASF399
+	.4byte	.LASF402
 	.byte	0x22
 	.byte	0x25
-	.4byte	0x176f
+	.4byte	0x1781
 	.byte	0x40
 	.uleb128 0xf
-	.4byte	.LASF400
+	.4byte	.LASF403
 	.byte	0x22
 	.byte	0x2a
-	.4byte	0x1743
+	.4byte	0x1755
 	.byte	0x48
 	.uleb128 0xf
-	.4byte	.LASF401
+	.4byte	.LASF404
 	.byte	0x22
 	.byte	0x2b
-	.4byte	0x1743
+	.4byte	0x1755
 	.byte	0x50
 	.uleb128 0xf
 	.4byte	.LASF35
@@ -5254,7 +4664,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0x135
 	.byte	0x58
 	.uleb128 0xf
-	.4byte	.LASF402
+	.4byte	.LASF405
 	.byte	0x22
 	.byte	0x30
 	.4byte	0x290
@@ -5262,1038 +4672,844 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0x13
 	.4byte	0x59
-	.4byte	0x173d
+	.4byte	0x174f
 	.uleb128 0x14
-	.4byte	0x173d
+	.4byte	0x174f
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x169d
+	.4byte	0x16af
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x172e
+	.4byte	0x1740
 	.uleb128 0x28
-	.4byte	0x1759
+	.4byte	0x176b
 	.uleb128 0x14
-	.4byte	0x173d
+	.4byte	0x174f
 	.uleb128 0x14
 	.4byte	0xe7
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x1749
+	.4byte	0x175b
 	.uleb128 0x28
-	.4byte	0x176f
+	.4byte	0x1781
 	.uleb128 0x14
-	.4byte	0x173d
+	.4byte	0x174f
 	.uleb128 0x14
 	.4byte	0xd5
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x175f
+	.4byte	0x1771
 	.uleb128 0xb
-	.4byte	0x173d
-	.4byte	0x1780
+	.4byte	0x174f
+	.4byte	0x1792
 	.uleb128 0xc
 	.byte	0
 	.uleb128 0x5
-	.4byte	.LASF403
+	.4byte	.LASF406
 	.byte	0x22
 	.byte	0x48
-	.4byte	0x1775
+	.4byte	0x1787
 	.uleb128 0xb
 	.4byte	0xf3
-	.4byte	0x179b
+	.4byte	0x17ad
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x2
 	.byte	0
 	.uleb128 0x5
-	.4byte	.LASF404
+	.4byte	.LASF407
 	.byte	0x22
 	.byte	0x49
-	.4byte	0x178b
+	.4byte	0x179d
 	.uleb128 0xb
-	.4byte	0x17b6
-	.4byte	0x17b6
+	.4byte	0x17c8
+	.4byte	0x17c8
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x2
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x173d
+	.4byte	0x174f
 	.uleb128 0x5
-	.4byte	.LASF405
+	.4byte	.LASF408
 	.byte	0x23
 	.byte	0x15
-	.4byte	0x17a6
+	.4byte	0x17b8
 	.uleb128 0xb
 	.4byte	0x59
-	.4byte	0x17d7
+	.4byte	0x17e9
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x2
 	.byte	0
 	.uleb128 0x5
-	.4byte	.LASF406
+	.4byte	.LASF409
 	.byte	0x23
 	.byte	0x1a
-	.4byte	0x17c7
+	.4byte	0x17d9
 	.uleb128 0x25
 	.byte	0x4
 	.4byte	0x84
-	.byte	0x1
-	.byte	0x14
-	.4byte	0x181f
+	.byte	0x2
+	.byte	0x13
+	.4byte	0x1831
 	.uleb128 0x1c
-	.4byte	.LASF407
+	.4byte	.LASF410
 	.byte	0
 	.uleb128 0x1c
-	.4byte	.LASF408
+	.4byte	.LASF411
 	.byte	0x1
 	.uleb128 0x1c
-	.4byte	.LASF409
+	.4byte	.LASF412
 	.byte	0x2
 	.uleb128 0x1c
-	.4byte	.LASF410
+	.4byte	.LASF413
 	.byte	0x3
 	.uleb128 0x1c
-	.4byte	.LASF411
+	.4byte	.LASF414
 	.byte	0x4
 	.uleb128 0x1c
-	.4byte	.LASF412
+	.4byte	.LASF415
 	.byte	0x5
 	.uleb128 0x1c
-	.4byte	.LASF413
+	.4byte	.LASF416
 	.byte	0x6
 	.uleb128 0x1c
-	.4byte	.LASF414
+	.4byte	.LASF417
 	.byte	0x7
 	.byte	0
 	.uleb128 0xb
 	.4byte	0xdb
-	.4byte	0x182f
+	.4byte	0x1841
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x6
 	.byte	0
 	.uleb128 0x8
-	.4byte	0x181f
+	.4byte	0x1831
 	.uleb128 0x2a
-	.4byte	.LASF416
-	.byte	0x1
-	.byte	0x1f
-	.4byte	0x182f
+	.4byte	.LASF418
+	.byte	0x2
+	.byte	0x1e
+	.4byte	0x1841
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	test_pattern
 	.uleb128 0xb
 	.4byte	0xa3
-	.4byte	0x1859
+	.4byte	0x186b
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x6
 	.byte	0
 	.uleb128 0x8
-	.4byte	0x1849
+	.4byte	0x185b
 	.uleb128 0x2a
-	.4byte	.LASF417
-	.byte	0x1
-	.byte	0x29
-	.4byte	0x1859
+	.4byte	.LASF419
+	.byte	0x2
+	.byte	0x28
+	.4byte	0x186b
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	test_pat_param
 	.uleb128 0x2f
-	.4byte	.LASF418
-	.byte	0x1
-	.2byte	0x185
+	.4byte	.LASF420
+	.byte	0x2
+	.2byte	0x136
 	.4byte	0x67c
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	_u_boot_list_2_cmd_2_ddr_test
 	.uleb128 0x30
-	.4byte	.LASF426
-	.byte	0x3
-	.byte	0x50
-	.8byte	.LFB278
-	.8byte	.LFE278-.LFB278
+	.4byte	.LASF429
+	.byte	0x4
+	.byte	0x60
+	.4byte	0x59
+	.8byte	.LFB271
+	.8byte	.LFE271-.LFB271
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1904
+	.4byte	0x1b4f
 	.uleb128 0x31
-	.4byte	.LASF267
-	.byte	0x3
-	.byte	0x50
-	.4byte	0x135
-	.4byte	.LLST76
+	.4byte	.LASF421
+	.byte	0x4
+	.byte	0x60
+	.4byte	0x109
+	.4byte	.LLST15
 	.uleb128 0x31
-	.4byte	.LASF51
-	.byte	0x3
-	.byte	0x50
+	.4byte	.LASF422
+	.byte	0x4
+	.byte	0x60
 	.4byte	0x109
-	.4byte	.LLST77
-	.uleb128 0x32
-	.string	"p"
-	.byte	0x3
-	.byte	0x52
-	.4byte	0x1365
-	.4byte	.LLST78
+	.4byte	.LLST16
 	.uleb128 0x32
-	.string	"i"
-	.byte	0x3
-	.byte	0x53
-	.4byte	0xa8
-	.4byte	.LLST79
-	.uleb128 0x33
-	.8byte	.LVL310
-	.4byte	0x2b65
-	.uleb128 0x34
+	.string	"ret"
+	.byte	0x4
+	.byte	0x62
+	.4byte	0x59
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
+	.uleb128 0x33
+	.4byte	0x1bc3
+	.8byte	.LBB6
+	.4byte	.Ldebug_ranges0+0
+	.byte	0x4
+	.byte	0x64
+	.4byte	0x1a2b
 	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0xd
-	.byte	0x83
-	.sleb128 -4
-	.byte	0xc
-	.4byte	0xffffffff
-	.byte	0x1a
-	.byte	0x32
-	.byte	0x24
-	.byte	0x84
-	.sleb128 0
-	.byte	0x22
-	.byte	0
-	.byte	0
+	.4byte	0x1bde
+	.4byte	.LLST17
+	.uleb128 0x34
+	.4byte	0x1bd3
+	.4byte	.LLST18
 	.uleb128 0x35
-	.4byte	.LASF428
-	.byte	0x3
-	.byte	0x2e
-	.4byte	0x109
-	.8byte	.LFB277
-	.8byte	.LFE277-.LFB277
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x1a04
+	.4byte	.Ldebug_ranges0+0
 	.uleb128 0x36
-	.string	"buf"
-	.byte	0x3
-	.byte	0x2e
-	.4byte	0x1365
-	.4byte	.LLST29
-	.uleb128 0x31
-	.4byte	.LASF419
-	.byte	0x3
-	.byte	0x2e
-	.4byte	0xa8
-	.4byte	.LLST30
-	.uleb128 0x31
-	.4byte	.LASF420
-	.byte	0x3
-	.byte	0x2e
-	.4byte	0x109
-	.4byte	.LLST31
-	.uleb128 0x31
-	.4byte	.LASF375
-	.byte	0x3
-	.byte	0x2e
-	.4byte	0x109
-	.4byte	.LLST32
-	.uleb128 0x31
-	.4byte	.LASF421
-	.byte	0x3
-	.byte	0x2f
-	.4byte	0xa8
-	.4byte	.LLST33
-	.uleb128 0x37
-	.4byte	.LASF422
-	.byte	0x3
-	.byte	0x31
-	.4byte	0x1a04
-	.4byte	.LLST34
-	.uleb128 0x32
-	.string	"p"
-	.byte	0x3
-	.byte	0x32
-	.4byte	0x1a0a
-	.4byte	.LLST35
-	.uleb128 0x32
-	.string	"i"
-	.byte	0x3
-	.byte	0x33
-	.4byte	0xa8
-	.4byte	.LLST36
-	.uleb128 0x32
-	.string	"j"
-	.byte	0x3
-	.byte	0x33
-	.4byte	0xa8
-	.4byte	.LLST37
-	.uleb128 0x32
-	.string	"val"
-	.byte	0x3
-	.byte	0x34
-	.4byte	0x109
-	.4byte	.LLST38
-	.uleb128 0x37
-	.4byte	.LASF423
-	.byte	0x3
-	.byte	0x34
-	.4byte	0x109
-	.4byte	.LLST39
-	.uleb128 0x37
-	.4byte	.LASF424
-	.byte	0x3
-	.byte	0x34
-	.4byte	0x109
-	.4byte	.LLST40
+	.4byte	0x1be9
+	.4byte	.LLST19
+	.uleb128 0x36
+	.4byte	0x1bf2
+	.4byte	.LLST20
+	.uleb128 0x36
+	.4byte	0x1bfb
+	.4byte	.LLST21
+	.uleb128 0x36
+	.4byte	0x1c06
+	.4byte	.LLST22
 	.uleb128 0x37
-	.4byte	.LASF425
-	.byte	0x3
-	.byte	0x34
-	.4byte	0x109
-	.4byte	.LLST41
-	.uleb128 0x33
-	.8byte	.LVL115
-	.4byte	0x2b65
-	.uleb128 0x34
+	.4byte	0x1c11
+	.uleb128 0x36
+	.4byte	0x1c1c
+	.4byte	.LLST23
+	.uleb128 0x36
+	.4byte	0x1c27
+	.4byte	.LLST24
+	.uleb128 0x36
+	.4byte	0x1c32
+	.4byte	.LLST25
+	.uleb128 0x38
+	.8byte	.LVL64
+	.4byte	0x26e7
+	.4byte	0x1981
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC16
-	.uleb128 0x34
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
+	.uleb128 0x6
+	.byte	0x11
+	.sleb128 -2139062144
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x52
 	.uleb128 0x2
-	.byte	0x83
+	.byte	0x84
 	.sleb128 0
 	.byte	0
+	.uleb128 0x38
+	.8byte	.LVL66
+	.4byte	0x26f3
+	.4byte	0x199f
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
 	.byte	0
-	.uleb128 0x9
-	.byte	0x8
-	.4byte	0x109
-	.uleb128 0x9
-	.byte	0x8
-	.4byte	0x42
-	.uleb128 0x30
-	.4byte	.LASF427
-	.byte	0x3
-	.byte	0x1c
-	.8byte	.LFB276
-	.8byte	.LFE276-.LFB276
+	.uleb128 0x38
+	.8byte	.LVL72
+	.4byte	0x26f3
+	.4byte	0x19b9
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x1a98
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x8f
+	.sleb128 192
+	.byte	0x6
+	.byte	0
 	.uleb128 0x38
-	.string	"buf"
-	.byte	0x3
-	.byte	0x1c
-	.4byte	0x1365
+	.8byte	.LVL76
+	.4byte	0x26fe
+	.4byte	0x19d7
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x31
-	.4byte	.LASF419
-	.byte	0x3
-	.byte	0x1c
-	.4byte	0xa8
-	.4byte	.LLST25
+	.uleb128 0x2
+	.byte	0x8c
+	.sleb128 0
 	.uleb128 0x39
-	.4byte	.LASF420
-	.byte	0x3
-	.byte	0x1c
-	.4byte	0x109
 	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x31
-	.4byte	.LASF375
-	.byte	0x3
-	.byte	0x1c
-	.4byte	0x109
-	.4byte	.LLST26
-	.uleb128 0x2a
-	.4byte	.LASF422
-	.byte	0x3
-	.byte	0x1e
-	.4byte	0x1a04
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8c
+	.sleb128 4
+	.byte	0
+	.uleb128 0x38
+	.8byte	.LVL78
+	.4byte	0x26f3
+	.4byte	0x19f6
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC10
+	.byte	0
 	.uleb128 0x3a
-	.string	"p"
+	.8byte	.LVL79
+	.4byte	0x26f3
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
 	.byte	0x3
-	.byte	0x1f
-	.4byte	0x1a04
+	.8byte	.LC11
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8c
+	.sleb128 0
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
-	.uleb128 0x32
-	.string	"i"
-	.byte	0x3
-	.byte	0x20
-	.4byte	0xa8
-	.4byte	.LLST27
-	.uleb128 0x32
-	.string	"j"
-	.byte	0x3
-	.byte	0x20
-	.4byte	0xa8
-	.4byte	.LLST28
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.byte	0
+	.byte	0
 	.byte	0
 	.uleb128 0x3b
-	.4byte	.LASF491
-	.byte	0x3
-	.byte	0xa
-	.byte	0x1
-	.4byte	0x1aae
+	.4byte	0x1b4f
+	.8byte	.LBB15
+	.4byte	.Ldebug_ranges0+0x60
+	.byte	0x4
+	.byte	0x66
 	.uleb128 0x3c
-	.string	"p"
-	.byte	0x3
-	.byte	0xa
-	.4byte	0x1365
-	.byte	0
+	.4byte	0x1b6a
+	.uleb128 0x3c
+	.4byte	0x1b5f
 	.uleb128 0x35
-	.4byte	.LASF429
-	.byte	0x2
-	.byte	0x57
-	.4byte	0x59
-	.8byte	.LFB274
-	.8byte	.LFE274-.LFB274
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x1d27
-	.uleb128 0x31
-	.4byte	.LASF430
-	.byte	0x2
-	.byte	0x57
-	.4byte	0x109
-	.4byte	.LLST3
-	.uleb128 0x31
-	.4byte	.LASF431
-	.byte	0x2
-	.byte	0x57
-	.4byte	0x109
-	.4byte	.LLST4
-	.uleb128 0x3a
-	.string	"ret"
-	.byte	0x2
-	.byte	0x59
-	.4byte	0x59
-	.uleb128 0x1
-	.byte	0x50
+	.4byte	.Ldebug_ranges0+0x60
+	.uleb128 0x36
+	.4byte	0x1b75
+	.4byte	.LLST26
+	.uleb128 0x36
+	.4byte	0x1b7e
+	.4byte	.LLST27
 	.uleb128 0x3d
-	.4byte	0x1d95
-	.8byte	.LBB12
-	.4byte	.Ldebug_ranges0+0
-	.byte	0x2
-	.byte	0x5b
-	.4byte	0x1c21
-	.uleb128 0x3e
-	.4byte	0x1db0
-	.4byte	.LLST5
-	.uleb128 0x3e
-	.4byte	0x1da5
-	.4byte	.LLST6
-	.uleb128 0x3f
-	.4byte	.Ldebug_ranges0+0
-	.uleb128 0x40
-	.4byte	0x1dbb
-	.4byte	.LLST7
-	.uleb128 0x40
-	.4byte	0x1dc4
-	.4byte	.LLST8
-	.uleb128 0x40
-	.4byte	0x1dcd
-	.4byte	.LLST9
-	.uleb128 0x40
-	.4byte	0x1dd8
-	.4byte	.LLST10
-	.uleb128 0x41
-	.4byte	0x1de3
-	.uleb128 0x40
-	.4byte	0x1dee
-	.4byte	.LLST11
-	.uleb128 0x40
-	.4byte	0x1df9
-	.4byte	.LLST12
-	.uleb128 0x40
-	.4byte	0x1e04
-	.4byte	.LLST13
-	.uleb128 0x42
-	.8byte	.LVL26
-	.4byte	0x2b70
-	.4byte	0x1b94
-	.uleb128 0x34
+	.4byte	0x1b87
 	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x86
-	.sleb128 0
-	.uleb128 0x34
+	.byte	0x66
+	.uleb128 0x3d
+	.4byte	0x1b92
 	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x6
-	.byte	0x11
-	.sleb128 -2139062144
-	.uleb128 0x34
+	.byte	0x69
+	.uleb128 0x3d
+	.4byte	0x1b9d
 	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x87
-	.sleb128 0
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL28
-	.4byte	0x2b65
-	.4byte	0x1bb2
-	.uleb128 0x34
+	.byte	0x6b
+	.uleb128 0x37
+	.4byte	0x1ba8
+	.uleb128 0x36
+	.4byte	0x1bb1
+	.4byte	.LLST28
+	.uleb128 0x38
+	.8byte	.LVL85
+	.4byte	0x26f3
+	.4byte	0x1aa0
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x88
+	.byte	0x8a
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x8c
-	.sleb128 0
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL32
-	.4byte	0x2b65
-	.4byte	0x1bca
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
 	.byte	0x85
 	.sleb128 0
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL38
-	.4byte	0x2b65
-	.4byte	0x1be9
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC7
-	.byte	0
-	.uleb128 0x33
-	.8byte	.LVL39
-	.4byte	0x2b65
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL87
+	.4byte	0x26e7
+	.4byte	0x1ac4
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC8
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
 	.uleb128 0x2
 	.byte	0x83
 	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x5
-	.byte	0x8f
-	.sleb128 204
-	.byte	0x94
-	.byte	0x4
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x53
+	.byte	0x51
 	.uleb128 0x2
-	.byte	0x8b
+	.byte	0x86
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x54
+	.byte	0x52
 	.uleb128 0x2
 	.byte	0x84
 	.sleb128 0
 	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x43
-	.4byte	0x1d27
-	.8byte	.LBB21
-	.4byte	.Ldebug_ranges0+0x60
-	.byte	0x2
-	.byte	0x5d
-	.uleb128 0x44
-	.4byte	0x1d42
-	.uleb128 0x44
-	.4byte	0x1d37
-	.uleb128 0x3f
-	.4byte	.Ldebug_ranges0+0x60
-	.uleb128 0x40
-	.4byte	0x1d4d
-	.4byte	.LLST14
-	.uleb128 0x40
-	.4byte	0x1d56
-	.4byte	.LLST15
-	.uleb128 0x45
-	.4byte	0x1d5f
-	.uleb128 0x1
-	.byte	0x64
-	.uleb128 0x45
-	.4byte	0x1d6a
-	.uleb128 0x1
-	.byte	0x6a
-	.uleb128 0x45
-	.4byte	0x1d75
-	.uleb128 0x1
-	.byte	0x6b
-	.uleb128 0x41
-	.4byte	0x1d80
-	.uleb128 0x40
-	.4byte	0x1d89
-	.4byte	.LLST16
-	.uleb128 0x42
-	.8byte	.LVL48
-	.4byte	0x2b65
-	.4byte	0x1c96
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL91
+	.4byte	0x26f3
+	.4byte	0x1adc
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x89
-	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x83
+	.byte	0x88
 	.sleb128 0
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL50
-	.4byte	0x2b70
-	.4byte	0x1cba
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL96
+	.4byte	0x26fe
+	.4byte	0x1afa
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x86
+	.byte	0x87
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
 	.byte	0x87
-	.sleb128 0
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL55
-	.4byte	0x2b65
-	.4byte	0x1cd2
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
+	.sleb128 4
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL61
-	.4byte	0x2b65
-	.4byte	0x1cf1
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL99
+	.4byte	0x26f3
+	.4byte	0x1b19
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC11
+	.8byte	.LC14
 	.byte	0
-	.uleb128 0x33
-	.8byte	.LVL62
-	.4byte	0x2b65
-	.uleb128 0x34
+	.uleb128 0x3a
+	.8byte	.LVL100
+	.4byte	0x26f3
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC12
-	.uleb128 0x34
+	.8byte	.LC15
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x85
+	.byte	0x87
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
-	.byte	0x8a
+	.byte	0x89
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
 	.byte	0x8b
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x54
 	.uleb128 0x2
-	.byte	0x84
+	.byte	0x86
 	.sleb128 0
 	.byte	0
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF435
-	.byte	0x2
-	.byte	0x30
+	.uleb128 0x3e
+	.4byte	.LASF426
+	.byte	0x4
+	.byte	0x36
 	.4byte	0x59
 	.byte	0x1
-	.4byte	0x1d95
-	.uleb128 0x47
-	.4byte	.LASF430
-	.byte	0x2
-	.byte	0x30
+	.4byte	0x1bbd
+	.uleb128 0x3f
+	.4byte	.LASF421
+	.byte	0x4
+	.byte	0x36
 	.4byte	0x109
-	.uleb128 0x47
-	.4byte	.LASF431
-	.byte	0x2
-	.byte	0x30
+	.uleb128 0x3f
+	.4byte	.LASF422
+	.byte	0x4
+	.byte	0x36
 	.4byte	0x109
-	.uleb128 0x48
+	.uleb128 0x40
 	.string	"i"
-	.byte	0x2
-	.byte	0x32
+	.byte	0x4
+	.byte	0x38
 	.4byte	0x109
-	.uleb128 0x48
+	.uleb128 0x40
 	.string	"j"
-	.byte	0x2
-	.byte	0x32
+	.byte	0x4
+	.byte	0x38
 	.4byte	0x109
-	.uleb128 0x49
-	.4byte	.LASF432
-	.byte	0x2
-	.byte	0x33
+	.uleb128 0x41
+	.4byte	.LASF423
+	.byte	0x4
+	.byte	0x39
 	.4byte	0x109
-	.uleb128 0x49
-	.4byte	.LASF376
-	.byte	0x2
-	.byte	0x33
+	.uleb128 0x41
+	.4byte	.LASF378
+	.byte	0x4
+	.byte	0x39
 	.4byte	0x109
-	.uleb128 0x49
-	.4byte	.LASF433
-	.byte	0x2
-	.byte	0x34
+	.uleb128 0x41
+	.4byte	.LASF424
+	.byte	0x4
+	.byte	0x3a
 	.4byte	0x109
-	.uleb128 0x48
+	.uleb128 0x40
 	.string	"p"
-	.byte	0x2
-	.byte	0x35
-	.4byte	0x1a0a
-	.uleb128 0x49
-	.4byte	.LASF434
-	.byte	0x2
-	.byte	0x36
+	.byte	0x4
+	.byte	0x3b
+	.4byte	0x1bbd
+	.uleb128 0x41
+	.4byte	.LASF425
+	.byte	0x4
+	.byte	0x3c
 	.4byte	0x109
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF436
-	.byte	0x2
-	.byte	0xa
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x42
+	.uleb128 0x3e
+	.4byte	.LASF427
+	.byte	0x4
+	.byte	0xb
 	.4byte	0x59
 	.byte	0x1
-	.4byte	0x1e10
-	.uleb128 0x47
-	.4byte	.LASF430
-	.byte	0x2
-	.byte	0xa
+	.4byte	0x1c3e
+	.uleb128 0x3f
+	.4byte	.LASF421
+	.byte	0x4
+	.byte	0xb
 	.4byte	0x109
-	.uleb128 0x47
-	.4byte	.LASF431
-	.byte	0x2
-	.byte	0xa
+	.uleb128 0x3f
+	.4byte	.LASF422
+	.byte	0x4
+	.byte	0xb
 	.4byte	0x109
-	.uleb128 0x48
+	.uleb128 0x40
 	.string	"i"
-	.byte	0x2
-	.byte	0xc
+	.byte	0x4
+	.byte	0xd
 	.4byte	0xa8
-	.uleb128 0x48
+	.uleb128 0x40
 	.string	"j"
-	.byte	0x2
-	.byte	0xc
-	.4byte	0xa8
-	.uleb128 0x49
-	.4byte	.LASF437
-	.byte	0x2
+	.byte	0x4
 	.byte	0xd
 	.4byte	0xa8
-	.uleb128 0x49
-	.4byte	.LASF432
-	.byte	0x2
-	.byte	0xd
+	.uleb128 0x41
+	.4byte	.LASF428
+	.byte	0x4
+	.byte	0xe
 	.4byte	0xa8
-	.uleb128 0x49
-	.4byte	.LASF376
-	.byte	0x2
-	.byte	0xd
+	.uleb128 0x41
+	.4byte	.LASF423
+	.byte	0x4
+	.byte	0xe
 	.4byte	0xa8
-	.uleb128 0x49
-	.4byte	.LASF433
-	.byte	0x2
+	.uleb128 0x41
+	.4byte	.LASF378
+	.byte	0x4
 	.byte	0xe
 	.4byte	0xa8
-	.uleb128 0x48
-	.string	"p32"
-	.byte	0x2
+	.uleb128 0x41
+	.4byte	.LASF424
+	.byte	0x4
 	.byte	0xf
-	.4byte	0x1e10
-	.uleb128 0x49
-	.4byte	.LASF434
-	.byte	0x2
+	.4byte	0xa8
+	.uleb128 0x40
+	.string	"p32"
+	.byte	0x4
 	.byte	0x10
+	.4byte	0x1c3e
+	.uleb128 0x41
+	.4byte	.LASF425
+	.byte	0x4
+	.byte	0x11
 	.4byte	0x109
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
 	.4byte	0xb3
-	.uleb128 0x35
-	.4byte	.LASF438
-	.byte	0x5
-	.byte	0x30
+	.uleb128 0x30
+	.4byte	.LASF430
+	.byte	0x3
+	.byte	0xf
 	.4byte	0x59
-	.8byte	.LFB271
-	.8byte	.LFE271-.LFB271
+	.8byte	.LFB268
+	.8byte	.LFE268-.LFB268
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2042
+	.4byte	0x1e70
 	.uleb128 0x31
-	.4byte	.LASF420
-	.byte	0x5
-	.byte	0x30
+	.4byte	.LASF431
+	.byte	0x3
+	.byte	0xf
 	.4byte	0x109
-	.4byte	.LLST49
+	.4byte	.LLST9
 	.uleb128 0x31
-	.4byte	.LASF375
-	.byte	0x5
-	.byte	0x30
+	.4byte	.LASF377
+	.byte	0x3
+	.byte	0xf
 	.4byte	0x109
-	.4byte	.LLST50
-	.uleb128 0x37
-	.4byte	.LASF267
-	.byte	0x5
-	.byte	0x35
+	.4byte	.LLST10
+	.uleb128 0x42
+	.4byte	.LASF268
+	.byte	0x3
+	.byte	0x11
 	.4byte	0x109
-	.4byte	.LLST51
-	.uleb128 0x37
-	.4byte	.LASF439
-	.byte	0x5
-	.byte	0x35
+	.4byte	.LLST11
+	.uleb128 0x2a
+	.4byte	.LASF432
+	.byte	0x3
+	.byte	0x11
 	.4byte	0x109
-	.4byte	.LLST52
-	.uleb128 0x49
-	.4byte	.LASF440
-	.byte	0x5
-	.byte	0x36
+	.uleb128 0x1
+	.byte	0x64
+	.uleb128 0x42
+	.4byte	.LASF433
+	.byte	0x3
+	.byte	0x12
 	.4byte	0x59
+	.4byte	.LLST12
 	.uleb128 0x2a
-	.4byte	.LASF441
-	.byte	0x5
-	.byte	0x37
-	.4byte	0x2042
+	.4byte	.LASF434
+	.byte	0x3
+	.byte	0x13
+	.4byte	0x1e70
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -32
-	.uleb128 0x32
+	.uleb128 0x43
 	.string	"col"
-	.byte	0x5
-	.byte	0x39
+	.byte	0x3
+	.byte	0x15
 	.4byte	0xa8
-	.4byte	.LLST53
-	.uleb128 0x37
-	.4byte	.LASF442
-	.byte	0x5
-	.byte	0x39
+	.4byte	.LLST13
+	.uleb128 0x2a
+	.4byte	.LASF435
+	.byte	0x3
+	.byte	0x15
 	.4byte	0xa8
-	.4byte	.LLST54
-	.uleb128 0x37
-	.4byte	.LASF425
-	.byte	0x5
-	.byte	0x3a
-	.4byte	0x109
-	.4byte	.LLST55
-	.uleb128 0x4a
-	.4byte	.LASF492
-	.byte	0x5
-	.byte	0x62
-	.8byte	.L91
-	.uleb128 0x3d
-	.4byte	0x2052
-	.8byte	.LBB29
-	.4byte	.Ldebug_ranges0+0x90
-	.byte	0x5
-	.byte	0x3d
-	.4byte	0x1f19
-	.uleb128 0x3f
-	.4byte	.Ldebug_ranges0+0x90
-	.uleb128 0x40
-	.4byte	0x2062
-	.4byte	.LLST56
-	.uleb128 0x41
-	.4byte	0x206d
-	.uleb128 0x41
-	.4byte	0x2078
-	.uleb128 0x41
-	.4byte	0x2082
-	.uleb128 0x4b
-	.8byte	.LBB31
-	.8byte	.LBE31-.LBB31
-	.uleb128 0x40
-	.4byte	0x208e
-	.4byte	.LLST57
-	.byte	0
-	.byte	0
-	.byte	0
+	.uleb128 0x1
+	.byte	0x65
 	.uleb128 0x42
-	.8byte	.LVL156
-	.4byte	0x2b7c
-	.4byte	0x1f45
-	.uleb128 0x34
+	.4byte	.LASF436
+	.byte	0x3
+	.byte	0x16
+	.4byte	0x109
+	.4byte	.LLST14
+	.uleb128 0x44
+	.4byte	.LASF483
+	.byte	0x3
+	.byte	0x3e
+	.8byte	.L31
+	.uleb128 0x38
+	.8byte	.LVL38
+	.4byte	0x270a
+	.4byte	0x1d22
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x3
 	.byte	0x8f
 	.sleb128 144
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	.LANCHOR1
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x20
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL157
-	.4byte	0x2b65
-	.4byte	0x1f64
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL39
+	.4byte	0x26f3
+	.4byte	0x1d41
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC22
+	.8byte	.LC6
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL160
-	.4byte	0x2b85
-	.4byte	0x1f89
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
+	.uleb128 0x45
+	.8byte	.LVL40
+	.4byte	0x2713
+	.uleb128 0x38
+	.8byte	.LVL42
+	.4byte	0x26f3
+	.4byte	0x1d73
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC7
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x51
 	.uleb128 0x2
-	.byte	0x87
+	.byte	0x83
 	.sleb128 0
-	.uleb128 0x34
+	.byte	0
+	.uleb128 0x38
+	.8byte	.LVL49
+	.4byte	0x271e
+	.4byte	0x1d92
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 144
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.byte	0
+	.uleb128 0x38
+	.8byte	.LVL50
+	.4byte	0x2729
+	.4byte	0x1db7
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x3
 	.byte	0x8f
 	.sleb128 144
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x20
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL165
-	.4byte	0x2b85
-	.4byte	0x1fae
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL53
+	.4byte	0x2729
+	.4byte	0x1ddc
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x8a
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x3
 	.byte	0x8f
 	.sleb128 144
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x20
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL166
-	.4byte	0x1904
-	.4byte	0x1fe4
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL54
+	.4byte	0x2735
+	.4byte	0x1e12
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x3
 	.byte	0x8f
 	.sleb128 144
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x20
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x8
 	.byte	0x84
 	.sleb128 0
-	.byte	0x86
+	.byte	0x88
 	.sleb128 0
 	.byte	0x22
-	.byte	0x87
+	.byte	0x89
 	.sleb128 0
 	.byte	0x22
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x20
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x54
 	.uleb128 0x1
 	.byte	0x31
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL171
-	.4byte	0x2b85
-	.4byte	0x2015
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL59
+	.4byte	0x2729
+	.4byte	0x1e43
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0xe
@@ -6305,50 +5521,50 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0x84
 	.sleb128 0
 	.byte	0x22
-	.byte	0x87
+	.byte	0x89
 	.sleb128 0
 	.byte	0x22
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x3
 	.byte	0x8f
 	.sleb128 144
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x20
 	.byte	0
-	.uleb128 0x33
-	.8byte	.LVL172
-	.4byte	0x1904
-	.uleb128 0x34
+	.uleb128 0x3a
+	.8byte	.LVL60
+	.4byte	0x2735
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x3
 	.byte	0x8f
 	.sleb128 144
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x20
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x8a
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x20
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x54
 	.uleb128 0x1
@@ -6357,623 +5573,448 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0xb
 	.4byte	0xa8
-	.4byte	0x2052
+	.4byte	0x1e80
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x7
 	.byte	0
 	.uleb128 0x46
-	.4byte	.LASF443
-	.byte	0x5
-	.byte	0xc
-	.4byte	0x59
-	.byte	0x1
-	.4byte	0x209b
-	.uleb128 0x49
-	.4byte	.LASF444
-	.byte	0x5
-	.byte	0xe
-	.4byte	0xa8
-	.uleb128 0x48
-	.string	"col"
-	.byte	0x5
-	.byte	0xf
-	.4byte	0xa8
-	.uleb128 0x48
-	.string	"bw"
-	.byte	0x5
-	.byte	0xf
-	.4byte	0xa8
-	.uleb128 0x49
-	.4byte	.LASF440
-	.byte	0x5
-	.byte	0x10
-	.4byte	0x59
-	.uleb128 0x4c
-	.uleb128 0x48
-	.string	"__v"
-	.byte	0x5
-	.byte	0x13
-	.4byte	0xa8
-	.byte	0
-	.byte	0
-	.uleb128 0x4d
-	.4byte	.LASF455
-	.byte	0x1
-	.byte	0xbc
+	.4byte	.LASF448
+	.byte	0x2
+	.byte	0x62
 	.4byte	0x59
-	.8byte	.LFB258
-	.8byte	.LFE258-.LFB258
+	.8byte	.LFB256
+	.8byte	.LFE256-.LFB256
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x25c1
+	.4byte	0x2293
 	.uleb128 0x31
-	.4byte	.LASF445
-	.byte	0x1
-	.byte	0xbc
-	.4byte	0x25c1
-	.4byte	.LLST58
+	.4byte	.LASF437
+	.byte	0x2
+	.byte	0x62
+	.4byte	0x2293
+	.4byte	.LLST37
 	.uleb128 0x31
-	.4byte	.LASF446
-	.byte	0x1
-	.byte	0xbc
+	.4byte	.LASF438
+	.byte	0x2
+	.byte	0x62
 	.4byte	0x59
-	.4byte	.LLST59
+	.4byte	.LLST38
 	.uleb128 0x31
-	.4byte	.LASF447
-	.byte	0x1
-	.byte	0xbc
+	.4byte	.LASF439
+	.byte	0x2
+	.byte	0x62
 	.4byte	0x59
-	.4byte	.LLST60
+	.4byte	.LLST39
 	.uleb128 0x31
-	.4byte	.LASF448
-	.byte	0x1
-	.byte	0xbd
+	.4byte	.LASF440
+	.byte	0x2
+	.byte	0x63
 	.4byte	0x641
-	.4byte	.LLST61
-	.uleb128 0x32
+	.4byte	.LLST40
+	.uleb128 0x43
 	.string	"i"
-	.byte	0x1
-	.byte	0xbf
+	.byte	0x2
+	.byte	0x65
 	.4byte	0x59
-	.4byte	.LLST62
-	.uleb128 0x37
-	.4byte	.LASF449
-	.byte	0x1
-	.byte	0xc0
+	.4byte	.LLST41
+	.uleb128 0x42
+	.4byte	.LASF441
+	.byte	0x2
+	.byte	0x66
 	.4byte	0x59
-	.4byte	.LLST63
-	.uleb128 0x37
-	.4byte	.LASF450
-	.byte	0x1
-	.byte	0xc0
+	.4byte	.LLST42
+	.uleb128 0x42
+	.4byte	.LASF442
+	.byte	0x2
+	.byte	0x66
 	.4byte	0x59
-	.4byte	.LLST64
-	.uleb128 0x3a
+	.4byte	.LLST43
+	.uleb128 0x32
 	.string	"arg"
-	.byte	0x1
-	.byte	0xc1
-	.4byte	0x25c7
+	.byte	0x2
+	.byte	0x67
+	.4byte	0x2299
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -40
 	.uleb128 0x2a
-	.4byte	.LASF420
-	.byte	0x1
-	.byte	0xc2
-	.4byte	0x25d7
+	.4byte	.LASF431
+	.byte	0x2
+	.byte	0x68
+	.4byte	0x22a9
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -104
 	.uleb128 0x2a
-	.4byte	.LASF375
-	.byte	0x1
-	.byte	0xc3
-	.4byte	0x25d7
+	.4byte	.LASF377
+	.byte	0x2
+	.byte	0x69
+	.4byte	0x22a9
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -72
-	.uleb128 0x37
-	.4byte	.LASF451
-	.byte	0x1
-	.byte	0xc4
+	.uleb128 0x42
+	.4byte	.LASF443
+	.byte	0x2
+	.byte	0x6a
 	.4byte	0xa8
-	.4byte	.LLST65
-	.uleb128 0x37
-	.4byte	.LASF452
-	.byte	0x1
-	.byte	0xc5
+	.4byte	.LLST44
+	.uleb128 0x42
+	.4byte	.LASF444
+	.byte	0x2
+	.byte	0x6b
 	.4byte	0xa8
-	.4byte	.LLST66
-	.uleb128 0x32
+	.4byte	.LLST45
+	.uleb128 0x42
+	.4byte	.LASF445
+	.byte	0x2
+	.byte	0x6c
+	.4byte	0xa8
+	.4byte	.LLST46
+	.uleb128 0x43
 	.string	"ret"
-	.byte	0x1
-	.byte	0xc6
+	.byte	0x2
+	.byte	0x6d
 	.4byte	0x59
-	.4byte	.LLST67
-	.uleb128 0x37
-	.4byte	.LASF453
-	.byte	0x1
-	.byte	0xc7
+	.4byte	.LLST47
+	.uleb128 0x42
+	.4byte	.LASF446
+	.byte	0x2
+	.byte	0x6e
 	.4byte	0x59
-	.4byte	.LLST68
-	.uleb128 0x37
-	.4byte	.LASF454
-	.byte	0x1
-	.byte	0xc8
+	.4byte	.LLST48
+	.uleb128 0x42
+	.4byte	.LASF447
+	.byte	0x2
+	.byte	0x6f
 	.4byte	0xa8
-	.4byte	.LLST69
-	.uleb128 0x3a
+	.4byte	.LLST49
+	.uleb128 0x32
 	.string	"dev"
-	.byte	0x1
-	.byte	0xec
+	.byte	0x2
+	.byte	0x91
 	.4byte	0x25d
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -112
-	.uleb128 0x3d
-	.4byte	0x28ba
-	.8byte	.LBB40
-	.4byte	.Ldebug_ranges0+0xd0
-	.byte	0x1
-	.byte	0xcb
-	.4byte	0x223d
-	.uleb128 0x3e
-	.4byte	0x28d1
-	.4byte	.LLST70
-	.uleb128 0x3e
-	.4byte	0x28c6
-	.4byte	.LLST71
-	.uleb128 0x3f
-	.4byte	.Ldebug_ranges0+0xd0
-	.uleb128 0x40
-	.4byte	0x28dc
-	.4byte	.LLST72
-	.uleb128 0x40
-	.4byte	0x28e5
-	.4byte	.LLST73
-	.uleb128 0x42
-	.8byte	.LVL183
-	.4byte	0x2b65
-	.4byte	0x2208
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC23
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL184
-	.4byte	0x2b65
-	.4byte	0x2227
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL132
+	.4byte	0x26f3
+	.4byte	0x1fbc
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC24
+	.8byte	.LC18
 	.byte	0
-	.uleb128 0x33
-	.8byte	.LVL193
-	.4byte	0x2b65
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL133
+	.4byte	0x2740
+	.4byte	0x1fdf
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x8a
+	.byte	0x85
 	.sleb128 0
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x4e
-	.4byte	0x2869
-	.8byte	.LBB54
-	.4byte	.Ldebug_ranges0+0x150
-	.byte	0x1
-	.2byte	0x152
-	.4byte	0x229d
-	.uleb128 0x44
-	.4byte	0x288f
-	.uleb128 0x44
-	.4byte	0x2884
-	.uleb128 0x44
-	.4byte	0x2879
-	.uleb128 0x3f
-	.4byte	.Ldebug_ranges0+0x150
-	.uleb128 0x40
-	.4byte	0x289a
-	.4byte	.LLST74
-	.uleb128 0x41
-	.4byte	0x28a3
-	.uleb128 0x40
-	.4byte	0x28ae
-	.4byte	.LLST75
-	.uleb128 0x33
-	.8byte	.LVL272
-	.4byte	0x2b65
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC33
-	.byte	0
-	.byte	0
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL187
-	.4byte	0x2b91
-	.4byte	0x22bb
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL135
+	.4byte	0x274b
+	.4byte	0x1ffd
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x8
-	.byte	0x88
+	.byte	0x89
 	.sleb128 0
 	.byte	0x33
 	.byte	0x24
-	.byte	0x8a
+	.byte	0x8b
 	.sleb128 0
 	.byte	0x22
 	.byte	0x6
 	.byte	0
-	.uleb128 0x4f
-	.8byte	.LVL197
-	.4byte	0x2b65
-	.uleb128 0x42
-	.8byte	.LVL199
-	.4byte	0x2b9c
-	.4byte	0x22eb
-	.uleb128 0x34
+	.uleb128 0x45
+	.8byte	.LVL139
+	.4byte	0x26f3
+	.uleb128 0x38
+	.8byte	.LVL141
+	.4byte	0x2756
+	.4byte	0x202d
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x1
 	.byte	0x30
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x8
 	.byte	0x8f
 	.sleb128 0
-	.byte	0x8a
+	.byte	0x8b
 	.sleb128 0
 	.byte	0x22
 	.byte	0x23
-	.uleb128 0x130
-	.byte	0
-	.uleb128 0x4f
-	.8byte	.LVL202
-	.4byte	0x25e7
-	.uleb128 0x4f
-	.8byte	.LVL203
-	.4byte	0x2692
-	.uleb128 0x42
-	.8byte	.LVL204
-	.4byte	0x2b65
-	.4byte	0x2324
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC36
+	.uleb128 0x110
 	.byte	0
-	.uleb128 0x4f
-	.8byte	.LVL207
-	.4byte	0x25e7
-	.uleb128 0x4f
-	.8byte	.LVL208
-	.4byte	0x270b
-	.uleb128 0x4f
-	.8byte	.LVL215
-	.4byte	0x2692
-	.uleb128 0x4f
-	.8byte	.LVL216
-	.4byte	0x25e7
-	.uleb128 0x4f
-	.8byte	.LVL220
-	.4byte	0x25e7
-	.uleb128 0x42
-	.8byte	.LVL221
-	.4byte	0x2b65
-	.4byte	0x2389
-	.uleb128 0x34
+	.uleb128 0x45
+	.8byte	.LVL143
+	.4byte	0x2761
+	.uleb128 0x45
+	.8byte	.LVL144
+	.4byte	0x23eb
+	.uleb128 0x45
+	.8byte	.LVL145
+	.4byte	0x241b
+	.uleb128 0x38
+	.8byte	.LVL146
+	.4byte	0x26f3
+	.4byte	0x2073
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC30
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x3a
+	.8byte	.LC26
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL225
-	.4byte	0x2b65
-	.4byte	0x23a9
-	.uleb128 0x34
+	.uleb128 0x45
+	.8byte	.LVL148
+	.4byte	0x23eb
+	.uleb128 0x45
+	.8byte	.LVL149
+	.4byte	0x22b9
+	.uleb128 0x45
+	.8byte	.LVL150
+	.4byte	0x23eb
+	.uleb128 0x38
+	.8byte	.LVL161
+	.4byte	0x26f3
+	.4byte	0x20b8
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x4
-	.byte	0x8f
-	.sleb128 224
-	.byte	0x6
-	.uleb128 0x34
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x8a
+	.byte	0x89
 	.sleb128 0
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL226
-	.4byte	0x2b65
-	.4byte	0x23d5
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL162
+	.4byte	0x26f3
+	.4byte	0x20d6
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x4
-	.byte	0x8f
-	.sleb128 216
-	.byte	0x6
-	.uleb128 0x34
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x89
+	.byte	0x83
 	.sleb128 0
-	.uleb128 0x34
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL163
+	.4byte	0x241b
+	.uleb128 0x45
+	.8byte	.LVL164
+	.4byte	0x189b
+	.uleb128 0x45
+	.8byte	.LVL167
+	.4byte	0x244c
+	.uleb128 0x45
+	.8byte	.LVL170
+	.4byte	0x1c44
+	.uleb128 0x38
+	.8byte	.LVL173
+	.4byte	0x22b9
+	.4byte	0x2126
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
-	.uleb128 0x2
-	.byte	0x87
+	.uleb128 0x6
+	.byte	0x8c
 	.sleb128 0
-	.uleb128 0x34
+	.byte	0xa
+	.2byte	0x3fc
+	.byte	0x1a
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL176
+	.4byte	0x241b
+	.uleb128 0x45
+	.8byte	.LVL177
+	.4byte	0x189b
+	.uleb128 0x45
+	.8byte	.LVL180
+	.4byte	0x244c
+	.uleb128 0x45
+	.8byte	.LVL183
+	.4byte	0x1c44
+	.uleb128 0x45
+	.8byte	.LVL185
+	.4byte	0x276c
+	.uleb128 0x38
+	.8byte	.LVL192
+	.4byte	0x26f3
+	.4byte	0x2198
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC25
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0xe
+	.byte	0x86
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x9
+	.byte	0xe5
+	.byte	0x24
+	.byte	0x9
+	.byte	0xe5
+	.byte	0x26
 	.byte	0x88
 	.sleb128 0
+	.byte	0x22
+	.byte	0x6
 	.byte	0
-	.uleb128 0x4f
-	.8byte	.LVL227
-	.4byte	0x2692
-	.uleb128 0x42
-	.8byte	.LVL228
-	.4byte	0x1aae
-	.4byte	0x2400
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL195
+	.4byte	0x26f3
+	.4byte	0x21bc
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x2
-	.byte	0x87
-	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC28
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
+	.uleb128 0x1
+	.byte	0x3a
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL231
-	.4byte	0x28f1
-	.4byte	0x241e
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL205
+	.4byte	0x2777
+	.4byte	0x21e1
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 296
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x51
 	.uleb128 0x2
-	.byte	0x87
+	.byte	0x85
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x51
+	.byte	0x52
 	.uleb128 0x2
-	.byte	0x88
+	.byte	0x84
 	.sleb128 0
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL234
-	.4byte	0x1e16
-	.4byte	0x243c
-	.uleb128 0x34
+	.uleb128 0x45
+	.8byte	.LVL208
+	.4byte	0x241b
+	.uleb128 0x45
+	.8byte	.LVL209
+	.4byte	0x23eb
+	.uleb128 0x38
+	.8byte	.LVL213
+	.4byte	0x26f3
+	.4byte	0x2219
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x87
+	.byte	0x8a
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x88
+	.byte	0x89
 	.sleb128 0
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL237
-	.4byte	0x270b
-	.4byte	0x2458
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x6
-	.byte	0x8b
-	.sleb128 0
-	.byte	0xa
-	.2byte	0x3fc
-	.byte	0x1a
-	.byte	0
-	.uleb128 0x4f
-	.8byte	.LVL240
-	.4byte	0x2692
-	.uleb128 0x42
-	.8byte	.LVL241
-	.4byte	0x1aae
-	.4byte	0x2483
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x87
-	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL244
-	.4byte	0x28f1
-	.4byte	0x24a1
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x87
-	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL247
-	.4byte	0x1e16
-	.4byte	0x24bf
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x87
-	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
-	.byte	0
-	.uleb128 0x4f
-	.8byte	.LVL249
-	.4byte	0x2ba7
-	.uleb128 0x42
-	.8byte	.LVL255
-	.4byte	0x2b65
-	.4byte	0x2504
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC35
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x15
-	.byte	0x83
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x9
-	.byte	0xe5
-	.byte	0x24
-	.byte	0x9
-	.byte	0xe5
-	.byte	0x26
-	.byte	0x3
-	.8byte	.LANCHOR2
-	.byte	0x22
-	.byte	0x6
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL281
-	.4byte	0x2b65
-	.4byte	0x2522
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8a
-	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x89
-	.sleb128 0
-	.byte	0
-	.uleb128 0x4f
-	.8byte	.LVL286
-	.4byte	0x1aae
-	.uleb128 0x4f
-	.8byte	.LVL288
-	.4byte	0x2ba7
-	.uleb128 0x4f
-	.8byte	.LVL293
-	.4byte	0x28f1
-	.uleb128 0x4f
-	.8byte	.LVL294
-	.4byte	0x1e16
-	.uleb128 0x42
-	.8byte	.LVL299
-	.4byte	0x2b65
-	.4byte	0x257b
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC28
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x87
-	.sleb128 0
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL300
-	.4byte	0x2bb2
-	.4byte	0x259f
-	.uleb128 0x34
+	.uleb128 0x45
+	.8byte	.LVL218
+	.4byte	0x189b
+	.uleb128 0x45
+	.8byte	.LVL220
+	.4byte	0x276c
+	.uleb128 0x45
+	.8byte	.LVL223
+	.4byte	0x244c
+	.uleb128 0x45
+	.8byte	.LVL224
+	.4byte	0x1c44
+	.uleb128 0x38
+	.8byte	.LVL231
+	.4byte	0x2782
+	.4byte	0x2271
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x35
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x1
 	.byte	0x30
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0x8f
-	.sleb128 240
+	.sleb128 208
 	.byte	0
-	.uleb128 0x33
-	.8byte	.LVL303
-	.4byte	0x2b65
-	.uleb128 0x34
+	.uleb128 0x3a
+	.8byte	.LVL234
+	.4byte	0x26f3
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC29
-	.uleb128 0x34
+	.8byte	.LC21
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x86
+	.byte	0x87
 	.sleb128 0
 	.byte	0
 	.byte	0
@@ -6982,736 +6023,625 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0x67c
 	.uleb128 0xb
 	.4byte	0x109
-	.4byte	0x25d7
+	.4byte	0x22a9
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x4
 	.byte	0
 	.uleb128 0xb
 	.4byte	0x109
-	.4byte	0x25e7
+	.4byte	0x22b9
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x3
 	.byte	0
-	.uleb128 0x4d
-	.4byte	.LASF456
-	.byte	0x1
-	.byte	0xa4
+	.uleb128 0x46
+	.4byte	.LASF449
+	.byte	0x2
+	.byte	0x36
 	.4byte	0x59
-	.8byte	.LFB257
-	.8byte	.LFE257-.LFB257
+	.8byte	.LFB255
+	.8byte	.LFE255-.LFB255
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2692
-	.uleb128 0x36
-	.string	"uv"
-	.byte	0x1
-	.byte	0xa4
-	.4byte	0x59
-	.4byte	.LLST1
-	.uleb128 0x3a
-	.string	"dev"
-	.byte	0x1
-	.byte	0xa6
-	.4byte	0x25d
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -8
-	.uleb128 0x32
+	.4byte	0x23eb
+	.uleb128 0x31
+	.4byte	.LASF450
+	.byte	0x2
+	.byte	0x36
+	.4byte	0xa8
+	.4byte	.LLST29
+	.uleb128 0x31
+	.4byte	.LASF451
+	.byte	0x2
+	.byte	0x36
+	.4byte	0xa8
+	.4byte	.LLST30
+	.uleb128 0x31
+	.4byte	.LASF452
+	.byte	0x2
+	.byte	0x36
+	.4byte	0x109
+	.4byte	.LLST31
+	.uleb128 0x43
+	.string	"i"
+	.byte	0x2
+	.byte	0x39
+	.4byte	0xa8
+	.4byte	.LLST32
+	.uleb128 0x42
+	.4byte	.LASF453
+	.byte	0x2
+	.byte	0x3a
+	.4byte	0xa8
+	.4byte	.LLST33
+	.uleb128 0x42
+	.4byte	.LASF454
+	.byte	0x2
+	.byte	0x3a
+	.4byte	0xa8
+	.4byte	.LLST34
+	.uleb128 0x42
+	.4byte	.LASF455
+	.byte	0x2
+	.byte	0x3a
+	.4byte	0xa8
+	.4byte	.LLST35
+	.uleb128 0x43
 	.string	"ret"
-	.byte	0x1
-	.byte	0xa7
+	.byte	0x2
+	.byte	0x3b
 	.4byte	0x59
-	.4byte	.LLST2
-	.uleb128 0x42
-	.8byte	.LVL11
-	.4byte	0x2bbd
-	.4byte	0x2658
-	.uleb128 0x34
+	.4byte	.LLST36
+	.uleb128 0x45
+	.8byte	.LVL111
+	.4byte	0x278d
+	.uleb128 0x38
+	.8byte	.LVL113
+	.4byte	0x26f3
+	.4byte	0x2381
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC2
-	.uleb128 0x34
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x8f
-	.sleb128 56
-	.byte	0
-	.uleb128 0x4f
-	.8byte	.LVL14
-	.4byte	0x2b65
-	.uleb128 0x42
-	.8byte	.LVL18
-	.4byte	0x2bc9
-	.4byte	0x267d
-	.uleb128 0x34
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x51
+	.byte	0x52
 	.uleb128 0x2
 	.byte	0x84
 	.sleb128 0
 	.byte	0
-	.uleb128 0x33
-	.8byte	.LVL21
-	.4byte	0x2bd5
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL114
+	.4byte	0x241b
+	.4byte	0x239f
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x64
+	.uleb128 0x8
+	.byte	0x84
+	.sleb128 0
+	.byte	0xc
+	.4byte	0xffffffc0
+	.byte	0x1a
 	.byte	0
+	.uleb128 0x38
+	.8byte	.LVL117
+	.4byte	0x189b
+	.4byte	0x23b8
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x40
+	.byte	0x40
+	.byte	0x24
 	.byte	0
-	.uleb128 0x4d
-	.4byte	.LASF457
-	.byte	0x1
-	.byte	0x92
-	.4byte	0x59
-	.8byte	.LFB256
-	.8byte	.LFE256-.LFB256
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x270b
-	.uleb128 0x31
-	.4byte	.LASF458
-	.byte	0x1
-	.byte	0x92
-	.4byte	0x109
-	.4byte	.LLST0
-	.uleb128 0x4f
-	.8byte	.LVL2
-	.4byte	0x2be0
-	.uleb128 0x4f
-	.8byte	.LVL3
-	.4byte	0x2beb
-	.uleb128 0x4f
-	.8byte	.LVL4
-	.4byte	0x2bf6
-	.uleb128 0x33
-	.8byte	.LVL7
-	.4byte	0x2b65
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL120
+	.4byte	0x26f3
+	.4byte	0x23dd
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x34
+	.8byte	.LC17
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x83
+	.byte	0x8a
 	.sleb128 0
 	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL125
+	.4byte	0x276c
 	.byte	0
-	.uleb128 0x4d
-	.4byte	.LASF459
-	.byte	0x1
-	.byte	0x67
+	.uleb128 0x30
+	.4byte	.LASF456
+	.byte	0x2
+	.byte	0x31
 	.4byte	0x59
-	.8byte	.LFB255
-	.8byte	.LFE255-.LFB255
+	.8byte	.LFB254
+	.8byte	.LFE254-.LFB254
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x241b
+	.uleb128 0x47
+	.string	"uv"
+	.byte	0x2
+	.byte	0x31
+	.4byte	0xa8
+	.4byte	.LLST8
+	.byte	0
+	.uleb128 0x30
+	.4byte	.LASF457
+	.byte	0x2
+	.byte	0x2c
+	.4byte	0x59
+	.8byte	.LFB253
+	.8byte	.LFE253-.LFB253
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2869
+	.4byte	0x244c
 	.uleb128 0x31
-	.4byte	.LASF460
+	.4byte	.LASF455
+	.byte	0x2
+	.byte	0x2c
+	.4byte	0x109
+	.4byte	.LLST7
+	.byte	0
+	.uleb128 0x30
+	.4byte	.LASF458
 	.byte	0x1
-	.byte	0x67
-	.4byte	0xa8
-	.4byte	.LLST17
+	.byte	0x2d
+	.4byte	0x59
+	.8byte	.LFB200
+	.8byte	.LFE200-.LFB200
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x26d2
 	.uleb128 0x31
-	.4byte	.LASF461
+	.4byte	.LASF431
 	.byte	0x1
-	.byte	0x67
-	.4byte	0xa8
-	.4byte	.LLST18
+	.byte	0x2d
+	.4byte	0x109
+	.4byte	.LLST0
 	.uleb128 0x31
-	.4byte	.LASF462
+	.4byte	.LASF377
 	.byte	0x1
-	.byte	0x67
+	.byte	0x2d
 	.4byte	0x109
-	.4byte	.LLST19
-	.uleb128 0x32
-	.string	"i"
+	.4byte	.LLST1
+	.uleb128 0x42
+	.4byte	.LASF459
 	.byte	0x1
-	.byte	0x6b
+	.byte	0x2f
 	.4byte	0xa8
-	.4byte	.LLST20
-	.uleb128 0x37
-	.4byte	.LASF463
+	.4byte	.LLST2
+	.uleb128 0x43
+	.string	"i"
 	.byte	0x1
-	.byte	0x6c
+	.byte	0x2f
 	.4byte	0xa8
-	.4byte	.LLST21
-	.uleb128 0x37
-	.4byte	.LASF464
+	.4byte	.LLST3
+	.uleb128 0x43
+	.string	"j"
 	.byte	0x1
-	.byte	0x6c
+	.byte	0x2f
 	.4byte	0xa8
-	.4byte	.LLST22
-	.uleb128 0x37
-	.4byte	.LASF458
+	.4byte	.LLST4
+	.uleb128 0x43
+	.string	"q"
 	.byte	0x1
-	.byte	0x6c
+	.byte	0x2f
 	.4byte	0xa8
-	.4byte	.LLST23
+	.4byte	.LLST5
 	.uleb128 0x32
-	.string	"ret"
+	.string	"buf"
 	.byte	0x1
-	.byte	0x6d
-	.4byte	0x59
-	.4byte	.LLST24
-	.uleb128 0x4f
-	.8byte	.LVL73
-	.4byte	0x2c01
-	.uleb128 0x4f
-	.8byte	.LVL75
-	.4byte	0x2be0
-	.uleb128 0x42
-	.8byte	.LVL78
-	.4byte	0x2b65
-	.4byte	0x27da
-	.uleb128 0x34
+	.byte	0x30
+	.4byte	0x1e70
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -32
+	.uleb128 0x43
+	.string	"p"
+	.byte	0x1
+	.byte	0x31
+	.4byte	0x1379
+	.4byte	.LLST6
+	.uleb128 0x48
+	.4byte	.LASF460
+	.4byte	0x26e2
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC35
+	.uleb128 0x38
+	.8byte	.LVL2
+	.4byte	0x26f3
+	.4byte	0x250e
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.byte	0
+	.uleb128 0x38
+	.8byte	.LVL4
+	.4byte	0x26f3
+	.4byte	0x252e
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
+	.uleb128 0x4
+	.byte	0x8f
+	.sleb128 200
+	.byte	0x6
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x51
 	.uleb128 0x2
-	.byte	0x86
+	.byte	0x84
 	.sleb128 0
-	.uleb128 0x34
+	.byte	0
+	.uleb128 0x38
+	.8byte	.LVL6
+	.4byte	0x26f3
+	.4byte	0x254e
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x8f
+	.sleb128 192
+	.byte	0x6
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x85
+	.byte	0x8b
 	.sleb128 0
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL79
-	.4byte	0x2beb
-	.4byte	0x27f8
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL8
+	.4byte	0x271e
+	.4byte	0x256c
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x8
-	.byte	0x8a
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
 	.sleb128 0
-	.byte	0xc
-	.4byte	0xffffffff
-	.byte	0x1a
 	.byte	0
-	.uleb128 0x4f
-	.8byte	.LVL80
-	.4byte	0x2bf6
-	.uleb128 0x42
-	.8byte	.LVL83
-	.4byte	0x2b65
-	.4byte	0x281d
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL9
+	.4byte	0x2799
+	.4byte	0x2596
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x87
+	.byte	0x85
 	.sleb128 0
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL84
-	.4byte	0x1aae
-	.4byte	0x2836
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x3
-	.byte	0x40
-	.byte	0x40
-	.byte	0x24
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL87
-	.4byte	0x2b65
-	.4byte	0x285b
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL10
+	.4byte	0x2735
+	.4byte	0x25c5
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC15
-	.uleb128 0x34
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x8b
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x88
 	.sleb128 0
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x1
+	.byte	0x31
 	.byte	0
-	.uleb128 0x4f
-	.8byte	.LVL92
-	.4byte	0x2ba7
+	.uleb128 0x38
+	.8byte	.LVL16
+	.4byte	0x26f3
+	.4byte	0x25e4
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC4
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF465
-	.byte	0x1
-	.byte	0x49
-	.4byte	0x59
-	.byte	0x1
-	.4byte	0x28ba
-	.uleb128 0x3c
-	.string	"arg"
-	.byte	0x1
-	.byte	0x49
-	.4byte	0x1a04
-	.uleb128 0x47
-	.4byte	.LASF420
-	.byte	0x1
-	.byte	0x49
-	.4byte	0x1a04
-	.uleb128 0x47
-	.4byte	.LASF375
-	.byte	0x1
-	.byte	0x49
-	.4byte	0x1a04
-	.uleb128 0x48
-	.string	"i"
-	.byte	0x1
-	.byte	0x4b
-	.4byte	0xa8
-	.uleb128 0x49
-	.4byte	.LASF466
-	.byte	0x1
-	.byte	0x4b
-	.4byte	0xa8
-	.uleb128 0x49
-	.4byte	.LASF467
-	.byte	0x1
-	.byte	0x4c
-	.4byte	0xa8
-	.byte	0
-	.uleb128 0x50
-	.4byte	.LASF493
-	.byte	0x1
-	.byte	0x2d
-	.byte	0x1
-	.4byte	0x28f1
-	.uleb128 0x47
-	.4byte	.LASF420
-	.byte	0x1
-	.byte	0x2d
-	.4byte	0x1a04
-	.uleb128 0x47
-	.4byte	.LASF375
-	.byte	0x1
-	.byte	0x2d
-	.4byte	0x1a04
-	.uleb128 0x48
-	.string	"i"
-	.byte	0x1
-	.byte	0x2f
-	.4byte	0xa8
-	.uleb128 0x49
-	.4byte	.LASF466
-	.byte	0x1
-	.byte	0x2f
-	.4byte	0xa8
-	.byte	0
-	.uleb128 0x35
-	.4byte	.LASF468
-	.byte	0x4
-	.byte	0x2d
-	.4byte	0x59
-	.8byte	.LFB200
-	.8byte	.LFE200-.LFB200
+	.uleb128 0x38
+	.8byte	.LVL17
+	.4byte	0x27a4
+	.4byte	0x25fc
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2b2d
-	.uleb128 0x31
-	.4byte	.LASF420
-	.byte	0x4
-	.byte	0x2d
-	.4byte	0x109
-	.4byte	.LLST42
-	.uleb128 0x31
-	.4byte	.LASF375
-	.byte	0x4
-	.byte	0x2d
-	.4byte	0x109
-	.4byte	.LLST43
-	.uleb128 0x37
-	.4byte	.LASF469
-	.byte	0x4
-	.byte	0x2f
-	.4byte	0xa8
-	.4byte	.LLST44
-	.uleb128 0x32
-	.string	"i"
-	.byte	0x4
-	.byte	0x2f
-	.4byte	0xa8
-	.4byte	.LLST45
-	.uleb128 0x32
-	.string	"j"
-	.byte	0x4
-	.byte	0x2f
-	.4byte	0xa8
-	.4byte	.LLST46
-	.uleb128 0x32
-	.string	"q"
-	.byte	0x4
-	.byte	0x2f
-	.4byte	0xa8
-	.4byte	.LLST47
-	.uleb128 0x3a
-	.string	"buf"
-	.byte	0x4
-	.byte	0x30
-	.4byte	0x2042
+	.byte	0x50
 	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -32
-	.uleb128 0x32
-	.string	"p"
-	.byte	0x4
-	.byte	0x31
-	.4byte	0x1365
-	.4byte	.LLST48
-	.uleb128 0x51
-	.4byte	.LASF470
-	.4byte	0x2b3d
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC45
-	.uleb128 0x42
-	.8byte	.LVL123
-	.4byte	0x2b65
-	.4byte	0x29b3
-	.uleb128 0x34
+	.byte	0x8
+	.byte	0x80
+	.byte	0
+	.uleb128 0x38
+	.8byte	.LVL20
+	.4byte	0x26f3
+	.4byte	0x2621
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC17
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL125
-	.4byte	0x2b65
-	.4byte	0x29d3
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x4
-	.byte	0x8f
-	.sleb128 200
-	.byte	0x6
-	.uleb128 0x34
+	.8byte	.LC5
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
+	.byte	0x8
+	.byte	0x80
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL127
-	.4byte	0x2b65
-	.4byte	0x29f1
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL23
+	.4byte	0x26f3
+	.4byte	0x263f
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x8b
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x8a
+	.byte	0x84
 	.sleb128 0
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL130
-	.4byte	0x1a10
-	.4byte	0x2a1b
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL24
+	.4byte	0x26f3
+	.4byte	0x265d
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x70
+	.byte	0x89
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x78
+	.byte	0x86
 	.sleb128 0
-	.uleb128 0x34
+	.byte	0
+	.uleb128 0x38
+	.8byte	.LVL26
+	.4byte	0x271e
+	.4byte	0x267b
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x52
+	.byte	0x50
 	.uleb128 0x2
-	.byte	0x72
+	.byte	0x85
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x53
+	.byte	0x51
 	.uleb128 0x2
-	.byte	0x87
+	.byte	0x83
 	.sleb128 0
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL131
-	.4byte	0x1904
-	.4byte	0x2a44
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL27
+	.4byte	0x2799
+	.4byte	0x26a5
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x84
+	.byte	0x85
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x52
+	.byte	0x51
 	.uleb128 0x2
-	.byte	0x86
+	.byte	0x83
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x53
+	.byte	0x52
 	.uleb128 0x2
 	.byte	0x87
 	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x54
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL139
-	.4byte	0x2b65
-	.4byte	0x2a63
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC20
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL140
-	.4byte	0x2c0d
-	.4byte	0x2a7b
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x80
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL143
-	.4byte	0x2b65
-	.4byte	0x2aa0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC21
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x51
+	.byte	0x53
 	.uleb128 0x2
-	.byte	0x8
-	.byte	0x80
+	.byte	0x88
+	.sleb128 0
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL146
-	.4byte	0x2b65
-	.4byte	0x2abe
-	.uleb128 0x34
+	.uleb128 0x3a
+	.8byte	.LVL28
+	.4byte	0x2735
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x8a
+	.byte	0x85
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x83
 	.sleb128 0
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL147
-	.4byte	0x2b65
-	.4byte	0x2adc
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x50
+	.byte	0x52
 	.uleb128 0x2
-	.byte	0x88
+	.byte	0x87
 	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL149
-	.4byte	0x1a10
-	.4byte	0x2b06
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x72
-	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x87
-	.sleb128 0
-	.byte	0
-	.uleb128 0x33
-	.8byte	.LVL150
-	.4byte	0x1904
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x86
-	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
-	.byte	0x87
+	.byte	0x88
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x54
 	.uleb128 0x2
-	.byte	0x8b
+	.byte	0x8c
 	.sleb128 0
 	.byte	0
 	.byte	0
 	.uleb128 0xb
 	.4byte	0xe7
-	.4byte	0x2b3d
+	.4byte	0x26e2
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x9
 	.byte	0
 	.uleb128 0x8
-	.4byte	0x2b2d
-	.uleb128 0x52
-	.4byte	0x1a98
-	.8byte	.LFB275
-	.8byte	.LFE275-.LFB275
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2b65
-	.uleb128 0x53
-	.4byte	0x1aa4
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0
-	.uleb128 0x54
-	.4byte	.LASF471
-	.4byte	.LASF471
+	.4byte	0x26d2
+	.uleb128 0x49
+	.4byte	.LASF461
+	.4byte	.LASF461
+	.byte	0x1d
+	.2byte	0x16c
+	.uleb128 0x4a
+	.4byte	.LASF462
+	.4byte	.LASF462
 	.byte	0x25
 	.byte	0x12
-	.uleb128 0x55
+	.uleb128 0x49
+	.4byte	.LASF463
+	.4byte	.LASF463
+	.byte	0x5
+	.2byte	0x258
+	.uleb128 0x4b
+	.4byte	.LASF466
+	.4byte	.LASF466
+	.uleb128 0x4a
+	.4byte	.LASF464
+	.4byte	.LASF464
+	.byte	0x26
+	.byte	0x5f
+	.uleb128 0x4a
+	.4byte	.LASF465
+	.4byte	.LASF465
+	.byte	0x27
+	.byte	0xb
+	.uleb128 0x49
+	.4byte	.LASF466
+	.4byte	.LASF466
+	.byte	0x1d
+	.2byte	0x16d
+	.uleb128 0x4a
+	.4byte	.LASF467
+	.4byte	.LASF467
+	.byte	0x28
+	.byte	0xe
+	.uleb128 0x4a
+	.4byte	.LASF468
+	.4byte	.LASF468
+	.byte	0x28
+	.byte	0x11
+	.uleb128 0x4a
+	.4byte	.LASF469
+	.4byte	.LASF469
+	.byte	0x9
+	.byte	0x2d
+	.uleb128 0x4a
+	.4byte	.LASF470
+	.4byte	.LASF470
+	.byte	0x29
+	.byte	0x29
+	.uleb128 0x4a
+	.4byte	.LASF471
+	.4byte	.LASF471
+	.byte	0x27
+	.byte	0xc
+	.uleb128 0x4a
 	.4byte	.LASF472
 	.4byte	.LASF472
-	.byte	0x1d
-	.2byte	0x16c
-	.uleb128 0x56
-	.4byte	.LASF473
-	.4byte	.LASF473
-	.uleb128 0x55
+	.byte	0x21
+	.byte	0x11
+	.uleb128 0x4a
 	.4byte	.LASF473
 	.4byte	.LASF473
-	.byte	0x1d
-	.2byte	0x16d
-	.uleb128 0x54
+	.byte	0x28
+	.byte	0x12
+	.uleb128 0x4a
 	.4byte	.LASF474
 	.4byte	.LASF474
-	.byte	0xa
-	.byte	0x2d
-	.uleb128 0x54
+	.byte	0x20
+	.byte	0x94
+	.uleb128 0x49
 	.4byte	.LASF475
 	.4byte	.LASF475
-	.byte	0x26
-	.byte	0x29
-	.uleb128 0x54
+	.byte	0x5
+	.2byte	0x2b9
+	.uleb128 0x4a
 	.4byte	.LASF476
 	.4byte	.LASF476
-	.byte	0x21
-	.byte	0x11
-	.uleb128 0x54
+	.byte	0x28
+	.byte	0xd
+	.uleb128 0x49
 	.4byte	.LASF477
 	.4byte	.LASF477
-	.byte	0x20
-	.byte	0x94
-	.uleb128 0x55
-	.4byte	.LASF478
-	.4byte	.LASF478
-	.byte	0x27
-	.2byte	0x1da
-	.uleb128 0x55
-	.4byte	.LASF479
-	.4byte	.LASF479
-	.byte	0x27
-	.2byte	0x116
-	.uleb128 0x54
-	.4byte	.LASF480
-	.4byte	.LASF480
-	.byte	0x28
-	.byte	0xb
-	.uleb128 0x54
-	.4byte	.LASF481
-	.4byte	.LASF481
-	.byte	0x29
-	.byte	0xc
-	.uleb128 0x54
-	.4byte	.LASF482
-	.4byte	.LASF482
-	.byte	0x29
-	.byte	0xa
-	.uleb128 0x54
-	.4byte	.LASF483
-	.4byte	.LASF483
-	.byte	0x29
-	.byte	0xb
-	.uleb128 0x55
-	.4byte	.LASF484
-	.4byte	.LASF484
-	.byte	0x6
-	.2byte	0x2b9
-	.uleb128 0x55
-	.4byte	.LASF485
-	.4byte	.LASF485
 	.byte	0x1d
 	.2byte	0x398
 	.byte	0
@@ -8252,8 +7182,6 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x13
 	.uleb128 0x3f
 	.uleb128 0x19
-	.uleb128 0x2
-	.uleb128 0x18
 	.byte	0
 	.byte	0
 	.uleb128 0x2c
@@ -8327,6 +7255,8 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xb
 	.uleb128 0x27
 	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
 	.uleb128 0x11
 	.uleb128 0x1
 	.uleb128 0x12
@@ -8366,64 +7296,46 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x49
 	.uleb128 0x13
 	.uleb128 0x2
-	.uleb128 0x17
+	.uleb128 0x18
 	.byte	0
 	.byte	0
 	.uleb128 0x33
-	.uleb128 0x4109
+	.uleb128 0x1d
 	.byte	0x1
-	.uleb128 0x11
-	.uleb128 0x1
 	.uleb128 0x31
 	.uleb128 0x13
+	.uleb128 0x52
+	.uleb128 0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.uleb128 0x410a
+	.uleb128 0x5
 	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
 	.uleb128 0x2
-	.uleb128 0x18
-	.uleb128 0x2111
-	.uleb128 0x18
+	.uleb128 0x17
 	.byte	0
 	.byte	0
 	.uleb128 0x35
-	.uleb128 0x2e
-	.byte	0x1
-	.uleb128 0x3f
-	.uleb128 0x19
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
 	.uleb128 0xb
-	.uleb128 0x27
-	.uleb128 0x19
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x12
-	.uleb128 0x7
-	.uleb128 0x40
-	.uleb128 0x18
-	.uleb128 0x2117
-	.uleb128 0x19
-	.uleb128 0x1
-	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0x55
+	.uleb128 0x17
 	.byte	0
 	.byte	0
 	.uleb128 0x36
-	.uleb128 0x5
+	.uleb128 0x34
 	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
+	.uleb128 0x31
 	.uleb128 0x13
 	.uleb128 0x2
 	.uleb128 0x17
@@ -8432,156 +7344,40 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x37
 	.uleb128 0x34
 	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
+	.uleb128 0x31
 	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x17
 	.byte	0
 	.byte	0
 	.uleb128 0x38
-	.uleb128 0x5
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x18
-	.byte	0
-	.byte	0
-	.uleb128 0x39
-	.uleb128 0x5
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x18
-	.byte	0
-	.byte	0
-	.uleb128 0x3a
-	.uleb128 0x34
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x18
-	.byte	0
-	.byte	0
-	.uleb128 0x3b
-	.uleb128 0x2e
+	.uleb128 0x4109
 	.byte	0x1
-	.uleb128 0x3f
-	.uleb128 0x19
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x27
-	.uleb128 0x19
-	.uleb128 0x20
-	.uleb128 0xb
+	.uleb128 0x11
 	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x3c
-	.uleb128 0x5
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x3d
-	.uleb128 0x1d
-	.byte	0x1
 	.uleb128 0x31
 	.uleb128 0x13
-	.uleb128 0x52
-	.uleb128 0x1
-	.uleb128 0x55
-	.uleb128 0x17
-	.uleb128 0x58
-	.uleb128 0xb
-	.uleb128 0x59
-	.uleb128 0xb
 	.uleb128 0x1
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3e
-	.uleb128 0x5
-	.byte	0
-	.uleb128 0x31
-	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x17
-	.byte	0
-	.byte	0
-	.uleb128 0x3f
-	.uleb128 0xb
-	.byte	0x1
-	.uleb128 0x55
-	.uleb128 0x17
-	.byte	0
-	.byte	0
-	.uleb128 0x40
-	.uleb128 0x34
+	.uleb128 0x39
+	.uleb128 0x410a
 	.byte	0
-	.uleb128 0x31
-	.uleb128 0x13
 	.uleb128 0x2
-	.uleb128 0x17
-	.byte	0
-	.byte	0
-	.uleb128 0x41
-	.uleb128 0x34
-	.byte	0
-	.uleb128 0x31
-	.uleb128 0x13
+	.uleb128 0x18
+	.uleb128 0x2111
+	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x42
+	.uleb128 0x3a
 	.uleb128 0x4109
 	.byte	0x1
 	.uleb128 0x11
 	.uleb128 0x1
 	.uleb128 0x31
 	.uleb128 0x13
-	.uleb128 0x1
-	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x43
+	.uleb128 0x3b
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -8596,14 +7392,14 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x44
+	.uleb128 0x3c
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x45
+	.uleb128 0x3d
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -8612,7 +7408,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x46
+	.uleb128 0x3e
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -8631,7 +7427,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x47
+	.uleb128 0x3f
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -8644,7 +7440,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x48
+	.uleb128 0x40
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -8657,7 +7453,20 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
+	.uleb128 0x41
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
 	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x42
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -8668,9 +7477,26 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xb
 	.uleb128 0x49
 	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x4a
+	.uleb128 0x43
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x44
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x3
@@ -8683,21 +7509,16 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x1
 	.byte	0
 	.byte	0
-	.uleb128 0x4b
-	.uleb128 0xb
-	.byte	0x1
+	.uleb128 0x45
+	.uleb128 0x4109
+	.byte	0
 	.uleb128 0x11
 	.uleb128 0x1
-	.uleb128 0x12
-	.uleb128 0x7
-	.byte	0
-	.byte	0
-	.uleb128 0x4c
-	.uleb128 0xb
-	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4d
+	.uleb128 0x46
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -8722,50 +7543,22 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4e
-	.uleb128 0x1d
-	.byte	0x1
-	.uleb128 0x31
-	.uleb128 0x13
-	.uleb128 0x52
-	.uleb128 0x1
-	.uleb128 0x55
-	.uleb128 0x17
-	.uleb128 0x58
-	.uleb128 0xb
-	.uleb128 0x59
+	.uleb128 0x47
 	.uleb128 0x5
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x4f
-	.uleb128 0x4109
-	.byte	0
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x31
-	.uleb128 0x13
-	.byte	0
 	.byte	0
-	.uleb128 0x50
-	.uleb128 0x2e
-	.byte	0x1
 	.uleb128 0x3
-	.uleb128 0xe
+	.uleb128 0x8
 	.uleb128 0x3a
 	.uleb128 0xb
 	.uleb128 0x3b
 	.uleb128 0xb
-	.uleb128 0x27
-	.uleb128 0x19
-	.uleb128 0x20
-	.uleb128 0xb
-	.uleb128 0x1
+	.uleb128 0x49
 	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x51
+	.uleb128 0x48
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -8778,33 +7571,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x52
-	.uleb128 0x2e
-	.byte	0x1
-	.uleb128 0x31
-	.uleb128 0x13
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x12
-	.uleb128 0x7
-	.uleb128 0x40
-	.uleb128 0x18
-	.uleb128 0x2117
-	.uleb128 0x19
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x53
-	.uleb128 0x5
-	.byte	0
-	.uleb128 0x31
-	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x18
-	.byte	0
-	.byte	0
-	.uleb128 0x54
+	.uleb128 0x49
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -8818,10 +7585,10 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x3a
 	.uleb128 0xb
 	.uleb128 0x3b
-	.uleb128 0xb
+	.uleb128 0x5
 	.byte	0
 	.byte	0
-	.uleb128 0x55
+	.uleb128 0x4a
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -8835,10 +7602,10 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x3a
 	.uleb128 0xb
 	.uleb128 0x3b
-	.uleb128 0x5
+	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x56
+	.uleb128 0x4b
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -8854,2991 +7621,2320 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.section	.debug_loc,"",@progbits
 .Ldebug_loc0:
-.LLST76:
-	.8byte	.LVL304
-	.8byte	.LVL306
+.LLST15:
+	.8byte	.LVL61
+	.8byte	.LVL64-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL306
-	.8byte	.LVL307
+	.8byte	.LVL64-1
+	.8byte	.LVL80
 	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL307
-	.8byte	.LVL308
+	.byte	0x63
+	.8byte	.LVL80
+	.8byte	.LVL81
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL308
-	.8byte	.LFE278
-	.2byte	0x1
-	.byte	0x64
+	.8byte	.LVL81
+	.8byte	.LFE271
+	.2byte	0x1
+	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST77:
-	.8byte	.LVL304
-	.8byte	.LVL306
+.LLST16:
+	.8byte	.LVL61
+	.8byte	.LVL63
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL306
-	.8byte	.LFE278
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST78:
-	.8byte	.LVL305
-	.8byte	.LVL306
+	.8byte	.LVL63
+	.8byte	.LVL64-1
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL306
-	.8byte	.LVL307
+	.byte	0x52
+	.8byte	.LVL64-1
+	.8byte	.LVL80
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL307
-	.8byte	.LVL308
+	.8byte	.LVL80
+	.8byte	.LVL81
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
-	.byte	0x50
+	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL308
-	.8byte	.LFE278
+	.8byte	.LVL81
+	.8byte	.LFE271
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST79:
-	.8byte	.LVL305
-	.8byte	.LVL306
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL306
-	.8byte	.LVL307
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL307
-	.8byte	.LVL308
+.LLST17:
+	.8byte	.LVL62
+	.8byte	.LVL63
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL308
-	.8byte	.LVL309
+	.8byte	.LVL63
+	.8byte	.LVL64-1
 	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL309
-	.8byte	.LVL310
-	.2byte	0x3
-	.byte	0x83
-	.sleb128 -4
-	.byte	0x9f
-	.8byte	.LVL310
-	.8byte	.LFE278
+	.byte	0x52
+	.8byte	.LVL64-1
+	.8byte	.LVL79
 	.2byte	0x1
-	.byte	0x63
+	.byte	0x64
+	.8byte	.LVL81
+	.8byte	.LFE271
+	.2byte	0x1
+	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST29:
-	.8byte	.LVL105
-	.8byte	.LVL113
+.LLST18:
+	.8byte	.LVL62
+	.8byte	.LVL64-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL113
-	.8byte	.LVL117
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL117
-	.8byte	.LFE277
+	.8byte	.LVL64-1
+	.8byte	.LVL79
 	.2byte	0x1
-	.byte	0x50
+	.byte	0x63
+	.8byte	.LVL81
+	.8byte	.LFE271
+	.2byte	0x1
+	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST30:
-	.8byte	.LVL105
-	.8byte	.LVL106
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL106
-	.8byte	.LVL108
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
+.LLST19:
+	.8byte	.LVL66
+	.8byte	.LVL67
+	.2byte	0x2
+	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL108
-	.8byte	.LVL114
+	.8byte	.LVL67
+	.8byte	.LVL68
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL114
-	.8byte	.LVL117
-	.2byte	0x8
-	.byte	0xf3
-	.uleb128 0x1
+	.8byte	.LVL73
+	.8byte	.LVL75
+	.2byte	0x1
 	.byte	0x51
-	.byte	0x33
-	.byte	0x25
-	.byte	0x31
-	.byte	0x1c
-	.byte	0x9f
-	.8byte	.LVL117
-	.8byte	.LFE277
+	.8byte	.LVL81
+	.8byte	.LVL83
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST31:
-	.8byte	.LVL105
-	.8byte	.LVL109
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL109
-	.8byte	.LVL115-1
+.LLST20:
+	.8byte	.LVL64
+	.8byte	.LVL65
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL65
+	.8byte	.LVL69
 	.2byte	0x1
-	.byte	0x58
-	.8byte	.LVL115-1
-	.8byte	.LVL117
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
+	.byte	0x66
+	.8byte	.LVL69
+	.8byte	.LVL72
+	.2byte	0x3
+	.byte	0x86
+	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL117
-	.8byte	.LFE277
+	.8byte	.LVL72
+	.8byte	.LVL79
 	.2byte	0x1
-	.byte	0x58
+	.byte	0x66
+	.8byte	.LVL81
+	.8byte	.LVL84
+	.2byte	0x1
+	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST32:
-	.8byte	.LVL105
-	.8byte	.LVL107
+.LLST21:
+	.8byte	.LVL64
+	.8byte	.LVL65
+	.2byte	0x6
+	.byte	0x9e
+	.uleb128 0x4
+	.4byte	0x80808080
+	.8byte	.LVL65
+	.8byte	.LVL79
 	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL107
-	.8byte	.LFE277
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
+	.byte	0x65
+	.8byte	.LVL81
+	.8byte	.LVL84
+	.2byte	0x1
+	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST33:
-	.8byte	.LVL105
-	.8byte	.LVL110
+.LLST22:
+	.8byte	.LVL64
+	.8byte	.LVL65
+	.2byte	0x6
+	.byte	0xc
+	.4byte	0x40404040
+	.byte	0x9f
+	.8byte	.LVL65
+	.8byte	.LVL79
 	.2byte	0x1
-	.byte	0x54
-	.8byte	.LVL110
-	.8byte	.LVL115-1
+	.byte	0x67
+	.8byte	.LVL81
+	.8byte	.LVL84
 	.2byte	0x1
-	.byte	0x5a
-	.8byte	.LVL115-1
-	.8byte	.LVL117
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x54
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST23:
+	.8byte	.LVL62
+	.8byte	.LVL65
+	.2byte	0x2
+	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL117
-	.8byte	.LFE277
-	.2byte	0x1
-	.byte	0x5a
 	.8byte	0
 	.8byte	0
-.LLST34:
-	.8byte	.LVL108
-	.8byte	.LVL113
+.LLST24:
+	.8byte	.LVL64
+	.8byte	.LVL80
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL113
-	.8byte	.LVL117
+	.byte	0x63
+	.8byte	.LVL80
+	.8byte	.LVL81
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL117
-	.8byte	.LFE277
+	.8byte	.LVL81
+	.8byte	.LFE271
 	.2byte	0x1
-	.byte	0x50
+	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST35:
-	.8byte	.LVL108
-	.8byte	.LVL109
+.LLST25:
+	.8byte	.LVL62
+	.8byte	.LVL68
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL72
+	.8byte	.LVL74
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL74
+	.8byte	.LVL76-1
 	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL109
-	.8byte	.LVL115-1
+	.byte	0x55
+	.8byte	.LVL76-1
+	.8byte	.LVL79
 	.2byte	0x1
-	.byte	0x58
-	.8byte	.LVL115-1
-	.8byte	.LVL117
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
+	.byte	0x6c
+	.8byte	.LVL81
+	.8byte	.LFE271
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL117
-	.8byte	.LFE277
-	.2byte	0x1
-	.byte	0x58
 	.8byte	0
 	.8byte	0
-.LLST36:
-	.8byte	.LVL108
-	.8byte	.LVL110
+.LLST26:
+	.8byte	.LVL87
+	.8byte	.LVL88
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL110
-	.8byte	.LVL115-1
+	.8byte	.LVL88
+	.8byte	.LVL89
 	.2byte	0x1
-	.byte	0x57
-	.8byte	.LVL117
-	.8byte	.LVL119
+	.byte	0x50
+	.8byte	.LVL92
+	.8byte	.LVL95
 	.2byte	0x1
-	.byte	0x57
-	.8byte	.LVL119
-	.8byte	.LVL120
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 -1
-	.byte	0x9f
-	.8byte	.LVL120
-	.8byte	.LFE277
+	.byte	0x50
+	.8byte	.LVL101
+	.8byte	.LFE271
 	.2byte	0x1
-	.byte	0x57
+	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST37:
-	.8byte	.LVL108
-	.8byte	.LVL110
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL110
-	.8byte	.LVL115-1
-	.2byte	0x1
-	.byte	0x56
-	.8byte	.LVL117
-	.8byte	.LFE277
+.LLST27:
+	.8byte	.LVL84
+	.8byte	.LVL90
 	.2byte	0x1
-	.byte	0x56
-	.8byte	0
-	.8byte	0
-.LLST38:
-	.8byte	.LVL108
-	.8byte	.LVL110
-	.2byte	0x2
-	.byte	0x30
+	.byte	0x65
+	.8byte	.LVL90
+	.8byte	.LVL91
+	.2byte	0x3
+	.byte	0x85
+	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL110
-	.8byte	.LVL115-1
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL117
-	.8byte	.LFE277
+	.8byte	.LVL91
+	.8byte	.LFE271
 	.2byte	0x1
-	.byte	0x52
+	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST39:
-	.8byte	.LVL108
-	.8byte	.LVL112
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL112
-	.8byte	.LVL115-1
-	.2byte	0x1
-	.byte	0x54
-	.8byte	.LVL117
-	.8byte	.LFE277
-	.2byte	0x2
-	.byte	0x30
+.LLST28:
+	.8byte	.LVL84
+	.8byte	.LVL89
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
 	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST40:
-	.8byte	.LVL108
-	.8byte	.LVL112
-	.2byte	0x2
-	.byte	0x30
+	.8byte	.LVL91
+	.8byte	.LVL94
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL112
-	.8byte	.LVL115-1
+	.8byte	.LVL94
+	.8byte	.LVL101
 	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL117
-	.8byte	.LFE277
-	.2byte	0x2
-	.byte	0x30
+	.byte	0x67
+	.8byte	.LVL101
+	.8byte	.LFE271
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST41:
-	.8byte	.LVL108
-	.8byte	.LVL112
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL112
-	.8byte	.LVL116
+.LLST9:
+	.8byte	.LVL35
+	.8byte	.LVL37
 	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL116
-	.8byte	.LVL117
+	.byte	0x50
+	.8byte	.LVL37
+	.8byte	.LVL45
 	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL45
+	.8byte	.LVL46
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
 	.byte	0x50
-	.8byte	.LVL117
-	.8byte	.LFE277
-	.2byte	0x2
-	.byte	0x30
 	.byte	0x9f
+	.8byte	.LVL46
+	.8byte	.LFE268
+	.2byte	0x1
+	.byte	0x69
 	.8byte	0
 	.8byte	0
-.LLST25:
-	.8byte	.LVL97
-	.8byte	.LVL98
+.LLST10:
+	.8byte	.LVL35
+	.8byte	.LVL36
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL98
-	.8byte	.LVL100
+	.8byte	.LVL36
+	.8byte	.LVL43
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL43
+	.8byte	.LVL46
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL100
-	.8byte	.LFE276
+	.8byte	.LVL46
+	.8byte	.LVL47
 	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL47
+	.8byte	.LVL48
+	.2byte	0x3
+	.byte	0x87
+	.sleb128 32
+	.byte	0x9f
+	.8byte	.LVL48
+	.8byte	.LFE268
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
 	.byte	0x51
+	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST26:
-	.8byte	.LVL97
-	.8byte	.LVL99
+.LLST11:
+	.8byte	.LVL50
+	.8byte	.LVL55
 	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL99
-	.8byte	.LFE276
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST12:
+	.8byte	.LVL41
+	.8byte	.LVL44
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL46
+	.8byte	.LFE268
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST13:
+	.8byte	.LVL50
+	.8byte	.LVL56
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL56
+	.8byte	.LVL57
+	.2byte	0x3
+	.byte	0x85
+	.sleb128 -8
+	.byte	0x9f
+	.8byte	.LVL57
+	.8byte	.LFE268
+	.2byte	0x3
+	.byte	0x88
+	.sleb128 -40
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST27:
-	.8byte	.LVL100
-	.8byte	.LVL101
+.LLST14:
+	.8byte	.LVL38
+	.8byte	.LVL43
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL101
-	.8byte	.LFE276
+	.8byte	.LVL46
+	.8byte	.LVL51
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL51
+	.8byte	.LVL52
 	.2byte	0x1
-	.byte	0x55
-	.8byte	0
-	.8byte	0
-.LLST28:
-	.8byte	.LVL100
-	.8byte	.LVL101
+	.byte	0x50
+	.8byte	.LVL52
+	.8byte	.LVL54
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL101
-	.8byte	.LFE276
+	.8byte	.LVL54
+	.8byte	.LVL58
 	.2byte	0x1
-	.byte	0x54
+	.byte	0x50
+	.8byte	.LVL60
+	.8byte	.LFE268
+	.2byte	0x1
+	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST3:
-	.8byte	.LVL22
-	.8byte	.LVL26-1
+.LLST37:
+	.8byte	.LVL129
+	.8byte	.LVL130
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL26-1
-	.8byte	.LVL40
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL40
-	.8byte	.LVL42
+	.8byte	.LVL130
+	.8byte	.LFE256
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL42
-	.8byte	.LFE274
-	.2byte	0x1
-	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST4:
-	.8byte	.LVL22
-	.8byte	.LVL25
+.LLST38:
+	.8byte	.LVL129
+	.8byte	.LVL132-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL25
-	.8byte	.LVL26-1
+	.8byte	.LVL132-1
+	.8byte	.LFE256
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST39:
+	.8byte	.LVL129
+	.8byte	.LVL132-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL26-1
-	.8byte	.LVL41
+	.8byte	.LVL132-1
+	.8byte	.LVL138
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL41
-	.8byte	.LVL42
+	.8byte	.LVL138
+	.8byte	.LVL228
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
-	.byte	0x51
+	.byte	0x52
 	.byte	0x9f
-	.8byte	.LVL42
-	.8byte	.LFE274
+	.8byte	.LVL228
+	.8byte	.LVL229
 	.2byte	0x1
 	.byte	0x67
+	.8byte	.LVL229
+	.8byte	.LFE256
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST5:
-	.8byte	.LVL24
-	.8byte	.LVL25
+.LLST40:
+	.8byte	.LVL129
+	.8byte	.LVL132-1
 	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL25
-	.8byte	.LVL26-1
+	.byte	0x53
+	.8byte	.LVL132-1
+	.8byte	.LVL145
 	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL26-1
-	.8byte	.LVL39
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL42
-	.8byte	.LFE274
-	.2byte	0x1
-	.byte	0x67
-	.8byte	0
-	.8byte	0
-.LLST6:
-	.8byte	.LVL23
-	.8byte	.LVL26-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL26-1
-	.8byte	.LVL39
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL42
-	.8byte	.LFE274
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST7:
-	.8byte	.LVL28
-	.8byte	.LVL29
-	.2byte	0x2
-	.byte	0x30
+	.byte	0x6a
+	.8byte	.LVL145
+	.8byte	.LVL147
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
 	.byte	0x9f
-	.8byte	.LVL29
-	.8byte	.LVL32-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL35
-	.8byte	.LVL37
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL42
-	.8byte	.LVL44
+	.8byte	.LVL147
+	.8byte	.LVL158
 	.2byte	0x1
-	.byte	0x51
-	.8byte	0
-	.8byte	0
-.LLST8:
-	.8byte	.LVL26
-	.8byte	.LVL27
-	.2byte	0x2
-	.byte	0x30
+	.byte	0x6a
+	.8byte	.LVL158
+	.8byte	.LVL193
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
 	.byte	0x9f
-	.8byte	.LVL27
-	.8byte	.LVL31
+	.8byte	.LVL193
+	.8byte	.LVL196
 	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL31
-	.8byte	.LVL34
-	.2byte	0x3
-	.byte	0x8c
-	.sleb128 -1
+	.byte	0x6a
+	.8byte	.LVL196
+	.8byte	.LVL204
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
 	.byte	0x9f
-	.8byte	.LVL34
-	.8byte	.LVL39
+	.8byte	.LVL204
+	.8byte	.LVL210
 	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL42
-	.8byte	.LVL46
+	.byte	0x6a
+	.8byte	.LVL210
+	.8byte	.LVL226
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL226
+	.8byte	.LVL234
 	.2byte	0x1
-	.byte	0x6c
+	.byte	0x6a
+	.8byte	.LVL234
+	.8byte	.LFE256
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST9:
-	.8byte	.LVL26
-	.8byte	.LVL27
-	.2byte	0x6
-	.byte	0x9e
-	.uleb128 0x4
-	.4byte	0x80808080
-	.8byte	.LVL27
-	.8byte	.LVL39
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL42
-	.8byte	.LVL47
+.LLST41:
+	.8byte	.LVL134
+	.8byte	.LVL136
 	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST10:
-	.8byte	.LVL26
-	.8byte	.LVL27
-	.2byte	0x6
-	.byte	0xc
-	.4byte	0x40404040
+	.byte	0x63
+	.8byte	.LVL136
+	.8byte	.LVL137
+	.2byte	0x3
+	.byte	0x83
+	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL27
-	.8byte	.LVL39
+	.8byte	.LVL137
+	.8byte	.LVL138
 	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL42
-	.8byte	.LVL45
+	.byte	0x63
+	.8byte	.LVL151
+	.8byte	.LVL153
 	.2byte	0x1
-	.byte	0x69
-	.8byte	0
-	.8byte	0
-.LLST11:
-	.8byte	.LVL24
-	.8byte	.LVL27
+	.byte	0x50
+	.8byte	.LVL153
+	.8byte	.LVL154
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST12:
-	.8byte	.LVL26
-	.8byte	.LVL40
+	.8byte	.LVL154
+	.8byte	.LVL155
 	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL40
-	.8byte	.LVL42
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
 	.byte	0x50
+	.8byte	.LVL155
+	.8byte	.LVL156
+	.2byte	0x3
+	.byte	0x70
+	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL42
-	.8byte	.LFE274
+	.8byte	.LVL161
+	.8byte	.LVL186
 	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST13:
-	.8byte	.LVL24
-	.8byte	.LVL30
+	.byte	0x63
+	.8byte	.LVL186
+	.8byte	.LVL187
 	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
+	.byte	0x83
+	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL34
-	.8byte	.LVL36
+	.8byte	.LVL193
+	.8byte	.LVL194
 	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
+	.byte	0x70
+	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL36
-	.8byte	.LVL39
+	.8byte	.LVL196
+	.8byte	.LVL204
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL42
-	.8byte	.LFE274
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST14:
-	.8byte	.LVL50
-	.8byte	.LVL51
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL51
-	.8byte	.LVL53
+	.8byte	.LVL213
+	.8byte	.LVL214
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL56
-	.8byte	.LVL60
+	.byte	0x6c
+	.8byte	.LVL217
+	.8byte	.LVL221
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL63
-	.8byte	.LFE274
+	.byte	0x6c
+	.8byte	.LVL222
+	.8byte	.LVL226
 	.2byte	0x1
-	.byte	0x50
+	.byte	0x6c
+	.8byte	.LVL228
+	.8byte	.LVL230
+	.2byte	0x1
+	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST15:
-	.8byte	.LVL47
-	.8byte	.LVL54
+.LLST42:
+	.8byte	.LVL137
+	.8byte	.LVL138
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL54
-	.8byte	.LVL55
-	.2byte	0x3
-	.byte	0x83
-	.sleb128 -1
-	.byte	0x9f
-	.8byte	.LVL55
-	.8byte	.LFE274
+	.8byte	.LVL140
+	.8byte	.LVL145
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL147
+	.8byte	.LVL159
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL193
+	.8byte	.LVL196
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL204
+	.8byte	.LVL234
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST16:
-	.8byte	.LVL47
-	.8byte	.LVL52
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL55
-	.8byte	.LVL58
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
+.LLST43:
+	.8byte	.LVL165
+	.8byte	.LVL168
+	.2byte	0x2
+	.byte	0x32
 	.byte	0x9f
-	.8byte	.LVL58
-	.8byte	.LVL63
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL63
-	.8byte	.LFE274
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
+	.8byte	.LVL168
+	.8byte	.LVL171
+	.2byte	0x2
+	.byte	0x33
 	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST49:
-	.8byte	.LVL153
-	.8byte	.LVL155
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL155
-	.8byte	.LVL174
-	.2byte	0x1
-	.byte	0x67
+	.8byte	.LVL171
 	.8byte	.LVL174
-	.8byte	.LFE271
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
+	.2byte	0x2
+	.byte	0x34
 	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST50:
-	.8byte	.LVL153
-	.8byte	.LVL154
+	.8byte	.LVL178
+	.8byte	.LVL181
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL181
+	.8byte	.LVL184
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL184
+	.8byte	.LVL186
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL196
+	.8byte	.LVL197
+	.2byte	0x2
+	.byte	0x32
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+	.8byte	.LVL197
+	.8byte	.LVL198
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL198
+	.8byte	.LVL199
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL200
+	.8byte	.LVL201
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL201
+	.8byte	.LVL202
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL202
+	.8byte	.LVL204
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL219
+	.8byte	.LVL222
 	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL154
-	.8byte	.LVL162
+	.byte	0x63
+	.8byte	.LVL225
+	.8byte	.LVL226
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL162
-	.8byte	.LVL163
-	.2byte	0x3
-	.byte	0x83
-	.sleb128 32
-	.byte	0x9f
-	.8byte	.LVL163
-	.8byte	.LFE271
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL160
-	.8byte	.LVL164
+.LLST44:
+	.8byte	.LVL157
+	.8byte	.LVL159
 	.2byte	0x2
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 	.byte	0x9f
-	.8byte	.LVL164
-	.8byte	.LVL167
+	.8byte	.LVL159
+	.8byte	.LVL193
 	.2byte	0x1
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+	.byte	0x69
+	.8byte	.LVL196
+	.8byte	.LVL204
+	.2byte	0x1
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+	.8byte	.LVL226
+	.2byte	0x1
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 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL167
-	.8byte	.LVL173
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+	.8byte	.LVL131
+	.8byte	.LVL145
+	.2byte	0x2
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+	.8byte	.LVL190
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL193
+	.8byte	.LVL206
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL206
+	.8byte	.LVL207
 	.2byte	0x1
-	.byte	0x64
+	.byte	0x50
+	.8byte	.LVL207
+	.8byte	.LVL226
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL226
+	.8byte	.LVL228
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL228
+	.8byte	.LVL234
+	.2byte	0x2
+	.byte	0x31
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 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL160
-	.8byte	.LVL164
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+	.8byte	.LVL131
+	.8byte	.LVL145
 	.2byte	0x2
 	.byte	0x30
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-	.8byte	.LVL164
-	.8byte	.LVL168
+	.8byte	.LVL147
+	.8byte	.LVL152
+	.2byte	0x2
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+	.byte	0x9f
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+	.8byte	.LVL153
 	.2byte	0x1
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-	.8byte	.LVL168
-	.8byte	.LVL169
-	.2byte	0x3
-	.byte	0x85
-	.sleb128 -8
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+	.8byte	.LVL193
+	.8byte	.LVL196
+	.2byte	0x2
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 	.byte	0x9f
-	.8byte	.LVL169
-	.8byte	.LVL173
-	.2byte	0x3
-	.byte	0x86
-	.sleb128 -40
+	.8byte	.LVL204
+	.8byte	.LVL234
+	.2byte	0x2
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 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL169
-	.8byte	.LVL173
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+	.8byte	.LVL131
+	.8byte	.LVL142
+	.2byte	0x2
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+	.8byte	.LVL142
+	.8byte	.LVL143-1
 	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
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-	.8byte	.LVL156
-	.8byte	.LVL166
+	.byte	0x50
+	.8byte	.LVL143-1
+	.8byte	.LVL145
+	.2byte	0x1
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+	.8byte	.LVL147
+	.8byte	.LVL159
+	.2byte	0x1
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+	.8byte	.LVL165
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
+	.8byte	.LVL165
 	.8byte	.LVL166
-	.8byte	.LVL170
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL172
-	.8byte	.LFE271
+	.8byte	.LVL166
+	.8byte	.LVL168
+	.2byte	0x1
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+	.8byte	.LVL168
+	.8byte	.LVL169
 	.2byte	0x1
 	.byte	0x50
-	.8byte	0
-	.8byte	0
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-	.8byte	.LVL159
-	.8byte	.LVL161
+	.8byte	.LVL169
+	.8byte	.LVL171
 	.2byte	0x1
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-	.8byte	0
-	.8byte	0
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-	.8byte	.LVL158
-	.8byte	.LVL159
+	.byte	0x68
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+	.8byte	.LVL172
 	.2byte	0x1
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-	.8byte	0
-	.8byte	0
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+	.byte	0x50
+	.8byte	.LVL172
+	.8byte	.LVL174
+	.2byte	0x1
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+	.8byte	.LVL174
 	.8byte	.LVL175
-	.8byte	.LVL176
 	.2byte	0x1
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-	.8byte	.LFE258
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
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-	.byte	0x9f
-	.8byte	0
-	.8byte	0
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 	.8byte	.LVL175
 	.8byte	.LVL178
 	.2byte	0x1
-	.byte	0x51
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 	.8byte	.LVL178
-	.8byte	.LFE258
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
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-	.8byte	0
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-	.8byte	.LVL175
-	.8byte	.LVL177
+	.8byte	.LVL179
 	.2byte	0x1
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-	.8byte	.LVL177
-	.8byte	.LVL196
+	.byte	0x50
+	.8byte	.LVL179
+	.8byte	.LVL180-1
 	.2byte	0x1
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-	.8byte	.LVL196
-	.8byte	.LVL296
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
 	.byte	0x52
-	.byte	0x9f
-	.8byte	.LVL296
-	.8byte	.LVL297
+	.8byte	.LVL180-1
+	.8byte	.LVL181
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 196
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+	.8byte	.LVL182
+	.2byte	0x1
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+	.8byte	.LVL182
+	.8byte	.LVL184
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL297
-	.8byte	.LFE258
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
+	.8byte	.LVL184
+	.8byte	.LVL185-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL185-1
+	.8byte	.LVL186
+	.2byte	0x1
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+	.8byte	.LVL186
+	.8byte	.LVL188
+	.2byte	0x2
+	.byte	0x30
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-	.8byte	0
-	.8byte	0
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-	.8byte	.LVL175
-	.8byte	.LVL178
+	.8byte	.LVL188
+	.8byte	.LVL191
 	.2byte	0x1
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+	.byte	0x68
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+	.2byte	0x1
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+	.2byte	0x1
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 	.8byte	.LVL203
 	.2byte	0x1
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 	.8byte	.LVL203
-	.8byte	.LVL205
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.8byte	.LVL205
-	.8byte	.LVL217
+	.8byte	.LVL204
 	.2byte	0x1
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-	.8byte	.LVL218
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.8byte	.LVL218
-	.8byte	.LVL223
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+	.8byte	.LVL211
 	.2byte	0x1
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-	.8byte	.LVL223
-	.8byte	.LVL256
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
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+	.8byte	.LVL214
+	.2byte	0x2
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 	.byte	0x9f
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-	.8byte	.LVL260
+	.8byte	.LVL214
+	.8byte	.LVL216
 	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL260
-	.8byte	.LVL268
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
+	.byte	0x68
+	.8byte	.LVL216
+	.8byte	.LVL219
+	.2byte	0x2
+	.byte	0x30
 	.byte	0x9f
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-	.8byte	.LVL279
+	.8byte	.LVL219
+	.8byte	.LVL220-1
 	.2byte	0x1
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-	.8byte	.LVL279
-	.8byte	.LVL296
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
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-	.8byte	.LVL303
+	.byte	0x50
+	.8byte	.LVL220-1
+	.8byte	.LVL222
 	.2byte	0x1
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-	.8byte	.LVL303
-	.8byte	.LFE258
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
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+	.2byte	0x2
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-	.8byte	0
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-	.8byte	.LVL186
-	.8byte	.LVL188
+	.8byte	.LVL225
+	.8byte	.LVL226
 	.2byte	0x1
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-	.2byte	0x3
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-	.sleb128 1
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 	.2byte	0x1
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-	.8byte	.LVL222
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 	.2byte	0x2
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-	.8byte	.LVL250
+	.8byte	.LVL232
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 	.2byte	0x1
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-	.8byte	.LVL251
-	.2byte	0x3
-	.byte	0x89
-	.sleb128 1
-	.byte	0x9f
-	.8byte	.LVL257
-	.8byte	.LVL258
+	.byte	0x50
+	.8byte	.LVL233
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+	.2byte	0x1
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+	.2byte	0x1
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+	.8byte	.LVL131
+	.8byte	.LVL145
 	.2byte	0x2
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-	.8byte	.LVL259
+	.8byte	.LVL147
+	.8byte	.LVL188
 	.2byte	0x2
-	.byte	0x33
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-	.8byte	.LVL268
-	.2byte	0x1
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-	.8byte	.LVL282
-	.2byte	0x1
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-	.8byte	.LVL285
-	.8byte	.LVL289
-	.2byte	0x1
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-	.8byte	.LVL292
-	.8byte	.LVL296
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+	.8byte	.LVL189
 	.2byte	0x1
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-	.8byte	.LVL298
+	.byte	0x52
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+	.2byte	0x2
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+	.8byte	.LVL215
 	.2byte	0x1
-	.byte	0x67
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+	.2byte	0x2
+	.byte	0x30
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 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL195
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+	.8byte	.LVL157
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+	.2byte	0x1
+	.byte	0x6c
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 	.2byte	0x1
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-	.8byte	.LVL203
+	.byte	0x6c
+	.8byte	0
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+	.8byte	.LVL103
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 	.2byte	0x1
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+	.byte	0x50
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+	.8byte	.LVL107
 	.2byte	0x1
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-	.8byte	.LVL260
+	.byte	0x63
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+	.8byte	.LVL108
 	.2byte	0x1
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+	.8byte	.LVL121
 	.2byte	0x1
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+	.8byte	.LVL124
+	.8byte	.LFE255
 	.2byte	0x1
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+	.8byte	.LVL103
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 	.2byte	0x1
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+	.2byte	0x1
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 	.8byte	0
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-	.8byte	.LVL229
-	.8byte	.LVL232
-	.2byte	0x2
-	.byte	0x32
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-	.2byte	0x2
-	.byte	0x33
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-	.2byte	0x2
-	.byte	0x34
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-	.2byte	0x2
-	.byte	0x32
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-	.2byte	0x2
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-	.2byte	0x2
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-	.2byte	0x2
-	.byte	0x32
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-	.8byte	.LVL262
-	.2byte	0x2
-	.byte	0x33
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-	.8byte	.LVL263
-	.2byte	0x2
-	.byte	0x34
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-	.8byte	.LVL265
-	.2byte	0x2
-	.byte	0x32
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-	.2byte	0x2
-	.byte	0x33
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-	.2byte	0x2
-	.byte	0x34
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+	.8byte	.LVL103
+	.8byte	.LVL110
 	.2byte	0x1
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 	.2byte	0x1
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+	.2byte	0x4
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+	.uleb128 0x1
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 	.2byte	0x1
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 	.8byte	0
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-	.8byte	.LVL222
-	.8byte	.LVL223
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+	.8byte	.LVL109
+	.8byte	.LVL110
 	.2byte	0x2
 	.byte	0x30
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-	.2byte	0x1
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+	.8byte	.LVL110
+	.8byte	.LVL123
 	.2byte	0x1
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+	.byte	0x67
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+	.8byte	.LFE255
 	.2byte	0x1
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 	.8byte	0
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-	.8byte	.LVL178
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-	.byte	0x9f
-	.8byte	.LVL205
-	.8byte	.LVL214
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.8byte	.LVL214
-	.8byte	.LVL218
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL218
-	.8byte	.LVL254
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.8byte	.LVL256
-	.8byte	.LVL272
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.8byte	.LVL272
-	.8byte	.LVL274
+.LLST33:
+	.8byte	.LVL109
+	.8byte	.LVL122
 	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL274
-	.8byte	.LVL279
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.8byte	.LVL279
-	.8byte	.LVL296
+	.byte	0x65
+	.8byte	.LVL124
+	.8byte	.LFE255
 	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL296
-	.8byte	.LVL303
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
+	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST67:
-	.8byte	.LVL178
-	.8byte	.LVL200
-	.2byte	0x2
-	.byte	0x30
+.LLST34:
+	.8byte	.LVL111
+	.8byte	.LVL112
+	.2byte	0x9
+	.byte	0x70
+	.sleb128 0
+	.byte	0x85
+	.sleb128 0
+	.byte	0x1d
+	.byte	0x83
+	.sleb128 0
+	.byte	0x22
 	.byte	0x9f
-	.8byte	.LVL200
-	.8byte	.LVL201
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL201
-	.8byte	.LVL203
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL205
-	.8byte	.LVL206
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL206
-	.8byte	.LVL209
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL209
-	.8byte	.LVL211
+	.8byte	0
+	.8byte	0
+.LLST35:
+	.8byte	.LVL115
+	.8byte	.LVL116
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL211
-	.8byte	.LVL218
+	.8byte	.LVL116
+	.8byte	.LVL120
 	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL218
-	.8byte	.LVL219
+	.byte	0x6a
+	.8byte	.LVL124
+	.8byte	.LVL126
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL219
-	.8byte	.LVL223
+	.byte	0x6a
+	.8byte	.LVL127
+	.8byte	.LFE255
 	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL223
-	.8byte	.LVL229
+	.byte	0x6a
+	.8byte	0
+	.8byte	0
+.LLST36:
+	.8byte	.LVL103
+	.8byte	.LVL118
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL229
-	.8byte	.LVL230
+	.8byte	.LVL118
+	.8byte	.LVL119
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL230
-	.8byte	.LVL232
+	.8byte	.LVL119
+	.8byte	.LVL120
 	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL232
-	.8byte	.LVL233
+	.byte	0x64
+	.8byte	.LVL124
+	.8byte	.LVL125-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL233
-	.8byte	.LVL235
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL235
-	.8byte	.LVL236
+	.8byte	.LVL125-1
+	.8byte	.LVL126
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL236
-	.8byte	.LVL238
+	.byte	0x64
+	.8byte	.LVL127
+	.8byte	.LFE255
 	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL238
-	.8byte	.LVL239
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST8:
+	.8byte	.LVL33
+	.8byte	.LVL34
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL239
-	.8byte	.LVL242
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL242
-	.8byte	.LVL243
-	.2byte	0x1
+	.8byte	.LVL34
+	.8byte	.LFE254
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
 	.byte	0x50
-	.8byte	.LVL243
-	.8byte	.LVL244-1
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL244-1
-	.8byte	.LVL245
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 212
-	.8byte	.LVL245
-	.8byte	.LVL246
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST7:
+	.8byte	.LVL31
+	.8byte	.LVL32
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL246
-	.8byte	.LVL248
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL248
-	.8byte	.LVL249-1
-	.2byte	0x1
+	.8byte	.LVL32
+	.8byte	.LFE253
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
 	.byte	0x50
-	.8byte	.LVL249-1
-	.8byte	.LVL250
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL250
-	.8byte	.LVL252
-	.2byte	0x2
-	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL252
-	.8byte	.LVL256
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL256
-	.8byte	.LVL260
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL260
-	.8byte	.LVL263
+	.8byte	0
+	.8byte	0
+.LLST0:
+	.8byte	.LVL0
+	.8byte	.LVL1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL263
-	.8byte	.LVL264
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL264
-	.8byte	.LVL267
+	.8byte	.LVL1
+	.8byte	.LVL12
 	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL12
+	.8byte	.LVL13
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
 	.byte	0x50
-	.8byte	.LVL267
-	.8byte	.LVL268
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL268
-	.8byte	.LVL273
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL274
-	.8byte	.LVL279
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL279
-	.8byte	.LVL282
-	.2byte	0x2
-	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL282
-	.8byte	.LVL284
+	.8byte	.LVL13
+	.8byte	.LFE200
 	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL284
-	.8byte	.LVL287
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL287
-	.8byte	.LVL288-1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST1:
+	.8byte	.LVL0
+	.8byte	.LVL2-1
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL288-1
-	.8byte	.LVL292
+	.byte	0x51
+	.8byte	.LVL2-1
+	.8byte	.LVL12
 	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL292
-	.8byte	.LVL295
-	.2byte	0x2
-	.byte	0x30
+	.byte	0x68
+	.8byte	.LVL12
+	.8byte	.LVL13
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL295
-	.8byte	.LVL296
+	.8byte	.LVL13
+	.8byte	.LFE200
 	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL296
-	.8byte	.LVL301
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST2:
+	.8byte	.LVL2
+	.8byte	.LVL3
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL301
-	.8byte	.LVL302
+	.8byte	.LVL3
+	.8byte	.LVL11
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL302
-	.8byte	.LVL303-1
+	.byte	0x64
+	.8byte	.LVL13
+	.8byte	.LVL22
 	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL303-1
-	.8byte	.LVL303
+	.byte	0x64
+	.8byte	.LVL23
+	.8byte	.LFE200
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST68:
-	.8byte	.LVL178
-	.8byte	.LVL203
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL205
-	.8byte	.LVL252
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL252
-	.8byte	.LVL253
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL256
-	.8byte	.LVL282
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL282
-	.8byte	.LVL283
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL284
-	.8byte	.LVL303
+.LLST3:
+	.8byte	.LVL24
+	.8byte	.LVL25
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST69:
-	.8byte	.LVL222
-	.8byte	.LVL254
+.LLST4:
+	.8byte	.LVL4
+	.8byte	.LVL11
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL260
-	.8byte	.LVL268
+	.8byte	.LVL13
+	.8byte	.LVL21
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	0
-	.8byte	0
-.LLST70:
-	.8byte	.LVL178
-	.8byte	.LVL185
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL189
-	.8byte	.LVL195
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST71:
-	.8byte	.LVL178
-	.8byte	.LVL185
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL189
-	.8byte	.LVL195
+	.8byte	.LVL22
+	.8byte	.LFE200
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST72:
-	.8byte	.LVL178
-	.8byte	.LVL179
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL179
-	.8byte	.LVL180
+.LLST5:
+	.8byte	.LVL3
+	.8byte	.LVL4
 	.2byte	0x3
-	.byte	0x70
-	.sleb128 1
+	.byte	0x9
+	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL181
-	.8byte	.LVL182
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL184
-	.8byte	.LVL185
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL189
-	.8byte	.LVL190
+	.8byte	.LVL4
+	.8byte	.LVL5
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL190
-	.8byte	.LVL191
-	.2byte	0x3
-	.byte	0x70
-	.sleb128 1
+	.byte	0x6c
+	.8byte	.LVL5
+	.8byte	.LVL6
+	.2byte	0x4
+	.byte	0x8c
+	.sleb128 0
+	.byte	0x20
 	.byte	0x9f
-	.8byte	.LVL192
-	.8byte	.LVL193
+	.8byte	.LVL6
+	.8byte	.LVL11
 	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL193
-	.8byte	.LVL194
-	.2byte	0x3
-	.byte	0x87
-	.sleb128 1
-	.byte	0x9f
+	.byte	0x6c
+	.8byte	.LVL13
+	.8byte	.LVL22
+	.2byte	0x1
+	.byte	0x6c
 	.8byte	0
 	.8byte	0
-.LLST73:
-	.8byte	.LVL178
-	.8byte	.LVL185
+.LLST6:
+	.8byte	.LVL18
+	.8byte	.LVL19
 	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL189
-	.8byte	.LVL195
+	.byte	0x50
+	.8byte	.LVL19
+	.8byte	.LFE200
 	.2byte	0x1
-	.byte	0x68
+	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST74:
-	.8byte	.LVL210
-	.8byte	.LVL212
-	.2byte	0x2
-	.byte	0x32
-	.byte	0x9f
-	.8byte	.LVL212
-	.8byte	.LVL213
-	.2byte	0x2
-	.byte	0x33
-	.byte	0x9f
-	.8byte	.LVL213
-	.8byte	.LVL214
-	.2byte	0x2
-	.byte	0x34
-	.byte	0x9f
-	.8byte	.LVL268
-	.8byte	.LVL269
-	.2byte	0x2
-	.byte	0x34
-	.byte	0x9f
-	.8byte	.LVL269
-	.8byte	.LVL270
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL270
-	.8byte	.LVL271
-	.2byte	0x3
-	.byte	0x71
-	.sleb128 1
-	.byte	0x9f
-	.8byte	.LVL275
-	.8byte	.LVL276
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.8byte	.LVL276
-	.8byte	.LVL277
-	.2byte	0x2
-	.byte	0x32
-	.byte	0x9f
-	.8byte	.LVL277
-	.8byte	.LVL278
-	.2byte	0x2
-	.byte	0x33
-	.byte	0x9f
-	.8byte	.LVL278
-	.8byte	.LVL279
+	.section	.debug_aranges,"",@progbits
+	.4byte	0x8c
 	.2byte	0x2
-	.byte	0x34
-	.byte	0x9f
+	.4byte	.Ldebug_info0
+	.byte	0x8
+	.byte	0
+	.2byte	0
+	.2byte	0
+	.8byte	.LFB200
+	.8byte	.LFE200-.LFB200
+	.8byte	.LFB253
+	.8byte	.LFE253-.LFB253
+	.8byte	.LFB254
+	.8byte	.LFE254-.LFB254
+	.8byte	.LFB268
+	.8byte	.LFE268-.LFB268
+	.8byte	.LFB271
+	.8byte	.LFE271-.LFB271
+	.8byte	.LFB255
+	.8byte	.LFE255-.LFB255
+	.8byte	.LFB256
+	.8byte	.LFE256-.LFB256
 	.8byte	0
 	.8byte	0
-.LLST75:
-	.8byte	.LVL269
-	.8byte	.LVL272
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL274
-	.8byte	.LVL279
-	.2byte	0x1
-	.byte	0x68
+	.section	.debug_ranges,"",@progbits
+.Ldebug_ranges0:
+	.8byte	.LBB6
+	.8byte	.LBE6
+	.8byte	.LBB12
+	.8byte	.LBE12
+	.8byte	.LBB13
+	.8byte	.LBE13
+	.8byte	.LBB14
+	.8byte	.LBE14
+	.8byte	.LBB18
+	.8byte	.LBE18
 	.8byte	0
 	.8byte	0
-.LLST1:
-	.8byte	.LVL9
-	.8byte	.LVL10
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL10
-	.8byte	.LVL15
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL15
-	.8byte	.LVL16
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL16
-	.8byte	.LFE257
-	.2byte	0x1
-	.byte	0x64
+	.8byte	.LBB15
+	.8byte	.LBE15
+	.8byte	.LBB19
+	.8byte	.LBE19
 	.8byte	0
 	.8byte	0
-.LLST2:
-	.8byte	.LVL11
-	.8byte	.LVL12
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL12
-	.8byte	.LVL13
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL16
-	.8byte	.LVL17
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL19
-	.8byte	.LVL20
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL20
-	.8byte	.LFE257
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST0:
-	.8byte	.LVL0
-	.8byte	.LVL1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1
-	.8byte	.LVL2-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL2
-	.8byte	.LVL3-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL5
-	.8byte	.LVL6
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL6
-	.8byte	.LVL7-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL7-1
-	.8byte	.LVL8
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST17:
-	.8byte	.LVL65
-	.8byte	.LVL66
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL66
-	.8byte	.LVL69
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL69
-	.8byte	.LVL70
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL70
-	.8byte	.LVL88
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL91
-	.8byte	.LFE255
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST18:
-	.8byte	.LVL65
-	.8byte	.LVL68
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL68
-	.8byte	.LVL72
-	.2byte	0x1
-	.byte	0x51
-	.8byte	0
-	.8byte	0
-.LLST19:
-	.8byte	.LVL65
-	.8byte	.LVL72
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL72
-	.8byte	.LVL90
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL90
-	.8byte	.LVL91
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.8byte	.LVL91
-	.8byte	.LFE255
-	.2byte	0x1
-	.byte	0x68
-	.8byte	0
-	.8byte	0
-.LLST20:
-	.8byte	.LVL71
-	.8byte	.LVL72
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL72
-	.8byte	.LVL89
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL91
-	.8byte	.LFE255
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST21:
-	.8byte	.LVL71
-	.8byte	.LVL88
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL91
-	.8byte	.LFE255
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST22:
-	.8byte	.LVL73
-	.8byte	.LVL74
-	.2byte	0x9
-	.byte	0x70
-	.sleb128 0
-	.byte	0x83
-	.sleb128 0
-	.byte	0x1d
-	.byte	0x84
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST23:
-	.8byte	.LVL76
-	.8byte	.LVL77
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL77
-	.8byte	.LVL78-1
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL81
-	.8byte	.LVL82
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL82
-	.8byte	.LVL83-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	0
-	.8byte	0
-.LLST24:
-	.8byte	.LVL65
-	.8byte	.LVL85
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL85
-	.8byte	.LVL86
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL86
-	.8byte	.LVL87
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL91
-	.8byte	.LVL92-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL92-1
-	.8byte	.LVL93
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL94
-	.8byte	.LFE255
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	0
-	.8byte	0
-.LLST42:
-	.8byte	.LVL121
-	.8byte	.LVL122
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL122
-	.8byte	.LVL133
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL133
-	.8byte	.LVL136
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL136
-	.8byte	.LFE200
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST43:
-	.8byte	.LVL121
-	.8byte	.LVL123-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL123-1
-	.8byte	.LVL134
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL134
-	.8byte	.LVL136
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	.LVL136
-	.8byte	.LFE200
-	.2byte	0x1
-	.byte	0x67
-	.8byte	0
-	.8byte	0
-.LLST44:
-	.8byte	.LVL123
-	.8byte	.LVL124
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL124
-	.8byte	.LVL132
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL136
-	.8byte	.LVL145
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL146
-	.8byte	.LFE200
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST45:
-	.8byte	.LVL127
-	.8byte	.LVL128
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL147
-	.8byte	.LVL148
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST46:
-	.8byte	.LVL125
-	.8byte	.LVL132
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL136
-	.8byte	.LVL144
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL145
-	.8byte	.LFE200
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST47:
-	.8byte	.LVL124
-	.8byte	.LVL125
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL125
-	.8byte	.LVL126
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL126
-	.8byte	.LVL127
-	.2byte	0x4
-	.byte	0x8c
-	.sleb128 0
-	.byte	0x20
-	.byte	0x9f
-	.8byte	.LVL127
-	.8byte	.LVL135
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL136
-	.8byte	.LFE200
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	0
-	.8byte	0
-.LLST48:
-	.8byte	.LVL141
-	.8byte	.LVL142
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL142
-	.8byte	.LFE200
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-	.section	.debug_aranges,"",@progbits
-	.4byte	0xcc
-	.2byte	0x2
-	.4byte	.Ldebug_info0
-	.byte	0x8
-	.byte	0
-	.2byte	0
-	.2byte	0
-	.8byte	.LFB256
-	.8byte	.LFE256-.LFB256
-	.8byte	.LFB257
-	.8byte	.LFE257-.LFB257
-	.8byte	.LFB274
-	.8byte	.LFE274-.LFB274
-	.8byte	.LFB255
-	.8byte	.LFE255-.LFB255
-	.8byte	.LFB275
-	.8byte	.LFE275-.LFB275
-	.8byte	.LFB276
-	.8byte	.LFE276-.LFB276
-	.8byte	.LFB277
-	.8byte	.LFE277-.LFB277
-	.8byte	.LFB200
-	.8byte	.LFE200-.LFB200
-	.8byte	.LFB271
-	.8byte	.LFE271-.LFB271
-	.8byte	.LFB258
-	.8byte	.LFE258-.LFB258
-	.8byte	.LFB278
-	.8byte	.LFE278-.LFB278
-	.8byte	0
-	.8byte	0
-	.section	.debug_ranges,"",@progbits
-.Ldebug_ranges0:
-	.8byte	.LBB12
-	.8byte	.LBE12
-	.8byte	.LBB18
-	.8byte	.LBE18
-	.8byte	.LBB19
-	.8byte	.LBE19
-	.8byte	.LBB20
-	.8byte	.LBE20
-	.8byte	.LBB24
-	.8byte	.LBE24
-	.8byte	0
-	.8byte	0
-	.8byte	.LBB21
-	.8byte	.LBE21
-	.8byte	.LBB25
-	.8byte	.LBE25
-	.8byte	0
-	.8byte	0
-	.8byte	.LBB29
-	.8byte	.LBE29
-	.8byte	.LBB34
-	.8byte	.LBE34
-	.8byte	.LBB35
-	.8byte	.LBE35
-	.8byte	0
-	.8byte	0
-	.8byte	.LBB40
-	.8byte	.LBE40
-	.8byte	.LBB48
-	.8byte	.LBE48
-	.8byte	.LBB49
-	.8byte	.LBE49
-	.8byte	.LBB50
-	.8byte	.LBE50
-	.8byte	.LBB51
-	.8byte	.LBE51
-	.8byte	.LBB52
-	.8byte	.LBE52
-	.8byte	.LBB53
-	.8byte	.LBE53
-	.8byte	0
-	.8byte	0
-	.8byte	.LBB54
-	.8byte	.LBE54
-	.8byte	.LBB58
-	.8byte	.LBE58
-	.8byte	.LBB59
-	.8byte	.LBE59
-	.8byte	0
-	.8byte	0
-	.8byte	.LFB256
-	.8byte	.LFE256
-	.8byte	.LFB257
-	.8byte	.LFE257
-	.8byte	.LFB274
-	.8byte	.LFE274
-	.8byte	.LFB255
-	.8byte	.LFE255
-	.8byte	.LFB275
-	.8byte	.LFE275
-	.8byte	.LFB276
-	.8byte	.LFE276
-	.8byte	.LFB277
-	.8byte	.LFE277
-	.8byte	.LFB200
-	.8byte	.LFE200
-	.8byte	.LFB271
-	.8byte	.LFE271
-	.8byte	.LFB258
-	.8byte	.LFE258
-	.8byte	.LFB278
-	.8byte	.LFE278
+	.8byte	.LFB200
+	.8byte	.LFE200
+	.8byte	.LFB253
+	.8byte	.LFE253
+	.8byte	.LFB254
+	.8byte	.LFE254
+	.8byte	.LFB268
+	.8byte	.LFE268
+	.8byte	.LFB271
+	.8byte	.LFE271
+	.8byte	.LFB255
+	.8byte	.LFE255
+	.8byte	.LFB256
+	.8byte	.LFE256
 	.8byte	0
 	.8byte	0
 	.section	.debug_line,"",@progbits
 .Ldebug_line0:
 	.section	.debug_str,"MS",@progbits,1
-.LASF416:
-	.string	"test_pattern"
-.LASF399:
-	.string	"puts"
-.LASF64:
-	.string	"reserved"
-.LASF470:
+.LASF30:
+	.string	"parent_platdata"
+.LASF109:
+	.string	"off_mem_rsvmap"
+.LASF193:
+	.string	"UCLASS_I2C_EEPROM"
+.LASF481:
+	.string	"jt_funcs"
+.LASF198:
+	.string	"UCLASS_IRQ"
+.LASF159:
+	.string	"initrd_start"
+.LASF192:
+	.string	"UCLASS_I2C"
+.LASF13:
+	.string	"sizetype"
+.LASF335:
+	.string	"net_hostname"
+.LASF330:
+	.string	"push_packet"
+.LASF54:
+	.string	"start"
+.LASF231:
+	.string	"UCLASS_SPI"
+.LASF309:
+	.string	"child"
+.LASF196:
+	.string	"UCLASS_I2S"
+.LASF356:
+	.string	"NETLOOP_RESTART"
+.LASF194:
+	.string	"UCLASS_I2C_GENERIC"
+.LASF206:
+	.string	"UCLASS_MOD_EXP"
+.LASF253:
+	.string	"UCLASS_IO_DOMAIN"
+.LASF266:
+	.string	"using_pre_serial"
+.LASF37:
+	.string	"uclass_priv"
+.LASF226:
+	.string	"UCLASS_RKNAND"
+.LASF170:
+	.string	"UCLASS_DEMO"
+.LASF379:
+	.string	"g_isi_pattern"
+.LASF117:
+	.string	"ih_magic"
+.LASF46:
+	.string	"list_head"
+.LASF425:
+	.string	"err_addr"
+.LASF370:
+	.string	"child_pre_probe"
+.LASF302:
+	.string	"pm_ctx_phys"
+.LASF174:
+	.string	"UCLASS_TEST_PROBE"
+.LASF307:
+	.string	"full_name"
+.LASF249:
+	.string	"UCLASS_KEY"
+.LASF80:
+	.string	"bi_intfreq"
+.LASF460:
 	.string	"__func__"
+.LASF11:
+	.string	"phys_addr_t"
+.LASF244:
+	.string	"UCLASS_VIDEO_BRIDGE"
+.LASF301:
+	.string	"video_bottom"
+.LASF457:
+	.string	"set_ddr_freq"
+.LASF5:
+	.string	"__u8"
+.LASF355:
+	.string	"NETLOOP_CONTINUE"
+.LASF234:
+	.string	"UCLASS_SPI_GENERIC"
+.LASF296:
+	.string	"malloc_base"
 .LASF464:
-	.string	"target_freq"
-.LASF138:
-	.string	"bootm_headers"
-.LASF227:
-	.string	"UCLASS_RAMDISK"
-.LASF156:
-	.string	"rd_end"
-.LASF318:
-	.string	"eth_device"
-.LASF452:
-	.string	"test_banks"
-.LASF127:
-	.string	"ih_comp"
-.LASF23:
-	.string	"_Bool"
-.LASF334:
-	.string	"net_root_path"
+	.string	"get_page_size"
+.LASF56:
+	.string	"flash_info_t"
+.LASF210:
+	.string	"UCLASS_PANEL"
+.LASF134:
+	.string	"comp"
+.LASF129:
+	.string	"image_header_t"
+.LASF164:
+	.string	"state"
+.LASF186:
+	.string	"UCLASS_CROS_EC"
+.LASF74:
+	.string	"bi_dsp_freq"
+.LASF131:
+	.string	"image_start"
 .LASF445:
-	.string	"cmdtp"
-.LASF365:
-	.string	"unbind"
-.LASF145:
-	.string	"fit_noffset_os"
+	.string	"fast_test_bank"
+.LASF172:
+	.string	"UCLASS_TEST_FDT"
+.LASF430:
+	.string	"diagonalscan"
+.LASF65:
+	.string	"bd_info"
+.LASF168:
+	.string	"uclass_id"
+.LASF121:
+	.string	"ih_load"
+.LASF314:
+	.string	"__dtb_dt_spl_begin"
+.LASF394:
+	.string	"pre_remove"
+.LASF427:
+	.string	"random_test1"
+.LASF426:
+	.string	"random_test2"
+.LASF7:
+	.string	"__u32"
 .LASF35:
 	.string	"priv"
-.LASF486:
-	.ascii	"GNU C11 6.3.1 20170404 -ms"
-	.string	"trict-align -march=armv8-a+nosimd -mlittle-endian -mabi=lp64 -g -Os -fno-builtin -ffreestanding -fshort-wchar -fno-stack-protector -fno-delete-null-pointer-checks -fstack-usage -fno-pic -ffunction-sections -fdata-sections -ffixed-r9 -fno-common -ffixed-x18"
-.LASF22:
-	.string	"___strtok"
-.LASF234:
-	.string	"UCLASS_SPI_GENERIC"
-.LASF431:
-	.string	"capacity"
-.LASF279:
-	.string	"ram_size"
-.LASF332:
-	.string	"net_nis_domain"
-.LASF438:
-	.string	"diagonalscan"
-.LASF36:
-	.string	"uclass"
+.LASF299:
+	.string	"cur_serial_dev"
+.LASF469:
+	.string	"strcasecmp"
+.LASF143:
+	.string	"fit_hdr_os"
+.LASF341:
+	.string	"net_tx_packet"
+.LASF248:
+	.string	"UCLASS_FG"
+.LASF340:
+	.string	"net_server_ip"
+.LASF482:
+	.string	"ofnode_union"
+.LASF348:
+	.string	"net_native_vlan"
+.LASF246:
+	.string	"UCLASS_VIDEO_CRTC"
 .LASF185:
 	.string	"UCLASS_CODEC"
-.LASF47:
-	.string	"next"
-.LASF375:
-	.string	"length"
-.LASF381:
-	.string	"uc_drv"
-.LASF181:
-	.string	"UCLASS_AHCI"
-.LASF195:
-	.string	"UCLASS_I2C_MUX"
-.LASF168:
-	.string	"uclass_id"
-.LASF491:
-	.string	"cpu_2_io"
-.LASF330:
-	.string	"net_netmask"
-.LASF101:
-	.string	"CMD_RET_FAILURE"
-.LASF148:
-	.string	"fit_noffset_rd"
-.LASF228:
-	.string	"UCLASS_RTC"
-.LASF67:
-	.string	"bi_memsize"
-.LASF68:
-	.string	"bi_flashstart"
-.LASF369:
-	.string	"child_post_remove"
-.LASF323:
-	.string	"recv"
-.LASF153:
-	.string	"fit_uname_setup"
-.LASF481:
-	.string	"rockchip_ddrclk_sip_round_rate_v2"
-.LASF235:
-	.string	"UCLASS_SYSCON"
-.LASF187:
-	.string	"UCLASS_DISPLAY"
-.LASF268:
-	.string	"global_data"
-.LASF92:
-	.string	"IRQ_STACK_START_IN"
-.LASF84:
-	.string	"bi_dram"
-.LASF226:
-	.string	"UCLASS_RKNAND"
-.LASF297:
-	.string	"malloc_ptr"
-.LASF193:
-	.string	"UCLASS_I2C_EEPROM"
-.LASF177:
-	.string	"UCLASS_PCI_EMUL"
-.LASF417:
-	.string	"test_pat_param"
-.LASF103:
-	.string	"fdt_header"
-.LASF292:
-	.string	"env_buf"
-.LASF418:
-	.string	"_u_boot_list_2_cmd_2_ddr_test"
-.LASF106:
-	.string	"off_dt_struct"
-.LASF405:
-	.string	"console_devices"
-.LASF353:
-	.string	"NETLOOP_CONTINUE"
-.LASF231:
-	.string	"UCLASS_SPI"
-.LASF473:
-	.string	"memcpy"
-.LASF245:
-	.string	"UCLASS_VIDEO_CONSOLE"
+.LASF478:
+	.ascii	"GNU C11 6.3.1 20170404 -ms"
+	.string	"trict-align -march=armv8-a+nosimd -mlittle-endian -mabi=lp64 -g -Os -fno-builtin -ffreestanding -fshort-wchar -fno-stack-protector -fno-delete-null-pointer-checks -fstack-usage -fno-pic -ffunction-sections -fdata-sections -ffixed-r9 -fno-common -ffixed-x18"
+.LASF293:
+	.string	"env_buf"
+.LASF21:
+	.string	"errno"
+.LASF15:
+	.string	"long int"
+.LASF69:
+	.string	"bi_flashsize"
+.LASF401:
+	.string	"putc"
+.LASF29:
+	.string	"platdata"
+.LASF215:
+	.string	"UCLASS_PHY"
+.LASF92:
+	.string	"IRQ_STACK_START_IN"
+.LASF113:
+	.string	"size_dt_strings"
 .LASF243:
 	.string	"UCLASS_VIDEO"
-.LASF357:
-	.string	"net_state"
-.LASF487:
-	.string	"cmd/ddr_tool/ddr_test_code.c"
-.LASF287:
-	.string	"uclass_root"
-.LASF86:
-	.string	"IRQ_STACK_START"
-.LASF163:
-	.string	"verify"
-.LASF354:
-	.string	"NETLOOP_RESTART"
-.LASF453:
-	.string	"abort"
-.LASF406:
-	.string	"cd_count"
-.LASF371:
-	.string	"platdata_auto_alloc_size"
-.LASF317:
-	.string	"s_addr"
-.LASF450:
-	.string	"err_case"
-.LASF167:
-	.string	"command_ret_t"
-.LASF236:
-	.string	"UCLASS_SYSRESET"
+.LASF402:
+	.string	"puts"
+.LASF475:
+	.string	"rand"
+.LASF279:
+	.string	"relocaddr"
+.LASF385:
+	.string	"dev_head"
+.LASF351:
+	.string	"net_boot_file_size"
+.LASF407:
+	.string	"stdio_names"
+.LASF123:
+	.string	"ih_dcrc"
+.LASF79:
+	.string	"bi_ethspeed"
 .LASF169:
 	.string	"UCLASS_ROOT"
-.LASF301:
-	.string	"pm_ctx_phys"
-.LASF186:
-	.string	"UCLASS_CROS_EC"
-.LASF463:
-	.string	"delta_freq"
-.LASF326:
-	.string	"index"
-.LASF458:
-	.string	"freq"
-.LASF94:
-	.string	"maxargs"
-.LASF121:
-	.string	"ih_load"
-.LASF249:
-	.string	"UCLASS_KEY"
-.LASF408:
-	.string	"SCANFREQ"
-.LASF88:
-	.string	"_datarel_start_ofs"
-.LASF271:
-	.string	"pci_clk"
-.LASF180:
-	.string	"UCLASS_ADC"
-.LASF366:
-	.string	"ofdata_to_platdata"
+.LASF44:
+	.string	"ide_bus_offset"
+.LASF419:
+	.string	"test_pat_param"
+.LASF338:
+	.string	"net_server_ethaddr"
+.LASF82:
+	.string	"bi_arch_number"
+.LASF3:
+	.string	"signed char"
+.LASF199:
+	.string	"UCLASS_KEYBOARD"
+.LASF18:
+	.string	"uint8_t"
+.LASF375:
+	.string	"per_child_platdata_auto_alloc_size"
+.LASF45:
+	.string	"udevice"
+.LASF467:
+	.string	"cmp_buf_data"
 .LASF125:
 	.string	"ih_arch"
-.LASF309:
-	.string	"gd_t"
-.LASF198:
-	.string	"UCLASS_IRQ"
-.LASF5:
-	.string	"__u8"
-.LASF329:
-	.string	"net_gateway"
-.LASF351:
-	.string	"net_ping_ip"
-.LASF135:
-	.string	"type"
-.LASF465:
-	.string	"get_test_addr"
-.LASF61:
-	.string	"lmb_region"
-.LASF423:
-	.string	"wr_val"
-.LASF55:
-	.string	"protect"
-.LASF260:
-	.string	"tlb_addr"
-.LASF426:
-	.string	"print_memory"
-.LASF439:
-	.string	"next_adr"
-.LASF39:
-	.string	"uclass_node"
-.LASF171:
-	.string	"UCLASS_TEST"
-.LASF350:
-	.string	"net_boot_file_expected_size_in_blocks"
-.LASF24:
-	.string	"image_base"
-.LASF141:
-	.string	"legacy_hdr_valid"
+.LASF106:
+	.string	"totalsize"
+.LASF446:
+	.string	"abort"
+.LASF118:
+	.string	"ih_hcrc"
+.LASF281:
+	.string	"mon_len"
+.LASF133:
+	.string	"load"
 .LASF239:
 	.string	"UCLASS_TPM"
-.LASF100:
-	.string	"CMD_RET_SUCCESS"
-.LASF397:
-	.string	"stop"
-.LASF204:
-	.string	"UCLASS_MISC"
-.LASF52:
-	.string	"sector_count"
-.LASF263:
-	.string	"tlb_emerg"
-.LASF434:
-	.string	"err_addr"
-.LASF93:
-	.string	"cmd_tbl_s"
-.LASF99:
-	.string	"cmd_tbl_t"
-.LASF266:
-	.string	"baudrate"
-.LASF358:
-	.string	"mem_malloc_start"
-.LASF246:
-	.string	"UCLASS_VIDEO_CRTC"
-.LASF79:
-	.string	"bi_ethspeed"
-.LASF129:
-	.string	"image_header_t"
-.LASF382:
-	.string	"dev_head"
-.LASF11:
-	.string	"phys_addr_t"
-.LASF126:
-	.string	"ih_type"
+.LASF428:
+	.string	"cmp_value"
+.LASF59:
+	.string	"lmb_property"
+.LASF111:
+	.string	"last_comp_version"
 .LASF0:
 	.string	"unsigned char"
-.LASF409:
+.LASF392:
+	.string	"pre_probe"
+.LASF453:
+	.string	"delta_freq"
+.LASF412:
 	.string	"RANDOM"
-.LASF140:
-	.string	"legacy_hdr_os_copy"
-.LASF477:
-	.string	"uclass_get_device"
-.LASF211:
-	.string	"UCLASS_PANEL_BACKLIGHT"
-.LASF270:
-	.string	"bus_clk"
-.LASF173:
-	.string	"UCLASS_TEST_BUS"
-.LASF73:
-	.string	"bi_arm_freq"
+.LASF166:
+	.string	"images"
+.LASF252:
+	.string	"UCLASS_DVFS"
+.LASF75:
+	.string	"bi_ddr_freq"
 .LASF200:
 	.string	"UCLASS_LED"
-.LASF379:
+.LASF120:
+	.string	"ih_size"
+.LASF39:
+	.string	"uclass_node"
+.LASF23:
+	.string	"_Bool"
+.LASF376:
+	.string	"property"
+.LASF359:
+	.string	"net_state"
+.LASF378:
+	.string	"value"
+.LASF195:
+	.string	"UCLASS_I2C_MUX"
+.LASF14:
+	.string	"char"
+.LASF25:
+	.string	"_binary_u_boot_bin_start"
+.LASF418:
+	.string	"test_pattern"
+.LASF357:
+	.string	"NETLOOP_SUCCESS"
+.LASF36:
+	.string	"uclass"
+.LASF382:
 	.string	"p_current"
-.LASF342:
-	.string	"net_rx_packet_len"
-.LASF344:
-	.string	"net_null_ethaddr"
-.LASF53:
-	.string	"flash_id"
-.LASF313:
-	.string	"load_addr"
-.LASF424:
-	.string	"reread"
+.LASF384:
+	.string	"uc_drv"
+.LASF354:
+	.string	"net_loop_state"
+.LASF43:
+	.string	"req_seq"
+.LASF310:
+	.string	"sibling"
+.LASF287:
+	.string	"dm_root_f"
 .LASF321:
-	.string	"init"
-.LASF251:
-	.string	"UCLASS_CHARGE_DISPLAY"
+	.string	"enetaddr"
+.LASF221:
+	.string	"UCLASS_PWRSEQ"
+.LASF452:
+	.string	"times"
+.LASF454:
+	.string	"target_freq"
+.LASF380:
+	.string	"of_offset"
+.LASF149:
+	.string	"fit_hdr_fdt"
+.LASF349:
+	.string	"net_restart_wrap"
+.LASF404:
+	.string	"getc"
+.LASF337:
+	.string	"net_ethaddr"
+.LASF42:
+	.string	"flags"
 .LASF437:
-	.string	"cmp_value"
-.LASF178:
-	.string	"UCLASS_USB_EMUL"
-.LASF363:
-	.string	"probe"
-.LASF378:
-	.string	"ofnode"
-.LASF269:
+	.string	"cmdtp"
+.LASF126:
+	.string	"ih_type"
+.LASF107:
+	.string	"off_dt_struct"
+.LASF458:
+	.string	"crosstalk"
+.LASF70:
+	.string	"bi_flashoffset"
+.LASF350:
+	.string	"net_boot_file_name"
+.LASF387:
+	.string	"compatible"
+.LASF171:
+	.string	"UCLASS_TEST"
+.LASF119:
+	.string	"ih_time"
+.LASF274:
+	.string	"fb_base"
+.LASF271:
+	.string	"bus_clk"
+.LASF222:
+	.string	"UCLASS_RAM"
+.LASF189:
+	.string	"UCLASS_ETH"
+.LASF32:
+	.string	"node"
+.LASF130:
+	.string	"image_info"
+.LASF408:
+	.string	"console_devices"
+.LASF136:
+	.string	"arch"
+.LASF273:
+	.string	"mem_clk"
+.LASF476:
+	.string	"write_buf_to_ddr"
+.LASF270:
 	.string	"cpu_clk"
-.LASF308:
-	.string	"sibling"
-.LASF265:
-	.string	"using_pre_serial"
-.LASF217:
-	.string	"UCLASS_PINCTRL"
-.LASF115:
-	.string	"fdt32_t"
-.LASF376:
-	.string	"value"
-.LASF247:
-	.string	"UCLASS_WDT"
-.LASF440:
-	.string	"page_size"
-.LASF132:
-	.string	"image_len"
-.LASF280:
-	.string	"mon_len"
+.LASF50:
+	.string	"select_hwpart"
+.LASF342:
+	.string	"net_rx_packets"
+.LASF360:
+	.string	"mem_malloc_start"
+.LASF91:
+	.string	"_datarelro_start_ofs"
+.LASF17:
+	.string	"ulong"
+.LASF122:
+	.string	"ih_ep"
+.LASF61:
+	.string	"lmb_region"
+.LASF448:
+	.string	"do_ddr_test"
+.LASF462:
+	.string	"printf"
+.LASF144:
+	.string	"fit_uname_os"
+.LASF76:
+	.string	"bi_bootflags"
+.LASF339:
+	.string	"net_ip"
+.LASF291:
+	.string	"fdt_size"
+.LASF333:
+	.string	"net_dns_server"
+.LASF353:
+	.string	"net_ping_ip"
 .LASF63:
 	.string	"memory"
-.LASF492:
-	.string	"exit"
+.LASF104:
+	.string	"fdt_header"
+.LASF361:
+	.string	"mem_malloc_end"
+.LASF202:
+	.string	"UCLASS_MAILBOX"
+.LASF156:
+	.string	"rd_end"
+.LASF364:
+	.string	"bind"
+.LASF282:
+	.string	"irq_sp"
+.LASF161:
+	.string	"cmdline_start"
+.LASF328:
+	.string	"index"
+.LASF269:
+	.string	"global_data"
+.LASF400:
+	.string	"stop"
+.LASF396:
+	.string	"per_device_auto_alloc_size"
+.LASF472:
+	.string	"ctrlc"
+.LASF95:
+	.string	"repeatable"
+.LASF229:
+	.string	"UCLASS_SCSI"
 .LASF241:
 	.string	"UCLASS_USB_DEV_GENERIC"
-.LASF248:
-	.string	"UCLASS_FG"
-.LASF451:
-	.string	"test_times"
-.LASF373:
-	.string	"per_child_platdata_auto_alloc_size"
-.LASF469:
-	.string	"shift"
-.LASF21:
-	.string	"errno"
-.LASF51:
-	.string	"size"
-.LASF333:
-	.string	"net_hostname"
-.LASF31:
-	.string	"uclass_platdata"
-.LASF396:
-	.string	"stdio_dev"
-.LASF139:
-	.string	"legacy_hdr_os"
-.LASF131:
-	.string	"image_start"
-.LASF18:
-	.string	"uint8_t"
-.LASF76:
-	.string	"bi_bootflags"
-.LASF118:
-	.string	"ih_hcrc"
-.LASF392:
-	.string	"destroy"
-.LASF461:
-	.string	"max_freq"
-.LASF210:
-	.string	"UCLASS_PANEL"
-.LASF368:
-	.string	"child_pre_probe"
-.LASF257:
-	.string	"timer_rate_hz"
-.LASF33:
-	.string	"driver_data"
-.LASF427:
-	.string	"write_buf_to_ddr"
-.LASF383:
-	.string	"udevice_id"
-.LASF370:
-	.string	"priv_auto_alloc_size"
-.LASF240:
-	.string	"UCLASS_USB"
-.LASF172:
-	.string	"UCLASS_TEST_FDT"
-.LASF327:
-	.string	"eth_current"
-.LASF74:
-	.string	"bi_dsp_freq"
-.LASF4:
-	.string	"uchar"
-.LASF120:
-	.string	"ih_size"
-.LASF267:
-	.string	"addr"
-.LASF175:
-	.string	"UCLASS_SPI_EMUL"
-.LASF256:
-	.string	"arch_global_data"
-.LASF214:
-	.string	"UCLASS_PCI_GENERIC"
-.LASF71:
-	.string	"bi_sramstart"
-.LASF87:
-	.string	"FIQ_STACK_START"
-.LASF389:
-	.string	"pre_probe"
-.LASF319:
-	.string	"enetaddr"
-.LASF216:
-	.string	"UCLASS_PINCONFIG"
-.LASF421:
-	.string	"prt_en"
-.LASF225:
-	.string	"UCLASS_RESET"
-.LASF170:
-	.string	"UCLASS_DEMO"
-.LASF296:
-	.string	"malloc_limit"
-.LASF65:
-	.string	"bd_info"
-.LASF372:
-	.string	"per_child_auto_alloc_size"
-.LASF81:
-	.string	"bi_busfreq"
-.LASF281:
-	.string	"irq_sp"
-.LASF402:
-	.string	"list"
-.LASF182:
-	.string	"UCLASS_BLK"
-.LASF282:
+.LASF203:
+	.string	"UCLASS_MASS_STORAGE"
+.LASF1:
+	.string	"long unsigned int"
+.LASF179:
+	.string	"UCLASS_SIMPLE_BUS"
+.LASF455:
+	.string	"freq"
+.LASF311:
+	.string	"gd_t"
+.LASF334:
+	.string	"net_nis_domain"
+.LASF398:
+	.string	"console_buffer"
+.LASF151:
+	.string	"fit_noffset_fdt"
+.LASF432:
+	.string	"next_adr"
+.LASF423:
+	.string	"wr_value"
+.LASF459:
+	.string	"shift"
+.LASF358:
+	.string	"NETLOOP_FAIL"
+.LASF247:
+	.string	"UCLASS_WDT"
+.LASF260:
+	.string	"timer_reset_value"
+.LASF283:
 	.string	"start_addr_sp"
-.LASF337:
-	.string	"net_ip"
-.LASF475:
-	.string	"strict_strtoul"
-.LASF320:
-	.string	"iobase"
-.LASF123:
-	.string	"ih_dcrc"
-.LASF56:
-	.string	"flash_info_t"
-.LASF471:
-	.string	"printf"
-.LASF444:
-	.string	"os_reg"
-.LASF80:
-	.string	"bi_intfreq"
-.LASF314:
-	.string	"save_addr"
+.LASF71:
+	.string	"bi_sramstart"
+.LASF26:
+	.string	"_binary_u_boot_bin_end"
+.LASF284:
+	.string	"reloc_off"
+.LASF473:
+	.string	"judge_test_addr"
+.LASF112:
+	.string	"boot_cpuid_phys"
 .LASF259:
-	.string	"timer_reset_value"
-.LASF377:
-	.string	"of_offset"
-.LASF201:
-	.string	"UCLASS_LPC"
-.LASF70:
-	.string	"bi_flashoffset"
-.LASF300:
-	.string	"video_bottom"
-.LASF454:
-	.string	"scan_freq_loop"
-.LASF202:
-	.string	"UCLASS_MAILBOX"
-.LASF415:
-	.string	"g_isi_pattern"
-.LASF108:
-	.string	"off_mem_rsvmap"
-.LASF362:
-	.string	"bind"
-.LASF199:
-	.string	"UCLASS_KEYBOARD"
-.LASF206:
-	.string	"UCLASS_MOD_EXP"
-.LASF116:
-	.string	"image_header"
-.LASF110:
-	.string	"last_comp_version"
+	.string	"lastinc"
+.LASF263:
+	.string	"tlb_fillptr"
+.LASF456:
+	.string	"set_vdd_logic"
+.LASF147:
+	.string	"fit_uname_rd"
+.LASF235:
+	.string	"UCLASS_SYSCON"
+.LASF184:
+	.string	"UCLASS_CPU"
+.LASF142:
+	.string	"fit_uname_cfg"
+.LASF230:
+	.string	"UCLASS_SERIAL"
+.LASF347:
+	.string	"net_our_vlan"
+.LASF303:
+	.string	"serial"
+.LASF365:
+	.string	"probe"
+.LASF182:
+	.string	"UCLASS_BLK"
+.LASF137:
+	.string	"image_info_t"
+.LASF178:
+	.string	"UCLASS_USB_EMUL"
+.LASF439:
+	.string	"argc"
+.LASF261:
+	.string	"tlb_addr"
+.LASF214:
+	.string	"UCLASS_PCI_GENERIC"
+.LASF440:
+	.string	"argv"
+.LASF132:
+	.string	"image_len"
 .LASF77:
 	.string	"bi_ip_addr"
-.LASF414:
+.LASF216:
+	.string	"UCLASS_PINCONFIG"
+.LASF324:
+	.string	"send"
+.LASF237:
+	.string	"UCLASS_THERMAL"
+.LASF140:
+	.string	"legacy_hdr_os_copy"
+.LASF9:
+	.string	"long long int"
+.LASF417:
 	.string	"TESTCASSMAX"
-.LASF298:
-	.string	"cur_serial_dev"
-.LASF57:
-	.string	"flash_info"
-.LASF16:
-	.string	"ushort"
-.LASF395:
-	.string	"console_buffer"
-.LASF104:
-	.string	"magic"
-.LASF305:
-	.string	"full_name"
-.LASF472:
-	.string	"memset"
-.LASF331:
-	.string	"net_dns_server"
-.LASF482:
-	.string	"rockchip_ddrclk_sip_set_rate_v2"
-.LASF403:
-	.string	"stdio_devices"
-.LASF462:
-	.string	"times"
-.LASF355:
-	.string	"NETLOOP_SUCCESS"
-.LASF28:
-	.string	"name"
+.LASF443:
+	.string	"test_times"
+.LASF167:
+	.string	"command_ret_t"
+.LASF290:
+	.string	"new_fdt"
+.LASF22:
+	.string	"___strtok"
+.LASF352:
+	.string	"net_boot_file_expected_size_in_blocks"
+.LASF451:
+	.string	"max_freq"
+.LASF363:
+	.string	"of_match"
+.LASF209:
+	.string	"UCLASS_NVME"
 .LASF264:
-	.string	"pre_serial"
-.LASF90:
-	.string	"_datarellocal_start_ofs"
-.LASF96:
-	.string	"usage"
-.LASF152:
-	.string	"fit_hdr_setup"
-.LASF183:
-	.string	"UCLASS_CLK"
-.LASF41:
-	.string	"sibling_node"
-.LASF160:
-	.string	"initrd_end"
-.LASF310:
-	.string	"monitor_flash_len"
-.LASF398:
-	.string	"putc"
-.LASF360:
-	.string	"mem_malloc_brk"
-.LASF12:
-	.string	"phys_size_t"
-.LASF83:
-	.string	"bi_boot_params"
+	.string	"tlb_emerg"
+.LASF138:
+	.string	"bootm_headers"
+.LASF470:
+	.string	"strict_strtoul"
+.LASF55:
+	.string	"protect"
+.LASF240:
+	.string	"UCLASS_USB"
+.LASF447:
+	.string	"scan_freq_loop"
+.LASF389:
+	.string	"uclass_driver"
 .LASF250:
 	.string	"UCLASS_RC"
-.LASF72:
-	.string	"bi_sramsize"
-.LASF293:
-	.string	"timebase_h"
 .LASF294:
+	.string	"timebase_h"
+.LASF295:
 	.string	"timebase_l"
-.LASF13:
-	.string	"sizetype"
-.LASF78:
-	.string	"bi_enetaddr"
-.LASF341:
-	.string	"net_rx_packet"
-.LASF459:
-	.string	"scan_freq"
-.LASF393:
-	.string	"per_device_auto_alloc_size"
-.LASF229:
-	.string	"UCLASS_SCSI"
-.LASF2:
-	.string	"short unsigned int"
-.LASF3:
-	.string	"signed char"
-.LASF339:
-	.string	"net_tx_packet"
-.LASF54:
-	.string	"start"
-.LASF380:
+.LASF187:
+	.string	"UCLASS_DISPLAY"
+.LASF346:
+	.string	"net_null_ethaddr"
+.LASF277:
+	.string	"env_valid"
+.LASF416:
+	.string	"FULLTEST"
+.LASF34:
+	.string	"parent"
+.LASF177:
+	.string	"UCLASS_PCI_EMUL"
+.LASF38:
+	.string	"parent_priv"
+.LASF251:
+	.string	"UCLASS_CHARGE_DISPLAY"
+.LASF315:
+	.string	"load_addr"
+.LASF98:
+	.string	"complete"
+.LASF89:
+	.string	"_datarelrolocal_start_ofs"
+.LASF97:
+	.string	"help"
+.LASF268:
+	.string	"addr"
+.LASF101:
+	.string	"CMD_RET_FAILURE"
+.LASF8:
+	.string	"unsigned int"
+.LASF16:
+	.string	"ushort"
+.LASF320:
+	.string	"eth_device"
+.LASF372:
+	.string	"priv_auto_alloc_size"
+.LASF297:
+	.string	"malloc_limit"
+.LASF218:
+	.string	"UCLASS_PMIC"
+.LASF422:
+	.string	"capacity"
+.LASF139:
+	.string	"legacy_hdr_os"
+.LASF108:
+	.string	"off_dt_strings"
+.LASF312:
+	.string	"monitor_flash_len"
+.LASF204:
+	.string	"UCLASS_MISC"
+.LASF67:
+	.string	"bi_memsize"
+.LASF438:
+	.string	"flag"
+.LASF24:
+	.string	"image_base"
+.LASF236:
+	.string	"UCLASS_SYSRESET"
+.LASF383:
 	.string	"current"
-.LASF412:
-	.string	"FASTTEST"
-.LASF255:
-	.string	"LOGF_MAX_CATEGORIES"
-.LASF134:
-	.string	"comp"
-.LASF179:
-	.string	"UCLASS_SIMPLE_BUS"
-.LASF286:
-	.string	"dm_root_f"
-.LASF37:
-	.string	"uclass_priv"
+.LASF191:
+	.string	"UCLASS_FIRMWARE"
+.LASF450:
+	.string	"min_freq"
+.LASF201:
+	.string	"UCLASS_LPC"
+.LASF197:
+	.string	"UCLASS_IDE"
+.LASF405:
+	.string	"list"
+.LASF306:
+	.string	"phandle"
+.LASF300:
+	.string	"video_top"
+.LASF397:
+	.string	"per_device_platdata_auto_alloc_size"
+.LASF165:
+	.string	"bootm_headers_t"
+.LASF73:
+	.string	"bi_arm_freq"
 .LASF224:
 	.string	"UCLASS_REMOTEPROC"
-.LASF149:
-	.string	"fit_hdr_fdt"
-.LASF407:
-	.string	"CHANGEFREQ"
-.LASF299:
-	.string	"video_top"
+.LASF465:
+	.string	"data_cpu_2_io"
+.LASF325:
+	.string	"recv"
+.LASF135:
+	.string	"type"
+.LASF146:
+	.string	"fit_hdr_rd"
+.LASF276:
+	.string	"env_addr"
+.LASF72:
+	.string	"bi_sramsize"
+.LASF449:
+	.string	"scan_freq"
+.LASF431:
+	.string	"start_adr"
+.LASF288:
+	.string	"uclass_root"
+.LASF190:
+	.string	"UCLASS_GPIO"
+.LASF219:
+	.string	"UCLASS_PWM"
+.LASF444:
+	.string	"test_banks"
+.LASF58:
+	.string	"long double"
+.LASF278:
+	.string	"ram_top"
+.LASF421:
+	.string	"baseaddr"
+.LASF480:
+	.string	"/home/typ/src/u-boot_gerrit/u-boot-ddr"
+.LASF155:
+	.string	"rd_start"
+.LASF220:
+	.string	"UCLASS_POWER_DOMAIN"
+.LASF223:
+	.string	"UCLASS_REGULATOR"
+.LASF317:
+	.string	"save_size"
+.LASF183:
+	.string	"UCLASS_CLK"
+.LASF31:
+	.string	"uclass_platdata"
+.LASF322:
+	.string	"iobase"
+.LASF429:
+	.string	"random_test"
+.LASF88:
+	.string	"_datarel_start_ofs"
+.LASF265:
+	.string	"pre_serial"
+.LASF128:
+	.string	"ih_name"
+.LASF435:
+	.string	"next_col"
+.LASF124:
+	.string	"ih_os"
+.LASF162:
+	.string	"cmdline_end"
 .LASF343:
-	.string	"net_bcast_ethaddr"
-.LASF164:
-	.string	"state"
-.LASF69:
-	.string	"bi_flashsize"
+	.string	"net_rx_packet"
+.LASF256:
+	.string	"LOGF_MAX_CATEGORIES"
+.LASF289:
+	.string	"fdt_blob"
+.LASF386:
+	.string	"udevice_id"
+.LASF51:
+	.string	"size"
+.LASF10:
+	.string	"long long unsigned int"
+.LASF395:
+	.string	"destroy"
+.LASF116:
+	.string	"image_header"
+.LASF377:
+	.string	"length"
 .LASF20:
 	.string	"__be32"
-.LASF162:
-	.string	"cmdline_end"
-.LASF38:
-	.string	"parent_priv"
-.LASF340:
-	.string	"net_rx_packets"
-.LASF184:
-	.string	"UCLASS_CPU"
-.LASF277:
-	.string	"ram_top"
-.LASF89:
-	.string	"_datarelrolocal_start_ofs"
-.LASF442:
-	.string	"next_col"
-.LASF348:
-	.string	"net_boot_file_name"
-.LASF391:
-	.string	"pre_remove"
-.LASF324:
-	.string	"halt"
-.LASF117:
-	.string	"ih_magic"
-.LASF285:
-	.string	"dm_root"
-.LASF17:
-	.string	"ulong"
-.LASF62:
-	.string	"region"
-.LASF7:
-	.string	"__u32"
-.LASF338:
-	.string	"net_server_ip"
-.LASF364:
-	.string	"remove"
+.LASF68:
+	.string	"bi_flashstart"
+.LASF145:
+	.string	"fit_noffset_os"
+.LASF205:
+	.string	"UCLASS_MMC"
+.LASF327:
+	.string	"write_hwaddr"
+.LASF479:
+	.string	"cmd/ddr_tool/ddr_test_code.c"
+.LASF255:
+	.string	"UCLASS_INVALID"
+.LASF471:
+	.string	"data_cpu_2_io_init"
+.LASF94:
+	.string	"maxargs"
 .LASF242:
 	.string	"UCLASS_USB_HUB"
-.LASF291:
+.LASF414:
+	.string	"DIAGONALSCAN"
+.LASF371:
+	.string	"child_post_remove"
+.LASF93:
+	.string	"cmd_tbl_s"
+.LASF99:
+	.string	"cmd_tbl_t"
+.LASF41:
+	.string	"sibling_node"
+.LASF292:
 	.string	"of_root"
-.LASF91:
-	.string	"_datarelro_start_ofs"
-.LASF367:
-	.string	"child_post_bind"
+.LASF461:
+	.string	"memset"
+.LASF57:
+	.string	"flash_info"
+.LASF110:
+	.string	"version"
+.LASF326:
+	.string	"halt"
+.LASF62:
+	.string	"region"
+.LASF114:
+	.string	"size_dt_struct"
+.LASF286:
+	.string	"dm_root"
+.LASF304:
+	.string	"sys_start_tick"
+.LASF308:
+	.string	"properties"
 .LASF207:
 	.string	"UCLASS_MTD"
-.LASF165:
-	.string	"bootm_headers_t"
-.LASF15:
-	.string	"long int"
-.LASF174:
-	.string	"UCLASS_TEST_PROBE"
-.LASF212:
-	.string	"UCLASS_PCH"
-.LASF213:
-	.string	"UCLASS_PCI"
-.LASF188:
-	.string	"UCLASS_DMA"
-.LASF446:
-	.string	"flag"
-.LASF401:
-	.string	"getc"
-.LASF237:
-	.string	"UCLASS_THERMAL"
+.LASF103:
+	.string	"fdt32_t"
+.LASF285:
+	.string	"new_gd"
+.LASF468:
+	.string	"get_print_available_addr"
+.LASF208:
+	.string	"UCLASS_NORTHBRIDGE"
+.LASF78:
+	.string	"bi_enetaddr"
+.LASF477:
+	.string	"malloc"
+.LASF369:
+	.string	"child_post_bind"
+.LASF483:
+	.string	"exit"
+.LASF318:
+	.string	"in_addr"
+.LASF344:
+	.string	"net_rx_packet_len"
+.LASF323:
+	.string	"init"
+.LASF102:
+	.string	"CMD_RET_USAGE"
+.LASF313:
+	.string	"__dtb_dt_begin"
+.LASF225:
+	.string	"UCLASS_RESET"
+.LASF148:
+	.string	"fit_noffset_rd"
 .LASF436:
-	.string	"random_test1"
-.LASF435:
-	.string	"random_test2"
-.LASF456:
-	.string	"set_vdd_logic"
-.LASF449:
-	.string	"test_case"
+	.string	"err_adr"
+.LASF181:
+	.string	"UCLASS_AHCI"
+.LASF12:
+	.string	"phys_size_t"
+.LASF27:
+	.string	"driver"
+.LASF87:
+	.string	"FIQ_STACK_START"
+.LASF163:
+	.string	"verify"
+.LASF381:
+	.string	"ofnode"
+.LASF28:
+	.string	"name"
 .LASF441:
+	.string	"test_case"
+.LASF211:
+	.string	"UCLASS_PANEL_BACKLIGHT"
+.LASF238:
+	.string	"UCLASS_TIMER"
+.LASF233:
+	.string	"UCLASS_SPI_FLASH"
+.LASF424:
+	.string	"reread_val"
+.LASF275:
+	.string	"have_console"
+.LASF81:
+	.string	"bi_busfreq"
+.LASF6:
+	.string	"short int"
+.LASF217:
+	.string	"UCLASS_PINCTRL"
+.LASF227:
+	.string	"UCLASS_RAMDISK"
+.LASF434:
 	.string	"pattern"
-.LASF387:
-	.string	"post_bind"
-.LASF335:
-	.string	"net_ethaddr"
-.LASF316:
-	.string	"in_addr"
-.LASF19:
-	.string	"uint32_t"
-.LASF130:
-	.string	"image_info"
-.LASF119:
-	.string	"ih_time"
-.LASF467:
-	.string	"available"
-.LASF489:
-	.string	"jt_funcs"
-.LASF490:
-	.string	"ofnode_union"
-.LASF474:
-	.string	"strcasecmp"
-.LASF58:
-	.string	"long double"
-.LASF112:
-	.string	"size_dt_strings"
-.LASF137:
-	.string	"image_info_t"
-.LASF302:
-	.string	"serial"
-.LASF443:
-	.string	"get_page_size"
-.LASF1:
-	.string	"long unsigned int"
-.LASF192:
-	.string	"UCLASS_I2C"
 .LASF176:
 	.string	"UCLASS_I2C_EMUL"
-.LASF50:
-	.string	"select_hwpart"
-.LASF346:
-	.string	"net_native_vlan"
-.LASF196:
-	.string	"UCLASS_I2S"
-.LASF336:
-	.string	"net_server_ethaddr"
-.LASF244:
-	.string	"UCLASS_VIDEO_BRIDGE"
-.LASF166:
-	.string	"images"
-.LASF428:
-	.string	"cmp_buf_data"
-.LASF288:
-	.string	"fdt_blob"
-.LASF14:
-	.string	"char"
-.LASF144:
-	.string	"fit_uname_os"
-.LASF143:
-	.string	"fit_hdr_os"
-.LASF476:
-	.string	"ctrlc"
-.LASF400:
-	.string	"tstc"
-.LASF29:
-	.string	"platdata"
-.LASF433:
-	.string	"reread_val"
-.LASF133:
-	.string	"load"
-.LASF352:
-	.string	"net_loop_state"
 .LASF232:
 	.string	"UCLASS_SPMI"
-.LASF230:
-	.string	"UCLASS_SERIAL"
-.LASF429:
-	.string	"random_test"
-.LASF411:
-	.string	"DIAGONALSCAN"
-.LASF215:
-	.string	"UCLASS_PHY"
-.LASF75:
-	.string	"bi_ddr_freq"
-.LASF32:
-	.string	"node"
-.LASF289:
-	.string	"new_fdt"
-.LASF420:
-	.string	"start_adr"
-.LASF136:
-	.string	"arch"
-.LASF274:
-	.string	"have_console"
-.LASF151:
-	.string	"fit_noffset_fdt"
-.LASF147:
-	.string	"fit_uname_rd"
-.LASF98:
-	.string	"complete"
-.LASF261:
-	.string	"tlb_size"
-.LASF146:
-	.string	"fit_hdr_rd"
-.LASF356:
-	.string	"NETLOOP_FAIL"
-.LASF410:
+.LASF96:
+	.string	"usage"
+.LASF366:
+	.string	"remove"
+.LASF173:
+	.string	"UCLASS_TEST_BUS"
+.LASF316:
+	.string	"save_addr"
+.LASF374:
+	.string	"per_child_auto_alloc_size"
+.LASF463:
+	.string	"flush_dcache_range"
+.LASF413:
 	.string	"CROSSTALK"
-.LASF191:
-	.string	"UCLASS_FIRMWARE"
-.LASF283:
-	.string	"reloc_off"
-.LASF154:
-	.string	"fit_noffset_setup"
-.LASF359:
-	.string	"mem_malloc_end"
-.LASF220:
-	.string	"UCLASS_POWER_DOMAIN"
-.LASF203:
-	.string	"UCLASS_MASS_STORAGE"
+.LASF298:
+	.string	"malloc_ptr"
+.LASF160:
+	.string	"initrd_end"
+.LASF391:
+	.string	"pre_unbind"
+.LASF267:
+	.string	"baudrate"
+.LASF90:
+	.string	"_datarellocal_start_ofs"
+.LASF40:
+	.string	"child_head"
+.LASF257:
+	.string	"arch_global_data"
+.LASF254:
+	.string	"UCLASS_COUNT"
+.LASF399:
+	.string	"stdio_dev"
+.LASF272:
+	.string	"pci_clk"
 .LASF49:
 	.string	"block_drvr"
-.LASF208:
-	.string	"UCLASS_NORTHBRIDGE"
-.LASF485:
-	.string	"malloc"
-.LASF404:
-	.string	"stdio_names"
-.LASF27:
-	.string	"driver"
-.LASF457:
-	.string	"set_ddr_freq"
-.LASF194:
-	.string	"UCLASS_I2C_GENERIC"
-.LASF322:
-	.string	"send"
-.LASF325:
-	.string	"write_hwaddr"
-.LASF483:
-	.string	"rockchip_ddrclk_sip_recalc_rate_v2"
-.LASF275:
-	.string	"env_addr"
-.LASF384:
-	.string	"compatible"
-.LASF290:
-	.string	"fdt_size"
-.LASF272:
-	.string	"mem_clk"
-.LASF25:
-	.string	"_binary_u_boot_bin_start"
-.LASF447:
-	.string	"argc"
-.LASF480:
-	.string	"udelay"
+.LASF466:
+	.string	"memcpy"
+.LASF53:
+	.string	"flash_id"
+.LASF305:
+	.string	"device_node"
+.LASF280:
+	.string	"ram_size"
+.LASF154:
+	.string	"fit_noffset_setup"
+.LASF115:
+	.string	"working_fdt"
+.LASF336:
+	.string	"net_root_path"
+.LASF188:
+	.string	"UCLASS_DMA"
 .LASF85:
 	.string	"bd_t"
-.LASF122:
-	.string	"ih_ep"
+.LASF319:
+	.string	"s_addr"
+.LASF393:
+	.string	"post_probe"
+.LASF345:
+	.string	"net_bcast_ethaddr"
+.LASF83:
+	.string	"bi_boot_params"
+.LASF19:
+	.string	"uint32_t"
+.LASF362:
+	.string	"mem_malloc_brk"
+.LASF331:
+	.string	"net_gateway"
+.LASF373:
+	.string	"platdata_auto_alloc_size"
+.LASF403:
+	.string	"tstc"
 .LASF66:
 	.string	"bi_memstart"
-.LASF306:
-	.string	"properties"
-.LASF448:
-	.string	"argv"
-.LASF150:
-	.string	"fit_uname_fdt"
-.LASF222:
-	.string	"UCLASS_RAM"
-.LASF46:
-	.string	"list_head"
-.LASF388:
-	.string	"pre_unbind"
-.LASF303:
-	.string	"device_node"
-.LASF157:
-	.string	"ft_addr"
-.LASF258:
-	.string	"lastinc"
-.LASF385:
-	.string	"data"
-.LASF311:
-	.string	"__dtb_dt_begin"
-.LASF254:
-	.string	"UCLASS_INVALID"
-.LASF422:
-	.string	"buful"
-.LASF304:
-	.string	"phandle"
-.LASF40:
-	.string	"child_head"
+.LASF245:
+	.string	"UCLASS_VIDEO_CONSOLE"
+.LASF406:
+	.string	"stdio_devices"
+.LASF329:
+	.string	"eth_current"
+.LASF420:
+	.string	"_u_boot_list_2_cmd_2_ddr_test"
+.LASF368:
+	.string	"ofdata_to_platdata"
+.LASF64:
+	.string	"reserved"
+.LASF410:
+	.string	"CHANGEFREQ"
+.LASF433:
+	.string	"page_size"
+.LASF415:
+	.string	"FASTTEST"
+.LASF409:
+	.string	"cd_count"
+.LASF84:
+	.string	"bi_dram"
+.LASF2:
+	.string	"short unsigned int"
+.LASF105:
+	.string	"magic"
+.LASF152:
+	.string	"fit_hdr_setup"
+.LASF141:
+	.string	"legacy_hdr_valid"
+.LASF411:
+	.string	"SCANFREQ"
 .LASF60:
 	.string	"base"
-.LASF278:
-	.string	"relocaddr"
-.LASF142:
-	.string	"fit_uname_cfg"
-.LASF161:
-	.string	"cmdline_start"
-.LASF374:
-	.string	"property"
-.LASF455:
-	.string	"do_ddr_test"
-.LASF284:
-	.string	"new_gd"
-.LASF189:
-	.string	"UCLASS_ETH"
-.LASF276:
-	.string	"env_valid"
-.LASF312:
-	.string	"__dtb_dt_spl_begin"
-.LASF10:
-	.string	"long long unsigned int"
-.LASF34:
-	.string	"parent"
-.LASF190:
-	.string	"UCLASS_GPIO"
-.LASF107:
-	.string	"off_dt_strings"
-.LASF432:
-	.string	"wr_value"
-.LASF82:
-	.string	"bi_arch_number"
-.LASF460:
-	.string	"min_freq"
-.LASF44:
-	.string	"ide_bus_offset"
-.LASF273:
-	.string	"fb_base"
+.LASF442:
+	.string	"err_case"
+.LASF228:
+	.string	"UCLASS_RTC"
+.LASF258:
+	.string	"timer_rate_hz"
+.LASF52:
+	.string	"sector_count"
+.LASF127:
+	.string	"ih_comp"
 .LASF390:
-	.string	"post_probe"
-.LASF425:
-	.string	"err_adr"
-.LASF95:
-	.string	"repeatable"
-.LASF102:
-	.string	"CMD_RET_USAGE"
-.LASF253:
-	.string	"UCLASS_COUNT"
-.LASF209:
-	.string	"UCLASS_NVME"
-.LASF347:
-	.string	"net_restart_wrap"
-.LASF111:
-	.string	"boot_cpuid_phys"
-.LASF59:
-	.string	"lmb_property"
-.LASF488:
-	.string	"/home/typ/src/u-boot_gerrit/u-boot-ddr"
-.LASF484:
-	.string	"rand"
-.LASF218:
-	.string	"UCLASS_PMIC"
-.LASF361:
-	.string	"of_match"
-.LASF9:
-	.string	"long long int"
-.LASF478:
-	.string	"regulator_get_by_platname"
-.LASF493:
-	.string	"print_available_addr"
-.LASF159:
-	.string	"initrd_start"
-.LASF233:
-	.string	"UCLASS_SPI_FLASH"
-.LASF238:
-	.string	"UCLASS_TIMER"
-.LASF386:
-	.string	"uclass_driver"
-.LASF479:
-	.string	"regulator_set_value"
-.LASF466:
-	.string	"max_bank"
-.LASF30:
-	.string	"parent_platdata"
-.LASF252:
-	.string	"UCLASS_DVFS"
-.LASF45:
-	.string	"udevice"
-.LASF345:
-	.string	"net_our_vlan"
-.LASF419:
-	.string	"buf_len"
-.LASF124:
-	.string	"ih_os"
-.LASF219:
-	.string	"UCLASS_PWM"
-.LASF43:
-	.string	"req_seq"
-.LASF205:
-	.string	"UCLASS_MMC"
-.LASF197:
-	.string	"UCLASS_IDE"
-.LASF315:
-	.string	"save_size"
-.LASF109:
-	.string	"version"
-.LASF26:
-	.string	"_binary_u_boot_bin_end"
-.LASF394:
-	.string	"per_device_platdata_auto_alloc_size"
-.LASF8:
-	.string	"unsigned int"
-.LASF413:
-	.string	"FULLTEST"
-.LASF430:
-	.string	"baseaddr"
-.LASF114:
-	.string	"working_fdt"
-.LASF468:
-	.string	"crosstalk"
-.LASF328:
-	.string	"push_packet"
-.LASF113:
-	.string	"size_dt_struct"
-.LASF128:
-	.string	"ih_name"
-.LASF221:
-	.string	"UCLASS_PWRSEQ"
-.LASF6:
-	.string	"short int"
-.LASF307:
-	.string	"child"
-.LASF262:
-	.string	"tlb_fillptr"
-.LASF97:
-	.string	"help"
-.LASF48:
-	.string	"prev"
-.LASF349:
-	.string	"net_boot_file_size"
+	.string	"post_bind"
+.LASF367:
+	.string	"unbind"
+.LASF157:
+	.string	"ft_addr"
+.LASF474:
+	.string	"uclass_get_device"
+.LASF4:
+	.string	"uchar"
 .LASF158:
 	.string	"ft_len"
-.LASF105:
-	.string	"totalsize"
-.LASF295:
-	.string	"malloc_base"
-.LASF223:
-	.string	"UCLASS_REGULATOR"
-.LASF42:
-	.string	"flags"
-.LASF155:
-	.string	"rd_start"
+.LASF47:
+	.string	"next"
+.LASF388:
+	.string	"data"
+.LASF100:
+	.string	"CMD_RET_SUCCESS"
+.LASF153:
+	.string	"fit_uname_setup"
+.LASF48:
+	.string	"prev"
+.LASF212:
+	.string	"UCLASS_PCH"
+.LASF213:
+	.string	"UCLASS_PCI"
+.LASF332:
+	.string	"net_netmask"
+.LASF33:
+	.string	"driver_data"
+.LASF86:
+	.string	"IRQ_STACK_START"
+.LASF180:
+	.string	"UCLASS_ADC"
+.LASF175:
+	.string	"UCLASS_SPI_EMUL"
+.LASF262:
+	.string	"tlb_size"
+.LASF150:
+	.string	"fit_uname_fdt"
 	.hidden	malloc
 	.ident	"GCC: (Linaro GCC 6.3-2017.05) 6.3.1 20170404"
 	.section	.note.GNU-stack,"",@progbits
diff --git a/cmd/ddr_tool/ddr_test_rk1808.S b/cmd/ddr_tool/ddr_test_rk1808.S
index a898fe976b..6e8e95f038 100644
--- a/cmd/ddr_tool/ddr_test_rk1808.S
+++ b/cmd/ddr_tool/ddr_test_rk1808.S
@@ -1,262 +1,388 @@
+/* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
+/*
+ * Copyright (C) 2019 Rockchip Electronics Co., Ltd.
+ */
+
 	.arch armv8-a+nosimd
 	.file	"ddr_test_code.c"
 	.text
 .Ltext0:
 	.cfi_sections	.debug_frame
-	.section	.text.set_vdd_logic,"ax",@progbits
+	.section	.text.crosstalk,"ax",@progbits
 	.align	2
-	.type	set_vdd_logic, %function
-set_vdd_logic:
-.LFB258:
-	.file 1 "cmd/ddr_tool/ddr_tool.c"
-	.loc 1 165 0
+	.global	crosstalk
+	.type	crosstalk, %function
+crosstalk:
+.LFB201:
+	.file 1 "cmd/ddr_tool/crosstalk.c"
+	.loc 1 46 0
 	.cfi_startproc
 .LVL0:
-	stp	x29, x30, [sp, -48]!
-	.cfi_def_cfa_offset 48
-	.cfi_offset 29, -48
-	.cfi_offset 30, -40
+	stp	x29, x30, [sp, -144]!
+	.cfi_def_cfa_offset 144
+	.cfi_offset 29, -144
+	.cfi_offset 30, -136
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -112
+	.cfi_offset 22, -104
+	.loc 1 66 0
+	adrp	x22, .LC2
+	.loc 1 46 0
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -96
+	.cfi_offset 24, -88
+	mov	x23, x0
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
-	.loc 1 169 0
-	add	x1, x29, 40
-	.loc 1 165 0
-	mov	w20, w0
-	.loc 1 169 0
+	mov	x24, x1
+	stp	x25, x26, [sp, 64]
+	.loc 1 63 0
 	adrp	x0, .LC1
 .LVL1:
+	.loc 1 46 0
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 19, -128
+	.cfi_offset 20, -120
+	.cfi_offset 25, -80
+	.cfi_offset 26, -72
+	.cfi_offset 27, -64
+	.cfi_offset 28, -56
+	.loc 1 63 0
 	add	x0, x0, :lo12:.LC1
-	bl	regulator_get_by_platname
+	bl	printf
 .LVL2:
-	.loc 1 170 0
-	cbz	w0, .L2
-	mov	w19, w0
-	.loc 1 171 0
-	adrp	x0, .LC2
+	.loc 1 71 0
+	add	x21, x29, 112
+	.loc 1 66 0
+	add	x0, x22, :lo12:.LC2
+	.loc 1 68 0
+	adrp	x25, .LC3
+	.loc 1 66 0
+	str	x0, [x29, 104]
+	.loc 1 64 0
+	mov	w20, 0
+	.loc 1 68 0
+	add	x0, x25, :lo12:.LC3
+	str	x0, [x29, 96]
 .LVL3:
-	add	x0, x0, :lo12:.LC2
-.LVL4:
-.L8:
-	.loc 1 179 0
+.L6:
+	.loc 1 66 0
+	ldr	x0, [x29, 104]
+	.loc 1 71 0
+	mov	w26, 1
+	.loc 1 66 0
+	mov	w1, w20
+	.loc 1 71 0
+	lsl	w26, w26, w20
+	.loc 1 65 0
+	mov	w28, -1
+	.loc 1 67 0
+	mov	w27, 0
+	.loc 1 66 0
 	bl	printf
+.LVL4:
+.L5:
+	.loc 1 68 0
+	ldr	x0, [x29, 96]
+	mov	w1, w27
+	.loc 1 69 0
+	mvn	w28, w28
 .LVL5:
+	mov	x19, 0
+	.loc 1 68 0
+	bl	printf
+.LVL6:
+.L2:
+	.loc 1 71 0 discriminator 3
+	eor	w0, w26, w28
+	str	w0, [x19, x21]
+	add	x19, x19, 4
+	.loc 1 72 0 discriminator 3
+	mvn	w28, w28
+.LVL7:
+	.loc 1 70 0 discriminator 3
+	cmp	x19, 32
+	bne	.L2
+	.loc 1 74 0
+	mov	w1, w19
+	mov	x0, x21
+	bl	data_cpu_2_io
+.LVL8:
+	.loc 1 75 0
+	mov	x3, x24
+	mov	x2, x23
+	mov	w1, w19
+	mov	x0, x21
+	bl	write_buf_to_ddr
+.LVL9:
+	.loc 1 76 0
+	mov	w4, 1
+	mov	x3, x24
+	mov	x2, x23
+	mov	w1, w19
+	mov	x0, x21
+	bl	cmp_buf_data
+.LVL10:
+	cbz	x0, .L3
+.LVL11:
+.L11:
+	.loc 1 78 0
+	mov	w0, -1
 .L1:
-	.loc 1 181 0
-	mov	w0, w19
+	.loc 1 111 0
 	ldp	x19, x20, [sp, 16]
-.LVL6:
-	ldp	x29, x30, [sp], 48
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+.LVL12:
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 144
 	.cfi_remember_state
 	.cfi_restore 30
 	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
 	.cfi_restore 19
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL7:
-.L2:
+.LVL13:
+.L3:
 	.cfi_restore_state
-	.loc 1 176 0
-	ldr	x0, [x29, 40]
-.LVL8:
+	.loc 1 67 0 discriminator 2
+	add	w27, w27, 1
+.LVL14:
+	cmp	w27, 2
+	bne	.L5
+	.loc 1 64 0 discriminator 2
+	add	w20, w20, 1
+.LVL15:
+	cmp	w20, 32
+	bne	.L6
+	.loc 1 85 0
+	adrp	x0, .LC4
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+.LVL16:
+	.loc 1 86 0
+	mov	x0, 128
+	bl	malloc
+.LVL17:
+	mov	x21, x0
+.LVL18:
+	.loc 1 87 0
+	cbnz	x0, .L7
+	.loc 1 88 0
+	adrp	x0, .LC5
+.LVL19:
+	mov	x1, 128
+	add	x0, x0, :lo12:.LC5
+	bl	printf
+.LVL20:
+.L7:
+	adrp	x26, .LANCHOR0
+	.loc 1 91 0
+	add	x27, x22, :lo12:.LC2
+.LVL21:
+	.loc 1 93 0
+	add	x25, x25, :lo12:.LC3
+	.loc 1 98 0
+	add	x26, x26, :lo12:.LANCHOR0
+	.loc 1 69 0
+	mov	w20, 0
+.LVL22:
+.L14:
+	.loc 1 92 0
+	mov	w22, 0
+	.loc 1 96 0
+	mov	w28, 1
+	.loc 1 91 0
 	mov	w1, w20
-	bl	regulator_set_value
-.LVL9:
-	mov	w19, w0
-.LVL10:
-	.loc 1 177 0
-	mov	x0, 100
-.LVL11:
-	bl	udelay
-.LVL12:
-	.loc 1 178 0
-	cbz	w19, .L1
-	.loc 1 179 0
-	adrp	x0, .LC3
-	add	x0, x0, :lo12:.LC3
-	b	.L8
+	mov	x0, x27
+	bl	printf
+.LVL23:
+.L13:
+	.loc 1 93 0
+	mov	w1, w22
+	mov	x0, x25
+	bl	printf
+.LVL24:
+	.loc 1 96 0
+	mov	x19, 0
+	lsl	w1, w28, w22
+.LVL25:
+.L10:
+	ldr	w0, [x19, x26]
+	.loc 1 95 0
+	cbz	w20, .L8
+	.loc 1 96 0
+	eor	w0, w0, w1
+.L8:
+	.loc 1 98 0
+	str	w0, [x21, x19]
+	add	x19, x19, 4
+	.loc 1 94 0
+	cmp	x19, 128
+	bne	.L10
+	.loc 1 100 0
+	mov	w1, w19
+	mov	x0, x21
+	bl	data_cpu_2_io
+.LVL26:
+	.loc 1 101 0
+	mov	x3, x24
+	mov	x2, x23
+	mov	w1, w19
+	mov	x0, x21
+	bl	write_buf_to_ddr
+.LVL27:
+	.loc 1 103 0
+	mov	w4, 1
+	mov	x3, x24
+	mov	x2, x23
+	mov	w1, w19
+	mov	x0, x21
+	bl	cmp_buf_data
+.LVL28:
+	cbnz	x0, .L11
+	.loc 1 106 0
+	cbz	w20, .L12
+	.loc 1 92 0 discriminator 2
+	add	w22, w22, 1
+.LVL29:
+	cmp	w22, 32
+	bne	.L13
+.L12:
+	.loc 1 90 0 discriminator 2
+	add	w20, w20, 1
+.LVL30:
+	cmp	w20, 2
+	bne	.L14
+	.loc 1 110 0
+	mov	w0, 0
+	b	.L1
+	.cfi_endproc
+.LFE201:
+	.size	crosstalk, .-crosstalk
+	.section	.text.set_ddr_freq,"ax",@progbits
+	.align	2
+	.weak	set_ddr_freq
+	.type	set_ddr_freq, %function
+set_ddr_freq:
+.LFB254:
+	.file 2 "cmd/ddr_tool/ddr_tool.c"
+	.loc 2 45 0
+	.cfi_startproc
+.LVL31:
+	.loc 2 47 0
+	mov	w0, 0
+.LVL32:
+	ret
+	.cfi_endproc
+.LFE254:
+	.size	set_ddr_freq, .-set_ddr_freq
+	.section	.text.set_vdd_logic,"ax",@progbits
+	.align	2
+	.weak	set_vdd_logic
+	.type	set_vdd_logic, %function
+set_vdd_logic:
+.LFB255:
+	.loc 2 50 0
+	.cfi_startproc
+.LVL33:
+	.loc 2 52 0
+	mov	w0, -1
+.LVL34:
+	ret
 	.cfi_endproc
-.LFE258:
+.LFE255:
 	.size	set_vdd_logic, .-set_vdd_logic
-	.section	.text.random_test,"ax",@progbits
+	.section	.text.diagonalscan,"ax",@progbits
 	.align	2
-	.global	random_test
-	.type	random_test, %function
-random_test:
-.LFB275:
-	.file 2 "cmd/ddr_tool/random_test.c"
-	.loc 2 88 0
+	.global	diagonalscan
+	.type	diagonalscan, %function
+diagonalscan:
+.LFB269:
+	.file 3 "cmd/ddr_tool/diagonalscan.c"
+	.loc 3 16 0
 	.cfi_startproc
-.LVL13:
+.LVL35:
 	stp	x29, x30, [sp, -112]!
 	.cfi_def_cfa_offset 112
 	.cfi_offset 29, -112
 	.cfi_offset 30, -104
-.LBB18:
-.LBB19:
-	.loc 2 18 0
-	mov	x2, x1
-.LBE19:
-.LBE18:
-	.loc 2 88 0
+	.loc 3 19 0
+	mov	x2, 32
+	.loc 3 16 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -80
 	.cfi_offset 22, -72
-	mov	x22, x0
-.LVL14:
+	mov	x22, x1
 	stp	x23, x24, [sp, 48]
-.LBB24:
-.LBB20:
-	.loc 2 37 0
-	adrp	x21, .LC5
-.LBE20:
-.LBE24:
-	.loc 2 88 0
-	stp	x27, x28, [sp, 80]
 	.cfi_offset 23, -64
 	.cfi_offset 24, -56
-	.cfi_offset 27, -32
-	.cfi_offset 28, -24
-	mov	x23, x1
-.LVL15:
+	sub	x23, x1, #32
+	.loc 3 19 0
+	adrp	x1, .LANCHOR1
+.LVL36:
+	add	x1, x1, :lo12:.LANCHOR1
+	.loc 3 16 0
 	stp	x19, x20, [sp, 16]
-.LBB25:
-.LBB21:
-	.loc 2 18 0
-	mov	w1, -2139062144
-.LVL16:
-.LBE21:
-.LBE25:
-	.loc 2 88 0
 	stp	x25, x26, [sp, 64]
 	.cfi_offset 19, -96
 	.cfi_offset 20, -88
 	.cfi_offset 25, -48
 	.cfi_offset 26, -40
-.LBB26:
-.LBB22:
-	.loc 2 23 0
-	adrp	x24, .LC4
-	.loc 2 18 0
-	bl	memset
-.LVL17:
-	.loc 2 23 0
-	add	x24, x24, :lo12:.LC4
-	.loc 2 37 0
-	add	x21, x21, :lo12:.LC5
-	.loc 2 24 0
-	lsr	x0, x23, 2
-	.loc 2 14 0
-	mov	w27, 0
-	.loc 2 20 0
-	mov	w25, 1077952576
-	.loc 2 19 0
-	mov	w20, -2139062144
-	.loc 2 22 0
-	mov	w28, 0
-	.loc 2 24 0
-	str	x0, [x29, 96]
-.LVL18:
-.L15:
-	.loc 2 23 0
-	mov	w1, w28
-	mov	x0, x24
-	bl	printf
-.LVL19:
-	.loc 2 24 0
-	mov	w1, 0
-.LVL20:
-.L10:
-	ldr	x2, [x29, 96]
-	uxtw	x0, w1
-	cmp	x0, x2
-	bcc	.L14
-.LVL21:
-.L13:
-	.loc 2 37 0
-	mov	x0, x21
-	.loc 2 22 0
-	add	w28, w28, 1
-.LVL22:
-	.loc 2 37 0
-	bl	printf
-.LVL23:
-	.loc 2 35 0
-	lsr	w25, w25, 1
-.LVL24:
-	.loc 2 36 0
-	lsr	w20, w20, 1
-.LVL25:
-	.loc 2 22 0
-	cmp	w28, 8
-	bne	.L15
-	mov	x19, -1
-	b	.L12
-.LVL26:
-.L14:
-	.loc 2 25 0
-	lsl	x0, x0, 2
-	add	x19, x22, x0
-	ldr	w2, [x22, x0]
-	str	w2, [x29, 108]
-	.loc 2 26 0
-	uxtw	x2, w2
-	cmp	w2, w20
-	beq	.L11
-.LVL27:
-	.loc 2 28 0
-	ldr	w27, [x19]
-	.loc 2 33 0
-	cmn	x19, #1
-	beq	.L13
-.LVL28:
-.L12:
-	.loc 2 39 0
+	.loc 3 16 0
+	mov	x25, x0
+	.loc 3 19 0
+	add	x0, x29, 80
+.LVL37:
+	bl	memcpy
+.LVL38:
+	.loc 3 24 0
 	adrp	x0, .LC6
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.LVL29:
-	.loc 2 40 0
-	cmn	x19, #1
-	beq	.L16
-	.loc 2 41 0
-	ldr	w2, [x29, 108]
+.LVL39:
+	.loc 3 25 0
+	bl	get_page_size
+.LVL40:
+	sxtw	x19, w0
+.LVL41:
+	.loc 3 27 0
+	tbz	w19, #31, .L28
+	.loc 3 28 0
+	mov	w1, w19
 	adrp	x0, .LC7
-	mov	w4, w20
-	mov	w3, w27
-	mov	x1, x19
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.LVL30:
-.L29:
-.LBE22:
-.LBE26:
-.LBB27:
-.LBB28:
-	.loc 2 82 0
+.LVL42:
+	.loc 3 29 0
 	mov	w0, -1
-.L9:
-.LBE28:
-.LBE27:
-	.loc 2 96 0
+.L31:
+.LVL43:
+.L27:
+	.loc 3 64 0
 	ldp	x19, x20, [sp, 16]
+.LVL44:
 	ldp	x21, x22, [sp, 32]
-.LVL31:
 	ldp	x23, x24, [sp, 48]
-.LVL32:
 	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
+.LVL45:
 	ldp	x29, x30, [sp], 112
 	.cfi_remember_state
 	.cfi_restore 30
 	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
 	.cfi_restore 25
 	.cfi_restore 26
 	.cfi_restore 23
@@ -267,1620 +393,996 @@ random_test:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL33:
-.L11:
+.LVL46:
+.L28:
 	.cfi_restore_state
-.LBB30:
-.LBB23:
-	.loc 2 31 0
-	str	w25, [x22, x0]
-	.loc 2 24 0
-	add	w1, w1, 1
-.LVL34:
-	b	.L10
-.LVL35:
-.L16:
-.LBE23:
-.LBE30:
-.LBB31:
-.LBB29:
-	.loc 2 58 0
-	adrp	x25, .LC8
-.LVL36:
-	.loc 2 76 0
-	adrp	x24, .LC9
-	.loc 2 66 0
-	lsr	x28, x23, 3
-.LVL37:
-	.loc 2 58 0
-	add	x25, x25, :lo12:.LC8
-	.loc 2 76 0
-	add	x24, x24, :lo12:.LC9
-	.loc 2 66 0
-	mov	x27, 0
-	mov	x19, 0
-.LVL38:
-.L23:
-	.loc 2 58 0
-	mov	x1, x19
-	mov	x0, x25
-	bl	printf
-.LVL39:
-	.loc 2 60 0
-	lsl	x20, x19, 8
-	lsl	x0, x19, 24
-	orr	x20, x20, x19, lsl 16
-	orr	x0, x0, x19, lsl 32
-	.loc 2 64 0
-	mov	x2, x23
-	.loc 2 60 0
-	orr	x20, x20, x0
-	lsl	x0, x19, 40
-	orr	x0, x0, x19, lsl 48
-	orr	x20, x20, x0
-	orr	x0, x19, x19, lsl 56
-	orr	x20, x20, x0
-.LVL40:
-	.loc 2 64 0
-	mov	x0, x22
-	mov	w1, w20
-	bl	memset
-.LVL41:
-	.loc 2 66 0
-	mov	x0, 0
-.LVL42:
-.L18:
-	cmp	x0, x28
-	bne	.L22
-.LVL43:
-.L21:
-	.loc 2 76 0
-	mov	x0, x24
-.LVL44:
-	.loc 2 57 0
-	add	x19, x19, 1
-.LVL45:
-	.loc 2 76 0
-	bl	printf
-.LVL46:
-	.loc 2 57 0
-	cmp	x19, 256
-	bne	.L23
-	mov	x21, -1
-	b	.L20
+	.loc 3 40 0
+	lsr	x22, x22, 1
 .LVL47:
-.L22:
-	lsl	x1, x0, 3
-	add	x21, x1, x22
-	.loc 2 67 0
-	ldr	x26, [x1, x22]
+	add	x23, x25, x23
 .LVL48:
-	.loc 2 68 0
-	cmp	x20, x26
-	beq	.L19
+	mov	w21, 0
+	mov	x20, 0
+	.loc 3 37 0
+	mov	w1, 32
+	add	x0, x29, 80
+	bl	data_cpu_2_io
 .LVL49:
-	.loc 2 70 0
-	ldr	x27, [x21]
+	.loc 3 39 0
+	mov	x2, 32
+	add	x1, x29, 80
+	mov	x0, x25
+	bl	memcpy
 .LVL50:
-	.loc 2 74 0
-	cmn	x21, #1
-	beq	.L21
+.L30:
+	.loc 3 40 0 discriminator 1
+	cmp	x20, x22
+	bcc	.L34
+	mov	x0, 0
 .LVL51:
-.L20:
-	.loc 2 78 0
-	adrp	x0, .LC10
-	add	x0, x0, :lo12:.LC10
-	bl	printf
+	.loc 3 63 0
+	b	.L27
 .LVL52:
-	.loc 2 84 0
-	mov	w0, 0
-	.loc 2 79 0
-	cmn	x21, #1
-	beq	.L9
-	.loc 2 80 0
-	mov	x4, x20
-	mov	x3, x27
-	mov	x2, x26
-	mov	x1, x21
-	adrp	x0, .LC11
-	add	x0, x0, :lo12:.LC11
-	bl	printf
+.L34:
+	.loc 3 41 0
+	uxtw	x24, w21
+	mov	x2, 32
+	sub	x26, x23, x24
+	add	x1, x29, 80
+	mov	x0, x26
+	bl	memcpy
 .LVL53:
-	b	.L29
+	.loc 3 44 0
+	add	x2, x20, x25
+	.loc 3 43 0
+	mov	x3, 32
+	mov	w4, 1
+	add	x2, x2, x24
+	mov	w1, w3
+	add	x0, x29, 80
+	bl	cmp_buf_data
 .LVL54:
-.L19:
-	.loc 2 66 0
-	add	x0, x0, 1
+	.loc 3 45 0
+	cbnz	x0, .L27
+	.loc 3 48 0
+	add	x24, x24, 40
+	add	x20, x20, x19
 .LVL55:
-	b	.L18
-.LBE29:
-.LBE31:
-	.cfi_endproc
-.LFE275:
-	.size	random_test, .-random_test
-	.section	.text.cpu_2_io,"ax",@progbits
-	.align	2
-	.global	cpu_2_io
-	.type	cpu_2_io, %function
-cpu_2_io:
-.LFB276:
-	.file 3 "cmd/ddr_tool/tool_common.c"
-	.loc 3 11 0
-	.cfi_startproc
+	cmp	x19, x24
+	add	w21, w21, 8
 .LVL56:
-	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 3 19 0
-	mov	x2, 0
-	.loc 3 11 0
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	add	x1, x29, 16
+	csel	w21, w21, wzr, cs
 .LVL57:
-.L31:
-	.loc 3 19 0 discriminator 1
-	cmp	x2, 16
-	bne	.L32
-	.loc 3 22 0
-	bl	memcpy
+	.loc 3 50 0
+	cmp	x22, x20
+	bls	.L33
+	.loc 3 51 0
+	add	x0, x25, x20
 .LVL58:
-	.loc 3 26 0
-	ldp	x29, x30, [sp], 32
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
-	ret
+	mov	x2, 32
+	add	x1, x29, 80
+	add	x0, x0, x21, uxtw
+	bl	memcpy
 .LVL59:
-.L32:
-	.cfi_restore_state
-	.loc 3 20 0 discriminator 3
-	ubfiz	w3, w2, 2, 2
-	add	w3, w3, w2, asr 2
-	ldrb	w3, [x0, w3, sxtw]
-	strb	w3, [x1, x2]
+.L33:
+	.loc 3 53 0
+	mov	x3, 32
+	mov	w4, 1
+	mov	x2, x26
+	mov	w1, w3
+	add	x0, x29, 80
+	sub	x23, x23, x19
+	bl	cmp_buf_data
 .LVL60:
-	add	x2, x2, 1
-.LVL61:
-	b	.L31
+	.loc 3 56 0
+	cbz	x0, .L30
+	b	.L27
 	.cfi_endproc
-.LFE276:
-	.size	cpu_2_io, .-cpu_2_io
-	.section	.text.write_buf_to_ddr,"ax",@progbits
+.LFE269:
+	.size	diagonalscan, .-diagonalscan
+	.section	.text.random_test,"ax",@progbits
 	.align	2
-	.global	write_buf_to_ddr
-	.type	write_buf_to_ddr, %function
-write_buf_to_ddr:
-.LFB277:
-	.loc 3 29 0
+	.global	random_test
+	.type	random_test, %function
+random_test:
+.LFB272:
+	.file 4 "cmd/ddr_tool/random_test.c"
+	.loc 4 97 0
 	.cfi_startproc
+.LVL61:
+	stp	x29, x30, [sp, -112]!
+	.cfi_def_cfa_offset 112
+	.cfi_offset 29, -112
+	.cfi_offset 30, -104
+.LBB10:
+.LBB11:
+	.loc 4 19 0
+	mov	x2, x1
+.LBE11:
+.LBE10:
+	.loc 4 97 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -96
+	.cfi_offset 20, -88
+	mov	x20, x1
+	stp	x21, x22, [sp, 32]
+	mov	x19, x0
 .LVL62:
-	.loc 3 37 0
-	lsr	w1, w1, 3
+	stp	x23, x24, [sp, 48]
+.LBB16:
+.LBB12:
+	.loc 4 19 0
+	mov	w1, -2139062144
 .LVL63:
-	.loc 3 39 0
-	lsr	x3, x3, 3
+.LBE12:
+.LBE16:
+	.loc 4 97 0
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 21, -80
+	.cfi_offset 22, -72
+	.cfi_offset 23, -64
+	.cfi_offset 24, -56
+	.cfi_offset 27, -32
+	.cfi_offset 28, -24
+.LBB17:
+.LBB13:
+	.loc 4 24 0
+	adrp	x24, .LC8
+.LBE13:
+.LBE17:
+	.loc 4 97 0
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 25, -48
+	.cfi_offset 26, -40
+.LBB18:
+.LBB14:
+	.loc 4 19 0
+	bl	memset
 .LVL64:
-	.loc 3 37 0
-	sub	w1, w1, #1
+	.loc 4 25 0
+	lsr	x0, x20, 2
+	.loc 4 24 0
+	add	x24, x24, :lo12:.LC8
+	.loc 4 25 0
+	str	x0, [x29, 104]
+	.loc 4 15 0
+	mov	w27, 0
+	.loc 4 41 0
+	adrp	x0, .LC9
+	.loc 4 21 0
+	mov	w23, 1077952576
+	.loc 4 41 0
+	add	x0, x0, :lo12:.LC9
+	.loc 4 20 0
+	mov	w21, -2139062144
+	.loc 4 23 0
+	mov	w22, 0
+	.loc 4 41 0
+	str	x0, [x29, 96]
 .LVL65:
-	.loc 3 39 0
-	mov	w4, 0
-	mov	w5, 0
+.L43:
+	.loc 4 24 0
+	mov	w1, w22
+	mov	x0, x24
+	bl	printf
 .LVL66:
-.L35:
-	.loc 3 39 0 is_stmt 0 discriminator 1
-	uxtw	x6, w5
-	cmp	x6, x3
-	bcc	.L36
-	.loc 3 44 0 is_stmt 1
-	ret
-.L36:
-	.loc 3 40 0 discriminator 3
-	ldr	x7, [x0, w4, uxtw 3]
-	.loc 3 41 0 discriminator 3
-	add	w4, w4, 1
+	.loc 4 25 0
+	mov	w1, 0
 .LVL67:
-	.loc 3 40 0 discriminator 3
-	str	x7, [x2, x6, lsl 3]
-	.loc 3 42 0 discriminator 3
-	and	w4, w1, w4
+.L38:
+	ldr	x2, [x29, 104]
+	uxtw	x0, w1
+	cmp	x0, x2
+	bcc	.L42
 .LVL68:
-	.loc 3 39 0 discriminator 3
-	add	w5, w5, 1
+.L41:
+	.loc 4 41 0
+	ldr	x0, [x29, 96]
+	.loc 4 23 0
+	add	w22, w22, 1
 .LVL69:
-	b	.L35
-	.cfi_endproc
-.LFE277:
-	.size	write_buf_to_ddr, .-write_buf_to_ddr
-	.section	.text.cmp_buf_data,"ax",@progbits
-	.align	2
-	.global	cmp_buf_data
-	.type	cmp_buf_data, %function
-cmp_buf_data:
-.LFB278:
-	.loc 3 48 0
-	.cfi_startproc
+	.loc 4 39 0
+	lsr	w23, w23, 1
 .LVL70:
-	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 3 60 0
-	lsr	w1, w1, 3
+	.loc 4 40 0
+	lsr	w21, w21, 1
 .LVL71:
-	.loc 3 48 0
-	mov	w10, w4
-	.loc 3 60 0
-	sub	w1, w1, #1
-	.loc 3 48 0
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 3 62 0
-	lsr	x3, x3, 3
+	.loc 4 41 0
+	bl	printf
 .LVL72:
-	.loc 3 48 0
-	mov	x8, x2
+	.loc 4 23 0
+	cmp	w22, 8
+	bne	.L43
+	mov	x28, -1
+	b	.L40
 .LVL73:
-	.loc 3 62 0
-	mov	w6, 0
-	.loc 3 56 0
-	mov	x2, 0
+.L42:
+	.loc 4 26 0
+	lsl	x0, x0, 2
+	add	x5, x19, x0
+	ldr	w26, [x19, x0]
+	.loc 4 27 0
+	cmp	w26, w21
+	beq	.L39
+	.loc 4 28 0
+	mov	x28, x5
 .LVL74:
-	.loc 3 62 0
-	mov	w7, 0
-	.loc 3 48 0
-	str	x19, [sp, 16]
-	.cfi_offset 19, -16
+	.loc 4 29 0
+	add	x1, x5, 4
 .LVL75:
-.L38:
-	.loc 3 62 0 discriminator 1
-	uxtw	x5, w7
-	cmp	x5, x3
-	bcc	.L41
-	.loc 3 61 0
-	mov	x19, 0
-	.loc 3 54 0
-	mov	x3, 0
-	.loc 3 55 0
-	mov	x4, 0
-	b	.L40
-.L41:
-	.loc 3 63 0
-	lsl	x5, x5, 3
-	.loc 3 64 0
-	ldr	x4, [x0, w6, uxtw 3]
-	.loc 3 63 0
-	add	x19, x8, x5
-	ldr	x2, [x8, x5]
+	mov	x0, x5
+	bl	flush_dcache_range
 .LVL76:
-	.loc 3 64 0
-	cmp	x2, x4
-	beq	.L39
-	.loc 3 65 0
-	ldr	x3, [x19]
+	.loc 4 37 0
+	cmn	x28, #1
+	.loc 4 32 0
+	ldr	w27, [x28]
+	.loc 4 37 0
+	beq	.L41
 .LVL77:
 .L40:
-	.loc 3 73 0
-	cmp	x19, 0
-	ccmp	w10, 0, 4, ne
-	beq	.L37
-	.loc 3 74 0
-	adrp	x0, .LC12
+	.loc 4 43 0
+	adrp	x0, .LC10
+	add	x0, x0, :lo12:.LC10
+	bl	printf
 .LVL78:
-	mov	x1, x19
-.LVL79:
-	add	x0, x0, :lo12:.LC12
+	.loc 4 44 0
+	cmn	x28, #1
+	beq	.L44
+	.loc 4 45 0
+	adrp	x0, .LC11
+	mov	w4, w21
+	mov	w3, w27
+	mov	w2, w26
+	mov	x1, x28
+	add	x0, x0, :lo12:.LC11
 	bl	printf
-.LVL80:
+.LVL79:
+.L57:
+.LBE14:
+.LBE18:
+.LBB19:
+.LBB20:
+	.loc 4 91 0
+	mov	w0, -1
 .L37:
-	.loc 3 78 0
-	mov	x0, x19
-	ldr	x19, [sp, 16]
-.LVL81:
-	ldp	x29, x30, [sp], 32
+.LBE20:
+.LBE19:
+	.loc 4 105 0
+	ldp	x19, x20, [sp, 16]
+.LVL80:
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
 	.cfi_remember_state
 	.cfi_restore 30
 	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
 	.cfi_restore 19
+	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL82:
+.LVL81:
 .L39:
 	.cfi_restore_state
-	.loc 3 70 0 discriminator 2
-	add	w6, w6, 1
+.LBB22:
+.LBB15:
+	.loc 4 35 0
+	str	w23, [x19, x0]
+	.loc 4 25 0
+	add	w1, w1, 1
+.LVL82:
+	b	.L38
 .LVL83:
-	.loc 3 62 0 discriminator 2
-	add	w7, w7, 1
+.L44:
+.LBE15:
+.LBE22:
+.LBB23:
+.LBB21:
+	.loc 4 64 0
+	adrp	x26, .LC12
+	.loc 4 84 0
+	adrp	x24, .LC13
+	.loc 4 72 0
+	lsr	x28, x20, 3
+	.loc 4 64 0
+	add	x26, x26, :lo12:.LC12
+	.loc 4 84 0
+	add	x24, x24, :lo12:.LC13
+	.loc 4 72 0
+	mov	x27, 0
+	mov	x21, 0
 .LVL84:
-	.loc 3 71 0 discriminator 2
-	and	w6, w1, w6
+.L51:
+	.loc 4 64 0
+	mov	x1, x21
+	mov	x0, x26
+	bl	printf
 .LVL85:
-	b	.L38
-	.cfi_endproc
-.LFE278:
-	.size	cmp_buf_data, .-cmp_buf_data
-	.section	.text.crosstalk,"ax",@progbits
-	.align	2
-	.global	crosstalk
-	.type	crosstalk, %function
-crosstalk:
-.LFB201:
-	.file 4 "cmd/ddr_tool/crosstalk.c"
-	.loc 4 46 0
-	.cfi_startproc
+	.loc 4 66 0
+	lsl	x22, x21, 24
+	lsl	x0, x21, 8
+	orr	x22, x22, x21, lsl 32
+	orr	x0, x0, x21, lsl 16
+	.loc 4 70 0
+	mov	x2, x20
+	.loc 4 66 0
+	orr	x22, x22, x0
+	lsl	x0, x21, 40
+	orr	x0, x0, x21, lsl 48
+	orr	x22, x22, x0
+	orr	x0, x21, x21, lsl 56
+	orr	x22, x22, x0
 .LVL86:
-	stp	x29, x30, [sp, -160]!
-	.cfi_def_cfa_offset 160
-	.cfi_offset 29, -160
-	.cfi_offset 30, -152
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -144
-	.cfi_offset 20, -136
-	.loc 4 71 0
-	add	x19, x29, 128
-	.loc 4 46 0
-	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -128
-	.cfi_offset 22, -120
-	mov	x21, x0
-	stp	x23, x24, [sp, 48]
-	mov	x22, x1
-	stp	x25, x26, [sp, 64]
-	.loc 4 63 0
-	adrp	x0, .LC13
+	.loc 4 70 0
+	mov	x0, x19
+	mov	w1, w22
+	bl	memset
 .LVL87:
-	.loc 4 46 0
-	stp	x27, x28, [sp, 80]
-	.cfi_offset 23, -112
-	.cfi_offset 24, -104
-	.cfi_offset 25, -96
-	.cfi_offset 26, -88
-	.cfi_offset 27, -80
-	.cfi_offset 28, -72
-	.loc 4 63 0
-	add	x0, x0, :lo12:.LC13
-	bl	printf
+	.loc 4 72 0
+	mov	x0, 0
 .LVL88:
-	.loc 4 66 0
-	adrp	x23, .LC14
-	add	x0, x23, :lo12:.LC14
-	.loc 4 64 0
-	mov	w20, 0
-	.loc 4 66 0
-	str	x0, [x29, 112]
-	.loc 4 76 0
-	add	x0, x19, 16
-	str	x0, [x29, 104]
+.L46:
+	cmp	x0, x28
+	bne	.L50
 .LVL89:
-.L52:
-	.loc 4 66 0
-	ldr	x0, [x29, 112]
-	mov	w1, w20
-	.loc 4 68 0
-	adrp	x24, .LC15
-	add	x28, x24, :lo12:.LC15
-	.loc 4 65 0
-	mov	w26, -1
-	.loc 4 67 0
-	mov	w25, 0
-	.loc 4 66 0
-	bl	printf
-.LVL90:
-	.loc 4 71 0
-	mov	w0, 1
-	lsl	w0, w0, w20
-	str	w0, [x29, 120]
-.LVL91:
-.L51:
-	.loc 4 69 0
-	mvn	w26, w26
-.LVL92:
-	mov	x27, 0
-	.loc 4 68 0
-	mov	w1, w25
-	mov	x0, x28
+.L49:
+	.loc 4 84 0
+	mov	x0, x24
+	.loc 4 63 0
+	add	x21, x21, 1
+.LVL90:
+	.loc 4 84 0
 	bl	printf
+.LVL91:
+	.loc 4 63 0
+	cmp	x21, 256
+	bne	.L51
+	mov	x23, -1
+	b	.L48
+.LVL92:
+.L50:
+	lsl	x1, x0, 3
+	add	x23, x1, x19
+	.loc 4 73 0
+	ldr	x25, [x1, x19]
 .LVL93:
-.L48:
-	.loc 4 71 0 discriminator 3
-	ldr	w0, [x29, 120]
-	eor	w0, w0, w26
-	str	w0, [x27, x19]
-	add	x27, x27, 4
-	.loc 4 72 0 discriminator 3
-	mvn	w26, w26
+	.loc 4 74 0
+	cmp	x22, x25
+	beq	.L47
 .LVL94:
-	.loc 4 70 0 discriminator 3
-	cmp	x27, 32
-	bne	.L48
+	.loc 4 76 0
+	add	x1, x23, 4
+	mov	x0, x23
 .LVL95:
-	.loc 4 76 0 discriminator 1
-	mov	x0, x19
-	bl	cpu_2_io
+	bl	flush_dcache_range
 .LVL96:
-	ldr	x0, [x29, 104]
-	bl	cpu_2_io
+	.loc 4 78 0
+	ldr	x27, [x23]
 .LVL97:
-	.loc 4 77 0 discriminator 1
-	mov	x3, x22
-	mov	x2, x21
-	mov	w1, w27
-	mov	x0, x19
-	bl	write_buf_to_ddr
+	.loc 4 82 0
+	cmn	x23, #1
+	beq	.L49
 .LVL98:
-	.loc 4 78 0 discriminator 1
-	mov	w4, 1
-	mov	x3, x22
-	mov	x2, x21
-	mov	w1, w27
-	mov	x0, x19
-	bl	cmp_buf_data
+.L48:
+	.loc 4 86 0
+	adrp	x0, .LC14
+	add	x0, x0, :lo12:.LC14
+	bl	printf
 .LVL99:
-	cbz	x0, .L49
+	.loc 4 93 0
+	mov	w0, 0
+	.loc 4 87 0
+	cmn	x23, #1
+	beq	.L37
+	.loc 4 88 0
+	mov	x4, x22
+	mov	x3, x27
+	mov	x2, x25
+	mov	x1, x23
+	adrp	x0, .LC15
+	add	x0, x0, :lo12:.LC15
+	bl	printf
 .LVL100:
-.L58:
-	.loc 4 80 0
-	mov	w0, -1
-.L47:
-	.loc 4 115 0
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
+	b	.L57
 .LVL101:
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 160
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
-	ret
+.L47:
+	.loc 4 72 0
+	add	x0, x0, 1
 .LVL102:
-.L49:
-	.cfi_restore_state
-	.loc 4 67 0 discriminator 2
-	add	w25, w25, 1
+	b	.L46
+.LBE21:
+.LBE23:
+	.cfi_endproc
+.LFE272:
+	.size	random_test, .-random_test
+	.section	.text.do_ddr_test,"ax",@progbits
+	.align	2
+	.type	do_ddr_test, %function
+do_ddr_test:
+.LFB257:
+	.loc 2 100 0
+	.cfi_startproc
 .LVL103:
-	cmp	w25, 2
-	bne	.L51
-	.loc 4 64 0 discriminator 2
-	add	w20, w20, 1
-.LVL104:
-	cmp	w20, 32
-	bne	.L52
-	.loc 4 87 0
+	stp	x29, x30, [sp, -224]!
+	.cfi_def_cfa_offset 224
+	.cfi_offset 29, -224
+	.cfi_offset 30, -216
+	.loc 2 113 0
 	adrp	x0, .LC16
+.LVL104:
 	add	x0, x0, :lo12:.LC16
-	bl	printf
+	.loc 2 100 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -208
+	.cfi_offset 20, -200
+	.loc 2 115 0
+	add	x20, x29, 152
+	.loc 2 100 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -192
+	.cfi_offset 22, -184
+	.loc 2 115 0
+	add	x21, x29, 120
+	.loc 2 100 0
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 25, -160
+	.cfi_offset 26, -152
+	mov	w26, w2
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 27, -144
+	.cfi_offset 28, -136
+	mov	x27, x3
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -176
+	.cfi_offset 24, -168
+	.loc 2 103 0
+	stp	xzr, xzr, [x29, 184]
+	stp	xzr, xzr, [x29, 200]
+	str	xzr, [x29, 216]
 .LVL105:
-	.loc 4 88 0
-	mov	x0, 128
-	bl	malloc
+	.loc 2 113 0
+	bl	printf
 .LVL106:
-	mov	x19, x0
+	.loc 2 115 0
+	mov	w2, 1
+	mov	x1, x20
+	mov	x0, x21
+	bl	get_print_available_addr
 .LVL107:
-	.loc 4 89 0
-	cbnz	x0, .L53
-	.loc 4 90 0
-	adrp	x0, .LC17
+	.loc 2 117 0
+	cmp	w26, 1
+	ble	.L143
+	.loc 2 121 0
+	adrp	x24, .LANCHOR2
+	add	x28, x24, :lo12:.LANCHOR2
+	mov	x19, 0
+.L61:
+	ldr	x1, [x28, x19, lsl 3]
+	mov	w25, w19
 .LVL108:
-	mov	x1, 128
-	add	x0, x0, :lo12:.LC17
-	bl	printf
+	ldr	x0, [x27, 8]
+	bl	strcasecmp
 .LVL109:
-.L53:
-	adrp	x26, .LANCHOR0
+	mov	w23, w0
+	cbz	w0, .L60
 .LVL110:
-	.loc 4 93 0
-	add	x23, x23, :lo12:.LC14
-	.loc 4 95 0
-	add	x24, x24, :lo12:.LC15
-	.loc 4 100 0
-	add	x26, x26, :lo12:.LANCHOR0
-	.loc 4 69 0
-	mov	w20, 0
+	add	x19, x19, 1
 .LVL111:
-.L61:
-	.loc 4 94 0
-	mov	w25, 0
-	.loc 4 98 0
-	mov	w27, 1
-	.loc 4 93 0
-	mov	w1, w20
-	mov	x0, x23
-	bl	printf
+	.loc 2 120 0 discriminator 2
+	cmp	x19, 7
+	bne	.L61
+	.loc 2 128 0
+	adrp	x0, .LC25
+	add	x0, x0, :lo12:.LC25
+	b	.L144
 .LVL112:
-.L60:
-	.loc 4 95 0
-	mov	w1, w25
-	mov	x0, x24
-	bl	printf
+.L96:
+	.loc 2 133 0
+	adrp	x0, .LC17
+	add	x0, x0, :lo12:.LC17
 .LVL113:
-	.loc 4 98 0
-	lsl	w2, w27, w25
-	mov	x0, 0
+.L144:
+	.loc 2 128 0
+	bl	printf
 .LVL114:
-.L56:
-	ldr	w1, [x0, x26]
-	.loc 4 97 0
-	cbz	w20, .L54
-	.loc 4 98 0
-	eor	w1, w1, w2
-.L54:
-	.loc 4 100 0
-	str	w1, [x19, x0]
-	add	x0, x0, 4
-	.loc 4 96 0
-	cmp	x0, 128
-	bne	.L56
-	mov	x28, x19
-	add	x1, x19, 128
-.L57:
-	.loc 4 104 0
-	mov	x0, x28
-	str	x1, [x29, 120]
-	bl	cpu_2_io
+.L143:
+	.loc 2 129 0
+	mov	w23, -1
+	b	.L58
 .LVL115:
-	add	x28, x28, 16
-	.loc 4 102 0
-	ldr	x1, [x29, 120]
-	cmp	x28, x1
-	bne	.L57
-	.loc 4 105 0
-	mov	x3, x22
-	mov	x2, x21
-	mov	w1, 128
-	mov	x0, x19
-	bl	write_buf_to_ddr
+.L64:
+	.loc 2 138 0
+	add	x0, x27, x28
+	add	x1, x29, 184
+	add	x2, x1, x28
+	mov	w1, 0
+	add	x28, x28, 8
+	ldr	x0, [x0, 16]
+	bl	strict_strtoul
 .LVL116:
-	.loc 4 107 0
-	mov	w4, 1
-	mov	x3, x22
-	mov	x2, x21
-	mov	w1, 128
-	mov	x0, x19
-	bl	cmp_buf_data
+	tbz	w0, #31, .L63
+	.loc 2 139 0
+	adrp	x0, .LC18
+	add	x0, x0, :lo12:.LC18
+	b	.L144
+.L65:
+	.loc 2 164 0
+	cmp	w25, 1
+	bne	.L68
+	.loc 2 166 0
+	ldr	x0, [x29, 208]
+	cbz	x0, .L67
+	.loc 2 167 0
+	bl	set_vdd_logic
 .LVL117:
-	cbnz	x0, .L58
-	.loc 4 110 0
-	cbz	w20, .L59
-	.loc 4 94 0 discriminator 2
-	add	w25, w25, 1
+	b	.L67
+.L68:
+	.loc 2 169 0
+	sub	w19, w19, #5
 .LVL118:
-	cmp	w25, 32
-	bne	.L60
-.L59:
-	.loc 4 92 0 discriminator 2
-	add	w20, w20, 1
+	cmp	w19, 1
+	bhi	.L70
+	.loc 2 171 0
+	ldr	x0, [x29, 208]
+	cbz	x0, .L71
+	.loc 2 172 0
+	bl	set_vdd_logic
 .LVL119:
-	cmp	w20, 2
-	bne	.L61
-	.loc 4 114 0
-	mov	w0, 0
-	b	.L47
-	.cfi_endproc
-.LFE201:
-	.size	crosstalk, .-crosstalk
-	.section	.text.diagonalscan,"ax",@progbits
-	.align	2
-	.global	diagonalscan
-	.type	diagonalscan, %function
-diagonalscan:
-.LFB272:
-	.file 5 "cmd/ddr_tool/diagonalscan.c"
-	.loc 5 49 0
-	.cfi_startproc
+.L71:
+	.loc 2 173 0
+	cmp	w25, 5
+	bne	.L72
+	.loc 2 175 0
+	mov	x1, 65535
+	mov	x0, 0
+	movk	x1, 0x9f, lsl 16
+.L75:
 .LVL120:
-	stp	x29, x30, [sp, -112]!
-	.cfi_def_cfa_offset 112
-	.cfi_offset 29, -112
-	.cfi_offset 30, -104
-	.loc 5 55 0
-	mov	x2, 32
-	.loc 5 49 0
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -96
-	.cfi_offset 20, -88
-	mov	x19, x1
-	.loc 5 55 0
-	adrp	x1, .LANCHOR1
+	ldr	x2, [x20, x0, lsl 3]
+	cmp	x2, x1
+	bls	.L73
+	.loc 2 176 0
+	mov	w1, w0
 .LVL121:
-	add	x1, x1, :lo12:.LANCHOR1
-	.loc 5 49 0
-	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -64
-	.cfi_offset 24, -56
-	mov	x23, x0
-	stp	x21, x22, [sp, 32]
-	.loc 5 55 0
-	add	x0, x29, 80
+	.loc 2 185 0
+	mov	x2, 10485760
+	str	x2, [x20, w0, uxtw 3]
 .LVL122:
-	.loc 5 49 0
-	stp	x25, x26, [sp, 64]
-	.cfi_offset 21, -80
-	.cfi_offset 22, -72
-	.cfi_offset 25, -48
-	.cfi_offset 26, -40
-	.loc 5 55 0
-	bl	memcpy
+.L74:
+	.loc 2 108 0 discriminator 1
+	mov	x0, 0
 .LVL123:
-	.loc 5 60 0
-	adrp	x0, .LC18
-	add	x0, x0, :lo12:.LC18
-	bl	printf
+.L78:
+	.loc 2 188 0
+	cmp	w1, w0
+	beq	.L77
+	.loc 2 190 0
+	str	xzr, [x21, x0, lsl 3]
+	.loc 2 191 0
+	str	xzr, [x20, x0, lsl 3]
+.L77:
 .LVL124:
-.LBB35:
-.LBB36:
-.LBB37:
-	.loc 5 35 0
-	mov	x0, 520
-	movk	x0, 0xfe02, lsl 16
-	ldr	w20, [x0]
+	add	x0, x0, 1
 .LVL125:
-#APP
-// 35 "cmd/ddr_tool/diagonalscan.c" 1
-	dmb sy
-// 0 "" 2
+	.loc 2 187 0 discriminator 2
+	cmp	x0, 4
+	bne	.L78
+.L72:
+	.loc 2 201 0
+	adrp	x26, .LC20
+	.loc 2 205 0
+	adrp	x27, .LC21
 .LVL126:
-#NO_APP
-.LBE37:
-.LBE36:
-.LBE35:
-	.loc 5 73 0
-	add	x0, x29, 80
-	bl	cpu_2_io
+	.loc 2 201 0
+	add	x26, x26, :lo12:.LC20
+	.loc 2 205 0
+	add	x27, x27, :lo12:.LC21
+	mov	w25, 0
 .LVL127:
-	.loc 5 75 0
-	add	x1, x29, 80
-	mov	x2, 32
-	mov	x0, x23
-	bl	memcpy
+.L84:
+	.loc 2 199 0
+	ldr	x0, [x29, 200]
+	cbz	x0, .L85
+	.loc 2 199 0 is_stmt 0 discriminator 1
+	cmp	x0, x25, uxtw
+	bls	.L67
+.L85:
+	.loc 2 201 0 is_stmt 1
+	mov	x28, 0
+	.loc 2 200 0
+	add	w25, w25, 1
 .LVL128:
-.LBB40:
-.LBB38:
-	.loc 5 40 0
-	ubfx	x0, x20, 9, 2
-	.loc 5 41 0
-	ubfx	x20, x20, 2, 2
+	.loc 2 201 0
+	mov	w1, w25
+	mov	x0, x26
+	bl	printf
 .LVL129:
-	.loc 5 40 0
-	add	w0, w0, 9
-	.loc 5 41 0
-	mov	w1, 2
-	asr	w20, w1, w20
-.LBE38:
-.LBE40:
-	.loc 5 76 0
-	lsr	x24, x19, 1
-.LBB41:
-.LBB39:
-	.loc 5 43 0
-	add	w0, w0, w20
-	sub	x19, x19, #32
+.L82:
+	.loc 2 203 0
+	ldr	x3, [x20, x28, lsl 3]
+	cbz	x3, .L79
+	.loc 2 205 0
+	ldr	x2, [x21, x28, lsl 3]
+	mov	w1, w28
+	mov	x0, x27
+	bl	printf
 .LVL130:
-	mov	w25, 1
-	add	x19, x19, x23
+	.loc 2 207 0
+	ldr	x0, [x29, 192]
+	bl	set_ddr_freq
 .LVL131:
-	lsl	w25, w25, w0
-.LBE39:
-.LBE41:
-	.loc 5 76 0
-	mov	w21, 0
-	mov	x20, 0
+	.loc 2 208 0
+	ldr	x1, [x20, x28, lsl 3]
+	ldr	x0, [x21, x28, lsl 3]
+	bl	random_test
 .LVL132:
-.L74:
-	.loc 5 76 0 is_stmt 0 discriminator 1
-	cmp	x20, x24
-	bcc	.L78
-	mov	x0, 0
-	b	.L75
-.L78:
-	.loc 5 77 0 is_stmt 1
-	uxtw	x22, w21
-	mov	x2, 32
-	sub	x26, x19, x22
-	add	x1, x29, 80
-	mov	x0, x26
-	bl	memcpy
+	mov	w19, w0
 .LVL133:
-	.loc 5 80 0
-	add	x2, x20, x23
-	.loc 5 79 0
-	mov	x3, 32
-	mov	w4, 1
-	add	x2, x2, x22
-	mov	w1, w3
-	add	x0, x29, 80
-	bl	cmp_buf_data
+	.loc 2 210 0
+	cbnz	w0, .L98
+	.loc 2 211 0
+	ldr	x1, [x20, x28, lsl 3]
+	ldr	x0, [x21, x28, lsl 3]
 .LVL134:
-	.loc 5 81 0
-	cbnz	x0, .L75
-	.loc 5 84 0
-	add	x22, x22, 40
-	add	x20, x20, x25
+	bl	crosstalk
 .LVL135:
-	cmp	x25, x22
-	add	w21, w21, 8
+	mov	w19, w0
 .LVL136:
-	csel	w21, w21, wzr, cs
+	.loc 2 215 0
+	cbnz	w0, .L99
+	.loc 2 216 0
+	ldr	x1, [x20, x28, lsl 3]
+	ldr	x0, [x21, x28, lsl 3]
 .LVL137:
-	.loc 5 86 0
-	cmp	x24, x20
-	bls	.L77
-	.loc 5 87 0
-	add	x0, x23, x20
+	bl	diagonalscan
 .LVL138:
-	mov	x2, 32
-	add	x1, x29, 80
-	add	x0, x0, x21, uxtw
-	bl	memcpy
+	.loc 2 218 0
+	cmp	w0, 0
+	.loc 2 216 0
+	mov	w19, w0
 .LVL139:
-.L77:
-	.loc 5 89 0
-	mov	x3, 32
-	mov	w4, 1
-	mov	x2, x26
-	mov	w1, w3
-	add	x0, x29, 80
-	sub	x19, x19, x25
-	bl	cmp_buf_data
+	.loc 2 218 0
+	mov	w0, 4
 .LVL140:
-	.loc 5 92 0
-	cbz	x0, .L74
+	csinc	w22, w0, wzr, ne
 .LVL141:
-.L75:
-	.loc 5 100 0
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
+.L80:
+	.loc 2 226 0
+	ldr	x0, [x29, 184]
+	bl	set_ddr_freq
 .LVL142:
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 112
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
-	ret
-	.cfi_endproc
-.LFE272:
-	.size	diagonalscan, .-diagonalscan
-	.section	.text.do_ddr_test,"ax",@progbits
-	.align	2
-	.type	do_ddr_test, %function
-do_ddr_test:
-.LFB259:
-	.loc 1 190 0
-	.cfi_startproc
+	.loc 2 227 0
+	cbnz	w19, .L101
 .LVL143:
-	stp	x29, x30, [sp, -224]!
-	.cfi_def_cfa_offset 224
-	.cfi_offset 29, -224
-	.cfi_offset 30, -216
-.LBB46:
-.LBB47:
-	.loc 1 50 0
-	mov	x0, 0
+	.loc 2 228 0
+	ldr	x1, [x20, x28, lsl 3]
+	ldr	x0, [x21, x28, lsl 3]
+	bl	random_test
 .LVL144:
-.LBE47:
-.LBE46:
-	.loc 1 190 0
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -208
-	.cfi_offset 20, -200
-.LBB54:
-.LBB48:
-	.loc 1 52 0
-	add	x20, x29, 120
-.LBE48:
-.LBE54:
-	.loc 1 190 0
-	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -192
-	.cfi_offset 22, -184
-.LBB55:
-.LBB49:
-	.loc 1 53 0
-	add	x21, x29, 152
-.LBE49:
-.LBE55:
-	.loc 1 190 0
-	stp	x25, x26, [sp, 64]
-	.cfi_offset 25, -160
-	.cfi_offset 26, -152
-	mov	w26, w2
-	stp	x27, x28, [sp, 80]
-.LBB56:
-.LBB50:
-	.loc 1 50 0
-	mov	x2, x18
+	mov	w2, w0
 .LVL145:
-	.cfi_offset 27, -144
-	.cfi_offset 28, -136
-.LBE50:
-.LBE56:
-	.loc 1 190 0
-	mov	x27, x3
-	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -176
-	.cfi_offset 24, -168
-	.loc 1 193 0
-	stp	xzr, xzr, [x29, 184]
-.LBB57:
-.LBB51:
-	.loc 1 47 0
-	mov	w23, 0
-.LBE51:
-.LBE57:
-	.loc 1 193 0
-	stp	xzr, xzr, [x29, 200]
-	str	xzr, [x29, 216]
+	.loc 2 232 0
+	cbnz	w0, .L102
+	.loc 2 233 0
+	ldr	x1, [x20, x28, lsl 3]
+	ldr	x0, [x21, x28, lsl 3]
 .LVL146:
-.L83:
-.LBB58:
-.LBB52:
-	.loc 1 50 0
-	ldr	x1, [x2]
-	ubfiz	x3, x0, 4, 32
-	.loc 1 52 0
-	str	xzr, [x20, x0, lsl 3]
-	.loc 1 50 0
-	add	x1, x1, x3
-	.loc 1 53 0
-	str	xzr, [x21, x0, lsl 3]
-	.loc 1 50 0
-	ldr	x1, [x1, 136]
-	cmp	x1, 0
-	csinc	w23, w23, w0, eq
+	str	w2, [x29, 104]
+	bl	crosstalk
 .LVL147:
-	add	x0, x0, 1
+	mov	w22, w0
 .LVL148:
-	.loc 1 49 0
-	cmp	x0, 4
-	bne	.L83
-	mov	x0, 0
-.L84:
+	.loc 2 237 0
+	ldr	w2, [x29, 104]
+	cbnz	w0, .L103
+	.loc 2 238 0
+	ldr	x1, [x20, x28, lsl 3]
+	ldr	x0, [x21, x28, lsl 3]
 .LVL149:
-	.loc 1 56 0
-	cmp	w0, w23
-	bcc	.L85
-	.loc 1 61 0
-	sub	w1, w23, #1
-	ldr	x0, [x2, 128]
+	bl	diagonalscan
 .LVL150:
-	lsl	x1, x1, 3
-	.loc 1 67 0
-	adrp	x24, .LC21
-	.loc 1 61 0
-	sub	x0, x0, #1048576
-	.loc 1 64 0
-	mov	x22, 0
-	.loc 1 67 0
-	add	x24, x24, :lo12:.LC21
-	.loc 1 61 0
-	ldr	x2, [x20, x1]
-	sub	x0, x0, x2
-	.loc 1 62 0
-	and	x0, x0, -4096
-	.loc 1 61 0
-	str	x0, [x21, x1]
-	.loc 1 63 0
-	adrp	x0, .LC19
-	add	x0, x0, :lo12:.LC19
-	bl	printf
+	mov	w19, w0
 .LVL151:
-	.loc 1 64 0
-	adrp	x0, .LC20
-	add	x0, x0, :lo12:.LC20
-	bl	printf
+	.loc 2 243 0
+	cbnz	w0, .L104
+	.loc 2 245 0
+	bl	ctrlc
 .LVL152:
-.L86:
-	.loc 1 65 0
-	cmp	w23, w22
-	bhi	.L88
+	cbnz	w0, .L105
+	.loc 2 240 0
+	mov	w22, 4
 .LVL153:
-.LBE52:
-.LBE58:
-	.loc 1 205 0
-	cmp	w26, 1
-	ble	.L194
-	.loc 1 209 0
-	adrp	x24, .LANCHOR2
-	add	x28, x24, :lo12:.LANCHOR2
-	mov	x25, 0
-	str	x24, [x29, 104]
-.L91:
-	ldr	x1, [x28, x25, lsl 3]
-	mov	w22, w25
+.L79:
+	add	x28, x28, 1
 .LVL154:
-	ldr	x0, [x27, 8]
-	bl	strcasecmp
+	.loc 2 202 0 discriminator 2
+	cmp	x28, 4
+	bne	.L82
+	mov	w2, 0
+	mov	w19, 0
 .LVL155:
-	mov	w23, w0
-	cbz	w0, .L90
+.L81:
+	.loc 2 250 0
+	orr	w2, w19, w2
 .LVL156:
-	add	x25, x25, 1
-	.loc 1 208 0 discriminator 2
-	cmp	x25, 7
-	bne	.L91
-	.loc 1 216 0
-	adrp	x0, .LC33
-	add	x0, x0, :lo12:.LC33
-	b	.L195
+	cbz	w2, .L84
 .LVL157:
-.L85:
-.LBB59:
-.LBB53:
-	.loc 1 57 0
-	ubfiz	x1, x0, 4, 32
-	ldr	x3, [x2]
-	add	x1, x1, 128
-	add	x3, x3, x1
-	ldr	x3, [x3, 8]
-	str	x3, [x20, x0, lsl 3]
-	.loc 1 58 0
-	ldr	x3, [x2]
-	add	x1, x3, x1
-	ldr	x1, [x1, 16]
-	str	x1, [x21, x0, lsl 3]
+.L83:
+	.loc 2 302 0
+	cbz	w19, .L67
+	.loc 2 303 0
+	add	x24, x24, :lo12:.LANCHOR2
+	adrp	x0, .LC23
+	add	x0, x0, :lo12:.LC23
+	ldr	x1, [x24, w22, sxtw 3]
+	bl	printf
 .LVL158:
-	add	x0, x0, 1
+.L58:
+	.loc 2 308 0
+	mov	w0, w23
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 224
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
 .LVL159:
-	b	.L84
+.L73:
+	.cfi_restore_state
+	add	x0, x0, 1
 .LVL160:
-.L88:
-	.loc 1 66 0
-	ldr	x1, [x20, x22, lsl 3]
-	cbz	x1, .L87
-	.loc 1 67 0
-	ldr	x3, [x21, x22, lsl 3]
-	mov	x0, x24
-	add	x2, x1, x3
+	.loc 2 174 0 discriminator 2
+	cmp	x0, 4
+	bne	.L75
+	.loc 2 181 0
+	ldr	x2, [x29, 152]
+	mov	w1, 10
+	adrp	x0, .LC26
+	add	x0, x0, :lo12:.LC26
+	lsr	x2, x2, 20
 	bl	printf
 .LVL161:
-.L87:
-	add	x22, x22, 1
+	.loc 2 108 0
+	mov	w1, 0
+	b	.L74
 .LVL162:
-	b	.L86
+.L98:
+	.loc 2 209 0
+	mov	w22, 2
+	b	.L80
 .LVL163:
-.L131:
-.LBE53:
-.LBE59:
-	.loc 1 221 0
-	adrp	x0, .LC22
-	add	x0, x0, :lo12:.LC22
+.L99:
+	.loc 2 213 0
+	mov	w22, 3
+	b	.L80
 .LVL164:
-.L195:
-	.loc 1 216 0
-	bl	printf
+.L101:
+	mov	w2, 0
+	b	.L81
 .LVL165:
-.L194:
-	.loc 1 217 0
-	mov	w23, -1
+.L102:
+	.loc 2 228 0
+	mov	w19, w0
+	mov	w2, 0
+	.loc 2 230 0
+	mov	w22, 2
 	b	.L81
 .LVL166:
-.L94:
-	.loc 1 226 0
-	add	x0, x27, x28
-	add	x1, x29, 184
-	add	x2, x1, x28
-	mov	w1, 0
-	add	x28, x28, 8
-	ldr	x0, [x0, 16]
-	bl	strict_strtoul
+.L103:
+	.loc 2 233 0
+	mov	w19, w0
+	.loc 2 235 0
+	mov	w22, 3
+	b	.L81
 .LVL167:
-	tbz	w0, #31, .L93
-	.loc 1 227 0
-	adrp	x0, .LC23
-	add	x0, x0, :lo12:.LC23
-	b	.L195
-.L95:
-	.loc 1 252 0
-	cmp	w22, 1
-	bne	.L98
-	.loc 1 254 0
-	ldr	x0, [x29, 208]
-	b	.L197
-.L98:
-	.loc 1 257 0
-	sub	w25, w25, #5
-	cmp	w25, 1
-	bls	.L99
+.L104:
+	mov	w2, w22
 .LVL168:
-.LBB60:
-.LBB61:
-	.loc 1 79 0
-	ldr	x0, [x29, 128]
-	.loc 1 82 0
-	ldr	x3, [x29, 208]
-	.loc 1 79 0
-	cmp	x0, 0
-	ldr	x0, [x29, 136]
-	ldr	x1, [x29, 144]
-	cset	w25, ne
-	.loc 1 80 0
-	cmp	x0, 0
-	mov	w0, 3
-	csinc	w0, w0, w25, ne
+.L141:
+	.loc 2 240 0
+	mov	w22, 4
+	b	.L81
+.L105:
+	.loc 2 246 0
+	mov	w2, -1
+	b	.L141
 .LVL169:
-	cmp	x1, 0
-	mov	w1, 4
-	csel	w0, w0, w1, eq
+.L70:
+	.loc 2 259 0
+	mov	x2, x20
+	mov	x1, x21
+	add	x0, x29, 200
+	bl	judge_test_addr
 .LVL170:
-	.loc 1 82 0
-	cbnz	x3, .L187
-	.loc 1 83 0
-	mov	w25, w0
+	mov	w28, w0
 .LVL171:
-.L115:
-.LBE61:
-.LBE60:
-	.loc 1 344 0
-	ldr	x0, [x29, 216]
-	cbz	x0, .L121
-	.loc 1 345 0
-	bl	set_vdd_logic
+	.loc 2 260 0
+	cbz	w0, .L106
+	.loc 2 263 0
+	ldr	x0, [x29, 184]
 .LVL172:
-.L121:
-	.loc 1 349 0
-	adrp	x27, .LC30
+	bl	set_ddr_freq
 .LVL173:
-	mov	w26, 0
-	add	x27, x27, :lo12:.LC30
-	b	.L129
-.LVL174:
-.L99:
-	.loc 1 259 0
-	ldr	x0, [x29, 208]
-	cbz	x0, .L105
-	.loc 1 260 0
+	.loc 2 265 0
+	ldr	x0, [x29, 216]
+	cbz	x0, .L86
+	.loc 2 266 0
 	bl	set_vdd_logic
+.LVL174:
+.L86:
+	.loc 2 270 0
+	adrp	x27, .LC22
 .LVL175:
-.L105:
-	.loc 1 261 0
-	cmp	w22, 5
-	bne	.L106
-	.loc 1 262 0
-	ldr	x1, [x29, 152]
-	mov	x0, 65535
-	movk	x0, 0x9f, lsl 16
-	cmp	x1, x0
-	bhi	.L107
-	.loc 1 263 0
-	lsr	x2, x1, 20
-	adrp	x0, .LC26
-	mov	w1, 10
-	add	x0, x0, :lo12:.LC26
-	bl	printf
-.LVL176:
-.L106:
-	.loc 1 284 0
-	adrp	x28, .LC28
-	add	x28, x28, :lo12:.LC28
-	.loc 1 280 0
-	adrp	x27, .LC27
-.LVL177:
-	.loc 1 288 0
 	mov	w26, 0
-	.loc 1 280 0
-	add	x0, x27, :lo12:.LC27
-	str	x0, [x29, 96]
-.LVL178:
-.L113:
-	.loc 1 278 0
-	ldr	x0, [x29, 200]
-	cbz	x0, .L114
-	.loc 1 278 0 is_stmt 0 discriminator 1
-	cmp	x0, x26, uxtw
-	bls	.L97
-.L114:
-	.loc 1 280 0 is_stmt 1
-	ldr	x0, [x29, 96]
-	.loc 1 279 0
+	add	x0, x27, :lo12:.LC22
+	str	x0, [x29, 104]
+	b	.L94
+.LVL176:
+.L95:
+	ldr	x0, [x29, 104]
+	.loc 2 269 0
 	add	w26, w26, 1
-.LVL179:
-	.loc 1 280 0
+.LVL177:
+	.loc 2 270 0
 	mov	w1, w26
-	mov	x25, 0
+	.loc 2 271 0
+	mov	x27, 0
+	.loc 2 270 0
 	bl	printf
+.LVL178:
+.L87:
+	.loc 2 271 0 discriminator 1
+	cmp	w28, w27
+	bhi	.L93
+	mov	w0, 0
+	mov	w19, 0
+.LVL179:
+.L92:
+	.loc 2 297 0
+	orr	w0, w19, w0
 .LVL180:
-.L111:
-	.loc 1 282 0
-	ldr	x22, [x20, x25, lsl 3]
-	cbz	x22, .L108
-	.loc 1 284 0
-	ldr	x19, [x21, x25, lsl 3]
-	mov	x2, x22
-	mov	w1, w25
-	mov	x0, x28
-	mov	x3, x19
-	bl	printf
+	cbnz	w0, .L83
 .LVL181:
-	.loc 1 287 0
-	mov	x1, x19
-	mov	x0, x22
-	bl	random_test
+.L94:
+	.loc 2 268 0
+	ldr	x0, [x29, 192]
+	cbz	x0, .L95
+	.loc 2 268 0 is_stmt 0 discriminator 1
+	cmp	x0, x26, uxtw
+	bhi	.L95
+	b	.L67
 .LVL182:
-	mov	w24, w0
+.L93:
+	.loc 2 278 0 is_stmt 1
+	ldr	x1, [x20, x27, lsl 3]
+	.loc 2 272 0
+	cmp	w25, 3
+	.loc 2 278 0
+	ldr	x0, [x21, x27, lsl 3]
+	.loc 2 272 0
+	beq	.L89
+	cmp	w25, 4
+	beq	.L90
+	.loc 2 274 0
+	bl	random_test
 .LVL183:
-	.loc 1 289 0
-	cbnz	w0, .L137
-	.loc 1 290 0
-	mov	x1, x19
-	mov	x0, x22
+.L142:
+	.loc 2 282 0
+	mov	w19, w0
 .LVL184:
-	bl	crosstalk
+	.loc 2 290 0
+	bl	ctrlc
 .LVL185:
-	.loc 1 294 0
-	cbnz	w0, .L138
-	.loc 1 295 0
-	mov	x1, x19
-	mov	x0, x22
+	cbnz	w0, .L107
+	add	x27, x27, 1
 .LVL186:
-	bl	diagonalscan
+	mov	w22, w25
+	.loc 2 294 0
+	cbz	w19, .L87
 .LVL187:
-	mov	w27, w0
+	mov	w22, w25
 .LVL188:
-	.loc 1 299 0
-	cbz	w0, .L110
-	.loc 1 295 0
-	mov	w24, w0
-	mov	w27, 0
+	b	.L92
 .LVL189:
-.L190:
-	.loc 1 319 0
-	mov	w19, 4
-	b	.L109
+.L89:
+	.loc 2 278 0
+	bl	crosstalk
 .LVL190:
-.L107:
-	.loc 1 266 0
-	mov	x0, 10485760
-	.loc 1 268 0
-	stp	xzr, xzr, [x29, 128]
-	.loc 1 266 0
-	stp	xzr, x0, [x29, 144]
+	b	.L142
+.L90:
+	.loc 2 282 0
+	bl	diagonalscan
 .LVL191:
-	.loc 1 269 0
-	stp	xzr, xzr, [x29, 160]
+	b	.L142
 .LVL192:
-	str	xzr, [x29, 176]
+.L107:
+	mov	w22, w25
+	.loc 2 291 0
+	mov	w0, -1
+	b	.L92
 .LVL193:
-	b	.L106
+.L106:
+	.loc 2 261 0
+	mov	w23, 1
+	b	.L58
 .LVL194:
-.L137:
-	mov	w27, 0
-.L189:
-	.loc 1 309 0
-	mov	w19, 2
-	b	.L109
+.L60:
+	.loc 2 132 0
+	adrp	x0, .LANCHOR3
+	add	x0, x0, :lo12:.LANCHOR3
+	ldrb	w0, [x0, w19, sxtw]
+	cmp	w26, w0
+	blt	.L96
+	sub	w26, w26, #2
 .LVL195:
-.L138:
-	.loc 1 290 0
-	mov	w24, w0
-	mov	w27, 0
-.L191:
-	.loc 1 314 0
-	mov	w19, 3
-	b	.L109
+	.loc 2 132 0 is_stmt 0 discriminator 1
+	mov	x28, 0
+	lsl	x26, x26, 3
 .LVL196:
-.L139:
-	.loc 1 312 0
-	mov	w24, w0
-	mov	w27, 0
-	b	.L191
+.L63:
+	.loc 2 137 0 is_stmt 1 discriminator 1
+	cmp	x26, x28
+	bne	.L64
+	.loc 2 153 0
+	adrp	x0, .LC19
+	add	x0, x0, :lo12:.LC19
+	bl	printf
 .LVL197:
-.L141:
-	.loc 1 325 0
-	mov	w27, -1
-	b	.L190
+	.loc 2 157 0
+	bl	data_cpu_2_io_init
 .LVL198:
-.L187:
-.LBB64:
-.LBB62:
-	.loc 1 86 0
-	ldr	x4, [x29, 200]
-	.loc 1 87 0
-	mov	x1, 0
-	mov	w25, 0
-	.loc 1 88 0
-	mov	w6, 1
-	.loc 1 87 0
-	add	x5, x3, x4
+	.loc 2 159 0
+	cbnz	w25, .L65
+	.loc 2 161 0
+	ldr	x0, [x29, 192]
+	cbz	x0, .L66
+	.loc 2 162 0
+	bl	set_vdd_logic
 .LVL199:
-.L117:
-	.loc 1 86 0
-	ldr	x2, [x20, x1, lsl 3]
-	cmp	x4, x2
-	bcc	.L116
-	.loc 1 87 0
-	ldr	x7, [x21, x1, lsl 3]
-	add	x2, x2, x7
-	.loc 1 88 0
-	cmp	x5, x2
-	csel	w25, w25, w6, hi
+.L66:
+	.loc 2 163 0
+	ldr	x0, [x29, 184]
+	bl	set_ddr_freq
 .LVL200:
-.L116:
-	add	x1, x1, 1
-.LVL201:
-	.loc 1 85 0
-	cmp	w0, w1
-	bhi	.L117
-	.loc 1 89 0
-	cbnz	w25, .L118
-	.loc 1 90 0
-	adrp	x0, .LC29
-	add	x0, x0, :lo12:.LC29
+.L67:
+	.loc 2 305 0
+	adrp	x0, .LC24
+	add	x0, x0, :lo12:.LC24
 	bl	printf
-.LVL202:
-.L119:
-.LBE62:
-.LBE64:
-	.loc 1 339 0
-	cbnz	w25, .L115
-	.loc 1 340 0
-	mov	w23, 1
-	b	.L81
-.LVL203:
-.L118:
-.LBB65:
-.LBB63:
-	.loc 1 92 0
-	str	x4, [x29, 120]
-	.loc 1 94 0
-	cmp	w0, 1
-	.loc 1 93 0
-	str	x3, [x29, 152]
-.LVL204:
-	.loc 1 94 0
-	beq	.L119
-	.loc 1 95 0
-	str	xzr, [x29, 128]
-	.loc 1 94 0
-	cmp	w0, 2
-	.loc 1 96 0
-	str	xzr, [x29, 160]
-.LVL205:
-	.loc 1 94 0
-	beq	.L119
-	.loc 1 95 0
-	str	xzr, [x29, 136]
-	.loc 1 94 0
-	cmp	w0, 4
-	.loc 1 96 0
-	str	xzr, [x29, 168]
-.LVL206:
-	.loc 1 94 0
-	bne	.L119
-	.loc 1 95 0
-	str	xzr, [x29, 144]
-	.loc 1 96 0
-	str	xzr, [x29, 176]
-.LVL207:
-	b	.L119
-.LVL208:
-.L130:
-.LBE63:
-.LBE65:
-	.loc 1 350 0
-	mov	x28, 0
-	.loc 1 348 0
-	add	w26, w26, 1
-.LVL209:
-	.loc 1 349 0
-	mov	w1, w26
-	mov	x0, x27
-	bl	printf
-.LVL210:
-.L122:
-	.loc 1 350 0 discriminator 1
-	cmp	w25, w28
-	bhi	.L128
-	mov	w0, 0
-	mov	w24, 0
-.LVL211:
-.L127:
-	.loc 1 376 0
-	orr	w0, w24, w0
-.LVL212:
-	cbnz	w0, .L112
-.LVL213:
-.L129:
-	.loc 1 347 0
-	ldr	x0, [x29, 192]
-	cbz	x0, .L130
-	.loc 1 347 0 is_stmt 0 discriminator 1
-	cmp	x0, x26, uxtw
-	bhi	.L130
-	b	.L97
-.LVL214:
-.L128:
-	.loc 1 357 0 is_stmt 1
-	ldr	x1, [x21, x28, lsl 3]
-	.loc 1 351 0
-	cmp	w22, 3
-	.loc 1 357 0
-	ldr	x0, [x20, x28, lsl 3]
-	.loc 1 351 0
-	beq	.L124
-	cmp	w22, 4
-	beq	.L125
-	.loc 1 353 0
-	bl	random_test
-.LVL215:
-.L192:
-	.loc 1 361 0
-	mov	w24, w0
-.LVL216:
-	.loc 1 369 0
-	bl	ctrlc
-.LVL217:
-	cbnz	w0, .L144
-	add	x28, x28, 1
-.LVL218:
-	mov	w19, w22
-	.loc 1 373 0
-	cbz	w24, .L122
-.LVL219:
-	mov	w19, w22
-.LVL220:
-	b	.L127
-.LVL221:
-.L124:
-	.loc 1 357 0
-	bl	crosstalk
-.LVL222:
-	b	.L192
-.L125:
-	.loc 1 361 0
-	bl	diagonalscan
-.LVL223:
-	b	.L192
-.LVL224:
-.L144:
-	mov	w19, w22
-	.loc 1 370 0
-	mov	w0, -1
-	b	.L127
-.LVL225:
-.L90:
-	.loc 1 220 0
-	adrp	x0, .LANCHOR3
-	add	x0, x0, :lo12:.LANCHOR3
-	ldrb	w0, [x0, w25, sxtw]
-	cmp	w26, w0
-	blt	.L131
-	sub	w26, w26, #2
-.LVL226:
-	.loc 1 220 0 is_stmt 0 discriminator 1
-	mov	x28, 0
-	lsl	x26, x26, 3
-.LVL227:
-.L93:
-	.loc 1 225 0 is_stmt 1 discriminator 1
-	cmp	x28, x26
-	bne	.L94
-	.loc 1 232 0
-	ldp	x2, x3, [x29, 184]
-	mov	w1, w22
-	ldp	x4, x5, [x29, 200]
-	adrp	x0, .LC24
-	ldr	x6, [x29, 216]
-	add	x0, x0, :lo12:.LC24
-	bl	printf
-.LVL228:
-	.loc 1 244 0
-	adrp	x0, .LC25
-	add	x0, x0, :lo12:.LC25
-	bl	printf
-.LVL229:
-	.loc 1 247 0
-	cbnz	w22, .L95
-	.loc 1 249 0
-	ldr	x0, [x29, 192]
-.L197:
-	.loc 1 254 0
-	cbz	x0, .L97
-	.loc 1 255 0
-	bl	set_vdd_logic
-.LVL230:
-.L97:
-	.loc 1 384 0
-	adrp	x0, .LC32
-	add	x0, x0, :lo12:.LC32
-	bl	printf
-.LVL231:
-	b	.L81
-.LVL232:
-.L110:
-	.loc 1 307 0
-	mov	x1, x19
-	mov	x0, x22
-	bl	random_test
-.LVL233:
-	mov	w24, w0
-.LVL234:
-	.loc 1 311 0
-	cbnz	w0, .L189
-	.loc 1 312 0
-	mov	x1, x19
-	mov	x0, x22
-.LVL235:
-	bl	crosstalk
-.LVL236:
-	mov	w27, w0
-.LVL237:
-	.loc 1 316 0
-	cbnz	w0, .L139
-	.loc 1 317 0
-	mov	x1, x19
-	mov	x0, x22
-.LVL238:
-	bl	diagonalscan
-.LVL239:
-	mov	w24, w0
-.LVL240:
-	.loc 1 322 0
-	cbnz	w0, .L190
-	.loc 1 324 0
-	bl	ctrlc
-.LVL241:
-	cbnz	w0, .L141
-	.loc 1 319 0
-	mov	w19, 4
-.LVL242:
-.L108:
-	add	x25, x25, 1
-.LVL243:
-	.loc 1 281 0 discriminator 2
-	cmp	x25, 4
-	bne	.L111
-	mov	w27, 0
-	mov	w24, 0
-.LVL244:
-.L109:
-	.loc 1 329 0
-	orr	w2, w24, w27
-	cbz	w2, .L113
-.LVL245:
-.L112:
-	.loc 1 381 0
-	cbz	w24, .L97
-	.loc 1 382 0
-	ldr	x0, [x29, 104]
-	add	x24, x0, :lo12:.LANCHOR2
-.LVL246:
-	adrp	x0, .LC31
-	add	x0, x0, :lo12:.LC31
-	ldr	x1, [x24, w19, sxtw 3]
-	bl	printf
-.LVL247:
-.L81:
-	.loc 1 387 0
-	mov	w0, w23
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 224
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
-	ret
+.LVL201:
+	b	.L58
 	.cfi_endproc
-.LFE259:
+.LFE257:
 	.size	do_ddr_test, .-do_ddr_test
-	.section	.text.print_memory,"ax",@progbits
-	.align	2
-	.global	print_memory
-	.type	print_memory, %function
-print_memory:
-.LFB279:
-	.loc 3 81 0
-	.cfi_startproc
-.LVL248:
-	stp	x29, x30, [sp, -48]!
-	.cfi_def_cfa_offset 48
-	.cfi_offset 29, -48
-	.cfi_offset 30, -40
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
-	mov	x20, x0
-.LVL249:
-	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -16
-	.cfi_offset 22, -8
-	.loc 3 86 0
-	adrp	x21, .LC34
-	.loc 3 85 0
-	lsr	x22, x1, 2
-	.loc 3 86 0
-	add	x21, x21, :lo12:.LC34
-	.loc 3 85 0
-	mov	w19, 0
-.LVL250:
-.L199:
-	.loc 3 85 0 is_stmt 0 discriminator 1
-	uxtw	x1, w19
-	cmp	x1, x22
-	bcc	.L200
-	.loc 3 89 0 is_stmt 1
-	ldp	x19, x20, [sp, 16]
-.LVL251:
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 48
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
-	ret
-.LVL252:
-.L200:
-	.cfi_restore_state
-	.loc 3 87 0 discriminator 3
-	add	w3, w19, 3
-	add	w2, w19, 2
-	add	w0, w19, 1
-	lsl	x1, x1, 2
-	.loc 3 85 0 discriminator 3
-	add	w19, w19, 4
-.LVL253:
-	.loc 3 86 0 discriminator 3
-	ldr	w5, [x20, x3, lsl 2]
-	ldr	w4, [x20, x2, lsl 2]
-	ldr	w3, [x20, x0, lsl 2]
-	mov	x0, x21
-	ldr	w2, [x20, x1]
-	add	x1, x20, x1
-	bl	printf
-.LVL254:
-	b	.L199
-	.cfi_endproc
-.LFE279:
-	.size	print_memory, .-print_memory
 	.global	_u_boot_list_2_cmd_2_ddr_test
 	.section	.rodata
 	.align	3
@@ -1894,54 +1396,45 @@ print_memory:
 	.word	267448335
 	.word	0
 	.word	-1
-	.section	.rodata.cmp_buf_data.str1.1,"aMS",@progbits,1
-.LC12:
-	.string	"test fail:address:0x%lx,read:0x%lx,reread:0x%lx,expect:0x%lx\n"
 	.section	.rodata.crosstalk.str1.1,"aMS",@progbits,1
-.LC13:
+.LC1:
 	.string	"\nbitflip:   \n"
-.LC14:
+.LC2:
 	.string	"\b\b\b%3u"
-.LC15:
+.LC3:
 	.string	"%3u\b\b\b"
-.LC16:
+.LC4:
 	.string	"\nISI:\n"
-.LC17:
+.LC5:
 	.string	"malloc %lu byte fail\n"
 	.section	.rodata.diagonalscan.str1.1,"aMS",@progbits,1
-.LC18:
+.LC6:
 	.string	"\nDiagonalScan\n"
+.LC7:
+	.string	"get page size fail:0x%x\n"
 	.section	.rodata.do_ddr_test.str1.1,"aMS",@progbits,1
+.LC16:
+	.string	"ddr tester version 1.0.1\n"
+.LC17:
+	.string	"test parameters error\n"
+.LC18:
+	.string	"test pattern error\n"
 .LC19:
-	.string	"available memory for test:\n"
+	.string	"rockchip DMC didn't enable,can't change freq and freq scanning\n"
 .LC20:
-	.string	"\tstart\t\t end\tlength\n"
+	.string	"\rtimes:%08u:\n"
 .LC21:
-	.string	"\t0x%08lx - 0x%08lx 0x%08lx\n"
+	.string	"loop:%d, start:0x%lx, len:0x%lx\n"
 .LC22:
-	.string	"test parameters error\n"
+	.string	"\rtimes:%08u, "
 .LC23:
-	.string	"test pattern error\n"
+	.string	"\n%s test fail\n"
 .LC24:
-	.string	"test pattern:%d, arg:0x%lx,0x%lx,0x%lx,0x%lx,0x%lx\n"
+	.string	"\ntest pass\n"
 .LC25:
-	.string	"rockchip DMC didn't enable, can't change freq and freq scanning\n"
+	.string	"test pattern unsupported\n"
 .LC26:
 	.string	"fasttest need %uMB, but actually only %luMB\n"
-.LC27:
-	.string	"\rtimes:%08u:\n"
-.LC28:
-	.string	"loop:%d, start:0x%lx, len:0x%lx\n"
-.LC29:
-	.string	"Invalid test address\n"
-.LC30:
-	.string	"\rtimes:%08u, "
-.LC31:
-	.string	"\n%s test fail\n"
-.LC32:
-	.string	"\ntest pass\n"
-.LC33:
-	.string	"test pattern unsupported\n"
 	.section	.rodata.g_isi_pattern,"a",@progbits
 	.align	3
 	.set	.LANCHOR0,. + 0
@@ -1980,39 +1473,29 @@ g_isi_pattern:
 	.word	0
 	.word	0
 	.word	0
-	.section	.rodata.print_memory.str1.1,"aMS",@progbits,1
-.LC34:
-	.string	"0x%08lx: 0x%08x, 0x%08x, 0x%08x, 0x%08x\n"
 	.section	.rodata.random_test.str1.1,"aMS",@progbits,1
-.LC4:
+.LC8:
 	.string	"%u"
-.LC5:
+.LC9:
 	.string	"\b"
-.LC6:
+.LC10:
 	.string	" "
-.LC7:
+.LC11:
 	.string	"\nrandom test1 fail:address:0x%lx,read:0x%x,reread:0x%x,expect:0x%x\n"
-.LC8:
+.LC12:
 	.string	"%4lu"
-.LC9:
+.LC13:
 	.string	"\b\b\b\b"
-.LC10:
+.LC14:
 	.string	"    "
-.LC11:
+.LC15:
 	.string	"\nrandom test2 fail:address:0x%lx,read:0x%lx,reread:0x%lx,expect:0x%lx\n"
-	.section	.rodata.set_vdd_logic.str1.1,"aMS",@progbits,1
-.LC1:
-	.string	"vdd_logic"
-.LC2:
-	.string	"Cannot set regulator name\n"
-.LC3:
-	.string	"set vdd_logic fail\n"
 	.section	.rodata.str1.1,"aMS",@progbits,1
-.LC35:
+.LC27:
 	.string	"ddr_test"
-.LC36:
+.LC28:
 	.string	"for dram simple test\n"
-.LC37:
+.LC29:
 	.ascii	"arg1: test pattern include:\n\tchangefreq\n\tscanfreq\n\tran"
 	.ascii	"dom\n\tcrosstalk\n\tdiagonalscan\n\tfast_test\n\tfull_test\n"
 	.ascii	"for changereq: arg2:freq(Hz),arg3[option]:volt\nfor scanfreq"
@@ -2035,19 +1518,19 @@ g_isi_pattern:
 	.ascii	"anfreq 200000000 786000000 100'\ndoing random test 10 times "
 	.ascii	"start from"
 	.string	" physical address 0x200000 and\nlength is 128MB, freq:786MHz, if freq=0 may keep current freq:\n\t 'ddr_test random 786000000 10 0x200000 0x8000000'\ndoing fast test for dram between 200MHz to 786MHz with 10 times:\n\t 'ddr_test fast_test 200000000 786000000 10'"
-.LC38:
+.LC30:
 	.string	"changefreq"
-.LC39:
+.LC31:
 	.string	"scanfreq"
-.LC40:
+.LC32:
 	.string	"random"
-.LC41:
+.LC33:
 	.string	"crosstalk"
-.LC42:
+.LC34:
 	.string	"diagonalscan"
-.LC43:
+.LC35:
 	.string	"fast_test"
-.LC44:
+.LC36:
 	.string	"full_test"
 	.section	.rodata.test_pat_param,"a",@progbits
 	.align	3
@@ -2068,44 +1551,45 @@ test_pat_param:
 	.type	test_pattern, %object
 	.size	test_pattern, 56
 test_pattern:
-	.xword	.LC38
-	.xword	.LC39
-	.xword	.LC40
-	.xword	.LC41
-	.xword	.LC42
-	.xword	.LC43
-	.xword	.LC44
+	.xword	.LC30
+	.xword	.LC31
+	.xword	.LC32
+	.xword	.LC33
+	.xword	.LC34
+	.xword	.LC35
+	.xword	.LC36
 	.section	.u_boot_list_2_cmd_2_ddr_test,"aw",@progbits
 	.align	2
 	.type	_u_boot_list_2_cmd_2_ddr_test, %object
 	.size	_u_boot_list_2_cmd_2_ddr_test, 48
 _u_boot_list_2_cmd_2_ddr_test:
-	.8byte	.LC35
+	.8byte	.LC27
 	.word	7
 	.word	1
 	.8byte	do_ddr_test
-	.8byte	.LC36
-	.8byte	.LC37
+	.8byte	.LC28
+	.8byte	.LC29
 	.8byte	0
 	.text
 .Letext0:
-	.file 6 "include/common.h"
-	.file 7 "./arch/arm/include/asm/types.h"
-	.file 8 "include/linux/types.h"
-	.file 9 "include/errno.h"
-	.file 10 "include/linux/string.h"
-	.file 11 "include/efi.h"
-	.file 12 "include/dm/device.h"
-	.file 13 "include/ide.h"
-	.file 14 "include/linux/list.h"
-	.file 15 "include/part.h"
-	.file 16 "include/flash.h"
-	.file 17 "include/lmb.h"
-	.file 18 "include/asm-generic/u-boot.h"
-	.file 19 "./arch/arm/include/asm/u-boot-arm.h"
-	.file 20 "include/command.h"
-	.file 21 "include/../scripts/dtc/libfdt/fdt.h"
-	.file 22 "include/libfdt_env.h"
+	.file 5 "include/common.h"
+	.file 6 "./arch/arm/include/asm/types.h"
+	.file 7 "include/linux/types.h"
+	.file 8 "include/errno.h"
+	.file 9 "include/linux/string.h"
+	.file 10 "include/efi.h"
+	.file 11 "include/dm/device.h"
+	.file 12 "include/ide.h"
+	.file 13 "include/linux/list.h"
+	.file 14 "include/part.h"
+	.file 15 "include/flash.h"
+	.file 16 "include/lmb.h"
+	.file 17 "include/asm-generic/u-boot.h"
+	.file 18 "./arch/arm/include/asm/u-boot-arm.h"
+	.file 19 "include/command.h"
+	.file 20 "include/linux/libfdt_env.h"
+	.file 21 "include/linux/../../scripts/dtc/libfdt/fdt.h"
+	.file 22 "include/linux/libfdt.h"
 	.file 23 "include/image.h"
 	.file 24 "include/dm/uclass-id.h"
 	.file 25 "./arch/arm/include/asm/global_data.h"
@@ -2119,26 +1603,27 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.file 33 "include/console.h"
 	.file 34 "include/log.h"
 	.file 35 "include/stdio.h"
-	.file 36 "include/vsprintf.h"
-	.file 37 "include/power/regulator.h"
-	.file 38 "include/linux/delay.h"
+	.file 36 "./arch/arm/include/asm/arch/sdram_common.h"
+	.file 37 "cmd/ddr_tool/../memtester/io_map.h"
+	.file 38 "cmd/ddr_tool/../memtester/ddr_tester_common.h"
+	.file 39 "include/vsprintf.h"
 	.section	.debug_info,"",@progbits
 .Ldebug_info0:
-	.4byte	0x28ec
+	.4byte	0x24cb
 	.2byte	0x4
 	.4byte	.Ldebug_abbrev0
 	.byte	0x8
 	.uleb128 0x1
-	.4byte	.LASF468
+	.4byte	.LASF461
 	.byte	0xc
-	.4byte	.LASF469
-	.4byte	.LASF470
-	.4byte	.Ldebug_ranges0+0x190
+	.4byte	.LASF462
+	.4byte	.LASF463
+	.4byte	.Ldebug_ranges0+0x90
 	.8byte	0
 	.4byte	.Ldebug_line0
 	.uleb128 0x2
 	.4byte	.LASF4
-	.byte	0x6
+	.byte	0x5
 	.byte	0xd
 	.4byte	0x34
 	.uleb128 0x3
@@ -2157,7 +1642,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF2
 	.uleb128 0x5
 	.4byte	.LASF21
-	.byte	0x9
+	.byte	0x8
 	.byte	0xc
 	.4byte	0x59
 	.uleb128 0x6
@@ -2170,7 +1655,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF3
 	.uleb128 0x2
 	.4byte	.LASF5
-	.byte	0x7
+	.byte	0x6
 	.byte	0xc
 	.4byte	0x34
 	.uleb128 0x3
@@ -2179,7 +1664,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF6
 	.uleb128 0x2
 	.4byte	.LASF7
-	.byte	0x7
+	.byte	0x6
 	.byte	0x12
 	.4byte	0x84
 	.uleb128 0x3
@@ -2196,26 +1681,26 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF10
 	.uleb128 0x7
 	.string	"u8"
-	.byte	0x7
+	.byte	0x6
 	.byte	0x1f
 	.4byte	0x34
 	.uleb128 0x8
 	.4byte	0x99
 	.uleb128 0x7
 	.string	"u32"
-	.byte	0x7
+	.byte	0x6
 	.byte	0x25
 	.4byte	0x84
 	.uleb128 0x4
 	.4byte	0xa8
 	.uleb128 0x2
 	.4byte	.LASF11
-	.byte	0x7
+	.byte	0x6
 	.byte	0x31
 	.4byte	0x92
 	.uleb128 0x2
 	.4byte	.LASF12
-	.byte	0x7
+	.byte	0x6
 	.byte	0x32
 	.4byte	0x92
 	.uleb128 0x3
@@ -2244,252 +1729,245 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0xf3
 	.uleb128 0x2
 	.4byte	.LASF16
-	.byte	0x8
+	.byte	0x7
 	.byte	0x59
 	.4byte	0x47
 	.uleb128 0x2
 	.4byte	.LASF17
-	.byte	0x8
+	.byte	0x7
 	.byte	0x5b
 	.4byte	0x3b
 	.uleb128 0x2
 	.4byte	.LASF18
-	.byte	0x8
+	.byte	0x7
 	.byte	0x69
 	.4byte	0x67
 	.uleb128 0x2
 	.4byte	.LASF19
-	.byte	0x8
+	.byte	0x7
 	.byte	0x6b
 	.4byte	0x79
 	.uleb128 0x2
 	.4byte	.LASF20
-	.byte	0x8
+	.byte	0x7
 	.byte	0x97
 	.4byte	0x79
 	.uleb128 0xa
 	.byte	0x8
 	.uleb128 0x5
 	.4byte	.LASF22
-	.byte	0xa
+	.byte	0x9
 	.byte	0xb
 	.4byte	0xf3
-	.uleb128 0xb
-	.4byte	0x99
-	.4byte	0x152
-	.uleb128 0xc
-	.4byte	0xce
-	.byte	0xf
-	.byte	0
 	.uleb128 0x3
 	.byte	0x1
 	.byte	0x2
 	.4byte	.LASF23
 	.uleb128 0xb
 	.4byte	0xe0
-	.4byte	0x164
-	.uleb128 0xd
+	.4byte	0x154
+	.uleb128 0xc
 	.byte	0
-	.uleb128 0xe
+	.uleb128 0xd
 	.4byte	.LASF24
-	.byte	0xb
+	.byte	0xa
 	.2byte	0x140
-	.4byte	0x159
-	.uleb128 0xe
+	.4byte	0x149
+	.uleb128 0xd
 	.4byte	.LASF25
-	.byte	0xb
+	.byte	0xa
 	.2byte	0x143
-	.4byte	0x159
-	.uleb128 0xe
+	.4byte	0x149
+	.uleb128 0xd
 	.4byte	.LASF26
-	.byte	0xb
+	.byte	0xa
 	.2byte	0x143
-	.4byte	0x159
-	.uleb128 0xf
+	.4byte	0x149
+	.uleb128 0xe
 	.4byte	.LASF45
 	.byte	0xa0
-	.byte	0xc
+	.byte	0xb
 	.byte	0x80
-	.4byte	0x26d
-	.uleb128 0x10
+	.4byte	0x25d
+	.uleb128 0xf
 	.4byte	.LASF27
-	.byte	0xc
+	.byte	0xb
 	.byte	0x81
-	.4byte	0x14f9
+	.4byte	0x14f5
 	.byte	0
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF28
-	.byte	0xc
+	.byte	0xb
 	.byte	0x82
 	.4byte	0xd5
 	.byte	0x8
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF29
-	.byte	0xc
+	.byte	0xb
 	.byte	0x83
 	.4byte	0x135
 	.byte	0x10
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF30
-	.byte	0xc
+	.byte	0xb
 	.byte	0x84
 	.4byte	0x135
 	.byte	0x18
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF31
-	.byte	0xc
+	.byte	0xb
 	.byte	0x85
 	.4byte	0x135
 	.byte	0x20
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF32
-	.byte	0xc
+	.byte	0xb
 	.byte	0x86
-	.4byte	0x14c4
+	.4byte	0x14c0
 	.byte	0x28
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF33
-	.byte	0xc
+	.byte	0xb
 	.byte	0x87
 	.4byte	0x109
 	.byte	0x30
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF34
-	.byte	0xc
+	.byte	0xb
 	.byte	0x88
-	.4byte	0x26d
+	.4byte	0x25d
 	.byte	0x38
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF35
-	.byte	0xc
+	.byte	0xb
 	.byte	0x89
 	.4byte	0x135
 	.byte	0x40
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF36
-	.byte	0xc
+	.byte	0xb
 	.byte	0x8a
-	.4byte	0x153c
+	.4byte	0x1538
 	.byte	0x48
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF37
-	.byte	0xc
+	.byte	0xb
 	.byte	0x8b
 	.4byte	0x135
 	.byte	0x50
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF38
-	.byte	0xc
+	.byte	0xb
 	.byte	0x8c
 	.4byte	0x135
 	.byte	0x58
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF39
-	.byte	0xc
+	.byte	0xb
 	.byte	0x8d
-	.4byte	0x2a0
+	.4byte	0x290
 	.byte	0x60
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF40
-	.byte	0xc
+	.byte	0xb
 	.byte	0x8e
-	.4byte	0x2a0
+	.4byte	0x290
 	.byte	0x70
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF41
-	.byte	0xc
+	.byte	0xb
 	.byte	0x8f
-	.4byte	0x2a0
+	.4byte	0x290
 	.byte	0x80
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF42
-	.byte	0xc
+	.byte	0xb
 	.byte	0x90
 	.4byte	0x11f
 	.byte	0x90
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF43
-	.byte	0xc
+	.byte	0xb
 	.byte	0x91
 	.4byte	0x59
 	.byte	0x94
-	.uleb128 0x11
+	.uleb128 0x10
 	.string	"seq"
-	.byte	0xc
+	.byte	0xb
 	.byte	0x92
 	.4byte	0x59
 	.byte	0x98
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x188
+	.4byte	0x178
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x279
-	.uleb128 0x12
+	.4byte	0x269
+	.uleb128 0x11
 	.uleb128 0xb
 	.4byte	0x109
-	.4byte	0x285
-	.uleb128 0xd
+	.4byte	0x275
+	.uleb128 0xc
 	.byte	0
 	.uleb128 0x5
 	.4byte	.LASF44
-	.byte	0xd
+	.byte	0xc
 	.byte	0x10
-	.4byte	0x27a
+	.4byte	0x26a
 	.uleb128 0xb
 	.4byte	0x34
-	.4byte	0x2a0
-	.uleb128 0xc
+	.4byte	0x290
+	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x5
 	.byte	0
-	.uleb128 0xf
+	.uleb128 0xe
 	.4byte	.LASF46
 	.byte	0x10
-	.byte	0xe
+	.byte	0xd
 	.byte	0x16
-	.4byte	0x2c5
-	.uleb128 0x10
+	.4byte	0x2b5
+	.uleb128 0xf
 	.4byte	.LASF47
-	.byte	0xe
+	.byte	0xd
 	.byte	0x17
-	.4byte	0x2c5
+	.4byte	0x2b5
 	.byte	0
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF48
-	.byte	0xe
+	.byte	0xd
 	.byte	0x17
-	.4byte	0x2c5
+	.4byte	0x2b5
 	.byte	0x8
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x2a0
-	.uleb128 0xf
+	.4byte	0x290
+	.uleb128 0xe
 	.4byte	.LASF49
 	.byte	0x10
+	.byte	0xe
 	.byte	0xf
-	.byte	0xf
-	.4byte	0x2f0
-	.uleb128 0x10
+	.4byte	0x2e0
+	.uleb128 0xf
 	.4byte	.LASF28
-	.byte	0xf
+	.byte	0xe
 	.byte	0x10
 	.4byte	0xf3
 	.byte	0
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF50
-	.byte	0xf
+	.byte	0xe
 	.byte	0x11
-	.4byte	0x309
+	.4byte	0x2f9
 	.byte	0x8
 	.byte	0
 	.uleb128 0x8
-	.4byte	0x2cb
+	.4byte	0x2bb
 	.uleb128 0x13
 	.4byte	0x59
-	.4byte	0x309
+	.4byte	0x2f9
 	.uleb128 0x14
 	.4byte	0x59
 	.uleb128 0x14
@@ -2497,451 +1975,451 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x2f5
+	.4byte	0x2e5
 	.uleb128 0xb
-	.4byte	0x2f0
-	.4byte	0x31a
-	.uleb128 0xd
+	.4byte	0x2e0
+	.4byte	0x30a
+	.uleb128 0xc
 	.byte	0
 	.uleb128 0x8
-	.4byte	0x30f
+	.4byte	0x2ff
 	.uleb128 0x5
 	.4byte	.LASF49
-	.byte	0xf
+	.byte	0xe
 	.byte	0xce
-	.4byte	0x31a
+	.4byte	0x30a
 	.uleb128 0x15
 	.2byte	0x1218
-	.byte	0x10
+	.byte	0xf
 	.byte	0x13
-	.4byte	0x371
-	.uleb128 0x10
+	.4byte	0x361
+	.uleb128 0xf
 	.4byte	.LASF51
-	.byte	0x10
+	.byte	0xf
 	.byte	0x14
 	.4byte	0x109
 	.byte	0
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF52
-	.byte	0x10
+	.byte	0xf
 	.byte	0x15
 	.4byte	0xfe
 	.byte	0x8
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF53
-	.byte	0x10
+	.byte	0xf
 	.byte	0x16
 	.4byte	0x109
 	.byte	0x10
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF54
-	.byte	0x10
+	.byte	0xf
 	.byte	0x17
-	.4byte	0x371
+	.4byte	0x361
 	.byte	0x18
 	.uleb128 0x16
 	.4byte	.LASF55
-	.byte	0x10
+	.byte	0xf
 	.byte	0x18
-	.4byte	0x382
+	.4byte	0x372
 	.2byte	0x1018
 	.byte	0
 	.uleb128 0xb
 	.4byte	0x109
-	.4byte	0x382
+	.4byte	0x372
 	.uleb128 0x17
 	.4byte	0xce
 	.2byte	0x1ff
 	.byte	0
 	.uleb128 0xb
 	.4byte	0x29
-	.4byte	0x393
+	.4byte	0x383
 	.uleb128 0x17
 	.4byte	0xce
 	.2byte	0x1ff
 	.byte	0
 	.uleb128 0x2
 	.4byte	.LASF56
-	.byte	0x10
+	.byte	0xf
 	.byte	0x32
-	.4byte	0x32a
+	.4byte	0x31a
 	.uleb128 0xb
-	.4byte	0x393
-	.4byte	0x3a9
-	.uleb128 0xd
+	.4byte	0x383
+	.4byte	0x399
+	.uleb128 0xc
 	.byte	0
 	.uleb128 0x5
 	.4byte	.LASF57
-	.byte	0x10
+	.byte	0xf
 	.byte	0x34
-	.4byte	0x39e
+	.4byte	0x38e
 	.uleb128 0x3
 	.byte	0x10
 	.byte	0x4
 	.4byte	.LASF58
-	.uleb128 0xf
+	.uleb128 0xe
 	.4byte	.LASF59
 	.byte	0x10
-	.byte	0x11
 	.byte	0x10
-	.4byte	0x3e0
-	.uleb128 0x10
+	.byte	0x10
+	.4byte	0x3d0
+	.uleb128 0xf
 	.4byte	.LASF60
-	.byte	0x11
+	.byte	0x10
 	.byte	0x11
 	.4byte	0xb8
 	.byte	0
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF51
-	.byte	0x11
+	.byte	0x10
 	.byte	0x12
 	.4byte	0xc3
 	.byte	0x8
 	.byte	0
-	.uleb128 0xf
+	.uleb128 0xe
 	.4byte	.LASF61
 	.byte	0xa0
-	.byte	0x11
+	.byte	0x10
 	.byte	0x15
-	.4byte	0x411
-	.uleb128 0x11
+	.4byte	0x401
+	.uleb128 0x10
 	.string	"cnt"
-	.byte	0x11
+	.byte	0x10
 	.byte	0x16
 	.4byte	0x3b
 	.byte	0
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF51
-	.byte	0x11
+	.byte	0x10
 	.byte	0x17
 	.4byte	0xc3
 	.byte	0x8
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF62
-	.byte	0x11
+	.byte	0x10
 	.byte	0x18
-	.4byte	0x411
+	.4byte	0x401
 	.byte	0x10
 	.byte	0
 	.uleb128 0xb
-	.4byte	0x3bb
-	.4byte	0x421
-	.uleb128 0xc
+	.4byte	0x3ab
+	.4byte	0x411
+	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x8
 	.byte	0
 	.uleb128 0x18
 	.string	"lmb"
 	.2byte	0x140
-	.byte	0x11
+	.byte	0x10
 	.byte	0x1b
-	.4byte	0x447
-	.uleb128 0x10
+	.4byte	0x437
+	.uleb128 0xf
 	.4byte	.LASF63
-	.byte	0x11
+	.byte	0x10
 	.byte	0x1c
-	.4byte	0x3e0
+	.4byte	0x3d0
 	.byte	0
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF64
-	.byte	0x11
+	.byte	0x10
 	.byte	0x1d
-	.4byte	0x3e0
+	.4byte	0x3d0
 	.byte	0xa0
 	.byte	0
 	.uleb128 0x19
 	.string	"lmb"
-	.byte	0x11
+	.byte	0x10
 	.byte	0x20
-	.4byte	0x421
+	.4byte	0x411
 	.uleb128 0x1a
 	.byte	0x10
-	.byte	0x12
+	.byte	0x11
 	.byte	0x5a
-	.4byte	0x473
-	.uleb128 0x10
+	.4byte	0x463
+	.uleb128 0xf
 	.4byte	.LASF54
-	.byte	0x12
+	.byte	0x11
 	.byte	0x5b
 	.4byte	0xb8
 	.byte	0
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF51
-	.byte	0x12
+	.byte	0x11
 	.byte	0x5c
 	.4byte	0xc3
 	.byte	0x8
 	.byte	0
-	.uleb128 0xf
+	.uleb128 0xe
 	.4byte	.LASF65
 	.byte	0xc8
-	.byte	0x12
+	.byte	0x11
 	.byte	0x1b
-	.4byte	0x564
-	.uleb128 0x10
+	.4byte	0x554
+	.uleb128 0xf
 	.4byte	.LASF66
-	.byte	0x12
+	.byte	0x11
 	.byte	0x1c
 	.4byte	0x3b
 	.byte	0
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF67
-	.byte	0x12
+	.byte	0x11
 	.byte	0x1d
 	.4byte	0xc3
 	.byte	0x8
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF68
-	.byte	0x12
+	.byte	0x11
 	.byte	0x1e
 	.4byte	0x3b
 	.byte	0x10
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF69
-	.byte	0x12
+	.byte	0x11
 	.byte	0x1f
 	.4byte	0x3b
 	.byte	0x18
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF70
-	.byte	0x12
+	.byte	0x11
 	.byte	0x20
 	.4byte	0x3b
 	.byte	0x20
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF71
-	.byte	0x12
+	.byte	0x11
 	.byte	0x21
 	.4byte	0x3b
 	.byte	0x28
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF72
-	.byte	0x12
+	.byte	0x11
 	.byte	0x22
 	.4byte	0x3b
 	.byte	0x30
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF73
-	.byte	0x12
+	.byte	0x11
 	.byte	0x24
 	.4byte	0x3b
 	.byte	0x38
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF74
-	.byte	0x12
+	.byte	0x11
 	.byte	0x25
 	.4byte	0x3b
 	.byte	0x40
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF75
-	.byte	0x12
+	.byte	0x11
 	.byte	0x26
 	.4byte	0x3b
 	.byte	0x48
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF76
-	.byte	0x12
+	.byte	0x11
 	.byte	0x31
 	.4byte	0x3b
 	.byte	0x50
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF77
-	.byte	0x12
+	.byte	0x11
 	.byte	0x32
 	.4byte	0x3b
 	.byte	0x58
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF78
-	.byte	0x12
+	.byte	0x11
 	.byte	0x33
-	.4byte	0x290
+	.4byte	0x280
 	.byte	0x60
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF79
-	.byte	0x12
+	.byte	0x11
 	.byte	0x34
 	.4byte	0x47
 	.byte	0x66
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF80
-	.byte	0x12
+	.byte	0x11
 	.byte	0x35
 	.4byte	0x3b
 	.byte	0x68
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF81
-	.byte	0x12
+	.byte	0x11
 	.byte	0x36
 	.4byte	0x3b
 	.byte	0x70
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF82
-	.byte	0x12
+	.byte	0x11
 	.byte	0x57
 	.4byte	0x109
 	.byte	0x78
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF83
-	.byte	0x12
+	.byte	0x11
 	.byte	0x58
 	.4byte	0x109
 	.byte	0x80
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF84
-	.byte	0x12
+	.byte	0x11
 	.byte	0x5d
-	.4byte	0x564
+	.4byte	0x554
 	.byte	0x88
 	.byte	0
 	.uleb128 0xb
-	.4byte	0x452
-	.4byte	0x574
-	.uleb128 0xc
-	.4byte	0xce
+	.4byte	0x442
+	.4byte	0x564
+	.uleb128 0x12
+	.4byte	0xce
 	.byte	0x3
 	.byte	0
 	.uleb128 0x2
 	.4byte	.LASF85
-	.byte	0x12
+	.byte	0x11
 	.byte	0x5f
-	.4byte	0x473
+	.4byte	0x463
 	.uleb128 0x5
 	.4byte	.LASF86
-	.byte	0x13
+	.byte	0x12
 	.byte	0x13
 	.4byte	0x109
 	.uleb128 0x5
 	.4byte	.LASF87
-	.byte	0x13
+	.byte	0x12
 	.byte	0x14
 	.4byte	0x109
 	.uleb128 0x5
 	.4byte	.LASF88
-	.byte	0x13
+	.byte	0x12
 	.byte	0x15
 	.4byte	0x109
 	.uleb128 0x5
 	.4byte	.LASF89
-	.byte	0x13
+	.byte	0x12
 	.byte	0x16
 	.4byte	0x109
 	.uleb128 0x5
 	.4byte	.LASF90
-	.byte	0x13
+	.byte	0x12
 	.byte	0x17
 	.4byte	0x109
 	.uleb128 0x5
 	.4byte	.LASF91
-	.byte	0x13
+	.byte	0x12
 	.byte	0x18
 	.4byte	0x109
 	.uleb128 0x5
 	.4byte	.LASF92
-	.byte	0x13
+	.byte	0x12
 	.byte	0x19
 	.4byte	0x109
-	.uleb128 0xf
+	.uleb128 0xe
 	.4byte	.LASF93
 	.byte	0x30
-	.byte	0x14
+	.byte	0x13
 	.byte	0x1e
-	.4byte	0x62d
-	.uleb128 0x10
+	.4byte	0x61d
+	.uleb128 0xf
 	.4byte	.LASF28
-	.byte	0x14
+	.byte	0x13
 	.byte	0x1f
 	.4byte	0xf3
 	.byte	0
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF94
-	.byte	0x14
+	.byte	0x13
 	.byte	0x20
 	.4byte	0x59
 	.byte	0x8
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF95
-	.byte	0x14
+	.byte	0x13
 	.byte	0x21
 	.4byte	0x59
 	.byte	0xc
-	.uleb128 0x11
+	.uleb128 0x10
 	.string	"cmd"
-	.byte	0x14
+	.byte	0x13
 	.byte	0x23
-	.4byte	0x657
+	.4byte	0x647
 	.byte	0x10
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF96
-	.byte	0x14
+	.byte	0x13
 	.byte	0x24
 	.4byte	0xf3
 	.byte	0x18
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF97
-	.byte	0x14
+	.byte	0x13
 	.byte	0x26
 	.4byte	0xf3
 	.byte	0x20
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF98
-	.byte	0x14
+	.byte	0x13
 	.byte	0x2a
-	.4byte	0x686
+	.4byte	0x676
 	.byte	0x28
 	.byte	0
 	.uleb128 0x13
 	.4byte	0x59
-	.4byte	0x64b
+	.4byte	0x63b
 	.uleb128 0x14
-	.4byte	0x64b
+	.4byte	0x63b
 	.uleb128 0x14
 	.4byte	0x59
 	.uleb128 0x14
 	.4byte	0x59
 	.uleb128 0x14
-	.4byte	0x651
+	.4byte	0x641
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x5cc
+	.4byte	0x5bc
 	.uleb128 0x9
 	.byte	0x8
 	.4byte	0xf9
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x62d
+	.4byte	0x61d
 	.uleb128 0x13
 	.4byte	0x59
-	.4byte	0x680
+	.4byte	0x670
 	.uleb128 0x14
 	.4byte	0x59
 	.uleb128 0x14
-	.4byte	0x651
+	.4byte	0x641
 	.uleb128 0x14
 	.4byte	0xe0
 	.uleb128 0x14
 	.4byte	0x59
 	.uleb128 0x14
-	.4byte	0x680
+	.4byte	0x670
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
 	.4byte	0xf3
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x65d
+	.4byte	0x64d
 	.uleb128 0x2
 	.4byte	.LASF99
-	.byte	0x14
+	.byte	0x13
 	.byte	0x2e
-	.4byte	0x5cc
+	.4byte	0x5bc
 	.uleb128 0x1b
 	.4byte	.LASF167
 	.byte	0x4
 	.4byte	0x59
-	.byte	0x14
+	.byte	0x13
 	.byte	0x7a
-	.4byte	0x6ba
+	.4byte	0x6aa
 	.uleb128 0x1c
 	.4byte	.LASF100
 	.byte	0
@@ -2952,92 +2430,92 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF102
 	.sleb128 -1
 	.byte	0
-	.uleb128 0xf
+	.uleb128 0x2
 	.4byte	.LASF103
+	.byte	0x14
+	.byte	0x11
+	.4byte	0x12a
+	.uleb128 0xe
+	.4byte	.LASF104
 	.byte	0x28
 	.byte	0x15
 	.byte	0x39
-	.4byte	0x73f
-	.uleb128 0x10
-	.4byte	.LASF104
+	.4byte	0x73a
+	.uleb128 0xf
+	.4byte	.LASF105
 	.byte	0x15
 	.byte	0x3a
-	.4byte	0x750
+	.4byte	0x6aa
 	.byte	0
-	.uleb128 0x10
-	.4byte	.LASF105
+	.uleb128 0xf
+	.4byte	.LASF106
 	.byte	0x15
 	.byte	0x3b
-	.4byte	0x750
+	.4byte	0x6aa
 	.byte	0x4
-	.uleb128 0x10
-	.4byte	.LASF106
+	.uleb128 0xf
+	.4byte	.LASF107
 	.byte	0x15
 	.byte	0x3c
-	.4byte	0x750
+	.4byte	0x6aa
 	.byte	0x8
-	.uleb128 0x10
-	.4byte	.LASF107
+	.uleb128 0xf
+	.4byte	.LASF108
 	.byte	0x15
 	.byte	0x3d
-	.4byte	0x750
+	.4byte	0x6aa
 	.byte	0xc
-	.uleb128 0x10
-	.4byte	.LASF108
+	.uleb128 0xf
+	.4byte	.LASF109
 	.byte	0x15
 	.byte	0x3e
-	.4byte	0x750
+	.4byte	0x6aa
 	.byte	0x10
-	.uleb128 0x10
-	.4byte	.LASF109
+	.uleb128 0xf
+	.4byte	.LASF110
 	.byte	0x15
 	.byte	0x3f
-	.4byte	0x750
+	.4byte	0x6aa
 	.byte	0x14
-	.uleb128 0x10
-	.4byte	.LASF110
+	.uleb128 0xf
+	.4byte	.LASF111
 	.byte	0x15
 	.byte	0x40
-	.4byte	0x750
+	.4byte	0x6aa
 	.byte	0x18
-	.uleb128 0x10
-	.4byte	.LASF111
+	.uleb128 0xf
+	.4byte	.LASF112
 	.byte	0x15
 	.byte	0x43
-	.4byte	0x750
+	.4byte	0x6aa
 	.byte	0x1c
-	.uleb128 0x10
-	.4byte	.LASF112
+	.uleb128 0xf
+	.4byte	.LASF113
 	.byte	0x15
 	.byte	0x46
-	.4byte	0x750
+	.4byte	0x6aa
 	.byte	0x20
-	.uleb128 0x10
-	.4byte	.LASF113
+	.uleb128 0xf
+	.4byte	.LASF114
 	.byte	0x15
 	.byte	0x49
-	.4byte	0x750
+	.4byte	0x6aa
 	.byte	0x24
 	.byte	0
-	.uleb128 0x5
-	.4byte	.LASF114
+	.uleb128 0xd
+	.4byte	.LASF115
 	.byte	0x16
-	.byte	0xf
-	.4byte	0x74a
+	.2byte	0x136
+	.4byte	0x746
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x6ba
-	.uleb128 0x2
-	.4byte	.LASF115
-	.byte	0x16
-	.byte	0x12
-	.4byte	0x12a
+	.4byte	0x6b5
 	.uleb128 0x1e
 	.4byte	.LASF116
 	.byte	0x40
 	.byte	0x17
 	.2byte	0x134
-	.4byte	0x805
+	.4byte	0x7f6
 	.uleb128 0x1f
 	.4byte	.LASF117
 	.byte	0x17
@@ -3108,13 +2586,13 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF128
 	.byte	0x17
 	.2byte	0x140
-	.4byte	0x805
+	.4byte	0x7f6
 	.byte	0x20
 	.byte	0
 	.uleb128 0xb
 	.4byte	0x114
-	.4byte	0x815
-	.uleb128 0xc
+	.4byte	0x806
+	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x1f
 	.byte	0
@@ -3122,13 +2600,13 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF129
 	.byte	0x17
 	.2byte	0x141
-	.4byte	0x75b
+	.4byte	0x74c
 	.uleb128 0x1e
 	.4byte	.LASF130
 	.byte	0x30
 	.byte	0x17
 	.2byte	0x143
-	.4byte	0x8a3
+	.4byte	0x894
 	.uleb128 0x1f
 	.4byte	.LASF54
 	.byte	0x17
@@ -3188,24 +2666,24 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF137
 	.byte	0x17
 	.2byte	0x149
-	.4byte	0x821
+	.4byte	0x812
 	.uleb128 0x22
 	.4byte	.LASF138
 	.2byte	0x280
 	.byte	0x17
 	.2byte	0x14f
-	.4byte	0xa4c
+	.4byte	0xa3d
 	.uleb128 0x1f
 	.4byte	.LASF139
 	.byte	0x17
 	.2byte	0x155
-	.4byte	0xa4c
+	.4byte	0xa3d
 	.byte	0
 	.uleb128 0x1f
 	.4byte	.LASF140
 	.byte	0x17
 	.2byte	0x156
-	.4byte	0x815
+	.4byte	0x806
 	.byte	0x8
 	.uleb128 0x1f
 	.4byte	.LASF141
@@ -3295,7 +2773,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.string	"os"
 	.byte	0x17
 	.2byte	0x16e
-	.4byte	0x8a3
+	.4byte	0x894
 	.byte	0xb8
 	.uleb128 0x21
 	.string	"ep"
@@ -3355,7 +2833,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.string	"kbd"
 	.byte	0x17
 	.2byte	0x17a
-	.4byte	0xa52
+	.4byte	0xa43
 	.2byte	0x130
 	.uleb128 0x23
 	.4byte	.LASF163
@@ -3373,32 +2851,32 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.string	"lmb"
 	.byte	0x17
 	.2byte	0x18d
-	.4byte	0x421
+	.4byte	0x411
 	.2byte	0x140
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x815
+	.4byte	0x806
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x574
+	.4byte	0x564
 	.uleb128 0x20
 	.4byte	.LASF165
 	.byte	0x17
 	.2byte	0x18f
-	.4byte	0x8af
-	.uleb128 0xe
+	.4byte	0x8a0
+	.uleb128 0xd
 	.4byte	.LASF166
 	.byte	0x17
 	.2byte	0x191
-	.4byte	0xa58
+	.4byte	0xa49
 	.uleb128 0x1b
 	.4byte	.LASF168
 	.byte	0x4
 	.4byte	0x59
 	.byte	0x18
 	.byte	0xe
-	.4byte	0xc85
+	.4byte	0xc7c
 	.uleb128 0x1c
 	.4byte	.LASF169
 	.byte	0
@@ -3654,8 +3132,11 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x1c
 	.4byte	.LASF253
 	.byte	0x54
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF254
+	.byte	0x55
+	.uleb128 0x1d
+	.4byte	.LASF255
 	.sleb128 -1
 	.byte	0
 	.uleb128 0x25
@@ -3663,469 +3144,475 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0x84
 	.byte	0x22
 	.byte	0xe0
-	.4byte	0xc98
+	.4byte	0xc8f
 	.uleb128 0x1c
-	.4byte	.LASF255
+	.4byte	.LASF256
 	.byte	0x5
 	.byte	0
-	.uleb128 0xf
-	.4byte	.LASF256
+	.uleb128 0xe
+	.4byte	.LASF257
 	.byte	0x40
 	.byte	0x19
 	.byte	0xc
-	.4byte	0xd11
-	.uleb128 0x10
-	.4byte	.LASF257
+	.4byte	0xd08
+	.uleb128 0xf
+	.4byte	.LASF258
 	.byte	0x19
 	.byte	0x22
 	.4byte	0x3b
 	.byte	0
-	.uleb128 0x11
+	.uleb128 0x10
 	.string	"tbu"
 	.byte	0x19
 	.byte	0x23
 	.4byte	0x84
 	.byte	0x8
-	.uleb128 0x11
+	.uleb128 0x10
 	.string	"tbl"
 	.byte	0x19
 	.byte	0x24
 	.4byte	0x84
 	.byte	0xc
-	.uleb128 0x10
-	.4byte	.LASF258
+	.uleb128 0xf
+	.4byte	.LASF259
 	.byte	0x19
 	.byte	0x25
 	.4byte	0x3b
 	.byte	0x10
-	.uleb128 0x10
-	.4byte	.LASF259
+	.uleb128 0xf
+	.4byte	.LASF260
 	.byte	0x19
 	.byte	0x26
 	.4byte	0x92
 	.byte	0x18
-	.uleb128 0x10
-	.4byte	.LASF260
+	.uleb128 0xf
+	.4byte	.LASF261
 	.byte	0x19
 	.byte	0x28
 	.4byte	0x3b
 	.byte	0x20
-	.uleb128 0x10
-	.4byte	.LASF261
+	.uleb128 0xf
+	.4byte	.LASF262
 	.byte	0x19
 	.byte	0x29
 	.4byte	0x3b
 	.byte	0x28
-	.uleb128 0x10
-	.4byte	.LASF262
+	.uleb128 0xf
+	.4byte	.LASF263
 	.byte	0x19
 	.byte	0x2b
 	.4byte	0x3b
 	.byte	0x30
-	.uleb128 0x10
-	.4byte	.LASF263
+	.uleb128 0xf
+	.4byte	.LASF264
 	.byte	0x19
 	.byte	0x2c
 	.4byte	0x3b
 	.byte	0x38
 	.byte	0
-	.uleb128 0xf
-	.4byte	.LASF264
+	.uleb128 0xe
+	.4byte	.LASF265
 	.byte	0x18
 	.byte	0x1a
 	.byte	0x22
-	.4byte	0xd4d
-	.uleb128 0x10
-	.4byte	.LASF265
+	.4byte	0xd44
+	.uleb128 0xf
+	.4byte	.LASF266
 	.byte	0x1a
 	.byte	0x23
 	.4byte	0xa8
 	.byte	0
-	.uleb128 0x11
+	.uleb128 0x10
 	.string	"id"
 	.byte	0x1a
 	.byte	0x24
 	.4byte	0xa8
 	.byte	0x4
-	.uleb128 0x10
-	.4byte	.LASF266
+	.uleb128 0xf
+	.4byte	.LASF267
 	.byte	0x1a
 	.byte	0x25
 	.4byte	0xa8
 	.byte	0x8
-	.uleb128 0x10
-	.4byte	.LASF267
+	.uleb128 0xf
+	.4byte	.LASF268
 	.byte	0x1a
 	.byte	0x26
 	.4byte	0x109
 	.byte	0x10
 	.byte	0
 	.uleb128 0x26
-	.4byte	.LASF268
-	.2byte	0x198
+	.4byte	.LASF269
+	.2byte	0x1a0
 	.byte	0x1a
 	.byte	0x29
-	.4byte	0xf38
-	.uleb128 0x11
+	.4byte	0xf3c
+	.uleb128 0x10
 	.string	"bd"
 	.byte	0x1a
 	.byte	0x2a
-	.4byte	0xa52
+	.4byte	0xa43
 	.byte	0
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF42
 	.byte	0x1a
 	.byte	0x2b
 	.4byte	0x3b
 	.byte	0x8
-	.uleb128 0x10
-	.4byte	.LASF266
+	.uleb128 0xf
+	.4byte	.LASF267
 	.byte	0x1a
 	.byte	0x2c
 	.4byte	0x84
 	.byte	0x10
-	.uleb128 0x10
-	.4byte	.LASF269
+	.uleb128 0xf
+	.4byte	.LASF270
 	.byte	0x1a
 	.byte	0x2d
 	.4byte	0x3b
 	.byte	0x18
-	.uleb128 0x10
-	.4byte	.LASF270
+	.uleb128 0xf
+	.4byte	.LASF271
 	.byte	0x1a
 	.byte	0x2e
 	.4byte	0x3b
 	.byte	0x20
-	.uleb128 0x10
-	.4byte	.LASF271
+	.uleb128 0xf
+	.4byte	.LASF272
 	.byte	0x1a
 	.byte	0x30
 	.4byte	0x3b
 	.byte	0x28
-	.uleb128 0x10
-	.4byte	.LASF272
+	.uleb128 0xf
+	.4byte	.LASF273
 	.byte	0x1a
 	.byte	0x31
 	.4byte	0x3b
 	.byte	0x30
-	.uleb128 0x10
-	.4byte	.LASF273
+	.uleb128 0xf
+	.4byte	.LASF274
 	.byte	0x1a
 	.byte	0x33
 	.4byte	0x3b
 	.byte	0x38
-	.uleb128 0x10
-	.4byte	.LASF274
+	.uleb128 0xf
+	.4byte	.LASF275
 	.byte	0x1a
 	.byte	0x3d
 	.4byte	0x3b
 	.byte	0x40
-	.uleb128 0x10
-	.4byte	.LASF275
+	.uleb128 0xf
+	.4byte	.LASF276
 	.byte	0x1a
 	.byte	0x41
 	.4byte	0x3b
 	.byte	0x48
-	.uleb128 0x10
-	.4byte	.LASF276
+	.uleb128 0xf
+	.4byte	.LASF277
 	.byte	0x1a
 	.byte	0x42
 	.4byte	0x3b
 	.byte	0x50
-	.uleb128 0x10
-	.4byte	.LASF277
+	.uleb128 0xf
+	.4byte	.LASF278
 	.byte	0x1a
 	.byte	0x44
 	.4byte	0x3b
 	.byte	0x58
-	.uleb128 0x10
-	.4byte	.LASF278
+	.uleb128 0xf
+	.4byte	.LASF279
 	.byte	0x1a
 	.byte	0x45
 	.4byte	0x3b
 	.byte	0x60
-	.uleb128 0x10
-	.4byte	.LASF279
+	.uleb128 0xf
+	.4byte	.LASF280
 	.byte	0x1a
 	.byte	0x46
 	.4byte	0xc3
 	.byte	0x68
-	.uleb128 0x10
-	.4byte	.LASF280
+	.uleb128 0xf
+	.4byte	.LASF281
 	.byte	0x1a
 	.byte	0x47
 	.4byte	0x3b
 	.byte	0x70
-	.uleb128 0x10
-	.4byte	.LASF281
+	.uleb128 0xf
+	.4byte	.LASF282
 	.byte	0x1a
 	.byte	0x48
 	.4byte	0x3b
 	.byte	0x78
-	.uleb128 0x10
-	.4byte	.LASF282
+	.uleb128 0xf
+	.4byte	.LASF283
 	.byte	0x1a
 	.byte	0x49
 	.4byte	0x3b
 	.byte	0x80
-	.uleb128 0x10
-	.4byte	.LASF283
+	.uleb128 0xf
+	.4byte	.LASF284
 	.byte	0x1a
 	.byte	0x4a
 	.4byte	0x3b
 	.byte	0x88
-	.uleb128 0x10
-	.4byte	.LASF284
+	.uleb128 0xf
+	.4byte	.LASF285
 	.byte	0x1a
 	.byte	0x4b
-	.4byte	0xf38
+	.4byte	0xf3c
 	.byte	0x90
-	.uleb128 0x10
-	.4byte	.LASF285
+	.uleb128 0xf
+	.4byte	.LASF286
 	.byte	0x1a
 	.byte	0x4e
-	.4byte	0x26d
+	.4byte	0x25d
 	.byte	0x98
-	.uleb128 0x10
-	.4byte	.LASF286
+	.uleb128 0xf
+	.4byte	.LASF287
 	.byte	0x1a
 	.byte	0x4f
-	.4byte	0x26d
+	.4byte	0x25d
 	.byte	0xa0
-	.uleb128 0x10
-	.4byte	.LASF287
+	.uleb128 0xf
+	.4byte	.LASF288
 	.byte	0x1a
 	.byte	0x50
-	.4byte	0x2a0
+	.4byte	0x290
 	.byte	0xa8
-	.uleb128 0x10
-	.4byte	.LASF288
+	.uleb128 0xf
+	.4byte	.LASF289
 	.byte	0x1a
 	.byte	0x56
-	.4byte	0x273
+	.4byte	0x263
 	.byte	0xb8
-	.uleb128 0x10
-	.4byte	.LASF289
+	.uleb128 0xf
+	.4byte	.LASF290
 	.byte	0x1a
 	.byte	0x57
 	.4byte	0x135
 	.byte	0xc0
-	.uleb128 0x10
-	.4byte	.LASF290
+	.uleb128 0xf
+	.4byte	.LASF291
 	.byte	0x1a
 	.byte	0x58
 	.4byte	0x3b
 	.byte	0xc8
-	.uleb128 0x10
-	.4byte	.LASF291
+	.uleb128 0xf
+	.4byte	.LASF292
 	.byte	0x1a
 	.byte	0x5a
-	.4byte	0xfb0
+	.4byte	0xfb4
 	.byte	0xd0
-	.uleb128 0x11
+	.uleb128 0x10
 	.string	"jt"
 	.byte	0x1a
 	.byte	0x5c
-	.4byte	0xfbb
+	.4byte	0xfbf
 	.byte	0xd8
-	.uleb128 0x10
-	.4byte	.LASF292
+	.uleb128 0xf
+	.4byte	.LASF293
 	.byte	0x1a
 	.byte	0x5d
-	.4byte	0xfc1
+	.4byte	0xfc5
 	.byte	0xe0
 	.uleb128 0x16
-	.4byte	.LASF293
+	.4byte	.LASF294
 	.byte	0x1a
 	.byte	0x67
 	.4byte	0x84
 	.2byte	0x100
 	.uleb128 0x16
-	.4byte	.LASF294
+	.4byte	.LASF295
 	.byte	0x1a
 	.byte	0x68
 	.4byte	0x84
 	.2byte	0x104
 	.uleb128 0x16
-	.4byte	.LASF295
+	.4byte	.LASF296
 	.byte	0x1a
 	.byte	0x6a
 	.4byte	0x3b
 	.2byte	0x108
 	.uleb128 0x16
-	.4byte	.LASF296
+	.4byte	.LASF297
 	.byte	0x1a
 	.byte	0x6b
 	.4byte	0x3b
 	.2byte	0x110
 	.uleb128 0x16
-	.4byte	.LASF297
+	.4byte	.LASF298
 	.byte	0x1a
 	.byte	0x6c
 	.4byte	0x3b
 	.2byte	0x118
 	.uleb128 0x16
-	.4byte	.LASF298
+	.4byte	.LASF299
 	.byte	0x1a
 	.byte	0x75
-	.4byte	0x26d
+	.4byte	0x25d
 	.2byte	0x120
 	.uleb128 0x16
 	.4byte	.LASF136
 	.byte	0x1a
 	.byte	0x76
-	.4byte	0xc98
+	.4byte	0xc8f
 	.2byte	0x128
 	.uleb128 0x16
-	.4byte	.LASF299
+	.4byte	.LASF300
 	.byte	0x1a
 	.byte	0x7c
 	.4byte	0x109
 	.2byte	0x168
 	.uleb128 0x16
-	.4byte	.LASF300
+	.4byte	.LASF301
 	.byte	0x1a
 	.byte	0x7d
 	.4byte	0x109
 	.2byte	0x170
 	.uleb128 0x16
-	.4byte	.LASF301
+	.4byte	.LASF302
 	.byte	0x1a
 	.byte	0x83
 	.4byte	0xb8
 	.2byte	0x178
 	.uleb128 0x16
-	.4byte	.LASF302
+	.4byte	.LASF303
 	.byte	0x1a
 	.byte	0x88
-	.4byte	0xd11
+	.4byte	0xd08
 	.2byte	0x180
+	.uleb128 0x16
+	.4byte	.LASF304
+	.byte	0x1a
+	.byte	0x89
+	.4byte	0x109
+	.2byte	0x198
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0xd4d
-	.uleb128 0xf
-	.4byte	.LASF303
+	.4byte	0xd44
+	.uleb128 0xe
+	.4byte	.LASF305
 	.byte	0x40
 	.byte	0x1b
 	.byte	0x2c
-	.4byte	0xfab
-	.uleb128 0x10
+	.4byte	0xfaf
+	.uleb128 0xf
 	.4byte	.LASF28
 	.byte	0x1b
 	.byte	0x2d
 	.4byte	0xd5
 	.byte	0
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF135
 	.byte	0x1b
 	.byte	0x2e
 	.4byte	0xd5
 	.byte	0x8
-	.uleb128 0x10
-	.4byte	.LASF304
+	.uleb128 0xf
+	.4byte	.LASF306
 	.byte	0x1b
 	.byte	0x2f
-	.4byte	0x143c
+	.4byte	0x143a
 	.byte	0x10
-	.uleb128 0x10
-	.4byte	.LASF305
+	.uleb128 0xf
+	.4byte	.LASF307
 	.byte	0x1b
 	.byte	0x30
 	.4byte	0xd5
 	.byte	0x18
-	.uleb128 0x10
-	.4byte	.LASF306
+	.uleb128 0xf
+	.4byte	.LASF308
 	.byte	0x1b
 	.byte	0x32
-	.4byte	0x1484
+	.4byte	0x1482
 	.byte	0x20
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF34
 	.byte	0x1b
 	.byte	0x33
-	.4byte	0xfb0
+	.4byte	0xfb4
 	.byte	0x28
-	.uleb128 0x10
-	.4byte	.LASF307
+	.uleb128 0xf
+	.4byte	.LASF309
 	.byte	0x1b
 	.byte	0x34
-	.4byte	0xfb0
+	.4byte	0xfb4
 	.byte	0x30
-	.uleb128 0x10
-	.4byte	.LASF308
+	.uleb128 0xf
+	.4byte	.LASF310
 	.byte	0x1b
 	.byte	0x35
-	.4byte	0xfb0
+	.4byte	0xfb4
 	.byte	0x38
 	.byte	0
 	.uleb128 0x8
-	.4byte	0xf3e
+	.4byte	0xf42
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0xf3e
+	.4byte	0xf42
 	.uleb128 0x27
-	.4byte	.LASF471
+	.4byte	.LASF464
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0xfb6
+	.4byte	0xfba
 	.uleb128 0xb
 	.4byte	0xe0
-	.4byte	0xfd1
-	.uleb128 0xc
+	.4byte	0xfd5
+	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x1f
 	.byte	0
 	.uleb128 0x2
-	.4byte	.LASF309
+	.4byte	.LASF311
 	.byte	0x1a
-	.byte	0x8e
-	.4byte	0xd4d
+	.byte	0x8f
+	.4byte	0xd44
 	.uleb128 0x4
-	.4byte	0xfd1
+	.4byte	0xfd5
 	.uleb128 0x5
-	.4byte	.LASF310
-	.byte	0x6
+	.4byte	.LASF312
+	.byte	0x5
 	.byte	0xab
 	.4byte	0x109
 	.uleb128 0xb
 	.4byte	0x99
-	.4byte	0xff7
-	.uleb128 0xd
+	.4byte	0xffb
+	.uleb128 0xc
 	.byte	0
 	.uleb128 0x5
-	.4byte	.LASF311
-	.byte	0x6
+	.4byte	.LASF313
+	.byte	0x5
 	.byte	0xad
-	.4byte	0xfec
+	.4byte	0xff0
 	.uleb128 0x5
-	.4byte	.LASF312
-	.byte	0x6
+	.4byte	.LASF314
+	.byte	0x5
 	.byte	0xae
-	.4byte	0xfec
+	.4byte	0xff0
 	.uleb128 0x5
-	.4byte	.LASF313
-	.byte	0x6
+	.4byte	.LASF315
+	.byte	0x5
 	.byte	0xfc
 	.4byte	0x109
 	.uleb128 0x5
-	.4byte	.LASF314
-	.byte	0x6
+	.4byte	.LASF316
+	.byte	0x5
 	.byte	0xfd
 	.4byte	0x109
 	.uleb128 0x5
-	.4byte	.LASF315
-	.byte	0x6
+	.4byte	.LASF317
+	.byte	0x5
 	.byte	0xfe
 	.4byte	0x109
-	.uleb128 0xf
-	.4byte	.LASF316
+	.uleb128 0xe
+	.4byte	.LASF318
 	.byte	0x4
 	.byte	0x1c
 	.byte	0x2e
-	.4byte	0x1047
-	.uleb128 0x10
-	.4byte	.LASF317
+	.4byte	0x104b
+	.uleb128 0xf
+	.4byte	.LASF319
 	.byte	0x1c
 	.byte	0x2f
 	.4byte	0x12a
@@ -4134,79 +3621,79 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x9
 	.byte	0x8
 	.4byte	0x29
-	.uleb128 0xf
-	.4byte	.LASF318
+	.uleb128 0xe
+	.4byte	.LASF320
 	.byte	0x68
 	.byte	0x1c
 	.byte	0xa6
-	.4byte	0x10ea
-	.uleb128 0x10
+	.4byte	0x10ee
+	.uleb128 0xf
 	.4byte	.LASF28
 	.byte	0x1c
 	.byte	0xa8
-	.4byte	0x10ea
+	.4byte	0x10ee
 	.byte	0
-	.uleb128 0x10
-	.4byte	.LASF319
+	.uleb128 0xf
+	.4byte	.LASF321
 	.byte	0x1c
 	.byte	0xa9
-	.4byte	0x290
+	.4byte	0x280
 	.byte	0x10
-	.uleb128 0x10
-	.4byte	.LASF320
+	.uleb128 0xf
+	.4byte	.LASF322
 	.byte	0x1c
 	.byte	0xaa
 	.4byte	0xb8
 	.byte	0x18
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF164
 	.byte	0x1c
 	.byte	0xab
 	.4byte	0x59
 	.byte	0x20
-	.uleb128 0x10
-	.4byte	.LASF321
+	.uleb128 0xf
+	.4byte	.LASF323
 	.byte	0x1c
 	.byte	0xad
-	.4byte	0x1114
+	.4byte	0x1118
 	.byte	0x28
-	.uleb128 0x10
-	.4byte	.LASF322
+	.uleb128 0xf
+	.4byte	.LASF324
 	.byte	0x1c
 	.byte	0xae
-	.4byte	0x1133
+	.4byte	0x1137
 	.byte	0x30
-	.uleb128 0x10
-	.4byte	.LASF323
+	.uleb128 0xf
+	.4byte	.LASF325
 	.byte	0x1c
 	.byte	0xaf
-	.4byte	0x1148
+	.4byte	0x114c
 	.byte	0x38
-	.uleb128 0x10
-	.4byte	.LASF324
+	.uleb128 0xf
+	.4byte	.LASF326
 	.byte	0x1c
 	.byte	0xb0
-	.4byte	0x1159
+	.4byte	0x115d
 	.byte	0x40
-	.uleb128 0x10
-	.4byte	.LASF325
+	.uleb128 0xf
+	.4byte	.LASF327
 	.byte	0x1c
 	.byte	0xb4
-	.4byte	0x1148
+	.4byte	0x114c
 	.byte	0x48
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF47
 	.byte	0x1c
 	.byte	0xb5
-	.4byte	0x110e
+	.4byte	0x1112
 	.byte	0x50
-	.uleb128 0x10
-	.4byte	.LASF326
+	.uleb128 0xf
+	.4byte	.LASF328
 	.byte	0x1c
 	.byte	0xb6
 	.4byte	0x59
 	.byte	0x58
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF35
 	.byte	0x1c
 	.byte	0xb7
@@ -4215,30 +3702,30 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0xb
 	.4byte	0xe0
-	.4byte	0x10fa
-	.uleb128 0xc
+	.4byte	0x10fe
+	.uleb128 0x12
 	.4byte	0xce
 	.byte	0xf
 	.byte	0
 	.uleb128 0x13
 	.4byte	0x59
-	.4byte	0x110e
+	.4byte	0x1112
 	.uleb128 0x14
-	.4byte	0x110e
+	.4byte	0x1112
 	.uleb128 0x14
-	.4byte	0xa52
+	.4byte	0xa43
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x104d
+	.4byte	0x1051
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x10fa
+	.4byte	0x10fe
 	.uleb128 0x13
 	.4byte	0x59
-	.4byte	0x1133
+	.4byte	0x1137
 	.uleb128 0x14
-	.4byte	0x110e
+	.4byte	0x1112
 	.uleb128 0x14
 	.4byte	0x135
 	.uleb128 0x14
@@ -4246,434 +3733,429 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x111a
+	.4byte	0x111e
 	.uleb128 0x13
 	.4byte	0x59
-	.4byte	0x1148
+	.4byte	0x114c
 	.uleb128 0x14
-	.4byte	0x110e
+	.4byte	0x1112
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x1139
+	.4byte	0x113d
 	.uleb128 0x28
-	.4byte	0x1159
+	.4byte	0x115d
 	.uleb128 0x14
-	.4byte	0x110e
+	.4byte	0x1112
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x114e
+	.4byte	0x1152
 	.uleb128 0x5
-	.4byte	.LASF327
+	.4byte	.LASF329
 	.byte	0x1c
 	.byte	0xbd
-	.4byte	0x110e
+	.4byte	0x1112
 	.uleb128 0xb
 	.4byte	0x99
-	.4byte	0x117a
-	.uleb128 0xc
+	.4byte	0x117e
+	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x5
 	.byte	0
-	.uleb128 0xe
-	.4byte	.LASF328
+	.uleb128 0xd
+	.4byte	.LASF330
 	.byte	0x1c
 	.2byte	0x1fd
-	.4byte	0x102e
-	.uleb128 0xe
-	.4byte	.LASF329
+	.4byte	0x1032
+	.uleb128 0xd
+	.4byte	.LASF331
 	.byte	0x1c
 	.2byte	0x1fe
-	.4byte	0x102e
-	.uleb128 0xe
-	.4byte	.LASF330
+	.4byte	0x1032
+	.uleb128 0xd
+	.4byte	.LASF332
 	.byte	0x1c
 	.2byte	0x200
-	.4byte	0x102e
-	.uleb128 0xe
-	.4byte	.LASF331
+	.4byte	0x1032
+	.uleb128 0xd
+	.4byte	.LASF333
 	.byte	0x1c
 	.2byte	0x205
-	.4byte	0xfc1
-	.uleb128 0xe
-	.4byte	.LASF332
+	.4byte	0xfc5
+	.uleb128 0xd
+	.4byte	.LASF334
 	.byte	0x1c
 	.2byte	0x206
-	.4byte	0xfc1
+	.4byte	0xfc5
 	.uleb128 0xb
 	.4byte	0xe0
-	.4byte	0x11c6
-	.uleb128 0xc
+	.4byte	0x11ca
+	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x3f
 	.byte	0
-	.uleb128 0xe
-	.4byte	.LASF333
+	.uleb128 0xd
+	.4byte	.LASF335
 	.byte	0x1c
 	.2byte	0x207
-	.4byte	0x11b6
-	.uleb128 0xe
-	.4byte	.LASF334
+	.4byte	0x11ba
+	.uleb128 0xd
+	.4byte	.LASF336
 	.byte	0x1c
 	.2byte	0x209
-	.4byte	0x116a
-	.uleb128 0xe
-	.4byte	.LASF335
+	.4byte	0x116e
+	.uleb128 0xd
+	.4byte	.LASF337
 	.byte	0x1c
 	.2byte	0x20a
-	.4byte	0x116a
-	.uleb128 0xe
-	.4byte	.LASF336
+	.4byte	0x116e
+	.uleb128 0xd
+	.4byte	.LASF338
 	.byte	0x1c
 	.2byte	0x20b
-	.4byte	0x102e
-	.uleb128 0xe
-	.4byte	.LASF337
+	.4byte	0x1032
+	.uleb128 0xd
+	.4byte	.LASF339
 	.byte	0x1c
 	.2byte	0x20c
-	.4byte	0x102e
-	.uleb128 0xe
-	.4byte	.LASF338
+	.4byte	0x1032
+	.uleb128 0xd
+	.4byte	.LASF340
 	.byte	0x1c
 	.2byte	0x20d
-	.4byte	0x1047
+	.4byte	0x104b
 	.uleb128 0xb
-	.4byte	0x1047
-	.4byte	0x121e
-	.uleb128 0xc
+	.4byte	0x104b
+	.4byte	0x1222
+	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x3
 	.byte	0
-	.uleb128 0xe
-	.4byte	.LASF339
+	.uleb128 0xd
+	.4byte	.LASF341
 	.byte	0x1c
 	.2byte	0x20e
-	.4byte	0x120e
-	.uleb128 0xe
-	.4byte	.LASF340
+	.4byte	0x1212
+	.uleb128 0xd
+	.4byte	.LASF342
 	.byte	0x1c
 	.2byte	0x20f
-	.4byte	0x1047
-	.uleb128 0xe
-	.4byte	.LASF341
+	.4byte	0x104b
+	.uleb128 0xd
+	.4byte	.LASF343
 	.byte	0x1c
 	.2byte	0x210
 	.4byte	0x59
 	.uleb128 0xb
 	.4byte	0xa3
-	.4byte	0x1252
-	.uleb128 0xc
+	.4byte	0x1256
+	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x5
 	.byte	0
 	.uleb128 0x8
-	.4byte	0x1242
-	.uleb128 0xe
-	.4byte	.LASF342
+	.4byte	0x1246
+	.uleb128 0xd
+	.4byte	.LASF344
 	.byte	0x1c
 	.2byte	0x211
-	.4byte	0x1252
-	.uleb128 0xe
-	.4byte	.LASF343
+	.4byte	0x1256
+	.uleb128 0xd
+	.4byte	.LASF345
 	.byte	0x1c
 	.2byte	0x212
-	.4byte	0x1252
-	.uleb128 0xe
-	.4byte	.LASF344
+	.4byte	0x1256
+	.uleb128 0xd
+	.4byte	.LASF346
 	.byte	0x1c
 	.2byte	0x216
 	.4byte	0xfe
-	.uleb128 0xe
-	.4byte	.LASF345
+	.uleb128 0xd
+	.4byte	.LASF347
 	.byte	0x1c
 	.2byte	0x217
 	.4byte	0xfe
-	.uleb128 0xe
-	.4byte	.LASF346
+	.uleb128 0xd
+	.4byte	.LASF348
 	.byte	0x1c
 	.2byte	0x219
 	.4byte	0x59
 	.uleb128 0xb
 	.4byte	0xe0
-	.4byte	0x12a4
+	.4byte	0x12a8
 	.uleb128 0x17
 	.4byte	0xce
 	.2byte	0x3ff
 	.byte	0
-	.uleb128 0xe
-	.4byte	.LASF347
+	.uleb128 0xd
+	.4byte	.LASF349
 	.byte	0x1c
 	.2byte	0x220
-	.4byte	0x1293
-	.uleb128 0xe
-	.4byte	.LASF348
+	.4byte	0x1297
+	.uleb128 0xd
+	.4byte	.LASF350
 	.byte	0x1c
 	.2byte	0x222
 	.4byte	0xa8
-	.uleb128 0xe
-	.4byte	.LASF349
+	.uleb128 0xd
+	.4byte	.LASF351
 	.byte	0x1c
 	.2byte	0x224
 	.4byte	0xa8
-	.uleb128 0xe
-	.4byte	.LASF350
+	.uleb128 0xd
+	.4byte	.LASF352
 	.byte	0x1c
 	.2byte	0x230
-	.4byte	0x102e
+	.4byte	0x1032
 	.uleb128 0x29
-	.4byte	.LASF351
+	.4byte	.LASF353
 	.byte	0x4
 	.4byte	0x84
 	.byte	0x1c
 	.2byte	0x286
-	.4byte	0x12fe
+	.4byte	0x1302
 	.uleb128 0x1c
-	.4byte	.LASF352
+	.4byte	.LASF354
 	.byte	0
 	.uleb128 0x1c
-	.4byte	.LASF353
+	.4byte	.LASF355
 	.byte	0x1
 	.uleb128 0x1c
-	.4byte	.LASF354
+	.4byte	.LASF356
 	.byte	0x2
 	.uleb128 0x1c
-	.4byte	.LASF355
+	.4byte	.LASF357
 	.byte	0x3
 	.byte	0
-	.uleb128 0xe
-	.4byte	.LASF356
+	.uleb128 0xd
+	.4byte	.LASF358
 	.byte	0x1c
 	.2byte	0x28c
-	.4byte	0x12d4
-	.uleb128 0xe
-	.4byte	.LASF357
+	.4byte	0x12d8
+	.uleb128 0xd
+	.4byte	.LASF359
 	.byte	0x1d
 	.2byte	0x3ba
 	.4byte	0x109
-	.uleb128 0xe
-	.4byte	.LASF358
+	.uleb128 0xd
+	.4byte	.LASF360
 	.byte	0x1d
 	.2byte	0x3bb
 	.4byte	0x109
-	.uleb128 0xe
-	.4byte	.LASF359
+	.uleb128 0xd
+	.4byte	.LASF361
 	.byte	0x1d
 	.2byte	0x3bc
 	.4byte	0x109
 	.uleb128 0xb
 	.4byte	0xa8
-	.4byte	0x133e
-	.uleb128 0xc
+	.4byte	0x1342
+	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x1f
 	.byte	0
 	.uleb128 0x2a
-	.4byte	.LASF403
-	.byte	0x4
+	.4byte	.LASF378
+	.byte	0x1
 	.byte	0xa
-	.4byte	0x132e
+	.4byte	0x1332
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_isi_pattern
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x99
-	.uleb128 0x9
-	.byte	0x8
 	.4byte	0xa8
-	.uleb128 0xf
+	.uleb128 0xe
 	.4byte	.LASF27
 	.byte	0x78
-	.byte	0xc
+	.byte	0xb
 	.byte	0xee
-	.4byte	0x1437
-	.uleb128 0x10
+	.4byte	0x1435
+	.uleb128 0xf
 	.4byte	.LASF28
-	.byte	0xc
+	.byte	0xb
 	.byte	0xef
 	.4byte	0xf3
 	.byte	0
-	.uleb128 0x11
+	.uleb128 0x10
 	.string	"id"
-	.byte	0xc
+	.byte	0xb
 	.byte	0xf0
-	.4byte	0xa70
+	.4byte	0xa61
 	.byte	0x8
-	.uleb128 0x10
-	.4byte	.LASF360
-	.byte	0xc
+	.uleb128 0xf
+	.4byte	.LASF362
+	.byte	0xb
 	.byte	0xf1
-	.4byte	0x156c
+	.4byte	0x1568
 	.byte	0x10
-	.uleb128 0x10
-	.4byte	.LASF361
-	.byte	0xc
+	.uleb128 0xf
+	.4byte	.LASF363
+	.byte	0xb
 	.byte	0xf2
-	.4byte	0x1581
+	.4byte	0x157d
 	.byte	0x18
-	.uleb128 0x10
-	.4byte	.LASF362
-	.byte	0xc
+	.uleb128 0xf
+	.4byte	.LASF364
+	.byte	0xb
 	.byte	0xf3
-	.4byte	0x1581
+	.4byte	0x157d
 	.byte	0x20
-	.uleb128 0x10
-	.4byte	.LASF363
-	.byte	0xc
+	.uleb128 0xf
+	.4byte	.LASF365
+	.byte	0xb
 	.byte	0xf4
-	.4byte	0x1581
+	.4byte	0x157d
 	.byte	0x28
-	.uleb128 0x10
-	.4byte	.LASF364
-	.byte	0xc
+	.uleb128 0xf
+	.4byte	.LASF366
+	.byte	0xb
 	.byte	0xf5
-	.4byte	0x1581
+	.4byte	0x157d
 	.byte	0x30
-	.uleb128 0x10
-	.4byte	.LASF365
-	.byte	0xc
+	.uleb128 0xf
+	.4byte	.LASF367
+	.byte	0xb
 	.byte	0xf6
-	.4byte	0x1581
+	.4byte	0x157d
 	.byte	0x38
-	.uleb128 0x10
-	.4byte	.LASF366
-	.byte	0xc
+	.uleb128 0xf
+	.4byte	.LASF368
+	.byte	0xb
 	.byte	0xf7
-	.4byte	0x1581
+	.4byte	0x157d
 	.byte	0x40
-	.uleb128 0x10
-	.4byte	.LASF367
-	.byte	0xc
+	.uleb128 0xf
+	.4byte	.LASF369
+	.byte	0xb
 	.byte	0xf8
-	.4byte	0x1581
+	.4byte	0x157d
 	.byte	0x48
-	.uleb128 0x10
-	.4byte	.LASF368
-	.byte	0xc
+	.uleb128 0xf
+	.4byte	.LASF370
+	.byte	0xb
 	.byte	0xf9
-	.4byte	0x1581
+	.4byte	0x157d
 	.byte	0x50
-	.uleb128 0x10
-	.4byte	.LASF369
-	.byte	0xc
+	.uleb128 0xf
+	.4byte	.LASF371
+	.byte	0xb
 	.byte	0xfa
 	.4byte	0x59
 	.byte	0x58
-	.uleb128 0x10
-	.4byte	.LASF370
-	.byte	0xc
+	.uleb128 0xf
+	.4byte	.LASF372
+	.byte	0xb
 	.byte	0xfb
 	.4byte	0x59
 	.byte	0x5c
-	.uleb128 0x10
-	.4byte	.LASF371
-	.byte	0xc
+	.uleb128 0xf
+	.4byte	.LASF373
+	.byte	0xb
 	.byte	0xfc
 	.4byte	0x59
 	.byte	0x60
-	.uleb128 0x10
-	.4byte	.LASF372
-	.byte	0xc
+	.uleb128 0xf
+	.4byte	.LASF374
+	.byte	0xb
 	.byte	0xfd
 	.4byte	0x59
 	.byte	0x64
-	.uleb128 0x11
+	.uleb128 0x10
 	.string	"ops"
-	.byte	0xc
+	.byte	0xb
 	.byte	0xfe
-	.4byte	0x273
+	.4byte	0x263
 	.byte	0x68
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF42
-	.byte	0xc
+	.byte	0xb
 	.byte	0xff
 	.4byte	0x11f
 	.byte	0x70
 	.byte	0
 	.uleb128 0x8
-	.4byte	0x135f
+	.4byte	0x135d
 	.uleb128 0x2
-	.4byte	.LASF304
+	.4byte	.LASF306
 	.byte	0x1b
 	.byte	0xf
 	.4byte	0xa8
-	.uleb128 0xf
-	.4byte	.LASF373
+	.uleb128 0xe
+	.4byte	.LASF375
 	.byte	0x20
 	.byte	0x1b
 	.byte	0x19
-	.4byte	0x1484
-	.uleb128 0x10
+	.4byte	0x1482
+	.uleb128 0xf
 	.4byte	.LASF28
 	.byte	0x1b
 	.byte	0x1a
 	.4byte	0xf3
 	.byte	0
-	.uleb128 0x10
-	.4byte	.LASF374
+	.uleb128 0xf
+	.4byte	.LASF376
 	.byte	0x1b
 	.byte	0x1b
 	.4byte	0x59
 	.byte	0x8
-	.uleb128 0x10
-	.4byte	.LASF375
+	.uleb128 0xf
+	.4byte	.LASF377
 	.byte	0x1b
 	.byte	0x1c
 	.4byte	0x135
 	.byte	0x10
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF47
 	.byte	0x1b
 	.byte	0x1d
-	.4byte	0x1484
+	.4byte	0x1482
 	.byte	0x18
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x1447
+	.4byte	0x1445
 	.uleb128 0x2b
 	.string	"gd"
 	.byte	0x1b
 	.byte	0x57
-	.4byte	0x1496
-	.uleb128 0x1
-	.byte	0x62
+	.4byte	0x1492
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0xfdc
+	.4byte	0xfe0
 	.uleb128 0x2c
-	.4byte	.LASF472
+	.4byte	.LASF465
 	.byte	0x8
 	.byte	0x1e
 	.byte	0x33
-	.4byte	0x14be
+	.4byte	0x14ba
 	.uleb128 0x2d
 	.string	"np"
 	.byte	0x1e
 	.byte	0x34
-	.4byte	0x14be
+	.4byte	0x14ba
 	.uleb128 0x2e
-	.4byte	.LASF376
+	.4byte	.LASF379
 	.byte	0x1e
 	.byte	0x35
 	.4byte	0xec
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0xfab
+	.4byte	0xfaf
 	.uleb128 0x2
-	.4byte	.LASF377
+	.4byte	.LASF380
 	.byte	0x1e
 	.byte	0x36
-	.4byte	0x149c
-	.uleb128 0xf
-	.4byte	.LASF378
+	.4byte	0x1498
+	.uleb128 0xe
+	.4byte	.LASF381
 	.byte	0x4
 	.byte	0x1f
 	.byte	0xc
-	.4byte	0x14e8
-	.uleb128 0x11
+	.4byte	0x14e4
+	.uleb128 0x10
 	.string	"pid"
 	.byte	0x1f
 	.byte	0xd
@@ -4681,192 +4163,192 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.byte	0
 	.uleb128 0x5
-	.4byte	.LASF379
+	.4byte	.LASF382
 	.byte	0x1f
 	.byte	0x10
-	.4byte	0x14f3
+	.4byte	0x14ef
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x14cf
+	.4byte	0x14cb
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x1437
-	.uleb128 0xf
+	.4byte	0x1435
+	.uleb128 0xe
 	.4byte	.LASF36
 	.byte	0x30
 	.byte	0x20
 	.byte	0x23
-	.4byte	0x153c
-	.uleb128 0x10
+	.4byte	0x1538
+	.uleb128 0xf
 	.4byte	.LASF35
 	.byte	0x20
 	.byte	0x24
 	.4byte	0x135
 	.byte	0
-	.uleb128 0x10
-	.4byte	.LASF380
+	.uleb128 0xf
+	.4byte	.LASF383
 	.byte	0x20
 	.byte	0x25
-	.4byte	0x166b
+	.4byte	0x1667
 	.byte	0x8
-	.uleb128 0x10
-	.4byte	.LASF381
+	.uleb128 0xf
+	.4byte	.LASF384
 	.byte	0x20
 	.byte	0x26
-	.4byte	0x2a0
+	.4byte	0x290
 	.byte	0x10
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF41
 	.byte	0x20
 	.byte	0x27
-	.4byte	0x2a0
+	.4byte	0x290
 	.byte	0x20
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x14ff
-	.uleb128 0xf
-	.4byte	.LASF382
+	.4byte	0x14fb
+	.uleb128 0xe
+	.4byte	.LASF385
 	.byte	0x10
-	.byte	0xc
+	.byte	0xb
 	.byte	0xb5
-	.4byte	0x1567
-	.uleb128 0x10
-	.4byte	.LASF383
-	.byte	0xc
+	.4byte	0x1563
+	.uleb128 0xf
+	.4byte	.LASF386
+	.byte	0xb
 	.byte	0xb6
 	.4byte	0xd5
 	.byte	0
-	.uleb128 0x10
-	.4byte	.LASF384
-	.byte	0xc
+	.uleb128 0xf
+	.4byte	.LASF387
+	.byte	0xb
 	.byte	0xb7
 	.4byte	0x109
 	.byte	0x8
 	.byte	0
 	.uleb128 0x8
-	.4byte	0x1542
+	.4byte	0x153e
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x1567
+	.4byte	0x1563
 	.uleb128 0x13
 	.4byte	0x59
-	.4byte	0x1581
+	.4byte	0x157d
 	.uleb128 0x14
-	.4byte	0x26d
+	.4byte	0x25d
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x1572
-	.uleb128 0xf
-	.4byte	.LASF385
+	.4byte	0x156e
+	.uleb128 0xe
+	.4byte	.LASF388
 	.byte	0x80
 	.byte	0x20
 	.byte	0x54
-	.4byte	0x166b
-	.uleb128 0x10
+	.4byte	0x1667
+	.uleb128 0xf
 	.4byte	.LASF28
 	.byte	0x20
 	.byte	0x55
 	.4byte	0xd5
 	.byte	0
-	.uleb128 0x11
+	.uleb128 0x10
 	.string	"id"
 	.byte	0x20
 	.byte	0x56
-	.4byte	0xa70
+	.4byte	0xa61
 	.byte	0x8
-	.uleb128 0x10
-	.4byte	.LASF386
+	.uleb128 0xf
+	.4byte	.LASF389
 	.byte	0x20
 	.byte	0x57
-	.4byte	0x1581
+	.4byte	0x157d
 	.byte	0x10
-	.uleb128 0x10
-	.4byte	.LASF387
+	.uleb128 0xf
+	.4byte	.LASF390
 	.byte	0x20
 	.byte	0x58
-	.4byte	0x1581
+	.4byte	0x157d
 	.byte	0x18
-	.uleb128 0x10
-	.4byte	.LASF388
+	.uleb128 0xf
+	.4byte	.LASF391
 	.byte	0x20
 	.byte	0x59
-	.4byte	0x1581
+	.4byte	0x157d
 	.byte	0x20
-	.uleb128 0x10
-	.4byte	.LASF389
+	.uleb128 0xf
+	.4byte	.LASF392
 	.byte	0x20
 	.byte	0x5a
-	.4byte	0x1581
+	.4byte	0x157d
 	.byte	0x28
-	.uleb128 0x10
-	.4byte	.LASF390
+	.uleb128 0xf
+	.4byte	.LASF393
 	.byte	0x20
 	.byte	0x5b
-	.4byte	0x1581
+	.4byte	0x157d
 	.byte	0x30
-	.uleb128 0x10
-	.4byte	.LASF366
+	.uleb128 0xf
+	.4byte	.LASF368
 	.byte	0x20
 	.byte	0x5c
-	.4byte	0x1581
+	.4byte	0x157d
 	.byte	0x38
-	.uleb128 0x10
-	.4byte	.LASF367
+	.uleb128 0xf
+	.4byte	.LASF369
 	.byte	0x20
 	.byte	0x5d
-	.4byte	0x1581
+	.4byte	0x157d
 	.byte	0x40
-	.uleb128 0x10
-	.4byte	.LASF321
+	.uleb128 0xf
+	.4byte	.LASF323
 	.byte	0x20
 	.byte	0x5e
-	.4byte	0x1680
+	.4byte	0x167c
 	.byte	0x48
-	.uleb128 0x10
-	.4byte	.LASF391
+	.uleb128 0xf
+	.4byte	.LASF394
 	.byte	0x20
 	.byte	0x5f
-	.4byte	0x1680
+	.4byte	0x167c
 	.byte	0x50
-	.uleb128 0x10
-	.4byte	.LASF369
+	.uleb128 0xf
+	.4byte	.LASF371
 	.byte	0x20
 	.byte	0x60
 	.4byte	0x59
 	.byte	0x58
-	.uleb128 0x10
-	.4byte	.LASF392
+	.uleb128 0xf
+	.4byte	.LASF395
 	.byte	0x20
 	.byte	0x61
 	.4byte	0x59
 	.byte	0x5c
-	.uleb128 0x10
-	.4byte	.LASF393
+	.uleb128 0xf
+	.4byte	.LASF396
 	.byte	0x20
 	.byte	0x62
 	.4byte	0x59
 	.byte	0x60
-	.uleb128 0x10
-	.4byte	.LASF371
+	.uleb128 0xf
+	.4byte	.LASF373
 	.byte	0x20
 	.byte	0x63
 	.4byte	0x59
 	.byte	0x64
-	.uleb128 0x10
-	.4byte	.LASF372
+	.uleb128 0xf
+	.4byte	.LASF374
 	.byte	0x20
 	.byte	0x64
 	.4byte	0x59
 	.byte	0x68
-	.uleb128 0x11
+	.uleb128 0x10
 	.string	"ops"
 	.byte	0x20
 	.byte	0x65
-	.4byte	0x273
+	.4byte	0x263
 	.byte	0x70
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF42
 	.byte	0x20
 	.byte	0x66
@@ -4875,1012 +4357,780 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x1587
+	.4byte	0x1583
 	.uleb128 0x13
 	.4byte	0x59
-	.4byte	0x1680
+	.4byte	0x167c
 	.uleb128 0x14
-	.4byte	0x153c
+	.4byte	0x1538
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x1671
+	.4byte	0x166d
 	.uleb128 0x5
-	.4byte	.LASF394
+	.4byte	.LASF397
 	.byte	0x21
 	.byte	0xb
-	.4byte	0x159
+	.4byte	0x149
 	.uleb128 0x25
 	.byte	0x4
 	.4byte	0x84
-	.byte	0x1
-	.byte	0x14
-	.4byte	0x16ce
+	.byte	0x2
+	.byte	0x13
+	.4byte	0x16ca
 	.uleb128 0x1c
-	.4byte	.LASF395
+	.4byte	.LASF398
 	.byte	0
 	.uleb128 0x1c
-	.4byte	.LASF396
+	.4byte	.LASF399
 	.byte	0x1
 	.uleb128 0x1c
-	.4byte	.LASF397
+	.4byte	.LASF400
 	.byte	0x2
 	.uleb128 0x1c
-	.4byte	.LASF398
+	.4byte	.LASF401
 	.byte	0x3
 	.uleb128 0x1c
-	.4byte	.LASF399
+	.4byte	.LASF402
 	.byte	0x4
 	.uleb128 0x1c
-	.4byte	.LASF400
+	.4byte	.LASF403
 	.byte	0x5
 	.uleb128 0x1c
-	.4byte	.LASF401
+	.4byte	.LASF404
 	.byte	0x6
 	.uleb128 0x1c
-	.4byte	.LASF402
+	.4byte	.LASF405
 	.byte	0x7
 	.byte	0
 	.uleb128 0xb
 	.4byte	0xdb
-	.4byte	0x16de
-	.uleb128 0xc
+	.4byte	0x16da
+	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x6
 	.byte	0
 	.uleb128 0x8
-	.4byte	0x16ce
+	.4byte	0x16ca
 	.uleb128 0x2a
-	.4byte	.LASF404
-	.byte	0x1
-	.byte	0x1f
-	.4byte	0x16de
+	.4byte	.LASF406
+	.byte	0x2
+	.byte	0x1e
+	.4byte	0x16da
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	test_pattern
 	.uleb128 0xb
 	.4byte	0xa3
-	.4byte	0x1708
-	.uleb128 0xc
+	.4byte	0x1704
+	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x6
 	.byte	0
 	.uleb128 0x8
-	.4byte	0x16f8
+	.4byte	0x16f4
 	.uleb128 0x2a
-	.4byte	.LASF405
-	.byte	0x1
-	.byte	0x29
-	.4byte	0x1708
+	.4byte	.LASF407
+	.byte	0x2
+	.byte	0x28
+	.4byte	0x1704
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	test_pat_param
 	.uleb128 0x2f
-	.4byte	.LASF406
-	.byte	0x1
-	.2byte	0x185
-	.4byte	0x68c
+	.4byte	.LASF408
+	.byte	0x2
+	.2byte	0x136
+	.4byte	0x67c
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	_u_boot_list_2_cmd_2_ddr_test
 	.uleb128 0x30
-	.4byte	.LASF414
-	.byte	0x3
-	.byte	0x50
-	.8byte	.LFB279
-	.8byte	.LFE279-.LFB279
+	.4byte	.LASF417
+	.byte	0x4
+	.byte	0x60
+	.4byte	0x59
+	.8byte	.LFB272
+	.8byte	.LFE272-.LFB272
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x17b3
+	.4byte	0x19e8
 	.uleb128 0x31
-	.4byte	.LASF267
-	.byte	0x3
-	.byte	0x50
-	.4byte	0x135
-	.4byte	.LLST69
+	.4byte	.LASF409
+	.byte	0x4
+	.byte	0x60
+	.4byte	0x109
+	.4byte	.LLST15
 	.uleb128 0x31
-	.4byte	.LASF51
-	.byte	0x3
-	.byte	0x50
+	.4byte	.LASF410
+	.byte	0x4
+	.byte	0x60
 	.4byte	0x109
-	.4byte	.LLST70
-	.uleb128 0x32
-	.string	"p"
-	.byte	0x3
-	.byte	0x52
-	.4byte	0x1359
-	.4byte	.LLST71
+	.4byte	.LLST16
 	.uleb128 0x32
-	.string	"i"
-	.byte	0x3
-	.byte	0x53
-	.4byte	0xa8
-	.4byte	.LLST72
-	.uleb128 0x33
-	.8byte	.LVL254
-	.4byte	0x2873
-	.uleb128 0x34
+	.string	"ret"
+	.byte	0x4
+	.byte	0x62
+	.4byte	0x59
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
+	.uleb128 0x33
+	.4byte	0x1a5c
+	.8byte	.LBB10
+	.4byte	.Ldebug_ranges0+0
+	.byte	0x4
+	.byte	0x64
+	.4byte	0x18c4
 	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0xd
-	.byte	0x83
-	.sleb128 -4
-	.byte	0xc
-	.4byte	0xffffffff
-	.byte	0x1a
-	.byte	0x32
-	.byte	0x24
-	.byte	0x84
-	.sleb128 0
-	.byte	0x22
-	.byte	0
-	.byte	0
+	.4byte	0x1a77
+	.4byte	.LLST17
+	.uleb128 0x34
+	.4byte	0x1a6c
+	.4byte	.LLST18
 	.uleb128 0x35
-	.4byte	.LASF417
-	.byte	0x3
-	.byte	0x2e
-	.4byte	0x109
-	.8byte	.LFB278
-	.8byte	.LFE278-.LFB278
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x18b3
+	.4byte	.Ldebug_ranges0+0
 	.uleb128 0x36
-	.string	"buf"
-	.byte	0x3
-	.byte	0x2e
-	.4byte	0x1359
+	.4byte	0x1a82
+	.4byte	.LLST19
+	.uleb128 0x36
+	.4byte	0x1a8b
+	.4byte	.LLST20
+	.uleb128 0x36
+	.4byte	0x1a94
+	.4byte	.LLST21
+	.uleb128 0x36
+	.4byte	0x1a9f
+	.4byte	.LLST22
+	.uleb128 0x37
+	.4byte	0x1aaa
+	.uleb128 0x36
+	.4byte	0x1ab5
 	.4byte	.LLST23
-	.uleb128 0x31
-	.4byte	.LASF407
-	.byte	0x3
-	.byte	0x2e
-	.4byte	0xa8
+	.uleb128 0x36
+	.4byte	0x1ac0
 	.4byte	.LLST24
-	.uleb128 0x31
-	.4byte	.LASF408
-	.byte	0x3
-	.byte	0x2e
-	.4byte	0x109
+	.uleb128 0x36
+	.4byte	0x1acb
 	.4byte	.LLST25
-	.uleb128 0x31
-	.4byte	.LASF374
-	.byte	0x3
-	.byte	0x2e
-	.4byte	0x109
-	.4byte	.LLST26
-	.uleb128 0x31
-	.4byte	.LASF409
-	.byte	0x3
-	.byte	0x2f
-	.4byte	0xa8
-	.4byte	.LLST27
-	.uleb128 0x37
-	.4byte	.LASF410
-	.byte	0x3
-	.byte	0x31
-	.4byte	0x18b3
-	.4byte	.LLST28
-	.uleb128 0x32
-	.string	"p"
-	.byte	0x3
-	.byte	0x32
-	.4byte	0x18b9
-	.4byte	.LLST29
-	.uleb128 0x32
-	.string	"i"
-	.byte	0x3
-	.byte	0x33
-	.4byte	0xa8
-	.4byte	.LLST30
-	.uleb128 0x32
-	.string	"j"
-	.byte	0x3
-	.byte	0x33
-	.4byte	0xa8
-	.4byte	.LLST31
-	.uleb128 0x32
-	.string	"val"
-	.byte	0x3
-	.byte	0x34
-	.4byte	0x109
-	.4byte	.LLST32
-	.uleb128 0x37
-	.4byte	.LASF411
-	.byte	0x3
-	.byte	0x34
-	.4byte	0x109
-	.4byte	.LLST33
-	.uleb128 0x37
-	.4byte	.LASF412
-	.byte	0x3
-	.byte	0x34
-	.4byte	0x109
-	.4byte	.LLST34
-	.uleb128 0x37
-	.4byte	.LASF413
-	.byte	0x3
-	.byte	0x34
-	.4byte	0x109
-	.4byte	.LLST35
-	.uleb128 0x33
-	.8byte	.LVL80
-	.4byte	0x2873
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL64
+	.4byte	0x241c
+	.4byte	0x181a
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC12
-	.uleb128 0x34
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
+	.uleb128 0x6
+	.byte	0x11
+	.sleb128 -2139062144
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x52
 	.uleb128 0x2
-	.byte	0x83
+	.byte	0x84
 	.sleb128 0
 	.byte	0
-	.byte	0
-	.uleb128 0x9
-	.byte	0x8
-	.4byte	0x109
-	.uleb128 0x9
-	.byte	0x8
-	.4byte	0x42
-	.uleb128 0x30
-	.4byte	.LASF415
-	.byte	0x3
-	.byte	0x1c
-	.8byte	.LFB277
-	.8byte	.LFE277-.LFB277
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x1947
 	.uleb128 0x38
-	.string	"buf"
-	.byte	0x3
-	.byte	0x1c
-	.4byte	0x1359
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x31
-	.4byte	.LASF407
-	.byte	0x3
-	.byte	0x1c
-	.4byte	0xa8
-	.4byte	.LLST19
+	.8byte	.LVL66
+	.4byte	0x2428
+	.4byte	0x1838
 	.uleb128 0x39
-	.4byte	.LASF408
-	.byte	0x3
-	.byte	0x1c
-	.4byte	0x109
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x31
-	.4byte	.LASF374
-	.byte	0x3
-	.byte	0x1c
-	.4byte	0x109
-	.4byte	.LLST20
-	.uleb128 0x2a
-	.4byte	.LASF410
-	.byte	0x3
-	.byte	0x1e
-	.4byte	0x18b3
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3a
-	.string	"p"
-	.byte	0x3
-	.byte	0x1f
-	.4byte	0x18b3
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x32
-	.string	"i"
-	.byte	0x3
-	.byte	0x20
-	.4byte	0xa8
-	.4byte	.LLST21
-	.uleb128 0x32
-	.string	"j"
-	.byte	0x3
-	.byte	0x20
-	.4byte	0xa8
-	.4byte	.LLST22
-	.byte	0
-	.uleb128 0x30
-	.4byte	.LASF416
-	.byte	0x3
-	.byte	0xa
-	.8byte	.LFB276
-	.8byte	.LFE276-.LFB276
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x19a9
-	.uleb128 0x36
-	.string	"p"
-	.byte	0x3
-	.byte	0xa
-	.4byte	0x1359
-	.4byte	.LLST16
-	.uleb128 0x3a
-	.string	"buf"
-	.byte	0x3
-	.byte	0xf
-	.4byte	0x142
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -16
-	.uleb128 0x32
-	.string	"tmp"
-	.byte	0x3
-	.byte	0x10
-	.4byte	0x1353
-	.4byte	.LLST17
-	.uleb128 0x32
-	.string	"i"
-	.byte	0x3
-	.byte	0x11
-	.4byte	0x59
-	.4byte	.LLST18
-	.uleb128 0x3b
-	.8byte	.LVL58
-	.4byte	0x287e
-	.byte	0
-	.uleb128 0x35
-	.4byte	.LASF418
-	.byte	0x2
-	.byte	0x57
-	.4byte	0x59
-	.8byte	.LFB275
-	.8byte	.LFE275-.LFB275
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x1c22
-	.uleb128 0x31
-	.4byte	.LASF419
-	.byte	0x2
-	.byte	0x57
-	.4byte	0x109
-	.4byte	.LLST2
-	.uleb128 0x31
-	.4byte	.LASF420
-	.byte	0x2
-	.byte	0x57
-	.4byte	0x109
-	.4byte	.LLST3
-	.uleb128 0x3a
-	.string	"ret"
-	.byte	0x2
-	.byte	0x59
-	.4byte	0x59
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3c
-	.4byte	0x1c90
-	.8byte	.LBB18
-	.4byte	.Ldebug_ranges0+0
-	.byte	0x2
-	.byte	0x5b
-	.4byte	0x1b1c
-	.uleb128 0x3d
-	.4byte	0x1cab
-	.4byte	.LLST4
-	.uleb128 0x3d
-	.4byte	0x1ca0
-	.4byte	.LLST5
-	.uleb128 0x3e
-	.4byte	.Ldebug_ranges0+0
-	.uleb128 0x3f
-	.4byte	0x1cb6
-	.4byte	.LLST6
-	.uleb128 0x3f
-	.4byte	0x1cbf
-	.4byte	.LLST7
-	.uleb128 0x3f
-	.4byte	0x1cc8
-	.4byte	.LLST8
-	.uleb128 0x3f
-	.4byte	0x1cd3
-	.4byte	.LLST9
-	.uleb128 0x40
-	.4byte	0x1cde
-	.uleb128 0x3f
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 	.sleb128 144
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	.LANCHOR1
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x20
 	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL124
-	.4byte	0x2873
-	.4byte	0x1e5f
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL39
+	.4byte	0x2428
+	.4byte	0x1bda
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC18
+	.8byte	.LC6
 	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL127
-	.4byte	0x1947
-	.4byte	0x1e78
-	.uleb128 0x34
+	.uleb128 0x45
+	.8byte	.LVL40
+	.4byte	0x2448
+	.uleb128 0x38
+	.8byte	.LVL42
+	.4byte	0x2428
+	.4byte	0x1c0c
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC7
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x38
+	.8byte	.LVL49
+	.4byte	0x2453
+	.4byte	0x1c2b
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x3
 	.byte	0x8f
 	.sleb128 144
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
 	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL128
-	.4byte	0x287e
-	.4byte	0x1e9d
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL50
+	.4byte	0x245e
+	.4byte	0x1c50
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x87
+	.byte	0x89
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x3
 	.byte	0x8f
 	.sleb128 144
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x20
 	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL133
-	.4byte	0x287e
-	.4byte	0x1ec2
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL53
+	.4byte	0x245e
+	.4byte	0x1c75
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x8a
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x3
 	.byte	0x8f
 	.sleb128 144
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x20
 	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL134
-	.4byte	0x17b3
-	.4byte	0x1ef8
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL54
+	.4byte	0x246a
+	.4byte	0x1cab
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x3
 	.byte	0x8f
 	.sleb128 144
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x20
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x8
 	.byte	0x84
 	.sleb128 0
-	.byte	0x86
+	.byte	0x88
 	.sleb128 0
 	.byte	0x22
-	.byte	0x87
+	.byte	0x89
 	.sleb128 0
 	.byte	0x22
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x20
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x54
 	.uleb128 0x1
 	.byte	0x31
 	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL139
-	.4byte	0x287e
-	.4byte	0x1f29
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL59
+	.4byte	0x245e
+	.4byte	0x1cdc
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0xe
@@ -5892,50 +5142,50 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0x84
 	.sleb128 0
 	.byte	0x22
-	.byte	0x87
+	.byte	0x89
 	.sleb128 0
 	.byte	0x22
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x3
 	.byte	0x8f
 	.sleb128 144
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x20
 	.byte	0
-	.uleb128 0x33
-	.8byte	.LVL140
-	.4byte	0x17b3
-	.uleb128 0x34
+	.uleb128 0x3a
+	.8byte	.LVL60
+	.4byte	0x246a
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x3
 	.byte	0x8f
 	.sleb128 144
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x20
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x8a
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x20
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x54
 	.uleb128 0x1
@@ -5944,250 +5194,164 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0xb
 	.4byte	0xa8
-	.4byte	0x1f66
-	.uleb128 0xc
+	.4byte	0x1d19
+	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x7
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF432
-	.byte	0x5
-	.byte	0xc
-	.4byte	0x59
-	.byte	0x1
-	.4byte	0x1faf
-	.uleb128 0x48
-	.4byte	.LASF433
-	.byte	0x5
-	.byte	0xe
-	.4byte	0xa8
-	.uleb128 0x47
-	.string	"col"
-	.byte	0x5
-	.byte	0xf
-	.4byte	0xa8
-	.uleb128 0x47
-	.string	"bw"
-	.byte	0x5
-	.byte	0xf
-	.4byte	0xa8
-	.uleb128 0x48
-	.4byte	.LASF429
-	.byte	0x5
-	.byte	0x10
-	.4byte	0x59
-	.uleb128 0x4b
-	.uleb128 0x47
-	.string	"__v"
-	.byte	0x5
-	.byte	0x23
-	.4byte	0xa8
-	.byte	0
-	.byte	0
-	.uleb128 0x4c
-	.4byte	.LASF444
-	.byte	0x1
-	.byte	0xbc
+	.uleb128 0x46
+	.4byte	.LASF467
+	.byte	0x2
+	.byte	0x62
 	.4byte	0x59
-	.8byte	.LFB259
-	.8byte	.LFE259-.LFB259
+	.8byte	.LFB257
+	.8byte	.LFE257-.LFB257
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2425
+	.4byte	0x20c8
 	.uleb128 0x31
-	.4byte	.LASF434
-	.byte	0x1
-	.byte	0xbc
-	.4byte	0x2425
-	.4byte	.LLST52
+	.4byte	.LASF425
+	.byte	0x2
+	.byte	0x62
+	.4byte	0x20c8
+	.4byte	.LLST29
 	.uleb128 0x31
-	.4byte	.LASF435
-	.byte	0x1
-	.byte	0xbc
+	.4byte	.LASF426
+	.byte	0x2
+	.byte	0x62
 	.4byte	0x59
-	.4byte	.LLST53
+	.4byte	.LLST30
 	.uleb128 0x31
-	.4byte	.LASF436
-	.byte	0x1
-	.byte	0xbc
+	.4byte	.LASF427
+	.byte	0x2
+	.byte	0x62
 	.4byte	0x59
-	.4byte	.LLST54
+	.4byte	.LLST31
 	.uleb128 0x31
-	.4byte	.LASF437
-	.byte	0x1
-	.byte	0xbd
-	.4byte	0x651
-	.4byte	.LLST55
-	.uleb128 0x32
+	.4byte	.LASF428
+	.byte	0x2
+	.byte	0x63
+	.4byte	0x641
+	.4byte	.LLST32
+	.uleb128 0x43
 	.string	"i"
-	.byte	0x1
-	.byte	0xbf
+	.byte	0x2
+	.byte	0x65
 	.4byte	0x59
-	.4byte	.LLST56
-	.uleb128 0x37
-	.4byte	.LASF438
-	.byte	0x1
-	.byte	0xc0
+	.4byte	.LLST33
+	.uleb128 0x42
+	.4byte	.LASF429
+	.byte	0x2
+	.byte	0x66
 	.4byte	0x59
-	.4byte	.LLST57
-	.uleb128 0x37
-	.4byte	.LASF439
-	.byte	0x1
-	.byte	0xc0
+	.4byte	.LLST34
+	.uleb128 0x42
+	.4byte	.LASF430
+	.byte	0x2
+	.byte	0x66
 	.4byte	0x59
-	.4byte	.LLST58
-	.uleb128 0x3a
+	.4byte	.LLST35
+	.uleb128 0x32
 	.string	"arg"
-	.byte	0x1
-	.byte	0xc1
-	.4byte	0x242b
+	.byte	0x2
+	.byte	0x67
+	.4byte	0x20ce
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -40
 	.uleb128 0x2a
-	.4byte	.LASF408
-	.byte	0x1
-	.byte	0xc2
-	.4byte	0x243b
+	.4byte	.LASF419
+	.byte	0x2
+	.byte	0x68
+	.4byte	0x20de
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -104
 	.uleb128 0x2a
-	.4byte	.LASF374
-	.byte	0x1
-	.byte	0xc3
-	.4byte	0x243b
+	.4byte	.LASF376
+	.byte	0x2
+	.byte	0x69
+	.4byte	0x20de
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -72
-	.uleb128 0x37
-	.4byte	.LASF440
-	.byte	0x1
-	.byte	0xc4
+	.uleb128 0x42
+	.4byte	.LASF431
+	.byte	0x2
+	.byte	0x6a
 	.4byte	0xa8
-	.4byte	.LLST59
-	.uleb128 0x37
-	.4byte	.LASF441
-	.byte	0x1
-	.byte	0xc5
+	.4byte	.LLST36
+	.uleb128 0x42
+	.4byte	.LASF432
+	.byte	0x2
+	.byte	0x6b
 	.4byte	0xa8
-	.4byte	.LLST60
-	.uleb128 0x32
+	.4byte	.LLST37
+	.uleb128 0x42
+	.4byte	.LASF433
+	.byte	0x2
+	.byte	0x6c
+	.4byte	0xa8
+	.4byte	.LLST38
+	.uleb128 0x43
 	.string	"ret"
-	.byte	0x1
-	.byte	0xc6
+	.byte	0x2
+	.byte	0x6d
 	.4byte	0x59
-	.4byte	.LLST61
-	.uleb128 0x37
-	.4byte	.LASF442
-	.byte	0x1
-	.byte	0xc7
+	.4byte	.LLST39
+	.uleb128 0x42
+	.4byte	.LASF434
+	.byte	0x2
+	.byte	0x6e
 	.4byte	0x59
-	.4byte	.LLST62
-	.uleb128 0x48
-	.4byte	.LASF443
-	.byte	0x1
-	.byte	0xc8
-	.4byte	0xa8
-	.uleb128 0x3c
-	.4byte	0x2595
-	.8byte	.LBB46
-	.4byte	.Ldebug_ranges0+0xd0
-	.byte	0x1
-	.byte	0xcb
-	.4byte	0x213e
-	.uleb128 0x3d
-	.4byte	0x25ac
-	.4byte	.LLST63
-	.uleb128 0x3d
-	.4byte	0x25a1
-	.4byte	.LLST64
-	.uleb128 0x3e
-	.4byte	.Ldebug_ranges0+0xd0
-	.uleb128 0x3f
-	.4byte	0x25b7
-	.4byte	.LLST65
-	.uleb128 0x3f
-	.4byte	0x25c0
-	.4byte	.LLST66
+	.4byte	.LLST40
 	.uleb128 0x41
-	.8byte	.LVL151
-	.4byte	0x2873
-	.4byte	0x2109
-	.uleb128 0x34
+	.4byte	.LASF435
+	.byte	0x2
+	.byte	0x6f
+	.4byte	0xa8
+	.uleb128 0x38
+	.8byte	.LVL106
+	.4byte	0x2428
+	.4byte	0x1e42
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC19
+	.8byte	.LC16
 	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL152
-	.4byte	0x2873
-	.4byte	0x2128
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL107
+	.4byte	0x2475
+	.4byte	0x1e65
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC20
-	.byte	0
-	.uleb128 0x33
-	.8byte	.LVL161
-	.4byte	0x2873
-	.uleb128 0x34
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x50
+	.byte	0x51
 	.uleb128 0x2
-	.byte	0x88
+	.byte	0x84
 	.sleb128 0
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x4d
-	.4byte	0x2544
-	.8byte	.LBB60
-	.4byte	.Ldebug_ranges0+0x150
-	.byte	0x1
-	.2byte	0x152
-	.4byte	0x219e
-	.uleb128 0x43
-	.4byte	0x256a
-	.uleb128 0x43
-	.4byte	0x255f
-	.uleb128 0x43
-	.4byte	0x2554
-	.uleb128 0x3e
-	.4byte	.Ldebug_ranges0+0x150
-	.uleb128 0x3f
-	.4byte	0x2575
-	.4byte	.LLST67
-	.uleb128 0x40
-	.4byte	0x257e
-	.uleb128 0x3f
-	.4byte	0x2589
-	.4byte	.LLST68
-	.uleb128 0x33
-	.8byte	.LVL202
-	.4byte	0x2873
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC29
-	.byte	0
-	.byte	0
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
 	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL155
-	.4byte	0x289f
-	.4byte	0x21bc
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL109
+	.4byte	0x2480
+	.4byte	0x1e83
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x8
-	.byte	0x89
+	.byte	0x83
 	.sleb128 0
 	.byte	0x33
 	.byte	0x24
@@ -6196,19 +5360,19 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0x22
 	.byte	0x6
 	.byte	0
-	.uleb128 0x3b
-	.8byte	.LVL165
-	.4byte	0x2873
-	.uleb128 0x41
-	.8byte	.LVL167
-	.4byte	0x28aa
-	.4byte	0x21ec
-	.uleb128 0x34
+	.uleb128 0x45
+	.8byte	.LVL114
+	.4byte	0x2428
+	.uleb128 0x38
+	.8byte	.LVL116
+	.4byte	0x248b
+	.4byte	0x1eb3
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x1
 	.byte	0x30
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x8
@@ -6220,876 +5384,714 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0x23
 	.uleb128 0x110
 	.byte	0
-	.uleb128 0x3b
-	.8byte	.LVL172
-	.4byte	0x244b
-	.uleb128 0x3b
-	.8byte	.LVL175
-	.4byte	0x244b
-	.uleb128 0x41
-	.8byte	.LVL176
-	.4byte	0x2873
-	.4byte	0x222a
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC26
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x3a
-	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL180
-	.4byte	0x2873
-	.4byte	0x224a
-	.uleb128 0x34
+	.uleb128 0x45
+	.8byte	.LVL117
+	.4byte	0x2120
+	.uleb128 0x45
+	.8byte	.LVL119
+	.4byte	0x2120
+	.uleb128 0x38
+	.8byte	.LVL129
+	.4byte	0x2428
+	.4byte	0x1eeb
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x4
-	.byte	0x8f
-	.sleb128 192
-	.byte	0x6
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
 	.uleb128 0x2
 	.byte	0x8a
 	.sleb128 0
-	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL181
-	.4byte	0x2873
-	.4byte	0x2274
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8c
-	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x89
 	.sleb128 0
-	.uleb128 0x34
+	.byte	0
+	.uleb128 0x38
+	.8byte	.LVL130
+	.4byte	0x2428
+	.4byte	0x1f09
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x52
+	.byte	0x50
 	.uleb128 0x2
-	.byte	0x86
+	.byte	0x8b
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x53
+	.byte	0x51
 	.uleb128 0x2
-	.byte	0x83
+	.byte	0x8c
 	.sleb128 0
 	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL182
-	.4byte	0x19a9
-	.4byte	0x2292
-	.uleb128 0x34
+	.uleb128 0x45
+	.8byte	.LVL131
+	.4byte	0x2150
+	.uleb128 0x45
+	.8byte	.LVL132
+	.4byte	0x1734
+	.uleb128 0x45
+	.8byte	.LVL135
+	.4byte	0x2181
+	.uleb128 0x45
+	.8byte	.LVL138
+	.4byte	0x1add
+	.uleb128 0x45
+	.8byte	.LVL142
+	.4byte	0x2150
+	.uleb128 0x45
+	.8byte	.LVL144
+	.4byte	0x1734
+	.uleb128 0x45
+	.8byte	.LVL147
+	.4byte	0x2181
+	.uleb128 0x45
+	.8byte	.LVL150
+	.4byte	0x1add
+	.uleb128 0x45
+	.8byte	.LVL152
+	.4byte	0x2496
+	.uleb128 0x38
+	.8byte	.LVL158
+	.4byte	0x2428
+	.4byte	0x1faf
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x2
-	.byte	0x86
-	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC23
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL185
-	.4byte	0x25cc
-	.4byte	0x22b0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x86
-	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL187
-	.4byte	0x1d11
-	.4byte	0x22ce
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
+	.uleb128 0xe
 	.byte	0x86
 	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL210
-	.4byte	0x2873
-	.4byte	0x22ec
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8b
-	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8a
+	.byte	0x33
+	.byte	0x24
+	.byte	0x9
+	.byte	0xe5
+	.byte	0x24
+	.byte	0x9
+	.byte	0xe5
+	.byte	0x26
+	.byte	0x88
 	.sleb128 0
+	.byte	0x22
+	.byte	0x6
 	.byte	0
-	.uleb128 0x3b
-	.8byte	.LVL215
-	.4byte	0x19a9
-	.uleb128 0x3b
-	.8byte	.LVL217
-	.4byte	0x28b5
-	.uleb128 0x3b
-	.8byte	.LVL222
-	.4byte	0x25cc
-	.uleb128 0x3b
-	.8byte	.LVL223
-	.4byte	0x1d11
-	.uleb128 0x41
-	.8byte	.LVL228
-	.4byte	0x2873
-	.4byte	0x2345
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL161
+	.4byte	0x2428
+	.4byte	0x1fd3
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC24
-	.uleb128 0x34
+	.8byte	.LC26
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x2
-	.byte	0x86
-	.sleb128 0
-	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL229
-	.4byte	0x2873
-	.4byte	0x2364
-	.uleb128 0x34
 	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC25
+	.byte	0x3a
 	.byte	0
-	.uleb128 0x3b
-	.8byte	.LVL230
-	.4byte	0x244b
-	.uleb128 0x41
-	.8byte	.LVL231
-	.4byte	0x2873
-	.4byte	0x2390
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL170
+	.4byte	0x24a1
+	.4byte	0x1ff8
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC32
-	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL233
-	.4byte	0x19a9
-	.4byte	0x23ae
-	.uleb128 0x34
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 296
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x50
+	.byte	0x51
 	.uleb128 0x2
-	.byte	0x86
+	.byte	0x85
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x51
+	.byte	0x52
 	.uleb128 0x2
-	.byte	0x83
+	.byte	0x84
 	.sleb128 0
 	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL236
-	.4byte	0x25cc
-	.4byte	0x23cc
-	.uleb128 0x34
+	.uleb128 0x45
+	.8byte	.LVL173
+	.4byte	0x2150
+	.uleb128 0x45
+	.8byte	.LVL174
+	.4byte	0x2120
+	.uleb128 0x38
+	.8byte	.LVL178
+	.4byte	0x2428
+	.4byte	0x2032
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x2
-	.byte	0x86
-	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x4
+	.byte	0x8f
+	.sleb128 200
+	.byte	0x6
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x83
+	.byte	0x8a
 	.sleb128 0
 	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL239
-	.4byte	0x1d11
-	.4byte	0x23ea
-	.uleb128 0x34
+	.uleb128 0x45
+	.8byte	.LVL183
+	.4byte	0x1734
+	.uleb128 0x45
+	.8byte	.LVL185
+	.4byte	0x2496
+	.uleb128 0x45
+	.8byte	.LVL190
+	.4byte	0x2181
+	.uleb128 0x45
+	.8byte	.LVL191
+	.4byte	0x1add
+	.uleb128 0x38
+	.8byte	.LVL197
+	.4byte	0x2428
+	.4byte	0x2085
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x2
-	.byte	0x86
-	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC19
 	.byte	0
-	.uleb128 0x3b
-	.8byte	.LVL241
-	.4byte	0x28b5
-	.uleb128 0x33
-	.8byte	.LVL247
-	.4byte	0x2873
-	.uleb128 0x34
+	.uleb128 0x45
+	.8byte	.LVL198
+	.4byte	0x24ac
+	.uleb128 0x45
+	.8byte	.LVL199
+	.4byte	0x2120
+	.uleb128 0x45
+	.8byte	.LVL200
+	.4byte	0x2150
+	.uleb128 0x3a
+	.8byte	.LVL201
+	.4byte	0x2428
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC31
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0xe
-	.byte	0x83
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x9
-	.byte	0xe5
-	.byte	0x24
-	.byte	0x9
-	.byte	0xe5
-	.byte	0x26
-	.byte	0x88
-	.sleb128 0
-	.byte	0x22
-	.byte	0x6
+	.8byte	.LC24
 	.byte	0
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x68c
+	.4byte	0x67c
 	.uleb128 0xb
 	.4byte	0x109
-	.4byte	0x243b
-	.uleb128 0xc
+	.4byte	0x20de
+	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x4
 	.byte	0
 	.uleb128 0xb
 	.4byte	0x109
-	.4byte	0x244b
-	.uleb128 0xc
+	.4byte	0x20ee
+	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x3
 	.byte	0
-	.uleb128 0x4c
-	.4byte	.LASF445
+	.uleb128 0x3e
+	.4byte	.LASF436
+	.byte	0x2
+	.byte	0x36
+	.4byte	0x59
 	.byte	0x1
-	.byte	0xa4
+	.4byte	0x2120
+	.uleb128 0x3f
+	.4byte	.LASF437
+	.byte	0x2
+	.byte	0x36
+	.4byte	0xa8
+	.uleb128 0x3f
+	.4byte	.LASF438
+	.byte	0x2
+	.byte	0x36
+	.4byte	0xa8
+	.uleb128 0x3f
+	.4byte	.LASF439
+	.byte	0x2
+	.byte	0x36
+	.4byte	0x109
+	.byte	0
+	.uleb128 0x30
+	.4byte	.LASF440
+	.byte	0x2
+	.byte	0x31
 	.4byte	0x59
-	.8byte	.LFB258
-	.8byte	.LFE258-.LFB258
+	.8byte	.LFB255
+	.8byte	.LFE255-.LFB255
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x24f6
-	.uleb128 0x36
+	.4byte	0x2150
+	.uleb128 0x47
 	.string	"uv"
+	.byte	0x2
+	.byte	0x31
+	.4byte	0xa8
+	.4byte	.LLST8
+	.byte	0
+	.uleb128 0x30
+	.4byte	.LASF441
+	.byte	0x2
+	.byte	0x2c
+	.4byte	0x59
+	.8byte	.LFB254
+	.8byte	.LFE254-.LFB254
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2181
+	.uleb128 0x31
+	.4byte	.LASF442
+	.byte	0x2
+	.byte	0x2c
+	.4byte	0x109
+	.4byte	.LLST7
+	.byte	0
+	.uleb128 0x30
+	.4byte	.LASF443
 	.byte	0x1
-	.byte	0xa4
+	.byte	0x2d
 	.4byte	0x59
-	.4byte	.LLST0
-	.uleb128 0x3a
-	.string	"dev"
+	.8byte	.LFB201
+	.8byte	.LFE201-.LFB201
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2407
+	.uleb128 0x31
+	.4byte	.LASF419
 	.byte	0x1
-	.byte	0xa6
-	.4byte	0x26d
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -8
-	.uleb128 0x32
-	.string	"ret"
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+	.4byte	0x109
+	.4byte	.LLST0
+	.uleb128 0x31
+	.4byte	.LASF376
 	.byte	0x1
-	.byte	0xa7
-	.4byte	0x59
+	.byte	0x2d
+	.4byte	0x109
 	.4byte	.LLST1
-	.uleb128 0x41
-	.8byte	.LVL2
-	.4byte	0x28c0
-	.4byte	0x24bc
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8f
-	.sleb128 56
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-	.uleb128 0x3b
-	.8byte	.LVL5
-	.4byte	0x2873
-	.uleb128 0x41
-	.8byte	.LVL9
-	.4byte	0x28cc
-	.4byte	0x24e1
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.byte	0
-	.uleb128 0x33
-	.8byte	.LVL12
-	.4byte	0x28d8
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8
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-	.byte	0
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-	.byte	0x1
-	.byte	0x92
-	.4byte	0x109
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF448
-	.byte	0x1
-	.byte	0x67
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-	.4byte	0x2544
-	.uleb128 0x46
-	.4byte	.LASF449
-	.byte	0x1
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-	.4byte	0xa8
-	.uleb128 0x46
-	.4byte	.LASF450
-	.byte	0x1
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-	.uleb128 0x46
-	.4byte	.LASF451
-	.byte	0x1
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-	.4byte	.LASF452
-	.byte	0x1
-	.byte	0x49
-	.4byte	0x59
-	.byte	0x1
-	.4byte	0x2595
-	.uleb128 0x4e
-	.string	"arg"
-	.byte	0x1
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-	.uleb128 0x46
-	.4byte	.LASF408
-	.byte	0x1
-	.byte	0x49
-	.4byte	0x18b3
-	.uleb128 0x46
-	.4byte	.LASF374
-	.byte	0x1
-	.byte	0x49
-	.4byte	0x18b3
-	.uleb128 0x47
-	.string	"i"
-	.byte	0x1
-	.byte	0x4b
-	.4byte	0xa8
-	.uleb128 0x48
-	.4byte	.LASF453
-	.byte	0x1
-	.byte	0x4b
-	.4byte	0xa8
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-	.4byte	.LASF454
-	.byte	0x1
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-	.uleb128 0x4f
-	.4byte	.LASF474
-	.byte	0x1
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-	.byte	0x1
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-	.uleb128 0x46
-	.4byte	.LASF408
-	.byte	0x1
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-	.4byte	.LASF374
-	.byte	0x1
-	.byte	0x2d
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-	.uleb128 0x47
-	.string	"i"
-	.byte	0x1
-	.byte	0x2f
-	.4byte	0xa8
-	.uleb128 0x48
-	.4byte	.LASF453
+	.uleb128 0x42
+	.4byte	.LASF444
 	.byte	0x1
 	.byte	0x2f
 	.4byte	0xa8
-	.byte	0
-	.uleb128 0x35
-	.4byte	.LASF455
-	.byte	0x4
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-	.8byte	.LFB201
-	.8byte	.LFE201-.LFB201
-	.uleb128 0x1
-	.byte	0x9c
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-	.uleb128 0x31
-	.4byte	.LASF408
-	.byte	0x4
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-	.4byte	.LASF374
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-	.4byte	.LLST37
-	.uleb128 0x37
-	.4byte	.LASF456
-	.byte	0x4
-	.byte	0x2f
-	.4byte	0xa8
-	.4byte	.LLST38
-	.uleb128 0x32
+	.4byte	.LLST2
+	.uleb128 0x43
 	.string	"i"
-	.byte	0x4
+	.byte	0x1
 	.byte	0x2f
 	.4byte	0xa8
-	.4byte	.LLST39
-	.uleb128 0x32
+	.4byte	.LLST3
+	.uleb128 0x43
 	.string	"j"
-	.byte	0x4
+	.byte	0x1
 	.byte	0x2f
 	.4byte	0xa8
-	.4byte	.LLST40
-	.uleb128 0x32
+	.4byte	.LLST4
+	.uleb128 0x43
 	.string	"q"
-	.byte	0x4
+	.byte	0x1
 	.byte	0x2f
 	.4byte	0xa8
-	.4byte	.LLST41
-	.uleb128 0x3a
+	.4byte	.LLST5
+	.uleb128 0x32
 	.string	"buf"
-	.byte	0x4
+	.byte	0x1
 	.byte	0x30
-	.4byte	0x1f56
+	.4byte	0x1d09
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -32
-	.uleb128 0x32
+	.uleb128 0x43
 	.string	"p"
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+	.byte	0x1
 	.byte	0x31
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-	.4byte	.LLST42
-	.uleb128 0x50
-	.4byte	.LASF457
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+	.4byte	.LASF445
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 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC41
-	.uleb128 0x41
-	.8byte	.LVL88
-	.4byte	0x2873
-	.4byte	0x268e
-	.uleb128 0x34
+	.8byte	.LC33
+	.uleb128 0x38
+	.8byte	.LVL2
+	.4byte	0x2428
+	.4byte	0x2243
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC13
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-	.4byte	0x2873
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-	.uleb128 0x34
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 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x4
 	.byte	0x8f
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 	.byte	0x6
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x84
 	.sleb128 0
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-	.uleb128 0x34
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+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8c
-	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x4
+	.byte	0x8f
+	.sleb128 192
+	.byte	0x6
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x89
+	.byte	0x8b
 	.sleb128 0
 	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL96
-	.4byte	0x1947
-	.4byte	0x26e4
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL8
+	.4byte	0x2453
+	.4byte	0x22a1
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x83
+	.byte	0x85
 	.sleb128 0
-	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL97
-	.4byte	0x1947
-	.4byte	0x26fe
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x4
-	.byte	0x8f
-	.sleb128 216
-	.byte	0x6
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
 	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL98
-	.4byte	0x18bf
-	.4byte	0x2728
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL9
+	.4byte	0x24b7
+	.4byte	0x22cb
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x83
+	.byte	0x85
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x8b
+	.byte	0x83
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
-	.byte	0x72
+	.byte	0x87
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
-	.byte	0x86
+	.byte	0x88
 	.sleb128 0
 	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL99
-	.4byte	0x17b3
-	.4byte	0x2757
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL10
+	.4byte	0x246a
+	.4byte	0x22fa
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x83
+	.byte	0x85
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x8b
+	.byte	0x83
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
-	.byte	0x85
+	.byte	0x87
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
-	.byte	0x86
+	.byte	0x88
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x54
 	.uleb128 0x1
 	.byte	0x31
 	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL105
-	.4byte	0x2873
-	.4byte	0x2776
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL16
+	.4byte	0x2428
+	.4byte	0x2319
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC16
+	.8byte	.LC4
 	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL106
-	.4byte	0x28e3
-	.4byte	0x278e
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL17
+	.4byte	0x24c2
+	.4byte	0x2331
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x80
 	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL109
-	.4byte	0x2873
-	.4byte	0x27b3
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL20
+	.4byte	0x2428
+	.4byte	0x2356
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC17
-	.uleb128 0x34
+	.8byte	.LC5
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x80
 	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL112
-	.4byte	0x2873
-	.4byte	0x27d1
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL23
+	.4byte	0x2428
+	.4byte	0x2374
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x87
+	.byte	0x8b
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x84
 	.sleb128 0
 	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL113
-	.4byte	0x2873
-	.4byte	0x27ef
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL24
+	.4byte	0x2428
+	.4byte	0x2392
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x88
+	.byte	0x89
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x89
+	.byte	0x86
 	.sleb128 0
 	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL115
-	.4byte	0x1947
-	.4byte	0x2807
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL26
+	.4byte	0x2453
+	.4byte	0x23b0
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x8c
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
 	.sleb128 0
 	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL116
-	.4byte	0x18bf
-	.4byte	0x2831
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL27
+	.4byte	0x24b7
+	.4byte	0x23da
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x70
+	.byte	0x85
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x8
-	.byte	0x80
-	.uleb128 0x34
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
-	.byte	0x72
+	.byte	0x87
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
-	.byte	0x86
+	.byte	0x88
 	.sleb128 0
 	.byte	0
-	.uleb128 0x33
-	.8byte	.LVL117
-	.4byte	0x17b3
-	.uleb128 0x34
+	.uleb128 0x3a
+	.8byte	.LVL28
+	.4byte	0x246a
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x83
+	.byte	0x85
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x8
-	.byte	0x80
-	.uleb128 0x34
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
-	.byte	0x85
+	.byte	0x87
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
-	.byte	0x86
+	.byte	0x88
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x54
 	.uleb128 0x2
-	.byte	0x8b
+	.byte	0x8c
 	.sleb128 0
 	.byte	0
 	.byte	0
 	.uleb128 0xb
 	.4byte	0xe7
-	.4byte	0x286e
-	.uleb128 0xc
+	.4byte	0x2417
+	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x9
 	.byte	0
 	.uleb128 0x8
-	.4byte	0x285e
-	.uleb128 0x51
-	.4byte	.LASF458
-	.4byte	.LASF458
+	.4byte	0x2407
+	.uleb128 0x49
+	.4byte	.LASF446
+	.4byte	.LASF446
+	.byte	0x1d
+	.2byte	0x16c
+	.uleb128 0x4a
+	.4byte	.LASF447
+	.4byte	.LASF447
 	.byte	0x23
 	.byte	0x12
-	.uleb128 0x52
-	.4byte	.LASF459
-	.4byte	.LASF459
+	.uleb128 0x49
+	.4byte	.LASF448
+	.4byte	.LASF448
+	.byte	0x5
+	.2byte	0x258
+	.uleb128 0x4b
+	.4byte	.LASF451
+	.4byte	.LASF451
+	.uleb128 0x4a
+	.4byte	.LASF449
+	.4byte	.LASF449
+	.byte	0x24
+	.byte	0x5f
+	.uleb128 0x4a
+	.4byte	.LASF450
+	.4byte	.LASF450
+	.byte	0x25
+	.byte	0xb
+	.uleb128 0x49
+	.4byte	.LASF451
+	.4byte	.LASF451
 	.byte	0x1d
 	.2byte	0x16d
-	.uleb128 0x52
-	.4byte	.LASF460
-	.4byte	.LASF460
-	.byte	0x1d
-	.2byte	0x16c
-	.uleb128 0x53
-	.4byte	.LASF459
-	.4byte	.LASF459
-	.uleb128 0x51
-	.4byte	.LASF461
-	.4byte	.LASF461
-	.byte	0xa
+	.uleb128 0x4a
+	.4byte	.LASF452
+	.4byte	.LASF452
+	.byte	0x26
+	.byte	0xe
+	.uleb128 0x4a
+	.4byte	.LASF453
+	.4byte	.LASF453
+	.byte	0x26
+	.byte	0x11
+	.uleb128 0x4a
+	.4byte	.LASF454
+	.4byte	.LASF454
+	.byte	0x9
 	.byte	0x2d
-	.uleb128 0x51
-	.4byte	.LASF462
-	.4byte	.LASF462
-	.byte	0x24
+	.uleb128 0x4a
+	.4byte	.LASF455
+	.4byte	.LASF455
+	.byte	0x27
 	.byte	0x29
-	.uleb128 0x51
-	.4byte	.LASF463
-	.4byte	.LASF463
+	.uleb128 0x4a
+	.4byte	.LASF456
+	.4byte	.LASF456
 	.byte	0x21
 	.byte	0x11
-	.uleb128 0x52
-	.4byte	.LASF464
-	.4byte	.LASF464
-	.byte	0x25
-	.2byte	0x1da
-	.uleb128 0x52
-	.4byte	.LASF465
-	.4byte	.LASF465
+	.uleb128 0x4a
+	.4byte	.LASF457
+	.4byte	.LASF457
+	.byte	0x26
+	.byte	0x12
+	.uleb128 0x4a
+	.4byte	.LASF458
+	.4byte	.LASF458
 	.byte	0x25
-	.2byte	0x116
-	.uleb128 0x51
-	.4byte	.LASF466
-	.4byte	.LASF466
+	.byte	0xc
+	.uleb128 0x4a
+	.4byte	.LASF459
+	.4byte	.LASF459
 	.byte	0x26
-	.byte	0xb
-	.uleb128 0x52
-	.4byte	.LASF467
-	.4byte	.LASF467
+	.byte	0xd
+	.uleb128 0x49
+	.4byte	.LASF460
+	.4byte	.LASF460
 	.byte	0x1d
 	.2byte	0x398
 	.byte	0
@@ -7221,18 +6223,9 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xc
 	.uleb128 0x21
 	.byte	0
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x2f
-	.uleb128 0xb
 	.byte	0
 	.byte	0
 	.uleb128 0xd
-	.uleb128 0x21
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0xe
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7249,7 +6242,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0xf
+	.uleb128 0xe
 	.uleb128 0x13
 	.byte	0x1
 	.uleb128 0x3
@@ -7264,7 +6257,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x10
+	.uleb128 0xf
 	.uleb128 0xd
 	.byte	0
 	.uleb128 0x3
@@ -7279,7 +6272,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x11
+	.uleb128 0x10
 	.uleb128 0xd
 	.byte	0
 	.uleb128 0x3
@@ -7294,11 +6287,20 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x12
+	.uleb128 0x11
 	.uleb128 0x26
 	.byte	0
 	.byte	0
 	.byte	0
+	.uleb128 0x12
+	.uleb128 0x21
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2f
+	.uleb128 0xb
+	.byte	0
+	.byte	0
 	.uleb128 0x13
 	.uleb128 0x15
 	.byte	0x1
@@ -7630,8 +6632,6 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x13
 	.uleb128 0x3f
 	.uleb128 0x19
-	.uleb128 0x2
-	.uleb128 0x18
 	.byte	0
 	.byte	0
 	.uleb128 0x2c
@@ -7705,6 +6705,8 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xb
 	.uleb128 0x27
 	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
 	.uleb128 0x11
 	.uleb128 0x1
 	.uleb128 0x12
@@ -7744,140 +6746,11 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x49
 	.uleb128 0x13
 	.uleb128 0x2
-	.uleb128 0x17
+	.uleb128 0x18
 	.byte	0
 	.byte	0
 	.uleb128 0x33
-	.uleb128 0x4109
-	.byte	0x1
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x31
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x34
-	.uleb128 0x410a
-	.byte	0
-	.uleb128 0x2
-	.uleb128 0x18
-	.uleb128 0x2111
-	.uleb128 0x18
-	.byte	0
-	.byte	0
-	.uleb128 0x35
-	.uleb128 0x2e
-	.byte	0x1
-	.uleb128 0x3f
-	.uleb128 0x19
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x27
-	.uleb128 0x19
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x12
-	.uleb128 0x7
-	.uleb128 0x40
-	.uleb128 0x18
-	.uleb128 0x2117
-	.uleb128 0x19
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x36
-	.uleb128 0x5
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x17
-	.byte	0
-	.byte	0
-	.uleb128 0x37
-	.uleb128 0x34
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x17
-	.byte	0
-	.byte	0
-	.uleb128 0x38
-	.uleb128 0x5
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x18
-	.byte	0
-	.byte	0
-	.uleb128 0x39
-	.uleb128 0x5
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x18
-	.byte	0
-	.byte	0
-	.uleb128 0x3a
-	.uleb128 0x34
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x18
-	.byte	0
-	.byte	0
-	.uleb128 0x3b
-	.uleb128 0x4109
-	.byte	0
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x31
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x3c
-	.uleb128 0x1d
+	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
 	.uleb128 0x13
@@ -7893,7 +6766,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3d
+	.uleb128 0x34
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
@@ -7902,14 +6775,14 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x3e
+	.uleb128 0x35
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x55
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x3f
+	.uleb128 0x36
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -7918,14 +6791,14 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x40
+	.uleb128 0x37
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x41
+	.uleb128 0x38
 	.uleb128 0x4109
 	.byte	0x1
 	.uleb128 0x11
@@ -7936,7 +6809,25 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x42
+	.uleb128 0x39
+	.uleb128 0x410a
+	.byte	0
+	.uleb128 0x2
+	.uleb128 0x18
+	.uleb128 0x2111
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x3a
+	.uleb128 0x4109
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x3b
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -7951,14 +6842,14 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x43
+	.uleb128 0x3c
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x44
+	.uleb128 0x3d
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -7967,7 +6858,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x45
+	.uleb128 0x3e
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -7986,7 +6877,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x46
+	.uleb128 0x3f
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -7999,7 +6890,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x47
+	.uleb128 0x40
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -8012,7 +6903,20 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x48
+	.uleb128 0x41
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x42
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -8023,9 +6927,26 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xb
 	.uleb128 0x49
 	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
 	.byte	0
 	.byte	0
+	.uleb128 0x43
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
 	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x44
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x3
@@ -8038,21 +6959,16 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x1
 	.byte	0
 	.byte	0
-	.uleb128 0x4a
-	.uleb128 0xb
-	.byte	0x1
+	.uleb128 0x45
+	.uleb128 0x4109
+	.byte	0
 	.uleb128 0x11
 	.uleb128 0x1
-	.uleb128 0x12
-	.uleb128 0x7
-	.byte	0
-	.byte	0
-	.uleb128 0x4b
-	.uleb128 0xb
-	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4c
+	.uleb128 0x46
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -8077,24 +6993,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4d
-	.uleb128 0x1d
-	.byte	0x1
-	.uleb128 0x31
-	.uleb128 0x13
-	.uleb128 0x52
-	.uleb128 0x1
-	.uleb128 0x55
-	.uleb128 0x17
-	.uleb128 0x58
-	.uleb128 0xb
-	.uleb128 0x59
-	.uleb128 0x5
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x4e
+	.uleb128 0x47
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -8105,26 +7004,11 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xb
 	.uleb128 0x49
 	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x4f
-	.uleb128 0x2e
-	.byte	0x1
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x27
-	.uleb128 0x19
-	.uleb128 0x20
-	.uleb128 0xb
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x50
+	.uleb128 0x48
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -8137,7 +7021,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x51
+	.uleb128 0x49
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -8151,10 +7035,10 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x3a
 	.uleb128 0xb
 	.uleb128 0x3b
-	.uleb128 0xb
+	.uleb128 0x5
 	.byte	0
 	.byte	0
-	.uleb128 0x52
+	.uleb128 0x4a
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -8168,10 +7052,10 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x3a
 	.uleb128 0xb
 	.uleb128 0x3b
-	.uleb128 0x5
+	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x53
+	.uleb128 0x4b
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -8187,2732 +7071,2075 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.section	.debug_loc,"",@progbits
 .Ldebug_loc0:
-.LLST69:
-	.8byte	.LVL248
-	.8byte	.LVL250
-	.2byte	0x1
+.LLST15:
+	.8byte	.LVL61
+	.8byte	.LVL64-1
+	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL250
-	.8byte	.LVL251
+	.8byte	.LVL64-1
+	.8byte	.LVL80
 	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL251
-	.8byte	.LVL252
+	.byte	0x63
+	.8byte	.LVL80
+	.8byte	.LVL81
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL252
-	.8byte	.LFE279
+	.8byte	.LVL81
+	.8byte	.LFE272
 	.2byte	0x1
-	.byte	0x64
+	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST70:
-	.8byte	.LVL248
-	.8byte	.LVL250
+.LLST16:
+	.8byte	.LVL61
+	.8byte	.LVL63
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL250
-	.8byte	.LFE279
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST71:
-	.8byte	.LVL249
-	.8byte	.LVL250
+	.8byte	.LVL63
+	.8byte	.LVL64-1
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL250
-	.8byte	.LVL251
+	.byte	0x52
+	.8byte	.LVL64-1
+	.8byte	.LVL80
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL251
-	.8byte	.LVL252
+	.8byte	.LVL80
+	.8byte	.LVL81
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
-	.byte	0x50
+	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL252
-	.8byte	.LFE279
+	.8byte	.LVL81
+	.8byte	.LFE272
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST72:
-	.8byte	.LVL249
-	.8byte	.LVL250
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL250
-	.8byte	.LVL251
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL251
-	.8byte	.LVL252
+.LLST17:
+	.8byte	.LVL62
+	.8byte	.LVL63
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL252
-	.8byte	.LVL253
+	.8byte	.LVL63
+	.8byte	.LVL64-1
 	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL253
-	.8byte	.LVL254
-	.2byte	0x3
-	.byte	0x83
-	.sleb128 -4
-	.byte	0x9f
-	.8byte	.LVL254
-	.8byte	.LFE279
+	.byte	0x52
+	.8byte	.LVL64-1
+	.8byte	.LVL79
 	.2byte	0x1
-	.byte	0x63
+	.byte	0x64
+	.8byte	.LVL81
+	.8byte	.LFE272
+	.2byte	0x1
+	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST23:
-	.8byte	.LVL70
-	.8byte	.LVL78
+.LLST18:
+	.8byte	.LVL62
+	.8byte	.LVL64-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL78
-	.8byte	.LVL82
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL82
-	.8byte	.LFE278
+	.8byte	.LVL64-1
+	.8byte	.LVL79
 	.2byte	0x1
-	.byte	0x50
+	.byte	0x63
+	.8byte	.LVL81
+	.8byte	.LFE272
+	.2byte	0x1
+	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST24:
-	.8byte	.LVL70
-	.8byte	.LVL71
+.LLST19:
+	.8byte	.LVL66
+	.8byte	.LVL67
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL67
+	.8byte	.LVL68
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL71
-	.8byte	.LVL73
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
 	.8byte	.LVL73
-	.8byte	.LVL79
+	.8byte	.LVL75
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL79
-	.8byte	.LVL82
-	.2byte	0x8
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x33
-	.byte	0x25
-	.byte	0x31
-	.byte	0x1c
-	.byte	0x9f
-	.8byte	.LVL82
-	.8byte	.LFE278
+	.8byte	.LVL81
+	.8byte	.LVL83
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST25:
-	.8byte	.LVL70
-	.8byte	.LVL74
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL74
-	.8byte	.LVL80-1
+.LLST20:
+	.8byte	.LVL64
+	.8byte	.LVL65
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL65
+	.8byte	.LVL69
 	.2byte	0x1
-	.byte	0x58
-	.8byte	.LVL80-1
-	.8byte	.LVL82
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
+	.byte	0x66
+	.8byte	.LVL69
+	.8byte	.LVL72
+	.2byte	0x3
+	.byte	0x86
+	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL82
-	.8byte	.LFE278
+	.8byte	.LVL72
+	.8byte	.LVL79
 	.2byte	0x1
-	.byte	0x58
+	.byte	0x66
+	.8byte	.LVL81
+	.8byte	.LVL84
+	.2byte	0x1
+	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST26:
-	.8byte	.LVL70
-	.8byte	.LVL72
+.LLST21:
+	.8byte	.LVL64
+	.8byte	.LVL65
+	.2byte	0x6
+	.byte	0x9e
+	.uleb128 0x4
+	.4byte	0x80808080
+	.8byte	.LVL65
+	.8byte	.LVL79
 	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL72
-	.8byte	.LFE278
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
+	.byte	0x65
+	.8byte	.LVL81
+	.8byte	.LVL84
+	.2byte	0x1
+	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST27:
-	.8byte	.LVL70
-	.8byte	.LVL75
+.LLST22:
+	.8byte	.LVL64
+	.8byte	.LVL65
+	.2byte	0x6
+	.byte	0xc
+	.4byte	0x40404040
+	.byte	0x9f
+	.8byte	.LVL65
+	.8byte	.LVL79
 	.2byte	0x1
-	.byte	0x54
-	.8byte	.LVL75
-	.8byte	.LVL80-1
+	.byte	0x67
+	.8byte	.LVL81
+	.8byte	.LVL84
 	.2byte	0x1
-	.byte	0x5a
-	.8byte	.LVL80-1
-	.8byte	.LVL82
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x54
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST23:
+	.8byte	.LVL62
+	.8byte	.LVL65
+	.2byte	0x2
+	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL82
-	.8byte	.LFE278
-	.2byte	0x1
-	.byte	0x5a
 	.8byte	0
 	.8byte	0
-.LLST28:
-	.8byte	.LVL73
-	.8byte	.LVL78
+.LLST24:
+	.8byte	.LVL64
+	.8byte	.LVL80
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL78
-	.8byte	.LVL82
+	.byte	0x63
+	.8byte	.LVL80
+	.8byte	.LVL81
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL82
-	.8byte	.LFE278
+	.8byte	.LVL81
+	.8byte	.LFE272
 	.2byte	0x1
-	.byte	0x50
+	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST29:
-	.8byte	.LVL73
+.LLST25:
+	.8byte	.LVL62
+	.8byte	.LVL68
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL72
 	.8byte	.LVL74
-	.2byte	0x1
-	.byte	0x52
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
 	.8byte	.LVL74
-	.8byte	.LVL80-1
+	.8byte	.LVL76-1
 	.2byte	0x1
-	.byte	0x58
-	.8byte	.LVL80-1
-	.8byte	.LVL82
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.8byte	.LVL82
-	.8byte	.LFE278
+	.byte	0x55
+	.8byte	.LVL76-1
+	.8byte	.LVL79
 	.2byte	0x1
-	.byte	0x58
+	.byte	0x6c
+	.8byte	.LVL81
+	.8byte	.LFE272
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST30:
-	.8byte	.LVL73
-	.8byte	.LVL75
+.LLST26:
+	.8byte	.LVL87
+	.8byte	.LVL88
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL75
-	.8byte	.LVL80-1
+	.8byte	.LVL88
+	.8byte	.LVL89
 	.2byte	0x1
-	.byte	0x57
-	.8byte	.LVL82
-	.8byte	.LVL84
+	.byte	0x50
+	.8byte	.LVL92
+	.8byte	.LVL95
 	.2byte	0x1
-	.byte	0x57
+	.byte	0x50
+	.8byte	.LVL101
+	.8byte	.LFE272
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST27:
 	.8byte	.LVL84
-	.8byte	.LVL85
+	.8byte	.LVL90
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL90
+	.8byte	.LVL91
 	.2byte	0x3
-	.byte	0x77
+	.byte	0x85
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL85
-	.8byte	.LFE278
-	.2byte	0x1
-	.byte	0x57
-	.8byte	0
-	.8byte	0
-.LLST31:
-	.8byte	.LVL73
-	.8byte	.LVL75
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL75
-	.8byte	.LVL80-1
-	.2byte	0x1
-	.byte	0x56
-	.8byte	.LVL82
-	.8byte	.LFE278
-	.2byte	0x1
-	.byte	0x56
-	.8byte	0
-	.8byte	0
-.LLST32:
-	.8byte	.LVL73
-	.8byte	.LVL75
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL75
-	.8byte	.LVL80-1
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL82
-	.8byte	.LFE278
+	.8byte	.LVL91
+	.8byte	.LFE272
 	.2byte	0x1
-	.byte	0x52
+	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST33:
-	.8byte	.LVL73
-	.8byte	.LVL77
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL77
-	.8byte	.LVL80-1
-	.2byte	0x1
-	.byte	0x54
-	.8byte	.LVL82
-	.8byte	.LFE278
-	.2byte	0x2
-	.byte	0x30
+.LLST28:
+	.8byte	.LVL84
+	.8byte	.LVL89
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
 	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST34:
-	.8byte	.LVL73
-	.8byte	.LVL77
-	.2byte	0x2
-	.byte	0x30
+	.8byte	.LVL91
+	.8byte	.LVL94
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL77
-	.8byte	.LVL80-1
+	.8byte	.LVL94
+	.8byte	.LVL101
 	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL82
-	.8byte	.LFE278
-	.2byte	0x2
-	.byte	0x30
+	.byte	0x67
+	.8byte	.LVL101
+	.8byte	.LFE272
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST35:
-	.8byte	.LVL73
-	.8byte	.LVL77
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL77
-	.8byte	.LVL81
+.LLST9:
+	.8byte	.LVL35
+	.8byte	.LVL37
 	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL81
-	.8byte	.LVL82
+	.byte	0x50
+	.8byte	.LVL37
+	.8byte	.LVL45
 	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL45
+	.8byte	.LVL46
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
 	.byte	0x50
-	.8byte	.LVL82
-	.8byte	.LFE278
-	.2byte	0x2
-	.byte	0x30
 	.byte	0x9f
+	.8byte	.LVL46
+	.8byte	.LFE269
+	.2byte	0x1
+	.byte	0x69
 	.8byte	0
 	.8byte	0
-.LLST19:
-	.8byte	.LVL62
-	.8byte	.LVL63
+.LLST10:
+	.8byte	.LVL35
+	.8byte	.LVL36
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL63
-	.8byte	.LVL65
+	.8byte	.LVL36
+	.8byte	.LVL43
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL43
+	.8byte	.LVL46
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL65
-	.8byte	.LFE277
-	.2byte	0x1
-	.byte	0x51
-	.8byte	0
-	.8byte	0
-.LLST20:
-	.8byte	.LVL62
-	.8byte	.LVL64
+	.8byte	.LVL46
+	.8byte	.LVL47
 	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL64
-	.8byte	.LFE277
+	.byte	0x66
+	.8byte	.LVL47
+	.8byte	.LVL48
+	.2byte	0x3
+	.byte	0x87
+	.sleb128 32
+	.byte	0x9f
+	.8byte	.LVL48
+	.8byte	.LFE269
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
-	.byte	0x53
+	.byte	0x51
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST21:
-	.8byte	.LVL65
-	.8byte	.LVL66
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL66
-	.8byte	.LFE277
+.LLST11:
+	.8byte	.LVL50
+	.8byte	.LVL55
 	.2byte	0x1
-	.byte	0x55
+	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST22:
-	.8byte	.LVL65
-	.8byte	.LVL66
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL66
-	.8byte	.LFE277
+.LLST12:
+	.8byte	.LVL41
+	.8byte	.LVL44
 	.2byte	0x1
-	.byte	0x54
+	.byte	0x63
+	.8byte	.LVL46
+	.8byte	.LFE269
+	.2byte	0x1
+	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST16:
+.LLST13:
+	.8byte	.LVL50
 	.8byte	.LVL56
-	.8byte	.LVL58-1
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL58-1
-	.8byte	.LVL59
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
+	.byte	0x65
+	.8byte	.LVL56
+	.8byte	.LVL57
+	.2byte	0x3
+	.byte	0x85
+	.sleb128 -8
+	.byte	0x9f
+	.8byte	.LVL57
+	.8byte	.LFE269
+	.2byte	0x3
+	.byte	0x88
+	.sleb128 -40
 	.byte	0x9f
-	.8byte	.LVL59
-	.8byte	.LFE276
-	.2byte	0x1
-	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST17:
-	.8byte	.LVL56
-	.8byte	.LVL58-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL58-1
-	.8byte	.LVL59
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
+.LLST14:
+	.8byte	.LVL38
+	.8byte	.LVL43
+	.2byte	0x2
+	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL59
-	.8byte	.LFE276
+	.8byte	.LVL46
+	.8byte	.LVL51
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL51
+	.8byte	.LVL52
 	.2byte	0x1
 	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST18:
-	.8byte	.LVL56
-	.8byte	.LVL57
+	.8byte	.LVL52
+	.8byte	.LVL54
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL57
-	.8byte	.LVL58-1
+	.8byte	.LVL54
+	.8byte	.LVL58
 	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL59
+	.byte	0x50
 	.8byte	.LVL60
+	.8byte	.LFE269
 	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL60
-	.8byte	.LVL61
-	.2byte	0x3
-	.byte	0x72
-	.sleb128 1
-	.byte	0x9f
+	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST2:
-	.8byte	.LVL13
-	.8byte	.LVL17-1
+.LLST29:
+	.8byte	.LVL103
+	.8byte	.LVL104
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL17-1
-	.8byte	.LVL31
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL31
-	.8byte	.LVL33
+	.8byte	.LVL104
+	.8byte	.LFE257
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL33
-	.8byte	.LFE275
-	.2byte	0x1
-	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST3:
-	.8byte	.LVL13
-	.8byte	.LVL16
+.LLST30:
+	.8byte	.LVL103
+	.8byte	.LVL106-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL16
-	.8byte	.LVL17-1
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL17-1
-	.8byte	.LVL32
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL32
-	.8byte	.LVL33
+	.8byte	.LVL106-1
+	.8byte	.LFE257
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL33
-	.8byte	.LFE275
-	.2byte	0x1
-	.byte	0x67
 	.8byte	0
 	.8byte	0
-.LLST4:
-	.8byte	.LVL15
-	.8byte	.LVL16
+.LLST31:
+	.8byte	.LVL103
+	.8byte	.LVL106-1
 	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL16
-	.8byte	.LVL17-1
+	.byte	0x52
+	.8byte	.LVL106-1
+	.8byte	.LVL113
 	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL113
+	.8byte	.LVL194
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
 	.byte	0x52
-	.8byte	.LVL17-1
-	.8byte	.LVL30
+	.byte	0x9f
+	.8byte	.LVL194
+	.8byte	.LVL195
 	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL33
-	.8byte	.LFE275
-	.2byte	0x1
-	.byte	0x67
+	.byte	0x6a
+	.8byte	.LVL195
+	.8byte	.LFE257
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST5:
-	.8byte	.LVL14
-	.8byte	.LVL17-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL17-1
-	.8byte	.LVL30
+.LLST32:
+	.8byte	.LVL103
+	.8byte	.LVL106-1
 	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL33
-	.8byte	.LFE275
+	.byte	0x53
+	.8byte	.LVL106-1
+	.8byte	.LVL126
 	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST6:
-	.8byte	.LVL19
-	.8byte	.LVL20
-	.2byte	0x2
-	.byte	0x30
+	.byte	0x6b
+	.8byte	.LVL126
+	.8byte	.LVL159
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
 	.byte	0x9f
-	.8byte	.LVL20
-	.8byte	.LVL23-1
+	.8byte	.LVL159
+	.8byte	.LVL162
 	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL26
-	.8byte	.LVL28
+	.byte	0x6b
+	.8byte	.LVL162
+	.8byte	.LVL169
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL169
+	.8byte	.LVL175
 	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL33
-	.8byte	.LVL35
+	.byte	0x6b
+	.8byte	.LVL175
+	.8byte	.LVL193
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL193
+	.8byte	.LVL200
 	.2byte	0x1
-	.byte	0x51
+	.byte	0x6b
+	.8byte	.LVL200
+	.8byte	.LFE257
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST7:
-	.8byte	.LVL17
-	.8byte	.LVL18
+.LLST33:
+	.8byte	.LVL108
+	.8byte	.LVL110
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL110
+	.8byte	.LVL111
+	.2byte	0x3
+	.byte	0x83
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL111
+	.8byte	.LVL112
+	.2byte	0x3
+	.byte	0x89
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL112
+	.8byte	.LVL113
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL120
+	.8byte	.LVL122
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL122
+	.8byte	.LVL123
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL18
-	.8byte	.LVL22
+	.8byte	.LVL123
+	.8byte	.LVL124
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL124
+	.8byte	.LVL125
+	.2byte	0x3
+	.byte	0x70
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL129
+	.8byte	.LVL153
 	.2byte	0x1
 	.byte	0x6c
-	.8byte	.LVL22
-	.8byte	.LVL25
+	.8byte	.LVL153
+	.8byte	.LVL154
 	.2byte	0x3
 	.byte	0x8c
-	.sleb128 -1
+	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL25
-	.8byte	.LVL30
+	.8byte	.LVL159
+	.8byte	.LVL160
+	.2byte	0x3
+	.byte	0x70
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL162
+	.8byte	.LVL169
 	.2byte	0x1
 	.byte	0x6c
-	.8byte	.LVL33
-	.8byte	.LVL37
+	.8byte	.LVL178
+	.8byte	.LVL179
 	.2byte	0x1
-	.byte	0x6c
-	.8byte	0
-	.8byte	0
-.LLST8:
-	.8byte	.LVL17
-	.8byte	.LVL18
-	.2byte	0x6
-	.byte	0x9e
-	.uleb128 0x4
-	.4byte	0x80808080
-	.8byte	.LVL18
-	.8byte	.LVL30
+	.byte	0x6b
+	.8byte	.LVL182
+	.8byte	.LVL186
 	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL33
-	.8byte	.LVL38
+	.byte	0x6b
+	.8byte	.LVL189
+	.8byte	.LVL193
 	.2byte	0x1
-	.byte	0x64
+	.byte	0x6b
+	.8byte	.LVL194
+	.8byte	.LVL196
+	.2byte	0x1
+	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST9:
-	.8byte	.LVL17
-	.8byte	.LVL18
-	.2byte	0x6
-	.byte	0xc
-	.4byte	0x40404040
-	.byte	0x9f
-	.8byte	.LVL18
-	.8byte	.LVL30
+.LLST34:
+	.8byte	.LVL112
+	.8byte	.LVL113
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL115
+	.8byte	.LVL118
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL118
+	.8byte	.LVL127
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL33
-	.8byte	.LVL36
+	.8byte	.LVL159
+	.8byte	.LVL162
 	.2byte	0x1
 	.byte	0x69
-	.8byte	0
-	.8byte	0
-.LLST10:
-	.8byte	.LVL15
-	.8byte	.LVL18
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST11:
-	.8byte	.LVL17
-	.8byte	.LVL31
+	.8byte	.LVL169
+	.8byte	.LVL187
 	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL31
-	.8byte	.LVL33
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL33
-	.8byte	.LFE275
+	.byte	0x69
+	.8byte	.LVL187
+	.8byte	.LVL188
 	.2byte	0x1
 	.byte	0x66
+	.8byte	.LVL188
+	.8byte	.LVL194
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL194
+	.8byte	.LVL200
+	.2byte	0x1
+	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST12:
-	.8byte	.LVL15
-	.8byte	.LVL21
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
+.LLST35:
+	.8byte	.LVL133
+	.8byte	.LVL136
+	.2byte	0x2
+	.byte	0x32
 	.byte	0x9f
-	.8byte	.LVL25
-	.8byte	.LVL27
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
+	.8byte	.LVL136
+	.8byte	.LVL139
+	.2byte	0x2
+	.byte	0x33
 	.byte	0x9f
-	.8byte	.LVL27
-	.8byte	.LVL30
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL33
-	.8byte	.LFE275
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
+	.8byte	.LVL139
+	.8byte	.LVL141
+	.2byte	0x2
+	.byte	0x34
 	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST13:
-	.8byte	.LVL41
-	.8byte	.LVL42
+	.8byte	.LVL145
+	.8byte	.LVL148
 	.2byte	0x2
-	.byte	0x30
+	.byte	0x32
 	.byte	0x9f
-	.8byte	.LVL42
-	.8byte	.LVL44
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL47
-	.8byte	.LVL51
+	.8byte	.LVL148
+	.8byte	.LVL151
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL151
+	.8byte	.LVL153
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL162
+	.8byte	.LVL163
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL163
+	.8byte	.LVL164
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL165
+	.8byte	.LVL166
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL166
+	.8byte	.LVL167
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL167
+	.8byte	.LVL169
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL184
+	.8byte	.LVL187
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL54
-	.8byte	.LFE275
+	.byte	0x69
+	.8byte	.LVL187
+	.8byte	.LVL189
 	.2byte	0x1
-	.byte	0x50
+	.byte	0x66
+	.8byte	.LVL192
+	.8byte	.LVL193
+	.2byte	0x1
+	.byte	0x69
 	.8byte	0
 	.8byte	0
-.LLST14:
-	.8byte	.LVL38
-	.8byte	.LVL45
+.LLST36:
+	.8byte	.LVL127
+	.8byte	.LVL157
 	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL45
-	.8byte	.LVL46
-	.2byte	0x3
-	.byte	0x83
-	.sleb128 -1
-	.byte	0x9f
-	.8byte	.LVL46
-	.8byte	.LFE275
+	.byte	0x69
+	.8byte	.LVL162
+	.8byte	.LVL169
 	.2byte	0x1
-	.byte	0x63
+	.byte	0x69
+	.8byte	.LVL176
+	.8byte	.LVL193
+	.2byte	0x1
+	.byte	0x6a
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL38
-	.8byte	.LVL43
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL46
-	.8byte	.LVL49
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
+.LLST37:
+	.8byte	.LVL105
+	.8byte	.LVL157
+	.2byte	0x2
+	.byte	0x31
 	.byte	0x9f
-	.8byte	.LVL49
-	.8byte	.LVL54
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL54
-	.8byte	.LFE275
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
+	.8byte	.LVL159
+	.8byte	.LVL171
+	.2byte	0x2
+	.byte	0x31
 	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST43:
-	.8byte	.LVL120
-	.8byte	.LVL122
+	.8byte	.LVL171
+	.8byte	.LVL172
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL122
-	.8byte	.LVL142
+	.8byte	.LVL172
+	.8byte	.LVL193
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL193
+	.8byte	.LVL194
 	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL142
-	.8byte	.LFE272
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
 	.byte	0x50
+	.8byte	.LVL194
+	.8byte	.LVL200
+	.2byte	0x2
+	.byte	0x31
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST44:
-	.8byte	.LVL120
-	.8byte	.LVL121
-	.2byte	0x1
-	.byte	0x51
+.LLST38:
+	.8byte	.LVL105
 	.8byte	.LVL121
-	.8byte	.LVL130
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL130
-	.8byte	.LVL131
-	.2byte	0x3
-	.byte	0x83
-	.sleb128 32
-	.byte	0x9f
-	.8byte	.LVL131
-	.8byte	.LFE272
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST45:
-	.8byte	.LVL128
-	.8byte	.LVL132
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL132
-	.8byte	.LVL135
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST46:
-	.8byte	.LVL135
-	.8byte	.LVL141
+	.8byte	.LVL121
+	.8byte	.LVL122
 	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST47:
-	.8byte	.LVL128
-	.8byte	.LVL132
+	.byte	0x50
+	.8byte	.LVL159
+	.8byte	.LVL162
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL132
-	.8byte	.LVL136
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL136
-	.8byte	.LVL137
-	.2byte	0x3
-	.byte	0x85
-	.sleb128 -8
-	.byte	0x9f
-	.8byte	.LVL137
-	.8byte	.LVL141
-	.2byte	0x3
-	.byte	0x86
-	.sleb128 -40
+	.8byte	.LVL169
+	.8byte	.LVL200
+	.2byte	0x2
+	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST48:
-	.8byte	.LVL137
-	.8byte	.LVL141
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST49:
-	.8byte	.LVL123
-	.8byte	.LVL134
+.LLST39:
+	.8byte	.LVL105
+	.8byte	.LVL133
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
+	.8byte	.LVL133
 	.8byte	.LVL134
-	.8byte	.LVL138
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL140
-	.8byte	.LFE272
+	.8byte	.LVL134
+	.8byte	.LVL136
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL136
+	.8byte	.LVL137
 	.2byte	0x1
 	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST50:
-	.8byte	.LVL126
-	.8byte	.LVL129
+	.8byte	.LVL137
+	.8byte	.LVL139
 	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST51:
-	.8byte	.LVL125
-	.8byte	.LVL126
+	.byte	0x63
+	.8byte	.LVL139
+	.8byte	.LVL140
 	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST52:
+	.byte	0x50
+	.8byte	.LVL140
 	.8byte	.LVL143
-	.8byte	.LVL144
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL144
-	.8byte	.LFE259
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST53:
+	.byte	0x63
 	.8byte	.LVL143
+	.8byte	.LVL145
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL145
 	.8byte	.LVL146
 	.2byte	0x1
-	.byte	0x51
+	.byte	0x50
 	.8byte	.LVL146
-	.8byte	.LFE259
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST54:
-	.8byte	.LVL143
-	.8byte	.LVL145
+	.8byte	.LVL147-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL145
-	.8byte	.LVL164
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL164
-	.8byte	.LVL225
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.8byte	.LVL225
-	.8byte	.LVL226
+	.8byte	.LVL147-1
+	.8byte	.LVL148
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 200
+	.8byte	.LVL148
+	.8byte	.LVL149
 	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL226
-	.8byte	.LFE259
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST55:
-	.8byte	.LVL143
-	.8byte	.LVL146
+	.byte	0x50
+	.8byte	.LVL149
+	.8byte	.LVL151
 	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL146
-	.8byte	.LVL173
+	.byte	0x66
+	.8byte	.LVL151
+	.8byte	.LVL152-1
 	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL173
-	.8byte	.LVL174
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.8byte	.LVL174
-	.8byte	.LVL177
+	.byte	0x50
+	.8byte	.LVL152-1
+	.8byte	.LVL153
 	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL177
-	.8byte	.LVL190
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
+	.byte	0x63
+	.8byte	.LVL153
+	.8byte	.LVL155
+	.2byte	0x2
+	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL190
-	.8byte	.LVL194
+	.8byte	.LVL155
+	.8byte	.LVL158
 	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL194
-	.8byte	.LVL198
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
+	.byte	0x63
+	.8byte	.LVL159
+	.8byte	.LVL162
+	.2byte	0x2
+	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL198
-	.8byte	.LVL208
+	.8byte	.LVL162
+	.8byte	.LVL164
 	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL208
-	.8byte	.LVL225
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.8byte	.LVL225
-	.8byte	.LVL230
+	.byte	0x50
+	.8byte	.LVL164
+	.8byte	.LVL165
 	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL230
-	.8byte	.LFE259
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
+	.byte	0x63
+	.8byte	.LVL165
+	.8byte	.LVL168
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL168
+	.8byte	.LVL169
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL169
+	.8byte	.LVL179
+	.2byte	0x2
+	.byte	0x30
 	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST56:
-	.8byte	.LVL154
-	.8byte	.LVL156
+	.8byte	.LVL179
+	.8byte	.LVL181
 	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL156
-	.8byte	.LVL157
-	.2byte	0x3
-	.byte	0x86
-	.sleb128 1
+	.byte	0x63
+	.8byte	.LVL181
+	.8byte	.LVL184
+	.2byte	0x2
+	.byte	0x30
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-	.8byte	.LVL163
-	.8byte	.LVL164
+	.8byte	.LVL184
+	.8byte	.LVL185-1
 	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL180
-	.8byte	.LVL190
+	.byte	0x50
+	.8byte	.LVL185-1
+	.8byte	.LVL189
 	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL191
+	.byte	0x63
+	.8byte	.LVL189
 	.8byte	.LVL192
 	.2byte	0x2
-	.byte	0x31
+	.byte	0x30
 	.byte	0x9f
 	.8byte	.LVL192
 	.8byte	.LVL193
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL193
+	.8byte	.LVL200
 	.2byte	0x2
-	.byte	0x33
+	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL193
-	.8byte	.LVL194
+	.8byte	0
+	.8byte	0
+.LLST40:
+	.8byte	.LVL105
+	.8byte	.LVL155
 	.2byte	0x2
-	.byte	0x34
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 	.byte	0x9f
-	.8byte	.LVL194
-	.8byte	.LVL198
+	.8byte	.LVL155
+	.8byte	.LVL156
 	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL210
-	.8byte	.LVL211
+	.byte	0x52
+	.8byte	.LVL159
+	.8byte	.LVL179
+	.2byte	0x2
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+	.8byte	.LVL179
+	.8byte	.LVL180
 	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL214
-	.8byte	.LVL218
+	.byte	0x50
+	.8byte	.LVL181
+	.8byte	.LVL200
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST8:
+	.8byte	.LVL33
+	.8byte	.LVL34
 	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL221
-	.8byte	.LVL225
+	.byte	0x50
+	.8byte	.LVL34
+	.8byte	.LFE255
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST7:
+	.8byte	.LVL31
+	.8byte	.LVL32
 	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL225
-	.8byte	.LVL227
+	.byte	0x50
+	.8byte	.LVL32
+	.8byte	.LFE254
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST0:
+	.8byte	.LVL0
+	.8byte	.LVL1
 	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL232
-	.8byte	.LVL242
+	.byte	0x50
+	.8byte	.LVL1
+	.8byte	.LVL12
 	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL242
-	.8byte	.LVL243
-	.2byte	0x3
-	.byte	0x89
-	.sleb128 1
+	.byte	0x67
+	.8byte	.LVL12
+	.8byte	.LVL13
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
 	.byte	0x9f
+	.8byte	.LVL13
+	.8byte	.LFE201
+	.2byte	0x1
+	.byte	0x67
 	.8byte	0
 	.8byte	0
-.LLST57:
-	.8byte	.LVL163
-	.8byte	.LVL164
+.LLST1:
+	.8byte	.LVL0
+	.8byte	.LVL2-1
 	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL166
-	.8byte	.LVL178
+	.byte	0x51
+	.8byte	.LVL2-1
+	.8byte	.LVL12
 	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL190
-	.8byte	.LVL194
+	.byte	0x68
+	.8byte	.LVL12
+	.8byte	.LVL13
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL13
+	.8byte	.LFE201
 	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL198
-	.8byte	.LVL219
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST2:
+	.8byte	.LVL2
+	.8byte	.LVL3
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL3
+	.8byte	.LVL11
 	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL219
-	.8byte	.LVL220
+	.byte	0x64
+	.8byte	.LVL13
+	.8byte	.LVL22
 	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL220
-	.8byte	.LVL230
+	.byte	0x64
+	.8byte	.LVL23
+	.8byte	.LFE201
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST58:
-	.8byte	.LVL183
-	.8byte	.LVL185
+.LLST3:
+	.8byte	.LVL24
+	.8byte	.LVL25
 	.2byte	0x2
-	.byte	0x32
-	.byte	0x9f
-	.8byte	.LVL185
-	.8byte	.LVL188
-	.2byte	0x2
-	.byte	0x33
-	.byte	0x9f
-	.8byte	.LVL188
-	.8byte	.LVL190
-	.2byte	0x2
-	.byte	0x34
-	.byte	0x9f
-	.8byte	.LVL194
-	.8byte	.LVL195
-	.2byte	0x2
-	.byte	0x32
-	.byte	0x9f
-	.8byte	.LVL195
-	.8byte	.LVL197
-	.2byte	0x2
-	.byte	0x33
-	.byte	0x9f
-	.8byte	.LVL197
-	.8byte	.LVL198
-	.2byte	0x2
-	.byte	0x34
-	.byte	0x9f
-	.8byte	.LVL216
-	.8byte	.LVL219
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL219
-	.8byte	.LVL221
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL224
-	.8byte	.LVL225
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL232
-	.8byte	.LVL234
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.8byte	.LVL234
-	.8byte	.LVL237
-	.2byte	0x2
-	.byte	0x32
-	.byte	0x9f
-	.8byte	.LVL237
-	.8byte	.LVL240
-	.2byte	0x2
-	.byte	0x33
-	.byte	0x9f
-	.8byte	.LVL240
-	.8byte	.LVL242
-	.2byte	0x2
-	.byte	0x34
+	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST59:
-	.8byte	.LVL178
-	.8byte	.LVL190
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL194
-	.8byte	.LVL198
+.LLST4:
+	.8byte	.LVL4
+	.8byte	.LVL11
 	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL208
-	.8byte	.LVL225
+	.byte	0x6b
+	.8byte	.LVL13
+	.8byte	.LVL21
 	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL232
-	.8byte	.LVL247
+	.byte	0x6b
+	.8byte	.LVL22
+	.8byte	.LFE201
 	.2byte	0x1
-	.byte	0x6a
+	.byte	0x64
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL146
-	.8byte	.LVL171
-	.2byte	0x2
-	.byte	0x31
+.LLST5:
+	.8byte	.LVL3
+	.8byte	.LVL4
+	.2byte	0x3
+	.byte	0x9
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 	.byte	0x9f
-	.8byte	.LVL171
-	.8byte	.LVL174
+	.8byte	.LVL4
+	.8byte	.LVL5
 	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL174
-	.8byte	.LVL202
-	.2byte	0x2
-	.byte	0x31
+	.byte	0x6c
+	.8byte	.LVL5
+	.8byte	.LVL6
+	.2byte	0x4
+	.byte	0x8c
+	.sleb128 0
+	.byte	0x20
 	.byte	0x9f
-	.8byte	.LVL202
-	.8byte	.LVL203
+	.8byte	.LVL6
+	.8byte	.LVL11
 	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL203
-	.8byte	.LVL208
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.8byte	.LVL208
-	.8byte	.LVL225
+	.byte	0x6c
+	.8byte	.LVL13
+	.8byte	.LVL22
 	.2byte	0x1
-	.byte	0x69
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-	.8byte	.LVL230
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
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-	.8byte	.LVL245
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
+	.byte	0x6c
 	.8byte	0
 	.8byte	0
-.LLST61:
-	.8byte	.LVL146
-	.8byte	.LVL183
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL183
-	.8byte	.LVL184
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL184
-	.8byte	.LVL185
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL185
-	.8byte	.LVL186
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL188
-	.8byte	.LVL189
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL189
-	.8byte	.LVL190
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL190
-	.8byte	.LVL194
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL194
-	.8byte	.LVL197
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL197
-	.8byte	.LVL198
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL198
-	.8byte	.LVL211
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL211
-	.8byte	.LVL213
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL213
-	.8byte	.LVL216
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL216
-	.8byte	.LVL217-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL217-1
-	.8byte	.LVL221
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL221
-	.8byte	.LVL224
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL224
-	.8byte	.LVL225
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL225
-	.8byte	.LVL230
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL232
-	.8byte	.LVL234
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL234
-	.8byte	.LVL235
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL235
-	.8byte	.LVL237
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL237
-	.8byte	.LVL238
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL238
-	.8byte	.LVL240
-	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL240
-	.8byte	.LVL241-1
+.LLST6:
+	.8byte	.LVL18
+	.8byte	.LVL19
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL241-1
-	.8byte	.LVL242
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL242
-	.8byte	.LVL244
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL244
-	.8byte	.LVL246
+	.8byte	.LVL19
+	.8byte	.LFE201
 	.2byte	0x1
-	.byte	0x68
+	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST62:
-	.8byte	.LVL146
-	.8byte	.LVL211
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL211
-	.8byte	.LVL212
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL213
-	.8byte	.LVL230
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL232
-	.8byte	.LVL244
+	.section	.debug_aranges,"",@progbits
+	.4byte	0x7c
 	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL244
-	.8byte	.LVL245
-	.2byte	0x1
-	.byte	0x6b
+	.4byte	.Ldebug_info0
+	.byte	0x8
+	.byte	0
+	.2byte	0
+	.2byte	0
+	.8byte	.LFB201
+	.8byte	.LFE201-.LFB201
+	.8byte	.LFB254
+	.8byte	.LFE254-.LFB254
+	.8byte	.LFB255
+	.8byte	.LFE255-.LFB255
+	.8byte	.LFB269
+	.8byte	.LFE269-.LFB269
+	.8byte	.LFB272
+	.8byte	.LFE272-.LFB272
+	.8byte	.LFB257
+	.8byte	.LFE257-.LFB257
 	.8byte	0
 	.8byte	0
-.LLST63:
-	.8byte	.LVL146
-	.8byte	.LVL153
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL157
-	.8byte	.LVL163
-	.2byte	0x1
-	.byte	0x65
+	.section	.debug_ranges,"",@progbits
+.Ldebug_ranges0:
+	.8byte	.LBB10
+	.8byte	.LBE10
+	.8byte	.LBB16
+	.8byte	.LBE16
+	.8byte	.LBB17
+	.8byte	.LBE17
+	.8byte	.LBB18
+	.8byte	.LBE18
+	.8byte	.LBB22
+	.8byte	.LBE22
 	.8byte	0
 	.8byte	0
-.LLST64:
-	.8byte	.LVL146
-	.8byte	.LVL153
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL157
-	.8byte	.LVL163
-	.2byte	0x1
-	.byte	0x64
+	.8byte	.LBB19
+	.8byte	.LBE19
+	.8byte	.LBB23
+	.8byte	.LBE23
 	.8byte	0
 	.8byte	0
-.LLST65:
-	.8byte	.LVL146
-	.8byte	.LVL147
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL147
-	.8byte	.LVL148
-	.2byte	0x3
-	.byte	0x70
-	.sleb128 1
-	.byte	0x9f
-	.8byte	.LVL149
-	.8byte	.LVL150
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL152
-	.8byte	.LVL153
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL157
-	.8byte	.LVL158
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL158
-	.8byte	.LVL159
-	.2byte	0x3
-	.byte	0x70
-	.sleb128 1
-	.byte	0x9f
-	.8byte	.LVL160
-	.8byte	.LVL161
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL161
-	.8byte	.LVL162
-	.2byte	0x3
-	.byte	0x86
-	.sleb128 1
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST66:
-	.8byte	.LVL146
-	.8byte	.LVL153
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL157
-	.8byte	.LVL163
-	.2byte	0x1
-	.byte	0x67
-	.8byte	0
-	.8byte	0
-.LLST67:
-	.8byte	.LVL168
-	.8byte	.LVL169
-	.2byte	0x2
-	.byte	0x32
-	.byte	0x9f
-	.8byte	.LVL169
-	.8byte	.LVL170
-	.2byte	0x2
-	.byte	0x33
-	.byte	0x9f
-	.8byte	.LVL170
-	.8byte	.LVL171
-	.2byte	0x2
-	.byte	0x34
-	.byte	0x9f
-	.8byte	.LVL198
-	.8byte	.LVL199
-	.2byte	0x2
-	.byte	0x34
-	.byte	0x9f
-	.8byte	.LVL199
-	.8byte	.LVL200
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL200
-	.8byte	.LVL201
-	.2byte	0x3
-	.byte	0x71
-	.sleb128 1
-	.byte	0x9f
-	.8byte	.LVL204
-	.8byte	.LVL205
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.8byte	.LVL205
-	.8byte	.LVL206
-	.2byte	0x2
-	.byte	0x32
-	.byte	0x9f
-	.8byte	.LVL206
-	.8byte	.LVL207
-	.2byte	0x2
-	.byte	0x33
-	.byte	0x9f
-	.8byte	.LVL207
-	.8byte	.LVL208
-	.2byte	0x2
-	.byte	0x34
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST68:
-	.8byte	.LVL199
-	.8byte	.LVL202
-	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL203
-	.8byte	.LVL208
-	.2byte	0x1
-	.byte	0x69
-	.8byte	0
-	.8byte	0
-.LLST0:
-	.8byte	.LVL0
-	.8byte	.LVL1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1
-	.8byte	.LVL6
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL6
-	.8byte	.LVL7
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL7
-	.8byte	.LFE258
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST1:
-	.8byte	.LVL2
-	.8byte	.LVL3
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL3
-	.8byte	.LVL4
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL7
-	.8byte	.LVL8
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL10
-	.8byte	.LVL11
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL11
-	.8byte	.LFE258
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST36:
-	.8byte	.LVL86
-	.8byte	.LVL87
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL87
-	.8byte	.LVL101
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL101
-	.8byte	.LVL102
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL102
-	.8byte	.LFE201
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST37:
-	.8byte	.LVL86
-	.8byte	.LVL88-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL88-1
-	.8byte	.LVL101
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL101
-	.8byte	.LVL102
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	.LVL102
-	.8byte	.LFE201
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST38:
-	.8byte	.LVL88
-	.8byte	.LVL89
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL89
-	.8byte	.LVL100
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL102
-	.8byte	.LVL111
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL112
-	.8byte	.LFE201
-	.2byte	0x1
-	.byte	0x69
-	.8byte	0
-	.8byte	0
-.LLST39:
-	.8byte	.LVL95
-	.8byte	.LVL96
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL96
-	.8byte	.LVL97
-	.2byte	0x2
-	.byte	0x34
-	.byte	0x9f
-	.8byte	.LVL97
-	.8byte	.LVL100
-	.2byte	0x2
-	.byte	0x38
-	.byte	0x9f
-	.8byte	.LVL102
-	.8byte	.LVL111
-	.2byte	0x2
-	.byte	0x38
-	.byte	0x9f
-	.8byte	.LVL113
-	.8byte	.LVL114
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST40:
-	.8byte	.LVL90
-	.8byte	.LVL91
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL91
-	.8byte	.LVL100
-	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL102
-	.8byte	.LVL111
-	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL111
-	.8byte	.LFE201
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST41:
-	.8byte	.LVL89
-	.8byte	.LVL91
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL91
-	.8byte	.LVL92
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL92
-	.8byte	.LVL93
-	.2byte	0x4
-	.byte	0x8a
-	.sleb128 0
-	.byte	0x20
-	.byte	0x9f
-	.8byte	.LVL93
-	.8byte	.LVL100
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL102
-	.8byte	.LVL110
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	0
-	.8byte	0
-.LLST42:
-	.8byte	.LVL107
-	.8byte	.LVL108
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL108
-	.8byte	.LFE201
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-	.section	.debug_aranges,"",@progbits
-	.4byte	0xac
-	.2byte	0x2
-	.4byte	.Ldebug_info0
-	.byte	0x8
-	.byte	0
-	.2byte	0
-	.2byte	0
-	.8byte	.LFB258
-	.8byte	.LFE258-.LFB258
-	.8byte	.LFB275
-	.8byte	.LFE275-.LFB275
-	.8byte	.LFB276
-	.8byte	.LFE276-.LFB276
-	.8byte	.LFB277
-	.8byte	.LFE277-.LFB277
-	.8byte	.LFB278
-	.8byte	.LFE278-.LFB278
-	.8byte	.LFB201
-	.8byte	.LFE201-.LFB201
-	.8byte	.LFB272
-	.8byte	.LFE272-.LFB272
-	.8byte	.LFB259
-	.8byte	.LFE259-.LFB259
-	.8byte	.LFB279
-	.8byte	.LFE279-.LFB279
-	.8byte	0
-	.8byte	0
-	.section	.debug_ranges,"",@progbits
-.Ldebug_ranges0:
-	.8byte	.LBB18
-	.8byte	.LBE18
-	.8byte	.LBB24
-	.8byte	.LBE24
-	.8byte	.LBB25
-	.8byte	.LBE25
-	.8byte	.LBB26
-	.8byte	.LBE26
-	.8byte	.LBB30
-	.8byte	.LBE30
-	.8byte	0
-	.8byte	0
-	.8byte	.LBB27
-	.8byte	.LBE27
-	.8byte	.LBB31
-	.8byte	.LBE31
-	.8byte	0
-	.8byte	0
-	.8byte	.LBB35
-	.8byte	.LBE35
-	.8byte	.LBB40
-	.8byte	.LBE40
-	.8byte	.LBB41
-	.8byte	.LBE41
-	.8byte	0
-	.8byte	0
-	.8byte	.LBB46
-	.8byte	.LBE46
-	.8byte	.LBB54
-	.8byte	.LBE54
-	.8byte	.LBB55
-	.8byte	.LBE55
-	.8byte	.LBB56
-	.8byte	.LBE56
-	.8byte	.LBB57
-	.8byte	.LBE57
-	.8byte	.LBB58
-	.8byte	.LBE58
-	.8byte	.LBB59
-	.8byte	.LBE59
-	.8byte	0
-	.8byte	0
-	.8byte	.LBB60
-	.8byte	.LBE60
-	.8byte	.LBB64
-	.8byte	.LBE64
-	.8byte	.LBB65
-	.8byte	.LBE65
-	.8byte	0
-	.8byte	0
-	.8byte	.LFB258
-	.8byte	.LFE258
-	.8byte	.LFB275
-	.8byte	.LFE275
-	.8byte	.LFB276
-	.8byte	.LFE276
-	.8byte	.LFB277
-	.8byte	.LFE277
-	.8byte	.LFB278
-	.8byte	.LFE278
-	.8byte	.LFB201
-	.8byte	.LFE201
-	.8byte	.LFB272
-	.8byte	.LFE272
-	.8byte	.LFB259
-	.8byte	.LFE259
-	.8byte	.LFB279
-	.8byte	.LFE279
-	.8byte	0
-	.8byte	0
-	.section	.debug_line,"",@progbits
-.Ldebug_line0:
-	.section	.debug_str,"MS",@progbits,1
-.LASF309:
-	.string	"gd_t"
-.LASF15:
-	.string	"long int"
-.LASF39:
-	.string	"uclass_node"
-.LASF286:
-	.string	"dm_root_f"
-.LASF53:
-	.string	"flash_id"
-.LASF48:
-	.string	"prev"
-.LASF360:
-	.string	"of_match"
-.LASF208:
-	.string	"UCLASS_NORTHBRIDGE"
-.LASF357:
-	.string	"mem_malloc_start"
-.LASF453:
-	.string	"max_bank"
-.LASF332:
-	.string	"net_hostname"
-.LASF237:
-	.string	"UCLASS_THERMAL"
-.LASF60:
-	.string	"base"
-.LASF353:
-	.string	"NETLOOP_RESTART"
-.LASF284:
-	.string	"new_gd"
-.LASF264:
-	.string	"pre_serial"
-.LASF191:
-	.string	"UCLASS_FIRMWARE"
-.LASF466:
-	.string	"udelay"
-.LASF151:
-	.string	"fit_noffset_fdt"
-.LASF297:
-	.string	"malloc_ptr"
-.LASF90:
-	.string	"_datarellocal_start_ofs"
-.LASF420:
-	.string	"capacity"
-.LASF155:
-	.string	"rd_start"
-.LASF413:
-	.string	"err_adr"
-.LASF373:
-	.string	"property"
-.LASF263:
-	.string	"tlb_emerg"
-.LASF78:
-	.string	"bi_enetaddr"
-.LASF287:
-	.string	"uclass_root"
-.LASF198:
-	.string	"UCLASS_IRQ"
-.LASF242:
-	.string	"UCLASS_USB_HUB"
-.LASF238:
-	.string	"UCLASS_TIMER"
-.LASF42:
-	.string	"flags"
-.LASF408:
-	.string	"start_adr"
-.LASF148:
-	.string	"fit_noffset_rd"
-.LASF266:
-	.string	"baudrate"
-.LASF334:
-	.string	"net_ethaddr"
-.LASF294:
-	.string	"timebase_l"
-.LASF21:
-	.string	"errno"
-.LASF32:
-	.string	"node"
-.LASF361:
-	.string	"bind"
-.LASF458:
-	.string	"printf"
-.LASF8:
-	.string	"unsigned int"
-.LASF80:
-	.string	"bi_intfreq"
-.LASF47:
-	.string	"next"
-.LASF109:
-	.string	"version"
-.LASF393:
-	.string	"per_device_platdata_auto_alloc_size"
-.LASF140:
-	.string	"legacy_hdr_os_copy"
-.LASF205:
-	.string	"UCLASS_MMC"
-.LASF209:
-	.string	"UCLASS_NVME"
-.LASF340:
-	.string	"net_rx_packet"
-.LASF38:
-	.string	"parent_priv"
-.LASF186:
-	.string	"UCLASS_CROS_EC"
-.LASF201:
-	.string	"UCLASS_LPC"
-.LASF57:
-	.string	"flash_info"
-.LASF113:
-	.string	"size_dt_struct"
-.LASF378:
-	.string	"p_current"
-.LASF22:
-	.string	"___strtok"
-.LASF67:
-	.string	"bi_memsize"
-.LASF416:
-	.string	"cpu_2_io"
-.LASF165:
-	.string	"bootm_headers_t"
-.LASF45:
-	.string	"udevice"
-.LASF460:
-	.string	"memset"
-.LASF85:
-	.string	"bd_t"
-.LASF407:
-	.string	"buf_len"
-.LASF270:
-	.string	"bus_clk"
-.LASF399:
-	.string	"DIAGONALSCAN"
-.LASF233:
-	.string	"UCLASS_SPI_FLASH"
-.LASF199:
-	.string	"UCLASS_KEYBOARD"
-.LASF424:
-	.string	"random_test2"
-.LASF72:
-	.string	"bi_sramsize"
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-	.string	"UCLASS_I2C_MUX"
-.LASF409:
-	.string	"prt_en"
-.LASF275:
-	.string	"env_addr"
-.LASF421:
-	.string	"wr_value"
-.LASF235:
-	.string	"UCLASS_SYSCON"
-.LASF182:
-	.string	"UCLASS_BLK"
-.LASF221:
-	.string	"UCLASS_PWRSEQ"
-.LASF167:
-	.string	"command_ret_t"
-.LASF141:
-	.string	"legacy_hdr_valid"
-.LASF262:
-	.string	"tlb_fillptr"
-.LASF230:
-	.string	"UCLASS_SERIAL"
-.LASF313:
-	.string	"load_addr"
-.LASF288:
-	.string	"fdt_blob"
-.LASF328:
-	.string	"net_gateway"
-.LASF219:
-	.string	"UCLASS_PWM"
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-	.string	"UCLASS_PCI_EMUL"
-.LASF190:
-	.string	"UCLASS_GPIO"
-.LASF349:
-	.string	"net_boot_file_expected_size_in_blocks"
-.LASF98:
-	.string	"complete"
-.LASF215:
-	.string	"UCLASS_PHY"
-.LASF278:
-	.string	"relocaddr"
-.LASF322:
-	.string	"send"
-.LASF3:
-	.string	"signed char"
-.LASF212:
-	.string	"UCLASS_PCH"
-.LASF108:
-	.string	"off_mem_rsvmap"
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-	.string	"UCLASS_TEST_PROBE"
-.LASF465:
-	.string	"regulator_set_value"
-.LASF19:
-	.string	"uint32_t"
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-	.string	"udevice_id"
-.LASF315:
-	.string	"save_size"
-.LASF291:
-	.string	"of_root"
-.LASF359:
-	.string	"mem_malloc_brk"
-.LASF152:
-	.string	"fit_hdr_setup"
-.LASF405:
-	.string	"test_pat_param"
-.LASF293:
-	.string	"timebase_h"
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-	.string	"UCLASS_TEST"
-.LASF276:
-	.string	"env_valid"
-.LASF86:
-	.string	"IRQ_STACK_START"
-.LASF456:
-	.string	"shift"
-.LASF70:
-	.string	"bi_flashoffset"
-.LASF467:
-	.string	"malloc"
-.LASF210:
-	.string	"UCLASS_PANEL"
-.LASF326:
-	.string	"index"
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-	.string	"child_head"
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-	.string	"image_info_t"
-.LASF36:
-	.string	"uclass"
-.LASF173:
-	.string	"UCLASS_TEST_BUS"
-.LASF245:
-	.string	"UCLASS_VIDEO_CONSOLE"
-.LASF441:
-	.string	"test_banks"
-.LASF362:
-	.string	"probe"
-.LASF102:
-	.string	"CMD_RET_USAGE"
-.LASF10:
-	.string	"long long unsigned int"
-.LASF258:
-	.string	"lastinc"
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-	.string	"post_bind"
-.LASF358:
-	.string	"mem_malloc_end"
-.LASF100:
-	.string	"CMD_RET_SUCCESS"
-.LASF101:
-	.string	"CMD_RET_FAILURE"
-.LASF207:
-	.string	"UCLASS_MTD"
-.LASF225:
-	.string	"UCLASS_RESET"
-.LASF126:
-	.string	"ih_type"
-.LASF183:
-	.string	"UCLASS_CLK"
-.LASF350:
-	.string	"net_ping_ip"
-.LASF79:
-	.string	"bi_ethspeed"
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-	.string	"UCLASS_IDE"
-.LASF377:
-	.string	"ofnode"
-.LASF239:
-	.string	"UCLASS_TPM"
-.LASF307:
+	.8byte	.LFB201
+	.8byte	.LFE201
+	.8byte	.LFB254
+	.8byte	.LFE254
+	.8byte	.LFB255
+	.8byte	.LFE255
+	.8byte	.LFB269
+	.8byte	.LFE269
+	.8byte	.LFB272
+	.8byte	.LFE272
+	.8byte	.LFB257
+	.8byte	.LFE257
+	.8byte	0
+	.8byte	0
+	.section	.debug_line,"",@progbits
+.Ldebug_line0:
+	.section	.debug_str,"MS",@progbits,1
+.LASF30:
+	.string	"parent_platdata"
+.LASF109:
+	.string	"off_mem_rsvmap"
+.LASF193:
+	.string	"UCLASS_I2C_EEPROM"
+.LASF464:
+	.string	"jt_funcs"
+.LASF198:
+	.string	"UCLASS_IRQ"
+.LASF159:
+	.string	"initrd_start"
+.LASF192:
+	.string	"UCLASS_I2C"
+.LASF13:
+	.string	"sizetype"
+.LASF334:
+	.string	"net_hostname"
+.LASF54:
+	.string	"start"
+.LASF231:
+	.string	"UCLASS_SPI"
+.LASF309:
 	.string	"child"
-.LASF59:
-	.string	"lmb_property"
-.LASF260:
-	.string	"tlb_addr"
-.LASF375:
-	.string	"value"
+.LASF196:
+	.string	"UCLASS_I2S"
+.LASF355:
+	.string	"NETLOOP_RESTART"
 .LASF194:
 	.string	"UCLASS_I2C_GENERIC"
-.LASF107:
-	.string	"off_dt_strings"
-.LASF111:
-	.string	"boot_cpuid_phys"
-.LASF363:
-	.string	"remove"
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-	.string	"fit_uname_cfg"
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-	.string	"working_fdt"
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-	.string	"sibling"
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-	.string	"ft_len"
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-	.string	"ih_comp"
-.LASF442:
-	.string	"abort"
-.LASF81:
-	.string	"bi_busfreq"
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-	.string	"UCLASS_PANEL_BACKLIGHT"
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-	.string	"global_data"
-.LASF317:
-	.string	"s_addr"
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-	.string	"arch"
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-	.string	"UCLASS_SPI_GENERIC"
-.LASF312:
-	.string	"__dtb_dt_spl_begin"
-.LASF103:
-	.string	"fdt_header"
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-	.string	"UCLASS_DISPLAY"
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-	.string	"pre_probe"
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-	.string	"net_loop_state"
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-	.string	"per_child_platdata_auto_alloc_size"
-.LASF450:
-	.string	"max_freq"
-.LASF300:
-	.string	"video_bottom"
+.LASF206:
+	.string	"UCLASS_MOD_EXP"
 .LASF253:
-	.string	"UCLASS_COUNT"
-.LASF71:
-	.string	"bi_sramstart"
-.LASF327:
-	.string	"eth_current"
-.LASF232:
-	.string	"UCLASS_SPMI"
-.LASF23:
-	.string	"_Bool"
-.LASF12:
-	.string	"phys_size_t"
-.LASF448:
-	.string	"scan_freq"
+	.string	"UCLASS_IO_DOMAIN"
+.LASF266:
+	.string	"using_pre_serial"
 .LASF37:
 	.string	"uclass_priv"
-.LASF132:
-	.string	"image_len"
-.LASF474:
-	.string	"print_available_addr"
-.LASF471:
-	.string	"jt_funcs"
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-	.string	"next_col"
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-	.string	"ctrlc"
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-	.string	"net_dns_server"
-.LASF433:
-	.string	"os_reg"
-.LASF304:
-	.string	"phandle"
-.LASF285:
-	.string	"dm_root"
+.LASF226:
+	.string	"UCLASS_RKNAND"
+.LASF170:
+	.string	"UCLASS_DEMO"
+.LASF378:
+	.string	"g_isi_pattern"
 .LASF117:
 	.string	"ih_magic"
-.LASF227:
-	.string	"UCLASS_RAMDISK"
-.LASF133:
-	.string	"load"
-.LASF26:
-	.string	"_binary_u_boot_bin_end"
-.LASF273:
-	.string	"fb_base"
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-	.string	"freq"
-.LASF150:
-	.string	"fit_uname_fdt"
-.LASF200:
-	.string	"UCLASS_LED"
-.LASF289:
-	.string	"new_fdt"
-.LASF181:
-	.string	"UCLASS_AHCI"
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-	.string	"argv"
-.LASF462:
-	.string	"strict_strtoul"
-.LASF41:
-	.string	"sibling_node"
-.LASF333:
-	.string	"net_root_path"
-.LASF49:
-	.string	"block_drvr"
-.LASF9:
-	.string	"long long int"
+.LASF46:
+	.string	"list_head"
+.LASF413:
+	.string	"err_addr"
+.LASF369:
+	.string	"child_pre_probe"
+.LASF302:
+	.string	"pm_ctx_phys"
+.LASF174:
+	.string	"UCLASS_TEST_PROBE"
+.LASF307:
+	.string	"full_name"
+.LASF249:
+	.string	"UCLASS_KEY"
+.LASF80:
+	.string	"bi_intfreq"
+.LASF445:
+	.string	"__func__"
+.LASF11:
+	.string	"phys_addr_t"
+.LASF244:
+	.string	"UCLASS_VIDEO_BRIDGE"
+.LASF301:
+	.string	"video_bottom"
+.LASF441:
+	.string	"set_ddr_freq"
+.LASF5:
+	.string	"__u8"
+.LASF354:
+	.string	"NETLOOP_CONTINUE"
+.LASF234:
+	.string	"UCLASS_SPI_GENERIC"
+.LASF296:
+	.string	"malloc_base"
+.LASF449:
+	.string	"get_page_size"
+.LASF56:
+	.string	"flash_info_t"
+.LASF210:
+	.string	"UCLASS_PANEL"
+.LASF134:
+	.string	"comp"
+.LASF129:
+	.string	"image_header_t"
+.LASF164:
+	.string	"state"
+.LASF186:
+	.string	"UCLASS_CROS_EC"
+.LASF74:
+	.string	"bi_dsp_freq"
+.LASF131:
+	.string	"image_start"
+.LASF433:
+	.string	"fast_test_bank"
+.LASF172:
+	.string	"UCLASS_TEST_FDT"
 .LASF418:
-	.string	"random_test"
-.LASF427:
 	.string	"diagonalscan"
-.LASF143:
-	.string	"fit_hdr_os"
+.LASF65:
+	.string	"bd_info"
+.LASF168:
+	.string	"uclass_id"
+.LASF121:
+	.string	"ih_load"
 .LASF314:
-	.string	"save_addr"
+	.string	"__dtb_dt_spl_begin"
+.LASF393:
+	.string	"pre_remove"
+.LASF415:
+	.string	"random_test1"
+.LASF414:
+	.string	"random_test2"
+.LASF7:
+	.string	"__u32"
 .LASF35:
 	.string	"priv"
-.LASF218:
-	.string	"UCLASS_PMIC"
-.LASF31:
-	.string	"uclass_platdata"
-.LASF14:
-	.string	"char"
+.LASF299:
+	.string	"cur_serial_dev"
+.LASF454:
+	.string	"strcasecmp"
+.LASF143:
+	.string	"fit_hdr_os"
+.LASF340:
+	.string	"net_tx_packet"
+.LASF248:
+	.string	"UCLASS_FG"
+.LASF339:
+	.string	"net_server_ip"
+.LASF465:
+	.string	"ofnode_union"
+.LASF347:
+	.string	"net_native_vlan"
+.LASF246:
+	.string	"UCLASS_VIDEO_CRTC"
+.LASF185:
+	.string	"UCLASS_CODEC"
+.LASF461:
+	.ascii	"GNU C11 6.3.1 20170404 -ms"
+	.string	"trict-align -march=armv8-a+nosimd -mlittle-endian -mabi=lp64 -g -Os -fno-builtin -ffreestanding -fshort-wchar -fno-stack-protector -fno-delete-null-pointer-checks -fstack-usage -fno-pic -ffunction-sections -fdata-sections -ffixed-r9 -fno-common -ffixed-x18"
+.LASF293:
+	.string	"env_buf"
+.LASF21:
+	.string	"errno"
+.LASF15:
+	.string	"long int"
+.LASF69:
+	.string	"bi_flashsize"
+.LASF29:
+	.string	"platdata"
+.LASF215:
+	.string	"UCLASS_PHY"
+.LASF92:
+	.string	"IRQ_STACK_START_IN"
+.LASF113:
+	.string	"size_dt_strings"
+.LASF243:
+	.string	"UCLASS_VIDEO"
+.LASF444:
+	.string	"shift"
+.LASF279:
+	.string	"relocaddr"
+.LASF384:
+	.string	"dev_head"
+.LASF350:
+	.string	"net_boot_file_size"
+.LASF123:
+	.string	"ih_dcrc"
+.LASF79:
+	.string	"bi_ethspeed"
+.LASF169:
+	.string	"UCLASS_ROOT"
 .LASF44:
 	.string	"ide_bus_offset"
-.LASF52:
-	.string	"sector_count"
-.LASF154:
-	.string	"fit_noffset_setup"
-.LASF131:
-	.string	"image_start"
-.LASF56:
-	.string	"flash_info_t"
-.LASF236:
-	.string	"UCLASS_SYSRESET"
-.LASF395:
-	.string	"CHANGEFREQ"
-.LASF473:
-	.string	"exit"
-.LASF336:
-	.string	"net_ip"
-.LASF384:
-	.string	"data"
-.LASF299:
-	.string	"video_top"
-.LASF255:
-	.string	"LOGF_MAX_CATEGORIES"
-.LASF356:
-	.string	"net_state"
-.LASF282:
-	.string	"start_addr_sp"
-.LASF144:
-	.string	"fit_uname_os"
+.LASF407:
+	.string	"test_pat_param"
+.LASF337:
+	.string	"net_server_ethaddr"
+.LASF82:
+	.string	"bi_arch_number"
+.LASF3:
+	.string	"signed char"
+.LASF199:
+	.string	"UCLASS_KEYBOARD"
 .LASF18:
 	.string	"uint8_t"
-.LASF7:
-	.string	"__u32"
-.LASF426:
-	.string	"cmp_value"
-.LASF364:
-	.string	"unbind"
-.LASF280:
+.LASF374:
+	.string	"per_child_platdata_auto_alloc_size"
+.LASF45:
+	.string	"udevice"
+.LASF125:
+	.string	"ih_arch"
+.LASF106:
+	.string	"totalsize"
+.LASF434:
+	.string	"abort"
+.LASF118:
+	.string	"ih_hcrc"
+.LASF281:
 	.string	"mon_len"
-.LASF355:
-	.string	"NETLOOP_FAIL"
-.LASF455:
-	.string	"crosstalk"
-.LASF366:
-	.string	"child_post_bind"
-.LASF305:
-	.string	"full_name"
+.LASF133:
+	.string	"load"
+.LASF239:
+	.string	"UCLASS_TPM"
+.LASF416:
+	.string	"cmp_value"
+.LASF59:
+	.string	"lmb_property"
+.LASF111:
+	.string	"last_comp_version"
+.LASF0:
+	.string	"unsigned char"
+.LASF391:
+	.string	"pre_probe"
 .LASF400:
-	.string	"FASTTEST"
-.LASF193:
-	.string	"UCLASS_I2C_EEPROM"
-.LASF296:
-	.string	"malloc_limit"
-.LASF138:
-	.string	"bootm_headers"
-.LASF272:
-	.string	"mem_clk"
-.LASF438:
-	.string	"test_case"
-.LASF168:
-	.string	"uclass_id"
-.LASF344:
-	.string	"net_our_vlan"
-.LASF95:
-	.string	"repeatable"
-.LASF319:
-	.string	"enetaddr"
+	.string	"RANDOM"
+.LASF166:
+	.string	"images"
+.LASF252:
+	.string	"UCLASS_DVFS"
+.LASF75:
+	.string	"bi_ddr_freq"
+.LASF200:
+	.string	"UCLASS_LED"
+.LASF120:
+	.string	"ih_size"
+.LASF39:
+	.string	"uclass_node"
+.LASF23:
+	.string	"_Bool"
+.LASF375:
+	.string	"property"
+.LASF358:
+	.string	"net_state"
+.LASF377:
+	.string	"value"
+.LASF195:
+	.string	"UCLASS_I2C_MUX"
+.LASF14:
+	.string	"char"
+.LASF25:
+	.string	"_binary_u_boot_bin_start"
+.LASF406:
+	.string	"test_pattern"
+.LASF356:
+	.string	"NETLOOP_SUCCESS"
+.LASF36:
+	.string	"uclass"
+.LASF381:
+	.string	"p_current"
+.LASF383:
+	.string	"uc_drv"
+.LASF353:
+	.string	"net_loop_state"
+.LASF43:
+	.string	"req_seq"
 .LASF310:
-	.string	"monitor_flash_len"
-.LASF368:
-	.string	"child_post_remove"
-.LASF371:
-	.string	"per_child_auto_alloc_size"
+	.string	"sibling"
+.LASF287:
+	.string	"dm_root_f"
+.LASF321:
+	.string	"enetaddr"
+.LASF221:
+	.string	"UCLASS_PWRSEQ"
+.LASF439:
+	.string	"times"
+.LASF379:
+	.string	"of_offset"
+.LASF149:
+	.string	"fit_hdr_fdt"
+.LASF348:
+	.string	"net_restart_wrap"
+.LASF336:
+	.string	"net_ethaddr"
+.LASF42:
+	.string	"flags"
+.LASF425:
+	.string	"cmdtp"
+.LASF126:
+	.string	"ih_type"
+.LASF107:
+	.string	"off_dt_struct"
+.LASF443:
+	.string	"crosstalk"
+.LASF70:
+	.string	"bi_flashoffset"
+.LASF349:
+	.string	"net_boot_file_name"
+.LASF386:
+	.string	"compatible"
+.LASF171:
+	.string	"UCLASS_TEST"
+.LASF119:
+	.string	"ih_time"
+.LASF274:
+	.string	"fb_base"
+.LASF271:
+	.string	"bus_clk"
 .LASF222:
 	.string	"UCLASS_RAM"
-.LASF325:
-	.string	"write_hwaddr"
-.LASF365:
-	.string	"ofdata_to_platdata"
-.LASF217:
-	.string	"UCLASS_PINCTRL"
-.LASF469:
-	.string	"cmd/ddr_tool/ddr_test_code.c"
+.LASF189:
+	.string	"UCLASS_ETH"
+.LASF32:
+	.string	"node"
 .LASF130:
 	.string	"image_info"
-.LASF29:
-	.string	"platdata"
-.LASF257:
-	.string	"timer_rate_hz"
-.LASF89:
-	.string	"_datarelrolocal_start_ofs"
-.LASF175:
-	.string	"UCLASS_SPI_EMUL"
-.LASF206:
-	.string	"UCLASS_MOD_EXP"
-.LASF105:
-	.string	"totalsize"
-.LASF385:
-	.string	"uclass_driver"
-.LASF432:
-	.string	"get_page_size"
-.LASF73:
-	.string	"bi_arm_freq"
-.LASF324:
-	.string	"halt"
-.LASF414:
-	.string	"print_memory"
-.LASF129:
-	.string	"image_header_t"
-.LASF93:
-	.string	"cmd_tbl_s"
-.LASF68:
-	.string	"bi_flashstart"
+.LASF136:
+	.string	"arch"
+.LASF273:
+	.string	"mem_clk"
+.LASF459:
+	.string	"write_buf_to_ddr"
+.LASF270:
+	.string	"cpu_clk"
+.LASF50:
+	.string	"select_hwpart"
+.LASF341:
+	.string	"net_rx_packets"
+.LASF359:
+	.string	"mem_malloc_start"
 .LASF91:
 	.string	"_datarelro_start_ofs"
-.LASF410:
-	.string	"buful"
-.LASF346:
-	.string	"net_restart_wrap"
-.LASF383:
-	.string	"compatible"
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-	.string	"UCLASS_I2C_EMUL"
-.LASF271:
-	.string	"pci_clk"
-.LASF184:
-	.string	"UCLASS_CPU"
-.LASF343:
-	.string	"net_null_ethaddr"
-.LASF250:
-	.string	"UCLASS_RC"
-.LASF337:
-	.string	"net_server_ip"
-.LASF402:
-	.string	"TESTCASSMAX"
-.LASF51:
-	.string	"size"
-.LASF58:
-	.string	"long double"
-.LASF401:
-	.string	"FULLTEST"
+.LASF17:
+	.string	"ulong"
+.LASF122:
+	.string	"ih_ep"
+.LASF61:
+	.string	"lmb_region"
+.LASF467:
+	.string	"do_ddr_test"
+.LASF447:
+	.string	"printf"
+.LASF144:
+	.string	"fit_uname_os"
 .LASF76:
 	.string	"bi_bootflags"
-.LASF83:
-	.string	"bi_boot_params"
-.LASF55:
-	.string	"protect"
-.LASF412:
-	.string	"reread"
-.LASF295:
-	.string	"malloc_base"
+.LASF338:
+	.string	"net_ip"
+.LASF291:
+	.string	"fdt_size"
+.LASF332:
+	.string	"net_dns_server"
+.LASF352:
+	.string	"net_ping_ip"
+.LASF63:
+	.string	"memory"
+.LASF104:
+	.string	"fdt_header"
+.LASF360:
+	.string	"mem_malloc_end"
+.LASF202:
+	.string	"UCLASS_MAILBOX"
+.LASF156:
+	.string	"rd_end"
+.LASF363:
+	.string	"bind"
+.LASF282:
+	.string	"irq_sp"
+.LASF161:
+	.string	"cmdline_start"
+.LASF328:
+	.string	"index"
+.LASF269:
+	.string	"global_data"
+.LASF395:
+	.string	"per_device_auto_alloc_size"
+.LASF456:
+	.string	"ctrlc"
+.LASF95:
+	.string	"repeatable"
+.LASF229:
+	.string	"UCLASS_SCSI"
+.LASF241:
+	.string	"UCLASS_USB_DEV_GENERIC"
+.LASF203:
+	.string	"UCLASS_MASS_STORAGE"
 .LASF1:
 	.string	"long unsigned int"
-.LASF170:
-	.string	"UCLASS_DEMO"
-.LASF116:
-	.string	"image_header"
-.LASF110:
-	.string	"last_comp_version"
-.LASF311:
-	.string	"__dtb_dt_begin"
 .LASF179:
 	.string	"UCLASS_SIMPLE_BUS"
-.LASF189:
-	.string	"UCLASS_ETH"
-.LASF394:
+.LASF442:
+	.string	"freq"
+.LASF311:
+	.string	"gd_t"
+.LASF333:
+	.string	"net_nis_domain"
+.LASF397:
 	.string	"console_buffer"
-.LASF162:
-	.string	"cmdline_end"
-.LASF436:
-	.string	"argc"
-.LASF75:
-	.string	"bi_ddr_freq"
-.LASF106:
-	.string	"off_dt_struct"
-.LASF302:
-	.string	"serial"
-.LASF329:
-	.string	"net_netmask"
-.LASF65:
-	.string	"bd_info"
-.LASF161:
-	.string	"cmdline_start"
-.LASF166:
-	.string	"images"
-.LASF265:
-	.string	"using_pre_serial"
-.LASF139:
-	.string	"legacy_hdr_os"
-.LASF202:
-	.string	"UCLASS_MAILBOX"
-.LASF226:
-	.string	"UCLASS_RKNAND"
-.LASF147:
-	.string	"fit_uname_rd"
-.LASF403:
-	.string	"g_isi_pattern"
-.LASF223:
-	.string	"UCLASS_REGULATOR"
-.LASF77:
-	.string	"bi_ip_addr"
-.LASF301:
-	.string	"pm_ctx_phys"
-.LASF251:
-	.string	"UCLASS_CHARGE_DISPLAY"
-.LASF33:
-	.string	"driver_data"
-.LASF396:
-	.string	"SCANFREQ"
-.LASF392:
-	.string	"per_device_auto_alloc_size"
-.LASF11:
-	.string	"phys_addr_t"
-.LASF444:
-	.string	"do_ddr_test"
-.LASF387:
-	.string	"pre_unbind"
-.LASF13:
-	.string	"sizetype"
-.LASF338:
-	.string	"net_tx_packet"
-.LASF159:
-	.string	"initrd_start"
-.LASF99:
-	.string	"cmd_tbl_t"
-.LASF34:
-	.string	"parent"
-.LASF6:
-	.string	"short int"
-.LASF415:
-	.string	"write_buf_to_ddr"
-.LASF125:
-	.string	"ih_arch"
-.LASF452:
-	.string	"get_test_addr"
-.LASF306:
-	.string	"properties"
+.LASF151:
+	.string	"fit_noffset_fdt"
+.LASF420:
+	.string	"next_adr"
+.LASF411:
+	.string	"wr_value"
+.LASF357:
+	.string	"NETLOOP_FAIL"
 .LASF247:
 	.string	"UCLASS_WDT"
-.LASF454:
-	.string	"available"
-.LASF397:
-	.string	"RANDOM"
-.LASF374:
-	.string	"length"
-.LASF331:
-	.string	"net_nis_domain"
-.LASF121:
-	.string	"ih_load"
-.LASF292:
-	.string	"env_buf"
-.LASF354:
-	.string	"NETLOOP_SUCCESS"
-.LASF472:
-	.string	"ofnode_union"
+.LASF260:
+	.string	"timer_reset_value"
+.LASF283:
+	.string	"start_addr_sp"
+.LASF71:
+	.string	"bi_sramstart"
+.LASF26:
+	.string	"_binary_u_boot_bin_end"
+.LASF284:
+	.string	"reloc_off"
+.LASF457:
+	.string	"judge_test_addr"
+.LASF112:
+	.string	"boot_cpuid_phys"
+.LASF259:
+	.string	"lastinc"
+.LASF263:
+	.string	"tlb_fillptr"
+.LASF440:
+	.string	"set_vdd_logic"
+.LASF147:
+	.string	"fit_uname_rd"
+.LASF235:
+	.string	"UCLASS_SYSCON"
+.LASF184:
+	.string	"UCLASS_CPU"
+.LASF142:
+	.string	"fit_uname_cfg"
+.LASF230:
+	.string	"UCLASS_SERIAL"
+.LASF346:
+	.string	"net_our_vlan"
+.LASF303:
+	.string	"serial"
+.LASF364:
+	.string	"probe"
+.LASF182:
+	.string	"UCLASS_BLK"
+.LASF137:
+	.string	"image_info_t"
 .LASF178:
 	.string	"UCLASS_USB_EMUL"
-.LASF172:
-	.string	"UCLASS_TEST_FDT"
-.LASF115:
-	.string	"fdt32_t"
+.LASF427:
+	.string	"argc"
+.LASF261:
+	.string	"tlb_addr"
+.LASF214:
+	.string	"UCLASS_PCI_GENERIC"
+.LASF428:
+	.string	"argv"
+.LASF132:
+	.string	"image_len"
+.LASF77:
+	.string	"bi_ip_addr"
+.LASF216:
+	.string	"UCLASS_PINCONFIG"
+.LASF324:
+	.string	"send"
+.LASF237:
+	.string	"UCLASS_THERMAL"
+.LASF140:
+	.string	"legacy_hdr_os_copy"
+.LASF9:
+	.string	"long long int"
+.LASF405:
+	.string	"TESTCASSMAX"
+.LASF431:
+	.string	"test_times"
+.LASF167:
+	.string	"command_ret_t"
 .LASF290:
-	.string	"fdt_size"
+	.string	"new_fdt"
+.LASF22:
+	.string	"___strtok"
+.LASF351:
+	.string	"net_boot_file_expected_size_in_blocks"
+.LASF438:
+	.string	"max_freq"
+.LASF362:
+	.string	"of_match"
+.LASF209:
+	.string	"UCLASS_NVME"
+.LASF264:
+	.string	"tlb_emerg"
+.LASF138:
+	.string	"bootm_headers"
+.LASF455:
+	.string	"strict_strtoul"
+.LASF55:
+	.string	"protect"
+.LASF240:
+	.string	"UCLASS_USB"
 .LASF435:
-	.string	"flag"
+	.string	"scan_freq_loop"
+.LASF388:
+	.string	"uclass_driver"
+.LASF250:
+	.string	"UCLASS_RC"
+.LASF294:
+	.string	"timebase_h"
+.LASF295:
+	.string	"timebase_l"
+.LASF187:
+	.string	"UCLASS_DISPLAY"
+.LASF345:
+	.string	"net_null_ethaddr"
+.LASF277:
+	.string	"env_valid"
 .LASF404:
-	.string	"test_pattern"
-.LASF434:
-	.string	"cmdtp"
-.LASF17:
-	.string	"ulong"
-.LASF119:
-	.string	"ih_time"
-.LASF120:
-	.string	"ih_size"
-.LASF188:
-	.string	"UCLASS_DMA"
+	.string	"FULLTEST"
+.LASF34:
+	.string	"parent"
+.LASF177:
+	.string	"UCLASS_PCI_EMUL"
+.LASF38:
+	.string	"parent_priv"
+.LASF251:
+	.string	"UCLASS_CHARGE_DISPLAY"
+.LASF315:
+	.string	"load_addr"
+.LASF98:
+	.string	"complete"
+.LASF89:
+	.string	"_datarelrolocal_start_ofs"
 .LASF97:
 	.string	"help"
-.LASF445:
-	.string	"set_vdd_logic"
+.LASF268:
+	.string	"addr"
+.LASF101:
+	.string	"CMD_RET_FAILURE"
+.LASF8:
+	.string	"unsigned int"
+.LASF16:
+	.string	"ushort"
 .LASF320:
-	.string	"iobase"
-.LASF224:
-	.string	"UCLASS_REMOTEPROC"
-.LASF352:
-	.string	"NETLOOP_CONTINUE"
-.LASF228:
-	.string	"UCLASS_RTC"
-.LASF259:
-	.string	"timer_reset_value"
-.LASF96:
-	.string	"usage"
+	.string	"eth_device"
+.LASF371:
+	.string	"priv_auto_alloc_size"
+.LASF297:
+	.string	"malloc_limit"
+.LASF218:
+	.string	"UCLASS_PMIC"
+.LASF410:
+	.string	"capacity"
+.LASF139:
+	.string	"legacy_hdr_os"
+.LASF108:
+	.string	"off_dt_strings"
+.LASF312:
+	.string	"monitor_flash_len"
 .LASF204:
 	.string	"UCLASS_MISC"
-.LASF62:
-	.string	"region"
-.LASF157:
-	.string	"ft_addr"
-.LASF398:
-	.string	"CROSSTALK"
-.LASF470:
-	.string	"/home/typ/src/u-boot_gerrit/u-boot-ddr"
-.LASF28:
-	.string	"name"
-.LASF54:
-	.string	"start"
-.LASF153:
-	.string	"fit_uname_setup"
-.LASF123:
-	.string	"ih_dcrc"
+.LASF67:
+	.string	"bi_memsize"
+.LASF426:
+	.string	"flag"
 .LASF24:
 	.string	"image_base"
-.LASF390:
-	.string	"pre_remove"
-.LASF169:
-	.string	"UCLASS_ROOT"
-.LASF104:
-	.string	"magic"
-.LASF248:
-	.string	"UCLASS_FG"
+.LASF236:
+	.string	"UCLASS_SYSRESET"
+.LASF382:
+	.string	"current"
+.LASF191:
+	.string	"UCLASS_FIRMWARE"
+.LASF437:
+	.string	"min_freq"
+.LASF201:
+	.string	"UCLASS_LPC"
+.LASF197:
+	.string	"UCLASS_IDE"
+.LASF306:
+	.string	"phandle"
+.LASF300:
+	.string	"video_top"
+.LASF396:
+	.string	"per_device_platdata_auto_alloc_size"
+.LASF165:
+	.string	"bootm_headers_t"
+.LASF73:
+	.string	"bi_arm_freq"
+.LASF224:
+	.string	"UCLASS_REMOTEPROC"
+.LASF450:
+	.string	"data_cpu_2_io"
+.LASF325:
+	.string	"recv"
+.LASF135:
+	.string	"type"
 .LASF146:
 	.string	"fit_hdr_rd"
-.LASF149:
-	.string	"fit_hdr_fdt"
-.LASF461:
-	.string	"strcasecmp"
+.LASF276:
+	.string	"env_addr"
+.LASF72:
+	.string	"bi_sramsize"
+.LASF436:
+	.string	"scan_freq"
+.LASF419:
+	.string	"start_adr"
+.LASF288:
+	.string	"uclass_root"
+.LASF190:
+	.string	"UCLASS_GPIO"
+.LASF219:
+	.string	"UCLASS_PWM"
+.LASF432:
+	.string	"test_banks"
+.LASF58:
+	.string	"long double"
+.LASF278:
+	.string	"ram_top"
+.LASF409:
+	.string	"baseaddr"
+.LASF463:
+	.string	"/home/typ/src/u-boot_gerrit/u-boot-ddr"
+.LASF155:
+	.string	"rd_start"
+.LASF220:
+	.string	"UCLASS_POWER_DOMAIN"
+.LASF223:
+	.string	"UCLASS_REGULATOR"
+.LASF317:
+	.string	"save_size"
+.LASF183:
+	.string	"UCLASS_CLK"
+.LASF31:
+	.string	"uclass_platdata"
+.LASF322:
+	.string	"iobase"
 .LASF417:
-	.string	"cmp_buf_data"
-.LASF122:
-	.string	"ih_ep"
-.LASF283:
-	.string	"reloc_off"
-.LASF321:
-	.string	"init"
-.LASF246:
-	.string	"UCLASS_VIDEO_CRTC"
-.LASF243:
-	.string	"UCLASS_VIDEO"
-.LASF214:
-	.string	"UCLASS_PCI_GENERIC"
-.LASF440:
-	.string	"test_times"
-.LASF5:
-	.string	"__u8"
-.LASF376:
-	.string	"of_offset"
+	.string	"random_test"
+.LASF88:
+	.string	"_datarel_start_ofs"
+.LASF265:
+	.string	"pre_serial"
+.LASF128:
+	.string	"ih_name"
+.LASF423:
+	.string	"next_col"
+.LASF124:
+	.string	"ih_os"
+.LASF162:
+	.string	"cmdline_end"
+.LASF342:
+	.string	"net_rx_packet"
 .LASF256:
-	.string	"arch_global_data"
+	.string	"LOGF_MAX_CATEGORIES"
+.LASF289:
+	.string	"fdt_blob"
+.LASF385:
+	.string	"udevice_id"
+.LASF51:
+	.string	"size"
+.LASF10:
+	.string	"long long unsigned int"
+.LASF394:
+	.string	"destroy"
+.LASF116:
+	.string	"image_header"
+.LASF376:
+	.string	"length"
+.LASF20:
+	.string	"__be32"
+.LASF68:
+	.string	"bi_flashstart"
+.LASF145:
+	.string	"fit_noffset_os"
+.LASF205:
+	.string	"UCLASS_MMC"
+.LASF327:
+	.string	"write_hwaddr"
+.LASF462:
+	.string	"cmd/ddr_tool/ddr_test_code.c"
+.LASF255:
+	.string	"UCLASS_INVALID"
+.LASF458:
+	.string	"data_cpu_2_io_init"
 .LASF94:
 	.string	"maxargs"
-.LASF88:
-	.string	"_datarel_start_ofs"
-.LASF25:
-	.string	"_binary_u_boot_bin_start"
-.LASF303:
-	.string	"device_node"
-.LASF261:
-	.string	"tlb_size"
-.LASF66:
-	.string	"bi_memstart"
-.LASF118:
-	.string	"ih_hcrc"
-.LASF443:
-	.string	"scan_freq_loop"
-.LASF82:
-	.string	"bi_arch_number"
-.LASF112:
-	.string	"size_dt_strings"
-.LASF339:
-	.string	"net_rx_packets"
-.LASF63:
-	.string	"memory"
-.LASF27:
-	.string	"driver"
-.LASF156:
-	.string	"rd_end"
-.LASF203:
-	.string	"UCLASS_MASS_STORAGE"
-.LASF316:
+.LASF242:
+	.string	"UCLASS_USB_HUB"
+.LASF402:
+	.string	"DIAGONALSCAN"
+.LASF370:
+	.string	"child_post_remove"
+.LASF93:
+	.string	"cmd_tbl_s"
+.LASF99:
+	.string	"cmd_tbl_t"
+.LASF41:
+	.string	"sibling_node"
+.LASF292:
+	.string	"of_root"
+.LASF446:
+	.string	"memset"
+.LASF57:
+	.string	"flash_info"
+.LASF110:
+	.string	"version"
+.LASF326:
+	.string	"halt"
+.LASF62:
+	.string	"region"
+.LASF114:
+	.string	"size_dt_struct"
+.LASF286:
+	.string	"dm_root"
+.LASF304:
+	.string	"sys_start_tick"
+.LASF308:
+	.string	"properties"
+.LASF207:
+	.string	"UCLASS_MTD"
+.LASF103:
+	.string	"fdt32_t"
+.LASF285:
+	.string	"new_gd"
+.LASF453:
+	.string	"get_print_available_addr"
+.LASF208:
+	.string	"UCLASS_NORTHBRIDGE"
+.LASF78:
+	.string	"bi_enetaddr"
+.LASF460:
+	.string	"malloc"
+.LASF368:
+	.string	"child_post_bind"
+.LASF466:
+	.string	"exit"
+.LASF318:
 	.string	"in_addr"
-.LASF449:
-	.string	"min_freq"
-.LASF430:
-	.string	"pattern"
-.LASF92:
-	.string	"IRQ_STACK_START_IN"
-.LASF160:
-	.string	"initrd_end"
-.LASF135:
-	.string	"type"
-.LASF341:
+.LASF343:
 	.string	"net_rx_packet_len"
-.LASF0:
-	.string	"unsigned char"
-.LASF229:
-	.string	"UCLASS_SCSI"
-.LASF16:
-	.string	"ushort"
-.LASF213:
-	.string	"UCLASS_PCI"
-.LASF348:
-	.string	"net_boot_file_size"
-.LASF391:
-	.string	"destroy"
-.LASF428:
-	.string	"next_adr"
-.LASF274:
-	.string	"have_console"
-.LASF281:
-	.string	"irq_sp"
-.LASF185:
-	.string	"UCLASS_CODEC"
+.LASF323:
+	.string	"init"
+.LASF102:
+	.string	"CMD_RET_USAGE"
+.LASF313:
+	.string	"__dtb_dt_begin"
+.LASF225:
+	.string	"UCLASS_RESET"
+.LASF148:
+	.string	"fit_noffset_rd"
+.LASF424:
+	.string	"err_adr"
+.LASF181:
+	.string	"UCLASS_AHCI"
+.LASF12:
+	.string	"phys_size_t"
+.LASF27:
+	.string	"driver"
+.LASF87:
+	.string	"FIQ_STACK_START"
+.LASF163:
+	.string	"verify"
 .LASF380:
-	.string	"uc_drv"
-.LASF240:
-	.string	"UCLASS_USB"
+	.string	"ofnode"
+.LASF28:
+	.string	"name"
+.LASF429:
+	.string	"test_case"
+.LASF211:
+	.string	"UCLASS_PANEL_BACKLIGHT"
+.LASF238:
+	.string	"UCLASS_TIMER"
+.LASF233:
+	.string	"UCLASS_SPI_FLASH"
+.LASF412:
+	.string	"reread_val"
+.LASF275:
+	.string	"have_console"
+.LASF81:
+	.string	"bi_busfreq"
+.LASF6:
+	.string	"short int"
+.LASF217:
+	.string	"UCLASS_PINCTRL"
+.LASF227:
+	.string	"UCLASS_RAMDISK"
+.LASF422:
+	.string	"pattern"
+.LASF176:
+	.string	"UCLASS_I2C_EMUL"
+.LASF232:
+	.string	"UCLASS_SPMI"
+.LASF96:
+	.string	"usage"
+.LASF365:
+	.string	"remove"
+.LASF173:
+	.string	"UCLASS_TEST_BUS"
+.LASF316:
+	.string	"save_addr"
+.LASF373:
+	.string	"per_child_auto_alloc_size"
+.LASF448:
+	.string	"flush_dcache_range"
+.LASF401:
+	.string	"CROSSTALK"
 .LASF298:
-	.string	"cur_serial_dev"
+	.string	"malloc_ptr"
+.LASF160:
+	.string	"initrd_end"
+.LASF390:
+	.string	"pre_unbind"
 .LASF267:
-	.string	"addr"
-.LASF46:
-	.string	"list_head"
-.LASF164:
-	.string	"state"
-.LASF20:
-	.string	"__be32"
-.LASF216:
-	.string	"UCLASS_PINCONFIG"
-.LASF241:
-	.string	"UCLASS_USB_DEV_GENERIC"
-.LASF342:
-	.string	"net_bcast_ethaddr"
-.LASF145:
-	.string	"fit_noffset_os"
-.LASF231:
-	.string	"UCLASS_SPI"
-.LASF422:
-	.string	"reread_val"
-.LASF468:
-	.ascii	"GNU C11 6.3.1 20170404 -ms"
-	.string	"trict-align -march=armv8-a+nosimd -mlittle-endian -mabi=lp64 -g -Os -fno-builtin -ffreestanding -fshort-wchar -fno-stack-protector -fno-delete-null-pointer-checks -fstack-usage -fno-pic -ffunction-sections -fdata-sections -ffixed-r9 -fno-common -ffixed-x18"
-.LASF419:
-	.string	"baseaddr"
+	.string	"baudrate"
+.LASF90:
+	.string	"_datarellocal_start_ofs"
+.LASF40:
+	.string	"child_head"
+.LASF257:
+	.string	"arch_global_data"
+.LASF254:
+	.string	"UCLASS_COUNT"
+.LASF272:
+	.string	"pci_clk"
+.LASF49:
+	.string	"block_drvr"
+.LASF451:
+	.string	"memcpy"
+.LASF53:
+	.string	"flash_id"
+.LASF305:
+	.string	"device_node"
+.LASF280:
+	.string	"ram_size"
+.LASF154:
+	.string	"fit_noffset_setup"
+.LASF115:
+	.string	"working_fdt"
 .LASF335:
-	.string	"net_server_ethaddr"
-.LASF439:
-	.string	"err_case"
-.LASF252:
-	.string	"UCLASS_DVFS"
-.LASF425:
-	.string	"random_test1"
-.LASF318:
-	.string	"eth_device"
-.LASF323:
-	.string	"recv"
-.LASF50:
-	.string	"select_hwpart"
-.LASF4:
-	.string	"uchar"
-.LASF69:
-	.string	"bi_flashsize"
-.LASF381:
-	.string	"dev_head"
-.LASF2:
-	.string	"short unsigned int"
-.LASF389:
+	.string	"net_root_path"
+.LASF188:
+	.string	"UCLASS_DMA"
+.LASF85:
+	.string	"bd_t"
+.LASF319:
+	.string	"s_addr"
+.LASF392:
 	.string	"post_probe"
+.LASF344:
+	.string	"net_bcast_ethaddr"
+.LASF83:
+	.string	"bi_boot_params"
+.LASF19:
+	.string	"uint32_t"
+.LASF361:
+	.string	"mem_malloc_brk"
+.LASF330:
+	.string	"net_gateway"
+.LASF372:
+	.string	"platdata_auto_alloc_size"
+.LASF452:
+	.string	"cmp_buf_data"
+.LASF66:
+	.string	"bi_memstart"
+.LASF245:
+	.string	"UCLASS_VIDEO_CONSOLE"
+.LASF329:
+	.string	"eth_current"
+.LASF408:
+	.string	"_u_boot_list_2_cmd_2_ddr_test"
 .LASF367:
-	.string	"child_pre_probe"
-.LASF74:
-	.string	"bi_dsp_freq"
-.LASF411:
-	.string	"wr_val"
-.LASF459:
-	.string	"memcpy"
-.LASF347:
-	.string	"net_boot_file_name"
-.LASF254:
-	.string	"UCLASS_INVALID"
-.LASF379:
-	.string	"current"
-.LASF457:
-	.string	"__func__"
+	.string	"ofdata_to_platdata"
 .LASF64:
 	.string	"reserved"
-.LASF192:
-	.string	"UCLASS_I2C"
-.LASF128:
-	.string	"ih_name"
-.LASF277:
-	.string	"ram_top"
-.LASF180:
-	.string	"UCLASS_ADC"
-.LASF43:
-	.string	"req_seq"
-.LASF279:
-	.string	"ram_size"
-.LASF423:
-	.string	"err_addr"
-.LASF446:
-	.string	"set_ddr_freq"
-.LASF196:
-	.string	"UCLASS_I2S"
-.LASF369:
-	.string	"priv_auto_alloc_size"
-.LASF30:
-	.string	"parent_platdata"
-.LASF163:
-	.string	"verify"
-.LASF87:
-	.string	"FIQ_STACK_START"
-.LASF451:
-	.string	"times"
-.LASF464:
-	.string	"regulator_get_by_platname"
+.LASF398:
+	.string	"CHANGEFREQ"
+.LASF421:
+	.string	"page_size"
+.LASF403:
+	.string	"FASTTEST"
 .LASF84:
 	.string	"bi_dram"
-.LASF134:
-	.string	"comp"
-.LASF345:
-	.string	"net_native_vlan"
-.LASF429:
-	.string	"page_size"
-.LASF220:
-	.string	"UCLASS_POWER_DOMAIN"
-.LASF269:
-	.string	"cpu_clk"
-.LASF406:
-	.string	"_u_boot_list_2_cmd_2_ddr_test"
-.LASF244:
-	.string	"UCLASS_VIDEO_BRIDGE"
-.LASF370:
-	.string	"platdata_auto_alloc_size"
-.LASF124:
-	.string	"ih_os"
-.LASF61:
-	.string	"lmb_region"
-.LASF249:
-	.string	"UCLASS_KEY"
+.LASF2:
+	.string	"short unsigned int"
+.LASF105:
+	.string	"magic"
+.LASF152:
+	.string	"fit_hdr_setup"
+.LASF141:
+	.string	"legacy_hdr_valid"
+.LASF399:
+	.string	"SCANFREQ"
+.LASF60:
+	.string	"base"
+.LASF430:
+	.string	"err_case"
+.LASF228:
+	.string	"UCLASS_RTC"
+.LASF258:
+	.string	"timer_rate_hz"
+.LASF52:
+	.string	"sector_count"
+.LASF127:
+	.string	"ih_comp"
+.LASF389:
+	.string	"post_bind"
+.LASF366:
+	.string	"unbind"
+.LASF157:
+	.string	"ft_addr"
+.LASF4:
+	.string	"uchar"
+.LASF158:
+	.string	"ft_len"
+.LASF47:
+	.string	"next"
+.LASF387:
+	.string	"data"
+.LASF100:
+	.string	"CMD_RET_SUCCESS"
+.LASF153:
+	.string	"fit_uname_setup"
+.LASF48:
+	.string	"prev"
+.LASF212:
+	.string	"UCLASS_PCH"
+.LASF213:
+	.string	"UCLASS_PCI"
+.LASF331:
+	.string	"net_netmask"
+.LASF33:
+	.string	"driver_data"
+.LASF86:
+	.string	"IRQ_STACK_START"
+.LASF180:
+	.string	"UCLASS_ADC"
+.LASF175:
+	.string	"UCLASS_SPI_EMUL"
+.LASF262:
+	.string	"tlb_size"
+.LASF150:
+	.string	"fit_uname_fdt"
 	.hidden	malloc
 	.ident	"GCC: (Linaro GCC 6.3-2017.05) 6.3.1 20170404"
 	.section	.note.GNU-stack,"",@progbits
diff --git a/cmd/ddr_tool/ddr_test_rk3328.S b/cmd/ddr_tool/ddr_test_rk3328.S
index 985d7be5cb..a6c7352e3a 100644
--- a/cmd/ddr_tool/ddr_test_rk3328.S
+++ b/cmd/ddr_tool/ddr_test_rk3328.S
@@ -1,324 +1,388 @@
+/* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
+/*
+ * Copyright (C) 2019 Rockchip Electronics Co., Ltd.
+ */
+
 	.arch armv8-a+nosimd
 	.file	"ddr_test_code.c"
 	.text
 .Ltext0:
 	.cfi_sections	.debug_frame
-	.section	.text.set_ddr_freq,"ax",@progbits
+	.section	.text.crosstalk,"ax",@progbits
 	.align	2
-	.type	set_ddr_freq, %function
-set_ddr_freq:
-.LFB256:
-	.file 1 "cmd/ddr_tool/ddr_tool.c"
-	.loc 1 147 0
+	.global	crosstalk
+	.type	crosstalk, %function
+crosstalk:
+.LFB200:
+	.file 1 "cmd/ddr_tool/crosstalk.c"
+	.loc 1 46 0
 	.cfi_startproc
 .LVL0:
-	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 1 149 0
-	mov	x1, 16959
-	movk	x1, 0xf, lsl 16
-	cmp	x0, x1
-	.loc 1 147 0
+	stp	x29, x30, [sp, -144]!
+	.cfi_def_cfa_offset 144
+	.cfi_offset 29, -144
+	.cfi_offset 30, -136
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	str	x19, [sp, 16]
-	.cfi_offset 19, -16
-	.loc 1 149 0
-	bhi	.L2
-	.loc 1 150 0
-	add	x1, x1, 1
-	mul	x0, x0, x1
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -112
+	.cfi_offset 22, -104
+	.loc 1 66 0
+	adrp	x22, .LC2
+	.loc 1 46 0
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -96
+	.cfi_offset 24, -88
+	mov	x23, x0
+	stp	x19, x20, [sp, 16]
+	mov	x24, x1
+	stp	x25, x26, [sp, 64]
+	.loc 1 63 0
+	adrp	x0, .LC1
 .LVL1:
-	.loc 1 151 0
-	cbz	x0, .L3
-.L2:
-	.loc 1 152 0
-	bl	rockchip_ddrclk_sip_round_rate_v2
+	.loc 1 46 0
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 19, -128
+	.cfi_offset 20, -120
+	.cfi_offset 25, -80
+	.cfi_offset 26, -72
+	.cfi_offset 27, -64
+	.cfi_offset 28, -56
+	.loc 1 63 0
+	add	x0, x0, :lo12:.LC1
+	bl	printf
 .LVL2:
-	.loc 1 153 0
-	bl	rockchip_ddrclk_sip_set_rate_v2
+	.loc 1 71 0
+	add	x21, x29, 112
+	.loc 1 66 0
+	add	x0, x22, :lo12:.LC2
+	.loc 1 68 0
+	adrp	x25, .LC3
+	.loc 1 66 0
+	str	x0, [x29, 104]
+	.loc 1 64 0
+	mov	w20, 0
+	.loc 1 68 0
+	add	x0, x25, :lo12:.LC3
+	str	x0, [x29, 96]
 .LVL3:
-.L3:
-	.loc 1 155 0
-	bl	rockchip_ddrclk_sip_recalc_rate_v2
+.L6:
+	.loc 1 66 0
+	ldr	x0, [x29, 104]
+	.loc 1 71 0
+	mov	w26, 1
+	.loc 1 66 0
+	mov	w1, w20
+	.loc 1 71 0
+	lsl	w26, w26, w20
+	.loc 1 65 0
+	mov	w28, -1
+	.loc 1 67 0
+	mov	w27, 0
+	.loc 1 66 0
+	bl	printf
 .LVL4:
-	mov	x19, x0
+.L5:
+	.loc 1 68 0
+	ldr	x0, [x29, 96]
+	mov	w1, w27
+	.loc 1 69 0
+	mvn	w28, w28
 .LVL5:
-	.loc 1 156 0
-	mov	x1, x0
-	adrp	x0, .LC1
-.LVL6:
-	add	x0, x0, :lo12:.LC1
+	mov	x19, 0
+	.loc 1 68 0
 	bl	printf
+.LVL6:
+.L2:
+	.loc 1 71 0 discriminator 3
+	eor	w0, w26, w28
+	str	w0, [x19, x21]
+	add	x19, x19, 4
+	.loc 1 72 0 discriminator 3
+	mvn	w28, w28
 .LVL7:
-	.loc 1 162 0
-	mov	w0, w19
-	ldr	x19, [sp, 16]
+	.loc 1 70 0 discriminator 3
+	cmp	x19, 32
+	bne	.L2
+	.loc 1 74 0
+	mov	w1, w19
+	mov	x0, x21
+	bl	data_cpu_2_io
 .LVL8:
-	ldp	x29, x30, [sp], 32
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_def_cfa 31, 0
-	ret
-	.cfi_endproc
-.LFE256:
-	.size	set_ddr_freq, .-set_ddr_freq
-	.section	.text.set_vdd_logic,"ax",@progbits
-	.align	2
-	.type	set_vdd_logic, %function
-set_vdd_logic:
-.LFB257:
-	.loc 1 165 0
-	.cfi_startproc
+	.loc 1 75 0
+	mov	x3, x24
+	mov	x2, x23
+	mov	w1, w19
+	mov	x0, x21
+	bl	write_buf_to_ddr
 .LVL9:
-	stp	x29, x30, [sp, -48]!
-	.cfi_def_cfa_offset 48
-	.cfi_offset 29, -48
-	.cfi_offset 30, -40
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
-	.loc 1 169 0
-	add	x1, x29, 40
-	.loc 1 165 0
-	mov	w20, w0
-	.loc 1 169 0
-	adrp	x0, .LC2
+	.loc 1 76 0
+	mov	w4, 1
+	mov	x3, x24
+	mov	x2, x23
+	mov	w1, w19
+	mov	x0, x21
+	bl	cmp_buf_data
 .LVL10:
-	add	x0, x0, :lo12:.LC2
-	bl	regulator_get_by_platname
+	cbz	x0, .L3
 .LVL11:
-	.loc 1 170 0
-	cbz	w0, .L9
-	mov	w19, w0
-	.loc 1 171 0
-	adrp	x0, .LC3
-.LVL12:
-	add	x0, x0, :lo12:.LC3
-.LVL13:
-.L15:
-	.loc 1 179 0
-	bl	printf
-.LVL14:
-.L8:
-	.loc 1 181 0
-	mov	w0, w19
+.L11:
+	.loc 1 78 0
+	mov	w0, -1
+.L1:
+	.loc 1 111 0
 	ldp	x19, x20, [sp, 16]
-.LVL15:
-	ldp	x29, x30, [sp], 48
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+.LVL12:
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 144
 	.cfi_remember_state
 	.cfi_restore 30
 	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
 	.cfi_restore 19
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL16:
-.L9:
+.LVL13:
+.L3:
 	.cfi_restore_state
-	.loc 1 176 0
-	ldr	x0, [x29, 40]
+	.loc 1 67 0 discriminator 2
+	add	w27, w27, 1
+.LVL14:
+	cmp	w27, 2
+	bne	.L5
+	.loc 1 64 0 discriminator 2
+	add	w20, w20, 1
+.LVL15:
+	cmp	w20, 32
+	bne	.L6
+	.loc 1 85 0
+	adrp	x0, .LC4
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+.LVL16:
+	.loc 1 86 0
+	mov	x0, 128
+	bl	malloc
 .LVL17:
-	mov	w1, w20
-	bl	regulator_set_value
+	mov	x21, x0
 .LVL18:
-	mov	w19, w0
+	.loc 1 87 0
+	cbnz	x0, .L7
+	.loc 1 88 0
+	adrp	x0, .LC5
 .LVL19:
-	.loc 1 177 0
-	mov	x0, 100
+	mov	x1, 128
+	add	x0, x0, :lo12:.LC5
+	bl	printf
 .LVL20:
-	bl	udelay
+.L7:
+	adrp	x26, .LANCHOR0
+	.loc 1 91 0
+	add	x27, x22, :lo12:.LC2
 .LVL21:
-	.loc 1 178 0
-	cbz	w19, .L8
-	.loc 1 179 0
-	adrp	x0, .LC4
-	add	x0, x0, :lo12:.LC4
-	b	.L15
+	.loc 1 93 0
+	add	x25, x25, :lo12:.LC3
+	.loc 1 98 0
+	add	x26, x26, :lo12:.LANCHOR0
+	.loc 1 69 0
+	mov	w20, 0
+.LVL22:
+.L14:
+	.loc 1 92 0
+	mov	w22, 0
+	.loc 1 96 0
+	mov	w28, 1
+	.loc 1 91 0
+	mov	w1, w20
+	mov	x0, x27
+	bl	printf
+.LVL23:
+.L13:
+	.loc 1 93 0
+	mov	w1, w22
+	mov	x0, x25
+	bl	printf
+.LVL24:
+	.loc 1 96 0
+	mov	x19, 0
+	lsl	w1, w28, w22
+.LVL25:
+.L10:
+	ldr	w0, [x19, x26]
+	.loc 1 95 0
+	cbz	w20, .L8
+	.loc 1 96 0
+	eor	w0, w0, w1
+.L8:
+	.loc 1 98 0
+	str	w0, [x21, x19]
+	add	x19, x19, 4
+	.loc 1 94 0
+	cmp	x19, 128
+	bne	.L10
+	.loc 1 100 0
+	mov	w1, w19
+	mov	x0, x21
+	bl	data_cpu_2_io
+.LVL26:
+	.loc 1 101 0
+	mov	x3, x24
+	mov	x2, x23
+	mov	w1, w19
+	mov	x0, x21
+	bl	write_buf_to_ddr
+.LVL27:
+	.loc 1 103 0
+	mov	w4, 1
+	mov	x3, x24
+	mov	x2, x23
+	mov	w1, w19
+	mov	x0, x21
+	bl	cmp_buf_data
+.LVL28:
+	cbnz	x0, .L11
+	.loc 1 106 0
+	cbz	w20, .L12
+	.loc 1 92 0 discriminator 2
+	add	w22, w22, 1
+.LVL29:
+	cmp	w22, 32
+	bne	.L13
+.L12:
+	.loc 1 90 0 discriminator 2
+	add	w20, w20, 1
+.LVL30:
+	cmp	w20, 2
+	bne	.L14
+	.loc 1 110 0
+	mov	w0, 0
+	b	.L1
+	.cfi_endproc
+.LFE200:
+	.size	crosstalk, .-crosstalk
+	.section	.text.set_ddr_freq,"ax",@progbits
+	.align	2
+	.weak	set_ddr_freq
+	.type	set_ddr_freq, %function
+set_ddr_freq:
+.LFB253:
+	.file 2 "cmd/ddr_tool/ddr_tool.c"
+	.loc 2 45 0
+	.cfi_startproc
+.LVL31:
+	.loc 2 47 0
+	mov	w0, 0
+.LVL32:
+	ret
+	.cfi_endproc
+.LFE253:
+	.size	set_ddr_freq, .-set_ddr_freq
+	.section	.text.set_vdd_logic,"ax",@progbits
+	.align	2
+	.weak	set_vdd_logic
+	.type	set_vdd_logic, %function
+set_vdd_logic:
+.LFB254:
+	.loc 2 50 0
+	.cfi_startproc
+.LVL33:
+	.loc 2 52 0
+	mov	w0, -1
+.LVL34:
+	ret
 	.cfi_endproc
-.LFE257:
+.LFE254:
 	.size	set_vdd_logic, .-set_vdd_logic
-	.section	.text.random_test,"ax",@progbits
+	.section	.text.diagonalscan,"ax",@progbits
 	.align	2
-	.global	random_test
-	.type	random_test, %function
-random_test:
-.LFB274:
-	.file 2 "cmd/ddr_tool/random_test.c"
-	.loc 2 88 0
+	.global	diagonalscan
+	.type	diagonalscan, %function
+diagonalscan:
+.LFB268:
+	.file 3 "cmd/ddr_tool/diagonalscan.c"
+	.loc 3 16 0
 	.cfi_startproc
-.LVL22:
+.LVL35:
 	stp	x29, x30, [sp, -112]!
 	.cfi_def_cfa_offset 112
 	.cfi_offset 29, -112
 	.cfi_offset 30, -104
-.LBB12:
-.LBB13:
-	.loc 2 18 0
-	mov	x2, x1
-.LBE13:
-.LBE12:
-	.loc 2 88 0
+	.loc 3 19 0
+	mov	x2, 32
+	.loc 3 16 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -80
 	.cfi_offset 22, -72
-	mov	x22, x0
-.LVL23:
+	mov	x22, x1
 	stp	x23, x24, [sp, 48]
-.LBB18:
-.LBB14:
-	.loc 2 37 0
-	adrp	x21, .LC6
-.LBE14:
-.LBE18:
-	.loc 2 88 0
-	stp	x27, x28, [sp, 80]
 	.cfi_offset 23, -64
 	.cfi_offset 24, -56
-	.cfi_offset 27, -32
-	.cfi_offset 28, -24
-	mov	x23, x1
-.LVL24:
+	sub	x23, x1, #32
+	.loc 3 19 0
+	adrp	x1, .LANCHOR1
+.LVL36:
+	add	x1, x1, :lo12:.LANCHOR1
+	.loc 3 16 0
 	stp	x19, x20, [sp, 16]
-.LBB19:
-.LBB15:
-	.loc 2 18 0
-	mov	w1, -2139062144
-.LVL25:
-.LBE15:
-.LBE19:
-	.loc 2 88 0
 	stp	x25, x26, [sp, 64]
 	.cfi_offset 19, -96
 	.cfi_offset 20, -88
 	.cfi_offset 25, -48
 	.cfi_offset 26, -40
-.LBB20:
-.LBB16:
-	.loc 2 23 0
-	adrp	x24, .LC5
-	.loc 2 18 0
-	bl	memset
-.LVL26:
-	.loc 2 23 0
-	add	x24, x24, :lo12:.LC5
-	.loc 2 37 0
-	add	x21, x21, :lo12:.LC6
-	.loc 2 24 0
-	lsr	x0, x23, 2
-	.loc 2 14 0
-	mov	w27, 0
-	.loc 2 20 0
-	mov	w25, 1077952576
-	.loc 2 19 0
-	mov	w20, -2139062144
-	.loc 2 22 0
-	mov	w28, 0
-	.loc 2 24 0
-	str	x0, [x29, 96]
-.LVL27:
-.L22:
-	.loc 2 23 0
-	mov	w1, w28
-	mov	x0, x24
-	bl	printf
-.LVL28:
-	.loc 2 24 0
-	mov	w1, 0
-.LVL29:
-.L17:
-	ldr	x2, [x29, 96]
-	uxtw	x0, w1
-	cmp	x0, x2
-	bcc	.L21
-.LVL30:
-.L20:
-	.loc 2 37 0
-	mov	x0, x21
-	.loc 2 22 0
-	add	w28, w28, 1
-.LVL31:
-	.loc 2 37 0
+	.loc 3 16 0
+	mov	x25, x0
+	.loc 3 19 0
+	add	x0, x29, 80
+.LVL37:
+	bl	memcpy
+.LVL38:
+	.loc 3 24 0
+	adrp	x0, .LC6
+	add	x0, x0, :lo12:.LC6
 	bl	printf
-.LVL32:
-	.loc 2 35 0
-	lsr	w25, w25, 1
-.LVL33:
-	.loc 2 36 0
-	lsr	w20, w20, 1
-.LVL34:
-	.loc 2 22 0
-	cmp	w28, 8
-	bne	.L22
-	mov	x19, -1
-	b	.L19
-.LVL35:
-.L21:
-	.loc 2 25 0
-	lsl	x0, x0, 2
-	add	x19, x22, x0
-	ldr	w2, [x22, x0]
-	str	w2, [x29, 108]
-	.loc 2 26 0
-	uxtw	x2, w2
-	cmp	w2, w20
-	beq	.L18
-.LVL36:
-	.loc 2 28 0
-	ldr	w27, [x19]
-	.loc 2 33 0
-	cmn	x19, #1
-	beq	.L20
-.LVL37:
-.L19:
-	.loc 2 39 0
+.LVL39:
+	.loc 3 25 0
+	bl	get_page_size
+.LVL40:
+	sxtw	x19, w0
+.LVL41:
+	.loc 3 27 0
+	tbz	w19, #31, .L28
+	.loc 3 28 0
+	mov	w1, w19
 	adrp	x0, .LC7
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.LVL38:
-	.loc 2 40 0
-	cmn	x19, #1
-	beq	.L23
-	.loc 2 41 0
-	ldr	w2, [x29, 108]
-	adrp	x0, .LC8
-	mov	w4, w20
-	mov	w3, w27
-	mov	x1, x19
-	add	x0, x0, :lo12:.LC8
-	bl	printf
-.LVL39:
-.L36:
-.LBE16:
-.LBE20:
-.LBB21:
-.LBB22:
-	.loc 2 82 0
+.LVL42:
+	.loc 3 29 0
 	mov	w0, -1
-.L16:
-.LBE22:
-.LBE21:
-	.loc 2 96 0
+.L31:
+.LVL43:
+.L27:
+	.loc 3 64 0
 	ldp	x19, x20, [sp, 16]
+.LVL44:
 	ldp	x21, x22, [sp, 32]
-.LVL40:
 	ldp	x23, x24, [sp, 48]
-.LVL41:
 	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
+.LVL45:
 	ldp	x29, x30, [sp], 112
 	.cfi_remember_state
 	.cfi_restore 30
 	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
 	.cfi_restore 25
 	.cfi_restore 26
 	.cfi_restore 23
@@ -329,295 +393,276 @@ random_test:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL42:
-.L18:
-	.cfi_restore_state
-.LBB24:
-.LBB17:
-	.loc 2 31 0
-	str	w25, [x22, x0]
-	.loc 2 24 0
-	add	w1, w1, 1
-.LVL43:
-	b	.L17
-.LVL44:
-.L23:
-.LBE17:
-.LBE24:
-.LBB25:
-.LBB23:
-	.loc 2 58 0
-	adrp	x25, .LC9
-.LVL45:
-	.loc 2 76 0
-	adrp	x24, .LC10
-	.loc 2 66 0
-	lsr	x28, x23, 3
 .LVL46:
-	.loc 2 58 0
-	add	x25, x25, :lo12:.LC9
-	.loc 2 76 0
-	add	x24, x24, :lo12:.LC10
-	.loc 2 66 0
-	mov	x27, 0
-	mov	x19, 0
+.L28:
+	.cfi_restore_state
+	.loc 3 40 0
+	lsr	x22, x22, 1
 .LVL47:
-.L30:
-	.loc 2 58 0
-	mov	x1, x19
-	mov	x0, x25
-	bl	printf
+	add	x23, x25, x23
 .LVL48:
-	.loc 2 60 0
-	lsl	x20, x19, 8
-	lsl	x0, x19, 24
-	orr	x20, x20, x19, lsl 16
-	orr	x0, x0, x19, lsl 32
-	.loc 2 64 0
-	mov	x2, x23
-	.loc 2 60 0
-	orr	x20, x20, x0
-	lsl	x0, x19, 40
-	orr	x0, x0, x19, lsl 48
-	orr	x20, x20, x0
-	orr	x0, x19, x19, lsl 56
-	orr	x20, x20, x0
+	mov	w21, 0
+	mov	x20, 0
+	.loc 3 37 0
+	mov	w1, 32
+	add	x0, x29, 80
+	bl	data_cpu_2_io
 .LVL49:
-	.loc 2 64 0
-	mov	x0, x22
-	mov	w1, w20
-	bl	memset
+	.loc 3 39 0
+	mov	x2, 32
+	add	x1, x29, 80
+	mov	x0, x25
+	bl	memcpy
 .LVL50:
-	.loc 2 66 0
+.L30:
+	.loc 3 40 0 discriminator 1
+	cmp	x20, x22
+	bcc	.L34
 	mov	x0, 0
 .LVL51:
-.L25:
-	cmp	x0, x28
-	bne	.L29
+	.loc 3 63 0
+	b	.L27
 .LVL52:
-.L28:
-	.loc 2 76 0
-	mov	x0, x24
+.L34:
+	.loc 3 41 0
+	uxtw	x24, w21
+	mov	x2, 32
+	sub	x26, x23, x24
+	add	x1, x29, 80
+	mov	x0, x26
+	bl	memcpy
 .LVL53:
-	.loc 2 57 0
-	add	x19, x19, 1
+	.loc 3 44 0
+	add	x2, x20, x25
+	.loc 3 43 0
+	mov	x3, 32
+	mov	w4, 1
+	add	x2, x2, x24
+	mov	w1, w3
+	add	x0, x29, 80
+	bl	cmp_buf_data
 .LVL54:
-	.loc 2 76 0
-	bl	printf
+	.loc 3 45 0
+	cbnz	x0, .L27
+	.loc 3 48 0
+	add	x24, x24, 40
+	add	x20, x20, x19
 .LVL55:
-	.loc 2 57 0
-	cmp	x19, 256
-	bne	.L30
-	mov	x21, -1
-	b	.L27
+	cmp	x19, x24
+	add	w21, w21, 8
 .LVL56:
-.L29:
-	lsl	x1, x0, 3
-	add	x21, x1, x22
-	.loc 2 67 0
-	ldr	x26, [x1, x22]
+	csel	w21, w21, wzr, cs
 .LVL57:
-	.loc 2 68 0
-	cmp	x20, x26
-	beq	.L26
+	.loc 3 50 0
+	cmp	x22, x20
+	bls	.L33
+	.loc 3 51 0
+	add	x0, x25, x20
 .LVL58:
-	.loc 2 70 0
-	ldr	x27, [x21]
+	mov	x2, 32
+	add	x1, x29, 80
+	add	x0, x0, x21, uxtw
+	bl	memcpy
 .LVL59:
-	.loc 2 74 0
-	cmn	x21, #1
-	beq	.L28
-.LVL60:
-.L27:
-	.loc 2 78 0
-	adrp	x0, .LC11
-	add	x0, x0, :lo12:.LC11
-	bl	printf
-.LVL61:
-	.loc 2 84 0
-	mov	w0, 0
-	.loc 2 79 0
-	cmn	x21, #1
-	beq	.L16
-	.loc 2 80 0
-	mov	x4, x20
-	mov	x3, x27
+.L33:
+	.loc 3 53 0
+	mov	x3, 32
+	mov	w4, 1
 	mov	x2, x26
-	mov	x1, x21
-	adrp	x0, .LC12
-	add	x0, x0, :lo12:.LC12
-	bl	printf
-.LVL62:
-	b	.L36
-.LVL63:
-.L26:
-	.loc 2 66 0
-	add	x0, x0, 1
-.LVL64:
-	b	.L25
-.LBE23:
-.LBE25:
+	mov	w1, w3
+	add	x0, x29, 80
+	sub	x23, x23, x19
+	bl	cmp_buf_data
+.LVL60:
+	.loc 3 56 0
+	cbz	x0, .L30
+	b	.L27
 	.cfi_endproc
-.LFE274:
-	.size	random_test, .-random_test
-	.section	.text.scan_freq,"ax",@progbits
+.LFE268:
+	.size	diagonalscan, .-diagonalscan
+	.section	.text.random_test,"ax",@progbits
 	.align	2
-	.type	scan_freq, %function
-scan_freq:
-.LFB255:
-	.loc 1 104 0
+	.global	random_test
+	.type	random_test, %function
+random_test:
+.LFB271:
+	.file 4 "cmd/ddr_tool/random_test.c"
+	.loc 4 97 0
 	.cfi_startproc
-.LVL65:
-	stp	x29, x30, [sp, -96]!
-	.cfi_def_cfa_offset 96
-	.cfi_offset 29, -96
-	.cfi_offset 30, -88
+.LVL61:
+	stp	x29, x30, [sp, -112]!
+	.cfi_def_cfa_offset 112
+	.cfi_offset 29, -112
+	.cfi_offset 30, -104
+.LBB6:
+.LBB7:
+	.loc 4 19 0
+	mov	x2, x1
+.LBE7:
+.LBE6:
+	.loc 4 97 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -80
-	.cfi_offset 20, -72
-	mov	w20, w0
-	stp	x23, x24, [sp, 48]
-	.loc 1 111 0
-	mov	w0, 16960
-.LVL66:
-	.loc 1 104 0
+	.cfi_offset 19, -96
+	.cfi_offset 20, -88
+	mov	x20, x1
 	stp	x21, x22, [sp, 32]
-	.loc 1 111 0
-	movk	w0, 0xf, lsl 16
-	.loc 1 104 0
+	mov	x19, x0
+.LVL62:
+	stp	x23, x24, [sp, 48]
+.LBB12:
+.LBB8:
+	.loc 4 19 0
+	mov	w1, -2139062144
+.LVL63:
+.LBE8:
+.LBE12:
+	.loc 4 97 0
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 21, -80
+	.cfi_offset 22, -72
+	.cfi_offset 23, -64
+	.cfi_offset 24, -56
+	.cfi_offset 27, -32
+	.cfi_offset 28, -24
+.LBB13:
+.LBB9:
+	.loc 4 24 0
+	adrp	x24, .LC8
+.LBE9:
+.LBE13:
+	.loc 4 97 0
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 23, -48
-	.cfi_offset 24, -40
-	.cfi_offset 21, -64
-	.cfi_offset 22, -56
-	.cfi_offset 25, -32
-	.cfi_offset 26, -24
-	mov	x24, x2
-	str	x27, [sp, 80]
-	.cfi_offset 27, -16
-	.loc 1 111 0
-	cmp	w20, w0
-	bls	.L38
-	.loc 1 112 0
-	udiv	w20, w20, w0
+	.cfi_offset 25, -48
+	.cfi_offset 26, -40
+.LBB14:
+.LBB10:
+	.loc 4 19 0
+	bl	memset
+.LVL64:
+	.loc 4 25 0
+	lsr	x0, x20, 2
+	.loc 4 24 0
+	add	x24, x24, :lo12:.LC8
+	.loc 4 25 0
+	str	x0, [x29, 104]
+	.loc 4 15 0
+	mov	w27, 0
+	.loc 4 41 0
+	adrp	x0, .LC9
+	.loc 4 21 0
+	mov	w23, 1077952576
+	.loc 4 41 0
+	add	x0, x0, :lo12:.LC9
+	.loc 4 20 0
+	mov	w21, -2139062144
+	.loc 4 23 0
+	mov	w22, 0
+	.loc 4 41 0
+	str	x0, [x29, 96]
+.LVL65:
+.L43:
+	.loc 4 24 0
+	mov	w1, w22
+	mov	x0, x24
+	bl	printf
+.LVL66:
+	.loc 4 25 0
+	mov	w1, 0
 .LVL67:
 .L38:
-	.loc 1 113 0
-	cmp	w1, w0
-	bls	.L39
-	.loc 1 114 0
-	udiv	w1, w1, w0
+	ldr	x2, [x29, 104]
+	uxtw	x0, w1
+	cmp	x0, x2
+	bcc	.L42
 .LVL68:
-.L39:
-	.loc 1 116 0
-	cmp	w20, w1
-	bls	.L40
-	mov	w0, w20
-	mov	w20, w1
+.L41:
+	.loc 4 41 0
+	ldr	x0, [x29, 96]
+	.loc 4 23 0
+	add	w22, w22, 1
 .LVL69:
-	mov	w1, w0
+	.loc 4 39 0
+	lsr	w23, w23, 1
 .LVL70:
-.L40:
-	.loc 1 125 0
-	mov	w25, 16960
-	.loc 1 126 0
-	adrp	x22, .LC13
-	.loc 1 129 0
-	adrp	x23, .LC14
-	.loc 1 121 0
-	sub	w19, w1, w20
+	.loc 4 40 0
+	lsr	w21, w21, 1
 .LVL71:
-	.loc 1 126 0
-	add	x22, x22, :lo12:.LC13
-	.loc 1 129 0
-	add	x23, x23, :lo12:.LC14
-	.loc 1 123 0
-	mov	w21, 0
-	.loc 1 125 0
-	movk	w25, 0xf, lsl 16
+	.loc 4 41 0
+	bl	printf
 .LVL72:
-.L41:
-	.loc 1 123 0 discriminator 1
-	cmp	x24, x21, uxtw
-	bhi	.L45
-	.loc 1 123 0 is_stmt 0 discriminator 3
-	cbnz	x24, .L46
-.L45:
-	.loc 1 124 0 is_stmt 1
-	bl	rand
+	.loc 4 23 0
+	cmp	w22, 8
+	bne	.L43
+	mov	x28, -1
+	b	.L40
 .LVL73:
-	udiv	w1, w0, w19
-	msub	w0, w1, w19, w0
+.L42:
+	.loc 4 26 0
+	lsl	x0, x0, 2
+	add	x5, x19, x0
+	ldr	w26, [x19, x0]
+	.loc 4 27 0
+	cmp	w26, w21
+	beq	.L39
+	.loc 4 28 0
+	mov	x28, x5
 .LVL74:
-	add	w0, w0, w20
-	.loc 1 125 0
-	mul	w0, w0, w25
-	and	x0, x0, 4294967232
-	bl	rockchip_ddrclk_sip_round_rate_v2
+	.loc 4 29 0
+	add	x1, x5, 4
 .LVL75:
-	.loc 1 126 0
-	mov	w1, w21
-	mov	w2, w0
-	.loc 1 125 0
-	mov	x26, x0
+	mov	x0, x5
+	bl	flush_dcache_range
 .LVL76:
-	.loc 1 126 0
-	mov	x0, x22
+	.loc 4 37 0
+	cmn	x28, #1
+	.loc 4 32 0
+	ldr	w27, [x28]
+	.loc 4 37 0
+	beq	.L41
 .LVL77:
+.L40:
+	.loc 4 43 0
+	adrp	x0, .LC10
+	add	x0, x0, :lo12:.LC10
 	bl	printf
 .LVL78:
-	.loc 1 127 0
-	uxtw	x0, w26
-	bl	rockchip_ddrclk_sip_set_rate_v2
-.LVL79:
-	.loc 1 128 0
-	bl	rockchip_ddrclk_sip_recalc_rate_v2
-.LVL80:
-	.loc 1 129 0
-	mov	w1, w0
-	.loc 1 128 0
-	mov	x27, x0
-.LVL81:
-	.loc 1 129 0
-	mov	x0, x23
-.LVL82:
-	bl	printf
-.LVL83:
-	.loc 1 132 0
-	ldr	x0, [x18]
-	mov	x1, 1048576
-	ldr	x0, [x0, 136]
-	bl	random_test
-.LVL84:
-	mov	w26, w0
-.LVL85:
-	.loc 1 133 0
-	cbz	w0, .L42
-	.loc 1 134 0
-	adrp	x0, .LC15
-.LVL86:
-	mov	w1, w27
-	add	x0, x0, :lo12:.LC15
+	.loc 4 44 0
+	cmn	x28, #1
+	beq	.L44
+	.loc 4 45 0
+	adrp	x0, .LC11
+	mov	w4, w21
+	mov	w3, w27
+	mov	w2, w26
+	mov	x1, x28
+	add	x0, x0, :lo12:.LC11
 	bl	printf
-.LVL87:
+.LVL79:
+.L57:
+.LBE10:
+.LBE14:
+.LBB15:
+.LBB16:
+	.loc 4 91 0
+	mov	w0, -1
 .L37:
-	.loc 1 144 0
-	mov	w0, w26
-	ldr	x27, [sp, 80]
+.LBE16:
+.LBE15:
+	.loc 4 105 0
 	ldp	x19, x20, [sp, 16]
-.LVL88:
+.LVL80:
 	ldp	x21, x22, [sp, 32]
-.LVL89:
 	ldp	x23, x24, [sp, 48]
-.LVL90:
 	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 96
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
 	.cfi_remember_state
 	.cfi_restore 30
 	.cfi_restore 29
 	.cfi_restore 27
+	.cfi_restore 28
 	.cfi_restore 25
 	.cfi_restore 26
 	.cfi_restore 23
@@ -628,328 +673,275 @@ scan_freq:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL91:
-.L42:
+.LVL81:
+.L39:
 	.cfi_restore_state
-	.loc 1 137 0
-	bl	ctrlc
-.LVL92:
-	cbz	w0, .L44
-.LVL93:
-.L46:
-	.loc 1 123 0
-	mov	w26, 0
-	b	.L37
-.LVL94:
+.LBB18:
+.LBB11:
+	.loc 4 35 0
+	str	w23, [x19, x0]
+	.loc 4 25 0
+	add	w1, w1, 1
+.LVL82:
+	b	.L38
+.LVL83:
 .L44:
-	.loc 1 123 0 is_stmt 0 discriminator 2
-	add	w21, w21, 1
-.LVL95:
-	b	.L41
-	.cfi_endproc
-.LFE255:
-	.size	scan_freq, .-scan_freq
-	.section	.text.cpu_2_io,"ax",@progbits
-	.align	2
-	.global	cpu_2_io
-	.type	cpu_2_io, %function
-cpu_2_io:
-.LFB275:
-	.file 3 "cmd/ddr_tool/tool_common.c"
-	.loc 3 11 0 is_stmt 1
-	.cfi_startproc
-.LVL96:
-	ret
-	.cfi_endproc
-.LFE275:
-	.size	cpu_2_io, .-cpu_2_io
-	.section	.text.write_buf_to_ddr,"ax",@progbits
-	.align	2
-	.global	write_buf_to_ddr
-	.type	write_buf_to_ddr, %function
-write_buf_to_ddr:
-.LFB276:
-	.loc 3 29 0
-	.cfi_startproc
+.LBE11:
+.LBE18:
+.LBB19:
+.LBB17:
+	.loc 4 64 0
+	adrp	x26, .LC12
+	.loc 4 84 0
+	adrp	x24, .LC13
+	.loc 4 72 0
+	lsr	x28, x20, 3
+	.loc 4 64 0
+	add	x26, x26, :lo12:.LC12
+	.loc 4 84 0
+	add	x24, x24, :lo12:.LC13
+	.loc 4 72 0
+	mov	x27, 0
+	mov	x21, 0
+.LVL84:
+.L51:
+	.loc 4 64 0
+	mov	x1, x21
+	mov	x0, x26
+	bl	printf
+.LVL85:
+	.loc 4 66 0
+	lsl	x22, x21, 24
+	lsl	x0, x21, 8
+	orr	x22, x22, x21, lsl 32
+	orr	x0, x0, x21, lsl 16
+	.loc 4 70 0
+	mov	x2, x20
+	.loc 4 66 0
+	orr	x22, x22, x0
+	lsl	x0, x21, 40
+	orr	x0, x0, x21, lsl 48
+	orr	x22, x22, x0
+	orr	x0, x21, x21, lsl 56
+	orr	x22, x22, x0
+.LVL86:
+	.loc 4 70 0
+	mov	x0, x19
+	mov	w1, w22
+	bl	memset
+.LVL87:
+	.loc 4 72 0
+	mov	x0, 0
+.LVL88:
+.L46:
+	cmp	x0, x28
+	bne	.L50
+.LVL89:
+.L49:
+	.loc 4 84 0
+	mov	x0, x24
+	.loc 4 63 0
+	add	x21, x21, 1
+.LVL90:
+	.loc 4 84 0
+	bl	printf
+.LVL91:
+	.loc 4 63 0
+	cmp	x21, 256
+	bne	.L51
+	mov	x23, -1
+	b	.L48
+.LVL92:
+.L50:
+	lsl	x1, x0, 3
+	add	x23, x1, x19
+	.loc 4 73 0
+	ldr	x25, [x1, x19]
+.LVL93:
+	.loc 4 74 0
+	cmp	x22, x25
+	beq	.L47
+.LVL94:
+	.loc 4 76 0
+	add	x1, x23, 4
+	mov	x0, x23
+.LVL95:
+	bl	flush_dcache_range
+.LVL96:
+	.loc 4 78 0
+	ldr	x27, [x23]
 .LVL97:
-	.loc 3 37 0
-	lsr	w1, w1, 3
+	.loc 4 82 0
+	cmn	x23, #1
+	beq	.L49
 .LVL98:
-	.loc 3 39 0
-	lsr	x3, x3, 3
+.L48:
+	.loc 4 86 0
+	adrp	x0, .LC14
+	add	x0, x0, :lo12:.LC14
+	bl	printf
 .LVL99:
-	.loc 3 37 0
-	sub	w1, w1, #1
+	.loc 4 93 0
+	mov	w0, 0
+	.loc 4 87 0
+	cmn	x23, #1
+	beq	.L37
+	.loc 4 88 0
+	mov	x4, x22
+	mov	x3, x27
+	mov	x2, x25
+	mov	x1, x23
+	adrp	x0, .LC15
+	add	x0, x0, :lo12:.LC15
+	bl	printf
 .LVL100:
-	.loc 3 39 0
-	mov	w4, 0
-	mov	w5, 0
+	b	.L57
 .LVL101:
-.L53:
-	.loc 3 39 0 is_stmt 0 discriminator 1
-	uxtw	x6, w5
-	cmp	x6, x3
-	bcc	.L54
-	.loc 3 44 0 is_stmt 1
-	ret
-.L54:
-	.loc 3 40 0 discriminator 3
-	ldr	x7, [x0, w4, uxtw 3]
-	.loc 3 41 0 discriminator 3
-	add	w4, w4, 1
+.L47:
+	.loc 4 72 0
+	add	x0, x0, 1
 .LVL102:
-	.loc 3 40 0 discriminator 3
-	str	x7, [x2, x6, lsl 3]
-	.loc 3 42 0 discriminator 3
-	and	w4, w1, w4
-.LVL103:
-	.loc 3 39 0 discriminator 3
-	add	w5, w5, 1
-.LVL104:
-	b	.L53
+	b	.L46
+.LBE17:
+.LBE19:
 	.cfi_endproc
-.LFE276:
-	.size	write_buf_to_ddr, .-write_buf_to_ddr
-	.section	.text.cmp_buf_data,"ax",@progbits
+.LFE271:
+	.size	random_test, .-random_test
+	.section	.text.scan_freq,"ax",@progbits
 	.align	2
-	.global	cmp_buf_data
-	.type	cmp_buf_data, %function
-cmp_buf_data:
-.LFB277:
-	.loc 3 48 0
+	.type	scan_freq, %function
+scan_freq:
+.LFB255:
+	.loc 2 55 0
 	.cfi_startproc
-.LVL105:
-	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 3 60 0
-	lsr	w1, w1, 3
-.LVL106:
-	.loc 3 48 0
-	mov	w10, w4
-	.loc 3 60 0
-	sub	w1, w1, #1
-	.loc 3 48 0
+.LVL103:
+	stp	x29, x30, [sp, -80]!
+	.cfi_def_cfa_offset 80
+	.cfi_offset 29, -80
+	.cfi_offset 30, -72
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	.loc 3 62 0
-	lsr	x3, x3, 3
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -64
+	.cfi_offset 20, -56
+	mov	w19, w0
+	stp	x21, x22, [sp, 32]
+	.loc 2 61 0
+	mov	w0, 16960
+.LVL104:
+	.loc 2 55 0
+	stp	x23, x24, [sp, 48]
+	.loc 2 61 0
+	movk	w0, 0xf, lsl 16
+	.loc 2 55 0
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 21, -48
+	.cfi_offset 22, -40
+	.cfi_offset 23, -32
+	.cfi_offset 24, -24
+	.cfi_offset 25, -16
+	.cfi_offset 26, -8
+	.loc 2 55 0
+	mov	x22, x2
+	.loc 2 61 0
+	cmp	w19, w0
+	bls	.L59
+	.loc 2 62 0
+	udiv	w19, w19, w0
+.LVL105:
+.L59:
+	.loc 2 63 0
+	cmp	w1, w0
+	bls	.L60
+	.loc 2 64 0
+	udiv	w1, w1, w0
+.LVL106:
+.L60:
+	.loc 2 66 0
+	cmp	w19, w1
+	bls	.L61
+	mov	w0, w19
+	mov	w19, w1
 .LVL107:
-	.loc 3 48 0
-	mov	x8, x2
+	mov	w1, w0
 .LVL108:
-	.loc 3 62 0
-	mov	w6, 0
-	.loc 3 56 0
-	mov	x2, 0
+.L61:
+	.loc 2 75 0
+	mov	w25, 16960
+	adrp	x24, .LC16
+	.loc 2 71 0
+	sub	w21, w1, w19
 .LVL109:
-	.loc 3 62 0
-	mov	w7, 0
-	.loc 3 48 0
-	str	x19, [sp, 16]
-	.cfi_offset 19, -16
+	.loc 2 75 0
+	add	x24, x24, :lo12:.LC16
+	.loc 2 73 0
+	mov	w23, 0
+	.loc 2 75 0
+	movk	w25, 0xf, lsl 16
 .LVL110:
-.L56:
-	.loc 3 62 0 discriminator 1
-	uxtw	x5, w7
-	cmp	x5, x3
-	bcc	.L59
-	.loc 3 61 0
-	mov	x19, 0
-	.loc 3 54 0
-	mov	x3, 0
-	.loc 3 55 0
-	mov	x4, 0
-	b	.L58
-.L59:
-	.loc 3 63 0
-	lsl	x5, x5, 3
-	.loc 3 64 0
-	ldr	x4, [x0, w6, uxtw 3]
-	.loc 3 63 0
-	add	x19, x8, x5
-	ldr	x2, [x8, x5]
+.L62:
+	.loc 2 73 0 discriminator 1
+	cmp	x22, x23, uxtw
+	bhi	.L66
+	.loc 2 73 0 is_stmt 0 discriminator 3
+	cbnz	x22, .L67
+.L66:
+	.loc 2 74 0 is_stmt 1
+	bl	rand
 .LVL111:
-	.loc 3 64 0
-	cmp	x2, x4
-	beq	.L57
-	.loc 3 65 0
-	ldr	x3, [x19]
+	udiv	w20, w0, w21
+	.loc 2 75 0
+	mov	w1, w23
+	.loc 2 74 0
+	msub	w20, w20, w21, w0
+	.loc 2 75 0
+	mov	x0, x24
 .LVL112:
-.L58:
-	.loc 3 73 0
-	cmp	x19, 0
-	ccmp	w10, 0, 4, ne
-	beq	.L55
-	.loc 3 74 0
-	adrp	x0, .LC16
+	.loc 2 74 0
+	add	w20, w20, w19
+	.loc 2 75 0
+	mul	w20, w20, w25
+	mov	w2, w20
+	bl	printf
 .LVL113:
-	mov	x1, x19
+	.loc 2 76 0
+	and	x0, x20, 4294967232
+	bl	set_ddr_freq
 .LVL114:
-	add	x0, x0, :lo12:.LC16
-	bl	printf
+	mov	w26, w0
 .LVL115:
-.L55:
-	.loc 3 78 0
-	mov	x0, x19
-	ldr	x19, [sp, 16]
+	.loc 2 79 0
+	ldr	x0, [x18]
 .LVL116:
-	ldp	x29, x30, [sp], 32
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_def_cfa 31, 0
-	ret
+	mov	x1, 1048576
+	ldr	x0, [x0, 136]
+	bl	random_test
 .LVL117:
-.L57:
-	.cfi_restore_state
-	.loc 3 70 0 discriminator 2
-	add	w6, w6, 1
+	mov	w20, w0
 .LVL118:
-	.loc 3 62 0 discriminator 2
-	add	w7, w7, 1
-.LVL119:
-	.loc 3 71 0 discriminator 2
-	and	w6, w1, w6
-.LVL120:
-	b	.L56
-	.cfi_endproc
-.LFE277:
-	.size	cmp_buf_data, .-cmp_buf_data
-	.section	.text.crosstalk,"ax",@progbits
-	.align	2
-	.global	crosstalk
-	.type	crosstalk, %function
-crosstalk:
-.LFB200:
-	.file 4 "cmd/ddr_tool/crosstalk.c"
-	.loc 4 46 0
-	.cfi_startproc
-.LVL121:
-	stp	x29, x30, [sp, -144]!
-	.cfi_def_cfa_offset 144
-	.cfi_offset 29, -144
-	.cfi_offset 30, -136
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -128
-	.cfi_offset 20, -120
-	.loc 4 71 0
-	add	x20, x29, 112
-	.loc 4 46 0
-	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -112
-	.cfi_offset 22, -104
-	mov	x22, x0
-	stp	x23, x24, [sp, 48]
-	.loc 4 63 0
+	.loc 2 80 0
+	cbz	w0, .L63
+	.loc 2 81 0
 	adrp	x0, .LC17
-.LVL122:
-	.loc 4 46 0
-	stp	x27, x28, [sp, 80]
-	.cfi_offset 23, -96
-	.cfi_offset 24, -88
-	.cfi_offset 27, -64
-	.cfi_offset 28, -56
-	mov	x23, x1
-	stp	x25, x26, [sp, 64]
-	.cfi_offset 25, -80
-	.cfi_offset 26, -72
-	.loc 4 63 0
-	add	x0, x0, :lo12:.LC17
-	.loc 4 68 0
-	adrp	x24, .LC19
-	.loc 4 63 0
-	bl	printf
-.LVL123:
-	.loc 4 68 0
-	add	x27, x24, :lo12:.LC19
-	.loc 4 66 0
-	adrp	x21, .LC18
-	.loc 4 64 0
-	mov	w19, 0
-	.loc 4 66 0
-	add	x0, x21, :lo12:.LC18
-	str	x0, [x29, 104]
-.LVL124:
-.L70:
-	ldr	x0, [x29, 104]
-	.loc 4 71 0
-	mov	w25, 1
-	.loc 4 66 0
-	mov	w1, w19
-	.loc 4 71 0
-	lsl	w25, w25, w19
-	.loc 4 65 0
-	mov	w28, -1
-	.loc 4 67 0
-	mov	w26, 0
-	.loc 4 66 0
-	bl	printf
-.LVL125:
-.L69:
-	.loc 4 68 0
+.LVL119:
 	mov	w1, w26
-	mov	x0, x27
-	.loc 4 69 0
-	mvn	w28, w28
-.LVL126:
-	.loc 4 68 0
+	add	x0, x0, :lo12:.LC17
 	bl	printf
-.LVL127:
-	.loc 4 69 0
-	mov	x8, 0
-.LVL128:
-.L66:
-	.loc 4 71 0 discriminator 3
-	eor	w0, w25, w28
-	str	w0, [x8, x20]
-	add	x8, x8, 4
-	.loc 4 72 0 discriminator 3
-	mvn	w28, w28
-.LVL129:
-	.loc 4 70 0 discriminator 3
-	cmp	x8, 32
-	bne	.L66
-	.loc 4 77 0
-	mov	x3, x23
-	mov	x2, x22
-	mov	w1, w8
-	mov	x0, x20
-	bl	write_buf_to_ddr
-.LVL130:
-	.loc 4 78 0
-	mov	w1, w8
-	mov	w4, 1
-	mov	x3, x23
-	mov	x2, x22
-	mov	x0, x20
-	bl	cmp_buf_data
-.LVL131:
-	cbz	x0, .L67
-.LVL132:
-.L75:
-	.loc 4 80 0
-	mov	w0, -1
-.L65:
-	.loc 4 115 0
+.LVL120:
+.L58:
+	.loc 2 91 0
+	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
+.LVL121:
 	ldp	x21, x22, [sp, 32]
-.LVL133:
+.LVL122:
 	ldp	x23, x24, [sp, 48]
-.LVL134:
+.LVL123:
 	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-.LVL135:
-	ldp	x29, x30, [sp], 144
+	ldp	x29, x30, [sp], 80
 	.cfi_remember_state
 	.cfi_restore 30
 	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
 	.cfi_restore 25
 	.cfi_restore 26
 	.cfi_restore 23
@@ -960,1114 +952,623 @@ crosstalk:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL136:
-.L67:
+.LVL124:
+.L63:
 	.cfi_restore_state
-	.loc 4 67 0 discriminator 2
-	add	w26, w26, 1
-.LVL137:
-	cmp	w26, 2
-	bne	.L69
-	.loc 4 64 0 discriminator 2
-	add	w19, w19, 1
-.LVL138:
-	cmp	w19, 32
-	bne	.L70
-	.loc 4 87 0
-	adrp	x0, .LC20
-	add	x0, x0, :lo12:.LC20
+	.loc 2 84 0
+	bl	ctrlc
+.LVL125:
+	cbz	w0, .L65
+.LVL126:
+.L67:
+	.loc 2 73 0
+	mov	w20, 0
+	b	.L58
+.LVL127:
+.L65:
+	.loc 2 73 0 is_stmt 0 discriminator 2
+	add	w23, w23, 1
+.LVL128:
+	b	.L62
+	.cfi_endproc
+.LFE255:
+	.size	scan_freq, .-scan_freq
+	.section	.text.do_ddr_test,"ax",@progbits
+	.align	2
+	.type	do_ddr_test, %function
+do_ddr_test:
+.LFB256:
+	.loc 2 100 0 is_stmt 1
+	.cfi_startproc
+.LVL129:
+	stp	x29, x30, [sp, -224]!
+	.cfi_def_cfa_offset 224
+	.cfi_offset 29, -224
+	.cfi_offset 30, -216
+	.loc 2 113 0
+	adrp	x0, .LC18
+.LVL130:
+	add	x0, x0, :lo12:.LC18
+	.loc 2 100 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -208
+	.cfi_offset 20, -200
+	.loc 2 115 0
+	add	x20, x29, 152
+	.loc 2 100 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -192
+	.cfi_offset 22, -184
+	.loc 2 115 0
+	add	x21, x29, 120
+	.loc 2 100 0
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -176
+	.cfi_offset 24, -168
+	mov	w23, w2
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 25, -160
+	.cfi_offset 26, -152
+	mov	x26, x3
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 27, -144
+	.cfi_offset 28, -136
+	.loc 2 103 0
+	stp	xzr, xzr, [x29, 184]
+	stp	xzr, xzr, [x29, 200]
+	str	xzr, [x29, 216]
+.LVL131:
+	.loc 2 113 0
 	bl	printf
-.LVL139:
-	.loc 4 88 0
-	mov	x0, 128
-	bl	malloc
-.LVL140:
-	mov	x20, x0
+.LVL132:
+	.loc 2 115 0
+	mov	w2, 1
+	mov	x1, x20
+	mov	x0, x21
+	bl	get_print_available_addr
+.LVL133:
+	.loc 2 117 0
+	cmp	w23, 1
+	ble	.L160
+	.loc 2 121 0
+	adrp	x24, .LANCHOR2
+	add	x27, x24, :lo12:.LANCHOR2
+	mov	x25, 0
+	str	x24, [x29, 104]
+.L75:
+	ldr	x1, [x27, x25, lsl 3]
+	mov	w19, w25
+.LVL134:
+	ldr	x0, [x26, 8]
+	bl	strcasecmp
+.LVL135:
+	cbz	w0, .L74
+.LVL136:
+	add	x25, x25, 1
+	.loc 2 120 0 discriminator 2
+	cmp	x25, 7
+	bne	.L75
+	.loc 2 128 0
+	adrp	x0, .LC27
+	add	x0, x0, :lo12:.LC27
+	b	.L161
+.LVL137:
+.L112:
+	.loc 2 133 0
+	adrp	x0, .LC19
+	add	x0, x0, :lo12:.LC19
+.LVL138:
+.L161:
+	.loc 2 128 0
+	bl	printf
+.LVL139:
+.L160:
+	.loc 2 129 0
+	mov	w23, -1
+	b	.L72
+.LVL140:
+.L78:
+	.loc 2 138 0
+	add	x0, x26, x27
+	add	x1, x29, 184
+	add	x2, x1, x27
+	mov	w1, 0
+	add	x27, x27, 8
+	ldr	x0, [x0, 16]
+	bl	strict_strtoul
 .LVL141:
-	.loc 4 89 0
-	cbnz	x0, .L71
-	.loc 4 90 0
-	adrp	x0, .LC21
+	tbz	w0, #31, .L77
+	.loc 2 139 0
+	adrp	x0, .LC20
+	add	x0, x0, :lo12:.LC20
+	b	.L161
 .LVL142:
-	mov	x1, 128
-	add	x0, x0, :lo12:.LC21
-	bl	printf
+.L79:
+	.loc 2 157 0
+	bl	data_cpu_2_io_init
 .LVL143:
-.L71:
-	adrp	x25, .LANCHOR0
-	.loc 4 93 0
-	add	x26, x21, :lo12:.LC18
+	.loc 2 159 0
+	cbnz	w19, .L80
+	.loc 2 161 0
+	ldr	x0, [x29, 192]
+	cbz	x0, .L81
+	.loc 2 162 0
+	bl	set_vdd_logic
 .LVL144:
-	.loc 4 95 0
-	add	x24, x24, :lo12:.LC19
-	.loc 4 100 0
-	add	x25, x25, :lo12:.LANCHOR0
-	.loc 4 69 0
-	mov	w19, 0
+.L81:
+	.loc 2 163 0
+	ldr	x0, [x29, 184]
+	bl	set_ddr_freq
 .LVL145:
-.L78:
-	.loc 4 94 0
-	mov	w21, 0
-	.loc 4 98 0
-	mov	w27, 1
-	.loc 4 93 0
-	mov	w1, w19
-	mov	x0, x26
+.L82:
+	.loc 2 305 0
+	adrp	x0, .LC26
+	add	x0, x0, :lo12:.LC26
 	bl	printf
 .LVL146:
-.L77:
-	.loc 4 95 0
-	mov	w1, w21
-	mov	x0, x24
-	bl	printf
+	b	.L72
 .LVL147:
-	.loc 4 98 0
-	lsl	w1, w27, w21
-	mov	x8, 0
+.L80:
+	.loc 2 164 0
+	cmp	w19, 1
+	bne	.L83
+	.loc 2 166 0
+	ldr	x0, [x29, 208]
+	cbz	x0, .L84
+	.loc 2 167 0
+	bl	set_vdd_logic
 .LVL148:
-.L74:
-	ldr	w0, [x8, x25]
-	.loc 4 97 0
-	cbz	w19, .L72
-	.loc 4 98 0
-	eor	w0, w0, w1
-.L72:
-	.loc 4 100 0
-	str	w0, [x20, x8]
-	add	x8, x8, 4
-	.loc 4 96 0
-	cmp	x8, 128
-	bne	.L74
-	.loc 4 105 0
-	mov	x3, x23
-	mov	x2, x22
-	mov	w1, w8
-	mov	x0, x20
-	bl	write_buf_to_ddr
+.L84:
+	.loc 2 168 0
+	ldr	w0, [x29, 184]
+	ldr	w1, [x29, 192]
+	ldr	x2, [x29, 200]
+	bl	scan_freq
 .LVL149:
-	.loc 4 107 0
-	mov	w1, w8
-	mov	w4, 1
-	mov	x3, x23
-	mov	x2, x22
-	mov	x0, x20
-	bl	cmp_buf_data
+	b	.L82
+.L83:
+	.loc 2 169 0
+	sub	w25, w25, #5
+	cmp	w25, 1
+	bhi	.L85
+	.loc 2 171 0
+	ldr	x0, [x29, 208]
+	cbz	x0, .L86
+	.loc 2 172 0
+	bl	set_vdd_logic
 .LVL150:
-	cbnz	x0, .L75
-	.loc 4 110 0
-	cbz	w19, .L76
-	.loc 4 94 0 discriminator 2
-	add	w21, w21, 1
+.L86:
+	.loc 2 173 0
+	cmp	w19, 5
+	bne	.L114
+	.loc 2 175 0
+	mov	x1, 65535
+	mov	x0, 0
+	movk	x1, 0x9f, lsl 16
+.L90:
 .LVL151:
-	cmp	w21, 32
-	bne	.L77
-.L76:
-	.loc 4 92 0 discriminator 2
-	add	w19, w19, 1
+	ldr	x2, [x20, x0, lsl 3]
+	cmp	x2, x1
+	bls	.L88
+	.loc 2 176 0
+	mov	w1, w0
 .LVL152:
-	cmp	w19, 2
-	bne	.L78
-	.loc 4 114 0
-	mov	w0, 0
-	b	.L65
-	.cfi_endproc
-.LFE200:
-	.size	crosstalk, .-crosstalk
-	.section	.text.diagonalscan,"ax",@progbits
-	.align	2
-	.global	diagonalscan
-	.type	diagonalscan, %function
-diagonalscan:
-.LFB271:
-	.file 5 "cmd/ddr_tool/diagonalscan.c"
-	.loc 5 49 0
-	.cfi_startproc
+	.loc 2 185 0
+	mov	x2, 10485760
+	str	x2, [x20, w0, uxtw 3]
 .LVL153:
-	stp	x29, x30, [sp, -112]!
-	.cfi_def_cfa_offset 112
-	.cfi_offset 29, -112
-	.cfi_offset 30, -104
-	.loc 5 55 0
-	mov	x2, 32
-	.loc 5 49 0
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -96
-	.cfi_offset 20, -88
-	mov	x19, x1
-	.loc 5 55 0
-	adrp	x1, .LANCHOR1
+.L89:
+	.loc 2 108 0 discriminator 1
+	mov	x0, 0
 .LVL154:
-	add	x1, x1, :lo12:.LANCHOR1
-	.loc 5 49 0
-	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -64
-	.cfi_offset 24, -56
-	mov	x23, x0
-	stp	x21, x22, [sp, 32]
-	.loc 5 55 0
-	add	x0, x29, 80
+.L93:
+	.loc 2 188 0
+	cmp	w1, w0
+	beq	.L92
+	.loc 2 190 0
+	str	xzr, [x21, x0, lsl 3]
+	.loc 2 191 0
+	str	xzr, [x20, x0, lsl 3]
+.L92:
 .LVL155:
-	.loc 5 49 0
-	stp	x25, x26, [sp, 64]
-	.cfi_offset 21, -80
-	.cfi_offset 22, -72
-	.cfi_offset 25, -48
-	.cfi_offset 26, -40
-	.loc 5 55 0
-	bl	memcpy
+	add	x0, x0, 1
 .LVL156:
-	.loc 5 60 0
-	adrp	x0, .LC22
-	add	x0, x0, :lo12:.LC22
-	bl	printf
+	.loc 2 187 0 discriminator 2
+	cmp	x0, 4
+	bne	.L93
+	.loc 2 193 0
+	mov	w28, 60
+.L87:
 .LVL157:
-.LBB29:
-.LBB30:
-.LBB31:
-	.loc 5 19 0
-	mov	x0, 520
-	movk	x0, 0xff01, lsl 16
-	ldr	w20, [x0]
+	.loc 2 201 0
+	adrp	x26, .LC22
 .LVL158:
-#APP
-// 19 "cmd/ddr_tool/diagonalscan.c" 1
-	dmb sy
-// 0 "" 2
+	.loc 2 205 0
+	adrp	x27, .LC23
+	.loc 2 201 0
+	add	x26, x26, :lo12:.LC22
+	.loc 2 205 0
+	add	x27, x27, :lo12:.LC23
+	.loc 2 198 0
+	mov	w25, 0
 .LVL159:
-#NO_APP
-.LBE31:
-.LBE30:
-.LBE29:
-	.loc 5 75 0
-	mov	x2, 32
-	add	x1, x29, 80
-	mov	x0, x23
-	bl	memcpy
+.L94:
+	.loc 2 199 0
+	ldr	x0, [x29, 200]
+	cbz	x0, .L100
+	.loc 2 199 0 is_stmt 0 discriminator 1
+	cmp	x0, x25, uxtw
+	bls	.L82
+.L100:
+	.loc 2 201 0 is_stmt 1
+	mov	x19, 0
+	.loc 2 200 0
+	add	w25, w25, 1
 .LVL160:
-.LBB34:
-.LBB32:
-	.loc 5 40 0
-	ubfx	x0, x20, 9, 2
-	.loc 5 41 0
-	ubfx	x20, x20, 2, 2
+	.loc 2 201 0
+	mov	w1, w25
+	mov	x0, x26
+	bl	printf
 .LVL161:
-	.loc 5 40 0
-	add	w0, w0, 9
-	.loc 5 41 0
-	mov	w1, 2
-	asr	w20, w1, w20
-.LBE32:
-.LBE34:
-	.loc 5 76 0
-	lsr	x24, x19, 1
-.LBB35:
-.LBB33:
-	.loc 5 43 0
-	add	w0, w0, w20
-	sub	x19, x19, #32
+.L98:
+	.loc 2 203 0
+	ldr	x3, [x20, x19, lsl 3]
+	cbz	x3, .L95
+	.loc 2 205 0
+	ldr	x2, [x21, x19, lsl 3]
+	mov	w1, w19
+	mov	x0, x27
+	bl	printf
 .LVL162:
-	mov	w25, 1
-	add	x19, x19, x23
+	.loc 2 207 0
+	ldr	x0, [x29, 192]
+	bl	set_ddr_freq
 .LVL163:
-	lsl	w25, w25, w0
-.LBE33:
-.LBE35:
-	.loc 5 76 0
-	mov	w21, 0
-	mov	x20, 0
+	.loc 2 208 0
+	ldr	x1, [x20, x19, lsl 3]
+	ldr	x0, [x21, x19, lsl 3]
+	bl	random_test
 .LVL164:
-.L90:
-	.loc 5 76 0 is_stmt 0 discriminator 1
-	cmp	x20, x24
-	bcc	.L94
-	mov	x0, 0
-	b	.L91
-.L94:
-	.loc 5 77 0 is_stmt 1
-	uxtw	x22, w21
-	mov	x2, 32
-	sub	x26, x19, x22
-	add	x1, x29, 80
-	mov	x0, x26
-	bl	memcpy
+	mov	w24, w0
 .LVL165:
-	.loc 5 80 0
-	add	x2, x20, x23
-	.loc 5 79 0
-	mov	x3, 32
-	mov	w4, 1
-	add	x2, x2, x22
-	mov	w1, w3
-	add	x0, x29, 80
-	bl	cmp_buf_data
+	.loc 2 210 0
+	cbnz	w0, .L115
+	.loc 2 211 0
+	ldr	x1, [x20, x19, lsl 3]
+	ldr	x0, [x21, x19, lsl 3]
 .LVL166:
-	.loc 5 81 0
-	cbnz	x0, .L91
-	.loc 5 84 0
-	add	x22, x22, 40
-	add	x20, x20, x25
+	bl	crosstalk
 .LVL167:
-	cmp	x25, x22
-	add	w21, w21, 8
+	mov	w24, w0
 .LVL168:
-	csel	w21, w21, wzr, cs
+	.loc 2 215 0
+	cbnz	w0, .L116
+	.loc 2 216 0
+	ldr	x1, [x20, x19, lsl 3]
+	ldr	x0, [x21, x19, lsl 3]
 .LVL169:
-	.loc 5 86 0
-	cmp	x24, x20
-	bls	.L93
-	.loc 5 87 0
-	add	x0, x23, x20
+	bl	diagonalscan
 .LVL170:
-	mov	x2, 32
-	add	x1, x29, 80
-	add	x0, x0, x21, uxtw
-	bl	memcpy
+	mov	w24, w0
 .LVL171:
-.L93:
-	.loc 5 89 0
-	mov	x3, 32
-	mov	w4, 1
-	mov	x2, x26
-	mov	w1, w3
-	add	x0, x29, 80
-	sub	x19, x19, x25
-	bl	cmp_buf_data
+	.loc 2 220 0
+	cbnz	w0, .L117
+	.loc 2 221 0
+	ldr	w0, [x29, 184]
 .LVL172:
-	.loc 5 92 0
-	cbz	x0, .L90
+	and	x2, x28, 1020
+	ldr	w1, [x29, 192]
+	.loc 2 224 0
+	mov	w22, 1
+	.loc 2 221 0
+	bl	scan_freq
 .LVL173:
-.L91:
-	.loc 5 100 0
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
+	mov	w24, w0
 .LVL174:
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 112
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
-	ret
-	.cfi_endproc
-.LFE271:
-	.size	diagonalscan, .-diagonalscan
-	.section	.text.do_ddr_test,"ax",@progbits
-	.align	2
-	.type	do_ddr_test, %function
-do_ddr_test:
-.LFB258:
-	.loc 1 190 0
-	.cfi_startproc
+.L96:
+	.loc 2 226 0
+	ldr	x0, [x29, 184]
 .LVL175:
-	stp	x29, x30, [sp, -240]!
-	.cfi_def_cfa_offset 240
-	.cfi_offset 29, -240
-	.cfi_offset 30, -232
-.LBB40:
-.LBB41:
-	.loc 1 50 0
-	mov	x0, 0
+	bl	set_ddr_freq
 .LVL176:
-.LBE41:
-.LBE40:
-	.loc 1 190 0
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -208
-	.cfi_offset 22, -200
-	mov	w22, w2
-	stp	x19, x20, [sp, 16]
-.LBB48:
-.LBB42:
-	.loc 1 50 0
-	mov	x2, x18
+	.loc 2 227 0
+	cbnz	w24, .L118
+	.loc 2 228 0
+	ldr	x1, [x20, x19, lsl 3]
+	ldr	x0, [x21, x19, lsl 3]
+	bl	random_test
 .LVL177:
-.LBE42:
-.LBE48:
-	.loc 1 190 0
-	stp	x25, x26, [sp, 64]
-	.cfi_offset 19, -224
-	.cfi_offset 20, -216
-	.cfi_offset 25, -176
-	.cfi_offset 26, -168
-.LBB49:
-.LBB43:
-	.loc 1 52 0
-	add	x20, x29, 136
-.LBE43:
-.LBE49:
-	.loc 1 190 0
-	mov	x25, x3
-.LBB50:
-.LBB44:
-	.loc 1 53 0
-	add	x21, x29, 168
-.LBE44:
-.LBE50:
-	.loc 1 190 0
-	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -192
-	.cfi_offset 24, -184
-.LBB51:
-.LBB45:
-	.loc 1 47 0
-	mov	w24, 0
-.LBE45:
-.LBE51:
-	.loc 1 190 0
-	stp	x27, x28, [sp, 80]
-	.cfi_offset 27, -160
-	.cfi_offset 28, -152
-	.loc 1 193 0
-	stp	xzr, xzr, [x29, 200]
-	stp	xzr, xzr, [x29, 216]
-	str	xzr, [x29, 232]
+	mov	w2, w0
 .LVL178:
-.L99:
-.LBB52:
-.LBB46:
-	.loc 1 50 0
-	ldr	x1, [x2]
-	ubfiz	x3, x0, 4, 32
-	.loc 1 52 0
-	str	xzr, [x20, x0, lsl 3]
-	.loc 1 50 0
-	add	x1, x1, x3
-	.loc 1 53 0
-	str	xzr, [x21, x0, lsl 3]
-	.loc 1 50 0
-	ldr	x1, [x1, 136]
-	cmp	x1, 0
-	csinc	w24, w24, w0, eq
+	.loc 2 232 0
+	cbnz	w0, .L119
+	.loc 2 233 0
+	ldr	x1, [x20, x19, lsl 3]
+	ldr	x0, [x21, x19, lsl 3]
 .LVL179:
-	add	x0, x0, 1
+	str	w2, [x29, 100]
+	bl	crosstalk
 .LVL180:
-	.loc 1 49 0
-	cmp	x0, 4
-	bne	.L99
-	mov	x0, 0
-.L100:
+	mov	w22, w0
 .LVL181:
-	.loc 1 56 0
-	cmp	w0, w24
-	bcc	.L101
-	.loc 1 61 0
-	sub	w1, w24, #1
-	ldr	x0, [x2, 128]
+	.loc 2 237 0
+	ldr	w2, [x29, 100]
+	cbnz	w0, .L120
+	.loc 2 238 0
+	ldr	x1, [x20, x19, lsl 3]
+	ldr	x0, [x21, x19, lsl 3]
 .LVL182:
-	lsl	x1, x1, 3
-	.loc 1 67 0
-	adrp	x26, .LC25
-	.loc 1 61 0
-	sub	x0, x0, #1048576
-	.loc 1 64 0
-	mov	x23, 0
-	.loc 1 67 0
-	add	x26, x26, :lo12:.LC25
-	.loc 1 61 0
-	ldr	x2, [x20, x1]
-	sub	x0, x0, x2
-	.loc 1 62 0
-	and	x0, x0, -4096
-	.loc 1 61 0
-	str	x0, [x21, x1]
-	.loc 1 63 0
-	adrp	x0, .LC23
-	add	x0, x0, :lo12:.LC23
-	bl	printf
+	bl	diagonalscan
 .LVL183:
-	.loc 1 64 0
-	adrp	x0, .LC24
-	add	x0, x0, :lo12:.LC24
-	bl	printf
+	mov	w24, w0
 .LVL184:
-.L102:
-	.loc 1 65 0
-	cmp	w24, w23
-	bhi	.L104
+	.loc 2 243 0
+	cbnz	w0, .L121
+	.loc 2 245 0
+	bl	ctrlc
 .LVL185:
-.LBE46:
-.LBE52:
-	.loc 1 205 0
-	cmp	w22, 1
-	ble	.L214
-	.loc 1 209 0
-	adrp	x0, .LANCHOR2
-	add	x26, x0, :lo12:.LANCHOR2
-	mov	x24, 0
-	str	x0, [x29, 120]
-.L107:
-	ldr	x1, [x26, x24, lsl 3]
-	mov	w23, w24
+	cbnz	w0, .L122
+	.loc 2 240 0
+	mov	w22, 4
 .LVL186:
-	ldr	x0, [x25, 8]
-	bl	strcasecmp
+.L95:
+	add	x19, x19, 1
 .LVL187:
-	cbz	w0, .L106
+	.loc 2 202 0 discriminator 2
+	cmp	x19, 4
+	bne	.L98
+	mov	w2, 0
+	mov	w24, 0
 .LVL188:
-	add	x24, x24, 1
-	.loc 1 208 0 discriminator 2
-	cmp	x24, 7
-	bne	.L107
-	.loc 1 216 0
-	adrp	x0, .LC37
-	add	x0, x0, :lo12:.LC37
-	b	.L215
+.L97:
+	.loc 2 250 0
+	orr	w2, w24, w2
 .LVL189:
-.L101:
-.LBB53:
-.LBB47:
-	.loc 1 57 0
-	ubfiz	x1, x0, 4, 32
-	ldr	x3, [x2]
-	add	x1, x1, 128
-	add	x3, x3, x1
-	ldr	x3, [x3, 8]
-	str	x3, [x20, x0, lsl 3]
-	.loc 1 58 0
-	ldr	x3, [x2]
-	add	x1, x3, x1
-	ldr	x1, [x1, 16]
-	str	x1, [x21, x0, lsl 3]
+	cbz	w2, .L94
 .LVL190:
-	add	x0, x0, 1
+.L99:
+	.loc 2 302 0
+	cbz	w24, .L82
+	.loc 2 303 0
+	ldr	x0, [x29, 104]
+	add	x24, x0, :lo12:.LANCHOR2
 .LVL191:
-	b	.L100
-.LVL192:
-.L104:
-	.loc 1 66 0
-	ldr	x1, [x20, x23, lsl 3]
-	cbz	x1, .L103
-	.loc 1 67 0
-	ldr	x3, [x21, x23, lsl 3]
-	mov	x0, x26
-	add	x2, x1, x3
+	adrp	x0, .LC25
+	add	x0, x0, :lo12:.LC25
+	ldr	x1, [x24, w22, sxtw 3]
 	bl	printf
+.LVL192:
+	b	.L72
 .LVL193:
-.L103:
-	add	x23, x23, 1
+.L88:
+	add	x0, x0, 1
 .LVL194:
-	b	.L102
+	.loc 2 174 0 discriminator 2
+	cmp	x0, 4
+	bne	.L90
+	.loc 2 181 0
+	ldr	x2, [x29, 152]
+	mov	w1, 10
+	adrp	x0, .LC28
+	add	x0, x0, :lo12:.LC28
+	lsr	x2, x2, 20
+	bl	printf
 .LVL195:
-.L150:
-.LBE47:
-.LBE53:
-	.loc 1 221 0
-	adrp	x0, .LC26
-	add	x0, x0, :lo12:.LC26
+	.loc 2 108 0
+	mov	w1, 0
+	b	.L89
+.L114:
+	.loc 2 195 0
+	mov	w28, 1000
+	b	.L87
 .LVL196:
-.L215:
-	.loc 1 216 0
-	bl	printf
+.L115:
+	.loc 2 209 0
+	mov	w22, 2
+	b	.L96
 .LVL197:
-.L214:
-	.loc 1 217 0
-	mov	w22, -1
-	b	.L97
+.L116:
+	.loc 2 213 0
+	mov	w22, 3
+	b	.L96
 .LVL198:
-.L110:
-	.loc 1 226 0
-	add	x0, x25, x26
-	add	x1, x29, 200
-	add	x2, x1, x26
-	mov	w1, 0
-	add	x26, x26, 8
-	ldr	x0, [x0, 16]
-	bl	strict_strtoul
+.L117:
+	.loc 2 218 0
+	mov	w22, 4
+	b	.L96
 .LVL199:
-	tbz	w0, #31, .L109
-	.loc 1 227 0
-	adrp	x0, .LC27
-	add	x0, x0, :lo12:.LC27
-	b	.L215
+.L118:
+	mov	w2, 0
+	b	.L97
 .LVL200:
-.L111:
-	.loc 1 247 0
-	cbnz	w23, .L112
-	.loc 1 249 0
-	ldr	x0, [x29, 208]
+.L119:
+	.loc 2 228 0
+	mov	w24, w0
+	mov	w2, 0
+	.loc 2 230 0
+	mov	w22, 2
+	b	.L97
 .LVL201:
-	cbz	x0, .L113
-	.loc 1 250 0
-	bl	set_vdd_logic
+.L120:
+	.loc 2 233 0
+	mov	w24, w0
+	.loc 2 235 0
+	mov	w22, 3
+	b	.L97
 .LVL202:
-.L113:
-	.loc 1 251 0
-	ldr	x0, [x29, 200]
-	bl	set_ddr_freq
+.L121:
+	mov	w2, w22
 .LVL203:
-.L114:
-	.loc 1 384 0
-	adrp	x0, .LC36
-	add	x0, x0, :lo12:.LC36
-	bl	printf
-.LVL204:
+.L158:
+	.loc 2 240 0
+	mov	w22, 4
 	b	.L97
+.L122:
+	.loc 2 246 0
+	mov	w2, -1
+	b	.L158
+.LVL204:
+.L85:
+	.loc 2 259 0
+	mov	x2, x20
+	mov	x1, x21
+	add	x0, x29, 200
+	bl	judge_test_addr
 .LVL205:
-.L112:
-	.loc 1 252 0
-	cmp	w23, 1
-	bne	.L115
-	.loc 1 254 0
-	ldr	x0, [x29, 224]
+	mov	w27, w0
 .LVL206:
-	cbz	x0, .L116
-	.loc 1 255 0
-	bl	set_vdd_logic
+	.loc 2 260 0
+	cbz	w0, .L123
+	.loc 2 263 0
+	ldr	x0, [x29, 184]
 .LVL207:
-.L116:
-	.loc 1 256 0
-	ldr	w0, [x29, 200]
-	ldr	w1, [x29, 208]
-	ldr	x2, [x29, 216]
-	bl	scan_freq
+	bl	set_ddr_freq
 .LVL208:
-	b	.L114
+	.loc 2 265 0
+	ldr	x0, [x29, 216]
+	cbz	x0, .L102
+	.loc 2 266 0
+	bl	set_vdd_logic
 .LVL209:
-.L115:
-	.loc 1 257 0
-	sub	w24, w24, #5
-	cmp	w24, 1
-	bls	.L117
+.L102:
+	.loc 2 270 0
+	adrp	x26, .LC24
 .LVL210:
-.LBB54:
-.LBB55:
-	.loc 1 79 0
-	ldr	x0, [x29, 144]
+	mov	w25, 0
+	add	x26, x26, :lo12:.LC24
+	b	.L110
 .LVL211:
-	.loc 1 82 0
-	ldr	x3, [x29, 224]
-	.loc 1 79 0
-	cmp	x0, 0
-	ldr	x0, [x29, 152]
-	ldr	x1, [x29, 160]
-	cset	w24, ne
-	.loc 1 80 0
-	cmp	x0, 0
-	mov	w0, 3
-	csinc	w0, w0, w24, ne
+.L111:
+	.loc 2 271 0
+	mov	x28, 0
+	.loc 2 269 0
+	add	w25, w25, 1
 .LVL212:
-	cmp	x1, 0
-	mov	w1, 4
-	csel	w0, w0, w1, eq
+	.loc 2 270 0
+	mov	w1, w25
+	mov	x0, x26
+	bl	printf
 .LVL213:
-	.loc 1 82 0
-	cbnz	x3, .L209
-	.loc 1 83 0
-	mov	w24, w0
+.L103:
+	.loc 2 271 0 discriminator 1
+	cmp	w27, w28
+	bhi	.L109
+	mov	w0, 0
+	mov	w24, 0
 .LVL214:
-.L134:
-.LBE55:
-.LBE54:
-	.loc 1 342 0
-	ldr	x0, [x29, 200]
-	bl	set_ddr_freq
+.L108:
+	.loc 2 297 0
+	orr	w0, w24, w0
 .LVL215:
-	.loc 1 344 0
-	ldr	x0, [x29, 232]
-	cbz	x0, .L140
-	.loc 1 345 0
-	bl	set_vdd_logic
+	cbnz	w0, .L99
 .LVL216:
-.L140:
-	.loc 1 349 0
-	adrp	x26, .LC34
-	mov	w25, 0
+.L110:
+	.loc 2 268 0
+	ldr	x0, [x29, 192]
+	cbz	x0, .L111
+	.loc 2 268 0 is_stmt 0 discriminator 1
+	cmp	x0, x25, uxtw
+	bhi	.L111
+	b	.L82
 .LVL217:
-	add	x26, x26, :lo12:.LC34
-	b	.L148
+.L109:
+	.loc 2 278 0 is_stmt 1
+	ldr	x1, [x20, x28, lsl 3]
+	.loc 2 272 0
+	cmp	w19, 3
+	.loc 2 278 0
+	ldr	x0, [x21, x28, lsl 3]
+	.loc 2 272 0
+	beq	.L105
+	cmp	w19, 4
+	beq	.L106
+	.loc 2 274 0
+	bl	random_test
 .LVL218:
-.L117:
-	.loc 1 259 0
-	ldr	x0, [x29, 224]
+.L159:
+	.loc 2 282 0
+	mov	w24, w0
 .LVL219:
-	cbz	x0, .L123
-	.loc 1 260 0
-	bl	set_vdd_logic
+	.loc 2 290 0
+	bl	ctrlc
 .LVL220:
-.L123:
-	.loc 1 261 0
-	cmp	w23, 5
-	bne	.L155
-	.loc 1 262 0
-	ldr	x1, [x29, 168]
-	mov	x0, 65535
-	movk	x0, 0x9f, lsl 16
-	cmp	x1, x0
-	bhi	.L125
-	.loc 1 263 0
-	lsr	x2, x1, 20
-	adrp	x0, .LC30
-	mov	w1, 10
-	add	x0, x0, :lo12:.LC30
-	bl	printf
+	cbnz	w0, .L124
+	add	x28, x28, 1
 .LVL221:
-.L211:
-	.loc 1 272 0
-	mov	w27, 60
+	mov	w22, w19
+	.loc 2 294 0
+	cbz	w24, .L103
+	mov	w22, w19
+	b	.L108
 .LVL222:
-.L124:
-	.loc 1 280 0
-	adrp	x0, .LC31
-	add	x0, x0, :lo12:.LC31
-	.loc 1 284 0
-	adrp	x28, .LC32
-	.loc 1 280 0
-	str	x0, [x29, 112]
-	.loc 1 277 0
-	mov	w26, 0
-	.loc 1 284 0
-	add	x0, x28, :lo12:.LC32
-	str	x0, [x29, 104]
+.L105:
+	.loc 2 278 0
+	bl	crosstalk
 .LVL223:
-.L126:
-	.loc 1 278 0
-	ldr	x0, [x29, 216]
-	cbz	x0, .L132
-	.loc 1 278 0 is_stmt 0 discriminator 1
-	cmp	x0, x26, uxtw
-	bls	.L114
-.L132:
-	.loc 1 280 0 is_stmt 1
-	ldr	x0, [x29, 112]
-	.loc 1 279 0
-	add	w26, w26, 1
+	b	.L159
+.L106:
+	.loc 2 282 0
+	bl	diagonalscan
 .LVL224:
-	.loc 1 280 0
-	mov	w1, w26
-	mov	x25, 0
-	bl	printf
+	b	.L159
 .LVL225:
-.L130:
-	.loc 1 282 0
-	ldr	x23, [x20, x25, lsl 3]
-	cbz	x23, .L127
-	.loc 1 284 0
-	ldr	x0, [x29, 104]
-	mov	x2, x23
-	ldr	x24, [x21, x25, lsl 3]
-	mov	w1, w25
-	mov	x3, x24
-	bl	printf
+.L124:
+	mov	w22, w19
+	.loc 2 291 0
+	mov	w0, -1
+	b	.L108
 .LVL226:
-	.loc 1 286 0
-	ldr	x0, [x29, 208]
-	bl	set_ddr_freq
+.L123:
+	.loc 2 261 0
+	mov	w23, 1
 .LVL227:
-	.loc 1 287 0
-	mov	x1, x24
-	mov	x0, x23
-	bl	random_test
+	b	.L72
 .LVL228:
-	mov	w28, w0
-.LVL229:
-	.loc 1 289 0
-	cbnz	w0, .L156
-	.loc 1 290 0
-	mov	x1, x24
-	mov	x0, x23
-.LVL230:
-	bl	crosstalk
-.LVL231:
-	mov	w28, w0
-.LVL232:
-	.loc 1 294 0
-	cbnz	w0, .L157
-	.loc 1 295 0
-	mov	x1, x24
-	mov	x0, x23
-.LVL233:
-	bl	diagonalscan
-.LVL234:
-	mov	w28, w0
-.LVL235:
-	.loc 1 299 0
-	cbnz	w0, .L158
-	.loc 1 300 0
-	ldr	w0, [x29, 200]
-.LVL236:
-	and	x2, x27, 1020
-	ldr	w1, [x29, 208]
-	.loc 1 303 0
-	mov	w19, 1
-	.loc 1 300 0
-	bl	scan_freq
-.LVL237:
-	mov	w28, w0
-.LVL238:
-.L128:
-	.loc 1 305 0
-	ldr	x0, [x29, 200]
-.LVL239:
-	bl	set_ddr_freq
-.LVL240:
-	.loc 1 306 0
-	cbnz	w28, .L159
-	.loc 1 307 0
-	mov	x1, x24
-	mov	x0, x23
-	bl	random_test
-.LVL241:
-	mov	w2, w0
-.LVL242:
-	.loc 1 311 0
-	cbnz	w0, .L160
-	str	w2, [x29, 100]
-	.loc 1 312 0
-	mov	x1, x24
-	mov	x0, x23
-.LVL243:
-	bl	crosstalk
-.LVL244:
-	.loc 1 316 0
-	ldr	w2, [x29, 100]
-	.loc 1 312 0
-	mov	w19, w0
-.LVL245:
-	.loc 1 316 0
-	cbnz	w0, .L161
-	.loc 1 317 0
-	mov	x1, x24
-	mov	x0, x23
-.LVL246:
-	bl	diagonalscan
-.LVL247:
-	mov	w28, w0
-.LVL248:
-	.loc 1 322 0
-	cbnz	w0, .L162
-	.loc 1 324 0
-	bl	ctrlc
-.LVL249:
-	cbnz	w0, .L163
-	.loc 1 319 0
-	mov	w19, 4
-.LVL250:
-.L127:
-	add	x25, x25, 1
-.LVL251:
-	.loc 1 281 0 discriminator 2
-	cmp	x25, 4
-	bne	.L130
-	mov	w2, 0
-	mov	w28, 0
-.LVL252:
-.L129:
-	.loc 1 329 0
-	orr	w2, w28, w2
-.LVL253:
-	cbz	w2, .L126
-.LVL254:
-.L131:
-	.loc 1 381 0
-	cbz	w28, .L114
-	.loc 1 382 0
-	ldr	x0, [x29, 120]
-	add	x0, x0, :lo12:.LANCHOR2
-	ldr	x1, [x0, w19, sxtw 3]
-	adrp	x0, .LC35
-	add	x0, x0, :lo12:.LC35
-	bl	printf
-.LVL255:
-	b	.L97
-.LVL256:
-.L125:
-	.loc 1 266 0
-	mov	x0, 10485760
-	.loc 1 268 0
-	stp	xzr, xzr, [x29, 144]
-	.loc 1 266 0
-	stp	xzr, x0, [x29, 160]
-.LVL257:
-	.loc 1 269 0
-	stp	xzr, xzr, [x29, 176]
-.LVL258:
-	str	xzr, [x29, 192]
-	b	.L211
-.LVL259:
-.L155:
-	.loc 1 274 0
-	mov	w27, 1000
-	b	.L124
-.LVL260:
-.L156:
-	.loc 1 288 0
-	mov	w19, 2
-	b	.L128
-.LVL261:
-.L157:
-	.loc 1 292 0
-	mov	w19, 3
-	b	.L128
-.LVL262:
-.L158:
-	.loc 1 297 0
-	mov	w19, 4
-	b	.L128
-.LVL263:
-.L159:
-	mov	w2, 0
-	b	.L129
-.LVL264:
-.L160:
-	.loc 1 307 0
-	mov	w28, w0
-	mov	w2, 0
-	.loc 1 309 0
-	mov	w19, 2
-	b	.L129
-.LVL265:
-.L161:
-	.loc 1 312 0
-	mov	w28, w0
-	.loc 1 314 0
-	mov	w19, 3
-	b	.L129
-.LVL266:
-.L162:
-	mov	w2, w19
-.LVL267:
-.L212:
-	.loc 1 319 0
-	mov	w19, 4
-	b	.L129
-.L163:
-	.loc 1 325 0
-	mov	w2, -1
-	b	.L212
-.LVL268:
-.L209:
-.LBB58:
-.LBB56:
-	.loc 1 86 0
-	ldr	x4, [x29, 216]
-	.loc 1 87 0
-	mov	x1, 0
-	mov	w24, 0
-	.loc 1 88 0
-	mov	w6, 1
-	.loc 1 87 0
-	add	x5, x3, x4
-.LVL269:
-.L136:
-	.loc 1 86 0
-	ldr	x2, [x20, x1, lsl 3]
-	cmp	x4, x2
-	bcc	.L135
-	.loc 1 87 0
-	ldr	x7, [x21, x1, lsl 3]
-	add	x2, x2, x7
-	.loc 1 88 0
-	cmp	x5, x2
-	csel	w24, w24, w6, hi
-.LVL270:
-.L135:
-	add	x1, x1, 1
-.LVL271:
-	.loc 1 85 0
-	cmp	w0, w1
-	bhi	.L136
-	.loc 1 89 0
-	cbnz	w24, .L137
-	.loc 1 90 0
-	adrp	x0, .LC33
-	add	x0, x0, :lo12:.LC33
-	bl	printf
-.LVL272:
-.L138:
-.LBE56:
-.LBE58:
-	.loc 1 339 0
-	cbnz	w24, .L134
-	.loc 1 340 0
-	mov	w22, 1
-.LVL273:
-	b	.L97
-.LVL274:
-.L137:
-.LBB59:
-.LBB57:
-	.loc 1 92 0
-	str	x4, [x29, 136]
-	.loc 1 94 0
-	cmp	w0, 1
-	.loc 1 93 0
-	str	x3, [x29, 168]
-.LVL275:
-	.loc 1 94 0
-	beq	.L138
-	.loc 1 95 0
-	str	xzr, [x29, 144]
-	.loc 1 94 0
-	cmp	w0, 2
-	.loc 1 96 0
-	str	xzr, [x29, 176]
-.LVL276:
-	.loc 1 94 0
-	beq	.L138
-	.loc 1 95 0
-	str	xzr, [x29, 152]
-	.loc 1 94 0
-	cmp	w0, 4
-	.loc 1 96 0
-	str	xzr, [x29, 184]
-.LVL277:
-	.loc 1 94 0
-	bne	.L138
-	.loc 1 95 0
-	str	xzr, [x29, 160]
-	.loc 1 96 0
-	str	xzr, [x29, 192]
-.LVL278:
-	b	.L138
-.LVL279:
-.L149:
-.LBE57:
-.LBE59:
-	.loc 1 350 0
-	mov	x27, 0
-	.loc 1 348 0
-	add	w25, w25, 1
-.LVL280:
-	.loc 1 349 0
-	mov	w1, w25
-	mov	x0, x26
-	bl	printf
-.LVL281:
-.L141:
-	.loc 1 350 0 discriminator 1
-	cmp	w24, w27
-	bhi	.L147
-	mov	w0, 0
-	mov	w28, 0
-.LVL282:
-.L146:
-	.loc 1 376 0
-	orr	w0, w28, w0
-.LVL283:
-	cbnz	w0, .L131
-.LVL284:
-.L148:
-	.loc 1 347 0
-	ldr	x0, [x29, 208]
-	cbz	x0, .L149
-	.loc 1 347 0 is_stmt 0 discriminator 1
-	cmp	x0, x25, uxtw
-	bhi	.L149
-	b	.L114
-.LVL285:
-.L147:
-	.loc 1 357 0 is_stmt 1
-	ldr	x1, [x21, x27, lsl 3]
-	.loc 1 351 0
-	cmp	w23, 3
-	.loc 1 357 0
-	ldr	x0, [x20, x27, lsl 3]
-	.loc 1 351 0
-	beq	.L143
-	cmp	w23, 4
-	beq	.L144
-	.loc 1 353 0
-	bl	random_test
-.LVL286:
-.L213:
-	.loc 1 361 0
-	mov	w28, w0
-.LVL287:
-	.loc 1 369 0
-	bl	ctrlc
-.LVL288:
-	cbnz	w0, .L166
-	add	x27, x27, 1
-.LVL289:
-	mov	w19, w23
-	.loc 1 373 0
-	cbz	w28, .L141
-.LVL290:
-	mov	w19, w23
-.LVL291:
-	b	.L146
-.LVL292:
-.L143:
-	.loc 1 357 0
-	bl	crosstalk
-.LVL293:
-	b	.L213
-.L144:
-	.loc 1 361 0
-	bl	diagonalscan
-.LVL294:
-	b	.L213
-.LVL295:
-.L166:
-	mov	w19, w23
-	.loc 1 370 0
-	mov	w0, -1
-	b	.L146
-.LVL296:
-.L106:
-	.loc 1 220 0
+.L74:
+	.loc 2 132 0
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
-	ldrb	w0, [x0, w24, sxtw]
-	cmp	w22, w0
-	blt	.L150
-	sub	w22, w22, #2
-.LVL297:
-	.loc 1 220 0 is_stmt 0 discriminator 1
-	mov	x26, 0
-	lsl	x22, x22, 3
-.LVL298:
-.L109:
-	.loc 1 225 0 is_stmt 1 discriminator 1
-	cmp	x26, x22
-	bne	.L110
-	.loc 1 232 0
-	ldp	x2, x3, [x29, 200]
-	mov	w1, w23
-	ldp	x4, x5, [x29, 216]
-	adrp	x0, .LC28
-	ldr	x6, [x29, 232]
-	add	x0, x0, :lo12:.LC28
-	bl	printf
-.LVL299:
-	.loc 1 238 0
-	add	x2, x29, 128
+	ldrb	w0, [x0, w25, sxtw]
+	cmp	w23, w0
+	blt	.L112
+	sub	w23, w23, #2
+.LVL229:
+	.loc 2 132 0 is_stmt 0 discriminator 1
+	mov	x27, 0
+	lsl	x23, x23, 3
+.LVL230:
+.L77:
+	.loc 2 137 0 is_stmt 1 discriminator 1
+	cmp	x27, x23
+	bne	.L78
+	.loc 2 147 0
+	add	x2, x29, 112
 	mov	w1, 0
 	mov	w0, 53
 	bl	uclass_get_device
-.LVL300:
-	mov	w22, w0
-.LVL301:
-	.loc 1 239 0
-	cbz	w0, .L111
-	.loc 1 240 0
+.LVL231:
+	mov	w23, w0
+.LVL232:
+	.loc 2 148 0
+	cbz	w0, .L79
+	.loc 2 149 0
 	mov	w1, w0
-	adrp	x0, .LC29
-.LVL302:
-	add	x0, x0, :lo12:.LC29
+	adrp	x0, .LC21
+.LVL233:
+	add	x0, x0, :lo12:.LC21
 	bl	printf
-.LVL303:
-.L97:
-	.loc 1 387 0
-	mov	w0, w22
+.LVL234:
+.L72:
+	.loc 2 308 0
+	mov	w0, w23
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 240
+	ldp	x29, x30, [sp], 224
 	.cfi_restore 30
 	.cfi_restore 29
 	.cfi_restore 27
@@ -2083,83 +1584,8 @@ do_ddr_test:
 	.cfi_def_cfa 31, 0
 	ret
 	.cfi_endproc
-.LFE258:
+.LFE256:
 	.size	do_ddr_test, .-do_ddr_test
-	.section	.text.print_memory,"ax",@progbits
-	.align	2
-	.global	print_memory
-	.type	print_memory, %function
-print_memory:
-.LFB278:
-	.loc 3 81 0
-	.cfi_startproc
-.LVL304:
-	stp	x29, x30, [sp, -48]!
-	.cfi_def_cfa_offset 48
-	.cfi_offset 29, -48
-	.cfi_offset 30, -40
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
-	mov	x20, x0
-.LVL305:
-	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -16
-	.cfi_offset 22, -8
-	.loc 3 86 0
-	adrp	x21, .LC38
-	.loc 3 85 0
-	lsr	x22, x1, 2
-	.loc 3 86 0
-	add	x21, x21, :lo12:.LC38
-	.loc 3 85 0
-	mov	w19, 0
-.LVL306:
-.L217:
-	.loc 3 85 0 is_stmt 0 discriminator 1
-	uxtw	x1, w19
-	cmp	x1, x22
-	bcc	.L218
-	.loc 3 89 0 is_stmt 1
-	ldp	x19, x20, [sp, 16]
-.LVL307:
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 48
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
-	ret
-.LVL308:
-.L218:
-	.cfi_restore_state
-	.loc 3 87 0 discriminator 3
-	add	w3, w19, 3
-	add	w2, w19, 2
-	add	w0, w19, 1
-	lsl	x1, x1, 2
-	.loc 3 85 0 discriminator 3
-	add	w19, w19, 4
-.LVL309:
-	.loc 3 86 0 discriminator 3
-	ldr	w5, [x20, x3, lsl 2]
-	ldr	w4, [x20, x2, lsl 2]
-	ldr	w3, [x20, x0, lsl 2]
-	mov	x0, x21
-	ldr	w2, [x20, x1]
-	add	x1, x20, x1
-	bl	printf
-.LVL310:
-	b	.L217
-	.cfi_endproc
-.LFE278:
-	.size	print_memory, .-print_memory
 	.global	_u_boot_list_2_cmd_2_ddr_test
 	.section	.rodata
 	.align	3
@@ -2173,54 +1599,45 @@ print_memory:
 	.word	267448335
 	.word	0
 	.word	-1
-	.section	.rodata.cmp_buf_data.str1.1,"aMS",@progbits,1
-.LC16:
-	.string	"test fail:address:0x%lx,read:0x%lx,reread:0x%lx,expect:0x%lx\n"
 	.section	.rodata.crosstalk.str1.1,"aMS",@progbits,1
-.LC17:
+.LC1:
 	.string	"\nbitflip:   \n"
-.LC18:
+.LC2:
 	.string	"\b\b\b%3u"
-.LC19:
+.LC3:
 	.string	"%3u\b\b\b"
-.LC20:
+.LC4:
 	.string	"\nISI:\n"
-.LC21:
+.LC5:
 	.string	"malloc %lu byte fail\n"
 	.section	.rodata.diagonalscan.str1.1,"aMS",@progbits,1
-.LC22:
+.LC6:
 	.string	"\nDiagonalScan\n"
+.LC7:
+	.string	"get page size fail:0x%x\n"
 	.section	.rodata.do_ddr_test.str1.1,"aMS",@progbits,1
-.LC23:
-	.string	"available memory for test:\n"
-.LC24:
-	.string	"\tstart\t\t end\tlength\n"
-.LC25:
-	.string	"\t0x%08lx - 0x%08lx 0x%08lx\n"
-.LC26:
+.LC18:
+	.string	"ddr tester version 1.0.1\n"
+.LC19:
 	.string	"test parameters error\n"
-.LC27:
+.LC20:
 	.string	"test pattern error\n"
-.LC28:
-	.string	"test pattern:%d, arg:0x%lx,0x%lx,0x%lx,0x%lx,0x%lx\n"
-.LC29:
+.LC21:
 	.string	"rockchip dmc probe fail: %d\n"
-.LC30:
-	.string	"fasttest need %uMB, but actually only %luMB\n"
-.LC31:
+.LC22:
 	.string	"\rtimes:%08u:\n"
-.LC32:
+.LC23:
 	.string	"loop:%d, start:0x%lx, len:0x%lx\n"
-.LC33:
-	.string	"Invalid test address\n"
-.LC34:
+.LC24:
 	.string	"\rtimes:%08u, "
-.LC35:
+.LC25:
 	.string	"\n%s test fail\n"
-.LC36:
+.LC26:
 	.string	"\ntest pass\n"
-.LC37:
+.LC27:
 	.string	"test pattern unsupported\n"
+.LC28:
+	.string	"fasttest need %uMB, but actually only %luMB\n"
 	.section	.rodata.g_isi_pattern,"a",@progbits
 	.align	3
 	.set	.LANCHOR0,. + 0
@@ -2259,49 +1676,34 @@ g_isi_pattern:
 	.word	0
 	.word	0
 	.word	0
-	.section	.rodata.print_memory.str1.1,"aMS",@progbits,1
-.LC38:
-	.string	"0x%08lx: 0x%08x, 0x%08x, 0x%08x, 0x%08x\n"
 	.section	.rodata.random_test.str1.1,"aMS",@progbits,1
-.LC5:
+.LC8:
 	.string	"%u"
-.LC6:
+.LC9:
 	.string	"\b"
-.LC7:
+.LC10:
 	.string	" "
-.LC8:
+.LC11:
 	.string	"\nrandom test1 fail:address:0x%lx,read:0x%x,reread:0x%x,expect:0x%x\n"
-.LC9:
+.LC12:
 	.string	"%4lu"
-.LC10:
+.LC13:
 	.string	"\b\b\b\b"
-.LC11:
+.LC14:
 	.string	"    "
-.LC12:
+.LC15:
 	.string	"\nrandom test2 fail:address:0x%lx,read:0x%lx,reread:0x%lx,expect:0x%lx\n"
 	.section	.rodata.scan_freq.str1.1,"aMS",@progbits,1
-.LC13:
+.LC16:
 	.string	"% d:change freq to %d Hz\n"
-.LC14:
-	.string	"\tchange freq success: %d Hz\n"
-.LC15:
+.LC17:
 	.string	"check data fail at %d Hz\n"
-	.section	.rodata.set_ddr_freq.str1.1,"aMS",@progbits,1
-.LC1:
-	.string	"current freq:%lu Hz\n"
-	.section	.rodata.set_vdd_logic.str1.1,"aMS",@progbits,1
-.LC2:
-	.string	"vdd_logic"
-.LC3:
-	.string	"Cannot set regulator name\n"
-.LC4:
-	.string	"set vdd_logic fail\n"
 	.section	.rodata.str1.1,"aMS",@progbits,1
-.LC39:
+.LC29:
 	.string	"ddr_test"
-.LC40:
+.LC30:
 	.string	"for dram simple test\n"
-.LC41:
+.LC31:
 	.ascii	"arg1: test pattern include:\n\tchangefreq\n\tscanfreq\n\tran"
 	.ascii	"dom\n\tcrosstalk\n\tdiagonalscan\n\tfast_test\n\tfull_test\n"
 	.ascii	"for changereq: arg2:freq(Hz),arg3[option]:volt\nfor scanfreq"
@@ -2324,19 +1726,19 @@ g_isi_pattern:
 	.ascii	"anfreq 200000000 786000000 100'\ndoing random test 10 times "
 	.ascii	"start from"
 	.string	" physical address 0x200000 and\nlength is 128MB, freq:786MHz, if freq=0 may keep current freq:\n\t 'ddr_test random 786000000 10 0x200000 0x8000000'\ndoing fast test for dram between 200MHz to 786MHz with 10 times:\n\t 'ddr_test fast_test 200000000 786000000 10'"
-.LC42:
+.LC32:
 	.string	"changefreq"
-.LC43:
+.LC33:
 	.string	"scanfreq"
-.LC44:
+.LC34:
 	.string	"random"
-.LC45:
+.LC35:
 	.string	"crosstalk"
-.LC46:
+.LC36:
 	.string	"diagonalscan"
-.LC47:
+.LC37:
 	.string	"fast_test"
-.LC48:
+.LC38:
 	.string	"full_test"
 	.section	.rodata.test_pat_param,"a",@progbits
 	.align	3
@@ -2357,44 +1759,45 @@ test_pat_param:
 	.type	test_pattern, %object
 	.size	test_pattern, 56
 test_pattern:
-	.xword	.LC42
-	.xword	.LC43
-	.xword	.LC44
-	.xword	.LC45
-	.xword	.LC46
-	.xword	.LC47
-	.xword	.LC48
+	.xword	.LC32
+	.xword	.LC33
+	.xword	.LC34
+	.xword	.LC35
+	.xword	.LC36
+	.xword	.LC37
+	.xword	.LC38
 	.section	.u_boot_list_2_cmd_2_ddr_test,"aw",@progbits
 	.align	2
 	.type	_u_boot_list_2_cmd_2_ddr_test, %object
 	.size	_u_boot_list_2_cmd_2_ddr_test, 48
 _u_boot_list_2_cmd_2_ddr_test:
-	.8byte	.LC39
+	.8byte	.LC29
 	.word	7
 	.word	1
 	.8byte	do_ddr_test
-	.8byte	.LC40
-	.8byte	.LC41
+	.8byte	.LC30
+	.8byte	.LC31
 	.8byte	0
 	.text
 .Letext0:
-	.file 6 "include/common.h"
-	.file 7 "./arch/arm/include/asm/types.h"
-	.file 8 "include/linux/types.h"
-	.file 9 "include/errno.h"
-	.file 10 "include/linux/string.h"
-	.file 11 "include/efi.h"
-	.file 12 "include/dm/device.h"
-	.file 13 "include/ide.h"
-	.file 14 "include/linux/list.h"
-	.file 15 "include/part.h"
-	.file 16 "include/flash.h"
-	.file 17 "include/lmb.h"
-	.file 18 "include/asm-generic/u-boot.h"
-	.file 19 "./arch/arm/include/asm/u-boot-arm.h"
-	.file 20 "include/command.h"
-	.file 21 "include/../scripts/dtc/libfdt/fdt.h"
-	.file 22 "include/libfdt_env.h"
+	.file 5 "include/common.h"
+	.file 6 "./arch/arm/include/asm/types.h"
+	.file 7 "include/linux/types.h"
+	.file 8 "include/errno.h"
+	.file 9 "include/linux/string.h"
+	.file 10 "include/efi.h"
+	.file 11 "include/dm/device.h"
+	.file 12 "include/ide.h"
+	.file 13 "include/linux/list.h"
+	.file 14 "include/part.h"
+	.file 15 "include/flash.h"
+	.file 16 "include/lmb.h"
+	.file 17 "include/asm-generic/u-boot.h"
+	.file 18 "./arch/arm/include/asm/u-boot-arm.h"
+	.file 19 "include/command.h"
+	.file 20 "include/linux/libfdt_env.h"
+	.file 21 "include/linux/../../scripts/dtc/libfdt/fdt.h"
+	.file 22 "include/linux/libfdt.h"
 	.file 23 "include/image.h"
 	.file 24 "include/dm/uclass-id.h"
 	.file 25 "./arch/arm/include/asm/global_data.h"
@@ -2410,27 +1813,27 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.file 35 "include/iomux.h"
 	.file 36 "include/log.h"
 	.file 37 "include/stdio.h"
-	.file 38 "include/vsprintf.h"
-	.file 39 "include/power/regulator.h"
-	.file 40 "include/linux/delay.h"
-	.file 41 "./arch/arm/include/asm/arch/rockchip_dmc.h"
+	.file 38 "./arch/arm/include/asm/arch/sdram_common.h"
+	.file 39 "cmd/ddr_tool/../memtester/io_map.h"
+	.file 40 "cmd/ddr_tool/../memtester/ddr_tester_common.h"
+	.file 41 "include/vsprintf.h"
 	.section	.debug_info,"",@progbits
 .Ldebug_info0:
-	.4byte	0x2c16
+	.4byte	0x27ad
 	.2byte	0x4
 	.4byte	.Ldebug_abbrev0
 	.byte	0x8
 	.uleb128 0x1
-	.4byte	.LASF486
+	.4byte	.LASF478
 	.byte	0xc
-	.4byte	.LASF487
-	.4byte	.LASF488
-	.4byte	.Ldebug_ranges0+0x190
+	.4byte	.LASF479
+	.4byte	.LASF480
+	.4byte	.Ldebug_ranges0+0x90
 	.8byte	0
 	.4byte	.Ldebug_line0
 	.uleb128 0x2
 	.4byte	.LASF4
-	.byte	0x6
+	.byte	0x5
 	.byte	0xd
 	.4byte	0x34
 	.uleb128 0x3
@@ -2449,7 +1852,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF2
 	.uleb128 0x5
 	.4byte	.LASF21
-	.byte	0x9
+	.byte	0x8
 	.byte	0xc
 	.4byte	0x59
 	.uleb128 0x6
@@ -2462,7 +1865,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF3
 	.uleb128 0x2
 	.4byte	.LASF5
-	.byte	0x7
+	.byte	0x6
 	.byte	0xc
 	.4byte	0x34
 	.uleb128 0x3
@@ -2471,7 +1874,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF6
 	.uleb128 0x2
 	.4byte	.LASF7
-	.byte	0x7
+	.byte	0x6
 	.byte	0x12
 	.4byte	0x84
 	.uleb128 0x3
@@ -2488,26 +1891,26 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF10
 	.uleb128 0x7
 	.string	"u8"
-	.byte	0x7
+	.byte	0x6
 	.byte	0x1f
 	.4byte	0x34
 	.uleb128 0x8
 	.4byte	0x99
 	.uleb128 0x7
 	.string	"u32"
-	.byte	0x7
+	.byte	0x6
 	.byte	0x25
 	.4byte	0x84
 	.uleb128 0x4
 	.4byte	0xa8
 	.uleb128 0x2
 	.4byte	.LASF11
-	.byte	0x7
+	.byte	0x6
 	.byte	0x31
 	.4byte	0x92
 	.uleb128 0x2
 	.4byte	.LASF12
-	.byte	0x7
+	.byte	0x6
 	.byte	0x32
 	.4byte	0x92
 	.uleb128 0x3
@@ -2536,34 +1939,34 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0xf3
 	.uleb128 0x2
 	.4byte	.LASF16
-	.byte	0x8
+	.byte	0x7
 	.byte	0x59
 	.4byte	0x47
 	.uleb128 0x2
 	.4byte	.LASF17
-	.byte	0x8
+	.byte	0x7
 	.byte	0x5b
 	.4byte	0x3b
 	.uleb128 0x2
 	.4byte	.LASF18
-	.byte	0x8
+	.byte	0x7
 	.byte	0x69
 	.4byte	0x67
 	.uleb128 0x2
 	.4byte	.LASF19
-	.byte	0x8
+	.byte	0x7
 	.byte	0x6b
 	.4byte	0x79
 	.uleb128 0x2
 	.4byte	.LASF20
-	.byte	0x8
+	.byte	0x7
 	.byte	0x97
 	.4byte	0x79
 	.uleb128 0xa
 	.byte	0x8
 	.uleb128 0x5
 	.4byte	.LASF22
-	.byte	0xa
+	.byte	0x9
 	.byte	0xb
 	.4byte	0xf3
 	.uleb128 0x3
@@ -2577,130 +1980,130 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0xd
 	.4byte	.LASF24
-	.byte	0xb
+	.byte	0xa
 	.2byte	0x140
 	.4byte	0x149
 	.uleb128 0xd
 	.4byte	.LASF25
-	.byte	0xb
+	.byte	0xa
 	.2byte	0x143
 	.4byte	0x149
 	.uleb128 0xd
 	.4byte	.LASF26
-	.byte	0xb
+	.byte	0xa
 	.2byte	0x143
 	.4byte	0x149
 	.uleb128 0xe
 	.4byte	.LASF45
 	.byte	0xa0
-	.byte	0xc
+	.byte	0xb
 	.byte	0x80
 	.4byte	0x25d
 	.uleb128 0xf
 	.4byte	.LASF27
-	.byte	0xc
+	.byte	0xb
 	.byte	0x81
-	.4byte	0x1505
+	.4byte	0x1517
 	.byte	0
 	.uleb128 0xf
 	.4byte	.LASF28
-	.byte	0xc
+	.byte	0xb
 	.byte	0x82
 	.4byte	0xd5
 	.byte	0x8
 	.uleb128 0xf
 	.4byte	.LASF29
-	.byte	0xc
+	.byte	0xb
 	.byte	0x83
 	.4byte	0x135
 	.byte	0x10
 	.uleb128 0xf
 	.4byte	.LASF30
-	.byte	0xc
+	.byte	0xb
 	.byte	0x84
 	.4byte	0x135
 	.byte	0x18
 	.uleb128 0xf
 	.4byte	.LASF31
-	.byte	0xc
+	.byte	0xb
 	.byte	0x85
 	.4byte	0x135
 	.byte	0x20
 	.uleb128 0xf
 	.4byte	.LASF32
-	.byte	0xc
+	.byte	0xb
 	.byte	0x86
-	.4byte	0x14d0
+	.4byte	0x14e2
 	.byte	0x28
 	.uleb128 0xf
 	.4byte	.LASF33
-	.byte	0xc
+	.byte	0xb
 	.byte	0x87
 	.4byte	0x109
 	.byte	0x30
 	.uleb128 0xf
 	.4byte	.LASF34
-	.byte	0xc
+	.byte	0xb
 	.byte	0x88
 	.4byte	0x25d
 	.byte	0x38
 	.uleb128 0xf
 	.4byte	.LASF35
-	.byte	0xc
+	.byte	0xb
 	.byte	0x89
 	.4byte	0x135
 	.byte	0x40
 	.uleb128 0xf
 	.4byte	.LASF36
-	.byte	0xc
+	.byte	0xb
 	.byte	0x8a
-	.4byte	0x1548
+	.4byte	0x155a
 	.byte	0x48
 	.uleb128 0xf
 	.4byte	.LASF37
-	.byte	0xc
+	.byte	0xb
 	.byte	0x8b
 	.4byte	0x135
 	.byte	0x50
 	.uleb128 0xf
 	.4byte	.LASF38
-	.byte	0xc
+	.byte	0xb
 	.byte	0x8c
 	.4byte	0x135
 	.byte	0x58
 	.uleb128 0xf
 	.4byte	.LASF39
-	.byte	0xc
+	.byte	0xb
 	.byte	0x8d
 	.4byte	0x290
 	.byte	0x60
 	.uleb128 0xf
 	.4byte	.LASF40
-	.byte	0xc
+	.byte	0xb
 	.byte	0x8e
 	.4byte	0x290
 	.byte	0x70
 	.uleb128 0xf
 	.4byte	.LASF41
-	.byte	0xc
+	.byte	0xb
 	.byte	0x8f
 	.4byte	0x290
 	.byte	0x80
 	.uleb128 0xf
 	.4byte	.LASF42
-	.byte	0xc
+	.byte	0xb
 	.byte	0x90
 	.4byte	0x11f
 	.byte	0x90
 	.uleb128 0xf
 	.4byte	.LASF43
-	.byte	0xc
+	.byte	0xb
 	.byte	0x91
 	.4byte	0x59
 	.byte	0x94
 	.uleb128 0x10
 	.string	"seq"
-	.byte	0xc
+	.byte	0xb
 	.byte	0x92
 	.4byte	0x59
 	.byte	0x98
@@ -2719,7 +2122,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0x5
 	.4byte	.LASF44
-	.byte	0xd
+	.byte	0xc
 	.byte	0x10
 	.4byte	0x26a
 	.uleb128 0xb
@@ -2732,18 +2135,18 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xe
 	.4byte	.LASF46
 	.byte	0x10
-	.byte	0xe
+	.byte	0xd
 	.byte	0x16
 	.4byte	0x2b5
 	.uleb128 0xf
 	.4byte	.LASF47
-	.byte	0xe
+	.byte	0xd
 	.byte	0x17
 	.4byte	0x2b5
 	.byte	0
 	.uleb128 0xf
 	.4byte	.LASF48
-	.byte	0xe
+	.byte	0xd
 	.byte	0x17
 	.4byte	0x2b5
 	.byte	0x8
@@ -2754,18 +2157,18 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xe
 	.4byte	.LASF49
 	.byte	0x10
-	.byte	0xf
+	.byte	0xe
 	.byte	0xf
 	.4byte	0x2e0
 	.uleb128 0xf
 	.4byte	.LASF28
-	.byte	0xf
+	.byte	0xe
 	.byte	0x10
 	.4byte	0xf3
 	.byte	0
 	.uleb128 0xf
 	.4byte	.LASF50
-	.byte	0xf
+	.byte	0xe
 	.byte	0x11
 	.4byte	0x2f9
 	.byte	0x8
@@ -2792,41 +2195,41 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0x2ff
 	.uleb128 0x5
 	.4byte	.LASF49
-	.byte	0xf
+	.byte	0xe
 	.byte	0xce
 	.4byte	0x30a
 	.uleb128 0x15
 	.2byte	0x1218
-	.byte	0x10
+	.byte	0xf
 	.byte	0x13
 	.4byte	0x361
 	.uleb128 0xf
 	.4byte	.LASF51
-	.byte	0x10
+	.byte	0xf
 	.byte	0x14
 	.4byte	0x109
 	.byte	0
 	.uleb128 0xf
 	.4byte	.LASF52
-	.byte	0x10
+	.byte	0xf
 	.byte	0x15
 	.4byte	0xfe
 	.byte	0x8
 	.uleb128 0xf
 	.4byte	.LASF53
-	.byte	0x10
+	.byte	0xf
 	.byte	0x16
 	.4byte	0x109
 	.byte	0x10
 	.uleb128 0xf
 	.4byte	.LASF54
-	.byte	0x10
+	.byte	0xf
 	.byte	0x17
 	.4byte	0x361
 	.byte	0x18
 	.uleb128 0x16
 	.4byte	.LASF55
-	.byte	0x10
+	.byte	0xf
 	.byte	0x18
 	.4byte	0x372
 	.2byte	0x1018
@@ -2847,7 +2250,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0x2
 	.4byte	.LASF56
-	.byte	0x10
+	.byte	0xf
 	.byte	0x32
 	.4byte	0x31a
 	.uleb128 0xb
@@ -2857,7 +2260,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0x5
 	.4byte	.LASF57
-	.byte	0x10
+	.byte	0xf
 	.byte	0x34
 	.4byte	0x38e
 	.uleb128 0x3
@@ -2867,18 +2270,18 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xe
 	.4byte	.LASF59
 	.byte	0x10
-	.byte	0x11
+	.byte	0x10
 	.byte	0x10
 	.4byte	0x3d0
 	.uleb128 0xf
 	.4byte	.LASF60
-	.byte	0x11
+	.byte	0x10
 	.byte	0x11
 	.4byte	0xb8
 	.byte	0
 	.uleb128 0xf
 	.4byte	.LASF51
-	.byte	0x11
+	.byte	0x10
 	.byte	0x12
 	.4byte	0xc3
 	.byte	0x8
@@ -2886,24 +2289,24 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xe
 	.4byte	.LASF61
 	.byte	0xa0
-	.byte	0x11
+	.byte	0x10
 	.byte	0x15
 	.4byte	0x401
 	.uleb128 0x10
 	.string	"cnt"
-	.byte	0x11
+	.byte	0x10
 	.byte	0x16
 	.4byte	0x3b
 	.byte	0
 	.uleb128 0xf
 	.4byte	.LASF51
-	.byte	0x11
+	.byte	0x10
 	.byte	0x17
 	.4byte	0xc3
 	.byte	0x8
 	.uleb128 0xf
 	.4byte	.LASF62
-	.byte	0x11
+	.byte	0x10
 	.byte	0x18
 	.4byte	0x401
 	.byte	0x10
@@ -2918,41 +2321,41 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x18
 	.string	"lmb"
 	.2byte	0x140
-	.byte	0x11
+	.byte	0x10
 	.byte	0x1b
 	.4byte	0x437
 	.uleb128 0xf
 	.4byte	.LASF63
-	.byte	0x11
+	.byte	0x10
 	.byte	0x1c
 	.4byte	0x3d0
 	.byte	0
 	.uleb128 0xf
 	.4byte	.LASF64
-	.byte	0x11
+	.byte	0x10
 	.byte	0x1d
 	.4byte	0x3d0
 	.byte	0xa0
 	.byte	0
 	.uleb128 0x19
 	.string	"lmb"
-	.byte	0x11
+	.byte	0x10
 	.byte	0x20
 	.4byte	0x411
 	.uleb128 0x1a
 	.byte	0x10
-	.byte	0x12
+	.byte	0x11
 	.byte	0x5a
 	.4byte	0x463
 	.uleb128 0xf
 	.4byte	.LASF54
-	.byte	0x12
+	.byte	0x11
 	.byte	0x5b
 	.4byte	0xb8
 	.byte	0
 	.uleb128 0xf
 	.4byte	.LASF51
-	.byte	0x12
+	.byte	0x11
 	.byte	0x5c
 	.4byte	0xc3
 	.byte	0x8
@@ -2960,120 +2363,120 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xe
 	.4byte	.LASF65
 	.byte	0xc8
-	.byte	0x12
+	.byte	0x11
 	.byte	0x1b
 	.4byte	0x554
 	.uleb128 0xf
 	.4byte	.LASF66
-	.byte	0x12
+	.byte	0x11
 	.byte	0x1c
 	.4byte	0x3b
 	.byte	0
 	.uleb128 0xf
 	.4byte	.LASF67
-	.byte	0x12
+	.byte	0x11
 	.byte	0x1d
 	.4byte	0xc3
 	.byte	0x8
 	.uleb128 0xf
 	.4byte	.LASF68
-	.byte	0x12
+	.byte	0x11
 	.byte	0x1e
 	.4byte	0x3b
 	.byte	0x10
 	.uleb128 0xf
 	.4byte	.LASF69
-	.byte	0x12
+	.byte	0x11
 	.byte	0x1f
 	.4byte	0x3b
 	.byte	0x18
 	.uleb128 0xf
 	.4byte	.LASF70
-	.byte	0x12
+	.byte	0x11
 	.byte	0x20
 	.4byte	0x3b
 	.byte	0x20
 	.uleb128 0xf
 	.4byte	.LASF71
-	.byte	0x12
+	.byte	0x11
 	.byte	0x21
 	.4byte	0x3b
 	.byte	0x28
 	.uleb128 0xf
 	.4byte	.LASF72
-	.byte	0x12
+	.byte	0x11
 	.byte	0x22
 	.4byte	0x3b
 	.byte	0x30
 	.uleb128 0xf
 	.4byte	.LASF73
-	.byte	0x12
+	.byte	0x11
 	.byte	0x24
 	.4byte	0x3b
 	.byte	0x38
 	.uleb128 0xf
 	.4byte	.LASF74
-	.byte	0x12
+	.byte	0x11
 	.byte	0x25
 	.4byte	0x3b
 	.byte	0x40
 	.uleb128 0xf
 	.4byte	.LASF75
-	.byte	0x12
+	.byte	0x11
 	.byte	0x26
 	.4byte	0x3b
 	.byte	0x48
 	.uleb128 0xf
 	.4byte	.LASF76
-	.byte	0x12
+	.byte	0x11
 	.byte	0x31
 	.4byte	0x3b
 	.byte	0x50
 	.uleb128 0xf
 	.4byte	.LASF77
-	.byte	0x12
+	.byte	0x11
 	.byte	0x32
 	.4byte	0x3b
 	.byte	0x58
 	.uleb128 0xf
 	.4byte	.LASF78
-	.byte	0x12
+	.byte	0x11
 	.byte	0x33
 	.4byte	0x280
 	.byte	0x60
 	.uleb128 0xf
 	.4byte	.LASF79
-	.byte	0x12
+	.byte	0x11
 	.byte	0x34
 	.4byte	0x47
 	.byte	0x66
 	.uleb128 0xf
 	.4byte	.LASF80
-	.byte	0x12
+	.byte	0x11
 	.byte	0x35
 	.4byte	0x3b
 	.byte	0x68
 	.uleb128 0xf
 	.4byte	.LASF81
-	.byte	0x12
+	.byte	0x11
 	.byte	0x36
 	.4byte	0x3b
 	.byte	0x70
 	.uleb128 0xf
 	.4byte	.LASF82
-	.byte	0x12
+	.byte	0x11
 	.byte	0x57
 	.4byte	0x109
 	.byte	0x78
 	.uleb128 0xf
 	.4byte	.LASF83
-	.byte	0x12
+	.byte	0x11
 	.byte	0x58
 	.4byte	0x109
 	.byte	0x80
 	.uleb128 0xf
 	.4byte	.LASF84
-	.byte	0x12
+	.byte	0x11
 	.byte	0x5d
 	.4byte	0x554
 	.byte	0x88
@@ -3087,89 +2490,89 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0x2
 	.4byte	.LASF85
-	.byte	0x12
+	.byte	0x11
 	.byte	0x5f
 	.4byte	0x463
 	.uleb128 0x5
 	.4byte	.LASF86
-	.byte	0x13
+	.byte	0x12
 	.byte	0x13
 	.4byte	0x109
 	.uleb128 0x5
 	.4byte	.LASF87
-	.byte	0x13
+	.byte	0x12
 	.byte	0x14
 	.4byte	0x109
 	.uleb128 0x5
 	.4byte	.LASF88
-	.byte	0x13
+	.byte	0x12
 	.byte	0x15
 	.4byte	0x109
 	.uleb128 0x5
 	.4byte	.LASF89
-	.byte	0x13
+	.byte	0x12
 	.byte	0x16
 	.4byte	0x109
 	.uleb128 0x5
 	.4byte	.LASF90
-	.byte	0x13
+	.byte	0x12
 	.byte	0x17
 	.4byte	0x109
 	.uleb128 0x5
 	.4byte	.LASF91
-	.byte	0x13
+	.byte	0x12
 	.byte	0x18
 	.4byte	0x109
 	.uleb128 0x5
 	.4byte	.LASF92
-	.byte	0x13
+	.byte	0x12
 	.byte	0x19
 	.4byte	0x109
 	.uleb128 0xe
 	.4byte	.LASF93
 	.byte	0x30
-	.byte	0x14
+	.byte	0x13
 	.byte	0x1e
 	.4byte	0x61d
 	.uleb128 0xf
 	.4byte	.LASF28
-	.byte	0x14
+	.byte	0x13
 	.byte	0x1f
 	.4byte	0xf3
 	.byte	0
 	.uleb128 0xf
 	.4byte	.LASF94
-	.byte	0x14
+	.byte	0x13
 	.byte	0x20
 	.4byte	0x59
 	.byte	0x8
 	.uleb128 0xf
 	.4byte	.LASF95
-	.byte	0x14
+	.byte	0x13
 	.byte	0x21
 	.4byte	0x59
 	.byte	0xc
 	.uleb128 0x10
 	.string	"cmd"
-	.byte	0x14
+	.byte	0x13
 	.byte	0x23
 	.4byte	0x647
 	.byte	0x10
 	.uleb128 0xf
 	.4byte	.LASF96
-	.byte	0x14
+	.byte	0x13
 	.byte	0x24
 	.4byte	0xf3
 	.byte	0x18
 	.uleb128 0xf
 	.4byte	.LASF97
-	.byte	0x14
+	.byte	0x13
 	.byte	0x26
 	.4byte	0xf3
 	.byte	0x20
 	.uleb128 0xf
 	.4byte	.LASF98
-	.byte	0x14
+	.byte	0x13
 	.byte	0x2a
 	.4byte	0x676
 	.byte	0x28
@@ -3217,14 +2620,14 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0x64d
 	.uleb128 0x2
 	.4byte	.LASF99
-	.byte	0x14
+	.byte	0x13
 	.byte	0x2e
 	.4byte	0x5bc
 	.uleb128 0x1b
 	.4byte	.LASF167
 	.byte	0x4
 	.4byte	0x59
-	.byte	0x14
+	.byte	0x13
 	.byte	0x7a
 	.4byte	0x6aa
 	.uleb128 0x1c
@@ -3237,92 +2640,92 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF102
 	.sleb128 -1
 	.byte	0
-	.uleb128 0xe
+	.uleb128 0x2
 	.4byte	.LASF103
+	.byte	0x14
+	.byte	0x11
+	.4byte	0x12a
+	.uleb128 0xe
+	.4byte	.LASF104
 	.byte	0x28
 	.byte	0x15
 	.byte	0x39
-	.4byte	0x72f
+	.4byte	0x73a
 	.uleb128 0xf
-	.4byte	.LASF104
+	.4byte	.LASF105
 	.byte	0x15
 	.byte	0x3a
-	.4byte	0x740
+	.4byte	0x6aa
 	.byte	0
 	.uleb128 0xf
-	.4byte	.LASF105
+	.4byte	.LASF106
 	.byte	0x15
 	.byte	0x3b
-	.4byte	0x740
+	.4byte	0x6aa
 	.byte	0x4
 	.uleb128 0xf
-	.4byte	.LASF106
+	.4byte	.LASF107
 	.byte	0x15
 	.byte	0x3c
-	.4byte	0x740
+	.4byte	0x6aa
 	.byte	0x8
 	.uleb128 0xf
-	.4byte	.LASF107
+	.4byte	.LASF108
 	.byte	0x15
 	.byte	0x3d
-	.4byte	0x740
+	.4byte	0x6aa
 	.byte	0xc
 	.uleb128 0xf
-	.4byte	.LASF108
+	.4byte	.LASF109
 	.byte	0x15
 	.byte	0x3e
-	.4byte	0x740
+	.4byte	0x6aa
 	.byte	0x10
 	.uleb128 0xf
-	.4byte	.LASF109
+	.4byte	.LASF110
 	.byte	0x15
 	.byte	0x3f
-	.4byte	0x740
+	.4byte	0x6aa
 	.byte	0x14
 	.uleb128 0xf
-	.4byte	.LASF110
+	.4byte	.LASF111
 	.byte	0x15
 	.byte	0x40
-	.4byte	0x740
+	.4byte	0x6aa
 	.byte	0x18
 	.uleb128 0xf
-	.4byte	.LASF111
+	.4byte	.LASF112
 	.byte	0x15
 	.byte	0x43
-	.4byte	0x740
+	.4byte	0x6aa
 	.byte	0x1c
 	.uleb128 0xf
-	.4byte	.LASF112
+	.4byte	.LASF113
 	.byte	0x15
 	.byte	0x46
-	.4byte	0x740
+	.4byte	0x6aa
 	.byte	0x20
 	.uleb128 0xf
-	.4byte	.LASF113
+	.4byte	.LASF114
 	.byte	0x15
 	.byte	0x49
-	.4byte	0x740
+	.4byte	0x6aa
 	.byte	0x24
 	.byte	0
-	.uleb128 0x5
-	.4byte	.LASF114
+	.uleb128 0xd
+	.4byte	.LASF115
 	.byte	0x16
-	.byte	0xf
-	.4byte	0x73a
+	.2byte	0x136
+	.4byte	0x746
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x6aa
-	.uleb128 0x2
-	.4byte	.LASF115
-	.byte	0x16
-	.byte	0x12
-	.4byte	0x12a
+	.4byte	0x6b5
 	.uleb128 0x1e
 	.4byte	.LASF116
 	.byte	0x40
 	.byte	0x17
 	.2byte	0x134
-	.4byte	0x7f5
+	.4byte	0x7f6
 	.uleb128 0x1f
 	.4byte	.LASF117
 	.byte	0x17
@@ -3393,12 +2796,12 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF128
 	.byte	0x17
 	.2byte	0x140
-	.4byte	0x7f5
+	.4byte	0x7f6
 	.byte	0x20
 	.byte	0
 	.uleb128 0xb
 	.4byte	0x114
-	.4byte	0x805
+	.4byte	0x806
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x1f
@@ -3407,13 +2810,13 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF129
 	.byte	0x17
 	.2byte	0x141
-	.4byte	0x74b
+	.4byte	0x74c
 	.uleb128 0x1e
 	.4byte	.LASF130
 	.byte	0x30
 	.byte	0x17
 	.2byte	0x143
-	.4byte	0x893
+	.4byte	0x894
 	.uleb128 0x1f
 	.4byte	.LASF54
 	.byte	0x17
@@ -3473,24 +2876,24 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF137
 	.byte	0x17
 	.2byte	0x149
-	.4byte	0x811
+	.4byte	0x812
 	.uleb128 0x22
 	.4byte	.LASF138
 	.2byte	0x280
 	.byte	0x17
 	.2byte	0x14f
-	.4byte	0xa3c
+	.4byte	0xa3d
 	.uleb128 0x1f
 	.4byte	.LASF139
 	.byte	0x17
 	.2byte	0x155
-	.4byte	0xa3c
+	.4byte	0xa3d
 	.byte	0
 	.uleb128 0x1f
 	.4byte	.LASF140
 	.byte	0x17
 	.2byte	0x156
-	.4byte	0x805
+	.4byte	0x806
 	.byte	0x8
 	.uleb128 0x1f
 	.4byte	.LASF141
@@ -3580,7 +2983,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.string	"os"
 	.byte	0x17
 	.2byte	0x16e
-	.4byte	0x893
+	.4byte	0x894
 	.byte	0xb8
 	.uleb128 0x21
 	.string	"ep"
@@ -3640,7 +3043,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.string	"kbd"
 	.byte	0x17
 	.2byte	0x17a
-	.4byte	0xa42
+	.4byte	0xa43
 	.2byte	0x130
 	.uleb128 0x23
 	.4byte	.LASF163
@@ -3663,7 +3066,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x805
+	.4byte	0x806
 	.uleb128 0x9
 	.byte	0x8
 	.4byte	0x564
@@ -3671,19 +3074,19 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF165
 	.byte	0x17
 	.2byte	0x18f
-	.4byte	0x89f
+	.4byte	0x8a0
 	.uleb128 0xd
 	.4byte	.LASF166
 	.byte	0x17
 	.2byte	0x191
-	.4byte	0xa48
+	.4byte	0xa49
 	.uleb128 0x1b
 	.4byte	.LASF168
 	.byte	0x4
 	.4byte	0x59
 	.byte	0x18
 	.byte	0xe
-	.4byte	0xc75
+	.4byte	0xc7c
 	.uleb128 0x1c
 	.4byte	.LASF169
 	.byte	0
@@ -3939,8 +3342,11 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x1c
 	.4byte	.LASF253
 	.byte	0x54
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF254
+	.byte	0x55
+	.uleb128 0x1d
+	.4byte	.LASF255
 	.sleb128 -1
 	.byte	0
 	.uleb128 0x25
@@ -3948,19 +3354,19 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0x84
 	.byte	0x24
 	.byte	0xe0
-	.4byte	0xc88
+	.4byte	0xc8f
 	.uleb128 0x1c
-	.4byte	.LASF255
+	.4byte	.LASF256
 	.byte	0x5
 	.byte	0
 	.uleb128 0xe
-	.4byte	.LASF256
+	.4byte	.LASF257
 	.byte	0x40
 	.byte	0x19
 	.byte	0xc
-	.4byte	0xd01
+	.4byte	0xd08
 	.uleb128 0xf
-	.4byte	.LASF257
+	.4byte	.LASF258
 	.byte	0x19
 	.byte	0x22
 	.4byte	0x3b
@@ -3978,50 +3384,50 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0x84
 	.byte	0xc
 	.uleb128 0xf
-	.4byte	.LASF258
+	.4byte	.LASF259
 	.byte	0x19
 	.byte	0x25
 	.4byte	0x3b
 	.byte	0x10
 	.uleb128 0xf
-	.4byte	.LASF259
+	.4byte	.LASF260
 	.byte	0x19
 	.byte	0x26
 	.4byte	0x92
 	.byte	0x18
 	.uleb128 0xf
-	.4byte	.LASF260
+	.4byte	.LASF261
 	.byte	0x19
 	.byte	0x28
 	.4byte	0x3b
 	.byte	0x20
 	.uleb128 0xf
-	.4byte	.LASF261
+	.4byte	.LASF262
 	.byte	0x19
 	.byte	0x29
 	.4byte	0x3b
 	.byte	0x28
 	.uleb128 0xf
-	.4byte	.LASF262
+	.4byte	.LASF263
 	.byte	0x19
 	.byte	0x2b
 	.4byte	0x3b
 	.byte	0x30
 	.uleb128 0xf
-	.4byte	.LASF263
+	.4byte	.LASF264
 	.byte	0x19
 	.byte	0x2c
 	.4byte	0x3b
 	.byte	0x38
 	.byte	0
 	.uleb128 0xe
-	.4byte	.LASF264
+	.4byte	.LASF265
 	.byte	0x18
 	.byte	0x1a
 	.byte	0x22
-	.4byte	0xd3d
+	.4byte	0xd44
 	.uleb128 0xf
-	.4byte	.LASF265
+	.4byte	.LASF266
 	.byte	0x1a
 	.byte	0x23
 	.4byte	0xa8
@@ -4033,29 +3439,29 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0xa8
 	.byte	0x4
 	.uleb128 0xf
-	.4byte	.LASF266
+	.4byte	.LASF267
 	.byte	0x1a
 	.byte	0x25
 	.4byte	0xa8
 	.byte	0x8
 	.uleb128 0xf
-	.4byte	.LASF267
+	.4byte	.LASF268
 	.byte	0x1a
 	.byte	0x26
 	.4byte	0x109
 	.byte	0x10
 	.byte	0
 	.uleb128 0x26
-	.4byte	.LASF268
-	.2byte	0x198
+	.4byte	.LASF269
+	.2byte	0x1a0
 	.byte	0x1a
 	.byte	0x29
-	.4byte	0xf28
+	.4byte	0xf3c
 	.uleb128 0x10
 	.string	"bd"
 	.byte	0x1a
 	.byte	0x2a
-	.4byte	0xa42
+	.4byte	0xa43
 	.byte	0
 	.uleb128 0xf
 	.4byte	.LASF42
@@ -4064,193 +3470,193 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0x3b
 	.byte	0x8
 	.uleb128 0xf
-	.4byte	.LASF266
+	.4byte	.LASF267
 	.byte	0x1a
 	.byte	0x2c
 	.4byte	0x84
 	.byte	0x10
 	.uleb128 0xf
-	.4byte	.LASF269
+	.4byte	.LASF270
 	.byte	0x1a
 	.byte	0x2d
 	.4byte	0x3b
 	.byte	0x18
 	.uleb128 0xf
-	.4byte	.LASF270
+	.4byte	.LASF271
 	.byte	0x1a
 	.byte	0x2e
 	.4byte	0x3b
 	.byte	0x20
 	.uleb128 0xf
-	.4byte	.LASF271
+	.4byte	.LASF272
 	.byte	0x1a
 	.byte	0x30
 	.4byte	0x3b
 	.byte	0x28
 	.uleb128 0xf
-	.4byte	.LASF272
+	.4byte	.LASF273
 	.byte	0x1a
 	.byte	0x31
 	.4byte	0x3b
 	.byte	0x30
 	.uleb128 0xf
-	.4byte	.LASF273
+	.4byte	.LASF274
 	.byte	0x1a
 	.byte	0x33
 	.4byte	0x3b
 	.byte	0x38
 	.uleb128 0xf
-	.4byte	.LASF274
+	.4byte	.LASF275
 	.byte	0x1a
 	.byte	0x3d
 	.4byte	0x3b
 	.byte	0x40
 	.uleb128 0xf
-	.4byte	.LASF275
+	.4byte	.LASF276
 	.byte	0x1a
 	.byte	0x41
 	.4byte	0x3b
 	.byte	0x48
 	.uleb128 0xf
-	.4byte	.LASF276
+	.4byte	.LASF277
 	.byte	0x1a
 	.byte	0x42
 	.4byte	0x3b
 	.byte	0x50
 	.uleb128 0xf
-	.4byte	.LASF277
+	.4byte	.LASF278
 	.byte	0x1a
 	.byte	0x44
 	.4byte	0x3b
 	.byte	0x58
 	.uleb128 0xf
-	.4byte	.LASF278
+	.4byte	.LASF279
 	.byte	0x1a
 	.byte	0x45
 	.4byte	0x3b
 	.byte	0x60
 	.uleb128 0xf
-	.4byte	.LASF279
+	.4byte	.LASF280
 	.byte	0x1a
 	.byte	0x46
 	.4byte	0xc3
 	.byte	0x68
 	.uleb128 0xf
-	.4byte	.LASF280
+	.4byte	.LASF281
 	.byte	0x1a
 	.byte	0x47
 	.4byte	0x3b
 	.byte	0x70
 	.uleb128 0xf
-	.4byte	.LASF281
+	.4byte	.LASF282
 	.byte	0x1a
 	.byte	0x48
 	.4byte	0x3b
 	.byte	0x78
 	.uleb128 0xf
-	.4byte	.LASF282
+	.4byte	.LASF283
 	.byte	0x1a
 	.byte	0x49
 	.4byte	0x3b
 	.byte	0x80
 	.uleb128 0xf
-	.4byte	.LASF283
+	.4byte	.LASF284
 	.byte	0x1a
 	.byte	0x4a
 	.4byte	0x3b
 	.byte	0x88
 	.uleb128 0xf
-	.4byte	.LASF284
+	.4byte	.LASF285
 	.byte	0x1a
 	.byte	0x4b
-	.4byte	0xf28
+	.4byte	0xf3c
 	.byte	0x90
 	.uleb128 0xf
-	.4byte	.LASF285
+	.4byte	.LASF286
 	.byte	0x1a
 	.byte	0x4e
 	.4byte	0x25d
 	.byte	0x98
 	.uleb128 0xf
-	.4byte	.LASF286
+	.4byte	.LASF287
 	.byte	0x1a
 	.byte	0x4f
 	.4byte	0x25d
 	.byte	0xa0
 	.uleb128 0xf
-	.4byte	.LASF287
+	.4byte	.LASF288
 	.byte	0x1a
 	.byte	0x50
 	.4byte	0x290
 	.byte	0xa8
 	.uleb128 0xf
-	.4byte	.LASF288
+	.4byte	.LASF289
 	.byte	0x1a
 	.byte	0x56
 	.4byte	0x263
 	.byte	0xb8
 	.uleb128 0xf
-	.4byte	.LASF289
+	.4byte	.LASF290
 	.byte	0x1a
 	.byte	0x57
 	.4byte	0x135
 	.byte	0xc0
 	.uleb128 0xf
-	.4byte	.LASF290
+	.4byte	.LASF291
 	.byte	0x1a
 	.byte	0x58
 	.4byte	0x3b
 	.byte	0xc8
 	.uleb128 0xf
-	.4byte	.LASF291
+	.4byte	.LASF292
 	.byte	0x1a
 	.byte	0x5a
-	.4byte	0xfa0
+	.4byte	0xfb4
 	.byte	0xd0
 	.uleb128 0x10
 	.string	"jt"
 	.byte	0x1a
 	.byte	0x5c
-	.4byte	0xfab
+	.4byte	0xfbf
 	.byte	0xd8
 	.uleb128 0xf
-	.4byte	.LASF292
+	.4byte	.LASF293
 	.byte	0x1a
 	.byte	0x5d
-	.4byte	0xfb1
+	.4byte	0xfc5
 	.byte	0xe0
 	.uleb128 0x16
-	.4byte	.LASF293
+	.4byte	.LASF294
 	.byte	0x1a
 	.byte	0x67
 	.4byte	0x84
 	.2byte	0x100
 	.uleb128 0x16
-	.4byte	.LASF294
+	.4byte	.LASF295
 	.byte	0x1a
 	.byte	0x68
 	.4byte	0x84
 	.2byte	0x104
 	.uleb128 0x16
-	.4byte	.LASF295
+	.4byte	.LASF296
 	.byte	0x1a
 	.byte	0x6a
 	.4byte	0x3b
 	.2byte	0x108
 	.uleb128 0x16
-	.4byte	.LASF296
+	.4byte	.LASF297
 	.byte	0x1a
 	.byte	0x6b
 	.4byte	0x3b
 	.2byte	0x110
 	.uleb128 0x16
-	.4byte	.LASF297
+	.4byte	.LASF298
 	.byte	0x1a
 	.byte	0x6c
 	.4byte	0x3b
 	.2byte	0x118
 	.uleb128 0x16
-	.4byte	.LASF298
+	.4byte	.LASF299
 	.byte	0x1a
 	.byte	0x75
 	.4byte	0x25d
@@ -4259,42 +3665,48 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF136
 	.byte	0x1a
 	.byte	0x76
-	.4byte	0xc88
+	.4byte	0xc8f
 	.2byte	0x128
 	.uleb128 0x16
-	.4byte	.LASF299
+	.4byte	.LASF300
 	.byte	0x1a
 	.byte	0x7c
 	.4byte	0x109
 	.2byte	0x168
 	.uleb128 0x16
-	.4byte	.LASF300
+	.4byte	.LASF301
 	.byte	0x1a
 	.byte	0x7d
 	.4byte	0x109
 	.2byte	0x170
 	.uleb128 0x16
-	.4byte	.LASF301
+	.4byte	.LASF302
 	.byte	0x1a
 	.byte	0x83
 	.4byte	0xb8
 	.2byte	0x178
 	.uleb128 0x16
-	.4byte	.LASF302
+	.4byte	.LASF303
 	.byte	0x1a
 	.byte	0x88
-	.4byte	0xd01
+	.4byte	0xd08
 	.2byte	0x180
+	.uleb128 0x16
+	.4byte	.LASF304
+	.byte	0x1a
+	.byte	0x89
+	.4byte	0x109
+	.2byte	0x198
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0xd3d
+	.4byte	0xd44
 	.uleb128 0xe
-	.4byte	.LASF303
+	.4byte	.LASF305
 	.byte	0x40
 	.byte	0x1b
 	.byte	0x2c
-	.4byte	0xf9b
+	.4byte	0xfaf
 	.uleb128 0xf
 	.4byte	.LASF28
 	.byte	0x1b
@@ -4308,109 +3720,109 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0xd5
 	.byte	0x8
 	.uleb128 0xf
-	.4byte	.LASF304
+	.4byte	.LASF306
 	.byte	0x1b
 	.byte	0x2f
-	.4byte	0x1448
+	.4byte	0x145c
 	.byte	0x10
 	.uleb128 0xf
-	.4byte	.LASF305
+	.4byte	.LASF307
 	.byte	0x1b
 	.byte	0x30
 	.4byte	0xd5
 	.byte	0x18
 	.uleb128 0xf
-	.4byte	.LASF306
+	.4byte	.LASF308
 	.byte	0x1b
 	.byte	0x32
-	.4byte	0x1490
+	.4byte	0x14a4
 	.byte	0x20
 	.uleb128 0xf
 	.4byte	.LASF34
 	.byte	0x1b
 	.byte	0x33
-	.4byte	0xfa0
+	.4byte	0xfb4
 	.byte	0x28
 	.uleb128 0xf
-	.4byte	.LASF307
+	.4byte	.LASF309
 	.byte	0x1b
 	.byte	0x34
-	.4byte	0xfa0
+	.4byte	0xfb4
 	.byte	0x30
 	.uleb128 0xf
-	.4byte	.LASF308
+	.4byte	.LASF310
 	.byte	0x1b
 	.byte	0x35
-	.4byte	0xfa0
+	.4byte	0xfb4
 	.byte	0x38
 	.byte	0
 	.uleb128 0x8
-	.4byte	0xf2e
+	.4byte	0xf42
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0xf2e
+	.4byte	0xf42
 	.uleb128 0x27
-	.4byte	.LASF489
+	.4byte	.LASF481
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0xfa6
+	.4byte	0xfba
 	.uleb128 0xb
 	.4byte	0xe0
-	.4byte	0xfc1
+	.4byte	0xfd5
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x1f
 	.byte	0
 	.uleb128 0x2
-	.4byte	.LASF309
+	.4byte	.LASF311
 	.byte	0x1a
-	.byte	0x8e
-	.4byte	0xd3d
+	.byte	0x8f
+	.4byte	0xd44
 	.uleb128 0x4
-	.4byte	0xfc1
+	.4byte	0xfd5
 	.uleb128 0x5
-	.4byte	.LASF310
-	.byte	0x6
+	.4byte	.LASF312
+	.byte	0x5
 	.byte	0xab
 	.4byte	0x109
 	.uleb128 0xb
 	.4byte	0x99
-	.4byte	0xfe7
+	.4byte	0xffb
 	.uleb128 0xc
 	.byte	0
 	.uleb128 0x5
-	.4byte	.LASF311
-	.byte	0x6
+	.4byte	.LASF313
+	.byte	0x5
 	.byte	0xad
-	.4byte	0xfdc
+	.4byte	0xff0
 	.uleb128 0x5
-	.4byte	.LASF312
-	.byte	0x6
+	.4byte	.LASF314
+	.byte	0x5
 	.byte	0xae
-	.4byte	0xfdc
+	.4byte	0xff0
 	.uleb128 0x5
-	.4byte	.LASF313
-	.byte	0x6
+	.4byte	.LASF315
+	.byte	0x5
 	.byte	0xfc
 	.4byte	0x109
 	.uleb128 0x5
-	.4byte	.LASF314
-	.byte	0x6
+	.4byte	.LASF316
+	.byte	0x5
 	.byte	0xfd
 	.4byte	0x109
 	.uleb128 0x5
-	.4byte	.LASF315
-	.byte	0x6
+	.4byte	.LASF317
+	.byte	0x5
 	.byte	0xfe
 	.4byte	0x109
 	.uleb128 0xe
-	.4byte	.LASF316
+	.4byte	.LASF318
 	.byte	0x4
 	.byte	0x1c
 	.byte	0x2e
-	.4byte	0x1037
+	.4byte	0x104b
 	.uleb128 0xf
-	.4byte	.LASF317
+	.4byte	.LASF319
 	.byte	0x1c
 	.byte	0x2f
 	.4byte	0x12a
@@ -4420,25 +3832,25 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0x8
 	.4byte	0x29
 	.uleb128 0xe
-	.4byte	.LASF318
+	.4byte	.LASF320
 	.byte	0x68
 	.byte	0x1c
 	.byte	0xa6
-	.4byte	0x10da
+	.4byte	0x10ee
 	.uleb128 0xf
 	.4byte	.LASF28
 	.byte	0x1c
 	.byte	0xa8
-	.4byte	0x10da
+	.4byte	0x10ee
 	.byte	0
 	.uleb128 0xf
-	.4byte	.LASF319
+	.4byte	.LASF321
 	.byte	0x1c
 	.byte	0xa9
 	.4byte	0x280
 	.byte	0x10
 	.uleb128 0xf
-	.4byte	.LASF320
+	.4byte	.LASF322
 	.byte	0x1c
 	.byte	0xaa
 	.4byte	0xb8
@@ -4450,43 +3862,43 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0x59
 	.byte	0x20
 	.uleb128 0xf
-	.4byte	.LASF321
+	.4byte	.LASF323
 	.byte	0x1c
 	.byte	0xad
-	.4byte	0x1104
+	.4byte	0x1118
 	.byte	0x28
 	.uleb128 0xf
-	.4byte	.LASF322
+	.4byte	.LASF324
 	.byte	0x1c
 	.byte	0xae
-	.4byte	0x1123
+	.4byte	0x1137
 	.byte	0x30
 	.uleb128 0xf
-	.4byte	.LASF323
+	.4byte	.LASF325
 	.byte	0x1c
 	.byte	0xaf
-	.4byte	0x1138
+	.4byte	0x114c
 	.byte	0x38
 	.uleb128 0xf
-	.4byte	.LASF324
+	.4byte	.LASF326
 	.byte	0x1c
 	.byte	0xb0
-	.4byte	0x1149
+	.4byte	0x115d
 	.byte	0x40
 	.uleb128 0xf
-	.4byte	.LASF325
+	.4byte	.LASF327
 	.byte	0x1c
 	.byte	0xb4
-	.4byte	0x1138
+	.4byte	0x114c
 	.byte	0x48
 	.uleb128 0xf
 	.4byte	.LASF47
 	.byte	0x1c
 	.byte	0xb5
-	.4byte	0x10fe
+	.4byte	0x1112
 	.byte	0x50
 	.uleb128 0xf
-	.4byte	.LASF326
+	.4byte	.LASF328
 	.byte	0x1c
 	.byte	0xb6
 	.4byte	0x59
@@ -4500,30 +3912,30 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0xb
 	.4byte	0xe0
-	.4byte	0x10ea
+	.4byte	0x10fe
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0xf
 	.byte	0
 	.uleb128 0x13
 	.4byte	0x59
-	.4byte	0x10fe
+	.4byte	0x1112
 	.uleb128 0x14
-	.4byte	0x10fe
+	.4byte	0x1112
 	.uleb128 0x14
-	.4byte	0xa42
+	.4byte	0xa43
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x103d
+	.4byte	0x1051
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x10ea
+	.4byte	0x10fe
 	.uleb128 0x13
 	.4byte	0x59
-	.4byte	0x1123
+	.4byte	0x1137
 	.uleb128 0x14
-	.4byte	0x10fe
+	.4byte	0x1112
 	.uleb128 0x14
 	.4byte	0x135
 	.uleb128 0x14
@@ -4531,248 +3943,248 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x110a
+	.4byte	0x111e
 	.uleb128 0x13
 	.4byte	0x59
-	.4byte	0x1138
+	.4byte	0x114c
 	.uleb128 0x14
-	.4byte	0x10fe
+	.4byte	0x1112
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x1129
+	.4byte	0x113d
 	.uleb128 0x28
-	.4byte	0x1149
+	.4byte	0x115d
 	.uleb128 0x14
-	.4byte	0x10fe
+	.4byte	0x1112
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x113e
+	.4byte	0x1152
 	.uleb128 0x5
-	.4byte	.LASF327
+	.4byte	.LASF329
 	.byte	0x1c
 	.byte	0xbd
-	.4byte	0x10fe
+	.4byte	0x1112
 	.uleb128 0x28
-	.4byte	0x116a
+	.4byte	0x117e
 	.uleb128 0x14
 	.4byte	0x135
 	.uleb128 0x14
 	.4byte	0x59
 	.byte	0
 	.uleb128 0xd
-	.4byte	.LASF328
+	.4byte	.LASF330
 	.byte	0x1c
 	.2byte	0x11e
-	.4byte	0x1176
+	.4byte	0x118a
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x115a
+	.4byte	0x116e
 	.uleb128 0xb
 	.4byte	0x99
-	.4byte	0x118c
+	.4byte	0x11a0
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x5
 	.byte	0
 	.uleb128 0xd
-	.4byte	.LASF329
+	.4byte	.LASF331
 	.byte	0x1c
 	.2byte	0x1fd
-	.4byte	0x101e
+	.4byte	0x1032
 	.uleb128 0xd
-	.4byte	.LASF330
+	.4byte	.LASF332
 	.byte	0x1c
 	.2byte	0x1fe
-	.4byte	0x101e
+	.4byte	0x1032
 	.uleb128 0xd
-	.4byte	.LASF331
+	.4byte	.LASF333
 	.byte	0x1c
 	.2byte	0x200
-	.4byte	0x101e
+	.4byte	0x1032
 	.uleb128 0xd
-	.4byte	.LASF332
+	.4byte	.LASF334
 	.byte	0x1c
 	.2byte	0x205
-	.4byte	0xfb1
+	.4byte	0xfc5
 	.uleb128 0xd
-	.4byte	.LASF333
+	.4byte	.LASF335
 	.byte	0x1c
 	.2byte	0x206
-	.4byte	0xfb1
+	.4byte	0xfc5
 	.uleb128 0xb
 	.4byte	0xe0
-	.4byte	0x11d8
+	.4byte	0x11ec
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x3f
 	.byte	0
 	.uleb128 0xd
-	.4byte	.LASF334
+	.4byte	.LASF336
 	.byte	0x1c
 	.2byte	0x207
-	.4byte	0x11c8
+	.4byte	0x11dc
 	.uleb128 0xd
-	.4byte	.LASF335
+	.4byte	.LASF337
 	.byte	0x1c
 	.2byte	0x209
-	.4byte	0x117c
+	.4byte	0x1190
 	.uleb128 0xd
-	.4byte	.LASF336
+	.4byte	.LASF338
 	.byte	0x1c
 	.2byte	0x20a
-	.4byte	0x117c
+	.4byte	0x1190
 	.uleb128 0xd
-	.4byte	.LASF337
+	.4byte	.LASF339
 	.byte	0x1c
 	.2byte	0x20b
-	.4byte	0x101e
+	.4byte	0x1032
 	.uleb128 0xd
-	.4byte	.LASF338
+	.4byte	.LASF340
 	.byte	0x1c
 	.2byte	0x20c
-	.4byte	0x101e
+	.4byte	0x1032
 	.uleb128 0xd
-	.4byte	.LASF339
+	.4byte	.LASF341
 	.byte	0x1c
 	.2byte	0x20d
-	.4byte	0x1037
+	.4byte	0x104b
 	.uleb128 0xb
-	.4byte	0x1037
-	.4byte	0x1230
+	.4byte	0x104b
+	.4byte	0x1244
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x3
 	.byte	0
 	.uleb128 0xd
-	.4byte	.LASF340
+	.4byte	.LASF342
 	.byte	0x1c
 	.2byte	0x20e
-	.4byte	0x1220
+	.4byte	0x1234
 	.uleb128 0xd
-	.4byte	.LASF341
+	.4byte	.LASF343
 	.byte	0x1c
 	.2byte	0x20f
-	.4byte	0x1037
+	.4byte	0x104b
 	.uleb128 0xd
-	.4byte	.LASF342
+	.4byte	.LASF344
 	.byte	0x1c
 	.2byte	0x210
 	.4byte	0x59
 	.uleb128 0xb
 	.4byte	0xa3
-	.4byte	0x1264
+	.4byte	0x1278
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x5
 	.byte	0
 	.uleb128 0x8
-	.4byte	0x1254
+	.4byte	0x1268
 	.uleb128 0xd
-	.4byte	.LASF343
+	.4byte	.LASF345
 	.byte	0x1c
 	.2byte	0x211
-	.4byte	0x1264
+	.4byte	0x1278
 	.uleb128 0xd
-	.4byte	.LASF344
+	.4byte	.LASF346
 	.byte	0x1c
 	.2byte	0x212
-	.4byte	0x1264
+	.4byte	0x1278
 	.uleb128 0xd
-	.4byte	.LASF345
+	.4byte	.LASF347
 	.byte	0x1c
 	.2byte	0x216
 	.4byte	0xfe
 	.uleb128 0xd
-	.4byte	.LASF346
+	.4byte	.LASF348
 	.byte	0x1c
 	.2byte	0x217
 	.4byte	0xfe
 	.uleb128 0xd
-	.4byte	.LASF347
+	.4byte	.LASF349
 	.byte	0x1c
 	.2byte	0x219
 	.4byte	0x59
 	.uleb128 0xb
 	.4byte	0xe0
-	.4byte	0x12b6
+	.4byte	0x12ca
 	.uleb128 0x17
 	.4byte	0xce
 	.2byte	0x3ff
 	.byte	0
 	.uleb128 0xd
-	.4byte	.LASF348
+	.4byte	.LASF350
 	.byte	0x1c
 	.2byte	0x220
-	.4byte	0x12a5
+	.4byte	0x12b9
 	.uleb128 0xd
-	.4byte	.LASF349
+	.4byte	.LASF351
 	.byte	0x1c
 	.2byte	0x222
 	.4byte	0xa8
 	.uleb128 0xd
-	.4byte	.LASF350
+	.4byte	.LASF352
 	.byte	0x1c
 	.2byte	0x224
 	.4byte	0xa8
 	.uleb128 0xd
-	.4byte	.LASF351
+	.4byte	.LASF353
 	.byte	0x1c
 	.2byte	0x230
-	.4byte	0x101e
+	.4byte	0x1032
 	.uleb128 0x29
-	.4byte	.LASF352
+	.4byte	.LASF354
 	.byte	0x4
 	.4byte	0x84
 	.byte	0x1c
 	.2byte	0x286
-	.4byte	0x1310
+	.4byte	0x1324
 	.uleb128 0x1c
-	.4byte	.LASF353
+	.4byte	.LASF355
 	.byte	0
 	.uleb128 0x1c
-	.4byte	.LASF354
+	.4byte	.LASF356
 	.byte	0x1
 	.uleb128 0x1c
-	.4byte	.LASF355
+	.4byte	.LASF357
 	.byte	0x2
 	.uleb128 0x1c
-	.4byte	.LASF356
+	.4byte	.LASF358
 	.byte	0x3
 	.byte	0
 	.uleb128 0xd
-	.4byte	.LASF357
+	.4byte	.LASF359
 	.byte	0x1c
 	.2byte	0x28c
-	.4byte	0x12e6
+	.4byte	0x12fa
 	.uleb128 0xd
-	.4byte	.LASF358
+	.4byte	.LASF360
 	.byte	0x1d
 	.2byte	0x3ba
 	.4byte	0x109
 	.uleb128 0xd
-	.4byte	.LASF359
+	.4byte	.LASF361
 	.byte	0x1d
 	.2byte	0x3bb
 	.4byte	0x109
 	.uleb128 0xd
-	.4byte	.LASF360
+	.4byte	.LASF362
 	.byte	0x1d
 	.2byte	0x3bc
 	.4byte	0x109
 	.uleb128 0xb
 	.4byte	0xa8
-	.4byte	0x1350
+	.4byte	0x1364
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x1f
 	.byte	0
 	.uleb128 0x2a
-	.4byte	.LASF415
-	.byte	0x4
+	.4byte	.LASF379
+	.byte	0x1
 	.byte	0xa
-	.4byte	0x1340
+	.4byte	0x1354
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_isi_pattern
@@ -4782,125 +4194,125 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xe
 	.4byte	.LASF27
 	.byte	0x78
-	.byte	0xc
+	.byte	0xb
 	.byte	0xee
-	.4byte	0x1443
+	.4byte	0x1457
 	.uleb128 0xf
 	.4byte	.LASF28
-	.byte	0xc
+	.byte	0xb
 	.byte	0xef
 	.4byte	0xf3
 	.byte	0
 	.uleb128 0x10
 	.string	"id"
-	.byte	0xc
+	.byte	0xb
 	.byte	0xf0
-	.4byte	0xa60
+	.4byte	0xa61
 	.byte	0x8
 	.uleb128 0xf
-	.4byte	.LASF361
-	.byte	0xc
+	.4byte	.LASF363
+	.byte	0xb
 	.byte	0xf1
-	.4byte	0x1578
+	.4byte	0x158a
 	.byte	0x10
 	.uleb128 0xf
-	.4byte	.LASF362
-	.byte	0xc
+	.4byte	.LASF364
+	.byte	0xb
 	.byte	0xf2
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x18
 	.uleb128 0xf
-	.4byte	.LASF363
-	.byte	0xc
+	.4byte	.LASF365
+	.byte	0xb
 	.byte	0xf3
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x20
 	.uleb128 0xf
-	.4byte	.LASF364
-	.byte	0xc
+	.4byte	.LASF366
+	.byte	0xb
 	.byte	0xf4
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x28
 	.uleb128 0xf
-	.4byte	.LASF365
-	.byte	0xc
+	.4byte	.LASF367
+	.byte	0xb
 	.byte	0xf5
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x30
 	.uleb128 0xf
-	.4byte	.LASF366
-	.byte	0xc
+	.4byte	.LASF368
+	.byte	0xb
 	.byte	0xf6
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x38
 	.uleb128 0xf
-	.4byte	.LASF367
-	.byte	0xc
+	.4byte	.LASF369
+	.byte	0xb
 	.byte	0xf7
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x40
 	.uleb128 0xf
-	.4byte	.LASF368
-	.byte	0xc
+	.4byte	.LASF370
+	.byte	0xb
 	.byte	0xf8
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x48
 	.uleb128 0xf
-	.4byte	.LASF369
-	.byte	0xc
+	.4byte	.LASF371
+	.byte	0xb
 	.byte	0xf9
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x50
 	.uleb128 0xf
-	.4byte	.LASF370
-	.byte	0xc
+	.4byte	.LASF372
+	.byte	0xb
 	.byte	0xfa
 	.4byte	0x59
 	.byte	0x58
 	.uleb128 0xf
-	.4byte	.LASF371
-	.byte	0xc
+	.4byte	.LASF373
+	.byte	0xb
 	.byte	0xfb
 	.4byte	0x59
 	.byte	0x5c
 	.uleb128 0xf
-	.4byte	.LASF372
-	.byte	0xc
+	.4byte	.LASF374
+	.byte	0xb
 	.byte	0xfc
 	.4byte	0x59
 	.byte	0x60
 	.uleb128 0xf
-	.4byte	.LASF373
-	.byte	0xc
+	.4byte	.LASF375
+	.byte	0xb
 	.byte	0xfd
 	.4byte	0x59
 	.byte	0x64
 	.uleb128 0x10
 	.string	"ops"
-	.byte	0xc
+	.byte	0xb
 	.byte	0xfe
 	.4byte	0x263
 	.byte	0x68
 	.uleb128 0xf
 	.4byte	.LASF42
-	.byte	0xc
+	.byte	0xb
 	.byte	0xff
 	.4byte	0x11f
 	.byte	0x70
 	.byte	0
 	.uleb128 0x8
-	.4byte	0x136b
+	.4byte	0x137f
 	.uleb128 0x2
-	.4byte	.LASF304
+	.4byte	.LASF306
 	.byte	0x1b
 	.byte	0xf
 	.4byte	0xa8
 	.uleb128 0xe
-	.4byte	.LASF374
+	.4byte	.LASF376
 	.byte	0x20
 	.byte	0x1b
 	.byte	0x19
-	.4byte	0x1490
+	.4byte	0x14a4
 	.uleb128 0xf
 	.4byte	.LASF28
 	.byte	0x1b
@@ -4908,13 +4320,13 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0xf3
 	.byte	0
 	.uleb128 0xf
-	.4byte	.LASF375
+	.4byte	.LASF377
 	.byte	0x1b
 	.byte	0x1b
 	.4byte	0x59
 	.byte	0x8
 	.uleb128 0xf
-	.4byte	.LASF376
+	.4byte	.LASF378
 	.byte	0x1b
 	.byte	0x1c
 	.4byte	0x135
@@ -4923,53 +4335,51 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF47
 	.byte	0x1b
 	.byte	0x1d
-	.4byte	0x1490
+	.4byte	0x14a4
 	.byte	0x18
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x1453
+	.4byte	0x1467
 	.uleb128 0x2b
 	.string	"gd"
 	.byte	0x1b
 	.byte	0x57
-	.4byte	0x14a2
-	.uleb128 0x1
-	.byte	0x62
+	.4byte	0x14b4
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0xfcc
+	.4byte	0xfe0
 	.uleb128 0x2c
-	.4byte	.LASF490
+	.4byte	.LASF482
 	.byte	0x8
 	.byte	0x1e
 	.byte	0x33
-	.4byte	0x14ca
+	.4byte	0x14dc
 	.uleb128 0x2d
 	.string	"np"
 	.byte	0x1e
 	.byte	0x34
-	.4byte	0x14ca
+	.4byte	0x14dc
 	.uleb128 0x2e
-	.4byte	.LASF377
+	.4byte	.LASF380
 	.byte	0x1e
 	.byte	0x35
 	.4byte	0xec
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0xf9b
+	.4byte	0xfaf
 	.uleb128 0x2
-	.4byte	.LASF378
+	.4byte	.LASF381
 	.byte	0x1e
 	.byte	0x36
-	.4byte	0x14a8
+	.4byte	0x14ba
 	.uleb128 0xe
-	.4byte	.LASF379
+	.4byte	.LASF382
 	.byte	0x4
 	.byte	0x1f
 	.byte	0xc
-	.4byte	0x14f4
+	.4byte	0x1506
 	.uleb128 0x10
 	.string	"pid"
 	.byte	0x1f
@@ -4978,22 +4388,22 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.byte	0
 	.uleb128 0x5
-	.4byte	.LASF380
+	.4byte	.LASF383
 	.byte	0x1f
 	.byte	0x10
-	.4byte	0x14ff
+	.4byte	0x1511
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x14db
+	.4byte	0x14ed
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x1443
+	.4byte	0x1457
 	.uleb128 0xe
 	.4byte	.LASF36
 	.byte	0x30
 	.byte	0x20
 	.byte	0x23
-	.4byte	0x1548
+	.4byte	0x155a
 	.uleb128 0xf
 	.4byte	.LASF35
 	.byte	0x20
@@ -5001,13 +4411,13 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0x135
 	.byte	0
 	.uleb128 0xf
-	.4byte	.LASF381
+	.4byte	.LASF384
 	.byte	0x20
 	.byte	0x25
-	.4byte	0x1677
+	.4byte	0x1689
 	.byte	0x8
 	.uleb128 0xf
-	.4byte	.LASF382
+	.4byte	.LASF385
 	.byte	0x20
 	.byte	0x26
 	.4byte	0x290
@@ -5021,46 +4431,46 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x150b
+	.4byte	0x151d
 	.uleb128 0xe
-	.4byte	.LASF383
+	.4byte	.LASF386
 	.byte	0x10
-	.byte	0xc
+	.byte	0xb
 	.byte	0xb5
-	.4byte	0x1573
+	.4byte	0x1585
 	.uleb128 0xf
-	.4byte	.LASF384
-	.byte	0xc
+	.4byte	.LASF387
+	.byte	0xb
 	.byte	0xb6
 	.4byte	0xd5
 	.byte	0
 	.uleb128 0xf
-	.4byte	.LASF385
-	.byte	0xc
+	.4byte	.LASF388
+	.byte	0xb
 	.byte	0xb7
 	.4byte	0x109
 	.byte	0x8
 	.byte	0
 	.uleb128 0x8
-	.4byte	0x154e
+	.4byte	0x1560
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x1573
+	.4byte	0x1585
 	.uleb128 0x13
 	.4byte	0x59
-	.4byte	0x158d
+	.4byte	0x159f
 	.uleb128 0x14
 	.4byte	0x25d
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x157e
+	.4byte	0x1590
 	.uleb128 0xe
-	.4byte	.LASF386
+	.4byte	.LASF389
 	.byte	0x80
 	.byte	0x20
 	.byte	0x54
-	.4byte	0x1677
+	.4byte	0x1689
 	.uleb128 0xf
 	.4byte	.LASF28
 	.byte	0x20
@@ -5071,88 +4481,88 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.string	"id"
 	.byte	0x20
 	.byte	0x56
-	.4byte	0xa60
+	.4byte	0xa61
 	.byte	0x8
 	.uleb128 0xf
-	.4byte	.LASF387
+	.4byte	.LASF390
 	.byte	0x20
 	.byte	0x57
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x10
 	.uleb128 0xf
-	.4byte	.LASF388
+	.4byte	.LASF391
 	.byte	0x20
 	.byte	0x58
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x18
 	.uleb128 0xf
-	.4byte	.LASF389
+	.4byte	.LASF392
 	.byte	0x20
 	.byte	0x59
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x20
 	.uleb128 0xf
-	.4byte	.LASF390
+	.4byte	.LASF393
 	.byte	0x20
 	.byte	0x5a
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x28
 	.uleb128 0xf
-	.4byte	.LASF391
+	.4byte	.LASF394
 	.byte	0x20
 	.byte	0x5b
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x30
 	.uleb128 0xf
-	.4byte	.LASF367
+	.4byte	.LASF369
 	.byte	0x20
 	.byte	0x5c
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x38
 	.uleb128 0xf
-	.4byte	.LASF368
+	.4byte	.LASF370
 	.byte	0x20
 	.byte	0x5d
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x40
 	.uleb128 0xf
-	.4byte	.LASF321
+	.4byte	.LASF323
 	.byte	0x20
 	.byte	0x5e
-	.4byte	0x168c
+	.4byte	0x169e
 	.byte	0x48
 	.uleb128 0xf
-	.4byte	.LASF392
+	.4byte	.LASF395
 	.byte	0x20
 	.byte	0x5f
-	.4byte	0x168c
+	.4byte	0x169e
 	.byte	0x50
 	.uleb128 0xf
-	.4byte	.LASF370
+	.4byte	.LASF372
 	.byte	0x20
 	.byte	0x60
 	.4byte	0x59
 	.byte	0x58
 	.uleb128 0xf
-	.4byte	.LASF393
+	.4byte	.LASF396
 	.byte	0x20
 	.byte	0x61
 	.4byte	0x59
 	.byte	0x5c
 	.uleb128 0xf
-	.4byte	.LASF394
+	.4byte	.LASF397
 	.byte	0x20
 	.byte	0x62
 	.4byte	0x59
 	.byte	0x60
 	.uleb128 0xf
-	.4byte	.LASF372
+	.4byte	.LASF374
 	.byte	0x20
 	.byte	0x63
 	.4byte	0x59
 	.byte	0x64
 	.uleb128 0xf
-	.4byte	.LASF373
+	.4byte	.LASF375
 	.byte	0x20
 	.byte	0x64
 	.4byte	0x59
@@ -5172,27 +4582,27 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x1593
+	.4byte	0x15a5
 	.uleb128 0x13
 	.4byte	0x59
-	.4byte	0x168c
+	.4byte	0x169e
 	.uleb128 0x14
-	.4byte	0x1548
+	.4byte	0x155a
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x167d
+	.4byte	0x168f
 	.uleb128 0x5
-	.4byte	.LASF395
+	.4byte	.LASF398
 	.byte	0x21
 	.byte	0xb
 	.4byte	0x149
 	.uleb128 0xe
-	.4byte	.LASF396
+	.4byte	.LASF399
 	.byte	0x70
 	.byte	0x22
 	.byte	0x16
-	.4byte	0x172e
+	.4byte	0x1740
 	.uleb128 0xf
 	.4byte	.LASF42
 	.byte	0x22
@@ -5209,43 +4619,43 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF28
 	.byte	0x22
 	.byte	0x19
-	.4byte	0xfb1
+	.4byte	0xfc5
 	.byte	0x8
 	.uleb128 0xf
 	.4byte	.LASF54
 	.byte	0x22
 	.byte	0x1d
-	.4byte	0x1743
+	.4byte	0x1755
 	.byte	0x28
 	.uleb128 0xf
-	.4byte	.LASF397
+	.4byte	.LASF400
 	.byte	0x22
 	.byte	0x1e
-	.4byte	0x1743
+	.4byte	0x1755
 	.byte	0x30
 	.uleb128 0xf
-	.4byte	.LASF398
+	.4byte	.LASF401
 	.byte	0x22
 	.byte	0x23
-	.4byte	0x1759
+	.4byte	0x176b
 	.byte	0x38
 	.uleb128 0xf
-	.4byte	.LASF399
+	.4byte	.LASF402
 	.byte	0x22
 	.byte	0x25
-	.4byte	0x176f
+	.4byte	0x1781
 	.byte	0x40
 	.uleb128 0xf
-	.4byte	.LASF400
+	.4byte	.LASF403
 	.byte	0x22
 	.byte	0x2a
-	.4byte	0x1743
+	.4byte	0x1755
 	.byte	0x48
 	.uleb128 0xf
-	.4byte	.LASF401
+	.4byte	.LASF404
 	.byte	0x22
 	.byte	0x2b
-	.4byte	0x1743
+	.4byte	0x1755
 	.byte	0x50
 	.uleb128 0xf
 	.4byte	.LASF35
@@ -5254,7 +4664,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0x135
 	.byte	0x58
 	.uleb128 0xf
-	.4byte	.LASF402
+	.4byte	.LASF405
 	.byte	0x22
 	.byte	0x30
 	.4byte	0x290
@@ -5262,1038 +4672,844 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0x13
 	.4byte	0x59
-	.4byte	0x173d
+	.4byte	0x174f
 	.uleb128 0x14
-	.4byte	0x173d
+	.4byte	0x174f
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x169d
+	.4byte	0x16af
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x172e
+	.4byte	0x1740
 	.uleb128 0x28
-	.4byte	0x1759
+	.4byte	0x176b
 	.uleb128 0x14
-	.4byte	0x173d
+	.4byte	0x174f
 	.uleb128 0x14
 	.4byte	0xe7
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x1749
+	.4byte	0x175b
 	.uleb128 0x28
-	.4byte	0x176f
+	.4byte	0x1781
 	.uleb128 0x14
-	.4byte	0x173d
+	.4byte	0x174f
 	.uleb128 0x14
 	.4byte	0xd5
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x175f
+	.4byte	0x1771
 	.uleb128 0xb
-	.4byte	0x173d
-	.4byte	0x1780
+	.4byte	0x174f
+	.4byte	0x1792
 	.uleb128 0xc
 	.byte	0
 	.uleb128 0x5
-	.4byte	.LASF403
+	.4byte	.LASF406
 	.byte	0x22
 	.byte	0x48
-	.4byte	0x1775
+	.4byte	0x1787
 	.uleb128 0xb
 	.4byte	0xf3
-	.4byte	0x179b
+	.4byte	0x17ad
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x2
 	.byte	0
 	.uleb128 0x5
-	.4byte	.LASF404
+	.4byte	.LASF407
 	.byte	0x22
 	.byte	0x49
-	.4byte	0x178b
+	.4byte	0x179d
 	.uleb128 0xb
-	.4byte	0x17b6
-	.4byte	0x17b6
+	.4byte	0x17c8
+	.4byte	0x17c8
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x2
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x173d
+	.4byte	0x174f
 	.uleb128 0x5
-	.4byte	.LASF405
+	.4byte	.LASF408
 	.byte	0x23
 	.byte	0x15
-	.4byte	0x17a6
+	.4byte	0x17b8
 	.uleb128 0xb
 	.4byte	0x59
-	.4byte	0x17d7
+	.4byte	0x17e9
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x2
 	.byte	0
 	.uleb128 0x5
-	.4byte	.LASF406
+	.4byte	.LASF409
 	.byte	0x23
 	.byte	0x1a
-	.4byte	0x17c7
+	.4byte	0x17d9
 	.uleb128 0x25
 	.byte	0x4
 	.4byte	0x84
-	.byte	0x1
-	.byte	0x14
-	.4byte	0x181f
+	.byte	0x2
+	.byte	0x13
+	.4byte	0x1831
 	.uleb128 0x1c
-	.4byte	.LASF407
+	.4byte	.LASF410
 	.byte	0
 	.uleb128 0x1c
-	.4byte	.LASF408
+	.4byte	.LASF411
 	.byte	0x1
 	.uleb128 0x1c
-	.4byte	.LASF409
+	.4byte	.LASF412
 	.byte	0x2
 	.uleb128 0x1c
-	.4byte	.LASF410
+	.4byte	.LASF413
 	.byte	0x3
 	.uleb128 0x1c
-	.4byte	.LASF411
+	.4byte	.LASF414
 	.byte	0x4
 	.uleb128 0x1c
-	.4byte	.LASF412
+	.4byte	.LASF415
 	.byte	0x5
 	.uleb128 0x1c
-	.4byte	.LASF413
+	.4byte	.LASF416
 	.byte	0x6
 	.uleb128 0x1c
-	.4byte	.LASF414
+	.4byte	.LASF417
 	.byte	0x7
 	.byte	0
 	.uleb128 0xb
 	.4byte	0xdb
-	.4byte	0x182f
+	.4byte	0x1841
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x6
 	.byte	0
 	.uleb128 0x8
-	.4byte	0x181f
+	.4byte	0x1831
 	.uleb128 0x2a
-	.4byte	.LASF416
-	.byte	0x1
-	.byte	0x1f
-	.4byte	0x182f
+	.4byte	.LASF418
+	.byte	0x2
+	.byte	0x1e
+	.4byte	0x1841
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	test_pattern
 	.uleb128 0xb
 	.4byte	0xa3
-	.4byte	0x1859
+	.4byte	0x186b
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x6
 	.byte	0
 	.uleb128 0x8
-	.4byte	0x1849
+	.4byte	0x185b
 	.uleb128 0x2a
-	.4byte	.LASF417
-	.byte	0x1
-	.byte	0x29
-	.4byte	0x1859
+	.4byte	.LASF419
+	.byte	0x2
+	.byte	0x28
+	.4byte	0x186b
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	test_pat_param
 	.uleb128 0x2f
-	.4byte	.LASF418
-	.byte	0x1
-	.2byte	0x185
+	.4byte	.LASF420
+	.byte	0x2
+	.2byte	0x136
 	.4byte	0x67c
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	_u_boot_list_2_cmd_2_ddr_test
 	.uleb128 0x30
-	.4byte	.LASF426
-	.byte	0x3
-	.byte	0x50
-	.8byte	.LFB278
-	.8byte	.LFE278-.LFB278
+	.4byte	.LASF429
+	.byte	0x4
+	.byte	0x60
+	.4byte	0x59
+	.8byte	.LFB271
+	.8byte	.LFE271-.LFB271
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1904
+	.4byte	0x1b4f
 	.uleb128 0x31
-	.4byte	.LASF267
-	.byte	0x3
-	.byte	0x50
-	.4byte	0x135
-	.4byte	.LLST76
+	.4byte	.LASF421
+	.byte	0x4
+	.byte	0x60
+	.4byte	0x109
+	.4byte	.LLST15
 	.uleb128 0x31
-	.4byte	.LASF51
-	.byte	0x3
-	.byte	0x50
+	.4byte	.LASF422
+	.byte	0x4
+	.byte	0x60
 	.4byte	0x109
-	.4byte	.LLST77
-	.uleb128 0x32
-	.string	"p"
-	.byte	0x3
-	.byte	0x52
-	.4byte	0x1365
-	.4byte	.LLST78
+	.4byte	.LLST16
 	.uleb128 0x32
-	.string	"i"
-	.byte	0x3
-	.byte	0x53
-	.4byte	0xa8
-	.4byte	.LLST79
-	.uleb128 0x33
-	.8byte	.LVL310
-	.4byte	0x2b65
-	.uleb128 0x34
+	.string	"ret"
+	.byte	0x4
+	.byte	0x62
+	.4byte	0x59
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
+	.uleb128 0x33
+	.4byte	0x1bc3
+	.8byte	.LBB6
+	.4byte	.Ldebug_ranges0+0
+	.byte	0x4
+	.byte	0x64
+	.4byte	0x1a2b
 	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0xd
-	.byte	0x83
-	.sleb128 -4
-	.byte	0xc
-	.4byte	0xffffffff
-	.byte	0x1a
-	.byte	0x32
-	.byte	0x24
-	.byte	0x84
-	.sleb128 0
-	.byte	0x22
-	.byte	0
-	.byte	0
+	.4byte	0x1bde
+	.4byte	.LLST17
+	.uleb128 0x34
+	.4byte	0x1bd3
+	.4byte	.LLST18
 	.uleb128 0x35
-	.4byte	.LASF428
-	.byte	0x3
-	.byte	0x2e
-	.4byte	0x109
-	.8byte	.LFB277
-	.8byte	.LFE277-.LFB277
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x1a04
+	.4byte	.Ldebug_ranges0+0
 	.uleb128 0x36
-	.string	"buf"
-	.byte	0x3
-	.byte	0x2e
-	.4byte	0x1365
-	.4byte	.LLST29
-	.uleb128 0x31
-	.4byte	.LASF419
-	.byte	0x3
-	.byte	0x2e
-	.4byte	0xa8
-	.4byte	.LLST30
-	.uleb128 0x31
-	.4byte	.LASF420
-	.byte	0x3
-	.byte	0x2e
-	.4byte	0x109
-	.4byte	.LLST31
-	.uleb128 0x31
-	.4byte	.LASF375
-	.byte	0x3
-	.byte	0x2e
-	.4byte	0x109
-	.4byte	.LLST32
-	.uleb128 0x31
-	.4byte	.LASF421
-	.byte	0x3
-	.byte	0x2f
-	.4byte	0xa8
-	.4byte	.LLST33
-	.uleb128 0x37
-	.4byte	.LASF422
-	.byte	0x3
-	.byte	0x31
-	.4byte	0x1a04
-	.4byte	.LLST34
-	.uleb128 0x32
-	.string	"p"
-	.byte	0x3
-	.byte	0x32
-	.4byte	0x1a0a
-	.4byte	.LLST35
-	.uleb128 0x32
-	.string	"i"
-	.byte	0x3
-	.byte	0x33
-	.4byte	0xa8
-	.4byte	.LLST36
-	.uleb128 0x32
-	.string	"j"
-	.byte	0x3
-	.byte	0x33
-	.4byte	0xa8
-	.4byte	.LLST37
-	.uleb128 0x32
-	.string	"val"
-	.byte	0x3
-	.byte	0x34
-	.4byte	0x109
-	.4byte	.LLST38
-	.uleb128 0x37
-	.4byte	.LASF423
-	.byte	0x3
-	.byte	0x34
-	.4byte	0x109
-	.4byte	.LLST39
-	.uleb128 0x37
-	.4byte	.LASF424
-	.byte	0x3
-	.byte	0x34
-	.4byte	0x109
-	.4byte	.LLST40
+	.4byte	0x1be9
+	.4byte	.LLST19
+	.uleb128 0x36
+	.4byte	0x1bf2
+	.4byte	.LLST20
+	.uleb128 0x36
+	.4byte	0x1bfb
+	.4byte	.LLST21
+	.uleb128 0x36
+	.4byte	0x1c06
+	.4byte	.LLST22
 	.uleb128 0x37
-	.4byte	.LASF425
-	.byte	0x3
-	.byte	0x34
-	.4byte	0x109
-	.4byte	.LLST41
-	.uleb128 0x33
-	.8byte	.LVL115
-	.4byte	0x2b65
-	.uleb128 0x34
+	.4byte	0x1c11
+	.uleb128 0x36
+	.4byte	0x1c1c
+	.4byte	.LLST23
+	.uleb128 0x36
+	.4byte	0x1c27
+	.4byte	.LLST24
+	.uleb128 0x36
+	.4byte	0x1c32
+	.4byte	.LLST25
+	.uleb128 0x38
+	.8byte	.LVL64
+	.4byte	0x26e7
+	.4byte	0x1981
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC16
-	.uleb128 0x34
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
+	.uleb128 0x6
+	.byte	0x11
+	.sleb128 -2139062144
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x52
 	.uleb128 0x2
-	.byte	0x83
+	.byte	0x84
 	.sleb128 0
 	.byte	0
+	.uleb128 0x38
+	.8byte	.LVL66
+	.4byte	0x26f3
+	.4byte	0x199f
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
 	.byte	0
-	.uleb128 0x9
-	.byte	0x8
-	.4byte	0x109
-	.uleb128 0x9
-	.byte	0x8
-	.4byte	0x42
-	.uleb128 0x30
-	.4byte	.LASF427
-	.byte	0x3
-	.byte	0x1c
-	.8byte	.LFB276
-	.8byte	.LFE276-.LFB276
+	.uleb128 0x38
+	.8byte	.LVL72
+	.4byte	0x26f3
+	.4byte	0x19b9
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x1a98
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x8f
+	.sleb128 192
+	.byte	0x6
+	.byte	0
 	.uleb128 0x38
-	.string	"buf"
-	.byte	0x3
-	.byte	0x1c
-	.4byte	0x1365
+	.8byte	.LVL76
+	.4byte	0x26fe
+	.4byte	0x19d7
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x31
-	.4byte	.LASF419
-	.byte	0x3
-	.byte	0x1c
-	.4byte	0xa8
-	.4byte	.LLST25
+	.uleb128 0x2
+	.byte	0x8c
+	.sleb128 0
 	.uleb128 0x39
-	.4byte	.LASF420
-	.byte	0x3
-	.byte	0x1c
-	.4byte	0x109
 	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x31
-	.4byte	.LASF375
-	.byte	0x3
-	.byte	0x1c
-	.4byte	0x109
-	.4byte	.LLST26
-	.uleb128 0x2a
-	.4byte	.LASF422
-	.byte	0x3
-	.byte	0x1e
-	.4byte	0x1a04
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8c
+	.sleb128 4
+	.byte	0
+	.uleb128 0x38
+	.8byte	.LVL78
+	.4byte	0x26f3
+	.4byte	0x19f6
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC10
+	.byte	0
 	.uleb128 0x3a
-	.string	"p"
+	.8byte	.LVL79
+	.4byte	0x26f3
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
 	.byte	0x3
-	.byte	0x1f
-	.4byte	0x1a04
+	.8byte	.LC11
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8c
+	.sleb128 0
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
-	.uleb128 0x32
-	.string	"i"
-	.byte	0x3
-	.byte	0x20
-	.4byte	0xa8
-	.4byte	.LLST27
-	.uleb128 0x32
-	.string	"j"
-	.byte	0x3
-	.byte	0x20
-	.4byte	0xa8
-	.4byte	.LLST28
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.byte	0
+	.byte	0
 	.byte	0
 	.uleb128 0x3b
-	.4byte	.LASF491
-	.byte	0x3
-	.byte	0xa
-	.byte	0x1
-	.4byte	0x1aae
+	.4byte	0x1b4f
+	.8byte	.LBB15
+	.4byte	.Ldebug_ranges0+0x60
+	.byte	0x4
+	.byte	0x66
 	.uleb128 0x3c
-	.string	"p"
-	.byte	0x3
-	.byte	0xa
-	.4byte	0x1365
-	.byte	0
+	.4byte	0x1b6a
+	.uleb128 0x3c
+	.4byte	0x1b5f
 	.uleb128 0x35
-	.4byte	.LASF429
-	.byte	0x2
-	.byte	0x57
-	.4byte	0x59
-	.8byte	.LFB274
-	.8byte	.LFE274-.LFB274
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x1d27
-	.uleb128 0x31
-	.4byte	.LASF430
-	.byte	0x2
-	.byte	0x57
-	.4byte	0x109
-	.4byte	.LLST3
-	.uleb128 0x31
-	.4byte	.LASF431
-	.byte	0x2
-	.byte	0x57
-	.4byte	0x109
-	.4byte	.LLST4
-	.uleb128 0x3a
-	.string	"ret"
-	.byte	0x2
-	.byte	0x59
-	.4byte	0x59
-	.uleb128 0x1
-	.byte	0x50
+	.4byte	.Ldebug_ranges0+0x60
+	.uleb128 0x36
+	.4byte	0x1b75
+	.4byte	.LLST26
+	.uleb128 0x36
+	.4byte	0x1b7e
+	.4byte	.LLST27
 	.uleb128 0x3d
-	.4byte	0x1d95
-	.8byte	.LBB12
-	.4byte	.Ldebug_ranges0+0
-	.byte	0x2
-	.byte	0x5b
-	.4byte	0x1c21
-	.uleb128 0x3e
-	.4byte	0x1db0
-	.4byte	.LLST5
-	.uleb128 0x3e
-	.4byte	0x1da5
-	.4byte	.LLST6
-	.uleb128 0x3f
-	.4byte	.Ldebug_ranges0+0
-	.uleb128 0x40
-	.4byte	0x1dbb
-	.4byte	.LLST7
-	.uleb128 0x40
-	.4byte	0x1dc4
-	.4byte	.LLST8
-	.uleb128 0x40
-	.4byte	0x1dcd
-	.4byte	.LLST9
-	.uleb128 0x40
-	.4byte	0x1dd8
-	.4byte	.LLST10
-	.uleb128 0x41
-	.4byte	0x1de3
-	.uleb128 0x40
-	.4byte	0x1dee
-	.4byte	.LLST11
-	.uleb128 0x40
-	.4byte	0x1df9
-	.4byte	.LLST12
-	.uleb128 0x40
-	.4byte	0x1e04
-	.4byte	.LLST13
-	.uleb128 0x42
-	.8byte	.LVL26
-	.4byte	0x2b70
-	.4byte	0x1b94
-	.uleb128 0x34
+	.4byte	0x1b87
 	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x86
-	.sleb128 0
-	.uleb128 0x34
+	.byte	0x66
+	.uleb128 0x3d
+	.4byte	0x1b92
 	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x6
-	.byte	0x11
-	.sleb128 -2139062144
-	.uleb128 0x34
+	.byte	0x69
+	.uleb128 0x3d
+	.4byte	0x1b9d
 	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x87
-	.sleb128 0
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL28
-	.4byte	0x2b65
-	.4byte	0x1bb2
-	.uleb128 0x34
+	.byte	0x6b
+	.uleb128 0x37
+	.4byte	0x1ba8
+	.uleb128 0x36
+	.4byte	0x1bb1
+	.4byte	.LLST28
+	.uleb128 0x38
+	.8byte	.LVL85
+	.4byte	0x26f3
+	.4byte	0x1aa0
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x88
+	.byte	0x8a
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x8c
-	.sleb128 0
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL32
-	.4byte	0x2b65
-	.4byte	0x1bca
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
 	.byte	0x85
 	.sleb128 0
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL38
-	.4byte	0x2b65
-	.4byte	0x1be9
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC7
-	.byte	0
-	.uleb128 0x33
-	.8byte	.LVL39
-	.4byte	0x2b65
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL87
+	.4byte	0x26e7
+	.4byte	0x1ac4
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC8
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
 	.uleb128 0x2
 	.byte	0x83
 	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x5
-	.byte	0x8f
-	.sleb128 204
-	.byte	0x94
-	.byte	0x4
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x53
+	.byte	0x51
 	.uleb128 0x2
-	.byte	0x8b
+	.byte	0x86
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x54
+	.byte	0x52
 	.uleb128 0x2
 	.byte	0x84
 	.sleb128 0
 	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x43
-	.4byte	0x1d27
-	.8byte	.LBB21
-	.4byte	.Ldebug_ranges0+0x60
-	.byte	0x2
-	.byte	0x5d
-	.uleb128 0x44
-	.4byte	0x1d42
-	.uleb128 0x44
-	.4byte	0x1d37
-	.uleb128 0x3f
-	.4byte	.Ldebug_ranges0+0x60
-	.uleb128 0x40
-	.4byte	0x1d4d
-	.4byte	.LLST14
-	.uleb128 0x40
-	.4byte	0x1d56
-	.4byte	.LLST15
-	.uleb128 0x45
-	.4byte	0x1d5f
-	.uleb128 0x1
-	.byte	0x64
-	.uleb128 0x45
-	.4byte	0x1d6a
-	.uleb128 0x1
-	.byte	0x6a
-	.uleb128 0x45
-	.4byte	0x1d75
-	.uleb128 0x1
-	.byte	0x6b
-	.uleb128 0x41
-	.4byte	0x1d80
-	.uleb128 0x40
-	.4byte	0x1d89
-	.4byte	.LLST16
-	.uleb128 0x42
-	.8byte	.LVL48
-	.4byte	0x2b65
-	.4byte	0x1c96
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL91
+	.4byte	0x26f3
+	.4byte	0x1adc
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x89
-	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x83
+	.byte	0x88
 	.sleb128 0
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL50
-	.4byte	0x2b70
-	.4byte	0x1cba
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL96
+	.4byte	0x26fe
+	.4byte	0x1afa
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x86
+	.byte	0x87
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
 	.byte	0x87
-	.sleb128 0
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL55
-	.4byte	0x2b65
-	.4byte	0x1cd2
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
+	.sleb128 4
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL61
-	.4byte	0x2b65
-	.4byte	0x1cf1
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL99
+	.4byte	0x26f3
+	.4byte	0x1b19
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC11
+	.8byte	.LC14
 	.byte	0
-	.uleb128 0x33
-	.8byte	.LVL62
-	.4byte	0x2b65
-	.uleb128 0x34
+	.uleb128 0x3a
+	.8byte	.LVL100
+	.4byte	0x26f3
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC12
-	.uleb128 0x34
+	.8byte	.LC15
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x85
+	.byte	0x87
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
-	.byte	0x8a
+	.byte	0x89
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
 	.byte	0x8b
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x54
 	.uleb128 0x2
-	.byte	0x84
+	.byte	0x86
 	.sleb128 0
 	.byte	0
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF435
-	.byte	0x2
-	.byte	0x30
+	.uleb128 0x3e
+	.4byte	.LASF426
+	.byte	0x4
+	.byte	0x36
 	.4byte	0x59
 	.byte	0x1
-	.4byte	0x1d95
-	.uleb128 0x47
-	.4byte	.LASF430
-	.byte	0x2
-	.byte	0x30
+	.4byte	0x1bbd
+	.uleb128 0x3f
+	.4byte	.LASF421
+	.byte	0x4
+	.byte	0x36
 	.4byte	0x109
-	.uleb128 0x47
-	.4byte	.LASF431
-	.byte	0x2
-	.byte	0x30
+	.uleb128 0x3f
+	.4byte	.LASF422
+	.byte	0x4
+	.byte	0x36
 	.4byte	0x109
-	.uleb128 0x48
+	.uleb128 0x40
 	.string	"i"
-	.byte	0x2
-	.byte	0x32
+	.byte	0x4
+	.byte	0x38
 	.4byte	0x109
-	.uleb128 0x48
+	.uleb128 0x40
 	.string	"j"
-	.byte	0x2
-	.byte	0x32
+	.byte	0x4
+	.byte	0x38
 	.4byte	0x109
-	.uleb128 0x49
-	.4byte	.LASF432
-	.byte	0x2
-	.byte	0x33
+	.uleb128 0x41
+	.4byte	.LASF423
+	.byte	0x4
+	.byte	0x39
 	.4byte	0x109
-	.uleb128 0x49
-	.4byte	.LASF376
-	.byte	0x2
-	.byte	0x33
+	.uleb128 0x41
+	.4byte	.LASF378
+	.byte	0x4
+	.byte	0x39
 	.4byte	0x109
-	.uleb128 0x49
-	.4byte	.LASF433
-	.byte	0x2
-	.byte	0x34
+	.uleb128 0x41
+	.4byte	.LASF424
+	.byte	0x4
+	.byte	0x3a
 	.4byte	0x109
-	.uleb128 0x48
+	.uleb128 0x40
 	.string	"p"
-	.byte	0x2
-	.byte	0x35
-	.4byte	0x1a0a
-	.uleb128 0x49
-	.4byte	.LASF434
-	.byte	0x2
-	.byte	0x36
+	.byte	0x4
+	.byte	0x3b
+	.4byte	0x1bbd
+	.uleb128 0x41
+	.4byte	.LASF425
+	.byte	0x4
+	.byte	0x3c
 	.4byte	0x109
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF436
-	.byte	0x2
-	.byte	0xa
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x42
+	.uleb128 0x3e
+	.4byte	.LASF427
+	.byte	0x4
+	.byte	0xb
 	.4byte	0x59
 	.byte	0x1
-	.4byte	0x1e10
-	.uleb128 0x47
-	.4byte	.LASF430
-	.byte	0x2
-	.byte	0xa
+	.4byte	0x1c3e
+	.uleb128 0x3f
+	.4byte	.LASF421
+	.byte	0x4
+	.byte	0xb
 	.4byte	0x109
-	.uleb128 0x47
-	.4byte	.LASF431
-	.byte	0x2
-	.byte	0xa
+	.uleb128 0x3f
+	.4byte	.LASF422
+	.byte	0x4
+	.byte	0xb
 	.4byte	0x109
-	.uleb128 0x48
+	.uleb128 0x40
 	.string	"i"
-	.byte	0x2
-	.byte	0xc
+	.byte	0x4
+	.byte	0xd
 	.4byte	0xa8
-	.uleb128 0x48
+	.uleb128 0x40
 	.string	"j"
-	.byte	0x2
-	.byte	0xc
-	.4byte	0xa8
-	.uleb128 0x49
-	.4byte	.LASF437
-	.byte	0x2
+	.byte	0x4
 	.byte	0xd
 	.4byte	0xa8
-	.uleb128 0x49
-	.4byte	.LASF432
-	.byte	0x2
-	.byte	0xd
+	.uleb128 0x41
+	.4byte	.LASF428
+	.byte	0x4
+	.byte	0xe
 	.4byte	0xa8
-	.uleb128 0x49
-	.4byte	.LASF376
-	.byte	0x2
-	.byte	0xd
+	.uleb128 0x41
+	.4byte	.LASF423
+	.byte	0x4
+	.byte	0xe
 	.4byte	0xa8
-	.uleb128 0x49
-	.4byte	.LASF433
-	.byte	0x2
+	.uleb128 0x41
+	.4byte	.LASF378
+	.byte	0x4
 	.byte	0xe
 	.4byte	0xa8
-	.uleb128 0x48
-	.string	"p32"
-	.byte	0x2
+	.uleb128 0x41
+	.4byte	.LASF424
+	.byte	0x4
 	.byte	0xf
-	.4byte	0x1e10
-	.uleb128 0x49
-	.4byte	.LASF434
-	.byte	0x2
+	.4byte	0xa8
+	.uleb128 0x40
+	.string	"p32"
+	.byte	0x4
 	.byte	0x10
+	.4byte	0x1c3e
+	.uleb128 0x41
+	.4byte	.LASF425
+	.byte	0x4
+	.byte	0x11
 	.4byte	0x109
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
 	.4byte	0xb3
-	.uleb128 0x35
-	.4byte	.LASF438
-	.byte	0x5
-	.byte	0x30
+	.uleb128 0x30
+	.4byte	.LASF430
+	.byte	0x3
+	.byte	0xf
 	.4byte	0x59
-	.8byte	.LFB271
-	.8byte	.LFE271-.LFB271
+	.8byte	.LFB268
+	.8byte	.LFE268-.LFB268
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2042
+	.4byte	0x1e70
 	.uleb128 0x31
-	.4byte	.LASF420
-	.byte	0x5
-	.byte	0x30
+	.4byte	.LASF431
+	.byte	0x3
+	.byte	0xf
 	.4byte	0x109
-	.4byte	.LLST49
+	.4byte	.LLST9
 	.uleb128 0x31
-	.4byte	.LASF375
-	.byte	0x5
-	.byte	0x30
+	.4byte	.LASF377
+	.byte	0x3
+	.byte	0xf
 	.4byte	0x109
-	.4byte	.LLST50
-	.uleb128 0x37
-	.4byte	.LASF267
-	.byte	0x5
-	.byte	0x35
+	.4byte	.LLST10
+	.uleb128 0x42
+	.4byte	.LASF268
+	.byte	0x3
+	.byte	0x11
 	.4byte	0x109
-	.4byte	.LLST51
-	.uleb128 0x37
-	.4byte	.LASF439
-	.byte	0x5
-	.byte	0x35
+	.4byte	.LLST11
+	.uleb128 0x2a
+	.4byte	.LASF432
+	.byte	0x3
+	.byte	0x11
 	.4byte	0x109
-	.4byte	.LLST52
-	.uleb128 0x49
-	.4byte	.LASF440
-	.byte	0x5
-	.byte	0x36
+	.uleb128 0x1
+	.byte	0x64
+	.uleb128 0x42
+	.4byte	.LASF433
+	.byte	0x3
+	.byte	0x12
 	.4byte	0x59
+	.4byte	.LLST12
 	.uleb128 0x2a
-	.4byte	.LASF441
-	.byte	0x5
-	.byte	0x37
-	.4byte	0x2042
+	.4byte	.LASF434
+	.byte	0x3
+	.byte	0x13
+	.4byte	0x1e70
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -32
-	.uleb128 0x32
+	.uleb128 0x43
 	.string	"col"
-	.byte	0x5
-	.byte	0x39
+	.byte	0x3
+	.byte	0x15
 	.4byte	0xa8
-	.4byte	.LLST53
-	.uleb128 0x37
-	.4byte	.LASF442
-	.byte	0x5
-	.byte	0x39
+	.4byte	.LLST13
+	.uleb128 0x2a
+	.4byte	.LASF435
+	.byte	0x3
+	.byte	0x15
 	.4byte	0xa8
-	.4byte	.LLST54
-	.uleb128 0x37
-	.4byte	.LASF425
-	.byte	0x5
-	.byte	0x3a
-	.4byte	0x109
-	.4byte	.LLST55
-	.uleb128 0x4a
-	.4byte	.LASF492
-	.byte	0x5
-	.byte	0x62
-	.8byte	.L91
-	.uleb128 0x3d
-	.4byte	0x2052
-	.8byte	.LBB29
-	.4byte	.Ldebug_ranges0+0x90
-	.byte	0x5
-	.byte	0x3d
-	.4byte	0x1f19
-	.uleb128 0x3f
-	.4byte	.Ldebug_ranges0+0x90
-	.uleb128 0x40
-	.4byte	0x2062
-	.4byte	.LLST56
-	.uleb128 0x41
-	.4byte	0x206d
-	.uleb128 0x41
-	.4byte	0x2078
-	.uleb128 0x41
-	.4byte	0x2082
-	.uleb128 0x4b
-	.8byte	.LBB31
-	.8byte	.LBE31-.LBB31
-	.uleb128 0x40
-	.4byte	0x208e
-	.4byte	.LLST57
-	.byte	0
-	.byte	0
-	.byte	0
+	.uleb128 0x1
+	.byte	0x65
 	.uleb128 0x42
-	.8byte	.LVL156
-	.4byte	0x2b7c
-	.4byte	0x1f45
-	.uleb128 0x34
+	.4byte	.LASF436
+	.byte	0x3
+	.byte	0x16
+	.4byte	0x109
+	.4byte	.LLST14
+	.uleb128 0x44
+	.4byte	.LASF483
+	.byte	0x3
+	.byte	0x3e
+	.8byte	.L31
+	.uleb128 0x38
+	.8byte	.LVL38
+	.4byte	0x270a
+	.4byte	0x1d22
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x3
 	.byte	0x8f
 	.sleb128 144
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	.LANCHOR1
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x20
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL157
-	.4byte	0x2b65
-	.4byte	0x1f64
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL39
+	.4byte	0x26f3
+	.4byte	0x1d41
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC22
+	.8byte	.LC6
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL160
-	.4byte	0x2b85
-	.4byte	0x1f89
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
+	.uleb128 0x45
+	.8byte	.LVL40
+	.4byte	0x2713
+	.uleb128 0x38
+	.8byte	.LVL42
+	.4byte	0x26f3
+	.4byte	0x1d73
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC7
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x51
 	.uleb128 0x2
-	.byte	0x87
+	.byte	0x83
 	.sleb128 0
-	.uleb128 0x34
+	.byte	0
+	.uleb128 0x38
+	.8byte	.LVL49
+	.4byte	0x271e
+	.4byte	0x1d92
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 144
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.byte	0
+	.uleb128 0x38
+	.8byte	.LVL50
+	.4byte	0x2729
+	.4byte	0x1db7
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x3
 	.byte	0x8f
 	.sleb128 144
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x20
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL165
-	.4byte	0x2b85
-	.4byte	0x1fae
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL53
+	.4byte	0x2729
+	.4byte	0x1ddc
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x8a
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x3
 	.byte	0x8f
 	.sleb128 144
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x20
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL166
-	.4byte	0x1904
-	.4byte	0x1fe4
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL54
+	.4byte	0x2735
+	.4byte	0x1e12
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x3
 	.byte	0x8f
 	.sleb128 144
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x20
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x8
 	.byte	0x84
 	.sleb128 0
-	.byte	0x86
+	.byte	0x88
 	.sleb128 0
 	.byte	0x22
-	.byte	0x87
+	.byte	0x89
 	.sleb128 0
 	.byte	0x22
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x20
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x54
 	.uleb128 0x1
 	.byte	0x31
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL171
-	.4byte	0x2b85
-	.4byte	0x2015
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL59
+	.4byte	0x2729
+	.4byte	0x1e43
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0xe
@@ -6305,50 +5521,50 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0x84
 	.sleb128 0
 	.byte	0x22
-	.byte	0x87
+	.byte	0x89
 	.sleb128 0
 	.byte	0x22
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x3
 	.byte	0x8f
 	.sleb128 144
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x20
 	.byte	0
-	.uleb128 0x33
-	.8byte	.LVL172
-	.4byte	0x1904
-	.uleb128 0x34
+	.uleb128 0x3a
+	.8byte	.LVL60
+	.4byte	0x2735
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x3
 	.byte	0x8f
 	.sleb128 144
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x20
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x8a
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x20
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x54
 	.uleb128 0x1
@@ -6357,623 +5573,448 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0xb
 	.4byte	0xa8
-	.4byte	0x2052
+	.4byte	0x1e80
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x7
 	.byte	0
 	.uleb128 0x46
-	.4byte	.LASF443
-	.byte	0x5
-	.byte	0xc
-	.4byte	0x59
-	.byte	0x1
-	.4byte	0x209b
-	.uleb128 0x49
-	.4byte	.LASF444
-	.byte	0x5
-	.byte	0xe
-	.4byte	0xa8
-	.uleb128 0x48
-	.string	"col"
-	.byte	0x5
-	.byte	0xf
-	.4byte	0xa8
-	.uleb128 0x48
-	.string	"bw"
-	.byte	0x5
-	.byte	0xf
-	.4byte	0xa8
-	.uleb128 0x49
-	.4byte	.LASF440
-	.byte	0x5
-	.byte	0x10
-	.4byte	0x59
-	.uleb128 0x4c
-	.uleb128 0x48
-	.string	"__v"
-	.byte	0x5
-	.byte	0x13
-	.4byte	0xa8
-	.byte	0
-	.byte	0
-	.uleb128 0x4d
-	.4byte	.LASF455
-	.byte	0x1
-	.byte	0xbc
+	.4byte	.LASF448
+	.byte	0x2
+	.byte	0x62
 	.4byte	0x59
-	.8byte	.LFB258
-	.8byte	.LFE258-.LFB258
+	.8byte	.LFB256
+	.8byte	.LFE256-.LFB256
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x25c1
+	.4byte	0x2293
 	.uleb128 0x31
-	.4byte	.LASF445
-	.byte	0x1
-	.byte	0xbc
-	.4byte	0x25c1
-	.4byte	.LLST58
+	.4byte	.LASF437
+	.byte	0x2
+	.byte	0x62
+	.4byte	0x2293
+	.4byte	.LLST37
 	.uleb128 0x31
-	.4byte	.LASF446
-	.byte	0x1
-	.byte	0xbc
+	.4byte	.LASF438
+	.byte	0x2
+	.byte	0x62
 	.4byte	0x59
-	.4byte	.LLST59
+	.4byte	.LLST38
 	.uleb128 0x31
-	.4byte	.LASF447
-	.byte	0x1
-	.byte	0xbc
+	.4byte	.LASF439
+	.byte	0x2
+	.byte	0x62
 	.4byte	0x59
-	.4byte	.LLST60
+	.4byte	.LLST39
 	.uleb128 0x31
-	.4byte	.LASF448
-	.byte	0x1
-	.byte	0xbd
+	.4byte	.LASF440
+	.byte	0x2
+	.byte	0x63
 	.4byte	0x641
-	.4byte	.LLST61
-	.uleb128 0x32
+	.4byte	.LLST40
+	.uleb128 0x43
 	.string	"i"
-	.byte	0x1
-	.byte	0xbf
+	.byte	0x2
+	.byte	0x65
 	.4byte	0x59
-	.4byte	.LLST62
-	.uleb128 0x37
-	.4byte	.LASF449
-	.byte	0x1
-	.byte	0xc0
+	.4byte	.LLST41
+	.uleb128 0x42
+	.4byte	.LASF441
+	.byte	0x2
+	.byte	0x66
 	.4byte	0x59
-	.4byte	.LLST63
-	.uleb128 0x37
-	.4byte	.LASF450
-	.byte	0x1
-	.byte	0xc0
+	.4byte	.LLST42
+	.uleb128 0x42
+	.4byte	.LASF442
+	.byte	0x2
+	.byte	0x66
 	.4byte	0x59
-	.4byte	.LLST64
-	.uleb128 0x3a
+	.4byte	.LLST43
+	.uleb128 0x32
 	.string	"arg"
-	.byte	0x1
-	.byte	0xc1
-	.4byte	0x25c7
+	.byte	0x2
+	.byte	0x67
+	.4byte	0x2299
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -40
 	.uleb128 0x2a
-	.4byte	.LASF420
-	.byte	0x1
-	.byte	0xc2
-	.4byte	0x25d7
+	.4byte	.LASF431
+	.byte	0x2
+	.byte	0x68
+	.4byte	0x22a9
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -104
 	.uleb128 0x2a
-	.4byte	.LASF375
-	.byte	0x1
-	.byte	0xc3
-	.4byte	0x25d7
+	.4byte	.LASF377
+	.byte	0x2
+	.byte	0x69
+	.4byte	0x22a9
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -72
-	.uleb128 0x37
-	.4byte	.LASF451
-	.byte	0x1
-	.byte	0xc4
+	.uleb128 0x42
+	.4byte	.LASF443
+	.byte	0x2
+	.byte	0x6a
 	.4byte	0xa8
-	.4byte	.LLST65
-	.uleb128 0x37
-	.4byte	.LASF452
-	.byte	0x1
-	.byte	0xc5
+	.4byte	.LLST44
+	.uleb128 0x42
+	.4byte	.LASF444
+	.byte	0x2
+	.byte	0x6b
 	.4byte	0xa8
-	.4byte	.LLST66
-	.uleb128 0x32
+	.4byte	.LLST45
+	.uleb128 0x42
+	.4byte	.LASF445
+	.byte	0x2
+	.byte	0x6c
+	.4byte	0xa8
+	.4byte	.LLST46
+	.uleb128 0x43
 	.string	"ret"
-	.byte	0x1
-	.byte	0xc6
+	.byte	0x2
+	.byte	0x6d
 	.4byte	0x59
-	.4byte	.LLST67
-	.uleb128 0x37
-	.4byte	.LASF453
-	.byte	0x1
-	.byte	0xc7
+	.4byte	.LLST47
+	.uleb128 0x42
+	.4byte	.LASF446
+	.byte	0x2
+	.byte	0x6e
 	.4byte	0x59
-	.4byte	.LLST68
-	.uleb128 0x37
-	.4byte	.LASF454
-	.byte	0x1
-	.byte	0xc8
+	.4byte	.LLST48
+	.uleb128 0x42
+	.4byte	.LASF447
+	.byte	0x2
+	.byte	0x6f
 	.4byte	0xa8
-	.4byte	.LLST69
-	.uleb128 0x3a
+	.4byte	.LLST49
+	.uleb128 0x32
 	.string	"dev"
-	.byte	0x1
-	.byte	0xec
+	.byte	0x2
+	.byte	0x91
 	.4byte	0x25d
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -112
-	.uleb128 0x3d
-	.4byte	0x28ba
-	.8byte	.LBB40
-	.4byte	.Ldebug_ranges0+0xd0
-	.byte	0x1
-	.byte	0xcb
-	.4byte	0x223d
-	.uleb128 0x3e
-	.4byte	0x28d1
-	.4byte	.LLST70
-	.uleb128 0x3e
-	.4byte	0x28c6
-	.4byte	.LLST71
-	.uleb128 0x3f
-	.4byte	.Ldebug_ranges0+0xd0
-	.uleb128 0x40
-	.4byte	0x28dc
-	.4byte	.LLST72
-	.uleb128 0x40
-	.4byte	0x28e5
-	.4byte	.LLST73
-	.uleb128 0x42
-	.8byte	.LVL183
-	.4byte	0x2b65
-	.4byte	0x2208
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC23
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL184
-	.4byte	0x2b65
-	.4byte	0x2227
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL132
+	.4byte	0x26f3
+	.4byte	0x1fbc
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC24
+	.8byte	.LC18
 	.byte	0
-	.uleb128 0x33
-	.8byte	.LVL193
-	.4byte	0x2b65
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL133
+	.4byte	0x2740
+	.4byte	0x1fdf
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x8a
+	.byte	0x85
 	.sleb128 0
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x4e
-	.4byte	0x2869
-	.8byte	.LBB54
-	.4byte	.Ldebug_ranges0+0x150
-	.byte	0x1
-	.2byte	0x152
-	.4byte	0x229d
-	.uleb128 0x44
-	.4byte	0x288f
-	.uleb128 0x44
-	.4byte	0x2884
-	.uleb128 0x44
-	.4byte	0x2879
-	.uleb128 0x3f
-	.4byte	.Ldebug_ranges0+0x150
-	.uleb128 0x40
-	.4byte	0x289a
-	.4byte	.LLST74
-	.uleb128 0x41
-	.4byte	0x28a3
-	.uleb128 0x40
-	.4byte	0x28ae
-	.4byte	.LLST75
-	.uleb128 0x33
-	.8byte	.LVL272
-	.4byte	0x2b65
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC33
-	.byte	0
-	.byte	0
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL187
-	.4byte	0x2b91
-	.4byte	0x22bb
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL135
+	.4byte	0x274b
+	.4byte	0x1ffd
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x8
-	.byte	0x88
+	.byte	0x89
 	.sleb128 0
 	.byte	0x33
 	.byte	0x24
-	.byte	0x8a
+	.byte	0x8b
 	.sleb128 0
 	.byte	0x22
 	.byte	0x6
 	.byte	0
-	.uleb128 0x4f
-	.8byte	.LVL197
-	.4byte	0x2b65
-	.uleb128 0x42
-	.8byte	.LVL199
-	.4byte	0x2b9c
-	.4byte	0x22eb
-	.uleb128 0x34
+	.uleb128 0x45
+	.8byte	.LVL139
+	.4byte	0x26f3
+	.uleb128 0x38
+	.8byte	.LVL141
+	.4byte	0x2756
+	.4byte	0x202d
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x1
 	.byte	0x30
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x8
 	.byte	0x8f
 	.sleb128 0
-	.byte	0x8a
+	.byte	0x8b
 	.sleb128 0
 	.byte	0x22
 	.byte	0x23
-	.uleb128 0x130
-	.byte	0
-	.uleb128 0x4f
-	.8byte	.LVL202
-	.4byte	0x25e7
-	.uleb128 0x4f
-	.8byte	.LVL203
-	.4byte	0x2692
-	.uleb128 0x42
-	.8byte	.LVL204
-	.4byte	0x2b65
-	.4byte	0x2324
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC36
+	.uleb128 0x110
 	.byte	0
-	.uleb128 0x4f
-	.8byte	.LVL207
-	.4byte	0x25e7
-	.uleb128 0x4f
-	.8byte	.LVL208
-	.4byte	0x270b
-	.uleb128 0x4f
-	.8byte	.LVL215
-	.4byte	0x2692
-	.uleb128 0x4f
-	.8byte	.LVL216
-	.4byte	0x25e7
-	.uleb128 0x4f
-	.8byte	.LVL220
-	.4byte	0x25e7
-	.uleb128 0x42
-	.8byte	.LVL221
-	.4byte	0x2b65
-	.4byte	0x2389
-	.uleb128 0x34
+	.uleb128 0x45
+	.8byte	.LVL143
+	.4byte	0x2761
+	.uleb128 0x45
+	.8byte	.LVL144
+	.4byte	0x23eb
+	.uleb128 0x45
+	.8byte	.LVL145
+	.4byte	0x241b
+	.uleb128 0x38
+	.8byte	.LVL146
+	.4byte	0x26f3
+	.4byte	0x2073
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC30
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x3a
+	.8byte	.LC26
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL225
-	.4byte	0x2b65
-	.4byte	0x23a9
-	.uleb128 0x34
+	.uleb128 0x45
+	.8byte	.LVL148
+	.4byte	0x23eb
+	.uleb128 0x45
+	.8byte	.LVL149
+	.4byte	0x22b9
+	.uleb128 0x45
+	.8byte	.LVL150
+	.4byte	0x23eb
+	.uleb128 0x38
+	.8byte	.LVL161
+	.4byte	0x26f3
+	.4byte	0x20b8
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x4
-	.byte	0x8f
-	.sleb128 224
-	.byte	0x6
-	.uleb128 0x34
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x8a
+	.byte	0x89
 	.sleb128 0
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL226
-	.4byte	0x2b65
-	.4byte	0x23d5
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL162
+	.4byte	0x26f3
+	.4byte	0x20d6
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x4
-	.byte	0x8f
-	.sleb128 216
-	.byte	0x6
-	.uleb128 0x34
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x89
+	.byte	0x83
 	.sleb128 0
-	.uleb128 0x34
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL163
+	.4byte	0x241b
+	.uleb128 0x45
+	.8byte	.LVL164
+	.4byte	0x189b
+	.uleb128 0x45
+	.8byte	.LVL167
+	.4byte	0x244c
+	.uleb128 0x45
+	.8byte	.LVL170
+	.4byte	0x1c44
+	.uleb128 0x38
+	.8byte	.LVL173
+	.4byte	0x22b9
+	.4byte	0x2126
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
-	.uleb128 0x2
-	.byte	0x87
+	.uleb128 0x6
+	.byte	0x8c
 	.sleb128 0
-	.uleb128 0x34
+	.byte	0xa
+	.2byte	0x3fc
+	.byte	0x1a
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL176
+	.4byte	0x241b
+	.uleb128 0x45
+	.8byte	.LVL177
+	.4byte	0x189b
+	.uleb128 0x45
+	.8byte	.LVL180
+	.4byte	0x244c
+	.uleb128 0x45
+	.8byte	.LVL183
+	.4byte	0x1c44
+	.uleb128 0x45
+	.8byte	.LVL185
+	.4byte	0x276c
+	.uleb128 0x38
+	.8byte	.LVL192
+	.4byte	0x26f3
+	.4byte	0x2198
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC25
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0xe
+	.byte	0x86
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x9
+	.byte	0xe5
+	.byte	0x24
+	.byte	0x9
+	.byte	0xe5
+	.byte	0x26
 	.byte	0x88
 	.sleb128 0
+	.byte	0x22
+	.byte	0x6
 	.byte	0
-	.uleb128 0x4f
-	.8byte	.LVL227
-	.4byte	0x2692
-	.uleb128 0x42
-	.8byte	.LVL228
-	.4byte	0x1aae
-	.4byte	0x2400
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL195
+	.4byte	0x26f3
+	.4byte	0x21bc
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x2
-	.byte	0x87
-	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC28
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
+	.uleb128 0x1
+	.byte	0x3a
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL231
-	.4byte	0x28f1
-	.4byte	0x241e
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL205
+	.4byte	0x2777
+	.4byte	0x21e1
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 296
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x51
 	.uleb128 0x2
-	.byte	0x87
+	.byte	0x85
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x51
+	.byte	0x52
 	.uleb128 0x2
-	.byte	0x88
+	.byte	0x84
 	.sleb128 0
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL234
-	.4byte	0x1e16
-	.4byte	0x243c
-	.uleb128 0x34
+	.uleb128 0x45
+	.8byte	.LVL208
+	.4byte	0x241b
+	.uleb128 0x45
+	.8byte	.LVL209
+	.4byte	0x23eb
+	.uleb128 0x38
+	.8byte	.LVL213
+	.4byte	0x26f3
+	.4byte	0x2219
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x87
+	.byte	0x8a
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x88
+	.byte	0x89
 	.sleb128 0
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL237
-	.4byte	0x270b
-	.4byte	0x2458
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x6
-	.byte	0x8b
-	.sleb128 0
-	.byte	0xa
-	.2byte	0x3fc
-	.byte	0x1a
-	.byte	0
-	.uleb128 0x4f
-	.8byte	.LVL240
-	.4byte	0x2692
-	.uleb128 0x42
-	.8byte	.LVL241
-	.4byte	0x1aae
-	.4byte	0x2483
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x87
-	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL244
-	.4byte	0x28f1
-	.4byte	0x24a1
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x87
-	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL247
-	.4byte	0x1e16
-	.4byte	0x24bf
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x87
-	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
-	.byte	0
-	.uleb128 0x4f
-	.8byte	.LVL249
-	.4byte	0x2ba7
-	.uleb128 0x42
-	.8byte	.LVL255
-	.4byte	0x2b65
-	.4byte	0x2504
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC35
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x15
-	.byte	0x83
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x9
-	.byte	0xe5
-	.byte	0x24
-	.byte	0x9
-	.byte	0xe5
-	.byte	0x26
-	.byte	0x3
-	.8byte	.LANCHOR2
-	.byte	0x22
-	.byte	0x6
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL281
-	.4byte	0x2b65
-	.4byte	0x2522
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8a
-	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x89
-	.sleb128 0
-	.byte	0
-	.uleb128 0x4f
-	.8byte	.LVL286
-	.4byte	0x1aae
-	.uleb128 0x4f
-	.8byte	.LVL288
-	.4byte	0x2ba7
-	.uleb128 0x4f
-	.8byte	.LVL293
-	.4byte	0x28f1
-	.uleb128 0x4f
-	.8byte	.LVL294
-	.4byte	0x1e16
-	.uleb128 0x42
-	.8byte	.LVL299
-	.4byte	0x2b65
-	.4byte	0x257b
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC28
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x87
-	.sleb128 0
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL300
-	.4byte	0x2bb2
-	.4byte	0x259f
-	.uleb128 0x34
+	.uleb128 0x45
+	.8byte	.LVL218
+	.4byte	0x189b
+	.uleb128 0x45
+	.8byte	.LVL220
+	.4byte	0x276c
+	.uleb128 0x45
+	.8byte	.LVL223
+	.4byte	0x244c
+	.uleb128 0x45
+	.8byte	.LVL224
+	.4byte	0x1c44
+	.uleb128 0x38
+	.8byte	.LVL231
+	.4byte	0x2782
+	.4byte	0x2271
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x35
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x1
 	.byte	0x30
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0x8f
-	.sleb128 240
+	.sleb128 208
 	.byte	0
-	.uleb128 0x33
-	.8byte	.LVL303
-	.4byte	0x2b65
-	.uleb128 0x34
+	.uleb128 0x3a
+	.8byte	.LVL234
+	.4byte	0x26f3
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC29
-	.uleb128 0x34
+	.8byte	.LC21
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x86
+	.byte	0x87
 	.sleb128 0
 	.byte	0
 	.byte	0
@@ -6982,736 +6023,625 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0x67c
 	.uleb128 0xb
 	.4byte	0x109
-	.4byte	0x25d7
+	.4byte	0x22a9
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x4
 	.byte	0
 	.uleb128 0xb
 	.4byte	0x109
-	.4byte	0x25e7
+	.4byte	0x22b9
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x3
 	.byte	0
-	.uleb128 0x4d
-	.4byte	.LASF456
-	.byte	0x1
-	.byte	0xa4
+	.uleb128 0x46
+	.4byte	.LASF449
+	.byte	0x2
+	.byte	0x36
 	.4byte	0x59
-	.8byte	.LFB257
-	.8byte	.LFE257-.LFB257
+	.8byte	.LFB255
+	.8byte	.LFE255-.LFB255
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2692
-	.uleb128 0x36
-	.string	"uv"
-	.byte	0x1
-	.byte	0xa4
-	.4byte	0x59
-	.4byte	.LLST1
-	.uleb128 0x3a
-	.string	"dev"
-	.byte	0x1
-	.byte	0xa6
-	.4byte	0x25d
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -8
-	.uleb128 0x32
+	.4byte	0x23eb
+	.uleb128 0x31
+	.4byte	.LASF450
+	.byte	0x2
+	.byte	0x36
+	.4byte	0xa8
+	.4byte	.LLST29
+	.uleb128 0x31
+	.4byte	.LASF451
+	.byte	0x2
+	.byte	0x36
+	.4byte	0xa8
+	.4byte	.LLST30
+	.uleb128 0x31
+	.4byte	.LASF452
+	.byte	0x2
+	.byte	0x36
+	.4byte	0x109
+	.4byte	.LLST31
+	.uleb128 0x43
+	.string	"i"
+	.byte	0x2
+	.byte	0x39
+	.4byte	0xa8
+	.4byte	.LLST32
+	.uleb128 0x42
+	.4byte	.LASF453
+	.byte	0x2
+	.byte	0x3a
+	.4byte	0xa8
+	.4byte	.LLST33
+	.uleb128 0x42
+	.4byte	.LASF454
+	.byte	0x2
+	.byte	0x3a
+	.4byte	0xa8
+	.4byte	.LLST34
+	.uleb128 0x42
+	.4byte	.LASF455
+	.byte	0x2
+	.byte	0x3a
+	.4byte	0xa8
+	.4byte	.LLST35
+	.uleb128 0x43
 	.string	"ret"
-	.byte	0x1
-	.byte	0xa7
+	.byte	0x2
+	.byte	0x3b
 	.4byte	0x59
-	.4byte	.LLST2
-	.uleb128 0x42
-	.8byte	.LVL11
-	.4byte	0x2bbd
-	.4byte	0x2658
-	.uleb128 0x34
+	.4byte	.LLST36
+	.uleb128 0x45
+	.8byte	.LVL111
+	.4byte	0x278d
+	.uleb128 0x38
+	.8byte	.LVL113
+	.4byte	0x26f3
+	.4byte	0x2381
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC2
-	.uleb128 0x34
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x8f
-	.sleb128 56
-	.byte	0
-	.uleb128 0x4f
-	.8byte	.LVL14
-	.4byte	0x2b65
-	.uleb128 0x42
-	.8byte	.LVL18
-	.4byte	0x2bc9
-	.4byte	0x267d
-	.uleb128 0x34
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x51
+	.byte	0x52
 	.uleb128 0x2
 	.byte	0x84
 	.sleb128 0
 	.byte	0
-	.uleb128 0x33
-	.8byte	.LVL21
-	.4byte	0x2bd5
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL114
+	.4byte	0x241b
+	.4byte	0x239f
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x64
+	.uleb128 0x8
+	.byte	0x84
+	.sleb128 0
+	.byte	0xc
+	.4byte	0xffffffc0
+	.byte	0x1a
 	.byte	0
+	.uleb128 0x38
+	.8byte	.LVL117
+	.4byte	0x189b
+	.4byte	0x23b8
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x40
+	.byte	0x40
+	.byte	0x24
 	.byte	0
-	.uleb128 0x4d
-	.4byte	.LASF457
-	.byte	0x1
-	.byte	0x92
-	.4byte	0x59
-	.8byte	.LFB256
-	.8byte	.LFE256-.LFB256
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x270b
-	.uleb128 0x31
-	.4byte	.LASF458
-	.byte	0x1
-	.byte	0x92
-	.4byte	0x109
-	.4byte	.LLST0
-	.uleb128 0x4f
-	.8byte	.LVL2
-	.4byte	0x2be0
-	.uleb128 0x4f
-	.8byte	.LVL3
-	.4byte	0x2beb
-	.uleb128 0x4f
-	.8byte	.LVL4
-	.4byte	0x2bf6
-	.uleb128 0x33
-	.8byte	.LVL7
-	.4byte	0x2b65
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL120
+	.4byte	0x26f3
+	.4byte	0x23dd
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x34
+	.8byte	.LC17
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x83
+	.byte	0x8a
 	.sleb128 0
 	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL125
+	.4byte	0x276c
 	.byte	0
-	.uleb128 0x4d
-	.4byte	.LASF459
-	.byte	0x1
-	.byte	0x67
+	.uleb128 0x30
+	.4byte	.LASF456
+	.byte	0x2
+	.byte	0x31
 	.4byte	0x59
-	.8byte	.LFB255
-	.8byte	.LFE255-.LFB255
+	.8byte	.LFB254
+	.8byte	.LFE254-.LFB254
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x241b
+	.uleb128 0x47
+	.string	"uv"
+	.byte	0x2
+	.byte	0x31
+	.4byte	0xa8
+	.4byte	.LLST8
+	.byte	0
+	.uleb128 0x30
+	.4byte	.LASF457
+	.byte	0x2
+	.byte	0x2c
+	.4byte	0x59
+	.8byte	.LFB253
+	.8byte	.LFE253-.LFB253
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2869
+	.4byte	0x244c
 	.uleb128 0x31
-	.4byte	.LASF460
+	.4byte	.LASF455
+	.byte	0x2
+	.byte	0x2c
+	.4byte	0x109
+	.4byte	.LLST7
+	.byte	0
+	.uleb128 0x30
+	.4byte	.LASF458
 	.byte	0x1
-	.byte	0x67
-	.4byte	0xa8
-	.4byte	.LLST17
+	.byte	0x2d
+	.4byte	0x59
+	.8byte	.LFB200
+	.8byte	.LFE200-.LFB200
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x26d2
 	.uleb128 0x31
-	.4byte	.LASF461
+	.4byte	.LASF431
 	.byte	0x1
-	.byte	0x67
-	.4byte	0xa8
-	.4byte	.LLST18
+	.byte	0x2d
+	.4byte	0x109
+	.4byte	.LLST0
 	.uleb128 0x31
-	.4byte	.LASF462
+	.4byte	.LASF377
 	.byte	0x1
-	.byte	0x67
+	.byte	0x2d
 	.4byte	0x109
-	.4byte	.LLST19
-	.uleb128 0x32
-	.string	"i"
+	.4byte	.LLST1
+	.uleb128 0x42
+	.4byte	.LASF459
 	.byte	0x1
-	.byte	0x6b
+	.byte	0x2f
 	.4byte	0xa8
-	.4byte	.LLST20
-	.uleb128 0x37
-	.4byte	.LASF463
+	.4byte	.LLST2
+	.uleb128 0x43
+	.string	"i"
 	.byte	0x1
-	.byte	0x6c
+	.byte	0x2f
 	.4byte	0xa8
-	.4byte	.LLST21
-	.uleb128 0x37
-	.4byte	.LASF464
+	.4byte	.LLST3
+	.uleb128 0x43
+	.string	"j"
 	.byte	0x1
-	.byte	0x6c
+	.byte	0x2f
 	.4byte	0xa8
-	.4byte	.LLST22
-	.uleb128 0x37
-	.4byte	.LASF458
+	.4byte	.LLST4
+	.uleb128 0x43
+	.string	"q"
 	.byte	0x1
-	.byte	0x6c
+	.byte	0x2f
 	.4byte	0xa8
-	.4byte	.LLST23
+	.4byte	.LLST5
 	.uleb128 0x32
-	.string	"ret"
+	.string	"buf"
 	.byte	0x1
-	.byte	0x6d
-	.4byte	0x59
-	.4byte	.LLST24
-	.uleb128 0x4f
-	.8byte	.LVL73
-	.4byte	0x2c01
-	.uleb128 0x4f
-	.8byte	.LVL75
-	.4byte	0x2be0
-	.uleb128 0x42
-	.8byte	.LVL78
-	.4byte	0x2b65
-	.4byte	0x27da
-	.uleb128 0x34
+	.byte	0x30
+	.4byte	0x1e70
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -32
+	.uleb128 0x43
+	.string	"p"
+	.byte	0x1
+	.byte	0x31
+	.4byte	0x1379
+	.4byte	.LLST6
+	.uleb128 0x48
+	.4byte	.LASF460
+	.4byte	0x26e2
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC35
+	.uleb128 0x38
+	.8byte	.LVL2
+	.4byte	0x26f3
+	.4byte	0x250e
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.byte	0
+	.uleb128 0x38
+	.8byte	.LVL4
+	.4byte	0x26f3
+	.4byte	0x252e
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
+	.uleb128 0x4
+	.byte	0x8f
+	.sleb128 200
+	.byte	0x6
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x51
 	.uleb128 0x2
-	.byte	0x86
+	.byte	0x84
 	.sleb128 0
-	.uleb128 0x34
+	.byte	0
+	.uleb128 0x38
+	.8byte	.LVL6
+	.4byte	0x26f3
+	.4byte	0x254e
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x8f
+	.sleb128 192
+	.byte	0x6
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x85
+	.byte	0x8b
 	.sleb128 0
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL79
-	.4byte	0x2beb
-	.4byte	0x27f8
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL8
+	.4byte	0x271e
+	.4byte	0x256c
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x8
-	.byte	0x8a
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
 	.sleb128 0
-	.byte	0xc
-	.4byte	0xffffffff
-	.byte	0x1a
 	.byte	0
-	.uleb128 0x4f
-	.8byte	.LVL80
-	.4byte	0x2bf6
-	.uleb128 0x42
-	.8byte	.LVL83
-	.4byte	0x2b65
-	.4byte	0x281d
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL9
+	.4byte	0x2799
+	.4byte	0x2596
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x87
+	.byte	0x85
 	.sleb128 0
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL84
-	.4byte	0x1aae
-	.4byte	0x2836
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x3
-	.byte	0x40
-	.byte	0x40
-	.byte	0x24
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL87
-	.4byte	0x2b65
-	.4byte	0x285b
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL10
+	.4byte	0x2735
+	.4byte	0x25c5
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC15
-	.uleb128 0x34
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x8b
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x88
 	.sleb128 0
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x1
+	.byte	0x31
 	.byte	0
-	.uleb128 0x4f
-	.8byte	.LVL92
-	.4byte	0x2ba7
+	.uleb128 0x38
+	.8byte	.LVL16
+	.4byte	0x26f3
+	.4byte	0x25e4
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC4
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF465
-	.byte	0x1
-	.byte	0x49
-	.4byte	0x59
-	.byte	0x1
-	.4byte	0x28ba
-	.uleb128 0x3c
-	.string	"arg"
-	.byte	0x1
-	.byte	0x49
-	.4byte	0x1a04
-	.uleb128 0x47
-	.4byte	.LASF420
-	.byte	0x1
-	.byte	0x49
-	.4byte	0x1a04
-	.uleb128 0x47
-	.4byte	.LASF375
-	.byte	0x1
-	.byte	0x49
-	.4byte	0x1a04
-	.uleb128 0x48
-	.string	"i"
-	.byte	0x1
-	.byte	0x4b
-	.4byte	0xa8
-	.uleb128 0x49
-	.4byte	.LASF466
-	.byte	0x1
-	.byte	0x4b
-	.4byte	0xa8
-	.uleb128 0x49
-	.4byte	.LASF467
-	.byte	0x1
-	.byte	0x4c
-	.4byte	0xa8
-	.byte	0
-	.uleb128 0x50
-	.4byte	.LASF493
-	.byte	0x1
-	.byte	0x2d
-	.byte	0x1
-	.4byte	0x28f1
-	.uleb128 0x47
-	.4byte	.LASF420
-	.byte	0x1
-	.byte	0x2d
-	.4byte	0x1a04
-	.uleb128 0x47
-	.4byte	.LASF375
-	.byte	0x1
-	.byte	0x2d
-	.4byte	0x1a04
-	.uleb128 0x48
-	.string	"i"
-	.byte	0x1
-	.byte	0x2f
-	.4byte	0xa8
-	.uleb128 0x49
-	.4byte	.LASF466
-	.byte	0x1
-	.byte	0x2f
-	.4byte	0xa8
-	.byte	0
-	.uleb128 0x35
-	.4byte	.LASF468
-	.byte	0x4
-	.byte	0x2d
-	.4byte	0x59
-	.8byte	.LFB200
-	.8byte	.LFE200-.LFB200
+	.uleb128 0x38
+	.8byte	.LVL17
+	.4byte	0x27a4
+	.4byte	0x25fc
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2b2d
-	.uleb128 0x31
-	.4byte	.LASF420
-	.byte	0x4
-	.byte	0x2d
-	.4byte	0x109
-	.4byte	.LLST42
-	.uleb128 0x31
-	.4byte	.LASF375
-	.byte	0x4
-	.byte	0x2d
-	.4byte	0x109
-	.4byte	.LLST43
-	.uleb128 0x37
-	.4byte	.LASF469
-	.byte	0x4
-	.byte	0x2f
-	.4byte	0xa8
-	.4byte	.LLST44
-	.uleb128 0x32
-	.string	"i"
-	.byte	0x4
-	.byte	0x2f
-	.4byte	0xa8
-	.4byte	.LLST45
-	.uleb128 0x32
-	.string	"j"
-	.byte	0x4
-	.byte	0x2f
-	.4byte	0xa8
-	.4byte	.LLST46
-	.uleb128 0x32
-	.string	"q"
-	.byte	0x4
-	.byte	0x2f
-	.4byte	0xa8
-	.4byte	.LLST47
-	.uleb128 0x3a
-	.string	"buf"
-	.byte	0x4
-	.byte	0x30
-	.4byte	0x2042
+	.byte	0x50
 	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -32
-	.uleb128 0x32
-	.string	"p"
-	.byte	0x4
-	.byte	0x31
-	.4byte	0x1365
-	.4byte	.LLST48
-	.uleb128 0x51
-	.4byte	.LASF470
-	.4byte	0x2b3d
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC45
-	.uleb128 0x42
-	.8byte	.LVL123
-	.4byte	0x2b65
-	.4byte	0x29b3
-	.uleb128 0x34
+	.byte	0x8
+	.byte	0x80
+	.byte	0
+	.uleb128 0x38
+	.8byte	.LVL20
+	.4byte	0x26f3
+	.4byte	0x2621
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC17
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL125
-	.4byte	0x2b65
-	.4byte	0x29d3
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x4
-	.byte	0x8f
-	.sleb128 200
-	.byte	0x6
-	.uleb128 0x34
+	.8byte	.LC5
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
+	.byte	0x8
+	.byte	0x80
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL127
-	.4byte	0x2b65
-	.4byte	0x29f1
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL23
+	.4byte	0x26f3
+	.4byte	0x263f
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x8b
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x8a
+	.byte	0x84
 	.sleb128 0
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL130
-	.4byte	0x1a10
-	.4byte	0x2a1b
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL24
+	.4byte	0x26f3
+	.4byte	0x265d
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x70
+	.byte	0x89
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x78
+	.byte	0x86
 	.sleb128 0
-	.uleb128 0x34
+	.byte	0
+	.uleb128 0x38
+	.8byte	.LVL26
+	.4byte	0x271e
+	.4byte	0x267b
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x52
+	.byte	0x50
 	.uleb128 0x2
-	.byte	0x72
+	.byte	0x85
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x53
+	.byte	0x51
 	.uleb128 0x2
-	.byte	0x87
+	.byte	0x83
 	.sleb128 0
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL131
-	.4byte	0x1904
-	.4byte	0x2a44
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL27
+	.4byte	0x2799
+	.4byte	0x26a5
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x84
+	.byte	0x85
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x52
+	.byte	0x51
 	.uleb128 0x2
-	.byte	0x86
+	.byte	0x83
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x53
+	.byte	0x52
 	.uleb128 0x2
 	.byte	0x87
 	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x54
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL139
-	.4byte	0x2b65
-	.4byte	0x2a63
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC20
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL140
-	.4byte	0x2c0d
-	.4byte	0x2a7b
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x80
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL143
-	.4byte	0x2b65
-	.4byte	0x2aa0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC21
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x51
+	.byte	0x53
 	.uleb128 0x2
-	.byte	0x8
-	.byte	0x80
+	.byte	0x88
+	.sleb128 0
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL146
-	.4byte	0x2b65
-	.4byte	0x2abe
-	.uleb128 0x34
+	.uleb128 0x3a
+	.8byte	.LVL28
+	.4byte	0x2735
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x8a
+	.byte	0x85
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x83
 	.sleb128 0
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL147
-	.4byte	0x2b65
-	.4byte	0x2adc
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x50
+	.byte	0x52
 	.uleb128 0x2
-	.byte	0x88
+	.byte	0x87
 	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL149
-	.4byte	0x1a10
-	.4byte	0x2b06
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x72
-	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x87
-	.sleb128 0
-	.byte	0
-	.uleb128 0x33
-	.8byte	.LVL150
-	.4byte	0x1904
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x86
-	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
-	.byte	0x87
+	.byte	0x88
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x54
 	.uleb128 0x2
-	.byte	0x8b
+	.byte	0x8c
 	.sleb128 0
 	.byte	0
 	.byte	0
 	.uleb128 0xb
 	.4byte	0xe7
-	.4byte	0x2b3d
+	.4byte	0x26e2
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x9
 	.byte	0
 	.uleb128 0x8
-	.4byte	0x2b2d
-	.uleb128 0x52
-	.4byte	0x1a98
-	.8byte	.LFB275
-	.8byte	.LFE275-.LFB275
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2b65
-	.uleb128 0x53
-	.4byte	0x1aa4
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0
-	.uleb128 0x54
-	.4byte	.LASF471
-	.4byte	.LASF471
+	.4byte	0x26d2
+	.uleb128 0x49
+	.4byte	.LASF461
+	.4byte	.LASF461
+	.byte	0x1d
+	.2byte	0x16c
+	.uleb128 0x4a
+	.4byte	.LASF462
+	.4byte	.LASF462
 	.byte	0x25
 	.byte	0x12
-	.uleb128 0x55
+	.uleb128 0x49
+	.4byte	.LASF463
+	.4byte	.LASF463
+	.byte	0x5
+	.2byte	0x258
+	.uleb128 0x4b
+	.4byte	.LASF466
+	.4byte	.LASF466
+	.uleb128 0x4a
+	.4byte	.LASF464
+	.4byte	.LASF464
+	.byte	0x26
+	.byte	0x5f
+	.uleb128 0x4a
+	.4byte	.LASF465
+	.4byte	.LASF465
+	.byte	0x27
+	.byte	0xb
+	.uleb128 0x49
+	.4byte	.LASF466
+	.4byte	.LASF466
+	.byte	0x1d
+	.2byte	0x16d
+	.uleb128 0x4a
+	.4byte	.LASF467
+	.4byte	.LASF467
+	.byte	0x28
+	.byte	0xe
+	.uleb128 0x4a
+	.4byte	.LASF468
+	.4byte	.LASF468
+	.byte	0x28
+	.byte	0x11
+	.uleb128 0x4a
+	.4byte	.LASF469
+	.4byte	.LASF469
+	.byte	0x9
+	.byte	0x2d
+	.uleb128 0x4a
+	.4byte	.LASF470
+	.4byte	.LASF470
+	.byte	0x29
+	.byte	0x29
+	.uleb128 0x4a
+	.4byte	.LASF471
+	.4byte	.LASF471
+	.byte	0x27
+	.byte	0xc
+	.uleb128 0x4a
 	.4byte	.LASF472
 	.4byte	.LASF472
-	.byte	0x1d
-	.2byte	0x16c
-	.uleb128 0x56
-	.4byte	.LASF473
-	.4byte	.LASF473
-	.uleb128 0x55
+	.byte	0x21
+	.byte	0x11
+	.uleb128 0x4a
 	.4byte	.LASF473
 	.4byte	.LASF473
-	.byte	0x1d
-	.2byte	0x16d
-	.uleb128 0x54
+	.byte	0x28
+	.byte	0x12
+	.uleb128 0x4a
 	.4byte	.LASF474
 	.4byte	.LASF474
-	.byte	0xa
-	.byte	0x2d
-	.uleb128 0x54
+	.byte	0x20
+	.byte	0x94
+	.uleb128 0x49
 	.4byte	.LASF475
 	.4byte	.LASF475
-	.byte	0x26
-	.byte	0x29
-	.uleb128 0x54
+	.byte	0x5
+	.2byte	0x2b9
+	.uleb128 0x4a
 	.4byte	.LASF476
 	.4byte	.LASF476
-	.byte	0x21
-	.byte	0x11
-	.uleb128 0x54
+	.byte	0x28
+	.byte	0xd
+	.uleb128 0x49
 	.4byte	.LASF477
 	.4byte	.LASF477
-	.byte	0x20
-	.byte	0x94
-	.uleb128 0x55
-	.4byte	.LASF478
-	.4byte	.LASF478
-	.byte	0x27
-	.2byte	0x1da
-	.uleb128 0x55
-	.4byte	.LASF479
-	.4byte	.LASF479
-	.byte	0x27
-	.2byte	0x116
-	.uleb128 0x54
-	.4byte	.LASF480
-	.4byte	.LASF480
-	.byte	0x28
-	.byte	0xb
-	.uleb128 0x54
-	.4byte	.LASF481
-	.4byte	.LASF481
-	.byte	0x29
-	.byte	0xc
-	.uleb128 0x54
-	.4byte	.LASF482
-	.4byte	.LASF482
-	.byte	0x29
-	.byte	0xa
-	.uleb128 0x54
-	.4byte	.LASF483
-	.4byte	.LASF483
-	.byte	0x29
-	.byte	0xb
-	.uleb128 0x55
-	.4byte	.LASF484
-	.4byte	.LASF484
-	.byte	0x6
-	.2byte	0x2b9
-	.uleb128 0x55
-	.4byte	.LASF485
-	.4byte	.LASF485
 	.byte	0x1d
 	.2byte	0x398
 	.byte	0
@@ -8252,8 +7182,6 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x13
 	.uleb128 0x3f
 	.uleb128 0x19
-	.uleb128 0x2
-	.uleb128 0x18
 	.byte	0
 	.byte	0
 	.uleb128 0x2c
@@ -8327,6 +7255,8 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xb
 	.uleb128 0x27
 	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
 	.uleb128 0x11
 	.uleb128 0x1
 	.uleb128 0x12
@@ -8366,64 +7296,46 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x49
 	.uleb128 0x13
 	.uleb128 0x2
-	.uleb128 0x17
+	.uleb128 0x18
 	.byte	0
 	.byte	0
 	.uleb128 0x33
-	.uleb128 0x4109
+	.uleb128 0x1d
 	.byte	0x1
-	.uleb128 0x11
-	.uleb128 0x1
 	.uleb128 0x31
 	.uleb128 0x13
+	.uleb128 0x52
+	.uleb128 0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.uleb128 0x410a
+	.uleb128 0x5
 	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
 	.uleb128 0x2
-	.uleb128 0x18
-	.uleb128 0x2111
-	.uleb128 0x18
+	.uleb128 0x17
 	.byte	0
 	.byte	0
 	.uleb128 0x35
-	.uleb128 0x2e
-	.byte	0x1
-	.uleb128 0x3f
-	.uleb128 0x19
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
 	.uleb128 0xb
-	.uleb128 0x27
-	.uleb128 0x19
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x12
-	.uleb128 0x7
-	.uleb128 0x40
-	.uleb128 0x18
-	.uleb128 0x2117
-	.uleb128 0x19
-	.uleb128 0x1
-	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0x55
+	.uleb128 0x17
 	.byte	0
 	.byte	0
 	.uleb128 0x36
-	.uleb128 0x5
+	.uleb128 0x34
 	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
+	.uleb128 0x31
 	.uleb128 0x13
 	.uleb128 0x2
 	.uleb128 0x17
@@ -8432,156 +7344,40 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x37
 	.uleb128 0x34
 	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
+	.uleb128 0x31
 	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x17
 	.byte	0
 	.byte	0
 	.uleb128 0x38
-	.uleb128 0x5
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x18
-	.byte	0
-	.byte	0
-	.uleb128 0x39
-	.uleb128 0x5
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x18
-	.byte	0
-	.byte	0
-	.uleb128 0x3a
-	.uleb128 0x34
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x18
-	.byte	0
-	.byte	0
-	.uleb128 0x3b
-	.uleb128 0x2e
+	.uleb128 0x4109
 	.byte	0x1
-	.uleb128 0x3f
-	.uleb128 0x19
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x27
-	.uleb128 0x19
-	.uleb128 0x20
-	.uleb128 0xb
+	.uleb128 0x11
 	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x3c
-	.uleb128 0x5
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x3d
-	.uleb128 0x1d
-	.byte	0x1
 	.uleb128 0x31
 	.uleb128 0x13
-	.uleb128 0x52
-	.uleb128 0x1
-	.uleb128 0x55
-	.uleb128 0x17
-	.uleb128 0x58
-	.uleb128 0xb
-	.uleb128 0x59
-	.uleb128 0xb
 	.uleb128 0x1
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3e
-	.uleb128 0x5
-	.byte	0
-	.uleb128 0x31
-	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x17
-	.byte	0
-	.byte	0
-	.uleb128 0x3f
-	.uleb128 0xb
-	.byte	0x1
-	.uleb128 0x55
-	.uleb128 0x17
-	.byte	0
-	.byte	0
-	.uleb128 0x40
-	.uleb128 0x34
+	.uleb128 0x39
+	.uleb128 0x410a
 	.byte	0
-	.uleb128 0x31
-	.uleb128 0x13
 	.uleb128 0x2
-	.uleb128 0x17
-	.byte	0
-	.byte	0
-	.uleb128 0x41
-	.uleb128 0x34
-	.byte	0
-	.uleb128 0x31
-	.uleb128 0x13
+	.uleb128 0x18
+	.uleb128 0x2111
+	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x42
+	.uleb128 0x3a
 	.uleb128 0x4109
 	.byte	0x1
 	.uleb128 0x11
 	.uleb128 0x1
 	.uleb128 0x31
 	.uleb128 0x13
-	.uleb128 0x1
-	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x43
+	.uleb128 0x3b
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -8596,14 +7392,14 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x44
+	.uleb128 0x3c
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x45
+	.uleb128 0x3d
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -8612,7 +7408,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x46
+	.uleb128 0x3e
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -8631,7 +7427,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x47
+	.uleb128 0x3f
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -8644,7 +7440,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x48
+	.uleb128 0x40
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -8657,7 +7453,20 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
+	.uleb128 0x41
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
 	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x42
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -8668,9 +7477,26 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xb
 	.uleb128 0x49
 	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x4a
+	.uleb128 0x43
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x44
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x3
@@ -8683,21 +7509,16 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x1
 	.byte	0
 	.byte	0
-	.uleb128 0x4b
-	.uleb128 0xb
-	.byte	0x1
+	.uleb128 0x45
+	.uleb128 0x4109
+	.byte	0
 	.uleb128 0x11
 	.uleb128 0x1
-	.uleb128 0x12
-	.uleb128 0x7
-	.byte	0
-	.byte	0
-	.uleb128 0x4c
-	.uleb128 0xb
-	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4d
+	.uleb128 0x46
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -8722,50 +7543,22 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4e
-	.uleb128 0x1d
-	.byte	0x1
-	.uleb128 0x31
-	.uleb128 0x13
-	.uleb128 0x52
-	.uleb128 0x1
-	.uleb128 0x55
-	.uleb128 0x17
-	.uleb128 0x58
-	.uleb128 0xb
-	.uleb128 0x59
+	.uleb128 0x47
 	.uleb128 0x5
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x4f
-	.uleb128 0x4109
-	.byte	0
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x31
-	.uleb128 0x13
-	.byte	0
 	.byte	0
-	.uleb128 0x50
-	.uleb128 0x2e
-	.byte	0x1
 	.uleb128 0x3
-	.uleb128 0xe
+	.uleb128 0x8
 	.uleb128 0x3a
 	.uleb128 0xb
 	.uleb128 0x3b
 	.uleb128 0xb
-	.uleb128 0x27
-	.uleb128 0x19
-	.uleb128 0x20
-	.uleb128 0xb
-	.uleb128 0x1
+	.uleb128 0x49
 	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x51
+	.uleb128 0x48
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -8778,33 +7571,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x52
-	.uleb128 0x2e
-	.byte	0x1
-	.uleb128 0x31
-	.uleb128 0x13
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x12
-	.uleb128 0x7
-	.uleb128 0x40
-	.uleb128 0x18
-	.uleb128 0x2117
-	.uleb128 0x19
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x53
-	.uleb128 0x5
-	.byte	0
-	.uleb128 0x31
-	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x18
-	.byte	0
-	.byte	0
-	.uleb128 0x54
+	.uleb128 0x49
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -8818,10 +7585,10 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x3a
 	.uleb128 0xb
 	.uleb128 0x3b
-	.uleb128 0xb
+	.uleb128 0x5
 	.byte	0
 	.byte	0
-	.uleb128 0x55
+	.uleb128 0x4a
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -8835,10 +7602,10 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x3a
 	.uleb128 0xb
 	.uleb128 0x3b
-	.uleb128 0x5
+	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x56
+	.uleb128 0x4b
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -8854,2991 +7621,2320 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.section	.debug_loc,"",@progbits
 .Ldebug_loc0:
-.LLST76:
-	.8byte	.LVL304
-	.8byte	.LVL306
+.LLST15:
+	.8byte	.LVL61
+	.8byte	.LVL64-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL306
-	.8byte	.LVL307
+	.8byte	.LVL64-1
+	.8byte	.LVL80
 	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL307
-	.8byte	.LVL308
+	.byte	0x63
+	.8byte	.LVL80
+	.8byte	.LVL81
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL308
-	.8byte	.LFE278
-	.2byte	0x1
-	.byte	0x64
+	.8byte	.LVL81
+	.8byte	.LFE271
+	.2byte	0x1
+	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST77:
-	.8byte	.LVL304
-	.8byte	.LVL306
+.LLST16:
+	.8byte	.LVL61
+	.8byte	.LVL63
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL306
-	.8byte	.LFE278
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST78:
-	.8byte	.LVL305
-	.8byte	.LVL306
+	.8byte	.LVL63
+	.8byte	.LVL64-1
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL306
-	.8byte	.LVL307
+	.byte	0x52
+	.8byte	.LVL64-1
+	.8byte	.LVL80
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL307
-	.8byte	.LVL308
+	.8byte	.LVL80
+	.8byte	.LVL81
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
-	.byte	0x50
+	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL308
-	.8byte	.LFE278
+	.8byte	.LVL81
+	.8byte	.LFE271
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST79:
-	.8byte	.LVL305
-	.8byte	.LVL306
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL306
-	.8byte	.LVL307
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL307
-	.8byte	.LVL308
+.LLST17:
+	.8byte	.LVL62
+	.8byte	.LVL63
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL308
-	.8byte	.LVL309
+	.8byte	.LVL63
+	.8byte	.LVL64-1
 	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL309
-	.8byte	.LVL310
-	.2byte	0x3
-	.byte	0x83
-	.sleb128 -4
-	.byte	0x9f
-	.8byte	.LVL310
-	.8byte	.LFE278
+	.byte	0x52
+	.8byte	.LVL64-1
+	.8byte	.LVL79
 	.2byte	0x1
-	.byte	0x63
+	.byte	0x64
+	.8byte	.LVL81
+	.8byte	.LFE271
+	.2byte	0x1
+	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST29:
-	.8byte	.LVL105
-	.8byte	.LVL113
+.LLST18:
+	.8byte	.LVL62
+	.8byte	.LVL64-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL113
-	.8byte	.LVL117
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL117
-	.8byte	.LFE277
+	.8byte	.LVL64-1
+	.8byte	.LVL79
 	.2byte	0x1
-	.byte	0x50
+	.byte	0x63
+	.8byte	.LVL81
+	.8byte	.LFE271
+	.2byte	0x1
+	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST30:
-	.8byte	.LVL105
-	.8byte	.LVL106
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL106
-	.8byte	.LVL108
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
+.LLST19:
+	.8byte	.LVL66
+	.8byte	.LVL67
+	.2byte	0x2
+	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL108
-	.8byte	.LVL114
+	.8byte	.LVL67
+	.8byte	.LVL68
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL114
-	.8byte	.LVL117
-	.2byte	0x8
-	.byte	0xf3
-	.uleb128 0x1
+	.8byte	.LVL73
+	.8byte	.LVL75
+	.2byte	0x1
 	.byte	0x51
-	.byte	0x33
-	.byte	0x25
-	.byte	0x31
-	.byte	0x1c
-	.byte	0x9f
-	.8byte	.LVL117
-	.8byte	.LFE277
+	.8byte	.LVL81
+	.8byte	.LVL83
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST31:
-	.8byte	.LVL105
-	.8byte	.LVL109
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL109
-	.8byte	.LVL115-1
+.LLST20:
+	.8byte	.LVL64
+	.8byte	.LVL65
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL65
+	.8byte	.LVL69
 	.2byte	0x1
-	.byte	0x58
-	.8byte	.LVL115-1
-	.8byte	.LVL117
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
+	.byte	0x66
+	.8byte	.LVL69
+	.8byte	.LVL72
+	.2byte	0x3
+	.byte	0x86
+	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL117
-	.8byte	.LFE277
+	.8byte	.LVL72
+	.8byte	.LVL79
 	.2byte	0x1
-	.byte	0x58
+	.byte	0x66
+	.8byte	.LVL81
+	.8byte	.LVL84
+	.2byte	0x1
+	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST32:
-	.8byte	.LVL105
-	.8byte	.LVL107
+.LLST21:
+	.8byte	.LVL64
+	.8byte	.LVL65
+	.2byte	0x6
+	.byte	0x9e
+	.uleb128 0x4
+	.4byte	0x80808080
+	.8byte	.LVL65
+	.8byte	.LVL79
 	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL107
-	.8byte	.LFE277
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
+	.byte	0x65
+	.8byte	.LVL81
+	.8byte	.LVL84
+	.2byte	0x1
+	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST33:
-	.8byte	.LVL105
-	.8byte	.LVL110
+.LLST22:
+	.8byte	.LVL64
+	.8byte	.LVL65
+	.2byte	0x6
+	.byte	0xc
+	.4byte	0x40404040
+	.byte	0x9f
+	.8byte	.LVL65
+	.8byte	.LVL79
 	.2byte	0x1
-	.byte	0x54
-	.8byte	.LVL110
-	.8byte	.LVL115-1
+	.byte	0x67
+	.8byte	.LVL81
+	.8byte	.LVL84
 	.2byte	0x1
-	.byte	0x5a
-	.8byte	.LVL115-1
-	.8byte	.LVL117
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x54
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST23:
+	.8byte	.LVL62
+	.8byte	.LVL65
+	.2byte	0x2
+	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL117
-	.8byte	.LFE277
-	.2byte	0x1
-	.byte	0x5a
 	.8byte	0
 	.8byte	0
-.LLST34:
-	.8byte	.LVL108
-	.8byte	.LVL113
+.LLST24:
+	.8byte	.LVL64
+	.8byte	.LVL80
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL113
-	.8byte	.LVL117
+	.byte	0x63
+	.8byte	.LVL80
+	.8byte	.LVL81
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL117
-	.8byte	.LFE277
+	.8byte	.LVL81
+	.8byte	.LFE271
 	.2byte	0x1
-	.byte	0x50
+	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST35:
-	.8byte	.LVL108
-	.8byte	.LVL109
+.LLST25:
+	.8byte	.LVL62
+	.8byte	.LVL68
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL72
+	.8byte	.LVL74
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL74
+	.8byte	.LVL76-1
 	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL109
-	.8byte	.LVL115-1
+	.byte	0x55
+	.8byte	.LVL76-1
+	.8byte	.LVL79
 	.2byte	0x1
-	.byte	0x58
-	.8byte	.LVL115-1
-	.8byte	.LVL117
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
+	.byte	0x6c
+	.8byte	.LVL81
+	.8byte	.LFE271
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL117
-	.8byte	.LFE277
-	.2byte	0x1
-	.byte	0x58
 	.8byte	0
 	.8byte	0
-.LLST36:
-	.8byte	.LVL108
-	.8byte	.LVL110
+.LLST26:
+	.8byte	.LVL87
+	.8byte	.LVL88
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL110
-	.8byte	.LVL115-1
+	.8byte	.LVL88
+	.8byte	.LVL89
 	.2byte	0x1
-	.byte	0x57
-	.8byte	.LVL117
-	.8byte	.LVL119
+	.byte	0x50
+	.8byte	.LVL92
+	.8byte	.LVL95
 	.2byte	0x1
-	.byte	0x57
-	.8byte	.LVL119
-	.8byte	.LVL120
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 -1
-	.byte	0x9f
-	.8byte	.LVL120
-	.8byte	.LFE277
+	.byte	0x50
+	.8byte	.LVL101
+	.8byte	.LFE271
 	.2byte	0x1
-	.byte	0x57
+	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST37:
-	.8byte	.LVL108
-	.8byte	.LVL110
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL110
-	.8byte	.LVL115-1
-	.2byte	0x1
-	.byte	0x56
-	.8byte	.LVL117
-	.8byte	.LFE277
+.LLST27:
+	.8byte	.LVL84
+	.8byte	.LVL90
 	.2byte	0x1
-	.byte	0x56
-	.8byte	0
-	.8byte	0
-.LLST38:
-	.8byte	.LVL108
-	.8byte	.LVL110
-	.2byte	0x2
-	.byte	0x30
+	.byte	0x65
+	.8byte	.LVL90
+	.8byte	.LVL91
+	.2byte	0x3
+	.byte	0x85
+	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL110
-	.8byte	.LVL115-1
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL117
-	.8byte	.LFE277
+	.8byte	.LVL91
+	.8byte	.LFE271
 	.2byte	0x1
-	.byte	0x52
+	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST39:
-	.8byte	.LVL108
-	.8byte	.LVL112
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL112
-	.8byte	.LVL115-1
-	.2byte	0x1
-	.byte	0x54
-	.8byte	.LVL117
-	.8byte	.LFE277
-	.2byte	0x2
-	.byte	0x30
+.LLST28:
+	.8byte	.LVL84
+	.8byte	.LVL89
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
 	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST40:
-	.8byte	.LVL108
-	.8byte	.LVL112
-	.2byte	0x2
-	.byte	0x30
+	.8byte	.LVL91
+	.8byte	.LVL94
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL112
-	.8byte	.LVL115-1
+	.8byte	.LVL94
+	.8byte	.LVL101
 	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL117
-	.8byte	.LFE277
-	.2byte	0x2
-	.byte	0x30
+	.byte	0x67
+	.8byte	.LVL101
+	.8byte	.LFE271
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST41:
-	.8byte	.LVL108
-	.8byte	.LVL112
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL112
-	.8byte	.LVL116
+.LLST9:
+	.8byte	.LVL35
+	.8byte	.LVL37
 	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL116
-	.8byte	.LVL117
+	.byte	0x50
+	.8byte	.LVL37
+	.8byte	.LVL45
 	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL45
+	.8byte	.LVL46
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
 	.byte	0x50
-	.8byte	.LVL117
-	.8byte	.LFE277
-	.2byte	0x2
-	.byte	0x30
 	.byte	0x9f
+	.8byte	.LVL46
+	.8byte	.LFE268
+	.2byte	0x1
+	.byte	0x69
 	.8byte	0
 	.8byte	0
-.LLST25:
-	.8byte	.LVL97
-	.8byte	.LVL98
+.LLST10:
+	.8byte	.LVL35
+	.8byte	.LVL36
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL98
-	.8byte	.LVL100
+	.8byte	.LVL36
+	.8byte	.LVL43
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL43
+	.8byte	.LVL46
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL100
-	.8byte	.LFE276
+	.8byte	.LVL46
+	.8byte	.LVL47
 	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL47
+	.8byte	.LVL48
+	.2byte	0x3
+	.byte	0x87
+	.sleb128 32
+	.byte	0x9f
+	.8byte	.LVL48
+	.8byte	.LFE268
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
 	.byte	0x51
+	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST26:
-	.8byte	.LVL97
-	.8byte	.LVL99
+.LLST11:
+	.8byte	.LVL50
+	.8byte	.LVL55
 	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL99
-	.8byte	.LFE276
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST12:
+	.8byte	.LVL41
+	.8byte	.LVL44
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL46
+	.8byte	.LFE268
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST13:
+	.8byte	.LVL50
+	.8byte	.LVL56
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL56
+	.8byte	.LVL57
+	.2byte	0x3
+	.byte	0x85
+	.sleb128 -8
+	.byte	0x9f
+	.8byte	.LVL57
+	.8byte	.LFE268
+	.2byte	0x3
+	.byte	0x88
+	.sleb128 -40
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST27:
-	.8byte	.LVL100
-	.8byte	.LVL101
+.LLST14:
+	.8byte	.LVL38
+	.8byte	.LVL43
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL101
-	.8byte	.LFE276
+	.8byte	.LVL46
+	.8byte	.LVL51
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL51
+	.8byte	.LVL52
 	.2byte	0x1
-	.byte	0x55
-	.8byte	0
-	.8byte	0
-.LLST28:
-	.8byte	.LVL100
-	.8byte	.LVL101
+	.byte	0x50
+	.8byte	.LVL52
+	.8byte	.LVL54
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL101
-	.8byte	.LFE276
+	.8byte	.LVL54
+	.8byte	.LVL58
 	.2byte	0x1
-	.byte	0x54
+	.byte	0x50
+	.8byte	.LVL60
+	.8byte	.LFE268
+	.2byte	0x1
+	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST3:
-	.8byte	.LVL22
-	.8byte	.LVL26-1
+.LLST37:
+	.8byte	.LVL129
+	.8byte	.LVL130
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL26-1
-	.8byte	.LVL40
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL40
-	.8byte	.LVL42
+	.8byte	.LVL130
+	.8byte	.LFE256
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL42
-	.8byte	.LFE274
-	.2byte	0x1
-	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST4:
-	.8byte	.LVL22
-	.8byte	.LVL25
+.LLST38:
+	.8byte	.LVL129
+	.8byte	.LVL132-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL25
-	.8byte	.LVL26-1
+	.8byte	.LVL132-1
+	.8byte	.LFE256
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST39:
+	.8byte	.LVL129
+	.8byte	.LVL132-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL26-1
-	.8byte	.LVL41
+	.8byte	.LVL132-1
+	.8byte	.LVL138
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL41
-	.8byte	.LVL42
+	.8byte	.LVL138
+	.8byte	.LVL228
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
-	.byte	0x51
+	.byte	0x52
 	.byte	0x9f
-	.8byte	.LVL42
-	.8byte	.LFE274
+	.8byte	.LVL228
+	.8byte	.LVL229
 	.2byte	0x1
 	.byte	0x67
+	.8byte	.LVL229
+	.8byte	.LFE256
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST5:
-	.8byte	.LVL24
-	.8byte	.LVL25
+.LLST40:
+	.8byte	.LVL129
+	.8byte	.LVL132-1
 	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL25
-	.8byte	.LVL26-1
+	.byte	0x53
+	.8byte	.LVL132-1
+	.8byte	.LVL145
 	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL26-1
-	.8byte	.LVL39
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL42
-	.8byte	.LFE274
-	.2byte	0x1
-	.byte	0x67
-	.8byte	0
-	.8byte	0
-.LLST6:
-	.8byte	.LVL23
-	.8byte	.LVL26-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL26-1
-	.8byte	.LVL39
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL42
-	.8byte	.LFE274
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST7:
-	.8byte	.LVL28
-	.8byte	.LVL29
-	.2byte	0x2
-	.byte	0x30
+	.byte	0x6a
+	.8byte	.LVL145
+	.8byte	.LVL147
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
 	.byte	0x9f
-	.8byte	.LVL29
-	.8byte	.LVL32-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL35
-	.8byte	.LVL37
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL42
-	.8byte	.LVL44
+	.8byte	.LVL147
+	.8byte	.LVL158
 	.2byte	0x1
-	.byte	0x51
-	.8byte	0
-	.8byte	0
-.LLST8:
-	.8byte	.LVL26
-	.8byte	.LVL27
-	.2byte	0x2
-	.byte	0x30
+	.byte	0x6a
+	.8byte	.LVL158
+	.8byte	.LVL193
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
 	.byte	0x9f
-	.8byte	.LVL27
-	.8byte	.LVL31
+	.8byte	.LVL193
+	.8byte	.LVL196
 	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL31
-	.8byte	.LVL34
-	.2byte	0x3
-	.byte	0x8c
-	.sleb128 -1
+	.byte	0x6a
+	.8byte	.LVL196
+	.8byte	.LVL204
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
 	.byte	0x9f
-	.8byte	.LVL34
-	.8byte	.LVL39
+	.8byte	.LVL204
+	.8byte	.LVL210
 	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL42
-	.8byte	.LVL46
+	.byte	0x6a
+	.8byte	.LVL210
+	.8byte	.LVL226
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL226
+	.8byte	.LVL234
 	.2byte	0x1
-	.byte	0x6c
+	.byte	0x6a
+	.8byte	.LVL234
+	.8byte	.LFE256
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST9:
-	.8byte	.LVL26
-	.8byte	.LVL27
-	.2byte	0x6
-	.byte	0x9e
-	.uleb128 0x4
-	.4byte	0x80808080
-	.8byte	.LVL27
-	.8byte	.LVL39
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL42
-	.8byte	.LVL47
+.LLST41:
+	.8byte	.LVL134
+	.8byte	.LVL136
 	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST10:
-	.8byte	.LVL26
-	.8byte	.LVL27
-	.2byte	0x6
-	.byte	0xc
-	.4byte	0x40404040
+	.byte	0x63
+	.8byte	.LVL136
+	.8byte	.LVL137
+	.2byte	0x3
+	.byte	0x83
+	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL27
-	.8byte	.LVL39
+	.8byte	.LVL137
+	.8byte	.LVL138
 	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL42
-	.8byte	.LVL45
+	.byte	0x63
+	.8byte	.LVL151
+	.8byte	.LVL153
 	.2byte	0x1
-	.byte	0x69
-	.8byte	0
-	.8byte	0
-.LLST11:
-	.8byte	.LVL24
-	.8byte	.LVL27
+	.byte	0x50
+	.8byte	.LVL153
+	.8byte	.LVL154
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST12:
-	.8byte	.LVL26
-	.8byte	.LVL40
+	.8byte	.LVL154
+	.8byte	.LVL155
 	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL40
-	.8byte	.LVL42
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
 	.byte	0x50
+	.8byte	.LVL155
+	.8byte	.LVL156
+	.2byte	0x3
+	.byte	0x70
+	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL42
-	.8byte	.LFE274
+	.8byte	.LVL161
+	.8byte	.LVL186
 	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST13:
-	.8byte	.LVL24
-	.8byte	.LVL30
+	.byte	0x63
+	.8byte	.LVL186
+	.8byte	.LVL187
 	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
+	.byte	0x83
+	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL34
-	.8byte	.LVL36
+	.8byte	.LVL193
+	.8byte	.LVL194
 	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
+	.byte	0x70
+	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL36
-	.8byte	.LVL39
+	.8byte	.LVL196
+	.8byte	.LVL204
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL42
-	.8byte	.LFE274
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST14:
-	.8byte	.LVL50
-	.8byte	.LVL51
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL51
-	.8byte	.LVL53
+	.8byte	.LVL213
+	.8byte	.LVL214
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL56
-	.8byte	.LVL60
+	.byte	0x6c
+	.8byte	.LVL217
+	.8byte	.LVL221
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL63
-	.8byte	.LFE274
+	.byte	0x6c
+	.8byte	.LVL222
+	.8byte	.LVL226
 	.2byte	0x1
-	.byte	0x50
+	.byte	0x6c
+	.8byte	.LVL228
+	.8byte	.LVL230
+	.2byte	0x1
+	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST15:
-	.8byte	.LVL47
-	.8byte	.LVL54
+.LLST42:
+	.8byte	.LVL137
+	.8byte	.LVL138
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL54
-	.8byte	.LVL55
-	.2byte	0x3
-	.byte	0x83
-	.sleb128 -1
-	.byte	0x9f
-	.8byte	.LVL55
-	.8byte	.LFE274
+	.8byte	.LVL140
+	.8byte	.LVL145
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL147
+	.8byte	.LVL159
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL193
+	.8byte	.LVL196
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL204
+	.8byte	.LVL234
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST16:
-	.8byte	.LVL47
-	.8byte	.LVL52
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL55
-	.8byte	.LVL58
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
+.LLST43:
+	.8byte	.LVL165
+	.8byte	.LVL168
+	.2byte	0x2
+	.byte	0x32
 	.byte	0x9f
-	.8byte	.LVL58
-	.8byte	.LVL63
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL63
-	.8byte	.LFE274
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
+	.8byte	.LVL168
+	.8byte	.LVL171
+	.2byte	0x2
+	.byte	0x33
 	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST49:
-	.8byte	.LVL153
-	.8byte	.LVL155
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL155
-	.8byte	.LVL174
-	.2byte	0x1
-	.byte	0x67
+	.8byte	.LVL171
 	.8byte	.LVL174
-	.8byte	.LFE271
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
+	.2byte	0x2
+	.byte	0x34
 	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST50:
-	.8byte	.LVL153
-	.8byte	.LVL154
+	.8byte	.LVL178
+	.8byte	.LVL181
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL181
+	.8byte	.LVL184
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL184
+	.8byte	.LVL186
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL196
+	.8byte	.LVL197
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL197
+	.8byte	.LVL198
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL198
+	.8byte	.LVL199
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL200
+	.8byte	.LVL201
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL201
+	.8byte	.LVL202
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL202
+	.8byte	.LVL204
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL219
+	.8byte	.LVL222
 	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL154
-	.8byte	.LVL162
+	.byte	0x63
+	.8byte	.LVL225
+	.8byte	.LVL226
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL162
-	.8byte	.LVL163
-	.2byte	0x3
-	.byte	0x83
-	.sleb128 32
-	.byte	0x9f
-	.8byte	.LVL163
-	.8byte	.LFE271
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL160
-	.8byte	.LVL164
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+	.8byte	.LVL157
+	.8byte	.LVL159
 	.2byte	0x2
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 	.byte	0x9f
-	.8byte	.LVL164
-	.8byte	.LVL167
+	.8byte	.LVL159
+	.8byte	.LVL193
 	.2byte	0x1
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+	.8byte	.LVL196
+	.8byte	.LVL204
+	.2byte	0x1
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-	.8byte	.LVL167
-	.8byte	.LVL173
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+	.8byte	.LVL131
+	.8byte	.LVL145
+	.2byte	0x2
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+	.8byte	.LVL190
+	.2byte	0x2
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+	.8byte	.LVL193
+	.8byte	.LVL206
+	.2byte	0x2
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+	.8byte	.LVL206
+	.8byte	.LVL207
 	.2byte	0x1
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+	.8byte	.LVL226
+	.2byte	0x1
+	.byte	0x6b
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+	.2byte	0x1
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+	.8byte	.LVL234
+	.2byte	0x2
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-	.8byte	.LVL160
-	.8byte	.LVL164
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+	.8byte	.LVL131
+	.8byte	.LVL145
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-	.8byte	.LVL168
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+	.8byte	.LVL153
 	.2byte	0x1
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-	.8byte	.LVL169
-	.2byte	0x3
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-	.sleb128 -8
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+	.8byte	.LVL193
+	.8byte	.LVL196
+	.2byte	0x2
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-	.8byte	.LVL173
-	.2byte	0x3
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-	.sleb128 -40
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+	.8byte	.LVL234
+	.2byte	0x2
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-	.8byte	.LVL169
-	.8byte	.LVL173
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+	.8byte	.LVL131
+	.8byte	.LVL142
+	.2byte	0x2
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-	.8byte	0
-	.8byte	0
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-	.8byte	.LVL156
-	.8byte	.LVL166
+	.byte	0x50
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+	.8byte	.LVL145
+	.2byte	0x1
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+	.2byte	0x1
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+	.8byte	.LVL165
 	.2byte	0x2
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 	.8byte	.LVL166
-	.8byte	.LVL170
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL172
-	.8byte	.LFE271
+	.8byte	.LVL166
+	.8byte	.LVL168
+	.2byte	0x1
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 	.2byte	0x1
 	.byte	0x50
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-	.8byte	0
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-	.8byte	.LVL159
-	.8byte	.LVL161
+	.8byte	.LVL169
+	.8byte	.LVL171
 	.2byte	0x1
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-	.8byte	0
-	.8byte	0
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-	.8byte	.LVL158
-	.8byte	.LVL159
+	.byte	0x68
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+	.8byte	.LVL172
 	.2byte	0x1
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-	.8byte	0
-	.8byte	0
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+	.byte	0x50
+	.8byte	.LVL172
+	.8byte	.LVL174
+	.2byte	0x1
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+	.8byte	.LVL174
 	.8byte	.LVL175
-	.8byte	.LVL176
 	.2byte	0x1
 	.byte	0x50
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-	.8byte	.LFE258
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
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-	.8byte	0
-	.8byte	0
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 	.8byte	.LVL175
 	.8byte	.LVL178
 	.2byte	0x1
-	.byte	0x51
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 	.8byte	.LVL178
-	.8byte	.LFE258
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
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-	.8byte	0
-	.8byte	0
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-	.8byte	.LVL175
-	.8byte	.LVL177
+	.8byte	.LVL179
 	.2byte	0x1
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-	.8byte	.LVL177
-	.8byte	.LVL196
+	.byte	0x50
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+	.8byte	.LVL180-1
 	.2byte	0x1
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-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
 	.byte	0x52
-	.byte	0x9f
-	.8byte	.LVL296
-	.8byte	.LVL297
+	.8byte	.LVL180-1
+	.8byte	.LVL181
+	.2byte	0x3
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+	.sleb128 196
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+	.8byte	.LVL182
+	.2byte	0x1
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+	.8byte	.LVL184
 	.2byte	0x1
 	.byte	0x66
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-	.8byte	.LFE258
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
+	.8byte	.LVL184
+	.8byte	.LVL185-1
+	.2byte	0x1
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+	.2byte	0x1
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+	.2byte	0x2
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-	.8byte	0
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-	.8byte	.LVL175
-	.8byte	.LVL178
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+	.8byte	.LVL191
 	.2byte	0x1
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+	.2byte	0x1
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 	.8byte	.LVL203
 	.2byte	0x1
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-	.8byte	.LVL205
-	.2byte	0x4
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-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
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-	.8byte	.LVL217
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 	.2byte	0x1
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-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
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-	.8byte	.LVL223
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+	.8byte	.LVL211
 	.2byte	0x1
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-	.8byte	.LVL256
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
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+	.8byte	.LVL211
+	.8byte	.LVL214
+	.2byte	0x2
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-	.8byte	.LVL260
+	.8byte	.LVL214
+	.8byte	.LVL216
 	.2byte	0x1
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-	.8byte	.LVL268
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
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+	.8byte	.LVL216
+	.8byte	.LVL219
+	.2byte	0x2
+	.byte	0x30
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-	.8byte	.LVL279
+	.8byte	.LVL219
+	.8byte	.LVL220-1
 	.2byte	0x1
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-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
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+	.byte	0x50
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+	.8byte	.LVL222
 	.2byte	0x1
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-	.8byte	.LFE258
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
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+	.2byte	0x2
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-	.8byte	0
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-	.8byte	.LVL186
-	.8byte	.LVL188
+	.8byte	.LVL225
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 	.2byte	0x1
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-	.2byte	0x3
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-	.sleb128 1
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 	.2byte	0x1
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 	.2byte	0x2
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 	.2byte	0x1
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-	.byte	0x89
-	.sleb128 1
-	.byte	0x9f
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-	.8byte	.LVL258
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+	.2byte	0x1
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+	.8byte	.LVL131
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 	.2byte	0x2
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 	.2byte	0x2
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-	.2byte	0x1
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-	.2byte	0x1
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-	.8byte	.LVL285
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-	.2byte	0x1
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-	.8byte	.LVL292
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+	.8byte	.LVL189
 	.2byte	0x1
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 	.2byte	0x1
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+	.2byte	0x2
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-	.8byte	.LVL195
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+	.8byte	.LVL157
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 	.2byte	0x1
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+	.byte	0x6c
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+	.8byte	.LVL103
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 	.2byte	0x1
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 	.2byte	0x1
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-	.8byte	.LVL260
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 	.2byte	0x1
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 	.2byte	0x1
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+	.8byte	.LFE255
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+	.8byte	.LVL103
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 	.2byte	0x1
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-	.8byte	.LVL229
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-	.2byte	0x2
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-	.2byte	0x2
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-	.2byte	0x2
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-	.2byte	0x2
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-	.2byte	0x2
-	.byte	0x33
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-	.2byte	0x2
-	.byte	0x34
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-	.2byte	0x2
-	.byte	0x32
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-	.2byte	0x2
-	.byte	0x33
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-	.2byte	0x2
-	.byte	0x34
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+	.8byte	.LVL103
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 	.2byte	0x1
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 	.2byte	0x1
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 	.2byte	0x1
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-	.8byte	.LVL222
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+	.8byte	.LVL109
+	.8byte	.LVL110
 	.2byte	0x2
 	.byte	0x30
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-	.2byte	0x1
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+	.8byte	.LVL110
+	.8byte	.LVL123
 	.2byte	0x1
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+	.8byte	.LVL124
+	.8byte	.LFE255
 	.2byte	0x1
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 	.8byte	0
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-	.8byte	.LVL178
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+	.8byte	.LVL109
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 	.2byte	0x1
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-	.byte	0x9f
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+	.byte	0x65
+	.8byte	.LVL124
+	.8byte	.LFE255
 	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL296
-	.8byte	.LVL303
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
+	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST67:
-	.8byte	.LVL178
-	.8byte	.LVL200
-	.2byte	0x2
-	.byte	0x30
+.LLST34:
+	.8byte	.LVL111
+	.8byte	.LVL112
+	.2byte	0x9
+	.byte	0x70
+	.sleb128 0
+	.byte	0x85
+	.sleb128 0
+	.byte	0x1d
+	.byte	0x83
+	.sleb128 0
+	.byte	0x22
 	.byte	0x9f
-	.8byte	.LVL200
-	.8byte	.LVL201
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL201
-	.8byte	.LVL203
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL205
-	.8byte	.LVL206
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL206
-	.8byte	.LVL209
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL209
-	.8byte	.LVL211
+	.8byte	0
+	.8byte	0
+.LLST35:
+	.8byte	.LVL115
+	.8byte	.LVL116
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL211
-	.8byte	.LVL218
+	.8byte	.LVL116
+	.8byte	.LVL120
 	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL218
-	.8byte	.LVL219
+	.byte	0x6a
+	.8byte	.LVL124
+	.8byte	.LVL126
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL219
-	.8byte	.LVL223
+	.byte	0x6a
+	.8byte	.LVL127
+	.8byte	.LFE255
 	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL223
-	.8byte	.LVL229
+	.byte	0x6a
+	.8byte	0
+	.8byte	0
+.LLST36:
+	.8byte	.LVL103
+	.8byte	.LVL118
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL229
-	.8byte	.LVL230
+	.8byte	.LVL118
+	.8byte	.LVL119
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL230
-	.8byte	.LVL232
+	.8byte	.LVL119
+	.8byte	.LVL120
 	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL232
-	.8byte	.LVL233
+	.byte	0x64
+	.8byte	.LVL124
+	.8byte	.LVL125-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL233
-	.8byte	.LVL235
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL235
-	.8byte	.LVL236
+	.8byte	.LVL125-1
+	.8byte	.LVL126
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL236
-	.8byte	.LVL238
+	.byte	0x64
+	.8byte	.LVL127
+	.8byte	.LFE255
 	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL238
-	.8byte	.LVL239
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST8:
+	.8byte	.LVL33
+	.8byte	.LVL34
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL239
-	.8byte	.LVL242
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL242
-	.8byte	.LVL243
-	.2byte	0x1
+	.8byte	.LVL34
+	.8byte	.LFE254
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
 	.byte	0x50
-	.8byte	.LVL243
-	.8byte	.LVL244-1
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL244-1
-	.8byte	.LVL245
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 212
-	.8byte	.LVL245
-	.8byte	.LVL246
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST7:
+	.8byte	.LVL31
+	.8byte	.LVL32
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL246
-	.8byte	.LVL248
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL248
-	.8byte	.LVL249-1
-	.2byte	0x1
+	.8byte	.LVL32
+	.8byte	.LFE253
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
 	.byte	0x50
-	.8byte	.LVL249-1
-	.8byte	.LVL250
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL250
-	.8byte	.LVL252
-	.2byte	0x2
-	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL252
-	.8byte	.LVL256
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL256
-	.8byte	.LVL260
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL260
-	.8byte	.LVL263
+	.8byte	0
+	.8byte	0
+.LLST0:
+	.8byte	.LVL0
+	.8byte	.LVL1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL263
-	.8byte	.LVL264
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL264
-	.8byte	.LVL267
+	.8byte	.LVL1
+	.8byte	.LVL12
 	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL12
+	.8byte	.LVL13
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
 	.byte	0x50
-	.8byte	.LVL267
-	.8byte	.LVL268
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL268
-	.8byte	.LVL273
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL274
-	.8byte	.LVL279
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL279
-	.8byte	.LVL282
-	.2byte	0x2
-	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL282
-	.8byte	.LVL284
+	.8byte	.LVL13
+	.8byte	.LFE200
 	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL284
-	.8byte	.LVL287
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL287
-	.8byte	.LVL288-1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST1:
+	.8byte	.LVL0
+	.8byte	.LVL2-1
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL288-1
-	.8byte	.LVL292
+	.byte	0x51
+	.8byte	.LVL2-1
+	.8byte	.LVL12
 	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL292
-	.8byte	.LVL295
-	.2byte	0x2
-	.byte	0x30
+	.byte	0x68
+	.8byte	.LVL12
+	.8byte	.LVL13
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL295
-	.8byte	.LVL296
+	.8byte	.LVL13
+	.8byte	.LFE200
 	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL296
-	.8byte	.LVL301
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST2:
+	.8byte	.LVL2
+	.8byte	.LVL3
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL301
-	.8byte	.LVL302
+	.8byte	.LVL3
+	.8byte	.LVL11
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL302
-	.8byte	.LVL303-1
+	.byte	0x64
+	.8byte	.LVL13
+	.8byte	.LVL22
 	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL303-1
-	.8byte	.LVL303
+	.byte	0x64
+	.8byte	.LVL23
+	.8byte	.LFE200
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST68:
-	.8byte	.LVL178
-	.8byte	.LVL203
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL205
-	.8byte	.LVL252
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL252
-	.8byte	.LVL253
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL256
-	.8byte	.LVL282
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL282
-	.8byte	.LVL283
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL284
-	.8byte	.LVL303
+.LLST3:
+	.8byte	.LVL24
+	.8byte	.LVL25
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST69:
-	.8byte	.LVL222
-	.8byte	.LVL254
+.LLST4:
+	.8byte	.LVL4
+	.8byte	.LVL11
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL260
-	.8byte	.LVL268
+	.8byte	.LVL13
+	.8byte	.LVL21
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	0
-	.8byte	0
-.LLST70:
-	.8byte	.LVL178
-	.8byte	.LVL185
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL189
-	.8byte	.LVL195
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST71:
-	.8byte	.LVL178
-	.8byte	.LVL185
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL189
-	.8byte	.LVL195
+	.8byte	.LVL22
+	.8byte	.LFE200
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST72:
-	.8byte	.LVL178
-	.8byte	.LVL179
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL179
-	.8byte	.LVL180
+.LLST5:
+	.8byte	.LVL3
+	.8byte	.LVL4
 	.2byte	0x3
-	.byte	0x70
-	.sleb128 1
+	.byte	0x9
+	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL181
-	.8byte	.LVL182
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL184
-	.8byte	.LVL185
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL189
-	.8byte	.LVL190
+	.8byte	.LVL4
+	.8byte	.LVL5
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL190
-	.8byte	.LVL191
-	.2byte	0x3
-	.byte	0x70
-	.sleb128 1
+	.byte	0x6c
+	.8byte	.LVL5
+	.8byte	.LVL6
+	.2byte	0x4
+	.byte	0x8c
+	.sleb128 0
+	.byte	0x20
 	.byte	0x9f
-	.8byte	.LVL192
-	.8byte	.LVL193
+	.8byte	.LVL6
+	.8byte	.LVL11
 	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL193
-	.8byte	.LVL194
-	.2byte	0x3
-	.byte	0x87
-	.sleb128 1
-	.byte	0x9f
+	.byte	0x6c
+	.8byte	.LVL13
+	.8byte	.LVL22
+	.2byte	0x1
+	.byte	0x6c
 	.8byte	0
 	.8byte	0
-.LLST73:
-	.8byte	.LVL178
-	.8byte	.LVL185
+.LLST6:
+	.8byte	.LVL18
+	.8byte	.LVL19
 	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL189
-	.8byte	.LVL195
+	.byte	0x50
+	.8byte	.LVL19
+	.8byte	.LFE200
 	.2byte	0x1
-	.byte	0x68
+	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST74:
-	.8byte	.LVL210
-	.8byte	.LVL212
-	.2byte	0x2
-	.byte	0x32
-	.byte	0x9f
-	.8byte	.LVL212
-	.8byte	.LVL213
-	.2byte	0x2
-	.byte	0x33
-	.byte	0x9f
-	.8byte	.LVL213
-	.8byte	.LVL214
-	.2byte	0x2
-	.byte	0x34
-	.byte	0x9f
-	.8byte	.LVL268
-	.8byte	.LVL269
-	.2byte	0x2
-	.byte	0x34
-	.byte	0x9f
-	.8byte	.LVL269
-	.8byte	.LVL270
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL270
-	.8byte	.LVL271
-	.2byte	0x3
-	.byte	0x71
-	.sleb128 1
-	.byte	0x9f
-	.8byte	.LVL275
-	.8byte	.LVL276
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.8byte	.LVL276
-	.8byte	.LVL277
-	.2byte	0x2
-	.byte	0x32
-	.byte	0x9f
-	.8byte	.LVL277
-	.8byte	.LVL278
-	.2byte	0x2
-	.byte	0x33
-	.byte	0x9f
-	.8byte	.LVL278
-	.8byte	.LVL279
+	.section	.debug_aranges,"",@progbits
+	.4byte	0x8c
 	.2byte	0x2
-	.byte	0x34
-	.byte	0x9f
+	.4byte	.Ldebug_info0
+	.byte	0x8
+	.byte	0
+	.2byte	0
+	.2byte	0
+	.8byte	.LFB200
+	.8byte	.LFE200-.LFB200
+	.8byte	.LFB253
+	.8byte	.LFE253-.LFB253
+	.8byte	.LFB254
+	.8byte	.LFE254-.LFB254
+	.8byte	.LFB268
+	.8byte	.LFE268-.LFB268
+	.8byte	.LFB271
+	.8byte	.LFE271-.LFB271
+	.8byte	.LFB255
+	.8byte	.LFE255-.LFB255
+	.8byte	.LFB256
+	.8byte	.LFE256-.LFB256
 	.8byte	0
 	.8byte	0
-.LLST75:
-	.8byte	.LVL269
-	.8byte	.LVL272
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL274
-	.8byte	.LVL279
-	.2byte	0x1
-	.byte	0x68
+	.section	.debug_ranges,"",@progbits
+.Ldebug_ranges0:
+	.8byte	.LBB6
+	.8byte	.LBE6
+	.8byte	.LBB12
+	.8byte	.LBE12
+	.8byte	.LBB13
+	.8byte	.LBE13
+	.8byte	.LBB14
+	.8byte	.LBE14
+	.8byte	.LBB18
+	.8byte	.LBE18
 	.8byte	0
 	.8byte	0
-.LLST1:
-	.8byte	.LVL9
-	.8byte	.LVL10
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL10
-	.8byte	.LVL15
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL15
-	.8byte	.LVL16
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL16
-	.8byte	.LFE257
-	.2byte	0x1
-	.byte	0x64
+	.8byte	.LBB15
+	.8byte	.LBE15
+	.8byte	.LBB19
+	.8byte	.LBE19
 	.8byte	0
 	.8byte	0
-.LLST2:
-	.8byte	.LVL11
-	.8byte	.LVL12
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL12
-	.8byte	.LVL13
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL16
-	.8byte	.LVL17
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL19
-	.8byte	.LVL20
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL20
-	.8byte	.LFE257
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST0:
-	.8byte	.LVL0
-	.8byte	.LVL1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1
-	.8byte	.LVL2-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL2
-	.8byte	.LVL3-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL5
-	.8byte	.LVL6
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL6
-	.8byte	.LVL7-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL7-1
-	.8byte	.LVL8
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST17:
-	.8byte	.LVL65
-	.8byte	.LVL66
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL66
-	.8byte	.LVL69
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL69
-	.8byte	.LVL70
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL70
-	.8byte	.LVL88
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL91
-	.8byte	.LFE255
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST18:
-	.8byte	.LVL65
-	.8byte	.LVL68
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL68
-	.8byte	.LVL72
-	.2byte	0x1
-	.byte	0x51
-	.8byte	0
-	.8byte	0
-.LLST19:
-	.8byte	.LVL65
-	.8byte	.LVL72
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL72
-	.8byte	.LVL90
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL90
-	.8byte	.LVL91
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.8byte	.LVL91
-	.8byte	.LFE255
-	.2byte	0x1
-	.byte	0x68
-	.8byte	0
-	.8byte	0
-.LLST20:
-	.8byte	.LVL71
-	.8byte	.LVL72
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL72
-	.8byte	.LVL89
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL91
-	.8byte	.LFE255
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST21:
-	.8byte	.LVL71
-	.8byte	.LVL88
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL91
-	.8byte	.LFE255
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST22:
-	.8byte	.LVL73
-	.8byte	.LVL74
-	.2byte	0x9
-	.byte	0x70
-	.sleb128 0
-	.byte	0x83
-	.sleb128 0
-	.byte	0x1d
-	.byte	0x84
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST23:
-	.8byte	.LVL76
-	.8byte	.LVL77
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL77
-	.8byte	.LVL78-1
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL81
-	.8byte	.LVL82
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL82
-	.8byte	.LVL83-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	0
-	.8byte	0
-.LLST24:
-	.8byte	.LVL65
-	.8byte	.LVL85
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL85
-	.8byte	.LVL86
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL86
-	.8byte	.LVL87
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL91
-	.8byte	.LVL92-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL92-1
-	.8byte	.LVL93
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL94
-	.8byte	.LFE255
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	0
-	.8byte	0
-.LLST42:
-	.8byte	.LVL121
-	.8byte	.LVL122
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL122
-	.8byte	.LVL133
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL133
-	.8byte	.LVL136
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL136
-	.8byte	.LFE200
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST43:
-	.8byte	.LVL121
-	.8byte	.LVL123-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL123-1
-	.8byte	.LVL134
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL134
-	.8byte	.LVL136
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	.LVL136
-	.8byte	.LFE200
-	.2byte	0x1
-	.byte	0x67
-	.8byte	0
-	.8byte	0
-.LLST44:
-	.8byte	.LVL123
-	.8byte	.LVL124
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL124
-	.8byte	.LVL132
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL136
-	.8byte	.LVL145
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL146
-	.8byte	.LFE200
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST45:
-	.8byte	.LVL127
-	.8byte	.LVL128
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL147
-	.8byte	.LVL148
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST46:
-	.8byte	.LVL125
-	.8byte	.LVL132
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL136
-	.8byte	.LVL144
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL145
-	.8byte	.LFE200
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST47:
-	.8byte	.LVL124
-	.8byte	.LVL125
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL125
-	.8byte	.LVL126
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL126
-	.8byte	.LVL127
-	.2byte	0x4
-	.byte	0x8c
-	.sleb128 0
-	.byte	0x20
-	.byte	0x9f
-	.8byte	.LVL127
-	.8byte	.LVL135
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL136
-	.8byte	.LFE200
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	0
-	.8byte	0
-.LLST48:
-	.8byte	.LVL141
-	.8byte	.LVL142
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL142
-	.8byte	.LFE200
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-	.section	.debug_aranges,"",@progbits
-	.4byte	0xcc
-	.2byte	0x2
-	.4byte	.Ldebug_info0
-	.byte	0x8
-	.byte	0
-	.2byte	0
-	.2byte	0
-	.8byte	.LFB256
-	.8byte	.LFE256-.LFB256
-	.8byte	.LFB257
-	.8byte	.LFE257-.LFB257
-	.8byte	.LFB274
-	.8byte	.LFE274-.LFB274
-	.8byte	.LFB255
-	.8byte	.LFE255-.LFB255
-	.8byte	.LFB275
-	.8byte	.LFE275-.LFB275
-	.8byte	.LFB276
-	.8byte	.LFE276-.LFB276
-	.8byte	.LFB277
-	.8byte	.LFE277-.LFB277
-	.8byte	.LFB200
-	.8byte	.LFE200-.LFB200
-	.8byte	.LFB271
-	.8byte	.LFE271-.LFB271
-	.8byte	.LFB258
-	.8byte	.LFE258-.LFB258
-	.8byte	.LFB278
-	.8byte	.LFE278-.LFB278
-	.8byte	0
-	.8byte	0
-	.section	.debug_ranges,"",@progbits
-.Ldebug_ranges0:
-	.8byte	.LBB12
-	.8byte	.LBE12
-	.8byte	.LBB18
-	.8byte	.LBE18
-	.8byte	.LBB19
-	.8byte	.LBE19
-	.8byte	.LBB20
-	.8byte	.LBE20
-	.8byte	.LBB24
-	.8byte	.LBE24
-	.8byte	0
-	.8byte	0
-	.8byte	.LBB21
-	.8byte	.LBE21
-	.8byte	.LBB25
-	.8byte	.LBE25
-	.8byte	0
-	.8byte	0
-	.8byte	.LBB29
-	.8byte	.LBE29
-	.8byte	.LBB34
-	.8byte	.LBE34
-	.8byte	.LBB35
-	.8byte	.LBE35
-	.8byte	0
-	.8byte	0
-	.8byte	.LBB40
-	.8byte	.LBE40
-	.8byte	.LBB48
-	.8byte	.LBE48
-	.8byte	.LBB49
-	.8byte	.LBE49
-	.8byte	.LBB50
-	.8byte	.LBE50
-	.8byte	.LBB51
-	.8byte	.LBE51
-	.8byte	.LBB52
-	.8byte	.LBE52
-	.8byte	.LBB53
-	.8byte	.LBE53
-	.8byte	0
-	.8byte	0
-	.8byte	.LBB54
-	.8byte	.LBE54
-	.8byte	.LBB58
-	.8byte	.LBE58
-	.8byte	.LBB59
-	.8byte	.LBE59
-	.8byte	0
-	.8byte	0
-	.8byte	.LFB256
-	.8byte	.LFE256
-	.8byte	.LFB257
-	.8byte	.LFE257
-	.8byte	.LFB274
-	.8byte	.LFE274
-	.8byte	.LFB255
-	.8byte	.LFE255
-	.8byte	.LFB275
-	.8byte	.LFE275
-	.8byte	.LFB276
-	.8byte	.LFE276
-	.8byte	.LFB277
-	.8byte	.LFE277
-	.8byte	.LFB200
-	.8byte	.LFE200
-	.8byte	.LFB271
-	.8byte	.LFE271
-	.8byte	.LFB258
-	.8byte	.LFE258
-	.8byte	.LFB278
-	.8byte	.LFE278
+	.8byte	.LFB200
+	.8byte	.LFE200
+	.8byte	.LFB253
+	.8byte	.LFE253
+	.8byte	.LFB254
+	.8byte	.LFE254
+	.8byte	.LFB268
+	.8byte	.LFE268
+	.8byte	.LFB271
+	.8byte	.LFE271
+	.8byte	.LFB255
+	.8byte	.LFE255
+	.8byte	.LFB256
+	.8byte	.LFE256
 	.8byte	0
 	.8byte	0
 	.section	.debug_line,"",@progbits
 .Ldebug_line0:
 	.section	.debug_str,"MS",@progbits,1
-.LASF416:
-	.string	"test_pattern"
-.LASF399:
-	.string	"puts"
-.LASF64:
-	.string	"reserved"
-.LASF470:
+.LASF30:
+	.string	"parent_platdata"
+.LASF109:
+	.string	"off_mem_rsvmap"
+.LASF193:
+	.string	"UCLASS_I2C_EEPROM"
+.LASF481:
+	.string	"jt_funcs"
+.LASF198:
+	.string	"UCLASS_IRQ"
+.LASF159:
+	.string	"initrd_start"
+.LASF192:
+	.string	"UCLASS_I2C"
+.LASF13:
+	.string	"sizetype"
+.LASF335:
+	.string	"net_hostname"
+.LASF330:
+	.string	"push_packet"
+.LASF54:
+	.string	"start"
+.LASF231:
+	.string	"UCLASS_SPI"
+.LASF309:
+	.string	"child"
+.LASF196:
+	.string	"UCLASS_I2S"
+.LASF356:
+	.string	"NETLOOP_RESTART"
+.LASF194:
+	.string	"UCLASS_I2C_GENERIC"
+.LASF206:
+	.string	"UCLASS_MOD_EXP"
+.LASF253:
+	.string	"UCLASS_IO_DOMAIN"
+.LASF266:
+	.string	"using_pre_serial"
+.LASF37:
+	.string	"uclass_priv"
+.LASF226:
+	.string	"UCLASS_RKNAND"
+.LASF170:
+	.string	"UCLASS_DEMO"
+.LASF379:
+	.string	"g_isi_pattern"
+.LASF117:
+	.string	"ih_magic"
+.LASF46:
+	.string	"list_head"
+.LASF425:
+	.string	"err_addr"
+.LASF370:
+	.string	"child_pre_probe"
+.LASF302:
+	.string	"pm_ctx_phys"
+.LASF174:
+	.string	"UCLASS_TEST_PROBE"
+.LASF307:
+	.string	"full_name"
+.LASF249:
+	.string	"UCLASS_KEY"
+.LASF80:
+	.string	"bi_intfreq"
+.LASF460:
 	.string	"__func__"
+.LASF11:
+	.string	"phys_addr_t"
+.LASF244:
+	.string	"UCLASS_VIDEO_BRIDGE"
+.LASF301:
+	.string	"video_bottom"
+.LASF457:
+	.string	"set_ddr_freq"
+.LASF5:
+	.string	"__u8"
+.LASF355:
+	.string	"NETLOOP_CONTINUE"
+.LASF234:
+	.string	"UCLASS_SPI_GENERIC"
+.LASF296:
+	.string	"malloc_base"
 .LASF464:
-	.string	"target_freq"
-.LASF138:
-	.string	"bootm_headers"
-.LASF227:
-	.string	"UCLASS_RAMDISK"
-.LASF156:
-	.string	"rd_end"
-.LASF318:
-	.string	"eth_device"
-.LASF452:
-	.string	"test_banks"
-.LASF127:
-	.string	"ih_comp"
-.LASF23:
-	.string	"_Bool"
-.LASF334:
-	.string	"net_root_path"
+	.string	"get_page_size"
+.LASF56:
+	.string	"flash_info_t"
+.LASF210:
+	.string	"UCLASS_PANEL"
+.LASF134:
+	.string	"comp"
+.LASF129:
+	.string	"image_header_t"
+.LASF164:
+	.string	"state"
+.LASF186:
+	.string	"UCLASS_CROS_EC"
+.LASF74:
+	.string	"bi_dsp_freq"
+.LASF131:
+	.string	"image_start"
 .LASF445:
-	.string	"cmdtp"
-.LASF365:
-	.string	"unbind"
-.LASF145:
-	.string	"fit_noffset_os"
+	.string	"fast_test_bank"
+.LASF172:
+	.string	"UCLASS_TEST_FDT"
+.LASF430:
+	.string	"diagonalscan"
+.LASF65:
+	.string	"bd_info"
+.LASF168:
+	.string	"uclass_id"
+.LASF121:
+	.string	"ih_load"
+.LASF314:
+	.string	"__dtb_dt_spl_begin"
+.LASF394:
+	.string	"pre_remove"
+.LASF427:
+	.string	"random_test1"
+.LASF426:
+	.string	"random_test2"
+.LASF7:
+	.string	"__u32"
 .LASF35:
 	.string	"priv"
-.LASF486:
-	.ascii	"GNU C11 6.3.1 20170404 -ms"
-	.string	"trict-align -march=armv8-a+nosimd -mlittle-endian -mabi=lp64 -g -Os -fno-builtin -ffreestanding -fshort-wchar -fno-stack-protector -fno-delete-null-pointer-checks -fstack-usage -fno-pic -ffunction-sections -fdata-sections -ffixed-r9 -fno-common -ffixed-x18"
-.LASF22:
-	.string	"___strtok"
-.LASF234:
-	.string	"UCLASS_SPI_GENERIC"
-.LASF431:
-	.string	"capacity"
-.LASF279:
-	.string	"ram_size"
-.LASF332:
-	.string	"net_nis_domain"
-.LASF438:
-	.string	"diagonalscan"
-.LASF36:
-	.string	"uclass"
+.LASF299:
+	.string	"cur_serial_dev"
+.LASF469:
+	.string	"strcasecmp"
+.LASF143:
+	.string	"fit_hdr_os"
+.LASF341:
+	.string	"net_tx_packet"
+.LASF248:
+	.string	"UCLASS_FG"
+.LASF340:
+	.string	"net_server_ip"
+.LASF482:
+	.string	"ofnode_union"
+.LASF348:
+	.string	"net_native_vlan"
+.LASF246:
+	.string	"UCLASS_VIDEO_CRTC"
 .LASF185:
 	.string	"UCLASS_CODEC"
-.LASF47:
-	.string	"next"
-.LASF375:
-	.string	"length"
-.LASF381:
-	.string	"uc_drv"
-.LASF181:
-	.string	"UCLASS_AHCI"
-.LASF195:
-	.string	"UCLASS_I2C_MUX"
-.LASF168:
-	.string	"uclass_id"
-.LASF491:
-	.string	"cpu_2_io"
-.LASF330:
-	.string	"net_netmask"
-.LASF101:
-	.string	"CMD_RET_FAILURE"
-.LASF148:
-	.string	"fit_noffset_rd"
-.LASF228:
-	.string	"UCLASS_RTC"
-.LASF67:
-	.string	"bi_memsize"
-.LASF68:
-	.string	"bi_flashstart"
-.LASF369:
-	.string	"child_post_remove"
-.LASF323:
-	.string	"recv"
-.LASF153:
-	.string	"fit_uname_setup"
-.LASF481:
-	.string	"rockchip_ddrclk_sip_round_rate_v2"
-.LASF235:
-	.string	"UCLASS_SYSCON"
-.LASF187:
-	.string	"UCLASS_DISPLAY"
-.LASF268:
-	.string	"global_data"
-.LASF92:
-	.string	"IRQ_STACK_START_IN"
-.LASF84:
-	.string	"bi_dram"
-.LASF226:
-	.string	"UCLASS_RKNAND"
-.LASF297:
-	.string	"malloc_ptr"
-.LASF193:
-	.string	"UCLASS_I2C_EEPROM"
-.LASF177:
-	.string	"UCLASS_PCI_EMUL"
-.LASF417:
-	.string	"test_pat_param"
-.LASF103:
-	.string	"fdt_header"
-.LASF292:
-	.string	"env_buf"
-.LASF418:
-	.string	"_u_boot_list_2_cmd_2_ddr_test"
-.LASF106:
-	.string	"off_dt_struct"
-.LASF405:
-	.string	"console_devices"
-.LASF353:
-	.string	"NETLOOP_CONTINUE"
-.LASF231:
-	.string	"UCLASS_SPI"
-.LASF473:
-	.string	"memcpy"
-.LASF245:
-	.string	"UCLASS_VIDEO_CONSOLE"
+.LASF478:
+	.ascii	"GNU C11 6.3.1 20170404 -ms"
+	.string	"trict-align -march=armv8-a+nosimd -mlittle-endian -mabi=lp64 -g -Os -fno-builtin -ffreestanding -fshort-wchar -fno-stack-protector -fno-delete-null-pointer-checks -fstack-usage -fno-pic -ffunction-sections -fdata-sections -ffixed-r9 -fno-common -ffixed-x18"
+.LASF293:
+	.string	"env_buf"
+.LASF21:
+	.string	"errno"
+.LASF15:
+	.string	"long int"
+.LASF69:
+	.string	"bi_flashsize"
+.LASF401:
+	.string	"putc"
+.LASF29:
+	.string	"platdata"
+.LASF215:
+	.string	"UCLASS_PHY"
+.LASF92:
+	.string	"IRQ_STACK_START_IN"
+.LASF113:
+	.string	"size_dt_strings"
 .LASF243:
 	.string	"UCLASS_VIDEO"
-.LASF357:
-	.string	"net_state"
-.LASF487:
-	.string	"cmd/ddr_tool/ddr_test_code.c"
-.LASF287:
-	.string	"uclass_root"
-.LASF86:
-	.string	"IRQ_STACK_START"
-.LASF163:
-	.string	"verify"
-.LASF354:
-	.string	"NETLOOP_RESTART"
-.LASF453:
-	.string	"abort"
-.LASF406:
-	.string	"cd_count"
-.LASF371:
-	.string	"platdata_auto_alloc_size"
-.LASF317:
-	.string	"s_addr"
-.LASF450:
-	.string	"err_case"
-.LASF167:
-	.string	"command_ret_t"
-.LASF236:
-	.string	"UCLASS_SYSRESET"
+.LASF402:
+	.string	"puts"
+.LASF475:
+	.string	"rand"
+.LASF279:
+	.string	"relocaddr"
+.LASF385:
+	.string	"dev_head"
+.LASF351:
+	.string	"net_boot_file_size"
+.LASF407:
+	.string	"stdio_names"
+.LASF123:
+	.string	"ih_dcrc"
+.LASF79:
+	.string	"bi_ethspeed"
 .LASF169:
 	.string	"UCLASS_ROOT"
-.LASF301:
-	.string	"pm_ctx_phys"
-.LASF186:
-	.string	"UCLASS_CROS_EC"
-.LASF463:
-	.string	"delta_freq"
-.LASF326:
-	.string	"index"
-.LASF458:
-	.string	"freq"
-.LASF94:
-	.string	"maxargs"
-.LASF121:
-	.string	"ih_load"
-.LASF249:
-	.string	"UCLASS_KEY"
-.LASF408:
-	.string	"SCANFREQ"
-.LASF88:
-	.string	"_datarel_start_ofs"
-.LASF271:
-	.string	"pci_clk"
-.LASF180:
-	.string	"UCLASS_ADC"
-.LASF366:
-	.string	"ofdata_to_platdata"
+.LASF44:
+	.string	"ide_bus_offset"
+.LASF419:
+	.string	"test_pat_param"
+.LASF338:
+	.string	"net_server_ethaddr"
+.LASF82:
+	.string	"bi_arch_number"
+.LASF3:
+	.string	"signed char"
+.LASF199:
+	.string	"UCLASS_KEYBOARD"
+.LASF18:
+	.string	"uint8_t"
+.LASF375:
+	.string	"per_child_platdata_auto_alloc_size"
+.LASF45:
+	.string	"udevice"
+.LASF467:
+	.string	"cmp_buf_data"
 .LASF125:
 	.string	"ih_arch"
-.LASF309:
-	.string	"gd_t"
-.LASF198:
-	.string	"UCLASS_IRQ"
-.LASF5:
-	.string	"__u8"
-.LASF329:
-	.string	"net_gateway"
-.LASF351:
-	.string	"net_ping_ip"
-.LASF135:
-	.string	"type"
-.LASF465:
-	.string	"get_test_addr"
-.LASF61:
-	.string	"lmb_region"
-.LASF423:
-	.string	"wr_val"
-.LASF55:
-	.string	"protect"
-.LASF260:
-	.string	"tlb_addr"
-.LASF426:
-	.string	"print_memory"
-.LASF439:
-	.string	"next_adr"
-.LASF39:
-	.string	"uclass_node"
-.LASF171:
-	.string	"UCLASS_TEST"
-.LASF350:
-	.string	"net_boot_file_expected_size_in_blocks"
-.LASF24:
-	.string	"image_base"
-.LASF141:
-	.string	"legacy_hdr_valid"
+.LASF106:
+	.string	"totalsize"
+.LASF446:
+	.string	"abort"
+.LASF118:
+	.string	"ih_hcrc"
+.LASF281:
+	.string	"mon_len"
+.LASF133:
+	.string	"load"
 .LASF239:
 	.string	"UCLASS_TPM"
-.LASF100:
-	.string	"CMD_RET_SUCCESS"
-.LASF397:
-	.string	"stop"
-.LASF204:
-	.string	"UCLASS_MISC"
-.LASF52:
-	.string	"sector_count"
-.LASF263:
-	.string	"tlb_emerg"
-.LASF434:
-	.string	"err_addr"
-.LASF93:
-	.string	"cmd_tbl_s"
-.LASF99:
-	.string	"cmd_tbl_t"
-.LASF266:
-	.string	"baudrate"
-.LASF358:
-	.string	"mem_malloc_start"
-.LASF246:
-	.string	"UCLASS_VIDEO_CRTC"
-.LASF79:
-	.string	"bi_ethspeed"
-.LASF129:
-	.string	"image_header_t"
-.LASF382:
-	.string	"dev_head"
-.LASF11:
-	.string	"phys_addr_t"
-.LASF126:
-	.string	"ih_type"
+.LASF428:
+	.string	"cmp_value"
+.LASF59:
+	.string	"lmb_property"
+.LASF111:
+	.string	"last_comp_version"
 .LASF0:
 	.string	"unsigned char"
-.LASF409:
+.LASF392:
+	.string	"pre_probe"
+.LASF453:
+	.string	"delta_freq"
+.LASF412:
 	.string	"RANDOM"
-.LASF140:
-	.string	"legacy_hdr_os_copy"
-.LASF477:
-	.string	"uclass_get_device"
-.LASF211:
-	.string	"UCLASS_PANEL_BACKLIGHT"
-.LASF270:
-	.string	"bus_clk"
-.LASF173:
-	.string	"UCLASS_TEST_BUS"
-.LASF73:
-	.string	"bi_arm_freq"
+.LASF166:
+	.string	"images"
+.LASF252:
+	.string	"UCLASS_DVFS"
+.LASF75:
+	.string	"bi_ddr_freq"
 .LASF200:
 	.string	"UCLASS_LED"
-.LASF379:
+.LASF120:
+	.string	"ih_size"
+.LASF39:
+	.string	"uclass_node"
+.LASF23:
+	.string	"_Bool"
+.LASF376:
+	.string	"property"
+.LASF359:
+	.string	"net_state"
+.LASF378:
+	.string	"value"
+.LASF195:
+	.string	"UCLASS_I2C_MUX"
+.LASF14:
+	.string	"char"
+.LASF25:
+	.string	"_binary_u_boot_bin_start"
+.LASF418:
+	.string	"test_pattern"
+.LASF357:
+	.string	"NETLOOP_SUCCESS"
+.LASF36:
+	.string	"uclass"
+.LASF382:
 	.string	"p_current"
-.LASF342:
-	.string	"net_rx_packet_len"
-.LASF344:
-	.string	"net_null_ethaddr"
-.LASF53:
-	.string	"flash_id"
-.LASF313:
-	.string	"load_addr"
-.LASF424:
-	.string	"reread"
+.LASF384:
+	.string	"uc_drv"
+.LASF354:
+	.string	"net_loop_state"
+.LASF43:
+	.string	"req_seq"
+.LASF310:
+	.string	"sibling"
+.LASF287:
+	.string	"dm_root_f"
 .LASF321:
-	.string	"init"
-.LASF251:
-	.string	"UCLASS_CHARGE_DISPLAY"
+	.string	"enetaddr"
+.LASF221:
+	.string	"UCLASS_PWRSEQ"
+.LASF452:
+	.string	"times"
+.LASF454:
+	.string	"target_freq"
+.LASF380:
+	.string	"of_offset"
+.LASF149:
+	.string	"fit_hdr_fdt"
+.LASF349:
+	.string	"net_restart_wrap"
+.LASF404:
+	.string	"getc"
+.LASF337:
+	.string	"net_ethaddr"
+.LASF42:
+	.string	"flags"
 .LASF437:
-	.string	"cmp_value"
-.LASF178:
-	.string	"UCLASS_USB_EMUL"
-.LASF363:
-	.string	"probe"
-.LASF378:
-	.string	"ofnode"
-.LASF269:
+	.string	"cmdtp"
+.LASF126:
+	.string	"ih_type"
+.LASF107:
+	.string	"off_dt_struct"
+.LASF458:
+	.string	"crosstalk"
+.LASF70:
+	.string	"bi_flashoffset"
+.LASF350:
+	.string	"net_boot_file_name"
+.LASF387:
+	.string	"compatible"
+.LASF171:
+	.string	"UCLASS_TEST"
+.LASF119:
+	.string	"ih_time"
+.LASF274:
+	.string	"fb_base"
+.LASF271:
+	.string	"bus_clk"
+.LASF222:
+	.string	"UCLASS_RAM"
+.LASF189:
+	.string	"UCLASS_ETH"
+.LASF32:
+	.string	"node"
+.LASF130:
+	.string	"image_info"
+.LASF408:
+	.string	"console_devices"
+.LASF136:
+	.string	"arch"
+.LASF273:
+	.string	"mem_clk"
+.LASF476:
+	.string	"write_buf_to_ddr"
+.LASF270:
 	.string	"cpu_clk"
-.LASF308:
-	.string	"sibling"
-.LASF265:
-	.string	"using_pre_serial"
-.LASF217:
-	.string	"UCLASS_PINCTRL"
-.LASF115:
-	.string	"fdt32_t"
-.LASF376:
-	.string	"value"
-.LASF247:
-	.string	"UCLASS_WDT"
-.LASF440:
-	.string	"page_size"
-.LASF132:
-	.string	"image_len"
-.LASF280:
-	.string	"mon_len"
+.LASF50:
+	.string	"select_hwpart"
+.LASF342:
+	.string	"net_rx_packets"
+.LASF360:
+	.string	"mem_malloc_start"
+.LASF91:
+	.string	"_datarelro_start_ofs"
+.LASF17:
+	.string	"ulong"
+.LASF122:
+	.string	"ih_ep"
+.LASF61:
+	.string	"lmb_region"
+.LASF448:
+	.string	"do_ddr_test"
+.LASF462:
+	.string	"printf"
+.LASF144:
+	.string	"fit_uname_os"
+.LASF76:
+	.string	"bi_bootflags"
+.LASF339:
+	.string	"net_ip"
+.LASF291:
+	.string	"fdt_size"
+.LASF333:
+	.string	"net_dns_server"
+.LASF353:
+	.string	"net_ping_ip"
 .LASF63:
 	.string	"memory"
-.LASF492:
-	.string	"exit"
+.LASF104:
+	.string	"fdt_header"
+.LASF361:
+	.string	"mem_malloc_end"
+.LASF202:
+	.string	"UCLASS_MAILBOX"
+.LASF156:
+	.string	"rd_end"
+.LASF364:
+	.string	"bind"
+.LASF282:
+	.string	"irq_sp"
+.LASF161:
+	.string	"cmdline_start"
+.LASF328:
+	.string	"index"
+.LASF269:
+	.string	"global_data"
+.LASF400:
+	.string	"stop"
+.LASF396:
+	.string	"per_device_auto_alloc_size"
+.LASF472:
+	.string	"ctrlc"
+.LASF95:
+	.string	"repeatable"
+.LASF229:
+	.string	"UCLASS_SCSI"
 .LASF241:
 	.string	"UCLASS_USB_DEV_GENERIC"
-.LASF248:
-	.string	"UCLASS_FG"
-.LASF451:
-	.string	"test_times"
-.LASF373:
-	.string	"per_child_platdata_auto_alloc_size"
-.LASF469:
-	.string	"shift"
-.LASF21:
-	.string	"errno"
-.LASF51:
-	.string	"size"
-.LASF333:
-	.string	"net_hostname"
-.LASF31:
-	.string	"uclass_platdata"
-.LASF396:
-	.string	"stdio_dev"
-.LASF139:
-	.string	"legacy_hdr_os"
-.LASF131:
-	.string	"image_start"
-.LASF18:
-	.string	"uint8_t"
-.LASF76:
-	.string	"bi_bootflags"
-.LASF118:
-	.string	"ih_hcrc"
-.LASF392:
-	.string	"destroy"
-.LASF461:
-	.string	"max_freq"
-.LASF210:
-	.string	"UCLASS_PANEL"
-.LASF368:
-	.string	"child_pre_probe"
-.LASF257:
-	.string	"timer_rate_hz"
-.LASF33:
-	.string	"driver_data"
-.LASF427:
-	.string	"write_buf_to_ddr"
-.LASF383:
-	.string	"udevice_id"
-.LASF370:
-	.string	"priv_auto_alloc_size"
-.LASF240:
-	.string	"UCLASS_USB"
-.LASF172:
-	.string	"UCLASS_TEST_FDT"
-.LASF327:
-	.string	"eth_current"
-.LASF74:
-	.string	"bi_dsp_freq"
-.LASF4:
-	.string	"uchar"
-.LASF120:
-	.string	"ih_size"
-.LASF267:
-	.string	"addr"
-.LASF175:
-	.string	"UCLASS_SPI_EMUL"
-.LASF256:
-	.string	"arch_global_data"
-.LASF214:
-	.string	"UCLASS_PCI_GENERIC"
-.LASF71:
-	.string	"bi_sramstart"
-.LASF87:
-	.string	"FIQ_STACK_START"
-.LASF389:
-	.string	"pre_probe"
-.LASF319:
-	.string	"enetaddr"
-.LASF216:
-	.string	"UCLASS_PINCONFIG"
-.LASF421:
-	.string	"prt_en"
-.LASF225:
-	.string	"UCLASS_RESET"
-.LASF170:
-	.string	"UCLASS_DEMO"
-.LASF296:
-	.string	"malloc_limit"
-.LASF65:
-	.string	"bd_info"
-.LASF372:
-	.string	"per_child_auto_alloc_size"
-.LASF81:
-	.string	"bi_busfreq"
-.LASF281:
-	.string	"irq_sp"
-.LASF402:
-	.string	"list"
-.LASF182:
-	.string	"UCLASS_BLK"
-.LASF282:
+.LASF203:
+	.string	"UCLASS_MASS_STORAGE"
+.LASF1:
+	.string	"long unsigned int"
+.LASF179:
+	.string	"UCLASS_SIMPLE_BUS"
+.LASF455:
+	.string	"freq"
+.LASF311:
+	.string	"gd_t"
+.LASF334:
+	.string	"net_nis_domain"
+.LASF398:
+	.string	"console_buffer"
+.LASF151:
+	.string	"fit_noffset_fdt"
+.LASF432:
+	.string	"next_adr"
+.LASF423:
+	.string	"wr_value"
+.LASF459:
+	.string	"shift"
+.LASF358:
+	.string	"NETLOOP_FAIL"
+.LASF247:
+	.string	"UCLASS_WDT"
+.LASF260:
+	.string	"timer_reset_value"
+.LASF283:
 	.string	"start_addr_sp"
-.LASF337:
-	.string	"net_ip"
-.LASF475:
-	.string	"strict_strtoul"
-.LASF320:
-	.string	"iobase"
-.LASF123:
-	.string	"ih_dcrc"
-.LASF56:
-	.string	"flash_info_t"
-.LASF471:
-	.string	"printf"
-.LASF444:
-	.string	"os_reg"
-.LASF80:
-	.string	"bi_intfreq"
-.LASF314:
-	.string	"save_addr"
+.LASF71:
+	.string	"bi_sramstart"
+.LASF26:
+	.string	"_binary_u_boot_bin_end"
+.LASF284:
+	.string	"reloc_off"
+.LASF473:
+	.string	"judge_test_addr"
+.LASF112:
+	.string	"boot_cpuid_phys"
 .LASF259:
-	.string	"timer_reset_value"
-.LASF377:
-	.string	"of_offset"
-.LASF201:
-	.string	"UCLASS_LPC"
-.LASF70:
-	.string	"bi_flashoffset"
-.LASF300:
-	.string	"video_bottom"
-.LASF454:
-	.string	"scan_freq_loop"
-.LASF202:
-	.string	"UCLASS_MAILBOX"
-.LASF415:
-	.string	"g_isi_pattern"
-.LASF108:
-	.string	"off_mem_rsvmap"
-.LASF362:
-	.string	"bind"
-.LASF199:
-	.string	"UCLASS_KEYBOARD"
-.LASF206:
-	.string	"UCLASS_MOD_EXP"
-.LASF116:
-	.string	"image_header"
-.LASF110:
-	.string	"last_comp_version"
+	.string	"lastinc"
+.LASF263:
+	.string	"tlb_fillptr"
+.LASF456:
+	.string	"set_vdd_logic"
+.LASF147:
+	.string	"fit_uname_rd"
+.LASF235:
+	.string	"UCLASS_SYSCON"
+.LASF184:
+	.string	"UCLASS_CPU"
+.LASF142:
+	.string	"fit_uname_cfg"
+.LASF230:
+	.string	"UCLASS_SERIAL"
+.LASF347:
+	.string	"net_our_vlan"
+.LASF303:
+	.string	"serial"
+.LASF365:
+	.string	"probe"
+.LASF182:
+	.string	"UCLASS_BLK"
+.LASF137:
+	.string	"image_info_t"
+.LASF178:
+	.string	"UCLASS_USB_EMUL"
+.LASF439:
+	.string	"argc"
+.LASF261:
+	.string	"tlb_addr"
+.LASF214:
+	.string	"UCLASS_PCI_GENERIC"
+.LASF440:
+	.string	"argv"
+.LASF132:
+	.string	"image_len"
 .LASF77:
 	.string	"bi_ip_addr"
-.LASF414:
+.LASF216:
+	.string	"UCLASS_PINCONFIG"
+.LASF324:
+	.string	"send"
+.LASF237:
+	.string	"UCLASS_THERMAL"
+.LASF140:
+	.string	"legacy_hdr_os_copy"
+.LASF9:
+	.string	"long long int"
+.LASF417:
 	.string	"TESTCASSMAX"
-.LASF298:
-	.string	"cur_serial_dev"
-.LASF57:
-	.string	"flash_info"
-.LASF16:
-	.string	"ushort"
-.LASF395:
-	.string	"console_buffer"
-.LASF104:
-	.string	"magic"
-.LASF305:
-	.string	"full_name"
-.LASF472:
-	.string	"memset"
-.LASF331:
-	.string	"net_dns_server"
-.LASF482:
-	.string	"rockchip_ddrclk_sip_set_rate_v2"
-.LASF403:
-	.string	"stdio_devices"
-.LASF462:
-	.string	"times"
-.LASF355:
-	.string	"NETLOOP_SUCCESS"
-.LASF28:
-	.string	"name"
+.LASF443:
+	.string	"test_times"
+.LASF167:
+	.string	"command_ret_t"
+.LASF290:
+	.string	"new_fdt"
+.LASF22:
+	.string	"___strtok"
+.LASF352:
+	.string	"net_boot_file_expected_size_in_blocks"
+.LASF451:
+	.string	"max_freq"
+.LASF363:
+	.string	"of_match"
+.LASF209:
+	.string	"UCLASS_NVME"
 .LASF264:
-	.string	"pre_serial"
-.LASF90:
-	.string	"_datarellocal_start_ofs"
-.LASF96:
-	.string	"usage"
-.LASF152:
-	.string	"fit_hdr_setup"
-.LASF183:
-	.string	"UCLASS_CLK"
-.LASF41:
-	.string	"sibling_node"
-.LASF160:
-	.string	"initrd_end"
-.LASF310:
-	.string	"monitor_flash_len"
-.LASF398:
-	.string	"putc"
-.LASF360:
-	.string	"mem_malloc_brk"
-.LASF12:
-	.string	"phys_size_t"
-.LASF83:
-	.string	"bi_boot_params"
+	.string	"tlb_emerg"
+.LASF138:
+	.string	"bootm_headers"
+.LASF470:
+	.string	"strict_strtoul"
+.LASF55:
+	.string	"protect"
+.LASF240:
+	.string	"UCLASS_USB"
+.LASF447:
+	.string	"scan_freq_loop"
+.LASF389:
+	.string	"uclass_driver"
 .LASF250:
 	.string	"UCLASS_RC"
-.LASF72:
-	.string	"bi_sramsize"
-.LASF293:
-	.string	"timebase_h"
 .LASF294:
+	.string	"timebase_h"
+.LASF295:
 	.string	"timebase_l"
-.LASF13:
-	.string	"sizetype"
-.LASF78:
-	.string	"bi_enetaddr"
-.LASF341:
-	.string	"net_rx_packet"
-.LASF459:
-	.string	"scan_freq"
-.LASF393:
-	.string	"per_device_auto_alloc_size"
-.LASF229:
-	.string	"UCLASS_SCSI"
-.LASF2:
-	.string	"short unsigned int"
-.LASF3:
-	.string	"signed char"
-.LASF339:
-	.string	"net_tx_packet"
-.LASF54:
-	.string	"start"
-.LASF380:
+.LASF187:
+	.string	"UCLASS_DISPLAY"
+.LASF346:
+	.string	"net_null_ethaddr"
+.LASF277:
+	.string	"env_valid"
+.LASF416:
+	.string	"FULLTEST"
+.LASF34:
+	.string	"parent"
+.LASF177:
+	.string	"UCLASS_PCI_EMUL"
+.LASF38:
+	.string	"parent_priv"
+.LASF251:
+	.string	"UCLASS_CHARGE_DISPLAY"
+.LASF315:
+	.string	"load_addr"
+.LASF98:
+	.string	"complete"
+.LASF89:
+	.string	"_datarelrolocal_start_ofs"
+.LASF97:
+	.string	"help"
+.LASF268:
+	.string	"addr"
+.LASF101:
+	.string	"CMD_RET_FAILURE"
+.LASF8:
+	.string	"unsigned int"
+.LASF16:
+	.string	"ushort"
+.LASF320:
+	.string	"eth_device"
+.LASF372:
+	.string	"priv_auto_alloc_size"
+.LASF297:
+	.string	"malloc_limit"
+.LASF218:
+	.string	"UCLASS_PMIC"
+.LASF422:
+	.string	"capacity"
+.LASF139:
+	.string	"legacy_hdr_os"
+.LASF108:
+	.string	"off_dt_strings"
+.LASF312:
+	.string	"monitor_flash_len"
+.LASF204:
+	.string	"UCLASS_MISC"
+.LASF67:
+	.string	"bi_memsize"
+.LASF438:
+	.string	"flag"
+.LASF24:
+	.string	"image_base"
+.LASF236:
+	.string	"UCLASS_SYSRESET"
+.LASF383:
 	.string	"current"
-.LASF412:
-	.string	"FASTTEST"
-.LASF255:
-	.string	"LOGF_MAX_CATEGORIES"
-.LASF134:
-	.string	"comp"
-.LASF179:
-	.string	"UCLASS_SIMPLE_BUS"
-.LASF286:
-	.string	"dm_root_f"
-.LASF37:
-	.string	"uclass_priv"
+.LASF191:
+	.string	"UCLASS_FIRMWARE"
+.LASF450:
+	.string	"min_freq"
+.LASF201:
+	.string	"UCLASS_LPC"
+.LASF197:
+	.string	"UCLASS_IDE"
+.LASF405:
+	.string	"list"
+.LASF306:
+	.string	"phandle"
+.LASF300:
+	.string	"video_top"
+.LASF397:
+	.string	"per_device_platdata_auto_alloc_size"
+.LASF165:
+	.string	"bootm_headers_t"
+.LASF73:
+	.string	"bi_arm_freq"
 .LASF224:
 	.string	"UCLASS_REMOTEPROC"
-.LASF149:
-	.string	"fit_hdr_fdt"
-.LASF407:
-	.string	"CHANGEFREQ"
-.LASF299:
-	.string	"video_top"
+.LASF465:
+	.string	"data_cpu_2_io"
+.LASF325:
+	.string	"recv"
+.LASF135:
+	.string	"type"
+.LASF146:
+	.string	"fit_hdr_rd"
+.LASF276:
+	.string	"env_addr"
+.LASF72:
+	.string	"bi_sramsize"
+.LASF449:
+	.string	"scan_freq"
+.LASF431:
+	.string	"start_adr"
+.LASF288:
+	.string	"uclass_root"
+.LASF190:
+	.string	"UCLASS_GPIO"
+.LASF219:
+	.string	"UCLASS_PWM"
+.LASF444:
+	.string	"test_banks"
+.LASF58:
+	.string	"long double"
+.LASF278:
+	.string	"ram_top"
+.LASF421:
+	.string	"baseaddr"
+.LASF480:
+	.string	"/home/typ/src/u-boot_gerrit/u-boot-ddr"
+.LASF155:
+	.string	"rd_start"
+.LASF220:
+	.string	"UCLASS_POWER_DOMAIN"
+.LASF223:
+	.string	"UCLASS_REGULATOR"
+.LASF317:
+	.string	"save_size"
+.LASF183:
+	.string	"UCLASS_CLK"
+.LASF31:
+	.string	"uclass_platdata"
+.LASF322:
+	.string	"iobase"
+.LASF429:
+	.string	"random_test"
+.LASF88:
+	.string	"_datarel_start_ofs"
+.LASF265:
+	.string	"pre_serial"
+.LASF128:
+	.string	"ih_name"
+.LASF435:
+	.string	"next_col"
+.LASF124:
+	.string	"ih_os"
+.LASF162:
+	.string	"cmdline_end"
 .LASF343:
-	.string	"net_bcast_ethaddr"
-.LASF164:
-	.string	"state"
-.LASF69:
-	.string	"bi_flashsize"
+	.string	"net_rx_packet"
+.LASF256:
+	.string	"LOGF_MAX_CATEGORIES"
+.LASF289:
+	.string	"fdt_blob"
+.LASF386:
+	.string	"udevice_id"
+.LASF51:
+	.string	"size"
+.LASF10:
+	.string	"long long unsigned int"
+.LASF395:
+	.string	"destroy"
+.LASF116:
+	.string	"image_header"
+.LASF377:
+	.string	"length"
 .LASF20:
 	.string	"__be32"
-.LASF162:
-	.string	"cmdline_end"
-.LASF38:
-	.string	"parent_priv"
-.LASF340:
-	.string	"net_rx_packets"
-.LASF184:
-	.string	"UCLASS_CPU"
-.LASF277:
-	.string	"ram_top"
-.LASF89:
-	.string	"_datarelrolocal_start_ofs"
-.LASF442:
-	.string	"next_col"
-.LASF348:
-	.string	"net_boot_file_name"
-.LASF391:
-	.string	"pre_remove"
-.LASF324:
-	.string	"halt"
-.LASF117:
-	.string	"ih_magic"
-.LASF285:
-	.string	"dm_root"
-.LASF17:
-	.string	"ulong"
-.LASF62:
-	.string	"region"
-.LASF7:
-	.string	"__u32"
-.LASF338:
-	.string	"net_server_ip"
-.LASF364:
-	.string	"remove"
+.LASF68:
+	.string	"bi_flashstart"
+.LASF145:
+	.string	"fit_noffset_os"
+.LASF205:
+	.string	"UCLASS_MMC"
+.LASF327:
+	.string	"write_hwaddr"
+.LASF479:
+	.string	"cmd/ddr_tool/ddr_test_code.c"
+.LASF255:
+	.string	"UCLASS_INVALID"
+.LASF471:
+	.string	"data_cpu_2_io_init"
+.LASF94:
+	.string	"maxargs"
 .LASF242:
 	.string	"UCLASS_USB_HUB"
-.LASF291:
+.LASF414:
+	.string	"DIAGONALSCAN"
+.LASF371:
+	.string	"child_post_remove"
+.LASF93:
+	.string	"cmd_tbl_s"
+.LASF99:
+	.string	"cmd_tbl_t"
+.LASF41:
+	.string	"sibling_node"
+.LASF292:
 	.string	"of_root"
-.LASF91:
-	.string	"_datarelro_start_ofs"
-.LASF367:
-	.string	"child_post_bind"
+.LASF461:
+	.string	"memset"
+.LASF57:
+	.string	"flash_info"
+.LASF110:
+	.string	"version"
+.LASF326:
+	.string	"halt"
+.LASF62:
+	.string	"region"
+.LASF114:
+	.string	"size_dt_struct"
+.LASF286:
+	.string	"dm_root"
+.LASF304:
+	.string	"sys_start_tick"
+.LASF308:
+	.string	"properties"
 .LASF207:
 	.string	"UCLASS_MTD"
-.LASF165:
-	.string	"bootm_headers_t"
-.LASF15:
-	.string	"long int"
-.LASF174:
-	.string	"UCLASS_TEST_PROBE"
-.LASF212:
-	.string	"UCLASS_PCH"
-.LASF213:
-	.string	"UCLASS_PCI"
-.LASF188:
-	.string	"UCLASS_DMA"
-.LASF446:
-	.string	"flag"
-.LASF401:
-	.string	"getc"
-.LASF237:
-	.string	"UCLASS_THERMAL"
+.LASF103:
+	.string	"fdt32_t"
+.LASF285:
+	.string	"new_gd"
+.LASF468:
+	.string	"get_print_available_addr"
+.LASF208:
+	.string	"UCLASS_NORTHBRIDGE"
+.LASF78:
+	.string	"bi_enetaddr"
+.LASF477:
+	.string	"malloc"
+.LASF369:
+	.string	"child_post_bind"
+.LASF483:
+	.string	"exit"
+.LASF318:
+	.string	"in_addr"
+.LASF344:
+	.string	"net_rx_packet_len"
+.LASF323:
+	.string	"init"
+.LASF102:
+	.string	"CMD_RET_USAGE"
+.LASF313:
+	.string	"__dtb_dt_begin"
+.LASF225:
+	.string	"UCLASS_RESET"
+.LASF148:
+	.string	"fit_noffset_rd"
 .LASF436:
-	.string	"random_test1"
-.LASF435:
-	.string	"random_test2"
-.LASF456:
-	.string	"set_vdd_logic"
-.LASF449:
-	.string	"test_case"
+	.string	"err_adr"
+.LASF181:
+	.string	"UCLASS_AHCI"
+.LASF12:
+	.string	"phys_size_t"
+.LASF27:
+	.string	"driver"
+.LASF87:
+	.string	"FIQ_STACK_START"
+.LASF163:
+	.string	"verify"
+.LASF381:
+	.string	"ofnode"
+.LASF28:
+	.string	"name"
 .LASF441:
+	.string	"test_case"
+.LASF211:
+	.string	"UCLASS_PANEL_BACKLIGHT"
+.LASF238:
+	.string	"UCLASS_TIMER"
+.LASF233:
+	.string	"UCLASS_SPI_FLASH"
+.LASF424:
+	.string	"reread_val"
+.LASF275:
+	.string	"have_console"
+.LASF81:
+	.string	"bi_busfreq"
+.LASF6:
+	.string	"short int"
+.LASF217:
+	.string	"UCLASS_PINCTRL"
+.LASF227:
+	.string	"UCLASS_RAMDISK"
+.LASF434:
 	.string	"pattern"
-.LASF387:
-	.string	"post_bind"
-.LASF335:
-	.string	"net_ethaddr"
-.LASF316:
-	.string	"in_addr"
-.LASF19:
-	.string	"uint32_t"
-.LASF130:
-	.string	"image_info"
-.LASF119:
-	.string	"ih_time"
-.LASF467:
-	.string	"available"
-.LASF489:
-	.string	"jt_funcs"
-.LASF490:
-	.string	"ofnode_union"
-.LASF474:
-	.string	"strcasecmp"
-.LASF58:
-	.string	"long double"
-.LASF112:
-	.string	"size_dt_strings"
-.LASF137:
-	.string	"image_info_t"
-.LASF302:
-	.string	"serial"
-.LASF443:
-	.string	"get_page_size"
-.LASF1:
-	.string	"long unsigned int"
-.LASF192:
-	.string	"UCLASS_I2C"
 .LASF176:
 	.string	"UCLASS_I2C_EMUL"
-.LASF50:
-	.string	"select_hwpart"
-.LASF346:
-	.string	"net_native_vlan"
-.LASF196:
-	.string	"UCLASS_I2S"
-.LASF336:
-	.string	"net_server_ethaddr"
-.LASF244:
-	.string	"UCLASS_VIDEO_BRIDGE"
-.LASF166:
-	.string	"images"
-.LASF428:
-	.string	"cmp_buf_data"
-.LASF288:
-	.string	"fdt_blob"
-.LASF14:
-	.string	"char"
-.LASF144:
-	.string	"fit_uname_os"
-.LASF143:
-	.string	"fit_hdr_os"
-.LASF476:
-	.string	"ctrlc"
-.LASF400:
-	.string	"tstc"
-.LASF29:
-	.string	"platdata"
-.LASF433:
-	.string	"reread_val"
-.LASF133:
-	.string	"load"
-.LASF352:
-	.string	"net_loop_state"
 .LASF232:
 	.string	"UCLASS_SPMI"
-.LASF230:
-	.string	"UCLASS_SERIAL"
-.LASF429:
-	.string	"random_test"
-.LASF411:
-	.string	"DIAGONALSCAN"
-.LASF215:
-	.string	"UCLASS_PHY"
-.LASF75:
-	.string	"bi_ddr_freq"
-.LASF32:
-	.string	"node"
-.LASF289:
-	.string	"new_fdt"
-.LASF420:
-	.string	"start_adr"
-.LASF136:
-	.string	"arch"
-.LASF274:
-	.string	"have_console"
-.LASF151:
-	.string	"fit_noffset_fdt"
-.LASF147:
-	.string	"fit_uname_rd"
-.LASF98:
-	.string	"complete"
-.LASF261:
-	.string	"tlb_size"
-.LASF146:
-	.string	"fit_hdr_rd"
-.LASF356:
-	.string	"NETLOOP_FAIL"
-.LASF410:
+.LASF96:
+	.string	"usage"
+.LASF366:
+	.string	"remove"
+.LASF173:
+	.string	"UCLASS_TEST_BUS"
+.LASF316:
+	.string	"save_addr"
+.LASF374:
+	.string	"per_child_auto_alloc_size"
+.LASF463:
+	.string	"flush_dcache_range"
+.LASF413:
 	.string	"CROSSTALK"
-.LASF191:
-	.string	"UCLASS_FIRMWARE"
-.LASF283:
-	.string	"reloc_off"
-.LASF154:
-	.string	"fit_noffset_setup"
-.LASF359:
-	.string	"mem_malloc_end"
-.LASF220:
-	.string	"UCLASS_POWER_DOMAIN"
-.LASF203:
-	.string	"UCLASS_MASS_STORAGE"
+.LASF298:
+	.string	"malloc_ptr"
+.LASF160:
+	.string	"initrd_end"
+.LASF391:
+	.string	"pre_unbind"
+.LASF267:
+	.string	"baudrate"
+.LASF90:
+	.string	"_datarellocal_start_ofs"
+.LASF40:
+	.string	"child_head"
+.LASF257:
+	.string	"arch_global_data"
+.LASF254:
+	.string	"UCLASS_COUNT"
+.LASF399:
+	.string	"stdio_dev"
+.LASF272:
+	.string	"pci_clk"
 .LASF49:
 	.string	"block_drvr"
-.LASF208:
-	.string	"UCLASS_NORTHBRIDGE"
-.LASF485:
-	.string	"malloc"
-.LASF404:
-	.string	"stdio_names"
-.LASF27:
-	.string	"driver"
-.LASF457:
-	.string	"set_ddr_freq"
-.LASF194:
-	.string	"UCLASS_I2C_GENERIC"
-.LASF322:
-	.string	"send"
-.LASF325:
-	.string	"write_hwaddr"
-.LASF483:
-	.string	"rockchip_ddrclk_sip_recalc_rate_v2"
-.LASF275:
-	.string	"env_addr"
-.LASF384:
-	.string	"compatible"
-.LASF290:
-	.string	"fdt_size"
-.LASF272:
-	.string	"mem_clk"
-.LASF25:
-	.string	"_binary_u_boot_bin_start"
-.LASF447:
-	.string	"argc"
-.LASF480:
-	.string	"udelay"
+.LASF466:
+	.string	"memcpy"
+.LASF53:
+	.string	"flash_id"
+.LASF305:
+	.string	"device_node"
+.LASF280:
+	.string	"ram_size"
+.LASF154:
+	.string	"fit_noffset_setup"
+.LASF115:
+	.string	"working_fdt"
+.LASF336:
+	.string	"net_root_path"
+.LASF188:
+	.string	"UCLASS_DMA"
 .LASF85:
 	.string	"bd_t"
-.LASF122:
-	.string	"ih_ep"
+.LASF319:
+	.string	"s_addr"
+.LASF393:
+	.string	"post_probe"
+.LASF345:
+	.string	"net_bcast_ethaddr"
+.LASF83:
+	.string	"bi_boot_params"
+.LASF19:
+	.string	"uint32_t"
+.LASF362:
+	.string	"mem_malloc_brk"
+.LASF331:
+	.string	"net_gateway"
+.LASF373:
+	.string	"platdata_auto_alloc_size"
+.LASF403:
+	.string	"tstc"
 .LASF66:
 	.string	"bi_memstart"
-.LASF306:
-	.string	"properties"
-.LASF448:
-	.string	"argv"
-.LASF150:
-	.string	"fit_uname_fdt"
-.LASF222:
-	.string	"UCLASS_RAM"
-.LASF46:
-	.string	"list_head"
-.LASF388:
-	.string	"pre_unbind"
-.LASF303:
-	.string	"device_node"
-.LASF157:
-	.string	"ft_addr"
-.LASF258:
-	.string	"lastinc"
-.LASF385:
-	.string	"data"
-.LASF311:
-	.string	"__dtb_dt_begin"
-.LASF254:
-	.string	"UCLASS_INVALID"
-.LASF422:
-	.string	"buful"
-.LASF304:
-	.string	"phandle"
-.LASF40:
-	.string	"child_head"
+.LASF245:
+	.string	"UCLASS_VIDEO_CONSOLE"
+.LASF406:
+	.string	"stdio_devices"
+.LASF329:
+	.string	"eth_current"
+.LASF420:
+	.string	"_u_boot_list_2_cmd_2_ddr_test"
+.LASF368:
+	.string	"ofdata_to_platdata"
+.LASF64:
+	.string	"reserved"
+.LASF410:
+	.string	"CHANGEFREQ"
+.LASF433:
+	.string	"page_size"
+.LASF415:
+	.string	"FASTTEST"
+.LASF409:
+	.string	"cd_count"
+.LASF84:
+	.string	"bi_dram"
+.LASF2:
+	.string	"short unsigned int"
+.LASF105:
+	.string	"magic"
+.LASF152:
+	.string	"fit_hdr_setup"
+.LASF141:
+	.string	"legacy_hdr_valid"
+.LASF411:
+	.string	"SCANFREQ"
 .LASF60:
 	.string	"base"
-.LASF278:
-	.string	"relocaddr"
-.LASF142:
-	.string	"fit_uname_cfg"
-.LASF161:
-	.string	"cmdline_start"
-.LASF374:
-	.string	"property"
-.LASF455:
-	.string	"do_ddr_test"
-.LASF284:
-	.string	"new_gd"
-.LASF189:
-	.string	"UCLASS_ETH"
-.LASF276:
-	.string	"env_valid"
-.LASF312:
-	.string	"__dtb_dt_spl_begin"
-.LASF10:
-	.string	"long long unsigned int"
-.LASF34:
-	.string	"parent"
-.LASF190:
-	.string	"UCLASS_GPIO"
-.LASF107:
-	.string	"off_dt_strings"
-.LASF432:
-	.string	"wr_value"
-.LASF82:
-	.string	"bi_arch_number"
-.LASF460:
-	.string	"min_freq"
-.LASF44:
-	.string	"ide_bus_offset"
-.LASF273:
-	.string	"fb_base"
+.LASF442:
+	.string	"err_case"
+.LASF228:
+	.string	"UCLASS_RTC"
+.LASF258:
+	.string	"timer_rate_hz"
+.LASF52:
+	.string	"sector_count"
+.LASF127:
+	.string	"ih_comp"
 .LASF390:
-	.string	"post_probe"
-.LASF425:
-	.string	"err_adr"
-.LASF95:
-	.string	"repeatable"
-.LASF102:
-	.string	"CMD_RET_USAGE"
-.LASF253:
-	.string	"UCLASS_COUNT"
-.LASF209:
-	.string	"UCLASS_NVME"
-.LASF347:
-	.string	"net_restart_wrap"
-.LASF111:
-	.string	"boot_cpuid_phys"
-.LASF59:
-	.string	"lmb_property"
-.LASF488:
-	.string	"/home/typ/src/u-boot_gerrit/u-boot-ddr"
-.LASF484:
-	.string	"rand"
-.LASF218:
-	.string	"UCLASS_PMIC"
-.LASF361:
-	.string	"of_match"
-.LASF9:
-	.string	"long long int"
-.LASF478:
-	.string	"regulator_get_by_platname"
-.LASF493:
-	.string	"print_available_addr"
-.LASF159:
-	.string	"initrd_start"
-.LASF233:
-	.string	"UCLASS_SPI_FLASH"
-.LASF238:
-	.string	"UCLASS_TIMER"
-.LASF386:
-	.string	"uclass_driver"
-.LASF479:
-	.string	"regulator_set_value"
-.LASF466:
-	.string	"max_bank"
-.LASF30:
-	.string	"parent_platdata"
-.LASF252:
-	.string	"UCLASS_DVFS"
-.LASF45:
-	.string	"udevice"
-.LASF345:
-	.string	"net_our_vlan"
-.LASF419:
-	.string	"buf_len"
-.LASF124:
-	.string	"ih_os"
-.LASF219:
-	.string	"UCLASS_PWM"
-.LASF43:
-	.string	"req_seq"
-.LASF205:
-	.string	"UCLASS_MMC"
-.LASF197:
-	.string	"UCLASS_IDE"
-.LASF315:
-	.string	"save_size"
-.LASF109:
-	.string	"version"
-.LASF26:
-	.string	"_binary_u_boot_bin_end"
-.LASF394:
-	.string	"per_device_platdata_auto_alloc_size"
-.LASF8:
-	.string	"unsigned int"
-.LASF413:
-	.string	"FULLTEST"
-.LASF430:
-	.string	"baseaddr"
-.LASF114:
-	.string	"working_fdt"
-.LASF468:
-	.string	"crosstalk"
-.LASF328:
-	.string	"push_packet"
-.LASF113:
-	.string	"size_dt_struct"
-.LASF128:
-	.string	"ih_name"
-.LASF221:
-	.string	"UCLASS_PWRSEQ"
-.LASF6:
-	.string	"short int"
-.LASF307:
-	.string	"child"
-.LASF262:
-	.string	"tlb_fillptr"
-.LASF97:
-	.string	"help"
-.LASF48:
-	.string	"prev"
-.LASF349:
-	.string	"net_boot_file_size"
+	.string	"post_bind"
+.LASF367:
+	.string	"unbind"
+.LASF157:
+	.string	"ft_addr"
+.LASF474:
+	.string	"uclass_get_device"
+.LASF4:
+	.string	"uchar"
 .LASF158:
 	.string	"ft_len"
-.LASF105:
-	.string	"totalsize"
-.LASF295:
-	.string	"malloc_base"
-.LASF223:
-	.string	"UCLASS_REGULATOR"
-.LASF42:
-	.string	"flags"
-.LASF155:
-	.string	"rd_start"
+.LASF47:
+	.string	"next"
+.LASF388:
+	.string	"data"
+.LASF100:
+	.string	"CMD_RET_SUCCESS"
+.LASF153:
+	.string	"fit_uname_setup"
+.LASF48:
+	.string	"prev"
+.LASF212:
+	.string	"UCLASS_PCH"
+.LASF213:
+	.string	"UCLASS_PCI"
+.LASF332:
+	.string	"net_netmask"
+.LASF33:
+	.string	"driver_data"
+.LASF86:
+	.string	"IRQ_STACK_START"
+.LASF180:
+	.string	"UCLASS_ADC"
+.LASF175:
+	.string	"UCLASS_SPI_EMUL"
+.LASF262:
+	.string	"tlb_size"
+.LASF150:
+	.string	"fit_uname_fdt"
 	.hidden	malloc
 	.ident	"GCC: (Linaro GCC 6.3-2017.05) 6.3.1 20170404"
 	.section	.note.GNU-stack,"",@progbits

commit fa655666130ec32a4615c6685c83336111607f45
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Fri Feb 1 10:05:44 2019 +0800

    cmd: memtester: fix print available address bug
    
    Available address for testing may start from 0x00.
    
    Change-Id: If3468c11a096c55cf7fff93dff0034679791b3a9
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/cmd/memtester/ddr_tester_common.c b/cmd/memtester/ddr_tester_common.c
index 93f9f09e99..713d1a99f9 100644
--- a/cmd/memtester/ddr_tester_common.c
+++ b/cmd/memtester/ddr_tester_common.c
@@ -92,7 +92,7 @@ void get_print_available_addr(ulong *start_adr, ulong *length, int print_en)
 		printf("available memory for test:\n");
 		printf("	start		 end	length\n");
 		for (i = 0; i < max_bank; i++)
-			if (start_adr[i])
+			if (length[i])
 				printf("	0x%08lx - 0x%08lx 0x%08lx\n",
 				       start_adr[i], start_adr[i] + length[i],
 				       length[i]);

commit d0c76e678b9c9b7249f7437d73886215daf04d17
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Fri Feb 1 09:51:18 2019 +0800

    cmd: memtester: add each DQ mask function
    
    Fix DQ to exact level when doing memtester by argument fix_bit and
    fix_level.
    
    Change-Id: I4b67b5e499f3e0c4d500d658bc05574f5e50543a
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/cmd/memtester/memtester.c b/cmd/memtester/memtester.c
index 8f624edbd2..7936c03303 100644
--- a/cmd/memtester/memtester.c
+++ b/cmd/memtester/memtester.c
@@ -61,7 +61,8 @@ off_t physaddrbase;
  * err_exit: 1: exit test when found fail.
  * return 0: success, other: fail
  */
-int doing_memtester(ul *arg, ul testenable, ul loops, ul err_exit)
+int doing_memtester(ul *arg, ul testenable, ul loops, ul err_exit,
+		    ul fix_bit, ul fix_level)
 {
 	ul loop, i, j;
 	ul start_adr[CONFIG_NR_DRAM_BANKS], length[CONFIG_NR_DRAM_BANKS];
@@ -115,7 +116,8 @@ int doing_memtester(ul *arg, ul testenable, ul loops, ul err_exit)
 				if (testenable && (!((1 << i) & testenable)))
 					continue;
 				printf("  %-20s: ", tests[i].name);
-				if (!tests[i].fp(bufa[j], bufb[j], count[j])) {
+				if (!tests[i].fp(bufa[j], bufb[j], count[j],
+						 fix_bit, fix_level)) {
 					printf("ok\n");
 				} else {
 					exit_code |= EXIT_FAIL_OTHERTEST;
@@ -157,6 +159,8 @@ static int do_memtester(cmd_tbl_t *cmdtp, int flag, int argc,
 	ul loops = 0;
 	ul testenable = 0;
 	ul err_exit = 0;
+	ul fix_bit = 0;
+	ul fix_level = 0;
 
 	printf("memtester version " __version__ " (%d-bit)\n", UL_LEN);
 	printf("Copyright (C) 2001-2012 Charles Cazabon.\n");
@@ -184,18 +188,26 @@ static int do_memtester(cmd_tbl_t *cmdtp, int flag, int argc,
 			return CMD_RET_USAGE;
 
 	if (argc > 5)
-		if (strict_strtoul(argv[5], 0, &loops) < 0)
+		if (strict_strtoul(argv[5], 0, &fix_bit) < 0)
 			return CMD_RET_USAGE;
 
-	doing_memtester(arg, testenable, loops, err_exit);
+	if (argc > 6)
+		if (strict_strtoul(argv[6], 0, &fix_level) < 0)
+			return CMD_RET_USAGE;
+
+	if (argc > 7)
+		if (strict_strtoul(argv[7], 0, &loops) < 0)
+			return CMD_RET_USAGE;
+
+	doing_memtester(arg, testenable, loops, err_exit, fix_bit, fix_level);
 
 	printf("Done.\n");
 	return 0;
 }
 
-U_BOOT_CMD(memtester, 6, 1, do_memtester,
+U_BOOT_CMD(memtester, 8, 1, do_memtester,
 	   "do memtester",
-	   "[start length [testenable err_exit [loop]]]\n"
+	   "[start length [testenable err_exit fix_bit fix_level [loop]]]\n"
 	   "start: start address, should be 4k align\n"
 	   "length: test length, should be 4k align, if 0 testing full space\n"
 	   "testenable[option]: enable pattern by set bit to 1, null or 0"
@@ -220,6 +232,8 @@ U_BOOT_CMD(memtester, 6, 1, do_memtester,
 	   "	bit17: test stuck address\n"
 	   "	example: testenable=0x1000,enable Bit Flip only\n"
 	   "err_exit: if 1 stop testing immediately when finding error\n"
+	   "fix_bit: fixed bit to a exact level\n"
+	   "fix_level: fix_bit's level, 0: low, 1: high\n"
 	   "loop[option]: testing loop, if 0 or null endless loop\n"
 	   "example:\n"
 	   "	memtester 0x200000 0x1000000: start address: 0x200000 length:"
diff --git a/cmd/memtester/memtester.h b/cmd/memtester/memtester.h
index 779a1ece41..5275a8cf82 100644
--- a/cmd/memtester/memtester.h
+++ b/cmd/memtester/memtester.h
@@ -23,5 +23,6 @@ extern int use_phys;
 extern off_t physaddrbase;
 
 int doing_memtester(unsigned long *arg, unsigned long testenable,
-		    unsigned long loops, unsigned long err_exit);
+		    unsigned long loops, unsigned long err_exit,
+		    unsigned long fix_bit, unsigned long fix_level);
 #endif /* _CMD_MEMTESTER_H */
diff --git a/cmd/memtester/tests.c b/cmd/memtester/tests.c
index f50db4c19e..4f27c1c4cd 100644
--- a/cmd/memtester/tests.c
+++ b/cmd/memtester/tests.c
@@ -114,7 +114,8 @@ int test_stuck_address(u32v *bufa, size_t count)
 	return 0;
 }
 
-int test_random_value(u32v *bufa, u32v *bufb, size_t count)
+int test_random_value(u32v *bufa, u32v *bufb, size_t count,
+		      ul fix_bit, ul fix_level)
 {
 	u32v *p1 = bufa;
 	u32v *p2 = bufb;
@@ -136,7 +137,9 @@ int test_random_value(u32v *bufa, u32v *bufb, size_t count)
 	return compare_regions(bufa, bufb, count);
 }
 
-int test_xor_comparison(u32v *bufa, u32v *bufb, size_t count)
+int test_xor_comparison(u32v *bufa, u32v *bufb, size_t count,
+			ul fix_bit, ul fix_level)
+
 {
 	u32v *p1 = bufa;
 	u32v *p2 = bufb;
@@ -150,7 +153,8 @@ int test_xor_comparison(u32v *bufa, u32v *bufb, size_t count)
 	return compare_regions(bufa, bufb, count);
 }
 
-int test_sub_comparison(u32v *bufa, u32v *bufb, size_t count)
+int test_sub_comparison(u32v *bufa, u32v *bufb, size_t count,
+			ul fix_bit, ul fix_level)
 {
 	u32v *p1 = bufa;
 	u32v *p2 = bufb;
@@ -164,7 +168,8 @@ int test_sub_comparison(u32v *bufa, u32v *bufb, size_t count)
 	return compare_regions(bufa, bufb, count);
 }
 
-int test_mul_comparison(u32v *bufa, u32v *bufb, size_t count)
+int test_mul_comparison(u32v *bufa, u32v *bufb, size_t count,
+			ul fix_bit, ul fix_level)
 {
 	u32v *p1 = bufa;
 	u32v *p2 = bufb;
@@ -178,7 +183,8 @@ int test_mul_comparison(u32v *bufa, u32v *bufb, size_t count)
 	return compare_regions(bufa, bufb, count);
 }
 
-int test_div_comparison(u32v *bufa, u32v *bufb, size_t count)
+int test_div_comparison(u32v *bufa, u32v *bufb, size_t count,
+			ul fix_bit, ul fix_level)
 {
 	u32v *p1 = bufa;
 	u32v *p2 = bufb;
@@ -194,7 +200,8 @@ int test_div_comparison(u32v *bufa, u32v *bufb, size_t count)
 	return compare_regions(bufa, bufb, count);
 }
 
-int test_or_comparison(u32v *bufa, u32v *bufb, size_t count)
+int test_or_comparison(u32v *bufa, u32v *bufb, size_t count,
+		       ul fix_bit, ul fix_level)
 {
 	u32v *p1 = bufa;
 	u32v *p2 = bufb;
@@ -208,7 +215,8 @@ int test_or_comparison(u32v *bufa, u32v *bufb, size_t count)
 	return compare_regions(bufa, bufb, count);
 }
 
-int test_and_comparison(u32v *bufa, u32v *bufb, size_t count)
+int test_and_comparison(u32v *bufa, u32v *bufb, size_t count,
+			ul fix_bit, ul fix_level)
 {
 	u32v *p1 = bufa;
 	u32v *p2 = bufb;
@@ -222,7 +230,8 @@ int test_and_comparison(u32v *bufa, u32v *bufb, size_t count)
 	return compare_regions(bufa, bufb, count);
 }
 
-int test_seqinc_comparison(u32v *bufa, u32v *bufb, size_t count)
+int test_seqinc_comparison(u32v *bufa, u32v *bufb, size_t count,
+			   ul fix_bit, ul fix_level)
 {
 	u32v *p1 = bufa;
 	u32v *p2 = bufb;
@@ -234,7 +243,8 @@ int test_seqinc_comparison(u32v *bufa, u32v *bufb, size_t count)
 	return compare_regions(bufa, bufb, count);
 }
 
-int test_solidbits_comparison(u32v *bufa, u32v *bufb, size_t count)
+int test_solidbits_comparison(u32v *bufa, u32v *bufb, size_t count,
+			      ul fix_bit, ul fix_level)
 {
 	u32v *p1 = bufa;
 	u32v *p2 = bufb;
@@ -248,6 +258,10 @@ int test_solidbits_comparison(u32v *bufa, u32v *bufb, size_t count)
 	for (j = 0; j < 64; j++) {
 		printf("\b\b\b\b\b\b\b\b\b\b\b");
 		q = (j % 2) == 0 ? UL_ONEBITS : 0;
+		if (fix_level)
+			q |= fix_bit;
+		else
+			q &= ~fix_bit;
 		data[0] = data[2] = q;
 		data[1] = data[3] = ~q;
 		data_cpu_2_io(data, sizeof(data));
@@ -268,7 +282,8 @@ int test_solidbits_comparison(u32v *bufa, u32v *bufb, size_t count)
 	return 0;
 }
 
-int test_checkerboard_comparison(u32v *bufa, u32v *bufb, size_t count)
+int test_checkerboard_comparison(u32v *bufa, u32v *bufb, size_t count,
+				 ul fix_bit, ul fix_level)
 {
 	u32v *p1 = bufa;
 	u32v *p2 = bufb;
@@ -282,6 +297,11 @@ int test_checkerboard_comparison(u32v *bufa, u32v *bufb, size_t count)
 	for (j = 0; j < 64; j++) {
 		printf("\b\b\b\b\b\b\b\b\b\b\b");
 		q = (j % 2) == 0 ? CHECKERBOARD1 : CHECKERBOARD2;
+		if (fix_level)
+			q |= fix_bit;
+		else
+			q &= ~fix_bit;
+
 		data[0] = data[2] = q;
 		data[1] = data[3] = ~q;
 		data_cpu_2_io(data, sizeof(data));
@@ -302,12 +322,14 @@ int test_checkerboard_comparison(u32v *bufa, u32v *bufb, size_t count)
 	return 0;
 }
 
-int test_blockseq_comparison(u32v *bufa, u32v *bufb, size_t count)
+int test_blockseq_comparison(u32v *bufa, u32v *bufb, size_t count,
+			     ul fix_bit, ul fix_level)
 {
 	u32v *p1 = bufa;
 	u32v *p2 = bufb;
 	unsigned int j;
 	u32 data[4];
+	u32 q;
 	size_t i;
 
 	printf("           ");
@@ -318,8 +340,17 @@ int test_blockseq_comparison(u32v *bufa, u32v *bufb, size_t count)
 		p2 = (u32v *)bufb;
 		printf("setting %3u", j);
 		fflush(stdout);
-		data[0] = data[2] = (u32)UL_BYTE(j);
-		data[1] = data[3] = (u32)UL_BYTE(j);
+		q = (u32)UL_BYTE(j);
+		if (fix_level)
+			q |= fix_bit;
+		else
+			q &= ~fix_bit;
+
+		data[0] = q;
+		data[1] = q;
+		data[2] = q;
+		data[3] = q;
+
 		data_cpu_2_io(data, sizeof(data));
 
 		for (i = 0; i < count; i++)
@@ -335,12 +366,14 @@ int test_blockseq_comparison(u32v *bufa, u32v *bufb, size_t count)
 	return 0;
 }
 
-int test_walkbits0_comparison(u32v *bufa, u32v *bufb, size_t count)
+int test_walkbits0_comparison(u32v *bufa, u32v *bufb, size_t count,
+			      ul fix_bit, ul fix_level)
 {
 	u32v *p1 = bufa;
 	u32v *p2 = bufb;
 	unsigned int j;
 	u32 data[4];
+	u32 q;
 	size_t i;
 
 	printf("           ");
@@ -352,12 +385,19 @@ int test_walkbits0_comparison(u32v *bufa, u32v *bufb, size_t count)
 		printf("setting %3u", j);
 		fflush(stdout);
 		if (j < UL_LEN)
-			data[0] = ONE << j;
+			q = ONE << j;
 		else
-			data[0] = ONE << (UL_LEN * 2 - j - 1);
-		data[1] = data[0];
-		data[2] = data[0];
-		data[3] = data[0];
+			q = ONE << (UL_LEN * 2 - j - 1);
+
+		if (fix_level)
+			q |= fix_bit;
+		else
+			q &= ~fix_bit;
+
+		data[0] = q;
+		data[1] = q;
+		data[2] = q;
+		data[3] = q;
 		data_cpu_2_io(data, sizeof(data));
 
 		for (i = 0; i < count; i++) {
@@ -374,12 +414,14 @@ int test_walkbits0_comparison(u32v *bufa, u32v *bufb, size_t count)
 	return 0;
 }
 
-int test_walkbits1_comparison(u32v *bufa, u32v *bufb, size_t count)
+int test_walkbits1_comparison(u32v *bufa, u32v *bufb, size_t count,
+			      ul fix_bit, ul fix_level)
 {
 	u32v *p1 = bufa;
 	u32v *p2 = bufb;
 	unsigned int j;
 	u32 data[4];
+	u32 q;
 	size_t i;
 
 	printf("           ");
@@ -391,12 +433,18 @@ int test_walkbits1_comparison(u32v *bufa, u32v *bufb, size_t count)
 		printf("setting %3u", j);
 		fflush(stdout);
 		if (j < UL_LEN)
-			data[0] = UL_ONEBITS ^ (ONE << j);
+			q = UL_ONEBITS ^ (ONE << j);
 		else
-			data[0] = UL_ONEBITS ^ (ONE << (UL_LEN * 2 - j - 1));
-		data[1] = data[0];
-		data[2] = data[0];
-		data[3] = data[0];
+			q = UL_ONEBITS ^ (ONE << (UL_LEN * 2 - j - 1));
+		if (fix_level)
+			q |= fix_bit;
+		else
+			q &= ~fix_bit;
+
+		data[0] = q;
+		data[1] = q;
+		data[2] = q;
+		data[3] = q;
 		data_cpu_2_io(data, sizeof(data));
 
 		for (i = 0; i < count; i++) {
@@ -413,7 +461,8 @@ int test_walkbits1_comparison(u32v *bufa, u32v *bufb, size_t count)
 	return 0;
 }
 
-int test_bitspread_comparison(u32v *bufa, u32v *bufb, size_t count)
+int test_bitspread_comparison(u32v *bufa, u32v *bufb, size_t count,
+			      ul fix_bit, ul fix_level)
 {
 	u32v *p1 = bufa;
 	u32v *p2 = bufb;
@@ -438,6 +487,13 @@ int test_bitspread_comparison(u32v *bufa, u32v *bufb, size_t count)
 			data[1] = UL_ONEBITS ^ (ONE << (UL_LEN * 2 - 1 - j)
 						| (ONE << (UL_LEN * 2 + 1 - j)));
 		}
+		if (fix_level) {
+			data[0] |= fix_bit;
+			data[1] |= fix_bit;
+		} else {
+			data[0] &= ~fix_bit;
+			data[1] &= ~fix_bit;
+		}
 		data[2] = data[0];
 		data[3] = data[1];
 		data_cpu_2_io(data, sizeof(data));
@@ -456,7 +512,8 @@ int test_bitspread_comparison(u32v *bufa, u32v *bufb, size_t count)
 	return 0;
 }
 
-int test_bitflip_comparison(u32v *bufa, u32v *bufb, size_t count)
+int test_bitflip_comparison(u32v *bufa, u32v *bufb, size_t count,
+			    ul fix_bit, ul fix_level)
 {
 	u32v *p1 = bufa;
 	u32v *p2 = bufb;
@@ -474,6 +531,11 @@ int test_bitflip_comparison(u32v *bufa, u32v *bufb, size_t count)
 			q = ~q;
 			printf("setting %3u", k * 8 + j);
 			fflush(stdout);
+			if (fix_level)
+				q |= fix_bit;
+			else
+				q &= ~fix_bit;
+
 			data[0] = data[2] = q;
 			data[1] = data[3] = ~q;
 			data_cpu_2_io(data, sizeof(data));
@@ -494,7 +556,8 @@ int test_bitflip_comparison(u32v *bufa, u32v *bufb, size_t count)
 }
 
 #ifdef TEST_NARROW_WRITES
-int test_8bit_wide_random(u32v *bufa, u32v *bufb, size_t count)
+int test_8bit_wide_random(u32v *bufa, u32v *bufb, size_t count,
+			  ul fix_bit, ul fix_level)
 {
 	u8v *p1, *t;
 	u32v *p2;
@@ -531,7 +594,8 @@ int test_8bit_wide_random(u32v *bufa, u32v *bufb, size_t count)
 	return 0;
 }
 
-int test_16bit_wide_random(u32v *bufa, u32v *bufb, size_t count)
+int test_16bit_wide_random(u32v *bufa, u32v *bufb, size_t count,
+			   ul fix_bit, ul fix_level)
 {
 	u16v *p1, *t;
 	u32v *p2;
diff --git a/cmd/memtester/tests.h b/cmd/memtester/tests.h
index cfd096e560..b3ddcaed2e 100644
--- a/cmd/memtester/tests.h
+++ b/cmd/memtester/tests.h
@@ -19,38 +19,38 @@
 
 int test_stuck_address(u32v *bufa, size_t count);
 int test_random_value(u32v *bufa,
-		      u32v *bufb, size_t count);
+		      u32v *bufb, size_t count, ul fix_bit, ul fix_level);
 int test_xor_comparison(u32v *bufa,
-			u32v *bufb, size_t count);
+			u32v *bufb, size_t count, ul fix_bit, ul fix_level);
 int test_sub_comparison(u32v *bufa,
-			u32v *bufb, size_t count);
+			u32v *bufb, size_t count, ul fix_bit, ul fix_level);
 int test_mul_comparison(u32v *bufa,
-			u32v *bufb, size_t count);
+			u32v *bufb, size_t count, ul fix_bit, ul fix_level);
 int test_div_comparison(u32v *bufa,
-			u32v *bufb, size_t count);
+			u32v *bufb, size_t count, ul fix_bit, ul fix_level);
 int test_or_comparison(u32v *bufa,
-		       u32v *bufb, size_t count);
+		       u32v *bufb, size_t count, ul fix_bit, ul fix_level);
 int test_and_comparison(u32v *bufa,
-			u32v *bufb, size_t count);
-int test_seqinc_comparison(u32v *bufa,
-			   u32v *bufb, size_t count);
-int test_solidbits_comparison(u32v *bufa,
-			      u32v *bufb, size_t count);
-int test_checkerboard_comparison(u32v *bufa,
-				 u32v *bufb, size_t count);
-int test_blockseq_comparison(u32v *bufa,
-			     u32v *bufb, size_t count);
-int test_walkbits0_comparison(u32v *bufa,
-			      u32v *bufb, size_t count);
-int test_walkbits1_comparison(u32v *bufa,
-			      u32v *bufb, size_t count);
-int test_bitspread_comparison(u32v *bufa,
-			      u32v *bufb, size_t count);
-int test_bitflip_comparison(u32v *bufa,
-			    u32v *bufb, size_t count);
+			u32v *bufb, size_t count, ul fix_bit, ul fix_level);
+int test_seqinc_comparison(u32v *bufa, u32v *bufb, size_t count,
+			   ul fix_bit, ul fix_level);
+int test_solidbits_comparison(u32v *bufa, u32v *bufb, size_t count,
+			      ul fix_bit, ul fix_level);
+int test_checkerboard_comparison(u32v *bufa, u32v *bufb, size_t count,
+				 ul fix_bit, ul fix_level);
+int test_blockseq_comparison(u32v *bufa, u32v *bufb, size_t count,
+			     ul fix_bit, ul fix_level);
+int test_walkbits0_comparison(u32v *bufa, u32v *bufb, size_t count,
+			      ul fix_bit, ul fix_level);
+int test_walkbits1_comparison(u32v *bufa, u32v *bufb, size_t count,
+			      ul fix_bit, ul fix_level);
+int test_bitspread_comparison(u32v *bufa, u32v *bufb, size_t count,
+			      ul fix_bit, ul fix_level);
+int test_bitflip_comparison(u32v *bufa, u32v *bufb, size_t count,
+			    ul fix_bit, ul fix_level);
 #ifdef TEST_NARROW_WRITES
-int test_8bit_wide_random(u32v *bufa,
-			  u32v *bufb, size_t count);
-int test_16bit_wide_random(u32v *bufa,
-			   u32v *bufb, size_t count);
+int test_8bit_wide_random(u32v *bufa, u32v *bufb, size_t count,
+			  ul fix_bit, ul fix_level);
+int test_16bit_wide_random(u32v *bufa, u32v *bufb, size_t count,
+			   ul fix_bit, ul fix_level);
 #endif
diff --git a/cmd/memtester/types.h b/cmd/memtester/types.h
index 4442eb3c2e..3fa4ca5c9d 100644
--- a/cmd/memtester/types.h
+++ b/cmd/memtester/types.h
@@ -24,7 +24,8 @@ typedef unsigned short volatile u16v;
 
 struct test {
 	char *name;
-	int (*fp)(u32v *bufa, u32v *bufb, size_t count);
+	int (*fp)(u32v *bufa, u32v *bufb, size_t count,
+		  ul fix_bit, ul fix_level);
 };
 
 #endif /* __MEMTESTER_TYPES_H */

commit 07ea4f345b408e5848acd98a553ba968c7563e1f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Feb 14 11:31:32 2019 +0800

    rockchip: param: fix bl32 enable flag not set when atags effect
    
    Change-Id: I3a57dcdbd3e247fbe7f2230d70dd9687251cce0a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/param.c b/arch/arm/mach-rockchip/param.c
index 148899298e..c5c28d4955 100644
--- a/arch/arm/mach-rockchip/param.c
+++ b/arch/arm/mach-rockchip/param.c
@@ -129,10 +129,12 @@ struct sysmem_property param_parse_optee_mem(void)
 		    (tos_parameter->tee_mem.flags == 1)) {
 			prop.base = tos_parameter->tee_mem.phy_addr;
 			prop.size = tos_parameter->tee_mem.size;
-			gd->flags |= GD_FLG_BL32_ENABLED;
 		}
 	}
 
+	if (prop.size)
+		gd->flags |= GD_FLG_BL32_ENABLED;
+
 	debug("TOS: 0x%llx - 0x%llx\n", (u64)prop.base, (u64)prop.base + prop.size);
 
 	return prop;

commit fd810b8003bdef7ec4485fb08cbe2d7bef7f284d
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Feb 14 11:21:23 2019 +0800

    android: return fail if not found misc partition
    
    Return directly and do not continue read from misc partition
    if there is no partition.
    
    Change-Id: I549d123632aecc5bd29ebdc2c4c7917c76750247
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 532cca5e9f..feec2fda13 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -893,8 +893,10 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	 */
 	part_num = part_get_info_by_name(dev_desc, ANDROID_PARTITION_MISC,
 					 &misc_part_info);
-	if (part_num < 0)
+	if (part_num < 0) {
 		printf("%s Could not find misc partition\n", __func__);
+		return -ENODEV;
+	}
 
 #ifdef CONFIG_ANDROID_KEYMASTER_CA
 	/* load attestation key from misc partition. */

commit 644804ed624b08dd6529c4a1b4e8eb762fc975fd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jan 25 19:29:52 2019 +0800

    rockchip: board: support enter download mode by hotkey
    
    - ctrl+b: enter bootrom download mode, ('b': bootrom);
    - ctrl+d: enter rockusb download mode; ('d': default download, ie. rockusb);
    
    This patch provides convenience for download when rockusb/recovery-key is
    absent or not work, or U-Boot early panic.
    
    Change-Id: I7709183c645400f60af3d480f84f6e6887ddc20e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 8108e3acc2..1130dc46a6 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -39,6 +39,7 @@
 #endif
 #include <of_live.h>
 #include <dm/root.h>
+#include <console.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 /* define serialno max length, the max length is 512 Bytes
@@ -202,11 +203,30 @@ void board_env_fixup(void)
 		env_set_hex("kernel_addr_r", kernel_addr_r);
 }
 
+static void early_bootrom_download(void)
+{
+	if (!tstc())
+		return;
+
+	gd->console_evt = getc();
+#if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0)
+	/* ctrl+b */
+	if (gd->console_evt == CONSOLE_EVT_CTRL_B) {
+		printf("Enter bootrom download...");
+		mdelay(100);
+		writel(BOOT_BROM_DOWNLOAD, CONFIG_ROCKCHIP_BOOT_MODE_REG);
+		do_reset(NULL, 0, 0, NULL);
+		printf("failed!\n");
+	}
+#endif
+}
+
 int board_init(void)
 {
 	int ret;
 
 	board_debug_uart_init();
+	early_bootrom_download();
 
 #ifdef CONFIG_USING_KERNEL_DTB
 	init_kernel_dtb();
diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index 072e69e48e..daccbcf587 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -19,6 +19,7 @@
 #include <ramdisk.h>
 #endif
 #include <mmc.h>
+#include <console.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -128,7 +129,9 @@ void boot_devtype_init(void)
 
 void rockchip_dnl_mode_check(void)
 {
-	if (rockchip_dnl_key_pressed()) {
+	/* recovery key or "ctrl+d" */
+	if (rockchip_dnl_key_pressed() ||
+	    gd->console_evt == CONSOLE_EVT_CTRL_D) {
 		printf("download key pressed... ");
 		if (rockchip_u2phy_vbus_detect() > 0) {
 			printf("entering download mode...\n");

commit 13f190efecf4ab29827f436c4e6bd7ba522f2963
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 29 20:55:18 2019 +0800

    console: add console event key definition and gd->console_evt
    
    "console event" is similar to some hotkey event(mainly long press),
    we can make something triggered by hotkey.
    
    Change-Id: I845d9820997b4a90d55c9575e424b0eaafbc7b0c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index 343c1e7841..ea3f8e5252 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -135,6 +135,7 @@ typedef struct global_data {
 #endif
 	struct pre_serial serial;
 	ulong sys_start_tick;		/* For report system start-up time */
+	int console_evt;		/* Console event, maybe some hotkey  */
 #ifdef CONFIG_LOG
 	int log_drop_count;		/* Number of dropped log messages */
 	int default_log_level;		/* For devices with no filters */
diff --git a/include/console.h b/include/console.h
index cea29ed6dc..d72c8cdf35 100644
--- a/include/console.h
+++ b/include/console.h
@@ -10,6 +10,9 @@
 
 extern char console_buffer[];
 
+#define CONSOLE_EVT_CTRL_B	0x02
+#define CONSOLE_EVT_CTRL_D	0x04
+
 /* common/console.c */
 int console_init_f(void);	/* Before relocation; uses the serial  stuff */
 int console_init_r(void);	/* After  relocation; uses the console stuff */

commit 68ba937304746771093b2178ed2ccd2e07d8825f
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Tue Jan 22 19:25:40 2019 +0800

    lib: optee_client: recover original partition after error
    
    1.switch to RPMB partition when call init rpmb
    2.switch to original partition when call finish rpmb
    3.it will not switch to original partition when error
      occurred, we should recover original partition after error
    
    Change-Id: I41927e82fb2db690058a809f008ca1f59d334011
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/OpteeClientRPC.c b/lib/optee_clientApi/OpteeClientRPC.c
index 316765cccd..919e89fac1 100644
--- a/lib/optee_clientApi/OpteeClientRPC.c
+++ b/lib/optee_clientApi/OpteeClientRPC.c
@@ -312,8 +312,7 @@ TEEC_Result OpteeRpcCmdRpmb(t_teesmc32_arg *TeeSmc32Arg)
 
 		switch (RequestMsgType) {
 		case TEE_RPC_RPMB_MSG_TYPE_REQ_AUTH_KEY_PROGRAM: {
-			EfiStatus = init_rpmb();
-			if (EfiStatus != 0) {
+			if (init_rpmb() != 0) {
 				TeecResult = TEEC_ERROR_GENERIC;
 				break;
 			}
@@ -321,12 +320,11 @@ TEEC_Result OpteeRpcCmdRpmb(t_teesmc32_arg *TeeSmc32Arg)
 			EfiStatus = do_programkey((struct s_rpmb *)
 				RequestPackets_back);
 
-			if (EfiStatus != 0) {
+			if (finish_rpmb() != 0) {
 				TeecResult = TEEC_ERROR_GENERIC;
 				break;
 			}
 
-			EfiStatus = finish_rpmb();
 			if (EfiStatus != 0) {
 				TeecResult = TEEC_ERROR_GENERIC;
 				break;
@@ -336,20 +334,19 @@ TEEC_Result OpteeRpcCmdRpmb(t_teesmc32_arg *TeeSmc32Arg)
 		}
 
 		case TEE_RPC_RPMB_MSG_TYPE_REQ_WRITE_COUNTER_VAL_READ: {
-			EfiStatus = init_rpmb();
-			if (EfiStatus != 0) {
+			if (init_rpmb() != 0) {
 				TeecResult = TEEC_ERROR_GENERIC;
 				break;
 			}
 
 			EfiStatus = do_readcounter((struct s_rpmb *)
 				RequestPackets_back);
-			if (EfiStatus != 0) {
+
+			if (finish_rpmb() != 0) {
 				TeecResult = TEEC_ERROR_GENERIC;
 				break;
 			}
 
-			EfiStatus = finish_rpmb();
 			if (EfiStatus != 0) {
 				TeecResult = TEEC_ERROR_GENERIC;
 				break;
@@ -359,21 +356,19 @@ TEEC_Result OpteeRpcCmdRpmb(t_teesmc32_arg *TeeSmc32Arg)
 		}
 
 		case TEE_RPC_RPMB_MSG_TYPE_REQ_AUTH_DATA_WRITE: {
-			EfiStatus = init_rpmb();
-			if (EfiStatus != 0) {
+			if (init_rpmb() != 0) {
 				TeecResult = TEEC_ERROR_GENERIC;
 				break;
 			}
 
 			EfiStatus = do_authenticatedwrite((struct s_rpmb *)
 				RequestPackets_back);
-			if (EfiStatus != 0) {
+
+			if (finish_rpmb() != 0) {
 				TeecResult = TEEC_ERROR_GENERIC;
 				break;
 			}
 
-			EfiStatus = finish_rpmb();
-
 			if (EfiStatus != 0) {
 				TeecResult = TEEC_ERROR_GENERIC;
 				break;
@@ -383,21 +378,19 @@ TEEC_Result OpteeRpcCmdRpmb(t_teesmc32_arg *TeeSmc32Arg)
 		}
 
 		case TEE_RPC_RPMB_MSG_TYPE_REQ_AUTH_DATA_READ: {
-			EfiStatus = init_rpmb();
-			if (EfiStatus != 0) {
+			if (init_rpmb() != 0) {
 				TeecResult = TEEC_ERROR_GENERIC;
 				break;
 			}
 
 			EfiStatus = do_authenticatedread((struct s_rpmb *)
 				RequestPackets_back, global_block_count);
-			if (EfiStatus != 0) {
+
+			if (finish_rpmb() != 0) {
 				TeecResult = TEEC_ERROR_GENERIC;
 				break;
 			}
 
-			EfiStatus = finish_rpmb();
-
 			if (EfiStatus != 0) {
 				TeecResult = TEEC_ERROR_GENERIC;
 				break;

commit df99e5808c66671ed209e51fcabe120dd29d726b
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Fri Jan 4 19:48:19 2019 +0800

    cmd: add test case for secure storage
    
    1.mmc testsecurestorage to test secure storage
    2.test secure storage in rpmb and test secure storage in
      security partition when use emmc
    3.test secure storage in security partition when use nand
    
    Change-Id: Id6f72893c002c5040cb1790051c9685911878df7
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/cmd/Makefile b/cmd/Makefile
index 8cb26cccd8..6ac48171a1 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -156,6 +156,8 @@ obj-$(CONFIG_CMD_DFU) += dfu.o
 obj-$(CONFIG_CMD_GPT) += gpt.o
 obj-$(CONFIG_CMD_ETHSW) += ethsw.o
 
+obj-$(CONFIG_OPTEE_CLIENT) += optee.o
+
 # Power
 obj-$(CONFIG_CMD_PMIC) += pmic.o
 obj-$(CONFIG_CMD_REGULATOR) += regulator.o
diff --git a/cmd/mmc.c b/cmd/mmc.c
index 18008fd1c7..a853d97e4d 100644
--- a/cmd/mmc.c
+++ b/cmd/mmc.c
@@ -10,6 +10,7 @@
 #include <mmc.h>
 #include <optee_include/OpteeClientInterface.h>
 #include <optee_include/OpteeClientApiLib.h>
+#include <optee_test.h>
 
 static int curr_device = -1;
 
@@ -125,8 +126,8 @@ static int do_mmcinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 }
 
 #ifdef CONFIG_OPTEE_CLIENT
-static int do_mmc_testrpmb(cmd_tbl_t *cmdtp,
-		int flag, int argc, char * const argv[])
+static int do_mmc_test_secure_storage(cmd_tbl_t *cmdtp,
+				      int flag, int argc, char * const argv[])
 {
 	struct mmc *mmc;
 
@@ -144,29 +145,23 @@ static int do_mmc_testrpmb(cmd_tbl_t *cmdtp,
 	if (!mmc)
 		return CMD_RET_FAILURE;
 
-	uint64_t value;
-	trusty_write_rollback_index(0x87654321, 0x1122334455667788);
-	trusty_read_rollback_index(0x87654321, &value);
-	debug("sizeof(value) %zu\n ", sizeof(value));
-	if (value == 0x1122334455667788)
-		printf("good ! value==0x1122334455667788\n ");
-	else
-		printf("error ! value!=0x1122334455667788\n ");
-
-	uint8_t data[] = "just a data";
-	uint8_t data_read[11];
-	trusty_write_permanent_attributes(data, sizeof(data));
-	trusty_read_permanent_attributes(data_read, sizeof(data));
-	printf("attribute: %s\n ", data_read);
-
-	trusty_notify_optee_uboot_end();
-	printf(" tell_optee_uboot_end \n ");
-	value = 0;
-	trusty_read_rollback_index(0x87654321, &value);
-	if (value == 0x1122334455667788)
-		printf(" value==0x1122334455667788 read still enable\n ");
-	else
-		printf(" good! value!=0x1122334455667788 read denied\n ");
+	int i, count = 100;
+
+	for (i = 1; i <= count; i++) {
+		if (test_secure_storage_default() == 0) {
+			printf("test_secure_storage_default success! %d/%d\n", i, count);
+		} else {
+			printf("test_secure_storage_default fail! %d/%d\n", i, count);
+			break;
+		}
+		if (test_secure_storage_security_partition() == 0) {
+			printf("test_secure_storage_security_partition success! %d/%d\n", i, count);
+		} else {
+			printf("test_secure_storage_security_partition fail! %d/%d\n", i, count);
+			break;
+		}
+	}
+
 	return CMD_RET_SUCCESS;
 }
 
@@ -960,7 +955,7 @@ static cmd_tbl_t cmd_mmc[] = {
 	U_BOOT_CMD_MKENT(rst-function, 3, 0, do_mmc_rst_func, "", ""),
 #endif
 #ifdef CONFIG_OPTEE_CLIENT
-	U_BOOT_CMD_MKENT(testrpmb, 1, 0, do_mmc_testrpmb, "", ""),
+	U_BOOT_CMD_MKENT(testsecurestorage, 1, 0, do_mmc_test_secure_storage, "", ""),
 	U_BOOT_CMD_MKENT(testefuse, 1, 0, do_mmc_testefuse, "", ""),
 #endif
 #ifdef CONFIG_SUPPORT_EMMC_RPMB
@@ -1028,7 +1023,7 @@ U_BOOT_CMD(
 	"   WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values.\n"
 #endif
 #ifdef CONFIG_OPTEE_CLIENT
-	"mmc testrpmb - test CA call static TA,and TA call rpmb in uboot\n"
+	"mmc testsecurestorage - test CA call static TA to store data in security\n"
 	"mmc testefuse - test CA call static TA,and TA read or write efuse\n"
 #endif
 #ifdef CONFIG_SUPPORT_EMMC_RPMB
diff --git a/cmd/optee.c b/cmd/optee.c
new file mode 100644
index 0000000000..f1140176b6
--- /dev/null
+++ b/cmd/optee.c
@@ -0,0 +1,279 @@
+/* SPDX-License-Identifier:     GPL-2.0+
+ *
+ * Copyright 2019, Rockchip Electronics Co., Ltd
+ *
+ */
+
+#include <common.h>
+#include <optee_include/OpteeClientApiLib.h>
+#include <optee_include/tee_client_api.h>
+#include <optee_include/tee_api_defines.h>
+#include <boot_rkimg.h>
+#include <stdlib.h>
+
+int test_secure_storage_default(void)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -1;
+	}
+
+	debug("%s start\n", __func__);
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						    TEEC_NONE,
+						    TEEC_NONE,
+						    TEEC_NONE);
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a =
+		(dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				      &TeecSession,
+				      TeecUuid,
+				      TEEC_LOGIN_PUBLIC,
+				      NULL,
+				      &TeecOperation,
+				      &ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS) {
+		printf("%s TEEC_OpenSession fail!\n", __func__);
+		return -1;
+	}
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = sizeof("filename_test_secure_storage_default");
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS) {
+		printf("%s TEEC_AllocateSharedMemory fail!\n", __func__);
+		return -1;
+	}
+
+	memcpy(SharedMem0.buffer,
+	       "filename_test_secure_storage_default",
+	       SharedMem0.size);
+
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = 1024 * 8;
+	SharedMem1.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+	if (TeecResult != TEEC_SUCCESS) {
+		printf("%s TEEC_AllocateSharedMemory fail!\n", __func__);
+		return -1;
+	}
+
+	memset(SharedMem1.buffer, 'a', SharedMem1.size);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						    TEEC_MEMREF_TEMP_INOUT,
+						    TEEC_NONE,
+						    TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,//write data
+					1,
+					&TeecOperation,
+					&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS) {
+		printf("%s TEEC_InvokeCommand fail!\n", __func__);
+		return -1;
+	}
+
+	TEEC_SharedMemory SharedMem2 = {0};
+
+	SharedMem2.size = 1024 * 8;
+	SharedMem2.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem2);
+	if (TeecResult != TEEC_SUCCESS) {
+		printf("%s TEEC_AllocateSharedMemory fail!\n", __func__);
+		return -1;
+	}
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem2.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem2.size;
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,//read data
+					0,
+					&TeecOperation,
+					&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS) {
+		printf("%s TEEC_InvokeCommand fail!\n", __func__);
+		return -1;
+	}
+	if (memcmp(SharedMem1.buffer, SharedMem2.buffer,
+	    SharedMem1.size) != 0) {
+		printf("error! %s read not equal to write!\n", __func__);
+		return -1;
+	}
+
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+	TEEC_ReleaseSharedMemory(&SharedMem2);
+
+	TEEC_CloseSession(&TeecSession);
+
+	TEEC_FinalizeContext(&TeecContext);
+
+	debug("%s end\n", __func__);
+	return 0;
+}
+
+int test_secure_storage_security_partition(void)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -1;
+	}
+
+	debug("%s start\n", __func__);
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						    TEEC_NONE,
+						    TEEC_NONE,
+						    TEEC_NONE);
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a = 0;//use security partition
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				      &TeecSession,
+				      TeecUuid,
+				      TEEC_LOGIN_PUBLIC,
+				      NULL,
+				      &TeecOperation,
+				      &ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS) {
+		printf("%s TEEC_OpenSession fail!\n", __func__);
+		return -1;
+	}
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = sizeof("filename_test_secure_storage_security_partition");
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS) {
+		printf("%s TEEC_AllocateSharedMemory fail!\n", __func__);
+		return -1;
+	}
+
+	memcpy(SharedMem0.buffer,
+	       "filename_test_secure_storage_security_partition",
+	       SharedMem0.size);
+
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = 1024 * 8;
+	SharedMem1.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+	if (TeecResult != TEEC_SUCCESS) {
+		printf("%s TEEC_AllocateSharedMemory fail!\n", __func__);
+		return -1;
+	}
+
+	memset(SharedMem1.buffer, 'b', SharedMem1.size);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						    TEEC_MEMREF_TEMP_INOUT,
+						    TEEC_NONE,
+						    TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,//write data
+					1,
+					&TeecOperation,
+					&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS) {
+		printf("%s TEEC_InvokeCommand fail!\n", __func__);
+		return -1;
+	}
+
+	TEEC_SharedMemory SharedMem2 = {0};
+
+	SharedMem2.size = 1024 * 8;
+	SharedMem2.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem2);
+	if (TeecResult != TEEC_SUCCESS) {
+		printf("%s TEEC_AllocateSharedMemory fail!\n", __func__);
+		return -1;
+	}
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem2.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem2.size;
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,//read data
+					0,
+					&TeecOperation,
+					&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS) {
+		printf("%s TEEC_InvokeCommand fail!\n", __func__);
+		return -1;
+	}
+	if (memcmp(SharedMem1.buffer, SharedMem2.buffer,
+	    SharedMem1.size) != 0) {
+		printf("error! %s read not equal to write!\n", __func__);
+		return -1;
+	}
+
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+	TEEC_ReleaseSharedMemory(&SharedMem2);
+
+	TEEC_CloseSession(&TeecSession);
+
+	TEEC_FinalizeContext(&TeecContext);
+
+	debug("%s end\n", __func__);
+	return 0;
+}
diff --git a/include/optee_test.h b/include/optee_test.h
new file mode 100644
index 0000000000..537ad7f282
--- /dev/null
+++ b/include/optee_test.h
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier:     GPL-2.0+
+ *
+ * Copyright 2019, Rockchip Electronics Co., Ltd
+ * hisping lin, <hisping.lin@rock-chips.com>
+ *
+ */
+#ifndef _OPTEE_TEST_H_
+#define _OPTEE_TEST_H_
+
+/*
+ * test secure storage in rpmb when use emmc
+ * test secure storage in security partition when use nand
+ */
+int test_secure_storage_default(void);
+
+/*
+ * test secure storage in security partition
+ */
+int test_secure_storage_security_partition(void);
+
+#endif /*_OPTEE_TEST_H_*/
diff --git a/lib/optee_clientApi/OpteeClientMem.c b/lib/optee_clientApi/OpteeClientMem.c
index b811179caa..cec5b50c3b 100644
--- a/lib/optee_clientApi/OpteeClientMem.c
+++ b/lib/optee_clientApi/OpteeClientMem.c
@@ -140,8 +140,8 @@ void OpteeClientMemInit(void)
 
 	tee_smc_call(&ArmSmcArgs);
 
-	printf("get share memory, arg0=0x%x arg1=0x%x arg2=0x%x arg3=0x%x\n",
-			ArmSmcArgs.Arg0, ArmSmcArgs.Arg1, ArmSmcArgs.Arg2, ArmSmcArgs.Arg3);
+	debug("get share memory, arg0=0x%x arg1=0x%x arg2=0x%x arg3=0x%x\n",
+	      ArmSmcArgs.Arg0, ArmSmcArgs.Arg1, ArmSmcArgs.Arg2, ArmSmcArgs.Arg3);
 
 	my_malloc_init((void *)(size_t)ArmSmcArgs.Arg1, ArmSmcArgs.Arg2);
 }

commit 2e08e069625040c6bf65b1d9864256a0619ca4cd
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Feb 12 16:49:50 2019 +0800

    rockchip: make.sh: convert chip id RV1108 to RV110X
    
    Change-Id: I93ff273109bcccdb499957dd1b02a5dcca941acf
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/make.sh b/make.sh
index fd96860b71..fd9780c237 100755
--- a/make.sh
+++ b/make.sh
@@ -333,6 +333,8 @@ select_chip_info()
 		RKCHIP=${RKCHIP##*_}
 		grep '^CONFIG_ROCKCHIP_RK3368=y' ${OUTDIR}/.config >/dev/null \
 			&& RKCHIP=RK3368H
+		grep '^CONFIG_ROCKCHIP_RV1108=y' ${OUTDIR}/.config >/dev/null \
+			&& RKCHIP=RV110X
 	elif [ $count -gt 1 ]; then
 		# Grep the RK CHIP variant
 		grep '^CONFIG_ROCKCHIP_PX3SE=y' ${OUTDIR}/.config > /dev/null \

commit 3ebdbc6a7caa052ce2b2959d9fc40f5116fa35c3
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Jan 29 17:20:00 2019 +0800

    rockchip: config: evb-rv1108: enable mmc and aosp image
    
    Change-Id: I464460f1386acfecadc7a116f11ef3b3bb66d3cb
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig
index 6a5c098770..4afae952d0 100644
--- a/configs/evb-rv1108_defconfig
+++ b/configs/evb-rv1108_defconfig
@@ -4,7 +4,6 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_ROCKCHIP_RV1108=y
 CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
-CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_RKIMG_BOOTLOADER=y
 # CONFIG_USING_KERNEL_DTB is not set
 CONFIG_SPL_SERIAL_SUPPORT=y
@@ -14,6 +13,7 @@ CONFIG_DEFAULT_DEVICE_TREE="rv1108-evb"
 CONFIG_DEBUG_UART=y
 # CONFIG_CONSOLE_MUX is not set
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y
 CONFIG_TPL_TINY_FRAMEWORK=y
 CONFIG_TPL_SERIAL_SUPPORT=y
@@ -23,7 +23,9 @@ CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=1
 # CONFIG_CMD_IMLS is not set
 CONFIG_RANDOM_UUID=y
+CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
@@ -40,6 +42,8 @@ CONFIG_SYSCON=y
 CONFIG_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
@@ -48,11 +52,9 @@ CONFIG_SPI_FLASH_MTD=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
-CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_PMIC=y
-CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_DM_REGULATOR_FIXED=y
@@ -85,8 +87,8 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Rockchip"
 CONFIG_G_DNL_VENDOR_NUM=0x2207
 CONFIG_G_DNL_PRODUCT_NUM=0x110a
-CONFIG_DISPLAY=y
 CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_SPL_TINY_MEMSET=y

commit 1feaf21adf802000e106199a46ead6fc104fc56b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Jan 29 17:19:19 2019 +0800

    rockchip: dts: rv1108: enable emmc
    
    Enable emmc node.
    
    Change-Id: I4ee5b078429e8e0686f301d03602e0875a613ee2
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rv1108-evb.dts b/arch/arm/dts/rv1108-evb.dts
index 75e4d4d607..d63e0cf1df 100644
--- a/arch/arm/dts/rv1108-evb.dts
+++ b/arch/arm/dts/rv1108-evb.dts
@@ -181,6 +181,17 @@
 	snps,reset-gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_LOW>;
 };
 
+&emmc {
+	u-boot,dm-pre-reloc;
+	bus-width = <8>;
+	cap-mmc-highspeed;
+	supports-emmc;
+	disable-wp;
+	non-removable;
+	num-slots = <1>;
+	status = "okay";
+};
+
 &mipi_dphy {
 	status = "okay";
 };

commit a059684b230de0815e3ccd6a419dda35c4a0106d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Feb 13 18:37:23 2019 +0800

    armv7: sleep.S: support other v7 cpu
    
    Change-Id: Ib1b1cb973054c9faa6a11da8fc1ad7f1d5aec214
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/cpu/armv7/sleep.S b/arch/arm/cpu/armv7/sleep.S
index 5c3d385396..1d57b1fb41 100644
--- a/arch/arm/cpu/armv7/sleep.S
+++ b/arch/arm/cpu/armv7/sleep.S
@@ -57,15 +57,16 @@ ENTRY(cpu_do_suspend)
 
 	read_midr r4
 	ubfx	r5, r4, #4, #12
+
 	ldr     r4, CORTEX_A7_PART_NUM
 	cmp	r5, r4
 	beq	a7_suspend
+
 	ldr     r4, CORTEX_A9_PART_NUM
 	cmp	r5, r4
 	beq	a9_suspend
 
-	/* cpu not supported */
-	b	.
+	b	other_suspend
 
 	/* A9 needs PCR/DIAG */
 a9_suspend:
@@ -78,6 +79,7 @@ a7_suspend:
 	read_tpidruro r5
 	stmia	r0!, {r4 - r5}
 
+other_suspend:
 	read_dacr  r4
 	read_ttbr0 r5
 	read_ttbr1 r6
@@ -122,10 +124,24 @@ ENDPROC(cpu_resume)
 ENTRY(cpu_do_resume)
 	read_midr r4
 	ubfx	r5, r4, #4, #12
+
+	ldr	r4, CORTEX_A9_PART_NUM
+	cmp	r5, r4
+	beq	a9_resume
+
 	ldr     r4, CORTEX_A7_PART_NUM
 	cmp	r5, r4
 	beq	a7_resume
 
+	/* v7 resume */
+	mov	ip, #0
+	/* Invalidate icache to PoU */
+	write_iciallu
+	/* set reserved context */
+	write_contextidr ip
+	b	other_resume
+
+a9_resume:
 	/*
 	 * A9 needs PCR/DIAG
 	 */
@@ -146,6 +162,7 @@ a7_resume:
 	write_fcseidr r4
 	write_tpidruro r5
 
+other_resume:
 	ldmia	r0!, {r4 - r10}
 	/* Invalidate entire TLB */
 	write_tlbiall

commit abf4f551161df5ae2d6b87d75deeb1b3ed5cdd4e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Feb 13 18:36:39 2019 +0800

    armv7: sleep.S: rename _suspend_gd to __suspend_gd
    
    Change-Id: I97911822c5616dbcbb3b28a156a3759f3b6b2af3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/cpu/armv7/sleep.S b/arch/arm/cpu/armv7/sleep.S
index b3ea3c1b88..5c3d385396 100644
--- a/arch/arm/cpu/armv7/sleep.S
+++ b/arch/arm/cpu/armv7/sleep.S
@@ -30,8 +30,8 @@ ENTRY(cpu_suspend)
 	sub	sp, sp, #PM_CTX_SIZE
 	push	{r0, r1}
 
-	/* r9 is gd, save it to _suspend_gd !!! */
-	adr	r4, _suspend_gd
+	/* r9 is gd, save it to __suspend_gd !!! */
+	adr	r4, __suspend_gd
 	str	r9, [r4]
 
 	mov	r1, r5
@@ -102,7 +102,7 @@ ENTRY(cpu_resume)
 	cpsid	aif
 
 	/* Load gd !! */
-	adr r1, _suspend_gd
+	adr r1, __suspend_gd
 	ldr r2, [r1]
 
 	/* Get pm_ctx */
@@ -177,7 +177,7 @@ a7_resume:
 ENDPROC(cpu_do_resume)
 
 .align 4
-_suspend_gd:
+__suspend_gd:
 	.word	0x0
 CORTEX_A7_PART_NUM:
 	.word	0xC07

commit 50ad91b70cecd814c460428de42cd9930fac27e9
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Feb 1 17:00:56 2019 +0800

    configs: evb-px30: remove clock-names
    
    Since the clock-names will be used by mmc module, so remove it from
    CONFIG_OF_SPL_REMOVE_PROPS.
    
    Change-Id: Ie42897b6b9eadfea86724ea1e25a6d47b57113af
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index d85444a6cd..81f1884d78 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -55,7 +55,7 @@ CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y

commit 438f1a786fe2bfe08843324385c54f73bb696be5
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Mon Jan 7 14:17:18 2019 +0800

    configs: rk322x_defconfig: enable CONFIG_RKNAND
    
    Change-Id: Ifbb79f72cf04dfe601cd03fa3c06b5042dbd2ac3
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/configs/rk322x_defconfig b/configs/rk322x_defconfig
index ecf9243c17..cc18398c46 100644
--- a/configs/rk322x_defconfig
+++ b/configs/rk322x_defconfig
@@ -95,6 +95,7 @@ CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
 CONFIG_DM_RESET=y
+CONFIG_RKNAND=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0x11030000
 CONFIG_DEBUG_UART_CLOCK=24000000

commit d95f6a1c40fe0f7fc45d51fa6aee899c7af2f565
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Mon Jan 7 14:35:08 2019 +0800

    configs: rk3128x_defconfig: enable CONFIG_RKNAND
    
    Change-Id: If64e5cf2dccd2fe7c9621e4ff456c49de484d399
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/configs/rk3128x_defconfig b/configs/rk3128x_defconfig
index 449db10e89..46c4f5da7b 100644
--- a/configs/rk3128x_defconfig
+++ b/configs/rk3128x_defconfig
@@ -98,6 +98,7 @@ CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
 CONFIG_DM_RESET=y
+CONFIG_RKNAND=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0x11030000
 CONFIG_DEBUG_UART_CLOCK=24000000

commit 0a5f26cb4beb9491fb0fe861f0185118c5445555
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Mon Jan 7 14:32:56 2019 +0800

    rockchip: dts: rk322x: enable nandc
    
    Change-Id: I495bc11aa8db9f6a916aaad3c5dad40f4c07b8e2
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/arch/arm/dts/rk3229-evb.dts b/arch/arm/dts/rk3229-evb.dts
index d137064283..376d1e7d22 100644
--- a/arch/arm/dts/rk3229-evb.dts
+++ b/arch/arm/dts/rk3229-evb.dts
@@ -67,6 +67,10 @@
 	status = "okay";
 };
 
+&nandc {
+	status = "okay";
+};
+
 &sdmmc {
 	status = "okay";
 	bus-width = <4>;
diff --git a/arch/arm/dts/rk322x-u-boot.dtsi b/arch/arm/dts/rk322x-u-boot.dtsi
index 608eec99a2..432af90b7c 100644
--- a/arch/arm/dts/rk322x-u-boot.dtsi
+++ b/arch/arm/dts/rk322x-u-boot.dtsi
@@ -35,6 +35,10 @@
 	u-boot,dm-pre-reloc;
 };
 
+&nandc {
+	u-boot,dm-pre-reloc;
+};
+
 &sdmmc {
 	u-boot,dm-pre-reloc;
 };
diff --git a/arch/arm/dts/rk322x.dtsi b/arch/arm/dts/rk322x.dtsi
index f5fb16b6e1..d022b025f3 100644
--- a/arch/arm/dts/rk322x.dtsi
+++ b/arch/arm/dts/rk322x.dtsi
@@ -851,4 +851,14 @@
 		compatible = "rockchip,rk3228-msch", "syscon";
 		reg = <0x31090000 0x2000>;
 	};
+
+	nandc: nandc@30030000 {
+		compatible = "rockchip,rk-nandc";
+		reg = <0x30030000 0x4000>;
+		interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+		nandc_id = <0>;
+		clocks = <&cru SCLK_NANDC>, <&cru HCLK_NANDC>;
+		clock-names = "clk_nandc", "hclk_nandc";
+		status = "disabled";
+	};
 };

commit 8b09909151c221a33a281c9b37df6d127914fcd6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Feb 12 11:30:37 2019 +0800

    pack_resource.sh: move to ./scripts/ folder
    
    Adding copyright and license
    
    Change-Id: Ia3e83797fa968e1cb8916f26ecae3c6f50835a49
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/pack_resource.sh b/scripts/pack_resource.sh
similarity index 93%
rename from pack_resource.sh
rename to scripts/pack_resource.sh
index 03b8d30f7d..ba8adca665 100755
--- a/pack_resource.sh
+++ b/scripts/pack_resource.sh
@@ -1,4 +1,10 @@
 #!/bin/sh
+#
+# Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier: GPL-2.0
+#
+
 OLD_IMAGE=$1
 IMAGE=resource.img
 TOOL=../rkbin/tools/resource_tool

commit 2ba1365e25e8b8d95de5b7c70bde9830b66585eb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 31 18:08:42 2019 +0800

    make.sh: support "--ignore-bl32" for trust_merger
    
    Change-Id: I8428787c7218b3dd546283f6b5888d09a35623e7
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 454b380957..fd96860b71 100755
--- a/make.sh
+++ b/make.sh
@@ -67,6 +67,9 @@ PLATFORM_SHA=
 PLATFORM_UBOOT_IMG_SIZE=
 PLATFORM_TRUST_IMG_SIZE=
 PLATFORM_AARCH32=
+
+# Out env param
+PACK_IGNORE_BL32=$TRUST_PACK_IGNORE_BL32	# Value only: "--ignore-bl32"
 #########################################################################################################
 help()
 {
@@ -554,7 +557,8 @@ pack_trust_image()
 		fi
 
 		cd ${RKBIN}
-		${RKTOOLS}/trust_merger ${PLATFORM_SHA} ${PLATFORM_RSA} ${PLATFORM_TRUST_IMG_SIZE} ${BIN_PATH_FIXUP} ${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST.ini
+		${RKTOOLS}/trust_merger ${PLATFORM_SHA} ${PLATFORM_RSA} ${PLATFORM_TRUST_IMG_SIZE} ${BIN_PATH_FIXUP} \
+					${PACK_IGNORE_BL32} ${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST.ini
 
 		cd - && mv ${RKBIN}/trust.img ./trust.img
 		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST.ini"

commit 7582895812818840ac90b8471a90c21f97813e22
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 31 17:48:29 2019 +0800

    tools: rockchip: trust_merger: support "--ignore-bl32"
    
    Change-Id: Ia8385dc1b41893d475b4f14c222dca98c9d52aba
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/tools/rockchip/trust_merger.c b/tools/rockchip/trust_merger.c
index a73ea81f96..b481321973 100644
--- a/tools/rockchip/trust_merger.c
+++ b/tools/rockchip/trust_merger.c
@@ -53,6 +53,7 @@ static char *gLegacyPath;
 static char *gNewPath;
 static uint8_t gRSAmode = RSA_SEL_2048;
 static uint8_t gSHAmode = SHA_SEL_256;
+static bool gIgnoreBL32;
 
 const uint8_t gBl3xID[BL_MAX_SEC][4] = { { 'B', 'L', '3', '0' },
 	{ 'B', 'L', '3', '1' },
@@ -151,6 +152,11 @@ static bool parseBL3x(FILE *file, int bl3x_id)
 			sec = 1;
 			printf("BL3%d adjust sec from 0 to 1\n", bl3x_id);
 		}
+	} else if (gIgnoreBL32 && (bl3x_id == BL32_SEC)) {
+		if (sec == 1) {
+			sec = 0;
+			printf("BL3%d adjust sec from 1 to 0\n", bl3x_id);
+		}
 	}
 	pbl3x->sec = sec;
 	LOGD("bl3%d sec: %d\n", bl3x_id, pbl3x->sec);
@@ -893,6 +899,8 @@ int main(int argc, char **argv)
 
 			/* Total backup numbers */
 			g_trust_max_num = strtoul(argv[++i], NULL, 10);
+		} else if (!strcmp(OPT_IGNORE_BL32, argv[i])) {
+			gIgnoreBL32 = true;
 		} else {
 			if (optPath) {
 				fprintf(stderr, "only need one path arg, but we have:\n%s\n%s.\n",
diff --git a/tools/rockchip/trust_merger.h b/tools/rockchip/trust_merger.h
index 42628fe09f..2a46e60dfc 100644
--- a/tools/rockchip/trust_merger.h
+++ b/tools/rockchip/trust_merger.h
@@ -47,6 +47,7 @@
 #define OPT_RSA		    "--rsa"
 #define OPT_SHA		    "--sha"
 #define OPT_SIZE	    "--size"
+#define OPT_IGNORE_BL32     "--ignore-bl32"
 
 #define DEF_MAJOR           0
 #define DEF_MINOR           0

commit 4a673710d2c7066171db8b070708924bab33a627
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Jan 30 15:45:57 2019 +0800

    rockchip: evb-rk3288: disable SPL_BACKTO_BROM
    
    We get TPL and no need back to bootrom in SPL.
    
    Change-Id: I27b9793acc1a8d311dc9b518e73150c3af711808
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig
index ab15591951..c45348aea1 100644
--- a/configs/evb-rk3288_defconfig
+++ b/configs/evb-rk3288_defconfig
@@ -2,7 +2,6 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3288=y
-CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_TARGET_EVB_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000

commit 620cb656015341bc2fdab5b7217890014051f242
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Jan 29 20:29:02 2019 +0800

    cmd: rbrom: fix to fit the MACRO SCOPE
    
    Both cmd and its implement shoud be in the same MACRO.
    
    Change-Id: I93587c425f999d9701d88b1d278fcc2a70d64133
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/cmd/boot.c b/cmd/boot.c
index 28070d6b47..5790255a3a 100644
--- a/cmd/boot.c
+++ b/cmd/boot.c
@@ -64,14 +64,14 @@ U_BOOT_CMD(
 	"      passing 'arg' as arguments"
 );
 
-#endif
-
 U_BOOT_CMD(
 	rbrom, 1, 0,	do_reboot_brom,
 	"Perform RESET of the CPU",
 	""
 );
 
+#endif
+
 U_BOOT_CMD(
         reset, 1, 0,    do_reset,
         "Perform RESET of the CPU",

commit f7bec22852fa3b6a7397108afc1a31b030acd0d3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Feb 12 11:22:30 2019 +0800

    make.sh: add copyright and license
    
    Change-Id: I9f5fcfe33134e901a77899f70a103d1a3fda26cd
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index f2a1293a98..454b380957 100755
--- a/make.sh
+++ b/make.sh
@@ -1,4 +1,10 @@
 #!/bin/bash
+#
+# Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier: GPL-2.0
+#
+
 set -e
 BOARD=$1
 SUBCMD=$1

commit d554a7b28ef6e524d1edf0db3236b5ae0d6a0d48
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Feb 1 15:17:02 2019 +0800

    arm: interrupt: add stacktrace dump for all exceptions routine
    
    show_regs() is called by all exceptions.
    
    Change-Id: Iac271d8d7b5d42ed9cf3d8a860a17f8080acf3bc
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/lib/interrupts.c b/arch/arm/lib/interrupts.c
index dcc7f5d17b..b178554fc5 100644
--- a/arch/arm/lib/interrupts.c
+++ b/arch/arm/lib/interrupts.c
@@ -24,6 +24,7 @@
 #include <asm/u-boot-arm.h>
 #include <efi_loader.h>
 #include <iomem.h>
+#include <stacktrace.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -99,6 +100,7 @@ void show_regs (struct pt_regs *regs)
 		thumb_mode (regs) ? " (T)" : "");
 
 	iomem_show("sp", regs->ARM_sp, 0x00, 0xfc);
+	dump_core_stack(regs);
 }
 
 /* fixup PC to point to the instruction leading to the exception */
diff --git a/arch/arm/lib/interrupts_64.c b/arch/arm/lib/interrupts_64.c
index d88a62232f..cb36d0364b 100644
--- a/arch/arm/lib/interrupts_64.c
+++ b/arch/arm/lib/interrupts_64.c
@@ -9,6 +9,7 @@
 #include <linux/compiler.h>
 #include <efi_loader.h>
 #include <iomem.h>
+#include <stacktrace.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 #if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_IRQ)
@@ -219,6 +220,7 @@ void show_regs(struct pt_regs *regs)
 	iomem_show_by_compatible("-pmugrf", 0, 0x400);
 	/* tobe add here ... */
 #endif
+	dump_core_stack(regs);
 }
 
 #else
@@ -237,6 +239,8 @@ void show_regs(struct pt_regs *regs)
 		printf("x%-2d: %016lx x%-2d: %016lx\n",
 		       i, regs->regs[i], i+1, regs->regs[i+1]);
 	printf("\n");
+
+	dump_core_stack(regs);
 }
 #endif
 

commit 6aa65bb1ee0951865e27da81dde1de76c6d4687e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Feb 1 15:15:30 2019 +0800

    armv7: add -funwind-tables compile option to support stacktrace
    
    Change-Id: Icfa223397e05dcd42ea3c12275385104bf275213
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/config.mk b/arch/arm/config.mk
index 1a77779db4..42a1d9c490 100644
--- a/arch/arm/config.mk
+++ b/arch/arm/config.mk
@@ -139,7 +139,8 @@ OBJCOPYFLAGS += -j .text -j .secure_text -j .secure_data -j .rodata -j .data \
 		-j .u_boot_list -j .rela.dyn -j .got -j .got.plt
 else
 OBJCOPYFLAGS += -j .text -j .secure_text -j .secure_data -j .rodata -j .hash \
-		-j .data -j .got -j .got.plt -j .u_boot_list -j .rel.dyn
+		-j .data -j .got -j .got.plt -j .u_boot_list -j .rel.dyn \
+		-j .ARM.exidx -j .ARM.extab
 endif
 
 # if a dtb section exists we always have to include it
diff --git a/arch/arm/cpu/armv7/config.mk b/arch/arm/cpu/armv7/config.mk
index 63591d4a29..63ae71cd4c 100644
--- a/arch/arm/cpu/armv7/config.mk
+++ b/arch/arm/cpu/armv7/config.mk
@@ -11,3 +11,7 @@
 # of our decision.
 PF_NO_UNALIGNED := $(call cc-option, -mno-unaligned-access,)
 PLATFORM_CPPFLAGS += $(PF_NO_UNALIGNED)
+
+ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
+PLATFORM_CPPFLAGS += -mabi=aapcs-linux -funwind-tables
+endif
diff --git a/examples/Makefile b/examples/Makefile
index 8e329d7cd5..3b75f41fb9 100644
--- a/examples/Makefile
+++ b/examples/Makefile
@@ -8,6 +8,10 @@ ifdef FTRACE
 subdir-ccflags-y += -finstrument-functions -DFTRACE
 endif
 
+# Here is an compile issue: "undefined reference to `__aeabi_unwind_cpp_pr0'..."
+# when -funwind-tables is enabled, so make it compile depends on -funwind-tables.
+ifeq (,$(findstring -funwind-tables,$(PLATFORM_CPPFLAGS)))
 subdir-y += standalone
 subdir-$(CONFIG_API) += api
 endif
+endif

commit d0df954bf3d4978ee3feb94b80ec863063c704cc
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Feb 1 15:09:20 2019 +0800

    arm: lib: add arm32/64 stacktrace support
    
    This patch supports dump arm32/64 stacktrace as the format of raw
    address info. The U-Boot symbol table is not available now, please
    use ./scripts/stacktrace.sh script to parse stacktrace info with command:
    
        ./scripts/stacktrace.sh <file>       // stacktrace info file
    
    Example on RK3399:
        Call trace:
         PC:   [< 00258a7c >]  dwc3_gadget_uboot_handle_interrupt+0xa0/0x5bc
         LR:   [< 002052f8 >]  usb_gadget_handle_interrupts+0x10/0x1c
    
        Stack:
               [< 00258a7c >]  dwc3_gadget_uboot_handle_interrupt+0xa0/0x5bc
               [< 0025bd6c >]  sleep_thread.isra.20+0xb0/0x114
               [< 0025cf58 >]  fsg_main_thread+0x2c8/0x1814
               [< 0020db58 >]  do_rkusb+0x250/0x338
               [< 00226a00 >]  cmd_process+0xac/0xe0
               [< 00212df4 >]  run_list_real+0x6fc/0x72c
               [< 00212f94 >]  parse_stream_outer+0x170/0x67c
               [< 002126e0 >]  parse_string_outer+0xdc/0xf4
               [< 00212bb0 >]  run_list_real+0x4b8/0x72c
               [< 00212f94 >]  parse_stream_outer+0x170/0x67c
               [< 00212698 >]  parse_string_outer+0x94/0xf4
               [< 00225f30 >]  run_command_list+0x38/0x90
               [< 00202d08 >]  rockchip_dnl_mode_check+0x4c/0xd4
               [< 00202db0 >]  setup_boot_mode+0x20/0xf0
               [< 00203010 >]  board_late_init+0x10/0x40
               [< 0027071c >]  initcall_run_list+0x44/0x80
               [< 00213d68 >]  board_init_r+0x20/0x24
    
    The "dump_stack()" is available to trigger stacktrace.
    
    Change-Id: Ib1423269dd255fa4a34231489cd3b7e6ddd22540
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds
index 37d4c605ac..515e0fea6f 100644
--- a/arch/arm/cpu/u-boot.lds
+++ b/arch/arm/cpu/u-boot.lds
@@ -135,6 +135,23 @@ SECTIONS
 		KEEP(*(SORT(.u_boot_list*)));
 	}
 
+	/*
+	 * Stack unwinding tables
+	 */
+	. = ALIGN(8);
+	/* .ARM.exidx is sorted, so has to go in its own output section. */
+	.ARM.exidx : {
+		__exidx_start = .;
+		*(.ARM.exidx*)
+		__exidx_end = .;
+	}
+
+	.ARM.extab : {
+		__extab_start = .;
+		*(.ARM.extab*)
+		__extab_end = .;
+	}
+
 	. = ALIGN(4);
 
 	.__efi_runtime_start : {
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index abffa10c85..d4b5f29eb1 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -55,8 +55,10 @@ ifneq ($(CONFIG_GICV2)$(CONFIG_GICV3),)
 obj-y	+= gic_64.o
 endif
 obj-y	+= interrupts_64.o
+obj-y	+= stacktrace_64.o
 else
 obj-y	+= interrupts.o
+obj-y	+= stacktrace.o
 endif
 ifndef CONFIG_SYSRESET
 obj-y	+= reset.o
diff --git a/arch/arm/lib/stacktrace.c b/arch/arm/lib/stacktrace.c
new file mode 100644
index 0000000000..266aeb2265
--- /dev/null
+++ b/arch/arm/lib/stacktrace.c
@@ -0,0 +1,550 @@
+// SPDX-License-Identifier: BSD-2-Clause
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * This file is taken and modified from the OP-TEE project.
+ */
+
+#include <common.h>
+#include <stacktrace.h>
+#include <asm/sections.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* The register names */
+#define	FP	11
+#define	SP	13
+#define	LR	14
+#define	PC	15
+
+/*
+ * Definitions for the instruction interpreter.
+ *
+ * The ARM EABI specifies how to perform the frame unwinding in the
+ * Exception Handling ABI for the ARM Architecture document. To perform
+ * the unwind we need to know the initial frame pointer, stack pointer,
+ * link register and program counter. We then find the entry within the
+ * index table that points to the function the program counter is within.
+ * This gives us either a list of three instructions to process, a 31-bit
+ * relative offset to a table of instructions, or a value telling us
+ * we can't unwind any further.
+ *
+ * When we have the instructions to process we need to decode them
+ * following table 4 in section 9.3. This describes a collection of bit
+ * patterns to encode that steps to take to update the stack pointer and
+ * link register to the correct values at the start of the function.
+ */
+
+/* A special case when we are unable to unwind past this function */
+#define	EXIDX_CANTUNWIND	1
+
+/*
+ * Entry types.
+ * These are the only entry types that have been seen in the kernel.
+ */
+#define	ENTRY_MASK		0xff000000
+#define	ENTRY_ARM_SU16		0x80000000
+#define	ENTRY_ARM_LU16		0x81000000
+
+/* Instruction masks. */
+#define	INSN_VSP_MASK		0xc0
+#define	INSN_VSP_SIZE_MASK	0x3f
+#define	INSN_STD_MASK		0xf0
+#define	INSN_STD_DATA_MASK	0x0f
+#define	INSN_POP_TYPE_MASK	0x08
+#define	INSN_POP_COUNT_MASK	0x07
+#define	INSN_VSP_LARGE_INC_MASK	0xff
+
+/* Instruction definitions */
+#define	INSN_VSP_INC		0x00
+#define	INSN_VSP_DEC		0x40
+#define	INSN_POP_MASKED		0x80
+#define	INSN_VSP_REG		0x90
+#define	INSN_POP_COUNT		0xa0
+#define	INSN_FINISH		0xb0
+#define	INSN_POP_REGS		0xb1
+#define	INSN_VSP_LARGE_INC	0xb2
+
+#define SHIFT_U32(v, shift)	((uint32_t)(v) << (shift))
+
+/* The state of the unwind process (32-bit mode) */
+struct unwind_state_arm32 {
+	uint32_t registers[16];
+	uint32_t start_pc;
+	ulong insn;
+	unsigned int entries;
+	unsigned int byte;
+	uint16_t update_mask;
+};
+
+/* An item in the exception index table */
+struct unwind_idx {
+	uint32_t offset;
+	uint32_t insn;
+};
+
+static __always_inline uint32_t read_pc(void)
+{
+	uint32_t val;
+
+	asm volatile ("adr %0, ." : "=r" (val));
+	return val;
+}
+
+static __always_inline uint32_t read_sp(void)
+{
+	uint32_t val;
+
+	asm volatile ("mov %0, sp" : "=r" (val));
+	return val;
+}
+
+static __always_inline uint32_t read_lr(void)
+{
+	uint32_t val;
+
+	asm volatile ("mov %0, lr" : "=r" (val));
+	return val;
+}
+
+static __always_inline uint32_t read_fp(void)
+{
+	uint32_t val;
+
+	asm volatile ("mov %0, fp" : "=r" (val));
+	return val;
+}
+
+static __always_inline uint32_t read_r7(void)
+{
+	uint32_t val;
+
+	asm volatile ("mov %0, r7" : "=r" (val));
+	return val;
+}
+
+static bool copy_in(void *dst, const void *src, size_t n, bool kernel_data)
+{
+	if (!kernel_data)
+		return false;
+
+	memcpy(dst, src, n);
+
+	return true;
+}
+
+/* Expand a 31-bit signed value to a 32-bit signed value */
+static int32_t expand_prel31(uint32_t prel31)
+{
+	return prel31 | SHIFT_U32(prel31 & BIT(30), 1);
+}
+
+/*
+ * Perform a binary search of the index table to find the function
+ * with the largest address that doesn't exceed addr.
+ */
+static struct unwind_idx *find_index(uint32_t addr, ulong exidx,
+				     size_t exidx_sz)
+{
+	ulong idx_start, idx_end;
+	unsigned int min, mid, max;
+	struct unwind_idx *start;
+	struct unwind_idx *item;
+	int32_t prel31_addr;
+	ulong func_addr;
+
+	start = (struct unwind_idx *)exidx;
+	idx_start = exidx;
+	idx_end = exidx + exidx_sz;
+
+	min = 0;
+	max = (idx_end - idx_start) / sizeof(struct unwind_idx);
+
+	while (min != max) {
+		mid = min + (max - min + 1) / 2;
+
+		item = &start[mid];
+
+		prel31_addr = expand_prel31(item->offset);
+		func_addr = (ulong)&item->offset + prel31_addr;
+
+		if (func_addr <= addr) {
+			min = mid;
+		} else {
+			max = mid - 1;
+		}
+	}
+
+	return &start[min];
+}
+
+/* Reads the next byte from the instruction list */
+static bool unwind_exec_read_byte(struct unwind_state_arm32 *state,
+				  uint32_t *ret_insn, bool kernel_stack)
+{
+	uint32_t insn;
+
+	if (!copy_in(&insn, (void *)state->insn, sizeof(insn), kernel_stack))
+		return false;
+
+	/* Read the unwind instruction */
+	*ret_insn = (insn >> (state->byte * 8)) & 0xff;
+
+	/* Update the location of the next instruction */
+	if (state->byte == 0) {
+		state->byte = 3;
+		state->insn += sizeof(uint32_t);
+		state->entries--;
+	} else {
+		state->byte--;
+	}
+
+	return true;
+}
+
+static bool pop_vsp(uint32_t *reg, ulong *vsp, bool kernel_stack,
+		    ulong stack, size_t stack_size)
+{
+	if (*vsp > gd->start_addr_sp ||
+	    *vsp < gd->start_addr_sp - CONFIG_SYS_STACK_SIZE)
+		return false;
+
+	if (!copy_in(reg, (void *)*vsp, sizeof(*reg), kernel_stack))
+		return false;
+
+	(*vsp) += sizeof(*reg);
+
+	return true;
+}
+
+/* Executes the next instruction on the list */
+static bool unwind_exec_insn(struct unwind_state_arm32 *state,
+			     bool kernel_stack, ulong stack,
+			     size_t stack_size)
+{
+	uint32_t insn;
+	ulong vsp = state->registers[SP];
+	int update_vsp = 0;
+
+	/* Read the next instruction */
+	if (!unwind_exec_read_byte(state, &insn, kernel_stack))
+		return false;
+
+	if ((insn & INSN_VSP_MASK) == INSN_VSP_INC) {
+		state->registers[SP] += ((insn & INSN_VSP_SIZE_MASK) << 2) + 4;
+
+	} else if ((insn & INSN_VSP_MASK) == INSN_VSP_DEC) {
+		state->registers[SP] -= ((insn & INSN_VSP_SIZE_MASK) << 2) + 4;
+
+	} else if ((insn & INSN_STD_MASK) == INSN_POP_MASKED) {
+		uint32_t mask;
+		unsigned int reg;
+
+		/* Load the mask */
+		if (!unwind_exec_read_byte(state, &mask, kernel_stack))
+			return false;
+		mask |= (insn & INSN_STD_DATA_MASK) << 8;
+
+		/* We have a refuse to unwind instruction */
+		if (mask == 0)
+			return false;
+
+		/* Update SP */
+		update_vsp = 1;
+
+		/* Load the registers */
+		for (reg = 4; mask && reg < 16; mask >>= 1, reg++) {
+			if (mask & 1) {
+				if (!pop_vsp(&state->registers[reg], &vsp,
+					     kernel_stack, stack, stack_size))
+					return false;
+				state->update_mask |= 1 << reg;
+
+				/* If we have updated SP kep its value */
+				if (reg == SP)
+					update_vsp = 0;
+			}
+		}
+
+	} else if ((insn & INSN_STD_MASK) == INSN_VSP_REG &&
+	    ((insn & INSN_STD_DATA_MASK) != 13) &&
+	    ((insn & INSN_STD_DATA_MASK) != 15)) {
+		/* sp = register */
+		state->registers[SP] =
+		    state->registers[insn & INSN_STD_DATA_MASK];
+
+	} else if ((insn & INSN_STD_MASK) == INSN_POP_COUNT) {
+		unsigned int count, reg;
+
+		/* Read how many registers to load */
+		count = insn & INSN_POP_COUNT_MASK;
+
+		/* Update sp */
+		update_vsp = 1;
+
+		/* Pop the registers */
+		for (reg = 4; reg <= 4 + count; reg++) {
+			if (!pop_vsp(&state->registers[reg], &vsp,
+				     kernel_stack, stack, stack_size))
+				return false;
+			state->update_mask |= 1 << reg;
+		}
+
+		/* Check if we are in the pop r14 version */
+		if ((insn & INSN_POP_TYPE_MASK) != 0) {
+			if (!pop_vsp(&state->registers[14], &vsp, kernel_stack,
+				     stack, stack_size))
+				return false;
+		}
+
+	} else if (insn == INSN_FINISH) {
+		/* Stop processing */
+		state->entries = 0;
+
+	} else if (insn == INSN_POP_REGS) {
+		uint32_t mask;
+		unsigned int reg;
+
+		if (!unwind_exec_read_byte(state, &mask, kernel_stack))
+			return false;
+		if (mask == 0 || (mask & 0xf0) != 0)
+			return false;
+
+		/* Update SP */
+		update_vsp = 1;
+
+		/* Load the registers */
+		for (reg = 0; mask && reg < 4; mask >>= 1, reg++) {
+			if (mask & 1) {
+				if (!pop_vsp(&state->registers[reg], &vsp,
+					     kernel_stack, stack, stack_size))
+					return false;
+				state->update_mask |= 1 << reg;
+			}
+		}
+
+	} else if ((insn & INSN_VSP_LARGE_INC_MASK) == INSN_VSP_LARGE_INC) {
+		uint32_t uleb128;
+
+		/* Read the increment value */
+		if (!unwind_exec_read_byte(state, &uleb128, kernel_stack))
+			return false;
+
+		state->registers[SP] += 0x204 + (uleb128 << 2);
+
+	} else {
+		/* We hit a new instruction that needs to be implemented */
+		printf("Unhandled instruction %.2x\n", insn);
+		return false;
+	}
+
+	if (update_vsp)
+		state->registers[SP] = vsp;
+
+	return true;
+}
+
+/* Performs the unwind of a function */
+static bool unwind_tab(struct unwind_state_arm32 *state, bool kernel_stack,
+		       ulong stack, size_t stack_size)
+{
+	uint32_t entry;
+	uint32_t insn;
+
+	/* Set PC to a known value */
+	state->registers[PC] = 0;
+
+	if (!copy_in(&insn, (void *)state->insn, sizeof(insn), kernel_stack)) {
+		printf("Bad insn addr %p", (void *)state->insn);
+		return true;
+	}
+
+	/* Read the personality */
+	entry = insn & ENTRY_MASK;
+
+	if (entry == ENTRY_ARM_SU16) {
+		state->byte = 2;
+		state->entries = 1;
+	} else if (entry == ENTRY_ARM_LU16) {
+		state->byte = 1;
+		state->entries = ((insn >> 16) & 0xFF) + 1;
+	} else {
+		printf("Unknown entry: %x\n", entry);
+		return true;
+	}
+
+	while (state->entries > 0) {
+		if (!unwind_exec_insn(state, kernel_stack, stack, stack_size))
+			return true;
+	}
+
+	/*
+	 * The program counter was not updated, load it from the link register.
+	 */
+	if (state->registers[PC] == 0) {
+		state->registers[PC] = state->registers[LR];
+
+		/*
+		 * If the program counter changed, flag it in the update mask.
+		 */
+		if (state->start_pc != state->registers[PC])
+			state->update_mask |= 1 << PC;
+
+		/* Check again */
+		if (state->registers[PC] == 0)
+			return true;
+	}
+
+	return false;
+}
+
+bool unwind_stack_arm32(struct unwind_state_arm32 *state, ulong exidx,
+			size_t exidx_sz, bool kernel_stack, ulong stack,
+			size_t stack_size)
+{
+	struct unwind_idx *index;
+	bool finished;
+
+	if (!exidx_sz)
+		return false;
+
+	/* Reset the mask of updated registers */
+	state->update_mask = 0;
+
+	/* The pc value is correct and will be overwritten, save it */
+	state->start_pc = state->registers[PC];
+
+	/* Find the item to run */
+	index = find_index(state->start_pc, exidx, exidx_sz);
+
+	finished = false;
+	if (index->insn != EXIDX_CANTUNWIND) {
+		if (index->insn & (1U << 31)) {
+			/* The data is within the instruction */
+			state->insn = (ulong)&index->insn;
+		} else {
+			/* A prel31 offset to the unwind table */
+			state->insn = (ulong)&index->insn +
+				      expand_prel31(index->insn);
+		}
+
+		/* Run the unwind function */
+		finished = unwind_tab(state, kernel_stack, stack, stack_size);
+	}
+
+	/* This is the top of the stack, finish */
+	if (index->insn == EXIDX_CANTUNWIND)
+		finished = true;
+
+	return !finished;
+}
+
+static uint32_t offset_prel31(uint32_t addr, int32_t offset)
+{
+	return (addr + offset) & 0x7FFFFFFFUL;
+}
+
+int relocate_exidx(void *exidx, size_t exidx_sz, int32_t offset)
+{
+	size_t num_items = exidx_sz / sizeof(struct unwind_idx);
+	struct unwind_idx *start = (struct unwind_idx *)exidx;
+	size_t n;
+
+	for (n = 0; n < num_items; n++) {
+		struct unwind_idx *item = &start[n];
+
+		if (item->offset & BIT(31))
+			return -EINVAL;
+
+		/* Offset to the start of the function has to be adjusted */
+		item->offset = offset_prel31(item->offset, offset);
+
+		if (item->insn == EXIDX_CANTUNWIND)
+			continue;
+		if (item->insn & BIT(31)) {
+			/* insn is a table entry itself */
+			continue;
+		}
+		/*
+		 * insn is an offset to an entry in .ARM.extab so it has to be
+		 * adjusted
+		 */
+		item->insn = offset_prel31(item->insn, offset);
+	}
+	return 0;
+}
+
+void print_stack_arm32(struct unwind_state_arm32 *state,
+		       ulong exidx, size_t exidx_sz, bool kernel_stack,
+		       ulong stack, size_t stack_size)
+{
+	ulong pc, lr;
+
+	if (gd->flags & GD_FLG_RELOC) {
+		pc = (ulong)state->registers[PC] - gd->reloc_off;
+		lr = (ulong)state->registers[LR] - gd->reloc_off;
+	} else {
+		pc = (ulong)state->registers[PC];
+		lr = (ulong)state->registers[LR];
+	}
+
+	printf("\nCall trace:\n");
+	printf("  PC:	[< %08lx >]\n", pc);
+	printf("  LR:	[< %08lx >]\n", lr);
+
+	printf("\nStack:\n");
+	do {
+		if (gd->flags & GD_FLG_RELOC)
+			pc = (ulong)state->registers[PC] - gd->reloc_off;
+		else
+			pc = (ulong)state->registers[PC];
+
+		printf("	[< %08lx >]\n", pc);
+	} while (unwind_stack_arm32(state, exidx, exidx_sz,
+				    kernel_stack, stack, stack_size));
+
+	printf("\nNOTE: Please use ./scripts/stacktrace.sh to parse trace info\n");
+}
+
+void dump_core_stack(struct pt_regs *regs)
+{
+	struct unwind_state_arm32 state;
+	ulong exidx = (ulong)__exidx_start;
+	size_t exidx_sz = (ulong)__exidx_end - (ulong)__exidx_start;
+	ulong stack = gd->start_addr_sp;
+	size_t stack_size = CONFIG_SYS_STACK_SIZE;
+	int i;
+
+	/* Don't use memset(), which updates LR ! */
+	for (i = 0; i < 16; i++)
+		state.registers[i] = 0;
+	state.update_mask = 0;
+	state.start_pc = 0;
+	state.entries = 0;
+	state.insn = 0;
+	state.byte = 0;
+
+	/* r7: Thumb-style frame pointer */
+	state.registers[7] = regs->ARM_r7;
+	/* r11: ARM-style frame pointer */
+	state.registers[FP] = regs->ARM_ip;
+	state.registers[SP] = regs->ARM_sp;
+	state.registers[LR] = regs->ARM_lr;
+	state.registers[PC] = regs->ARM_pc;
+
+	print_stack_arm32(&state, exidx, exidx_sz,
+			  true, stack, stack_size);
+}
+
+void dump_stack(void)
+{
+	struct pt_regs regs;
+
+	regs.ARM_r7 = read_r7();
+	regs.ARM_ip = read_fp();
+	regs.ARM_sp = read_sp();
+	regs.ARM_lr = read_lr();
+	regs.ARM_pc = (uint32_t)dump_stack;
+
+	dump_core_stack(&regs);
+}
diff --git a/arch/arm/lib/stacktrace_64.c b/arch/arm/lib/stacktrace_64.c
new file mode 100644
index 0000000000..2494684a84
--- /dev/null
+++ b/arch/arm/lib/stacktrace_64.c
@@ -0,0 +1,106 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <stacktrace.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct stackframe {
+	uint64_t fp;
+	uint64_t sp;
+	uint64_t pc;
+};
+
+static __always_inline uint64_t read_fp(void)
+{
+	uint64_t val;
+
+	asm volatile ("mov %0, x29" : "=r" (val));
+	return val;
+}
+
+static __always_inline uint64_t read_lr(void)
+{
+	uint64_t val;
+
+	asm volatile ("mov %0, x30" : "=r" (val));
+	return val;
+}
+
+static __always_inline uint64_t read_pc(void)
+{
+	uint64_t val;
+
+	asm volatile ("adr %0, ." : "=r" (val));
+	return val;
+}
+
+/* It's not allowed to access sp_el2 in EL2, so always return a valid sp */
+static __always_inline uint64_t read_sp(void)
+{
+	return gd->start_addr_sp - (CONFIG_SYS_STACK_SIZE / 2);
+}
+
+static bool walk_stackframe(struct stackframe *frame)
+{
+	ulong fp = frame->fp;
+
+	if (fp > gd->start_addr_sp ||
+	    fp < gd->start_addr_sp - CONFIG_SYS_STACK_SIZE)
+		return false;
+
+	frame->sp = fp + 0x10;
+	frame->fp = *(ulong *)(fp);
+	frame->pc = *(ulong *)(fp + 8);
+
+	return true;
+}
+
+void dump_core_stack(struct pt_regs *regs)
+{
+	struct stackframe frame;
+	ulong pc, lr;
+
+	frame.fp = regs->regs[29];
+	frame.sp = regs->sp;
+	frame.pc = regs->elr;
+
+	if (gd->flags & GD_FLG_RELOC) {
+		pc = (ulong)frame.pc - gd->reloc_off;
+		lr = (ulong)regs->regs[30] - gd->reloc_off;
+	} else {
+		pc = (ulong)frame.pc;
+		lr = (ulong)regs->regs[30];
+	}
+
+	printf("\nCall trace:\n");
+	printf("  PC:	[< %08lx >]\n", pc);
+	printf("  LR:	[< %08lx >]\n", lr);
+
+	printf("\nStack:\n");
+	do {
+		if (gd->flags & GD_FLG_RELOC)
+			pc = (ulong)frame.pc - gd->reloc_off;
+		else
+			pc = (ulong)frame.pc;
+
+		printf("	[< %08lx >]\n", pc);
+	} while (walk_stackframe(&frame));
+
+	printf("\nNOTE: Please use ./scripts/stacktrace.sh to parse trace info\n");
+}
+
+void dump_stack(void)
+{
+	struct pt_regs regs;
+
+	regs.regs[29] = read_fp();
+	regs.regs[30] = read_lr();
+	regs.sp = read_sp();
+	regs.elr = read_pc();
+
+	dump_core_stack(&regs);
+}
diff --git a/include/asm-generic/sections.h b/include/asm-generic/sections.h
index daf021b647..1d140ac110 100644
--- a/include/asm-generic/sections.h
+++ b/include/asm-generic/sections.h
@@ -28,6 +28,10 @@ extern char __efi_hello_world_end[];
 /* Start and end of .ctors section - used for constructor calls. */
 extern char __ctors_start[], __ctors_end[];
 
+/* .ARM.exidx is sorted, so has to go in its own output section. */
+extern char __exidx_start[], __exidx_end[];
+extern char __extab_start[], __extab_end[];
+
 /* function descriptor handling (if any).  Override
  * in asm/sections.h */
 #ifndef dereference_function_descriptor
diff --git a/include/linux/compat.h b/include/linux/compat.h
index 8711fe2b48..0de9ff0bd0 100644
--- a/include/linux/compat.h
+++ b/include/linux/compat.h
@@ -5,6 +5,7 @@
 #include <linux/types.h>
 #include <linux/err.h>
 #include <linux/kernel.h>
+#include <stacktrace.h>
 
 struct unused {};
 typedef struct unused unused_t;
@@ -194,8 +195,6 @@ typedef unsigned long blkcnt_t;
 #define wait_event_interruptible(...)	0
 #define wake_up_interruptible(...)	do { } while (0)
 #define print_hex_dump(...)		do { } while (0)
-#define dump_stack(...)			do { } while (0)
-
 #define task_pid_nr(x)			0
 #define set_freezable(...)		do { } while (0)
 #define try_to_freeze(...)		0
diff --git a/include/stacktrace.h b/include/stacktrace.h
new file mode 100644
index 0000000000..6ca8225298
--- /dev/null
+++ b/include/stacktrace.h
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _STACKTRACE_
+#define _STACKTRACE_
+
+#include <common.h>
+
+/* User should never call it */
+void dump_core_stack(struct pt_regs *regs);
+
+/* User API */
+void dump_stack(void);
+
+#endif

commit b97fba2cf2716521c8ba93aba769e218a367de21
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Feb 1 15:19:25 2019 +0800

    scripts: add stacktrace.sh to parse stacktrace info
    
    Usage:
            ./scripts/stacktrace.sh <file>
    
            @<file>: stacktrace info file
    
    Change-Id: I1a7b4798d9826d87ce03186958c51b30784d03e1
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/scripts/stacktrace.sh b/scripts/stacktrace.sh
new file mode 100755
index 0000000000..cb0383254d
--- /dev/null
+++ b/scripts/stacktrace.sh
@@ -0,0 +1,80 @@
+#!/bin/bash
+#
+# Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier: GPL-2.0
+#
+
+set -e
+ARGS_N=$#
+INPUT_FILE=$1
+SYMBOL_FILE=`find -name u-boot.sym`
+
+echo
+if [ $ARGS_N -eq 0 ]; then
+	echo "Usage: "
+	echo "	./scripts/stacktrace.sh <file>  // u-boot stacktrace info file"
+	exit 1
+elif [ ! -f $INPUT_FILE ]; then
+	echo "Can't find input file: $INPUT_FILE"
+	exit 1
+elif [ "$SYMBOL_FILE" = '' ] || [ ! -f $SYMBOL_FILE ]; then
+	echo "Can't find symbol file: u-boot.sym"
+	exit 1
+fi
+
+# Parse PC and LR
+echo "Call trace:"
+sed -n "/:   \[</p" $INPUT_FILE | while read line
+do
+	echo -n " ${line}  "
+
+	frame_pc_str=`echo $line | awk '{ print "0x"$3 }'`
+	frame_pc_dec=`echo $line | awk '{ print strtonum("0x"$3); }'`
+	frame_pc_hex=`echo "obase=16;${frame_pc_dec}"|bc |tr '[A-Z]' '[a-z]'`
+
+	f_pc_dec=`cat u-boot.sym | sort | awk '/\.text/ { if (strtonum("0x"$1) > '$frame_pc_str') { print fpc; exit; } fpc=strtonum("0x"$1); }'`
+	f_pc_hex=`echo "obase=16;${f_pc_dec}"|bc |tr '[A-Z]' '[a-z]'`
+	f_offset_dec=$((frame_pc_dec-f_pc_dec))
+	f_offset_hex=`echo "obase=16;${f_offset_dec}"|bc |tr '[A-Z]' '[a-z]'`
+
+	cat u-boot.sym | sort |
+	awk -v foffset=$f_offset_hex '/\.text/ {
+		if (strtonum("0x"$1) > '$frame_pc_str') {
+			printf("%s+0x%s/0x%x\n", fname, foffset, fsize);
+			exit
+		}
+		fname=$NF;
+		fsize=strtonum("0x"$5);
+		fpc=strtonum("0x"$1);
+	}'
+done
+echo
+
+# Parse stack
+echo "Stack:"
+sed -n "/        \[</p" $INPUT_FILE | while read line
+do
+	echo -n "       ${line}  "
+
+	frame_pc_str=`echo $line | awk '{ print "0x"$2 }'`
+	frame_pc_dec=`echo $line | awk '{ print strtonum("0x"$2); }'`
+	frame_pc_hex=`echo "obase=16;${frame_pc_dec}"|bc |tr '[A-Z]' '[a-z]'`
+
+	f_pc_dec=`cat u-boot.sym | sort | awk '/\.text/ { if (strtonum("0x"$1) > '$frame_pc_str') { print fpc; exit; } fpc=strtonum("0x"$1); }'`
+	f_pc_hex=`echo "obase=16;${f_pc_dec}"|bc |tr '[A-Z]' '[a-z]'`
+	f_offset_dec=$((frame_pc_dec-f_pc_dec))
+	f_offset_hex=`echo "obase=16;${f_offset_dec}"|bc |tr '[A-Z]' '[a-z]'`
+
+	cat u-boot.sym | sort |
+	awk -v foffset=$f_offset_hex '/\.text/ {
+		if (strtonum("0x"$1) > '$frame_pc_str') {
+			printf("%s+0x%s/0x%x\n", fname, foffset, fsize);
+			exit
+		}
+		fname=$NF;
+		fsize=strtonum("0x"$5);
+		fpc=strtonum("0x"$1);
+	}'
+done
+echo

commit 7f28cbb61ee8de46a34ac30e2ef249f9e095026a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jan 25 19:48:42 2019 +0800

    lib: Kconfig: add CONFIG_SYS_STACK_SIZE
    
    Change-Id: I37cb4ffea5ef6aa2475a3ca7a87f58f23fcff76a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/lib/Kconfig b/lib/Kconfig
index 12b597d104..ec9212de0b 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -35,6 +35,12 @@ config SYS_HZ
 	  get_timer() must operate in milliseconds and this option must be
 	  set to 1000.
 
+config SYS_STACK_SIZE
+	hex
+	default 0x20000
+	help
+	 The system stack size.
+
 config USE_TINY_PRINTF
 	bool "Enable tiny printf() version"
 	help

commit 5315192f6084894aa039cd451a48ef83f127d84b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Feb 12 17:35:32 2019 +0800

    rockchip: resource: add resource hdr magic validation
    
    It fixes the dead loop issue of "bootrkp" command:
            ......
            =Booting Rockchip format image=
            boot: invalid image tag(0x0)
            boot_rockchip_image ramdisk part boot read error
            bad resource image magic:
            DTB: rk-kernel.dtb
            invalid entry tag
            invalid entry tag
            invalid entry tag
            invalid entry tag
            ......
    
    Change-Id: Ia15f315eee94dce06800139ff547ebeee3847cae
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 27be5249a5..20d3c61c36 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -177,6 +177,9 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 #endif
 
 	if (hdr) {
+		if (resource_image_check_header(hdr))
+			return -EEXIST;
+
 		content = (void *)((char *)hdr
 				   + (hdr->c_offset) * RK_BLK_SIZE);
 		for (e_num = 0; e_num < hdr->e_nums; e_num++) {

commit 5561190119af2afc614623105648ea752a441418
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Jan 24 11:11:19 2019 +0800

    clk: rockchip: rk3288: add clk_set_default
    
    support aclk_vio\hclk_vio clk setting.
    
    Change-Id: Ie826c770670598161f22208f504d8762b8597811
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3288.h b/arch/arm/include/asm/arch-rockchip/cru_rk3288.h
index 87dce2eddf..4ebf05d082 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3288.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3288.h
@@ -25,6 +25,8 @@
 #define PERI_HCLK_HZ	148500000
 #define PERI_PCLK_HZ	74250000
 
+#define HCLK_VIO_HZ	100000000
+
 /* Private data for the clock driver - used by rockchip_get_cru() */
 struct rk3288_clk_priv {
 	struct rk3288_grf *grf;
@@ -155,6 +157,12 @@ enum {
 	DCLK_VOP0_SELECT_NPLL	= 2,
 };
 
+/* CRU_CLKSEL28_CON */
+enum {
+	HCLK_VIO_DIV_SHIFT	= 8,
+	HCLK_VIO_DIV_MASK	= 0x1f << HCLK_VIO_DIV_SHIFT,
+};
+
 /* CRU_CLKSEL29_CON */
 enum {
 	DCLK_VOP1_DIV_SHIFT	= 8,
@@ -168,17 +176,17 @@ enum {
 
 /* CRU_CLKSEL31_CON */
 enum {
-	ACLK_VOP_SELECT_CPLL	= 0,
-	ACLK_VOP_SELECT_GPLL	= 1,
-	ACLK_VOP_SELECT_USB480	= 2,
-	ACLK_VOP1_PLL_SHIFT	= 14,
-	ACLK_VOP1_PLL_MASK	= 3 << ACLK_VOP1_PLL_SHIFT,
-	ACLK_VOP1_DIV_SHIFT	= 8,
-	ACLK_VOP1_DIV_MASK	= 0x1f << ACLK_VOP1_DIV_SHIFT,
-	ACLK_VOP0_PLL_SHIFT	= 6,
-	ACLK_VOP0_PLL_MASK	= 3 << ACLK_VOP0_PLL_SHIFT,
-	ACLK_VOP0_DIV_SHIFT	= 0,
-	ACLK_VOP0_DIV_MASK	= 0x1f << ACLK_VOP0_DIV_SHIFT,
+	ACLK_VIO_SELECT_CPLL	= 0,
+	ACLK_VIO_SELECT_GPLL	= 1,
+	ACLK_VIO_SELECT_USB480	= 2,
+	ACLK_VIO1_PLL_SHIFT	= 14,
+	ACLK_VIO1_PLL_MASK	= 3 << ACLK_VIO1_PLL_SHIFT,
+	ACLK_VIO1_DIV_SHIFT	= 8,
+	ACLK_VIO1_DIV_MASK	= 0x1f << ACLK_VIO1_DIV_SHIFT,
+	ACLK_VIO0_PLL_SHIFT	= 6,
+	ACLK_VIO0_PLL_MASK	= 3 << ACLK_VIO0_PLL_SHIFT,
+	ACLK_VIO0_DIV_SHIFT	= 0,
+	ACLK_VIO0_DIV_MASK	= 0x1f << ACLK_VIO0_DIV_SHIFT,
 };
 
 /* CRU_CLKSEL37_CON */
diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index 73667de9cd..f7536bac18 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -406,7 +406,7 @@ static int rockchip_vop_set_clk(struct rk3288_cru *cru, struct rk3288_grf *grf,
 	struct pll_div cpll_config = {0};
 	u32 lcdc_div, parent;
 	int ret;
-	unsigned int gpll_rate, npll_rate, cpll_rate;
+	unsigned int gpll_rate, npll_rate;
 
 	gpll_rate = rkclk_pll_get_rate(cru, CLK_GENERAL);
 	npll_rate = rkclk_pll_get_rate(cru, CLK_NEW);
@@ -488,21 +488,24 @@ static int rockchip_vop_set_clk(struct rk3288_cru *cru, struct rk3288_grf *grf,
 			     ((lcdc_div - 1) << DCLK_VOP1_DIV_SHIFT) |
 			     (parent << DCLK_VOP1_PLL_SHIFT));
 		break;
-	case ACLK_VOP0:
-		cpll_rate = rkclk_pll_get_rate(cru, CLK_CODEC);
-		lcdc_div = DIV_ROUND_UP(cpll_rate, rate_hz);
+	case ACLK_VIO0:
+		lcdc_div = DIV_ROUND_UP(gpll_rate, rate_hz);
 		rk_clrsetreg(&cru->cru_clksel_con[31],
-			     ACLK_VOP0_PLL_MASK | ACLK_VOP0_DIV_MASK,
-			     ACLK_VOP_SELECT_CPLL << ACLK_VOP0_PLL_SHIFT |
-			     (lcdc_div - 1) << ACLK_VOP0_DIV_SHIFT);
+			     ACLK_VIO0_PLL_MASK | ACLK_VIO0_DIV_MASK,
+			     ACLK_VIO_SELECT_GPLL << ACLK_VIO0_PLL_SHIFT |
+			     (lcdc_div - 1) << ACLK_VIO0_DIV_SHIFT);
 		break;
-	case ACLK_VOP1:
-		cpll_rate = rkclk_pll_get_rate(cru, CLK_CODEC);
-		lcdc_div = DIV_ROUND_UP(cpll_rate, rate_hz);
+	case ACLK_VIO1:
+		lcdc_div = DIV_ROUND_UP(gpll_rate, rate_hz);
 		rk_clrsetreg(&cru->cru_clksel_con[31],
-			     ACLK_VOP1_PLL_MASK | ACLK_VOP1_DIV_MASK,
-			     ACLK_VOP_SELECT_CPLL << ACLK_VOP1_PLL_SHIFT |
-			     (lcdc_div - 1) << ACLK_VOP1_DIV_SHIFT);
+			     ACLK_VIO1_PLL_MASK | ACLK_VIO1_DIV_MASK,
+			     ACLK_VIO_SELECT_GPLL << ACLK_VIO1_PLL_SHIFT |
+			     (lcdc_div - 1) << ACLK_VIO1_DIV_SHIFT);
+
+		lcdc_div = DIV_ROUND_UP(rate_hz, HCLK_VIO_HZ);
+		rk_clrsetreg(&cru->cru_clksel_con[28],
+			     HCLK_VIO_DIV_MASK,
+			     (lcdc_div - 1) << HCLK_VIO_DIV_SHIFT);
 		break;
 	}
 
@@ -956,8 +959,8 @@ static ulong rk3288_clk_set_rate(struct clk *clk, ulong rate)
 		break;
 	case DCLK_VOP0:
 	case DCLK_VOP1:
-	case ACLK_VOP0:
-	case ACLK_VOP1:
+	case ACLK_VIO0:
+	case ACLK_VIO1:
 		new_rate = rockchip_vop_set_clk(cru, priv->grf, clk->id, rate);
 		break;
 	case SCLK_EDP_24M:
@@ -1244,6 +1247,7 @@ static int rk3288_clk_probe(struct udevice *dev)
 {
 	struct rk3288_clk_priv *priv = dev_get_priv(dev);
 	bool init_clocks = false;
+	int ret;
 
 	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 	if (IS_ERR(priv->grf))
@@ -1287,6 +1291,12 @@ static int rk3288_clk_probe(struct udevice *dev)
 			priv->armclk_init_hz = priv->armclk_enter_hz;
 	}
 
+	ret = clk_set_defaults(dev);
+	if (ret)
+		debug("%s clk_set_defaults failed %d\n", __func__, ret);
+	else
+		priv->sync_kernel = true;
+
 	return 0;
 }
 
diff --git a/include/dt-bindings/clock/rk3288-cru.h b/include/dt-bindings/clock/rk3288-cru.h
index 4011fd9682..c41745d28b 100644
--- a/include/dt-bindings/clock/rk3288-cru.h
+++ b/include/dt-bindings/clock/rk3288-cru.h
@@ -105,6 +105,8 @@
 #define ACLK_VCODEC		208
 #define ACLK_CPU		209
 #define ACLK_PERI		210
+#define ACLK_VIO0		211
+#define ACLK_VIO1		212
 
 /* pclk gates */
 #define PCLK_GPIO0		320

commit 544e79360dece50ce3616060277d196941c18ab0
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Feb 1 12:04:16 2019 +0800

    configs: rockchip: px30: remove clock-names
    
    Since the clock-names will be used by mmc module, so remove it from
    CONFIG_OF_SPL_REMOVE_PROPS.
    
    Change-Id: I7f1b4d9353564c5aa87cf33783e814b5390710ef
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/px30_defconfig b/configs/px30_defconfig
index bc3a35a1b5..70f39c138d 100644
--- a/configs/px30_defconfig
+++ b/configs/px30_defconfig
@@ -57,7 +57,7 @@ CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y

commit 683a8d16becc9fea5da237a9ff2ffd6249b212db
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 30 15:39:47 2019 +0800

    arm: interrupt: clean up registers show
    
    Change-Id: I0ecb11c5e67cb7e0e95d3fcaad9220628fddbfc6
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/lib/interrupts.c b/arch/arm/lib/interrupts.c
index 69cf54bd59..dcc7f5d17b 100644
--- a/arch/arm/lib/interrupts.c
+++ b/arch/arm/lib/interrupts.c
@@ -23,6 +23,7 @@
 #include <asm/proc-armv/ptrace.h>
 #include <asm/u-boot-arm.h>
 #include <efi_loader.h>
+#include <iomem.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -55,6 +56,7 @@ void bad_mode (void)
 
 void show_regs (struct pt_regs *regs)
 {
+	ulong pc, lr;
 	unsigned long __maybe_unused flags;
 	const char __maybe_unused *processor_modes[] = {
 	"USER_26",	"FIQ_26",	"IRQ_26",	"SVC_26",
@@ -69,15 +71,17 @@ void show_regs (struct pt_regs *regs)
 
 	flags = condition_codes (regs);
 
-	printf("pc : [<%08lx>]	   lr : [<%08lx>]\n",
-	       instruction_pointer(regs), regs->ARM_lr);
 	if (gd->flags & GD_FLG_RELOC) {
-		printf("reloc pc : [<%08lx>]	   lr : [<%08lx>]\n",
-		       instruction_pointer(regs) - gd->reloc_off,
-		       regs->ARM_lr - gd->reloc_off);
+		pc = instruction_pointer(regs) - gd->reloc_off;
+		lr = regs->ARM_lr - gd->reloc_off;
+	} else {
+		pc = instruction_pointer(regs);
+		lr = regs->ARM_lr;
 	}
-	printf("sp : %08lx  ip : %08lx	 fp : %08lx\n",
-	       regs->ARM_sp, regs->ARM_ip, regs->ARM_fp);
+
+	printf ("pc : %08lx  lr : %08lx\n", pc, lr);
+	printf ("sp : %08lx  ip : %08lx	 fp : %08lx\n",
+	        regs->ARM_sp, regs->ARM_ip, regs->ARM_fp);
 	printf ("r10: %08lx  r9 : %08lx	 r8 : %08lx\n",
 		regs->ARM_r10, regs->ARM_r9, regs->ARM_r8);
 	printf ("r7 : %08lx  r6 : %08lx	 r5 : %08lx  r4 : %08lx\n",
@@ -88,11 +92,13 @@ void show_regs (struct pt_regs *regs)
 		flags & CC_N_BIT ? 'N' : 'n',
 		flags & CC_Z_BIT ? 'Z' : 'z',
 		flags & CC_C_BIT ? 'C' : 'c', flags & CC_V_BIT ? 'V' : 'v');
-	printf ("  IRQs %s  FIQs %s  Mode %s%s\n",
+	printf ("  IRQs %s  FIQs %s  Mode %s%s\n\n",
 		interrupts_enabled (regs) ? "on" : "off",
 		fast_interrupts_enabled (regs) ? "on" : "off",
 		processor_modes[processor_mode (regs)],
 		thumb_mode (regs) ? " (T)" : "");
+
+	iomem_show("sp", regs->ARM_sp, 0x00, 0xfc);
 }
 
 /* fixup PC to point to the instruction leading to the exception */

commit 9fa74d15b8bbfcd01422cbb0d3be7683aa5fcca1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 30 14:39:05 2019 +0800

    arm: vectors: irq context get svc_lr and svc_sp
    
    Without this patch, the irq context get the irq_lr and irq_sp
    which doesn't make any sense, what we need are svc_lr and svc_sp.
    
    Change-Id: I4c07e3688e818cd4516824a78d57ff092fdbe2b9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/lib/vectors.S b/arch/arm/lib/vectors.S
index 9896b60652..c6a3c0db87 100644
--- a/arch/arm/lib/vectors.S
+++ b/arch/arm/lib/vectors.S
@@ -179,6 +179,7 @@ IRQ_STACK_START:
 #define S_R1		4
 #define S_R0		0
 
+#define MODE_IRQ 0x12
 #define MODE_SVC 0x13
 #define I_BIT	 0x80
 
@@ -206,7 +207,15 @@ IRQ_STACK_START:
 	stmia	sp, {r0 - r12}			@ Calling r0-r12
 	@ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
 	add	r8, sp, #S_PC
-	stmdb	r8, {sp, lr}^		@ Calling SP, LR
+
+	cps	#MODE_SVC	@ SVC-Mode
+	isb
+	mov	r1, sp		@ svc_sp
+	mov	r2, lr		@ svc_lr
+	cps	#MODE_IRQ	@ IRQ-Mode
+	isb
+
+	stmdb	r8, {r1, r2}^		@ Calling svc_sp, svc_lr
 	str	lr, [r8, #0]		@ Save calling PC
 	mrs	r6, spsr
 	str	r6, [r8, #4]		@ Save CPSR

commit c15709b516ea8d4af9769fe216230d790126d236
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 30 14:35:28 2019 +0800

    irq: init IRQ_STACK_START_IN
    
    IRQ_STACK_START_IN is default 0x0badc0de which is a invalid address,
    this patch makes all exceptions routine work normally.
    
    Change-Id: I3f4d75b90d840f7ea1cb7a2e1cbc7ad452aef15b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/irq/irq-generic.c b/drivers/irq/irq-generic.c
index 9bf3d6411f..b4362e9d77 100644
--- a/drivers/irq/irq-generic.c
+++ b/drivers/irq/irq-generic.c
@@ -293,6 +293,7 @@ int arch_interrupt_init(void)
 
 	/* stack has been reserved in: arch_reserve_stacks() */
 	IRQ_STACK_START = gd->irq_sp;
+	IRQ_STACK_START_IN = gd->irq_sp;
 
 	__asm__ __volatile__("mrs %0, cpsr\n"
 			     : "=r" (cpsr)

commit 9e9e0e07b5b01a59c9f0f230e9fe2cdae0b98c96
Author: Shengfei Xu <xsf@rock-chips.com>
Date:   Wed Jan 30 10:05:06 2019 +0800

    power: pmic: rk8xx: save PMIC_POWER_EN register for rk817/rk809
    
    rk817/rk809 must restore the PMIC_POWER_EN OTP value before the system reboot.
    
    Change-Id: Ia62cb8f5b0dc9fef8a32a3af5f087c55a9888d78
    Signed-off-by: Shengfei Xu <xsf@rock-chips.com>

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index d5669695ea..d7ae6caa17 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -168,6 +168,8 @@ static int rk8xx_probe(struct udevice *dev)
 	int ret = 0, i, show_variant;
 	uint8_t msb, lsb, id_msb, id_lsb;
 	uint8_t on_source = 0, off_source = 0;
+	uint8_t power_en0, power_en1, power_en2, power_en3;
+	uint8_t value;
 
 	/* read Chip variant */
 	if (device_is_compatible(dev, "rockchip,rk817") ||
@@ -206,6 +208,15 @@ static int rk8xx_probe(struct udevice *dev)
 		init_data = rk817_init_reg;
 		init_data_num = ARRAY_SIZE(rk817_init_reg);
 #endif
+		power_en0 = pmic_reg_read(dev, RK817_POWER_EN0);
+		power_en1 = pmic_reg_read(dev, RK817_POWER_EN1);
+		power_en2 = pmic_reg_read(dev, RK817_POWER_EN2);
+		power_en3 = pmic_reg_read(dev, RK817_POWER_EN3);
+
+		value = (power_en0 & 0x0f) | ((power_en1 & 0x0f) << 4);
+		pmic_reg_write(dev, RK817_POWER_EN_SAVE0, value);
+		value = (power_en2 & 0x0f) | ((power_en3 & 0x0f) << 4);
+		pmic_reg_write(dev, RK817_POWER_EN_SAVE1, value);
 		break;
 	default:
 		printf("Unknown PMIC: RK%x!!\n", priv->variant);
diff --git a/include/power/rk8xx_pmic.h b/include/power/rk8xx_pmic.h
index 81b58a88c1..daeebb9665 100644
--- a/include/power/rk8xx_pmic.h
+++ b/include/power/rk8xx_pmic.h
@@ -192,6 +192,16 @@ enum {
 	RK818_ID = 0x8180,
 };
 
+enum {
+	RK817_POWER_EN0 = 0xb1,
+	RK817_POWER_EN1,
+	RK817_POWER_EN2,
+	RK817_POWER_EN3,
+};
+
+#define RK817_POWER_EN_SAVE0	0x99
+#define RK817_POWER_EN_SAVE1	0xa4
+
 #define RK817_ID_MSB	0xed
 #define RK817_ID_LSB	0xee
 #define RK8XX_ID_MSK	0xfff0

commit 10e1f9ebb762908382aaaf4ea6f1f8cc03375512
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 31 09:25:30 2019 +0800

    android: fix avb enable state set error
    
    Fixes: 8e66ecd25d0f14cbfc6ba88243b5b0b28331c345
    (android: fix get wrong ramdisk address when avb verify)
    
    Change-Id: I6b28ee32824e97e7eaed4aa8a530903d8486004b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 91d2bdf5ab..532cca5e9f 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -969,7 +969,7 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 
 	if (vboot_flag) {
 		printf("SecureBoot enabled, AVB verify\n");
-		android_avb_set_enabled(false);
+		android_avb_set_enabled(true);
 		if (android_slot_verify(boot_partname, &load_address,
 					slot_suffix))
 			return -1;

commit da1b89c5ac05401e4d39016c1dbcd32b62de5c88
Author: William Wu <william.wu@rock-chips.com>
Date:   Tue Jan 29 15:19:41 2019 +0800

    usb: phy: rockchip: get the otg node correctly
    
    In the commit 525293385cca ("rockchip: board: rework board
    usb init"), it correct the way to find the otg node. This
    patch do the same thing here.
    
    Change-Id: I27c66f48d9f6c99f1d6e45c2b83d2bcd6365a1f3
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/drivers/usb/phy/rockchip_usb2_phy.c b/drivers/usb/phy/rockchip_usb2_phy.c
index a6e071290a..bafe3cdf85 100644
--- a/drivers/usb/phy/rockchip_usb2_phy.c
+++ b/drivers/usb/phy/rockchip_usb2_phy.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <asm/arch/clock.h>
 #include <asm/io.h>
+#include <dm.h>
 #include <fdtdec.h>
 #include <syscon.h>
 
@@ -84,34 +85,44 @@ static int otg_phy_parse(struct dwc2_udc *dev)
 {
 	int node, phy_node;
 	u32 grf_base, grf_offset;
-	const char *mode;
-	bool matched = false;
 	const void *blob = gd->fdt_blob;
+	const fdt32_t *reg;
+	fdt_addr_t addr;
 	struct dwc2_plat_otg_data *pdata = dev->pdata;
 
 	/* Find the usb_otg node */
 	node = fdt_node_offset_by_compatible(blob, -1, "snps,dwc2");
-	while (node > 0) {
-		mode = fdt_getprop(blob, node, "dr_mode", NULL);
-		if (mode && strcmp(mode, "otg") == 0) {
-			matched = true;
-			break;
-		}
 
-		node = fdt_node_offset_by_compatible(blob, node, "snps,dwc2");
-	}
+retry:
+	if (node > 0) {
+		reg = fdt_getprop(blob, node, "reg", NULL);
+		if (!reg)
+			return -EINVAL;
+
+		addr = fdt_translate_address(blob, node, reg);
+		if (addr == OF_BAD_ADDR) {
+			pr_err("Not found usb_otg address\n");
+			return -EINVAL;
+		}
 
-	if (!matched) {
+#if defined(CONFIG_ROCKCHIP_RK3288)
+		if (addr != 0xff580000) {
+			node = fdt_node_offset_by_compatible(blob, node,
+							     "snps,dwc2");
+			goto retry;
+		}
+#endif
+	} else {
 		/*
 		 * With kernel dtb support, rk3288 dwc2 otg node
 		 * use the rockchip legacy dwc2 driver "dwc_otg_310"
 		 * with the compatible "rockchip,rk3288_usb20_otg".
 		 */
+#if defined(CONFIG_ROCKCHIP_RK3288)
 		node = fdt_node_offset_by_compatible(blob, -1,
 				"rockchip,rk3288_usb20_otg");
-		if (node > 0) {
-			matched = true;
-		} else {
+#endif
+		if (node < 0) {
 			pr_err("Not found usb_otg device\n");
 			return -ENODEV;
 		}

commit 294ad6176b9344c6c6c89924c3e10bb27bf21891
Author: William Wu <william.wu@rock-chips.com>
Date:   Tue Jan 29 14:26:12 2019 +0800

    rockchip: board: rework board usb init
    
    Currently, usb 2.0 otg node was found by the compatible
    "snps,dwc2" and the property "dr_mode". However, the
    "dr_mode" isn't a necessary condition, more seriously,
    if the dr_mode is set to "host" or "peripheral", we
    will fail to get the otg node.
    
    This patch finds otg node by the compatible "snps,dwc2"
    for most of Rockchip SoCs supported only one DWC2 controller.
    For RK3288, it supports two DWC2 controllers with the
    same compatible "snps,dwc2", so we add another condition
    (reg addr = 0xff580000) to get the otg node.
    
    Change-Id: I16acbf3e8da9bec19b8ec0a331b9114cb5462ac0
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index c864378f03..8108e3acc2 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -393,28 +393,33 @@ static struct dwc2_plat_otg_data otg_data = {
 int board_usb_init(int index, enum usb_init_type init)
 {
 	int node;
-	const char *mode;
 	fdt_addr_t addr;
 	const fdt32_t *reg;
-	bool matched = false;
 	const void *blob = gd->fdt_blob;
 
 	/* find the usb_otg node */
-	node = fdt_node_offset_by_compatible(blob, -1,
-					"snps,dwc2");
-
-	while (node > 0) {
-		mode = fdt_getprop(blob, node, "dr_mode", NULL);
-		if (mode && strcmp(mode, "otg") == 0) {
-			matched = true;
-			break;
+	node = fdt_node_offset_by_compatible(blob, -1, "snps,dwc2");
+
+retry:
+	if (node > 0) {
+		reg = fdt_getprop(blob, node, "reg", NULL);
+		if (!reg)
+			return -EINVAL;
+
+		addr = fdt_translate_address(blob, node, reg);
+		if (addr == OF_BAD_ADDR) {
+			pr_err("Not found usb_otg address\n");
+			return -EINVAL;
 		}
 
-		node = fdt_node_offset_by_compatible(blob, node,
-					"snps,dwc2");
-	}
-
-	if (!matched) {
+#if defined(CONFIG_ROCKCHIP_RK3288)
+		if (addr != 0xff580000) {
+			node = fdt_node_offset_by_compatible(blob, node,
+							     "snps,dwc2");
+			goto retry;
+		}
+#endif
+	} else {
 		/*
 		 * With kernel dtb support, rk3288 dwc2 otg node
 		 * use the rockchip legacy dwc2 driver "dwc_otg_310"
@@ -429,25 +434,14 @@ int board_usb_init(int index, enum usb_init_type init)
 		node = fdt_node_offset_by_compatible(blob, -1,
 				"rockchip,rk3368-usb");
 #endif
-
 		if (node > 0) {
-			matched = true;
+			goto retry;
 		} else {
 			pr_err("Not found usb_otg device\n");
 			return -ENODEV;
 		}
 	}
 
-	reg = fdt_getprop(blob, node, "reg", NULL);
-	if (!reg)
-		return -EINVAL;
-
-	addr = fdt_translate_address(blob, node, reg);
-	if (addr == OF_BAD_ADDR) {
-		pr_err("Not found usb_otg address\n");
-		return -EINVAL;
-	}
-
 	otg_data.regs_otg = (uintptr_t)addr;
 
 	return dwc2_udc_probe(&otg_data);

commit dddde95be472ff27022fdd353f5019e62caafc92
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Jan 30 18:38:07 2019 +0800

    video/drm: analogix_dp: add edp reset control support
    
    This patch adds eDP software reset operation to make sure
    register access successfully on RK3288 and it fixes possible
    register default value abnormal issue during boot up.
    
    1) normal case:
    Rockchip UBOOT DRM driver version: v1.0.1
    0x120: 0x00000007
    0x390: 0x00000003
    Using display timing dts
    Detailed mode clock 200000 kHz, flags[a]
    H: 1536 1548 1564 1612
    V: 2048 2056 2060 2068
    bus_format: 100e
    Link Training success!
    final link rate = 0x06, lane count = 0x04
    
    2) abnormal case:
    Rockchip UBOOT DRM driver version: v1.0.1
    0x120: 0x00000066
    0x390: 0x00000202
    Using display timing dts
    Detailed mode clock 200000 kHz, flags[a]
    H: 1536 1548 1564 1612
    V: 2048 2056 2060 2068
    bus_format: 100e
    failed to get Rx Max Link Rate
    failed to init training
    unable to do link train
    
    Change-Id: Idacbb0c72a40442da3a87e60bfe1d9965f3ca79c
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/analogix_dp.c b/drivers/video/drm/analogix_dp.c
index e38f411f15..2726acb1ef 100644
--- a/drivers/video/drm/analogix_dp.c
+++ b/drivers/video/drm/analogix_dp.c
@@ -828,6 +828,11 @@ static int analogix_dp_connector_init(struct display_state *state)
 		break;
 	}
 
+	/* eDP software reset request */
+	reset_assert(&dp->reset);
+	udelay(1);
+	reset_deassert(&dp->reset);
+
 	analogix_dp_init_dp(dp);
 
 	return 0;
@@ -917,6 +922,12 @@ static int analogix_dp_probe(struct udevice *dev)
 	if (IS_ERR(dp->grf))
 		return PTR_ERR(dp->grf);
 
+	ret = reset_get_by_name(dev, "dp", &dp->reset);
+	if (ret) {
+		dev_err(dev, "failed to get reset control: %d\n", ret);
+		return ret;
+	}
+
 	ret = gpio_request_by_name(dev, "hpd-gpios", 0, &dp->hpd_gpio,
 				   GPIOD_IS_IN);
 	if (ret && ret != -ENOENT) {
diff --git a/drivers/video/drm/analogix_dp.h b/drivers/video/drm/analogix_dp.h
index 68295d01f2..adde139fd7 100644
--- a/drivers/video/drm/analogix_dp.h
+++ b/drivers/video/drm/analogix_dp.h
@@ -7,6 +7,8 @@
 #ifndef __DRM_ANALOGIX_DP_H__
 #define __DRM_ANALOGIX_DP_H__
 
+#include <reset.h>
+
 /*
  * Unless otherwise noted, all values are from the DP 1.1a spec.  Note that
  * DP and DPCD versions are independent.  Differences from 1.0 are not noted,
@@ -1071,6 +1073,7 @@ struct analogix_dp_device {
 	struct udevice *dev;
 	void *reg_base;
 	void *grf;
+	struct reset_ctl reset;
 	struct gpio_desc hpd_gpio;
 	struct video_info	video_info;
 	struct link_train	link_train;

commit 9136a2d39ceb4838b7c35f93433277ee20c3a455
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Jan 22 17:06:04 2019 +0800

    rockchip: dts: px30/rk3326: add emmc hs200 support
    
    Change-Id: I0080a12452dd7fa77b8b7fd26a61bc429b3cfa27
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/dts/px30-evb.dts b/arch/arm/dts/px30-evb.dts
index 83e93d015a..43ef6ee50e 100644
--- a/arch/arm/dts/px30-evb.dts
+++ b/arch/arm/dts/px30-evb.dts
@@ -389,6 +389,7 @@
 	fifo-mode;
 	bus-width = <8>;
 	cap-mmc-highspeed;
+	mmc-hs200-1_8v;
 	supports-emmc;
 	disable-wp;
 	non-removable;

commit 700a366893696d3e8cd8369c95e2f10b79012bcd
Author: Tony Xu <tony.xu@rock-chips.com>
Date:   Thu Jan 31 10:09:50 2019 +0800

    drivers: usb: Add readback check when write keybox
    
    Change-Id: I969012e391bd8b6b764d259379d610853cd163b5
    Signed-off-by: Tony Xu <tony.xu@rock-chips.com>

diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index 1e9e982762..f85b5b75f8 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -362,15 +362,11 @@ static int rkusb_do_vs_write(struct fsg_common *common)
 					return -EIO;
 			} else {
 				/* RPMB */
-#ifdef CONFIG_OPTEE_V1
-#ifdef CONFIG_ANDROID_KEYMASTER_CA
 				rc =
 				write_keybox_to_secure_storage((u8 *)data,
 							       vhead->size);
 				if (rc < 0)
 					return -EIO;
-#endif
-#endif
 			}
 
 			common->residue -= common->data_size;
@@ -436,6 +432,12 @@ static int rkusb_do_vs_read(struct fsg_common *common)
 			vhead->size = rc;
 		} else {
 			/* RPMB */
+			rc =
+			read_raw_data_from_secure_storage((u8 *)data,
+							  common->data_size);
+			if (!rc)
+				return -EIO;
+			vhead->size = rc;
 		}
 
 		common->residue   -= common->data_size;

commit 9780bd18ce6416b02af392f4e75017396df6e8de
Author: Tony Xu <tony.xu@rock-chips.com>
Date:   Wed Jan 23 15:09:49 2019 +0800

    common: write keybox: Add readback check interface
    
    Change-Id: Ic020bd7e80869c2e3096637fce0adced654d3ce4
    Signed-off-by: Tony Xu <tony.xu@rock-chips.com>

diff --git a/common/write_keybox.c b/common/write_keybox.c
index 6198793bc1..91a8b4e736 100644
--- a/common/write_keybox.c
+++ b/common/write_keybox.c
@@ -11,6 +11,7 @@
 #include <stdlib.h>
 #include <attestation_key.h>
 #include "write_keybox.h"
+#include <keymaster.h>
 
 #define	BOOT_FROM_EMMC	(1 << 1)
 #define	WIDEVINE_TAG	"KBOX"
@@ -149,5 +150,30 @@ uint32_t write_keybox_to_secure_storage(uint8_t *received_data, uint32_t len)
 			printf("write attestation key to secure storage fail\n");
 		}
 	}
+	/* write all data to secure storage for readback check */
+	if (!rc) {
+		uint32_t ret;
+
+		ret = write_to_keymaster((uint8_t *)"raw_data",
+					 sizeof("raw_data"),
+					 received_data, len);
+		if (ret == TEEC_SUCCESS)
+			rc = 0;
+		else
+			rc = -EIO;
+	}
+	return rc;
+}
+
+uint32_t read_raw_data_from_secure_storage(uint8_t *data, uint32_t data_size)
+{
+	uint32_t rc;
+
+	rc = read_from_keymaster((uint8_t *)"raw_data", sizeof("raw_data"),
+				 data, data_size - 8);
+	if (rc != TEEC_SUCCESS)
+		return 0;
+	rc = data_size - 8;
+
 	return rc;
 }
diff --git a/include/write_keybox.h b/include/write_keybox.h
index 59991f83a5..445562948c 100644
--- a/include/write_keybox.h
+++ b/include/write_keybox.h
@@ -8,6 +8,7 @@
 
 #include <common.h>
 
+#if defined CONFIG_ANDROID_WRITE_KEYBOX && defined CONFIG_ANDROID_KEYMASTER_CA
 /*
  * write_keybox_to_secure_storage
  *
@@ -17,5 +18,28 @@
  * @return a negative number in case of error, or 0 on success.
  */
 uint32_t write_keybox_to_secure_storage(uint8_t *received_data, uint32_t len);
-#endif
 
+/*
+ * read_raw_data_from_secure_storege
+ *
+ * @raw_data:	the data read from secure storage
+ * @data_size:	size of raw data
+ *
+ * @return size of raw_data in case of success, or 0 on fail
+ */
+uint32_t read_raw_data_from_secure_storage(uint8_t *received_data,
+					   uint32_t len);
+#else
+inline uint32_t write_keybox_to_secure_storage(uint8_t *raw_data,
+					       uint32_t data_size)
+{
+	return -EPERM;
+}
+
+inline uint32_t read_raw_data_from_secure_storage(uint8_t *received_data,
+						  uint32_t len)
+{
+	return -EPERM;
+}
+#endif
+#endif

commit b4ab4a0f328f6abaea83d53b59fba80294b2a1ba
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Jan 30 18:31:15 2019 +0800

    reset: rockchip: convert to use live dt
    
    Change-Id: I70b17b0d9c4ded215cb58f0b65303fc3dea64f7e
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/reset/reset-rockchip.c b/drivers/reset/reset-rockchip.c
index 322ac27762..7638c28426 100644
--- a/drivers/reset/reset-rockchip.c
+++ b/drivers/reset/reset-rockchip.c
@@ -79,7 +79,7 @@ static int rockchip_reset_probe(struct udevice *dev)
 	fdt_addr_t addr;
 	fdt_size_t size;
 
-	addr = devfdt_get_addr_size_index(dev, 0, &size);
+	addr = dev_read_addr_size(dev, "reg", &size);
 	if (addr == FDT_ADDR_T_NONE)
 		return -EINVAL;
 

commit 611de31725939e6e0e4b53f1a322c9662d483219
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Jan 28 09:05:18 2019 +0800

    video/drm: analogix_dp: Fix color depth configuration
    
    Change-Id: Iea7fb59a2eb811d3db09cb6d0d8be03cd98a4645
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/analogix_dp.c b/drivers/video/drm/analogix_dp.c
index 181d5661cf..e38f411f15 100644
--- a/drivers/video/drm/analogix_dp.c
+++ b/drivers/video/drm/analogix_dp.c
@@ -20,6 +20,7 @@
 #include "rockchip_display.h"
 #include "rockchip_crtc.h"
 #include "rockchip_connector.h"
+#include "rockchip_panel.h"
 #include "analogix_dp.h"
 
 /**
@@ -804,11 +805,29 @@ static int analogix_dp_connector_init(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
 	struct analogix_dp_device *dp = dev_get_priv(conn_state->dev);
+	struct video_info *video = &dp->video_info;
+	struct rockchip_panel *panel = state_get_panel(state);
 
 	conn_state->type = DRM_MODE_CONNECTOR_eDP;
 	conn_state->output_mode = ROCKCHIP_OUT_MODE_AAAA;
 	conn_state->color_space = V4L2_COLORSPACE_DEFAULT;
 
+	switch (panel->bpc) {
+	case 12:
+		video->color_depth = COLOR_12;
+		break;
+	case 10:
+		video->color_depth = COLOR_10;
+		break;
+	case 6:
+		video->color_depth = COLOR_6;
+		break;
+	case 8:
+	default:
+		video->color_depth = COLOR_8;
+		break;
+	}
+
 	analogix_dp_init_dp(dp);
 
 	return 0;

commit 00cdbd6c886cdaafe19da1f3be22c061c449d8a9
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Jan 28 08:57:26 2019 +0800

    video/drm: panel: Allow to configure bpc (bits per color) from DT
    
    Change-Id: Iad86b7121e4cdfbd981daba6f860fd8b97bca52a
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_panel.c b/drivers/video/drm/rockchip_panel.c
index 33e7b3b362..8f953ee141 100644
--- a/drivers/video/drm/rockchip_panel.c
+++ b/drivers/video/drm/rockchip_panel.c
@@ -43,6 +43,7 @@ struct rockchip_panel_cmds {
 struct rockchip_panel_plat {
 	bool power_invert;
 	u32 bus_format;
+	unsigned int bpc;
 
 	struct {
 		unsigned int prepare;
@@ -404,6 +405,7 @@ static int rockchip_panel_ofdata_to_platdata(struct udevice *dev)
 
 	plat->bus_format = dev_read_u32_default(dev, "bus-format",
 						MEDIA_BUS_FMT_RBG888_1X24);
+	plat->bpc = dev_read_u32_default(dev, "bpc", 8);
 
 	data = dev_read_prop(dev, "panel-init-sequence", &len);
 	if (data) {
@@ -515,6 +517,7 @@ static int rockchip_panel_probe(struct udevice *dev)
 
 	panel->dev = dev;
 	panel->bus_format = plat->bus_format;
+	panel->bpc = plat->bpc;
 
 	return 0;
 }
diff --git a/drivers/video/drm/rockchip_panel.h b/drivers/video/drm/rockchip_panel.h
index d4d5ef113a..3a7587f710 100644
--- a/drivers/video/drm/rockchip_panel.h
+++ b/drivers/video/drm/rockchip_panel.h
@@ -21,6 +21,7 @@ struct rockchip_panel_funcs {
 struct rockchip_panel {
 	struct udevice *dev;
 	u32 bus_format;
+	unsigned int bpc;
 	const struct rockchip_panel_funcs *funcs;
 	const void *data;
 

commit 74e39389794fc0129c8b92e8ce414b87db5f5b06
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Jan 30 11:41:31 2019 +0800

    video/drm: Rename rockchip-dw-mipi-dsi.c to dw_mipi_dsi.c
    
    Change-Id: I409b32e945a2182e2948255b02644a98d16fcc21
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/Makefile b/drivers/video/drm/Makefile
index f5ceca0364..ca4579c88f 100644
--- a/drivers/video/drm/Makefile
+++ b/drivers/video/drm/Makefile
@@ -8,7 +8,7 @@ obj-y += rockchip_display.o rockchip_crtc.o rockchip_phy.o rockchip_bridge.o \
 		rockchip_vop.o rockchip_vop_reg.o bmp_helper.o
 
 obj-$(CONFIG_DRM_ROCKCHIP_MIPI_DSI)	+= rockchip_mipi_dsi.o
-obj-$(CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI) += rockchip-dw-mipi-dsi.o \
+obj-$(CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI) += dw_mipi_dsi.o \
 					  rockchip-inno-mipi-dphy.o
 obj-$(CONFIG_DRM_ROCKCHIP_DW_HDMI) += rockchip_dw_hdmi.o dw_hdmi.o
 obj-$(CONFIG_ROCKCHIP_INNO_HDMI_PHY) += rockchip-inno-hdmi-phy.o
diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/dw_mipi_dsi.c
similarity index 100%
rename from drivers/video/drm/rockchip-dw-mipi-dsi.c
rename to drivers/video/drm/dw_mipi_dsi.c

commit 98e497fd55e2e5d2a6dae4647f2b34d9f9981e75
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 30 15:56:27 2019 +0800

    arm: arm32_macros: fix coding style
    
    Change-Id: I736139237d184aa7a35c840ea0ed3214d7e47e44
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arm32_macros.S b/arch/arm/include/asm/arm32_macros.S
index e6d4f0745e..ce2f2dbdf3 100644
--- a/arch/arm/include/asm/arm32_macros.S
+++ b/arch/arm/include/asm/arm32_macros.S
@@ -248,17 +248,17 @@
 
 	/* Cortex A9: pcr, diag registers */
 	.macro write_pcr reg
-       mcr  p15, 0, \reg, c15, c0, 0
-       .endm
+	mcr  p15, 0, \reg, c15, c0, 0
+	.endm
 
-       .macro read_pcr reg
-       mrc  p15, 0, \reg, c15, c0, 0
-       .endm
+	.macro read_pcr reg
+	mrc  p15, 0, \reg, c15, c0, 0
+	.endm
 
-       .macro write_diag reg
-       mcr  p15, 0, \reg, c15, c0, 1
-       .endm
+	.macro write_diag reg
+	mcr  p15, 0, \reg, c15, c0, 1
+	.endm
 
-       .macro read_diag reg
-       mrc  p15, 0, \reg, c15, c0, 1
-       .endm
+	.macro read_diag reg
+	mrc  p15, 0, \reg, c15, c0, 1
+	.endm

commit 8b8b9c4b96f25e21b046845cfbdef5260bbe468f
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Jan 30 11:38:06 2019 +0800

    video/drm: dsi: fix pll clock setting for synopsys phy
    
    Fixes: 1c3c799444b5 ("video/drm: dsi: fix pll clock setting for synopsys phy")
    Change-Id: I1b5ef22c6c63a99dd3f10ea03f31d50d3bfeea06
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index 0674772996..ed831ed371 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -463,8 +463,10 @@ static int mipi_dphy_power_on(struct dw_mipi_dsi *dsi)
 	mipi_dphy_rstz_deassert(dsi);
 	mdelay(2);
 
-	if (dsi->dphy.phy)
+	if (dsi->dphy.phy) {
+		rockchip_phy_set_mode(dsi->dphy.phy, PHY_MODE_VIDEO_MIPI);
 		rockchip_phy_power_on(dsi->dphy.phy);
+	}
 
 	ret = readl_poll_timeout(dsi->base + DSI_PHY_STATUS,
 				 val, val & PHY_LOCK,

commit d84edf5f5c91f2790bfe3ed76183ca5bd35461af
Author: Guochun Huang <hero.huang@rock-chips.com>
Date:   Wed Jan 30 11:39:17 2019 +0800

    android: dtbo: enabled by default
    
    Change-Id: I711a9f341b8126e159d4ab07f3fb7fb5e2fab9a2
    Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>

diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
old mode 100644
new mode 100755
index 5c6b6b96f1..af958d7861
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -28,6 +28,7 @@ CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_BOOTD is not set
 CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_DTIMG=y
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
@@ -127,6 +128,7 @@ CONFIG_USE_TINY_PRINTF=y
 CONFIG_LIB_RAND=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
+CONFIG_OF_LIBFDT_OVERLAY=y
 # CONFIG_EFI_LOADER is not set
 CONFIG_AVB_LIBAVB=y
 CONFIG_AVB_LIBAVB_AB=y

commit 8e66ecd25d0f14cbfc6ba88243b5b0b28331c345
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 29 17:54:31 2019 +0800

    android: fix get wrong ramdisk address when avb verify
    
    - add interface to get android avb enable state;
    - get ramdisk from "ramdisk_addr_r" only when android avb disabled
      and CONFIG_ANDROID_BOOT_IMAGE_SEPARATE is enabled;
    
    (fixes: 644e344 android: support loading android image separate)
    
    Change-Id: I7280f911a0c5db851d119acb458b3f335dc28bce
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index b539aef080..91d2bdf5ab 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -863,6 +863,17 @@ static int load_android_image(struct blk_desc *dev_desc,
 	return 0;
 }
 
+static bool avb_enabled;
+void android_avb_set_enabled(bool enable)
+{
+	avb_enabled = enable;
+}
+
+bool android_avb_is_enabled(void)
+{
+	return avb_enabled;
+}
+
 int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 				 unsigned long load_address)
 {
@@ -958,6 +969,7 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 
 	if (vboot_flag) {
 		printf("SecureBoot enabled, AVB verify\n");
+		android_avb_set_enabled(false);
 		if (android_slot_verify(boot_partname, &load_address,
 					slot_suffix))
 			return -1;
@@ -970,11 +982,13 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 			printf("SecureBoot disabled, AVB skip\n");
 			env_update("bootargs",
 				   "androidboot.verifiedbootstate=orange");
+			android_avb_set_enabled(false);
 			if (load_android_image(dev_desc, boot_partname,
 					       slot_suffix, &load_address))
 				return -1;
 		} else {
 			printf("SecureBoot enabled, AVB verify\n");
+			android_avb_set_enabled(true);
 			if (android_slot_verify(boot_partname, &load_address,
 						slot_suffix))
 				return -1;
diff --git a/common/image-android.c b/common/image-android.c
index 3033178706..e980f7eb6d 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <image.h>
 #include <android_image.h>
+#include <android_bootloader.h>
 #include <malloc.h>
 #include <mapmem.h>
 #include <errno.h>
@@ -193,30 +194,37 @@ ulong android_image_get_kload(const struct andr_img_hdr *hdr)
 int android_image_get_ramdisk(const struct andr_img_hdr *hdr,
 			      ulong *rd_data, ulong *rd_len)
 {
+	bool avb_enabled = false;
+
+#ifdef CONFIG_ANDROID_BOOTLOADER
+	avb_enabled = android_avb_is_enabled();
+#endif
+
 	if (!hdr->ramdisk_size) {
 		*rd_data = *rd_len = 0;
 		return -1;
 	}
 
-/*
- * We load ramdisk at "ramdisk_addr_r" when CONFIG_ANDROID_BOOT_IMAGE_SEPARATE
- * CONFIG_USING_KERNEL_DTB is enabled.
- */
-#ifdef CONFIG_ANDROID_BOOT_IMAGE_SEPARATE
-	ulong ramdisk_addr_r;
+	/*
+	 * We have load ramdisk at "ramdisk_addr_r" when android avb is
+	 * disabled and CONFIG_ANDROID_BOOT_IMAGE_SEPARATE enabled.
+	 */
+	if (!avb_enabled && IS_ENABLED(CONFIG_ANDROID_BOOT_IMAGE_SEPARATE)) {
+		ulong ramdisk_addr_r;
 
-	ramdisk_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0);
-	if (!ramdisk_addr_r) {
-		printf("No Found Ramdisk Load Address.\n");
-		return -1;
+		ramdisk_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0);
+		if (!ramdisk_addr_r) {
+			printf("No Found Ramdisk Load Address.\n");
+			return -1;
+		}
+
+		*rd_data = ramdisk_addr_r;
+	} else {
+		*rd_data = (unsigned long)hdr;
+		*rd_data += hdr->page_size;
+		*rd_data += ALIGN(hdr->kernel_size, hdr->page_size);
 	}
 
-	*rd_data = ramdisk_addr_r;
-#else
-	*rd_data = (unsigned long)hdr;
-	*rd_data += hdr->page_size;
-	*rd_data += ALIGN(hdr->kernel_size, hdr->page_size);
-#endif
 	*rd_len = hdr->ramdisk_size;
 
 	printf("RAM disk load addr 0x%08lx size %u KiB\n",
@@ -228,31 +236,39 @@ int android_image_get_ramdisk(const struct andr_img_hdr *hdr,
 int android_image_get_fdt(const struct andr_img_hdr *hdr,
 			      ulong *rd_data)
 {
+	bool avb_enabled = false;
+
+#ifdef CONFIG_ANDROID_BOOTLOADER
+	avb_enabled = android_avb_is_enabled();
+#endif
+
 	if (!hdr->second_size) {
 		*rd_data = 0;
 		return -1;
 	}
-/*
- * We load fdt at "fdt_addr_r" when CONFIG_ANDROID_BOOT_IMAGE_SEPARATE or
- * or CONFIG_USING_KERNEL_DTB is enabled.
- */
-#if defined(CONFIG_ANDROID_BOOT_IMAGE_SEPARATE) || \
-	defined(CONFIG_USING_KERNEL_DTB)
-	ulong fdt_addr_r;
 
-	fdt_addr_r = env_get_ulong("fdt_addr_r", 16, 0);
-	if (!fdt_addr_r) {
-		printf("No Found FDT Load Address.\n");
-		return -1;
-	}
+	/*
+	 * We have load fdt at "fdt_addr_r" when android avb is
+	 * disabled and CONFIG_ANDROID_BOOT_IMAGE_SEPARATE enabled;
+	 * or CONFIG_USING_KERNEL_DTB is enabled.
+	 */
+	if (IS_ENABLED(CONFIG_USING_KERNEL_DTB) ||
+	    (!avb_enabled && IS_ENABLED(CONFIG_ANDROID_BOOT_IMAGE_SEPARATE))) {
+		ulong fdt_addr_r;
+
+		fdt_addr_r = env_get_ulong("fdt_addr_r", 16, 0);
+		if (!fdt_addr_r) {
+			printf("No Found FDT Load Address.\n");
+			return -1;
+		}
 
-	*rd_data = fdt_addr_r;
-#else
-	*rd_data = (unsigned long)hdr;
-	*rd_data += hdr->page_size;
-	*rd_data += ALIGN(hdr->kernel_size, hdr->page_size);
-	*rd_data += ALIGN(hdr->ramdisk_size, hdr->page_size);
-#endif
+		*rd_data = fdt_addr_r;
+	} else {
+		*rd_data = (unsigned long)hdr;
+		*rd_data += hdr->page_size;
+		*rd_data += ALIGN(hdr->kernel_size, hdr->page_size);
+		*rd_data += ALIGN(hdr->ramdisk_size, hdr->page_size);
+	}
 
 	printf("FDT load addr 0x%08x size %u KiB\n",
 	       hdr->second_addr, DIV_ROUND_UP(hdr->second_size, 1024));
@@ -361,7 +377,6 @@ long android_image_load(struct blk_desc *dev_desc,
 	u32 kload_addr;
 	u32 blkcnt;
 	struct andr_img_hdr *hdr;
-	__maybe_unused uint8_t vboot_flag = 0;
 
 	if (max_size < part_info->blksz)
 		return -1;
@@ -417,13 +432,8 @@ long android_image_load(struct blk_desc *dev_desc,
 			debug("Loading Android Image (%lu blocks) to 0x%lx... ",
 			      blk_cnt, load_address);
 
-#if defined(CONFIG_ANDROID_AVB) && defined(CONFIG_OPTEE_CLIENT)
-			if (trusty_read_vbootkey_enable_flag(&vboot_flag))
-				return -1;
-#endif
-
 #ifdef CONFIG_ANDROID_BOOT_IMAGE_SEPARATE
-			if (!vboot_flag) {
+			if (!android_avb_is_enabled()) {
 				char *fdt_high = env_get("fdt_high");
 				char *ramdisk_high = env_get("initrd_high");
 
diff --git a/include/android_bootloader.h b/include/android_bootloader.h
index 15498b7fe3..c591390434 100644
--- a/include/android_bootloader.h
+++ b/include/android_bootloader.h
@@ -94,4 +94,10 @@ char *android_str_append(char *base_name, char *slot_suffix);
  */
 int android_fdt_overlay_apply(void *fdt_addr);
 
+/** android_avb_is_enabled- get avb enable state.
+ * *
+ * @return true on enabled, otherwise disabled;
+ */
+bool android_avb_is_enabled(void);
+
 #endif  /* __ANDROID_BOOTLOADER_H */

commit ecc8fa7230619cbab12a538f7bf559d065d5514b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 30 09:20:01 2019 +0800

    configs: rk3368: increase sys malloc_f len
    
    Avoid malloc_f space for pre-reloc is not enough which
    may cause memory override.
    
    Change-Id: Ifa358f5700dfa8b1dc1240a210e414fb69fca914
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3368_defconfig b/configs/rk3368_defconfig
index db8b307d00..67b7d03ae7 100644
--- a/configs/rk3368_defconfig
+++ b/configs/rk3368_defconfig
@@ -1,6 +1,6 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_MALLOC_F_LEN=0x1000
+CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_ROCKCHIP_RK3368=y
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y

commit 49ae8667cc08fb72340ee2b4058b67de5bcce69f
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Thu Jan 24 10:18:17 2019 +0800

    video/drm: display: atomic display enable handling
    
    Change-Id: If71e8590fb4e1b1e743d4b085e42b7530f518084
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 46f4d98514..d5bf157274 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -660,7 +660,6 @@ static int display_enable(struct display_state *state)
 	const struct rockchip_crtc *crtc = crtc_state->crtc;
 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
 	struct panel_state *panel_state = &state->panel_state;
-	int ret = 0;
 
 	display_init(state);
 
@@ -670,17 +669,11 @@ static int display_enable(struct display_state *state)
 	if (state->is_enable)
 		return 0;
 
-	if (crtc_funcs->prepare) {
-		ret = crtc_funcs->prepare(state);
-		if (ret)
-			return ret;
-	}
+	if (crtc_funcs->prepare)
+		crtc_funcs->prepare(state);
 
-	if (conn_funcs->prepare) {
-		ret = conn_funcs->prepare(state);
-		if (ret)
-			goto unprepare_crtc;
-	}
+	if (conn_funcs->prepare)
+		conn_funcs->prepare(state);
 
 	if (conn_state->bridge)
 		rockchip_bridge_pre_enable(conn_state->bridge);
@@ -688,17 +681,11 @@ static int display_enable(struct display_state *state)
 	if (panel_state->panel)
 		rockchip_panel_prepare(panel_state->panel);
 
-	if (crtc_funcs->enable) {
-		ret = crtc_funcs->enable(state);
-		if (ret)
-			goto unprepare_conn;
-	}
+	if (crtc_funcs->enable)
+		crtc_funcs->enable(state);
 
-	if (conn_funcs->enable) {
-		ret = conn_funcs->enable(state);
-		if (ret)
-			goto disable_crtc;
-	}
+	if (conn_funcs->enable)
+		conn_funcs->enable(state);
 
 	if (conn_state->bridge)
 		rockchip_bridge_enable(conn_state->bridge);
@@ -707,18 +694,8 @@ static int display_enable(struct display_state *state)
 		rockchip_panel_enable(panel_state->panel);
 
 	state->is_enable = true;
-	return 0;
 
-disable_crtc:
-	if (crtc_funcs->disable)
-		crtc_funcs->disable(state);
-unprepare_conn:
-	if (conn_funcs->unprepare)
-		conn_funcs->unprepare(state);
-unprepare_crtc:
-	if (crtc_funcs->unprepare)
-		crtc_funcs->unprepare(state);
-	return ret;
+	return 0;
 }
 
 static int display_disable(struct display_state *state)

commit 81681b40b9160c7fb27f19f8a374b968d4839bda
Author: David Wu <david.wu@rock-chips.com>
Date:   Fri Jun 15 18:04:08 2018 +0800

    rockchip: dts: rv1108-evb: Fix gmac dts configuration
    
    Add the phy regulator supply for rv1108-evb, and fix the
    configuration of clock_in_out.
    
    But the phy will init failed because the phy-reset pin is
    the same as the mipi data pin.
    
    Change-Id: I14b0accd083742ca6eb4ae6bec1139ef5ba65db0
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/dts/rv1108-evb.dts b/arch/arm/dts/rv1108-evb.dts
index 338a04534b..75e4d4d607 100644
--- a/arch/arm/dts/rv1108-evb.dts
+++ b/arch/arm/dts/rv1108-evb.dts
@@ -80,6 +80,16 @@
 		regulator-min-microvolt = <5000000>;
 		regulator-max-microvolt = <5000000>;
 	};
+
+	vcc_phy: vcc-phy-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		regulator-name = "vcc_phy";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-always-on;
+		regulator-boot-on;
+	};
 };
 
 &display_subsystem {
@@ -164,7 +174,8 @@
 
 &gmac {
 	status = "okay";
-	clock_in_out = <0>;
+	clock_in_out ="output";
+	phy-supply = <&vcc_phy>;
 	snps,reset-active-low;
 	snps,reset-delays-us = <0 10000 1000000>;
 	snps,reset-gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_LOW>;

commit 0b06bacceb1f964634aef4b5aeb20dc1a0baab79
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jan 21 15:13:11 2019 +0800

    configs: rk3128x: enable CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
    
    Since sd does not have RPMB, so store secure data in security partition
    for sdboot.
    
    Change-Id: Ibf4557b5b2721657a6abf2f9e70e1b6c8893d7fc
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/rk3128x_defconfig b/configs/rk3128x_defconfig
index daad03c077..449db10e89 100644
--- a/configs/rk3128x_defconfig
+++ b/configs/rk3128x_defconfig
@@ -132,3 +132,4 @@ CONFIG_RK_AVB_LIBAVB_USER=y
 CONFIG_OPTEE_CLIENT=y
 CONFIG_OPTEE_V1=y
 CONFIG_TEST_ROCKCHIP=y
+CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y

commit 726087de6e9654badb496347ba46d88eba53a01f
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Dec 10 17:01:03 2018 +0800

    crypto: support rockchip hardware crypto
    
    Support: rsa & sha algorithm
    Usage: Set CONFIG_RK_CRYPTO to enable rk crypto.
    
    Change-Id: I2b6a920308fcdf46481bcf38fc6be532a02255bd
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
index 1ea116be75..709268c8c7 100644
--- a/drivers/crypto/Kconfig
+++ b/drivers/crypto/Kconfig
@@ -1,5 +1,6 @@
 menu "Hardware crypto devices"
 
 source drivers/crypto/fsl/Kconfig
+source drivers/crypto/rockchip/Kconfig
 
 endmenu
diff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile
index fb8c10b38c..0b770fcd64 100644
--- a/drivers/crypto/Makefile
+++ b/drivers/crypto/Makefile
@@ -8,3 +8,4 @@
 obj-$(CONFIG_EXYNOS_ACE_SHA)	+= ace_sha.o
 obj-y += rsa_mod_exp/
 obj-y += fsl/
+obj-$(CONFIG_CRYPTO_ROCKCHIP) += rockchip/
diff --git a/drivers/crypto/rockchip/Kconfig b/drivers/crypto/rockchip/Kconfig
new file mode 100644
index 0000000000..40b332e41d
--- /dev/null
+++ b/drivers/crypto/rockchip/Kconfig
@@ -0,0 +1,5 @@
+config CRYPTO_ROCKCHIP
+	bool "Support Rockchip Hardware Crypto"
+	help
+	  The module supports Rockchip Hardware Crypto.
+	  This accelerates algorithmic operations.
\ No newline at end of file
diff --git a/drivers/crypto/rockchip/Makefile b/drivers/crypto/rockchip/Makefile
new file mode 100644
index 0000000000..bb1557984d
--- /dev/null
+++ b/drivers/crypto/rockchip/Makefile
@@ -0,0 +1,8 @@
+#
+# SPDX-License-Identifier: GPL-2.0
+#
+#  Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+#
+
+obj-y += rockchip_crypto_hd.o
+obj-y += rockchip_crypto.o
diff --git a/drivers/crypto/rockchip/rockchip_crypto.c b/drivers/crypto/rockchip/rockchip_crypto.c
new file mode 100644
index 0000000000..208d3619e0
--- /dev/null
+++ b/drivers/crypto/rockchip/rockchip_crypto.c
@@ -0,0 +1,120 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <config.h>
+#include <common.h>
+#include <dm.h>
+#include <dm/device-internal.h>
+#include <errno.h>
+#include <rockchip_crypto/rockchip_crypto_hd.h>
+#include <rockchip_crypto/rockchip_crypto.h>
+
+int get_rk_crypto_desc(struct rk_crypto_desc *crypto_desc)
+{
+	int ret;
+
+	ret = uclass_get_device_by_name(UCLASS_RKCRYPTO, "crypto",
+					&crypto_desc->dev);
+	if (ret) {
+		printf("%s: Can not get crypto dev.\n", __func__);
+		return ret;
+	}
+
+	crypto_desc->ops = crypto_get_ops(crypto_desc->dev);
+
+	return 0;
+}
+
+int rk_crypto_sha_init(struct rk_crypto_desc *rk_crypto, u32 msg_len,
+		       int hash_bits)
+{
+	return rk_crypto->ops->sha_init(rk_crypto->dev, msg_len, msg_len);
+}
+
+int rk_crypto_sha_byte_swap(struct rk_crypto_desc *rk_crypto, int en)
+{
+	return rk_crypto->ops->sha_byte_swap(rk_crypto->dev, en);
+}
+
+int rk_crypto_sha_start(struct rk_crypto_desc *rk_crypto, u32 *data,
+			u32 data_len)
+{
+	return rk_crypto->ops->sha_start(rk_crypto->dev, data, data_len);
+}
+
+int rk_crypto_sha_end(struct rk_crypto_desc *rk_crypto, u32 *result)
+{
+	return rk_crypto->ops->sha_end(rk_crypto->dev, result);
+}
+
+int rk_crypto_sha_check(struct rk_crypto_desc *rk_crypto, u32 *in_hash)
+{
+	int ret;
+	u32 data_hash[8];
+
+	ret = rk_crypto_sha_end(rk_crypto, data_hash);
+	if (ret)
+		return -1;
+
+	return memcmp(in_hash, data_hash, 32);
+}
+
+int rk_crypto_rsa_init(struct rk_crypto_desc *rk_crypto)
+{
+	return rk_crypto->ops->rsa_init(rk_crypto->dev);
+}
+
+int rk_crypto_rsa_start(struct rk_crypto_desc *rk_crypto,
+			u32 *m, u32 *n, u32 *e, u32 *c)
+{
+	return rk_crypto->ops->rsa_start(rk_crypto->dev, m, n, e, c);
+}
+
+int rk_crypto_rsa_end(struct rk_crypto_desc *rk_crypto, u32 *result)
+{
+	return rk_crypto->ops->rsa_end(rk_crypto->dev, result);
+}
+
+int rk_crypto_rsa_check(struct rk_crypto_desc *rk_crypto)
+{
+	u32 datahash[8];
+	u32 rsa_result[8];
+	int ret = 0;
+
+	ret = rk_crypto_sha_end(rk_crypto, datahash);
+	if (ret)
+		return ret;
+
+	ret = rk_crypto_rsa_end(rk_crypto, rsa_result);
+	if (ret)
+		return ret;
+
+	return memcmp(rsa_result, datahash, 32);
+}
+
+int rk_crypto_probe(void)
+{
+	int ret;
+	struct udevice *dev;
+
+	ret = uclass_get_device_by_name(UCLASS_RKCRYPTO, "crypto", &dev);
+	if (ret) {
+		printf("%s: Can not get crypto dev.\n", __func__);
+		return -1;
+	}
+
+	ret = device_probe(dev);
+	if (ret) {
+		printf("%s: Crypto probe error.\n", __func__);
+		return -1;
+	}
+
+	return 0;
+}
+
+UCLASS_DRIVER(crypto) = {
+	.id		= UCLASS_RKCRYPTO,
+	.name		= "crypto",
+};
diff --git a/drivers/crypto/rockchip/rockchip_crypto_hd.c b/drivers/crypto/rockchip/rockchip_crypto_hd.c
new file mode 100644
index 0000000000..d765411bbc
--- /dev/null
+++ b/drivers/crypto/rockchip/rockchip_crypto_hd.c
@@ -0,0 +1,196 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <bouncebuf.h>
+#include <clk.h>
+#include <dm.h>
+#include <dt-structs.h>
+#include <errno.h>
+#include <linux/errno.h>
+#include <asm/arch/hardware.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/periph.h>
+#include <rockchip_crypto/rockchip_crypto_hd.h>
+#include <rockchip_crypto/rockchip_crypto.h>
+
+struct rockchip_crypto_plat {
+	fdt_addr_t base;
+	s32 frequency;
+};
+
+struct rockchip_crypto_priv {
+	volatile struct rk_crypto_reg *regbase;
+	struct clk clk;
+	unsigned int max_freq;
+};
+
+static int rockchip_crypto_ofdata_to_platdata(struct udevice *bus)
+{
+	struct rockchip_crypto_plat *plat = dev_get_platdata(bus);
+	struct rockchip_crypto_priv *priv = dev_get_priv(bus);
+	int ret = 0;
+
+	plat->base = dev_read_u32_default(bus, "default-addr", 0);
+	debug("Crypto base address is %x\n", (int)(size_t)plat->base);
+	ret = clk_get_by_index(bus, 0, &priv->clk);
+	if (ret < 0) {
+		printf("Could not get clock for %s: %d\n", bus->name, ret);
+		return ret;
+	}
+
+	plat->frequency = dev_read_u32_default(bus, "default-frequency",
+					       CRYPTO_DEFAULT_CLK);
+	debug("Crypto clock frequency is %x\n", (int)(size_t)plat->frequency);
+
+	return 0;
+}
+
+static int rockchip_crypto_probe(struct udevice *dev)
+{
+	struct rockchip_crypto_plat *plat = dev_get_platdata(dev);
+	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
+	int ret = 0;
+
+	priv->regbase = (volatile struct rk_crypto_reg *)
+				(plat->base & 0xffffffff);
+	priv->max_freq = plat->frequency;
+	ret = clk_set_rate(&priv->clk, priv->max_freq);
+	if (ret < 0) {
+		printf("%s: Failed to set clock: %d\n", __func__, ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int rockchip_crypto_sha_init(struct udevice *dev, u32 msg_len,
+				    int hash_bits)
+{
+	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
+
+	priv->regbase->crypto_hash_meg_len = msg_len;
+	if (hash_bits == SHA_256_BIT) {
+		priv->regbase->crypto_hash_ctrl = HASH_SWAP_DO | ENGINE_SELECTION_SHA256;
+		priv->regbase->crypto_conf &= ~(BYTESWAP_HRFIFO);
+	} else {
+		printf("Do not support that hash_bits is not equal to 256");
+		return -ENOTSUPP;
+	}
+
+	rk_setreg(&priv->regbase->crypto_ctrl, HASH_FLUSH);
+	do {} while (priv->regbase->crypto_ctrl & HASH_FLUSH);
+
+	return 0;
+}
+
+static int rockchip_crypto_sha_byte_swap(struct udevice *dev, int en)
+{
+	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
+
+	if (en)
+		priv->regbase->crypto_conf |= BYTESWAP_HRFIFO;
+	else
+		priv->regbase->crypto_conf &= ~BYTESWAP_HRFIFO;
+	return 0;
+}
+
+static int rockchip_crypto_sha_start(struct udevice *dev, u32 *data,
+				     u32 data_len)
+{
+	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
+
+	if (data_len == 0)
+		return 0;
+
+	flush_cache((unsigned long)data, data_len);
+	do {} while (priv->regbase->crypto_ctrl & HASH_START);
+	priv->regbase->crypto_intsts = HASH_DONE_INT;
+	priv->regbase->crypto_hrdmas = (u32)(unsigned long)data;
+	priv->regbase->crypto_hrdmal = ((data_len + 3) >> 2);
+	rk_setreg(&priv->regbase->crypto_ctrl, HASH_START);
+
+	return 0;
+}
+
+static int rockchip_crypto_sha_end(struct udevice *dev, u32 *result)
+{
+	int i;
+	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
+
+	do {} while (priv->regbase->crypto_ctrl & HASH_START);
+	do {} while (!priv->regbase->crypto_hash_sts);
+	for (i = 0; i < 8; i++)
+		*result++ = priv->regbase->crypto_hash_dout[i];
+
+	return 0;
+}
+
+static int rockchip_crypto_rsa_init(struct udevice *dev)
+{
+	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
+
+	priv->regbase->crypto_pka_ctrl = PKA_BLOCK_SIZE_2048;
+	rk_setreg(&priv->regbase->crypto_ctrl, PKA_HASH_CTRL);
+	priv->regbase->crypto_intsts = 0xffffffff;
+	do {} while (priv->regbase->crypto_ctrl & PKA_CTRL);
+
+	return 0;
+}
+
+static int rockchip_crypto_rsa_start(struct udevice *dev, u32 *m,
+				     u32 *n, u32 *e, u32 *c)
+{
+	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
+
+	priv->regbase->crypto_intsts = PKA_DONE_INT;
+	memcpy((void *)&priv->regbase->crypto_pka_m, (void *)m, 256);
+	memcpy((void *)&priv->regbase->crypto_pka_n, (void *)n, 256);
+	memcpy((void *)&priv->regbase->crypto_pka_e, (void *)e, 256);
+	memcpy((void *)&priv->regbase->crypto_pka_c, (void *)c, 256);
+	do {} while (priv->regbase->crypto_ctrl & PKA_START);
+	rk_setreg(&priv->regbase->crypto_ctrl, PKA_START);
+
+	return 0;
+}
+
+static int rockchip_crypto_rsa_end(struct udevice *dev, u32 *result)
+{
+	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
+	int i;
+
+	do {} while (priv->regbase->crypto_ctrl & PKA_START);
+	for (i = 0; i < 8; i++)
+		*result++ = *((u32 *)(&priv->regbase->crypto_pka_m + i));
+
+	return 0;
+}
+
+static const struct dm_rk_crypto_ops rockchip_crypto_ops = {
+	.sha_init = rockchip_crypto_sha_init,
+	.sha_byte_swap = rockchip_crypto_sha_byte_swap,
+	.sha_start = rockchip_crypto_sha_start,
+	.sha_end = rockchip_crypto_sha_end,
+	.rsa_init = rockchip_crypto_rsa_init,
+	.rsa_start = rockchip_crypto_rsa_start,
+	.rsa_end = rockchip_crypto_rsa_end,
+};
+
+static const struct udevice_id rockchip_crypto_ids[] = {
+	{ .compatible = "rockchip,rk3399-crypto" },
+	{ }
+};
+
+U_BOOT_DRIVER(rockchip_crypto_drv) = {
+	.name		= "rockchip_crypto",
+	.id		= UCLASS_RKCRYPTO,
+	.of_match	= rockchip_crypto_ids,
+	.ops = &rockchip_crypto_ops,
+	.ofdata_to_platdata = rockchip_crypto_ofdata_to_platdata,
+	.probe		= rockchip_crypto_probe,
+	.priv_auto_alloc_size = sizeof(struct rockchip_crypto_priv),
+	.platdata_auto_alloc_size = sizeof(struct rockchip_crypto_plat),
+};
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 76c5eb7d88..70910f319e 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -100,7 +100,7 @@ enum uclass_id {
 	UCLASS_CHARGE_DISPLAY,	/* Charge display */
 	UCLASS_DVFS,		/* DVFS policy */
 	UCLASS_IO_DOMAIN,	/* IO domain */
-
+	UCLASS_RKCRYPTO,        /* Rockchip Crypto */
 	UCLASS_COUNT,
 	UCLASS_INVALID = -1,
 };
diff --git a/include/rockchip_crypto/rockchip_crypto.h b/include/rockchip_crypto/rockchip_crypto.h
new file mode 100644
index 0000000000..ca7fbb01df
--- /dev/null
+++ b/include/rockchip_crypto/rockchip_crypto.h
@@ -0,0 +1,31 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _ROCKCHIP_CRYPTO_H_
+#define _ROCKCHIP_CRYPTO_H_
+
+#define crypto_get_ops(dev)	((struct dm_rk_crypto_ops *)(dev)->driver->ops)
+
+struct rk_crypto_desc {
+	struct udevice *dev;
+	struct dm_rk_crypto_ops *ops;
+};
+
+int get_rk_crypto_desc(struct rk_crypto_desc *crypto_desc);
+int rk_crypto_sha_init(struct rk_crypto_desc *rk_crypto, u32 msg_len,
+		       int hash_bits);
+int rk_crypto_sha_byte_swap(struct rk_crypto_desc *rk_crypto, int en);
+int rk_crypto_sha_start(struct rk_crypto_desc *rk_crypto, u32 *data,
+			u32 data_len);
+int rk_crypto_sha_end(struct rk_crypto_desc *rk_crypto, u32 *result);
+int rk_crypto_sha_check(struct rk_crypto_desc *rk_crypto, u32 *in_hash);
+int rk_crypto_rsa_init(struct rk_crypto_desc *rk_crypto);
+int rk_crypto_rsa_start(struct rk_crypto_desc *rk_crypto, u32 *m,
+			u32 *n, u32 *e, u32 *c);
+int rk_crypto_rsa_end(struct rk_crypto_desc *rk_crypto, u32 *result);
+int rk_crypto_rsa_check(struct rk_crypto_desc *rk_crypto);
+int rk_crypto_probe(void);
+
+#endif
diff --git a/include/rockchip_crypto/rockchip_crypto_hd.h b/include/rockchip_crypto/rockchip_crypto_hd.h
new file mode 100644
index 0000000000..c34fbdb90d
--- /dev/null
+++ b/include/rockchip_crypto/rockchip_crypto_hd.h
@@ -0,0 +1,112 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _ROCKCHIP_CRYPTO_HD_H_
+#define _ROCKCHIP_CRYPTO_HD_H_
+
+struct rk_crypto_reg {
+	u32 crypto_intsts;
+	u32 crypto_intena;
+	u32 crypto_ctrl;
+	u32 crypto_conf;
+	u32 crypto_brdmas;
+	u32 crypto_btdmas;
+	u32 crypto_brdmal;
+	u32 crypto_hrdmas;
+	u32 crypto_hrdmal;
+	u32 reserved0[(0x80 - 0x24) / 4];
+
+	u32 crypto_aes_ctrl;
+	u32 crypto_aes_sts;
+	u32 crypto_aes_din[4];
+	u32 crypto_aes_dout[4];
+	u32 crypto_aes_iv[4];
+	u32 crypto_aes_key[8];
+	u32 crypto_aes_cnt[4];
+	u32 reserved1[(0x100 - 0xe8) / 4];
+
+	u32 crypto_tdes_ctrl;
+	u32 crypto_tdes_sts;
+	u32 crypto_tdes_din[2];
+	u32 crypto_tdes_dout[2];
+	u32 crypto_tdes_iv[2];
+	u32 crypto_tdes_key1[2];
+	u32 crypto_tdes_key2[2];
+	u32 crypto_tdes_key3[2];
+	u32 reserved2[(0x180 - 0x138) / 4];
+
+	u32 crypto_hash_ctrl;
+	u32 crypto_hash_sts;
+	u32 crypto_hash_meg_len;
+	u32 crypto_hash_dout[8];
+	u32 crypto_hash_seed[5];
+	u32 reserved3[(0x200 - 0x1c0) / 4];
+
+	u32 crypto_trng_ctrl;
+	u32 crypto_trng_dout[8];
+	u32 reserved4[(0x280 - 0x224) / 4];
+
+	u32 crypto_pka_ctrl;
+	u32 reserved5[(0x400 - 0x284) / 4];
+
+	u32 crypto_pka_m;
+	u32 reserved6[(0x500 - 0x404) / 4];
+
+	u32 crypto_pka_c;
+	u32 reserved7[(0x600 - 0x504) / 4];
+
+	u32 crypto_pka_n;
+	u32 reserved8[(0x700 - 0x604) / 4];
+
+	u32 crypto_pka_e;
+};
+
+#define CRYPTO_DEFAULT_CLK           10000000
+#define SHA_256_BIT                  256
+/* crypto_hash_ctrl */
+#define HASH_SWAP_DO                 0x8
+#define ENGINE_SELECTION_SHA256      0x2
+/* crypto_conf */
+#define HR_ADDR_MODE                 (1 << 8)
+#define BT_ADDR_MODE                 (1 << 7)
+#define BR_ADDR_MODE                 (1 << 6)
+#define BYTESWAP_HRFIFO              (1 << 5)
+#define BYTESWAP_BTFIFO              (1 << 4)
+#define BYTESWAP_BRFIFO              (1 << 3)
+#define DESSEL                       (1 << 2)
+/* crypto_ctrl */
+#define TRNG_FLUSH                   (1 << 9)
+#define TRNG_START                   (1 << 8)
+#define PKA_FLUSH                    (1 << 7)
+#define HASH_FLUSH                   (1 << 6)
+#define BLOCK_FLUSH                  (1 << 5)
+#define PKA_START                    (1 << 4)
+#define HASH_START                   (1 << 3)
+#define BLOCK_START                  (1 << 2)
+#define TDES_START                   (1 << 1)
+#define AES_START                    (1 << 0)
+#define PKA_HASH_CTRL                (PKA_FLUSH | HASH_FLUSH)
+#define PKA_CTRL                     (PKA_FLUSH | PKA_START)
+/* crypto_intsts */
+#define PKA_DONE_INT                 (1 << 5)
+#define HASH_DONE_INT                (1 << 4)
+#define HRDMA_ERR_INT                (1 << 3)
+#define HRDMA_DONE_INT               (1 << 2)
+#define BCDMA_ERR_INT                (1 << 1)
+#define BCDMA_DONE_INT               (1 << 0)
+/* crypto_pka_ctrl */
+#define PKA_BLOCK_SIZE_2048          2
+
+struct dm_rk_crypto_ops {
+	int (*sha_init)(struct udevice *dev, u32 msg_len, int hash_bits);
+	int (*sha_byte_swap)(struct udevice *dev, int en);
+	int (*sha_start)(struct udevice *dev, u32 *data, u32 data_len);
+	int (*sha_end)(struct udevice *dev, u32 *result);
+	int (*rsa_init)(struct udevice *dev);
+	int (*rsa_start)(struct udevice *dev, u32 *m, u32 *n, u32 *e, u32 *c);
+	int (*rsa_end)(struct udevice *dev, u32 *result);
+};
+
+#endif

commit 564654eb9cb4e87d6745e05ed833a19d233610cd
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Dec 10 17:01:03 2018 +0800

    lib: optee_client: add read&wite permanent attributes certificate
    
    Change-Id: I83321afcf9d89b0cde0bcc78f1f02c847f85a115
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/optee_include/OpteeClientInterface.h b/include/optee_include/OpteeClientInterface.h
index 7475f6e3e5..c2e6f90c8f 100644
--- a/include/optee_include/OpteeClientInterface.h
+++ b/include/optee_include/OpteeClientInterface.h
@@ -19,6 +19,10 @@ uint32_t trusty_read_rollback_index(uint32_t slot, uint64_t *value);
 uint32_t trusty_write_rollback_index(uint32_t slot, uint64_t value);
 uint32_t trusty_read_permanent_attributes(uint8_t *attributes, uint32_t size);
 uint32_t trusty_write_permanent_attributes(uint8_t *attributes, uint32_t size);
+uint32_t trusty_read_permanent_attributes_cer(uint8_t *attributes,
+					      uint32_t size);
+uint32_t trusty_write_permanent_attributes_cer(uint8_t *attributes,
+					       uint32_t size);
 uint32_t trusty_read_lock_state(uint8_t *lock_state);
 uint32_t trusty_write_lock_state(uint8_t lock_state);
 uint32_t trusty_read_flash_lock_state(uint8_t *flash_lock_state);
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
old mode 100755
new mode 100644
index a124860792..d2d5c758f4
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -470,6 +470,158 @@ uint32_t trusty_write_permanent_attributes(uint8_t *attributes, uint32_t size)
 	return TeecResult;
 }
 
+uint32_t trusty_read_permanent_attributes_cer(uint8_t *attributes,
+					      uint32_t size)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
+
+	debug("testmm start\n");
+	OpteeClientApiLibInitialize();
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						    TEEC_NONE,
+						    TEEC_NONE,
+						    TEEC_NONE);
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a =
+		(dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				      &TeecSession,
+				      TeecUuid,
+				      TEEC_LOGIN_PUBLIC,
+				      NULL,
+				      &TeecOperation,
+				      &ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = sizeof("rsacer");
+	SharedMem0.flags = 0;
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	memcpy(SharedMem0.buffer, "rsacer", SharedMem0.size);
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = size;
+	SharedMem1.flags = 0;
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						    TEEC_MEMREF_TEMP_INOUT,
+						    TEEC_NONE,
+						    TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					0,
+					&TeecOperation,
+					&ErrorOrigin);
+	if (TeecResult == TEEC_SUCCESS)
+		memcpy(attributes, SharedMem1.buffer, SharedMem1.size);
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+	TEEC_CloseSession(&TeecSession);
+	TEEC_FinalizeContext(&TeecContext);
+	debug("testmm end\n");
+
+	return TeecResult;
+}
+
+uint32_t trusty_write_permanent_attributes_cer(uint8_t *attributes,
+					       uint32_t size)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
+
+	debug("testmm start\n");
+	OpteeClientApiLibInitialize();
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						    TEEC_NONE,
+						    TEEC_NONE,
+						    TEEC_NONE);
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a =
+		(dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				      &TeecSession,
+				      TeecUuid,
+				      TEEC_LOGIN_PUBLIC,
+				      NULL,
+				      &TeecOperation,
+				      &ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = sizeof("rsacer");
+	SharedMem0.flags = 0;
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	memcpy(SharedMem0.buffer, "rsacer", SharedMem0.size);
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = size;
+	SharedMem1.flags = 0;
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+	memcpy(SharedMem1.buffer, attributes, SharedMem1.size);
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						    TEEC_MEMREF_TEMP_INOUT,
+						    TEEC_NONE,
+						    TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					1,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+	TEEC_CloseSession(&TeecSession);
+	TEEC_FinalizeContext(&TeecContext);
+	debug("testmm end\n");
+
+	return TeecResult;
+}
+
 uint32_t trusty_read_lock_state(uint8_t *lock_state)
 {
 	TEEC_Result TeecResult;

commit 73d987a762ac55c0c2fff086d0d377999f2e4bd4
Author: Shunqing Chen <csq@rock-chips.com>
Date:   Mon Jan 28 15:39:27 2019 +0800

    configs: rk3126: add POWER_FG_RK816 support
    
    Change-Id: Ie5111627ac3303a9beb6f9f778004c7b9cbeb020
    Signed-off-by: Shunqing Chen <csq@rock-chips.com>

diff --git a/configs/rk3126_defconfig b/configs/rk3126_defconfig
index 3814172462..447b70876f 100644
--- a/configs/rk3126_defconfig
+++ b/configs/rk3126_defconfig
@@ -58,6 +58,7 @@ CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
+CONFIG_POWER_FG_RK816=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y

commit 524f26463d9251cb8eef248c36eec33271f06dcb
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Wed Jan 23 10:45:25 2019 +0800

    clk: rockchip: rk3066: print arm enter and init rate
    
    Change-Id: Iaf4ffbb61830b7bb7cef31843f0e9b75c34d08ec
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3066.h b/arch/arm/include/asm/arch-rockchip/cru_rk3066.h
index c4a6951633..5fe9732971 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3066.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3066.h
@@ -29,6 +29,11 @@ struct rk3066_clk_priv {
 	struct rk3066_cru *cru;
 	ulong rate;
 	bool has_bwadj;
+	ulong armclk_hz;
+	ulong armclk_enter_hz;
+	ulong armclk_init_hz;
+	bool sync_kernel;
+	bool set_armclk_rate;
 };
 
 struct rk3066_cru {
@@ -52,6 +57,12 @@ struct rk3066_cru {
 };
 check_member(rk3066_cru, cru_glb_cnt_th, 0x0140);
 
+struct rk3066_clk_info {
+	unsigned long id;
+	char *name;
+	bool is_cru;
+};
+
 /* CRU_CLKSEL0_CON */
 enum {
 	/* a9_core_div: core = core_src / (a9_core_div + 1) */
diff --git a/drivers/clk/rockchip/clk_rk3066.c b/drivers/clk/rockchip/clk_rk3066.c
index 57f8640089..dc324350dc 100644
--- a/drivers/clk/rockchip/clk_rk3066.c
+++ b/drivers/clk/rockchip/clk_rk3066.c
@@ -36,6 +36,22 @@ struct rk3066_clk_plat {
 #endif
 };
 
+#ifndef CONFIG_SPL_BUILD
+#define RK3066_CLK_DUMP(_id, _name, _iscru)	\
+{						\
+	.id = _id,				\
+	.name = _name,				\
+	.is_cru = _iscru,			\
+}
+
+static const struct rk3066_clk_info clks_dump[] = {
+	RK3066_CLK_DUMP(PLL_APLL, "apll", true),
+	RK3066_CLK_DUMP(PLL_DPLL, "dpll", true),
+	RK3066_CLK_DUMP(PLL_GPLL, "gpll", true),
+	RK3066_CLK_DUMP(PLL_CPLL, "cpll", true),
+};
+#endif
+
 struct pll_div {
 	u32 nr;
 	u32 nf;
@@ -550,10 +566,15 @@ static int rk3066_clk_probe(struct udevice *dev)
 
 	priv->cru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);
 #endif
-
+	priv->sync_kernel = false;
+	if (!priv->armclk_enter_hz)
+		priv->armclk_enter_hz = rkclk_pll_get_rate(priv->cru,
+							   CLK_ARM);
 	rkclk_init(priv->cru, priv->grf, 1);
+	if (!priv->armclk_init_hz)
+		priv->armclk_init_hz = rkclk_pll_get_rate(priv->cru,
+							  CLK_ARM);
 #endif
-
 	return 0;
 }
 
@@ -609,3 +630,69 @@ U_BOOT_DRIVER(rockchip_rk3066a_cru) = {
 	.ofdata_to_platdata	= rk3066_clk_ofdata_to_platdata,
 	.probe			= rk3066_clk_probe,
 };
+
+#ifndef CONFIG_SPL_BUILD
+/**
+ * soc_clk_dump() - Print clock frequencies
+ * Returns zero on success
+ *
+ * Implementation for the clk dump command.
+ */
+int soc_clk_dump(void)
+{
+	struct udevice *cru_dev;
+	struct rk3066_clk_priv *priv;
+	const struct rk3066_clk_info *clk_dump;
+	struct clk clk;
+	unsigned long clk_count = ARRAY_SIZE(clks_dump);
+	unsigned long rate;
+	int i, ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_CLK,
+					  DM_GET_DRIVER(rockchip_rk3066a_cru),
+					  &cru_dev);
+	if (ret) {
+		printf("%s failed to get cru device\n", __func__);
+		return ret;
+	}
+
+	priv = dev_get_priv(cru_dev);
+	printf("CLK: (%s. arm: enter %lu KHz, init %lu KHz, kernel %lu%s)\n",
+	       priv->sync_kernel ? "sync kernel" : "uboot",
+	       priv->armclk_enter_hz / 1000,
+	       priv->armclk_init_hz / 1000,
+	       priv->set_armclk_rate ? priv->armclk_hz / 1000 : 0,
+	       priv->set_armclk_rate ? " KHz" : "N/A");
+	for (i = 0; i < clk_count; i++) {
+		clk_dump = &clks_dump[i];
+		if (clk_dump->name) {
+			clk.id = clk_dump->id;
+			if (clk_dump->is_cru)
+				ret = clk_request(cru_dev, &clk);
+			if (ret < 0)
+				return ret;
+
+			rate = clk_get_rate(&clk);
+			clk_free(&clk);
+			if (i == 0) {
+				if (rate < 0)
+					printf("  %s %s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("  %s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
+			} else {
+				if (rate < 0)
+					printf("  %s %s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("  %s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
+			}
+		}
+	}
+
+	return 0;
+}
+#endif
+

commit 441bfb788af845e63093d2b1e52e45dd84393df6
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Wed Jan 23 11:01:11 2019 +0800

    clk: rockchip: rk3188: print arm enter and init rate
    
    Change-Id: I604c18050e8ccbbc9aa25ecd8f4379a877239d49
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3188.h b/arch/arm/include/asm/arch-rockchip/cru_rk3188.h
index 850b0a7af5..09a650e689 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3188.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3188.h
@@ -29,6 +29,11 @@ struct rk3188_clk_priv {
 	struct rk3188_cru *cru;
 	ulong rate;
 	bool has_bwadj;
+	ulong armclk_hz;
+	ulong armclk_enter_hz;
+	ulong armclk_init_hz;
+	bool sync_kernel;
+	bool set_armclk_rate;
 };
 
 struct rk3188_cru {
@@ -52,6 +57,12 @@ struct rk3188_cru {
 };
 check_member(rk3188_cru, cru_glb_cnt_th, 0x0140);
 
+struct rk3188_clk_info {
+	unsigned long id;
+	char *name;
+	bool is_cru;
+};
+
 /* CRU_CLKSEL0_CON */
 enum {
 	/* a9_core_div: core = core_src / (a9_core_div + 1) */
diff --git a/drivers/clk/rockchip/clk_rk3188.c b/drivers/clk/rockchip/clk_rk3188.c
index 287c44093c..757328f4bc 100644
--- a/drivers/clk/rockchip/clk_rk3188.c
+++ b/drivers/clk/rockchip/clk_rk3188.c
@@ -37,6 +37,22 @@ struct rk3188_clk_plat {
 #endif
 };
 
+#ifndef CONFIG_SPL_BUILD
+#define RK3188_CLK_DUMP(_id, _name, _iscru)	\
+{						\
+	.id = _id,				\
+	.name = _name,				\
+	.is_cru = _iscru,			\
+}
+
+static const struct rk3188_clk_info clks_dump[] = {
+	RK3188_CLK_DUMP(PLL_APLL, "apll", true),
+	RK3188_CLK_DUMP(PLL_DPLL, "dpll", true),
+	RK3188_CLK_DUMP(PLL_CPLL, "cpll", true),
+	RK3188_CLK_DUMP(PLL_GPLL, "gpll", true),
+};
+#endif
+
 struct pll_div {
 	u32 nr;
 	u32 nf;
@@ -593,8 +609,14 @@ static int rk3188_clk_probe(struct udevice *dev)
 
 	priv->cru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);
 #endif
-
+	priv->sync_kernel = false;
+	if (!priv->armclk_enter_hz)
+		priv->armclk_enter_hz = rkclk_pll_get_rate(priv->cru,
+							   CLK_ARM);
 	rkclk_init(priv->cru, priv->grf, priv->has_bwadj);
+	if (!priv->armclk_init_hz)
+		priv->armclk_init_hz = rkclk_pll_get_rate(priv->cru,
+							  CLK_ARM);
 #endif
 
 	return 0;
@@ -653,3 +675,69 @@ U_BOOT_DRIVER(rockchip_rk3188_cru) = {
 	.ofdata_to_platdata	= rk3188_clk_ofdata_to_platdata,
 	.probe			= rk3188_clk_probe,
 };
+
+#ifndef CONFIG_SPL_BUILD
+/**
+ * soc_clk_dump() - Print clock frequencies
+ * Returns zero on success
+ *
+ * Implementation for the clk dump command.
+ */
+int soc_clk_dump(void)
+{
+	struct udevice *cru_dev;
+	struct rk3188_clk_priv *priv;
+	const struct rk3188_clk_info *clk_dump;
+	struct clk clk;
+	unsigned long clk_count = ARRAY_SIZE(clks_dump);
+	unsigned long rate;
+	int i, ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_CLK,
+					  DM_GET_DRIVER(rockchip_rk3188_cru),
+					  &cru_dev);
+	if (ret) {
+		printf("%s failed to get cru device\n", __func__);
+		return ret;
+	}
+
+	priv = dev_get_priv(cru_dev);
+	printf("CLK: (%s. arm: enter %lu KHz, init %lu KHz, kernel %lu%s)\n",
+	       priv->sync_kernel ? "sync kernel" : "uboot",
+	       priv->armclk_enter_hz / 1000,
+	       priv->armclk_init_hz / 1000,
+	       priv->set_armclk_rate ? priv->armclk_hz / 1000 : 0,
+	       priv->set_armclk_rate ? " KHz" : "N/A");
+	for (i = 0; i < clk_count; i++) {
+		clk_dump = &clks_dump[i];
+		if (clk_dump->name) {
+			clk.id = clk_dump->id;
+			if (clk_dump->is_cru)
+				ret = clk_request(cru_dev, &clk);
+			if (ret < 0)
+				return ret;
+
+			rate = clk_get_rate(&clk);
+			clk_free(&clk);
+			if (i == 0) {
+				if (rate < 0)
+					printf("  %s %s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("  %s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
+			} else {
+				if (rate < 0)
+					printf("  %s %s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("  %s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
+			}
+		}
+	}
+
+	return 0;
+}
+#endif
+

commit 14262c55f80db2c59e51d59d9f6b87bd617f2829
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Oct 16 11:53:05 2018 +0800

    clk: rockchip: rk3328: add case SCLK_EMMC_SAMPLE
    
    Change-Id: Id2769eefc1692422110152e6dbec7afeb4488c8c
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c
index e14f44676b..d4778379e6 100644
--- a/drivers/clk/rockchip/clk_rk3328.c
+++ b/drivers/clk/rockchip/clk_rk3328.c
@@ -292,6 +292,7 @@ static ulong rk3328_mmc_get_clk(struct rk3328_clk_priv *priv, uint clk_id)
 		break;
 	case HCLK_EMMC:
 	case SCLK_EMMC:
+	case SCLK_EMMC_SAMPLE:
 		con_id = 32;
 		break;
 	default:
@@ -756,6 +757,7 @@ static ulong rk3328_clk_get_rate(struct clk *clk)
 	case HCLK_EMMC:
 	case SCLK_SDMMC:
 	case SCLK_EMMC:
+	case SCLK_EMMC_SAMPLE:
 		rate = rk3328_mmc_get_clk(priv, clk->id);
 		break;
 #ifndef CONFIG_SPL_BUILD

commit 9f1d10d309b8919516eeb92ba445050e2bf13555
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Sat Jan 19 10:11:52 2019 +0800

    video/drm: dsi: rework dual channel mode
    
    Change-Id: If119532a057d731f523a7ec8b035e9addc76d1e1
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index be5cbb0d44..0674772996 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -7,11 +7,9 @@
 #include <config.h>
 #include <common.h>
 #include <errno.h>
-#include <malloc.h>
 #include <asm/unaligned.h>
 #include <asm/io.h>
 #include <asm/hardware.h>
-#include <linux/list.h>
 #include <dm/device.h>
 #include <dm/read.h>
 #include <dm/of_access.h>
@@ -21,12 +19,10 @@
 #include "rockchip_display.h"
 #include "rockchip_crtc.h"
 #include "rockchip_connector.h"
+#include "rockchip_panel.h"
 #include "rockchip_phy.h"
 #include "rockchip_mipi_dsi.h"
 
-#define MSEC_PER_SEC    1000L
-#define USEC_PER_SEC	1000000L
-
 #define DSI_VERSION			0x00
 #define DSI_PWR_UP			0x04
 #define RESET				0
@@ -232,11 +228,9 @@ struct dw_mipi_dsi {
 	struct udevice *dev;
 	void *base;
 	void *grf;
-	const void *blob;
-	ofnode node;
 	int id;
 
-	/* dual-channel */
+	/* for dual-channel */
 	struct dw_mipi_dsi *master;
 	struct dw_mipi_dsi *slave;
 
@@ -855,10 +849,8 @@ static ssize_t dw_mipi_dsi_transfer(struct dw_mipi_dsi *dsi,
 
 	if (dsi->slave) {
 		ret = dw_mipi_dsi_transfer(dsi->slave, msg);
-		if (ret) {
-			printf("failed to send command through dsi slave, ret = %d\n", ret);
+		if (ret < 0)
 			return ret;
-		}
 	}
 
 	return msg->rx_len ? msg->rx_len : msg->tx_len;
@@ -868,7 +860,7 @@ static ssize_t dw_mipi_dsi_connector_transfer(struct display_state *state,
 					      const struct mipi_dsi_msg *msg)
 {
 	struct connector_state *conn_state = &state->conn_state;
-	struct dw_mipi_dsi *dsi = conn_state->private;
+	struct dw_mipi_dsi *dsi = dev_get_priv(conn_state->dev);
 
 	return dw_mipi_dsi_transfer(dsi, msg);
 }
@@ -1091,109 +1083,36 @@ static void dw_mipi_dsi_clear_err(struct dw_mipi_dsi *dsi)
 	dsi_write(dsi, DSI_INT_MSK1, 0);
 }
 
-static int dw_mipi_dsi_dual_channel_probe(struct dw_mipi_dsi *master)
-{
-	int phandle;
-	struct device_node *np;
-	struct dw_mipi_dsi *slave = NULL;
-
-	phandle = ofnode_read_u32_default(master->node, "rockchip,dual-channel", -1);
-	if (phandle < 0)
-		return 0;
-
-	np = of_find_node_by_phandle(phandle);
-	if (ofnode_valid(np_to_ofnode(np))) {
-		printf("failed to find dsi slave node\n");
-		return -ENODEV;
-	}
-
-	if (!of_device_is_available(np)) {
-		printf("dsi slave node is not available\n");
-		return -ENODEV;
-	}
-
-	slave = malloc(sizeof(*slave));
-	if (!slave)
-		return -ENOMEM;
-
-	memset(slave, 0, sizeof(*slave));
-
-	master->lanes /= 2;
-	master->slave = slave;
-	slave->master = master;
-
-	slave->blob = master->blob;
-	slave->node = np_to_ofnode(np);
-	slave->base = (u32 *)ofnode_get_addr_index(slave->node, 0);
-	slave->pdata = master->pdata;
-	slave->id = 1;
-	slave->dphy.phy = master->dphy.phy;
-	slave->lanes = master->lanes;
-	slave->format = master->format;
-	slave->mode_flags = master->mode_flags;
-	slave->channel = master->channel;
-
-	return 0;
-}
-
 static int dw_mipi_dsi_connector_init(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
-	const struct rockchip_connector *connector = conn_state->connector;
-	const struct dw_mipi_dsi_plat_data *pdata = connector->data;
-	ofnode mipi_node = conn_state->node;
 	struct dw_mipi_dsi *dsi = dev_get_priv(conn_state->dev);
-	ofnode panel;
-	int id;
-	int ret;
+	struct rockchip_panel *panel = state_get_panel(state);
 
-	dsi->base = dev_read_addr_ptr(conn_state->dev);
-	dsi->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	if (dsi->grf <= 0) {
-		printf("%s: Get syscon grf failed (ret=%p)\n",
-			__func__, dsi->grf);
-		return -ENXIO;
-	}
-
-	id = of_alias_get_id(ofnode_to_np(mipi_node), "dsi");
-	if (id < 0)
-		id = 0;
-
-	dsi->pdata = pdata;
-	dsi->id = id;
-	dsi->blob = state->blob;
-	dsi->node = mipi_node;
 	dsi->dphy.phy = conn_state->phy;
 
-	conn_state->private = dsi;
+	dsi->lanes = dev_read_u32_default(panel->dev, "dsi,lanes", 4);
+	dsi->format = dev_read_u32_default(panel->dev, "dsi,format",
+					   MIPI_DSI_FMT_RGB888);
+	dsi->mode_flags = dev_read_u32_default(panel->dev, "dsi,flags",
+					       MIPI_DSI_MODE_VIDEO |
+					       MIPI_DSI_MODE_VIDEO_BURST |
+					       MIPI_DSI_MODE_LPM |
+					       MIPI_DSI_MODE_EOT_PACKET);
+	dsi->channel = dev_read_u32_default(panel->dev, "reg", 0);
+
 	conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
 	conn_state->color_space = V4L2_COLORSPACE_DEFAULT;
-
-	panel = dev_read_subnode(conn_state->dev, "panel");
-	if (!ofnode_valid(panel)) {
-		printf("failed to find panel node\n");
-		return -1;
-	}
-
-#define FDT_GET_INT(val, name) \
-	val = ofnode_read_s32_default(panel, name, -1); \
-	if (val < 0) { \
-		printf("Can't get %s\n", name); \
-		return -1; \
-	}
-
-	FDT_GET_INT(dsi->lanes, "dsi,lanes");
-	FDT_GET_INT(dsi->format, "dsi,format");
-	FDT_GET_INT(dsi->mode_flags, "dsi,flags");
-	FDT_GET_INT(dsi->channel, "reg");
-
-	ret = dw_mipi_dsi_dual_channel_probe(dsi);
-	if (ret)
-		return ret;
-
 	conn_state->type = DRM_MODE_CONNECTOR_DSI;
-	if (dsi->slave)
+
+	if (dsi->slave) {
+		dsi->lanes /= 2;
+		dsi->slave->lanes = dsi->lanes;
+		dsi->slave->format = dsi->format;
+		dsi->slave->mode_flags = dsi->mode_flags;
+		dsi->slave->channel = dsi->channel;
 		conn_state->output_type = ROCKCHIP_OUTPUT_DSI_DUAL_CHANNEL;
+	}
 
 	return 0;
 }
@@ -1279,7 +1198,7 @@ static int dw_mipi_dsi_connector_prepare(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
 	struct crtc_state *crtc_state = &state->crtc_state;
-	struct dw_mipi_dsi *dsi = conn_state->private;
+	struct dw_mipi_dsi *dsi = dev_get_priv(conn_state->dev);
 	unsigned long lane_rate;
 
 	dsi->mode = &conn_state->mode;
@@ -1304,7 +1223,7 @@ static int dw_mipi_dsi_connector_prepare(struct display_state *state)
 static void dw_mipi_dsi_connector_unprepare(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
-	struct dw_mipi_dsi *dsi = conn_state->private;
+	struct dw_mipi_dsi *dsi = dev_get_priv(conn_state->dev);
 
 	dw_mipi_dsi_post_disable(dsi);
 }
@@ -1312,7 +1231,7 @@ static void dw_mipi_dsi_connector_unprepare(struct display_state *state)
 static int dw_mipi_dsi_connector_enable(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
-	struct dw_mipi_dsi *dsi = conn_state->private;
+	struct dw_mipi_dsi *dsi = dev_get_priv(conn_state->dev);
 
 	dw_mipi_dsi_enable(dsi);
 
@@ -1322,7 +1241,7 @@ static int dw_mipi_dsi_connector_enable(struct display_state *state)
 static int dw_mipi_dsi_connector_disable(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
-	struct dw_mipi_dsi *dsi = conn_state->private;
+	struct dw_mipi_dsi *dsi = dev_get_priv(conn_state->dev);
 
 	dw_mipi_dsi_disable(dsi);
 
@@ -1338,6 +1257,61 @@ static const struct rockchip_connector_funcs dw_mipi_dsi_connector_funcs = {
 	.transfer = dw_mipi_dsi_connector_transfer,
 };
 
+static int dw_mipi_dsi_dual_channel_probe(struct dw_mipi_dsi *master)
+{
+	struct udevice *dev;
+	struct dw_mipi_dsi *slave;
+	int ret;
+
+	ret = uclass_get_device_by_phandle(UCLASS_DISPLAY, master->dev,
+					   "rockchip,dual-channel", &dev);
+	if (ret == -ENOENT) {
+		return 0;
+	} else if (ret) {
+		dev_err(dev, "failed to find slave device: %d\n", ret);
+		return ret;
+	}
+
+	slave = dev_get_priv(dev);
+	if (!slave) {
+		dev_err(dev, "failed to get slave channel\n");
+		return -ENODEV;
+	}
+
+	master->slave = slave;
+	slave->master = master;
+
+	return 0;
+}
+
+static int dw_mipi_dsi_probe(struct udevice *dev)
+{
+	struct dw_mipi_dsi *dsi = dev_get_priv(dev);
+	const struct rockchip_connector *connector =
+		(const struct rockchip_connector *)dev_get_driver_data(dev);
+	const struct dw_mipi_dsi_plat_data *pdata = connector->data;
+	int id, ret;
+
+	dsi->base = dev_read_addr_ptr(dev);
+	dsi->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	if (IS_ERR(dsi->grf))
+		return PTR_ERR(dsi->grf);
+
+	id = of_alias_get_id(ofnode_to_np(dev->node), "dsi");
+	if (id < 0)
+		id = 0;
+
+	dsi->dev = dev;
+	dsi->pdata = pdata;
+	dsi->id = id;
+
+	ret = dw_mipi_dsi_dual_channel_probe(dsi);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
 static const u32 px30_dsi_grf_reg_fields[MAX_FIELDS] = {
 	[DPIUPDATECFG]		= GRF_REG_FIELD(0x0434,  7,  7),
 	[DPICOLORM]		= GRF_REG_FIELD(0x0434,  3,  3),
@@ -1469,6 +1443,7 @@ static const u32 rk3399_dsi1_grf_reg_fields[MAX_FIELDS] = {
 	[DPICOLORM]		= GRF_REG_FIELD(0x6250,  1,  1),
 	[TURNDISABLE]		= GRF_REG_FIELD(0x625c, 12, 15),
 	[FORCETXSTOPMODE]	= GRF_REG_FIELD(0x625c,  8, 11),
+	[FORCERXMODE]           = GRF_REG_FIELD(0x625c,  4,  7),
 	[ENABLE_N]		= GRF_REG_FIELD(0x625c,  0,  3),
 	[MASTERSLAVEZ]		= GRF_REG_FIELD(0x6260,  7,  7),
 	[ENABLECLK]		= GRF_REG_FIELD(0x6260,  6,  6),
@@ -1538,15 +1513,6 @@ static const struct udevice_id dw_mipi_dsi_ids[] = {
 	{}
 };
 
-static int dw_mipi_dsi_probe(struct udevice *dev)
-{
-	struct dw_mipi_dsi *dsi = dev_get_priv(dev);
-
-	dsi->dev = dev;
-
-	return 0;
-}
-
 U_BOOT_DRIVER(dw_mipi_dsi) = {
 	.name = "dw_mipi_dsi",
 	.id = UCLASS_DISPLAY,

commit 1c3c799444b5579c82594300953f62113f44b427
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Sat Jan 19 10:11:05 2019 +0800

    video/drm: dsi: fix pll clock setting for synopsys phy
    
    Change-Id: Ib2cfdf413e3c4da039a16971fcc00baaab3b101c
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
    (sync from rk/kernel:develop-4.4:331690a183f536fe8a791ceed4231f7e484f8fb7)

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index b6313bab5c..be5cbb0d44 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -229,6 +229,7 @@ struct mipi_dphy {
 };
 
 struct dw_mipi_dsi {
+	struct udevice *dev;
 	void *base;
 	void *grf;
 	const void *blob;
@@ -468,6 +469,9 @@ static int mipi_dphy_power_on(struct dw_mipi_dsi *dsi)
 	mipi_dphy_rstz_deassert(dsi);
 	mdelay(2);
 
+	if (dsi->dphy.phy)
+		rockchip_phy_power_on(dsi->dphy.phy);
+
 	ret = readl_poll_timeout(dsi->base + DSI_PHY_STATUS,
 				 val, val & PHY_LOCK,
 				 1000, PHY_STATUS_TIMEOUT_US);
@@ -537,76 +541,106 @@ static void dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi)
 	testif_write(dsi, 0x18, FEEDBACK_DIV_HI(m >> 5));
 }
 
-static unsigned long dw_mipi_dsi_calc_bandwidth(struct dw_mipi_dsi *dsi)
+static unsigned long dw_mipi_dsi_get_lane_rate(struct dw_mipi_dsi *dsi)
 {
-	int bpp;
-	unsigned long mpclk, tmp;
-	unsigned long target_mbps = 1000;
-	unsigned int max_mbps;
-	int lanes;
-	int rate;
+	const struct drm_display_mode *mode = dsi->mode;
+	unsigned long max_lane_rate = dsi->pdata->max_bit_rate_per_lane;
+	unsigned long lane_rate;
+	unsigned int value;
+	int bpp, lanes;
+	u64 tmp;
 
 	/* optional override of the desired bandwidth */
-	rate = ofnode_read_u32_default(dsi->node, "rockchip,lane-rate", -1);
-	if (rate > 0) {
-		return rate;
-	}
-	max_mbps = dsi->pdata->max_bit_rate_per_lane / USEC_PER_SEC;
+	value = dev_read_u32_default(dsi->dev, "rockchip,lane-rate", 0);
+	if (value > 0)
+		return value * USEC_PER_SEC;
 
 	bpp = mipi_dsi_pixel_format_to_bpp(dsi->format);
-	if (bpp < 0) {
-		printf("failed to get bpp for pixel format %d\n",
-			dsi->format);
+	if (bpp < 0)
 		bpp = 24;
-	}
 
 	lanes = dsi->slave ? dsi->lanes * 2 : dsi->lanes;
+	tmp = (u64)mode->clock * 1000 * bpp;
+	do_div(tmp, lanes);
 
-	mpclk = DIV_ROUND_UP(dsi->mode->clock, MSEC_PER_SEC);
-	if (mpclk) {
-		/* take 1 / 0.9, since mbps must big than bandwidth of RGB */
-		tmp = mpclk * (bpp / lanes) * 10 / 9;
-		if (tmp < max_mbps)
-			target_mbps = tmp;
-		else
-			printf("DPHY clock frequency is out of range\n");
-	}
+	/* take 1 / 0.9, since mbps must big than bandwidth of RGB */
+	tmp *= 10;
+	do_div(tmp, 9);
 
-	return target_mbps;
+	if (tmp > max_lane_rate)
+		lane_rate = max_lane_rate;
+	else
+		lane_rate = tmp;
+
+	return lane_rate;
 }
 
-static int dw_mipi_dsi_get_lane_bps(struct dw_mipi_dsi *dsi)
+static void dw_mipi_dsi_set_pll(struct dw_mipi_dsi *dsi, unsigned long rate)
 {
-	unsigned int i, pre;
-	unsigned long pllref, tmp;
-	unsigned int m = 1, n = 1;
-	unsigned long target_mbps;
+	unsigned long fin, fout;
+	unsigned long fvco_min, fvco_max, best_freq = 984000000;
+	u8 min_prediv, max_prediv;
+	u8 _prediv, best_prediv = 2;
+	u16 _fbdiv, best_fbdiv = 82;
+	u32 min_delta = ~0U;
+
+	fin = 24000000;
+	fout = rate;
+
+	/* 5Mhz < Fref / N < 40MHz, 80MHz < Fvco < 1500Mhz */
+	min_prediv = DIV_ROUND_UP(fin, 40000000);
+	max_prediv = fin / 5000000;
+	fvco_min = 80000000;
+	fvco_max = 1500000000;
+
+	for (_prediv = min_prediv; _prediv <= max_prediv; _prediv++) {
+		u64 tmp, _fout;
+		u32 delta;
+
+		/* Fvco = Fref * M / N */
+		tmp = (u64)fout * _prediv;
+		do_div(tmp, fin);
+		_fbdiv = tmp;
 
-	if (dsi->master)
-		return 0;
+		/*
+		 * Due to the use of a "by 2 pre-scaler," the range of the
+		 * feedback multiplication value M is limited to even division
+		 * numbers, and m must be greater than 12, less than 1000.
+		 */
+		if (_fbdiv <= 12 || _fbdiv >= 1000)
+			continue;
 
-	target_mbps = dw_mipi_dsi_calc_bandwidth(dsi);
+		if (_fbdiv % 2)
+			++_fbdiv;
 
-	/* ref clk : 24MHz*/
-	pllref = 24;
-	tmp = pllref;
+		_fout = (u64)_fbdiv * fin;
+		do_div(_fout, _prediv);
 
-	for (i = 1; i < 6; i++) {
-		pre = pllref / i;
-		if ((tmp > (target_mbps % pre)) && (target_mbps / pre < 512)) {
-			tmp = target_mbps % pre;
-			n = i;
-			m = target_mbps / pre;
-		}
-		if (tmp == 0)
+		if (_fout < fvco_min || _fout > fvco_max)
+			continue;
+
+		delta = abs(fout - _fout);
+		if (!delta) {
+			best_prediv = _prediv;
+			best_fbdiv = _fbdiv;
+			best_freq = _fout;
 			break;
+		} else if (delta < min_delta) {
+			best_prediv = _prediv;
+			best_fbdiv = _fbdiv;
+			best_freq = _fout;
+			min_delta = delta;
+		}
 	}
 
-	dsi->lane_mbps = pllref / n * m;
-	dsi->dphy.input_div = n;
-	dsi->dphy.feedback_div = m;
-
-	return 0;
+	dsi->lane_mbps = best_freq / USEC_PER_SEC;
+	dsi->dphy.input_div = best_prediv;
+	dsi->dphy.feedback_div = best_fbdiv;
+	if (dsi->slave) {
+		dsi->slave->lane_mbps = dsi->lane_mbps;
+		dsi->slave->dphy.input_div = dsi->dphy.input_div;
+		dsi->slave->dphy.feedback_div = dsi->dphy.feedback_div;
+	}
 }
 
 static int dw_mipi_dsi_read_from_fifo(struct dw_mipi_dsi *dsi,
@@ -1108,16 +1142,11 @@ static int dw_mipi_dsi_connector_init(struct display_state *state)
 	const struct rockchip_connector *connector = conn_state->connector;
 	const struct dw_mipi_dsi_plat_data *pdata = connector->data;
 	ofnode mipi_node = conn_state->node;
-	struct dw_mipi_dsi *dsi;
+	struct dw_mipi_dsi *dsi = dev_get_priv(conn_state->dev);
 	ofnode panel;
 	int id;
 	int ret;
 
-	dsi = malloc(sizeof(*dsi));
-	if (!dsi)
-		return -ENOMEM;
-	memset(dsi, 0, sizeof(*dsi));
-
 	dsi->base = dev_read_addr_ptr(conn_state->dev);
 	dsi->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 	if (dsi->grf <= 0) {
@@ -1169,29 +1198,10 @@ static int dw_mipi_dsi_connector_init(struct display_state *state)
 	return 0;
 }
 
-static void dw_mipi_dsi_pre_init(struct dw_mipi_dsi *dsi)
+static void dw_mipi_dsi_set_hs_clk(struct dw_mipi_dsi *dsi, unsigned long rate)
 {
-	unsigned long bw, rate;
-
-	if (dsi->dphy.phy) {
-		bw = dw_mipi_dsi_calc_bandwidth(dsi);
-		rate = rockchip_phy_set_pll(dsi->dphy.phy, bw * USEC_PER_SEC);
-		dsi->lane_mbps = rate / USEC_PER_SEC;
-		rockchip_phy_set_mode(dsi->dphy.phy, PHY_MODE_VIDEO_MIPI);
-		rockchip_phy_power_on(dsi->dphy.phy);
-	} else {
-		dw_mipi_dsi_get_lane_bps(dsi);
-	}
-
-	if (dsi->slave) {
-		dsi->slave->mode = dsi->mode;
-		dsi->slave->lane_mbps = dsi->lane_mbps;
-		dsi->slave->dphy.input_div = dsi->dphy.input_div;
-		dsi->slave->dphy.feedback_div = dsi->dphy.feedback_div;
-	}
-
-	printf("final DSI-Link bandwidth: %u Mbps x %d\n",
-	       dsi->lane_mbps, dsi->lanes);
+	rate = rockchip_phy_set_pll(dsi->dphy.phy, rate);
+	dsi->lane_mbps = rate / USEC_PER_SEC;
 }
 
 static void dw_mipi_dsi_host_init(struct dw_mipi_dsi *dsi)
@@ -1270,11 +1280,22 @@ static int dw_mipi_dsi_connector_prepare(struct display_state *state)
 	struct connector_state *conn_state = &state->conn_state;
 	struct crtc_state *crtc_state = &state->crtc_state;
 	struct dw_mipi_dsi *dsi = conn_state->private;
+	unsigned long lane_rate;
 
 	dsi->mode = &conn_state->mode;
+	if (dsi->slave)
+		dsi->slave->mode = dsi->mode;
+
+	lane_rate = dw_mipi_dsi_get_lane_rate(dsi);
+	if (dsi->dphy.phy)
+		dw_mipi_dsi_set_hs_clk(dsi, lane_rate);
+	else
+		dw_mipi_dsi_set_pll(dsi, lane_rate);
+
+	printf("final DSI-Link bandwidth: %u Mbps x %d\n",
+	       dsi->lane_mbps, dsi->slave ? dsi->lanes * 2 : dsi->lanes);
 
 	dw_mipi_dsi_vop_routing(dsi, crtc_state->crtc_id);
-	dw_mipi_dsi_pre_init(dsi);
 	dw_mipi_dsi_pre_enable(dsi);
 
 	return 0;
@@ -1519,6 +1540,10 @@ static const struct udevice_id dw_mipi_dsi_ids[] = {
 
 static int dw_mipi_dsi_probe(struct udevice *dev)
 {
+	struct dw_mipi_dsi *dsi = dev_get_priv(dev);
+
+	dsi->dev = dev;
+
 	return 0;
 }
 

commit cef5be6b540b3f2c8ac5330ad7ac65b8a922a172
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Sat Jan 19 10:26:50 2019 +0800

    video/drm: dsi: Bypass TLP clock lane and data lanes counter threshold
    
    Change-Id: I2b750800859626f3d95ebe6b1b8a3d86aefc07d1
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
    (sync from rk/kernel:develop-4.4:3ef4c2204f9be3f0877333b5d35ab11e322ed90d)

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index 2e43c4fad0..b6313bab5c 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -510,8 +510,8 @@ static void dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi)
 		{1200, 0x1b}, {1250, 0x2b}, {1300, 0x3b}, {1350, 0x0c},
 		{1400, 0x1c}, {1450, 0x2c}, {1500, 0x3c}
 	};
-	u8 hsfreqrange;
-	unsigned int index;
+	u8 hsfreqrange, counter;
+	unsigned int index, txbyteclkhs;
 	u16 n, m;
 
 	for (index = 0; index < ARRAY_SIZE(hsfreqrange_table); index++)
@@ -524,6 +524,11 @@ static void dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi)
 	hsfreqrange = hsfreqrange_table[index].hsfreqrange;
 	testif_write(dsi, 0x44, HSFREQRANGE(hsfreqrange));
 
+	txbyteclkhs = dsi->lane_mbps >> 3;
+	counter = txbyteclkhs * 60 / NSEC_PER_USEC;
+	testif_write(dsi, 0x60, 0x80 | counter);
+	testif_write(dsi, 0x70, 0x80 | counter);
+
 	n = dsi->dphy.input_div - 1;
 	m = dsi->dphy.feedback_div - 1;
 	testif_write(dsi, 0x19, 0x30);

commit 2612c8202dc90882e0fb82a77c6081f39104f0ff
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Sat Jan 19 10:09:02 2019 +0800

    video/drm: dsi: Don't hardcode/bypass phy default parameters
    
    Change-Id: If8670bee99c1397647323b34acd3e3da028549c3
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
    (sync from rk/kernel:develop-4.4:bd920c36fc56d00a24d3688510c84c62d7921c6a)

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index 7477be576b..2e43c4fad0 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -188,68 +188,13 @@
 #define PHY_STATUS_TIMEOUT_US		10000
 #define CMD_PKT_STATUS_TIMEOUT_US	20000
 
-#define BYPASS_VCO_RANGE	BIT(7)
-#define VCO_RANGE_CON_SEL(val)	(((val) & 0x7) << 3)
-#define VCO_IN_CAP_CON_DEFAULT	(0x0 << 1)
-#define VCO_IN_CAP_CON_LOW	(0x1 << 1)
-#define VCO_IN_CAP_CON_HIGH	(0x2 << 1)
-#define REF_BIAS_CUR_SEL	BIT(0)
-
-#define CP_CURRENT_3MA		BIT(3)
-#define CP_PROGRAM_EN		BIT(7)
-#define LPF_PROGRAM_EN		BIT(6)
-#define LPF_RESISTORS_20_KOHM	0
-
-#define HSFREQRANGE_SEL(val)	(((val) & 0x3f) << 1)
-
-#define INPUT_DIVIDER(val)	((val - 1) & 0x7f)
-#define LOW_PROGRAM_EN		0
-#define HIGH_PROGRAM_EN		BIT(7)
-#define LOOP_DIV_LOW_SEL(val)	((val - 1) & 0x1f)
-#define LOOP_DIV_HIGH_SEL(val)	(((val - 1) >> 5) & 0x1f)
-#define PLL_LOOP_DIV_EN		BIT(5)
-#define PLL_INPUT_DIV_EN	BIT(4)
-
-#define POWER_CONTROL		BIT(6)
-#define INTERNAL_REG_CURRENT	BIT(3)
-#define BIAS_BLOCK_ON		BIT(2)
-#define BANDGAP_ON		BIT(0)
-
-#define TER_RESISTOR_HIGH	BIT(7)
-#define	TER_RESISTOR_LOW	0
-#define LEVEL_SHIFTERS_ON	BIT(6)
-#define TER_CAL_DONE		BIT(5)
-#define SETRD_MAX		(0x7 << 2)
-#define POWER_MANAGE		BIT(1)
-#define TER_RESISTORS_ON	BIT(0)
-
-#define BIASEXTR_SEL(val)	((val) & 0x7)
-#define BANDGAP_SEL(val)	((val) & 0x7)
-#define TLP_PROGRAM_EN		BIT(7)
-#define THS_PRE_PROGRAM_EN	BIT(7)
-#define THS_ZERO_PROGRAM_EN	BIT(6)
-
-enum {
-	BANDGAP_97_07,
-	BANDGAP_98_05,
-	BANDGAP_99_02,
-	BANDGAP_100_00,
-	BANDGAP_93_17,
-	BANDGAP_94_15,
-	BANDGAP_95_12,
-	BANDGAP_96_10,
-};
-
-enum {
-	BIASEXTR_87_1,
-	BIASEXTR_91_5,
-	BIASEXTR_95_9,
-	BIASEXTR_100,
-	BIASEXTR_105_94,
-	BIASEXTR_111_88,
-	BIASEXTR_118_8,
-	BIASEXTR_127_7,
-};
+/* Test Code: 0x44 (HS RX Control of Lane 0) */
+#define HSFREQRANGE(x)			UPDATE(x, 6, 1)
+/* Test Code: 0x17 (PLL Input Divider Ratio) */
+#define INPUT_DIV(x)			UPDATE(x, 6, 0)
+/* Test Code: 0x18 (PLL Loop Divider Ratio) */
+#define FEEDBACK_DIV_LO(x)		UPDATE(x, 4, 0)
+#define FEEDBACK_DIV_HI(x)		(BIT(7) | UPDATE(x, 3, 0))
 
 #define GRF_REG_FIELD(reg, lsb, msb)	((reg << 16) | (lsb << 8) | (msb))
 
@@ -305,36 +250,6 @@ struct dw_mipi_dsi {
 	const struct dw_mipi_dsi_plat_data *pdata;
 };
 
-struct dphy_pll_testdin_map {
-	unsigned int max_mbps;
-	u8 testdin;
-};
-
-/* The table is based on 27MHz DPHY pll reference clock. */
-static const struct dphy_pll_testdin_map dptdin_map[] = {
-	{  90, 0x00}, { 100, 0x10}, { 110, 0x20}, { 130, 0x01},
-	{ 140, 0x11}, { 150, 0x21}, { 170, 0x02}, { 180, 0x12},
-	{ 200, 0x22}, { 220, 0x03}, { 240, 0x13}, { 250, 0x23},
-	{ 270, 0x04}, { 300, 0x14}, { 330, 0x05}, { 360, 0x15},
-	{ 400, 0x25}, { 450, 0x06}, { 500, 0x16}, { 550, 0x07},
-	{ 600, 0x17}, { 650, 0x08}, { 700, 0x18}, { 750, 0x09},
-	{ 800, 0x19}, { 850, 0x29}, { 900, 0x39}, { 950, 0x0a},
-	{1000, 0x1a}, {1050, 0x2a}, {1100, 0x3a}, {1150, 0x0b},
-	{1200, 0x1b}, {1250, 0x2b}, {1300, 0x3b}, {1350, 0x0c},
-	{1400, 0x1c}, {1450, 0x2c}, {1500, 0x3c}
-};
-
-static int max_mbps_to_testdin(unsigned int max_mbps)
-{
-	int i;
-
-	for (i = 0; i < ARRAY_SIZE(dptdin_map); i++)
-		if (dptdin_map[i].max_mbps > max_mbps)
-			return dptdin_map[i].testdin;
-
-	return -EINVAL;
-}
-
 static inline void dsi_write(struct dw_mipi_dsi *dsi, u32 reg, u32 val)
 {
 	writel(val, dsi->base + reg);
@@ -577,45 +492,44 @@ static int mipi_dphy_power_on(struct dw_mipi_dsi *dsi)
 	return 0;
 }
 
-static int dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi)
+static void dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi)
 {
-	int testdin, vco, val;
-
-	vco = (dsi->lane_mbps < 200) ? 0 : (dsi->lane_mbps + 100) / 200;
+	/* Table 5-1 Frequency Ranges */
+	const struct {
+		unsigned long max_lane_mbps;
+		u8 hsfreqrange;
+	} hsfreqrange_table[] = {
+		{  90, 0x00}, { 100, 0x10}, { 110, 0x20}, { 130, 0x01},
+		{ 140, 0x11}, { 150, 0x21}, { 170, 0x02}, { 180, 0x12},
+		{ 200, 0x22}, { 220, 0x03}, { 240, 0x13}, { 250, 0x23},
+		{ 270, 0x04}, { 300, 0x14}, { 330, 0x05}, { 360, 0x15},
+		{ 400, 0x25}, { 450, 0x06}, { 500, 0x16}, { 550, 0x07},
+		{ 600, 0x17}, { 650, 0x08}, { 700, 0x18}, { 750, 0x09},
+		{ 800, 0x19}, { 850, 0x29}, { 900, 0x39}, { 950, 0x0a},
+		{1000, 0x1a}, {1050, 0x2a}, {1100, 0x3a}, {1150, 0x0b},
+		{1200, 0x1b}, {1250, 0x2b}, {1300, 0x3b}, {1350, 0x0c},
+		{1400, 0x1c}, {1450, 0x2c}, {1500, 0x3c}
+	};
+	u8 hsfreqrange;
+	unsigned int index;
+	u16 n, m;
+
+	for (index = 0; index < ARRAY_SIZE(hsfreqrange_table); index++)
+		if (dsi->lane_mbps <= hsfreqrange_table[index].max_lane_mbps)
+			break;
 
-	testdin = max_mbps_to_testdin(dsi->lane_mbps);
-	if (testdin < 0) {
-		printf("failed to get testdin for %dmbps lane clock\n",
-		       dsi->lane_mbps);
-		return testdin;
-	}
+	if (index == ARRAY_SIZE(hsfreqrange_table))
+		--index;
 
-	testif_write(dsi, 0x10, BYPASS_VCO_RANGE | VCO_RANGE_CON_SEL(vco) |
-		     VCO_IN_CAP_CON_LOW | REF_BIAS_CUR_SEL);
-	testif_write(dsi, 0x11, CP_CURRENT_3MA);
-	testif_write(dsi, 0x12, CP_PROGRAM_EN | LPF_PROGRAM_EN |
-		     LPF_RESISTORS_20_KOHM);
-	testif_write(dsi, 0x44, HSFREQRANGE_SEL(testdin));
-	testif_write(dsi, 0x17, INPUT_DIVIDER(dsi->dphy.input_div));
-	val = LOOP_DIV_LOW_SEL(dsi->dphy.feedback_div) | LOW_PROGRAM_EN;
-	testif_write(dsi, 0x18, val);
-	testif_write(dsi, 0x19, PLL_LOOP_DIV_EN | PLL_INPUT_DIV_EN);
-	val = LOOP_DIV_HIGH_SEL(dsi->dphy.feedback_div) | HIGH_PROGRAM_EN;
-	testif_write(dsi, 0x18, val);
-	testif_write(dsi, 0x19, PLL_LOOP_DIV_EN | PLL_INPUT_DIV_EN);
-	testif_write(dsi, 0x20, POWER_CONTROL | INTERNAL_REG_CURRENT |
-		     BIAS_BLOCK_ON | BANDGAP_ON);
-	testif_write(dsi, 0x21, TER_RESISTOR_LOW | TER_CAL_DONE |
-		     SETRD_MAX | TER_RESISTORS_ON);
-	testif_write(dsi, 0x21, TER_RESISTOR_HIGH | LEVEL_SHIFTERS_ON |
-		     SETRD_MAX | POWER_MANAGE | TER_RESISTORS_ON);
-	testif_write(dsi, 0x22, LOW_PROGRAM_EN | BIASEXTR_SEL(BIASEXTR_127_7));
-	testif_write(dsi, 0x22, HIGH_PROGRAM_EN | BANDGAP_SEL(BANDGAP_96_10));
-	testif_write(dsi, 0x70, TLP_PROGRAM_EN | 0xf);
-	testif_write(dsi, 0x71, THS_PRE_PROGRAM_EN | 0x2d);
-	testif_write(dsi, 0x72, THS_ZERO_PROGRAM_EN | 0xa);
+	hsfreqrange = hsfreqrange_table[index].hsfreqrange;
+	testif_write(dsi, 0x44, HSFREQRANGE(hsfreqrange));
 
-	return 0;
+	n = dsi->dphy.input_div - 1;
+	m = dsi->dphy.feedback_div - 1;
+	testif_write(dsi, 0x19, 0x30);
+	testif_write(dsi, 0x17, INPUT_DIV(n));
+	testif_write(dsi, 0x18, FEEDBACK_DIV_LO(m));
+	testif_write(dsi, 0x18, FEEDBACK_DIV_HI(m >> 5));
 }
 
 static unsigned long dw_mipi_dsi_calc_bandwidth(struct dw_mipi_dsi *dsi)

commit 374e75505b32c940b1015ed73a6e5f682ded20f2
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Sat Jan 19 10:20:46 2019 +0800

    video/drm: dsi: fix phy power-on sequence
    
    Change-Id: I1f48f5d13d772ee8c3c71ee40f122811d687bcc6
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
    (sync from rk/kernel:develop-4.4:1df398e95a19c472ac847ced671175f147a043ad)

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index da90a538e1..7477be576b 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -154,22 +154,21 @@
 #define MAX_RD_TIME(lbcc)		((lbcc) & 0x7fff)
 
 #define DSI_PHY_RSTZ			0xa0
-#define PHY_DISFORCEPLL			0
 #define PHY_ENFORCEPLL			BIT(3)
-#define PHY_DISABLECLK			0
 #define PHY_ENABLECLK			BIT(2)
-#define PHY_RSTZ			0
-#define PHY_UNRSTZ			BIT(1)
-#define PHY_SHUTDOWNZ			0
-#define PHY_UNSHUTDOWNZ			BIT(0)
+#define PHY_RSTZ			BIT(1)
+#define PHY_SHUTDOWNZ			BIT(0)
 
 #define DSI_PHY_IF_CFG			0xa4
 #define N_LANES(n)			((((n) - 1) & 0x3) << 0)
 #define PHY_STOP_WAIT_TIME(cycle)	(((cycle) & 0xff) << 8)
 
 #define DSI_PHY_STATUS			0xb0
-#define LOCK				BIT(0)
-#define STOP_STATE_CLK_LANE		BIT(2)
+#define PHY_STOPSTATE0LANE		BIT(4)
+#define PHY_STOPSTATECLKLANE		BIT(2)
+#define PHY_LOCK			BIT(0)
+#define PHY_STOPSTATELANE		(PHY_STOPSTATE0LANE | \
+					 PHY_STOPSTATECLKLANE)
 
 #define DSI_PHY_TST_CTRL0		0xb4
 #define PHY_TESTCLK			BIT(1)
@@ -435,6 +434,42 @@ static int genif_wait_write_fifo_empty(struct dw_mipi_dsi *dsi)
 	return 0;
 }
 
+static inline void mipi_dphy_enableclk_assert(struct dw_mipi_dsi *dsi)
+{
+	dsi_update_bits(dsi, DSI_PHY_RSTZ, PHY_ENABLECLK, PHY_ENABLECLK);
+	udelay(1);
+}
+
+static inline void mipi_dphy_enableclk_deassert(struct dw_mipi_dsi *dsi)
+{
+	dsi_update_bits(dsi, DSI_PHY_RSTZ, PHY_ENABLECLK, 0);
+	udelay(1);
+}
+
+static inline void mipi_dphy_shutdownz_assert(struct dw_mipi_dsi *dsi)
+{
+	dsi_update_bits(dsi, DSI_PHY_RSTZ, PHY_SHUTDOWNZ, 0);
+	udelay(1);
+}
+
+static inline void mipi_dphy_shutdownz_deassert(struct dw_mipi_dsi *dsi)
+{
+	dsi_update_bits(dsi, DSI_PHY_RSTZ, PHY_SHUTDOWNZ, PHY_SHUTDOWNZ);
+	udelay(1);
+}
+
+static inline void mipi_dphy_rstz_assert(struct dw_mipi_dsi *dsi)
+{
+	dsi_update_bits(dsi, DSI_PHY_RSTZ, PHY_RSTZ, 0);
+	udelay(1);
+}
+
+static inline void mipi_dphy_rstz_deassert(struct dw_mipi_dsi *dsi)
+{
+	dsi_update_bits(dsi, DSI_PHY_RSTZ, PHY_RSTZ, PHY_RSTZ);
+	udelay(1);
+}
+
 static inline void testif_testclk_assert(struct dw_mipi_dsi *dsi)
 {
 	dsi_update_bits(dsi, DSI_PHY_TST_CTRL0, PHY_TESTCLK, PHY_TESTCLK);
@@ -501,7 +536,6 @@ static void testif_test_data_write(struct dw_mipi_dsi *dsi, u8 test_data)
 
 static void testif_write(struct dw_mipi_dsi *dsi, u8 test_code, u8 test_data)
 {
-	testif_testclr_deassert(dsi);
 	testif_test_code_write(dsi, test_code);
 	testif_test_data_write(dsi, test_data);
 
@@ -512,23 +546,27 @@ static void testif_write(struct dw_mipi_dsi *dsi, u8 test_code, u8 test_data)
 
 static int mipi_dphy_power_on(struct dw_mipi_dsi *dsi)
 {
-	u32 val;
+	u32 mask, val;
 	int ret;
 
-	dsi_write(dsi, DSI_PHY_RSTZ, PHY_ENFORCEPLL | PHY_ENABLECLK |
-		  PHY_UNRSTZ | PHY_UNSHUTDOWNZ);
+	mipi_dphy_shutdownz_deassert(dsi);
+	mipi_dphy_rstz_deassert(dsi);
 	mdelay(2);
 
 	ret = readl_poll_timeout(dsi->base + DSI_PHY_STATUS,
-				 val, val & LOCK, 1000, PHY_STATUS_TIMEOUT_US);
+				 val, val & PHY_LOCK,
+				 1000, PHY_STATUS_TIMEOUT_US);
 	if (ret < 0) {
 		dev_err(dsi->dev, "PHY is not locked\n");
 		return ret;
 	}
 
+	udelay(200);
+
+	mask = PHY_STOPSTATELANE;
 	ret = readl_poll_timeout(dsi->base + DSI_PHY_STATUS,
-				 val, val & STOP_STATE_CLK_LANE, 1000,
-				 PHY_STATUS_TIMEOUT_US);
+				 val, (val & mask) == mask,
+				 1000, PHY_STATUS_TIMEOUT_US);
 	if (ret < 0) {
 		dev_err(dsi->dev, "lane module is not in stop state\n");
 		return ret;
@@ -958,8 +996,6 @@ static void dw_mipi_dsi_init(struct dw_mipi_dsi *dsi)
 	u32 esc_clk_div;
 
 	dsi_write(dsi, DSI_PWR_UP, RESET);
-	dsi_write(dsi, DSI_PHY_RSTZ, PHY_DISFORCEPLL | PHY_DISABLECLK
-		  | PHY_RSTZ | PHY_SHUTDOWNZ);
 
 	/* The maximum value of the escape clock frequency is 20MHz */
 	esc_clk_div = DIV_ROUND_UP(dsi->lane_mbps >> 3, 20);
@@ -1267,6 +1303,11 @@ static void mipi_dphy_init(struct dw_mipi_dsi *dsi)
 {
 	u32 map[] = {0x1, 0x3, 0x7, 0xf};
 
+	mipi_dphy_enableclk_deassert(dsi);
+	mipi_dphy_shutdownz_assert(dsi);
+	mipi_dphy_rstz_assert(dsi);
+	testif_testclr_assert(dsi);
+
 	/* Configures DPHY to work as a Master */
 	grf_field_write(dsi, MASTERSLAVEZ, 1);
 
@@ -1280,6 +1321,8 @@ static void mipi_dphy_init(struct dw_mipi_dsi *dsi)
 	grf_field_write(dsi, FORCERXMODE, 0);
 	udelay(1);
 
+	testif_testclr_deassert(dsi);
+
 	if (!dsi->dphy.phy)
 		dw_mipi_dsi_phy_init(dsi);
 
@@ -1288,6 +1331,8 @@ static void mipi_dphy_init(struct dw_mipi_dsi *dsi)
 
 	/* Enable Clock Lane Module */
 	grf_field_write(dsi, ENABLECLK, 1);
+
+	mipi_dphy_enableclk_assert(dsi);
 }
 
 static void dw_mipi_dsi_pre_enable(struct dw_mipi_dsi *dsi)

commit e6cbaa24723c9efbfd9284e439b66e3502e30b8b
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Sat Jan 19 10:06:49 2019 +0800

    video/drm: dsi: rework test interface
    
    Change-Id: I8521fa8aa8b1ba11888dd506f238e6e6c2d7ad39
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
    (sync from rk/kernel:develop-4.4:2c659c75a6fb5fc99279a8d4e64b222d0158e77b)

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index dc71da99d0..da90a538e1 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -173,15 +173,13 @@
 
 #define DSI_PHY_TST_CTRL0		0xb4
 #define PHY_TESTCLK			BIT(1)
-#define PHY_UNTESTCLK			0
 #define PHY_TESTCLR			BIT(0)
-#define PHY_UNTESTCLR			0
 
 #define DSI_PHY_TST_CTRL1		0xb8
 #define PHY_TESTEN			BIT(16)
-#define PHY_UNTESTEN			0
-#define PHY_TESTDOUT(n)			(((n) & 0xff) << 8)
-#define PHY_TESTDIN(n)			(((n) & 0xff) << 0)
+#define PHY_TESTDOUT_SHIFT		8
+#define PHY_TESTDIN_MASK		GENMASK(7, 0)
+#define PHY_TESTDIN(x)			UPDATE(x, 7, 0)
 
 #define DSI_INT_ST0			0xbc
 #define DSI_INT_ST1			0xc0
@@ -437,25 +435,79 @@ static int genif_wait_write_fifo_empty(struct dw_mipi_dsi *dsi)
 	return 0;
 }
 
-static void dw_mipi_dsi_phy_write(struct dw_mipi_dsi *dsi, u8 test_code,
-				 u8 test_data)
+static inline void testif_testclk_assert(struct dw_mipi_dsi *dsi)
 {
-	/*
-	 * With the falling edge on TESTCLK, the TESTDIN[7:0] signal content
-	 * is latched internally as the current test code. Test data is
-	 * programmed internally by rising edge on TESTCLK.
-	 */
-	dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_TESTCLK | PHY_UNTESTCLR);
+	dsi_update_bits(dsi, DSI_PHY_TST_CTRL0, PHY_TESTCLK, PHY_TESTCLK);
+	udelay(1);
+}
+
+static inline void testif_testclk_deassert(struct dw_mipi_dsi *dsi)
+{
+	dsi_update_bits(dsi, DSI_PHY_TST_CTRL0, PHY_TESTCLK, 0);
+	udelay(1);
+}
+
+static inline void testif_testclr_assert(struct dw_mipi_dsi *dsi)
+{
+	dsi_update_bits(dsi, DSI_PHY_TST_CTRL0, PHY_TESTCLR, PHY_TESTCLR);
+	udelay(1);
+}
+
+static inline void testif_testclr_deassert(struct dw_mipi_dsi *dsi)
+{
+	dsi_update_bits(dsi, DSI_PHY_TST_CTRL0, PHY_TESTCLR, 0);
+	udelay(1);
+}
+
+static inline void testif_testen_assert(struct dw_mipi_dsi *dsi)
+{
+	dsi_update_bits(dsi, DSI_PHY_TST_CTRL1, PHY_TESTEN, PHY_TESTEN);
+	udelay(1);
+}
 
-	dsi_write(dsi, DSI_PHY_TST_CTRL1, PHY_TESTEN | PHY_TESTDOUT(0) |
-					  PHY_TESTDIN(test_code));
+static inline void testif_testen_deassert(struct dw_mipi_dsi *dsi)
+{
+	dsi_update_bits(dsi, DSI_PHY_TST_CTRL1, PHY_TESTEN, 0);
+	udelay(1);
+}
 
-	dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_UNTESTCLK | PHY_UNTESTCLR);
+static inline void testif_set_data(struct dw_mipi_dsi *dsi, u8 data)
+{
+	dsi_update_bits(dsi, DSI_PHY_TST_CTRL1,
+			PHY_TESTDIN_MASK, PHY_TESTDIN(data));
+	udelay(1);
+}
 
-	dsi_write(dsi, DSI_PHY_TST_CTRL1, PHY_UNTESTEN | PHY_TESTDOUT(0) |
-					  PHY_TESTDIN(test_data));
+static inline u8 testif_get_data(struct dw_mipi_dsi *dsi)
+{
+	return dsi_read(dsi, DSI_PHY_TST_CTRL1) >> PHY_TESTDOUT_SHIFT;
+}
+
+static void testif_test_code_write(struct dw_mipi_dsi *dsi, u8 test_code)
+{
+	testif_testclk_assert(dsi);
+	testif_set_data(dsi, test_code);
+	testif_testen_assert(dsi);
+	testif_testclk_deassert(dsi);
+	testif_testen_deassert(dsi);
+}
+
+static void testif_test_data_write(struct dw_mipi_dsi *dsi, u8 test_data)
+{
+	testif_testclk_deassert(dsi);
+	testif_set_data(dsi, test_data);
+	testif_testclk_assert(dsi);
+}
+
+static void testif_write(struct dw_mipi_dsi *dsi, u8 test_code, u8 test_data)
+{
+	testif_testclr_deassert(dsi);
+	testif_test_code_write(dsi, test_code);
+	testif_test_data_write(dsi, test_data);
 
-	dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_TESTCLK | PHY_UNTESTCLR);
+	dev_dbg(dsi->dev,
+		"test_code=0x%02x, test_data=0x%02x, monitor_data=0x%02x\n",
+		test_code, test_data, testif_get_data(dsi));
 }
 
 static int mipi_dphy_power_on(struct dw_mipi_dsi *dsi)
@@ -500,35 +552,30 @@ static int dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi)
 		return testdin;
 	}
 
-	dw_mipi_dsi_phy_write(dsi, 0x10, BYPASS_VCO_RANGE |
-					 VCO_RANGE_CON_SEL(vco) |
-					 VCO_IN_CAP_CON_LOW |
-					 REF_BIAS_CUR_SEL);
-	dw_mipi_dsi_phy_write(dsi, 0x11, CP_CURRENT_3MA);
-	dw_mipi_dsi_phy_write(dsi, 0x12, CP_PROGRAM_EN | LPF_PROGRAM_EN |
-					 LPF_RESISTORS_20_KOHM);
-	dw_mipi_dsi_phy_write(dsi, 0x44, HSFREQRANGE_SEL(testdin));
-	dw_mipi_dsi_phy_write(dsi, 0x17, INPUT_DIVIDER(dsi->dphy.input_div));
+	testif_write(dsi, 0x10, BYPASS_VCO_RANGE | VCO_RANGE_CON_SEL(vco) |
+		     VCO_IN_CAP_CON_LOW | REF_BIAS_CUR_SEL);
+	testif_write(dsi, 0x11, CP_CURRENT_3MA);
+	testif_write(dsi, 0x12, CP_PROGRAM_EN | LPF_PROGRAM_EN |
+		     LPF_RESISTORS_20_KOHM);
+	testif_write(dsi, 0x44, HSFREQRANGE_SEL(testdin));
+	testif_write(dsi, 0x17, INPUT_DIVIDER(dsi->dphy.input_div));
 	val = LOOP_DIV_LOW_SEL(dsi->dphy.feedback_div) | LOW_PROGRAM_EN;
-	dw_mipi_dsi_phy_write(dsi, 0x18, val);
-	dw_mipi_dsi_phy_write(dsi, 0x19, PLL_LOOP_DIV_EN | PLL_INPUT_DIV_EN);
+	testif_write(dsi, 0x18, val);
+	testif_write(dsi, 0x19, PLL_LOOP_DIV_EN | PLL_INPUT_DIV_EN);
 	val = LOOP_DIV_HIGH_SEL(dsi->dphy.feedback_div) | HIGH_PROGRAM_EN;
-	dw_mipi_dsi_phy_write(dsi, 0x18, val);
-	dw_mipi_dsi_phy_write(dsi, 0x19, PLL_LOOP_DIV_EN | PLL_INPUT_DIV_EN);
-	dw_mipi_dsi_phy_write(dsi, 0x20, POWER_CONTROL | INTERNAL_REG_CURRENT |
-					 BIAS_BLOCK_ON | BANDGAP_ON);
-	dw_mipi_dsi_phy_write(dsi, 0x21, TER_RESISTOR_LOW | TER_CAL_DONE |
-					 SETRD_MAX | TER_RESISTORS_ON);
-	dw_mipi_dsi_phy_write(dsi, 0x21, TER_RESISTOR_HIGH | LEVEL_SHIFTERS_ON |
-					 SETRD_MAX | POWER_MANAGE |
-					 TER_RESISTORS_ON);
-	dw_mipi_dsi_phy_write(dsi, 0x22, LOW_PROGRAM_EN |
-					 BIASEXTR_SEL(BIASEXTR_127_7));
-	dw_mipi_dsi_phy_write(dsi, 0x22, HIGH_PROGRAM_EN |
-					 BANDGAP_SEL(BANDGAP_96_10));
-	dw_mipi_dsi_phy_write(dsi, 0x70, TLP_PROGRAM_EN | 0xf);
-	dw_mipi_dsi_phy_write(dsi, 0x71, THS_PRE_PROGRAM_EN | 0x2d);
-	dw_mipi_dsi_phy_write(dsi, 0x72, THS_ZERO_PROGRAM_EN | 0xa);
+	testif_write(dsi, 0x18, val);
+	testif_write(dsi, 0x19, PLL_LOOP_DIV_EN | PLL_INPUT_DIV_EN);
+	testif_write(dsi, 0x20, POWER_CONTROL | INTERNAL_REG_CURRENT |
+		     BIAS_BLOCK_ON | BANDGAP_ON);
+	testif_write(dsi, 0x21, TER_RESISTOR_LOW | TER_CAL_DONE |
+		     SETRD_MAX | TER_RESISTORS_ON);
+	testif_write(dsi, 0x21, TER_RESISTOR_HIGH | LEVEL_SHIFTERS_ON |
+		     SETRD_MAX | POWER_MANAGE | TER_RESISTORS_ON);
+	testif_write(dsi, 0x22, LOW_PROGRAM_EN | BIASEXTR_SEL(BIASEXTR_127_7));
+	testif_write(dsi, 0x22, HIGH_PROGRAM_EN | BANDGAP_SEL(BANDGAP_96_10));
+	testif_write(dsi, 0x70, TLP_PROGRAM_EN | 0xf);
+	testif_write(dsi, 0x71, THS_PRE_PROGRAM_EN | 0x2d);
+	testif_write(dsi, 0x72, THS_ZERO_PROGRAM_EN | 0xa);
 
 	return 0;
 }

commit a64079e6060515ac4cb629ce776ea01940e09f07
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Sep 17 11:16:16 2018 +0800

    configs: rk3328: delete clock-names
    
    The clock property is used when emmc initialized.
    
    Change-Id: I9b55c0f8bb91c25326abc45436cbd4d4c2516a08
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index 79535c760d..7bc65c73e5 100644
--- a/configs/evb-rk3328_defconfig
+++ b/configs/evb-rk3328_defconfig
@@ -36,7 +36,7 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_TIME=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_TPL_OF_CONTROL=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_TPL_OF_PLATDATA=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_TPL_DM=y
diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index 5fd0655da7..dbc6b370a7 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -60,7 +60,7 @@ CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_TPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_TPL_OF_PLATDATA=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_TPL_DM=y

commit f17295bfb000464a70a0a53dad53150c804436bd
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Sep 17 11:06:15 2018 +0800

    rockchip: rk3328: update sdmmc&emmc's clocks
    
    Add the SCLK_EMMC_DRV and SCLK_EMMC_SAMPLE to clocks.
    
    Change-Id: I3c633bd973bb1f5cafb98a295ded6cfae704382d
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi
index 670b98d6fa..ea2140daaf 100644
--- a/arch/arm/dts/rk3328.dtsi
+++ b/arch/arm/dts/rk3328.dtsi
@@ -461,8 +461,9 @@
 		compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
 		reg = <0x0 0xff500000 0x0 0x4000>;
 		max-frequency = <150000000>;
-		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>;
-		clock-names = "biu", "ciu";
+		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
+			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
+		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
 		fifo-depth = <0x100>;
 		interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
 		status = "disabled";
@@ -484,8 +485,9 @@
 		compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
 		reg = <0x0 0xff520000 0x0 0x4000>;
 		max-frequency = <150000000>;
-		clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>;
-		clock-names = "biu", "ciu";
+		clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
+			 <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
+		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
 		fifo-depth = <0x100>;
 		interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
 		status = "disabled";

commit 573b2cce51ff8cd905ffa4318773507ab43d92ed
Author: Shunqing Chen <csq@rock-chips.com>
Date:   Thu Jan 24 10:02:16 2019 +0800

    regulator: rk8xx: add switch get/set value
    
    RK8xx switch does not need to set the voltage,
    but if dts set regulator-min-microvolt/regulator-max-microvolt,
    will cause regulator set value fail and not to enable this switch.
    So add an empty function to return success.
    
    Change-Id: Ifc3cfe24902123d7434f3f6560a8e530c03d0b2a
    Signed-off-by: Shunqing Chen <csq@rock-chips.com>

diff --git a/drivers/power/regulator/rk8xx.c b/drivers/power/regulator/rk8xx.c
index 966243934e..ad1dc8b1b0 100644
--- a/drivers/power/regulator/rk8xx.c
+++ b/drivers/power/regulator/rk8xx.c
@@ -1105,6 +1105,22 @@ static int switch_get_suspend_enable(struct udevice *dev)
 	return ret;
 }
 
+/*
+ * RK8xx switch does not need to set the voltage,
+ * but if dts set regulator-min-microvolt/regulator-max-microvolt,
+ * will cause regulator set value fail and not to enable this switch.
+ * So add an empty function to return success.
+ */
+static int switch_get_value(struct udevice *dev)
+{
+	return 0;
+}
+
+static int switch_set_value(struct udevice *dev, int uvolt)
+{
+	return 0;
+}
+
 static int rk8xx_buck_probe(struct udevice *dev)
 {
 	struct dm_regulator_uclass_platdata *uc_pdata;
@@ -1165,6 +1181,8 @@ static const struct dm_regulator_ops rk8xx_ldo_ops = {
 };
 
 static const struct dm_regulator_ops rk8xx_switch_ops = {
+	.get_value  = switch_get_value,
+	.set_value  = switch_set_value,
 	.get_enable = switch_get_enable,
 	.set_enable = switch_set_enable,
 	.set_suspend_enable = switch_set_suspend_enable,

commit f36a2342cd11fdba0bd6a6c62e77f8a9e916dbe9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 22 19:28:38 2019 +0800

    rockchip: board: move charge display function to charge display uclass
    
    Change-Id: Ib5143d8bd9beafc585438e57216f2b7c17932859
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 4f080f3e01..c864378f03 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -114,27 +114,6 @@ int fb_set_reboot_flag(void)
 }
 #endif
 
-#ifdef CONFIG_DM_CHARGE_DISPLAY
-static int charge_display(void)
-{
-	int ret;
-	struct udevice *dev;
-
-	ret = uclass_get_device(UCLASS_CHARGE_DISPLAY, 0, &dev);
-	if (ret) {
-		if (ret != -ENODEV) {
-			debug("Get UCLASS CHARGE DISPLAY failed: %d\n", ret);
-			return ret;
-		} else {
-			debug("Can't find charge display driver\n");
-		}
-		return 0;
-	}
-
-	return charge_display_show(dev);
-}
-#endif
-
 __weak int rk_board_init(void)
 {
 	return 0;
diff --git a/drivers/power/charge-display-uclass.c b/drivers/power/charge-display-uclass.c
index 7d3f16457c..21ea45e9ea 100644
--- a/drivers/power/charge-display-uclass.c
+++ b/drivers/power/charge-display-uclass.c
@@ -9,7 +9,7 @@
 #include <dm.h>
 #include <power/charge_display.h>
 
-int charge_display_show(struct udevice *dev)
+static int charge_display_show(struct udevice *dev)
 {
 	const struct dm_charge_display_ops *ops = dev_get_driver_ops(dev);
 
@@ -19,6 +19,20 @@ int charge_display_show(struct udevice *dev)
 	return ops->show(dev);
 }
 
+int charge_display(void)
+{
+	struct udevice *dev;
+	int ret;
+
+	ret = uclass_get_device(UCLASS_CHARGE_DISPLAY, 0, &dev);
+	if (ret) {
+		debug("Get charge display failed, ret=%d\n", ret);
+		return ret;
+	}
+
+	return charge_display_show(dev);
+}
+
 UCLASS_DRIVER(charge_display) = {
 	.id	= UCLASS_CHARGE_DISPLAY,
 	.name	= "charge_display",
diff --git a/include/power/charge_display.h b/include/power/charge_display.h
index 302a277329..19f0efabbe 100644
--- a/include/power/charge_display.h
+++ b/include/power/charge_display.h
@@ -11,6 +11,6 @@ struct dm_charge_display_ops {
 	int (*show)(struct udevice *dev);
 };
 
-int charge_display_show(struct udevice *dev);
+int charge_display(void);
 
 #endif

commit f9f027c19eeff3104728a6304eb83a511e4cbe8c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 23 11:21:01 2019 +0800

    common: attestation key: use debug for "ca head not found"
    
    Change-Id: I2d685acbcf18fa21aad35813a23abcfe0cf465a8
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/attestation_key.c b/common/attestation_key.c
index 80121a625d..0cfe2ef12e 100644
--- a/common/attestation_key.c
+++ b/common/attestation_key.c
@@ -268,7 +268,7 @@ atap_result load_attestation_key(struct blk_desc *dev_desc,
 	}
 
 	if (!validate_ca_header(ca_headr, sizeof(ca_headr))) {
-		printf("ca head not found\n");
+		debug("ca head not found\n");
 		return ATAP_RESULT_ERROR_INVALID_HEAD;
 	}
 

commit 644e344181225f233b5aca634cfabe00858cb82c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 23 16:30:16 2019 +0800

    android: support loading android image separate
    
    This patch support loading android image separate for the
    kernel/ramdisk/second images. It is disabled when android
    AVB is enabled, because AVB need verify the full android image.
    
    It brings some benefits, mainly for saving a lot of boot time:
      - allow skip load second content when kernel dtb is enabled;
      - allow skip fdt and ramdisk relocation during bootm boot flow;
      - allow loading fdt/ramdisk to "fdt_addr_r"/"ramdisk_addr_r";
      - avoid android image too large when load to ram;
    
    Change-Id: Ia040b3031307a8a7c98b011ce038ec61fee6804a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/Kconfig b/common/Kconfig
index edfeba7b94..c4ef08fb82 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -623,6 +623,15 @@ config ANDROID_BOOT_IMAGE
 	  This enables support for booting images which use the Android
 	  image format header.
 
+config ANDROID_BOOT_IMAGE_SEPARATE
+	bool "Enable support for Android image separate loading"
+	depends on ANDROID_BOOT_IMAGE
+	default y
+	help
+	  This enables support for android image separate loading. With this support,
+	  we can load ramdisk/fdt/kernel separate and skip ramdisk and fdt relocation
+	  safely. It saves a lot of boot time.
+
 config SKIP_RELOCATE_UBOOT
 	bool "Skip U-Boot relocation"
 	help
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 6419946131..b539aef080 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -22,6 +22,7 @@
 #include <keymaster.h>
 #include <linux/libfdt_env.h>
 #include <optee_include/OpteeClientInterface.h>
+#include <sysmem.h>
 
 #define ANDROID_PARTITION_BOOT "boot"
 #define ANDROID_PARTITION_MISC "misc"
@@ -331,6 +332,8 @@ int android_bootloader_boot_kernel(unsigned long kernel_address)
 		printf("Booting kernel at %s with fdt at %s...\n\n\n",
 		       kernel_addr_r, fdt_addr);
 
+	sysmem_dump_check();
+
 	do_bootm(NULL, 0, 4, bootm_args);
 
 	return -1;
@@ -802,7 +805,16 @@ int android_fdt_overlay_apply(void *fdt_addr)
 
 	ret = android_get_dtbo(&fdt_dtbo, (void *)hdr, &index);
 	if (!ret) {
+		phys_size_t fdt_size;
 		/* Must incease size before overlay */
+		fdt_size = fdt_totalsize((void *)fdt_addr) +
+				fdt_totalsize((void *)fdt_dtbo);
+		if (sysmem_free((phys_addr_t)fdt_addr))
+			goto out;
+		if (!sysmem_alloc_base("fdt(dtbo)",
+				       (phys_addr_t)fdt_addr,
+					fdt_size))
+			goto out;
 		fdt_increase_size(fdt_addr, fdt_totalsize((void *)fdt_dtbo));
 		ret = fdt_overlay_apply(fdt_addr, (void *)fdt_dtbo);
 		if (!ret) {
@@ -842,8 +854,8 @@ static int load_android_image(struct blk_desc *dev_desc,
 
 	ret = android_image_load(dev_desc, &boot_part, *load_address, -1UL);
 	if (ret < 0) {
-		printf("%s: %s part load fail, ret=%d\n",
-		       __func__, boot_part.name, ret);
+		debug("%s: %s part load fail, ret=%d\n",
+		      __func__, boot_part.name, ret);
 		return ret;
 	}
 	*load_address = ret;
diff --git a/common/image-android.c b/common/image-android.c
index 60e57da1c3..3033178706 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -10,9 +10,17 @@
 #include <malloc.h>
 #include <mapmem.h>
 #include <errno.h>
+#include <boot_rkimg.h>
+#include <sysmem.h>
 #ifdef CONFIG_RKIMG_BOOTLOADER
 #include <asm/arch/resource_img.h>
 #endif
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
+#include <android_avb/avb_slot_verify.h>
+#include <android_avb/avb_ops_user.h>
+#include <android_avb/rk_avb_ops_user.h>
+#endif
+#include <optee_include/OpteeClientInterface.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -29,7 +37,7 @@ static ulong android_image_get_kernel_addr(const struct andr_img_hdr *hdr)
 	 * address as the default.
 	 *
 	 * Even though it doesn't really make a lot of sense, and it
-	 * might be valid on some platforms, we treat that adress as
+	 * might be valid on some platforms, we treat that address as
 	 * the default value for this field, and try to execute the
 	 * kernel in place in such a case.
 	 *
@@ -190,9 +198,25 @@ int android_image_get_ramdisk(const struct andr_img_hdr *hdr,
 		return -1;
 	}
 
+/*
+ * We load ramdisk at "ramdisk_addr_r" when CONFIG_ANDROID_BOOT_IMAGE_SEPARATE
+ * CONFIG_USING_KERNEL_DTB is enabled.
+ */
+#ifdef CONFIG_ANDROID_BOOT_IMAGE_SEPARATE
+	ulong ramdisk_addr_r;
+
+	ramdisk_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0);
+	if (!ramdisk_addr_r) {
+		printf("No Found Ramdisk Load Address.\n");
+		return -1;
+	}
+
+	*rd_data = ramdisk_addr_r;
+#else
 	*rd_data = (unsigned long)hdr;
 	*rd_data += hdr->page_size;
 	*rd_data += ALIGN(hdr->kernel_size, hdr->page_size);
+#endif
 	*rd_len = hdr->ramdisk_size;
 
 	printf("RAM disk load addr 0x%08lx size %u KiB\n",
@@ -209,65 +233,123 @@ int android_image_get_fdt(const struct andr_img_hdr *hdr,
 		return -1;
 	}
 /*
- * If kernel dtb is enabled, it means we have read kernel dtb before do_bootm(),
- * that's: init_kernel_dtb() -> rockchip_read_dtb_file().
- * And maybe some operations(optional) are done:
- *
- * 1. apply fdt overlay;
- * 2. select fdt by adc or gpio;
- *
- * After that, we didn't update dtb at all untill run here, it's fine to
- * pass current fdt to kernel.
- *
- * This case has higher priority then the others(#elif, #else...).
- */
-#if defined(CONFIG_USING_KERNEL_DTB)
-	*rd_data = (ulong)gd->fdt_blob;
-
-/*
- * If kernel dtb is disabled, it means kernel dtb is not read before do_bootm(),
- * we need to read it from boot.img/recovery.img now.
- *
- * For rockchip AOSP firmware(CONFIG_RKIMG_BOOTLOADER), we pack resource.img in
- * second position. we need read kernel dtb by rockchip_read_dtb_file() which
- * can do the above "some operations(optional)".
+ * We load fdt at "fdt_addr_r" when CONFIG_ANDROID_BOOT_IMAGE_SEPARATE or
+ * or CONFIG_USING_KERNEL_DTB is enabled.
  */
-#elif defined(CONFIG_RKIMG_BOOTLOADER)
-	ulong fdt_addr = 0;
-	int ret;
+#if defined(CONFIG_ANDROID_BOOT_IMAGE_SEPARATE) || \
+	defined(CONFIG_USING_KERNEL_DTB)
+	ulong fdt_addr_r;
 
-	/* Get resource addr and fdt addr */
-	fdt_addr = env_get_ulong("fdt_addr_r", 16, 0);
-	if (!fdt_addr) {
+	fdt_addr_r = env_get_ulong("fdt_addr_r", 16, 0);
+	if (!fdt_addr_r) {
 		printf("No Found FDT Load Address.\n");
 		return -1;
 	}
 
-	ret = rockchip_read_dtb_file((void *)fdt_addr);
-	if (ret < 0) {
-		printf("%s: failed to read dtb file, ret=%d\n", __func__, ret);
-		return ret;
-	}
-
-	*rd_data = fdt_addr;
-
-/*
- * If kernel dtb is disabled and it's not rockchip AOSP firmware, kernel dtb is
- * in second position, let't read it directly.
- */
+	*rd_data = fdt_addr_r;
 #else
 	*rd_data = (unsigned long)hdr;
 	*rd_data += hdr->page_size;
 	*rd_data += ALIGN(hdr->kernel_size, hdr->page_size);
 	*rd_data += ALIGN(hdr->ramdisk_size, hdr->page_size);
+#endif
 
 	printf("FDT load addr 0x%08x size %u KiB\n",
 	       hdr->second_addr, DIV_ROUND_UP(hdr->second_size, 1024));
-#endif
 
 	return 0;
 }
 
+#ifdef CONFIG_ANDROID_BOOT_IMAGE_SEPARATE
+static int android_image_load_separate(struct blk_desc *dev_desc,
+				       struct andr_img_hdr *hdr,
+				       const disk_partition_t *part,
+				       void *android_load_address)
+{
+	ulong fdt_addr_r = env_get_ulong("fdt_addr_r", 16, 0);
+	ulong blk_start, blk_cnt, size;
+	int ret, blk_read = 0;
+
+	if (hdr->kernel_size) {
+		size = hdr->kernel_size + hdr->page_size;
+		blk_start = part->start;
+		blk_cnt = DIV_ROUND_UP(size, dev_desc->blksz);
+		if (!sysmem_alloc_base("kernel",
+				       (phys_addr_t)android_load_address,
+				       blk_cnt * dev_desc->blksz))
+			return -ENXIO;
+
+		ret = blk_dread(dev_desc, blk_start,
+				blk_cnt, android_load_address);
+		if (ret < 0) {
+			debug("%s: read kernel failed, ret=%d\n",
+			      __func__, ret);
+			return ret;
+		}
+		blk_read += ret;
+	}
+
+	if (hdr->ramdisk_size) {
+		ulong ramdisk_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0);
+
+		size = hdr->page_size + ALIGN(hdr->kernel_size, hdr->page_size);
+		blk_start = part->start + DIV_ROUND_UP(size, dev_desc->blksz);
+		blk_cnt = DIV_ROUND_UP(hdr->ramdisk_size, dev_desc->blksz);
+		if (!sysmem_alloc_base("ramdisk",
+				       ramdisk_addr_r,
+				       blk_cnt * dev_desc->blksz))
+			return -ENXIO;
+
+		ret = blk_dread(dev_desc, blk_start,
+				blk_cnt, (void *)ramdisk_addr_r);
+		if (ret < 0) {
+			debug("%s: read ramdisk failed, ret=%d\n",
+			      __func__, ret);
+			return ret;
+		}
+		blk_read += ret;
+	}
+
+	if ((gd->fdt_blob != (void *)fdt_addr_r) && hdr->second_size) {
+#ifdef CONFIG_RKIMG_BOOTLOADER
+		/* Rockchip AOSP, resource.img is in second position */
+		ulong fdt_size;
+
+		fdt_size = rockchip_read_dtb_file((void *)fdt_addr_r);
+		if (fdt_size < 0) {
+			printf("%s: read fdt failed\n", __func__);
+			return ret;
+		}
+
+		blk_read += DIV_ROUND_UP(fdt_size, dev_desc->blksz);
+#else
+		/* Standard AOSP, dtb is in second position */
+		ulong blk_start, blk_cnt;
+
+		size = hdr->page_size +
+		       ALIGN(hdr->kernel_size, hdr->page_size) +
+		       ALIGN(hdr->ramdisk_size, hdr->page_size);
+		blk_start = part->start + DIV_ROUND_UP(size, dev_desc->blksz);
+		blk_cnt = DIV_ROUND_UP(hdr->second_size, dev_desc->blksz);
+		if (!sysmem_alloc_base("fdt(AOSP)",
+				       fdt_addr_r,
+				       blk_cnt * dev_desc->blksz))
+			return -ENXIO;
+
+		ret = blk_dread(dev_desc, blk_start, blk_cnt, (void *)fdt_addr_r);
+		if (ret < 0) {
+			debug("%s: read dtb failed, ret=%d\n", __func__, ret);
+			return ret;
+		}
+
+		blk_read += blk_cnt;
+#endif /* CONFIG_RKIMG_BOOTLOADER */
+	}
+
+	return blk_read;
+}
+#endif /* CONFIG_ANDROID_BOOT_IMAGE_SEPARATE */
+
 long android_image_load(struct blk_desc *dev_desc,
 			const disk_partition_t *part_info,
 			unsigned long load_address,
@@ -279,6 +361,7 @@ long android_image_load(struct blk_desc *dev_desc,
 	u32 kload_addr;
 	u32 blkcnt;
 	struct andr_img_hdr *hdr;
+	__maybe_unused uint8_t vboot_flag = 0;
 
 	if (max_size < part_info->blksz)
 		return -1;
@@ -333,8 +416,43 @@ long android_image_load(struct blk_desc *dev_desc,
 		} else {
 			debug("Loading Android Image (%lu blocks) to 0x%lx... ",
 			      blk_cnt, load_address);
-			blk_read = blk_dread(dev_desc, part_info->start,
-					     blk_cnt, buf);
+
+#if defined(CONFIG_ANDROID_AVB) && defined(CONFIG_OPTEE_CLIENT)
+			if (trusty_read_vbootkey_enable_flag(&vboot_flag))
+				return -1;
+#endif
+
+#ifdef CONFIG_ANDROID_BOOT_IMAGE_SEPARATE
+			if (!vboot_flag) {
+				char *fdt_high = env_get("fdt_high");
+				char *ramdisk_high = env_get("initrd_high");
+
+				blk_read =
+				android_image_load_separate(dev_desc, hdr,
+							    part_info, buf);
+				if (blk_read > 0) {
+					if (!fdt_high) {
+						env_set_hex("fdt_high", -1UL);
+						printf("Fdt ");
+					}
+					if (!ramdisk_high) {
+						env_set_hex("initrd_high", -1UL);
+						printf("Ramdisk ");
+					}
+					if (!fdt_high || !ramdisk_high)
+						printf("skip relocation\n");
+				}
+			} else
+#endif
+			{
+				if (!sysmem_alloc_base("android",
+						       (phys_addr_t)buf,
+							blk_cnt * part_info->blksz))
+					return -ENXIO;
+
+				blk_read = blk_dread(dev_desc, part_info->start,
+						     blk_cnt, buf);
+			}
 		}
 
 		/*
@@ -354,10 +472,16 @@ long android_image_load(struct blk_desc *dev_desc,
 	free(hdr);
 	unmap_sysmem(buf);
 
+#ifndef CONFIG_ANDROID_BOOT_IMAGE_SEPARATE
 	debug("%lu blocks read: %s\n",
 	      blk_read, (blk_read == blk_cnt) ? "OK" : "ERROR");
 	if (blk_read != blk_cnt)
 		return -1;
+#else
+	debug("%lu blocks read\n", blk_read);
+	if (blk_read < 0)
+		return blk_read;
+#endif
 
 	return load_address;
 }

commit 2280fbdd62b5f8fb7a4e36053410e07d90a9a3cd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jan 14 09:54:48 2019 +0800

    rockchip: boot_rkimg: import sysmem to alloc image buffer
    
    sysmem avoids memory block overlap with each other.
    
    Change-Id: I7c705c7860a7c88b0d3672b6b4edb8cb8334654d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index f5c830358e..d6326ae933 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -15,6 +15,7 @@
 #include <asm/arch/boot_mode.h>
 #include <asm/io.h>
 #include <part.h>
+#include <sysmem.h>
 
 #define TAG_KERNEL			0x4C4E524B
 
@@ -92,6 +93,7 @@ static int read_rockchip_image(struct blk_desc *dev_desc,
 			       void *dst)
 {
 	struct rockchip_image *img;
+	const char *name;
 	int header_len = 8;
 	int cnt;
 	int ret;
@@ -99,6 +101,14 @@ static int read_rockchip_image(struct blk_desc *dev_desc,
 	u32 crc32;
 #endif
 
+	if (!strcmp((char *)part_info->name, "kernel"))
+		name = "kernel";
+	else if (!strcmp((char *)part_info->name, "boot") ||
+		 !strcmp((char *)part_info->name, "recovery"))
+		name = "ramdisk";
+	else
+		name = NULL;
+
 	img = memalign(ARCH_DMA_MINALIGN, RK_BLK_SIZE);
 	if (!img) {
 		printf("out of memory\n");
@@ -118,12 +128,17 @@ static int read_rockchip_image(struct blk_desc *dev_desc,
 		goto err;
 	}
 
-	memcpy(dst, img->image, RK_BLK_SIZE - header_len);
 	/*
 	 * read the rest blks
 	 * total size  = image size + 8 bytes header + 4 bytes crc32
 	 */
 	cnt = DIV_ROUND_UP(img->size + 8 + 4, RK_BLK_SIZE);
+	if (!sysmem_alloc_base(name, (phys_addr_t)dst, cnt * dev_desc->blksz)) {
+		ret = -ENXIO;
+		goto err;
+	}
+
+	memcpy(dst, img->image, RK_BLK_SIZE - header_len);
 	ret = blk_dread(dev_desc, part_info->start + 1, cnt - 1,
 			dst + RK_BLK_SIZE - header_len);
 	if (ret != (cnt - 1)) {
@@ -466,6 +481,9 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 	printf("fdt	 @ 0x%08lx (0x%08x)\n", fdt_addr_r, fdt_totalsize(fdt_addr_r));
 	printf("kernel   @ 0x%08lx (0x%08x)\n", kernel_addr_r, kernel_size);
 	printf("ramdisk  @ 0x%08lx (0x%08x)\n", ramdisk_addr_r, ramdisk_size);
+
+	sysmem_dump_check();
+
 #if defined(CONFIG_ARM64)
 	char cmdbuf[64];
 	sprintf(cmdbuf, "booti 0x%lx 0x%lx:0x%x 0x%lx",

commit 98662298415ad4c67e6cca7d1d6270167eecb26a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 16 10:02:00 2019 +0800

    rockchip: boot_rkimg: add descrption for reloading kernel dtb
    
    "gd->fdt_blob != (void *)fdt_addr_r" makes users confused, let's
    add some descrption.
    
    Change-Id: I3ffe6c26892e99af4183eebcfb3c27ed1bdea38a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 923e77a021..f5c830358e 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -445,6 +445,15 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 		ramdisk_size = 0;
 	}
 
+	/*
+	 * When it happens ?
+	 *
+	 * 1. CONFIG_USING_KERNEL_DTB is disabled, so we should load kenrel dtb;
+	 *
+	 * 2. Even CONFIG_USING_KERNEL_DTB is enabled, if we load kernel dtb
+	 *    failed due to some reason before here, and then we fix it and run
+	 *    cmd "bootrkp" try to boot system again, we should reload fdt here.
+	 */
 	if (gd->fdt_blob != (void *)fdt_addr_r) {
 		fdt_size = rockchip_read_dtb_file((void *)fdt_addr_r);
 		if (fdt_size < 0) {

commit 6bc040a32c1f40b1a49e9f696883c359d6a5f897
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 23 15:13:26 2019 +0800

    rockchip: resource: import sysmem to alloc fdt buffer
    
    sysmem avoids memory block overlap with each other.
    
    Change-Id: I0013c3d05c69e19286cf1c76f936a17eaab1db49
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 6d9d434a2f..27be5249a5 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -7,6 +7,7 @@
 #include <adc.h>
 #include <asm/io.h>
 #include <malloc.h>
+#include <sysmem.h>
 #include <linux/list.h>
 #include <asm/arch/resource_img.h>
 #include <boot_rkimg.h>
@@ -615,7 +616,7 @@ int rockchip_read_dtb_file(void *fdt_addr)
 	struct resource_file *file;
 	struct list_head *node;
 	char *dtb_name = DTB_FILE;
-	int ret;
+	int ret, size;
 
 	if (list_empty(&entrys_head))
 		init_resource_list(NULL);
@@ -639,6 +640,14 @@ int rockchip_read_dtb_file(void *fdt_addr)
 
 	printf("DTB: %s\n", dtb_name);
 
+	size = rockchip_get_resource_file_size((void *)fdt_addr, dtb_name);
+	if (size < 0)
+		return size;
+
+	if (!sysmem_alloc_base("fdt", (phys_addr_t)fdt_addr,
+			       ALIGN(size, RK_BLK_SIZE)))
+		return -ENOMEM;
+
 	ret = rockchip_read_resource_file((void *)fdt_addr, dtb_name, 0, 0);
 	if (ret < 0)
 		return ret;

commit 4ec36d68392b3847dcaa1fdc6549e67436fa248b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jan 14 11:07:46 2019 +0800

    rockchip: resource: add interface to get resource file size
    
    clean up code and add comment for other interfaces.
    
    Change-Id: Ibc64978d8db595c4fe76432faca77cdad9c949e6
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/resource_img.h b/arch/arm/include/asm/arch-rockchip/resource_img.h
index b90ae272de..ca3399087d 100644
--- a/arch/arm/include/asm/arch-rockchip/resource_img.h
+++ b/arch/arm/include/asm/arch-rockchip/resource_img.h
@@ -8,15 +8,43 @@
 #define __RESC_IMG_H_
 
 /*
- * read file from resource partition
- * @buf: destination buf to store file data;
+ * rockchip_read_resource_file - read file from resource partition
+ *
+ * @buf: destination buf to store file data
  * @name: file name
  * @offset: blocks offset in the file, 1 block = 512 bytes
  * @len: the size(by bytes) of file to read.
+ *
+ * return negative num on failed, otherwise the file size
+ */
+int rockchip_read_resource_file(void *buf, const char *name, int offset, int len);
+
+/*
+ * rockchip_get_resource_file_offset() - read file offset of partition
+ *
+ * @resc_img_hdr: resource file hdr
+ * @name: file name
+ *
+ * @return negative on error, otherwise file offset
+ */
+int rockchip_get_resource_file_offset(void *resc_hdr, const char *name);
+
+/*
+ * rockchip_get_resource_file_size() - read file size
+ *
+ * @resc_img_hdr: resource file hdr
+ * @name: file name
+ *
+ * @return negative on error, otherwise file size
  */
-int rockchip_read_resource_file(void *buf, const char *name,
-				int offset, int len);
-int rockchip_get_resource_file(void *buf, const char *name);
+int rockchip_get_resource_file_size(void *resc_hdr, const char *name);
 
+/*
+ * rockchip_get_resource_file_size() - read file size
+ *
+ * @fdt_addr: destination buf to store dtb file
+ *
+ * @return 0 on success, othwise on error
+ */
 int rockchip_read_dtb_file(void *fdt_addr);
 #endif
diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 8f08462820..6d9d434a2f 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -326,15 +326,28 @@ static struct resource_file *get_file_info(struct resource_img_hdr *hdr,
 	return NULL;
 }
 
-int rockchip_get_resource_file(void *buf, const char *name)
+int rockchip_get_resource_file_offset(void *resc_hdr, const char *name)
 {
 	struct resource_file *file;
 
-	file = get_file_info(buf, name);
+	file = get_file_info(resc_hdr, name);
+	if (!file)
+		return -ENFILE;
 
 	return file->f_offset;
 }
 
+int rockchip_get_resource_file_size(void *resc_hdr, const char *name)
+{
+	struct resource_file *file;
+
+	file = get_file_info(resc_hdr, name);
+	if (!file)
+		return -ENFILE;
+
+	return file->f_size;
+}
+
 /*
  * read file from resource partition
  * @buf: destination buf to store file data;

commit 6929f85b1356ec8ebab788a0ddc6370ab37bb438
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Jan 13 19:05:14 2019 +0800

    rockchip: board: implement board_sysmem_reserve()
    
    sysmem provides a mechanism to avoid memory block overlap with
    each other.
    
    Change-Id: I84796f4fd5b06283ca23e0ec9da9d0421701a957
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 9298efabc7..4f080f3e01 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -9,6 +9,7 @@
 #include <debug_uart.h>
 #include <ram.h>
 #include <syscon.h>
+#include <sysmem.h>
 #include <asm/io.h>
 #include <asm/arch/vendor.h>
 #include <misc.h>
@@ -17,6 +18,7 @@
 #include <asm/arch/periph.h>
 #include <asm/arch/boot_mode.h>
 #include <asm/arch/rk_atags.h>
+#include <asm/arch/param.h>
 #ifdef CONFIG_DM_CHARGE_DISPLAY
 #include <power/charge_display.h>
 #endif
@@ -199,6 +201,11 @@ int init_kernel_dtb(void)
 
 	gd->fdt_blob = (void *)fdt_addr;
 
+	/* Reserve 'reserved-memory' */
+	ret = boot_fdt_add_sysmem_rsv_regions((void *)gd->fdt_blob);
+	if (ret)
+		return ret;
+
 	return 0;
 }
 #endif
@@ -343,6 +350,34 @@ void board_lmb_reserve(struct lmb *lmb)
 }
 #endif
 
+#ifdef CONFIG_SYSMEM
+int board_sysmem_reserve(struct sysmem *sysmem)
+{
+	struct sysmem_property prop;
+	int ret;
+
+	/* ATF */
+	prop = param_parse_atf_mem();
+	ret = sysmem_reserve(prop.name, prop.base, prop.size);
+	if (ret)
+		return ret;
+
+	/* PSTORE/ATAGS/SHM */
+	prop = param_parse_common_resv_mem();
+	ret = sysmem_reserve(prop.name, prop.base, prop.size);
+	if (ret)
+		return ret;
+
+	/* OP-TEE */
+	prop = param_parse_optee_mem();
+	ret = sysmem_reserve(prop.name, prop.base, prop.size);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+#endif
+
 #if defined(CONFIG_ROCKCHIP_PRELOADER_SERIAL) && \
     defined(CONFIG_ROCKCHIP_PRELOADER_ATAGS)
 int board_init_f_init_serial(void)

commit 4892a977d76d1adda3469bf654890b840252287f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Jan 13 19:48:19 2019 +0800

    rockchip: board: fix compile warning when atags is disabled
    
    Change-Id: I494f06a715bf7b40c7f56a5ce3aabe1c63ee9bb0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 230a1e2302..9298efabc7 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -282,8 +282,10 @@ int board_fdt_fixup(void *blob)
 
 void board_quiesce_devices(void)
 {
+#ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
 	/* Destroy atags makes next warm boot safer */
 	atags_destroy();
+#endif
 }
 
 void enable_caches(void)
@@ -341,7 +343,8 @@ void board_lmb_reserve(struct lmb *lmb)
 }
 #endif
 
-#ifdef CONFIG_ROCKCHIP_PRELOADER_SERIAL
+#if defined(CONFIG_ROCKCHIP_PRELOADER_SERIAL) && \
+    defined(CONFIG_ROCKCHIP_PRELOADER_ATAGS)
 int board_init_f_init_serial(void)
 {
 	struct tag *t = atags_get_tag(ATAG_SERIAL);

commit 7c015044fd16e963ffed4228855ddd1329573c49
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Jan 13 19:47:31 2019 +0800

    rockchip: boot_mode: use param_parse_bootdev() to get bootdev
    
    Change-Id: I735471aa89502acfc647dbeeb4d487f1001ccad7
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index 3261d0f65c..072e69e48e 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -8,7 +8,7 @@
 #include <adc.h>
 #include <asm/io.h>
 #include <asm/arch/boot_mode.h>
-#include <asm/arch/rk_atags.h>
+#include <asm/arch/param.h>
 #include <cli.h>
 #include <dm.h>
 #include <fdtdec.h>
@@ -98,77 +98,29 @@ void boot_devtype_init(void)
 	if (done)
 		return;
 
-	/*
-	 * New way: get bootdev from preloader atags info.
-	 */
-#ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
-	struct tag *t;
-
-	t = atags_get_tag(ATAG_BOOTDEV);
-	if (t) {
+	ret = param_parse_bootdev(&devtype, &devnum);
+	if (!ret) {
 		atags_en = 1;
-		switch (t->u.bootdev.devtype) {
-		case BOOT_TYPE_EMMC:
-			devtype = "mmc";
-			devnum = "0";
-			break;
-		case BOOT_TYPE_SD0:
-		case BOOT_TYPE_SD1:
-			devtype = "mmc";
-			devnum = "1";
-			break;
-		case BOOT_TYPE_NAND:
-			devtype = "rknand";
-			devnum = "0";
-			break;
-		case BOOT_TYPE_SPI_NAND:
-			devtype = "spinand";
-			devnum = "0";
-			break;
-		case BOOT_TYPE_SPI_NOR:
-			devtype = "spinor";
-			devnum = "1";
-			break;
-		case BOOT_TYPE_RAM:
-			devtype = "ramdisk";
-			devnum = "0";
-			break;
-		default:
-			printf("Unknown bootdev type: 0x%x\n",
-			       t->u.bootdev.devtype);
-			goto fallback;
-		}
-	}
-
-	debug("%s: Get bootdev from atags: %s %s\n", __func__, devtype, devnum);
-
-	if (devtype && devnum) {
 		env_set("devtype", devtype);
 		env_set("devnum", devnum);
 #ifdef CONFIG_DM_MMC
 		if (!strcmp("mmc", devtype))
 			mmc_initialize(gd->bd);
 #endif
-		goto finish;
-	}
-#endif
-
-	/*
-	 * Legacy way: get bootdev by going through all boot media.
-	 */
-fallback:
+	} else {
 #ifdef CONFIG_DM_MMC
-	mmc_initialize(gd->bd);
+		mmc_initialize(gd->bd);
 #endif
-	ret = run_command_list(devtype_num_set, -1, 0);
-	if (ret) {
-		/* Set default dev type/num if command not valid */
-		devtype = "mmc";
-		devnum = "0";
-		env_set("devtype", devtype);
-		env_set("devnum", devnum);
+		ret = run_command_list(devtype_num_set, -1, 0);
+		if (ret) {
+			/* Set default dev type/num if command not valid */
+			devtype = "mmc";
+			devnum = "0";
+			env_set("devtype", devtype);
+			env_set("devnum", devnum);
+		}
 	}
-finish:
+
 	done = 1;
 	printf("Bootdev%s: %s %s\n", atags_en ? "(atags)" : "",
 	       env_get("devtype"), env_get("devnum"));

commit f0a9765fb1ddd7f7deb7e1309ff57b3695f39e4f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Jan 13 19:50:49 2019 +0800

    rockchip: sdram: use common interface to get atf/optee memory info.
    
    using param_parse_atf_mem() and param_parse_optee_mem().
    
    Change-Id: I0d42f80ea4bac61efdc38a0be97c3f416ce90622
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
index e85e5b4130..b0e1e4cf6e 100644
--- a/arch/arm/mach-rockchip/sdram_common.c
+++ b/arch/arm/mach-rockchip/sdram_common.c
@@ -8,6 +8,7 @@
 #include <dm.h>
 #include <ram.h>
 #include <asm/io.h>
+#include <asm/arch/param.h>
 #include <asm/arch/rk_atags.h>
 #include <asm/arch/sdram_common.h>
 #include <dm/uclass-internal.h>
@@ -16,113 +17,26 @@ DECLARE_GLOBAL_DATA_PTR;
 #define PARAM_DRAM_INFO_OFFSET 0x2000000
 #define TRUST_PARAMETER_OFFSET    (34 * 1024 * 1024)
 
-struct tos_parameter_t {
-	u32 version;
-	u32 checksum;
-	struct {
-		char name[8];
-		s64 phy_addr;
-		u32 size;
-		u32 flags;
-	}tee_mem;
-	struct {
-		char name[8];
-		s64 phy_addr;
-		u32 size;
-		u32 flags;
-	}drm_mem;
-	s64 reserve[8];
-};
-
 #if defined(CONFIG_SPL_FRAMEWORK) || !defined(CONFIG_SPL_OF_PLATDATA)
-static uint16_t trust_checksum(const uint8_t *buf, uint16_t len)
-{
-	uint16_t i;
-	uint16_t checksum = 0;
-
-	for (i = 0; i < len; i++) {
-		if (i % 2)
-			checksum += buf[i] << 8;
-		else
-			checksum += buf[i];
-	}
-	checksum = ~checksum;
-
-	return checksum;
-}
 
 #define SDRAM_OFFSET(offset)	(CONFIG_SYS_SDRAM_BASE + (offset))
 #define NOT_INITIAL		-1
 static int __dram_init_banksize(int resv_tee)
 {
+	struct sysmem_property prop;
 	size_t top = min((unsigned long)(gd->ram_size + CONFIG_SYS_SDRAM_BASE),
 			 gd->ram_top);
 	u64 start[CONFIG_NR_DRAM_BANKS], size[CONFIG_NR_DRAM_BANKS];
-	u64 tos_addr = 0, atf_addr = 0;
-	u64 tos_size = 0, atf_size = 0;
-	u32 checksum, i;
-	int idx = NOT_INITIAL;
-	struct tos_parameter_t *tos_parameter;
-#ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
-	struct tag *t = NULL;
-
-	/*
-	 * Get memory region of ATF
-	 *
-	 * 1. New way: atags info;
-	 * 2. Leagcy way: 2MB size and start from ddr 0x0 offset;
-	 */
-	t = atags_get_tag(ATAG_ATF_MEM);
-	if (t && t->u.atf_mem.size) {
-		atf_addr = t->u.atf_mem.phy_addr;
-		atf_size = t->u.atf_mem.size;
-		/* Sanity */
-		if (atf_addr + atf_size > SDRAM_OFFSET(SZ_1M)) {
-			printf("%s: ATF reserved region is not within 0-1MB offset(0x%08llx-0x%08llx)!\n",
-			       __func__, atf_addr, atf_addr + atf_size);
-			return -EINVAL;
-		}
-	}
-
-	/*
-	 * Get memory region of OP-TEE
-	 *
-	 * 1. New way: atags info;
-	 * 2. Leagcy way: info in ddr 34M offset;
-	 */
-	t = atags_get_tag(ATAG_TOS_MEM);
-	if (t && (t->u.tos_mem.tee_mem.flags == 1)) {
-		tos_addr = t->u.tos_mem.tee_mem.phy_addr;
-		tos_size = t->u.tos_mem.tee_mem.size;
-	}
-#endif
-
-	/* Legacy */
-	if (!atf_size) {
-		if (IS_ENABLED(CONFIG_ARM64) ||
-		    IS_ENABLED(CONFIG_ARM64_BOOT_AARCH32)) {
-			atf_addr = SDRAM_OFFSET(0);
-			atf_size = SZ_1M;
-		}
-	}
-
-	/* Legacy */
-	if (!tos_size) {
-		tos_parameter =
-		(struct tos_parameter_t *)(SDRAM_OFFSET(TRUST_PARAMETER_OFFSET));
-		checksum =
-		trust_checksum((uint8_t *)(unsigned long)tos_parameter + 8,
-				sizeof(struct tos_parameter_t) - 8);
-		if ((checksum == tos_parameter->checksum) &&
-		    (tos_parameter->tee_mem.flags == 1)) {
-			tos_addr = tos_parameter->tee_mem.phy_addr;
-			tos_size = tos_parameter->tee_mem.size;
-			gd->flags |= GD_FLG_BL32_ENABLED;
-		}
-	}
-
-	debug("ATF: 0x%llx - 0x%llx\n", atf_addr, atf_addr + atf_size);
-	debug("TOS: 0x%llx - 0x%llx\n", tos_addr, tos_addr + tos_size);
+	u64 tos_addr, atf_addr;
+	u64 tos_size, atf_size;
+	int i, idx = NOT_INITIAL;
+
+	prop = param_parse_atf_mem();
+	atf_addr = prop.base;
+	atf_size = prop.size;
+	prop = param_parse_optee_mem();
+	tos_addr = prop.base;
+	tos_size = prop.size;
 
 	/*
 	 * Reserve region for ATF bl31

commit dbf8423e3707ad742e7c65cc402e8a6c8972a9df
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Jan 13 18:59:41 2019 +0800

    rockchip: add platform param parse interface to param.c
    
    parse: atf/optee/bootdev and common reserved memory.
    
    Change-Id: I829eb42370b217e567cdafe03de4dab6063aa251
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/param.h b/arch/arm/include/asm/arch-rockchip/param.h
new file mode 100644
index 0000000000..66ba2ac22e
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/param.h
@@ -0,0 +1,43 @@
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __ROCKCHIP_PARAM_H_
+#define __ROCKCHIP_PARAM_H_
+
+#include <sysmem.h>
+
+/**
+ * param_parse_atf_mem() - Parse atf memory region
+ *
+ * @return sysmem_property structure which contains base and size info.
+ */
+struct sysmem_property param_parse_atf_mem(void);
+
+/**
+ * param_parse_atf_mem() - Parse op-tee memory region
+ *
+ * @return sysmem_property structure which contains base and size info.
+ */
+struct sysmem_property param_parse_optee_mem(void);
+
+/**
+ * param_parse_atf_mem() - Parse platform common reserved memory region
+ *
+ * @return sysmem_property structure which contains base and size info.
+ */
+struct sysmem_property param_parse_common_resv_mem(void);
+
+/**
+ * param_parse_bootdev() - Parse boot device info.
+ *
+ * @devtype: out data to store dev type
+ * @devnum: out data to store dev number
+ *
+ * @return 0 on success, otherwise failed.
+ */
+int param_parse_bootdev(char **devtype, char **devtnum);
+
+#endif
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 98351b7ac6..33618ae6ca 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -32,6 +32,7 @@ obj-$(CONFIG_ROCKCHIP_RESOURCE_IMAGE) += resource_img.o
 obj-$(CONFIG_ROCKCHIP_DEBUGGER) += rockchip_debugger.o
 endif
 
+obj-$(CONFIG_$(SPL_TPL_)RAM) += param.o
 obj-$(CONFIG_$(SPL_TPL_)RAM) += sdram_common.o
 
 obj-$(CONFIG_ROCKCHIP_PX30) += px30/
diff --git a/arch/arm/mach-rockchip/param.c b/arch/arm/mach-rockchip/param.c
new file mode 100644
index 0000000000..148899298e
--- /dev/null
+++ b/arch/arm/mach-rockchip/param.c
@@ -0,0 +1,196 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/rk_atags.h>
+#include <asm/arch/param.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define SDRAM_OFFSET(offset)		(CONFIG_SYS_SDRAM_BASE + (offset))
+#define PARAM_DRAM_INFO_OFFSET		(SZ_32M)
+#define PARAM_OPTEE_INFO_OFFSET		(SZ_32M + SZ_2M)
+
+struct tos_param_t {
+	u32 version;
+	u32 checksum;
+	struct {
+		char name[8];
+		s64 phy_addr;
+		u32 size;
+		u32 flags;
+	} tee_mem;
+	struct {
+		char name[8];
+		s64 phy_addr;
+		u32 size;
+		u32 flags;
+	} drm_mem;
+	s64 reserve[8];
+};
+
+static uint16_t trust_checksum(const uint8_t *buf, uint16_t len)
+{
+	uint16_t i, checksum = 0;
+
+	for (i = 0; i < len; i++) {
+		if (i % 2)
+			checksum += buf[i] << 8;
+		else
+			checksum += buf[i];
+	}
+	checksum = ~checksum;
+
+	return checksum;
+}
+
+struct sysmem_property param_parse_atf_mem(void)
+{
+	struct sysmem_property prop;
+
+	prop.name = "ATF";
+	prop.base = 0;
+	prop.size = 0;
+
+#ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
+	struct tag *t = NULL;
+
+	/*
+	 * Get memory region of ATF
+	 *
+	 * 1. New way: atags info;
+	 * 2. Leagcy way: 2MB size and start from ddr 0x0 offset;
+	 */
+	t = atags_get_tag(ATAG_ATF_MEM);
+	if (t && t->u.atf_mem.size) {
+		prop.base = t->u.atf_mem.phy_addr;
+		prop.size = t->u.atf_mem.size;
+		/* Sanity */
+		if (prop.base + prop.size > SDRAM_OFFSET(SZ_1M)) {
+			printf("%s: ATF reserved region is not within 0-1MB "
+			       "offset(0x%08llx-0x%08llx)!\n",
+			       __func__, (u64)prop.base, (u64)prop.base + prop.size);
+			return prop;
+		}
+	}
+#endif
+
+	/* Legacy */
+	if (!prop.size) {
+		if (IS_ENABLED(CONFIG_ARM64) ||
+		    IS_ENABLED(CONFIG_ARM64_BOOT_AARCH32)) {
+			prop.base = SDRAM_OFFSET(0);
+			prop.size = SZ_1M;
+		}
+	}
+
+	debug("ATF: 0x%llx - 0x%llx\n", (u64)prop.base, (u64)prop.base + prop.size);
+
+	return prop;
+}
+
+struct sysmem_property param_parse_optee_mem(void)
+{
+	struct tos_param_t *tos_parameter;
+	struct sysmem_property prop;
+	u32 checksum;
+
+	prop.name = "OP-TEE";
+	prop.base = 0;
+	prop.size = 0;
+
+#ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
+	struct tag *t = NULL;
+
+	/*
+	 * Get memory region of OP-TEE
+	 *
+	 * 1. New way: atags info;
+	 * 2. Leagcy way: info in ddr 34M offset;
+	 */
+	t = atags_get_tag(ATAG_TOS_MEM);
+	if (t && (t->u.tos_mem.tee_mem.flags == 1)) {
+		prop.base = t->u.tos_mem.tee_mem.phy_addr;
+		prop.size = t->u.tos_mem.tee_mem.size;
+	}
+#endif
+
+	/* Legacy */
+	if (!prop.size) {
+		tos_parameter =
+		(struct tos_param_t *)(SDRAM_OFFSET(PARAM_OPTEE_INFO_OFFSET));
+		checksum =
+		trust_checksum((uint8_t *)(unsigned long)tos_parameter + 8,
+			       sizeof(struct tos_param_t) - 8);
+		if ((checksum == tos_parameter->checksum) &&
+		    (tos_parameter->tee_mem.flags == 1)) {
+			prop.base = tos_parameter->tee_mem.phy_addr;
+			prop.size = tos_parameter->tee_mem.size;
+			gd->flags |= GD_FLG_BL32_ENABLED;
+		}
+	}
+
+	debug("TOS: 0x%llx - 0x%llx\n", (u64)prop.base, (u64)prop.base + prop.size);
+
+	return prop;
+}
+
+struct sysmem_property param_parse_common_resv_mem(void)
+{
+	struct sysmem_property prop;
+
+	prop.name = "PSTORE/ATAGS/SHM";
+	prop.base = SDRAM_OFFSET(SZ_1M);
+	prop.size = SZ_1M;
+
+	return prop;
+}
+
+int param_parse_bootdev(char **devtype, char **devnum)
+{
+#ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
+	struct tag *t;
+
+	t = atags_get_tag(ATAG_BOOTDEV);
+	if (t) {
+		switch (t->u.bootdev.devtype) {
+		case BOOT_TYPE_EMMC:
+			*devtype = "mmc";
+			*devnum = "0";
+			break;
+		case BOOT_TYPE_SD0:
+		case BOOT_TYPE_SD1:
+			*devtype = "mmc";
+			*devnum = "1";
+			break;
+		case BOOT_TYPE_NAND:
+			*devtype = "rknand";
+			*devnum = "0";
+			break;
+		case BOOT_TYPE_SPI_NAND:
+			*devtype = "spinand";
+			*devnum = "0";
+			break;
+		case BOOT_TYPE_SPI_NOR:
+			*devtype = "spinor";
+			*devnum = "1";
+			break;
+		case BOOT_TYPE_RAM:
+			*devtype = "ramdisk";
+			*devnum = "0";
+			break;
+		default:
+			printf("Unknown bootdev type: 0x%x\n",
+			       t->u.bootdev.devtype);
+			return -EINVAL;
+		}
+
+		return 0;
+	}
+#endif
+
+	return -ENOSYS;
+}

commit a384e3f1db7b79dabd230c03da4b4813d8e92ac6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Jan 13 19:15:47 2019 +0800

    common: image-fdt: add boot_fdt_add_sysmem_rsv_regions()
    
    It reserves fdt reserved memory for sysmem.
    
    Change-Id: I7ce1be9bd25a3609bc6dabdc265addbd2571076c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/image-fdt.c b/common/image-fdt.c
index c092675f4a..6bdbe6c902 100644
--- a/common/image-fdt.c
+++ b/common/image-fdt.c
@@ -17,6 +17,7 @@
 #include <linux/libfdt.h>
 #include <mapmem.h>
 #include <asm/io.h>
+#include <sysmem.h>
 
 #ifndef CONFIG_SYS_FDT_PAD
 #define CONFIG_SYS_FDT_PAD 0x3000
@@ -121,6 +122,65 @@ void boot_fdt_add_mem_rsv_regions(struct lmb *lmb, void *fdt_blob)
 	}
 }
 
+#ifdef CONFIG_SYSMEM
+/**
+ * boot_fdt_add_mem_rsv_regions - Mark the memreserve sections as unusable
+ * @sysmem: pointer to sysmem handle, will be used for memory mgmt
+ * @fdt_blob: pointer to fdt blob base address
+ */
+int boot_fdt_add_sysmem_rsv_regions(void *fdt_blob)
+{
+	uint64_t addr, size;
+	int i, total;
+	int rsv_offset, offset;
+	fdt_size_t rsv_size;
+	fdt_addr_t rsv_addr;
+	static int rsv_done;
+	char resvname[32];
+	int ret;
+
+	if (fdt_check_header(fdt_blob) != 0 || rsv_done)
+		return -EINVAL;
+
+	rsv_done = 1;
+
+	total = fdt_num_mem_rsv(fdt_blob);
+	for (i = 0; i < total; i++) {
+		if (fdt_get_mem_rsv(fdt_blob, i, &addr, &size) != 0)
+			continue;
+		debug("   sysmem: reserving fdt memory region: addr=%llx size=%llx\n",
+		      (unsigned long long)addr, (unsigned long long)size);
+		sprintf(resvname, "fdt-memory-reserved%d", i);
+		ret = sysmem_reserve(resvname, addr, size);
+		if (ret)
+			return ret;
+	}
+
+	rsv_offset = fdt_subnode_offset(fdt_blob, 0, "reserved-memory");
+	if (rsv_offset == -FDT_ERR_NOTFOUND)
+		return -EINVAL;
+
+	for (offset = fdt_first_subnode(fdt_blob, rsv_offset);
+	     offset >= 0;
+	     offset = fdt_next_subnode(fdt_blob, offset)) {
+		rsv_addr = fdtdec_get_addr_size_auto_noparent(fdt_blob, offset,
+							      "reg", 0,
+							      &rsv_size, false);
+		if (rsv_addr == FDT_ADDR_T_NONE || !rsv_size)
+			continue;
+		debug("  sysmem: 'reserved-memory' %s: addr=%llx size=%llx\n",
+		      fdt_get_name(fdt_blob, offset, NULL),
+		      (unsigned long long)rsv_addr, (unsigned long long)rsv_size);
+		ret = sysmem_reserve(fdt_get_name(fdt_blob, offset, NULL),
+				     rsv_addr, rsv_size);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+#endif
+
 /**
  * boot_relocate_fdt - relocate flat device tree
  * @lmb: pointer to lmb handle, will be used for memory mgmt
diff --git a/include/image.h b/include/image.h
index 7b2e314974..8daffcceee 100644
--- a/include/image.h
+++ b/include/image.h
@@ -691,6 +691,9 @@ int boot_get_fdt(int flag, int argc, char * const argv[], uint8_t arch,
 		 bootm_headers_t *images,
 		 char **of_flat_tree, ulong *of_size);
 void boot_fdt_add_mem_rsv_regions(struct lmb *lmb, void *fdt_blob);
+#ifdef CONFIG_SYSMEM
+int boot_fdt_add_sysmem_rsv_regions(void *fdt_blob);
+#endif
 int boot_relocate_fdt(struct lmb *lmb, char **of_flat_tree, ulong *of_size);
 
 int boot_ramdisk_high(struct lmb *lmb, ulong rd_data, ulong rd_len,

commit 322222b25318f2f78f2c7dcf06f369f2fdbeacac
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jan 14 10:59:49 2019 +0800

    common: board_r: add sysmem init
    
    setup right after malloc init done.
    
    Change-Id: I6dbf55d825d0b03ed2cc64f2dab0a7331ce56228
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/board_r.c b/common/board_r.c
index 006c5d6781..f8db94c9af 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -55,6 +55,7 @@
 #include <linux/compiler.h>
 #include <linux/err.h>
 #include <efi_loader.h>
+#include <sysmem.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -766,6 +767,9 @@ static init_fnc_t init_sequence_r[] = {
 #endif
 	initr_barrier,
 	initr_malloc,
+#ifdef CONFIG_SYSMEM
+	sysmem_init,		/* After malloc setup */
+#endif
 	log_init,
 	initr_bootstage,	/* Needs malloc() but has its own timer */
 	initr_console_record,

commit ffa8f8b76ea89ab65082d036dfb58c7fb136d861
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Jan 13 17:56:44 2019 +0800

    lib: introduce sysmem for permanent memory management
    
    U-Boot provides MALLOC for runtime temporary memory management and
    LMB for bootm memory management. There is not a mechanism for permanent
    memory management. so that the memory blocks are easy to overlap with
    each other.
    
    What does permanent memory mean ?
     - The memory can't be touched by U-Boot(ATF/OPTEE/SHM/kernel-reserved, etc);
     - The memory occupied even in kernel, such as some firmware load buffer;
    
    This patch introduces sysmem to do permanent memory management, which
    implements base on LMB. It provides memory block (pool):
     - init;
     - add;
     - alloc;
     - free;
     - reserve;
     - stat;
     - overflow check;
    
    Here is an example for RK3399 sysmem boot stat(assume the "fdt" region is Overflow)
    called by sysmem_dump_all():
    
    sysmem_dump_all:
        ------------------------------------------------------
        memory.rgn[0].base     = 0x00000000
                     .size     = 0x00000000
        memory.rgn[1].base     = 0x00200000
                     .size     = 0x08200000
        memory.rgn[2].base     = 0x0a200000
                     .size     = 0x75e00000
    
        memory.total           = 0x7e000000 (2016 MiB. 0 KiB)
        ------------------------------------------------------
        reserved.rgn[0].name   = "ATF"
                       .base   = 0x00000000
                       .size   = 0x00100000
        reserved.rgn[1].name   = "PSTORE/ATAGS/SHM"
                       .base   = 0x00100000
                       .size   = 0x00100000
        reserved.rgn[2].name   = "OP-TEE"
                       .base   = 0x08400000
                       .size   = 0x01e00000
        reserved.rgn[3].name   = "U-Boot"
                       .base   = 0x71be03c0
                       .size   = 0x0e41fc40
        reserved.rgn[4].name   = "secure-memory@20000000"
                       .base   = 0x20000000
                       .size   = 0x10000000
    
        reserved.total         = 0x2041fc40 (516 MiB. 127 KiB)
        ------------------------------------------------------
        allocated.rgn[0].name  = "fdt"      (Overflow)
                        .base  = 0x01f00000
                        .size  = 0x00009704
        allocated.rgn[1].name  = "kernel"
                        .base  = 0x0027c000
                        .size  = 0x0129da04
        allocated.rgn[2].name  = "ramdisk"
                        .base  = 0x0a200000
                        .size  = 0x001e6c04
    
        allocated.total        = 0x0148dd0c (20 MiB. 567 KiB)
        ------------------------------------------------------
        LMB.reserved[0].base   = 0x00000000
                       .size   = 0x00200000
        LMB.reserved[1].base   = 0x0027c000
                       .size   = 0x0129da04
        LMB.reserved[2].base   = 0x01f00000
                       .size   = 0x00009704
        LMB.reserved[3].base   = 0x08400000
                       .size   = 0x01fe6c04
        LMB.reserved[4].base   = 0x20000000
                       .size   = 0x10000000
        LMB.reserved[5].base   = 0x71be03c0
                       .size   = 0x0e41fc40
    
        reserved.core.total    = 0x218ad94c (536 MiB. 694 KiB)
        ------------------------------------------------------
    
    Change-Id: If63b7abed2cdd3c054719511fcceed733ddf606d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/sysmem.h b/include/sysmem.h
new file mode 100644
index 0000000000..308b8e2653
--- /dev/null
+++ b/include/sysmem.h
@@ -0,0 +1,148 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _SYSMEM_H
+#define _SYSMEM_H
+
+#include <asm/types.h>
+
+#define	MAX_SYSMEM_REGIONS		64
+
+#undef	MAX_LMB_REGIONS
+#define	MAX_LMB_REGIONS			MAX_SYSMEM_REGIONS
+
+struct sysmem_property {
+	const char *name;
+	phys_addr_t base;
+	phys_size_t size;
+	struct list_head node;
+};
+
+struct sysmem {
+	struct lmb lmb;
+	struct list_head allocated_head;
+	struct list_head reserved_head;
+	ulong allocated_cnt;
+	bool has_init;
+};
+
+/**
+ * sysmem_init() - Sysmem initialization
+ *
+ * @return 0 on success, otherwise error
+ */
+int sysmem_init(void);
+
+/**
+ * sysmem_add() - Add sysmem region
+ *
+ * @base: region base address
+ * @size: region size
+ *
+ * @return 0 on success, otherwise error
+ */
+int sysmem_add(phys_addr_t base, phys_size_t size);
+
+/**
+ * sysmem_reserve() - Reserve sysmem region
+ *
+ * @name: region name
+ * @base: region base address
+ * @size: region size
+ *
+ * @return 0 on success, otherwise error
+ */
+int sysmem_reserve(const char *name, phys_addr_t base, phys_size_t size);
+
+/**
+ * sysmem_alloc() - Alloc sysmem region at anywhere
+ *
+ * @name: region name
+ * @size: region size
+ *
+ * @return NULL on error, otherwise the allocated region address ptr
+ */
+void *sysmem_alloc(const char *name, phys_size_t size);
+
+/**
+ * sysmem_alloc_align() - Alloc sysmem region at anywhere with addr align down
+ *
+ * @name: region name
+ * @size: region size
+ * @align: region base address align (down)
+ *
+ * @return NULL on error, otherwise the allocated region address ptr
+ */
+void *sysmem_alloc_align(const char *name, phys_size_t size, ulong align);
+
+/**
+ * sysmem_alloc_base() - Alloc sysmem region at the expect addr
+ *
+ * @name: region name
+ * @base: region base
+ * @size: region size
+ *
+ * @return NULL on error, otherwise the allocated region address ptr
+ */
+void *sysmem_alloc_base(const char *name, phys_addr_t base, phys_size_t size);
+
+/**
+ * sysmem_alloc_align_base() - Alloc sysmem region at the expect addr with align down
+ *
+ * @name: region name
+ * @base: region base
+ * @size: region size
+ * @align: region base address align (down)
+ *
+ * @return NULL on error, otherwise the allocated region address ptr
+ */
+void *sysmem_alloc_align_base(const char *name, phys_addr_t base,
+			      phys_size_t size, ulong align);
+
+/**
+ * sysmem_free() - Free sysmem region
+ *
+ * @base: region base
+ *
+ * @return 0 on success, otherwise error
+ */
+int sysmem_free(phys_addr_t base);
+
+/**
+ * sysmem_check() - Check sysmem regions
+ *
+ * @return 0 on okay, otherwise something wrong
+ */
+int sysmem_check(void);
+
+/**
+ * sysmem_dump_all() - Dump all sysmem stat
+ */
+void sysmem_dump(void);
+
+/**
+ * sysmem_dump_check() - Dump all sysmem stat and check overflow
+ */
+int sysmem_dump_check(void);
+
+/**
+ * board_sysmem_reserve() - Weak function for board to implement
+ *
+ * @sysmem: global sysmem point, ignored
+ *
+ * @return 0 on success, otherwise error
+ */
+int board_sysmem_reserve(struct sysmem *sysmem);
+
+/**
+ * arch_sysmem_reserve() - Weak function for arch to implement
+ *
+ * @sysmem: global sysmem point, ignored
+ *
+ * @return 0 on success, otherwise error
+ */
+int arch_sysmem_reserve(struct sysmem *sysmem);
+
+#endif /* _SYSMEM_H */
diff --git a/lib/Kconfig b/lib/Kconfig
index 0743d91360..12b597d104 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -93,6 +93,12 @@ config RBTREE
 config BITREVERSE
 	bool
 
+config SYSMEM
+	bool "System memory management"
+	default y
+	help
+	  This enables support for system permanent memory management.
+
 source lib/dhry/Kconfig
 
 menu "Security support"
diff --git a/lib/Makefile b/lib/Makefile
index fdb9f8e043..e417c794df 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -29,6 +29,9 @@ obj-$(CONFIG_GZIP_COMPRESSED) += gzip.o
 obj-$(CONFIG_GENERATE_SMBIOS_TABLE) += smbios.o
 obj-y += initcall.o
 obj-$(CONFIG_LMB) += lmb.o
+ifdef CONFIG_LMB
+obj-$(CONFIG_SYSMEM) += sysmem.o
+endif
 obj-y += ldiv.o
 obj-$(CONFIG_LZ4) += lz4_wrapper.o
 obj-$(CONFIG_MD5) += md5.o
diff --git a/lib/sysmem.c b/lib/sysmem.c
new file mode 100644
index 0000000000..705ba34771
--- /dev/null
+++ b/lib/sysmem.c
@@ -0,0 +1,467 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <sysmem.h>
+#include <lmb.h>
+#include <malloc.h>
+#include <asm/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define SYSMEM_MAGIC		0x4D454D53	/* "SMEM" */
+#define SYSMEM_ALLOC_ANYWHERE	0
+#define SYSMEM_ALLOC_NO_ALIGN	1
+
+#ifndef CONFIG_SYS_STACK_SIZE
+#define CONFIG_SYS_STACK_SIZE	SZ_2M
+#endif
+
+#define SIZE_MB(len)		((len) >> 20)
+#define SIZE_KB(len)		(((len) % (1 << 20)) >> 10)
+
+#define SYSMEM_I(fmt, args...)	printf("Sysmem: "fmt, ##args)
+#define SYSMEM_W(fmt, args...)	printf("Sysmem Warn: "fmt, ##args)
+#define SYSMEM_E(fmt, args...)	printf("Sysmem Error: "fmt, ##args)
+#define SYSMEM_D(fmt, args...)	 debug("Sysmem Debug: "fmt, ##args)
+
+static struct sysmem plat_sysmem;	/* Global for platform */
+
+struct sysmem_check {
+	uint32_t magic;
+};
+
+static int sysmem_has_init(void)
+{
+	if (!plat_sysmem.has_init) {
+		SYSMEM_E("Framework is not initialized\n");
+		return 0;
+	}
+
+	return 1;
+}
+
+void sysmem_dump(void)
+{
+#ifdef DEBUG
+	struct sysmem *sysmem = &plat_sysmem;
+	struct lmb *lmb = &sysmem->lmb;
+	struct sysmem_property *prop;
+	struct sysmem_check *check;
+	struct list_head *node;
+	ulong memory_size = 0;
+	ulong reserved_size = 0;
+	ulong allocated_size = 0;
+	ulong i;
+
+	if (!sysmem_has_init())
+		return;
+
+	printf("\nsysmem_dump_all:\n");
+
+	/* Memory pool */
+	printf("    ------------------------------------------------------\n");
+	for (i = 0; i < lmb->memory.cnt; i++) {
+		memory_size += lmb->memory.region[i].size;
+		printf("    memory.rgn[%ld].base     = 0x%08lx\n", i,
+		       (ulong)lmb->memory.region[i].base);
+		printf("		 .size     = 0x%08lx\n",
+		       (ulong)lmb->memory.region[i].size);
+	}
+	printf("\n    memory.total	   = 0x%08lx (%ld MiB. %ld KiB)\n",
+	       (ulong)memory_size,
+	       SIZE_MB((ulong)memory_size),
+	       SIZE_KB((ulong)memory_size));
+
+	/* Reserved */
+	i = 0;
+	printf("    ------------------------------------------------------\n");
+	list_for_each(node, &sysmem->reserved_head) {
+		prop = list_entry(node, struct sysmem_property, node);
+		reserved_size += prop->size;
+		printf("    reserved.rgn[%ld].name   = \"%s\"\n", i, prop->name);
+		printf("		   .base   = 0x%08lx\n",
+		       (ulong)prop->base);
+		printf("		   .size   = 0x%08lx\n",
+		       (ulong)prop->size);
+		i++;
+	}
+	printf("\n    reserved.total	   = 0x%08lx (%ld MiB. %ld KiB)\n",
+	       (ulong)reserved_size,
+	       SIZE_MB((ulong)reserved_size),
+	       SIZE_KB((ulong)reserved_size));
+
+	/* Allocated */
+	i = 0;
+	printf("    ------------------------------------------------------\n");
+	list_for_each(node, &sysmem->allocated_head) {
+		prop = list_entry(node, struct sysmem_property, node);
+		allocated_size += prop->size;
+		check = (struct sysmem_check *)
+				(prop->base + prop->size - sizeof(*check));
+		printf("    allocated.rgn[%ld].name  = \"%s\"%s\n",
+		       i, prop->name,
+		       check->magic != SYSMEM_MAGIC ? "	(Overflow)" : "");
+		printf("		    .base  = 0x%08lx\n",
+		       (ulong)prop->base);
+		printf("		    .size  = 0x%08lx\n",
+		       (ulong)prop->size);
+		i++;
+	}
+	printf("\n    allocated.total	   = 0x%08lx (%ld MiB. %ld KiB)\n",
+	       (ulong)allocated_size,
+	       SIZE_MB((ulong)allocated_size),
+	       SIZE_KB((ulong)allocated_size));
+
+	/* LMB core reserved */
+	printf("    ------------------------------------------------------\n");
+	reserved_size = 0;
+	for (i = 0; i < lmb->reserved.cnt; i++) {
+		reserved_size += lmb->reserved.region[i].size;
+		printf("    LMB.reserved[%ld].base   = 0x%08lx\n", i,
+		       (ulong)lmb->reserved.region[i].base);
+		printf("		   .size   = 0x%08lx\n",
+		       (ulong)lmb->reserved.region[i].size);
+	}
+
+	printf("\n    reserved.core.total	   = 0x%08lx (%ld MiB. %ld KiB)\n",
+	       (ulong)reserved_size,
+	       SIZE_MB((ulong)reserved_size),
+	       SIZE_KB((ulong)reserved_size));
+	printf("    ------------------------------------------------------\n\n");
+#endif
+}
+
+int sysmem_check(void)
+{
+	struct sysmem *sysmem = &plat_sysmem;
+	struct sysmem_property *prop;
+	struct sysmem_check *check;
+	struct list_head *node;
+	int ret = 0;
+
+	if (!sysmem_has_init())
+		return -ENOSYS;
+
+	/* Check allocated */
+	list_for_each(node, &sysmem->allocated_head) {
+		prop = list_entry(node, struct sysmem_property, node);
+		check = (struct sysmem_check *)
+				(prop->base + prop->size - sizeof(*check));
+		if (check->magic != SYSMEM_MAGIC) {
+			ret = -EOVERFLOW;
+			SYSMEM_E("\"%s\" (base=0x%08lx, size=0x%lx) is Overflow!\n",
+				 prop->name, (ulong)prop->base, (ulong)prop->size);
+		}
+	}
+
+	/* Check stack */
+	check = (struct sysmem_check *)(gd->start_addr_sp - CONFIG_SYS_STACK_SIZE);
+	if (check->magic != SYSMEM_MAGIC) {
+		ret = -EOVERFLOW;
+		SYSMEM_E("Runtime stack is Overflow!\n");
+	}
+
+	return ret;
+}
+
+int sysmem_dump_check(void)
+{
+	sysmem_dump();
+
+	return sysmem_check();
+}
+
+static int sysmem_is_overlap(phys_addr_t base1, phys_size_t size1,
+			     phys_addr_t base2, phys_size_t size2)
+{
+	return ((base1 < (base2 + size2)) && (base2 < (base1 + size1)));
+}
+
+int sysmem_add(phys_addr_t base, phys_size_t size)
+{
+	struct sysmem *sysmem = &plat_sysmem;
+	int ret;
+
+	if (!sysmem_has_init())
+		return -ENOSYS;
+
+	ret = lmb_add(&sysmem->lmb, base, size);
+	if (ret < 0)
+		SYSMEM_E("Failed to add sysmem at 0x%lx for 0x%lx size\n",
+			 (ulong)base, (ulong)size);
+
+	return (ret >= 0) ? 0 : ret;
+}
+
+int sysmem_reserve(const char *name, phys_addr_t base, phys_size_t size)
+{
+	struct sysmem *sysmem = &plat_sysmem;
+	struct sysmem_property *prop;
+	struct list_head *node;
+	int ret = 0;
+
+	if (!sysmem_has_init())
+		return -ENOSYS;
+
+	if (!name) {
+		SYSMEM_E("NULL name for reserved sysmem\n");
+		return -EINVAL;
+	}
+
+	/* Check overlap */
+	list_for_each(node, &sysmem->reserved_head) {
+		prop = list_entry(node, struct sysmem_property, node);
+		if (!strcmp(prop->name, name)) {
+			SYSMEM_E("Failed to double reserve for existence \"%s\"\n", name);
+			return -EEXIST;
+		} else if (sysmem_is_overlap(prop->base, prop->size, base, size)) {
+			SYSMEM_W("\"%s\" (base=0x%08lx, size=0x%lx) reserve is "
+				 "overlap with existence \"%s\" (base=0x%08lx, size=0x%lx)\n",
+				 name, (ulong)base, (ulong)size, prop->name,
+				 (ulong)prop->base, (ulong)prop->size);
+		}
+	}
+
+	ret = lmb_reserve(&sysmem->lmb, base, size);
+	if (ret >= 0) {
+		prop = malloc(sizeof(*prop));
+		if (!prop) {
+			SYSMEM_E("No memory for \"%s\" reserve sysmem\n", name);
+			return -ENOMEM;
+		}
+
+		prop->name = name;
+		prop->base = base;
+		prop->size = size;
+		list_add_tail(&prop->node, &sysmem->reserved_head);
+	} else {
+		SYSMEM_E("Failed to reserve \"%s\" at 0x%lx\n", name, (ulong)base);
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+void *sysmem_alloc_align_base(const char *name,
+			      phys_addr_t base,
+			      phys_size_t size,
+			      ulong align)
+{
+	struct sysmem *sysmem = &plat_sysmem;
+	struct sysmem_property *prop;
+	struct sysmem_check *check;
+	struct list_head *node;
+	phys_addr_t paddr;
+	phys_addr_t alloc_base;
+	phys_size_t alloc_size;
+
+	if (!sysmem_has_init())
+		return NULL;
+
+	if (!name) {
+		SYSMEM_E("NULL name for alloc sysmem\n");
+		return NULL;
+	}
+
+	/* Already allocated ? */
+	list_for_each(node, &sysmem->allocated_head) {
+		prop = list_entry(node, struct sysmem_property, node);
+		if (!strcmp(prop->name, name)) {
+			SYSMEM_E("Failed to double alloc for existence \"%s\"\n", name);
+			return NULL;
+		} else if (sysmem_is_overlap(prop->base, prop->size, base, size)) {
+			SYSMEM_E("\"%s\" (base=0x%08lx, size=0x%lx) alloc is "
+				 "overlap with existence \"%s\" (base=0x%08lx, size=0x%lx)\n",
+				 name, (ulong)base, (ulong)size,
+				 prop->name, (ulong)prop->base,
+				 (ulong)prop->size);
+			return NULL;
+		}
+	}
+
+	alloc_size = size + sizeof(*check);
+	if (base == SYSMEM_ALLOC_ANYWHERE)
+		alloc_base = base;
+	else
+		alloc_base = base + alloc_size;	/* LMB is align down alloc mechanism */
+
+	paddr = lmb_alloc_base(&sysmem->lmb, alloc_size, align, alloc_base);
+	if (paddr) {
+		if  ((paddr == base) || (base == SYSMEM_ALLOC_ANYWHERE)) {
+			prop = malloc(sizeof(*prop));
+			if (!prop) {
+				SYSMEM_E("No memory for \"%s\" alloc sysmem\n", name);
+				return NULL;
+			}
+
+			prop->name = name;
+			prop->base = paddr;
+			prop->size = alloc_size;
+			sysmem->allocated_cnt++;
+
+			check = (struct sysmem_check *)(paddr + size);
+			check->magic = SYSMEM_MAGIC;
+
+			list_add_tail(&prop->node, &sysmem->allocated_head);
+		} else {
+			SYSMEM_E("Failed to alloc \"%s\" at expect 0x%lx but "
+				 "alloc at 0x%lx\n",
+				 name, (ulong)base, (ulong)paddr);
+			return NULL;
+		}
+	} else {
+		SYSMEM_E("Failed to alloc \"%s\" at 0x%lx\n", name, (ulong)base);
+	}
+
+	SYSMEM_D("Alloc: \"%s\", paddr=0x%lx, size=0x%lx, align=0x%x, anywhere=%d\n",
+		 name, (ulong)paddr, (ulong)size, (u32)align, !base);
+
+	return (void *)paddr;
+}
+
+void *sysmem_alloc_align(const char *name, phys_size_t size, ulong align)
+{
+	return sysmem_alloc_align_base(name,
+				       SYSMEM_ALLOC_ANYWHERE,
+				       size,
+				       align);
+}
+
+void *sysmem_alloc_base(const char *name, phys_addr_t base, phys_size_t size)
+{
+	return sysmem_alloc_align_base(name,
+				       base,
+				       size,
+				       SYSMEM_ALLOC_NO_ALIGN);
+}
+
+void *sysmem_alloc(const char *name, phys_size_t size)
+{
+	return sysmem_alloc_align_base(name,
+				       SYSMEM_ALLOC_ANYWHERE,
+				       size,
+				       SYSMEM_ALLOC_NO_ALIGN);
+}
+
+int sysmem_free(phys_addr_t base)
+{
+	struct sysmem *sysmem = &plat_sysmem;
+	struct sysmem_property *prop;
+	struct list_head *node;
+	int found = 0;
+	int ret;
+
+	if (!sysmem_has_init())
+		return -ENOSYS;
+
+	/* Find existence */
+	list_for_each(node, &sysmem->allocated_head) {
+		prop = list_entry(node, struct sysmem_property, node);
+		if (prop->base == base) {
+			found = 1;
+			break;
+		}
+	}
+
+	if (!found) {
+		SYSMEM_E("Failed to free no allocated sysmem at 0x%lx\n", (ulong)base);
+		return -EINVAL;
+	}
+
+	ret = lmb_free(&sysmem->lmb, prop->base, prop->size);
+	if (ret >= 0) {
+		SYSMEM_I("Free: \"%s\", paddr=0x%lx, size=0x%lx\n",
+			 prop->name, (ulong)prop->base, (ulong)prop->size);
+		sysmem->allocated_cnt--;
+		list_del(&prop->node);
+		free(prop);
+	} else {
+		SYSMEM_E("Failed to free \"%s\" at 0x%lx\n", prop->name, (ulong)base);
+	}
+
+	return (ret >= 0) ? 0 : ret;
+}
+
+int sysmem_init(void)
+{
+	struct sysmem *sysmem = &plat_sysmem;
+	struct sysmem_check *check;
+	phys_addr_t mem_start;
+	phys_size_t mem_size;
+	int ret;
+
+	SYSMEM_I("init\n");
+
+	lmb_init(&sysmem->lmb);
+	INIT_LIST_HEAD(&sysmem->allocated_head);
+	INIT_LIST_HEAD(&sysmem->reserved_head);
+	sysmem->allocated_cnt = 0;
+	sysmem->has_init = true;
+
+	/* Add all available system memory */
+#ifdef CONFIG_NR_DRAM_BANKS
+	int i;
+
+	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+		ret = sysmem_add(gd->bd->bi_dram[i].start,
+				 gd->bd->bi_dram[i].size);
+		if (ret) {
+			SYSMEM_E("Failed to add sysmem from bi_dram[%d]\n", i);
+			return ret;
+		}
+	}
+#else
+	mem_start = env_get_bootm_low();
+	mem_size = env_get_bootm_size();
+	ret = sysmem_add(mem_start, mem_size);
+	if (ret) {
+		SYSMEM_E("Failed to add sysmem from bootm_low/size\n");
+		return ret;
+	}
+#endif
+
+	/* Reserved for arch */
+	ret = arch_sysmem_reserve(sysmem);
+	if (ret) {
+		SYSMEM_E("Failed to reserve sysmem for arch\n");
+		return ret;
+	}
+
+	/* Reserved for board */
+	ret = board_sysmem_reserve(sysmem);
+	if (ret) {
+		SYSMEM_E("Failed to reserve sysmem for board\n");
+		return ret;
+	}
+
+	/* Reserved for U-boot framework 'reserve_xxx()' */
+	mem_start = gd->start_addr_sp - CONFIG_SYS_STACK_SIZE;
+	mem_size = gd->ram_top - mem_start;
+	check = (struct sysmem_check *)mem_start;
+	check->magic = SYSMEM_MAGIC;
+
+	ret = sysmem_reserve("U-Boot", mem_start, mem_size);
+	if (ret) {
+		SYSMEM_E("Failed to reserve sysmem for U-Boot framework\n");
+		return ret;
+	}
+
+	sysmem_dump();
+
+	return 0;
+}
+
+__weak int board_sysmem_reserve(struct sysmem *sysmem)
+{
+	/* please define platform specific board_sysmem_reserve() */
+	return 0;
+}
+
+__weak int arch_sysmem_reserve(struct sysmem *sysmem)
+{
+	/* please define platform specific arch_sysmem_reserve() */
+	return 0;
+}

commit a096fa255c6067c2aa4932ff43fce2a6e1af8fb2
Author: wu jingchen <oven.wu@rock-chips.com>
Date:   Tue Jan 22 14:41:15 2019 +0800

    configs: rockchip: px30: enable avb for Android P
    
    Change-Id: I3678bc4e3f21379cf12891ca6a99a37bc54d76d7
    Signed-off-by: wu jingchen <oven.wu@rock-chips.com>

diff --git a/configs/px30_defconfig b/configs/px30_defconfig
new file mode 100644
index 0000000000..bc3a35a1b5
--- /dev/null
+++ b/configs/px30_defconfig
@@ -0,0 +1,143 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_ROCKCHIP_PX30=y
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_TARGET_EVB_PX30=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
+CONFIG_DEFAULT_DEVICE_TREE="px30-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_ANDROID_AVB=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_FASTBOOT_BUF_ADDR=0x800800
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_BOOTD is not set
+CONFIG_CMD_DTIMG=y
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_LZMADEC is not set
+# CONFIG_CMD_UNZIP is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPT=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_ITEST is not set
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_NET is not set
+# CONFIG_CMD_MISC is not set
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
+CONFIG_RKPARM_PARTITION=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_RK8XX_PWRKEY=y
+CONFIG_ADC_KEY=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PINCTRL=y
+CONFIG_DM_FUEL_GAUGE=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_DM_DVFS=y
+CONFIG_ROCKCHIP_WTEMP_DVFS=y
+CONFIG_DM_CHARGE_DISPLAY=y
+CONFIG_CHARGE_ANIMATION=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
+CONFIG_ROCKCHIP_SDRAM_COMMON=y
+CONFIG_SDRAM_COMMON_CAP_DETECT=y
+CONFIG_SDRAM_COMMON_OSREG=y
+CONFIG_SDRAM_COMMON_MSCH_PX30=y
+CONFIG_DM_RESET=y
+CONFIG_RKNAND=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0xFF160000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_SOUND=y
+CONFIG_I2S_ROCKCHIP=y
+CONFIG_SOUND_RK817=y
+CONFIG_SOUND_ROCKCHIP=y
+CONFIG_SYSRESET=y
+CONFIG_DM_THERMAL=y
+CONFIG_ROCKCHIP_THERMAL=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x330d
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_DRM_ROCKCHIP_LVDS=y
+CONFIG_DRM_ROCKCHIP_RGB=y
+CONFIG_DRM_ROCKCHIP_RK618=y
+CONFIG_VIDEO_BRIDGE_ANALOGIX_ANX6345=y
+CONFIG_LCD=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
+CONFIG_OF_LIBFDT_OVERLAY=y
+# CONFIG_EFI_LOADER is not set
+CONFIG_AVB_LIBAVB=y
+CONFIG_AVB_LIBAVB_AB=y
+CONFIG_AVB_LIBAVB_ATX=y
+CONFIG_AVB_LIBAVB_USER=y
+CONFIG_RK_AVB_LIBAVB_USER=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V2=y
+CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
+CONFIG_TEST_ROCKCHIP=y

commit de4e4f50976ccfe6abb415a0f4c17933de945e92
Author: Shunqing Chen <csq@rock-chips.com>
Date:   Wed Jan 23 20:28:14 2019 +0800

    fuel gauge: rk817/rk809: add charge detect for rk809
    
    Change-Id: I481793e5e307534deefa15a9f71de75752170dc8
    Signed-off-by: Shunqing Chen <csq@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk817.c b/drivers/power/fuel_gauge/fg_rk817.c
index f956c1c268..57ff70e5ec 100644
--- a/drivers/power/fuel_gauge/fg_rk817.c
+++ b/drivers/power/fuel_gauge/fg_rk817.c
@@ -946,10 +946,14 @@ static int rk817_bat_update_get_current(struct udevice *dev)
 
 static int rk817_bat_dwc_otg_check_dpdm(struct rk817_battery_device *battery)
 {
-	if (battery->variant == RK809_ID)
-		return 0;
-	else
+	if (battery->variant == RK809_ID) {
+		if (rk817_bat_read(battery, PMIC_SYS_STS) & PLUG_IN_STS)
+			return AC_CHARGER;
+		else
+			return NO_CHARGER;
+	} else {
 		return  rockchip_chg_get_type();
+	}
 }
 
 static bool rk817_bat_update_get_chrg_online(struct udevice *dev)

commit 47ad810789199e0dbd3fc7f4e8955d45f0663500
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 22 20:25:22 2019 +0800

    rockchip: rk1808: enable GICV3
    
    Change-Id: I47a459e2408a7a56794cf7f72ff58a616100b7eb
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 7c6a22d51f..8cb2a4c10d 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -354,11 +354,11 @@ config TPL_STACK
 
 endif
 
-
 config ROCKCHIP_RK1808
 	bool "Support Rockchip RK1808"
 	select ARM64
 	select ARM_SMCCC
+	select GICV3
 	select DEBUG_UART_BOARD_INIT
 	help
 	  The Rockchip RK1808 is a ARM-based Soc which embedded with dual
diff --git a/include/irq-platform.h b/include/irq-platform.h
index 230a16737e..b07d576057 100644
--- a/include/irq-platform.h
+++ b/include/irq-platform.h
@@ -172,6 +172,29 @@
 
 #define GPIO_BANK_NUM			5
 #define GPIO_BANK_PINS			32
+
+#elif defined(CONFIG_ROCKCHIP_RK1808)
+#define GPIO0_PHYS			0xff4c0000
+#define GPIO1_PHYS			0xff690000
+#define GPIO2_PHYS			0xff6a0000
+#define GPIO3_PHYS			0xff6b0000
+#define GPIO4_PHYS			0xff6c0000
+
+#define IRQ_GPIO0			35
+#define IRQ_GPIO1			36
+#define IRQ_GPIO2			37
+#define IRQ_GPIO3			38
+#define IRQ_GPIO4			114
+
+#define IRQ_TIMER0			58
+#define IRQ_TIMER1			59
+
+#define GIC_IRQS_NR			(5 * 32)
+#define GPIO_IRQS_NR			(5 * 32)
+
+#define GPIO_BANK_NUM			5
+#define GPIO_BANK_PINS			32
+
 #else
 "Missing define RIQ relative things"
 #endif
diff --git a/include/rk_timer_irq.h b/include/rk_timer_irq.h
index c9a968d39c..46133016b3 100644
--- a/include/rk_timer_irq.h
+++ b/include/rk_timer_irq.h
@@ -52,6 +52,9 @@
  */
 #define TIMER_BASE		(0xFF210000 + 0x00)	/* TIMER 0 */
 #define TIMER_IRQ		IRQ_TIMER0
+#elif defined(CONFIG_ROCKCHIP_RK1808)
+#define TIMER_BASE		(0xFF700000 + 0x20)	/* TIMER 1 */
+#define TIMER_IRQ		IRQ_TIMER1
 #else
 "Missing definitions of timer module test"
 #endif

commit 0b33879477ef19e02aaa793621329a09723e7193
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 22 20:41:09 2019 +0800

    configs: rk3128x: remove unused modules
    
    Change-Id: Id8c61c9b3fbb9eebe53b28c95e2ca961df48947e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3128x_defconfig b/configs/rk3128x_defconfig
index bb46b70399..daad03c077 100644
--- a/configs/rk3128x_defconfig
+++ b/configs/rk3128x_defconfig
@@ -35,17 +35,28 @@ CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_BOOTD is not set
 CONFIG_CMD_DTIMG=y
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
 CONFIG_CMD_GPT=y
-CONFIG_CMD_LOAD_ANDROID=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_TIME=y
+# CONFIG_CMD_MISC is not set
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_TPL_OF_CONTROL=y
@@ -75,7 +86,6 @@ CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
-CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_PMIC=y
@@ -106,9 +116,6 @@ CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_HDMI=y
 CONFIG_ROCKCHIP_INNO_HDMI_PHY=y
-CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
-CONFIG_DRM_ROCKCHIP_LVDS=y
-CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_ROCKCHIP_DRM_TVE=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
@@ -116,6 +123,7 @@ CONFIG_SPL_TINY_MEMSET=y
 CONFIG_TPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
 CONFIG_OF_LIBFDT_OVERLAY=y
+# CONFIG_EFI_LOADER is not set
 CONFIG_AVB_LIBAVB=y
 CONFIG_AVB_LIBAVB_AB=y
 CONFIG_AVB_LIBAVB_ATX=y

commit a3125e189368afe1022578d7cc9f23840cb949f7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 22 18:25:41 2019 +0800

    configs: rk3399pro: remove unused modules
    
    Change-Id: I3de6562dc2c6546bf148e6571092b2046fd49336
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3399pro_defconfig b/configs/rk3399pro_defconfig
index 35d15637fb..778f0964b5 100644
--- a/configs/rk3399pro_defconfig
+++ b/configs/rk3399pro_defconfig
@@ -26,21 +26,31 @@ CONFIG_FASTBOOT_BUF_ADDR=0x00800800
 CONFIG_FASTBOOT_BUF_SIZE=0x08000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_BOOTD is not set
 CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_LZMADEC is not set
+# CONFIG_CMD_UNZIP is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
 CONFIG_CMD_GPT=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_LOAD_ANDROID=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_TIME=y
-CONFIG_CMD_PMIC=y
-CONFIG_CMD_REGULATOR=y
+# CONFIG_CMD_MISC is not set
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
@@ -67,7 +77,6 @@ CONFIG_MMC_SDHCI_ROCKCHIP=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
-CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
@@ -126,4 +135,5 @@ CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
+# CONFIG_EFI_LOADER is not set
 CONFIG_TEST_ROCKCHIP=y

commit 0be3899d19e8d0f35b587b206fe0327e82901139
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jan 21 20:07:14 2019 +0800

    configs: rk3126: remove unused modules
    
    decrease 41KB size.
    
    Change-Id: Ic2cb9d164ab79aa0eee2aa0ad491562231400aa3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3126_defconfig b/configs/rk3126_defconfig
index 357f281e53..3814172462 100644
--- a/configs/rk3126_defconfig
+++ b/configs/rk3126_defconfig
@@ -17,18 +17,28 @@ CONFIG_FASTBOOT_BUF_ADDR=0x60800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
 CONFIG_CMD_GPT=y
-CONFIG_CMD_LOAD_ANDROID=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_BMP=y
-CONFIG_CMD_TIME=y
-CONFIG_CMD_CHARGE_DISPLAY=y
+# CONFIG_CMD_MISC is not set
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_RKPARM_PARTITION=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
@@ -88,6 +98,7 @@ CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_ERRNO_STR=y
+# CONFIG_EFI_LOADER is not set
 CONFIG_AVB_LIBAVB=y
 CONFIG_AVB_LIBAVB_AB=y
 CONFIG_AVB_LIBAVB_ATX=y

commit 547a235e37db2b98911d9c7e9b8be5f19a3baf3a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jan 21 21:02:59 2019 +0800

    configs: rk3308(aarch32/64): remove unused modules
    
    Change-Id: I6c9243a7a18b108442e8cf7e5ea298c7770c9a08
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-aarch32-rk3308_defconfig b/configs/evb-aarch32-rk3308_defconfig
index 07162ea3db..f8510b1e49 100644
--- a/configs/evb-aarch32-rk3308_defconfig
+++ b/configs/evb-aarch32-rk3308_defconfig
@@ -19,12 +19,25 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 # CONFIG_FASTBOOT is not set
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
 CONFIG_CMD_GPT=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
+# CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_MISC is not set
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_REGMAP=y
@@ -65,3 +78,4 @@ CONFIG_G_DNL_PRODUCT_NUM=0x330d
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
+# CONFIG_EFI_LOADER is not set
diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index fe55fa6820..48af622e47 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -32,7 +32,6 @@ CONFIG_CMD_GPT=y
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
-# CONFIG_CMD_ECHO is not set
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_MISC is not set
diff --git a/configs/rk3308-aarch32_defconfig b/configs/rk3308-aarch32_defconfig
index a4720bf15c..0edc1895f0 100644
--- a/configs/rk3308-aarch32_defconfig
+++ b/configs/rk3308-aarch32_defconfig
@@ -93,4 +93,5 @@ CONFIG_SPL_TINY_MEMSET=y
 CONFIG_LZ4=y
 CONFIG_LZO=y
 CONFIG_ERRNO_STR=y
+# CONFIG_EFI_LOADER is not set
 CONFIG_TEST_ROCKCHIP=y
diff --git a/configs/rk3308_defconfig b/configs/rk3308_defconfig
index 007c6d0114..b93cba6549 100644
--- a/configs/rk3308_defconfig
+++ b/configs/rk3308_defconfig
@@ -33,6 +33,7 @@ CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_MISC is not set
 CONFIG_CMD_PMIC=y
 # CONFIG_DOS_PARTITION is not set
 # CONFIG_ISO_PARTITION is not set

commit 20e312f0e275883fe5f8d5dd8be247f7d32fc57b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 22 17:59:43 2019 +0800

    configs: rk3036: remove unused modules
    
    Change-Id: I6fdabf2c1274d791a4cf3fae3219c09b145984b6
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3036_defconfig b/configs/rk3036_defconfig
index b963f9deb8..62e45aa81b 100644
--- a/configs/rk3036_defconfig
+++ b/configs/rk3036_defconfig
@@ -5,9 +5,9 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x1000
 CONFIG_TPL_TEXT_BASE=0x10081000
 CONFIG_ROCKCHIP_RK3036=y
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
 CONFIG_TPL_STACK=0x10081fff
 # CONFIG_SPL_ROCKCHIP_BACK_TO_BROM is not set
-CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
@@ -20,8 +20,8 @@ CONFIG_TPL_SYS_MALLOC_F_LEN=0x0
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
 CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
@@ -35,18 +35,25 @@ CONFIG_TPL_SERIAL_SUPPORT=y
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
-CONFIG_CMD_LOAD_ANDROID=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
+# CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_TIME=y
+# CONFIG_CMD_MISC is not set
 # CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_SPL_ISO_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
@@ -88,6 +95,7 @@ CONFIG_G_DNL_PRODUCT_NUM=0x310a
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_CMD_DHRYSTONE=y
 CONFIG_ERRNO_STR=y
+# CONFIG_EFI_LOADER is not set
 CONFIG_AVB_LIBAVB=y
 CONFIG_AVB_LIBAVB_AB=y
 CONFIG_AVB_LIBAVB_ATX=y

commit 38bddcf9c876a083b218e769b0bcdc90381208ad
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jan 21 21:02:28 2019 +0800

    configs: rk3399: clean up with make savedeconfig
    
    Change-Id: I1fac34ded558e3250364604ec07b3d2bf3a31bc6
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
index df0230e71f..5c6b6b96f1 100644
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -17,6 +17,7 @@ CONFIG_BOOTDELAY=0
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_ANDROID_AVB=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
 CONFIG_SPL_ATF=y
@@ -42,10 +43,8 @@ CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
-# CONFIG_CMD_ECHO is not set
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NFS is not set
 # CONFIG_CMD_MISC is not set
 # CONFIG_DOS_PARTITION is not set
 # CONFIG_ISO_PARTITION is not set
@@ -129,14 +128,12 @@ CONFIG_LIB_RAND=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
 # CONFIG_EFI_LOADER is not set
-CONFIG_TEST_ROCKCHIP=y
-CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
-CONFIG_OPTEE_CLIENT=y
-CONFIG_OPTEE_V1=y
-CONFIG_CMD_MMC=y
-CONFIG_ANDROID_AVB=y
 CONFIG_AVB_LIBAVB=y
 CONFIG_AVB_LIBAVB_AB=y
 CONFIG_AVB_LIBAVB_ATX=y
 CONFIG_AVB_LIBAVB_USER=y
 CONFIG_RK_AVB_LIBAVB_USER=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V1=y
+CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
+CONFIG_TEST_ROCKCHIP=y

commit 5279a516112e6205b8b0ed72189e31a27269716c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jan 21 20:37:49 2019 +0800

    configs: rk3399pro-npu: remove unused modules
    
    Change-Id: If8bbff81139a38c47512f59bb25b4baeedab833f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3399pro-npu_defconfig b/configs/rk3399pro-npu_defconfig
index 4ba467c66c..e0d6fab83e 100644
--- a/configs/rk3399pro-npu_defconfig
+++ b/configs/rk3399pro-npu_defconfig
@@ -39,8 +39,9 @@ CONFIG_CMD_PART=y
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
 # CONFIG_CMD_MISC is not set
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
 CONFIG_RKPARM_PARTITION=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"

commit 10e1637793fef4ffdac391f2a2caa6c02593abb5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jan 21 20:37:37 2019 +0800

    configs: rk1808: remove unused modules
    
    Change-Id: I67f5bc3a60684d492e6abd4c2aa40986caf191b0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk1808_defconfig b/configs/rk1808_defconfig
index 5ccc2606d1..8ffec5633e 100644
--- a/configs/rk1808_defconfig
+++ b/configs/rk1808_defconfig
@@ -19,6 +19,7 @@ CONFIG_FASTBOOT_BUF_ADDR=0x00800800
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_XIMG is not set
@@ -28,6 +29,7 @@ CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_FPGA is not set
 CONFIG_CMD_GPT=y
 # CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y

commit 83f08d13cbda138cc9c64349699c0fb94c7b2543
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jan 21 20:31:41 2019 +0800

    configs: rk3288: remove unused modules
    
    decrease 48KB size.
    
    Change-Id: Ib91c7715fe1c9d389eee1bce8637b8f2e0446517
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3288_defconfig b/configs/rk3288_defconfig
index 318078ca23..e9e178100b 100644
--- a/configs/rk3288_defconfig
+++ b/configs/rk3288_defconfig
@@ -17,19 +17,28 @@ CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
 CONFIG_CMD_GPT=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_LOAD_ANDROID=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
+# CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_MISC is not set
 CONFIG_CMD_PMIC=y
 CONFIG_CMD_REGULATOR=y
-# CONFIG_SPL_DOS_PARTITION is not set
-# CONFIG_SPL_ISO_PARTITION is not set
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_SPL_PARTITION_UUIDS=y
 CONFIG_RKPARM_PARTITION=y
@@ -93,6 +102,7 @@ CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_CMD_DHRYSTONE=y
 CONFIG_ERRNO_STR=y
+# CONFIG_EFI_LOADER is not set
 CONFIG_TEST_ROCKCHIP=y
 CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
 CONFIG_OPTEE_CLIENT=y

commit ab620ebd8e2edfc27f574f3a99ca28495246af30
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jan 21 20:01:32 2019 +0800

    configs: rk3328: remove unused modules
    
    Change-Id: I2f4e28d7089ba22dbc87fbc4a60ba471b4aa9eec
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index 4582bc2272..5fd0655da7 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -32,7 +32,8 @@ CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_BDI is not set
-# CONFIG_CMD_CONSOLE is not set
+CONFIG_CMD_CONSOLE=y
+# CONFIG_CMD_BOOTD is not set
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set
@@ -118,4 +119,5 @@ CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
+# CONFIG_EFI_LOADER is not set
 CONFIG_TEST_ROCKCHIP=y

commit d6741ccc338e188ffe355c7b1c441e7158d67f88
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jan 21 19:59:53 2019 +0800

    configs: rk322x: remove unused modules
    
    decrease 42KB size.
    
    Change-Id: I1719552e4c98ce32dcba31a3e569d664a5a1b092
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk322x_defconfig b/configs/rk322x_defconfig
index a754c401af..ecf9243c17 100644
--- a/configs/rk322x_defconfig
+++ b/configs/rk322x_defconfig
@@ -34,16 +34,27 @@ CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
 CONFIG_CMD_GPT=y
-CONFIG_CMD_LOAD_ANDROID=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_TIME=y
+# CONFIG_CMD_MISC is not set
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_TPL_OF_CONTROL=y
@@ -108,6 +119,7 @@ CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_TPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
+# CONFIG_EFI_LOADER is not set
 CONFIG_AVB_LIBAVB=y
 CONFIG_AVB_LIBAVB_AB=y
 CONFIG_AVB_LIBAVB_ATX=y

commit b506bd3c7a0d96f1fe0b09d716e7281590280027
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jan 21 19:54:28 2019 +0800

    configs: rk3368: remove unused modules
    
    Change-Id: I7fc3be392b2fc5fa2cda215f15a3c7dc6f8ba531
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3368_defconfig b/configs/rk3368_defconfig
index dbfab2d6ce..db8b307d00 100644
--- a/configs/rk3368_defconfig
+++ b/configs/rk3368_defconfig
@@ -16,7 +16,9 @@ CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_BOOTD is not set
 CONFIG_CMD_DTIMG=y
+# CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_XIMG is not set
@@ -32,7 +34,6 @@ CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_ECHO is not set
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_NET is not set

commit 92c6b64268501785fd3c8904743984262d04a8fb
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Wed Jan 23 10:54:42 2019 +0800

    clk: rockchip: rk3128: print arm enter and init rate
    
    Change-Id: I0be1752522a83a2d111870e5a8ac95f92bd7f9a5
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3128.h b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
index a2f99d5657..6c2b6cb1b1 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
@@ -22,6 +22,11 @@
 struct rk3128_clk_priv {
 	struct rk3128_cru *cru;
 	ulong gpll_hz;
+	ulong armclk_hz;
+	ulong armclk_enter_hz;
+	ulong armclk_init_hz;
+	bool sync_kernel;
+	bool set_armclk_rate;
 };
 
 struct rk3128_cru {
diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c
index 1b2943f59a..493a0a01c7 100644
--- a/drivers/clk/rockchip/clk_rk3128.c
+++ b/drivers/clk/rockchip/clk_rk3128.c
@@ -530,7 +530,7 @@ static ulong rk3128_clk_get_rate(struct clk *clk)
 static ulong rk3128_clk_set_rate(struct clk *clk, ulong rate)
 {
 	struct rk3128_clk_priv *priv = dev_get_priv(clk->dev);
-	ulong ret;
+	ulong ret = 0;
 
 	switch (clk->id) {
 	case PLL_APLL:
@@ -544,7 +544,9 @@ static ulong rk3128_clk_set_rate(struct clk *clk, ulong rate)
 		priv->gpll_hz = rate;
 		break;
 	case ARMCLK:
-		ret = rk3128_armclk_set_clk(priv, rate);
+		if (priv->armclk_hz)
+			ret = rk3128_armclk_set_clk(priv, rate);
+		priv->armclk_hz = rate;
 		break;
 	case HCLK_EMMC:
 	case SCLK_EMMC:
@@ -771,7 +773,16 @@ static int rk3128_clk_probe(struct udevice *dev)
 {
 	struct rk3128_clk_priv *priv = dev_get_priv(dev);
 
+	priv->sync_kernel = false;
+	if (!priv->armclk_enter_hz)
+		priv->armclk_enter_hz =
+		rockchip_pll_get_rate(&rk3128_pll_clks[APLL],
+				      priv->cru, APLL);
 	rkclk_init(priv);
+	if (!priv->armclk_init_hz)
+		priv->armclk_init_hz =
+		rockchip_pll_get_rate(&rk3128_pll_clks[APLL],
+				      priv->cru, APLL);
 
 	return 0;
 }
@@ -839,6 +850,7 @@ U_BOOT_DRIVER(rockchip_rk3128_cru) = {
 int soc_clk_dump(void)
 {
 	struct udevice *cru_dev;
+	struct rk3128_clk_priv *priv;
 	const struct rk3128_clk_info *clk_dump;
 	struct clk clk;
 	unsigned long clk_count = ARRAY_SIZE(clks_dump);
@@ -853,7 +865,13 @@ int soc_clk_dump(void)
 		return ret;
 	}
 
-	printf("CLK:");
+	priv = dev_get_priv(cru_dev);
+	printf("CLK: (%s. arm: enter %lu KHz, init %lu KHz, kernel %lu%s)\n",
+	       priv->sync_kernel ? "sync kernel" : "uboot",
+	       priv->armclk_enter_hz / 1000,
+	       priv->armclk_init_hz / 1000,
+	       priv->set_armclk_rate ? priv->armclk_hz / 1000 : 0,
+	       priv->set_armclk_rate ? " KHz" : "N/A");
 	for (i = 0; i < clk_count; i++) {
 		clk_dump = &clks_dump[i];
 		if (clk_dump->name) {
@@ -867,18 +885,18 @@ int soc_clk_dump(void)
 			clk_free(&clk);
 			if (i == 0) {
 				if (rate < 0)
-					printf("%10s%20s\n", clk_dump->name,
+					printf("  %s %s\n", clk_dump->name,
 					       "unknown");
 				else
-					printf("%10s%20lu Hz\n", clk_dump->name,
-					       rate);
+					printf("  %s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
 			} else {
 				if (rate < 0)
-					printf("%14s%20s\n", clk_dump->name,
+					printf("  %s %s\n", clk_dump->name,
 					       "unknown");
 				else
-					printf("%14s%20lu Hz\n", clk_dump->name,
-					       rate);
+					printf("  %s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
 			}
 		}
 	}

commit 3a1c76d9314d2f7b604a3dea3756429f5e3d4333
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Jan 22 18:17:25 2019 +0800

    clk: rockchip: rk3036: print arm enter and init rate
    
    Change-Id: Ic9212c8a0f1d50006f7121957b8bd5f34d2622d9
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3036.h b/arch/arm/include/asm/arch-rockchip/cru_rk3036.h
index ca60507617..d908d9460f 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3036.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3036.h
@@ -28,6 +28,11 @@
 struct rk3036_clk_priv {
 	struct rk3036_cru *cru;
 	ulong rate;
+	ulong armclk_hz;
+	ulong armclk_enter_hz;
+	ulong armclk_init_hz;
+	bool sync_kernel;
+	bool set_armclk_rate;
 };
 
 struct rk3036_cru {
@@ -66,6 +71,12 @@ struct pll_div {
 	u32 frac;
 };
 
+struct rk3036_clk_info {
+	unsigned long id;
+	char *name;
+	bool is_cru;
+};
+
 enum {
 	/* PLLCON0*/
 	PLL_POSTDIV1_SHIFT	= 12,
diff --git a/drivers/clk/rockchip/clk_rk3036.c b/drivers/clk/rockchip/clk_rk3036.c
index ab3154c554..50fc42d784 100644
--- a/drivers/clk/rockchip/clk_rk3036.c
+++ b/drivers/clk/rockchip/clk_rk3036.c
@@ -26,6 +26,21 @@ enum {
 	OUTPUT_MIN_HZ	= 24 * 1000000,
 };
 
+#ifndef CONFIG_SPL_BUILD
+#define RK3036_CLK_DUMP(_id, _name, _iscru)	\
+{						\
+	.id = _id,				\
+	.name = _name,				\
+	.is_cru = _iscru,			\
+}
+
+static const struct rk3036_clk_info clks_dump[] = {
+	RK3036_CLK_DUMP(PLL_APLL, "apll", true),
+	RK3036_CLK_DUMP(PLL_DPLL, "dpll", true),
+	RK3036_CLK_DUMP(PLL_GPLL, "gpll", true),
+};
+#endif
+
 #define RATE_TO_DIV(input_rate, output_rate) \
 	((input_rate) / (output_rate) - 1);
 
@@ -336,7 +351,14 @@ static int rk3036_clk_probe(struct udevice *dev)
 {
 	struct rk3036_clk_priv *priv = dev_get_priv(dev);
 
+	priv->sync_kernel = false;
+	if (!priv->armclk_enter_hz)
+		priv->armclk_enter_hz = rkclk_pll_get_rate(priv->cru,
+							   CLK_ARM);
 	rkclk_init(priv->cru);
+	if (!priv->armclk_init_hz)
+		priv->armclk_init_hz = rkclk_pll_get_rate(priv->cru,
+							  CLK_ARM);
 
 	return 0;
 }
@@ -392,3 +414,69 @@ U_BOOT_DRIVER(rockchip_rk3036_cru) = {
 	.bind		= rk3036_clk_bind,
 	.probe		= rk3036_clk_probe,
 };
+
+#ifndef CONFIG_SPL_BUILD
+/**
+ * soc_clk_dump() - Print clock frequencies
+ * Returns zero on success
+ *
+ * Implementation for the clk dump command.
+ */
+int soc_clk_dump(void)
+{
+	struct udevice *cru_dev;
+	struct rk3036_clk_priv *priv;
+	const struct rk3036_clk_info *clk_dump;
+	struct clk clk;
+	unsigned long clk_count = ARRAY_SIZE(clks_dump);
+	unsigned long rate;
+	int i, ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_CLK,
+					  DM_GET_DRIVER(rockchip_rk3036_cru),
+					  &cru_dev);
+	if (ret) {
+		printf("%s failed to get cru device\n", __func__);
+		return ret;
+	}
+
+	priv = dev_get_priv(cru_dev);
+	printf("CLK: (%s. arm: enter %lu KHz, init %lu KHz, kernel %lu%s)\n",
+	       priv->sync_kernel ? "sync kernel" : "uboot",
+	       priv->armclk_enter_hz / 1000,
+	       priv->armclk_init_hz / 1000,
+	       priv->set_armclk_rate ? priv->armclk_hz / 1000 : 0,
+	       priv->set_armclk_rate ? " KHz" : "N/A");
+	for (i = 0; i < clk_count; i++) {
+		clk_dump = &clks_dump[i];
+		if (clk_dump->name) {
+			clk.id = clk_dump->id;
+			if (clk_dump->is_cru)
+				ret = clk_request(cru_dev, &clk);
+			if (ret < 0)
+				return ret;
+
+			rate = clk_get_rate(&clk);
+			clk_free(&clk);
+			if (i == 0) {
+				if (rate < 0)
+					printf("  %s %s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("  %s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
+			} else {
+				if (rate < 0)
+					printf("  %s %s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("  %s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
+			}
+		}
+	}
+
+	return 0;
+}
+#endif
+

commit ec0307ef3a9c4bd32a2097db56836e2ea37d61a3
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Jan 22 17:48:21 2019 +0800

    clk: rockchip: rk3288: print arm enter and init rate
    
    Change-Id: I5a6d564a973111841df6b53a4df64a54f728e116
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3288.h b/arch/arm/include/asm/arch-rockchip/cru_rk3288.h
index 846a34e6a0..87dce2eddf 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3288.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3288.h
@@ -30,6 +30,11 @@ struct rk3288_clk_priv {
 	struct rk3288_grf *grf;
 	struct rk3288_cru *cru;
 	ulong rate;
+	ulong armclk_hz;
+	ulong armclk_enter_hz;
+	ulong armclk_init_hz;
+	bool sync_kernel;
+	bool set_armclk_rate;
 };
 
 struct rk3288_cru {
@@ -61,6 +66,12 @@ struct rk3288_cru {
 };
 check_member(rk3288_cru, cru_emmc_con[1], 0x021c);
 
+struct rk3288_clk_info {
+	unsigned long id;
+	char *name;
+	bool is_cru;
+};
+
 /* CRU_CLKSEL11_CON */
 enum {
 	HSICPHY_DIV_SHIFT	= 8,
diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index 4688fbb3b4..73667de9cd 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -37,6 +37,24 @@ struct pll_div {
 	u32 no;
 };
 
+#ifndef CONFIG_SPL_BUILD
+#define RK3288_CLK_DUMP(_id, _name, _iscru)	\
+{						\
+	.id = _id,				\
+	.name = _name,				\
+	.is_cru = _iscru,			\
+}
+
+static const struct rk3288_clk_info clks_dump[] = {
+	RK3288_CLK_DUMP(PLL_APLL, "apll", true),
+	RK3288_CLK_DUMP(PLL_DPLL, "dpll", true),
+	RK3288_CLK_DUMP(PLL_CPLL, "cpll", true),
+	RK3288_CLK_DUMP(PLL_GPLL, "gpll", true),
+	RK3288_CLK_DUMP(PLL_NPLL, "npll", true),
+	RK3288_CLK_DUMP(ACLK_CPU, "aclk_bus", true),
+};
+#endif
+
 enum {
 	VCO_MAX_HZ	= 2200U * 1000000,
 	VCO_MIN_HZ	= 440 * 1000000,
@@ -1254,8 +1272,20 @@ static int rk3288_clk_probe(struct udevice *dev)
 			init_clocks = true;
 	}
 
-	if (init_clocks)
+	priv->sync_kernel = false;
+	if (!priv->armclk_enter_hz)
+		priv->armclk_enter_hz = rkclk_pll_get_rate(priv->cru,
+							   CLK_ARM);
+
+	if (init_clocks) {
 		rkclk_init(priv->cru, priv->grf);
+		if (!priv->armclk_init_hz)
+			priv->armclk_init_hz = rkclk_pll_get_rate(priv->cru,
+								  CLK_ARM);
+	} else {
+		if (!priv->armclk_init_hz)
+			priv->armclk_init_hz = priv->armclk_enter_hz;
+	}
 
 	return 0;
 }
@@ -1312,3 +1342,69 @@ U_BOOT_DRIVER(rockchip_rk3288_cru) = {
 	.ofdata_to_platdata	= rk3288_clk_ofdata_to_platdata,
 	.probe		= rk3288_clk_probe,
 };
+
+#ifndef CONFIG_SPL_BUILD
+/**
+ * soc_clk_dump() - Print clock frequencies
+ * Returns zero on success
+ *
+ * Implementation for the clk dump command.
+ */
+int soc_clk_dump(void)
+{
+	struct udevice *cru_dev;
+	struct rk3288_clk_priv *priv;
+	const struct rk3288_clk_info *clk_dump;
+	struct clk clk;
+	unsigned long clk_count = ARRAY_SIZE(clks_dump);
+	unsigned long rate;
+	int i, ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_CLK,
+					  DM_GET_DRIVER(rockchip_rk3288_cru),
+					  &cru_dev);
+	if (ret) {
+		printf("%s failed to get cru device\n", __func__);
+		return ret;
+	}
+
+	priv = dev_get_priv(cru_dev);
+	printf("CLK: (%s. arm: enter %lu KHz, init %lu KHz, kernel %lu%s)\n",
+	       priv->sync_kernel ? "sync kernel" : "uboot",
+	       priv->armclk_enter_hz / 1000,
+	       priv->armclk_init_hz / 1000,
+	       priv->set_armclk_rate ? priv->armclk_hz / 1000 : 0,
+	       priv->set_armclk_rate ? " KHz" : "N/A");
+	for (i = 0; i < clk_count; i++) {
+		clk_dump = &clks_dump[i];
+		if (clk_dump->name) {
+			clk.id = clk_dump->id;
+			if (clk_dump->is_cru)
+				ret = clk_request(cru_dev, &clk);
+			if (ret < 0)
+				return ret;
+
+			rate = clk_get_rate(&clk);
+			clk_free(&clk);
+			if (i == 0) {
+				if (rate < 0)
+					printf("  %s %s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("  %s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
+			} else {
+				if (rate < 0)
+					printf("  %s %s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("  %s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
+			}
+		}
+	}
+
+	return 0;
+}
+#endif
+

commit 2401c256ecf1df05b09f39308648070f2f1650db
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Jan 22 17:20:30 2019 +0800

    clk: rockchip: rk322x: print arm enter and init rate
    
    Change-Id: Iab7034c8cef09908a99b5a1e396f6e015da350fb
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk322x.h b/arch/arm/include/asm/arch-rockchip/cru_rk322x.h
index 3162b411a9..05a59851e4 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk322x.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk322x.h
@@ -21,6 +21,11 @@ struct rk322x_clk_priv {
 	struct rk322x_cru *cru;
 	ulong gpll_hz;
 	ulong cpll_hz;
+	ulong armclk_hz;
+	ulong armclk_enter_hz;
+	ulong armclk_init_hz;
+	bool sync_kernel;
+	bool set_armclk_rate;
 };
 
 struct rk322x_cru {
diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c
index 4f71e170da..df3273cbbd 100644
--- a/drivers/clk/rockchip/clk_rk322x.c
+++ b/drivers/clk/rockchip/clk_rk322x.c
@@ -608,7 +608,7 @@ static ulong rk322x_clk_get_rate(struct clk *clk)
 static ulong rk322x_clk_set_rate(struct clk *clk, ulong rate)
 {
 	struct rk322x_clk_priv *priv = dev_get_priv(clk->dev);
-	ulong ret;
+	ulong ret = 0;
 
 	switch (clk->id) {
 	case PLL_APLL:
@@ -627,7 +627,9 @@ static ulong rk322x_clk_set_rate(struct clk *clk, ulong rate)
 		priv->gpll_hz = rate;
 		break;
 	case ARMCLK:
-		ret = rk322x_armclk_set_clk(priv, rate);
+		if (priv->armclk_hz)
+			ret = rk322x_armclk_set_clk(priv, rate);
+		priv->armclk_hz = rate;
 		break;
 	case HCLK_EMMC:
 	case SCLK_EMMC:
@@ -982,10 +984,21 @@ static int rk322x_clk_probe(struct udevice *dev)
 	struct rk322x_clk_priv *priv = dev_get_priv(dev);
 	int ret = 0;
 
+	priv->sync_kernel = false;
+	if (!priv->armclk_enter_hz)
+		priv->armclk_enter_hz =
+		rockchip_pll_get_rate(&rk322x_pll_clks[APLL],
+				      priv->cru, APLL);
 	rkclk_init(priv);
+	if (!priv->armclk_init_hz)
+		priv->armclk_init_hz =
+		rockchip_pll_get_rate(&rk322x_pll_clks[APLL],
+				      priv->cru, APLL);
 	ret = clk_set_defaults(dev);
 	if (ret)
 		debug("%s clk_set_defaults failed %d\n", __func__, ret);
+	else
+		priv->sync_kernel = true;
 #endif
 	return 0;
 }
@@ -1052,6 +1065,7 @@ U_BOOT_DRIVER(rockchip_rk322x_cru) = {
 int soc_clk_dump(void)
 {
 	struct udevice *cru_dev;
+	struct rk322x_clk_priv *priv;
 	const struct rk322x_clk_info *clk_dump;
 	struct clk clk;
 	unsigned long clk_count = ARRAY_SIZE(clks_dump);
@@ -1066,7 +1080,13 @@ int soc_clk_dump(void)
 		return ret;
 	}
 
-	printf("CLK:");
+	priv = dev_get_priv(cru_dev);
+	printf("CLK: (%s. arm: enter %lu KHz, init %lu KHz, kernel %lu%s)\n",
+	       priv->sync_kernel ? "sync kernel" : "uboot",
+	       priv->armclk_enter_hz / 1000,
+	       priv->armclk_init_hz / 1000,
+	       priv->set_armclk_rate ? priv->armclk_hz / 1000 : 0,
+	       priv->set_armclk_rate ? " KHz" : "N/A");
 	for (i = 0; i < clk_count; i++) {
 		clk_dump = &clks_dump[i];
 		if (clk_dump->name) {
@@ -1080,18 +1100,18 @@ int soc_clk_dump(void)
 			clk_free(&clk);
 			if (i == 0) {
 				if (rate < 0)
-					printf("%10s%20s\n", clk_dump->name,
+					printf("  %s %s\n", clk_dump->name,
 					       "unknown");
 				else
-					printf("%10s%20lu Hz\n", clk_dump->name,
-					       rate);
+					printf("  %s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
 			} else {
 				if (rate < 0)
-					printf("%14s%20s\n", clk_dump->name,
+					printf("  %s %s\n", clk_dump->name,
 					       "unknown");
 				else
-					printf("%14s%20lu Hz\n", clk_dump->name,
-					       rate);
+					printf("  %s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
 			}
 		}
 	}

commit 093fdd9f5d78608461c5099f90236d238bd262a1
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Jan 22 16:47:04 2019 +0800

    clk: rockchip: rk3308: print arm enter and init rate
    
    Change-Id: I6df66d7b5dda643dba49ee87c2a2c0544ddbcded
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
index 66f02039d8..0f0b5e43bb 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
@@ -51,7 +51,10 @@ struct rk3308_clk_priv {
 	ulong dpll_hz;
 	ulong vpll0_hz;
 	ulong vpll1_hz;
-	bool is_assigned;
+	ulong armclk_enter_hz;
+	ulong armclk_init_hz;
+	bool sync_kernel;
+	bool set_armclk_rate;
 };
 
 struct rk3308_cru {
diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index 57cf430dc0..fa16d7449c 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -851,7 +851,7 @@ static ulong rk3308_clk_set_rate(struct clk *clk, ulong rate)
 						      priv->cru, DPLL);
 		break;
 	case ARMCLK:
-		if (priv->is_assigned)
+		if (priv->armclk_hz)
 			rk3308_armclk_set_clk(priv, rate);
 		priv->armclk_hz = rate;
 		break;
@@ -1071,13 +1071,23 @@ static int rk3308_clk_probe(struct udevice *dev)
 	struct rk3308_clk_priv *priv = dev_get_priv(dev);
 	int ret;
 
+	priv->sync_kernel = false;
+	if (!priv->armclk_enter_hz)
+		priv->armclk_enter_hz =
+		rockchip_pll_get_rate(&rk3308_pll_clks[APLL],
+				      priv->cru, APLL);
 	rk3308_clk_init(dev);
+	if (!priv->armclk_init_hz)
+		priv->armclk_init_hz =
+		rockchip_pll_get_rate(&rk3308_pll_clks[APLL],
+				      priv->cru, APLL);
 
 	/* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
 	ret = clk_set_defaults(dev);
 	if (ret)
 		debug("%s clk_set_defaults failed %d\n", __func__, ret);
-	priv->is_assigned = true;
+	else
+		priv->sync_kernel = true;
 
 	return 0;
 }
@@ -1152,6 +1162,7 @@ U_BOOT_DRIVER(rockchip_rk3308_cru) = {
 int soc_clk_dump(void)
 {
 	struct udevice *cru_dev;
+	struct rk3308_clk_priv *priv;
 	const struct rk3308_clk_info *clk_dump;
 	struct clk clk;
 	unsigned long clk_count = ARRAY_SIZE(clks_dump);
@@ -1166,7 +1177,13 @@ int soc_clk_dump(void)
 		return ret;
 	}
 
-	printf("CLK:\n");
+	priv = dev_get_priv(cru_dev);
+	printf("CLK: (%s. arm: enter %lu KHz, init %lu KHz, kernel %lu%s)\n",
+	       priv->sync_kernel ? "sync kernel" : "uboot",
+	       priv->armclk_enter_hz / 1000,
+	       priv->armclk_init_hz / 1000,
+	       priv->set_armclk_rate ? priv->armclk_hz / 1000 : 0,
+	       priv->set_armclk_rate ? " KHz" : "N/A");
 	for (i = 0; i < clk_count; i++) {
 		clk_dump = &clks_dump[i];
 		if (clk_dump->name) {
@@ -1179,17 +1196,17 @@ int soc_clk_dump(void)
 			clk_free(&clk);
 			if (i == 0) {
 				if (rate < 0)
-					printf("%s %s\n", clk_dump->name,
+					printf("  %s %s\n", clk_dump->name,
 					       "unknown");
 				else
-					printf("%s %lu KHz\n", clk_dump->name,
+					printf("  %s %lu KHz\n", clk_dump->name,
 					       rate / 1000);
 			} else {
 				if (rate < 0)
-					printf("%s %s\n", clk_dump->name,
+					printf("  %s %s\n", clk_dump->name,
 					       "unknown");
 				else
-					printf("%s %lu KHz\n", clk_dump->name,
+					printf("  %s %lu KHz\n", clk_dump->name,
 					       rate / 1000);
 			}
 		}

commit f7913bc128fda04c904ae306785a5e1257fede2a
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Jan 22 16:37:54 2019 +0800

    clk: rockchip: rk3328: print arm enter and init rate
    
    Change-Id: I80ebeee0d6d8b151061d0bbb0d1d12070dcc6f98
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3328.h b/arch/arm/include/asm/arch-rockchip/cru_rk3328.h
index 06bf1fa092..b2f5a7f466 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3328.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3328.h
@@ -14,6 +14,11 @@ struct rk3328_clk_priv {
 	ulong rate;
 	ulong cpll_hz;
 	ulong gpll_hz;
+	ulong armclk_hz;
+	ulong armclk_enter_hz;
+	ulong armclk_init_hz;
+	bool sync_kernel;
+	bool set_armclk_rate;
 };
 
 struct rk3328_cru {
diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c
index 343baaedcc..e14f44676b 100644
--- a/drivers/clk/rockchip/clk_rk3328.c
+++ b/drivers/clk/rockchip/clk_rk3328.c
@@ -816,7 +816,9 @@ static ulong rk3328_clk_set_rate(struct clk *clk, ulong rate)
 		priv->gpll_hz = rate;
 		break;
 	case ARMCLK:
-		ret = rk3328_armclk_set_clk(priv, rate);
+		if (priv->armclk_hz)
+			ret = rk3328_armclk_set_clk(priv, rate);
+		priv->armclk_hz = rate;
 		break;
 	case ACLK_BUS_PRE:
 	case HCLK_BUS_PRE:
@@ -1202,11 +1204,22 @@ static int rk3328_clk_probe(struct udevice *dev)
 	struct rk3328_clk_priv *priv = dev_get_priv(dev);
 	int ret = 0;
 
+	priv->sync_kernel = false;
+	if (!priv->armclk_enter_hz)
+		priv->armclk_enter_hz =
+		rockchip_pll_get_rate(&rk3328_pll_clks[NPLL],
+				      priv->cru, NPLL);
 	rkclk_init(priv);
+	if (!priv->armclk_init_hz)
+		priv->armclk_init_hz =
+		rockchip_pll_get_rate(&rk3328_pll_clks[NPLL],
+				      priv->cru, NPLL);
 
 	ret = clk_set_defaults(dev);
 	if (ret)
 		debug("%s clk_set_defaults failed %d\n", __func__, ret);
+	else
+		priv->sync_kernel = true;
 
 	return 0;
 }
@@ -1282,6 +1295,7 @@ U_BOOT_DRIVER(rockchip_rk3328_cru) = {
 int soc_clk_dump(void)
 {
 	struct udevice *cru_dev;
+	struct rk3328_clk_priv *priv;
 	const struct rk3328_clk_info *clk_dump;
 	struct clk clk;
 	unsigned long clk_count = ARRAY_SIZE(clks_dump);
@@ -1296,7 +1310,13 @@ int soc_clk_dump(void)
 		return ret;
 	}
 
-	printf("CLK:");
+	priv = dev_get_priv(cru_dev);
+	printf("CLK: (%s. arm: enter %lu KHz, init %lu KHz, kernel %lu%s)\n",
+	       priv->sync_kernel ? "sync kernel" : "uboot",
+	       priv->armclk_enter_hz / 1000,
+	       priv->armclk_init_hz / 1000,
+	       priv->set_armclk_rate ? priv->armclk_hz / 1000 : 0,
+	       priv->set_armclk_rate ? " KHz" : "N/A");
 	for (i = 0; i < clk_count; i++) {
 		clk_dump = &clks_dump[i];
 		if (clk_dump->name) {
@@ -1310,18 +1330,18 @@ int soc_clk_dump(void)
 			clk_free(&clk);
 			if (i == 0) {
 				if (rate < 0)
-					printf("%10s%20s\n", clk_dump->name,
+					printf("  %s %s\n", clk_dump->name,
 					       "unknown");
 				else
-					printf("%10s%20lu Hz\n", clk_dump->name,
-					       rate);
+					printf("  %s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
 			} else {
 				if (rate < 0)
-					printf("%14s%20s\n", clk_dump->name,
+					printf("  %s %s\n", clk_dump->name,
 					       "unknown");
 				else
-					printf("%14s%20lu Hz\n", clk_dump->name,
-					       rate);
+					printf("  %s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
 			}
 		}
 	}

commit ae79bf682763840a3e735dae892825b31dfc8b1e
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Jan 22 16:26:41 2019 +0800

    clk: rockchip: rk3368: print arm enter and init rate
    
    Change-Id: Ib201cf442ce7398bbe8009ce9b7de9dc1f53c587
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3368.h b/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
index fa4e472302..a965129703 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
@@ -57,6 +57,14 @@ check_member(rk3368_cru, emmc_con[1], 0x41c);
 
 struct rk3368_clk_priv {
 	struct rk3368_cru *cru;
+	ulong armlclk_hz;
+	ulong armlclk_enter_hz;
+	ulong armlclk_init_hz;
+	ulong armbclk_hz;
+	ulong armbclk_enter_hz;
+	ulong armbclk_init_hz;
+	bool sync_kernel;
+	bool set_armclk_rate;
 };
 
 enum {
diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c
index 99cd7a6796..a3419b7945 100644
--- a/drivers/clk/rockchip/clk_rk3368.c
+++ b/drivers/clk/rockchip/clk_rk3368.c
@@ -920,8 +920,14 @@ static ulong rk3368_clk_set_rate(struct clk *clk, ulong rate)
 		ret = rkclk_set_pll(priv->cru, clk->id - 1, &pll_config);
 		break;
 	case ARMCLKB:
+		if (priv->armbclk_hz)
+			ret = rk3368_armclk_set_clk(priv, clk->id, rate);
+		priv->armbclk_hz = rate;
+		break;
 	case ARMCLKL:
-		ret = rk3368_armclk_set_clk(priv, clk->id, rate);
+		if (priv->armlclk_hz)
+			ret = rk3368_armclk_set_clk(priv, clk->id, rate);
+		priv->armlclk_hz = rate;
 		break;
 	case SCLK_SPI0 ... SCLK_SPI2:
 		ret = rk3368_spi_set_clk(priv->cru, clk->id, rate);
@@ -1195,13 +1201,24 @@ static int rk3368_clk_probe(struct udevice *dev)
 
 	priv->cru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);
 #endif
+	priv->sync_kernel = false;
+	if (!priv->armlclk_enter_hz)
+		priv->armlclk_enter_hz = rkclk_pll_get_rate(priv->cru, APLLL);
+	if (!priv->armbclk_enter_hz)
+		priv->armbclk_enter_hz = rkclk_pll_get_rate(priv->cru, APLLB);
 #if IS_ENABLED(CONFIG_SPL_BUILD) || IS_ENABLED(CONFIG_TPL_BUILD)
 	rkclk_init(priv->cru);
 #endif
+	if (!priv->armlclk_init_hz)
+		priv->armlclk_init_hz = rkclk_pll_get_rate(priv->cru, APLLL);
+	if (!priv->armbclk_init_hz)
+		priv->armbclk_init_hz = rkclk_pll_get_rate(priv->cru, APLLB);
 	/* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
 	ret = clk_set_defaults(dev);
 	if (ret)
 		debug("%s clk_set_defaults failed %d\n", __func__, ret);
+	else
+		priv->sync_kernel = true;
 	return 0;
 }
 
@@ -1281,6 +1298,7 @@ U_BOOT_DRIVER(rockchip_rk3368_cru) = {
 int soc_clk_dump(void)
 {
 	struct udevice *cru_dev;
+	struct rk3368_clk_priv *priv;
 	const struct rk3368_clk_info *clk_dump;
 	struct clk clk;
 	unsigned long clk_count = ARRAY_SIZE(clks_dump);
@@ -1295,7 +1313,19 @@ int soc_clk_dump(void)
 		return ret;
 	}
 
-	printf("CLK:");
+	priv = dev_get_priv(cru_dev);
+	printf("CLK: (%s. arml: enter %lu KHz, init %lu KHz, kernel %lu%s)\n",
+	       priv->sync_kernel ? "sync kernel" : "uboot",
+	       priv->armlclk_enter_hz / 1000,
+	       priv->armlclk_init_hz / 1000,
+	       priv->set_armclk_rate ? priv->armlclk_hz / 1000 : 0,
+	       priv->set_armclk_rate ? " KHz" : "N/A");
+	printf("CLK: (%s. armb: enter %lu KHz, init %lu KHz, kernel %lu%s)\n",
+	       priv->sync_kernel ? "sync kernel" : "uboot",
+	       priv->armbclk_enter_hz / 1000,
+	       priv->armbclk_init_hz / 1000,
+	       priv->set_armclk_rate ? priv->armlclk_hz / 1000 : 0,
+	       priv->set_armclk_rate ? " KHz" : "N/A");
 	for (i = 0; i < clk_count; i++) {
 		clk_dump = &clks_dump[i];
 		if (clk_dump->name) {
@@ -1309,18 +1339,18 @@ int soc_clk_dump(void)
 			clk_free(&clk);
 			if (i == 0) {
 				if (rate < 0)
-					printf("%10s%20s\n", clk_dump->name,
+					printf("  %s %s\n", clk_dump->name,
 					       "unknown");
 				else
-					printf("%10s%20lu Hz\n", clk_dump->name,
-					       rate);
+					printf("  %s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
 			} else {
 				if (rate < 0)
-					printf("%14s%20s\n", clk_dump->name,
+					printf("  %s %s\n", clk_dump->name,
 					       "unknown");
 				else
-					printf("%14s%20lu Hz\n", clk_dump->name,
-					       rate);
+					printf("  %s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
 			}
 		}
 	}

commit 08e6e2645ecfac80e6d7c2c5d8a512d9d4058f10
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jan 21 18:04:03 2019 +0800

    configs: rk3326/px30: remove unused modules
    
    decrease 66KB size
    
    Change-Id: If826264d06960317c0d436fa115432e6e2575c25
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 332243d214..d85444a6cd 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -28,16 +28,30 @@ CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_LZMADEC is not set
+# CONFIG_CMD_UNZIP is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
 CONFIG_CMD_GPT=y
-CONFIG_CMD_LOAD_ANDROID=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_NET is not set
+# CONFIG_CMD_MISC is not set
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
@@ -115,6 +129,7 @@ CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
+# CONFIG_EFI_LOADER is not set
 CONFIG_OPTEE_CLIENT=y
 CONFIG_OPTEE_V2=y
 CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
diff --git a/configs/evb-rk3326_defconfig b/configs/evb-rk3326_defconfig
index e7e6d9569a..7f0192c2bb 100644
--- a/configs/evb-rk3326_defconfig
+++ b/configs/evb-rk3326_defconfig
@@ -30,15 +30,29 @@ CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_FASTBOOT_OEM_UNLOCK=y
+# CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_LZMADEC is not set
+# CONFIG_CMD_UNZIP is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
 CONFIG_CMD_GPT=y
-CONFIG_CMD_LOAD_ANDROID=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_MISC is not set
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
@@ -109,6 +123,7 @@ CONFIG_SPL_TINY_MEMSET=y
 CONFIG_LZ4=y
 CONFIG_LZO=y
 CONFIG_ERRNO_STR=y
+# CONFIG_EFI_LOADER is not set
 CONFIG_OPTEE_CLIENT=y
 CONFIG_OPTEE_V2=y
 CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
diff --git a/configs/rk3326_defconfig b/configs/rk3326_defconfig
index 475f391b60..ab40b9e0e4 100644
--- a/configs/rk3326_defconfig
+++ b/configs/rk3326_defconfig
@@ -31,16 +31,30 @@ CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_FASTBOOT_OEM_UNLOCK=y
+# CONFIG_CMD_BOOTD is not set
 CONFIG_CMD_DTIMG=y
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_LZMADEC is not set
+# CONFIG_CMD_UNZIP is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
 CONFIG_CMD_GPT=y
-CONFIG_CMD_LOAD_ANDROID=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_MISC is not set
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
@@ -110,6 +124,7 @@ CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
 CONFIG_OF_LIBFDT_OVERLAY=y
+# CONFIG_EFI_LOADER is not set
 CONFIG_AVB_LIBAVB=y
 CONFIG_AVB_LIBAVB_AB=y
 CONFIG_AVB_LIBAVB_ATX=y

commit 044bc79de91b458ae1047cab33ab2ea910485e4e
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Jan 22 16:04:28 2019 +0800

    clk: rockchip: rk3399: print arm enter and init rate
    
    Change-Id: Ib5e3e0f9a3e1a5b535ec852e7c58966dc0db77cf
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
index 78d7066ac3..55d09af7ea 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
@@ -12,6 +12,14 @@
 /* Private data for the clock driver - used by rockchip_get_cru() */
 struct rk3399_clk_priv {
 	struct rk3399_cru *cru;
+	ulong armlclk_hz;
+	ulong armlclk_enter_hz;
+	ulong armlclk_init_hz;
+	ulong armbclk_hz;
+	ulong armbclk_enter_hz;
+	ulong armbclk_init_hz;
+	bool sync_kernel;
+	bool set_armclk_rate;
 };
 
 struct rk3399_pmuclk_priv {
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 993bf57867..814f43772e 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -1465,7 +1465,21 @@ static int rk3399_clk_probe(struct udevice *dev)
 
 	priv->cru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);
 #endif
+
+	priv->sync_kernel = false;
+	if (!priv->armlclk_enter_hz)
+		priv->armlclk_enter_hz =
+		rkclk_pll_get_rate(&priv->cru->apll_l_con[0]);
+	if (!priv->armbclk_enter_hz)
+		priv->armbclk_enter_hz =
+		rkclk_pll_get_rate(&priv->cru->apll_b_con[0]);
 	rkclk_init(priv->cru);
+	if (!priv->armlclk_init_hz)
+		priv->armlclk_init_hz =
+		rkclk_pll_get_rate(&priv->cru->apll_l_con[0]);
+	if (!priv->armbclk_init_hz)
+		priv->armbclk_init_hz =
+		rkclk_pll_get_rate(&priv->cru->apll_b_con[0]);
 	return 0;
 }
 
@@ -1741,6 +1755,7 @@ U_BOOT_DRIVER(rockchip_rk3399_pmuclk) = {
 int soc_clk_dump(void)
 {
 	struct udevice *cru_dev, *pmucru_dev;
+	struct rk3399_clk_priv *priv;
 	const struct rk3399_clk_info *clk_dump;
 	struct clk clk;
 	unsigned long clk_count = ARRAY_SIZE(clks_dump);
@@ -1763,7 +1778,19 @@ int soc_clk_dump(void)
 		return ret;
 	}
 
-	printf("CLK:\n");
+	priv = dev_get_priv(cru_dev);
+	printf("CLK: (%s. arml: enter %lu KHz, init %lu KHz, kernel %lu%s)\n",
+	       priv->sync_kernel ? "sync kernel" : "uboot",
+	       priv->armlclk_enter_hz / 1000,
+	       priv->armlclk_init_hz / 1000,
+	       priv->set_armclk_rate ? priv->armlclk_hz / 1000 : 0,
+	       priv->set_armclk_rate ? " KHz" : "N/A");
+	printf("CLK: (%s. armb: enter %lu KHz, init %lu KHz, kernel %lu%s)\n",
+	       priv->sync_kernel ? "sync kernel" : "uboot",
+	       priv->armbclk_enter_hz / 1000,
+	       priv->armbclk_init_hz / 1000,
+	       priv->set_armclk_rate ? priv->armbclk_hz / 1000 : 0,
+	       priv->set_armclk_rate ? " KHz" : "N/A");
 	for (i = 0; i < clk_count; i++) {
 		clk_dump = &clks_dump[i];
 		if (clk_dump->name) {
@@ -1779,17 +1806,17 @@ int soc_clk_dump(void)
 			clk_free(&clk);
 			if (i == 0) {
 				if (rate < 0)
-					printf("%s %s\n", clk_dump->name,
+					printf("  %s %s\n", clk_dump->name,
 					       "unknown");
 				else
-					printf("%s %lu KHz\n", clk_dump->name,
+					printf("  %s %lu KHz\n", clk_dump->name,
 					       rate / 1000);
 			} else {
 				if (rate < 0)
-					printf("%s %s\n", clk_dump->name,
+					printf("  %s %s\n", clk_dump->name,
 					       "unknown");
 				else
-					printf("%s %lu KHz\n", clk_dump->name,
+					printf("  %s %lu KHz\n", clk_dump->name,
 					       rate / 1000);
 			}
 		}

commit dfce009693a2052aaa4dd12073f3f2462ab13816
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Jan 22 15:34:44 2019 +0800

    clk: rockchip: px30: print arm enter and init rate
    
    Change-Id: I0d2a1c6bb92397210314322fd147c4a8a6e81abd
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_px30.h b/arch/arm/include/asm/arch-rockchip/cru_px30.h
index 322e962ebf..87d32154e8 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_px30.h
@@ -43,6 +43,10 @@ struct px30_clk_priv {
 	struct px30_cru *cru;
 	ulong gpll_hz;
 	ulong armclk_hz;
+	ulong armclk_enter_hz;
+	ulong armclk_init_hz;
+	bool sync_kernel;
+	bool set_armclk_rate;
 };
 
 struct px30_pmuclk_priv {
diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c
index 23dd428861..84bf8cb7a6 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -204,6 +204,7 @@ int set_armclk_rate(void)
 		printf("Failed to set armclk %lu\n", priv->armclk_hz);
 		return ret;
 	}
+	priv->set_armclk_rate = true;
 
 	return 0;
 }
diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 88f44406fe..b36f16bc3e 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -1436,16 +1436,24 @@ static int px30_clk_probe(struct udevice *dev)
 	struct px30_clk_priv *priv = dev_get_priv(dev);
 	int ret;
 
+	priv->sync_kernel = false;
+	if (!priv->armclk_enter_hz) {
+		priv->armclk_enter_hz = px30_clk_get_pll_rate(priv, APLL);
+		priv->armclk_init_hz = priv->armclk_enter_hz;
+	}
 	if (px30_clk_get_pll_rate(priv, APLL) != APLL_HZ) {
 		ret = px30_armclk_set_clk(priv, APLL_HZ);
 		if (ret < 0)
 			printf("%s failed to set armclk rate\n", __func__);
+		priv->armclk_init_hz = APLL_HZ;
 	}
 
 	/* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
 	ret = clk_set_defaults(dev);
 	if (ret)
 		debug("%s clk_set_defaults failed %d\n", __func__, ret);
+	else
+		priv->sync_kernel = true;
 
 	if (!priv->gpll_hz) {
 		ret = px30_clk_get_gpll_rate(&priv->gpll_hz);
@@ -1759,6 +1767,7 @@ U_BOOT_DRIVER(rockchip_px30_pmucru) = {
 int soc_clk_dump(void)
 {
 	struct udevice *cru_dev, *pmucru_dev;
+	struct px30_clk_priv *priv;
 	const struct px30_clk_info *clk_dump;
 	struct clk clk;
 	unsigned long clk_count = ARRAY_SIZE(clks_dump);
@@ -1781,7 +1790,13 @@ int soc_clk_dump(void)
 		return ret;
 	}
 
-	printf("CLK:\n");
+	priv = dev_get_priv(cru_dev);
+	printf("CLK: (%s. arm: enter %lu KHz, init %lu KHz, kernel %lu%s)\n",
+	       priv->sync_kernel ? "sync kernel" : "uboot",
+	       priv->armclk_enter_hz / 1000,
+	       priv->armclk_init_hz / 1000,
+	       priv->set_armclk_rate ? priv->armclk_hz / 1000 : 0,
+	       priv->set_armclk_rate ? " KHz" : "N/A");
 	for (i = 0; i < clk_count; i++) {
 		clk_dump = &clks_dump[i];
 		if (clk_dump->name) {
@@ -1797,17 +1812,17 @@ int soc_clk_dump(void)
 			clk_free(&clk);
 			if (i == 0) {
 				if (rate < 0)
-					printf("%s %s\n", clk_dump->name,
+					printf("  %s %s\n", clk_dump->name,
 					       "unknown");
 				else
-					printf("%s %lu KHz\n", clk_dump->name,
+					printf("  %s %lu KHz\n", clk_dump->name,
 					       rate / 1000);
 			} else {
 				if (rate < 0)
-					printf("%s %s\n", clk_dump->name,
+					printf("  %s %s\n", clk_dump->name,
 					       "unknown");
 				else
-					printf("%s %lu KHz\n", clk_dump->name,
+					printf("  %s %lu KHz\n", clk_dump->name,
 					       rate / 1000);
 			}
 		}

commit ed6f5d94b59b4f371f82d6059b88187c1583c0c4
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Jan 22 15:18:46 2019 +0800

    clk: rockchip: rk1808: print arm enter and init rate
    
    Change-Id: I14f0b0c95b1367266fe9c64050a602ad58208d53
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk1808.h b/arch/arm/include/asm/arch-rockchip/cru_rk1808.h
index 1c7976460d..ad97d41332 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk1808.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk1808.h
@@ -38,6 +38,10 @@ struct rk1808_clk_priv {
 	ulong cpll_hz;
 	ulong gpll_hz;
 	ulong npll_hz;
+	ulong armclk_enter_hz;
+	ulong armclk_init_hz;
+	bool sync_kernel;
+	bool set_armclk_rate;
 };
 
 struct rk1808_pll {
diff --git a/drivers/clk/rockchip/clk_rk1808.c b/drivers/clk/rockchip/clk_rk1808.c
index 4eddd0aaa9..9639065fc4 100644
--- a/drivers/clk/rockchip/clk_rk1808.c
+++ b/drivers/clk/rockchip/clk_rk1808.c
@@ -1072,11 +1072,19 @@ static int rk1808_clk_probe(struct udevice *dev)
 	struct rk1808_clk_priv *priv = dev_get_priv(dev);
 	int ret;
 
+	priv->sync_kernel = false;
+	if (!priv->armclk_enter_hz) {
+		priv->armclk_enter_hz =
+		rockchip_pll_get_rate(&rk1808_pll_clks[APLL],
+				      priv->cru, APLL);
+		priv->armclk_init_hz = priv->armclk_enter_hz;
+	}
 	if (rockchip_pll_get_rate(&rk1808_pll_clks[APLL],
 				  priv->cru, APLL) != APLL_HZ) {
 		ret = rk1808_armclk_set_clk(priv, APLL_HZ);
 		if (ret < 0)
 			printf("%s failed to set armclk rate\n", __func__);
+		priv->armclk_init_hz = APLL_HZ;
 	}
 
 	priv->cpll_hz = rockchip_pll_get_rate(&rk1808_pll_clks[CPLL],
@@ -1090,6 +1098,8 @@ static int rk1808_clk_probe(struct udevice *dev)
 	ret = clk_set_defaults(dev);
 	if (ret)
 		debug("%s clk_set_defaults failed %d\n", __func__, ret);
+	else
+		priv->sync_kernel = true;
 
 	return 0;
 }
@@ -1165,6 +1175,7 @@ U_BOOT_DRIVER(rockchip_rk1808_cru) = {
 int soc_clk_dump(void)
 {
 	struct udevice *cru_dev;
+	struct rk1808_clk_priv *priv;
 	const struct rk1808_clk_info *clk_dump;
 	struct clk clk;
 	unsigned long clk_count = ARRAY_SIZE(clks_dump);
@@ -1179,7 +1190,14 @@ int soc_clk_dump(void)
 		return ret;
 	}
 
-	printf("CLK:");
+	priv = dev_get_priv(cru_dev);
+	printf("CLK: (%s. arm: enter %lu KHz, init %lu KHz, kernel %lu%s)\n",
+	       priv->sync_kernel ? "sync kernel" : "uboot",
+	       priv->armclk_enter_hz / 1000,
+	       priv->armclk_init_hz / 1000,
+	       priv->set_armclk_rate ? priv->armclk_hz / 1000 : 0,
+	       priv->set_armclk_rate ? " KHz" : "N/A");
+
 	for (i = 0; i < clk_count; i++) {
 		clk_dump = &clks_dump[i];
 		if (clk_dump->name) {
@@ -1193,17 +1211,17 @@ int soc_clk_dump(void)
 			clk_free(&clk);
 			if (i == 0) {
 				if (rate < 0)
-					printf("%s %s\n", clk_dump->name,
+					printf("  %s %s\n", clk_dump->name,
 					       "unknown");
 				else
-					printf("%s %lu KHz\n", clk_dump->name,
+					printf("  %s %lu KHz\n", clk_dump->name,
 					       rate / 1000);
 			} else {
 				if (rate < 0)
-					printf("%s %s\n", clk_dump->name,
+					printf("  %s %s\n", clk_dump->name,
 					       "unknown");
 				else
-					printf("%s %lu KHz\n", clk_dump->name,
+					printf("  %s %lu KHz\n", clk_dump->name,
 					       rate / 1000);
 			}
 		}

commit 231617c5abac65038e7732b2eb3a946fd9f66f72
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 21 17:59:06 2019 +0800

    rockchip: update TPL_MAX_SIZE for rk3288
    
    RK3288 sram size can be used for TPL is 32768
    
    Change-Id: I1b0ae5209d97f59b53349f6787439090539a5ac0
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index c16ad23909..7c6a22d51f 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -202,7 +202,7 @@ config TPL_TEXT_BASE
 	default 0xff704000
 
 config TPL_MAX_SIZE
-	default 28672
+	default 32768
 
 config TPL_STACK
 	default 0xff718000

commit 2a987bff2b84c0e01aa6accaa1541c555dcbc843
Author: Chen Jinsen <kevin.chen@rock-chips.com>
Date:   Mon Jan 14 16:57:56 2019 +0800

    configs: rk3288: enable avb for Android P
    
    Change-Id: Ie06e7b32dcb49dbf385148a4b4414a2c5fefb36f
    Signed-off-by: Chen Jinsen <kevin.chen@rock-chips.com>

diff --git a/configs/rk3288_defconfig b/configs/rk3288_defconfig
index 96254a3f4f..318078ca23 100644
--- a/configs/rk3288_defconfig
+++ b/configs/rk3288_defconfig
@@ -94,3 +94,13 @@ CONFIG_USE_TINY_PRINTF=y
 CONFIG_CMD_DHRYSTONE=y
 CONFIG_ERRNO_STR=y
 CONFIG_TEST_ROCKCHIP=y
+CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V1=y
+CONFIG_CMD_MMC=y
+CONFIG_ANDROID_AVB=y
+CONFIG_AVB_LIBAVB=y
+CONFIG_AVB_LIBAVB_AB=y
+CONFIG_AVB_LIBAVB_ATX=y
+CONFIG_AVB_LIBAVB_USER=y
+CONFIG_RK_AVB_LIBAVB_USER=y
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index fe1abcb2d5..957f05735c 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -16,7 +16,7 @@
 #endif
 
 #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
-#define CONFIG_SYS_MALLOC_LEN		(32 << 20)
+#define CONFIG_SYS_MALLOC_LEN		(192 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 
 #define CONFIG_SPL_FRAMEWORK
@@ -33,6 +33,8 @@
 
 #define CONFIG_ROCKUSB_G_DNL_PID	0x320A
 
+#define CONFIG_SUPPORT_EMMC_RPMB
+
 /* MMC/SD IP block */
 #define CONFIG_BOUNCE_BUFFER
 

commit 8094aeb8cd9d7d6dc6134ebbdcc3859c6f98fff4
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Jan 7 17:55:24 2019 -0800

    clk: rockchip: rv1108: add NANDC and SFC clk init
    
    Currently RV1108 run in 1.2G GPLL.
    NANDC need 1200 / 8 div = 150MHz.
    SFC need 1200 / 12 div = 100MHz.
    
    Change-Id: Ia3f401b0cf13587209d0d68d76a9891dd3bcf990
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rv1108.h b/arch/arm/include/asm/arch-rockchip/cru_rv1108.h
index d220d0d3ff..0d1c1b0ae3 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rv1108.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rv1108.h
@@ -193,6 +193,13 @@ enum {
 	EMMC_CLK_DIV_MASK	= 0xff << EMMC_CLK_DIV_SHIFT,
 
 	/* CLKSEL27_CON */
+	NANDC_PLL_SEL_SHIFT     = 14,
+	NANDC_PLL_SEL_MASK      = 3 << NANDC_PLL_SEL_SHIFT,
+	NANDC_PLL_SEL_CPLL      = 0,
+	NANDC_PLL_SEL_GPLL,
+	NANDC_CLK_DIV_SHIFT     = 8,
+	NANDC_CLK_DIV_MASK      = 0x1f << NANDC_CLK_DIV_SHIFT,
+
 	SFC_PLL_SEL_SHIFT		= 7,
 	SFC_PLL_SEL_MASK		= 1 << SFC_PLL_SEL_SHIFT,
 	SFC_PLL_SEL_DPLL		= 0,
diff --git a/drivers/clk/rockchip/clk_rv1108.c b/drivers/clk/rockchip/clk_rv1108.c
index 5dcc2f723c..4aeaf3a34e 100644
--- a/drivers/clk/rockchip/clk_rv1108.c
+++ b/drivers/clk/rockchip/clk_rv1108.c
@@ -652,6 +652,14 @@ static void rkclk_init(struct rv1108_cru *cru)
 
 	rk_clrsetreg(&cru->clksel_con[0], CORE_CLK_DIV_MASK,
 		     0 << MAC_CLK_DIV_SHIFT);
+	rk_clrsetreg(&cru->clksel_con[27],
+		     NANDC_PLL_SEL_MASK | NANDC_CLK_DIV_MASK,
+		     NANDC_PLL_SEL_GPLL << NANDC_PLL_SEL_SHIFT |
+		     7 << NANDC_CLK_DIV_SHIFT);
+	rk_clrsetreg(&cru->clksel_con[27],
+		     SFC_PLL_SEL_MASK | SFC_CLK_DIV_MASK,
+		     SFC_PLL_SEL_GPLL << SFC_PLL_SEL_SHIFT |
+		     11 << SFC_CLK_DIV_SHIFT);
 
 	printf("APLL: %d DPLL:%d GPLL:%d\n", apll, dpll, gpll);
 	printf("ACLK_BUS: %d ACLK_PERI:%d HCLK_PERI:%d PCLK_PERI:%d\n",

commit 2400e5a499a5c384de1c26d7246a2c05f8c3e5ea
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Tue Jan 22 14:13:43 2019 +0800

    video/drm: Kconfig: select generic phy by default
    
    Change-Id: I07fa63bfc1e03ed87c78555cb96d106c603d083a
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/Kconfig b/drivers/video/drm/Kconfig
index b2663d8f96..635e66b4ef 100644
--- a/drivers/video/drm/Kconfig
+++ b/drivers/video/drm/Kconfig
@@ -2,6 +2,7 @@ menuconfig DRM_ROCKCHIP
 	bool "Rockchip DRM Support"
 	depends on DM_VIDEO && OF_LIVE
 	select VIDEO_BRIDGE
+	select PHY
 	help
 	  Rockchip SoCs provide video output capabilities for High-Definition
 	  Multimedia Interface (HDMI), Low-voltage Differential Signalling

commit 2dfbc57d3acb669a9ec492014a5293aac8741261
Author: Zorro Liu <lyx@rock-chips.com>
Date:   Tue Jan 22 16:03:21 2019 +0800

    configs: rk3368_defconfig: enable avb for rk3368
    
    Change-Id: I5180c70ef3cc4c1a091f1247ef0c4c4ba3800ed7
    Signed-off-by: Zorro Liu <lyx@rock-chips.com>

diff --git a/configs/rk3368_defconfig b/configs/rk3368_defconfig
index 99da2a421b..dbfab2d6ce 100644
--- a/configs/rk3368_defconfig
+++ b/configs/rk3368_defconfig
@@ -16,7 +16,6 @@ CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
-CONFIG_FASTBOOT_OEM_UNLOCK=y
 CONFIG_CMD_DTIMG=y
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
@@ -102,4 +101,11 @@ CONFIG_OF_LIBFDT_OVERLAY=y
 # CONFIG_EFI_LOADER is not set
 CONFIG_OPTEE_CLIENT=y
 CONFIG_OPTEE_V1=y
+CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
+CONFIG_ANDROID_AVB=y
+CONFIG_AVB_LIBAVB=y
+CONFIG_AVB_LIBAVB_AB=y
+CONFIG_AVB_LIBAVB_ATX=y
+CONFIG_AVB_LIBAVB_USER=y
+CONFIG_RK_AVB_LIBAVB_USER=y
 CONFIG_TEST_ROCKCHIP=y
diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h
index 1af7e3db4e..e7f4178f0c 100644
--- a/include/configs/rk3368_common.h
+++ b/include/configs/rk3368_common.h
@@ -17,7 +17,7 @@
 #define CONFIG_SYS_SDRAM_BASE		0
 #define SDRAM_MAX_SIZE			0xff000000
 #define CONFIG_BAUDRATE			115200
-#define CONFIG_SYS_MALLOC_LEN		(32 << 20)
+#define CONFIG_SYS_MALLOC_LEN		(192 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
 

commit e92f47e4697f84ac102d1e52e1df25d512024ecd
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jan 16 09:43:42 2019 +0800

    android: test the vbmeta to enable avb
    
    Change-Id: I36d6473a247ab7fc012ceb9a7c9a43e14e701611
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index e194e1d428..6419946131 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -28,6 +28,7 @@
 #define ANDROID_PARTITION_OEM  "oem"
 #define ANDROID_PARTITION_RECOVERY  "recovery"
 #define ANDROID_PARTITION_SYSTEM "system"
+#define ANDROID_PARTITION_VBMETA "vbmeta"
 
 #define ANDROID_ARG_SLOT_SUFFIX "androidboot.slot_suffix="
 #define ANDROID_ARG_ROOT "root="
@@ -937,6 +938,8 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 
 #ifdef CONFIG_ANDROID_AVB
 	uint8_t vboot_flag = 0;
+	char vbmeta_partition[9] = {0};
+	disk_partition_t vbmeta_part_info;
 
 	if (trusty_read_vbootkey_enable_flag(&vboot_flag))
 		return -1;
@@ -947,11 +950,23 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 					slot_suffix))
 			return -1;
 	} else {
-		printf("SecureBoot disabled, AVB skip\n");
-		env_update("bootargs", "androidboot.verifiedbootstate=orange");
-		if (load_android_image(dev_desc, boot_partname,
-				       slot_suffix, &load_address))
-			return -1;
+		strcat(vbmeta_partition, ANDROID_PARTITION_VBMETA);
+		strcat(vbmeta_partition, slot_suffix);
+		part_num = part_get_info_by_name(dev_desc, vbmeta_partition,
+						 &vbmeta_part_info);
+		if (part_num < 0) {
+			printf("SecureBoot disabled, AVB skip\n");
+			env_update("bootargs",
+				   "androidboot.verifiedbootstate=orange");
+			if (load_android_image(dev_desc, boot_partname,
+					       slot_suffix, &load_address))
+				return -1;
+		} else {
+			printf("SecureBoot enabled, AVB verify\n");
+			if (android_slot_verify(boot_partname, &load_address,
+						slot_suffix))
+				return -1;
+		}
 	}
 #else
 	/*

commit 4b87bf17eae2049773ce151114b5f09321d2e8ab
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Jan 21 19:34:45 2019 -0800

    configs: rk1808: enable SFC NAND
    
    1.enable SFC NAND
    2.change RKNAND to RKNANDC_NAND
    
    Change-Id: I788ed281d039a42d6ba1810d6960e1fc7c919180
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/configs/rk1808_defconfig b/configs/rk1808_defconfig
index 5a66cb55d2..5ccc2606d1 100644
--- a/configs/rk1808_defconfig
+++ b/configs/rk1808_defconfig
@@ -64,8 +64,9 @@ CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_DM_RESET=y
-CONFIG_RKNAND=y
 CONFIG_RKFLASH=y
+CONFIG_RKNANDC_NAND=y
+CONFIG_RKSFC_NAND=y
 CONFIG_RKSFC_NOR=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xff550000

commit 5aae54de7848d71d53913f773fa0c1a6bfea21ce
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Sun Jun 3 16:50:20 2018 +0200

    UPSTREAM: rockchip: evb-rk3399: correct README for board bring up
    
    %s/rkflashtool/rkdeveloptool/
    
    We are using rkdeveloptool not rkflashtool.
    
    Change-Id: Icca82ca411f06d3ec5f578d8e4ac53fbbc486868
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 19ee1fae097325c7af4f18956c903d3ad15b43b7)

diff --git a/board/rockchip/evb_rk3399/README b/board/rockchip/evb_rk3399/README
index 1b9a6ff09b..b7a7448957 100644
--- a/board/rockchip/evb_rk3399/README
+++ b/board/rockchip/evb_rk3399/README
@@ -61,7 +61,7 @@ Compile the U-Boot
 Compile the rkdeveloptool
 =======================
   Follow instructions in latest README
-  > cd ../rkflashtool
+  > cd ../rkdeveloptool
   > autoreconf -i
   > ./configure
   > make

commit b0df67a8f7ccce251e6c758f4bc186331cabbf44
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jan 18 14:57:58 2019 +0800

    include: rk3188: move fdt to 131M and ramdisk to 162M
    
    It avoids fdt overlap with large boot.img/recovery.img, moving
    fdt ahead of boot.img/recovery.img and moving ramdisk backward
    is safer.
    
    Change-Id: I362ff778dbdae42e667dcfc054dc1a0f5e06aa6c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h
index 4d52e59a4d..cec22aacbe 100644
--- a/include/configs/rk3188_common.h
+++ b/include/configs/rk3188_common.h
@@ -64,9 +64,9 @@
 #define ENV_MEM_LAYOUT_SETTINGS \
 	"scriptaddr=0x60000000\0" \
 	"pxefile_addr_r=0x60100000\0" \
-	"fdt_addr_r=0x61f00000\0" \
+	"fdt_addr_r=0x68300000\0" \
 	"kernel_addr_r=0x62000000\0" \
-	"ramdisk_addr_r=0x64000000\0"
+	"ramdisk_addr_r=0x6a200000\0"
 
 #include <config_distro_bootcmd.h>
 

commit e8f1e17334d5e85589a00459f01edaf4b5f2f7c7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jan 18 14:57:26 2019 +0800

    include: rk3128: move fdt to 131M and ramdisk to 162M
    
    It avoids fdt overlap with large boot.img/recovery.img, moving
    fdt ahead of boot.img/recovery.img and moving ramdisk backward
    is safer.
    
    Change-Id: I229d5a996c445c1f956e51f0b35e43aa48cbcd1c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h
index fd7fce2c80..aaa2d22684 100644
--- a/include/configs/rk3128_common.h
+++ b/include/configs/rk3128_common.h
@@ -55,9 +55,9 @@
 #define ENV_MEM_LAYOUT_SETTINGS \
 	"scriptaddr=0x60500000\0" \
 	"pxefile_addr_r=0x60600000\0" \
-	"fdt_addr_r=0x61f00000\0" \
+	"fdt_addr_r=0x68300000\0" \
 	"kernel_addr_r=0x62008000\0" \
-	"ramdisk_addr_r=0x64000000\0"
+	"ramdisk_addr_r=0x6a200000\0"
 
 #include <config_distro_bootcmd.h>
 #define CONFIG_EXTRA_ENV_SETTINGS \

commit 1b0a5f9d2c0ffd70e9c2b5ae3cc614e6864afc20
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jan 18 14:57:10 2019 +0800

    include: rk3036: move fdt to 131M and ramdisk to 162M
    
    It avoids fdt overlap with large boot.img/recovery.img, moving
    fdt ahead of boot.img/recovery.img and moving ramdisk backward
    is safer.
    
    Change-Id: I6445227d6e36c4625a0c6badaf00c0cad0c9211c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3066_common.h b/include/configs/rk3066_common.h
index 3f1b20f540..b5a0a66d2e 100644
--- a/include/configs/rk3066_common.h
+++ b/include/configs/rk3066_common.h
@@ -72,9 +72,9 @@
 #define ENV_MEM_LAYOUT_SETTINGS \
 	"scriptaddr=0x60000000\0" \
 	"pxefile_addr_r=0x60100000\0" \
-	"fdt_addr_r=0x61f00000\0" \
+	"fdt_addr_r=0x68300000\0" \
 	"kernel_addr_r=0x62000000\0" \
-	"ramdisk_addr_r=0x64000000\0"
+	"ramdisk_addr_r=0x6a200000\0"
 
 #include <config_distro_bootcmd.h>
 

commit 8dc327b1d8fc3adae57b1fa06c868d40990bc296
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jan 18 14:56:32 2019 +0800

    include: rk3066: move fdt to 131M and ramdisk to 162M
    
    It avoids fdt overlap with large boot.img/recovery.img, moving
    fdt ahead of boot.img/recovery.img and moving ramdisk backward
    is safer.
    
    Change-Id: Ida5470874e8373026112236db59d30ebd9c58f37
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index fec756cf7f..b45f92600a 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -53,9 +53,9 @@
 #define ENV_MEM_LAYOUT_SETTINGS \
 	"scriptaddr=0x60000000\0" \
 	"pxefile_addr_r=0x60100000\0" \
-	"fdt_addr_r=0x61f00000\0" \
+	"fdt_addr_r=0x68300000\0" \
 	"kernel_addr_r=0x62000000\0" \
-	"ramdisk_addr_r=0x64000000\0"
+	"ramdisk_addr_r=0x6a200000\0"
 
 #include <config_distro_bootcmd.h>
 

commit fe8a91a82898d166e9f20888231fd37463990bf8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jan 18 14:52:03 2019 +0800

    include: rk322x: move fdt to 131M and ramdisk to 162M
    
    It avoids fdt overlap with large boot.img/recovery.img, moving
    fdt ahead of boot.img/recovery.img and moving ramdisk backward
    is safer.
    
    Change-Id: I01219b35b64148b4ae14bc45d69d14a3ef2e62b0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h
index 947bb176e2..d9935dd6c8 100644
--- a/include/configs/rk322x_common.h
+++ b/include/configs/rk322x_common.h
@@ -44,9 +44,9 @@
 #define ENV_MEM_LAYOUT_SETTINGS \
 	"scriptaddr=0x60000000\0" \
 	"pxefile_addr_r=0x60100000\0" \
-	"fdt_addr_r=0x61f00000\0" \
+	"fdt_addr_r=0x68300000\0" \
 	"kernel_addr_r=0x62008000\0" \
-	"ramdisk_addr_r=0x64000000\0"
+	"ramdisk_addr_r=0x6a200000\0"
 
 #include <config_distro_bootcmd.h>
 

commit ad4a812d55f9b4811cc4c3b5e90a8863c7e4c4e9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jan 18 14:51:22 2019 +0800

    include: px30: move fdt to 131M
    
    It avoids fdt overlap with large boot.img/recovery.img, moving
    fdt ahead of boot.img/recovery.img is safer.
    
    Change-Id: I7337924f9e09f8616577ddf8ca1e22d31a77e599
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index 65335ce05d..4a4e72ba75 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -55,7 +55,7 @@
 #define ENV_MEM_LAYOUT_SETTINGS \
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
-	"fdt_addr_r=0x01f00000\0" \
+	"fdt_addr_r=0x08300000\0" \
 	"kernel_addr_r=0x00280000\0" \
 	"kernel_addr_c=0x03e80000\0" \
 	"ramdisk_addr_r=0x0a200000\0"

commit d499418e4f2df13271f7519fe04b25b55b46df9c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jan 18 14:50:39 2019 +0800

    include: rk3288: move fdt to 131M and ramdisk to 162M
    
    It avoids fdt overlap with large boot.img/recovery.img, moving
    fdt ahead of boot.img/recovery.img and moving ramdisk backward
    is safer.
    
    Change-Id: I20248525ff5b99719bc9f7d0608723f67b728a7e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index a5f4a86faf..fe1abcb2d5 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -63,9 +63,9 @@
 #define ENV_MEM_LAYOUT_SETTINGS \
 	"scriptaddr=0x00000000\0" \
 	"pxefile_addr_r=0x00100000\0" \
-	"fdt_addr_r=0x01f00000\0" \
+	"fdt_addr_r=0x08300000\0" \
 	"kernel_addr_r=0x02008000\0" \
-	"ramdisk_addr_r=0x04000000\0"
+	"ramdisk_addr_r=0x0a200000\0"
 
 #include <config_distro_bootcmd.h>
 

commit d9342fe94ad81cbb918f930dc248ff054f812a28
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jan 18 14:46:14 2019 +0800

    include: rk3328: move fdt to 131M and ramdisk to 162M
    
    It avoids fdt overlap with large boot.img/recovery.img, moving
    fdt ahead of boot.img/recovery.img and moving ramdisk backward
    is safer.
    
    Change-Id: I8a74d0749bd76905a8ce8699bbf9eb6fb180c00e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index 76ed911ef2..34608712fc 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -58,9 +58,9 @@
 #define ENV_MEM_LAYOUT_SETTINGS \
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
-	"fdt_addr_r=0x01f00000\0" \
+	"fdt_addr_r=0x08300000\0" \
 	"kernel_addr_r=0x00280000\0" \
-	"ramdisk_addr_r=0x04000000\0"
+	"ramdisk_addr_r=0x0a200000\0"
 
 #include <config_distro_bootcmd.h>
 #define CONFIG_EXTRA_ENV_SETTINGS \

commit 35cad2073f7d34b4e6bd89987dbdc17a831aab78
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jan 18 14:45:06 2019 +0800

    include: rk3368: move fdt addr to 131MB
    
    It avoids fdt overlap with large boot.img/recovery.img, moving
    fdt ahead of boot.img/recovery.img is safer.
    
    Change-Id: I182f5b49840d10a53fb026ee3e93cab6da2b4bb7
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h
index b82e9e2df2..1af7e3db4e 100644
--- a/include/configs/rk3368_common.h
+++ b/include/configs/rk3368_common.h
@@ -51,7 +51,7 @@
 #define ENV_MEM_LAYOUT_SETTINGS \
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
-	"fdt_addr_r=0x01f00000\0" \
+	"fdt_addr_r=0x08300000\0" \
 	"kernel_addr_r=0x00280000\0" \
 	"ramdisk_addr_r=0x0a200000\0"
 

commit 2e8ea5b0f6163026265de5e6859788a9f4eb872e
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Dec 27 16:04:20 2018 +0800

    clk: rockchip: rk3288: support crypto clk setting
    
    Change-Id: I066ec163d959b95d0928e07716e3370715aa9898
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index 954dd25cfa..4688fbb3b4 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -126,6 +126,10 @@ enum {
 	CLK_SARADC_DIV_CON_MASK		= GENMASK(15, 8),
 	CLK_SARADC_DIV_CON_WIDTH	= 8,
 
+	/* CLKSEL26 */
+	CLK_CRYPTO_DIV_CON_SHIFT	= 6,
+	CLK_CRYPTO_DIV_CON_MASK		= GENMASK(7, 6),
+
 	SOCSTS_DPLL_LOCK	= 1 << 5,
 	SOCSTS_APLL_LOCK	= 1 << 6,
 	SOCSTS_CPLL_LOCK	= 1 << 7,
@@ -802,6 +806,46 @@ static ulong rockchip_tsadc_set_clk(struct rk3288_cru *cru, uint hz)
 	return rockchip_tsadc_get_clk(cru);
 }
 
+static ulong rockchip_aclk_cpu_get_clk(struct rk3288_cru *cru, uint gclk_rate)
+{
+	u32 div, val;
+
+	val = readl(&cru->cru_clksel_con[1]);
+	div = (val & PD_BUS_ACLK_DIV0_MASK) >> PD_BUS_ACLK_DIV0_SHIFT;
+
+	return DIV_TO_RATE(gclk_rate, div);
+}
+
+#ifndef CONFIG_SPL_BUILD
+
+static ulong rockchip_crypto_get_clk(struct rk3288_cru *cru, uint gclk_rate)
+{
+	u32 div, val;
+
+	val = readl(&cru->cru_clksel_con[26]);
+	div = (val & CLK_CRYPTO_DIV_CON_MASK) >> CLK_CRYPTO_DIV_CON_SHIFT;
+
+	return DIV_TO_RATE(rockchip_aclk_cpu_get_clk(cru, gclk_rate), div);
+}
+
+static ulong rockchip_crypto_set_clk(struct rk3288_cru *cru,
+				     uint gclk_rate, uint hz)
+{
+	int src_clk_div;
+	uint p_rate;
+
+	p_rate = rockchip_aclk_cpu_get_clk(cru, gclk_rate);
+	src_clk_div = DIV_ROUND_UP(p_rate, hz) - 1;
+	assert(src_clk_div < 3);
+
+	rk_clrsetreg(&cru->cru_clksel_con[26],
+		     CLK_CRYPTO_DIV_CON_MASK,
+		     src_clk_div << CLK_CRYPTO_DIV_CON_SHIFT);
+
+	return rockchip_crypto_get_clk(cru, gclk_rate);
+}
+#endif
+
 static ulong rk3288_clk_get_rate(struct clk *clk)
 {
 	struct rk3288_clk_priv *priv = dev_get_priv(clk->dev);
@@ -842,6 +886,14 @@ static ulong rk3288_clk_get_rate(struct clk *clk)
 	case SCLK_TSADC:
 		new_rate = rockchip_tsadc_get_clk(priv->cru);
 		break;
+	case ACLK_CPU:
+		new_rate = rockchip_aclk_cpu_get_clk(priv->cru, gclk_rate);
+		break;
+#ifndef CONFIG_SPL_BUILD
+	case SCLK_CRYPTO:
+		new_rate = rockchip_crypto_get_clk(priv->cru, gclk_rate);
+		break;
+#endif
 	default:
 		return -ENOENT;
 	}
@@ -910,6 +962,9 @@ static ulong rk3288_clk_set_rate(struct clk *clk, ulong rate)
 		rk_clrreg(&cru->cru_clkgate_con[7], 1 << 9);
 		new_rate = rate;
 		break;
+	case SCLK_CRYPTO:
+		new_rate = rockchip_crypto_set_clk(priv->cru, gclk_rate, rate);
+		break;
 #endif
 	case SCLK_SARADC:
 		new_rate = rockchip_saradc_set_clk(priv->cru, rate);
diff --git a/include/dt-bindings/clock/rk3288-cru.h b/include/dt-bindings/clock/rk3288-cru.h
index c86ae74381..4011fd9682 100644
--- a/include/dt-bindings/clock/rk3288-cru.h
+++ b/include/dt-bindings/clock/rk3288-cru.h
@@ -75,6 +75,7 @@
 #define SCLK_USBPHY480M_SRC	122
 #define SCLK_PVTM_CORE		123
 #define SCLK_PVTM_GPU		124
+#define SCLK_CRYPTO		125
 #define SCLK_MIPIDSI_24M	126
 
 #define SCLK_MAC_PLL		150

commit d480bdd7db201e2371bdbda91cc59ff4299b12c2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jan 14 16:09:48 2019 +0800

    rk3399: move fdt addr to 131MB
    
    It avoids fdt overlap with large boot.img/recovery.img, moving
    fdt ahead of boot.img/recovery.img is safer.
    
    Change-Id: I7b2ac8a511a2ffcde127a707868e3fffded7b2f8
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index 82ac90e8c5..70db093bed 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -58,7 +58,7 @@
 #define ENV_MEM_LAYOUT_SETTINGS \
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
-	"fdt_addr_r=0x01f00000\0" \
+	"fdt_addr_r=0x08300000\0" \
 	"kernel_addr_r=0x00280000\0" \
 	"ramdisk_addr_r=0x0a200000\0"
 

commit c2ba77d93f696c0ccb8f2b653571104e7b4afb4e
Author: Jian Qiu <qiujian@rock-chips.com>
Date:   Sat Jan 5 12:11:22 2019 +0800

    lib: optee_client: Extract keymaster CA module
    
    Extract keymaster CA module from OpteeClientInterface
    refactoring code for keymaster reads and writes form caller module
    
    Change-Id: I1069fce0d29d9d9815f71e7f3b4d231754382acd
    Signed-off-by: Jian Qiu <qiujian@rock-chips.com>

diff --git a/cmd/bootrkp.c b/cmd/bootrkp.c
index c13e0dcab0..f2671045a5 100755
--- a/cmd/bootrkp.c
+++ b/cmd/bootrkp.c
@@ -9,7 +9,7 @@
 #include <android_bootloader.h>
 #include <attestation_key.h>
 #include <boot_rkimg.h>
-#include <optee_include/OpteeClientInterface.h>
+#include <keymaster.h>
 
 #define OEM_UNLOCK_ARG_SIZE 30
 
@@ -29,7 +29,7 @@ static int do_boot_rockchip(cmd_tbl_t *cmdtp, int flag, int argc,
 		return -ENODEV;
 	}
 
-#ifdef CONFIG_OPTEE_CLIENT
+#ifdef CONFIG_ANDROID_KEYMASTER_CA
 	disk_partition_t misc_part_info;
 
 	/* load attestation key from misc partition. */
diff --git a/cmd/fastboot/Kconfig b/cmd/fastboot/Kconfig
index 14a1effd61..9492ecb018 100644
--- a/cmd/fastboot/Kconfig
+++ b/cmd/fastboot/Kconfig
@@ -84,7 +84,7 @@ config FASTBOOT_FLASH_MMC_DEV
 
 config FASTBOOT_OEM_UNLOCK
 	bool "Enable FASTBOOT OEM UNLOCK command"
-	depends on OPTEE_CLIENT
+	depends on ANDROID_KEYMASTER_CA
 	help
 	  This enables the command "fastboot oem unlock" the fastboot
 	  oem unlock command requires tee security storage to store
diff --git a/common/Kconfig b/common/Kconfig
index ce5ab8db21..edfeba7b94 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -610,6 +610,13 @@ config ANDROID_AVB
 	  to verify the boot images. The vbmeta must be matched with images,
 	  if not, verify failed.
 
+config ANDROID_KEYMASTER_CA
+	bool "Support Keymaster CA"
+	default y
+	depends on OPTEE_CLIENT
+	help
+	 This enable support read/write data in keymaster.
+
 config ANDROID_BOOT_IMAGE
 	bool "Enable support for Android Boot Images"
 	help
diff --git a/common/Makefile b/common/Makefile
index 4a7401f24a..1ea451c8ee 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -144,6 +144,6 @@ obj-$(CONFIG_$(SPL_)LOG_CONSOLE) += log_console.o
 obj-y += s_record.o
 obj-y += xyzModem.o
 
-obj-$(CONFIG_OPTEE_CLIENT) += attestation_key.o
-
 obj-$(CONFIG_ANDROID_WRITE_KEYBOX) += write_keybox.o
+obj-$(CONFIG_ANDROID_KEYMASTER_CA) += keymaster.o
+obj-$(CONFIG_ANDROID_KEYMASTER_CA) += attestation_key.o
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 8f2077f6fa..e194e1d428 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -19,8 +19,9 @@
 #include <fs.h>
 #include <boot_rkimg.h>
 #include <attestation_key.h>
-#include <optee_include/OpteeClientInterface.h>
+#include <keymaster.h>
 #include <linux/libfdt_env.h>
+#include <optee_include/OpteeClientInterface.h>
 
 #define ANDROID_PARTITION_BOOT "boot"
 #define ANDROID_PARTITION_MISC "misc"
@@ -871,7 +872,7 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	if (part_num < 0)
 		printf("%s Could not find misc partition\n", __func__);
 
-#ifdef CONFIG_OPTEE_CLIENT
+#ifdef CONFIG_ANDROID_KEYMASTER_CA
 	/* load attestation key from misc partition. */
 	load_attestation_key(dev_desc, &misc_part_info);
 #endif
diff --git a/common/attestation_key.c b/common/attestation_key.c
index d90d8d9b78..80121a625d 100644
--- a/common/attestation_key.c
+++ b/common/attestation_key.c
@@ -10,7 +10,7 @@
 #include <common.h>
 #include <malloc.h>
 
-#include <optee_include/OpteeClientApiLib.h>
+#include <keymaster.h>
 
 /* attestation data offset */
 #define ATTESTATION_DATA_OFFSET  65536
diff --git a/common/keymaster.c b/common/keymaster.c
new file mode 100644
index 0000000000..8caa9f5528
--- /dev/null
+++ b/common/keymaster.c
@@ -0,0 +1,234 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <keymaster.h>
+#include <common.h>
+#include <boot_rkimg.h>
+#include <malloc.h>
+
+#include <optee_include/OpteeClientApiLib.h>
+#include <optee_include/tee_client_api.h>
+#include <optee_include/tee_api_defines.h>
+
+TEEC_Result read_from_keymaster(uint8_t *filename,
+				uint32_t filename_size,
+				uint8_t *data,
+				uint32_t size)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID tempuuid = { 0x1b484ea5,
+			       0x698b,
+			       0x4142,
+			       { 0x82, 0xb8, 0x3a,
+				 0xcf, 0x16, 0xe9,
+				 0x9e, 0x2a } };
+
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
+
+	debug("read_from_keymaster start\n");
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						    TEEC_NONE,
+						    TEEC_NONE,
+						    TEEC_NONE);
+
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a =
+					 (dev_desc->if_type == IF_TYPE_MMC)
+					 ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				      &TeecSession,
+				      TeecUuid,
+				      TEEC_LOGIN_PUBLIC,
+				      NULL,
+				      &TeecOperation,
+				      &ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = filename_size;
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	memcpy(SharedMem0.buffer, filename, SharedMem0.size);
+
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = size;
+	SharedMem1.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						    TEEC_MEMREF_TEMP_INOUT,
+						    TEEC_NONE,
+						    TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					0,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	if (TeecResult == TEEC_SUCCESS)
+		memcpy(data, SharedMem1.buffer, SharedMem1.size);
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+	TEEC_CloseSession(&TeecSession);
+	TEEC_FinalizeContext(&TeecContext);
+	debug("read_from_keymaster end\n");
+
+	return TeecResult;
+}
+
+TEEC_Result write_to_keymaster(uint8_t *filename,
+			       uint32_t filename_size,
+			       uint8_t *data,
+			       uint32_t data_size)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+
+	TEEC_UUID tempuuid = { 0x1b484ea5,
+			       0x698b,
+			       0x4142,
+			       { 0x82, 0xb8, 0x3a,
+				 0xcf, 0x16, 0xe9,
+				 0x9e, 0x2a } };
+
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
+
+	debug("write_to_keymaster\n");
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						    TEEC_NONE,
+						    TEEC_NONE,
+						    TEEC_NONE);
+
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC)
+					   ? 1 : 0;
+
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				      &TeecSession,
+				      TeecUuid,
+				      TEEC_LOGIN_PUBLIC,
+
+	NULL, &TeecOperation, &ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = filename_size;
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	memcpy(SharedMem0.buffer, filename, SharedMem0.size);
+
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = data_size;
+	SharedMem1.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+
+	memcpy(SharedMem1.buffer, data, SharedMem1.size);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						    TEEC_MEMREF_TEMP_INOUT,
+						    TEEC_NONE,
+						    TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					1,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+	TEEC_CloseSession(&TeecSession);
+	TEEC_FinalizeContext(&TeecContext);
+	debug("write_to_keymaster end\n");
+	debug("TeecResult %x\n", TeecResult);
+
+	return TeecResult;
+}
+
+TEEC_Result trusty_write_oem_unlock(uint8_t unlock)
+{
+	char *file = "oem.unlock";
+	TEEC_Result ret;
+
+	ret = write_to_keymaster((uint8_t *)file,
+				 strlen(file),
+				 (uint8_t *)&unlock,
+				 1);
+	return ret;
+}
+
+TEEC_Result trusty_read_oem_unlock(uint8_t *unlock)
+{
+	char *file = "oem.unlock";
+	TEEC_Result ret;
+
+	ret = read_from_keymaster((uint8_t *)file,
+				   strlen(file),
+				   unlock,
+				   1);
+
+	if (ret == TEE_ERROR_ITEM_NOT_FOUND) {
+		debug("init oem unlock status 0");
+		ret = trusty_write_oem_unlock(0);
+	}
+
+	return ret;
+}
diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 3bd1d7a1b8..6613935254 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -39,6 +39,9 @@
 #endif
 #include <boot_rkimg.h>
 #include <optee_include/tee_client_api.h>
+#ifdef CONFIG_FASTBOOT_OEM_UNLOCK
+#include <keymaster.h>
+#endif
 
 #define FASTBOOT_VERSION		"0.4"
 
diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index 0de56532b1..1e9e982762 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -363,11 +363,13 @@ static int rkusb_do_vs_write(struct fsg_common *common)
 			} else {
 				/* RPMB */
 #ifdef CONFIG_OPTEE_V1
+#ifdef CONFIG_ANDROID_KEYMASTER_CA
 				rc =
 				write_keybox_to_secure_storage((u8 *)data,
 							       vhead->size);
 				if (rc < 0)
 					return -EIO;
+#endif
 #endif
 			}
 
diff --git a/include/keymaster.h b/include/keymaster.h
new file mode 100644
index 0000000000..22908b8302
--- /dev/null
+++ b/include/keymaster.h
@@ -0,0 +1,59 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#ifndef KEYMASTER_H_
+#define KEYMASTER_H_
+
+#include <optee_include/tee_client_api.h>
+
+/*
+ * read data from rk_keymaster
+ *
+ * @felename:           the filename of the saved data to read
+ * @filename_size:      size of filename
+ * @data:               the buffer used to read data from rk_keymaster
+ * @data_size:          buffer size of the data
+ *
+ * @return a positive number in case of error, or 0 on success.
+ */
+TEEC_Result read_from_keymaster(uint8_t *filename,
+				uint32_t filename_size,
+				uint8_t *data,
+				uint32_t data_size);
+
+/*
+ * write data to rk_keymaster
+ *
+ * @felename:           the filename of the saved data to read
+ * @filename_size:      size of filename
+ * @data:               the buffer used to read data from rk_keymaster
+ * @data_size:          buffer size of the data
+ *
+ * @return a positive number in case of error, or 0 on success.
+ */
+TEEC_Result write_to_keymaster(uint8_t *filename,
+			       uint32_t filename_size,
+			       uint8_t *data,
+			       uint32_t data_size);
+
+/*
+ * read oem unlock status from rk_keymaster
+ *
+ * @unlock:used to read oem unlock status code,0:locked,1:unlocked
+ *
+ * @return a positive number in case of error, or 0 on success.
+ */
+TEEC_Result trusty_read_oem_unlock(uint8_t *unlock);
+
+/*
+ * update oem unlock status to rk_keymaster
+ *
+ * @unlock: oem unlock status code,0:locked,1:unlocked
+ *
+ * @return a positive number in case of error, or 0 on success.
+ */
+TEEC_Result trusty_write_oem_unlock(uint8_t unlock);
+
+#endif  //KEYMASTER_H_
diff --git a/include/optee_include/OpteeClientInterface.h b/include/optee_include/OpteeClientInterface.h
index 93470d3004..7475f6e3e5 100644
--- a/include/optee_include/OpteeClientInterface.h
+++ b/include/optee_include/OpteeClientInterface.h
@@ -24,22 +24,6 @@ uint32_t trusty_write_lock_state(uint8_t lock_state);
 uint32_t trusty_read_flash_lock_state(uint8_t *flash_lock_state);
 uint32_t trusty_write_flash_lock_state(uint8_t flash_lock_state);
 
-/*
- * read data from rk_keymaster
- *
- * @filename:		the filename of the saved data to read
- * @filename_size: 	size of filename
- * @data: 		the buffer used to read data from rk_keymaster
- * @data_size: 		buffer size of the data
- *
- * @return a positive number in case of error, or 0 on success.
- */
-TEEC_Result read_from_keymaster
-	(uint8_t *filename, uint32_t filename_size,
-	uint8_t *data, uint32_t data_size);
-uint32_t write_to_keymaster
-	(uint8_t *filename, uint32_t filename_size,
-	uint8_t *data, uint32_t data_size);
 uint32_t trusty_read_attribute_hash(uint32_t *buf, uint32_t length);
 uint32_t trusty_write_attribute_hash(uint32_t *buf, uint32_t length);
 uint32_t trusty_notify_optee_uboot_end(void);
@@ -55,22 +39,4 @@ uint32_t trusty_attest_get_ca
 	 uint8_t *out, uint32_t *out_len);
 uint32_t trusty_attest_set_ca(uint8_t *ca_response, uint32_t *ca_response_size);
 
-/*
- * read oem unlock status from rk_keymaster
- *
- * @unlock:used to read oem unlock status code,0:locked,1:unlocked
- *
- * @return a positive number in case of error, or 0 on success.
- */
-TEEC_Result trusty_read_oem_unlock(uint8_t *unlock);
-
-/*
- * update oem unlock status to rk_keymaster
- *
- * @unlock: oem unlock status code,0:locked,1:unlocked
- *
- * @return a positive number in case of error, or 0 on success.
- */
-TEEC_Result trusty_write_oem_unlock(uint8_t unlock);
-
 #endif
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index 8da90cc72e..a124860792 100755
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -805,180 +805,6 @@ uint32_t trusty_write_flash_lock_state(uint8_t flash_lock_state)
 	return TeecResult;
 }
 
-TEEC_Result read_from_keymaster(uint8_t *filename,
-		uint32_t filename_size,
-		uint8_t *data,
-		uint32_t size)
-{
-	TEEC_Result TeecResult;
-	TEEC_Context TeecContext;
-	TEEC_Session TeecSession;
-	uint32_t ErrorOrigin;
-	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
-		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
-	TEEC_UUID *TeecUuid = &tempuuid;
-	TEEC_Operation TeecOperation = {0};
-	struct blk_desc *dev_desc;
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: dev_desc is NULL!\n", __func__);
-		return -TEEC_ERROR_GENERIC;
-	}
-
-	debug("read_from_keymaster start\n");
-	OpteeClientApiLibInitialize();
-
-	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
-
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
-						TEEC_NONE,
-						TEEC_NONE,
-						TEEC_NONE);
-	/*0 nand or emmc "security" partition , 1 rpmb*/
-	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
-#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
-	TeecOperation.params[0].value.a = 0;
-#endif
-
-	TeecResult = TEEC_OpenSession(&TeecContext,
-				&TeecSession,
-				TeecUuid,
-				TEEC_LOGIN_PUBLIC,
-				NULL,
-				&TeecOperation,
-				&ErrorOrigin);
-
-	TEEC_SharedMemory SharedMem0 = {0};
-
-	SharedMem0.size = filename_size;
-	SharedMem0.flags = 0;
-
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
-
-	memcpy(SharedMem0.buffer, filename, SharedMem0.size);
-
-	TEEC_SharedMemory SharedMem1 = {0};
-
-	SharedMem1.size = size;
-	SharedMem1.flags = 0;
-
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
-
-	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
-	TeecOperation.params[0].tmpref.size = SharedMem0.size;
-
-	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
-	TeecOperation.params[1].tmpref.size = SharedMem1.size;
-
-
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
-						TEEC_MEMREF_TEMP_INOUT,
-						TEEC_NONE,
-						TEEC_NONE);
-
-	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					0,
-					&TeecOperation,
-					&ErrorOrigin);
-	if (TeecResult == TEEC_SUCCESS)
-		memcpy(data, SharedMem1.buffer, SharedMem1.size);
-	TEEC_ReleaseSharedMemory(&SharedMem0);
-	TEEC_ReleaseSharedMemory(&SharedMem1);
-	TEEC_CloseSession(&TeecSession);
-	TEEC_FinalizeContext(&TeecContext);
-	debug("read_from_keymaster end\n");
-
-	return TeecResult;
-}
-
-uint32_t write_to_keymaster(uint8_t *filename,
-		uint32_t filename_size,
-		uint8_t *data,
-		uint32_t data_size)
-{
-	TEEC_Result TeecResult;
-	TEEC_Context TeecContext;
-	TEEC_Session TeecSession;
-	uint32_t ErrorOrigin;
-	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
-		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
-	TEEC_UUID *TeecUuid = &tempuuid;
-	TEEC_Operation TeecOperation = {0};
-	struct blk_desc *dev_desc;
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: dev_desc is NULL!\n", __func__);
-		return -TEEC_ERROR_GENERIC;
-	}
-
-	debug("write_to_keymaster\n");
-	OpteeClientApiLibInitialize();
-
-	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
-
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
-						TEEC_NONE,
-						TEEC_NONE,
-						TEEC_NONE);
-	/*0 nand or emmc "security" partition , 1 rpmb*/
-	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
-#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
-	TeecOperation.params[0].value.a = 0;
-#endif
-
-	TeecResult = TEEC_OpenSession(&TeecContext,
-				&TeecSession,
-				TeecUuid,
-				TEEC_LOGIN_PUBLIC,
-				NULL,
-				&TeecOperation,
-				&ErrorOrigin);
-
-	TEEC_SharedMemory SharedMem0 = {0};
-
-	SharedMem0.size = filename_size;
-	SharedMem0.flags = 0;
-
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
-
-	memcpy(SharedMem0.buffer, filename, SharedMem0.size);
-
-	TEEC_SharedMemory SharedMem1 = {0};
-
-	SharedMem1.size = data_size;
-	SharedMem1.flags = 0;
-
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
-
-	memcpy(SharedMem1.buffer, data, SharedMem1.size);
-
-	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
-	TeecOperation.params[0].tmpref.size = SharedMem0.size;
-
-	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
-	TeecOperation.params[1].tmpref.size = SharedMem1.size;
-
-
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
-						TEEC_MEMREF_TEMP_INOUT,
-						TEEC_NONE,
-						TEEC_NONE);
-
-	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					1,
-					&TeecOperation,
-					&ErrorOrigin);
-
-	TEEC_ReleaseSharedMemory(&SharedMem0);
-	TEEC_ReleaseSharedMemory(&SharedMem1);
-	TEEC_CloseSession(&TeecSession);
-	TEEC_FinalizeContext(&TeecContext);
-	debug("write_to_keymaster end\n");
-	debug("TeecResult %x\n", TeecResult);
-
-	return TeecResult;
-}
-
 uint32_t trusty_read_attribute_hash(uint32_t *buf, uint32_t length)
 {
 	TEEC_Result TeecResult;
@@ -1806,29 +1632,3 @@ uint32_t trusty_attest_set_ca(uint8_t *ca_response, uint32_t *ca_response_size)
 
 	return TeecResult;
 }
-
-TEEC_Result trusty_write_oem_unlock(uint8_t unlock)
-{
-	char *file = "oem.unlock";
-	TEEC_Result ret;
-
-	ret = write_to_keymaster((uint8_t *)file, strlen(file),
-		(uint8_t *)&unlock, 1);
-	return ret;
-}
-
-TEEC_Result trusty_read_oem_unlock(uint8_t *unlock)
-{
-	char *file = "oem.unlock";
-	TEEC_Result ret;
-
-	ret = read_from_keymaster((uint8_t *)file, strlen(file),
-		unlock, 1);
-
-	if (ret == TEE_ERROR_ITEM_NOT_FOUND) {
-		debug("init oem unlock status 0");
-		ret = trusty_write_oem_unlock(0);
-	}
-
-	return ret;
-}

commit dfbf26e839a9691c1ccc72eba0da5be75634ed2a
Author: Tony Xu <tony.xu@rock-chips.com>
Date:   Fri Jan 4 16:03:30 2019 +0800

    lib: optee_client: move keybox code to write_keybox.c
    
    Change-Id: Ifcd9962a8b802ee2bcbdbd0e88effb4485e5963a
    Signed-off-by: Tony Xu <tony.xu@rock-chips.com>

diff --git a/common/Kconfig b/common/Kconfig
index 980fb15643..ce5ab8db21 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -594,6 +594,13 @@ config ANDROID_AB
 	  allows a bootloader to try a new version of the system but roll back
 	  to previous version if the new one didn't boot all the way.
 
+config ANDROID_WRITE_KEYBOX
+	bool "Support Write Keybox"
+	default y
+	depends on OPTEE_CLIENT
+	help
+	  This enable support write keybox to secure storage.
+
 config ANDROID_AVB
 	bool"Support Android Verified Boot"
 	default n
diff --git a/common/Makefile b/common/Makefile
index 47e291daa1..4a7401f24a 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -145,3 +145,5 @@ obj-y += s_record.o
 obj-y += xyzModem.o
 
 obj-$(CONFIG_OPTEE_CLIENT) += attestation_key.o
+
+obj-$(CONFIG_ANDROID_WRITE_KEYBOX) += write_keybox.o
diff --git a/common/write_keybox.c b/common/write_keybox.c
new file mode 100644
index 0000000000..6198793bc1
--- /dev/null
+++ b/common/write_keybox.c
@@ -0,0 +1,153 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <optee_include/OpteeClientApiLib.h>
+#include <optee_include/tee_client_api.h>
+#include <optee_include/tee_api_defines.h>
+#include <boot_rkimg.h>
+#include <stdlib.h>
+#include <attestation_key.h>
+#include "write_keybox.h"
+
+#define	BOOT_FROM_EMMC	(1 << 1)
+#define	WIDEVINE_TAG	"KBOX"
+#define	ATTESTATION_TAG	"ATTE"
+
+uint32_t rk_send_keybox_to_ta(uint8_t *filename, uint32_t filename_size,
+			      TEEC_UUID uuid,
+			      uint8_t *key, uint32_t key_size,
+			      uint8_t *data, uint32_t data_size)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID *TeecUuid = &uuid;
+	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
+
+	OpteeClientApiLibInitialize();
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						    TEEC_NONE,
+						    TEEC_NONE,
+						    TEEC_NONE);
+
+	/* 0 nand or emmc "security" partition , 1 rpmb */
+	TeecOperation.params[0].value.a =
+		(dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				      &TeecSession,
+				      TeecUuid,
+				      TEEC_LOGIN_PUBLIC,
+				      NULL,
+				      &TeecOperation,
+				      &ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = filename_size;
+	SharedMem0.flags = 0;
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	memcpy(SharedMem0.buffer, filename, SharedMem0.size);
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = key_size;
+	SharedMem1.flags = 0;
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+	memcpy(SharedMem1.buffer, key, SharedMem1.size);
+	TEEC_SharedMemory SharedMem2 = {0};
+
+	SharedMem2.size = data_size;
+	SharedMem2.flags = 0;
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem2);
+	memcpy(SharedMem2.buffer, data, SharedMem2.size);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+	TeecOperation.params[2].tmpref.buffer = SharedMem2.buffer;
+	TeecOperation.params[2].tmpref.size = SharedMem2.size;
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						    TEEC_MEMREF_TEMP_INPUT,
+						    TEEC_MEMREF_TEMP_INOUT,
+						    TEEC_NONE);
+
+	printf("write keybox to secure storage\n");
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					6,
+					&TeecOperation,
+					&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		printf("send data to TA failed with code 0x%x\n", TeecResult);
+	else
+		printf("send data to TA success with code 0x%x\n", TeecResult);
+
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+	TEEC_ReleaseSharedMemory(&SharedMem2);
+
+	TEEC_CloseSession(&TeecSession);
+	TEEC_FinalizeContext(&TeecContext);
+
+	return TeecResult;
+}
+
+uint32_t write_keybox_to_secure_storage(uint8_t *received_data, uint32_t len)
+{
+	uint32_t key_size;
+	uint32_t data_size;
+	TEEC_Result ret;
+	int rc = 0;
+
+	if (memcmp(received_data, WIDEVINE_TAG, 4) == 0) {
+		/* widevine keybox */
+		TEEC_UUID widevine_uuid = { 0x1b484ea5, 0x698b, 0x4142,
+			{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
+
+		key_size = *(received_data + 4);
+		data_size = *(received_data + 8);
+
+		ret = rk_send_keybox_to_ta((uint8_t *)"widevine_keybox",
+					   sizeof("widevine_keybox"),
+					   widevine_uuid,
+					   received_data + 12,
+					   key_size,
+					   received_data + 12 + key_size,
+					   data_size);
+		if (ret == TEEC_SUCCESS) {
+			rc = 0;
+			printf("write widevine keybox to secure storage success\n");
+		} else {
+			rc = -EIO;
+			printf("write widevine keybox to secure storage fail\n");
+		}
+	} else if (memcmp(received_data, ATTESTATION_TAG, 4) == 0) {
+		/* attestation key */
+		atap_result ret;
+
+		ret = write_attestation_key_to_secure_storage(received_data, len);
+		if (ret == ATAP_RESULT_OK) {
+			rc = 0;
+			printf("write attestation key to secure storage success\n");
+		} else {
+			rc = -EIO;
+			printf("write attestation key to secure storage fail\n");
+		}
+	}
+	return rc;
+}
diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index 114da0bbc4..0de56532b1 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -8,7 +8,7 @@
 #include <asm/io.h>
 #include <asm/arch/boot_mode.h>
 #include <asm/arch/chip_info.h>
-#include <optee_include/OpteeClientInterface.h>
+#include <write_keybox.h>
 
 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
 #include <asm/arch/vendor.h>
diff --git a/include/optee_include/OpteeClientInterface.h b/include/optee_include/OpteeClientInterface.h
index fb859d6924..93470d3004 100644
--- a/include/optee_include/OpteeClientInterface.h
+++ b/include/optee_include/OpteeClientInterface.h
@@ -40,7 +40,6 @@ TEEC_Result read_from_keymaster
 uint32_t write_to_keymaster
 	(uint8_t *filename, uint32_t filename_size,
 	uint8_t *data, uint32_t data_size);
-int write_keybox_to_secure_storage(uint8_t *uboot_data, uint32_t len);
 uint32_t trusty_read_attribute_hash(uint32_t *buf, uint32_t length);
 uint32_t trusty_write_attribute_hash(uint32_t *buf, uint32_t length);
 uint32_t trusty_notify_optee_uboot_end(void);
diff --git a/include/write_keybox.h b/include/write_keybox.h
new file mode 100644
index 0000000000..59991f83a5
--- /dev/null
+++ b/include/write_keybox.h
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#ifndef WRITE_KEYBOX_H_
+#define	WRITE_KEYBOX_H_
+
+#include <common.h>
+
+/*
+ * write_keybox_to_secure_storage
+ *
+ * @received_data:	the data received from usb
+ * @len:		size of received_data
+ *
+ * @return a negative number in case of error, or 0 on success.
+ */
+uint32_t write_keybox_to_secure_storage(uint8_t *received_data, uint32_t len);
+#endif
+
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index e41388b185..8da90cc72e 100755
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -14,157 +14,6 @@
 #include <attestation_key.h>
 
 #define	BOOT_FROM_EMMC	(1 << 1)
-#define	WIDEVINE_TAG	"KBOX"
-#define	ATTESTATION_TAG	"ATTE"
-
-uint32_t rk_send_keybox_to_ta(uint8_t *filename, uint32_t filename_size,
-			      TEEC_UUID uuid,
-			      uint8_t *key, uint32_t key_size,
-			      uint8_t *data, uint32_t data_size)
-{
-	TEEC_Result TeecResult;
-	TEEC_Context TeecContext;
-	TEEC_Session TeecSession;
-	uint32_t ErrorOrigin;
-
-	TEEC_UUID *TeecUuid = &uuid;
-	TEEC_Operation TeecOperation = {0};
-
-	struct blk_desc *dev_desc;
-
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: dev_desc is NULL!\n", __func__);
-		return -TEEC_ERROR_GENERIC;
-	}
-
-	OpteeClientApiLibInitialize();
-	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
-						    TEEC_NONE,
-						    TEEC_NONE,
-						    TEEC_NONE);
-
-	/* 0 nand or emmc "security" partition , 1 rpmb */
-	TeecOperation.params[0].value.a =
-		(dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
-#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
-	TeecOperation.params[0].value.a = 0;
-#endif
-	TeecResult = TEEC_OpenSession(&TeecContext,
-				      &TeecSession,
-				      TeecUuid,
-				      TEEC_LOGIN_PUBLIC,
-				      NULL,
-				      &TeecOperation,
-				      &ErrorOrigin);
-
-	TEEC_SharedMemory SharedMem0 = {0};
-
-	SharedMem0.size = filename_size;
-	SharedMem0.flags = 0;
-
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
-
-	memcpy(SharedMem0.buffer, filename, SharedMem0.size);
-
-	TEEC_SharedMemory SharedMem1 = {0};
-
-	SharedMem1.size = key_size;
-	SharedMem1.flags = 0;
-
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
-
-	memcpy(SharedMem1.buffer, key, SharedMem1.size);
-
-	TEEC_SharedMemory SharedMem2 = {0};
-
-	SharedMem2.size = data_size;
-	SharedMem2.flags = 0;
-
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem2);
-
-	memcpy(SharedMem2.buffer, data, SharedMem2.size);
-
-	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
-	TeecOperation.params[0].tmpref.size = SharedMem0.size;
-
-	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
-	TeecOperation.params[1].tmpref.size = SharedMem1.size;
-
-	TeecOperation.params[2].tmpref.buffer = SharedMem2.buffer;
-	TeecOperation.params[2].tmpref.size = SharedMem2.size;
-
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
-						    TEEC_MEMREF_TEMP_INPUT,
-						    TEEC_MEMREF_TEMP_INOUT,
-						    TEEC_NONE);
-
-	printf("write keybox to secure storage\n");
-	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					6,
-					&TeecOperation,
-					&ErrorOrigin);
-	if (TeecResult != TEEC_SUCCESS) {
-		printf("send data to TA failed with code 0x%x\n", TeecResult);
-	} else {
-		printf("send data to TA success with code 0x%x\n", TeecResult);
-	}
-
-	TEEC_ReleaseSharedMemory(&SharedMem0);
-	TEEC_ReleaseSharedMemory(&SharedMem1);
-	TEEC_ReleaseSharedMemory(&SharedMem2);
-
-	TEEC_CloseSession(&TeecSession);
-	TEEC_FinalizeContext(&TeecContext);
-
-	return TeecResult;
-}
-
-int write_keybox_to_secure_storage(uint8_t *uboot_data, uint32_t len)
-{
-	uint32_t key_size;
-	uint32_t data_size;
-	TEEC_Result ret;
-	int rc = 0;
-
-	if (memcmp(uboot_data, WIDEVINE_TAG, 4) == 0) {
-		/* widevine keybox */
-		TEEC_UUID widevine_uuid = { 0x1b484ea5, 0x698b, 0x4142,
-			{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
-
-		key_size = *(uboot_data + 4);
-		data_size = *(uboot_data + 8);
-
-		ret = rk_send_keybox_to_ta((uint8_t *)"widevine_keybox",
-					   sizeof("widevine_keybox"),
-					   widevine_uuid,
-					   uboot_data + 12,
-					   key_size,
-					   uboot_data + 12 + key_size,
-					   data_size);
-		if (ret == TEEC_SUCCESS) {
-			rc = 0;
-			printf("write widevine keybox to secure storage success\n");
-		} else {
-			rc = -EIO;
-			printf("write widevine keybox to secure storage fail\n");
-		}
-	} else if (memcmp(uboot_data, ATTESTATION_TAG, 4) == 0) {
-		/* attestation key */
-		atap_result ret;
-
-		ret = write_attestation_key_to_secure_storage(uboot_data, len);
-		if (ret == ATAP_RESULT_OK) {
-			rc = 0;
-			printf("write attestation key to secure storage success\n");
-		} else {
-			rc = -EIO;
-			printf("write attestation key to secure storage fail\n");
-		}
-	}
-	return rc;
-}
 
 void test_optee(void)
 {

commit ee9d343315efa249bd06969d542ad421784dece9
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jan 14 18:28:02 2019 +0800

    lib: avb: fix fail to read PIK minimum
    
    Do not update the PIK version if it is equal to the value in the storage,
    otherwise the error may occur in power failure test.
    
    Change-Id: Ia478d9b404de3982b4de5b185e15d181b37f5fd9
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/lib/avb/libavb_user/avb_ops_user.c b/lib/avb/libavb_user/avb_ops_user.c
old mode 100755
new mode 100644
index 38fe2c6cfb..ba20a41fc8
--- a/lib/avb/libavb_user/avb_ops_user.c
+++ b/lib/avb/libavb_user/avb_ops_user.c
@@ -370,6 +370,12 @@ static void avb_set_key_version(AvbAtxOps *atx_ops,
 				uint64_t key_version)
 {
 #ifdef CONFIG_OPTEE_CLIENT
+	uint64_t key_version_temp = 0;
+
+	if (trusty_read_rollback_index(rollback_index_location, &key_version_temp))
+		printf("%s: Fail to read rollback index\n", __FILE__);
+	if (key_version_temp == key_version)
+		return;
 	if (trusty_write_rollback_index(rollback_index_location, key_version))
 		printf("%s: Fail to write rollback index\n", __FILE__);
 #endif

commit fda8d8733197b2e36a551d20f88252d078b1660a
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Jan 15 15:43:23 2019 +0800

    clk: rockchip: px30: modify the dclk divider to even
    
    When DCLK use CPLL alone, the DCLK timing is critical value.
    The odd-divider spacing ratio is not 50%,
    it will affect the setup time of the display.
    Therefore, it is suggested that we use even-divider
    to make the spacing ratio is 50%.
    
    Change-Id: I07c0fd57dd1f27984f8186f1d7c2f96df2ea10a3
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index d9ab5875f4..88f44406fe 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -791,10 +791,13 @@ static ulong px30_vop_set_clk(struct px30_clk_priv *priv, ulong clk_id, uint hz)
 			     (src_clk_div - 1) << ACLK_VO_DIV_SHIFT);
 		break;
 	case DCLK_VOPB:
-		if (hz < PX30_VOP_PLL_LIMIT)
+		if (hz < PX30_VOP_PLL_LIMIT) {
 			src_clk_div = DIV_ROUND_UP(PX30_VOP_PLL_LIMIT, hz);
-		else
+			if (src_clk_div % 2)
+				src_clk_div = src_clk_div - 1;
+		} else {
 			src_clk_div = 1;
+		}
 		assert(src_clk_div - 1 <= 255);
 		rkclk_set_pll(&cru->pll[CPLL], &cru->mode, CPLL, hz * src_clk_div);
 		rk_clrsetreg(&cru->clksel_con[5],
@@ -810,10 +813,13 @@ static ulong px30_vop_set_clk(struct px30_clk_priv *priv, ulong clk_id, uint hz)
 			src_clk_div = npll_hz / hz;
 			assert(src_clk_div - 1 <= 255);
 		} else {
-			if (hz < PX30_VOP_PLL_LIMIT)
+			if (hz < PX30_VOP_PLL_LIMIT) {
 				src_clk_div = DIV_ROUND_UP(PX30_VOP_PLL_LIMIT, hz);
-			else
+				if (src_clk_div % 2)
+					src_clk_div = src_clk_div - 1;
+			} else {
 				src_clk_div = 1;
+			}
 			assert(src_clk_div - 1 <= 255);
 			rkclk_set_pll(&cru->pll[NPLL], &cru->mode, NPLL, hz * src_clk_div);
 		}

commit f9ca6757d601c23e457b093f2a12455fdad5efba
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 10 19:54:18 2019 +0800

    rockchip: rk3308: move fdt_addr_r ahead of ramdisk_addr_r for aarch32
    
    currently, there is only 2MB size gap between ramdisk and fdt,
    which may cause a ram overlap.
    
    Change-Id: Id863f15d7ddf7ec2a3d92029ad474ece05d30916
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h
index 66ed3bc7ad..50b931322d 100644
--- a/include/configs/rk3308_common.h
+++ b/include/configs/rk3308_common.h
@@ -61,7 +61,7 @@
 #define ENV_MEM_LAYOUT_SETTINGS \
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
-	"fdt_addr_r=0x03200000\0" \
+	"fdt_addr_r=0x02f00000\0" \
 	"kernel_addr_r=0x00058000\0" \
 	"kernel_addr_c=0x2008000\0" \
 	"ramdisk_addr_r=0x03080000\0"

commit c337a3c2b1d313fad721a07cf79a285258b45c26
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Fri Jan 11 10:23:26 2019 +0800

    cmd: memtester: add test mask for test stuck address
    
    Change-Id: Icbcf7e460befcc098c45e4e3efb7fb3c1bcb73a0
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/cmd/memtester/memtester.c b/cmd/memtester/memtester.c
index 3c16569eaf..8f624edbd2 100644
--- a/cmd/memtester/memtester.c
+++ b/cmd/memtester/memtester.c
@@ -98,11 +98,13 @@ int doing_memtester(ul *arg, ul testenable, ul loops, ul err_exit)
 			if (loops)
 				printf("/%lu", loops);
 			printf(":\n");
-			printf("  %-20s: ", "Stuck Address");
-			if (!test_stuck_address(bufa[j], count[j] * 2))
-				printf("ok\n");
-			else
-				exit_code |= EXIT_FAIL_ADDRESSLINES;
+			if (testenable && ((1 << 17) & testenable)) {
+				printf("  %-20s: ", "Stuck Address");
+				if (!test_stuck_address(bufa[j], count[j] * 2))
+					printf("ok\n");
+				else
+					exit_code |= EXIT_FAIL_ADDRESSLINES;
+			}
 			for (i = 0;; i++) {
 				if (!tests[i].name)
 					break;
@@ -215,6 +217,7 @@ U_BOOT_CMD(memtester, 6, 1, do_memtester,
 	   "	bit14: Walking Zeroes\n"
 	   "	bit15: 8-bit Writes\n"
 	   "	bit16: 16-bit Writes\n"
+	   "	bit17: test stuck address\n"
 	   "	example: testenable=0x1000,enable Bit Flip only\n"
 	   "err_exit: if 1 stop testing immediately when finding error\n"
 	   "loop[option]: testing loop, if 0 or null endless loop\n"

commit 660ca12ed9a639109b7adde2f1ff137918040793
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed Jan 9 23:15:48 2019 -0800

    rkflash: avoid danger of abnormal power lost
    
    Change-Id: I304567ff15e34643c5e0fb32625d67e4f6f54f12
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/flash.c b/drivers/rkflash/flash.c
index 50cee9ed68..71ed9694ad 100644
--- a/drivers/rkflash/flash.c
+++ b/drivers/rkflash/flash.c
@@ -125,6 +125,7 @@ static void flash_erase_cmd(u8 cs, u32 page_addr)
 
 static void flash_prog_second_cmd(u8 cs, u32 page_addr)
 {
+	udelay(100);
 	nandc_writel(PAGE_PROG_CMD & 0x00ff, NANDC_CHIP_CMD(cs));
 }
 

commit 933ae82de18afde42405390be9e372080b7a0d9a
Author: William Wu <william.wu@rock-chips.com>
Date:   Mon Jan 14 20:15:36 2019 +0800

    rockchip: dts: rk3399: add u-boot,dm-pre-reloc for usb2 phy
    
    The usb vbus detection is depend on the usb2 phy driver.
    This patch fix the usb vbus detection issue if there is
    no valid kernel dtb, and make rockusb to enter download
    mode successfully.
    
    Change-Id: Icf86cfaf67e20f2368370eb2aedc4fa9d5777c50
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi
index 985257cfb8..21196f4c78 100644
--- a/arch/arm/dts/rk3399-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-u-boot.dtsi
@@ -76,3 +76,13 @@
 &emmc_phy {
 	u-boot,dm-pre-reloc;
 };
+
+&u2phy0 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&u2phy0_otg {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};

commit c0b4a82d396c44e9a8222946b6c5158a9c55a86b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 10 16:10:53 2019 +0800

    cmd: nvedit: add "0x" prefix for hex value
    
    Change-Id: Idab53a89d363a9fae6bf3aa98c99f9ba246e5ff9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/cmd/nvedit.c b/cmd/nvedit.c
index 528b808c2b..83d14eb794 100644
--- a/cmd/nvedit.c
+++ b/cmd/nvedit.c
@@ -658,9 +658,9 @@ int env_set_ulong(const char *varname, ulong value)
  */
 int env_set_hex(const char *varname, ulong value)
 {
-	char str[17];
+	char str[19];
 
-	sprintf(str, "%lx", value);
+	sprintf(str, "0x%lx", value);
 	return env_set(varname, str);
 }
 

commit 45ec578384b9f9bbf0ea345c7a7fd81c95534a99
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 10 16:09:38 2019 +0800

    dm: regulator: avoid double print voltage
    
    regulator would print value when set init voltage.
    
    Change-Id: I8bc9df40d452ae89cced7145e8760e29d7339ac8
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/regulator-uclass.c b/drivers/power/regulator/regulator-uclass.c
index a883ea0f1a..e902571c2c 100644
--- a/drivers/power/regulator/regulator-uclass.c
+++ b/drivers/power/regulator/regulator-uclass.c
@@ -276,7 +276,8 @@ int regulator_autoset(struct udevice *dev)
 	} else {
 		if ((uc_pdata->type == REGULATOR_TYPE_BUCK) &&
 		    (uc_pdata->min_uV != -ENODATA) &&
-		    (uc_pdata->max_uV != -ENODATA))
+		    (uc_pdata->max_uV != -ENODATA) &&
+		    (uc_pdata->init_uV <= 0))
 			printf("%s %d uV\n",
 			       uc_pdata->name, regulator_get_value(dev));
 	}

commit d549e1d1e1296cdae3e30bba330a88d71217e7a8
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jan 14 11:34:49 2019 +0800

    android: add androidboot.verifiedbootstate
    
    Since the androidboot.verifiedbootstate is required in android Pie, so add
    it to bootargs when secure boot flag is not set.
    
    Change-Id: I4a883ca87bbba321a894ee66ebcf0ff9d5cb6ca8
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index d9914da3bf..8f2077f6fa 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -947,6 +947,7 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 			return -1;
 	} else {
 		printf("SecureBoot disabled, AVB skip\n");
+		env_update("bootargs", "androidboot.verifiedbootstate=orange");
 		if (load_android_image(dev_desc, boot_partname,
 				       slot_suffix, &load_address))
 			return -1;

commit e9dcade2a7efbd44bdb5c906e7c384805d0b73ff
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Mon Jan 14 09:21:05 2019 +0800

    clk: rockchip: rk322x: add clk_set_defaults for clk init
    
    Change-Id: Ie2bcdf77bb7cdeb9c27b482ce70e4af35fbdc8c6
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c
index b6c437f607..4f71e170da 100644
--- a/drivers/clk/rockchip/clk_rk322x.c
+++ b/drivers/clk/rockchip/clk_rk322x.c
@@ -980,7 +980,12 @@ static int rk322x_clk_probe(struct udevice *dev)
 {
 #ifndef CONFIG_TPL_BUILD
 	struct rk322x_clk_priv *priv = dev_get_priv(dev);
+	int ret = 0;
+
 	rkclk_init(priv);
+	ret = clk_set_defaults(dev);
+	if (ret)
+		debug("%s clk_set_defaults failed %d\n", __func__, ret);
 #endif
 	return 0;
 }

commit d4eae7f5feecb47401382e92cf7d3e5430b9dd44
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Fri Dec 28 15:38:25 2018 +0800

    cmd: memtester: move some common code to ddr_tester_common.c
    
    1. Moving some common code to ddr_tester_common.c to share with ddr tool.
    2. io_map.c get dram bandwidth by using get_ddr_bw().
    
    Change-Id: I90641f35c4474846a2357f4959415bfaa6230769
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/cmd/memtester/Makefile b/cmd/memtester/Makefile
index ad7f391227..6a4347a57a 100644
--- a/cmd/memtester/Makefile
+++ b/cmd/memtester/Makefile
@@ -1,3 +1,4 @@
 obj-$(CONFIG_CMD_MEMTESTER) += tests.o
 obj-$(CONFIG_CMD_MEMTESTER) += memtester.o
 obj-$(CONFIG_CMD_MEMTESTER) += io_map.o
+obj-$(CONFIG_CMD_MEMTESTER) += ddr_tester_common.o
diff --git a/cmd/memtester/ddr_tester_common.c b/cmd/memtester/ddr_tester_common.c
new file mode 100644
index 0000000000..93f9f09e99
--- /dev/null
+++ b/cmd/memtester/ddr_tester_common.c
@@ -0,0 +1,154 @@
+// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd.
+ */
+
+#include <common.h>
+#include <power/regulator.h>
+#include "ddr_tester_common.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+void write_buf_to_ddr(u32 *buf, u32 buf_len, ulong start_adr, ulong length)
+{
+	ulong *buful = (ulong *)buf;
+	ulong *p = (ulong *)start_adr;
+	u32 i, j;
+
+	buf_len = buf_len / sizeof(ulong) - 1;
+
+	for (i = 0, j = 0; i < length / sizeof(p[0]); i++) {
+		p[i] = buful[j];
+		j++;
+		j &= buf_len;
+	}
+}
+
+ulong cmp_buf_data(u32 *buf, u32 buf_len, ulong start_adr, ulong length,
+		   u32 prt_en)
+{
+	ulong *buful = (ulong *)buf;
+	volatile unsigned long *p = (volatile unsigned long *)start_adr;
+	u32 i, j;
+	ulong reread = 0;
+	ulong wr_val = 0;
+	ulong val = 0;
+	ulong err_adr = 0;
+
+	buf_len = buf_len / sizeof(ulong) - 1;
+	err_adr = 0;
+	for (i = 0, j = 0; i < length / sizeof(p[0]); i++) {
+		val = p[i];
+		if (val != buful[j]) {
+			flush_dcache_range((ulong)&p[i],
+					   (ulong)&p[i] + sizeof(u32));
+			reread = p[i];
+			err_adr = (ulong)&p[i];
+			wr_val = buful[j];
+			break;
+		}
+		j++;
+		j &= buf_len;
+	}
+	if (err_adr && prt_en)
+		printf("test fail:address:0x%lx,read:0x%lx,"
+		       "reread:0x%lx,expect:0x%lx\n",
+		       err_adr, val, reread, wr_val);
+
+	return err_adr;
+}
+
+void print_memory(void *addr, ulong size)
+{
+	u32 *p = addr;
+	u32 i;
+
+	for (i = 0; i < size / 4; i += 4) {
+		printf("0x%08lx: 0x%08x, 0x%08x, 0x%08x, 0x%08x\n",
+		       (ulong)&p[i], p[i], p[i + 1], p[i + 2], p[i + 3]);
+	}
+}
+
+/* print available address for ddr testing in uboot */
+void get_print_available_addr(ulong *start_adr, ulong *length, int print_en)
+{
+	u32 i, max_bank = 0;
+
+	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+		if (gd->bd->bi_dram[i].start)
+			max_bank = i + 1;
+		start_adr[i] = 0;
+		length[i] = 0;
+	}
+
+	for (i = 0; i < max_bank; i++) {
+		start_adr[i] = gd->bd->bi_dram[i].start;
+		length[i] = gd->bd->bi_dram[i].size;
+	}
+
+	length[max_bank - 1] = (gd->start_addr_sp - RESERVED_SP_SIZE -
+			start_adr[max_bank - 1]) & ~0xfff;
+	if (print_en) {
+		printf("available memory for test:\n");
+		printf("	start		 end	length\n");
+		for (i = 0; i < max_bank; i++)
+			if (start_adr[i])
+				printf("	0x%08lx - 0x%08lx 0x%08lx\n",
+				       start_adr[i], start_adr[i] + length[i],
+				       length[i]);
+	}
+}
+
+/*
+ * judge if testing address is available
+ * arg[0]:start addr, arg[1]:length, return test banks number
+ */
+int judge_test_addr(ulong *arg, ulong *start_adr, ulong *length)
+{
+	u32 i, max_bank = 0;
+	u32 available = 0;
+
+	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
+		if (start_adr[i])
+			max_bank = i + 1;
+
+	if (!arg[1])
+		return max_bank;
+
+	for (i = 0; i < max_bank; i++)
+		if (arg[0] >= start_adr[i] &&
+		    arg[0] + arg[1] <= start_adr[i] + length[i])
+			available |= 1;
+	if (!available) {
+		printf("Invalid test address\n");
+	} else {
+		start_adr[0] = arg[0];
+		length[0] = arg[1];
+		for (i = 1; i < max_bank; i++) {
+			start_adr[i] = 0;
+			length[i] = 0;
+		}
+	}
+
+	return available;
+}
+
+int set_vdd_logic(u32 uv)
+{
+	struct udevice *dev;
+	int ret;
+
+	ret = regulator_get_by_platname("vdd_logic", &dev);
+	if (ret) {
+		printf("Cannot set regulator name\n");
+		return ret;
+	}
+
+	/* Slowly raise to max CPU voltage to prevent overshoot */
+	ret = regulator_set_value(dev, uv);
+	udelay(100); /* Must wait for voltage to stabilize, 2mV/us */
+	if (ret)
+		printf("set vdd_logic fail\n");
+	return ret;
+}
+
diff --git a/cmd/memtester/ddr_tester_common.h b/cmd/memtester/ddr_tester_common.h
new file mode 100644
index 0000000000..2ff3fd7e8d
--- /dev/null
+++ b/cmd/memtester/ddr_tester_common.h
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
+/*
+ * Copyright (C) 2019 Rockchip Electronics Co., Ltd.
+ */
+
+/* Function declaration. */
+#ifndef _CMD_MEMTESTER_DDR_TOOL_COMMON_H
+#define _CMD_MEMTESTER_DDR_TOOL_COMMON_H
+
+/* reserved 1MB for stack */
+#define RESERVED_SP_SIZE		0x100000
+
+void write_buf_to_ddr(u32 *buf, u32 buf_len, ulong start_adr, ulong length);
+ulong cmp_buf_data(u32 *buf, u32 buf_len, ulong start_adr,
+		   ulong length, u32 prt_en);
+void print_memory(void *addr, ulong size);
+void get_print_available_addr(ulong *start_adr, ulong *length, int print_en);
+int judge_test_addr(ulong *arg, ulong *start_adr, ulong *length);
+int set_vdd_logic(u32 uv);
+#endif /* _CMD_MEMTESTER_DDR_TOOL_COMMON_H */
diff --git a/cmd/memtester/io_map.c b/cmd/memtester/io_map.c
index 88b0d3b66a..ed45a0137e 100644
--- a/cmd/memtester/io_map.c
+++ b/cmd/memtester/io_map.c
@@ -1,25 +1,16 @@
-/* SPDX-License-Identifier: GPL-2.0 */
+// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
 /*
- * Very simple but very effective user-space memory tester.
- * Originally by Simon Kirby <sim@stormix.com> <sim@neato.org>
- * Version 2 by Charles Cazabon <charlesc-memtester@pyropus.ca>
- * Version 3 not publicly released.
- * Version 4 rewrite:
- * Copyright (C) 2004-2012 Charles Cazabon <charlesc-memtester@pyropus.ca>
- * Licensed under the terms of the GNU General Public License version 2 (only).
- * See the file COPYING for details.
- *
- * This file contains the functions for the actual tests, called from the
- * main routine in memtester.c.  See other comments in that file.
- *
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd.
  */
+
 #include <common.h>
+#include <asm/arch/sdram_common.h>
 #include "io_map.h"
 
-#define IO_TYPE_1_1_16	0
-#define IO_TYPE_1_1_32	1
-#define IO_TYPE_1_2		2
-#define IO_TYPE_2		3
+#define IO_TYPE_1_1_16		0	/* up1 1:1 mode 16bit */
+#define IO_TYPE_1_1_32		1	/* up1 1:1 mode 32bit */
+#define IO_TYPE_1_2		2	/* up1 1:2 mode */
+#define IO_TYPE_2		3	/* up2 */
 
 static u32 io_type;
 
@@ -27,7 +18,7 @@ static u32 io_type;
 int data_cpu_2_io(void *p, u32 len)
 {
 	uchar *val = p;
-	uchar buf[16];
+	uchar buf[CPU_2_IO_ALIGN_LEN];
 	u32 i, j;
 
 	if ((len % sizeof(buf)) || !len)
@@ -56,9 +47,6 @@ int data_cpu_2_io(void *p, u32 len)
 
 void data_cpu_2_io_init(void)
 {
-	u32 osreg = 0;
-	u32 bw;
-
 #if defined(CONFIG_ROCKCHIP_RK3036)
 	io_type = IO_TYPE_1_1_16;
 #elif defined(CONFIG_ROCKCHIP_RK3228) ||	\
@@ -66,12 +54,16 @@ void data_cpu_2_io_init(void)
 	defined(CONFIG_ROCKCHIP_RK3368) ||	\
 	defined(CONFIG_ROCKCHIP_RK3366)
 	io_type = IO_TYPE_1_2;
-#elif defined(CONFIG_ROCKCHIP_RK3128)
-	osreg = 0x200081cc;
-#elif defined(CONFIG_ROCKCHIP_RK3288)
-	osreg = 0xff73009c;
-#elif defined(CONFIG_ROCKCHIP_RK3188)
-	osreg = 0x20004048;
+#elif defined(CONFIG_ROCKCHIP_RK3128) || \
+	defined(CONFIG_ROCKCHIP_RK3288) ||	\
+	defined(CONFIG_ROCKCHIP_RK3288)
+	u32 bw;
+
+	bw = get_ddr_bw();
+	if (bw == 2)
+		io_type = IO_TYPE_1_1_32;
+	else
+		io_type = IO_TYPE_1_1_16;
 #elif defined(CONFIG_ROCKCHIP_RK3328) || \
 	defined(CONFIG_ROCKCHIP_PX30) ||	\
 	defined(CONFIG_ROCKCHIP_RK1808)
@@ -79,13 +71,5 @@ void data_cpu_2_io_init(void)
 #else
 	io_type = IO_TYPE_2;
 #endif
-
-	if (osreg) {
-		bw = (2 >> ((osreg >> 2) & 0x3));
-		if (bw == 2)
-			io_type = IO_TYPE_1_1_32;
-		else
-			io_type = IO_TYPE_1_1_16;
-	}
 }
 
diff --git a/cmd/memtester/io_map.h b/cmd/memtester/io_map.h
index abcb5d0660..3b17440a16 100644
--- a/cmd/memtester/io_map.h
+++ b/cmd/memtester/io_map.h
@@ -1,12 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
 /*
- * Copyright (C) 2017 Rockchip Electronics Co., Ltd.
- *
- * SPDX-License-Identifier:     GPL-2.0+
+ * Copyright (C) 2019 Rockchip Electronics Co., Ltd.
  */
 
 #ifndef _CMD_MEMTESTER_IO_MAP_H
 #define _CMD_MEMTESTER_IO_MAP_H
 
+#define CPU_2_IO_ALIGN_LEN		(16)	/* 16 byte */
+
 int data_cpu_2_io(void *p, u32 len);
 void data_cpu_2_io_init(void);
 
diff --git a/cmd/memtester/memtester.c b/cmd/memtester/memtester.c
index 9c35acc16a..3c16569eaf 100644
--- a/cmd/memtester/memtester.c
+++ b/cmd/memtester/memtester.c
@@ -21,16 +21,12 @@
 #include "types.h"
 #include "tests.h"
 #include "io_map.h"
+#include "ddr_tester_common.h"
 
 #define EXIT_FAIL_NONSTARTER    0x01
 #define EXIT_FAIL_ADDRESSLINES  0x02
 #define EXIT_FAIL_OTHERTEST     0x04
 
-DECLARE_GLOBAL_DATA_PTR;
-
-/* reserved sp size 1MB */
-#define RESERVED_SP_SIZE	0x100000
-
 struct test tests[] = {
 	{"Random Value", test_random_value},
 	{"Compare XOR", test_xor_comparison},
@@ -57,103 +53,44 @@ struct test tests[] = {
 int use_phys;
 off_t physaddrbase;
 
-static int do_memtester(cmd_tbl_t *cmdtp, int flag, int argc,
-			char *const argv[])
+/*
+ * arg[0]: test start address
+ * arg[1]: test length, unit: byte
+ * testenable: enable test case, if 0 enable all case
+ * loops: test loops, if 0 endless loop
+ * err_exit: 1: exit test when found fail.
+ * return 0: success, other: fail
+ */
+int doing_memtester(ul *arg, ul testenable, ul loops, ul err_exit)
 {
 	ul loop, i, j;
-	ul buf_start;
-	ul start_adr[2], length[2];
-	u32v * bufa[2], *bufb[2];
-	ul count[2];
-	ul bufsize = 0;
-	ul loops = 0;
-	ul testenable = 0;
+	ul start_adr[CONFIG_NR_DRAM_BANKS], length[CONFIG_NR_DRAM_BANKS];
+	u32v * bufa[CONFIG_NR_DRAM_BANKS], *bufb[CONFIG_NR_DRAM_BANKS];
+	ul count[CONFIG_NR_DRAM_BANKS];
 	int exit_code = 0;
 	int abort = 0;
+	int test_banks;
 
-	printf("memtester version " __version__ " (%d-bit)\n", UL_LEN);
-	printf("Copyright (C) 2001-2012 Charles Cazabon.\n");
-	printf("Licensed under the GNU General Public License version 2 (only).\n");
-	printf("\n");
-
-	start_adr[0] = (size_t)gd->bd->bi_dram[0].start;
-	if (gd->bd->bi_dram[1].start) {
-		length[0] = (size_t)gd->bd->bi_dram[0].size;
-		start_adr[1] = (size_t)gd->bd->bi_dram[1].start;
-		length[1] = gd->start_addr_sp - RESERVED_SP_SIZE - start_adr[1];
-		length[1] &= ~0xfff;
-	} else {
-		length[0] = gd->start_addr_sp - RESERVED_SP_SIZE - start_adr[0];
-		length[0] &= ~0xfff;
-		start_adr[1] = 0;
-		length[1] = 0;
-	}
-
-	printf("available memory for test:\n");
-	printf("	start		 end	length\n");
-	printf("	0x%08lx - 0x%08lx 0x%08lx\n",
-	       start_adr[0], start_adr[0] + length[0], length[0]);
-	if (start_adr[1])
-		printf("	0x%08lx - 0x%08lx 0x%08lx\n",
-		       start_adr[1], start_adr[1] + length[1], length[1]);
-
-	if (argc < 2)
-		return CMD_RET_USAGE;
-
-	if (strict_strtoul(argv[1], 0, &buf_start) < 0)
-		return CMD_RET_USAGE;
+	get_print_available_addr(start_adr, length, 0);
 
-	if (argc > 2)
-		if (strict_strtoul(argv[2], 0, &bufsize) < 0)
-			return CMD_RET_USAGE;
-
-	if (argc > 3)
-		if (strict_strtoul(argv[3], 0, &testenable) < 0)
-			return CMD_RET_USAGE;
+	test_banks = judge_test_addr(arg, start_adr, length);
 
-	if (argc > 4)
-		if (strict_strtoul(argv[4], 0, &loops) < 0)
-			return CMD_RET_USAGE;
+	if (!test_banks) {
+		printf("unavailable test address\n");
+		return -1;
+	}
 
-	if (!bufsize) {
-		/* test all memory */
-		for (i = 0; i < 2; i++) {
-			bufa[i] = (u32v *)start_adr[i];
-			bufb[i] = (u32v *)(start_adr[i] + length[i] / 2);
-			count[i] = length[i] / 2 / sizeof(u32);
-		}
-	} else {
-		bufa[0] = (u32v *)buf_start;
-		bufb[0] = (u32v *)(buf_start + bufsize / 2);
-		count[0] = bufsize / 2 / sizeof(u32);
-		bufa[1] = 0;
-		if (start_adr[1]) {
-			if (buf_start < start_adr[0] ||
-			    (buf_start >= start_adr[0] + length[0] &&
-			     buf_start < start_adr[1]) ||
-			    ((buf_start + bufsize >
-			      start_adr[0] + length[0]) &&
-			     buf_start + bufsize < start_adr[1]) ||
-			    (buf_start + bufsize >
-			    start_adr[1] + length[1])) {
-				printf("unavailable memory space\n");
-				return CMD_RET_FAILURE;
-			}
-		} else {
-			if (buf_start < start_adr[0] ||
-			    (buf_start + bufsize >
-			    start_adr[0] + length[0])) {
-				printf("unavailable memory space\n");
-				return CMD_RET_FAILURE;
-			}
-		}
+	for (i = 0; i < ARRAY_SIZE(start_adr); i++) {
+		bufa[i] = (u32v *)start_adr[i];
+		bufb[i] = (u32v *)(start_adr[i] + length[i] / 2);
+		count[i] = length[i] / 2 / sizeof(u32);
 	}
 
 	data_cpu_2_io_init();
 
 	for (loop = 1; ((!loops) || loop <= loops); loop++) {
-		for (j = 0; j < 2; j++) {
-			if (!bufa[j])
+		for (j = 0; j < test_banks; j++) {
+			if (!count[j])
 				continue;
 			printf("testing:0x%lx - 0x%lx\n", (ul)bufa[j],
 			       (ul)bufa[j] + count[j] * 2 * sizeof(u32));
@@ -176,10 +113,14 @@ static int do_memtester(cmd_tbl_t *cmdtp, int flag, int argc,
 				if (testenable && (!((1 << i) & testenable)))
 					continue;
 				printf("  %-20s: ", tests[i].name);
-				if (!tests[i].fp(bufa[j], bufb[j], count[j]))
+				if (!tests[i].fp(bufa[j], bufb[j], count[j])) {
 					printf("ok\n");
-				else
+				} else {
 					exit_code |= EXIT_FAIL_OTHERTEST;
+					if (err_exit) {
+						goto out;
+					}
+				}
 				if (ctrlc()) {
 					abort = 1;
 					break;
@@ -192,6 +133,8 @@ static int do_memtester(cmd_tbl_t *cmdtp, int flag, int argc,
 		if (abort)
 			break;
 	}
+
+out:
 	if (exit_code & EXIT_FAIL_NONSTARTER)
 		printf("Fail: EXIT_FAIL_NONSTARTER\n");
 	if (exit_code & EXIT_FAIL_ADDRESSLINES)
@@ -199,13 +142,58 @@ static int do_memtester(cmd_tbl_t *cmdtp, int flag, int argc,
 	if (exit_code & EXIT_FAIL_OTHERTEST)
 		printf("Fail: EXIT_FAIL_OTHERTEST\n");
 
+	if (exit_code)
+		return -1;
+	return 0;
+}
+
+static int do_memtester(cmd_tbl_t *cmdtp, int flag, int argc,
+			char *const argv[])
+{
+	ul start_adr[CONFIG_NR_DRAM_BANKS], length[CONFIG_NR_DRAM_BANKS];
+	ul arg[2];
+	ul loops = 0;
+	ul testenable = 0;
+	ul err_exit = 0;
+
+	printf("memtester version " __version__ " (%d-bit)\n", UL_LEN);
+	printf("Copyright (C) 2001-2012 Charles Cazabon.\n");
+	printf("Licensed under the GNU General Public License version 2 (only).\n");
+	printf("\n");
+
+	get_print_available_addr(start_adr, length, 1);
+
+	if (argc < 2)
+		return CMD_RET_USAGE;
+
+	if (strict_strtoul(argv[1], 0, &arg[0]) < 0)
+		return CMD_RET_USAGE;
+
+	if (argc > 2)
+		if (strict_strtoul(argv[2], 0, &arg[1]) < 0)
+			return CMD_RET_USAGE;
+
+	if (argc > 3)
+		if (strict_strtoul(argv[3], 0, &testenable) < 0)
+			return CMD_RET_USAGE;
+
+	if (argc > 4)
+		if (strict_strtoul(argv[4], 0, &err_exit) < 0)
+			return CMD_RET_USAGE;
+
+	if (argc > 5)
+		if (strict_strtoul(argv[5], 0, &loops) < 0)
+			return CMD_RET_USAGE;
+
+	doing_memtester(arg, testenable, loops, err_exit);
+
 	printf("Done.\n");
 	return 0;
 }
 
-U_BOOT_CMD(memtester, 5, 1, do_memtester,
+U_BOOT_CMD(memtester, 6, 1, do_memtester,
 	   "do memtester",
-	   "[start length [testenable [loop]]]\n"
+	   "[start length [testenable err_exit [loop]]]\n"
 	   "start: start address, should be 4k align\n"
 	   "length: test length, should be 4k align, if 0 testing full space\n"
 	   "testenable[option]: enable pattern by set bit to 1, null or 0"
@@ -228,6 +216,7 @@ U_BOOT_CMD(memtester, 5, 1, do_memtester,
 	   "	bit15: 8-bit Writes\n"
 	   "	bit16: 16-bit Writes\n"
 	   "	example: testenable=0x1000,enable Bit Flip only\n"
+	   "err_exit: if 1 stop testing immediately when finding error\n"
 	   "loop[option]: testing loop, if 0 or null endless loop\n"
 	   "example:\n"
 	   "	memtester 0x200000 0x1000000: start address: 0x200000 length:"
diff --git a/cmd/memtester/memtester.h b/cmd/memtester/memtester.h
index d388b2567d..779a1ece41 100644
--- a/cmd/memtester/memtester.h
+++ b/cmd/memtester/memtester.h
@@ -13,10 +13,15 @@
  * See other comments in that file.
  *
  */
-
+#ifndef _CMD_MEMTESTER_H
+#define _CMD_MEMTESTER_H
 #include <linux/types.h>
 
 /* extern declarations. */
 
 extern int use_phys;
 extern off_t physaddrbase;
+
+int doing_memtester(unsigned long *arg, unsigned long testenable,
+		    unsigned long loops, unsigned long err_exit);
+#endif /* _CMD_MEMTESTER_H */

commit a2f754039888630f1359321101f7fb54f24dc6af
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Thu Dec 27 20:38:18 2018 +0800

    rockchip: sdram: add ddr page size and bandwidth get interface
    
    Change-Id: I05e0f32c7e8423843c7b874f8ff89e8e9d093390
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h b/arch/arm/include/asm/arch-rockchip/sdram_common.h
index 2f63d92584..0d2c29916b 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_common.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_common.h
@@ -86,6 +86,8 @@ struct ddr_param {
 
 /* Get sdram size decode from reg */
 size_t rockchip_sdram_size(phys_addr_t reg);
+unsigned int get_page_size(void);
+unsigned int get_ddr_bw(void);
 
 /* Called by U-Boot board_init_r for Rockchip SoCs */
 int dram_init(void);
diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
index 2c4d26826f..e85e5b4130 100644
--- a/arch/arm/mach-rockchip/sdram_common.c
+++ b/arch/arm/mach-rockchip/sdram_common.c
@@ -375,6 +375,63 @@ size_t rockchip_sdram_size(phys_addr_t reg)
 	return (size_t)size_mb << 20;
 }
 
+static unsigned int get_ddr_os_reg(void)
+{
+	u32 os_reg = 0;
+
+#if defined(CONFIG_ROCKCHIP_PX30)
+	os_reg = readl(0xff010208);
+#elif defined(CONFIG_ROCKCHIP_RK3328)
+	os_reg = readl(0xff1005d0);
+#elif defined(CONFIG_ROCKCHIP_RK3399)
+	os_reg = readl(0xff320308);
+#elif defined(CONFIG_ROCKCHIP_RK322X)
+	os_reg = readl(0x110005d0);
+#elif defined(CONFIG_ROCKCHIP_RK3368)
+	os_reg = readl(0xff738208);
+#elif defined(CONFIG_ROCKCHIP_RK3288)
+	os_reg = readl(0x20004048);
+#elif defined(CONFIG_ROCKCHIP_RK3036)
+	os_reg = readl(0x200081cc);
+#elif defined(CONFIG_ROCKCHIP_RK3308)
+	os_reg = readl(0xff000508);
+#elif defined(CONFIG_ROCKCHIP_RK1808)
+	os_reg = readl(0xfe020208);
+#else
+	printf("unsupported chip type, get page size fail\n");
+#endif
+
+	return os_reg;
+}
+
+unsigned int get_page_size(void)
+{
+	u32 os_reg;
+	u32 col, bw;
+	int page_size;
+
+	os_reg = get_ddr_os_reg();
+	if (!os_reg)
+		return 0;
+
+	col = 9 + (os_reg >> SYS_REG_COL_SHIFT(0) & SYS_REG_COL_MASK);
+	bw = (2 >> ((os_reg >> SYS_REG_BW_SHIFT(0)) & SYS_REG_BW_MASK));
+	page_size = 1u << (col + bw);
+
+	return page_size;
+}
+
+unsigned int get_ddr_bw(void)
+{
+	u32 os_reg;
+	u32 bw = 2;
+
+	os_reg = get_ddr_os_reg();
+	if (os_reg)
+		bw = 2 >> ((os_reg >> SYS_REG_BW_SHIFT(0)) & SYS_REG_BW_MASK);
+	return bw;
+}
+
 #if defined(CONFIG_SPL_FRAMEWORK) || !defined(CONFIG_SPL_OF_PLATDATA)
 int dram_init(void)
 {

commit 6bce753f9d8dcbcf6816c6706319eb0cc0f92d91
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Thu Dec 27 17:07:32 2018 +0800

    rockchip dmc: add ddr set rate interface
    
    Change-Id: Ie3f5ac29621f1298a759daf44a1caf68d18b9a46
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rockchip_dmc.h b/arch/arm/include/asm/arch-rockchip/rockchip_dmc.h
index 555998e6b7..3f63ef38eb 100644
--- a/arch/arm/include/asm/arch-rockchip/rockchip_dmc.h
+++ b/arch/arm/include/asm/arch-rockchip/rockchip_dmc.h
@@ -7,9 +7,14 @@
 #define __ROCKCHIP_DMC_H_
 #include <dm.h>
 
+#ifndef MHZ
+#define MHZ		(1000 * 1000)
+#endif
+
 int rockchip_ddrclk_sip_set_rate_v2(unsigned long drate);
 unsigned long rockchip_ddrclk_sip_recalc_rate_v2(void);
 unsigned long rockchip_ddrclk_sip_round_rate_v2(unsigned long rate);
 int rockchip_dmcfreq_probe(struct udevice *dev);
+int set_ddr_freq(unsigned long freq);
 
 #endif
diff --git a/drivers/ram/rockchip/rockchip_dmc.c b/drivers/ram/rockchip/rockchip_dmc.c
index 37aaa6eab5..d7fddb668b 100644
--- a/drivers/ram/rockchip/rockchip_dmc.c
+++ b/drivers/ram/rockchip/rockchip_dmc.c
@@ -867,6 +867,20 @@ unsigned long rockchip_ddrclk_sip_round_rate_v2(unsigned long rate)
 		return 0;
 }
 
+int set_ddr_freq(unsigned long freq)
+{
+	if (freq < MHZ)
+		freq *= MHZ;
+	if (freq) {
+		freq = rockchip_ddrclk_sip_round_rate_v2(freq);
+		rockchip_ddrclk_sip_set_rate_v2(freq);
+	}
+	freq = rockchip_ddrclk_sip_recalc_rate_v2();
+	printf("current ddr freq:%lu Hz\n", freq);
+
+	return freq;
+}
+
 int rockchip_dmcfreq_probe(struct udevice *dev)
 {
 	int ret;

commit aa04de65ce6c955a242bec896593eb241581fc15
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Thu Jan 10 15:17:00 2019 +0800

    lib: optee_client: optimizing print information
    
    Change-Id: I37e6dc56b8eb46bc6d0a2c12bbd4c329d35ca687
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/OpteeClientRPC.c b/lib/optee_clientApi/OpteeClientRPC.c
index fe92eaa270..316765cccd 100644
--- a/lib/optee_clientApi/OpteeClientRPC.c
+++ b/lib/optee_clientApi/OpteeClientRPC.c
@@ -169,12 +169,12 @@ TEEC_Result OpteeRpcCmdLoadV2Ta(t_teesmc32_arg *TeeSmc32Arg)
 		debug("uuid 0x%x", uuid[i]);
 
 	if (TeeSmc32Param[1].u.memref.buf_ptr == 0) {
-		debug("return size of TA, keymaster_size = 0");
+		debug("return size of TA, keymaster_size = 0\n");
 		TeeSmc32Param[1].u.memref.size = 0;
 	} else {
 		/*memcpy((void *)(size_t)TeeSmc32Param[1].u.memref.buf_ptr,
 			(void *)keymaster_data, TeeSmc32Param[1].u.memref.size);*/
-		debug("memref.buf_ptr = 0x%llx; memref.size = 0x%llx",
+		debug("memref.buf_ptr = 0x%llx; memref.size = 0x%llx\n",
 			TeeSmc32Param[1].u.memref.buf_ptr,
 			TeeSmc32Param[1].u.memref.size);
 	}
@@ -556,7 +556,7 @@ TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs)
 		TeecResult = OpteeRpcAlloc(ArmSmcArgs->Arg1, &ArmSmcArgs->Arg1);
 #endif
 #ifdef CONFIG_OPTEE_V2
-		debug("ArmSmcArgs->Arg1 = 0x%x", ArmSmcArgs->Arg1);
+		debug("ArmSmcArgs->Arg1 = 0x%x \n", ArmSmcArgs->Arg1);
 		TeecResult = OpteeRpcAlloc(ArmSmcArgs->Arg1, &ArmSmcArgs->Arg2);
 		ArmSmcArgs->Arg5 = ArmSmcArgs->Arg2;
 		ArmSmcArgs->Arg1 = 0;
@@ -597,7 +597,7 @@ TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs)
 #ifdef CONFIG_OPTEE_V2
 		t_teesmc32_arg *TeeSmc32Arg =
 			(t_teesmc32_arg *)(size_t)((uint64_t)ArmSmcArgs->Arg1 << 32 | ArmSmcArgs->Arg2);
-		debug("TeeSmc32Arg->cmd = 0x%x", TeeSmc32Arg->cmd);
+		debug("TeeSmc32Arg->cmd = 0x%x\n", TeeSmc32Arg->cmd);
 #endif
 		switch (TeeSmc32Arg->cmd) {
 #ifdef CONFIG_OPTEE_V1
@@ -637,7 +637,7 @@ TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs)
 			uint32_t tempaddr;
 			uint32_t allocsize = TeeSmc32Arg->params[0].u.value.b;
 			TeecResult = OpteeRpcAlloc(allocsize, &tempaddr);
-			debug("allocsize = 0x%x tempaddr = 0x%x", allocsize, tempaddr);
+			debug("allocsize = 0x%x tempaddr = 0x%x\n", allocsize, tempaddr);
 			TeeSmc32Arg->params[0].attr = OPTEE_MSG_ATTR_TYPE_TMEM_OUTPUT_V2;
 			TeeSmc32Arg->params[0].u.memref.buf_ptr = tempaddr;
 			TeeSmc32Arg->params[0].u.memref.size = allocsize;
diff --git a/lib/optee_clientApi/OpteeClientRkFs-v2.c b/lib/optee_clientApi/OpteeClientRkFs-v2.c
index 37f881b815..18be31a61f 100644
--- a/lib/optee_clientApi/OpteeClientRkFs-v2.c
+++ b/lib/optee_clientApi/OpteeClientRkFs-v2.c
@@ -170,7 +170,7 @@ static int rkss_read_multi_sections(unsigned char *data, unsigned long index, un
 	}
 	ret = blk_dread(dev_desc, part_info.start + index, num, data);
 	if (ret != num) {
-		printf("blk_dread fail \n");
+		printf("blk_dread fail\n");
 		return -1;
 	}
 	return 0;
@@ -195,7 +195,7 @@ static int rkss_write_multi_sections(unsigned char *data, unsigned long index, u
 	}
 	ret = blk_dwrite(dev_desc, part_info.start + index, num, data);
 	if (ret != num) {
-		printf("blk_dwrite fail \n");
+		printf("blk_dwrite fail\n");
 		return -1;
 	}
 	return 0;
@@ -220,7 +220,7 @@ static int rkss_read_patition_tables(unsigned char *data)
 	}
 	ret = blk_dread(dev_desc, part_info.start, RKSS_PARTITION_TABLE_COUNT, data);
 	if (ret != RKSS_PARTITION_TABLE_COUNT) {
-		printf("blk_dread fail \n");
+		printf("blk_dread fail\n");
 		return -1;
 	}
 	return 0;
@@ -231,12 +231,12 @@ static void rkss_dump(void *data, unsigned int len)
 {
 	char *p = (char *)data;
 	unsigned int i = 0;
-	printf("-------------- DUMP %d --------------", len);
+	printf("-------------- DUMP %d --------------\n", len);
 	for (i = 0; i < len; i++) {
 		printf("%02x ", *(p + i));
 	}
 	printf("\n");
-	printf("------------- DUMP END -------------");
+	printf("------------- DUMP END -------------\n");
 }
 
 static void rkss_dump_ptable(void)
@@ -249,16 +249,16 @@ static void rkss_dump_ptable(void)
 
 	table_data = malloc(RKSS_PARTITION_TABLE_COUNT * RKSS_DATA_LEN);
 	if (table_data == NULL) {
-		printf("malloc table_data fail \n");
+		printf("malloc table_data fail\n");
 		return;
 	}
 	ret = rkss_read_patition_tables(table_data);
 	if (ret < 0) {
-		printf("rkss_read_patition_tables fail ! ret: %d.", ret);
+		printf("rkss_read_patition_tables fail ! ret: %d.\n", ret);
 		return;
 	}
 
-	printf("-------------- DUMP ptable --------------");
+	printf("-------------- DUMP ptable --------------\n");
 	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++) {
 		rkss.index = i;
 		memcpy(rkss.data, table_data + rkss.index * RKSS_DATA_LEN, RKSS_DATA_LEN);
@@ -273,7 +273,7 @@ static void rkss_dump_ptable(void)
 		}
 	}
 	free(table_data);
-	printf("-------------- DUMP END --------------");
+	printf("-------------- DUMP END --------------\n");
 }
 
 static void rkss_dump_usedflags(void)
@@ -284,7 +284,7 @@ static void rkss_dump_usedflags(void)
 	rkss.index = RKSS_USEDFLAGS_INDEX;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_multi_sections fail ! ret: %d.", ret);
+		printf("rkss_read_multi_sections fail ! ret: %d.\n", ret);
 		return;
 	}
 	rkss_dump(rkss.data, RKSS_DATA_LEN);
@@ -312,10 +312,10 @@ static int rkss_verify_ptable(unsigned char *table_data)
 	}
 	ret = rkss_write_multi_sections(table_data, 0, RKSS_PARTITION_TABLE_COUNT);
 	if (ret < 0) {
-		printf("rkss_write_multi_sections failed!!! ret: %d.", ret);
+		printf("rkss_write_multi_sections failed!!! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
-	debug("verify ptable success.");
+	debug("verify ptable success.\n");
 	return TEEC_SUCCESS;
 }
 
@@ -329,7 +329,7 @@ static int rkss_verify_usedflags(struct rk_secure_storage *rkss)
 		duel = *(flags + (int)i/2);
 		flag = i & 0x1 ? duel & 0x0F : (duel & 0xF0) >> 4;
 		if (flag != 0x1) {
-			debug("init usedflags section ...");
+			debug("init usedflags section ...\n");
 			memset(rkss->data, 0x00, RKSS_DATA_LEN);
 			for (n = 0; n < RKSS_PARTITION_TABLE_COUNT + 1; n++) {
 				flagw = (uint8_t *)rkss->data + (int)n/2;
@@ -339,14 +339,14 @@ static int rkss_verify_usedflags(struct rk_secure_storage *rkss)
 			}
 			ret = rkss_write_multi_sections(rkss->data, rkss->index, 1);
 			if (ret < 0) {
-				printf("clean usedflags section failed!!! ret: %d.", ret);
+				printf("clean usedflags section failed!!! ret: %d.\n", ret);
 				return TEEC_ERROR_GENERIC;
 			}
 
 			return TEEC_SUCCESS;
 		}
 	}
-	debug("rkss_verify_usedflags: sucess.");
+	debug("rkss_verify_usedflags: sucess.\n");
 	return TEEC_SUCCESS;
 }
 
@@ -362,7 +362,7 @@ static int rkss_get_fileinfo_by_index(int fd, struct rkss_file_info *pfileinfo)
 	rkss.index = i;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_multi_sections fail ! ret: %d.", ret);
+		printf("rkss_read_multi_sections fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -371,10 +371,10 @@ static int rkss_get_fileinfo_by_index(int fd, struct rkss_file_info *pfileinfo)
 	p += n;
 
 	if (p->used != 1) {
-		debug("error: unused section! ");
+		debug("error: unused section!\n");
 		return TEEC_ERROR_GENERIC;
 	}
-	debug("rkss_get_fileinfo_by_index p->used = %d p->name=%s p->index=%d p->size=%d \n",
+	debug("rkss_get_fileinfo_by_index p->used = %d p->name=%s p->index=%d p->size=%d\n",
 		p->used, p->name, p->index, p->size);
 	memcpy(pfileinfo, p, sizeof(struct rkss_file_info));
 
@@ -400,18 +400,18 @@ static int rkss_get_fileinfo_by_name(
 
 	len = strlen(filename);
 	if (len > RKSS_NAME_MAX_LENGTH - 1) {
-		printf("filename is too long. length:%u", len);
+		printf("filename is too long. length:%u\n", len);
 		return TEEC_ERROR_GENERIC;
 	}
 
 	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
-		printf("malloc table_data fail \n");
+		printf("malloc table_data fail\n");
 		return TEEC_ERROR_GENERIC;
 	}
 	ret = rkss_read_patition_tables(table_data);
 	if (ret < 0) {
-		printf("rkss_read_patition_tables fail ! ret: %d.", ret);
+		printf("rkss_read_patition_tables fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -429,7 +429,7 @@ static int rkss_get_fileinfo_by_name(
 
 			/* Full Matching*/
 			if (!strcmp(p->name, filename)) {
-				debug("rkss_get_fileinfo_by_name: hit table[%d/%d], index[%d/%d] \n",
+				debug("rkss_get_fileinfo_by_name: hit table[%d/%d], index[%d/%d]\n",
 						i, RKSS_PARTITION_TABLE_COUNT, n, RKSS_EACH_FILEFOLDER_COUNT);
 				memcpy(pfileinfo, p, sizeof(struct rkss_file_info));
 				free(table_data);
@@ -458,14 +458,14 @@ static int rkss_get_fileinfo_by_name(
 
 			} while (cur_inpos && cur_svpos);
 
-			debug("Matched folder: %s \n", p->name);
+			debug("Matched folder: %s\n", p->name);
 			free(table_data);
 			return TEEC_ERROR_GENERIC;
 UNMATCHFOLDER:
-			debug("Unmatched ... \n");
+			debug("Unmatched ...\n");
 		}
 	}
-	debug("rkss_get_fileinfo_by_name: file or dir no found!");
+	debug("rkss_get_fileinfo_by_name: file or dir no found!\n");
 	free(table_data);
 	return TEEC_ERROR_GENERIC;
 }
@@ -483,18 +483,18 @@ static int rkss_get_dirs_by_name(char *filename)
 
 	len = strlen(filename);
 	if (len > RKSS_NAME_MAX_LENGTH - 1) {
-		printf("filename is too long. length:%u", len);
+		printf("filename is too long. length:%u\n", len);
 		return TEEC_ERROR_GENERIC;
 	}
 
 	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
-		printf("malloc table_data fail \n");
+		printf("malloc table_data fail\n");
 		return TEEC_ERROR_GENERIC;
 	}
 	ret = rkss_read_patition_tables(table_data);
 	if (ret < 0) {
-		printf("rkss_read_patition_tables fail ! ret: %d.", ret);
+		printf("rkss_read_patition_tables fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -513,14 +513,14 @@ static int rkss_get_dirs_by_name(char *filename)
 
 			/* Full Matching*/
 			ret = memcmp(p->name, filename, strlen(filename));
-			debug("comparing [fd:%d] : %s ?= %s , ret:%d \n",
+			debug("comparing [fd:%d] : %s ?= %s , ret:%d\n",
 					i*RKSS_EACH_FILEFOLDER_COUNT+n, p->name, filename, ret);
 			if (!ret && strlen(p->name) > strlen(filename)) {
 				chk = p->name + strlen(filename);
 				if (*chk == '/') {
 					file = p->name + strlen(filename) + 1;
 					subdir = strtok(file, "/");
-					debug("found: %s \n", subdir);
+					debug("found: %s\n", subdir);
 					strcpy(dir_cache[dir_num], subdir);
 					++dir_num;
 				}
@@ -542,7 +542,7 @@ static int rkss_get_empty_section_from_usedflags(int section_size)
 	rkss.index = RKSS_USEDFLAGS_INDEX;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_multi_sections fail ! ret: %d.", ret);
+		printf("rkss_read_multi_sections fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -559,7 +559,7 @@ static int rkss_get_empty_section_from_usedflags(int section_size)
 		}
 	}
 
-	printf("Not enough space available in secure storage !");
+	printf("Not enough space available in secure storage !\n");
 	return TEEC_ERROR_GENERIC;
 }
 
@@ -570,14 +570,14 @@ static int rkss_incref_multi_usedflags_sections(unsigned int index, unsigned int
 	uint8_t *flag;
 
 	if ((index + num) >= RKSS_DATA_SECTION_COUNT) {
-		printf("index[%d] out of range.", index);
+		printf("index[%d] out of range.\n", index);
 		return TEEC_ERROR_GENERIC;
 	}
 
 	rkss.index = RKSS_USEDFLAGS_INDEX;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_multi_sections fail ! ret: %d.", ret);
+		printf("rkss_read_multi_sections fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -585,7 +585,7 @@ static int rkss_incref_multi_usedflags_sections(unsigned int index, unsigned int
 		flag = (uint8_t *)rkss.data + (int)index/2;
 		value = index & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
 		if (++value > 0xF) {
-			printf("reference out of data: %d", value);
+			printf("reference out of data: %d\n", value);
 			value = 0xF;
 		}
 		*flag = index & 0x1 ? (*flag & 0xF0) | (value & 0x0F) :
@@ -593,7 +593,7 @@ static int rkss_incref_multi_usedflags_sections(unsigned int index, unsigned int
 	}
 	ret = rkss_write_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_write_multi_sections fail ! ret: %d.", ret);
+		printf("rkss_write_multi_sections fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 	return TEEC_SUCCESS;
@@ -606,21 +606,21 @@ static int rkss_decref_multi_usedflags_sections(unsigned int index, unsigned int
 	uint8_t *flag;
 
 	if ((index + num) >= RKSS_DATA_SECTION_COUNT) {
-		printf("index[%d] out of range.", index);
+		printf("index[%d] out of range.\n", index);
 		return TEEC_ERROR_GENERIC;
 	}
 
 	rkss.index = RKSS_USEDFLAGS_INDEX;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_multi_sections fail ! ret: %d.", ret);
+		printf("rkss_read_multi_sections fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 	for (i = 0; i < num; i++, index++) {
 		flag = (uint8_t *)rkss.data + (int)index/2;
 		value = index & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
 		if (--value < 0) {
-			printf("reference out of data: %d", value);
+			printf("reference out of data: %d\n", value);
 			value = 0x0;
 		}
 		*flag = index & 0x1 ? (*flag & 0xF0) | (value & 0x0F) :
@@ -628,7 +628,7 @@ static int rkss_decref_multi_usedflags_sections(unsigned int index, unsigned int
 	}
 	ret = rkss_write_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_write_multi_sections fail ! ret: %d.", ret);
+		printf("rkss_write_multi_sections fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 	return TEEC_SUCCESS;
@@ -644,13 +644,13 @@ static int rkss_write_empty_ptable(struct rkss_file_info *pfileinfo)
 
 	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
-		printf("malloc table_data fail \n");
+		printf("malloc table_data fail\n");
 		return TEEC_ERROR_GENERIC;
 	}
 
 	ret = rkss_read_patition_tables(table_data);
 	if (ret < 0) {
-		printf("rkss_read_patition_tables fail ! ret: %d.", ret);
+		printf("rkss_read_patition_tables fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -662,16 +662,16 @@ static int rkss_write_empty_ptable(struct rkss_file_info *pfileinfo)
 			p = (struct rkss_file_info *)pdata;
 			p += n;
 			if (p->used == 0) {
-				debug("write ptable in [%d][%d] .", i, n);
+				debug("write ptable in [%d][%d] .\n", i, n);
 				memcpy(p, pfileinfo, sizeof(struct rkss_file_info));
 				p->used = 1;
 				p->id = n;
-				debug("write emt ptable : [%d,%d] name:%s, index:%d, ",
+				debug("write emt ptable : [%d,%d] name:%s, index:%d,\n",
 					i, n, p->name, p->index);
-				debug("size:%d, used:%d \n",  p->size, p->used);
+				debug("size:%d, used:%d\n",  p->size, p->used);
 				ret = rkss_write_multi_sections(rkss.data, rkss.index, 1);
 				if (ret < 0) {
-					printf("rkss_write_multi_sections fail ! ret: %d.", ret);
+					printf("rkss_write_multi_sections fail ! ret: %d.\n", ret);
 					free(table_data);
 					return TEEC_ERROR_GENERIC;
 				}
@@ -698,7 +698,7 @@ static int rkss_write_back_ptable(int fd, struct rkss_file_info *pfileinfo)
 	rkss.index = i;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_multi_sections fail ! ret: %d.", ret);
+		printf("rkss_read_multi_sections fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -707,12 +707,12 @@ static int rkss_write_back_ptable(int fd, struct rkss_file_info *pfileinfo)
 	p += n;
 
 	memcpy(p, pfileinfo, sizeof(struct rkss_file_info));
-	debug("write ptable : [%d,%d] name:%s, index:%d, size:%d, used:%d \n",
+	debug("write ptable : [%d,%d] name:%s, index:%d, size:%d, used:%d\n",
 			i, n, p->name, p->index, p->size, p->used);
 
 	ret = rkss_write_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_write_multi_sections fail ! ret: %d.", ret);
+		printf("rkss_write_multi_sections fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 #ifdef DEBUG_RKFSS
@@ -729,7 +729,7 @@ static uint32_t ree_fs_new_open(size_t num_params,
 	int fd;
 	struct rkss_file_info p = {0};
 
-	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx \n",
+	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
 
 	filename = (char *)(size_t)params[1].u.memref.shm_id;
@@ -737,18 +737,18 @@ static uint32_t ree_fs_new_open(size_t num_params,
 		return TEEC_ERROR_BAD_PARAMETERS;
 
 	if (strlen(filename) > RKSS_NAME_MAX_LENGTH) {
-		printf("ree_fs_new_open: file name too long. %s", filename);
+		printf("ree_fs_new_open: file name too long. %s\n", filename);
 		return TEEC_ERROR_BAD_PARAMETERS;
 	}
 
-	debug("ree_fs_new_open open file: %s, len: %zu \n", filename, strlen(filename));
+	debug("ree_fs_new_open open file: %s, len: %zu\n", filename, strlen(filename));
 	fd = rkss_get_fileinfo_by_name(filename, &p);
 	if (fd < 0) {
-		debug("ree_fs_new_open : no such file. %s", filename);
+		debug("ree_fs_new_open : no such file. %s\n", filename);
 		return TEEC_ERROR_ITEM_NOT_FOUND;
 	}
 
-	debug("ree_fs_new_open! %s, fd: %d \n", filename, fd);
+	debug("ree_fs_new_open! %s, fd: %d\n", filename, fd);
 
 	params[2].u.value.a = fd;
 	return TEEC_SUCCESS;
@@ -772,19 +772,19 @@ static TEEC_Result ree_fs_new_create(size_t num_params,
 		return TEEC_ERROR_BAD_PARAMETERS;
 
 	if (strlen(filename) > RKSS_NAME_MAX_LENGTH) {
-		printf("ree_fs_new_create: file name too long. %s", filename);
+		printf("ree_fs_new_create: file name too long. %s\n", filename);
 		return TEEC_ERROR_BAD_PARAMETERS;
 	}
 
-	debug("ree_fs_new_create create file: %s, len: %zu \n", filename, strlen(filename));
+	debug("ree_fs_new_create create file: %s, len: %zu\n", filename, strlen(filename));
 	fd = rkss_get_fileinfo_by_name(filename, &p);
 	if (fd >= 0) {
-		debug("ree_fs_new_create : file exist, clear it. %s", filename);
+		debug("ree_fs_new_create : file exist, clear it. %s\n", filename);
 		/* decrease ref from usedflags */
 		num = p.size / RKSS_DATA_LEN + 1;
 		ret = rkss_decref_multi_usedflags_sections(p.index, num);
 		if (ret < 0) {
-			printf("rkss_decref_multi_usedflags_sections error !");
+			printf("rkss_decref_multi_usedflags_sections error !\n");
 			return TEEC_ERROR_GENERIC;
 		}
 
@@ -792,12 +792,12 @@ static TEEC_Result ree_fs_new_create(size_t num_params,
 		memset(&p, 0, sizeof(struct rkss_file_info));
 		ret = rkss_write_back_ptable(fd, &p);
 		if (ret < 0) {
-			printf("ree_fs_new_create : write back error %d", ret);
+			printf("ree_fs_new_create : write back error %d\n", ret);
 			return TEEC_ERROR_GENERIC;
 		}
 	}
 
-	debug("ree_fs_new_create create new file: %s \n", filename);
+	debug("ree_fs_new_create create new file: %s\n", filename);
 	strcpy(p.name, filename);
 	p.index = 0;
 	p.size = 0;
@@ -805,11 +805,11 @@ static TEEC_Result ree_fs_new_create(size_t num_params,
 	p.flags = RK_FS_R | RK_FS_W;
 	fd = rkss_write_empty_ptable(&p);
 	if (fd < 0) {
-		printf("ree_fs_new_create : write empty ptable error. %s", filename);
+		printf("ree_fs_new_create : write empty ptable error. %s\n", filename);
 		return TEEC_ERROR_GENERIC;
 	}
 
-	debug("ree_fs_new_create ! %s, fd: %d. \n", filename, fd);
+	debug("ree_fs_new_create ! %s, fd: %d.\n", filename, fd);
 
 	params[2].u.value.a = fd;
 	return TEEC_SUCCESS;
@@ -818,7 +818,7 @@ static TEEC_Result ree_fs_new_create(size_t num_params,
 static TEEC_Result ree_fs_new_close(size_t num_params,
 				    struct tee_ioctl_param *params)
 {
-	debug("ree_fs_new_close !");
+	debug("ree_fs_new_close !\n");
 	UNREFERENCED_PARAMETER(params);
 	UNREFERENCED_PARAMETER(num_params);
 	return TEEC_SUCCESS;
@@ -847,11 +847,11 @@ static TEEC_Result ree_fs_new_read(size_t num_params,
 		return TEEC_ERROR_BAD_PARAMETERS;
 	len = params[1].u.memref.size;
 
-	debug("ree_fs_new_read! fd:%d, len:%zu, offs:%ld \n", fd, len, offs);
+	debug("ree_fs_new_read! fd:%d, len:%zu, offs:%ld\n", fd, len, offs);
 
 	ret = rkss_get_fileinfo_by_index(fd, &p);
 	if (ret < 0) {
-		debug("unavailable fd: %d!", fd);
+		debug("unavailable fd: %d!\n", fd);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -862,7 +862,7 @@ static TEEC_Result ree_fs_new_read(size_t num_params,
 	temp_file_data = malloc(section_num * RKSS_DATA_LEN);
 	ret = rkss_read_multi_sections(temp_file_data, p.index, section_num);
 	if (ret < 0) {
-		printf("unavailable file index!");
+		printf("unavailable file index!\n");
 		free(temp_file_data);
 		return TEEC_ERROR_GENERIC;
 	}
@@ -900,7 +900,7 @@ static TEEC_Result ree_fs_new_write(size_t num_params,
 
 	ret = rkss_get_fileinfo_by_index(fd, &p);
 	if (ret < 0) {
-		printf("ree_fs_new_write: fd:%d unvailable!", fd);
+		printf("ree_fs_new_write: fd:%d unvailable!\n", fd);
 		return TEEC_ERROR_BAD_PARAMETERS;
 	}
 
@@ -915,7 +915,7 @@ static TEEC_Result ree_fs_new_write(size_t num_params,
 		temp_file_data = malloc(section_num * RKSS_DATA_LEN);
 		ret = rkss_read_multi_sections(temp_file_data, p.index, section_num);
 		if (ret < 0) {
-			printf("unavailable file index %d section_num %d", p.index, section_num);
+			printf("unavailable file index %d section_num %d\n", p.index, section_num);
 			ret = TEEC_ERROR_GENERIC;
 			goto out;
 		}
@@ -924,7 +924,7 @@ static TEEC_Result ree_fs_new_write(size_t num_params,
 		temp_file_data = 0;
 		ret = rkss_decref_multi_usedflags_sections(p.index, section_num);
 		if (ret < 0) {
-			printf("rkss_decref_multi_usedflags_sections error !");
+			printf("rkss_decref_multi_usedflags_sections error !\n");
 			ret = TEEC_ERROR_GENERIC;
 			goto out;
 		}
@@ -935,18 +935,18 @@ static TEEC_Result ree_fs_new_write(size_t num_params,
 	p.size = new_size;
 	section_num = new_size / RKSS_DATA_LEN + 1;
 	p.index = rkss_get_empty_section_from_usedflags(section_num);
-	debug("Get Empty section in %d \n", p.index);
+	debug("Get Empty section in %d\n", p.index);
 	p.used = 1;
 	ret = rkss_incref_multi_usedflags_sections(p.index, section_num);
 	if (ret < 0) {
-		printf("rkss_incref_multi_usedflags_sections error !");
+		printf("rkss_incref_multi_usedflags_sections error !\n");
 		ret = TEEC_ERROR_GENERIC;
 		goto out;
 	}
 
 	ret = rkss_write_back_ptable(fd, &p);
 	if (ret < 0) {
-		printf("ree_fs_new_write: write ptable error!");
+		printf("ree_fs_new_write: write ptable error!\n");
 		ret = TEEC_ERROR_GENERIC;
 		goto out;
 	}
@@ -986,28 +986,28 @@ static TEEC_Result ree_fs_new_truncate(size_t num_params,
 	fd = params[0].u.value.b;
 	len = params[0].u.value.c;
 
-	debug("ree_fs_new_truncate: fd:%d, lenth:%zu \n", fd, len);
+	debug("ree_fs_new_truncate: fd:%d, lenth:%zu\n", fd, len);
 
 	ret = rkss_get_fileinfo_by_index(fd, &p);
 	if (ret < 0) {
-		printf("fd:%d unvailable!", fd);
+		printf("fd:%d unvailable!\n", fd);
 		return TEEC_ERROR_GENERIC;
 	}
 	if (len > p.size) {
-		printf("truncate error!");
+		printf("truncate error!\n");
 		return TEEC_ERROR_GENERIC;
 	}
 	section_num_old = p.size / RKSS_DATA_LEN + 1;
 	section_num_new = len / RKSS_DATA_LEN + 1;
 	ret = rkss_decref_multi_usedflags_sections(p.index + section_num_new, section_num_old - section_num_new);
 	if (ret < 0) {
-		printf("rkss_decref_multi_usedflags_sections error !");
+		printf("rkss_decref_multi_usedflags_sections error !\n");
 		ret = TEEC_ERROR_GENERIC;
 	}
 	p.size = len;
 	ret = rkss_write_back_ptable(fd, &p);
 	if (ret < 0) {
-		printf("ree_fs_new_truncate: write ptable error!");
+		printf("ree_fs_new_truncate: write ptable error!\n");
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -1021,7 +1021,7 @@ static TEEC_Result ree_fs_new_remove(size_t num_params,
 	struct rkss_file_info p = {0};
 	int ret, fd, num;
 
-	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx \n",
+	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
 
 	filename = (char *)(size_t)params[1].u.memref.shm_id;
@@ -1030,18 +1030,18 @@ static TEEC_Result ree_fs_new_remove(size_t num_params,
 
 	ret = rkss_get_fileinfo_by_name(filename, &p);
 	if (ret < 0) {
-		printf("ree_fs_new_remove: no such file. %s", filename);
+		printf("ree_fs_new_remove: no such file. %s\n", filename);
 		return 0;
 	}
 	fd = ret;
 
-	debug("ree_fs_new_remove! %s fd:%d index:%d size:%d \n", filename, fd, p.index, p.size);
+	debug("ree_fs_new_remove! %s fd:%d index:%d size:%d\n", filename, fd, p.index, p.size);
 
 	/* decrease ref from usedflags */
 	num = p.size / RKSS_DATA_LEN + 1;
 	ret = rkss_decref_multi_usedflags_sections(p.index, num);
 	if (ret < 0) {
-		printf("rkss_decref_multi_usedflags_sections error !");
+		printf("rkss_decref_multi_usedflags_sections error !\n");
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -1049,7 +1049,7 @@ static TEEC_Result ree_fs_new_remove(size_t num_params,
 	memset(&p, 0, sizeof(struct rkss_file_info));
 	ret = rkss_write_back_ptable(fd, &p);
 	if (ret < 0) {
-		printf("ree_fs_new_remove: write back error %d", ret);
+		printf("ree_fs_new_remove: write back error %d\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -1082,15 +1082,15 @@ static TEEC_Result ree_fs_new_rename(size_t num_params,
 		return TEEC_ERROR_BAD_PARAMETERS;
 
 	if (strlen(new_fname) > RKSS_NAME_MAX_LENGTH) {
-		printf("new file name too long. %s", new_fname);
+		printf("new file name too long. %s\n", new_fname);
 		return TEEC_ERROR_BAD_PARAMETERS;
 	}
 
-	debug("rename: %s -> %s \n", old_fname, new_fname);
+	debug("rename: %s -> %s\n", old_fname, new_fname);
 
 	ret = rkss_get_fileinfo_by_name(old_fname, &p);
 	if (ret < 0) {
-		printf("filename: %s no found.", old_fname);
+		printf("filename: %s no found.\n", old_fname);
 		return TEEC_ERROR_ITEM_NOT_FOUND;
 	}
 
@@ -1098,7 +1098,7 @@ static TEEC_Result ree_fs_new_rename(size_t num_params,
 
 	ret = rkss_write_back_ptable(ret, &p);
 	if (ret < 0) {
-		printf("write ptable error!");
+		printf("write ptable error!\n");
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -1111,7 +1111,7 @@ static TEEC_Result ree_fs_new_opendir(size_t num_params,
 	char *dirname;
 	int ret;
 
-	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx \n",
+	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
 
 	dirname = (char *)(size_t)params[1].u.memref.shm_id;
@@ -1121,11 +1121,11 @@ static TEEC_Result ree_fs_new_opendir(size_t num_params,
 	dir_seek = 0;
 	ret = rkss_get_dirs_by_name(dirname);
 	if (ret < 0) {
-		printf("ree_fs_new_opendir: error");
+		printf("ree_fs_new_opendir: error\n");
 		return TEEC_ERROR_GENERIC;
 	}
 
-	debug("ree_fs_new_opendir: %s, seek/num:%d/%d \n", dirname, dir_seek, dir_num);
+	debug("ree_fs_new_opendir: %s, seek/num:%d/%d\n", dirname, dir_seek, dir_num);
 	return TEEC_SUCCESS;
 }
 
@@ -1151,16 +1151,16 @@ static TEEC_Result ree_fs_new_readdir(size_t num_params,
 	size_t dirname_len;
 
 	dirname = (char *)(size_t)params[1].u.memref.shm_id;
-	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx \n",
+	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
 	if (!dirname)
 		return TEEC_ERROR_BAD_PARAMETERS;
 	len = params[1].u.memref.size;
 
-	debug("seek/num:%d/%d \n", dir_seek, dir_num);
+	debug("seek/num:%d/%d\n", dir_seek, dir_num);
 	if (dir_seek == dir_num) {
 		params[1].u.memref.size = 0;
-		debug("ree_fs_new_readdir: END");
+		debug("ree_fs_new_readdir: END \n");
 		return TEEC_ERROR_BAD_STATE;
 	}
 
@@ -1172,7 +1172,7 @@ static TEEC_Result ree_fs_new_readdir(size_t num_params,
 	strcpy(dirname, dir_cache[dir_seek]);
 	++dir_seek;
 
-	debug("ree_fs_new_readdir: %s \n", dirname);
+	debug("ree_fs_new_readdir: %s\n", dirname);
 
 	return TEEC_SUCCESS;
 }
@@ -1199,12 +1199,12 @@ int tee_supp_rk_fs_init(void)
 
 	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
-		printf("malloc table_data fail \n");
+		printf("malloc table_data fail\n");
 		return TEEC_ERROR_GENERIC;
 	}
 	ret = rkss_read_patition_tables(table_data);
 	if (ret < 0) {
-		printf("rkss_read_patition_tables fail ! ret: %d.", ret);
+		printf("rkss_read_patition_tables fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -1217,12 +1217,12 @@ int tee_supp_rk_fs_init(void)
 	rkss.index = RKSS_USEDFLAGS_INDEX;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_multi_sections fail ! ret: %d.", ret);
+		printf("rkss_read_multi_sections fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 	ret = rkss_verify_usedflags(&rkss);
 	if (ret < 0) {
-		printf("rkss_verify_usedflags fail ! ret: %d.", ret);
+		printf("rkss_verify_usedflags fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -1259,37 +1259,37 @@ int tee_supp_rk_fs_process(size_t num_params,
 
 	switch (params->u.value.a) {
 	case OPTEE_MRF_OPEN:
-		debug(">>>>>>> [%d] OPTEE_MRF_OPEN! \n", rkss_step++);
+		debug(">>>>>>> [%d] OPTEE_MRF_OPEN!\n", rkss_step++);
 		return ree_fs_new_open(num_params, params);
 	case OPTEE_MRF_CREATE:
-		debug(">>>>>>> [%d] OPTEE_MRF_CREATE! \n", rkss_step++);
+		debug(">>>>>>> [%d] OPTEE_MRF_CREATE!\n", rkss_step++);
 		return ree_fs_new_create(num_params, params);
 	case OPTEE_MRF_CLOSE:
-		debug(">>>>>>> [%d] OPTEE_MRF_CLOSE! \n", rkss_step++);
+		debug(">>>>>>> [%d] OPTEE_MRF_CLOSE!\n", rkss_step++);
 		return ree_fs_new_close(num_params, params);
 	case OPTEE_MRF_READ:
-		debug(">>>>>>> [%d] OPTEE_MRF_READ! \n", rkss_step++);
+		debug(">>>>>>> [%d] OPTEE_MRF_READ!\n", rkss_step++);
 		return ree_fs_new_read(num_params, params);
 	case OPTEE_MRF_WRITE:
-		debug(">>>>>>> [%d] OPTEE_MRF_WRITE! \n", rkss_step++);
+		debug(">>>>>>> [%d] OPTEE_MRF_WRITE!\n", rkss_step++);
 		return ree_fs_new_write(num_params, params);
 	case OPTEE_MRF_TRUNCATE:
-		debug(">>>>>>> [%d] OPTEE_MRF_TRUNCATE! \n", rkss_step++);
+		debug(">>>>>>> [%d] OPTEE_MRF_TRUNCATE!\n", rkss_step++);
 		return ree_fs_new_truncate(num_params, params);
 	case OPTEE_MRF_REMOVE:
-		debug(">>>>>>> [%d] OPTEE_MRF_REMOVE! \n", rkss_step++);
+		debug(">>>>>>> [%d] OPTEE_MRF_REMOVE!\n", rkss_step++);
 		return ree_fs_new_remove(num_params, params);
 	case OPTEE_MRF_RENAME:
-		debug(">>>>>>> [%d] OPTEE_MRF_RENAME! \n", rkss_step++);
+		debug(">>>>>>> [%d] OPTEE_MRF_RENAME!\n", rkss_step++);
 		return ree_fs_new_rename(num_params, params);
 	case OPTEE_MRF_OPENDIR:
-		debug(">>>>>>> [%d] OPTEE_MRF_OPENDIR! \n", rkss_step++);
+		debug(">>>>>>> [%d] OPTEE_MRF_OPENDIR!\n", rkss_step++);
 		return ree_fs_new_opendir(num_params, params);
 	case OPTEE_MRF_CLOSEDIR:
-		debug(">>>>>>> [%d] OPTEE_MRF_CLOSEDIR! \n", rkss_step++);
+		debug(">>>>>>> [%d] OPTEE_MRF_CLOSEDIR!\n", rkss_step++);
 		return ree_fs_new_closedir(num_params, params);
 	case OPTEE_MRF_READDIR:
-		debug(">>>>>>> [%d] OPTEE_MRF_READDIR! \n", rkss_step++);
+		debug(">>>>>>> [%d] OPTEE_MRF_READDIR!\n", rkss_step++);
 		return ree_fs_new_readdir(num_params, params);
 	default:
 		return TEEC_ERROR_BAD_PARAMETERS;
diff --git a/lib/optee_clientApi/OpteeClientRkFs.c b/lib/optee_clientApi/OpteeClientRkFs.c
index 8fd2448b8f..55dec3e212 100644
--- a/lib/optee_clientApi/OpteeClientRkFs.c
+++ b/lib/optee_clientApi/OpteeClientRkFs.c
@@ -182,7 +182,7 @@ static int rkss_read_multi_sections(unsigned char *data, unsigned long index, un
 	}
 	ret = blk_dread(dev_desc, part_info.start + index, num, data);
 	if (ret != num) {
-		printf("blk_dread fail \n");
+		printf("blk_dread fail\n");
 		return -1;
 	}
 	return 0;
@@ -212,7 +212,7 @@ static int rkss_write_multi_sections(unsigned char *data, unsigned long index, u
 	}
 	ret = blk_dwrite(dev_desc, part_info.start + index, num, data);
 	if (ret != num) {
-		printf("blk_dwrite fail \n");
+		printf("blk_dwrite fail\n");
 		return -1;
 	}
 	return 0;
@@ -242,7 +242,7 @@ static int rkss_read_patition_tables(unsigned char *data)
 	}
 	ret = blk_dread(dev_desc, part_info.start, RKSS_PARTITION_TABLE_COUNT, data);
 	if (ret != RKSS_PARTITION_TABLE_COUNT) {
-		printf("blk_dread fail \n");
+		printf("blk_dread fail\n");
 		return -1;
 	}
 	return 0;
@@ -253,29 +253,29 @@ static void rkss_dump(void* data, unsigned int len)
 {
 	char *p = (char *)data;
 	unsigned int i = 0;
-	printf("-------------- DUMP %d --------------", len);
+	printf("-------------- DUMP %d --------------\n", len);
 	for (i = 0; i < len; i++)
 	{
 		printf("%02x ", *(p + i));
 	}
 	printf("\n");
-	printf("------------- DUMP END -------------");
+	printf("------------- DUMP END -------------\n");
 }
 
 static void rkss_dump_ptable(void)
 {
-	printf("-------------- DUMP ptable --------------");
+	printf("-------------- DUMP ptable --------------\n");
 	int i = 0, ret;
 	unsigned char *table_data;
 
 	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
-		printf("malloc table_data fail \n");
+		printf("malloc table_data fail\n");
 		return;
 	}
 	ret = rkss_read_patition_tables(table_data);
 	if (ret < 0) {
-		printf("rkss_read_patition_tables fail ! ret: %d.", ret);
+		printf("rkss_read_patition_tables fail ! ret: %d.\n", ret);
 		free(table_data);
 		return;
 	}
@@ -299,7 +299,7 @@ static void rkss_dump_ptable(void)
 		}
 	}
 	free(table_data);
-	printf("-------------- DUMP END --------------");
+	printf("-------------- DUMP END --------------\n");
 }
 
 static void rkss_dump_usedflags(void)
@@ -309,7 +309,7 @@ static void rkss_dump_usedflags(void)
 	int ret = rkss_read_section(&rkss);
 	if (ret < 0)
 	{
-		printf("rkss_read_section fail ! ret: %d.", ret);
+		printf("rkss_read_section fail ! ret: %d.\n", ret);
 		return;
 	}
 	rkss_dump(rkss.data, RKSS_DATA_LEN);
@@ -339,11 +339,11 @@ static int rkss_verify_ptable(unsigned char *table_data)
 	if (write_table_flag == 1) {
 		ret = rkss_write_multi_sections(table_data, 0, RKSS_PARTITION_TABLE_COUNT);
 		if (ret < 0) {
-			printf("rkss_write_multi_sections failed!!! ret: %d.", ret);
+			printf("rkss_write_multi_sections failed!!! ret: %d.\n", ret);
 			return -1;
 		}
 	}
-	debug("verify ptable success.");
+	debug("verify ptable success.\n");
 	return 0;
 }
 
@@ -357,7 +357,7 @@ static int rkss_verify_usedflags(struct rk_secure_storage *rkss)
 		duel = *(flags + (int)i/2);
 		flag = i & 0x1 ? duel & 0x0F : (duel & 0xF0) >> 4;
 		if (flag != 0x1) {
-			debug("init usedflags section ...");
+			debug("init usedflags section ...\n");
 			memset(rkss->data, 0x00, RKSS_DATA_LEN);
 			for (n = 0; n < RKSS_PARTITION_TABLE_COUNT + 1; n++) {
 				flagw = (uint8_t *)rkss->data + (int)n/2;
@@ -367,14 +367,14 @@ static int rkss_verify_usedflags(struct rk_secure_storage *rkss)
 			}
 			ret = rkss_write_multi_sections(rkss->data, rkss->index, 1);
 			if (ret < 0) {
-				printf("clean usedflags section failed!!! ret: %d.", ret);
+				printf("clean usedflags section failed!!! ret: %d.\n", ret);
 				return -1;
 			}
 
 			return 0;
 		}
 	}
-	debug("rkss_verify_usedflags: sucess.");
+	debug("rkss_verify_usedflags: sucess.\n");
 	return 0;
 }
 
@@ -390,7 +390,7 @@ static int rkss_get_fileinfo_by_index(int fd, struct rkss_file_info *pfileinfo)
 	rkss.index = i;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_multi_sections fail ! ret: %d.", ret);
+		printf("rkss_read_multi_sections fail ! ret: %d.\n", ret);
 		return -1;
 	}
 
@@ -399,10 +399,10 @@ static int rkss_get_fileinfo_by_index(int fd, struct rkss_file_info *pfileinfo)
 	p += n;
 
 	if (p->used != 1) {
-		debug("error: unused section! ");
+		debug("error: unused section!\n");
 		return -1;
 	}
-	debug("rkss_get_fileinfo_by_index p->used = %d p->name=%s p->index=%d p->size=%d \n",
+	debug("rkss_get_fileinfo_by_index p->used = %d p->name=%s p->index=%d p->size=%d\n",
 		p->used, p->name, p->index, p->size);
 	memcpy(pfileinfo, p, sizeof(struct rkss_file_info));
 
@@ -420,18 +420,18 @@ static int rkss_get_fileinfo_by_name(
 	len = strlen(filename);
 	if (len > RKSS_NAME_MAX_LENGTH - 1)
 	{
-		printf("filename is too long. length:%u", len);
+		printf("filename is too long. length:%u\n", len);
 		return -1;
 	}
 
 	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
-		printf("malloc table_data fail \n");
+		printf("malloc table_data fail\n");
 		return -1;
 	}
 	ret = rkss_read_patition_tables(table_data);
 	if (ret < 0) {
-		printf("rkss_read_patition_tables fail ! ret: %d.", ret);
+		printf("rkss_read_patition_tables fail ! ret: %d.\n", ret);
 		free(table_data);
 		return -1;
 	}
@@ -453,7 +453,7 @@ static int rkss_get_fileinfo_by_name(
 
 			if (!strcmp(p->name, filename))
 			{
-				debug("rkss_get_fileinfo_by_name: hit table[%d/%d], index[%d/%d]",
+				debug("rkss_get_fileinfo_by_name: hit table[%d/%d], index[%d/%d]\n",
 						i, RKSS_PARTITION_TABLE_COUNT, n, RKSS_EACH_FILEFOLDER_COUNT);
 				memcpy(pfileinfo, p, sizeof(struct rkss_file_info));
 				free(table_data);
@@ -484,14 +484,14 @@ static int rkss_get_fileinfo_by_name(
 
 			} while(cur_inpos && cur_svpos);
 
-			debug("Matched folder: %s", p->name);
+			debug("Matched folder: %s\n", p->name);
 			free(table_data);
 			return -100;
 UNMATCHFOLDER:
 			debug("Unmatched ...");
 		}
 	}
-	debug("rkss_get_fileinfo_by_name: file or dir no found!");
+	debug("rkss_get_fileinfo_by_name: file or dir no found!\n");
 	free(table_data);
 	return -1;
 }
@@ -506,18 +506,18 @@ static int rkss_get_dirs_by_name(char* filename)
 	len = strlen(filename);
 	if (len > RKSS_NAME_MAX_LENGTH - 1)
 	{
-		printf("filename is too long. length:%u", len);
+		printf("filename is too long. length:%u\n", len);
 		return -1;
 	}
 
 	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
-		printf("malloc table_data fail \n");
+		printf("malloc table_data fail\n");
 		return -1;
 	}
 	ret = rkss_read_patition_tables(table_data);
 	if (ret < 0) {
-		printf("rkss_read_patition_tables fail ! ret: %d.", ret);
+		printf("rkss_read_patition_tables fail ! ret: %d.\n", ret);
 		free(table_data);
 		return -1;
 	}
@@ -540,7 +540,7 @@ static int rkss_get_dirs_by_name(char* filename)
 
 			// Full Matching
 			ret = memcmp(p->name, filename, strlen(filename));
-			debug("comparing [fd:%d] : %s ?= %s , ret:%d",
+			debug("comparing [fd:%d] : %s ?= %s , ret:%d\n",
 					i*RKSS_EACH_FILEFOLDER_COUNT+n, p->name, filename, ret);
 			if (!ret && strlen(p->name) > strlen(filename))
 			{
@@ -567,7 +567,7 @@ static int rkss_get_empty_section_from_usedflags(int section_size)
 	int ret = rkss_read_section(&rkss);
 	if (ret < 0)
 	{
-		printf("rkss_read_section fail ! ret: %d.", ret);
+		printf("rkss_read_section fail ! ret: %d.\n", ret);
 		return -1;
 	}
 
@@ -591,7 +591,7 @@ static int rkss_get_empty_section_from_usedflags(int section_size)
 		}
 	}
 
-	printf("Not enough space available in secure storage !");
+	printf("Not enough space available in secure storage !\n");
 	return -10;
 }
 
@@ -602,14 +602,14 @@ static int rkss_incref_multi_usedflags_sections(unsigned int index, unsigned int
 	uint8_t *flag;
 
 	if ((index + num) >= RKSS_DATA_SECTION_COUNT) {
-		printf("index[%d] out of range.", index);
+		printf("index[%d] out of range.\n", index);
 		return -1;
 	}
 
 	rkss.index = RKSS_USEDFLAGS_INDEX;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_multi_sections fail ! ret: %d.", ret);
+		printf("rkss_read_multi_sections fail ! ret: %d.\n", ret);
 		return -1;
 	}
 
@@ -617,7 +617,7 @@ static int rkss_incref_multi_usedflags_sections(unsigned int index, unsigned int
 		flag = (uint8_t *)rkss.data + (int)index/2;
 		value = index & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
 		if (++value > 0xF) {
-			printf("reference out of data: %d", value);
+			printf("reference out of data: %d\n", value);
 			value = 0xF;
 		}
 		*flag = index & 0x1 ? (*flag & 0xF0) | (value & 0x0F) :
@@ -625,7 +625,7 @@ static int rkss_incref_multi_usedflags_sections(unsigned int index, unsigned int
 	}
 	ret = rkss_write_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_write_multi_sections fail ! ret: %d.", ret);
+		printf("rkss_write_multi_sections fail ! ret: %d.\n", ret);
 		return -1;
 	}
 	return 0;
@@ -638,21 +638,21 @@ static int rkss_decref_multi_usedflags_sections(unsigned int index, unsigned int
 	uint8_t *flag;
 
 	if ((index + num) >= RKSS_DATA_SECTION_COUNT) {
-		printf("index[%d] out of range.", index);
+		printf("index[%d] out of range.\n", index);
 		return -1;
 	}
 
 	rkss.index = RKSS_USEDFLAGS_INDEX;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_multi_sections fail ! ret: %d.", ret);
+		printf("rkss_read_multi_sections fail ! ret: %d.\n", ret);
 		return -1;
 	}
 	for (i = 0; i < num; i++, index++) {
 		flag = (uint8_t *)rkss.data + (int)index/2;
 		value = index & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
 		if (--value < 0) {
-			printf("reference out of data: %d", value);
+			printf("reference out of data: %d\n", value);
 			value = 0x0;
 		}
 		*flag = index & 0x1 ? (*flag & 0xF0) | (value & 0x0F) :
@@ -660,7 +660,7 @@ static int rkss_decref_multi_usedflags_sections(unsigned int index, unsigned int
 	}
 	ret = rkss_write_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_write_multi_sections fail ! ret: %d.", ret);
+		printf("rkss_write_multi_sections fail ! ret: %d.\n", ret);
 		return -1;
 	}
 	return 0;
@@ -673,13 +673,13 @@ static int rkss_write_empty_ptable(struct rkss_file_info *pfileinfo)
 
 	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
-		printf("malloc table_data fail \n");
+		printf("malloc table_data fail\n");
 		return -1;
 	}
 
 	ret = rkss_read_patition_tables(table_data);
 	if (ret < 0) {
-		printf("rkss_read_patition_tables fail ! ret: %d.", ret);
+		printf("rkss_read_patition_tables fail ! ret: %d.\n", ret);
 		free(table_data);
 		return -1;
 	}
@@ -698,16 +698,16 @@ static int rkss_write_empty_ptable(struct rkss_file_info *pfileinfo)
 			p += n;
 			if (p->used == 0)
 			{
-				debug("write ptable in [%d][%d] .",i ,n);
+				debug("write ptable in [%d][%d] .\n", i, n);
 				memcpy(p, pfileinfo, sizeof(struct rkss_file_info));
 				p->used = 1;
 				p->id = n;
-				debug("write emt ptable : [%d,%d] name:%s, index:%d, size:%d, used:%d",
+				debug("write emt ptable : [%d,%d] name:%s, index:%d, size:%d, used:%d\n",
 						i,n,p->name,p->index,p->size,p->used);
 				ret = rkss_write_section(&rkss);
 				if (ret < 0)
 				{
-					printf("rkss_write_section fail ! ret: %d.", ret);
+					printf("rkss_write_section fail ! ret: %d.\n", ret);
 					free(table_data);
 					return -1;
 				}
@@ -716,7 +716,7 @@ static int rkss_write_empty_ptable(struct rkss_file_info *pfileinfo)
 			}
 		}
 	}
-	printf("No enough ptable space available in secure storage.");
+	printf("No enough ptable space available in secure storage.\n");
 	free(table_data);
 	return -1;
 }
@@ -731,7 +731,7 @@ static int rkss_write_back_ptable(int fd, struct rkss_file_info *pfileinfo)
 	int ret = rkss_read_section(&rkss);
 	if (ret < 0)
 	{
-		debug("rkss_read_section fail ! ret: %d.", ret);
+		debug("rkss_read_section fail ! ret: %d.\n", ret);
 		return -1;
 	}
 
@@ -740,13 +740,13 @@ static int rkss_write_back_ptable(int fd, struct rkss_file_info *pfileinfo)
 	p += n;
 
 	memcpy(p, pfileinfo, sizeof(struct rkss_file_info));
-	debug("write ptable : [%d,%d] name:%s, index:%d, size:%d, used:%d",
+	debug("write ptable : [%d,%d] name:%s, index:%d, size:%d, used:%d\n",
 			i,n,p->name,p->index,p->size,p->used);
 
 	ret = rkss_write_section(&rkss);
 	if (ret < 0)
 	{
-		debug("rkss_write_section fail ! ret: %d.", ret);
+		debug("rkss_write_section fail ! ret: %d.\n", ret);
 		return -1;
 	}
 
@@ -779,16 +779,16 @@ static int tee_fs_open(struct tee_fs_rpc *fsrpc)
 
 	if (strlen(filename) > RKSS_NAME_MAX_LENGTH)
 	{
-		debug("tee_fs_open: file name too long. %s",filename);
+		debug("tee_fs_open: file name too long. %s\n", filename);
 		return -1;
 	}
 
-	debug("tee_fs_open open file: %s, len: %zu", filename, strlen(filename));
+	debug("tee_fs_open open file: %s, len: %zu\n", filename, strlen(filename));
 	struct rkss_file_info p = {0};
 	int ret = rkss_get_fileinfo_by_name(filename, &p);
 	if (ret < 0)
 	{
-		debug("tee_fs_open : no such file. %s", filename);
+		debug("tee_fs_open : no such file. %s\n", filename);
 		make_newfile = 1;
 	}
 	else
@@ -805,7 +805,7 @@ static int tee_fs_open(struct tee_fs_rpc *fsrpc)
 	{
 		if (CHECKFLAG(fsrpc->flags, TEE_FS_O_CREAT))
 		{
-			debug("tee_fs_open create new file: %s", filename);
+			debug("tee_fs_open create new file: %s\n", filename);
 			strcpy(p.name, filename);
 			p.index = 0;
 			p.size = fsrpc->len;
@@ -814,7 +814,7 @@ static int tee_fs_open(struct tee_fs_rpc *fsrpc)
 			ret = rkss_write_empty_ptable(&p);
 			if (ret < 0)
 			{
-				printf("tee_fs_open : error. %s", filename);
+				printf("tee_fs_open : error. %s\n", filename);
 				return -1;
 			}
 			fsrpc->fd = ret;
@@ -822,12 +822,12 @@ static int tee_fs_open(struct tee_fs_rpc *fsrpc)
 		}
 		else
 		{
-			debug("and no create flag found.");
+			debug("and no create flag found.\n");
 			return -1;
 		}
 	}
 
-	debug("tee_fs_open ! %s , fd:%d, flag: %x, len: %d",
+	debug("tee_fs_open ! %s , fd:%d, flag: %x, len: %d\n",
 			filename, fsrpc->fd, fsrpc->flags, fsrpc->len);
 
 	return fsrpc->fd;
@@ -835,38 +835,38 @@ static int tee_fs_open(struct tee_fs_rpc *fsrpc)
 
 static int tee_fs_close(struct tee_fs_rpc *fsrpc)
 {
-	debug("tee_fs_close !");
+	debug("tee_fs_close !\n");
 	UNREFERENCED_PARAMETER(fsrpc);
 	return 0;
 }
 
 static int tee_fs_read(struct tee_fs_rpc *fsrpc)
 {
-	debug("tee_fs_read! fd:%d, len:%d", fsrpc->fd, fsrpc->len);
+	debug("tee_fs_read! fd:%d, len:%d\n", fsrpc->fd, fsrpc->len);
 	void *data = (void *)(fsrpc + 1);
 
 	struct rkss_file_info p = {0};
 	int ret = rkss_get_fileinfo_by_index(fsrpc->fd, &p);
 	if (ret < 0)
 	{
-		printf("unavailable fd !");
+		printf("unavailable fd !\n");
 		return -1;
 	}
 
 	if (file_seek != 0)
 	{
-		printf("warning !!! file_seek != 0. unsupported now.");
+		printf("warning !!! file_seek != 0. unsupported now.\n");
 	}
 
 	int num = fsrpc->len / RKSS_DATA_LEN + 1;
 	int di = 0;
-	debug("reading section[%d], fd:%d, len:%d, filesize:%d",
+	debug("reading section[%d], fd:%d, len:%d, filesize:%d\n",
 			p.index, fsrpc->fd, fsrpc->len, p.size);
 
 	uint8_t *temp_file_data = malloc(num * RKSS_DATA_LEN);
 	ret = rkss_read_multi_sections(temp_file_data, p.index, num);
 	if (ret < 0) {
-		printf("unavailable file index");
+		printf("unavailable file index\n");
 		free(temp_file_data);
 		return -1;
 	}
@@ -879,44 +879,44 @@ static int tee_fs_read(struct tee_fs_rpc *fsrpc)
 
 static int tee_fs_write(struct tee_fs_rpc *fsrpc)
 {
-	debug("tee_fs_write ! fd:%d, lenth:%d",fsrpc->fd, fsrpc->len);
+	debug("tee_fs_write ! fd:%d, lenth:%d\n", fsrpc->fd, fsrpc->len);
 	void *data = (void *)(fsrpc + 1);
 
 	if (fsrpc->fd < 0)
 	{
-		printf("tee_fs_write error ! wrong fd : %d",fsrpc->fd);
+		printf("tee_fs_write error ! wrong fd : %d\n", fsrpc->fd);
 		return -1;
 	}
 
 	if (file_seek != 0)
 	{
-		printf("warning !!! file_seek != 0. unsupported now.");
+		printf("warning !!! file_seek != 0. unsupported now.\n");
 	}
 
 	struct rkss_file_info p = {0};
 	int ret = rkss_get_fileinfo_by_index(fsrpc->fd, &p);
 	if (ret < 0)
 	{
-		printf("tee_fs_write: fd unvailable!");
+		printf("tee_fs_write: fd unvailable!\n");
 		return -1;
 	}
 
 	p.size = fsrpc->len;
 	int num = fsrpc->len / RKSS_DATA_LEN + 1;
 	p.index = rkss_get_empty_section_from_usedflags(num);
-	debug("Get Empty section in %d", p.index);
+	debug("Get Empty section in %d\n", p.index);
 	p.used = 1;
 
 	ret = rkss_incref_multi_usedflags_sections(p.index, num);
 	if (ret < 0) {
-		printf("rkss_incref_multi_usedflags_sections error !");
+		printf("rkss_incref_multi_usedflags_sections error !\n");
 		ret = -1;
 	}
 
 	ret = rkss_write_back_ptable(fsrpc->fd, &p);
 	if (ret < 0)
 	{
-		printf("tee_fs_write: write ptable error!");
+		printf("tee_fs_write: write ptable error!\n");
 		return -1;
 	}
 
@@ -935,7 +935,7 @@ static int tee_fs_write(struct tee_fs_rpc *fsrpc)
 
 static int tee_fs_seek(struct tee_fs_rpc *fsrpc)
 {
-	debug("tee_fs_seek ! fd:%d, seek:%d, flag:%x", fsrpc->fd, fsrpc->arg, fsrpc->flags);
+	debug("tee_fs_seek ! fd:%d, seek:%d, flag:%x\n", fsrpc->fd, fsrpc->arg, fsrpc->flags);
 
 	if (fsrpc->flags == TEE_FS_SEEK_CUR)
 	{
@@ -952,7 +952,7 @@ static int tee_fs_seek(struct tee_fs_rpc *fsrpc)
 		int ret = rkss_get_fileinfo_by_index(fsrpc->fd, &p);
 		if (ret < 0)
 		{
-			printf("unavilable fd.");
+			printf("unavilable fd.\n");
 			return -1;
 		}
 		file_seek = p.size + fsrpc->arg;
@@ -960,7 +960,7 @@ static int tee_fs_seek(struct tee_fs_rpc *fsrpc)
 	}
 	else
 	{
-		printf("tee_fs_seek: unsupport seed mode.");
+		printf("tee_fs_seek: unsupport seed mode.\n");
 		return -1;
 	}
 
@@ -975,19 +975,19 @@ static int tee_fs_unlink(struct tee_fs_rpc *fsrpc)
 	int ret = rkss_get_fileinfo_by_name(filename, &p);
 	if (ret < 0)
 	{
-		printf("tee_fs_unlink : no such file. %s", filename);
+		printf("tee_fs_unlink : no such file. %s\n", filename);
 		return 0;
 	}
 	int fd = ret;
 
-	debug("tee_fs_unlink ! %s fd:%d index:%d size:%d", filename, fd, p.index, p.size);
+	debug("tee_fs_unlink ! %s fd:%d index:%d size:%d\n", filename, fd, p.index, p.size);
 
 	/* decrease ref from usedflags */
 	int num = p.size / RKSS_DATA_LEN + 1;
 	ret = rkss_decref_multi_usedflags_sections(p.index, num);
 	if (ret < 0)
 	{
-		printf("rkss_decref_multi_usedflags_sections error !");
+		printf("rkss_decref_multi_usedflags_sections error !\n");
 		return -1;
 	}
 
@@ -996,7 +996,7 @@ static int tee_fs_unlink(struct tee_fs_rpc *fsrpc)
 	ret = rkss_write_back_ptable(fd, &p);
 	if (ret < 0)
 	{
-		printf("tee_fs_unlink : write back error %d", ret);
+		printf("tee_fs_unlink : write back error %d\n", ret);
 		return -1;
 	}
 
@@ -1012,13 +1012,13 @@ static int tee_fs_link(struct tee_fs_rpc *fsrpc)
 	char *filename = (char *)(fsrpc + 1);
 	size_t offset_new_fn = strlen(filename) + 1;
 	char *newfilename = filename + offset_new_fn;
-	debug("tee_fs_link ! %s -> %s", filename, newfilename);
+	debug("tee_fs_link ! %s -> %s\n", filename, newfilename);
 
 	struct rkss_file_info p_old = {0};
 	int ret = rkss_get_fileinfo_by_name(filename, &p_old);
 	if (ret < 0)
 	{
-		printf("cannot find src file %s.", filename);
+		printf("cannot find src file %s.\n", filename);
 		return -1;
 	}
 
@@ -1026,7 +1026,7 @@ static int tee_fs_link(struct tee_fs_rpc *fsrpc)
 	ret = rkss_get_fileinfo_by_name(newfilename, &p_check);
 	if (!ret)
 	{
-		printf("file exist ! %s.", newfilename);
+		printf("file exist ! %s.\n", newfilename);
 		return -1;
 	}
 
@@ -1036,7 +1036,7 @@ static int tee_fs_link(struct tee_fs_rpc *fsrpc)
 	ret = rkss_write_empty_ptable(&p_new);
 	if (ret < 0)
 	{
-		printf("tee_fs_open : error. %s", filename);
+		printf("tee_fs_open : error. %s\n", filename);
 		return -1;
 	}
 
@@ -1044,7 +1044,7 @@ static int tee_fs_link(struct tee_fs_rpc *fsrpc)
 	ret = rkss_incref_multi_usedflags_sections(p_new.index, num);
 	if (ret < 0)
 	{
-		printf("rkss_incref_multi_usedflags_sections error !");
+		printf("rkss_incref_multi_usedflags_sections error !\n");
 		return -1;
 	}
 
@@ -1059,13 +1059,13 @@ static int tee_fs_rename(struct tee_fs_rpc *fsrpc)
 {
 	char *filenames = (char *)(fsrpc + 1);
 	char *newnames = filenames + strlen(filenames) + 1;
-	debug("rename: %s -> %s", filenames, newnames);
+	debug("rename: %s -> %s\n", filenames, newnames);
 
 	struct rkss_file_info p = {0};
 	int ret = rkss_get_fileinfo_by_name(filenames, &p);
 	if (ret < 0)
 	{
-		printf("filename no found .");
+		printf("filename no found .\n");
 		return -1;
 	}
 
@@ -1074,7 +1074,7 @@ static int tee_fs_rename(struct tee_fs_rpc *fsrpc)
 	ret = rkss_write_back_ptable(ret, &p);
 	if (ret < 0)
 	{
-		printf("write ptable error!");
+		printf("write ptable error!\n");
 		return -1;
 	}
 
@@ -1083,10 +1083,10 @@ static int tee_fs_rename(struct tee_fs_rpc *fsrpc)
 
 static int tee_fs_truncate(struct tee_fs_rpc *fsrpc)
 {
-	debug("tee_fs_truncate: fd:%d, lenth:%d", fsrpc->fd, fsrpc->arg);
+	debug("tee_fs_truncate: fd:%d, lenth:%d\n", fsrpc->fd, fsrpc->arg);
 	if (fsrpc->fd < 0)
 	{
-		printf("tee_fs_truncate: fd unavilable !");
+		printf("tee_fs_truncate: fd unavilable !\n");
 		return -1;
 	}
 
@@ -1094,7 +1094,7 @@ static int tee_fs_truncate(struct tee_fs_rpc *fsrpc)
 	int ret = rkss_get_fileinfo_by_index(fsrpc->fd, &p);
 	if (ret < 0)
 	{
-		printf("fd unvailable!");
+		printf("fd unvailable!\n");
 		return -1;
 	}
 
@@ -1102,7 +1102,7 @@ static int tee_fs_truncate(struct tee_fs_rpc *fsrpc)
 	ret = rkss_write_back_ptable(fsrpc->fd, &p);
 	if (ret < 0)
 	{
-		printf("tee_fs_write: write ptable error!");
+		printf("tee_fs_write: write ptable error!\n");
 		return -1;
 	}
 	return 0;
@@ -1112,7 +1112,7 @@ static int tee_fs_mkdir(struct tee_fs_rpc *fsrpc)
 {
 	char *dirname = (char *)(fsrpc + 1);
 	UNREFERENCED_PARAMETER(dirname);
-	debug("tee_fs_mkdir: %s",dirname);
+	debug("tee_fs_mkdir: %s\n", dirname);
 	return 0;
 }
 
@@ -1123,9 +1123,9 @@ static int tee_fs_opendir(struct tee_fs_rpc *fsrpc)
 	int ret = rkss_get_dirs_by_name(dirname);
 	if (ret < 0)
 	{
-		printf("tee_fs_opendir: error");
+		printf("tee_fs_opendir: error\n");
 	}
-	debug("tee_fs_opendir: %s, seek/num:%d/%d", dirname, dir_seek, dir_num);
+	debug("tee_fs_opendir: %s, seek/num:%d/%d\n", dirname, dir_seek, dir_num);
 	return 0;
 }
 
@@ -1133,7 +1133,7 @@ static int tee_fs_closedir(struct tee_fs_rpc *fsrpc)
 {
 	char *dirname = (char *)(fsrpc + 1);
 	UNREFERENCED_PARAMETER(dirname);
-	debug("tee_fs_closedir: %s", dirname);
+	debug("tee_fs_closedir: %s\n", dirname);
 	dir_seek = 0;
 	dir_num = 0;
 	return 0;
@@ -1142,12 +1142,12 @@ static int tee_fs_closedir(struct tee_fs_rpc *fsrpc)
 static int tee_fs_readdir(struct tee_fs_rpc *fsrpc)
 {
 	char *dirname = (char *)(fsrpc + 1);
-	printf("seek/num:%d/%d",dir_seek, dir_num);
+	printf("seek/num:%d/%d\n", dir_seek, dir_num);
 	if (dir_seek == dir_num)
 	{
 		dirname = NULL;
 		fsrpc->len = 0;
-		printf("tee_fs_readdir: END");
+		printf("tee_fs_readdir: END\n");
 		return -1;
 	}
 
@@ -1155,41 +1155,41 @@ static int tee_fs_readdir(struct tee_fs_rpc *fsrpc)
 	fsrpc->len = strlen(dir_cache[dir_seek]) + 1;
 	++dir_seek;
 
-	debug("tee_fs_readdir: %s", dirname);
+	debug("tee_fs_readdir: %s\n", dirname);
 	return 0;
 }
 
 static int tee_fs_rmdir(struct tee_fs_rpc *fsrpc)
 {
 	char *dirname = (char *)(fsrpc + 1);
-	debug("tee_fs_rmdir: %s", dirname);
+	debug("tee_fs_rmdir: %s\n", dirname);
 
 	struct rkss_file_info p = {0};
 	int ret = rkss_get_fileinfo_by_name(dirname, &p);
 	if (ret == -100)
 	{
-		printf("dir is not empty.");
+		printf("dir is not empty.\n");
 		return -1;
 	}
 	else if (ret >= 0)
 	{
-		printf("%s is not a dir.", p.name);
+		printf("%s is not a dir.\n", p.name);
 		return -1;
 	}
-	debug("rmdir success.");
+	debug("rmdir success.\n");
 	return 0;
 }
 
 static int tee_fs_access(struct tee_fs_rpc *fsrpc)
 {
 	char *filename = (char *)(fsrpc + 1);
-	debug("tee_fs_access: name:%s,flag:%x",filename,fsrpc->flags);
+	debug("tee_fs_access: name:%s,flag:%x\n", filename, fsrpc->flags);
 
 	struct rkss_file_info p = {0};
 	int ret = rkss_get_fileinfo_by_name(filename, &p);
 	if (ret < 0 && ret != -100)
 	{
-		debug("tee_fs_access: %s no such file or directory.", filename);
+		debug("tee_fs_access: %s no such file or directory.\n", filename);
 		return -1;
 	}
 
@@ -1197,7 +1197,7 @@ static int tee_fs_access(struct tee_fs_rpc *fsrpc)
 	{
 		if (!CHECKFLAG(p.flags, RK_FS_R))
 		{
-			printf("tee_fs_access: no permission FS_R_OK in %x.", p.flags);
+			printf("tee_fs_access: no permission FS_R_OK in %x.\n", p.flags);
 			return -1;
 		}
 	}
@@ -1206,7 +1206,7 @@ static int tee_fs_access(struct tee_fs_rpc *fsrpc)
 	{
 		if (!CHECKFLAG(p.flags, RK_FS_W))
 		{
-			printf("tee_fs_access: no permission FS_W_OK in %x.", p.flags);
+			printf("tee_fs_access: no permission FS_W_OK in %x.\n", p.flags);
 			return -1;
 		}
 	}
@@ -1234,12 +1234,12 @@ int tee_supp_rk_fs_init(void)
 	// Verify Partition Table
 	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
-		printf("malloc table_data fail \n");
+		printf("malloc table_data fail\n");
 		return -1;
 	}
 	int ret = rkss_read_patition_tables(table_data);
 	if (ret < 0) {
-		printf("rkss_read_patition_tables fail ! ret: %d.", ret);
+		printf("rkss_read_patition_tables fail ! ret: %d.\n", ret);
 		free(table_data);
 		return -1;
 	}
@@ -1247,7 +1247,7 @@ int tee_supp_rk_fs_init(void)
 	/* Verify Partition Table*/
 	ret = rkss_verify_ptable(table_data);
 	if (ret < 0) {
-		printf("rkss_verify_ptable fail ! ret: %d.", ret);
+		printf("rkss_verify_ptable fail ! ret: %d.\n", ret);
 		free(table_data);
 		return -1;
 	}
@@ -1260,13 +1260,13 @@ int tee_supp_rk_fs_init(void)
 	ret = rkss_read_section(&rkss);
 	if (ret < 0)
 	{
-		printf("rkss_read_section fail ! ret: %d.", ret);
+		printf("rkss_read_section fail ! ret: %d.\n", ret);
 		return -1;
 	}
 	ret = rkss_verify_usedflags(&rkss);
 	if (ret < 0)
 	{
-		printf("rkss_verify_usedflags fail ! ret: %d.", ret);
+		printf("rkss_verify_usedflags fail ! ret: %d.\n", ret);
 		return -1;
 	}
 
@@ -1291,85 +1291,85 @@ int tee_supp_rk_fs_process(void *cmd, size_t cmd_size)
 
 	if (cmd_size < sizeof(struct tee_fs_rpc))
 	{
-		printf(">>>cmd_size < sizeof(struct tee_fs_rpc) !");
+		printf(">>>cmd_size < sizeof(struct tee_fs_rpc) !\n");
 		return ret;
 	}
 
 	if (cmd == NULL)
 	{
-		printf(">>>cmd == NULL !");
+		printf(">>>cmd == NULL !\n");
 		return ret;
 	}
 
 	switch (fsrpc->op) {
 	case TEE_FS_OPEN:
-		debug(">>>>>>> [%d] TEE_FS_OPEN !", rkss_step++);
+		debug(">>>>>>> [%d] TEE_FS_OPEN !\n", rkss_step++);
 		ret = tee_fs_open(fsrpc);
 		break;
 	case TEE_FS_CLOSE:
-		debug(">>>>>>> [%d] TEE_FS_CLOSE !", rkss_step++);
+		debug(">>>>>>> [%d] TEE_FS_CLOSE !\n", rkss_step++);
 		ret = tee_fs_close(fsrpc);
 		break;
 	case TEE_FS_READ:
-		debug(">>>>>>> [%d] TEE_FS_READ !", rkss_step++);
+		debug(">>>>>>> [%d] TEE_FS_READ !\n", rkss_step++);
 		ret = tee_fs_read(fsrpc);
 		break;
 	case TEE_FS_WRITE:
-		debug(">>>>>>> [%d] TEE_FS_WRITE !", rkss_step++);
+		debug(">>>>>>> [%d] TEE_FS_WRITE !\n", rkss_step++);
 		ret = tee_fs_write(fsrpc);
 		break;
 	case TEE_FS_SEEK:
-		debug(">>>>>>> [%d] TEE_FS_SEEK !", rkss_step++);
+		debug(">>>>>>> [%d] TEE_FS_SEEK !\n", rkss_step++);
 		ret = tee_fs_seek(fsrpc);
 		break;
 	case TEE_FS_UNLINK:
-		debug(">>>>>>> [%d] TEE_FS_UNLINK !", rkss_step++);
+		debug(">>>>>>> [%d] TEE_FS_UNLINK !\n", rkss_step++);
 		ret = tee_fs_unlink(fsrpc);
 		break;
 	case TEE_FS_RENAME:
-		debug(">>>>>>> [%d] TEE_FS_RENAME !", rkss_step++);
+		debug(">>>>>>> [%d] TEE_FS_RENAME !\n", rkss_step++);
 		ret = tee_fs_rename(fsrpc);
 		break;
 	case TEE_FS_TRUNC:
-		debug(">>>>>>> [%d] TEE_FS_TRUNC !", rkss_step++);
+		debug(">>>>>>> [%d] TEE_FS_TRUNC !\n", rkss_step++);
 		ret = tee_fs_truncate(fsrpc);
 		break;
 	case TEE_FS_MKDIR:
-		debug(">>>>>>> [%d] TEE_FS_MKDIR !", rkss_step++);
+		debug(">>>>>>> [%d] TEE_FS_MKDIR !\n", rkss_step++);
 		ret = tee_fs_mkdir(fsrpc);
-		debug(">>>>>>> ret = [%d]  !", ret);
+		debug(">>>>>>> ret = [%d]  ! \n", ret);
 		break;
 	case TEE_FS_OPENDIR:
-		debug(">>>>>>> [%d] TEE_FS_OPENDIR !", rkss_step++);
+		debug(">>>>>>> [%d] TEE_FS_OPENDIR !\n", rkss_step++);
 		ret = tee_fs_opendir(fsrpc);
 		break;
 	case TEE_FS_CLOSEDIR:
-		debug(">>>>>>> [%d] TEE_FS_CLOSEDIR !", rkss_step++);
+		debug(">>>>>>> [%d] TEE_FS_CLOSEDIR !\n", rkss_step++);
 		ret = tee_fs_closedir(fsrpc);
 		break;
 	case TEE_FS_READDIR:
-		debug(">>>>>>> [%d] TEE_FS_READDIR !", rkss_step++);
+		debug(">>>>>>> [%d] TEE_FS_READDIR !\n", rkss_step++);
 		ret = tee_fs_readdir(fsrpc);
 		break;
 	case TEE_FS_RMDIR:
-		debug(">>>>>>> [%d] TEE_FS_RMDIR !", rkss_step++);
+		debug(">>>>>>> [%d] TEE_FS_RMDIR !\n", rkss_step++);
 		ret = tee_fs_rmdir(fsrpc);
 		break;
 	case TEE_FS_ACCESS:
-		debug(">>>>>>> [%d] TEE_FS_ACCESS !", rkss_step++);
+		debug(">>>>>>> [%d] TEE_FS_ACCESS !\n", rkss_step++);
 		ret = tee_fs_access(fsrpc);
 		break;
 	case TEE_FS_LINK:
-		debug(">>>>>>> [%d] TEE_FS_LINK !", rkss_step++);
+		debug(">>>>>>> [%d] TEE_FS_LINK !\n", rkss_step++);
 		ret = tee_fs_link(fsrpc);
 		break;
 	default:
-		printf(">>>>> DEFAULT !! %d",fsrpc->op);
+		printf(">>>>> DEFAULT !! %d\n", fsrpc->op);
 		break;
 	}
 
 	fsrpc->res = ret;
-	debug(">>>>>>> fsrpc->res = [%d]	!", fsrpc->res);
+	debug(">>>>>>> fsrpc->res = [%d]	!\n", fsrpc->res);
 
 	return ret;
 }

commit 1153acfe76a2fda28b93b88d813c61def39ba3e6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 10 11:17:51 2019 +0800

    android: print android avb enable state
    
    Change-Id: I0be76d29eef3614d4885e2d69048cf521352ffc0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 416b63c712..d9914da3bf 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -941,10 +941,12 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 		return -1;
 
 	if (vboot_flag) {
+		printf("SecureBoot enabled, AVB verify\n");
 		if (android_slot_verify(boot_partname, &load_address,
 					slot_suffix))
 			return -1;
 	} else {
+		printf("SecureBoot disabled, AVB skip\n");
 		if (load_android_image(dev_desc, boot_partname,
 				       slot_suffix, &load_address))
 			return -1;

commit d20b913d83ce7f0be5b3344587d7d9ec18bd2e57
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 10 12:49:58 2019 +0800

    configs: evb-rk3308(aarch64/32): enable console info quiet
    
    Change-Id: I94971b83a13b4b8bbd86d6e5b253951a45a44d7a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-aarch32-rk3308_defconfig b/configs/evb-aarch32-rk3308_defconfig
index c836b2c1a1..07162ea3db 100644
--- a/configs/evb-aarch32-rk3308_defconfig
+++ b/configs/evb-aarch32-rk3308_defconfig
@@ -15,6 +15,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 # CONFIG_PASS_DEVICE_SERIAL_BY_FDT is not set
 CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 # CONFIG_FASTBOOT is not set
diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index 362f98f361..fe55fa6820 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -14,6 +14,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 # CONFIG_PASS_DEVICE_SERIAL_BY_FDT is not set
 CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 # CONFIG_FASTBOOT is not set

commit 6ff768feeff0b63919ca4d4dbd53146ce183dc80
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 3 14:11:33 2019 +0800

    common: add system boot time report
    
    Change-Id: Id7db8f7f7e30719188403f92282ca17c6fe564d6
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index 61f64715bb..6312f130ff 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -78,6 +78,11 @@ __weak void board_quiesce_devices(void)
  */
 static void announce_and_cleanup(int fake)
 {
+	ulong us;
+
+	us = (get_ticks() - gd->sys_start_tick) / (COUNTER_FREQUENCY / 1000000);
+	printf("Total: %ld.%ld ms\n", us / 1000, us % 1000);
+
 	printf("\nStarting kernel ...%s\n\n", fake ?
 		"(fake run for tracing)" : "");
 	bootstage_mark_name(BOOTSTAGE_ID_BOOTM_HANDOFF, "start_kernel");
diff --git a/common/board_f.c b/common/board_f.c
index 888dc367ae..58b72b01e6 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -702,6 +702,8 @@ static int initf_bootstage(void)
 			IS_ENABLED(CONFIG_BOOTSTAGE_STASH);
 	int ret;
 
+	gd->sys_start_tick = get_ticks();
+
 	ret = bootstage_init(!from_spl);
 	if (ret)
 		return ret;
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index d43ea5a173..343c1e7841 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -134,6 +134,7 @@ typedef struct global_data {
 	int new_line;
 #endif
 	struct pre_serial serial;
+	ulong sys_start_tick;		/* For report system start-up time */
 #ifdef CONFIG_LOG
 	int log_drop_count;		/* Number of dropped log messages */
 	int default_log_level;		/* For devices with no filters */

commit 5238e9ab5b0a38c2da2bfd25bbde2e5d41e85f56
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Sun Jan 6 18:28:44 2019 -0800

    rkflash: protect flash former space from stress test
    
    Mainly to protect the uboot and trust partition from damage,
    continue testing after power-on
    
    Change-Id: Iaf362658c6d30662e229c72c310a078c37ff613e
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/rkflash_debug.c b/drivers/rkflash/rkflash_debug.c
index 38c2842170..df532db1fd 100644
--- a/drivers/rkflash/rkflash_debug.c
+++ b/drivers/rkflash/rkflash_debug.c
@@ -45,7 +45,7 @@ void blk_stress_test(struct udevice *udev)
 {
 	struct blk_desc *block_dev = rockchip_get_bootdev();
 	u16 i, j, loop = 0;
-	u32 test_end_lba;
+	u32 test_end_lba, test_begin_lba;
 	u32 test_lba;
 	u16 test_sec_count = 1;
 	u16 print_flag;
@@ -56,15 +56,16 @@ void blk_stress_test(struct udevice *udev)
 	}
 
 	if (block_dev->if_type == IF_TYPE_SPINOR)
-		test_lba = 0x800;
+		test_begin_lba = 0x4000;
 	else
-		test_lba = 0;
+		test_begin_lba = 0x8000;
 
 	test_end_lba = block_dev->lba;
 	pwrite32 = (u32 *)pwrite;
 	for (i = 0; i < (max_test_sector * 512); i++)
 		pwrite[i] = i;
-	for (loop = 0; loop < 10; loop++) {
+	for (loop = 0; loop < 100; loop++) {
+		test_lba = test_begin_lba;
 		printf("---------Test loop = %d---------\n", loop);
 		printf("---------Test ftl write---------\n");
 		test_sec_count = 1;
@@ -76,6 +77,7 @@ void blk_stress_test(struct udevice *udev)
 			blk_dread(block_dev, test_lba, test_sec_count, pread);
 			for (j = 0; j < test_sec_count * 512; j++) {
 				if (pwrite[j] != pread[j]) {
+					printf("rkflash stress test fail\n");
 					rkflash_print_hex("w:",
 							  pwrite,
 							  4,
@@ -91,7 +93,6 @@ void blk_stress_test(struct udevice *udev)
 					       pread[j]);
 					while (1)
 						;
-					break;
 				}
 			}
 			print_flag = test_lba & 0x1FF;
@@ -104,6 +105,7 @@ void blk_stress_test(struct udevice *udev)
 		}
 		printf("---------Test ftl check---------\n");
 
+		test_lba = test_begin_lba;
 		test_sec_count = 1;
 		for (; (test_lba + test_sec_count) < test_end_lba;) {
 			pwrite32[0] = test_lba;
@@ -114,13 +116,14 @@ void blk_stress_test(struct udevice *udev)
 
 			for (j = 0; j < test_sec_count * 512; j++) {
 				if (pwrite[j] != pread[j]) {
+					printf("rkflash stress test fail\n");
 					printf("r=%x, n=%x, w=%x, r=%x\n",
 					       test_lba,
 					       j,
 					       pwrite[j],
 					       pread[j]);
-					/* while(1); */
-					break;
+					while (1)
+						;
 				}
 			}
 			test_lba += test_sec_count;

commit 513e5cb68757c42dfa68ba53b99428bfa9e1f164
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Tue Jan 8 21:12:50 2019 +0800

    drm/rockchip: vop: add hdmi pol config for px3se
    
    if miss this commit will appear hdmi display abnormal at
    some TV.
    
    Change-Id: I86f1425135ccf5fb53c0373ad6d070e1f6efe66d
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index 669f028c67..fab350ba25 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -425,9 +425,19 @@ static const struct vop_ctrl rk3036_ctrl_data = {
 	.dsp_blank = VOP_REG(RK3036_DSP_CTRL1, 0x1, 24),
 	.dclk_pol = VOP_REG(RK3036_DSP_CTRL0, 0x1, 7),
 	.pin_pol = VOP_REG(RK3036_DSP_CTRL0, 0xf, 4),
+	.dither_down = VOP_REG(RK3036_DSP_CTRL0, 0x3, 10),
 	.dsp_layer_sel = VOP_REG(RK3036_DSP_CTRL0, 0x1, 8),
 	.htotal_pw = VOP_REG(RK3036_DSP_HTOTAL_HS_END, 0x1fff1fff, 0),
 	.hact_st_end = VOP_REG(RK3036_DSP_HACT_ST_END, 0x1fff1fff, 0),
+	.hdmi_en = VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 22),
+	.hdmi_dclk_pol = VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 23),
+	.hdmi_pin_pol = VOP_REG(RK3036_INT_SCALER, 0x7, 4),
+	.rgb_en = VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 24),
+	.rgb_dclk_pol = VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 25),
+	.lvds_en = VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 26),
+	.lvds_dclk_pol = VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 27),
+	.mipi_en = VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 28),
+	.mipi_dclk_pol = VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 29),
 	.vtotal_pw = VOP_REG(RK3036_DSP_VTOTAL_VS_END, 0x1fff1fff, 0),
 	.vact_st_end = VOP_REG(RK3036_DSP_VACT_ST_END, 0x1fff1fff, 0),
 	.cfg_done = VOP_REG(RK3036_REG_CFG_DONE, 0x1, 0),
diff --git a/drivers/video/drm/rockchip_vop_reg.h b/drivers/video/drm/rockchip_vop_reg.h
index 18ee5d83f9..12052c6a71 100644
--- a/drivers/video/drm/rockchip_vop_reg.h
+++ b/drivers/video/drm/rockchip_vop_reg.h
@@ -835,6 +835,7 @@
 #define RK3036_SYS_CTRL			0x00
 #define RK3036_DSP_CTRL0		0x04
 #define RK3036_DSP_CTRL1		0x08
+#define RK3036_INT_SCALER		0x0c
 #define RK3036_INT_STATUS		0x10
 #define RK3036_ALPHA_CTRL		0x14
 #define RK3036_WIN0_COLOR_KEY		0x18

commit fe9c49e6edb8df2838b0ce8b7a36022e96b3c2f5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 8 17:47:44 2019 +0800

    fuel gauge: rk816: fix first power on initilize as 0% and 0mAh
    
    1. when first power but not charge in uboot, fuel gauge is initilized
       but miss saving data for kernel fuel gauge;
    2. wait 75us after coulomb init, otherwise read back 0mAh;
    3. always read remain capacity and print it for debug;
    
    Change-Id: Iba30ef4e96942fcfbf61dacabf8199dc896bab64
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk816.c b/drivers/power/fuel_gauge/fg_rk816.c
index 904096e7a0..64b10f3cdd 100644
--- a/drivers/power/fuel_gauge/fg_rk816.c
+++ b/drivers/power/fuel_gauge/fg_rk816.c
@@ -313,6 +313,38 @@ static int rk816_bat_get_ioffset(struct battery_priv *di)
 	return val;
 }
 
+static void rk816_bat_save_dsoc(struct  battery_priv *di, u8 save_soc)
+{
+	static int old_soc = -1;
+
+	if (old_soc != save_soc) {
+		old_soc = save_soc;
+		rk816_bat_write(di, SOC_REG, save_soc);
+	}
+}
+
+static void rk816_bat_save_cap(struct battery_priv *di, int cap)
+{
+	u8 buf;
+	static int old_cap;
+
+	if (old_cap == cap)
+		return;
+
+	if (cap >= di->qmax)
+		cap = di->qmax;
+
+	old_cap = cap;
+	buf = (cap >> 24) & 0xff;
+	rk816_bat_write(di, REMAIN_CAP_REG3, buf);
+	buf = (cap >> 16) & 0xff;
+	rk816_bat_write(di, REMAIN_CAP_REG2, buf);
+	buf = (cap >> 8) & 0xff;
+	rk816_bat_write(di, REMAIN_CAP_REG1, buf);
+	buf = (cap >> 0) & 0xff;
+	rk816_bat_write(di, REMAIN_CAP_REG0, buf);
+}
+
 static void rk816_bat_init_voltage_kb(struct battery_priv *di)
 {
 	int vcalib0, vcalib1;
@@ -627,7 +659,7 @@ static void rk816_bat_init_capacity(struct battery_priv *di, u32 capacity)
 	rk816_bat_write(di, GASCNT_CAL_REG1, buf);
 	buf = (cap >> 0) & 0xff;
 	rk816_bat_write(di, GASCNT_CAL_REG0, buf);
-
+	udelay(75);
 	di->remain_cap = rk816_bat_get_coulomb_cap(di);
 	di->rsoc = rk816_bat_get_rsoc(di);
 }
@@ -984,6 +1016,9 @@ void rk816_bat_init_rsoc(struct battery_priv *di)
 		rk816_bat_first_pwron(di);
 	else
 		rk816_bat_not_first_pwron(di);
+
+	rk816_bat_save_dsoc(di, di->dsoc);
+	rk816_bat_save_cap(di, di->remain_cap);
 }
 
 static int rk816_fg_init(struct battery_priv *di)
@@ -995,6 +1030,7 @@ static int rk816_fg_init(struct battery_priv *di)
 	rk816_bat_init_poffset(di);
 	rk816_bat_clr_initialized_state(di);
 	di->dsoc = rk816_bat_get_dsoc(di);
+	di->remain_cap = rk816_bat_get_prev_cap(di);
 
 	/*
 	 * It's better to init fg in kernel,
@@ -1011,45 +1047,14 @@ static int rk816_fg_init(struct battery_priv *di)
 	di->pwr_vol = di->voltage_avg;
 	rk816_bat_charger_setting(di, di->chrg_type);
 
-	printf("Battery: soc=%d%%, voltage=%dmv, Charger: %s%s\n",
-	       di->dsoc, di->voltage_avg, charger_type_to_name[di->chrg_type],
+	printf("Battery: soc=%d%%, cap=%dmAh, voltage=%dmv, Charger: %s%s\n",
+	       di->dsoc, di->remain_cap, di->voltage_avg,
+	       charger_type_to_name[di->chrg_type],
 	       di->virtual_power ? "(virtual)" : "");
 
 	return 0;
 }
 
-static void rk816_bat_save_dsoc(struct  battery_priv *di, u8 save_soc)
-{
-	static int old_soc = -1;
-
-	if (old_soc != save_soc) {
-		old_soc = save_soc;
-		rk816_bat_write(di, SOC_REG, save_soc);
-	}
-}
-
-static void rk816_bat_save_cap(struct battery_priv *di, int cap)
-{
-	u8 buf;
-	static int old_cap;
-
-	if (old_cap == cap)
-		return;
-
-	if (cap >= di->qmax)
-		cap = di->qmax;
-
-	old_cap = cap;
-	buf = (cap >> 24) & 0xff;
-	rk816_bat_write(di, REMAIN_CAP_REG3, buf);
-	buf = (cap >> 16) & 0xff;
-	rk816_bat_write(di, REMAIN_CAP_REG2, buf);
-	buf = (cap >> 8) & 0xff;
-	rk816_bat_write(di, REMAIN_CAP_REG1, buf);
-	buf = (cap >> 0) & 0xff;
-	rk816_bat_write(di, REMAIN_CAP_REG0, buf);
-}
-
 static u8 rk816_bat_get_chrg_status(struct battery_priv *di)
 {
 	u8 status;

commit 93124741593445359d3aee449c3f701e451a64af
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Dec 28 18:10:18 2018 +0800

    configs: evb-rk3399_defconfig: Remove unused Kconfig option
    
    Change-Id: I78b0b73a0f4aa9356ae7c61a623ebed1563a0454
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index 23ab932de6..2d3df130a2 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -103,8 +103,6 @@ CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
-CONFIG_DRM_ROCKCHIP_LVDS=y
-CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y

commit a6afa223ac907a209513733771207601364edfcd
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Dec 28 18:23:02 2018 +0800

    configs: rk3288_defconfig: enable CONFIG_DRM_ROCKCHIP_INNO_VIDEO_PHY
    
    Change-Id: Ifd9b9bb68420d23680f4bdb73f4522704c59d5d0
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/configs/rk3288_defconfig b/configs/rk3288_defconfig
index 6d45fb2e1d..96254a3f4f 100644
--- a/configs/rk3288_defconfig
+++ b/configs/rk3288_defconfig
@@ -84,6 +84,7 @@ CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_HDMI=y
+CONFIG_DRM_ROCKCHIP_INNO_VIDEO_PHY=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
 CONFIG_DRM_ROCKCHIP_LVDS=y

commit 7f9f5e851ac23eaec8d6f40f60aaa8e51ef2a0ac
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Dec 28 18:18:52 2018 +0800

    configs: rk3326_defconfig: enable CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY
    
    Change-Id: If64d6ead43b330d82812d88536f0ad9091f8af07
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/configs/rk3326_defconfig b/configs/rk3326_defconfig
index 07e980c888..475f391b60 100644
--- a/configs/rk3326_defconfig
+++ b/configs/rk3326_defconfig
@@ -101,6 +101,7 @@ CONFIG_G_DNL_PRODUCT_NUM=0x330d
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y

commit 906a295eb00cc99214a6312c1aa99538865f423b
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Dec 28 18:15:55 2018 +0800

    configs: rk3368_defconfig: enable CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY
    
    Change-Id: I79cc2e78feeba0c48bcab002882c08f435a91fff
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/configs/rk3368_defconfig b/configs/rk3368_defconfig
index 80b4655ebc..99da2a421b 100644
--- a/configs/rk3368_defconfig
+++ b/configs/rk3368_defconfig
@@ -91,6 +91,7 @@ CONFIG_G_DNL_PRODUCT_NUM=0x330a
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y

commit 695a59662eed4b1ac52b28931398139934055885
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Dec 28 18:12:07 2018 +0800

    configs: rk3399pro_defconfig: Remove unused Kconfig option
    
    Change-Id: I1e12ec3651e226b4d3c71b3da0049ce245744f48
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/configs/rk3399pro_defconfig b/configs/rk3399pro_defconfig
index 4b6584a620..35d15637fb 100644
--- a/configs/rk3399pro_defconfig
+++ b/configs/rk3399pro_defconfig
@@ -122,8 +122,6 @@ CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_HDMI=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
-CONFIG_DRM_ROCKCHIP_LVDS=y
-CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y

commit 8617a89a52b3e1b8da27c1560039b67c4e822280
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Dec 28 18:11:26 2018 +0800

    configs: rk322x_defconfig: Remove unused Kconfig option
    
    Change-Id: Ie878ebce426d34708b3b63e5fe849d99b5a352b0
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/configs/rk322x_defconfig b/configs/rk322x_defconfig
index 2a5d1eaa6b..a754c401af 100644
--- a/configs/rk322x_defconfig
+++ b/configs/rk322x_defconfig
@@ -102,9 +102,6 @@ CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_HDMI=y
 CONFIG_ROCKCHIP_INNO_HDMI_PHY=y
-CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
-CONFIG_DRM_ROCKCHIP_LVDS=y
-CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_ROCKCHIP_DRM_TVE=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y

commit 80dfc127322f29771376b1ade0334d4cb98e7ec4
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Dec 28 17:58:30 2018 +0800

    configs: rk3126_defconfig: enable CONFIG_DRM_ROCKCHIP_RGB
    
    Change-Id: I3ff73d77a9474434b88e9a7f0bb6495960eec3a9
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/configs/rk3126_defconfig b/configs/rk3126_defconfig
index 1c8b455120..357f281e53 100644
--- a/configs/rk3126_defconfig
+++ b/configs/rk3126_defconfig
@@ -84,6 +84,7 @@ CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
+CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_ERRNO_STR=y

commit a7825335a8c32c4f8a2c17de3e2cd2e0f84502d4
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Dec 28 17:57:32 2018 +0800

    configs: rk3126_defconfig: enable CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY
    
    Change-Id: I75669e77728f5e1b70dde796946e9b5c7ab01d93
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/configs/rk3126_defconfig b/configs/rk3126_defconfig
index 239559a627..1c8b455120 100644
--- a/configs/rk3126_defconfig
+++ b/configs/rk3126_defconfig
@@ -81,6 +81,7 @@ CONFIG_DISPLAY=y
 CONFIG_VIDEO_ROCKCHIP=y
 CONFIG_DISPLAY_ROCKCHIP_MIPI=y
 CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_LCD=y

commit 15f4dedfc5120b773466452cae439b995b25f2c7
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Sat Dec 8 11:48:33 2018 +0800

    configs: evb-rk3326: enable CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY
    
    Change-Id: I918239a95ffb8328c18dd215ce825c997f2b4ceb
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/configs/evb-rk3326_defconfig b/configs/evb-rk3326_defconfig
index fd02d9f38c..e7e6d9569a 100644
--- a/configs/evb-rk3326_defconfig
+++ b/configs/evb-rk3326_defconfig
@@ -99,6 +99,7 @@ CONFIG_G_DNL_PRODUCT_NUM=0x330d
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y

commit 4973d2b93754a824d160932ff764d26eca0b450e
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Sat Dec 8 11:48:10 2018 +0800

    configs: evb-px30: enable CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY
    
    Change-Id: I797089e0315b1c910f8d674996080a8a99f0152f
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index a79d51a78a..332243d214 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -105,6 +105,7 @@ CONFIG_G_DNL_PRODUCT_NUM=0x330d
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y

commit de867820fcdbdc960d80f6e12968088f5b5ad1ad
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Jan 7 21:06:44 2019 +0800

    rockchip: rk3288: scan sub-nodes of the syscon node
    
    Change-Id: I74eec80993664173e57e0c03f662790cf9e66b5a
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3288/syscon_rk3288.c b/arch/arm/mach-rockchip/rk3288/syscon_rk3288.c
index be4b2b00c3..8703dc0bc9 100644
--- a/arch/arm/mach-rockchip/rk3288/syscon_rk3288.c
+++ b/arch/arm/mach-rockchip/rk3288/syscon_rk3288.c
@@ -22,6 +22,9 @@ U_BOOT_DRIVER(syscon_rk3288) = {
 	.name = "rk3288_syscon",
 	.id = UCLASS_SYSCON,
 	.of_match = rk3288_syscon_ids,
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	.bind = dm_scan_fdt_dev,
+#endif
 };
 
 #if CONFIG_IS_ENABLED(OF_PLATDATA)

commit b69d3ed41b57938bf063245bc1b4774868bb011e
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Dec 28 14:59:17 2018 +0800

    video/drm: lvds: Clean up phy code
    
    The video phy of px30/rk3128/rk3288/rk3368 is now supported by
    inno_video_combo_phy.c/inno_video_phy.c in directory drviers/video/drm.
    
    Change-Id: I5471de3aa7c43fbf379b4313f158038145ab36c1
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index fe081a417c..b36c30d2f0 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -7,766 +7,306 @@
 #include <config.h>
 #include <common.h>
 #include <errno.h>
-#include <malloc.h>
-#include <asm/unaligned.h>
-#include <linux/list.h>
-#include <linux/ioport.h>
-#include <asm/io.h>
-#include <asm/hardware.h>
 #include <dm/device.h>
 #include <dm/read.h>
 #include <dm/ofnode.h>
 #include <syscon.h>
-#include <asm/arch-rockchip/clock.h>
-#include <asm/gpio.h>
+#include <regmap.h>
+#include <dm/device.h>
+#include <dm/read.h>
+#include <linux/media-bus-format.h>
 
 #include "rockchip_display.h"
-#include "rockchip_crtc.h"
 #include "rockchip_connector.h"
+#include "rockchip_phy.h"
 #include "rockchip_panel.h"
 #include "rockchip_lvds.h"
 
-enum rockchip_lvds_sub_devtype {
-	PX30_LVDS,
-	RK3126_LVDS,
-	RK3288_LVDS,
-	RK3368_LVDS,
+#define PX30_GRF_PD_VO_CON1		0x0438
+#define PX30_LVDS_SELECT(x)		HIWORD_UPDATE(x, 14, 13)
+#define PX30_LVDS_MODE_EN(x)		HIWORD_UPDATE(x, 12, 12)
+#define PX30_LVDS_MSBSEL(x)		HIWORD_UPDATE(x, 11, 11)
+#define PX30_LVDS_P2S_EN(x)		HIWORD_UPDATE(x, 10, 10)
+#define PX30_LVDS_VOP_SEL(x)		HIWORD_UPDATE(x,  1,  1)
+
+#define RK3126_GRF_LVDS_CON0		0x0150
+#define RK3126_LVDS_P2S_EN(x)		HIWORD_UPDATE(x,  9,  9)
+#define RK3126_LVDS_MODE_EN(x)		HIWORD_UPDATE(x,  6,  6)
+#define RK3126_LVDS_MSBSEL(x)		HIWORD_UPDATE(x,  3,  3)
+#define RK3126_LVDS_SELECT(x)		HIWORD_UPDATE(x,  2,  1)
+
+#define RK3288_GRF_SOC_CON6		0x025c
+#define RK3288_LVDS_LCDC_SEL(x)		HIWORD_UPDATE(x,  3,  3)
+#define RK3288_GRF_SOC_CON7		0x0260
+#define RK3288_LVDS_PWRDWN(x)		HIWORD_UPDATE(x, 15, 15)
+#define RK3288_LVDS_CON_ENABLE_2(x)	HIWORD_UPDATE(x, 12, 12)
+#define RK3288_LVDS_CON_ENABLE_1(x)	HIWORD_UPDATE(x, 11, 11)
+#define RK3288_LVDS_CON_DEN_POL(x)	HIWORD_UPDATE(x, 10, 10)
+#define RK3288_LVDS_CON_HS_POL(x)	HIWORD_UPDATE(x,  9,  9)
+#define RK3288_LVDS_CON_CLKINV(x)	HIWORD_UPDATE(x,  8,  8)
+#define RK3288_LVDS_CON_STARTPHASE(x)	HIWORD_UPDATE(x,  7,  7)
+#define RK3288_LVDS_CON_TTL_EN(x)	HIWORD_UPDATE(x,  6,  6)
+#define RK3288_LVDS_CON_STARTSEL(x)	HIWORD_UPDATE(x,  5,  5)
+#define RK3288_LVDS_CON_CHASEL(x)	HIWORD_UPDATE(x,  4,  4)
+#define RK3288_LVDS_CON_MSBSEL(x)	HIWORD_UPDATE(x,  3,  3)
+#define RK3288_LVDS_CON_SELECT(x)	HIWORD_UPDATE(x,  2,  0)
+
+#define RK3368_GRF_SOC_CON7		0x041c
+#define RK3368_LVDS_SELECT(x)		HIWORD_UPDATE(x, 14, 13)
+#define RK3368_LVDS_MODE_EN(x)		HIWORD_UPDATE(x, 12, 12)
+#define RK3368_LVDS_MSBSEL(x)		HIWORD_UPDATE(x, 11, 11)
+#define RK3368_LVDS_P2S_EN(x)		HIWORD_UPDATE(x,  6,  6)
+
+enum lvds_format {
+	LVDS_8BIT_MODE_FORMAT_1,
+	LVDS_8BIT_MODE_FORMAT_2,
+	LVDS_8BIT_MODE_FORMAT_3,
+	LVDS_6BIT_MODE,
 };
 
-struct rockchip_lvds_chip_data {
-	u32	chip_type;
-	bool	has_vop_sel;
-	u32	grf_soc_con5;
-	u32	grf_soc_con6;
-	u32	grf_soc_con7;
-	u32	grf_soc_con15;
-	u32	grf_gpio1d_iomux;
-};
+struct rockchip_lvds;
 
-struct rockchip_lvds_device {
-	void	*regbase;
-	void	*grf;
-	void	*ctrl_reg;
-	u32	channel;
-	u32	output;
-	u32	format;
-	struct drm_display_mode *mode;
-	const struct rockchip_lvds_chip_data *pdata;
+struct rockchip_lvds_funcs {
+	void (*enable)(struct rockchip_lvds *lvds, int pipe);
+	void (*disable)(struct rockchip_lvds *lvds);
 };
 
-static inline int lvds_name_to_format(const char *s)
-{
-	if (!s)
-		return -EINVAL;
-
-	if (strncmp(s, "jeida", 6) == 0)
-		return LVDS_FORMAT_JEIDA;
-	else if (strncmp(s, "vesa", 5) == 0)
-		return LVDS_FORMAT_VESA;
-
-	return -EINVAL;
-}
-
-static inline int lvds_name_to_output(const char *s)
-{
-	if (!s)
-		return -EINVAL;
-
-	if (strncmp(s, "rgb", 3) == 0)
-		return DISPLAY_OUTPUT_RGB;
-	else if (strncmp(s, "lvds", 4) == 0)
-		return DISPLAY_OUTPUT_LVDS;
-	else if (strncmp(s, "duallvds", 8) == 0)
-		return DISPLAY_OUTPUT_DUAL_LVDS;
-
-	return -EINVAL;
-}
-
-static inline void lvds_writel(struct rockchip_lvds_device *lvds,
-			      u32 offset, u32 val)
-{
-	writel(val, lvds->regbase + offset);
-
-	if ((lvds->pdata->chip_type == RK3288_LVDS) &&
-	    ((lvds->output == DISPLAY_OUTPUT_DUAL_LVDS) ||
-	     (lvds->output == DISPLAY_OUTPUT_RGB)))
-		writel(val, lvds->regbase + offset + 0x100);
-}
-
-static inline void lvds_msk_reg(struct rockchip_lvds_device *lvds, u32 offset,
-			       u32 msk, u32 val)
-{
-	u32 temp;
-
-	temp = readl(lvds->regbase + offset) & (0xFF - (msk));
-	writel(temp | ((val) & (msk)), lvds->regbase + offset);
-}
+struct rockchip_lvds {
+	struct udevice *dev;
+	struct regmap *grf;
+	struct rockchip_phy *phy;
+	const struct drm_display_mode *mode;
+	const struct rockchip_lvds_funcs *funcs;
+	enum lvds_format format;
+	bool data_swap;
+	bool dual_channel;
+};
 
-static inline u32 lvds_readl(struct rockchip_lvds_device *lvds, u32 offset)
+static inline struct rockchip_lvds *state_to_lvds(struct display_state *state)
 {
-	return readl(lvds->regbase + offset);
-}
+	struct connector_state *conn_state = &state->conn_state;
 
-static inline void lvds_ctrl_writel(struct rockchip_lvds_device *lvds,
-				   u32 offset, u32 val)
-{
-	writel(val, lvds->ctrl_reg + offset);
+	return dev_get_priv(conn_state->dev);
 }
 
-static inline u32 lvds_pmugrf_readl(u32 offset)
+static int rockchip_lvds_connector_init(struct display_state *state)
 {
-	return readl((void *)LVDS_PMUGRF_BASE + offset);
-}
+	struct rockchip_lvds *lvds = state_to_lvds(state);
+	struct connector_state *conn_state = &state->conn_state;
+	struct rockchip_panel *panel = state_get_panel(state);
 
-static inline void lvds_pmugrf_writel(u32 offset, u32 val)
-{
-	writel(val, (void *)LVDS_PMUGRF_BASE + offset);
-}
+	lvds->mode = &conn_state->mode;
+	lvds->phy = conn_state->phy;
+
+	switch (panel->bus_format) {
+	case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:	/* jeida-18 */
+		lvds->format = LVDS_6BIT_MODE;
+		break;
+	case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:	/* jeida-24 */
+		lvds->format = LVDS_8BIT_MODE_FORMAT_2;
+		break;
+	case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:	/* vesa-24 */
+	default:
+		lvds->format = LVDS_8BIT_MODE_FORMAT_1;
+		break;
+	}
 
-static inline u32 lvds_phy_lock(struct rockchip_lvds_device *lvds)
-{
-	u32 val = 0;
-	val = readl(lvds->ctrl_reg + MIPIC_PHY_STATUS);
-	return (val & m_PHY_LOCK_STATUS) ? 1 : 0;
-}
+	conn_state->type = DRM_MODE_CONNECTOR_LVDS;
+	conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
+	conn_state->color_space = V4L2_COLORSPACE_DEFAULT;
 
-static int rockchip_lvds_clk_enable(struct rockchip_lvds_device *lvds)
-{
 	return 0;
 }
 
-static int rk336x_lvds_pwr_off(struct display_state *state)
+static int rockchip_lvds_connector_enable(struct display_state *state)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	struct rockchip_lvds_device *lvds = conn_state->private;
+	struct rockchip_lvds *lvds = state_to_lvds(state);
+	struct crtc_state *crtc_state = &state->crtc_state;
+	int pipe = crtc_state->crtc_id;
+	int ret;
 
-	/* disable lvds lane and power off pll */
-	lvds_writel(lvds, MIPIPHY_REGEB,
-		    v_LANE0_EN(0) | v_LANE1_EN(0) | v_LANE2_EN(0) |
-		    v_LANE3_EN(0) | v_LANECLK_EN(0) | v_PLL_PWR_OFF(1) |
-		    v_LVDS_BGPD(1));
+	if (lvds->funcs->enable)
+		lvds->funcs->enable(lvds, pipe);
 
-	/* power down lvds pll and bandgap */
-	lvds_msk_reg(lvds, MIPIPHY_REG1,
-		     m_SYNC_RST | m_LDO_PWR_DOWN | m_PLL_PWR_DOWN,
-		     v_SYNC_RST(1) | v_LDO_PWR_DOWN(1) | v_PLL_PWR_DOWN(1));
+	ret = rockchip_phy_set_mode(lvds->phy, PHY_MODE_VIDEO_LVDS);
+	if (ret) {
+		dev_err(lvds->dev, "failed to set phy mode: %d\n", ret);
+		return ret;
+	}
 
-	/* disable lvds */
-	lvds_msk_reg(lvds, MIPIPHY_REGE3, m_LVDS_EN | m_TTL_EN,
-		     v_LVDS_EN(0) | v_TTL_EN(0));
+	rockchip_phy_power_on(lvds->phy);
 
 	return 0;
 }
 
-static int rk3288_lvds_pwr_off(struct display_state *state)
+static int rockchip_lvds_connector_disable(struct display_state *state)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	struct rockchip_lvds_device *lvds = conn_state->private;
+	struct rockchip_lvds *lvds = state_to_lvds(state);
 
-	lvds_writel(lvds, RK3288_LVDS_CFG_REG21, RK3288_LVDS_CFG_REG21_TX_DISABLE);
-	lvds_writel(lvds, RK3288_LVDS_CFG_REGC, RK3288_LVDS_CFG_REGC_PLL_DISABLE);
+	rockchip_phy_power_off(lvds->phy);
 
-	writel(0xffff8000, lvds->grf + lvds->pdata->grf_soc_con7);
+	if (lvds->funcs->disable)
+		lvds->funcs->disable(lvds);
 
 	return 0;
 }
 
-static int rk336x_lvds_pwr_on(struct display_state *state)
-{
-	struct connector_state *conn_state = &state->conn_state;
-	struct rockchip_lvds_device *lvds = conn_state->private;
-	u32 delay_times = 20;
-
-	if (lvds->output == DISPLAY_OUTPUT_LVDS) {
-		/* set VOCM 900 mv and V-DIFF 350 mv */
-		lvds_msk_reg(lvds, MIPIPHY_REGE4, m_VOCM | m_DIFF_V,
-			     v_VOCM(0) | v_DIFF_V(2));
-		/* power up lvds pll and ldo */
-		lvds_msk_reg(lvds, MIPIPHY_REG1,
-			     m_SYNC_RST | m_LDO_PWR_DOWN | m_PLL_PWR_DOWN,
-			     v_SYNC_RST(0) | v_LDO_PWR_DOWN(0) |
-			     v_PLL_PWR_DOWN(0));
-		/* enable lvds lane and power on pll */
-		lvds_writel(lvds, MIPIPHY_REGEB,
-			    v_LANE0_EN(1) | v_LANE1_EN(1) | v_LANE2_EN(1) |
-			    v_LANE3_EN(1) | v_LANECLK_EN(1) | v_PLL_PWR_OFF(0) |
-			    v_LVDS_BGPD(0));
-
-		/* enable lvds */
-		lvds_msk_reg(lvds, MIPIPHY_REGE3,
-			     m_MIPI_EN | m_LVDS_EN | m_TTL_EN,
-			     v_MIPI_EN(0) | v_LVDS_EN(1) | v_TTL_EN(0));
-	} else {
-		lvds_msk_reg(lvds, MIPIPHY_REGE3,
-			     m_MIPI_EN | m_LVDS_EN | m_TTL_EN,
-			     v_MIPI_EN(0) | v_LVDS_EN(0) | v_TTL_EN(1));
+static const struct rockchip_connector_funcs rockchip_lvds_connector_funcs = {
+	.init = rockchip_lvds_connector_init,
+	.enable = rockchip_lvds_connector_enable,
+	.disable = rockchip_lvds_connector_disable,
+};
 
-		/* set clock lane enable */
-		lvds_ctrl_writel(lvds, 0xa0, 0x4);
-	}
-	/* delay for waitting pll lock on */
-	while (delay_times--) {
-		if (lvds_phy_lock(lvds))
-			break;
-		udelay(100);
-	}
+static int rockchip_lvds_probe(struct udevice *dev)
+{
+	struct rockchip_lvds *lvds = dev_get_priv(dev);
+	const struct rockchip_connector *connector =
+		(const struct rockchip_connector *)dev_get_driver_data(dev);
 
-	if (delay_times <= 0)
-		printf("wait lvds phy lock failed, please check the hardware!\n");
+	lvds->dev = dev;
+	lvds->funcs = connector->data;
+	lvds->grf = syscon_get_regmap(dev_get_parent(dev));
+	lvds->dual_channel = dev_read_bool(dev, "dual-channel");
+	lvds->data_swap = dev_read_bool(dev, "rockchip,data-swap");
 
 	return 0;
 }
 
-static void px30_output_ttl(struct display_state *state)
+static void px30_lvds_enable(struct rockchip_lvds *lvds, int pipe)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	struct rockchip_lvds_device *lvds = conn_state->private;
-	u32 val = 0;
-
-	/* enable lvds mode */
-	val = PX30_RGB_SYNC_BYPASS(1) | PX30_DPHY_FORCERXMODE(1);
-	writel(val, lvds->grf + PX30_GRF_PD_VO_CON1);
-
-	/* enable lane */
-	lvds_msk_reg(lvds, MIPIPHY_REG0, 0x7c, 0x7c);
-	val = v_LANE0_EN(1) | v_LANE1_EN(1) | v_LANE2_EN(1) | v_LANE3_EN(1) |
-		v_LANECLK_EN(1) | v_PLL_PWR_OFF(1) | v_LVDS_BGPD(0);
-	lvds_writel(lvds, MIPIPHY_REGEB, val);
-	/* set ttl mode and reset phy config */
-	val = v_LVDS_MODE_EN(0) | v_TTL_MODE_EN(1) | v_MIPI_MODE_EN(0) |
-		v_MSB_SEL(1) | v_DIG_INTER_RST(1);
-	lvds_writel(lvds, MIPIPHY_REGE0, val);
-	rk336x_lvds_pwr_on(state);
+	regmap_write(lvds->grf, PX30_GRF_PD_VO_CON1,
+		     PX30_LVDS_SELECT(lvds->format) |
+		     PX30_LVDS_MODE_EN(1) | PX30_LVDS_MSBSEL(1) |
+		     PX30_LVDS_P2S_EN(1) | PX30_LVDS_VOP_SEL(pipe));
 }
 
-static void rk3126_output_ttl(struct display_state *state)
+static void px30_lvds_disable(struct rockchip_lvds *lvds)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	struct rockchip_lvds_device *lvds = conn_state->private;
-	u32 val = 0;
-
-	/* enable lvds mode */
-	val = v_RK3126_LVDSMODE_EN(0) |
-		v_RK3126_MIPIPHY_TTL_EN(1) |
-		v_RK3126_MIPIPHY_LANE0_EN(1) |
-		v_RK3126_MIPIDPI_FORCEX_EN(1);
-	writel(val, lvds->grf + lvds->pdata->grf_soc_con7);
-	val = v_RK3126_MIPITTL_CLK_EN(1) |
-		v_RK3126_MIPITTL_LANE0_EN(1) |
-		v_RK3126_MIPITTL_LANE1_EN(1) |
-		v_RK3126_MIPITTL_LANE2_EN(1) |
-		v_RK3126_MIPITTL_LANE3_EN(1);
-	writel(val, lvds->grf + lvds->pdata->grf_soc_con15);
-	/* enable lane */
-	lvds_msk_reg(lvds, MIPIPHY_REG0, 0x7c, 0x7c);
-	val = v_LANE0_EN(1) | v_LANE1_EN(1) | v_LANE2_EN(1) | v_LANE3_EN(1) |
-		v_LANECLK_EN(1) | v_PLL_PWR_OFF(1) | v_LVDS_BGPD(0);
-	lvds_writel(lvds, MIPIPHY_REGEB, val);
-	/* set ttl mode and reset phy config */
-	val = v_LVDS_MODE_EN(0) | v_TTL_MODE_EN(1) | v_MIPI_MODE_EN(0) |
-		v_MSB_SEL(1) | v_DIG_INTER_RST(1);
-	lvds_writel(lvds, MIPIPHY_REGE0, val);
-	rk336x_lvds_pwr_on(state);
-}
-
-static void rk336x_output_ttl(struct display_state *state)
-{
-	struct connector_state *conn_state = &state->conn_state;
-	struct rockchip_lvds_device *lvds = conn_state->private;
-	u32 val = 0;
-
-	/* enable lvds mode */
-	val = v_RK336X_LVDSMODE_EN(0) | v_RK336X_MIPIPHY_TTL_EN(1) |
-		v_RK336X_MIPIPHY_LANE0_EN(1) |
-		v_RK336X_MIPIDPI_FORCEX_EN(1);
-	writel(val, lvds->grf + lvds->pdata->grf_soc_con7);
-	val = v_RK336X_FORCE_JETAG(0);
-	writel(val, lvds->grf + lvds->pdata->grf_soc_con15);
-
-	/* enable lane */
-	lvds_msk_reg(lvds, MIPIPHY_REG0, 0x7c, 0x7c);
-	val = v_LANE0_EN(1) | v_LANE1_EN(1) | v_LANE2_EN(1) | v_LANE3_EN(1) |
-		v_LANECLK_EN(1) | v_PLL_PWR_OFF(1) | v_LVDS_BGPD(0);
-	lvds_writel(lvds, MIPIPHY_REGEB, val);
-
-	/* set ttl mode and reset phy config */
-	val = v_LVDS_MODE_EN(0) | v_TTL_MODE_EN(1) | v_MIPI_MODE_EN(0) |
-		v_MSB_SEL(1) | v_DIG_INTER_RST(1);
-	lvds_writel(lvds, MIPIPHY_REGE0, val);
-
-	rk336x_lvds_pwr_on(state);
+	regmap_write(lvds->grf, PX30_GRF_PD_VO_CON1,
+		     PX30_LVDS_MODE_EN(0) | PX30_LVDS_P2S_EN(0));
 }
 
-static void px30_output_lvds(struct display_state *state)
-{
-	struct connector_state *conn_state = &state->conn_state;
-	struct rockchip_lvds_device *lvds = conn_state->private;
-	u32 val = 0;
-
-	lvds_writel(lvds, MIPIPHY_REG0, 0x01);
-
-	/* enable lvds mode */
-	val = PX30_LVDS_PHY_MODE(1) | PX30_DPHY_FORCERXMODE(1);
-	/* config lvds_format */
-	val |= PX30_LVDS_OUTPUT_FORMAT(lvds->format);
-	/* LSB receive mode */
-	val |= PX30_LVDS_MSBSEL(LVDS_MSB_D7);
-	writel(val, lvds->grf + PX30_GRF_PD_VO_CON1);
-
-	/* digital internal disable */
-	lvds_msk_reg(lvds, MIPIPHY_REGE1, m_DIG_INTER_EN, v_DIG_INTER_EN(0));
-
-	/* set pll prediv and fbdiv */
-	lvds_writel(lvds, MIPIPHY_REG3, v_PREDIV(2) | v_FBDIV_MSB(0));
-	lvds_writel(lvds, MIPIPHY_REG4, v_FBDIV_LSB(28));
-
-	lvds_writel(lvds, MIPIPHY_REGE8, 0xfc);
-
-	lvds_msk_reg(lvds, MIPIPHY_REG8,
-		     m_SAMPLE_CLK_DIR, v_SAMPLE_CLK_DIR_REVERSE);
-
-	/* set lvds mode and reset phy config */
-	lvds_msk_reg(lvds, MIPIPHY_REGE0,
-		     m_MSB_SEL | m_DIG_INTER_RST,
-		     v_MSB_SEL(1) | v_DIG_INTER_RST(1));
+static const struct rockchip_lvds_funcs px30_lvds_funcs = {
+	.enable = px30_lvds_enable,
+	.disable = px30_lvds_disable,
+};
 
-	rk336x_lvds_pwr_on(state);
-	lvds_msk_reg(lvds, MIPIPHY_REGE1, m_DIG_INTER_EN, v_DIG_INTER_EN(1));
-}
+static const struct rockchip_connector px30_lvds_driver_data = {
+	 .funcs = &rockchip_lvds_connector_funcs,
+	 .data = &px30_lvds_funcs,
+};
 
-static void rk3126_output_lvds(struct display_state *state)
+static void rk3126_lvds_enable(struct rockchip_lvds *lvds, int pipe)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	struct rockchip_lvds_device *lvds = conn_state->private;
-	u32 val = 0;
-
-	/* enable lvds mode */
-	val = v_RK3126_LVDSMODE_EN(1) |
-	      v_RK3126_MIPIPHY_TTL_EN(0);
-	/* config lvds_format */
-	val |= v_RK3126_LVDS_OUTPUT_FORMAT(lvds->format);
-	/* LSB receive mode */
-	val |= v_RK3126_LVDS_MSBSEL(LVDS_MSB_D7);
-	val |= v_RK3126_MIPIPHY_LANE0_EN(1) |
-	       v_RK3126_MIPIDPI_FORCEX_EN(1);
-	writel(val, lvds->grf + lvds->pdata->grf_soc_con7);
-
-	/* digital internal disable */
-	lvds_msk_reg(lvds, MIPIPHY_REGE1, m_DIG_INTER_EN, v_DIG_INTER_EN(0));
-
-	/* set pll prediv and fbdiv */
-	lvds_writel(lvds, MIPIPHY_REG3, v_PREDIV(2) | v_FBDIV_MSB(0));
-	lvds_writel(lvds, MIPIPHY_REG4, v_FBDIV_LSB(28));
-
-	lvds_writel(lvds, MIPIPHY_REGE8, 0xfc);
-
-	/* set lvds mode and reset phy config */
-	lvds_msk_reg(lvds, MIPIPHY_REGE0,
-		     m_MSB_SEL | m_DIG_INTER_RST,
-		     v_MSB_SEL(1) | v_DIG_INTER_RST(1));
-
-	rk336x_lvds_pwr_on(state);
-	lvds_msk_reg(lvds, MIPIPHY_REGE1, m_DIG_INTER_EN, v_DIG_INTER_EN(1));
+	regmap_write(lvds->grf, RK3126_GRF_LVDS_CON0,
+		     RK3126_LVDS_P2S_EN(1) | RK3126_LVDS_MODE_EN(1) |
+		     RK3126_LVDS_MSBSEL(1) | RK3126_LVDS_SELECT(lvds->format));
 }
 
-static void rk336x_output_lvds(struct display_state *state)
+static void rk3126_lvds_disable(struct rockchip_lvds *lvds)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	struct rockchip_lvds_device *lvds = conn_state->private;
-	u32 val = 0;
-
-	/* enable lvds mode */
-	val |= v_RK336X_LVDSMODE_EN(1) | v_RK336X_MIPIPHY_TTL_EN(0);
-	/* config lvds_format */
-	val |= v_RK336X_LVDS_OUTPUT_FORMAT(lvds->format);
-	/* LSB receive mode */
-	val |= v_RK336X_LVDS_MSBSEL(LVDS_MSB_D7);
-	val |= v_RK336X_MIPIPHY_LANE0_EN(1) |
-	       v_RK336X_MIPIDPI_FORCEX_EN(1);
-	writel(val, lvds->grf + lvds->pdata->grf_soc_con7);
-	/* digital internal disable */
-	lvds_msk_reg(lvds, MIPIPHY_REGE1, m_DIG_INTER_EN, v_DIG_INTER_EN(0));
-
-	/* set pll prediv and fbdiv */
-	lvds_writel(lvds, MIPIPHY_REG3, v_PREDIV(2) | v_FBDIV_MSB(0));
-	lvds_writel(lvds, MIPIPHY_REG4, v_FBDIV_LSB(28));
-
-	lvds_writel(lvds, MIPIPHY_REGE8, 0xfc);
-
-	/* set lvds mode and reset phy config */
-	lvds_msk_reg(lvds, MIPIPHY_REGE0,
-		     m_MSB_SEL | m_DIG_INTER_RST,
-		     v_MSB_SEL(1) | v_DIG_INTER_RST(1));
-
-	rk336x_lvds_pwr_on(state);
-	lvds_msk_reg(lvds, MIPIPHY_REGE1, m_DIG_INTER_EN, v_DIG_INTER_EN(1));
+	regmap_write(lvds->grf, RK3126_GRF_LVDS_CON0,
+		     RK3126_LVDS_P2S_EN(0) | RK3126_LVDS_MODE_EN(0));
 }
 
-static int rk3288_lvds_pwr_on(struct display_state *state)
-{
-	struct connector_state *conn_state = &state->conn_state;
-	struct rockchip_lvds_device *lvds = conn_state->private;
-	struct drm_display_mode *mode = &conn_state->mode;
-	u32 val;
-	u32 h_bp = mode->htotal - mode->hsync_start;
-	u8 pin_hsync = (mode->flags & DRM_MODE_FLAG_PHSYNC) ? 1 : 0;
-	u8 pin_dclk = (mode->flags & DRM_MODE_FLAG_PCSYNC) ? 1 : 0;
-
-	val = lvds->format;
-	if (lvds->output == DISPLAY_OUTPUT_DUAL_LVDS)
-		val |= LVDS_DUAL | LVDS_CH0_EN | LVDS_CH1_EN;
-	else if (lvds->output == DISPLAY_OUTPUT_LVDS)
-		val |= LVDS_CH0_EN;
-	else if (lvds->output == DISPLAY_OUTPUT_RGB)
-		val |= LVDS_TTL_EN | LVDS_CH0_EN | LVDS_CH1_EN;
-
-	if (h_bp & 0x01)
-		val |= LVDS_START_PHASE_RST_1;
-
-	val |= (pin_dclk << 8) | (pin_hsync << 9);
-	val |= (0xffff << 16);
-	writel(val, lvds->grf + lvds->pdata->grf_soc_con7);
-
-	return 0;
-}
+static const struct rockchip_lvds_funcs rk3126_lvds_funcs = {
+	.enable = rk3126_lvds_enable,
+	.disable = rk3126_lvds_disable,
+};
 
-static void rk3288_output_ttl(struct display_state *state)
-{
-	struct connector_state *conn_state = &state->conn_state;
-	struct rockchip_lvds_device *lvds = conn_state->private;
-
-	rk3288_lvds_pwr_on(state);
-	lvds_writel(lvds, RK3288_LVDS_CH0_REG0,
-		    RK3288_LVDS_CH0_REG0_TTL_EN |
-		    RK3288_LVDS_CH0_REG0_LANECK_EN |
-		    RK3288_LVDS_CH0_REG0_LANE4_EN |
-		    RK3288_LVDS_CH0_REG0_LANE3_EN |
-		    RK3288_LVDS_CH0_REG0_LANE2_EN |
-		    RK3288_LVDS_CH0_REG0_LANE1_EN |
-		    RK3288_LVDS_CH0_REG0_LANE0_EN);
-	lvds_writel(lvds, RK3288_LVDS_CH0_REG2,
-		    RK3288_LVDS_PLL_FBDIV_REG2(0x46));
-
-	lvds_writel(lvds, RK3288_LVDS_CH0_REG3,
-		    RK3288_LVDS_PLL_FBDIV_REG3(0x46));
-	lvds_writel(lvds, RK3288_LVDS_CH0_REG4,
-		    RK3288_LVDS_CH0_REG4_LANECK_TTL_MODE |
-		    RK3288_LVDS_CH0_REG4_LANE4_TTL_MODE |
-		    RK3288_LVDS_CH0_REG4_LANE3_TTL_MODE |
-		    RK3288_LVDS_CH0_REG4_LANE2_TTL_MODE |
-		    RK3288_LVDS_CH0_REG4_LANE1_TTL_MODE |
-		    RK3288_LVDS_CH0_REG4_LANE0_TTL_MODE);
-	lvds_writel(lvds, RK3288_LVDS_CH0_REG5,
-		    RK3288_LVDS_CH0_REG5_LANECK_TTL_DATA |
-		    RK3288_LVDS_CH0_REG5_LANE4_TTL_DATA |
-		    RK3288_LVDS_CH0_REG5_LANE3_TTL_DATA |
-		    RK3288_LVDS_CH0_REG5_LANE2_TTL_DATA |
-		    RK3288_LVDS_CH0_REG5_LANE1_TTL_DATA |
-		    RK3288_LVDS_CH0_REG5_LANE0_TTL_DATA);
-	lvds_writel(lvds, RK3288_LVDS_CH0_REGD,
-		    RK3288_LVDS_PLL_PREDIV_REGD(0x0a));
-	lvds_writel(lvds, RK3288_LVDS_CH0_REG20,
-		    RK3288_LVDS_CH0_REG20_LSB);
-
-	lvds_writel(lvds, RK3288_LVDS_CFG_REGC, RK3288_LVDS_CFG_REGC_PLL_ENABLE);
-	lvds_writel(lvds, RK3288_LVDS_CFG_REG21, RK3288_LVDS_CFG_REG21_TX_ENABLE);
-}
+static const struct rockchip_connector rk3126_lvds_driver_data = {
+	 .funcs = &rockchip_lvds_connector_funcs,
+	 .data = &rk3126_lvds_funcs,
+};
 
-static void rk3288_output_lvds(struct display_state *state)
+static void rk3288_lvds_enable(struct rockchip_lvds *lvds, int pipe)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	struct rockchip_lvds_device *lvds = conn_state->private;
-
-	rk3288_lvds_pwr_on(state);
-
-	lvds_writel(lvds, RK3288_LVDS_CH0_REG0,
-		    RK3288_LVDS_CH0_REG0_LVDS_EN |
-		    RK3288_LVDS_CH0_REG0_LANECK_EN |
-		    RK3288_LVDS_CH0_REG0_LANE4_EN |
-		    RK3288_LVDS_CH0_REG0_LANE3_EN |
-		    RK3288_LVDS_CH0_REG0_LANE2_EN |
-		    RK3288_LVDS_CH0_REG0_LANE1_EN |
-		    RK3288_LVDS_CH0_REG0_LANE0_EN);
-	lvds_writel(lvds, RK3288_LVDS_CH0_REG1,
-		    RK3288_LVDS_CH0_REG1_LANECK_BIAS |
-		    RK3288_LVDS_CH0_REG1_LANE4_BIAS |
-		    RK3288_LVDS_CH0_REG1_LANE3_BIAS |
-		    RK3288_LVDS_CH0_REG1_LANE2_BIAS |
-		    RK3288_LVDS_CH0_REG1_LANE1_BIAS |
-		    RK3288_LVDS_CH0_REG1_LANE0_BIAS);
-	lvds_writel(lvds, RK3288_LVDS_CH0_REG2,
-		    RK3288_LVDS_CH0_REG2_RESERVE_ON |
-		    RK3288_LVDS_CH0_REG2_LANECK_LVDS_MODE |
-		    RK3288_LVDS_CH0_REG2_LANE4_LVDS_MODE |
-		    RK3288_LVDS_CH0_REG2_LANE3_LVDS_MODE |
-		    RK3288_LVDS_CH0_REG2_LANE2_LVDS_MODE |
-		    RK3288_LVDS_CH0_REG2_LANE1_LVDS_MODE |
-		    RK3288_LVDS_CH0_REG2_LANE0_LVDS_MODE |
-		    RK3288_LVDS_PLL_FBDIV_REG2(0x46));
-	lvds_writel(lvds, RK3288_LVDS_CH0_REG3,
-		    RK3288_LVDS_PLL_FBDIV_REG3(0x46));
-	lvds_writel(lvds, RK3288_LVDS_CH0_REG4, 0x00);
-	lvds_writel(lvds, RK3288_LVDS_CH0_REG5, 0x00);
-	lvds_writel(lvds, RK3288_LVDS_CH0_REGD,
-		    RK3288_LVDS_PLL_PREDIV_REGD(0x0a));
-	lvds_writel(lvds, RK3288_LVDS_CH0_REG20,
-		    RK3288_LVDS_CH0_REG20_LSB);
-
-	lvds_writel(lvds, RK3288_LVDS_CFG_REGC, RK3288_LVDS_CFG_REGC_PLL_ENABLE);
-	lvds_writel(lvds, RK3288_LVDS_CFG_REG21, RK3288_LVDS_CFG_REG21_TX_ENABLE);
-}
+	const struct drm_display_mode *mode = lvds->mode;
+	u32 val;
 
-static int rockchip_lvds_init(struct display_state *state)
-{
-	struct connector_state *conn_state = &state->conn_state;
-	const struct rockchip_connector *connector = conn_state->connector;
-	const struct rockchip_lvds_chip_data *pdata = connector->data;
-	struct rockchip_lvds_device *lvds;
-	const char *name;
-	int i, width;
-	struct resource lvds_phy, lvds_ctrl;
-	struct rockchip_panel *panel = state_get_panel(state);
-	int ret;
+	regmap_write(lvds->grf, RK3288_GRF_SOC_CON6,
+		     RK3288_LVDS_LCDC_SEL(pipe));
 
-	lvds = malloc(sizeof(*lvds));
-	if (!lvds)
-		return -ENOMEM;
-	lvds->pdata = pdata;
+	val = RK3288_LVDS_PWRDWN(0) | RK3288_LVDS_CON_CLKINV(0) |
+	      RK3288_LVDS_CON_CHASEL(lvds->dual_channel) |
+	      RK3288_LVDS_CON_SELECT(lvds->format);
 
-	if (pdata->chip_type == RK3288_LVDS) {
-		lvds->regbase = dev_read_addr_ptr(conn_state->dev);
-	} else {
-		i = dev_read_resource(conn_state->dev, 0, &lvds_phy);
-		if (i) {
-			printf("can't get regs lvds_phy addresses!\n");
-			free(lvds);
-			return -ENOMEM;
-		}
-
-		i = dev_read_resource(conn_state->dev, 1, &lvds_ctrl);
-		if (i) {
-			printf("can't get regs lvds_ctrl addresses!\n");
-			free(lvds);
-			return -ENOMEM;
-		}
-
-		lvds->regbase = (void *)lvds_phy.start;
-		lvds->ctrl_reg = (void *)lvds_ctrl.start;
-	}
+	if (lvds->dual_channel) {
+		u32 h_bp = mode->htotal - mode->hsync_start;
 
-	lvds->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	if (lvds->grf <= 0) {
-		printf("%s: Get syscon grf failed (ret=%p)\n",
-		      __func__, lvds->grf);
-		return  -ENXIO;
-	}
+		val |= RK3288_LVDS_CON_ENABLE_2(1) |
+		       RK3288_LVDS_CON_ENABLE_1(1) |
+		       RK3288_LVDS_CON_STARTSEL(lvds->data_swap);
 
-	ret = dev_read_string_index(panel->dev, "rockchip,output", 0, &name);
-	if (ret)
-		/* default set it as output rgb */
-		lvds->output = DISPLAY_OUTPUT_RGB;
-	else
-		lvds->output = lvds_name_to_output(name);
-	if (lvds->output < 0) {
-		printf("invalid output type [%s]\n", name);
-		free(lvds);
-		return lvds->output;
-	}
-	ret = dev_read_string_index(panel->dev, "rockchip,data-mapping",
-				    0, &name);
-	if (ret)
-		/* default set it as format jeida */
-		lvds->format = LVDS_FORMAT_JEIDA;
-	else
-		lvds->format = lvds_name_to_format(name);
-
-	if (lvds->format < 0) {
-		printf("invalid data-mapping format [%s]\n", name);
-		free(lvds);
-		return lvds->format;
-	}
-	width = dev_read_u32_default(panel->dev, "rockchip,data-width", 24);
-	if (width == 24) {
-		lvds->format |= LVDS_24BIT;
-	} else if (width == 18) {
-		lvds->format |= LVDS_18BIT;
+		if (h_bp % 2)
+			val |= RK3288_LVDS_CON_STARTPHASE(1);
+		else
+			val |= RK3288_LVDS_CON_STARTPHASE(0);
 	} else {
-		printf("rockchip-lvds unsupport data-width[%d]\n", width);
-		free(lvds);
-		return -EINVAL;
+		val |= RK3288_LVDS_CON_ENABLE_2(0) |
+		       RK3288_LVDS_CON_ENABLE_1(1);
 	}
 
-	printf("LVDS: data mapping: %s, data-width:%d, format:%d,\n",
-		name, width, lvds->format);
-	conn_state->private = lvds;
-	conn_state->type = DRM_MODE_CONNECTOR_LVDS;
-
-	if ((lvds->output == DISPLAY_OUTPUT_RGB) && (width == 18))
-		conn_state->output_mode = ROCKCHIP_OUT_MODE_P666;
-	else
-		conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
-	conn_state->color_space = V4L2_COLORSPACE_DEFAULT;
+	regmap_write(lvds->grf, RK3288_GRF_SOC_CON7, val);
 
-	return 0;
+	rockchip_phy_set_bus_width(lvds->phy, lvds->dual_channel ? 2 : 1);
 }
 
-static void rockchip_lvds_deinit(struct display_state *state)
+static void rk3288_lvds_disable(struct rockchip_lvds *lvds)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	struct rockchip_lvds_device *lvds = conn_state->private;
-
-	free(lvds);
+	regmap_write(lvds->grf, RK3288_GRF_SOC_CON7, RK3288_LVDS_PWRDWN(1));
 }
 
-static int rockchip_lvds_prepare(struct display_state *state)
-{
-	struct connector_state *conn_state = &state->conn_state;
-	struct rockchip_lvds_device *lvds = conn_state->private;
-	lvds->mode = &conn_state->mode;
-
-	rockchip_lvds_clk_enable(lvds);
-
-	return 0;
-}
-
-static void rockchip_lvds_vop_routing(struct rockchip_lvds_device *lvds, int pipe)
-{
-	u32 val;
+static const struct rockchip_lvds_funcs rk3288_lvds_funcs = {
+	.enable = rk3288_lvds_enable,
+	.disable = rk3288_lvds_disable,
+};
 
-	if (lvds->pdata->chip_type == RK3288_LVDS) {
-		if (pipe)
-			val = RK3288_LVDS_SOC_CON6_SEL_VOP_LIT |
-				(RK3288_LVDS_SOC_CON6_SEL_VOP_LIT << 16);
-		else
-			val = RK3288_LVDS_SOC_CON6_SEL_VOP_LIT << 16;
-		writel(val, lvds->grf + lvds->pdata->grf_soc_con6);
-	} else if (lvds->pdata->chip_type == PX30_LVDS) {
-		if (lvds->output == DISPLAY_OUTPUT_RGB)
-			writel(PX30_RGB_VOP_SEL(pipe),
-			       lvds->grf + PX30_GRF_PD_VO_CON1);
-		else if (lvds->output == DISPLAY_OUTPUT_LVDS)
-			writel(PX30_LVDS_VOP_SEL(pipe),
-			       lvds->grf + PX30_GRF_PD_VO_CON1);
-	}
-}
+static const struct rockchip_connector rk3288_lvds_driver_data = {
+	 .funcs = &rockchip_lvds_connector_funcs,
+	 .data = &rk3288_lvds_funcs,
+};
 
-static int rockchip_lvds_enable(struct display_state *state)
+static void rk3368_lvds_enable(struct rockchip_lvds *lvds, int pipe)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	struct rockchip_lvds_device *lvds = conn_state->private;
-	struct crtc_state *crtc_state = &state->crtc_state;
-
-	if (lvds->pdata->has_vop_sel)
-		rockchip_lvds_vop_routing(lvds, crtc_state->crtc_id);
-
-	if ((lvds->output == DISPLAY_OUTPUT_LVDS) ||
-	    (lvds->output == DISPLAY_OUTPUT_DUAL_LVDS)) {
-		if (lvds->pdata->chip_type == RK3288_LVDS)
-			rk3288_output_lvds(state);
-		else if (lvds->pdata->chip_type == RK3126_LVDS)
-			rk3126_output_lvds(state);
-		else if (lvds->pdata->chip_type == PX30_LVDS)
-			px30_output_lvds(state);
-		else
-			rk336x_output_lvds(state);
-	} else {
-		if (lvds->pdata->chip_type == RK3288_LVDS)
-			rk3288_output_ttl(state);
-		else if (lvds->pdata->chip_type == RK3126_LVDS)
-			rk3126_output_ttl(state);
-		else if (lvds->pdata->chip_type == PX30_LVDS)
-			px30_output_ttl(state);
-		else
-			rk336x_output_ttl(state);
-	}
-
-	return 0;
+	regmap_write(lvds->grf, RK3368_GRF_SOC_CON7,
+		     RK3368_LVDS_SELECT(lvds->format) |
+		     RK3368_LVDS_MODE_EN(1) | RK3368_LVDS_MSBSEL(1) |
+		     RK3368_LVDS_P2S_EN(1));
 }
 
-static int rockchip_lvds_disable(struct display_state *state)
+static void rk3368_lvds_disable(struct rockchip_lvds *lvds)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	struct rockchip_lvds_device *lvds = conn_state->private;
-
-	if (lvds->pdata->chip_type == RK3288_LVDS)
-		rk3288_lvds_pwr_off(state);
-	else
-		rk336x_lvds_pwr_off(state);
-
-	return 0;
+	regmap_write(lvds->grf, RK3368_GRF_SOC_CON7,
+		     RK3368_LVDS_MODE_EN(0) | RK3368_LVDS_P2S_EN(0));
 }
 
-const struct rockchip_connector_funcs rockchip_lvds_funcs = {
-	.init = rockchip_lvds_init,
-	.deinit = rockchip_lvds_deinit,
-	.prepare = rockchip_lvds_prepare,
-	.enable = rockchip_lvds_enable,
-	.disable = rockchip_lvds_disable,
-};
-
-static const struct rockchip_lvds_chip_data px30_lvds_drv_data = {
-	.chip_type = PX30_LVDS,
-	.has_vop_sel = true,
-};
-
-static const struct rockchip_connector px30_lvds_data = {
-	 .funcs = &rockchip_lvds_funcs,
-	 .data = &px30_lvds_drv_data,
-};
-
-static const struct rockchip_lvds_chip_data rk3126_lvds_drv_data = {
-	.chip_type = RK3126_LVDS,
-	.grf_soc_con7  = RK3126_GRF_LVDS_CON0,
-	.grf_soc_con15 = RK3126_GRF_CON1,
-	.has_vop_sel = true,
-};
-
-static const struct rockchip_connector rk3126_lvds_data = {
-	 .funcs = &rockchip_lvds_funcs,
-	 .data = &rk3126_lvds_drv_data,
-};
-
-static const struct rockchip_lvds_chip_data rk3288_lvds_drv_data = {
-	.chip_type = RK3288_LVDS,
-	.has_vop_sel = true,
-	.grf_soc_con6 = 0x025c,
-	.grf_soc_con7 = 0x0260,
-	.grf_gpio1d_iomux = 0x000c,
-};
-
-static const struct rockchip_connector rk3288_lvds_data = {
-	 .funcs = &rockchip_lvds_funcs,
-	 .data = &rk3288_lvds_drv_data,
-};
-
-static const struct rockchip_lvds_chip_data rk3368_lvds_drv_data = {
-	.chip_type = RK3368_LVDS,
-	.grf_soc_con7  = RK3368_GRF_SOC_CON7,
-	.grf_soc_con15 = RK3368_GRF_SOC_CON15,
-	.has_vop_sel = false,
+static const struct rockchip_lvds_funcs rk3368_lvds_funcs = {
+	.enable = rk3368_lvds_enable,
+	.disable = rk3368_lvds_disable,
 };
 
-static const struct rockchip_connector rk3368_lvds_data = {
-	 .funcs = &rockchip_lvds_funcs,
-	 .data = &rk3368_lvds_drv_data,
+static const struct rockchip_connector rk3368_lvds_driver_data = {
+	 .funcs = &rockchip_lvds_connector_funcs,
+	 .data = &rk3368_lvds_funcs,
 };
 
 static const struct udevice_id rockchip_lvds_ids[] = {
 	{
 		.compatible = "rockchip,px30-lvds",
-		.data = (ulong)&px30_lvds_data,
+		.data = (ulong)&px30_lvds_driver_data,
 	},
 	{
 		.compatible = "rockchip,rk3126-lvds",
-		.data = (ulong)&rk3126_lvds_data,
+		.data = (ulong)&rk3126_lvds_driver_data,
 	},
 	{
 		.compatible = "rockchip,rk3288-lvds",
-		.data = (ulong)&rk3288_lvds_data,
+		.data = (ulong)&rk3288_lvds_driver_data,
 	},
 	{
 		.compatible = "rockchip,rk3368-lvds",
-		.data = (ulong)&rk3368_lvds_data,
+		.data = (ulong)&rk3368_lvds_driver_data,
 	},
 	{}
 };
@@ -775,4 +315,6 @@ U_BOOT_DRIVER(rockchip_lvds) = {
 	.name = "rockchip_lvds",
 	.id = UCLASS_DISPLAY,
 	.of_match = rockchip_lvds_ids,
+	.probe = rockchip_lvds_probe,
+	.priv_auto_alloc_size = sizeof(struct rockchip_lvds),
 };
diff --git a/drivers/video/drm/rockchip_lvds.h b/drivers/video/drm/rockchip_lvds.h
index 8c5f23e9f8..2d56410478 100644
--- a/drivers/video/drm/rockchip_lvds.h
+++ b/drivers/video/drm/rockchip_lvds.h
@@ -6,234 +6,13 @@
 
 #ifndef _ROCKCHIP_LVDS_H_
 #define _ROCKCHIP_LVDS_H_
-#define RK3288_LVDS_CH0_REG0			0x00
-#define RK3288_LVDS_CH0_REG0_LVDS_EN		BIT(7)
-#define RK3288_LVDS_CH0_REG0_TTL_EN		BIT(6)
-#define RK3288_LVDS_CH0_REG0_LANECK_EN		BIT(5)
-#define RK3288_LVDS_CH0_REG0_LANE4_EN		BIT(4)
-#define RK3288_LVDS_CH0_REG0_LANE3_EN		BIT(3)
-#define RK3288_LVDS_CH0_REG0_LANE2_EN		BIT(2)
-#define RK3288_LVDS_CH0_REG0_LANE1_EN		BIT(1)
-#define RK3288_LVDS_CH0_REG0_LANE0_EN		BIT(0)
-
-#define RK3288_LVDS_CH0_REG1			0x04
-#define RK3288_LVDS_CH0_REG1_LANECK_BIAS	BIT(5)
-#define RK3288_LVDS_CH0_REG1_LANE4_BIAS		BIT(4)
-#define RK3288_LVDS_CH0_REG1_LANE3_BIAS		BIT(3)
-#define RK3288_LVDS_CH0_REG1_LANE2_BIAS		BIT(2)
-#define RK3288_LVDS_CH0_REG1_LANE1_BIAS		BIT(1)
-#define RK3288_LVDS_CH0_REG1_LANE0_BIAS		BIT(0)
-
-#define RK3288_LVDS_CH0_REG2			0x08
-#define RK3288_LVDS_CH0_REG2_RESERVE_ON		BIT(7)
-#define RK3288_LVDS_CH0_REG2_LANECK_LVDS_MODE	BIT(6)
-#define RK3288_LVDS_CH0_REG2_LANE4_LVDS_MODE	BIT(5)
-#define RK3288_LVDS_CH0_REG2_LANE3_LVDS_MODE	BIT(4)
-#define RK3288_LVDS_CH0_REG2_LANE2_LVDS_MODE	BIT(3)
-#define RK3288_LVDS_CH0_REG2_LANE1_LVDS_MODE	BIT(2)
-#define RK3288_LVDS_CH0_REG2_LANE0_LVDS_MODE	BIT(1)
-#define RK3288_LVDS_CH0_REG2_PLL_FBDIV8		BIT(0)
-
-#define RK3288_LVDS_CH0_REG3			0x0c
-#define RK3288_LVDS_CH0_REG3_PLL_FBDIV_MASK	0xff
-
-#define RK3288_LVDS_CH0_REG4			0x10
-#define RK3288_LVDS_CH0_REG4_LANECK_TTL_MODE	BIT(5)
-#define RK3288_LVDS_CH0_REG4_LANE4_TTL_MODE	BIT(4)
-#define RK3288_LVDS_CH0_REG4_LANE3_TTL_MODE	BIT(3)
-#define RK3288_LVDS_CH0_REG4_LANE2_TTL_MODE	BIT(2)
-#define RK3288_LVDS_CH0_REG4_LANE1_TTL_MODE	BIT(1)
-#define RK3288_LVDS_CH0_REG4_LANE0_TTL_MODE	BIT(0)
-
-#define RK3288_LVDS_CH0_REG5			0x14
-#define RK3288_LVDS_CH0_REG5_LANECK_TTL_DATA	BIT(5)
-#define RK3288_LVDS_CH0_REG5_LANE4_TTL_DATA	BIT(4)
-#define RK3288_LVDS_CH0_REG5_LANE3_TTL_DATA	BIT(3)
-#define RK3288_LVDS_CH0_REG5_LANE2_TTL_DATA	BIT(2)
-#define RK3288_LVDS_CH0_REG5_LANE1_TTL_DATA	BIT(1)
-#define RK3288_LVDS_CH0_REG5_LANE0_TTL_DATA	BIT(0)
-
-#define RK3288_LVDS_CFG_REGC			0x30
-#define RK3288_LVDS_CFG_REGC_PLL_ENABLE		0x00
-#define RK3288_LVDS_CFG_REGC_PLL_DISABLE	0xff
-
-#define RK3288_LVDS_CH0_REGD			0x34
-#define RK3288_LVDS_CH0_REGD_PLL_PREDIV_MASK	0x1f
-
-#define RK3288_LVDS_CH0_REG20			0x80
-#define RK3288_LVDS_CH0_REG20_MSB		0x45
-#define RK3288_LVDS_CH0_REG20_LSB		0x44
-
-#define RK3288_LVDS_CFG_REG21			0x84
-#define RK3288_LVDS_CFG_REG21_TX_ENABLE		0x92
-#define RK3288_LVDS_CFG_REG21_TX_DISABLE	0x00
-
-/* fbdiv value is split over 2 registers, with bit8 in reg2 */
-#define RK3288_LVDS_PLL_FBDIV_REG2(_fbd) \
-		(_fbd & BIT(8) ? RK3288_LVDS_CH0_REG2_PLL_FBDIV8 : 0)
-#define RK3288_LVDS_PLL_FBDIV_REG3(_fbd) \
-		(_fbd & RK3288_LVDS_CH0_REG3_PLL_FBDIV_MASK)
-#define RK3288_LVDS_PLL_PREDIV_REGD(_pd) \
-		(_pd & RK3288_LVDS_CH0_REGD_PLL_PREDIV_MASK)
-
-#define RK3288_LVDS_SOC_CON6_SEL_VOP_LIT	BIT(3)
-
-#define LVDS_FMT_MASK				(0x07 << 16)
-#define LVDS_MSB				BIT(3)
-#define LVDS_DUAL				BIT(4)
-#define LVDS_FMT_1				BIT(5)
-#define LVDS_TTL_EN				BIT(6)
-#define LVDS_START_PHASE_RST_1			BIT(7)
-#define LVDS_DCLK_INV				BIT(8)
-#define LVDS_CH0_EN				BIT(11)
-#define LVDS_CH1_EN				BIT(12)
-#define LVDS_PWRDN				BIT(15)
 
 #define LVDS_24BIT				(0 << 1)
 #define LVDS_18BIT				(1 << 1)
 #define LVDS_FORMAT_VESA			(0 << 0)
 #define LVDS_FORMAT_JEIDA			(1 << 0)
 
-#define DISPLAY_OUTPUT_RGB		0
 #define DISPLAY_OUTPUT_LVDS		1
 #define DISPLAY_OUTPUT_DUAL_LVDS	2
 
-#define BITS(x, bit)            ((x) << (bit))
-#define BITS_MASK(x, mask, bit)  BITS((x) & (mask), bit)
-#define BITS_EN(mask, bit)       BITS(mask, bit + 16)
-
-#define RK3368_GRF_SOC_CON7	0x041c
-#define RK3368_GRF_SOC_CON15	0x043c
-
-#define RK3126_GRF_LVDS_CON0	0x0150
-#define RK3126_GRF_CON1		0x0144
-#define RK3126_GRF_GPIO2B_IOMUX	0x00cc  /* dclk sync vsync den d10 d11 d12 d13*/
-#define RK3126_GRF_GPIO2C_IOMUX	0x00d0  /* d14 d15 d16 d17 */
-#define RK3126_GRF_GPIO2C_IOMUX2	0x00e8  /* d18 d19 d20 d21 */
-#define RK3126_GRF_GPIO2D_IOMUX	0x00d4  /* d22 d23 0x700c1004*/
-
-#define PX30_GRF_PD_VO_CON0	0x0434
-#define PX30_GRF_PD_VO_CON1	0x0438
-#define PX30_LVDS_OUTPUT_FORMAT(x)	(BITS_MASK(x, 0x3, 13) | BITS_EN(0x3, 13))
-#define PX30_LVDS_PHY_MODE(x)		(BITS_MASK(x, 0x1, 12) | BITS_EN(0x1, 12))
-#define PX30_LVDS_MSBSEL(x)		(BITS_MASK(x, 0x1, 11) | BITS_EN(0x1, 11))
-#define PX30_DPHY_FORCERXMODE(x)	(BITS_MASK(x, 0x1,  6) | BITS_EN(0x1,  6))
-#define PX30_LCDC_DCLK_INV(x)		(BITS_MASK(x, 0x1,  4) | BITS_EN(0x1,  4))
-#define PX30_RGB_SYNC_BYPASS(x)		(BITS_MASK(x, 0x1,  3) | BITS_EN(0x1,  3))
-#define PX30_RGB_VOP_SEL(x)		(BITS_MASK(x, 0x1,  2) | BITS_EN(0x1,  2))
-#define PX30_LVDS_VOP_SEL(x)		(BITS_MASK(x, 0x1,  1) | BITS_EN(0x1,  1))
-
-#define v_RK336X_LVDS_OUTPUT_FORMAT(x) (BITS_MASK(x, 3, 13) | BITS_EN(3, 13))
-#define v_RK336X_LVDS_MSBSEL(x)        (BITS_MASK(x, 1, 11) | BITS_EN(1, 11))
-#define v_RK336X_LVDSMODE_EN(x)        (BITS_MASK(x, 1, 12) | BITS_EN(1, 12))
-#define v_RK336X_MIPIPHY_TTL_EN(x)     (BITS_MASK(x, 1, 15) | BITS_EN(1, 15))
-#define v_RK336X_MIPIPHY_LANE0_EN(x)   (BITS_MASK(x, 1, 5) | BITS_EN(1, 5))
-#define v_RK336X_MIPIDPI_FORCEX_EN(x)  (BITS_MASK(x, 1, 6) | BITS_EN(1, 6))
-
-#define v_RK3126_LVDS_OUTPUT_FORMAT(x)	(BITS_MASK(x, 3, 1) | BITS_EN(3, 1))
-#define v_RK3126_LVDS_MSBSEL(x)		(BITS_MASK(x, 1, 3) | BITS_EN(1, 3))
-#define v_RK3126_LVDSMODE_EN(x)		(BITS_MASK(x, 1, 6) | BITS_EN(1, 6))
-#define v_RK3126_MIPIPHY_TTL_EN(x)	(BITS_MASK(x, 1, 7) | BITS_EN(1, 7))
-#define v_RK3126_MIPIPHY_LANE0_EN(x)	(BITS_MASK(x, 1, 8) | BITS_EN(1, 8))
-#define v_RK3126_MIPIDPI_FORCEX_EN(x)	(BITS_MASK(x, 1, 9) | BITS_EN(1, 9))
-
-#define v_RK3126_MIPITTL_CLK_EN(x)     (BITS_MASK(x, 1, 7) | BITS_EN(1, 7))
-#define v_RK3126_MIPITTL_LANE0_EN(x)   (BITS_MASK(x, 1, 11) | BITS_EN(1, 11))
-#define v_RK3126_MIPITTL_LANE1_EN(x)   (BITS_MASK(x, 1, 12) | BITS_EN(1, 12))
-#define v_RK3126_MIPITTL_LANE2_EN(x)   (BITS_MASK(x, 1, 13) | BITS_EN(1, 13))
-#define v_RK3126_MIPITTL_LANE3_EN(x)   (BITS_MASK(x, 1, 14) | BITS_EN(1, 14))
-
-#define MIPIC_PHY_RSTZ		0x00a0
-#define m_PHY_ENABLE_CLK	BIT(2)
-#define MIPIC_PHY_STATUS	0x00b0
-#define m_PHY_LOCK_STATUS	BIT(0)
-
-enum {
-	LVDS_DATA_FROM_LCDC = 0,
-	LVDS_DATA_FORM_EBC,
-};
-
-enum {
-	LVDS_MSB_D0 = 0,
-	LVDS_MSB_D7,
-};
-
-#define MIPIPHY_REG0            0x0000
-#define m_LANE_EN_0             BITS(1, 2)
-#define m_LANE_EN_1             BITS(1, 3)
-#define m_LANE_EN_2             BITS(1, 4)
-#define m_LANE_EN_3             BITS(1, 5)
-#define m_LANE_EN_CLK           BITS(1, 5)
-#define v_LANE_EN_0(x)          BITS(1, 2)
-#define v_LANE_EN_1(x)          BITS(1, 3)
-#define v_LANE_EN_2(x)          BITS(1, 4)
-#define v_LANE_EN_3(x)          BITS(1, 5)
-#define v_LANE_EN_CLK(x)        BITS(1, 5)
-
-#define MIPIPHY_REG1            0x0004
-#define m_SYNC_RST              BITS(1, 0)
-#define m_LDO_PWR_DOWN          BITS(1, 1)
-#define m_PLL_PWR_DOWN          BITS(1, 2)
-#define v_SYNC_RST(x)           BITS_MASK(x, 1, 0)
-#define v_LDO_PWR_DOWN(x)       BITS_MASK(x, 1, 1)
-#define v_PLL_PWR_DOWN(x)       BITS_MASK(x, 1, 2)
-
-#define MIPIPHY_REG3		0x000c
-#define m_PREDIV                BITS(0x1f, 0)
-#define m_FBDIV_MSB             BITS(1, 5)
-#define v_PREDIV(x)             BITS_MASK(x, 0x1f, 0)
-#define v_FBDIV_MSB(x)          BITS_MASK(x, 1, 5)
-
-#define MIPIPHY_REG4		0x0010
-#define v_FBDIV_LSB(x)          BITS_MASK(x, 0xff, 0)
-
-#define MIPIPHY_REG8			0x0020
-#define m_SAMPLE_CLK_DIR		BIT(4)
-#define v_SAMPLE_CLK_DIR_REVERSE	BIT(4)
-
-#define MIPIPHY_REGE0		0x0380
-#define m_MSB_SEL               BITS(1, 0)
-#define m_DIG_INTER_RST         BITS(1, 2)
-#define m_LVDS_MODE_EN          BITS(1, 5)
-#define m_TTL_MODE_EN           BITS(1, 6)
-#define m_MIPI_MODE_EN          BITS(1, 7)
-#define v_MSB_SEL(x)            BITS_MASK(x, 1, 0)
-#define v_DIG_INTER_RST(x)      BITS_MASK(x, 1, 2)
-#define v_LVDS_MODE_EN(x)       BITS_MASK(x, 1, 5)
-#define v_TTL_MODE_EN(x)        BITS_MASK(x, 1, 6)
-#define v_MIPI_MODE_EN(x)       BITS_MASK(x, 1, 7)
-
-#define MIPIPHY_REGE1           0x0384
-#define m_DIG_INTER_EN          BITS(1, 7)
-#define v_DIG_INTER_EN(x)       BITS_MASK(x, 1, 7)
-
-#define MIPIPHY_REGE3           0x038c
-#define m_MIPI_EN               BITS(1, 0)
-#define m_LVDS_EN               BITS(1, 1)
-#define m_TTL_EN                BITS(1, 2)
-#define v_MIPI_EN(x)            BITS_MASK(x, 1, 0)
-#define v_LVDS_EN(x)            BITS_MASK(x, 1, 1)
-#define v_TTL_EN(x)             BITS_MASK(x, 1, 2)
-
-#define MIPIPHY_REGE4		0x0390
-#define m_VOCM			BITS(3, 4)
-#define m_DIFF_V		BITS(3, 6)
-
-#define v_VOCM(x)		BITS_MASK(x, 3, 4)
-#define v_DIFF_V(x)		BITS_MASK(x, 3, 6)
-
-#define MIPIPHY_REGE8           0x03a0
-
-#define MIPIPHY_REGEB           0x03ac
-#define v_LVDS_BGPD(x)		BITS_MASK(x, 1, 0)
-#define v_PLL_PWR_OFF(x)        BITS_MASK(x, 1, 2)
-#define v_LANECLK_EN(x)         BITS_MASK(x, 1, 3)
-#define v_LANE3_EN(x)           BITS_MASK(x, 1, 4)
-#define v_LANE2_EN(x)           BITS_MASK(x, 1, 5)
-#define v_LANE1_EN(x)           BITS_MASK(x, 1, 6)
-#define v_LANE0_EN(x)           BITS_MASK(x, 1, 7)
-
-#define LVDS_PMUGRF_BASE         0xff738000
-#define v_RK336X_FORCE_JETAG(x) (BITS_MASK(x, 1, 13) | BITS_EN(1, 13))
-
 #endif

commit 496271300bc02990751c0135da5e10ff2441e762
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Dec 28 11:27:40 2018 +0800

    video/drm: rgb: Add support for rk3128/rk3288/rk3368
    
    Change-Id: I248a2966514f4417d88c070dcb4e87e682f04df5
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_rgb.c b/drivers/video/drm/rockchip_rgb.c
index 424b0986cd..95fcad5023 100644
--- a/drivers/video/drm/rockchip_rgb.c
+++ b/drivers/video/drm/rockchip_rgb.c
@@ -15,6 +15,7 @@
 #include "rockchip_display.h"
 #include "rockchip_crtc.h"
 #include "rockchip_connector.h"
+#include "rockchip_phy.h"
 
 #define PX30_GRF_PD_VO_CON1		0x0438
 #define PX30_RGB_DATA_SYNC_BYPASS(v)	HIWORD_UPDATE(v, 3, 3)
@@ -23,6 +24,15 @@
 #define RK1808_GRF_PD_VO_CON1		0x0444
 #define RK1808_RGB_DATA_SYNC_BYPASS(v)	HIWORD_UPDATE(v, 3, 3)
 
+#define RK3288_GRF_SOC_CON6		0x025c
+#define RK3288_LVDS_LCDC_SEL(v)		HIWORD_UPDATE(v,  3,  3)
+#define RK3288_GRF_SOC_CON7		0x0260
+#define RK3288_LVDS_PWRDWN(v)		HIWORD_UPDATE(v, 15, 15)
+#define RK3288_LVDS_CON_ENABLE_2(v)	HIWORD_UPDATE(v, 12, 12)
+#define RK3288_LVDS_CON_ENABLE_1(v)	HIWORD_UPDATE(v, 11, 11)
+#define RK3288_LVDS_CON_CLKINV(v)	HIWORD_UPDATE(v,  8,  8)
+#define RK3288_LVDS_CON_TTL_EN(v)	HIWORD_UPDATE(v,  6,  6)
+
 struct rockchip_rgb;
 
 struct rockchip_rgb_funcs {
@@ -31,8 +41,10 @@ struct rockchip_rgb_funcs {
 };
 
 struct rockchip_rgb {
+	struct udevice *dev;
 	struct regmap *grf;
 	bool data_sync;
+	struct rockchip_phy *phy;
 	const struct rockchip_rgb_funcs *funcs;
 };
 
@@ -48,10 +60,21 @@ static int rockchip_rgb_connector_enable(struct display_state *state)
 	struct rockchip_rgb *rgb = state_to_rgb(state);
 	struct crtc_state *crtc_state = &state->crtc_state;
 	int pipe = crtc_state->crtc_id;
+	int ret;
 
 	if (rgb->funcs && rgb->funcs->enable)
 		rgb->funcs->enable(rgb, pipe);
 
+	if (rgb->phy) {
+		ret = rockchip_phy_set_mode(rgb->phy, PHY_MODE_VIDEO_TTL);
+		if (ret) {
+			dev_err(rgb->dev, "failed to set phy mode: %d\n", ret);
+			return ret;
+		}
+
+		rockchip_phy_power_on(rgb->phy);
+	}
+
 	return 0;
 }
 
@@ -59,6 +82,9 @@ static int rockchip_rgb_connector_disable(struct display_state *state)
 {
 	struct rockchip_rgb *rgb = state_to_rgb(state);
 
+	if (rgb->phy)
+		rockchip_phy_power_off(rgb->phy);
+
 	if (rgb->funcs && rgb->funcs->disable)
 		rgb->funcs->disable(rgb);
 
@@ -67,8 +93,11 @@ static int rockchip_rgb_connector_disable(struct display_state *state)
 
 static int rockchip_rgb_connector_init(struct display_state *state)
 {
+	struct rockchip_rgb *rgb = state_to_rgb(state);
 	struct connector_state *conn_state = &state->conn_state;
 
+	rgb->phy = conn_state->phy;
+
 	conn_state->type = DRM_MODE_CONNECTOR_LVDS;
 	conn_state->color_space = V4L2_COLORSPACE_DEFAULT;
 
@@ -101,6 +130,7 @@ static int rockchip_rgb_probe(struct udevice *dev)
 	const struct rockchip_connector *connector =
 		(const struct rockchip_connector *)dev_get_driver_data(dev);
 
+	rgb->dev = dev;
 	rgb->funcs = connector->data;
 	rgb->grf = syscon_get_regmap(dev_get_parent(dev));
 	rgb->data_sync = dev_read_bool(dev, "rockchip,data-sync");
@@ -138,6 +168,32 @@ static const struct rockchip_connector rk1808_rgb_driver_data = {
 	.data = &rk1808_rgb_funcs,
 };
 
+static void rk3288_rgb_enable(struct rockchip_rgb *rgb, int pipe)
+{
+	regmap_write(rgb->grf, RK3288_GRF_SOC_CON6, RK3288_LVDS_LCDC_SEL(pipe));
+	regmap_write(rgb->grf, RK3288_GRF_SOC_CON7,
+		     RK3288_LVDS_PWRDWN(0) | RK3288_LVDS_CON_ENABLE_2(1) |
+		     RK3288_LVDS_CON_ENABLE_1(1) | RK3288_LVDS_CON_CLKINV(0) |
+		     RK3288_LVDS_CON_TTL_EN(1));
+}
+
+static void rk3288_rgb_disable(struct rockchip_rgb *rgb)
+{
+	regmap_write(rgb->grf, RK3288_GRF_SOC_CON7,
+		     RK3288_LVDS_PWRDWN(1) | RK3288_LVDS_CON_ENABLE_2(0) |
+		     RK3288_LVDS_CON_ENABLE_1(0) | RK3288_LVDS_CON_TTL_EN(0));
+}
+
+static const struct rockchip_rgb_funcs rk3288_rgb_funcs = {
+	.enable = rk3288_rgb_enable,
+	.disable = rk3288_rgb_disable,
+};
+
+static const struct rockchip_connector rk3288_rgb_driver_data = {
+	.funcs = &rockchip_rgb_connector_funcs,
+	.data = &rk3288_rgb_funcs,
+};
+
 static const struct rockchip_connector rockchip_rgb_driver_data = {
 	.funcs = &rockchip_rgb_connector_funcs,
 };
@@ -155,10 +211,22 @@ static const struct udevice_id rockchip_rgb_ids[] = {
 		.compatible = "rockchip,rk3066-rgb",
 		.data = (ulong)&rockchip_rgb_driver_data,
 	},
+	{
+		.compatible = "rockchip,rk3128-rgb",
+		.data = (ulong)&rockchip_rgb_driver_data,
+	},
+	{
+		.compatible = "rockchip,rk3288-rgb",
+		.data = (ulong)&rk3288_rgb_driver_data,
+	},
 	{
 		.compatible = "rockchip,rk3308-rgb",
 		.data = (ulong)&rockchip_rgb_driver_data,
 	},
+	{
+		.compatible = "rockchip,rk3368-rgb",
+		.data = (ulong)&rockchip_rgb_driver_data,
+	},
 	{
 		.compatible = "rockchip,rv1108-rgb",
 		.data = (ulong)&rockchip_rgb_driver_data,

commit 9fb0493f61c70f99c89b8ce23582940bafc6a307
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Dec 10 09:50:21 2018 +0800

    phy/rockchip: Add support for INNOSILICON LVDS/TTL PHY
    
    Innosilicon LVDS/TTL PHY implements LVDS TIA/EIA protocol.
    Normally, Innosilicon LVDS/TTL PHY contains four 7-bit
    parallel-load serial-out shift registers, a 7X clock PLL,
    and five Low-Voltage Differential Signaling (LVDS) line drivers
    in a single integrated circuit. These functions allow 28 bits
    of single-ended LVTTL data to be synchronously transmitted over
    five balanced-pair conductors for receipt by a compatible receiver.
    
    In addition, Innosilicon LVDS/TTL PHY could extend from 4 lanes
    to N lanes (N is required by the customer). Therefore, the TTL
    lines extend respectively.
    
    Change-Id: I2b6b9cccd88c8ca89ef5f45e964e9eb936777ffc
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/Kconfig b/drivers/video/drm/Kconfig
index d3d700213f..b2663d8f96 100644
--- a/drivers/video/drm/Kconfig
+++ b/drivers/video/drm/Kconfig
@@ -30,6 +30,13 @@ config ROCKCHIP_INNO_HDMI_PHY
 	 use HDMI or TVE in RK322XH or RK322X, you should selet
 	 this option.
 
+config DRM_ROCKCHIP_INNO_VIDEO_PHY
+	tristate "Rockchip INNO LVDS/TTL PHY driver"
+	depends on DRM_ROCKCHIP
+	help
+	  Enable this to support the Rockchip LVDS/TTL PHY
+	  with Innosilicon IP block.
+
 config DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY
 	tristate "Rockchip INNO MIPI/LVDS/TTL PHY driver"
 	depends on DRM_ROCKCHIP
diff --git a/drivers/video/drm/Makefile b/drivers/video/drm/Makefile
index 237657fb43..f5ceca0364 100644
--- a/drivers/video/drm/Makefile
+++ b/drivers/video/drm/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI) += rockchip-dw-mipi-dsi.o \
 					  rockchip-inno-mipi-dphy.o
 obj-$(CONFIG_DRM_ROCKCHIP_DW_HDMI) += rockchip_dw_hdmi.o dw_hdmi.o
 obj-$(CONFIG_ROCKCHIP_INNO_HDMI_PHY) += rockchip-inno-hdmi-phy.o
+obj-$(CONFIG_DRM_ROCKCHIP_INNO_VIDEO_PHY) += inno_video_phy.o
 obj-$(CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY) += inno_video_combo_phy.o
 obj-$(CONFIG_ROCKCHIP_DRM_TVE) += rockchip_drm_tve.o
 obj-$(CONFIG_DRM_ROCKCHIP_ANALOGIX_DP) += analogix_dp.o analogix_dp_reg.o
diff --git a/drivers/video/drm/inno_video_phy.c b/drivers/video/drm/inno_video_phy.c
new file mode 100644
index 0000000000..939c2e9925
--- /dev/null
+++ b/drivers/video/drm/inno_video_phy.c
@@ -0,0 +1,233 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2008-2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * Author: Wyon Bi <bivvy.bi@rock-chips.com>
+ */
+
+#include <config.h>
+#include <common.h>
+#include <errno.h>
+#include <dm.h>
+#include <asm/io.h>
+#include <linux/iopoll.h>
+
+#include "rockchip_phy.h"
+
+/* Register: 0x0030 */
+#define DISABLE_PLL	BIT(3)
+/* Register: 0x003c */
+#define PLL_LOCK	BIT(1)
+/* Register: 0x0084 */
+#define ENABLE_TX	BIT(7)
+
+struct inno_video_phy {
+	void __iomem *base;
+	enum phy_mode mode;
+	bool dual_channel;
+};
+
+struct reg_sequence {
+	unsigned int reg;
+	unsigned int def;
+	unsigned int delay_us;
+};
+
+static const struct reg_sequence ttl_mode[] = {
+	{ 0x0000, 0x7f },
+	{ 0x0004, 0x3f },
+	{ 0x0008, 0x80 },
+	{ 0x0010, 0x3f },
+	{ 0x0014, 0x3f },
+	{ 0x0080, 0x44 },
+
+	{ 0x0100, 0x7f },
+	{ 0x0104, 0x3f },
+	{ 0x0108, 0x80 },
+	{ 0x0110, 0x3f },
+	{ 0x0114, 0x3f },
+	{ 0x0180, 0x44 },
+};
+
+static const struct reg_sequence lvds_mode_single_channel[] = {
+	{ 0x0000, 0xbf },
+	{ 0x0004, 0x3f },
+	{ 0x0008, 0xfe },
+	{ 0x0010, 0x00 },
+	{ 0x0014, 0x00 },
+	{ 0x0080, 0x44 },
+
+	{ 0x0100, 0x00 },
+	{ 0x0104, 0x00 },
+	{ 0x0108, 0x00 },
+	{ 0x0110, 0x00 },
+	{ 0x0114, 0x00 },
+	{ 0x0180, 0x44 },
+};
+
+static const struct reg_sequence lvds_mode_dual_channel[] = {
+	{ 0x0000, 0xbf },
+	{ 0x0004, 0x3f },
+	{ 0x0008, 0xfe },
+	{ 0x0010, 0x00 },
+	{ 0x0014, 0x00 },
+	{ 0x0080, 0x44 },
+
+	{ 0x0100, 0xbf },
+	{ 0x0104, 0x3f },
+	{ 0x0108, 0xfe },
+	{ 0x0110, 0x00 },
+	{ 0x0114, 0x00 },
+	{ 0x0180, 0x44 },
+};
+
+static inline void phy_write(struct inno_video_phy *inno, u32 reg, u32 val)
+{
+	writel(val, inno->base + reg);
+}
+
+static inline u32 phy_read(struct inno_video_phy *inno, u32 reg)
+{
+	return readl(inno->base + reg);
+}
+
+static inline void phy_update_bits(struct inno_video_phy *inno,
+				   u32 reg, u32 mask, u32 val)
+{
+	u32 tmp, orig;
+
+	orig = phy_read(inno, reg);
+	tmp = orig & ~mask;
+	tmp |= val & mask;
+	phy_write(inno, reg, tmp);
+}
+
+static void phy_multi_write(struct inno_video_phy *inno,
+			    const struct reg_sequence *regs, int num_regs)
+{
+	int i;
+
+	for (i = 0; i < num_regs; i++) {
+		phy_write(inno, regs[i].reg, regs[i].def);
+
+		if (regs[i].delay_us)
+			udelay(regs[i].delay_us);
+	}
+}
+
+static int inno_video_phy_power_on(struct rockchip_phy *phy)
+{
+	struct inno_video_phy *inno = dev_get_priv(phy->dev);
+	const struct reg_sequence *wseq;
+	int nregs;
+	u32 status;
+	int ret;
+
+	switch (inno->mode) {
+	case PHY_MODE_VIDEO_LVDS:
+		if (inno->dual_channel) {
+			wseq = lvds_mode_dual_channel;
+			nregs = ARRAY_SIZE(lvds_mode_dual_channel);
+		} else {
+			wseq = lvds_mode_single_channel;
+			nregs = ARRAY_SIZE(lvds_mode_single_channel);
+		}
+		break;
+	case PHY_MODE_VIDEO_TTL:
+		wseq = ttl_mode;
+		nregs = ARRAY_SIZE(ttl_mode);
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	phy_multi_write(inno, wseq, nregs);
+
+	phy_update_bits(inno, 0x0030, DISABLE_PLL, 0);
+	ret = readl_poll_timeout(inno->base + 0x003c, status,
+				 status & PLL_LOCK, 10000);
+	if (ret) {
+		dev_err(phy->dev, "PLL is not lock\n");
+		return ret;
+	}
+
+	phy_update_bits(inno, 0x0084, ENABLE_TX, ENABLE_TX);
+
+	return 0;
+}
+
+static int inno_video_phy_power_off(struct rockchip_phy *phy)
+{
+	struct inno_video_phy *inno = dev_get_priv(phy->dev);
+
+	phy_update_bits(inno, 0x0084, ENABLE_TX, 0);
+	phy_update_bits(inno, 0x0030, DISABLE_PLL, DISABLE_PLL);
+
+	return 0;
+}
+
+static int inno_video_phy_set_mode(struct rockchip_phy *phy,
+				   enum phy_mode mode)
+{
+	struct inno_video_phy *inno = dev_get_priv(phy->dev);
+
+	switch (mode) {
+	case PHY_MODE_VIDEO_LVDS:
+	case PHY_MODE_VIDEO_TTL:
+		inno->mode = mode;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int
+inno_video_phy_set_bus_width(struct rockchip_phy *phy, u32 bus_width)
+{
+	struct inno_video_phy *inno = dev_get_priv(phy->dev);
+
+	inno->dual_channel = (bus_width == 2) ? true : false;
+
+	return 0;
+}
+
+static const struct rockchip_phy_funcs inno_video_phy_funcs = {
+	.power_on = inno_video_phy_power_on,
+	.power_off = inno_video_phy_power_off,
+	.set_mode = inno_video_phy_set_mode,
+	.set_bus_width = inno_video_phy_set_bus_width,
+};
+
+static int inno_video_phy_probe(struct udevice *dev)
+{
+	struct inno_video_phy *inno = dev_get_priv(dev);
+	struct rockchip_phy *phy =
+		(struct rockchip_phy *)dev_get_driver_data(dev);
+
+	inno->base = dev_read_addr_ptr(dev);
+	phy->dev = dev;
+
+	return 0;
+}
+
+static struct rockchip_phy inno_video_phy_driver_data = {
+	 .funcs = &inno_video_phy_funcs,
+};
+
+static const struct udevice_id inno_video_phy_ids[] = {
+	{
+		.compatible = "rockchip,rk3288-video-phy",
+		.data = (ulong)&inno_video_phy_driver_data,
+	},
+	{}
+};
+
+U_BOOT_DRIVER(inno_video_phy) = {
+	.name = "inno_video_phy",
+	.id = UCLASS_PHY,
+	.of_match = inno_video_phy_ids,
+	.probe = inno_video_phy_probe,
+	.priv_auto_alloc_size = sizeof(struct inno_video_phy),
+};

commit 1e992932a70bbf4a5b56d64802275a6f7402acf9
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Sat Dec 8 18:50:39 2018 +0800

    video/drm: mipi_dphy: Remove support for px30/rk3128/rk3366/rk3368
    
    The mipi dphy driver of px30/rk3128/rk3368 is now supported
    by inno_video_combo_phy.c.
    
    Change-Id: I1194fa3093cb2bac1cb75ccf1266c7bd4dd68867
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip-inno-mipi-dphy.c b/drivers/video/drm/rockchip-inno-mipi-dphy.c
index 267770387e..4ef418c060 100644
--- a/drivers/video/drm/rockchip-inno-mipi-dphy.c
+++ b/drivers/video/drm/rockchip-inno-mipi-dphy.c
@@ -586,22 +586,6 @@ static struct rockchip_phy inno_mipi_dphy_driver_data = {
 };
 
 static const struct udevice_id inno_mipi_dphy_ids[] = {
-	{
-		.compatible = "rockchip,px30-mipi-dphy",
-		.data = (ulong)&inno_mipi_dphy_driver_data,
-	},
-	{
-		.compatible = "rockchip,rk3128-mipi-dphy",
-		.data = (ulong)&inno_mipi_dphy_driver_data,
-	},
-	{
-		.compatible = "rockchip,rk3366-mipi-dphy",
-		.data = (ulong)&inno_mipi_dphy_driver_data,
-	},
-	{
-		.compatible = "rockchip,rk3368-mipi-dphy",
-		.data = (ulong)&inno_mipi_dphy_driver_data,
-	},
 	{
 		.compatible = "rockchip,rv1108-mipi-dphy",
 		.data = (ulong)&inno_mipi_dphy_driver_data,

commit c916e93361c3819dc70d13ce65b3094362a25b5d
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Sat Dec 8 11:52:31 2018 +0800

    video/drm: dsi: set phy mode before enable phy
    
    Change-Id: Ida5fa789aa634a44102cdb72599716fdda8ea1fd
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index 4769c801c6..dc71da99d0 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -1175,6 +1175,7 @@ static void dw_mipi_dsi_pre_init(struct dw_mipi_dsi *dsi)
 		bw = dw_mipi_dsi_calc_bandwidth(dsi);
 		rate = rockchip_phy_set_pll(dsi->dphy.phy, bw * USEC_PER_SEC);
 		dsi->lane_mbps = rate / USEC_PER_SEC;
+		rockchip_phy_set_mode(dsi->dphy.phy, PHY_MODE_VIDEO_MIPI);
 		rockchip_phy_power_on(dsi->dphy.phy);
 	} else {
 		dw_mipi_dsi_get_lane_bps(dsi);

commit caad302d1f719bee384ae4a9b4054d63ff478b5d
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Dec 7 16:40:47 2018 +0800

    video/drm: Add support for INNOSILICON MIPI/LVDS/TTL Video Combo PHY
    
    The Innosilicon Video Combo PHY not only supports MIPI DSI,
    but also LVDS and TTL functions with small die size and low
    pin count. Customers can choose according to their own applications.
    
    Change-Id: I45bfb63014ddc1df0931ae573894e14aec8dc461
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/Kconfig b/drivers/video/drm/Kconfig
index 6f071f8cb1..d3d700213f 100644
--- a/drivers/video/drm/Kconfig
+++ b/drivers/video/drm/Kconfig
@@ -30,6 +30,13 @@ config ROCKCHIP_INNO_HDMI_PHY
 	 use HDMI or TVE in RK322XH or RK322X, you should selet
 	 this option.
 
+config DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY
+	tristate "Rockchip INNO MIPI/LVDS/TTL PHY driver"
+	depends on DRM_ROCKCHIP
+	help
+	  Enable this to support the Rockchip MIPI/LVDS/TTL PHY
+	  with Innosilicon IP block.
+
 config DRM_ROCKCHIP_MIPI_DSI
 	bool
 
diff --git a/drivers/video/drm/Makefile b/drivers/video/drm/Makefile
index c91f46967a..237657fb43 100644
--- a/drivers/video/drm/Makefile
+++ b/drivers/video/drm/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI) += rockchip-dw-mipi-dsi.o \
 					  rockchip-inno-mipi-dphy.o
 obj-$(CONFIG_DRM_ROCKCHIP_DW_HDMI) += rockchip_dw_hdmi.o dw_hdmi.o
 obj-$(CONFIG_ROCKCHIP_INNO_HDMI_PHY) += rockchip-inno-hdmi-phy.o
+obj-$(CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY) += inno_video_combo_phy.o
 obj-$(CONFIG_ROCKCHIP_DRM_TVE) += rockchip_drm_tve.o
 obj-$(CONFIG_DRM_ROCKCHIP_ANALOGIX_DP) += analogix_dp.o analogix_dp_reg.o
 obj-$(CONFIG_DRM_ROCKCHIP_LVDS) += rockchip_lvds.o
diff --git a/drivers/video/drm/inno_video_combo_phy.c b/drivers/video/drm/inno_video_combo_phy.c
new file mode 100644
index 0000000000..af4020858c
--- /dev/null
+++ b/drivers/video/drm/inno_video_combo_phy.c
@@ -0,0 +1,719 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2008-2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * Author: Wyon Bi <bivvy.bi@rock-chips.com>
+ */
+
+#include <config.h>
+#include <common.h>
+#include <errno.h>
+#include <dm.h>
+#include <div64.h>
+#include <asm/io.h>
+#include <linux/ioport.h>
+#include <linux/iopoll.h>
+#include <linux/math64.h>
+
+#include "rockchip_phy.h"
+
+#define PSEC_PER_SEC	1000000000000LL
+
+#define UPDATE(x, h, l)	(((x) << (l)) & GENMASK((h), (l)))
+
+/*
+ * The offset address[7:0] is distributed two parts, one from the bit7 to bit5
+ * is the first address, the other from the bit4 to bit0 is the second address.
+ * when you configure the registers, you must set both of them. The Clock Lane
+ * and Data Lane use the same registers with the same second address, but the
+ * first address is different.
+ */
+#define FIRST_ADDRESS(x)		(((x) & 0x7) << 5)
+#define SECOND_ADDRESS(x)		(((x) & 0x1f) << 0)
+#define PHY_REG(first, second)		(FIRST_ADDRESS(first) | \
+					 SECOND_ADDRESS(second))
+
+/* Analog Register Part: reg00 */
+#define BANDGAP_POWER_MASK			BIT(7)
+#define BANDGAP_POWER_DOWN			BIT(7)
+#define BANDGAP_POWER_ON			0
+#define LANE_EN_MASK				GENMASK(6, 2)
+#define LANE_EN_CK				BIT(6)
+#define LANE_EN_3				BIT(5)
+#define LANE_EN_2				BIT(4)
+#define LANE_EN_1				BIT(3)
+#define LANE_EN_0				BIT(2)
+#define POWER_WORK_MASK				GENMASK(1, 0)
+#define POWER_WORK_ENABLE			UPDATE(1, 1, 0)
+#define POWER_WORK_DISABLE			UPDATE(2, 1, 0)
+/* Analog Register Part: reg01 */
+#define REG_SYNCRST_MASK			BIT(2)
+#define REG_SYNCRST_RESET			BIT(2)
+#define REG_SYNCRST_NORMAL			0
+#define REG_LDOPD_MASK				BIT(1)
+#define REG_LDOPD_POWER_DOWN			BIT(1)
+#define REG_LDOPD_POWER_ON			0
+#define REG_PLLPD_MASK				BIT(0)
+#define REG_PLLPD_POWER_DOWN			BIT(0)
+#define REG_PLLPD_POWER_ON			0
+/* Analog Register Part: reg03 */
+#define REG_FBDIV_HI_MASK			BIT(5)
+#define REG_FBDIV_HI(x)				UPDATE(x, 5, 5)
+#define REG_PREDIV_MASK				GENMASK(4, 0)
+#define REG_PREDIV(x)				UPDATE(x, 4, 0)
+/* Analog Register Part: reg04 */
+#define REG_FBDIV_LO_MASK			GENMASK(7, 0)
+#define REG_FBDIV_LO(x)				UPDATE(x, 7, 0)
+/* Analog Register Part: reg05 */
+#define SAMPLE_CLOCK_PHASE_MASK			GENMASK(6, 4)
+#define SAMPLE_CLOCK_PHASE(x)			UPDATE(x, 6, 4)
+#define CLOCK_LANE_SKEW_PHASE_MASK		GENMASK(2, 0)
+#define CLOCK_LANE_SKEW_PHASE(x)		UPDATE(x, 2, 0)
+/* Analog Register Part: reg06 */
+#define DATA_LANE_3_SKEW_PHASE_MASK		GENMASK(6, 4)
+#define DATA_LANE_3_SKEW_PHASE(x)		UPDATE(x, 6, 4)
+#define DATA_LANE_2_SKEW_PHASE_MASK		GENMASK(2, 0)
+#define DATA_LANE_2_SKEW_PHASE(x)		UPDATE(x, 2, 0)
+/* Analog Register Part: reg07 */
+#define DATA_LANE_1_SKEW_PHASE_MASK		GENMASK(6, 4)
+#define DATA_LANE_1_SKEW_PHASE(x)		UPDATE(x, 6, 4)
+#define DATA_LANE_0_SKEW_PHASE_MASK		GENMASK(2, 0)
+#define DATA_LANE_0_SKEW_PHASE(x)		UPDATE(x, 2, 0)
+/* Analog Register Part: reg08 */
+#define SAMPLE_CLOCK_DIRECTION_MASK		BIT(4)
+#define SAMPLE_CLOCK_DIRECTION_REVERSE		BIT(4)
+#define SAMPLE_CLOCK_DIRECTION_FORWARD		0
+/* Digital Register Part: reg00 */
+#define REG_DIG_RSTN_MASK			BIT(0)
+#define REG_DIG_RSTN_NORMAL			BIT(0)
+#define REG_DIG_RSTN_RESET			0
+/* Digital Register Part: reg01	*/
+#define INVERT_TXCLKESC_MASK			BIT(1)
+#define INVERT_TXCLKESC_ENABLE			BIT(1)
+#define INVERT_TXCLKESC_DISABLE			0
+#define INVERT_TXBYTECLKHS_MASK			BIT(0)
+#define INVERT_TXBYTECLKHS_ENABLE		BIT(0)
+#define INVERT_TXBYTECLKHS_DISABLE		0
+/* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg05 */
+#define T_LPX_CNT_MASK				GENMASK(5, 0)
+#define T_LPX_CNT(x)				UPDATE(x, 5, 0)
+/* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg06 */
+#define T_HS_PREPARE_CNT_MASK			GENMASK(6, 0)
+#define T_HS_PREPARE_CNT(x)			UPDATE(x, 6, 0)
+/* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg07 */
+#define T_HS_ZERO_CNT_MASK			GENMASK(5, 0)
+#define T_HS_ZERO_CNT(x)			UPDATE(x, 5, 0)
+/* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg08 */
+#define T_HS_TRAIL_CNT_MASK			GENMASK(6, 0)
+#define T_HS_TRAIL_CNT(x)			UPDATE(x, 6, 0)
+/* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg09 */
+#define T_HS_EXIT_CNT_MASK			GENMASK(4, 0)
+#define T_HS_EXIT_CNT(x)			UPDATE(x, 4, 0)
+/* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg0a */
+#define T_CLK_POST_CNT_MASK			GENMASK(3, 0)
+#define T_CLK_POST_CNT(x)			UPDATE(x, 3, 0)
+/* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg0c */
+#define LPDT_TX_PPI_SYNC_MASK			BIT(2)
+#define LPDT_TX_PPI_SYNC_ENABLE			BIT(2)
+#define LPDT_TX_PPI_SYNC_DISABLE		0
+#define T_WAKEUP_CNT_HI_MASK			GENMASK(1, 0)
+#define T_WAKEUP_CNT_HI(x)			UPDATE(x, 1, 0)
+/* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg0d */
+#define T_WAKEUP_CNT_LO_MASK			GENMASK(7, 0)
+#define T_WAKEUP_CNT_LO(x)			UPDATE(x, 7, 0)
+/* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg0e */
+#define T_CLK_PRE_CNT_MASK			GENMASK(3, 0)
+#define T_CLK_PRE_CNT(x)			UPDATE(x, 3, 0)
+/* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg10 */
+#define T_TA_GO_CNT_MASK			GENMASK(5, 0)
+#define T_TA_GO_CNT(x)				UPDATE(x, 5, 0)
+/* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg11 */
+#define T_TA_SURE_CNT_MASK			GENMASK(5, 0)
+#define T_TA_SURE_CNT(x)			UPDATE(x, 5, 0)
+/* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg12 */
+#define T_TA_WAIT_CNT_MASK			GENMASK(5, 0)
+#define T_TA_WAIT_CNT(x)			UPDATE(x, 5, 0)
+/* LVDS Register Part: reg00 */
+#define LVDS_DIGITAL_INTERNAL_RESET_MASK	BIT(2)
+#define LVDS_DIGITAL_INTERNAL_RESET_DISABLE	BIT(2)
+#define LVDS_DIGITAL_INTERNAL_RESET_ENABLE	0
+/* LVDS Register Part: reg01 */
+#define LVDS_DIGITAL_INTERNAL_ENABLE_MASK	BIT(7)
+#define LVDS_DIGITAL_INTERNAL_ENABLE		BIT(7)
+#define LVDS_DIGITAL_INTERNAL_DISABLE		0
+/* LVDS Register Part: reg03 */
+#define MODE_ENABLE_MASK			GENMASK(2, 0)
+#define TTL_MODE_ENABLE				BIT(2)
+#define LVDS_MODE_ENABLE			BIT(1)
+#define MIPI_MODE_ENABLE			BIT(0)
+/* LVDS Register Part: reg0b */
+#define LVDS_LANE_EN_MASK			GENMASK(7, 3)
+#define LVDS_DATA_LANE0_EN			BIT(7)
+#define LVDS_DATA_LANE1_EN			BIT(6)
+#define LVDS_DATA_LANE2_EN			BIT(5)
+#define LVDS_DATA_LANE3_EN			BIT(4)
+#define LVDS_CLK_LANE_EN			BIT(3)
+#define LVDS_PLL_POWER_MASK			BIT(2)
+#define LVDS_PLL_POWER_OFF			BIT(2)
+#define LVDS_PLL_POWER_ON			0
+#define LVDS_BANDGAP_POWER_MASK			BIT(0)
+#define LVDS_BANDGAP_POWER_DOWN			BIT(0)
+#define LVDS_BANDGAP_POWER_ON			0
+
+#define DSI_PHY_RSTZ			0xa0
+#define PHY_ENABLECLK			BIT(2)
+#define DSI_PHY_STATUS			0xb0
+#define PHY_LOCK			BIT(0)
+
+struct mipi_dphy_timing {
+	unsigned int clkmiss;
+	unsigned int clkpost;
+	unsigned int clkpre;
+	unsigned int clkprepare;
+	unsigned int clksettle;
+	unsigned int clktermen;
+	unsigned int clktrail;
+	unsigned int clkzero;
+	unsigned int dtermen;
+	unsigned int eot;
+	unsigned int hsexit;
+	unsigned int hsprepare;
+	unsigned int hszero;
+	unsigned int hssettle;
+	unsigned int hsskip;
+	unsigned int hstrail;
+	unsigned int init;
+	unsigned int lpx;
+	unsigned int taget;
+	unsigned int tago;
+	unsigned int tasure;
+	unsigned int wakeup;
+};
+
+struct inno_video_phy {
+	enum phy_mode mode;
+	struct resource phy;
+	struct resource host;
+	struct {
+		u8 prediv;
+		u16 fbdiv;
+		unsigned long rate;
+	} pll;
+};
+
+enum {
+	REGISTER_PART_ANALOG,
+	REGISTER_PART_DIGITAL,
+	REGISTER_PART_CLOCK_LANE,
+	REGISTER_PART_DATA0_LANE,
+	REGISTER_PART_DATA1_LANE,
+	REGISTER_PART_DATA2_LANE,
+	REGISTER_PART_DATA3_LANE,
+	REGISTER_PART_LVDS,
+};
+
+static inline void phy_update_bits(struct inno_video_phy *inno,
+				   u8 first, u8 second, u8 mask, u8 val)
+{
+	u32 reg = PHY_REG(first, second) << 2;
+	u32 tmp, orig;
+
+	orig = readl(inno->phy.start + reg);
+	tmp = orig & ~mask;
+	tmp |= val & mask;
+	writel(tmp, inno->phy.start + reg);
+}
+
+static inline void host_update_bits(struct inno_video_phy *inno,
+				    u32 reg, u32 mask, u32 val)
+{
+	u32 tmp, orig;
+
+	orig = readl(inno->host.start + reg);
+	tmp = orig & ~mask;
+	tmp |= val & mask;
+	writel(tmp, inno->host.start + reg);
+}
+
+static void mipi_dphy_timing_get_default(struct mipi_dphy_timing *timing,
+					 unsigned long period)
+{
+	/* Global Operation Timing Parameters */
+	timing->clkmiss = 0;
+	timing->clkpost = 70000 + 52 * period;
+	timing->clkpre = 8 * period;
+	timing->clkprepare = 65000;
+	timing->clksettle = 95000;
+	timing->clktermen = 0;
+	timing->clktrail = 80000;
+	timing->clkzero = 260000;
+	timing->dtermen = 0;
+	timing->eot = 0;
+	timing->hsexit = 120000;
+	timing->hsprepare = 65000 + 4 * period;
+	timing->hszero = 145000 + 6 * period;
+	timing->hssettle = 85000 + 6 * period;
+	timing->hsskip = 40000;
+	timing->hstrail = max(8 * period, 60000 + 4 * period);
+	timing->init = 100000000;
+	timing->lpx = 60000;
+	timing->taget = 5 * timing->lpx;
+	timing->tago = 4 * timing->lpx;
+	timing->tasure = 2 * timing->lpx;
+	timing->wakeup = 1000000000;
+}
+
+static void inno_video_phy_mipi_mode_enable(struct inno_video_phy *inno)
+{
+	struct mipi_dphy_timing gotp;
+	const struct {
+		unsigned long rate;
+		u8 hs_prepare;
+		u8 clk_lane_hs_zero;
+		u8 data_lane_hs_zero;
+		u8 hs_trail;
+	} timings[] = {
+		{ 110000000, 0x20, 0x16, 0x02, 0x22},
+		{ 150000000, 0x06, 0x16, 0x03, 0x45},
+		{ 200000000, 0x18, 0x17, 0x04, 0x0b},
+		{ 250000000, 0x05, 0x17, 0x05, 0x16},
+		{ 300000000, 0x51, 0x18, 0x06, 0x2c},
+		{ 400000000, 0x64, 0x19, 0x07, 0x33},
+		{ 500000000, 0x20, 0x1b, 0x07, 0x4e},
+		{ 600000000, 0x6a, 0x1d, 0x08, 0x3a},
+		{ 700000000, 0x3e, 0x1e, 0x08, 0x6a},
+		{ 800000000, 0x21, 0x1f, 0x09, 0x29},
+		{1000000000, 0x09, 0x20, 0x09, 0x27},
+	};
+	u32 t_txbyteclkhs, t_txclkesc, ui;
+	u32 txbyteclkhs, txclkesc, esc_clk_div;
+	u32 hs_exit, clk_post, clk_pre, wakeup, lpx, ta_go, ta_sure, ta_wait;
+	u32 hs_prepare, hs_trail, hs_zero, clk_lane_hs_zero, data_lane_hs_zero;
+	unsigned int i;
+
+	/* Select MIPI mode */
+	phy_update_bits(inno, REGISTER_PART_LVDS, 0x03,
+			MODE_ENABLE_MASK, MIPI_MODE_ENABLE);
+	/* Configure PLL */
+	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x03,
+			REG_PREDIV_MASK, REG_PREDIV(inno->pll.prediv));
+	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x03,
+			REG_FBDIV_HI_MASK, REG_FBDIV_HI(inno->pll.fbdiv >> 8));
+	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x04,
+			REG_FBDIV_LO_MASK, REG_FBDIV_LO(inno->pll.fbdiv));
+	/* Enable PLL and LDO */
+	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x01,
+			REG_LDOPD_MASK | REG_PLLPD_MASK,
+			REG_LDOPD_POWER_ON | REG_PLLPD_POWER_ON);
+	/* Reset analog */
+	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x01,
+			REG_SYNCRST_MASK, REG_SYNCRST_RESET);
+	udelay(1);
+	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x01,
+			REG_SYNCRST_MASK, REG_SYNCRST_NORMAL);
+	/* Reset digital */
+	phy_update_bits(inno, REGISTER_PART_DIGITAL, 0x00,
+			REG_DIG_RSTN_MASK, REG_DIG_RSTN_RESET);
+	udelay(1);
+	phy_update_bits(inno, REGISTER_PART_DIGITAL, 0x00,
+			REG_DIG_RSTN_MASK, REG_DIG_RSTN_NORMAL);
+
+	txbyteclkhs = inno->pll.rate / 8;
+	t_txbyteclkhs = div_u64(PSEC_PER_SEC, txbyteclkhs);
+
+	esc_clk_div = DIV_ROUND_UP(txbyteclkhs, 20000000);
+	txclkesc = txbyteclkhs / esc_clk_div;
+	t_txclkesc = div_u64(PSEC_PER_SEC, txclkesc);
+
+	ui = div_u64(PSEC_PER_SEC, inno->pll.rate);
+
+	memset(&gotp, 0, sizeof(gotp));
+	mipi_dphy_timing_get_default(&gotp, ui);
+
+	/*
+	 * The value of counter for HS Ths-exit
+	 * Ths-exit = Tpin_txbyteclkhs * value
+	 */
+	hs_exit = DIV_ROUND_UP(gotp.hsexit, t_txbyteclkhs);
+	/*
+	 * The value of counter for HS Tclk-post
+	 * Tclk-post = Tpin_txbyteclkhs * value
+	 */
+	clk_post = DIV_ROUND_UP(gotp.clkpost, t_txbyteclkhs);
+	/*
+	 * The value of counter for HS Tclk-pre
+	 * Tclk-pre = Tpin_txbyteclkhs * value
+	 */
+	clk_pre = DIV_ROUND_UP(gotp.clkpre, t_txbyteclkhs);
+
+	/*
+	 * The value of counter for HS Tlpx Time
+	 * Tlpx = Tpin_txbyteclkhs * (2 + value)
+	 */
+	lpx = DIV_ROUND_UP(gotp.lpx, t_txbyteclkhs);
+	if (lpx >= 2)
+		lpx -= 2;
+
+	/*
+	 * The value of counter for HS Tta-go
+	 * Tta-go for turnaround
+	 * Tta-go = Ttxclkesc * value
+	 */
+	ta_go = DIV_ROUND_UP(gotp.tago, t_txclkesc);
+	/*
+	 * The value of counter for HS Tta-sure
+	 * Tta-sure for turnaround
+	 * Tta-sure = Ttxclkesc * value
+	 */
+	ta_sure = DIV_ROUND_UP(gotp.tasure, t_txclkesc);
+	/*
+	 * The value of counter for HS Tta-wait
+	 * Tta-wait for turnaround
+	 * Tta-wait = Ttxclkesc * value
+	 */
+	ta_wait = DIV_ROUND_UP(gotp.taget, t_txclkesc);
+
+	for (i = 0; i < ARRAY_SIZE(timings); i++)
+		if (inno->pll.rate <= timings[i].rate)
+			break;
+
+	if (i == ARRAY_SIZE(timings))
+		--i;
+
+	hs_prepare = timings[i].hs_prepare;
+	hs_trail = timings[i].hs_trail;
+	clk_lane_hs_zero = timings[i].clk_lane_hs_zero;
+	data_lane_hs_zero = timings[i].data_lane_hs_zero;
+	wakeup = 0x3ff;
+
+	for (i = REGISTER_PART_CLOCK_LANE; i <= REGISTER_PART_DATA3_LANE; i++) {
+		if (i == REGISTER_PART_CLOCK_LANE)
+			hs_zero = clk_lane_hs_zero;
+		else
+			hs_zero = data_lane_hs_zero;
+
+		phy_update_bits(inno, i, 0x05, T_LPX_CNT_MASK,
+				T_LPX_CNT(lpx));
+		phy_update_bits(inno, i, 0x06, T_HS_PREPARE_CNT_MASK,
+				T_HS_PREPARE_CNT(hs_prepare));
+		phy_update_bits(inno, i, 0x07, T_HS_ZERO_CNT_MASK,
+				T_HS_ZERO_CNT(hs_zero));
+		phy_update_bits(inno, i, 0x08, T_HS_TRAIL_CNT_MASK,
+				T_HS_TRAIL_CNT(hs_trail));
+		phy_update_bits(inno, i, 0x09, T_HS_EXIT_CNT_MASK,
+				T_HS_EXIT_CNT(hs_exit));
+		phy_update_bits(inno, i, 0x0a, T_CLK_POST_CNT_MASK,
+				T_CLK_POST_CNT(clk_post));
+		phy_update_bits(inno, i, 0x0e, T_CLK_PRE_CNT_MASK,
+				T_CLK_PRE_CNT(clk_pre));
+		phy_update_bits(inno, i, 0x0c, T_WAKEUP_CNT_HI_MASK,
+				T_WAKEUP_CNT_HI(wakeup >> 8));
+		phy_update_bits(inno, i, 0x0d, T_WAKEUP_CNT_LO_MASK,
+				T_WAKEUP_CNT_LO(wakeup));
+		phy_update_bits(inno, i, 0x10, T_TA_GO_CNT_MASK,
+				T_TA_GO_CNT(ta_go));
+		phy_update_bits(inno, i, 0x11, T_TA_SURE_CNT_MASK,
+				T_TA_SURE_CNT(ta_sure));
+		phy_update_bits(inno, i, 0x12, T_TA_WAIT_CNT_MASK,
+				T_TA_WAIT_CNT(ta_wait));
+	}
+
+	/* Enable all lanes on analog part */
+	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x00,
+			LANE_EN_MASK, LANE_EN_CK | LANE_EN_3 | LANE_EN_2 |
+			LANE_EN_1 | LANE_EN_0);
+}
+
+static void inno_video_phy_lvds_mode_enable(struct inno_video_phy *inno)
+{
+	u8 prediv = 2;
+	u16 fbdiv = 28;
+	u32 val;
+	int ret;
+
+	/* Sample clock reverse direction */
+	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x08,
+			SAMPLE_CLOCK_DIRECTION_MASK,
+			SAMPLE_CLOCK_DIRECTION_REVERSE);
+	/* Select LVDS mode */
+	phy_update_bits(inno, REGISTER_PART_LVDS, 0x03,
+			MODE_ENABLE_MASK, LVDS_MODE_ENABLE);
+	/* Configure PLL */
+	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x03,
+			REG_PREDIV_MASK, REG_PREDIV(prediv));
+	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x03,
+			REG_FBDIV_HI_MASK, REG_FBDIV_HI(fbdiv >> 8));
+	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x04,
+			REG_FBDIV_LO_MASK, REG_FBDIV_LO(fbdiv));
+	phy_update_bits(inno, REGISTER_PART_LVDS, 0x08, 0xff, 0xfc);
+	/* Enable PLL and Bandgap */
+	phy_update_bits(inno, REGISTER_PART_LVDS, 0x0b,
+			LVDS_PLL_POWER_MASK | LVDS_BANDGAP_POWER_MASK,
+			LVDS_PLL_POWER_ON | LVDS_BANDGAP_POWER_ON);
+
+	ret = readl_poll_timeout(inno->host.start + DSI_PHY_STATUS,
+				 val, val & PHY_LOCK, 10000);
+	if (ret)
+		dev_err(phy->dev, "PLL is not lock\n");
+
+	/* Reset LVDS digital logic */
+	phy_update_bits(inno, REGISTER_PART_LVDS, 0x00,
+			LVDS_DIGITAL_INTERNAL_RESET_MASK,
+			LVDS_DIGITAL_INTERNAL_RESET_ENABLE);
+	phy_update_bits(inno, REGISTER_PART_LVDS, 0x00,
+			LVDS_DIGITAL_INTERNAL_RESET_MASK,
+			LVDS_DIGITAL_INTERNAL_RESET_DISABLE);
+	/* Enable LVDS digital logic */
+	phy_update_bits(inno, REGISTER_PART_LVDS, 0x01,
+			LVDS_DIGITAL_INTERNAL_ENABLE_MASK,
+			LVDS_DIGITAL_INTERNAL_ENABLE);
+	/* Enable LVDS analog driver */
+	phy_update_bits(inno, REGISTER_PART_LVDS, 0x0b,
+			LVDS_LANE_EN_MASK, LVDS_CLK_LANE_EN |
+			LVDS_DATA_LANE0_EN | LVDS_DATA_LANE1_EN |
+			LVDS_DATA_LANE2_EN | LVDS_DATA_LANE3_EN);
+}
+
+static void inno_video_phy_ttl_mode_enable(struct inno_video_phy *inno)
+{
+	/* Select TTL mode */
+	phy_update_bits(inno, REGISTER_PART_LVDS, 0x03,
+			MODE_ENABLE_MASK, TTL_MODE_ENABLE);
+	/* Reset digital logic */
+	phy_update_bits(inno, REGISTER_PART_LVDS, 0x00,
+			LVDS_DIGITAL_INTERNAL_RESET_MASK,
+			LVDS_DIGITAL_INTERNAL_RESET_ENABLE);
+	phy_update_bits(inno, REGISTER_PART_LVDS, 0x00,
+			LVDS_DIGITAL_INTERNAL_RESET_MASK,
+			LVDS_DIGITAL_INTERNAL_RESET_DISABLE);
+	/* Enable digital logic */
+	phy_update_bits(inno, REGISTER_PART_LVDS, 0x01,
+			LVDS_DIGITAL_INTERNAL_ENABLE_MASK,
+			LVDS_DIGITAL_INTERNAL_ENABLE);
+	/* Enable analog driver */
+	phy_update_bits(inno, REGISTER_PART_LVDS, 0x0b,
+			LVDS_LANE_EN_MASK, LVDS_CLK_LANE_EN |
+			LVDS_DATA_LANE0_EN | LVDS_DATA_LANE1_EN |
+			LVDS_DATA_LANE2_EN | LVDS_DATA_LANE3_EN);
+	/* Enable for clk lane in TTL mode */
+	host_update_bits(inno, DSI_PHY_RSTZ, PHY_ENABLECLK, PHY_ENABLECLK);
+}
+
+static int inno_video_phy_power_on(struct rockchip_phy *phy)
+{
+	struct inno_video_phy *inno = dev_get_priv(phy->dev);
+
+	/* Bandgap power on */
+	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x00,
+			BANDGAP_POWER_MASK, BANDGAP_POWER_ON);
+	/* Enable power work */
+	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x00,
+			POWER_WORK_MASK, POWER_WORK_ENABLE);
+
+	switch (inno->mode) {
+	case PHY_MODE_VIDEO_MIPI:
+		inno_video_phy_mipi_mode_enable(inno);
+		break;
+	case PHY_MODE_VIDEO_LVDS:
+		inno_video_phy_lvds_mode_enable(inno);
+		break;
+	case PHY_MODE_VIDEO_TTL:
+		inno_video_phy_ttl_mode_enable(inno);
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int inno_video_phy_power_off(struct rockchip_phy *phy)
+{
+	struct inno_video_phy *inno = dev_get_priv(phy->dev);
+
+	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x00, LANE_EN_MASK, 0);
+	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x01,
+			REG_LDOPD_MASK | REG_PLLPD_MASK,
+			REG_LDOPD_POWER_DOWN | REG_PLLPD_POWER_DOWN);
+	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x00,
+			POWER_WORK_MASK, POWER_WORK_DISABLE);
+	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x00,
+			BANDGAP_POWER_MASK, BANDGAP_POWER_DOWN);
+
+	phy_update_bits(inno, REGISTER_PART_LVDS, 0x0b, LVDS_LANE_EN_MASK, 0);
+	phy_update_bits(inno, REGISTER_PART_LVDS, 0x01,
+			LVDS_DIGITAL_INTERNAL_ENABLE_MASK,
+			LVDS_DIGITAL_INTERNAL_DISABLE);
+	phy_update_bits(inno, REGISTER_PART_LVDS, 0x0b,
+			LVDS_PLL_POWER_MASK | LVDS_BANDGAP_POWER_MASK,
+			LVDS_PLL_POWER_OFF | LVDS_BANDGAP_POWER_DOWN);
+
+	return 0;
+}
+
+static unsigned long inno_video_phy_pll_round_rate(unsigned long prate,
+						   unsigned long rate,
+						   u8 *prediv, u16 *fbdiv)
+{
+	unsigned long best_freq = 0;
+	unsigned long fref, fout;
+	u8 min_prediv, max_prediv;
+	u8 _prediv, best_prediv = 1;
+	u16 _fbdiv, best_fbdiv = 1;
+	u32 min_delta = 0xffffffff;
+
+	/*
+	 * The PLL output frequency can be calculated using a simple formula:
+	 * PLL_Output_Frequency = (FREF / PREDIV * FBDIV) / 2
+	 * PLL_Output_Frequency: it is equal to DDR-Clock-Frequency * 2
+	 */
+	fref = prate / 2;
+	if (rate > 1000000000UL)
+		fout = 1000000000UL;
+	else
+		fout = rate;
+
+	/* 5Mhz < Fref / prediv < 40MHz */
+	min_prediv = DIV_ROUND_UP(fref, 40000000);
+	max_prediv = fref / 5000000;
+
+	for (_prediv = min_prediv; _prediv <= max_prediv; _prediv++) {
+		u64 tmp;
+		u32 delta;
+
+		tmp = (u64)fout * _prediv;
+		do_div(tmp, fref);
+		_fbdiv = tmp;
+
+		/*
+		 * The all possible settings of feedback divider are
+		 * 12, 13, 14, 16, ~ 511
+		 */
+		if (_fbdiv == 15)
+			continue;
+
+		if (_fbdiv < 12 || _fbdiv > 511)
+			continue;
+
+		tmp = (u64)_fbdiv * fref;
+		do_div(tmp, _prediv);
+
+		delta = abs(fout - tmp);
+		if (!delta) {
+			best_prediv = _prediv;
+			best_fbdiv = _fbdiv;
+			best_freq = tmp;
+			break;
+		} else if (delta < min_delta) {
+			best_prediv = _prediv;
+			best_fbdiv = _fbdiv;
+			best_freq = tmp;
+			min_delta = delta;
+		}
+	}
+
+	if (best_freq) {
+		*prediv = best_prediv;
+		*fbdiv = best_fbdiv;
+	}
+
+	return best_freq;
+}
+
+static unsigned long inno_video_phy_set_pll(struct rockchip_phy *phy,
+					    unsigned long rate)
+{
+	struct inno_video_phy *inno = dev_get_priv(phy->dev);
+	unsigned long fin, fout;
+	u16 fbdiv = 1;
+	u8 prediv = 1;
+
+	fin = 24000000;
+	fout = inno_video_phy_pll_round_rate(fin, rate, &prediv, &fbdiv);
+
+	dev_dbg(phy->dev, "fin=%lu, fout=%lu, prediv=%u, fbdiv=%u\n",
+		fin, fout, prediv, fbdiv);
+
+	inno->pll.prediv = prediv;
+	inno->pll.fbdiv = fbdiv;
+	inno->pll.rate = fout;
+
+	return fout;
+}
+
+static int inno_video_phy_set_mode(struct rockchip_phy *phy,
+				   enum phy_mode mode)
+{
+	struct inno_video_phy *inno = dev_get_priv(phy->dev);
+
+	switch (mode) {
+	case PHY_MODE_VIDEO_MIPI:
+	case PHY_MODE_VIDEO_LVDS:
+	case PHY_MODE_VIDEO_TTL:
+		inno->mode = mode;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static const struct rockchip_phy_funcs inno_video_phy_funcs = {
+	.power_on = inno_video_phy_power_on,
+	.power_off = inno_video_phy_power_off,
+	.set_pll = inno_video_phy_set_pll,
+	.set_mode = inno_video_phy_set_mode,
+};
+
+static int inno_video_phy_probe(struct udevice *dev)
+{
+	struct inno_video_phy *inno = dev_get_priv(dev);
+	struct rockchip_phy *phy =
+		(struct rockchip_phy *)dev_get_driver_data(dev);
+	int ret;
+
+	ret = dev_read_resource(dev, 0, &inno->phy);
+	if (ret < 0) {
+		dev_err(dev, "resource \"phy\" not found\n");
+		return ret;
+	}
+
+	ret = dev_read_resource(dev, 1, &inno->host);
+	if (ret < 0) {
+		dev_err(dev, "resource \"host\" not found\n");
+		return ret;
+	}
+
+	phy->dev = dev;
+
+	return 0;
+}
+
+static struct rockchip_phy inno_video_phy_driver_data = {
+	 .funcs = &inno_video_phy_funcs,
+};
+
+static const struct udevice_id inno_video_phy_ids[] = {
+	{
+		.compatible = "rockchip,px30-video-phy",
+		.data = (ulong)&inno_video_phy_driver_data,
+	},
+	{
+		.compatible = "rockchip,rk3128-video-phy",
+		.data = (ulong)&inno_video_phy_driver_data,
+	},
+	{
+		.compatible = "rockchip,rk3368-video-phy",
+		.data = (ulong)&inno_video_phy_driver_data,
+	},
+	{}
+};
+
+U_BOOT_DRIVER(inno_video_combo_phy) = {
+	.name = "inno_video_combo_phy",
+	.id = UCLASS_PHY,
+	.of_match = inno_video_phy_ids,
+	.probe = inno_video_phy_probe,
+	.priv_auto_alloc_size = sizeof(struct inno_video_phy),
+};

commit 396701fd2f56ca898b263ef428ef8a639992b96b
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Sat Dec 8 11:51:35 2018 +0800

    video/drm: rockchip_phy: support set_mode callback
    
    This patch adds generic PHY modes to the phy_mode enum, to
    allow configuring generic PHYs to the MIPI/LVDS/TTL mode by
    using the set_mode callback.
    
    Change-Id: I28c5cdf905026b246f928eb8f75a212408df281b
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_phy.c b/drivers/video/drm/rockchip_phy.c
index b92511e8db..2f5d275d96 100644
--- a/drivers/video/drm/rockchip_phy.c
+++ b/drivers/video/drm/rockchip_phy.c
@@ -73,3 +73,14 @@ long rockchip_phy_round_rate(struct rockchip_phy *phy, unsigned long rate)
 
 	return 0;
 }
+
+int rockchip_phy_set_mode(struct rockchip_phy *phy, enum phy_mode mode)
+{
+	if (!phy)
+		return -ENODEV;
+
+	if (phy->funcs && phy->funcs->set_mode)
+		return phy->funcs->set_mode(phy, mode);
+
+	return 0;
+}
diff --git a/drivers/video/drm/rockchip_phy.h b/drivers/video/drm/rockchip_phy.h
index ae0f9d49f4..479dbb059c 100644
--- a/drivers/video/drm/rockchip_phy.h
+++ b/drivers/video/drm/rockchip_phy.h
@@ -7,6 +7,13 @@
 #ifndef _ROCKCHIP_PHY_H_
 #define _ROCKCHIP_PHY_H_
 
+enum phy_mode {
+	PHY_MODE_INVALID,
+	PHY_MODE_VIDEO_MIPI,
+	PHY_MODE_VIDEO_LVDS,
+	PHY_MODE_VIDEO_TTL,
+};
+
 struct rockchip_phy;
 
 struct rockchip_phy_funcs {
@@ -16,6 +23,7 @@ struct rockchip_phy_funcs {
 	unsigned long (*set_pll)(struct rockchip_phy *phy, unsigned long rate);
 	int (*set_bus_width)(struct rockchip_phy *phy, u32 bus_width);
 	long (*round_rate)(struct rockchip_phy *phy, unsigned long rate);
+	int (*set_mode)(struct rockchip_phy *phy, enum phy_mode mode);
 };
 
 struct rockchip_phy {
@@ -31,5 +39,6 @@ unsigned long rockchip_phy_set_pll(struct rockchip_phy *phy,
 				   unsigned long rate);
 int rockchip_phy_set_bus_width(struct rockchip_phy *phy, u32 bus_width);
 long rockchip_phy_round_rate(struct rockchip_phy *phy, unsigned long rate);
+int rockchip_phy_set_mode(struct rockchip_phy *phy, enum phy_mode mode);
 
 #endif

commit 340f659492382a50f5c432709cd169ac48afffd9
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Jan 8 15:56:45 2019 +0800

    gpt: open repair gpt depend on CONFIG_RKIMG_BOOTLOADER
    
    Change-Id: I80323655e5bd7dc37af7df0693cb0611d7c8402a
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/disk/part_efi.c b/disk/part_efi.c
index f65fceb0c6..4033b3e802 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -339,7 +339,7 @@ int part_get_info_efi(struct blk_desc *dev_desc, int part,
 	return 0;
 }
 
-#ifdef RKIMG_BOOTLOADER
+#ifdef CONFIG_RKIMG_BOOTLOADER
 static void gpt_entry_modify(struct blk_desc *dev_desc,
 			     gpt_entry *gpt_pte,
 			     gpt_header *gpt_head)
@@ -379,7 +379,7 @@ static int part_efi_repair(struct blk_desc *dev_desc, gpt_entry *gpt_pte,
 		gpt_head->my_lba = dev_desc->lba - 1;
 		gpt_head->alternate_lba = 1;
 		gpt_head->partition_entry_lba = dev_desc->lba - 0x21;
-		gpt_entry_entry_modify(dev_desc, gpt_pte, gpt_head);
+		gpt_entry_modify(dev_desc, gpt_pte, gpt_head);
 		calc_crc32 = efi_crc32((const unsigned char *)gpt_head,
 				       le32_to_cpu(gpt_head->header_size));
 		gpt_head->header_crc32 = calc_crc32;
@@ -402,7 +402,7 @@ static int part_efi_repair(struct blk_desc *dev_desc, gpt_entry *gpt_pte,
 		gpt_head->my_lba = 1;
 		gpt_head->alternate_lba = dev_desc->lba - 1;
 		gpt_head->partition_entry_lba = 0x22;
-		gpt_entry_entry_modify(dev_desc, gpt_pte, gpt_head);
+		gpt_entry_modify(dev_desc, gpt_pte, gpt_head);
 		calc_crc32 = efi_crc32((const unsigned char *)gpt_head,
 				       le32_to_cpu(gpt_head->header_size));
 		gpt_head->header_crc32 = calc_crc32;
@@ -435,7 +435,7 @@ static int part_test_efi(struct blk_desc *dev_desc)
 		|| (is_pmbr_valid(legacymbr) != 1)) {
 		return -1;
 	}
-#ifdef RKIMG_BOOTLOADER
+#ifdef CONFIG_RKIMG_BOOTLOADER
 	gpt_entry *h_gpt_pte = NULL;
 	gpt_header *h_gpt_head = NULL;
 	gpt_entry *b_gpt_pte = NULL;

commit 54720da095cd8dafb3ef4144b80c3f20e82a742e
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Mon Dec 10 10:51:09 2018 +0800

    configs: rk322x_defconfig: enable AVB2.0
    
    Change-Id: I713c6beca3637a8d233b816bd40a914c369b77eb
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/configs/rk322x_defconfig b/configs/rk322x_defconfig
index 343ca6edb0..2a5d1eaa6b 100644
--- a/configs/rk322x_defconfig
+++ b/configs/rk322x_defconfig
@@ -23,6 +23,7 @@ CONFIG_BOOTDELAY=0
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_ANDROID_AVB=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
 CONFIG_TPL_SYS_MALLOC_SIMPLE=y
@@ -110,6 +111,11 @@ CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_TPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
+CONFIG_AVB_LIBAVB=y
+CONFIG_AVB_LIBAVB_AB=y
+CONFIG_AVB_LIBAVB_ATX=y
+CONFIG_AVB_LIBAVB_USER=y
+CONFIG_RK_AVB_LIBAVB_USER=y
 CONFIG_OPTEE_CLIENT=y
 CONFIG_OPTEE_V1=y
 CONFIG_TEST_ROCKCHIP=y

commit 0d734c9dd3519590f1b53472280b5ff323f09f5e
Author: Guochun Huang <hero.huang@rock-chips.com>
Date:   Tue Dec 18 14:03:57 2018 +0800

    configs: rk3399: enable avb for Android P
    
    Change-Id: Ib2fadd3de0767d15a5b127e762ab992636ccc421
    Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
index df2cbecf04..df0230e71f 100644
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -130,3 +130,13 @@ CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
 # CONFIG_EFI_LOADER is not set
 CONFIG_TEST_ROCKCHIP=y
+CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V1=y
+CONFIG_CMD_MMC=y
+CONFIG_ANDROID_AVB=y
+CONFIG_AVB_LIBAVB=y
+CONFIG_AVB_LIBAVB_AB=y
+CONFIG_AVB_LIBAVB_ATX=y
+CONFIG_AVB_LIBAVB_USER=y
+CONFIG_RK_AVB_LIBAVB_USER=y
diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index 3b8adb41fa..82ac90e8c5 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -9,7 +9,7 @@
 
 #include "rockchip-common.h"
 
-#define CONFIG_SYS_MALLOC_LEN		(32 << 20)
+#define CONFIG_SYS_MALLOC_LEN		(192 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
 #define CONFIG_SPL_FRAMEWORK
@@ -26,6 +26,7 @@
 #define CONFIG_SPL_BSS_START_ADDR	0x00400000
 #define CONFIG_SPL_BSS_MAX_SIZE         0x2000
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */
+#define CONFIG_SUPPORT_EMMC_RPMB
 
 #define GICD_BASE			0xFEE00000
 #define GICR_BASE			0xFEF00000

commit 424bfdcf40be8bdbde8daf505ba9275b23c80060
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jan 7 16:15:23 2019 +0800

    android: enable secure boot by vboot_flag
    
    We read the vboot_flag which is the flag of secure boot to enable
    verified boot in uboot.
    
    Change-Id: I592473ad14f9e19c6529602d029b7ec2fb335da8
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 919b2fcbf5..416b63c712 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -819,6 +819,36 @@ out:
 }
 #endif
 
+static int load_android_image(struct blk_desc *dev_desc,
+			      char *boot_partname,
+			      char *slot_suffix,
+			      unsigned long *load_address)
+{
+	disk_partition_t boot_part;
+	int ret, part_num;
+
+	part_num = android_part_get_info_by_name_suffix(dev_desc,
+							boot_partname,
+							slot_suffix,
+							&boot_part);
+	if (part_num < 0) {
+		printf("%s: Can't find part: %s\n", __func__, boot_partname);
+		return -1;
+	}
+	debug("ANDROID: Loading kernel from \"%s\", partition %d.\n",
+	      boot_part.name, part_num);
+
+	ret = android_image_load(dev_desc, &boot_part, *load_address, -1UL);
+	if (ret < 0) {
+		printf("%s: %s part load fail, ret=%d\n",
+		       __func__, boot_part.name, ret);
+		return ret;
+	}
+	*load_address = ret;
+
+	return 0;
+}
+
 int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 				 unsigned long load_address)
 {
@@ -905,33 +935,28 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	}
 
 #ifdef CONFIG_ANDROID_AVB
-	if (android_slot_verify(boot_partname, &load_address, slot_suffix))
+	uint8_t vboot_flag = 0;
+
+	if (trusty_read_vbootkey_enable_flag(&vboot_flag))
 		return -1;
+
+	if (vboot_flag) {
+		if (android_slot_verify(boot_partname, &load_address,
+					slot_suffix))
+			return -1;
+	} else {
+		if (load_android_image(dev_desc, boot_partname,
+				       slot_suffix, &load_address))
+			return -1;
+	}
 #else
 	/*
 	 * 2. Load the boot/recovery from the desired "boot" partition.
 	 * Determine if this is an AOSP image.
 	 */
-	disk_partition_t boot_part_info;
-	part_num =
-	    android_part_get_info_by_name_suffix(dev_desc,
-						 boot_partname,
-						 slot_suffix, &boot_part_info);
-	if (part_num < 0) {
-		printf("%s Could not found bootable partition %s\n", __func__,
-		       boot_partname);
+	if (load_android_image(dev_desc, boot_partname,
+			       slot_suffix, &load_address))
 		return -1;
-	}
-	debug("ANDROID: Loading kernel from \"%s\", partition %d.\n",
-	      boot_part_info.name, part_num);
-
-	ret = android_image_load(dev_desc, &boot_part_info, load_address,
-				 -1UL);
-	if (ret < 0) {
-		printf("%s %s part load fail\n", __func__, boot_part_info.name);
-		return ret;
-	}
-	load_address = ret;
 #endif
 
 	/* Set Android root variables. */

commit 22f2eaa842ce4767e480a1a10cbb4cad9dea4707
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 8 14:55:51 2019 +0800

    dvfs: Kconfig: wtemp dvfs driver depends on CONFIG_USING_KERNEL_DTB
    
    Because wtemp dvfs driver reads all cpu/dmc info from kernel dtb.
    
    Change-Id: Ifd85ed976bd880cf710c58e07351ef038f3a125c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/dvfs/Kconfig b/drivers/power/dvfs/Kconfig
index 0a3580e0b5..eddd862d69 100644
--- a/drivers/power/dvfs/Kconfig
+++ b/drivers/power/dvfs/Kconfig
@@ -6,6 +6,6 @@ config DM_DVFS
 
 config ROCKCHIP_WTEMP_DVFS
 	bool "Enable rockchip wide temperature dvfs policy"
-	depends on DM_DVFS && ROCKCHIP_THERMAL
+	depends on DM_DVFS && ROCKCHIP_THERMAL && USING_KERNEL_DTB
 	help
 	  This enable support wide temperature dvfs for rockchip platforms.

commit ee4798e5b57d8d810916ee443ac53e079bc5455d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 8 14:57:20 2019 +0800

    common: bootrkp: add fdt load address and size information
    
    Change-Id: If2220c5163ad8159ecfd4a2499b465e238371bc3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index d3fb0aae7a..923e77a021 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -454,6 +454,7 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 		}
 	}
 
+	printf("fdt	 @ 0x%08lx (0x%08x)\n", fdt_addr_r, fdt_totalsize(fdt_addr_r));
 	printf("kernel   @ 0x%08lx (0x%08x)\n", kernel_addr_r, kernel_size);
 	printf("ramdisk  @ 0x%08lx (0x%08x)\n", ramdisk_addr_r, ramdisk_size);
 #if defined(CONFIG_ARM64)

commit eaec55340ed4784336ef3f2c3309147b0f6084fa
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 8 14:55:02 2019 +0800

    common: android: add more clear description for getting fdt
    
    Change-Id: I66865eaed98d08d37047cda50d262d637c8865f8
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/image-android.c b/common/image-android.c
index 3405fc7578..60e57da1c3 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -209,22 +209,28 @@ int android_image_get_fdt(const struct andr_img_hdr *hdr,
 		return -1;
 	}
 /*
- * If kernel dtb is enabled, we have read kernel dtb in
- * init_kernel_dtb() -> rockchip_read_dtb_file() and may have been
- * done(optional) selection:
+ * If kernel dtb is enabled, it means we have read kernel dtb before do_bootm(),
+ * that's: init_kernel_dtb() -> rockchip_read_dtb_file().
+ * And maybe some operations(optional) are done:
  *
  * 1. apply fdt overlay;
  * 2. select fdt by adc or gpio;
  *
  * After that, we didn't update dtb at all untill run here, it's fine to
  * pass current fdt to kernel.
+ *
+ * This case has higher priority then the others(#elif, #else...).
  */
 #if defined(CONFIG_USING_KERNEL_DTB)
 	*rd_data = (ulong)gd->fdt_blob;
 
 /*
- * If kernel dtb is disabled and support rockchip image, we need to call
- * rockchip_read_dtb_file() to get dtb with some optional selection.
+ * If kernel dtb is disabled, it means kernel dtb is not read before do_bootm(),
+ * we need to read it from boot.img/recovery.img now.
+ *
+ * For rockchip AOSP firmware(CONFIG_RKIMG_BOOTLOADER), we pack resource.img in
+ * second position. we need read kernel dtb by rockchip_read_dtb_file() which
+ * can do the above "some operations(optional)".
  */
 #elif defined(CONFIG_RKIMG_BOOTLOADER)
 	ulong fdt_addr = 0;
@@ -246,8 +252,8 @@ int android_image_get_fdt(const struct andr_img_hdr *hdr,
 	*rd_data = fdt_addr;
 
 /*
- * If kernel dtb is disabled and not support rockchip image,
- * get dtb from second position.
+ * If kernel dtb is disabled and it's not rockchip AOSP firmware, kernel dtb is
+ * in second position, let't read it directly.
  */
 #else
 	*rd_data = (unsigned long)hdr;

commit 5716d3430d418191cbe51ba0f2336694684ba20d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 2 14:16:34 2019 +0800

    rockchip: smccc: sync sip id definition from kernel
    
    Change-Id: Iefc9baab29abe8ba23ad58e74a24b4b6d9bb85d1
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h b/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
index 6d389580d6..2b88a86934 100644
--- a/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
+++ b/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
@@ -22,7 +22,9 @@
 #define SIP_SHARE_MEM			0x82000009
 #define SIP_SIP_VERSION			0x8200000a
 #define SIP_REMOTECTL_CFG		0x8200000b
-#define PSCI_SIP_VPU_RESET		0x8200000c
+#define SIP_VPU_RESET			0x8200000c
+#define SIP_SOC_BUS_DIV			0x8200000d
+#define SIP_LAST_LOG			0x8200000e
 
 #define ROCKCHIP_SIP_CONFIG_DRAM_INIT		0x00
 #define ROCKCHIP_SIP_CONFIG_DRAM_SET_RATE	0x01

commit ab6f0fad651d363734085d6c01593dd662bd9d3e
Author: William Wu <william.wu@rock-chips.com>
Date:   Fri Jan 4 18:17:13 2019 +0800

    rockchip: rk3399: set qos priority for perilp_nsp
    
    This patch increase the qos priority of perilp_nsp from
    2 to 3 for USB 3.0 controllers.
    
    Change-Id: I813f9190cc894ac15452686aa68d187200be3888
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c
index ca154f745b..ba5f7319c7 100644
--- a/arch/arm/mach-rockchip/rk3399/rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
@@ -73,6 +73,8 @@ void rockchip_stimer_init(void)
 #define PMUGRF_BASE	0xff320000
 #define PMUSGRF_BASE	0xff330000
 #define PMUCRU_BASE	0xff750000
+#define NIU_PERILP_NSP_ADDR	0xffad8188
+#define QOS_PRIORITY_LEVEL(h, l)	((((h) & 3) << 8) | ((l) & 3))
 
 int arch_cpu_init(void)
 {
@@ -111,6 +113,9 @@ int arch_cpu_init(void)
 	writel(0x01000100, &pmucru->pmucru_clkgate_con[0]);
 #endif
 
+	/* Set perilp_nsp QOS priority to 3 for USB 3.0 */
+	writel(QOS_PRIORITY_LEVEL(3, 3), NIU_PERILP_NSP_ADDR);
+
 	return 0;
 }
 

commit 6392c7ee70e2310fc7689fcf239c01061236665a
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Mon Dec 10 10:45:50 2018 +0800

    configs: rk322x_defconfig: enable CONFIG_OPTEE_(CLIENT|V1)
    
    Change-Id: I94bd144e45a1b8d30e70a72bd5e32ecac81b2668
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/configs/rk322x_defconfig b/configs/rk322x_defconfig
index b44ab11b6e..343ca6edb0 100644
--- a/configs/rk322x_defconfig
+++ b/configs/rk322x_defconfig
@@ -110,4 +110,6 @@ CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_TPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V1=y
 CONFIG_TEST_ROCKCHIP=y

commit cf513fc425e7a1ee9ee9c905494dc8e84022fb46
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 3 15:50:53 2019 +0800

    configs: evb-rk3126: enable console info quiet
    
    Change-Id: Ic10b133bd08a1c3632acaa76a6b98414f285154b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3126_defconfig b/configs/rk3126_defconfig
index d574adcc43..239559a627 100644
--- a/configs/rk3126_defconfig
+++ b/configs/rk3126_defconfig
@@ -9,6 +9,7 @@ CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_NAND_BOOT=y
 CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_ANDROID_AVB=y

commit 138accc0fed36635f9d89544b791feb335d250c6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 3 15:50:09 2019 +0800

    configs: rk3126: update with make savedefconfig
    
    Change-Id: I552fa41748e30b3049bb5cff7c9816f32e469d8e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3126_defconfig b/configs/rk3126_defconfig
index ea939356ef..d574adcc43 100644
--- a/configs/rk3126_defconfig
+++ b/configs/rk3126_defconfig
@@ -1,13 +1,4 @@
 CONFIG_ARM=y
-CONFIG_OPTEE_CLIENT=y
-CONFIG_OPTEE_V1=y
-CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
-CONFIG_ANDROID_AVB=y
-CONFIG_AVB_LIBAVB=y
-CONFIG_AVB_LIBAVB_AB=y
-CONFIG_AVB_LIBAVB_ATX=y
-CONFIG_AVB_LIBAVB_USER=y
-CONFIG_RK_AVB_LIBAVB_USER=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x38000
 CONFIG_ROCKCHIP_RK3128=y
@@ -20,6 +11,7 @@ CONFIG_NAND_BOOT=y
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_ANDROID_AVB=y
 CONFIG_FASTBOOT_BUF_ADDR=0x60800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
@@ -93,4 +85,12 @@ CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_ERRNO_STR=y
+CONFIG_AVB_LIBAVB=y
+CONFIG_AVB_LIBAVB_AB=y
+CONFIG_AVB_LIBAVB_ATX=y
+CONFIG_AVB_LIBAVB_USER=y
+CONFIG_RK_AVB_LIBAVB_USER=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V1=y
+CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
 CONFIG_TEST_ROCKCHIP=y

commit a52765767d50c3cabc009b57bc0ba7e81a5a77cc
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 3 11:52:02 2019 +0800

    configs: evb-rk3326: enable console info quiet
    
    Change-Id: Ic1e00885e408bad6f10d96db21f915aa99f32b9e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-rk3326_defconfig b/configs/evb-rk3326_defconfig
index e6e407fccf..fd02d9f38c 100644
--- a/configs/evb-rk3326_defconfig
+++ b/configs/evb-rk3326_defconfig
@@ -19,6 +19,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y

commit 50f3c698613c982a8f0853438993ad8aaba06f9d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 3 11:50:30 2019 +0800

    configs: evb-px30: enable console info quiet
    
    Change-Id: I5952f1d2cef6fa9dd58bad36c51e578bf605737f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index b4474e6c40..a79d51a78a 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -18,6 +18,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y

commit dd1105ebc7bc06c087efca564059ad38eff2bc69
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 3 11:49:18 2019 +0800

    configs: rk3399pro: enable console info quiet
    
    Change-Id: I4d09d2b41a26018b854ce61f4cef0ed3125c153a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3399pro_defconfig b/configs/rk3399pro_defconfig
index e40c358946..4b6584a620 100644
--- a/configs/rk3399pro_defconfig
+++ b/configs/rk3399pro_defconfig
@@ -15,6 +15,7 @@ CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y

commit 3eb0877cf37ef558e036b3b9dbe2552638bcaeaa
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 3 11:47:28 2019 +0800

    configs: rk3328: enable console info quiet
    
    Change-Id: I0012247363f648d193c8b0c04cb531cf3a71e041
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index b80af6d33a..4582bc2272 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_RK3328=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_RKIMG_BOOTLOADER=y
@@ -17,8 +18,8 @@ CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_TPL_SYS_MALLOC_SIMPLE=y

commit 0f883fa147dcdf9c9f6fc49f856a9bb1d71d0498
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 3 11:46:37 2019 +0800

    configs: rk3326: enable console info quiet
    
    Change-Id: Ibaa941ad24b156e695b814fd23c5c53f9be977c4
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3326_defconfig b/configs/rk3326_defconfig
index 8e42cf208c..07e980c888 100644
--- a/configs/rk3326_defconfig
+++ b/configs/rk3326_defconfig
@@ -19,6 +19,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_ANDROID_AVB=y

commit 90861f5f07310f8e40fb492d0a1bc06edec39de1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 3 11:45:01 2019 +0800

    configs: rk3288: enable console info quiet
    
    Change-Id: I631d7a2b6bcf2ea74d024358e25780c993f607cd
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3288_defconfig b/configs/rk3288_defconfig
index c0e6284571..6d45fb2e1d 100644
--- a/configs/rk3288_defconfig
+++ b/configs/rk3288_defconfig
@@ -10,6 +10,7 @@ CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y

commit 65865b62fd9ffe16f032c1cc346b92c995eb056b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 3 11:44:07 2019 +0800

    configs: rk322x: enable console info quiet
    
    Change-Id: Iff5e7107f5fb49f06a0bccf916fcbf3ec492b619
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk322x_defconfig b/configs/rk322x_defconfig
index 4da83f994e..b44ab11b6e 100644
--- a/configs/rk322x_defconfig
+++ b/configs/rk322x_defconfig
@@ -20,6 +20,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set

commit 8782df0ad051f470c95c09a3ee1ccc5adff30e31
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 3 11:43:10 2019 +0800

    configs: rk3128x: enable console info quiet
    
    Change-Id: Ie48889885021500ecc9ac6b39eac70f6321f362b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3128x_defconfig b/configs/rk3128x_defconfig
index 16acb2a3d0..bb46b70399 100644
--- a/configs/rk3128x_defconfig
+++ b/configs/rk3128x_defconfig
@@ -21,6 +21,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_ANDROID_AVB=y

commit 90361fcc7d17c264ffe239fc81cd669dfb55ad31
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 3 11:36:25 2019 +0800

    configs: rk3368: enable console info quiet
    
    Change-Id: I3436bb3d543f1fdaee9cbfa196acdb710aa9856b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3368_defconfig b/configs/rk3368_defconfig
index 650d2a3805..80b4655ebc 100644
--- a/configs/rk3368_defconfig
+++ b/configs/rk3368_defconfig
@@ -8,6 +8,7 @@ CONFIG_TARGET_EVB_RK3368=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3368-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ARCH_EARLY_INIT_R=y
 CONFIG_ANDROID_BOOTLOADER=y

commit 69efcf85178fc7ad8f7400a40afdbf284f759d2a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 3 11:49:53 2019 +0800

    configs: evb-px30: update with make savedefconfig
    
    Change-Id: I87c57a57e52a4ec15970126eccd2a4c3d702e817
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 5b94dec8db..b4474e6c40 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -4,7 +4,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_PX30=y
-CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
@@ -17,7 +17,6 @@ CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y

commit e67896e28fe6831296e0db2b5fc71adb831a88b8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 3 11:45:53 2019 +0800

    configs: rk3326: update with make savedefconfig
    
    Change-Id: I8c1eaf014256023c95141f792e74366861628b52
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3326_defconfig b/configs/rk3326_defconfig
index 73b1b6d2c7..8e42cf208c 100644
--- a/configs/rk3326_defconfig
+++ b/configs/rk3326_defconfig
@@ -5,7 +5,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_PX30=y
 CONFIG_ROCKCHIP_RK3326=y
-CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
@@ -18,7 +18,6 @@ CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y

commit c1eaf5e1fb6aae13c1a2446aa98677241dd7b8c3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 3 11:42:29 2019 +0800

    configs: rk3128x: update with make savedefconfig
    
    Change-Id: I0067fb005d966120d5665732898cfac7d910ba36
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3128x_defconfig b/configs/rk3128x_defconfig
index bde55f9083..16acb2a3d0 100644
--- a/configs/rk3128x_defconfig
+++ b/configs/rk3128x_defconfig
@@ -8,8 +8,8 @@ CONFIG_TPL_TEXT_BASE=0x10081000
 CONFIG_TPL_MAX_SIZE=28672
 CONFIG_ROCKCHIP_RK322X=y
 CONFIG_ROCKCHIP_RK3128X=y
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
 CONFIG_TPL_STACK=0x10088000
-CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
@@ -20,7 +20,6 @@ CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
@@ -106,10 +105,10 @@ CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_HDMI=y
 CONFIG_ROCKCHIP_INNO_HDMI_PHY=y
-CONFIG_ROCKCHIP_DRM_TVE=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
+CONFIG_ROCKCHIP_DRM_TVE=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y

commit a422d7d9c7ca7c56f7aa3bef1b100a9946c6a35d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 3 11:02:53 2019 +0800

    configs: rk3368: remove unused modules to decrease size
    
    size: 767KB => 712KB
    
    Change-Id: Id16cc669574c031d578e2e793ba89cb68b48bbf9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3368_defconfig b/configs/rk3368_defconfig
index 485b82e5fd..650d2a3805 100644
--- a/configs/rk3368_defconfig
+++ b/configs/rk3368_defconfig
@@ -1,10 +1,10 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x1000
-CONFIG_TARGET_EVB_RK3368=y
 CONFIG_ROCKCHIP_RK3368=y
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_TARGET_EVB_RK3368=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3368-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_BOOTDELAY=0
@@ -17,16 +17,28 @@ CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_FASTBOOT_OEM_UNLOCK=y
 CONFIG_CMD_DTIMG=y
+# CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_LZMADEC is not set
+# CONFIG_CMD_UNZIP is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
 CONFIG_CMD_GPT=y
-CONFIG_CMD_LOAD_ANDROID=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_ECHO is not set
+# CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_NET is not set
+# CONFIG_CMD_MISC is not set
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
 CONFIG_RKPARM_PARTITION=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
@@ -85,6 +97,7 @@ CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_ERRNO_STR=y
 CONFIG_OF_LIBFDT_OVERLAY=y
+# CONFIG_EFI_LOADER is not set
 CONFIG_OPTEE_CLIENT=y
 CONFIG_OPTEE_V1=y
 CONFIG_TEST_ROCKCHIP=y

commit 64e35efeb205dcd532fbbea52215d128ea650110
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Jan 2 15:19:12 2019 +0800

    rockchip: boot_mode: fix usb vbus check value
    
    rockchip_u2phy_vbus_detect() may return negative number when driver
    not implemented, only positive number means vbus available.
    
    Change-Id: I06e9b36c7bbcdbb097abe204f4ff0318541ea869
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index 8a217fc0c5..3261d0f65c 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -178,7 +178,7 @@ void rockchip_dnl_mode_check(void)
 {
 	if (rockchip_dnl_key_pressed()) {
 		printf("download key pressed... ");
-		if (rockchip_u2phy_vbus_detect()) {
+		if (rockchip_u2phy_vbus_detect() > 0) {
 			printf("entering download mode...\n");
 			/* If failed, we fall back to bootrom download mode */
 			run_command_list("rockusb 0 ${devtype} ${devnum}", -1, 0);

commit aa094d464ab871c9005e3f7541d765f863c0c48c
Author: Shengfei Xu <xsf@rock-chips.com>
Date:   Sat Dec 29 19:15:54 2018 +0800

    rockchip: configs: rk3399pro: add fuel_gauge rk809/rk817
    
    Change-Id: I276520ed7962651c498aa7151405eed0318653ce
    Signed-off-by: Shengfei Xu <xsf@rock-chips.com>

diff --git a/configs/rk3399pro_defconfig b/configs/rk3399pro_defconfig
index c31ef8b9a3..e40c358946 100644
--- a/configs/rk3399pro_defconfig
+++ b/configs/rk3399pro_defconfig
@@ -71,7 +71,7 @@ CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
-CONFIG_POWER_FG_RK818=y
+CONFIG_POWER_FG_RK817=y
 CONFIG_IO_DOMAIN=y
 CONFIG_ROCKCHIP_IO_DOMAIN=y
 CONFIG_DM_PMIC=y

commit 25b06c45e8cff36d036241da7456232cdbc60550
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Thu Dec 27 09:43:12 2018 +0800

    drm/rockchip: vop: use win1 for ui instead of win0 in px30 vopb.
    
    PX30 vopb have win0, win1 and win2 layers.the formats they support below:
    Win0:   XR24 AR24 XB24 AB24 RG24 BG24 RG16 BG16 NV12 NV16 NV24 NA12 NA16 NA24
    Win1/2: XR24 AR24 XB24 AB24 RG24 BG24 RG16 BG16
    
    Only the win0 layer support NV12 format(video decode format).
    So change to use win0 for video overlay layer and win1 for ui layer.
    
    Change-Id: I4cb0b6e46a8f9d34231b776d795e415a7fe7fe6a
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index b0fa315537..669f028c67 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -586,7 +586,7 @@ const struct vop_data px30_vop_big = {
 	.max_output = {1920, 1080},
 	.ctrl = &px30_ctrl_data,
 	.grf_ctrl = &px30_grf_ctrl,
-	.win = &rk3366_win0_data,
+	.win = &rk3366_win1_data,
 	.line_flag = &rk3366_vop_lite_line_flag,
 	.reg_len = RK3366_LIT_FRC_LOWER01_0 * 4,
 };

commit a47573024612fff263a221e9d354c32d693670db
Author: Zorro Liu <lyx@rock-chips.com>
Date:   Thu Jan 3 10:36:08 2019 +0800

    configs: rk3368: enable fdt overlay default
    
    Change-Id: I2d4bc66b3f02643265edb46bf4a1b850d9b825e6
    Signed-off-by: Zorro Liu <lyx@rock-chips.com>

diff --git a/configs/rk3368_defconfig b/configs/rk3368_defconfig
index e3f6af0e3f..485b82e5fd 100644
--- a/configs/rk3368_defconfig
+++ b/configs/rk3368_defconfig
@@ -16,6 +16,7 @@ CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_FASTBOOT_OEM_UNLOCK=y
+CONFIG_CMD_DTIMG=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
 CONFIG_CMD_LOAD_ANDROID=y
@@ -83,6 +84,7 @@ CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_ERRNO_STR=y
+CONFIG_OF_LIBFDT_OVERLAY=y
 CONFIG_OPTEE_CLIENT=y
 CONFIG_OPTEE_V1=y
 CONFIG_TEST_ROCKCHIP=y

commit 67c90ac35087c8c0774861fe48b130a77f20a86e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 3 10:31:06 2019 +0800

    android: include fdt_support.h file
    
    fix compile error when enable fdt overlay
    
    Change-Id: I283ef3cd44aeb6c64f3362907fcc399919401345
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 710bff8602..919b2fcbf5 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -15,6 +15,7 @@
 #include <dt_table.h>
 #include <image-android-dt.h>
 #include <malloc.h>
+#include <fdt_support.h>
 #include <fs.h>
 #include <boot_rkimg.h>
 #include <attestation_key.h>

commit b2a1587371092f5374eb11600b03075592aed4ca
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 2 11:22:18 2019 +0800

    lib: avb: add more help info for AVB_VBMETA_PUBLIC_KEY_VALIDATE
    
    Change-Id: I2c63850244983144a6b5ac8303f1debc7a37cb2a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/lib/avb/libavb_user/Kconfig b/lib/avb/libavb_user/Kconfig
index 8107902213..c9a8da265a 100755
--- a/lib/avb/libavb_user/Kconfig
+++ b/lib/avb/libavb_user/Kconfig
@@ -10,7 +10,12 @@ config AVB_VBMETA_PUBLIC_KEY_VALIDATE
         bool "Support vbmeta public key validate"
         depends on AVB_LIBAVB_USER
         help
-          support vbmeta public key validate.
+          support vbmeta public key validate, system bootflow would be
+          uninterruptale when it is enabled:
+            - only allow "boot_android" as bootcmd;
+            - enter rockusb or fastboot when boot failed;
+            - not allow ctrl+c to enter hush;
+          only the CONFIG_BOOTDELAY can interrupt the bootflow.
 
 config SPL_AVB_LIBAVB_USER
 	bool "Android AVB read/write hardware for spl"

commit fb950b786c00c5c3f31c2207a3a5e6979914ab83
Author: William Wu <william.wu@rock-chips.com>
Date:   Sat Dec 29 11:29:17 2018 +0800

    rockchip: config: add usb2 phy config for rk3399
    
    This patch enable USB 2.0 PHY driver for rk3399 USB ports.
    With this patch, it can support PHY init, PHY tuning and
    Charge Type detect.
    
    Change-Id: I3433030d5dc16615d11b16a57cf1b24b2e3700d4
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
index f95ff9d16b..df2cbecf04 100644
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -76,6 +76,8 @@ CONFIG_MMC_SDHCI_ROCKCHIP=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y

commit 84f12a439f2564e9f75fce78f41c70e56af3c4d9
Author: William Wu <william.wu@rock-chips.com>
Date:   Sat Dec 29 11:25:53 2018 +0800

    phy: phy-rockchip-inno-usb2: add support for rk3399
    
    This patch adds rk3399 USB 2.0 PHY0 and PHY1 configurations
    for VBUS detect and Charge Type detect.
    
    Change-Id: If520c3aae1b3aa2165590e3d3b1da1ab9f67b7f6
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index 2206681f35..841b7385b6 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -821,6 +821,104 @@ static const struct rockchip_usb2phy_cfg rk3368_phy_cfgs[] = {
 	{ /* sentinel */ }
 };
 
+static const struct rockchip_usb2phy_cfg rk3399_phy_cfgs[] = {
+	{
+		.reg		= 0xe450,
+		.num_ports	= 2,
+		.clkout_ctl	= { 0xe450, 4, 4, 1, 0 },
+		.port_cfgs	= {
+			[USB2PHY_PORT_OTG] = {
+				.phy_sus = { 0xe454, 8, 0, 0x052, 0x1d1 },
+				.bvalid_det_en	= { 0xe3c0, 3, 3, 0, 1 },
+				.bvalid_det_st	= { 0xe3e0, 3, 3, 0, 1 },
+				.bvalid_det_clr	= { 0xe3d0, 3, 3, 0, 1 },
+				.idfall_det_en	= { 0xe3c0, 5, 5, 0, 1 },
+				.idfall_det_st	= { 0xe3e0, 5, 5, 0, 1 },
+				.idfall_det_clr	= { 0xe3d0, 5, 5, 0, 1 },
+				.idrise_det_en	= { 0xe3c0, 4, 4, 0, 1 },
+				.idrise_det_st	= { 0xe3e0, 4, 4, 0, 1 },
+				.idrise_det_clr	= { 0xe3d0, 4, 4, 0, 1 },
+				.ls_det_en	= { 0xe3c0, 2, 2, 0, 1 },
+				.ls_det_st	= { 0xe3e0, 2, 2, 0, 1 },
+				.ls_det_clr	= { 0xe3d0, 2, 2, 0, 1 },
+				.utmi_avalid	= { 0xe2ac, 7, 7, 0, 1 },
+				.utmi_bvalid	= { 0xe2ac, 12, 12, 0, 1 },
+				.utmi_iddig	= { 0xe2ac, 8, 8, 0, 1 },
+				.utmi_ls	= { 0xe2ac, 14, 13, 0, 1 },
+				.vbus_det_en    = { 0x449c, 15, 15, 1, 0 },
+			},
+			[USB2PHY_PORT_HOST] = {
+				.phy_sus	= { 0xe458, 1, 0, 0x2, 0x1 },
+				.ls_det_en	= { 0xe3c0, 6, 6, 0, 1 },
+				.ls_det_st	= { 0xe3e0, 6, 6, 0, 1 },
+				.ls_det_clr	= { 0xe3d0, 6, 6, 0, 1 },
+				.utmi_ls	= { 0xe2ac, 22, 21, 0, 1 },
+				.utmi_hstdet	= { 0xe2ac, 23, 23, 0, 1 }
+			}
+		},
+		.chg_det = {
+			.opmode		= { 0xe454, 3, 0, 5, 1 },
+			.cp_det		= { 0xe2ac, 2, 2, 0, 1 },
+			.dcp_det	= { 0xe2ac, 1, 1, 0, 1 },
+			.dp_det		= { 0xe2ac, 0, 0, 0, 1 },
+			.idm_sink_en	= { 0xe450, 8, 8, 0, 1 },
+			.idp_sink_en	= { 0xe450, 7, 7, 0, 1 },
+			.idp_src_en	= { 0xe450, 9, 9, 0, 1 },
+			.rdm_pdwn_en	= { 0xe450, 10, 10, 0, 1 },
+			.vdm_src_en	= { 0xe450, 12, 12, 0, 1 },
+			.vdp_src_en	= { 0xe450, 11, 11, 0, 1 },
+		},
+	},
+	{
+		.reg		= 0xe460,
+		.num_ports	= 2,
+		.clkout_ctl	= { 0xe460, 4, 4, 1, 0 },
+		.port_cfgs	= {
+			[USB2PHY_PORT_OTG] = {
+				.phy_sus = { 0xe464, 8, 0, 0x052, 0x1d1 },
+				.bvalid_det_en  = { 0xe3c0, 8, 8, 0, 1 },
+				.bvalid_det_st  = { 0xe3e0, 8, 8, 0, 1 },
+				.bvalid_det_clr = { 0xe3d0, 8, 8, 0, 1 },
+				.idfall_det_en	= { 0xe3c0, 10, 10, 0, 1 },
+				.idfall_det_st	= { 0xe3e0, 10, 10, 0, 1 },
+				.idfall_det_clr	= { 0xe3d0, 10, 10, 0, 1 },
+				.idrise_det_en	= { 0xe3c0, 9, 9, 0, 1 },
+				.idrise_det_st	= { 0xe3e0, 9, 9, 0, 1 },
+				.idrise_det_clr	= { 0xe3d0, 9, 9, 0, 1 },
+				.ls_det_en	= { 0xe3c0, 7, 7, 0, 1 },
+				.ls_det_st	= { 0xe3e0, 7, 7, 0, 1 },
+				.ls_det_clr	= { 0xe3d0, 7, 7, 0, 1 },
+				.utmi_avalid	= { 0xe2ac, 10, 10, 0, 1 },
+				.utmi_bvalid    = { 0xe2ac, 16, 16, 0, 1 },
+				.utmi_iddig	= { 0xe2ac, 11, 11, 0, 1 },
+				.utmi_ls	= { 0xe2ac, 18, 17, 0, 1 },
+				.vbus_det_en    = { 0x451c, 15, 15, 1, 0 },
+			},
+			[USB2PHY_PORT_HOST] = {
+				.phy_sus	= { 0xe468, 1, 0, 0x2, 0x1 },
+				.ls_det_en	= { 0xe3c0, 11, 11, 0, 1 },
+				.ls_det_st	= { 0xe3e0, 11, 11, 0, 1 },
+				.ls_det_clr	= { 0xe3d0, 11, 11, 0, 1 },
+				.utmi_ls	= { 0xe2ac, 26, 25, 0, 1 },
+				.utmi_hstdet	= { 0xe2ac, 27, 27, 0, 1 }
+			}
+		},
+		.chg_det = {
+			.opmode		= { 0xe464, 3, 0, 5, 1 },
+			.cp_det		= { 0xe2ac, 5, 5, 0, 1 },
+			.dcp_det	= { 0xe2ac, 4, 4, 0, 1 },
+			.dp_det		= { 0xe2ac, 3, 3, 0, 1 },
+			.idm_sink_en	= { 0xe460, 8, 8, 0, 1 },
+			.idp_sink_en	= { 0xe460, 7, 7, 0, 1 },
+			.idp_src_en	= { 0xe460, 9, 9, 0, 1 },
+			.rdm_pdwn_en	= { 0xe460, 10, 10, 0, 1 },
+			.vdm_src_en	= { 0xe460, 12, 12, 0, 1 },
+			.vdp_src_en	= { 0xe460, 11, 11, 0, 1 },
+		},
+	},
+	{ /* sentinel */ }
+};
+
 static const struct rockchip_usb2phy_cfg rv1108_phy_cfgs[] = {
 	{
 		.reg = 0x100,
@@ -870,6 +968,7 @@ static const struct udevice_id rockchip_usb2phy_ids[] = {
 	{ .compatible = "rockchip,rk3308-usb2phy", .data = (ulong)&rk3328_phy_cfgs },
 	{ .compatible = "rockchip,rk3328-usb2phy", .data = (ulong)&rk3328_phy_cfgs },
 	{ .compatible = "rockchip,rk3368-usb2phy", .data = (ulong)&rk3368_phy_cfgs },
+	{ .compatible = "rockchip,rk3399-usb2phy", .data = (ulong)&rk3399_phy_cfgs },
 	{ .compatible = "rockchip,rv1108-usb2phy", .data = (ulong)&rv1108_phy_cfgs },
 	{ }
 };

commit 70363fd81228657b604f3e8d804155004434a28c
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Thu Dec 27 04:17:26 2018 -0800

    drivers: rkflash: add hash check to map block and vpc block
    
    1.If the validation fails, the data is discarded and the data is
    restored to avoid the abnormal data written when the power lost
    leading to system crash.
    
    Change-Id: I12713b5b6aa01d592d126db4991af679e26b9828
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/rk_sftl_arm_v7.S b/drivers/rkflash/rk_sftl_arm_v7.S
index a46a097bf8..294e85db8e 100644
--- a/drivers/rkflash/rk_sftl_arm_v7.S
+++ b/drivers/rkflash/rk_sftl_arm_v7.S
@@ -2,7 +2,7 @@
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:    GPL-2.0
- * date: 2018-11-29
+ * date: 2018-12-27
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -547,45 +547,6 @@ FtlBbtInfoPrint:
 	@ link register save eliminated.
 	bx	lr
 	.size	FtlBbtInfoPrint, .-FtlBbtInfoPrint
-	.section	.text.FtlBbtCalcTotleCnt,"ax",%progbits
-	.align	1
-	.global	FtlBbtCalcTotleCnt
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlBbtCalcTotleCnt, %function
-FtlBbtCalcTotleCnt:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L54
-	ldr	r2, .L54+4
-	push	{r4, r5, r6, lr}
-	movs	r5, #0
-	ldrh	r3, [r3]
-	mov	r4, r5
-	ldrh	r6, [r2]
-	muls	r6, r3, r6
-.L48:
-	uxth	r0, r5
-	cmp	r0, r6
-	blt	.L50
-	mov	r0, r4
-	pop	{r4, r5, r6, pc}
-.L50:
-	bl	FtlBbmIsBadBlock
-	cbz	r0, .L49
-	adds	r4, r4, #1
-	uxth	r4, r4
-.L49:
-	adds	r5, r5, #1
-	b	.L48
-.L55:
-	.align	2
-.L54:
-	.word	.LANCHOR17
-	.word	.LANCHOR10
-	.size	FtlBbtCalcTotleCnt, .-FtlBbtCalcTotleCnt
 	.section	.text.V2P_block,"ax",%progbits
 	.align	1
 	.global	V2P_block
@@ -599,12 +560,12 @@ V2P_block:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r5, r1
-	ldr	r3, .L57
+	ldr	r3, .L48
 	mov	r7, r0
 	ldrh	r6, [r3]
 	mov	r1, r6
 	bl	__aeabi_uidiv
-	ldr	r3, .L57+4
+	ldr	r3, .L48+4
 	smulbb	r5, r6, r5
 	mov	r1, r6
 	ldrh	r4, [r3]
@@ -615,9 +576,9 @@ V2P_block:
 	add	r0, r0, r4
 	uxth	r0, r0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L58:
+.L49:
 	.align	2
-.L57:
+.L48:
 	.word	.LANCHOR11
 	.word	.LANCHOR17
 	.size	V2P_block, .-V2P_block
@@ -632,11 +593,11 @@ V2P_block:
 P2V_plane:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L60
+	ldr	r3, .L51
 	push	{r4, r5, r6, lr}
 	mov	r6, r0
 	ldrh	r5, [r3]
-	ldr	r3, .L60+4
+	ldr	r3, .L51+4
 	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
 	smulbb	r4, r0, r5
@@ -646,9 +607,9 @@ P2V_plane:
 	add	r1, r1, r4
 	uxth	r0, r1
 	pop	{r4, r5, r6, pc}
-.L61:
+.L52:
 	.align	2
-.L60:
+.L51:
 	.word	.LANCHOR11
 	.word	.LANCHOR17
 	.size	P2V_plane, .-P2V_plane
@@ -664,18 +625,18 @@ P2V_block_in_plane:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L63
+	ldr	r3, .L54
 	ldrh	r1, [r3]
 	bl	__aeabi_uidivmod
-	ldr	r3, .L63+4
+	ldr	r3, .L54+4
 	uxth	r0, r1
 	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
 	uxth	r0, r0
 	pop	{r3, pc}
-.L64:
+.L55:
 	.align	2
-.L63:
+.L54:
 	.word	.LANCHOR17
 	.word	.LANCHOR11
 	.size	P2V_block_in_plane, .-P2V_block_in_plane
@@ -692,14 +653,14 @@ ftl_cmp_data_ver:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	cmp	r0, r1
-	bls	.L66
+	bls	.L57
 	subs	r0, r0, r1
 	cmp	r0, #-2147483648
 	ite	hi
 	movhi	r0, #0
 	movls	r0, #1
 	bx	lr
-.L66:
+.L57:
 	subs	r0, r1, r0
 	cmp	r0, #-2147483648
 	ite	ls
@@ -719,14 +680,14 @@ FtlFreeSysBlkQueueEmpty:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L69
+	ldr	r3, .L60
 	ldrh	r0, [r3, #6]
 	clz	r0, r0
 	lsrs	r0, r0, #5
 	bx	lr
-.L70:
+.L61:
 	.align	2
-.L69:
+.L60:
 	.word	.LANCHOR38
 	.size	FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty
 	.section	.text.FtlFreeSysBlkQueueFull,"ax",%progbits
@@ -741,15 +702,15 @@ FtlFreeSysBlkQueueFull:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L72
+	ldr	r3, .L63
 	ldrh	r0, [r3, #6]
 	sub	r3, r0, #1024
 	rsbs	r0, r3, #0
 	adcs	r0, r0, r3
 	bx	lr
-.L73:
+.L64:
 	.align	2
-.L72:
+.L63:
 	.word	.LANCHOR38
 	.size	FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull
 	.section	.text.FtlFreeSysBLkSort,"ax",%progbits
@@ -763,28 +724,28 @@ FtlFreeSysBlkQueueFull:
 FtlFreeSysBLkSort:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L83
+	ldr	r3, .L74
 	push	{r4, r5, r6, lr}
 	ldrh	r2, [r3, #6]
-	cbz	r2, .L74
-	ldr	r2, .L83+4
+	cbz	r2, .L65
+	ldr	r2, .L74+4
 	movs	r6, #0
 	ldrh	r1, [r3, #2]
 	mov	r5, r6
 	ldrh	r4, [r2, #28]
 	ldrh	r2, [r3, #4]
 	and	r4, r4, #31
-.L76:
+.L67:
 	uxth	r0, r6
 	adds	r6, r6, #1
 	cmp	r4, r0
-	bgt	.L77
-	cbz	r5, .L74
+	bgt	.L68
+	cbz	r5, .L65
 	strh	r1, [r3, #2]	@ movhi
 	strh	r2, [r3, #4]	@ movhi
-.L74:
+.L65:
 	pop	{r4, r5, r6, pc}
-.L77:
+.L68:
 	adds	r0, r1, #4
 	adds	r1, r1, #1
 	ldrh	r5, [r3, r0, lsl #1]
@@ -794,10 +755,10 @@ FtlFreeSysBLkSort:
 	movs	r5, #1
 	add	r2, r2, r5
 	ubfx	r2, r2, #0, #10
-	b	.L76
-.L84:
+	b	.L67
+.L75:
 	.align	2
-.L83:
+.L74:
 	.word	.LANCHOR38
 	.word	.LANCHOR39
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
@@ -812,34 +773,34 @@ FtlFreeSysBLkSort:
 IsInFreeQueue:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L91
+	ldr	r3, .L82
 	push	{r4, r5, lr}
 	ldrh	r4, [r3, #6]
 	cmp	r4, #1024
-	beq	.L89
+	beq	.L80
 	ldrh	r5, [r3, #2]
 	movs	r1, #0
-.L87:
+.L78:
 	cmp	r1, r4
-	bcc	.L88
-.L89:
+	bcc	.L79
+.L80:
 	movs	r0, #0
 	pop	{r4, r5, pc}
-.L88:
+.L79:
 	adds	r2, r1, r5
 	ubfx	r2, r2, #0, #10
 	adds	r2, r2, #4
 	ldrh	r2, [r3, r2, lsl #1]
 	cmp	r2, r0
-	beq	.L90
+	beq	.L81
 	adds	r1, r1, #1
-	b	.L87
-.L90:
+	b	.L78
+.L81:
 	movs	r0, #1
 	pop	{r4, r5, pc}
-.L92:
+.L83:
 	.align	2
-.L91:
+.L82:
 	.word	.LANCHOR38
 	.size	IsInFreeQueue, .-IsInFreeQueue
 	.section	.text.insert_data_list,"ax",%progbits
@@ -854,11 +815,11 @@ insert_data_list:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L109
+	ldr	r3, .L100
 	ldrh	lr, [r3]
 	cmp	lr, r0
-	bls	.L95
-	ldr	r3, .L109+4
+	bls	.L86
+	ldr	r3, .L100+4
 	movs	r5, #6
 	ldr	r4, [r3]
 	mul	r3, r5, r0
@@ -868,102 +829,102 @@ insert_data_list:
 	movw	r3, #65535
 	strh	r3, [r1, #2]	@ movhi
 	strh	r3, [r4, r2]	@ movhi
-	ldr	r3, .L109+8
+	ldr	r3, .L100+8
 	ldr	ip, [r3]
 	cmp	ip, #0
-	bne	.L96
-.L108:
+	bne	.L87
+.L99:
 	str	r1, [r3]
-.L95:
+.L86:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L96:
-	ldr	r3, .L109+12
+.L87:
+	ldr	r3, .L100+12
 	lsls	r2, r0, #1
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
 	ldrh	r6, [r3, r0, lsl #1]
 	ldrh	r3, [r1, #4]
-	cbz	r3, .L106
+	cbz	r3, .L97
 	mul	fp, r3, r6
-.L97:
+.L88:
 	sub	r3, ip, r4
 	asrs	r6, r3, #1
-	ldr	r3, .L109+16
+	ldr	r3, .L100+16
 	muls	r3, r6, r3
-	ldr	r6, .L109+20
+	ldr	r6, .L100+20
 	ldr	r8, [r6]
 	movs	r6, #0
 	uxth	r3, r3
 	add	r2, r8, r2
 	str	r2, [sp, #12]
 	mov	r2, ip
-.L104:
+.L95:
 	adds	r6, r6, #1
 	uxth	r6, r6
 	cmp	lr, r6
-	bcc	.L95
+	bcc	.L86
 	cmp	r3, r0
-	beq	.L95
+	beq	.L86
 	ldr	r7, [sp, #8]
 	lsl	r10, r3, #1
 	ldrh	r7, [r7, r3, lsl #1]
 	mov	r5, r7
 	ldrh	r7, [r2, #4]
-	cbz	r7, .L107
+	cbz	r7, .L98
 	muls	r7, r5, r7
-.L99:
+.L90:
 	cmp	fp, r7
-	bne	.L100
+	bne	.L91
 	ldr	r5, [sp, #12]
 	ldrh	r10, [r8, r10]
 	ldrh	r7, [r5]
 	cmp	r10, r7
-	bcc	.L102
-.L101:
+	bcc	.L93
+.L92:
 	ldr	r5, [sp, #4]
 	cmp	r2, ip
 	strh	r3, [r4, r5]	@ movhi
 	ldrh	r3, [r2, #2]
 	strh	r3, [r1, #2]	@ movhi
-	bne	.L105
+	bne	.L96
 	strh	r0, [r2, #2]	@ movhi
-	ldr	r3, .L109+8
-	b	.L108
-.L106:
+	ldr	r3, .L100+8
+	b	.L99
+.L97:
 	mov	fp, #-1
-	b	.L97
-.L107:
+	b	.L88
+.L98:
 	mov	r7, #-1
-	b	.L99
-.L100:
-	bcc	.L101
-.L102:
+	b	.L90
+.L91:
+	bcc	.L92
+.L93:
 	ldrh	r7, [r2]
 	movw	r5, #65535
 	cmp	r7, r5
-	bne	.L103
+	bne	.L94
 	strh	r3, [r1, #2]	@ movhi
 	strh	r0, [r2]	@ movhi
-	ldr	r3, .L109+24
-	b	.L108
-.L103:
+	ldr	r3, .L100+24
+	b	.L99
+.L94:
 	movs	r3, #6
 	mla	r2, r3, r7, r4
 	mov	r3, r7
-	b	.L104
-.L105:
+	b	.L95
+.L96:
 	ldrh	r1, [r2, #2]
 	movs	r3, #6
 	muls	r3, r1, r3
 	strh	r0, [r4, r3]	@ movhi
 	strh	r0, [r2, #2]	@ movhi
-	b	.L95
-.L110:
+	b	.L86
+.L101:
 	.align	2
-.L109:
+.L100:
 	.word	.LANCHOR5
 	.word	.LANCHOR40
 	.word	.LANCHOR41
@@ -985,25 +946,25 @@ INSERT_DATA_LIST:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	insert_data_list
-	ldr	r2, .L113
+	ldr	r2, .L104
 	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L113+4
+	ldr	r2, .L104+4
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bcs	.L111
+	bcs	.L102
 	movs	r2, #214
-	ldr	r1, .L113+8
-	ldr	r0, .L113+12
+	ldr	r1, .L104+8
+	ldr	r0, .L104+12
 	pop	{r3, lr}
 	b	printf
-.L111:
+.L102:
 	pop	{r3, pc}
-.L114:
+.L105:
 	.align	2
-.L113:
+.L104:
 	.word	.LANCHOR45
 	.word	.LANCHOR5
 	.word	.LANCHOR46
@@ -1023,48 +984,48 @@ insert_free_list:
 	movw	r1, #65535
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	cmp	r0, r1
-	beq	.L116
-	ldr	r3, .L122
+	beq	.L107
+	ldr	r3, .L113
 	mov	r10, #6
 	mul	r7, r10, r0
 	ldr	r4, [r3]
-	ldr	r3, .L122+4
+	ldr	r3, .L113+4
 	adds	r5, r4, r7
 	ldr	r6, [r3]
 	mov	lr, r3
 	strh	r1, [r5, #2]	@ movhi
 	strh	r1, [r4, r7]	@ movhi
-	cbnz	r6, .L117
+	cbnz	r6, .L108
 	str	r5, [r3]
-.L116:
+.L107:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L117:
-	ldr	r3, .L122+8
+.L108:
+	ldr	r3, .L113+8
 	subs	r2, r6, r4
 	mov	fp, r1
 	ldr	ip, [r3]
 	asrs	r3, r2, #1
-	ldr	r2, .L122+12
+	ldr	r2, .L113+12
 	ldrh	r8, [ip, r0, lsl #1]
 	muls	r2, r3, r2
 	mov	r3, r6
 	uxth	r2, r2
-.L120:
+.L111:
 	ldrh	r1, [ip, r2, lsl #1]
 	cmp	r1, r8
-	bcs	.L118
+	bcs	.L109
 	ldrh	r1, [r3]
 	cmp	r1, fp
-	bne	.L119
+	bne	.L110
 	strh	r2, [r5, #2]	@ movhi
 	strh	r0, [r3]	@ movhi
-	b	.L116
-.L119:
+	b	.L107
+.L110:
 	mla	r3, r10, r1, r4
 	mov	r2, r1
-	b	.L120
-.L118:
+	b	.L111
+.L109:
 	ldrh	r1, [r3, #2]
 	cmp	r3, r6
 	strh	r1, [r5, #2]	@ movhi
@@ -1079,10 +1040,10 @@ insert_free_list:
 	itt	ne
 	strhne	r0, [r4, r2]	@ movhi
 	strhne	r0, [r3, #2]	@ movhi
-	b	.L116
-.L123:
+	b	.L107
+.L114:
 	.align	2
-.L122:
+.L113:
 	.word	.LANCHOR40
 	.word	.LANCHOR47
 	.word	.LANCHOR43
@@ -1101,25 +1062,25 @@ INSERT_FREE_LIST:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	insert_free_list
-	ldr	r2, .L126
+	ldr	r2, .L117
 	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L126+4
+	ldr	r2, .L117+4
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bcs	.L124
+	bcs	.L115
 	movs	r2, #207
-	ldr	r1, .L126+8
-	ldr	r0, .L126+12
+	ldr	r1, .L117+8
+	ldr	r0, .L117+12
 	pop	{r3, lr}
 	b	printf
-.L124:
+.L115:
 	pop	{r3, pc}
-.L127:
+.L118:
 	.align	2
-.L126:
+.L117:
 	.word	.LANCHOR48
 	.word	.LANCHOR5
 	.word	.LANCHOR49
@@ -1138,7 +1099,7 @@ List_remove_node:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r6, #6
-	ldr	r5, .L134
+	ldr	r5, .L125
 	muls	r6, r1, r6
 	movw	r3, #65535
 	mov	r8, r0
@@ -1146,20 +1107,20 @@ List_remove_node:
 	adds	r4, r7, r6
 	ldrh	r2, [r4, #2]
 	cmp	r2, r3
-	bne	.L129
+	bne	.L120
 	ldr	r3, [r0]
 	cmp	r4, r3
-	beq	.L129
+	beq	.L120
 	mov	r2, #372
-	ldr	r1, .L134+4
-	ldr	r0, .L134+8
+	ldr	r1, .L125+4
+	ldr	r0, .L125+8
 	bl	printf
-.L129:
+.L120:
 	ldr	r3, [r8]
 	movw	r1, #65535
 	cmp	r4, r3
 	ldrh	r3, [r7, r6]
-	bne	.L130
+	bne	.L121
 	cmp	r3, r1
 	ittee	ne
 	ldrne	r0, [r5]
@@ -1170,24 +1131,24 @@ List_remove_node:
 	mlane	r3, r2, r3, r0
 	strne	r3, [r8]
 	strhne	r1, [r3, #2]	@ movhi
-.L132:
+.L123:
 	movw	r3, #65535
 	movs	r0, #0
 	strh	r3, [r7, r6]	@ movhi
 	strh	r3, [r4, #2]	@ movhi
 	pop	{r4, r5, r6, r7, r8, pc}
-.L130:
+.L121:
 	cmp	r3, r1
 	ldrh	r1, [r4, #2]
-	bne	.L133
+	bne	.L124
 	cmp	r1, r3
-	beq	.L132
+	beq	.L123
 	movs	r2, #6
 	ldr	r0, [r5]
 	muls	r1, r2, r1
 	strh	r3, [r0, r1]	@ movhi
-	b	.L132
-.L133:
+	b	.L123
+.L124:
 	ldr	r0, [r5]
 	movs	r2, #6
 	mla	r5, r2, r3, r0
@@ -1195,10 +1156,10 @@ List_remove_node:
 	ldrh	r1, [r4, #2]
 	muls	r2, r1, r2
 	strh	r3, [r0, r2]	@ movhi
-	b	.L132
-.L135:
+	b	.L123
+.L126:
 	.align	2
-.L134:
+.L125:
 	.word	.LANCHOR40
 	.word	.LANCHOR50
 	.word	.LC1
@@ -1216,15 +1177,15 @@ List_pop_index_node:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	ldr	r3, [r0]
 	push	{r4, r5, r6, lr}
-	cbz	r3, .L142
-	ldr	r2, .L143
+	cbz	r3, .L133
+	ldr	r2, .L134
 	movw	r5, #65535
 	movs	r6, #6
 	ldr	r2, [r2]
-.L138:
-	cbnz	r1, .L139
-.L141:
-	ldr	r4, .L143+4
+.L129:
+	cbnz	r1, .L130
+.L132:
+	ldr	r4, .L134+4
 	subs	r3, r3, r2
 	asrs	r3, r3, #1
 	muls	r4, r3, r4
@@ -1232,20 +1193,20 @@ List_pop_index_node:
 	bl	List_remove_node
 	uxth	r0, r4
 	pop	{r4, r5, r6, pc}
-.L139:
+.L130:
 	ldrh	r4, [r3]
 	cmp	r4, r5
-	beq	.L141
+	beq	.L132
 	subs	r1, r1, #1
 	mla	r3, r6, r4, r2
 	uxth	r1, r1
-	b	.L138
-.L142:
+	b	.L129
+.L133:
 	movw	r0, #65535
 	pop	{r4, r5, r6, pc}
-.L144:
+.L135:
 	.align	2
-.L143:
+.L134:
 	.word	.LANCHOR40
 	.word	-1431655765
 	.size	List_pop_index_node, .-List_pop_index_node
@@ -1275,37 +1236,37 @@ List_pop_head_node:
 List_get_gc_head_node:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L152
+	ldr	r3, .L143
 	push	{r4, lr}
 	ldr	r3, [r3]
-	cbz	r3, .L151
-	ldr	r2, .L152+4
+	cbz	r3, .L142
+	ldr	r2, .L143+4
 	movs	r4, #6
 	ldr	r1, [r2]
 	movw	r2, #65535
-.L148:
-	cbz	r0, .L149
+.L139:
+	cbz	r0, .L140
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bne	.L150
-.L151:
+	bne	.L141
+.L142:
 	movw	r0, #65535
 	pop	{r4, pc}
-.L150:
+.L141:
 	subs	r0, r0, #1
 	mla	r3, r4, r3, r1
 	uxth	r0, r0
-	b	.L148
-.L149:
-	ldr	r0, .L152+8
+	b	.L139
+.L140:
+	ldr	r0, .L143+8
 	subs	r3, r3, r1
 	asrs	r3, r3, #1
 	muls	r3, r0, r3
 	uxth	r0, r3
 	pop	{r4, pc}
-.L153:
+.L144:
 	.align	2
-.L152:
+.L143:
 	.word	.LANCHOR41
 	.word	.LANCHOR40
 	.word	-1431655765
@@ -1321,61 +1282,61 @@ List_get_gc_head_node:
 List_update_data_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L165
+	ldr	r3, .L156
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L156
-	ldr	r3, .L165+4
+	beq	.L147
+	ldr	r3, .L156+4
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L156
-	ldr	r3, .L165+8
+	beq	.L147
+	ldr	r3, .L156+8
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L156
-	ldr	r7, .L165+12
+	beq	.L147
+	ldr	r7, .L156+12
 	movs	r6, #6
-	ldr	r3, .L165+16
+	ldr	r3, .L156+16
 	muls	r6, r0, r6
 	ldr	fp, [r7]
 	ldr	r3, [r3]
 	add	r10, fp, r6
 	cmp	r10, r3
-	beq	.L156
-	ldr	r3, .L165+20
+	beq	.L147
+	ldr	r3, .L156+20
 	ldrh	r5, [r10, #4]
 	ldr	r2, [r3]
 	mov	r8, r3
 	ldrh	r2, [r2, r0, lsl #1]
 	cmp	r5, #0
-	beq	.L163
+	beq	.L154
 	muls	r5, r2, r5
-.L158:
+.L149:
 	ldrh	r3, [r10, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L159
+	bne	.L150
 	ldrh	r2, [fp, r6]
 	cmp	r2, r3
-	bne	.L159
+	bne	.L150
 	movw	r2, #463
-	ldr	r1, .L165+24
-	ldr	r0, .L165+28
+	ldr	r1, .L156+24
+	ldr	r0, .L156+28
 	bl	printf
-.L159:
+.L150:
 	ldrh	r3, [r10, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L160
+	bne	.L151
 	ldrh	r2, [fp, r6]
 	cmp	r2, r3
-	beq	.L156
-.L160:
+	beq	.L147
+.L151:
 	movs	r2, #6
 	muls	r2, r3, r2
-	ldr	r3, .L165+32
+	ldr	r3, .L156+32
 	asrs	r1, r2, #1
 	muls	r3, r1, r3
 	ldr	r1, [r8]
@@ -1383,39 +1344,39 @@ List_update_data_list:
 	ldr	r1, [r7]
 	add	r2, r2, r1
 	ldrh	r3, [r2, #4]
-	cbz	r3, .L164
+	cbz	r3, .L155
 	muls	r3, r0, r3
-.L161:
+.L152:
 	cmp	r5, r3
-	bcs	.L156
-	ldr	r5, .L165+36
+	bcs	.L147
+	ldr	r5, .L156+36
 	mov	r1, r4
-	ldr	r0, .L165+16
+	ldr	r0, .L156+16
 	bl	List_remove_node
 	ldrh	r3, [r5]
-	cbnz	r3, .L162
+	cbnz	r3, .L153
 	mov	r2, #474
-	ldr	r1, .L165+24
-	ldr	r0, .L165+28
+	ldr	r1, .L156+24
+	ldr	r0, .L156+28
 	bl	printf
-.L162:
+.L153:
 	ldrh	r3, [r5]
 	mov	r0, r4
 	subs	r3, r3, #1
 	strh	r3, [r5]	@ movhi
 	bl	INSERT_DATA_LIST
-.L156:
+.L147:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L163:
+.L154:
 	mov	r5, #-1
-	b	.L158
-.L164:
+	b	.L149
+.L155:
 	mov	r3, #-1
-	b	.L161
-.L166:
+	b	.L152
+.L157:
 	.align	2
-.L165:
+.L156:
 	.word	.LANCHOR51
 	.word	.LANCHOR52
 	.word	.LANCHOR53
@@ -1440,79 +1401,79 @@ select_l2p_ram_region:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r1, #0
-	ldr	r3, .L177
+	ldr	r3, .L168
 	movs	r0, #12
 	movw	r5, #65535
 	ldrh	r2, [r3]
-	ldr	r3, .L177+4
+	ldr	r3, .L168+4
 	ldr	r3, [r3]
-.L168:
+.L159:
 	uxth	r4, r1
 	cmp	r4, r2
-	bcc	.L170
+	bcc	.L161
 	mov	r4, r2
 	movs	r1, #0
 	mov	r6, #-2147483648
 	movs	r7, #12
-.L171:
+.L162:
 	uxth	r5, r1
 	cmp	r5, r2
-	bcc	.L173
+	bcc	.L164
 	cmp	r4, r2
-	bcc	.L169
-	ldr	r1, .L177+8
+	bcc	.L160
+	ldr	r1, .L168+8
 	mov	r4, r2
 	mov	r0, #-1
 	ldrh	r7, [r1]
 	movs	r1, #0
-.L174:
+.L165:
 	uxth	r5, r1
 	cmp	r5, r2
-	bcc	.L176
+	bcc	.L167
 	cmp	r4, r2
-	bcc	.L169
-	movw	r2, #787
-	ldr	r1, .L177+12
-	ldr	r0, .L177+16
+	bcc	.L160
+	movw	r2, #789
+	ldr	r1, .L168+12
+	ldr	r0, .L168+16
 	bl	printf
-	b	.L169
-.L170:
+	b	.L160
+.L161:
 	adds	r1, r1, #1
 	mla	r6, r0, r1, r3
 	ldrh	r6, [r6, #-12]
 	cmp	r6, r5
-	bne	.L168
-.L169:
+	bne	.L159
+.L160:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, pc}
-.L173:
+.L164:
 	mla	r0, r7, r1, r3
 	ldr	r0, [r0, #4]
 	cmp	r0, #0
-	blt	.L172
+	blt	.L163
 	cmp	r6, r0
 	itt	hi
 	movhi	r6, r0
 	movhi	r4, r5
-.L172:
+.L163:
 	adds	r1, r1, #1
-	b	.L171
-.L176:
+	b	.L162
+.L167:
 	ldr	r6, [r3, #4]
 	cmp	r0, r6
-	bls	.L175
+	bls	.L166
 	ldrh	ip, [r3]
 	cmp	ip, r7
 	itt	ne
 	movne	r0, r6
 	movne	r4, r5
-.L175:
+.L166:
 	adds	r1, r1, #1
 	adds	r3, r3, #12
-	b	.L174
-.L178:
+	b	.L165
+.L169:
 	.align	2
-.L177:
+.L168:
 	.word	.LANCHOR33
 	.word	.LANCHOR55
 	.word	.LANCHOR56
@@ -1530,45 +1491,45 @@ select_l2p_ram_region:
 FtlUpdateVaildLpn:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L189
+	ldr	r2, .L180
 	push	{r4, r5, r6, lr}
 	mov	r1, r2
 	ldrh	r3, [r2]
 	cmp	r3, #4
-	bhi	.L180
-	cbnz	r0, .L180
+	bhi	.L171
+	cbnz	r0, .L171
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
 	pop	{r4, r5, r6, pc}
-.L180:
+.L171:
 	movs	r3, #0
-	ldr	r0, .L189+4
+	ldr	r0, .L180+4
 	strh	r3, [r1]	@ movhi
 	movw	r6, #65535
-	ldr	r1, .L189+8
+	ldr	r1, .L180+8
 	ldrh	r4, [r0]
 	mov	r0, r3
-	ldr	r2, .L189+12
+	ldr	r2, .L180+12
 	ldr	r1, [r1]
 	str	r3, [r2]
 	add	r4, r1, r4, lsl #1
-.L181:
+.L172:
 	cmp	r1, r4
-	bne	.L183
-	cbz	r3, .L179
+	bne	.L174
+	cbz	r3, .L170
 	str	r0, [r2]
-.L179:
+.L170:
 	pop	{r4, r5, r6, pc}
-.L183:
+.L174:
 	ldrh	r5, [r1], #2
 	cmp	r5, r6
 	itt	ne
 	addne	r0, r0, r5
 	movne	r3, #1
-	b	.L181
-.L190:
+	b	.L172
+.L181:
 	.align	2
-.L189:
+.L180:
 	.word	.LANCHOR58
 	.word	.LANCHOR5
 	.word	.LANCHOR42
@@ -1587,10 +1548,10 @@ ftl_set_blk_mode:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	mov	r3, r0
-	cbz	r1, .L192
+	cbz	r1, .L183
 	b	ftl_set_blk_mode.part.6
-.L192:
-	ldr	r2, .L193
+.L183:
+	ldr	r2, .L184
 	lsrs	r0, r0, #5
 	and	r3, r3, #31
 	ldr	r1, [r2]
@@ -1600,9 +1561,9 @@ ftl_set_blk_mode:
 	bic	r2, r2, r3
 	str	r2, [r1, r0, lsl #2]
 	bx	lr
-.L194:
+.L185:
 	.align	2
-.L193:
+.L184:
 	.word	.LANCHOR1
 	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
 	.section	.text.ftl_get_blk_mode,"ax",%progbits
@@ -1617,7 +1578,7 @@ ftl_get_blk_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L196
+	ldr	r3, .L187
 	lsrs	r2, r0, #5
 	and	r0, r0, #31
 	ldr	r3, [r3]
@@ -1625,9 +1586,9 @@ ftl_get_blk_mode:
 	lsr	r0, r3, r0
 	and	r0, r0, #1
 	bx	lr
-.L197:
+.L188:
 	.align	2
-.L196:
+.L187:
 	.word	.LANCHOR1
 	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
 	.section	.text.ftl_sb_update_avl_pages,"ax",%progbits
@@ -1645,14 +1606,14 @@ ftl_sb_update_avl_pages:
 	push	{r4, r5, r6, lr}
 	strh	r3, [r0, #4]	@ movhi
 	movw	r6, #65535
-	ldr	r3, .L205
+	ldr	r3, .L196
 	ldrh	r4, [r3]
 	add	r3, r0, r2, lsl #1
 	adds	r3, r3, #14
-.L199:
+.L190:
 	cmp	r2, r4
-	bcc	.L201
-	ldr	r3, .L205+4
+	bcc	.L192
+	ldr	r3, .L196+4
 	add	r5, r0, #16
 	movw	r6, #65535
 	ldrh	r3, [r3]
@@ -1660,12 +1621,12 @@ ftl_sb_update_avl_pages:
 	subs	r1, r3, r1
 	movs	r3, #0
 	uxth	r1, r1
-.L202:
+.L193:
 	uxth	r2, r3
 	cmp	r4, r2
-	bhi	.L204
+	bhi	.L195
 	pop	{r4, r5, r6, pc}
-.L201:
+.L192:
 	ldrh	r5, [r3, #2]!
 	adds	r2, r2, #1
 	uxth	r2, r2
@@ -1674,8 +1635,8 @@ ftl_sb_update_avl_pages:
 	ldrhne	r5, [r0, #4]
 	addne	r5, r5, #1
 	strhne	r5, [r0, #4]	@ movhi
-	b	.L199
-.L204:
+	b	.L190
+.L195:
 	ldrh	r2, [r5], #2
 	adds	r3, r3, #1
 	cmp	r2, r6
@@ -1683,10 +1644,10 @@ ftl_sb_update_avl_pages:
 	ldrhne	r2, [r0, #4]
 	addne	r2, r2, r1
 	strhne	r2, [r0, #4]	@ movhi
-	b	.L202
-.L206:
+	b	.L193
+.L197:
 	.align	2
-.L205:
+.L196:
 	.word	.LANCHOR3
 	.word	.LANCHOR19
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
@@ -1703,24 +1664,24 @@ FtlSlcSuperblockCheck:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	ldrh	r3, [r0, #4]
 	push	{r4, r5, lr}
-	cbz	r3, .L207
+	cbz	r3, .L198
 	ldrh	r2, [r0]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L207
+	beq	.L198
 	ldrb	r2, [r0, #6]	@ zero_extendqisi2
 	movs	r5, #0
 	adds	r2, r2, #8
 	ldrh	r1, [r0, r2, lsl #1]
-	ldr	r2, .L213
+	ldr	r2, .L204
 	ldrh	r4, [r2]
 	mov	r2, r3
-.L210:
+.L201:
 	cmp	r1, r2
-	beq	.L212
-.L207:
+	beq	.L203
+.L198:
 	pop	{r4, r5, pc}
-.L212:
+.L203:
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	uxtb	r3, r3
@@ -1734,10 +1695,10 @@ FtlSlcSuperblockCheck:
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r1, [r0, r3, lsl #1]
-	b	.L210
-.L214:
+	b	.L201
+.L205:
 	.align	2
-.L213:
+.L204:
 	.word	.LANCHOR3
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
 	.section	.text.make_superblock,"ax",%progbits
@@ -1751,31 +1712,31 @@ FtlSlcSuperblockCheck:
 make_superblock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L220
+	ldr	r3, .L211
 	ldrh	r2, [r0]
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L216
-	movw	r2, #2110
-	ldr	r1, .L220+4
-	ldr	r0, .L220+8
+	bcc	.L207
+	movw	r2, #2156
+	ldr	r1, .L211+4
+	ldr	r0, .L211+8
 	bl	printf
-.L216:
-	ldr	r3, .L220+12
+.L207:
+	ldr	r3, .L211+12
 	add	r6, r4, #16
-	ldr	r10, .L220+20
+	ldr	r10, .L211+20
 	movw	r7, #65535
 	movs	r5, #0
 	ldrh	r8, [r3]
 	strh	r5, [r4, #4]	@ movhi
 	strb	r5, [r4, #7]
-.L217:
+.L208:
 	uxth	r3, r5
 	cmp	r8, r3
-	bhi	.L219
-	ldr	r2, .L220+16
+	bhi	.L210
+	ldr	r2, .L211+16
 	movs	r0, #0
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	strb	r0, [r4, #9]
@@ -1783,25 +1744,25 @@ make_superblock:
 	smulbb	r3, r3, r2
 	strh	r3, [r4, #4]	@ movhi
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L219:
+.L210:
 	ldrh	r1, [r4]
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
 	strh	r7, [r6]	@ movhi
 	mov	fp, r0
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L218
+	cbnz	r0, .L209
 	strh	fp, [r6]	@ movhi
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	strb	r3, [r4, #7]
-.L218:
+.L209:
 	adds	r5, r5, #1
 	adds	r6, r6, #2
-	b	.L217
-.L221:
+	b	.L208
+.L212:
 	.align	2
-.L220:
+.L211:
 	.word	.LANCHOR5
 	.word	.LANCHOR60
 	.word	.LC1
@@ -1822,46 +1783,46 @@ update_multiplier_value:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
 	movs	r5, #0
-	ldr	r3, .L228
+	ldr	r3, .L219
 	mov	r6, r0
 	mov	r4, r5
-	ldr	r10, .L228+12
+	ldr	r10, .L219+12
 	ldrh	r7, [r3]
-	ldr	r3, .L228+4
+	ldr	r3, .L219+4
 	ldrh	r8, [r3]
-.L223:
+.L214:
 	uxth	r3, r5
 	cmp	r7, r3
-	bhi	.L225
-	cbz	r4, .L227
+	bhi	.L216
+	cbz	r4, .L218
 	mov	r1, r4
 	mov	r0, #32768
 	bl	__aeabi_idiv
-.L226:
-	ldr	r3, .L228+8
+.L217:
+	ldr	r3, .L219+8
 	movs	r2, #6
 	ldr	r3, [r3]
 	mla	r6, r2, r6, r3
 	strh	r0, [r6, #4]	@ movhi
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L225:
+.L216:
 	mov	r1, r6
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L224
+	cbnz	r0, .L215
 	add	r4, r4, r8
 	uxth	r4, r4
-.L224:
+.L215:
 	adds	r5, r5, #1
-	b	.L223
-.L227:
+	b	.L214
+.L218:
 	mov	r0, r4
-	b	.L226
-.L229:
+	b	.L217
+.L220:
 	.align	2
-.L228:
+.L219:
 	.word	.LANCHOR3
 	.word	.LANCHOR19
 	.word	.LANCHOR40
@@ -1879,24 +1840,24 @@ GetFreeBlockMinEraseCount:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L233
+	ldr	r3, .L224
 	ldr	r0, [r3]
-	cbz	r0, .L231
-	ldr	r3, .L233+4
+	cbz	r0, .L222
+	ldr	r3, .L224+4
 	ldr	r3, [r3]
 	subs	r0, r0, r3
-	ldr	r3, .L233+8
+	ldr	r3, .L224+8
 	asrs	r0, r0, #1
 	muls	r0, r3, r0
-	ldr	r3, .L233+12
+	ldr	r3, .L224+12
 	ldr	r3, [r3]
 	uxth	r0, r0
 	ldrh	r0, [r3, r0, lsl #1]
-.L231:
+.L222:
 	bx	lr
-.L234:
+.L225:
 	.align	2
-.L233:
+.L224:
 	.word	.LANCHOR47
 	.word	.LANCHOR40
 	.word	-1431655765
@@ -1913,11 +1874,11 @@ GetFreeBlockMinEraseCount:
 GetFreeBlockMaxEraseCount:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L243
+	ldr	r3, .L234
 	push	{r4, r5, r6, lr}
 	ldr	r3, [r3]
-	cbz	r3, .L241
-	ldr	r2, .L243+4
+	cbz	r3, .L232
+	ldr	r2, .L234+4
 	movs	r5, #6
 	movw	r6, #65535
 	ldrh	r2, [r2]
@@ -1926,7428 +1887,5510 @@ GetFreeBlockMaxEraseCount:
 	cmp	r0, r2
 	it	gt
 	uxthgt	r0, r2
-	ldr	r2, .L243+8
+	ldr	r2, .L234+8
 	ldr	r1, [r2]
-	ldr	r2, .L243+12
+	ldr	r2, .L234+12
 	subs	r3, r3, r1
 	asrs	r3, r3, #1
 	muls	r3, r2, r3
 	movs	r2, #0
 	uxth	r3, r3
-.L238:
+.L229:
 	uxth	r4, r2
 	cmp	r0, r4
-	bls	.L240
+	bls	.L231
 	mul	r4, r5, r3
 	adds	r2, r2, #1
 	ldrh	r4, [r1, r4]
 	cmp	r4, r6
-	bne	.L242
-.L240:
-	ldr	r2, .L243+16
+	bne	.L233
+.L231:
+	ldr	r2, .L234+16
 	ldr	r2, [r2]
 	ldrh	r0, [r2, r3, lsl #1]
 	pop	{r4, r5, r6, pc}
-.L242:
+.L233:
 	mov	r3, r4
-	b	.L238
-.L241:
+	b	.L229
+.L232:
 	mov	r0, r3
 	pop	{r4, r5, r6, pc}
-.L244:
+.L235:
 	.align	2
-.L243:
+.L234:
 	.word	.LANCHOR47
 	.word	.LANCHOR48
 	.word	.LANCHOR40
 	.word	-1431655765
 	.word	.LANCHOR43
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
-	.section	.text.FtlPrintInfo2buf,"ax",%progbits
+	.section	.text.free_data_superblock,"ax",%progbits
 	.align	1
-	.global	FtlPrintInfo2buf
+	.global	free_data_superblock
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlPrintInfo2buf, %function
-FtlPrintInfo2buf:
+	.type	free_data_superblock, %function
+free_data_superblock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r1, #64
-	ldr	r2, .L257
-	mov	r8, r0
-	bl	snprintf
-	ldr	r3, .L257+4
-	add	r5, r8, r0
-	ldr	r2, .L257+8
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r6, .L257+12
-	ldr	r3, [r3]
-	bl	snprintf
-	add	r5, r5, r0
-	ldr	r2, .L257+16
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	ldr	r3, .L257+20
-	add	r5, r5, r0
-	ldr	r2, .L257+24
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r4, .L257+28
-	ldr	r3, [r3]
-	bl	snprintf
-	ldr	r3, .L257+32
-	add	r5, r5, r0
-	ldr	r2, .L257+36
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r7, .L257+40
-	ldr	r3, [r3]
-	bl	snprintf
-	ldr	r3, .L257+44
-	add	r5, r5, r0
-	ldr	r2, .L257+48
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r10, .L257+328
-	ldr	r3, [r3]
-	bl	snprintf
-	ldr	r3, .L257+52
-	add	r5, r5, r0
-	ldr	r2, .L257+56
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r3, [r3]
-	bl	snprintf
-	ldr	r3, .L257+60
-	add	r5, r5, r0
-	ldr	r2, .L257+64
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r3, [r3]
-	bl	snprintf
-	ldr	r3, .L257+68
-	add	r5, r5, r0
-	ldr	r2, .L257+72
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r3, [r3]
-	bl	snprintf
-	ldr	r3, .L257+76
-	add	r5, r5, r0
-	ldr	r2, .L257+80
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r3, [r3]
-	bl	snprintf
-	ldr	r3, .L257+84
-	add	r5, r5, r0
-	ldr	r2, .L257+88
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r3, [r3]
-	bl	snprintf
-	ldr	r3, .L257+92
-	add	r5, r5, r0
-	ldr	r2, .L257+96
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r3, [r3]
-	lsrs	r3, r3, #11
-	bl	snprintf
-	ldr	r3, .L257+100
-	add	r5, r5, r0
-	ldr	r2, .L257+104
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r3, [r3]
-	lsrs	r3, r3, #11
-	bl	snprintf
-	ldr	r3, .L257+108
-	add	r5, r5, r0
-	ldr	r2, .L257+112
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r3, [r3]
-	bl	snprintf
-	ldr	r3, .L257+116
-	add	r5, r5, r0
-	ldr	r2, .L257+120
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r3, [r3]
-	bl	snprintf
-	add	r5, r5, r0
-	ldrh	r3, [r6, #6]
-	ldr	r2, .L257+124
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	add	r5, r5, r0
-	ldrh	r3, [r4]
-	ldr	r2, .L257+128
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	ldr	r3, .L257+132
-	add	r5, r5, r0
-	ldr	r2, .L257+136
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r3, [r3]
-	bl	snprintf
-	ldr	r3, .L257+140
-	add	r5, r5, r0
-	ldr	r2, .L257+144
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r3, [r3]
-	bl	snprintf
-	ldr	r3, .L257+148
-	add	r5, r5, r0
-	ldr	r2, .L257+152
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r3, [r3]
-	bl	snprintf
-	ldr	r3, .L257+156
-	add	r5, r5, r0
-	ldr	r2, .L257+160
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r3, [r3]
-	bl	snprintf
-	ldr	r3, .L257+164
-	add	r5, r5, r0
-	ldr	r2, .L257+168
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r3, [r3]
-	bl	snprintf
-	ldr	r3, .L257+172
-	add	r5, r5, r0
-	ldr	r2, .L257+176
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r3, [r3]
-	bl	snprintf
-	add	r5, r5, r0
-	ldrh	r3, [r7, #30]
-	ldr	r2, .L257+180
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	add	r5, r5, r0
-	ldrh	r3, [r7, #28]
-	ldr	r2, .L257+184
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r7, .L257+188
-	bl	snprintf
-	ldr	r3, .L257+192
-	add	r5, r5, r0
-	ldr	r2, .L257+196
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r3, [r3]
-	bl	snprintf
-	ldr	r3, .L257+200
-	add	r5, r5, r0
-	ldr	r2, .L257+204
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r3, [r3]
-	bl	snprintf
-	ldr	r3, .L257+208
-	add	r5, r5, r0
-	ldr	r2, .L257+212
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r3, [r3]
-	bl	snprintf
-	ldr	r3, .L257+216
-	add	r5, r5, r0
-	ldr	r2, .L257+220
-	movs	r1, #64
-	mov	r0, r5
-	ldrh	r3, [r3, #6]
-	bl	snprintf
-	ldr	r3, .L257+224
-	add	r5, r5, r0
-	ldr	r2, .L257+228
-	movs	r1, #64
-	mov	r0, r5
-	ldrh	r3, [r3]
-	bl	snprintf
-	ldr	r3, .L257+232
-	add	r5, r5, r0
-	ldr	r2, .L257+236
-	movs	r1, #64
-	mov	r0, r5
-	ldrh	r3, [r3]
-	bl	snprintf
-	ldr	r3, .L257+240
-	add	r5, r5, r0
-	ldr	r2, .L257+244
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r3, [r3]
-	bl	snprintf
-	ldr	r3, .L257+248
-	add	r5, r5, r0
-	ldr	r2, .L257+252
-	movs	r1, #64
-	mov	r0, r5
-	ldrh	r3, [r3]
-	bl	snprintf
-	add	r5, r5, r0
-	ldrh	r3, [r6]
-	ldr	r2, .L257+256
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r6, .L257+260
-	bl	snprintf
-	add	r5, r5, r0
-	ldrh	r3, [r7, #2]
-	ldr	r2, .L257+264
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	add	r5, r5, r0
-	ldrb	r3, [r7, #6]	@ zero_extendqisi2
-	ldr	r2, .L257+268
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	add	r5, r5, r0
-	ldrh	r3, [r7]
-	ldr	r2, .L257+272
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	add	r5, r5, r0
-	ldrb	r3, [r7, #8]	@ zero_extendqisi2
-	ldr	r2, .L257+276
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	add	r5, r5, r0
-	ldrh	r3, [r7, #4]
-	ldr	r2, .L257+280
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	ldrh	r2, [r7]
-	add	r5, r5, r0
-	ldr	r3, [r6]
-	movs	r1, #64
-	ldr	r7, .L257+284
-	mov	r0, r5
-	ldrh	r3, [r3, r2, lsl #1]
-	ldr	r2, .L257+288
-	bl	snprintf
-	add	r5, r5, r0
-	ldrh	r3, [r7, #2]
-	ldr	r2, .L257+292
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	add	r5, r5, r0
-	ldrb	r3, [r7, #6]	@ zero_extendqisi2
-	ldr	r2, .L257+296
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	add	r5, r5, r0
-	ldrh	r3, [r7]
-	ldr	r2, .L257+300
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	add	r5, r5, r0
-	ldrb	r3, [r7, #8]	@ zero_extendqisi2
-	ldr	r2, .L257+304
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	add	r5, r5, r0
-	ldrh	r3, [r7, #4]
-	ldr	r2, .L257+308
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	ldrh	r2, [r7]
-	add	r5, r5, r0
-	ldr	r3, [r6]
-	movs	r1, #64
-	ldr	r7, .L257+312
-	mov	r0, r5
-	ldrh	r3, [r3, r2, lsl #1]
-	ldr	r2, .L257+316
-	bl	snprintf
-	add	r5, r5, r0
-	ldrh	r3, [r7, #2]
-	ldr	r2, .L257+320
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	add	r5, r5, r0
-	ldrb	r3, [r7, #6]	@ zero_extendqisi2
-	ldr	r2, .L257+324
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	add	r5, r5, r0
-	b	.L258
-.L259:
-	.align	2
-.L257:
-	.word	.LC2
-	.word	.LANCHOR26
-	.word	.LC3
-	.word	.LANCHOR37
-	.word	.LC4
-	.word	.LANCHOR61
-	.word	.LC5
-	.word	.LANCHOR48
-	.word	.LANCHOR59
-	.word	.LC6
-	.word	.LANCHOR39
-	.word	.LANCHOR62
-	.word	.LC7
-	.word	.LANCHOR63
-	.word	.LC8
-	.word	.LANCHOR64
-	.word	.LC9
-	.word	.LANCHOR65
-	.word	.LC10
-	.word	.LANCHOR66
-	.word	.LC11
-	.word	.LANCHOR67
-	.word	.LC12
-	.word	.LANCHOR68
-	.word	.LC13
-	.word	.LANCHOR69
-	.word	.LC14
-	.word	.LANCHOR70
-	.word	.LC15
-	.word	.LANCHOR71
-	.word	.LC16
-	.word	.LC17
-	.word	.LC18
-	.word	.LANCHOR72
-	.word	.LC19
-	.word	.LANCHOR73
-	.word	.LC20
-	.word	.LANCHOR74
-	.word	.LC21
-	.word	.LANCHOR75
-	.word	.LC22
-	.word	.LANCHOR76
-	.word	.LC23
-	.word	.LANCHOR77
-	.word	.LC24
-	.word	.LC25
-	.word	.LC26
-	.word	.LANCHOR51
-	.word	.LANCHOR34
-	.word	.LC27
-	.word	.LANCHOR31
-	.word	.LC28
-	.word	.LANCHOR2
-	.word	.LC29
-	.word	.LANCHOR38
-	.word	.LC30
-	.word	.LANCHOR5
-	.word	.LC31
-	.word	.LANCHOR78
-	.word	.LC32
-	.word	.LANCHOR7
-	.word	.LC33
-	.word	.LANCHOR79
-	.word	.LC34
-	.word	.LC35
-	.word	.LANCHOR42
-	.word	.LC36
-	.word	.LC37
-	.word	.LC38
-	.word	.LC39
-	.word	.LC40
-	.word	.LANCHOR52
-	.word	.LC41
-	.word	.LC42
-	.word	.LC43
-	.word	.LC44
-	.word	.LC45
-	.word	.LC46
-	.word	.LANCHOR53
-	.word	.LC47
-	.word	.LC48
-	.word	.LC49
-	.word	.LANCHOR81
-.L258:
-	ldrh	r3, [r7]
-	ldr	r2, .L260
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	add	r5, r5, r0
-	ldrb	r3, [r7, #8]	@ zero_extendqisi2
-	ldr	r2, .L260+4
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	ldrh	r3, [r7, #4]
-	add	r5, r5, r0
-	ldr	r7, .L260+8
-	movs	r1, #64
-	ldr	r2, .L260+12
-	mov	r0, r5
-	bl	snprintf
-	add	r5, r5, r0
-	ldrh	r3, [r7, #2]
-	ldr	r2, .L260+16
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	add	r5, r5, r0
-	ldrb	r3, [r7, #6]	@ zero_extendqisi2
-	ldr	r2, .L260+20
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	add	r5, r5, r0
-	ldrh	r3, [r7]
-	ldr	r2, .L260+24
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	add	r5, r5, r0
-	ldrb	r3, [r7, #8]	@ zero_extendqisi2
-	ldr	r2, .L260+28
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	add	r5, r5, r0
-	ldrh	r3, [r7, #4]
-	ldr	r2, .L260+32
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	ldr	r3, [r10, #76]
-	add	r5, r5, r0
-	ldr	r2, .L260+36
-	movs	r1, #64
-	mov	r0, r5
-	str	r3, [sp, #4]
-	ldr	r3, [r10, #84]
-	str	r3, [sp]
-	ldr	r3, [r10, #80]
-	bl	snprintf
-	add	r5, r5, r0
-	ldr	r3, [r10, #72]
-	ldr	r2, .L260+40
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	add	r5, r5, r0
-	ldr	r3, [r10, #96]
-	ldr	r2, .L260+44
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	ldr	r3, .L260+48
-	add	r5, r5, r0
-	ldr	r2, .L260+52
-	movs	r1, #64
-	mov	r0, r5
-	ldrh	r3, [r3]
-	bl	snprintf
-	ldr	r3, .L260+56
-	add	r5, r5, r0
-	ldr	r2, .L260+60
-	movs	r1, #64
-	mov	r0, r5
-	ldrh	r3, [r3]
-	bl	snprintf
-	ldr	r3, .L260+64
-	add	r5, r5, r0
-	ldr	r2, .L260+68
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r3, [r3]
-	bl	snprintf
-	ldr	r3, .L260+72
-	add	r5, r5, r0
-	ldr	r2, .L260+76
-	movs	r1, #64
-	mov	r0, r5
-	ldrh	r3, [r3]
-	bl	snprintf
-	add	r5, r5, r0
-	bl	GetFreeBlockMinEraseCount
-	ldr	r2, .L260+80
-	mov	r3, r0
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	add	r5, r5, r0
-	ldrh	r0, [r4]
-	bl	GetFreeBlockMaxEraseCount
-	ldr	r2, .L260+84
-	mov	r3, r0
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	ldr	r3, .L260+88
-	adds	r4, r5, r0
-	ldr	r3, [r3]
-	cmp	r3, #1
-	beq	.L246
-.L251:
-	sub	r0, r4, r8
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L246:
-	ldrh	r3, [r7]
-	movw	r2, #65535
-	cmp	r3, r2
-	beq	.L248
-	ldr	r2, [r6]
-	mov	r0, r4
-	movs	r1, #64
-	ldrh	r3, [r2, r3, lsl #1]
-	ldr	r2, .L260+92
-	bl	snprintf
-	add	r4, r4, r0
-.L248:
-	movs	r0, #0
-	ldr	r5, .L260+96
-	ldr	fp, .L260+112
-	movs	r7, #0
-	bl	List_get_gc_head_node
-	uxth	r0, r0
-.L250:
-	movw	r3, #65535
-	cmp	r0, r3
-	beq	.L249
-	ldr	r3, [fp]
-	mov	r10, #6
-	mul	r10, r10, r0
-	ldr	r2, .L260+100
-	movs	r1, #64
-	ldrh	r3, [r3, r0, lsl #1]
-	str	r3, [sp, #12]
-	ldr	r3, [r5]
-	add	r3, r3, r10
-	ldrh	r3, [r3, #4]
-	str	r3, [sp, #8]
-	ldr	r3, [r6]
-	ldrh	r3, [r3, r0, lsl #1]
-	stm	sp, {r0, r3}
-	mov	r3, r7
-	mov	r0, r4
-	adds	r7, r7, #1
-	bl	snprintf
-	ldr	r3, [r5]
-	cmp	r7, #16
-	add	r4, r4, r0
-	ldrh	r0, [r3, r10]
-	bne	.L250
-.L249:
-	ldr	r3, .L260+104
-	movs	r7, #0
-	ldr	r2, [r5]
-	ldr	r10, .L260+112
-	ldr	r3, [r3]
-	ldr	fp, .L260+116
-	subs	r3, r3, r2
-	ldr	r2, .L260+108
-	asrs	r3, r3, #1
-	muls	r3, r2, r3
-	uxth	r3, r3
-.L252:
-	movw	r2, #65535
-	cmp	r3, r2
-	beq	.L251
-	ldr	r2, [r10]
-	movs	r6, #6
-	muls	r6, r3, r6
-	mov	r0, r4
-	movs	r1, #64
-	ldrh	r2, [r2, r3, lsl #1]
-	str	r2, [sp, #8]
-	ldr	r2, [r5]
-	add	r2, r2, r6
-	ldrh	r2, [r2, #4]
-	str	r3, [sp]
-	mov	r3, r7
-	adds	r7, r7, #1
-	str	r2, [sp, #4]
-	mov	r2, fp
-	bl	snprintf
-	cmp	r7, #4
-	add	r4, r4, r0
-	beq	.L251
-	ldr	r3, [r5]
-	ldrh	r3, [r3, r6]
-	b	.L252
-.L261:
-	.align	2
-.L260:
-	.word	.LC50
-	.word	.LC51
-	.word	.LANCHOR80
-	.word	.LC52
-	.word	.LC53
-	.word	.LC54
-	.word	.LC55
-	.word	.LC56
-	.word	.LC57
-	.word	.LC58
-	.word	.LC59
-	.word	.LC60
-	.word	.LANCHOR82
-	.word	.LC61
-	.word	.LANCHOR83
-	.word	.LC62
-	.word	.LANCHOR84
-	.word	.LC63
-	.word	.LANCHOR85
-	.word	.LC64
-	.word	.LC65
-	.word	.LC66
-	.word	.LANCHOR86
-	.word	.LC67
-	.word	.LANCHOR40
-	.word	.LC68
-	.word	.LANCHOR47
-	.word	-1431655765
-	.word	.LANCHOR43
-	.word	.LC69
-	.size	FtlPrintInfo2buf, .-FtlPrintInfo2buf
-	.section	.text.rknand_proc_ftlread,"ax",%progbits
-	.align	1
-	.global	rknand_proc_ftlread
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	rknand_proc_ftlread, %function
-rknand_proc_ftlread:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	cmp	r0, #2048
-	push	{r3, r4, r5, lr}
-	mov	r5, r1
-	blt	.L264
-	ldr	r3, .L265
-	movs	r1, #64
-	ldr	r2, .L265+4
-	mov	r0, r5
-	bl	snprintf
-	adds	r4, r5, r0
-	mov	r0, r4
-	bl	FtlPrintInfo2buf
-	add	r0, r0, r4
-	subs	r0, r0, r5
-	pop	{r3, r4, r5, pc}
-.L264:
-	movs	r0, #0
-	pop	{r3, r4, r5, pc}
-.L266:
-	.align	2
-.L265:
-	.word	.LC70
-	.word	.LC71
-	.size	rknand_proc_ftlread, .-rknand_proc_ftlread
-	.section	.text.GetSwlReplaceBlock,"ax",%progbits
-	.align	1
-	.global	GetSwlReplaceBlock
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	GetSwlReplaceBlock, %function
-GetSwlReplaceBlock:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #24
-	ldr	r3, .L295
-	ldr	r6, .L295+4
-	ldr	r5, [r3]
-	mov	r10, r3
-	ldr	r1, [r6]
-	cmp	r1, r5
-	bcs	.L268
-	ldr	r2, .L295+8
-	movs	r3, #0
-	ldr	r4, .L295+12
-	mov	r0, r3
-	ldrh	r1, [r2]
-	ldr	r2, .L295+16
-	str	r3, [r4]
-	ldr	r7, [r2]
-	mov	r2, r3
-.L269:
-	cmp	r2, r1
-	bcc	.L270
-	cbz	r3, .L271
-	str	r0, [r4]
-.L271:
-	ldr	r7, [r4]
-	mov	r0, r7
-	bl	__aeabi_uidiv
-	ldr	r3, .L295+20
-	str	r0, [r6]
-	ldr	r0, [r3]
-	ldr	r3, .L295+24
-	subs	r0, r7, r0
-	ldrh	r1, [r3]
-	bl	__aeabi_uidiv
-	str	r0, [r4]
-.L272:
-	ldr	r6, [r6]
-	add	r3, r5, #256
-	cmp	r3, r6
-	bls	.L277
-	ldr	r2, .L295+28
-	add	r3, r5, #768
-	ldr	r2, [r2]
-	cmp	r3, r2
-	bls	.L277
-.L279:
-	movw	r4, #65535
-.L278:
-	mov	r0, r4
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L270:
-	ldrh	r3, [r7, r2, lsl #1]
-	adds	r2, r2, #1
-	add	r0, r0, r3
-	movs	r3, #1
-	b	.L269
-.L268:
-	ldr	r2, .L295+28
-	ldr	r3, [r2]
-	cmp	r1, r3
-	bls	.L272
-	adds	r3, r3, #1
-	ldr	r0, .L295+8
-	str	r3, [r2]
-	movs	r2, #0
-	ldr	r3, .L295+16
-	ldr	r3, [r3]
-	subs	r3, r3, #2
-.L274:
-	ldrh	r1, [r0]
-	cmp	r2, r1
-	bcs	.L272
-	ldrh	r1, [r3, #2]
-	adds	r2, r2, #1
-	adds	r1, r1, #1
-	strh	r1, [r3, #2]!	@ movhi
-	b	.L274
-.L277:
-	ldr	r3, .L295+32
-	ldrh	r0, [r3]
-	add	r0, r0, r0, lsl #1
-	ubfx	r0, r0, #2, #16
-	bl	GetFreeBlockMaxEraseCount
-	add	r3, r5, #64
-	mov	r2, r0
-	cmp	r0, r3
-	bcc	.L279
-	ldr	r3, .L295+36
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L279
-	ldr	r1, .L295+8
-	movs	r0, #0
-	mov	fp, #6
-	ldrh	r1, [r1]
-	str	r1, [sp, #20]
-	ldr	r1, .L295+40
-	ldr	r8, [r1]
-	ldr	r1, .L295+16
-	ldr	r7, [r1]
-	movw	r1, #65535
-	mov	ip, r1
-.L280:
-	ldrh	lr, [r3]
-	movw	r4, #65535
-	cmp	lr, r4
-	bne	.L283
-	mov	r4, ip
-.L282:
-	movw	r3, #65535
-	cmp	r4, r3
-	beq	.L279
-	ldrh	r7, [r7, r4, lsl #1]
-	lsl	r8, r4, #1
-	cmp	r5, r7
-	bcs	.L284
-	bl	GetFreeBlockMinEraseCount
-	cmp	r5, r0
-	it	cc
-	strcc	r1, [r10]
-.L284:
-	cmp	r6, r7
-	bls	.L279
-	add	r3, r7, #128
-	cmp	r2, r3
-	ble	.L279
-	add	r3, r7, #256
-	ldr	r0, .L295+28
-	cmp	r6, r3
-	bhi	.L285
-	ldr	r1, [r0]
-	add	r3, r7, #768
-	cmp	r3, r1
-	bcs	.L279
-.L285:
-	ldr	r3, .L295+44
-	mov	r1, r4
-	str	r2, [sp, #8]
-	mov	r2, r6
-	str	r7, [sp, #4]
-	ldr	r3, [r3]
-	ldrh	r3, [r3, r8]
-	str	r3, [sp]
-	ldr	r3, [r0]
-	ldr	r0, .L295+48
-	bl	printf
-	ldr	r3, .L295+52
-	movs	r2, #1
-	str	r2, [r3]
-	b	.L278
-.L283:
-	adds	r0, r0, #1
-	ldr	r4, [sp, #20]
-	uxth	r0, r0
-	cmp	r0, r4
-	bhi	.L279
-	ldrh	r4, [r3, #4]
-	cbz	r4, .L281
-	ldr	r4, .L295+56
-	sub	r3, r3, r8
-	asrs	r3, r3, #1
-	muls	r3, r4, r3
-	uxth	r4, r3
-	ldrh	r3, [r7, r4, lsl #1]
-	cmp	r5, r3
-	bcs	.L282
-	cmp	r1, r3
-	itt	hi
-	movhi	r1, r3
-	movhi	ip, r4
-.L281:
-	mla	r3, fp, lr, r8
-	b	.L280
-.L296:
-	.align	2
-.L295:
-	.word	.LANCHOR77
-	.word	.LANCHOR74
-	.word	.LANCHOR5
-	.word	.LANCHOR72
-	.word	.LANCHOR43
-	.word	.LANCHOR73
-	.word	.LANCHOR14
-	.word	.LANCHOR76
-	.word	.LANCHOR48
-	.word	.LANCHOR41
-	.word	.LANCHOR40
-	.word	.LANCHOR42
-	.word	.LC72
-	.word	.LANCHOR87
-	.word	-1431655765
-	.size	GetSwlReplaceBlock, .-GetSwlReplaceBlock
-	.section	.text.free_data_superblock,"ax",%progbits
-	.align	1
-	.global	free_data_superblock
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	free_data_superblock, %function
-free_data_superblock:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	movw	r2, #65535
-	push	{r3, lr}
-	cmp	r0, r2
-	beq	.L298
-	ldr	r2, .L299
-	movs	r1, #0
-	ldr	r2, [r2]
-	strh	r1, [r2, r0, lsl #1]	@ movhi
-	bl	INSERT_FREE_LIST
-.L298:
-	movs	r0, #0
-	pop	{r3, pc}
-.L300:
-	.align	2
-.L299:
-	.word	.LANCHOR42
-	.size	free_data_superblock, .-free_data_superblock
-	.section	.text.get_new_active_ppa,"ax",%progbits
-	.align	1
-	.global	get_new_active_ppa
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	get_new_active_ppa, %function
-get_new_active_ppa:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldrh	r2, [r0]
-	push	{r3, r4, r5, r6, r7, lr}
-	movw	r3, #65535
-	mov	r4, r0
-	cmp	r2, r3
-	bne	.L302
-	movw	r2, #2740
-	ldr	r1, .L315
-	ldr	r0, .L315+4
-	bl	printf
-.L302:
-	ldr	r5, .L315+8
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r5]
-	cmp	r2, r3
-	bne	.L303
-	movw	r2, #2741
-	ldr	r1, .L315
-	ldr	r0, .L315+4
-	bl	printf
-.L303:
-	ldrh	r3, [r4, #4]
-	cbnz	r3, .L304
-	movw	r2, #2742
-	ldr	r1, .L315
-	ldr	r0, .L315+4
-	bl	printf
-.L304:
-	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-	movs	r3, #0
-	strb	r3, [r4, #10]
-	movw	r6, #65535
-	adds	r2, r2, #8
-	ldrh	r0, [r4, r2, lsl #1]
-	ldr	r2, .L315+12
-	ldrh	r1, [r2]
-	mov	r2, r3
-.L305:
-	cmp	r0, r6
-	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	beq	.L307
-	ldrh	r2, [r4, #4]
-	ldrh	r6, [r4, #2]
-	subs	r2, r2, #1
-	uxth	r2, r2
-	orr	r6, r6, r0, lsl #10
-	movw	r0, #65535
-	strh	r2, [r4, #4]	@ movhi
-.L309:
-	adds	r3, r3, #1
-	uxtb	r3, r3
-	cmp	r1, r3
-	itttt	eq
-	ldrheq	r3, [r4, #2]
-	addeq	r3, r3, #1
-	strheq	r3, [r4, #2]	@ movhi
-	moveq	r3, #0
-	add	r7, r3, #8
-	ldrh	r7, [r4, r7, lsl #1]
-	cmp	r7, r0
-	beq	.L309
-	strb	r3, [r4, #6]
-	ldrh	r1, [r4, #2]
-	ldrh	r3, [r5]
-	cmp	r1, r3
-	bne	.L301
-	cbz	r2, .L301
-	movw	r2, #2763
-	ldr	r1, .L315
-	ldr	r0, .L315+4
-	bl	printf
-.L301:
-	mov	r0, r6
-	pop	{r3, r4, r5, r6, r7, pc}
-.L307:
-	adds	r3, r3, #1
-	uxtb	r3, r3
-	cmp	r3, r1
-	strb	r3, [r4, #6]
-	itttt	eq
-	ldrheq	r3, [r4, #2]
-	strbeq	r2, [r4, #6]
-	addeq	r3, r3, #1
-	strheq	r3, [r4, #2]	@ movhi
-	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	adds	r3, r3, #8
-	ldrh	r0, [r4, r3, lsl #1]
-	b	.L305
-.L316:
-	.align	2
-.L315:
-	.word	.LANCHOR88
-	.word	.LC1
-	.word	.LANCHOR19
-	.word	.LANCHOR3
-	.size	get_new_active_ppa, .-get_new_active_ppa
-	.section	.text.FtlGcBufInit,"ax",%progbits
-	.align	1
-	.global	FtlGcBufInit
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlGcBufInit, %function
-FtlGcBufInit:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r3, #0
-	ldr	r1, .L322
-	mov	fp, #1
-	ldr	r2, .L322+4
-	ldr	r5, [r1]
-	ldr	r1, .L322+8
-	str	r3, [r2]
-	ldr	r2, .L322+12
-	mov	r0, r5
-	ldr	r1, [r1]
-	ldrh	r2, [r2]
-	str	r1, [sp, #4]
-	ldr	r1, .L322+16
-	ldrh	r1, [r1]
-	str	r1, [sp]
-	ldr	r1, .L322+20
-	ldr	r10, [r1]
-	ldr	r1, .L322+24
-	ldrh	r7, [r1]
-	ldr	r1, .L322+28
-	ldr	r4, [r1]
-	movs	r1, #12
-	mla	r1, r2, r1, r1
-	adds	r4, r4, #8
-	add	r8, r5, r1
-	mov	r1, r3
-.L318:
-	adds	r0, r0, #12
-	ldr	r6, [sp]
-	cmp	r0, r8
-	add	ip, r3, r7
-	add	r4, r4, #20
-	add	lr, r1, r6
-	bne	.L319
-	ldr	r3, .L322+32
-	mov	lr, #12
-	mov	r8, #0
-	ldr	r0, [r3]
-	ldr	r3, .L322+8
-	ldr	r4, [r3]
-	ldr	r3, .L322+20
-	ldr	ip, [r3]
-.L320:
-	cmp	r2, r0
-	bcc	.L321
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L319:
-	bic	r1, r1, #3
-	bic	r3, r3, #3
-	mov	r6, r1
-	ldr	r1, [sp, #4]
-	add	r3, r3, r10
-	str	fp, [r0, #-4]
-	str	r3, [r0, #-8]
-	add	r6, r6, r1
-	mov	r1, lr
-	str	r6, [r0, #-12]
-	str	r3, [r4, #-16]
-	mov	r3, ip
-	str	r6, [r4, #-20]
-	b	.L318
-.L321:
-	ldr	r3, [sp]
-	mul	r10, lr, r2
-	muls	r3, r2, r3
-	add	r1, r5, r10
-	str	r8, [r1, #8]
-	bic	r3, r3, #3
-	add	r3, r3, r4
-	str	r3, [r5, r10]
-	mul	r3, r2, r7
-	adds	r2, r2, #1
-	uxth	r2, r2
-	bic	r3, r3, #3
-	add	r3, r3, ip
-	str	r3, [r1, #4]
-	b	.L320
-.L323:
-	.align	2
-.L322:
-	.word	.LANCHOR90
-	.word	.LANCHOR89
-	.word	.LANCHOR91
-	.word	.LANCHOR3
-	.word	.LANCHOR23
-	.word	.LANCHOR92
-	.word	.LANCHOR24
-	.word	.LANCHOR93
-	.word	.LANCHOR94
-	.size	FtlGcBufInit, .-FtlGcBufInit
-	.section	.text.FtlGcBufFree,"ax",%progbits
-	.align	1
-	.global	FtlGcBufFree
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlGcBufFree, %function
-FtlGcBufFree:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L331
-	mov	ip, #12
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r4, #0
-	mov	fp, #20
-	mov	lr, r4
-	ldr	r7, [r3]
-	ldr	r3, .L331+4
-	ldr	r5, [r3]
-.L325:
-	uxth	r3, r4
-	cmp	r1, r3
-	bls	.L324
-	mla	r8, fp, r3, r0
-	movs	r2, #0
-.L326:
-	uxth	r3, r2
-	cmp	r7, r3
-	bls	.L327
-	mul	r3, ip, r3
-	ldr	r6, [r8, #8]
-	adds	r2, r2, #1
-	add	r10, r5, r3
-	ldr	r3, [r5, r3]
-	cmp	r3, r6
-	bne	.L326
-	str	lr, [r10, #8]
-.L327:
-	adds	r4, r4, #1
-	b	.L325
-.L324:
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L332:
-	.align	2
-.L331:
-	.word	.LANCHOR94
-	.word	.LANCHOR90
-	.size	FtlGcBufFree, .-FtlGcBufFree
-	.section	.text.FtlGcBufAlloc,"ax",%progbits
-	.align	1
-	.global	FtlGcBufAlloc
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlGcBufAlloc, %function
-FtlGcBufAlloc:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L340
-	movs	r2, #0
-	push	{r4, r5, r6, r7, r8, r10, lr}
-	mov	ip, #12
-	movs	r7, #1
-	mov	lr, #20
-	ldr	r4, [r3]
-	ldr	r3, .L340+4
-	ldr	r5, [r3]
-.L334:
-	uxth	r8, r2
-	cmp	r1, r8
-	bhi	.L338
-	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L338:
-	mov	r10, #0
-.L335:
-	uxth	r3, r10
-	cmp	r4, r3
-	bls	.L336
-	mla	r3, ip, r3, r5
-	add	r10, r10, #1
-	ldr	r6, [r3, #8]
-	cmp	r6, #0
-	bne	.L335
-	mla	r8, lr, r8, r0
-	str	r7, [r3, #8]
-	ldr	r6, [r3]
-	ldr	r3, [r3, #4]
-	str	r6, [r8, #8]
-	str	r3, [r8, #12]
-.L336:
-	adds	r2, r2, #1
-	b	.L334
-.L341:
-	.align	2
-.L340:
-	.word	.LANCHOR94
-	.word	.LANCHOR90
-	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
-	.section	.text.IsBlkInGcList,"ax",%progbits
-	.align	1
-	.global	IsBlkInGcList
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	IsBlkInGcList, %function
-IsBlkInGcList:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L347
-	ldr	r2, .L347+4
-	ldr	r3, [r3]
-	ldrh	r2, [r2]
-	add	r2, r3, r2, lsl #1
-.L343:
-	cmp	r3, r2
-	bne	.L345
-	movs	r0, #0
-	bx	lr
-.L345:
-	ldrh	r1, [r3], #2
-	cmp	r1, r0
-	bne	.L343
-	movs	r0, #1
-	bx	lr
-.L348:
-	.align	2
-.L347:
-	.word	.LANCHOR95
-	.word	.LANCHOR96
-	.size	IsBlkInGcList, .-IsBlkInGcList
-	.section	.text.FtlGcUpdatePage,"ax",%progbits
-	.align	1
-	.global	FtlGcUpdatePage
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlGcUpdatePage, %function
-FtlGcUpdatePage:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	mov	r5, r0
-	ldr	r4, .L353
-	ubfx	r0, r0, #10, #16
-	mov	r6, r1
-	mov	r7, r2
-	bl	P2V_block_in_plane
-	ldr	r3, .L353+4
-	ldrh	r1, [r4]
-	ldr	r2, [r3]
-	movs	r3, #0
-.L350:
-	uxth	ip, r3
-	cmp	ip, r1
-	bcc	.L352
-	bne	.L351
-	strh	r0, [r2, ip, lsl #1]	@ movhi
-	ldrh	r3, [r4]
-	adds	r3, r3, #1
-	strh	r3, [r4]	@ movhi
-	b	.L351
-.L352:
-	adds	r3, r3, #1
-	add	ip, r2, r3, lsl #1
-	ldrh	ip, [ip, #-2]
-	cmp	ip, r0
-	bne	.L350
-.L351:
-	ldr	r2, .L353+8
-	movs	r0, #12
-	ldr	r1, .L353+12
-	ldrh	r3, [r2]
-	ldr	r1, [r1]
-	muls	r0, r3, r0
-	adds	r3, r3, #1
-	adds	r4, r1, r0
-	str	r6, [r4, #4]
-	str	r7, [r4, #8]
-	str	r5, [r1, r0]
-	strh	r3, [r2]	@ movhi
-	pop	{r3, r4, r5, r6, r7, pc}
-.L354:
-	.align	2
-.L353:
-	.word	.LANCHOR96
-	.word	.LANCHOR95
-	.word	.LANCHOR97
-	.word	.LANCHOR98
-	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
-	.section	.text.FtlGcRefreshBlock,"ax",%progbits
-	.align	1
-	.global	FtlGcRefreshBlock
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlGcRefreshBlock, %function
-FtlGcRefreshBlock:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	mov	r1, r0
-	mov	r4, r0
-	ldr	r0, .L358
-	bl	printf
-	ldr	r0, .L358+4
-	ldrh	r5, [r0]
-	cmp	r4, r5
-	beq	.L356
-	ldr	r3, .L358+8
-	ldrh	r1, [r3]
-	cmp	r4, r1
-	beq	.L356
-	movw	r2, #65535
-	cmp	r5, r2
-	bne	.L357
-	strh	r4, [r0]	@ movhi
-.L356:
-	movs	r0, #0
-	pop	{r3, r4, r5, pc}
-.L357:
-	cmp	r1, r2
-	it	eq
-	strheq	r4, [r3]	@ movhi
-	b	.L356
-.L359:
-	.align	2
-.L358:
-	.word	.LC73
-	.word	.LANCHOR99
-	.word	.LANCHOR100
-	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
-	.section	.text.FtlGcMarkBadPhyBlk,"ax",%progbits
-	.align	1
-	.global	FtlGcMarkBadPhyBlk
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlGcMarkBadPhyBlk, %function
-FtlGcMarkBadPhyBlk:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, lr}
-	mov	r5, r0
-	ldr	r4, .L364
-	bl	P2V_block_in_plane
-	mov	r2, r5
-	mov	r6, r0
-	ldrh	r1, [r4]
-	ldr	r0, .L364+4
-	bl	printf
-	mov	r0, r6
-	bl	FtlGcRefreshBlock
-	ldrh	r3, [r4]
-	movs	r2, #0
-	ldr	r0, .L364+8
-.L361:
-	uxth	r1, r2
-	cmp	r3, r1
-	bhi	.L363
-	cmp	r3, #15
-	itttt	ls
-	addls	r2, r3, #1
-	strhls	r2, [r4]	@ movhi
-	ldrls	r2, .L364+8
-	strhls	r5, [r2, r3, lsl #1]	@ movhi
-	b	.L362
-.L363:
-	adds	r2, r2, #1
-	add	r1, r0, r2, lsl #1
-	ldrh	r1, [r1, #-2]
-	cmp	r1, r5
-	bne	.L361
-.L362:
-	movs	r0, #0
-	pop	{r4, r5, r6, pc}
-.L365:
-	.align	2
-.L364:
-	.word	.LANCHOR101
-	.word	.LC74
-	.word	.LANCHOR102
-	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
-	.section	.text.FtlGcReFreshBadBlk,"ax",%progbits
-	.align	1
-	.global	FtlGcReFreshBadBlk
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlGcReFreshBadBlk, %function
-FtlGcReFreshBadBlk:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L372
-	push	{r4, lr}
-	ldrh	r3, [r3]
-	cbz	r3, .L367
-	ldr	r2, .L372+4
-	ldrh	r1, [r2]
-	movw	r2, #65535
-	cmp	r1, r2
-	bne	.L367
-	ldr	r4, .L372+8
-	ldrh	r2, [r4]
-	cmp	r2, r3
-	itt	cs
-	movcs	r3, #0
-	strhcs	r3, [r4]	@ movhi
-	ldr	r3, .L372+12
-	ldrh	r2, [r4]
-	ldrh	r0, [r3, r2, lsl #1]
-	bl	P2V_block_in_plane
-	bl	FtlGcRefreshBlock
-	ldrh	r3, [r4]
-	adds	r3, r3, #1
-	strh	r3, [r4]	@ movhi
-.L367:
-	movs	r0, #0
-	pop	{r4, pc}
-.L373:
-	.align	2
-.L372:
-	.word	.LANCHOR101
-	.word	.LANCHOR99
-	.word	.LANCHOR103
-	.word	.LANCHOR102
-	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
-	.section	.text.ftl_malloc,"ax",%progbits
-	.align	1
-	.global	ftl_malloc
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_malloc, %function
-ftl_malloc:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	movs	r1, #0
-	b	kmalloc
-	.size	ftl_malloc, .-ftl_malloc
-	.section	.text.ftl_free,"ax",%progbits
-	.align	1
-	.global	ftl_free
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_free, %function
-ftl_free:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	free
-	.size	ftl_free, .-ftl_free
-	.section	.text.rknand_print_hex,"ax",%progbits
-	.align	1
-	.global	rknand_print_hex
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	rknand_print_hex, %function
-rknand_print_hex:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r6, #0
-	mov	fp, r0
-	mov	r7, r1
-	mov	r8, r2
-	mov	r10, r3
-	mov	r5, r6
-	mov	r4, r6
-.L377:
-	cmp	r4, r10
-	bcc	.L383
-	ldr	r0, .L386
-	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
-	b	printf
-.L383:
-	cbnz	r5, .L378
-	mov	r2, r6
-	mov	r1, fp
-	ldr	r0, .L386+4
-	bl	printf
-.L378:
-	cmp	r8, #4
-	bne	.L379
-	ldr	r1, [r7, r4, lsl #2]
-.L385:
-	ldr	r0, .L386+8
-.L384:
-	adds	r5, r5, #1
-	bl	printf
-	cmp	r5, #15
-	bls	.L382
-	movs	r5, #0
-	ldr	r0, .L386
-	bl	printf
-.L382:
-	adds	r4, r4, #1
-	add	r6, r6, r8
-	b	.L377
-.L379:
-	cmp	r8, #2
-	bne	.L381
-	ldrh	r1, [r7, r4, lsl #1]
-	b	.L385
-.L381:
-	ldrb	r1, [r7, r4]	@ zero_extendqisi2
-	ldr	r0, .L386+12
-	b	.L384
-.L387:
-	.align	2
-.L386:
-	.word	.LC78
-	.word	.LC75
-	.word	.LC76
-	.word	.LC77
-	.size	rknand_print_hex, .-rknand_print_hex
-	.section	.text.FlashEraseBlocks,"ax",%progbits
-	.align	1
-	.global	FlashEraseBlocks
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FlashEraseBlocks, %function
-FlashEraseBlocks:
-	@ args = 0, pretend = 0, frame = 16
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r4, r0
-	ldr	r6, .L404
-	add	r8, r0, #4
-	movs	r7, #0
-	ldr	fp, .L404+20
-	ldrh	r10, [r6, #12]
-	str	r2, [sp]
-	lsl	r3, r10, #3
-	str	r3, [sp, #4]
-.L389:
-	ldr	r3, [sp]
-	cmp	r7, r3
-	beq	.L403
-	add	r2, sp, #8
-	add	r1, sp, #12
-	ldr	r0, [r8]
-	bl	l2p_addr_tran.isra.0
-	ldr	r5, [sp, #8]
-	cbnz	r5, .L390
-	ldr	r2, [sp, #12]
-	ldr	r3, [sp, #4]
-	cmp	r3, r2
-	bls	.L390
-	ldr	r6, .L404+4
-	ldr	r7, .L404+8
-.L391:
-	ldr	r3, [sp]
-	adds	r4, r4, #20
-	cmp	r5, r3
-	bne	.L392
-.L403:
+	movw	r2, #65535
+	push	{r3, lr}
+	cmp	r0, r2
+	beq	.L237
+	ldr	r2, .L238
+	movs	r1, #0
+	ldr	r2, [r2]
+	strh	r1, [r2, r0, lsl #1]	@ movhi
+	bl	INSERT_FREE_LIST
+.L237:
 	movs	r0, #0
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L392:
-	mov	r3, #-1
-	ldr	r2, [sp, #12]
-	str	r3, [r4, #-20]
-	mov	r1, r6
-	mov	r0, r7
-	adds	r5, r5, #1
-	bl	printf
-	movs	r3, #16
-	movs	r2, #4
-	ldr	r1, [r4, #-12]
-	ldr	r0, .L404+12
-	bl	rknand_print_hex
-	movs	r3, #4
-	ldr	r1, [r4, #-8]
-	mov	r2, r3
-	ldr	r0, .L404+16
-	bl	rknand_print_hex
-	b	.L391
-.L390:
-	ldr	r2, [fp, #4]
-	uxtb	r0, r5
-	ldr	r1, [sp, #12]
-	blx	r2
-	cbnz	r0, .L393
-	str	r0, [r8, #-4]
-.L394:
-	ldrh	r2, [r6, #14]
-	cmp	r2, #4
-	bne	.L396
-	ldr	r1, [sp, #12]
-	ldr	r2, [fp, #4]
-	ldrb	r0, [sp, #8]	@ zero_extendqisi2
-	add	r1, r1, r10
-	blx	r2
-	cbz	r0, .L396
-	mov	r2, #-1
-	str	r2, [r8, #-4]
-.L396:
-	adds	r7, r7, #1
-	add	r8, r8, #20
-	b	.L389
-.L393:
-	mov	r2, #-1
-	str	r2, [r8, #-4]
-	b	.L394
-.L405:
-	.align	2
-.L404:
-	.word	.LANCHOR0
-	.word	.LANCHOR104
-	.word	.LC79
-	.word	.LC80
-	.word	.LC81
-	.word	.LANCHOR105
-	.size	FlashEraseBlocks, .-FlashEraseBlocks
-	.section	.text.FtlFreeSysBlkQueueIn,"ax",%progbits
-	.align	1
-	.global	FtlFreeSysBlkQueueIn
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlFreeSysBlkQueueIn, %function
-FtlFreeSysBlkQueueIn:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	subs	r3, r0, #1
-	movw	r2, #65533
-	uxth	r3, r3
-	push	{r4, r5, r6, lr}
-	mov	r5, r0
-	cmp	r3, r2
-	bhi	.L406
-	ldr	r4, .L415
-	ldrh	r3, [r4, #6]
-	cmp	r3, #1024
-	beq	.L406
-	cbz	r1, .L408
-	bl	P2V_block_in_plane
-	ldr	r3, .L415+4
-	mov	r6, r0
-	movs	r2, #1
-	mov	r1, r2
-	ldr	r0, [r3]
-	lsls	r3, r5, #10
-	str	r3, [r0, #4]
-	bl	FlashEraseBlocks
-	ldr	r3, .L415+8
-	ldr	r2, [r3]
-	ldrh	r3, [r2, r6, lsl #1]
-	adds	r3, r3, #1
-	strh	r3, [r2, r6, lsl #1]	@ movhi
-	ldr	r2, .L415+12
-	ldr	r3, [r2]
-	adds	r3, r3, #1
-	str	r3, [r2]
-.L408:
-	ldrh	r3, [r4, #6]
-	adds	r3, r3, #1
-	strh	r3, [r4, #6]	@ movhi
-	ldrh	r3, [r4, #4]
-	adds	r2, r3, #4
-	adds	r3, r3, #1
-	ubfx	r3, r3, #0, #10
-	strh	r5, [r4, r2, lsl #1]	@ movhi
-	strh	r3, [r4, #4]	@ movhi
-.L406:
-	pop	{r4, r5, r6, pc}
-.L416:
-	.align	2
-.L415:
-	.word	.LANCHOR38
-	.word	.LANCHOR106
-	.word	.LANCHOR43
-	.word	.LANCHOR75
-	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
-	.section	.text.FtlFreeSysBlkQueueOut,"ax",%progbits
-	.align	1
-	.global	FtlFreeSysBlkQueueOut
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlFreeSysBlkQueueOut, %function
-FtlFreeSysBlkQueueOut:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	ldr	r4, .L422
-	ldrh	r2, [r4, #6]
-	cbz	r2, .L421
-	ldrh	r3, [r4, #2]
-	subs	r2, r2, #1
-	strh	r2, [r4, #6]	@ movhi
-	movs	r2, #1
-	adds	r1, r3, #4
-	adds	r3, r3, #1
-	ubfx	r3, r3, #0, #10
-	ldrh	r5, [r4, r1, lsl #1]
-	strh	r3, [r4, #2]	@ movhi
-	mov	r1, r2
-	ldr	r3, .L422+4
-	ldr	r0, [r3]
-	lsls	r3, r5, #10
-	str	r3, [r0, #4]
-	bl	FlashEraseBlocks
-	ldr	r2, .L422+8
-	ldr	r3, [r2]
-	adds	r3, r3, #1
-	str	r3, [r2]
-.L418:
-	subs	r3, r5, #1
-	movw	r2, #65533
-	uxth	r3, r3
-	cmp	r3, r2
-	bls	.L419
-	ldrh	r2, [r4, #6]
-	mov	r1, r5
-	ldr	r0, .L422+12
-	bl	printf
-.L420:
-	b	.L420
-.L421:
-	movw	r5, #65535
-	b	.L418
-.L419:
-	mov	r0, r5
-	pop	{r3, r4, r5, pc}
-.L423:
+	pop	{r3, pc}
+.L239:
 	.align	2
-.L422:
-	.word	.LANCHOR38
-	.word	.LANCHOR106
-	.word	.LANCHOR75
-	.word	.LC82
-	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
-	.section	.text.ftl_map_blk_alloc_new_blk,"ax",%progbits
+.L238:
+	.word	.LANCHOR42
+	.size	free_data_superblock, .-free_data_superblock
+	.section	.text.get_new_active_ppa,"ax",%progbits
 	.align	1
-	.global	ftl_map_blk_alloc_new_blk
+	.global	get_new_active_ppa
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_map_blk_alloc_new_blk, %function
-ftl_map_blk_alloc_new_blk:
+	.type	get_new_active_ppa, %function
+get_new_active_ppa:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldrh	r1, [r0, #10]
-	ldr	r2, [r0, #12]
+	ldrh	r2, [r0]
 	push	{r3, r4, r5, r6, r7, lr}
+	movw	r3, #65535
 	mov	r4, r0
-	movs	r3, #0
-.L425:
-	uxth	r5, r3
-	cmp	r5, r1
-	bcs	.L428
-	mov	r7, r2
-	adds	r3, r3, #1
-	ldrh	r6, [r7]
-	adds	r2, r2, #2
-	cmp	r6, #0
-	bne	.L425
-	bl	FtlFreeSysBlkQueueOut
-	subs	r3, r0, #1
-	movw	r2, #65533
-	uxth	r3, r3
-	mov	r1, r0
-	strh	r0, [r7]	@ movhi
-	cmp	r3, r2
-	bls	.L426
-	ldr	r3, .L432
-	ldr	r0, .L432+4
-	ldrh	r2, [r3, #6]
+	cmp	r2, r3
+	bne	.L241
+	movw	r2, #2786
+	ldr	r1, .L254
+	ldr	r0, .L254+4
 	bl	printf
-.L427:
-	b	.L427
-.L426:
-	ldr	r3, [r4, #28]
-	strh	r6, [r4, #2]	@ movhi
-	strh	r5, [r4]	@ movhi
-	adds	r3, r3, #1
-	str	r3, [r4, #28]
-	ldrh	r3, [r4, #8]
+.L241:
+	ldr	r5, .L254+8
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r5]
+	cmp	r2, r3
+	bne	.L242
+	movw	r2, #2787
+	ldr	r1, .L254
+	ldr	r0, .L254+4
+	bl	printf
+.L242:
+	ldrh	r3, [r4, #4]
+	cbnz	r3, .L243
+	movw	r2, #2788
+	ldr	r1, .L254
+	ldr	r0, .L254+4
+	bl	printf
+.L243:
+	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+	movs	r3, #0
+	strb	r3, [r4, #10]
+	movw	r6, #65535
+	adds	r2, r2, #8
+	ldrh	r0, [r4, r2, lsl #1]
+	ldr	r2, .L254+12
+	ldrh	r1, [r2]
+	mov	r2, r3
+.L244:
+	cmp	r0, r6
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	beq	.L246
+	ldrh	r2, [r4, #4]
+	ldrh	r6, [r4, #2]
+	subs	r2, r2, #1
+	uxth	r2, r2
+	orr	r6, r6, r0, lsl #10
+	movw	r0, #65535
+	strh	r2, [r4, #4]	@ movhi
+.L248:
 	adds	r3, r3, #1
-	strh	r3, [r4, #8]	@ movhi
-.L428:
-	ldrh	r3, [r4, #10]
-	cmp	r3, r5
-	bhi	.L430
-	movw	r2, #578
-	ldr	r1, .L432+8
-	ldr	r0, .L432+12
+	uxtb	r3, r3
+	cmp	r1, r3
+	itttt	eq
+	ldrheq	r3, [r4, #2]
+	addeq	r3, r3, #1
+	strheq	r3, [r4, #2]	@ movhi
+	moveq	r3, #0
+	add	r7, r3, #8
+	ldrh	r7, [r4, r7, lsl #1]
+	cmp	r7, r0
+	beq	.L248
+	strb	r3, [r4, #6]
+	ldrh	r1, [r4, #2]
+	ldrh	r3, [r5]
+	cmp	r1, r3
+	bne	.L240
+	cbz	r2, .L240
+	movw	r2, #2809
+	ldr	r1, .L254
+	ldr	r0, .L254+4
 	bl	printf
-.L430:
-	movs	r0, #0
+.L240:
+	mov	r0, r6
 	pop	{r3, r4, r5, r6, r7, pc}
-.L433:
+.L246:
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	cmp	r3, r1
+	strb	r3, [r4, #6]
+	itttt	eq
+	ldrheq	r3, [r4, #2]
+	strbeq	r2, [r4, #6]
+	addeq	r3, r3, #1
+	strheq	r3, [r4, #2]	@ movhi
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	adds	r3, r3, #8
+	ldrh	r0, [r4, r3, lsl #1]
+	b	.L244
+.L255:
 	.align	2
-.L432:
-	.word	.LANCHOR38
-	.word	.LC83
-	.word	.LANCHOR107
+.L254:
+	.word	.LANCHOR61
 	.word	.LC1
-	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
-	.section	.text.ftl_memset,"ax",%progbits
-	.align	1
-	.global	ftl_memset
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_memset, %function
-ftl_memset:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	memset
-	.size	ftl_memset, .-ftl_memset
-	.section	.text.FtlMemInit,"ax",%progbits
+	.word	.LANCHOR19
+	.word	.LANCHOR3
+	.size	get_new_active_ppa, .-get_new_active_ppa
+	.section	.text.FtlGcBufInit,"ax",%progbits
 	.align	1
-	.global	FtlMemInit
+	.global	FtlGcBufInit
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlMemInit, %function
-FtlMemInit:
-	@ args = 0, pretend = 0, frame = 24
+	.type	FtlGcBufInit, %function
+FtlGcBufInit:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L536
-	movs	r1, #0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #24
-	ldr	r2, .L536+4
-	mov	r10, #12
-	str	r1, [r3]
-	ldr	r3, .L536+8
-	ldr	r4, .L536+12
-	ldr	r8, .L536+292
-	str	r1, [r3]
-	ldr	r3, .L536+16
-	ldrh	r0, [r4]
-	str	r1, [sp, #12]
-	str	r1, [r3]
-	ldr	r3, .L536+20
-	lsls	r0, r0, #1
-	ldr	r6, .L536+24
-	ldr	fp, .L536+296
-	str	r1, [r3]
-	ldr	r3, .L536+28
-	ldr	r7, .L536+32
-	str	r1, [r3]
-	ldr	r3, .L536+36
-	str	r1, [r3]
-	ldr	r3, .L536+40
-	str	r1, [r3]
-	ldr	r3, .L536+44
-	str	r1, [r3]
-	ldr	r3, .L536+48
-	str	r1, [r3]
-	ldr	r3, .L536+52
-	str	r1, [r3]
-	ldr	r3, .L536+56
-	str	r1, [r3]
-	ldr	r3, .L536+60
-	str	r1, [r3]
-	ldr	r3, .L536+64
-	str	r1, [r3]
-	ldr	r3, .L536+68
-	str	r1, [r3]
-	ldr	r3, .L536+72
-	str	r1, [r3]
-	movw	r3, #65535
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r3, #0
+	ldr	r1, .L261
+	mov	fp, #1
+	ldr	r2, .L261+4
+	ldr	r5, [r1]
+	ldr	r1, .L261+8
 	str	r3, [r2]
-	ldr	r2, .L536+76
-	str	r1, [r2]
-	ldr	r2, .L536+80
-	str	r1, [r2]
-	ldr	r2, .L536+84
-	str	r1, [r2]
-	ldr	r2, .L536+88
-	strh	r3, [r2]	@ movhi
-	ldr	r2, .L536+92
-	strh	r3, [r2]	@ movhi
-	movs	r2, #32
-	ldr	r3, .L536+96
-	strh	r2, [r3]	@ movhi
-	movs	r2, #128
-	ldr	r3, .L536+100
-	strh	r2, [r3]	@ movhi
-	ldr	r3, .L536+104
-	strh	r1, [r3]	@ movhi
-	ldr	r3, .L536+108
-	strh	r1, [r3]	@ movhi
-	ldr	r3, .L536+112
-	strh	r1, [r3]	@ movhi
-	bl	ftl_malloc
-	str	r0, [r8]
-	ldrh	r0, [r4]
-	movs	r4, #20
-	mul	r0, r10, r0
-	bl	ftl_malloc
-	ldr	r3, .L536+116
-	str	r0, [r3]
-	ldrh	r3, [r6]
-	muls	r4, r3, r4
-	lsls	r5, r4, #2
-	mov	r0, r5
-	bl	ftl_malloc
-	ldr	r3, .L536+120
-	str	r0, [r3]
-	mov	r0, r4
-	bl	ftl_malloc
-	ldr	r3, .L536+124
-	str	r0, [r3]
-	mov	r0, r5
-	bl	ftl_malloc
-	str	r0, [fp]
-	mov	r0, r4
-	bl	ftl_malloc
-	ldr	r3, .L536+128
-	ldr	r5, .L536+132
-	str	r0, [r3]
-	mov	r0, r4
-	bl	ftl_malloc
-	ldr	r3, .L536+136
-	str	r0, [r3]
-	ldrh	r0, [r6]
-	ldr	r3, .L536+140
-	lsls	r0, r0, #1
-	ldrh	r4, [r3]
-	adds	r0, r0, #1
-	str	r0, [r5]
-	mov	r0, r4
-	bl	ftl_malloc
-	ldr	r3, .L536+144
-	str	r0, [r3]
-	mov	r0, r4
-	bl	ftl_malloc
-	ldr	r3, .L536+148
-	str	r0, [r3]
-	mov	r0, r4
-	bl	ftl_malloc
-	str	r0, [r7]
-	ldr	r0, [r5]
-	muls	r0, r4, r0
-	bl	ftl_malloc
-	ldr	r3, .L536+152
-	str	r0, [r3]
-	mov	r0, r4
-	bl	ftl_malloc
-	ldr	r3, .L536+156
-	str	r0, [r3]
-	mov	r0, r4
-	bl	ftl_malloc
-	ldr	r3, .L536+160
-	str	r0, [r3]
-	ldr	r0, [r5]
-	mul	r0, r10, r0
-	bl	ftl_malloc
-	ldr	r3, .L536+164
-	str	r0, [r3]
-	mov	r0, r4
-	bl	ftl_malloc
-	ldr	r3, .L536+168
-	str	r0, [r3]
-	mov	r0, r4
-	ldr	r4, .L536+172
-	bl	ftl_malloc
-	str	r0, [r4]
-	ldr	r0, .L536+176
-	ldr	r4, .L536+180
-	ldrh	r0, [r0]
-	lsls	r0, r0, #2
-	bl	ftl_malloc
-	str	r0, [r4]
-	ldr	r4, .L536+184
-	ldrh	r2, [r6]
-	ldr	r6, .L536+152
-	ldrh	r0, [r4]
-	muls	r2, r0, r2
-	mov	r0, r2
-	str	r2, [sp, #4]
-	bl	ftl_malloc
-	ldr	r2, [sp, #4]
-	ldr	r3, .L536+188
-	str	r0, [r3]
-	lsls	r0, r2, #2
-	bl	ftl_malloc
-	ldr	r2, .L536+192
-	str	r0, [r2]
-	ldrh	r2, [r4]
-	ldr	r0, [r5]
-	ldr	r4, .L536+196
-	ldr	r5, .L536+200
-	muls	r0, r2, r0
-	bl	ftl_malloc
-	ldr	r3, .L536+204
-	str	r0, [r3]
-	ldrh	r0, [r4]
-	lsls	r0, r0, #1
-	uxth	r0, r0
-	strh	r0, [r5]	@ movhi
-	bl	ftl_malloc
-	ldr	r2, .L536+208
-	str	r0, [r2]
-	ldrh	r2, [r5]
-	ldr	r0, .L536+212
-	addw	r2, r2, #547
-	lsrs	r2, r2, #9
-	and	r0, r0, r2, lsl #9
-	strh	r2, [r5]	@ movhi
-	bl	ftl_malloc
-	ldr	r3, .L536+216
-	str	r0, [r3]
-	adds	r0, r0, #32
-	ldr	r3, .L536+220
-	str	r0, [r3]
-	ldrh	r3, [r4]
-	lsls	r5, r3, #1
-	mov	r0, r5
-	bl	ftl_malloc
-	ldr	r2, .L536+224
-	str	r0, [r2]
+	ldr	r2, .L261+12
 	mov	r0, r5
-	bl	ftl_malloc
-	ldr	r3, .L536+228
-	str	r0, [r3]
-	ldr	r3, .L536+232
-	ldr	r2, [r3]
-	str	r3, [sp, #8]
-	lsls	r5, r2, #1
-	mov	r0, r5
-	bl	ftl_malloc
-	ldr	r2, .L536+236
-	str	r0, [r2]
-	mov	r0, r5
-	bl	ftl_malloc
-	ldr	r2, .L536+240
-	ldr	r5, .L536+244
-	str	r0, [r2]
-	ldrh	r0, [r4]
-	lsrs	r0, r0, #3
-	adds	r0, r0, #4
-	bl	ftl_malloc
-	ldr	r2, .L536+248
-	str	r0, [r2]
-	ldrh	r0, [r5]
-	lsls	r0, r0, #1
-	bl	ftl_malloc
-	ldr	r2, .L536+252
-	str	r0, [r2]
-	ldrh	r0, [r5]
-	lsls	r0, r0, #1
-	bl	ftl_malloc
-	ldr	r2, .L536+256
-	str	r0, [r2]
-	ldrh	r0, [r5]
-	ldr	r5, .L536+116
-	lsls	r0, r0, #2
-	bl	ftl_malloc
-	ldr	r2, .L536+260
-	str	r0, [r2]
-	ldr	r2, .L536+264
-	ldrh	r0, [r2]
-	str	r2, [sp, #4]
-	lsls	r0, r0, #2
-	bl	ftl_malloc
-	ldr	r2, [sp, #4]
-	ldr	ip, .L536+300
-	ldr	r1, [sp, #12]
+	ldr	r1, [r1]
 	ldrh	r2, [r2]
-	str	r0, [ip]
-	lsls	r2, r2, #2
-	bl	ftl_memset
-	ldr	r2, .L536+268
-	ldrh	r0, [r2]
-	lsls	r0, r0, #2
-	bl	ftl_malloc
-	ldr	r2, .L536+272
-	ldr	r3, [sp, #8]
-	str	r0, [r2]
-	ldr	r0, [r3]
-	lsls	r0, r0, #2
-	bl	ftl_malloc
-	ldr	r3, .L536+276
-	str	r0, [r3]
-	ldr	r3, .L536+280
-	ldrh	r0, [r3]
-	str	r3, [sp, #4]
-	mul	r0, r10, r0
-	ldr	r10, .L536+304
-	bl	ftl_malloc
-	ldr	r2, .L536+284
-	ldr	r3, [sp, #4]
-	str	r0, [r2]
-	ldr	r2, .L536+140
-	ldrh	r3, [r3]
-	ldrh	r0, [r2]
-	muls	r0, r3, r0
-	bl	ftl_malloc
-	ldr	r3, .L536+288
-	str	r0, [r3]
-	movs	r0, #6
-	ldrh	r3, [r4]
-	b	.L537
-.L538:
+	str	r1, [sp, #4]
+	ldr	r1, .L261+16
+	ldrh	r1, [r1]
+	str	r1, [sp]
+	ldr	r1, .L261+20
+	ldr	r10, [r1]
+	ldr	r1, .L261+24
+	ldrh	r7, [r1]
+	ldr	r1, .L261+28
+	ldr	r4, [r1]
+	movs	r1, #12
+	mla	r1, r2, r1, r1
+	adds	r4, r4, #8
+	add	r8, r5, r1
+	mov	r1, r3
+.L257:
+	adds	r0, r0, #12
+	ldr	r6, [sp]
+	cmp	r0, r8
+	add	ip, r3, r7
+	add	r4, r4, #20
+	add	lr, r1, r6
+	bne	.L258
+	ldr	r3, .L261+32
+	mov	lr, #12
+	mov	r8, #0
+	ldr	r0, [r3]
+	ldr	r3, .L261+8
+	ldr	r4, [r3]
+	ldr	r3, .L261+20
+	ldr	ip, [r3]
+.L259:
+	cmp	r2, r0
+	bcc	.L260
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L258:
+	bic	r1, r1, #3
+	bic	r3, r3, #3
+	mov	r6, r1
+	ldr	r1, [sp, #4]
+	add	r3, r3, r10
+	str	fp, [r0, #-4]
+	str	r3, [r0, #-8]
+	add	r6, r6, r1
+	mov	r1, lr
+	str	r6, [r0, #-12]
+	str	r3, [r4, #-16]
+	mov	r3, ip
+	str	r6, [r4, #-20]
+	b	.L257
+.L260:
+	ldr	r3, [sp]
+	mul	r10, lr, r2
+	muls	r3, r2, r3
+	add	r1, r5, r10
+	str	r8, [r1, #8]
+	bic	r3, r3, #3
+	add	r3, r3, r4
+	str	r3, [r5, r10]
+	mul	r3, r2, r7
+	adds	r2, r2, #1
+	uxth	r2, r2
+	bic	r3, r3, #3
+	add	r3, r3, ip
+	str	r3, [r1, #4]
+	b	.L259
+.L262:
 	.align	2
-.L536:
-	.word	.LANCHOR70
-	.word	.LANCHOR109
-	.word	.LANCHOR71
-	.word	.LANCHOR21
-	.word	.LANCHOR67
-	.word	.LANCHOR64
-	.word	.LANCHOR3
+.L261:
 	.word	.LANCHOR63
-	.word	.LANCHOR117
-	.word	.LANCHOR65
-	.word	.LANCHOR66
 	.word	.LANCHOR62
-	.word	.LANCHOR72
-	.word	.LANCHOR73
-	.word	.LANCHOR75
-	.word	.LANCHOR76
-	.word	.LANCHOR77
-	.word	.LANCHOR108
-	.word	.LANCHOR87
-	.word	.LANCHOR110
-	.word	.LANCHOR84
-	.word	.LANCHOR111
-	.word	.LANCHOR99
-	.word	.LANCHOR100
-	.word	.LANCHOR82
-	.word	.LANCHOR83
-	.word	.LANCHOR85
-	.word	.LANCHOR101
-	.word	.LANCHOR103
-	.word	.LANCHOR98
-	.word	.LANCHOR112
-	.word	.LANCHOR113
-	.word	.LANCHOR106
-	.word	.LANCHOR94
-	.word	.LANCHOR93
+	.word	.LANCHOR64
+	.word	.LANCHOR3
 	.word	.LANCHOR23
-	.word	.LANCHOR115
-	.word	.LANCHOR116
-	.word	.LANCHOR91
-	.word	.LANCHOR118
-	.word	.LANCHOR119
-	.word	.LANCHOR90
-	.word	.LANCHOR120
-	.word	.LANCHOR121
-	.word	.LANCHOR12
-	.word	.LANCHOR122
+	.word	.LANCHOR65
 	.word	.LANCHOR24
-	.word	.LANCHOR123
-	.word	.LANCHOR124
-	.word	.LANCHOR6
-	.word	.LANCHOR125
-	.word	.LANCHOR92
-	.word	.LANCHOR126
-	.word	33553920
-	.word	.LANCHOR127
-	.word	.LANCHOR43
-	.word	.LANCHOR128
-	.word	.LANCHOR42
-	.word	.LANCHOR30
-	.word	.LANCHOR129
-	.word	.LANCHOR130
-	.word	.LANCHOR27
-	.word	.LANCHOR1
-	.word	.LANCHOR36
-	.word	.LANCHOR131
-	.word	.LANCHOR132
-	.word	.LANCHOR28
-	.word	.LANCHOR32
-	.word	.LANCHOR134
-	.word	.LANCHOR135
-	.word	.LANCHOR33
-	.word	.LANCHOR55
-	.word	.LANCHOR136
-	.word	.LANCHOR95
-	.word	.LANCHOR114
-	.word	.LANCHOR133
-	.word	.LANCHOR10
-.L537:
-	ldr	r4, .L539
+	.word	.LANCHOR66
+	.word	.LANCHOR67
+	.size	FtlGcBufInit, .-FtlGcBufInit
+	.section	.text.FtlGcBufFree,"ax",%progbits
+	.align	1
+	.global	FtlGcBufFree
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcBufFree, %function
+FtlGcBufFree:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L270
+	mov	ip, #12
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #0
+	mov	fp, #20
+	mov	lr, r4
+	ldr	r7, [r3]
+	ldr	r3, .L270+4
+	ldr	r5, [r3]
+.L264:
+	uxth	r3, r4
+	cmp	r1, r3
+	bls	.L263
+	mla	r8, fp, r3, r0
+	movs	r2, #0
+.L265:
+	uxth	r3, r2
+	cmp	r7, r3
+	bls	.L266
+	mul	r3, ip, r3
+	ldr	r6, [r8, #8]
+	adds	r2, r2, #1
+	add	r10, r5, r3
+	ldr	r3, [r5, r3]
+	cmp	r3, r6
+	bne	.L265
+	str	lr, [r10, #8]
+.L266:
+	adds	r4, r4, #1
+	b	.L264
+.L263:
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L271:
+	.align	2
+.L270:
+	.word	.LANCHOR67
+	.word	.LANCHOR63
+	.size	FtlGcBufFree, .-FtlGcBufFree
+	.section	.text.FtlGcBufAlloc,"ax",%progbits
+	.align	1
+	.global	FtlGcBufAlloc
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcBufAlloc, %function
+FtlGcBufAlloc:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L279
+	movs	r2, #0
+	push	{r4, r5, r6, r7, r8, r10, lr}
+	mov	ip, #12
+	movs	r7, #1
+	mov	lr, #20
+	ldr	r4, [r3]
+	ldr	r3, .L279+4
+	ldr	r5, [r3]
+.L273:
+	uxth	r8, r2
+	cmp	r1, r8
+	bhi	.L277
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.L277:
+	mov	r10, #0
+.L274:
+	uxth	r3, r10
+	cmp	r4, r3
+	bls	.L275
+	mla	r3, ip, r3, r5
+	add	r10, r10, #1
+	ldr	r6, [r3, #8]
+	cmp	r6, #0
+	bne	.L274
+	mla	r8, lr, r8, r0
+	str	r7, [r3, #8]
+	ldr	r6, [r3]
+	ldr	r3, [r3, #4]
+	str	r6, [r8, #8]
+	str	r3, [r8, #12]
+.L275:
+	adds	r2, r2, #1
+	b	.L273
+.L280:
+	.align	2
+.L279:
+	.word	.LANCHOR67
+	.word	.LANCHOR63
+	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
+	.section	.text.IsBlkInGcList,"ax",%progbits
+	.align	1
+	.global	IsBlkInGcList
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	IsBlkInGcList, %function
+IsBlkInGcList:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L286
+	ldr	r2, .L286+4
+	ldr	r3, [r3]
+	ldrh	r2, [r2]
+	add	r2, r3, r2, lsl #1
+.L282:
+	cmp	r3, r2
+	bne	.L284
+	movs	r0, #0
+	bx	lr
+.L284:
+	ldrh	r1, [r3], #2
+	cmp	r1, r0
+	bne	.L282
+	movs	r0, #1
+	bx	lr
+.L287:
+	.align	2
+.L286:
+	.word	.LANCHOR68
+	.word	.LANCHOR69
+	.size	IsBlkInGcList, .-IsBlkInGcList
+	.section	.text.FtlGcUpdatePage,"ax",%progbits
+	.align	1
+	.global	FtlGcUpdatePage
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcUpdatePage, %function
+FtlGcUpdatePage:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r5, r0
+	ldr	r4, .L292
+	ubfx	r0, r0, #10, #16
+	mov	r6, r1
+	mov	r7, r2
+	bl	P2V_block_in_plane
+	ldr	r3, .L292+4
+	ldrh	r1, [r4]
+	ldr	r2, [r3]
+	movs	r3, #0
+.L289:
+	uxth	ip, r3
+	cmp	ip, r1
+	bcc	.L291
+	bne	.L290
+	strh	r0, [r2, ip, lsl #1]	@ movhi
+	ldrh	r3, [r4]
+	adds	r3, r3, #1
+	strh	r3, [r4]	@ movhi
+	b	.L290
+.L291:
+	adds	r3, r3, #1
+	add	ip, r2, r3, lsl #1
+	ldrh	ip, [ip, #-2]
+	cmp	ip, r0
+	bne	.L289
+.L290:
+	ldr	r2, .L292+8
+	movs	r0, #12
+	ldr	r1, .L292+12
+	ldrh	r3, [r2]
+	ldr	r1, [r1]
 	muls	r0, r3, r0
-	bl	ftl_malloc
-	ldr	r3, .L539+4
-	str	r0, [r3]
-	ldr	r3, .L539+8
-	ldrh	r0, [r3]
-	ldrh	r3, [r10]
-	adds	r0, r0, #31
-	asrs	r0, r0, #5
+	adds	r3, r3, #1
+	adds	r4, r1, r0
+	str	r6, [r4, #4]
+	str	r7, [r4, #8]
+	str	r5, [r1, r0]
+	strh	r3, [r2]	@ movhi
+	pop	{r3, r4, r5, r6, r7, pc}
+.L293:
+	.align	2
+.L292:
+	.word	.LANCHOR69
+	.word	.LANCHOR68
+	.word	.LANCHOR70
+	.word	.LANCHOR71
+	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
+	.section	.text.FtlGcRefreshBlock,"ax",%progbits
+	.align	1
+	.global	FtlGcRefreshBlock
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcRefreshBlock, %function
+FtlGcRefreshBlock:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, lr}
+	ldr	r4, .L297
+	ldrh	r5, [r4]
+	cmp	r5, r0
+	beq	.L295
+	ldr	r3, .L297+4
+	ldrh	r1, [r3]
+	cmp	r0, r1
+	beq	.L295
+	movw	r2, #65535
+	cmp	r5, r2
+	bne	.L296
 	strh	r0, [r4]	@ movhi
-	muls	r0, r3, r0
-	lsls	r0, r0, #2
-	bl	ftl_malloc
-	ldr	r2, .L539+12
-	str	r5, [sp, #8]
-	ldr	r5, .L539+16
-	mov	r1, r2
-	ldrh	r3, [r10]
-	str	r0, [r1, #28]!
-	ldrh	r0, [r4]
-	str	r5, [sp, #12]
-	ldr	r5, .L539+20
-	ldr	r10, .L539+116
-	lsls	r0, r0, #2
-	ldr	lr, .L539+120
-	ldr	ip, .L539+124
-	str	r5, [sp, #16]
-	mov	r4, r0
-	ldr	r5, .L539+24
-	str	r3, [sp, #4]
-	movs	r3, #1
-	str	r5, [sp, #20]
-.L436:
-	ldr	r5, [sp, #4]
-	cmp	r3, r5
-	bcc	.L437
-	add	r3, r2, r3, lsl #2
-	ldr	r1, .L539+28
+.L295:
 	movs	r0, #0
-	adds	r3, r3, #24
-.L438:
-	cmp	r1, r3
-	bne	.L439
-	ldr	r3, .L539+32
-	ldr	r3, [r3]
-	cbnz	r3, .L440
-.L442:
-	ldr	r1, .L539+36
-	ldr	r0, .L539+40
-	bl	printf
-	mov	r0, #-1
-.L435:
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L437:
-	ldr	r5, [r2, #28]
-	adds	r3, r3, #1
-	add	r5, r5, r4
-	add	r4, r4, r0
-	str	r5, [r1, #4]!
-	b	.L436
-.L439:
-	str	r0, [r3, #4]!
-	b	.L438
-.L440:
-	ldr	r3, .L539+44
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, .L539+48
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, .L539+52
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, .L539+56
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, .L539+60
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, .L539+4
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, [r2, #28]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, .L539+64
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, [r8]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, [sp, #8]
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, [sp, #12]
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, [fp]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, [r10]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, [sp, #20]
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, [sp, #16]
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, [lr]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, [ip]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, [r7]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, [r6]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, .L539+68
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, .L539+72
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, .L539+76
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, .L539+80
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, .L539+84
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, .L539+88
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, .L539+92
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, .L539+96
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, .L539+100
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, .L539+104
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, .L539+108
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, .L539+112
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L442
+	pop	{r4, r5, pc}
+.L296:
+	cmp	r1, r2
+	it	eq
+	strheq	r0, [r3]	@ movhi
+	b	.L295
+.L298:
+	.align	2
+.L297:
+	.word	.LANCHOR72
+	.word	.LANCHOR73
+	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
+	.section	.text.FtlGcMarkBadPhyBlk,"ax",%progbits
+	.align	1
+	.global	FtlGcMarkBadPhyBlk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcMarkBadPhyBlk, %function
+FtlGcMarkBadPhyBlk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	mov	r4, r0
+	bl	P2V_block_in_plane
+	bl	FtlGcRefreshBlock
+	ldr	r2, .L303
+	movs	r1, #0
+	ldr	r5, .L303+4
+	ldrh	r3, [r2]
+.L300:
+	uxth	r0, r1
+	cmp	r3, r0
+	bhi	.L302
+	cmp	r3, #15
+	itttt	ls
+	addls	r1, r3, #1
+	strhls	r1, [r2]	@ movhi
+	ldrls	r2, .L303+4
+	strhls	r4, [r2, r3, lsl #1]	@ movhi
+	b	.L301
+.L302:
+	adds	r1, r1, #1
+	add	r0, r5, r1, lsl #1
+	ldrh	r0, [r0, #-2]
+	cmp	r0, r4
+	bne	.L300
+.L301:
 	movs	r0, #0
-	b	.L435
-.L540:
+	pop	{r3, r4, r5, pc}
+.L304:
 	.align	2
-.L539:
-	.word	.LANCHOR137
-	.word	.LANCHOR40
-	.word	.LANCHOR17
-	.word	.LANCHOR37
-	.word	.LANCHOR112
-	.word	.LANCHOR113
-	.word	.LANCHOR93
-	.word	.LANCHOR37+56
-	.word	.LANCHOR129
-	.word	.LANCHOR138
-	.word	.LC84
-	.word	.LANCHOR130
-	.word	.LANCHOR134
-	.word	.LANCHOR135
-	.word	.LANCHOR55
-	.word	.LANCHOR136
-	.word	.LANCHOR42
-	.word	.LANCHOR118
-	.word	.LANCHOR119
-	.word	.LANCHOR90
-	.word	.LANCHOR123
-	.word	.LANCHOR124
-	.word	.LANCHOR92
-	.word	.LANCHOR43
-	.word	.LANCHOR126
-	.word	.LANCHOR36
-	.word	.LANCHOR131
-	.word	.LANCHOR132
-	.word	.LANCHOR133
-	.word	.LANCHOR106
-	.word	.LANCHOR115
-	.word	.LANCHOR116
-	.size	FtlMemInit, .-FtlMemInit
-	.section	.text.FtlBbt2Bitmap,"ax",%progbits
+.L303:
+	.word	.LANCHOR74
+	.word	.LANCHOR75
+	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
+	.section	.text.FtlGcReFreshBadBlk,"ax",%progbits
+	.align	1
+	.global	FtlGcReFreshBadBlk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcReFreshBadBlk, %function
+FtlGcReFreshBadBlk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L311
+	push	{r4, lr}
+	ldrh	r3, [r3]
+	cbz	r3, .L306
+	ldr	r2, .L311+4
+	ldrh	r1, [r2]
+	movw	r2, #65535
+	cmp	r1, r2
+	bne	.L306
+	ldr	r4, .L311+8
+	ldrh	r2, [r4]
+	cmp	r2, r3
+	itt	cs
+	movcs	r3, #0
+	strhcs	r3, [r4]	@ movhi
+	ldr	r3, .L311+12
+	ldrh	r2, [r4]
+	ldrh	r0, [r3, r2, lsl #1]
+	bl	P2V_block_in_plane
+	bl	FtlGcRefreshBlock
+	ldrh	r3, [r4]
+	adds	r3, r3, #1
+	strh	r3, [r4]	@ movhi
+.L306:
+	movs	r0, #0
+	pop	{r4, pc}
+.L312:
+	.align	2
+.L311:
+	.word	.LANCHOR74
+	.word	.LANCHOR72
+	.word	.LANCHOR76
+	.word	.LANCHOR75
+	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
+	.section	.text.ftl_malloc,"ax",%progbits
 	.align	1
-	.global	FtlBbt2Bitmap
+	.global	ftl_malloc
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlBbt2Bitmap, %function
-FtlBbt2Bitmap:
+	.type	ftl_malloc, %function
+ftl_malloc:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L547
-	push	{r4, r5, r6, r7, r8, lr}
-	mov	r5, r0
-	ldr	r7, .L547+4
-	mov	r6, r1
-	subs	r4, r5, #2
-	addw	r5, r5, #1022
-	ldrh	r2, [r3]
+	@ link register save eliminated.
 	movs	r1, #0
-	ldr	r8, .L547+12
-	mov	r0, r6
-	lsls	r2, r2, #2
-	bl	ftl_memset
-.L544:
-	ldrh	r3, [r4, #2]
-	movw	r2, #65535
-	cmp	r3, r2
-	beq	.L541
-	ldrh	r2, [r7]
-	cmp	r2, r3
-	bhi	.L543
-	movs	r2, #74
-	mov	r1, r8
-	ldr	r0, .L547+8
-	bl	printf
-.L543:
-	ldrh	r3, [r4, #2]!
-	movs	r2, #1
-	cmp	r5, r4
-	lsr	r1, r3, #5
-	and	r3, r3, #31
-	lsl	r3, r2, r3
-	ldr	r2, [r6, r1, lsl #2]
-	orr	r2, r2, r3
-	str	r2, [r6, r1, lsl #2]
-	bne	.L544
-.L541:
-	pop	{r4, r5, r6, r7, r8, pc}
-.L548:
-	.align	2
-.L547:
-	.word	.LANCHOR137
-	.word	.LANCHOR17
-	.word	.LC1
-	.word	.LANCHOR139
-	.size	FtlBbt2Bitmap, .-FtlBbt2Bitmap
-	.section	.text.FtlBbtMemInit,"ax",%progbits
+	b	kmalloc
+	.size	ftl_malloc, .-ftl_malloc
+	.section	.text.ftl_free,"ax",%progbits
 	.align	1
-	.global	FtlBbtMemInit
+	.global	ftl_free
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlBbtMemInit, %function
-FtlBbtMemInit:
+	.type	ftl_free, %function
+ftl_free:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r0, .L550
-	movw	r3, #65535
-	movs	r2, #16
-	movs	r1, #255
-	strh	r3, [r0]	@ movhi
-	movs	r3, #0
-	strh	r3, [r0, #6]	@ movhi
-	adds	r0, r0, #12
-	b	ftl_memset
-.L551:
-	.align	2
-.L550:
-	.word	.LANCHOR37
-	.size	FtlBbtMemInit, .-FtlBbtMemInit
-	.section	.text.FtlFreeSysBlkQueueInit,"ax",%progbits
+	b	free
+	.size	ftl_free, .-ftl_free
+	.section	.text.rknand_print_hex,"ax",%progbits
 	.align	1
-	.global	FtlFreeSysBlkQueueInit
+	.global	rknand_print_hex
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlFreeSysBlkQueueInit, %function
-FtlFreeSysBlkQueueInit:
+	.type	rknand_print_hex, %function
+rknand_print_hex:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L553
-	mov	r2, #2048
-	push	{r4, lr}
-	movs	r4, #0
-	mov	r1, r4
-	strh	r4, [r3, #2]	@ movhi
-	strh	r4, [r3, #4]	@ movhi
-	strh	r4, [r3, #6]	@ movhi
-	strh	r0, [r3], #8	@ movhi
-	mov	r0, r3
-	bl	ftl_memset
-	mov	r0, r4
-	pop	{r4, pc}
-.L554:
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r6, #0
+	mov	fp, r0
+	mov	r7, r1
+	mov	r8, r2
+	mov	r10, r3
+	mov	r5, r6
+	mov	r4, r6
+.L316:
+	cmp	r4, r10
+	bcc	.L322
+	ldr	r0, .L325
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	printf
+.L322:
+	cbnz	r5, .L317
+	mov	r2, r6
+	mov	r1, fp
+	ldr	r0, .L325+4
+	bl	printf
+.L317:
+	cmp	r8, #4
+	bne	.L318
+	ldr	r1, [r7, r4, lsl #2]
+.L324:
+	ldr	r0, .L325+8
+.L323:
+	adds	r5, r5, #1
+	bl	printf
+	cmp	r5, #15
+	bls	.L321
+	movs	r5, #0
+	ldr	r0, .L325
+	bl	printf
+.L321:
+	adds	r4, r4, #1
+	add	r6, r6, r8
+	b	.L316
+.L318:
+	cmp	r8, #2
+	bne	.L320
+	ldrh	r1, [r7, r4, lsl #1]
+	b	.L324
+.L320:
+	ldrb	r1, [r7, r4]	@ zero_extendqisi2
+	ldr	r0, .L325+12
+	b	.L323
+.L326:
 	.align	2
-.L553:
-	.word	.LANCHOR38
-	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
-	.section	.text.ftl_free_no_use_map_blk,"ax",%progbits
+.L325:
+	.word	.LC5
+	.word	.LC2
+	.word	.LC3
+	.word	.LC4
+	.size	rknand_print_hex, .-rknand_print_hex
+	.section	.text.FlashEraseBlocks,"ax",%progbits
 	.align	1
-	.global	ftl_free_no_use_map_blk
+	.global	FlashEraseBlocks
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_free_no_use_map_blk, %function
-ftl_free_no_use_map_blk:
-	@ args = 0, pretend = 0, frame = 8
+	.type	FlashEraseBlocks, %function
+FlashEraseBlocks:
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldrh	r2, [r0, #10]
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-	ldr	r5, [r0, #20]
-	movs	r1, #0
-	ldr	r7, [r0, #12]
-	lsls	r2, r2, #1
-	ldr	r6, [r0, #24]
-	mov	r0, r5
-	bl	ftl_memset
-	movs	r3, #0
-.L556:
-	ldrh	r1, [r4, #6]
-	uxth	r2, r3
-	cmp	r1, r2
-	bhi	.L560
-	ldr	r3, .L575
-	movs	r6, #0
-	mov	r10, r6
-	ldrh	r2, [r3]
-	ldrh	r3, [r4]
-	strh	r2, [r5, r3, lsl #1]	@ movhi
-	mov	r2, r6
-	ldrh	fp, [r5]
-.L561:
-	ldrh	r3, [r4, #10]
-	uxth	ip, r6
-	cmp	r3, ip
-	bhi	.L565
-	mov	r0, r10
-	add	sp, sp, #8
+	ldr	r6, .L343
+	add	r8, r0, #4
+	movs	r7, #0
+	ldr	fp, .L343+20
+	ldrh	r10, [r6, #12]
+	str	r2, [sp]
+	lsl	r3, r10, #3
+	str	r3, [sp, #4]
+.L328:
+	ldr	r3, [sp]
+	cmp	r7, r3
+	beq	.L342
+	add	r2, sp, #8
+	add	r1, sp, #12
+	ldr	r0, [r8]
+	bl	l2p_addr_tran.isra.0
+	ldr	r5, [sp, #8]
+	cbnz	r5, .L329
+	ldr	r2, [sp, #12]
+	ldr	r3, [sp, #4]
+	cmp	r3, r2
+	bls	.L329
+	ldr	r6, .L343+4
+	ldr	r7, .L343+8
+.L330:
+	ldr	r3, [sp]
+	adds	r4, r4, #20
+	cmp	r5, r3
+	bne	.L331
+.L342:
+	movs	r0, #0
+	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L560:
-	uxth	r2, r3
-	ldr	r1, [r6, r2, lsl #2]
-	movs	r2, #0
-	ubfx	r1, r1, #10, #16
-.L557:
-	ldrh	ip, [r4, #10]
-	uxth	r0, r2
-	cmp	ip, r0
-	bhi	.L559
-	adds	r3, r3, #1
-	b	.L556
-.L559:
-	uxth	r0, r2
-	ldrh	ip, [r7, r0, lsl #1]
-	cmp	ip, r1
-	bne	.L558
-	cbz	r1, .L558
-	ldrh	ip, [r5, r0, lsl #1]
-	add	ip, ip, #1
-	strh	ip, [r5, r0, lsl #1]	@ movhi
-.L558:
-	adds	r2, r2, #1
-	b	.L557
-.L565:
-	uxth	r1, r6
-	ldrh	r3, [r5, r1, lsl #1]
-	lsl	r8, r1, #1
-	cmp	fp, r3
-	bls	.L562
-	ldrh	r0, [r7, r1, lsl #1]
-	add	r8, r8, r7
-	cbnz	r0, .L563
-.L564:
-	adds	r6, r6, #1
-	b	.L561
-.L562:
-	cmp	r3, #0
-	bne	.L564
-	ldrh	r0, [r7, r1, lsl #1]
-	add	r8, r8, r7
-	cmp	r0, #0
-	beq	.L564
-.L566:
-	movs	r1, #1
-	str	r2, [sp, #4]
-	bl	FtlFreeSysBlkQueueIn
-	ldr	r2, [sp, #4]
-	strh	r2, [r8]	@ movhi
-	ldrh	r3, [r4, #8]
-	subs	r3, r3, #1
-	strh	r3, [r4, #8]	@ movhi
-	b	.L564
-.L563:
-	mov	r10, ip
-	mov	fp, r3
-	cmp	r3, #0
-	beq	.L566
-	b	.L564
-.L576:
+.L331:
+	mov	r3, #-1
+	ldr	r2, [sp, #12]
+	str	r3, [r4, #-20]
+	mov	r1, r6
+	mov	r0, r7
+	adds	r5, r5, #1
+	bl	printf
+	movs	r3, #16
+	movs	r2, #4
+	ldr	r1, [r4, #-12]
+	ldr	r0, .L343+12
+	bl	rknand_print_hex
+	movs	r3, #4
+	ldr	r1, [r4, #-8]
+	mov	r2, r3
+	ldr	r0, .L343+16
+	bl	rknand_print_hex
+	b	.L330
+.L329:
+	ldr	r2, [fp, #4]
+	uxtb	r0, r5
+	ldr	r1, [sp, #12]
+	blx	r2
+	cbnz	r0, .L332
+	str	r0, [r8, #-4]
+.L333:
+	ldrh	r2, [r6, #14]
+	cmp	r2, #4
+	bne	.L335
+	ldr	r1, [sp, #12]
+	ldr	r2, [fp, #4]
+	ldrb	r0, [sp, #8]	@ zero_extendqisi2
+	add	r1, r1, r10
+	blx	r2
+	cbz	r0, .L335
+	mov	r2, #-1
+	str	r2, [r8, #-4]
+.L335:
+	adds	r7, r7, #1
+	add	r8, r8, #20
+	b	.L328
+.L332:
+	mov	r2, #-1
+	str	r2, [r8, #-4]
+	b	.L333
+.L344:
 	.align	2
-.L575:
-	.word	.LANCHOR20
-	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
-	.section	.text.FtlL2PDataInit,"ax",%progbits
+.L343:
+	.word	.LANCHOR0
+	.word	.LANCHOR77
+	.word	.LC6
+	.word	.LC7
+	.word	.LC8
+	.word	.LANCHOR78
+	.size	FlashEraseBlocks, .-FlashEraseBlocks
+	.section	.text.FtlFreeSysBlkQueueIn,"ax",%progbits
 	.align	1
-	.global	FtlL2PDataInit
+	.global	FtlFreeSysBlkQueueIn
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlL2PDataInit, %function
-FtlL2PDataInit:
+	.type	FtlFreeSysBlkQueueIn, %function
+FtlFreeSysBlkQueueIn:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, lr}
-	movs	r1, #0
-	ldr	r5, .L580
-	ldr	r4, .L580+4
-	ldr	r2, [r5]
-	ldr	r7, .L580+8
-	ldr	r6, .L580+12
-	ldr	r0, [r4]
-	lsls	r2, r2, #1
-	ldr	r8, .L580+44
-	bl	ftl_memset
-	ldrh	r3, [r7]
-	movs	r1, #255
-	ldrh	r2, [r6]
-	ldr	r0, [r8]
-	muls	r2, r3, r2
-	bl	ftl_memset
-	ldr	r3, .L580+16
-	movw	r0, #65535
-	ldrh	r1, [r6]
-	ldr	ip, [r8]
+	subs	r3, r0, #1
+	movw	r2, #65533
+	uxth	r3, r3
+	push	{r4, r5, r6, lr}
+	mov	r5, r0
+	cmp	r3, r2
+	bhi	.L345
+	ldr	r4, .L354
+	ldrh	r3, [r4, #6]
+	cmp	r3, #1024
+	beq	.L345
+	cbz	r1, .L347
+	bl	P2V_block_in_plane
+	ldr	r3, .L354+4
+	mov	r6, r0
+	movs	r2, #1
+	mov	r1, r2
+	ldr	r0, [r3]
+	lsls	r3, r5, #10
+	str	r3, [r0, #4]
+	bl	FlashEraseBlocks
+	ldr	r3, .L354+8
 	ldr	r2, [r3]
-	movs	r3, #12
-	ldrh	r7, [r7]
-	mla	r3, r1, r3, r3
-	adds	r1, r2, r3
-	movs	r3, #0
-	mov	lr, r3
-.L578:
-	adds	r2, r2, #12
-	adds	r6, r3, r7
-	cmp	r2, r1
-	bne	.L579
-	ldr	r3, .L580+20
-	ldr	r2, [r5]
-	strh	r0, [r3, #2]	@ movhi
-	strh	r2, [r3, #10]	@ movhi
-	movw	r2, #61634
-	strh	r2, [r3, #4]	@ movhi
-	ldr	r2, .L580+24
-	strh	r0, [r3]	@ movhi
-	ldrh	r2, [r2]
-	strh	r2, [r3, #8]	@ movhi
-	ldr	r2, .L580+28
-	ldrh	r2, [r2]
-	strh	r2, [r3, #6]	@ movhi
-	ldr	r2, .L580+32
-	ldr	r2, [r2]
-	str	r2, [r3, #12]
-	ldr	r2, .L580+36
-	ldr	r2, [r2]
-	str	r2, [r3, #16]
-	ldr	r2, [r4]
-	str	r2, [r3, #20]
-	ldr	r2, .L580+40
-	ldr	r2, [r2]
-	str	r2, [r3, #24]
-	pop	{r4, r5, r6, r7, r8, pc}
-.L579:
-	bic	r3, r3, #3
-	str	lr, [r2, #-8]
-	add	r3, r3, ip
-	strh	r0, [r2, #-12]	@ movhi
-	str	r3, [r2, #-4]
-	mov	r3, r6
-	b	.L578
-.L581:
+	ldrh	r3, [r2, r6, lsl #1]
+	adds	r3, r3, #1
+	strh	r3, [r2, r6, lsl #1]	@ movhi
+	ldr	r2, .L354+12
+	ldr	r3, [r2]
+	adds	r3, r3, #1
+	str	r3, [r2]
+.L347:
+	ldrh	r3, [r4, #6]
+	adds	r3, r3, #1
+	strh	r3, [r4, #6]	@ movhi
+	ldrh	r3, [r4, #4]
+	adds	r2, r3, #4
+	adds	r3, r3, #1
+	ubfx	r3, r3, #0, #10
+	strh	r5, [r4, r2, lsl #1]	@ movhi
+	strh	r3, [r4, #4]	@ movhi
+.L345:
+	pop	{r4, r5, r6, pc}
+.L355:
 	.align	2
-.L580:
-	.word	.LANCHOR30
-	.word	.LANCHOR130
-	.word	.LANCHOR23
-	.word	.LANCHOR33
-	.word	.LANCHOR55
-	.word	.LANCHOR140
-	.word	.LANCHOR141
-	.word	.LANCHOR32
-	.word	.LANCHOR129
-	.word	.LANCHOR135
-	.word	.LANCHOR134
-	.word	.LANCHOR136
-	.size	FtlL2PDataInit, .-FtlL2PDataInit
-	.section	.text.FtlVariablesInit,"ax",%progbits
+.L354:
+	.word	.LANCHOR38
+	.word	.LANCHOR79
+	.word	.LANCHOR43
+	.word	.LANCHOR80
+	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
+	.section	.text.FtlFreeSysBlkQueueOut,"ax",%progbits
 	.align	1
-	.global	FtlVariablesInit
+	.global	FtlFreeSysBlkQueueOut
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlVariablesInit, %function
-FtlVariablesInit:
+	.type	FtlFreeSysBlkQueueOut, %function
+FtlFreeSysBlkQueueOut:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	movw	r2, #65535
-	ldr	r3, .L583
-	movs	r4, #0
-	mov	r1, r4
-	ldr	r5, .L583+4
-	strh	r2, [r3]	@ movhi
-	mov	r2, #-1
-	ldr	r3, .L583+8
-	str	r4, [r3]
-	ldr	r3, .L583+12
-	str	r4, [r3]
-	ldr	r3, .L583+16
-	str	r2, [r3]
-	ldr	r3, .L583+20
-	strh	r4, [r3]	@ movhi
-	ldr	r3, .L583+24
-	ldrh	r2, [r3]
-	ldr	r3, .L583+28
-	lsls	r2, r2, #1
-	ldr	r0, [r3]
-	bl	ftl_memset
-	ldrh	r2, [r5]
-	mov	r1, r4
-	ldr	r3, .L583+32
-	lsls	r2, r2, #1
-	ldr	r0, [r3]
-	bl	ftl_memset
-	ldrh	r2, [r5]
-	mov	r1, r4
-	ldr	r3, .L583+36
-	lsls	r2, r2, #1
+	ldr	r4, .L361
+	ldrh	r2, [r4, #6]
+	cbz	r2, .L360
+	ldrh	r3, [r4, #2]
+	subs	r2, r2, #1
+	strh	r2, [r4, #6]	@ movhi
+	movs	r2, #1
+	adds	r1, r3, #4
+	adds	r3, r3, #1
+	ubfx	r3, r3, #0, #10
+	ldrh	r5, [r4, r1, lsl #1]
+	strh	r3, [r4, #2]	@ movhi
+	mov	r1, r2
+	ldr	r3, .L361+4
 	ldr	r0, [r3]
-	bl	ftl_memset
-	mov	r1, r4
-	movs	r2, #48
-	ldr	r0, .L583+40
-	bl	ftl_memset
-	mov	r2, #512
-	mov	r1, r4
-	ldr	r0, .L583+44
-	bl	ftl_memset
-	bl	FtlGcBufInit
-	bl	FtlL2PDataInit
-	mov	r0, r4
+	lsls	r3, r5, #10
+	str	r3, [r0, #4]
+	bl	FlashEraseBlocks
+	ldr	r2, .L361+8
+	ldr	r3, [r2]
+	adds	r3, r3, #1
+	str	r3, [r2]
+.L357:
+	subs	r3, r5, #1
+	movw	r2, #65533
+	uxth	r3, r3
+	cmp	r3, r2
+	bls	.L358
+	ldrh	r2, [r4, #6]
+	mov	r1, r5
+	ldr	r0, .L361+12
+	bl	printf
+.L359:
+	b	.L359
+.L360:
+	movw	r5, #65535
+	b	.L357
+.L358:
+	mov	r0, r5
 	pop	{r3, r4, r5, pc}
-.L584:
+.L362:
+	.align	2
+.L361:
+	.word	.LANCHOR38
+	.word	.LANCHOR79
+	.word	.LANCHOR80
+	.word	.LC9
+	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
+	.section	.text.ftl_map_blk_alloc_new_blk,"ax",%progbits
+	.align	1
+	.global	ftl_map_blk_alloc_new_blk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_map_blk_alloc_new_blk, %function
+ftl_map_blk_alloc_new_blk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldrh	r1, [r0, #10]
+	ldr	r2, [r0, #12]
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r4, r0
+	movs	r3, #0
+.L364:
+	uxth	r5, r3
+	cmp	r5, r1
+	bcs	.L367
+	mov	r7, r2
+	adds	r3, r3, #1
+	ldrh	r6, [r7]
+	adds	r2, r2, #2
+	cmp	r6, #0
+	bne	.L364
+	bl	FtlFreeSysBlkQueueOut
+	subs	r3, r0, #1
+	movw	r2, #65533
+	uxth	r3, r3
+	mov	r1, r0
+	strh	r0, [r7]	@ movhi
+	cmp	r3, r2
+	bls	.L365
+	ldr	r3, .L371
+	ldr	r0, .L371+4
+	ldrh	r2, [r3, #6]
+	bl	printf
+.L366:
+	b	.L366
+.L365:
+	ldr	r3, [r4, #28]
+	strh	r6, [r4, #2]	@ movhi
+	strh	r5, [r4]	@ movhi
+	adds	r3, r3, #1
+	str	r3, [r4, #28]
+	ldrh	r3, [r4, #8]
+	adds	r3, r3, #1
+	strh	r3, [r4, #8]	@ movhi
+.L367:
+	ldrh	r3, [r4, #10]
+	cmp	r3, r5
+	bhi	.L369
+	movw	r2, #578
+	ldr	r1, .L371+8
+	ldr	r0, .L371+12
+	bl	printf
+.L369:
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, pc}
+.L372:
 	.align	2
-.L583:
-	.word	.LANCHOR142
-	.word	.LANCHOR6
-	.word	.LANCHOR143
-	.word	.LANCHOR144
-	.word	.LANCHOR145
-	.word	.LANCHOR35
-	.word	.LANCHOR27
-	.word	.LANCHOR36
-	.word	.LANCHOR43
-	.word	.LANCHOR126
-	.word	.LANCHOR39
+.L371:
+	.word	.LANCHOR38
+	.word	.LC10
 	.word	.LANCHOR81
-	.size	FtlVariablesInit, .-FtlVariablesInit
-	.section	.text.SupperBlkListInit,"ax",%progbits
+	.word	.LC1
+	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
+	.section	.text.ftl_memset,"ax",%progbits
 	.align	1
-	.global	SupperBlkListInit
+	.global	ftl_memset
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	SupperBlkListInit, %function
-SupperBlkListInit:
-	@ args = 0, pretend = 0, frame = 16
+	.type	ftl_memset, %function
+ftl_memset:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r2, #6
-	ldr	r3, .L596
-	movs	r1, #0
-	movs	r4, #0
-	ldr	r6, .L596+4
-	mov	r8, r4
-	ldrh	r3, [r3]
-	mov	r5, r4
-	ldr	r0, [r6]
-	mov	r10, r6
-	muls	r2, r3, r2
-	bl	ftl_memset
-	ldr	r3, .L596+8
-	ldr	r2, .L596+12
-	str	r4, [r3]
-	ldr	r3, .L596+16
-	strh	r4, [r2]	@ movhi
-	str	r2, [sp, #4]
-	str	r4, [r3]
-	ldr	r3, .L596+20
-	str	r4, [r3]
-	ldr	r3, .L596+24
-	mov	fp, r3
-	strh	r4, [r3]	@ movhi
-.L586:
-	ldr	r3, .L596+28
-	uxth	r7, r4
-	ldrh	r3, [r3]
-	cmp	r7, r3
-	bcs	.L593
-	ldr	r3, .L596+32
-	ldrh	r2, [r3]
-	ldr	r3, .L596+36
-	ldrh	r3, [r3]
-	str	r3, [sp]
-	movs	r3, #0
-	mov	r6, r3
-	b	.L594
-.L588:
-	str	r2, [sp, #12]
-	mov	r1, r7
-	ldr	r2, .L596+40
-	str	r3, [sp, #8]
-	ldrb	r0, [r2, r3]	@ zero_extendqisi2
-	bl	V2P_block
-	bl	FtlBbmIsBadBlock
-	ldr	r3, [sp, #8]
-	ldr	r2, [sp, #12]
-	cbnz	r0, .L587
-	ldr	r1, [sp]
-	add	r6, r6, r1
-	uxth	r6, r6
-.L587:
-	adds	r3, r3, #1
-.L594:
-	uxth	r1, r3
-	cmp	r2, r1
-	bhi	.L588
-	uxth	r3, r4
-	cbz	r6, .L589
-	mov	r1, r6
-	str	r3, [sp]
-	mov	r0, #32768
-	bl	__aeabi_idiv
-	ldr	r3, [sp]
-	uxth	r6, r0
-.L590:
-	ldr	r1, [r10]
-	movs	r2, #6
-	mla	r2, r2, r3, r1
-	strh	r6, [r2, #4]	@ movhi
-	ldr	r2, .L596+44
-	ldrh	r2, [r2]
-	cmp	r2, r7
-	beq	.L591
-	ldr	r2, .L596+48
-	ldrh	r2, [r2]
-	cmp	r2, r7
-	beq	.L591
-	ldr	r2, .L596+52
-	ldrh	r2, [r2]
-	cmp	r2, r7
-	beq	.L591
-	ldr	r2, .L596+56
-	ldr	r2, [r2]
-	ldrh	r3, [r2, r3, lsl #1]
-	cbnz	r3, .L592
-	add	r8, r8, #1
-	mov	r0, r7
-	uxth	r8, r8
-	bl	INSERT_FREE_LIST
-.L591:
-	adds	r4, r4, #1
-	b	.L586
-.L589:
-	ldr	r2, .L596+56
-	movw	r1, #65535
-	ldr	r2, [r2]
-	strh	r1, [r2, r3, lsl #1]	@ movhi
-	b	.L590
-.L592:
-	adds	r5, r5, #1
-	mov	r0, r7
-	uxth	r5, r5
-	bl	INSERT_DATA_LIST
-	b	.L591
-.L593:
-	ldr	r2, [sp, #4]
-	strh	r8, [fp]	@ movhi
-	strh	r5, [r2]	@ movhi
-	add	r5, r5, r8
-	cmp	r5, r3
-	ble	.L595
-	movw	r2, #2170
-	ldr	r1, .L596+60
-	ldr	r0, .L596+64
-	bl	printf
-.L595:
-	movs	r0, #0
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L597:
-	.align	2
-.L596:
-	.word	.LANCHOR6
-	.word	.LANCHOR40
-	.word	.LANCHOR47
-	.word	.LANCHOR45
-	.word	.LANCHOR41
-	.word	.LANCHOR44
-	.word	.LANCHOR48
-	.word	.LANCHOR5
-	.word	.LANCHOR3
-	.word	.LANCHOR19
-	.word	.LANCHOR13
-	.word	.LANCHOR51
-	.word	.LANCHOR52
-	.word	.LANCHOR53
-	.word	.LANCHOR42
-	.word	.LANCHOR146
-	.word	.LC1
-	.size	SupperBlkListInit, .-SupperBlkListInit
-	.section	.text.FtlGcPageVarInit,"ax",%progbits
+	@ link register save eliminated.
+	b	memset
+	.size	ftl_memset, .-ftl_memset
+	.section	.text.FtlMemInit,"ax",%progbits
 	.align	1
-	.global	FtlGcPageVarInit
+	.global	FtlMemInit
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlGcPageVarInit, %function
-FtlGcPageVarInit:
+	.type	FtlMemInit, %function
+FtlMemInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L599
-	movs	r3, #0
-	push	{r4, lr}
-	movs	r1, #255
-	ldr	r4, .L599+4
+	ldr	r3, .L379
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #0
+	ldr	r2, .L379+4
+	movs	r6, #12
+	str	r4, [r3]
+	ldr	r3, .L379+8
+	ldr	r5, .L379+12
+	ldr	r10, .L379+292
+	str	r4, [r3]
+	ldr	r3, .L379+16
+	ldrh	r0, [r5]
+	ldr	r8, .L379+296
+	str	r4, [r3]
+	ldr	r3, .L379+20
+	lsls	r0, r0, #1
+	ldr	fp, .L379+300
+	str	r4, [r3]
+	ldr	r3, .L379+24
+	str	r4, [r3]
+	ldr	r3, .L379+28
+	str	r4, [r3]
+	ldr	r3, .L379+32
+	str	r4, [r3]
+	ldr	r3, .L379+36
+	str	r4, [r3]
+	ldr	r3, .L379+40
+	str	r4, [r3]
+	ldr	r3, .L379+44
+	str	r4, [r3]
+	ldr	r3, .L379+48
+	str	r4, [r3]
+	ldr	r3, .L379+52
+	str	r4, [r3]
+	ldr	r3, .L379+56
+	str	r4, [r3]
+	ldr	r3, .L379+60
+	str	r4, [r3]
+	ldr	r3, .L379+64
+	str	r4, [r3]
+	movw	r3, #65535
+	str	r3, [r2]
+	ldr	r2, .L379+68
+	str	r4, [r2]
+	ldr	r2, .L379+72
+	str	r4, [r2]
+	ldr	r2, .L379+76
+	str	r4, [r2]
+	ldr	r2, .L379+80
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L599+8
+	ldr	r2, .L379+84
 	strh	r3, [r2]	@ movhi
-	ldrh	r2, [r4]
-	ldr	r3, .L599+12
-	lsls	r2, r2, #1
-	ldr	r0, [r3]
+	movs	r2, #32
+	ldr	r3, .L379+88
+	strh	r2, [r3]	@ movhi
+	movs	r2, #128
+	ldr	r3, .L379+92
+	strh	r2, [r3]	@ movhi
+	ldr	r3, .L379+96
+	strh	r4, [r3]	@ movhi
+	ldr	r3, .L379+100
+	strh	r4, [r3]	@ movhi
+	ldr	r3, .L379+104
+	strh	r4, [r3]	@ movhi
+	bl	ftl_malloc
+	ldr	r3, .L379+108
+	str	r0, [r3]
+	ldrh	r0, [r5]
+	movs	r5, #20
+	muls	r0, r6, r0
+	bl	ftl_malloc
+	ldr	r3, .L379+112
+	str	r0, [r3]
+	ldrh	r3, [r10]
+	muls	r5, r3, r5
+	lsls	r7, r5, #2
+	mov	r0, r7
+	bl	ftl_malloc
+	ldr	r3, .L379+116
+	str	r0, [r3]
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L379+120
+	str	r0, [r3]
+	mov	r0, r7
+	bl	ftl_malloc
+	ldr	r3, .L379+124
+	ldr	r7, .L379+128
+	str	r0, [r3]
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L379+132
+	str	r0, [r3]
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L379+136
+	ldrh	r5, [r7]
+	str	r0, [r3]
+	ldrh	r3, [r10]
+	mov	r0, r5
+	lsls	r3, r3, #1
+	adds	r3, r3, #1
+	str	r3, [r8]
+	bl	ftl_malloc
+	ldr	r3, .L379+140
+	str	r0, [r3]
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L379+144
+	str	r0, [r3]
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L379+148
+	str	r0, [r3]
+	ldr	r0, [r8]
+	muls	r0, r5, r0
+	bl	ftl_malloc
+	ldr	r3, .L379+152
+	str	r0, [r3]
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L379+156
+	str	r0, [r3]
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L379+160
+	str	r0, [r3]
+	ldr	r0, [r8]
+	muls	r0, r6, r0
+	bl	ftl_malloc
+	ldr	r3, .L379+164
+	str	r0, [r3]
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L379+168
+	str	r0, [r3]
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L379+172
+	str	r0, [r3]
+	ldr	r3, .L379+176
+	ldrh	r0, [r3]
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L379+180
+	ldrh	r5, [r10]
+	ldr	r10, .L379+304
+	str	r0, [r3]
+	ldrh	r3, [fp]
+	muls	r5, r3, r5
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L379+184
+	str	r0, [r3]
+	lsls	r0, r5, #2
+	ldr	r5, .L379+188
+	bl	ftl_malloc
+	ldr	r3, .L379+192
+	str	r0, [r3]
+	ldrh	r3, [fp]
+	ldr	r0, [r8]
+	ldr	r8, .L379+308
+	muls	r0, r3, r0
+	bl	ftl_malloc
+	ldr	r3, .L379+196
+	str	r0, [r3]
+	ldrh	r0, [r5]
+	lsls	r0, r0, #1
+	uxth	r0, r0
+	strh	r0, [r8]	@ movhi
+	bl	ftl_malloc
+	ldr	r3, .L379+200
+	str	r0, [r3]
+	ldrh	r3, [r8]
+	ldr	r0, .L379+204
+	addw	r3, r3, #547
+	lsrs	r3, r3, #9
+	and	r0, r0, r3, lsl #9
+	strh	r3, [r8]	@ movhi
+	bl	ftl_malloc
+	ldr	r3, .L379+208
+	str	r0, [r3]
+	adds	r0, r0, #32
+	ldr	r3, .L379+212
+	str	r0, [r3]
+	ldrh	r0, [r5]
+	lsls	r0, r0, #1
+	bl	ftl_malloc
+	ldr	r3, .L379+216
+	str	r0, [r3]
+	ldr	r3, [r10]
+	lsl	r8, r3, #1
+	mov	r0, r8
+	bl	ftl_malloc
+	ldr	r3, .L379+220
+	str	r0, [r3]
+	mov	r0, r8
+	bl	ftl_malloc
+	ldr	r3, .L379+224
+	ldr	r8, .L379+312
+	str	r0, [r3]
+	ldrh	r0, [r5]
+	lsrs	r0, r0, #3
+	adds	r0, r0, #4
+	bl	ftl_malloc
+	ldr	r3, .L379+228
+	str	r0, [r3]
+	ldrh	r0, [r8]
+	lsls	r0, r0, #1
+	bl	ftl_malloc
+	ldr	r3, .L379+232
+	str	r0, [r3]
+	ldrh	r0, [r8]
+	lsls	r0, r0, #1
+	bl	ftl_malloc
+	ldr	r3, .L379+236
+	str	r0, [r3]
+	ldrh	r0, [r8]
+	ldr	r8, .L379+316
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L379+240
+	str	r0, [r3]
+	ldrh	r0, [r8]
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldrh	r2, [r8]
+	mov	r1, r4
+	ldr	r3, .L379+244
+	ldr	r4, .L379+248
+	lsls	r2, r2, #2
+	str	r0, [r3]
 	bl	ftl_memset
+	ldr	r3, .L379+252
+	ldrh	r0, [r3]
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L379+256
+	str	r0, [r3]
+	ldr	r0, [r10]
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L379+260
+	str	r0, [r3]
+	ldrh	r0, [r4]
+	muls	r0, r6, r0
+	ldr	r6, .L379+264
+	bl	ftl_malloc
+	ldr	r3, .L379+268
+	str	r0, [r3]
 	ldrh	r3, [r4]
-	movs	r2, #12
-	movs	r1, #255
-	muls	r2, r3, r2
-	ldr	r3, .L599+16
-	ldr	r0, [r3]
-	bl	ftl_memset
-	pop	{r4, lr}
-	b	FtlGcBufInit
-.L600:
+	ldrh	r0, [r7]
+	muls	r0, r3, r0
+	bl	ftl_malloc
+	ldr	r3, .L379+272
+	str	r0, [r3]
+	movs	r0, #6
+	ldrh	r3, [r5]
+	ldr	r5, .L379+276
+	muls	r0, r3, r0
+	bl	ftl_malloc
+	ldr	r3, .L379+280
+	str	r0, [r3]
+	ldr	r3, .L379+284
+	ldrh	r0, [r3]
+	ldrh	r3, [r6]
+	adds	r0, r0, #31
+	asrs	r0, r0, #5
+	strh	r0, [r5]	@ movhi
+	muls	r0, r3, r0
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldrh	r1, [r5]
+	movs	r2, #1
+	ldr	r3, .L379+288
+	ldrh	r6, [r6]
+	lsls	r1, r1, #2
+	mov	r4, r3
+	str	r0, [r4, #28]!
+	mov	r0, r1
+	b	.L380
+.L381:
 	.align	2
-.L599:
+.L379:
+	.word	.LANCHOR82
 	.word	.LANCHOR96
+	.word	.LANCHOR83
 	.word	.LANCHOR21
-	.word	.LANCHOR97
+	.word	.LANCHOR84
+	.word	.LANCHOR85
+	.word	.LANCHOR86
+	.word	.LANCHOR87
+	.word	.LANCHOR88
+	.word	.LANCHOR89
+	.word	.LANCHOR90
+	.word	.LANCHOR91
+	.word	.LANCHOR80
+	.word	.LANCHOR92
+	.word	.LANCHOR93
+	.word	.LANCHOR94
 	.word	.LANCHOR95
+	.word	.LANCHOR97
 	.word	.LANCHOR98
-	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
-	.section	.text.FlashGetBadBlockList,"ax",%progbits
-	.align	1
-	.global	FlashGetBadBlockList
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FlashGetBadBlockList, %function
-FlashGetBadBlockList:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	mov	r2, #256
-	mov	r5, r1
-	movs	r1, #255
-	mov	r4, r0
-	bl	ftl_memset
-	ldr	r3, .L608
-	mov	r1, r5
-	mov	r0, r4
-	ldr	r3, [r3]
-	blx	r3
-	uxth	r0, r0
-	cmp	r0, #50
-	bls	.L602
-	mov	r2, #256
-	movs	r1, #255
-	mov	r0, r4
-	bl	ftl_memset
-	movs	r0, #0
-.L602:
-	ldr	r3, .L608+4
-	ldrh	r3, [r3, #14]
-	cmp	r3, #4
-	bne	.L607
-	add	r1, r4, r0, lsl #1
-	mov	r3, r4
-.L604:
-	cmp	r3, r1
-	bne	.L605
-.L607:
-	pop	{r3, r4, r5, pc}
-.L605:
-	ldrh	r2, [r3]
-	lsrs	r2, r2, #1
-	strh	r2, [r3], #2	@ movhi
-	b	.L604
-.L609:
-	.align	2
-.L608:
+	.word	.LANCHOR99
+	.word	.LANCHOR72
+	.word	.LANCHOR73
+	.word	.LANCHOR100
+	.word	.LANCHOR101
+	.word	.LANCHOR102
+	.word	.LANCHOR74
+	.word	.LANCHOR76
+	.word	.LANCHOR68
+	.word	.LANCHOR71
+	.word	.LANCHOR103
+	.word	.LANCHOR104
 	.word	.LANCHOR105
-	.word	.LANCHOR0
-	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
-	.section	.text.ftl_memcpy,"ax",%progbits
-	.align	1
-	.global	ftl_memcpy
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_memcpy, %function
-ftl_memcpy:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	memcpy
-	.size	ftl_memcpy, .-ftl_memcpy
-	.section	.text.FlashReadPages,"ax",%progbits
-	.align	1
-	.global	FlashReadPages
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FlashReadPages, %function
-FlashReadPages:
-	@ args = 0, pretend = 0, frame = 16
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	fp, r1
-	ldr	r3, .L639
-	mov	r4, r0
-	mov	r10, #0
-	ldrh	r2, [r3, #12]
-	str	r3, [sp, #4]
-	str	r2, [sp]
-.L612:
-	cmp	r10, fp
-	bne	.L623
+	.word	.LANCHOR23
+	.word	.LANCHOR79
+	.word	.LANCHOR66
+	.word	.LANCHOR106
+	.word	.LANCHOR107
+	.word	.LANCHOR108
+	.word	.LANCHOR64
+	.word	.LANCHOR109
+	.word	.LANCHOR110
+	.word	.LANCHOR63
+	.word	.LANCHOR111
+	.word	.LANCHOR112
+	.word	.LANCHOR12
+	.word	.LANCHOR113
+	.word	.LANCHOR114
+	.word	.LANCHOR6
+	.word	.LANCHOR115
+	.word	.LANCHOR65
+	.word	.LANCHOR117
+	.word	33553920
+	.word	.LANCHOR118
+	.word	.LANCHOR43
+	.word	.LANCHOR42
+	.word	.LANCHOR119
+	.word	.LANCHOR120
+	.word	.LANCHOR1
+	.word	.LANCHOR36
+	.word	.LANCHOR121
+	.word	.LANCHOR122
+	.word	.LANCHOR123
+	.word	.LANCHOR33
+	.word	.LANCHOR32
+	.word	.LANCHOR124
+	.word	.LANCHOR125
+	.word	.LANCHOR10
+	.word	.LANCHOR55
+	.word	.LANCHOR126
+	.word	.LANCHOR127
+	.word	.LANCHOR40
+	.word	.LANCHOR17
+	.word	.LANCHOR37
+	.word	.LANCHOR3
+	.word	.LANCHOR67
+	.word	.LANCHOR24
+	.word	.LANCHOR30
+	.word	.LANCHOR116
+	.word	.LANCHOR27
+	.word	.LANCHOR28
+.L380:
+.L375:
+	cmp	r2, r6
+	bcc	.L376
+	add	r3, r3, r2, lsl #2
+	ldr	r2, .L382
+	movs	r1, #0
+	adds	r3, r3, #24
+.L377:
+	cmp	r3, r2
+	bne	.L378
 	movs	r0, #0
-	add	sp, sp, #16
-	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L623:
-	ldr	r3, [r4, #8]
-	cbz	r3, .L613
-	ldr	r3, [r4, #12]
-	cbnz	r3, .L614
-.L613:
-	movs	r2, #90
-	ldr	r1, .L639+4
-	ldr	r0, .L639+8
-	bl	printf
-.L614:
-	add	r2, sp, #8
-	add	r1, sp, #12
-	ldr	r0, [r4, #4]
-	bl	l2p_addr_tran.isra.0
-	ldr	r0, [sp, #8]
-	cmp	r0, #3
-	bls	.L615
-	mov	r3, #-1
-	str	r3, [r4]
-.L616:
-	add	r10, r10, #1
-	adds	r4, r4, #20
-	b	.L612
-.L615:
-	ldr	r5, [r4, #8]
-	uxtb	r0, r0
-	ldr	r8, .L639+20
-	ldr	r7, .L639+12
-	tst	r5, #63
-	ldr	r3, [r4, #12]
-	it	ne
-	ldrne	r5, [r8]
-	ldr	r1, [sp, #12]
-	ldr	r6, [r7, #12]
-	mov	r2, r5
-	blx	r6
-	ldr	r3, [sp, #4]
-	str	r0, [r4]
-	ldrh	r3, [r3, #14]
-	cmp	r3, #4
-	bne	.L619
-	ldr	r0, [sp]
-	add	r2, r5, #2048
-	ldr	r3, [r4, #12]
-	ldr	r1, [sp, #12]
-	ldr	r7, [r7, #12]
-	adds	r3, r3, #8
-	add	r1, r1, r0
-	ldrb	r0, [sp, #8]	@ zero_extendqisi2
-	blx	r7
-	adds	r3, r0, #1
-	beq	.L620
-	ldr	r3, [r4, #12]
-	ldr	r2, [r3, #12]
-	adds	r2, r2, #1
-	bne	.L621
-	ldr	r2, [r3, #8]
+.L376:
+	ldr	r5, [r3, #28]
 	adds	r2, r2, #1
-	bne	.L621
-	ldr	r3, [r3]
-	adds	r3, r3, #1
-	beq	.L621
-.L620:
-	mov	r3, #-1
-	str	r3, [r4]
-.L621:
-	ldr	r3, [r4]
-	adds	r3, r3, #1
-	beq	.L619
-	cmp	r0, #256
-	it	eq
-	streq	r0, [r4]
-.L619:
-	ldr	r3, [r8]
-	cmp	r5, r3
-	bne	.L616
-	ldr	r0, [r4, #8]
-	cmp	r5, r0
-	beq	.L616
-	ldr	r3, .L639+16
-	mov	r1, r5
-	ldrh	r2, [r3]
-	lsls	r2, r2, #9
-	bl	ftl_memcpy
-	b	.L616
-.L640:
+	add	r5, r5, r0
+	add	r0, r0, r1
+	str	r5, [r4, #4]!
+	b	.L375
+.L378:
+	str	r1, [r3, #4]!
+	b	.L377
+.L383:
 	.align	2
-.L639:
-	.word	.LANCHOR0
-	.word	.LANCHOR147
-	.word	.LC1
-	.word	.LANCHOR105
-	.word	.LANCHOR12
-	.word	.LANCHOR120
-	.size	FlashReadPages, .-FlashReadPages
-	.section	.text.FtlLoadFactoryBbt,"ax",%progbits
+.L382:
+	.word	.LANCHOR37+56
+	.size	FtlMemInit, .-FtlMemInit
+	.section	.text.FtlBbt2Bitmap,"ax",%progbits
 	.align	1
-	.global	FtlLoadFactoryBbt
+	.global	FtlBbt2Bitmap
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlLoadFactoryBbt, %function
-FtlLoadFactoryBbt:
+	.type	FtlBbt2Bitmap, %function
+FtlBbt2Bitmap:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L651
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r6, #0
-	ldr	r5, .L651+4
-	ldr	r3, [r3]
-	ldr	r7, .L651+8
-	ldr	r10, .L651+20
-	str	r3, [r5, #8]
-	ldr	r3, .L651+12
-	ldr	r8, [r3]
-	str	r8, [r5, #12]
-.L642:
-	ldr	r3, .L651+16
-	ldrh	r3, [r3]
-	cmp	r6, r3
-	bcc	.L647
-	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L647:
-	ldrh	r4, [r10]
-	movw	r3, #65535
-	ldr	fp, .L651+4
-	strh	r3, [r7, #2]!	@ movhi
-	subs	r4, r4, #1
-	uxth	r4, r4
-.L643:
-	ldrh	r3, [r10]
-	sub	r2, r3, #15
-	cmp	r2, r4
-	bgt	.L645
-	mla	r3, r6, r3, r4
-	movs	r2, #1
-	mov	r1, r2
-	mov	r0, fp
-	lsls	r3, r3, #10
-	str	r3, [r5, #4]
-	bl	FlashReadPages
-	ldr	r3, [r5]
-	adds	r3, r3, #1
-	beq	.L644
-	ldrh	r2, [r8]
-	movw	r3, #61664
+	ldr	r3, .L390
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r5, r0
+	ldr	r7, .L390+4
+	mov	r6, r1
+	subs	r4, r5, #2
+	addw	r5, r5, #1022
+	ldrh	r2, [r3]
+	movs	r1, #0
+	ldr	r8, .L390+12
+	mov	r0, r6
+	lsls	r2, r2, #2
+	bl	ftl_memset
+.L387:
+	ldrh	r3, [r4, #2]
+	movw	r2, #65535
+	cmp	r3, r2
+	beq	.L384
+	ldrh	r2, [r7]
 	cmp	r2, r3
-	bne	.L644
-	strh	r4, [r7]	@ movhi
-.L645:
-	adds	r6, r6, #1
-	b	.L642
-.L644:
-	subs	r4, r4, #1
-	uxth	r4, r4
-	b	.L643
-.L652:
+	bhi	.L386
+	movs	r2, #74
+	mov	r1, r8
+	ldr	r0, .L390+8
+	bl	printf
+.L386:
+	ldrh	r3, [r4, #2]!
+	movs	r2, #1
+	cmp	r5, r4
+	lsr	r1, r3, #5
+	and	r3, r3, #31
+	lsl	r3, r2, r3
+	ldr	r2, [r6, r1, lsl #2]
+	orr	r2, r2, r3
+	str	r2, [r6, r1, lsl #2]
+	bne	.L387
+.L384:
+	pop	{r4, r5, r6, r7, r8, pc}
+.L391:
 	.align	2
-.L651:
-	.word	.LANCHOR115
-	.word	.LANCHOR148
-	.word	.LANCHOR37+10
-	.word	.LANCHOR123
-	.word	.LANCHOR10
+.L390:
+	.word	.LANCHOR127
 	.word	.LANCHOR17
-	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
-	.section	.text.FtlGetLastWrittenPage,"ax",%progbits
+	.word	.LC1
+	.word	.LANCHOR128
+	.size	FtlBbt2Bitmap, .-FtlBbt2Bitmap
+	.section	.text.FtlBbtMemInit,"ax",%progbits
 	.align	1
-	.global	FtlGetLastWrittenPage
+	.global	FtlBbtMemInit
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlGetLastWrittenPage, %function
-FtlGetLastWrittenPage:
-	@ args = 0, pretend = 0, frame = 88
+	.type	FtlBbtMemInit, %function
+FtlBbtMemInit:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	cmp	r1, #1
-	push	{r4, r5, r6, r7, r8, lr}
-	it	eq
-	ldreq	r3, .L665
-	sub	sp, sp, #88
-	lsl	r7, r0, #10
-	mov	r2, r1
-	it	ne
-	ldrne	r3, .L665+4
-	mov	r6, r1
-	add	r0, sp, #4
-	movs	r1, #1
-	ldrh	r5, [r3]
-	ldr	r3, .L665+8
-	subs	r5, r5, #1
-	ldr	r3, [r3]
-	sxth	r5, r5
-	str	r3, [sp, #12]
-	add	r3, sp, #24
-	str	r3, [sp, #16]
-	orr	r3, r5, r7
-	str	r3, [sp, #8]
-	bl	FlashReadPages
-	ldr	r3, [sp, #24]
-	adds	r3, r3, #1
-	bne	.L656
-	mov	r8, #0
-.L657:
-	cmp	r8, r5
-	ble	.L660
-.L656:
-	mov	r0, r5
-	add	sp, sp, #88
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, pc}
-.L660:
-	add	r3, r8, r5
-	mov	r2, r6
-	add	r3, r3, r3, lsr #31
-	movs	r1, #1
-	add	r0, sp, #4
-	asrs	r4, r3, #1
-	sxth	r3, r4
-	orrs	r3, r3, r7
-	str	r3, [sp, #8]
-	bl	FlashReadPages
-	ldr	r3, [sp, #24]
-	adds	r3, r3, #1
-	bne	.L658
-	ldr	r3, [sp, #28]
-	adds	r3, r3, #1
-	bne	.L658
-	ldr	r3, [sp, #4]
-	adds	r3, r3, #1
-	beq	.L658
-	subs	r4, r4, #1
-	sxth	r5, r4
-	b	.L657
-.L658:
-	adds	r4, r4, #1
-	sxth	r8, r4
-	b	.L657
-.L666:
+	@ link register save eliminated.
+	ldr	r0, .L393
+	movw	r3, #65535
+	movs	r2, #16
+	movs	r1, #255
+	strh	r3, [r0]	@ movhi
+	movs	r3, #0
+	strh	r3, [r0, #6]	@ movhi
+	adds	r0, r0, #12
+	b	ftl_memset
+.L394:
 	.align	2
-.L665:
-	.word	.LANCHOR20
-	.word	.LANCHOR19
-	.word	.LANCHOR121
-	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
-	.section	.text.FtlScanSysBlk,"ax",%progbits
+.L393:
+	.word	.LANCHOR37
+	.size	FtlBbtMemInit, .-FtlBbtMemInit
+	.section	.text.FtlFreeSysBlkQueueInit,"ax",%progbits
 	.align	1
-	.global	FtlScanSysBlk
+	.global	FtlFreeSysBlkQueueInit
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlScanSysBlk, %function
-FtlScanSysBlk:
-	@ args = 0, pretend = 0, frame = 32
+	.type	FtlFreeSysBlkQueueInit, %function
+FtlFreeSysBlkQueueInit:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r3, .L396
+	mov	r2, #2048
+	push	{r4, lr}
 	movs	r4, #0
-	ldr	r5, .L748
-	sub	sp, sp, #32
-	mov	r1, r4
-	ldr	r3, .L748+4
-	ldr	r2, [r5]
-	ldr	r6, .L748+8
-	strh	r4, [r3]	@ movhi
-	ldr	r3, .L748+12
-	lsls	r2, r2, #2
-	strh	r4, [r6]	@ movhi
-	ldr	r7, .L748+16
-	ldr	r0, [r3]
-	bl	ftl_memset
-	ldr	r2, [r5]
-	mov	r1, r4
-	ldr	r3, .L748+20
-	lsls	r2, r2, #1
-	ldr	r0, [r3]
-	bl	ftl_memset
-	ldrh	r2, [r7]
-	mov	r1, r4
-	ldr	r3, .L748+24
-	lsls	r2, r2, #2
-	ldr	r0, [r3]
-	bl	ftl_memset
-	ldrh	r2, [r7]
 	mov	r1, r4
-	ldr	r3, .L748+28
-	lsls	r2, r2, #1
-	ldr	r0, [r3]
-	bl	ftl_memset
-	movs	r2, #12
-	movs	r1, #255
-	ldr	r0, .L748+32
+	strh	r4, [r3, #2]	@ movhi
+	strh	r4, [r3, #4]	@ movhi
+	strh	r4, [r3, #6]	@ movhi
+	strh	r0, [r3], #8	@ movhi
+	mov	r0, r3
 	bl	ftl_memset
-	ldr	r3, .L748+36
-	str	r6, [sp, #12]
-	str	r5, [sp, #16]
-	ldrh	r3, [r3]
-	str	r3, [sp, #4]
-.L668:
-	ldr	r3, .L748+40
-	ldr	r2, [sp, #4]
-	ldrh	r3, [r3]
-	cmp	r3, r2
-	bls	.L709
-	ldr	r3, .L748+44
-	movs	r5, #0
-	ldr	r1, .L748+48
-	mov	fp, r5
-	movs	r7, #20
-	ldrh	r8, [r3]
-	ldr	r3, .L748+52
-	ldr	r2, [r1]
-	ldr	r1, .L748+56
-	ldr	r6, [r3]
-	ldr	r3, .L748+60
-	str	r2, [sp, #8]
-	ldrh	r10, [r1]
-	ldr	r3, [r3]
-	ldr	r2, .L748+64
-	b	.L710
-.L670:
-	ldrb	r0, [r2, r5]	@ zero_extendqisi2
-	ldr	r1, [sp, #4]
-	str	r3, [sp, #28]
-	str	r2, [sp, #24]
-	bl	V2P_block
-	str	r0, [sp, #20]
-	bl	FtlBbmIsBadBlock
-	ldr	r2, [sp, #24]
-	ldr	r3, [sp, #28]
-	cbnz	r0, .L669
-	ldr	r1, [sp, #20]
-	mla	r0, r7, fp, r6
-	ldr	r4, [sp, #8]
-	lsls	r1, r1, #10
-	str	r3, [r0, #8]
-	str	r1, [r0, #4]
-	mul	r1, r10, fp
-	bic	r1, r1, #3
-	add	r1, r1, r4
-	str	r1, [r0, #12]
-	add	r1, fp, #1
-	uxth	fp, r1
-.L669:
-	adds	r5, r5, #1
-.L710:
-	uxth	r1, r5
-	cmp	r8, r1
-	bhi	.L670
-	cmp	fp, #0
-	bne	.L671
-.L708:
-	ldr	r3, [sp, #4]
-	adds	r3, r3, #1
-	uxth	r3, r3
-	str	r3, [sp, #4]
-	b	.L668
-.L671:
-	movs	r7, #0
-	movs	r2, #1
-	mov	r1, fp
-	mov	r0, r6
-	bl	FlashReadPages
-.L672:
-	uxth	r3, r7
-	cmp	fp, r3
-	bls	.L708
-	ldr	r3, .L748+52
-	mov	r8, #20
-	mul	r8, r8, r7
-	ldr	r3, [r3]
-	add	r2, r3, r8
-	ldr	r3, [r3, r8]
-	ldr	r5, [r2, #4]
-	ldr	r6, [r2, #12]
-	adds	r3, r3, #1
-	ubfx	r5, r5, #10, #16
-	bne	.L675
-	mov	r10, #16
-.L677:
-	ldr	r3, .L748+52
-	movs	r2, #1
-	mov	r1, r2
-	ldr	r0, [r3]
-	add	r0, r0, r8
-	ldr	r3, [r0, #4]
-	adds	r3, r3, #1
-	str	r3, [r0, #4]
-	bl	FlashReadPages
-	ldrh	r2, [r6]
-	movw	r3, #65535
-	cmp	r2, r3
-	ldr	r3, .L748+52
-	ldr	r3, [r3]
-	bne	.L674
-	mov	r2, #-1
-	str	r2, [r3, r8]
-	ldr	r3, .L748+52
-	ldr	r3, [r3]
-	ldr	r3, [r3, r8]
-	cmp	r3, r2
-	bne	.L675
-.L676:
-	movs	r1, #1
-	b	.L747
-.L674:
-	ldr	r3, [r3, r8]
-	adds	r3, r3, #1
-	bne	.L675
-	add	r10, r10, #-1
-	uxth	r10, r10
-	cmp	r10, #0
-	bne	.L677
-	b	.L676
-.L675:
-	ldr	r3, .L748+68
-	ldr	r2, [r3]
-	ldr	r3, [r6, #4]
-	adds	r1, r2, #1
-	beq	.L678
-	cmp	r2, r3
-	bhi	.L679
-.L678:
-	adds	r2, r3, #1
-	ittt	ne
-	ldrne	r1, .L748+68
-	addne	r2, r3, #1
-	strne	r2, [r1]
-.L679:
-	ldrh	r2, [r6]
-	movw	r1, #61604
-	cmp	r2, r1
-	beq	.L681
-	bhi	.L682
-	movw	r3, #61574
-	cmp	r2, r3
-	beq	.L683
-.L680:
-	adds	r7, r7, #1
-	b	.L672
-.L682:
-	movw	r3, #61634
-	cmp	r2, r3
-	beq	.L684
-	movw	r3, #65535
-	cmp	r2, r3
-	bne	.L680
+	mov	r0, r4
+	pop	{r4, pc}
+.L397:
+	.align	2
+.L396:
+	.word	.LANCHOR38
+	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
+	.section	.text.ftl_free_no_use_map_blk,"ax",%progbits
+	.align	1
+	.global	ftl_free_no_use_map_blk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_free_no_use_map_blk, %function
+ftl_free_no_use_map_blk:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldrh	r2, [r0, #10]
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r0
+	ldr	r5, [r0, #20]
 	movs	r1, #0
-.L747:
+	ldr	r7, [r0, #12]
+	lsls	r2, r2, #1
+	ldr	r6, [r0, #24]
 	mov	r0, r5
-	bl	FtlFreeSysBlkQueueIn
-	b	.L680
-.L684:
-	ldr	r3, .L748+8
+	bl	ftl_memset
+	movs	r3, #0
+.L399:
+	ldrh	r1, [r4, #6]
+	uxth	r2, r3
+	cmp	r1, r2
+	bhi	.L403
+	ldr	r3, .L418
+	movs	r6, #0
+	mov	r10, r6
 	ldrh	r2, [r3]
-	ldr	r3, .L748
-	ldr	r3, [r3]
-	cmp	r2, r3
-	bls	.L686
-	movw	r2, #1222
-	ldr	r1, .L748+72
-	ldr	r0, .L748+76
-	bl	printf
-.L686:
-	ldr	r3, [sp, #16]
-	ldr	r2, [sp, #12]
-	ldr	r1, [r3]
-	ldrh	r0, [r2]
-	ldr	r2, .L748+12
-	uxth	r10, r1
-	ldr	ip, [r2]
-	add	r3, r10, #-1
-	sub	r10, r10, r0
-	add	r10, r10, #-1
-	sxth	r3, r3
-	sxth	r10, r10
-.L687:
-	cmp	r3, r10
-	bgt	.L693
-	cmp	r3, #0
-	bge	.L725
-	b	.L680
-.L693:
-	ldr	r2, [ip, r3, lsl #2]
-	add	r8, ip, r3, lsl #2
-	ldr	r4, [r6, #4]
-	cmp	r4, r2
-	bls	.L688
-	ldr	r2, [ip]
-	cbnz	r2, .L689
-	cmp	r1, r0
-	ittt	ne
-	ldrne	r2, .L748+8
-	addne	r0, r0, #1
-	strhne	r0, [r2]	@ movhi
-.L689:
-	ldr	r2, .L748+20
-	uxth	r10, r3
-	ldr	r0, [r2]
+	ldrh	r3, [r4]
+	strh	r2, [r5, r3, lsl #1]	@ movhi
+	mov	r2, r6
+	ldrh	fp, [r5]
+.L404:
+	ldrh	r3, [r4, #10]
+	uxth	ip, r6
+	cmp	r3, ip
+	bhi	.L408
+	mov	r0, r10
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L403:
+	uxth	r2, r3
+	ldr	r1, [r6, r2, lsl #2]
 	movs	r2, #0
-.L690:
-	uxth	lr, r2
-	sxth	r1, r2
-	cmp	r10, lr
-	bhi	.L691
-	ldr	r2, [r6, #4]
+	ubfx	r1, r1, #10, #16
+.L400:
+	ldrh	ip, [r4, #10]
+	uxth	r0, r2
+	cmp	ip, r0
+	bhi	.L402
+	adds	r3, r3, #1
+	b	.L399
+.L402:
+	uxth	r0, r2
+	ldrh	ip, [r7, r0, lsl #1]
+	cmp	ip, r1
+	bne	.L401
+	cbz	r1, .L401
+	ldrh	ip, [r5, r0, lsl #1]
+	add	ip, ip, #1
+	strh	ip, [r5, r0, lsl #1]	@ movhi
+.L401:
+	adds	r2, r2, #1
+	b	.L400
+.L408:
+	uxth	r1, r6
+	ldrh	r3, [r5, r1, lsl #1]
+	lsl	r8, r1, #1
+	cmp	fp, r3
+	bls	.L405
+	ldrh	r0, [r7, r1, lsl #1]
+	add	r8, r8, r7
+	cbnz	r0, .L406
+.L407:
+	adds	r6, r6, #1
+	b	.L404
+.L405:
 	cmp	r3, #0
-	str	r2, [r8]
-	strh	r5, [r0, r3, lsl #1]	@ movhi
-	blt	.L680
-	ldr	r2, .L748+8
-	ldrh	r0, [r2]
-	ldr	r2, .L748
+	bne	.L407
+	ldrh	r0, [r7, r1, lsl #1]
+	add	r8, r8, r7
+	cmp	r0, #0
+	beq	.L407
+.L409:
+	movs	r1, #1
+	str	r2, [sp, #4]
+	bl	FtlFreeSysBlkQueueIn
+	ldr	r2, [sp, #4]
+	strh	r2, [r8]	@ movhi
+	ldrh	r3, [r4, #8]
+	subs	r3, r3, #1
+	strh	r3, [r4, #8]	@ movhi
+	b	.L407
+.L406:
+	mov	r10, ip
+	mov	fp, r3
+	cmp	r3, #0
+	beq	.L409
+	b	.L407
+.L419:
+	.align	2
+.L418:
+	.word	.LANCHOR20
+	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
+	.section	.text.FtlL2PDataInit,"ax",%progbits
+	.align	1
+	.global	FtlL2PDataInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlL2PDataInit, %function
+FtlL2PDataInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, lr}
+	movs	r1, #0
+	ldr	r5, .L423
+	ldr	r4, .L423+4
+	ldr	r2, [r5]
+	ldr	r7, .L423+8
+	ldr	r6, .L423+12
+	ldr	r0, [r4]
+	lsls	r2, r2, #1
+	ldr	r8, .L423+44
+	bl	ftl_memset
+	ldrh	r3, [r7]
+	movs	r1, #255
+	ldrh	r2, [r6]
+	ldr	r0, [r8]
+	muls	r2, r3, r2
+	bl	ftl_memset
+	ldr	r3, .L423+16
+	movw	r0, #65535
+	ldrh	r1, [r6]
+	ldr	ip, [r8]
+	ldr	r2, [r3]
+	movs	r3, #12
+	ldrh	r7, [r7]
+	mla	r3, r1, r3, r3
+	adds	r1, r2, r3
+	movs	r3, #0
+	mov	lr, r3
+.L421:
+	adds	r2, r2, #12
+	adds	r6, r3, r7
+	cmp	r2, r1
+	bne	.L422
+	ldr	r3, .L423+20
+	ldr	r2, [r5]
+	strh	r0, [r3, #2]	@ movhi
+	strh	r2, [r3, #10]	@ movhi
+	movw	r2, #61634
+	strh	r2, [r3, #4]	@ movhi
+	ldr	r2, .L423+24
+	strh	r0, [r3]	@ movhi
+	ldrh	r2, [r2]
+	strh	r2, [r3, #8]	@ movhi
+	ldr	r2, .L423+28
+	ldrh	r2, [r2]
+	strh	r2, [r3, #6]	@ movhi
+	ldr	r2, .L423+32
 	ldr	r2, [r2]
-	subs	r2, r2, r0
-	subs	r2, r2, #1
-	sxth	r2, r2
-	cmp	r3, r2
-	bgt	.L680
-.L725:
-	ldr	r2, .L748+8
-	adds	r0, r0, #1
-	strh	r0, [r2]	@ movhi
-	ldr	r2, [r6, #4]
-	str	r2, [ip, r3, lsl #2]
-	ldr	r2, .L748+20
-.L745:
+	str	r2, [r3, #12]
+	ldr	r2, .L423+36
 	ldr	r2, [r2]
-	strh	r5, [r2, r3, lsl #1]	@ movhi
-	b	.L680
-.L691:
-	add	lr, ip, r1, lsl #2
-	adds	r2, r2, #1
-	ldr	r4, [lr, #4]
-	add	lr, r0, r1, lsl #1
-	ldrh	lr, [lr, #2]
-	str	r4, [ip, r1, lsl #2]
-	strh	lr, [r0, r1, lsl #1]	@ movhi
-	b	.L690
-.L688:
-	subs	r3, r3, #1
-	sxth	r3, r3
-	b	.L687
-.L749:
+	str	r2, [r3, #16]
+	ldr	r2, [r4]
+	str	r2, [r3, #20]
+	ldr	r2, .L423+40
+	ldr	r2, [r2]
+	str	r2, [r3, #24]
+	pop	{r4, r5, r6, r7, r8, pc}
+.L422:
+	bic	r3, r3, #3
+	str	lr, [r2, #-8]
+	add	r3, r3, ip
+	strh	r0, [r2, #-12]	@ movhi
+	str	r3, [r2, #-4]
+	mov	r3, r6
+	b	.L421
+.L424:
 	.align	2
-.L748:
+.L423:
 	.word	.LANCHOR30
-	.word	.LANCHOR35
-	.word	.LANCHOR141
-	.word	.LANCHOR135
-	.word	.LANCHOR27
+	.word	.LANCHOR120
+	.word	.LANCHOR23
+	.word	.LANCHOR33
+	.word	.LANCHOR55
 	.word	.LANCHOR129
-	.word	.LANCHOR132
-	.word	.LANCHOR36
-	.word	.LANCHOR79
-	.word	.LANCHOR5
-	.word	.LANCHOR6
-	.word	.LANCHOR3
-	.word	.LANCHOR92
-	.word	.LANCHOR112
-	.word	.LANCHOR24
-	.word	.LANCHOR91
-	.word	.LANCHOR13
-	.word	.LANCHOR70
-	.word	.LANCHOR149
-	.word	.LC1
-.L683:
-	ldr	r8, .L750+12
-	ldr	r10, .L750+20
-	ldrh	r2, [r8]
-	ldrh	r3, [r10]
-	cmp	r2, r3
-	bls	.L696
-	movw	r2, #1263
-	ldr	r1, .L750
-	ldr	r0, .L750+4
-	bl	printf
-.L696:
-	ldr	r2, .L750+8
-	ldrh	lr, [r10]
-	ldrh	ip, [r8]
-	ldr	r0, [r2]
-	add	r10, lr, #-1
-	sxth	r3, r10
-	sub	r10, r10, ip
-.L697:
-	cmp	r3, r10
-	ble	.L702
-	ldr	r1, [r6, #4]
-	add	r8, r0, r3, lsl #2
-	ldr	r2, [r0, r3, lsl #2]
-	cmp	r1, r2
-	bls	.L698
-	ldr	r2, [r0]
-	cbnz	r2, .L699
-	cmp	lr, ip
-	ittt	ne
-	ldrne	r2, .L750+12
-	addne	ip, ip, #1
-	strhne	ip, [r2]	@ movhi
-.L699:
-	ldr	r2, .L750+16
-	uxth	r10, r3
-	ldr	ip, [r2]
-	movs	r2, #0
-.L700:
-	uxth	lr, r2
-	sxth	r1, r2
-	cmp	r10, lr
-	bhi	.L701
-	ldr	r2, [r6, #4]
-	str	r2, [r8]
-	strh	r5, [ip, r3, lsl #1]	@ movhi
-.L702:
-	cmp	r3, #0
-	blt	.L680
-	ldr	r2, .L750+20
-	ldr	ip, .L750+12
-	ldrh	r2, [r2]
-	ldrh	r1, [ip]
-	subs	r2, r2, #1
-	subs	r2, r2, r1
-	sxth	r2, r2
-	cmp	r3, r2
-	bgt	.L680
-	ldr	r2, [r6, #4]
-	adds	r1, r1, #1
-	strh	r1, [ip]	@ movhi
-	str	r2, [r0, r3, lsl #2]
-	ldr	r2, .L750+16
-	b	.L745
-.L701:
-	add	lr, r0, r1, lsl #2
-	adds	r2, r2, #1
-	ldr	r4, [lr, #4]
-	add	lr, ip, r1, lsl #1
-	ldrh	lr, [lr, #2]
-	str	r4, [r0, r1, lsl #2]
-	strh	lr, [ip, r1, lsl #1]	@ movhi
-	b	.L700
-.L698:
-	subs	r3, r3, #1
-	sxth	r3, r3
-	b	.L697
-.L681:
-	ldr	r8, .L750+40
+	.word	.LANCHOR130
+	.word	.LANCHOR32
+	.word	.LANCHOR119
+	.word	.LANCHOR125
+	.word	.LANCHOR124
+	.word	.LANCHOR126
+	.size	FtlL2PDataInit, .-FtlL2PDataInit
+	.section	.text.FtlVariablesInit,"ax",%progbits
+	.align	1
+	.global	FtlVariablesInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlVariablesInit, %function
+FtlVariablesInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
 	movw	r2, #65535
-	ldrh	r1, [r8]
-	cmp	r1, r2
-	bne	.L704
-.L746:
-	strh	r5, [r8]	@ movhi
-	str	r3, [r8, #8]
-	b	.L680
-.L704:
-	ldrh	r0, [r8, #4]
-	cmp	r0, r2
-	beq	.L705
-	movs	r1, #1
-	bl	FtlFreeSysBlkQueueIn
-.L705:
-	ldr	r3, [r6, #4]
-	ldr	r2, [r8, #8]
-	cmp	r2, r3
-	bcs	.L706
-	ldrh	r2, [r8]
-	strh	r2, [r8, #4]	@ movhi
-	b	.L746
-.L706:
-	strh	r5, [r8, #4]	@ movhi
-	b	.L680
-.L709:
-	ldr	r3, .L750+24
-	ldr	r2, [r3]
-	ldrh	r3, [r2]
-	cbz	r3, .L711
-.L714:
-	ldr	r3, .L750+16
-	ldr	r4, [r3]
-	ldrh	r2, [r4]
-	cmp	r2, #0
-	beq	.L712
-.L713:
-	ldr	r3, .L750+28
+	ldr	r3, .L426
+	movs	r4, #0
+	mov	r1, r4
+	ldr	r5, .L426+4
+	strh	r2, [r3]	@ movhi
+	mov	r2, #-1
+	ldr	r3, .L426+8
+	str	r4, [r3]
+	ldr	r3, .L426+12
+	str	r4, [r3]
+	ldr	r3, .L426+16
+	str	r2, [r3]
+	ldr	r3, .L426+20
+	strh	r4, [r3]	@ movhi
+	ldr	r3, .L426+24
 	ldrh	r2, [r3]
-	ldr	r3, .L750+32
-	ldr	r3, [r3]
-	cmp	r2, r3
-	bls	.L744
-	movw	r2, #1388
-	ldr	r1, .L750
-	ldr	r0, .L750+4
-	bl	printf
-.L744:
-	movs	r0, #0
-	add	sp, sp, #32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L711:
-	ldr	r1, .L750+28
-	ldrh	r1, [r1]
-	cmp	r1, #0
-	beq	.L714
-	ldr	r5, .L750+32
-	ldr	r0, [r5]
-.L715:
-	sxth	r1, r3
-	cmp	r1, r0
-	bcs	.L714
-	ldrh	r4, [r2, r1, lsl #1]
-	adds	r3, r3, #1
-	cmp	r4, #0
-	beq	.L715
-	ldr	r3, .L750+36
-	movs	r6, #0
+	ldr	r3, .L426+28
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldrh	r2, [r5]
+	mov	r1, r4
+	ldr	r3, .L426+32
+	lsls	r2, r2, #1
 	ldr	r0, [r3]
-	mov	r3, r1
-.L716:
-	ldr	r4, [r5]
-	cmp	r3, r4
-	bcs	.L714
-	ldrh	r7, [r2, r3, lsl #1]
-	subs	r4, r3, r1
-	strh	r7, [r2, r4, lsl #1]	@ movhi
-	ldr	r7, [r0, r3, lsl #2]
-	str	r7, [r0, r4, lsl #2]
-	strh	r6, [r2, r3, lsl #1]	@ movhi
-	adds	r3, r3, #1
-	sxth	r3, r3
-	b	.L716
-.L712:
-	ldr	r3, .L750+12
-	ldrh	r3, [r3]
-	cmp	r3, #0
-	beq	.L713
-	ldr	r5, .L750+20
-	ldrh	r1, [r5]
-.L721:
-	sxth	r3, r2
-	cmp	r3, r1
-	mov	r6, r3
-	bge	.L713
-	ldrh	r0, [r4, r3, lsl #1]
-	adds	r2, r2, #1
-	cmp	r0, #0
-	beq	.L721
-	ldr	r2, .L750+8
-	movs	r0, #0
-	ldr	r2, [r2]
-.L722:
-	ldrh	r1, [r5]
-	cmp	r3, r1
-	bge	.L713
-	ldrh	r7, [r4, r3, lsl #1]
-	subs	r1, r3, r6
-	strh	r7, [r4, r1, lsl #1]	@ movhi
-	ldr	r7, [r2, r3, lsl #2]
-	str	r7, [r2, r1, lsl #2]
-	adds	r1, r3, #1
-	strh	r0, [r4, r3, lsl #1]	@ movhi
-	sxth	r3, r1
-	b	.L722
-.L751:
+	bl	ftl_memset
+	ldrh	r2, [r5]
+	mov	r1, r4
+	ldr	r3, .L426+36
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+	mov	r1, r4
+	movs	r2, #48
+	ldr	r0, .L426+40
+	bl	ftl_memset
+	mov	r2, #512
+	mov	r1, r4
+	ldr	r0, .L426+44
+	bl	ftl_memset
+	bl	FtlGcBufInit
+	bl	FtlL2PDataInit
+	mov	r0, r4
+	pop	{r3, r4, r5, pc}
+.L427:
 	.align	2
-.L750:
-	.word	.LANCHOR149
-	.word	.LC1
+.L426:
+	.word	.LANCHOR131
+	.word	.LANCHOR6
 	.word	.LANCHOR132
+	.word	.LANCHOR133
+	.word	.LANCHOR134
 	.word	.LANCHOR35
-	.word	.LANCHOR36
 	.word	.LANCHOR27
-	.word	.LANCHOR129
-	.word	.LANCHOR141
-	.word	.LANCHOR30
+	.word	.LANCHOR36
+	.word	.LANCHOR43
+	.word	.LANCHOR117
+	.word	.LANCHOR39
 	.word	.LANCHOR135
-	.word	.LANCHOR79
-	.size	FtlScanSysBlk, .-FtlScanSysBlk
-	.section	.text.FtlLoadBbt,"ax",%progbits
+	.size	FtlVariablesInit, .-FtlVariablesInit
+	.section	.text.SupperBlkListInit,"ax",%progbits
 	.align	1
-	.global	FtlLoadBbt
+	.global	SupperBlkListInit
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlLoadBbt, %function
-FtlLoadBbt:
-	@ args = 0, pretend = 0, frame = 0
+	.type	SupperBlkListInit, %function
+SupperBlkListInit:
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	ldr	r8, .L781+40
-	ldr	r4, .L781
-	ldr	r3, [r8]
-	ldr	r7, .L781+4
-	mov	r10, r4
-	str	r3, [r4, #8]
-	ldr	r3, .L781+8
-	ldr	r6, [r3]
-	str	r6, [r4, #12]
-	bl	FtlBbtMemInit
-	ldrh	r5, [r7]
-	subs	r5, r5, #1
-	uxth	r5, r5
-.L753:
-	ldrh	r3, [r7]
-	subs	r3, r3, #15
-	cmp	r3, r5
-	bgt	.L756
-	lsls	r3, r5, #10
-	movs	r2, #1
-	mov	r1, r2
-	mov	r0, r10
-	str	r3, [r4, #4]
-	bl	FlashReadPages
-	ldr	r3, [r4]
-	adds	r3, r3, #1
-	bne	.L754
-	ldr	r3, [r4, #4]
-	movs	r2, #1
-	mov	r1, r2
-	mov	r0, r10
-	adds	r3, r3, #1
-	str	r3, [r4, #4]
-	bl	FlashReadPages
-.L754:
-	ldr	r3, [r4]
-	adds	r3, r3, #1
-	beq	.L755
-	ldrh	r2, [r6]
-	movw	r3, #61649
-	cmp	r2, r3
-	bne	.L755
-	ldr	r3, .L781+12
-	ldr	r2, [r6, #4]
-	strh	r5, [r3]	@ movhi
-	str	r2, [r3, #8]
-	ldrh	r2, [r6, #8]
-	strh	r2, [r3, #4]	@ movhi
-.L756:
-	ldr	r5, .L781+12
-	movw	r2, #65535
-	ldrh	r3, [r5]
-	cmp	r3, r2
-	beq	.L770
-	ldrh	r3, [r5, #4]
-	cmp	r3, r2
-	beq	.L760
-	lsls	r3, r3, #10
-	movs	r2, #1
-	mov	r1, r2
-	ldr	r0, .L781
-	str	r3, [r4, #4]
-	bl	FlashReadPages
-	ldr	r3, [r4]
-	adds	r3, r3, #1
-	beq	.L760
-	ldrh	r2, [r6]
-	movw	r3, #61649
-	cmp	r2, r3
-	bne	.L760
-	ldr	r3, [r6, #4]
-	ldr	r2, [r5, #8]
-	cmp	r3, r2
-	bls	.L760
-	ldrh	r2, [r5, #4]
-	str	r3, [r5, #8]
-	ldrh	r3, [r6, #8]
-	strh	r2, [r5]	@ movhi
-	strh	r3, [r5, #4]	@ movhi
-.L760:
-	ldr	r10, .L781
-	movs	r1, #1
-	ldrh	r0, [r5]
-	bl	FtlGetLastWrittenPage
-	sxth	r7, r0
-	adds	r0, r0, #1
-	strh	r0, [r5, #2]	@ movhi
-.L762:
-	cmp	r7, #0
-	bge	.L765
-	movs	r2, #253
-	ldr	r1, .L781+16
-	ldr	r0, .L781+20
-	bl	printf
-.L764:
-	ldrh	r3, [r6, #10]
-	ldrh	r0, [r6, #12]
-	strh	r3, [r5, #6]	@ movhi
-	movw	r3, #65535
-	cmp	r0, r3
-	beq	.L767
-	ldr	r3, .L781+24
-	ldr	r2, [r3]
-	cmp	r0, r2
-	beq	.L767
-	ldr	r3, .L781+28
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r2, #6
+	ldr	r3, .L439
+	movs	r1, #0
+	movs	r4, #0
+	ldr	r6, .L439+4
+	mov	r8, r4
 	ldrh	r3, [r3]
-	lsrs	r3, r3, #2
-	cmp	r2, r3
-	bcs	.L767
-	cmp	r0, r3
-	bcs	.L767
-	bl	FtlSysBlkNumInit
-.L767:
-	ldr	r6, .L781+32
-	movs	r5, #0
-	ldr	r7, .L781+36
-	ldr	r8, .L781+44
-.L768:
-	ldrh	r3, [r7]
-	cmp	r5, r3
-	bcc	.L769
-	movs	r0, #0
-	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L755:
-	subs	r5, r5, #1
-	uxth	r5, r5
-	b	.L753
-.L765:
-	ldrh	r3, [r5]
-	movs	r2, #1
-	mov	r1, r2
-	mov	r0, r10
-	orr	r3, r7, r3, lsl #10
-	str	r3, [r4, #4]
-	ldr	r3, [r8]
-	str	r3, [r4, #8]
-	bl	FlashReadPages
-	ldr	r3, [r4]
+	mov	r5, r4
+	ldr	r0, [r6]
+	mov	r10, r6
+	muls	r2, r3, r2
+	bl	ftl_memset
+	ldr	r3, .L439+8
+	ldr	r2, .L439+12
+	str	r4, [r3]
+	ldr	r3, .L439+16
+	strh	r4, [r2]	@ movhi
+	str	r2, [sp, #4]
+	str	r4, [r3]
+	ldr	r3, .L439+20
+	str	r4, [r3]
+	ldr	r3, .L439+24
+	mov	fp, r3
+	strh	r4, [r3]	@ movhi
+.L429:
+	ldr	r3, .L439+28
+	uxth	r7, r4
+	ldrh	r3, [r3]
+	cmp	r7, r3
+	bcs	.L436
+	ldr	r3, .L439+32
+	ldrh	r2, [r3]
+	ldr	r3, .L439+36
+	ldrh	r3, [r3]
+	str	r3, [sp]
+	movs	r3, #0
+	mov	r6, r3
+	b	.L437
+.L431:
+	str	r2, [sp, #12]
+	mov	r1, r7
+	ldr	r2, .L439+40
+	str	r3, [sp, #8]
+	ldrb	r0, [r2, r3]	@ zero_extendqisi2
+	bl	V2P_block
+	bl	FtlBbmIsBadBlock
+	ldr	r3, [sp, #8]
+	ldr	r2, [sp, #12]
+	cbnz	r0, .L430
+	ldr	r1, [sp]
+	add	r6, r6, r1
+	uxth	r6, r6
+.L430:
 	adds	r3, r3, #1
-	beq	.L763
-	ldrh	r2, [r6]
-	movw	r3, #61649
-	cmp	r2, r3
-	beq	.L764
-.L763:
-	subs	r7, r7, #1
-	sxth	r7, r7
-	b	.L762
-.L769:
-	ldrh	r2, [r8]
-	ldr	r1, [r4, #8]
-	ldr	r0, [r6, #4]!
-	lsls	r2, r2, #2
-	mla	r1, r5, r2, r1
+.L437:
+	uxth	r1, r3
+	cmp	r2, r1
+	bhi	.L431
+	uxth	r3, r4
+	cbz	r6, .L432
+	mov	r1, r6
+	str	r3, [sp]
+	mov	r0, #32768
+	bl	__aeabi_idiv
+	ldr	r3, [sp]
+	uxth	r6, r0
+.L433:
+	ldr	r1, [r10]
+	movs	r2, #6
+	mla	r2, r2, r3, r1
+	strh	r6, [r2, #4]	@ movhi
+	ldr	r2, .L439+44
+	ldrh	r2, [r2]
+	cmp	r2, r7
+	beq	.L434
+	ldr	r2, .L439+48
+	ldrh	r2, [r2]
+	cmp	r2, r7
+	beq	.L434
+	ldr	r2, .L439+52
+	ldrh	r2, [r2]
+	cmp	r2, r7
+	beq	.L434
+	ldr	r2, .L439+56
+	ldr	r2, [r2]
+	ldrh	r3, [r2, r3, lsl #1]
+	cbnz	r3, .L435
+	add	r8, r8, #1
+	mov	r0, r7
+	uxth	r8, r8
+	bl	INSERT_FREE_LIST
+.L434:
+	adds	r4, r4, #1
+	b	.L429
+.L432:
+	ldr	r2, .L439+56
+	movw	r1, #65535
+	ldr	r2, [r2]
+	strh	r1, [r2, r3, lsl #1]	@ movhi
+	b	.L433
+.L435:
 	adds	r5, r5, #1
-	bl	ftl_memcpy
-	b	.L768
-.L770:
-	mov	r0, #-1
-	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L782:
+	mov	r0, r7
+	uxth	r5, r5
+	bl	INSERT_DATA_LIST
+	b	.L434
+.L436:
+	ldr	r2, [sp, #4]
+	strh	r8, [fp]	@ movhi
+	strh	r5, [r2]	@ movhi
+	add	r5, r5, r8
+	cmp	r5, r3
+	ble	.L438
+	movw	r2, #2216
+	ldr	r1, .L439+60
+	ldr	r0, .L439+64
+	bl	printf
+.L438:
+	movs	r0, #0
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L440:
 	.align	2
-.L781:
-	.word	.LANCHOR148
-	.word	.LANCHOR17
-	.word	.LANCHOR123
-	.word	.LANCHOR37
-	.word	.LANCHOR150
-	.word	.LC1
-	.word	.LANCHOR2
+.L439:
 	.word	.LANCHOR6
-	.word	.LANCHOR37+24
-	.word	.LANCHOR10
-	.word	.LANCHOR115
-	.word	.LANCHOR137
-	.size	FtlLoadBbt, .-FtlLoadBbt
-	.section	.text.FtlLoadSysInfo,"ax",%progbits
+	.word	.LANCHOR40
+	.word	.LANCHOR47
+	.word	.LANCHOR45
+	.word	.LANCHOR41
+	.word	.LANCHOR44
+	.word	.LANCHOR48
+	.word	.LANCHOR5
+	.word	.LANCHOR3
+	.word	.LANCHOR19
+	.word	.LANCHOR13
+	.word	.LANCHOR51
+	.word	.LANCHOR52
+	.word	.LANCHOR53
+	.word	.LANCHOR42
+	.word	.LANCHOR136
+	.word	.LC1
+	.size	SupperBlkListInit, .-SupperBlkListInit
+	.section	.text.FtlGcPageVarInit,"ax",%progbits
 	.align	1
-	.global	FtlLoadSysInfo
+	.global	FtlGcPageVarInit
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlLoadSysInfo, %function
-FtlLoadSysInfo:
-	@ args = 0, pretend = 0, frame = 8
+	.type	FtlGcPageVarInit, %function
+FtlGcPageVarInit:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r1, #0
-	ldr	r8, .L804+136
-	ldr	r5, .L804
-	ldr	r3, [r8]
-	ldr	r4, .L804+4
-	ldr	r10, .L804+140
-	ldrh	r2, [r5]
-	ldr	r7, .L804+8
-	str	r3, [r4, #8]
-	ldr	r6, .L804+12
-	ldr	r3, [r10]
-	lsls	r2, r2, #1
-	ldr	r0, [r7]
-	str	r3, [r4, #12]
-	bl	ftl_memset
-	ldrh	r0, [r6]
-	movw	r3, #65535
-	str	r7, [sp]
-	cmp	r0, r3
-	bne	.L784
-.L792:
-	mov	r0, #-1
-.L783:
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L784:
-	movs	r1, #1
-	mov	fp, r4
-	bl	FtlGetLastWrittenPage
-	ldr	r3, .L804+16
-	sxth	r7, r0
-	adds	r0, r0, #1
-	strh	r0, [r6, #2]	@ movhi
-.L786:
-	cmp	r7, #0
-	bge	.L789
-	mov	r2, #1448
-	ldr	r1, .L804+20
-	ldr	r0, .L804+24
-	bl	printf
-.L788:
-	ldr	r2, .L804+28
-	ldrh	r3, [r5]
-	ldrh	r2, [r2]
-	adds	r3, r3, #24
-	cmp	r2, r3, lsl #1
-	bcs	.L791
-	movw	r2, #1450
-	ldr	r1, .L804+20
-	ldr	r0, .L804+24
-	bl	printf
-.L791:
-	ldr	r7, .L804+32
-	movs	r2, #48
-	ldr	r1, [r4, #8]
-	mov	r0, r7
-	bl	ftl_memcpy
-	ldrh	r2, [r5]
-	ldr	r1, [r4, #8]
-	ldr	r3, [sp]
+	ldr	r2, .L442
+	movs	r3, #0
+	push	{r4, lr}
+	movs	r1, #255
+	ldr	r4, .L442+4
+	strh	r3, [r2]	@ movhi
+	ldr	r2, .L442+8
+	strh	r3, [r2]	@ movhi
+	ldrh	r2, [r4]
+	ldr	r3, .L442+12
 	lsls	r2, r2, #1
-	adds	r1, r1, #48
 	ldr	r0, [r3]
-	bl	ftl_memcpy
-	ldrh	r1, [r5]
-	ldr	r3, [r4, #8]
-	mov	r4, r7
-	lsrs	r2, r1, #3
-	adds	r1, r1, #24
-	lsls	r1, r1, #1
-	adds	r2, r2, #4
-	bic	r1, r1, #3
-	add	r1, r1, r3
-	ldr	r3, .L804+36
+	bl	ftl_memset
+	ldrh	r3, [r4]
+	movs	r2, #12
+	movs	r1, #255
+	muls	r2, r3, r2
+	ldr	r3, .L442+16
 	ldr	r0, [r3]
-	bl	ftl_memcpy
-	ldr	r2, [r7]
-	ldr	r3, .L804+16
-	cmp	r2, r3
-	bne	.L792
-	ldr	r3, .L804+40
-	ldrb	r2, [r7, #10]	@ zero_extendqisi2
-	ldrh	r5, [r7, #8]
-	ldrh	r3, [r3]
-	strh	r5, [r6, #6]	@ movhi
-	cmp	r2, r3
-	bne	.L792
-	ldr	r3, .L804+44
-	ldr	r2, .L804+48
-	str	r5, [r3]
-	ldr	r3, .L804+52
-	ldrh	r3, [r3]
-	muls	r3, r5, r3
-	str	r3, [r2]
-	ldr	r2, .L804+56
-	ldrh	r2, [r2]
-	muls	r3, r2, r3
-	ldr	r2, .L804+60
-	str	r3, [r2]
-	ldr	r3, .L804+64
-	ldr	r6, [r3]
-	ldr	r3, .L804+68
-	ldrh	r0, [r3, #6]
-	ldr	r3, .L804+72
-	subs	r0, r6, r0
-	ldrh	r1, [r3]
-	subs	r0, r0, r5
-	bl	__aeabi_uidiv
-	ldr	r3, .L804+76
-	cmp	r5, r6
-	strh	r0, [r3]	@ movhi
-	bls	.L793
-	mov	r2, #1472
-	ldr	r1, .L804+20
-	ldr	r0, .L804+24
-	bl	printf
-.L793:
-	ldrh	r2, [r4, #16]
-	ldr	r3, .L804+80
-	ldrh	ip, [r4, #14]
-	ldr	r7, .L804+84
-	lsrs	r1, r2, #6
-	and	r2, r2, #63
-	strb	r2, [r3, #6]
-	ldrb	r2, [r4, #11]	@ zero_extendqisi2
-	strh	r1, [r3, #2]	@ movhi
-	ldr	r1, .L804+88
-	strb	r2, [r3, #8]
-	ldrh	r2, [r4, #18]
-	strh	ip, [r3]	@ movhi
-	movw	r3, #65535
-	strh	r3, [r7]	@ movhi
-	movs	r3, #0
-	strh	r2, [r1]	@ movhi
-	ldrh	r2, [r4, #20]
-	strh	r3, [r7, #2]	@ movhi
-	strb	r3, [r7, #6]
-	strb	r3, [r7, #8]
-	lsrs	r5, r2, #6
-	and	r2, r2, #63
-	strb	r2, [r1, #6]
-	ldrb	r2, [r4, #12]	@ zero_extendqisi2
-	strh	r5, [r1, #2]	@ movhi
-	ldrh	r5, [r4, #22]
-	strb	r2, [r1, #8]
-	ldr	r2, .L804+92
-	strh	r5, [r2]	@ movhi
-	ldrh	r5, [r4, #24]
-	lsrs	r6, r5, #6
-	and	r5, r5, #63
-	strb	r5, [r2, #6]
-	ldrb	r5, [r4, #13]	@ zero_extendqisi2
-	strh	r6, [r2, #2]	@ movhi
-	ldr	r6, [r4, #32]
-	strb	r5, [r2, #8]
-	ldr	r5, .L804+96
-	str	r3, [r5]
-	ldr	r5, .L804+100
-	str	r3, [r5]
-	ldr	r5, .L804+104
-	str	r3, [r5]
-	ldr	r5, .L804+108
-	str	r3, [r5]
-	ldr	r5, .L804+112
-	str	r6, [r5]
-	mov	r6, r1
-	ldr	r5, .L804+116
-	str	r3, [r5]
-	ldr	r5, .L804+120
-	str	r3, [r5]
-	ldr	r5, .L804+124
-	ldr	lr, [r4, #40]
-	str	r3, [r5]
-	ldr	r3, .L804+128
-	ldr	r5, [r3]
-	cmp	lr, r5
-	mov	r5, r2
-	it	hi
-	strhi	lr, [r3]
-	ldr	r3, .L804+132
-	ldr	r2, [r4, #36]
-	ldr	r1, [r3]
-	cmp	r2, r1
-	it	hi
-	strhi	r2, [r3]
-	movw	r3, #65535
-	cmp	ip, r3
-	beq	.L796
-	ldr	r0, .L804+80
-	bl	make_superblock
-.L796:
-	ldrh	r2, [r6]
-	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L797
-	ldr	r0, .L804+88
-	bl	make_superblock
-.L797:
-	ldrh	r2, [r5]
-	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L798
-	ldr	r0, .L804+92
-	bl	make_superblock
-.L798:
-	ldrh	r2, [r7]
-	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L799
-	ldr	r0, .L804+84
-	bl	make_superblock
-.L799:
-	movs	r0, #0
-	b	.L783
-.L789:
-	ldrh	r2, [r6]
-	mov	r0, fp
-	str	r3, [sp, #4]
-	orr	r2, r7, r2, lsl #10
-	str	r2, [r4, #4]
-	ldr	r2, [r8]
-	str	r2, [r4, #8]
-	movs	r2, #1
-	mov	r1, r2
-	bl	FlashReadPages
-	ldr	r2, [r4]
-	ldr	r3, [sp, #4]
-	adds	r2, r2, #1
-	beq	.L787
-	ldr	r2, [r8]
-	ldr	r2, [r2]
-	cmp	r2, r3
-	bne	.L787
-	ldr	r2, [r10]
-	ldrh	r1, [r2]
-	movw	r2, #61604
-	cmp	r1, r2
-	beq	.L788
-.L787:
-	subs	r7, r7, #1
-	sxth	r7, r7
-	b	.L786
-.L805:
+	bl	ftl_memset
+	pop	{r4, lr}
+	b	FtlGcBufInit
+.L443:
 	.align	2
-.L804:
-	.word	.LANCHOR5
-	.word	.LANCHOR148
-	.word	.LANCHOR42
-	.word	.LANCHOR79
-	.word	1179929683
-	.word	.LANCHOR151
-	.word	.LC1
-	.word	.LANCHOR23
-	.word	.LANCHOR39
-	.word	.LANCHOR1
-	.word	.LANCHOR10
-	.word	.LANCHOR152
-	.word	.LANCHOR61
-	.word	.LANCHOR19
-	.word	.LANCHOR12
-	.word	.LANCHOR34
-	.word	.LANCHOR7
-	.word	.LANCHOR37
-	.word	.LANCHOR3
-	.word	.LANCHOR78
-	.word	.LANCHOR51
-	.word	.LANCHOR80
-	.word	.LANCHOR52
-	.word	.LANCHOR53
-	.word	.LANCHOR67
-	.word	.LANCHOR64
-	.word	.LANCHOR62
-	.word	.LANCHOR66
-	.word	.LANCHOR72
-	.word	.LANCHOR73
-	.word	.LANCHOR76
-	.word	.LANCHOR65
+.L442:
+	.word	.LANCHOR69
+	.word	.LANCHOR21
 	.word	.LANCHOR70
+	.word	.LANCHOR68
 	.word	.LANCHOR71
-	.word	.LANCHOR115
-	.word	.LANCHOR123
-	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
-	.section	.text.FlashProgPages,"ax",%progbits
+	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
+	.section	.text.FlashGetBadBlockList,"ax",%progbits
 	.align	1
-	.global	FlashProgPages
+	.global	FlashGetBadBlockList
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashProgPages, %function
-FlashProgPages:
-	@ args = 0, pretend = 0, frame = 48
+	.type	FlashGetBadBlockList, %function
+FlashGetBadBlockList:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #48
-	str	r3, [sp, #12]
-	mov	r10, r1
+	push	{r3, r4, r5, lr}
+	mov	r2, #256
+	mov	r5, r1
+	movs	r1, #255
 	mov	r4, r0
-	mov	r5, r0
-	ldr	r3, .L846
-	mov	r8, #0
-	ldr	fp, .L846+48
-	str	r2, [sp, #8]
-	ldrh	r3, [r3, #12]
-	str	r3, [sp]
-	lsls	r3, r3, #3
-	str	r3, [sp, #4]
-.L807:
-	cmp	r8, r10
-	bne	.L820
-	ldr	r3, [sp, #12]
-	cmp	r3, #0
-	beq	.L838
-	ldr	r6, .L846+4
-	movs	r5, #0
-.L822:
-	cmp	r8, r5
-	beq	.L838
-	ldr	r7, .L846+8
-	movs	r1, #0
-	ldr	r2, [r6]
-	add	r0, sp, #28
-	ldr	r3, [r7]
-	str	r1, [r2]
-	str	r1, [r3]
-	ldr	r1, [r4, #4]
-	str	r2, [sp, #36]
-	ldr	r2, [sp, #8]
-	str	r1, [sp, #32]
-	movs	r1, #1
-	str	r3, [sp, #40]
-	bl	FlashReadPages
-	ldr	r10, [sp, #28]
-	cmp	r10, #-1
-	bne	.L823
-	ldr	r1, [r4, #4]
-	ldr	r0, .L846+12
-	bl	printf
-	str	r10, [r4]
-.L823:
-	ldr	r3, [r4, #12]
-	cbz	r3, .L824
-	ldr	r2, [r3]
-	ldr	r3, [r7]
+	bl	ftl_memset
+	ldr	r3, .L451
+	mov	r1, r5
+	mov	r0, r4
 	ldr	r3, [r3]
-	cmp	r2, r3
-	beq	.L824
-	ldr	r1, [r4, #4]
-	ldr	r0, .L846+16
-	bl	printf
-	mov	r3, #-1
-	str	r3, [r4]
-.L824:
+	blx	r3
+	uxth	r0, r0
+	cmp	r0, #50
+	bls	.L445
+	mov	r2, #256
+	movs	r1, #255
+	mov	r0, r4
+	bl	ftl_memset
+	movs	r0, #0
+.L445:
+	ldr	r3, .L451+4
+	ldrh	r3, [r3, #14]
+	cmp	r3, #4
+	bne	.L450
+	add	r1, r4, r0, lsl #1
+	mov	r3, r4
+.L447:
+	cmp	r3, r1
+	bne	.L448
+.L450:
+	pop	{r3, r4, r5, pc}
+.L448:
+	ldrh	r2, [r3]
+	lsrs	r2, r2, #1
+	strh	r2, [r3], #2	@ movhi
+	b	.L447
+.L452:
+	.align	2
+.L451:
+	.word	.LANCHOR78
+	.word	.LANCHOR0
+	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
+	.section	.text.ftl_memcpy,"ax",%progbits
+	.align	1
+	.global	ftl_memcpy
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_memcpy, %function
+ftl_memcpy:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	memcpy
+	.size	ftl_memcpy, .-ftl_memcpy
+	.section	.text.FlashReadPages,"ax",%progbits
+	.align	1
+	.global	FlashReadPages
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashReadPages, %function
+FlashReadPages:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	fp, r1
+	ldr	r3, .L482
+	mov	r4, r0
+	mov	r10, #0
+	ldrh	r2, [r3, #12]
+	str	r3, [sp, #4]
+	str	r2, [sp]
+.L455:
+	cmp	r10, fp
+	bne	.L466
+	movs	r0, #0
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L466:
 	ldr	r3, [r4, #8]
-	cbz	r3, .L825
-	ldr	r2, [r3]
-	ldr	r3, [r6]
-	ldr	r3, [r3]
-	cmp	r2, r3
-	beq	.L825
-	ldr	r1, [r4, #4]
-	ldr	r0, .L846+20
+	cbz	r3, .L456
+	ldr	r3, [r4, #12]
+	cbnz	r3, .L457
+.L456:
+	movs	r2, #90
+	ldr	r1, .L482+4
+	ldr	r0, .L482+8
 	bl	printf
+.L457:
+	add	r2, sp, #8
+	add	r1, sp, #12
+	ldr	r0, [r4, #4]
+	bl	l2p_addr_tran.isra.0
+	ldr	r0, [sp, #8]
+	cmp	r0, #3
+	bls	.L458
 	mov	r3, #-1
 	str	r3, [r4]
-.L825:
-	adds	r5, r5, #1
+.L459:
+	add	r10, r10, #1
 	adds	r4, r4, #20
-	b	.L822
-.L820:
-	ldr	r3, [r5, #8]
-	cbz	r3, .L808
-	ldr	r3, [r5, #12]
-	cbnz	r3, .L809
-.L808:
-	movs	r2, #134
-	ldr	r1, .L846+24
-	ldr	r0, .L846+28
-	bl	printf
-.L809:
-	add	r2, sp, #20
-	add	r1, sp, #24
-	ldr	r0, [r5, #4]
-	bl	l2p_addr_tran.isra.0
-	ldr	r6, [sp, #20]
-	cmp	r6, #3
-	bls	.L810
-.L845:
-	mov	r3, #-1
-	str	r3, [r5]
-	b	.L811
-.L810:
-	cbnz	r6, .L812
-	ldr	r3, [sp, #24]
-	ldr	r2, [sp, #4]
-	cmp	r2, r3
-	bls	.L812
-	ldr	r5, .L846+24
-	ldr	r7, .L846+32
-	b	.L844
-.L814:
-	mov	r3, #-1
-	ldr	r2, [r4, #-16]
-	str	r3, [r4, #-20]
-	mov	r1, r5
-	mov	r0, r7
-	adds	r6, r6, #1
-	bl	printf
-	movs	r3, #16
-	movs	r2, #4
-	ldr	r1, [r4, #-12]
-	ldr	r0, .L846+36
-	bl	rknand_print_hex
-	movs	r3, #4
-	ldr	r1, [r4, #-8]
-	mov	r2, r3
-	ldr	r0, .L846+40
-	bl	rknand_print_hex
-.L844:
-	cmp	r6, r10
-	add	r4, r4, #20
-	bne	.L814
-.L838:
-	movs	r0, #0
-	add	sp, sp, #48
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L812:
-	ldr	r1, [r5, #8]
-	lsls	r3, r1, #26
-	beq	.L827
-	ldr	r3, .L846+4
-	ldr	r6, [r3]
-	cmp	r1, r6
-	beq	.L815
-	ldr	r3, .L846+44
-	mov	r0, r6
-	ldrh	r2, [r3]
-	lsls	r2, r2, #9
-	bl	ftl_memcpy
-.L815:
-	ldr	r3, [r5, #12]
-	mov	r2, r6
-	ldr	r1, [sp, #24]
-	ldrb	r0, [sp, #20]	@ zero_extendqisi2
-	ldr	r7, [fp, #8]
-	blx	r7
-	cbnz	r0, .L816
-	str	r0, [r5]
-.L817:
-	ldr	r3, .L846
-	ldrh	r3, [r3, #14]
-	cmp	r3, #4
-	bne	.L811
-	ldr	r0, [sp]
-	add	r2, r6, #2048
-	ldr	r3, [r5, #12]
-	ldr	r1, [sp, #24]
-	ldr	r6, [fp, #8]
+	b	.L455
+.L458:
+	ldr	r5, [r4, #8]
+	uxtb	r0, r0
+	ldr	r8, .L482+20
+	ldr	r7, .L482+12
+	tst	r5, #63
+	ldr	r3, [r4, #12]
+	it	ne
+	ldrne	r5, [r8]
+	ldr	r1, [sp, #12]
+	ldr	r6, [r7, #12]
+	mov	r2, r5
+	blx	r6
+	ldr	r3, [sp, #4]
+	str	r0, [r4]
+	ldrh	r3, [r3, #14]
+	cmp	r3, #4
+	bne	.L462
+	ldr	r0, [sp]
+	add	r2, r5, #2048
+	ldr	r3, [r4, #12]
+	ldr	r1, [sp, #12]
+	ldr	r7, [r7, #12]
 	adds	r3, r3, #8
 	add	r1, r1, r0
-	ldrb	r0, [sp, #20]	@ zero_extendqisi2
-	blx	r6
-	cmp	r0, #0
-	bne	.L845
-.L811:
-	add	r8, r8, #1
-	adds	r5, r5, #20
-	b	.L807
-.L827:
-	mov	r6, r1
-	b	.L815
-.L816:
+	ldrb	r0, [sp, #8]	@ zero_extendqisi2
+	blx	r7
+	adds	r3, r0, #1
+	beq	.L463
+	ldr	r3, [r4, #12]
+	ldr	r2, [r3, #12]
+	adds	r2, r2, #1
+	bne	.L464
+	ldr	r2, [r3, #8]
+	adds	r2, r2, #1
+	bne	.L464
+	ldr	r3, [r3]
+	adds	r3, r3, #1
+	beq	.L464
+.L463:
 	mov	r3, #-1
-	str	r3, [r5]
-	b	.L817
-.L847:
+	str	r3, [r4]
+.L464:
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	beq	.L462
+	cmp	r0, #256
+	it	eq
+	streq	r0, [r4]
+.L462:
+	ldr	r3, [r8]
+	cmp	r5, r3
+	bne	.L459
+	ldr	r0, [r4, #8]
+	cmp	r5, r0
+	beq	.L459
+	ldr	r3, .L482+16
+	mov	r1, r5
+	ldrh	r2, [r3]
+	lsls	r2, r2, #9
+	bl	ftl_memcpy
+	b	.L459
+.L483:
 	.align	2
-.L846:
+.L482:
 	.word	.LANCHOR0
-	.word	.LANCHOR120
-	.word	.LANCHOR122
-	.word	.LC85
-	.word	.LC86
-	.word	.LC87
-	.word	.LANCHOR153
+	.word	.LANCHOR137
 	.word	.LC1
-	.word	.LC79
-	.word	.LC80
-	.word	.LC81
+	.word	.LANCHOR78
 	.word	.LANCHOR12
-	.word	.LANCHOR105
-	.size	FlashProgPages, .-FlashProgPages
-	.section	.text.FtlLowFormatEraseBlock,"ax",%progbits
+	.word	.LANCHOR111
+	.size	FlashReadPages, .-FlashReadPages
+	.section	.text.FtlLoadFactoryBbt,"ax",%progbits
 	.align	1
-	.global	FtlLowFormatEraseBlock
+	.global	FtlLoadFactoryBbt
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlLowFormatEraseBlock, %function
-FtlLowFormatEraseBlock:
-	@ args = 0, pretend = 0, frame = 32
+	.type	FtlLoadFactoryBbt, %function
+FtlLoadFactoryBbt:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L891
+	ldr	r3, .L494
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #32
-	ldr	r7, .L891+4
-	mov	r8, #0
-	mov	r6, r1
-	mov	r5, r8
-	str	r0, [r3]
-	mov	r4, r8
-	ldr	r3, .L891+8
-	mov	fp, #20
-	ldr	r10, [r7]
-	str	r0, [sp, #4]
-	ldrh	r3, [r3]
-	str	r3, [sp, #12]
-	ldr	r3, .L891+12
-	ldr	r3, [r3]
-	str	r3, [sp, #16]
-	ldr	r3, .L891+16
-	ldr	r3, [r3]
-	str	r3, [sp, #20]
-	ldr	r3, .L891+20
-	ldrh	r3, [r3]
-	str	r3, [sp, #24]
-.L849:
-	ldr	r3, [sp, #12]
-	uxth	r2, r8
-	cmp	r3, r2
-	bhi	.L853
-	cmp	r5, #0
-	beq	.L848
-	mov	r0, r10
-	mov	r8, #0
-	mov	r10, #20
-	mov	r2, r5
-	movs	r1, #0
-	bl	FlashEraseBlocks
-.L856:
-	uxth	r3, r8
-	cmp	r5, r3
-	bhi	.L858
-	cmp	r6, #0
-	beq	.L874
-	ldr	r3, .L891+24
-	mov	r10, #1
-	ldrh	r3, [r3]
-	str	r3, [sp, #8]
-.L859:
-	movs	r7, #0
-.L868:
-	ldr	r3, .L891+8
-	mov	r8, #0
-	mov	r5, r8
-	ldrh	r3, [r3]
-	str	r3, [sp, #16]
-	ldr	r3, .L891+4
-	ldr	fp, [r3]
-	ldr	r3, .L891+28
-	ldr	r3, [r3]
-	str	r3, [sp, #20]
-	ldr	r3, .L891+12
+	movs	r6, #0
+	ldr	r5, .L494+4
 	ldr	r3, [r3]
-	str	r3, [sp, #24]
-	ldr	r3, .L891+20
+	ldr	r7, .L494+8
+	ldr	r10, .L494+20
+	str	r3, [r5, #8]
+	ldr	r3, .L494+12
+	ldr	r8, [r3]
+	str	r8, [r5, #12]
+.L485:
+	ldr	r3, .L494+16
 	ldrh	r3, [r3]
-	str	r3, [sp, #28]
-.L860:
-	ldr	r3, [sp, #16]
-	uxth	r2, r8
-	cmp	r3, r2
-	bhi	.L863
-	cbz	r5, .L848
-	mov	r0, fp
-	ldr	fp, .L891+4
-	movs	r3, #1
-	mov	r2, r10
-	mov	r1, r5
-	mov	r8, #0
-	bl	FlashProgPages
-	movs	r3, #20
-.L865:
-	uxth	r2, r8
-	cmp	r5, r2
-	bhi	.L867
-	adds	r7, r7, #1
-	ldr	r2, [sp, #8]
-	uxth	r3, r7
-	cmp	r2, r3
-	bhi	.L868
-	ldr	r8, .L891+4
-	movs	r7, #0
-	mov	fp, #20
-.L869:
-	uxth	r3, r7
-	cmp	r5, r3
-	bhi	.L871
-	ldr	r3, [sp, #4]
-	cmp	r3, #63
-	bls	.L872
-	cbz	r6, .L848
-.L872:
-	ldr	r3, .L891+4
-	mov	r2, r5
-	mov	r1, r10
-	ldr	r0, [r3]
-	bl	FlashEraseBlocks
-.L848:
-	mov	r0, r4
-	add	sp, sp, #32
-	@ sp needed
+	cmp	r6, r3
+	bcc	.L490
+	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L853:
-	mul	r2, fp, r8
-	movs	r3, #0
-	ldr	r1, [sp, #4]
-	str	r3, [r10, r2]
-	ldr	r3, .L891+32
-	ldrb	r0, [r3, r8]	@ zero_extendqisi2
-	bl	V2P_block
-	str	r0, [sp, #8]
-	cbz	r6, .L850
-	bl	IsBlkInVendorPart
-	cbnz	r0, .L851
-.L850:
-	ldr	r0, [sp, #8]
-	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L852
-	ldr	r3, [sp, #8]
-	mla	r1, fp, r5, r10
-	lsls	r2, r3, #10
-	ldr	r3, [sp, #16]
-	str	r2, [r1, #4]
-	str	r3, [r1, #8]
-	ldr	r3, [sp, #24]
-	mul	r2, r3, r5
-	ldr	r3, [sp, #20]
-	adds	r5, r5, #1
-	uxth	r5, r5
-	bic	r2, r2, #3
-	add	r2, r2, r3
-	str	r2, [r1, #12]
-.L851:
-	add	r8, r8, #1
-	b	.L849
-.L852:
-	adds	r4, r4, #1
-	uxth	r4, r4
-	b	.L851
-.L858:
-	mul	r3, r10, r8
-	ldr	r2, [r7]
-	adds	r1, r2, r3
-	ldr	r3, [r2, r3]
-	adds	r3, r3, #1
-	bne	.L857
-	ldr	r0, [r1, #4]
-	adds	r4, r4, #1
-	uxth	r4, r4
-	ubfx	r0, r0, #10, #16
-	bl	FtlBbmMapBadBlock
-.L857:
-	add	r8, r8, #1
-	b	.L856
-.L874:
-	movs	r3, #2
-	mov	r10, r6
-	str	r3, [sp, #8]
-	b	.L859
-.L863:
-	movs	r3, #20
-	ldr	r1, [sp, #4]
-	mul	r2, r3, r8
-	movs	r3, #0
-	str	r3, [fp, r2]
-	ldr	r3, .L891+32
-	ldrb	r0, [r3, r8]	@ zero_extendqisi2
-	bl	V2P_block
-	str	r0, [sp, #12]
-	cbz	r6, .L861
-	bl	IsBlkInVendorPart
-	cbnz	r0, .L862
-.L861:
-	ldr	r0, [sp, #12]
-	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L862
-	movs	r3, #20
-	mla	r1, r3, r5, fp
-	ldr	r3, [sp, #12]
-	add	r2, r7, r3, lsl #10
-	ldr	r3, [sp, #20]
-	str	r2, [r1, #4]
-	str	r3, [r1, #8]
-	ldr	r3, [sp, #28]
-	mul	r2, r3, r5
-	ldr	r3, [sp, #24]
-	adds	r5, r5, #1
-	uxth	r5, r5
-	bic	r2, r2, #3
-	add	r2, r2, r3
-	str	r2, [r1, #12]
-.L862:
-	add	r8, r8, #1
-	b	.L860
-.L867:
-	mul	r2, r3, r8
-	ldr	r1, [fp]
-	adds	r0, r1, r2
-	ldr	r2, [r1, r2]
-	cbz	r2, .L866
-	ldr	r0, [r0, #4]
-	adds	r4, r4, #1
-	str	r3, [sp, #12]
+.L490:
+	ldrh	r4, [r10]
+	movw	r3, #65535
+	ldr	fp, .L494+4
+	strh	r3, [r7, #2]!	@ movhi
+	subs	r4, r4, #1
 	uxth	r4, r4
-	ubfx	r0, r0, #10, #16
-	bl	FtlBbmMapBadBlock
-	ldr	r3, [sp, #12]
-.L866:
-	add	r8, r8, #1
-	b	.L865
-.L871:
-	cbz	r6, .L870
-	mul	r3, fp, r7
-	ldr	r2, [r8]
-	adds	r1, r2, r3
-	ldr	r3, [r2, r3]
-	cbnz	r3, .L870
-	ldr	r0, [r1, #4]
-	movs	r1, #1
-	ubfx	r0, r0, #10, #16
-	bl	FtlFreeSysBlkQueueIn
-.L870:
-	adds	r7, r7, #1
-	b	.L869
-.L892:
+.L486:
+	ldrh	r3, [r10]
+	sub	r2, r3, #15
+	cmp	r2, r4
+	bgt	.L488
+	mla	r3, r6, r3, r4
+	movs	r2, #1
+	mov	r1, r2
+	mov	r0, fp
+	lsls	r3, r3, #10
+	str	r3, [r5, #4]
+	bl	FlashReadPages
+	ldr	r3, [r5]
+	adds	r3, r3, #1
+	beq	.L487
+	ldrh	r2, [r8]
+	movw	r3, #61664
+	cmp	r2, r3
+	bne	.L487
+	strh	r4, [r7]	@ movhi
+.L488:
+	adds	r6, r6, #1
+	b	.L485
+.L487:
+	subs	r4, r4, #1
+	uxth	r4, r4
+	b	.L486
+.L495:
 	.align	2
-.L891:
-	.word	.LANCHOR111
+.L494:
 	.word	.LANCHOR106
-	.word	.LANCHOR3
-	.word	.LANCHOR119
-	.word	.LANCHOR124
-	.word	.LANCHOR24
-	.word	.LANCHOR20
-	.word	.LANCHOR118
-	.word	.LANCHOR13
-	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
-	.section	.text.Ftl_write_map_blk_to_last_page,"ax",%progbits
+	.word	.LANCHOR138
+	.word	.LANCHOR37+10
+	.word	.LANCHOR114
+	.word	.LANCHOR10
+	.word	.LANCHOR17
+	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
+	.section	.text.FtlGetLastWrittenPage,"ax",%progbits
 	.align	1
-	.global	Ftl_write_map_blk_to_last_page
+	.global	FtlGetLastWrittenPage
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	Ftl_write_map_blk_to_last_page, %function
-Ftl_write_map_blk_to_last_page:
-	@ args = 0, pretend = 0, frame = 0
+	.type	FtlGetLastWrittenPage, %function
+FtlGetLastWrittenPage:
+	@ args = 0, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	movw	r2, #65535
-	ldrh	r3, [r0]
-	mov	r4, r0
-	ldr	r5, [r0, #12]
-	cmp	r3, r2
-	bne	.L894
-	ldrh	r3, [r0, #8]
-	cbz	r3, .L895
-	movw	r2, #641
-	ldr	r1, .L903
-	ldr	r0, .L903+4
-	bl	printf
-.L895:
-	ldrh	r3, [r4, #8]
+	cmp	r1, #1
+	push	{r4, r5, r6, r7, r8, lr}
+	it	eq
+	ldreq	r3, .L508
+	sub	sp, sp, #88
+	lsl	r7, r0, #10
+	mov	r2, r1
+	it	ne
+	ldrne	r3, .L508+4
+	mov	r6, r1
+	add	r0, sp, #4
+	movs	r1, #1
+	ldrh	r5, [r3]
+	ldr	r3, .L508+8
+	subs	r5, r5, #1
+	ldr	r3, [r3]
+	sxth	r5, r5
+	str	r3, [sp, #12]
+	add	r3, sp, #24
+	str	r3, [sp, #16]
+	orr	r3, r5, r7
+	str	r3, [sp, #8]
+	bl	FlashReadPages
+	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	strh	r3, [r4, #8]	@ movhi
-	bl	FtlFreeSysBlkQueueOut
-	movs	r3, #0
-	strh	r0, [r5]	@ movhi
-	strh	r3, [r4, #2]	@ movhi
-	strh	r3, [r4]	@ movhi
-	ldr	r3, [r4, #28]
+	bne	.L499
+	mov	r8, #0
+.L500:
+	cmp	r8, r5
+	ble	.L503
+.L499:
+	mov	r0, r5
+	add	sp, sp, #88
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L503:
+	add	r3, r8, r5
+	mov	r2, r6
+	add	r3, r3, r3, lsr #31
+	movs	r1, #1
+	add	r0, sp, #4
+	asrs	r4, r3, #1
+	sxth	r3, r4
+	orrs	r3, r3, r7
+	str	r3, [sp, #8]
+	bl	FlashReadPages
+	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	str	r3, [r4, #28]
-.L896:
-	movs	r0, #0
-	pop	{r3, r4, r5, r6, r7, pc}
-.L894:
-	ldrh	r5, [r5, r3, lsl #1]
-	movs	r1, #255
-	ldrh	r3, [r0, #2]
-	ldr	r2, .L903+8
-	ldr	r7, .L903+12
-	ldr	r6, [r0, #24]
-	orr	r3, r3, r5, lsl #10
-	ldr	r0, [r7]
-	str	r3, [r2, #4]
-	ldr	r3, .L903+16
-	str	r0, [r2, #8]
-	ldr	r3, [r3]
-	str	r3, [r2, #12]
-	ldr	r2, [r4, #28]
-	str	r2, [r3, #4]
-	movw	r2, #64245
-	strh	r2, [r3, #8]	@ movhi
-	ldrh	r2, [r4, #4]
-	strh	r5, [r3, #2]	@ movhi
-	strh	r2, [r3]	@ movhi
-	ldr	r3, .L903+20
-	ldrh	r2, [r3]
-	lsls	r2, r2, #3
-	bl	ftl_memset
-	ldrh	ip, [r4, #6]
-	movs	r3, #0
-	ldr	r1, [r7]
-	mov	r2, r3
-.L897:
-	uxth	r0, r3
-	cmp	ip, r0
-	bhi	.L899
-	movs	r2, #1
-	movs	r3, #0
-	mov	r1, r2
-	ldr	r0, .L903+8
-	bl	FlashProgPages
-	ldrh	r3, [r4, #2]
-	mov	r0, r4
+	bne	.L501
+	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
-	strh	r3, [r4, #2]	@ movhi
-	bl	ftl_map_blk_gc
-	b	.L896
-.L899:
-	ldr	r0, [r6, r3, lsl #2]
-	cmp	r5, r0, lsr #10
-	bne	.L898
-	adds	r2, r2, #1
-	uxth	r2, r2
-	str	r3, [r1, r2, lsl #3]
-	add	r7, r1, r2, lsl #3
-	ldr	r0, [r6, r3, lsl #2]
-	str	r0, [r7, #4]
-.L898:
+	bne	.L501
+	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
-	b	.L897
-.L904:
+	beq	.L501
+	subs	r4, r4, #1
+	sxth	r5, r4
+	b	.L500
+.L501:
+	adds	r4, r4, #1
+	sxth	r8, r4
+	b	.L500
+.L509:
 	.align	2
-.L903:
-	.word	.LANCHOR154
-	.word	.LC1
-	.word	.LANCHOR148
-	.word	.LANCHOR115
-	.word	.LANCHOR123
+.L508:
 	.word	.LANCHOR20
-	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
-	.section	.text.FtlMapWritePage,"ax",%progbits
+	.word	.LANCHOR19
+	.word	.LANCHOR112
+	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
+	.section	.text.FtlScanSysBlk,"ax",%progbits
 	.align	1
-	.global	FtlMapWritePage
+	.global	FtlScanSysBlk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlMapWritePage, %function
-FtlMapWritePage:
-	@ args = 0, pretend = 0, frame = 8
+	.type	FtlScanSysBlk, %function
+FtlScanSysBlk:
+	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r4, r0
-	ldr	r8, .L929+28
-	mov	r7, r1
-	movs	r6, #0
-	str	r2, [sp, #4]
-	mov	fp, r8
-.L906:
-	ldr	r2, .L929
-	ldr	r3, [r2]
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #0
+	ldr	r5, .L591
+	sub	sp, sp, #32
+	mov	r1, r4
+	ldr	r3, .L591+4
+	ldr	r2, [r5]
+	ldr	r6, .L591+8
+	strh	r4, [r3]	@ movhi
+	ldr	r3, .L591+12
+	lsls	r2, r2, #2
+	strh	r4, [r6]	@ movhi
+	ldr	r7, .L591+16
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldr	r2, [r5]
+	mov	r1, r4
+	ldr	r3, .L591+20
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldrh	r2, [r7]
+	mov	r1, r4
+	ldr	r3, .L591+24
+	lsls	r2, r2, #2
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldrh	r2, [r7]
+	mov	r1, r4
+	ldr	r3, .L591+28
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+	movs	r2, #16
+	movs	r1, #255
+	ldr	r0, .L591+32
+	bl	ftl_memset
+	ldr	r3, .L591+36
+	str	r6, [sp, #12]
+	str	r5, [sp, #16]
+	ldrh	r3, [r3]
+	str	r3, [sp, #4]
+.L511:
+	ldr	r3, .L591+40
+	ldr	r2, [sp, #4]
+	ldrh	r3, [r3]
+	cmp	r3, r2
+	bls	.L552
+	ldr	r3, .L591+44
+	movs	r5, #0
+	ldr	r1, .L591+48
+	mov	fp, r5
+	movs	r7, #20
+	ldrh	r8, [r3]
+	ldr	r3, .L591+52
+	ldr	r2, [r1]
+	ldr	r1, .L591+56
+	ldr	r6, [r3]
+	ldr	r3, .L591+60
+	str	r2, [sp, #8]
+	ldrh	r10, [r1]
+	ldr	r3, [r3]
+	ldr	r2, .L591+64
+	b	.L553
+.L513:
+	ldrb	r0, [r2, r5]	@ zero_extendqisi2
+	ldr	r1, [sp, #4]
+	str	r3, [sp, #28]
+	str	r2, [sp, #24]
+	bl	V2P_block
+	str	r0, [sp, #20]
+	bl	FtlBbmIsBadBlock
+	ldr	r2, [sp, #24]
+	ldr	r3, [sp, #28]
+	cbnz	r0, .L512
+	ldr	r1, [sp, #20]
+	mla	r0, r7, fp, r6
+	ldr	r4, [sp, #8]
+	lsls	r1, r1, #10
+	str	r3, [r0, #8]
+	str	r1, [r0, #4]
+	mul	r1, r10, fp
+	bic	r1, r1, #3
+	add	r1, r1, r4
+	str	r1, [r0, #12]
+	add	r1, fp, #1
+	uxth	fp, r1
+.L512:
+	adds	r5, r5, #1
+.L553:
+	uxth	r1, r5
+	cmp	r8, r1
+	bhi	.L513
+	cmp	fp, #0
+	bne	.L514
+.L551:
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	str	r3, [sp, #4]
+	b	.L511
+.L514:
+	movs	r7, #0
+	movs	r2, #1
+	mov	r1, fp
+	mov	r0, r6
+	bl	FlashReadPages
+.L515:
+	uxth	r3, r7
+	cmp	fp, r3
+	bls	.L551
+	ldr	r3, .L591+52
+	mov	r8, #20
+	mul	r8, r8, r7
+	ldr	r3, [r3]
+	add	r2, r3, r8
+	ldr	r3, [r3, r8]
+	ldr	r5, [r2, #4]
+	ldr	r6, [r2, #12]
 	adds	r3, r3, #1
-	str	r3, [r2]
-	ldrh	r3, [r8]
-	ldrh	r2, [r4, #2]
-	subs	r3, r3, #1
+	ubfx	r5, r5, #10, #16
+	bne	.L518
+	mov	r10, #16
+.L520:
+	ldr	r3, .L591+52
+	movs	r2, #1
+	mov	r1, r2
+	ldr	r0, [r3]
+	add	r0, r0, r8
+	ldr	r3, [r0, #4]
+	adds	r3, r3, #1
+	str	r3, [r0, #4]
+	bl	FlashReadPages
+	ldrh	r2, [r6]
+	movw	r3, #65535
 	cmp	r2, r3
-	bge	.L907
-	ldrh	r2, [r4]
+	ldr	r3, .L591+52
+	ldr	r3, [r3]
+	bne	.L517
+	mov	r2, #-1
+	str	r2, [r3, r8]
+	ldr	r3, .L591+52
+	ldr	r3, [r3]
+	ldr	r3, [r3, r8]
+	cmp	r3, r2
+	bne	.L518
+.L519:
+	movs	r1, #1
+	b	.L590
+.L517:
+	ldr	r3, [r3, r8]
+	adds	r3, r3, #1
+	bne	.L518
+	add	r10, r10, #-1
+	uxth	r10, r10
+	cmp	r10, #0
+	bne	.L520
+	b	.L519
+.L518:
+	ldr	r3, .L591+68
+	ldr	r2, [r3]
+	ldr	r3, [r6, #4]
+	adds	r1, r2, #1
+	beq	.L521
+	cmp	r2, r3
+	bhi	.L522
+.L521:
+	adds	r2, r3, #1
+	ittt	ne
+	ldrne	r1, .L591+68
+	addne	r2, r3, #1
+	strne	r2, [r1]
+.L522:
+	ldrh	r2, [r6]
+	movw	r1, #61604
+	cmp	r2, r1
+	beq	.L524
+	bhi	.L525
+	movw	r3, #61574
+	cmp	r2, r3
+	beq	.L526
+.L523:
+	adds	r7, r7, #1
+	b	.L515
+.L525:
+	movw	r3, #61634
+	cmp	r2, r3
+	beq	.L527
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L908
-.L907:
-	mov	r0, r4
-	bl	Ftl_write_map_blk_to_last_page
-.L908:
-	ldrh	r2, [r4]
-	ldr	r3, [r4, #12]
-	ldrh	r3, [r3, r2, lsl #1]
-	cbnz	r3, .L909
-	movw	r2, #699
-	ldr	r1, .L929+4
-	ldr	r0, .L929+8
-	bl	printf
-.L909:
-	ldrh	r2, [r4]
-	ldrh	r3, [r4, #10]
+	bne	.L523
+	movs	r1, #0
+.L590:
+	mov	r0, r5
+	bl	FtlFreeSysBlkQueueIn
+	b	.L523
+.L527:
+	ldr	r3, .L591+8
+	ldrh	r2, [r3]
+	ldr	r3, .L591
+	ldr	r3, [r3]
 	cmp	r2, r3
-	bcc	.L910
-	mov	r2, #700
-	ldr	r1, .L929+4
-	ldr	r0, .L929+8
+	bls	.L529
+	movw	r2, #1225
+	ldr	r1, .L591+72
+	ldr	r0, .L591+76
 	bl	printf
-.L910:
-	ldrh	r2, [r4]
-	movs	r1, #0
-	ldr	r3, [r4, #12]
-	ldr	r5, .L929+12
-	ldrh	r10, [r3, r2, lsl #1]
-	ldrh	r2, [r4, #2]
-	ldr	r3, [sp, #4]
-	orr	r2, r2, r10, lsl #10
-	str	r3, [r5, #8]
-	str	r2, [r5, #4]
-	ldr	r2, .L929+16
+.L529:
+	ldr	r3, [sp, #16]
+	ldr	r2, [sp, #12]
+	ldr	r1, [r3]
+	ldrh	r0, [r2]
+	ldr	r2, .L591+12
+	uxth	r10, r1
+	ldr	ip, [r2]
+	add	r3, r10, #-1
+	sub	r10, r10, r0
+	add	r10, r10, #-1
+	sxth	r3, r3
+	sxth	r10, r10
+.L530:
+	cmp	r3, r10
+	bgt	.L536
+	cmp	r3, #0
+	bge	.L568
+	b	.L523
+.L536:
+	ldr	r2, [ip, r3, lsl #2]
+	add	r8, ip, r3, lsl #2
+	ldr	r4, [r6, #4]
+	cmp	r4, r2
+	bls	.L531
+	ldr	r2, [ip]
+	cbnz	r2, .L532
+	cmp	r1, r0
+	ittt	ne
+	ldrne	r2, .L591+8
+	addne	r0, r0, #1
+	strhne	r0, [r2]	@ movhi
+.L532:
+	ldr	r2, .L591+20
+	uxth	r10, r3
 	ldr	r0, [r2]
-	movs	r2, #16
-	str	r0, [r5, #12]
-	bl	ftl_memset
-	ldr	r2, [r5, #12]
-	movs	r3, #1
-	ldr	r1, [r4, #28]
-	mov	r0, r5
-	strh	r7, [r2, #8]	@ movhi
-	str	r1, [r2, #4]
-	ldrh	r1, [r4, #4]
-	strh	r10, [r2, #2]	@ movhi
-	strh	r1, [r2]	@ movhi
-	mov	r2, r3
-	mov	r1, r3
-	bl	FlashProgPages
-	ldrh	r2, [r4, #2]
-	ldr	r1, [r5]
+	movs	r2, #0
+.L533:
+	uxth	lr, r2
+	sxth	r1, r2
+	cmp	r10, lr
+	bhi	.L534
+	ldr	r2, [r6, #4]
+	cmp	r3, #0
+	str	r2, [r8]
+	strh	r5, [r0, r3, lsl #1]	@ movhi
+	blt	.L523
+	ldr	r2, .L591+8
+	ldrh	r0, [r2]
+	ldr	r2, .L591
+	ldr	r2, [r2]
+	subs	r2, r2, r0
+	subs	r2, r2, #1
+	sxth	r2, r2
+	cmp	r3, r2
+	bgt	.L523
+.L568:
+	ldr	r2, .L591+8
+	adds	r0, r0, #1
+	strh	r0, [r2]	@ movhi
+	ldr	r2, [r6, #4]
+	str	r2, [ip, r3, lsl #2]
+	ldr	r2, .L591+20
+.L588:
+	ldr	r2, [r2]
+	strh	r5, [r2, r3, lsl #1]	@ movhi
+	b	.L523
+.L534:
+	add	lr, ip, r1, lsl #2
 	adds	r2, r2, #1
-	uxth	r2, r2
-	adds	r3, r1, #1
-	strh	r2, [r4, #2]	@ movhi
-	bne	.L911
-	ldr	r1, [r5, #4]
-	adds	r6, r6, #1
-	ldr	r0, .L929+20
-	uxth	r6, r6
+	ldr	r4, [lr, #4]
+	add	lr, r0, r1, lsl #1
+	ldrh	lr, [lr, #2]
+	str	r4, [ip, r1, lsl #2]
+	strh	lr, [r0, r1, lsl #1]	@ movhi
+	b	.L533
+.L531:
+	subs	r3, r3, #1
+	sxth	r3, r3
+	b	.L530
+.L592:
+	.align	2
+.L591:
+	.word	.LANCHOR30
+	.word	.LANCHOR35
+	.word	.LANCHOR130
+	.word	.LANCHOR125
+	.word	.LANCHOR27
+	.word	.LANCHOR119
+	.word	.LANCHOR122
+	.word	.LANCHOR36
+	.word	.LANCHOR139
+	.word	.LANCHOR5
+	.word	.LANCHOR6
+	.word	.LANCHOR3
+	.word	.LANCHOR65
+	.word	.LANCHOR103
+	.word	.LANCHOR24
+	.word	.LANCHOR64
+	.word	.LANCHOR13
+	.word	.LANCHOR82
+	.word	.LANCHOR140
+	.word	.LC1
+.L526:
+	ldr	r8, .L593+12
+	ldr	r10, .L593+20
+	ldrh	r2, [r8]
+	ldrh	r3, [r10]
+	cmp	r2, r3
+	bls	.L539
+	movw	r2, #1266
+	ldr	r1, .L593
+	ldr	r0, .L593+4
 	bl	printf
-	ldrh	r2, [r4, #2]
-	cmp	r2, #2
-	ittt	ls
-	ldrhls	r2, [fp]
-	addls	r2, r2, #-1
-	strhls	r2, [r4, #2]	@ movhi
-	cmp	r6, #3
-	bls	.L913
-	mov	r2, r6
-	ldr	r1, [r5, #4]
-	ldr	r0, .L929+24
+.L539:
+	ldr	r2, .L593+8
+	ldrh	lr, [r10]
+	ldrh	ip, [r8]
+	ldr	r0, [r2]
+	add	r10, lr, #-1
+	sxth	r3, r10
+	sub	r10, r10, ip
+.L540:
+	cmp	r3, r10
+	ble	.L545
+	ldr	r1, [r6, #4]
+	add	r8, r0, r3, lsl #2
+	ldr	r2, [r0, r3, lsl #2]
+	cmp	r1, r2
+	bls	.L541
+	ldr	r2, [r0]
+	cbnz	r2, .L542
+	cmp	lr, ip
+	ittt	ne
+	ldrne	r2, .L593+12
+	addne	ip, ip, #1
+	strhne	ip, [r2]	@ movhi
+.L542:
+	ldr	r2, .L593+16
+	uxth	r10, r3
+	ldr	ip, [r2]
+	movs	r2, #0
+.L543:
+	uxth	lr, r2
+	sxth	r1, r2
+	cmp	r10, lr
+	bhi	.L544
+	ldr	r2, [r6, #4]
+	str	r2, [r8]
+	strh	r5, [ip, r3, lsl #1]	@ movhi
+.L545:
+	cmp	r3, #0
+	blt	.L523
+	ldr	r2, .L593+20
+	ldr	ip, .L593+12
+	ldrh	r2, [r2]
+	ldrh	r1, [ip]
+	subs	r2, r2, #1
+	subs	r2, r2, r1
+	sxth	r2, r2
+	cmp	r3, r2
+	bgt	.L523
+	ldr	r2, [r6, #4]
+	adds	r1, r1, #1
+	strh	r1, [ip]	@ movhi
+	str	r2, [r0, r3, lsl #2]
+	ldr	r2, .L593+16
+	b	.L588
+.L544:
+	add	lr, r0, r1, lsl #2
+	adds	r2, r2, #1
+	ldr	r4, [lr, #4]
+	add	lr, ip, r1, lsl #1
+	ldrh	lr, [lr, #2]
+	str	r4, [r0, r1, lsl #2]
+	strh	lr, [ip, r1, lsl #1]	@ movhi
+	b	.L543
+.L541:
+	subs	r3, r3, #1
+	sxth	r3, r3
+	b	.L540
+.L524:
+	ldr	r8, .L593+40
+	movw	r2, #65535
+	ldrh	r1, [r8]
+	cmp	r1, r2
+	bne	.L547
+.L589:
+	strh	r5, [r8]	@ movhi
+	str	r3, [r8, #8]
+	b	.L523
+.L547:
+	ldrh	r0, [r8, #4]
+	cmp	r0, r2
+	beq	.L548
+	movs	r1, #1
+	bl	FtlFreeSysBlkQueueIn
+.L548:
+	ldr	r3, [r6, #4]
+	ldr	r2, [r8, #8]
+	cmp	r2, r3
+	bcs	.L549
+	ldrh	r2, [r8]
+	strh	r2, [r8, #4]	@ movhi
+	b	.L589
+.L549:
+	strh	r5, [r8, #4]	@ movhi
+	b	.L523
+.L552:
+	ldr	r3, .L593+24
+	ldr	r2, [r3]
+	ldrh	r3, [r2]
+	cbz	r3, .L554
+.L557:
+	ldr	r3, .L593+16
+	ldr	r4, [r3]
+	ldrh	r2, [r4]
+	cmp	r2, #0
+	beq	.L555
+.L556:
+	ldr	r3, .L593+28
+	ldrh	r2, [r3]
+	ldr	r3, .L593+32
+	ldr	r3, [r3]
+	cmp	r2, r3
+	bls	.L587
+	movw	r2, #1391
+	ldr	r1, .L593
+	ldr	r0, .L593+4
 	bl	printf
-.L914:
-	b	.L914
-.L913:
-	ldr	r3, [r4, #32]
-	cmp	r3, #0
-	beq	.L906
-.L928:
-	b	.L928
-.L911:
-	cmp	r2, #1
-	beq	.L917
-	cmp	r1, #256
-	beq	.L917
-	ldr	r0, [r4, #36]
-	cbz	r0, .L918
-.L917:
-	movs	r3, #0
-	str	r3, [r4, #36]
-	b	.L906
-.L918:
-	ldr	r2, [r5, #4]
-	ldr	r3, [r4, #24]
-	str	r2, [r3, r7, lsl #2]
-	add	sp, sp, #8
+.L587:
+	movs	r0, #0
+	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L930:
+.L554:
+	ldr	r1, .L593+28
+	ldrh	r1, [r1]
+	cmp	r1, #0
+	beq	.L557
+	ldr	r5, .L593+32
+	ldr	r0, [r5]
+.L558:
+	sxth	r1, r3
+	cmp	r1, r0
+	bcs	.L557
+	ldrh	r4, [r2, r1, lsl #1]
+	adds	r3, r3, #1
+	cmp	r4, #0
+	beq	.L558
+	ldr	r3, .L593+36
+	movs	r6, #0
+	ldr	r0, [r3]
+	mov	r3, r1
+.L559:
+	ldr	r4, [r5]
+	cmp	r3, r4
+	bcs	.L557
+	ldrh	r7, [r2, r3, lsl #1]
+	subs	r4, r3, r1
+	strh	r7, [r2, r4, lsl #1]	@ movhi
+	ldr	r7, [r0, r3, lsl #2]
+	str	r7, [r0, r4, lsl #2]
+	strh	r6, [r2, r3, lsl #1]	@ movhi
+	adds	r3, r3, #1
+	sxth	r3, r3
+	b	.L559
+.L555:
+	ldr	r3, .L593+12
+	ldrh	r3, [r3]
+	cmp	r3, #0
+	beq	.L556
+	ldr	r5, .L593+20
+	ldrh	r1, [r5]
+.L564:
+	sxth	r3, r2
+	cmp	r3, r1
+	mov	r6, r3
+	bge	.L556
+	ldrh	r0, [r4, r3, lsl #1]
+	adds	r2, r2, #1
+	cmp	r0, #0
+	beq	.L564
+	ldr	r2, .L593+8
+	movs	r0, #0
+	ldr	r2, [r2]
+.L565:
+	ldrh	r1, [r5]
+	cmp	r3, r1
+	bge	.L556
+	ldrh	r7, [r4, r3, lsl #1]
+	subs	r1, r3, r6
+	strh	r7, [r4, r1, lsl #1]	@ movhi
+	ldr	r7, [r2, r3, lsl #2]
+	str	r7, [r2, r1, lsl #2]
+	adds	r1, r3, #1
+	strh	r0, [r4, r3, lsl #1]	@ movhi
+	sxth	r3, r1
+	b	.L565
+.L594:
 	.align	2
-.L929:
-	.word	.LANCHOR66
-	.word	.LANCHOR155
+.L593:
+	.word	.LANCHOR140
 	.word	.LC1
-	.word	.LANCHOR148
-	.word	.LANCHOR123
-	.word	.LC88
-	.word	.LC89
-	.word	.LANCHOR20
-	.size	FtlMapWritePage, .-FtlMapWritePage
-	.section	.text.load_l2p_region,"ax",%progbits
+	.word	.LANCHOR122
+	.word	.LANCHOR35
+	.word	.LANCHOR36
+	.word	.LANCHOR27
+	.word	.LANCHOR119
+	.word	.LANCHOR130
+	.word	.LANCHOR30
+	.word	.LANCHOR125
+	.word	.LANCHOR139
+	.size	FtlScanSysBlk, .-FtlScanSysBlk
+	.section	.text.FtlLoadBbt,"ax",%progbits
 	.align	1
-	.global	load_l2p_region
+	.global	FtlLoadBbt
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	load_l2p_region, %function
-load_l2p_region:
-	@ args = 0, pretend = 0, frame = 8
+	.type	FtlLoadBbt, %function
+FtlLoadBbt:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L938
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r5, r0
-	mov	r10, r1
-	ldrh	r2, [r3]
-	str	r3, [sp, #4]
-	cmp	r2, r0
-	bcs	.L932
-	movw	r2, #485
-	ldr	r1, .L938+4
-	ldr	r0, .L938+8
-	bl	printf
-.L932:
-	ldr	fp, .L938+48
-	movs	r4, #12
-	ldr	r7, .L938+12
-	ldr	r3, [fp]
-	ldr	r8, [r3, r5, lsl #2]
-	cmp	r8, #0
-	bne	.L933
-	mul	r4, r4, r10
-	ldr	r2, [r7]
-	movs	r1, #255
-	adds	r0, r2, r4
-	ldr	r2, .L938+16
-	ldr	r0, [r0, #8]
-	ldrh	r2, [r2]
-	bl	ftl_memset
-	ldr	r2, [r7]
-	adds	r1, r2, r4
-	strh	r5, [r2, r4]	@ movhi
-	str	r8, [r1, #4]
-.L934:
-	movs	r0, #0
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L933:
-	mul	r4, r4, r10
-	ldr	r2, [r7]
-	ldr	r6, .L938+20
-	add	r2, r2, r4
-	mov	r0, r6
-	ldr	r2, [r2, #8]
-	str	r8, [r6, #4]
-	str	r2, [r6, #8]
-	ldr	r2, .L938+24
-	ldr	r2, [r2]
-	str	r2, [r6, #12]
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	ldr	r8, .L624+40
+	ldr	r4, .L624
+	ldr	r3, [r8]
+	ldr	r7, .L624+4
+	mov	r10, r4
+	str	r3, [r4, #8]
+	ldr	r3, .L624+8
+	ldr	r6, [r3]
+	str	r6, [r4, #12]
+	bl	FtlBbtMemInit
+	ldrh	r5, [r7]
+	subs	r5, r5, #1
+	uxth	r5, r5
+.L596:
+	ldrh	r3, [r7]
+	subs	r3, r3, #15
+	cmp	r3, r5
+	bgt	.L599
+	lsls	r3, r5, #10
 	movs	r2, #1
 	mov	r1, r2
+	mov	r0, r10
+	str	r3, [r4, #4]
 	bl	FlashReadPages
-	ldr	r10, [r6, #12]
-	ldrh	r2, [r10, #8]
-	cmp	r2, r5
-	beq	.L935
-	mov	r2, r8
-	mov	r1, r5
-	ldr	r0, .L938+28
-	bl	printf
-	movs	r3, #4
-	ldr	r1, [r6, #12]
-	mov	r2, r3
-	ldr	r0, .L938+32
-	bl	rknand_print_hex
-	ldr	r3, [sp, #4]
-	movs	r2, #4
-	ldr	r1, [fp]
-	ldr	r0, .L938+36
-	ldrh	r3, [r3]
-	bl	rknand_print_hex
-.L936:
-	ldrh	r3, [r10, #8]
-	cmp	r3, r5
-	beq	.L937
-	mov	r2, #508
-	ldr	r1, .L938+4
-	ldr	r0, .L938+8
-	bl	printf
-.L937:
-	ldr	r3, [r7]
-	movs	r1, #0
-	adds	r2, r3, r4
-	str	r1, [r2, #4]
-	strh	r5, [r3, r4]	@ movhi
-	b	.L934
-.L935:
-	ldr	r2, [r6]
-	cmp	r2, #256
-	bne	.L936
-	mov	r2, r8
-	mov	r1, r5
-	ldr	r0, .L938+40
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	bne	.L597
+	ldr	r3, [r4, #4]
+	movs	r2, #1
+	mov	r1, r2
+	mov	r0, r10
+	adds	r3, r3, #1
+	str	r3, [r4, #4]
+	bl	FlashReadPages
+.L597:
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	beq	.L598
+	ldrh	r2, [r6]
+	movw	r3, #61649
+	cmp	r2, r3
+	bne	.L598
+	ldr	r3, .L624+12
+	ldr	r2, [r6, #4]
+	strh	r5, [r3]	@ movhi
+	str	r2, [r3, #8]
+	ldrh	r2, [r6, #8]
+	strh	r2, [r3, #4]	@ movhi
+.L599:
+	ldr	r5, .L624+12
+	movw	r2, #65535
+	ldrh	r3, [r5]
+	cmp	r3, r2
+	beq	.L613
+	ldrh	r3, [r5, #4]
+	cmp	r3, r2
+	beq	.L603
+	lsls	r3, r3, #10
+	movs	r2, #1
+	mov	r1, r2
+	ldr	r0, .L624
+	str	r3, [r4, #4]
+	bl	FlashReadPages
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	beq	.L603
+	ldrh	r2, [r6]
+	movw	r3, #61649
+	cmp	r2, r3
+	bne	.L603
+	ldr	r3, [r6, #4]
+	ldr	r2, [r5, #8]
+	cmp	r3, r2
+	bls	.L603
+	ldrh	r2, [r5, #4]
+	str	r3, [r5, #8]
+	ldrh	r3, [r6, #8]
+	strh	r2, [r5]	@ movhi
+	strh	r3, [r5, #4]	@ movhi
+.L603:
+	ldr	r10, .L624
+	movs	r1, #1
+	ldrh	r0, [r5]
+	bl	FtlGetLastWrittenPage
+	sxth	r7, r0
+	adds	r0, r0, #1
+	strh	r0, [r5, #2]	@ movhi
+.L605:
+	cmp	r7, #0
+	bge	.L608
+	movs	r2, #253
+	ldr	r1, .L624+16
+	ldr	r0, .L624+20
 	bl	printf
-	ldr	r3, [r7]
-	mov	r1, r5
-	ldr	r0, .L938+44
-	add	r3, r3, r4
-	ldr	r2, [r3, #8]
-	bl	FtlMapWritePage
-	b	.L936
-.L939:
+.L607:
+	ldrh	r3, [r6, #10]
+	ldrh	r0, [r6, #12]
+	strh	r3, [r5, #6]	@ movhi
+	movw	r3, #65535
+	cmp	r0, r3
+	beq	.L610
+	ldr	r3, .L624+24
+	ldr	r2, [r3]
+	cmp	r0, r2
+	beq	.L610
+	ldr	r3, .L624+28
+	ldrh	r3, [r3]
+	lsrs	r3, r3, #2
+	cmp	r2, r3
+	bcs	.L610
+	cmp	r0, r3
+	bcs	.L610
+	bl	FtlSysBlkNumInit
+.L610:
+	ldr	r6, .L624+32
+	movs	r5, #0
+	ldr	r7, .L624+36
+	ldr	r8, .L624+44
+.L611:
+	ldrh	r3, [r7]
+	cmp	r5, r3
+	bcc	.L612
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L598:
+	subs	r5, r5, #1
+	uxth	r5, r5
+	b	.L596
+.L608:
+	ldrh	r3, [r5]
+	movs	r2, #1
+	mov	r1, r2
+	mov	r0, r10
+	orr	r3, r7, r3, lsl #10
+	str	r3, [r4, #4]
+	ldr	r3, [r8]
+	str	r3, [r4, #8]
+	bl	FlashReadPages
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	beq	.L606
+	ldrh	r2, [r6]
+	movw	r3, #61649
+	cmp	r2, r3
+	beq	.L607
+.L606:
+	subs	r7, r7, #1
+	sxth	r7, r7
+	b	.L605
+.L612:
+	ldrh	r2, [r8]
+	ldr	r1, [r4, #8]
+	ldr	r0, [r6, #4]!
+	lsls	r2, r2, #2
+	mla	r1, r5, r2, r1
+	adds	r5, r5, #1
+	bl	ftl_memcpy
+	b	.L611
+.L613:
+	mov	r0, #-1
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L625:
 	.align	2
-.L938:
-	.word	.LANCHOR32
-	.word	.LANCHOR156
+.L624:
+	.word	.LANCHOR138
+	.word	.LANCHOR17
+	.word	.LANCHOR114
+	.word	.LANCHOR37
+	.word	.LANCHOR141
 	.word	.LC1
-	.word	.LANCHOR55
-	.word	.LANCHOR23
-	.word	.LANCHOR148
-	.word	.LANCHOR123
-	.word	.LC90
-	.word	.LC91
-	.word	.LC92
-	.word	.LC93
-	.word	.LANCHOR140
-	.word	.LANCHOR134
-	.size	load_l2p_region, .-load_l2p_region
-	.section	.text.ftl_map_blk_gc,"ax",%progbits
+	.word	.LANCHOR2
+	.word	.LANCHOR6
+	.word	.LANCHOR37+24
+	.word	.LANCHOR10
+	.word	.LANCHOR106
+	.word	.LANCHOR127
+	.size	FtlLoadBbt, .-FtlLoadBbt
+	.section	.text.FlashProgPages,"ax",%progbits
 	.align	1
-	.global	ftl_map_blk_gc
+	.global	FlashProgPages
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_map_blk_gc, %function
-ftl_map_blk_gc:
-	@ args = 0, pretend = 0, frame = 8
+	.type	FlashProgPages, %function
+FlashProgPages:
+	@ args = 0, pretend = 0, frame = 48
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, [r0, #24]
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #48
+	str	r3, [sp, #12]
+	mov	r10, r1
 	mov	r4, r0
-	ldr	r5, [r0, #12]
+	mov	r5, r0
+	ldr	r3, .L666
+	mov	r8, #0
+	ldr	fp, .L666+48
+	str	r2, [sp, #8]
+	ldrh	r3, [r3, #12]
 	str	r3, [sp]
-	bl	ftl_free_no_use_map_blk
-	ldrh	r3, [r4, #10]
-	ldrh	r2, [r4, #8]
-	subs	r3, r3, #5
+	lsls	r3, r3, #3
+	str	r3, [sp, #4]
+.L627:
+	cmp	r8, r10
+	bne	.L640
+	ldr	r3, [sp, #12]
+	cmp	r3, #0
+	beq	.L658
+	ldr	r6, .L666+4
+	movs	r5, #0
+.L642:
+	cmp	r8, r5
+	beq	.L658
+	ldr	r7, .L666+8
+	movs	r1, #0
+	ldr	r2, [r6]
+	add	r0, sp, #28
+	ldr	r3, [r7]
+	str	r1, [r2]
+	str	r1, [r3]
+	ldr	r1, [r4, #4]
+	str	r2, [sp, #36]
+	ldr	r2, [sp, #8]
+	str	r1, [sp, #32]
+	movs	r1, #1
+	str	r3, [sp, #40]
+	bl	FlashReadPages
+	ldr	r10, [sp, #28]
+	cmp	r10, #-1
+	bne	.L643
+	ldr	r1, [r4, #4]
+	ldr	r0, .L666+12
+	bl	printf
+	str	r10, [r4]
+.L643:
+	ldr	r3, [r4, #12]
+	cbz	r3, .L644
+	ldr	r2, [r3]
+	ldr	r3, [r7]
+	ldr	r3, [r3]
 	cmp	r2, r3
-	blt	.L941
-	uxth	r0, r0
-	ldrh	r8, [r5, r0, lsl #1]
-	cmp	r8, #0
-	beq	.L941
-	ldr	r3, [r4, #32]
-	cbnz	r3, .L941
-	movs	r2, #1
-	str	r2, [r4, #32]
-	strh	r3, [r5, r0, lsl #1]	@ movhi
-	ldrh	r3, [r4, #8]
-	ldrh	r2, [r4, #2]
-	subs	r3, r3, #1
-	strh	r3, [r4, #8]	@ movhi
-	ldr	r3, .L956
-	ldrh	r3, [r3]
+	beq	.L644
+	ldr	r1, [r4, #4]
+	ldr	r0, .L666+16
+	bl	printf
+	mov	r3, #-1
+	str	r3, [r4]
+.L644:
+	ldr	r3, [r4, #8]
+	cbz	r3, .L645
+	ldr	r2, [r3]
+	ldr	r3, [r6]
+	ldr	r3, [r3]
 	cmp	r2, r3
-	bcc	.L942
-	mov	r0, r4
-	bl	ftl_map_blk_alloc_new_blk
-.L942:
-	ldr	r5, .L956+4
-	movs	r6, #0
-.L943:
-	ldrh	r3, [r4, #6]
-	uxth	r10, r6
-	cmp	r3, r10
-	bhi	.L950
-	movs	r1, #1
-	mov	r0, r8
-	bl	FtlFreeSysBlkQueueIn
-	movs	r3, #0
-	str	r3, [r4, #32]
-.L941:
-	ldr	r3, .L956
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r3]
+	beq	.L645
+	ldr	r1, [r4, #4]
+	ldr	r0, .L666+20
+	bl	printf
+	mov	r3, #-1
+	str	r3, [r4]
+.L645:
+	adds	r5, r5, #1
+	adds	r4, r4, #20
+	b	.L642
+.L640:
+	ldr	r3, [r5, #8]
+	cbz	r3, .L628
+	ldr	r3, [r5, #12]
+	cbnz	r3, .L629
+.L628:
+	movs	r2, #134
+	ldr	r1, .L666+24
+	ldr	r0, .L666+28
+	bl	printf
+.L629:
+	add	r2, sp, #20
+	add	r1, sp, #24
+	ldr	r0, [r5, #4]
+	bl	l2p_addr_tran.isra.0
+	ldr	r6, [sp, #20]
+	cmp	r6, #3
+	bls	.L630
+.L665:
+	mov	r3, #-1
+	str	r3, [r5]
+	b	.L631
+.L630:
+	cbnz	r6, .L632
+	ldr	r3, [sp, #24]
+	ldr	r2, [sp, #4]
 	cmp	r2, r3
-	bcc	.L951
-	mov	r0, r4
-	bl	ftl_map_blk_alloc_new_blk
-.L951:
+	bls	.L632
+	ldr	r5, .L666+24
+	ldr	r7, .L666+32
+	b	.L664
+.L634:
+	mov	r3, #-1
+	ldr	r2, [r4, #-16]
+	str	r3, [r4, #-20]
+	mov	r1, r5
+	mov	r0, r7
+	adds	r6, r6, #1
+	bl	printf
+	movs	r3, #16
+	movs	r2, #4
+	ldr	r1, [r4, #-12]
+	ldr	r0, .L666+36
+	bl	rknand_print_hex
+	movs	r3, #4
+	ldr	r1, [r4, #-8]
+	mov	r2, r3
+	ldr	r0, .L666+40
+	bl	rknand_print_hex
+.L664:
+	cmp	r6, r10
+	add	r4, r4, #20
+	bne	.L634
+.L658:
 	movs	r0, #0
-	add	sp, sp, #8
+	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L950:
-	ldr	r3, [sp]
-	uxth	fp, r6
-	add	r3, r3, fp, lsl #2
-	str	r3, [sp, #4]
-	ldr	r3, [sp]
-	ldr	r2, [r3, fp, lsl #2]
-	cmp	r8, r2, lsr #10
-	bne	.L944
-	ldr	r3, .L956+8
-	str	r2, [r5, #4]
-	movs	r2, #1
-	ldr	r0, .L956+4
-	ldr	r1, [r3]
-	str	r1, [r5, #8]
-	ldr	r1, .L956+12
-	ldr	r7, [r1]
-	mov	r1, r2
-	str	r7, [r5, #12]
-	bl	FlashReadPages
-	ldrh	r2, [r7, #8]
-	cmp	r2, r10
-	beq	.L945
-	movw	r2, #611
-	ldr	r1, .L956+16
-	ldr	r0, .L956+20
-	bl	printf
-.L945:
-	ldr	r2, [r5]
-	adds	r2, r2, #1
-	bne	.L946
-.L948:
-	ldr	r2, [sp, #4]
-	movs	r3, #0
-	str	r3, [r2]
-.L947:
-	b	.L947
-.L946:
-	ldrh	r2, [r7, #8]
-	cmp	r2, r10
-	bne	.L948
-	ldrh	r1, [r7]
-	ldrh	r2, [r4, #4]
-	cmp	r1, r2
-	bne	.L948
-	ldr	r2, [r5, #8]
-	mov	r1, fp
-	mov	r0, r4
-	bl	FtlMapWritePage
-.L944:
-	adds	r6, r6, #1
-	b	.L943
-.L957:
+.L632:
+	ldr	r1, [r5, #8]
+	lsls	r3, r1, #26
+	beq	.L647
+	ldr	r3, .L666+4
+	ldr	r6, [r3]
+	cmp	r1, r6
+	beq	.L635
+	ldr	r3, .L666+44
+	mov	r0, r6
+	ldrh	r2, [r3]
+	lsls	r2, r2, #9
+	bl	ftl_memcpy
+.L635:
+	ldr	r3, [r5, #12]
+	mov	r2, r6
+	ldr	r1, [sp, #24]
+	ldrb	r0, [sp, #20]	@ zero_extendqisi2
+	ldr	r7, [fp, #8]
+	blx	r7
+	cbnz	r0, .L636
+	str	r0, [r5]
+.L637:
+	ldr	r3, .L666
+	ldrh	r3, [r3, #14]
+	cmp	r3, #4
+	bne	.L631
+	ldr	r0, [sp]
+	add	r2, r6, #2048
+	ldr	r3, [r5, #12]
+	ldr	r1, [sp, #24]
+	ldr	r6, [fp, #8]
+	adds	r3, r3, #8
+	add	r1, r1, r0
+	ldrb	r0, [sp, #20]	@ zero_extendqisi2
+	blx	r6
+	cmp	r0, #0
+	bne	.L665
+.L631:
+	add	r8, r8, #1
+	adds	r5, r5, #20
+	b	.L627
+.L647:
+	mov	r6, r1
+	b	.L635
+.L636:
+	mov	r3, #-1
+	str	r3, [r5]
+	b	.L637
+.L667:
 	.align	2
-.L956:
-	.word	.LANCHOR20
-	.word	.LANCHOR148
-	.word	.LANCHOR116
-	.word	.LANCHOR123
-	.word	.LANCHOR157
+.L666:
+	.word	.LANCHOR0
+	.word	.LANCHOR111
+	.word	.LANCHOR113
+	.word	.LC11
+	.word	.LC12
+	.word	.LC13
+	.word	.LANCHOR142
 	.word	.LC1
-	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
-	.section	.text.FtlMapTblRecovery,"ax",%progbits
+	.word	.LC6
+	.word	.LC7
+	.word	.LC8
+	.word	.LANCHOR12
+	.word	.LANCHOR78
+	.size	FlashProgPages, .-FlashProgPages
+	.section	.text.FtlLowFormatEraseBlock,"ax",%progbits
 	.align	1
-	.global	FtlMapTblRecovery
+	.global	FtlLowFormatEraseBlock
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlMapTblRecovery, %function
-FtlMapTblRecovery:
-	@ args = 0, pretend = 0, frame = 24
+	.type	FtlLowFormatEraseBlock, %function
+FtlLowFormatEraseBlock:
+	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, [r0, #16]
-	movs	r1, #0
+	ldr	r3, .L711
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #24
-	ldrh	fp, [r0, #6]
-	mov	r4, r0
-	movs	r6, #0
-	ldr	r8, [r0, #24]
+	sub	sp, sp, #32
+	ldr	r7, .L711+4
+	mov	r8, #0
+	mov	r6, r1
+	mov	r5, r8
+	str	r0, [r3]
+	mov	r4, r8
+	ldr	r3, .L711+8
+	mov	fp, #20
+	ldr	r10, [r7]
+	str	r0, [sp, #4]
+	ldrh	r3, [r3]
 	str	r3, [sp, #12]
-	ldrh	r3, [r0, #8]
-	lsl	r2, fp, #2
-	ldr	r10, [r0, #12]
-	mov	r0, r8
-	ldr	r5, .L985
-	str	r3, [sp, #4]
-	bl	ftl_memset
-	ldr	r3, .L985+4
-	str	r6, [r4, #32]
-	str	r6, [r4, #28]
-	ldr	r2, [r3]
-	str	r3, [sp, #8]
-	str	r2, [r5, #8]
-	ldr	r2, .L985+8
-	ldr	r7, [r2]
-	movw	r2, #65535
-	str	r7, [r5, #12]
-	strh	r2, [r4]	@ movhi
-	strh	r2, [r4, #2]	@ movhi
-	movs	r2, #1
-	str	r2, [r4, #36]
-.L959:
-	ldr	r2, [sp, #4]
-	sxth	r3, r6
-	cmp	r3, r2
-	bge	.L976
-	ldr	r2, [sp, #4]
-	subs	r2, r2, #1
-	cmp	r3, r2
-	lsl	r2, r3, #1
-	bne	.L960
-	ldrh	r0, [r10, r3, lsl #1]
-	movs	r1, #1
-	add	r5, r10, r2
-	str	r3, [sp, #4]
-	bl	FtlGetLastWrittenPage
+	ldr	r3, .L711+12
+	ldr	r3, [r3]
+	str	r3, [sp, #16]
+	ldr	r3, .L711+16
+	ldr	r3, [r3]
+	str	r3, [sp, #20]
+	ldr	r3, .L711+20
+	ldrh	r3, [r3]
+	str	r3, [sp, #24]
+.L669:
 	ldr	r3, [sp, #12]
-	sxth	r10, r0
-	strh	r6, [r4]	@ movhi
-	movs	r6, #0
-	adds	r0, r0, #1
-	mov	r2, r3
-	ldr	r3, [sp, #4]
-	strh	r0, [r4, #2]	@ movhi
-	ldr	r3, [r2, r3, lsl #2]
-	str	r3, [r4, #28]
-	ldr	r3, .L985
-.L961:
-	sxth	r2, r6
-	cmp	r2, r10
-	ble	.L963
-.L976:
-	mov	r0, r4
-	bl	ftl_free_no_use_map_blk
-	ldr	r3, .L985+12
-	ldrh	r2, [r4, #2]
+	uxth	r2, r8
+	cmp	r3, r2
+	bhi	.L673
+	cmp	r5, #0
+	beq	.L668
+	mov	r0, r10
+	mov	r8, #0
+	mov	r10, #20
+	mov	r2, r5
+	movs	r1, #0
+	bl	FlashEraseBlocks
+.L676:
+	uxth	r3, r8
+	cmp	r5, r3
+	bhi	.L678
+	cmp	r6, #0
+	beq	.L694
+	ldr	r3, .L711+24
+	mov	r10, #1
+	ldrh	r3, [r3]
+	str	r3, [sp, #8]
+.L679:
+	movs	r7, #0
+.L688:
+	ldr	r3, .L711+8
+	mov	r8, #0
+	mov	r5, r8
+	ldrh	r3, [r3]
+	str	r3, [sp, #16]
+	ldr	r3, .L711+4
+	ldr	fp, [r3]
+	ldr	r3, .L711+28
+	ldr	r3, [r3]
+	str	r3, [sp, #20]
+	ldr	r3, .L711+12
+	ldr	r3, [r3]
+	str	r3, [sp, #24]
+	ldr	r3, .L711+20
 	ldrh	r3, [r3]
+	str	r3, [sp, #28]
+.L680:
+	ldr	r3, [sp, #16]
+	uxth	r2, r8
+	cmp	r3, r2
+	bhi	.L683
+	cbz	r5, .L668
+	mov	r0, fp
+	ldr	fp, .L711+4
+	movs	r3, #1
+	mov	r2, r10
+	mov	r1, r5
+	mov	r8, #0
+	bl	FlashProgPages
+	movs	r3, #20
+.L685:
+	uxth	r2, r8
+	cmp	r5, r2
+	bhi	.L687
+	adds	r7, r7, #1
+	ldr	r2, [sp, #8]
+	uxth	r3, r7
 	cmp	r2, r3
-	bne	.L965
-	mov	r0, r4
-	bl	ftl_map_blk_alloc_new_blk
-.L965:
-	mov	r0, r4
-	bl	ftl_map_blk_gc
+	bhi	.L688
+	ldr	r8, .L711+4
+	movs	r7, #0
+	mov	fp, #20
+.L689:
+	uxth	r3, r7
+	cmp	r5, r3
+	bhi	.L691
+	ldr	r3, [sp, #4]
+	cmp	r3, #63
+	bls	.L692
+	cbz	r6, .L668
+.L692:
+	ldr	r3, .L711+4
+	mov	r2, r5
+	mov	r1, r10
+	ldr	r0, [r3]
+	bl	FlashEraseBlocks
+.L668:
 	mov	r0, r4
-	bl	ftl_map_blk_gc
-	movs	r0, #0
-	add	sp, sp, #24
+	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L963:
-	ldrh	r1, [r5]
-	ldr	r0, .L985
-	str	r3, [sp, #4]
-	orr	r2, r2, r1, lsl #10
-	str	r2, [r3, #4]
-	movs	r2, #1
-	mov	r1, r2
-	bl	FlashReadPages
-	ldr	r3, [sp, #4]
-	ldr	r2, [r3]
-	adds	r2, r2, #1
-	beq	.L962
-	ldrh	r2, [r7, #8]
-	cmp	fp, r2
-	bls	.L962
-	ldrh	r1, [r4, #4]
-	ldrh	r0, [r7]
-	cmp	r0, r1
-	itt	eq
-	ldreq	r1, [r3, #4]
-	streq	r1, [r8, r2, lsl #2]
-.L962:
-	adds	r6, r6, #1
-	b	.L961
-.L960:
-	ldr	r1, [sp, #8]
-	add	r2, r10, r2
-	str	r2, [sp, #16]
-	ldr	r0, .L985
-	ldr	r1, [r1]
-	str	r1, [r5, #8]
-	ldrh	r1, [r10, r3, lsl #1]
-	ldr	r3, .L985+12
-	ldrh	r2, [r3]
-	str	r3, [sp, #20]
-	subs	r2, r2, #1
-	orr	r2, r2, r1, lsl #10
-	str	r2, [r5, #4]
-	movs	r2, #1
-	mov	r1, r2
-	bl	FlashReadPages
-	ldr	r2, [r5]
-	adds	r2, r2, #1
-	beq	.L978
-	ldrh	r1, [r7]
-	ldrh	r2, [r4, #4]
+.L673:
+	mul	r2, fp, r8
+	movs	r3, #0
+	ldr	r1, [sp, #4]
+	str	r3, [r10, r2]
+	ldr	r3, .L711+32
+	ldrb	r0, [r3, r8]	@ zero_extendqisi2
+	bl	V2P_block
+	str	r0, [sp, #8]
+	cbz	r6, .L670
+	bl	IsBlkInVendorPart
+	cbnz	r0, .L671
+.L670:
+	ldr	r0, [sp, #8]
+	bl	FtlBbmIsBadBlock
+	cbnz	r0, .L672
+	ldr	r3, [sp, #8]
+	mla	r1, fp, r5, r10
+	lsls	r2, r3, #10
+	ldr	r3, [sp, #16]
+	str	r2, [r1, #4]
+	str	r3, [r1, #8]
+	ldr	r3, [sp, #24]
+	mul	r2, r3, r5
 	ldr	r3, [sp, #20]
-	cmp	r1, r2
-	bne	.L978
-	ldrh	r1, [r7, #8]
-	movw	r2, #64245
-	cmp	r1, r2
-	beq	.L967
-.L978:
+	adds	r5, r5, #1
+	uxth	r5, r5
+	bic	r2, r2, #3
+	add	r2, r2, r3
+	str	r2, [r1, #12]
+.L671:
+	add	r8, r8, #1
+	b	.L669
+.L672:
+	adds	r4, r4, #1
+	uxth	r4, r4
+	b	.L671
+.L678:
+	mul	r3, r10, r8
+	ldr	r2, [r7]
+	adds	r1, r2, r3
+	ldr	r3, [r2, r3]
+	adds	r3, r3, #1
+	bne	.L677
+	ldr	r0, [r1, #4]
+	adds	r4, r4, #1
+	uxth	r4, r4
+	ubfx	r0, r0, #10, #16
+	bl	FtlBbmMapBadBlock
+.L677:
+	add	r8, r8, #1
+	b	.L676
+.L694:
+	movs	r3, #2
+	mov	r10, r6
+	str	r3, [sp, #8]
+	b	.L679
+.L683:
+	movs	r3, #20
+	ldr	r1, [sp, #4]
+	mul	r2, r3, r8
 	movs	r3, #0
-.L968:
-	ldr	r1, .L985+12
-	sxth	r2, r3
-	ldrh	r1, [r1]
-	cmp	r2, r1
-	bge	.L974
-	str	r3, [sp, #20]
-	ldr	r3, [sp, #16]
-	ldr	r0, .L985
-	ldrh	r1, [r3]
-	orr	r2, r2, r1, lsl #10
-	str	r2, [r5, #4]
-	movs	r2, #1
-	mov	r1, r2
-	bl	FlashReadPages
-	ldr	r2, [r5]
+	str	r3, [fp, r2]
+	ldr	r3, .L711+32
+	ldrb	r0, [r3, r8]	@ zero_extendqisi2
+	bl	V2P_block
+	str	r0, [sp, #12]
+	cbz	r6, .L681
+	bl	IsBlkInVendorPart
+	cbnz	r0, .L682
+.L681:
+	ldr	r0, [sp, #12]
+	bl	FtlBbmIsBadBlock
+	cbnz	r0, .L682
+	movs	r3, #20
+	mla	r1, r3, r5, fp
+	ldr	r3, [sp, #12]
+	add	r2, r7, r3, lsl #10
 	ldr	r3, [sp, #20]
-	adds	r2, r2, #1
-	beq	.L972
-	ldrh	r2, [r7, #8]
-	cmp	fp, r2
-	bls	.L972
-	ldrh	r1, [r4, #4]
-	ldrh	r0, [r7]
-	cmp	r0, r1
-	itt	eq
-	ldreq	r1, [r5, #4]
-	streq	r1, [r8, r2, lsl #2]
-.L972:
-	adds	r3, r3, #1
-	b	.L968
-.L967:
-	ldrh	r2, [r3]
-	movs	r1, #0
-	ldr	r3, [sp, #8]
-	subs	r2, r2, #1
-	ldr	ip, [r3]
-.L969:
-	sxth	r3, r1
-	cmp	r3, r2
-	blt	.L971
-.L974:
-	adds	r6, r6, #1
-	b	.L959
-.L971:
-	lsls	r0, r3, #3
-	ldr	r3, [ip, r3, lsl #3]
-	adds	r1, r1, #1
-	uxth	lr, r3
-	cmp	fp, lr
-	itttt	hi
-	addhi	r0, r0, ip
-	movhi	r3, lr
-	ldrhi	r0, [r0, #4]
-	strhi	r0, [r8, r3, lsl #2]
-	b	.L969
-.L986:
+	str	r2, [r1, #4]
+	str	r3, [r1, #8]
+	ldr	r3, [sp, #28]
+	mul	r2, r3, r5
+	ldr	r3, [sp, #24]
+	adds	r5, r5, #1
+	uxth	r5, r5
+	bic	r2, r2, #3
+	add	r2, r2, r3
+	str	r2, [r1, #12]
+.L682:
+	add	r8, r8, #1
+	b	.L680
+.L687:
+	mul	r2, r3, r8
+	ldr	r1, [fp]
+	adds	r0, r1, r2
+	ldr	r2, [r1, r2]
+	cbz	r2, .L686
+	ldr	r0, [r0, #4]
+	adds	r4, r4, #1
+	str	r3, [sp, #12]
+	uxth	r4, r4
+	ubfx	r0, r0, #10, #16
+	bl	FtlBbmMapBadBlock
+	ldr	r3, [sp, #12]
+.L686:
+	add	r8, r8, #1
+	b	.L685
+.L691:
+	cbz	r6, .L690
+	mul	r3, fp, r7
+	ldr	r2, [r8]
+	adds	r1, r2, r3
+	ldr	r3, [r2, r3]
+	cbnz	r3, .L690
+	ldr	r0, [r1, #4]
+	movs	r1, #1
+	ubfx	r0, r0, #10, #16
+	bl	FtlFreeSysBlkQueueIn
+.L690:
+	adds	r7, r7, #1
+	b	.L689
+.L712:
 	.align	2
-.L985:
-	.word	.LANCHOR148
+.L711:
+	.word	.LANCHOR99
+	.word	.LANCHOR79
+	.word	.LANCHOR3
+	.word	.LANCHOR110
 	.word	.LANCHOR115
-	.word	.LANCHOR123
+	.word	.LANCHOR24
 	.word	.LANCHOR20
-	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
-	.section	.text.FtlLoadVonderInfo,"ax",%progbits
-	.align	1
-	.global	FtlLoadVonderInfo
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlLoadVonderInfo, %function
-FtlLoadVonderInfo:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	ldr	r3, .L988
-	ldr	r0, .L988+4
-	ldrh	r3, [r3]
-	strh	r3, [r0, #10]	@ movhi
-	movw	r3, #61574
-	strh	r3, [r0, #4]	@ movhi
-	ldr	r3, .L988+8
-	ldrh	r3, [r3]
-	strh	r3, [r0, #8]	@ movhi
-	ldr	r3, .L988+12
-	ldrh	r3, [r3]
-	strh	r3, [r0, #6]	@ movhi
-	ldr	r3, .L988+16
-	ldr	r3, [r3]
-	str	r3, [r0, #12]
-	ldr	r3, .L988+20
-	ldr	r3, [r3]
-	str	r3, [r0, #16]
-	ldr	r3, .L988+24
-	ldr	r3, [r3]
-	str	r3, [r0, #20]
-	ldr	r3, .L988+28
-	ldr	r3, [r3]
-	str	r3, [r0, #24]
-	bl	FtlMapTblRecovery
-	movs	r0, #0
-	pop	{r3, pc}
-.L989:
-	.align	2
-.L988:
-	.word	.LANCHOR27
-	.word	.LANCHOR158
-	.word	.LANCHOR35
-	.word	.LANCHOR28
-	.word	.LANCHOR36
-	.word	.LANCHOR132
-	.word	.LANCHOR131
-	.word	.LANCHOR133
-	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
-	.section	.text.FtlLoadMapInfo,"ax",%progbits
-	.align	1
-	.global	FtlLoadMapInfo
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlLoadMapInfo, %function
-FtlLoadMapInfo:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	bl	FtlL2PDataInit
-	ldr	r0, .L991
-	bl	FtlMapTblRecovery
-	movs	r0, #0
-	pop	{r3, pc}
-.L992:
-	.align	2
-.L991:
-	.word	.LANCHOR140
-	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
-	.section	.text.flush_l2p_region,"ax",%progbits
-	.align	1
-	.global	flush_l2p_region
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	flush_l2p_region, %function
-flush_l2p_region:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	movs	r4, #12
-	ldr	r5, .L994
-	muls	r4, r0, r4
-	ldr	r0, .L994+4
-	ldr	r3, [r5]
-	adds	r2, r3, r4
-	ldrh	r1, [r3, r4]
-	ldr	r2, [r2, #8]
-	bl	FtlMapWritePage
-	ldr	r3, [r5]
-	movs	r0, #0
-	add	r4, r4, r3
-	ldr	r3, [r4, #4]
-	bic	r3, r3, #-2147483648
-	str	r3, [r4, #4]
-	pop	{r3, r4, r5, pc}
-.L995:
-	.align	2
-.L994:
-	.word	.LANCHOR55
-	.word	.LANCHOR140
-	.size	flush_l2p_region, .-flush_l2p_region
-	.section	.text.log2phys,"ax",%progbits
+	.word	.LANCHOR109
+	.word	.LANCHOR13
+	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
+	.section	.text.FlashTestBlk,"ax",%progbits
 	.align	1
-	.global	log2phys
+	.global	FlashTestBlk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	log2phys, %function
-log2phys:
-	@ args = 0, pretend = 0, frame = 8
+	.type	FlashTestBlk, %function
+FlashTestBlk:
+	@ args = 0, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r7, r2
-	ldr	r4, .L1009
-	mov	r10, r0
-	mov	r5, r1
-	ldr	r3, .L1009+4
-	ldr	r2, [r4]
-	ldrh	fp, [r3]
-	cmp	r0, r2
-	bcc	.L997
-	movw	r2, #811
-	ldr	r1, .L1009+8
-	ldr	r0, .L1009+12
-	bl	printf
-.L997:
+	cmp	r0, #11
+	push	{r4, r5, lr}
+	mov	r5, r0
+	sub	sp, sp, #92
+	bls	.L716
+	ldr	r4, .L718
+	add	r0, sp, #24
+	movs	r2, #32
+	movs	r1, #165
+	str	r0, [sp, #16]
+	lsls	r5, r5, #10
 	ldr	r3, [r4]
-	cmp	r10, r3
-	bcs	.L998
-	ldr	r3, .L1009+16
-	add	fp, fp, #7
-	lsr	r6, r10, fp
-	movs	r2, #0
-	ldrh	r1, [r3]
-	uxth	r6, r6
-	ldr	r3, .L1009+20
-	ldr	r0, [r3]
-	mov	r8, r3
-	movs	r3, #12
-.L999:
-	uxth	r4, r2
-	cmp	r4, r1
-	bcc	.L1004
-	str	r3, [sp, #4]
-	bl	select_l2p_ram_region
+	str	r3, [sp, #12]
+	bl	ftl_memset
+	movs	r2, #8
+	movs	r1, #90
+	ldr	r0, [r4]
+	bl	ftl_memset
+	movs	r2, #1
+	add	r0, sp, #4
+	mov	r1, r2
+	str	r5, [sp, #8]
+	bl	FlashEraseBlocks
+	movs	r3, #1
+	add	r0, sp, #4
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
 	ldr	r3, [sp, #4]
-	mov	r4, r0
-	ldr	r2, [r8]
-	muls	r3, r0, r3
-	adds	r1, r2, r3
-	ldrh	r2, [r2, r3]
-	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L1005
-	ldr	r3, [r1, #4]
-	cmp	r3, #0
-	bge	.L1005
-	bl	flush_l2p_region
-.L1005:
-	mov	r1, r4
-	mov	r0, r6
-	bl	load_l2p_region
-	b	.L1001
-.L998:
-	mov	r0, #-1
-	cbnz	r7, .L996
-	str	r0, [r5]
-.L996:
-	add	sp, sp, #8
+	cbnz	r3, .L717
+	adds	r3, r5, #1
+	add	r0, sp, #4
+	str	r3, [sp, #8]
+	movs	r3, #1
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+	ldr	r4, [sp, #4]
+	adds	r4, r4, #0
+	it	ne
+	movne	r4, #1
+	negs	r4, r4
+.L715:
+	movs	r2, #1
+	movs	r1, #0
+	add	r0, sp, #4
+	str	r5, [sp, #8]
+	bl	FlashEraseBlocks
+.L713:
+	mov	r0, r4
+	add	sp, sp, #92
 	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1004:
-	adds	r2, r2, #1
-	mla	ip, r3, r2, r0
-	ldrh	ip, [ip, #-12]
-	cmp	ip, r6
-	bne	.L999
-.L1001:
-	movs	r0, #1
-	ldr	r2, [r8]
-	lsl	r0, r0, fp
-	movs	r3, #12
-	subs	r0, r0, #1
-	and	r0, r0, r10
-	uxth	r0, r0
-	mla	r3, r3, r4, r2
-	cbnz	r7, .L1002
-	ldr	r3, [r3, #8]
-	ldr	r3, [r3, r0, lsl #2]
-	str	r3, [r5]
-.L1003:
-	ldr	r2, [r8]
-	movs	r3, #12
-	mla	r4, r3, r4, r2
-	ldr	r3, [r4, #4]
-	adds	r2, r3, #1
-	beq	.L1007
-	adds	r3, r3, #1
-	str	r3, [r4, #4]
-.L1007:
-	movs	r0, #0
-	b	.L996
-.L1002:
-	ldr	r1, [r5]
-	ldr	r2, [r3, #8]
-	str	r1, [r2, r0, lsl #2]
-	ldr	r2, [r3, #4]
-	orr	r2, r2, #-2147483648
-	str	r2, [r3, #4]
-	ldr	r3, .L1009+24
-	strh	r6, [r3]	@ movhi
-	b	.L1003
-.L1010:
+	pop	{r4, r5, pc}
+.L717:
+	mov	r4, #-1
+	b	.L715
+.L716:
+	movs	r4, #0
+	b	.L713
+.L719:
 	.align	2
-.L1009:
-	.word	.LANCHOR61
-	.word	.LANCHOR22
-	.word	.LANCHOR159
-	.word	.LC1
-	.word	.LANCHOR33
-	.word	.LANCHOR55
-	.word	.LANCHOR56
-	.size	log2phys, .-log2phys
-	.section	.text.FtlReUsePrevPpa,"ax",%progbits
+.L718:
+	.word	.LANCHOR112
+	.size	FlashTestBlk, .-FlashTestBlk
+	.section	.text.FtlBbmTblFlush,"ax",%progbits
 	.align	1
-	.global	FtlReUsePrevPpa
+	.global	FtlBbmTblFlush
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlReUsePrevPpa, %function
-FtlReUsePrevPpa:
+	.type	FtlBbmTblFlush, %function
+FtlBbmTblFlush:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	mov	r6, r0
-	ldr	r5, .L1021
-	ubfx	r0, r1, #10, #16
-	str	r1, [sp, #4]
-	bl	P2V_block_in_plane
-	ldr	r2, [r5]
-	mov	r7, r0
-	ldrh	r3, [r2, r0, lsl #1]
-	cbnz	r3, .L1012
-	ldr	r2, .L1021+4
-	ldr	r4, [r2]
-	cmp	r4, #0
-	beq	.L1013
-	ldr	r2, .L1021+8
-	movw	lr, #65535
-	ldr	ip, .L1021+24
-	ldr	r0, .L1021+12
-	ldr	r2, [r2]
-	ldrh	r1, [r0]
-	mov	r8, r0
-	subs	r4, r4, r2
-	asrs	r4, r4, #1
-	mul	r4, ip, r4
-	mov	ip, #6
-	uxth	r4, r4
-.L1014:
-	uxth	r0, r3
-	cmp	r1, r0
-	bls	.L1013
-	cmp	r4, r7
-	bne	.L1015
-	mov	r1, r4
-	ldr	r0, .L1021+4
-	bl	List_remove_node
-	ldrh	r3, [r8]
-	cbnz	r3, .L1016
-	movw	r2, #1699
-	ldr	r1, .L1021+16
-	ldr	r0, .L1021+20
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #0
+	ldr	r7, .L729
+	movs	r1, #0
+	ldr	r5, .L729+4
+	ldr	r3, [r7]
+	mov	fp, r7
+	ldr	r8, .L729+48
+	ldr	r6, .L729+8
+	str	r3, [r5, #12]
+	ldr	r7, .L729+12
+	ldr	r3, .L729+16
+	ldr	r10, .L729+52
+	ldr	r0, [r8]
+	ldrh	r2, [r3]
+	str	r0, [r5, #8]
+	bl	ftl_memset
+.L721:
+	ldrh	r3, [r7]
+	cmp	r4, r3
+	blt	.L722
+	ldr	r6, [r5, #12]
+	movs	r2, #16
+	ldr	r4, .L729+20
+	movs	r1, #255
+	movs	r7, #0
+	mov	r0, r6
+	bl	ftl_memset
+	movw	r3, #61649
+	mov	r10, r4
+	strh	r3, [r6]	@ movhi
+	ldr	r3, [r4, #8]
+	str	r7, [sp, #12]
+	str	r3, [r6, #4]
+	ldrh	r3, [r4]
+	strh	r3, [r6, #2]	@ movhi
+	ldrh	r3, [r4, #4]
+	strh	r3, [r6, #8]	@ movhi
+	ldrh	r3, [r4, #6]
+	strh	r3, [r6, #10]	@ movhi
+	ldr	r3, .L729+24
+	ldr	r3, [r3]
+	strh	r3, [r6, #12]	@ movhi
+.L723:
+	ldr	r3, [r8]
+	ldrh	r2, [r4, #2]
+	ldrh	r1, [r4]
+	str	r3, [r5, #8]
+	ldr	r3, [fp]
+	ldrh	r0, [r6, #10]
+	str	r3, [r5, #12]
+	movs	r3, #0
+	str	r3, [r5]
+	orr	r3, r2, r1, lsl #10
+	str	r3, [r5, #4]
+	ldrh	r3, [r4, #4]
+	str	r0, [sp]
+	ldr	r0, .L729+28
 	bl	printf
-.L1016:
-	ldrh	r3, [r8]
-	mov	r0, r4
+	ldr	r3, .L729+32
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3]
 	subs	r3, r3, #1
-	strh	r3, [r8]	@ movhi
-	bl	INSERT_DATA_LIST
-	ldr	r2, [r5]
-	ldrh	r3, [r2, r7, lsl #1]
-.L1012:
-	adds	r3, r3, #1
-	strh	r3, [r2, r7, lsl #1]	@ movhi
-	b	.L1013
-.L1015:
-	mul	r4, ip, r4
+	cmp	r2, r3
+	blt	.L724
+	ldr	r3, [r4, #8]
+	mov	r1, #0	@ movhi
+	ldrh	r2, [r4]
+	strh	r1, [r4, #2]	@ movhi
 	adds	r3, r3, #1
-	ldrh	r4, [r2, r4]
-	cmp	r4, lr
-	bne	.L1014
-.L1013:
+	str	r3, [r4, #8]
+	str	r3, [r6, #4]
+	strh	r2, [r6, #8]	@ movhi
+	ldrh	r3, [r4, #4]
+	strh	r2, [r4, #4]	@ movhi
+	ldr	r2, .L729+36
+	strh	r3, [r4]	@ movhi
+	lsls	r3, r3, #10
+	ldr	r0, [r2]
 	movs	r2, #1
-	add	r1, sp, #4
-	mov	r0, r6
-	bl	log2phys
-	add	sp, sp, #8
+	str	r3, [r5, #4]
+	mov	r1, r2
+	str	r3, [r0, #4]
+	bl	FlashEraseBlocks
+.L724:
+	movs	r3, #1
+	ldr	r0, .L729+4
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+	ldrh	r3, [r10, #2]
+	adds	r3, r3, #1
+	strh	r3, [r10, #2]	@ movhi
+	ldr	r3, [r5]
+	adds	r3, r3, #1
+	bne	.L725
+	adds	r7, r7, #1
+	ldr	r1, [r5, #4]
+	uxth	r7, r7
+	ldr	r0, .L729+40
+	bl	printf
+	cmp	r7, #3
+	bls	.L723
+	mov	r2, r7
+	ldr	r1, [r5, #4]
+	ldr	r0, .L729+44
+	bl	printf
+.L727:
+	b	.L727
+.L722:
+	ldrh	r2, [r10]
+	ldr	r3, [r5, #8]
+	ldr	r1, [r6, #4]!
+	mul	r0, r2, r4
+	lsls	r2, r2, #2
+	adds	r4, r4, #1
+	add	r0, r3, r0, lsl #2
+	bl	ftl_memcpy
+	b	.L721
+.L728:
+	movs	r3, #1
+	str	r3, [sp, #12]
+	b	.L723
+.L725:
+	ldr	r3, [sp, #12]
+	cmp	r3, #0
+	beq	.L728
+	movs	r0, #0
+	add	sp, sp, #16
 	@ sp needed
-	pop	{r4, r5, r6, r7, r8, pc}
-.L1022:
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L730:
 	.align	2
-.L1021:
-	.word	.LANCHOR42
-	.word	.LANCHOR47
-	.word	.LANCHOR40
-	.word	.LANCHOR48
-	.word	.LANCHOR160
-	.word	.LC1
-	.word	-1431655765
-	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
-	.section	.text.ftl_check_vpc,"ax",%progbits
+.L729:
+	.word	.LANCHOR114
+	.word	.LANCHOR138
+	.word	.LANCHOR37+24
+	.word	.LANCHOR10
+	.word	.LANCHOR23
+	.word	.LANCHOR37
+	.word	.LANCHOR2
+	.word	.LC14
+	.word	.LANCHOR20
+	.word	.LANCHOR79
+	.word	.LC15
+	.word	.LC16
+	.word	.LANCHOR106
+	.word	.LANCHOR127
+	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
+	.section	.text.allocate_data_superblock,"ax",%progbits
 	.align	1
-	.global	ftl_check_vpc
+	.global	allocate_data_superblock
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_check_vpc, %function
-ftl_check_vpc:
+	.type	allocate_data_superblock, %function
+allocate_data_superblock:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r4, #0
-	ldr	r6, .L1047
-	ldr	r5, .L1047+4
-	ldr	r1, .L1047+8
-	ldr	r0, .L1047+12
+	mov	r4, r0
+.L732:
+	ldr	r3, .L771
+	ldr	r8, .L771+68
+	ldrh	r3, [r3]
+	ldr	r10, .L771+72
+	ldrh	r2, [r8]
+	add	r3, r3, r2
+	ldrh	r2, [r10]
+	cmp	r3, r2
+	ble	.L733
+	movw	r2, #2661
+	ldr	r1, .L771+4
+	ldr	r0, .L771+8
 	bl	printf
-	mov	r2, #8192
-	movs	r1, #0
-	ldr	r0, .L1047+4
-	bl	ftl_memset
-.L1024:
-	ldr	r3, [r6]
+.L733:
+	ldr	r3, .L771+12
 	cmp	r4, r3
-	bcc	.L1026
-	ldr	r10, .L1047+48
-	movs	r4, #0
-	ldr	r7, .L1047+16
-	mov	r6, r4
-.L1027:
+	bne	.L759
+	ldr	r3, .L771
+	ldr	r2, .L771+16
+	ldrh	r3, [r3]
+	ldr	r2, [r2]
+	lsrs	r1, r3, #1
+	muls	r2, r3, r2
+	adds	r1, r1, #1
+	add	r1, r1, r2, lsr #2
+	uxth	r1, r1
+	cbz	r1, .L734
+	subs	r1, r1, #1
+	uxth	r1, r1
+.L734:
+	ldr	r0, .L771+20
+	bl	List_pop_index_node
+	ldr	r3, .L771
+	mov	r5, r0
+	uxth	r7, r0
+	ldrh	r3, [r3]
+	cbnz	r3, .L735
+	movw	r2, #2670
+	ldr	r1, .L771+4
+	ldr	r0, .L771+8
+	bl	printf
+.L735:
+	ldr	r3, .L771
+	ldr	r2, .L771
+	ldrh	r3, [r3]
+	subs	r3, r3, #1
+	strh	r3, [r2]	@ movhi
+	ldrh	r3, [r10]
+	cmp	r3, r7
+	bls	.L732
+	uxth	r5, r5
+	lsls	r3, r5, #1
+	str	r3, [sp]
+	ldr	r3, .L771+24
+	ldr	r3, [r3]
+	ldrh	r6, [r3, r5, lsl #1]
+	cmp	r6, #0
+	bne	.L732
+	strh	r7, [r4]	@ movhi
+	mov	r0, r4
+	bl	make_superblock
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	cbnz	r3, .L737
+	ldr	r3, .L771+24
+	movw	r2, #65535
+	mov	r0, r7
+	ldr	r3, [r3]
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	bl	INSERT_DATA_LIST
+	ldr	r3, .L771
+	ldrh	r2, [r8]
+	ldrh	r3, [r3]
+	add	r3, r3, r2
 	ldrh	r2, [r10]
-	uxth	r3, r4
-	cmp	r2, r3
-	bhi	.L1029
-	ldr	r3, .L1047+20
-	ldr	r4, [r3]
-	cbz	r4, .L1030
-	ldr	r3, .L1047+24
+	cmp	r3, r2
+	ble	.L732
+	movw	r2, #2684
+	ldr	r1, .L771+4
+	ldr	r0, .L771+8
+	bl	printf
+	b	.L732
+.L759:
+	movs	r1, #0
+	b	.L734
+.L737:
+	ldr	r3, .L771
+	ldrh	r2, [r8]
+	ldrh	r3, [r3]
+	add	r3, r3, r2
+	ldrh	r2, [r10]
+	cmp	r3, r2
+	ble	.L739
+	movw	r2, #2687
+	ldr	r1, .L771+4
+	ldr	r0, .L771+8
+	bl	printf
+.L739:
+	ldr	r3, .L771+28
+	add	lr, r4, #16
+	ldr	r2, .L771+32
 	mov	r8, #0
-	ldr	r5, .L1047+28
-	ldr	r10, .L1047+16
-	ldrh	r7, [r3]
-	ldr	r3, [r5]
-	ldr	fp, .L1047+4
-	subs	r4, r4, r3
-	ldr	r3, .L1047+32
-	asrs	r4, r4, #1
-	muls	r4, r3, r4
-	uxth	r4, r4
-.L1031:
-	uxth	r3, r8
-	cmp	r7, r3
-	bls	.L1030
-	ldr	r3, [r10]
-	ldrh	r2, [r3, r4, lsl #1]
-	cbz	r2, .L1032
-	movs	r6, #1
-	ldrh	r3, [fp, r4, lsl #1]
-	mov	r1, r4
-	ldr	r0, .L1047+36
+	ldr	ip, [r3]
+	ldrh	r0, [r2]
+	movs	r2, #20
+	mov	r3, ip
+	mla	r0, r2, r0, ip
+.L740:
+	cmp	r0, r3
+	bne	.L742
+	cbnz	r6, .L743
+	movw	r2, #2698
+	ldr	r1, .L771+4
+	ldr	r0, .L771+8
 	bl	printf
-.L1032:
-	movs	r3, #6
-	ldr	r2, [r5]
-	muls	r4, r3, r4
-	movw	r3, #65535
-	add	r8, r8, #1
-	ldrh	r4, [r2, r4]
-	cmp	r4, r3
-	bne	.L1031
-.L1030:
-	cbz	r6, .L1023
-	movw	r2, #2343
-	ldr	r1, .L1047+8
-	ldr	r0, .L1047+40
+.L743:
+	ldr	r3, .L771+36
+	ldrh	r3, [r3]
+	cmp	r3, r7
+	bne	.L744
+	movw	r2, #2700
+	ldr	r1, .L771+4
+	ldr	r0, .L771+8
 	bl	printf
-.L1023:
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1026:
-	movs	r2, #0
-	add	r1, sp, #4
-	mov	r0, r4
-	bl	log2phys
-	ldr	r0, [sp, #4]
-	adds	r3, r0, #1
-	beq	.L1025
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-	ldrh	r3, [r5, r0, lsl #1]
+.L744:
+	ldrb	r2, [r4, #8]	@ zero_extendqisi2
+	ldr	r3, .L771+40
+	ldr	fp, .L771+76
+	ldr	r8, .L771+80
+	ldr	r1, [r3]
+	cmp	r2, #0
+	bne	.L745
+	ldrh	r2, [r1, r5, lsl #1]
+	cmp	r2, #0
+	beq	.L746
+	ldr	r0, .L771+44
+	ldrh	r0, [r0]
+	add	r2, r2, r0
+.L769:
+	strh	r2, [r1, r5, lsl #1]	@ movhi
+	mov	r0, r7
+	ldr	r2, [fp]
+	movs	r1, #0
+	str	r3, [sp, #4]
+	adds	r2, r2, #1
+	str	r2, [fp]
+	bl	ftl_set_blk_mode
+.L770:
+	ldr	r3, [sp, #4]
+	ldr	r0, [fp]
+	ldr	r3, [r3]
+	ldrh	r1, [r3, r5, lsl #1]
+	ldr	r3, .L771+48
+	ldr	r2, [r3]
+	cmp	r1, r2
+	it	hi
+	strhi	r1, [r3]
+	ldr	r3, .L771+44
+	ldrh	r1, [r10]
+	ldrh	r2, [r3]
+	ldr	r3, [r8]
+	mla	r0, r0, r2, r3
+	bl	__aeabi_uidiv
+	ldr	r3, .L771+52
+	ldr	ip, .L771+84
+	str	r0, [r3]
+	ldr	r3, .L771+56
+	ldr	r2, [r3]
+	ldr	r3, [r2, #16]
 	adds	r3, r3, #1
-	strh	r3, [r5, r0, lsl #1]	@ movhi
-.L1025:
-	adds	r4, r4, #1
-	b	.L1024
-.L1029:
-	ldr	r3, [r7]
-	uxth	r5, r4
-	ldr	r8, .L1047+4
-	ldrh	r2, [r3, r5, lsl #1]
-	ldrh	r3, [r8, r5, lsl #1]
+	str	r3, [r2, #16]
+	movs	r2, #20
+	ldr	r3, .L771+28
+	ldr	r0, [r3]
+	adds	r3, r0, #4
+	mla	r2, r2, r6, r0
+	adds	r2, r2, #24
+.L750:
+	adds	r3, r3, #20
 	cmp	r2, r3
-	beq	.L1028
-	mov	r1, r5
-	ldr	r0, .L1047+44
+	bne	.L751
+	mov	r2, r6
+	ldrb	r1, [r4, #8]	@ zero_extendqisi2
+	mov	r8, #0
+	bl	FlashEraseBlocks
+	mov	r10, r8
+	movs	r3, #20
+.L752:
+	uxth	r2, r8
+	cmp	r6, r2
+	bhi	.L754
+	cmp	r10, #0
+	beq	.L755
+	mov	r0, r7
+	bl	update_multiplier_value
+	bl	FtlBbmTblFlush
+.L755:
+	ldrb	r2, [r4, #7]	@ zero_extendqisi2
+	cmp	r2, #0
+	bne	.L756
+	ldr	r3, .L771+24
+	movw	r2, #65535
+	ldr	r3, [r3]
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	b	.L732
+.L742:
+	ldrh	r1, [lr], #2
+	movw	fp, #65535
+	str	r8, [r3, #8]
+	str	r8, [r3, #12]
+	cmp	r1, fp
+	beq	.L741
+	mla	fp, r2, r6, ip
+	adds	r6, r6, #1
+	lsls	r1, r1, #10
+	uxth	r6, r6
+	str	r1, [fp, #4]
+.L741:
+	adds	r3, r3, #20
+	b	.L740
+.L746:
+	movs	r2, #2
+	b	.L769
+.L745:
+	ldrh	r2, [r1, r5, lsl #1]
+	mov	r0, r7
+	str	r3, [sp, #4]
+	adds	r2, r2, #1
+	strh	r2, [r1, r5, lsl #1]	@ movhi
+	ldr	r2, [r8]
+	adds	r2, r2, #1
+	str	r2, [r8]
+	bl	ftl_set_blk_mode.part.6
+	b	.L770
+.L751:
+	ldr	r1, [r3, #-20]
+	and	r1, r1, ip
+	str	r1, [r3, #-20]
+	b	.L750
+.L754:
+	ldr	r1, .L771+28
+	mul	r2, r3, r8
+	ldr	r1, [r1]
+	ldr	fp, [r1, r2]
+	adds	r0, r1, r2
+	cmp	fp, #-1
+	bne	.L753
+	ldr	r0, [r0, #4]
+	add	r10, r10, #1
+	str	r3, [sp, #4]
+	ubfx	r0, r0, #10, #16
+	bl	FtlBbmMapBadBlock
+	add	r2, r4, r8, lsl #1
+	ldr	r3, [sp, #4]
+	strh	fp, [r2, #16]	@ movhi
+	ldrb	r2, [r4, #7]	@ zero_extendqisi2
+	subs	r2, r2, #1
+	strb	r2, [r4, #7]
+.L753:
+	add	r8, r8, #1
+	b	.L752
+.L756:
+	ldr	r3, .L771+60
+	ldr	r1, .L771+64
+	ldrh	r3, [r3]
+	strh	r7, [r4]	@ movhi
+	smulbb	r3, r3, r2
+	movs	r2, #0
+	strh	r2, [r4, #2]	@ movhi
+	strb	r2, [r4, #6]
+	ldr	r2, [r1]
+	uxth	r3, r3
+	strh	r3, [r4, #4]	@ movhi
+	str	r2, [r4, #12]
+	adds	r2, r2, #1
+	str	r2, [r1]
+	ldr	r2, .L771+24
+	ldr	r1, [sp]
+	ldr	r2, [r2]
+	strh	r3, [r2, r1]	@ movhi
+	ldrh	r3, [r4, #4]
+	cbz	r3, .L757
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	cbnz	r3, .L758
+.L757:
+	movw	r2, #2753
+	ldr	r1, .L771+4
+	ldr	r0, .L771+8
 	bl	printf
-	ldr	r3, [r7]
-	movw	r2, #65535
-	ldrh	r3, [r3, r5, lsl #1]
-	cmp	r3, r2
-	beq	.L1028
-	ldrh	r2, [r8, r5, lsl #1]
-	cmp	r2, r3
-	it	hi
-	movhi	r6, #1
-.L1028:
-	adds	r4, r4, #1
-	b	.L1027
-.L1048:
+.L758:
+	movs	r0, #0
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L772:
 	.align	2
-.L1047:
-	.word	.LANCHOR61
-	.word	check_vpc_table
-	.word	.LANCHOR161
-	.word	.LC94
-	.word	.LANCHOR42
-	.word	.LANCHOR47
+.L771:
 	.word	.LANCHOR48
-	.word	.LANCHOR40
-	.word	-1431655765
-	.word	.LC96
+	.word	.LANCHOR143
 	.word	.LC1
-	.word	.LC95
+	.word	.LANCHOR53
+	.word	.LANCHOR95
+	.word	.LANCHOR47
+	.word	.LANCHOR42
+	.word	.LANCHOR79
+	.word	.LANCHOR3
+	.word	.LANCHOR144
+	.word	.LANCHOR43
+	.word	.LANCHOR14
+	.word	.LANCHOR92
+	.word	.LANCHOR145
+	.word	.LANCHOR118
+	.word	.LANCHOR19
+	.word	.LANCHOR82
+	.word	.LANCHOR45
 	.word	.LANCHOR5
-	.size	ftl_check_vpc, .-ftl_check_vpc
-	.section	.text.ftl_scan_all_data,"ax",%progbits
+	.word	.LANCHOR90
+	.word	.LANCHOR91
+	.word	-1024
+	.size	allocate_data_superblock, .-allocate_data_superblock
+	.section	.text.FtlGcFreeBadSuperBlk,"ax",%progbits
 	.align	1
-	.global	ftl_scan_all_data
+	.global	FtlGcFreeBadSuperBlk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_scan_all_data, %function
-ftl_scan_all_data:
+	.type	FtlGcFreeBadSuperBlk, %function
+FtlGcFreeBadSuperBlk:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, lr}
-	movs	r5, #0
-	ldr	r7, .L1063
-	sub	sp, sp, #32
-	movs	r1, #0
-	ldr	r8, .L1063+24
-	ldr	r0, .L1063+4
-	bl	printf
-.L1050:
-	ldr	r3, [r7]
-	cmp	r5, r3
-	bcc	.L1056
-	add	sp, sp, #32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, pc}
-.L1056:
-	movs	r2, #0
-	add	r1, sp, #28
-	mov	r0, r5
-	bl	log2phys
-	ubfx	r3, r5, #0, #11
-	cbnz	r3, .L1051
-	ldr	r2, [sp, #28]
-	mov	r1, r5
-	mov	r0, r8
-	bl	printf
-.L1051:
-	ldr	r3, [sp, #28]
-	adds	r2, r3, #1
-	beq	.L1053
-	ldr	r4, .L1063+8
-	movs	r2, #0
-	movs	r1, #1
-	str	r3, [r4, #4]
-	mov	r0, r4
-	ldr	r3, .L1063+12
-	str	r5, [r4, #16]
-	str	r2, [r4]
-	ldr	r3, [r3]
-	str	r3, [r4, #8]
-	ldr	r3, .L1063+16
-	ldr	r6, [r3]
-	str	r6, [r4, #12]
-	bl	FlashReadPages
-	ldr	r3, [r4]
-	cmp	r3, #256
-	beq	.L1054
-	adds	r3, r3, #1
-	beq	.L1054
-	ldr	r3, [r6, #8]
-	cmp	r5, r3
-	beq	.L1053
-.L1054:
-	ldr	r2, [r4, #8]
-	ldr	r3, [r4, #12]
-	ldr	r0, .L1063+20
-	ldr	r1, [r2, #4]
-	str	r1, [sp, #16]
-	mov	r1, r5
-	ldr	r2, [r2]
-	str	r2, [sp, #12]
-	ldr	r2, [r3, #12]
-	str	r2, [sp, #8]
-	ldr	r2, [r3, #8]
-	str	r2, [sp, #4]
-	ldr	r2, [r3, #4]
-	str	r2, [sp]
-	ldr	r2, [r4, #4]
-	ldr	r3, [r3]
-	bl	printf
-.L1053:
-	adds	r5, r5, #1
-	b	.L1050
-.L1064:
-	.align	2
-.L1063:
-	.word	.LANCHOR61
-	.word	.LC97
-	.word	.LANCHOR148
-	.word	.LANCHOR115
-	.word	.LANCHOR123
-	.word	.LC99
-	.word	.LC98
-	.size	ftl_scan_all_data, .-ftl_scan_all_data
-	.section	.text.FtlGcScanTempBlk,"ax",%progbits
-	.align	1
-	.global	FtlGcScanTempBlk
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlGcScanTempBlk, %function
-FtlGcScanTempBlk:
-	@ args = 0, pretend = 0, frame = 48
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1098
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #48
-	mov	r4, r0
-	str	r1, [sp, #8]
-	ldrh	r5, [r3]
-	movw	r3, #65535
-	cmp	r5, r3
-	beq	.L1090
-	cbnz	r5, .L1066
-.L1067:
-	bl	FtlGcPageVarInit
-	b	.L1068
-.L1090:
-	movs	r5, #0
-.L1066:
-	ldr	r3, .L1098+4
-	ldr	r2, [sp, #8]
-	ldrh	r3, [r3]
-	cmp	r3, r2
-	beq	.L1067
-.L1068:
-	ldr	fp, .L1098+52
-	movs	r3, #0
-	str	r3, [sp]
-.L1069:
-	ldrh	r2, [r4]
-	movs	r3, #0
-	strb	r3, [r4, #8]
-	movw	r3, #65535
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r10, r0
+	ldr	r4, .L785
+	ldrh	r3, [r4]
+	cbz	r3, .L774
+	ldr	r8, .L785+12
+	movs	r7, #0
+.L775:
+	ldr	r3, .L785+4
+	ldrh	r2, [r3]
+	uxth	r3, r7
 	cmp	r2, r3
-	beq	.L1070
-.L1087:
-	ldr	r3, .L1098+8
-	movs	r2, #0
-	ldr	r0, [fp]
-	mov	r7, r2
-	movw	lr, #65535
-	mov	r8, #20
-	ldrh	r10, [r3]
-	ldr	r3, .L1098+12
-	ldr	r3, [r3]
-	str	r3, [sp, #12]
-	ldr	r3, .L1098+16
-	ldrh	r3, [r3]
-	str	r3, [sp, #16]
-	ldr	r3, .L1098+20
-	ldr	r3, [r3]
-	str	r3, [sp, #20]
-	ldr	r3, .L1098+24
-	ldrh	ip, [r3]
-	add	r3, r4, #16
-	str	r3, [sp, #4]
-.L1071:
-	uxth	r3, r2
-	cmp	r10, r3
-	bhi	.L1073
-	mov	r10, #0
-	movs	r2, #0
-	mov	r1, r7
-	bl	FlashReadPages
-.L1074:
-	uxth	r3, r10
-	cmp	r7, r3
-	bhi	.L1085
-	ldr	r3, [sp]
-	adds	r5, r5, #1
-	uxth	r5, r5
-	adds	r3, r3, #1
-	str	r3, [sp]
-	ldr	r2, [sp]
-	ldr	r3, [sp, #8]
-	cmp	r3, r2
-	ldr	r2, .L1098+4
-	bls	.L1086
-.L1088:
-	ldrh	r3, [r2]
+	bhi	.L781
+	bl	FtlGcReFreshBadBlk
+.L774:
+	movs	r0, #0
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L781:
+	ldr	r2, .L785+8
+	uxth	r3, r7
+	mov	r1, r10
+	mov	fp, #0
+	ldrb	r0, [r2, r3]	@ zero_extendqisi2
+	bl	V2P_block
+	mov	r1, r0
+.L776:
+	ldrh	r3, [r4]
+	uxth	r5, fp
 	cmp	r3, r5
-	bhi	.L1087
-.L1070:
-	ldr	r3, .L1098
-	movw	r2, #65535
-	strh	r5, [r4, #2]	@ movhi
-	mov	r1, r5
-	mov	r0, r4
-	strh	r2, [r3]	@ movhi
-	movs	r2, #0
-	strb	r2, [r4, #6]
-	bl	ftl_sb_update_avl_pages
-	b	.L1089
-.L1073:
-	ldr	r1, [sp, #4]
-	ldrh	r3, [r1], #2
-	cmp	r3, lr
-	str	r1, [sp, #4]
-	beq	.L1072
-	mla	r1, r8, r7, r0
-	ldr	r6, [sp, #12]
-	orr	r3, r5, r3, lsl #10
-	str	r3, [r1, #4]
-	ldr	r3, [sp, #16]
-	muls	r3, r7, r3
-	bic	r3, r3, #3
-	add	r3, r3, r6
-	ldr	r6, [sp, #20]
-	str	r3, [r1, #8]
-	mul	r3, ip, r7
+	bhi	.L780
 	adds	r7, r7, #1
-	uxth	r7, r7
-	bic	r3, r3, #3
-	add	r3, r3, r6
-	str	r3, [r1, #12]
-.L1072:
-	adds	r2, r2, #1
-	b	.L1071
-.L1085:
-	movs	r3, #20
-	ldr	r1, [fp]
-	mul	r3, r3, r10
-	adds	r2, r1, r3
-	ldr	r6, [r1, r3]
-	ldr	r0, [r2, #4]
-	str	r0, [sp, #4]
-	cbnz	r6, .L1075
-	ldr	r8, [r2, #12]
-	movw	r2, #65535
-	ldrh	r1, [r8]
-	cmp	r1, r2
-	bne	.L1076
-.L1075:
-	ldr	r3, .L1098+28
-	movs	r1, #0
+	b	.L775
+.L780:
+	uxth	r6, fp
+	ldrh	r3, [r8, r6, lsl #1]
+	cmp	r3, r1
+	bne	.L777
+	mov	r0, r1
+	str	r1, [sp, #4]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
 	ldrh	r2, [r4]
-	movs	r5, #0
+	add	r3, r8, r6, lsl #1
+	ldr	r1, [sp, #4]
+.L778:
+	cmp	r5, r2
+	bcc	.L779
+	subs	r2, r2, #1
+	strh	r2, [r4]	@ movhi
+.L777:
+	add	fp, fp, #1
+	b	.L776
+.L779:
+	ldrh	r0, [r3, #2]!
+	adds	r5, r5, #1
+	uxth	r5, r5
+	strh	r0, [r3, #-2]	@ movhi
+	b	.L778
+.L786:
+	.align	2
+.L785:
+	.word	.LANCHOR74
+	.word	.LANCHOR3
+	.word	.LANCHOR13
+	.word	.LANCHOR75
+	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
+	.section	.text.update_vpc_list,"ax",%progbits
+	.align	1
+	.global	update_vpc_list
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	update_vpc_list, %function
+update_vpc_list:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	mov	r4, r0
+	ldr	r3, .L797
 	ldr	r3, [r3]
-	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldrh	r0, [r4]
-	bl	INSERT_FREE_LIST
+	ldrh	r3, [r3, r0, lsl #1]
+	cmp	r3, #0
+	bne	.L788
+	ldr	r2, .L797+4
+	ldrh	r1, [r2]
+	cmp	r1, r0
+	bne	.L789
 	movw	r3, #65535
-	strh	r3, [r4]	@ movhi
-	bl	FtlGcPageVarInit
-	b	.L1069
-.L1076:
-	str	r3, [sp, #12]
-	ldr	r3, .L1098+32
-	ldr	r0, [r8, #8]
-	ldr	r2, [r3]
-	cmp	r0, r2
-	bhi	.L1075
-	mov	r2, r6
-	add	r1, sp, #24
-	bl	log2phys
-	ldr	r2, [r8, #12]
-	ldr	r1, [sp, #24]
-	ldr	r3, [sp, #12]
-	cmp	r2, r1
-	beq	.L1079
-.L1080:
-	ldr	r2, [r8, #8]
-	add	r10, r10, #1
-	ldr	r1, [sp, #4]
-	ldr	r0, [r8, #12]
-	bl	FtlGcUpdatePage
-	b	.L1074
-.L1079:
-	str	r3, [sp, #12]
-	adds	r3, r2, #1
-	beq	.L1080
-	str	r2, [sp, #32]
-	movs	r1, #1
-	ldr	r2, .L1098+36
-	add	r0, sp, #28
-	ldr	r2, [r2]
-	str	r2, [sp, #36]
-	ldr	r2, .L1098+40
-	ldr	r2, [r2]
-	str	r2, [sp, #40]
-	mov	r2, r6
-	bl	FlashReadPages
-	ldr	r2, .L1098+44
-	ldr	r1, [fp]
-	ldr	r3, [sp, #12]
+	strh	r3, [r2]	@ movhi
+.L790:
+	ldr	r5, .L797+8
+	mov	r1, r4
+	ldr	r0, .L797+12
+	bl	List_remove_node
+	ldrh	r3, [r5]
+	cbnz	r3, .L792
+	movw	r2, #2823
+	ldr	r1, .L797+16
+	ldr	r0, .L797+20
+	bl	printf
+.L792:
+	ldrh	r3, [r5]
+	mov	r0, r4
+	subs	r3, r3, #1
+	strh	r3, [r5]	@ movhi
+	bl	free_data_superblock
+	mov	r0, r4
+	bl	FtlGcFreeBadSuperBlk
+	ldr	r3, .L797+24
+	ldrh	r2, [r5]
+	ldrh	r3, [r3]
+	add	r3, r3, r2
+	ldr	r2, .L797+28
 	ldrh	r2, [r2]
-	ldr	r0, [sp, #36]
-	add	ip, r3, r1
-	lsls	r2, r2, #7
-.L1081:
-	cmp	r6, r2
-	beq	.L1080
-	ldr	r1, [ip, #8]
-	ldr	r3, [r0, r6, lsl #2]
-	ldr	r1, [r1, r6, lsl #2]
-	cmp	r1, r3
-	beq	.L1082
-	ldr	r2, [sp, #32]
-	ldrh	r1, [r4]
-	ldr	r0, .L1098+48
+	cmp	r3, r2
+	ble	.L796
+	movw	r2, #2826
+	ldr	r1, .L797+16
+	ldr	r0, .L797+20
 	bl	printf
-	b	.L1075
-.L1082:
-	adds	r6, r6, #1
-	b	.L1081
-.L1086:
-	ldr	r1, .L1098
-	movw	r0, #65535
-	ldrh	r3, [r1]
-	cmp	r3, r0
-	beq	.L1088
-	ldr	r0, [sp]
-	add	r3, r3, r0
-	strh	r3, [r1]	@ movhi
-	ldrh	r3, [r2]
-	cmp	r3, r5
-	bls	.L1088
-.L1089:
-	mov	r0, #-1
-	add	sp, sp, #48
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1099:
+.L796:
+	movs	r3, #1
+	b	.L787
+.L789:
+	ldr	r2, .L797+32
+	ldrh	r2, [r2]
+	cmp	r2, r0
+	beq	.L787
+	ldr	r2, .L797+36
+	ldrh	r2, [r2]
+	cmp	r2, r0
+	beq	.L787
+	ldr	r2, .L797+40
+	ldrh	r2, [r2]
+	cmp	r2, r0
+	bne	.L790
+.L787:
+	mov	r0, r3
+	pop	{r3, r4, r5, pc}
+.L788:
+	bl	List_update_data_list
+	movs	r3, #0
+	b	.L787
+.L798:
 	.align	2
-.L1098:
-	.word	.LANCHOR162
-	.word	.LANCHOR19
-	.word	.LANCHOR3
-	.word	.LANCHOR91
-	.word	.LANCHOR23
-	.word	.LANCHOR92
-	.word	.LANCHOR24
+.L797:
 	.word	.LANCHOR42
-	.word	.LANCHOR61
-	.word	.LANCHOR119
-	.word	.LANCHOR124
-	.word	.LANCHOR12
-	.word	.LC100
-	.word	.LANCHOR112
-	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
-	.section	.text.FtlReadRefresh,"ax",%progbits
+	.word	.LANCHOR144
+	.word	.LANCHOR45
+	.word	.LANCHOR41
+	.word	.LANCHOR146
+	.word	.LC1
+	.word	.LANCHOR48
+	.word	.LANCHOR5
+	.word	.LANCHOR51
+	.word	.LANCHOR52
+	.word	.LANCHOR53
+	.size	update_vpc_list, .-update_vpc_list
+	.section	.text.decrement_vpc_count,"ax",%progbits
 	.align	1
-	.global	FtlReadRefresh
+	.global	decrement_vpc_count
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlReadRefresh, %function
-FtlReadRefresh:
-	@ args = 0, pretend = 0, frame = 88
+	.type	decrement_vpc_count, %function
+decrement_vpc_count:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1113
+	movw	r3, #65535
 	push	{r4, r5, r6, lr}
-	sub	sp, sp, #88
-	mov	r4, r3
-	ldr	r0, [r3, #80]
-	cmp	r0, #0
-	beq	.L1101
-	ldr	r6, .L1113+4
-	ldr	r0, [r3, #84]
-	ldr	r1, [r6]
-	cmp	r0, r1
-	bcs	.L1102
-	mov	r5, #2048
-.L1107:
-	ldr	r0, [r4, #84]
-	ldr	r3, [r6]
 	cmp	r0, r3
-	bcs	.L1104
-	movs	r2, #0
-	mov	r1, sp
-	bl	log2phys
-	ldr	r2, [sp]
-	ldr	r3, [r4, #84]
-	adds	r1, r2, #1
-	add	r3, r3, #1
-	str	r3, [r4, #84]
-	beq	.L1105
+	mov	r4, r0
+	beq	.L800
+	ldr	r5, .L808
+	ldr	r3, [r5]
+	ldrh	r2, [r3, r0, lsl #1]
+	cbnz	r2, .L801
+	mov	r1, r0
+	ldr	r0, .L808+4
+	bl	printf
+	ldr	r3, [r5]
+	ldrh	r5, [r3, r4, lsl #1]
+	cbz	r5, .L802
+.L806:
+	movs	r5, #0
+.L799:
+	mov	r0, r5
+	pop	{r4, r5, r6, pc}
+.L802:
+	movw	r2, #2841
+.L807:
+	ldr	r1, .L808+8
+	ldr	r0, .L808+12
+	bl	printf
+	b	.L799
+.L801:
+	subs	r2, r2, #1
+	strh	r2, [r3, r0, lsl #1]	@ movhi
+.L800:
+	ldr	r6, .L808+16
+	movw	r3, #65535
+	ldrh	r0, [r6]
+	cmp	r0, r3
+	bne	.L804
+	strh	r4, [r6]	@ movhi
+	b	.L806
+.L804:
+	cmp	r4, r0
+	beq	.L806
+	bl	update_vpc_list
+	ldr	r3, .L808+20
+	adds	r5, r0, #0
+	ldr	r2, .L808+24
+	it	ne
+	movne	r5, #1
+	strh	r4, [r6]	@ movhi
+	ldr	r3, [r3]
+	ldr	r2, [r2]
+	subs	r3, r3, r2
+	asrs	r2, r3, #1
+	ldr	r3, .L808+28
+	muls	r3, r2, r3
+	ldr	r2, .L808
+	ldr	r2, [r2]
+	uxth	r1, r3
+	ldrh	r2, [r2, r1, lsl #1]
+	cmp	r2, #0
+	bne	.L799
+	cmp	r4, r1
+	beq	.L799
+	movw	r2, #2857
+	b	.L807
+.L809:
+	.align	2
+.L808:
+	.word	.LANCHOR42
+	.word	.LC17
+	.word	.LANCHOR147
+	.word	.LC1
+	.word	.LANCHOR131
+	.word	.LANCHOR41
+	.word	.LANCHOR40
+	.word	-1431655765
+	.size	decrement_vpc_count, .-decrement_vpc_count
+	.section	.text.FtlSuperblockPowerLostFix,"ax",%progbits
+	.align	1
+	.global	FtlSuperblockPowerLostFix
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlSuperblockPowerLostFix, %function
+FtlSuperblockPowerLostFix:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r3, #-1
+	sub	sp, sp, #24
+	ldr	r2, .L823
+	movs	r6, #0
+	mov	r4, r0
 	str	r3, [sp, #20]
-	add	r0, sp, #88
-	ldr	r3, .L1113+8
-	movs	r1, #1
-	str	r2, [sp, #8]
-	movs	r2, #0
-	str	r2, [r0, #-84]!
+	ldr	r3, .L823+4
+	ldr	r5, [r2]
+	mvn	r2, #2
+	ldr	r8, .L823+16
 	ldr	r3, [r3]
+	str	r5, [sp, #16]
 	str	r3, [sp, #12]
-	add	r3, sp, #24
-	str	r3, [sp, #16]
-	bl	FlashReadPages
-	ldr	r3, [sp, #4]
-	cmp	r3, #256
-	bne	.L1104
-	ldr	r0, [sp]
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-	bl	FtlGcRefreshBlock
-.L1104:
-	mov	r0, #-1
-.L1100:
-	add	sp, sp, #88
-	@ sp needed
-	pop	{r4, r5, r6, pc}
-.L1105:
-	subs	r5, r5, #1
-	bne	.L1107
-	b	.L1104
-.L1102:
-	ldr	r2, .L1113+12
-	movs	r0, #0
-	str	r0, [r3, #80]
-	str	r0, [r3, #84]
-	ldr	r2, [r2]
-	str	r2, [r3, #76]
-	b	.L1100
-.L1101:
-	ldr	r1, [r3, #76]
-	ldr	r3, .L1113+12
-	ldr	r5, [r3]
-	add	r3, r5, #1048576
-	cmp	r1, r3
-	bhi	.L1110
-	ldr	r3, .L1113+16
+	str	r2, [r5, #8]
+	mvn	r2, #1
+	str	r2, [r5, #12]
+	ldrh	r2, [r0]
+	strh	r6, [r5]	@ movhi
+	strh	r2, [r5, #2]	@ movhi
+	movw	r2, #61589
+	str	r2, [r3]
+	add	r2, r2, #304087040
+	add	r2, r2, #1269760
+	addw	r2, r2, #1507
+	str	r2, [r3, #4]
+	ldrh	r3, [r0, #4]
+	tst	r3, #1
+	ite	eq
+	moveq	r7, #6
+	movne	r7, #7
+.L816:
+	ldrh	r3, [r4, #4]
+	cbnz	r3, .L812
+.L813:
+	ldr	r3, .L823+8
+	ldrh	r1, [r4]
+	ldrh	r0, [r4, #4]
 	ldr	r2, [r3]
-	mov	r3, #33554432
-	lsrs	r2, r2, #10
-	asrs	r3, r3, r2
-	add	r3, r3, r1
-	cmp	r5, r3
-	bhi	.L1110
-	ldr	r3, .L1113+20
-	ldrb	r3, [r3, #28]	@ zero_extendqisi2
-	cmp	r3, #0
-	bne	.L1100
-.L1110:
-	movs	r3, #1
-	movs	r0, #0
-	str	r3, [r4, #80]
-	str	r0, [r4, #84]
-	str	r5, [r4, #76]
-	b	.L1100
-.L1114:
+	ldrh	r3, [r2, r1, lsl #1]
+	subs	r3, r3, r0
+	strh	r3, [r2, r1, lsl #1]	@ movhi
+	ldr	r3, .L823+12
+	ldrh	r3, [r3]
+	strh	r3, [r4, #2]	@ movhi
+	movs	r3, #0
+	strb	r3, [r4, #6]
+	strh	r3, [r4, #4]	@ movhi
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L812:
+	mov	r0, r4
+	bl	get_new_active_ppa
+	str	r0, [sp, #8]
+	adds	r0, r0, #1
+	beq	.L813
+	ldr	r3, [r8]
+	movs	r1, #1
+	add	r0, sp, #4
+	str	r3, [r5, #4]
+	adds	r3, r3, #1
+	adds	r2, r3, #1
+	it	eq
+	moveq	r3, r6
+	str	r3, [r8]
+	movs	r3, #0
+	mov	r2, r3
+	bl	FlashProgPages
+	ldrh	r0, [r4]
+	bl	decrement_vpc_count
+	subs	r7, r7, #1
+	bne	.L816
+	b	.L813
+.L824:
 	.align	2
-.L1113:
-	.word	.LANCHOR81
-	.word	.LANCHOR61
-	.word	.LANCHOR121
-	.word	.LANCHOR62
-	.word	.LANCHOR76
-	.word	.LANCHOR39
-	.size	FtlReadRefresh, .-FtlReadRefresh
-	.section	.text.FtlMapBlkWriteDump_data,"ax",%progbits
+.L823:
+	.word	.LANCHOR114
+	.word	.LANCHOR106
+	.word	.LANCHOR42
+	.word	.LANCHOR19
+	.word	.LANCHOR83
+	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
+	.section	.text.FtlMakeBbt,"ax",%progbits
 	.align	1
-	.global	FtlMapBlkWriteDump_data
+	.global	FtlMakeBbt
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlMapBlkWriteDump_data, %function
-FtlMapBlkWriteDump_data:
-	@ args = 0, pretend = 0, frame = 0
+	.type	FtlMakeBbt, %function
+FtlMakeBbt:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, [r0, #36]
-	push	{r4, r5, r6, lr}
-	mov	r6, r0
-	cbz	r3, .L1115
-	ldrh	r5, [r0, #6]
-	movs	r3, #0
-	ldr	r2, [r0, #24]
-	str	r3, [r0, #36]
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r6, #0
+	ldr	r7, .L844
+	bl	FtlBbtMemInit
+	sub	r8, r7, #18
+	bl	FtlLoadFactoryBbt
+.L826:
+	ldr	r3, .L844+4
+	ldrh	r3, [r3]
+	cmp	r6, r3
+	bcc	.L832
+	ldr	r5, .L844+8
+	movs	r4, #0
+.L833:
+	ldrh	r3, [r5]
+	uxth	r0, r4
+	adds	r4, r4, #1
+	cmp	r3, r0
+	bhi	.L834
+	ldr	r4, .L844+12
+	movw	r6, #65535
+	ldrh	r5, [r4, #12]
+	subs	r5, r5, #1
+	uxth	r5, r5
+.L835:
+	ldrh	r3, [r4, #12]
+	subs	r3, r3, #47
+	cmp	r3, r5
+	bgt	.L839
+	mov	r0, r5
+	bl	FtlBbmIsBadBlock
+	cmp	r0, #1
+	beq	.L836
+	mov	r0, r5
+	bl	FlashTestBlk
+	cmp	r0, #0
+	beq	.L837
+	mov	r0, r5
+	bl	FtlBbmMapBadBlock
+.L836:
 	subs	r5, r5, #1
-	ldr	r3, .L1119
-	ldr	r1, .L1119+4
 	uxth	r5, r5
-	ldr	r4, .L1119+8
-	ldr	r2, [r2, r5, lsl #2]
+	b	.L835
+.L832:
+	ldr	r3, .L844+16
+	ldr	r5, .L844+20
+	ldrh	r2, [r8, #2]!
+	ldr	r4, .L844+24
 	ldr	r0, [r3]
-	ldr	r1, [r1]
-	str	r2, [r4, #4]
+	movw	r3, #65535
+	ldr	r10, [r5]
+	cmp	r2, r3
+	mov	fp, r4
+	ldr	r3, .L844+28
 	str	r0, [r4, #8]
-	str	r1, [r4, #12]
-	cbz	r2, .L1117
-	movs	r2, #1
+	str	r10, [r4, #12]
+	beq	.L827
+	ldrh	r5, [r3]
 	mov	r0, r4
+	str	r3, [sp]
+	mla	r5, r6, r5, r2
+	lsls	r2, r5, #10
+	str	r2, [r4, #4]
+	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.L1118:
-	ldr	r2, [r4, #8]
-	mov	r1, r5
-	mov	r0, r6
-	pop	{r4, r5, r6, lr}
-	b	FtlMapWritePage
-.L1117:
-	ldr	r3, .L1119+12
-	movs	r1, #255
+	ldr	r3, [sp]
+	ldr	r1, [r4, #8]
+	ldr	r0, [r7]
 	ldrh	r2, [r3]
+	adds	r2, r2, #7
+	asrs	r2, r2, #3
+	bl	ftl_memcpy
+.L828:
+	uxth	r0, r5
+	adds	r6, r6, #1
+	adds	r7, r7, #4
+	bl	FtlBbmMapBadBlock
+	b	.L826
+.L827:
+	mov	r1, r6
+	str	r3, [sp]
+	bl	FlashGetBadBlockList
+	ldr	r0, [r4, #8]
+	ldr	r1, [r7]
+	bl	FtlBbt2Bitmap
+	ldr	r3, [sp]
+	str	r5, [sp, #4]
+	ldrh	r4, [r3]
+	subs	r4, r4, #1
+	uxth	r4, r4
+.L829:
+	ldr	r3, [sp]
+	ldrh	r0, [r3]
+	smlabb	r0, r0, r6, r4
+	uxth	r0, r0
+	bl	FtlBbmIsBadBlock
+	cmp	r0, #1
+	beq	.L830
+	ldr	r3, [sp, #4]
+	movs	r2, #16
+	movs	r1, #0
+	strh	r4, [r8]	@ movhi
+	ldr	r0, [r3]
 	bl	ftl_memset
-	b	.L1118
-.L1115:
-	pop	{r4, r5, r6, pc}
-.L1120:
+	ldr	r3, .L844+16
+	mov	r2, #4096
+	movs	r1, #0
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldr	r2, [sp]
+	movw	r3, #61664
+	strh	r3, [r10]	@ movhi
+	movs	r3, #0
+	str	r3, [r10, #4]
+	ldrh	r5, [r2]
+	ldrh	r3, [r8]
+	ldr	r1, [r7]
+	ldr	r0, [fp, #8]
+	strh	r3, [r10, #2]	@ movhi
+	mla	r5, r6, r5, r3
+	lsls	r3, r5, #10
+	str	r3, [fp, #4]
+	ldr	r3, .L844+32
+	ldrh	r2, [r3]
+	lsls	r2, r2, #2
+	bl	ftl_memcpy
+	movs	r2, #1
+	ldr	r0, .L844+24
+	mov	r1, r2
+	bl	FlashEraseBlocks
+	movs	r3, #1
+	ldr	r0, .L844+24
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+	ldr	r3, [fp]
+	adds	r3, r3, #1
+	bne	.L828
+	uxth	r0, r5
+	bl	FtlBbmMapBadBlock
+	b	.L829
+.L830:
+	subs	r4, r4, #1
+	uxth	r4, r4
+	b	.L829
+.L834:
+	bl	FtlBbmMapBadBlock
+	b	.L833
+.L837:
+	ldrh	r3, [r4]
+	cmp	r3, r6
+	bne	.L838
+	strh	r5, [r4]	@ movhi
+	b	.L836
+.L838:
+	strh	r5, [r4, #4]	@ movhi
+.L839:
+	ldr	r3, .L844+36
+	movs	r5, #0
+	str	r5, [r4, #8]
+	movs	r1, #1
+	movs	r2, #2
+	strh	r5, [r4, #2]	@ movhi
+	ldr	r0, [r3]
+	ldrh	r3, [r4]
+	lsls	r3, r3, #10
+	str	r3, [r0, #4]
+	ldrh	r3, [r4, #4]
+	lsls	r3, r3, #10
+	str	r3, [r0, #24]
+	bl	FlashEraseBlocks
+	ldrh	r0, [r4]
+	bl	FtlBbmMapBadBlock
+	ldrh	r0, [r4, #4]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	ldr	r3, [r4, #8]
+	ldrh	r2, [r4, #4]
+	strh	r5, [r4, #2]	@ movhi
+	adds	r3, r3, #1
+	str	r3, [r4, #8]
+	ldrh	r3, [r4]
+	strh	r2, [r4]	@ movhi
+	strh	r3, [r4, #4]	@ movhi
+	bl	FtlBbmTblFlush
+	mov	r0, r5
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L845:
 	.align	2
-.L1119:
-	.word	.LANCHOR116
-	.word	.LANCHOR123
-	.word	.LANCHOR148
-	.word	.LANCHOR23
-	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
-	.section	.text.FlashTestBlk,"ax",%progbits
+.L844:
+	.word	.LANCHOR37+28
+	.word	.LANCHOR10
+	.word	.LANCHOR25
+	.word	.LANCHOR37
+	.word	.LANCHOR106
+	.word	.LANCHOR114
+	.word	.LANCHOR138
+	.word	.LANCHOR17
+	.word	.LANCHOR127
+	.word	.LANCHOR79
+	.size	FtlMakeBbt, .-FtlMakeBbt
+	.section	.text.ftl_memcmp,"ax",%progbits
 	.align	1
-	.global	FlashTestBlk
+	.global	ftl_memcmp
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashTestBlk, %function
-FlashTestBlk:
-	@ args = 0, pretend = 0, frame = 88
+	.type	ftl_memcmp, %function
+ftl_memcmp:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	cmp	r0, #11
-	push	{r4, r5, lr}
-	mov	r4, r0
-	sub	sp, sp, #92
-	bls	.L1123
-	ldr	r5, .L1124
-	add	r0, sp, #24
-	movs	r2, #32
-	movs	r1, #165
-	str	r0, [sp, #16]
-	lsls	r4, r4, #10
-	ldr	r3, [r5]
-	str	r3, [sp, #12]
-	bl	ftl_memset
-	movs	r2, #8
-	movs	r1, #90
-	ldr	r0, [r5]
-	bl	ftl_memset
-	movs	r2, #1
-	add	r0, sp, #4
-	mov	r1, r2
-	str	r4, [sp, #8]
-	bl	FlashEraseBlocks
-	movs	r3, #1
-	add	r0, sp, #4
-	mov	r2, r3
-	mov	r1, r3
-	bl	FlashProgPages
-	ldr	r4, [sp, #4]
-	movs	r2, #1
-	movs	r1, #0
-	add	r0, sp, #4
-	adds	r4, r4, #0
-	it	ne
-	movne	r4, #1
-	negs	r4, r4
-	bl	FlashEraseBlocks
-.L1121:
-	mov	r0, r4
-	add	sp, sp, #92
-	@ sp needed
-	pop	{r4, r5, pc}
-.L1123:
-	movs	r4, #0
-	b	.L1121
-.L1125:
+	@ link register save eliminated.
+	b	memcmp
+	.size	ftl_memcmp, .-ftl_memcmp
+	.section	.text.js_hash,"ax",%progbits
+	.align	1
+	.global	js_hash
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	js_hash, %function
+js_hash:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L850
+	add	r1, r1, r0
+	push	{r4, lr}
+.L848:
+	cmp	r0, r1
+	bne	.L849
+	mov	r0, r3
+	pop	{r4, pc}
+.L849:
+	lsrs	r2, r3, #2
+	ldrb	r4, [r0], #1	@ zero_extendqisi2
+	add	r2, r2, r3, lsl #5
+	add	r2, r2, r4
+	eors	r3, r3, r2
+	b	.L848
+.L851:
 	.align	2
-.L1124:
-	.word	.LANCHOR121
-	.size	FlashTestBlk, .-FlashTestBlk
-	.section	.text.FtlBbmTblFlush,"ax",%progbits
+.L850:
+	.word	1204201446
+	.size	js_hash, .-js_hash
+	.section	.text.Ftl_write_map_blk_to_last_page,"ax",%progbits
 	.align	1
-	.global	FtlBbmTblFlush
+	.global	Ftl_write_map_blk_to_last_page
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlBbmTblFlush, %function
-FtlBbmTblFlush:
-	@ args = 0, pretend = 0, frame = 8
+	.type	Ftl_write_map_blk_to_last_page, %function
+Ftl_write_map_blk_to_last_page:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r4, #0
-	ldr	r7, .L1135
-	movs	r1, #0
-	ldr	r5, .L1135+4
-	ldr	r3, [r7]
-	mov	fp, r7
-	ldr	r8, .L1135+48
-	ldr	r6, .L1135+8
-	str	r3, [r5, #12]
-	ldr	r7, .L1135+12
-	ldr	r3, .L1135+16
-	ldr	r10, .L1135+52
-	ldr	r0, [r8]
-	ldrh	r2, [r3]
-	str	r0, [r5, #8]
-	bl	ftl_memset
-.L1127:
-	ldrh	r3, [r7]
-	cmp	r4, r3
-	blt	.L1128
-	ldr	r6, [r5, #12]
-	movs	r2, #16
-	ldr	r4, .L1135+20
-	movs	r1, #255
-	movs	r7, #0
-	mov	r0, r6
-	bl	ftl_memset
-	movw	r3, #61649
-	mov	r10, r4
-	strh	r3, [r6]	@ movhi
-	ldr	r3, [r4, #8]
-	str	r7, [sp, #12]
-	str	r3, [r6, #4]
-	ldrh	r3, [r4]
-	strh	r3, [r6, #2]	@ movhi
-	ldrh	r3, [r4, #4]
-	strh	r3, [r6, #8]	@ movhi
-	ldrh	r3, [r4, #6]
-	strh	r3, [r6, #10]	@ movhi
-	ldr	r3, .L1135+24
-	ldr	r3, [r3]
-	strh	r3, [r6, #12]	@ movhi
-.L1129:
-	ldr	r3, [r8]
-	ldrh	r2, [r4, #2]
-	ldrh	r1, [r4]
-	str	r3, [r5, #8]
-	ldr	r3, [fp]
-	ldrh	r0, [r6, #10]
-	str	r3, [r5, #12]
-	movs	r3, #0
-	str	r3, [r5]
-	orr	r3, r2, r1, lsl #10
-	str	r3, [r5, #4]
-	ldrh	r3, [r4, #4]
-	str	r0, [sp]
-	ldr	r0, .L1135+28
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	movw	r2, #65535
+	ldrh	r3, [r0]
+	mov	r4, r0
+	ldr	r5, [r0, #12]
+	cmp	r3, r2
+	bne	.L853
+	ldrh	r3, [r0, #8]
+	cbz	r3, .L854
+	movw	r2, #641
+	ldr	r1, .L862
+	ldr	r0, .L862+4
 	bl	printf
-	ldr	r3, .L1135+32
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r3]
-	subs	r3, r3, #1
-	cmp	r2, r3
-	blt	.L1130
-	ldr	r3, [r4, #8]
-	mov	r1, #0	@ movhi
-	ldrh	r2, [r4]
-	strh	r1, [r4, #2]	@ movhi
+.L854:
+	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
-	str	r3, [r4, #8]
+	strh	r3, [r4, #8]	@ movhi
+	bl	FtlFreeSysBlkQueueOut
+	movs	r3, #0
+	strh	r0, [r5]	@ movhi
+	strh	r3, [r4, #2]	@ movhi
+	strh	r3, [r4]	@ movhi
+	ldr	r3, [r4, #28]
+	adds	r3, r3, #1
+	str	r3, [r4, #28]
+.L855:
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L853:
+	ldrh	r7, [r5, r3, lsl #1]
+	movs	r1, #255
+	ldrh	r3, [r0, #2]
+	ldr	r6, .L862+8
+	ldr	r10, .L862+24
+	ldr	r8, [r0, #24]
+	orr	r3, r3, r7, lsl #10
+	ldr	r0, [r10]
 	str	r3, [r6, #4]
-	strh	r2, [r6, #8]	@ movhi
+	ldr	r3, .L862+12
+	str	r0, [r6, #8]
+	ldr	r5, [r3]
+	ldr	r3, [r4, #28]
+	str	r5, [r6, #12]
+	str	r3, [r5, #4]
+	movw	r3, #64245
+	strh	r3, [r5, #8]	@ movhi
 	ldrh	r3, [r4, #4]
-	strh	r2, [r4, #4]	@ movhi
-	ldr	r2, .L1135+36
-	strh	r3, [r4]	@ movhi
-	lsls	r3, r3, #10
-	ldr	r0, [r2]
+	strh	r7, [r5, #2]	@ movhi
+	strh	r3, [r5]	@ movhi
+	ldr	r3, .L862+16
+	ldrh	r2, [r3]
+	lsls	r2, r2, #3
+	bl	ftl_memset
+	ldrh	ip, [r4, #6]
+	movs	r3, #0
+	ldr	r1, [r10]
+	mov	r2, r3
+.L856:
+	uxth	r0, r3
+	cmp	ip, r0
+	bhi	.L858
+	ldr	r3, .L862+20
+	ldr	r0, [r6, #8]
+	ldrh	r1, [r3]
+	bl	js_hash
 	movs	r2, #1
-	str	r3, [r5, #4]
+	str	r0, [r5, #12]
+	movs	r3, #0
 	mov	r1, r2
-	str	r3, [r0, #4]
-	bl	FlashEraseBlocks
-.L1130:
-	movs	r3, #1
-	ldr	r0, .L1135+4
-	mov	r2, r3
-	mov	r1, r3
+	ldr	r0, .L862+8
 	bl	FlashProgPages
-	ldrh	r3, [r10, #2]
+	ldrh	r3, [r4, #2]
+	mov	r0, r4
 	adds	r3, r3, #1
-	strh	r3, [r10, #2]	@ movhi
-	ldr	r3, [r5]
+	strh	r3, [r4, #2]	@ movhi
+	bl	ftl_map_blk_gc
+	b	.L855
+.L858:
+	ldr	r0, [r8, r3, lsl #2]
+	cmp	r7, r0, lsr #10
+	bne	.L857
+	adds	r2, r2, #1
+	uxth	r2, r2
+	str	r3, [r1, r2, lsl #3]
+	add	lr, r1, r2, lsl #3
+	ldr	r0, [r8, r3, lsl #2]
+	str	r0, [lr, #4]
+.L857:
 	adds	r3, r3, #1
-	bne	.L1131
-	adds	r7, r7, #1
-	ldr	r1, [r5, #4]
-	uxth	r7, r7
-	ldr	r0, .L1135+40
-	bl	printf
-	cmp	r7, #3
-	bls	.L1129
-	mov	r2, r7
-	ldr	r1, [r5, #4]
-	ldr	r0, .L1135+44
-	bl	printf
-.L1133:
-	b	.L1133
-.L1128:
-	ldrh	r2, [r10]
-	ldr	r3, [r5, #8]
-	ldr	r1, [r6, #4]!
-	mul	r0, r2, r4
-	lsls	r2, r2, #2
-	adds	r4, r4, #1
-	add	r0, r3, r0, lsl #2
-	bl	ftl_memcpy
-	b	.L1127
-.L1134:
-	movs	r3, #1
-	str	r3, [sp, #12]
-	b	.L1129
-.L1131:
-	ldr	r3, [sp, #12]
-	cmp	r3, #0
-	beq	.L1134
-	movs	r0, #0
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1136:
+	b	.L856
+.L863:
 	.align	2
-.L1135:
-	.word	.LANCHOR123
+.L862:
 	.word	.LANCHOR148
-	.word	.LANCHOR37+24
-	.word	.LANCHOR10
-	.word	.LANCHOR23
-	.word	.LANCHOR37
-	.word	.LANCHOR2
-	.word	.LC101
+	.word	.LC1
+	.word	.LANCHOR138
+	.word	.LANCHOR114
 	.word	.LANCHOR20
+	.word	.LANCHOR23
 	.word	.LANCHOR106
-	.word	.LC102
-	.word	.LC103
-	.word	.LANCHOR115
-	.word	.LANCHOR137
-	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
-	.section	.text.allocate_data_superblock,"ax",%progbits
+	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
+	.section	.text.FtlMapWritePage,"ax",%progbits
 	.align	1
-	.global	allocate_data_superblock
+	.global	FtlMapWritePage
 	.syntax unified
 	.thumb
 	.thumb_func
-	.fpu softvfp
-	.type	allocate_data_superblock, %function
-allocate_data_superblock:
+	.fpu softvfp
+	.type	FtlMapWritePage, %function
+FtlMapWritePage:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-.L1138:
-	ldr	r3, .L1177
-	ldr	r8, .L1177+68
-	ldrh	r3, [r3]
-	ldr	r10, .L1177+72
-	ldrh	r2, [r8]
-	add	r3, r3, r2
-	ldrh	r2, [r10]
-	cmp	r3, r2
-	ble	.L1139
-	movw	r2, #2615
-	ldr	r1, .L1177+4
-	ldr	r0, .L1177+8
-	bl	printf
-.L1139:
-	ldr	r3, .L1177+12
-	cmp	r4, r3
-	bne	.L1165
-	ldr	r3, .L1177
-	ldr	r2, .L1177+16
-	ldrh	r3, [r3]
-	ldr	r2, [r2]
-	lsrs	r1, r3, #1
-	muls	r2, r3, r2
-	adds	r1, r1, #1
-	add	r1, r1, r2, lsr #2
-	uxth	r1, r1
-	cbz	r1, .L1140
-	subs	r1, r1, #1
-	uxth	r1, r1
-.L1140:
-	ldr	r0, .L1177+20
-	bl	List_pop_index_node
-	ldr	r3, .L1177
-	mov	r5, r0
-	uxth	r7, r0
-	ldrh	r3, [r3]
-	cbnz	r3, .L1141
-	mov	r2, #2624
-	ldr	r1, .L1177+4
-	ldr	r0, .L1177+8
-	bl	printf
-.L1141:
-	ldr	r3, .L1177
-	ldr	r2, .L1177
-	ldrh	r3, [r3]
+	ldr	r8, .L888+32
+	mov	r7, r1
+	movs	r6, #0
+	str	r2, [sp]
+	mov	fp, r8
+.L865:
+	ldr	r2, .L888
+	ldr	r3, [r2]
+	adds	r3, r3, #1
+	str	r3, [r2]
+	ldrh	r3, [r8]
+	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
-	strh	r3, [r2]	@ movhi
-	ldrh	r3, [r10]
-	cmp	r3, r7
-	bls	.L1138
-	uxth	r5, r5
-	lsls	r3, r5, #1
-	str	r3, [sp]
-	ldr	r3, .L1177+24
-	ldr	r3, [r3]
-	ldrh	r6, [r3, r5, lsl #1]
-	cmp	r6, #0
-	bne	.L1138
-	strh	r7, [r4]	@ movhi
+	cmp	r2, r3
+	bge	.L866
+	ldrh	r2, [r4]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L867
+.L866:
 	mov	r0, r4
-	bl	make_superblock
-	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1143
-	ldr	r3, .L1177+24
-	movw	r2, #65535
-	mov	r0, r7
-	ldr	r3, [r3]
-	strh	r2, [r3, r5, lsl #1]	@ movhi
-	bl	INSERT_DATA_LIST
-	ldr	r3, .L1177
-	ldrh	r2, [r8]
-	ldrh	r3, [r3]
-	add	r3, r3, r2
-	ldrh	r2, [r10]
-	cmp	r3, r2
-	ble	.L1138
-	movw	r2, #2638
-	ldr	r1, .L1177+4
-	ldr	r0, .L1177+8
-	bl	printf
-	b	.L1138
-.L1165:
-	movs	r1, #0
-	b	.L1140
-.L1143:
-	ldr	r3, .L1177
-	ldrh	r2, [r8]
-	ldrh	r3, [r3]
-	add	r3, r3, r2
-	ldrh	r2, [r10]
-	cmp	r3, r2
-	ble	.L1145
-	movw	r2, #2641
-	ldr	r1, .L1177+4
-	ldr	r0, .L1177+8
-	bl	printf
-.L1145:
-	ldr	r3, .L1177+28
-	add	lr, r4, #16
-	ldr	r2, .L1177+32
-	mov	r8, #0
-	ldr	ip, [r3]
-	ldrh	r0, [r2]
-	movs	r2, #20
-	mov	r3, ip
-	mla	r0, r2, r0, ip
-.L1146:
-	cmp	r0, r3
-	bne	.L1148
-	cbnz	r6, .L1149
-	movw	r2, #2652
-	ldr	r1, .L1177+4
-	ldr	r0, .L1177+8
+	bl	Ftl_write_map_blk_to_last_page
+.L867:
+	ldrh	r2, [r4]
+	ldr	r3, [r4, #12]
+	ldrh	r3, [r3, r2, lsl #1]
+	cbnz	r3, .L868
+	mov	r2, #700
+	ldr	r1, .L888+4
+	ldr	r0, .L888+8
 	bl	printf
-.L1149:
-	ldr	r3, .L1177+36
-	ldrh	r3, [r3]
-	cmp	r3, r7
-	bne	.L1150
-	movw	r2, #2654
-	ldr	r1, .L1177+4
-	ldr	r0, .L1177+8
+.L868:
+	ldrh	r2, [r4]
+	ldrh	r3, [r4, #10]
+	cmp	r2, r3
+	bcc	.L869
+	movw	r2, #701
+	ldr	r1, .L888+4
+	ldr	r0, .L888+8
 	bl	printf
-.L1150:
-	ldrb	r2, [r4, #8]	@ zero_extendqisi2
-	ldr	r3, .L1177+40
-	ldr	fp, .L1177+76
-	ldr	r8, .L1177+80
-	ldr	r1, [r3]
-	cmp	r2, #0
-	bne	.L1151
-	ldrh	r2, [r1, r5, lsl #1]
-	cmp	r2, #0
-	beq	.L1152
-	ldr	r0, .L1177+44
-	ldrh	r0, [r0]
-	add	r2, r2, r0
-.L1175:
-	strh	r2, [r1, r5, lsl #1]	@ movhi
-	mov	r0, r7
-	ldr	r2, [fp]
+.L869:
+	ldrh	r2, [r4]
 	movs	r1, #0
+	ldr	r3, [r4, #12]
+	ldr	r5, .L888+12
+	ldrh	r3, [r3, r2, lsl #1]
+	ldrh	r2, [r4, #2]
 	str	r3, [sp, #4]
-	adds	r2, r2, #1
-	str	r2, [fp]
-	bl	ftl_set_blk_mode
-.L1176:
+	orr	r2, r2, r3, lsl #10
+	ldr	r3, [sp]
+	str	r2, [r5, #4]
+	ldr	r2, .L888+16
+	str	r3, [r5, #8]
+	ldr	r0, [r2]
+	movs	r2, #16
+	str	r0, [r5, #12]
+	bl	ftl_memset
+	ldr	r1, [r4, #28]
+	ldr	r10, [r5, #12]
 	ldr	r3, [sp, #4]
-	ldr	r0, [fp]
-	ldr	r3, [r3]
-	ldrh	r1, [r3, r5, lsl #1]
-	ldr	r3, .L1177+48
-	ldr	r2, [r3]
-	cmp	r1, r2
-	it	hi
-	strhi	r1, [r3]
-	ldr	r3, .L1177+44
-	ldrh	r1, [r10]
-	ldrh	r2, [r3]
-	ldr	r3, [r8]
-	mla	r0, r0, r2, r3
-	bl	__aeabi_uidiv
-	ldr	r3, .L1177+52
-	ldr	ip, .L1177+84
-	str	r0, [r3]
-	ldr	r3, .L1177+56
-	ldr	r2, [r3]
-	ldr	r3, [r2, #16]
-	adds	r3, r3, #1
-	str	r3, [r2, #16]
-	movs	r2, #20
-	ldr	r3, .L1177+28
-	ldr	r0, [r3]
-	adds	r3, r0, #4
-	mla	r2, r2, r6, r0
-	adds	r2, r2, #24
-.L1156:
-	adds	r3, r3, #20
-	cmp	r2, r3
-	bne	.L1157
-	mov	r2, r6
-	ldrb	r1, [r4, #8]	@ zero_extendqisi2
-	mov	r8, #0
-	bl	FlashEraseBlocks
-	mov	r10, r8
-	movs	r3, #20
-.L1158:
-	uxth	r2, r8
-	cmp	r6, r2
-	bhi	.L1160
-	cmp	r10, #0
-	beq	.L1161
-	mov	r0, r7
-	bl	update_multiplier_value
-	bl	FtlBbmTblFlush
-.L1161:
-	ldrb	r2, [r4, #7]	@ zero_extendqisi2
-	cmp	r2, #0
-	bne	.L1162
-	ldr	r3, .L1177+24
-	movw	r2, #65535
-	ldr	r3, [r3]
-	strh	r2, [r3, r5, lsl #1]	@ movhi
-	b	.L1138
-.L1148:
-	ldrh	r1, [lr], #2
-	movw	fp, #65535
-	str	r8, [r3, #8]
-	str	r8, [r3, #12]
-	cmp	r1, fp
-	beq	.L1147
-	mla	fp, r2, r6, ip
+	ldr	r0, [r5, #8]
+	str	r1, [r10, #4]
+	ldrh	r1, [r4, #4]
+	strh	r3, [r10, #2]	@ movhi
+	ldr	r3, .L888+20
+	strh	r1, [r10]	@ movhi
+	strh	r7, [r10, #8]	@ movhi
+	ldrh	r1, [r3]
+	bl	js_hash
+	movs	r3, #1
+	str	r0, [r10, #12]
+	mov	r2, r3
+	mov	r1, r3
+	mov	r0, r5
+	bl	FlashProgPages
+	ldrh	r2, [r4, #2]
+	ldr	r1, [r5]
+	adds	r2, r2, #1
+	uxth	r2, r2
+	adds	r3, r1, #1
+	strh	r2, [r4, #2]	@ movhi
+	bne	.L870
+	ldr	r1, [r5, #4]
 	adds	r6, r6, #1
-	lsls	r1, r1, #10
+	ldr	r0, .L888+24
 	uxth	r6, r6
-	str	r1, [fp, #4]
-.L1147:
-	adds	r3, r3, #20
-	b	.L1146
-.L1152:
-	movs	r2, #2
-	b	.L1175
-.L1151:
-	ldrh	r2, [r1, r5, lsl #1]
-	mov	r0, r7
-	str	r3, [sp, #4]
-	adds	r2, r2, #1
-	strh	r2, [r1, r5, lsl #1]	@ movhi
-	ldr	r2, [r8]
-	adds	r2, r2, #1
-	str	r2, [r8]
-	bl	ftl_set_blk_mode.part.6
-	b	.L1176
-.L1157:
-	ldr	r1, [r3, #-20]
-	and	r1, r1, ip
-	str	r1, [r3, #-20]
-	b	.L1156
-.L1160:
-	ldr	r1, .L1177+28
-	mul	r2, r3, r8
-	ldr	r1, [r1]
-	ldr	fp, [r1, r2]
-	adds	r0, r1, r2
-	cmp	fp, #-1
-	bne	.L1159
-	ldr	r0, [r0, #4]
-	add	r10, r10, #1
+	bl	printf
+	ldrh	r2, [r4, #2]
+	cmp	r2, #2
+	ittt	ls
+	ldrhls	r2, [fp]
+	addls	r2, r2, #-1
+	strhls	r2, [r4, #2]	@ movhi
+	cmp	r6, #3
+	bls	.L872
+	mov	r2, r6
+	ldr	r1, [r5, #4]
+	ldr	r0, .L888+28
+	bl	printf
+.L873:
+	b	.L873
+.L872:
+	ldr	r3, [r4, #32]
+	cmp	r3, #0
+	beq	.L865
+.L887:
+	b	.L887
+.L870:
+	cmp	r2, #1
+	beq	.L876
+	cmp	r1, #256
+	beq	.L876
+	ldr	r0, [r4, #36]
+	cbz	r0, .L877
+.L876:
+	movs	r3, #0
+	str	r3, [r4, #36]
+	b	.L865
+.L877:
+	ldr	r2, [r5, #4]
+	ldr	r3, [r4, #24]
+	str	r2, [r3, r7, lsl #2]
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L889:
+	.align	2
+.L888:
+	.word	.LANCHOR88
+	.word	.LANCHOR149
+	.word	.LC1
+	.word	.LANCHOR138
+	.word	.LANCHOR114
+	.word	.LANCHOR23
+	.word	.LC18
+	.word	.LC19
+	.word	.LANCHOR20
+	.size	FtlMapWritePage, .-FtlMapWritePage
+	.section	.text.load_l2p_region,"ax",%progbits
+	.align	1
+	.global	load_l2p_region
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	load_l2p_region, %function
+load_l2p_region:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L897
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r5, r0
+	mov	r10, r1
+	ldrh	r2, [r3]
 	str	r3, [sp, #4]
-	ubfx	r0, r0, #10, #16
-	bl	FtlBbmMapBadBlock
-	add	r2, r4, r8, lsl #1
-	ldr	r3, [sp, #4]
-	strh	fp, [r2, #16]	@ movhi
-	ldrb	r2, [r4, #7]	@ zero_extendqisi2
-	subs	r2, r2, #1
-	strb	r2, [r4, #7]
-.L1159:
-	add	r8, r8, #1
-	b	.L1158
-.L1162:
-	ldr	r3, .L1177+60
-	ldr	r1, .L1177+64
-	ldrh	r3, [r3]
-	strh	r7, [r4]	@ movhi
-	smulbb	r3, r3, r2
-	movs	r2, #0
-	strh	r2, [r4, #2]	@ movhi
-	strb	r2, [r4, #6]
-	ldr	r2, [r1]
-	uxth	r3, r3
-	strh	r3, [r4, #4]	@ movhi
-	str	r2, [r4, #12]
-	adds	r2, r2, #1
-	str	r2, [r1]
-	ldr	r2, .L1177+24
-	ldr	r1, [sp]
-	ldr	r2, [r2]
-	strh	r3, [r2, r1]	@ movhi
-	ldrh	r3, [r4, #4]
-	cbz	r3, .L1163
-	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1164
-.L1163:
-	movw	r2, #2707
-	ldr	r1, .L1177+4
-	ldr	r0, .L1177+8
+	cmp	r2, r0
+	bcs	.L891
+	movw	r2, #485
+	ldr	r1, .L897+4
+	ldr	r0, .L897+8
 	bl	printf
-.L1164:
+.L891:
+	ldr	fp, .L897+48
+	movs	r4, #12
+	ldr	r7, .L897+12
+	ldr	r3, [fp]
+	ldr	r8, [r3, r5, lsl #2]
+	cmp	r8, #0
+	bne	.L892
+	mul	r4, r4, r10
+	ldr	r2, [r7]
+	movs	r1, #255
+	adds	r0, r2, r4
+	ldr	r2, .L897+16
+	ldr	r0, [r0, #8]
+	ldrh	r2, [r2]
+	bl	ftl_memset
+	ldr	r2, [r7]
+	adds	r1, r2, r4
+	strh	r5, [r2, r4]	@ movhi
+	str	r8, [r1, #4]
+.L893:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1178:
+.L892:
+	mul	r4, r4, r10
+	ldr	r2, [r7]
+	ldr	r6, .L897+20
+	add	r2, r2, r4
+	mov	r0, r6
+	ldr	r2, [r2, #8]
+	str	r8, [r6, #4]
+	str	r2, [r6, #8]
+	ldr	r2, .L897+24
+	ldr	r2, [r2]
+	str	r2, [r6, #12]
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+	ldr	r10, [r6, #12]
+	ldrh	r2, [r10, #8]
+	cmp	r2, r5
+	beq	.L894
+	mov	r2, r8
+	mov	r1, r5
+	ldr	r0, .L897+28
+	bl	printf
+	movs	r3, #4
+	ldr	r1, [r6, #12]
+	mov	r2, r3
+	ldr	r0, .L897+32
+	bl	rknand_print_hex
+	ldr	r3, [sp, #4]
+	movs	r2, #4
+	ldr	r1, [fp]
+	ldr	r0, .L897+36
+	ldrh	r3, [r3]
+	bl	rknand_print_hex
+.L895:
+	ldrh	r3, [r10, #8]
+	cmp	r3, r5
+	beq	.L896
+	mov	r2, #508
+	ldr	r1, .L897+4
+	ldr	r0, .L897+8
+	bl	printf
+.L896:
+	ldr	r3, [r7]
+	movs	r1, #0
+	adds	r2, r3, r4
+	str	r1, [r2, #4]
+	strh	r5, [r3, r4]	@ movhi
+	b	.L893
+.L894:
+	ldr	r2, [r6]
+	cmp	r2, #256
+	bne	.L895
+	mov	r2, r8
+	mov	r1, r5
+	ldr	r0, .L897+40
+	bl	printf
+	ldr	r3, [r7]
+	mov	r1, r5
+	ldr	r0, .L897+44
+	add	r3, r3, r4
+	ldr	r2, [r3, #8]
+	bl	FtlMapWritePage
+	b	.L895
+.L898:
 	.align	2
-.L1177:
-	.word	.LANCHOR48
-	.word	.LANCHOR163
+.L897:
+	.word	.LANCHOR32
+	.word	.LANCHOR150
 	.word	.LC1
-	.word	.LANCHOR53
-	.word	.LANCHOR87
-	.word	.LANCHOR47
-	.word	.LANCHOR42
-	.word	.LANCHOR106
-	.word	.LANCHOR3
-	.word	.LANCHOR80
-	.word	.LANCHOR43
-	.word	.LANCHOR14
-	.word	.LANCHOR76
-	.word	.LANCHOR74
-	.word	.LANCHOR127
-	.word	.LANCHOR19
-	.word	.LANCHOR70
-	.word	.LANCHOR45
-	.word	.LANCHOR5
-	.word	.LANCHOR72
-	.word	.LANCHOR73
-	.word	-1024
-	.size	allocate_data_superblock, .-allocate_data_superblock
-	.section	.text.FtlGcFreeBadSuperBlk,"ax",%progbits
+	.word	.LANCHOR55
+	.word	.LANCHOR23
+	.word	.LANCHOR138
+	.word	.LANCHOR114
+	.word	.LC20
+	.word	.LC21
+	.word	.LC22
+	.word	.LC23
+	.word	.LANCHOR129
+	.word	.LANCHOR124
+	.size	load_l2p_region, .-load_l2p_region
+	.section	.text.ftl_map_blk_gc,"ax",%progbits
 	.align	1
-	.global	FtlGcFreeBadSuperBlk
+	.global	ftl_map_blk_gc
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlGcFreeBadSuperBlk, %function
-FtlGcFreeBadSuperBlk:
+	.type	ftl_map_blk_gc, %function
+ftl_map_blk_gc:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, [r0, #24]
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r10, r0
-	ldr	r4, .L1191
-	ldrh	r3, [r4]
-	cbz	r3, .L1180
-	ldr	r8, .L1191+16
+	mov	r4, r0
+	ldr	r5, [r0, #12]
+	str	r3, [sp]
+	bl	ftl_free_no_use_map_blk
+	ldrh	r3, [r4, #10]
+	ldrh	r2, [r4, #8]
+	subs	r3, r3, #5
+	cmp	r2, r3
+	blt	.L900
+	uxth	r0, r0
+	ldrh	r8, [r5, r0, lsl #1]
+	cmp	r8, #0
+	beq	.L900
+	ldr	r3, [r4, #32]
+	cbnz	r3, .L900
+	movs	r2, #1
+	str	r2, [r4, #32]
+	strh	r3, [r5, r0, lsl #1]	@ movhi
+	ldrh	r3, [r4, #8]
+	ldrh	r2, [r4, #2]
+	subs	r3, r3, #1
+	strh	r3, [r4, #8]	@ movhi
+	ldr	r3, .L915
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L901
+	mov	r0, r4
+	bl	ftl_map_blk_alloc_new_blk
+.L901:
+	ldr	r5, .L915+4
 	movs	r6, #0
-.L1181:
-	ldr	r3, .L1191+4
-	ldrh	r2, [r3]
-	uxth	r3, r6
+.L902:
+	ldrh	r3, [r4, #6]
+	uxth	r10, r6
+	cmp	r3, r10
+	bhi	.L909
+	movs	r1, #1
+	mov	r0, r8
+	bl	FtlFreeSysBlkQueueIn
+	movs	r3, #0
+	str	r3, [r4, #32]
+.L900:
+	ldr	r3, .L915
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1187
-	bl	FtlGcReFreshBadBlk
-.L1180:
+	bcc	.L910
+	mov	r0, r4
+	bl	ftl_map_blk_alloc_new_blk
+.L910:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1187:
-	ldr	r2, .L1191+8
-	uxth	r3, r6
-	mov	r1, r10
-	movs	r7, #0
-	ldrb	r0, [r2, r3]	@ zero_extendqisi2
-	bl	V2P_block
-	ldr	r2, .L1191+12
-	mov	fp, r0
-.L1182:
-	ldrh	r3, [r4]
-	uxth	r5, r7
-	cmp	r3, r5
-	bhi	.L1186
-	adds	r6, r6, #1
-	b	.L1181
-.L1186:
-	uxth	r3, r7
-	ldrh	r1, [r8, r3, lsl #1]
-	cmp	r1, fp
-	bne	.L1183
-	mov	r1, fp
-	mov	r0, r2
+.L909:
+	ldr	r3, [sp]
+	uxth	fp, r6
+	add	r3, r3, fp, lsl #2
 	str	r3, [sp, #4]
-	str	r2, [sp]
+	ldr	r3, [sp]
+	ldr	r2, [r3, fp, lsl #2]
+	cmp	r8, r2, lsr #10
+	bne	.L903
+	ldr	r3, .L915+8
+	str	r2, [r5, #4]
+	movs	r2, #1
+	ldr	r0, .L915+4
+	ldr	r1, [r3]
+	str	r1, [r5, #8]
+	ldr	r1, .L915+12
+	ldr	r7, [r1]
+	mov	r1, r2
+	str	r7, [r5, #12]
+	bl	FlashReadPages
+	ldrh	r2, [r7, #8]
+	cmp	r2, r10
+	beq	.L904
+	movw	r2, #611
+	ldr	r1, .L915+16
+	ldr	r0, .L915+20
 	bl	printf
-	mov	r0, fp
-	bl	FtlBbmMapBadBlock
-	bl	FtlBbmTblFlush
-	ldr	r3, [sp, #4]
-	ldrh	r1, [r4]
-	ldr	r2, [sp]
-	add	r3, r8, r3, lsl #1
-.L1184:
-	cmp	r5, r1
-	bcc	.L1185
-	subs	r1, r1, #1
-	strh	r1, [r4]	@ movhi
-.L1183:
-	adds	r7, r7, #1
-	b	.L1182
-.L1185:
-	ldrh	r0, [r3, #2]!
-	adds	r5, r5, #1
-	uxth	r5, r5
-	strh	r0, [r3, #-2]	@ movhi
-	b	.L1184
-.L1192:
+.L904:
+	ldr	r2, [r5]
+	adds	r2, r2, #1
+	bne	.L905
+.L907:
+	ldr	r2, [sp, #4]
+	movs	r3, #0
+	str	r3, [r2]
+.L906:
+	b	.L906
+.L905:
+	ldrh	r2, [r7, #8]
+	cmp	r2, r10
+	bne	.L907
+	ldrh	r1, [r7]
+	ldrh	r2, [r4, #4]
+	cmp	r1, r2
+	bne	.L907
+	ldr	r2, [r5, #8]
+	mov	r1, fp
+	mov	r0, r4
+	bl	FtlMapWritePage
+.L903:
+	adds	r6, r6, #1
+	b	.L902
+.L916:
 	.align	2
-.L1191:
-	.word	.LANCHOR101
-	.word	.LANCHOR3
-	.word	.LANCHOR13
-	.word	.LC104
-	.word	.LANCHOR102
-	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
-	.section	.text.update_vpc_list,"ax",%progbits
+.L915:
+	.word	.LANCHOR20
+	.word	.LANCHOR138
+	.word	.LANCHOR107
+	.word	.LANCHOR114
+	.word	.LANCHOR151
+	.word	.LC1
+	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
+	.section	.text.flush_l2p_region,"ax",%progbits
 	.align	1
-	.global	update_vpc_list
+	.global	flush_l2p_region
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	update_vpc_list, %function
-update_vpc_list:
+	.type	flush_l2p_region, %function
+flush_l2p_region:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	mov	r4, r0
-	ldr	r3, .L1203
-	ldr	r3, [r3]
-	ldrh	r3, [r3, r0, lsl #1]
-	cmp	r3, #0
-	bne	.L1194
-	ldr	r2, .L1203+4
-	ldrh	r1, [r2]
-	cmp	r1, r0
-	bne	.L1195
-	movw	r3, #65535
-	strh	r3, [r2]	@ movhi
-.L1196:
-	ldr	r5, .L1203+8
-	mov	r1, r4
-	ldr	r0, .L1203+12
-	bl	List_remove_node
-	ldrh	r3, [r5]
-	cbnz	r3, .L1198
-	movw	r2, #2777
-	ldr	r1, .L1203+16
-	ldr	r0, .L1203+20
-	bl	printf
-.L1198:
-	ldrh	r3, [r5]
-	mov	r0, r4
-	subs	r3, r3, #1
-	strh	r3, [r5]	@ movhi
-	bl	free_data_superblock
-	mov	r0, r4
-	bl	FtlGcFreeBadSuperBlk
-	ldr	r3, .L1203+24
-	ldrh	r2, [r5]
-	ldrh	r3, [r3]
-	add	r3, r3, r2
-	ldr	r2, .L1203+28
-	ldrh	r2, [r2]
-	cmp	r3, r2
-	ble	.L1202
-	movw	r2, #2780
-	ldr	r1, .L1203+16
-	ldr	r0, .L1203+20
-	bl	printf
-.L1202:
-	movs	r3, #1
-	b	.L1193
-.L1195:
-	ldr	r2, .L1203+32
-	ldrh	r2, [r2]
-	cmp	r2, r0
-	beq	.L1193
-	ldr	r2, .L1203+36
-	ldrh	r2, [r2]
-	cmp	r2, r0
-	beq	.L1193
-	ldr	r2, .L1203+40
-	ldrh	r2, [r2]
-	cmp	r2, r0
-	bne	.L1196
-.L1193:
-	mov	r0, r3
+	movs	r4, #12
+	ldr	r5, .L918
+	muls	r4, r0, r4
+	ldr	r0, .L918+4
+	ldr	r3, [r5]
+	adds	r2, r3, r4
+	ldrh	r1, [r3, r4]
+	ldr	r2, [r2, #8]
+	bl	FtlMapWritePage
+	ldr	r3, [r5]
+	movs	r0, #0
+	add	r4, r4, r3
+	ldr	r3, [r4, #4]
+	bic	r3, r3, #-2147483648
+	str	r3, [r4, #4]
 	pop	{r3, r4, r5, pc}
-.L1194:
-	bl	List_update_data_list
-	movs	r3, #0
-	b	.L1193
-.L1204:
+.L919:
 	.align	2
-.L1203:
-	.word	.LANCHOR42
-	.word	.LANCHOR80
-	.word	.LANCHOR45
-	.word	.LANCHOR41
-	.word	.LANCHOR164
-	.word	.LC1
-	.word	.LANCHOR48
-	.word	.LANCHOR5
-	.word	.LANCHOR51
-	.word	.LANCHOR52
-	.word	.LANCHOR53
-	.size	update_vpc_list, .-update_vpc_list
-	.section	.text.decrement_vpc_count,"ax",%progbits
+.L918:
+	.word	.LANCHOR55
+	.word	.LANCHOR129
+	.size	flush_l2p_region, .-flush_l2p_region
+	.section	.text.l2p_flush,"ax",%progbits
 	.align	1
-	.global	decrement_vpc_count
+	.global	l2p_flush
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	decrement_vpc_count, %function
-decrement_vpc_count:
+	.type	l2p_flush, %function
+l2p_flush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	movw	r3, #65535
 	push	{r4, r5, r6, lr}
-	cmp	r0, r3
-	mov	r4, r0
-	beq	.L1206
-	ldr	r5, .L1214
-	ldr	r3, [r5]
-	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L1207
-	mov	r1, r0
-	ldr	r0, .L1214+4
-	bl	printf
-	ldr	r3, [r5]
-	ldrh	r5, [r3, r4, lsl #1]
-	cbz	r5, .L1208
-.L1212:
-	movs	r5, #0
-.L1205:
-	mov	r0, r5
+	movs	r4, #0
+	ldr	r5, .L924
+	ldr	r6, .L924+4
+.L921:
+	ldrh	r3, [r5]
+	uxth	r0, r4
+	cmp	r3, r0
+	bhi	.L923
+	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L1208:
-	movw	r2, #2795
-.L1213:
-	ldr	r1, .L1214+8
-	ldr	r0, .L1214+12
+.L923:
+	ldr	r2, [r6]
+	uxth	r3, r4
+	movs	r1, #12
+	mla	r3, r1, r3, r2
+	ldr	r3, [r3, #4]
+	cmp	r3, #0
+	bge	.L922
+	bl	flush_l2p_region
+.L922:
+	adds	r4, r4, #1
+	b	.L921
+.L925:
+	.align	2
+.L924:
+	.word	.LANCHOR33
+	.word	.LANCHOR55
+	.size	l2p_flush, .-l2p_flush
+	.section	.text.log2phys,"ax",%progbits
+	.align	1
+	.global	log2phys
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	log2phys, %function
+log2phys:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r7, r2
+	ldr	r4, .L939
+	mov	r10, r0
+	mov	r5, r1
+	ldr	r3, .L939+4
+	ldr	r2, [r4]
+	ldrh	fp, [r3]
+	cmp	r0, r2
+	bcc	.L927
+	movw	r2, #813
+	ldr	r1, .L939+8
+	ldr	r0, .L939+12
 	bl	printf
-	b	.L1205
-.L1207:
-	subs	r2, r2, #1
-	strh	r2, [r3, r0, lsl #1]	@ movhi
-.L1206:
-	ldr	r6, .L1214+16
+.L927:
+	ldr	r3, [r4]
+	cmp	r10, r3
+	bcs	.L928
+	ldr	r3, .L939+16
+	add	fp, fp, #7
+	lsr	r6, r10, fp
+	movs	r2, #0
+	ldrh	r1, [r3]
+	uxth	r6, r6
+	ldr	r3, .L939+20
+	ldr	r0, [r3]
+	mov	r8, r3
+	movs	r3, #12
+.L929:
+	uxth	r4, r2
+	cmp	r4, r1
+	bcc	.L934
+	str	r3, [sp, #4]
+	bl	select_l2p_ram_region
+	ldr	r3, [sp, #4]
+	mov	r4, r0
+	ldr	r2, [r8]
+	muls	r3, r0, r3
+	adds	r1, r2, r3
+	ldrh	r2, [r2, r3]
 	movw	r3, #65535
-	ldrh	r0, [r6]
-	cmp	r0, r3
-	bne	.L1210
-	strh	r4, [r6]	@ movhi
-	b	.L1212
-.L1210:
-	cmp	r4, r0
-	beq	.L1212
-	bl	update_vpc_list
-	ldr	r3, .L1214+20
-	adds	r5, r0, #0
-	ldr	r2, .L1214+24
-	it	ne
-	movne	r5, #1
-	strh	r4, [r6]	@ movhi
-	ldr	r3, [r3]
-	ldr	r2, [r2]
-	subs	r3, r3, r2
-	asrs	r2, r3, #1
-	ldr	r3, .L1214+28
-	muls	r3, r2, r3
-	ldr	r2, .L1214
+	cmp	r2, r3
+	beq	.L935
+	ldr	r3, [r1, #4]
+	cmp	r3, #0
+	bge	.L935
+	bl	flush_l2p_region
+.L935:
+	mov	r1, r4
+	mov	r0, r6
+	bl	load_l2p_region
+	b	.L931
+.L928:
+	mov	r0, #-1
+	cbnz	r7, .L926
+	str	r0, [r5]
+.L926:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L934:
+	adds	r2, r2, #1
+	mla	ip, r3, r2, r0
+	ldrh	ip, [ip, #-12]
+	cmp	ip, r6
+	bne	.L929
+.L931:
+	movs	r0, #1
+	ldr	r2, [r8]
+	lsl	r0, r0, fp
+	movs	r3, #12
+	subs	r0, r0, #1
+	and	r0, r0, r10
+	uxth	r0, r0
+	mla	r3, r3, r4, r2
+	cbnz	r7, .L932
+	ldr	r3, [r3, #8]
+	ldr	r3, [r3, r0, lsl #2]
+	str	r3, [r5]
+.L933:
+	ldr	r2, [r8]
+	movs	r3, #12
+	mla	r4, r3, r4, r2
+	ldr	r3, [r4, #4]
+	adds	r2, r3, #1
+	beq	.L937
+	adds	r3, r3, #1
+	str	r3, [r4, #4]
+.L937:
+	movs	r0, #0
+	b	.L926
+.L932:
+	ldr	r1, [r5]
+	ldr	r2, [r3, #8]
+	str	r1, [r2, r0, lsl #2]
+	ldr	r2, [r3, #4]
+	orr	r2, r2, #-2147483648
+	str	r2, [r3, #4]
+	ldr	r3, .L939+24
+	strh	r6, [r3]	@ movhi
+	b	.L933
+.L940:
+	.align	2
+.L939:
+	.word	.LANCHOR152
+	.word	.LANCHOR22
+	.word	.LANCHOR153
+	.word	.LC1
+	.word	.LANCHOR33
+	.word	.LANCHOR55
+	.word	.LANCHOR56
+	.size	log2phys, .-log2phys
+	.section	.text.FtlReUsePrevPpa,"ax",%progbits
+	.align	1
+	.global	FtlReUsePrevPpa
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlReUsePrevPpa, %function
+FtlReUsePrevPpa:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	mov	r6, r0
+	ldr	r5, .L951
+	ubfx	r0, r1, #10, #16
+	str	r1, [sp, #4]
+	bl	P2V_block_in_plane
+	ldr	r2, [r5]
+	mov	r7, r0
+	ldrh	r3, [r2, r0, lsl #1]
+	cbnz	r3, .L942
+	ldr	r2, .L951+4
+	ldr	r4, [r2]
+	cmp	r4, #0
+	beq	.L943
+	ldr	r2, .L951+8
+	movw	lr, #65535
+	ldr	ip, .L951+24
+	ldr	r0, .L951+12
 	ldr	r2, [r2]
-	uxth	r1, r3
-	ldrh	r2, [r2, r1, lsl #1]
-	cmp	r2, #0
-	bne	.L1205
-	cmp	r4, r1
-	beq	.L1205
-	movw	r2, #2811
-	b	.L1213
-.L1215:
+	ldrh	r1, [r0]
+	mov	r8, r0
+	subs	r4, r4, r2
+	asrs	r4, r4, #1
+	mul	r4, ip, r4
+	mov	ip, #6
+	uxth	r4, r4
+.L944:
+	uxth	r0, r3
+	cmp	r1, r0
+	bls	.L943
+	cmp	r4, r7
+	bne	.L945
+	mov	r1, r4
+	ldr	r0, .L951+4
+	bl	List_remove_node
+	ldrh	r3, [r8]
+	cbnz	r3, .L946
+	movw	r2, #1733
+	ldr	r1, .L951+16
+	ldr	r0, .L951+20
+	bl	printf
+.L946:
+	ldrh	r3, [r8]
+	mov	r0, r4
+	subs	r3, r3, #1
+	strh	r3, [r8]	@ movhi
+	bl	INSERT_DATA_LIST
+	ldr	r2, [r5]
+	ldrh	r3, [r2, r7, lsl #1]
+.L942:
+	adds	r3, r3, #1
+	strh	r3, [r2, r7, lsl #1]	@ movhi
+	b	.L943
+.L945:
+	mul	r4, ip, r4
+	adds	r3, r3, #1
+	ldrh	r4, [r2, r4]
+	cmp	r4, lr
+	bne	.L944
+.L943:
+	movs	r2, #1
+	add	r1, sp, #4
+	mov	r0, r6
+	bl	log2phys
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L952:
 	.align	2
-.L1214:
+.L951:
 	.word	.LANCHOR42
-	.word	.LC105
-	.word	.LANCHOR165
-	.word	.LC1
-	.word	.LANCHOR142
-	.word	.LANCHOR41
+	.word	.LANCHOR47
 	.word	.LANCHOR40
+	.word	.LANCHOR48
+	.word	.LANCHOR154
+	.word	.LC1
 	.word	-1431655765
-	.size	decrement_vpc_count, .-decrement_vpc_count
+	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
 	.section	.text.FtlRecoverySuperblock,"ax",%progbits
 	.align	1
 	.global	FtlRecoverySuperblock
@@ -9365,144 +7408,144 @@ FtlRecoverySuperblock:
 	mov	r8, r0
 	sub	sp, sp, #48
 	cmp	r3, r2
-	beq	.L1344
+	beq	.L1081
 	ldrh	r3, [r0, #2]
 	str	r3, [sp, #4]
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	ldr	r1, [sp, #4]
 	str	r3, [sp, #20]
-	ldr	r3, .L1352
+	ldr	r3, .L1091
 	ldrh	r3, [r3]
 	cmp	r3, r1
 	mov	r3, #0
-	bne	.L1219
+	bne	.L956
 	strh	r3, [r0, #4]	@ movhi
-.L1350:
+.L1089:
 	strb	r3, [r8, #6]
-.L1344:
+.L1081:
 	movs	r0, #0
 	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1219:
+.L956:
 	ldrh	r0, [r0, #16]
-.L1220:
+.L957:
 	cmp	r0, r2
 	uxth	r5, r3
 	add	r3, r3, #1
-	beq	.L1221
+	beq	.L958
 	movs	r1, #1
 	bl	FtlGetLastWrittenPage
 	mov	r4, r0
 	adds	r0, r0, #1
-	beq	.L1222
-	ldr	r3, .L1352+4
+	beq	.L959
+	ldr	r3, .L1091+4
 	movs	r2, #0
 	mov	r5, r2
 	movw	fp, #65535
 	mov	r10, #20
 	ldrh	ip, [r3]
-	ldr	r3, .L1352+8
+	ldr	r3, .L1091+8
 	ldr	r0, [r3]
-	ldr	r3, .L1352+12
+	ldr	r3, .L1091+12
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
-	ldr	r3, .L1352+16
+	ldr	r3, .L1091+16
 	ldrh	r7, [r3]
-	ldr	r3, .L1352+20
+	ldr	r3, .L1091+20
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L1352+24
+	ldr	r3, .L1091+24
 	ldrh	lr, [r3]
 	add	r3, r8, #16
 	str	r3, [sp, #16]
 	str	r3, [sp]
-.L1223:
+.L960:
 	uxth	r3, r2
 	cmp	ip, r3
-	bhi	.L1227
+	bhi	.L964
 	movs	r2, #0
 	mov	r1, r5
 	bl	FlashReadPages
-	ldr	r2, .L1352+28
+	ldr	r2, .L1091+28
 	uxth	r1, r4
 	movw	fp, #65535
 	str	r1, [sp, #12]
 	ldr	r3, [r2]
 	subs	r3, r3, #1
 	str	r3, [sp]
-	ldr	r3, .L1352+8
+	ldr	r3, .L1091+8
 	ldr	r10, [r3]
 	movs	r3, #0
 	mov	r7, r10
-.L1228:
+.L965:
 	uxth	r1, r3
 	cmp	r5, r1
-	bhi	.L1233
-	bne	.L1231
+	bhi	.L970
+	bne	.L968
 	adds	r3, r4, #1
 	uxth	r3, r3
 	str	r3, [sp, #8]
-.L1345:
+.L1082:
 	ldr	r0, [r10, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_plane
-	ldr	r3, .L1352
+	ldr	r3, .L1091
 	mov	r10, r0
 	ldr	r2, [sp, #8]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bne	.L1235
+	bne	.L972
 	ldrh	r3, [sp, #8]
 	strh	r3, [r8, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [r8, #6]
 	strh	r3, [r8, #4]	@ movhi
-.L1235:
+.L972:
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #4]
 	cmp	r3, r2
-	bne	.L1236
+	bne	.L973
 	ldr	r3, [sp, #20]
 	cmp	r10, r3
-	bne	.L1236
+	bne	.L973
 	ldr	r1, [sp, #8]
 	mov	r2, r10
-.L1351:
+.L1090:
 	mov	r0, r8
 	bl	ftl_sb_update_avl_pages
-	b	.L1344
-.L1221:
+	b	.L1081
+.L958:
 	uxth	r1, r3
 	adds	r1, r1, #8
 	ldrh	r0, [r8, r1, lsl #1]
-	b	.L1220
-.L1222:
+	b	.L957
+.L959:
 	ldr	r3, [sp, #4]
-	cbz	r3, .L1224
-	movw	r2, #1766
-	ldr	r1, .L1352+32
-	ldr	r0, .L1352+36
+	cbz	r3, .L961
+	mov	r2, #1800
+	ldr	r1, .L1091+32
+	ldr	r0, .L1091+36
 	bl	printf
-.L1224:
+.L961:
 	ldr	r3, [sp, #20]
-	cbz	r3, .L1225
+	cbz	r3, .L962
 	cmp	r5, r3
-	beq	.L1225
-	movw	r2, #1767
-	ldr	r1, .L1352+32
-	ldr	r0, .L1352+36
+	beq	.L962
+	movw	r2, #1801
+	ldr	r1, .L1091+32
+	ldr	r0, .L1091+36
 	bl	printf
-.L1225:
+.L962:
 	movs	r3, #0
 	strh	r3, [r8, #2]	@ movhi
-	b	.L1350
-.L1227:
+	b	.L1089
+.L964:
 	ldr	r1, [sp]
 	ldrh	r3, [r1], #2
 	cmp	r3, fp
 	str	r1, [sp]
-	beq	.L1226
+	beq	.L963
 	mla	r1, r10, r5, r0
 	ldr	r6, [sp, #8]
 	orr	r3, r4, r3, lsl #10
@@ -9518,53 +7561,53 @@ FtlRecoverySuperblock:
 	bic	r3, r3, #3
 	add	r3, r3, r6
 	str	r3, [r1, #12]
-.L1226:
+.L963:
 	adds	r2, r2, #1
-	b	.L1223
-.L1233:
+	b	.L960
+.L970:
 	ldr	r1, [r7]
-	cbnz	r1, .L1229
+	cbnz	r1, .L966
 	ldr	r1, [r7, #12]
 	ldr	r6, [r1, #4]
 	str	r1, [sp, #8]
 	adds	r1, r6, #1
-	beq	.L1230
+	beq	.L967
 	ldr	r1, [r2]
 	mov	r0, r6
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L1230
+	cbz	r0, .L967
 	adds	r6, r6, #1
 	str	r6, [r2]
-.L1230:
+.L967:
 	ldr	r1, [sp, #8]
 	ldr	r1, [r1]
 	adds	r1, r1, #1
-	bne	.L1232
-.L1231:
+	bne	.L969
+.L968:
 	uxth	r2, r4
 	uxth	r3, r3
 	str	r2, [sp, #8]
 	movs	r2, #20
 	mla	r10, r2, r3, r10
-	b	.L1345
-.L1229:
+	b	.L1082
+.L966:
 	ldr	fp, [sp, #12]
-.L1232:
+.L969:
 	adds	r3, r3, #1
 	adds	r7, r7, #20
-	b	.L1228
-.L1236:
+	b	.L965
+.L973:
 	movw	r3, #65535
 	cmp	fp, r3
-	bne	.L1237
+	bne	.L974
 	ldrb	r3, [r8, #8]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1238
-.L1237:
-	ldr	r3, .L1352+40
+	bne	.L975
+.L974:
+	ldr	r3, .L1091+40
 	uxth	r6, r4
 	uxth	r4, r4
-	ldr	r7, .L1352+8
+	ldr	r7, .L1091+8
 	ldr	r2, [r3]
 	adds	r2, r2, #1
 	itt	eq
@@ -9577,10 +7620,10 @@ FtlRecoverySuperblock:
 	subgt	r4, r6, #7
 	ldrle	r4, [sp, #4]
 	uxthgt	r4, r4
-.L1241:
+.L978:
 	cmp	r4, r6
-	bhi	.L1251
-	ldr	r3, .L1352+4
+	bhi	.L988
+	ldr	r3, .L1091+4
 	movw	lr, #65535
 	ldr	r0, [r7]
 	mov	ip, #20
@@ -9589,74 +7632,74 @@ FtlRecoverySuperblock:
 	str	r3, [sp, #12]
 	movs	r3, #0
 	mov	r5, r3
-	b	.L1252
-.L1243:
+	b	.L989
+.L980:
 	ldr	r1, [sp, #12]
 	ldrh	r2, [r1], #2
 	cmp	r2, lr
 	str	r1, [sp, #12]
-	beq	.L1242
+	beq	.L979
 	mla	r1, ip, r5, r0
 	adds	r5, r5, #1
 	orr	r2, r4, r2, lsl #10
 	uxth	r5, r5
 	str	r2, [r1, #4]
-.L1242:
+.L979:
 	adds	r3, r3, #1
-.L1252:
+.L989:
 	uxth	r2, r3
 	cmp	fp, r2
-	bhi	.L1243
+	bhi	.L980
 	mov	r1, r5
 	movs	r2, #0
 	bl	FlashReadPages
-	ldr	r3, .L1352+40
+	ldr	r3, .L1091+40
 	movs	r1, #20
 	movs	r0, #0
 	movw	ip, #65535
 	ldr	r2, [r3]
 	ldr	r3, [r7]
 	mla	r5, r1, r5, r3
-.L1244:
+.L981:
 	cmp	r5, r3
-	bne	.L1249
-	cbz	r0, .L1250
-	ldr	r3, .L1352+40
+	bne	.L986
+	cbz	r0, .L987
+	ldr	r3, .L1091+40
 	str	r2, [r3]
-.L1250:
+.L987:
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L1241
-.L1353:
+	b	.L978
+.L1092:
 	.align	2
-.L1352:
+.L1091:
 	.word	.LANCHOR19
 	.word	.LANCHOR3
-	.word	.LANCHOR112
-	.word	.LANCHOR91
+	.word	.LANCHOR103
+	.word	.LANCHOR64
 	.word	.LANCHOR23
-	.word	.LANCHOR92
+	.word	.LANCHOR65
 	.word	.LANCHOR24
-	.word	.LANCHOR71
-	.word	.LANCHOR166
+	.word	.LANCHOR83
+	.word	.LANCHOR155
 	.word	.LC1
-	.word	.LANCHOR145
-.L1249:
+	.word	.LANCHOR134
+.L986:
 	ldr	r1, [r3]
 	cmp	r1, #0
-	beq	.L1245
-	cbz	r0, .L1238
-.L1346:
-	ldr	r3, .L1354
+	beq	.L982
+	cbz	r0, .L975
+.L1083:
+	ldr	r3, .L1093
 	str	r2, [r3]
-.L1238:
+.L975:
 	ldr	fp, [sp, #4]
 	movs	r2, #1
-	ldr	r6, .L1354+4
-	ldr	r3, .L1354+8
+	ldr	r6, .L1093+4
+	ldr	r3, .L1093+8
 	strh	r2, [r3]	@ movhi
-.L1253:
-	ldr	r3, .L1354+12
+.L990:
+	ldr	r3, .L1093+12
 	movw	lr, #65535
 	ldr	r0, [r6]
 	movs	r7, #20
@@ -9664,64 +7707,64 @@ FtlRecoverySuperblock:
 	ldrh	r4, [r3]
 	movs	r3, #0
 	str	r3, [sp, #12]
-.L1254:
+.L991:
 	uxth	r2, r3
 	cmp	r4, r2
-	bhi	.L1256
+	bhi	.L993
 	movs	r2, #0
 	ldr	r1, [sp, #12]
 	bl	FlashReadPages
 	movs	r3, #0
-.L1349:
+.L1088:
 	str	r3, [sp, #24]
 	ldr	r2, [sp, #12]
 	ldrh	r3, [sp, #24]
 	cmp	r2, r3
-	bhi	.L1284
-	ldr	r3, .L1354+16
+	bhi	.L1024
+	ldr	r3, .L1093+16
 	add	fp, fp, #1
 	uxth	fp, fp
 	ldrh	r3, [r3]
 	cmp	r3, fp
-	bne	.L1253
-	ldr	r2, .L1354+12
+	bne	.L990
+	ldr	r2, .L1093+12
 	movw	r0, #65535
 	movs	r3, #0
 	strh	fp, [r8, #2]	@ movhi
 	strh	r3, [r8, #4]	@ movhi
 	ldrh	r2, [r2]
-.L1285:
+.L1025:
 	uxth	r1, r3
 	cmp	r1, r2
-	bcs	.L1344
+	bcs	.L1081
 	ldr	r1, [sp, #16]
 	ldrh	r4, [r1], #2
 	cmp	r4, r0
 	str	r1, [sp, #16]
 	add	r1, r3, #1
-	bne	.L1350
+	bne	.L1089
 	mov	r3, r1
-	b	.L1285
-.L1245:
+	b	.L1025
+.L982:
 	ldr	r1, [r3, #12]
 	ldrh	lr, [r1]
 	cmp	lr, ip
-	beq	.L1248
+	beq	.L985
 	ldr	r1, [r1, #4]
 	cmp	r1, #-1
 	itt	ne
 	movne	r2, r1
 	movne	r0, #1
-.L1248:
+.L985:
 	adds	r3, r3, #20
-	b	.L1244
-.L1251:
+	b	.L981
+.L988:
 	mov	r2, #-1
-	b	.L1346
-.L1256:
+	b	.L1083
+.L993:
 	ldrh	r2, [r1], #2
 	cmp	r2, lr
-	beq	.L1255
+	beq	.L992
 	ldr	r5, [sp, #12]
 	orr	r2, fp, r2, lsl #10
 	mla	ip, r7, r5, r0
@@ -9730,10 +7773,10 @@ FtlRecoverySuperblock:
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r2, [sp, #12]
-.L1255:
+.L992:
 	adds	r3, r3, #1
-	b	.L1254
-.L1284:
+	b	.L991
+.L1024:
 	ldr	r3, [sp, #24]
 	movs	r5, #20
 	muls	r5, r3, r5
@@ -9746,45 +7789,45 @@ FtlRecoverySuperblock:
 	bl	P2V_plane
 	ldr	r3, [sp, #4]
 	cmp	fp, r3
-	bcc	.L1258
+	bcc	.L995
 	ldr	r3, [sp, #28]
-	bne	.L1259
+	bne	.L996
 	ldr	r2, [sp, #20]
 	cmp	r2, r0
-	bhi	.L1258
-.L1259:
+	bhi	.L995
+.L996:
 	ldr	r2, [sp, #8]
 	cmp	fp, r2
-	bne	.L1260
+	bne	.L997
 	cmp	r10, r0
-	beq	.L1261
-.L1260:
+	beq	.L998
+.L997:
 	ldr	r3, [r3, r5]
 	adds	r3, r3, #1
-	beq	.L1262
+	beq	.L999
 	ldr	r3, [r7, #12]
 	movw	r2, #61589
 	ldrh	r1, [r3]
 	cmp	r1, r2
-	beq	.L1263
+	beq	.L1000
 	ldrh	r0, [r8]
-.L1347:
+.L1086:
 	bl	decrement_vpc_count
-	b	.L1258
-.L1263:
+	b	.L995
+.L1000:
 	ldr	r2, [r3, #4]
 	str	r2, [sp]
 	adds	r2, r2, #1
-	beq	.L1264
-	ldr	r2, .L1354+20
+	beq	.L1001
+	ldr	r2, .L1093+20
 	ldr	r0, [sp]
 	ldr	r1, [r2]
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L1264
+	cbz	r0, .L1001
 	ldr	r1, [sp]
 	adds	r1, r1, #1
 	str	r1, [r2]
-.L1264:
+.L1001:
 	ldr	r4, [r3, #8]
 	add	r1, sp, #40
 	ldr	r3, [r3, #12]
@@ -9792,17 +7835,17 @@ FtlRecoverySuperblock:
 	mov	r0, r4
 	str	r3, [sp, #36]
 	bl	log2phys
-	ldr	r3, .L1354
+	ldr	r3, .L1093
 	ldr	r1, [r3]
 	adds	r3, r1, #1
-	beq	.L1265
+	beq	.L1002
 	ldr	r0, [sp]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1265
+	beq	.L1002
 	ldr	r3, [sp, #36]
 	adds	r7, r3, #1
-	beq	.L1266
+	beq	.L1003
 	ldr	r0, [r6]
 	movs	r2, #0
 	movs	r1, #1
@@ -9814,130 +7857,151 @@ FtlRecoverySuperblock:
 	ldr	r1, [r2, r5]
 	adds	r3, r2, r5
 	adds	r1, r1, #1
-	bne	.L1267
-.L1268:
+	bne	.L1004
+.L1005:
 	mov	r3, #-1
 	str	r3, [sp, #36]
-.L1275:
+.L1012:
 	ldr	r7, [sp, #36]
 	adds	r0, r7, #1
-	beq	.L1258
-.L1288:
+	beq	.L995
+.L1028:
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L1354+24
+	ldr	r3, .L1093+24
 	mov	r4, r0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bhi	.L1280
-	movw	r2, #2019
-	ldr	r1, .L1354+28
-	ldr	r0, .L1354+32
+	bhi	.L1020
+	movw	r2, #2065
+	ldr	r1, .L1093+28
+	ldr	r0, .L1093+32
 	bl	printf
-.L1280:
-	ldr	r3, .L1354+36
+.L1020:
+	ldr	r3, .L1093+36
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
 	cmp	r3, #0
-	beq	.L1281
+	beq	.L1021
 	mov	r0, r4
-	b	.L1347
-.L1266:
+	b	.L1086
+.L1003:
 	ldr	r3, [sp, #44]
 	ldr	r2, [sp, #40]
 	cmp	r2, r3
-	bne	.L1258
+	bne	.L995
 	movs	r2, #1
 	add	r1, sp, #36
 	mov	r0, r4
 	bl	log2phys
-.L1258:
+.L995:
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	b	.L1349
-.L1267:
+	b	.L1088
+.L1004:
 	ldr	r1, [r7, #8]
 	cmp	r4, r1
-	bne	.L1268
-	ldr	r0, .L1354
+	bne	.L1005
+	ldr	r0, .L1093
 	ldr	r1, [r7, #4]
 	ldr	r0, [r0]
 	str	r1, [sp, #28]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1268
+	beq	.L1005
 	ldr	r1, [sp, #40]
 	ldr	r0, [sp, #44]
 	cmp	r1, r0
-	bne	.L1270
-.L1273:
+	bne	.L1007
+.L1010:
 	ldr	r1, [sp, #36]
 	mov	r0, r4
 	bl	FtlReUsePrevPpa
-	b	.L1268
-.L1270:
+	b	.L1005
+.L1007:
 	ldr	r0, [sp, #36]
 	cmp	r1, r0
-	beq	.L1268
+	beq	.L1005
 	adds	r0, r1, #1
-	beq	.L1271
+	beq	.L1008
 	str	r1, [r3, #4]
 	movs	r2, #0
 	movs	r1, #1
 	mov	r0, r3
 	ldr	r7, [r3, #12]
 	bl	FlashReadPages
-.L1272:
+.L1009:
 	ldr	r3, [r6]
 	ldr	r3, [r3, r5]
 	adds	r3, r3, #1
-	beq	.L1273
+	beq	.L1010
 	ldr	r3, [r7, #4]
-	ldr	r2, .L1354
+	ldr	r2, .L1093
 	mov	r1, r3
 	ldr	r0, [r2]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1273
+	beq	.L1010
 	mov	r1, r3
 	ldr	r0, [sp, #28]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1268
-	b	.L1273
-.L1271:
+	beq	.L1005
+	b	.L1010
+.L1008:
 	str	r1, [r2, r5]
-	b	.L1272
-.L1265:
+	b	.L1009
+.L1094:
+	.align	2
+.L1093:
+	.word	.LANCHOR134
+	.word	.LANCHOR103
+	.word	.LANCHOR156
+	.word	.LANCHOR3
+	.word	.LANCHOR19
+	.word	.LANCHOR83
+	.word	.LANCHOR5
+	.word	.LANCHOR155
+	.word	.LC1
+	.word	.LANCHOR42
+.L1002:
 	ldr	r3, [sp, #44]
 	ldr	r2, [sp, #40]
 	cmp	r2, r3
-	beq	.L1275
+	beq	.L1012
+	ldr	r2, .L1095
+	ldr	r3, [sp, #36]
+	ldr	r2, [r2]
+	cmp	r2, r3, lsr #10
+	bhi	.L1014
+	adds	r3, r3, #1
+.L1085:
+	bne	.L995
 	movs	r2, #1
 	add	r1, sp, #44
 	mov	r0, r4
 	bl	log2phys
 	ldr	r7, [sp, #40]
 	adds	r5, r7, #1
-	beq	.L1275
+	beq	.L1012
 	ldr	r3, [sp, #36]
 	cmp	r7, r3
-	beq	.L1288
+	beq	.L1028
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L1354+40
+	ldr	r3, .L1095+4
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L1279
-	ldr	r3, .L1354+44
+	beq	.L1019
+	ldr	r3, .L1095+8
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L1279
-	ldr	r3, .L1354+48
+	beq	.L1019
+	ldr	r3, .L1095+12
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L1275
-.L1279:
+	bne	.L1012
+.L1019:
 	ldr	r0, [r6]
 	movs	r2, #0
 	movs	r1, #1
@@ -9947,334 +8011,537 @@ FtlRecoverySuperblock:
 	ldr	r3, [r6]
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L1275
+	beq	.L1012
 	ldr	r1, [r5, #4]
 	ldr	r0, [sp]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	bne	.L1275
+	bne	.L1012
 	movs	r2, #1
 	add	r1, sp, #40
 	mov	r0, r4
 	bl	log2phys
-	b	.L1275
-.L1355:
-	.align	2
-.L1354:
-	.word	.LANCHOR145
-	.word	.LANCHOR112
-	.word	.LANCHOR167
-	.word	.LANCHOR3
-	.word	.LANCHOR19
-	.word	.LANCHOR71
-	.word	.LANCHOR5
-	.word	.LANCHOR166
-	.word	.LC1
-	.word	.LANCHOR42
-	.word	.LANCHOR51
-	.word	.LANCHOR52
-	.word	.LANCHOR53
-.L1281:
+	b	.L1012
+.L1014:
+	ldr	r0, [r6]
+	movs	r2, #0
+	movs	r1, #1
+	ldr	r5, [r0, #12]
+	str	r3, [r0, #4]
+	bl	FlashReadPages
+	ldr	r3, [r5, #8]
+	cmp	r4, r3
+	bne	.L995
+	ldrh	r2, [r5]
+	movw	r3, #61589
+	cmp	r2, r3
+	b	.L1085
+.L1021:
 	mov	r1, r4
-	ldr	r0, .L1356
+	ldr	r0, .L1095+16
 	bl	printf
-	b	.L1258
-.L1262:
-	ldr	r3, .L1356+4
+	b	.L995
+.L999:
+	ldr	r3, .L1095+20
 	ldr	r3, [r3]
 	cmp	r3, #31
-	bhi	.L1282
-	ldr	r2, .L1356+8
+	bhi	.L1022
+	ldr	r2, .L1095+24
 	str	r4, [r2, r3, lsl #2]
 	adds	r3, r3, #1
-	ldr	r2, .L1356+4
+	ldr	r2, .L1095+20
 	str	r3, [r2]
-.L1282:
+.L1022:
 	ldrh	r0, [r8]
 	bl	decrement_vpc_count
-	ldr	r3, .L1356+12
+	ldr	r3, .L1095+28
 	ldr	r2, [r3]
 	adds	r1, r2, #1
-	bne	.L1283
+	bne	.L1023
 	ldr	r2, [sp]
-.L1348:
+.L1087:
 	str	r2, [r3]
-	b	.L1258
-.L1283:
+	b	.L995
+.L1023:
 	ldr	r1, [sp]
 	cmp	r1, r2
-	bcs	.L1258
+	bcs	.L995
 	mov	r2, r1
-	b	.L1348
-.L1261:
+	b	.L1087
+.L998:
 	strb	r10, [r8, #6]
 	mov	r2, r10
 	strh	fp, [r8, #2]	@ movhi
 	mov	r1, fp
-	b	.L1351
-.L1357:
+	b	.L1090
+.L1096:
 	.align	2
-.L1356:
-	.word	.LC106
-	.word	.LANCHOR168
-	.word	.LANCHOR169
-	.word	.LANCHOR145
+.L1095:
+	.word	.LANCHOR8
+	.word	.LANCHOR51
+	.word	.LANCHOR52
+	.word	.LANCHOR53
+	.word	.LC24
+	.word	.LANCHOR157
+	.word	.LANCHOR158
+	.word	.LANCHOR134
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
-	.section	.text.FtlWriteDump_data,"ax",%progbits
+	.section	.text.ftl_check_vpc,"ax",%progbits
 	.align	1
-	.global	FtlWriteDump_data
+	.global	ftl_check_vpc
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlWriteDump_data, %function
-FtlWriteDump_data:
-	@ args = 0, pretend = 0, frame = 24
+	.type	ftl_check_vpc, %function
+ftl_check_vpc:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #24
-	ldr	r4, .L1377
-	ldrh	r2, [r4, #4]
-	cmp	r2, #0
-	beq	.L1359
-	ldrb	r3, [r4, #8]	@ zero_extendqisi2
-	cmp	r3, #0
-	bne	.L1359
-	ldr	r3, .L1377+4
-	ldrb	r1, [r4, #7]	@ zero_extendqisi2
-	ldrh	r3, [r3]
-	muls	r3, r1, r3
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #0
+	ldr	r6, .L1121
+	ldr	r5, .L1121+4
+	ldr	r1, .L1121+8
+	ldr	r0, .L1121+12
+	bl	printf
+	mov	r2, #8192
+	movs	r1, #0
+	ldr	r0, .L1121+4
+	bl	ftl_memset
+.L1098:
+	ldr	r3, [r6]
+	cmp	r4, r3
+	bcc	.L1100
+	ldr	r10, .L1121+48
+	movs	r4, #0
+	ldr	r7, .L1121+16
+	mov	r6, r4
+.L1101:
+	ldrh	r2, [r10]
+	uxth	r3, r4
 	cmp	r2, r3
-	beq	.L1359
-	ldrb	r7, [r4, #10]	@ zero_extendqisi2
-	cbnz	r7, .L1358
-	ldr	r3, .L1377+8
-	mov	r2, r7
-	mov	r1, sp
-	ldr	r6, [r3]
-	ldr	r3, .L1377+12
-	subs	r6, r6, #1
-	mov	r0, r6
-	ldrh	r8, [r3]
-	bl	log2phys
-	ldr	r2, .L1377+16
-	ldr	r3, [sp]
-	str	r6, [sp, #20]
-	ldr	r0, [r2]
-	ldr	r2, .L1377+20
-	str	r3, [sp, #8]
-	adds	r3, r3, #1
-	str	r0, [sp, #12]
-	ldr	r5, [r2]
-	str	r5, [sp, #16]
-	str	r7, [r5, #4]
-	beq	.L1361
-	mov	r2, r7
-	movs	r1, #1
-	add	r0, sp, #4
-	bl	FlashReadPages
-.L1362:
-	ldr	fp, .L1377
-	lsl	r8, r8, #2
-	ldr	r10, .L1377+28
-	movs	r7, #0
-	movw	r3, #61589
-	strh	r3, [r5]	@ movhi
-.L1363:
-	cmp	r8, r7
-	bne	.L1367
-.L1364:
-	movs	r3, #1
-.L1376:
-	strb	r3, [r4, #10]
-.L1358:
-	add	sp, sp, #24
+	bhi	.L1103
+	ldr	r3, .L1121+20
+	ldr	r4, [r3]
+	cbz	r4, .L1104
+	ldr	r3, .L1121+24
+	mov	r8, #0
+	ldr	r5, .L1121+28
+	ldr	r10, .L1121+16
+	ldrh	r7, [r3]
+	ldr	r3, [r5]
+	ldr	fp, .L1121+4
+	subs	r4, r4, r3
+	ldr	r3, .L1121+32
+	asrs	r4, r4, #1
+	muls	r4, r3, r4
+	uxth	r4, r4
+.L1105:
+	uxth	r3, r8
+	cmp	r7, r3
+	bls	.L1104
+	ldr	r3, [r10]
+	ldrh	r2, [r3, r4, lsl #1]
+	cbz	r2, .L1106
+	movs	r6, #1
+	ldrh	r3, [fp, r4, lsl #1]
+	mov	r1, r4
+	ldr	r0, .L1121+36
+	bl	printf
+.L1106:
+	movs	r3, #6
+	ldr	r2, [r5]
+	muls	r4, r3, r4
+	movw	r3, #65535
+	add	r8, r8, #1
+	ldrh	r4, [r2, r4]
+	cmp	r4, r3
+	bne	.L1105
+.L1104:
+	cbz	r6, .L1097
+	movw	r2, #2389
+	ldr	r1, .L1121+8
+	ldr	r0, .L1121+40
+	bl	printf
+.L1097:
+	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1361:
-	ldr	r3, .L1377+24
-	movs	r1, #255
-	ldrh	r2, [r3]
-	bl	ftl_memset
-	b	.L1362
-.L1367:
-	ldrh	r3, [r4, #4]
-	cmp	r3, #0
-	beq	.L1364
-	ldr	r3, [sp, #8]
-	mov	r0, fp
-	str	r6, [r5, #8]
-	adds	r7, r7, #1
-	str	r3, [r5, #12]
-	ldrh	r3, [r4]
-	strh	r3, [r5, #2]	@ movhi
-	bl	get_new_active_ppa
-	ldr	r3, [r10]
-	movs	r1, #1
-	str	r0, [sp, #8]
-	add	r0, sp, #4
-	str	r3, [r5, #4]
+.L1100:
+	movs	r2, #0
+	add	r1, sp, #4
+	mov	r0, r4
+	bl	log2phys
+	ldr	r0, [sp, #4]
+	adds	r3, r0, #1
+	beq	.L1099
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	ldrh	r3, [r5, r0, lsl #1]
 	adds	r3, r3, #1
-	adds	r2, r3, #1
-	it	eq
-	moveq	r3, #0
-	str	r3, [r10]
-	movs	r3, #0
-	mov	r2, r3
-	bl	FlashProgPages
-	ldrh	r0, [r4]
-	bl	decrement_vpc_count
-	b	.L1363
-.L1359:
-	movs	r3, #0
-	b	.L1376
-.L1378:
+	strh	r3, [r5, r0, lsl #1]	@ movhi
+.L1099:
+	adds	r4, r4, #1
+	b	.L1098
+.L1103:
+	ldr	r3, [r7]
+	uxth	r5, r4
+	ldr	r8, .L1121+4
+	ldrh	r2, [r3, r5, lsl #1]
+	ldrh	r3, [r8, r5, lsl #1]
+	cmp	r2, r3
+	beq	.L1102
+	mov	r1, r5
+	ldr	r0, .L1121+44
+	bl	printf
+	ldr	r3, [r7]
+	movw	r2, #65535
+	ldrh	r3, [r3, r5, lsl #1]
+	cmp	r3, r2
+	beq	.L1102
+	ldrh	r2, [r8, r5, lsl #1]
+	cmp	r2, r3
+	it	hi
+	movhi	r6, #1
+.L1102:
+	adds	r4, r4, #1
+	b	.L1101
+.L1122:
 	.align	2
-.L1377:
-	.word	.LANCHOR51
-	.word	.LANCHOR19
-	.word	.LANCHOR61
-	.word	.LANCHOR3
-	.word	.LANCHOR115
-	.word	.LANCHOR123
-	.word	.LANCHOR23
-	.word	.LANCHOR71
-	.size	FtlWriteDump_data, .-FtlWriteDump_data
-	.section	.text.l2p_flush,"ax",%progbits
+.L1121:
+	.word	.LANCHOR152
+	.word	check_vpc_table
+	.word	.LANCHOR159
+	.word	.LC25
+	.word	.LANCHOR42
+	.word	.LANCHOR47
+	.word	.LANCHOR48
+	.word	.LANCHOR40
+	.word	-1431655765
+	.word	.LC27
+	.word	.LC1
+	.word	.LC26
+	.word	.LANCHOR5
+	.size	ftl_check_vpc, .-ftl_check_vpc
+	.section	.text.ftl_scan_all_data,"ax",%progbits
 	.align	1
-	.global	l2p_flush
+	.global	ftl_scan_all_data
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	l2p_flush, %function
-l2p_flush:
-	@ args = 0, pretend = 0, frame = 0
+	.type	ftl_scan_all_data, %function
+ftl_scan_all_data:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, lr}
-	movs	r4, #0
-	ldr	r5, .L1383
-	ldr	r6, .L1383+4
-	bl	FtlWriteDump_data
-.L1380:
-	ldrh	r3, [r5]
-	uxth	r0, r4
-	cmp	r3, r0
-	bhi	.L1382
-	movs	r0, #0
-	pop	{r4, r5, r6, pc}
-.L1382:
-	ldr	r2, [r6]
-	uxth	r3, r4
-	movs	r1, #12
-	mla	r3, r1, r3, r2
-	ldr	r3, [r3, #4]
-	cmp	r3, #0
-	bge	.L1381
-	bl	flush_l2p_region
-.L1381:
-	adds	r4, r4, #1
-	b	.L1380
-.L1384:
+	push	{r4, r5, r6, r7, r8, lr}
+	movs	r5, #0
+	ldr	r7, .L1137
+	sub	sp, sp, #32
+	movs	r1, #0
+	ldr	r8, .L1137+24
+	ldr	r0, .L1137+4
+	bl	printf
+.L1124:
+	ldr	r3, [r7]
+	cmp	r5, r3
+	bcc	.L1130
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1130:
+	movs	r2, #0
+	add	r1, sp, #28
+	mov	r0, r5
+	bl	log2phys
+	ubfx	r3, r5, #0, #11
+	cbnz	r3, .L1125
+	ldr	r2, [sp, #28]
+	mov	r1, r5
+	mov	r0, r8
+	bl	printf
+.L1125:
+	ldr	r3, [sp, #28]
+	adds	r2, r3, #1
+	beq	.L1127
+	ldr	r4, .L1137+8
+	movs	r2, #0
+	movs	r1, #1
+	str	r3, [r4, #4]
+	mov	r0, r4
+	ldr	r3, .L1137+12
+	str	r5, [r4, #16]
+	str	r2, [r4]
+	ldr	r3, [r3]
+	str	r3, [r4, #8]
+	ldr	r3, .L1137+16
+	ldr	r6, [r3]
+	str	r6, [r4, #12]
+	bl	FlashReadPages
+	ldr	r3, [r4]
+	cmp	r3, #256
+	beq	.L1128
+	adds	r3, r3, #1
+	beq	.L1128
+	ldr	r3, [r6, #8]
+	cmp	r5, r3
+	beq	.L1127
+.L1128:
+	ldr	r2, [r4, #8]
+	ldr	r3, [r4, #12]
+	ldr	r0, .L1137+20
+	ldr	r1, [r2, #4]
+	str	r1, [sp, #16]
+	mov	r1, r5
+	ldr	r2, [r2]
+	str	r2, [sp, #12]
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	ldr	r2, [r3, #8]
+	str	r2, [sp, #4]
+	ldr	r2, [r3, #4]
+	str	r2, [sp]
+	ldr	r2, [r4, #4]
+	ldr	r3, [r3]
+	bl	printf
+.L1127:
+	adds	r5, r5, #1
+	b	.L1124
+.L1138:
 	.align	2
-.L1383:
-	.word	.LANCHOR33
-	.word	.LANCHOR55
-	.size	l2p_flush, .-l2p_flush
-	.section	.text.FtlSuperblockPowerLostFix,"ax",%progbits
+.L1137:
+	.word	.LANCHOR152
+	.word	.LC28
+	.word	.LANCHOR138
+	.word	.LANCHOR106
+	.word	.LANCHOR114
+	.word	.LC30
+	.word	.LC29
+	.size	ftl_scan_all_data, .-ftl_scan_all_data
+	.section	.text.FtlGcScanTempBlk,"ax",%progbits
 	.align	1
-	.global	FtlSuperblockPowerLostFix
+	.global	FtlGcScanTempBlk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlSuperblockPowerLostFix, %function
-FtlSuperblockPowerLostFix:
-	@ args = 0, pretend = 0, frame = 24
+	.type	FtlGcScanTempBlk, %function
+FtlGcScanTempBlk:
+	@ args = 0, pretend = 0, frame = 48
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, lr}
-	mov	r3, #-1
-	sub	sp, sp, #24
-	ldr	r2, .L1398
-	movs	r6, #0
+	ldr	r3, .L1169
+	movw	r2, #65535
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #48
 	mov	r4, r0
+	ldrh	r5, [r3]
 	str	r3, [sp, #20]
-	ldr	r3, .L1398+4
-	ldr	r5, [r2]
-	mvn	r2, #2
-	ldr	r8, .L1398+16
+	cmp	r5, r2
+	beq	.L1161
+	cbnz	r5, .L1140
+.L1141:
+	bl	FtlGcPageVarInit
+	b	.L1142
+.L1161:
+	movs	r5, #0
+.L1140:
+	ldr	r3, .L1169+4
+	ldrh	r3, [r3]
+	cmp	r3, r1
+	beq	.L1141
+.L1142:
+	ldr	fp, .L1169+52
+.L1143:
+	ldrh	r2, [r4]
+	movs	r3, #0
+	strb	r3, [r4, #8]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L1144
+.L1160:
+	ldr	r3, .L1169+8
+	movs	r2, #0
+	ldr	r0, [fp]
+	mov	r10, r2
+	movw	lr, #65535
+	mov	r8, #20
+	ldrh	r3, [r3]
+	str	r3, [sp, #8]
+	ldr	r3, .L1169+12
 	ldr	r3, [r3]
-	str	r5, [sp, #16]
 	str	r3, [sp, #12]
-	str	r2, [r5, #8]
-	mvn	r2, #1
-	str	r2, [r5, #12]
-	ldrh	r2, [r0]
-	strh	r6, [r5]	@ movhi
-	strh	r2, [r5, #2]	@ movhi
-	movw	r2, #61589
-	str	r2, [r3]
-	add	r2, r2, #304087040
-	add	r2, r2, #1269760
-	addw	r2, r2, #1507
-	str	r2, [r3, #4]
-	ldrh	r3, [r0, #4]
-	tst	r3, #1
-	ite	eq
-	moveq	r7, #6
-	movne	r7, #7
-.L1391:
-	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1387
-.L1388:
-	ldr	r3, .L1398+8
-	ldrh	r1, [r4]
-	ldrh	r0, [r4, #4]
-	ldr	r2, [r3]
-	ldrh	r3, [r2, r1, lsl #1]
-	subs	r3, r3, r0
-	strh	r3, [r2, r1, lsl #1]	@ movhi
-	ldr	r3, .L1398+12
+	ldr	r3, .L1169+16
 	ldrh	r3, [r3]
-	strh	r3, [r4, #2]	@ movhi
-	movs	r3, #0
-	strb	r3, [r4, #6]
-	strh	r3, [r4, #4]	@ movhi
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, pc}
-.L1387:
+	str	r3, [sp, #16]
+	ldr	r3, .L1169+20
+	ldr	r7, [r3]
+	ldr	r3, .L1169+24
+	ldrh	ip, [r3]
+	add	r3, r4, #16
+	str	r3, [sp, #4]
+.L1145:
+	ldr	r1, [sp, #8]
+	uxth	r3, r2
+	cmp	r1, r3
+	bhi	.L1147
+	mov	r8, #0
+	movs	r2, #0
+	mov	r1, r10
+	bl	FlashReadPages
+.L1148:
+	uxth	r3, r8
+	cmp	r10, r3
+	bhi	.L1159
+	ldr	r3, .L1169+4
+	adds	r5, r5, #1
+	uxth	r5, r5
+	ldrh	r3, [r3]
+	cmp	r3, r5
+	bhi	.L1160
+.L1144:
+	ldr	r2, [sp, #20]
+	movw	r3, #65535
 	mov	r0, r4
-	bl	get_new_active_ppa
-	str	r0, [sp, #8]
-	adds	r0, r0, #1
-	beq	.L1388
-	ldr	r3, [r8]
-	movs	r1, #1
-	add	r0, sp, #4
-	str	r3, [r5, #4]
-	adds	r3, r3, #1
-	adds	r2, r3, #1
-	it	eq
-	moveq	r3, r6
-	str	r3, [r8]
-	movs	r3, #0
-	mov	r2, r3
-	bl	FlashProgPages
+	strh	r5, [r4, #2]	@ movhi
+	mov	r1, r5
+	strh	r3, [r2]	@ movhi
+	movs	r2, #0
+	strb	r2, [r4, #6]
+	bl	ftl_sb_update_avl_pages
+	mov	r0, #-1
+	add	sp, sp, #48
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1147:
+	ldr	r1, [sp, #4]
+	ldrh	r3, [r1], #2
+	cmp	r3, lr
+	str	r1, [sp, #4]
+	beq	.L1146
+	mla	r1, r8, r10, r0
+	orr	r3, r5, r3, lsl #10
+	str	r3, [r1, #4]
+	ldr	r3, [sp, #16]
+	mul	r3, r3, r10
+	bic	r3, r3, #3
+	mov	r6, r3
+	ldr	r3, [sp, #12]
+	add	r6, r6, r3
+	mul	r3, ip, r10
+	str	r6, [r1, #8]
+	bic	r3, r3, #3
+	add	r3, r3, r7
+	str	r3, [r1, #12]
+	add	r3, r10, #1
+	uxth	r10, r3
+.L1146:
+	adds	r2, r2, #1
+	b	.L1145
+.L1159:
+	movs	r3, #20
+	ldr	r1, [fp]
+	mul	r3, r3, r8
+	adds	r2, r1, r3
+	ldr	r6, [r1, r3]
+	ldr	r0, [r2, #4]
+	str	r0, [sp, #4]
+	cbnz	r6, .L1149
+	ldr	r7, [r2, #12]
+	movw	r2, #65535
+	ldrh	r1, [r7]
+	cmp	r1, r2
+	beq	.L1149
+	ldr	r2, .L1169+28
+	ldr	r0, [r7, #8]
+	ldr	r2, [r2]
+	cmp	r0, r2
+	bls	.L1151
+.L1149:
+	ldr	r3, .L1169+32
+	movs	r1, #0
+	ldrh	r2, [r4]
+	movs	r5, #0
+	ldr	r3, [r3]
+	strh	r1, [r3, r2, lsl #1]	@ movhi
 	ldrh	r0, [r4]
-	bl	decrement_vpc_count
-	subs	r7, r7, #1
-	bne	.L1391
-	b	.L1388
-.L1399:
+	bl	INSERT_FREE_LIST
+	movw	r3, #65535
+	strh	r3, [r4]	@ movhi
+	bl	FtlGcPageVarInit
+	b	.L1143
+.L1151:
+	mov	r2, r6
+	add	r1, sp, #24
+	str	r3, [sp, #8]
+	bl	log2phys
+	ldr	r2, [r7, #12]
+	ldr	r1, [sp, #24]
+	ldr	r3, [sp, #8]
+	cmp	r2, r1
+	beq	.L1153
+.L1154:
+	ldr	r2, [r7, #8]
+	add	r8, r8, #1
+	ldr	r1, [sp, #4]
+	ldr	r0, [r7, #12]
+	bl	FtlGcUpdatePage
+	b	.L1148
+.L1153:
+	str	r3, [sp, #8]
+	adds	r3, r2, #1
+	beq	.L1154
+	str	r2, [sp, #32]
+	movs	r1, #1
+	ldr	r2, .L1169+36
+	add	r0, sp, #28
+	ldr	r2, [r2]
+	str	r2, [sp, #36]
+	ldr	r2, .L1169+40
+	ldr	r2, [r2]
+	str	r2, [sp, #40]
+	mov	r2, r6
+	bl	FlashReadPages
+	ldr	r2, .L1169+44
+	ldr	r1, [fp]
+	ldr	r3, [sp, #8]
+	ldrh	r2, [r2]
+	ldr	r0, [sp, #36]
+	add	ip, r3, r1
+	lsls	r2, r2, #7
+.L1155:
+	cmp	r6, r2
+	beq	.L1154
+	ldr	r1, [ip, #8]
+	ldr	r3, [r0, r6, lsl #2]
+	ldr	r1, [r1, r6, lsl #2]
+	cmp	r1, r3
+	beq	.L1156
+	ldr	r2, [sp, #32]
+	ldrh	r1, [r4]
+	ldr	r0, .L1169+48
+	bl	printf
+	b	.L1149
+.L1156:
+	adds	r6, r6, #1
+	b	.L1155
+.L1170:
 	.align	2
-.L1398:
-	.word	.LANCHOR123
-	.word	.LANCHOR115
-	.word	.LANCHOR42
+.L1169:
+	.word	.LANCHOR160
 	.word	.LANCHOR19
-	.word	.LANCHOR71
-	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
+	.word	.LANCHOR3
+	.word	.LANCHOR64
+	.word	.LANCHOR23
+	.word	.LANCHOR65
+	.word	.LANCHOR24
+	.word	.LANCHOR152
+	.word	.LANCHOR42
+	.word	.LANCHOR110
+	.word	.LANCHOR115
+	.word	.LANCHOR12
+	.word	.LC31
+	.word	.LANCHOR103
+	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
 	.section	.text.FtlVendorPartWrite,"ax",%progbits
 	.align	1
 	.global	FtlVendorPartWrite
@@ -10286,7 +8553,7 @@ FtlSuperblockPowerLostFix:
 FtlVendorPartWrite:
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1412
+	ldr	r3, .L1183
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #104
 	str	r2, [sp]
@@ -10295,26 +8562,26 @@ FtlVendorPartWrite:
 	mov	r5, r1
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1408
-	ldr	r3, .L1412+4
+	bhi	.L1179
+	ldr	r3, .L1183+4
 	mov	r8, #0
 	ldrh	r6, [r3]
 	lsr	r6, r0, r6
 	lsl	fp, r6, #2
-.L1402:
-	cbnz	r5, .L1407
-.L1400:
+.L1173:
+	cbnz	r5, .L1178
+.L1171:
 	mov	r0, r8
 	add	sp, sp, #104
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1407:
-	ldr	r3, .L1412+8
+.L1178:
+	ldr	r3, .L1183+8
 	mov	r0, r7
-	ldr	r10, .L1412+24
+	ldr	r10, .L1183+24
 	ldr	r3, [r3]
 	ldr	r2, [r3, fp]
-	ldr	r3, .L1412+12
+	ldr	r3, .L1183+12
 	str	r2, [sp, #12]
 	ldrh	r3, [r3]
 	mov	r1, r3
@@ -10328,9 +8595,9 @@ FtlVendorPartWrite:
 	cmp	r5, r4
 	it	cc
 	uxthcc	r4, r5
-	cbz	r2, .L1404
+	cbz	r2, .L1175
 	cmp	r4, r3
-	beq	.L1404
+	beq	.L1175
 	ldr	r3, [r10]
 	add	r0, sp, #20
 	str	r2, [sp, #24]
@@ -10340,7 +8607,7 @@ FtlVendorPartWrite:
 	add	r3, sp, #40
 	str	r3, [sp, #32]
 	bl	FlashReadPages
-.L1405:
+.L1176:
 	lsls	r3, r4, #9
 	ldr	r0, [r10]
 	subs	r5, r5, r4
@@ -10353,7 +8620,7 @@ FtlVendorPartWrite:
 	bl	ftl_memcpy
 	ldr	r2, [r10]
 	mov	r1, r6
-	ldr	r0, .L1412+16
+	ldr	r0, .L1183+16
 	adds	r6, r6, #1
 	bl	FtlMapWritePage
 	ldr	r3, [sp]
@@ -10364,27 +8631,27 @@ FtlVendorPartWrite:
 	ldr	r3, [sp, #8]
 	add	r2, r2, r3
 	str	r2, [sp]
-	b	.L1402
-.L1404:
-	ldr	r3, .L1412+20
+	b	.L1173
+.L1175:
+	ldr	r3, .L1183+20
 	movs	r1, #0
 	ldr	r0, [r10]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-	b	.L1405
-.L1408:
+	b	.L1176
+.L1179:
 	mov	r8, #-1
-	b	.L1400
-.L1413:
+	b	.L1171
+.L1184:
 	.align	2
-.L1412:
+.L1183:
 	.word	.LANCHOR16
 	.word	.LANCHOR22
-	.word	.LANCHOR133
+	.word	.LANCHOR123
 	.word	.LANCHOR12
-	.word	.LANCHOR158
+	.word	.LANCHOR161
 	.word	.LANCHOR23
-	.word	.LANCHOR117
+	.word	.LANCHOR108
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.section	.text.Ftl_save_ext_data,"ax",%progbits
 	.align	1
@@ -10398,72 +8665,72 @@ Ftl_save_ext_data:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L1416
-	ldr	r3, .L1416+4
+	ldr	r2, .L1187
+	ldr	r3, .L1187+4
 	ldr	r1, [r2]
 	cmp	r1, r3
-	bne	.L1414
-	ldr	r3, .L1416+8
+	bne	.L1185
+	ldr	r3, .L1187+8
 	movs	r1, #1
 	movs	r0, #0
 	str	r3, [r2, #4]
-	ldr	r3, .L1416+12
+	ldr	r3, .L1187+12
 	ldr	r3, [r3]
 	str	r3, [r2, #88]
-	ldr	r3, .L1416+16
+	ldr	r3, .L1187+16
 	ldr	r3, [r3]
 	str	r3, [r2, #92]
-	ldr	r3, .L1416+20
+	ldr	r3, .L1187+20
 	ldr	r3, [r3]
 	str	r3, [r2, #8]
-	ldr	r3, .L1416+24
+	ldr	r3, .L1187+24
 	ldr	r3, [r3]
 	str	r3, [r2, #12]
-	ldr	r3, .L1416+28
+	ldr	r3, .L1187+28
 	ldr	r3, [r3]
 	str	r3, [r2, #16]
-	ldr	r3, .L1416+32
+	ldr	r3, .L1187+32
 	ldr	r3, [r3]
 	str	r3, [r2, #20]
-	ldr	r3, .L1416+36
+	ldr	r3, .L1187+36
 	ldr	r3, [r3]
 	str	r3, [r2, #28]
-	ldr	r3, .L1416+40
+	ldr	r3, .L1187+40
 	ldr	r3, [r3]
 	str	r3, [r2, #32]
-	ldr	r3, .L1416+44
+	ldr	r3, .L1187+44
 	ldr	r3, [r3]
 	str	r3, [r2, #36]
-	ldr	r3, .L1416+48
+	ldr	r3, .L1187+48
 	ldr	r3, [r3]
 	str	r3, [r2, #40]
-	ldr	r3, .L1416+52
+	ldr	r3, .L1187+52
 	ldr	r3, [r3]
 	str	r3, [r2, #44]
-	ldr	r3, .L1416+56
+	ldr	r3, .L1187+56
 	ldr	r3, [r3]
 	str	r3, [r2, #48]
 	b	FtlVendorPartWrite
-.L1414:
+.L1185:
 	bx	lr
-.L1417:
+.L1188:
 	.align	2
-.L1416:
-	.word	.LANCHOR81
+.L1187:
+	.word	.LANCHOR135
 	.word	1179929683
 	.word	1342177352
-	.word	.LANCHOR68
-	.word	.LANCHOR69
-	.word	.LANCHOR67
-	.word	.LANCHOR64
-	.word	.LANCHOR62
-	.word	.LANCHOR66
-	.word	.LANCHOR73
-	.word	.LANCHOR75
-	.word	.LANCHOR63
-	.word	.LANCHOR65
-	.word	.LANCHOR76
-	.word	.LANCHOR77
+	.word	.LANCHOR162
+	.word	.LANCHOR163
+	.word	.LANCHOR84
+	.word	.LANCHOR85
+	.word	.LANCHOR89
+	.word	.LANCHOR88
+	.word	.LANCHOR91
+	.word	.LANCHOR80
+	.word	.LANCHOR86
+	.word	.LANCHOR87
+	.word	.LANCHOR92
+	.word	.LANCHOR93
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
 	.section	.text.FtlEctTblFlush,"ax",%progbits
 	.align	1
@@ -10476,7 +8743,7 @@ Ftl_save_ext_data:
 FtlEctTblFlush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L1423
+	ldr	r2, .L1194
 	push	{r3, lr}
 	ldrh	r3, [r2]
 	cmp	r3, #31
@@ -10485,22 +8752,22 @@ FtlEctTblFlush:
 	movhi	r3, #32
 	strhls	r3, [r2]	@ movhi
 	movls	r3, #1
-	ldr	r2, .L1423+4
-	cbnz	r0, .L1420
+	ldr	r2, .L1194+4
+	cbnz	r0, .L1191
 	ldr	r1, [r2]
 	ldr	r0, [r1, #20]
 	ldr	r1, [r1, #16]
 	add	r3, r3, r0
 	cmp	r1, r3
-	bcc	.L1421
-.L1420:
+	bcc	.L1192
+.L1191:
 	ldr	r2, [r2]
 	movs	r0, #64
 	ldr	r3, [r2, #16]
 	str	r3, [r2, #20]
-	ldr	r3, .L1423+8
+	ldr	r3, .L1194+8
 	str	r3, [r2]
-	ldr	r3, .L1423+12
+	ldr	r3, .L1194+12
 	ldrh	r1, [r3]
 	lsls	r3, r1, #9
 	str	r3, [r2, #12]
@@ -10511,16 +8778,16 @@ FtlEctTblFlush:
 	str	r3, [r2, #4]
 	bl	FtlVendorPartWrite
 	bl	Ftl_save_ext_data
-.L1421:
+.L1192:
 	movs	r0, #0
 	pop	{r3, pc}
-.L1424:
+.L1195:
 	.align	2
-.L1423:
-	.word	.LANCHOR170
-	.word	.LANCHOR127
+.L1194:
+	.word	.LANCHOR164
+	.word	.LANCHOR118
 	.word	1112818501
-	.word	.LANCHOR125
+	.word	.LANCHOR116
 	.size	FtlEctTblFlush, .-FtlEctTblFlush
 	.section	.text.sftl_vendor_write,"ax",%progbits
 	.align	1
@@ -10548,7 +8815,7 @@ sftl_vendor_write:
 FtlVendorPartRead:
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1436
+	ldr	r3, .L1207
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, r2
 	adds	r2, r0, r1
@@ -10557,28 +8824,28 @@ FtlVendorPartRead:
 	mov	r6, r1
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1435
-	ldr	r3, .L1436+4
+	bhi	.L1206
+	ldr	r3, .L1207+4
 	mov	r8, #0
-	ldr	fp, .L1436+28
+	ldr	fp, .L1207+28
 	ldrh	r5, [r3]
 	lsr	r5, r0, r5
 	lsls	r3, r5, #2
 	str	r3, [sp]
-.L1428:
-	cbnz	r6, .L1434
-.L1426:
+.L1199:
+	cbnz	r6, .L1205
+.L1197:
 	mov	r0, r8
 	add	sp, sp, #104
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1434:
-	ldr	r3, .L1436+8
+.L1205:
+	ldr	r3, .L1207+8
 	mov	r0, r7
 	ldr	r2, [sp]
 	ldr	r3, [r3]
 	ldr	r3, [r3, r2]
-	ldr	r2, .L1436+12
+	ldr	r2, .L1207+12
 	str	r3, [sp, #8]
 	ldrh	r4, [r2]
 	mov	r1, r4
@@ -10593,7 +8860,7 @@ FtlVendorPartRead:
 	lsls	r2, r4, #9
 	str	r2, [sp, #8]
 	cmp	r3, #0
-	beq	.L1430
+	beq	.L1201
 	ldr	r2, [fp]
 	add	r0, sp, #20
 	str	r3, [sp, #24]
@@ -10607,28 +8874,28 @@ FtlVendorPartRead:
 	ldr	r2, [sp, #20]
 	ldr	r3, [sp, #12]
 	adds	r2, r2, #1
-	ldr	r2, .L1436+16
+	ldr	r2, .L1207+16
 	it	eq
 	moveq	r8, #-1
 	ldr	r2, [r2]
 	cmp	r2, #256
-	bne	.L1432
+	bne	.L1203
 	mov	r2, r3
 	mov	r1, r5
-	ldr	r0, .L1436+20
+	ldr	r0, .L1207+20
 	bl	printf
 	ldr	r2, [fp]
 	mov	r1, r5
-	ldr	r0, .L1436+24
+	ldr	r0, .L1207+24
 	bl	FtlMapWritePage
-.L1432:
+.L1203:
 	ldr	r1, [fp]
 	lsls	r2, r4, #9
 	ldr	r3, [sp, #4]
 	mov	r0, r10
 	add	r1, r1, r3, lsl #9
 	bl	ftl_memcpy
-.L1433:
+.L1204:
 	ldr	r3, [sp, #8]
 	adds	r5, r5, #1
 	subs	r6, r6, r4
@@ -10637,27 +8904,27 @@ FtlVendorPartRead:
 	ldr	r3, [sp]
 	adds	r3, r3, #4
 	str	r3, [sp]
-	b	.L1428
-.L1430:
+	b	.L1199
+.L1201:
 	lsls	r2, r4, #9
 	mov	r1, r3
 	mov	r0, r10
 	bl	ftl_memset
-	b	.L1433
-.L1435:
+	b	.L1204
+.L1206:
 	mov	r8, #-1
-	b	.L1426
-.L1437:
+	b	.L1197
+.L1208:
 	.align	2
-.L1436:
+.L1207:
 	.word	.LANCHOR16
 	.word	.LANCHOR22
-	.word	.LANCHOR133
+	.word	.LANCHOR123
 	.word	.LANCHOR12
-	.word	.LANCHOR148
-	.word	.LC107
-	.word	.LANCHOR158
-	.word	.LANCHOR117
+	.word	.LANCHOR138
+	.word	.LC32
+	.word	.LANCHOR161
+	.word	.LANCHOR108
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
 	.section	.text.FtlLoadEctTbl,"ax",%progbits
 	.align	1
@@ -10672,35 +8939,35 @@ FtlLoadEctTbl:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r0, #64
-	ldr	r4, .L1440
-	ldr	r5, .L1440+4
+	ldr	r4, .L1211
+	ldr	r5, .L1211+4
 	ldr	r2, [r4]
 	ldrh	r1, [r5]
 	bl	FtlVendorPartRead
 	ldr	r3, [r4]
 	ldr	r2, [r3]
-	ldr	r3, .L1440+8
+	ldr	r3, .L1211+8
 	cmp	r2, r3
-	beq	.L1439
-	ldr	r1, .L1440+12
-	ldr	r0, .L1440+16
+	beq	.L1210
+	ldr	r1, .L1211+12
+	ldr	r0, .L1211+16
 	bl	printf
 	ldrh	r2, [r5]
 	movs	r1, #0
 	ldr	r0, [r4]
 	lsls	r2, r2, #9
 	bl	ftl_memset
-.L1439:
+.L1210:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L1441:
+.L1212:
 	.align	2
-.L1440:
-	.word	.LANCHOR127
-	.word	.LANCHOR125
+.L1211:
+	.word	.LANCHOR118
+	.word	.LANCHOR116
 	.word	1112818501
-	.word	.LC108
-	.word	.LC71
+	.word	.LC33
+	.word	.LC34
 	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
 	.section	.text.Ftl_load_ext_data,"ax",%progbits
 	.align	1
@@ -10715,93 +8982,93 @@ Ftl_load_ext_data:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r1, #1
-	ldr	r4, .L1445
+	ldr	r4, .L1216
 	movs	r0, #0
-	ldr	r5, .L1445+4
+	ldr	r5, .L1216+4
 	mov	r2, r4
 	bl	FtlVendorPartRead
 	ldr	r3, [r4]
 	cmp	r3, r5
-	beq	.L1443
+	beq	.L1214
 	mov	r2, #512
 	movs	r1, #0
 	mov	r0, r4
 	bl	ftl_memset
 	str	r5, [r4]
-.L1443:
+.L1214:
 	ldr	r3, [r4]
 	cmp	r3, r5
-	ldr	r3, .L1445+8
-	bne	.L1444
+	ldr	r3, .L1216+8
+	bne	.L1215
 	ldr	r1, [r4, #88]
-	ldr	r2, .L1445+12
+	ldr	r2, .L1216+12
 	str	r1, [r2]
 	ldr	r1, [r4, #92]
-	ldr	r2, .L1445+16
+	ldr	r2, .L1216+16
 	str	r1, [r2]
 	ldr	r1, [r4, #8]
-	ldr	r2, .L1445+20
+	ldr	r2, .L1216+20
 	str	r1, [r2]
 	ldr	r1, [r4, #12]
-	ldr	r2, .L1445+24
+	ldr	r2, .L1216+24
 	str	r1, [r2]
 	ldr	r1, [r4, #16]
-	ldr	r2, .L1445+28
+	ldr	r2, .L1216+28
 	str	r1, [r2]
 	ldr	r1, [r4, #20]
-	ldr	r2, .L1445+32
+	ldr	r2, .L1216+32
 	str	r1, [r2]
 	ldr	r2, [r4, #28]
 	ldr	r1, [r4, #32]
 	str	r2, [r3]
-	ldr	r2, .L1445+36
+	ldr	r2, .L1216+36
 	str	r1, [r2]
 	ldr	r1, [r4, #36]
-	ldr	r2, .L1445+40
+	ldr	r2, .L1216+40
 	str	r1, [r2]
 	ldr	r1, [r4, #40]
-	ldr	r2, .L1445+44
+	ldr	r2, .L1216+44
 	str	r1, [r2]
 	ldr	r1, [r4, #44]
-	ldr	r2, .L1445+48
+	ldr	r2, .L1216+48
 	str	r1, [r2]
 	ldr	r1, [r4, #48]
-	ldr	r2, .L1445+52
+	ldr	r2, .L1216+52
 	str	r1, [r2]
-.L1444:
-	ldr	r1, .L1445+56
-	ldr	r2, .L1445+60
+.L1215:
+	ldr	r1, .L1216+56
+	ldr	r2, .L1216+60
 	ldr	r3, [r3]
 	ldr	r0, [r1]
 	ldrh	r2, [r2]
-	ldr	r1, .L1445+64
+	ldr	r1, .L1216+64
 	mla	r0, r0, r2, r3
 	ldrh	r1, [r1]
 	bl	__aeabi_uidiv
-	ldr	r3, .L1445+68
+	ldr	r3, .L1216+68
 	str	r0, [r3]
 	pop	{r3, r4, r5, pc}
-.L1446:
+.L1217:
 	.align	2
-.L1445:
-	.word	.LANCHOR81
+.L1216:
+	.word	.LANCHOR135
 	.word	1179929683
-	.word	.LANCHOR73
-	.word	.LANCHOR68
-	.word	.LANCHOR69
-	.word	.LANCHOR67
-	.word	.LANCHOR64
-	.word	.LANCHOR62
-	.word	.LANCHOR66
-	.word	.LANCHOR75
-	.word	.LANCHOR63
-	.word	.LANCHOR65
-	.word	.LANCHOR76
-	.word	.LANCHOR77
-	.word	.LANCHOR72
+	.word	.LANCHOR91
+	.word	.LANCHOR162
+	.word	.LANCHOR163
+	.word	.LANCHOR84
+	.word	.LANCHOR85
+	.word	.LANCHOR89
+	.word	.LANCHOR88
+	.word	.LANCHOR80
+	.word	.LANCHOR86
+	.word	.LANCHOR87
+	.word	.LANCHOR92
+	.word	.LANCHOR93
+	.word	.LANCHOR90
 	.word	.LANCHOR14
 	.word	.LANCHOR5
-	.word	.LANCHOR74
+	.word	.LANCHOR145
 	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
 	.section	.text.sftl_vendor_read,"ax",%progbits
 	.align	1
@@ -10818,6 +9085,100 @@ sftl_vendor_read:
 	add	r0, r0, #256
 	b	FtlVendorPartRead
 	.size	sftl_vendor_read, .-sftl_vendor_read
+	.section	.text.FtlMapBlkWriteDump_data,"ax",%progbits
+	.align	1
+	.global	FtlMapBlkWriteDump_data
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlMapBlkWriteDump_data, %function
+FtlMapBlkWriteDump_data:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	mov	r4, r0
+	ldr	r3, [r0, #36]
+	cmp	r3, #0
+	beq	.L1219
+	movs	r3, #0
+	ldr	r5, .L1231
+	str	r3, [r0, #36]
+	ldr	r3, .L1231+4
+	ldrh	r6, [r0, #6]
+	mov	r7, r5
+	ldr	r10, [r0, #24]
+	ldr	r3, [r3]
+	str	r3, [r5, #8]
+	ldr	r3, .L1231+8
+	ldr	r8, [r3]
+	ldrh	r3, [r0, #2]
+	str	r8, [r5, #12]
+	cbz	r3, .L1221
+	ldr	r2, .L1231+12
+	ldrh	r2, [r2]
+	subs	r2, r2, #1
+	cmp	r3, r2
+	bge	.L1221
+	ldrh	r2, [r0]
+	movw	r1, #65535
+	cmp	r2, r1
+	beq	.L1221
+	ldr	r1, [r0, #12]
+	subs	r3, r3, #1
+	mov	r0, r5
+	ldrh	r2, [r1, r2, lsl #1]
+	orr	r3, r3, r2, lsl #10
+	movs	r2, #1
+	mov	r1, r2
+	str	r3, [r5, #4]
+	bl	FlashReadPages
+	ldr	r3, [r5]
+	adds	r3, r3, #1
+	beq	.L1221
+	ldr	r3, [r4, #24]
+	ldrh	r1, [r8, #8]
+	ldr	r2, [r3, r1, lsl #2]
+	ldr	r3, [r5, #4]
+	cmp	r2, r3
+	bne	.L1221
+	ldr	r2, [r5, #8]
+.L1230:
+	mov	r0, r4
+	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
+	b	FtlMapWritePage
+.L1221:
+	subs	r6, r6, #1
+	uxth	r6, r6
+	ldr	r3, [r10, r6, lsl #2]
+	str	r3, [r7, #4]
+	cbz	r3, .L1222
+	movs	r2, #1
+	ldr	r0, .L1231
+	mov	r1, r2
+	bl	FlashReadPages
+.L1223:
+	ldr	r2, [r7, #8]
+	mov	r1, r6
+	b	.L1230
+.L1222:
+	ldr	r3, .L1231+16
+	movs	r1, #255
+	ldr	r0, [r7, #8]
+	ldrh	r2, [r3]
+	bl	ftl_memset
+	b	.L1223
+.L1219:
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L1232:
+	.align	2
+.L1231:
+	.word	.LANCHOR138
+	.word	.LANCHOR107
+	.word	.LANCHOR114
+	.word	.LANCHOR20
+	.word	.LANCHOR23
+	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
 	.section	.text.FtlVpcTblFlush,"ax",%progbits
 	.align	1
 	.global	FtlVpcTblFlush
@@ -10830,207 +9191,216 @@ FtlVpcTblFlush:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	fp, #0
-	ldr	r3, .L1463
-	ldr	r4, .L1463+4
-	ldr	r10, .L1463+76
-	ldr	r0, [r3]
-	ldr	r5, .L1463+8
-	ldr	r7, [r10]
-	ldrh	r2, [r4]
-	str	r0, [r5, #8]
-	str	r7, [r5, #12]
-	strh	r2, [r7, #2]	@ movhi
-	movw	r2, #61604
-	strh	r2, [r7]	@ movhi
-	ldr	r2, [r4, #8]
-	ldr	r6, .L1463+12
-	ldr	ip, .L1463+80
-	str	r2, [r7, #4]
-	ldr	r2, .L1463+16
-	str	fp, [r7, #8]
-	str	fp, [r7, #12]
-	stm	r6, {r2, ip}
-	ldrh	r2, [r4, #6]
-	str	r3, [sp, #4]
-	ldr	r8, .L1463+84
-	strh	r2, [r6, #8]	@ movhi
-	ldr	r2, .L1463+20
+	mov	r10, #0
+	ldr	r5, .L1248
+	ldr	r3, .L1248+4
+	ldr	fp, .L1248+76
+	ldr	r6, .L1248+8
+	ldr	r7, [r3]
+	ldr	r0, [fp]
+	ldrh	r3, [r5]
+	str	r7, [r6, #12]
+	str	r0, [r6, #8]
+	strh	r3, [r7, #2]	@ movhi
+	movw	r3, #61604
+	ldr	r4, .L1248+12
+	strh	r3, [r7]	@ movhi
+	ldr	r2, .L1248+16
+	ldr	r3, [r5, #8]
+	ldr	ip, .L1248+80
+	str	r10, [r7, #8]
+	str	r3, [r7, #4]
+	stm	r4, {r2, ip}
+	ldrh	r2, [r5, #6]
+	str	r10, [r7, #12]
+	ldr	r8, .L1248+84
+	strh	r2, [r4, #8]	@ movhi
+	ldr	r2, .L1248+20
+	ldr	r3, .L1248+24
 	ldrh	r2, [r2]
-	strb	r2, [r6, #10]
-	ldr	r2, .L1463+24
+	strb	r2, [r4, #10]
+	ldr	r2, .L1248+28
 	ldrh	r1, [r2]
 	ldrh	ip, [r2, #2]
-	strh	r1, [r6, #14]	@ movhi
+	strh	r1, [r4, #14]	@ movhi
 	ldrb	r1, [r2, #6]	@ zero_extendqisi2
 	ldrb	r2, [r2, #8]	@ zero_extendqisi2
-	strb	r2, [r6, #11]
+	strb	r2, [r4, #11]
 	orr	r1, r1, ip, lsl #6
-	ldr	r2, .L1463+28
-	strh	r1, [r6, #16]	@ movhi
+	ldr	r2, .L1248+32
+	strh	r1, [r4, #16]	@ movhi
 	ldrh	r1, [r2]
 	ldrh	ip, [r2, #2]
-	strh	r1, [r6, #18]	@ movhi
+	strh	r1, [r4, #18]	@ movhi
 	ldrb	r1, [r2, #6]	@ zero_extendqisi2
 	ldrb	r2, [r2, #8]	@ zero_extendqisi2
+	strb	r2, [r4, #12]
 	orr	r1, r1, ip, lsl #6
-	strh	r1, [r6, #20]	@ movhi
-	strb	r2, [r6, #12]
-	ldr	r2, .L1463+32
+	ldr	r2, .L1248+36
+	strh	r1, [r4, #20]	@ movhi
 	ldrh	r1, [r2]
 	ldrh	ip, [r2, #2]
-	strh	r1, [r6, #22]	@ movhi
+	strh	r1, [r4, #22]	@ movhi
 	ldrb	r1, [r2, #6]	@ zero_extendqisi2
 	ldrb	r2, [r2, #8]	@ zero_extendqisi2
-	strb	r2, [r6, #13]
+	strb	r2, [r4, #13]
 	orr	r1, r1, ip, lsl #6
-	ldr	r2, .L1463+36
-	strh	r1, [r6, #24]	@ movhi
+	ldr	r2, .L1248+40
+	strh	r1, [r4, #24]	@ movhi
 	movs	r1, #255
 	ldr	r2, [r2]
-	str	r2, [r6, #32]
+	str	r2, [r4, #32]
 	ldr	r2, [r8]
-	str	r2, [r6, #40]
-	ldr	r2, .L1463+40
+	str	r2, [r4, #40]
+	ldr	r2, .L1248+44
 	ldr	r2, [r2]
-	str	r2, [r6, #36]
-	ldr	r2, .L1463+44
-	ldrh	r2, [r2]
+	str	r2, [r4, #36]
+	ldrh	r2, [r3]
 	bl	ftl_memset
-	mov	r1, r6
-	ldr	r6, .L1463+48
+	mov	r1, r4
+	ldr	r4, .L1248+48
 	movs	r2, #48
-	ldr	r0, [r5, #8]
+	ldr	r0, [r6, #8]
 	bl	ftl_memcpy
-	ldrh	r2, [r6]
-	ldr	r0, [r5, #8]
-	ldr	r1, .L1463+52
+	ldrh	r2, [r4]
+	ldr	r0, [r6, #8]
+	ldr	r1, .L1248+52
 	lsls	r2, r2, #1
 	adds	r0, r0, #48
 	ldr	r1, [r1]
 	bl	ftl_memcpy
-	ldrh	r0, [r6]
-	ldr	r1, .L1463+56
-	ldr	r6, [r5, #8]
+	ldrh	r0, [r4]
+	ldr	r1, .L1248+56
+	ldr	r4, [r6, #8]
 	lsrs	r2, r0, #3
 	adds	r0, r0, #24
 	lsls	r0, r0, #1
 	ldr	r1, [r1]
 	adds	r2, r2, #4
 	bic	r0, r0, #3
-	add	r0, r0, r6
-	mov	r6, fp
+	add	r0, r0, r4
+	mov	r4, r10
 	bl	ftl_memcpy
-	mov	r0, fp
-	movw	fp, #65535
+	mov	r0, r10
+	ldr	r10, .L1248+4
 	bl	FtlUpdateVaildLpn
-.L1449:
-	ldr	r3, [sp, #4]
-	ldrh	r1, [r4, #2]
-	ldrh	r2, [r4]
-	ldr	r3, [r3]
-	str	r3, [r5, #8]
+	movw	r3, #65535
+	str	r3, [sp]
+	ldr	r3, .L1248+24
+	str	r3, [sp, #4]
+.L1234:
+	ldr	r3, [fp]
+	ldrh	r1, [r5, #2]
+	ldrh	r2, [r5]
+	str	r3, [r6, #8]
 	ldr	r3, [r10]
-	str	r3, [r5, #12]
+	str	r3, [r6, #12]
 	orr	r3, r1, r2, lsl #10
-	str	r3, [r5, #4]
-	ldr	r3, .L1463+60
+	str	r3, [r6, #4]
+	ldr	r3, .L1248+60
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r1, r3
-	blt	.L1450
+	blt	.L1235
+	ldrh	r3, [r5, #4]
+	strh	r2, [r5, #4]	@ movhi
+	str	r3, [sp]
 	movs	r3, #0
-	ldrh	fp, [r4, #4]
-	strh	r3, [r4, #2]	@ movhi
-	strh	r2, [r4, #4]	@ movhi
+	strh	r3, [r5, #2]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
 	ldr	r3, [r8]
-	strh	r0, [r4]	@ movhi
+	strh	r0, [r5]	@ movhi
 	adds	r2, r3, #1
-	str	r3, [r4, #8]
+	str	r3, [r5, #8]
 	str	r2, [r8]
 	lsls	r2, r0, #10
-	str	r2, [r5, #4]
+	str	r2, [r6, #4]
 	str	r3, [r7, #4]
 	strh	r0, [r7, #2]	@ movhi
-.L1450:
+.L1235:
+	ldr	r3, [sp, #4]
+	ldr	r0, [fp]
+	ldrh	r1, [r3]
+	bl	js_hash
 	movs	r3, #1
-	ldr	r0, .L1463+8
+	str	r0, [r7, #12]
 	mov	r2, r3
 	mov	r1, r3
+	ldr	r0, .L1248+8
 	bl	FlashProgPages
-	ldrh	r3, [r4, #2]
-	ldr	r2, [r5]
+	ldrh	r3, [r5, #2]
+	ldr	r2, [r6]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	adds	r1, r2, #1
-	strh	r3, [r4, #2]	@ movhi
-	bne	.L1451
+	strh	r3, [r5, #2]	@ movhi
+	bne	.L1236
 	cmp	r3, #1
-	bne	.L1452
-	movw	r2, #1135
-	ldr	r1, .L1463+64
-	ldr	r0, .L1463+68
+	bne	.L1237
+	movw	r2, #1138
+	ldr	r1, .L1248+64
+	ldr	r0, .L1248+68
 	bl	printf
-.L1452:
-	ldrh	r3, [r4, #2]
-	adds	r6, r6, #1
-	uxth	r6, r6
+.L1237:
+	ldrh	r3, [r5, #2]
+	adds	r4, r4, #1
+	uxth	r4, r4
 	cmp	r3, #1
 	itttt	eq
-	ldreq	r3, .L1463+60
+	ldreq	r3, .L1248+60
 	ldrheq	r3, [r3]
 	addeq	r3, r3, #-1
-	strheq	r3, [r4, #2]	@ movhi
-	cmp	r6, #3
-	bls	.L1449
-	mov	r2, r6
-	ldr	r1, [r5, #4]
-	ldr	r0, .L1463+72
+	strheq	r3, [r5, #2]	@ movhi
+	cmp	r4, #3
+	bls	.L1234
+	mov	r2, r4
+	ldr	r1, [r6, #4]
+	ldr	r0, .L1248+72
 	bl	printf
-.L1455:
-	b	.L1455
-.L1451:
+.L1240:
+	b	.L1240
+.L1236:
 	cmp	r3, #1
-	beq	.L1449
+	beq	.L1234
 	cmp	r2, #256
-	beq	.L1449
+	beq	.L1234
+	ldr	r2, [sp]
 	movw	r3, #65535
-	cmp	fp, r3
-	beq	.L1456
+	cmp	r2, r3
+	beq	.L1241
 	movs	r1, #1
-	mov	r0, fp
+	mov	r0, r2
 	bl	FtlFreeSysBlkQueueIn
-.L1456:
+.L1241:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1464:
+.L1249:
 	.align	2
-.L1463:
-	.word	.LANCHOR115
-	.word	.LANCHOR79
-	.word	.LANCHOR148
+.L1248:
+	.word	.LANCHOR139
+	.word	.LANCHOR114
+	.word	.LANCHOR138
 	.word	.LANCHOR39
 	.word	1179929683
 	.word	.LANCHOR10
+	.word	.LANCHOR23
 	.word	.LANCHOR51
 	.word	.LANCHOR52
 	.word	.LANCHOR53
-	.word	.LANCHOR72
-	.word	.LANCHOR71
-	.word	.LANCHOR23
+	.word	.LANCHOR90
+	.word	.LANCHOR83
 	.word	.LANCHOR5
 	.word	.LANCHOR42
 	.word	.LANCHOR1
 	.word	.LANCHOR20
-	.word	.LANCHOR171
+	.word	.LANCHOR165
 	.word	.LC1
-	.word	.LC109
-	.word	.LANCHOR123
+	.word	.LC35
+	.word	.LANCHOR106
 	.word	1342177352
-	.word	.LANCHOR70
+	.word	.LANCHOR82
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
 	.section	.text.FtlSysFlush,"ax",%progbits
 	.align	1
@@ -11063,48 +9433,48 @@ sftl_deinit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L1468
+	ldr	r3, .L1253
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L1467
+	bne	.L1252
 	bl	FtlSysFlush
-.L1467:
+.L1252:
 	movs	r0, #0
 	pop	{r3, pc}
-.L1469:
+.L1254:
 	.align	2
-.L1468:
-	.word	.LANCHOR86
+.L1253:
+	.word	.LANCHOR166
 	.size	sftl_deinit, .-sftl_deinit
-	.section	.text.sftl_discard,"ax",%progbits
+	.section	.text.FtlDiscard,"ax",%progbits
 	.align	1
-	.global	sftl_discard
+	.global	FtlDiscard
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	sftl_discard, %function
-sftl_discard:
+	.type	FtlDiscard, %function
+FtlDiscard:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1485
+	ldr	r3, .L1270
 	adds	r2, r0, r1
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r7, r0
 	mov	r5, r1
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1478
+	bhi	.L1263
 	cmp	r1, #31
-	bhi	.L1472
-.L1477:
+	bhi	.L1257
+.L1262:
 	movs	r0, #0
-.L1470:
+.L1255:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1472:
-	ldr	r8, .L1485+12
+.L1257:
+	ldr	r8, .L1270+12
 	ldrh	r4, [r8]
 	mov	r1, r4
 	bl	__aeabi_uidiv
@@ -11112,7 +9482,7 @@ sftl_discard:
 	mov	r6, r0
 	subs	r7, r7, r3
 	uxth	r7, r7
-	cbz	r7, .L1473
+	cbz	r7, .L1258
 	subs	r4, r4, r7
 	adds	r6, r6, #1
 	cmp	r4, r5
@@ -11120,32 +9490,32 @@ sftl_discard:
 	movcs	r4, r5
 	uxth	r4, r4
 	subs	r5, r5, r4
-.L1473:
-	ldr	r4, .L1485+4
+.L1258:
+	ldr	r4, .L1270+4
 	mov	r3, #-1
-	ldr	r7, .L1485+8
+	ldr	r7, .L1270+8
 	str	r3, [sp, #4]
-.L1474:
+.L1259:
 	ldrh	r3, [r8]
 	cmp	r5, r3
-	bcs	.L1476
-	ldr	r3, .L1485+4
+	bcs	.L1261
+	ldr	r3, .L1270+4
 	ldr	r2, [r3]
 	cmp	r2, #32
-	bls	.L1477
+	bls	.L1262
 	movs	r4, #0
 	str	r4, [r3]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L1477
-.L1476:
+	b	.L1262
+.L1261:
 	movs	r2, #0
 	mov	r1, sp
 	mov	r0, r6
 	bl	log2phys
 	ldr	r3, [sp]
 	adds	r3, r3, #1
-	beq	.L1475
+	beq	.L1260
 	ldr	r3, [r4]
 	movs	r2, #1
 	add	r1, sp, #4
@@ -11160,137 +9530,22 @@ sftl_discard:
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L1475:
+.L1260:
 	ldrh	r3, [r8]
 	adds	r6, r6, #1
 	subs	r5, r5, r3
-	b	.L1474
-.L1478:
+	b	.L1259
+.L1263:
 	mov	r0, #-1
-	b	.L1470
-.L1486:
+	b	.L1255
+.L1271:
 	.align	2
-.L1485:
+.L1270:
 	.word	.LANCHOR34
-	.word	.LANCHOR172
-	.word	.LANCHOR63
+	.word	.LANCHOR167
+	.word	.LANCHOR86
 	.word	.LANCHOR12
-	.size	sftl_discard, .-sftl_discard
-	.section	.text.FtlVpcCheckAndModify,"ax",%progbits
-	.align	1
-	.global	FtlVpcCheckAndModify
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlVpcCheckAndModify, %function
-FtlVpcCheckAndModify:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
-	movs	r4, #0
-	ldr	r1, .L1500
-	ldr	r0, .L1500+4
-	bl	printf
-	ldr	r3, .L1500+8
-	movs	r1, #0
-	ldr	r5, .L1500+12
-	ldr	r6, .L1500+16
-	ldrh	r2, [r3]
-	ldr	r0, [r5]
-	lsls	r2, r2, #1
-	bl	ftl_memset
-.L1488:
-	ldr	r3, [r6]
-	cmp	r4, r3
-	bcc	.L1490
-	ldr	r10, .L1500+36
-	movs	r7, #0
-	ldr	r8, .L1500+40
-.L1491:
-	ldrh	r3, [r10]
-	uxth	r6, r7
-	cmp	r3, r6
-	bhi	.L1496
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
-	add	sp, sp, #12
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L1490:
-	movs	r2, #0
-	add	r1, sp, #4
-	mov	r0, r4
-	bl	log2phys
-	ldr	r0, [sp, #4]
-	adds	r3, r0, #1
-	beq	.L1489
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-	ldr	r2, [r5]
-	ldrh	r3, [r2, r0, lsl #1]
-	adds	r3, r3, #1
-	strh	r3, [r2, r0, lsl #1]	@ movhi
-.L1489:
-	adds	r4, r4, #1
-	b	.L1488
-.L1496:
-	ldr	r3, [r8]
-	uxth	r4, r7
-	ldrh	r2, [r3, r4, lsl #1]
-	ldr	r3, [r5]
-	ldrh	r3, [r3, r4, lsl #1]
-	cmp	r2, r3
-	beq	.L1493
-	movw	r1, #65535
-	cmp	r2, r1
-	beq	.L1493
-	mov	r1, r4
-	ldr	r0, .L1500+20
-	bl	printf
-	ldr	r3, .L1500+24
-	ldrh	r3, [r3]
-	cmp	r3, r6
-	beq	.L1493
-	ldr	r3, .L1500+28
-	ldrh	r3, [r3]
-	cmp	r3, r6
-	beq	.L1493
-	ldr	r3, .L1500+32
-	ldrh	r3, [r3]
-	cmp	r3, r6
-	beq	.L1493
-	ldr	r3, [r8]
-	ldrh	r2, [r3, r4, lsl #1]
-	cbnz	r2, .L1495
-	ldr	r2, [r5]
-	ldrh	r2, [r2, r4, lsl #1]
-	strh	r2, [r3, r4, lsl #1]	@ movhi
-.L1493:
-	adds	r7, r7, #1
-	b	.L1491
-.L1495:
-	ldr	r2, [r5]
-	mov	r0, r6
-	ldrh	r2, [r2, r4, lsl #1]
-	strh	r2, [r3, r4, lsl #1]	@ movhi
-	bl	update_vpc_list
-	b	.L1493
-.L1501:
-	.align	2
-.L1500:
-	.word	.LANCHOR173
-	.word	.LC94
-	.word	.LANCHOR6
-	.word	.LANCHOR128
-	.word	.LANCHOR61
-	.word	.LC110
-	.word	.LANCHOR51
-	.word	.LANCHOR53
-	.word	.LANCHOR52
-	.word	.LANCHOR5
-	.word	.LANCHOR42
-	.size	FtlVpcCheckAndModify, .-FtlVpcCheckAndModify
+	.size	FtlDiscard, .-FtlDiscard
 	.section	.text.allocate_new_data_superblock,"ax",%progbits
 	.align	1
 	.global	allocate_new_data_superblock
@@ -11302,47 +9557,47 @@ FtlVpcCheckAndModify:
 allocate_new_data_superblock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1512
+	ldr	r3, .L1282
 	push	{r4, r5, r6, lr}
 	mov	r6, r0
 	ldrh	r4, [r0]
 	ldrh	r3, [r3]
 	cmp	r3, r4
-	bcs	.L1503
-	movw	r2, #2714
-	ldr	r1, .L1512+4
-	ldr	r0, .L1512+8
+	bcs	.L1273
+	movw	r2, #2760
+	ldr	r1, .L1282+4
+	ldr	r0, .L1282+8
 	bl	printf
-.L1503:
+.L1273:
 	movw	r3, #65535
 	cmp	r4, r3
-	beq	.L1504
-	ldr	r3, .L1512+12
+	beq	.L1274
+	ldr	r3, .L1282+12
 	mov	r0, r4
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
-	cbz	r3, .L1505
+	cbz	r3, .L1275
 	bl	INSERT_DATA_LIST
-.L1504:
-	ldr	r5, .L1512+16
+.L1274:
+	ldr	r5, .L1282+16
 	movw	r2, #65535
 	movs	r3, #1
 	strb	r3, [r6, #8]
 	ldrh	r0, [r5]
 	cmp	r0, r2
-	beq	.L1506
+	beq	.L1276
 	cmp	r4, r0
-	bne	.L1507
-	ldr	r3, .L1512+12
+	bne	.L1277
+	ldr	r3, .L1282+12
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L1508
-.L1507:
+	cbz	r3, .L1278
+.L1277:
 	bl	update_vpc_list
-.L1508:
+.L1278:
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.L1506:
+.L1276:
 	mov	r0, r6
 	bl	allocate_data_superblock
 	bl	l2p_flush
@@ -11351,17 +9606,17 @@ allocate_new_data_superblock:
 	bl	FtlVpcTblFlush
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L1505:
+.L1275:
 	bl	INSERT_FREE_LIST
-	b	.L1504
-.L1513:
+	b	.L1274
+.L1283:
 	.align	2
-.L1512:
+.L1282:
 	.word	.LANCHOR5
-	.word	.LANCHOR174
+	.word	.LANCHOR168
 	.word	.LC1
 	.word	.LANCHOR42
-	.word	.LANCHOR142
+	.word	.LANCHOR131
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
 	.section	.text.FtlProgPages,"ax",%progbits
 	.align	1
@@ -11376,25 +9631,25 @@ FtlProgPages:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r6, #0
-	ldr	r8, .L1528+24
+	ldr	r8, .L1298+24
 	mov	r4, r3
 	movs	r2, #0
 	mov	r5, r0
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
 	mov	r10, r1
 	bl	FlashProgPages
-.L1515:
+.L1285:
 	cmp	r6, r10
-	beq	.L1522
-	ldr	r7, .L1528
-	b	.L1523
-.L1518:
+	beq	.L1292
+	ldr	r7, .L1298
+	b	.L1293
+.L1288:
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r4]
 	cmp	r3, r0
-	bne	.L1516
+	bne	.L1286
 	ldr	r1, [r8]
 	ldrh	r0, [r4, #4]
 	ldrh	r2, [r1, r3, lsl #1]
@@ -11405,13 +9660,13 @@ FtlProgPages:
 	movs	r3, #0
 	strb	r3, [r4, #6]
 	strh	r3, [r4, #4]	@ movhi
-.L1516:
+.L1286:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1517
+	cbnz	r3, .L1287
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-.L1517:
-	ldr	r2, .L1528+4
+.L1287:
+	ldr	r2, .L1298+4
 	ldr	r3, [r2, #96]
 	adds	r3, r3, #1
 	str	r3, [r2, #96]
@@ -11427,20 +9682,20 @@ FtlProgPages:
 	ldrb	r3, [r4, #9]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	FlashProgPages
-.L1523:
+.L1293:
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L1518
-	ldr	r3, .L1528+8
+	beq	.L1288
+	ldr	r3, .L1298+8
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1519
-	movw	r2, #957
-	ldr	r1, .L1528+12
-	ldr	r0, .L1528+16
+	bcc	.L1289
+	mov	r2, #960
+	ldr	r1, .L1298+12
+	ldr	r0, .L1298+16
 	bl	printf
-.L1519:
+.L1289:
 	ldr	r3, [r5, #4]
 	add	r1, sp, #8
 	movs	r2, #1
@@ -11453,43 +9708,43 @@ FtlProgPages:
 	bl	P2V_block_in_plane
 	cmp	fp, #-1
 	mov	r7, r0
-	beq	.L1520
+	beq	.L1290
 	ldr	r3, [r8]
 	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L1521
+	cbnz	r2, .L1291
 	mov	r1, r0
-	ldr	r0, .L1528+20
+	ldr	r0, .L1298+20
 	bl	printf
-.L1521:
+.L1291:
 	mov	r0, r7
 	bl	decrement_vpc_count
-.L1520:
+.L1290:
 	adds	r6, r6, #1
 	adds	r5, r5, #20
-	b	.L1515
-.L1522:
-	ldr	r3, .L1528+8
+	b	.L1285
+.L1292:
+	ldr	r3, .L1298+8
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1514
-	mov	r2, #972
-	ldr	r1, .L1528+12
-	ldr	r0, .L1528+16
+	bcc	.L1284
+	movw	r2, #975
+	ldr	r1, .L1298+12
+	ldr	r0, .L1298+16
 	bl	printf
-.L1514:
+.L1284:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1529:
+.L1299:
 	.align	2
-.L1528:
+.L1298:
 	.word	.LANCHOR19
-	.word	.LANCHOR81
+	.word	.LANCHOR135
 	.word	.LANCHOR3
-	.word	.LANCHOR175
+	.word	.LANCHOR169
 	.word	.LC1
-	.word	.LC111
+	.word	.LC36
 	.word	.LANCHOR42
 	.size	FtlProgPages, .-FtlProgPages
 	.section	.text.FtlGcFreeTempBlock,"ax",%progbits
@@ -11504,55 +9759,32 @@ FtlGcFreeTempBlock:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	movw	r2, #65535
-	ldr	r4, .L1556
-	ldr	r6, .L1556+4
-	ldrh	r5, [r4]
-	ldrh	r1, [r6]
-	cmp	r5, r2
-	bne	.L1531
-.L1541:
-	ldr	r3, .L1556+8
-	movs	r2, #0
-	str	r2, [r3]
 	movw	r3, #65535
-	ldrh	r2, [r4]
-	cmp	r2, r3
-	bne	.L1554
-.L1532:
-	movs	r0, #0
-.L1530:
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1531:
-	cbz	r0, .L1534
-	ldr	r3, .L1556+12
-	ldrh	r0, [r3]
-	cmp	r0, r2
-	beq	.L1535
-.L1536:
-	movs	r1, #2
-.L1534:
-	ldr	r0, .L1556
+	ldr	r0, .L1319
+	ldr	r5, .L1319+4
+	ldrh	r6, [r0]
+	mov	r4, r0
+	cmp	r6, r3
+	beq	.L1301
+	ldr	r3, .L1319+8
+	ldrh	r1, [r3]
 	bl	FtlGcScanTempBlk
 	str	r0, [sp, #12]
 	adds	r0, r0, #1
-	beq	.L1537
-	ldr	r3, .L1556+16
+	beq	.L1301
+	ldr	r3, .L1319+12
 	ldr	r2, [r3]
-	ldrh	r3, [r2, r5, lsl #1]
+	ldrh	r3, [r2, r6, lsl #1]
 	cmp	r3, #4
-	bls	.L1538
+	bls	.L1302
 	subs	r3, r3, #5
 	movs	r0, #1
-	strh	r3, [r2, r5, lsl #1]	@ movhi
+	strh	r3, [r2, r6, lsl #1]	@ movhi
 	bl	FtlEctTblFlush
-.L1538:
-	ldr	r4, .L1556+8
-	ldr	r2, [r4]
-	cbnz	r2, .L1539
-	ldr	r2, .L1556+20
+.L1302:
+	ldr	r3, [r5]
+	cbnz	r3, .L1303
+	ldr	r2, .L1319+16
 	ldr	r0, [sp, #12]
 	ldr	r3, [r2, #96]
 	ubfx	r0, r0, #10, #16
@@ -11560,60 +9792,58 @@ FtlGcFreeTempBlock:
 	str	r3, [r2, #96]
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
-.L1539:
-	movs	r3, #0
-	str	r3, [r4]
-.L1550:
+.L1303:
 	movs	r0, #1
-	b	.L1530
-.L1535:
-	movs	r2, #0
-	strh	r2, [r3]	@ movhi
-	ldr	r3, .L1556+24
-	ldrh	r3, [r3]
-	cmp	r3, #17
-	bhi	.L1536
-	b	.L1534
-.L1537:
-	ldr	r3, .L1556+12
-	ldrh	r2, [r3]
+	movs	r3, #0
+	str	r3, [r5]
+.L1300:
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1301:
+	ldrh	r2, [r4]
+	movs	r3, #0
+	str	r3, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1550
-	b	.L1541
-.L1554:
-	ldrb	r1, [r4, #7]	@ zero_extendqisi2
-	ldrh	r3, [r6]
-	ldr	r5, .L1556+28
-	muls	r3, r1, r3
-	ldrh	r2, [r5]
-	cmp	r2, r3
-	beq	.L1542
+	bne	.L1305
+.L1314:
+	movs	r0, #0
+	b	.L1300
+.L1305:
+	ldr	r6, .L1319+8
+	ldrb	r0, [r4, #7]	@ zero_extendqisi2
+	ldr	r5, .L1319+20
+	ldrh	r2, [r6]
+	ldrh	r1, [r5]
+	muls	r2, r0, r2
+	cmp	r1, r2
+	beq	.L1306
 	movs	r2, #162
-	ldr	r1, .L1556+32
-	ldr	r0, .L1556+36
+	ldr	r1, .L1319+24
+	ldr	r0, .L1319+28
 	bl	printf
-.L1542:
+.L1306:
 	ldrh	r6, [r6]
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	ldr	r2, .L1556+40
+	ldr	r2, .L1319+32
 	ldrh	r0, [r4]
-	ldr	fp, .L1556+68
+	ldr	fp, .L1319+64
 	smulbb	r3, r3, r6
 	ldr	r1, [r2]
 	movs	r6, #0
 	str	r2, [sp, #4]
 	strh	r3, [r1, r0, lsl #1]	@ movhi
-	ldr	r1, .L1556+44
+	ldr	r1, .L1319+36
 	ldrh	r3, [r5]
 	ldr	r0, [r1]
 	add	r3, r3, r0
 	str	r3, [r1]
-.L1543:
+.L1307:
 	ldrh	r2, [r5]
 	uxth	r3, r6
 	cmp	r2, r3
-	bhi	.L1547
+	bhi	.L1311
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	ldr	r3, [sp, #4]
@@ -11621,10 +9851,10 @@ FtlGcFreeTempBlock:
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	beq	.L1548
+	beq	.L1312
 	bl	INSERT_DATA_LIST
-.L1549:
-	ldr	r3, .L1556+48
+.L1313:
+	ldr	r3, .L1319+40
 	movw	r6, #65535
 	strh	r6, [r4]	@ movhi
 	movs	r4, #0
@@ -11632,35 +9862,36 @@ FtlGcFreeTempBlock:
 	strh	r4, [r3]	@ movhi
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	ldr	r3, .L1556+52
+	ldr	r3, .L1319+44
 	strh	r6, [r3]	@ movhi
-	ldr	r3, .L1556+24
+	ldr	r3, .L1319+48
 	ldrh	r2, [r3]
-	ldr	r3, .L1556+56
+	ldr	r3, .L1319+52
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, asr #2
-	ble	.L1532
-	ldr	r3, .L1556+60
+	ble	.L1314
+	ldr	r3, .L1319+56
 	movs	r2, #20
+	mov	r0, r4
 	strh	r2, [r3]	@ movhi
-	b	.L1532
-.L1547:
+	b	.L1300
+.L1311:
 	uxth	r3, r6
 	movs	r7, #12
 	ldr	r2, [fp]
 	muls	r7, r3, r7
-	ldr	r3, .L1556+64
+	ldr	r3, .L1319+60
 	ldr	r8, [r3]
 	add	r10, r8, r7
 	ldr	r1, [r10, #8]
 	cmp	r1, r2
-	bcc	.L1544
+	bcc	.L1308
 	movs	r2, #168
-	ldr	r1, .L1556+32
-	ldr	r0, .L1556+36
+	ldr	r1, .L1319+24
+	ldr	r0, .L1319+28
 	bl	printf
-.L1544:
+.L1308:
 	movs	r2, #0
 	add	r1, sp, #12
 	ldr	r0, [r10, #8]
@@ -11668,7 +9899,7 @@ FtlGcFreeTempBlock:
 	ldr	r2, [sp, #12]
 	ldr	r0, [r8, r7]
 	cmp	r0, r2
-	bne	.L1545
+	bne	.L1309
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	movs	r2, #1
@@ -11677,41 +9908,40 @@ FtlGcFreeTempBlock:
 	ldr	r0, [r10, #8]
 	bl	log2phys
 	mov	r0, r7
-.L1555:
+.L1318:
 	bl	decrement_vpc_count
-.L1546:
+.L1310:
 	adds	r6, r6, #1
-	b	.L1543
-.L1545:
+	b	.L1307
+.L1309:
 	ldr	r3, [r10, #4]
 	cmp	r2, r3
-	beq	.L1546
+	beq	.L1310
 	ldrh	r0, [r4]
-	b	.L1555
-.L1548:
+	b	.L1318
+.L1312:
 	bl	INSERT_FREE_LIST
-	b	.L1549
-.L1557:
+	b	.L1313
+.L1320:
 	.align	2
-.L1556:
+.L1319:
 	.word	.LANCHOR53
+	.word	.LANCHOR133
 	.word	.LANCHOR19
-	.word	.LANCHOR144
-	.word	.LANCHOR162
 	.word	.LANCHOR43
-	.word	.LANCHOR81
-	.word	.LANCHOR48
-	.word	.LANCHOR97
-	.word	.LANCHOR176
+	.word	.LANCHOR135
+	.word	.LANCHOR70
+	.word	.LANCHOR170
 	.word	.LC1
 	.word	.LANCHOR42
-	.word	.LANCHOR67
-	.word	.LANCHOR96
-	.word	.LANCHOR80
-	.word	.LANCHOR78
-	.word	.LANCHOR82
-	.word	.LANCHOR98
-	.word	.LANCHOR61
+	.word	.LANCHOR84
+	.word	.LANCHOR69
+	.word	.LANCHOR144
+	.word	.LANCHOR48
+	.word	.LANCHOR171
+	.word	.LANCHOR100
+	.word	.LANCHOR71
+	.word	.LANCHOR152
 	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
 	.section	.text.FtlGcPageRecovery,"ax",%progbits
 	.align	1
@@ -11725,31 +9955,31 @@ FtlGcPageRecovery:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	ldr	r4, .L1560
-	ldr	r5, .L1560+4
+	ldr	r4, .L1323
+	ldr	r5, .L1323+4
 	ldrh	r1, [r4]
 	mov	r0, r5
 	bl	FtlGcScanTempBlk
 	ldrh	r2, [r5, #2]
 	ldrh	r3, [r4]
 	cmp	r2, r3
-	bcc	.L1558
-	ldr	r0, .L1560+8
+	bcc	.L1321
+	ldr	r0, .L1323+8
 	bl	FtlMapBlkWriteDump_data
 	movs	r0, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r3, .L1560+12
+	ldr	r3, .L1323+12
 	movs	r2, #0
 	str	r2, [r3]
-.L1558:
+.L1321:
 	pop	{r3, r4, r5, pc}
-.L1561:
+.L1324:
 	.align	2
-.L1560:
+.L1323:
 	.word	.LANCHOR19
 	.word	.LANCHOR53
-	.word	.LANCHOR140
-	.word	.LANCHOR144
+	.word	.LANCHOR129
+	.word	.LANCHOR133
 	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
 	.section	.text.FtlPowerLostRecovery,"ax",%progbits
 	.align	1
@@ -11764,13 +9994,13 @@ FtlPowerLostRecovery:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #0
-	ldr	r5, .L1563
-	ldr	r3, .L1563+4
+	ldr	r5, .L1326
+	ldr	r3, .L1326+4
 	mov	r0, r5
 	str	r4, [r3]
 	bl	FtlRecoverySuperblock
 	mov	r0, r5
-	ldr	r5, .L1563+8
+	ldr	r5, .L1326+8
 	bl	FtlSlcSuperblockCheck
 	mov	r0, r5
 	bl	FtlRecoverySuperblock
@@ -11781,11 +10011,11 @@ FtlPowerLostRecovery:
 	bl	decrement_vpc_count
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L1564:
+.L1327:
 	.align	2
-.L1563:
+.L1326:
 	.word	.LANCHOR51
-	.word	.LANCHOR168
+	.word	.LANCHOR157
 	.word	.LANCHOR52
 	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
 	.section	.text.Ftl_gc_temp_data_write_back,"ax",%progbits
@@ -11801,45 +10031,45 @@ Ftl_gc_temp_data_write_back:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r3, #0
-	ldr	r4, .L1572
+	ldr	r4, .L1335
 	movs	r6, #0
 	movs	r7, #20
 	mov	r2, r3
-	ldr	r5, .L1572+4
+	ldr	r5, .L1335+4
 	ldr	r1, [r4]
 	ldr	r0, [r5]
 	bl	FlashProgPages
-.L1566:
+.L1329:
 	ldr	r1, [r4]
 	uxth	r3, r6
 	cmp	r1, r3
-	bhi	.L1569
+	bhi	.L1332
 	ldr	r0, [r5]
 	bl	FtlGcBufFree
-	ldr	r3, .L1572+8
+	ldr	r3, .L1335+8
 	movs	r0, #0
 	str	r0, [r4]
 	ldrh	r3, [r3, #4]
-	cbnz	r3, .L1565
+	cbnz	r3, .L1328
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
-	b	.L1571
-.L1569:
+	b	.L1334
+.L1332:
 	muls	r3, r7, r3
 	ldr	r2, [r5]
 	adds	r6, r6, #1
 	adds	r1, r2, r3
 	ldr	r2, [r2, r3]
 	adds	r3, r2, #1
-	bne	.L1567
-	ldr	r3, .L1572+8
+	bne	.L1330
+	ldr	r3, .L1335+8
 	movs	r5, #0
-	ldr	r0, .L1572+12
+	ldr	r0, .L1335+12
 	ldrh	r4, [r3]
 	ldr	r0, [r0]
 	strh	r5, [r0, r4, lsl #1]	@ movhi
 	strh	r2, [r3]	@ movhi
-	ldr	r2, .L1572+16
+	ldr	r2, .L1335+16
 	ldr	r0, [r1, #4]
 	ldr	r3, [r2, #96]
 	ubfx	r0, r0, #10, #16
@@ -11848,25 +10078,25 @@ Ftl_gc_temp_data_write_back:
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
 	bl	FtlGcPageVarInit
-.L1571:
+.L1334:
 	movs	r0, #1
-.L1565:
+.L1328:
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1567:
+.L1330:
 	ldr	r3, [r1, #12]
 	ldr	r1, [r1, #4]
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
 	bl	FtlGcUpdatePage
-	b	.L1566
-.L1573:
+	b	.L1329
+.L1336:
 	.align	2
-.L1572:
-	.word	.LANCHOR89
-	.word	.LANCHOR113
+.L1335:
+	.word	.LANCHOR62
+	.word	.LANCHOR104
 	.word	.LANCHOR53
 	.word	.LANCHOR42
-	.word	.LANCHOR81
+	.word	.LANCHOR135
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
 	.section	.text.Ftl_get_new_temp_ppa,"ax",%progbits
 	.align	1
@@ -11881,180 +10111,38 @@ Ftl_get_new_temp_ppa:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movw	r3, #65535
-	ldr	r4, .L1577
+	ldr	r4, .L1340
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	beq	.L1575
+	beq	.L1338
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1576
-.L1575:
+	cbnz	r3, .L1339
+.L1338:
 	movs	r0, #0
 	movs	r5, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r0, .L1577
+	ldr	r0, .L1340
 	strb	r5, [r4, #8]
 	bl	allocate_data_superblock
-	ldr	r3, .L1577+4
+	ldr	r3, .L1340+4
 	strh	r5, [r3]	@ movhi
-	ldr	r3, .L1577+8
+	ldr	r3, .L1340+8
 	strh	r5, [r3]	@ movhi
 	bl	l2p_flush
 	mov	r0, r5
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1576:
-	ldr	r0, .L1577
+.L1339:
+	ldr	r0, .L1340
 	pop	{r3, r4, r5, lr}
 	b	get_new_active_ppa
-.L1578:
+.L1341:
 	.align	2
-.L1577:
+.L1340:
 	.word	.LANCHOR53
-	.word	.LANCHOR96
-	.word	.LANCHOR97
+	.word	.LANCHOR69
+	.word	.LANCHOR70
 	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
-	.section	.text.FtlSysBlkInit,"ax",%progbits
-	.align	1
-	.global	FtlSysBlkInit
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlSysBlkInit, %function
-FtlSysBlkInit:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	movs	r3, #0
-	ldr	r6, .L1594
-	strh	r3, [r6]	@ movhi
-	ldr	r3, .L1594+4
-	ldrh	r0, [r3]
-	bl	FtlFreeSysBlkQueueInit
-	bl	FtlScanSysBlk
-	ldr	r3, .L1594+8
-	ldrh	r2, [r3]
-	movw	r3, #65535
-	cmp	r2, r3
-	bne	.L1580
-.L1582:
-	mov	r7, #-1
-.L1579:
-	mov	r0, r7
-	pop	{r3, r4, r5, r6, r7, pc}
-.L1580:
-	bl	FtlLoadSysInfo
-	mov	r7, r0
-	cmp	r0, #0
-	bne	.L1582
-	bl	FtlLoadMapInfo
-	bl	FtlLoadVonderInfo
-	bl	Ftl_load_ext_data
-	bl	FtlLoadEctTbl
-	bl	FtlFreeSysBLkSort
-	bl	SupperBlkListInit
-	bl	FtlPowerLostRecovery
-	movs	r0, #1
-	bl	FtlUpdateVaildLpn
-	ldr	r3, .L1594+12
-	movs	r0, #12
-	ldrh	r1, [r3]
-	ldr	r3, .L1594+16
-	ldr	r2, [r3]
-	mov	r3, r7
-.L1583:
-	cmp	r3, r1
-	bge	.L1588
-	mla	r4, r0, r3, r2
-	ldr	r4, [r4, #4]
-	cmp	r4, #0
-	bge	.L1584
-.L1588:
-	ldr	r5, .L1594+20
-	cmp	r3, r1
-	ldr	r4, .L1594+24
-	ldrh	r2, [r5, #28]
-	add	r2, r2, #1
-	strh	r2, [r5, #28]	@ movhi
-	bge	.L1593
-.L1585:
-	ldr	r6, .L1594+28
-	ldr	r0, .L1594+24
-	bl	FtlSuperblockPowerLostFix
-	mov	r0, r6
-	bl	FtlSuperblockPowerLostFix
-	ldr	r3, .L1594+32
-	ldrh	r1, [r4]
-	ldrh	r0, [r4, #4]
-	ldr	r2, [r3]
-	ldrh	r3, [r2, r1, lsl #1]
-	subs	r3, r3, r0
-	ldr	r0, .L1594+36
-	strh	r3, [r2, r1, lsl #1]	@ movhi
-	ldrh	ip, [r6]
-	ldrh	r3, [r0]
-	ldrh	lr, [r6, #4]
-	strh	r3, [r4, #2]	@ movhi
-	movs	r3, #0
-	strb	r3, [r4, #6]
-	strh	r3, [r4, #4]	@ movhi
-	ldrh	r1, [r2, ip, lsl #1]
-	sub	r1, r1, lr
-	strh	r1, [r2, ip, lsl #1]	@ movhi
-	strb	r3, [r6, #6]
-	strh	r3, [r6, #4]	@ movhi
-	ldrh	r3, [r5, #30]
-	ldrh	r2, [r0]
-	adds	r3, r3, #1
-	strh	r2, [r6, #2]	@ movhi
-	strh	r3, [r5, #30]	@ movhi
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
-	bl	FtlVpcTblFlush
-	b	.L1589
-.L1584:
-	adds	r3, r3, #1
-	b	.L1583
-.L1593:
-	ldrh	r3, [r6]
-	cmp	r3, #0
-	bne	.L1585
-.L1589:
-	bl	FtlVpcCheckAndModify
-	ldrh	r0, [r4]
-	movw	r3, #65535
-	cmp	r0, r3
-	beq	.L1579
-	ldrh	r3, [r4, #4]
-	cmp	r3, #0
-	bne	.L1579
-	ldr	r4, .L1594+28
-	ldrh	r3, [r4, #4]
-	cmp	r3, #0
-	bne	.L1579
-	bl	FtlGcRefreshBlock
-	ldrh	r0, [r4]
-	bl	FtlGcRefreshBlock
-	bl	FtlVpcTblFlush
-	ldr	r0, .L1594+24
-	bl	allocate_new_data_superblock
-	mov	r0, r4
-	bl	allocate_new_data_superblock
-	b	.L1579
-.L1595:
-	.align	2
-.L1594:
-	.word	.LANCHOR167
-	.word	.LANCHOR4
-	.word	.LANCHOR79
-	.word	.LANCHOR33
-	.word	.LANCHOR55
-	.word	.LANCHOR39
-	.word	.LANCHOR51
-	.word	.LANCHOR52
-	.word	.LANCHOR42
-	.word	.LANCHOR19
-	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.section	.text.rk_ftl_garbage_collect,"ax",%progbits
 	.align	1
 	.global	rk_ftl_garbage_collect
@@ -12066,544 +10154,343 @@ FtlSysBlkInit:
 rk_ftl_garbage_collect:
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1719
+	ldr	r3, .L1424
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #48
-	str	r0, [sp, #8]
+	sub	sp, sp, #40
+	str	r0, [sp, #20]
 	ldr	r0, [r3]
 	cmp	r0, #0
-	bne	.L1673
-	ldr	r3, .L1719+4
+	bne	.L1394
+	ldr	r3, .L1424+4
 	ldrh	r3, [r3]
 	cmp	r3, #47
-	bls	.L1596
-	ldr	r3, .L1719+8
-	ldrh	r2, [r3]
-	movw	r3, #65535
-	cmp	r2, r3
-	bne	.L1598
-.L1601:
-	ldr	r3, .L1719+12
+	bls	.L1342
+	ldr	r3, .L1424+8
 	movw	r4, #65535
 	ldrh	r0, [r3]
 	cmp	r0, r4
-	bne	.L1599
-.L1600:
-	bl	FtlReadRefresh
-	ldr	r2, .L1719+16
-	movw	r5, #65535
-	ldr	r6, .L1719+20
-	ldr	r1, [sp, #8]
-	ldr	r3, [r2]
-	ldrh	r0, [r6]
-	adds	r3, r3, #1
-	add	r3, r3, r1, lsl #7
-	cmp	r0, r5
-	str	r3, [r2]
-	bne	.L1602
-	ldr	r1, .L1719+24
-	ldrh	r1, [r1]
-	cmp	r1, r0
-	bne	.L1603
-	ldr	r0, .L1719+28
-	ldrh	r8, [r0]
-	cmp	r8, r1
-	bne	.L1604
-	ldr	r7, .L1719+32
-	ldrh	r1, [r7]
-	cmp	r1, #24
-	ite	cc
-	movcc	r1, #5120
-	movcs	r1, #1024
-	cmp	r3, r1
-	bls	.L1604
-	ldr	r3, .L1719+36
-	movs	r4, #0
-	str	r4, [r2]
-	strh	r4, [r3]	@ movhi
-	bl	GetSwlReplaceBlock
-	cmp	r0, r8
-	mov	r5, r0
-	bne	.L1677
-	ldr	r8, .L1719+96
-	ldrh	r2, [r7]
-	ldrh	r3, [r8]
-	cmp	r2, r3
-	bcs	.L1607
-	movs	r0, #64
-	bl	List_get_gc_head_node
-	uxth	r3, r0
-	cmp	r3, r5
-	beq	.L1609
-	mov	r0, r3
-	ldr	r3, .L1719+40
-	ldr	r3, [r3]
-	ldrh	r3, [r3, r0, lsl #1]
-	cmp	r3, #7
-	bhi	.L1610
-	mov	r0, r4
-	bl	List_get_gc_head_node
-	uxth	r4, r0
-	movs	r3, #128
-	strh	r3, [r8]	@ movhi
-	cmp	r4, r5
-	bne	.L1606
-.L1609:
-	bl	FtlGcReFreshBadBlk
-	ldr	r3, [sp, #8]
+	beq	.L1344
+	ldr	r1, .L1424+12
+	ldrh	r2, [r1]
+	cmp	r2, r4
+	itt	eq
+	strheq	r0, [r1]	@ movhi
+	strheq	r2, [r3]	@ movhi
+.L1344:
+	ldr	r3, [sp, #20]
 	cmp	r3, #0
-	bne	.L1612
-	movw	r3, #65535
-	cmp	r5, r3
-	bne	.L1612
-.L1671:
-	ldr	r3, .L1719+32
+	bne	.L1396
+	ldr	r3, .L1424+16
 	ldrh	r3, [r3]
 	cmp	r3, #24
-	bhi	.L1678
-	ldr	r2, .L1719+44
+	bhi	.L1397
+	ldr	r2, .L1424+20
 	cmp	r3, #16
 	ldrh	r4, [r2]
-	bls	.L1614
+	bls	.L1347
 	lsrs	r4, r4, #5
-.L1613:
-	ldr	r1, .L1719+48
-	ldrh	r2, [r1]
-	cmp	r2, r3
-	mov	r2, r1
-	bcs	.L1617
-	ldr	r3, .L1719+24
+.L1346:
+	ldr	r2, .L1424+24
+	ldrh	r1, [r2]
+	cmp	r1, r3
+	mov	r1, r2
+	bcs	.L1350
+	ldr	r3, .L1424+28
 	movw	r0, #65535
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L1618
-	ldr	r0, .L1719+28
+	bne	.L1351
+	ldr	r0, .L1424+12
 	ldrh	r0, [r0]
 	cmp	r0, r3
-	bne	.L1618
-	ldr	r3, .L1719+36
+	bne	.L1351
+	ldr	r3, .L1424+32
 	ldrh	r0, [r3]
-	cbnz	r0, .L1619
-	ldr	r3, .L1719+52
-	ldr	r4, .L1719+56
+	cbnz	r0, .L1352
+	ldr	r3, .L1424+36
+	ldr	r4, .L1424+40
 	ldr	r3, [r3]
 	ldr	r4, [r4]
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, lsr #2
-	bcs	.L1620
-.L1619:
-	ldr	r3, .L1719+60
+	bcs	.L1353
+.L1352:
+	ldr	r3, .L1424+44
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
-	strh	r3, [r2]	@ movhi
-.L1621:
-	ldr	r3, .L1719+64
+	strh	r3, [r1]	@ movhi
+.L1354:
+	ldr	r3, .L1424+48
 	movs	r2, #0
 	str	r2, [r3]
-.L1596:
-	add	sp, sp, #48
+.L1342:
+	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1598:
-	ldr	r2, .L1719+24
-	ldrh	r2, [r2]
-	cmp	r2, r3
-	beq	.L1601
-	movs	r0, #1
-	bl	FtlGcFreeTempBlock
-	cmp	r0, #0
-	beq	.L1601
-	movs	r0, #1
-	b	.L1596
-.L1599:
-	ldr	r1, .L1719+28
-	ldrh	r2, [r1]
-	cmp	r2, r4
-	itt	eq
-	strheq	r0, [r1]	@ movhi
-	strheq	r2, [r3]	@ movhi
-	b	.L1600
-.L1610:
-	movs	r3, #64
-.L1713:
-	strh	r3, [r8]	@ movhi
-	b	.L1609
-.L1607:
-	movs	r3, #80
-	b	.L1713
-.L1677:
-	mov	r4, r0
-.L1606:
-	ldr	r3, .L1719+40
-	mov	r5, r4
-	ldr	r1, .L1719+48
-	ldrh	r2, [r7]
-	ldr	r3, [r3]
-	ldrh	r1, [r1]
-	ldr	r0, .L1719+68
-	ldrh	r3, [r3, r4, lsl #1]
-	str	r1, [sp, #4]
-	ldr	r1, .L1719+72
-	ldr	r1, [r1]
-	ldrh	r1, [r1, r4, lsl #1]
-	str	r1, [sp]
-	mov	r1, r4
-	bl	printf
-	b	.L1609
-.L1614:
+.L1347:
 	cmp	r3, #12
-	bls	.L1615
+	bls	.L1348
 	lsrs	r4, r4, #4
-	b	.L1613
-.L1615:
+	b	.L1346
+.L1348:
 	cmp	r3, #8
-	bls	.L1613
+	bls	.L1346
 	lsrs	r4, r4, #2
-	b	.L1613
-.L1678:
+	b	.L1346
+.L1397:
 	movs	r4, #1
-	b	.L1613
-.L1620:
+	b	.L1346
+.L1353:
 	movs	r3, #18
-	strh	r3, [r1]	@ movhi
-	b	.L1621
-.L1618:
-	ldr	r3, .L1719+60
+	strh	r3, [r2]	@ movhi
+	b	.L1354
+.L1351:
+	ldr	r3, .L1424+44
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
-	strh	r3, [r2]	@ movhi
-.L1617:
-	ldr	r3, .L1719+76
+	strh	r3, [r1]	@ movhi
+.L1350:
+	ldr	r3, .L1424+52
 	ldrh	r3, [r3]
-	cbz	r3, .L1679
+	cbz	r3, .L1345
 	adds	r4, r4, #32
 	uxth	r4, r4
-.L1679:
-	movw	r5, #65535
-.L1623:
-	ldrh	r3, [r6]
-	movw	r2, #65535
-	cmp	r3, r2
-	bne	.L1632
-	cmp	r5, r3
-	beq	.L1633
-	strh	r5, [r6]	@ movhi
-.L1634:
-	ldrh	r0, [r6]
-	movw	r7, #65535
+.L1345:
+	ldr	r5, .L1424+56
+	movw	r3, #65535
+	ldrh	r2, [r5]
+	cmp	r2, r3
+	bne	.L1357
+	ldr	r3, .L1424+12
+	ldrh	r1, [r3]
+	cmp	r1, r2
+	beq	.L1358
+	ldr	r0, .L1424+60
+	ldr	r0, [r0]
+	ldrh	r1, [r0, r1, lsl #1]
+	cbnz	r1, .L1359
+	strh	r2, [r3]	@ movhi
+.L1359:
+	ldrh	r2, [r3]
+	strh	r2, [r5]	@ movhi
+	movw	r2, #65535
+	strh	r2, [r3]	@ movhi
+.L1358:
+	ldrh	r0, [r5]
+	movw	r6, #65535
 	movs	r3, #0
-	strb	r3, [r6, #8]
-	cmp	r0, r7
-	beq	.L1632
+	strb	r3, [r5, #8]
+	cmp	r0, r6
+	beq	.L1357
 	bl	IsBlkInGcList
-	cbz	r0, .L1637
-	strh	r7, [r6]	@ movhi
-.L1637:
-	ldrh	r2, [r6]
+	cbz	r0, .L1361
+	strh	r6, [r5]	@ movhi
+.L1361:
+	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1632
-	ldr	r0, .L1719+20
+	beq	.L1357
+	ldr	r0, .L1424+56
 	bl	make_superblock
-	ldr	r2, .L1719+80
+	ldr	r2, .L1424+64
 	movs	r3, #0
-	strh	r3, [r6, #2]	@ movhi
-	strb	r3, [r6, #6]
+	strh	r3, [r5, #2]	@ movhi
+	strb	r3, [r5, #6]
 	strh	r3, [r2]	@ movhi
-	ldr	r3, .L1719+40
-	ldrh	r2, [r6]
+	ldr	r3, .L1424+60
+	ldrh	r2, [r5]
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r2, lsl #1]
-	ldr	r3, .L1719+84
+	ldr	r3, .L1424+68
 	strh	r2, [r3]	@ movhi
-.L1632:
-	ldr	r2, .L1719+88
-	ldrh	r3, [r6]
+.L1357:
+	ldr	r2, .L1424+72
+	ldrh	r3, [r5]
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L1638
-	ldr	r2, .L1719+92
+	beq	.L1362
+	ldr	r2, .L1424+76
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bne	.L1639
-.L1638:
+	bne	.L1363
+.L1362:
 	movw	r3, #65535
-	strh	r3, [r6]	@ movhi
-.L1639:
-	ldr	fp, .L1719+20
-	mov	r6, fp
-.L1669:
-	ldrh	r2, [fp]
+	strh	r3, [r5]	@ movhi
+.L1363:
+	ldr	r5, .L1424+56
+	mov	r6, r5
+.L1393:
+	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1640
-	ldr	r10, .L1719+100
+	bne	.L1364
+	ldr	fp, .L1424+88
 	movs	r2, #0
-	ldr	r3, .L1719+64
-	mov	r8, r10
+	ldr	r3, .L1424+48
+	mov	r8, fp
 	str	r2, [r3]
-.L1641:
-	ldrh	r7, [r10]
+.L1365:
+	ldrh	r7, [fp]
 	mov	r0, r7
 	bl	List_get_gc_head_node
 	uxth	r3, r0
 	movw	r1, #65535
 	cmp	r3, r1
 	strh	r3, [r6]	@ movhi
-	bne	.L1642
+	bne	.L1366
 	movs	r3, #0
 	movs	r0, #8
-	strh	r3, [r10]	@ movhi
-	b	.L1596
-.L1720:
-	.align	2
-.L1719:
-	.word	.LANCHOR108
-	.word	.LANCHOR45
-	.word	.LANCHOR162
-	.word	.LANCHOR100
-	.word	.LANCHOR84
-	.word	.LANCHOR80
-	.word	.LANCHOR53
-	.word	.LANCHOR99
-	.word	.LANCHOR48
-	.word	.LANCHOR177
-	.word	.LANCHOR42
-	.word	.LANCHOR19
-	.word	.LANCHOR82
-	.word	.LANCHOR61
-	.word	.LANCHOR59
-	.word	.LANCHOR78
-	.word	.LANCHOR87
-	.word	.LC112
-	.word	.LANCHOR43
-	.word	.LANCHOR101
-	.word	.LANCHOR178
-	.word	.LANCHOR179
-	.word	.LANCHOR51
-	.word	.LANCHOR52
-	.word	.LANCHOR83
-	.word	.LANCHOR85
-.L1624:
-	ldr	r3, .L1721
-	movs	r2, #0
-	ldr	r5, .L1721+4
-	ldr	r4, .L1721+8
-	str	r2, [r3]
-	ldrh	r2, [r5]
-	ldrh	r3, [r4]
-	ldr	r7, .L1721+12
-	cmp	r2, r3
-	bls	.L1625
-	ldrh	r3, [r7]
-	cbnz	r3, .L1626
-	ldr	r3, .L1721+16
-	ldr	r2, .L1721+20
-	ldr	r3, [r3]
-	ldr	r2, [r2]
-	add	r3, r3, r3, lsl #1
-	cmp	r2, r3, lsr #2
-	bcs	.L1627
-.L1626:
-	ldr	r3, .L1721+24
-	ldrh	r3, [r3]
-	add	r3, r3, r3, lsl #1
-	asrs	r3, r3, #2
-.L1714:
-	strh	r3, [r4]	@ movhi
-	bl	FtlReadRefresh
-	movs	r0, #0
-	bl	List_get_gc_head_node
-	ldr	r3, .L1721+28
-	uxth	r0, r0
-	ldr	r3, [r3]
-	ldrh	r3, [r3, r0, lsl #1]
-	cmp	r3, #4
-	bls	.L1625
-.L1717:
-	ldrh	r0, [r7]
-	b	.L1596
-.L1627:
-	movs	r3, #18
-	b	.L1714
-.L1625:
-	ldrh	r0, [r7]
-	cmp	r0, #0
-	bne	.L1629
-	ldr	r3, .L1721+24
-	ldrh	r8, [r3]
-	add	r2, r8, r8, lsl #1
-	asrs	r2, r2, #2
-	strh	r2, [r4]	@ movhi
-	bl	List_get_gc_head_node
-	ldr	r3, .L1721+28
-	uxth	r0, r0
-	ldr	r2, .L1721+32
-	ldr	r3, [r3]
-	ldrh	r2, [r2]
-	ldrh	r1, [r3, r0, lsl #1]
-	ldr	r3, .L1721+36
-	ldrh	r3, [r3]
-	muls	r2, r3, r2
-	cmp	r1, r2, asr #1
-	ble	.L1630
-	ldrh	r2, [r5]
-	add	r3, r8, #-1
-	cmp	r2, r3
-	blt	.L1630
-	bl	FtlReadRefresh
-	b	.L1717
-.L1630:
-	cmp	r1, #0
-	bne	.L1629
-	movw	r0, #65535
-	bl	decrement_vpc_count
-	ldrh	r0, [r5]
-	adds	r0, r0, #1
-	b	.L1596
-.L1633:
-	ldr	r3, .L1721+40
-	ldrh	r2, [r3]
-	cmp	r2, r5
-	beq	.L1634
-	ldr	r1, .L1721+28
-	ldr	r1, [r1]
-	ldrh	r2, [r1, r2, lsl #1]
-	cbnz	r2, .L1635
-	strh	r5, [r3]	@ movhi
-.L1635:
-	ldrh	r2, [r3]
-	strh	r2, [r6]	@ movhi
-	movw	r2, #65535
-	strh	r2, [r3]	@ movhi
-	b	.L1634
-.L1642:
-	str	r0, [sp, #16]
+	strh	r3, [fp]	@ movhi
+	b	.L1342
+.L1396:
+	movs	r4, #1
+	b	.L1345
+.L1366:
+	str	r0, [sp, #8]
 	mov	r0, r3
-	str	r3, [sp, #12]
+	str	r3, [sp, #4]
 	adds	r7, r7, #1
 	bl	IsBlkInGcList
-	ldr	r3, [sp, #12]
-	ldr	r2, [sp, #16]
-	cbz	r0, .L1643
-	strh	r7, [r10]	@ movhi
-	b	.L1641
-.L1643:
-	ldr	lr, .L1721+28
+	ldr	r3, [sp, #4]
+	ldr	r2, [sp, #8]
+	cbz	r0, .L1367
+	strh	r7, [fp]	@ movhi
+	b	.L1365
+.L1367:
 	uxth	r0, r2
+	ldr	r2, .L1424+20
+	ldr	r10, .L1424+60
 	uxth	r7, r7
-	ldr	r2, [lr]
-	strh	r7, [r10]	@ movhi
-	str	lr, [sp, #16]
-	ldrh	ip, [r2, r0, lsl #1]
-	str	r2, [sp, #12]
-	ldr	r2, .L1721+44
-	ldrh	r2, [r2]
-	mov	r1, r2
-	ldr	r2, .L1721+32
+	ldrh	lr, [r2]
+	ldr	r2, .L1424+80
+	ldr	r1, [r10]
+	strh	r7, [fp]	@ movhi
 	ldrh	r2, [r2]
-	muls	r2, r1, r2
+	ldrh	ip, [r1, r0, lsl #1]
+	mul	r2, r2, lr
 	cmp	ip, r2, asr #1
-	bgt	.L1645
+	bgt	.L1369
 	cmp	r7, #48
-	bls	.L1646
+	bls	.L1370
 	cmp	ip, #8
-	bls	.L1646
-	ldr	r7, .L1721+48
+	bls	.L1370
+	ldr	r7, .L1424+84
 	ldrh	r7, [r7]
 	cmp	r7, #35
-	bhi	.L1646
-.L1645:
+	bhi	.L1370
+.L1369:
 	movs	r7, #0
 	strh	r7, [r8]	@ movhi
-.L1646:
-	ldr	r1, [sp, #12]
+.L1370:
 	ldrh	r1, [r1, r0, lsl #1]
 	cmp	r2, r1
-	bgt	.L1647
-	movw	r2, #65535
-	cmp	r5, r2
-	bne	.L1647
+	bgt	.L1371
 	ldrh	r2, [r8]
 	cmp	r2, #3
-	bhi	.L1647
+	bhi	.L1371
+	movw	r3, #65535
+	strh	r3, [r6]	@ movhi
 	movs	r3, #0
-	strh	r5, [r6]	@ movhi
 	strh	r3, [r8]	@ movhi
-.L1718:
-	ldr	r3, .L1721+12
+.L1423:
+	ldr	r3, .L1424+32
 	ldrh	r0, [r3]
-	b	.L1596
-.L1647:
-	cbnz	r1, .L1648
+	b	.L1342
+.L1371:
+	cbnz	r1, .L1372
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	ldrh	r3, [r8]
 	adds	r3, r3, #1
 	strh	r3, [r8]	@ movhi
-	b	.L1641
-.L1648:
+	b	.L1365
+.L1425:
+	.align	2
+.L1424:
+	.word	.LANCHOR94
+	.word	.LANCHOR45
+	.word	.LANCHOR73
+	.word	.LANCHOR72
+	.word	.LANCHOR48
+	.word	.LANCHOR19
+	.word	.LANCHOR100
+	.word	.LANCHOR53
+	.word	.LANCHOR172
+	.word	.LANCHOR152
+	.word	.LANCHOR59
+	.word	.LANCHOR171
+	.word	.LANCHOR95
+	.word	.LANCHOR74
+	.word	.LANCHOR144
+	.word	.LANCHOR42
+	.word	.LANCHOR173
+	.word	.LANCHOR174
+	.word	.LANCHOR51
+	.word	.LANCHOR52
+	.word	.LANCHOR3
+	.word	.LANCHOR69
+	.word	.LANCHOR102
+.L1372:
 	movs	r2, #0
 	strb	r2, [r6, #8]
-	ldr	r2, .L1721+52
+	ldr	r2, .L1426
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bne	.L1649
+	bne	.L1373
 	mov	r2, #700
-	ldr	r1, .L1721+56
-	ldr	r0, .L1721+60
+	ldr	r1, .L1426+4
+	ldr	r0, .L1426+8
 	bl	printf
-.L1649:
-	ldr	r3, .L1721+64
+.L1373:
+	ldr	r3, .L1426+12
 	ldrh	r2, [r6]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1650
+	bne	.L1374
 	movw	r2, #701
-	ldr	r1, .L1721+56
-	ldr	r0, .L1721+60
+	ldr	r1, .L1426+4
+	ldr	r0, .L1426+8
 	bl	printf
-.L1650:
-	ldr	r3, .L1721+68
+.L1374:
+	ldr	r3, .L1426+16
 	ldrh	r2, [r6]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1651
+	bne	.L1375
 	movw	r2, #702
-	ldr	r1, .L1721+56
-	ldr	r0, .L1721+60
+	ldr	r1, .L1426+4
+	ldr	r0, .L1426+8
 	bl	printf
-.L1651:
-	mov	r0, fp
+.L1375:
+	mov	r0, r5
 	bl	make_superblock
-	ldr	r2, .L1721+72
+	ldr	r2, .L1426+20
 	movs	r3, #0
 	ldrh	r1, [r6]
 	strh	r3, [r2]	@ movhi
-	ldr	r2, [sp, #16]
-	ldr	r2, [r2]
+	ldr	r2, [r10]
 	ldrh	r1, [r2, r1, lsl #1]
-	ldr	r2, .L1721+76
+	ldr	r2, .L1426+24
 	strh	r3, [r6, #2]	@ movhi
 	strb	r3, [r6, #6]
 	strh	r1, [r2]	@ movhi
-.L1640:
-	ldr	r3, .L1721+80
+.L1364:
+	ldr	r3, .L1426+28
 	movs	r2, #1
 	str	r2, [r3]
-	ldr	r3, .L1721+44
+	ldr	r3, .L1426+32
 	ldrh	r3, [r3]
-	str	r3, [sp, #20]
-	ldr	r3, [sp, #8]
-	cbz	r3, .L1652
-	ldr	r3, .L1721+32
-	ldr	r2, [sp, #20]
+	str	r3, [sp, #12]
+	ldr	r3, [sp, #20]
+	cbz	r3, .L1376
+	ldr	r3, .L1426+36
+	ldr	r2, [sp, #12]
 	ldrh	r1, [r6]
 	ldrh	r3, [r3]
 	muls	r3, r2, r3
-	ldr	r2, .L1721+28
+	ldr	r2, .L1426+40
 	ldr	r2, [r2]
 	ldrh	r2, [r2, r1, lsl #1]
 	subs	r3, r3, r2
@@ -12611,9 +10498,10 @@ rk_ftl_garbage_collect:
 	addmi	r3, r3, #3
 	add	r4, r4, r3, asr #2
 	uxth	r4, r4
-.L1652:
+.L1376:
 	ldrh	r3, [r6, #2]
-	ldr	r1, [sp, #20]
+	ldr	r1, [sp, #12]
+	ldr	fp, .L1426+64
 	adds	r2, r3, r4
 	cmp	r2, r1
 	itt	gt
@@ -12622,358 +10510,217 @@ rk_ftl_garbage_collect:
 	mov	r3, #0
 	it	gt
 	uxthgt	r4, r4
-.L1716:
-	str	r3, [sp, #28]
-	ldrh	r3, [sp, #28]
+	str	r3, [sp, #8]
+.L1379:
+	ldrh	r3, [sp, #8]
 	cmp	r4, r3
-	bls	.L1663
-	ldr	r3, .L1721+32
-	movw	lr, #65535
-	ldrh	r1, [fp, #2]
+	bls	.L1387
+	ldr	r3, .L1426+36
+	movw	r10, #65535
+	ldrh	r1, [r5, #2]
 	mov	ip, #20
-	ldr	r7, .L1721+84
-	ldrh	r8, [r3]
-	ldr	r3, .L1721+88
-	ldr	r0, [r3]
-	ldr	r3, [sp, #28]
+	ldr	r0, [fp]
+	ldrh	lr, [r3]
+	ldr	r3, [sp, #8]
+	ldr	r7, .L1426+44
 	adds	r3, r1, r3
 	str	r3, [sp, #16]
 	movs	r3, #0
-	str	r3, [sp, #12]
-	b	.L1664
-.L1657:
+	str	r3, [sp, #4]
+	b	.L1388
+.L1381:
 	ldrh	r2, [r7, #2]!
-	cmp	r2, lr
-	beq	.L1656
-	ldr	r1, [sp, #12]
-	mla	r10, ip, r1, r0
+	cmp	r2, r10
+	beq	.L1380
+	ldr	r1, [sp, #4]
+	mla	r8, ip, r1, r0
 	ldr	r1, [sp, #16]
 	orr	r2, r1, r2, lsl #10
-	str	r2, [r10, #4]
-	ldr	r2, [sp, #12]
+	str	r2, [r8, #4]
+	ldr	r2, [sp, #4]
 	adds	r2, r2, #1
 	uxth	r2, r2
-	str	r2, [sp, #12]
-.L1656:
+	str	r2, [sp, #4]
+.L1380:
 	adds	r3, r3, #1
-.L1664:
+.L1388:
 	uxth	r2, r3
-	cmp	r8, r2
-	bhi	.L1657
-	ldrb	r2, [fp, #8]	@ zero_extendqisi2
-	ldr	r1, [sp, #12]
+	cmp	lr, r2
+	bhi	.L1381
+	ldrb	r2, [r5, #8]	@ zero_extendqisi2
+	ldr	r1, [sp, #4]
 	bl	FlashReadPages
 	movs	r3, #0
-.L1715:
-	str	r3, [sp, #24]
-	ldr	r2, [sp, #12]
-	ldrh	r3, [sp, #24]
+.L1422:
+	str	r3, [sp, #16]
+	ldr	r2, [sp, #4]
+	ldrh	r3, [sp, #16]
 	cmp	r2, r3
-	bhi	.L1662
-	ldr	r3, [sp, #28]
+	bhi	.L1386
+	ldr	r3, [sp, #8]
 	adds	r3, r3, #1
-	b	.L1716
-.L1722:
-	.align	2
-.L1721:
-	.word	.LANCHOR87
-	.word	.LANCHOR48
-	.word	.LANCHOR82
-	.word	.LANCHOR177
-	.word	.LANCHOR61
-	.word	.LANCHOR59
-	.word	.LANCHOR78
-	.word	.LANCHOR42
-	.word	.LANCHOR3
-	.word	.LANCHOR20
-	.word	.LANCHOR99
-	.word	.LANCHOR19
-	.word	.LANCHOR96
-	.word	.LANCHOR51
-	.word	.LANCHOR180
-	.word	.LC1
-	.word	.LANCHOR52
-	.word	.LANCHOR53
-	.word	.LANCHOR178
-	.word	.LANCHOR179
-	.word	.LANCHOR108
-	.word	.LANCHOR80+14
-	.word	.LANCHOR93
-.L1662:
-	ldr	r3, [sp, #24]
+	str	r3, [sp, #8]
+	b	.L1379
+.L1386:
+	ldr	r3, [sp, #16]
 	movs	r7, #20
 	muls	r7, r3, r7
-	ldr	r3, .L1723
-	ldr	r3, [r3]
+	ldr	r3, [fp]
 	adds	r2, r3, r7
 	ldr	r3, [r3, r7]
 	adds	r3, r3, #1
-	beq	.L1659
-	ldr	r3, [r2, #12]
-	ldrh	r2, [r3]
-	str	r3, [sp, #16]
+	beq	.L1383
+	ldr	r8, [r2, #12]
 	movw	r3, #61589
+	ldrh	r2, [r8]
 	cmp	r2, r3
-	bne	.L1659
-	ldr	r3, [sp, #16]
-	ldr	r8, [r3, #8]
-	cmp	r8, #-1
-	bne	.L1660
+	bne	.L1383
+	ldr	r10, [r8, #8]
+	cmp	r10, #-1
+	bne	.L1384
 	mov	r2, #736
-	ldr	r1, .L1723+4
-	ldr	r0, .L1723+8
+	ldr	r1, .L1426+4
+	ldr	r0, .L1426+8
 	bl	printf
-.L1660:
+.L1384:
 	movs	r2, #0
-	add	r1, sp, #44
-	mov	r0, r8
+	add	r1, sp, #36
+	mov	r0, r10
 	bl	log2phys
-	ldr	r3, .L1723
-	ldr	r1, [r3]
-	ldr	r3, [sp, #44]
-	add	r1, r1, r7
-	ldr	r2, [r1, #4]
+	ldr	r0, [fp]
+	ldr	r3, [sp, #36]
+	add	r0, r0, r7
+	ldr	r2, [r0, #4]
 	cmp	r2, r3
-	bne	.L1659
-	ldr	r3, .L1723+12
-	mov	r10, #20
-	ldr	r2, .L1723+12
-	ldr	r8, .L1723+32
-	ldrh	r3, [r3]
-	ldr	r1, [r1, #16]
+	bne	.L1383
+	ldr	r2, .L1426+20
+	ldr	r10, .L1426+56
+	ldr	r1, .L1426+48
+	ldrh	r3, [r2]
+	str	r1, [sp, #28]
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L1723+16
-	ldr	r3, [r8]
-	ldr	r0, [r2]
-	str	r2, [sp, #36]
-	mla	r3, r10, r3, r0
-	str	r1, [r3, #16]
-	str	r3, [sp, #32]
+	ldr	r2, [r1]
+	movs	r1, #20
+	ldr	r3, [r10]
+	mla	r3, r1, r3, r2
+	ldr	r2, [r0, #16]
+	str	r2, [r3, #16]
+	str	r3, [sp, #24]
 	bl	Ftl_get_new_temp_ppa
-	ldr	r3, [sp, #32]
-	ldr	r2, [sp, #36]
-	ldr	r1, [sp, #16]
+	ldr	r3, [sp, #24]
+	ldr	r1, [sp, #28]
 	str	r0, [r3, #4]
-	ldr	r2, [r2]
-	ldr	r3, [r8]
-	mla	r10, r10, r3, r2
-	ldr	r2, .L1723
-	adds	r3, r3, #1
-	ldr	r0, [r2]
+	ldr	r2, [r1]
+	movs	r1, #20
+	ldr	r3, [r10]
+	ldr	r0, [fp]
+	mla	r2, r1, r3, r2
 	add	r0, r0, r7
-	ldr	r7, .L1723+20
-	ldr	r2, [r0, #8]
-	str	r2, [r10, #8]
-	ldr	r2, [r0, #12]
-	str	r2, [r10, #12]
-	ldr	r2, [sp, #44]
-	str	r2, [r1, #12]
+	ldr	r7, .L1426+16
+	ldr	r1, [r0, #8]
+	adds	r3, r3, #1
+	str	r1, [r2, #8]
+	ldr	r1, [r0, #12]
+	str	r1, [r2, #12]
+	movs	r1, #1
+	ldr	r2, [sp, #36]
+	str	r2, [r8, #12]
 	ldrh	r2, [r7]
-	strh	r2, [r1, #2]	@ movhi
-	ldr	r2, .L1723+24
-	str	r3, [r8]
+	strh	r2, [r8, #2]	@ movhi
+	ldr	r2, .L1426+52
+	str	r3, [r10]
 	ldr	r2, [r2]
-	str	r2, [r1, #4]
-	movs	r1, #1
+	str	r2, [r8, #4]
 	bl	FtlGcBufAlloc
 	ldrb	r2, [r7, #7]	@ zero_extendqisi2
-	ldr	r3, [r8]
+	ldr	r3, [r10]
 	cmp	r2, r3
-	beq	.L1661
+	beq	.L1385
 	ldrh	r3, [r7, #4]
-	cbnz	r3, .L1659
-.L1661:
+	cbnz	r3, .L1383
+.L1385:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	r0, .L1659
-	ldr	r3, .L1723+28
+	cbz	r0, .L1383
+	ldr	r3, .L1426+28
 	movs	r2, #0
 	str	r2, [r3]
-	b	.L1718
-.L1659:
-	ldr	r3, [sp, #24]
+	b	.L1423
+.L1383:
+	ldr	r3, [sp, #16]
 	adds	r3, r3, #1
-	b	.L1715
-.L1663:
-	ldrh	r3, [fp, #2]
+	b	.L1422
+.L1387:
+	ldrh	r3, [r5, #2]
 	add	r4, r4, r3
-	ldr	r3, [sp, #20]
+	ldr	r3, [sp, #12]
 	uxth	r4, r4
 	cmp	r3, r4
-	strh	r4, [fp, #2]	@ movhi
-	ldr	r4, .L1723+28
-	bhi	.L1665
-	ldr	r3, .L1723+32
+	strh	r4, [r5, #2]	@ movhi
+	ldr	r4, .L1426+28
+	bhi	.L1389
+	ldr	r3, .L1426+56
 	ldr	r3, [r3]
-	cbz	r3, .L1666
+	cbz	r3, .L1390
 	bl	Ftl_gc_temp_data_write_back
-	cbz	r0, .L1666
+	cbz	r0, .L1390
 	movs	r3, #0
 	str	r3, [r4]
-	b	.L1718
-.L1666:
-	ldr	r3, .L1723+12
+	b	.L1423
+.L1390:
+	ldr	r3, .L1426+20
 	ldrh	r1, [r3]
-	cbnz	r1, .L1667
-	ldr	r3, .L1723+36
-	ldrh	r2, [fp]
+	cbnz	r1, .L1391
+	ldr	r3, .L1426+40
+	ldrh	r2, [r5]
 	ldr	r3, [r3]
 	ldrh	r0, [r3, r2, lsl #1]
-	cbz	r0, .L1667
+	cbz	r0, .L1391
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldrh	r0, [fp]
+	ldrh	r0, [r5]
 	bl	update_vpc_list
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1667:
+.L1391:
 	movw	r3, #65535
-	strh	r3, [fp]	@ movhi
-.L1665:
+	strh	r3, [r5]	@ movhi
+.L1389:
 	movs	r3, #0
 	str	r3, [r4]
-	ldr	r3, .L1723+40
-	ldrh	r3, [r3]
-	cmp	r3, #2
-	bhi	.L1668
-	ldr	r3, .L1723+44
+	ldr	r3, .L1426+60
+	ldrh	r0, [r3]
+	cmp	r0, #2
+	bhi	.L1392
+	ldr	r3, .L1426+32
 	ldrh	r4, [r3]
-	b	.L1669
-.L1668:
-	ldr	r2, .L1723+48
-	ldrh	r0, [r2]
-	cmp	r0, #0
-	bne	.L1596
-	adds	r0, r3, #1
-	b	.L1596
-.L1673:
+	b	.L1393
+.L1392:
+	adds	r0, r0, #1
+	b	.L1342
+.L1394:
 	movs	r0, #0
-	b	.L1596
-.L1602:
-	ldr	r3, [sp, #8]
-	cmp	r3, #0
-	beq	.L1671
-.L1612:
-	ldr	r3, .L1723+20
-	ldrh	r2, [r3]
-	movw	r3, #65535
-	cmp	r2, r3
-	bne	.L1682
-.L1672:
-	ldr	r3, .L1723+52
-	movw	r2, #65535
-	ldrh	r3, [r3]
-	cmp	r3, r2
-	bne	.L1682
-	cmp	r5, r3
-	bne	.L1682
-	ldrh	r3, [r6]
-	cmp	r3, r5
-	beq	.L1624
-.L1629:
-	movw	r5, #65535
-.L1682:
-	movs	r4, #1
-	b	.L1623
-.L1604:
-	ldr	r3, [sp, #8]
-	cmp	r3, #0
-	beq	.L1671
-	movw	r5, #65535
-	b	.L1672
-.L1603:
-	ldr	r3, [sp, #8]
-	cmp	r3, #0
-	bne	.L1629
-	b	.L1671
-.L1724:
+	b	.L1342
+.L1427:
 	.align	2
-.L1723:
-	.word	.LANCHOR93
-	.word	.LANCHOR180
+.L1426:
+	.word	.LANCHOR51
+	.word	.LANCHOR175
 	.word	.LC1
-	.word	.LANCHOR178
-	.word	.LANCHOR113
+	.word	.LANCHOR52
 	.word	.LANCHOR53
-	.word	.LANCHOR71
-	.word	.LANCHOR108
-	.word	.LANCHOR89
+	.word	.LANCHOR173
+	.word	.LANCHOR174
+	.word	.LANCHOR94
+	.word	.LANCHOR19
+	.word	.LANCHOR3
 	.word	.LANCHOR42
+	.word	.LANCHOR144+14
+	.word	.LANCHOR104
+	.word	.LANCHOR83
+	.word	.LANCHOR62
 	.word	.LANCHOR48
-	.word	.LANCHOR19
-	.word	.LANCHOR177
-	.word	.LANCHOR99
+	.word	.LANCHOR66
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
-	.section	.text.sftl_init,"ax",%progbits
-	.align	1
-	.global	sftl_init
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	sftl_init, %function
-sftl_init:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, lr}
-	mov	r3, #-1
-	ldr	r4, .L1731
-	ldr	r1, .L1731+4
-	ldr	r0, .L1731+8
-	str	r3, [r4]
-	bl	printf
-	ldr	r0, .L1731+12
-	bl	FtlConstantsInit
-	bl	FtlMemInit
-	bl	FtlVariablesInit
-	ldr	r3, .L1731+16
-	ldrh	r0, [r3]
-	bl	FtlFreeSysBlkQueueInit
-	bl	FtlLoadBbt
-	cbnz	r0, .L1729
-	bl	FtlSysBlkInit
-	cbnz	r0, .L1729
-	movs	r3, #1
-	str	r3, [r4]
-	ldr	r3, .L1731+20
-	ldrh	r3, [r3]
-	cmp	r3, #15
-	bhi	.L1729
-	movw	r4, #8129
-.L1728:
-	movs	r1, #1
-	movs	r0, #0
-	bl	rk_ftl_garbage_collect
-	subs	r4, r4, #1
-	bne	.L1728
-.L1729:
-	movs	r0, #0
-	pop	{r4, pc}
-.L1732:
-	.align	2
-.L1731:
-	.word	.LANCHOR86
-	.word	.LC70
-	.word	.LC71
-	.word	.LANCHOR0
-	.word	.LANCHOR4
-	.word	.LANCHOR48
-	.size	sftl_init, .-sftl_init
-	.section	.text.sftl_gc,"ax",%progbits
-	.align	1
-	.global	sftl_gc
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	sftl_gc, %function
-sftl_gc:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	movs	r1, #1
-	mov	r0, r1
-	b	rk_ftl_garbage_collect
-	.size	sftl_gc, .-sftl_gc
 	.section	.text.FtlRead,"ax",%progbits
 	.align	1
 	.global	FtlRead
@@ -12991,31 +10738,31 @@ FtlRead:
 	mov	r6, r1
 	mov	r8, r3
 	str	r2, [sp, #24]
-	bne	.L1735
+	bne	.L1429
 	mov	r2, r3
 	ldr	r1, [sp, #24]
 	add	r0, r6, #256
 	bl	FtlVendorPartRead
 	str	r0, [sp, #4]
-.L1734:
+.L1428:
 	ldr	r0, [sp, #4]
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1735:
+.L1429:
 	ldr	r3, [sp, #24]
 	adds	r3, r1, r3
 	str	r3, [sp, #12]
-	ldr	r3, .L1767
+	ldr	r3, .L1461
 	ldr	r2, [sp, #12]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1756
-	ldr	r3, .L1767+4
+	bhi	.L1450
+	ldr	r3, .L1461+4
 	ldr	r3, [r3]
 	adds	r4, r3, #1
-	beq	.L1757
-	ldr	r3, .L1767+8
+	beq	.L1451
+	ldr	r3, .L1461+8
 	mov	r0, r6
 	movs	r7, #0
 	mov	r5, r7
@@ -13028,7 +10775,7 @@ FtlRead:
 	subs	r0, r3, #1
 	bl	__aeabi_uidiv
 	ldr	r3, [sp, #16]
-	ldr	r2, .L1767+12
+	ldr	r2, .L1461+12
 	ldr	r1, [sp, #24]
 	rsb	r3, r3, #1
 	ldr	r4, [sp, #16]
@@ -13041,54 +10788,54 @@ FtlRead:
 	add	r3, r3, r1
 	ldr	r1, [sp, #8]
 	str	r3, [r2]
-	ldr	r2, .L1767+16
+	ldr	r2, .L1461+16
 	str	r7, [sp, #4]
 	ldr	r3, [r2]
 	add	r3, r3, r1
 	str	r3, [r2]
-.L1737:
+.L1431:
 	ldr	r3, [sp, #8]
-	cbnz	r3, .L1754
-	ldr	r3, .L1767+20
+	cbnz	r3, .L1448
+	ldr	r3, .L1461+20
 	ldrh	r3, [r3]
-	cbnz	r3, .L1755
-	ldr	r3, .L1767+24
+	cbnz	r3, .L1449
+	ldr	r3, .L1461+24
 	ldrh	r3, [r3]
 	cmp	r3, #31
-	bhi	.L1734
-.L1755:
+	bhi	.L1428
+.L1449:
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
-	b	.L1734
-.L1754:
+	b	.L1428
+.L1448:
 	movs	r2, #0
 	add	r1, sp, #52
 	mov	r0, r4
 	bl	log2phys
 	ldr	r3, [sp, #52]
 	adds	r0, r3, #1
-	bne	.L1738
-	ldr	fp, .L1767+8
+	bne	.L1432
+	ldr	fp, .L1461+8
 	mov	r10, #0
-.L1739:
+.L1433:
 	ldrh	r0, [fp]
 	cmp	r10, r0
-	bcc	.L1741
-.L1742:
+	bcc	.L1435
+.L1436:
 	ldr	r3, [sp, #8]
 	adds	r4, r4, #1
 	subs	r3, r3, #1
 	str	r3, [sp, #8]
-	beq	.L1746
-	ldr	r3, .L1767+28
+	beq	.L1440
+	ldr	r3, .L1461+28
 	ldrh	r3, [r3]
 	cmp	r5, r3, lsl #2
-	bne	.L1737
-.L1746:
+	bne	.L1431
+.L1440:
 	cmp	r5, #0
-	beq	.L1737
-	ldr	r3, .L1767+32
+	beq	.L1431
+	ldr	r3, .L1461+32
 	movs	r2, #0
 	mov	r1, r5
 	mov	r10, #0
@@ -13102,29 +10849,29 @@ FtlRead:
 	ldr	r3, [sp, #32]
 	lsls	r3, r3, #9
 	str	r3, [sp, #40]
-.L1753:
+.L1447:
 	movs	r3, #20
 	mul	fp, r3, r10
-	ldr	r3, .L1767+32
+	ldr	r3, .L1461+32
 	ldr	r2, [r3]
 	ldr	r3, [sp, #16]
 	add	r2, r2, fp
 	ldr	r1, [r2, #16]
 	cmp	r3, r1
-	bne	.L1748
+	bne	.L1442
 	ldr	r1, [r2, #8]
-	ldr	r2, .L1767+36
+	ldr	r2, .L1461+36
 	ldr	r2, [r2]
 	cmp	r1, r2
-	bne	.L1749
+	bne	.L1443
 	ldr	r3, [sp, #36]
 	mov	r0, r8
 	ldr	r2, [sp, #40]
 	add	r1, r1, r3
-.L1766:
+.L1460:
 	bl	ftl_memcpy
-.L1749:
-	ldr	r3, .L1767+32
+.L1443:
+	ldr	r3, .L1461+32
 	ldr	r3, [r3]
 	add	r2, r3, fp
 	ldr	r3, [r3, fp]
@@ -13133,49 +10880,49 @@ FtlRead:
 	ldr	r0, [r0, #8]
 	cmp	r1, r0
 	itttt	ne
-	ldrne	r0, .L1767+40
+	ldrne	r0, .L1461+40
 	ldrne	r1, [r0, #72]
 	addne	r1, r1, #1
 	strne	r1, [r0, #72]
 	adds	r1, r3, #1
-	bne	.L1751
-	ldr	r1, .L1767+40
+	bne	.L1445
+	ldr	r1, .L1461+40
 	str	r3, [sp, #4]
 	ldr	r2, [r1, #72]
 	adds	r2, r2, #1
 	str	r2, [r1, #72]
-.L1752:
+.L1446:
 	add	r10, r10, #1
 	cmp	r5, r10
-	bne	.L1753
+	bne	.L1447
 	movs	r5, #0
-	b	.L1737
-.L1741:
+	b	.L1431
+.L1435:
 	mla	r0, r0, r4, r10
 	cmp	r6, r0
-	bhi	.L1740
+	bhi	.L1434
 	ldr	r3, [sp, #12]
 	cmp	r3, r0
-	bls	.L1740
+	bls	.L1434
 	subs	r0, r0, r6
 	mov	r2, #512
 	movs	r1, #0
 	add	r0, r8, r0, lsl #9
 	bl	ftl_memset
-.L1740:
+.L1434:
 	add	r10, r10, #1
-	b	.L1739
-.L1738:
-	ldr	r2, .L1767+32
+	b	.L1433
+.L1432:
+	ldr	r2, .L1461+32
 	mov	r10, #20
 	ldr	r2, [r2]
 	mla	r10, r10, r5, r2
 	str	r3, [r10, #4]
 	ldr	r3, [sp, #16]
 	cmp	r4, r3
-	ldr	r3, .L1767+8
-	bne	.L1743
-	ldr	r2, .L1767+36
+	ldr	r3, .L1461+8
+	bne	.L1437
+	ldr	r2, .L1461+36
 	mov	r0, r6
 	ldrh	fp, [r3]
 	ldr	r2, [r2]
@@ -13190,11 +10937,11 @@ FtlRead:
 	movcs	r3, r2
 	cmp	fp, r3
 	str	r3, [sp, #32]
-	bne	.L1744
+	bne	.L1438
 	str	r8, [r10, #8]
-.L1744:
-	ldr	r3, .L1767+44
-	ldr	r2, .L1767+48
+.L1438:
+	ldr	r3, .L1461+44
+	ldr	r2, .L1461+48
 	str	r4, [r10, #16]
 	ldrh	r3, [r3]
 	ldr	r2, [r2]
@@ -13203,12 +10950,12 @@ FtlRead:
 	bic	r3, r3, #3
 	add	r3, r3, r2
 	str	r3, [r10, #12]
-	b	.L1742
-.L1743:
+	b	.L1436
+.L1437:
 	ldr	r2, [sp, #20]
 	cmp	r4, r2
-	bne	.L1745
-	ldr	r2, .L1767+52
+	bne	.L1439
+	ldr	r2, .L1461+52
 	ldr	r1, [sp, #12]
 	ldr	r2, [r2]
 	str	r2, [r10, #8]
@@ -13216,63 +10963,63 @@ FtlRead:
 	mul	r3, r2, r4
 	subs	r7, r1, r3
 	cmp	r2, r7
-	bne	.L1744
-.L1765:
+	bne	.L1438
+.L1459:
 	subs	r3, r3, r6
 	add	r3, r8, r3, lsl #9
 	str	r3, [r10, #8]
-	b	.L1744
-.L1745:
+	b	.L1438
+.L1439:
 	ldrh	r3, [r3]
 	muls	r3, r4, r3
-	b	.L1765
-.L1748:
+	b	.L1459
+.L1442:
 	ldr	r3, [sp, #20]
 	cmp	r3, r1
-	bne	.L1749
-	ldr	r3, .L1767+52
+	bne	.L1443
+	ldr	r3, .L1461+52
 	ldr	r1, [r2, #8]
 	ldr	r2, [r3]
 	cmp	r1, r2
-	bne	.L1749
-	ldr	r2, .L1767+8
+	bne	.L1443
+	ldr	r2, .L1461+8
 	ldr	r3, [sp, #20]
 	ldrh	r0, [r2]
 	ldr	r2, [sp, #44]
 	muls	r0, r3, r0
 	subs	r0, r0, r6
 	add	r0, r8, r0, lsl #9
-	b	.L1766
-.L1751:
+	b	.L1460
+.L1445:
 	cmp	r3, #256
-	bne	.L1752
+	bne	.L1446
 	ldr	r0, [r2, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-	b	.L1752
-.L1756:
+	b	.L1446
+.L1450:
 	mov	r3, #-1
-.L1757:
+.L1451:
 	str	r3, [sp, #4]
-	b	.L1734
-.L1768:
+	b	.L1428
+.L1462:
 	.align	2
-.L1767:
+.L1461:
 	.word	.LANCHOR34
-	.word	.LANCHOR86
+	.word	.LANCHOR166
 	.word	.LANCHOR12
-	.word	.LANCHOR69
-	.word	.LANCHOR62
-	.word	.LANCHOR101
+	.word	.LANCHOR163
+	.word	.LANCHOR89
+	.word	.LANCHOR74
 	.word	.LANCHOR48
 	.word	.LANCHOR3
-	.word	.LANCHOR112
-	.word	.LANCHOR118
-	.word	.LANCHOR81
+	.word	.LANCHOR103
+	.word	.LANCHOR109
+	.word	.LANCHOR135
 	.word	.LANCHOR24
-	.word	.LANCHOR124
-	.word	.LANCHOR119
+	.word	.LANCHOR115
+	.word	.LANCHOR110
 	.size	FtlRead, .-FtlRead
 	.section	.text.sftl_read,"ax",%progbits
 	.align	1
@@ -13309,194 +11056,153 @@ FtlWrite:
 	str	r1, [sp, #4]
 	str	r2, [sp, #20]
 	str	r3, [sp, #16]
-	bne	.L1771
+	bne	.L1465
 	mov	r2, r3
 	ldr	r3, [sp, #4]
 	ldr	r1, [sp, #20]
 	add	r0, r3, #256
 	bl	FtlVendorPartWrite
-.L1770:
+.L1464:
 	add	sp, sp, #72
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1771:
+.L1465:
 	ldr	r3, [sp, #4]
 	ldr	r2, [sp, #20]
 	adds	r4, r3, r2
-	ldr	r3, .L1822
+	ldr	r3, .L1508
 	ldr	r3, [r3]
 	cmp	r4, r3
-	bhi	.L1808
-	ldr	r3, .L1822+4
+	bhi	.L1498
+	ldr	r3, .L1508+4
 	ldr	r0, [r3]
 	adds	r5, r0, #1
-	beq	.L1770
-	ldr	r3, .L1822+8
+	beq	.L1464
+	ldr	r3, .L1508+8
 	mov	r2, #2048
 	ldr	r0, [sp, #4]
+	ldr	r7, .L1508+12
 	str	r2, [r3]
-	ldr	r3, .L1822+12
+	ldr	r3, .L1508+16
 	ldrh	r5, [r3]
 	mov	r1, r5
 	bl	__aeabi_uidiv
 	mov	r1, r5
 	str	r0, [sp, #12]
 	subs	r0, r4, #1
-	ldr	r5, .L1822+16
 	bl	__aeabi_uidiv
 	ldr	r2, [sp, #12]
 	ldr	r1, [sp, #20]
-	str	r0, [sp, #28]
+	ldr	r5, [sp, #12]
 	subs	r3, r0, r2
-	ldr	r2, .L1822+20
+	ldr	r2, .L1508+20
 	str	r3, [sp, #32]
 	adds	r3, r3, #1
 	str	r3, [sp, #8]
 	ldr	r3, [r2]
+	str	r0, [sp, #28]
 	add	r3, r3, r1
 	ldr	r1, [sp, #8]
 	str	r3, [r2]
-	ldr	r2, .L1822+24
+	ldr	r2, .L1508+24
 	ldr	r3, [r2]
 	add	r3, r3, r1
 	str	r3, [r2]
-	ldr	r3, .L1822+28
-	ldr	r3, [r3]
-	cbz	r3, .L1773
-	ldrh	r2, [r5, #4]
-	ldr	r3, .L1822+32
-	cmp	r2, #0
-	it	eq
-	moveq	r5, r3
-.L1773:
-	ldr	r6, [sp, #12]
-.L1774:
+.L1467:
 	ldr	r3, [sp, #8]
-	cbnz	r3, .L1803
-	ldr	r5, .L1822+36
+	cbnz	r3, .L1493
+	ldr	r5, .L1508+28
 	mov	r0, r3
 	ldr	r1, [sp, #32]
 	bl	rk_ftl_garbage_collect
 	ldrh	r2, [r5]
 	cmp	r2, #5
-	bls	.L1804
-.L1806:
+	bls	.L1494
+.L1496:
 	movs	r0, #0
-	b	.L1770
-.L1803:
-	ldr	r3, .L1822+40
-	ldrb	r2, [r5, #6]	@ zero_extendqisi2
-	ldrh	r3, [r3]
+	b	.L1464
+.L1493:
+	ldr	r4, .L1508+32
+	ldrb	r2, [r7, #6]	@ zero_extendqisi2
+	ldrh	r3, [r4]
 	cmp	r2, r3
-	bcc	.L1775
-	movw	r2, #1013
-	ldr	r1, .L1822+44
-	ldr	r0, .L1822+48
+	bcc	.L1468
+	mov	r2, #1016
+	ldr	r1, .L1508+36
+	ldr	r0, .L1508+40
 	bl	printf
-.L1775:
-	ldrh	r2, [r5, #4]
-	cbnz	r2, .L1776
-	ldr	r3, .L1822+16
-	ldr	r4, .L1822+28
-	cmp	r5, r3
-	bne	.L1777
-	ldr	r0, .L1822+32
-	ldrh	r5, [r0, #4]
-	cbnz	r5, .L1778
-	bl	allocate_new_data_superblock
-	str	r5, [r4]
-.L1778:
-	ldr	r0, .L1822+16
-	bl	allocate_new_data_superblock
-	ldr	r5, .L1822+16
-	ldr	r2, [r4]
-	ldr	r3, .L1822+32
-	cmp	r2, #0
-	it	ne
-	movne	r5, r3
-.L1779:
-	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1776
-	mov	r0, r5
+.L1468:
+	ldrh	r3, [r7, #4]
+	cbnz	r3, .L1469
+	mov	r0, r7
 	bl	allocate_new_data_superblock
-.L1776:
-	ldrh	r2, [r5, #4]
-	ldr	r3, [sp, #8]
-	cmp	r2, r3
-	it	cs
-	movcs	r2, r3
-	ldrb	r3, [r5, #7]	@ zero_extendqisi2
+.L1469:
+	ldrb	r3, [r7, #7]	@ zero_extendqisi2
+	ldrh	r2, [r7, #4]
 	lsls	r3, r3, #2
-	cmp	r2, r3
+	cmp	r3, r2
+	it	cs
+	movcs	r3, r2
+	ldr	r2, [sp, #8]
+	cmp	r3, r2
 	it	cs
-	movcs	r2, r3
-	ldr	r3, .L1822+40
-	str	r2, [sp, #44]
-	ldrb	r2, [r5, #6]	@ zero_extendqisi2
-	ldrh	r3, [r3]
+	movcs	r3, r2
+	ldrb	r2, [r7, #6]	@ zero_extendqisi2
+	str	r3, [sp, #44]
+	ldrh	r3, [r4]
 	cmp	r2, r3
-	bcc	.L1780
-	movw	r2, #1046
-	ldr	r1, .L1822+44
-	ldr	r0, .L1822+48
+	bcc	.L1470
+	movw	r2, #1049
+	ldr	r1, .L1508+36
+	ldr	r0, .L1508+40
 	bl	printf
-.L1780:
-	ldr	r8, .L1822+52
+.L1470:
+	ldr	r8, .L1508+44
 	mov	fp, #0
-.L1781:
+.L1471:
 	ldr	r3, [sp, #44]
 	cmp	fp, r3
-	bne	.L1801
-.L1782:
-	ldr	r0, .L1822+52
-	mov	r3, r5
+	bne	.L1491
+.L1472:
+	ldr	r0, .L1508+44
+	mov	r3, r7
 	movs	r2, #0
 	mov	r1, fp
 	ldr	r0, [r0]
 	bl	FtlProgPages
 	ldr	r3, [sp, #8]
 	cmp	fp, r3
-	bls	.L1802
-	movw	r2, #1123
-	ldr	r1, .L1822+44
-	ldr	r0, .L1822+48
+	bls	.L1492
+	movw	r2, #1126
+	ldr	r1, .L1508+36
+	ldr	r0, .L1508+40
 	bl	printf
-.L1802:
+.L1492:
 	ldr	r3, [sp, #8]
 	sub	r3, r3, fp
 	str	r3, [sp, #8]
-	b	.L1774
-.L1777:
-	str	r2, [r4]
-	ldrh	r2, [r3, #4]
-	cbnz	r2, .L1813
-	mov	r0, r5
-	bl	allocate_new_data_superblock
-	b	.L1779
-.L1813:
-	mov	r5, r3
-	b	.L1776
-.L1801:
-	ldrh	r2, [r5, #4]
+	b	.L1467
+.L1491:
+	ldrh	r2, [r7, #4]
 	cmp	r2, #0
-	beq	.L1782
+	beq	.L1472
 	movs	r2, #0
 	add	r1, sp, #48
-	mov	r0, r6
-	movs	r7, #20
-	bl	log2phys
 	mov	r0, r5
-	mul	r7, r7, fp
+	movs	r6, #20
+	bl	log2phys
+	mov	r0, r7
+	mul	r6, r6, fp
 	bl	get_new_active_ppa
-	ldr	r3, .L1822+56
+	ldr	r2, .L1508+48
 	ldr	r1, [r8]
-	ldrh	r2, [r3]
-	add	r1, r1, r7
+	ldrh	r2, [r2]
+	add	r1, r1, r6
 	str	r0, [r1, #4]
-	str	r6, [r1, #16]
+	str	r5, [r1, #16]
 	mul	r0, r2, fp
 	bic	r3, r0, #3
-	ldr	r0, .L1822+60
+	ldr	r0, .L1508+52
 	str	r3, [sp, #36]
 	ldr	r3, [r0]
 	ldr	r0, [sp, #36]
@@ -13507,467 +11213,1046 @@ FtlWrite:
 	movs	r1, #0
 	bl	ftl_memset
 	ldr	r3, [sp, #12]
-	ldr	r2, .L1822+12
-	cmp	r6, r3
-	beq	.L1783
+	ldr	r2, .L1508+16
+	cmp	r5, r3
+	beq	.L1473
 	ldr	r3, [sp, #28]
-	cmp	r6, r3
-	bne	.L1818
+	cmp	r5, r3
+	bne	.L1504
 	ldrh	r2, [r2]
 	ldr	r3, [sp, #4]
 	ldr	r1, [sp, #20]
-	smulbb	r2, r2, r6
+	smulbb	r2, r2, r5
 	adds	r4, r3, r1
 	movs	r3, #0
 	subs	r4, r4, r2
 	str	r3, [sp, #24]
 	uxth	r4, r4
-	b	.L1786
-.L1783:
+	b	.L1476
+.L1473:
 	ldrh	r4, [r2]
 	ldr	r0, [sp, #4]
 	mov	r1, r4
 	bl	__aeabi_uidivmod
 	ldr	r3, [sp, #20]
-	subs	r4, r4, r1
-	str	r1, [sp, #24]
-	cmp	r4, r3
-	it	cs
-	movcs	r4, r3
-.L1786:
-	ldr	r2, .L1822+12
-	ldr	r3, [sp, #12]
-	ldrh	r2, [r2]
-	cmp	r4, r2
-	ldr	r2, [r8]
-	bne	.L1787
-	cmp	r6, r3
-	add	r7, r7, r2
-	ittet	ne
-	mulne	r4, r4, r6
-	ldrne	r3, [sp, #4]
-	ldreq	r3, [sp, #16]
-	subne	r4, r4, r3
-	itett	ne
-	ldrne	r3, [sp, #16]
-	streq	r3, [r7, #8]
-	addne	r4, r3, r4, lsl #9
-	strne	r4, [r7, #8]
-.L1789:
-	ldr	r3, .L1822+40
-	ldrb	r1, [r5, #6]	@ zero_extendqisi2
+	subs	r4, r4, r1
+	str	r1, [sp, #24]
+	cmp	r4, r3
+	it	cs
+	movcs	r4, r3
+.L1476:
+	ldr	r2, .L1508+16
+	ldr	r3, [sp, #12]
+	ldrh	r2, [r2]
+	cmp	r4, r2
+	ldr	r2, [r8]
+	bne	.L1477
+	cmp	r5, r3
+	add	r6, r6, r2
+	ittet	ne
+	mulne	r4, r4, r5
+	ldrne	r3, [sp, #4]
+	ldreq	r3, [sp, #16]
+	subne	r4, r4, r3
+	itett	ne
+	ldrne	r3, [sp, #16]
+	streq	r3, [r6, #8]
+	addne	r4, r3, r4, lsl #9
+	strne	r4, [r6, #8]
+.L1479:
+	ldr	r2, .L1508+32
+	ldrb	r1, [r7, #6]	@ zero_extendqisi2
+	ldrh	r2, [r2]
+	cmp	r1, r2
+	bcc	.L1488
+	movw	r2, #1117
+	ldr	r1, .L1508+36
+	ldr	r0, .L1508+40
+	bl	printf
+.L1488:
+	ldr	r3, [sp, #40]
+	movw	r2, #61589
+	ldr	r1, [sp, #36]
+	add	fp, fp, #1
+	strh	r2, [r3, r1]	@ movhi
+	ldr	r1, .L1508+56
+	str	r5, [r10, #8]
+	adds	r5, r5, #1
+	ldr	r2, [r1]
+	str	r2, [r10, #4]
+	adds	r2, r2, #1
+	adds	r3, r2, #1
+	it	eq
+	moveq	r2, #0
+	str	r2, [r1]
+	ldr	r2, [sp, #48]
+	str	r2, [r10, #12]
+	ldrh	r2, [r7]
+	strh	r2, [r10, #2]	@ movhi
+	b	.L1471
+.L1477:
+	cmp	r5, r3
+	add	r2, r2, r6
+	ite	eq
+	ldreq	r1, .L1508+60
+	ldrne	r1, .L1508+64
+	ldr	r1, [r1]
+	str	r1, [r2, #8]
+	ldr	r2, [sp, #48]
+	adds	r1, r2, #1
+	beq	.L1482
+	str	r2, [sp, #56]
+	add	r0, sp, #52
+	ldr	r2, [r8]
+	str	r5, [sp, #68]
+	add	r2, r2, r6
+	ldr	r1, [r2, #8]
+	ldr	r2, [r2, #12]
+	str	r1, [sp, #60]
+	movs	r1, #1
+	str	r2, [sp, #64]
+	movs	r2, #0
+	bl	FlashReadPages
+	ldr	r2, [sp, #52]
+	adds	r2, r2, #1
+	bne	.L1483
+	ldr	r1, .L1508+68
+	ldr	r2, [r1, #72]
+	adds	r2, r2, #1
+	str	r2, [r1, #72]
+.L1486:
+	ldr	r3, [sp, #12]
+	lsls	r2, r4, #9
+	cmp	r5, r3
+	bne	.L1487
+	ldr	r1, [r8]
+	ldr	r3, [sp, #24]
+	add	r6, r6, r1
+	ldr	r1, [sp, #16]
+	ldr	r0, [r6, #8]
+	add	r0, r0, r3, lsl #9
+.L1506:
+	bl	ftl_memcpy
+	b	.L1479
+.L1483:
+	ldr	r1, [r10, #8]
+	cmp	r5, r1
+	beq	.L1485
+	ldr	r0, .L1508+68
+	ldr	r2, [r0, #72]
+	adds	r2, r2, #1
+	str	r2, [r0, #72]
+	mov	r2, r5
+	ldr	r0, .L1508+72
+	bl	printf
+.L1485:
+	ldr	r2, [r10, #8]
+	cmp	r5, r2
+	beq	.L1486
+	movw	r2, #1102
+	ldr	r1, .L1508+36
+	ldr	r0, .L1508+40
+	bl	printf
+	b	.L1486
+.L1482:
+	ldr	r2, [r8]
+	movs	r1, #0
+	adds	r0, r2, r6
+	ldr	r2, .L1508+76
+	ldr	r0, [r0, #8]
+	ldrh	r2, [r2]
+	bl	ftl_memset
+	b	.L1486
+.L1487:
+	ldr	r1, .L1508+16
+	ldr	r3, [sp, #4]
+	ldr	r0, [r8]
+	ldrh	r1, [r1]
+	add	r6, r6, r0
+	ldr	r0, [r6, #8]
+	muls	r1, r5, r1
+	subs	r1, r1, r3
+	ldr	r3, [sp, #16]
+	add	r1, r3, r1, lsl #9
+	b	.L1506
+.L1509:
+	.align	2
+.L1508:
+	.word	.LANCHOR34
+	.word	.LANCHOR166
+	.word	.LANCHOR176
+	.word	.LANCHOR51
+	.word	.LANCHOR12
+	.word	.LANCHOR162
+	.word	.LANCHOR85
+	.word	.LANCHOR48
+	.word	.LANCHOR3
+	.word	.LANCHOR177
+	.word	.LC1
+	.word	.LANCHOR105
+	.word	.LANCHOR24
+	.word	.LANCHOR115
+	.word	.LANCHOR83
+	.word	.LANCHOR109
+	.word	.LANCHOR110
+	.word	.LANCHOR135
+	.word	.LC37
+	.word	.LANCHOR23
+.L1504:
+	ldrh	r2, [r2]
+	ldr	r3, [sp, #4]
+	ldr	r1, [r8]
+	muls	r2, r5, r2
+	add	r6, r6, r1
+	subs	r2, r2, r3
+	ldr	r3, [sp, #16]
+	add	r2, r3, r2, lsl #9
+	str	r2, [r6, #8]
+	b	.L1479
+.L1494:
+	ldr	r6, .L1510
+	mov	r4, #256
+	ldr	r7, .L1510+4
+.L1497:
+	ldrh	r3, [r6]
+	movw	r2, #65535
+	cmp	r3, r2
+	bne	.L1495
+	ldrh	r2, [r7]
+	cmp	r2, r3
+	bne	.L1495
+	movs	r0, #0
+	bl	List_get_gc_head_node
+	uxth	r0, r0
+	bl	FtlGcRefreshBlock
+.L1495:
+	ldr	r2, .L1510+8
+	movs	r3, #128
+	movs	r1, #1
+	mov	r0, r1
+	strh	r3, [r2]	@ movhi
+	ldr	r2, .L1510+12
+	strh	r3, [r2]	@ movhi
+	bl	rk_ftl_garbage_collect
+	movs	r1, #1
+	movs	r0, #0
+	bl	rk_ftl_garbage_collect
+	ldrh	r3, [r5]
+	cmp	r3, #2
+	bhi	.L1496
+	subs	r4, r4, #1
+	bne	.L1497
+	b	.L1496
+.L1498:
+	mov	r0, #-1
+	b	.L1464
+.L1511:
+	.align	2
+.L1510:
+	.word	.LANCHOR144
+	.word	.LANCHOR72
+	.word	.LANCHOR101
+	.word	.LANCHOR100
+	.size	FtlWrite, .-FtlWrite
+	.section	.text.sftl_gc,"ax",%progbits
+	.align	1
+	.global	sftl_gc
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sftl_gc, %function
+sftl_gc:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	movs	r1, #1
+	mov	r0, r1
+	b	rk_ftl_garbage_collect
+	.size	sftl_gc, .-sftl_gc
+	.section	.text.FtlLoadSysInfo,"ax",%progbits
+	.align	1
+	.global	FtlLoadSysInfo
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlLoadSysInfo, %function
+FtlLoadSysInfo:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r1, #0
+	ldr	r8, .L1540+144
+	sub	sp, sp, #24
+	ldr	r7, .L1540
+	ldr	r3, [r8]
+	ldr	r4, .L1540+4
+	ldr	fp, .L1540+148
+	ldrh	r2, [r7]
+	ldr	r5, .L1540+8
+	str	r3, [r4, #8]
+	ldr	r6, .L1540+12
+	ldr	r3, [fp]
+	lsls	r2, r2, #1
+	ldr	r0, [r5]
+	str	r3, [r4, #12]
+	bl	ftl_memset
+	ldrh	r0, [r6]
+	movw	r3, #65535
+	str	r5, [sp, #16]
+	cmp	r0, r3
+	bne	.L1514
+.L1525:
+	mov	r0, #-1
+.L1513:
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1514:
+	movs	r1, #1
+	bl	FtlGetLastWrittenPage
+	ldrsh	r10, [r6]
+	sxth	r5, r0
+	adds	r0, r0, #1
+	strh	r0, [r6, #2]	@ movhi
+.L1516:
+	cmp	r5, #0
+	bge	.L1522
+	movw	r2, #1465
+	ldr	r1, .L1540+16
+	ldr	r0, .L1540+20
+	bl	printf
+	b	.L1521
+.L1522:
+	orr	r3, r5, r10, lsl #10
+	movs	r2, #1
+	mov	r1, r2
+	ldr	r0, .L1540+4
+	str	r3, [r4, #4]
+	ldr	r3, [r8]
+	str	r3, [r4, #8]
+	bl	FlashReadPages
+	ldr	r3, [r4, #12]
+	ldr	r3, [r3, #12]
+	str	r3, [sp, #20]
+	cbz	r3, .L1517
+	ldr	r2, .L1540+24
+	ldr	r0, [r4, #8]
+	ldrh	r1, [r2]
+	bl	js_hash
+	ldr	r3, [sp, #20]
+	cmp	r3, r0
+	beq	.L1517
+	str	r0, [sp, #8]
+	mov	r2, r10
+	str	r3, [sp, #4]
+	ldrh	r3, [r6, #4]
+	ldr	r1, .L1540+16
+	ldr	r0, .L1540+28
+	str	r3, [sp]
+	mov	r3, r5
+	bl	printf
+	cbnz	r5, .L1518
+	ldrh	r3, [r6, #4]
+	cmp	r10, r3
+	beq	.L1518
+	sxth	r10, r3
+	ldr	r3, .L1540+32
+	ldrh	r5, [r3]
+.L1520:
+	subs	r5, r5, #1
+	sxth	r5, r5
+	b	.L1516
+.L1518:
+	mov	r3, #-1
+	str	r3, [r4]
+.L1517:
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	beq	.L1520
+	ldr	r3, [r8]
+	ldr	r2, .L1540+36
+	ldr	r3, [r3]
+	cmp	r3, r2
+	bne	.L1520
+	ldr	r3, [fp]
 	ldrh	r2, [r3]
-	cmp	r1, r2
-	bcc	.L1798
-	movw	r2, #1114
-	ldr	r1, .L1822+44
-	ldr	r0, .L1822+48
+	movw	r3, #61604
+	cmp	r2, r3
+	bne	.L1520
+.L1521:
+	ldr	r2, .L1540+24
+	ldrh	r3, [r7]
+	ldrh	r2, [r2]
+	adds	r3, r3, #24
+	cmp	r2, r3, lsl #1
+	bcs	.L1524
+	movw	r2, #1467
+	ldr	r1, .L1540+16
+	ldr	r0, .L1540+20
 	bl	printf
-.L1798:
-	ldr	r3, [sp, #40]
-	movw	r2, #61589
-	ldr	r1, [sp, #36]
-	add	fp, fp, #1
-	strh	r2, [r3, r1]	@ movhi
-	ldr	r1, .L1822+64
-	str	r6, [r10, #8]
-	adds	r6, r6, #1
-	ldr	r2, [r1]
-	str	r2, [r10, #4]
-	adds	r2, r2, #1
-	adds	r3, r2, #1
-	it	eq
-	moveq	r2, #0
-	str	r2, [r1]
-	ldr	r2, [sp, #48]
-	str	r2, [r10, #12]
+.L1524:
+	ldr	r5, .L1540+40
+	movs	r2, #48
+	ldr	r1, [r4, #8]
+	mov	r0, r5
+	bl	ftl_memcpy
+	ldrh	r2, [r7]
+	ldr	r1, [r4, #8]
+	ldr	r3, [sp, #16]
+	lsls	r2, r2, #1
+	adds	r1, r1, #48
+	ldr	r0, [r3]
+	bl	ftl_memcpy
+	ldrh	r1, [r7]
+	ldr	r3, [r4, #8]
+	mov	r4, r5
+	lsrs	r2, r1, #3
+	adds	r1, r1, #24
+	lsls	r1, r1, #1
+	adds	r2, r2, #4
+	bic	r1, r1, #3
+	add	r1, r1, r3
+	ldr	r3, .L1540+44
+	ldr	r0, [r3]
+	bl	ftl_memcpy
+	ldr	r2, [r5]
+	ldr	r3, .L1540+36
+	cmp	r2, r3
+	bne	.L1525
+	ldr	r3, .L1540+48
+	ldrb	r2, [r4, #10]	@ zero_extendqisi2
+	ldrh	r5, [r5, #8]
+	ldrh	r3, [r3]
+	strh	r5, [r6, #6]	@ movhi
+	cmp	r2, r3
+	bne	.L1525
+	ldr	r3, .L1540+52
+	ldr	r2, .L1540+56
+	str	r5, [r3]
+	ldr	r3, .L1540+60
+	ldrh	r3, [r3]
+	muls	r3, r5, r3
+	str	r3, [r2]
+	ldr	r2, .L1540+64
+	ldrh	r2, [r2]
+	muls	r3, r2, r3
+	ldr	r2, .L1540+68
+	str	r3, [r2]
+	ldr	r3, .L1540+72
+	ldr	r6, [r3]
+	ldr	r3, .L1540+76
+	ldrh	r0, [r3, #6]
+	ldr	r3, .L1540+80
+	subs	r0, r6, r0
+	ldrh	r1, [r3]
+	subs	r0, r0, r5
+	bl	__aeabi_uidiv
+	ldr	r3, .L1540+84
+	cmp	r5, r6
+	strh	r0, [r3]	@ movhi
+	bls	.L1526
+	movw	r2, #1489
+	ldr	r1, .L1540+16
+	ldr	r0, .L1540+20
+	bl	printf
+.L1526:
+	ldrh	r2, [r4, #16]
+	ldr	r3, .L1540+88
+	ldrh	ip, [r4, #14]
+	ldr	r7, .L1540+92
+	lsrs	r1, r2, #6
+	and	r2, r2, #63
+	strb	r2, [r3, #6]
+	ldrb	r2, [r4, #11]	@ zero_extendqisi2
+	strh	r1, [r3, #2]	@ movhi
+	ldr	r1, .L1540+96
+	strb	r2, [r3, #8]
+	ldrh	r2, [r4, #18]
+	strh	ip, [r3]	@ movhi
+	movw	r3, #65535
+	strh	r3, [r7]	@ movhi
+	movs	r3, #0
+	strh	r2, [r1]	@ movhi
+	ldrh	r2, [r4, #20]
+	strh	r3, [r7, #2]	@ movhi
+	strb	r3, [r7, #6]
+	strb	r3, [r7, #8]
+	lsrs	r5, r2, #6
+	and	r2, r2, #63
+	strb	r2, [r1, #6]
+	ldrb	r2, [r4, #12]	@ zero_extendqisi2
+	strh	r5, [r1, #2]	@ movhi
+	ldrh	r5, [r4, #22]
+	strb	r2, [r1, #8]
+	ldr	r2, .L1540+100
+	strh	r5, [r2]	@ movhi
+	ldrh	r5, [r4, #24]
+	lsrs	r6, r5, #6
+	and	r5, r5, #63
+	strb	r5, [r2, #6]
+	ldrb	r5, [r4, #13]	@ zero_extendqisi2
+	strh	r6, [r2, #2]	@ movhi
+	ldr	r6, [r4, #32]
+	strb	r5, [r2, #8]
+	ldr	r5, .L1540+104
+	str	r3, [r5]
+	ldr	r5, .L1540+108
+	str	r3, [r5]
+	ldr	r5, .L1540+112
+	str	r3, [r5]
+	ldr	r5, .L1540+116
+	str	r3, [r5]
+	ldr	r5, .L1540+120
+	str	r6, [r5]
+	mov	r6, r1
+	ldr	r5, .L1540+124
+	str	r3, [r5]
+	ldr	r5, .L1540+128
+	str	r3, [r5]
+	ldr	r5, .L1540+132
+	ldr	lr, [r4, #40]
+	str	r3, [r5]
+	ldr	r3, .L1540+136
+	ldr	r5, [r3]
+	cmp	lr, r5
+	mov	r5, r2
+	it	hi
+	strhi	lr, [r3]
+	ldr	r3, .L1540+140
+	ldr	r2, [r4, #36]
+	ldr	r1, [r3]
+	cmp	r2, r1
+	it	hi
+	strhi	r2, [r3]
+	movw	r3, #65535
+	cmp	ip, r3
+	beq	.L1529
+	ldr	r0, .L1540+88
+	bl	make_superblock
+.L1529:
+	ldrh	r2, [r6]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L1530
+	ldr	r0, .L1540+96
+	bl	make_superblock
+.L1530:
 	ldrh	r2, [r5]
-	strh	r2, [r10, #2]	@ movhi
-	b	.L1781
-.L1823:
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L1531
+	ldr	r0, .L1540+100
+	bl	make_superblock
+.L1531:
+	ldrh	r2, [r7]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L1532
+	ldr	r0, .L1540+92
+	bl	make_superblock
+.L1532:
+	movs	r0, #0
+	b	.L1513
+.L1541:
 	.align	2
-.L1822:
-	.word	.LANCHOR34
-	.word	.LANCHOR86
-	.word	.LANCHOR181
+.L1540:
+	.word	.LANCHOR5
+	.word	.LANCHOR138
+	.word	.LANCHOR42
+	.word	.LANCHOR139
+	.word	.LANCHOR178
+	.word	.LC1
+	.word	.LANCHOR23
+	.word	.LC38
+	.word	.LANCHOR20
+	.word	1179929683
+	.word	.LANCHOR39
+	.word	.LANCHOR1
+	.word	.LANCHOR10
+	.word	.LANCHOR179
+	.word	.LANCHOR152
+	.word	.LANCHOR19
 	.word	.LANCHOR12
-	.word	.LANCHOR51
-	.word	.LANCHOR68
-	.word	.LANCHOR64
-	.word	.LANCHOR182
-	.word	.LANCHOR52
-	.word	.LANCHOR48
+	.word	.LANCHOR34
+	.word	.LANCHOR7
+	.word	.LANCHOR37
 	.word	.LANCHOR3
-	.word	.LANCHOR183
-	.word	.LC1
-	.word	.LANCHOR114
-	.word	.LANCHOR24
-	.word	.LANCHOR124
-	.word	.LANCHOR71
-.L1787:
-	cmp	r6, r3
-	add	r2, r2, r7
-	ite	eq
-	ldreq	r1, .L1824
-	ldrne	r1, .L1824+4
-	ldr	r1, [r1]
-	str	r1, [r2, #8]
-	ldr	r2, [sp, #48]
-	adds	r1, r2, #1
-	beq	.L1792
-	str	r2, [sp, #56]
-	add	r0, sp, #52
-	ldr	r2, [r8]
-	str	r6, [sp, #68]
-	add	r2, r2, r7
-	ldr	r1, [r2, #8]
-	ldr	r2, [r2, #12]
-	str	r1, [sp, #60]
-	movs	r1, #1
-	str	r2, [sp, #64]
-	movs	r2, #0
-	bl	FlashReadPages
-	ldr	r2, [sp, #52]
-	adds	r2, r2, #1
-	bne	.L1793
-	ldr	r1, .L1824+8
-	ldr	r2, [r1, #72]
-	adds	r2, r2, #1
-	str	r2, [r1, #72]
-.L1796:
-	ldr	r3, [sp, #12]
-	lsls	r2, r4, #9
-	cmp	r6, r3
-	bne	.L1797
-	ldr	r1, [r8]
-	ldr	r3, [sp, #24]
-	add	r7, r7, r1
-	ldr	r1, [sp, #16]
-	ldr	r0, [r7, #8]
-	add	r0, r0, r3, lsl #9
-.L1820:
-	bl	ftl_memcpy
-	b	.L1789
-.L1793:
-	ldr	r1, [r10, #8]
-	cmp	r6, r1
-	beq	.L1795
-	ldr	r0, .L1824+8
-	ldr	r2, [r0, #72]
-	adds	r2, r2, #1
-	str	r2, [r0, #72]
-	mov	r2, r6
-	ldr	r0, .L1824+12
-	bl	printf
-.L1795:
-	ldr	r2, [r10, #8]
-	cmp	r6, r2
-	beq	.L1796
-	movw	r2, #1099
-	ldr	r1, .L1824+16
-	ldr	r0, .L1824+20
-	bl	printf
-	b	.L1796
-.L1792:
-	ldr	r2, [r8]
+	.word	.LANCHOR171
+	.word	.LANCHOR51
+	.word	.LANCHOR144
+	.word	.LANCHOR52
+	.word	.LANCHOR53
+	.word	.LANCHOR84
+	.word	.LANCHOR85
+	.word	.LANCHOR89
+	.word	.LANCHOR88
+	.word	.LANCHOR90
+	.word	.LANCHOR91
+	.word	.LANCHOR92
+	.word	.LANCHOR87
+	.word	.LANCHOR82
+	.word	.LANCHOR83
+	.word	.LANCHOR106
+	.word	.LANCHOR114
+	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
+	.section	.text.FtlMapTblRecovery,"ax",%progbits
+	.align	1
+	.global	FtlMapTblRecovery
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlMapTblRecovery, %function
+FtlMapTblRecovery:
+	@ args = 0, pretend = 0, frame = 32
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, [r0, #24]
 	movs	r1, #0
-	adds	r0, r2, r7
-	ldr	r2, .L1824+24
-	ldr	r0, [r0, #8]
-	ldrh	r2, [r2]
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #40
+	mov	r4, r0
+	ldr	r8, [r0, #12]
+	movs	r7, #0
+	str	r3, [sp, #8]
+	ldr	r3, [r0, #16]
+	ldr	r6, .L1577
+	str	r3, [sp, #24]
+	ldrh	r3, [r0, #6]
+	str	r3, [sp, #12]
+	ldrh	r3, [r0, #8]
+	ldr	r0, [sp, #8]
+	str	r3, [sp, #16]
+	ldr	r3, [sp, #12]
+	lsls	r2, r3, #2
 	bl	ftl_memset
-	b	.L1796
-.L1797:
-	ldr	r1, .L1824+28
-	ldr	r3, [sp, #4]
-	ldr	r0, [r8]
-	ldrh	r1, [r1]
-	add	r7, r7, r0
-	ldr	r0, [r7, #8]
-	muls	r1, r6, r1
-	subs	r1, r1, r3
+	ldr	r3, .L1577+4
+	str	r7, [r4, #32]
+	str	r7, [r4, #28]
+	ldr	r2, [r3]
+	str	r3, [sp, #20]
+	str	r2, [r6, #8]
+	ldr	r2, .L1577+8
+	ldr	fp, [r2]
+	movw	r2, #65535
+	str	fp, [r6, #12]
+	strh	r2, [r4]	@ movhi
+	strh	r2, [r4, #2]	@ movhi
+	movs	r2, #1
+	str	r2, [r4, #36]
+.L1543:
 	ldr	r3, [sp, #16]
-	add	r1, r3, r1, lsl #9
-	b	.L1820
-.L1818:
-	ldrh	r2, [r2]
-	ldr	r3, [sp, #4]
-	ldr	r1, [r8]
-	muls	r2, r6, r2
-	add	r7, r7, r1
-	subs	r2, r2, r3
+	sxth	r5, r7
+	cmp	r5, r3
+	bge	.L1562
 	ldr	r3, [sp, #16]
-	add	r2, r3, r2, lsl #9
-	str	r2, [r7, #8]
-	b	.L1789
-.L1804:
-	ldr	r6, .L1824+32
-	mov	r4, #256
-	ldr	r7, .L1824+36
-.L1807:
-	ldrh	r3, [r6]
-	movw	r2, #65535
+	subs	r3, r3, #1
+	cmp	r5, r3
+	bne	.L1544
+	movs	r1, #1
+	ldrh	r0, [r8, r5, lsl #1]
+	bl	FtlGetLastWrittenPage
+	sxth	r3, r0
+	ldr	r6, .L1577
+	add	r10, r8, r5, lsl #1
+	strh	r7, [r4]	@ movhi
+	str	r3, [sp, #16]
+	movs	r7, #0
+	ldr	r3, [sp, #24]
+	adds	r0, r0, #1
+	strh	r0, [r4, #2]	@ movhi
+	ldr	r3, [r3, r5, lsl #2]
+	str	r3, [r4, #28]
+.L1545:
+	ldr	r3, [sp, #16]
+	sxth	r8, r7
+	cmp	r8, r3
+	ble	.L1548
+.L1562:
+	mov	r0, r4
+	bl	ftl_free_no_use_map_blk
+	ldr	r3, .L1577+12
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bne	.L1550
+	mov	r0, r4
+	bl	ftl_map_blk_alloc_new_blk
+.L1550:
+	mov	r0, r4
+	bl	ftl_map_blk_gc
+	mov	r0, r4
+	bl	ftl_map_blk_gc
+	movs	r0, #0
+	add	sp, sp, #40
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1548:
+	ldrh	r2, [r10]
+	ldr	r0, .L1577
+	orr	r2, r8, r2, lsl #10
+	str	r2, [r6, #4]
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+	ldr	r2, [r6, #12]
+	ldr	r2, [r2, #12]
+	str	r2, [sp, #20]
+	cbz	r2, .L1546
+	ldr	r3, .L1577+16
+	ldr	r0, [r6, #8]
+	ldrh	r1, [r3]
+	bl	js_hash
+	ldr	r2, [sp, #20]
+	cmp	r2, r0
+	beq	.L1546
+	str	r0, [sp, #4]
+	mov	r3, r8
+	str	r2, [sp]
+	mov	r2, r5
+	ldr	r1, .L1577+20
+	ldr	r0, .L1577+24
+	bl	printf
+	mov	r3, #-1
+	str	r3, [r6]
+.L1546:
+	ldr	r3, [r6]
+	adds	r3, r3, #1
+	beq	.L1547
+	ldrh	r3, [fp, #8]
+	ldr	r2, [sp, #12]
+	cmp	r2, r3
+	bls	.L1547
+	ldrh	r1, [fp]
+	ldrh	r2, [r4, #4]
+	cmp	r1, r2
+	ittt	eq
+	ldreq	r2, [r6, #4]
+	ldreq	r1, [sp, #8]
+	streq	r2, [r1, r3, lsl #2]
+.L1547:
+	adds	r7, r7, #1
+	b	.L1545
+.L1544:
+	ldr	r3, [sp, #20]
+	ldr	r10, .L1577+12
+	ldrh	r2, [r8, r5, lsl #1]
+	ldr	r3, [r3]
+	ldr	r0, .L1577
+	str	r3, [r6, #8]
+	add	r3, r8, r5, lsl #1
+	str	r3, [sp, #28]
+	ldrh	r3, [r10]
+	subs	r3, r3, #1
+	orr	r3, r3, r2, lsl #10
+	movs	r2, #1
+	mov	r1, r2
+	str	r3, [r6, #4]
+	bl	FlashReadPages
+	ldr	r3, [r6]
+	adds	r3, r3, #1
+	beq	.L1564
+	ldrh	r2, [fp]
+	ldrh	r3, [r4, #4]
+	cmp	r2, r3
+	bne	.L1564
+	ldrh	r2, [fp, #8]
+	movw	r3, #64245
+	cmp	r2, r3
+	beq	.L1552
+.L1564:
+	mov	r10, #0
+.L1553:
+	ldr	r2, .L1577+12
+	sxth	r3, r10
+	ldrh	r2, [r2]
 	cmp	r3, r2
-	bne	.L1805
-	ldrh	r2, [r7]
+	bge	.L1560
+	ldr	r2, [sp, #28]
+	ldr	r0, .L1577
+	str	r3, [sp, #36]
+	ldrh	r2, [r2]
+	orr	r2, r3, r2, lsl #10
+	str	r2, [r6, #4]
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+	ldr	r2, [r6, #12]
+	ldr	r2, [r2, #12]
+	str	r2, [sp, #32]
+	cbz	r2, .L1557
+	ldr	r1, .L1577+16
+	ldr	r0, [r6, #8]
+	ldrh	r1, [r1]
+	bl	js_hash
+	ldr	r2, [sp, #32]
+	cmp	r2, r0
+	beq	.L1557
+	str	r0, [sp, #4]
+	str	r2, [sp]
+	mov	r2, r5
+	ldr	r3, [sp, #36]
+	ldr	r1, .L1577+20
+	ldr	r0, .L1577+28
+	bl	printf
+	mov	r3, #-1
+	str	r3, [r6]
+.L1557:
+	ldr	r3, [r6]
+	adds	r3, r3, #1
+	beq	.L1558
+	ldrh	r3, [fp, #8]
+	ldr	r2, [sp, #12]
 	cmp	r2, r3
-	bne	.L1805
+	bls	.L1558
+	ldrh	r1, [fp]
+	ldrh	r2, [r4, #4]
+	cmp	r1, r2
+	ittt	eq
+	ldreq	r2, [r6, #4]
+	ldreq	r1, [sp, #8]
+	streq	r2, [r1, r3, lsl #2]
+.L1558:
+	add	r10, r10, #1
+	b	.L1553
+.L1552:
+	ldr	r3, [sp, #20]
+	movs	r1, #0
+	ldrh	r2, [r10]
+	ldr	r0, [r3]
+	add	lr, r2, #-1
+.L1554:
+	sxth	r3, r1
+	cmp	r3, lr
+	blt	.L1556
+.L1560:
+	adds	r7, r7, #1
+	b	.L1543
+.L1556:
+	lsls	r5, r3, #3
+	ldr	r3, [r0, r3, lsl #3]
+	ldr	r2, [sp, #12]
+	uxth	ip, r3
+	cmp	r2, ip
+	bls	.L1555
+	add	r5, r5, r0
+	ldr	r2, [sp, #8]
+	ldr	r5, [r5, #4]
+	str	r5, [r2, ip, lsl #2]
+.L1555:
+	adds	r1, r1, #1
+	b	.L1554
+.L1578:
+	.align	2
+.L1577:
+	.word	.LANCHOR138
+	.word	.LANCHOR106
+	.word	.LANCHOR114
+	.word	.LANCHOR20
+	.word	.LANCHOR23
+	.word	.LANCHOR180
+	.word	.LC39
+	.word	.LC40
+	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
+	.section	.text.FtlLoadVonderInfo,"ax",%progbits
+	.align	1
+	.global	FtlLoadVonderInfo
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlLoadVonderInfo, %function
+FtlLoadVonderInfo:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	ldr	r3, .L1580
+	ldr	r0, .L1580+4
+	ldrh	r3, [r3]
+	strh	r3, [r0, #10]	@ movhi
+	movw	r3, #61574
+	strh	r3, [r0, #4]	@ movhi
+	ldr	r3, .L1580+8
+	ldrh	r3, [r3]
+	strh	r3, [r0, #8]	@ movhi
+	ldr	r3, .L1580+12
+	ldrh	r3, [r3]
+	strh	r3, [r0, #6]	@ movhi
+	ldr	r3, .L1580+16
+	ldr	r3, [r3]
+	str	r3, [r0, #12]
+	ldr	r3, .L1580+20
+	ldr	r3, [r3]
+	str	r3, [r0, #16]
+	ldr	r3, .L1580+24
+	ldr	r3, [r3]
+	str	r3, [r0, #20]
+	ldr	r3, .L1580+28
+	ldr	r3, [r3]
+	str	r3, [r0, #24]
+	bl	FtlMapTblRecovery
 	movs	r0, #0
-	bl	List_get_gc_head_node
-	uxth	r0, r0
-	bl	FtlGcRefreshBlock
-.L1805:
-	ldr	r2, .L1824+40
-	movs	r3, #128
-	movs	r1, #1
-	mov	r0, r1
-	strh	r3, [r2]	@ movhi
-	ldr	r2, .L1824+44
-	strh	r3, [r2]	@ movhi
-	bl	rk_ftl_garbage_collect
-	movs	r1, #1
+	pop	{r3, pc}
+.L1581:
+	.align	2
+.L1580:
+	.word	.LANCHOR27
+	.word	.LANCHOR161
+	.word	.LANCHOR35
+	.word	.LANCHOR28
+	.word	.LANCHOR36
+	.word	.LANCHOR122
+	.word	.LANCHOR121
+	.word	.LANCHOR123
+	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
+	.section	.text.FtlLoadMapInfo,"ax",%progbits
+	.align	1
+	.global	FtlLoadMapInfo
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlLoadMapInfo, %function
+FtlLoadMapInfo:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	bl	FtlL2PDataInit
+	ldr	r0, .L1583
+	bl	FtlMapTblRecovery
 	movs	r0, #0
-	bl	rk_ftl_garbage_collect
-	ldrh	r3, [r5]
-	cmp	r3, #2
-	bhi	.L1806
-	subs	r4, r4, #1
-	bne	.L1807
-	b	.L1806
-.L1808:
-	mov	r0, #-1
-	b	.L1770
-.L1825:
+	pop	{r3, pc}
+.L1584:
 	.align	2
-.L1824:
-	.word	.LANCHOR118
-	.word	.LANCHOR119
-	.word	.LANCHOR81
-	.word	.LC113
-	.word	.LANCHOR183
-	.word	.LC1
-	.word	.LANCHOR23
-	.word	.LANCHOR12
-	.word	.LANCHOR80
-	.word	.LANCHOR99
-	.word	.LANCHOR83
-	.word	.LANCHOR82
-	.size	FtlWrite, .-FtlWrite
-	.section	.text.FtlMakeBbt,"ax",%progbits
+.L1583:
+	.word	.LANCHOR129
+	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
+	.section	.text.FtlSysBlkInit,"ax",%progbits
 	.align	1
-	.global	FtlMakeBbt
+	.global	FtlSysBlkInit
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlMakeBbt, %function
-FtlMakeBbt:
-	@ args = 0, pretend = 0, frame = 8
+	.type	FtlSysBlkInit, %function
+FtlSysBlkInit:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r6, #0
-	ldr	r7, .L1845
-	bl	FtlBbtMemInit
-	sub	r8, r7, #18
-	bl	FtlLoadFactoryBbt
-.L1827:
-	ldr	r3, .L1845+4
-	ldrh	r3, [r3]
-	cmp	r6, r3
-	bcc	.L1833
-	ldr	r5, .L1845+8
-	movs	r4, #0
-.L1834:
-	ldrh	r3, [r5]
-	uxth	r0, r4
-	adds	r4, r4, #1
-	cmp	r3, r0
-	bhi	.L1835
-	ldr	r4, .L1845+12
-	movw	r6, #65535
-	ldrh	r5, [r4, #12]
-	subs	r5, r5, #1
-	uxth	r5, r5
-.L1836:
-	ldrh	r3, [r4, #12]
-	subs	r3, r3, #47
-	cmp	r3, r5
-	bgt	.L1840
-	mov	r0, r5
-	bl	FtlBbmIsBadBlock
-	cmp	r0, #1
-	beq	.L1837
-	mov	r0, r5
-	bl	FlashTestBlk
-	cmp	r0, #0
-	beq	.L1838
-	mov	r0, r5
-	bl	FtlBbmMapBadBlock
-.L1837:
-	subs	r5, r5, #1
-	uxth	r5, r5
-	b	.L1836
-.L1833:
-	ldr	r3, .L1845+16
-	ldr	r5, .L1845+20
-	ldrh	r2, [r8, #2]!
-	ldr	r4, .L1845+24
-	ldr	r0, [r3]
+	push	{r3, r4, r5, r6, r7, lr}
+	movs	r3, #0
+	ldr	r4, .L1598
+	strh	r3, [r4]	@ movhi
+	ldr	r3, .L1598+4
+	ldrh	r0, [r3]
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlScanSysBlk
+	ldr	r3, .L1598+8
+	ldrh	r2, [r3]
 	movw	r3, #65535
-	ldr	r10, [r5]
 	cmp	r2, r3
-	mov	fp, r4
-	ldr	r3, .L1845+28
-	str	r0, [r4, #8]
-	str	r10, [r4, #12]
-	beq	.L1828
-	ldrh	r5, [r3]
+	bne	.L1586
+.L1588:
+	mov	r6, #-1
+.L1585:
+	mov	r0, r6
+	pop	{r3, r4, r5, r6, r7, pc}
+.L1586:
+	bl	FtlLoadSysInfo
+	mov	r6, r0
+	cmp	r0, #0
+	bne	.L1588
+	bl	FtlLoadMapInfo
+	bl	FtlLoadVonderInfo
+	bl	Ftl_load_ext_data
+	bl	FtlLoadEctTbl
+	bl	FtlFreeSysBLkSort
+	bl	SupperBlkListInit
+	bl	FtlPowerLostRecovery
+	movs	r0, #1
+	bl	FtlUpdateVaildLpn
+	ldr	r3, .L1598+12
+	movs	r0, #12
+	ldrh	r1, [r3]
+	ldr	r3, .L1598+16
+	ldr	r2, [r3]
+	mov	r3, r6
+.L1589:
+	cmp	r3, r1
+	bge	.L1594
+	mla	r5, r0, r3, r2
+	ldr	r5, [r5, #4]
+	cmp	r5, #0
+	bge	.L1590
+.L1594:
+	ldr	r0, .L1598+20
+	cmp	r3, r1
+	ldr	r2, [r0]
+	add	r2, r2, #32
+	str	r2, [r0]
+	bge	.L1596
+.L1591:
+	ldr	r5, .L1598+24
+	ldr	r4, .L1598+28
+	mov	r0, r5
+	bl	FtlSuperblockPowerLostFix
 	mov	r0, r4
-	str	r3, [sp]
-	mla	r5, r6, r5, r2
-	lsls	r2, r5, #10
-	str	r2, [r4, #4]
-	movs	r2, #1
-	mov	r1, r2
-	bl	FlashReadPages
-	ldr	r3, [sp]
-	ldr	r1, [r4, #8]
-	ldr	r0, [r7]
-	ldrh	r2, [r3]
-	adds	r2, r2, #7
-	asrs	r2, r2, #3
-	bl	ftl_memcpy
-.L1829:
-	uxth	r0, r5
-	adds	r6, r6, #1
-	adds	r7, r7, #4
-	bl	FtlBbmMapBadBlock
-	b	.L1827
-.L1828:
-	mov	r1, r6
-	str	r3, [sp]
-	bl	FlashGetBadBlockList
-	ldr	r0, [r4, #8]
-	ldr	r1, [r7]
-	bl	FtlBbt2Bitmap
-	ldr	r3, [sp]
-	str	r5, [sp, #4]
-	ldrh	r4, [r3]
-	subs	r4, r4, #1
-	uxth	r4, r4
-.L1830:
-	ldr	r3, [sp]
-	ldrh	r0, [r3]
-	smlabb	r0, r0, r6, r4
-	uxth	r0, r0
-	bl	FtlBbmIsBadBlock
-	cmp	r0, #1
-	beq	.L1831
-	ldr	r3, [sp, #4]
-	movs	r2, #16
-	movs	r1, #0
-	strh	r4, [r8]	@ movhi
-	ldr	r0, [r3]
-	bl	ftl_memset
-	ldr	r3, .L1845+16
-	mov	r2, #4096
-	movs	r1, #0
-	ldr	r0, [r3]
-	bl	ftl_memset
-	ldr	r2, [sp]
-	movw	r3, #61664
-	strh	r3, [r10]	@ movhi
+	bl	FtlSuperblockPowerLostFix
+	ldr	r3, .L1598+32
+	ldrh	r1, [r5]
+	ldrh	r0, [r5, #4]
+	ldr	r2, [r3]
+	ldrh	r3, [r2, r1, lsl #1]
+	subs	r3, r3, r0
+	ldr	r0, .L1598+36
+	strh	r3, [r2, r1, lsl #1]	@ movhi
+	ldrh	r7, [r4, #4]
+	ldrh	r3, [r0]
+	strh	r3, [r5, #2]	@ movhi
 	movs	r3, #0
-	str	r3, [r10, #4]
-	ldrh	r5, [r2]
-	ldrh	r3, [r8]
-	ldr	r1, [r7]
-	ldr	r0, [fp, #8]
-	strh	r3, [r10, #2]	@ movhi
-	mla	r5, r6, r5, r3
-	lsls	r3, r5, #10
-	str	r3, [fp, #4]
-	ldr	r3, .L1845+32
-	ldrh	r2, [r3]
-	lsls	r2, r2, #2
-	bl	ftl_memcpy
-	movs	r2, #1
-	ldr	r0, .L1845+24
-	mov	r1, r2
-	bl	FlashEraseBlocks
-	movs	r3, #1
-	ldr	r0, .L1845+24
-	mov	r2, r3
-	mov	r1, r3
-	bl	FlashProgPages
-	ldr	r3, [fp]
+	strb	r3, [r5, #6]
+	strh	r3, [r5, #4]	@ movhi
+	ldrh	r5, [r4]
+	ldrh	r1, [r2, r5, lsl #1]
+	subs	r1, r1, r7
+	strh	r1, [r2, r5, lsl #1]	@ movhi
+	ldrh	r2, [r0]
+	strb	r3, [r4, #6]
+	strh	r3, [r4, #4]	@ movhi
+	strh	r2, [r4, #2]	@ movhi
+	ldr	r2, .L1598+40
+	ldrh	r3, [r2, #30]
 	adds	r3, r3, #1
-	bne	.L1829
-	uxth	r0, r5
-	bl	FtlBbmMapBadBlock
-	b	.L1830
-.L1831:
-	subs	r4, r4, #1
-	uxth	r4, r4
-	b	.L1830
-.L1835:
-	bl	FtlBbmMapBadBlock
-	b	.L1834
-.L1838:
-	ldrh	r3, [r4]
-	cmp	r3, r6
-	bne	.L1839
-	strh	r5, [r4]	@ movhi
-	b	.L1837
-.L1839:
-	strh	r5, [r4, #4]	@ movhi
-.L1840:
-	ldr	r3, .L1845+36
-	movs	r5, #0
-	str	r5, [r4, #8]
-	movs	r1, #1
-	movs	r2, #2
-	strh	r5, [r4, #2]	@ movhi
-	ldr	r0, [r3]
-	ldrh	r3, [r4]
-	lsls	r3, r3, #10
-	str	r3, [r0, #4]
-	ldrh	r3, [r4, #4]
-	lsls	r3, r3, #10
-	str	r3, [r0, #24]
-	bl	FlashEraseBlocks
-	ldrh	r0, [r4]
-	bl	FtlBbmMapBadBlock
-	ldrh	r0, [r4, #4]
-	bl	FtlBbmMapBadBlock
-	bl	FtlBbmTblFlush
-	ldr	r3, [r4, #8]
-	ldrh	r2, [r4, #4]
-	strh	r5, [r4, #2]	@ movhi
+	strh	r3, [r2, #30]	@ movhi
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+.L1597:
+	bl	FtlVpcTblFlush
+	b	.L1585
+.L1590:
 	adds	r3, r3, #1
-	str	r3, [r4, #8]
+	b	.L1589
+.L1596:
 	ldrh	r3, [r4]
-	strh	r2, [r4]	@ movhi
-	strh	r3, [r4, #4]	@ movhi
-	bl	FtlBbmTblFlush
-	mov	r0, r5
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1846:
+	cmp	r3, #0
+	bne	.L1591
+	bl	l2p_flush
+	b	.L1597
+.L1599:
 	.align	2
-.L1845:
-	.word	.LANCHOR37+28
-	.word	.LANCHOR10
-	.word	.LANCHOR25
-	.word	.LANCHOR37
-	.word	.LANCHOR115
-	.word	.LANCHOR123
-	.word	.LANCHOR148
-	.word	.LANCHOR17
-	.word	.LANCHOR137
-	.word	.LANCHOR106
-	.size	FtlMakeBbt, .-FtlMakeBbt
+.L1598:
+	.word	.LANCHOR156
+	.word	.LANCHOR4
+	.word	.LANCHOR139
+	.word	.LANCHOR33
+	.word	.LANCHOR55
+	.word	.LANCHOR83
+	.word	.LANCHOR51
+	.word	.LANCHOR52
+	.word	.LANCHOR42
+	.word	.LANCHOR19
+	.word	.LANCHOR39
+	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.section	.text.ftl_low_format,"ax",%progbits
 	.align	1
 	.global	ftl_low_format
@@ -13981,62 +12266,62 @@ ftl_low_format:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #0
-	ldr	r6, .L1871
-	ldr	r2, .L1871+4
-	ldr	r5, .L1871+8
+	ldr	r6, .L1624
+	ldr	r2, .L1624+4
+	ldr	r5, .L1624+8
 	ldrh	r0, [r6]
 	str	r3, [r2]
 	str	r3, [r5]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	r0, .L1848
+	cbz	r0, .L1601
 	bl	FtlMakeBbt
-.L1848:
-	ldr	r3, .L1871+12
-	ldr	r2, .L1871+16
-	ldr	ip, .L1871+100
+.L1601:
+	ldr	r3, .L1624+12
+	ldr	r2, .L1624+16
+	ldr	ip, .L1624+100
 	ldrh	r1, [r3]
 	ldr	r4, [r2]
-	ldr	r2, .L1871+20
+	ldr	r2, .L1624+20
 	str	r3, [sp, #4]
 	lsls	r1, r1, #7
 	ldr	r7, [r2]
 	movs	r2, #0
-.L1849:
+.L1602:
 	uxth	r3, r2
 	adds	r2, r2, #1
 	cmp	r3, r1
-	blt	.L1850
-	ldr	r3, .L1871+24
+	blt	.L1603
+	ldr	r3, .L1624+24
 	movs	r7, #0
-	ldr	r10, .L1871+104
+	ldr	r10, .L1624+104
 	ldrh	r4, [r3]
 	mov	r8, r3
 	mov	fp, r10
-.L1851:
+.L1604:
 	ldrh	r3, [r10]
 	cmp	r3, r4
-	bhi	.L1852
-	ldr	r4, .L1871+28
+	bhi	.L1605
+	ldr	r4, .L1624+28
 	subs	r3, r7, #2
 	ldrh	r1, [r4]
 	cmp	r3, r1, lsl #1
-	bgt	.L1853
-.L1857:
+	bgt	.L1606
+.L1610:
 	movs	r6, #0
 	mov	r7, r6
-.L1854:
+.L1607:
 	ldrh	r3, [r8]
 	uxth	r0, r6
 	adds	r6, r6, #1
 	cmp	r3, r0
-	bhi	.L1858
+	bhi	.L1611
 	ldrh	r2, [fp]
-	ldr	r3, .L1871+32
+	ldr	r3, .L1624+32
 	ldrh	r4, [r4]
-	ldr	r6, .L1871+36
+	ldr	r6, .L1624+36
 	str	r2, [r3]
-	ldr	r3, .L1871+40
+	ldr	r3, .L1624+40
 	mov	r1, r4
 	ldr	r2, [r3]
 	mov	r0, r2
@@ -14046,13 +12331,13 @@ ftl_low_format:
 	mov	r3, r0
 	str	r0, [r6]
 	add	r1, r10, #36
-	ldr	r0, .L1871+44
+	ldr	r0, .L1624+44
 	strh	r1, [r0]	@ movhi
 	movs	r1, #24
 	muls	r1, r4, r1
 	str	r0, [sp]
 	cmp	r7, r1
-	ble	.L1859
+	ble	.L1612
 	ldr	r2, [sp, #12]
 	mov	r1, r4
 	str	r3, [sp, #8]
@@ -14064,11 +12349,11 @@ ftl_low_format:
 	adds	r0, r0, #24
 	strh	r0, [r3]	@ movhi
 	ldr	r3, [sp, #8]
-.L1859:
-	ldr	r2, .L1871+48
+.L1612:
+	ldr	r2, .L1624+48
 	ldrh	r2, [r2]
-	cbz	r2, .L1861
-	ldr	r1, .L1871+44
+	cbz	r2, .L1614
+	ldr	r1, .L1624+44
 	ldrh	r0, [r1]
 	add	r0, r0, r2, lsr #1
 	strh	r0, [r1]	@ movhi
@@ -14079,24 +12364,24 @@ ftl_low_format:
 	strlt	r3, [r6]
 	addlt	r2, r2, r10
 	strhlt	r2, [r1]	@ movhi
-.L1861:
+.L1614:
 	ldr	r3, [sp]
-	ldr	r7, .L1871+52
-	ldr	r10, .L1871+108
+	ldr	r7, .L1624+52
+	ldr	r10, .L1624+108
 	ldrh	r2, [r3]
 	ldr	r3, [r6]
 	subs	r3, r3, r2
 	muls	r4, r3, r4
-	ldr	r3, .L1871+56
+	ldr	r3, .L1624+56
 	ldrh	r3, [r3]
 	str	r4, [r7]
 	muls	r4, r3, r4
 	ldr	r3, [sp, #4]
 	ldrh	r3, [r3]
 	str	r4, [r6]
-	ldr	r6, .L1871+60
+	ldr	r6, .L1624+60
 	muls	r4, r3, r4
-	ldr	r3, .L1871+64
+	ldr	r3, .L1624+64
 	str	r4, [r3]
 	movw	r4, #65535
 	bl	FtlBbmTblFlush
@@ -14105,13 +12390,13 @@ ftl_low_format:
 	ldr	r0, [r10]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-	ldr	r2, .L1871+68
+	ldr	r2, .L1624+68
 	movs	r3, #0
 	strh	r3, [r6, #2]	@ movhi
 	movs	r1, #255
 	strb	r3, [r6, #6]
 	str	r3, [r2]
-	ldr	r2, .L1871+72
+	ldr	r2, .L1624+72
 	strh	r3, [r6]	@ movhi
 	strh	r3, [r2, #2]	@ movhi
 	strb	r3, [r2, #6]
@@ -14122,30 +12407,30 @@ ftl_low_format:
 	mov	r8, r10
 	strb	r3, [r6, #8]
 	mov	r10, r6
-	ldr	r3, .L1871+76
+	ldr	r3, .L1624+76
 	lsrs	r2, r2, #3
 	ldr	r0, [r3]
 	bl	ftl_memset
-.L1863:
+.L1616:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r6, #7]	@ zero_extendqisi2
 	ldrh	r2, [r6]
 	cmp	r3, #0
-	bne	.L1864
+	bne	.L1617
 	ldr	r3, [r8]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r6]
 	adds	r3, r3, #1
 	strh	r3, [r6]	@ movhi
-	b	.L1863
-.L1850:
+	b	.L1616
+.L1603:
 	mvns	r0, r3
 	orr	r0, r3, r0, lsl #16
 	str	r0, [r4, r3, lsl #2]
 	str	ip, [r7, r3, lsl #2]
-	b	.L1849
-.L1852:
+	b	.L1602
+.L1605:
 	mov	r0, r4
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
@@ -14153,11 +12438,11 @@ ftl_low_format:
 	add	r7, r7, r0
 	uxth	r7, r7
 	uxth	r4, r4
-	b	.L1851
-.L1853:
+	b	.L1604
+.L1606:
 	mov	r0, r7
 	bl	__aeabi_uidiv
-	ldr	r3, .L1871+80
+	ldr	r3, .L1624+80
 	ldr	r3, [r3]
 	add	r0, r0, r3
 	uxth	r0, r0
@@ -14165,26 +12450,26 @@ ftl_low_format:
 	ldrh	r0, [r6]
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	r6, [r8]
-.L1855:
+.L1608:
 	ldrh	r3, [fp]
 	cmp	r3, r6
-	bls	.L1857
+	bls	.L1610
 	mov	r0, r6
 	movs	r1, #1
 	adds	r6, r6, #1
 	bl	FtlLowFormatEraseBlock
 	uxth	r6, r6
-	b	.L1855
-.L1858:
+	b	.L1608
+.L1611:
 	movs	r1, #0
 	bl	FtlLowFormatEraseBlock
 	add	r7, r7, r0
 	uxth	r7, r7
-	b	.L1854
-.L1864:
+	b	.L1607
+.L1617:
 	ldr	r3, [r5]
 	ldrh	r1, [r6, #4]
-	ldr	r4, .L1871+84
+	ldr	r4, .L1624+84
 	str	r3, [r6, #12]
 	adds	r3, r3, #1
 	str	r3, [r5]
@@ -14200,19 +12485,19 @@ ftl_low_format:
 	strh	r3, [r4]	@ movhi
 	movs	r3, #1
 	strb	r3, [r4, #8]
-.L1865:
+.L1618:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r4]
-	cbnz	r3, .L1866
+	cbnz	r3, .L1619
 	ldr	r3, [r8]
 	strh	r6, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	b	.L1865
-.L1866:
+	b	.L1618
+.L1619:
 	ldr	r3, [r5]
 	ldrh	r1, [r4, #4]
 	str	r3, [r4, #12]
@@ -14221,10 +12506,10 @@ ftl_low_format:
 	movw	r4, #65535
 	ldr	r3, [r8]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L1871+88
+	ldr	r3, .L1624+88
 	strh	r4, [r3]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L1871+92
+	ldr	r3, .L1624+92
 	movs	r2, #0
 	strh	r2, [r3, #2]	@ movhi
 	ldr	r2, [r7]
@@ -14237,61 +12522,115 @@ ftl_low_format:
 	str	r2, [r5]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	r0, .L1867
-	ldr	r3, .L1871+96
+	cbnz	r0, .L1620
+	ldr	r3, .L1624+96
 	movs	r2, #1
 	str	r2, [r3]
-.L1867:
+.L1620:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1872:
+.L1625:
 	.align	2
-.L1871:
+.L1624:
 	.word	.LANCHOR4
-	.word	.LANCHOR71
-	.word	.LANCHOR70
+	.word	.LANCHOR83
+	.word	.LANCHOR82
 	.word	.LANCHOR12
-	.word	.LANCHOR118
-	.word	.LANCHOR119
+	.word	.LANCHOR109
+	.word	.LANCHOR110
 	.word	.LANCHOR5
 	.word	.LANCHOR3
-	.word	.LANCHOR111
-	.word	.LANCHOR61
+	.word	.LANCHOR99
+	.word	.LANCHOR152
 	.word	.LANCHOR7
-	.word	.LANCHOR78
+	.word	.LANCHOR171
 	.word	.LANCHOR15
-	.word	.LANCHOR152
+	.word	.LANCHOR179
 	.word	.LANCHOR19
 	.word	.LANCHOR51
 	.word	.LANCHOR34
 	.word	.LANCHOR59
-	.word	.LANCHOR80
+	.word	.LANCHOR144
 	.word	.LANCHOR1
 	.word	.LANCHOR31
 	.word	.LANCHOR52
 	.word	.LANCHOR53
-	.word	.LANCHOR79
-	.word	.LANCHOR86
+	.word	.LANCHOR139
+	.word	.LANCHOR166
 	.word	168778952
 	.word	.LANCHOR6
 	.word	.LANCHOR42
 	.size	ftl_low_format, .-ftl_low_format
-	.section	.text.ftl_memcmp,"ax",%progbits
+	.section	.text.sftl_init,"ax",%progbits
 	.align	1
-	.global	ftl_memcmp
+	.global	sftl_init
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_memcmp, %function
-ftl_memcmp:
+	.type	sftl_init, %function
+sftl_init:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	memcmp
-	.size	ftl_memcmp, .-ftl_memcmp
+	push	{r4, r5, r6, lr}
+	mov	r3, #-1
+	ldr	r4, .L1643
+	movs	r6, #0
+	ldr	r1, .L1643+4
+	ldr	r0, .L1643+8
+	str	r3, [r4]
+	bl	printf
+	ldr	r0, .L1643+12
+	bl	FtlConstantsInit
+	ldr	r5, .L1643+16
+	bl	FtlMemInit
+	bl	FtlVariablesInit
+	ldr	r3, .L1643+20
+	ldrh	r0, [r3]
+	bl	FtlFreeSysBlkQueueInit
+.L1627:
+	bl	FtlLoadBbt
+	cbz	r0, .L1628
+.L1642:
+	ldr	r3, [r5]
+	cmp	r3, #1
+	bne	.L1627
+	str	r6, [r5]
+	bl	ftl_low_format
+	b	.L1627
+.L1628:
+	bl	FtlSysBlkInit
+	cmp	r0, #0
+	bne	.L1642
+	movs	r3, #1
+	str	r3, [r4]
+	ldr	r3, .L1643+24
+	ldrh	r3, [r3]
+	cmp	r3, #15
+	bhi	.L1640
+	movw	r4, #8129
+.L1634:
+	movs	r1, #1
+	movs	r0, #0
+	bl	rk_ftl_garbage_collect
+	subs	r4, r4, #1
+	bne	.L1634
+.L1640:
+	movs	r0, #0
+	pop	{r4, r5, r6, pc}
+.L1644:
+	.align	2
+.L1643:
+	.word	.LANCHOR166
+	.word	.LC41
+	.word	.LC34
+	.word	.LANCHOR0
+	.word	.LANCHOR181
+	.word	.LANCHOR4
+	.word	.LANCHOR48
+	.size	sftl_init, .-sftl_init
 	.section	.text.FtlWriteToIDB,"ax",%progbits
 	.align	1
 	.global	FtlWriteToIDB
@@ -14311,33 +12650,33 @@ FtlWriteToIDB:
 	mov	r4, r0
 	mov	r6, r1
 	mov	r7, r2
-	ldr	r5, .L1946
-	bls	.L1875
+	ldr	r5, .L1715
+	bls	.L1646
 	cmp	r0, #576
-	bcc	.L1876
-.L1875:
+	bcc	.L1647
+.L1646:
 	ldr	r3, [r5]
-	cbnz	r3, .L1877
-.L1945:
+	cbnz	r3, .L1648
+.L1714:
 	movs	r4, #0
-	b	.L1874
-.L1877:
-	ldr	r3, .L1946+4
+	b	.L1645
+.L1648:
+	ldr	r3, .L1715+4
 	ldr	r3, [r3]
 	ldr	r2, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L1946+8
+	ldr	r3, .L1715+8
 	cmp	r2, r3
-	bne	.L1879
-	ldr	r3, .L1946+12
+	bne	.L1650
+	ldr	r3, .L1715+12
 	movs	r2, #0
 	ldrh	r1, [r3, #10]
 	ldr	r3, [sp, #12]
 	add	r0, r3, #262144
 	movw	r3, #65535
-.L1883:
+.L1654:
 	ldr	r4, [r0, #-4]
-	cbnz	r4, .L1880
+	cbnz	r4, .L1651
 	ldr	r4, [sp, #12]
 	subs	r3, r3, #1
 	ldr	r4, [r4, r2, lsl #2]
@@ -14347,18 +12686,18 @@ FtlWriteToIDB:
 	movhi	r2, #0
 	cmp	r3, #4096
 	str	r4, [r0, #-4]!
-	bne	.L1883
+	bne	.L1654
 	mov	r3, #512
-	b	.L1942
-.L1880:
+	b	.L1711
+.L1651:
 	adds	r3, r3, #127
 	lsrs	r3, r3, #7
-.L1942:
+.L1711:
 	str	r3, [sp, #16]
 	lsls	r1, r1, #2
 	ldr	r3, [sp, #16]
 	uxth	r1, r1
-	ldr	r4, .L1946+16
+	ldr	r4, .L1715+16
 	adds	r0, r3, #4
 	bl	__aeabi_uidiv
 	adds	r3, r0, #1
@@ -14369,76 +12708,68 @@ FtlWriteToIDB:
 	movs	r3, #0
 	mov	r10, r3
 	str	r3, [sp, #20]
-.L1906:
-	ldr	r3, .L1946+20
+.L1676:
+	ldr	r3, .L1715+20
 	mov	r2, #512
 	movs	r1, #0
 	ldr	r0, [r3]
 	bl	memset
-	ldr	r3, .L1946+12
+	ldr	r3, .L1715+12
 	ldrh	r6, [r3, #10]
 	ldr	r3, [r4, #16]
 	mul	fp, r10, r6
 	cmp	r3, #0
-	beq	.L1914
+	beq	.L1684
 	ldr	r3, [r4, #20]
 	cmp	r3, #0
 	ite	eq
 	moveq	r3, #6
 	movne	r3, #9
-.L1943:
+.L1712:
 	str	r3, [sp, #28]
 	mov	r1, fp
-	ldr	r3, .L1946+16
+	ldr	r3, .L1715+16
 	movs	r0, #0
 	ldr	r3, [r3, #4]
 	blx	r3
 	ldr	r3, [sp, #24]
 	cmp	r3, #1
-	beq	.L1885
-	ldr	r3, .L1946+16
+	beq	.L1656
+	ldr	r3, .L1715+16
 	add	r1, r6, fp
 	movs	r0, #0
 	ldr	r3, [r3, #4]
 	blx	r3
-.L1885:
+.L1656:
 	ldr	r3, [sp, #28]
 	cmp	r3, #9
-	bne	.L1916
-	ldr	r3, .L1946+20
+	bne	.L1686
+	ldr	r3, .L1715+20
 	mov	r2, #1024
 	movs	r1, #0
 	ldr	r5, [r3]
 	mov	r0, r5
 	bl	ftl_memset
-	ldr	r2, .L1946+24
-	movs	r3, #12
-	add	r1, r5, #11
-	add	r0, r5, #23
-	stm	r5, {r2, r3}
 	movs	r2, #4
+	ldr	r3, .L1715+24
 	strb	r2, [r5, #17]
+	movs	r1, #12
+	ldr	r2, .L1715+12
+	adds	r0, r5, r1
+	str	r3, [r5]
 	movs	r3, #0
-	ldr	r2, .L1946+12
+	str	r1, [r5, #4]
+	ldrh	r2, [r2, #10]
 	str	r3, [r5, #12]
 	strb	r3, [r5, #16]
-	ldrh	r2, [r2, #10]
-	strb	r3, [r5, #20]
-	strh	r3, [r5, #22]	@ movhi
-	ldr	r3, .L1946+28
 	strh	r2, [r5, #18]	@ movhi
 	movs	r2, #16
+	strb	r3, [r5, #20]
 	strb	r2, [r5, #21]
-.L1887:
-	lsrs	r2, r3, #2
-	ldrb	ip, [r1, #1]!	@ zero_extendqisi2
-	add	r2, r2, r3, lsl #5
-	cmp	r0, r1
-	add	r2, r2, ip
-	eor	r3, r3, r2
-	bne	.L1887
-	str	r3, [r5, #8]
-.L1886:
+	strh	r3, [r5, #22]	@ movhi
+	bl	js_hash
+	str	r0, [r5, #8]
+.L1657:
 	ldr	r3, [sp, #24]
 	mov	r8, fp
 	muls	r3, r6, r3
@@ -14446,10 +12777,10 @@ FtlWriteToIDB:
 	str	r3, [sp, #40]
 	ldr	r3, [sp, #12]
 	str	r3, [sp, #32]
-.L1888:
+.L1658:
 	ldr	r3, [sp, #40]
 	cmp	r6, r3
-	beq	.L1895
+	beq	.L1665
 	ldr	r3, [sp, #28]
 	cmp	r3, #9
 	itet	ne
@@ -14460,10 +12791,10 @@ FtlWriteToIDB:
 	movw	r3, #61424
 	str	r3, [sp, #52]
 	cmp	r6, #0
-	bne	.L1891
+	bne	.L1661
 	ldr	r3, [sp, #28]
 	cmp	r3, #9
-	bne	.L1891
+	bne	.L1661
 	ldr	r3, [r4, #16]
 	movs	r0, #70
 	blx	r3
@@ -14473,40 +12804,40 @@ FtlWriteToIDB:
 	mov	r0, r6
 	ldr	r7, [r4, #8]
 	blx	r7
-	ldr	r2, .L1946+12
+	ldr	r2, .L1715+12
 	str	r0, [sp, #44]
 	ldr	r3, [r4, #16]
 	ldrb	r0, [r2, #22]	@ zero_extendqisi2
 	blx	r3
 	ldr	r2, [sp, #44]
 	adds	r2, r2, #1
-	bne	.L1892
-.L1895:
-	ldr	r3, .L1946+20
+	bne	.L1662
+.L1665:
+	ldr	r3, .L1715+20
 	ldr	r2, [r4, #16]
 	ldr	r6, [r3]
-	ldr	r3, .L1946+12
+	ldr	r3, .L1715+12
 	ldrb	r3, [r3, #14]	@ zero_extendqisi2
 	str	r3, [sp, #28]
-	ldr	r3, .L1946+12
+	ldr	r3, .L1715+12
 	ldrh	r3, [r3, #10]
 	mul	r8, r10, r3
 	cmp	r2, #0
-	bne	.L1893
+	bne	.L1663
 	mov	fp, #6
-.L1894:
+.L1664:
 	ldr	r2, [sp, #24]
 	movs	r5, #0
 	muls	r3, r2, r3
 	str	r3, [sp, #32]
-.L1897:
+.L1667:
 	ldr	r3, [sp, #32]
 	cmp	r5, r3
-	beq	.L1901
+	beq	.L1671
 	cmp	r5, #0
-	bne	.L1898
+	bne	.L1668
 	cmp	fp, #9
-	bne	.L1898
+	bne	.L1668
 	ldr	r3, [r4, #16]
 	movs	r0, #70
 	blx	r3
@@ -14522,77 +12853,77 @@ FtlWriteToIDB:
 	ldr	r3, [r4, #20]
 	ldr	r0, [sp, #28]
 	blx	r3
-	ldr	r2, .L1946+12
+	ldr	r2, .L1715+12
 	ldr	r3, [r4, #16]
 	ldrb	r0, [r2, #22]	@ zero_extendqisi2
 	blx	r3
 	ldr	r3, [r6]
-	ldr	r2, .L1946+24
+	ldr	r2, .L1715+24
 	cmp	r3, r2
-	beq	.L1899
-.L1901:
-	ldr	r3, .L1946+20
+	beq	.L1669
+.L1671:
+	ldr	r3, .L1715+20
 	movs	r5, #0
 	ldr	r1, [sp, #12]
 	ldr	r0, [r3]
-.L1900:
+.L1670:
 	mov	r8, r1
 	ldr	r2, [r0, r5, lsl #2]
 	ldr	r3, [r8]
 	lsls	r6, r5, #2
 	adds	r1, r1, #4
 	cmp	r2, r3
-	beq	.L1903
+	beq	.L1673
 	mov	r2, #512
 	movs	r1, #0
 	bl	memset
-	ldr	r3, .L1946+20
+	ldr	r3, .L1715+20
 	mov	r1, r10
-	ldr	r0, .L1946+32
+	ldr	r0, .L1715+28
 	ldr	r2, [r3]
 	str	r5, [sp]
 	ldr	r3, [r8]
 	ldr	r2, [r2, r6]
 	bl	printf
-	ldr	r3, .L1946+12
+	ldr	r3, .L1715+12
 	movs	r0, #0
 	ldrh	r1, [r3, #10]
 	ldr	r3, [r4, #4]
 	mul	r1, r10, r1
 	blx	r3
-.L1904:
+.L1674:
 	ldr	r3, [sp, #24]
 	add	r10, r10, r3
 	cmp	r10, #15
-	bls	.L1906
+	bls	.L1676
 	ldr	r3, [sp, #20]
-	cbnz	r3, .L1907
-.L1879:
+	cbnz	r3, .L1677
+.L1650:
 	mov	r3, #-1
 	str	r3, [sp, #16]
-.L1907:
-	ldr	r3, .L1946
+.L1677:
+	ldr	r3, .L1715
 	movs	r2, #0
 	ldr	r4, [sp, #16]
 	str	r2, [r3]
-	ldr	r3, .L1946+4
+	ldr	r3, .L1715+4
 	ldr	r0, [r3]
 	bl	free
-	ldr	r3, .L1946+20
+	ldr	r3, .L1715+20
 	ldr	r0, [r3]
 	bl	free
-.L1874:
+.L1645:
 	mov	r0, r4
 	add	sp, sp, #112
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1914:
+.L1684:
 	movs	r3, #6
-	b	.L1943
-.L1916:
+	b	.L1712
+.L1686:
 	movs	r5, #0
-	b	.L1886
-.L1891:
+	b	.L1657
+.L1661:
 	add	r3, sp, #48
 	ldr	r2, [sp, #32]
 	mov	r1, r8
@@ -14600,34 +12931,22 @@ FtlWriteToIDB:
 	ldr	r7, [r4, #8]
 	blx	r7
 	adds	r0, r0, #1
-	beq	.L1895
+	beq	.L1665
 	ldr	r3, [sp, #32]
 	add	r3, r3, #2048
 	str	r3, [sp, #32]
-.L1892:
+.L1662:
 	adds	r6, r6, #1
 	add	r8, r8, #1
-	b	.L1888
-.L1893:
+	b	.L1658
+.L1663:
 	ldr	r2, [r4, #20]
 	cmp	r2, #0
 	ite	eq
 	moveq	fp, #6
 	movne	fp, #9
-	b	.L1894
-.L1947:
-	.align	2
-.L1946:
-	.word	.LANCHOR184
-	.word	.LANCHOR185
-	.word	-52655045
-	.word	.LANCHOR0
-	.word	.LANCHOR105
-	.word	.LANCHOR186
-	.word	1179535694
-	.word	1204201446
-	.word	.LC114
-.L1898:
+	b	.L1664
+.L1668:
 	add	r3, sp, #48
 	mov	r2, r6
 	add	r1, r8, r5
@@ -14635,54 +12954,65 @@ FtlWriteToIDB:
 	ldr	r7, [r4, #12]
 	blx	r7
 	adds	r0, r0, #1
-	beq	.L1901
+	beq	.L1671
 	ldr	r2, [sp, #52]
 	movw	r3, #61424
 	cmp	r2, r3
-	bne	.L1901
+	bne	.L1671
 	add	r6, r6, #2048
-.L1899:
+.L1669:
 	adds	r5, r5, #1
-	b	.L1897
-.L1903:
+	b	.L1667
+.L1716:
+	.align	2
+.L1715:
+	.word	.LANCHOR182
+	.word	.LANCHOR183
+	.word	-52655045
+	.word	.LANCHOR0
+	.word	.LANCHOR78
+	.word	.LANCHOR184
+	.word	1179535694
+	.word	.LC42
+.L1673:
 	ldr	r3, [sp, #36]
 	adds	r5, r5, #1
 	cmp	r5, r3
-	bne	.L1900
+	bne	.L1670
 	ldr	r3, [sp, #20]
 	adds	r3, r3, #1
 	cmp	r3, #5
 	str	r3, [sp, #20]
-	bls	.L1904
-	b	.L1907
-.L1876:
+	bls	.L1674
+	b	.L1677
+.L1647:
 	cmp	r0, #64
-	bne	.L1908
-	ldr	fp, .L1948+4
+	bne	.L1678
+	ldr	fp, .L1717+4
 	mov	r0, #262144
 	bl	ftl_malloc
 	str	r0, [fp]
 	mov	r0, #262144
 	bl	ftl_malloc
-	ldr	r3, .L1948
+	ldr	r3, .L1717
 	str	r0, [r3]
 	ldr	r3, [fp]
-	cbz	r3, .L1909
-	cbz	r0, .L1909
+	cbz	r3, .L1679
+	cbz	r0, .L1679
 	movs	r2, #1
 	movs	r1, #0
 	str	r2, [r5]
 	mov	r0, r3
 	mov	r2, #262144
 	bl	ftl_memset
-.L1908:
+.L1678:
 	ldr	r3, [r5]
 	cmp	r3, #0
-	beq	.L1945
-	ldr	r3, .L1948+4
+	beq	.L1714
+	ldr	r3, .L1717+4
 	cmp	r4, #63
 	iteee	hi
-	ldrhi	r5, .L1948+8
+	ldrhi	r5, .L1717+8
 	rsbls	r4, r4, #64
 	subls	r6, r6, r4
 	addls	r7, r7, r4, lsl #9
@@ -14690,7 +13020,7 @@ FtlWriteToIDB:
 	mov	r2, #262144
 	it	hi
 	addhi	r5, r5, r4
-	ldr	r0, .L1948+12
+	ldr	r0, .L1717+12
 	ite	ls
 	movls	r5, r1
 	addhi	r5, r1, r5, lsl #9
@@ -14705,21 +13035,21 @@ FtlWriteToIDB:
 	mov	r1, r7
 	mov	r0, r5
 	bl	ftl_memcpy
-	b	.L1945
-.L1909:
-	ldr	r1, .L1948+16
-	ldr	r0, .L1948+20
+	b	.L1714
+.L1679:
+	ldr	r1, .L1717+16
+	ldr	r0, .L1717+20
 	bl	printf
-	b	.L1908
-.L1949:
+	b	.L1678
+.L1718:
 	.align	2
-.L1948:
-	.word	.LANCHOR186
-	.word	.LANCHOR185
+.L1717:
+	.word	.LANCHOR184
+	.word	.LANCHOR183
 	.word	8388544
-	.word	.LC116
-	.word	.LANCHOR187
-	.word	.LC115
+	.word	.LC44
+	.word	.LANCHOR185
+	.word	.LC43
 	.size	FtlWriteToIDB, .-FtlWriteToIDB
 	.section	.text.sftl_write,"ax",%progbits
 	.align	1
@@ -14751,6 +13081,7 @@ sftl_write:
 	.global	FtlUpdateVaildLpnCount
 	.global	g_ect_tbl_power_up_flush
 	.global	power_up_flag
+	.global	low_format_en
 	.global	gFtlInitStatus
 	.global	DeviceCapacity
 	.global	g_power_lost_recovery_flag
@@ -14909,7 +13240,7 @@ FtlUpdateVaildLpnCount:
 	.space	2
 	.section	.bss.c_ftl_nand_bbm_buf_size,"aw",%nobits
 	.align	1
-	.set	.LANCHOR137,. + 0
+	.set	.LANCHOR127,. + 0
 	.type	c_ftl_nand_bbm_buf_size, %object
 	.size	c_ftl_nand_bbm_buf_size, 2
 c_ftl_nand_bbm_buf_size:
@@ -14958,7 +13289,7 @@ c_ftl_nand_data_blks_per_plane:
 	.space	2
 	.section	.bss.c_ftl_nand_data_op_blks_per_plane,"aw",%nobits
 	.align	1
-	.set	.LANCHOR78,. + 0
+	.set	.LANCHOR171,. + 0
 	.type	c_ftl_nand_data_op_blks_per_plane, %object
 	.size	c_ftl_nand_data_op_blks_per_plane, 2
 c_ftl_nand_data_op_blks_per_plane:
@@ -15126,7 +13457,7 @@ c_ftl_vendor_part_size:
 	.space	2
 	.section	.bss.c_gc_page_buf_num,"aw",%nobits
 	.align	2
-	.set	.LANCHOR94,. + 0
+	.set	.LANCHOR67,. + 0
 	.type	c_gc_page_buf_num, %object
 	.size	c_gc_page_buf_num, 4
 c_gc_page_buf_num:
@@ -15146,7 +13477,7 @@ check_vpc_table:
 	.space	16384
 	.section	.bss.ftl_gc_temp_power_lost_recovery_flag,"aw",%nobits
 	.align	2
-	.set	.LANCHOR144,. + 0
+	.set	.LANCHOR133,. + 0
 	.type	ftl_gc_temp_power_lost_recovery_flag, %object
 	.size	ftl_gc_temp_power_lost_recovery_flag, 4
 ftl_gc_temp_power_lost_recovery_flag:
@@ -15160,11 +13491,11 @@ gBbtInfo:
 	.space	60
 	.section	.bss.gL2pMapInfo,"aw",%nobits
 	.align	2
-	.set	.LANCHOR140,. + 0
+	.set	.LANCHOR129,. + 0
 	.type	gL2pMapInfo, %object
-	.size	gL2pMapInfo, 40
+	.size	gL2pMapInfo, 44
 gL2pMapInfo:
-	.space	40
+	.space	44
 	.section	.bss.gSysFreeQueue,"aw",%nobits
 	.align	1
 	.set	.LANCHOR38,. + 0
@@ -15174,28 +13505,28 @@ gSysFreeQueue:
 	.space	2056
 	.section	.bss.gSysInfo,"aw",%nobits
 	.align	2
-	.set	.LANCHOR79,. + 0
+	.set	.LANCHOR139,. + 0
 	.type	gSysInfo, %object
-	.size	gSysInfo, 12
+	.size	gSysInfo, 16
 gSysInfo:
-	.space	12
+	.space	16
 	.section	.bss.gVendorBlkInfo,"aw",%nobits
 	.align	2
-	.set	.LANCHOR158,. + 0
+	.set	.LANCHOR161,. + 0
 	.type	gVendorBlkInfo, %object
-	.size	gVendorBlkInfo, 40
+	.size	gVendorBlkInfo, 44
 gVendorBlkInfo:
-	.space	40
+	.space	44
 	.section	.bss.g_GlobalDataVersion,"aw",%nobits
 	.align	2
-	.set	.LANCHOR71,. + 0
+	.set	.LANCHOR83,. + 0
 	.type	g_GlobalDataVersion, %object
 	.size	g_GlobalDataVersion, 4
 g_GlobalDataVersion:
 	.space	4
 	.section	.bss.g_GlobalSysVersion,"aw",%nobits
 	.align	2
-	.set	.LANCHOR70,. + 0
+	.set	.LANCHOR82,. + 0
 	.type	g_GlobalSysVersion, %object
 	.size	g_GlobalSysVersion, 4
 g_GlobalSysVersion:
@@ -15209,14 +13540,14 @@ g_MaxLbaSector:
 	.space	4
 	.section	.bss.g_MaxLbn,"aw",%nobits
 	.align	2
-	.set	.LANCHOR152,. + 0
+	.set	.LANCHOR179,. + 0
 	.type	g_MaxLbn, %object
 	.size	g_MaxLbn, 4
 g_MaxLbn:
 	.space	4
 	.section	.bss.g_MaxLpn,"aw",%nobits
 	.align	2
-	.set	.LANCHOR61,. + 0
+	.set	.LANCHOR152,. + 0
 	.type	g_MaxLpn, %object
 	.size	g_MaxLpn, 4
 g_MaxLpn:
@@ -15244,147 +13575,147 @@ g_buffer_superblock:
 	.space	48
 	.section	.bss.g_cur_erase_blk,"aw",%nobits
 	.align	2
-	.set	.LANCHOR111,. + 0
+	.set	.LANCHOR99,. + 0
 	.type	g_cur_erase_blk, %object
 	.size	g_cur_erase_blk, 4
 g_cur_erase_blk:
 	.space	4
 	.section	.bss.g_ect_tbl_info_size,"aw",%nobits
 	.align	1
-	.set	.LANCHOR125,. + 0
+	.set	.LANCHOR116,. + 0
 	.type	g_ect_tbl_info_size, %object
 	.size	g_ect_tbl_info_size, 2
 g_ect_tbl_info_size:
 	.space	2
 	.section	.bss.g_ect_tbl_power_up_flush,"aw",%nobits
 	.align	1
-	.set	.LANCHOR170,. + 0
+	.set	.LANCHOR164,. + 0
 	.type	g_ect_tbl_power_up_flush, %object
 	.size	g_ect_tbl_power_up_flush, 2
 g_ect_tbl_power_up_flush:
 	.space	2
 	.section	.bss.g_ftl_nand_free_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR181,. + 0
+	.set	.LANCHOR176,. + 0
 	.type	g_ftl_nand_free_count, %object
 	.size	g_ftl_nand_free_count, 4
 g_ftl_nand_free_count:
 	.space	4
 	.section	.bss.g_gc_bad_block_gc_index,"aw",%nobits
 	.align	1
-	.set	.LANCHOR103,. + 0
+	.set	.LANCHOR76,. + 0
 	.type	g_gc_bad_block_gc_index, %object
 	.size	g_gc_bad_block_gc_index, 2
 g_gc_bad_block_gc_index:
 	.space	2
 	.section	.bss.g_gc_bad_block_temp_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR101,. + 0
+	.set	.LANCHOR74,. + 0
 	.type	g_gc_bad_block_temp_num, %object
 	.size	g_gc_bad_block_temp_num, 2
 g_gc_bad_block_temp_num:
 	.space	2
 	.section	.bss.g_gc_bad_block_temp_tbl,"aw",%nobits
 	.align	1
-	.set	.LANCHOR102,. + 0
+	.set	.LANCHOR75,. + 0
 	.type	g_gc_bad_block_temp_tbl, %object
 	.size	g_gc_bad_block_temp_tbl, 34
 g_gc_bad_block_temp_tbl:
 	.space	34
 	.section	.bss.g_gc_blk_index,"aw",%nobits
 	.align	1
-	.set	.LANCHOR85,. + 0
+	.set	.LANCHOR102,. + 0
 	.type	g_gc_blk_index, %object
 	.size	g_gc_blk_index, 2
 g_gc_blk_index:
 	.space	2
 	.section	.bss.g_gc_blk_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR96,. + 0
+	.set	.LANCHOR69,. + 0
 	.type	g_gc_blk_num, %object
 	.size	g_gc_blk_num, 2
 g_gc_blk_num:
 	.space	2
 	.section	.bss.g_gc_cur_blk_max_valid_pages,"aw",%nobits
 	.align	1
-	.set	.LANCHOR179,. + 0
+	.set	.LANCHOR174,. + 0
 	.type	g_gc_cur_blk_max_valid_pages, %object
 	.size	g_gc_cur_blk_max_valid_pages, 2
 g_gc_cur_blk_max_valid_pages:
 	.space	2
 	.section	.bss.g_gc_cur_blk_valid_pages,"aw",%nobits
 	.align	1
-	.set	.LANCHOR178,. + 0
+	.set	.LANCHOR173,. + 0
 	.type	g_gc_cur_blk_valid_pages, %object
 	.size	g_gc_cur_blk_valid_pages, 2
 g_gc_cur_blk_valid_pages:
 	.space	2
 	.section	.bss.g_gc_free_blk_threshold,"aw",%nobits
 	.align	1
-	.set	.LANCHOR82,. + 0
+	.set	.LANCHOR100,. + 0
 	.type	g_gc_free_blk_threshold, %object
 	.size	g_gc_free_blk_threshold, 2
 g_gc_free_blk_threshold:
 	.space	2
 	.section	.bss.g_gc_head_data_block,"aw",%nobits
 	.align	2
-	.set	.LANCHOR109,. + 0
+	.set	.LANCHOR96,. + 0
 	.type	g_gc_head_data_block, %object
 	.size	g_gc_head_data_block, 4
 g_gc_head_data_block:
 	.space	4
 	.section	.bss.g_gc_head_data_block_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR110,. + 0
+	.set	.LANCHOR97,. + 0
 	.type	g_gc_head_data_block_count, %object
 	.size	g_gc_head_data_block_count, 4
 g_gc_head_data_block_count:
 	.space	4
 	.section	.bss.g_gc_merge_free_blk_threshold,"aw",%nobits
 	.align	1
-	.set	.LANCHOR83,. + 0
+	.set	.LANCHOR101,. + 0
 	.type	g_gc_merge_free_blk_threshold, %object
 	.size	g_gc_merge_free_blk_threshold, 2
 g_gc_merge_free_blk_threshold:
 	.space	2
 	.section	.bss.g_gc_next_blk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR99,. + 0
+	.set	.LANCHOR72,. + 0
 	.type	g_gc_next_blk, %object
 	.size	g_gc_next_blk, 2
 g_gc_next_blk:
 	.space	2
 	.section	.bss.g_gc_next_blk_1,"aw",%nobits
 	.align	1
-	.set	.LANCHOR100,. + 0
+	.set	.LANCHOR73,. + 0
 	.type	g_gc_next_blk_1, %object
 	.size	g_gc_next_blk_1, 2
 g_gc_next_blk_1:
 	.space	2
 	.section	.bss.g_gc_num_req,"aw",%nobits
 	.align	2
-	.set	.LANCHOR89,. + 0
+	.set	.LANCHOR62,. + 0
 	.type	g_gc_num_req, %object
 	.size	g_gc_num_req, 4
 g_gc_num_req:
 	.space	4
 	.section	.bss.g_gc_page_offset,"aw",%nobits
 	.align	1
-	.set	.LANCHOR97,. + 0
+	.set	.LANCHOR70,. + 0
 	.type	g_gc_page_offset, %object
 	.size	g_gc_page_offset, 2
 g_gc_page_offset:
 	.space	2
 	.section	.bss.g_gc_skip_write_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR84,. + 0
+	.set	.LANCHOR98,. + 0
 	.type	g_gc_skip_write_count, %object
 	.size	g_gc_skip_write_count, 4
 g_gc_skip_write_count:
 	.space	4
 	.section	.bss.g_gc_superblock,"aw",%nobits
 	.align	2
-	.set	.LANCHOR80,. + 0
+	.set	.LANCHOR144,. + 0
 	.type	g_gc_superblock, %object
 	.size	g_gc_superblock, 48
 g_gc_superblock:
@@ -15398,14 +13729,14 @@ g_gc_temp_superblock:
 	.space	48
 	.section	.bss.g_in_gc_progress,"aw",%nobits
 	.align	2
-	.set	.LANCHOR108,. + 0
+	.set	.LANCHOR94,. + 0
 	.type	g_in_gc_progress, %object
 	.size	g_in_gc_progress, 4
 g_in_gc_progress:
 	.space	4
 	.section	.bss.g_in_swl_replace,"aw",%nobits
 	.align	2
-	.set	.LANCHOR87,. + 0
+	.set	.LANCHOR95,. + 0
 	.type	g_in_swl_replace, %object
 	.size	g_in_swl_replace, 4
 g_in_swl_replace:
@@ -15419,21 +13750,21 @@ g_l2p_last_update_region_id:
 	.space	2
 	.section	.bss.g_max_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR76,. + 0
+	.set	.LANCHOR92,. + 0
 	.type	g_max_erase_count, %object
 	.size	g_max_erase_count, 4
 g_max_erase_count:
 	.space	4
 	.section	.bss.g_min_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR77,. + 0
+	.set	.LANCHOR93,. + 0
 	.type	g_min_erase_count, %object
 	.size	g_min_erase_count, 4
 g_min_erase_count:
 	.space	4
 	.section	.bss.g_nand_ops,"aw",%nobits
 	.align	2
-	.set	.LANCHOR105,. + 0
+	.set	.LANCHOR78,. + 0
 	.type	g_nand_ops, %object
 	.size	g_nand_ops, 24
 g_nand_ops:
@@ -15461,35 +13792,35 @@ g_num_free_superblocks:
 	.space	2
 	.section	.bss.g_power_lost_recovery_flag,"aw",%nobits
 	.align	1
-	.set	.LANCHOR167,. + 0
+	.set	.LANCHOR156,. + 0
 	.type	g_power_lost_recovery_flag, %object
 	.size	g_power_lost_recovery_flag, 2
 g_power_lost_recovery_flag:
 	.space	2
 	.section	.bss.g_recovery_page_min_ver,"aw",%nobits
 	.align	2
-	.set	.LANCHOR145,. + 0
+	.set	.LANCHOR134,. + 0
 	.type	g_recovery_page_min_ver, %object
 	.size	g_recovery_page_min_ver, 4
 g_recovery_page_min_ver:
 	.space	4
 	.section	.bss.g_recovery_page_num,"aw",%nobits
 	.align	2
-	.set	.LANCHOR168,. + 0
+	.set	.LANCHOR157,. + 0
 	.type	g_recovery_page_num, %object
 	.size	g_recovery_page_num, 4
 g_recovery_page_num:
 	.space	4
 	.section	.bss.g_recovery_ppa_tbl,"aw",%nobits
 	.align	2
-	.set	.LANCHOR169,. + 0
+	.set	.LANCHOR158,. + 0
 	.type	g_recovery_ppa_tbl, %object
 	.size	g_recovery_ppa_tbl, 128
 g_recovery_ppa_tbl:
 	.space	128
 	.section	.bss.g_sys_ext_data,"aw",%nobits
 	.align	2
-	.set	.LANCHOR81,. + 0
+	.set	.LANCHOR135,. + 0
 	.type	g_sys_ext_data, %object
 	.size	g_sys_ext_data, 512
 g_sys_ext_data:
@@ -15503,91 +13834,91 @@ g_sys_save_data:
 	.space	48
 	.section	.bss.g_tmp_data_superblock_id,"aw",%nobits
 	.align	1
-	.set	.LANCHOR142,. + 0
+	.set	.LANCHOR131,. + 0
 	.type	g_tmp_data_superblock_id, %object
 	.size	g_tmp_data_superblock_id, 2
 g_tmp_data_superblock_id:
 	.space	2
 	.section	.bss.g_totle_avg_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR74,. + 0
+	.set	.LANCHOR145,. + 0
 	.type	g_totle_avg_erase_count, %object
 	.size	g_totle_avg_erase_count, 4
 g_totle_avg_erase_count:
 	.space	4
 	.section	.bss.g_totle_cache_write_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR65,. + 0
+	.set	.LANCHOR87,. + 0
 	.type	g_totle_cache_write_count, %object
 	.size	g_totle_cache_write_count, 4
 g_totle_cache_write_count:
 	.space	4
 	.section	.bss.g_totle_discard_page_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR63,. + 0
+	.set	.LANCHOR86,. + 0
 	.type	g_totle_discard_page_count, %object
 	.size	g_totle_discard_page_count, 4
 g_totle_discard_page_count:
 	.space	4
 	.section	.bss.g_totle_gc_page_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR67,. + 0
+	.set	.LANCHOR84,. + 0
 	.type	g_totle_gc_page_count, %object
 	.size	g_totle_gc_page_count, 4
 g_totle_gc_page_count:
 	.space	4
 	.section	.bss.g_totle_l2p_write_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR66,. + 0
+	.set	.LANCHOR88,. + 0
 	.type	g_totle_l2p_write_count, %object
 	.size	g_totle_l2p_write_count, 4
 g_totle_l2p_write_count:
 	.space	4
 	.section	.bss.g_totle_map_block,"aw",%nobits
 	.align	1
-	.set	.LANCHOR141,. + 0
+	.set	.LANCHOR130,. + 0
 	.type	g_totle_map_block, %object
 	.size	g_totle_map_block, 2
 g_totle_map_block:
 	.space	2
 	.section	.bss.g_totle_mlc_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR72,. + 0
+	.set	.LANCHOR90,. + 0
 	.type	g_totle_mlc_erase_count, %object
 	.size	g_totle_mlc_erase_count, 4
 g_totle_mlc_erase_count:
 	.space	4
 	.section	.bss.g_totle_read_page_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR62,. + 0
+	.set	.LANCHOR89,. + 0
 	.type	g_totle_read_page_count, %object
 	.size	g_totle_read_page_count, 4
 g_totle_read_page_count:
 	.space	4
 	.section	.bss.g_totle_read_sector,"aw",%nobits
 	.align	2
-	.set	.LANCHOR69,. + 0
+	.set	.LANCHOR163,. + 0
 	.type	g_totle_read_sector, %object
 	.size	g_totle_read_sector, 4
 g_totle_read_sector:
 	.space	4
 	.section	.bss.g_totle_slc_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR73,. + 0
+	.set	.LANCHOR91,. + 0
 	.type	g_totle_slc_erase_count, %object
 	.size	g_totle_slc_erase_count, 4
 g_totle_slc_erase_count:
 	.space	4
 	.section	.bss.g_totle_swl_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR143,. + 0
+	.set	.LANCHOR132,. + 0
 	.type	g_totle_swl_count, %object
 	.size	g_totle_swl_count, 4
 g_totle_swl_count:
 	.space	4
 	.section	.bss.g_totle_sys_slc_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR75,. + 0
+	.set	.LANCHOR80,. + 0
 	.type	g_totle_sys_slc_erase_count, %object
 	.size	g_totle_sys_slc_erase_count, 4
 g_totle_sys_slc_erase_count:
@@ -15601,49 +13932,49 @@ g_totle_vendor_block:
 	.space	2
 	.section	.bss.g_totle_write_page_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR64,. + 0
+	.set	.LANCHOR85,. + 0
 	.type	g_totle_write_page_count, %object
 	.size	g_totle_write_page_count, 4
 g_totle_write_page_count:
 	.space	4
 	.section	.bss.g_totle_write_sector,"aw",%nobits
 	.align	2
-	.set	.LANCHOR68,. + 0
+	.set	.LANCHOR162,. + 0
 	.type	g_totle_write_sector, %object
 	.size	g_totle_write_sector, 4
 g_totle_write_sector:
 	.space	4
 	.section	.bss.gc_discard_updated,"aw",%nobits
 	.align	2
-	.set	.LANCHOR172,. + 0
+	.set	.LANCHOR167,. + 0
 	.type	gc_discard_updated, %object
 	.size	gc_discard_updated, 4
 gc_discard_updated:
 	.space	4
 	.section	.bss.gc_ink_free_return_value,"aw",%nobits
 	.align	1
-	.set	.LANCHOR177,. + 0
+	.set	.LANCHOR172,. + 0
 	.type	gc_ink_free_return_value, %object
 	.size	gc_ink_free_return_value, 2
 gc_ink_free_return_value:
 	.space	2
 	.section	.bss.gp_ect_tbl_info,"aw",%nobits
 	.align	2
-	.set	.LANCHOR127,. + 0
+	.set	.LANCHOR118,. + 0
 	.type	gp_ect_tbl_info, %object
 	.size	gp_ect_tbl_info, 4
 gp_ect_tbl_info:
 	.space	4
 	.section	.bss.gp_flash_check_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR186,. + 0
+	.set	.LANCHOR184,. + 0
 	.type	gp_flash_check_buf, %object
 	.size	gp_flash_check_buf, 4
 gp_flash_check_buf:
 	.space	4
 	.section	.bss.gp_gc_page_buf_info,"aw",%nobits
 	.align	2
-	.set	.LANCHOR90,. + 0
+	.set	.LANCHOR63,. + 0
 	.type	gp_gc_page_buf_info, %object
 	.size	gp_gc_page_buf_info, 4
 gp_gc_page_buf_info:
@@ -15656,17 +13987,24 @@ gp_last_act_superblock:
 	.space	4
 	.section	.bss.idb_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR185,. + 0
+	.set	.LANCHOR183,. + 0
 	.type	idb_buf, %object
 	.size	idb_buf, 4
 idb_buf:
 	.space	4
 	.section	.bss.idb_need_write_back,"aw",%nobits
 	.align	2
-	.set	.LANCHOR184,. + 0
+	.set	.LANCHOR182,. + 0
 	.type	idb_need_write_back, %object
 	.size	idb_need_write_back, 4
 idb_need_write_back:
+	.space	4
+	.section	.bss.low_format_en,"aw",%nobits
+	.align	2
+	.set	.LANCHOR181,. + 0
+	.type	low_format_en, %object
+	.size	low_format_en, 4
+low_format_en:
 	.space	4
 	.section	.bss.p_blk_mode_table,"aw",%nobits
 	.align	2
@@ -15712,56 +14050,56 @@ p_free_data_block_list_head:
 	.space	4
 	.section	.bss.p_gc_blk_tbl,"aw",%nobits
 	.align	2
-	.set	.LANCHOR95,. + 0
+	.set	.LANCHOR68,. + 0
 	.type	p_gc_blk_tbl, %object
 	.size	p_gc_blk_tbl, 4
 p_gc_blk_tbl:
 	.space	4
 	.section	.bss.p_gc_data_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR91,. + 0
+	.set	.LANCHOR64,. + 0
 	.type	p_gc_data_buf, %object
 	.size	p_gc_data_buf, 4
 p_gc_data_buf:
 	.space	4
 	.section	.bss.p_gc_page_info,"aw",%nobits
 	.align	2
-	.set	.LANCHOR98,. + 0
+	.set	.LANCHOR71,. + 0
 	.type	p_gc_page_info, %object
 	.size	p_gc_page_info, 4
 p_gc_page_info:
 	.space	4
 	.section	.bss.p_gc_spare_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR92,. + 0
+	.set	.LANCHOR65,. + 0
 	.type	p_gc_spare_buf, %object
 	.size	p_gc_spare_buf, 4
 p_gc_spare_buf:
 	.space	4
 	.section	.bss.p_io_data_buf_0,"aw",%nobits
 	.align	2
-	.set	.LANCHOR118,. + 0
+	.set	.LANCHOR109,. + 0
 	.type	p_io_data_buf_0, %object
 	.size	p_io_data_buf_0, 4
 p_io_data_buf_0:
 	.space	4
 	.section	.bss.p_io_data_buf_1,"aw",%nobits
 	.align	2
-	.set	.LANCHOR119,. + 0
+	.set	.LANCHOR110,. + 0
 	.type	p_io_data_buf_1, %object
 	.size	p_io_data_buf_1, 4
 p_io_data_buf_1:
 	.space	4
 	.section	.bss.p_io_spare_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR124,. + 0
+	.set	.LANCHOR115,. + 0
 	.type	p_io_spare_buf, %object
 	.size	p_io_spare_buf, 4
 p_io_spare_buf:
 	.space	4
 	.section	.bss.p_l2p_map_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR136,. + 0
+	.set	.LANCHOR126,. + 0
 	.type	p_l2p_map_buf, %object
 	.size	p_l2p_map_buf, 4
 p_l2p_map_buf:
@@ -15775,28 +14113,28 @@ p_l2p_ram_map:
 	.space	4
 	.section	.bss.p_map_block_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR129,. + 0
+	.set	.LANCHOR119,. + 0
 	.type	p_map_block_table, %object
 	.size	p_map_block_table, 4
 p_map_block_table:
 	.space	4
 	.section	.bss.p_map_block_valid_page_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR130,. + 0
+	.set	.LANCHOR120,. + 0
 	.type	p_map_block_valid_page_count, %object
 	.size	p_map_block_valid_page_count, 4
 p_map_block_valid_page_count:
 	.space	4
 	.section	.bss.p_map_block_ver_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR135,. + 0
+	.set	.LANCHOR125,. + 0
 	.type	p_map_block_ver_table, %object
 	.size	p_map_block_ver_table, 4
 p_map_block_ver_table:
 	.space	4
 	.section	.bss.p_map_region_ppn_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR134,. + 0
+	.set	.LANCHOR124,. + 0
 	.type	p_map_region_ppn_table, %object
 	.size	p_map_region_ppn_table, 4
 p_map_region_ppn_table:
@@ -15809,35 +14147,34 @@ p_plane_order_table:
 	.space	32
 	.section	.bss.p_swl_mul_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR126,. + 0
+	.set	.LANCHOR117,. + 0
 	.type	p_swl_mul_table, %object
 	.size	p_swl_mul_table, 4
 p_swl_mul_table:
 	.space	4
 	.section	.bss.p_sys_data_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR115,. + 0
+	.set	.LANCHOR106,. + 0
 	.type	p_sys_data_buf, %object
 	.size	p_sys_data_buf, 4
 p_sys_data_buf:
 	.space	4
 	.section	.bss.p_sys_data_buf_1,"aw",%nobits
 	.align	2
-	.set	.LANCHOR116,. + 0
+	.set	.LANCHOR107,. + 0
 	.type	p_sys_data_buf_1, %object
 	.size	p_sys_data_buf_1, 4
 p_sys_data_buf_1:
 	.space	4
 	.section	.bss.p_sys_spare_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR123,. + 0
+	.set	.LANCHOR114,. + 0
 	.type	p_sys_spare_buf, %object
 	.size	p_sys_spare_buf, 4
 p_sys_spare_buf:
 	.space	4
 	.section	.bss.p_valid_page_count_check_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR128,. + 0
 	.type	p_valid_page_count_check_table, %object
 	.size	p_valid_page_count_check_table, 4
 p_valid_page_count_check_table:
@@ -15858,598 +14195,443 @@ p_vendor_block_table:
 	.space	4
 	.section	.bss.p_vendor_block_valid_page_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR131,. + 0
+	.set	.LANCHOR121,. + 0
 	.type	p_vendor_block_valid_page_count, %object
 	.size	p_vendor_block_valid_page_count, 4
 p_vendor_block_valid_page_count:
 	.space	4
 	.section	.bss.p_vendor_block_ver_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR132,. + 0
+	.set	.LANCHOR122,. + 0
 	.type	p_vendor_block_ver_table, %object
 	.size	p_vendor_block_ver_table, 4
 p_vendor_block_ver_table:
 	.space	4
 	.section	.bss.p_vendor_data_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR117,. + 0
+	.set	.LANCHOR108,. + 0
 	.type	p_vendor_data_buf, %object
 	.size	p_vendor_data_buf, 4
 p_vendor_data_buf:
 	.space	4
 	.section	.bss.p_vendor_region_ppn_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR133,. + 0
+	.set	.LANCHOR123,. + 0
 	.type	p_vendor_region_ppn_table, %object
 	.size	p_vendor_region_ppn_table, 4
 p_vendor_region_ppn_table:
 	.space	4
 	.section	.bss.req_erase,"aw",%nobits
 	.align	2
-	.set	.LANCHOR106,. + 0
+	.set	.LANCHOR79,. + 0
 	.type	req_erase, %object
 	.size	req_erase, 4
 req_erase:
 	.space	4
 	.section	.bss.req_gc,"aw",%nobits
 	.align	2
-	.set	.LANCHOR93,. + 0
+	.set	.LANCHOR66,. + 0
 	.type	req_gc, %object
 	.size	req_gc, 4
 req_gc:
 	.space	4
 	.section	.bss.req_gc_dst,"aw",%nobits
 	.align	2
-	.set	.LANCHOR113,. + 0
+	.set	.LANCHOR104,. + 0
 	.type	req_gc_dst, %object
 	.size	req_gc_dst, 4
 req_gc_dst:
 	.space	4
 	.section	.bss.req_prgm,"aw",%nobits
 	.align	2
-	.set	.LANCHOR114,. + 0
+	.set	.LANCHOR105,. + 0
 	.type	req_prgm, %object
 	.size	req_prgm, 4
 req_prgm:
 	.space	4
 	.section	.bss.req_read,"aw",%nobits
 	.align	2
-	.set	.LANCHOR112,. + 0
+	.set	.LANCHOR103,. + 0
 	.type	req_read, %object
 	.size	req_read, 4
 req_read:
 	.space	4
 	.section	.bss.req_sys,"aw",%nobits
 	.align	2
-	.set	.LANCHOR148,. + 0
+	.set	.LANCHOR138,. + 0
 	.type	req_sys, %object
 	.size	req_sys, 20
 req_sys:
 	.space	20
 	.section	.bss.sftl_nand_check_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR120,. + 0
+	.set	.LANCHOR111,. + 0
 	.type	sftl_nand_check_buf, %object
 	.size	sftl_nand_check_buf, 4
 sftl_nand_check_buf:
 	.space	4
 	.section	.bss.sftl_nand_check_spare_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR122,. + 0
+	.set	.LANCHOR113,. + 0
 	.type	sftl_nand_check_spare_buf, %object
 	.size	sftl_nand_check_spare_buf, 4
 sftl_nand_check_spare_buf:
 	.space	4
 	.section	.bss.sftl_temp_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR121,. + 0
+	.set	.LANCHOR112,. + 0
 	.type	sftl_temp_buf, %object
 	.size	sftl_temp_buf, 4
 sftl_temp_buf:
 	.space	4
 	.section	.data.ftl_gc_temp_block_bops_scan_page_addr,"aw",%progbits
 	.align	1
-	.set	.LANCHOR162,. + 0
+	.set	.LANCHOR160,. + 0
 	.type	ftl_gc_temp_block_bops_scan_page_addr, %object
 	.size	ftl_gc_temp_block_bops_scan_page_addr, 2
 ftl_gc_temp_block_bops_scan_page_addr:
 	.short	-1
 	.section	.data.gFtlInitStatus,"aw",%progbits
 	.align	2
-	.set	.LANCHOR86,. + 0
+	.set	.LANCHOR166,. + 0
 	.type	gFtlInitStatus, %object
 	.size	gFtlInitStatus, 4
 gFtlInitStatus:
 	.word	-1
 	.section	.data.power_up_flag,"aw",%progbits
 	.align	2
-	.set	.LANCHOR182,. + 0
 	.type	power_up_flag, %object
 	.size	power_up_flag, 4
 power_up_flag:
 	.word	1
 	.section	.rodata.FlashEraseBlocks.str1.1,"aMS",%progbits,1
-.LC79:
+.LC6:
 	.ascii	"%s: addr: %x is in id block!!!!!!!!!!\012\000"
-.LC80:
+.LC7:
 	.ascii	"not free: w: d:\000"
-.LC81:
+.LC8:
 	.ascii	"not free: w: s:\000"
 	.section	.rodata.FlashProgPages.str1.1,"aMS",%progbits,1
-.LC85:
+.LC11:
 	.ascii	"prog read error: = %x\012\000"
-.LC86:
+.LC12:
 	.ascii	"prog read s error: = %x %x %x\012\000"
-.LC87:
+.LC13:
 	.ascii	"prog read d error: = %x %x %x\012\000"
 	.section	.rodata.FtlBbmMapBadBlock.str1.1,"aMS",%progbits,1
 .LC0:
 	.ascii	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\012"
 	.ascii	"\000"
 	.section	.rodata.FtlBbmTblFlush.str1.1,"aMS",%progbits,1
-.LC101:
+.LC14:
 	.ascii	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\012\000"
-.LC102:
+.LC15:
 	.ascii	"FtlBbmTblFlush error:%x\012\000"
-.LC103:
+.LC16:
 	.ascii	"FtlBbmTblFlush error = %x error count = %d\012\000"
 	.section	.rodata.FtlFreeSysBlkQueueOut.str1.1,"aMS",%progbits,1
-.LC82:
+.LC9:
 	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\012"
 	.ascii	"\000"
-	.section	.rodata.FtlGcFreeBadSuperBlk.str1.1,"aMS",%progbits,1
-.LC104:
-	.ascii	"FtlGcFreeBadSuperBlk 0x%x\012\000"
-	.section	.rodata.FtlGcMarkBadPhyBlk.str1.1,"aMS",%progbits,1
-.LC74:
-	.ascii	"FtlGcMarkBadPhyBlk %d 0x%x\012\000"
-	.section	.rodata.FtlGcRefreshBlock.str1.1,"aMS",%progbits,1
-.LC73:
-	.ascii	"FtlGcRefreshBlock  0x%x\012\000"
 	.section	.rodata.FtlGcScanTempBlk.str1.1,"aMS",%progbits,1
-.LC100:
+.LC31:
 	.ascii	"FtlGcScanTempBlk Error ID %x %x!!!!!!! \012\000"
 	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",%progbits,1
-.LC108:
-	.ascii	"no ect\000"
-	.section	.rodata.FtlMapWritePage.str1.1,"aMS",%progbits,1
-.LC88:
-	.ascii	"FtlMapWritePage error = %x \012\000"
-.LC89:
-	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
-	.section	.rodata.FtlMemInit.str1.1,"aMS",%progbits,1
-.LC84:
-	.ascii	"%s error allocating memory. return -1\012\000"
-	.section	.rodata.FtlPrintInfo2buf.str1.1,"aMS",%progbits,1
-.LC2:
-	.ascii	"FLASH INFO:\012\000"
-.LC3:
-	.ascii	"Device Capacity: %d MB\012\000"
-.LC4:
-	.ascii	"FTL INFO:\012\000"
-.LC5:
-	.ascii	"g_MaxLpn = 0x%x\012\000"
-.LC6:
-	.ascii	"g_VaildLpn = 0x%x\012\000"
-.LC7:
-	.ascii	"read_page_count = 0x%x\012\000"
-.LC8:
-	.ascii	"discard_page_count = 0x%x\012\000"
-.LC9:
-	.ascii	"write_page_count = 0x%x\012\000"
-.LC10:
-	.ascii	"cache_write_count = 0x%x\012\000"
-.LC11:
-	.ascii	"l2p_write_count = 0x%x\012\000"
-.LC12:
-	.ascii	"gc_page_count = 0x%x\012\000"
-.LC13:
-	.ascii	"totle_write = %d MB\012\000"
-.LC14:
-	.ascii	"totle_read = %d MB\012\000"
-.LC15:
-	.ascii	"GSV = 0x%x\012\000"
-.LC16:
-	.ascii	"GDV = 0x%x\012\000"
-.LC17:
-	.ascii	"bad blk num = %d\012\000"
-.LC18:
-	.ascii	"free_superblocks = 0x%x\012\000"
-.LC19:
-	.ascii	"mlc_EC = 0x%x\012\000"
-.LC20:
-	.ascii	"slc_EC = 0x%x\012\000"
-.LC21:
-	.ascii	"avg_EC = 0x%x\012\000"
-.LC22:
-	.ascii	"sys_EC = 0x%x\012\000"
-.LC23:
-	.ascii	"max_EC = 0x%x\012\000"
-.LC24:
-	.ascii	"min_EC = 0x%x\012\000"
-.LC25:
-	.ascii	"PLT = 0x%x\012\000"
-.LC26:
-	.ascii	"POT = 0x%x\012\000"
-.LC27:
-	.ascii	"MaxSector = 0x%x\012\000"
-.LC28:
-	.ascii	"init_sys_blks_pp = 0x%x\012\000"
-.LC29:
-	.ascii	"sys_blks_pp = 0x%x\012\000"
-.LC30:
-	.ascii	"free sysblock = 0x%x\012\000"
-.LC31:
-	.ascii	"data_blks_pp = 0x%x\012\000"
-.LC32:
-	.ascii	"data_op_blks_pp = 0x%x\012\000"
 .LC33:
-	.ascii	"max_data_blks = 0x%x\012\000"
+	.ascii	"no ect\000"
 .LC34:
-	.ascii	"Sys.id = 0x%x\012\000"
-.LC35:
-	.ascii	"Bbt.id = 0x%x\012\000"
-.LC36:
-	.ascii	"ACT.page = 0x%x\012\000"
-.LC37:
-	.ascii	"ACT.plane = 0x%x\012\000"
+	.ascii	"%s\012\000"
+	.section	.rodata.FtlLoadSysInfo.str1.1,"aMS",%progbits,1
 .LC38:
-	.ascii	"ACT.id = 0x%x\012\000"
+	.ascii	"%s hash error this.id =%x page =%x pre_id =%x hash "
+	.ascii	"=%x hash_r =%x\012\000"
+	.section	.rodata.FtlMapTblRecovery.str1.1,"aMS",%progbits,1
 .LC39:
-	.ascii	"ACT.mode = 0x%x\012\000"
+	.ascii	"%s last blk_id =%x page =%x hash error hash =%x has"
+	.ascii	"h_r =%x\012\000"
 .LC40:
-	.ascii	"ACT.a_pages = 0x%x\012\000"
-.LC41:
-	.ascii	"ACT VPC = 0x%x\012\000"
-.LC42:
-	.ascii	"BUF.page = 0x%x\012\000"
-.LC43:
-	.ascii	"BUF.plane = 0x%x\012\000"
-.LC44:
-	.ascii	"BUF.id = 0x%x\012\000"
-.LC45:
-	.ascii	"BUF.mode = 0x%x\012\000"
-.LC46:
-	.ascii	"BUF.a_pages = 0x%x\012\000"
-.LC47:
-	.ascii	"BUF VPC = 0x%x\012\000"
-.LC48:
-	.ascii	"TMP.page = 0x%x\012\000"
-.LC49:
-	.ascii	"TMP.plane = 0x%x\012\000"
-.LC50:
-	.ascii	"TMP.id = 0x%x\012\000"
-.LC51:
-	.ascii	"TMP.mode = 0x%x\012\000"
-.LC52:
-	.ascii	"TMP.a_pages = 0x%x\012\000"
-.LC53:
-	.ascii	"GC.page = 0x%x\012\000"
-.LC54:
-	.ascii	"GC.plane = 0x%x\012\000"
-.LC55:
-	.ascii	"GC.id = 0x%x\012\000"
-.LC56:
-	.ascii	"GC.mode = 0x%x\012\000"
-.LC57:
-	.ascii	"GC.a_pages = 0x%x\012\000"
-.LC58:
-	.ascii	"WR_CHK = %x %x %x\012\000"
-.LC59:
-	.ascii	"Read Err Cnt = 0x%x\012\000"
-.LC60:
-	.ascii	"Prog Err Cnt = 0x%x\012\000"
-.LC61:
-	.ascii	"gc_free_blk_th= 0x%x\012\000"
-.LC62:
-	.ascii	"gc_merge_free_blk_th= 0x%x\012\000"
-.LC63:
-	.ascii	"gc_skip_write_count= 0x%x\012\000"
-.LC64:
-	.ascii	"gc_blk_index= 0x%x\012\000"
-.LC65:
-	.ascii	"free min EC= 0x%x\012\000"
-.LC66:
-	.ascii	"free max EC= 0x%x\012\000"
-.LC67:
-	.ascii	"GC__SB VPC = 0x%x\012\000"
-.LC68:
-	.ascii	"%d. [0x%x]=0x%x 0x%x  0x%x\012\000"
-.LC69:
-	.ascii	"free %d. [0x%x] 0x%x  0x%x\012\000"
+	.ascii	"%s scan blk_id =%x page =%x hash error hash =%x has"
+	.ascii	"h_r =%x\012\000"
+	.section	.rodata.FtlMapWritePage.str1.1,"aMS",%progbits,1
+.LC18:
+	.ascii	"FtlMapWritePage error = %x \012\000"
+.LC19:
+	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
 	.section	.rodata.FtlProgPages.str1.1,"aMS",%progbits,1
-.LC111:
+.LC36:
 	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
 	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",%progbits,1
-.LC106:
+.LC24:
 	.ascii	"spuer block %x vpn is 0\012 \000"
 	.section	.rodata.FtlVendorPartRead.str1.1,"aMS",%progbits,1
-.LC107:
+.LC32:
 	.ascii	"FtlVendorPartRead refresh = %x phyAddr = %x\012\000"
-	.section	.rodata.FtlVpcCheckAndModify.str1.1,"aMS",%progbits,1
-.LC110:
-	.ascii	"FtlCheckVpc %x = %x  %x\012\000"
 	.section	.rodata.FtlVpcTblFlush.str1.1,"aMS",%progbits,1
-.LC109:
+.LC35:
 	.ascii	"FtlVpcTblFlush error = %x error count = %d\012\000"
 	.section	.rodata.FtlWrite.str1.1,"aMS",%progbits,1
-.LC113:
+.LC37:
 	.ascii	"FtlWrite: lpa error:%x %x\012\000"
 	.section	.rodata.FtlWriteToIDB.str1.1,"aMS",%progbits,1
-.LC114:
+.LC42:
 	.ascii	"write_idblock fail! %x %x %x %x\012\000"
-.LC115:
+.LC43:
 	.ascii	"%s idb buffer alloc fail\012\000"
-.LC116:
+.LC44:
 	.ascii	"%p %x %p %x\012\000"
-	.section	.rodata.GetSwlReplaceBlock.str1.1,"aMS",%progbits,1
-.LC72:
-	.ascii	"swblk %x ,avg = %x max= %x vpc= %x,ec=%x ,max ec=%x"
-	.ascii	"\012\000"
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",%progbits,1
 .LC1:
 	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
-	.section	.rodata.__func__.10094,"a",%progbits
-	.set	.LANCHOR180,. + 0
-	.type	__func__.10094, %object
-	.size	__func__.10094, 23
-__func__.10094:
+	.section	.rodata.__func__.10015,"a",%progbits
+	.set	.LANCHOR175,. + 0
+	.type	__func__.10015, %object
+	.size	__func__.10015, 23
+__func__.10015:
 	.ascii	"rk_ftl_garbage_collect\000"
-	.section	.rodata.__func__.10356,"a",%progbits
-	.set	.LANCHOR147,. + 0
-	.type	__func__.10356, %object
-	.size	__func__.10356, 15
-__func__.10356:
+	.section	.rodata.__func__.10277,"a",%progbits
+	.set	.LANCHOR137,. + 0
+	.type	__func__.10277, %object
+	.size	__func__.10277, 15
+__func__.10277:
 	.ascii	"FlashReadPages\000"
-	.section	.rodata.__func__.10375,"a",%progbits
-	.set	.LANCHOR153,. + 0
-	.type	__func__.10375, %object
-	.size	__func__.10375, 15
-__func__.10375:
+	.section	.rodata.__func__.10296,"a",%progbits
+	.set	.LANCHOR142,. + 0
+	.type	__func__.10296, %object
+	.size	__func__.10296, 15
+__func__.10296:
 	.ascii	"FlashProgPages\000"
-	.section	.rodata.__func__.10399,"a",%progbits
-	.set	.LANCHOR104,. + 0
-	.type	__func__.10399, %object
-	.size	__func__.10399, 17
-__func__.10399:
+	.section	.rodata.__func__.10320,"a",%progbits
+	.set	.LANCHOR77,. + 0
+	.type	__func__.10320, %object
+	.size	__func__.10320, 17
+__func__.10320:
 	.ascii	"FlashEraseBlocks\000"
-	.section	.rodata.__func__.10514,"a",%progbits
-	.set	.LANCHOR187,. + 0
-	.type	__func__.10514, %object
-	.size	__func__.10514, 14
-__func__.10514:
+	.section	.rodata.__func__.10435,"a",%progbits
+	.set	.LANCHOR185,. + 0
+	.type	__func__.10435, %object
+	.size	__func__.10435, 14
+__func__.10435:
 	.ascii	"FtlWriteToIDB\000"
-	.section	.rodata.__func__.8835,"a",%progbits
-	.set	.LANCHOR138,. + 0
-	.type	__func__.8835, %object
-	.size	__func__.8835, 11
-__func__.8835:
-	.ascii	"FtlMemInit\000"
-	.section	.rodata.__func__.8959,"a",%progbits
-	.set	.LANCHOR175,. + 0
-	.type	__func__.8959, %object
-	.size	__func__.8959, 13
-__func__.8959:
+	.section	.rodata.__func__.8940,"a",%progbits
+	.set	.LANCHOR169,. + 0
+	.type	__func__.8940, %object
+	.size	__func__.8940, 13
+__func__.8940:
 	.ascii	"FtlProgPages\000"
-	.section	.rodata.__func__.8987,"a",%progbits
-	.set	.LANCHOR183,. + 0
-	.type	__func__.8987, %object
-	.size	__func__.8987, 9
-__func__.8987:
+	.section	.rodata.__func__.8968,"a",%progbits
+	.set	.LANCHOR177,. + 0
+	.type	__func__.8968, %object
+	.size	__func__.8968, 9
+__func__.8968:
 	.ascii	"FtlWrite\000"
-	.section	.rodata.__func__.9062,"a",%progbits
-	.set	.LANCHOR139,. + 0
-	.type	__func__.9062, %object
-	.size	__func__.9062, 14
-__func__.9062:
+	.section	.rodata.__func__.9043,"a",%progbits
+	.set	.LANCHOR128,. + 0
+	.type	__func__.9043, %object
+	.size	__func__.9043, 14
+__func__.9043:
 	.ascii	"FtlBbt2Bitmap\000"
-	.section	.rodata.__func__.9105,"a",%progbits
-	.set	.LANCHOR150,. + 0
-	.type	__func__.9105, %object
-	.size	__func__.9105, 11
-__func__.9105:
+	.section	.rodata.__func__.9078,"a",%progbits
+	.set	.LANCHOR141,. + 0
+	.type	__func__.9078, %object
+	.size	__func__.9078, 11
+__func__.9078:
 	.ascii	"FtlLoadBbt\000"
-	.section	.rodata.__func__.9220,"a",%progbits
+	.section	.rodata.__func__.9193,"a",%progbits
 	.set	.LANCHOR49,. + 0
-	.type	__func__.9220, %object
-	.size	__func__.9220, 17
-__func__.9220:
+	.type	__func__.9193, %object
+	.size	__func__.9193, 17
+__func__.9193:
 	.ascii	"INSERT_FREE_LIST\000"
-	.section	.rodata.__func__.9225,"a",%progbits
+	.section	.rodata.__func__.9198,"a",%progbits
 	.set	.LANCHOR46,. + 0
-	.type	__func__.9225, %object
-	.size	__func__.9225, 17
-__func__.9225:
+	.type	__func__.9198, %object
+	.size	__func__.9198, 17
+__func__.9198:
 	.ascii	"INSERT_DATA_LIST\000"
-	.section	.rodata.__func__.9256,"a",%progbits
+	.section	.rodata.__func__.9229,"a",%progbits
 	.set	.LANCHOR50,. + 0
-	.type	__func__.9256, %object
-	.size	__func__.9256, 17
-__func__.9256:
+	.type	__func__.9229, %object
+	.size	__func__.9229, 17
+__func__.9229:
 	.ascii	"List_remove_node\000"
-	.section	.rodata.__func__.9288,"a",%progbits
+	.section	.rodata.__func__.9261,"a",%progbits
 	.set	.LANCHOR54,. + 0
-	.type	__func__.9288, %object
-	.size	__func__.9288, 22
-__func__.9288:
+	.type	__func__.9261, %object
+	.size	__func__.9261, 22
+__func__.9261:
 	.ascii	"List_update_data_list\000"
-	.section	.rodata.__func__.9297,"a",%progbits
-	.set	.LANCHOR156,. + 0
-	.type	__func__.9297, %object
-	.size	__func__.9297, 16
-__func__.9297:
+	.section	.rodata.__func__.9270,"a",%progbits
+	.set	.LANCHOR150,. + 0
+	.type	__func__.9270, %object
+	.size	__func__.9270, 16
+__func__.9270:
 	.ascii	"load_l2p_region\000"
-	.section	.rodata.__func__.9330,"a",%progbits
-	.set	.LANCHOR107,. + 0
-	.type	__func__.9330, %object
-	.size	__func__.9330, 26
-__func__.9330:
+	.section	.rodata.__func__.9303,"a",%progbits
+	.set	.LANCHOR81,. + 0
+	.type	__func__.9303, %object
+	.size	__func__.9303, 26
+__func__.9303:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.section	.rodata.__func__.9341,"a",%progbits
-	.set	.LANCHOR157,. + 0
-	.type	__func__.9341, %object
-	.size	__func__.9341, 15
-__func__.9341:
+	.section	.rodata.__func__.9314,"a",%progbits
+	.set	.LANCHOR151,. + 0
+	.type	__func__.9314, %object
+	.size	__func__.9314, 15
+__func__.9314:
 	.ascii	"ftl_map_blk_gc\000"
-	.section	.rodata.__func__.9356,"a",%progbits
-	.set	.LANCHOR154,. + 0
-	.type	__func__.9356, %object
-	.size	__func__.9356, 31
-__func__.9356:
+	.section	.rodata.__func__.9329,"a",%progbits
+	.set	.LANCHOR148,. + 0
+	.type	__func__.9329, %object
+	.size	__func__.9329, 31
+__func__.9329:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.section	.rodata.__func__.9370,"a",%progbits
-	.set	.LANCHOR155,. + 0
-	.type	__func__.9370, %object
-	.size	__func__.9370, 16
-__func__.9370:
+	.section	.rodata.__func__.9343,"a",%progbits
+	.set	.LANCHOR149,. + 0
+	.type	__func__.9343, %object
+	.size	__func__.9343, 16
+__func__.9343:
 	.ascii	"FtlMapWritePage\000"
-	.section	.rodata.__func__.9395,"a",%progbits
+	.section	.rodata.__func__.9368,"a",%progbits
 	.set	.LANCHOR57,. + 0
-	.type	__func__.9395, %object
-	.size	__func__.9395, 22
-__func__.9395:
+	.type	__func__.9368, %object
+	.size	__func__.9368, 22
+__func__.9368:
 	.ascii	"select_l2p_ram_region\000"
-	.section	.rodata.__func__.9412,"a",%progbits
-	.set	.LANCHOR159,. + 0
-	.type	__func__.9412, %object
-	.size	__func__.9412, 9
-__func__.9412:
+	.section	.rodata.__func__.9385,"a",%progbits
+	.set	.LANCHOR153,. + 0
+	.type	__func__.9385, %object
+	.size	__func__.9385, 9
+__func__.9385:
 	.ascii	"log2phys\000"
-	.section	.rodata.__func__.9485,"a",%progbits
-	.set	.LANCHOR171,. + 0
-	.type	__func__.9485, %object
-	.size	__func__.9485, 15
-__func__.9485:
+	.section	.rodata.__func__.9449,"a",%progbits
+	.set	.LANCHOR165,. + 0
+	.type	__func__.9449, %object
+	.size	__func__.9449, 15
+__func__.9449:
 	.ascii	"FtlVpcTblFlush\000"
-	.section	.rodata.__func__.9507,"a",%progbits
-	.set	.LANCHOR149,. + 0
-	.type	__func__.9507, %object
-	.size	__func__.9507, 14
-__func__.9507:
+	.section	.rodata.__func__.9471,"a",%progbits
+	.set	.LANCHOR140,. + 0
+	.type	__func__.9471, %object
+	.size	__func__.9471, 14
+__func__.9471:
 	.ascii	"FtlScanSysBlk\000"
-	.section	.rodata.__func__.9564,"a",%progbits
-	.set	.LANCHOR151,. + 0
-	.type	__func__.9564, %object
-	.size	__func__.9564, 15
-__func__.9564:
+	.section	.rodata.__func__.9527,"a",%progbits
+	.set	.LANCHOR178,. + 0
+	.type	__func__.9527, %object
+	.size	__func__.9527, 15
+__func__.9527:
 	.ascii	"FtlLoadSysInfo\000"
-	.section	.rodata.__func__.9627,"a",%progbits
-	.set	.LANCHOR160,. + 0
-	.type	__func__.9627, %object
-	.size	__func__.9627, 16
-__func__.9627:
+	.section	.rodata.__func__.9549,"a",%progbits
+	.set	.LANCHOR180,. + 0
+	.type	__func__.9549, %object
+	.size	__func__.9549, 18
+__func__.9549:
+	.ascii	"FtlMapTblRecovery\000"
+	.section	.rodata.__func__.9595,"a",%progbits
+	.set	.LANCHOR154,. + 0
+	.type	__func__.9595, %object
+	.size	__func__.9595, 16
+__func__.9595:
 	.ascii	"FtlReUsePrevPpa\000"
-	.section	.rodata.__func__.9661,"a",%progbits
-	.set	.LANCHOR166,. + 0
-	.type	__func__.9661, %object
-	.size	__func__.9661, 22
-__func__.9661:
+	.section	.rodata.__func__.9629,"a",%progbits
+	.set	.LANCHOR155,. + 0
+	.type	__func__.9629, %object
+	.size	__func__.9629, 22
+__func__.9629:
 	.ascii	"FtlRecoverySuperblock\000"
-	.section	.rodata.__func__.9718,"a",%progbits
+	.section	.rodata.__func__.9686,"a",%progbits
 	.set	.LANCHOR60,. + 0
-	.type	__func__.9718, %object
-	.size	__func__.9718, 16
-__func__.9718:
+	.type	__func__.9686, %object
+	.size	__func__.9686, 16
+__func__.9686:
 	.ascii	"make_superblock\000"
-	.section	.rodata.__func__.9739,"a",%progbits
-	.set	.LANCHOR146,. + 0
-	.type	__func__.9739, %object
-	.size	__func__.9739, 18
-__func__.9739:
+	.section	.rodata.__func__.9707,"a",%progbits
+	.set	.LANCHOR136,. + 0
+	.type	__func__.9707, %object
+	.size	__func__.9707, 18
+__func__.9707:
 	.ascii	"SupperBlkListInit\000"
-	.section	.rodata.__func__.9764,"a",%progbits
-	.set	.LANCHOR173,. + 0
-	.type	__func__.9764, %object
-	.size	__func__.9764, 21
-__func__.9764:
-	.ascii	"FtlVpcCheckAndModify\000"
-	.section	.rodata.__func__.9780,"a",%progbits
-	.set	.LANCHOR161,. + 0
-	.type	__func__.9780, %object
-	.size	__func__.9780, 14
-__func__.9780:
+	.section	.rodata.__func__.9734,"a",%progbits
+	.set	.LANCHOR159,. + 0
+	.type	__func__.9734, %object
+	.size	__func__.9734, 14
+__func__.9734:
 	.ascii	"ftl_check_vpc\000"
-	.section	.rodata.__func__.9865,"a",%progbits
-	.set	.LANCHOR163,. + 0
-	.type	__func__.9865, %object
-	.size	__func__.9865, 25
-__func__.9865:
+	.section	.rodata.__func__.9799,"a",%progbits
+	.set	.LANCHOR143,. + 0
+	.type	__func__.9799, %object
+	.size	__func__.9799, 25
+__func__.9799:
 	.ascii	"allocate_data_superblock\000"
-	.section	.rodata.__func__.9886,"a",%progbits
-	.set	.LANCHOR174,. + 0
-	.type	__func__.9886, %object
-	.size	__func__.9886, 29
-__func__.9886:
+	.section	.rodata.__func__.9820,"a",%progbits
+	.set	.LANCHOR168,. + 0
+	.type	__func__.9820, %object
+	.size	__func__.9820, 29
+__func__.9820:
 	.ascii	"allocate_new_data_superblock\000"
-	.section	.rodata.__func__.9893,"a",%progbits
-	.set	.LANCHOR88,. + 0
-	.type	__func__.9893, %object
-	.size	__func__.9893, 19
-__func__.9893:
+	.section	.rodata.__func__.9827,"a",%progbits
+	.set	.LANCHOR61,. + 0
+	.type	__func__.9827, %object
+	.size	__func__.9827, 19
+__func__.9827:
 	.ascii	"get_new_active_ppa\000"
-	.section	.rodata.__func__.9906,"a",%progbits
-	.set	.LANCHOR164,. + 0
-	.type	__func__.9906, %object
-	.size	__func__.9906, 16
-__func__.9906:
+	.section	.rodata.__func__.9840,"a",%progbits
+	.set	.LANCHOR146,. + 0
+	.type	__func__.9840, %object
+	.size	__func__.9840, 16
+__func__.9840:
 	.ascii	"update_vpc_list\000"
-	.section	.rodata.__func__.9913,"a",%progbits
-	.set	.LANCHOR165,. + 0
-	.type	__func__.9913, %object
-	.size	__func__.9913, 20
-__func__.9913:
+	.section	.rodata.__func__.9847,"a",%progbits
+	.set	.LANCHOR147,. + 0
+	.type	__func__.9847, %object
+	.size	__func__.9847, 20
+__func__.9847:
 	.ascii	"decrement_vpc_count\000"
-	.section	.rodata.__func__.9983,"a",%progbits
-	.set	.LANCHOR176,. + 0
-	.type	__func__.9983, %object
-	.size	__func__.9983, 19
-__func__.9983:
+	.section	.rodata.__func__.9917,"a",%progbits
+	.set	.LANCHOR170,. + 0
+	.type	__func__.9917, %object
+	.size	__func__.9917, 19
+__func__.9917:
 	.ascii	"FtlGcFreeTempBlock\000"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",%progbits,1
-.LC105:
+.LC17:
 	.ascii	"decrement_vpc_count %x = %d\012\000"
 	.section	.rodata.ftl_check_vpc.str1.1,"aMS",%progbits,1
-.LC94:
+.LC25:
 	.ascii	"...%s enter...\012\000"
-.LC95:
+.LC26:
 	.ascii	"FtlCheckVpc2 %x = %x  %x\012\000"
-.LC96:
+.LC27:
 	.ascii	"free blk vpc error %x = %x  %x\012\000"
 	.section	.rodata.ftl_map_blk_alloc_new_blk.str1.1,"aMS",%progbits,1
-.LC83:
+.LC10:
 	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d\012\000"
 	.section	.rodata.ftl_scan_all_data.str1.1,"aMS",%progbits,1
-.LC97:
+.LC28:
 	.ascii	"ftl_scan_all_data = %x\012\000"
-.LC98:
+.LC29:
 	.ascii	"scan lpa = %x ppa= %x\012\000"
-.LC99:
+.LC30:
 	.ascii	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\012"
 	.ascii	"\000"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",%progbits,1
-.LC90:
+.LC20:
 	.ascii	"region_id = %x phyAddr = %x\012\000"
-.LC91:
+.LC21:
 	.ascii	"spare:\000"
-.LC92:
+.LC22:
 	.ascii	"map_ppn:\000"
-.LC93:
+.LC23:
 	.ascii	"load_l2p_region refresh = %x phyAddr = %x\012\000"
-	.section	.rodata.rk_ftl_garbage_collect.str1.1,"aMS",%progbits,1
-.LC112:
-	.ascii	"SWL %x, FSB = %x vpc= %x,ec=%x th=%x\012\000"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",%progbits,1
-.LC75:
+.LC2:
 	.ascii	"%s 0x%x:\000"
-.LC76:
+.LC3:
 	.ascii	"%x \000"
-.LC77:
+.LC4:
 	.ascii	"%02x \000"
-.LC78:
+.LC5:
 	.ascii	"\012\000"
-	.section	.rodata.rknand_proc_ftlread.str1.1,"aMS",%progbits,1
-.LC70:
-	.ascii	"SFTL version: 5.0.49 20181030\000"
-.LC71:
-	.ascii	"%s\012\000"
+	.section	.rodata.sftl_init.str1.1,"aMS",%progbits,1
+.LC41:
+	.ascii	"SFTL version: 5.0.50 20181227\000"
 	.hidden	free
diff --git a/drivers/rkflash/rk_sftl_arm_v8.S b/drivers/rkflash/rk_sftl_arm_v8.S
index 02cb67bcaf..d54b12f7b3 100644
--- a/drivers/rkflash/rk_sftl_arm_v8.S
+++ b/drivers/rkflash/rk_sftl_arm_v8.S
@@ -2,7 +2,7 @@
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:    GPL-2.0
- * date: 2018-11-29
+ * date: 2018-12-27
  */
 	.arch armv8-a+nosimd
 	.file	"rk_sftl.c"
@@ -378,40 +378,6 @@ FtlBbmIsBadBlock:
 FtlBbtInfoPrint:
 	ret
 	.size	FtlBbtInfoPrint, .-FtlBbtInfoPrint
-	.section	.text.FtlBbtCalcTotleCnt,"ax",@progbits
-	.align	2
-	.global	FtlBbtCalcTotleCnt
-	.type	FtlBbtCalcTotleCnt, %function
-FtlBbtCalcTotleCnt:
-	adrp	x0, .LANCHOR17
-	mov	w4, 0
-	mov	w5, 0
-	ldrh	w6, [x0, #:lo12:.LANCHOR17]
-	adrp	x0, .LANCHOR10
-	ldrh	w0, [x0, #:lo12:.LANCHOR10]
-	mul	w6, w6, w0
-	cmp	w4, w6
-	blt	.L43
-	mov	w0, w5
-	ret
-.L43:
-	stp	x29, x30, [sp, -16]!
-	add	x29, sp, 0
-.L36:
-	mov	w0, w4
-	bl	FtlBbmIsBadBlock
-	cbz	w0, .L35
-	add	w5, w5, 1
-	and	w5, w5, 65535
-.L35:
-	add	w4, w4, 1
-	and	w4, w4, 65535
-	cmp	w4, w6
-	blt	.L36
-	mov	w0, w5
-	ldp	x29, x30, [sp], 16
-	ret
-	.size	FtlBbtCalcTotleCnt, .-FtlBbtCalcTotleCnt
 	.section	.text.V2P_block,"ax",@progbits
 	.align	2
 	.global	V2P_block
@@ -468,12 +434,12 @@ P2V_block_in_plane:
 ftl_cmp_data_ver:
 	cmp	w0, w1
 	mov	w2, -2147483648
-	bls	.L48
+	bls	.L37
 	sub	w1, w0, w1
 	cmp	w1, w2
 	cset	w0, ls
 	ret
-.L48:
+.L37:
 	sub	w1, w1, w0
 	cmp	w1, w2
 	cset	w0, hi
@@ -509,7 +475,7 @@ FtlFreeSysBLkSort:
 	adrp	x0, .LANCHOR38
 	add	x1, x0, :lo12:.LANCHOR38
 	ldrh	w2, [x1, 6]
-	cbz	w2, .L52
+	cbz	w2, .L41
 	adrp	x2, .LANCHOR39+28
 	ldrh	w3, [x1, 2]
 	mov	w6, 0
@@ -517,16 +483,16 @@ FtlFreeSysBLkSort:
 	ldrh	w5, [x2, #:lo12:.LANCHOR39+28]
 	ldrh	w2, [x1, 4]
 	and	w5, w5, 31
-.L54:
+.L43:
 	cmp	w5, w4
-	bgt	.L55
-	cbz	w6, .L52
+	bgt	.L44
+	cbz	w6, .L41
 	add	x0, x0, :lo12:.LANCHOR38
 	strh	w3, [x0, 2]
 	strh	w2, [x0, 4]
-.L52:
+.L41:
 	ret
-.L55:
+.L44:
 	add	x6, x1, x3, sxtw 1
 	add	w4, w4, 1
 	add	w3, w3, 1
@@ -538,7 +504,7 @@ FtlFreeSysBLkSort:
 	mov	w6, 1
 	add	w2, w2, w6
 	and	w2, w2, 1023
-	b	.L54
+	b	.L43
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
 	.section	.text.IsInFreeQueue,"ax",@progbits
 	.align	2
@@ -550,25 +516,25 @@ IsInFreeQueue:
 	and	w0, w0, 65535
 	ldrh	w4, [x1, 6]
 	cmp	w4, 1024
-	beq	.L65
+	beq	.L54
 	ldrh	w5, [x1, 2]
 	mov	w3, 0
-.L63:
+.L52:
 	cmp	w3, w4
-	bcc	.L64
-.L65:
+	bcc	.L53
+.L54:
 	mov	w0, 0
 	ret
-.L64:
+.L53:
 	add	w2, w3, w5
 	ubfiz	x2, x2, 1, 10
 	add	x2, x1, x2
 	ldrh	w2, [x2, 8]
 	cmp	w2, w0
-	beq	.L66
+	beq	.L55
 	add	w3, w3, 1
-	b	.L63
-.L66:
+	b	.L52
+.L55:
 	mov	w0, 1
 	ret
 	.size	IsInFreeQueue, .-IsInFreeQueue
@@ -581,7 +547,7 @@ insert_data_list:
 	and	w0, w0, 65535
 	ldrh	w14, [x1, #:lo12:.LANCHOR5]
 	cmp	w14, w0
-	bls	.L83
+	bls	.L72
 	adrp	x1, .LANCHOR40
 	mov	w3, 6
 	ldr	x6, [x1, #:lo12:.LANCHOR40]
@@ -593,12 +559,12 @@ insert_data_list:
 	adrp	x1, .LANCHOR41
 	mov	x15, x1
 	ldr	x12, [x1, #:lo12:.LANCHOR41]
-	cbnz	x12, .L70
+	cbnz	x12, .L59
 	str	x5, [x1, #:lo12:.LANCHOR41]
-.L83:
+.L72:
 	mov	w0, 0
 	ret
-.L70:
+.L59:
 	stp	x29, x30, [sp, -32]!
 	adrp	x1, .LANCHOR42
 	ubfiz	x2, x0, 1, 16
@@ -625,13 +591,13 @@ insert_data_list:
 	mov	x4, x12
 	add	x10, x17, x2
 	mov	w2, 0
-.L78:
+.L67:
 	add	w2, w2, 1
 	and	w2, w2, 65535
 	cmp	w14, w2
-	bcc	.L69
+	bcc	.L58
 	cmp	w1, w0
-	beq	.L69
+	beq	.L58
 	ubfiz	x30, x1, 1, 16
 	ldrh	w19, [x4, 4]
 	cmp	w19, 0
@@ -639,46 +605,46 @@ insert_data_list:
 	mul	w3, w3, w19
 	csel	w3, w3, w11, ne
 	cmp	w7, w3
-	bne	.L74
+	bne	.L63
 	ldrh	w19, [x17, x30]
 	ldrh	w3, [x10]
 	cmp	w19, w3
-	bcc	.L76
-.L75:
+	bcc	.L65
+.L64:
 	strh	w1, [x6, x13]
 	cmp	x4, x12
 	ldrh	w1, [x4, 2]
 	strh	w1, [x5, 2]
-	bne	.L79
+	bne	.L68
 	strh	w0, [x4, 2]
 	str	x5, [x15, #:lo12:.LANCHOR41]
-	b	.L69
-.L74:
-	bcc	.L75
-.L76:
+	b	.L58
+.L63:
+	bcc	.L64
+.L65:
 	ldrh	w3, [x4]
 	cmp	w3, w20
-	bne	.L77
+	bne	.L66
 	strh	w1, [x5, 2]
 	strh	w0, [x4]
 	adrp	x0, .LANCHOR44
 	str	x5, [x0, #:lo12:.LANCHOR44]
-.L69:
+.L58:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L77:
+.L66:
 	umaddl	x4, w3, w8, x6
 	mov	w1, w3
-	b	.L78
-.L79:
+	b	.L67
+.L68:
 	ldrh	w1, [x4, 2]
 	mov	w2, 6
 	umull	x1, w1, w2
 	strh	w0, [x6, x1]
 	strh	w0, [x4, 2]
-	b	.L69
+	b	.L58
 	.size	insert_data_list, .-insert_data_list
 	.section	.text.INSERT_DATA_LIST,"ax",@progbits
 	.align	2
@@ -696,7 +662,7 @@ INSERT_DATA_LIST:
 	adrp	x1, .LANCHOR5
 	ldrh	w1, [x1, #:lo12:.LANCHOR5]
 	cmp	w1, w0
-	bcs	.L85
+	bcs	.L74
 	ldp	x29, x30, [sp], 16
 	mov	w2, 214
 	adrp	x1, .LANCHOR46
@@ -704,7 +670,7 @@ INSERT_DATA_LIST:
 	add	x1, x1, :lo12:.LANCHOR46
 	add	x0, x0, :lo12:.LC1
 	b	printf
-.L85:
+.L74:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
@@ -716,7 +682,7 @@ insert_free_list:
 	and	w0, w0, 65535
 	mov	w7, 65535
 	cmp	w0, w7
-	beq	.L89
+	beq	.L78
 	adrp	x1, .LANCHOR40
 	mov	w6, 6
 	ldr	x3, [x1, #:lo12:.LANCHOR40]
@@ -728,12 +694,12 @@ insert_free_list:
 	adrp	x1, .LANCHOR47
 	mov	x12, x1
 	ldr	x5, [x1, #:lo12:.LANCHOR47]
-	cbnz	x5, .L90
+	cbnz	x5, .L79
 	str	x4, [x1, #:lo12:.LANCHOR47]
-.L89:
+.L78:
 	mov	w0, 0
 	ret
-.L90:
+.L79:
 	adrp	x1, .LANCHOR43
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
@@ -745,37 +711,37 @@ insert_free_list:
 	mul	x1, x1, x2
 	mov	x2, x5
 	and	w1, w1, 65535
-.L93:
+.L82:
 	ubfiz	x10, x1, 1, 16
 	ldrh	w10, [x11, x10]
 	cmp	w10, w13
-	bcs	.L91
+	bcs	.L80
 	ldrh	w10, [x2]
 	cmp	w10, w7
-	bne	.L92
+	bne	.L81
 	strh	w1, [x4, 2]
 	strh	w0, [x2]
-	b	.L89
-.L92:
+	b	.L78
+.L81:
 	umaddl	x2, w10, w6, x3
 	mov	w1, w10
-	b	.L93
-.L91:
+	b	.L82
+.L80:
 	ldrh	w6, [x2, 2]
 	cmp	x2, x5
 	strh	w6, [x4, 2]
 	strh	w1, [x3, x8]
-	bne	.L94
+	bne	.L83
 	strh	w0, [x2, 2]
 	str	x4, [x12, #:lo12:.LANCHOR47]
-	b	.L89
-.L94:
+	b	.L78
+.L83:
 	ldrh	w1, [x2, 2]
 	mov	w4, 6
 	umull	x1, w1, w4
 	strh	w0, [x3, x1]
 	strh	w0, [x2, 2]
-	b	.L89
+	b	.L78
 	.size	insert_free_list, .-insert_free_list
 	.section	.text.INSERT_FREE_LIST,"ax",@progbits
 	.align	2
@@ -793,7 +759,7 @@ INSERT_FREE_LIST:
 	adrp	x1, .LANCHOR5
 	ldrh	w1, [x1, #:lo12:.LANCHOR5]
 	cmp	w1, w0
-	bcs	.L95
+	bcs	.L84
 	ldp	x29, x30, [sp], 16
 	mov	w2, 207
 	adrp	x1, .LANCHOR49
@@ -801,7 +767,7 @@ INSERT_FREE_LIST:
 	add	x1, x1, :lo12:.LANCHOR49
 	add	x0, x0, :lo12:.LC1
 	b	printf
-.L95:
+.L84:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
@@ -825,26 +791,26 @@ List_remove_node:
 	add	x19, x23, x21
 	ldrh	w1, [x19, 2]
 	cmp	w1, w0
-	bne	.L99
+	bne	.L88
 	ldr	x0, [x22]
 	cmp	x19, x0
-	beq	.L99
+	beq	.L88
 	adrp	x1, .LANCHOR50
 	adrp	x0, .LC1
 	mov	w2, 372
 	add	x1, x1, :lo12:.LANCHOR50
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L99:
+.L88:
 	ldr	x0, [x22]
 	mov	w1, 65535
 	cmp	x19, x0
 	ldrh	w0, [x23, x21]
-	bne	.L100
+	bne	.L89
 	cmp	w0, w1
-	bne	.L101
+	bne	.L90
 	str	xzr, [x22]
-.L102:
+.L91:
 	mov	w0, -1
 	strh	w0, [x23, x21]
 	strh	w0, [x19, 2]
@@ -854,27 +820,27 @@ List_remove_node:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L101:
+.L90:
 	ldr	x1, [x20, #:lo12:.LANCHOR40]
 	mov	w2, 6
 	umaddl	x0, w0, w2, x1
 	mov	w1, -1
 	str	x0, [x22]
 	strh	w1, [x0, 2]
-	b	.L102
-.L100:
+	b	.L91
+.L89:
 	cmp	w0, w1
 	ldrh	w1, [x19, 2]
-	bne	.L103
+	bne	.L92
 	cmp	w1, w0
-	beq	.L102
+	beq	.L91
 	mov	w0, 6
 	mov	w2, -1
 	umull	x1, w1, w0
 	ldr	x0, [x20, #:lo12:.LANCHOR40]
 	strh	w2, [x0, x1]
-	b	.L102
-.L103:
+	b	.L91
+.L92:
 	ldr	x2, [x20, #:lo12:.LANCHOR40]
 	mov	w3, 6
 	umaddl	x4, w0, w3, x2
@@ -882,7 +848,7 @@ List_remove_node:
 	ldrh	w1, [x19, 2]
 	umull	x1, w1, w3
 	strh	w0, [x2, x1]
-	b	.L102
+	b	.L91
 	.size	List_remove_node, .-List_remove_node
 	.section	.text.List_pop_index_node,"ax",@progbits
 	.align	2
@@ -890,7 +856,7 @@ List_remove_node:
 	.type	List_pop_index_node, %function
 List_pop_index_node:
 	ldr	x2, [x0]
-	cbz	x2, .L111
+	cbz	x2, .L100
 	stp	x29, x30, [sp, -32]!
 	adrp	x3, .LANCHOR40
 	and	w1, w1, 65535
@@ -899,9 +865,9 @@ List_pop_index_node:
 	str	x19, [sp, 16]
 	mov	w5, 6
 	ldr	x19, [x3, #:lo12:.LANCHOR40]
-.L107:
-	cbnz	w1, .L108
-.L110:
+.L96:
+	cbnz	w1, .L97
+.L99:
 	sub	x19, x2, x19
 	mov	x2, -6148914691236517206
 	asr	x19, x19, 1
@@ -914,15 +880,15 @@ List_pop_index_node:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L108:
+.L97:
 	ldrh	w3, [x2]
 	cmp	w3, w4
-	beq	.L110
+	beq	.L99
 	sub	w1, w1, #1
 	umaddl	x2, w3, w5, x19
 	and	w1, w1, 65535
-	b	.L107
-.L111:
+	b	.L96
+.L100:
 	mov	w0, 65535
 	ret
 	.size	List_pop_index_node, .-List_pop_index_node
@@ -942,26 +908,26 @@ List_get_gc_head_node:
 	and	w2, w0, 65535
 	adrp	x0, .LANCHOR41
 	ldr	x1, [x0, #:lo12:.LANCHOR41]
-	cbz	x1, .L122
+	cbz	x1, .L111
 	adrp	x0, .LANCHOR40
 	mov	w4, 6
 	ldr	x3, [x0, #:lo12:.LANCHOR40]
 	mov	w0, 65535
-.L119:
-	cbz	w2, .L120
+.L108:
+	cbz	w2, .L109
 	ldrh	w1, [x1]
 	cmp	w1, w0
-	bne	.L121
+	bne	.L110
 	ret
-.L121:
+.L110:
 	sub	w2, w2, #1
 	umaddl	x1, w1, w4, x3
 	and	w2, w2, 65535
-	b	.L119
-.L122:
+	b	.L108
+.L111:
 	mov	w0, 65535
 	ret
-.L120:
+.L109:
 	sub	x0, x1, x3
 	mov	x1, -6148914691236517206
 	asr	x0, x0, 1
@@ -985,15 +951,15 @@ List_update_data_list:
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	stp	x25, x26, [sp, 64]
 	cmp	w0, w19
-	beq	.L125
+	beq	.L114
 	adrp	x0, .LANCHOR52
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
-	beq	.L125
+	beq	.L114
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w19
-	beq	.L125
+	beq	.L114
 	adrp	x0, .LANCHOR40
 	mov	w21, 6
 	adrp	x24, .LANCHOR41
@@ -1003,7 +969,7 @@ List_update_data_list:
 	ldr	x1, [x24, #:lo12:.LANCHOR41]
 	add	x22, x23, x21
 	cmp	x22, x1
-	beq	.L125
+	beq	.L114
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x19, 1, 16
 	mov	x25, x1
@@ -1016,25 +982,25 @@ List_update_data_list:
 	ldrh	w0, [x22, 2]
 	csinv	w20, w20, wzr, ne
 	cmp	w0, w1
-	bne	.L128
+	bne	.L117
 	ldrh	w1, [x23, x21]
 	cmp	w1, w0
-	bne	.L128
+	bne	.L117
 	adrp	x1, .LANCHOR54
 	adrp	x0, .LC1
 	mov	w2, 463
 	add	x1, x1, :lo12:.LANCHOR54
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L128:
+.L117:
 	ldrh	w0, [x22, 2]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L129
+	bne	.L118
 	ldrh	w1, [x23, x21]
 	cmp	w1, w0
-	beq	.L125
-.L129:
+	beq	.L114
+.L118:
 	mov	w1, 6
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
@@ -1050,26 +1016,26 @@ List_update_data_list:
 	mul	w0, w1, w2
 	csinv	w0, w0, wzr, ne
 	cmp	w20, w0
-	bcs	.L125
+	bcs	.L114
 	adrp	x20, .LANCHOR45
 	mov	w1, w19
 	add	x0, x24, :lo12:.LANCHOR41
 	bl	List_remove_node
 	ldrh	w0, [x20, #:lo12:.LANCHOR45]
-	cbnz	w0, .L131
+	cbnz	w0, .L120
 	adrp	x1, .LANCHOR54
 	adrp	x0, .LC1
 	mov	w2, 474
 	add	x1, x1, :lo12:.LANCHOR54
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L131:
+.L120:
 	ldrh	w0, [x20, #:lo12:.LANCHOR45]
 	sub	w0, w0, #1
 	strh	w0, [x20, #:lo12:.LANCHOR45]
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-.L125:
+.L114:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -1092,72 +1058,72 @@ select_l2p_ram_region:
 	adrp	x0, .LANCHOR55
 	str	x19, [sp, 16]
 	ldr	x0, [x0, #:lo12:.LANCHOR55]
-.L136:
+.L125:
 	and	w19, w1, 65535
 	cmp	w19, w2
-	bcc	.L138
+	bcc	.L127
 	add	x3, x0, 4
 	mov	w19, w2
 	mov	w5, -2147483648
 	mov	w1, 0
-.L139:
+.L128:
 	cmp	w1, w2
-	bne	.L141
+	bne	.L130
 	cmp	w19, w2
-	bcc	.L137
+	bcc	.L126
 	adrp	x1, .LANCHOR56
 	mov	w19, w2
 	mov	w3, -1
 	ldrh	w4, [x1, #:lo12:.LANCHOR56]
 	mov	w1, 0
-.L142:
+.L131:
 	cmp	w1, w2
-	bne	.L144
+	bne	.L133
 	cmp	w19, w1
-	bcc	.L137
-	mov	w2, 787
+	bcc	.L126
+	mov	w2, 789
 	adrp	x1, .LANCHOR57
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR57
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	b	.L137
-.L138:
+	b	.L126
+.L127:
 	add	x1, x1, 1
 	add	x4, x0, x1, lsl 4
 	ldrh	w4, [x4, -16]
 	cmp	w4, w3
-	bne	.L136
-.L137:
+	bne	.L125
+.L126:
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L141:
+.L130:
 	ldr	w4, [x3]
-	tbnz	w4, #31, .L140
+	tbnz	w4, #31, .L129
 	cmp	w5, w4
-	bls	.L140
+	bls	.L129
 	mov	w5, w4
 	mov	w19, w1
-.L140:
+.L129:
 	add	w1, w1, 1
 	add	x3, x3, 16
 	and	w1, w1, 65535
-	b	.L139
-.L144:
+	b	.L128
+.L133:
 	ldr	w6, [x0, 4]
 	cmp	w3, w6
-	bls	.L143
+	bls	.L132
 	ldrh	w5, [x0]
 	cmp	w5, w4
 	csel	w3, w3, w6, eq
 	csel	w19, w19, w1, eq
-.L143:
+.L132:
 	add	w1, w1, 1
 	add	x0, x0, 16
 	and	w1, w1, 65535
-	b	.L142
+	b	.L131
 	.size	select_l2p_ram_region, .-select_l2p_ram_region
 	.section	.text.FtlUpdateVaildLpn,"ax",@progbits
 	.align	2
@@ -1168,12 +1134,12 @@ FtlUpdateVaildLpn:
 	mov	x3, x2
 	ldrh	w1, [x2, #:lo12:.LANCHOR58]
 	cmp	w1, 4
-	bhi	.L147
-	cbnz	w0, .L147
+	bhi	.L136
+	cbnz	w0, .L136
 	add	w1, w1, 1
 	strh	w1, [x2, #:lo12:.LANCHOR58]
 	ret
-.L147:
+.L136:
 	adrp	x1, .LANCHOR5
 	adrp	x0, .LANCHOR59
 	strh	wzr, [x3, #:lo12:.LANCHOR58]
@@ -1185,22 +1151,22 @@ FtlUpdateVaildLpn:
 	ldr	x6, [x1, #:lo12:.LANCHOR42]
 	mov	w7, 65535
 	mov	x1, 0
-.L148:
+.L137:
 	cmp	w5, w1, uxth
-	bhi	.L150
-	cbz	w3, .L146
+	bhi	.L139
+	cbz	w3, .L135
 	str	w2, [x0, #:lo12:.LANCHOR59]
-.L146:
+.L135:
 	ret
-.L150:
+.L139:
 	ldrh	w4, [x6, x1, lsl 1]
 	cmp	w4, w7
-	beq	.L149
+	beq	.L138
 	add	w2, w2, w4
 	mov	w3, 1
-.L149:
+.L138:
 	add	x1, x1, 1
-	b	.L148
+	b	.L137
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
 	.section	.text.ftl_set_blk_mode,"ax",@progbits
 	.align	2
@@ -1208,9 +1174,9 @@ FtlUpdateVaildLpn:
 	.type	ftl_set_blk_mode, %function
 ftl_set_blk_mode:
 	and	w0, w0, 65535
-	cbz	w1, .L157
+	cbz	w1, .L146
 	b	ftl_set_blk_mode.part.6
-.L157:
+.L146:
 	adrp	x1, .LANCHOR1
 	ubfx	x2, x0, 5, 11
 	lsl	x2, x2, 2
@@ -1250,9 +1216,9 @@ ftl_sb_update_avl_pages:
 	add	x4, x0, x4
 	ldrh	w3, [x1, #:lo12:.LANCHOR3]
 	mov	w1, 65535
-.L160:
+.L149:
 	cmp	w2, w3
-	bcc	.L162
+	bcc	.L151
 	adrp	x1, .LANCHOR19
 	ubfiz	x3, x3, 1, 16
 	add	x3, x3, 16
@@ -1263,32 +1229,32 @@ ftl_sb_update_avl_pages:
 	sub	w1, w1, #1
 	and	w1, w1, 65535
 	sub	w1, w1, w6
-.L163:
+.L152:
 	cmp	x2, x3
-	bne	.L165
+	bne	.L154
 	ret
-.L162:
+.L151:
 	ldrh	w5, [x4]
 	cmp	w5, w1
-	beq	.L161
+	beq	.L150
 	ldrh	w5, [x0, 4]
 	add	w5, w5, 1
 	strh	w5, [x0, 4]
-.L161:
+.L150:
 	add	w2, w2, 1
 	add	x4, x4, 2
 	and	w2, w2, 65535
-	b	.L160
-.L165:
+	b	.L149
+.L154:
 	ldrh	w4, [x2]
 	cmp	w4, w5
-	beq	.L164
+	beq	.L153
 	ldrh	w4, [x0, 4]
 	add	w4, w1, w4
 	strh	w4, [x0, 4]
-.L164:
+.L153:
 	add	x2, x2, 2
-	b	.L163
+	b	.L152
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
 	.section	.text.FtlSlcSuperblockCheck,"ax",@progbits
 	.align	2
@@ -1296,38 +1262,38 @@ ftl_sb_update_avl_pages:
 	.type	FtlSlcSuperblockCheck, %function
 FtlSlcSuperblockCheck:
 	ldrh	w1, [x0, 4]
-	cbz	w1, .L166
+	cbz	w1, .L155
 	ldrh	w2, [x0]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L166
+	beq	.L155
 	ldrb	w2, [x0, 6]
 	add	x2, x2, 8
 	ldrh	w3, [x0, x2, lsl 1]
 	adrp	x2, .LANCHOR3
 	ldrh	w4, [x2, #:lo12:.LANCHOR3]
 	mov	w2, w1
-.L169:
+.L158:
 	cmp	w3, w2
-	beq	.L171
-.L166:
+	beq	.L160
+.L155:
 	ret
-.L171:
+.L160:
 	ldrb	w1, [x0, 6]
 	add	w1, w1, 1
 	and	w1, w1, 255
 	strb	w1, [x0, 6]
 	cmp	w1, w4
-	bne	.L170
+	bne	.L159
 	ldrh	w1, [x0, 2]
 	strb	wzr, [x0, 6]
 	add	w1, w1, 1
 	strh	w1, [x0, 2]
-.L170:
+.L159:
 	ldrb	w1, [x0, 6]
 	add	x1, x1, 8
 	ldrh	w3, [x0, x1, lsl 1]
-	b	.L169
+	b	.L158
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
 	.section	.text.make_superblock,"ax",@progbits
 	.align	2
@@ -1342,14 +1308,14 @@ make_superblock:
 	adrp	x0, .LANCHOR5
 	ldrh	w0, [x0, #:lo12:.LANCHOR5]
 	cmp	w1, w0
-	bcc	.L173
+	bcc	.L162
 	adrp	x1, .LANCHOR60
 	adrp	x0, .LC1
-	mov	w2, 2110
+	mov	w2, 2156
 	add	x1, x1, :lo12:.LANCHOR60
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L173:
+.L162:
 	adrp	x0, .LANCHOR3
 	adrp	x7, .LANCHOR13
 	add	x6, x19, 16
@@ -1359,9 +1325,9 @@ make_superblock:
 	strh	wzr, [x19, 4]
 	mov	w10, -1
 	strb	wzr, [x19, 7]
-.L174:
+.L163:
 	cmp	w8, w5, uxth
-	bhi	.L176
+	bhi	.L165
 	adrp	x1, .LANCHOR19
 	ldrb	w0, [x19, 7]
 	strb	wzr, [x19, 9]
@@ -1372,22 +1338,22 @@ make_superblock:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L176:
+.L165:
 	ldrh	w1, [x19]
 	ldrb	w0, [x7, x5]
 	bl	V2P_block
 	mov	w4, w0
 	strh	w10, [x6]
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L175
+	cbnz	w0, .L164
 	strh	w4, [x6]
 	ldrb	w0, [x19, 7]
 	add	w0, w0, 1
 	strb	w0, [x19, 7]
-.L175:
+.L164:
 	add	x5, x5, 1
 	add	x6, x6, 2
-	b	.L174
+	b	.L163
 	.size	make_superblock, .-make_superblock
 	.section	.text.update_multiplier_value,"ax",@progbits
 	.align	2
@@ -1404,11 +1370,11 @@ update_multiplier_value:
 	add	x8, x8, :lo12:.LANCHOR13
 	ldrh	w11, [x0, #:lo12:.LANCHOR19]
 	cmp	w10, w7, uxth
-	bhi	.L190
-	cbz	w5, .L188
+	bhi	.L179
+	cbz	w5, .L177
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.L189:
+.L178:
 	adrp	x0, .LANCHOR40
 	mov	w1, 6
 	ldr	x0, [x0, #:lo12:.LANCHOR40]
@@ -1416,31 +1382,31 @@ update_multiplier_value:
 	mov	w0, 0
 	strh	w5, [x6, 4]
 	ret
-.L183:
+.L172:
 	mov	w5, 0
-	b	.L182
-.L188:
+	b	.L171
+.L177:
 	mov	w5, 0
-	b	.L189
-.L190:
+	b	.L178
+.L179:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
-.L181:
+.L170:
 	ldrb	w0, [x8, x7]
 	mov	w1, w6
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L180
+	cbnz	w0, .L169
 	add	w5, w5, w11
 	and	w5, w5, 65535
-.L180:
+.L169:
 	add	x7, x7, 1
 	cmp	w10, w7, uxth
-	bhi	.L181
-	cbz	w5, .L183
+	bhi	.L170
+	cbz	w5, .L172
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.L182:
+.L171:
 	adrp	x0, .LANCHOR40
 	mov	w1, 6
 	ldr	x0, [x0, #:lo12:.LANCHOR40]
@@ -1457,7 +1423,7 @@ update_multiplier_value:
 GetFreeBlockMinEraseCount:
 	adrp	x0, .LANCHOR47
 	ldr	x0, [x0, #:lo12:.LANCHOR47]
-	cbz	x0, .L193
+	cbz	x0, .L182
 	adrp	x1, .LANCHOR40
 	ldr	x1, [x1, #:lo12:.LANCHOR40]
 	sub	x0, x0, x1
@@ -1470,7 +1436,7 @@ GetFreeBlockMinEraseCount:
 	and	x0, x0, 65535
 	ldrh	w0, [x1, x0, lsl 1]
 	ret
-.L193:
+.L182:
 	mov	w0, 0
 	ret
 	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
@@ -1482,7 +1448,7 @@ GetFreeBlockMaxEraseCount:
 	adrp	x1, .LANCHOR47
 	and	w0, w0, 65535
 	ldr	x1, [x1, #:lo12:.LANCHOR47]
-	cbz	x1, .L201
+	cbz	x1, .L190
 	adrp	x2, .LANCHOR48
 	mov	w3, 7
 	mov	w5, 6
@@ -1501,867 +1467,37 @@ GetFreeBlockMaxEraseCount:
 	mul	x1, x1, x2
 	mov	w2, 0
 	and	w1, w1, 65535
-.L197:
+.L186:
 	cmp	w0, w2
-	beq	.L200
+	beq	.L189
 	umull	x4, w1, w5
 	ldrh	w4, [x3, x4]
 	cmp	w4, w6
-	bne	.L198
-.L200:
+	bne	.L187
+.L189:
 	adrp	x0, .LANCHOR43
 	ubfiz	x1, x1, 1, 16
 	ldr	x0, [x0, #:lo12:.LANCHOR43]
 	ldrh	w0, [x0, x1]
 	ret
-.L198:
+.L187:
 	add	w2, w2, 1
 	mov	w1, w4
 	and	w2, w2, 65535
-	b	.L197
-.L201:
+	b	.L186
+.L190:
 	mov	w0, 0
 	ret
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
-	.section	.text.FtlPrintInfo2buf,"ax",@progbits
+	.section	.text.free_data_superblock,"ax",@progbits
 	.align	2
-	.global	FtlPrintInfo2buf
-	.type	FtlPrintInfo2buf, %function
-FtlPrintInfo2buf:
-	stp	x29, x30, [sp, -96]!
-	mov	x1, 64
-	adrp	x2, .LC2
-	add	x2, x2, :lo12:.LC2
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR37
-	stp	x21, x22, [sp, 32]
-	mov	x21, x0
-	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR48
-	stp	x25, x26, [sp, 64]
-	adrp	x22, .LANCHOR39
-	str	x27, [sp, 80]
-	bl	snprintf
-	add	x20, x21, x0, sxtw
-	adrp	x0, .LANCHOR26
-	mov	x1, 64
-	adrp	x2, .LC3
-	ldr	w3, [x0, #:lo12:.LANCHOR26]
-	add	x2, x2, :lo12:.LC3
-	mov	x0, x20
-	add	x22, x22, :lo12:.LANCHOR39
-	adrp	x24, .LANCHOR51
-	adrp	x25, .LANCHOR81
-	add	x25, x25, :lo12:.LANCHOR81
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC4
-	add	x2, x2, :lo12:.LC4
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR61
-	mov	x1, 64
-	adrp	x2, .LC5
-	add	x2, x2, :lo12:.LC5
-	ldr	w3, [x0, #:lo12:.LANCHOR61]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR59
-	mov	x1, 64
-	adrp	x2, .LC6
-	add	x2, x2, :lo12:.LC6
-	ldr	w3, [x0, #:lo12:.LANCHOR59]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR62
-	mov	x1, 64
-	adrp	x2, .LC7
-	add	x2, x2, :lo12:.LC7
-	ldr	w3, [x0, #:lo12:.LANCHOR62]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR63
-	mov	x1, 64
-	adrp	x2, .LC8
-	add	x2, x2, :lo12:.LC8
-	ldr	w3, [x0, #:lo12:.LANCHOR63]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR64
-	mov	x1, 64
-	adrp	x2, .LC9
-	add	x2, x2, :lo12:.LC9
-	ldr	w3, [x0, #:lo12:.LANCHOR64]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR65
-	mov	x1, 64
-	adrp	x2, .LC10
-	add	x2, x2, :lo12:.LC10
-	ldr	w3, [x0, #:lo12:.LANCHOR65]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR66
-	mov	x1, 64
-	adrp	x2, .LC11
-	add	x2, x2, :lo12:.LC11
-	ldr	w3, [x0, #:lo12:.LANCHOR66]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR67
-	mov	x1, 64
-	adrp	x2, .LC12
-	add	x2, x2, :lo12:.LC12
-	ldr	w3, [x0, #:lo12:.LANCHOR67]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR68
-	mov	x1, 64
-	adrp	x2, .LC13
-	add	x2, x2, :lo12:.LC13
-	ldr	w3, [x0, #:lo12:.LANCHOR68]
-	mov	x0, x20
-	lsr	w3, w3, 11
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR69
-	mov	x1, 64
-	adrp	x2, .LC14
-	ldr	w3, [x0, #:lo12:.LANCHOR69]
-	add	x2, x2, :lo12:.LC14
-	mov	x0, x20
-	lsr	w3, w3, 11
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR70
-	mov	x1, 64
-	adrp	x2, .LC15
-	ldr	w3, [x0, #:lo12:.LANCHOR70]
-	add	x2, x2, :lo12:.LC15
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR71
-	mov	x1, 64
-	adrp	x2, .LC16
-	add	x2, x2, :lo12:.LC16
-	ldr	w3, [x0, #:lo12:.LANCHOR71]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	add	x0, x19, :lo12:.LANCHOR37
-	mov	x1, 64
-	adrp	x2, .LC17
-	add	x2, x2, :lo12:.LC17
-	ldrh	w3, [x0, 6]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrh	w3, [x23, #:lo12:.LANCHOR48]
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC18
-	add	x2, x2, :lo12:.LC18
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR72
-	mov	x1, 64
-	adrp	x2, .LC19
-	add	x2, x2, :lo12:.LC19
-	ldr	w3, [x0, #:lo12:.LANCHOR72]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR73
-	mov	x1, 64
-	adrp	x2, .LC20
-	add	x2, x2, :lo12:.LC20
-	ldr	w3, [x0, #:lo12:.LANCHOR73]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR74
-	mov	x1, 64
-	adrp	x2, .LC21
-	add	x2, x2, :lo12:.LC21
-	ldr	w3, [x0, #:lo12:.LANCHOR74]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR75
-	mov	x1, 64
-	adrp	x2, .LC22
-	add	x2, x2, :lo12:.LC22
-	ldr	w3, [x0, #:lo12:.LANCHOR75]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR76
-	mov	x1, 64
-	adrp	x2, .LC23
-	add	x2, x2, :lo12:.LC23
-	ldr	w3, [x0, #:lo12:.LANCHOR76]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR77
-	mov	x1, 64
-	adrp	x2, .LC24
-	add	x2, x2, :lo12:.LC24
-	ldr	w3, [x0, #:lo12:.LANCHOR77]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrh	w3, [x22, 30]
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC25
-	add	x2, x2, :lo12:.LC25
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrh	w3, [x22, 28]
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC26
-	add	x2, x2, :lo12:.LC26
-	adrp	x22, .LANCHOR42
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR34
-	mov	x1, 64
-	adrp	x2, .LC27
-	add	x2, x2, :lo12:.LC27
-	ldr	w3, [x0, #:lo12:.LANCHOR34]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR31
-	mov	x1, 64
-	adrp	x2, .LC28
-	add	x2, x2, :lo12:.LC28
-	ldr	w3, [x0, #:lo12:.LANCHOR31]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR2
-	mov	x1, 64
-	adrp	x2, .LC29
-	add	x2, x2, :lo12:.LC29
-	ldr	w3, [x0, #:lo12:.LANCHOR2]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR38+6
-	mov	x1, 64
-	adrp	x2, .LC30
-	add	x2, x2, :lo12:.LC30
-	ldrh	w3, [x0, #:lo12:.LANCHOR38+6]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR5
-	mov	x1, 64
-	adrp	x2, .LC31
-	add	x2, x2, :lo12:.LC31
-	ldrh	w3, [x0, #:lo12:.LANCHOR5]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR78
-	mov	x1, 64
-	adrp	x2, .LC32
-	add	x2, x2, :lo12:.LC32
-	ldrh	w3, [x0, #:lo12:.LANCHOR78]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR7
-	mov	x1, 64
-	adrp	x2, .LC33
-	add	x2, x2, :lo12:.LC33
-	ldr	w3, [x0, #:lo12:.LANCHOR7]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR79
-	mov	x1, 64
-	adrp	x2, .LC34
-	add	x2, x2, :lo12:.LC34
-	ldrh	w3, [x0, #:lo12:.LANCHOR79]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrh	w3, [x19, #:lo12:.LANCHOR37]
-	add	x19, x24, :lo12:.LANCHOR51
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC35
-	add	x2, x2, :lo12:.LC35
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrh	w3, [x19, 2]
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC36
-	add	x2, x2, :lo12:.LC36
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrb	w3, [x19, 6]
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC37
-	add	x2, x2, :lo12:.LC37
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrh	w3, [x24, #:lo12:.LANCHOR51]
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC38
-	add	x2, x2, :lo12:.LC38
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrb	w3, [x19, 8]
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC39
-	add	x2, x2, :lo12:.LC39
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrh	w3, [x19, 4]
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC40
-	add	x2, x2, :lo12:.LC40
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrh	w1, [x24, #:lo12:.LANCHOR51]
-	adrp	x24, .LANCHOR52
-	ldr	x0, [x22, #:lo12:.LANCHOR42]
-	add	x19, x24, :lo12:.LANCHOR52
-	adrp	x2, .LC41
-	add	x2, x2, :lo12:.LC41
-	ldrh	w3, [x0, x1, lsl 1]
-	mov	x1, 64
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrh	w3, [x19, 2]
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC42
-	add	x2, x2, :lo12:.LC42
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrb	w3, [x19, 6]
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC43
-	add	x2, x2, :lo12:.LC43
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrh	w3, [x24, #:lo12:.LANCHOR52]
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC44
-	add	x2, x2, :lo12:.LC44
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrb	w3, [x19, 8]
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC45
-	add	x2, x2, :lo12:.LC45
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrh	w3, [x19, 4]
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC46
-	add	x2, x2, :lo12:.LC46
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrh	w1, [x24, #:lo12:.LANCHOR52]
-	adrp	x24, .LANCHOR53
-	ldr	x0, [x22, #:lo12:.LANCHOR42]
-	add	x19, x24, :lo12:.LANCHOR53
-	adrp	x2, .LC47
-	add	x2, x2, :lo12:.LC47
-	ldrh	w3, [x0, x1, lsl 1]
-	mov	x1, 64
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrh	w3, [x19, 2]
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC48
-	add	x2, x2, :lo12:.LC48
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrb	w3, [x19, 6]
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC49
-	add	x2, x2, :lo12:.LC49
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrh	w3, [x24, #:lo12:.LANCHOR53]
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC50
-	add	x2, x2, :lo12:.LC50
-	adrp	x24, .LANCHOR80
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrb	w3, [x19, 8]
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC51
-	add	x2, x2, :lo12:.LC51
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrh	w3, [x19, 4]
-	add	x19, x24, :lo12:.LANCHOR80
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC52
-	add	x2, x2, :lo12:.LC52
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrh	w3, [x19, 2]
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC53
-	add	x2, x2, :lo12:.LC53
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrb	w3, [x19, 6]
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC54
-	add	x2, x2, :lo12:.LC54
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrh	w3, [x24, #:lo12:.LANCHOR80]
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC55
-	add	x2, x2, :lo12:.LC55
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrb	w3, [x19, 8]
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC56
-	add	x2, x2, :lo12:.LC56
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrh	w3, [x19, 4]
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC57
-	add	x2, x2, :lo12:.LC57
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldp	w5, w3, [x25, 76]
-	mov	x1, 64
-	ldr	w4, [x25, 84]
-	adrp	x2, .LC58
-	mov	x0, x20
-	add	x2, x2, :lo12:.LC58
-	bl	snprintf
-	add	x19, x20, x0, sxtw
-	ldr	w3, [x25, 72]
-	mov	x1, 64
-	mov	x0, x19
-	adrp	x2, .LC59
-	add	x2, x2, :lo12:.LC59
-	bl	snprintf
-	add	x19, x19, x0, sxtw
-	ldr	w3, [x25, 96]
-	mov	x1, 64
-	mov	x0, x19
-	adrp	x2, .LC60
-	add	x2, x2, :lo12:.LC60
-	bl	snprintf
-	add	x19, x19, x0, sxtw
-	adrp	x0, .LANCHOR82
-	mov	x1, 64
-	adrp	x2, .LC61
-	add	x2, x2, :lo12:.LC61
-	ldrh	w3, [x0, #:lo12:.LANCHOR82]
-	mov	x0, x19
-	bl	snprintf
-	add	x19, x19, x0, sxtw
-	adrp	x0, .LANCHOR83
-	mov	x1, 64
-	adrp	x2, .LC62
-	add	x2, x2, :lo12:.LC62
-	ldrh	w3, [x0, #:lo12:.LANCHOR83]
-	mov	x0, x19
-	bl	snprintf
-	add	x19, x19, x0, sxtw
-	adrp	x0, .LANCHOR84
-	mov	x1, 64
-	adrp	x2, .LC63
-	add	x2, x2, :lo12:.LC63
-	ldr	w3, [x0, #:lo12:.LANCHOR84]
-	mov	x0, x19
-	bl	snprintf
-	add	x19, x19, x0, sxtw
-	adrp	x0, .LANCHOR85
-	adrp	x2, .LC64
-	add	x2, x2, :lo12:.LC64
-	mov	x1, 64
-	ldrh	w3, [x0, #:lo12:.LANCHOR85]
-	mov	x0, x19
-	bl	snprintf
-	add	x19, x19, x0, sxtw
-	bl	GetFreeBlockMinEraseCount
-	and	w3, w0, 65535
-	mov	x1, 64
-	mov	x0, x19
-	adrp	x2, .LC65
-	add	x2, x2, :lo12:.LC65
-	bl	snprintf
-	add	x19, x19, x0, sxtw
-	ldrh	w0, [x23, #:lo12:.LANCHOR48]
-	bl	GetFreeBlockMaxEraseCount
-	and	w3, w0, 65535
-	adrp	x2, .LC66
-	mov	x0, x19
-	add	x2, x2, :lo12:.LC66
-	mov	x1, 64
-	bl	snprintf
-	add	x19, x19, x0, sxtw
-	adrp	x0, .LANCHOR86
-	ldr	w0, [x0, #:lo12:.LANCHOR86]
-	cmp	w0, 1
-	beq	.L203
-.L208:
-	sub	w0, w19, w21
-	ldr	x27, [sp, 80]
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 96
-	ret
-.L203:
-	ldrh	w0, [x24, #:lo12:.LANCHOR80]
+	.global	free_data_superblock
+	.type	free_data_superblock, %function
+free_data_superblock:
+	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L205
-	ldr	x1, [x22, #:lo12:.LANCHOR42]
-	ubfiz	x0, x0, 1, 16
-	adrp	x2, .LC67
-	add	x2, x2, :lo12:.LC67
-	ldrh	w3, [x1, x0]
-	mov	x0, x19
-	mov	x1, 64
-	bl	snprintf
-	add	x19, x19, x0, sxtw
-.L205:
-	mov	w0, 0
-	adrp	x24, .LC68
-	bl	List_get_gc_head_node
-	add	x24, x24, :lo12:.LC68
-	and	w4, w0, 65535
-	mov	w23, 0
-	mov	w27, 65535
-	adrp	x20, .LANCHOR40
-	mov	w26, 6
-.L207:
-	cmp	w4, w27
-	beq	.L206
-	adrp	x0, .LANCHOR43
-	umull	x25, w4, w26
-	ldr	x2, [x22, #:lo12:.LANCHOR42]
-	ubfiz	x1, x4, 1, 16
-	ldr	x3, [x0, #:lo12:.LANCHOR43]
-	ldr	x0, [x20, #:lo12:.LANCHOR40]
-	add	x0, x0, x25
-	ldrh	w5, [x2, x1]
-	ldrh	w7, [x3, x1]
-	mov	x2, x24
-	mov	w3, w23
-	mov	x1, 64
-	ldrh	w6, [x0, 4]
-	mov	x0, x19
-	add	w23, w23, 1
-	bl	snprintf
-	add	x19, x19, x0, sxtw
-	ldr	x0, [x20, #:lo12:.LANCHOR40]
-	cmp	w23, 16
-	ldrh	w4, [x0, x25]
-	bne	.L207
-.L206:
-	adrp	x0, .LANCHOR47
-	adrp	x23, .LC69
-	add	x23, x23, :lo12:.LC69
-	mov	w22, 0
-	ldr	x4, [x0, #:lo12:.LANCHOR47]
-	mov	w25, 65535
-	ldr	x0, [x20, #:lo12:.LANCHOR40]
-	mov	w26, 6
-	adrp	x27, .LANCHOR43
-	sub	x4, x4, x0
-	mov	x0, -6148914691236517206
-	asr	x4, x4, 1
-	movk	x0, 0xaaab, lsl 0
-	mul	x4, x4, x0
-	and	w4, w4, 65535
-.L209:
-	cmp	w4, w25
-	beq	.L208
-	umull	x24, w4, w26
-	ldr	x0, [x20, #:lo12:.LANCHOR40]
-	ldr	x2, [x27, #:lo12:.LANCHOR43]
-	ubfiz	x1, x4, 1, 16
-	add	x0, x0, x24
-	mov	w3, w22
-	add	w22, w22, 1
-	ldrh	w6, [x2, x1]
-	mov	x2, x23
-	ldrh	w5, [x0, 4]
-	mov	x1, 64
-	mov	x0, x19
-	bl	snprintf
-	add	x19, x19, x0, sxtw
-	cmp	w22, 4
-	beq	.L208
-	ldr	x0, [x20, #:lo12:.LANCHOR40]
-	ldrh	w4, [x0, x24]
-	b	.L209
-	.size	FtlPrintInfo2buf, .-FtlPrintInfo2buf
-	.section	.text.rknand_proc_ftlread,"ax",@progbits
-	.align	2
-	.global	rknand_proc_ftlread
-	.type	rknand_proc_ftlread, %function
-rknand_proc_ftlread:
-	cmp	w0, 2047
-	ble	.L217
-	stp	x29, x30, [sp, -32]!
-	adrp	x3, .LC70
-	adrp	x2, .LC71
-	add	x3, x3, :lo12:.LC70
-	add	x29, sp, 0
-	add	x2, x2, :lo12:.LC71
-	stp	x19, x20, [sp, 16]
-	mov	x20, x1
-	mov	x1, 64
-	mov	x0, x20
-	bl	snprintf
-	add	x19, x20, x0, sxtw
-	mov	x0, x19
-	bl	FtlPrintInfo2buf
-	add	x0, x19, x0, sxtw
-	sub	w0, w0, w20
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	ret
-.L217:
-	mov	w0, 0
-	ret
-	.size	rknand_proc_ftlread, .-rknand_proc_ftlread
-	.section	.text.GetSwlReplaceBlock,"ax",@progbits
-	.align	2
-	.global	GetSwlReplaceBlock
-	.type	GetSwlReplaceBlock, %function
-GetSwlReplaceBlock:
-	stp	x29, x30, [sp, -32]!
-	adrp	x2, .LANCHOR74
-	adrp	x8, .LANCHOR77
-	add	x29, sp, 0
-	str	x19, [sp, 16]
-	ldr	w3, [x2, #:lo12:.LANCHOR74]
-	ldr	w7, [x8, #:lo12:.LANCHOR77]
-	cmp	w3, w7
-	bcs	.L223
-	adrp	x1, .LANCHOR5
-	adrp	x0, .LANCHOR72
-	mov	w5, 0
-	mov	w4, 0
-	ldrh	w3, [x1, #:lo12:.LANCHOR5]
-	adrp	x1, .LANCHOR43
-	str	wzr, [x0, #:lo12:.LANCHOR72]
-	ldr	x6, [x1, #:lo12:.LANCHOR43]
-	mov	x1, 0
-.L224:
-	cmp	w3, w1
-	bhi	.L225
-	cbz	w5, .L226
-	str	w4, [x0, #:lo12:.LANCHOR72]
-.L226:
-	ldr	w1, [x0, #:lo12:.LANCHOR72]
-	udiv	w3, w1, w3
-	str	w3, [x2, #:lo12:.LANCHOR74]
-	adrp	x3, .LANCHOR73
-	ldr	w3, [x3, #:lo12:.LANCHOR73]
-	sub	w1, w1, w3
-	adrp	x3, .LANCHOR14
-	ldrh	w3, [x3, #:lo12:.LANCHOR14]
-	udiv	w1, w1, w3
-	str	w1, [x0, #:lo12:.LANCHOR72]
-.L227:
-	ldr	w10, [x2, #:lo12:.LANCHOR74]
-	add	w0, w7, 256
-	cmp	w0, w10
-	bls	.L232
-	adrp	x1, .LANCHOR76
-	add	w0, w7, 768
-	ldr	w1, [x1, #:lo12:.LANCHOR76]
-	cmp	w0, w1
-	bls	.L232
-.L234:
-	mov	w19, 65535
-.L233:
-	mov	w0, w19
-	ldr	x19, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	ret
-.L225:
-	ldrh	w5, [x6, x1, lsl 1]
-	add	x1, x1, 1
-	add	w4, w4, w5
-	mov	w5, 1
-	b	.L224
-.L223:
-	adrp	x1, .LANCHOR76
-	ldr	w0, [x1, #:lo12:.LANCHOR76]
-	cmp	w3, w0
-	bls	.L227
-	add	w0, w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR76]
-	adrp	x0, .LANCHOR43
-	adrp	x1, .LANCHOR5
-	add	x1, x1, :lo12:.LANCHOR5
-	ldr	x4, [x0, #:lo12:.LANCHOR43]
-	mov	w0, 0
-.L229:
-	ldrh	w3, [x1]
-	cmp	w0, w3
-	bcs	.L227
-	ubfiz	x5, x0, 1, 32
-	add	w0, w0, 1
-	ldrh	w3, [x4, x5]
-	add	w3, w3, 1
-	strh	w3, [x4, x5]
-	b	.L229
-.L232:
-	adrp	x0, .LANCHOR48
-	ldrh	w0, [x0, #:lo12:.LANCHOR48]
-	add	w0, w0, w0, lsl 1
-	lsr	w0, w0, 2
-	bl	GetFreeBlockMaxEraseCount
-	and	w6, w0, 65535
-	add	w0, w7, 64
-	cmp	w6, w0
-	bcc	.L234
-	adrp	x0, .LANCHOR41
-	ldr	x0, [x0, #:lo12:.LANCHOR41]
-	cbz	x0, .L234
-	adrp	x1, .LANCHOR5
-	mov	w3, 65535
-	mov	x14, -6148914691236517206
-	mov	w2, w3
-	ldrh	w13, [x1, #:lo12:.LANCHOR5]
-	adrp	x1, .LANCHOR40
-	mov	w12, w3
-	movk	x14, 0xaaab, lsl 0
-	ldr	x11, [x1, #:lo12:.LANCHOR40]
-	adrp	x1, .LANCHOR43
-	mov	w15, 6
-	ldr	x4, [x1, #:lo12:.LANCHOR43]
-	mov	w1, 0
-.L235:
-	ldrh	w5, [x0]
-	cmp	w5, w12
-	bne	.L238
-	mov	w19, w2
-.L237:
-	mov	w0, 65535
-	cmp	w19, w0
-	beq	.L234
-	ubfiz	x2, x19, 1, 32
-	ldrh	w5, [x4, x2]
-	cmp	w7, w5
-	bcs	.L239
-	bl	GetFreeBlockMinEraseCount
-	cmp	w7, w0, uxth
-	bcs	.L239
-	str	w3, [x8, #:lo12:.LANCHOR77]
-.L239:
-	cmp	w10, w5
-	bls	.L234
-	add	w0, w5, 128
-	cmp	w6, w0
-	ble	.L234
-	add	w0, w5, 256
-	adrp	x1, .LANCHOR76
-	cmp	w10, w0
-	bhi	.L240
-	ldr	w3, [x1, #:lo12:.LANCHOR76]
-	add	w0, w5, 768
-	cmp	w0, w3
-	bcs	.L234
-.L240:
-	adrp	x0, .LANCHOR42
-	ldr	w3, [x1, #:lo12:.LANCHOR76]
-	mov	w1, w19
-	ldr	x0, [x0, #:lo12:.LANCHOR42]
-	ldrh	w4, [x0, x2]
-	mov	w2, w10
-	adrp	x0, .LC72
-	add	x0, x0, :lo12:.LC72
-	bl	printf
-	adrp	x0, .LANCHOR87
-	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR87]
-	b	.L233
-.L238:
-	add	w1, w1, 1
-	and	w1, w1, 65535
-	cmp	w1, w13
-	bhi	.L234
-	ldrh	w16, [x0, 4]
-	cbz	w16, .L236
-	sub	x0, x0, x11
-	asr	x0, x0, 1
-	mul	x0, x0, x14
-	and	w19, w0, 65535
-	and	x0, x0, 65535
-	ldrh	w0, [x4, x0, lsl 1]
-	cmp	w7, w0
-	bcs	.L237
-	cmp	w3, w0
-	bls	.L236
-	mov	w3, w0
-	mov	w2, w19
-.L236:
-	umaddl	x0, w5, w15, x11
-	b	.L235
-	.size	GetSwlReplaceBlock, .-GetSwlReplaceBlock
-	.section	.text.free_data_superblock,"ax",@progbits
-	.align	2
-	.global	free_data_superblock
-	.type	free_data_superblock, %function
-free_data_superblock:
-	and	w0, w0, 65535
-	mov	w1, 65535
-	cmp	w0, w1
-	beq	.L254
+	beq	.L194
 	stp	x29, x30, [sp, -16]!
 	adrp	x2, .LANCHOR42
 	ubfiz	x1, x0, 1, 16
@@ -2372,7 +1508,7 @@ free_data_superblock:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L254:
+.L194:
 	mov	w0, 0
 	ret
 	.size	free_data_superblock, .-free_data_superblock
@@ -2389,35 +1525,35 @@ get_new_active_ppa:
 	mov	w0, 65535
 	str	x21, [sp, 32]
 	cmp	w1, w0
-	bne	.L258
-	adrp	x1, .LANCHOR88
+	bne	.L198
+	adrp	x1, .LANCHOR61
 	adrp	x0, .LC1
-	mov	w2, 2740
-	add	x1, x1, :lo12:.LANCHOR88
+	mov	w2, 2786
+	add	x1, x1, :lo12:.LANCHOR61
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L258:
+.L198:
 	adrp	x20, .LANCHOR19
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR19]
 	cmp	w1, w0
-	bne	.L259
-	adrp	x1, .LANCHOR88
+	bne	.L199
+	adrp	x1, .LANCHOR61
 	adrp	x0, .LC1
-	mov	w2, 2741
-	add	x1, x1, :lo12:.LANCHOR88
+	mov	w2, 2787
+	add	x1, x1, :lo12:.LANCHOR61
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L259:
+.L199:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L260
-	adrp	x1, .LANCHOR88
+	cbnz	w0, .L200
+	adrp	x1, .LANCHOR61
 	adrp	x0, .LC1
-	mov	w2, 2742
-	add	x1, x1, :lo12:.LANCHOR88
+	mov	w2, 2788
+	add	x1, x1, :lo12:.LANCHOR61
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L260:
+.L200:
 	ldrb	w0, [x19, 6]
 	adrp	x1, .LANCHOR3
 	strb	wzr, [x19, 10]
@@ -2425,9 +1561,9 @@ get_new_active_ppa:
 	ldrh	w2, [x1, #:lo12:.LANCHOR3]
 	mov	w1, 65535
 	ldrh	w0, [x19, x0, lsl 1]
-.L261:
+.L201:
 	cmp	w0, w1
-	beq	.L263
+	beq	.L203
 	ldrh	w21, [x19, 2]
 	mov	w3, 65535
 	ldrh	w1, [x19, 4]
@@ -2436,99 +1572,99 @@ get_new_active_ppa:
 	sub	w1, w1, #1
 	and	w1, w1, 65535
 	strh	w1, [x19, 4]
-.L265:
+.L205:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	cmp	w2, w0
-	bne	.L264
+	bne	.L204
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
 	mov	w0, 0
-.L264:
+.L204:
 	add	x4, x19, x0, sxtw 1
 	ldrh	w4, [x4, 16]
 	cmp	w4, w3
-	beq	.L265
+	beq	.L205
 	strb	w0, [x19, 6]
 	ldrh	w2, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR19]
 	cmp	w2, w0
-	bne	.L257
-	cbz	w1, .L257
-	adrp	x1, .LANCHOR88
+	bne	.L197
+	cbz	w1, .L197
+	adrp	x1, .LANCHOR61
 	adrp	x0, .LC1
-	mov	w2, 2763
-	add	x1, x1, :lo12:.LANCHOR88
+	mov	w2, 2809
+	add	x1, x1, :lo12:.LANCHOR61
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L257:
+.L197:
 	mov	w0, w21
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L263:
+.L203:
 	ldrb	w0, [x19, 6]
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x19, 6]
 	cmp	w0, w2
-	bne	.L262
+	bne	.L202
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L262:
+.L202:
 	ldrb	w0, [x19, 6]
 	add	x0, x0, 8
 	ldrh	w0, [x19, x0, lsl 1]
-	b	.L261
+	b	.L201
 	.size	get_new_active_ppa, .-get_new_active_ppa
 	.section	.text.FtlGcBufInit,"ax",@progbits
 	.align	2
 	.global	FtlGcBufInit
 	.type	FtlGcBufInit, %function
 FtlGcBufInit:
-	adrp	x1, .LANCHOR90
-	adrp	x0, .LANCHOR89
-	adrp	x7, .LANCHOR91
-	adrp	x6, .LANCHOR92
-	ldr	x5, [x1, #:lo12:.LANCHOR90]
+	adrp	x1, .LANCHOR63
+	adrp	x0, .LANCHOR62
+	adrp	x7, .LANCHOR64
+	adrp	x6, .LANCHOR65
+	ldr	x5, [x1, #:lo12:.LANCHOR63]
 	adrp	x1, .LANCHOR23
-	str	wzr, [x0, #:lo12:.LANCHOR89]
+	str	wzr, [x0, #:lo12:.LANCHOR62]
 	adrp	x0, .LANCHOR3
 	ldrh	w10, [x1, #:lo12:.LANCHOR23]
 	adrp	x1, .LANCHOR24
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	mov	w8, 24
 	ldrh	w11, [x1, #:lo12:.LANCHOR24]
-	adrp	x1, .LANCHOR93
-	ldr	x14, [x7, #:lo12:.LANCHOR91]
+	adrp	x1, .LANCHOR66
+	ldr	x14, [x7, #:lo12:.LANCHOR64]
 	mov	x3, x5
-	ldr	x4, [x1, #:lo12:.LANCHOR93]
+	ldr	x4, [x1, #:lo12:.LANCHOR66]
 	mov	w2, 0
-	ldr	x15, [x6, #:lo12:.LANCHOR92]
+	ldr	x15, [x6, #:lo12:.LANCHOR65]
 	nop // between mem op and mult-accumulate
 	umaddl	x8, w0, w8, x5
 	add	x4, x4, 8
 	mov	w1, 0
 	mov	w16, 1
-.L273:
+.L213:
 	add	w13, w2, w10
 	add	w12, w1, w11
 	cmp	x3, x8
-	bne	.L274
-	adrp	x1, .LANCHOR94
-	ldr	x7, [x7, #:lo12:.LANCHOR91]
-	ldr	x6, [x6, #:lo12:.LANCHOR92]
+	bne	.L214
+	adrp	x1, .LANCHOR67
+	ldr	x7, [x7, #:lo12:.LANCHOR64]
+	ldr	x6, [x6, #:lo12:.LANCHOR65]
 	mov	w8, 24
-	ldr	w4, [x1, #:lo12:.LANCHOR94]
-.L275:
+	ldr	w4, [x1, #:lo12:.LANCHOR67]
+.L215:
 	cmp	w0, w4
-	bcc	.L276
+	bcc	.L216
 	ret
-.L274:
+.L214:
 	asr	w2, w2, 2
 	asr	w1, w1, 2
 	add	x2, x14, x2, sxtw 2
@@ -2540,8 +1676,8 @@ FtlGcBufInit:
 	add	x4, x4, 32
 	mov	w1, w12
 	mov	w2, w13
-	b	.L273
-.L276:
+	b	.L213
+.L216:
 	umull	x3, w0, w8
 	mul	w1, w10, w0
 	add	x2, x5, x3
@@ -2555,44 +1691,44 @@ FtlGcBufInit:
 	asr	w1, w1, 2
 	add	x1, x6, x1, sxtw 2
 	str	x1, [x2, 8]
-	b	.L275
+	b	.L215
 	.size	FtlGcBufInit, .-FtlGcBufInit
 	.section	.text.FtlGcBufFree,"ax",@progbits
 	.align	2
 	.global	FtlGcBufFree
 	.type	FtlGcBufFree, %function
 FtlGcBufFree:
-	adrp	x2, .LANCHOR94
+	adrp	x2, .LANCHOR67
 	mov	w3, 0
 	mov	w8, 24
-	ldr	w7, [x2, #:lo12:.LANCHOR94]
-	adrp	x2, .LANCHOR90
-	ldr	x5, [x2, #:lo12:.LANCHOR90]
-.L278:
+	ldr	w7, [x2, #:lo12:.LANCHOR67]
+	adrp	x2, .LANCHOR63
+	ldr	x5, [x2, #:lo12:.LANCHOR63]
+.L218:
 	cmp	w3, w1
-	bcs	.L277
+	bcs	.L217
 	ubfiz	x4, x3, 5, 16
 	mov	w2, 0
 	add	x4, x0, x4
-	b	.L283
-.L279:
+	b	.L223
+.L219:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-.L283:
+.L223:
 	cmp	w2, w7
-	bcs	.L280
+	bcs	.L220
 	umull	x6, w2, w8
 	add	x10, x5, x6
 	ldr	x11, [x5, x6]
 	ldr	x6, [x4, 8]
 	cmp	x11, x6
-	bne	.L279
+	bne	.L219
 	str	wzr, [x10, 16]
-.L280:
+.L220:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L278
-.L277:
+	b	.L218
+.L217:
 	ret
 	.size	FtlGcBufFree, .-FtlGcBufFree
 	.section	.text.FtlGcBufAlloc,"ax",@progbits
@@ -2600,38 +1736,38 @@ FtlGcBufFree:
 	.global	FtlGcBufAlloc
 	.type	FtlGcBufAlloc, %function
 FtlGcBufAlloc:
-	adrp	x2, .LANCHOR94
+	adrp	x2, .LANCHOR67
 	mov	w3, 0
 	mov	w7, 24
 	mov	w8, 1
-	ldr	w5, [x2, #:lo12:.LANCHOR94]
-	adrp	x2, .LANCHOR90
-	ldr	x6, [x2, #:lo12:.LANCHOR90]
-.L285:
+	ldr	w5, [x2, #:lo12:.LANCHOR67]
+	adrp	x2, .LANCHOR63
+	ldr	x6, [x2, #:lo12:.LANCHOR63]
+.L225:
 	cmp	w3, w1
-	bcs	.L284
+	bcs	.L224
 	mov	w2, 0
-	b	.L290
-.L286:
+	b	.L230
+.L226:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-.L290:
+.L230:
 	cmp	w2, w5
-	bcs	.L287
+	bcs	.L227
 	umaddl	x4, w2, w7, x6
 	ldr	w10, [x4, 16]
-	cbnz	w10, .L286
+	cbnz	w10, .L226
 	ubfiz	x2, x3, 5, 16
 	ldr	x10, [x4]
 	add	x2, x0, x2
 	str	w8, [x4, 16]
 	ldr	x4, [x4, 8]
 	stp	x10, x4, [x2, 8]
-.L287:
+.L227:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L285
-.L284:
+	b	.L225
+.L224:
 	ret
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
 	.section	.text.IsBlkInGcList,"ax",@progbits
@@ -2639,23 +1775,23 @@ FtlGcBufAlloc:
 	.global	IsBlkInGcList
 	.type	IsBlkInGcList, %function
 IsBlkInGcList:
-	adrp	x1, .LANCHOR95
+	adrp	x1, .LANCHOR68
 	and	w0, w0, 65535
-	ldrh	w2, [x1, #:lo12:.LANCHOR95]
-	adrp	x1, .LANCHOR96
-	ldr	x3, [x1, #:lo12:.LANCHOR96]
+	ldrh	w2, [x1, #:lo12:.LANCHOR68]
+	adrp	x1, .LANCHOR69
+	ldr	x3, [x1, #:lo12:.LANCHOR69]
 	mov	x1, 0
-.L292:
+.L232:
 	cmp	w2, w1, uxth
-	bhi	.L294
+	bhi	.L234
 	mov	w0, 0
 	ret
-.L294:
+.L234:
 	add	x1, x1, 1
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w0
-	bne	.L292
+	bne	.L232
 	mov	w0, 1
 	ret
 	.size	IsBlkInGcList, .-IsBlkInGcList
@@ -2672,40 +1808,40 @@ FtlGcUpdatePage:
 	add	x29, sp, 0
 	bl	P2V_block_in_plane
 	and	w7, w0, 65535
-	adrp	x4, .LANCHOR95
-	adrp	x2, .LANCHOR96
+	adrp	x4, .LANCHOR68
+	adrp	x2, .LANCHOR69
 	mov	x3, 0
-	ldrh	w1, [x4, #:lo12:.LANCHOR95]
-	ldr	x5, [x2, #:lo12:.LANCHOR96]
-.L297:
+	ldrh	w1, [x4, #:lo12:.LANCHOR68]
+	ldr	x5, [x2, #:lo12:.LANCHOR69]
+.L237:
 	and	w2, w3, 65535
 	cmp	w2, w1
-	bcc	.L299
-	bne	.L298
+	bcc	.L239
+	bne	.L238
 	and	x3, x3, 65535
 	strh	w0, [x5, x3, lsl 1]
-	ldrh	w0, [x4, #:lo12:.LANCHOR95]
+	ldrh	w0, [x4, #:lo12:.LANCHOR68]
 	add	w0, w0, 1
-	strh	w0, [x4, #:lo12:.LANCHOR95]
-	b	.L298
-.L299:
+	strh	w0, [x4, #:lo12:.LANCHOR68]
+	b	.L238
+.L239:
 	add	x3, x3, 1
 	add	x2, x5, x3, lsl 1
 	ldrh	w2, [x2, -2]
 	cmp	w2, w7
-	bne	.L297
-.L298:
-	adrp	x4, .LANCHOR97
-	adrp	x1, .LANCHOR98
+	bne	.L237
+.L238:
+	adrp	x4, .LANCHOR70
+	adrp	x1, .LANCHOR71
 	mov	w3, 12
-	ldrh	w0, [x4, #:lo12:.LANCHOR97]
-	ldr	x5, [x1, #:lo12:.LANCHOR98]
+	ldrh	w0, [x4, #:lo12:.LANCHOR70]
+	ldr	x5, [x1, #:lo12:.LANCHOR71]
 	umull	x3, w0, w3
 	add	w0, w0, 1
 	add	x7, x5, x3
 	stp	w10, w8, [x7, 4]
 	str	w6, [x5, x3]
-	strh	w0, [x4, #:lo12:.LANCHOR97]
+	strh	w0, [x4, #:lo12:.LANCHOR70]
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
@@ -2714,84 +1850,64 @@ FtlGcUpdatePage:
 	.global	FtlGcRefreshBlock
 	.type	FtlGcRefreshBlock, %function
 FtlGcRefreshBlock:
-	stp	x29, x30, [sp, -32]!
-	add	x29, sp, 0
-	str	x19, [sp, 16]
-	and	w19, w0, 65535
-	mov	w1, w19
-	adrp	x0, .LC73
-	add	x0, x0, :lo12:.LC73
-	bl	printf
-	adrp	x3, .LANCHOR99
-	ldrh	w4, [x3, #:lo12:.LANCHOR99]
-	cmp	w19, w4
-	beq	.L302
-	adrp	x0, .LANCHOR100
-	ldrh	w2, [x0, #:lo12:.LANCHOR100]
-	cmp	w19, w2
-	beq	.L302
-	mov	w1, 65535
-	cmp	w4, w1
-	bne	.L303
-	strh	w19, [x3, #:lo12:.LANCHOR99]
-.L302:
+	adrp	x4, .LANCHOR72
+	and	w0, w0, 65535
+	ldrh	w5, [x4, #:lo12:.LANCHOR72]
+	cmp	w5, w0
+	beq	.L242
+	adrp	x1, .LANCHOR73
+	ldrh	w3, [x1, #:lo12:.LANCHOR73]
+	cmp	w0, w3
+	beq	.L242
+	mov	w2, 65535
+	cmp	w5, w2
+	bne	.L243
+	strh	w0, [x4, #:lo12:.LANCHOR72]
+.L242:
 	mov	w0, 0
-	ldr	x19, [sp, 16]
-	ldp	x29, x30, [sp], 32
 	ret
-.L303:
-	cmp	w2, w1
-	bne	.L302
-	strh	w19, [x0, #:lo12:.LANCHOR100]
-	b	.L302
+.L243:
+	cmp	w3, w2
+	bne	.L242
+	strh	w0, [x1, #:lo12:.LANCHOR73]
+	b	.L242
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
 	.section	.text.FtlGcMarkBadPhyBlk,"ax",@progbits
 	.align	2
 	.global	FtlGcMarkBadPhyBlk
 	.type	FtlGcMarkBadPhyBlk, %function
 FtlGcMarkBadPhyBlk:
-	stp	x29, x30, [sp, -48]!
+	and	w6, w0, 65535
+	stp	x29, x30, [sp, -16]!
+	mov	w0, w6
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	and	w20, w0, 65535
-	adrp	x19, .LANCHOR101
-	str	x21, [sp, 32]
-	mov	w0, w20
 	bl	P2V_block_in_plane
-	ldrh	w1, [x19, #:lo12:.LANCHOR101]
-	mov	w2, w20
-	mov	w21, w0
-	adrp	x0, .LC74
-	add	x0, x0, :lo12:.LC74
-	bl	printf
-	mov	w0, w21
 	bl	FtlGcRefreshBlock
-	ldrh	w0, [x19, #:lo12:.LANCHOR101]
-	adrp	x2, .LANCHOR102
-	add	x2, x2, :lo12:.LANCHOR102
-	mov	x1, 0
-.L306:
-	cmp	w0, w1, uxth
-	bhi	.L308
+	adrp	x1, .LANCHOR74
+	adrp	x3, .LANCHOR75
+	add	x3, x3, :lo12:.LANCHOR75
+	mov	x2, 0
+	ldrh	w0, [x1, #:lo12:.LANCHOR74]
+.L245:
+	cmp	w0, w2, uxth
+	bhi	.L247
 	cmp	w0, 15
-	bhi	.L307
-	add	w1, w0, 1
-	strh	w1, [x19, #:lo12:.LANCHOR101]
-	adrp	x1, .LANCHOR102
-	add	x1, x1, :lo12:.LANCHOR102
-	strh	w20, [x1, w0, sxtw 1]
-	b	.L307
-.L308:
-	add	x1, x1, 1
-	add	x3, x2, x1, lsl 1
-	ldrh	w3, [x3, -2]
-	cmp	w3, w20
-	bne	.L306
-.L307:
+	bhi	.L246
+	add	w2, w0, 1
+	strh	w2, [x1, #:lo12:.LANCHOR74]
+	adrp	x1, .LANCHOR75
+	add	x1, x1, :lo12:.LANCHOR75
+	strh	w6, [x1, w0, sxtw 1]
+	b	.L246
+.L247:
+	add	x2, x2, 1
+	add	x4, x3, x2, lsl 1
+	ldrh	w4, [x4, -2]
+	cmp	w4, w6
+	bne	.L245
+.L246:
 	mov	w0, 0
-	ldr	x21, [sp, 32]
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
+	ldp	x29, x30, [sp], 16
 	ret
 	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
 	.section	.text.FtlGcReFreshBadBlk,"ax",@progbits
@@ -2799,37 +1915,35 @@ FtlGcMarkBadPhyBlk:
 	.global	FtlGcReFreshBadBlk
 	.type	FtlGcReFreshBadBlk, %function
 FtlGcReFreshBadBlk:
-	adrp	x0, .LANCHOR101
-	ldrh	w0, [x0, #:lo12:.LANCHOR101]
-	cbz	w0, .L317
-	adrp	x1, .LANCHOR99
-	ldrh	w2, [x1, #:lo12:.LANCHOR99]
+	adrp	x0, .LANCHOR74
+	ldrh	w0, [x0, #:lo12:.LANCHOR74]
+	cbz	w0, .L256
+	adrp	x1, .LANCHOR72
+	ldrh	w2, [x1, #:lo12:.LANCHOR72]
 	mov	w1, 65535
 	cmp	w2, w1
-	bne	.L317
-	stp	x29, x30, [sp, -32]!
+	bne	.L256
+	stp	x29, x30, [sp, -16]!
+	adrp	x6, .LANCHOR76
 	add	x29, sp, 0
-	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR103
-	ldrh	w1, [x19, #:lo12:.LANCHOR103]
+	ldrh	w1, [x6, #:lo12:.LANCHOR76]
 	cmp	w1, w0
-	bcc	.L312
-	strh	wzr, [x19, #:lo12:.LANCHOR103]
-.L312:
-	ldrh	w1, [x19, #:lo12:.LANCHOR103]
-	adrp	x0, .LANCHOR102
-	add	x0, x0, :lo12:.LANCHOR102
+	bcc	.L251
+	strh	wzr, [x6, #:lo12:.LANCHOR76]
+.L251:
+	ldrh	w1, [x6, #:lo12:.LANCHOR76]
+	adrp	x0, .LANCHOR75
+	add	x0, x0, :lo12:.LANCHOR75
 	ldrh	w0, [x0, x1, lsl 1]
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-	ldrh	w0, [x19, #:lo12:.LANCHOR103]
+	ldrh	w0, [x6, #:lo12:.LANCHOR76]
+	ldp	x29, x30, [sp], 16
 	add	w0, w0, 1
-	strh	w0, [x19, #:lo12:.LANCHOR103]
+	strh	w0, [x6, #:lo12:.LANCHOR76]
 	mov	w0, 0
-	ldr	x19, [sp, 16]
-	ldp	x29, x30, [sp], 32
 	ret
-.L317:
+.L256:
 	mov	w0, 0
 	ret
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
@@ -2859,66 +1973,66 @@ rknand_print_hex:
 	stp	x21, x22, [sp, 32]
 	mov	x22, x1
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LC75
+	adrp	x24, .LC2
 	stp	x25, x26, [sp, 64]
 	mov	w23, w2
 	stp	x27, x28, [sp, 80]
-	adrp	x25, .LC77
+	adrp	x25, .LC4
 	mov	x28, x0
 	mov	w27, w3
-	add	x24, x24, :lo12:.LC75
-	add	x25, x25, :lo12:.LC77
+	add	x24, x24, :lo12:.LC2
+	add	x25, x25, :lo12:.LC4
 	stp	x19, x20, [sp, 16]
 	mov	w21, 0
 	mov	x19, 0
 	mov	w20, 0
-	adrp	x26, .LC76
-.L323:
+	adrp	x26, .LC3
+.L262:
 	cmp	w27, w19
-	bhi	.L329
+	bhi	.L268
 	ldp	x19, x20, [sp, 16]
-	adrp	x0, .LC78
+	adrp	x0, .LC5
 	ldp	x21, x22, [sp, 32]
-	add	x0, x0, :lo12:.LC78
+	add	x0, x0, :lo12:.LC5
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	printf
-.L329:
-	cbnz	w20, .L324
+.L268:
+	cbnz	w20, .L263
 	mov	w2, w21
 	mov	x1, x28
 	mov	x0, x24
 	bl	printf
-.L324:
+.L263:
 	cmp	w23, 4
-	bne	.L325
+	bne	.L264
 	ldr	w1, [x22, x19, lsl 2]
-.L332:
-	add	x0, x26, :lo12:.LC76
-.L331:
+.L271:
+	add	x0, x26, :lo12:.LC3
+.L270:
 	bl	printf
 	add	w20, w20, 1
 	cmp	w20, 15
-	bls	.L328
+	bls	.L267
 	mov	w20, 0
-	adrp	x0, .LC78
-	add	x0, x0, :lo12:.LC78
+	adrp	x0, .LC5
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-.L328:
+.L267:
 	add	x19, x19, 1
 	add	w21, w21, w23
-	b	.L323
-.L325:
+	b	.L262
+.L264:
 	cmp	w23, 2
-	bne	.L327
+	bne	.L266
 	ldrh	w1, [x22, x19, lsl 1]
-	b	.L332
-.L327:
+	b	.L271
+.L266:
 	ldrb	w1, [x22, x19]
 	mov	x0, x25
-	b	.L331
+	b	.L270
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.FlashEraseBlocks,"ax",@progbits
 	.align	2
@@ -2939,34 +2053,34 @@ FlashEraseBlocks:
 	add	x23, x21, 4
 	stp	x25, x26, [sp, 64]
 	add	x23, x20, x23
-	adrp	x25, .LANCHOR105
+	adrp	x25, .LANCHOR78
 	str	x27, [sp, 80]
 	lsl	w26, w24, 3
 	mov	x22, x0
-	add	x27, x25, :lo12:.LANCHOR105
-.L334:
+	add	x27, x25, :lo12:.LANCHOR78
+.L273:
 	cmp	x19, x23
-	beq	.L348
+	beq	.L287
 	ldr	w0, [x19]
 	add	x2, x29, 104
 	add	x1, x29, 108
 	bl	l2p_addr_tran.isra.0
 	ldr	w0, [x29, 104]
-	cbnz	w0, .L335
+	cbnz	w0, .L274
 	ldr	w1, [x29, 108]
 	cmp	w26, w1
-	bls	.L335
+	bls	.L274
 	mov	x19, x20
 	add	x21, x20, x21
-	adrp	x22, .LC79
-	adrp	x20, .LANCHOR104
-	add	x22, x22, :lo12:.LC79
-	add	x20, x20, :lo12:.LANCHOR104
+	adrp	x22, .LC6
+	adrp	x20, .LANCHOR77
+	add	x22, x22, :lo12:.LC6
+	add	x20, x20, :lo12:.LANCHOR77
 	mov	w23, -1
-.L336:
+.L275:
 	cmp	x19, x21
-	bne	.L337
-.L348:
+	bne	.L276
+.L287:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -2975,7 +2089,7 @@ FlashEraseBlocks:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L337:
+.L276:
 	ldr	w2, [x29, 108]
 	mov	x1, x20
 	str	w23, [x19]
@@ -2985,43 +2099,43 @@ FlashEraseBlocks:
 	ldr	x1, [x19, -24]
 	mov	w3, 16
 	mov	w2, 4
-	adrp	x0, .LC80
-	add	x0, x0, :lo12:.LC80
+	adrp	x0, .LC7
+	add	x0, x0, :lo12:.LC7
 	bl	rknand_print_hex
 	ldr	x1, [x19, -16]
 	mov	w3, 4
-	adrp	x0, .LC81
+	adrp	x0, .LC8
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC81
+	add	x0, x0, :lo12:.LC8
 	bl	rknand_print_hex
-	b	.L336
-.L335:
-	add	x1, x25, :lo12:.LANCHOR105
+	b	.L275
+.L274:
+	add	x1, x25, :lo12:.LANCHOR78
 	ldr	x2, [x1, 8]
 	ldr	w1, [x29, 108]
 	blr	x2
-	cbnz	w0, .L338
+	cbnz	w0, .L277
 	str	wzr, [x19, -4]
-.L339:
+.L278:
 	add	x0, x22, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
-	bne	.L341
+	bne	.L280
 	ldrb	w0, [x29, 104]
 	ldr	x2, [x27, 8]
 	ldr	w1, [x29, 108]
 	add	w1, w24, w1
 	blr	x2
-	cbz	w0, .L341
+	cbz	w0, .L280
 	mov	w0, -1
 	str	w0, [x19, -4]
-.L341:
+.L280:
 	add	x19, x19, 32
-	b	.L334
-.L338:
+	b	.L273
+.L277:
 	mov	w0, -1
 	str	w0, [x19, -4]
-	b	.L339
+	b	.L278
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
 	.section	.text.FtlFreeSysBlkQueueIn,"ax",@progbits
 	.align	2
@@ -3036,22 +2150,22 @@ FtlFreeSysBlkQueueIn:
 	sub	w2, w20, #1
 	mov	w0, 65533
 	cmp	w0, w2, uxth
-	bcc	.L350
+	bcc	.L289
 	adrp	x0, .LANCHOR38
 	add	x2, x0, :lo12:.LANCHOR38
 	mov	x19, x0
 	ldrh	w2, [x2, 6]
 	cmp	w2, 1024
-	beq	.L350
+	beq	.L289
 	and	w1, w1, 65535
-	cbz	w1, .L352
+	cbz	w1, .L291
 	mov	w0, w20
 	bl	P2V_block_in_plane
 	and	w21, w0, 65535
-	adrp	x0, .LANCHOR106
+	adrp	x0, .LANCHOR79
 	lsl	w1, w20, 10
 	mov	w2, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR106]
+	ldr	x0, [x0, #:lo12:.LANCHOR79]
 	str	w1, [x0, 4]
 	mov	w1, w2
 	bl	FlashEraseBlocks
@@ -3061,11 +2175,11 @@ FtlFreeSysBlkQueueIn:
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-	adrp	x1, .LANCHOR75
-	ldr	w0, [x1, #:lo12:.LANCHOR75]
+	adrp	x1, .LANCHOR80
+	ldr	w0, [x1, #:lo12:.LANCHOR80]
 	add	w0, w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR75]
-.L352:
+	str	w0, [x1, #:lo12:.LANCHOR80]
+.L291:
 	add	x0, x19, :lo12:.LANCHOR38
 	ldrh	w1, [x0, 6]
 	add	w1, w1, 1
@@ -3076,7 +2190,7 @@ FtlFreeSysBlkQueueIn:
 	and	w1, w1, 1023
 	strh	w1, [x0, 4]
 	strh	w20, [x2, 8]
-.L350:
+.L289:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -3094,7 +2208,7 @@ FtlFreeSysBlkQueueOut:
 	ldrh	w2, [x1, 6]
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	cbz	w2, .L364
+	cbz	w2, .L303
 	ldrh	w0, [x1, 2]
 	sub	w2, w2, #1
 	strh	w2, [x1, 6]
@@ -3103,34 +2217,34 @@ FtlFreeSysBlkQueueOut:
 	add	w0, w0, 1
 	and	w0, w0, 1023
 	strh	w0, [x1, 2]
-	adrp	x0, .LANCHOR106
+	adrp	x0, .LANCHOR79
 	ldrh	w20, [x3, 8]
-	ldr	x0, [x0, #:lo12:.LANCHOR106]
+	ldr	x0, [x0, #:lo12:.LANCHOR79]
 	lsl	w1, w20, 10
 	str	w1, [x0, 4]
 	mov	w1, w2
 	bl	FlashEraseBlocks
-	adrp	x1, .LANCHOR75
-	ldr	w0, [x1, #:lo12:.LANCHOR75]
+	adrp	x1, .LANCHOR80
+	ldr	w0, [x1, #:lo12:.LANCHOR80]
 	add	w0, w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR75]
-.L361:
+	str	w0, [x1, #:lo12:.LANCHOR80]
+.L300:
 	sub	w0, w20, #1
 	mov	w1, 65533
 	cmp	w1, w0, uxth
-	bcs	.L362
+	bcs	.L301
 	add	x0, x19, :lo12:.LANCHOR38
 	mov	w1, w20
 	ldrh	w2, [x0, 6]
-	adrp	x0, .LC82
-	add	x0, x0, :lo12:.LC82
+	adrp	x0, .LC9
+	add	x0, x0, :lo12:.LC9
 	bl	printf
-.L363:
-	b	.L363
-.L364:
+.L302:
+	b	.L302
+.L303:
 	mov	w20, 65535
-	b	.L361
-.L362:
+	b	.L300
+.L301:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -3149,27 +2263,27 @@ ftl_map_blk_alloc_new_blk:
 	mov	w20, 0
 	ldr	x0, [x0, 16]
 	str	x21, [sp, 32]
-.L367:
+.L306:
 	cmp	w20, w1
-	beq	.L371
+	beq	.L310
 	mov	x21, x0
 	ldrh	w2, [x0], 2
-	cbnz	w2, .L368
+	cbnz	w2, .L307
 	bl	FtlFreeSysBlkQueueOut
 	and	w1, w0, 65535
 	strh	w0, [x21]
 	sub	w2, w1, #1
 	mov	w0, 65533
 	cmp	w0, w2, uxth
-	bcs	.L369
+	bcs	.L308
 	adrp	x0, .LANCHOR38+6
 	ldrh	w2, [x0, #:lo12:.LANCHOR38+6]
-	adrp	x0, .LC83
-	add	x0, x0, :lo12:.LC83
+	adrp	x0, .LC10
+	add	x0, x0, :lo12:.LC10
 	bl	printf
-.L370:
-	b	.L370
-.L369:
+.L309:
+	b	.L309
+.L308:
 	ldr	w0, [x19, 48]
 	strh	wzr, [x19, 2]
 	add	w0, w0, 1
@@ -3178,26 +2292,26 @@ ftl_map_blk_alloc_new_blk:
 	strh	w20, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
-.L371:
+.L310:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L373
-	adrp	x1, .LANCHOR107
+	bhi	.L312
+	adrp	x1, .LANCHOR81
 	adrp	x0, .LC1
 	mov	w2, 578
-	add	x1, x1, :lo12:.LANCHOR107
+	add	x1, x1, :lo12:.LANCHOR81
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L373:
+.L312:
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L368:
+.L307:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L367
+	b	.L306
 	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
 	.section	.text.ftl_memset,"ax",@progbits
 	.align	2
@@ -3212,260 +2326,239 @@ ftl_memset:
 	.global	FtlMemInit
 	.type	FtlMemInit, %function
 FtlMemInit:
-	stp	x29, x30, [sp, -208]!
-	adrp	x0, .LANCHOR70
+	stp	x29, x30, [sp, -64]!
+	adrp	x0, .LANCHOR82
 	mov	w1, 65535
 	add	x29, sp, 0
-	str	wzr, [x0, #:lo12:.LANCHOR70]
-	adrp	x0, .LANCHOR71
+	str	wzr, [x0, #:lo12:.LANCHOR82]
+	adrp	x0, .LANCHOR83
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR21
-	str	wzr, [x0, #:lo12:.LANCHOR71]
-	adrp	x0, .LANCHOR67
+	str	wzr, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR84
 	stp	x21, x22, [sp, 32]
 	adrp	x22, .LANCHOR3
-	str	wzr, [x0, #:lo12:.LANCHOR67]
-	adrp	x0, .LANCHOR64
-	stp	x23, x24, [sp, 48]
+	str	wzr, [x0, #:lo12:.LANCHOR84]
+	adrp	x0, .LANCHOR85
+	str	x23, [sp, 48]
 	adrp	x21, .LANCHOR23
-	str	wzr, [x0, #:lo12:.LANCHOR64]
-	adrp	x0, .LANCHOR63
-	stp	x25, x26, [sp, 64]
-	adrp	x24, .LANCHOR118
-	str	wzr, [x0, #:lo12:.LANCHOR63]
-	adrp	x0, .LANCHOR65
-	stp	x27, x28, [sp, 80]
-	adrp	x23, .LANCHOR124
-	str	wzr, [x0, #:lo12:.LANCHOR65]
-	adrp	x0, .LANCHOR66
-	adrp	x25, .LANCHOR42
-	adrp	x27, .LANCHOR129
-	str	wzr, [x0, #:lo12:.LANCHOR66]
-	adrp	x0, .LANCHOR62
-	adrp	x26, .LANCHOR130
-	str	wzr, [x0, #:lo12:.LANCHOR62]
-	adrp	x0, .LANCHOR72
-	str	wzr, [x0, #:lo12:.LANCHOR72]
-	adrp	x0, .LANCHOR73
-	str	wzr, [x0, #:lo12:.LANCHOR73]
-	adrp	x0, .LANCHOR75
-	str	wzr, [x0, #:lo12:.LANCHOR75]
-	adrp	x0, .LANCHOR76
-	str	wzr, [x0, #:lo12:.LANCHOR76]
-	adrp	x0, .LANCHOR77
-	str	wzr, [x0, #:lo12:.LANCHOR77]
-	adrp	x0, .LANCHOR108
-	str	wzr, [x0, #:lo12:.LANCHOR108]
+	str	wzr, [x0, #:lo12:.LANCHOR85]
+	adrp	x0, .LANCHOR86
+	adrp	x23, .LANCHOR24
+	str	wzr, [x0, #:lo12:.LANCHOR86]
 	adrp	x0, .LANCHOR87
 	str	wzr, [x0, #:lo12:.LANCHOR87]
-	adrp	x0, .LANCHOR109
-	str	w1, [x0, #:lo12:.LANCHOR109]
-	adrp	x0, .LANCHOR110
-	adrp	x1, .LANCHOR99
-	str	wzr, [x0, #:lo12:.LANCHOR110]
-	adrp	x0, .LANCHOR84
-	str	wzr, [x0, #:lo12:.LANCHOR84]
-	adrp	x0, .LANCHOR111
-	str	wzr, [x0, #:lo12:.LANCHOR111]
+	adrp	x0, .LANCHOR88
+	str	wzr, [x0, #:lo12:.LANCHOR88]
+	adrp	x0, .LANCHOR89
+	str	wzr, [x0, #:lo12:.LANCHOR89]
+	adrp	x0, .LANCHOR90
+	str	wzr, [x0, #:lo12:.LANCHOR90]
+	adrp	x0, .LANCHOR91
+	str	wzr, [x0, #:lo12:.LANCHOR91]
+	adrp	x0, .LANCHOR80
+	str	wzr, [x0, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR92
+	str	wzr, [x0, #:lo12:.LANCHOR92]
+	adrp	x0, .LANCHOR93
+	str	wzr, [x0, #:lo12:.LANCHOR93]
+	adrp	x0, .LANCHOR94
+	str	wzr, [x0, #:lo12:.LANCHOR94]
+	adrp	x0, .LANCHOR95
+	str	wzr, [x0, #:lo12:.LANCHOR95]
+	adrp	x0, .LANCHOR96
+	str	w1, [x0, #:lo12:.LANCHOR96]
+	adrp	x0, .LANCHOR97
+	adrp	x1, .LANCHOR72
+	str	wzr, [x0, #:lo12:.LANCHOR97]
+	adrp	x0, .LANCHOR98
+	str	wzr, [x0, #:lo12:.LANCHOR98]
+	adrp	x0, .LANCHOR99
+	str	wzr, [x0, #:lo12:.LANCHOR99]
 	mov	w0, -1
-	strh	w0, [x1, #:lo12:.LANCHOR99]
-	adrp	x1, .LANCHOR100
-	strh	w0, [x1, #:lo12:.LANCHOR100]
-	adrp	x0, .LANCHOR82
+	strh	w0, [x1, #:lo12:.LANCHOR72]
+	adrp	x1, .LANCHOR73
+	strh	w0, [x1, #:lo12:.LANCHOR73]
+	adrp	x0, .LANCHOR100
 	mov	w1, 32
-	strh	w1, [x0, #:lo12:.LANCHOR82]
-	adrp	x0, .LANCHOR83
-	mov	w1, 128
-	strh	w1, [x0, #:lo12:.LANCHOR83]
-	adrp	x0, .LANCHOR85
-	strh	wzr, [x0, #:lo12:.LANCHOR85]
+	strh	w1, [x0, #:lo12:.LANCHOR100]
 	adrp	x0, .LANCHOR101
-	strh	wzr, [x0, #:lo12:.LANCHOR101]
-	adrp	x0, .LANCHOR103
-	strh	wzr, [x0, #:lo12:.LANCHOR103]
+	mov	w1, 128
+	strh	w1, [x0, #:lo12:.LANCHOR101]
+	adrp	x0, .LANCHOR102
+	strh	wzr, [x0, #:lo12:.LANCHOR102]
+	adrp	x0, .LANCHOR74
+	strh	wzr, [x0, #:lo12:.LANCHOR74]
+	adrp	x0, .LANCHOR76
+	strh	wzr, [x0, #:lo12:.LANCHOR76]
 	ldrh	w0, [x19, #:lo12:.LANCHOR21]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR96
-	str	x0, [x1, #:lo12:.LANCHOR96]
+	adrp	x1, .LANCHOR69
+	str	x0, [x1, #:lo12:.LANCHOR69]
 	mov	w0, 12
 	ldrh	w1, [x19, #:lo12:.LANCHOR21]
 	mul	w0, w1, w0
 	bl	ftl_malloc
 	ldrh	w19, [x22, #:lo12:.LANCHOR3]
-	adrp	x5, .LANCHOR98
-	str	x5, [x29, 104]
+	adrp	x1, .LANCHOR71
 	lsl	w20, w19, 5
 	lsl	w19, w19, 7
-	str	x0, [x5, #:lo12:.LANCHOR98]
+	str	x0, [x1, #:lo12:.LANCHOR71]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x15, .LANCHOR112
-	str	x15, [x29, 112]
-	str	x0, [x15, #:lo12:.LANCHOR112]
+	adrp	x1, .LANCHOR103
+	str	x0, [x1, #:lo12:.LANCHOR103]
 	mov	w0, w20
 	bl	ftl_malloc
-	adrp	x11, .LANCHOR113
-	str	x11, [x29, 120]
-	str	x0, [x11, #:lo12:.LANCHOR113]
+	adrp	x1, .LANCHOR104
+	str	x0, [x1, #:lo12:.LANCHOR104]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x14, .LANCHOR114
-	str	x14, [x29, 128]
-	str	x0, [x14, #:lo12:.LANCHOR114]
+	adrp	x1, .LANCHOR105
+	str	x0, [x1, #:lo12:.LANCHOR105]
 	mov	w0, w20
 	bl	ftl_malloc
-	adrp	x13, .LANCHOR106
-	str	x13, [x29, 136]
-	str	x0, [x13, #:lo12:.LANCHOR106]
+	adrp	x1, .LANCHOR79
+	str	x0, [x1, #:lo12:.LANCHOR79]
 	mov	w0, w20
 	bl	ftl_malloc
-	adrp	x20, .LANCHOR94
-	adrp	x12, .LANCHOR93
+	adrp	x20, .LANCHOR67
+	adrp	x1, .LANCHOR66
 	ldrh	w19, [x21, #:lo12:.LANCHOR23]
-	str	x12, [x29, 144]
-	str	x0, [x12, #:lo12:.LANCHOR93]
+	str	x0, [x1, #:lo12:.LANCHOR66]
 	ldrh	w0, [x22, #:lo12:.LANCHOR3]
 	lsl	w0, w0, 1
 	add	w0, w0, 1
-	str	w0, [x20, #:lo12:.LANCHOR94]
+	str	w0, [x20, #:lo12:.LANCHOR67]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x10, .LANCHOR115
-	str	x10, [x29, 152]
-	str	x0, [x10, #:lo12:.LANCHOR115]
+	adrp	x1, .LANCHOR106
+	str	x0, [x1, #:lo12:.LANCHOR106]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x8, .LANCHOR116
-	str	x8, [x29, 160]
-	str	x0, [x8, #:lo12:.LANCHOR116]
+	adrp	x1, .LANCHOR107
+	str	x0, [x1, #:lo12:.LANCHOR107]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x7, .LANCHOR117
-	str	x7, [x29, 168]
-	str	x0, [x7, #:lo12:.LANCHOR117]
-	ldr	w0, [x20, #:lo12:.LANCHOR94]
+	adrp	x1, .LANCHOR108
+	str	x0, [x1, #:lo12:.LANCHOR108]
+	ldr	w0, [x20, #:lo12:.LANCHOR67]
 	mul	w0, w19, w0
 	bl	ftl_malloc
-	adrp	x6, .LANCHOR91
-	str	x6, [x29, 176]
-	str	x0, [x6, #:lo12:.LANCHOR91]
+	adrp	x1, .LANCHOR64
+	str	x0, [x1, #:lo12:.LANCHOR64]
 	mov	w0, w19
 	bl	ftl_malloc
-	str	x0, [x24, #:lo12:.LANCHOR118]
+	adrp	x1, .LANCHOR109
+	str	x0, [x1, #:lo12:.LANCHOR109]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x4, .LANCHOR119
-	ldr	w2, [x20, #:lo12:.LANCHOR94]
-	str	x4, [x29, 184]
-	str	x0, [x4, #:lo12:.LANCHOR119]
+	adrp	x1, .LANCHOR110
+	str	x0, [x1, #:lo12:.LANCHOR110]
 	mov	w0, 24
-	mul	w0, w2, w0
+	ldr	w1, [x20, #:lo12:.LANCHOR67]
+	mul	w0, w1, w0
 	bl	ftl_malloc
-	adrp	x3, .LANCHOR90
-	str	x3, [x29, 192]
-	str	x0, [x3, #:lo12:.LANCHOR90]
+	adrp	x1, .LANCHOR63
+	str	x0, [x1, #:lo12:.LANCHOR63]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x2, .LANCHOR120
-	str	x0, [x2, #:lo12:.LANCHOR120]
+	adrp	x1, .LANCHOR111
+	str	x0, [x1, #:lo12:.LANCHOR111]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x19, .LANCHOR24
-	adrp	x2, .LANCHOR121
-	str	x0, [x2, #:lo12:.LANCHOR121]
+	adrp	x1, .LANCHOR112
+	str	x0, [x1, #:lo12:.LANCHOR112]
 	adrp	x0, .LANCHOR12
 	ldrh	w0, [x0, #:lo12:.LANCHOR12]
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x2, .LANCHOR122
-	ldrh	w28, [x19, #:lo12:.LANCHOR24]
-	str	x0, [x2, #:lo12:.LANCHOR122]
+	adrp	x1, .LANCHOR113
+	ldrh	w19, [x23, #:lo12:.LANCHOR24]
+	str	x0, [x1, #:lo12:.LANCHOR113]
 	ldrh	w0, [x22, #:lo12:.LANCHOR3]
-	adrp	x22, .LANCHOR92
-	mul	w28, w28, w0
-	mov	w0, w28
+	adrp	x22, .LANCHOR30
+	mul	w19, w19, w0
+	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR123
-	str	x0, [x1, #:lo12:.LANCHOR123]
-	lsl	w0, w28, 2
+	adrp	x1, .LANCHOR114
+	str	x0, [x1, #:lo12:.LANCHOR114]
+	lsl	w0, w19, 2
 	bl	ftl_malloc
-	str	x0, [x23, #:lo12:.LANCHOR124]
-	ldrh	w1, [x19, #:lo12:.LANCHOR24]
-	adrp	x28, .LANCHOR125
-	ldr	w0, [x20, #:lo12:.LANCHOR94]
-	adrp	x20, .LANCHOR6
+	adrp	x19, .LANCHOR6
+	adrp	x1, .LANCHOR115
+	str	x0, [x1, #:lo12:.LANCHOR115]
+	ldrh	w1, [x23, #:lo12:.LANCHOR24]
+	ldr	w0, [x20, #:lo12:.LANCHOR67]
+	adrp	x20, .LANCHOR116
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	str	x0, [x22, #:lo12:.LANCHOR92]
-	ldrh	w0, [x20, #:lo12:.LANCHOR6]
+	adrp	x1, .LANCHOR65
+	str	x0, [x1, #:lo12:.LANCHOR65]
+	ldrh	w0, [x19, #:lo12:.LANCHOR6]
 	ubfiz	w0, w0, 1, 15
-	strh	w0, [x28, #:lo12:.LANCHOR125]
+	strh	w0, [x20, #:lo12:.LANCHOR116]
 	and	w0, w0, 65534
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR126
-	str	x0, [x1, #:lo12:.LANCHOR126]
-	ldrh	w0, [x28, #:lo12:.LANCHOR125]
+	adrp	x1, .LANCHOR117
+	str	x0, [x1, #:lo12:.LANCHOR117]
+	ldrh	w0, [x20, #:lo12:.LANCHOR116]
 	add	x0, x0, 547
 	lsr	x0, x0, 9
-	strh	w0, [x28, #:lo12:.LANCHOR125]
+	strh	w0, [x20, #:lo12:.LANCHOR116]
 	lsl	w0, w0, 9
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR127
-	ldrh	w28, [x20, #:lo12:.LANCHOR6]
-	str	x0, [x1, #:lo12:.LANCHOR127]
+	adrp	x1, .LANCHOR118
+	str	x0, [x1, #:lo12:.LANCHOR118]
 	adrp	x1, .LANCHOR43
-	lsl	w28, w28, 1
 	add	x0, x0, 32
 	str	x0, [x1, #:lo12:.LANCHOR43]
-	mov	w0, w28
-	bl	ftl_malloc
-	adrp	x1, .LANCHOR128
-	str	x0, [x1, #:lo12:.LANCHOR128]
-	mov	w0, w28
-	adrp	x28, .LANCHOR30
+	ldrh	w0, [x19, #:lo12:.LANCHOR6]
+	lsl	w0, w0, 1
 	bl	ftl_malloc
-	str	x0, [x25, #:lo12:.LANCHOR42]
-	ldr	w1, [x28, #:lo12:.LANCHOR30]
-	lsl	w19, w1, 1
-	mov	w0, w19
+	ldr	w20, [x22, #:lo12:.LANCHOR30]
+	adrp	x1, .LANCHOR42
+	str	x0, [x1, #:lo12:.LANCHOR42]
+	lsl	w20, w20, 1
+	mov	w0, w20
 	bl	ftl_malloc
-	str	x0, [x27, #:lo12:.LANCHOR129]
-	mov	w0, w19
+	adrp	x1, .LANCHOR119
+	str	x0, [x1, #:lo12:.LANCHOR119]
+	mov	w0, w20
 	bl	ftl_malloc
-	str	x0, [x26, #:lo12:.LANCHOR130]
-	ldrh	w0, [x20, #:lo12:.LANCHOR6]
-	adrp	x19, .LANCHOR27
+	adrp	x20, .LANCHOR27
+	adrp	x1, .LANCHOR120
+	str	x0, [x1, #:lo12:.LANCHOR120]
+	ldrh	w0, [x19, #:lo12:.LANCHOR6]
 	lsr	w0, w0, 3
 	add	w0, w0, 4
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR1
 	str	x0, [x1, #:lo12:.LANCHOR1]
-	ldrh	w0, [x19, #:lo12:.LANCHOR27]
+	ldrh	w0, [x20, #:lo12:.LANCHOR27]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-	adrp	x2, .LANCHOR36
-	str	x0, [x2, #:lo12:.LANCHOR36]
-	ldrh	w0, [x19, #:lo12:.LANCHOR27]
+	adrp	x1, .LANCHOR36
+	str	x0, [x1, #:lo12:.LANCHOR36]
+	ldrh	w0, [x20, #:lo12:.LANCHOR27]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-	adrp	x2, .LANCHOR131
-	str	x0, [x2, #:lo12:.LANCHOR131]
-	ldrh	w0, [x19, #:lo12:.LANCHOR27]
-	adrp	x19, .LANCHOR43
+	adrp	x1, .LANCHOR121
+	str	x0, [x1, #:lo12:.LANCHOR121]
+	ldrh	w0, [x20, #:lo12:.LANCHOR27]
+	adrp	x20, .LANCHOR28
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR132
-	str	x0, [x1, #:lo12:.LANCHOR132]
-	adrp	x1, .LANCHOR28
-	str	x1, [x29, 200]
-	ldrh	w0, [x1, #:lo12:.LANCHOR28]
+	adrp	x1, .LANCHOR122
+	str	x0, [x1, #:lo12:.LANCHOR122]
+	ldrh	w0, [x20, #:lo12:.LANCHOR28]
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	ldr	x1, [x29, 200]
-	adrp	x2, .LANCHOR133
-	str	x0, [x2, #:lo12:.LANCHOR133]
-	ldrh	w2, [x1, #:lo12:.LANCHOR28]
+	ldrh	w2, [x20, #:lo12:.LANCHOR28]
+	adrp	x1, .LANCHOR123
+	adrp	x20, .LANCHOR33
+	str	x0, [x1, #:lo12:.LANCHOR123]
 	mov	w1, 0
 	lsl	w2, w2, 2
 	bl	ftl_memset
@@ -3473,179 +2566,79 @@ FtlMemInit:
 	ldrh	w0, [x0, #:lo12:.LANCHOR32]
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR134
-	str	x0, [x1, #:lo12:.LANCHOR134]
-	ldr	w0, [x28, #:lo12:.LANCHOR30]
-	adrp	x28, .LANCHOR33
+	adrp	x1, .LANCHOR124
+	str	x0, [x1, #:lo12:.LANCHOR124]
+	ldr	w0, [x22, #:lo12:.LANCHOR30]
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR135
-	str	x0, [x1, #:lo12:.LANCHOR135]
-	ldrh	w0, [x28, #:lo12:.LANCHOR33]
+	adrp	x1, .LANCHOR125
+	str	x0, [x1, #:lo12:.LANCHOR125]
+	ldrh	w0, [x20, #:lo12:.LANCHOR33]
 	lsl	w0, w0, 4
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR55
 	str	x0, [x1, #:lo12:.LANCHOR55]
-	ldrh	w1, [x28, #:lo12:.LANCHOR33]
+	ldrh	w1, [x20, #:lo12:.LANCHOR33]
+	adrp	x20, .LANCHOR10
 	ldrh	w0, [x21, #:lo12:.LANCHOR23]
-	adrp	x21, .LANCHOR10
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR136
-	str	x0, [x1, #:lo12:.LANCHOR136]
+	adrp	x1, .LANCHOR126
+	str	x0, [x1, #:lo12:.LANCHOR126]
 	mov	w0, 6
-	ldrh	w1, [x20, #:lo12:.LANCHOR6]
-	adrp	x20, .LANCHOR137
+	ldrh	w1, [x19, #:lo12:.LANCHOR6]
+	adrp	x19, .LANCHOR127
 	mul	w0, w1, w0
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR40
 	str	x0, [x1, #:lo12:.LANCHOR40]
 	adrp	x0, .LANCHOR17
-	ldrh	w1, [x21, #:lo12:.LANCHOR10]
+	ldrh	w1, [x20, #:lo12:.LANCHOR10]
 	ldrh	w0, [x0, #:lo12:.LANCHOR17]
 	add	w0, w0, 31
 	asr	w0, w0, 5
-	strh	w0, [x20, #:lo12:.LANCHOR137]
+	strh	w0, [x19, #:lo12:.LANCHOR127]
 	mul	w0, w1, w0
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	ldp	x5, x15, [x29, 104]
 	adrp	x1, .LANCHOR37
-	ldrh	w20, [x20, #:lo12:.LANCHOR137]
+	ldrh	w5, [x19, #:lo12:.LANCHOR127]
 	add	x2, x1, :lo12:.LANCHOR37
-	ldp	x11, x14, [x29, 120]
-	mov	w30, w20
-	ldp	x13, x12, [x29, 136]
-	mov	x16, x5
-	ldp	x10, x8, [x29, 152]
-	mov	x5, x24
-	ldp	x7, x6, [x29, 168]
+	ldrh	w7, [x20, #:lo12:.LANCHOR10]
+	add	x6, x2, 40
+	mov	w3, w5
 	str	x0, [x2, 32]
-	ldp	x4, x3, [x29, 184]
-	adrp	x17, .LANCHOR96
-	ldrh	w28, [x21, #:lo12:.LANCHOR10]
-	add	x21, x2, 40
-	adrp	x24, .LANCHOR123
 	mov	x0, 1
-	str	x19, [x29, 200]
-.L377:
-	cmp	w0, w28
-	bcc	.L378
+.L316:
+	cmp	w0, w7
+	bcc	.L317
 	mov	w2, 8
 	sub	w2, w2, w0
 	add	x2, x2, 1
 	add	x1, x1, :lo12:.LANCHOR37
-	mov	x19, 0
-.L379:
-	add	x19, x19, 1
-	cmp	x19, x2
-	bne	.L380
-	ldr	x0, [x27, #:lo12:.LANCHOR129]
-	cbnz	x0, .L381
-.L383:
-	adrp	x1, .LANCHOR138
-	adrp	x0, .LC84
-	add	x1, x1, :lo12:.LANCHOR138
-	add	x0, x0, :lo12:.LC84
-	bl	printf
-	mov	w0, -1
-.L376:
+	mov	x3, 0
+.L318:
+	add	x3, x3, 1
+	cmp	x2, x3
+	bne	.L319
+	mov	w0, 0
+	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 208
+	ldp	x29, x30, [sp], 64
 	ret
-.L378:
-	ldr	x19, [x2, 32]
+.L317:
+	ldr	x4, [x2, 32]
 	add	w0, w0, 1
-	add	x19, x19, x30, uxtw 2
-	add	w30, w30, w20
-	str	x19, [x21], 8
-	b	.L377
-.L380:
-	add	x20, x0, x19
-	add	x20, x1, x20, lsl 3
-	str	xzr, [x20, 24]
-	b	.L379
-.L381:
-	ldr	x0, [x26, #:lo12:.LANCHOR130]
-	cbz	x0, .L383
-	adrp	x0, .LANCHOR134
-	ldr	x0, [x0, #:lo12:.LANCHOR134]
-	cbz	x0, .L383
-	adrp	x0, .LANCHOR135
-	ldr	x0, [x0, #:lo12:.LANCHOR135]
-	cbz	x0, .L383
-	adrp	x0, .LANCHOR55
-	ldr	x0, [x0, #:lo12:.LANCHOR55]
-	cbz	x0, .L383
-	adrp	x0, .LANCHOR136
-	ldr	x0, [x0, #:lo12:.LANCHOR136]
-	cbz	x0, .L383
-	adrp	x0, .LANCHOR40
-	ldr	x0, [x0, #:lo12:.LANCHOR40]
-	cbz	x0, .L383
-	adrp	x0, .LANCHOR37+32
-	ldr	x0, [x0, #:lo12:.LANCHOR37+32]
-	cbz	x0, .L383
-	ldr	x0, [x25, #:lo12:.LANCHOR42]
-	cbz	x0, .L383
-	ldr	x0, [x17, #:lo12:.LANCHOR96]
-	cbz	x0, .L383
-	ldr	x0, [x16, #:lo12:.LANCHOR98]
-	cbz	x0, .L383
-	ldr	x0, [x15, #:lo12:.LANCHOR112]
-	cbz	x0, .L383
-	ldr	x0, [x14, #:lo12:.LANCHOR114]
-	cbz	x0, .L383
-	ldr	x0, [x13, #:lo12:.LANCHOR106]
-	cbz	x0, .L383
-	ldr	x0, [x12, #:lo12:.LANCHOR93]
-	cbz	x0, .L383
-	ldr	x0, [x11, #:lo12:.LANCHOR113]
-	cbz	x0, .L383
-	ldr	x0, [x10, #:lo12:.LANCHOR115]
-	cbz	x0, .L383
-	ldr	x0, [x8, #:lo12:.LANCHOR116]
-	cbz	x0, .L383
-	ldr	x0, [x7, #:lo12:.LANCHOR117]
-	cbz	x0, .L383
-	ldr	x0, [x6, #:lo12:.LANCHOR91]
-	cbz	x0, .L383
-	ldr	x0, [x5, #:lo12:.LANCHOR118]
-	cbz	x0, .L383
-	ldr	x0, [x4, #:lo12:.LANCHOR119]
-	cbz	x0, .L383
-	ldr	x0, [x3, #:lo12:.LANCHOR90]
-	cbz	x0, .L383
-	ldr	x0, [x24, #:lo12:.LANCHOR123]
-	cbz	x0, .L383
-	ldr	x0, [x23, #:lo12:.LANCHOR124]
-	cbz	x0, .L383
-	ldr	x0, [x22, #:lo12:.LANCHOR92]
-	cbz	x0, .L383
-	ldr	x0, [x29, 200]
-	ldr	x0, [x0, #:lo12:.LANCHOR43]
-	cbz	x0, .L383
-	adrp	x0, .LANCHOR126
-	ldr	x0, [x0, #:lo12:.LANCHOR126]
-	cbz	x0, .L383
-	adrp	x0, .LANCHOR36
-	ldr	x0, [x0, #:lo12:.LANCHOR36]
-	cbz	x0, .L383
-	adrp	x0, .LANCHOR131
-	ldr	x0, [x0, #:lo12:.LANCHOR131]
-	cbz	x0, .L383
-	adrp	x0, .LANCHOR132
-	ldr	x0, [x0, #:lo12:.LANCHOR132]
-	cbz	x0, .L383
-	adrp	x0, .LANCHOR133
-	ldr	x0, [x0, #:lo12:.LANCHOR133]
-	cbz	x0, .L383
-	mov	w0, 0
-	b	.L376
+	add	x4, x4, x3, uxtw 2
+	add	w3, w3, w5
+	str	x4, [x6], 8
+	b	.L316
+.L319:
+	add	x4, x0, x3
+	add	x4, x1, x4, lsl 3
+	str	xzr, [x4, 24]
+	b	.L318
 	.size	FtlMemInit, .-FtlMemInit
 	.section	.text.FtlBbt2Bitmap,"ax",@progbits
 	.align	2
@@ -3656,13 +2649,13 @@ FtlBbt2Bitmap:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	mov	x22, x0
-	adrp	x0, .LANCHOR137
+	adrp	x0, .LANCHOR127
 	stp	x23, x24, [sp, 48]
 	adrp	x21, .LANCHOR17
-	adrp	x23, .LANCHOR139
-	ldrh	w2, [x0, #:lo12:.LANCHOR137]
+	adrp	x23, .LANCHOR128
+	ldrh	w2, [x0, #:lo12:.LANCHOR127]
 	add	x21, x21, :lo12:.LANCHOR17
-	add	x23, x23, :lo12:.LANCHOR139
+	add	x23, x23, :lo12:.LANCHOR128
 	stp	x19, x20, [sp, 16]
 	mov	w24, 65535
 	mov	x19, 0
@@ -3671,19 +2664,19 @@ FtlBbt2Bitmap:
 	mov	w1, 0
 	mov	x0, x20
 	bl	ftl_memset
-.L481:
+.L324:
 	ldrh	w0, [x22, x19]
 	cmp	w0, w24
-	beq	.L478
+	beq	.L321
 	ldrh	w1, [x21]
 	cmp	w1, w0
-	bhi	.L480
+	bhi	.L323
 	adrp	x0, .LC1
 	mov	w2, 74
 	mov	x1, x23
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L480:
+.L323:
 	ldrh	w2, [x22, x19]
 	mov	w1, 1
 	add	x19, x19, 2
@@ -3694,8 +2687,8 @@ FtlBbt2Bitmap:
 	ldr	w1, [x20, x0]
 	orr	w1, w1, w2
 	str	w1, [x20, x0]
-	bne	.L481
-.L478:
+	bne	.L324
+.L321:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -3758,10 +2751,10 @@ ftl_free_no_use_map_blk:
 	str	x25, [sp, 64]
 	bl	ftl_memset
 	mov	w0, 0
-.L489:
+.L332:
 	ldrh	w1, [x19, 6]
 	cmp	w1, w0
-	bhi	.L493
+	bhi	.L336
 	adrp	x0, .LANCHOR20
 	mov	w23, 0
 	mov	w20, 0
@@ -3769,10 +2762,10 @@ ftl_free_no_use_map_blk:
 	ldrh	w0, [x19]
 	strh	w1, [x21, x0, lsl 1]
 	ldrh	w24, [x21]
-.L494:
+.L337:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L498
+	bhi	.L341
 	mov	w0, w23
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -3780,64 +2773,64 @@ ftl_free_no_use_map_blk:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L493:
+.L336:
 	ubfiz	x1, x0, 2, 16
 	ldr	w2, [x20, x1]
 	mov	w1, 0
 	ubfx	x2, x2, 10, 16
-.L490:
+.L333:
 	ldrh	w3, [x19, 10]
 	cmp	w3, w1
-	bhi	.L492
+	bhi	.L335
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L489
-.L492:
+	b	.L332
+.L335:
 	ubfiz	x3, x1, 1, 16
 	ldrh	w4, [x22, x3]
 	cmp	w4, w2
-	bne	.L491
-	cbz	w2, .L491
+	bne	.L334
+	cbz	w2, .L334
 	ldrh	w4, [x21, x3]
 	add	w4, w4, 1
 	strh	w4, [x21, x3]
-.L491:
+.L334:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L490
-.L498:
+	b	.L333
+.L341:
 	ubfiz	x0, x20, 1, 16
 	ldrh	w1, [x21, x0]
 	cmp	w24, w1
-	bls	.L495
+	bls	.L338
 	add	x25, x22, x0
 	ldrh	w0, [x22, x0]
-	cbnz	w0, .L496
-.L497:
+	cbnz	w0, .L339
+.L340:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L494
-.L495:
-	cbnz	w1, .L497
+	b	.L337
+.L338:
+	cbnz	w1, .L340
 	add	x25, x22, x0
 	ldrh	w0, [x22, x0]
-	cbz	w0, .L497
-.L499:
+	cbz	w0, .L340
+.L342:
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
 	strh	wzr, [x25]
 	ldrh	w0, [x19, 8]
 	sub	w0, w0, #1
 	strh	w0, [x19, 8]
-	b	.L497
-.L500:
+	b	.L340
+.L343:
 	mov	w24, 0
-	b	.L499
-.L496:
+	b	.L342
+.L339:
 	mov	w23, w20
-	cbz	w1, .L500
+	cbz	w1, .L343
 	mov	w24, w1
-	b	.L497
+	b	.L340
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.section	.text.FtlL2PDataInit,"ax",@progbits
 	.align	2
@@ -3848,66 +2841,66 @@ FtlL2PDataInit:
 	mov	w1, 0
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR130
+	adrp	x19, .LANCHOR120
 	adrp	x20, .LANCHOR30
 	stp	x21, x22, [sp, 32]
-	ldr	x0, [x19, #:lo12:.LANCHOR130]
+	ldr	x0, [x19, #:lo12:.LANCHOR120]
 	adrp	x22, .LANCHOR23
 	ldr	w2, [x20, #:lo12:.LANCHOR30]
 	adrp	x21, .LANCHOR33
 	str	x23, [sp, 48]
-	adrp	x23, .LANCHOR136
+	adrp	x23, .LANCHOR126
 	lsl	w2, w2, 1
 	bl	ftl_memset
 	ldrh	w0, [x21, #:lo12:.LANCHOR33]
 	mov	w1, 255
 	ldrh	w2, [x22, #:lo12:.LANCHOR23]
 	mul	w2, w2, w0
-	ldr	x0, [x23, #:lo12:.LANCHOR136]
+	ldr	x0, [x23, #:lo12:.LANCHOR126]
 	bl	ftl_memset
 	adrp	x0, .LANCHOR55
 	ldrh	w3, [x21, #:lo12:.LANCHOR33]
-	ldr	x6, [x23, #:lo12:.LANCHOR136]
+	ldr	x6, [x23, #:lo12:.LANCHOR126]
 	mov	x1, 0
 	ldr	x0, [x0, #:lo12:.LANCHOR55]
 	mov	w2, -1
 	ldrh	w5, [x22, #:lo12:.LANCHOR23]
 	add	x3, x0, x3, lsl 4
-.L510:
+.L353:
 	add	x4, x1, x5
 	cmp	x0, x3
-	bne	.L511
-	adrp	x1, .LANCHOR140
-	add	x0, x1, :lo12:.LANCHOR140
+	bne	.L354
+	adrp	x1, .LANCHOR129
+	add	x0, x1, :lo12:.LANCHOR129
 	ldp	x21, x22, [sp, 32]
-	strh	w2, [x1, #:lo12:.LANCHOR140]
+	strh	w2, [x1, #:lo12:.LANCHOR129]
 	ldr	w1, [x20, #:lo12:.LANCHOR30]
 	strh	w1, [x0, 10]
 	mov	w1, -3902
 	strh	w1, [x0, 4]
-	adrp	x1, .LANCHOR141
+	adrp	x1, .LANCHOR130
 	ldr	x23, [sp, 48]
 	strh	w2, [x0, 2]
-	ldrh	w1, [x1, #:lo12:.LANCHOR141]
+	ldrh	w1, [x1, #:lo12:.LANCHOR130]
 	strh	w1, [x0, 8]
 	adrp	x1, .LANCHOR32
 	ldrh	w1, [x1, #:lo12:.LANCHOR32]
 	strh	w1, [x0, 6]
-	adrp	x1, .LANCHOR129
-	ldr	x1, [x1, #:lo12:.LANCHOR129]
+	adrp	x1, .LANCHOR119
+	ldr	x1, [x1, #:lo12:.LANCHOR119]
 	str	x1, [x0, 16]
-	adrp	x1, .LANCHOR135
-	ldr	x1, [x1, #:lo12:.LANCHOR135]
+	adrp	x1, .LANCHOR125
+	ldr	x1, [x1, #:lo12:.LANCHOR125]
 	str	x1, [x0, 24]
-	ldr	x1, [x19, #:lo12:.LANCHOR130]
+	ldr	x1, [x19, #:lo12:.LANCHOR120]
 	ldp	x19, x20, [sp, 16]
 	str	x1, [x0, 32]
-	adrp	x1, .LANCHOR134
-	ldr	x1, [x1, #:lo12:.LANCHOR134]
+	adrp	x1, .LANCHOR124
+	ldr	x1, [x1, #:lo12:.LANCHOR124]
 	str	x1, [x0, 40]
 	ldp	x29, x30, [sp], 64
 	ret
-.L511:
+.L354:
 	and	x1, x1, -4
 	strh	w2, [x0]
 	add	x1, x6, x1
@@ -3915,7 +2908,7 @@ FtlL2PDataInit:
 	str	x1, [x0, 8]
 	add	x0, x0, 16
 	mov	x1, x4
-	b	.L510
+	b	.L353
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
 	.section	.text.FtlVariablesInit,"ax",@progbits
 	.align	2
@@ -3923,19 +2916,19 @@ FtlL2PDataInit:
 	.type	FtlVariablesInit, %function
 FtlVariablesInit:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR142
+	adrp	x0, .LANCHOR131
 	mov	w1, -1
 	add	x29, sp, 0
-	strh	w1, [x0, #:lo12:.LANCHOR142]
-	adrp	x0, .LANCHOR143
+	strh	w1, [x0, #:lo12:.LANCHOR131]
+	adrp	x0, .LANCHOR132
 	mov	w1, -1
 	str	x19, [sp, 16]
-	str	wzr, [x0, #:lo12:.LANCHOR143]
-	adrp	x0, .LANCHOR144
+	str	wzr, [x0, #:lo12:.LANCHOR132]
+	adrp	x0, .LANCHOR133
 	adrp	x19, .LANCHOR6
-	str	wzr, [x0, #:lo12:.LANCHOR144]
-	adrp	x0, .LANCHOR145
-	str	w1, [x0, #:lo12:.LANCHOR145]
+	str	wzr, [x0, #:lo12:.LANCHOR133]
+	adrp	x0, .LANCHOR134
+	str	w1, [x0, #:lo12:.LANCHOR134]
 	adrp	x0, .LANCHOR35
 	mov	w1, 0
 	strh	wzr, [x0, #:lo12:.LANCHOR35]
@@ -3951,10 +2944,10 @@ FtlVariablesInit:
 	ldr	x0, [x0, #:lo12:.LANCHOR43]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	adrp	x0, .LANCHOR126
+	adrp	x0, .LANCHOR117
 	ldrh	w2, [x19, #:lo12:.LANCHOR6]
 	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR126]
+	ldr	x0, [x0, #:lo12:.LANCHOR117]
 	lsl	w2, w2, 1
 	bl	ftl_memset
 	mov	w2, 48
@@ -3964,8 +2957,8 @@ FtlVariablesInit:
 	bl	ftl_memset
 	mov	w2, 512
 	mov	w1, 0
-	adrp	x0, .LANCHOR81
-	add	x0, x0, :lo12:.LANCHOR81
+	adrp	x0, .LANCHOR135
+	add	x0, x0, :lo12:.LANCHOR135
 	bl	ftl_memset
 	bl	FtlGcBufInit
 	bl	FtlL2PDataInit
@@ -4012,33 +3005,33 @@ SupperBlkListInit:
 	str	xzr, [x0, #:lo12:.LANCHOR41]
 	adrp	x0, .LANCHOR44
 	str	xzr, [x0, #:lo12:.LANCHOR44]
-.L516:
+.L359:
 	ldrh	w0, [x25]
 	cmp	w19, w0
-	bcs	.L523
+	bcs	.L366
 	adrp	x0, .LANCHOR19
 	ldrh	w8, [x27, #:lo12:.LANCHOR3]
 	mov	x6, 0
 	mov	w5, 0
 	ldrh	w7, [x0, #:lo12:.LANCHOR19]
-	b	.L524
-.L518:
+	b	.L367
+.L361:
 	ldrb	w0, [x26, x6]
 	mov	w1, w19
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L517
+	cbnz	w0, .L360
 	add	w5, w5, w7
 	and	w5, w5, 65535
-.L517:
+.L360:
 	add	x6, x6, 1
-.L524:
+.L367:
 	cmp	w8, w6, uxth
-	bhi	.L518
-	cbz	w5, .L519
+	bhi	.L361
+	cbz	w5, .L362
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.L520:
+.L363:
 	ldr	x1, [x24, #:lo12:.LANCHOR40]
 	mov	w0, 6
 	umaddl	x0, w19, w0, x1
@@ -4046,54 +3039,54 @@ SupperBlkListInit:
 	adrp	x0, .LANCHOR51
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w19
-	beq	.L521
+	beq	.L364
 	adrp	x0, .LANCHOR52
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
-	beq	.L521
+	beq	.L364
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w19
-	beq	.L521
+	beq	.L364
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x19, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x0]
-	cbnz	w0, .L522
+	cbnz	w0, .L365
 	add	w21, w21, 1
 	mov	w0, w19
 	and	w21, w21, 65535
 	bl	INSERT_FREE_LIST
-.L521:
+.L364:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L516
-.L519:
+	b	.L359
+.L362:
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x19, 1, 16
 	mov	w2, -1
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	strh	w2, [x1, x0]
-	b	.L520
-.L522:
+	b	.L363
+.L365:
 	add	w20, w20, 1
 	mov	w0, w19
 	and	w20, w20, 65535
 	bl	INSERT_DATA_LIST
-	b	.L521
-.L523:
+	b	.L364
+.L366:
 	strh	w20, [x23, #:lo12:.LANCHOR45]
 	add	w20, w20, w21
 	strh	w21, [x22, #:lo12:.LANCHOR48]
 	cmp	w20, w0
-	ble	.L525
-	adrp	x1, .LANCHOR146
+	ble	.L368
+	adrp	x1, .LANCHOR136
 	adrp	x0, .LC1
-	mov	w2, 2170
-	add	x1, x1, :lo12:.LANCHOR146
+	mov	w2, 2216
+	add	x1, x1, :lo12:.LANCHOR136
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L525:
+.L368:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -4109,25 +3102,25 @@ SupperBlkListInit:
 	.type	FtlGcPageVarInit, %function
 FtlGcPageVarInit:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR95
+	adrp	x0, .LANCHOR68
 	mov	w1, 255
 	add	x29, sp, 0
-	strh	wzr, [x0, #:lo12:.LANCHOR95]
-	adrp	x0, .LANCHOR97
+	strh	wzr, [x0, #:lo12:.LANCHOR68]
+	adrp	x0, .LANCHOR70
 	str	x19, [sp, 16]
 	adrp	x19, .LANCHOR21
-	strh	wzr, [x0, #:lo12:.LANCHOR97]
-	adrp	x0, .LANCHOR96
+	strh	wzr, [x0, #:lo12:.LANCHOR70]
+	adrp	x0, .LANCHOR69
 	ldrh	w2, [x19, #:lo12:.LANCHOR21]
-	ldr	x0, [x0, #:lo12:.LANCHOR96]
+	ldr	x0, [x0, #:lo12:.LANCHOR69]
 	lsl	w2, w2, 1
 	bl	ftl_memset
 	ldrh	w2, [x19, #:lo12:.LANCHOR21]
 	mov	w0, 12
 	mov	w1, 255
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR98
-	ldr	x0, [x0, #:lo12:.LANCHOR98]
+	adrp	x0, .LANCHOR71
+	ldr	x0, [x0, #:lo12:.LANCHOR71]
 	bl	ftl_memset
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -4146,38 +3139,38 @@ FlashGetBadBlockList:
 	mov	w20, w1
 	mov	w1, 255
 	bl	ftl_memset
-	adrp	x0, .LANCHOR105
+	adrp	x0, .LANCHOR78
 	mov	w1, w20
-	ldr	x2, [x0, #:lo12:.LANCHOR105]
+	ldr	x2, [x0, #:lo12:.LANCHOR78]
 	mov	x0, x19
 	blr	x2
 	and	w0, w0, 65535
 	cmp	w0, 50
-	bls	.L530
+	bls	.L373
 	mov	w2, 256
 	mov	w1, 255
 	mov	x0, x19
 	bl	ftl_memset
 	mov	w0, 0
-.L530:
+.L373:
 	adrp	x1, .LANCHOR0+14
 	ldrh	w1, [x1, #:lo12:.LANCHOR0+14]
 	cmp	w1, 4
-	bne	.L534
+	bne	.L377
 	mov	x1, 0
-.L532:
+.L375:
 	cmp	w0, w1, uxth
-	bhi	.L533
-.L534:
+	bhi	.L376
+.L377:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L533:
+.L376:
 	ldrh	w2, [x19, x1, lsl 1]
 	lsr	w2, w2, 1
 	strh	w2, [x19, x1, lsl 1]
 	add	x1, x1, 1
-	b	.L532
+	b	.L375
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
 	.section	.text.ftl_memcpy,"ax",@progbits
 	.align	2
@@ -4200,18 +3193,18 @@ FlashReadPages:
 	add	x2, x21, :lo12:.LANCHOR0
 	str	x27, [sp, 80]
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR147
+	adrp	x24, .LANCHOR137
 	stp	x19, x20, [sp, 16]
 	add	x23, x0, x1
 	ldrh	w27, [x2, 12]
 	mov	x19, x0
 	stp	x25, x26, [sp, 64]
-	add	x24, x24, :lo12:.LANCHOR147
+	add	x24, x24, :lo12:.LANCHOR137
 	adrp	x25, .LC1
 	add	x25, x25, :lo12:.LC1
-.L538:
+.L381:
 	cmp	x23, x19
-	bne	.L549
+	bne	.L392
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -4220,38 +3213,38 @@ FlashReadPages:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L549:
+.L392:
 	ldr	x0, [x19, 8]
-	cbz	x0, .L539
+	cbz	x0, .L382
 	ldr	x0, [x19, 16]
-	cbnz	x0, .L540
-.L539:
+	cbnz	x0, .L383
+.L382:
 	mov	w2, 90
 	mov	x1, x24
 	mov	x0, x25
 	bl	printf
-.L540:
+.L383:
 	ldr	w0, [x19, 4]
 	add	x2, x29, 104
 	add	x1, x29, 108
 	bl	l2p_addr_tran.isra.0
 	ldr	w0, [x29, 104]
 	cmp	w0, 3
-	bls	.L541
+	bls	.L384
 	mov	w0, -1
 	str	w0, [x19]
-.L542:
+.L385:
 	add	x19, x19, 32
-	b	.L538
-.L541:
+	b	.L381
+.L384:
 	ldr	x20, [x19, 8]
-	adrp	x26, .LANCHOR120
+	adrp	x26, .LANCHOR111
 	tst	x20, 63
-	beq	.L543
-	ldr	x20, [x26, #:lo12:.LANCHOR120]
-.L543:
-	adrp	x22, .LANCHOR105
-	add	x22, x22, :lo12:.LANCHOR105
+	beq	.L386
+	ldr	x20, [x26, #:lo12:.LANCHOR111]
+.L386:
+	adrp	x22, .LANCHOR78
+	add	x22, x22, :lo12:.LANCHOR78
 	ldr	w1, [x29, 108]
 	mov	x2, x20
 	ldr	x3, [x19, 16]
@@ -4261,7 +3254,7 @@ FlashReadPages:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
-	bne	.L545
+	bne	.L388
 	ldrb	w0, [x29, 104]
 	add	x2, x20, 2048
 	ldr	x4, [x22, 24]
@@ -4271,40 +3264,40 @@ FlashReadPages:
 	add	x3, x3, 8
 	blr	x4
 	cmn	w0, #1
-	beq	.L546
+	beq	.L389
 	ldr	x1, [x19, 16]
 	ldr	w2, [x1, 12]
 	cmn	w2, #1
-	bne	.L547
+	bne	.L390
 	ldr	w2, [x1, 8]
 	cmn	w2, #1
-	bne	.L547
+	bne	.L390
 	ldr	w1, [x1]
 	cmn	w1, #1
-	beq	.L547
-.L546:
+	beq	.L390
+.L389:
 	mov	w1, -1
 	str	w1, [x19]
-.L547:
+.L390:
 	ldr	w1, [x19]
 	cmn	w1, #1
-	beq	.L545
+	beq	.L388
 	cmp	w0, 256
-	bne	.L545
+	bne	.L388
 	str	w0, [x19]
-.L545:
-	ldr	x0, [x26, #:lo12:.LANCHOR120]
+.L388:
+	ldr	x0, [x26, #:lo12:.LANCHOR111]
 	cmp	x20, x0
-	bne	.L542
+	bne	.L385
 	ldr	x0, [x19, 8]
 	cmp	x20, x0
-	beq	.L542
+	beq	.L385
 	adrp	x1, .LANCHOR12
 	ldrh	w2, [x1, #:lo12:.LANCHOR12]
 	mov	x1, x20
 	lsl	w2, w2, 9
 	bl	ftl_memcpy
-	b	.L542
+	b	.L385
 	.size	FlashReadPages, .-FlashReadPages
 	.section	.text.FtlLoadFactoryBbt,"ax",@progbits
 	.align	2
@@ -4312,11 +3305,11 @@ FlashReadPages:
 	.type	FtlLoadFactoryBbt, %function
 FtlLoadFactoryBbt:
 	stp	x29, x30, [sp, -112]!
-	adrp	x2, .LANCHOR115
-	adrp	x0, .LANCHOR148
-	add	x1, x0, :lo12:.LANCHOR148
+	adrp	x2, .LANCHOR106
+	adrp	x0, .LANCHOR138
+	add	x1, x0, :lo12:.LANCHOR138
 	add	x29, sp, 0
-	ldr	x2, [x2, #:lo12:.LANCHOR115]
+	ldr	x2, [x2, #:lo12:.LANCHOR106]
 	stp	x21, x22, [sp, 32]
 	mov	x22, x0
 	stp	x25, x26, [sp, 64]
@@ -4328,18 +3321,18 @@ FtlLoadFactoryBbt:
 	stp	x23, x24, [sp, 48]
 	add	x20, x20, :lo12:.LANCHOR37
 	str	x2, [x1, 8]
-	adrp	x2, .LANCHOR123
+	adrp	x2, .LANCHOR114
 	adrp	x23, .LANCHOR10
 	add	x20, x20, 12
-	ldr	x25, [x2, #:lo12:.LANCHOR123]
+	ldr	x25, [x2, #:lo12:.LANCHOR114]
 	add	x23, x23, :lo12:.LANCHOR10
 	mov	w21, 0
 	mov	w27, -1
 	str	x25, [x1, 16]
-.L567:
+.L410:
 	ldrh	w0, [x23]
 	cmp	w21, w0
-	bcc	.L572
+	bcc	.L415
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -4348,18 +3341,18 @@ FtlLoadFactoryBbt:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L572:
+.L415:
 	ldrh	w19, [x26, #:lo12:.LANCHOR17]
-	add	x24, x22, :lo12:.LANCHOR148
+	add	x24, x22, :lo12:.LANCHOR138
 	strh	w27, [x20]
 	mov	w3, 61664
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L568:
+.L411:
 	ldrh	w0, [x28]
 	sub	w1, w0, #15
 	cmp	w1, w19
-	bgt	.L570
+	bgt	.L413
 	madd	w0, w0, w21, w19
 	mov	w2, 1
 	str	w3, [x29, 108]
@@ -4371,19 +3364,19 @@ FtlLoadFactoryBbt:
 	ldr	w0, [x24]
 	ldr	w3, [x29, 108]
 	cmn	w0, #1
-	beq	.L569
+	beq	.L412
 	ldrh	w0, [x25]
 	cmp	w0, w3
-	bne	.L569
+	bne	.L412
 	strh	w19, [x20]
-.L570:
+.L413:
 	add	w21, w21, 1
 	add	x20, x20, 2
-	b	.L567
-.L569:
+	b	.L410
+.L412:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L568
+	b	.L411
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
 	.section	.text.FtlGetLastWrittenPage,"ax",@progbits
 	.align	2
@@ -4397,15 +3390,15 @@ FtlGetLastWrittenPage:
 	mov	w23, w1
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	bne	.L578
+	bne	.L421
 	adrp	x1, .LANCHOR20
 	ldrh	w19, [x1, #:lo12:.LANCHOR20]
-.L579:
-	adrp	x1, .LANCHOR121
+.L422:
+	adrp	x1, .LANCHOR112
 	sub	w19, w19, #1
 	sxth	w19, w19
 	lsl	w21, w0, 10
-	ldr	x1, [x1, #:lo12:.LANCHOR121]
+	ldr	x1, [x1, #:lo12:.LANCHOR112]
 	orr	w0, w19, w21
 	str	x1, [x29, 72]
 	add	x1, x29, 96
@@ -4417,24 +3410,24 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 96]
 	cmn	w0, #1
-	bne	.L580
+	bne	.L423
 	mov	w22, 0
 	mov	w24, 2
-.L581:
+.L424:
 	cmp	w22, w19
-	ble	.L584
-.L580:
+	ble	.L427
+.L423:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 160
 	ret
-.L578:
+.L421:
 	adrp	x1, .LANCHOR19
 	ldrh	w19, [x1, #:lo12:.LANCHOR19]
-	b	.L579
-.L584:
+	b	.L422
+.L427:
 	add	w20, w22, w19
 	mov	w2, w23
 	mov	w1, 1
@@ -4446,20 +3439,20 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 96]
 	cmn	w0, #1
-	bne	.L582
+	bne	.L425
 	ldr	w0, [x29, 100]
 	cmn	w0, #1
-	bne	.L582
+	bne	.L425
 	ldr	w0, [x29, 64]
 	cmn	w0, #1
-	beq	.L582
+	beq	.L425
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L581
-.L582:
+	b	.L424
+.L425:
 	add	w20, w20, 1
 	sxth	w22, w20
-	b	.L581
+	b	.L424
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
 	.section	.text.FtlScanSysBlk,"ax",@progbits
 	.align	2
@@ -4470,31 +3463,31 @@ FtlScanSysBlk:
 	mov	w1, 0
 	add	x29, sp, 0
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR135
+	adrp	x25, .LANCHOR125
 	stp	x21, x22, [sp, 32]
 	adrp	x21, .LANCHOR30
-	ldr	x0, [x25, #:lo12:.LANCHOR135]
-	adrp	x22, .LANCHOR132
+	ldr	x0, [x25, #:lo12:.LANCHOR125]
+	adrp	x22, .LANCHOR122
 	ldr	w2, [x21, #:lo12:.LANCHOR30]
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR141
+	adrp	x20, .LANCHOR130
 	stp	x23, x24, [sp, 48]
 	adrp	x23, .LANCHOR35
 	stp	x27, x28, [sp, 80]
-	adrp	x27, .LANCHOR129
+	adrp	x27, .LANCHOR119
 	lsl	w2, w2, 2
-	strh	wzr, [x20, #:lo12:.LANCHOR141]
+	strh	wzr, [x20, #:lo12:.LANCHOR130]
 	strh	wzr, [x23, #:lo12:.LANCHOR35]
 	bl	ftl_memset
-	ldr	x0, [x27, #:lo12:.LANCHOR129]
+	ldr	x0, [x27, #:lo12:.LANCHOR119]
 	mov	w1, 0
 	ldr	w2, [x21, #:lo12:.LANCHOR30]
 	adrp	x19, .LANCHOR27
 	adrp	x28, .LANCHOR36
-	adrp	x24, .LANCHOR79
+	adrp	x24, .LANCHOR139
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	ldr	x0, [x22, #:lo12:.LANCHOR132]
+	ldr	x0, [x22, #:lo12:.LANCHOR122]
 	mov	w1, 0
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	lsl	w2, w2, 2
@@ -4504,9 +3497,9 @@ FtlScanSysBlk:
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	mov	w2, 12
+	mov	w2, 16
 	mov	w1, 255
-	add	x0, x24, :lo12:.LANCHOR79
+	add	x0, x24, :lo12:.LANCHOR139
 	bl	ftl_memset
 	adrp	x0, .LANCHOR5
 	stp	x22, x25, [x29, 144]
@@ -4516,37 +3509,37 @@ FtlScanSysBlk:
 	adrp	x0, .LANCHOR6
 	add	x0, x0, :lo12:.LANCHOR6
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR70
-	add	x0, x0, :lo12:.LANCHOR70
+	adrp	x0, .LANCHOR82
+	add	x0, x0, :lo12:.LANCHOR82
 	str	x0, [x29, 112]
-.L590:
+.L433:
 	ldr	x0, [x29, 120]
 	ldr	w1, [x29, 172]
 	ldrh	w0, [x0]
 	cmp	w0, w1
-	bls	.L630
+	bls	.L473
 	adrp	x0, .LANCHOR3
-	adrp	x25, .LANCHOR112
+	adrp	x25, .LANCHOR103
 	adrp	x6, .LANCHOR13
 	mov	x5, 0
 	ldrh	w12, [x0, #:lo12:.LANCHOR3]
-	adrp	x0, .LANCHOR91
-	ldr	x7, [x25, #:lo12:.LANCHOR112]
+	adrp	x0, .LANCHOR64
+	ldr	x7, [x25, #:lo12:.LANCHOR103]
 	mov	w22, 0
-	ldr	x11, [x0, #:lo12:.LANCHOR91]
-	adrp	x0, .LANCHOR92
+	ldr	x11, [x0, #:lo12:.LANCHOR64]
+	adrp	x0, .LANCHOR65
 	add	x6, x6, :lo12:.LANCHOR13
-	ldr	x10, [x0, #:lo12:.LANCHOR92]
+	ldr	x10, [x0, #:lo12:.LANCHOR65]
 	adrp	x0, .LANCHOR24
 	ldrh	w8, [x0, #:lo12:.LANCHOR24]
-	b	.L631
-.L592:
+	b	.L474
+.L435:
 	ldrh	w1, [x29, 172]
 	ldrb	w0, [x6, x5]
 	bl	V2P_block
 	and	w4, w0, 65535
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L591
+	cbnz	w0, .L434
 	ubfiz	x0, x22, 5, 16
 	mul	w1, w22, w8
 	add	x0, x7, x0
@@ -4557,19 +3550,19 @@ FtlScanSysBlk:
 	add	x1, x10, x1, sxtw 2
 	str	w4, [x0, 4]
 	stp	x11, x1, [x0, 8]
-.L591:
+.L434:
 	add	x5, x5, 1
-.L631:
+.L474:
 	cmp	w12, w5, uxth
-	bhi	.L592
-	cbnz	w22, .L593
-.L629:
+	bhi	.L435
+	cbnz	w22, .L436
+.L472:
 	ldr	w0, [x29, 172]
 	add	w26, w0, 1
 	and	w0, w26, 65535
 	str	w0, [x29, 172]
-	b	.L590
-.L593:
+	b	.L433
+.L436:
 	mov	w1, w22
 	mov	w2, 1
 	mov	x0, x7
@@ -4577,23 +3570,23 @@ FtlScanSysBlk:
 	ubfiz	x0, x22, 5, 16
 	mov	x22, 0
 	str	x0, [x29, 128]
-	adrp	x0, .LANCHOR149
-	add	x0, x0, :lo12:.LANCHOR149
+	adrp	x0, .LANCHOR140
+	add	x0, x0, :lo12:.LANCHOR140
 	str	x0, [x29, 136]
-.L628:
-	ldr	x0, [x25, #:lo12:.LANCHOR112]
+.L471:
+	ldr	x0, [x25, #:lo12:.LANCHOR103]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
 	ldr	w3, [x1, 4]
 	cmn	w0, #1
 	ldr	x27, [x1, 16]
 	ubfx	x26, x3, 10, 16
-	bne	.L596
+	bne	.L439
 	mov	w5, 16
 	mov	w7, 65535
-.L598:
-	ldr	x0, [x25, #:lo12:.LANCHOR112]
-	add	x6, x25, :lo12:.LANCHOR112
+.L441:
+	ldr	x0, [x25, #:lo12:.LANCHOR103]
+	add	x6, x25, :lo12:.LANCHOR103
 	mov	w2, 1
 	str	w7, [x29, 100]
 	add	x0, x0, x22
@@ -4609,135 +3602,135 @@ FtlScanSysBlk:
 	ldr	w5, [x29, 168]
 	cmp	w0, w7
 	ldr	x6, [x29, 104]
-	bne	.L595
+	bne	.L438
 	ldr	x0, [x6]
 	mov	w1, -1
 	str	w1, [x0, x22]
 	ldr	x0, [x6]
 	ldr	w0, [x0, x22]
 	cmp	w0, w1
-	bne	.L596
-.L597:
+	bne	.L439
+.L440:
 	mov	w1, 1
-	b	.L667
-.L595:
-	ldr	x0, [x25, #:lo12:.LANCHOR112]
+	b	.L510
+.L438:
+	ldr	x0, [x25, #:lo12:.LANCHOR103]
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	bne	.L596
+	bne	.L439
 	sub	w5, w5, #1
 	ands	w5, w5, 65535
-	bne	.L598
-	b	.L597
-.L596:
-	adrp	x0, .LANCHOR70
-	ldr	w1, [x0, #:lo12:.LANCHOR70]
+	bne	.L441
+	b	.L440
+.L439:
+	adrp	x0, .LANCHOR82
+	ldr	w1, [x0, #:lo12:.LANCHOR82]
 	ldr	w0, [x27, 4]
 	cmn	w1, #1
-	beq	.L599
+	beq	.L442
 	cmp	w1, w0
-	bhi	.L600
-.L599:
+	bhi	.L443
+.L442:
 	cmn	w0, #1
-	beq	.L600
+	beq	.L443
 	ldr	x2, [x29, 112]
 	add	w1, w0, 1
 	str	w1, [x2]
-.L600:
+.L443:
 	ldrh	w1, [x27]
 	mov	w2, 61604
 	cmp	w1, w2
-	beq	.L602
-	bhi	.L603
+	beq	.L445
+	bhi	.L446
 	mov	w0, 61574
 	cmp	w1, w0
-	beq	.L604
-.L601:
+	beq	.L447
+.L444:
 	ldr	x0, [x29, 128]
 	add	x22, x22, 32
 	cmp	x0, x22
-	bne	.L628
-	b	.L629
-.L603:
+	bne	.L471
+	b	.L472
+.L446:
 	mov	w0, 61634
 	cmp	w1, w0
-	beq	.L605
+	beq	.L448
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L601
+	bne	.L444
 	mov	w1, 0
-.L667:
+.L510:
 	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-	b	.L601
-.L605:
-	ldrh	w1, [x20, #:lo12:.LANCHOR141]
+	b	.L444
+.L448:
+	ldrh	w1, [x20, #:lo12:.LANCHOR130]
 	ldr	w0, [x21, #:lo12:.LANCHOR30]
 	cmp	w1, w0
-	bls	.L607
+	bls	.L450
 	ldr	x1, [x29, 136]
 	adrp	x0, .LC1
-	mov	w2, 1222
+	mov	w2, 1225
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L607:
+.L450:
 	ldr	w6, [x21, #:lo12:.LANCHOR30]
 	ldr	x3, [x29, 152]
-	ldrh	w1, [x20, #:lo12:.LANCHOR141]
+	ldrh	w1, [x20, #:lo12:.LANCHOR130]
 	and	w2, w6, 65535
 	sub	w0, w2, #1
 	sub	w2, w2, w1
 	sxth	x0, w0
 	sub	w2, w2, #1
-	ldr	x5, [x3, #:lo12:.LANCHOR135]
+	ldr	x5, [x3, #:lo12:.LANCHOR125]
 	sxth	w2, w2
-.L608:
+.L451:
 	cmp	w0, w2
-	bgt	.L614
-	tbz	w0, #31, .L648
-	b	.L601
-.L614:
+	bgt	.L457
+	tbz	w0, #31, .L491
+	b	.L444
+.L457:
 	sxtw	x8, w0
 	ldr	w11, [x27, 4]
 	lsl	x7, x8, 2
 	add	x10, x5, x7
 	ldr	w7, [x5, x7]
 	cmp	w11, w7
-	bls	.L609
+	bls	.L452
 	ldr	w2, [x5]
-	cbnz	w2, .L610
+	cbnz	w2, .L453
 	cmp	w6, w1
-	beq	.L610
+	beq	.L453
 	add	w1, w1, 1
-	strh	w1, [x20, #:lo12:.LANCHOR141]
-.L610:
+	strh	w1, [x20, #:lo12:.LANCHOR130]
+.L453:
 	ldr	x1, [x29, 160]
-	ldr	x6, [x1, #:lo12:.LANCHOR129]
+	ldr	x6, [x1, #:lo12:.LANCHOR119]
 	mov	w1, 0
-.L611:
+.L454:
 	cmp	w1, w0
-	bne	.L612
+	bne	.L455
 	ldr	w1, [x27, 4]
 	str	w1, [x10]
 	strh	w26, [x6, x8, lsl 1]
-	tbnz	w0, #31, .L601
-	ldrh	w1, [x20, #:lo12:.LANCHOR141]
+	tbnz	w0, #31, .L444
+	ldrh	w1, [x20, #:lo12:.LANCHOR130]
 	ldr	w2, [x21, #:lo12:.LANCHOR30]
 	sub	w2, w2, w1
 	sub	w2, w2, #1
 	cmp	w0, w2, sxth
-	bgt	.L601
-.L648:
+	bgt	.L444
+.L491:
 	add	w1, w1, 1
-	strh	w1, [x20, #:lo12:.LANCHOR141]
+	strh	w1, [x20, #:lo12:.LANCHOR130]
 	ldr	w1, [x27, 4]
 	str	w1, [x5, x0, lsl 2]
 	ldr	x1, [x29, 160]
-	ldr	x1, [x1, #:lo12:.LANCHOR129]
-.L666:
+	ldr	x1, [x1, #:lo12:.LANCHOR119]
+.L509:
 	strh	w26, [x1, x0, lsl 1]
-	b	.L601
-.L612:
+	b	.L444
+.L455:
 	sxtw	x2, w1
 	add	w1, w1, 1
 	lsl	x7, x2, 2
@@ -4749,69 +3742,69 @@ FtlScanSysBlk:
 	add	x7, x6, x2
 	ldrh	w7, [x7, 2]
 	strh	w7, [x6, x2]
-	b	.L611
-.L609:
+	b	.L454
+.L452:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L608
-.L604:
+	b	.L451
+.L447:
 	ldrh	w1, [x23, #:lo12:.LANCHOR35]
 	ldrh	w0, [x19, #:lo12:.LANCHOR27]
 	cmp	w1, w0
-	bls	.L617
+	bls	.L460
 	ldr	x1, [x29, 136]
 	adrp	x0, .LC1
-	mov	w2, 1263
+	mov	w2, 1266
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L617:
+.L460:
 	ldrh	w6, [x19, #:lo12:.LANCHOR27]
 	ldrh	w2, [x23, #:lo12:.LANCHOR35]
 	sub	w1, w6, #1
 	sxth	x0, w1
 	sub	w5, w1, w2
 	ldr	x1, [x29, 144]
-	ldr	x1, [x1, #:lo12:.LANCHOR132]
-.L618:
+	ldr	x1, [x1, #:lo12:.LANCHOR122]
+.L461:
 	cmp	w0, w5
-	ble	.L623
+	ble	.L466
 	sxtw	x7, w0
 	ldr	w11, [x27, 4]
 	lsl	x8, x7, 2
 	add	x10, x1, x8
 	ldr	w8, [x1, x8]
 	cmp	w11, w8
-	bls	.L619
+	bls	.L462
 	ldr	w5, [x1]
-	cbnz	w5, .L620
+	cbnz	w5, .L463
 	cmp	w6, w2
-	beq	.L620
+	beq	.L463
 	add	w2, w2, 1
 	strh	w2, [x23, #:lo12:.LANCHOR35]
-.L620:
+.L463:
 	ldr	x6, [x28, #:lo12:.LANCHOR36]
 	mov	w2, 0
-.L621:
+.L464:
 	cmp	w2, w0
-	bne	.L622
+	bne	.L465
 	ldr	w2, [x27, 4]
 	str	w2, [x10]
 	strh	w26, [x6, x7, lsl 1]
-.L623:
-	tbnz	w0, #31, .L601
+.L466:
+	tbnz	w0, #31, .L444
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	ldrh	w5, [x23, #:lo12:.LANCHOR35]
 	sub	w2, w2, #1
 	sub	w2, w2, w5
 	cmp	w0, w2, sxth
-	bgt	.L601
+	bgt	.L444
 	add	w5, w5, 1
 	ldr	w2, [x27, 4]
 	strh	w5, [x23, #:lo12:.LANCHOR35]
 	str	w2, [x1, x0, lsl 2]
 	ldr	x1, [x28, #:lo12:.LANCHOR36]
-	b	.L666
-.L622:
+	b	.L509
+.L465:
 	sxtw	x5, w2
 	add	w2, w2, 1
 	lsl	x8, x5, 2
@@ -4823,61 +3816,61 @@ FtlScanSysBlk:
 	add	x8, x6, x5
 	ldrh	w8, [x8, 2]
 	strh	w8, [x6, x5]
-	b	.L621
-.L619:
+	b	.L464
+.L462:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L618
-.L602:
-	ldrh	w5, [x24, #:lo12:.LANCHOR79]
+	b	.L461
+.L445:
+	ldrh	w5, [x24, #:lo12:.LANCHOR139]
 	mov	w1, 65535
-	add	x2, x24, :lo12:.LANCHOR79
+	add	x2, x24, :lo12:.LANCHOR139
 	cmp	w5, w1
-	bne	.L625
-	strh	w26, [x24, #:lo12:.LANCHOR79]
+	bne	.L468
+	strh	w26, [x24, #:lo12:.LANCHOR139]
 	str	w0, [x2, 8]
-	b	.L601
-.L625:
+	b	.L444
+.L468:
 	ldrh	w0, [x2, 4]
 	cmp	w0, w1
-	beq	.L626
+	beq	.L469
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.L626:
-	add	x0, x24, :lo12:.LANCHOR79
+.L469:
+	add	x0, x24, :lo12:.LANCHOR139
 	ldr	w1, [x27, 4]
 	ldr	w2, [x0, 8]
 	cmp	w2, w1
-	bcs	.L627
-	ldrh	w2, [x24, #:lo12:.LANCHOR79]
+	bcs	.L470
+	ldrh	w2, [x24, #:lo12:.LANCHOR139]
 	strh	w2, [x0, 4]
-	strh	w26, [x24, #:lo12:.LANCHOR79]
+	strh	w26, [x24, #:lo12:.LANCHOR139]
 	str	w1, [x0, 8]
-	b	.L601
-.L627:
+	b	.L444
+.L470:
 	strh	w26, [x0, 4]
-	b	.L601
-.L630:
+	b	.L444
+.L473:
 	ldr	x0, [x29, 160]
-	ldr	x2, [x0, #:lo12:.LANCHOR129]
+	ldr	x2, [x0, #:lo12:.LANCHOR119]
 	ldrh	w0, [x2]
-	cbz	w0, .L632
-.L635:
+	cbz	w0, .L475
+.L478:
 	ldr	x1, [x28, #:lo12:.LANCHOR36]
 	ldrh	w0, [x1]
-	cbz	w0, .L633
-.L634:
-	ldrh	w1, [x20, #:lo12:.LANCHOR141]
+	cbz	w0, .L476
+.L477:
+	ldrh	w1, [x20, #:lo12:.LANCHOR130]
 	ldr	w0, [x21, #:lo12:.LANCHOR30]
 	cmp	w1, w0
-	bls	.L664
-	adrp	x1, .LANCHOR149
+	bls	.L507
+	adrp	x1, .LANCHOR140
 	adrp	x0, .LC1
-	mov	w2, 1388
-	add	x1, x1, :lo12:.LANCHOR149
+	mov	w2, 1391
+	add	x1, x1, :lo12:.LANCHOR140
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L664:
+.L507:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -4886,24 +3879,24 @@ FtlScanSysBlk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L632:
-	ldrh	w0, [x20, #:lo12:.LANCHOR141]
-	cbz	w0, .L635
+.L475:
+	ldrh	w0, [x20, #:lo12:.LANCHOR130]
+	cbz	w0, .L478
 	ldr	w1, [x21, #:lo12:.LANCHOR30]
 	mov	w0, 0
-.L636:
+.L479:
 	cmp	w0, w1
-	bcs	.L635
+	bcs	.L478
 	ldrh	w3, [x2, w0, sxtw 1]
-	cbz	w3, .L637
+	cbz	w3, .L480
 	ldr	x1, [x29, 152]
 	add	x7, x21, :lo12:.LANCHOR30
-	ldr	x4, [x1, #:lo12:.LANCHOR135]
+	ldr	x4, [x1, #:lo12:.LANCHOR125]
 	mov	w1, w0
-.L638:
+.L481:
 	ldr	w3, [x7]
 	cmp	w1, w3
-	bcs	.L635
+	bcs	.L478
 	sxtw	x6, w1
 	sub	w3, w1, w0
 	lsl	x5, x6, 1
@@ -4915,29 +3908,29 @@ FtlScanSysBlk:
 	strh	w8, [x2, x3, lsl 1]
 	str	w6, [x4, x3, lsl 2]
 	strh	wzr, [x2, x5]
-	b	.L638
-.L637:
+	b	.L481
+.L480:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L636
-.L633:
+	b	.L479
+.L476:
 	ldrh	w0, [x23, #:lo12:.LANCHOR35]
-	cbz	w0, .L634
+	cbz	w0, .L477
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	mov	w0, 0
-.L643:
+.L486:
 	mov	w6, w0
 	cmp	w0, w2
-	bge	.L634
+	bge	.L477
 	ldrh	w3, [x1, w0, sxtw 1]
-	cbz	w3, .L644
+	cbz	w3, .L487
 	ldr	x2, [x29, 144]
 	add	x19, x19, :lo12:.LANCHOR27
-	ldr	x3, [x2, #:lo12:.LANCHOR132]
-.L645:
+	ldr	x3, [x2, #:lo12:.LANCHOR122]
+.L488:
 	ldrh	w2, [x19]
 	cmp	w0, w2
-	bge	.L634
+	bge	.L477
 	sxtw	x5, w0
 	sub	w2, w0, w6
 	lsl	x4, x5, 1
@@ -4949,11 +3942,11 @@ FtlScanSysBlk:
 	strh	w7, [x1, x2, lsl 1]
 	str	w5, [x3, x2, lsl 2]
 	strh	wzr, [x1, x4]
-	b	.L645
-.L644:
+	b	.L488
+.L487:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L643
+	b	.L486
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
 	.section	.text.FtlLoadBbt,"ax",@progbits
 	.align	2
@@ -4963,29 +3956,29 @@ FtlLoadBbt:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR115
+	adrp	x23, .LANCHOR106
 	stp	x19, x20, [sp, 16]
 	adrp	x24, .LANCHOR17
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR148
-	add	x20, x22, :lo12:.LANCHOR148
-	ldr	x0, [x23, #:lo12:.LANCHOR115]
+	adrp	x22, .LANCHOR138
+	add	x20, x22, :lo12:.LANCHOR138
+	ldr	x0, [x23, #:lo12:.LANCHOR106]
 	str	x25, [sp, 64]
 	mov	w25, 61649
 	str	x0, [x20, 8]
-	adrp	x0, .LANCHOR123
-	ldr	x21, [x0, #:lo12:.LANCHOR123]
+	adrp	x0, .LANCHOR114
+	ldr	x21, [x0, #:lo12:.LANCHOR114]
 	str	x21, [x20, 16]
 	bl	FtlBbtMemInit
 	ldrh	w19, [x24, #:lo12:.LANCHOR17]
 	add	x24, x24, :lo12:.LANCHOR17
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L669:
+.L512:
 	ldrh	w0, [x24]
 	sub	w0, w0, #15
 	cmp	w0, w19
-	bgt	.L672
+	bgt	.L515
 	lsl	w0, w19, 10
 	mov	w2, 1
 	str	w0, [x20, 4]
@@ -4994,7 +3987,7 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L670
+	bne	.L513
 	ldr	w0, [x20, 4]
 	mov	w2, 1
 	mov	w1, w2
@@ -5002,13 +3995,13 @@ FtlLoadBbt:
 	str	w0, [x20, 4]
 	mov	x0, x20
 	bl	FlashReadPages
-.L670:
+.L513:
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L671
+	beq	.L514
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	bne	.L671
+	bne	.L514
 	adrp	x1, .LANCHOR37
 	add	x0, x1, :lo12:.LANCHOR37
 	strh	w19, [x1, #:lo12:.LANCHOR37]
@@ -5016,39 +4009,39 @@ FtlLoadBbt:
 	str	w1, [x0, 8]
 	ldrh	w1, [x21, 8]
 	strh	w1, [x0, 4]
-.L672:
+.L515:
 	adrp	x19, .LANCHOR37
 	mov	w0, 65535
 	add	x20, x19, :lo12:.LANCHOR37
 	ldrh	w1, [x19, #:lo12:.LANCHOR37]
 	cmp	w1, w0
-	beq	.L686
+	beq	.L529
 	ldrh	w1, [x20, 4]
 	cmp	w1, w0
-	beq	.L676
-	add	x0, x22, :lo12:.LANCHOR148
+	beq	.L519
+	add	x0, x22, :lo12:.LANCHOR138
 	lsl	w1, w1, 10
 	mov	w2, 1
 	str	w1, [x0, 4]
 	mov	w1, w2
 	bl	FlashReadPages
-	ldr	w0, [x22, #:lo12:.LANCHOR148]
+	ldr	w0, [x22, #:lo12:.LANCHOR138]
 	cmn	w0, #1
-	beq	.L676
+	beq	.L519
 	ldrh	w1, [x21]
 	mov	w0, 61649
 	cmp	w1, w0
-	bne	.L676
+	bne	.L519
 	ldr	w1, [x20, 8]
 	ldr	w0, [x21, 4]
 	cmp	w0, w1
-	bls	.L676
+	bls	.L519
 	ldrh	w1, [x20, 4]
 	str	w0, [x20, 8]
 	ldrh	w0, [x21, 8]
 	strh	w1, [x19, #:lo12:.LANCHOR37]
 	strh	w0, [x20, 4]
-.L676:
+.L519:
 	ldrh	w0, [x19, #:lo12:.LANCHOR37]
 	add	x24, x19, :lo12:.LANCHOR37
 	mov	w1, 1
@@ -5057,81 +4050,81 @@ FtlLoadBbt:
 	sxth	w20, w0
 	add	w0, w0, 1
 	strh	w0, [x24, 2]
-	add	x24, x22, :lo12:.LANCHOR148
-.L678:
-	tbz	w20, #31, .L681
-	adrp	x1, .LANCHOR150
+	add	x24, x22, :lo12:.LANCHOR138
+.L521:
+	tbz	w20, #31, .L524
+	adrp	x1, .LANCHOR141
 	adrp	x0, .LC1
 	mov	w2, 253
-	add	x1, x1, :lo12:.LANCHOR150
+	add	x1, x1, :lo12:.LANCHOR141
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L680:
+.L523:
 	add	x0, x19, :lo12:.LANCHOR37
 	ldrh	w1, [x21, 10]
 	strh	w1, [x0, 6]
 	mov	w1, 65535
 	ldrh	w0, [x21, 12]
 	cmp	w0, w1
-	beq	.L683
+	beq	.L526
 	adrp	x1, .LANCHOR2
 	ldr	w2, [x1, #:lo12:.LANCHOR2]
 	cmp	w0, w2
-	beq	.L683
+	beq	.L526
 	adrp	x1, .LANCHOR6
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	lsr	w1, w1, 2
 	cmp	w2, w1
-	bcs	.L683
+	bcs	.L526
 	cmp	w0, w1
-	bcs	.L683
+	bcs	.L526
 	bl	FtlSysBlkNumInit
-.L683:
+.L526:
 	add	x19, x19, :lo12:.LANCHOR37
 	adrp	x21, .LANCHOR10
-	adrp	x23, .LANCHOR137
+	adrp	x23, .LANCHOR127
 	add	x19, x19, 32
 	add	x21, x21, :lo12:.LANCHOR10
-	add	x23, x23, :lo12:.LANCHOR137
-	add	x22, x22, :lo12:.LANCHOR148
+	add	x23, x23, :lo12:.LANCHOR127
+	add	x22, x22, :lo12:.LANCHOR138
 	mov	w20, 0
-.L684:
+.L527:
 	ldrh	w0, [x21]
 	cmp	w20, w0
-	bcc	.L685
+	bcc	.L528
 	mov	w0, 0
-.L668:
+.L511:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L671:
+.L514:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L669
-.L681:
+	b	.L512
+.L524:
 	ldrh	w0, [x19, #:lo12:.LANCHOR37]
 	mov	w2, 1
 	mov	w1, w2
 	orr	w0, w20, w0, lsl 10
 	str	w0, [x24, 4]
-	ldr	x0, [x23, #:lo12:.LANCHOR115]
+	ldr	x0, [x23, #:lo12:.LANCHOR106]
 	str	x0, [x24, 8]
 	mov	x0, x24
 	bl	FlashReadPages
 	ldr	w0, [x24]
 	cmn	w0, #1
-	beq	.L679
+	beq	.L522
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	beq	.L680
-.L679:
+	beq	.L523
+.L522:
 	sub	w20, w20, #1
 	sxth	w20, w20
-	b	.L678
-.L685:
+	b	.L521
+.L528:
 	ldrh	w2, [x23]
 	ldr	x0, [x22, 8]
 	mul	w1, w2, w20
@@ -5140,284 +4133,11 @@ FtlLoadBbt:
 	add	x1, x0, x1, lsl 2
 	ldr	x0, [x19], 8
 	bl	ftl_memcpy
-	b	.L684
-.L686:
+	b	.L527
+.L529:
 	mov	w0, -1
-	b	.L668
+	b	.L511
 	.size	FtlLoadBbt, .-FtlLoadBbt
-	.section	.text.FtlLoadSysInfo,"ax",@progbits
-	.align	2
-	.global	FtlLoadSysInfo
-	.type	FtlLoadSysInfo, %function
-FtlLoadSysInfo:
-	stp	x29, x30, [sp, -96]!
-	mov	w1, 0
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR148
-	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR115
-	stp	x21, x22, [sp, 32]
-	add	x21, x19, :lo12:.LANCHOR148
-	stp	x25, x26, [sp, 64]
-	adrp	x26, .LANCHOR123
-	stp	x27, x28, [sp, 80]
-	adrp	x25, .LANCHOR42
-	ldr	x0, [x23, #:lo12:.LANCHOR115]
-	adrp	x24, .LANCHOR5
-	str	x0, [x21, 8]
-	adrp	x20, .LANCHOR79
-	ldr	x0, [x26, #:lo12:.LANCHOR123]
-	str	x0, [x21, 16]
-	ldr	x0, [x25, #:lo12:.LANCHOR42]
-	ldrh	w2, [x24, #:lo12:.LANCHOR5]
-	lsl	w2, w2, 1
-	bl	ftl_memset
-	ldrh	w0, [x20, #:lo12:.LANCHOR79]
-	mov	w1, 65535
-	cmp	w0, w1
-	bne	.L699
-.L707:
-	mov	w0, -1
-.L698:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 96
-	ret
-.L699:
-	add	x27, x20, :lo12:.LANCHOR79
-	mov	w1, 1
-	bl	FtlGetLastWrittenPage
-	sxth	w22, w0
-	add	w0, w0, 1
-	mov	w28, 61604
-	strh	w0, [x27, 2]
-	mov	w27, 19539
-	movk	w27, 0x4654, lsl 16
-.L701:
-	tbz	w22, #31, .L704
-	adrp	x1, .LANCHOR151
-	adrp	x0, .LC1
-	mov	w2, 1448
-	add	x1, x1, :lo12:.LANCHOR151
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L703:
-	adrp	x1, .LANCHOR23
-	ldrh	w0, [x24, #:lo12:.LANCHOR5]
-	ldrh	w1, [x1, #:lo12:.LANCHOR23]
-	add	x0, x0, 24
-	cmp	x1, x0, lsl 1
-	bcs	.L706
-	adrp	x1, .LANCHOR151
-	adrp	x0, .LC1
-	mov	w2, 1450
-	add	x1, x1, :lo12:.LANCHOR151
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L706:
-	add	x22, x19, :lo12:.LANCHOR148
-	adrp	x19, .LANCHOR39
-	add	x21, x19, :lo12:.LANCHOR39
-	mov	w2, 48
-	mov	x0, x21
-	ldr	x1, [x22, 8]
-	bl	ftl_memcpy
-	ldr	x0, [x25, #:lo12:.LANCHOR42]
-	ldrh	w2, [x24, #:lo12:.LANCHOR5]
-	ldr	x1, [x22, 8]
-	lsl	w2, w2, 1
-	add	x1, x1, 48
-	bl	ftl_memcpy
-	ldrh	w1, [x24, #:lo12:.LANCHOR5]
-	ldr	x0, [x22, 8]
-	lsr	w2, w1, 3
-	ubfiz	x1, x1, 1, 16
-	add	x1, x1, 48
-	add	w2, w2, 4
-	and	x1, x1, -4
-	add	x1, x0, x1
-	adrp	x0, .LANCHOR1
-	ldr	x0, [x0, #:lo12:.LANCHOR1]
-	bl	ftl_memcpy
-	ldr	w1, [x19, #:lo12:.LANCHOR39]
-	mov	w0, 19539
-	movk	w0, 0x4654, lsl 16
-	cmp	w1, w0
-	bne	.L707
-	add	x20, x20, :lo12:.LANCHOR79
-	adrp	x0, .LANCHOR10
-	ldrh	w1, [x21, 8]
-	ldrb	w2, [x21, 10]
-	ldrh	w0, [x0, #:lo12:.LANCHOR10]
-	strh	w1, [x20, 6]
-	cmp	w2, w0
-	bne	.L707
-	adrp	x0, .LANCHOR152
-	adrp	x2, .LANCHOR61
-	adrp	x3, .LANCHOR3
-	str	w1, [x0, #:lo12:.LANCHOR152]
-	adrp	x0, .LANCHOR19
-	ldrh	w3, [x3, #:lo12:.LANCHOR3]
-	ldrh	w0, [x0, #:lo12:.LANCHOR19]
-	mul	w0, w0, w1
-	str	w0, [x2, #:lo12:.LANCHOR61]
-	adrp	x2, .LANCHOR12
-	ldrh	w2, [x2, #:lo12:.LANCHOR12]
-	mul	w0, w2, w0
-	adrp	x2, .LANCHOR34
-	str	w0, [x2, #:lo12:.LANCHOR34]
-	adrp	x0, .LANCHOR7
-	ldr	w2, [x0, #:lo12:.LANCHOR7]
-	adrp	x0, .LANCHOR37+6
-	ldrh	w0, [x0, #:lo12:.LANCHOR37+6]
-	cmp	w1, w2
-	sub	w0, w2, w0
-	sub	w0, w0, w1
-	udiv	w0, w0, w3
-	adrp	x3, .LANCHOR78
-	strh	w0, [x3, #:lo12:.LANCHOR78]
-	bls	.L708
-	adrp	x1, .LANCHOR151
-	adrp	x0, .LC1
-	mov	w2, 1472
-	add	x1, x1, :lo12:.LANCHOR151
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L708:
-	add	x1, x19, :lo12:.LANCHOR39
-	adrp	x0, .LANCHOR51
-	add	x3, x0, :lo12:.LANCHOR51
-	adrp	x20, .LANCHOR80
-	ldrh	w2, [x1, 16]
-	ldrh	w6, [x1, 14]
-	strh	w6, [x0, #:lo12:.LANCHOR51]
-	lsr	w4, w2, 6
-	and	w2, w2, 63
-	strb	w2, [x3, 6]
-	ldrb	w2, [x1, 11]
-	strb	w2, [x3, 8]
-	add	x2, x20, :lo12:.LANCHOR80
-	strh	w4, [x3, 2]
-	mov	w3, -1
-	strh	w3, [x20, #:lo12:.LANCHOR80]
-	strh	wzr, [x2, 2]
-	strb	wzr, [x2, 6]
-	strb	wzr, [x2, 8]
-	adrp	x2, .LANCHOR52
-	ldrh	w3, [x1, 18]
-	add	x4, x2, :lo12:.LANCHOR52
-	strh	w3, [x2, #:lo12:.LANCHOR52]
-	mov	x21, x2
-	ldrh	w3, [x1, 20]
-	lsr	w5, w3, 6
-	and	w3, w3, 63
-	strb	w3, [x4, 6]
-	ldrb	w3, [x1, 12]
-	strh	w5, [x4, 2]
-	strb	w3, [x4, 8]
-	adrp	x4, .LANCHOR53
-	ldrh	w3, [x1, 22]
-	add	x5, x4, :lo12:.LANCHOR53
-	strh	w3, [x4, #:lo12:.LANCHOR53]
-	mov	x22, x4
-	ldrh	w3, [x1, 24]
-	lsr	w7, w3, 6
-	and	w3, w3, 63
-	strb	w3, [x5, 6]
-	ldrb	w3, [x1, 13]
-	strb	w3, [x5, 8]
-	adrp	x3, .LANCHOR67
-	strh	w7, [x5, 2]
-	ldr	w5, [x1, 32]
-	str	wzr, [x3, #:lo12:.LANCHOR67]
-	adrp	x3, .LANCHOR64
-	str	wzr, [x3, #:lo12:.LANCHOR64]
-	adrp	x3, .LANCHOR62
-	str	wzr, [x3, #:lo12:.LANCHOR62]
-	adrp	x3, .LANCHOR66
-	str	wzr, [x3, #:lo12:.LANCHOR66]
-	adrp	x3, .LANCHOR72
-	str	w5, [x3, #:lo12:.LANCHOR72]
-	adrp	x3, .LANCHOR73
-	str	wzr, [x3, #:lo12:.LANCHOR73]
-	adrp	x3, .LANCHOR76
-	str	wzr, [x3, #:lo12:.LANCHOR76]
-	adrp	x3, .LANCHOR65
-	str	wzr, [x3, #:lo12:.LANCHOR65]
-	ldr	w3, [x1, 40]
-	adrp	x1, .LANCHOR70
-	ldr	w5, [x1, #:lo12:.LANCHOR70]
-	cmp	w3, w5
-	bls	.L709
-	str	w3, [x1, #:lo12:.LANCHOR70]
-.L709:
-	add	x19, x19, :lo12:.LANCHOR39
-	adrp	x1, .LANCHOR71
-	ldr	w3, [x1, #:lo12:.LANCHOR71]
-	ldr	w2, [x19, 36]
-	cmp	w2, w3
-	bls	.L710
-	str	w2, [x1, #:lo12:.LANCHOR71]
-.L710:
-	mov	w1, 65535
-	cmp	w6, w1
-	beq	.L711
-	add	x0, x0, :lo12:.LANCHOR51
-	bl	make_superblock
-.L711:
-	ldrh	w2, [x21, #:lo12:.LANCHOR52]
-	mov	w1, 65535
-	add	x0, x21, :lo12:.LANCHOR52
-	cmp	w2, w1
-	beq	.L712
-	bl	make_superblock
-.L712:
-	ldrh	w2, [x22, #:lo12:.LANCHOR53]
-	mov	w1, 65535
-	add	x0, x22, :lo12:.LANCHOR53
-	cmp	w2, w1
-	beq	.L713
-	bl	make_superblock
-.L713:
-	ldrh	w2, [x20, #:lo12:.LANCHOR80]
-	mov	w1, 65535
-	add	x0, x20, :lo12:.LANCHOR80
-	cmp	w2, w1
-	beq	.L714
-	bl	make_superblock
-.L714:
-	mov	w0, 0
-	b	.L698
-.L704:
-	ldrh	w0, [x20, #:lo12:.LANCHOR79]
-	mov	w2, 1
-	mov	w1, w2
-	orr	w0, w22, w0, lsl 10
-	str	w0, [x21, 4]
-	ldr	x0, [x23, #:lo12:.LANCHOR115]
-	str	x0, [x21, 8]
-	mov	x0, x21
-	bl	FlashReadPages
-	ldr	w0, [x21]
-	cmn	w0, #1
-	beq	.L702
-	ldr	x0, [x23, #:lo12:.LANCHOR115]
-	ldr	w0, [x0]
-	cmp	w0, w27
-	bne	.L702
-	ldr	x0, [x26, #:lo12:.LANCHOR123]
-	ldrh	w0, [x0]
-	cmp	w0, w28
-	beq	.L703
-.L702:
-	sub	w22, w22, #1
-	sxth	w22, w22
-	b	.L701
-	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
 	.section	.text.FlashProgPages,"ax",@progbits
 	.align	2
 	.global	FlashProgPages
@@ -5429,34 +4149,34 @@ FlashProgPages:
 	stp	x21, x22, [sp, 32]
 	adrp	x21, .LANCHOR0
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR153
+	adrp	x22, .LANCHOR142
 	stp	w3, w2, [x29, 104]
 	add	x2, x21, :lo12:.LANCHOR0
 	stp	x19, x20, [sp, 16]
-	adrp	x24, .LANCHOR105
+	adrp	x24, .LANCHOR78
 	stp	x27, x28, [sp, 80]
 	mov	x19, x0
 	ldrh	w23, [x2, 12]
 	add	x20, x0, x1
 	stp	x25, x26, [sp, 64]
-	add	x22, x22, :lo12:.LANCHOR153
+	add	x22, x22, :lo12:.LANCHOR142
 	mov	x25, x0
-	add	x28, x24, :lo12:.LANCHOR105
+	add	x28, x24, :lo12:.LANCHOR78
 	lsl	w27, w23, 3
-.L721:
+.L542:
 	cmp	x25, x20
-	bne	.L734
+	bne	.L555
 	ldr	w0, [x29, 104]
-	cbz	w0, .L747
-	adrp	x21, .LANCHOR120
-	adrp	x22, .LANCHOR122
+	cbz	w0, .L568
+	adrp	x21, .LANCHOR111
+	adrp	x22, .LANCHOR113
 	mov	x23, x21
 	mov	x24, x22
-.L736:
+.L557:
 	cmp	x19, x20
-	beq	.L747
-	ldr	x1, [x21, #:lo12:.LANCHOR120]
-	ldr	x0, [x22, #:lo12:.LANCHOR122]
+	beq	.L568
+	ldr	x1, [x21, #:lo12:.LANCHOR111]
+	ldr	x0, [x22, #:lo12:.LANCHOR113]
 	str	wzr, [x1]
 	str	wzr, [x0]
 	stp	x1, x0, [x29, 136]
@@ -5468,78 +4188,78 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	w26, [x29, 128]
 	cmn	w26, #1
-	bne	.L737
+	bne	.L558
 	ldr	w1, [x19, 4]
-	adrp	x0, .LC85
-	add	x0, x0, :lo12:.LC85
+	adrp	x0, .LC11
+	add	x0, x0, :lo12:.LC11
 	bl	printf
 	str	w26, [x19]
-.L737:
+.L558:
 	ldr	x0, [x19, 16]
-	cbz	x0, .L738
+	cbz	x0, .L559
 	ldr	w2, [x0]
-	ldr	x0, [x24, #:lo12:.LANCHOR122]
+	ldr	x0, [x24, #:lo12:.LANCHOR113]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L738
+	beq	.L559
 	ldr	w1, [x19, 4]
-	adrp	x0, .LC86
-	add	x0, x0, :lo12:.LC86
+	adrp	x0, .LC12
+	add	x0, x0, :lo12:.LC12
 	bl	printf
 	mov	w0, -1
 	str	w0, [x19]
-.L738:
+.L559:
 	ldr	x0, [x19, 8]
-	cbz	x0, .L739
+	cbz	x0, .L560
 	ldr	w2, [x0]
-	ldr	x0, [x23, #:lo12:.LANCHOR120]
+	ldr	x0, [x23, #:lo12:.LANCHOR111]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L739
+	beq	.L560
 	ldr	w1, [x19, 4]
-	adrp	x0, .LC87
-	add	x0, x0, :lo12:.LC87
+	adrp	x0, .LC13
+	add	x0, x0, :lo12:.LC13
 	bl	printf
 	mov	w0, -1
 	str	w0, [x19]
-.L739:
+.L560:
 	add	x19, x19, 32
-	b	.L736
-.L734:
+	b	.L557
+.L555:
 	ldr	x0, [x25, 8]
-	cbz	x0, .L722
+	cbz	x0, .L543
 	ldr	x0, [x25, 16]
-	cbnz	x0, .L723
-.L722:
+	cbnz	x0, .L544
+.L543:
 	adrp	x0, .LC1
 	mov	w2, 134
 	mov	x1, x22
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L723:
+.L544:
 	ldr	w0, [x25, 4]
 	add	x2, x29, 120
 	add	x1, x29, 124
 	bl	l2p_addr_tran.isra.0
 	ldr	w0, [x29, 120]
 	cmp	w0, 3
-	bls	.L724
-.L760:
+	bls	.L545
+.L581:
 	mov	w0, -1
 	str	w0, [x25]
-	b	.L725
-.L724:
-	cbnz	w0, .L726
+	b	.L546
+.L545:
+	cbnz	w0, .L547
 	ldr	w0, [x29, 124]
 	cmp	w27, w0
-	bls	.L726
-	adrp	x21, .LANCHOR153
-	adrp	x22, .LC79
+	bls	.L547
+	adrp	x21, .LANCHOR142
+	adrp	x22, .LC6
 	mov	w23, -1
-	add	x21, x21, :lo12:.LANCHOR153
-	add	x22, x22, :lo12:.LC79
-	b	.L758
-.L728:
+	add	x21, x21, :lo12:.LANCHOR142
+	add	x22, x22, :lo12:.LC6
+	b	.L579
+.L549:
 	ldr	w2, [x19, 4]
 	mov	x1, x21
 	str	w23, [x19]
@@ -5549,19 +4269,19 @@ FlashProgPages:
 	ldr	x1, [x19, -24]
 	mov	w3, 16
 	mov	w2, 4
-	adrp	x0, .LC80
-	add	x0, x0, :lo12:.LC80
+	adrp	x0, .LC7
+	add	x0, x0, :lo12:.LC7
 	bl	rknand_print_hex
 	ldr	x1, [x19, -16]
 	mov	w3, 4
-	adrp	x0, .LC81
+	adrp	x0, .LC8
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC81
+	add	x0, x0, :lo12:.LC8
 	bl	rknand_print_hex
-.L758:
+.L579:
 	cmp	x19, x20
-	bne	.L728
-.L747:
+	bne	.L549
+.L568:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -5570,34 +4290,34 @@ FlashProgPages:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L726:
+.L547:
 	ldr	x1, [x25, 8]
 	tst	x1, 63
-	beq	.L741
-	adrp	x0, .LANCHOR120
-	ldr	x26, [x0, #:lo12:.LANCHOR120]
+	beq	.L562
+	adrp	x0, .LANCHOR111
+	ldr	x26, [x0, #:lo12:.LANCHOR111]
 	cmp	x1, x26
-	beq	.L729
+	beq	.L550
 	adrp	x0, .LANCHOR12
 	ldrh	w2, [x0, #:lo12:.LANCHOR12]
 	mov	x0, x26
 	lsl	w2, w2, 9
 	bl	ftl_memcpy
-.L729:
-	add	x0, x24, :lo12:.LANCHOR105
+.L550:
+	add	x0, x24, :lo12:.LANCHOR78
 	ldr	w1, [x29, 124]
 	ldr	x3, [x25, 16]
 	mov	x2, x26
 	ldr	x6, [x0, 16]
 	ldrb	w0, [x29, 120]
 	blr	x6
-	cbnz	w0, .L730
+	cbnz	w0, .L551
 	str	wzr, [x25]
-.L731:
+.L552:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
-	bne	.L725
+	bne	.L546
 	ldrb	w0, [x29, 120]
 	add	x2, x26, 2048
 	ldr	x6, [x28, 16]
@@ -5606,17 +4326,17 @@ FlashProgPages:
 	add	w1, w23, w1
 	add	x3, x3, 8
 	blr	x6
-	cbnz	w0, .L760
-.L725:
+	cbnz	w0, .L581
+.L546:
 	add	x25, x25, 32
-	b	.L721
-.L741:
+	b	.L542
+.L562:
 	mov	x26, x1
-	b	.L729
-.L730:
+	b	.L550
+.L551:
 	mov	w0, -1
 	str	w0, [x25]
-	b	.L731
+	b	.L552
 	.size	FlashProgPages, .-FlashProgPages
 	.section	.text.FtlLowFormatEraseBlock,"ax",@progbits
 	.align	2
@@ -5630,77 +4350,77 @@ FtlLowFormatEraseBlock:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	w23, w0, 65535
-	adrp	x0, .LANCHOR111
+	adrp	x0, .LANCHOR99
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	adrp	x20, .LANCHOR3
 	stp	x25, x26, [sp, 64]
 	and	w22, w1, 255
-	str	w23, [x0, #:lo12:.LANCHOR111]
-	adrp	x21, .LANCHOR106
-	adrp	x0, .LANCHOR119
-	adrp	x1, .LANCHOR124
+	str	w23, [x0, #:lo12:.LANCHOR99]
+	adrp	x21, .LANCHOR79
+	adrp	x0, .LANCHOR110
+	adrp	x1, .LANCHOR115
 	adrp	x25, .LANCHOR24
 	ldrh	w8, [x20, #:lo12:.LANCHOR3]
-	ldr	x6, [x21, #:lo12:.LANCHOR106]
+	ldr	x6, [x21, #:lo12:.LANCHOR79]
 	mov	w24, 0
-	ldr	x10, [x0, #:lo12:.LANCHOR119]
+	ldr	x10, [x0, #:lo12:.LANCHOR110]
 	mov	w19, 0
-	ldr	x11, [x1, #:lo12:.LANCHOR124]
+	ldr	x11, [x1, #:lo12:.LANCHOR115]
 	ldrh	w12, [x25, #:lo12:.LANCHOR24]
 	stp	x27, x28, [sp, 80]
 	str	x0, [x29, 112]
-.L762:
+.L583:
 	cmp	w8, w5, uxth
-	bhi	.L766
-	cbz	w24, .L761
+	bhi	.L587
+	cbz	w24, .L582
 	mov	w2, w24
 	ubfiz	x24, x24, 5, 16
 	mov	x26, 0
 	mov	w1, 0
 	mov	x0, x6
 	bl	FlashEraseBlocks
-.L770:
-	ldr	x0, [x21, #:lo12:.LANCHOR106]
+.L591:
+	ldr	x0, [x21, #:lo12:.LANCHOR79]
 	add	x1, x0, x26
 	ldr	w0, [x0, x26]
 	cmn	w0, #1
-	bne	.L769
+	bne	.L590
 	ldr	w0, [x1, 4]
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.L769:
+.L590:
 	add	x26, x26, 32
 	cmp	x26, x24
-	bne	.L770
-	cbz	w22, .L783
+	bne	.L591
+	cbz	w22, .L604
 	adrp	x0, .LANCHOR20
 	mov	w26, 1
 	ldrh	w28, [x0, #:lo12:.LANCHOR20]
-.L771:
+.L592:
 	add	x0, x20, :lo12:.LANCHOR3
 	adrp	x27, .LANCHOR13
 	str	x0, [x29, 120]
 	mov	w24, 0
 	add	x0, x27, :lo12:.LANCHOR13
 	str	x0, [x29, 104]
-.L779:
+.L600:
 	ldr	x0, [x29, 120]
 	mov	x5, 0
-	ldr	x6, [x21, #:lo12:.LANCHOR106]
+	ldr	x6, [x21, #:lo12:.LANCHOR79]
 	mov	w20, 0
 	ldrh	w11, [x25, #:lo12:.LANCHOR24]
 	ldrh	w7, [x0]
-	adrp	x0, .LANCHOR118
-	ldr	x8, [x0, #:lo12:.LANCHOR118]
+	adrp	x0, .LANCHOR109
+	ldr	x8, [x0, #:lo12:.LANCHOR109]
 	ldr	x0, [x29, 112]
-	ldr	x10, [x0, #:lo12:.LANCHOR119]
-.L772:
+	ldr	x10, [x0, #:lo12:.LANCHOR110]
+.L593:
 	cmp	w7, w5, uxth
-	bhi	.L775
-	cbz	w20, .L761
+	bhi	.L596
+	cbz	w20, .L582
 	mov	w1, w20
 	mov	w3, 1
 	mov	w2, w26
@@ -5708,11 +4428,11 @@ FtlLowFormatEraseBlock:
 	bl	FlashProgPages
 	mov	x27, 0
 	ubfiz	x1, x20, 5, 16
-.L778:
-	ldr	x0, [x21, #:lo12:.LANCHOR106]
+.L599:
+	ldr	x0, [x21, #:lo12:.LANCHOR79]
 	add	x3, x0, x27
 	ldr	w0, [x0, x27]
-	cbz	w0, .L777
+	cbz	w0, .L598
 	ldr	w0, [x3, 4]
 	add	w19, w19, 1
 	str	x1, [x29, 96]
@@ -5720,36 +4440,36 @@ FtlLowFormatEraseBlock:
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
 	ldr	x1, [x29, 96]
-.L777:
+.L598:
 	add	x27, x27, 32
 	cmp	x1, x27
-	bne	.L778
+	bne	.L599
 	add	w24, w24, 1
 	cmp	w28, w24, uxth
-	bhi	.L779
+	bhi	.L600
 	mov	x24, 0
-.L781:
-	cbz	w22, .L780
-	ldr	x0, [x21, #:lo12:.LANCHOR106]
+.L602:
+	cbz	w22, .L601
+	ldr	x0, [x21, #:lo12:.LANCHOR79]
 	add	x1, x0, x24
 	ldr	w0, [x0, x24]
-	cbnz	w0, .L780
+	cbnz	w0, .L601
 	ldr	w0, [x1, 4]
 	mov	w1, 1
 	lsr	w0, w0, 10
 	bl	FtlFreeSysBlkQueueIn
-.L780:
+.L601:
 	add	x24, x24, 32
 	cmp	x24, x27
-	bne	.L781
+	bne	.L602
 	cmp	w23, 63
 	ccmp	w22, 0, 0, hi
-	beq	.L761
-	ldr	x0, [x21, #:lo12:.LANCHOR106]
+	beq	.L582
+	ldr	x0, [x21, #:lo12:.LANCHOR79]
 	mov	w2, w20
 	mov	w1, w26
 	bl	FlashEraseBlocks
-.L761:
+.L582:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -5758,7 +4478,7 @@ FtlLowFormatEraseBlock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L766:
+.L587:
 	lsl	x0, x5, 5
 	mov	w1, w23
 	str	wzr, [x6, x0]
@@ -5766,13 +4486,13 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	and	w13, w0, 65535
 	mov	w14, w13
-	cbz	w22, .L763
+	cbz	w22, .L584
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L764
-.L763:
+	cbnz	w0, .L585
+.L584:
 	mov	w0, w14
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L765
+	cbnz	w0, .L586
 	ubfiz	x0, x24, 5, 16
 	mul	w1, w24, w12
 	add	x0, x6, x0
@@ -5783,18 +4503,18 @@ FtlLowFormatEraseBlock:
 	add	x1, x11, x1, sxtw 2
 	str	w13, [x0, 4]
 	stp	x10, x1, [x0, 8]
-.L764:
+.L585:
 	add	x5, x5, 1
-	b	.L762
-.L765:
+	b	.L583
+.L586:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L764
-.L783:
+	b	.L585
+.L604:
 	mov	w26, 0
 	mov	w28, 2
-	b	.L771
-.L775:
+	b	.L592
+.L596:
 	lsl	x0, x5, 5
 	mov	w1, w23
 	str	wzr, [x6, x0]
@@ -5803,13 +4523,13 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	and	w12, w0, 65535
 	mov	w13, w12
-	cbz	w22, .L773
+	cbz	w22, .L594
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L774
-.L773:
+	cbnz	w0, .L595
+.L594:
 	mov	w0, w13
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L774
+	cbnz	w0, .L595
 	ubfiz	x0, x20, 5, 16
 	mul	w1, w20, w11
 	add	x0, x6, x0
@@ -5820,302 +4540,214 @@ FtlLowFormatEraseBlock:
 	add	x1, x10, x1, sxtw 2
 	str	w12, [x0, 4]
 	stp	x8, x1, [x0, 8]
-.L774:
+.L595:
 	add	x5, x5, 1
-	b	.L772
+	b	.L593
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
-	.section	.text.Ftl_write_map_blk_to_last_page,"ax",@progbits
+	.section	.text.FlashTestBlk,"ax",@progbits
 	.align	2
-	.global	Ftl_write_map_blk_to_last_page
-	.type	Ftl_write_map_blk_to_last_page, %function
-Ftl_write_map_blk_to_last_page:
-	stp	x29, x30, [sp, -64]!
-	mov	w1, 65535
+	.global	FlashTestBlk
+	.type	FlashTestBlk, %function
+FlashTestBlk:
+	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	mov	x19, x0
-	ldr	x20, [x0, 16]
-	stp	x21, x22, [sp, 32]
-	ldrh	w0, [x0]
-	str	x23, [sp, 48]
-	cmp	w0, w1
-	bne	.L805
-	ldrh	w0, [x19, 8]
-	cbz	w0, .L806
-	adrp	x1, .LANCHOR154
-	adrp	x0, .LC1
-	mov	w2, 641
-	add	x1, x1, :lo12:.LANCHOR154
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L806:
-	ldrh	w0, [x19, 8]
-	add	w0, w0, 1
-	strh	w0, [x19, 8]
-	bl	FtlFreeSysBlkQueueOut
-	strh	w0, [x20]
-	ldr	w0, [x19, 48]
-	strh	wzr, [x19, 2]
-	add	w0, w0, 1
-	strh	wzr, [x19]
-	str	w0, [x19, 48]
-.L807:
-	mov	w0, 0
-	ldr	x23, [sp, 48]
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 64
-	ret
-.L805:
-	ubfiz	x0, x0, 1, 16
-	adrp	x1, .LANCHOR123
-	adrp	x23, .LANCHOR115
-	ldr	x22, [x19, 40]
-	ldr	x1, [x1, #:lo12:.LANCHOR123]
-	ldrh	w21, [x20, x0]
-	adrp	x20, .LANCHOR148
-	ldrh	w0, [x19, 2]
-	add	x2, x20, :lo12:.LANCHOR148
-	orr	w0, w0, w21, lsl 10
-	str	w0, [x2, 4]
-	ldr	x0, [x23, #:lo12:.LANCHOR115]
-	str	x1, [x2, 16]
-	str	x0, [x2, 8]
-	ldr	w2, [x19, 48]
-	str	w2, [x1, 4]
-	mov	w2, -1291
-	strh	w2, [x1, 8]
-	ldrh	w2, [x19, 4]
-	strh	w2, [x1]
-	strh	w21, [x1, 2]
-	adrp	x1, .LANCHOR20
-	ldrh	w2, [x1, #:lo12:.LANCHOR20]
-	mov	w1, 255
-	lsl	w2, w2, 3
+	and	w19, w0, 65535
+	cmp	w19, 11
+	bls	.L628
+	adrp	x20, .LANCHOR112
+	mov	w2, 32
+	mov	w1, 165
+	lsl	w19, w19, 10
+	ldr	x0, [x20, #:lo12:.LANCHOR112]
+	str	x0, [x29, 40]
+	add	x0, x29, 64
+	str	x0, [x29, 48]
 	bl	ftl_memset
-	ldrh	w4, [x19, 6]
-	mov	x1, 0
-	ldr	x3, [x23, #:lo12:.LANCHOR115]
-	mov	w2, 0
-.L808:
-	cmp	w4, w1, uxth
-	bhi	.L810
+	ldr	x0, [x20, #:lo12:.LANCHOR112]
+	mov	w2, 8
+	mov	w1, 90
+	bl	ftl_memset
+	str	w19, [x29, 36]
 	mov	w2, 1
-	mov	w3, 0
+	add	x0, x29, 32
 	mov	w1, w2
-	add	x0, x20, :lo12:.LANCHOR148
-	bl	FlashProgPages
-	ldrh	w0, [x19, 2]
-	add	w0, w0, 1
-	strh	w0, [x19, 2]
-	mov	x0, x19
-	bl	ftl_map_blk_gc
-	b	.L807
-.L810:
-	ldr	w0, [x22, x1, lsl 2]
-	cmp	w21, w0, lsr 10
-	bne	.L809
-	add	w2, w2, 1
-	and	w2, w2, 65535
-	ubfiz	x0, x2, 1, 16
-	str	w1, [x3, x0, lsl 2]
-	add	x0, x0, 1
-	ldr	w5, [x22, x1, lsl 2]
-	str	w5, [x3, x0, lsl 2]
-.L809:
-	add	x1, x1, 1
-	b	.L808
-	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
-	.section	.text.FtlMapWritePage,"ax",@progbits
-	.align	2
-	.global	FtlMapWritePage
-	.type	FtlMapWritePage, %function
-FtlMapWritePage:
-	stp	x29, x30, [sp, -112]!
-	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR66
-	stp	x25, x26, [sp, 64]
-	adrp	x24, .LANCHOR155
-	stp	x27, x28, [sp, 80]
-	adrp	x26, .LANCHOR20
-	stp	x19, x20, [sp, 16]
-	mov	w25, w1
-	mov	x19, x0
-	mov	x27, x2
-	add	x23, x23, :lo12:.LANCHOR66
-	add	x24, x24, :lo12:.LANCHOR155
-	add	x28, x26, :lo12:.LANCHOR20
-	stp	x21, x22, [sp, 32]
-	mov	w22, 0
-.L816:
-	ldr	w0, [x23]
-	ldrh	w1, [x19, 2]
-	add	w0, w0, 1
-	str	w0, [x23]
-	ldrh	w0, [x26, #:lo12:.LANCHOR20]
-	sub	w0, w0, #1
-	cmp	w1, w0
-	bge	.L817
-	ldrh	w1, [x19]
-	mov	w0, 65535
-	cmp	w1, w0
-	bne	.L818
-.L817:
-	mov	x0, x19
-	bl	Ftl_write_map_blk_to_last_page
-.L818:
-	ldrh	w1, [x19]
-	ldr	x0, [x19, 16]
-	ldrh	w0, [x0, x1, lsl 1]
-	cbnz	w0, .L819
-	adrp	x0, .LC1
-	mov	w2, 699
-	mov	x1, x24
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L819:
-	ldrh	w1, [x19]
-	ldrh	w0, [x19, 10]
-	cmp	w1, w0
-	bcc	.L820
-	adrp	x0, .LC1
-	mov	w2, 700
-	mov	x1, x24
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L820:
-	ldrh	w1, [x19]
-	adrp	x21, .LANCHOR148
-	ldr	x0, [x19, 16]
-	add	x20, x21, :lo12:.LANCHOR148
-	mov	w2, 16
-	ldrh	w3, [x0, x1, lsl 1]
-	mov	w1, 0
-	ldrh	w0, [x19, 2]
-	str	w3, [x29, 108]
-	str	x27, [x20, 8]
-	orr	w0, w0, w3, lsl 10
-	str	w0, [x20, 4]
-	adrp	x0, .LANCHOR123
-	ldr	x0, [x0, #:lo12:.LANCHOR123]
-	str	x0, [x20, 16]
-	bl	ftl_memset
-	ldr	x0, [x20, 16]
-	ldr	w1, [x19, 48]
-	ldr	w3, [x29, 108]
-	str	w1, [x0, 4]
-	ldrh	w1, [x19, 4]
-	strh	w1, [x0]
-	strh	w3, [x0, 2]
+	bl	FlashEraseBlocks
 	mov	w3, 1
-	strh	w25, [x0, 8]
+	add	x0, x29, 32
+	mov	w2, w3
 	mov	w1, w3
+	bl	FlashProgPages
+	ldr	w0, [x29, 32]
+	cbnz	w0, .L629
+	add	w0, w19, 1
+	mov	w3, 1
+	str	w0, [x29, 36]
 	mov	w2, w3
-	mov	x0, x20
+	mov	w1, w3
+	add	x0, x29, 32
 	bl	FlashProgPages
-	ldrh	w0, [x19, 2]
-	ldr	w1, [x21, #:lo12:.LANCHOR148]
-	add	w0, w0, 1
-	and	w0, w0, 65535
-	strh	w0, [x19, 2]
-	cmn	w1, #1
-	bne	.L821
-	ldr	w1, [x20, 4]
-	adrp	x0, .LC88
-	add	x0, x0, :lo12:.LC88
-	add	w22, w22, 1
-	and	w22, w22, 65535
-	bl	printf
-	ldrh	w0, [x19, 2]
-	cmp	w0, 2
-	bhi	.L822
-	ldrh	w0, [x28]
-	sub	w0, w0, #1
-	strh	w0, [x19, 2]
-.L822:
-	cmp	w22, 3
-	bls	.L823
-	add	x21, x21, :lo12:.LANCHOR148
-	adrp	x0, .LC89
-	mov	w2, w22
-	add	x0, x0, :lo12:.LC89
-	ldr	w1, [x21, 4]
-	bl	printf
-.L824:
-	b	.L824
-.L823:
-	ldr	w0, [x19, 52]
-	cbz	w0, .L816
-.L838:
-	b	.L838
-.L821:
-	cmp	w0, 1
-	beq	.L827
-	cmp	w1, 256
-	beq	.L827
-	ldr	w0, [x19, 56]
-	cbz	w0, .L828
-.L827:
-	str	wzr, [x19, 56]
-	b	.L816
-.L828:
-	ldr	x0, [x19, 40]
-	ldr	w1, [x20, 4]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x27, x28, [sp, 80]
-	str	w1, [x0, w25, uxtw 2]
+	ldr	w0, [x29, 32]
+	cmp	w0, 0
+	csetm	w20, ne
+.L627:
+	mov	w2, 1
+	mov	w1, 0
+	add	x0, x29, 32
+	str	w19, [x29, 36]
+	bl	FlashEraseBlocks
+.L625:
+	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
-	mov	w0, 0
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 112
+	ldp	x29, x30, [sp], 128
 	ret
-	.size	FtlMapWritePage, .-FtlMapWritePage
-	.section	.text.load_l2p_region,"ax",@progbits
+.L629:
+	mov	w20, -1
+	b	.L627
+.L628:
+	mov	w20, 0
+	b	.L625
+	.size	FlashTestBlk, .-FlashTestBlk
+	.section	.text.FtlBbmTblFlush,"ax",@progbits
 	.align	2
-	.global	load_l2p_region
-	.type	load_l2p_region, %function
-load_l2p_region:
+	.global	FtlBbmTblFlush
+	.type	FtlBbmTblFlush, %function
+FtlBbmTblFlush:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR32
+	adrp	x23, .LANCHOR114
 	stp	x19, x20, [sp, 16]
-	and	w20, w0, 65535
+	adrp	x20, .LANCHOR138
 	stp	x21, x22, [sp, 32]
-	and	x19, x1, 65535
-	ldrh	w0, [x24, #:lo12:.LANCHOR32]
+	add	x19, x20, :lo12:.LANCHOR138
+	adrp	x22, .LANCHOR106
+	ldr	x1, [x23, #:lo12:.LANCHOR114]
 	stp	x25, x26, [sp, 64]
+	adrp	x21, .LANCHOR37
 	str	x27, [sp, 80]
-	cmp	w0, w20
-	bcs	.L841
-	adrp	x1, .LANCHOR156
-	adrp	x0, .LC1
-	mov	w2, 485
-	add	x1, x1, :lo12:.LANCHOR156
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L841:
-	adrp	x27, .LANCHOR134
-	ubfiz	x0, x20, 2, 16
-	adrp	x22, .LANCHOR55
-	ldr	x1, [x27, #:lo12:.LANCHOR134]
-	ldr	w23, [x1, x0]
-	cbnz	w23, .L842
-	ldr	x0, [x22, #:lo12:.LANCHOR55]
-	lsl	x19, x19, 4
+	add	x25, x21, :lo12:.LANCHOR37
+	ldr	x0, [x22, #:lo12:.LANCHOR106]
+	adrp	x26, .LANCHOR10
+	stp	x0, x1, [x19, 8]
 	adrp	x1, .LANCHOR23
-	add	x0, x0, x19
+	adrp	x27, .LANCHOR127
+	add	x25, x25, 32
 	ldrh	w2, [x1, #:lo12:.LANCHOR23]
+	mov	w24, 0
+	add	x26, x26, :lo12:.LANCHOR10
+	add	x27, x27, :lo12:.LANCHOR127
+	mov	w1, 0
+	bl	ftl_memset
+.L632:
+	ldrh	w0, [x26]
+	cmp	w24, w0
+	blt	.L633
+	add	x20, x20, :lo12:.LANCHOR138
+	add	x19, x21, :lo12:.LANCHOR37
+	mov	w2, 16
 	mov	w1, 255
-	ldr	x0, [x0, 8]
+	adrp	x24, .LC14
+	adrp	x26, .LANCHOR20
+	ldr	x27, [x20, 16]
+	add	x24, x24, :lo12:.LC14
+	add	x26, x26, :lo12:.LANCHOR20
+	mov	w25, 0
+	mov	x0, x27
 	bl	ftl_memset
-	ldr	x0, [x22, #:lo12:.LANCHOR55]
-	add	x1, x0, x19
-	strh	w20, [x0, x19]
-	str	wzr, [x1, 4]
-.L843:
+	mov	w0, -3887
+	strh	w0, [x27]
+	ldr	w0, [x19, 8]
+	str	w0, [x27, 4]
+	ldrh	w0, [x21, #:lo12:.LANCHOR37]
+	mov	w21, 0
+	strh	w0, [x27, 2]
+	ldrh	w0, [x19, 4]
+	strh	w0, [x27, 8]
+	ldrh	w0, [x19, 6]
+	strh	w0, [x27, 10]
+	adrp	x0, .LANCHOR2
+	ldr	w0, [x0, #:lo12:.LANCHOR2]
+	strh	w0, [x27, 12]
+.L634:
+	ldrh	w1, [x19]
+	ldrh	w4, [x27, 10]
+	ldrh	w2, [x19, 2]
+	ldrh	w3, [x19, 4]
+	ldr	x0, [x22, #:lo12:.LANCHOR106]
+	str	x0, [x20, 8]
+	ldr	x0, [x23, #:lo12:.LANCHOR114]
+	str	x0, [x20, 16]
+	orr	w0, w2, w1, lsl 10
+	str	wzr, [x20]
+	str	w0, [x20, 4]
+	mov	x0, x24
+	bl	printf
+	ldrh	w0, [x26]
+	ldrh	w1, [x19, 2]
+	sub	w0, w0, #1
+	cmp	w1, w0
+	blt	.L635
+	ldr	w0, [x19, 8]
+	mov	w2, 1
+	ldrh	w1, [x19, 4]
+	add	w0, w0, 1
+	str	w0, [x19, 8]
+	str	w0, [x27, 4]
+	ldrh	w0, [x19]
+	strh	w0, [x27, 8]
+	strh	w0, [x19, 4]
+	adrp	x0, .LANCHOR79
+	strh	w1, [x19]
+	lsl	w1, w1, 10
+	ldr	x0, [x0, #:lo12:.LANCHOR79]
+	str	w1, [x20, 4]
+	strh	wzr, [x19, 2]
+	str	w1, [x0, 4]
+	mov	w1, w2
+	bl	FlashEraseBlocks
+.L635:
+	mov	w3, 1
+	mov	x0, x20
+	mov	w2, w3
+	mov	w1, w3
+	bl	FlashProgPages
+	ldrh	w0, [x19, 2]
+	add	w0, w0, 1
+	strh	w0, [x19, 2]
+	ldr	w0, [x20]
+	cmn	w0, #1
+	bne	.L636
+	ldr	w1, [x20, 4]
+	add	w21, w21, 1
+	adrp	x0, .LC15
+	and	w21, w21, 65535
+	add	x0, x0, :lo12:.LC15
+	bl	printf
+	cmp	w21, 3
+	bls	.L634
+	ldr	w1, [x20, 4]
+	adrp	x0, .LC16
+	mov	w2, w21
+	add	x0, x0, :lo12:.LC16
+	bl	printf
+.L638:
+	b	.L638
+.L633:
+	ldrh	w2, [x27]
+	ldr	x1, [x25], 8
+	ldr	x0, [x19, 8]
+	mul	w3, w24, w2
+	lsl	w2, w2, 2
+	add	w24, w24, 1
+	add	x0, x0, x3, sxtw 2
+	bl	ftl_memcpy
+	b	.L632
+.L639:
+	mov	w25, 1
+	b	.L634
+.L636:
+	cbz	w25, .L639
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -6124,1448 +4756,1183 @@ load_l2p_region:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L842:
-	ldr	x0, [x22, #:lo12:.LANCHOR55]
-	lsl	x19, x19, 4
-	adrp	x26, .LANCHOR148
-	add	x21, x26, :lo12:.LANCHOR148
-	add	x0, x0, x19
-	mov	w2, 1
-	mov	w1, w2
-	str	w23, [x21, 4]
-	ldr	x0, [x0, 8]
-	str	x0, [x21, 8]
-	adrp	x0, .LANCHOR123
-	ldr	x0, [x0, #:lo12:.LANCHOR123]
-	str	x0, [x21, 16]
-	mov	x0, x21
-	bl	FlashReadPages
-	ldr	x25, [x21, 16]
-	ldrh	w0, [x25, 8]
-	cmp	w0, w20
-	beq	.L844
-	mov	w2, w23
-	mov	w1, w20
-	adrp	x0, .LC90
-	add	x0, x0, :lo12:.LC90
-	bl	printf
-	ldr	x1, [x21, 16]
-	mov	w3, 4
-	adrp	x0, .LC91
-	mov	w2, w3
-	add	x0, x0, :lo12:.LC91
-	bl	rknand_print_hex
-	ldrh	w3, [x24, #:lo12:.LANCHOR32]
-	adrp	x0, .LC92
-	ldr	x1, [x27, #:lo12:.LANCHOR134]
-	mov	w2, 4
-	add	x0, x0, :lo12:.LC92
-	bl	rknand_print_hex
-.L845:
-	ldrh	w0, [x25, 8]
-	cmp	w0, w20
-	beq	.L846
-	adrp	x1, .LANCHOR156
-	adrp	x0, .LC1
-	mov	w2, 508
-	add	x1, x1, :lo12:.LANCHOR156
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L846:
-	ldr	x0, [x22, #:lo12:.LANCHOR55]
-	add	x1, x0, x19
-	str	wzr, [x1, 4]
-	strh	w20, [x0, x19]
-	b	.L843
-.L844:
-	ldr	w0, [x26, #:lo12:.LANCHOR148]
-	cmp	w0, 256
-	bne	.L845
-	mov	w2, w23
-	mov	w1, w20
-	adrp	x0, .LC93
-	add	x0, x0, :lo12:.LC93
-	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR55]
-	mov	w1, w20
-	add	x0, x0, x19
-	ldr	x2, [x0, 8]
-	adrp	x0, .LANCHOR140
-	add	x0, x0, :lo12:.LANCHOR140
-	bl	FtlMapWritePage
-	b	.L845
-	.size	load_l2p_region, .-load_l2p_region
-	.section	.text.ftl_map_blk_gc,"ax",@progbits
+	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
+	.section	.text.allocate_data_superblock,"ax",@progbits
 	.align	2
-	.global	ftl_map_blk_gc
-	.type	ftl_map_blk_gc, %function
-ftl_map_blk_gc:
-	stp	x29, x30, [sp, -96]!
+	.global	allocate_data_superblock
+	.type	allocate_data_superblock, %function
+allocate_data_superblock:
+	stp	x29, x30, [sp, -112]!
 	add	x29, sp, 0
+	stp	x27, x28, [sp, 80]
+	adrp	x28, .LANCHOR48
+	stp	x23, x24, [sp, 48]
+	add	x24, x28, :lo12:.LANCHOR48
 	stp	x19, x20, [sp, 16]
+	adrp	x27, .LANCHOR45
 	mov	x19, x0
-	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR20
-	stp	x25, x26, [sp, 64]
 	stp	x21, x22, [sp, 32]
-	stp	x27, x28, [sp, 80]
-	ldr	x20, [x0, 16]
-	ldr	x25, [x0, 40]
-	bl	ftl_free_no_use_map_blk
-	ldrh	w1, [x19, 10]
-	ldrh	w2, [x19, 8]
-	sub	w1, w1, #5
-	cmp	w2, w1
-	blt	.L849
-	ubfiz	x0, x0, 1, 16
-	ldrh	w22, [x20, x0]
-	cbz	w22, .L849
-	ldr	w1, [x19, 52]
-	cbnz	w1, .L849
-	mov	w1, 1
-	str	w1, [x19, 52]
-	strh	wzr, [x20, x0]
-	ldrh	w0, [x19, 8]
-	ldrh	w1, [x19, 2]
-	sub	w0, w0, #1
-	strh	w0, [x19, 8]
-	ldrh	w0, [x24, #:lo12:.LANCHOR20]
-	cmp	w1, w0
-	bcc	.L850
-	mov	x0, x19
-	bl	ftl_map_blk_alloc_new_blk
-.L850:
-	adrp	x26, .LANCHOR148
-	adrp	x23, .LANCHOR157
-	add	x27, x26, :lo12:.LANCHOR148
-	add	x23, x23, :lo12:.LANCHOR157
-	mov	w20, 0
-.L851:
-	ldrh	w0, [x19, 6]
-	cmp	w0, w20
-	bhi	.L858
-	mov	w1, 1
-	mov	w0, w22
-	bl	FtlFreeSysBlkQueueIn
-	str	wzr, [x19, 52]
-.L849:
-	ldrh	w1, [x19, 2]
-	ldrh	w0, [x24, #:lo12:.LANCHOR20]
-	cmp	w1, w0
-	bcc	.L859
-	mov	x0, x19
-	bl	ftl_map_blk_alloc_new_blk
-.L859:
-	mov	w0, 0
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 96
-	ret
-.L858:
-	ubfiz	x0, x20, 2, 16
-	add	x28, x25, x0
-	ldr	w1, [x25, x0]
-	cmp	w22, w1, lsr 10
-	bne	.L852
-	adrp	x2, .LANCHOR116
-	add	x0, x26, :lo12:.LANCHOR148
-	ldr	x2, [x2, #:lo12:.LANCHOR116]
-	str	x2, [x0, 8]
-	adrp	x2, .LANCHOR123
-	str	w1, [x0, 4]
-	ldr	x21, [x2, #:lo12:.LANCHOR123]
-	mov	w2, 1
-	str	x21, [x0, 16]
-	mov	w1, w2
-	bl	FlashReadPages
-	ldrh	w0, [x21, 8]
-	cmp	w0, w20
-	beq	.L853
+	add	x0, x27, :lo12:.LANCHOR45
+	stp	x25, x26, [sp, 64]
+	str	x0, [x29, 104]
+.L642:
+	ldr	x1, [x29, 104]
+	adrp	x23, .LANCHOR5
+	ldrh	w0, [x28, #:lo12:.LANCHOR48]
+	ldrh	w1, [x1]
+	add	w0, w0, w1
+	ldrh	w1, [x23, #:lo12:.LANCHOR5]
+	cmp	w0, w1
+	ble	.L643
+	adrp	x1, .LANCHOR143
 	adrp	x0, .LC1
-	mov	w2, 611
-	mov	x1, x23
+	mov	w2, 2661
+	add	x1, x1, :lo12:.LANCHOR143
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L853:
-	ldr	w0, [x27]
-	cmn	w0, #1
-	bne	.L854
-.L856:
-	str	wzr, [x28]
-.L855:
-	b	.L855
-.L854:
-	ldrh	w0, [x21, 8]
-	cmp	w0, w20
-	bne	.L856
-	ldrh	w1, [x21]
-	ldrh	w0, [x19, 4]
-	cmp	w1, w0
-	bne	.L856
-	ldr	x2, [x27, 8]
-	mov	w1, w20
+.L643:
+	adrp	x0, .LANCHOR53
+	add	x0, x0, :lo12:.LANCHOR53
+	cmp	x19, x0
+	bne	.L669
+	adrp	x1, .LANCHOR95
+	ldrh	w0, [x24]
+	ldr	w1, [x1, #:lo12:.LANCHOR95]
+	mul	w1, w0, w1
+	lsr	w0, w0, 1
+	add	w0, w0, 1
+	add	w1, w0, w1, lsr 2
+	ands	w1, w1, 65535
+	beq	.L644
+	sub	w1, w1, #1
+	and	w1, w1, 65535
+.L644:
+	adrp	x0, .LANCHOR47
+	add	x0, x0, :lo12:.LANCHOR47
+	bl	List_pop_index_node
+	and	w22, w0, 65535
+	ldrh	w0, [x24]
+	cbnz	w0, .L645
+	adrp	x1, .LANCHOR143
+	adrp	x0, .LC1
+	mov	w2, 2670
+	add	x1, x1, :lo12:.LANCHOR143
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L645:
+	ldrh	w0, [x24]
+	sub	w0, w0, #1
+	strh	w0, [x24]
+	ldrh	w0, [x23, #:lo12:.LANCHOR5]
+	cmp	w0, w22
+	bls	.L642
+	adrp	x25, .LANCHOR42
+	ubfiz	x20, x22, 1, 16
+	ldr	x0, [x25, #:lo12:.LANCHOR42]
+	ldrh	w21, [x0, x20]
+	cbnz	w21, .L642
+	strh	w22, [x19]
 	mov	x0, x19
-	bl	FtlMapWritePage
-.L852:
-	add	w20, w20, 1
-	and	w20, w20, 65535
-	b	.L851
-	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
-	.section	.text.FtlMapTblRecovery,"ax",@progbits
-	.align	2
-	.global	FtlMapTblRecovery
-	.type	FtlMapTblRecovery, %function
-FtlMapTblRecovery:
-	stp	x29, x30, [sp, -144]!
+	bl	make_superblock
+	ldrb	w0, [x19, 7]
+	cbnz	w0, .L647
+	ldr	x0, [x25, #:lo12:.LANCHOR42]
+	mov	w1, -1
+	strh	w1, [x0, x20]
+	mov	w0, w22
+	bl	INSERT_DATA_LIST
+	ldrh	w1, [x27, #:lo12:.LANCHOR45]
+	ldrh	w0, [x24]
+	add	w0, w0, w1
+	ldrh	w1, [x23, #:lo12:.LANCHOR5]
+	cmp	w0, w1
+	ble	.L642
+	mov	w2, 2684
+	adrp	x1, .LANCHOR143
+	adrp	x0, .LC1
+	add	x1, x1, :lo12:.LANCHOR143
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+	b	.L642
+.L669:
 	mov	w1, 0
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	x19, x0
-	stp	x23, x24, [sp, 48]
-	adrp	x20, .LANCHOR148
-	ldrh	w23, [x0, 6]
-	adrp	x24, .LANCHOR20
-	stp	x21, x22, [sp, 32]
-	ldr	x21, [x0, 40]
-	ldr	x22, [x0, 16]
-	lsl	w2, w23, 2
-	ldr	x0, [x0, 24]
-	str	x0, [x29, 128]
-	ldrh	w0, [x19, 8]
-	stp	x25, x26, [sp, 64]
-	stp	x27, x28, [sp, 80]
-	mov	w27, 0
-	str	w0, [x29, 140]
-	mov	x0, x21
-	bl	ftl_memset
-	str	x20, [x29, 120]
-	adrp	x7, .LANCHOR115
-	add	x3, x20, :lo12:.LANCHOR148
-	mov	x26, x7
-	mov	x20, x3
-	ldr	x0, [x7, #:lo12:.LANCHOR115]
-	str	x0, [x3, 8]
-	adrp	x0, .LANCHOR123
-	stp	wzr, wzr, [x19, 48]
-	ldr	x25, [x0, #:lo12:.LANCHOR123]
-	mov	w0, -1
-	str	x25, [x3, 16]
-	strh	w0, [x19]
-	strh	w0, [x19, 2]
-	mov	w0, 1
-	str	w0, [x19, 56]
-	ldr	w0, [x29, 140]
-	sub	w0, w0, #1
-	str	w0, [x29, 136]
-	add	x0, x24, :lo12:.LANCHOR20
-	str	x0, [x29, 112]
-.L866:
-	ldr	w0, [x29, 140]
-	cmp	w27, w0
-	bge	.L883
-	ldr	w0, [x29, 136]
-	sxtw	x28, w27
-	cmp	w27, w0
-	bne	.L867
-	lsl	x0, x28, 1
-	mov	w1, 1
-	add	x24, x22, x0
-	ldrh	w0, [x22, x0]
-	mov	w22, 0
-	bl	FtlGetLastWrittenPage
-	sxth	w26, w0
+	b	.L644
+.L647:
+	ldrh	w1, [x27, #:lo12:.LANCHOR45]
+	ldrh	w0, [x24]
+	add	w0, w0, w1
+	ldrh	w1, [x23, #:lo12:.LANCHOR5]
+	cmp	w0, w1
+	ble	.L649
+	adrp	x1, .LANCHOR143
+	adrp	x0, .LC1
+	mov	w2, 2687
+	add	x1, x1, :lo12:.LANCHOR143
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L649:
+	adrp	x0, .LANCHOR3
+	adrp	x25, .LANCHOR79
+	add	x26, x19, 16
+	mov	w6, 65535
+	ldrh	w0, [x0, #:lo12:.LANCHOR3]
+	mov	x4, x26
+	ldr	x3, [x25, #:lo12:.LANCHOR79]
+	ubfiz	x0, x0, 5, 16
+	add	x1, x3, 8
+	add	x0, x0, 8
+	add	x0, x3, x0
+.L650:
+	cmp	x0, x1
+	bne	.L652
+	cbnz	w21, .L653
+	adrp	x1, .LANCHOR143
+	adrp	x0, .LC1
+	mov	w2, 2698
+	add	x1, x1, :lo12:.LANCHOR143
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L653:
+	adrp	x0, .LANCHOR144
+	ldrh	w0, [x0, #:lo12:.LANCHOR144]
+	cmp	w0, w22
+	bne	.L654
+	adrp	x1, .LANCHOR143
+	adrp	x0, .LC1
+	mov	w2, 2700
+	add	x1, x1, :lo12:.LANCHOR143
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L654:
+	ldrb	w0, [x19, 8]
+	adrp	x6, .LANCHOR43
+	adrp	x7, .LANCHOR14
+	adrp	x5, .LANCHOR90
+	adrp	x4, .LANCHOR91
+	ldr	x1, [x6, #:lo12:.LANCHOR43]
+	cbnz	w0, .L655
+	ldrh	w0, [x1, x20]
+	cbz	w0, .L656
+	ldrh	w2, [x7, #:lo12:.LANCHOR14]
+	add	w0, w0, w2
+.L680:
+	strh	w0, [x1, x20]
+	mov	w1, 0
+	ldr	w0, [x5, #:lo12:.LANCHOR90]
 	add	w0, w0, 1
-	strh	w0, [x19, 2]
-	ldr	x0, [x29, 128]
-	strh	w27, [x19]
-	ldr	w0, [x0, x28, lsl 2]
-	str	w0, [x19, 48]
-	ldr	x0, [x29, 120]
-	add	x20, x0, :lo12:.LANCHOR148
-.L868:
-	cmp	w22, w26
-	ble	.L870
-.L883:
-	mov	x0, x19
-	bl	ftl_free_no_use_map_blk
-	adrp	x0, .LANCHOR20
-	ldrh	w1, [x19, 2]
-	ldrh	w0, [x0, #:lo12:.LANCHOR20]
-	cmp	w1, w0
-	bne	.L872
-	mov	x0, x19
-	bl	ftl_map_blk_alloc_new_blk
-.L872:
-	mov	x0, x19
-	bl	ftl_map_blk_gc
-	mov	x0, x19
-	bl	ftl_map_blk_gc
-	mov	w0, 0
+	str	w0, [x5, #:lo12:.LANCHOR90]
+	mov	w0, w22
+	bl	ftl_set_blk_mode
+.L658:
+	ldr	x0, [x6, #:lo12:.LANCHOR43]
+	ldrh	w1, [x0, x20]
+	adrp	x0, .LANCHOR92
+	ldr	w2, [x0, #:lo12:.LANCHOR92]
+	cmp	w1, w2
+	bls	.L659
+	str	w1, [x0, #:lo12:.LANCHOR92]
+.L659:
+	ldr	w2, [x5, #:lo12:.LANCHOR90]
+	ldr	w1, [x4, #:lo12:.LANCHOR91]
+	ldrh	w0, [x7, #:lo12:.LANCHOR14]
+	madd	w0, w0, w2, w1
+	ldrh	w1, [x23, #:lo12:.LANCHOR5]
+	udiv	w0, w0, w1
+	adrp	x1, .LANCHOR145
+	str	w0, [x1, #:lo12:.LANCHOR145]
+	adrp	x0, .LANCHOR118
+	ldr	x1, [x0, #:lo12:.LANCHOR118]
+	ldr	w0, [x1, 16]
+	add	w0, w0, 1
+	str	w0, [x1, 16]
+	ldr	x0, [x25, #:lo12:.LANCHOR79]
+	ubfiz	x1, x21, 5, 16
+	add	x1, x1, 4
+	add	x2, x0, 4
+	add	x1, x0, x1
+.L660:
+	cmp	x1, x2
+	bne	.L661
+	ldrb	w1, [x19, 8]
+	mov	w2, w21
+	mov	x23, 0
+	bl	FlashEraseBlocks
+	mov	w1, 0
+.L662:
+	cmp	w21, w23, uxth
+	bhi	.L664
+	cbz	w1, .L665
+	mov	w0, w22
+	bl	update_multiplier_value
+	bl	FtlBbmTblFlush
+.L665:
+	ldrb	w0, [x19, 7]
+	cbnz	w0, .L666
+	adrp	x0, .LANCHOR42
+	mov	w1, -1
+	ldr	x0, [x0, #:lo12:.LANCHOR42]
+	strh	w1, [x0, x20]
+	b	.L642
+.L652:
+	ldrh	w2, [x4]
+	stp	xzr, xzr, [x1]
+	cmp	w2, w6
+	beq	.L651
+	ubfiz	x5, x21, 5, 16
+	add	w21, w21, 1
+	add	x5, x3, x5
+	and	w21, w21, 65535
+	lsl	w2, w2, 10
+	str	w2, [x5, 4]
+.L651:
+	add	x1, x1, 32
+	add	x4, x4, 2
+	b	.L650
+.L656:
+	mov	w0, 2
+	b	.L680
+.L655:
+	ldrh	w0, [x1, x20]
+	add	w0, w0, 1
+	strh	w0, [x1, x20]
+	ldr	w0, [x4, #:lo12:.LANCHOR91]
+	add	w0, w0, 1
+	str	w0, [x4, #:lo12:.LANCHOR91]
+	mov	w0, w22
+	bl	ftl_set_blk_mode.part.6
+	b	.L658
+.L661:
+	ldr	w3, [x2]
+	and	w3, w3, -1024
+	str	w3, [x2], 32
+	b	.L660
+.L664:
+	ldr	x2, [x25, #:lo12:.LANCHOR79]
+	lsl	x0, x23, 5
+	add	x3, x2, x0
+	ldr	w2, [x2, x0]
+	cmn	w2, #1
+	bne	.L663
+	add	w1, w1, 1
+	ldr	w0, [x3, 4]
+	stp	w2, w1, [x29, 96]
+	lsr	w0, w0, 10
+	bl	FtlBbmMapBadBlock
+	ldp	w2, w1, [x29, 96]
+	strh	w2, [x26]
+	ldrb	w0, [x19, 7]
+	sub	w0, w0, #1
+	strb	w0, [x19, 7]
+.L663:
+	add	x23, x23, 1
+	add	x26, x26, 2
+	b	.L662
+.L666:
+	adrp	x1, .LANCHOR19
+	adrp	x2, .LANCHOR82
+	strh	wzr, [x19, 2]
+	ldrh	w1, [x1, #:lo12:.LANCHOR19]
+	strh	w22, [x19]
+	strb	wzr, [x19, 6]
+	mul	w0, w0, w1
+	ldr	w1, [x2, #:lo12:.LANCHOR82]
+	str	w1, [x19, 12]
+	add	w1, w1, 1
+	str	w1, [x2, #:lo12:.LANCHOR82]
+	adrp	x1, .LANCHOR42
+	and	w0, w0, 65535
+	strh	w0, [x19, 4]
+	ldr	x1, [x1, #:lo12:.LANCHOR42]
+	strh	w0, [x1, x20]
+	ldrh	w0, [x19, 4]
+	cbz	w0, .L667
+	ldrb	w0, [x19, 7]
+	cbnz	w0, .L668
+.L667:
+	adrp	x1, .LANCHOR143
+	adrp	x0, .LC1
+	mov	w2, 2753
+	add	x1, x1, :lo12:.LANCHOR143
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L668:
 	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 144
-	ret
-.L870:
-	ldrh	w0, [x24]
-	mov	w2, 1
-	mov	w1, w2
-	orr	w0, w22, w0, lsl 10
-	str	w0, [x20, 4]
-	mov	x0, x20
-	bl	FlashReadPages
-	ldr	w0, [x20]
-	cmn	w0, #1
-	beq	.L869
-	ldrh	w0, [x25, 8]
-	cmp	w23, w0
-	bls	.L869
-	ldrh	w2, [x25]
-	ldrh	w1, [x19, 4]
-	cmp	w2, w1
-	bne	.L869
-	ubfiz	x0, x0, 2, 16
-	ldr	w1, [x20, 4]
-	str	w1, [x21, x0]
-.L869:
-	add	w22, w22, 1
-	sxth	w22, w22
-	b	.L868
-.L867:
-	ldr	x0, [x26, #:lo12:.LANCHOR115]
-	mov	w2, 1
-	str	x0, [x20, 8]
-	lsl	x0, x28, 1
-	ldrh	w1, [x24, #:lo12:.LANCHOR20]
-	add	x28, x22, x0
-	ldrh	w0, [x22, x0]
-	sub	w1, w1, #1
-	orr	w0, w1, w0, lsl 10
-	mov	w1, w2
-	str	w0, [x20, 4]
-	mov	x0, x20
-	bl	FlashReadPages
-	ldr	w0, [x20]
-	cmn	w0, #1
-	beq	.L885
-	ldrh	w1, [x25]
-	ldrh	w0, [x19, 4]
-	cmp	w1, w0
-	bne	.L885
-	ldrh	w1, [x25, 8]
-	mov	w0, 64245
-	cmp	w1, w0
-	beq	.L874
-.L885:
-	mov	w5, 0
-.L875:
-	ldr	x0, [x29, 112]
-	ldrh	w0, [x0]
-	cmp	w5, w0
-	bge	.L881
-	ldrh	w0, [x28]
-	mov	w2, 1
-	str	w5, [x29, 108]
-	mov	w1, w2
-	orr	w0, w5, w0, lsl 10
-	str	w0, [x20, 4]
-	mov	x0, x20
-	bl	FlashReadPages
-	ldr	w0, [x20]
-	ldr	w5, [x29, 108]
-	cmn	w0, #1
-	beq	.L879
-	ldrh	w0, [x25, 8]
-	cmp	w23, w0
-	bls	.L879
-	ldrh	w2, [x25]
-	ldrh	w1, [x19, 4]
-	cmp	w2, w1
-	bne	.L879
-	ubfiz	x0, x0, 2, 16
-	ldr	w1, [x20, 4]
-	str	w1, [x21, x0]
-.L879:
-	add	w5, w5, 1
-	sxth	w5, w5
-	b	.L875
-.L874:
-	ldrh	w5, [x24, #:lo12:.LANCHOR20]
-	mov	w0, 0
-	ldr	x10, [x26, #:lo12:.LANCHOR115]
-	sub	w5, w5, #1
-.L876:
-	cmp	w0, w5
-	blt	.L878
-.L881:
-	add	w4, w27, 1
-	sxth	w27, w4
-	b	.L866
-.L878:
-	lsl	w2, w0, 1
-	sxtw	x2, w2
-	lsl	x1, x2, 2
-	ldrh	w1, [x10, x1]
-	cmp	w23, w1
-	bls	.L877
-	add	x2, x2, 1
-	ubfiz	x1, x1, 2, 16
-	ldr	w2, [x10, x2, lsl 2]
-	str	w2, [x21, x1]
-.L877:
-	add	w0, w0, 1
-	sxth	w0, w0
-	b	.L876
-	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
-	.section	.text.FtlLoadVonderInfo,"ax",@progbits
-	.align	2
-	.global	FtlLoadVonderInfo
-	.type	FtlLoadVonderInfo, %function
-FtlLoadVonderInfo:
-	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR27
-	adrp	x0, .LANCHOR158
-	add	x0, x0, :lo12:.LANCHOR158
-	add	x29, sp, 0
-	ldrh	w1, [x1, #:lo12:.LANCHOR27]
-	strh	w1, [x0, 10]
-	mov	w1, -3962
-	strh	w1, [x0, 4]
-	adrp	x1, .LANCHOR35
-	ldrh	w1, [x1, #:lo12:.LANCHOR35]
-	strh	w1, [x0, 8]
-	adrp	x1, .LANCHOR28
-	ldrh	w1, [x1, #:lo12:.LANCHOR28]
-	strh	w1, [x0, 6]
-	adrp	x1, .LANCHOR36
-	ldr	x1, [x1, #:lo12:.LANCHOR36]
-	str	x1, [x0, 16]
-	adrp	x1, .LANCHOR132
-	ldr	x1, [x1, #:lo12:.LANCHOR132]
-	str	x1, [x0, 24]
-	adrp	x1, .LANCHOR131
-	ldr	x1, [x1, #:lo12:.LANCHOR131]
-	str	x1, [x0, 32]
-	adrp	x1, .LANCHOR133
-	ldr	x1, [x1, #:lo12:.LANCHOR133]
-	str	x1, [x0, 40]
-	bl	FtlMapTblRecovery
-	mov	w0, 0
-	ldp	x29, x30, [sp], 16
-	ret
-	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
-	.section	.text.FtlLoadMapInfo,"ax",@progbits
-	.align	2
-	.global	FtlLoadMapInfo
-	.type	FtlLoadMapInfo, %function
-FtlLoadMapInfo:
-	stp	x29, x30, [sp, -16]!
-	add	x29, sp, 0
-	bl	FtlL2PDataInit
-	adrp	x0, .LANCHOR140
-	add	x0, x0, :lo12:.LANCHOR140
-	bl	FtlMapTblRecovery
-	mov	w0, 0
-	ldp	x29, x30, [sp], 16
+	ldp	x29, x30, [sp], 112
 	ret
-	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
-	.section	.text.flush_l2p_region,"ax",@progbits
+	.size	allocate_data_superblock, .-allocate_data_superblock
+	.section	.text.FtlGcFreeBadSuperBlk,"ax",@progbits
 	.align	2
-	.global	flush_l2p_region
-	.type	flush_l2p_region, %function
-flush_l2p_region:
-	stp	x29, x30, [sp, -32]!
+	.global	FtlGcFreeBadSuperBlk
+	.type	FtlGcFreeBadSuperBlk, %function
+FtlGcFreeBadSuperBlk:
+	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR74
+	stp	x25, x26, [sp, 64]
+	and	w25, w0, 65535
+	ldrh	w0, [x21, #:lo12:.LANCHOR74]
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR55
-	ubfiz	x19, x0, 4, 16
-	ldr	x0, [x20, #:lo12:.LANCHOR55]
-	add	x1, x0, x19
-	ldr	x2, [x1, 8]
-	ldrh	w1, [x0, x19]
-	adrp	x0, .LANCHOR140
-	add	x0, x0, :lo12:.LANCHOR140
-	bl	FtlMapWritePage
-	ldr	x0, [x20, #:lo12:.LANCHOR55]
-	add	x0, x0, x19
-	ldp	x19, x20, [sp, 16]
-	ldr	w1, [x0, 4]
-	and	w1, w1, 2147483647
-	str	w1, [x0, 4]
+	stp	x23, x24, [sp, 48]
+	str	x27, [sp, 80]
+	cbz	w0, .L682
+	adrp	x23, .LANCHOR75
+	add	x24, x23, :lo12:.LANCHOR75
+	mov	w19, 0
+.L683:
+	adrp	x0, .LANCHOR3
+	ldrh	w0, [x0, #:lo12:.LANCHOR3]
+	cmp	w0, w19
+	bhi	.L689
+	bl	FtlGcReFreshBadBlk
+.L682:
 	mov	w0, 0
-	ldp	x29, x30, [sp], 32
+	ldr	x27, [sp, 80]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
 	ret
-	.size	flush_l2p_region, .-flush_l2p_region
-	.section	.text.log2phys,"ax",@progbits
+.L689:
+	adrp	x0, .LANCHOR13
+	add	x0, x0, :lo12:.LANCHOR13
+	mov	w1, w25
+	add	x22, x21, :lo12:.LANCHOR74
+	mov	w20, 0
+	ldrb	w0, [x0, w19, sxtw]
+	bl	V2P_block
+	and	w26, w0, 65535
+.L684:
+	ldrh	w0, [x22]
+	cmp	w0, w20
+	bhi	.L688
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L683
+.L688:
+	add	x0, x23, :lo12:.LANCHOR75
+	add	w27, w20, 1
+	ldrh	w0, [x0, w20, sxtw 1]
+	cmp	w0, w26
+	bne	.L685
+	mov	w0, w26
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	ldrh	w1, [x22]
+	sxtw	x3, w27
+	and	x4, x20, 65535
+	mov	x0, 0
+.L686:
+	add	w2, w20, w0
+	cmp	w1, w2, uxth
+	bhi	.L687
+	sub	w1, w1, #1
+	strh	w1, [x22]
+.L685:
+	and	w20, w27, 65535
+	b	.L684
+.L687:
+	add	x2, x3, x0
+	ldrh	w5, [x24, x2, lsl 1]
+	add	x2, x4, x0
+	add	x0, x0, 1
+	strh	w5, [x24, x2, lsl 1]
+	b	.L686
+	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
+	.section	.text.update_vpc_list,"ax",@progbits
 	.align	2
-	.global	log2phys
-	.type	log2phys, %function
-log2phys:
-	stp	x29, x30, [sp, -80]!
+	.global	update_vpc_list
+	.type	update_vpc_list, %function
+update_vpc_list:
+	stp	x29, x30, [sp, -32]!
+	adrp	x1, .LANCHOR42
 	add	x29, sp, 0
-	stp	x25, x26, [sp, 64]
-	mov	w25, w0
-	adrp	x0, .LANCHOR22
-	stp	x23, x24, [sp, 48]
 	stp	x19, x20, [sp, 16]
-	mov	x20, x1
-	ldrh	w24, [x0, #:lo12:.LANCHOR22]
-	adrp	x0, .LANCHOR61
-	stp	x21, x22, [sp, 32]
-	mov	x19, x0
-	ldr	w1, [x0, #:lo12:.LANCHOR61]
-	mov	w21, w2
-	cmp	w25, w1
-	bcc	.L900
-	adrp	x1, .LANCHOR159
+	and	w19, w0, 65535
+	ldr	x1, [x1, #:lo12:.LANCHOR42]
+	ubfiz	x0, x19, 1, 16
+	ldrh	w0, [x1, x0]
+	cbnz	w0, .L695
+	adrp	x0, .LANCHOR144
+	ldrh	w1, [x0, #:lo12:.LANCHOR144]
+	cmp	w1, w19
+	bne	.L696
+	mov	w1, -1
+	strh	w1, [x0, #:lo12:.LANCHOR144]
+.L697:
+	adrp	x20, .LANCHOR45
+	mov	w1, w19
+	adrp	x0, .LANCHOR41
+	add	x0, x0, :lo12:.LANCHOR41
+	bl	List_remove_node
+	ldrh	w0, [x20, #:lo12:.LANCHOR45]
+	cbnz	w0, .L699
+	adrp	x1, .LANCHOR146
 	adrp	x0, .LC1
-	mov	w2, 811
-	add	x1, x1, :lo12:.LANCHOR159
+	mov	w2, 2823
+	add	x1, x1, :lo12:.LANCHOR146
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L900:
-	ldr	w0, [x19, #:lo12:.LANCHOR61]
-	cmp	w25, w0
-	bcs	.L901
-	adrp	x23, .LANCHOR55
-	add	w24, w24, 7
-	adrp	x0, .LANCHOR33
-	ldr	x2, [x23, #:lo12:.LANCHOR55]
-	lsr	w22, w25, w24
-	and	w22, w22, 65535
-	ldrh	w1, [x0, #:lo12:.LANCHOR33]
-	mov	x0, 0
-.L902:
-	and	x19, x0, 65535
-	cmp	w19, w1
-	bcc	.L907
-	bl	select_l2p_ram_region
-	and	x19, x0, 65535
-	ldr	x2, [x23, #:lo12:.LANCHOR55]
-	ubfiz	x1, x19, 4, 16
-	mov	w26, w0
-	add	x3, x2, x1
-	ldrh	w2, [x2, x1]
-	mov	w1, 65535
-	cmp	w2, w1
-	beq	.L908
-	ldr	w1, [x3, 4]
-	tbz	w1, #31, .L908
-	bl	flush_l2p_region
-.L908:
-	mov	w1, w26
-	mov	w0, w22
-	bl	load_l2p_region
-	b	.L904
-.L901:
-	mov	w0, -1
-	cbnz	w21, .L899
-	str	w0, [x20]
-.L899:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
-	ret
-.L907:
-	add	x0, x0, 1
-	add	x3, x2, x0, lsl 4
-	ldrh	w3, [x3, -16]
-	cmp	w3, w22
-	bne	.L902
-.L904:
-	mov	x0, 1
-	ldr	x1, [x23, #:lo12:.LANCHOR55]
-	lsl	x0, x0, x24
+.L699:
+	ldrh	w0, [x20, #:lo12:.LANCHOR45]
 	sub	w0, w0, #1
-	and	w0, w0, w25
-	and	x0, x0, 65535
-	add	x1, x1, x19, lsl 4
-	cbnz	w21, .L905
-	ldr	x1, [x1, 8]
-	ldr	w0, [x1, x0, lsl 2]
-	str	w0, [x20]
-.L906:
-	ldr	x0, [x23, #:lo12:.LANCHOR55]
-	add	x19, x0, x19, lsl 4
-	ldr	w0, [x19, 4]
-	cmn	w0, #1
-	beq	.L910
-	add	w0, w0, 1
-	str	w0, [x19, 4]
-.L910:
+	strh	w0, [x20, #:lo12:.LANCHOR45]
+	mov	w0, w19
+	bl	free_data_superblock
+	mov	w0, w19
+	bl	FtlGcFreeBadSuperBlk
+	adrp	x0, .LANCHOR48
+	ldrh	w1, [x20, #:lo12:.LANCHOR45]
+	ldrh	w0, [x0, #:lo12:.LANCHOR48]
+	add	w0, w0, w1
+	adrp	x1, .LANCHOR5
+	ldrh	w1, [x1, #:lo12:.LANCHOR5]
+	cmp	w0, w1
+	ble	.L703
+	adrp	x1, .LANCHOR146
+	adrp	x0, .LC1
+	mov	w2, 2826
+	add	x1, x1, :lo12:.LANCHOR146
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L703:
+	mov	w0, 1
+	b	.L694
+.L696:
+	adrp	x0, .LANCHOR51
+	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+	cmp	w0, w19
+	beq	.L702
+	adrp	x0, .LANCHOR52
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
+	cmp	w0, w19
+	beq	.L702
+	adrp	x0, .LANCHOR53
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+	cmp	w0, w19
+	bne	.L697
+.L702:
 	mov	w0, 0
-	b	.L899
-.L905:
-	ldr	x2, [x1, 8]
-	ldr	w3, [x20]
-	str	w3, [x2, x0, lsl 2]
-	ldr	w0, [x1, 4]
-	orr	w0, w0, -2147483648
-	str	w0, [x1, 4]
-	adrp	x0, .LANCHOR56
-	strh	w22, [x0, #:lo12:.LANCHOR56]
-	b	.L906
-	.size	log2phys, .-log2phys
-	.section	.text.FtlReUsePrevPpa,"ax",@progbits
+.L694:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L695:
+	mov	w0, w19
+	bl	List_update_data_list
+	b	.L702
+	.size	update_vpc_list, .-update_vpc_list
+	.section	.text.decrement_vpc_count,"ax",@progbits
 	.align	2
-	.global	FtlReUsePrevPpa
-	.type	FtlReUsePrevPpa, %function
-FtlReUsePrevPpa:
-	stp	x29, x30, [sp, -80]!
+	.global	decrement_vpc_count
+	.type	decrement_vpc_count, %function
+decrement_vpc_count:
+	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR42
 	stp	x19, x20, [sp, 16]
-	mov	w21, w0
-	str	w1, [x29, 76]
-	lsr	w0, w1, 10
-	str	x23, [sp, 48]
-	bl	P2V_block_in_plane
-	ldr	x2, [x22, #:lo12:.LANCHOR42]
-	and	w3, w0, 65535
-	ubfiz	x20, x3, 1, 16
-	ldrh	w1, [x2, x20]
-	cbnz	w1, .L914
-	adrp	x0, .LANCHOR47
-	ldr	x19, [x0, #:lo12:.LANCHOR47]
-	cbz	x19, .L915
-	adrp	x2, .LANCHOR40
-	mov	x5, -6148914691236517206
-	movk	x5, 0xaaab, lsl 0
-	adrp	x23, .LANCHOR48
-	ldr	x2, [x2, #:lo12:.LANCHOR40]
-	mov	w6, 65535
-	ldrh	w4, [x23, #:lo12:.LANCHOR48]
-	sub	x19, x19, x2
-	asr	x19, x19, 1
-	mul	x19, x19, x5
-	mov	w5, 6
-	and	w19, w19, 65535
-.L916:
-	cmp	w1, w4
-	beq	.L915
-	cmp	w19, w3
-	bne	.L917
+	and	w19, w0, 65535
+	str	x21, [sp, 32]
+	mov	w0, 65535
+	cmp	w19, w0
+	beq	.L706
+	adrp	x21, .LANCHOR42
+	ubfiz	x20, x19, 1, 16
+	ldr	x1, [x21, #:lo12:.LANCHOR42]
+	ldrh	w0, [x1, x20]
+	cbnz	w0, .L707
+	mov	w2, 0
 	mov	w1, w19
-	add	x0, x0, :lo12:.LANCHOR47
-	bl	List_remove_node
-	ldrh	w0, [x23, #:lo12:.LANCHOR48]
-	cbnz	w0, .L918
-	adrp	x1, .LANCHOR160
+	adrp	x0, .LC17
+	add	x0, x0, :lo12:.LC17
+	bl	printf
+	ldr	x0, [x21, #:lo12:.LANCHOR42]
+	ldrh	w0, [x0, x20]
+	cbz	w0, .L708
+.L713:
+	mov	w20, 0
+.L705:
+	mov	w0, w20
+	ldr	x21, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+.L708:
+	mov	w2, 2841
+	adrp	x1, .LANCHOR147
 	adrp	x0, .LC1
-	mov	w2, 1699
-	add	x1, x1, :lo12:.LANCHOR160
+	add	x1, x1, :lo12:.LANCHOR147
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L918:
-	ldrh	w0, [x23, #:lo12:.LANCHOR48]
+	b	.L713
+.L707:
 	sub	w0, w0, #1
-	strh	w0, [x23, #:lo12:.LANCHOR48]
-	mov	w0, w19
-	bl	INSERT_DATA_LIST
-	ldr	x1, [x22, #:lo12:.LANCHOR42]
-	ldrh	w0, [x1, x20]
-	add	w0, w0, 1
 	strh	w0, [x1, x20]
-.L915:
-	add	x1, x29, 76
-	mov	w2, 1
-	mov	w0, w21
-	bl	log2phys
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldr	x23, [sp, 48]
-	ldp	x29, x30, [sp], 80
-	ret
-.L917:
-	umull	x19, w19, w5
-	ldrh	w19, [x2, x19]
-	cmp	w19, w6
-	beq	.L915
-	add	w1, w1, 1
-	and	w1, w1, 65535
-	b	.L916
-.L914:
-	add	w1, w1, 1
-	strh	w1, [x2, x20]
-	b	.L915
-	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
-	.section	.text.ftl_check_vpc,"ax",@progbits
-	.align	2
-	.global	ftl_check_vpc
-	.type	ftl_check_vpc, %function
-ftl_check_vpc:
-	stp	x29, x30, [sp, -112]!
-	adrp	x0, .LC94
-	add	x0, x0, :lo12:.LC94
-	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR61
-	add	x23, x23, :lo12:.LANCHOR61
-	stp	x21, x22, [sp, 32]
-	mov	w22, 0
-	stp	x19, x20, [sp, 16]
-	stp	x25, x26, [sp, 64]
-	adrp	x21, .LANCHOR161
-	stp	x27, x28, [sp, 80]
-	add	x1, x21, :lo12:.LANCHOR161
-	adrp	x20, check_vpc_table
-	bl	printf
-	add	x19, x20, :lo12:check_vpc_table
-	mov	w2, 8192
-	mov	w1, 0
-	mov	x0, x19
-	bl	ftl_memset
-.L925:
-	ldr	w0, [x23]
-	cmp	w22, w0
-	bcc	.L927
-	adrp	x22, .LANCHOR5
-	adrp	x24, .LC95
-	add	x22, x22, :lo12:.LANCHOR5
-	add	x26, x20, :lo12:check_vpc_table
-	add	x24, x24, :lo12:.LC95
-	mov	w23, 0
-	mov	w19, 0
-	adrp	x25, .LANCHOR42
-.L928:
-	ldrh	w0, [x22]
-	cmp	w0, w19
-	bhi	.L930
-	adrp	x0, .LANCHOR47
-	ldr	x19, [x0, #:lo12:.LANCHOR47]
-	cbz	x19, .L931
-	adrp	x0, .LANCHOR48
-	adrp	x25, .LC96
-	add	x20, x20, :lo12:check_vpc_table
-	add	x25, x25, :lo12:.LC96
-	ldrh	w26, [x0, #:lo12:.LANCHOR48]
-	adrp	x0, .LANCHOR40
-	mov	x24, x0
-	mov	w22, 0
-	ldr	x1, [x0, #:lo12:.LANCHOR40]
-	adrp	x27, .LANCHOR42
-	mov	w28, 6
-	sub	x19, x19, x1
+.L706:
+	adrp	x21, .LANCHOR131
+	mov	w1, 65535
+	ldrh	w0, [x21, #:lo12:.LANCHOR131]
+	cmp	w0, w1
+	bne	.L710
+	strh	w19, [x21, #:lo12:.LANCHOR131]
+	b	.L713
+.L710:
+	cmp	w19, w0
+	beq	.L713
+	bl	update_vpc_list
+	cmp	w0, 0
+	adrp	x1, .LANCHOR40
+	adrp	x0, .LANCHOR41
+	strh	w19, [x21, #:lo12:.LANCHOR131]
+	cset	w20, ne
+	ldr	x1, [x1, #:lo12:.LANCHOR40]
+	ldr	x0, [x0, #:lo12:.LANCHOR41]
+	sub	x0, x0, x1
 	mov	x1, -6148914691236517206
-	asr	x19, x19, 1
+	asr	x0, x0, 1
 	movk	x1, 0xaaab, lsl 0
-	mul	x19, x19, x1
-	and	w19, w19, 65535
-.L932:
-	cmp	w22, w26
-	bne	.L934
-.L931:
-	cbz	w23, .L924
+	mul	x0, x0, x1
+	adrp	x1, .LANCHOR42
+	ldr	x1, [x1, #:lo12:.LANCHOR42]
+	and	x2, x0, 65535
+	ldrh	w1, [x1, x2, lsl 1]
+	cbnz	w1, .L705
+	cmp	w19, w0, uxth
+	beq	.L705
+	mov	w2, 2857
+	adrp	x1, .LANCHOR147
 	adrp	x0, .LC1
-	mov	w2, 2343
-	add	x1, x21, :lo12:.LANCHOR161
+	add	x1, x1, :lo12:.LANCHOR147
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L924:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 112
-	ret
-.L927:
-	mov	w2, 0
-	add	x1, x29, 108
-	mov	w0, w22
-	bl	log2phys
-	ldr	w0, [x29, 108]
-	cmn	w0, #1
-	beq	.L926
-	lsr	w0, w0, 10
-	bl	P2V_block_in_plane
-	and	x0, x0, 65535
-	ldrh	w1, [x19, x0, lsl 1]
-	add	w1, w1, 1
-	strh	w1, [x19, x0, lsl 1]
-.L926:
-	add	w22, w22, 1
-	b	.L925
-.L930:
-	ldr	x0, [x25, #:lo12:.LANCHOR42]
-	ubfiz	x28, x19, 1, 16
-	sxtw	x27, w19
-	ldrh	w2, [x0, x28]
-	ldrh	w3, [x26, x27, lsl 1]
-	cmp	w2, w3
-	beq	.L929
-	mov	w1, w19
-	mov	x0, x24
-	bl	printf
-	ldr	x0, [x25, #:lo12:.LANCHOR42]
-	mov	w1, 65535
-	ldrh	w0, [x0, x28]
-	cmp	w0, w1
-	beq	.L929
-	ldrh	w1, [x26, x27, lsl 1]
-	cmp	w1, w0
-	csinc	w23, w23, wzr, ls
-.L929:
-	add	w19, w19, 1
-	and	w19, w19, 65535
-	b	.L928
-.L934:
-	ldr	x1, [x27, #:lo12:.LANCHOR42]
-	ubfiz	x0, x19, 1, 16
-	ldrh	w2, [x1, x0]
-	cbz	w2, .L933
-	ldrh	w3, [x20, w19, sxtw 1]
-	mov	w23, 1
-	mov	w1, w19
-	mov	x0, x25
-	bl	printf
-.L933:
-	ldr	x0, [x24, #:lo12:.LANCHOR40]
-	umull	x19, w19, w28
-	ldrh	w19, [x0, x19]
-	mov	w0, 65535
-	cmp	w19, w0
-	beq	.L931
-	add	w22, w22, 1
-	and	w22, w22, 65535
-	b	.L932
-	.size	ftl_check_vpc, .-ftl_check_vpc
-	.section	.text.ftl_scan_all_data,"ax",@progbits
+	b	.L705
+	.size	decrement_vpc_count, .-decrement_vpc_count
+	.section	.text.FtlSuperblockPowerLostFix,"ax",@progbits
 	.align	2
-	.global	ftl_scan_all_data
-	.type	ftl_scan_all_data, %function
-ftl_scan_all_data:
-	sub	sp, sp, #96
-	adrp	x0, .LC97
-	mov	w1, 0
-	add	x0, x0, :lo12:.LC97
-	stp	x29, x30, [sp, 16]
-	add	x29, sp, 16
-	stp	x19, x20, [sp, 32]
-	adrp	x20, .LANCHOR148
-	stp	x21, x22, [sp, 48]
-	mov	w19, 0
-	adrp	x21, .LANCHOR61
-	add	x22, x20, :lo12:.LANCHOR148
-	add	x21, x21, :lo12:.LANCHOR61
-	str	x23, [sp, 64]
-	bl	printf
-.L950:
-	ldr	w0, [x21]
-	cmp	w19, w0
-	bcc	.L956
-	ldp	x19, x20, [sp, 32]
-	ldp	x21, x22, [sp, 48]
-	ldp	x29, x30, [sp, 16]
-	ldr	x23, [sp, 64]
-	add	sp, sp, 96
+	.global	FtlSuperblockPowerLostFix
+	.type	FtlSuperblockPowerLostFix, %function
+FtlSuperblockPowerLostFix:
+	stp	x29, x30, [sp, -80]!
+	adrp	x1, .LANCHOR114
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	mov	w0, -1
+	stp	x21, x22, [sp, 32]
+	str	w0, [x29, 72]
+	adrp	x0, .LANCHOR106
+	ldr	x21, [x1, #:lo12:.LANCHOR114]
+	mov	w1, -3
+	ldr	x0, [x0, #:lo12:.LANCHOR106]
+	adrp	x22, .LANCHOR83
+	str	x21, [x29, 64]
+	add	x22, x22, :lo12:.LANCHOR83
+	str	x0, [x29, 56]
+	ldrh	w20, [x19, 4]
+	str	w1, [x21, 8]
+	mov	w1, -2
+	str	w1, [x21, 12]
+	and	w20, w20, 1
+	ldrh	w1, [x19]
+	add	w20, w20, 6
+	strh	w1, [x21, 2]
+	strh	wzr, [x21]
+	mov	w1, 61589
+	str	w1, [x0]
+	mov	w1, 22136
+	movk	w1, 0x1234, lsl 16
+	str	w1, [x0, 4]
+.L720:
+	ldrh	w0, [x19, 4]
+	cbnz	w0, .L716
+.L717:
+	ldrh	w0, [x19]
+	adrp	x1, .LANCHOR42
+	ldrh	w3, [x19, 4]
+	ldr	x2, [x1, #:lo12:.LANCHOR42]
+	lsl	x0, x0, 1
+	ldrh	w1, [x2, x0]
+	sub	w1, w1, w3
+	strh	w1, [x2, x0]
+	adrp	x0, .LANCHOR19
+	strb	wzr, [x19, 6]
+	strh	wzr, [x19, 4]
+	ldrh	w0, [x0, #:lo12:.LANCHOR19]
+	strh	w0, [x19, 2]
+	ldp	x21, x22, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 80
 	ret
-.L956:
-	mov	w2, 0
-	add	x1, x29, 76
-	mov	w0, w19
-	bl	log2phys
-	tst	x19, 2047
-	bne	.L951
-	ldr	w2, [x29, 76]
-	adrp	x0, .LC98
-	mov	w1, w19
-	add	x0, x0, :lo12:.LC98
-	bl	printf
-.L951:
-	ldr	w1, [x29, 76]
-	cmn	w1, #1
-	beq	.L953
-	add	x0, x20, :lo12:.LANCHOR148
-	str	wzr, [x20, #:lo12:.LANCHOR148]
+.L716:
+	mov	x0, x19
+	bl	get_new_active_ppa
+	str	w0, [x29, 52]
+	cmn	w0, #1
+	beq	.L717
+	ldr	w0, [x22]
+	mov	w3, 0
+	str	w0, [x21, 4]
 	mov	w2, 0
-	str	w1, [x0, 4]
-	adrp	x1, .LANCHOR115
-	str	w19, [x0, 24]
-	ldr	x1, [x1, #:lo12:.LANCHOR115]
-	str	x1, [x0, 8]
-	adrp	x1, .LANCHOR123
-	ldr	x23, [x1, #:lo12:.LANCHOR123]
+	add	w0, w0, 1
 	mov	w1, 1
-	str	x23, [x0, 16]
-	bl	FlashReadPages
-	ldr	w0, [x20, #:lo12:.LANCHOR148]
-	cmp	w0, 256
-	ccmn	w0, #1, 4, ne
-	beq	.L954
-	ldr	w0, [x23, 8]
-	cmp	w19, w0
-	beq	.L953
-.L954:
-	ldp	x1, x0, [x22, 8]
-	ldr	w2, [x1, 4]
-	str	w2, [sp]
-	ldr	w2, [x22, 4]
-	ldp	w3, w4, [x0]
-	ldp	w5, w6, [x0, 8]
-	adrp	x0, .LC99
-	ldr	w7, [x1]
-	add	x0, x0, :lo12:.LC99
-	mov	w1, w19
-	bl	printf
-.L953:
-	add	w19, w19, 1
-	b	.L950
-	.size	ftl_scan_all_data, .-ftl_scan_all_data
-	.section	.text.FtlGcScanTempBlk,"ax",@progbits
+	cmn	w0, #1
+	csel	w0, w0, wzr, ne
+	str	w0, [x22]
+	add	x0, x29, 48
+	bl	FlashProgPages
+	ldrh	w0, [x19]
+	bl	decrement_vpc_count
+	subs	w20, w20, #1
+	bne	.L720
+	b	.L717
+	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
+	.section	.text.FtlMakeBbt,"ax",@progbits
 	.align	2
-	.global	FtlGcScanTempBlk
-	.type	FtlGcScanTempBlk, %function
-FtlGcScanTempBlk:
-	stp	x29, x30, [sp, -160]!
+	.global	FtlMakeBbt
+	.type	FtlMakeBbt, %function
+FtlMakeBbt:
+	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR162
+	mov	w22, 0
 	stp	x19, x20, [sp, 16]
-	mov	x19, x0
-	stp	x27, x28, [sp, 80]
-	mov	w0, 65535
-	ldrh	w20, [x22, #:lo12:.LANCHOR162]
-	mov	w27, w1
+	adrp	x20, .LANCHOR37
 	stp	x23, x24, [sp, 48]
+	add	x21, x20, :lo12:.LANCHOR37
 	stp	x25, x26, [sp, 64]
-	cmp	w20, w0
-	beq	.L982
-	cbnz	w20, .L959
-.L960:
-	bl	FtlGcPageVarInit
-	b	.L961
-.L982:
-	mov	w20, 0
-.L959:
-	adrp	x0, .LANCHOR19
-	ldrh	w0, [x0, #:lo12:.LANCHOR19]
-	cmp	w0, w27
-	beq	.L960
-.L961:
-	adrp	x26, .LANCHOR61
-	add	x26, x26, :lo12:.LANCHOR61
-	mov	w25, 0
-.L962:
-	ldrh	w0, [x19]
-	mov	w23, 65535
-	strb	wzr, [x19, 8]
-	cmp	w0, w23
-	beq	.L963
-.L979:
-	adrp	x1, .LANCHOR91
-	adrp	x24, .LANCHOR112
-	add	x4, x19, 16
-	mov	w21, 0
-	ldr	x5, [x1, #:lo12:.LANCHOR91]
-	adrp	x1, .LANCHOR23
-	ldr	x0, [x24, #:lo12:.LANCHOR112]
-	ldrh	w6, [x1, #:lo12:.LANCHOR23]
-	adrp	x1, .LANCHOR92
-	ldr	x7, [x1, #:lo12:.LANCHOR92]
-	adrp	x1, .LANCHOR24
-	ldrh	w8, [x1, #:lo12:.LANCHOR24]
-	adrp	x1, .LANCHOR3
-	ldrh	w1, [x1, #:lo12:.LANCHOR3]
-	add	x1, x1, 8
-	add	x1, x19, x1, lsl 1
-.L964:
-	cmp	x1, x4
-	bne	.L966
-	mov	w2, 0
-	mov	w1, w21
-	bl	FlashReadPages
-	mov	x28, 0
-	ubfiz	x0, x21, 5, 16
-	str	x0, [x29, 96]
-.L967:
-	ldr	x0, [x29, 96]
-	cmp	x0, x28
-	bne	.L977
-	add	w20, w20, 1
-	add	w25, w25, 1
-	and	w20, w20, 65535
-	cmp	w27, w25
-	adrp	x1, .LANCHOR19
-	bls	.L978
-.L980:
-	ldrh	w0, [x1, #:lo12:.LANCHOR19]
-	cmp	w0, w20
-	bhi	.L979
-.L963:
-	strh	w20, [x19, 2]
-	mov	w0, -1
-	strb	wzr, [x19, 6]
-	mov	w2, 0
-	strh	w0, [x22, #:lo12:.LANCHOR162]
-	mov	w1, w20
-	mov	x0, x19
-	bl	ftl_sb_update_avl_pages
-	b	.L981
-.L966:
-	ldrh	w3, [x4]
-	cmp	w3, w23
-	beq	.L965
-	ubfiz	x2, x21, 5, 16
-	orr	w3, w20, w3, lsl 10
-	add	x2, x0, x2
-	str	w3, [x2, 4]
-	mul	w3, w21, w6
-	asr	w3, w3, 2
-	add	x3, x5, x3, sxtw 2
-	str	x3, [x2, 8]
-	mul	w3, w21, w8
-	add	w21, w21, 1
-	and	w21, w21, 65535
-	asr	w3, w3, 2
-	add	x3, x7, x3, sxtw 2
-	str	x3, [x2, 16]
-.L965:
-	add	x4, x4, 2
-	b	.L964
-.L977:
-	ldr	x1, [x24, #:lo12:.LANCHOR112]
-	add	x0, x1, x28
-	ldr	w1, [x1, x28]
-	ldr	w2, [x0, 4]
-	str	w2, [x29, 108]
-	cbnz	w1, .L968
-	ldr	x21, [x0, 16]
+	add	x24, x21, 32
+	stp	x27, x28, [sp, 80]
+	bl	FtlBbtMemInit
+	bl	FtlLoadFactoryBbt
+	adrp	x28, .LANCHOR138
+	add	x21, x21, 12
+	add	x25, x28, :lo12:.LANCHOR138
+	adrp	x0, .LANCHOR10
+	add	x0, x0, :lo12:.LANCHOR10
+	str	x0, [x29, 120]
+.L729:
+	ldr	x0, [x29, 120]
+	ldrh	w0, [x0]
+	cmp	w22, w0
+	bcc	.L735
+	adrp	x21, .LANCHOR25
+	add	x21, x21, :lo12:.LANCHOR25
+	mov	w19, 0
+.L736:
 	ldrh	w0, [x21]
-	cmp	w0, w23
-	bne	.L969
-.L968:
-	adrp	x0, .LANCHOR42
-	ldrh	w1, [x19]
-	mov	w20, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR42]
-	strh	wzr, [x0, x1, lsl 1]
-	ldrh	w0, [x19]
-	bl	INSERT_FREE_LIST
-	mov	w0, -1
-	strh	w0, [x19]
-	bl	FtlGcPageVarInit
-	b	.L962
-.L969:
-	ldr	w0, [x21, 8]
-	ldr	w1, [x26]
-	cmp	w0, w1
-	bhi	.L968
-	add	x1, x29, 124
-	mov	w2, 0
-	bl	log2phys
-	ldr	w0, [x21, 12]
-	ldr	w1, [x29, 124]
-	cmp	w0, w1
-	beq	.L972
-.L973:
-	ldp	w2, w0, [x21, 8]
-	add	x28, x28, 32
-	ldr	w1, [x29, 108]
-	bl	FtlGcUpdatePage
-	b	.L967
-.L972:
+	cmp	w0, w19
+	bhi	.L737
+	add	x21, x20, :lo12:.LANCHOR37
+	mov	w22, 65535
+	ldrh	w19, [x21, 12]
+	sub	w19, w19, #1
+	and	w19, w19, 65535
+.L738:
+	ldrh	w0, [x21, 12]
+	sub	w0, w0, #47
+	cmp	w0, w19
+	bgt	.L742
+	mov	w0, w19
+	bl	FtlBbmIsBadBlock
+	cmp	w0, 1
+	beq	.L739
+	mov	w0, w19
+	bl	FlashTestBlk
+	cbz	w0, .L740
+	mov	w0, w19
+	bl	FtlBbmMapBadBlock
+.L739:
+	sub	w19, w19, #1
+	and	w19, w19, 65535
+	b	.L738
+.L735:
+	adrp	x2, .LANCHOR114
+	adrp	x0, .LANCHOR106
+	add	x19, x28, :lo12:.LANCHOR138
+	ldrh	w1, [x21]
+	ldr	x0, [x0, #:lo12:.LANCHOR106]
+	mov	w3, 65535
+	ldr	x26, [x2, #:lo12:.LANCHOR114]
+	cmp	w1, w3
+	stp	x0, x26, [x19, 8]
+	adrp	x23, .LANCHOR17
+	str	x2, [x29, 112]
+	beq	.L730
+	ldrh	w4, [x23, #:lo12:.LANCHOR17]
+	mov	w2, 1
+	madd	w27, w4, w22, w1
+	mov	w1, w2
+	lsl	w0, w27, 10
+	str	w0, [x19, 4]
+	mov	x0, x19
+	bl	FlashReadPages
+	ldr	x1, [x19, 8]
+	ldr	x0, [x24]
+	ldrh	w2, [x23, #:lo12:.LANCHOR17]
+	add	w2, w2, 7
+	lsr	w2, w2, 3
+	bl	ftl_memcpy
+.L731:
+	mov	w0, w27
+	add	w22, w22, 1
+	bl	FtlBbmMapBadBlock
+	add	x24, x24, 8
+	add	x21, x21, 2
+	b	.L729
+.L730:
+	mov	w1, w22
+	bl	FlashGetBadBlockList
+	ldr	x0, [x19, 8]
+	ldr	x1, [x24]
+	bl	FtlBbt2Bitmap
+	ldrh	w19, [x23, #:lo12:.LANCHOR17]
+	add	x23, x23, :lo12:.LANCHOR17
+	adrp	x0, .LANCHOR127
+	sub	w19, w19, #1
+	add	x0, x0, :lo12:.LANCHOR127
+	and	w19, w19, 65535
+	str	x0, [x29, 104]
+.L732:
+	ldrh	w0, [x23]
+	madd	w0, w22, w0, w19
+	bl	FtlBbmIsBadBlock
+	cmp	w0, 1
+	beq	.L733
+	ldr	x0, [x29, 112]
+	mov	w2, 16
+	strh	w19, [x21]
+	mov	w1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR114]
+	bl	ftl_memset
+	adrp	x0, .LANCHOR106
+	mov	w2, 4096
+	mov	w1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR106]
+	bl	ftl_memset
+	mov	w0, -3872
+	strh	w0, [x26]
+	ldrh	w4, [x23]
+	ldrh	w0, [x21]
+	strh	w0, [x26, 2]
+	ldr	x1, [x24]
+	str	wzr, [x26, 4]
+	madd	w27, w4, w22, w0
+	lsl	w0, w27, 10
+	str	w0, [x25, 4]
+	ldr	x0, [x29, 104]
+	ldrh	w2, [x0]
+	ldr	x0, [x25, 8]
+	lsl	w2, w2, 2
+	bl	ftl_memcpy
+	mov	w2, 1
+	mov	x0, x25
+	mov	w1, w2
+	bl	FlashEraseBlocks
+	mov	w3, 1
+	mov	x0, x25
+	mov	w2, w3
+	mov	w1, w3
+	bl	FlashProgPages
+	ldr	w0, [x25]
 	cmn	w0, #1
-	beq	.L973
-	str	w0, [x29, 132]
-	adrp	x0, .LANCHOR119
-	mov	w2, 0
+	bne	.L731
+	mov	w0, w27
+	bl	FtlBbmMapBadBlock
+	b	.L732
+.L733:
+	sub	w19, w19, #1
+	and	w19, w19, 65535
+	b	.L732
+.L737:
+	mov	w0, w19
+	add	w19, w19, 1
+	bl	FtlBbmMapBadBlock
+	and	w19, w19, 65535
+	b	.L736
+.L740:
+	ldrh	w0, [x21]
+	cmp	w0, w22
+	bne	.L741
+	strh	w19, [x21]
+	b	.L739
+.L741:
+	strh	w19, [x21, 4]
+.L742:
+	adrp	x0, .LANCHOR79
+	add	x19, x20, :lo12:.LANCHOR37
+	ldrh	w1, [x20, #:lo12:.LANCHOR37]
+	mov	w2, 2
+	ldr	x0, [x0, #:lo12:.LANCHOR79]
+	str	wzr, [x19, 8]
+	lsl	w1, w1, 10
+	strh	wzr, [x19, 2]
+	str	w1, [x0, 4]
+	ldrh	w1, [x19, 4]
+	lsl	w1, w1, 10
+	str	w1, [x0, 36]
 	mov	w1, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR119]
-	str	x0, [x29, 136]
-	adrp	x0, .LANCHOR124
-	ldr	x0, [x0, #:lo12:.LANCHOR124]
-	str	x0, [x29, 144]
-	add	x0, x29, 128
-	bl	FlashReadPages
-	adrp	x0, .LANCHOR12
-	ldr	x2, [x24, #:lo12:.LANCHOR112]
-	ldr	x5, [x29, 136]
-	ldrh	w1, [x0, #:lo12:.LANCHOR12]
-	add	x2, x2, x28
-	mov	x0, 0
-	ubfiz	x1, x1, 9, 16
-.L974:
-	cmp	x0, x1
-	beq	.L973
-	ldr	x6, [x2, 8]
-	ldr	w7, [x6, x0]
-	add	x0, x0, 4
-	add	x6, x5, x0
-	ldr	w6, [x6, -4]
-	cmp	w7, w6
-	beq	.L974
-	ldrh	w1, [x19]
-	adrp	x0, .LC100
-	ldr	w2, [x29, 132]
-	add	x0, x0, :lo12:.LC100
-	bl	printf
-	b	.L968
-.L978:
-	ldrh	w0, [x22, #:lo12:.LANCHOR162]
-	cmp	w0, w23
-	beq	.L980
-	add	w0, w0, w25
-	strh	w0, [x22, #:lo12:.LANCHOR162]
-	ldrh	w0, [x1, #:lo12:.LANCHOR19]
-	cmp	w0, w20
-	bls	.L980
-.L981:
+	bl	FlashEraseBlocks
+	ldrh	w0, [x20, #:lo12:.LANCHOR37]
+	bl	FtlBbmMapBadBlock
+	ldrh	w0, [x19, 4]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	strh	wzr, [x19, 2]
+	ldr	w0, [x19, 8]
+	ldrh	w1, [x19, 4]
+	add	w0, w0, 1
+	str	w0, [x19, 8]
+	ldrh	w0, [x20, #:lo12:.LANCHOR37]
+	strh	w0, [x19, 4]
+	strh	w1, [x20, #:lo12:.LANCHOR37]
+	bl	FtlBbmTblFlush
+	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-	mov	w0, -1
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 160
+	ldp	x29, x30, [sp], 128
 	ret
-	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
-	.section	.text.FtlReadRefresh,"ax",@progbits
+	.size	FtlMakeBbt, .-FtlMakeBbt
+	.section	.text.ftl_memcmp,"ax",@progbits
 	.align	2
-	.global	FtlReadRefresh
-	.type	FtlReadRefresh, %function
-FtlReadRefresh:
-	adrp	x1, .LANCHOR81
-	add	x0, x1, :lo12:.LANCHOR81
-	ldr	w2, [x0, 80]
-	cbz	w2, .L993
-	adrp	x1, .LANCHOR61
-	ldr	w3, [x0, 84]
-	ldr	w2, [x1, #:lo12:.LANCHOR61]
-	cmp	w3, w2
-	bcs	.L994
-	stp	x29, x30, [sp, -160]!
+	.global	ftl_memcmp
+	.type	ftl_memcmp, %function
+ftl_memcmp:
+	uxtw	x2, w2
+	b	memcmp
+	.size	ftl_memcmp, .-ftl_memcmp
+	.section	.text.js_hash,"ax",@progbits
+	.align	2
+	.global	js_hash
+	.type	js_hash, %function
+js_hash:
+	mov	x4, x0
+	mov	w0, 42982
+	mov	x3, 0
+	movk	w0, 0x47c6, lsl 16
+.L750:
+	cmp	w1, w3
+	bhi	.L751
+	ret
+.L751:
+	lsr	w2, w0, 2
+	ldrb	w5, [x4, x3]
+	add	w2, w2, w0, lsl 5
+	add	x3, x3, 1
+	add	w2, w2, w5
+	eor	w0, w0, w2
+	b	.L750
+	.size	js_hash, .-js_hash
+	.section	.text.Ftl_write_map_blk_to_last_page,"ax",@progbits
+	.align	2
+	.global	Ftl_write_map_blk_to_last_page
+	.type	Ftl_write_map_blk_to_last_page, %function
+Ftl_write_map_blk_to_last_page:
+	stp	x29, x30, [sp, -64]!
+	mov	w1, 65535
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	add	x20, x1, :lo12:.LANCHOR61
-	str	x21, [sp, 32]
-	mov	w21, 2048
-.L999:
-	ldr	w0, [x19, 84]
-	ldr	w1, [x20]
+	ldr	x20, [x0, 16]
+	stp	x21, x22, [sp, 32]
+	ldrh	w0, [x0]
+	stp	x23, x24, [sp, 48]
 	cmp	w0, w1
-	bcs	.L996
-	add	x1, x29, 60
-	mov	w2, 0
-	bl	log2phys
-	ldr	w0, [x19, 84]
-	ldr	w1, [x29, 60]
+	bne	.L753
+	ldrh	w0, [x19, 8]
+	cbz	w0, .L754
+	adrp	x1, .LANCHOR148
+	adrp	x0, .LC1
+	mov	w2, 641
+	add	x1, x1, :lo12:.LANCHOR148
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L754:
+	ldrh	w0, [x19, 8]
 	add	w0, w0, 1
-	str	w0, [x19, 84]
-	cmn	w1, #1
-	beq	.L997
-	str	w0, [x29, 88]
-	adrp	x0, .LANCHOR121
-	str	w1, [x29, 68]
-	mov	w2, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR121]
-	mov	w1, 1
-	str	x0, [x29, 72]
-	add	x0, x29, 96
-	str	x0, [x29, 80]
-	add	x0, x29, 160
-	str	wzr, [x0, -96]!
-	bl	FlashReadPages
-	ldr	w0, [x29, 64]
-	cmp	w0, 256
-	bne	.L996
-	ldr	w0, [x29, 60]
-	lsr	w0, w0, 10
-	bl	P2V_block_in_plane
-	bl	FtlGcRefreshBlock
-.L996:
-	ldp	x19, x20, [sp, 16]
-	mov	w0, -1
-	ldr	x21, [sp, 32]
-	ldp	x29, x30, [sp], 160
-	ret
-.L997:
-	subs	w21, w21, #1
-	bne	.L999
-	b	.L996
-.L994:
-	adrp	x1, .LANCHOR62
-	str	wzr, [x0, 84]
-	ldr	w1, [x1, #:lo12:.LANCHOR62]
-	stp	w1, wzr, [x0, 76]
-.L1003:
+	strh	w0, [x19, 8]
+	bl	FtlFreeSysBlkQueueOut
+	strh	w0, [x20]
+	ldr	w0, [x19, 48]
+	strh	wzr, [x19, 2]
+	add	w0, w0, 1
+	strh	wzr, [x19]
+	str	w0, [x19, 48]
+.L755:
 	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
 	ret
-.L993:
-	ldr	w4, [x0, 76]
-	adrp	x0, .LANCHOR62
-	ldr	w2, [x0, #:lo12:.LANCHOR62]
-	add	w0, w2, 1048576
-	cmp	w4, w0
-	bhi	.L1002
-	adrp	x0, .LANCHOR76
-	ldr	w0, [x0, #:lo12:.LANCHOR76]
-	lsr	w3, w0, 10
-	mov	w0, 33554432
-	asr	w0, w0, w3
-	add	w0, w0, w4
-	cmp	w2, w0
-	bhi	.L1002
-	adrp	x0, .LANCHOR39+28
-	ldrb	w0, [x0, #:lo12:.LANCHOR39+28]
-	cbnz	w0, .L1003
-.L1002:
-	add	x0, x1, :lo12:.LANCHOR81
-	mov	w1, 1
-	str	wzr, [x0, 84]
-	stp	w2, w1, [x0, 76]
-	b	.L1003
-	.size	FtlReadRefresh, .-FtlReadRefresh
-	.section	.text.FtlMapBlkWriteDump_data,"ax",@progbits
-	.align	2
-	.global	FtlMapBlkWriteDump_data
-	.type	FtlMapBlkWriteDump_data, %function
-FtlMapBlkWriteDump_data:
-	ldr	w1, [x0, 56]
-	cbz	w1, .L1009
-	stp	x29, x30, [sp, -48]!
-	adrp	x1, .LANCHOR148
-	adrp	x2, .LANCHOR123
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	x19, x0
-	ldrh	w20, [x0, 6]
-	adrp	x0, .LANCHOR116
-	ldr	x2, [x2, #:lo12:.LANCHOR123]
-	ldr	x3, [x0, #:lo12:.LANCHOR116]
-	add	x0, x1, :lo12:.LANCHOR148
-	sub	w20, w20, #1
-	ldr	x4, [x19, 40]
-	and	w20, w20, 65535
-	str	x21, [sp, 32]
-	stp	x3, x2, [x0, 8]
-	ubfiz	x2, x20, 2, 16
-	str	wzr, [x19, 56]
-	mov	x21, x1
-	ldr	w2, [x4, x2]
-	str	w2, [x0, 4]
-	cbz	w2, .L1011
+.L753:
+	ubfiz	x0, x0, 1, 16
+	adrp	x2, .LANCHOR114
+	adrp	x24, .LANCHOR106
+	ldr	x23, [x19, 40]
+	ldr	x21, [x2, #:lo12:.LANCHOR114]
+	ldrh	w22, [x20, x0]
+	adrp	x20, .LANCHOR138
+	ldrh	w0, [x19, 2]
+	add	x1, x20, :lo12:.LANCHOR138
+	orr	w0, w0, w22, lsl 10
+	str	w0, [x1, 4]
+	ldr	x0, [x24, #:lo12:.LANCHOR106]
+	str	x21, [x1, 16]
+	str	x0, [x1, 8]
+	ldr	w1, [x19, 48]
+	str	w1, [x21, 4]
+	mov	w1, -1291
+	strh	w1, [x21, 8]
+	ldrh	w1, [x19, 4]
+	strh	w1, [x21]
+	adrp	x1, .LANCHOR20
+	strh	w22, [x21, 2]
+	ldrh	w2, [x1, #:lo12:.LANCHOR20]
+	mov	w1, 255
+	lsl	w2, w2, 3
+	bl	ftl_memset
+	ldrh	w4, [x19, 6]
+	mov	x0, 0
+	ldr	x3, [x24, #:lo12:.LANCHOR106]
+	mov	w1, 0
+.L756:
+	cmp	w4, w0, uxth
+	bhi	.L758
+	add	x20, x20, :lo12:.LANCHOR138
+	adrp	x0, .LANCHOR23
+	ldrh	w1, [x0, #:lo12:.LANCHOR23]
+	ldr	x0, [x20, 8]
+	bl	js_hash
+	str	w0, [x21, 12]
 	mov	w2, 1
+	mov	w3, 0
 	mov	w1, w2
-	bl	FlashReadPages
-.L1012:
-	add	x1, x21, :lo12:.LANCHOR148
+	mov	x0, x20
+	bl	FlashProgPages
+	ldrh	w0, [x19, 2]
+	add	w0, w0, 1
+	strh	w0, [x19, 2]
 	mov	x0, x19
-	ldr	x21, [sp, 32]
-	ldr	x2, [x1, 8]
-	mov	w1, w20
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
-	b	FtlMapWritePage
-.L1011:
-	adrp	x0, .LANCHOR23
-	mov	w1, 255
-	ldrh	w2, [x0, #:lo12:.LANCHOR23]
-	mov	x0, x3
-	bl	ftl_memset
-	b	.L1012
-.L1009:
-	ret
-	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
-	.section	.text.FlashTestBlk,"ax",@progbits
+	bl	ftl_map_blk_gc
+	b	.L755
+.L758:
+	ldr	w2, [x23, x0, lsl 2]
+	cmp	w22, w2, lsr 10
+	bne	.L757
+	add	w1, w1, 1
+	and	w1, w1, 65535
+	ubfiz	x2, x1, 1, 16
+	str	w0, [x3, x2, lsl 2]
+	add	x2, x2, 1
+	ldr	w5, [x23, x0, lsl 2]
+	str	w5, [x3, x2, lsl 2]
+.L757:
+	add	x0, x0, 1
+	b	.L756
+	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
+	.section	.text.FtlMapWritePage,"ax",@progbits
 	.align	2
-	.global	FlashTestBlk
-	.type	FlashTestBlk, %function
-FlashTestBlk:
-	stp	x29, x30, [sp, -128]!
+	.global	FtlMapWritePage
+	.type	FtlMapWritePage, %function
+FtlMapWritePage:
+	stp	x29, x30, [sp, -112]!
 	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR88
+	stp	x25, x26, [sp, 64]
+	adrp	x24, .LANCHOR149
+	stp	x27, x28, [sp, 80]
+	adrp	x26, .LANCHOR20
 	stp	x19, x20, [sp, 16]
-	and	w19, w0, 65535
-	cmp	w19, 11
-	bls	.L1018
-	adrp	x20, .LANCHOR121
-	mov	w2, 32
-	mov	w1, 165
-	lsl	w19, w19, 10
-	ldr	x0, [x20, #:lo12:.LANCHOR121]
-	str	x0, [x29, 40]
-	add	x0, x29, 64
-	str	x0, [x29, 48]
-	bl	ftl_memset
-	ldr	x0, [x20, #:lo12:.LANCHOR121]
-	mov	w2, 8
-	mov	w1, 90
+	mov	w25, w1
+	mov	x19, x0
+	mov	x27, x2
+	add	x23, x23, :lo12:.LANCHOR88
+	add	x24, x24, :lo12:.LANCHOR149
+	add	x28, x26, :lo12:.LANCHOR20
+	stp	x21, x22, [sp, 32]
+	mov	w22, 0
+.L764:
+	ldr	w0, [x23]
+	ldrh	w1, [x19, 2]
+	add	w0, w0, 1
+	str	w0, [x23]
+	ldrh	w0, [x26, #:lo12:.LANCHOR20]
+	sub	w0, w0, #1
+	cmp	w1, w0
+	bge	.L765
+	ldrh	w1, [x19]
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L766
+.L765:
+	mov	x0, x19
+	bl	Ftl_write_map_blk_to_last_page
+.L766:
+	ldrh	w1, [x19]
+	ldr	x0, [x19, 16]
+	ldrh	w0, [x0, x1, lsl 1]
+	cbnz	w0, .L767
+	adrp	x0, .LC1
+	mov	w2, 700
+	mov	x1, x24
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L767:
+	ldrh	w1, [x19]
+	ldrh	w0, [x19, 10]
+	cmp	w1, w0
+	bcc	.L768
+	adrp	x0, .LC1
+	mov	w2, 701
+	mov	x1, x24
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L768:
+	ldrh	w1, [x19]
+	adrp	x21, .LANCHOR138
+	ldr	x0, [x19, 16]
+	add	x20, x21, :lo12:.LANCHOR138
+	mov	w2, 16
+	ldrh	w3, [x0, x1, lsl 1]
+	mov	w1, 0
+	ldrh	w0, [x19, 2]
+	str	w3, [x29, 108]
+	str	x27, [x20, 8]
+	orr	w0, w0, w3, lsl 10
+	str	w0, [x20, 4]
+	adrp	x0, .LANCHOR114
+	ldr	x0, [x0, #:lo12:.LANCHOR114]
+	str	x0, [x20, 16]
 	bl	ftl_memset
-	str	w19, [x29, 36]
-	mov	w2, 1
-	add	x0, x29, 32
-	mov	w1, w2
-	bl	FlashEraseBlocks
+	ldr	x6, [x20, 16]
+	ldr	w0, [x19, 48]
+	ldr	w3, [x29, 108]
+	str	w0, [x6, 4]
+	ldrh	w0, [x19, 4]
+	strh	w0, [x6]
+	adrp	x0, .LANCHOR23
+	strh	w3, [x6, 2]
+	strh	w25, [x6, 8]
+	ldrh	w1, [x0, #:lo12:.LANCHOR23]
+	ldr	x0, [x20, 8]
+	bl	js_hash
+	str	w0, [x6, 12]
 	mov	w3, 1
-	add	x0, x29, 32
-	mov	w2, w3
+	mov	x0, x20
 	mov	w1, w3
+	mov	w2, w3
 	bl	FlashProgPages
-	ldr	w0, [x29, 32]
-	mov	w2, 1
-	mov	w1, 0
-	cmp	w0, 0
-	add	x0, x29, 32
-	csetm	w19, ne
-	bl	FlashEraseBlocks
-.L1016:
-	mov	w0, w19
+	ldrh	w0, [x19, 2]
+	ldr	w1, [x21, #:lo12:.LANCHOR138]
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	strh	w0, [x19, 2]
+	cmn	w1, #1
+	bne	.L769
+	ldr	w1, [x20, 4]
+	adrp	x0, .LC18
+	add	x0, x0, :lo12:.LC18
+	add	w22, w22, 1
+	and	w22, w22, 65535
+	bl	printf
+	ldrh	w0, [x19, 2]
+	cmp	w0, 2
+	bhi	.L770
+	ldrh	w0, [x28]
+	sub	w0, w0, #1
+	strh	w0, [x19, 2]
+.L770:
+	cmp	w22, 3
+	bls	.L771
+	add	x21, x21, :lo12:.LANCHOR138
+	adrp	x0, .LC19
+	mov	w2, w22
+	add	x0, x0, :lo12:.LC19
+	ldr	w1, [x21, 4]
+	bl	printf
+.L772:
+	b	.L772
+.L771:
+	ldr	w0, [x19, 52]
+	cbz	w0, .L764
+.L786:
+	b	.L786
+.L769:
+	cmp	w0, 1
+	beq	.L775
+	cmp	w1, 256
+	beq	.L775
+	ldr	w0, [x19, 56]
+	cbz	w0, .L776
+.L775:
+	str	wzr, [x19, 56]
+	b	.L764
+.L776:
+	ldr	x0, [x19, 40]
+	ldr	w1, [x20, 4]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x27, x28, [sp, 80]
+	str	w1, [x0, w25, uxtw 2]
 	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 128
+	mov	w0, 0
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 112
 	ret
-.L1018:
-	mov	w19, 0
-	b	.L1016
-	.size	FlashTestBlk, .-FlashTestBlk
-	.section	.text.FtlBbmTblFlush,"ax",@progbits
+	.size	FtlMapWritePage, .-FtlMapWritePage
+	.section	.text.load_l2p_region,"ax",@progbits
 	.align	2
-	.global	FtlBbmTblFlush
-	.type	FtlBbmTblFlush, %function
-FtlBbmTblFlush:
+	.global	load_l2p_region
+	.type	load_l2p_region, %function
+load_l2p_region:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR123
+	adrp	x24, .LANCHOR32
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR148
+	and	w20, w0, 65535
 	stp	x21, x22, [sp, 32]
-	add	x19, x20, :lo12:.LANCHOR148
-	adrp	x22, .LANCHOR115
-	ldr	x1, [x23, #:lo12:.LANCHOR123]
+	and	x19, x1, 65535
+	ldrh	w0, [x24, #:lo12:.LANCHOR32]
 	stp	x25, x26, [sp, 64]
-	adrp	x21, .LANCHOR37
 	str	x27, [sp, 80]
-	add	x25, x21, :lo12:.LANCHOR37
-	ldr	x0, [x22, #:lo12:.LANCHOR115]
-	adrp	x26, .LANCHOR10
-	stp	x0, x1, [x19, 8]
+	cmp	w0, w20
+	bcs	.L789
+	adrp	x1, .LANCHOR150
+	adrp	x0, .LC1
+	mov	w2, 485
+	add	x1, x1, :lo12:.LANCHOR150
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L789:
+	adrp	x27, .LANCHOR124
+	ubfiz	x0, x20, 2, 16
+	adrp	x22, .LANCHOR55
+	ldr	x1, [x27, #:lo12:.LANCHOR124]
+	ldr	w23, [x1, x0]
+	cbnz	w23, .L790
+	ldr	x0, [x22, #:lo12:.LANCHOR55]
+	lsl	x19, x19, 4
 	adrp	x1, .LANCHOR23
-	adrp	x27, .LANCHOR137
-	add	x25, x25, 32
+	add	x0, x0, x19
 	ldrh	w2, [x1, #:lo12:.LANCHOR23]
-	mov	w24, 0
-	add	x26, x26, :lo12:.LANCHOR10
-	add	x27, x27, :lo12:.LANCHOR137
-	mov	w1, 0
-	bl	ftl_memset
-.L1021:
-	ldrh	w0, [x26]
-	cmp	w24, w0
-	blt	.L1022
-	add	x20, x20, :lo12:.LANCHOR148
-	add	x19, x21, :lo12:.LANCHOR37
-	mov	w2, 16
 	mov	w1, 255
-	adrp	x24, .LC101
-	adrp	x26, .LANCHOR20
-	ldr	x27, [x20, 16]
-	add	x24, x24, :lo12:.LC101
-	add	x26, x26, :lo12:.LANCHOR20
-	mov	w25, 0
-	mov	x0, x27
+	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	mov	w0, -3887
-	strh	w0, [x27]
-	ldr	w0, [x19, 8]
-	str	w0, [x27, 4]
-	ldrh	w0, [x21, #:lo12:.LANCHOR37]
-	mov	w21, 0
-	strh	w0, [x27, 2]
-	ldrh	w0, [x19, 4]
-	strh	w0, [x27, 8]
-	ldrh	w0, [x19, 6]
-	strh	w0, [x27, 10]
-	adrp	x0, .LANCHOR2
-	ldr	w0, [x0, #:lo12:.LANCHOR2]
-	strh	w0, [x27, 12]
-.L1023:
-	ldrh	w1, [x19]
-	ldrh	w4, [x27, 10]
-	ldrh	w2, [x19, 2]
-	ldrh	w3, [x19, 4]
-	ldr	x0, [x22, #:lo12:.LANCHOR115]
-	str	x0, [x20, 8]
-	ldr	x0, [x23, #:lo12:.LANCHOR123]
-	str	x0, [x20, 16]
-	orr	w0, w2, w1, lsl 10
-	str	wzr, [x20]
-	str	w0, [x20, 4]
-	mov	x0, x24
-	bl	printf
-	ldrh	w0, [x26]
-	ldrh	w1, [x19, 2]
-	sub	w0, w0, #1
-	cmp	w1, w0
-	blt	.L1024
-	ldr	w0, [x19, 8]
-	mov	w2, 1
-	ldrh	w1, [x19, 4]
-	add	w0, w0, 1
-	str	w0, [x19, 8]
-	str	w0, [x27, 4]
-	ldrh	w0, [x19]
-	strh	w0, [x27, 8]
-	strh	w0, [x19, 4]
-	adrp	x0, .LANCHOR106
-	strh	w1, [x19]
-	lsl	w1, w1, 10
-	ldr	x0, [x0, #:lo12:.LANCHOR106]
-	str	w1, [x20, 4]
-	strh	wzr, [x19, 2]
-	str	w1, [x0, 4]
-	mov	w1, w2
-	bl	FlashEraseBlocks
-.L1024:
-	mov	w3, 1
-	mov	x0, x20
-	mov	w2, w3
-	mov	w1, w3
-	bl	FlashProgPages
-	ldrh	w0, [x19, 2]
-	add	w0, w0, 1
-	strh	w0, [x19, 2]
-	ldr	w0, [x20]
-	cmn	w0, #1
-	bne	.L1025
-	ldr	w1, [x20, 4]
-	add	w21, w21, 1
-	adrp	x0, .LC102
-	and	w21, w21, 65535
-	add	x0, x0, :lo12:.LC102
-	bl	printf
-	cmp	w21, 3
-	bls	.L1023
-	ldr	w1, [x20, 4]
-	adrp	x0, .LC103
-	mov	w2, w21
-	add	x0, x0, :lo12:.LC103
-	bl	printf
-.L1027:
-	b	.L1027
-.L1022:
-	ldrh	w2, [x27]
-	ldr	x1, [x25], 8
-	ldr	x0, [x19, 8]
-	mul	w3, w24, w2
-	lsl	w2, w2, 2
-	add	w24, w24, 1
-	add	x0, x0, x3, sxtw 2
-	bl	ftl_memcpy
-	b	.L1021
-.L1028:
-	mov	w25, 1
-	b	.L1023
-.L1025:
-	cbz	w25, .L1028
+	ldr	x0, [x22, #:lo12:.LANCHOR55]
+	add	x1, x0, x19
+	strh	w20, [x0, x19]
+	str	wzr, [x1, 4]
+.L791:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -7574,566 +5941,454 @@ FtlBbmTblFlush:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
-	.section	.text.allocate_data_superblock,"ax",@progbits
+.L790:
+	ldr	x0, [x22, #:lo12:.LANCHOR55]
+	lsl	x19, x19, 4
+	adrp	x26, .LANCHOR138
+	add	x21, x26, :lo12:.LANCHOR138
+	add	x0, x0, x19
+	mov	w2, 1
+	mov	w1, w2
+	str	w23, [x21, 4]
+	ldr	x0, [x0, 8]
+	str	x0, [x21, 8]
+	adrp	x0, .LANCHOR114
+	ldr	x0, [x0, #:lo12:.LANCHOR114]
+	str	x0, [x21, 16]
+	mov	x0, x21
+	bl	FlashReadPages
+	ldr	x25, [x21, 16]
+	ldrh	w0, [x25, 8]
+	cmp	w0, w20
+	beq	.L792
+	mov	w2, w23
+	mov	w1, w20
+	adrp	x0, .LC20
+	add	x0, x0, :lo12:.LC20
+	bl	printf
+	ldr	x1, [x21, 16]
+	mov	w3, 4
+	adrp	x0, .LC21
+	mov	w2, w3
+	add	x0, x0, :lo12:.LC21
+	bl	rknand_print_hex
+	ldrh	w3, [x24, #:lo12:.LANCHOR32]
+	adrp	x0, .LC22
+	ldr	x1, [x27, #:lo12:.LANCHOR124]
+	mov	w2, 4
+	add	x0, x0, :lo12:.LC22
+	bl	rknand_print_hex
+.L793:
+	ldrh	w0, [x25, 8]
+	cmp	w0, w20
+	beq	.L794
+	adrp	x1, .LANCHOR150
+	adrp	x0, .LC1
+	mov	w2, 508
+	add	x1, x1, :lo12:.LANCHOR150
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L794:
+	ldr	x0, [x22, #:lo12:.LANCHOR55]
+	add	x1, x0, x19
+	str	wzr, [x1, 4]
+	strh	w20, [x0, x19]
+	b	.L791
+.L792:
+	ldr	w0, [x26, #:lo12:.LANCHOR138]
+	cmp	w0, 256
+	bne	.L793
+	mov	w2, w23
+	mov	w1, w20
+	adrp	x0, .LC23
+	add	x0, x0, :lo12:.LC23
+	bl	printf
+	ldr	x0, [x22, #:lo12:.LANCHOR55]
+	mov	w1, w20
+	add	x0, x0, x19
+	ldr	x2, [x0, 8]
+	adrp	x0, .LANCHOR129
+	add	x0, x0, :lo12:.LANCHOR129
+	bl	FtlMapWritePage
+	b	.L793
+	.size	load_l2p_region, .-load_l2p_region
+	.section	.text.ftl_map_blk_gc,"ax",@progbits
 	.align	2
-	.global	allocate_data_superblock
-	.type	allocate_data_superblock, %function
-allocate_data_superblock:
-	stp	x29, x30, [sp, -112]!
+	.global	ftl_map_blk_gc
+	.type	ftl_map_blk_gc, %function
+ftl_map_blk_gc:
+	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
-	stp	x27, x28, [sp, 80]
-	adrp	x28, .LANCHOR48
-	stp	x23, x24, [sp, 48]
-	add	x24, x28, :lo12:.LANCHOR48
 	stp	x19, x20, [sp, 16]
-	adrp	x27, .LANCHOR45
 	mov	x19, x0
-	stp	x21, x22, [sp, 32]
-	add	x0, x27, :lo12:.LANCHOR45
+	stp	x23, x24, [sp, 48]
+	adrp	x24, .LANCHOR20
 	stp	x25, x26, [sp, 64]
-	str	x0, [x29, 104]
-.L1031:
-	ldr	x1, [x29, 104]
-	adrp	x23, .LANCHOR5
-	ldrh	w0, [x28, #:lo12:.LANCHOR48]
-	ldrh	w1, [x1]
-	add	w0, w0, w1
-	ldrh	w1, [x23, #:lo12:.LANCHOR5]
-	cmp	w0, w1
-	ble	.L1032
-	adrp	x1, .LANCHOR163
-	adrp	x0, .LC1
-	mov	w2, 2615
-	add	x1, x1, :lo12:.LANCHOR163
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L1032:
-	adrp	x0, .LANCHOR53
-	add	x0, x0, :lo12:.LANCHOR53
-	cmp	x19, x0
-	bne	.L1058
-	adrp	x1, .LANCHOR87
-	ldrh	w0, [x24]
-	ldr	w1, [x1, #:lo12:.LANCHOR87]
-	mul	w1, w0, w1
-	lsr	w0, w0, 1
-	add	w0, w0, 1
-	add	w1, w0, w1, lsr 2
-	ands	w1, w1, 65535
-	beq	.L1033
-	sub	w1, w1, #1
-	and	w1, w1, 65535
-.L1033:
-	adrp	x0, .LANCHOR47
-	add	x0, x0, :lo12:.LANCHOR47
-	bl	List_pop_index_node
-	and	w22, w0, 65535
-	ldrh	w0, [x24]
-	cbnz	w0, .L1034
-	adrp	x1, .LANCHOR163
-	adrp	x0, .LC1
-	mov	w2, 2624
-	add	x1, x1, :lo12:.LANCHOR163
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L1034:
-	ldrh	w0, [x24]
+	stp	x21, x22, [sp, 32]
+	stp	x27, x28, [sp, 80]
+	ldr	x20, [x0, 16]
+	ldr	x25, [x0, 40]
+	bl	ftl_free_no_use_map_blk
+	ldrh	w1, [x19, 10]
+	ldrh	w2, [x19, 8]
+	sub	w1, w1, #5
+	cmp	w2, w1
+	blt	.L797
+	ubfiz	x0, x0, 1, 16
+	ldrh	w22, [x20, x0]
+	cbz	w22, .L797
+	ldr	w1, [x19, 52]
+	cbnz	w1, .L797
+	mov	w1, 1
+	str	w1, [x19, 52]
+	strh	wzr, [x20, x0]
+	ldrh	w0, [x19, 8]
+	ldrh	w1, [x19, 2]
 	sub	w0, w0, #1
-	strh	w0, [x24]
-	ldrh	w0, [x23, #:lo12:.LANCHOR5]
-	cmp	w0, w22
-	bls	.L1031
-	adrp	x25, .LANCHOR42
-	ubfiz	x20, x22, 1, 16
-	ldr	x0, [x25, #:lo12:.LANCHOR42]
-	ldrh	w21, [x0, x20]
-	cbnz	w21, .L1031
-	strh	w22, [x19]
+	strh	w0, [x19, 8]
+	ldrh	w0, [x24, #:lo12:.LANCHOR20]
+	cmp	w1, w0
+	bcc	.L798
 	mov	x0, x19
-	bl	make_superblock
-	ldrb	w0, [x19, 7]
-	cbnz	w0, .L1036
-	ldr	x0, [x25, #:lo12:.LANCHOR42]
-	mov	w1, -1
-	strh	w1, [x0, x20]
+	bl	ftl_map_blk_alloc_new_blk
+.L798:
+	adrp	x26, .LANCHOR138
+	adrp	x23, .LANCHOR151
+	add	x27, x26, :lo12:.LANCHOR138
+	add	x23, x23, :lo12:.LANCHOR151
+	mov	w20, 0
+.L799:
+	ldrh	w0, [x19, 6]
+	cmp	w0, w20
+	bhi	.L806
+	mov	w1, 1
 	mov	w0, w22
-	bl	INSERT_DATA_LIST
-	ldrh	w1, [x27, #:lo12:.LANCHOR45]
-	ldrh	w0, [x24]
-	add	w0, w0, w1
-	ldrh	w1, [x23, #:lo12:.LANCHOR5]
-	cmp	w0, w1
-	ble	.L1031
-	mov	w2, 2638
-	adrp	x1, .LANCHOR163
+	bl	FtlFreeSysBlkQueueIn
+	str	wzr, [x19, 52]
+.L797:
+	ldrh	w1, [x19, 2]
+	ldrh	w0, [x24, #:lo12:.LANCHOR20]
+	cmp	w1, w0
+	bcc	.L807
+	mov	x0, x19
+	bl	ftl_map_blk_alloc_new_blk
+.L807:
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	ret
+.L806:
+	ubfiz	x0, x20, 2, 16
+	add	x28, x25, x0
+	ldr	w1, [x25, x0]
+	cmp	w22, w1, lsr 10
+	bne	.L800
+	adrp	x2, .LANCHOR107
+	add	x0, x26, :lo12:.LANCHOR138
+	ldr	x2, [x2, #:lo12:.LANCHOR107]
+	str	x2, [x0, 8]
+	adrp	x2, .LANCHOR114
+	str	w1, [x0, 4]
+	ldr	x21, [x2, #:lo12:.LANCHOR114]
+	mov	w2, 1
+	str	x21, [x0, 16]
+	mov	w1, w2
+	bl	FlashReadPages
+	ldrh	w0, [x21, 8]
+	cmp	w0, w20
+	beq	.L801
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR163
+	mov	w2, 611
+	mov	x1, x23
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	b	.L1031
-.L1058:
-	mov	w1, 0
-	b	.L1033
-.L1036:
-	ldrh	w1, [x27, #:lo12:.LANCHOR45]
-	ldrh	w0, [x24]
-	add	w0, w0, w1
-	ldrh	w1, [x23, #:lo12:.LANCHOR5]
-	cmp	w0, w1
-	ble	.L1038
-	adrp	x1, .LANCHOR163
-	adrp	x0, .LC1
-	mov	w2, 2641
-	add	x1, x1, :lo12:.LANCHOR163
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L1038:
-	adrp	x0, .LANCHOR3
-	adrp	x25, .LANCHOR106
-	add	x26, x19, 16
-	mov	w6, 65535
-	ldrh	w0, [x0, #:lo12:.LANCHOR3]
-	mov	x4, x26
-	ldr	x3, [x25, #:lo12:.LANCHOR106]
-	ubfiz	x0, x0, 5, 16
-	add	x1, x3, 8
-	add	x0, x0, 8
-	add	x0, x3, x0
-.L1039:
-	cmp	x0, x1
-	bne	.L1041
-	cbnz	w21, .L1042
-	adrp	x1, .LANCHOR163
-	adrp	x0, .LC1
-	mov	w2, 2652
-	add	x1, x1, :lo12:.LANCHOR163
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L1042:
-	adrp	x0, .LANCHOR80
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
-	cmp	w0, w22
-	bne	.L1043
-	adrp	x1, .LANCHOR163
-	adrp	x0, .LC1
-	mov	w2, 2654
-	add	x1, x1, :lo12:.LANCHOR163
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L1043:
-	ldrb	w0, [x19, 8]
-	adrp	x6, .LANCHOR43
-	adrp	x7, .LANCHOR14
-	adrp	x5, .LANCHOR72
-	adrp	x4, .LANCHOR73
-	ldr	x1, [x6, #:lo12:.LANCHOR43]
-	cbnz	w0, .L1044
-	ldrh	w0, [x1, x20]
-	cbz	w0, .L1045
-	ldrh	w2, [x7, #:lo12:.LANCHOR14]
-	add	w0, w0, w2
-.L1069:
-	strh	w0, [x1, x20]
-	mov	w1, 0
-	ldr	w0, [x5, #:lo12:.LANCHOR72]
-	add	w0, w0, 1
-	str	w0, [x5, #:lo12:.LANCHOR72]
-	mov	w0, w22
-	bl	ftl_set_blk_mode
-.L1047:
-	ldr	x0, [x6, #:lo12:.LANCHOR43]
-	ldrh	w1, [x0, x20]
-	adrp	x0, .LANCHOR76
-	ldr	w2, [x0, #:lo12:.LANCHOR76]
-	cmp	w1, w2
-	bls	.L1048
-	str	w1, [x0, #:lo12:.LANCHOR76]
-.L1048:
-	ldr	w2, [x5, #:lo12:.LANCHOR72]
-	ldr	w1, [x4, #:lo12:.LANCHOR73]
-	ldrh	w0, [x7, #:lo12:.LANCHOR14]
-	madd	w0, w0, w2, w1
-	ldrh	w1, [x23, #:lo12:.LANCHOR5]
-	udiv	w0, w0, w1
-	adrp	x1, .LANCHOR74
-	str	w0, [x1, #:lo12:.LANCHOR74]
-	adrp	x0, .LANCHOR127
-	ldr	x1, [x0, #:lo12:.LANCHOR127]
-	ldr	w0, [x1, 16]
-	add	w0, w0, 1
-	str	w0, [x1, 16]
-	ldr	x0, [x25, #:lo12:.LANCHOR106]
-	ubfiz	x1, x21, 5, 16
-	add	x1, x1, 4
-	add	x2, x0, 4
-	add	x1, x0, x1
-.L1049:
-	cmp	x1, x2
-	bne	.L1050
-	ldrb	w1, [x19, 8]
-	mov	w2, w21
-	mov	x23, 0
-	bl	FlashEraseBlocks
-	mov	w1, 0
-.L1051:
-	cmp	w21, w23, uxth
-	bhi	.L1053
-	cbz	w1, .L1054
-	mov	w0, w22
-	bl	update_multiplier_value
-	bl	FtlBbmTblFlush
-.L1054:
-	ldrb	w0, [x19, 7]
-	cbnz	w0, .L1055
-	adrp	x0, .LANCHOR42
-	mov	w1, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR42]
-	strh	w1, [x0, x20]
-	b	.L1031
-.L1041:
-	ldrh	w2, [x4]
-	stp	xzr, xzr, [x1]
-	cmp	w2, w6
-	beq	.L1040
-	ubfiz	x5, x21, 5, 16
-	add	w21, w21, 1
-	add	x5, x3, x5
-	and	w21, w21, 65535
-	lsl	w2, w2, 10
-	str	w2, [x5, 4]
-.L1040:
-	add	x1, x1, 32
-	add	x4, x4, 2
-	b	.L1039
-.L1045:
-	mov	w0, 2
-	b	.L1069
-.L1044:
-	ldrh	w0, [x1, x20]
-	add	w0, w0, 1
-	strh	w0, [x1, x20]
-	ldr	w0, [x4, #:lo12:.LANCHOR73]
-	add	w0, w0, 1
-	str	w0, [x4, #:lo12:.LANCHOR73]
-	mov	w0, w22
-	bl	ftl_set_blk_mode.part.6
-	b	.L1047
-.L1050:
-	ldr	w3, [x2]
-	and	w3, w3, -1024
-	str	w3, [x2], 32
-	b	.L1049
-.L1053:
-	ldr	x2, [x25, #:lo12:.LANCHOR106]
-	lsl	x0, x23, 5
-	add	x3, x2, x0
-	ldr	w2, [x2, x0]
-	cmn	w2, #1
-	bne	.L1052
-	add	w1, w1, 1
-	ldr	w0, [x3, 4]
-	stp	w2, w1, [x29, 96]
-	lsr	w0, w0, 10
-	bl	FtlBbmMapBadBlock
-	ldp	w2, w1, [x29, 96]
-	strh	w2, [x26]
-	ldrb	w0, [x19, 7]
-	sub	w0, w0, #1
-	strb	w0, [x19, 7]
-.L1052:
-	add	x23, x23, 1
-	add	x26, x26, 2
-	b	.L1051
-.L1055:
-	adrp	x1, .LANCHOR19
-	adrp	x2, .LANCHOR70
-	strh	wzr, [x19, 2]
-	ldrh	w1, [x1, #:lo12:.LANCHOR19]
-	strh	w22, [x19]
-	strb	wzr, [x19, 6]
-	mul	w0, w0, w1
-	ldr	w1, [x2, #:lo12:.LANCHOR70]
-	str	w1, [x19, 12]
-	add	w1, w1, 1
-	str	w1, [x2, #:lo12:.LANCHOR70]
-	adrp	x1, .LANCHOR42
-	and	w0, w0, 65535
-	strh	w0, [x19, 4]
-	ldr	x1, [x1, #:lo12:.LANCHOR42]
-	strh	w0, [x1, x20]
+.L801:
+	ldr	w0, [x27]
+	cmn	w0, #1
+	bne	.L802
+.L804:
+	str	wzr, [x28]
+.L803:
+	b	.L803
+.L802:
+	ldrh	w0, [x21, 8]
+	cmp	w0, w20
+	bne	.L804
+	ldrh	w1, [x21]
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1056
-	ldrb	w0, [x19, 7]
-	cbnz	w0, .L1057
-.L1056:
-	adrp	x1, .LANCHOR163
-	adrp	x0, .LC1
-	mov	w2, 2707
-	add	x1, x1, :lo12:.LANCHOR163
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L1057:
+	cmp	w1, w0
+	bne	.L804
+	ldr	x2, [x27, 8]
+	mov	w1, w20
+	mov	x0, x19
+	bl	FtlMapWritePage
+.L800:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L799
+	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
+	.section	.text.flush_l2p_region,"ax",@progbits
+	.align	2
+	.global	flush_l2p_region
+	.type	flush_l2p_region, %function
+flush_l2p_region:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR55
+	ubfiz	x19, x0, 4, 16
+	ldr	x0, [x20, #:lo12:.LANCHOR55]
+	add	x1, x0, x19
+	ldr	x2, [x1, 8]
+	ldrh	w1, [x0, x19]
+	adrp	x0, .LANCHOR129
+	add	x0, x0, :lo12:.LANCHOR129
+	bl	FtlMapWritePage
+	ldr	x0, [x20, #:lo12:.LANCHOR55]
+	add	x0, x0, x19
 	ldp	x19, x20, [sp, 16]
+	ldr	w1, [x0, 4]
+	and	w1, w1, 2147483647
+	str	w1, [x0, 4]
 	mov	w0, 0
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 112
+	ldp	x29, x30, [sp], 32
 	ret
-	.size	allocate_data_superblock, .-allocate_data_superblock
-	.section	.text.FtlGcFreeBadSuperBlk,"ax",@progbits
+	.size	flush_l2p_region, .-flush_l2p_region
+	.section	.text.l2p_flush,"ax",@progbits
 	.align	2
-	.global	FtlGcFreeBadSuperBlk
-	.type	FtlGcFreeBadSuperBlk, %function
-FtlGcFreeBadSuperBlk:
-	stp	x29, x30, [sp, -96]!
+	.global	l2p_flush
+	.type	l2p_flush, %function
+l2p_flush:
+	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR101
-	stp	x25, x26, [sp, 64]
-	and	w25, w0, 65535
-	ldrh	w0, [x21, #:lo12:.LANCHOR101]
 	stp	x19, x20, [sp, 16]
-	stp	x23, x24, [sp, 48]
-	str	x27, [sp, 80]
-	cbz	w0, .L1071
-	adrp	x23, .LANCHOR102
-	add	x24, x23, :lo12:.LANCHOR102
+	adrp	x20, .LANCHOR33
+	add	x20, x20, :lo12:.LANCHOR33
+	str	x21, [sp, 32]
 	mov	w19, 0
-.L1072:
-	adrp	x0, .LANCHOR3
-	ldrh	w0, [x0, #:lo12:.LANCHOR3]
+	adrp	x21, .LANCHOR55
+.L816:
+	ldrh	w0, [x20]
 	cmp	w0, w19
-	bhi	.L1078
-	bl	FtlGcReFreshBadBlk
-.L1071:
+	bhi	.L818
 	mov	w0, 0
-	ldr	x27, [sp, 80]
+	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 96
+	ldp	x29, x30, [sp], 48
 	ret
-.L1078:
-	adrp	x0, .LANCHOR13
-	add	x0, x0, :lo12:.LANCHOR13
-	mov	w1, w25
-	add	x22, x21, :lo12:.LANCHOR101
-	mov	w20, 0
-	ldrb	w0, [x0, w19, sxtw]
-	bl	V2P_block
-	and	w26, w0, 65535
-.L1073:
-	ldrh	w0, [x22]
-	cmp	w0, w20
-	bhi	.L1077
+.L818:
+	ldr	x1, [x21, #:lo12:.LANCHOR55]
+	ubfiz	x0, x19, 4, 16
+	add	x0, x1, x0
+	ldr	w0, [x0, 4]
+	tbz	w0, #31, .L817
+	mov	w0, w19
+	bl	flush_l2p_region
+.L817:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1072
-.L1077:
-	add	x0, x23, :lo12:.LANCHOR102
-	add	w27, w20, 1
-	ldrh	w0, [x0, w20, sxtw 1]
-	cmp	w0, w26
-	bne	.L1074
-	mov	w1, w26
-	adrp	x0, .LC104
-	add	x0, x0, :lo12:.LC104
+	b	.L816
+	.size	l2p_flush, .-l2p_flush
+	.section	.text.log2phys,"ax",@progbits
+	.align	2
+	.global	log2phys
+	.type	log2phys, %function
+log2phys:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x25, x26, [sp, 64]
+	mov	w25, w0
+	adrp	x0, .LANCHOR22
+	stp	x23, x24, [sp, 48]
+	stp	x19, x20, [sp, 16]
+	mov	x20, x1
+	ldrh	w24, [x0, #:lo12:.LANCHOR22]
+	adrp	x0, .LANCHOR152
+	stp	x21, x22, [sp, 32]
+	mov	x19, x0
+	ldr	w1, [x0, #:lo12:.LANCHOR152]
+	mov	w21, w2
+	cmp	w25, w1
+	bcc	.L821
+	adrp	x1, .LANCHOR153
+	adrp	x0, .LC1
+	mov	w2, 813
+	add	x1, x1, :lo12:.LANCHOR153
+	add	x0, x0, :lo12:.LC1
 	bl	printf
-	mov	w0, w26
-	bl	FtlBbmMapBadBlock
-	bl	FtlBbmTblFlush
-	ldrh	w1, [x22]
-	sxtw	x3, w27
-	and	x4, x20, 65535
+.L821:
+	ldr	w0, [x19, #:lo12:.LANCHOR152]
+	cmp	w25, w0
+	bcs	.L822
+	adrp	x23, .LANCHOR55
+	add	w24, w24, 7
+	adrp	x0, .LANCHOR33
+	ldr	x2, [x23, #:lo12:.LANCHOR55]
+	lsr	w22, w25, w24
+	and	w22, w22, 65535
+	ldrh	w1, [x0, #:lo12:.LANCHOR33]
 	mov	x0, 0
-.L1075:
-	add	w2, w20, w0
-	cmp	w1, w2, uxth
-	bhi	.L1076
-	sub	w1, w1, #1
-	strh	w1, [x22]
-.L1074:
-	and	w20, w27, 65535
-	b	.L1073
-.L1076:
-	add	x2, x3, x0
-	ldrh	w5, [x24, x2, lsl 1]
-	add	x2, x4, x0
+.L823:
+	and	x19, x0, 65535
+	cmp	w19, w1
+	bcc	.L828
+	bl	select_l2p_ram_region
+	and	x19, x0, 65535
+	ldr	x2, [x23, #:lo12:.LANCHOR55]
+	ubfiz	x1, x19, 4, 16
+	mov	w26, w0
+	add	x3, x2, x1
+	ldrh	w2, [x2, x1]
+	mov	w1, 65535
+	cmp	w2, w1
+	beq	.L829
+	ldr	w1, [x3, 4]
+	tbz	w1, #31, .L829
+	bl	flush_l2p_region
+.L829:
+	mov	w1, w26
+	mov	w0, w22
+	bl	load_l2p_region
+	b	.L825
+.L822:
+	mov	w0, -1
+	cbnz	w21, .L820
+	str	w0, [x20]
+.L820:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L828:
 	add	x0, x0, 1
-	strh	w5, [x24, x2, lsl 1]
-	b	.L1075
-	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
-	.section	.text.update_vpc_list,"ax",@progbits
+	add	x3, x2, x0, lsl 4
+	ldrh	w3, [x3, -16]
+	cmp	w3, w22
+	bne	.L823
+.L825:
+	mov	x0, 1
+	ldr	x1, [x23, #:lo12:.LANCHOR55]
+	lsl	x0, x0, x24
+	sub	w0, w0, #1
+	and	w0, w0, w25
+	and	x0, x0, 65535
+	add	x1, x1, x19, lsl 4
+	cbnz	w21, .L826
+	ldr	x1, [x1, 8]
+	ldr	w0, [x1, x0, lsl 2]
+	str	w0, [x20]
+.L827:
+	ldr	x0, [x23, #:lo12:.LANCHOR55]
+	add	x19, x0, x19, lsl 4
+	ldr	w0, [x19, 4]
+	cmn	w0, #1
+	beq	.L831
+	add	w0, w0, 1
+	str	w0, [x19, 4]
+.L831:
+	mov	w0, 0
+	b	.L820
+.L826:
+	ldr	x2, [x1, 8]
+	ldr	w3, [x20]
+	str	w3, [x2, x0, lsl 2]
+	ldr	w0, [x1, 4]
+	orr	w0, w0, -2147483648
+	str	w0, [x1, 4]
+	adrp	x0, .LANCHOR56
+	strh	w22, [x0, #:lo12:.LANCHOR56]
+	b	.L827
+	.size	log2phys, .-log2phys
+	.section	.text.FtlReUsePrevPpa,"ax",@progbits
 	.align	2
-	.global	update_vpc_list
-	.type	update_vpc_list, %function
-update_vpc_list:
-	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LANCHOR42
+	.global	FtlReUsePrevPpa
+	.type	FtlReUsePrevPpa, %function
+FtlReUsePrevPpa:
+	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR42
 	stp	x19, x20, [sp, 16]
-	and	w19, w0, 65535
-	ldr	x1, [x1, #:lo12:.LANCHOR42]
-	ubfiz	x0, x19, 1, 16
-	ldrh	w0, [x1, x0]
-	cbnz	w0, .L1084
-	adrp	x0, .LANCHOR80
-	ldrh	w1, [x0, #:lo12:.LANCHOR80]
-	cmp	w1, w19
-	bne	.L1085
-	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR80]
-.L1086:
-	adrp	x20, .LANCHOR45
+	mov	w21, w0
+	str	w1, [x29, 76]
+	lsr	w0, w1, 10
+	str	x23, [sp, 48]
+	bl	P2V_block_in_plane
+	ldr	x2, [x22, #:lo12:.LANCHOR42]
+	and	w3, w0, 65535
+	ubfiz	x20, x3, 1, 16
+	ldrh	w1, [x2, x20]
+	cbnz	w1, .L835
+	adrp	x0, .LANCHOR47
+	ldr	x19, [x0, #:lo12:.LANCHOR47]
+	cbz	x19, .L836
+	adrp	x2, .LANCHOR40
+	mov	x5, -6148914691236517206
+	movk	x5, 0xaaab, lsl 0
+	adrp	x23, .LANCHOR48
+	ldr	x2, [x2, #:lo12:.LANCHOR40]
+	mov	w6, 65535
+	ldrh	w4, [x23, #:lo12:.LANCHOR48]
+	sub	x19, x19, x2
+	asr	x19, x19, 1
+	mul	x19, x19, x5
+	mov	w5, 6
+	and	w19, w19, 65535
+.L837:
+	cmp	w1, w4
+	beq	.L836
+	cmp	w19, w3
+	bne	.L838
 	mov	w1, w19
-	adrp	x0, .LANCHOR41
-	add	x0, x0, :lo12:.LANCHOR41
+	add	x0, x0, :lo12:.LANCHOR47
 	bl	List_remove_node
-	ldrh	w0, [x20, #:lo12:.LANCHOR45]
-	cbnz	w0, .L1088
-	adrp	x1, .LANCHOR164
+	ldrh	w0, [x23, #:lo12:.LANCHOR48]
+	cbnz	w0, .L839
+	adrp	x1, .LANCHOR154
 	adrp	x0, .LC1
-	mov	w2, 2777
-	add	x1, x1, :lo12:.LANCHOR164
+	mov	w2, 1733
+	add	x1, x1, :lo12:.LANCHOR154
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1088:
-	ldrh	w0, [x20, #:lo12:.LANCHOR45]
+.L839:
+	ldrh	w0, [x23, #:lo12:.LANCHOR48]
 	sub	w0, w0, #1
-	strh	w0, [x20, #:lo12:.LANCHOR45]
-	mov	w0, w19
-	bl	free_data_superblock
-	mov	w0, w19
-	bl	FtlGcFreeBadSuperBlk
-	adrp	x0, .LANCHOR48
-	ldrh	w1, [x20, #:lo12:.LANCHOR45]
-	ldrh	w0, [x0, #:lo12:.LANCHOR48]
-	add	w0, w0, w1
-	adrp	x1, .LANCHOR5
-	ldrh	w1, [x1, #:lo12:.LANCHOR5]
-	cmp	w0, w1
-	ble	.L1092
-	adrp	x1, .LANCHOR164
-	adrp	x0, .LC1
-	mov	w2, 2780
-	add	x1, x1, :lo12:.LANCHOR164
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L1092:
-	mov	w0, 1
-	b	.L1083
-.L1085:
-	adrp	x0, .LANCHOR51
-	ldrh	w0, [x0, #:lo12:.LANCHOR51]
-	cmp	w0, w19
-	beq	.L1091
-	adrp	x0, .LANCHOR52
-	ldrh	w0, [x0, #:lo12:.LANCHOR52]
-	cmp	w0, w19
-	beq	.L1091
-	adrp	x0, .LANCHOR53
-	ldrh	w0, [x0, #:lo12:.LANCHOR53]
-	cmp	w0, w19
-	bne	.L1086
-.L1091:
-	mov	w0, 0
-.L1083:
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	ret
-.L1084:
+	strh	w0, [x23, #:lo12:.LANCHOR48]
 	mov	w0, w19
-	bl	List_update_data_list
-	b	.L1091
-	.size	update_vpc_list, .-update_vpc_list
-	.section	.text.decrement_vpc_count,"ax",@progbits
-	.align	2
-	.global	decrement_vpc_count
-	.type	decrement_vpc_count, %function
-decrement_vpc_count:
-	stp	x29, x30, [sp, -48]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	and	w19, w0, 65535
-	str	x21, [sp, 32]
-	mov	w0, 65535
-	cmp	w19, w0
-	beq	.L1095
-	adrp	x21, .LANCHOR42
-	ubfiz	x20, x19, 1, 16
-	ldr	x1, [x21, #:lo12:.LANCHOR42]
+	bl	INSERT_DATA_LIST
+	ldr	x1, [x22, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x20]
-	cbnz	w0, .L1096
-	mov	w2, 0
-	mov	w1, w19
-	adrp	x0, .LC105
-	add	x0, x0, :lo12:.LC105
-	bl	printf
-	ldr	x0, [x21, #:lo12:.LANCHOR42]
-	ldrh	w0, [x0, x20]
-	cbz	w0, .L1097
-.L1102:
-	mov	w20, 0
-.L1094:
-	mov	w0, w20
-	ldr	x21, [sp, 32]
+	add	w0, w0, 1
+	strh	w0, [x1, x20]
+.L836:
+	add	x1, x29, 76
+	mov	w2, 1
+	mov	w0, w21
+	bl	log2phys
 	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
+	ldp	x21, x22, [sp, 32]
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 80
 	ret
-.L1097:
-	mov	w2, 2795
-	adrp	x1, .LANCHOR165
-	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR165
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-	b	.L1102
-.L1096:
-	sub	w0, w0, #1
-	strh	w0, [x1, x20]
-.L1095:
-	adrp	x21, .LANCHOR142
-	mov	w1, 65535
-	ldrh	w0, [x21, #:lo12:.LANCHOR142]
-	cmp	w0, w1
-	bne	.L1099
-	strh	w19, [x21, #:lo12:.LANCHOR142]
-	b	.L1102
-.L1099:
-	cmp	w19, w0
-	beq	.L1102
-	bl	update_vpc_list
-	cmp	w0, 0
-	adrp	x1, .LANCHOR40
-	adrp	x0, .LANCHOR41
-	strh	w19, [x21, #:lo12:.LANCHOR142]
-	cset	w20, ne
-	ldr	x1, [x1, #:lo12:.LANCHOR40]
-	ldr	x0, [x0, #:lo12:.LANCHOR41]
-	sub	x0, x0, x1
-	mov	x1, -6148914691236517206
-	asr	x0, x0, 1
-	movk	x1, 0xaaab, lsl 0
-	mul	x0, x0, x1
-	adrp	x1, .LANCHOR42
-	ldr	x1, [x1, #:lo12:.LANCHOR42]
-	and	x2, x0, 65535
-	ldrh	w1, [x1, x2, lsl 1]
-	cbnz	w1, .L1094
-	cmp	w19, w0, uxth
-	beq	.L1094
-	mov	w2, 2811
-	adrp	x1, .LANCHOR165
-	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR165
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-	b	.L1094
-	.size	decrement_vpc_count, .-decrement_vpc_count
+.L838:
+	umull	x19, w19, w5
+	ldrh	w19, [x2, x19]
+	cmp	w19, w6
+	beq	.L836
+	add	w1, w1, 1
+	and	w1, w1, 65535
+	b	.L837
+.L835:
+	add	w1, w1, 1
+	strh	w1, [x2, x20]
+	b	.L836
+	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
 	.section	.text.FtlRecoverySuperblock,"ax",@progbits
 	.align	2
 	.global	FtlRecoverySuperblock
@@ -8150,7 +6405,7 @@ FtlRecoverySuperblock:
 	stp	x25, x26, [sp, 64]
 	cmp	w0, w1
 	stp	x27, x28, [sp, 80]
-	beq	.L1226
+	beq	.L968
 	ldrb	w0, [x19, 6]
 	str	w0, [x29, 164]
 	adrp	x0, .LANCHOR19
@@ -8158,11 +6413,11 @@ FtlRecoverySuperblock:
 	str	x0, [x29, 128]
 	ldrh	w2, [x0, #:lo12:.LANCHOR19]
 	cmp	w2, w26
-	bne	.L1106
+	bne	.L848
 	strh	wzr, [x19, 4]
-.L1232:
+.L976:
 	strb	wzr, [x19, 6]
-.L1226:
+.L968:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -8171,30 +6426,30 @@ FtlRecoverySuperblock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L1106:
+.L848:
 	ldrh	w0, [x19, 16]
 	mov	w20, 0
-.L1107:
+.L849:
 	cmp	w0, w1
-	beq	.L1108
+	beq	.L850
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
 	mov	w23, w0
 	cmn	w0, #1
-	beq	.L1109
-	adrp	x1, .LANCHOR91
+	beq	.L851
+	adrp	x1, .LANCHOR64
 	adrp	x2, .LANCHOR3
-	adrp	x20, .LANCHOR112
+	adrp	x20, .LANCHOR103
 	add	x4, x19, 16
-	ldr	x5, [x1, #:lo12:.LANCHOR91]
+	ldr	x5, [x1, #:lo12:.LANCHOR64]
 	adrp	x1, .LANCHOR23
-	ldr	x0, [x20, #:lo12:.LANCHOR112]
+	ldr	x0, [x20, #:lo12:.LANCHOR103]
 	mov	w22, 0
 	ldrh	w6, [x1, #:lo12:.LANCHOR23]
-	adrp	x1, .LANCHOR92
+	adrp	x1, .LANCHOR65
 	mov	w10, 65535
 	str	x2, [x29, 152]
-	ldr	x7, [x1, #:lo12:.LANCHOR92]
+	ldr	x7, [x1, #:lo12:.LANCHOR65]
 	adrp	x1, .LANCHOR24
 	ldrh	w8, [x1, #:lo12:.LANCHOR24]
 	add	x1, x19, 16
@@ -8202,85 +6457,85 @@ FtlRecoverySuperblock:
 	ldrh	w1, [x2, #:lo12:.LANCHOR3]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.L1110:
+.L852:
 	cmp	x4, x1
-	bne	.L1114
+	bne	.L856
 	mov	w2, 0
 	mov	w1, w22
 	bl	FlashReadPages
-	adrp	x0, .LANCHOR71
-	ldr	x4, [x20, #:lo12:.LANCHOR112]
+	adrp	x0, .LANCHOR83
+	ldr	x4, [x20, #:lo12:.LANCHOR103]
 	and	w10, w23, 65535
-	add	x7, x0, :lo12:.LANCHOR71
-	ldr	w21, [x0, #:lo12:.LANCHOR71]
+	add	x7, x0, :lo12:.LANCHOR83
+	ldr	w21, [x0, #:lo12:.LANCHOR83]
 	mov	x11, x4
 	mov	w6, 65535
 	mov	w3, 0
 	sub	w21, w21, #1
 	str	x0, [x29, 144]
-.L1115:
+.L857:
 	cmp	w22, w3
-	bne	.L1120
+	bne	.L862
 	add	w22, w23, 1
 	ldr	w0, [x4, 4]
 	and	w22, w22, 65535
-.L1228:
+.L970:
 	lsr	w0, w0, 10
 	bl	P2V_plane
 	and	w27, w0, 65535
 	ldr	x0, [x29, 128]
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	cmp	w0, w22
-	bne	.L1122
+	bne	.L864
 	strh	w22, [x19, 2]
 	strb	wzr, [x19, 6]
 	strh	wzr, [x19, 4]
-.L1122:
+.L864:
 	ldr	w0, [x29, 164]
 	cmp	w22, w26
 	cset	w1, eq
 	cmp	w27, w0
 	cset	w0, eq
 	tst	w1, w0
-	beq	.L1123
-.L1233:
+	beq	.L865
+.L977:
 	mov	w2, w27
 	mov	w1, w22
 	mov	x0, x19
 	bl	ftl_sb_update_avl_pages
-	b	.L1226
-.L1108:
+	b	.L968
+.L850:
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	add	x0, x19, x20, sxtw 1
 	ldrh	w0, [x0, 16]
-	b	.L1107
-.L1109:
-	cbz	w26, .L1111
-	adrp	x1, .LANCHOR166
+	b	.L849
+.L851:
+	cbz	w26, .L853
+	adrp	x1, .LANCHOR155
 	adrp	x0, .LC1
-	mov	w2, 1766
-	add	x1, x1, :lo12:.LANCHOR166
+	mov	w2, 1800
+	add	x1, x1, :lo12:.LANCHOR155
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1111:
+.L853:
 	ldr	w0, [x29, 164]
 	cmp	w0, 0
 	ccmp	w20, w0, 4, ne
-	beq	.L1112
-	adrp	x1, .LANCHOR166
+	beq	.L854
+	adrp	x1, .LANCHOR155
 	adrp	x0, .LC1
-	mov	w2, 1767
-	add	x1, x1, :lo12:.LANCHOR166
+	mov	w2, 1801
+	add	x1, x1, :lo12:.LANCHOR155
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1112:
+.L854:
 	strh	wzr, [x19, 2]
-	b	.L1232
-.L1114:
+	b	.L976
+.L856:
 	ldrh	w3, [x4]
 	cmp	w3, w10
-	beq	.L1113
+	beq	.L855
 	ubfiz	x2, x22, 5, 16
 	orr	w3, w23, w3, lsl 10
 	add	x2, x0, x2
@@ -8295,90 +6550,90 @@ FtlRecoverySuperblock:
 	asr	w3, w3, 2
 	add	x3, x7, x3, sxtw 2
 	str	x3, [x2, 16]
-.L1113:
+.L855:
 	add	x4, x4, 2
-	b	.L1110
-.L1120:
+	b	.L852
+.L862:
 	ldr	w0, [x11]
-	cbnz	w0, .L1116
+	cbnz	w0, .L858
 	ldr	x8, [x11, 16]
 	ldr	w5, [x8, 4]
 	cmn	w5, #1
-	beq	.L1117
+	beq	.L859
 	ldr	w1, [x7]
 	mov	w0, w5
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L1117
+	cbz	w0, .L859
 	add	w5, w5, 1
 	str	w5, [x7]
-.L1117:
+.L859:
 	ldr	w0, [x8]
 	cmn	w0, #1
-	bne	.L1119
+	bne	.L861
 	ubfiz	x3, x3, 5, 16
 	and	w22, w23, 65535
 	add	x3, x4, x3
 	ldr	w0, [x3, 4]
-	b	.L1228
-.L1116:
+	b	.L970
+.L858:
 	mov	w6, w10
-.L1119:
+.L861:
 	add	w3, w3, 1
 	add	x11, x11, 32
 	and	w3, w3, 65535
-	b	.L1115
-.L1123:
+	b	.L857
+.L865:
 	mov	w0, 65535
 	cmp	w6, w0
-	bne	.L1124
+	bne	.L866
 	ldrb	w0, [x19, 8]
-	cbnz	w0, .L1125
-.L1124:
-	adrp	x25, .LANCHOR145
+	cbnz	w0, .L867
+.L866:
+	adrp	x25, .LANCHOR134
 	and	w28, w23, 65535
-	ldr	w0, [x25, #:lo12:.LANCHOR145]
+	ldr	w0, [x25, #:lo12:.LANCHOR134]
 	cmn	w0, #1
-	bne	.L1126
-	str	w21, [x25, #:lo12:.LANCHOR145]
-.L1126:
+	bne	.L868
+	str	w21, [x25, #:lo12:.LANCHOR134]
+.L868:
 	add	w0, w26, 7
 	cmp	w0, w23, uxth
-	bge	.L1175
+	bge	.L920
 	sub	w24, w28, #7
 	and	w24, w24, 65535
-.L1127:
+.L869:
 	ldr	x0, [x29, 152]
 	mov	w3, 65535
 	mov	w5, 1
 	add	x4, x0, :lo12:.LANCHOR3
-.L1128:
+.L870:
 	cmp	w24, w28
-	bhi	.L1138
+	bhi	.L880
 	ldrh	w1, [x4]
 	mov	w23, 0
-	ldr	x0, [x20, #:lo12:.LANCHOR112]
+	ldr	x0, [x20, #:lo12:.LANCHOR103]
 	add	x1, x1, 8
 	ldr	x2, [x29, 168]
 	add	x1, x19, x1, lsl 1
-	b	.L1139
-.L1175:
+	b	.L881
+.L920:
 	mov	w24, w26
-	b	.L1127
-.L1130:
+	b	.L869
+.L872:
 	ldrh	w6, [x2]
 	cmp	w6, w3
-	beq	.L1129
+	beq	.L871
 	ubfiz	x7, x23, 5, 16
 	add	w23, w23, 1
 	add	x7, x0, x7
 	and	w23, w23, 65535
 	orr	w6, w24, w6, lsl 10
 	str	w6, [x7, 4]
-.L1129:
+.L871:
 	add	x2, x2, 2
-.L1139:
-	cmp	x2, x1
-	bne	.L1130
+.L881:
+	cmp	x1, x2
+	bne	.L872
 	mov	w1, w23
 	mov	w2, 0
 	str	w5, [x29, 112]
@@ -8387,591 +6642,803 @@ FtlRecoverySuperblock:
 	add	x23, x23, 16
 	str	x4, [x29, 136]
 	bl	FlashReadPages
-	ldr	x2, [x20, #:lo12:.LANCHOR112]
-	ldr	w1, [x25, #:lo12:.LANCHOR145]
+	ldr	x2, [x20, #:lo12:.LANCHOR103]
+	ldr	w1, [x25, #:lo12:.LANCHOR134]
 	ldr	w5, [x29, 112]
 	add	x0, x2, 16
 	ldr	w3, [x29, 120]
 	add	x23, x2, x23
 	ldr	x4, [x29, 136]
 	mov	w2, 0
-.L1131:
+.L873:
 	cmp	x23, x0
-	bne	.L1136
-	cbz	w2, .L1137
-	str	w1, [x25, #:lo12:.LANCHOR145]
-.L1137:
+	bne	.L878
+	cbz	w2, .L879
+	str	w1, [x25, #:lo12:.LANCHOR134]
+.L879:
 	add	w24, w24, 1
 	and	w24, w24, 65535
-	b	.L1128
-.L1136:
+	b	.L870
+.L878:
 	ldr	w6, [x0, -16]
-	cbz	w6, .L1132
-	cbz	w2, .L1125
-	str	w1, [x25, #:lo12:.LANCHOR145]
-.L1125:
-	adrp	x0, .LANCHOR167
-	mov	w23, w26
+	cbz	w6, .L874
+	cbz	w2, .L867
+	str	w1, [x25, #:lo12:.LANCHOR134]
+.L867:
+	adrp	x0, .LANCHOR156
+	mov	w24, w26
 	mov	w1, 1
-	adrp	x28, .LANCHOR145
-	strh	w1, [x0, #:lo12:.LANCHOR167]
-	add	x0, x28, :lo12:.LANCHOR145
+	adrp	x28, .LANCHOR134
+	strh	w1, [x0, #:lo12:.LANCHOR156]
+	add	x0, x28, :lo12:.LANCHOR134
 	str	x0, [x29, 104]
-.L1140:
+.L882:
 	ldr	x1, [x29, 152]
-	mov	w24, 0
-	ldr	x0, [x20, #:lo12:.LANCHOR112]
+	mov	w23, 0
+	ldr	x0, [x20, #:lo12:.LANCHOR103]
 	mov	w5, 65535
 	ldr	x2, [x29, 168]
 	ldrh	w1, [x1, #:lo12:.LANCHOR3]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.L1141:
+.L883:
 	cmp	x1, x2
-	bne	.L1143
+	bne	.L885
 	mov	w2, 0
-	mov	w1, w24
+	mov	w1, w23
 	bl	FlashReadPages
 	mov	x25, 0
-	ubfiz	x0, x24, 5, 16
+	ubfiz	x0, x23, 5, 16
 	str	x0, [x29, 112]
-	adrp	x0, .LANCHOR168
-	add	x0, x0, :lo12:.LANCHOR168
+	adrp	x0, .LANCHOR157
+	add	x0, x0, :lo12:.LANCHOR157
 	str	x0, [x29, 120]
-.L1144:
+.L886:
 	ldr	x0, [x29, 112]
-	cmp	x25, x0
-	bne	.L1169
+	cmp	x0, x25
+	bne	.L914
 	ldr	x0, [x29, 128]
-	add	w23, w23, 1
-	and	w23, w23, 65535
+	add	w24, w24, 1
+	and	w24, w24, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
-	cmp	w0, w23
-	bne	.L1140
+	cmp	w0, w24
+	bne	.L882
 	ldr	x0, [x29, 152]
 	mov	w2, 65535
-	strh	w23, [x19, 2]
+	strh	w24, [x19, 2]
 	strh	wzr, [x19, 4]
 	ldrh	w1, [x0, #:lo12:.LANCHOR3]
 	mov	w0, 0
-.L1170:
+.L915:
 	cmp	w0, w1
-	beq	.L1226
+	beq	.L968
 	ldr	x4, [x29, 168]
 	ldrh	w3, [x4], 2
 	str	x4, [x29, 168]
 	cmp	w3, w2
-	beq	.L1171
+	beq	.L916
 	strb	w0, [x19, 6]
-	b	.L1226
-.L1132:
+	b	.L968
+.L874:
 	ldr	x6, [x0]
 	ldrh	w7, [x6]
 	cmp	w7, w3
-	beq	.L1135
+	beq	.L877
 	ldr	w6, [x6, 4]
 	cmn	w6, #1
 	csel	w1, w1, w6, eq
 	csel	w2, w2, w5, eq
-.L1135:
+.L877:
 	add	x0, x0, 32
-	b	.L1131
-.L1138:
+	b	.L873
+.L880:
 	mov	w0, -1
-	str	w0, [x25, #:lo12:.LANCHOR145]
-	b	.L1125
-.L1143:
+	str	w0, [x25, #:lo12:.LANCHOR134]
+	b	.L867
+.L885:
 	ldrh	w3, [x2]
 	cmp	w3, w5
-	beq	.L1142
-	ubfiz	x4, x24, 5, 16
-	add	w24, w24, 1
+	beq	.L884
+	ubfiz	x4, x23, 5, 16
+	add	w23, w23, 1
 	add	x4, x0, x4
-	and	w24, w24, 65535
-	orr	w3, w23, w3, lsl 10
+	and	w23, w23, 65535
+	orr	w3, w24, w3, lsl 10
 	str	w3, [x4, 4]
-.L1142:
+.L884:
 	add	x2, x2, 2
-	b	.L1141
-.L1169:
-	ldr	x4, [x20, #:lo12:.LANCHOR112]
+	b	.L883
+.L914:
+	ldr	x4, [x20, #:lo12:.LANCHOR103]
 	add	x4, x4, x25
 	ldr	w5, [x4, 4]
 	str	w5, [x29, 188]
 	lsr	w0, w5, 10
 	bl	P2V_plane
 	and	w0, w0, 65535
-	cmp	w23, w26
-	bcc	.L1145
+	cmp	w24, w26
+	bcc	.L887
 	ldr	w1, [x29, 164]
 	ccmp	w1, w0, 0, eq
-	bhi	.L1145
-	cmp	w23, w22
+	bhi	.L887
+	cmp	w24, w22
 	ccmp	w27, w0, 0, eq
-	beq	.L1146
+	beq	.L888
 	ldr	w0, [x4]
 	cmn	w0, #1
-	beq	.L1147
+	beq	.L889
 	ldr	x3, [x4, 16]
 	mov	w0, 61589
 	ldrh	w1, [x3]
 	cmp	w1, w0
-	beq	.L1148
+	beq	.L890
 	ldrh	w0, [x19]
-.L1230:
+.L974:
 	bl	decrement_vpc_count
-	b	.L1145
-.L1148:
+	b	.L887
+.L890:
 	ldr	w21, [x3, 4]
 	cmn	w21, #1
-	beq	.L1149
+	beq	.L891
 	ldr	x0, [x29, 144]
-	ldr	w1, [x0, #:lo12:.LANCHOR71]
+	ldr	w1, [x0, #:lo12:.LANCHOR83]
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L1149
+	cbz	w0, .L891
 	ldr	x1, [x29, 144]
 	add	w0, w21, 1
-	str	w0, [x1, #:lo12:.LANCHOR71]
-.L1149:
-	ldp	w24, w0, [x3, 8]
+	str	w0, [x1, #:lo12:.LANCHOR83]
+.L891:
+	ldp	w23, w0, [x3, 8]
 	add	x1, x29, 184
 	str	w0, [x29, 180]
 	mov	w2, 0
-	mov	w0, w24
+	mov	w0, w23
 	bl	log2phys
-	ldr	w1, [x28, #:lo12:.LANCHOR145]
+	ldr	w1, [x28, #:lo12:.LANCHOR134]
+	ldr	w3, [x29, 180]
 	cmn	w1, #1
-	beq	.L1150
+	beq	.L892
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L1150
-	ldr	w1, [x29, 180]
-	cmn	w1, #1
-	beq	.L1151
-	ldr	x0, [x20, #:lo12:.LANCHOR112]
+	cbz	w0, .L892
+	cmn	w3, #1
+	beq	.L893
+	ldr	x0, [x20, #:lo12:.LANCHOR103]
 	mov	w2, 0
-	add	x0, x0, x25
-	ldr	x3, [x0, 16]
-	str	w1, [x0, 4]
 	mov	w1, 1
-	str	x3, [x29, 136]
+	add	x0, x0, x25
+	ldr	x4, [x0, 16]
+	str	w3, [x0, 4]
+	str	x4, [x29, 136]
 	bl	FlashReadPages
-	ldr	x0, [x20, #:lo12:.LANCHOR112]
-	ldr	x3, [x29, 136]
-	add	x4, x0, x25
+	ldr	x0, [x20, #:lo12:.LANCHOR103]
+	ldr	x4, [x29, 136]
+	add	x3, x0, x25
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	bne	.L1152
-.L1153:
+	bne	.L894
+.L895:
 	mov	w0, -1
 	str	w0, [x29, 180]
-.L1160:
+.L902:
 	ldr	w3, [x29, 180]
 	cmn	w3, #1
-	beq	.L1145
-.L1174:
+	beq	.L887
+.L919:
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
-	and	w24, w0, 65535
+	and	w23, w0, 65535
 	adrp	x0, .LANCHOR5
-	mov	w3, w24
+	mov	w3, w23
 	ldrh	w0, [x0, #:lo12:.LANCHOR5]
-	cmp	w0, w24
-	bhi	.L1165
-	mov	w2, 2019
-	adrp	x1, .LANCHOR166
+	cmp	w0, w23
+	bhi	.L910
+	mov	w2, 2065
+	adrp	x1, .LANCHOR155
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR166
+	add	x1, x1, :lo12:.LANCHOR155
 	add	x0, x0, :lo12:.LC1
-	str	w24, [x29, 136]
+	str	w23, [x29, 136]
 	bl	printf
 	ldr	w3, [x29, 136]
-.L1165:
+.L910:
 	adrp	x1, .LANCHOR42
-	ubfiz	x0, x24, 1, 16
+	ubfiz	x0, x23, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1166
+	cbz	w0, .L911
 	mov	w0, w3
-	b	.L1230
-.L1151:
+	b	.L974
+.L893:
 	ldp	w1, w0, [x29, 184]
 	cmp	w1, w0
-	bne	.L1145
+	bne	.L887
 	mov	w2, 1
 	add	x1, x29, 180
-	mov	w0, w24
+	mov	w0, w23
 	bl	log2phys
-.L1145:
+.L887:
 	add	x25, x25, 32
-	b	.L1144
-.L1152:
-	ldr	w0, [x3, 8]
-	cmp	w24, w0
-	bne	.L1153
-	ldr	w0, [x3, 4]
+	b	.L886
+.L894:
+	ldr	w0, [x4, 8]
+	cmp	w23, w0
+	bne	.L895
+	ldr	w0, [x4, 4]
 	str	w0, [x29, 136]
-	str	x3, [x29, 96]
+	str	x4, [x29, 96]
 	uxtw	x1, w0
-	ldr	w0, [x28, #:lo12:.LANCHOR145]
+	ldr	w0, [x28, #:lo12:.LANCHOR134]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L1153
+	cbz	w0, .L895
 	ldp	w0, w1, [x29, 184]
-	ldr	x3, [x29, 96]
+	ldr	x4, [x29, 96]
 	cmp	w0, w1
 	ldr	w1, [x29, 180]
-	bne	.L1155
-.L1229:
-	mov	w0, w24
+	bne	.L897
+.L971:
+	mov	w0, w23
 	bl	FtlReUsePrevPpa
-	b	.L1153
-.L1155:
+	b	.L895
+.L897:
 	cmp	w0, w1
-	beq	.L1153
+	beq	.L895
 	cmn	w0, #1
-	beq	.L1156
-	ldr	x3, [x4, 16]
+	beq	.L898
+	ldr	x4, [x3, 16]
 	mov	w2, 0
-	str	w0, [x4, 4]
+	str	w0, [x3, 4]
 	mov	w1, 1
-	str	x3, [x29, 96]
-	mov	x0, x4
+	str	x4, [x29, 96]
+	mov	x0, x3
 	bl	FlashReadPages
-	ldr	x3, [x29, 96]
-.L1157:
-	ldr	x0, [x20, #:lo12:.LANCHOR112]
+	ldr	x4, [x29, 96]
+.L899:
+	ldr	x0, [x20, #:lo12:.LANCHOR103]
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	beq	.L1158
+	beq	.L900
 	ldr	x0, [x29, 104]
-	ldr	w3, [x3, 4]
+	ldr	w3, [x4, 4]
 	mov	w1, w3
 	ldr	w0, [x0]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L1158
+	cbz	w0, .L900
 	ldr	w0, [x29, 136]
 	mov	w1, w3
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L1153
-.L1158:
+	cbz	w0, .L895
+.L900:
 	ldr	w1, [x29, 180]
-	b	.L1229
-.L1156:
-	str	w0, [x4]
-	b	.L1157
-.L1150:
+	b	.L971
+.L898:
+	str	w0, [x3]
+	b	.L899
+.L892:
 	ldp	w1, w0, [x29, 184]
 	cmp	w1, w0
-	beq	.L1160
+	beq	.L902
+	adrp	x0, .LANCHOR8
+	ldr	w0, [x0, #:lo12:.LANCHOR8]
+	cmp	w0, w3, lsr 10
+	bhi	.L904
+	cmn	w3, #1
+.L973:
+	bne	.L887
 	mov	w2, 1
 	add	x1, x29, 188
-	mov	w0, w24
+	mov	w0, w23
 	bl	log2phys
 	ldr	w3, [x29, 184]
 	cmn	w3, #1
-	beq	.L1160
+	beq	.L902
 	ldr	w0, [x29, 180]
 	cmp	w3, w0
-	beq	.L1174
+	beq	.L919
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
 	adrp	x1, .LANCHOR51
 	and	w0, w0, 65535
 	ldrh	w1, [x1, #:lo12:.LANCHOR51]
 	cmp	w1, w0
-	beq	.L1164
+	beq	.L909
 	adrp	x1, .LANCHOR52
 	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	beq	.L1164
+	beq	.L909
 	adrp	x1, .LANCHOR53
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L1160
-.L1164:
-	ldr	x0, [x20, #:lo12:.LANCHOR112]
+	bne	.L902
+.L909:
+	ldr	x0, [x20, #:lo12:.LANCHOR103]
 	mov	w2, 0
 	mov	w1, 1
 	ldr	x4, [x0, 16]
 	str	w3, [x0, 4]
 	str	x4, [x29, 136]
 	bl	FlashReadPages
-	ldr	x0, [x20, #:lo12:.LANCHOR112]
+	ldr	x0, [x20, #:lo12:.LANCHOR103]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L1160
+	beq	.L902
 	ldr	x4, [x29, 136]
 	mov	w0, w21
 	ldr	w1, [x4, 4]
 	bl	ftl_cmp_data_ver
-	cbnz	w0, .L1160
+	cbnz	w0, .L902
 	mov	w2, 1
 	add	x1, x29, 184
-	mov	w0, w24
+	mov	w0, w23
 	bl	log2phys
-	b	.L1160
-.L1166:
-	mov	w1, w24
-	adrp	x0, .LC106
-	add	x0, x0, :lo12:.LC106
+	b	.L902
+.L904:
+	ldr	x0, [x20, #:lo12:.LANCHOR103]
+	mov	w2, 0
+	mov	w1, 1
+	ldr	x4, [x0, 16]
+	str	w3, [x0, 4]
+	str	x4, [x29, 136]
+	bl	FlashReadPages
+	ldr	x4, [x29, 136]
+	ldr	w0, [x4, 8]
+	cmp	w23, w0
+	bne	.L887
+	ldrh	w1, [x4]
+	mov	w0, 61589
+	cmp	w1, w0
+	b	.L973
+.L911:
+	mov	w1, w23
+	adrp	x0, .LC24
+	add	x0, x0, :lo12:.LC24
 	bl	printf
-	b	.L1145
-.L1147:
+	b	.L887
+.L889:
 	ldr	x0, [x29, 120]
 	ldr	w0, [x0]
 	cmp	w0, 31
-	bhi	.L1167
-	adrp	x1, .LANCHOR169
-	add	x1, x1, :lo12:.LANCHOR169
+	bhi	.L912
+	adrp	x1, .LANCHOR158
+	add	x1, x1, :lo12:.LANCHOR158
 	str	w5, [x1, w0, uxtw 2]
 	add	w0, w0, 1
 	ldr	x1, [x29, 120]
 	str	w0, [x1]
-.L1167:
+.L912:
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-	ldr	w0, [x28, #:lo12:.LANCHOR145]
+	ldr	w0, [x28, #:lo12:.LANCHOR134]
 	cmn	w0, #1
-	bne	.L1168
-.L1231:
-	str	w21, [x28, #:lo12:.LANCHOR145]
-	b	.L1145
-.L1168:
+	bne	.L913
+.L975:
+	str	w21, [x28, #:lo12:.LANCHOR134]
+	b	.L887
+.L913:
 	cmp	w21, w0
-	bcs	.L1145
-	b	.L1231
-.L1171:
+	bcs	.L887
+	b	.L975
+.L916:
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L1170
-.L1146:
+	b	.L915
+.L888:
 	strb	w27, [x19, 6]
 	strh	w22, [x19, 2]
-	b	.L1233
+	b	.L977
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
-	.section	.text.FtlWriteDump_data,"ax",@progbits
+	.section	.text.ftl_check_vpc,"ax",@progbits
 	.align	2
-	.global	FtlWriteDump_data
-	.type	FtlWriteDump_data, %function
-FtlWriteDump_data:
-	stp	x29, x30, [sp, -128]!
+	.global	ftl_check_vpc
+	.type	ftl_check_vpc, %function
+ftl_check_vpc:
+	stp	x29, x30, [sp, -112]!
+	adrp	x0, .LC25
+	add	x0, x0, :lo12:.LC25
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR51
-	add	x0, x19, :lo12:.LANCHOR51
-	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	ldrh	w2, [x0, 4]
-	str	x25, [sp, 64]
-	cbz	w2, .L1235
-	ldrb	w1, [x0, 8]
-	cbnz	w1, .L1235
-	adrp	x3, .LANCHOR19
-	ldrb	w1, [x0, 7]
-	ldrh	w3, [x3, #:lo12:.LANCHOR19]
-	mul	w1, w1, w3
-	cmp	w2, w1
-	beq	.L1235
-	ldrb	w0, [x0, 10]
-	cbnz	w0, .L1234
-	adrp	x0, .LANCHOR61
-	mov	w2, 0
-	add	x1, x29, 92
-	ldr	w21, [x0, #:lo12:.LANCHOR61]
-	adrp	x0, .LANCHOR3
-	sub	w21, w21, #1
-	ldrh	w25, [x0, #:lo12:.LANCHOR3]
-	mov	w0, w21
-	bl	log2phys
-	adrp	x2, .LANCHOR123
-	adrp	x0, .LANCHOR115
-	ldr	w1, [x29, 92]
-	ldr	x20, [x2, #:lo12:.LANCHOR123]
-	ldr	x0, [x0, #:lo12:.LANCHOR115]
-	cmn	w1, #1
-	str	w1, [x29, 100]
-	stp	x0, x20, [x29, 104]
-	str	w21, [x29, 120]
-	str	wzr, [x20, 4]
-	beq	.L1237
-	mov	w2, 0
-	mov	w1, 1
-	add	x0, x29, 96
-	bl	FlashReadPages
-.L1238:
-	adrp	x23, .LANCHOR71
-	lsl	w25, w25, 2
-	add	x22, x19, :lo12:.LANCHOR51
-	add	x23, x23, :lo12:.LANCHOR71
-	mov	w0, -3947
-	mov	w24, 0
-	strh	w0, [x20]
-.L1239:
-	cmp	w25, w24
-	bne	.L1243
-.L1240:
-	add	x19, x19, :lo12:.LANCHOR51
-	mov	w0, 1
-	strb	w0, [x19, 10]
-.L1234:
+	adrp	x23, .LANCHOR152
+	add	x23, x23, :lo12:.LANCHOR152
+	stp	x21, x22, [sp, 32]
+	mov	w22, 0
+	stp	x19, x20, [sp, 16]
+	stp	x25, x26, [sp, 64]
+	adrp	x21, .LANCHOR159
+	stp	x27, x28, [sp, 80]
+	add	x1, x21, :lo12:.LANCHOR159
+	adrp	x20, check_vpc_table
+	bl	printf
+	add	x19, x20, :lo12:check_vpc_table
+	mov	w2, 8192
+	mov	w1, 0
+	mov	x0, x19
+	bl	ftl_memset
+.L979:
+	ldr	w0, [x23]
+	cmp	w22, w0
+	bcc	.L981
+	adrp	x22, .LANCHOR5
+	adrp	x24, .LC26
+	add	x22, x22, :lo12:.LANCHOR5
+	add	x26, x20, :lo12:check_vpc_table
+	add	x24, x24, :lo12:.LC26
+	mov	w23, 0
+	mov	w19, 0
+	adrp	x25, .LANCHOR42
+.L982:
+	ldrh	w0, [x22]
+	cmp	w0, w19
+	bhi	.L984
+	adrp	x0, .LANCHOR47
+	ldr	x19, [x0, #:lo12:.LANCHOR47]
+	cbz	x19, .L985
+	adrp	x0, .LANCHOR48
+	adrp	x25, .LC27
+	add	x20, x20, :lo12:check_vpc_table
+	add	x25, x25, :lo12:.LC27
+	ldrh	w26, [x0, #:lo12:.LANCHOR48]
+	adrp	x0, .LANCHOR40
+	mov	x24, x0
+	mov	w22, 0
+	ldr	x1, [x0, #:lo12:.LANCHOR40]
+	adrp	x27, .LANCHOR42
+	mov	w28, 6
+	sub	x19, x19, x1
+	mov	x1, -6148914691236517206
+	asr	x19, x19, 1
+	movk	x1, 0xaaab, lsl 0
+	mul	x19, x19, x1
+	and	w19, w19, 65535
+.L986:
+	cmp	w22, w26
+	bne	.L988
+.L985:
+	cbz	w23, .L978
+	adrp	x0, .LC1
+	mov	w2, 2389
+	add	x1, x21, :lo12:.LANCHOR159
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L978:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldr	x25, [sp, 64]
-	ldp	x29, x30, [sp], 128
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
 	ret
-.L1237:
-	adrp	x1, .LANCHOR23
-	ldrh	w2, [x1, #:lo12:.LANCHOR23]
-	mov	w1, 255
-	bl	ftl_memset
-	b	.L1238
-.L1243:
-	ldrh	w0, [x22, 4]
-	cbz	w0, .L1240
-	ldr	w0, [x29, 100]
-	add	w24, w24, 1
-	stp	w21, w0, [x20, 8]
-	ldrh	w0, [x22]
-	strh	w0, [x20, 2]
-	mov	x0, x22
-	bl	get_new_active_ppa
-	str	w0, [x29, 100]
-	ldr	w0, [x23]
-	mov	w3, 0
-	str	w0, [x20, 4]
+.L981:
 	mov	w2, 0
-	add	w0, w0, 1
-	mov	w1, 1
+	add	x1, x29, 108
+	mov	w0, w22
+	bl	log2phys
+	ldr	w0, [x29, 108]
 	cmn	w0, #1
-	csel	w0, w0, wzr, ne
-	str	w0, [x23]
-	add	x0, x29, 96
-	bl	FlashProgPages
-	ldrh	w0, [x22]
-	bl	decrement_vpc_count
-	b	.L1239
-.L1235:
-	add	x19, x19, :lo12:.LANCHOR51
-	strb	wzr, [x19, 10]
-	b	.L1234
-	.size	FtlWriteDump_data, .-FtlWriteDump_data
-	.section	.text.l2p_flush,"ax",@progbits
+	beq	.L980
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+	and	x0, x0, 65535
+	ldrh	w1, [x19, x0, lsl 1]
+	add	w1, w1, 1
+	strh	w1, [x19, x0, lsl 1]
+.L980:
+	add	w22, w22, 1
+	b	.L979
+.L984:
+	ldr	x0, [x25, #:lo12:.LANCHOR42]
+	ubfiz	x28, x19, 1, 16
+	sxtw	x27, w19
+	ldrh	w2, [x0, x28]
+	ldrh	w3, [x26, x27, lsl 1]
+	cmp	w2, w3
+	beq	.L983
+	mov	w1, w19
+	mov	x0, x24
+	bl	printf
+	ldr	x0, [x25, #:lo12:.LANCHOR42]
+	mov	w1, 65535
+	ldrh	w0, [x0, x28]
+	cmp	w0, w1
+	beq	.L983
+	ldrh	w1, [x26, x27, lsl 1]
+	cmp	w1, w0
+	csinc	w23, w23, wzr, ls
+.L983:
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L982
+.L988:
+	ldr	x1, [x27, #:lo12:.LANCHOR42]
+	ubfiz	x0, x19, 1, 16
+	ldrh	w2, [x1, x0]
+	cbz	w2, .L987
+	ldrh	w3, [x20, w19, sxtw 1]
+	mov	w23, 1
+	mov	w1, w19
+	mov	x0, x25
+	bl	printf
+.L987:
+	ldr	x0, [x24, #:lo12:.LANCHOR40]
+	umull	x19, w19, w28
+	ldrh	w19, [x0, x19]
+	mov	w0, 65535
+	cmp	w19, w0
+	beq	.L985
+	add	w22, w22, 1
+	and	w22, w22, 65535
+	b	.L986
+	.size	ftl_check_vpc, .-ftl_check_vpc
+	.section	.text.ftl_scan_all_data,"ax",@progbits
 	.align	2
-	.global	l2p_flush
-	.type	l2p_flush, %function
-l2p_flush:
-	stp	x29, x30, [sp, -48]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR33
-	add	x20, x20, :lo12:.LANCHOR33
-	str	x21, [sp, 32]
+	.global	ftl_scan_all_data
+	.type	ftl_scan_all_data, %function
+ftl_scan_all_data:
+	sub	sp, sp, #96
+	adrp	x0, .LC28
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC28
+	stp	x29, x30, [sp, 16]
+	add	x29, sp, 16
+	stp	x19, x20, [sp, 32]
+	adrp	x20, .LANCHOR138
+	stp	x21, x22, [sp, 48]
 	mov	w19, 0
-	adrp	x21, .LANCHOR55
-	bl	FtlWriteDump_data
-.L1253:
-	ldrh	w0, [x20]
-	cmp	w0, w19
-	bhi	.L1255
-	mov	w0, 0
-	ldr	x21, [sp, 32]
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
+	adrp	x21, .LANCHOR152
+	add	x22, x20, :lo12:.LANCHOR138
+	add	x21, x21, :lo12:.LANCHOR152
+	str	x23, [sp, 64]
+	bl	printf
+.L1004:
+	ldr	w0, [x21]
+	cmp	w19, w0
+	bcc	.L1010
+	ldp	x19, x20, [sp, 32]
+	ldp	x21, x22, [sp, 48]
+	ldp	x29, x30, [sp, 16]
+	ldr	x23, [sp, 64]
+	add	sp, sp, 96
 	ret
-.L1255:
-	ldr	x1, [x21, #:lo12:.LANCHOR55]
-	ubfiz	x0, x19, 4, 16
-	add	x0, x1, x0
-	ldr	w0, [x0, 4]
-	tbz	w0, #31, .L1254
+.L1010:
+	mov	w2, 0
+	add	x1, x29, 76
 	mov	w0, w19
-	bl	flush_l2p_region
-.L1254:
+	bl	log2phys
+	tst	x19, 2047
+	bne	.L1005
+	ldr	w2, [x29, 76]
+	adrp	x0, .LC29
+	mov	w1, w19
+	add	x0, x0, :lo12:.LC29
+	bl	printf
+.L1005:
+	ldr	w1, [x29, 76]
+	cmn	w1, #1
+	beq	.L1007
+	add	x0, x20, :lo12:.LANCHOR138
+	str	wzr, [x20, #:lo12:.LANCHOR138]
+	mov	w2, 0
+	str	w1, [x0, 4]
+	adrp	x1, .LANCHOR106
+	str	w19, [x0, 24]
+	ldr	x1, [x1, #:lo12:.LANCHOR106]
+	str	x1, [x0, 8]
+	adrp	x1, .LANCHOR114
+	ldr	x23, [x1, #:lo12:.LANCHOR114]
+	mov	w1, 1
+	str	x23, [x0, 16]
+	bl	FlashReadPages
+	ldr	w0, [x20, #:lo12:.LANCHOR138]
+	cmp	w0, 256
+	ccmn	w0, #1, 4, ne
+	beq	.L1008
+	ldr	w0, [x23, 8]
+	cmp	w19, w0
+	beq	.L1007
+.L1008:
+	ldp	x1, x0, [x22, 8]
+	ldr	w2, [x1, 4]
+	str	w2, [sp]
+	ldr	w2, [x22, 4]
+	ldp	w3, w4, [x0]
+	ldp	w5, w6, [x0, 8]
+	adrp	x0, .LC30
+	ldr	w7, [x1]
+	add	x0, x0, :lo12:.LC30
+	mov	w1, w19
+	bl	printf
+.L1007:
 	add	w19, w19, 1
-	and	w19, w19, 65535
-	b	.L1253
-	.size	l2p_flush, .-l2p_flush
-	.section	.text.FtlSuperblockPowerLostFix,"ax",@progbits
+	b	.L1004
+	.size	ftl_scan_all_data, .-ftl_scan_all_data
+	.section	.text.FtlGcScanTempBlk,"ax",@progbits
 	.align	2
-	.global	FtlSuperblockPowerLostFix
-	.type	FtlSuperblockPowerLostFix, %function
-FtlSuperblockPowerLostFix:
-	stp	x29, x30, [sp, -80]!
-	adrp	x1, .LANCHOR123
+	.global	FtlGcScanTempBlk
+	.type	FtlGcScanTempBlk, %function
+FtlGcScanTempBlk:
+	stp	x29, x30, [sp, -144]!
 	add	x29, sp, 0
+	stp	x25, x26, [sp, 64]
+	adrp	x26, .LANCHOR160
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	mov	w0, -1
+	ldrh	w20, [x26, #:lo12:.LANCHOR160]
+	mov	w0, 65535
 	stp	x21, x22, [sp, 32]
-	str	w0, [x29, 72]
-	adrp	x0, .LANCHOR115
-	ldr	x21, [x1, #:lo12:.LANCHOR123]
-	mov	w1, -3
-	ldr	x0, [x0, #:lo12:.LANCHOR115]
-	adrp	x22, .LANCHOR71
-	str	x21, [x29, 64]
-	add	x22, x22, :lo12:.LANCHOR71
-	str	x0, [x29, 56]
-	ldrh	w20, [x19, 4]
-	str	w1, [x21, 8]
-	mov	w1, -2
-	str	w1, [x21, 12]
-	and	w20, w20, 1
-	ldrh	w1, [x19]
-	add	w20, w20, 6
-	strh	w1, [x21, 2]
-	strh	wzr, [x21]
-	mov	w1, 61589
-	str	w1, [x0]
-	mov	w1, 22136
-	movk	w1, 0x1234, lsl 16
-	str	w1, [x0, 4]
-.L1263:
-	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1259
-.L1260:
+	stp	x23, x24, [sp, 48]
+	cmp	w20, w0
+	stp	x27, x28, [sp, 80]
+	beq	.L1033
+	cbnz	w20, .L1013
+.L1014:
+	bl	FtlGcPageVarInit
+	b	.L1015
+.L1033:
+	mov	w20, 0
+.L1013:
+	adrp	x0, .LANCHOR19
+	ldrh	w0, [x0, #:lo12:.LANCHOR19]
+	cmp	w0, w1
+	beq	.L1014
+.L1015:
+	adrp	x27, .LANCHOR152
+	add	x27, x27, :lo12:.LANCHOR152
+.L1016:
 	ldrh	w0, [x19]
-	adrp	x1, .LANCHOR42
-	ldrh	w3, [x19, 4]
-	ldr	x2, [x1, #:lo12:.LANCHOR42]
-	lsl	x0, x0, 1
-	ldrh	w1, [x2, x0]
-	sub	w1, w1, w3
-	strh	w1, [x2, x0]
+	mov	w23, 65535
+	strb	wzr, [x19, 8]
+	cmp	w0, w23
+	beq	.L1017
+.L1032:
+	adrp	x1, .LANCHOR64
+	adrp	x24, .LANCHOR103
+	add	x4, x19, 16
+	mov	w21, 0
+	ldr	x5, [x1, #:lo12:.LANCHOR64]
+	adrp	x1, .LANCHOR23
+	ldr	x0, [x24, #:lo12:.LANCHOR103]
+	ldrh	w6, [x1, #:lo12:.LANCHOR23]
+	adrp	x1, .LANCHOR65
+	ldr	x7, [x1, #:lo12:.LANCHOR65]
+	adrp	x1, .LANCHOR24
+	ldrh	w8, [x1, #:lo12:.LANCHOR24]
+	adrp	x1, .LANCHOR3
+	ldrh	w1, [x1, #:lo12:.LANCHOR3]
+	add	x1, x1, 8
+	add	x1, x19, x1, lsl 1
+.L1018:
+	cmp	x4, x1
+	bne	.L1020
+	mov	w1, w21
+	ubfiz	x21, x21, 5, 16
+	mov	x22, 0
+	mov	w2, 0
+	bl	FlashReadPages
+.L1021:
+	cmp	x21, x22
+	bne	.L1031
 	adrp	x0, .LANCHOR19
-	strb	wzr, [x19, 6]
-	strh	wzr, [x19, 4]
+	add	w20, w20, 1
+	and	w20, w20, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
-	strh	w0, [x19, 2]
-	ldp	x21, x22, [sp, 32]
+	cmp	w0, w20
+	bhi	.L1032
+.L1017:
+	strh	w20, [x19, 2]
+	mov	w0, -1
+	strb	wzr, [x19, 6]
+	mov	w1, w20
+	strh	w0, [x26, #:lo12:.LANCHOR160]
+	mov	w2, 0
+	mov	x0, x19
+	bl	ftl_sb_update_avl_pages
+	mov	w0, -1
 	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 80
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 144
 	ret
-.L1259:
-	mov	x0, x19
-	bl	get_new_active_ppa
-	str	w0, [x29, 52]
-	cmn	w0, #1
-	beq	.L1260
-	ldr	w0, [x22]
-	mov	w3, 0
-	str	w0, [x21, 4]
+.L1020:
+	ldrh	w3, [x4]
+	cmp	w3, w23
+	beq	.L1019
+	ubfiz	x2, x21, 5, 16
+	orr	w3, w20, w3, lsl 10
+	add	x2, x0, x2
+	str	w3, [x2, 4]
+	mul	w3, w21, w6
+	asr	w3, w3, 2
+	add	x3, x5, x3, sxtw 2
+	str	x3, [x2, 8]
+	mul	w3, w21, w8
+	add	w21, w21, 1
+	and	w21, w21, 65535
+	asr	w3, w3, 2
+	add	x3, x7, x3, sxtw 2
+	str	x3, [x2, 16]
+.L1019:
+	add	x4, x4, 2
+	b	.L1018
+.L1031:
+	ldr	x1, [x24, #:lo12:.LANCHOR103]
+	add	x0, x1, x22
+	ldr	w1, [x1, x22]
+	ldr	w28, [x0, 4]
+	cbnz	w1, .L1022
+	ldr	x25, [x0, 16]
+	ldrh	w0, [x25]
+	cmp	w0, w23
+	beq	.L1022
+	ldr	w0, [x25, 8]
+	ldr	w1, [x27]
+	cmp	w0, w1
+	bls	.L1024
+.L1022:
+	adrp	x0, .LANCHOR42
+	ldrh	w1, [x19]
+	mov	w20, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR42]
+	strh	wzr, [x0, x1, lsl 1]
+	ldrh	w0, [x19]
+	bl	INSERT_FREE_LIST
+	mov	w0, -1
+	strh	w0, [x19]
+	bl	FtlGcPageVarInit
+	b	.L1016
+.L1024:
+	add	x1, x29, 108
 	mov	w2, 0
-	add	w0, w0, 1
-	mov	w1, 1
+	bl	log2phys
+	ldr	w0, [x25, 12]
+	ldr	w1, [x29, 108]
+	cmp	w0, w1
+	beq	.L1026
+.L1027:
+	ldp	w2, w0, [x25, 8]
+	mov	w1, w28
+	add	x22, x22, 32
+	bl	FtlGcUpdatePage
+	b	.L1021
+.L1026:
 	cmn	w0, #1
-	csel	w0, w0, wzr, ne
-	str	w0, [x22]
-	add	x0, x29, 48
-	bl	FlashProgPages
-	ldrh	w0, [x19]
-	bl	decrement_vpc_count
-	subs	w20, w20, #1
-	bne	.L1263
-	b	.L1260
-	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
+	beq	.L1027
+	str	w0, [x29, 116]
+	adrp	x0, .LANCHOR110
+	mov	w2, 0
+	mov	w1, 1
+	ldr	x0, [x0, #:lo12:.LANCHOR110]
+	str	x0, [x29, 120]
+	adrp	x0, .LANCHOR115
+	ldr	x0, [x0, #:lo12:.LANCHOR115]
+	str	x0, [x29, 128]
+	add	x0, x29, 112
+	bl	FlashReadPages
+	adrp	x0, .LANCHOR12
+	ldr	x2, [x24, #:lo12:.LANCHOR103]
+	ldr	x3, [x29, 120]
+	ldrh	w1, [x0, #:lo12:.LANCHOR12]
+	add	x2, x2, x22
+	mov	x0, 0
+	ubfiz	x1, x1, 9, 16
+.L1028:
+	cmp	x0, x1
+	beq	.L1027
+	ldr	x4, [x2, 8]
+	ldr	w5, [x4, x0]
+	add	x0, x0, 4
+	add	x4, x3, x0
+	ldr	w4, [x4, -4]
+	cmp	w5, w4
+	beq	.L1028
+	ldrh	w1, [x19]
+	adrp	x0, .LC31
+	ldr	w2, [x29, 116]
+	add	x0, x0, :lo12:.LC31
+	bl	printf
+	b	.L1022
+	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
 	.section	.text.FtlVendorPartWrite,"ax",@progbits
 	.align	2
 	.global	FtlVendorPartWrite
@@ -8990,7 +7457,7 @@ FtlVendorPartWrite:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w1, w0
-	bhi	.L1279
+	bhi	.L1051
 	adrp	x0, .LANCHOR22
 	adrp	x25, .LANCHOR12
 	adrp	x26, .LANCHOR23
@@ -9000,9 +7467,9 @@ FtlVendorPartWrite:
 	add	x26, x26, :lo12:.LANCHOR23
 	mov	w23, 0
 	lsr	w21, w28, w21
-.L1273:
-	cbnz	w20, .L1278
-.L1271:
+.L1045:
+	cbnz	w20, .L1050
+.L1043:
 	mov	w0, w23
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9011,11 +7478,11 @@ FtlVendorPartWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 208
 	ret
-.L1278:
+.L1050:
 	ldrh	w1, [x25]
-	adrp	x0, .LANCHOR133
-	adrp	x27, .LANCHOR117
-	ldr	x0, [x0, #:lo12:.LANCHOR133]
+	adrp	x0, .LANCHOR123
+	adrp	x27, .LANCHOR108
+	ldr	x0, [x0, #:lo12:.LANCHOR123]
 	udiv	w22, w28, w1
 	ldr	w2, [x0, w21, uxtw 2]
 	and	w0, w20, 65535
@@ -9024,10 +7491,10 @@ FtlVendorPartWrite:
 	and	w19, w19, 65535
 	cmp	w20, w19
 	csel	w19, w0, w19, cc
-	cbz	w2, .L1275
+	cbz	w2, .L1047
 	cmp	w19, w1
-	beq	.L1275
-	ldr	x0, [x27, #:lo12:.LANCHOR117]
+	beq	.L1047
+	ldr	x0, [x27, #:lo12:.LANCHOR108]
 	str	x0, [x29, 120]
 	add	x0, x29, 144
 	str	w2, [x29, 116]
@@ -9036,19 +7503,19 @@ FtlVendorPartWrite:
 	mov	w1, w2
 	add	x0, x29, 112
 	bl	FlashReadPages
-.L1276:
+.L1048:
 	lsl	w4, w19, 9
-	ldr	x0, [x27, #:lo12:.LANCHOR117]
+	ldr	x0, [x27, #:lo12:.LANCHOR108]
 	lsl	w22, w22, 7
 	mov	w2, w4
 	mov	x1, x24
 	str	w4, [x29, 108]
 	add	x0, x0, x22, sxtw 2
 	bl	ftl_memcpy
-	ldr	x2, [x27, #:lo12:.LANCHOR117]
+	ldr	x2, [x27, #:lo12:.LANCHOR108]
 	mov	w1, w21
-	adrp	x0, .LANCHOR158
-	add	x0, x0, :lo12:.LANCHOR158
+	adrp	x0, .LANCHOR161
+	add	x0, x0, :lo12:.LANCHOR161
 	sub	w20, w20, w19
 	add	w28, w28, w19
 	add	w21, w21, 1
@@ -9057,72 +7524,72 @@ FtlVendorPartWrite:
 	ldr	w4, [x29, 108]
 	csinv	w23, w23, wzr, ne
 	add	x24, x24, x4, sxtw
-	b	.L1273
-.L1275:
+	b	.L1045
+.L1047:
 	ldrh	w2, [x26]
 	mov	w1, 0
-	ldr	x0, [x27, #:lo12:.LANCHOR117]
+	ldr	x0, [x27, #:lo12:.LANCHOR108]
 	bl	ftl_memset
-	b	.L1276
-.L1279:
+	b	.L1048
+.L1051:
 	mov	w23, -1
-	b	.L1271
+	b	.L1043
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.section	.text.Ftl_save_ext_data,"ax",@progbits
 	.align	2
 	.global	Ftl_save_ext_data
 	.type	Ftl_save_ext_data, %function
 Ftl_save_ext_data:
-	adrp	x0, .LANCHOR81
-	add	x2, x0, :lo12:.LANCHOR81
-	ldr	w1, [x0, #:lo12:.LANCHOR81]
+	adrp	x0, .LANCHOR135
+	add	x2, x0, :lo12:.LANCHOR135
+	ldr	w1, [x0, #:lo12:.LANCHOR135]
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1284
+	bne	.L1056
 	mov	w0, 72
 	mov	w1, 1
 	movk	w0, 0x5000, lsl 16
 	str	w0, [x2, 4]
-	adrp	x0, .LANCHOR68
-	ldr	w0, [x0, #:lo12:.LANCHOR68]
+	adrp	x0, .LANCHOR162
+	ldr	w0, [x0, #:lo12:.LANCHOR162]
 	str	w0, [x2, 88]
-	adrp	x0, .LANCHOR69
-	ldr	w0, [x0, #:lo12:.LANCHOR69]
+	adrp	x0, .LANCHOR163
+	ldr	w0, [x0, #:lo12:.LANCHOR163]
 	str	w0, [x2, 92]
-	adrp	x0, .LANCHOR67
-	ldr	w0, [x0, #:lo12:.LANCHOR67]
+	adrp	x0, .LANCHOR84
+	ldr	w0, [x0, #:lo12:.LANCHOR84]
 	str	w0, [x2, 8]
-	adrp	x0, .LANCHOR64
-	ldr	w0, [x0, #:lo12:.LANCHOR64]
+	adrp	x0, .LANCHOR85
+	ldr	w0, [x0, #:lo12:.LANCHOR85]
 	str	w0, [x2, 12]
-	adrp	x0, .LANCHOR62
-	ldr	w0, [x0, #:lo12:.LANCHOR62]
+	adrp	x0, .LANCHOR89
+	ldr	w0, [x0, #:lo12:.LANCHOR89]
 	str	w0, [x2, 16]
-	adrp	x0, .LANCHOR66
-	ldr	w0, [x0, #:lo12:.LANCHOR66]
+	adrp	x0, .LANCHOR88
+	ldr	w0, [x0, #:lo12:.LANCHOR88]
 	str	w0, [x2, 20]
-	adrp	x0, .LANCHOR73
-	ldr	w0, [x0, #:lo12:.LANCHOR73]
+	adrp	x0, .LANCHOR91
+	ldr	w0, [x0, #:lo12:.LANCHOR91]
 	str	w0, [x2, 28]
-	adrp	x0, .LANCHOR75
-	ldr	w0, [x0, #:lo12:.LANCHOR75]
+	adrp	x0, .LANCHOR80
+	ldr	w0, [x0, #:lo12:.LANCHOR80]
 	str	w0, [x2, 32]
-	adrp	x0, .LANCHOR63
-	ldr	w0, [x0, #:lo12:.LANCHOR63]
+	adrp	x0, .LANCHOR86
+	ldr	w0, [x0, #:lo12:.LANCHOR86]
 	str	w0, [x2, 36]
-	adrp	x0, .LANCHOR65
-	ldr	w0, [x0, #:lo12:.LANCHOR65]
+	adrp	x0, .LANCHOR87
+	ldr	w0, [x0, #:lo12:.LANCHOR87]
 	str	w0, [x2, 40]
-	adrp	x0, .LANCHOR76
-	ldr	w0, [x0, #:lo12:.LANCHOR76]
+	adrp	x0, .LANCHOR92
+	ldr	w0, [x0, #:lo12:.LANCHOR92]
 	str	w0, [x2, 44]
-	adrp	x0, .LANCHOR77
-	ldr	w0, [x0, #:lo12:.LANCHOR77]
+	adrp	x0, .LANCHOR93
+	ldr	w0, [x0, #:lo12:.LANCHOR93]
 	str	w0, [x2, 48]
 	mov	w0, 0
 	b	FtlVendorPartWrite
-.L1284:
+.L1056:
 	ret
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
 	.section	.text.FtlEctTblFlush,"ax",@progbits
@@ -9130,34 +7597,34 @@ Ftl_save_ext_data:
 	.global	FtlEctTblFlush
 	.type	FtlEctTblFlush, %function
 FtlEctTblFlush:
-	adrp	x2, .LANCHOR170
-	ldrh	w1, [x2, #:lo12:.LANCHOR170]
+	adrp	x2, .LANCHOR164
+	ldrh	w1, [x2, #:lo12:.LANCHOR164]
 	cmp	w1, 31
-	bhi	.L1290
+	bhi	.L1062
 	add	w1, w1, 1
-	strh	w1, [x2, #:lo12:.LANCHOR170]
+	strh	w1, [x2, #:lo12:.LANCHOR164]
 	mov	w1, 1
-.L1287:
-	adrp	x2, .LANCHOR127
-	cbnz	w0, .L1288
-	ldr	x0, [x2, #:lo12:.LANCHOR127]
+.L1059:
+	adrp	x2, .LANCHOR118
+	cbnz	w0, .L1060
+	ldr	x0, [x2, #:lo12:.LANCHOR118]
 	ldr	w3, [x0, 20]
 	ldr	w0, [x0, 16]
 	add	w1, w1, w3
 	cmp	w0, w1
-	bcc	.L1292
-.L1288:
+	bcc	.L1064
+.L1060:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
-	ldr	x2, [x2, #:lo12:.LANCHOR127]
+	ldr	x2, [x2, #:lo12:.LANCHOR118]
 	ldr	w0, [x2, 16]
 	str	w0, [x2, 20]
 	mov	w0, 17221
 	str	wzr, [x2, 4]
 	movk	w0, 0x4254, lsl 16
 	str	w0, [x2]
-	adrp	x0, .LANCHOR125
-	ldrh	w1, [x0, #:lo12:.LANCHOR125]
+	adrp	x0, .LANCHOR116
+	ldrh	w1, [x0, #:lo12:.LANCHOR116]
 	lsl	w0, w1, 9
 	str	w0, [x2, 12]
 	ldr	w0, [x2, 8]
@@ -9169,10 +7636,10 @@ FtlEctTblFlush:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1290:
+.L1062:
 	mov	w1, 32
-	b	.L1287
-.L1292:
+	b	.L1059
+.L1064:
 	mov	w0, 0
 	ret
 	.size	FtlEctTblFlush, .-FtlEctTblFlush
@@ -9202,19 +7669,19 @@ FtlVendorPartRead:
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	cmp	w1, w0
-	bhi	.L1304
+	bhi	.L1076
 	adrp	x0, .LANCHOR22
 	mov	x25, x2
 	mov	w24, 0
-	adrp	x27, .LANCHOR133
+	adrp	x27, .LANCHOR123
 	ldrh	w20, [x0, #:lo12:.LANCHOR22]
 	adrp	x0, .LANCHOR12
 	add	x0, x0, :lo12:.LANCHOR12
 	str	x0, [x29, 104]
 	lsr	w20, w22, w20
-.L1297:
-	cbnz	w21, .L1303
-.L1295:
+.L1069:
+	cbnz	w21, .L1075
+.L1067:
 	mov	w0, w24
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9223,8 +7690,8 @@ FtlVendorPartRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 208
 	ret
-.L1303:
-	ldr	x0, [x27, #:lo12:.LANCHOR133]
+.L1075:
+	ldr	x0, [x27, #:lo12:.LANCHOR123]
 	ldr	w4, [x0, w20, uxtw 2]
 	ldr	x0, [x29, 104]
 	ldrh	w19, [x0]
@@ -9236,12 +7703,12 @@ FtlVendorPartRead:
 	cmp	w21, w19
 	csel	w19, w0, w19, cc
 	lsl	w26, w19, 9
-	cbz	w4, .L1299
-	adrp	x28, .LANCHOR117
+	cbz	w4, .L1071
+	adrp	x28, .LANCHOR108
 	mov	w2, 1
 	str	w4, [x29, 96]
 	mov	w1, w2
-	ldr	x0, [x28, #:lo12:.LANCHOR117]
+	ldr	x0, [x28, #:lo12:.LANCHOR108]
 	str	x0, [x29, 120]
 	add	x0, x29, 144
 	str	w4, [x29, 116]
@@ -9252,45 +7719,45 @@ FtlVendorPartRead:
 	mov	x5, x28
 	ldr	w4, [x29, 96]
 	cmn	w0, #1
-	adrp	x0, .LANCHOR148
+	adrp	x0, .LANCHOR138
 	csinv	w24, w24, wzr, ne
-	ldr	w0, [x0, #:lo12:.LANCHOR148]
+	ldr	w0, [x0, #:lo12:.LANCHOR138]
 	cmp	w0, 256
-	bne	.L1301
+	bne	.L1073
 	mov	w2, w4
 	mov	w1, w20
-	adrp	x0, .LC107
+	adrp	x0, .LC32
 	str	x28, [x29, 96]
-	add	x0, x0, :lo12:.LC107
+	add	x0, x0, :lo12:.LC32
 	bl	printf
-	ldr	x2, [x28, #:lo12:.LANCHOR117]
+	ldr	x2, [x28, #:lo12:.LANCHOR108]
 	mov	w1, w20
-	adrp	x0, .LANCHOR158
-	add	x0, x0, :lo12:.LANCHOR158
+	adrp	x0, .LANCHOR161
+	add	x0, x0, :lo12:.LANCHOR161
 	bl	FtlMapWritePage
 	ldr	x5, [x29, 96]
-.L1301:
-	ldr	x1, [x5, #:lo12:.LANCHOR117]
+.L1073:
+	ldr	x1, [x5, #:lo12:.LANCHOR108]
 	lsl	w23, w23, 7
 	mov	w2, w26
 	mov	x0, x25
 	add	x1, x1, x23, sxtw 2
 	bl	ftl_memcpy
-.L1302:
+.L1074:
 	add	w20, w20, 1
 	sub	w21, w21, w19
 	add	w22, w22, w19
 	add	x25, x25, x26, sxtw
-	b	.L1297
-.L1299:
+	b	.L1069
+.L1071:
 	mov	w2, w26
 	mov	w1, 0
 	mov	x0, x25
 	bl	ftl_memset
-	b	.L1302
-.L1304:
+	b	.L1074
+.L1076:
 	mov	w24, -1
-	b	.L1295
+	b	.L1067
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
 	.section	.text.FtlLoadEctTbl,"ax",@progbits
 	.align	2
@@ -9301,28 +7768,28 @@ FtlLoadEctTbl:
 	mov	w0, 64
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR127
-	adrp	x20, .LANCHOR125
-	ldr	x2, [x19, #:lo12:.LANCHOR127]
-	ldrh	w1, [x20, #:lo12:.LANCHOR125]
+	adrp	x19, .LANCHOR118
+	adrp	x20, .LANCHOR116
+	ldr	x2, [x19, #:lo12:.LANCHOR118]
+	ldrh	w1, [x20, #:lo12:.LANCHOR116]
 	bl	FtlVendorPartRead
-	ldr	x0, [x19, #:lo12:.LANCHOR127]
+	ldr	x0, [x19, #:lo12:.LANCHOR118]
 	ldr	w1, [x0]
 	mov	w0, 17221
 	movk	w0, 0x4254, lsl 16
 	cmp	w1, w0
-	beq	.L1307
-	adrp	x1, .LC108
-	adrp	x0, .LC71
-	add	x1, x1, :lo12:.LC108
-	add	x0, x0, :lo12:.LC71
+	beq	.L1079
+	adrp	x1, .LC33
+	adrp	x0, .LC34
+	add	x1, x1, :lo12:.LC33
+	add	x0, x0, :lo12:.LC34
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR127]
+	ldr	x0, [x19, #:lo12:.LANCHOR118]
 	mov	w1, 0
-	ldrh	w2, [x20, #:lo12:.LANCHOR125]
+	ldrh	w2, [x20, #:lo12:.LANCHOR116]
 	lsl	w2, w2, 9
 	bl	ftl_memset
-.L1307:
+.L1079:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -9338,67 +7805,67 @@ Ftl_load_ext_data:
 	mov	w0, 0
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR81
+	adrp	x19, .LANCHOR135
 	str	x21, [sp, 32]
-	add	x21, x19, :lo12:.LANCHOR81
+	add	x21, x19, :lo12:.LANCHOR135
 	mov	x2, x21
 	bl	FtlVendorPartRead
-	ldr	w0, [x19, #:lo12:.LANCHOR81]
+	ldr	w0, [x19, #:lo12:.LANCHOR135]
 	mov	w20, 19539
 	movk	w20, 0x4654, lsl 16
 	cmp	w0, w20
-	beq	.L1310
+	beq	.L1082
 	mov	w2, 512
 	mov	w1, 0
 	mov	x0, x21
 	bl	ftl_memset
-	str	w20, [x19, #:lo12:.LANCHOR81]
-.L1310:
-	ldr	w1, [x19, #:lo12:.LANCHOR81]
-	add	x0, x19, :lo12:.LANCHOR81
+	str	w20, [x19, #:lo12:.LANCHOR135]
+.L1082:
+	ldr	w1, [x19, #:lo12:.LANCHOR135]
+	add	x0, x19, :lo12:.LANCHOR135
 	cmp	w1, w20
-	adrp	x1, .LANCHOR73
-	bne	.L1311
-	adrp	x2, .LANCHOR68
+	adrp	x1, .LANCHOR91
+	bne	.L1083
+	adrp	x2, .LANCHOR162
 	ldr	w3, [x0, 88]
-	str	w3, [x2, #:lo12:.LANCHOR68]
-	adrp	x2, .LANCHOR69
+	str	w3, [x2, #:lo12:.LANCHOR162]
+	adrp	x2, .LANCHOR163
 	ldr	w3, [x0, 92]
-	str	w3, [x2, #:lo12:.LANCHOR69]
-	adrp	x2, .LANCHOR67
+	str	w3, [x2, #:lo12:.LANCHOR163]
+	adrp	x2, .LANCHOR84
 	ldr	w3, [x0, 8]
-	str	w3, [x2, #:lo12:.LANCHOR67]
-	adrp	x2, .LANCHOR64
+	str	w3, [x2, #:lo12:.LANCHOR84]
+	adrp	x2, .LANCHOR85
 	ldr	w3, [x0, 12]
-	str	w3, [x2, #:lo12:.LANCHOR64]
-	adrp	x2, .LANCHOR62
+	str	w3, [x2, #:lo12:.LANCHOR85]
+	adrp	x2, .LANCHOR89
 	ldr	w3, [x0, 16]
-	str	w3, [x2, #:lo12:.LANCHOR62]
-	adrp	x2, .LANCHOR66
+	str	w3, [x2, #:lo12:.LANCHOR89]
+	adrp	x2, .LANCHOR88
 	ldr	w3, [x0, 20]
-	str	w3, [x2, #:lo12:.LANCHOR66]
+	str	w3, [x2, #:lo12:.LANCHOR88]
 	ldp	w2, w3, [x0, 28]
-	str	w2, [x1, #:lo12:.LANCHOR73]
-	adrp	x2, .LANCHOR75
-	str	w3, [x2, #:lo12:.LANCHOR75]
-	adrp	x2, .LANCHOR63
+	str	w2, [x1, #:lo12:.LANCHOR91]
+	adrp	x2, .LANCHOR80
+	str	w3, [x2, #:lo12:.LANCHOR80]
+	adrp	x2, .LANCHOR86
 	ldr	w3, [x0, 36]
-	str	w3, [x2, #:lo12:.LANCHOR63]
-	adrp	x2, .LANCHOR65
+	str	w3, [x2, #:lo12:.LANCHOR86]
+	adrp	x2, .LANCHOR87
 	ldr	w3, [x0, 40]
-	str	w3, [x2, #:lo12:.LANCHOR65]
-	adrp	x2, .LANCHOR76
+	str	w3, [x2, #:lo12:.LANCHOR87]
+	adrp	x2, .LANCHOR92
 	ldr	w3, [x0, 44]
-	str	w3, [x2, #:lo12:.LANCHOR76]
+	str	w3, [x2, #:lo12:.LANCHOR92]
 	ldr	w2, [x0, 48]
-	adrp	x0, .LANCHOR77
-	str	w2, [x0, #:lo12:.LANCHOR77]
-.L1311:
+	adrp	x0, .LANCHOR93
+	str	w2, [x0, #:lo12:.LANCHOR93]
+.L1083:
 	adrp	x0, .LANCHOR14
-	adrp	x2, .LANCHOR72
-	ldr	w1, [x1, #:lo12:.LANCHOR73]
+	adrp	x2, .LANCHOR90
+	ldr	w1, [x1, #:lo12:.LANCHOR91]
 	ldrh	w0, [x0, #:lo12:.LANCHOR14]
-	ldr	w2, [x2, #:lo12:.LANCHOR72]
+	ldr	w2, [x2, #:lo12:.LANCHOR90]
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	madd	w0, w0, w2, w1
@@ -9406,8 +7873,8 @@ Ftl_load_ext_data:
 	ldp	x29, x30, [sp], 48
 	ldrh	w1, [x1, #:lo12:.LANCHOR5]
 	udiv	w0, w0, w1
-	adrp	x1, .LANCHOR74
-	str	w0, [x1, #:lo12:.LANCHOR74]
+	adrp	x1, .LANCHOR145
+	str	w0, [x1, #:lo12:.LANCHOR145]
 	ret
 	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
 	.section	.text.sftl_vendor_read,"ax",@progbits
@@ -9418,37 +7885,129 @@ sftl_vendor_read:
 	add	w0, w0, 256
 	b	FtlVendorPartRead
 	.size	sftl_vendor_read, .-sftl_vendor_read
+	.section	.text.FtlMapBlkWriteDump_data,"ax",@progbits
+	.align	2
+	.global	FtlMapBlkWriteDump_data
+	.type	FtlMapBlkWriteDump_data, %function
+FtlMapBlkWriteDump_data:
+	ldr	w1, [x0, 56]
+	cbz	w1, .L1086
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	ldrh	w20, [x0, 6]
+	adrp	x0, .LANCHOR107
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR138
+	add	x21, x23, :lo12:.LANCHOR138
+	ldr	x0, [x0, #:lo12:.LANCHOR107]
+	mov	x22, x23
+	str	x0, [x21, 8]
+	adrp	x0, .LANCHOR114
+	ldr	x24, [x0, #:lo12:.LANCHOR114]
+	ldrh	w0, [x19, 2]
+	str	x25, [sp, 64]
+	str	x24, [x21, 16]
+	str	wzr, [x19, 56]
+	ldr	x25, [x19, 40]
+	cbz	w0, .L1088
+	adrp	x1, .LANCHOR20
+	ldrh	w1, [x1, #:lo12:.LANCHOR20]
+	sub	w1, w1, #1
+	cmp	w0, w1
+	bge	.L1088
+	ldrh	w1, [x19]
+	mov	w2, 65535
+	cmp	w1, w2
+	beq	.L1088
+	ldr	x2, [x19, 16]
+	ubfiz	x1, x1, 1, 16
+	sub	w0, w0, #1
+	ldrh	w1, [x2, x1]
+	mov	w2, 1
+	orr	w0, w0, w1, lsl 10
+	mov	w1, w2
+	str	w0, [x21, 4]
+	mov	x0, x21
+	bl	FlashReadPages
+	ldr	w0, [x23, #:lo12:.LANCHOR138]
+	cmn	w0, #1
+	beq	.L1088
+	ldrh	w1, [x24, 8]
+	ldr	x2, [x19, 40]
+	ubfiz	x0, x1, 2, 16
+	ldr	w2, [x2, x0]
+	ldr	w0, [x21, 4]
+	cmp	w2, w0
+	bne	.L1088
+	ldr	x2, [x21, 8]
+.L1100:
+	mov	x0, x19
+	ldr	x25, [sp, 64]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	b	FtlMapWritePage
+.L1088:
+	sub	w20, w20, #1
+	and	w20, w20, 65535
+	ubfiz	x0, x20, 2, 16
+	ldr	w1, [x25, x0]
+	add	x0, x22, :lo12:.LANCHOR138
+	str	w1, [x0, 4]
+	cbz	w1, .L1089
+	mov	w2, 1
+	mov	w1, w2
+	bl	FlashReadPages
+.L1090:
+	add	x22, x22, :lo12:.LANCHOR138
+	mov	w1, w20
+	ldr	x2, [x22, 8]
+	b	.L1100
+.L1089:
+	adrp	x1, .LANCHOR23
+	ldr	x0, [x0, 8]
+	ldrh	w2, [x1, #:lo12:.LANCHOR23]
+	mov	w1, 255
+	bl	ftl_memset
+	b	.L1090
+.L1086:
+	ret
+	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
 	.section	.text.FtlVpcTblFlush,"ax",@progbits
 	.align	2
 	.global	FtlVpcTblFlush
 	.type	FtlVpcTblFlush, %function
 FtlVpcTblFlush:
 	stp	x29, x30, [sp, -112]!
-	adrp	x1, .LANCHOR79
+	adrp	x1, .LANCHOR139
 	mov	w2, 19539
 	add	x29, sp, 0
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR123
+	adrp	x25, .LANCHOR114
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR148
-	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR115
+	adrp	x22, .LANCHOR106
 	stp	x27, x28, [sp, 80]
-	add	x28, x22, :lo12:.LANCHOR148
-	ldr	x27, [x25, #:lo12:.LANCHOR123]
-	movk	w2, 0x4654, lsl 16
+	adrp	x21, .LANCHOR138
+	ldr	x27, [x25, #:lo12:.LANCHOR114]
+	add	x28, x21, :lo12:.LANCHOR138
 	stp	x19, x20, [sp, 16]
-	add	x20, x1, :lo12:.LANCHOR79
-	ldr	x0, [x24, #:lo12:.LANCHOR115]
-	adrp	x23, .LANCHOR70
-	ldrh	w1, [x1, #:lo12:.LANCHOR79]
-	mov	w21, 0
+	movk	w2, 0x4654, lsl 16
+	stp	x23, x24, [sp, 48]
+	add	x24, x1, :lo12:.LANCHOR139
+	ldr	x0, [x22, #:lo12:.LANCHOR106]
+	adrp	x23, .LANCHOR82
+	ldrh	w1, [x1, #:lo12:.LANCHOR139]
+	adrp	x26, .LANCHOR23
 	stp	x0, x27, [x28, 8]
-	mov	w26, 65535
+	mov	w20, 0
 	strh	w1, [x27, 2]
 	mov	w1, -3932
 	strh	w1, [x27]
-	ldr	w1, [x20, 8]
+	ldr	w1, [x24, 8]
 	stp	w1, wzr, [x27, 4]
 	adrp	x1, .LANCHOR39
 	add	x19, x1, :lo12:.LANCHOR39
@@ -9457,7 +8016,7 @@ FtlVpcTblFlush:
 	mov	w1, 72
 	movk	w1, 0x5000, lsl 16
 	str	w1, [x19, 4]
-	ldrh	w1, [x20, 6]
+	ldrh	w1, [x24, 6]
 	adrp	x2, .LANCHOR51
 	strh	w1, [x19, 8]
 	adrp	x1, .LANCHOR10
@@ -9490,18 +8049,17 @@ FtlVpcTblFlush:
 	ldrh	w2, [x1, 2]
 	ldrb	w1, [x1, 8]
 	strb	w1, [x19, 13]
-	adrp	x1, .LANCHOR72
+	adrp	x1, .LANCHOR90
 	orr	w2, w3, w2, lsl 6
 	strh	w2, [x19, 24]
-	ldr	w1, [x1, #:lo12:.LANCHOR72]
+	ldr	w1, [x1, #:lo12:.LANCHOR90]
 	str	w1, [x19, 32]
-	ldr	w1, [x23, #:lo12:.LANCHOR70]
+	ldr	w1, [x23, #:lo12:.LANCHOR82]
 	str	w1, [x19, 40]
-	adrp	x1, .LANCHOR71
-	ldr	w1, [x1, #:lo12:.LANCHOR71]
+	ldrh	w2, [x26, #:lo12:.LANCHOR23]
+	adrp	x1, .LANCHOR83
+	ldr	w1, [x1, #:lo12:.LANCHOR83]
 	str	w1, [x19, 36]
-	adrp	x1, .LANCHOR23
-	ldrh	w2, [x1, #:lo12:.LANCHOR23]
 	mov	w1, 255
 	bl	ftl_memset
 	ldr	x0, [x28, 8]
@@ -9516,103 +8074,112 @@ FtlVpcTblFlush:
 	lsl	w2, w2, 1
 	add	x0, x0, 48
 	bl	ftl_memcpy
-	ldrh	w1, [x19, #:lo12:.LANCHOR5]
-	mov	x19, x20
-	ldr	x0, [x28, 8]
-	adrp	x20, .LANCHOR20
-	add	x20, x20, :lo12:.LANCHOR20
-	lsr	w2, w1, 3
-	ubfiz	x3, x1, 1, 16
+	ldrh	w0, [x19, #:lo12:.LANCHOR5]
 	adrp	x1, .LANCHOR1
-	add	x3, x3, 48
-	and	x3, x3, -4
-	add	w2, w2, 4
+	ldr	x3, [x28, 8]
+	mov	x19, x28
 	ldr	x1, [x1, #:lo12:.LANCHOR1]
-	add	x0, x0, x3
+	mov	x28, x24
+	lsr	w2, w0, 3
+	ubfiz	x0, x0, 1, 16
+	add	w2, w2, 4
+	add	x0, x0, 48
+	and	x0, x0, -4
+	adrp	x24, .LANCHOR20
+	add	x0, x3, x0
 	bl	ftl_memcpy
 	mov	w0, 0
 	bl	FtlUpdateVaildLpn
-	str	x20, [x29, 104]
-.L1315:
-	ldrh	w2, [x19, 2]
-	ldrh	w1, [x19]
-	ldr	x0, [x24, #:lo12:.LANCHOR115]
-	str	x0, [x28, 8]
-	ldr	x0, [x25, #:lo12:.LANCHOR123]
-	str	x0, [x28, 16]
+	mov	w0, 65535
+	add	x24, x24, :lo12:.LANCHOR20
+	str	w0, [x29, 108]
+	str	x24, [x29, 96]
+.L1102:
+	ldrh	w2, [x28, 2]
+	ldrh	w1, [x28]
+	ldr	x0, [x22, #:lo12:.LANCHOR106]
+	str	x0, [x19, 8]
+	ldr	x0, [x25, #:lo12:.LANCHOR114]
+	str	x0, [x19, 16]
 	orr	w0, w2, w1, lsl 10
-	str	w0, [x28, 4]
-	ldrh	w0, [x20]
+	str	w0, [x19, 4]
+	ldrh	w0, [x24]
 	sub	w0, w0, #1
 	cmp	w2, w0
-	blt	.L1316
-	ldrh	w26, [x19, 4]
-	strh	wzr, [x19, 2]
-	strh	w1, [x19, 4]
+	blt	.L1103
+	ldrh	w0, [x28, 4]
+	strh	wzr, [x28, 2]
+	strh	w1, [x28, 4]
+	str	w0, [x29, 108]
 	bl	FtlFreeSysBlkQueueOut
-	ldr	w1, [x23, #:lo12:.LANCHOR70]
-	str	w1, [x19, 8]
+	strh	w0, [x28]
+	ldr	w1, [x23, #:lo12:.LANCHOR82]
+	str	w1, [x28, 8]
 	add	w2, w1, 1
-	str	w2, [x23, #:lo12:.LANCHOR70]
+	str	w2, [x23, #:lo12:.LANCHOR82]
 	ubfiz	w2, w0, 10, 16
-	str	w2, [x28, 4]
-	strh	w0, [x19]
+	str	w2, [x19, 4]
 	strh	w0, [x27, 2]
 	str	w1, [x27, 4]
-.L1316:
+.L1103:
+	ldrh	w1, [x26, #:lo12:.LANCHOR23]
+	ldr	x0, [x22, #:lo12:.LANCHOR106]
+	bl	js_hash
+	str	w0, [x27, 12]
 	mov	w3, 1
-	mov	x0, x28
+	mov	x0, x19
 	mov	w1, w3
 	mov	w2, w3
 	bl	FlashProgPages
-	ldrh	w0, [x19, 2]
-	ldr	w1, [x28]
+	ldrh	w0, [x28, 2]
+	ldr	w1, [x19]
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	strh	w0, [x19, 2]
+	strh	w0, [x28, 2]
 	cmn	w1, #1
-	bne	.L1317
+	bne	.L1104
 	cmp	w0, 1
-	bne	.L1318
-	adrp	x1, .LANCHOR171
+	bne	.L1105
+	adrp	x1, .LANCHOR165
 	adrp	x0, .LC1
-	mov	w2, 1135
-	add	x1, x1, :lo12:.LANCHOR171
+	mov	w2, 1138
+	add	x1, x1, :lo12:.LANCHOR165
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1318:
-	ldrh	w0, [x19, 2]
+.L1105:
+	ldrh	w0, [x28, 2]
 	cmp	w0, 1
-	bne	.L1319
-	ldr	x0, [x29, 104]
+	bne	.L1106
+	ldr	x0, [x29, 96]
 	ldrh	w0, [x0]
 	sub	w0, w0, #1
-	strh	w0, [x19, 2]
-.L1319:
-	add	w21, w21, 1
-	and	w21, w21, 65535
-	cmp	w21, 3
-	bls	.L1315
-	add	x22, x22, :lo12:.LANCHOR148
-	adrp	x0, .LC109
-	mov	w2, w21
-	add	x0, x0, :lo12:.LC109
-	ldr	w1, [x22, 4]
+	strh	w0, [x28, 2]
+.L1106:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	cmp	w20, 3
+	bls	.L1102
+	add	x21, x21, :lo12:.LANCHOR138
+	adrp	x0, .LC35
+	mov	w2, w20
+	add	x0, x0, :lo12:.LC35
+	ldr	w1, [x21, 4]
 	bl	printf
-.L1321:
-	b	.L1321
-.L1317:
+.L1108:
+	b	.L1108
+.L1104:
 	cmp	w0, 1
-	beq	.L1315
+	beq	.L1102
 	cmp	w1, 256
-	beq	.L1315
+	beq	.L1102
+	ldr	w1, [x29, 108]
 	mov	w0, 65535
-	cmp	w26, w0
-	beq	.L1322
+	cmp	w1, w0
+	beq	.L1109
+	ldrh	w0, [x29, 108]
 	mov	w1, 1
-	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-.L1322:
+.L1109:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -9642,25 +8209,25 @@ FtlSysFlush:
 	.global	sftl_deinit
 	.type	sftl_deinit, %function
 sftl_deinit:
-	adrp	x0, .LANCHOR86
-	ldr	w0, [x0, #:lo12:.LANCHOR86]
+	adrp	x0, .LANCHOR166
+	ldr	w0, [x0, #:lo12:.LANCHOR166]
 	cmp	w0, 1
-	bne	.L1335
+	bne	.L1122
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	FtlSysFlush
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1335:
+.L1122:
 	mov	w0, 0
 	ret
 	.size	sftl_deinit, .-sftl_deinit
-	.section	.text.sftl_discard,"ax",@progbits
+	.section	.text.FtlDiscard,"ax",@progbits
 	.align	2
-	.global	sftl_discard
-	.type	sftl_discard, %function
-sftl_discard:
+	.global	FtlDiscard
+	.type	FtlDiscard, %function
+FtlDiscard:
 	stp	x29, x30, [sp, -80]!
 	add	w2, w0, w1
 	add	x29, sp, 0
@@ -9671,56 +8238,56 @@ sftl_discard:
 	str	x23, [sp, 48]
 	ldr	w1, [x1, #:lo12:.LANCHOR34]
 	cmp	w2, w1
-	bhi	.L1346
+	bhi	.L1133
 	cmp	w19, 31
-	bhi	.L1340
-.L1354:
+	bhi	.L1127
+.L1141:
 	mov	w0, 0
-.L1338:
+.L1125:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1340:
+.L1127:
 	adrp	x21, .LANCHOR12
 	ldrh	w1, [x21, #:lo12:.LANCHOR12]
 	udiv	w20, w0, w1
 	msub	w0, w1, w20, w0
 	ands	w0, w0, 65535
-	beq	.L1341
+	beq	.L1128
 	sub	w1, w1, w0
 	add	w20, w20, 1
 	cmp	w1, w19
 	csel	w1, w1, w19, ls
 	sub	w19, w19, w1, uxth
-.L1341:
-	adrp	x22, .LANCHOR172
-	adrp	x23, .LANCHOR63
-	add	x22, x22, :lo12:.LANCHOR172
-	add	x23, x23, :lo12:.LANCHOR63
+.L1128:
+	adrp	x22, .LANCHOR167
+	adrp	x23, .LANCHOR86
+	add	x22, x22, :lo12:.LANCHOR167
+	add	x23, x23, :lo12:.LANCHOR86
 	mov	w0, -1
 	str	w0, [x29, 76]
-.L1342:
+.L1129:
 	ldrh	w0, [x21, #:lo12:.LANCHOR12]
 	cmp	w19, w0
-	bcs	.L1344
-	adrp	x0, .LANCHOR172
-	ldr	w1, [x0, #:lo12:.LANCHOR172]
+	bcs	.L1131
+	adrp	x0, .LANCHOR167
+	ldr	w1, [x0, #:lo12:.LANCHOR167]
 	cmp	w1, 32
-	bls	.L1354
-	str	wzr, [x0, #:lo12:.LANCHOR172]
+	bls	.L1141
+	str	wzr, [x0, #:lo12:.LANCHOR167]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L1354
-.L1344:
+	b	.L1141
+.L1131:
 	mov	w2, 0
 	add	x1, x29, 72
 	mov	w0, w20
 	bl	log2phys
 	ldr	w0, [x29, 72]
 	cmn	w0, #1
-	beq	.L1343
+	beq	.L1130
 	ldr	w0, [x22]
 	mov	w2, 1
 	add	x1, x29, 76
@@ -9735,125 +8302,15 @@ sftl_discard:
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L1343:
+.L1130:
 	ldrh	w0, [x21, #:lo12:.LANCHOR12]
 	add	w20, w20, 1
 	sub	w19, w19, w0
-	b	.L1342
-.L1346:
+	b	.L1129
+.L1133:
 	mov	w0, -1
-	b	.L1338
-	.size	sftl_discard, .-sftl_discard
-	.section	.text.FtlVpcCheckAndModify,"ax",@progbits
-	.align	2
-	.global	FtlVpcCheckAndModify
-	.type	FtlVpcCheckAndModify, %function
-FtlVpcCheckAndModify:
-	stp	x29, x30, [sp, -96]!
-	adrp	x1, .LANCHOR173
-	adrp	x0, .LC94
-	add	x1, x1, :lo12:.LANCHOR173
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	add	x0, x0, :lo12:.LC94
-	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR128
-	stp	x21, x22, [sp, 32]
-	adrp	x20, .LANCHOR61
-	str	x25, [sp, 64]
-	bl	printf
-	adrp	x0, .LANCHOR6
-	mov	w19, 0
-	add	x20, x20, :lo12:.LANCHOR61
-	mov	w1, 0
-	ldrh	w2, [x0, #:lo12:.LANCHOR6]
-	ldr	x0, [x24, #:lo12:.LANCHOR128]
-	lsl	w2, w2, 1
-	bl	ftl_memset
-.L1356:
-	ldr	w0, [x20]
-	cmp	w19, w0
-	bcc	.L1358
-	adrp	x21, .LANCHOR5
-	adrp	x22, .LC110
-	add	x21, x21, :lo12:.LANCHOR5
-	add	x22, x22, :lo12:.LC110
-	mov	w19, 0
-	adrp	x25, .LANCHOR42
-	mov	w23, 65535
-.L1359:
-	ldrh	w0, [x21]
-	cmp	w0, w19
-	bhi	.L1364
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
-	ldr	x25, [sp, 64]
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 96
-	ret
-.L1358:
-	mov	w2, 0
-	add	x1, x29, 92
-	mov	w0, w19
-	bl	log2phys
-	ldr	w0, [x29, 92]
-	cmn	w0, #1
-	beq	.L1357
-	lsr	w0, w0, 10
-	bl	P2V_block_in_plane
-	ldr	x2, [x24, #:lo12:.LANCHOR128]
-	ubfiz	x0, x0, 1, 16
-	ldrh	w1, [x2, x0]
-	add	w1, w1, 1
-	strh	w1, [x2, x0]
-.L1357:
-	add	w19, w19, 1
-	b	.L1356
-.L1364:
-	ldr	x0, [x25, #:lo12:.LANCHOR42]
-	ubfiz	x20, x19, 1, 16
-	ldrh	w2, [x0, x20]
-	ldr	x0, [x24, #:lo12:.LANCHOR128]
-	ldrh	w3, [x0, x20]
-	cmp	w2, w3
-	beq	.L1361
-	cmp	w2, w23
-	beq	.L1361
-	mov	w1, w19
-	mov	x0, x22
-	bl	printf
-	adrp	x0, .LANCHOR51
-	ldrh	w0, [x0, #:lo12:.LANCHOR51]
-	cmp	w0, w19
-	beq	.L1361
-	adrp	x0, .LANCHOR53
-	ldrh	w0, [x0, #:lo12:.LANCHOR53]
-	cmp	w0, w19
-	beq	.L1361
-	adrp	x0, .LANCHOR52
-	ldrh	w0, [x0, #:lo12:.LANCHOR52]
-	cmp	w0, w19
-	beq	.L1361
-	ldr	x0, [x25, #:lo12:.LANCHOR42]
-	ldrh	w1, [x0, x20]
-	cbnz	w1, .L1363
-	ldr	x1, [x24, #:lo12:.LANCHOR128]
-	ldrh	w1, [x1, x20]
-	strh	w1, [x0, x20]
-.L1361:
-	add	w19, w19, 1
-	and	w19, w19, 65535
-	b	.L1359
-.L1363:
-	ldr	x1, [x24, #:lo12:.LANCHOR128]
-	ldrh	w1, [x1, x20]
-	strh	w1, [x0, x20]
-	mov	w0, w19
-	bl	update_vpc_list
-	b	.L1361
-	.size	FtlVpcCheckAndModify, .-FtlVpcCheckAndModify
+	b	.L1125
+	.size	FtlDiscard, .-FtlDiscard
 	.section	.text.allocate_new_data_superblock,"ax",@progbits
 	.align	2
 	.global	allocate_new_data_superblock
@@ -9868,46 +8325,46 @@ allocate_new_data_superblock:
 	adrp	x0, .LANCHOR5
 	ldrh	w0, [x0, #:lo12:.LANCHOR5]
 	cmp	w0, w19
-	bcs	.L1370
-	adrp	x1, .LANCHOR174
+	bcs	.L1143
+	adrp	x1, .LANCHOR168
 	adrp	x0, .LC1
-	mov	w2, 2714
-	add	x1, x1, :lo12:.LANCHOR174
+	mov	w2, 2760
+	add	x1, x1, :lo12:.LANCHOR168
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1370:
+.L1143:
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1371
+	beq	.L1144
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x19, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1372
+	cbz	w0, .L1145
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-.L1371:
-	adrp	x1, .LANCHOR142
+.L1144:
+	adrp	x1, .LANCHOR131
 	mov	w0, 1
 	strb	w0, [x21, 8]
 	mov	w2, 65535
-	ldrh	w0, [x1, #:lo12:.LANCHOR142]
+	ldrh	w0, [x1, #:lo12:.LANCHOR131]
 	mov	x20, x1
 	cmp	w0, w2
-	beq	.L1373
+	beq	.L1146
 	cmp	w19, w0
-	bne	.L1374
+	bne	.L1147
 	adrp	x2, .LANCHOR42
 	ubfiz	x1, x0, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR42]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1375
-.L1374:
+	cbz	w1, .L1148
+.L1147:
 	bl	update_vpc_list
-.L1375:
+.L1148:
 	mov	w0, -1
-	strh	w0, [x20, #:lo12:.LANCHOR142]
-.L1373:
+	strh	w0, [x20, #:lo12:.LANCHOR131]
+.L1146:
 	mov	x0, x21
 	bl	allocate_data_superblock
 	bl	l2p_flush
@@ -9919,10 +8376,10 @@ allocate_new_data_superblock:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1372:
+.L1145:
 	mov	w0, w19
 	bl	INSERT_FREE_LIST
-	b	.L1371
+	b	.L1144
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
 	.section	.text.FtlProgPages,"ax",@progbits
 	.align	2
@@ -9943,24 +8400,24 @@ FtlProgPages:
 	add	x21, x21, 4
 	adrp	x24, .LANCHOR19
 	ldrb	w3, [x3, 9]
-	adrp	x23, .LANCHOR81
+	adrp	x23, .LANCHOR135
 	add	x21, x0, x21
 	add	x24, x24, :lo12:.LANCHOR19
-	add	x23, x23, :lo12:.LANCHOR81
+	add	x23, x23, :lo12:.LANCHOR135
 	bl	FlashProgPages
-.L1381:
+.L1154:
 	cmp	x20, x21
-	beq	.L1388
+	beq	.L1161
 	sub	x22, x20, #4
 	adrp	x25, .LANCHOR42
-	b	.L1389
-.L1384:
+	b	.L1162
+.L1157:
 	ldr	w0, [x20]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	ldrh	w1, [x19]
 	cmp	w1, w0, uxth
-	bne	.L1382
+	bne	.L1155
 	ldr	x2, [x25, #:lo12:.LANCHOR42]
 	ubfiz	x1, x1, 1, 16
 	ldrh	w3, [x19, 4]
@@ -9971,12 +8428,12 @@ FtlProgPages:
 	ldrh	w0, [x24]
 	strh	w0, [x19, 2]
 	strh	wzr, [x19, 4]
-.L1382:
+.L1155:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1383
+	cbnz	w0, .L1156
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.L1383:
+.L1156:
 	ldr	w0, [x23, 96]
 	add	w0, w0, 1
 	str	w0, [x23, 96]
@@ -9992,22 +8449,22 @@ FtlProgPages:
 	ldrb	w3, [x19, 9]
 	mov	x0, x22
 	bl	FlashProgPages
-.L1389:
+.L1162:
 	ldr	w0, [x20, -4]
 	cmn	w0, #1
-	beq	.L1384
+	beq	.L1157
 	adrp	x0, .LANCHOR3
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1385
-	adrp	x1, .LANCHOR175
+	bcc	.L1158
+	adrp	x1, .LANCHOR169
 	adrp	x0, .LC1
-	mov	w2, 957
-	add	x1, x1, :lo12:.LANCHOR175
+	mov	w2, 960
+	add	x1, x1, :lo12:.LANCHOR169
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1385:
+.L1158:
 	add	x1, x29, 96
 	ldr	w0, [x22, 4]
 	mov	w2, 1
@@ -10021,35 +8478,35 @@ FtlProgPages:
 	and	w1, w0, 65535
 	mov	w22, w1
 	cmn	w3, #1
-	beq	.L1386
+	beq	.L1159
 	adrp	x2, .LANCHOR42
 	ubfiz	x0, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR42]
 	ldrh	w0, [x2, x0]
-	cbnz	w0, .L1387
-	adrp	x0, .LC111
+	cbnz	w0, .L1160
+	adrp	x0, .LC36
 	mov	w2, 0
-	add	x0, x0, :lo12:.LC111
+	add	x0, x0, :lo12:.LC36
 	bl	printf
-.L1387:
+.L1160:
 	mov	w0, w22
 	bl	decrement_vpc_count
-.L1386:
+.L1159:
 	add	x20, x20, 32
-	b	.L1381
-.L1388:
+	b	.L1154
+.L1161:
 	adrp	x0, .LANCHOR3
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1380
-	adrp	x1, .LANCHOR175
+	bcc	.L1153
+	adrp	x1, .LANCHOR169
 	adrp	x0, .LC1
-	mov	w2, 972
-	add	x1, x1, :lo12:.LANCHOR175
+	mov	w2, 975
+	add	x1, x1, :lo12:.LANCHOR169
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1380:
+.L1153:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -10063,68 +8520,40 @@ FtlProgPages:
 	.type	FtlGcFreeTempBlock, %function
 FtlGcFreeTempBlock:
 	stp	x29, x30, [sp, -112]!
-	mov	w2, 65535
+	mov	w1, 65535
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR53
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR19
+	adrp	x21, .LANCHOR133
 	ldrh	w20, [x19, #:lo12:.LANCHOR53]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	cmp	w20, w2
+	cmp	w20, w1
 	str	x27, [sp, 80]
-	ldrh	w1, [x21, #:lo12:.LANCHOR19]
-	bne	.L1396
-.L1406:
-	adrp	x0, .LANCHOR144
-	ldrh	w2, [x19, #:lo12:.LANCHOR53]
-	mov	w1, 65535
-	str	wzr, [x0, #:lo12:.LANCHOR144]
-	cmp	w2, w1
-	add	x0, x19, :lo12:.LANCHOR53
-	bne	.L1419
-.L1422:
-	mov	w0, 0
-.L1395:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldr	x27, [sp, 80]
-	ldp	x29, x30, [sp], 112
-	ret
-.L1396:
-	cbz	w0, .L1399
-	adrp	x0, .LANCHOR162
-	ldrh	w3, [x0, #:lo12:.LANCHOR162]
-	cmp	w3, w2
-	beq	.L1400
-.L1401:
-	mov	w1, 2
-.L1399:
+	beq	.L1169
+	adrp	x1, .LANCHOR19
 	add	x0, x19, :lo12:.LANCHOR53
+	ldrh	w1, [x1, #:lo12:.LANCHOR19]
 	bl	FtlGcScanTempBlk
 	str	w0, [x29, 108]
 	cmn	w0, #1
-	beq	.L1402
+	beq	.L1169
 	adrp	x0, .LANCHOR43
 	ubfiz	x20, x20, 1, 16
 	ldr	x1, [x0, #:lo12:.LANCHOR43]
 	ldrh	w0, [x1, x20]
 	cmp	w0, 4
-	bls	.L1403
+	bls	.L1170
 	sub	w0, w0, #5
 	strh	w0, [x1, x20]
 	mov	w0, 1
 	bl	FtlEctTblFlush
-.L1403:
-	adrp	x0, .LANCHOR144
-	mov	x19, x0
-	ldr	w1, [x0, #:lo12:.LANCHOR144]
-	cbnz	w1, .L1404
-	adrp	x0, .LANCHOR81
-	add	x0, x0, :lo12:.LANCHOR81
+.L1170:
+	ldr	w0, [x21, #:lo12:.LANCHOR133]
+	cbnz	w0, .L1171
+	adrp	x0, .LANCHOR135
+	add	x0, x0, :lo12:.LANCHOR135
 	ldr	w1, [x0, 96]
 	add	w1, w1, 1
 	str	w1, [x0, 96]
@@ -10132,107 +8561,111 @@ FtlGcFreeTempBlock:
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
-.L1404:
-	str	wzr, [x19, #:lo12:.LANCHOR144]
-.L1415:
+.L1171:
+	str	wzr, [x21, #:lo12:.LANCHOR133]
 	mov	w0, 1
-	b	.L1395
-.L1400:
-	strh	wzr, [x0, #:lo12:.LANCHOR162]
-	adrp	x0, .LANCHOR48
-	ldrh	w0, [x0, #:lo12:.LANCHOR48]
-	cmp	w0, 17
-	bhi	.L1401
-	b	.L1399
-.L1402:
-	adrp	x0, .LANCHOR162
-	ldrh	w1, [x0, #:lo12:.LANCHOR162]
-	mov	w0, 65535
-	cmp	w1, w0
-	bne	.L1415
-	b	.L1406
-.L1419:
-	ldrb	w0, [x0, 7]
-	adrp	x20, .LANCHOR97
-	ldrh	w2, [x21, #:lo12:.LANCHOR19]
-	ldrh	w1, [x20, #:lo12:.LANCHOR97]
-	mul	w0, w0, w2
-	cmp	w1, w0
-	beq	.L1407
-	adrp	x1, .LANCHOR176
+.L1168:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L1169:
+	ldrh	w2, [x19, #:lo12:.LANCHOR53]
+	mov	w1, 65535
+	str	wzr, [x21, #:lo12:.LANCHOR133]
+	add	x0, x19, :lo12:.LANCHOR53
+	cmp	w2, w1
+	bne	.L1173
+.L1188:
+	mov	w0, 0
+	b	.L1168
+.L1173:
+	ldrb	w1, [x0, 7]
+	adrp	x0, .LANCHOR19
+	adrp	x20, .LANCHOR70
+	mov	x21, x0
+	ldrh	w3, [x0, #:lo12:.LANCHOR19]
+	ldrh	w2, [x20, #:lo12:.LANCHOR70]
+	mul	w1, w1, w3
+	cmp	w2, w1
+	beq	.L1174
+	adrp	x1, .LANCHOR170
 	adrp	x0, .LC1
 	mov	w2, 162
-	add	x1, x1, :lo12:.LANCHOR176
+	add	x1, x1, :lo12:.LANCHOR170
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1407:
+.L1174:
 	add	x0, x19, :lo12:.LANCHOR53
 	adrp	x23, .LANCHOR42
 	ldrh	w3, [x21, #:lo12:.LANCHOR19]
-	adrp	x25, .LANCHOR61
+	adrp	x25, .LANCHOR152
 	ldrh	w2, [x19, #:lo12:.LANCHOR53]
-	adrp	x26, .LANCHOR176
+	adrp	x26, .LANCHOR170
 	ldrb	w0, [x0, 7]
-	add	x25, x25, :lo12:.LANCHOR61
+	add	x25, x25, :lo12:.LANCHOR152
 	ldr	x1, [x23, #:lo12:.LANCHOR42]
-	add	x26, x26, :lo12:.LANCHOR176
+	add	x26, x26, :lo12:.LANCHOR170
 	mov	w21, 0
 	mul	w0, w0, w3
 	strh	w0, [x1, x2, lsl 1]
-	adrp	x1, .LANCHOR67
-	ldrh	w0, [x20, #:lo12:.LANCHOR97]
-	ldr	w2, [x1, #:lo12:.LANCHOR67]
+	adrp	x1, .LANCHOR84
+	ldrh	w0, [x20, #:lo12:.LANCHOR70]
+	ldr	w2, [x1, #:lo12:.LANCHOR84]
 	add	w0, w0, w2
-	str	w0, [x1, #:lo12:.LANCHOR67]
-.L1408:
-	ldrh	w0, [x20, #:lo12:.LANCHOR97]
+	str	w0, [x1, #:lo12:.LANCHOR84]
+.L1175:
+	ldrh	w0, [x20, #:lo12:.LANCHOR70]
 	cmp	w0, w21
-	bhi	.L1412
+	bhi	.L1179
 	mov	w0, -1
 	bl	decrement_vpc_count
 	ldrh	w0, [x19, #:lo12:.LANCHOR53]
 	ldr	x2, [x23, #:lo12:.LANCHOR42]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1413
+	cbz	w1, .L1180
 	bl	INSERT_DATA_LIST
-.L1414:
-	adrp	x0, .LANCHOR95
+.L1181:
+	adrp	x0, .LANCHOR68
 	mov	w21, -1
-	strh	wzr, [x20, #:lo12:.LANCHOR97]
+	strh	wzr, [x20, #:lo12:.LANCHOR70]
 	strh	w21, [x19, #:lo12:.LANCHOR53]
-	strh	wzr, [x0, #:lo12:.LANCHOR95]
+	strh	wzr, [x0, #:lo12:.LANCHOR68]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	adrp	x0, .LANCHOR80
-	strh	w21, [x0, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR144
+	strh	w21, [x0, #:lo12:.LANCHOR144]
 	adrp	x0, .LANCHOR48
 	ldrh	w1, [x0, #:lo12:.LANCHOR48]
-	adrp	x0, .LANCHOR78
-	ldrh	w0, [x0, #:lo12:.LANCHOR78]
+	adrp	x0, .LANCHOR171
+	ldrh	w0, [x0, #:lo12:.LANCHOR171]
 	add	w0, w0, w0, lsl 1
 	cmp	w1, w0, lsr 2
-	ble	.L1422
-	adrp	x0, .LANCHOR82
+	ble	.L1188
+	adrp	x0, .LANCHOR100
 	mov	w1, 20
-	strh	w1, [x0, #:lo12:.LANCHOR82]
-	b	.L1422
-.L1412:
-	adrp	x0, .LANCHOR98
+	strh	w1, [x0, #:lo12:.LANCHOR100]
+	b	.L1188
+.L1179:
+	adrp	x0, .LANCHOR71
 	mov	w24, 12
-	ldr	x27, [x0, #:lo12:.LANCHOR98]
+	ldr	x27, [x0, #:lo12:.LANCHOR71]
 	umull	x24, w21, w24
 	ldr	w0, [x25]
 	add	x22, x27, x24
 	ldr	w1, [x22, 8]
 	cmp	w1, w0
-	bcc	.L1409
+	bcc	.L1176
 	adrp	x0, .LC1
 	mov	w2, 168
 	mov	x1, x26
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1409:
+.L1176:
 	ldr	w0, [x22, 8]
 	add	x1, x29, 108
 	mov	w2, 0
@@ -10240,7 +8673,7 @@ FtlGcFreeTempBlock:
 	ldr	w0, [x27, x24]
 	ldr	w1, [x29, 108]
 	cmp	w0, w1
-	bne	.L1410
+	bne	.L1177
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	mov	w24, w0
@@ -10249,21 +8682,21 @@ FtlGcFreeTempBlock:
 	add	x1, x22, 4
 	bl	log2phys
 	mov	w0, w24
-.L1421:
+.L1187:
 	bl	decrement_vpc_count
-.L1411:
+.L1178:
 	add	w21, w21, 1
 	and	w21, w21, 65535
-	b	.L1408
-.L1410:
+	b	.L1175
+.L1177:
 	ldr	w0, [x22, 4]
 	cmp	w1, w0
-	beq	.L1411
+	beq	.L1178
 	ldrh	w0, [x19, #:lo12:.LANCHOR53]
-	b	.L1421
-.L1413:
+	b	.L1187
+.L1180:
 	bl	INSERT_FREE_LIST
-	b	.L1414
+	b	.L1181
 	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
 	.section	.text.FtlGcPageRecovery,"ax",@progbits
 	.align	2
@@ -10282,15 +8715,15 @@ FtlGcPageRecovery:
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR19]
 	cmp	w1, w0
-	bcc	.L1423
-	adrp	x0, .LANCHOR140
-	add	x0, x0, :lo12:.LANCHOR140
+	bcc	.L1189
+	adrp	x0, .LANCHOR129
+	add	x0, x0, :lo12:.LANCHOR129
 	bl	FtlMapBlkWriteDump_data
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
-	adrp	x0, .LANCHOR144
-	str	wzr, [x0, #:lo12:.LANCHOR144]
-.L1423:
+	adrp	x0, .LANCHOR133
+	str	wzr, [x0, #:lo12:.LANCHOR133]
+.L1189:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -10301,12 +8734,12 @@ FtlGcPageRecovery:
 	.type	FtlPowerLostRecovery, %function
 FtlPowerLostRecovery:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR168
+	adrp	x0, .LANCHOR157
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	adrp	x19, .LANCHOR51
 	add	x19, x19, :lo12:.LANCHOR51
-	str	wzr, [x0, #:lo12:.LANCHOR168]
+	str	wzr, [x0, #:lo12:.LANCHOR157]
 	mov	x0, x19
 	bl	FtlRecoverySuperblock
 	mov	x0, x19
@@ -10335,41 +8768,41 @@ Ftl_gc_temp_data_write_back:
 	mov	w2, 0
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR89
-	adrp	x20, .LANCHOR113
-	ldr	w1, [x19, #:lo12:.LANCHOR89]
-	add	x19, x19, :lo12:.LANCHOR89
-	ldr	x0, [x20, #:lo12:.LANCHOR113]
+	adrp	x19, .LANCHOR62
+	adrp	x20, .LANCHOR104
+	ldr	w1, [x19, #:lo12:.LANCHOR62]
+	add	x19, x19, :lo12:.LANCHOR62
+	ldr	x0, [x20, #:lo12:.LANCHOR104]
 	bl	FlashProgPages
 	mov	w11, 0
-.L1429:
+.L1195:
 	ldr	w1, [x19]
 	cmp	w11, w1
-	bcc	.L1432
-	ldr	x0, [x20, #:lo12:.LANCHOR113]
+	bcc	.L1198
+	ldr	x0, [x20, #:lo12:.LANCHOR104]
 	bl	FtlGcBufFree
 	str	wzr, [x19]
 	adrp	x0, .LANCHOR53+4
 	ldrh	w0, [x0, #:lo12:.LANCHOR53+4]
-	cbnz	w0, .L1433
+	cbnz	w0, .L1199
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
-	b	.L1435
-.L1432:
-	ldr	x2, [x20, #:lo12:.LANCHOR113]
+	b	.L1201
+.L1198:
+	ldr	x2, [x20, #:lo12:.LANCHOR104]
 	ubfiz	x0, x11, 5, 16
 	add	x1, x2, x0
 	ldr	w2, [x2, x0]
 	cmn	w2, #1
-	bne	.L1430
+	bne	.L1196
 	adrp	x0, .LANCHOR53
 	adrp	x3, .LANCHOR42
 	ldrh	w4, [x0, #:lo12:.LANCHOR53]
 	ldr	x3, [x3, #:lo12:.LANCHOR42]
 	strh	wzr, [x3, x4, lsl 1]
 	strh	w2, [x0, #:lo12:.LANCHOR53]
-	adrp	x0, .LANCHOR81
-	add	x0, x0, :lo12:.LANCHOR81
+	adrp	x0, .LANCHOR135
+	add	x0, x0, :lo12:.LANCHOR135
 	ldr	w2, [x0, 96]
 	add	w2, w2, 1
 	str	w2, [x0, 96]
@@ -10378,23 +8811,23 @@ Ftl_gc_temp_data_write_back:
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
 	bl	FtlGcPageVarInit
-.L1435:
+.L1201:
 	mov	w0, 1
-.L1428:
+.L1194:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1430:
+.L1196:
 	ldr	x0, [x1, 16]
 	ldr	w1, [x1, 4]
 	ldp	w2, w0, [x0, 8]
 	bl	FtlGcUpdatePage
 	add	w11, w11, 1
 	and	w11, w11, 65535
-	b	.L1429
-.L1433:
+	b	.L1195
+.L1199:
 	mov	w0, 0
-	b	.L1428
+	b	.L1194
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
 	.section	.text.Ftl_get_new_temp_ppa,"ax",@progbits
 	.align	2
@@ -10409,305 +8842,107 @@ Ftl_get_new_temp_ppa:
 	mov	x19, x0
 	ldrh	w3, [x0, #:lo12:.LANCHOR53]
 	cmp	w3, w2
-	beq	.L1437
+	beq	.L1203
 	add	x1, x0, :lo12:.LANCHOR53
 	ldrh	w0, [x1, 4]
-	cbnz	w0, .L1438
-.L1437:
+	cbnz	w0, .L1204
+.L1203:
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
 	add	x0, x19, :lo12:.LANCHOR53
 	strb	wzr, [x0, 8]
 	bl	allocate_data_superblock
-	adrp	x0, .LANCHOR95
-	strh	wzr, [x0, #:lo12:.LANCHOR95]
-	adrp	x0, .LANCHOR97
-	strh	wzr, [x0, #:lo12:.LANCHOR97]
+	adrp	x0, .LANCHOR68
+	strh	wzr, [x0, #:lo12:.LANCHOR68]
+	adrp	x0, .LANCHOR70
+	strh	wzr, [x0, #:lo12:.LANCHOR70]
 	bl	l2p_flush
 	mov	w0, 0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1438:
+.L1204:
 	add	x0, x19, :lo12:.LANCHOR53
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	get_new_active_ppa
 	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
-	.section	.text.FtlSysBlkInit,"ax",@progbits
+	.section	.text.rk_ftl_garbage_collect,"ax",@progbits
 	.align	2
-	.global	FtlSysBlkInit
-	.type	FtlSysBlkInit, %function
-FtlSysBlkInit:
-	stp	x29, x30, [sp, -64]!
-	adrp	x0, .LANCHOR4
+	.global	rk_ftl_garbage_collect
+	.type	rk_ftl_garbage_collect, %function
+rk_ftl_garbage_collect:
+	stp	x29, x30, [sp, -176]!
 	add	x29, sp, 0
-	ldrh	w0, [x0, #:lo12:.LANCHOR4]
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR167
-	stp	x21, x22, [sp, 32]
-	stp	x23, x24, [sp, 48]
-	strh	wzr, [x20, #:lo12:.LANCHOR167]
-	bl	FtlFreeSysBlkQueueInit
-	bl	FtlScanSysBlk
-	adrp	x0, .LANCHOR79
-	ldrh	w1, [x0, #:lo12:.LANCHOR79]
-	mov	w0, 65535
-	cmp	w1, w0
-	bne	.L1441
-.L1443:
-	mov	w23, -1
-.L1440:
-	mov	w0, w23
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 64
-	ret
-.L1441:
-	bl	FtlLoadSysInfo
-	mov	w23, w0
-	cbnz	w0, .L1443
-	bl	FtlLoadMapInfo
-	bl	FtlLoadVonderInfo
-	bl	Ftl_load_ext_data
-	bl	FtlLoadEctTbl
-	bl	FtlFreeSysBLkSort
-	bl	SupperBlkListInit
-	bl	FtlPowerLostRecovery
-	mov	w0, 1
-	bl	FtlUpdateVaildLpn
-	adrp	x0, .LANCHOR33
-	mov	w1, 0
-	ldrh	w3, [x0, #:lo12:.LANCHOR33]
-	adrp	x0, .LANCHOR55
-	ldr	x0, [x0, #:lo12:.LANCHOR55]
-	add	x0, x0, 4
-.L1444:
-	cmp	w1, w3
-	bge	.L1449
-	ldr	w2, [x0], 16
-	tbz	w2, #31, .L1445
-.L1449:
-	adrp	x0, .LANCHOR39
-	add	x4, x0, :lo12:.LANCHOR39
-	cmp	w1, w3
-	mov	x19, x0
-	adrp	x22, .LANCHOR51
-	ldrh	w2, [x4, 28]
-	add	w2, w2, 1
-	strh	w2, [x4, 28]
-	bge	.L1454
-.L1446:
-	add	x21, x22, :lo12:.LANCHOR51
-	adrp	x24, .LANCHOR52
-	mov	x0, x21
-	add	x20, x24, :lo12:.LANCHOR52
-	bl	FtlSuperblockPowerLostFix
-	mov	x0, x20
-	bl	FtlSuperblockPowerLostFix
-	adrp	x0, .LANCHOR42
-	ldrh	w3, [x21, 4]
-	ldr	x1, [x0, #:lo12:.LANCHOR42]
-	ldrh	w0, [x22, #:lo12:.LANCHOR51]
-	lsl	x0, x0, 1
-	ldrh	w2, [x1, x0]
-	sub	w2, w2, w3
-	adrp	x3, .LANCHOR19
-	strh	w2, [x1, x0]
-	strb	wzr, [x21, 6]
-	ldrh	w0, [x3, #:lo12:.LANCHOR19]
-	strh	w0, [x21, 2]
-	ldrh	w0, [x24, #:lo12:.LANCHOR52]
-	strh	wzr, [x21, 4]
-	ldrh	w4, [x20, 4]
-	lsl	x0, x0, 1
-	ldrh	w2, [x1, x0]
-	sub	w2, w2, w4
-	strh	w2, [x1, x0]
-	strb	wzr, [x20, 6]
-	ldrh	w0, [x3, #:lo12:.LANCHOR19]
-	strh	w0, [x20, 2]
-	add	x0, x19, :lo12:.LANCHOR39
-	strh	wzr, [x20, 4]
-	ldrh	w1, [x0, 30]
-	add	w1, w1, 1
-	strh	w1, [x0, 30]
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
-	bl	FtlVpcTblFlush
-	b	.L1450
-.L1445:
-	add	w1, w1, 1
-	b	.L1444
-.L1454:
-	ldrh	w0, [x20, #:lo12:.LANCHOR167]
-	cbnz	w0, .L1446
-.L1450:
-	bl	FtlVpcCheckAndModify
-	add	x20, x22, :lo12:.LANCHOR51
-	ldrh	w0, [x22, #:lo12:.LANCHOR51]
-	mov	w1, 65535
-	cmp	w0, w1
-	beq	.L1440
-	ldrh	w1, [x20, 4]
-	cbnz	w1, .L1440
-	adrp	x21, .LANCHOR52
-	add	x19, x21, :lo12:.LANCHOR52
-	ldrh	w1, [x19, 4]
-	cbnz	w1, .L1440
-	bl	FtlGcRefreshBlock
-	ldrh	w0, [x21, #:lo12:.LANCHOR52]
-	bl	FtlGcRefreshBlock
-	bl	FtlVpcTblFlush
-	mov	x0, x20
-	bl	allocate_new_data_superblock
-	mov	x0, x19
-	bl	allocate_new_data_superblock
-	b	.L1440
-	.size	FtlSysBlkInit, .-FtlSysBlkInit
-	.section	.text.rk_ftl_garbage_collect,"ax",@progbits
-	.align	2
-	.global	rk_ftl_garbage_collect
-	.type	rk_ftl_garbage_collect, %function
-rk_ftl_garbage_collect:
-	stp	x29, x30, [sp, -176]!
-	adrp	x1, .LANCHOR108
-	add	x29, sp, 0
-	ldr	w2, [x1, #:lo12:.LANCHOR108]
-	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR94
+	stp	x19, x20, [sp, 16]
+	ldr	w1, [x21, #:lo12:.LANCHOR94]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	str	x1, [x29, 144]
-	cbnz	w2, .L1529
+	cbnz	w1, .L1258
 	adrp	x1, .LANCHOR45
 	ldrh	w1, [x1, #:lo12:.LANCHOR45]
 	cmp	w1, 47
-	bls	.L1529
-	str	w0, [x29, 152]
-	adrp	x0, .LANCHOR162
-	ldrh	w1, [x0, #:lo12:.LANCHOR162]
-	mov	w0, 65535
-	cmp	w1, w0
-	bne	.L1458
-.L1461:
-	adrp	x0, .LANCHOR100
-	mov	w3, 65535
-	ldrh	w2, [x0, #:lo12:.LANCHOR100]
-	cmp	w2, w3
-	bne	.L1459
-.L1460:
-	bl	FtlReadRefresh
-	adrp	x19, .LANCHOR80
-	adrp	x2, .LANCHOR84
-	ldr	w1, [x29, 152]
-	mov	w21, 65535
-	ldr	w0, [x2, #:lo12:.LANCHOR84]
-	add	w0, w0, 1
-	add	w0, w0, w1, lsl 7
-	ldrh	w1, [x19, #:lo12:.LANCHOR80]
-	str	w0, [x2, #:lo12:.LANCHOR84]
-	cmp	w1, w21
-	bne	.L1462
-	adrp	x3, .LANCHOR53
-	ldrh	w21, [x3, #:lo12:.LANCHOR53]
-	cmp	w21, w1
-	bne	.L1532
-	adrp	x1, .LANCHOR99
-	ldrh	w20, [x1, #:lo12:.LANCHOR99]
-	cmp	w20, w21
-	bne	.L1462
-	adrp	x22, .LANCHOR48
-	mov	w3, 1024
-	ldrh	w1, [x22, #:lo12:.LANCHOR48]
+	bls	.L1258
+	adrp	x1, .LANCHOR73
+	mov	w4, 65535
+	ldrh	w3, [x1, #:lo12:.LANCHOR73]
+	cmp	w3, w4
+	beq	.L1208
+	adrp	x2, .LANCHOR72
+	ldrh	w5, [x2, #:lo12:.LANCHOR72]
+	cmp	w5, w4
+	bne	.L1208
+	strh	w3, [x2, #:lo12:.LANCHOR72]
+	mov	w2, -1
+	strh	w2, [x1, #:lo12:.LANCHOR73]
+.L1208:
+	cbnz	w0, .L1259
+	adrp	x1, .LANCHOR48
+	ldrh	w1, [x1, #:lo12:.LANCHOR48]
 	cmp	w1, 24
-	mov	w1, 5120
-	csel	w1, w1, w3, cc
-	cmp	w0, w1
-	bls	.L1535
-	adrp	x0, .LANCHOR177
-	str	wzr, [x2, #:lo12:.LANCHOR84]
-	strh	wzr, [x0, #:lo12:.LANCHOR177]
-	bl	GetSwlReplaceBlock
-	and	w21, w0, 65535
-	cmp	w21, w20
-	bne	.L1536
-	adrp	x5, .LANCHOR83
-	ldrh	w1, [x22, #:lo12:.LANCHOR48]
-	ldrh	w0, [x5, #:lo12:.LANCHOR83]
-	cmp	w1, w0
-	bcs	.L1465
-	mov	w0, 64
-	bl	List_get_gc_head_node
-	and	w0, w0, 65535
-	cmp	w0, w21
-	beq	.L1467
-	adrp	x1, .LANCHOR42
-	ubfiz	x0, x0, 1, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR42]
-	ldrh	w0, [x1, x0]
-	cmp	w0, 7
-	bhi	.L1468
-	mov	w0, 0
-	bl	List_get_gc_head_node
-	and	w20, w0, 65535
-	mov	w0, 128
-	strh	w0, [x5, #:lo12:.LANCHOR83]
-	cmp	w20, w21
-	bne	.L1464
-.L1467:
-	bl	FtlGcReFreshBadBlk
-.L1462:
-	ldr	w1, [x29, 152]
-	mov	w0, 65535
-	cmp	w1, 0
-	ccmp	w21, w0, 0, eq
-	bne	.L1470
-	adrp	x0, .LANCHOR48
-	ldrh	w0, [x0, #:lo12:.LANCHOR48]
-	cmp	w0, 24
-	bhi	.L1537
-	adrp	x1, .LANCHOR19
-	cmp	w0, 16
-	ldrh	w20, [x1, #:lo12:.LANCHOR19]
-	bls	.L1472
+	bhi	.L1260
+	adrp	x2, .LANCHOR19
+	cmp	w1, 16
+	ldrh	w20, [x2, #:lo12:.LANCHOR19]
+	bls	.L1211
 	lsr	w20, w20, 5
-.L1471:
-	adrp	x2, .LANCHOR82
+.L1210:
+	adrp	x2, .LANCHOR100
+	ldrh	w3, [x2, #:lo12:.LANCHOR100]
+	cmp	w3, w1
 	mov	x3, x2
-	ldrh	w1, [x2, #:lo12:.LANCHOR82]
-	cmp	w1, w0
-	bcs	.L1475
-	adrp	x0, .LANCHOR53
-	mov	w1, 65535
-	ldrh	w0, [x0, #:lo12:.LANCHOR53]
-	cmp	w0, w1
-	bne	.L1476
-	adrp	x1, .LANCHOR99
-	ldrh	w1, [x1, #:lo12:.LANCHOR99]
-	cmp	w1, w0
-	bne	.L1476
-	adrp	x0, .LANCHOR177
-	ldrh	w0, [x0, #:lo12:.LANCHOR177]
-	cbnz	w0, .L1477
-	adrp	x1, .LANCHOR61
+	bcs	.L1214
+	adrp	x1, .LANCHOR53
+	mov	w4, 65535
+	ldrh	w1, [x1, #:lo12:.LANCHOR53]
+	cmp	w1, w4
+	bne	.L1215
+	adrp	x4, .LANCHOR72
+	ldrh	w4, [x4, #:lo12:.LANCHOR72]
+	cmp	w4, w1
+	bne	.L1215
+	adrp	x0, .LANCHOR172
+	ldrh	w0, [x0, #:lo12:.LANCHOR172]
+	cbnz	w0, .L1216
+	adrp	x1, .LANCHOR152
 	adrp	x4, .LANCHOR59
-	ldr	w1, [x1, #:lo12:.LANCHOR61]
+	ldr	w1, [x1, #:lo12:.LANCHOR152]
 	ldr	w4, [x4, #:lo12:.LANCHOR59]
 	add	w1, w1, w1, lsl 1
 	cmp	w4, w1, lsr 2
-	bcs	.L1478
-.L1477:
-	adrp	x1, .LANCHOR78
-	ldrh	w1, [x1, #:lo12:.LANCHOR78]
+	bcs	.L1217
+.L1216:
+	adrp	x1, .LANCHOR171
+	ldrh	w1, [x1, #:lo12:.LANCHOR171]
 	add	w1, w1, w1, lsl 1
 	asr	w1, w1, 2
-	strh	w1, [x3, #:lo12:.LANCHOR82]
-.L1479:
-	adrp	x1, .LANCHOR87
-	str	wzr, [x1, #:lo12:.LANCHOR87]
-.L1456:
+	strh	w1, [x3, #:lo12:.LANCHOR100]
+.L1218:
+	adrp	x1, .LANCHOR95
+	str	wzr, [x1, #:lo12:.LANCHOR95]
+.L1206:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -10715,283 +8950,137 @@ rk_ftl_garbage_collect:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1458:
-	adrp	x1, .LANCHOR53
-	ldrh	w1, [x1, #:lo12:.LANCHOR53]
-	cmp	w1, w0
-	beq	.L1461
-	mov	w0, 1
-	bl	FtlGcFreeTempBlock
-	cbz	w0, .L1461
-	mov	w0, 1
-	b	.L1456
-.L1459:
-	adrp	x1, .LANCHOR99
-	ldrh	w4, [x1, #:lo12:.LANCHOR99]
-	cmp	w4, w3
-	bne	.L1460
-	strh	w2, [x1, #:lo12:.LANCHOR99]
-	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR100]
-	b	.L1460
-.L1468:
-	mov	w0, 64
-.L1564:
-	strh	w0, [x5, #:lo12:.LANCHOR83]
-	b	.L1467
-.L1465:
-	mov	w0, 80
-	b	.L1564
-.L1536:
-	mov	w20, w21
-.L1464:
-	adrp	x1, .LANCHOR43
-	ubfiz	x0, x20, 1, 32
-	adrp	x3, .LANCHOR82
-	mov	w21, w20
-	ldr	x2, [x1, #:lo12:.LANCHOR43]
-	adrp	x1, .LANCHOR42
-	ldrh	w5, [x3, #:lo12:.LANCHOR82]
-	ldr	x1, [x1, #:lo12:.LANCHOR42]
-	ldrh	w4, [x2, x0]
-	ldrh	w2, [x22, #:lo12:.LANCHOR48]
-	ldrh	w3, [x1, x0]
-	mov	w1, w20
-	adrp	x0, .LC112
-	add	x0, x0, :lo12:.LC112
-	bl	printf
-	b	.L1467
-.L1532:
-	mov	w21, w1
-	b	.L1462
-.L1535:
-	mov	w21, w20
-	b	.L1462
-.L1472:
-	cmp	w0, 12
-	bls	.L1473
+.L1211:
+	cmp	w1, 12
+	bls	.L1212
 	lsr	w20, w20, 4
-	b	.L1471
-.L1473:
-	cmp	w0, 8
-	bls	.L1471
+	b	.L1210
+.L1212:
+	cmp	w1, 8
+	bls	.L1210
 	lsr	w20, w20, 2
-	b	.L1471
-.L1537:
+	b	.L1210
+.L1260:
 	mov	w20, 1
-	b	.L1471
-.L1478:
+	b	.L1210
+.L1217:
 	mov	w1, 18
-	strh	w1, [x2, #:lo12:.LANCHOR82]
-	b	.L1479
-.L1476:
-	adrp	x0, .LANCHOR78
-	ldrh	w0, [x0, #:lo12:.LANCHOR78]
-	add	w0, w0, w0, lsl 1
-	asr	w0, w0, 2
-	strh	w0, [x3, #:lo12:.LANCHOR82]
-.L1475:
-	adrp	x0, .LANCHOR101
-	ldrh	w0, [x0, #:lo12:.LANCHOR101]
-	cbz	w0, .L1538
+	strh	w1, [x2, #:lo12:.LANCHOR100]
+	b	.L1218
+.L1215:
+	adrp	x1, .LANCHOR171
+	ldrh	w1, [x1, #:lo12:.LANCHOR171]
+	add	w1, w1, w1, lsl 1
+	asr	w1, w1, 2
+	strh	w1, [x3, #:lo12:.LANCHOR100]
+.L1214:
+	adrp	x1, .LANCHOR74
+	ldrh	w1, [x1, #:lo12:.LANCHOR74]
+	cbz	w1, .L1209
 	add	w20, w20, 32
 	and	w20, w20, 65535
-.L1538:
-	mov	w21, 65535
-.L1481:
-	ldrh	w0, [x19, #:lo12:.LANCHOR80]
-	mov	w1, 65535
-	cmp	w0, w1
-	bne	.L1490
-	cmp	w21, w0
-	beq	.L1491
-	strh	w21, [x19, #:lo12:.LANCHOR80]
-.L1492:
-	add	x0, x19, :lo12:.LANCHOR80
+.L1209:
+	adrp	x19, .LANCHOR144
+	str	w0, [x29, 152]
+	mov	w0, 65535
+	ldrh	w2, [x19, #:lo12:.LANCHOR144]
+	cmp	w2, w0
+	bne	.L1221
+	adrp	x0, .LANCHOR72
+	ldrh	w1, [x0, #:lo12:.LANCHOR72]
+	cmp	w1, w2
+	beq	.L1222
+	adrp	x2, .LANCHOR42
+	ubfiz	x1, x1, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR42]
+	ldrh	w1, [x2, x1]
+	cbnz	w1, .L1223
+	mov	w1, -1
+	strh	w1, [x0, #:lo12:.LANCHOR72]
+.L1223:
+	ldrh	w1, [x0, #:lo12:.LANCHOR72]
+	strh	w1, [x19, #:lo12:.LANCHOR144]
+	mov	w1, -1
+	strh	w1, [x0, #:lo12:.LANCHOR72]
+.L1222:
+	add	x0, x19, :lo12:.LANCHOR144
 	mov	w1, 65535
 	strb	wzr, [x0, 8]
-	ldrh	w0, [x19, #:lo12:.LANCHOR80]
+	ldrh	w0, [x19, #:lo12:.LANCHOR144]
 	cmp	w0, w1
-	beq	.L1490
+	beq	.L1221
 	bl	IsBlkInGcList
-	cbz	w0, .L1495
+	cbz	w0, .L1225
 	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR80]
-.L1495:
-	ldrh	w1, [x19, #:lo12:.LANCHOR80]
+	strh	w0, [x19, #:lo12:.LANCHOR144]
+.L1225:
+	ldrh	w1, [x19, #:lo12:.LANCHOR144]
 	mov	w0, 65535
-	add	x22, x19, :lo12:.LANCHOR80
+	add	x22, x19, :lo12:.LANCHOR144
 	cmp	w1, w0
-	beq	.L1490
+	beq	.L1221
 	mov	x0, x22
 	bl	make_superblock
-	adrp	x0, .LANCHOR178
-	ldrh	w1, [x19, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR173
+	ldrh	w1, [x19, #:lo12:.LANCHOR144]
 	strh	wzr, [x22, 2]
-	strh	wzr, [x0, #:lo12:.LANCHOR178]
+	strh	wzr, [x0, #:lo12:.LANCHOR173]
 	adrp	x0, .LANCHOR42
 	strb	wzr, [x22, 6]
 	ldr	x0, [x0, #:lo12:.LANCHOR42]
 	ldrh	w1, [x0, x1, lsl 1]
-	adrp	x0, .LANCHOR179
-	strh	w1, [x0, #:lo12:.LANCHOR179]
-.L1490:
+	adrp	x0, .LANCHOR174
+	strh	w1, [x0, #:lo12:.LANCHOR174]
+.L1221:
 	adrp	x1, .LANCHOR51
-	ldrh	w0, [x19, #:lo12:.LANCHOR80]
-	str	x1, [x29, 120]
+	ldrh	w0, [x19, #:lo12:.LANCHOR144]
+	str	x1, [x29, 128]
 	ldrh	w2, [x1, #:lo12:.LANCHOR51]
 	cmp	w2, w0
-	beq	.L1496
+	beq	.L1226
 	adrp	x1, .LANCHOR52
 	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bne	.L1497
-.L1496:
+	bne	.L1227
+.L1226:
 	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR80]
-.L1497:
-	adrp	x25, .LANCHOR85
-	add	x26, x25, :lo12:.LANCHOR85
-.L1526:
-	ldrh	w1, [x19, #:lo12:.LANCHOR80]
+	strh	w0, [x19, #:lo12:.LANCHOR144]
+.L1227:
+	adrp	x25, .LANCHOR102
+	add	x26, x25, :lo12:.LANCHOR102
+.L1256:
+	ldrh	w1, [x19, #:lo12:.LANCHOR144]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1498
-	adrp	x0, .LANCHOR87
+	bne	.L1228
+	adrp	x0, .LANCHOR95
 	adrp	x22, .LANCHOR19
 	add	x22, x22, :lo12:.LANCHOR19
-	str	wzr, [x0, #:lo12:.LANCHOR87]
-.L1499:
-	ldrh	w5, [x25, #:lo12:.LANCHOR85]
-	add	x7, x25, :lo12:.LANCHOR85
+	str	wzr, [x0, #:lo12:.LANCHOR95]
+.L1229:
+	ldrh	w5, [x25, #:lo12:.LANCHOR102]
+	add	x7, x25, :lo12:.LANCHOR102
 	mov	w0, w5
 	bl	List_get_gc_head_node
 	and	w6, w0, 65535
-	strh	w6, [x19, #:lo12:.LANCHOR80]
+	strh	w6, [x19, #:lo12:.LANCHOR144]
 	mov	w0, 65535
 	cmp	w6, w0
-	bne	.L1500
+	bne	.L1230
 	strh	wzr, [x7]
 	mov	w0, 8
-	b	.L1456
-.L1470:
-	adrp	x1, .LANCHOR53
-	ldrh	w1, [x1, #:lo12:.LANCHOR53]
-	cmp	w1, w0
-	bne	.L1541
-	adrp	x0, .LANCHOR99
-	ldrh	w0, [x0, #:lo12:.LANCHOR99]
-	cmp	w0, w1
-	bne	.L1541
-	cmp	w21, w0
-	bne	.L1541
-	ldrh	w0, [x19, #:lo12:.LANCHOR80]
-	cmp	w0, w21
-	beq	.L1482
-.L1541:
+	b	.L1206
+.L1259:
 	mov	w20, 1
-	b	.L1481
-.L1482:
-	adrp	x0, .LANCHOR87
-	adrp	x22, .LANCHOR48
-	adrp	x20, .LANCHOR82
-	adrp	x23, .LANCHOR177
-	str	wzr, [x0, #:lo12:.LANCHOR87]
-	ldrh	w1, [x22, #:lo12:.LANCHOR48]
-	ldrh	w0, [x20, #:lo12:.LANCHOR82]
-	cmp	w1, w0
-	bls	.L1483
-	ldrh	w0, [x23, #:lo12:.LANCHOR177]
-	cbnz	w0, .L1484
-	adrp	x0, .LANCHOR61
-	adrp	x1, .LANCHOR59
-	ldr	w0, [x0, #:lo12:.LANCHOR61]
-	ldr	w1, [x1, #:lo12:.LANCHOR59]
-	add	w0, w0, w0, lsl 1
-	cmp	w1, w0, lsr 2
-	bcs	.L1485
-.L1484:
-	adrp	x0, .LANCHOR78
-	ldrh	w0, [x0, #:lo12:.LANCHOR78]
-	add	w0, w0, w0, lsl 1
-	asr	w0, w0, 2
-.L1565:
-	strh	w0, [x20, #:lo12:.LANCHOR82]
-	bl	FtlReadRefresh
-	mov	w0, 0
-	bl	List_get_gc_head_node
-	adrp	x1, .LANCHOR42
-	ubfiz	x0, x0, 1, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR42]
-	ldrh	w0, [x1, x0]
-	cmp	w0, 4
-	bls	.L1483
-.L1566:
-	ldrh	w0, [x23, #:lo12:.LANCHOR177]
-	b	.L1456
-.L1485:
-	mov	w0, 18
-	b	.L1565
-.L1483:
-	ldrh	w0, [x23, #:lo12:.LANCHOR177]
-	cbnz	w0, .L1541
-	adrp	x0, .LANCHOR78
-	ldrh	w5, [x0, #:lo12:.LANCHOR78]
-	add	w0, w5, w5, lsl 1
-	asr	w0, w0, 2
-	strh	w0, [x20, #:lo12:.LANCHOR82]
-	mov	w0, 0
-	bl	List_get_gc_head_node
-	adrp	x1, .LANCHOR42
-	ubfiz	x0, x0, 1, 16
-	adrp	x2, .LANCHOR3
-	ldr	x1, [x1, #:lo12:.LANCHOR42]
-	ldrh	w2, [x2, #:lo12:.LANCHOR3]
-	ldrh	w1, [x1, x0]
-	adrp	x0, .LANCHOR20
-	ldrh	w0, [x0, #:lo12:.LANCHOR20]
-	mul	w0, w0, w2
-	cmp	w1, w0, asr 1
-	ble	.L1488
-	ldrh	w0, [x22, #:lo12:.LANCHOR48]
-	sub	w5, w5, #1
-	cmp	w0, w5
-	blt	.L1488
-	bl	FtlReadRefresh
-	b	.L1566
-.L1488:
-	cbnz	w1, .L1541
-	mov	w0, -1
-	bl	decrement_vpc_count
-	ldrh	w0, [x22, #:lo12:.LANCHOR48]
-	add	w0, w0, 1
-	b	.L1456
-.L1491:
-	adrp	x0, .LANCHOR99
-	ldrh	w1, [x0, #:lo12:.LANCHOR99]
-	cmp	w1, w21
-	beq	.L1492
-	adrp	x2, .LANCHOR42
-	ubfiz	x1, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR42]
-	ldrh	w1, [x2, x1]
-	cbnz	w1, .L1493
-	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR99]
-.L1493:
-	ldrh	w1, [x0, #:lo12:.LANCHOR99]
-	strh	w1, [x19, #:lo12:.LANCHOR80]
-	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR99]
-	b	.L1492
-.L1500:
+	b	.L1209
+.L1230:
 	mov	w0, w6
 	bl	IsBlkInGcList
 	add	w5, w5, 1
-	cbz	w0, .L1501
-	strh	w5, [x25, #:lo12:.LANCHOR85]
-	b	.L1499
-.L1501:
+	cbz	w0, .L1231
+	strh	w5, [x25, #:lo12:.LANCHOR102]
+	b	.L1229
+.L1231:
 	adrp	x23, .LANCHOR42
 	adrp	x4, .LANCHOR3
 	ldrh	w0, [x22]
@@ -10999,108 +9088,104 @@ rk_ftl_garbage_collect:
 	ldr	x2, [x23, #:lo12:.LANCHOR42]
 	and	w5, w5, 65535
 	ldrh	w4, [x4, #:lo12:.LANCHOR3]
-	strh	w5, [x25, #:lo12:.LANCHOR85]
+	strh	w5, [x25, #:lo12:.LANCHOR102]
 	ldrh	w3, [x2, x1]
 	mul	w0, w0, w4
 	cmp	w3, w0, asr 1
-	bgt	.L1503
+	bgt	.L1233
 	cmp	w5, 48
-	bls	.L1504
+	bls	.L1234
 	cmp	w3, 8
-	bls	.L1504
-	adrp	x3, .LANCHOR95
-	ldrh	w3, [x3, #:lo12:.LANCHOR95]
+	bls	.L1234
+	adrp	x3, .LANCHOR68
+	ldrh	w3, [x3, #:lo12:.LANCHOR68]
 	cmp	w3, 35
-	bhi	.L1504
-.L1503:
+	bhi	.L1234
+.L1233:
 	strh	wzr, [x26]
-.L1504:
+.L1234:
 	ldrh	w1, [x2, x1]
 	cmp	w0, w1
-	bgt	.L1505
-	mov	w0, 65535
-	cmp	w21, w0
-	bne	.L1505
+	bgt	.L1235
 	ldrh	w0, [x26]
 	cmp	w0, 3
-	bhi	.L1505
+	bhi	.L1235
 	mov	w0, -1
 	strh	wzr, [x26]
-	strh	w0, [x19, #:lo12:.LANCHOR80]
-.L1567:
-	adrp	x0, .LANCHOR177
-	ldrh	w0, [x0, #:lo12:.LANCHOR177]
-	b	.L1456
-.L1505:
-	cbnz	w1, .L1506
+	strh	w0, [x19, #:lo12:.LANCHOR144]
+.L1286:
+	adrp	x0, .LANCHOR172
+	ldrh	w0, [x0, #:lo12:.LANCHOR172]
+	b	.L1206
+.L1235:
+	cbnz	w1, .L1236
 	mov	w0, -1
 	bl	decrement_vpc_count
 	ldrh	w0, [x26]
 	add	w0, w0, 1
 	strh	w0, [x26]
-	b	.L1499
-.L1506:
-	add	x0, x19, :lo12:.LANCHOR80
+	b	.L1229
+.L1236:
+	add	x0, x19, :lo12:.LANCHOR144
 	strb	wzr, [x0, 8]
-	ldr	x0, [x29, 120]
+	ldr	x0, [x29, 128]
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w6
-	bne	.L1507
-	adrp	x1, .LANCHOR180
+	bne	.L1237
+	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
 	mov	w2, 700
-	add	x1, x1, :lo12:.LANCHOR180
+	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1507:
+.L1237:
 	adrp	x0, .LANCHOR52
-	ldrh	w1, [x19, #:lo12:.LANCHOR80]
+	ldrh	w1, [x19, #:lo12:.LANCHOR144]
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bne	.L1508
-	adrp	x1, .LANCHOR180
+	bne	.L1238
+	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
 	mov	w2, 701
-	add	x1, x1, :lo12:.LANCHOR180
+	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1508:
+.L1238:
 	adrp	x0, .LANCHOR53
-	ldrh	w1, [x19, #:lo12:.LANCHOR80]
+	ldrh	w1, [x19, #:lo12:.LANCHOR144]
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L1509
-	adrp	x1, .LANCHOR180
+	bne	.L1239
+	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
 	mov	w2, 702
-	add	x1, x1, :lo12:.LANCHOR180
+	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1509:
-	add	x22, x19, :lo12:.LANCHOR80
+.L1239:
+	add	x22, x19, :lo12:.LANCHOR144
 	mov	x0, x22
 	bl	make_superblock
-	adrp	x0, .LANCHOR178
-	ldrh	w1, [x19, #:lo12:.LANCHOR80]
-	strh	wzr, [x0, #:lo12:.LANCHOR178]
+	adrp	x0, .LANCHOR173
+	ldrh	w1, [x19, #:lo12:.LANCHOR144]
+	strh	wzr, [x0, #:lo12:.LANCHOR173]
 	ldr	x0, [x23, #:lo12:.LANCHOR42]
 	ldrh	w1, [x0, x1, lsl 1]
-	adrp	x0, .LANCHOR179
+	adrp	x0, .LANCHOR174
 	strh	wzr, [x22, 2]
-	strh	w1, [x0, #:lo12:.LANCHOR179]
+	strh	w1, [x0, #:lo12:.LANCHOR174]
 	strb	wzr, [x22, 6]
-.L1498:
-	ldr	x1, [x29, 144]
+.L1228:
 	mov	w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR108]
+	str	w0, [x21, #:lo12:.LANCHOR94]
 	adrp	x0, .LANCHOR19
-	str	x0, [x29, 112]
+	str	x0, [x29, 120]
 	ldrh	w1, [x0, #:lo12:.LANCHOR19]
 	ldr	w0, [x29, 152]
 	str	w1, [x29, 156]
-	cbz	w0, .L1510
+	cbz	w0, .L1240
 	adrp	x0, .LANCHOR3
-	ldrh	w2, [x19, #:lo12:.LANCHOR80]
+	ldrh	w2, [x19, #:lo12:.LANCHOR144]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	mul	w0, w0, w1
 	adrp	x1, .LANCHOR42
@@ -11111,121 +9196,121 @@ rk_ftl_garbage_collect:
 	sdiv	w0, w0, w1
 	add	w20, w20, w0
 	and	w20, w20, 65535
-.L1510:
-	add	x0, x19, :lo12:.LANCHOR80
+.L1240:
+	add	x0, x19, :lo12:.LANCHOR144
 	ldr	w2, [x29, 156]
 	ldrh	w0, [x0, 2]
 	add	w1, w0, w20
 	cmp	w1, w2
-	ble	.L1511
+	ble	.L1241
 	sub	w20, w2, w0
 	and	w20, w20, 65535
-.L1511:
-	adrp	x0, .LANCHOR178
+.L1241:
+	adrp	x0, .LANCHOR173
 	mov	w28, 0
-	add	x0, x0, :lo12:.LANCHOR178
-	str	x0, [x29, 136]
-.L1512:
+	add	x0, x0, :lo12:.LANCHOR173
+	str	x0, [x29, 144]
+.L1242:
 	cmp	w20, w28, uxth
-	bls	.L1520
-	add	x1, x19, :lo12:.LANCHOR80
+	bls	.L1250
+	add	x1, x19, :lo12:.LANCHOR144
 	adrp	x0, .LANCHOR3
-	adrp	x23, .LANCHOR93
+	adrp	x23, .LANCHOR66
 	add	x1, x1, 16
 	ldrh	w7, [x0, #:lo12:.LANCHOR3]
 	mov	w22, 0
 	ldrh	w4, [x1, -14]
 	mov	w2, 0
-	ldr	x0, [x23, #:lo12:.LANCHOR93]
+	ldr	x0, [x23, #:lo12:.LANCHOR66]
 	mov	w6, 65535
 	add	w4, w4, w28
-	b	.L1521
-.L1514:
+	b	.L1251
+.L1244:
 	ldrh	w3, [x1]
 	cmp	w3, w6
-	beq	.L1513
+	beq	.L1243
 	ubfiz	x5, x22, 5, 16
 	add	w22, w22, 1
 	add	x5, x0, x5
 	and	w22, w22, 65535
 	orr	w3, w4, w3, lsl 10
 	str	w3, [x5, 4]
-.L1513:
+.L1243:
 	add	w2, w2, 1
 	add	x1, x1, 2
 	and	w2, w2, 65535
-.L1521:
+.L1251:
 	cmp	w2, w7
-	bne	.L1514
-	add	x1, x19, :lo12:.LANCHOR80
-	adrp	x24, .LANCHOR89
-	add	x24, x24, :lo12:.LANCHOR89
+	bne	.L1244
+	add	x1, x19, :lo12:.LANCHOR144
+	adrp	x24, .LANCHOR62
+	add	x24, x24, :lo12:.LANCHOR62
 	ldrb	w2, [x1, 8]
 	mov	w1, w22
 	bl	FlashReadPages
 	ubfiz	x0, x22, 5, 16
 	mov	x22, 0
-	str	x0, [x29, 128]
-.L1515:
-	ldr	x0, [x29, 128]
-	cmp	x0, x22
-	bne	.L1519
+	str	x0, [x29, 136]
+.L1245:
+	ldr	x0, [x29, 136]
+	cmp	x22, x0
+	bne	.L1249
 	add	w28, w28, 1
-	b	.L1512
-.L1519:
-	ldr	x0, [x23, #:lo12:.LANCHOR93]
+	b	.L1242
+.L1249:
+	ldr	x0, [x23, #:lo12:.LANCHOR66]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	beq	.L1516
+	beq	.L1246
 	ldr	x27, [x1, 16]
 	mov	w0, 61589
 	ldrh	w1, [x27]
 	cmp	w1, w0
-	bne	.L1516
+	bne	.L1246
 	ldr	w4, [x27, 8]
 	cmn	w4, #1
-	bne	.L1517
-	str	w4, [x29, 104]
+	bne	.L1247
+	str	w4, [x29, 112]
 	mov	w2, 736
-	adrp	x1, .LANCHOR180
+	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR180
+	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	ldr	w4, [x29, 104]
-.L1517:
+	ldr	w4, [x29, 112]
+.L1247:
 	mov	w2, 0
 	add	x1, x29, 172
 	mov	w0, w4
 	bl	log2phys
-	ldr	x0, [x23, #:lo12:.LANCHOR93]
+	ldr	x0, [x23, #:lo12:.LANCHOR66]
 	ldr	w1, [x29, 172]
 	add	x0, x0, x22
 	ldr	w2, [x0, 4]
 	cmp	w2, w1
-	bne	.L1516
-	ldr	x1, [x29, 136]
-	adrp	x4, .LANCHOR113
-	ldr	x2, [x29, 136]
+	bne	.L1246
+	ldr	x1, [x29, 144]
+	adrp	x4, .LANCHOR104
+	ldr	x2, [x29, 144]
 	ldr	w0, [x0, 24]
 	ldrh	w1, [x1]
 	add	w1, w1, 1
 	strh	w1, [x2]
-	ldr	x2, [x4, #:lo12:.LANCHOR113]
+	ldr	x2, [x4, #:lo12:.LANCHOR104]
 	ldr	w1, [x24]
 	add	x1, x2, x1, lsl 5
-	stp	x4, x1, [x29, 96]
+	stp	x4, x1, [x29, 104]
 	str	w0, [x1, 24]
 	bl	Ftl_get_new_temp_ppa
-	ldp	x4, x1, [x29, 96]
-	ldr	x2, [x4, #:lo12:.LANCHOR113]
+	ldp	x4, x1, [x29, 104]
+	ldr	x2, [x4, #:lo12:.LANCHOR104]
 	str	w0, [x1, 4]
 	ldr	w1, [x24]
 	ubfiz	x0, x1, 5, 32
 	add	w1, w1, 1
 	add	x2, x2, x0
-	ldr	x0, [x23, #:lo12:.LANCHOR93]
+	ldr	x0, [x23, #:lo12:.LANCHOR66]
 	add	x0, x0, x22
 	ldr	x4, [x0, 8]
 	str	x4, [x2, 8]
@@ -11237,136 +9322,75 @@ rk_ftl_garbage_collect:
 	add	x11, x2, :lo12:.LANCHOR53
 	ldrh	w2, [x2, #:lo12:.LANCHOR53]
 	strh	w2, [x27, 2]
-	adrp	x2, .LANCHOR71
+	adrp	x2, .LANCHOR83
 	str	w1, [x24]
 	mov	w1, 1
-	ldr	w2, [x2, #:lo12:.LANCHOR71]
+	ldr	w2, [x2, #:lo12:.LANCHOR83]
 	str	w2, [x27, 4]
 	bl	FtlGcBufAlloc
 	ldrb	w1, [x11, 7]
 	ldr	w0, [x24]
 	cmp	w1, w0
-	beq	.L1518
+	beq	.L1248
 	ldrh	w0, [x11, 4]
-	cbnz	w0, .L1516
-.L1518:
+	cbnz	w0, .L1246
+.L1248:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	w0, .L1516
-.L1568:
-	ldr	x0, [x29, 144]
-	str	wzr, [x0, #:lo12:.LANCHOR108]
-	b	.L1567
-.L1516:
+	cbz	w0, .L1246
+.L1287:
+	str	wzr, [x21, #:lo12:.LANCHOR94]
+	b	.L1286
+.L1246:
 	add	x22, x22, 32
-	b	.L1515
-.L1520:
-	add	x1, x19, :lo12:.LANCHOR80
+	b	.L1245
+.L1250:
+	add	x1, x19, :lo12:.LANCHOR144
 	ldrh	w0, [x1, 2]
 	add	w20, w20, w0
 	ldr	w0, [x29, 156]
 	and	w20, w20, 65535
 	strh	w20, [x1, 2]
 	cmp	w0, w20
-	bhi	.L1522
-	adrp	x0, .LANCHOR89
-	ldr	w0, [x0, #:lo12:.LANCHOR89]
-	cbz	w0, .L1523
+	bhi	.L1252
+	adrp	x0, .LANCHOR62
+	ldr	w0, [x0, #:lo12:.LANCHOR62]
+	cbz	w0, .L1253
 	bl	Ftl_gc_temp_data_write_back
-	cbnz	w0, .L1568
-.L1523:
-	adrp	x0, .LANCHOR178
-	ldrh	w0, [x0, #:lo12:.LANCHOR178]
-	cbnz	w0, .L1524
-	ldrh	w0, [x19, #:lo12:.LANCHOR80]
+	cbnz	w0, .L1287
+.L1253:
+	adrp	x0, .LANCHOR173
+	ldrh	w0, [x0, #:lo12:.LANCHOR173]
+	cbnz	w0, .L1254
+	ldrh	w0, [x19, #:lo12:.LANCHOR144]
 	adrp	x1, .LANCHOR42
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	lsl	x0, x0, 1
 	ldrh	w2, [x1, x0]
-	cbz	w2, .L1524
+	cbz	w2, .L1254
 	strh	wzr, [x1, x0]
-	ldrh	w0, [x19, #:lo12:.LANCHOR80]
+	ldrh	w0, [x19, #:lo12:.LANCHOR144]
 	bl	update_vpc_list
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1524:
+.L1254:
 	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR80]
-.L1522:
-	ldr	x0, [x29, 144]
-	str	wzr, [x0, #:lo12:.LANCHOR108]
+	strh	w0, [x19, #:lo12:.LANCHOR144]
+.L1252:
 	adrp	x0, .LANCHOR48
+	str	wzr, [x21, #:lo12:.LANCHOR94]
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 2
-	bhi	.L1525
-	ldr	x0, [x29, 112]
+	bhi	.L1255
+	ldr	x0, [x29, 120]
 	ldrh	w20, [x0, #:lo12:.LANCHOR19]
-	b	.L1526
-.L1525:
-	adrp	x1, .LANCHOR177
-	ldrh	w1, [x1, #:lo12:.LANCHOR177]
-	cmp	w1, 0
-	csinc	w0, w1, w0, ne
-	b	.L1456
-.L1529:
+	b	.L1256
+.L1255:
+	add	w0, w0, 1
+	b	.L1206
+.L1258:
 	mov	w0, 0
-	b	.L1456
+	b	.L1206
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
-	.section	.text.sftl_init,"ax",@progbits
-	.align	2
-	.global	sftl_init
-	.type	sftl_init, %function
-sftl_init:
-	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LC70
-	add	x1, x1, :lo12:.LC70
-	mov	w0, -1
-	add	x29, sp, 0
-	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR86
-	str	w0, [x19, #:lo12:.LANCHOR86]
-	adrp	x0, .LC71
-	add	x0, x0, :lo12:.LC71
-	bl	printf
-	adrp	x0, .LANCHOR0
-	add	x0, x0, :lo12:.LANCHOR0
-	bl	FtlConstantsInit
-	bl	FtlMemInit
-	bl	FtlVariablesInit
-	adrp	x0, .LANCHOR4
-	ldrh	w0, [x0, #:lo12:.LANCHOR4]
-	bl	FtlFreeSysBlkQueueInit
-	bl	FtlLoadBbt
-	cbnz	w0, .L1573
-	bl	FtlSysBlkInit
-	cbnz	w0, .L1573
-	mov	w0, 1
-	str	w0, [x19, #:lo12:.LANCHOR86]
-	adrp	x0, .LANCHOR48
-	ldrh	w0, [x0, #:lo12:.LANCHOR48]
-	cmp	w0, 15
-	bhi	.L1573
-	mov	w19, 8129
-.L1572:
-	mov	w1, 1
-	mov	w0, 0
-	bl	rk_ftl_garbage_collect
-	subs	w19, w19, #1
-	bne	.L1572
-.L1573:
-	mov	w0, 0
-	ldr	x19, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	ret
-	.size	sftl_init, .-sftl_init
-	.section	.text.sftl_gc,"ax",@progbits
-	.align	2
-	.global	sftl_gc
-	.type	sftl_gc, %function
-sftl_gc:
-	mov	w1, 1
-	mov	w0, w1
-	b	rk_ftl_garbage_collect
-	.size	sftl_gc, .-sftl_gc
 	.section	.text.FtlRead,"ax",@progbits
 	.align	2
 	.global	FtlRead
@@ -11384,13 +9408,13 @@ FtlRead:
 	mov	w26, w2
 	stp	x21, x22, [sp, 32]
 	stp	x27, x28, [sp, 80]
-	bne	.L1578
+	bne	.L1289
 	mov	x2, x3
 	mov	w1, w26
 	add	w0, w19, 256
 	bl	FtlVendorPartRead
 	mov	w21, w0
-.L1577:
+.L1288:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11399,87 +9423,87 @@ FtlRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1578:
+.L1289:
 	add	w0, w1, w2
 	str	w0, [x29, 136]
 	adrp	x0, .LANCHOR34
 	add	w1, w1, w2
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	cmp	w1, w0
-	bhi	.L1599
-	adrp	x0, .LANCHOR86
-	ldr	w21, [x0, #:lo12:.LANCHOR86]
+	bhi	.L1310
+	adrp	x0, .LANCHOR166
+	ldr	w21, [x0, #:lo12:.LANCHOR166]
 	cmn	w21, #1
-	beq	.L1577
+	beq	.L1288
 	adrp	x22, .LANCHOR12
-	adrp	x25, .LANCHOR81
-	add	x25, x25, :lo12:.LANCHOR81
+	adrp	x25, .LANCHOR135
+	add	x25, x25, :lo12:.LANCHOR135
 	mov	w27, 0
 	ldrh	w0, [x22, #:lo12:.LANCHOR12]
 	mov	w21, 0
-	adrp	x28, .LANCHOR112
+	adrp	x28, .LANCHOR103
 	stp	wzr, wzr, [x29, 140]
 	udiv	w1, w19, w0
 	stp	wzr, w1, [x29, 148]
 	add	w1, w19, w2
 	sub	w24, w1, #1
-	adrp	x1, .LANCHOR69
+	adrp	x1, .LANCHOR163
 	ldr	w20, [x29, 152]
 	udiv	w24, w24, w0
 	ldr	w0, [x29, 152]
 	sub	w0, w24, w0
 	add	w0, w0, 1
 	str	w0, [x29, 156]
-	ldr	w0, [x1, #:lo12:.LANCHOR69]
+	ldr	w0, [x1, #:lo12:.LANCHOR163]
 	add	w0, w0, w2
-	str	w0, [x1, #:lo12:.LANCHOR69]
-	adrp	x1, .LANCHOR62
+	str	w0, [x1, #:lo12:.LANCHOR163]
+	adrp	x1, .LANCHOR89
 	ldr	w2, [x29, 156]
-	ldr	w0, [x1, #:lo12:.LANCHOR62]
+	ldr	w0, [x1, #:lo12:.LANCHOR89]
 	add	w0, w0, w2
-	str	w0, [x1, #:lo12:.LANCHOR62]
-.L1580:
+	str	w0, [x1, #:lo12:.LANCHOR89]
+.L1291:
 	ldr	w0, [x29, 156]
-	cbnz	w0, .L1597
-	adrp	x0, .LANCHOR101
-	ldrh	w0, [x0, #:lo12:.LANCHOR101]
-	cbnz	w0, .L1598
+	cbnz	w0, .L1308
+	adrp	x0, .LANCHOR74
+	ldrh	w0, [x0, #:lo12:.LANCHOR74]
+	cbnz	w0, .L1309
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 31
-	bhi	.L1577
-.L1598:
+	bhi	.L1288
+.L1309:
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-	b	.L1577
-.L1597:
+	b	.L1288
+.L1308:
 	add	x1, x29, 172
 	mov	w2, 0
 	mov	w0, w20
 	bl	log2phys
 	ldr	w1, [x29, 172]
 	cmn	w1, #1
-	bne	.L1581
+	bne	.L1292
 	add	x5, x22, :lo12:.LANCHOR12
 	mov	w4, 0
-.L1582:
+.L1293:
 	ldrh	w0, [x5]
 	cmp	w4, w0
-	bcc	.L1584
-.L1585:
+	bcc	.L1295
+.L1296:
 	ldr	w0, [x29, 156]
 	add	w20, w20, 1
 	subs	w0, w0, #1
 	str	w0, [x29, 156]
-	beq	.L1589
+	beq	.L1300
 	adrp	x0, .LANCHOR3
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w27, w0, lsl 2
-	bne	.L1580
-.L1589:
-	cbz	w27, .L1580
-	ldr	x0, [x28, #:lo12:.LANCHOR112]
+	bne	.L1291
+.L1300:
+	cbz	w27, .L1291
+	ldr	x0, [x28, #:lo12:.LANCHOR103]
 	mov	w1, w27
 	mov	w2, 0
 	bl	FlashReadPages
@@ -11497,57 +9521,57 @@ FtlRead:
 	str	x0, [x29, 104]
 	add	x0, x22, :lo12:.LANCHOR12
 	str	x0, [x29, 96]
-.L1596:
-	ldr	x0, [x28, #:lo12:.LANCHOR112]
+.L1307:
+	ldr	x0, [x28, #:lo12:.LANCHOR103]
 	ldr	w2, [x29, 152]
 	add	x0, x0, x27
 	ldr	w1, [x0, 24]
 	cmp	w2, w1
-	bne	.L1591
+	bne	.L1302
 	ldr	x1, [x0, 8]
-	adrp	x0, .LANCHOR118
-	ldr	x0, [x0, #:lo12:.LANCHOR118]
+	adrp	x0, .LANCHOR109
+	ldr	x0, [x0, #:lo12:.LANCHOR109]
 	cmp	x1, x0
-	bne	.L1592
+	bne	.L1303
 	ldr	x0, [x29, 128]
 	ldr	w2, [x29, 120]
 	add	x1, x1, x0
 	mov	x0, x23
-.L1610:
+.L1321:
 	bl	ftl_memcpy
-.L1592:
-	ldr	x0, [x28, #:lo12:.LANCHOR112]
+.L1303:
+	ldr	x0, [x28, #:lo12:.LANCHOR103]
 	add	x0, x0, x27
 	ldr	x1, [x0, 16]
 	ldr	w2, [x0, 24]
 	ldr	w1, [x1, 8]
 	cmp	w2, w1
-	beq	.L1593
+	beq	.L1304
 	ldr	w1, [x25, 72]
 	add	w1, w1, 1
 	str	w1, [x25, 72]
-.L1593:
+.L1304:
 	ldr	w1, [x0]
 	cmn	w1, #1
-	bne	.L1594
+	bne	.L1305
 	ldr	w0, [x25, 72]
 	mov	w21, w1
 	add	w0, w0, 1
 	str	w0, [x25, 72]
-.L1595:
+.L1306:
 	ldr	x0, [x29, 104]
 	add	x27, x27, 32
 	cmp	x0, x27
-	bne	.L1596
+	bne	.L1307
 	mov	w27, 0
-	b	.L1580
-.L1584:
+	b	.L1291
+.L1295:
 	madd	w0, w20, w0, w4
 	cmp	w19, w0
-	bhi	.L1583
+	bhi	.L1294
 	ldr	w1, [x29, 136]
 	cmp	w1, w0
-	bls	.L1583
+	bls	.L1294
 	sub	w0, w0, w19
 	str	x5, [x29, 120]
 	lsl	w0, w0, 9
@@ -11558,19 +9582,19 @@ FtlRead:
 	bl	ftl_memset
 	ldr	w4, [x29, 128]
 	ldr	x5, [x29, 120]
-.L1583:
+.L1294:
 	add	w4, w4, 1
-	b	.L1582
-.L1581:
-	ldr	x2, [x28, #:lo12:.LANCHOR112]
+	b	.L1293
+.L1292:
+	ldr	x2, [x28, #:lo12:.LANCHOR103]
 	ubfiz	x0, x27, 5, 32
 	add	x0, x2, x0
 	str	w1, [x0, 4]
 	ldr	w1, [x29, 152]
 	cmp	w20, w1
-	bne	.L1586
-	adrp	x1, .LANCHOR118
-	ldr	x1, [x1, #:lo12:.LANCHOR118]
+	bne	.L1297
+	adrp	x1, .LANCHOR109
+	ldr	x1, [x1, #:lo12:.LANCHOR109]
 	str	x1, [x0, 8]
 	ldrh	w1, [x22, #:lo12:.LANCHOR12]
 	udiv	w2, w19, w1
@@ -11581,51 +9605,51 @@ FtlRead:
 	csel	w2, w26, w2, ls
 	str	w2, [x29, 144]
 	cmp	w1, w2
-	bne	.L1587
+	bne	.L1298
 	str	x23, [x0, 8]
-.L1587:
+.L1298:
 	adrp	x1, .LANCHOR24
-	adrp	x2, .LANCHOR124
+	adrp	x2, .LANCHOR115
 	str	w20, [x0, 24]
 	ldrh	w1, [x1, #:lo12:.LANCHOR24]
-	ldr	x2, [x2, #:lo12:.LANCHOR124]
+	ldr	x2, [x2, #:lo12:.LANCHOR115]
 	mul	w1, w1, w27
 	add	w27, w27, 1
 	and	x1, x1, 4294967292
 	add	x1, x2, x1
 	str	x1, [x0, 16]
-	b	.L1585
-.L1586:
+	b	.L1296
+.L1297:
 	cmp	w20, w24
-	bne	.L1588
+	bne	.L1299
 	ldrh	w2, [x22, #:lo12:.LANCHOR12]
-	adrp	x1, .LANCHOR119
+	adrp	x1, .LANCHOR110
 	ldr	w3, [x29, 136]
-	ldr	x1, [x1, #:lo12:.LANCHOR119]
+	ldr	x1, [x1, #:lo12:.LANCHOR110]
 	str	x1, [x0, 8]
 	mul	w1, w20, w2
 	sub	w3, w3, w1
 	str	w3, [x29, 140]
 	cmp	w2, w3
-	bne	.L1587
-.L1609:
+	bne	.L1298
+.L1320:
 	sub	w1, w1, w19
 	lsl	w1, w1, 9
 	add	x1, x23, x1
 	str	x1, [x0, 8]
-	b	.L1587
-.L1588:
+	b	.L1298
+.L1299:
 	ldrh	w1, [x22, #:lo12:.LANCHOR12]
 	mul	w1, w1, w20
-	b	.L1609
-.L1591:
+	b	.L1320
+.L1302:
 	cmp	w24, w1
-	bne	.L1592
+	bne	.L1303
 	ldr	x1, [x0, 8]
-	adrp	x0, .LANCHOR119
-	ldr	x0, [x0, #:lo12:.LANCHOR119]
+	adrp	x0, .LANCHOR110
+	ldr	x0, [x0, #:lo12:.LANCHOR110]
 	cmp	x1, x0
-	bne	.L1592
+	bne	.L1303
 	ldr	x0, [x29, 96]
 	ldr	w2, [x29, 116]
 	ldrh	w0, [x0]
@@ -11633,18 +9657,18 @@ FtlRead:
 	sub	w0, w0, w19
 	lsl	w0, w0, 9
 	add	x0, x23, x0
-	b	.L1610
-.L1594:
+	b	.L1321
+.L1305:
 	cmp	w1, 256
-	bne	.L1595
+	bne	.L1306
 	ldr	w0, [x0, 4]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-	b	.L1595
-.L1599:
+	b	.L1306
+.L1310:
 	mov	w21, -1
-	b	.L1577
+	b	.L1288
 	.size	FtlRead, .-FtlRead
 	.section	.text.sftl_read,"ax",@progbits
 	.align	2
@@ -11662,7 +9686,7 @@ sftl_read:
 	.global	FtlWrite
 	.type	FtlWrite, %function
 FtlWrite:
-	stp	x29, x30, [sp, -240]!
+	stp	x29, x30, [sp, -224]!
 	and	w0, w0, 255
 	cmp	w0, 16
 	add	x29, sp, 0
@@ -11673,407 +9697,362 @@ FtlWrite:
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	stp	x27, x28, [sp, 80]
-	str	w2, [x29, 180]
-	bne	.L1613
+	str	w2, [x29, 164]
+	bne	.L1324
 	add	w0, w1, 256
-	ldr	w1, [x29, 180]
+	ldr	w1, [x29, 164]
 	mov	x2, x3
 	bl	FtlVendorPartWrite
-.L1612:
+.L1323:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 240
+	ldp	x29, x30, [sp], 224
 	ret
-.L1613:
-	ldr	w0, [x29, 180]
+.L1324:
+	ldr	w0, [x29, 164]
 	add	w0, w1, w0
-	str	w0, [x29, 168]
+	str	w0, [x29, 152]
 	adrp	x0, .LANCHOR34
-	ldr	w1, [x29, 168]
+	ldr	w1, [x29, 152]
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	cmp	w1, w0
-	bhi	.L1649
-	adrp	x0, .LANCHOR86
-	ldr	w0, [x0, #:lo12:.LANCHOR86]
+	bhi	.L1356
+	adrp	x0, .LANCHOR166
+	ldr	w0, [x0, #:lo12:.LANCHOR166]
 	cmn	w0, #1
-	beq	.L1612
-	adrp	x0, .LANCHOR181
+	beq	.L1323
+	adrp	x0, .LANCHOR176
 	mov	w1, 2048
 	adrp	x22, .LANCHOR12
-	ldr	w2, [x29, 180]
-	str	w1, [x0, #:lo12:.LANCHOR181]
-	ldr	w1, [x29, 168]
+	ldr	w2, [x29, 164]
+	str	w1, [x0, #:lo12:.LANCHOR176]
+	ldr	w1, [x29, 152]
 	ldrh	w0, [x22, #:lo12:.LANCHOR12]
 	sub	w1, w1, #1
 	udiv	w25, w21, w0
 	udiv	w0, w1, w0
-	adrp	x1, .LANCHOR68
-	str	w0, [x29, 156]
+	adrp	x1, .LANCHOR162
+	mov	w19, w25
+	str	w0, [x29, 144]
 	sub	w0, w0, w25
 	add	w24, w0, 1
-	str	w0, [x29, 152]
-	ldr	w0, [x1, #:lo12:.LANCHOR68]
+	str	w0, [x29, 140]
+	ldr	w0, [x1, #:lo12:.LANCHOR162]
 	add	w0, w0, w2
-	str	w0, [x1, #:lo12:.LANCHOR68]
-	adrp	x1, .LANCHOR64
-	ldr	w0, [x1, #:lo12:.LANCHOR64]
+	str	w0, [x1, #:lo12:.LANCHOR162]
+	adrp	x1, .LANCHOR85
+	ldr	w0, [x1, #:lo12:.LANCHOR85]
 	add	w0, w0, w24
-	str	w0, [x1, #:lo12:.LANCHOR64]
-	adrp	x0, .LANCHOR182
-	str	x0, [x29, 160]
-	ldr	w1, [x0, #:lo12:.LANCHOR182]
+	str	w0, [x1, #:lo12:.LANCHOR85]
 	adrp	x0, .LANCHOR51
-	add	x19, x0, :lo12:.LANCHOR51
-	cbz	w1, .L1615
-	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1615
-	adrp	x19, .LANCHOR52
-	add	x19, x19, :lo12:.LANCHOR52
-.L1615:
-	mov	w20, w25
-	adrp	x0, .LANCHOR52
-	add	x0, x0, :lo12:.LANCHOR52
-	str	x0, [x29, 96]
-.L1616:
-	cbnz	w24, .L1644
-	ldr	w1, [x29, 152]
+	add	x20, x0, :lo12:.LANCHOR51
+.L1326:
+	cbnz	w24, .L1351
+	ldr	w1, [x29, 140]
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
 	adrp	x0, .LANCHOR48
 	mov	x22, x0
 	ldrh	w1, [x0, #:lo12:.LANCHOR48]
 	cmp	w1, 5
-	bls	.L1645
-.L1647:
+	bls	.L1352
+.L1354:
 	mov	w0, 0
-	b	.L1612
-.L1644:
-	adrp	x0, .LANCHOR3
-	ldrb	w2, [x19, 6]
-	str	x0, [x29, 120]
-	ldrh	w1, [x0, #:lo12:.LANCHOR3]
-	cmp	w2, w1
-	bcc	.L1617
-	adrp	x1, .LANCHOR183
+	b	.L1323
+.L1351:
+	adrp	x0, .LANCHOR51
+	add	x0, x0, :lo12:.LANCHOR51
+	adrp	x1, .LANCHOR3
+	str	x1, [x29, 112]
+	ldrb	w2, [x0, 6]
+	ldrh	w0, [x1, #:lo12:.LANCHOR3]
+	cmp	w2, w0
+	bcc	.L1327
+	adrp	x1, .LANCHOR177
 	adrp	x0, .LC1
-	mov	w2, 1013
-	add	x1, x1, :lo12:.LANCHOR183
+	mov	w2, 1016
+	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1617:
-	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1618
-	adrp	x0, .LANCHOR51
-	add	x0, x0, :lo12:.LANCHOR51
-	cmp	x19, x0
-	bne	.L1619
-	adrp	x0, .LANCHOR52
-	add	x0, x0, :lo12:.LANCHOR52
-	ldrh	w1, [x0, 4]
-	cbnz	w1, .L1620
-	bl	allocate_new_data_superblock
-	ldr	x0, [x29, 160]
-	str	wzr, [x0, #:lo12:.LANCHOR182]
-.L1620:
-	adrp	x0, .LANCHOR51
-	add	x19, x0, :lo12:.LANCHOR51
-	mov	x0, x19
-	bl	allocate_new_data_superblock
-	ldr	x0, [x29, 160]
-	ldr	w0, [x0, #:lo12:.LANCHOR182]
-	cmp	w0, 0
-	ldr	x0, [x29, 96]
-	csel	x19, x0, x19, ne
-.L1621:
-	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1618
-	mov	x0, x19
+.L1327:
+	ldrh	w0, [x20, 4]
+	cbnz	w0, .L1328
+	mov	x0, x20
 	bl	allocate_new_data_superblock
-.L1618:
-	ldrh	w0, [x19, 4]
-	ldrb	w1, [x19, 7]
-	cmp	w0, w24
-	csel	w0, w0, w24, ls
-	lsl	w1, w1, 2
+.L1328:
+	ldrb	w0, [x20, 7]
+	ldrh	w1, [x20, 4]
+	lsl	w0, w0, 2
 	cmp	w0, w1
 	csel	w0, w0, w1, ls
+	ldrb	w1, [x20, 6]
+	cmp	w0, w24
+	csel	w0, w0, w24, ls
 	str	w0, [x29, 148]
-	ldr	x0, [x29, 120]
-	ldrb	w1, [x19, 6]
+	ldr	x0, [x29, 112]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1622
-	adrp	x1, .LANCHOR183
+	bcc	.L1329
+	adrp	x1, .LANCHOR177
 	adrp	x0, .LC1
-	mov	w2, 1046
-	add	x1, x1, :lo12:.LANCHOR183
+	mov	w2, 1049
+	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1622:
+.L1329:
 	adrp	x0, .LANCHOR24
 	add	x0, x0, :lo12:.LANCHOR24
-	str	xzr, [x29, 184]
-	str	x0, [x29, 112]
+	str	xzr, [x29, 168]
+	str	x0, [x29, 104]
 	adrp	x0, .LANCHOR23
 	add	x0, x0, :lo12:.LANCHOR23
-	str	x0, [x29, 104]
-.L1623:
+	str	x0, [x29, 96]
+.L1330:
 	ldr	w1, [x29, 148]
-	adrp	x27, .LANCHOR114
-	ldr	w23, [x29, 184]
+	adrp	x27, .LANCHOR105
+	ldr	w23, [x29, 168]
 	cmp	w23, w1
-	bcc	.L1642
+	bcc	.L1349
 	mov	x23, x1
-.L1624:
-	ldr	x0, [x27, #:lo12:.LANCHOR114]
-	mov	x3, x19
+.L1331:
+	ldr	x0, [x27, #:lo12:.LANCHOR105]
+	mov	x3, x20
 	mov	w2, 0
 	mov	w1, w23
 	bl	FtlProgPages
 	cmp	w24, w23
-	bcs	.L1643
-	adrp	x1, .LANCHOR183
+	bcs	.L1350
+	adrp	x1, .LANCHOR177
 	adrp	x0, .LC1
-	mov	w2, 1123
-	add	x1, x1, :lo12:.LANCHOR183
+	mov	w2, 1126
+	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1643:
+.L1350:
 	sub	w24, w24, w23
-	b	.L1616
-.L1619:
-	ldr	x1, [x29, 160]
-	str	wzr, [x1, #:lo12:.LANCHOR182]
-	ldrh	w1, [x0, 4]
-	cbnz	w1, .L1654
-	mov	x0, x19
-	bl	allocate_new_data_superblock
-	b	.L1621
-.L1654:
-	mov	x19, x0
-	b	.L1618
-.L1642:
-	ldrh	w0, [x19, 4]
-	cbz	w0, .L1624
-	add	x1, x29, 204
+	b	.L1326
+.L1349:
+	ldrh	w0, [x20, 4]
+	cbz	w0, .L1331
+	add	x1, x29, 188
 	mov	w2, 0
-	mov	w0, w20
+	mov	w0, w19
 	bl	log2phys
-	mov	x0, x19
+	mov	x0, x20
 	bl	get_new_active_ppa
-	ldr	x1, [x29, 184]
+	ldr	x1, [x29, 168]
 	lsl	x28, x1, 5
-	ldr	x1, [x27, #:lo12:.LANCHOR114]
+	ldr	x1, [x27, #:lo12:.LANCHOR105]
 	add	x1, x1, x28
 	str	w0, [x1, 4]
-	ldr	x0, [x29, 112]
-	str	w20, [x1, 24]
+	ldr	x0, [x29, 104]
+	str	w19, [x1, 24]
 	ldrh	w2, [x0]
 	mul	w23, w23, w2
 	and	x0, x23, 4294967292
-	str	x0, [x29, 136]
-	adrp	x0, .LANCHOR124
-	ldr	x3, [x29, 136]
-	ldr	x0, [x0, #:lo12:.LANCHOR124]
 	str	x0, [x29, 128]
+	adrp	x0, .LANCHOR115
+	ldr	x3, [x29, 128]
+	ldr	x0, [x0, #:lo12:.LANCHOR115]
+	str	x0, [x29, 120]
 	add	x23, x0, x3
 	str	x23, [x1, 16]
 	mov	x0, x23
 	mov	w1, 0
 	bl	ftl_memset
-	ldr	w0, [x29, 156]
-	cmp	w20, w25
-	ccmp	w20, w0, 4, ne
-	bne	.L1625
-	cmp	w20, w25
-	bne	.L1626
+	ldr	w0, [x29, 144]
+	cmp	w19, w25
+	ccmp	w19, w0, 4, ne
+	bne	.L1332
+	cmp	w19, w25
+	bne	.L1333
 	ldrh	w2, [x22, #:lo12:.LANCHOR12]
 	udiv	w0, w21, w2
 	msub	w0, w0, w2, w21
-	str	w0, [x29, 172]
+	str	w0, [x29, 156]
 	sub	w2, w2, w0
-	ldr	w0, [x29, 180]
+	ldr	w0, [x29, 164]
 	cmp	w2, w0
 	csel	w0, w2, w0, ls
-	str	w0, [x29, 176]
-.L1627:
+	str	w0, [x29, 160]
+.L1334:
 	ldrh	w0, [x22, #:lo12:.LANCHOR12]
-	ldr	w1, [x29, 176]
+	ldr	w1, [x29, 160]
 	cmp	w1, w0
-	ldr	x0, [x27, #:lo12:.LANCHOR114]
-	bne	.L1628
+	ldr	x0, [x27, #:lo12:.LANCHOR105]
+	bne	.L1335
 	add	x3, x0, x28
-	cmp	w20, w25
-	bne	.L1629
+	cmp	w19, w25
+	bne	.L1336
 	str	x26, [x3, 8]
-.L1630:
-	ldr	x0, [x29, 120]
-	ldrb	w1, [x19, 6]
+.L1337:
+	ldr	x0, [x29, 112]
+	ldrb	w1, [x20, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1639
-	adrp	x1, .LANCHOR183
+	bcc	.L1346
+	adrp	x1, .LANCHOR177
 	adrp	x0, .LC1
-	mov	w2, 1114
-	add	x1, x1, :lo12:.LANCHOR183
+	mov	w2, 1117
+	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1639:
-	ldp	x1, x2, [x29, 128]
+.L1346:
+	ldp	x1, x2, [x29, 120]
 	mov	w0, -3947
 	strh	w0, [x1, x2]
-	adrp	x1, .LANCHOR71
-	ldr	w0, [x1, #:lo12:.LANCHOR71]
-	stp	w0, w20, [x23, 4]
-	add	w20, w20, 1
+	adrp	x1, .LANCHOR83
+	ldr	w0, [x1, #:lo12:.LANCHOR83]
+	stp	w0, w19, [x23, 4]
+	add	w19, w19, 1
 	add	w0, w0, 1
 	cmn	w0, #1
 	csel	w0, w0, wzr, ne
-	str	w0, [x1, #:lo12:.LANCHOR71]
-	ldr	w0, [x29, 204]
+	str	w0, [x1, #:lo12:.LANCHOR83]
+	ldr	w0, [x29, 188]
 	str	w0, [x23, 12]
-	ldrh	w0, [x19]
+	ldrh	w0, [x20]
 	strh	w0, [x23, 2]
-	ldr	x0, [x29, 184]
+	ldr	x0, [x29, 168]
 	add	x0, x0, 1
-	str	x0, [x29, 184]
-	b	.L1623
-.L1626:
-	ldr	w0, [x29, 168]
+	str	x0, [x29, 168]
+	b	.L1330
+.L1333:
+	ldr	w0, [x29, 152]
 	ldrh	w2, [x22, #:lo12:.LANCHOR12]
-	msub	w2, w20, w2, w0
+	msub	w2, w19, w2, w0
 	and	w0, w2, 65535
-	stp	wzr, w0, [x29, 172]
-	b	.L1627
-.L1629:
-	ldr	w0, [x29, 176]
-.L1661:
-	mul	w0, w0, w20
+	stp	wzr, w0, [x29, 156]
+	b	.L1334
+.L1336:
+	ldr	w0, [x29, 160]
+.L1364:
+	mul	w0, w0, w19
 	sub	w0, w0, w21
 	lsl	w0, w0, 9
 	add	x0, x26, x0
 	str	x0, [x3, 8]
-	b	.L1630
-.L1628:
+	b	.L1337
+.L1335:
 	add	x0, x0, x28
-	cmp	w20, w25
-	bne	.L1631
-	adrp	x1, .LANCHOR118
-	ldr	x1, [x1, #:lo12:.LANCHOR118]
-.L1660:
+	cmp	w19, w25
+	bne	.L1338
+	adrp	x1, .LANCHOR109
+	ldr	x1, [x1, #:lo12:.LANCHOR109]
+.L1363:
 	str	x1, [x0, 8]
-	ldr	w0, [x29, 204]
+	ldr	w0, [x29, 188]
 	cmn	w0, #1
-	beq	.L1633
-	str	w0, [x29, 212]
+	beq	.L1340
+	str	w0, [x29, 196]
 	mov	w2, 0
-	ldr	x0, [x27, #:lo12:.LANCHOR114]
-	str	w20, [x29, 232]
+	ldr	x0, [x27, #:lo12:.LANCHOR105]
+	str	w19, [x29, 216]
 	add	x0, x0, x28
 	ldp	x1, x0, [x0, 8]
-	stp	x1, x0, [x29, 216]
+	stp	x1, x0, [x29, 200]
 	mov	w1, 1
-	add	x0, x29, 208
+	add	x0, x29, 192
 	bl	FlashReadPages
-	ldr	w0, [x29, 208]
+	ldr	w0, [x29, 192]
 	cmn	w0, #1
-	bne	.L1634
-	adrp	x0, .LANCHOR81
-	add	x0, x0, :lo12:.LANCHOR81
+	bne	.L1341
+	adrp	x0, .LANCHOR135
+	add	x0, x0, :lo12:.LANCHOR135
 	ldr	w1, [x0, 72]
 	add	w1, w1, 1
 	str	w1, [x0, 72]
-.L1637:
-	ldr	w0, [x29, 176]
-	cmp	w20, w25
+.L1344:
+	ldr	w0, [x29, 160]
+	cmp	w19, w25
 	lsl	w2, w0, 9
-	bne	.L1638
-	ldr	x0, [x27, #:lo12:.LANCHOR114]
+	bne	.L1345
+	ldr	x0, [x27, #:lo12:.LANCHOR105]
 	mov	x1, x26
 	add	x3, x0, x28
-	ldr	w0, [x29, 172]
+	ldr	w0, [x29, 156]
 	ldr	x3, [x3, 8]
 	lsl	w0, w0, 9
 	add	x0, x3, x0
-.L1662:
+.L1365:
 	bl	ftl_memcpy
-	b	.L1630
-.L1631:
-	adrp	x1, .LANCHOR119
-	ldr	x1, [x1, #:lo12:.LANCHOR119]
-	b	.L1660
-.L1634:
+	b	.L1337
+.L1338:
+	adrp	x1, .LANCHOR110
+	ldr	x1, [x1, #:lo12:.LANCHOR110]
+	b	.L1363
+.L1341:
 	ldr	w1, [x23, 8]
-	cmp	w20, w1
-	beq	.L1636
-	adrp	x0, .LANCHOR81
-	add	x0, x0, :lo12:.LANCHOR81
+	cmp	w19, w1
+	beq	.L1343
+	adrp	x0, .LANCHOR135
+	add	x0, x0, :lo12:.LANCHOR135
 	ldr	w2, [x0, 72]
 	add	w2, w2, 1
 	str	w2, [x0, 72]
-	adrp	x0, .LC113
-	mov	w2, w20
-	add	x0, x0, :lo12:.LC113
+	adrp	x0, .LC37
+	mov	w2, w19
+	add	x0, x0, :lo12:.LC37
 	bl	printf
-.L1636:
+.L1343:
 	ldr	w0, [x23, 8]
-	cmp	w20, w0
-	beq	.L1637
-	mov	w2, 1099
-	adrp	x1, .LANCHOR183
+	cmp	w19, w0
+	beq	.L1344
+	mov	w2, 1102
+	adrp	x1, .LANCHOR177
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR183
+	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	b	.L1637
-.L1633:
-	ldr	x0, [x27, #:lo12:.LANCHOR114]
-	ldr	x1, [x29, 104]
+	b	.L1344
+.L1340:
+	ldr	x0, [x27, #:lo12:.LANCHOR105]
+	ldr	x1, [x29, 96]
 	add	x0, x0, x28
 	ldrh	w2, [x1]
 	mov	w1, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	b	.L1637
-.L1638:
+	b	.L1344
+.L1345:
 	ldrh	w1, [x22, #:lo12:.LANCHOR12]
-	ldr	x0, [x27, #:lo12:.LANCHOR114]
+	ldr	x0, [x27, #:lo12:.LANCHOR105]
 	add	x3, x0, x28
-	mul	w1, w1, w20
+	mul	w1, w1, w19
 	sub	w1, w1, w21
 	ldr	x0, [x3, 8]
 	lsl	w1, w1, 9
 	add	x1, x26, x1
-	b	.L1662
-.L1625:
-	ldr	x0, [x27, #:lo12:.LANCHOR114]
+	b	.L1365
+.L1332:
+	ldr	x0, [x27, #:lo12:.LANCHOR105]
 	add	x3, x0, x28
 	ldrh	w0, [x22, #:lo12:.LANCHOR12]
-	b	.L1661
-.L1645:
-	adrp	x23, .LANCHOR99
-	adrp	x20, .LANCHOR83
-	adrp	x21, .LANCHOR82
-	add	x23, x23, :lo12:.LANCHOR99
-	add	x20, x20, :lo12:.LANCHOR83
-	add	x21, x21, :lo12:.LANCHOR82
+	b	.L1364
+.L1352:
+	adrp	x23, .LANCHOR72
+	adrp	x20, .LANCHOR101
+	adrp	x21, .LANCHOR100
+	add	x23, x23, :lo12:.LANCHOR72
+	add	x20, x20, :lo12:.LANCHOR101
+	add	x21, x21, :lo12:.LANCHOR100
 	mov	w19, 256
-.L1648:
-	adrp	x0, .LANCHOR80
+.L1355:
+	adrp	x0, .LANCHOR144
 	mov	w1, 65535
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	ldrh	w0, [x0, #:lo12:.LANCHOR144]
 	cmp	w0, w1
-	bne	.L1646
+	bne	.L1353
 	ldrh	w1, [x23]
 	cmp	w1, w0
-	bne	.L1646
+	bne	.L1353
 	mov	w0, 0
 	bl	List_get_gc_head_node
 	bl	FtlGcRefreshBlock
-.L1646:
+.L1353:
 	mov	w0, 128
 	mov	w1, 1
 	strh	w0, [x20]
@@ -12085,330 +10064,872 @@ FtlWrite:
 	bl	rk_ftl_garbage_collect
 	ldrh	w0, [x22, #:lo12:.LANCHOR48]
 	cmp	w0, 2
-	bhi	.L1647
+	bhi	.L1354
 	subs	w19, w19, #1
-	bne	.L1648
-	b	.L1647
-.L1649:
+	bne	.L1355
+	b	.L1354
+.L1356:
 	mov	w0, -1
-	b	.L1612
+	b	.L1323
 	.size	FtlWrite, .-FtlWrite
-	.section	.text.FtlMakeBbt,"ax",@progbits
+	.section	.text.sftl_gc,"ax",@progbits
 	.align	2
-	.global	FtlMakeBbt
-	.type	FtlMakeBbt, %function
-FtlMakeBbt:
-	stp	x29, x30, [sp, -128]!
+	.global	sftl_gc
+	.type	sftl_gc, %function
+sftl_gc:
+	mov	w1, 1
+	mov	w0, w1
+	b	rk_ftl_garbage_collect
+	.size	sftl_gc, .-sftl_gc
+	.section	.text.FtlLoadSysInfo,"ax",@progbits
+	.align	2
+	.global	FtlLoadSysInfo
+	.type	FtlLoadSysInfo, %function
+FtlLoadSysInfo:
+	stp	x29, x30, [sp, -112]!
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	mov	w22, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR37
-	stp	x23, x24, [sp, 48]
-	add	x21, x20, :lo12:.LANCHOR37
+	adrp	x19, .LANCHOR138
+	stp	x21, x22, [sp, 32]
+	add	x0, x19, :lo12:.LANCHOR138
+	adrp	x22, .LANCHOR106
 	stp	x25, x26, [sp, 64]
-	add	x24, x21, 32
+	adrp	x25, .LANCHOR114
+	stp	x23, x24, [sp, 48]
 	stp	x27, x28, [sp, 80]
-	bl	FtlBbtMemInit
-	bl	FtlLoadFactoryBbt
-	adrp	x28, .LANCHOR148
-	add	x21, x21, 12
-	add	x25, x28, :lo12:.LANCHOR148
+	adrp	x23, .LANCHOR42
+	ldr	x1, [x22, #:lo12:.LANCHOR106]
+	adrp	x21, .LANCHOR5
+	str	x1, [x0, 8]
+	adrp	x20, .LANCHOR139
+	ldr	x1, [x25, #:lo12:.LANCHOR114]
+	str	x1, [x0, 16]
+	ldr	x0, [x23, #:lo12:.LANCHOR42]
+	mov	w1, 0
+	ldrh	w2, [x21, #:lo12:.LANCHOR5]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	ldrh	w0, [x20, #:lo12:.LANCHOR139]
+	mov	w1, 65535
+	cmp	w0, w1
+	bne	.L1368
+.L1379:
+	mov	w0, -1
+.L1367:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L1368:
+	add	x24, x20, :lo12:.LANCHOR139
+	mov	w1, 1
+	bl	FtlGetLastWrittenPage
+	sxth	w28, w0
+	add	w0, w0, 1
+	adrp	x26, .LANCHOR23
+	strh	w0, [x24, 2]
+	adrp	x27, .LANCHOR178
+	ldrsh	w24, [x20, #:lo12:.LANCHOR139]
+	add	x26, x26, :lo12:.LANCHOR23
+	add	x27, x27, :lo12:.LANCHOR178
+.L1370:
+	tbz	w28, #31, .L1376
+	adrp	x1, .LANCHOR178
+	adrp	x0, .LC1
+	mov	w2, 1465
+	add	x1, x1, :lo12:.LANCHOR178
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L1375:
+	adrp	x1, .LANCHOR23
+	ldrh	w0, [x21, #:lo12:.LANCHOR5]
+	ldrh	w1, [x1, #:lo12:.LANCHOR23]
+	add	x0, x0, 24
+	cmp	x1, x0, lsl 1
+	bcs	.L1378
+	adrp	x1, .LANCHOR178
+	adrp	x0, .LC1
+	mov	w2, 1467
+	add	x1, x1, :lo12:.LANCHOR178
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L1378:
+	add	x24, x19, :lo12:.LANCHOR138
+	adrp	x19, .LANCHOR39
+	add	x22, x19, :lo12:.LANCHOR39
+	mov	w2, 48
+	mov	x0, x22
+	ldr	x1, [x24, 8]
+	bl	ftl_memcpy
+	ldr	x0, [x23, #:lo12:.LANCHOR42]
+	ldrh	w2, [x21, #:lo12:.LANCHOR5]
+	ldr	x1, [x24, 8]
+	lsl	w2, w2, 1
+	add	x1, x1, 48
+	bl	ftl_memcpy
+	ldrh	w1, [x21, #:lo12:.LANCHOR5]
+	ldr	x0, [x24, 8]
+	lsr	w2, w1, 3
+	ubfiz	x1, x1, 1, 16
+	add	x1, x1, 48
+	add	w2, w2, 4
+	and	x1, x1, -4
+	add	x1, x0, x1
+	adrp	x0, .LANCHOR1
+	ldr	x0, [x0, #:lo12:.LANCHOR1]
+	bl	ftl_memcpy
+	ldr	w1, [x19, #:lo12:.LANCHOR39]
+	mov	w0, 19539
+	movk	w0, 0x4654, lsl 16
+	cmp	w1, w0
+	bne	.L1379
+	add	x20, x20, :lo12:.LANCHOR139
 	adrp	x0, .LANCHOR10
-	add	x0, x0, :lo12:.LANCHOR10
-	str	x0, [x29, 120]
-.L1664:
-	ldr	x0, [x29, 120]
-	ldrh	w0, [x0]
-	cmp	w22, w0
-	bcc	.L1670
-	adrp	x21, .LANCHOR25
-	add	x21, x21, :lo12:.LANCHOR25
-	mov	w19, 0
-.L1671:
-	ldrh	w0, [x21]
-	cmp	w0, w19
-	bhi	.L1672
-	add	x21, x20, :lo12:.LANCHOR37
-	mov	w22, 65535
-	ldrh	w19, [x21, 12]
-	sub	w19, w19, #1
-	and	w19, w19, 65535
-.L1673:
-	ldrh	w0, [x21, 12]
-	sub	w0, w0, #47
-	cmp	w0, w19
-	bgt	.L1677
-	mov	w0, w19
-	bl	FtlBbmIsBadBlock
-	cmp	w0, 1
-	beq	.L1674
-	mov	w0, w19
-	bl	FlashTestBlk
-	cbz	w0, .L1675
-	mov	w0, w19
-	bl	FtlBbmMapBadBlock
-.L1674:
-	sub	w19, w19, #1
-	and	w19, w19, 65535
-	b	.L1673
-.L1670:
-	adrp	x2, .LANCHOR123
-	adrp	x0, .LANCHOR115
-	add	x19, x28, :lo12:.LANCHOR148
-	ldrh	w1, [x21]
-	ldr	x0, [x0, #:lo12:.LANCHOR115]
-	mov	w3, 65535
-	ldr	x26, [x2, #:lo12:.LANCHOR123]
-	cmp	w1, w3
-	stp	x0, x26, [x19, 8]
-	adrp	x23, .LANCHOR17
-	str	x2, [x29, 112]
-	beq	.L1665
-	ldrh	w4, [x23, #:lo12:.LANCHOR17]
+	ldrh	w1, [x22, 8]
+	ldrb	w2, [x22, 10]
+	ldrh	w0, [x0, #:lo12:.LANCHOR10]
+	strh	w1, [x20, 6]
+	cmp	w2, w0
+	bne	.L1379
+	adrp	x0, .LANCHOR179
+	adrp	x2, .LANCHOR152
+	adrp	x3, .LANCHOR3
+	str	w1, [x0, #:lo12:.LANCHOR179]
+	adrp	x0, .LANCHOR19
+	ldrh	w3, [x3, #:lo12:.LANCHOR3]
+	ldrh	w0, [x0, #:lo12:.LANCHOR19]
+	mul	w0, w0, w1
+	str	w0, [x2, #:lo12:.LANCHOR152]
+	adrp	x2, .LANCHOR12
+	ldrh	w2, [x2, #:lo12:.LANCHOR12]
+	mul	w0, w2, w0
+	adrp	x2, .LANCHOR34
+	str	w0, [x2, #:lo12:.LANCHOR34]
+	adrp	x0, .LANCHOR7
+	ldr	w2, [x0, #:lo12:.LANCHOR7]
+	adrp	x0, .LANCHOR37+6
+	ldrh	w0, [x0, #:lo12:.LANCHOR37+6]
+	cmp	w1, w2
+	sub	w0, w2, w0
+	sub	w0, w0, w1
+	udiv	w0, w0, w3
+	adrp	x3, .LANCHOR171
+	strh	w0, [x3, #:lo12:.LANCHOR171]
+	bls	.L1380
+	adrp	x1, .LANCHOR178
+	adrp	x0, .LC1
+	mov	w2, 1489
+	add	x1, x1, :lo12:.LANCHOR178
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L1380:
+	add	x4, x19, :lo12:.LANCHOR39
+	adrp	x0, .LANCHOR51
+	add	x2, x0, :lo12:.LANCHOR51
+	adrp	x5, .LANCHOR144
+	adrp	x20, .LANCHOR52
+	mov	x22, x5
+	ldrh	w1, [x4, 16]
+	ldrh	w6, [x4, 14]
+	strh	w6, [x0, #:lo12:.LANCHOR51]
+	lsr	w3, w1, 6
+	and	w1, w1, 63
+	strb	w1, [x2, 6]
+	ldrb	w1, [x4, 11]
+	strb	w1, [x2, 8]
+	add	x1, x5, :lo12:.LANCHOR144
+	strh	w3, [x2, 2]
+	mov	w2, -1
+	strh	w2, [x5, #:lo12:.LANCHOR144]
+	add	x2, x20, :lo12:.LANCHOR52
+	strh	wzr, [x1, 2]
+	strb	wzr, [x1, 6]
+	strb	wzr, [x1, 8]
+	ldrh	w1, [x4, 18]
+	strh	w1, [x20, #:lo12:.LANCHOR52]
+	ldrh	w1, [x4, 20]
+	lsr	w3, w1, 6
+	and	w1, w1, 63
+	strb	w1, [x2, 6]
+	ldrb	w1, [x4, 12]
+	strh	w3, [x2, 2]
+	strb	w1, [x2, 8]
+	adrp	x2, .LANCHOR53
+	ldrh	w1, [x4, 22]
+	add	x3, x2, :lo12:.LANCHOR53
+	strh	w1, [x2, #:lo12:.LANCHOR53]
+	mov	x21, x2
+	ldrh	w1, [x4, 24]
+	lsr	w7, w1, 6
+	and	w1, w1, 63
+	strb	w1, [x3, 6]
+	ldrb	w1, [x4, 13]
+	strb	w1, [x3, 8]
+	adrp	x1, .LANCHOR84
+	strh	w7, [x3, 2]
+	ldr	w3, [x4, 32]
+	str	wzr, [x1, #:lo12:.LANCHOR84]
+	adrp	x1, .LANCHOR85
+	str	wzr, [x1, #:lo12:.LANCHOR85]
+	adrp	x1, .LANCHOR89
+	str	wzr, [x1, #:lo12:.LANCHOR89]
+	adrp	x1, .LANCHOR88
+	str	wzr, [x1, #:lo12:.LANCHOR88]
+	adrp	x1, .LANCHOR90
+	str	w3, [x1, #:lo12:.LANCHOR90]
+	adrp	x1, .LANCHOR91
+	str	wzr, [x1, #:lo12:.LANCHOR91]
+	adrp	x1, .LANCHOR92
+	str	wzr, [x1, #:lo12:.LANCHOR92]
+	adrp	x1, .LANCHOR87
+	ldr	w3, [x4, 40]
+	str	wzr, [x1, #:lo12:.LANCHOR87]
+	adrp	x1, .LANCHOR82
+	ldr	w4, [x1, #:lo12:.LANCHOR82]
+	cmp	w3, w4
+	bls	.L1381
+	str	w3, [x1, #:lo12:.LANCHOR82]
+.L1381:
+	add	x19, x19, :lo12:.LANCHOR39
+	adrp	x1, .LANCHOR83
+	ldr	w3, [x1, #:lo12:.LANCHOR83]
+	ldr	w2, [x19, 36]
+	cmp	w2, w3
+	bls	.L1382
+	str	w2, [x1, #:lo12:.LANCHOR83]
+.L1382:
+	mov	w1, 65535
+	cmp	w6, w1
+	beq	.L1383
+	add	x0, x0, :lo12:.LANCHOR51
+	bl	make_superblock
+.L1383:
+	ldrh	w2, [x20, #:lo12:.LANCHOR52]
+	mov	w1, 65535
+	add	x0, x20, :lo12:.LANCHOR52
+	cmp	w2, w1
+	beq	.L1384
+	bl	make_superblock
+.L1384:
+	ldrh	w2, [x21, #:lo12:.LANCHOR53]
+	mov	w1, 65535
+	add	x0, x21, :lo12:.LANCHOR53
+	cmp	w2, w1
+	beq	.L1385
+	bl	make_superblock
+.L1385:
+	ldrh	w2, [x22, #:lo12:.LANCHOR144]
+	mov	w1, 65535
+	add	x0, x22, :lo12:.LANCHOR144
+	cmp	w2, w1
+	beq	.L1386
+	bl	make_superblock
+.L1386:
+	mov	w0, 0
+	b	.L1367
+.L1376:
+	add	x3, x19, :lo12:.LANCHOR138
+	orr	w0, w28, w24, lsl 10
 	mov	w2, 1
-	madd	w27, w4, w22, w1
+	str	x3, [x29, 104]
 	mov	w1, w2
-	lsl	w0, w27, 10
-	str	w0, [x19, 4]
-	mov	x0, x19
+	str	w0, [x3, 4]
+	ldr	x0, [x22, #:lo12:.LANCHOR106]
+	str	x0, [x3, 8]
+	mov	x0, x3
 	bl	FlashReadPages
-	ldr	x1, [x19, 8]
-	ldr	x0, [x24]
-	ldrh	w2, [x23, #:lo12:.LANCHOR17]
-	add	w2, w2, 7
-	lsr	w2, w2, 3
-	bl	ftl_memcpy
-.L1666:
-	mov	w0, w27
-	add	w22, w22, 1
-	bl	FtlBbmMapBadBlock
-	add	x24, x24, 8
-	add	x21, x21, 2
-	b	.L1664
-.L1665:
-	mov	w1, w22
-	bl	FlashGetBadBlockList
-	ldr	x0, [x19, 8]
-	ldr	x1, [x24]
-	bl	FtlBbt2Bitmap
-	ldrh	w19, [x23, #:lo12:.LANCHOR17]
-	add	x23, x23, :lo12:.LANCHOR17
-	adrp	x0, .LANCHOR137
-	sub	w19, w19, #1
-	add	x0, x0, :lo12:.LANCHOR137
-	and	w19, w19, 65535
-	str	x0, [x29, 104]
-.L1667:
-	ldrh	w0, [x23]
-	madd	w0, w22, w0, w19
-	bl	FtlBbmIsBadBlock
-	cmp	w0, 1
-	beq	.L1668
-	ldr	x0, [x29, 112]
-	mov	w2, 16
-	strh	w19, [x21]
-	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR123]
-	bl	ftl_memset
-	adrp	x0, .LANCHOR115
-	mov	w2, 4096
+	ldr	x3, [x29, 104]
+	ldr	x0, [x3, 16]
+	ldr	w8, [x0, 12]
+	cbz	w8, .L1371
+	ldrh	w1, [x26]
+	ldr	x0, [x3, 8]
+	bl	js_hash
+	cmp	w8, w0
+	beq	.L1371
+	add	x10, x20, :lo12:.LANCHOR139
+	mov	w6, w0
+	mov	w5, w8
+	adrp	x0, .LC38
+	mov	w3, w28
+	mov	w2, w24
+	ldrh	w4, [x10, 4]
+	mov	x1, x27
+	add	x0, x0, :lo12:.LC38
+	str	x10, [x29, 104]
+	bl	printf
+	cbnz	w28, .L1372
+	ldr	x10, [x29, 104]
+	ldrh	w0, [x10, 4]
+	cmp	w24, w0
+	beq	.L1372
+	sxth	w24, w0
+	adrp	x0, .LANCHOR20
+	ldrh	w7, [x0, #:lo12:.LANCHOR20]
+	sub	w7, w7, #1
+.L1395:
+	sxth	w28, w7
+	b	.L1370
+.L1372:
+	mov	w0, -1
+	str	w0, [x19, #:lo12:.LANCHOR138]
+.L1371:
+	ldr	w0, [x19, #:lo12:.LANCHOR138]
+	cmn	w0, #1
+	beq	.L1374
+	ldr	x0, [x22, #:lo12:.LANCHOR106]
+	mov	w1, 19539
+	movk	w1, 0x4654, lsl 16
+	ldr	w0, [x0]
+	cmp	w0, w1
+	bne	.L1374
+	ldr	x0, [x25, #:lo12:.LANCHOR114]
+	ldrh	w1, [x0]
+	mov	w0, 61604
+	cmp	w1, w0
+	beq	.L1375
+.L1374:
+	sub	w7, w28, #1
+	b	.L1395
+	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
+	.section	.text.FtlMapTblRecovery,"ax",@progbits
+	.align	2
+	.global	FtlMapTblRecovery
+	.type	FtlMapTblRecovery, %function
+FtlMapTblRecovery:
+	stp	x29, x30, [sp, -160]!
 	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR115]
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	stp	x25, x26, [sp, 64]
+	mov	w20, 0
+	ldrh	w25, [x0, 6]
+	adrp	x26, .LANCHOR20
+	stp	x23, x24, [sp, 48]
+	ldr	x23, [x0, 40]
+	ldr	x24, [x0, 16]
+	lsl	w2, w25, 2
+	ldr	x0, [x0, 24]
+	str	x0, [x29, 144]
+	ldrh	w0, [x19, 8]
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR106
+	stp	x27, x28, [sp, 80]
+	str	w0, [x29, 152]
+	mov	x0, x23
 	bl	ftl_memset
-	mov	w0, -3872
-	strh	w0, [x26]
-	ldrh	w4, [x23]
-	ldrh	w0, [x21]
-	strh	w0, [x26, 2]
-	ldr	x1, [x24]
-	str	wzr, [x26, 4]
-	madd	w27, w4, w22, w0
-	lsl	w0, w27, 10
-	str	w0, [x25, 4]
-	ldr	x0, [x29, 104]
-	ldrh	w2, [x0]
-	ldr	x0, [x25, 8]
-	lsl	w2, w2, 2
-	bl	ftl_memcpy
+	stp	wzr, wzr, [x19, 48]
+	adrp	x0, .LANCHOR138
+	add	x6, x0, :lo12:.LANCHOR138
+	ldr	x1, [x22, #:lo12:.LANCHOR106]
+	mov	x27, x6
+	str	x0, [x29, 128]
+	str	x1, [x6, 8]
+	adrp	x1, .LANCHOR114
+	ldr	w0, [x29, 152]
+	ldr	x21, [x1, #:lo12:.LANCHOR114]
+	mov	w1, -1
+	str	x21, [x6, 16]
+	sub	w0, w0, #1
+	strh	w1, [x19]
+	strh	w1, [x19, 2]
+	mov	w1, 1
+	str	w0, [x29, 108]
+	add	x0, x26, :lo12:.LANCHOR20
+	str	w1, [x19, 56]
+	str	x0, [x29, 96]
+.L1397:
+	ldr	w0, [x29, 152]
+	cmp	w20, w0
+	bge	.L1416
+	ldr	w0, [x29, 108]
+	sxtw	x28, w20
+	cmp	w20, w0
+	bne	.L1398
+	lsl	x0, x28, 1
+	mov	w1, 1
+	add	x26, x24, x0
+	adrp	x27, .LANCHOR23
+	add	x27, x27, :lo12:.LANCHOR23
+	mov	w22, 0
+	ldrh	w0, [x24, x0]
+	bl	FtlGetLastWrittenPage
+	sxth	w1, w0
+	add	w0, w0, 1
+	strh	w0, [x19, 2]
+	ldr	x0, [x29, 144]
+	strh	w20, [x19]
+	str	w1, [x29, 152]
+	ldr	w0, [x0, x28, lsl 2]
+	adrp	x28, .LANCHOR180
+	str	w0, [x19, 48]
+	add	x28, x28, :lo12:.LANCHOR180
+	ldr	x0, [x29, 128]
+	add	x24, x0, :lo12:.LANCHOR138
+.L1399:
+	ldr	w0, [x29, 152]
+	cmp	w22, w0
+	ble	.L1402
+.L1416:
+	mov	x0, x19
+	bl	ftl_free_no_use_map_blk
+	adrp	x0, .LANCHOR20
+	ldrh	w1, [x19, 2]
+	ldrh	w0, [x0, #:lo12:.LANCHOR20]
+	cmp	w1, w0
+	bne	.L1404
+	mov	x0, x19
+	bl	ftl_map_blk_alloc_new_blk
+.L1404:
+	mov	x0, x19
+	bl	ftl_map_blk_gc
+	mov	x0, x19
+	bl	ftl_map_blk_gc
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 160
+	ret
+.L1402:
+	ldrh	w0, [x26]
 	mov	w2, 1
-	mov	x0, x25
 	mov	w1, w2
-	bl	FlashEraseBlocks
-	mov	w3, 1
-	mov	x0, x25
-	mov	w2, w3
-	mov	w1, w3
-	bl	FlashProgPages
-	ldr	w0, [x25]
+	orr	w0, w22, w0, lsl 10
+	str	w0, [x24, 4]
+	mov	x0, x24
+	bl	FlashReadPages
+	ldr	x0, [x24, 16]
+	ldr	w0, [x0, 12]
+	str	w0, [x29, 156]
+	uxtw	x0, w0
+	cbz	w0, .L1400
+	ldrh	w1, [x27]
+	ldr	x0, [x24, 8]
+	bl	js_hash
+	ldr	w1, [x29, 156]
+	cmp	w1, w0
+	beq	.L1400
+	mov	w5, w0
+	mov	x4, x1
+	mov	w3, w22
+	mov	w2, w20
+	mov	x1, x28
+	adrp	x0, .LC39
+	add	x0, x0, :lo12:.LC39
+	bl	printf
+	mov	w0, -1
+	str	w0, [x24]
+.L1400:
+	ldr	w0, [x24]
 	cmn	w0, #1
-	bne	.L1666
-	mov	w0, w27
-	bl	FtlBbmMapBadBlock
-	b	.L1667
-.L1668:
-	sub	w19, w19, #1
-	and	w19, w19, 65535
-	b	.L1667
-.L1672:
-	mov	w0, w19
-	add	w19, w19, 1
-	bl	FtlBbmMapBadBlock
-	and	w19, w19, 65535
-	b	.L1671
-.L1675:
-	ldrh	w0, [x21]
-	cmp	w0, w22
-	bne	.L1676
-	strh	w19, [x21]
-	b	.L1674
-.L1676:
-	strh	w19, [x21, 4]
-.L1677:
-	adrp	x0, .LANCHOR106
-	add	x19, x20, :lo12:.LANCHOR37
-	ldrh	w1, [x20, #:lo12:.LANCHOR37]
-	mov	w2, 2
-	ldr	x0, [x0, #:lo12:.LANCHOR106]
-	str	wzr, [x19, 8]
-	lsl	w1, w1, 10
-	strh	wzr, [x19, 2]
-	str	w1, [x0, 4]
+	beq	.L1401
+	ldrh	w0, [x21, 8]
+	cmp	w25, w0
+	bls	.L1401
+	ldrh	w2, [x21]
 	ldrh	w1, [x19, 4]
-	lsl	w1, w1, 10
-	str	w1, [x0, 36]
-	mov	w1, 1
-	bl	FlashEraseBlocks
-	ldrh	w0, [x20, #:lo12:.LANCHOR37]
-	bl	FtlBbmMapBadBlock
+	cmp	w2, w1
+	bne	.L1401
+	ubfiz	x0, x0, 2, 16
+	ldr	w1, [x24, 4]
+	str	w1, [x23, x0]
+.L1401:
+	add	w22, w22, 1
+	sxth	w22, w22
+	b	.L1399
+.L1398:
+	lsl	x2, x28, 1
+	ldr	x0, [x22, #:lo12:.LANCHOR106]
+	str	x0, [x27, 8]
+	add	x0, x24, x2
+	ldrh	w1, [x26, #:lo12:.LANCHOR20]
+	str	x0, [x29, 136]
+	ldrh	w0, [x24, x2]
+	sub	w1, w1, #1
+	mov	w2, 1
+	orr	w0, w1, w0, lsl 10
+	mov	w1, w2
+	str	w0, [x27, 4]
+	mov	x0, x27
+	bl	FlashReadPages
+	ldr	w0, [x27]
+	cmn	w0, #1
+	beq	.L1418
+	ldrh	w1, [x21]
 	ldrh	w0, [x19, 4]
-	bl	FtlBbmMapBadBlock
-	bl	FtlBbmTblFlush
-	strh	wzr, [x19, 2]
-	ldr	w0, [x19, 8]
+	cmp	w1, w0
+	bne	.L1418
+	ldrh	w1, [x21, 8]
+	mov	w0, 64245
+	cmp	w1, w0
+	beq	.L1406
+.L1418:
+	adrp	x0, .LANCHOR23
+	add	x0, x0, :lo12:.LANCHOR23
+	mov	w28, 0
+	str	x0, [x29, 120]
+	adrp	x0, .LANCHOR180
+	add	x0, x0, :lo12:.LANCHOR180
+	str	x0, [x29, 112]
+.L1407:
+	ldr	x0, [x29, 96]
+	ldrh	w0, [x0]
+	cmp	w28, w0
+	bge	.L1414
+	ldr	x0, [x29, 136]
+	mov	w2, 1
+	mov	w1, w2
+	ldrh	w0, [x0]
+	orr	w0, w28, w0, lsl 10
+	str	w0, [x27, 4]
+	mov	x0, x27
+	bl	FlashReadPages
+	ldr	x0, [x27, 16]
+	ldr	w0, [x0, 12]
+	str	w0, [x29, 156]
+	uxtw	x0, w0
+	cbz	w0, .L1411
+	ldr	x0, [x29, 120]
+	ldrh	w1, [x0]
+	ldr	x0, [x27, 8]
+	bl	js_hash
+	ldr	w1, [x29, 156]
+	cmp	w1, w0
+	beq	.L1411
+	mov	x4, x1
+	ldr	x1, [x29, 112]
+	mov	w5, w0
+	mov	w3, w28
+	mov	w2, w20
+	adrp	x0, .LC40
+	add	x0, x0, :lo12:.LC40
+	bl	printf
+	mov	w0, -1
+	str	w0, [x27]
+.L1411:
+	ldr	w0, [x27]
+	cmn	w0, #1
+	beq	.L1412
+	ldrh	w0, [x21, 8]
+	cmp	w25, w0
+	bls	.L1412
+	ldrh	w2, [x21]
 	ldrh	w1, [x19, 4]
+	cmp	w2, w1
+	bne	.L1412
+	ubfiz	x0, x0, 2, 16
+	ldr	w1, [x27, 4]
+	str	w1, [x23, x0]
+.L1412:
+	add	w7, w28, 1
+	sxth	w28, w7
+	b	.L1407
+.L1406:
+	ldrh	w3, [x26, #:lo12:.LANCHOR20]
+	mov	w0, 0
+	ldr	x4, [x22, #:lo12:.LANCHOR106]
+	sub	w3, w3, #1
+.L1408:
+	cmp	w0, w3
+	blt	.L1410
+.L1414:
+	add	w20, w20, 1
+	sxth	w20, w20
+	b	.L1397
+.L1410:
+	lsl	w2, w0, 1
+	sxtw	x2, w2
+	lsl	x1, x2, 2
+	ldrh	w1, [x4, x1]
+	cmp	w25, w1
+	bls	.L1409
+	add	x2, x2, 1
+	ubfiz	x1, x1, 2, 16
+	ldr	w2, [x4, x2, lsl 2]
+	str	w2, [x23, x1]
+.L1409:
+	add	w0, w0, 1
+	sxth	w0, w0
+	b	.L1408
+	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
+	.section	.text.FtlLoadVonderInfo,"ax",@progbits
+	.align	2
+	.global	FtlLoadVonderInfo
+	.type	FtlLoadVonderInfo, %function
+FtlLoadVonderInfo:
+	stp	x29, x30, [sp, -16]!
+	adrp	x1, .LANCHOR27
+	adrp	x0, .LANCHOR161
+	add	x0, x0, :lo12:.LANCHOR161
+	add	x29, sp, 0
+	ldrh	w1, [x1, #:lo12:.LANCHOR27]
+	strh	w1, [x0, 10]
+	mov	w1, -3962
+	strh	w1, [x0, 4]
+	adrp	x1, .LANCHOR35
+	ldrh	w1, [x1, #:lo12:.LANCHOR35]
+	strh	w1, [x0, 8]
+	adrp	x1, .LANCHOR28
+	ldrh	w1, [x1, #:lo12:.LANCHOR28]
+	strh	w1, [x0, 6]
+	adrp	x1, .LANCHOR36
+	ldr	x1, [x1, #:lo12:.LANCHOR36]
+	str	x1, [x0, 16]
+	adrp	x1, .LANCHOR122
+	ldr	x1, [x1, #:lo12:.LANCHOR122]
+	str	x1, [x0, 24]
+	adrp	x1, .LANCHOR121
+	ldr	x1, [x1, #:lo12:.LANCHOR121]
+	str	x1, [x0, 32]
+	adrp	x1, .LANCHOR123
+	ldr	x1, [x1, #:lo12:.LANCHOR123]
+	str	x1, [x0, 40]
+	bl	FtlMapTblRecovery
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
+	.section	.text.FtlLoadMapInfo,"ax",@progbits
+	.align	2
+	.global	FtlLoadMapInfo
+	.type	FtlLoadMapInfo, %function
+FtlLoadMapInfo:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	bl	FtlL2PDataInit
+	adrp	x0, .LANCHOR129
+	add	x0, x0, :lo12:.LANCHOR129
+	bl	FtlMapTblRecovery
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
+	.section	.text.FtlSysBlkInit,"ax",@progbits
+	.align	2
+	.global	FtlSysBlkInit
+	.type	FtlSysBlkInit, %function
+FtlSysBlkInit:
+	stp	x29, x30, [sp, -64]!
+	adrp	x0, .LANCHOR4
+	add	x29, sp, 0
+	ldrh	w0, [x0, #:lo12:.LANCHOR4]
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR156
+	stp	x21, x22, [sp, 32]
+	strh	wzr, [x19, #:lo12:.LANCHOR156]
+	str	x23, [sp, 48]
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlScanSysBlk
+	adrp	x0, .LANCHOR139
+	ldrh	w1, [x0, #:lo12:.LANCHOR139]
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L1437
+.L1439:
+	mov	w21, -1
+.L1436:
+	mov	w0, w21
+	ldr	x23, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+.L1437:
+	bl	FtlLoadSysInfo
+	mov	w21, w0
+	cbnz	w0, .L1439
+	bl	FtlLoadMapInfo
+	bl	FtlLoadVonderInfo
+	bl	Ftl_load_ext_data
+	bl	FtlLoadEctTbl
+	bl	FtlFreeSysBLkSort
+	bl	SupperBlkListInit
+	bl	FtlPowerLostRecovery
+	mov	w0, 1
+	bl	FtlUpdateVaildLpn
+	adrp	x0, .LANCHOR33
+	ldrh	w2, [x0, #:lo12:.LANCHOR33]
+	adrp	x0, .LANCHOR55
+	ldr	x1, [x0, #:lo12:.LANCHOR55]
+	mov	w0, 0
+	add	x1, x1, 4
+.L1440:
+	cmp	w0, w2
+	bge	.L1445
+	ldr	w3, [x1], 16
+	tbz	w3, #31, .L1441
+.L1445:
+	adrp	x3, .LANCHOR83
+	cmp	w0, w2
+	ldr	w1, [x3, #:lo12:.LANCHOR83]
+	add	w1, w1, 32
+	str	w1, [x3, #:lo12:.LANCHOR83]
+	bge	.L1447
+.L1442:
+	adrp	x23, .LANCHOR51
+	add	x20, x23, :lo12:.LANCHOR51
+	mov	x0, x20
+	adrp	x22, .LANCHOR52
+	bl	FtlSuperblockPowerLostFix
+	add	x19, x22, :lo12:.LANCHOR52
+	mov	x0, x19
+	bl	FtlSuperblockPowerLostFix
+	adrp	x0, .LANCHOR42
+	ldrh	w3, [x20, 4]
+	ldr	x1, [x0, #:lo12:.LANCHOR42]
+	ldrh	w0, [x23, #:lo12:.LANCHOR51]
+	lsl	x0, x0, 1
+	ldrh	w2, [x1, x0]
+	sub	w2, w2, w3
+	adrp	x3, .LANCHOR19
+	strh	w2, [x1, x0]
+	strb	wzr, [x20, 6]
+	ldrh	w0, [x3, #:lo12:.LANCHOR19]
+	strh	w0, [x20, 2]
+	ldrh	w0, [x22, #:lo12:.LANCHOR52]
+	strh	wzr, [x20, 4]
+	ldrh	w4, [x19, 4]
+	lsl	x0, x0, 1
+	ldrh	w2, [x1, x0]
+	sub	w2, w2, w4
+	strh	w2, [x1, x0]
+	strb	wzr, [x19, 6]
+	ldrh	w0, [x3, #:lo12:.LANCHOR19]
+	strh	w0, [x19, 2]
+	adrp	x0, .LANCHOR39
+	add	x0, x0, :lo12:.LANCHOR39
+	strh	wzr, [x19, 4]
+	ldrh	w1, [x0, 30]
+	add	w1, w1, 1
+	strh	w1, [x0, 30]
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+.L1449:
+	bl	FtlVpcTblFlush
+	b	.L1436
+.L1441:
 	add	w0, w0, 1
-	str	w0, [x19, 8]
-	ldrh	w0, [x20, #:lo12:.LANCHOR37]
-	strh	w0, [x19, 4]
-	strh	w1, [x20, #:lo12:.LANCHOR37]
-	bl	FtlBbmTblFlush
-	mov	w0, 0
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 128
-	ret
-	.size	FtlMakeBbt, .-FtlMakeBbt
+	b	.L1440
+.L1447:
+	ldrh	w0, [x19, #:lo12:.LANCHOR156]
+	cbnz	w0, .L1442
+	bl	l2p_flush
+	b	.L1449
+	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.section	.text.ftl_low_format,"ax",@progbits
 	.align	2
 	.global	ftl_low_format
 	.type	ftl_low_format, %function
 ftl_low_format:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR71
+	adrp	x0, .LANCHOR83
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	adrp	x24, .LANCHOR4
-	str	wzr, [x0, #:lo12:.LANCHOR71]
+	str	wzr, [x0, #:lo12:.LANCHOR83]
 	ldrh	w0, [x24, #:lo12:.LANCHOR4]
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR70
+	adrp	x20, .LANCHOR82
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
-	str	wzr, [x20, #:lo12:.LANCHOR70]
+	str	wzr, [x20, #:lo12:.LANCHOR82]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	w0, .L1684
+	cbz	w0, .L1451
 	bl	FtlMakeBbt
-.L1684:
+.L1451:
 	adrp	x23, .LANCHOR12
-	adrp	x0, .LANCHOR118
+	adrp	x0, .LANCHOR109
 	mov	w6, 23752
 	ldrh	w1, [x23, #:lo12:.LANCHOR12]
 	movk	w6, 0xa0f, lsl 16
-	ldr	x4, [x0, #:lo12:.LANCHOR118]
-	adrp	x0, .LANCHOR119
+	ldr	x4, [x0, #:lo12:.LANCHOR109]
+	adrp	x0, .LANCHOR110
 	lsl	w1, w1, 7
-	ldr	x5, [x0, #:lo12:.LANCHOR119]
+	ldr	x5, [x0, #:lo12:.LANCHOR110]
 	mov	w0, 0
-.L1685:
+.L1452:
 	cmp	w0, w1
-	blt	.L1686
+	blt	.L1453
 	adrp	x21, .LANCHOR5
 	adrp	x22, .LANCHOR6
 	add	x26, x22, :lo12:.LANCHOR6
 	mov	w19, 0
 	ldrh	w25, [x21, #:lo12:.LANCHOR5]
-.L1687:
+.L1454:
 	ldrh	w0, [x26]
 	cmp	w0, w25
-	bhi	.L1688
+	bhi	.L1455
 	adrp	x25, .LANCHOR3
 	sub	w1, w19, #2
 	ldrh	w0, [x25, #:lo12:.LANCHOR3]
 	cmp	w1, w0, lsl 1
-	bgt	.L1689
-.L1693:
+	bgt	.L1456
+.L1460:
 	add	x26, x21, :lo12:.LANCHOR5
 	mov	w19, 0
 	mov	w24, 0
-.L1690:
+.L1457:
 	ldrh	w0, [x26]
 	cmp	w0, w24
-	bhi	.L1694
-	adrp	x0, .LANCHOR111
+	bhi	.L1461
+	adrp	x0, .LANCHOR99
 	ldrh	w1, [x22, #:lo12:.LANCHOR6]
 	ldrh	w4, [x25, #:lo12:.LANCHOR3]
-	adrp	x2, .LANCHOR78
-	str	w1, [x0, #:lo12:.LANCHOR111]
+	adrp	x2, .LANCHOR171
+	str	w1, [x0, #:lo12:.LANCHOR99]
 	adrp	x0, .LANCHOR7
-	adrp	x3, .LANCHOR61
+	adrp	x3, .LANCHOR152
 	ldr	w1, [x0, #:lo12:.LANCHOR7]
 	udiv	w5, w1, w4
 	ubfx	x0, x5, 5, 16
-	str	w5, [x3, #:lo12:.LANCHOR61]
+	str	w5, [x3, #:lo12:.LANCHOR152]
 	add	w6, w0, 36
-	strh	w6, [x2, #:lo12:.LANCHOR78]
+	strh	w6, [x2, #:lo12:.LANCHOR171]
 	mov	w6, 24
 	mul	w6, w4, w6
 	cmp	w19, w6
-	ble	.L1695
+	ble	.L1462
 	sub	w1, w1, w19
 	udiv	w1, w1, w4
-	str	w1, [x3, #:lo12:.LANCHOR61]
+	str	w1, [x3, #:lo12:.LANCHOR152]
 	lsr	w1, w1, 5
 	add	w1, w1, 24
-	strh	w1, [x2, #:lo12:.LANCHOR78]
-.L1695:
+	strh	w1, [x2, #:lo12:.LANCHOR171]
+.L1462:
 	adrp	x1, .LANCHOR15
 	ldrh	w1, [x1, #:lo12:.LANCHOR15]
-	cbz	w1, .L1697
-	ldrh	w6, [x2, #:lo12:.LANCHOR78]
+	cbz	w1, .L1464
+	ldrh	w6, [x2, #:lo12:.LANCHOR171]
 	add	w6, w6, w1, lsr 1
-	strh	w6, [x2, #:lo12:.LANCHOR78]
+	strh	w6, [x2, #:lo12:.LANCHOR171]
 	mul	w6, w1, w4
 	cmp	w19, w6
-	bge	.L1697
+	bge	.L1464
 	add	w1, w1, 32
-	str	w5, [x3, #:lo12:.LANCHOR61]
+	str	w5, [x3, #:lo12:.LANCHOR152]
 	add	w1, w0, w1
-	strh	w1, [x2, #:lo12:.LANCHOR78]
-.L1697:
-	ldrh	w1, [x2, #:lo12:.LANCHOR78]
-	adrp	x25, .LANCHOR152
-	ldr	w0, [x3, #:lo12:.LANCHOR61]
+	strh	w1, [x2, #:lo12:.LANCHOR171]
+.L1464:
+	ldrh	w1, [x2, #:lo12:.LANCHOR171]
+	adrp	x25, .LANCHOR179
+	ldr	w0, [x3, #:lo12:.LANCHOR152]
 	adrp	x24, .LANCHOR42
 	sub	w0, w0, w1
 	adrp	x1, .LANCHOR19
 	ldrh	w1, [x1, #:lo12:.LANCHOR19]
 	mul	w0, w0, w4
-	str	w0, [x25, #:lo12:.LANCHOR152]
+	str	w0, [x25, #:lo12:.LANCHOR179]
 	mul	w0, w1, w0
 	ldrh	w1, [x23, #:lo12:.LANCHOR12]
-	str	w0, [x3, #:lo12:.LANCHOR61]
+	str	w0, [x3, #:lo12:.LANCHOR152]
 	mov	w23, -1
 	mul	w0, w1, w0
 	adrp	x1, .LANCHOR34
@@ -12420,11 +10941,11 @@ ftl_low_format:
 	lsl	w2, w2, 1
 	bl	ftl_memset
 	adrp	x0, .LANCHOR59
-	adrp	x1, .LANCHOR80
+	adrp	x1, .LANCHOR144
 	ldrh	w2, [x21, #:lo12:.LANCHOR5]
 	str	wzr, [x0, #:lo12:.LANCHOR59]
-	add	x0, x1, :lo12:.LANCHOR80
-	strh	w23, [x1, #:lo12:.LANCHOR80]
+	add	x0, x1, :lo12:.LANCHOR144
+	strh	w23, [x1, #:lo12:.LANCHOR144]
 	mov	w1, 255
 	lsr	w2, w2, 3
 	strh	wzr, [x0, 2]
@@ -12440,20 +10961,20 @@ ftl_low_format:
 	ldr	x0, [x0, #:lo12:.LANCHOR1]
 	strb	wzr, [x19, 6]
 	bl	ftl_memset
-.L1699:
+.L1466:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1700
+	cbnz	w1, .L1467
 	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L1699
-.L1686:
+	b	.L1466
+.L1453:
 	ubfiz	x3, x0, 2, 16
 	mvn	w2, w0
 	orr	w2, w0, w2, lsl 16
@@ -12461,8 +10982,8 @@ ftl_low_format:
 	and	w0, w0, 65535
 	str	w2, [x4, x3]
 	str	w6, [x5, x3]
-	b	.L1685
-.L1688:
+	b	.L1452
+.L1455:
 	mov	w0, w25
 	mov	w1, 1
 	add	w25, w25, 1
@@ -12470,8 +10991,8 @@ ftl_low_format:
 	add	w19, w19, w0
 	and	w25, w25, 65535
 	and	w19, w19, 65535
-	b	.L1687
-.L1689:
+	b	.L1454
+.L1456:
 	udiv	w0, w19, w0
 	adrp	x1, .LANCHOR31
 	ldr	w19, [x1, #:lo12:.LANCHOR31]
@@ -12481,17 +11002,17 @@ ftl_low_format:
 	add	x24, x22, :lo12:.LANCHOR6
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	w19, [x21, #:lo12:.LANCHOR5]
-.L1691:
+.L1458:
 	ldrh	w0, [x24]
 	cmp	w0, w19
-	bls	.L1693
+	bls	.L1460
 	mov	w0, w19
 	add	w19, w19, 1
 	mov	w1, 1
 	and	w19, w19, 65535
 	bl	FtlLowFormatEraseBlock
-	b	.L1691
-.L1694:
+	b	.L1458
+.L1461:
 	mov	w0, w24
 	mov	w1, 0
 	add	w24, w24, 1
@@ -12499,14 +11020,14 @@ ftl_low_format:
 	add	w19, w19, w0
 	and	w24, w24, 65535
 	and	w19, w19, 65535
-	b	.L1690
-.L1700:
-	ldr	w1, [x20, #:lo12:.LANCHOR70]
+	b	.L1457
+.L1467:
+	ldr	w1, [x20, #:lo12:.LANCHOR82]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
 	mov	w23, -1
 	add	w1, w1, 1
-	str	w1, [x20, #:lo12:.LANCHOR70]
+	str	w1, [x20, #:lo12:.LANCHOR82]
 	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ldrh	w2, [x19, 4]
 	strh	w2, [x1, x0]
@@ -12520,25 +11041,25 @@ ftl_low_format:
 	mov	w1, 1
 	strb	wzr, [x0, 6]
 	strb	w1, [x0, 8]
-.L1701:
+.L1468:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1702
+	cbnz	w1, .L1469
 	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L1701
-.L1702:
-	ldr	w1, [x20, #:lo12:.LANCHOR70]
+	b	.L1468
+.L1469:
+	ldr	w1, [x20, #:lo12:.LANCHOR82]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
 	add	w1, w1, 1
-	str	w1, [x20, #:lo12:.LANCHOR70]
+	str	w1, [x20, #:lo12:.LANCHOR82]
 	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ldrh	w2, [x19, 4]
 	mov	w19, -1
@@ -12546,24 +11067,24 @@ ftl_low_format:
 	adrp	x0, .LANCHOR53
 	strh	w19, [x0, #:lo12:.LANCHOR53]
 	bl	FtlFreeSysBlkQueueOut
-	adrp	x2, .LANCHOR79
-	add	x1, x2, :lo12:.LANCHOR79
-	strh	w0, [x2, #:lo12:.LANCHOR79]
-	ldr	w0, [x25, #:lo12:.LANCHOR152]
+	adrp	x2, .LANCHOR139
+	add	x1, x2, :lo12:.LANCHOR139
+	strh	w0, [x2, #:lo12:.LANCHOR139]
+	ldr	w0, [x25, #:lo12:.LANCHOR179]
 	strh	w0, [x1, 6]
-	ldr	w0, [x20, #:lo12:.LANCHOR70]
+	ldr	w0, [x20, #:lo12:.LANCHOR82]
 	str	w0, [x1, 8]
 	add	w0, w0, 1
 	strh	wzr, [x1, 2]
 	strh	w19, [x1, 4]
-	str	w0, [x20, #:lo12:.LANCHOR70]
+	str	w0, [x20, #:lo12:.LANCHOR82]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	w0, .L1703
-	adrp	x0, .LANCHOR86
+	cbnz	w0, .L1470
+	adrp	x0, .LANCHOR166
 	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR86]
-.L1703:
+	str	w1, [x0, #:lo12:.LANCHOR166]
+.L1470:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -12572,14 +11093,64 @@ ftl_low_format:
 	ldp	x29, x30, [sp], 80
 	ret
 	.size	ftl_low_format, .-ftl_low_format
-	.section	.text.ftl_memcmp,"ax",@progbits
+	.section	.text.sftl_init,"ax",@progbits
 	.align	2
-	.global	ftl_memcmp
-	.type	ftl_memcmp, %function
-ftl_memcmp:
-	uxtw	x2, w2
-	b	memcmp
-	.size	ftl_memcmp, .-ftl_memcmp
+	.global	sftl_init
+	.type	sftl_init, %function
+sftl_init:
+	stp	x29, x30, [sp, -32]!
+	adrp	x1, .LC41
+	add	x1, x1, :lo12:.LC41
+	mov	w0, -1
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR166
+	adrp	x19, .LANCHOR181
+	add	x19, x19, :lo12:.LANCHOR181
+	str	w0, [x20, #:lo12:.LANCHOR166]
+	adrp	x0, .LC34
+	add	x0, x0, :lo12:.LC34
+	bl	printf
+	adrp	x0, .LANCHOR0
+	add	x0, x0, :lo12:.LANCHOR0
+	bl	FtlConstantsInit
+	bl	FtlMemInit
+	bl	FtlVariablesInit
+	adrp	x0, .LANCHOR4
+	ldrh	w0, [x0, #:lo12:.LANCHOR4]
+	bl	FtlFreeSysBlkQueueInit
+.L1476:
+	bl	FtlLoadBbt
+	cbz	w0, .L1477
+.L1492:
+	ldr	w0, [x19]
+	cmp	w0, 1
+	bne	.L1476
+	str	wzr, [x19]
+	bl	ftl_low_format
+	b	.L1476
+.L1477:
+	bl	FtlSysBlkInit
+	cbnz	w0, .L1492
+	mov	w0, 1
+	str	w0, [x20, #:lo12:.LANCHOR166]
+	adrp	x0, .LANCHOR48
+	ldrh	w0, [x0, #:lo12:.LANCHOR48]
+	cmp	w0, 15
+	bhi	.L1489
+	mov	w19, 8129
+.L1483:
+	mov	w1, 1
+	mov	w0, 0
+	bl	rk_ftl_garbage_collect
+	subs	w19, w19, #1
+	bne	.L1483
+.L1489:
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	sftl_init, .-sftl_init
 	.section	.text.FtlWriteToIDB,"ax",@progbits
 	.align	2
 	.global	FtlWriteToIDB
@@ -12594,27 +11165,27 @@ FtlWriteToIDB:
 	stp	x19, x20, [sp, 16]
 	cmp	w25, 63
 	stp	x21, x22, [sp, 32]
-	adrp	x24, .LANCHOR184
+	adrp	x24, .LANCHOR182
 	stp	x27, x28, [sp, 80]
-	bls	.L1710
+	bls	.L1494
 	mov	w19, w0
 	cmp	w0, 575
-	bls	.L1711
-.L1710:
-	ldr	w0, [x24, #:lo12:.LANCHOR184]
-	cbnz	w0, .L1712
-.L1779:
+	bls	.L1495
+.L1494:
+	ldr	w0, [x24, #:lo12:.LANCHOR182]
+	cbnz	w0, .L1496
+.L1561:
 	mov	w19, 0
-	b	.L1709
-.L1712:
-	adrp	x0, .LANCHOR185
+	b	.L1493
+.L1496:
+	adrp	x0, .LANCHOR183
 	str	x0, [x29, 120]
 	mov	w1, 35899
-	ldr	x23, [x0, #:lo12:.LANCHOR185]
+	ldr	x23, [x0, #:lo12:.LANCHOR183]
 	movk	w1, 0xfcdc, lsl 16
 	ldr	w2, [x23]
 	cmp	w2, w1
-	bne	.L1714
+	bne	.L1498
 	adrp	x21, .LANCHOR0
 	add	x0, x21, :lo12:.LANCHOR0
 	mov	w19, 65535
@@ -12623,9 +11194,9 @@ FtlWriteToIDB:
 	mov	x0, 262140
 	add	x2, x23, x0
 	mov	w0, 0
-.L1718:
+.L1502:
 	ldr	w4, [x2]
-	cbnz	w4, .L1715
+	cbnz	w4, .L1499
 	ldr	w4, [x23, w0, uxtw 2]
 	add	w0, w0, 1
 	str	w4, [x2], -4
@@ -12633,13 +11204,13 @@ FtlWriteToIDB:
 	sub	w19, w19, #1
 	csel	w0, w0, wzr, cc
 	cmp	w19, 4096
-	bne	.L1718
+	bne	.L1502
 	mov	w19, 512
-	b	.L1717
-.L1715:
+	b	.L1501
+.L1499:
 	add	w19, w19, 127
 	lsr	w19, w19, 7
-.L1717:
+.L1501:
 	add	w0, w19, 4
 	ubfiz	w1, w1, 2, 14
 	mov	w22, 0
@@ -12648,79 +11219,67 @@ FtlWriteToIDB:
 	stp	wzr, w0, [x29, 152]
 	lsl	w0, w19, 7
 	str	w0, [x29, 136]
-	adrp	x0, .LANCHOR105
-	add	x20, x0, :lo12:.LANCHOR105
-.L1741:
-	adrp	x26, .LANCHOR186
+	adrp	x0, .LANCHOR78
+	add	x20, x0, :lo12:.LANCHOR78
+.L1524:
+	adrp	x26, .LANCHOR184
 	mov	w1, 0
 	mov	x2, 512
-	ldr	x0, [x26, #:lo12:.LANCHOR186]
+	ldr	x0, [x26, #:lo12:.LANCHOR184]
 	bl	memset
 	str	x26, [x29, 144]
 	add	x0, x21, :lo12:.LANCHOR0
 	ldrh	w27, [x0, 10]
-	adrp	x0, .LANCHOR105
-	add	x0, x0, :lo12:.LANCHOR105
+	adrp	x0, .LANCHOR78
+	add	x0, x0, :lo12:.LANCHOR78
 	ldr	x1, [x0, 32]
 	mul	w25, w27, w22
-	cbz	x1, .L1749
+	cbz	x1, .L1532
 	ldr	x0, [x0, 40]
 	mov	w26, 6
 	cmp	x0, 0
 	mov	w0, 9
 	csel	w26, w26, w0, eq
-.L1719:
+.L1503:
 	ldr	x2, [x20, 8]
 	mov	w1, w25
 	mov	w0, 0
 	blr	x2
 	ldr	w0, [x29, 156]
 	cmp	w0, 1
-	beq	.L1720
+	beq	.L1504
 	ldr	x2, [x20, 8]
 	add	w1, w27, w25
 	mov	w0, 0
 	blr	x2
-.L1720:
+.L1504:
 	cmp	w26, 9
-	bne	.L1751
+	bne	.L1534
 	ldr	x0, [x29, 144]
 	mov	w2, 1024
 	mov	w1, 0
-	ldr	x28, [x0, #:lo12:.LANCHOR186]
+	ldr	x28, [x0, #:lo12:.LANCHOR184]
 	mov	x0, x28
 	bl	ftl_memset
 	mov	w0, 18766
-	add	x5, x28, 12
+	mov	w1, 12
 	movk	w0, 0x464e, lsl 16
-	str	w0, [x28]
-	mov	w0, 12
-	str	w0, [x28, 4]
+	stp	w0, w1, [x28]
 	mov	w0, 4
 	strb	w0, [x28, 17]
 	add	x0, x21, :lo12:.LANCHOR0
 	strb	wzr, [x28, 16]
 	strb	wzr, [x28, 20]
-	mov	x2, 0
 	strh	wzr, [x28, 22]
 	ldrh	w0, [x0, 10]
 	strh	w0, [x28, 18]
+	str	wzr, [x28, 12]
 	mov	w0, 16
 	strb	w0, [x28, 21]
-	mov	w0, 42982
-	str	wzr, [x28, 12]
-	movk	w0, 0x47c6, lsl 16
-.L1722:
-	lsr	w1, w0, 2
-	ldrb	w3, [x5, x2]
-	add	w1, w1, w0, lsl 5
-	add	x2, x2, 1
-	add	w1, w1, w3
-	cmp	x2, 12
-	eor	w0, w0, w1
-	bne	.L1722
+	add	x0, x28, 12
+	bl	js_hash
 	str	w0, [x28, 8]
-.L1721:
+.L1505:
 	ldr	w0, [x29, 156]
 	mov	x6, x23
 	mul	w0, w0, w27
@@ -12728,22 +11287,22 @@ FtlWriteToIDB:
 	str	w0, [x29, 140]
 	add	w0, w25, 1
 	str	w0, [x29, 132]
-.L1723:
+.L1506:
 	ldr	w0, [x29, 140]
 	mov	w1, w27
 	cmp	w27, w0
-	bcs	.L1730
+	bcs	.L1513
 	cmp	w26, 9
-	bne	.L1724
+	bne	.L1507
 	ldr	w0, [x29, 132]
 	add	w0, w0, w1
-.L1778:
+.L1560:
 	str	w0, [x29, 160]
 	mov	w0, 61424
 	str	w0, [x29, 164]
 	cmp	w1, 0
 	ccmp	w26, 9, 0, eq
-	bne	.L1726
+	bne	.L1509
 	ldr	x1, [x20, 32]
 	mov	w0, 70
 	str	x6, [x29, 104]
@@ -12763,31 +11322,31 @@ FtlWriteToIDB:
 	ldr	w1, [x29, 112]
 	ldr	x6, [x29, 104]
 	cmn	w1, #1
-	bne	.L1727
-.L1730:
+	bne	.L1510
+.L1513:
 	ldr	x0, [x29, 144]
-	ldr	x26, [x0, #:lo12:.LANCHOR186]
+	ldr	x26, [x0, #:lo12:.LANCHOR184]
 	add	x0, x21, :lo12:.LANCHOR0
 	ldrb	w28, [x0, 14]
 	ldrh	w0, [x0, 10]
 	mul	w1, w0, w22
 	str	w1, [x29, 140]
 	ldr	x1, [x20, 32]
-	cbnz	x1, .L1728
+	cbnz	x1, .L1511
 	mov	w25, 6
-.L1729:
+.L1512:
 	ldr	w1, [x29, 156]
 	mov	x27, 0
 	mul	w0, w1, w0
 	str	w0, [x29, 132]
-.L1732:
+.L1515:
 	ldr	w0, [x29, 132]
 	mov	w1, w27
-	cmp	w0, w27
-	bls	.L1736
+	cmp	w27, w0
+	bcs	.L1519
 	cmp	w27, 0
 	ccmp	w25, 9, 0, eq
-	bne	.L1733
+	bne	.L1516
 	ldr	x1, [x20, 32]
 	mov	w0, 70
 	blr	x1
@@ -12811,34 +11370,34 @@ FtlWriteToIDB:
 	mov	w1, 18766
 	movk	w1, 0x464e, lsl 16
 	cmp	w0, w1
-	beq	.L1734
-.L1736:
+	beq	.L1517
+.L1519:
 	ldr	x0, [x29, 144]
 	mov	x2, x23
 	mov	x1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR186]
-.L1735:
+	ldr	x0, [x0, #:lo12:.LANCHOR184]
+.L1518:
 	ldr	w3, [x29, 136]
 	mov	w26, w1
 	cmp	w1, w3
-	bcc	.L1739
+	bcc	.L1522
 	ldr	w0, [x29, 152]
 	add	w0, w0, 1
 	str	w0, [x29, 152]
 	cmp	w0, 5
-	bls	.L1738
-	b	.L1742
-.L1749:
+	bls	.L1521
+	b	.L1525
+.L1532:
 	mov	w26, 6
-	b	.L1719
-.L1751:
+	b	.L1503
+.L1534:
 	mov	x28, 0
-	b	.L1721
-.L1724:
+	b	.L1505
+.L1507:
 	add	w0, w1, w25
 	lsl	w0, w0, 2
-	b	.L1778
-.L1726:
+	b	.L1560
+.L1509:
 	ldr	x7, [x20, 16]
 	add	x3, x29, 160
 	mov	x2, x6
@@ -12847,38 +11406,38 @@ FtlWriteToIDB:
 	str	x6, [x29, 112]
 	blr	x7
 	cmn	w0, #1
-	beq	.L1730
+	beq	.L1513
 	ldr	x6, [x29, 112]
 	add	x6, x6, 2048
-.L1727:
+.L1510:
 	add	x27, x27, 1
-	b	.L1723
-.L1728:
+	b	.L1506
+.L1511:
 	ldr	x1, [x20, 40]
 	mov	w25, 6
 	cmp	x1, 0
 	mov	w1, 9
 	csel	w25, w25, w1, eq
-	b	.L1729
-.L1733:
+	b	.L1512
+.L1516:
 	ldr	x6, [x20, 24]
 	add	x3, x29, 160
 	ldr	w0, [x29, 140]
 	mov	x2, x26
-	add	w1, w0, w1
+	add	w1, w1, w0
 	mov	w0, 0
 	blr	x6
 	cmn	w0, #1
-	beq	.L1736
+	beq	.L1519
 	ldr	w0, [x29, 164]
 	mov	w1, 61424
 	cmp	w0, w1
-	bne	.L1736
+	bne	.L1519
 	add	x26, x26, 2048
-.L1734:
+.L1517:
 	add	x27, x27, 1
-	b	.L1732
-.L1739:
+	b	.L1515
+.L1522:
 	mov	x25, x2
 	ldr	w4, [x0, x1, lsl 2]
 	lsl	x27, x1, 2
@@ -12886,7 +11445,7 @@ FtlWriteToIDB:
 	add	x1, x1, 1
 	ldr	w3, [x25]
 	cmp	w4, w3
-	beq	.L1735
+	beq	.L1518
 	mov	x2, 512
 	mov	w1, 0
 	bl	memset
@@ -12894,10 +11453,10 @@ FtlWriteToIDB:
 	mov	w1, w22
 	ldr	w3, [x25]
 	mov	w4, w26
-	ldr	x0, [x0, #:lo12:.LANCHOR186]
+	ldr	x0, [x0, #:lo12:.LANCHOR184]
 	ldr	w2, [x0, x27]
-	adrp	x0, .LC114
-	add	x0, x0, :lo12:.LC114
+	adrp	x0, .LC42
+	add	x0, x0, :lo12:.LC42
 	bl	printf
 	add	x0, x21, :lo12:.LANCHOR0
 	ldr	x2, [x20, 8]
@@ -12905,24 +11464,24 @@ FtlWriteToIDB:
 	mov	w0, 0
 	mul	w1, w1, w22
 	blr	x2
-.L1738:
+.L1521:
 	ldr	w0, [x29, 156]
 	add	w22, w22, w0
 	cmp	w22, 15
-	bls	.L1741
+	bls	.L1524
 	ldr	w0, [x29, 152]
-	cbnz	w0, .L1742
-.L1714:
+	cbnz	w0, .L1525
+.L1498:
 	mov	w19, -1
-.L1742:
+.L1525:
 	ldr	x0, [x29, 120]
-	str	wzr, [x24, #:lo12:.LANCHOR184]
-	ldr	x0, [x0, #:lo12:.LANCHOR185]
+	str	wzr, [x24, #:lo12:.LANCHOR182]
+	ldr	x0, [x0, #:lo12:.LANCHOR183]
 	bl	free
-	adrp	x0, .LANCHOR186
-	ldr	x0, [x0, #:lo12:.LANCHOR186]
+	adrp	x0, .LANCHOR184
+	ldr	x0, [x0, #:lo12:.LANCHOR184]
 	bl	free
-.L1709:
+.L1493:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -12931,70 +11490,70 @@ FtlWriteToIDB:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 224
 	ret
-.L1711:
+.L1495:
 	mov	w21, w1
 	mov	x22, x2
 	cmp	w0, 64
-	bne	.L1743
-	adrp	x20, .LANCHOR185
+	bne	.L1526
+	adrp	x20, .LANCHOR183
 	mov	w0, 262144
 	bl	ftl_malloc
-	str	x0, [x20, #:lo12:.LANCHOR185]
+	str	x0, [x20, #:lo12:.LANCHOR183]
 	mov	w0, 262144
 	bl	ftl_malloc
 	mov	x1, x0
-	adrp	x0, .LANCHOR186
-	str	x1, [x0, #:lo12:.LANCHOR186]
-	ldr	x0, [x20, #:lo12:.LANCHOR185]
-	cbz	x0, .L1744
-	cbz	x1, .L1744
+	adrp	x0, .LANCHOR184
+	str	x1, [x0, #:lo12:.LANCHOR184]
+	ldr	x0, [x20, #:lo12:.LANCHOR183]
+	cbz	x0, .L1527
+	cbz	x1, .L1527
 	mov	w1, 1
 	mov	w2, 262144
-	str	w1, [x24, #:lo12:.LANCHOR184]
+	str	w1, [x24, #:lo12:.LANCHOR182]
 	mov	w1, 0
 	bl	ftl_memset
-.L1743:
-	ldr	w0, [x24, #:lo12:.LANCHOR184]
-	cbz	w0, .L1779
-	adrp	x0, .LANCHOR185
+.L1526:
+	ldr	w0, [x24, #:lo12:.LANCHOR182]
+	cbz	w0, .L1561
+	adrp	x0, .LANCHOR183
 	cmp	w19, 63
-	ldr	x1, [x0, #:lo12:.LANCHOR185]
-	bhi	.L1746
+	ldr	x1, [x0, #:lo12:.LANCHOR183]
+	bhi	.L1529
 	mov	w0, 64
 	sub	w19, w0, w19
 	sub	w21, w21, w19
 	ubfiz	x19, x19, 9, 25
 	add	x22, x22, x19
 	mov	x20, x1
-.L1747:
+.L1530:
 	cmp	w25, 575
-	bls	.L1748
+	bls	.L1531
 	sub	w21, w21, w23
 	sub	w21, w21, #446
-.L1748:
+.L1531:
 	mov	w4, w21
 	mov	x3, x20
 	mov	w2, 262144
-	adrp	x0, .LC116
-	add	x0, x0, :lo12:.LC116
+	adrp	x0, .LC44
+	add	x0, x0, :lo12:.LC44
 	bl	printf
 	lsl	w2, w21, 9
 	mov	x1, x22
 	mov	x0, x20
 	bl	ftl_memcpy
-	b	.L1779
-.L1744:
-	adrp	x1, .LANCHOR187
-	adrp	x0, .LC115
-	add	x1, x1, :lo12:.LANCHOR187
-	add	x0, x0, :lo12:.LC115
+	b	.L1561
+.L1527:
+	adrp	x1, .LANCHOR185
+	adrp	x0, .LC43
+	add	x1, x1, :lo12:.LANCHOR185
+	add	x0, x0, :lo12:.LC43
 	bl	printf
-	b	.L1743
-.L1746:
+	b	.L1526
+.L1529:
 	lsl	w20, w19, 7
 	sub	w20, w20, #8192
 	add	x20, x1, x20, lsl 2
-	b	.L1747
+	b	.L1530
 	.size	FtlWriteToIDB, .-FtlWriteToIDB
 	.section	.text.sftl_write,"ax",@progbits
 	.align	2
@@ -13025,6 +11584,7 @@ sftl_write:
 	.global	FtlUpdateVaildLpnCount
 	.global	g_ect_tbl_power_up_flush
 	.global	power_up_flag
+	.global	low_format_en
 	.global	gFtlInitStatus
 	.global	DeviceCapacity
 	.global	g_power_lost_recovery_flag
@@ -13183,7 +11743,7 @@ FtlUpdateVaildLpnCount:
 	.zero	2
 	.section	.bss.c_ftl_nand_bbm_buf_size,"aw",@nobits
 	.align	1
-	.set	.LANCHOR137,. + 0
+	.set	.LANCHOR127,. + 0
 	.type	c_ftl_nand_bbm_buf_size, %object
 	.size	c_ftl_nand_bbm_buf_size, 2
 c_ftl_nand_bbm_buf_size:
@@ -13232,7 +11792,7 @@ c_ftl_nand_data_blks_per_plane:
 	.zero	2
 	.section	.bss.c_ftl_nand_data_op_blks_per_plane,"aw",@nobits
 	.align	1
-	.set	.LANCHOR78,. + 0
+	.set	.LANCHOR171,. + 0
 	.type	c_ftl_nand_data_op_blks_per_plane, %object
 	.size	c_ftl_nand_data_op_blks_per_plane, 2
 c_ftl_nand_data_op_blks_per_plane:
@@ -13400,7 +11960,7 @@ c_ftl_vendor_part_size:
 	.zero	2
 	.section	.bss.c_gc_page_buf_num,"aw",@nobits
 	.align	2
-	.set	.LANCHOR94,. + 0
+	.set	.LANCHOR67,. + 0
 	.type	c_gc_page_buf_num, %object
 	.size	c_gc_page_buf_num, 4
 c_gc_page_buf_num:
@@ -13420,7 +11980,7 @@ check_vpc_table:
 	.zero	16384
 	.section	.bss.ftl_gc_temp_power_lost_recovery_flag,"aw",@nobits
 	.align	2
-	.set	.LANCHOR144,. + 0
+	.set	.LANCHOR133,. + 0
 	.type	ftl_gc_temp_power_lost_recovery_flag, %object
 	.size	ftl_gc_temp_power_lost_recovery_flag, 4
 ftl_gc_temp_power_lost_recovery_flag:
@@ -13434,7 +11994,7 @@ gBbtInfo:
 	.zero	96
 	.section	.bss.gL2pMapInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR140,. + 0
+	.set	.LANCHOR129,. + 0
 	.type	gL2pMapInfo, %object
 	.size	gL2pMapInfo, 64
 gL2pMapInfo:
@@ -13448,28 +12008,28 @@ gSysFreeQueue:
 	.zero	2056
 	.section	.bss.gSysInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR79,. + 0
+	.set	.LANCHOR139,. + 0
 	.type	gSysInfo, %object
-	.size	gSysInfo, 12
+	.size	gSysInfo, 16
 gSysInfo:
-	.zero	12
+	.zero	16
 	.section	.bss.gVendorBlkInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR158,. + 0
+	.set	.LANCHOR161,. + 0
 	.type	gVendorBlkInfo, %object
 	.size	gVendorBlkInfo, 64
 gVendorBlkInfo:
 	.zero	64
 	.section	.bss.g_GlobalDataVersion,"aw",@nobits
 	.align	2
-	.set	.LANCHOR71,. + 0
+	.set	.LANCHOR83,. + 0
 	.type	g_GlobalDataVersion, %object
 	.size	g_GlobalDataVersion, 4
 g_GlobalDataVersion:
 	.zero	4
 	.section	.bss.g_GlobalSysVersion,"aw",@nobits
 	.align	2
-	.set	.LANCHOR70,. + 0
+	.set	.LANCHOR82,. + 0
 	.type	g_GlobalSysVersion, %object
 	.size	g_GlobalSysVersion, 4
 g_GlobalSysVersion:
@@ -13483,14 +12043,14 @@ g_MaxLbaSector:
 	.zero	4
 	.section	.bss.g_MaxLbn,"aw",@nobits
 	.align	2
-	.set	.LANCHOR152,. + 0
+	.set	.LANCHOR179,. + 0
 	.type	g_MaxLbn, %object
 	.size	g_MaxLbn, 4
 g_MaxLbn:
 	.zero	4
 	.section	.bss.g_MaxLpn,"aw",@nobits
 	.align	2
-	.set	.LANCHOR61,. + 0
+	.set	.LANCHOR152,. + 0
 	.type	g_MaxLpn, %object
 	.size	g_MaxLpn, 4
 g_MaxLpn:
@@ -13518,147 +12078,147 @@ g_buffer_superblock:
 	.zero	48
 	.section	.bss.g_cur_erase_blk,"aw",@nobits
 	.align	2
-	.set	.LANCHOR111,. + 0
+	.set	.LANCHOR99,. + 0
 	.type	g_cur_erase_blk, %object
 	.size	g_cur_erase_blk, 4
 g_cur_erase_blk:
 	.zero	4
 	.section	.bss.g_ect_tbl_info_size,"aw",@nobits
 	.align	1
-	.set	.LANCHOR125,. + 0
+	.set	.LANCHOR116,. + 0
 	.type	g_ect_tbl_info_size, %object
 	.size	g_ect_tbl_info_size, 2
 g_ect_tbl_info_size:
 	.zero	2
 	.section	.bss.g_ect_tbl_power_up_flush,"aw",@nobits
 	.align	1
-	.set	.LANCHOR170,. + 0
+	.set	.LANCHOR164,. + 0
 	.type	g_ect_tbl_power_up_flush, %object
 	.size	g_ect_tbl_power_up_flush, 2
 g_ect_tbl_power_up_flush:
 	.zero	2
 	.section	.bss.g_ftl_nand_free_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR181,. + 0
+	.set	.LANCHOR176,. + 0
 	.type	g_ftl_nand_free_count, %object
 	.size	g_ftl_nand_free_count, 4
 g_ftl_nand_free_count:
 	.zero	4
 	.section	.bss.g_gc_bad_block_gc_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR103,. + 0
+	.set	.LANCHOR76,. + 0
 	.type	g_gc_bad_block_gc_index, %object
 	.size	g_gc_bad_block_gc_index, 2
 g_gc_bad_block_gc_index:
 	.zero	2
 	.section	.bss.g_gc_bad_block_temp_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR101,. + 0
+	.set	.LANCHOR74,. + 0
 	.type	g_gc_bad_block_temp_num, %object
 	.size	g_gc_bad_block_temp_num, 2
 g_gc_bad_block_temp_num:
 	.zero	2
 	.section	.bss.g_gc_bad_block_temp_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR102,. + 0
+	.set	.LANCHOR75,. + 0
 	.type	g_gc_bad_block_temp_tbl, %object
 	.size	g_gc_bad_block_temp_tbl, 34
 g_gc_bad_block_temp_tbl:
 	.zero	34
 	.section	.bss.g_gc_blk_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR85,. + 0
+	.set	.LANCHOR102,. + 0
 	.type	g_gc_blk_index, %object
 	.size	g_gc_blk_index, 2
 g_gc_blk_index:
 	.zero	2
 	.section	.bss.g_gc_blk_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR95,. + 0
+	.set	.LANCHOR68,. + 0
 	.type	g_gc_blk_num, %object
 	.size	g_gc_blk_num, 2
 g_gc_blk_num:
 	.zero	2
 	.section	.bss.g_gc_cur_blk_max_valid_pages,"aw",@nobits
 	.align	1
-	.set	.LANCHOR179,. + 0
+	.set	.LANCHOR174,. + 0
 	.type	g_gc_cur_blk_max_valid_pages, %object
 	.size	g_gc_cur_blk_max_valid_pages, 2
 g_gc_cur_blk_max_valid_pages:
 	.zero	2
 	.section	.bss.g_gc_cur_blk_valid_pages,"aw",@nobits
 	.align	1
-	.set	.LANCHOR178,. + 0
+	.set	.LANCHOR173,. + 0
 	.type	g_gc_cur_blk_valid_pages, %object
 	.size	g_gc_cur_blk_valid_pages, 2
 g_gc_cur_blk_valid_pages:
 	.zero	2
 	.section	.bss.g_gc_free_blk_threshold,"aw",@nobits
 	.align	1
-	.set	.LANCHOR82,. + 0
+	.set	.LANCHOR100,. + 0
 	.type	g_gc_free_blk_threshold, %object
 	.size	g_gc_free_blk_threshold, 2
 g_gc_free_blk_threshold:
 	.zero	2
 	.section	.bss.g_gc_head_data_block,"aw",@nobits
 	.align	2
-	.set	.LANCHOR109,. + 0
+	.set	.LANCHOR96,. + 0
 	.type	g_gc_head_data_block, %object
 	.size	g_gc_head_data_block, 4
 g_gc_head_data_block:
 	.zero	4
 	.section	.bss.g_gc_head_data_block_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR110,. + 0
+	.set	.LANCHOR97,. + 0
 	.type	g_gc_head_data_block_count, %object
 	.size	g_gc_head_data_block_count, 4
 g_gc_head_data_block_count:
 	.zero	4
 	.section	.bss.g_gc_merge_free_blk_threshold,"aw",@nobits
 	.align	1
-	.set	.LANCHOR83,. + 0
+	.set	.LANCHOR101,. + 0
 	.type	g_gc_merge_free_blk_threshold, %object
 	.size	g_gc_merge_free_blk_threshold, 2
 g_gc_merge_free_blk_threshold:
 	.zero	2
 	.section	.bss.g_gc_next_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR99,. + 0
+	.set	.LANCHOR72,. + 0
 	.type	g_gc_next_blk, %object
 	.size	g_gc_next_blk, 2
 g_gc_next_blk:
 	.zero	2
 	.section	.bss.g_gc_next_blk_1,"aw",@nobits
 	.align	1
-	.set	.LANCHOR100,. + 0
+	.set	.LANCHOR73,. + 0
 	.type	g_gc_next_blk_1, %object
 	.size	g_gc_next_blk_1, 2
 g_gc_next_blk_1:
 	.zero	2
 	.section	.bss.g_gc_num_req,"aw",@nobits
 	.align	2
-	.set	.LANCHOR89,. + 0
+	.set	.LANCHOR62,. + 0
 	.type	g_gc_num_req, %object
 	.size	g_gc_num_req, 4
 g_gc_num_req:
 	.zero	4
 	.section	.bss.g_gc_page_offset,"aw",@nobits
 	.align	1
-	.set	.LANCHOR97,. + 0
+	.set	.LANCHOR70,. + 0
 	.type	g_gc_page_offset, %object
 	.size	g_gc_page_offset, 2
 g_gc_page_offset:
 	.zero	2
 	.section	.bss.g_gc_skip_write_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR84,. + 0
+	.set	.LANCHOR98,. + 0
 	.type	g_gc_skip_write_count, %object
 	.size	g_gc_skip_write_count, 4
 g_gc_skip_write_count:
 	.zero	4
 	.section	.bss.g_gc_superblock,"aw",@nobits
 	.align	3
-	.set	.LANCHOR80,. + 0
+	.set	.LANCHOR144,. + 0
 	.type	g_gc_superblock, %object
 	.size	g_gc_superblock, 48
 g_gc_superblock:
@@ -13672,14 +12232,14 @@ g_gc_temp_superblock:
 	.zero	48
 	.section	.bss.g_in_gc_progress,"aw",@nobits
 	.align	2
-	.set	.LANCHOR108,. + 0
+	.set	.LANCHOR94,. + 0
 	.type	g_in_gc_progress, %object
 	.size	g_in_gc_progress, 4
 g_in_gc_progress:
 	.zero	4
 	.section	.bss.g_in_swl_replace,"aw",@nobits
 	.align	2
-	.set	.LANCHOR87,. + 0
+	.set	.LANCHOR95,. + 0
 	.type	g_in_swl_replace, %object
 	.size	g_in_swl_replace, 4
 g_in_swl_replace:
@@ -13693,21 +12253,21 @@ g_l2p_last_update_region_id:
 	.zero	2
 	.section	.bss.g_max_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR76,. + 0
+	.set	.LANCHOR92,. + 0
 	.type	g_max_erase_count, %object
 	.size	g_max_erase_count, 4
 g_max_erase_count:
 	.zero	4
 	.section	.bss.g_min_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR77,. + 0
+	.set	.LANCHOR93,. + 0
 	.type	g_min_erase_count, %object
 	.size	g_min_erase_count, 4
 g_min_erase_count:
 	.zero	4
 	.section	.bss.g_nand_ops,"aw",@nobits
 	.align	3
-	.set	.LANCHOR105,. + 0
+	.set	.LANCHOR78,. + 0
 	.type	g_nand_ops, %object
 	.size	g_nand_ops, 48
 g_nand_ops:
@@ -13735,35 +12295,35 @@ g_num_free_superblocks:
 	.zero	2
 	.section	.bss.g_power_lost_recovery_flag,"aw",@nobits
 	.align	1
-	.set	.LANCHOR167,. + 0
+	.set	.LANCHOR156,. + 0
 	.type	g_power_lost_recovery_flag, %object
 	.size	g_power_lost_recovery_flag, 2
 g_power_lost_recovery_flag:
 	.zero	2
 	.section	.bss.g_recovery_page_min_ver,"aw",@nobits
 	.align	2
-	.set	.LANCHOR145,. + 0
+	.set	.LANCHOR134,. + 0
 	.type	g_recovery_page_min_ver, %object
 	.size	g_recovery_page_min_ver, 4
 g_recovery_page_min_ver:
 	.zero	4
 	.section	.bss.g_recovery_page_num,"aw",@nobits
 	.align	2
-	.set	.LANCHOR168,. + 0
+	.set	.LANCHOR157,. + 0
 	.type	g_recovery_page_num, %object
 	.size	g_recovery_page_num, 4
 g_recovery_page_num:
 	.zero	4
 	.section	.bss.g_recovery_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR169,. + 0
+	.set	.LANCHOR158,. + 0
 	.type	g_recovery_ppa_tbl, %object
 	.size	g_recovery_ppa_tbl, 128
 g_recovery_ppa_tbl:
 	.zero	128
 	.section	.bss.g_sys_ext_data,"aw",@nobits
 	.align	3
-	.set	.LANCHOR81,. + 0
+	.set	.LANCHOR135,. + 0
 	.type	g_sys_ext_data, %object
 	.size	g_sys_ext_data, 512
 g_sys_ext_data:
@@ -13777,91 +12337,91 @@ g_sys_save_data:
 	.zero	48
 	.section	.bss.g_tmp_data_superblock_id,"aw",@nobits
 	.align	1
-	.set	.LANCHOR142,. + 0
+	.set	.LANCHOR131,. + 0
 	.type	g_tmp_data_superblock_id, %object
 	.size	g_tmp_data_superblock_id, 2
 g_tmp_data_superblock_id:
 	.zero	2
 	.section	.bss.g_totle_avg_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR74,. + 0
+	.set	.LANCHOR145,. + 0
 	.type	g_totle_avg_erase_count, %object
 	.size	g_totle_avg_erase_count, 4
 g_totle_avg_erase_count:
 	.zero	4
 	.section	.bss.g_totle_cache_write_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR65,. + 0
+	.set	.LANCHOR87,. + 0
 	.type	g_totle_cache_write_count, %object
 	.size	g_totle_cache_write_count, 4
 g_totle_cache_write_count:
 	.zero	4
 	.section	.bss.g_totle_discard_page_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR63,. + 0
+	.set	.LANCHOR86,. + 0
 	.type	g_totle_discard_page_count, %object
 	.size	g_totle_discard_page_count, 4
 g_totle_discard_page_count:
 	.zero	4
 	.section	.bss.g_totle_gc_page_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR67,. + 0
+	.set	.LANCHOR84,. + 0
 	.type	g_totle_gc_page_count, %object
 	.size	g_totle_gc_page_count, 4
 g_totle_gc_page_count:
 	.zero	4
 	.section	.bss.g_totle_l2p_write_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR66,. + 0
+	.set	.LANCHOR88,. + 0
 	.type	g_totle_l2p_write_count, %object
 	.size	g_totle_l2p_write_count, 4
 g_totle_l2p_write_count:
 	.zero	4
 	.section	.bss.g_totle_map_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR141,. + 0
+	.set	.LANCHOR130,. + 0
 	.type	g_totle_map_block, %object
 	.size	g_totle_map_block, 2
 g_totle_map_block:
 	.zero	2
 	.section	.bss.g_totle_mlc_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR72,. + 0
+	.set	.LANCHOR90,. + 0
 	.type	g_totle_mlc_erase_count, %object
 	.size	g_totle_mlc_erase_count, 4
 g_totle_mlc_erase_count:
 	.zero	4
 	.section	.bss.g_totle_read_page_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR62,. + 0
+	.set	.LANCHOR89,. + 0
 	.type	g_totle_read_page_count, %object
 	.size	g_totle_read_page_count, 4
 g_totle_read_page_count:
 	.zero	4
 	.section	.bss.g_totle_read_sector,"aw",@nobits
 	.align	2
-	.set	.LANCHOR69,. + 0
+	.set	.LANCHOR163,. + 0
 	.type	g_totle_read_sector, %object
 	.size	g_totle_read_sector, 4
 g_totle_read_sector:
 	.zero	4
 	.section	.bss.g_totle_slc_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR73,. + 0
+	.set	.LANCHOR91,. + 0
 	.type	g_totle_slc_erase_count, %object
 	.size	g_totle_slc_erase_count, 4
 g_totle_slc_erase_count:
 	.zero	4
 	.section	.bss.g_totle_swl_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR143,. + 0
+	.set	.LANCHOR132,. + 0
 	.type	g_totle_swl_count, %object
 	.size	g_totle_swl_count, 4
 g_totle_swl_count:
 	.zero	4
 	.section	.bss.g_totle_sys_slc_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR75,. + 0
+	.set	.LANCHOR80,. + 0
 	.type	g_totle_sys_slc_erase_count, %object
 	.size	g_totle_sys_slc_erase_count, 4
 g_totle_sys_slc_erase_count:
@@ -13875,49 +12435,49 @@ g_totle_vendor_block:
 	.zero	2
 	.section	.bss.g_totle_write_page_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR64,. + 0
+	.set	.LANCHOR85,. + 0
 	.type	g_totle_write_page_count, %object
 	.size	g_totle_write_page_count, 4
 g_totle_write_page_count:
 	.zero	4
 	.section	.bss.g_totle_write_sector,"aw",@nobits
 	.align	2
-	.set	.LANCHOR68,. + 0
+	.set	.LANCHOR162,. + 0
 	.type	g_totle_write_sector, %object
 	.size	g_totle_write_sector, 4
 g_totle_write_sector:
 	.zero	4
 	.section	.bss.gc_discard_updated,"aw",@nobits
 	.align	2
-	.set	.LANCHOR172,. + 0
+	.set	.LANCHOR167,. + 0
 	.type	gc_discard_updated, %object
 	.size	gc_discard_updated, 4
 gc_discard_updated:
 	.zero	4
 	.section	.bss.gc_ink_free_return_value,"aw",@nobits
 	.align	1
-	.set	.LANCHOR177,. + 0
+	.set	.LANCHOR172,. + 0
 	.type	gc_ink_free_return_value, %object
 	.size	gc_ink_free_return_value, 2
 gc_ink_free_return_value:
 	.zero	2
 	.section	.bss.gp_ect_tbl_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR127,. + 0
+	.set	.LANCHOR118,. + 0
 	.type	gp_ect_tbl_info, %object
 	.size	gp_ect_tbl_info, 8
 gp_ect_tbl_info:
 	.zero	8
 	.section	.bss.gp_flash_check_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR186,. + 0
+	.set	.LANCHOR184,. + 0
 	.type	gp_flash_check_buf, %object
 	.size	gp_flash_check_buf, 8
 gp_flash_check_buf:
 	.zero	8
 	.section	.bss.gp_gc_page_buf_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR90,. + 0
+	.set	.LANCHOR63,. + 0
 	.type	gp_gc_page_buf_info, %object
 	.size	gp_gc_page_buf_info, 8
 gp_gc_page_buf_info:
@@ -13930,17 +12490,24 @@ gp_last_act_superblock:
 	.zero	8
 	.section	.bss.idb_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR185,. + 0
+	.set	.LANCHOR183,. + 0
 	.type	idb_buf, %object
 	.size	idb_buf, 8
 idb_buf:
 	.zero	8
 	.section	.bss.idb_need_write_back,"aw",@nobits
 	.align	2
-	.set	.LANCHOR184,. + 0
+	.set	.LANCHOR182,. + 0
 	.type	idb_need_write_back, %object
 	.size	idb_need_write_back, 4
 idb_need_write_back:
+	.zero	4
+	.section	.bss.low_format_en,"aw",@nobits
+	.align	2
+	.set	.LANCHOR181,. + 0
+	.type	low_format_en, %object
+	.size	low_format_en, 4
+low_format_en:
 	.zero	4
 	.section	.bss.p_blk_mode_table,"aw",@nobits
 	.align	3
@@ -13986,56 +12553,56 @@ p_free_data_block_list_head:
 	.zero	8
 	.section	.bss.p_gc_blk_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR96,. + 0
+	.set	.LANCHOR69,. + 0
 	.type	p_gc_blk_tbl, %object
 	.size	p_gc_blk_tbl, 8
 p_gc_blk_tbl:
 	.zero	8
 	.section	.bss.p_gc_data_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR91,. + 0
+	.set	.LANCHOR64,. + 0
 	.type	p_gc_data_buf, %object
 	.size	p_gc_data_buf, 8
 p_gc_data_buf:
 	.zero	8
 	.section	.bss.p_gc_page_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR98,. + 0
+	.set	.LANCHOR71,. + 0
 	.type	p_gc_page_info, %object
 	.size	p_gc_page_info, 8
 p_gc_page_info:
 	.zero	8
 	.section	.bss.p_gc_spare_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR92,. + 0
+	.set	.LANCHOR65,. + 0
 	.type	p_gc_spare_buf, %object
 	.size	p_gc_spare_buf, 8
 p_gc_spare_buf:
 	.zero	8
 	.section	.bss.p_io_data_buf_0,"aw",@nobits
 	.align	3
-	.set	.LANCHOR118,. + 0
+	.set	.LANCHOR109,. + 0
 	.type	p_io_data_buf_0, %object
 	.size	p_io_data_buf_0, 8
 p_io_data_buf_0:
 	.zero	8
 	.section	.bss.p_io_data_buf_1,"aw",@nobits
 	.align	3
-	.set	.LANCHOR119,. + 0
+	.set	.LANCHOR110,. + 0
 	.type	p_io_data_buf_1, %object
 	.size	p_io_data_buf_1, 8
 p_io_data_buf_1:
 	.zero	8
 	.section	.bss.p_io_spare_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR124,. + 0
+	.set	.LANCHOR115,. + 0
 	.type	p_io_spare_buf, %object
 	.size	p_io_spare_buf, 8
 p_io_spare_buf:
 	.zero	8
 	.section	.bss.p_l2p_map_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR136,. + 0
+	.set	.LANCHOR126,. + 0
 	.type	p_l2p_map_buf, %object
 	.size	p_l2p_map_buf, 8
 p_l2p_map_buf:
@@ -14049,28 +12616,28 @@ p_l2p_ram_map:
 	.zero	8
 	.section	.bss.p_map_block_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR129,. + 0
+	.set	.LANCHOR119,. + 0
 	.type	p_map_block_table, %object
 	.size	p_map_block_table, 8
 p_map_block_table:
 	.zero	8
 	.section	.bss.p_map_block_valid_page_count,"aw",@nobits
 	.align	3
-	.set	.LANCHOR130,. + 0
+	.set	.LANCHOR120,. + 0
 	.type	p_map_block_valid_page_count, %object
 	.size	p_map_block_valid_page_count, 8
 p_map_block_valid_page_count:
 	.zero	8
 	.section	.bss.p_map_block_ver_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR135,. + 0
+	.set	.LANCHOR125,. + 0
 	.type	p_map_block_ver_table, %object
 	.size	p_map_block_ver_table, 8
 p_map_block_ver_table:
 	.zero	8
 	.section	.bss.p_map_region_ppn_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR134,. + 0
+	.set	.LANCHOR124,. + 0
 	.type	p_map_region_ppn_table, %object
 	.size	p_map_region_ppn_table, 8
 p_map_region_ppn_table:
@@ -14084,35 +12651,34 @@ p_plane_order_table:
 	.zero	32
 	.section	.bss.p_swl_mul_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR126,. + 0
+	.set	.LANCHOR117,. + 0
 	.type	p_swl_mul_table, %object
 	.size	p_swl_mul_table, 8
 p_swl_mul_table:
 	.zero	8
 	.section	.bss.p_sys_data_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR115,. + 0
+	.set	.LANCHOR106,. + 0
 	.type	p_sys_data_buf, %object
 	.size	p_sys_data_buf, 8
 p_sys_data_buf:
 	.zero	8
 	.section	.bss.p_sys_data_buf_1,"aw",@nobits
 	.align	3
-	.set	.LANCHOR116,. + 0
+	.set	.LANCHOR107,. + 0
 	.type	p_sys_data_buf_1, %object
 	.size	p_sys_data_buf_1, 8
 p_sys_data_buf_1:
 	.zero	8
 	.section	.bss.p_sys_spare_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR123,. + 0
+	.set	.LANCHOR114,. + 0
 	.type	p_sys_spare_buf, %object
 	.size	p_sys_spare_buf, 8
 p_sys_spare_buf:
 	.zero	8
 	.section	.bss.p_valid_page_count_check_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR128,. + 0
 	.type	p_valid_page_count_check_table, %object
 	.size	p_valid_page_count_check_table, 8
 p_valid_page_count_check_table:
@@ -14133,630 +12699,472 @@ p_vendor_block_table:
 	.zero	8
 	.section	.bss.p_vendor_block_valid_page_count,"aw",@nobits
 	.align	3
-	.set	.LANCHOR131,. + 0
+	.set	.LANCHOR121,. + 0
 	.type	p_vendor_block_valid_page_count, %object
 	.size	p_vendor_block_valid_page_count, 8
 p_vendor_block_valid_page_count:
 	.zero	8
 	.section	.bss.p_vendor_block_ver_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR132,. + 0
+	.set	.LANCHOR122,. + 0
 	.type	p_vendor_block_ver_table, %object
 	.size	p_vendor_block_ver_table, 8
 p_vendor_block_ver_table:
 	.zero	8
 	.section	.bss.p_vendor_data_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR117,. + 0
+	.set	.LANCHOR108,. + 0
 	.type	p_vendor_data_buf, %object
 	.size	p_vendor_data_buf, 8
 p_vendor_data_buf:
 	.zero	8
 	.section	.bss.p_vendor_region_ppn_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR133,. + 0
+	.set	.LANCHOR123,. + 0
 	.type	p_vendor_region_ppn_table, %object
 	.size	p_vendor_region_ppn_table, 8
 p_vendor_region_ppn_table:
 	.zero	8
 	.section	.bss.req_erase,"aw",@nobits
 	.align	3
-	.set	.LANCHOR106,. + 0
+	.set	.LANCHOR79,. + 0
 	.type	req_erase, %object
 	.size	req_erase, 8
 req_erase:
 	.zero	8
 	.section	.bss.req_gc,"aw",@nobits
 	.align	3
-	.set	.LANCHOR93,. + 0
+	.set	.LANCHOR66,. + 0
 	.type	req_gc, %object
 	.size	req_gc, 8
 req_gc:
 	.zero	8
 	.section	.bss.req_gc_dst,"aw",@nobits
 	.align	3
-	.set	.LANCHOR113,. + 0
+	.set	.LANCHOR104,. + 0
 	.type	req_gc_dst, %object
 	.size	req_gc_dst, 8
 req_gc_dst:
 	.zero	8
 	.section	.bss.req_prgm,"aw",@nobits
 	.align	3
-	.set	.LANCHOR114,. + 0
+	.set	.LANCHOR105,. + 0
 	.type	req_prgm, %object
 	.size	req_prgm, 8
 req_prgm:
 	.zero	8
 	.section	.bss.req_read,"aw",@nobits
 	.align	3
-	.set	.LANCHOR112,. + 0
+	.set	.LANCHOR103,. + 0
 	.type	req_read, %object
 	.size	req_read, 8
 req_read:
 	.zero	8
 	.section	.bss.req_sys,"aw",@nobits
 	.align	3
-	.set	.LANCHOR148,. + 0
+	.set	.LANCHOR138,. + 0
 	.type	req_sys, %object
 	.size	req_sys, 32
 req_sys:
 	.zero	32
 	.section	.bss.sftl_nand_check_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR120,. + 0
+	.set	.LANCHOR111,. + 0
 	.type	sftl_nand_check_buf, %object
 	.size	sftl_nand_check_buf, 8
 sftl_nand_check_buf:
 	.zero	8
 	.section	.bss.sftl_nand_check_spare_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR122,. + 0
+	.set	.LANCHOR113,. + 0
 	.type	sftl_nand_check_spare_buf, %object
 	.size	sftl_nand_check_spare_buf, 8
 sftl_nand_check_spare_buf:
 	.zero	8
 	.section	.bss.sftl_temp_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR121,. + 0
+	.set	.LANCHOR112,. + 0
 	.type	sftl_temp_buf, %object
 	.size	sftl_temp_buf, 8
 sftl_temp_buf:
 	.zero	8
 	.section	.data.ftl_gc_temp_block_bops_scan_page_addr,"aw",@progbits
 	.align	1
-	.set	.LANCHOR162,. + 0
+	.set	.LANCHOR160,. + 0
 	.type	ftl_gc_temp_block_bops_scan_page_addr, %object
 	.size	ftl_gc_temp_block_bops_scan_page_addr, 2
 ftl_gc_temp_block_bops_scan_page_addr:
 	.hword	-1
 	.section	.data.gFtlInitStatus,"aw",@progbits
 	.align	2
-	.set	.LANCHOR86,. + 0
+	.set	.LANCHOR166,. + 0
 	.type	gFtlInitStatus, %object
 	.size	gFtlInitStatus, 4
 gFtlInitStatus:
 	.word	-1
 	.section	.data.power_up_flag,"aw",@progbits
 	.align	2
-	.set	.LANCHOR182,. + 0
 	.type	power_up_flag, %object
 	.size	power_up_flag, 4
 power_up_flag:
 	.word	1
 	.section	.rodata.FlashEraseBlocks.str1.1,"aMS",@progbits,1
-.LC79:
+.LC6:
 	.string	"%s: addr: %x is in id block!!!!!!!!!!\n"
-.LC80:
+.LC7:
 	.string	"not free: w: d:"
-.LC81:
+.LC8:
 	.string	"not free: w: s:"
 	.section	.rodata.FlashProgPages.str1.1,"aMS",@progbits,1
-.LC85:
+.LC11:
 	.string	"prog read error: = %x\n"
-.LC86:
+.LC12:
 	.string	"prog read s error: = %x %x %x\n"
-.LC87:
+.LC13:
 	.string	"prog read d error: = %x %x %x\n"
 	.section	.rodata.FtlBbmMapBadBlock.str1.1,"aMS",@progbits,1
 .LC0:
 	.string	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\n"
 	.section	.rodata.FtlBbmTblFlush.str1.1,"aMS",@progbits,1
-.LC101:
+.LC14:
 	.string	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\n"
-.LC102:
+.LC15:
 	.string	"FtlBbmTblFlush error:%x\n"
-.LC103:
+.LC16:
 	.string	"FtlBbmTblFlush error = %x error count = %d\n"
 	.section	.rodata.FtlFreeSysBlkQueueOut.str1.1,"aMS",@progbits,1
-.LC82:
+.LC9:
 	.string	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\n"
-	.section	.rodata.FtlGcFreeBadSuperBlk.str1.1,"aMS",@progbits,1
-.LC104:
-	.string	"FtlGcFreeBadSuperBlk 0x%x\n"
-	.section	.rodata.FtlGcMarkBadPhyBlk.str1.1,"aMS",@progbits,1
-.LC74:
-	.string	"FtlGcMarkBadPhyBlk %d 0x%x\n"
-	.section	.rodata.FtlGcRefreshBlock.str1.1,"aMS",@progbits,1
-.LC73:
-	.string	"FtlGcRefreshBlock  0x%x\n"
 	.section	.rodata.FtlGcScanTempBlk.str1.1,"aMS",@progbits,1
-.LC100:
+.LC31:
 	.string	"FtlGcScanTempBlk Error ID %x %x!!!!!!! \n"
 	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",@progbits,1
-.LC108:
-	.string	"no ect"
-	.section	.rodata.FtlMapWritePage.str1.1,"aMS",@progbits,1
-.LC88:
-	.string	"FtlMapWritePage error = %x \n"
-.LC89:
-	.string	"FtlMapWritePage error = %x error count = %d\n"
-	.section	.rodata.FtlMemInit.str1.1,"aMS",@progbits,1
-.LC84:
-	.string	"%s error allocating memory. return -1\n"
-	.section	.rodata.FtlPrintInfo2buf.str1.1,"aMS",@progbits,1
-.LC2:
-	.string	"FLASH INFO:\n"
-.LC3:
-	.string	"Device Capacity: %d MB\n"
-.LC4:
-	.string	"FTL INFO:\n"
-.LC5:
-	.string	"g_MaxLpn = 0x%x\n"
-.LC6:
-	.string	"g_VaildLpn = 0x%x\n"
-.LC7:
-	.string	"read_page_count = 0x%x\n"
-.LC8:
-	.string	"discard_page_count = 0x%x\n"
-.LC9:
-	.string	"write_page_count = 0x%x\n"
-.LC10:
-	.string	"cache_write_count = 0x%x\n"
-.LC11:
-	.string	"l2p_write_count = 0x%x\n"
-.LC12:
-	.string	"gc_page_count = 0x%x\n"
-.LC13:
-	.string	"totle_write = %d MB\n"
-.LC14:
-	.string	"totle_read = %d MB\n"
-.LC15:
-	.string	"GSV = 0x%x\n"
-.LC16:
-	.string	"GDV = 0x%x\n"
-.LC17:
-	.string	"bad blk num = %d\n"
-.LC18:
-	.string	"free_superblocks = 0x%x\n"
-.LC19:
-	.string	"mlc_EC = 0x%x\n"
-.LC20:
-	.string	"slc_EC = 0x%x\n"
-.LC21:
-	.string	"avg_EC = 0x%x\n"
-.LC22:
-	.string	"sys_EC = 0x%x\n"
-.LC23:
-	.string	"max_EC = 0x%x\n"
-.LC24:
-	.string	"min_EC = 0x%x\n"
-.LC25:
-	.string	"PLT = 0x%x\n"
-.LC26:
-	.string	"POT = 0x%x\n"
-.LC27:
-	.string	"MaxSector = 0x%x\n"
-.LC28:
-	.string	"init_sys_blks_pp = 0x%x\n"
-.LC29:
-	.string	"sys_blks_pp = 0x%x\n"
-.LC30:
-	.string	"free sysblock = 0x%x\n"
-.LC31:
-	.string	"data_blks_pp = 0x%x\n"
-.LC32:
-	.string	"data_op_blks_pp = 0x%x\n"
 .LC33:
-	.string	"max_data_blks = 0x%x\n"
+	.string	"no ect"
 .LC34:
-	.string	"Sys.id = 0x%x\n"
-.LC35:
-	.string	"Bbt.id = 0x%x\n"
-.LC36:
-	.string	"ACT.page = 0x%x\n"
-.LC37:
-	.string	"ACT.plane = 0x%x\n"
+	.string	"%s\n"
+	.section	.rodata.FtlLoadSysInfo.str1.1,"aMS",@progbits,1
 .LC38:
-	.string	"ACT.id = 0x%x\n"
+	.string	"%s hash error this.id =%x page =%x pre_id =%x hash =%x hash_r =%x\n"
+	.section	.rodata.FtlMapTblRecovery.str1.1,"aMS",@progbits,1
 .LC39:
-	.string	"ACT.mode = 0x%x\n"
+	.string	"%s last blk_id =%x page =%x hash error hash =%x hash_r =%x\n"
 .LC40:
-	.string	"ACT.a_pages = 0x%x\n"
-.LC41:
-	.string	"ACT VPC = 0x%x\n"
-.LC42:
-	.string	"BUF.page = 0x%x\n"
-.LC43:
-	.string	"BUF.plane = 0x%x\n"
-.LC44:
-	.string	"BUF.id = 0x%x\n"
-.LC45:
-	.string	"BUF.mode = 0x%x\n"
-.LC46:
-	.string	"BUF.a_pages = 0x%x\n"
-.LC47:
-	.string	"BUF VPC = 0x%x\n"
-.LC48:
-	.string	"TMP.page = 0x%x\n"
-.LC49:
-	.string	"TMP.plane = 0x%x\n"
-.LC50:
-	.string	"TMP.id = 0x%x\n"
-.LC51:
-	.string	"TMP.mode = 0x%x\n"
-.LC52:
-	.string	"TMP.a_pages = 0x%x\n"
-.LC53:
-	.string	"GC.page = 0x%x\n"
-.LC54:
-	.string	"GC.plane = 0x%x\n"
-.LC55:
-	.string	"GC.id = 0x%x\n"
-.LC56:
-	.string	"GC.mode = 0x%x\n"
-.LC57:
-	.string	"GC.a_pages = 0x%x\n"
-.LC58:
-	.string	"WR_CHK = %x %x %x\n"
-.LC59:
-	.string	"Read Err Cnt = 0x%x\n"
-.LC60:
-	.string	"Prog Err Cnt = 0x%x\n"
-.LC61:
-	.string	"gc_free_blk_th= 0x%x\n"
-.LC62:
-	.string	"gc_merge_free_blk_th= 0x%x\n"
-.LC63:
-	.string	"gc_skip_write_count= 0x%x\n"
-.LC64:
-	.string	"gc_blk_index= 0x%x\n"
-.LC65:
-	.string	"free min EC= 0x%x\n"
-.LC66:
-	.string	"free max EC= 0x%x\n"
-.LC67:
-	.string	"GC__SB VPC = 0x%x\n"
-.LC68:
-	.string	"%d. [0x%x]=0x%x 0x%x  0x%x\n"
-.LC69:
-	.string	"free %d. [0x%x] 0x%x  0x%x\n"
+	.string	"%s scan blk_id =%x page =%x hash error hash =%x hash_r =%x\n"
+	.section	.rodata.FtlMapWritePage.str1.1,"aMS",@progbits,1
+.LC18:
+	.string	"FtlMapWritePage error = %x \n"
+.LC19:
+	.string	"FtlMapWritePage error = %x error count = %d\n"
 	.section	.rodata.FtlProgPages.str1.1,"aMS",@progbits,1
-.LC111:
+.LC36:
 	.string	"Ftlwrite decrement_vpc_count %x = %d\n"
 	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",@progbits,1
-.LC106:
+.LC24:
 	.string	"spuer block %x vpn is 0\n "
 	.section	.rodata.FtlVendorPartRead.str1.1,"aMS",@progbits,1
-.LC107:
+.LC32:
 	.string	"FtlVendorPartRead refresh = %x phyAddr = %x\n"
-	.section	.rodata.FtlVpcCheckAndModify.str1.1,"aMS",@progbits,1
-.LC110:
-	.string	"FtlCheckVpc %x = %x  %x\n"
 	.section	.rodata.FtlVpcTblFlush.str1.1,"aMS",@progbits,1
-.LC109:
+.LC35:
 	.string	"FtlVpcTblFlush error = %x error count = %d\n"
 	.section	.rodata.FtlWrite.str1.1,"aMS",@progbits,1
-.LC113:
+.LC37:
 	.string	"FtlWrite: lpa error:%x %x\n"
 	.section	.rodata.FtlWriteToIDB.str1.1,"aMS",@progbits,1
-.LC114:
+.LC42:
 	.string	"write_idblock fail! %x %x %x %x\n"
-.LC115:
+.LC43:
 	.string	"%s idb buffer alloc fail\n"
-.LC116:
+.LC44:
 	.string	"%p %x %p %x\n"
-	.section	.rodata.GetSwlReplaceBlock.str1.1,"aMS",@progbits,1
-.LC72:
-	.string	"swblk %x ,avg = %x max= %x vpc= %x,ec=%x ,max ec=%x\n"
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",@progbits,1
 .LC1:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
-	.section	.rodata.__func__.6148,"a",@progbits
-	.align	3
-	.set	.LANCHOR138,. + 0
-	.type	__func__.6148, %object
-	.size	__func__.6148, 11
-__func__.6148:
-	.string	"FtlMemInit"
-	.section	.rodata.__func__.6272,"a",@progbits
+	.section	.rodata.__func__.6241,"a",@progbits
 	.align	3
-	.set	.LANCHOR175,. + 0
-	.type	__func__.6272, %object
-	.size	__func__.6272, 13
-__func__.6272:
+	.set	.LANCHOR169,. + 0
+	.type	__func__.6241, %object
+	.size	__func__.6241, 13
+__func__.6241:
 	.string	"FtlProgPages"
-	.section	.rodata.__func__.6300,"a",@progbits
+	.section	.rodata.__func__.6269,"a",@progbits
 	.align	3
-	.set	.LANCHOR183,. + 0
-	.type	__func__.6300, %object
-	.size	__func__.6300, 9
-__func__.6300:
+	.set	.LANCHOR177,. + 0
+	.type	__func__.6269, %object
+	.size	__func__.6269, 9
+__func__.6269:
 	.string	"FtlWrite"
-	.section	.rodata.__func__.6375,"a",@progbits
+	.section	.rodata.__func__.6344,"a",@progbits
 	.align	3
-	.set	.LANCHOR139,. + 0
-	.type	__func__.6375, %object
-	.size	__func__.6375, 14
-__func__.6375:
+	.set	.LANCHOR128,. + 0
+	.type	__func__.6344, %object
+	.size	__func__.6344, 14
+__func__.6344:
 	.string	"FtlBbt2Bitmap"
-	.section	.rodata.__func__.6418,"a",@progbits
+	.section	.rodata.__func__.6379,"a",@progbits
 	.align	3
-	.set	.LANCHOR150,. + 0
-	.type	__func__.6418, %object
-	.size	__func__.6418, 11
-__func__.6418:
+	.set	.LANCHOR141,. + 0
+	.type	__func__.6379, %object
+	.size	__func__.6379, 11
+__func__.6379:
 	.string	"FtlLoadBbt"
-	.section	.rodata.__func__.6533,"a",@progbits
+	.section	.rodata.__func__.6494,"a",@progbits
 	.align	3
 	.set	.LANCHOR49,. + 0
-	.type	__func__.6533, %object
-	.size	__func__.6533, 17
-__func__.6533:
+	.type	__func__.6494, %object
+	.size	__func__.6494, 17
+__func__.6494:
 	.string	"INSERT_FREE_LIST"
-	.section	.rodata.__func__.6538,"a",@progbits
+	.section	.rodata.__func__.6499,"a",@progbits
 	.align	3
 	.set	.LANCHOR46,. + 0
-	.type	__func__.6538, %object
-	.size	__func__.6538, 17
-__func__.6538:
+	.type	__func__.6499, %object
+	.size	__func__.6499, 17
+__func__.6499:
 	.string	"INSERT_DATA_LIST"
-	.section	.rodata.__func__.6569,"a",@progbits
+	.section	.rodata.__func__.6530,"a",@progbits
 	.align	3
 	.set	.LANCHOR50,. + 0
-	.type	__func__.6569, %object
-	.size	__func__.6569, 17
-__func__.6569:
+	.type	__func__.6530, %object
+	.size	__func__.6530, 17
+__func__.6530:
 	.string	"List_remove_node"
-	.section	.rodata.__func__.6601,"a",@progbits
+	.section	.rodata.__func__.6562,"a",@progbits
 	.align	3
 	.set	.LANCHOR54,. + 0
-	.type	__func__.6601, %object
-	.size	__func__.6601, 22
-__func__.6601:
+	.type	__func__.6562, %object
+	.size	__func__.6562, 22
+__func__.6562:
 	.string	"List_update_data_list"
-	.section	.rodata.__func__.6610,"a",@progbits
+	.section	.rodata.__func__.6571,"a",@progbits
 	.align	3
-	.set	.LANCHOR156,. + 0
-	.type	__func__.6610, %object
-	.size	__func__.6610, 16
-__func__.6610:
+	.set	.LANCHOR150,. + 0
+	.type	__func__.6571, %object
+	.size	__func__.6571, 16
+__func__.6571:
 	.string	"load_l2p_region"
-	.section	.rodata.__func__.6643,"a",@progbits
+	.section	.rodata.__func__.6604,"a",@progbits
 	.align	3
-	.set	.LANCHOR107,. + 0
-	.type	__func__.6643, %object
-	.size	__func__.6643, 26
-__func__.6643:
+	.set	.LANCHOR81,. + 0
+	.type	__func__.6604, %object
+	.size	__func__.6604, 26
+__func__.6604:
 	.string	"ftl_map_blk_alloc_new_blk"
-	.section	.rodata.__func__.6654,"a",@progbits
+	.section	.rodata.__func__.6615,"a",@progbits
 	.align	3
-	.set	.LANCHOR157,. + 0
-	.type	__func__.6654, %object
-	.size	__func__.6654, 15
-__func__.6654:
+	.set	.LANCHOR151,. + 0
+	.type	__func__.6615, %object
+	.size	__func__.6615, 15
+__func__.6615:
 	.string	"ftl_map_blk_gc"
-	.section	.rodata.__func__.6669,"a",@progbits
+	.section	.rodata.__func__.6630,"a",@progbits
 	.align	3
-	.set	.LANCHOR154,. + 0
-	.type	__func__.6669, %object
-	.size	__func__.6669, 31
-__func__.6669:
+	.set	.LANCHOR148,. + 0
+	.type	__func__.6630, %object
+	.size	__func__.6630, 31
+__func__.6630:
 	.string	"Ftl_write_map_blk_to_last_page"
-	.section	.rodata.__func__.6683,"a",@progbits
+	.section	.rodata.__func__.6644,"a",@progbits
 	.align	3
-	.set	.LANCHOR155,. + 0
-	.type	__func__.6683, %object
-	.size	__func__.6683, 16
-__func__.6683:
+	.set	.LANCHOR149,. + 0
+	.type	__func__.6644, %object
+	.size	__func__.6644, 16
+__func__.6644:
 	.string	"FtlMapWritePage"
-	.section	.rodata.__func__.6708,"a",@progbits
+	.section	.rodata.__func__.6669,"a",@progbits
 	.align	3
 	.set	.LANCHOR57,. + 0
-	.type	__func__.6708, %object
-	.size	__func__.6708, 22
-__func__.6708:
+	.type	__func__.6669, %object
+	.size	__func__.6669, 22
+__func__.6669:
 	.string	"select_l2p_ram_region"
-	.section	.rodata.__func__.6725,"a",@progbits
+	.section	.rodata.__func__.6686,"a",@progbits
 	.align	3
-	.set	.LANCHOR159,. + 0
-	.type	__func__.6725, %object
-	.size	__func__.6725, 9
-__func__.6725:
+	.set	.LANCHOR153,. + 0
+	.type	__func__.6686, %object
+	.size	__func__.6686, 9
+__func__.6686:
 	.string	"log2phys"
-	.section	.rodata.__func__.6798,"a",@progbits
+	.section	.rodata.__func__.6750,"a",@progbits
 	.align	3
-	.set	.LANCHOR171,. + 0
-	.type	__func__.6798, %object
-	.size	__func__.6798, 15
-__func__.6798:
+	.set	.LANCHOR165,. + 0
+	.type	__func__.6750, %object
+	.size	__func__.6750, 15
+__func__.6750:
 	.string	"FtlVpcTblFlush"
-	.section	.rodata.__func__.6820,"a",@progbits
+	.section	.rodata.__func__.6772,"a",@progbits
 	.align	3
-	.set	.LANCHOR149,. + 0
-	.type	__func__.6820, %object
-	.size	__func__.6820, 14
-__func__.6820:
+	.set	.LANCHOR140,. + 0
+	.type	__func__.6772, %object
+	.size	__func__.6772, 14
+__func__.6772:
 	.string	"FtlScanSysBlk"
-	.section	.rodata.__func__.6877,"a",@progbits
+	.section	.rodata.__func__.6828,"a",@progbits
 	.align	3
-	.set	.LANCHOR151,. + 0
-	.type	__func__.6877, %object
-	.size	__func__.6877, 15
-__func__.6877:
+	.set	.LANCHOR178,. + 0
+	.type	__func__.6828, %object
+	.size	__func__.6828, 15
+__func__.6828:
 	.string	"FtlLoadSysInfo"
-	.section	.rodata.__func__.6940,"a",@progbits
+	.section	.rodata.__func__.6850,"a",@progbits
 	.align	3
-	.set	.LANCHOR160,. + 0
-	.type	__func__.6940, %object
-	.size	__func__.6940, 16
-__func__.6940:
+	.set	.LANCHOR180,. + 0
+	.type	__func__.6850, %object
+	.size	__func__.6850, 18
+__func__.6850:
+	.string	"FtlMapTblRecovery"
+	.section	.rodata.__func__.6896,"a",@progbits
+	.align	3
+	.set	.LANCHOR154,. + 0
+	.type	__func__.6896, %object
+	.size	__func__.6896, 16
+__func__.6896:
 	.string	"FtlReUsePrevPpa"
-	.section	.rodata.__func__.6974,"a",@progbits
+	.section	.rodata.__func__.6930,"a",@progbits
 	.align	3
-	.set	.LANCHOR166,. + 0
-	.type	__func__.6974, %object
-	.size	__func__.6974, 22
-__func__.6974:
+	.set	.LANCHOR155,. + 0
+	.type	__func__.6930, %object
+	.size	__func__.6930, 22
+__func__.6930:
 	.string	"FtlRecoverySuperblock"
-	.section	.rodata.__func__.7031,"a",@progbits
+	.section	.rodata.__func__.6987,"a",@progbits
 	.align	3
 	.set	.LANCHOR60,. + 0
-	.type	__func__.7031, %object
-	.size	__func__.7031, 16
-__func__.7031:
+	.type	__func__.6987, %object
+	.size	__func__.6987, 16
+__func__.6987:
 	.string	"make_superblock"
-	.section	.rodata.__func__.7052,"a",@progbits
+	.section	.rodata.__func__.7008,"a",@progbits
 	.align	3
-	.set	.LANCHOR146,. + 0
-	.type	__func__.7052, %object
-	.size	__func__.7052, 18
-__func__.7052:
+	.set	.LANCHOR136,. + 0
+	.type	__func__.7008, %object
+	.size	__func__.7008, 18
+__func__.7008:
 	.string	"SupperBlkListInit"
-	.section	.rodata.__func__.7077,"a",@progbits
-	.align	3
-	.set	.LANCHOR173,. + 0
-	.type	__func__.7077, %object
-	.size	__func__.7077, 21
-__func__.7077:
-	.string	"FtlVpcCheckAndModify"
-	.section	.rodata.__func__.7093,"a",@progbits
+	.section	.rodata.__func__.7035,"a",@progbits
 	.align	3
-	.set	.LANCHOR161,. + 0
-	.type	__func__.7093, %object
-	.size	__func__.7093, 14
-__func__.7093:
+	.set	.LANCHOR159,. + 0
+	.type	__func__.7035, %object
+	.size	__func__.7035, 14
+__func__.7035:
 	.string	"ftl_check_vpc"
-	.section	.rodata.__func__.7178,"a",@progbits
+	.section	.rodata.__func__.7100,"a",@progbits
 	.align	3
-	.set	.LANCHOR163,. + 0
-	.type	__func__.7178, %object
-	.size	__func__.7178, 25
-__func__.7178:
+	.set	.LANCHOR143,. + 0
+	.type	__func__.7100, %object
+	.size	__func__.7100, 25
+__func__.7100:
 	.string	"allocate_data_superblock"
-	.section	.rodata.__func__.7199,"a",@progbits
+	.section	.rodata.__func__.7121,"a",@progbits
 	.align	3
-	.set	.LANCHOR174,. + 0
-	.type	__func__.7199, %object
-	.size	__func__.7199, 29
-__func__.7199:
+	.set	.LANCHOR168,. + 0
+	.type	__func__.7121, %object
+	.size	__func__.7121, 29
+__func__.7121:
 	.string	"allocate_new_data_superblock"
-	.section	.rodata.__func__.7206,"a",@progbits
+	.section	.rodata.__func__.7128,"a",@progbits
 	.align	3
-	.set	.LANCHOR88,. + 0
-	.type	__func__.7206, %object
-	.size	__func__.7206, 19
-__func__.7206:
+	.set	.LANCHOR61,. + 0
+	.type	__func__.7128, %object
+	.size	__func__.7128, 19
+__func__.7128:
 	.string	"get_new_active_ppa"
-	.section	.rodata.__func__.7219,"a",@progbits
+	.section	.rodata.__func__.7141,"a",@progbits
 	.align	3
-	.set	.LANCHOR164,. + 0
-	.type	__func__.7219, %object
-	.size	__func__.7219, 16
-__func__.7219:
+	.set	.LANCHOR146,. + 0
+	.type	__func__.7141, %object
+	.size	__func__.7141, 16
+__func__.7141:
 	.string	"update_vpc_list"
-	.section	.rodata.__func__.7226,"a",@progbits
+	.section	.rodata.__func__.7148,"a",@progbits
 	.align	3
-	.set	.LANCHOR165,. + 0
-	.type	__func__.7226, %object
-	.size	__func__.7226, 20
-__func__.7226:
+	.set	.LANCHOR147,. + 0
+	.type	__func__.7148, %object
+	.size	__func__.7148, 20
+__func__.7148:
 	.string	"decrement_vpc_count"
-	.section	.rodata.__func__.7296,"a",@progbits
+	.section	.rodata.__func__.7218,"a",@progbits
 	.align	3
-	.set	.LANCHOR176,. + 0
-	.type	__func__.7296, %object
-	.size	__func__.7296, 19
-__func__.7296:
+	.set	.LANCHOR170,. + 0
+	.type	__func__.7218, %object
+	.size	__func__.7218, 19
+__func__.7218:
 	.string	"FtlGcFreeTempBlock"
-	.section	.rodata.__func__.7407,"a",@progbits
+	.section	.rodata.__func__.7316,"a",@progbits
 	.align	3
-	.set	.LANCHOR180,. + 0
-	.type	__func__.7407, %object
-	.size	__func__.7407, 23
-__func__.7407:
+	.set	.LANCHOR175,. + 0
+	.type	__func__.7316, %object
+	.size	__func__.7316, 23
+__func__.7316:
 	.string	"rk_ftl_garbage_collect"
-	.section	.rodata.__func__.7669,"a",@progbits
+	.section	.rodata.__func__.7578,"a",@progbits
 	.align	3
-	.set	.LANCHOR147,. + 0
-	.type	__func__.7669, %object
-	.size	__func__.7669, 15
-__func__.7669:
+	.set	.LANCHOR137,. + 0
+	.type	__func__.7578, %object
+	.size	__func__.7578, 15
+__func__.7578:
 	.string	"FlashReadPages"
-	.section	.rodata.__func__.7688,"a",@progbits
+	.section	.rodata.__func__.7597,"a",@progbits
 	.align	3
-	.set	.LANCHOR153,. + 0
-	.type	__func__.7688, %object
-	.size	__func__.7688, 15
-__func__.7688:
+	.set	.LANCHOR142,. + 0
+	.type	__func__.7597, %object
+	.size	__func__.7597, 15
+__func__.7597:
 	.string	"FlashProgPages"
-	.section	.rodata.__func__.7712,"a",@progbits
+	.section	.rodata.__func__.7621,"a",@progbits
 	.align	3
-	.set	.LANCHOR104,. + 0
-	.type	__func__.7712, %object
-	.size	__func__.7712, 17
-__func__.7712:
+	.set	.LANCHOR77,. + 0
+	.type	__func__.7621, %object
+	.size	__func__.7621, 17
+__func__.7621:
 	.string	"FlashEraseBlocks"
-	.section	.rodata.__func__.7827,"a",@progbits
+	.section	.rodata.__func__.7736,"a",@progbits
 	.align	3
-	.set	.LANCHOR187,. + 0
-	.type	__func__.7827, %object
-	.size	__func__.7827, 14
-__func__.7827:
+	.set	.LANCHOR185,. + 0
+	.type	__func__.7736, %object
+	.size	__func__.7736, 14
+__func__.7736:
 	.string	"FtlWriteToIDB"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",@progbits,1
-.LC105:
+.LC17:
 	.string	"decrement_vpc_count %x = %d\n"
 	.section	.rodata.ftl_check_vpc.str1.1,"aMS",@progbits,1
-.LC94:
+.LC25:
 	.string	"...%s enter...\n"
-.LC95:
+.LC26:
 	.string	"FtlCheckVpc2 %x = %x  %x\n"
-.LC96:
+.LC27:
 	.string	"free blk vpc error %x = %x  %x\n"
 	.section	.rodata.ftl_map_blk_alloc_new_blk.str1.1,"aMS",@progbits,1
-.LC83:
+.LC10:
 	.string	"FtlFreeSysBlkQueueOut = %x, free count = %d\n"
 	.section	.rodata.ftl_scan_all_data.str1.1,"aMS",@progbits,1
-.LC97:
+.LC28:
 	.string	"ftl_scan_all_data = %x\n"
-.LC98:
+.LC29:
 	.string	"scan lpa = %x ppa= %x\n"
-.LC99:
+.LC30:
 	.string	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\n"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",@progbits,1
-.LC90:
+.LC20:
 	.string	"region_id = %x phyAddr = %x\n"
-.LC91:
+.LC21:
 	.string	"spare:"
-.LC92:
+.LC22:
 	.string	"map_ppn:"
-.LC93:
+.LC23:
 	.string	"load_l2p_region refresh = %x phyAddr = %x\n"
-	.section	.rodata.rk_ftl_garbage_collect.str1.1,"aMS",@progbits,1
-.LC112:
-	.string	"SWL %x, FSB = %x vpc= %x,ec=%x th=%x\n"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
-.LC75:
+.LC2:
 	.string	"%s 0x%x:"
-.LC76:
+.LC3:
 	.string	"%x "
-.LC77:
+.LC4:
 	.string	"%02x "
-.LC78:
+.LC5:
 	.string	"\n"
-	.section	.rodata.rknand_proc_ftlread.str1.1,"aMS",@progbits,1
-.LC70:
-	.string	"SFTL version: 5.0.49 20181030"
-.LC71:
-	.string	"%s\n"
+	.section	.rodata.sftl_init.str1.1,"aMS",@progbits,1
+.LC41:
+	.string	"SFTL version: 5.0.50 20181227"
 	.hidden	free

commit 681cd0c0ec968b9c11d6ac2c21f170313248518e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 11 21:12:09 2018 +0800

    configs: rk3399: remove unnecessary modules to decrease size
    
    size: 883KB => 752KB
    
    Change-Id: If5095e4c3d1761d999315464f3e1449326dd392e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
index 3803831b90..f95ff9d16b 100644
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -25,26 +25,36 @@ CONFIG_FASTBOOT_BUF_ADDR=0x00800800
 CONFIG_FASTBOOT_BUF_SIZE=0x08000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_BOOTD is not set
 CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_LZMADEC is not set
+# CONFIG_CMD_UNZIP is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
 CONFIG_CMD_GPT=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_LOAD_ANDROID=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
-CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_ECHO is not set
+# CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_TIME=y
-CONFIG_CMD_PMIC=y
-CONFIG_CMD_REGULATOR=y
+# CONFIG_CMD_NFS is not set
+# CONFIG_CMD_MISC is not set
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
-CONFIG_NET_RANDOM_ETHADDR=y
+# CONFIG_NET_TFTP_VARS is not set
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y
@@ -105,22 +115,16 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Rockchip"
 CONFIG_G_DNL_VENDOR_NUM=0x2207
 CONFIG_G_DNL_PRODUCT_NUM=0x330a
-CONFIG_USB_HOST_ETHER=y
-CONFIG_USB_ETHER_ASIX=y
-CONFIG_USB_ETHER_ASIX88179=y
-CONFIG_USB_ETHER_MCS7830=y
-CONFIG_USB_ETHER_RTL8152=y
-CONFIG_USB_ETHER_SMSC95XX=y
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_HDMI=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
-CONFIG_DRM_ROCKCHIP_LVDS=y
-CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
+CONFIG_LIB_RAND=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
+# CONFIG_EFI_LOADER is not set
 CONFIG_TEST_ROCKCHIP=y

commit 16489ccd87d360755d6e945520badc9ee58bd690
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Wed Dec 19 10:29:19 2018 +0800

    make.sh: decrease rk1808 uboot and trust backup copies to save space
    
    - 1MB * 2 copies;
    - on RK1808X4 board, only 32MB norflash space;
    
    Change-Id: I9154989303e5a8f55e17d139f2674a5321324137
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index cba6591bdb..f2a1293a98 100755
--- a/make.sh
+++ b/make.sh
@@ -394,6 +394,9 @@ fixup_platform_configure()
 			PLATFORM_UBOOT_IMG_SIZE="--size 1024 2"
 			PLATFORM_TRUST_IMG_SIZE="--size 1024 2"
 		fi
+	elif [ $RKCHIP = "RK1808" ]; then
+		PLATFORM_UBOOT_IMG_SIZE="--size 1024 2"
+		PLATFORM_TRUST_IMG_SIZE="--size 1024 2"
 	fi
 
 # <*> Fixup PLATFORM_AARCH32 for ARM64 cpu platforms

commit 40f13eb7715d1103ead7486dcab3f0fced7fee42
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Fri Dec 21 11:18:06 2018 +0800

    lib: optee_clientApi: write table when verify table fail
    
    Change-Id: I38d055945da5bf183e34588a08d8964c2d810f5f
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/OpteeClientRkFs.c b/lib/optee_clientApi/OpteeClientRkFs.c
index 73b839db8a..8fd2448b8f 100644
--- a/lib/optee_clientApi/OpteeClientRkFs.c
+++ b/lib/optee_clientApi/OpteeClientRkFs.c
@@ -320,7 +320,7 @@ static int rkss_verify_ptable(unsigned char *table_data)
 {
 	unsigned char *cp, *vp;
 	struct rkss_file_verification *verify;
-	int ret, i;
+	int ret, i, write_table_flag = 0;
 
 	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++) {
 		cp = table_data + (i * RKSS_DATA_LEN);
@@ -333,12 +333,15 @@ static int rkss_verify_ptable(unsigned char *table_data)
 			memset(cp, 0, RKSS_DATA_LEN);
 			verify->checkstr = RKSS_CHECK_STR;
 			verify->version = RKSS_VERSION;
+			write_table_flag = 1;
 		}
 	}
-	ret = rkss_write_multi_sections(table_data, 0, RKSS_PARTITION_TABLE_COUNT);
-	if (ret < 0) {
-		printf("rkss_write_multi_sections failed!!! ret: %d.", ret);
-		return -1;
+	if (write_table_flag == 1) {
+		ret = rkss_write_multi_sections(table_data, 0, RKSS_PARTITION_TABLE_COUNT);
+		if (ret < 0) {
+			printf("rkss_write_multi_sections failed!!! ret: %d.", ret);
+			return -1;
+		}
 	}
 	debug("verify ptable success.");
 	return 0;

commit 270ed4a992a651cfbdc368d77fe8788cfd18c9b4
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Dec 3 10:59:03 2018 +0800

    android: fix compare slot_suffix error
    
    If slot_suffix is equal to "_a", slot_index_to_boot is equal to '0'
    but not '1' when use function strncmp.
    
    Change-Id: I53ffc920824e03c923f1d9ab8fd326a733c59654
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 464e23a3bf..710bff8602 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -481,9 +481,9 @@ static AvbSlotVerifyResult android_slot_verify(char *boot_partname,
 		return AVB_SLOT_VERIFY_RESULT_ERROR_IO;
 	}
 
-	if (strncmp(slot_suffix, "_a", 2))
+	if (!strncmp(slot_suffix, "_a", 2))
 		slot_index_to_boot = 0;
-	else if(strncmp(slot_suffix, "_b", 2))
+	else if (!strncmp(slot_suffix, "_b", 2))
 		slot_index_to_boot = 1;
 	else
 		slot_index_to_boot = 0;

commit 6b7594123f9aaf8f60ef08f76346cc8d2857096b
Author: shengfei Xu <xsf@rock-chips.com>
Date:   Tue Dec 25 14:32:32 2018 +0800

    rockchip: configs: rk3399pro: Support Rockchip INNO USB2PHY
    
    Change-Id: Id1516a6dd3d5e2d06f7d30448f3b92fd84f20e2d
    Signed-off-by: Shengfei Xu <xsf@rock-chips.com>

diff --git a/configs/rk3399pro_defconfig b/configs/rk3399pro_defconfig
index 1e463ce644..c31ef8b9a3 100644
--- a/configs/rk3399pro_defconfig
+++ b/configs/rk3399pro_defconfig
@@ -66,6 +66,8 @@ CONFIG_MMC_SDHCI_ROCKCHIP=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y

commit 4652b3041df5e7e99161d4e4adfb9d734417e5c8
Author: YouMin Chen <cym@rock-chips.com>
Date:   Fri Dec 28 17:22:29 2018 +0800

    rockchip: dts: rk3399: add lpddr4 support
    
    Change-Id: I5bf0d19a6ebbdbcfe3b00a6f3fdddeb6ab572826
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/dts/rk3399-sdram-lpddr4-100.dtsi b/arch/arm/dts/rk3399-sdram-lpddr4-100.dtsi
new file mode 100644
index 0000000000..da5bf40b3a
--- /dev/null
+++ b/arch/arm/dts/rk3399-sdram-lpddr4-100.dtsi
@@ -0,0 +1,1537 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd.
+
+&dmc {
+	rockchip,sdram-params = <
+		0x2
+		0xa
+		0x3
+		0x2
+		0x1
+		0x0
+		0xf
+		0xf
+		0xf
+		0xf
+		1
+		0x80241d22
+		0x15050f08
+		0x00000602
+		0x00002122
+		0x0000004c
+		0x00000000
+		0x2
+		0xa
+		0x3
+		0x2
+		0x1
+		0x0
+		0xf
+		0xf
+		0xf
+		0xf
+		1
+		0x80241d22
+		0x15050f08
+		0x00000602
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+		0x09221902
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+		0x0d1f0d1f
+		0x0d1f0d1f
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+		0x09221902
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+		0x01020000
+		0x00000001
+		0x00000411
+		0x00000411
+		0x00000040
+		0x00000040
+		0x00000411
+		0x00000411
+		0x00004410
+		0x00004410
+		0x00004410
+		0x00004410
+		0x00004410
+		0x00000411
+		0x00004410
+		0x00000411
+		0x00004410
+		0x00000411
+		0x00004410
+		0x00000000
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+		0x00000000
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+		0x00000108
+		0x00000000
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+		0x00000000
+		0x00000000
+		0xe4000000
+		0x00000000
+		0x00000000
+		0x01010000
+		0x00000000
+	>;
+};

commit 8b36ec9feba34649d331b10b796844c7aa363827
Author: YouMin Chen <cym@rock-chips.com>
Date:   Fri Dec 28 17:20:23 2018 +0800

    driver: ram: rockchip: rk3399: add lpddr4 support
    
    Select rk3399-sdram-lpddr4-100.dtsi to initialize LPDDR4
    at 50MHz, it will change clock frequency to 800MHz
    after initialization is complete.
    
    Change-Id: I803ed2c809f17bbea40f379194bce548adc338ea
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/pmu_rk3399.h b/arch/arm/include/asm/arch-rockchip/pmu_rk3399.h
new file mode 100644
index 0000000000..f1096dccce
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/pmu_rk3399.h
@@ -0,0 +1,72 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd.
+ *
+ */
+
+#ifndef __SOC_ROCKCHIP_RK3399_PMU_H__
+#define __SOC_ROCKCHIP_RK3399_PMU_H__
+
+struct rk3399_pmu_regs {
+	u32 pmu_wakeup_cfg[5];
+	u32 pmu_pwrdn_con;
+	u32 pmu_pwrdn_st;
+	u32 pmu_pll_con;
+	u32 pmu_pwrmode_con;
+	u32 pmu_sft_con;
+	u32 pmu_int_con;
+	u32 pmu_int_st;
+	u32 pmu_gpio0_pos_int_con;
+	u32 pmu_gpio0_net_int_con;
+	u32 pmu_gpio1_pos_int_con;
+	u32 pmu_gpio1_net_int_con;
+	u32 pmu_gpio0_pos_int_st;
+	u32 pmu_gpio0_net_int_st;
+	u32 pmu_gpio1_pos_int_st;
+	u32 pmu_gpio1_net_int_st;
+	u32 pmu_pwrdn_inten;
+	u32 pmu_pwrdn_status;
+	u32 pmu_wakeup_status;
+	u32 pmu_bus_clr;
+	u32 pmu_bus_idle_req;
+	u32 pmu_bus_idle_st;
+	u32 pmu_bus_idle_ack;
+	u32 pmu_cci500_con;
+	u32 pmu_adb400_con;
+	u32 pmu_adb400_st;
+	u32 pmu_power_st;
+	u32 pmu_core_pwr_st;
+	u32 pmu_osc_cnt;
+	u32 pmu_plllock_cnt;
+	u32 pmu_pllrst_cnt;
+	u32 pmu_stable_cnt;
+	u32 pmu_ddrio_pwron_cnt;
+	u32 pmu_wakeup_rst_clr_cnt;
+	u32 pmu_ddr_sref_st;
+	u32 pmu_scu_l_pwrdn_cnt;
+	u32 pmu_scu_l_pwrup_cnt;
+	u32 pmu_scu_b_pwrdn_cnt;
+	u32 pmu_scu_b_pwrup_cnt;
+	u32 pmu_gpu_pwrdn_cnt;
+	u32 pmu_gpu_pwrup_cnt;
+	u32 pmu_center_pwrdn_cnt;
+	u32 pmu_center_pwrup_cnt;
+	u32 pmu_timeout_cnt;
+	u32 pmu_cpu0apm_con;
+	u32 pmu_cpu1apm_con;
+	u32 pmu_cpu2apm_con;
+	u32 pmu_cpu3apm_con;
+	u32 pmu_cpu0bpm_con;
+	u32 pmu_cpu1bpm_con;
+	u32 pmu_noc_auto_ena;
+	u32 pmu_pwrdn_con1;
+	u32 reserved0[0x4];
+	u32 pmu_sys_reg_reg0;
+	u32 pmu_sys_reg_reg1;
+	u32 pmu_sys_reg_reg2;
+	u32 pmu_sys_reg_reg3;
+};
+
+check_member(rk3399_pmu_regs, pmu_sys_reg_reg3, 0xfc);
+
+#endif	/* __SOC_ROCKCHIP_RK3399_PMU_H__ */
diff --git a/drivers/ram/rockchip/sdram-rk3399-lpddr4-400.inc b/drivers/ram/rockchip/sdram-rk3399-lpddr4-400.inc
new file mode 100644
index 0000000000..c9ba399afb
--- /dev/null
+++ b/drivers/ram/rockchip/sdram-rk3399-lpddr4-400.inc
@@ -0,0 +1,1560 @@
+{
+	{
+		{
+			{
+				.rank = 0x2,
+				.col = 0xA,
+				.bk = 0x3,
+				.bw = 0x2,
+				.dbw = 0x1,
+				.row_3_4 = 0x0,
+				.cs0_row = 0xF,
+				.cs1_row = 0xF,
+				.cs0_high16bit_row = 0xF,
+				.cs1_high16bit_row = 0xF,
+				.ddrconfig = 1,
+			},
+			{
+				{0x8010100d},
+				{0x08020b04},
+				{0x00000602},
+				{0x00002562},
+				{0x0000004c},
+				0x00000000
+			}
+		},
+		{
+			{
+				.rank = 0x2,
+				.col = 0xA,
+				.bk = 0x3,
+				.bw = 0x2,
+				.dbw = 0x1,
+				.row_3_4 = 0x0,
+				.cs0_row = 0xF,
+				.cs1_row = 0xF,
+				.cs0_high16bit_row = 0xF,
+				.cs1_high16bit_row = 0xF,
+				.ddrconfig = 1,
+			},
+			{
+				{0x8010100d},
+				{0x08020b04},
+				{0x00000602},
+				{0x00002562},
+				{0x0000004c},
+				0x00000000
+			}
+		}
+	},
+	{
+		.ddr_freq = 400*MHZ,
+		.dramtype = LPDDR4,
+		.num_channels = 2,
+		.stride = 13,
+		.odt = 1,
+	},
+	{
+		{
+			0x00000b00,	/* DENALI_CTL_00_DATA */
+			0x00000000,	/* DENALI_CTL_01_DATA */
+			0x00000000,	/* DENALI_CTL_02_DATA */
+			0x00000000,	/* DENALI_CTL_03_DATA */
+			0x00000000,	/* DENALI_CTL_04_DATA */
+			0x00013880,	/* DENALI_CTL_05_DATA */
+			0x000c3500,	/* DENALI_CTL_06_DATA */
+			0x00000005,	/* DENALI_CTL_07_DATA */
+			0x00000320,	/* DENALI_CTL_08_DATA */
+			0x00027100,	/* DENALI_CTL_09_DATA */
+			0x00186a00,	/* DENALI_CTL_10_DATA */
+			0x00000005,	/* DENALI_CTL_11_DATA */
+			0x00000640,	/* DENALI_CTL_12_DATA */
+			0x00002710,	/* DENALI_CTL_13_DATA */
+			0x000186a0,	/* DENALI_CTL_14_DATA */
+			0x00000005,	/* DENALI_CTL_15_DATA */
+			0x01000064,	/* DENALI_CTL_16_DATA */
+			0x00000000,	/* DENALI_CTL_17_DATA */
+			0x02020101,	/* DENALI_CTL_18_DATA */
+			0x00000102,	/* DENALI_CTL_19_DATA */
+			0x00000050,	/* DENALI_CTL_20_DATA */
+			0x000000c8,	/* DENALI_CTL_21_DATA */
+			0x00000000,	/* DENALI_CTL_22_DATA */
+			0x06140000,	/* DENALI_CTL_23_DATA */
+			0x00081c00,	/* DENALI_CTL_24_DATA */
+			0x0400040c,	/* DENALI_CTL_25_DATA */
+			0x19042008,	/* DENALI_CTL_26_DATA */
+			0x10080a11,	/* DENALI_CTL_27_DATA */
+			0x22310800,	/* DENALI_CTL_28_DATA */
+			0x00200f0a,	/* DENALI_CTL_29_DATA */
+			0x0a030704,	/* DENALI_CTL_30_DATA */
+			0x08000204,	/* DENALI_CTL_31_DATA */
+			0x00000a0a,	/* DENALI_CTL_32_DATA */
+			0x04006db0,	/* DENALI_CTL_33_DATA */
+			0x0a0a0804,	/* DENALI_CTL_34_DATA */
+			0x0600db60,	/* DENALI_CTL_35_DATA */
+			0x0a0a0806,	/* DENALI_CTL_36_DATA */
+			0x04000db6,	/* DENALI_CTL_37_DATA */
+			0x02030404,	/* DENALI_CTL_38_DATA */
+			0x0f0a0800,	/* DENALI_CTL_39_DATA */
+			0x08040411,	/* DENALI_CTL_40_DATA */
+			0x1400640a,	/* DENALI_CTL_41_DATA */
+			0x02010a0a,	/* DENALI_CTL_42_DATA */
+			0x00010001,	/* DENALI_CTL_43_DATA */
+			0x04082012,	/* DENALI_CTL_44_DATA */
+			0x00041109,	/* DENALI_CTL_45_DATA */
+			0x00000000,	/* DENALI_CTL_46_DATA */
+			0x03010000,	/* DENALI_CTL_47_DATA */
+			0x06100034,	/* DENALI_CTL_48_DATA */
+			0x0c280068,	/* DENALI_CTL_49_DATA */
+			0x00bb0007,	/* DENALI_CTL_50_DATA */
+			0x00000000,	/* DENALI_CTL_51_DATA */
+			0x00060003,	/* DENALI_CTL_52_DATA */
+			0x000a0003,	/* DENALI_CTL_53_DATA */
+			0x000a0014,	/* DENALI_CTL_54_DATA */
+			0x01000000,	/* DENALI_CTL_55_DATA */
+			0x030a0000,	/* DENALI_CTL_56_DATA */
+			0x0c000002,	/* DENALI_CTL_57_DATA */
+			0x00000103,	/* DENALI_CTL_58_DATA */
+			0x0003030a,	/* DENALI_CTL_59_DATA */
+			0x00060037,	/* DENALI_CTL_60_DATA */
+			0x0003006e,	/* DENALI_CTL_61_DATA */
+			0x05050007,	/* DENALI_CTL_62_DATA */
+			0x03020605,	/* DENALI_CTL_63_DATA */
+			0x06050301,	/* DENALI_CTL_64_DATA */
+			0x06020c05,	/* DENALI_CTL_65_DATA */
+			0x05050302,	/* DENALI_CTL_66_DATA */
+			0x03020305,	/* DENALI_CTL_67_DATA */
+			0x00000301,	/* DENALI_CTL_68_DATA */
+			0x00000301,	/* DENALI_CTL_69_DATA */
+			0x00000001,	/* DENALI_CTL_70_DATA */
+			0x00000000,	/* DENALI_CTL_71_DATA */
+			0x00000000,	/* DENALI_CTL_72_DATA */
+			0x01000000,	/* DENALI_CTL_73_DATA */
+			0x80104002,	/* DENALI_CTL_74_DATA */
+			0x00040003,	/* DENALI_CTL_75_DATA */
+			0x00040005,	/* DENALI_CTL_76_DATA */
+			0x00030000,	/* DENALI_CTL_77_DATA */
+			0x00050004,	/* DENALI_CTL_78_DATA */
+			0x00000004,	/* DENALI_CTL_79_DATA */
+			0x00040003,	/* DENALI_CTL_80_DATA */
+			0x00040005,	/* DENALI_CTL_81_DATA */
+			0x18400000,	/* DENALI_CTL_82_DATA */
+			0x00000c20,	/* DENALI_CTL_83_DATA */
+			0x185030a0,	/* DENALI_CTL_84_DATA */
+			0x02ec0000,	/* DENALI_CTL_85_DATA */
+			0x00000176,	/* DENALI_CTL_86_DATA */
+			0x00000000,	/* DENALI_CTL_87_DATA */
+			0x00000000,	/* DENALI_CTL_88_DATA */
+			0x00000000,	/* DENALI_CTL_89_DATA */
+			0x00000000,	/* DENALI_CTL_90_DATA */
+			0x00000000,	/* DENALI_CTL_91_DATA */
+			0x06030300,	/* DENALI_CTL_92_DATA */
+			0x00030303,	/* DENALI_CTL_93_DATA */
+			0x02030200,	/* DENALI_CTL_94_DATA */
+			0x00040703,	/* DENALI_CTL_95_DATA */
+			0x03020302,	/* DENALI_CTL_96_DATA */
+			0x02000407,	/* DENALI_CTL_97_DATA */
+			0x07030203,	/* DENALI_CTL_98_DATA */
+			0x00030f04,	/* DENALI_CTL_99_DATA */
+			0x00070004,	/* DENALI_CTL_100_DATA */
+			0x00000000,	/* DENALI_CTL_101_DATA */
+			0x00000000,	/* DENALI_CTL_102_DATA */
+			0x00000000,	/* DENALI_CTL_103_DATA */
+			0x00000000,	/* DENALI_CTL_104_DATA */
+			0x00000000,	/* DENALI_CTL_105_DATA */
+			0x00000000,	/* DENALI_CTL_106_DATA */
+			0x00000000,	/* DENALI_CTL_107_DATA */
+			0x00010000,	/* DENALI_CTL_108_DATA */
+			0x20040020,	/* DENALI_CTL_109_DATA */
+			0x00200400,	/* DENALI_CTL_110_DATA */
+			0x01000400,	/* DENALI_CTL_111_DATA */
+			0x00000b80,	/* DENALI_CTL_112_DATA */
+			0x00000000,	/* DENALI_CTL_113_DATA */
+			0x00000001,	/* DENALI_CTL_114_DATA */
+			0x00000002,	/* DENALI_CTL_115_DATA */
+			0x0000000e,	/* DENALI_CTL_116_DATA */
+			0x00000000,	/* DENALI_CTL_117_DATA */
+			0x00000000,	/* DENALI_CTL_118_DATA */
+			0x00000000,	/* DENALI_CTL_119_DATA */
+			0x00000000,	/* DENALI_CTL_120_DATA */
+			0x00000000,	/* DENALI_CTL_121_DATA */
+			0x00500000,	/* DENALI_CTL_122_DATA */
+			0x00640028,	/* DENALI_CTL_123_DATA */
+			0x00640404,	/* DENALI_CTL_124_DATA */
+			0x005000a0,	/* DENALI_CTL_125_DATA */
+			0x060600c8,	/* DENALI_CTL_126_DATA */
+			0x000a00c8,	/* DENALI_CTL_127_DATA */
+			0x000d0005,	/* DENALI_CTL_128_DATA */
+			0x000d0404,	/* DENALI_CTL_129_DATA */
+			0x00000000,	/* DENALI_CTL_130_DATA */
+			0x00000000,	/* DENALI_CTL_131_DATA */
+			0x00000000,	/* DENALI_CTL_132_DATA */
+			0x001400a3,	/* DENALI_CTL_133_DATA */
+			0x00e30009,	/* DENALI_CTL_134_DATA */
+			0x00120024,	/* DENALI_CTL_135_DATA */
+			0x00040063,	/* DENALI_CTL_136_DATA */
+			0x00000000,	/* DENALI_CTL_137_DATA */
+			0x00310031,	/* DENALI_CTL_138_DATA */
+			0x00000031,	/* DENALI_CTL_139_DATA */
+			0x004d0000,	/* DENALI_CTL_140_DATA */
+			0x004d004d,	/* DENALI_CTL_141_DATA */
+			0x004d0000,	/* DENALI_CTL_142_DATA */
+			0x004d004d,	/* DENALI_CTL_143_DATA */
+			0x00010101,	/* DENALI_CTL_144_DATA */
+			0x00000000,	/* DENALI_CTL_145_DATA */
+			0x00000000,	/* DENALI_CTL_146_DATA */
+			0x001400a3,	/* DENALI_CTL_147_DATA */
+			0x00e30009,	/* DENALI_CTL_148_DATA */
+			0x00120024,	/* DENALI_CTL_149_DATA */
+			0x00040063,	/* DENALI_CTL_150_DATA */
+			0x00000000,	/* DENALI_CTL_151_DATA */
+			0x00310031,	/* DENALI_CTL_152_DATA */
+			0x00000031,	/* DENALI_CTL_153_DATA */
+			0x004d0000,	/* DENALI_CTL_154_DATA */
+			0x004d004d,	/* DENALI_CTL_155_DATA */
+			0x004d0000,	/* DENALI_CTL_156_DATA */
+			0x004d004d,	/* DENALI_CTL_157_DATA */
+			0x00010101,	/* DENALI_CTL_158_DATA */
+			0x00000000,	/* DENALI_CTL_159_DATA */
+			0x00000000,	/* DENALI_CTL_160_DATA */
+			0x00000000,	/* DENALI_CTL_161_DATA */
+			0x00000001,	/* DENALI_CTL_162_DATA */
+			0x00000000,	/* DENALI_CTL_163_DATA */
+			0x18151100,	/* DENALI_CTL_164_DATA */
+			0x0000000c,	/* DENALI_CTL_165_DATA */
+			0x00000000,	/* DENALI_CTL_166_DATA */
+			0x00000000,	/* DENALI_CTL_167_DATA */
+			0x00000000,	/* DENALI_CTL_168_DATA */
+			0x00000000,	/* DENALI_CTL_169_DATA */
+			0x00000000,	/* DENALI_CTL_170_DATA */
+			0x00000000,	/* DENALI_CTL_171_DATA */
+			0x00000000,	/* DENALI_CTL_172_DATA */
+			0x00000000,	/* DENALI_CTL_173_DATA */
+			0x00000000,	/* DENALI_CTL_174_DATA */
+			0x00000000,	/* DENALI_CTL_175_DATA */
+			0x00000000,	/* DENALI_CTL_176_DATA */
+			0x00000000,	/* DENALI_CTL_177_DATA */
+			0x00000000,	/* DENALI_CTL_178_DATA */
+			0x00020003,	/* DENALI_CTL_179_DATA */
+			0x00400100,	/* DENALI_CTL_180_DATA */
+			0x000c0190,	/* DENALI_CTL_181_DATA */
+			0x01000200,	/* DENALI_CTL_182_DATA */
+			0x03200040,	/* DENALI_CTL_183_DATA */
+			0x00020018,	/* DENALI_CTL_184_DATA */
+			0x00400100,	/* DENALI_CTL_185_DATA */
+			0x00080032,	/* DENALI_CTL_186_DATA */
+			0x00140000,	/* DENALI_CTL_187_DATA */
+			0x00030028,	/* DENALI_CTL_188_DATA */
+			0x01010100,	/* DENALI_CTL_189_DATA */
+			0x02000202,	/* DENALI_CTL_190_DATA */
+			0x0b000002,	/* DENALI_CTL_191_DATA */
+			0x01000f0f,	/* DENALI_CTL_192_DATA */
+			0x00000000,	/* DENALI_CTL_193_DATA */
+			0x00000000,	/* DENALI_CTL_194_DATA */
+			0x00010003,	/* DENALI_CTL_195_DATA */
+			0x00000c03,	/* DENALI_CTL_196_DATA */
+			0x00040101,	/* DENALI_CTL_197_DATA */
+			0x04010100,	/* DENALI_CTL_198_DATA */
+			0x01000000,	/* DENALI_CTL_199_DATA */
+			0x02010000,	/* DENALI_CTL_200_DATA */
+			0x00000001,	/* DENALI_CTL_201_DATA */
+			0x00000000,	/* DENALI_CTL_202_DATA */
+			0x00000000,	/* DENALI_CTL_203_DATA */
+			0x00000000,	/* DENALI_CTL_204_DATA */
+			0x00000000,	/* DENALI_CTL_205_DATA */
+			0x00000000,	/* DENALI_CTL_206_DATA */
+			0x00000000,	/* DENALI_CTL_207_DATA */
+			0x00000000,	/* DENALI_CTL_208_DATA */
+			0x00000000,	/* DENALI_CTL_209_DATA */
+			0x00000000,	/* DENALI_CTL_210_DATA */
+			0x00010000,	/* DENALI_CTL_211_DATA */
+			0x00000001,	/* DENALI_CTL_212_DATA */
+			0x01010001,	/* DENALI_CTL_213_DATA */
+			0x05040001,	/* DENALI_CTL_214_DATA */
+			0x040a0703,	/* DENALI_CTL_215_DATA */
+			0x02080808,	/* DENALI_CTL_216_DATA */
+			0x020e000a,	/* DENALI_CTL_217_DATA */
+			0x020f010b,	/* DENALI_CTL_218_DATA */
+			0x000d0008,	/* DENALI_CTL_219_DATA */
+			0x00080b0a,	/* DENALI_CTL_220_DATA */
+			0x03000200,	/* DENALI_CTL_221_DATA */
+			0x00000100,	/* DENALI_CTL_222_DATA */
+			0x00000000,	/* DENALI_CTL_223_DATA */
+			0x00000000,	/* DENALI_CTL_224_DATA */
+			0x0d000001,	/* DENALI_CTL_225_DATA */
+			0x00000028,	/* DENALI_CTL_226_DATA */
+			0x00010000,	/* DENALI_CTL_227_DATA */
+			0x00000003,	/* DENALI_CTL_228_DATA */
+			0x00000000,	/* DENALI_CTL_229_DATA */
+			0x00000000,	/* DENALI_CTL_230_DATA */
+			0x00000000,	/* DENALI_CTL_231_DATA */
+			0x00000000,	/* DENALI_CTL_232_DATA */
+			0x00000000,	/* DENALI_CTL_233_DATA */
+			0x00000000,	/* DENALI_CTL_234_DATA */
+			0x00000000,	/* DENALI_CTL_235_DATA */
+			0x00000000,	/* DENALI_CTL_236_DATA */
+			0x00010100,	/* DENALI_CTL_237_DATA */
+			0x01000000,	/* DENALI_CTL_238_DATA */
+			0x00000001,	/* DENALI_CTL_239_DATA */
+			0x00000303,	/* DENALI_CTL_240_DATA */
+			0x00000000,	/* DENALI_CTL_241_DATA */
+			0x00000000,	/* DENALI_CTL_242_DATA */
+			0x00000000,	/* DENALI_CTL_243_DATA */
+			0x00000000,	/* DENALI_CTL_244_DATA */
+			0x00000000,	/* DENALI_CTL_245_DATA */
+			0x00000000,	/* DENALI_CTL_246_DATA */
+			0x00000000,	/* DENALI_CTL_247_DATA */
+			0x00000000,	/* DENALI_CTL_248_DATA */
+			0x00000000,	/* DENALI_CTL_249_DATA */
+			0x00000000,	/* DENALI_CTL_250_DATA */
+			0x00000000,	/* DENALI_CTL_251_DATA */
+			0x00000000,	/* DENALI_CTL_252_DATA */
+			0x00000000,	/* DENALI_CTL_253_DATA */
+			0x00000000,	/* DENALI_CTL_254_DATA */
+			0x00000000,	/* DENALI_CTL_255_DATA */
+			0x000556aa,	/* DENALI_CTL_256_DATA */
+			0x000aaaaa,	/* DENALI_CTL_257_DATA */
+			0x000aa955,	/* DENALI_CTL_258_DATA */
+			0x00055555,	/* DENALI_CTL_259_DATA */
+			0x000b3133,	/* DENALI_CTL_260_DATA */
+			0x0004cd33,	/* DENALI_CTL_261_DATA */
+			0x0004cecc,	/* DENALI_CTL_262_DATA */
+			0x000b32cc,	/* DENALI_CTL_263_DATA */
+			0x00010300,	/* DENALI_CTL_264_DATA */
+			0x03000100,	/* DENALI_CTL_265_DATA */
+			0x00000000,	/* DENALI_CTL_266_DATA */
+			0x00000000,	/* DENALI_CTL_267_DATA */
+			0x00000000,	/* DENALI_CTL_268_DATA */
+			0x00000000,	/* DENALI_CTL_269_DATA */
+			0x00000000,	/* DENALI_CTL_270_DATA */
+			0x00000000,	/* DENALI_CTL_271_DATA */
+			0x00000000,	/* DENALI_CTL_272_DATA */
+			0x00000000,	/* DENALI_CTL_273_DATA */
+			0x00ffff00,	/* DENALI_CTL_274_DATA */
+			0x1a160000,	/* DENALI_CTL_275_DATA */
+			0x08000012,	/* DENALI_CTL_276_DATA */
+			0x00000c20,	/* DENALI_CTL_277_DATA */
+			0x00000200,	/* DENALI_CTL_278_DATA */
+			0x00000200,	/* DENALI_CTL_279_DATA */
+			0x00000200,	/* DENALI_CTL_280_DATA */
+			0x00000200,	/* DENALI_CTL_281_DATA */
+			0x00000c20,	/* DENALI_CTL_282_DATA */
+			0x00007940,	/* DENALI_CTL_283_DATA */
+			0x18500409,	/* DENALI_CTL_284_DATA */
+			0x00000200,	/* DENALI_CTL_285_DATA */
+			0x00000200,	/* DENALI_CTL_286_DATA */
+			0x00000200,	/* DENALI_CTL_287_DATA */
+			0x00000200,	/* DENALI_CTL_288_DATA */
+			0x00001850,	/* DENALI_CTL_289_DATA */
+			0x0000f320,	/* DENALI_CTL_290_DATA */
+			0x0176060c,	/* DENALI_CTL_291_DATA */
+			0x00000200,	/* DENALI_CTL_292_DATA */
+			0x00000200,	/* DENALI_CTL_293_DATA */
+			0x00000200,	/* DENALI_CTL_294_DATA */
+			0x00000200,	/* DENALI_CTL_295_DATA */
+			0x00000176,	/* DENALI_CTL_296_DATA */
+			0x00000e9c,	/* DENALI_CTL_297_DATA */
+			0x02020205,	/* DENALI_CTL_298_DATA */
+			0x03030202,	/* DENALI_CTL_299_DATA */
+			0x00000018,	/* DENALI_CTL_300_DATA */
+			0x00000000,	/* DENALI_CTL_301_DATA */
+			0x00000000,	/* DENALI_CTL_302_DATA */
+			0x00001403,	/* DENALI_CTL_303_DATA */
+			0x00000000,	/* DENALI_CTL_304_DATA */
+			0x00000000,	/* DENALI_CTL_305_DATA */
+			0x00000000,	/* DENALI_CTL_306_DATA */
+			0x00030000,	/* DENALI_CTL_307_DATA */
+			0x000a001c,	/* DENALI_CTL_308_DATA */
+			0x000e0020,	/* DENALI_CTL_309_DATA */
+			0x00060018,	/* DENALI_CTL_310_DATA */
+			0x00000000,	/* DENALI_CTL_311_DATA */
+			0x00000000,	/* DENALI_CTL_312_DATA */
+			0x02000000,	/* DENALI_CTL_313_DATA */
+			0x00090305,	/* DENALI_CTL_314_DATA */
+			0x00050101,	/* DENALI_CTL_315_DATA */
+			0x00000000,	/* DENALI_CTL_316_DATA */
+			0x00000000,	/* DENALI_CTL_317_DATA */
+			0x00000000,	/* DENALI_CTL_318_DATA */
+			0x00000000,	/* DENALI_CTL_319_DATA */
+			0x00000000,	/* DENALI_CTL_320_DATA */
+			0x00000000,	/* DENALI_CTL_321_DATA */
+			0x00000000,	/* DENALI_CTL_322_DATA */
+			0x00000000,	/* DENALI_CTL_323_DATA */
+			0x01000001,	/* DENALI_CTL_324_DATA */
+			0x01010101,	/* DENALI_CTL_325_DATA */
+			0x01000101,	/* DENALI_CTL_326_DATA */
+			0x01000100,	/* DENALI_CTL_327_DATA */
+			0x00010001,	/* DENALI_CTL_328_DATA */
+			0x00010002,	/* DENALI_CTL_329_DATA */
+			0x00020100,	/* DENALI_CTL_330_DATA */
+			0x00000002	/* DENALI_CTL_331_DATA */
+		}
+	},
+	{
+		{
+			0x00000b00,	/* DENALI_PI_00_DATA */
+			0x00000000,	/* DENALI_PI_01_DATA */
+			0x000002ec,	/* DENALI_PI_02_DATA */
+			0x00000176,	/* DENALI_PI_03_DATA */
+			0x000030a0,	/* DENALI_PI_04_DATA */
+			0x00001850,	/* DENALI_PI_05_DATA */
+			0x00001840,	/* DENALI_PI_06_DATA */
+			0x01760c20,	/* DENALI_PI_07_DATA */
+			0x00000200,	/* DENALI_PI_08_DATA */
+			0x00000200,	/* DENALI_PI_09_DATA */
+			0x00000200,	/* DENALI_PI_10_DATA */
+			0x00000200,	/* DENALI_PI_11_DATA */
+			0x00001850,	/* DENALI_PI_12_DATA */
+			0x00000200,	/* DENALI_PI_13_DATA */
+			0x00000200,	/* DENALI_PI_14_DATA */
+			0x00000200,	/* DENALI_PI_15_DATA */
+			0x00000200,	/* DENALI_PI_16_DATA */
+			0x00000c20,	/* DENALI_PI_17_DATA */
+			0x00000200,	/* DENALI_PI_18_DATA */
+			0x00000200,	/* DENALI_PI_19_DATA */
+			0x00000200,	/* DENALI_PI_20_DATA */
+			0x00000200,	/* DENALI_PI_21_DATA */
+			0x00010000,	/* DENALI_PI_22_DATA */
+			0x00000007,	/* DENALI_PI_23_DATA */
+			0x01000001,	/* DENALI_PI_24_DATA */
+			0x00000000,	/* DENALI_PI_25_DATA */
+			0x3fffffff,	/* DENALI_PI_26_DATA */
+			0x00000000,	/* DENALI_PI_27_DATA */
+			0x00000000,	/* DENALI_PI_28_DATA */
+			0x00000000,	/* DENALI_PI_29_DATA */
+			0x00000000,	/* DENALI_PI_30_DATA */
+			0x00000000,	/* DENALI_PI_31_DATA */
+			0x00000000,	/* DENALI_PI_32_DATA */
+			0x00000000,	/* DENALI_PI_33_DATA */
+			0x00000000,	/* DENALI_PI_34_DATA */
+			0x00000000,	/* DENALI_PI_35_DATA */
+			0x00000000,	/* DENALI_PI_36_DATA */
+			0x00000000,	/* DENALI_PI_37_DATA */
+			0x00000000,	/* DENALI_PI_38_DATA */
+			0x00000000,	/* DENALI_PI_39_DATA */
+			0x00000000,	/* DENALI_PI_40_DATA */
+			0x0f000101,	/* DENALI_PI_41_DATA */
+			0x082b3223,	/* DENALI_PI_42_DATA */
+			0x080c0004,	/* DENALI_PI_43_DATA */
+			0x00061c00,	/* DENALI_PI_44_DATA */
+			0x00000214,	/* DENALI_PI_45_DATA */
+			0x00bb0007,	/* DENALI_PI_46_DATA */
+			0x0c280068,	/* DENALI_PI_47_DATA */
+			0x06100034,	/* DENALI_PI_48_DATA */
+			0x00000500,	/* DENALI_PI_49_DATA */
+			0x00000000,	/* DENALI_PI_50_DATA */
+			0x00000000,	/* DENALI_PI_51_DATA */
+			0x00000000,	/* DENALI_PI_52_DATA */
+			0x00000000,	/* DENALI_PI_53_DATA */
+			0x00000000,	/* DENALI_PI_54_DATA */
+			0x00000000,	/* DENALI_PI_55_DATA */
+			0x00000000,	/* DENALI_PI_56_DATA */
+			0x00000000,	/* DENALI_PI_57_DATA */
+			0x04040100,	/* DENALI_PI_58_DATA */
+			0x0a000004,	/* DENALI_PI_59_DATA */
+			0x00000128,	/* DENALI_PI_60_DATA */
+			0x00000000,	/* DENALI_PI_61_DATA */
+			0x0003000f,	/* DENALI_PI_62_DATA */
+			0x00000018,	/* DENALI_PI_63_DATA */
+			0x00000000,	/* DENALI_PI_64_DATA */
+			0x00000000,	/* DENALI_PI_65_DATA */
+			0x00060002,	/* DENALI_PI_66_DATA */
+			0x00010001,	/* DENALI_PI_67_DATA */
+			0x00000101,	/* DENALI_PI_68_DATA */
+			0x00020001,	/* DENALI_PI_69_DATA */
+			0x00080004,	/* DENALI_PI_70_DATA */
+			0x00000000,	/* DENALI_PI_71_DATA */
+			0x05030000,	/* DENALI_PI_72_DATA */
+			0x070a0404,	/* DENALI_PI_73_DATA */
+			0x00000000,	/* DENALI_PI_74_DATA */
+			0x00000000,	/* DENALI_PI_75_DATA */
+			0x00000000,	/* DENALI_PI_76_DATA */
+			0x000f0f00,	/* DENALI_PI_77_DATA */
+			0x0000001e,	/* DENALI_PI_78_DATA */
+			0x00000000,	/* DENALI_PI_79_DATA */
+			0x01010300,	/* DENALI_PI_80_DATA */
+			0x00000000,	/* DENALI_PI_81_DATA */
+			0x00000000,	/* DENALI_PI_82_DATA */
+			0x01000000,	/* DENALI_PI_83_DATA */
+			0x00000101,	/* DENALI_PI_84_DATA */
+			0x55555a5a,	/* DENALI_PI_85_DATA */
+			0x55555a5a,	/* DENALI_PI_86_DATA */
+			0x55555a5a,	/* DENALI_PI_87_DATA */
+			0x55555a5a,	/* DENALI_PI_88_DATA */
+			0x0c050001,	/* DENALI_PI_89_DATA */
+			0x06020009,	/* DENALI_PI_90_DATA */
+			0x00010004,	/* DENALI_PI_91_DATA */
+			0x00000203,	/* DENALI_PI_92_DATA */
+			0x00030000,	/* DENALI_PI_93_DATA */
+			0x170f0000,	/* DENALI_PI_94_DATA */
+			0x00060018,	/* DENALI_PI_95_DATA */
+			0x000e0020,	/* DENALI_PI_96_DATA */
+			0x000a001c,	/* DENALI_PI_97_DATA */
+			0x00000000,	/* DENALI_PI_98_DATA */
+			0x00000000,	/* DENALI_PI_99_DATA */
+			0x00000100,	/* DENALI_PI_100_DATA */
+			0x140a0000,	/* DENALI_PI_101_DATA */
+			0x000d010a,	/* DENALI_PI_102_DATA */
+			0x0100c802,	/* DENALI_PI_103_DATA */
+			0x010a0064,	/* DENALI_PI_104_DATA */
+			0x000e0100,	/* DENALI_PI_105_DATA */
+			0x0100000e,	/* DENALI_PI_106_DATA */
+			0x00c900c9,	/* DENALI_PI_107_DATA */
+			0x00650100,	/* DENALI_PI_108_DATA */
+			0x1e1a0065,	/* DENALI_PI_109_DATA */
+			0x10010204,	/* DENALI_PI_110_DATA */
+			0x06070605,	/* DENALI_PI_111_DATA */
+			0x20000202,	/* DENALI_PI_112_DATA */
+			0x00201000,	/* DENALI_PI_113_DATA */
+			0x00201000,	/* DENALI_PI_114_DATA */
+			0x04041000,	/* DENALI_PI_115_DATA */
+			0x10020100,	/* DENALI_PI_116_DATA */
+			0x0003010c,	/* DENALI_PI_117_DATA */
+			0x004b004a,	/* DENALI_PI_118_DATA */
+			0x1a0f0000,	/* DENALI_PI_119_DATA */
+			0x0102041e,	/* DENALI_PI_120_DATA */
+			0x34000000,	/* DENALI_PI_121_DATA */
+			0x00000000,	/* DENALI_PI_122_DATA */
+			0x00000000,	/* DENALI_PI_123_DATA */
+			0x00010000,	/* DENALI_PI_124_DATA */
+			0x00000400,	/* DENALI_PI_125_DATA */
+			0x00310000,	/* DENALI_PI_126_DATA */
+			0x004d4d00,	/* DENALI_PI_127_DATA */
+			0x00120024,	/* DENALI_PI_128_DATA */
+			0x4d000031,	/* DENALI_PI_129_DATA */
+			0x0000144d,	/* DENALI_PI_130_DATA */
+			0x00310009,	/* DENALI_PI_131_DATA */
+			0x004d4d00,	/* DENALI_PI_132_DATA */
+			0x00000004,	/* DENALI_PI_133_DATA */
+			0x4d000031,	/* DENALI_PI_134_DATA */
+			0x0000244d,	/* DENALI_PI_135_DATA */
+			0x00310012,	/* DENALI_PI_136_DATA */
+			0x004d4d00,	/* DENALI_PI_137_DATA */
+			0x00090014,	/* DENALI_PI_138_DATA */
+			0x4d000031,	/* DENALI_PI_139_DATA */
+			0x0004004d,	/* DENALI_PI_140_DATA */
+			0x00310000,	/* DENALI_PI_141_DATA */
+			0x004d4d00,	/* DENALI_PI_142_DATA */
+			0x00120024,	/* DENALI_PI_143_DATA */
+			0x4d000031,	/* DENALI_PI_144_DATA */
+			0x0000144d,	/* DENALI_PI_145_DATA */
+			0x00310009,	/* DENALI_PI_146_DATA */
+			0x004d4d00,	/* DENALI_PI_147_DATA */
+			0x00000004,	/* DENALI_PI_148_DATA */
+			0x4d000031,	/* DENALI_PI_149_DATA */
+			0x0000244d,	/* DENALI_PI_150_DATA */
+			0x00310012,	/* DENALI_PI_151_DATA */
+			0x004d4d00,	/* DENALI_PI_152_DATA */
+			0x00090014,	/* DENALI_PI_153_DATA */
+			0x4d000031,	/* DENALI_PI_154_DATA */
+			0x0200004d,	/* DENALI_PI_155_DATA */
+			0x00c8000d,	/* DENALI_PI_156_DATA */
+			0x08080064,	/* DENALI_PI_157_DATA */
+			0x040a0404,	/* DENALI_PI_158_DATA */
+			0x03000d92,	/* DENALI_PI_159_DATA */
+			0x010a2001,	/* DENALI_PI_160_DATA */
+			0x0f11080a,	/* DENALI_PI_161_DATA */
+			0x0000110a,	/* DENALI_PI_162_DATA */
+			0x2200d92e,	/* DENALI_PI_163_DATA */
+			0x080c2003,	/* DENALI_PI_164_DATA */
+			0x0809080a,	/* DENALI_PI_165_DATA */
+			0x00000a0a,	/* DENALI_PI_166_DATA */
+			0x11006c97,	/* DENALI_PI_167_DATA */
+			0x040a2002,	/* DENALI_PI_168_DATA */
+			0x0200020a,	/* DENALI_PI_169_DATA */
+			0x02000200,	/* DENALI_PI_170_DATA */
+			0x02000200,	/* DENALI_PI_171_DATA */
+			0x02000200,	/* DENALI_PI_172_DATA */
+			0x02000200,	/* DENALI_PI_173_DATA */
+			0x00000000,	/* DENALI_PI_174_DATA */
+			0x00000000,	/* DENALI_PI_175_DATA */
+			0x00000000,	/* DENALI_PI_176_DATA */
+			0x00000000,	/* DENALI_PI_177_DATA */
+			0x00000000,	/* DENALI_PI_178_DATA */
+			0x00000000,	/* DENALI_PI_179_DATA */
+			0x00000000,	/* DENALI_PI_180_DATA */
+			0x00000000,	/* DENALI_PI_181_DATA */
+			0x00000000,	/* DENALI_PI_182_DATA */
+			0x00000000,	/* DENALI_PI_183_DATA */
+			0x00000000,	/* DENALI_PI_184_DATA */
+			0x00000000,	/* DENALI_PI_185_DATA */
+			0x01000400,	/* DENALI_PI_186_DATA */
+			0x00017600,	/* DENALI_PI_187_DATA */
+			0x00000e9c,	/* DENALI_PI_188_DATA */
+			0x00001850,	/* DENALI_PI_189_DATA */
+			0x0000f320,	/* DENALI_PI_190_DATA */
+			0x00000c20,	/* DENALI_PI_191_DATA */
+			0x00007940,	/* DENALI_PI_192_DATA */
+			0x08000000,	/* DENALI_PI_193_DATA */
+			0x00000100,	/* DENALI_PI_194_DATA */
+			0x00000000,	/* DENALI_PI_195_DATA */
+			0x00000000,	/* DENALI_PI_196_DATA */
+			0x00000000,	/* DENALI_PI_197_DATA */
+			0x00000000,	/* DENALI_PI_198_DATA */
+			0x00000002	/* DENALI_PI_199_DATA */
+		}
+	},
+	{
+		{
+			0x76543210,	/* DENALI_PHY_00_DATA */
+			0x0004f008,	/* DENALI_PHY_01_DATA */
+			0x00020119,	/* DENALI_PHY_02_DATA */
+			0x00000000,	/* DENALI_PHY_03_DATA */
+			0x00000000,	/* DENALI_PHY_04_DATA */
+			0x00010000,	/* DENALI_PHY_05_DATA */
+			0x01665555,	/* DENALI_PHY_06_DATA */
+			0x03665555,	/* DENALI_PHY_07_DATA */
+			0x00010f00,	/* DENALI_PHY_08_DATA */
+			0x04000100,	/* DENALI_PHY_09_DATA */
+			0x00000001,	/* DENALI_PHY_10_DATA */
+			0x00170180,	/* DENALI_PHY_11_DATA */
+			0x00cc0201,	/* DENALI_PHY_12_DATA */
+			0x00030066,	/* DENALI_PHY_13_DATA */
+			0x00000000,	/* DENALI_PHY_14_DATA */
+			0x00000000,	/* DENALI_PHY_15_DATA */
+			0x00000000,	/* DENALI_PHY_16_DATA */
+			0x00000000,	/* DENALI_PHY_17_DATA */
+			0x00000000,	/* DENALI_PHY_18_DATA */
+			0x00000000,	/* DENALI_PHY_19_DATA */
+			0x00000000,	/* DENALI_PHY_20_DATA */
+			0x00000000,	/* DENALI_PHY_21_DATA */
+			0x04080000,	/* DENALI_PHY_22_DATA */
+			0x04080400,	/* DENALI_PHY_23_DATA */
+			0x30000000,	/* DENALI_PHY_24_DATA */
+			0x0c00c007,	/* DENALI_PHY_25_DATA */
+			0x00000100,	/* DENALI_PHY_26_DATA */
+			0x00000000,	/* DENALI_PHY_27_DATA */
+			0xfd02fe01,	/* DENALI_PHY_28_DATA */
+			0xf708fb04,	/* DENALI_PHY_29_DATA */
+			0xdf20ef10,	/* DENALI_PHY_30_DATA */
+			0x7f80bf40,	/* DENALI_PHY_31_DATA */
+			0x0001aaaa,	/* DENALI_PHY_32_DATA */
+			0x00000000,	/* DENALI_PHY_33_DATA */
+			0x00000000,	/* DENALI_PHY_34_DATA */
+			0x00000000,	/* DENALI_PHY_35_DATA */
+			0x00000000,	/* DENALI_PHY_36_DATA */
+			0x00000000,	/* DENALI_PHY_37_DATA */
+			0x00000000,	/* DENALI_PHY_38_DATA */
+			0x00000000,	/* DENALI_PHY_39_DATA */
+			0x00000000,	/* DENALI_PHY_40_DATA */
+			0x00000000,	/* DENALI_PHY_41_DATA */
+			0x00000000,	/* DENALI_PHY_42_DATA */
+			0x00000000,	/* DENALI_PHY_43_DATA */
+			0x00000000,	/* DENALI_PHY_44_DATA */
+			0x00000000,	/* DENALI_PHY_45_DATA */
+			0x00000000,	/* DENALI_PHY_46_DATA */
+			0x00000000,	/* DENALI_PHY_47_DATA */
+			0x00000000,	/* DENALI_PHY_48_DATA */
+			0x00000000,	/* DENALI_PHY_49_DATA */
+			0x00000000,	/* DENALI_PHY_50_DATA */
+			0x00000000,	/* DENALI_PHY_51_DATA */
+			0x00200000,	/* DENALI_PHY_52_DATA */
+			0x00000000,	/* DENALI_PHY_53_DATA */
+			0x00000000,	/* DENALI_PHY_54_DATA */
+			0x00000000,	/* DENALI_PHY_55_DATA */
+			0x00000000,	/* DENALI_PHY_56_DATA */
+			0x00000000,	/* DENALI_PHY_57_DATA */
+			0x00000000,	/* DENALI_PHY_58_DATA */
+			0x02800280,	/* DENALI_PHY_59_DATA */
+			0x02800280,	/* DENALI_PHY_60_DATA */
+			0x02800280,	/* DENALI_PHY_61_DATA */
+			0x02800280,	/* DENALI_PHY_62_DATA */
+			0x00000280,	/* DENALI_PHY_63_DATA */
+			0x00000000,	/* DENALI_PHY_64_DATA */
+			0x00000000,	/* DENALI_PHY_65_DATA */
+			0x00000000,	/* DENALI_PHY_66_DATA */
+			0x00000000,	/* DENALI_PHY_67_DATA */
+			0x00800000,	/* DENALI_PHY_68_DATA */
+			0x00800080,	/* DENALI_PHY_69_DATA */
+			0x00800080,	/* DENALI_PHY_70_DATA */
+			0x00800080,	/* DENALI_PHY_71_DATA */
+			0x00800080,	/* DENALI_PHY_72_DATA */
+			0x00800080,	/* DENALI_PHY_73_DATA */
+			0x00800080,	/* DENALI_PHY_74_DATA */
+			0x00800080,	/* DENALI_PHY_75_DATA */
+			0x00800080,	/* DENALI_PHY_76_DATA */
+			0x01190080,	/* DENALI_PHY_77_DATA */
+			0x00000001,	/* DENALI_PHY_78_DATA */
+			0x00000000,	/* DENALI_PHY_79_DATA */
+			0x00000000,	/* DENALI_PHY_80_DATA */
+			0x00000200,	/* DENALI_PHY_81_DATA */
+			0x00000000,	/* DENALI_PHY_82_DATA */
+			0x51315152,	/* DENALI_PHY_83_DATA */
+			0xc0003150,	/* DENALI_PHY_84_DATA */
+			0x010000c0,	/* DENALI_PHY_85_DATA */
+			0x00100000,	/* DENALI_PHY_86_DATA */
+			0x07044204,	/* DENALI_PHY_87_DATA */
+			0x000f0c18,	/* DENALI_PHY_88_DATA */
+			0x01000140,	/* DENALI_PHY_89_DATA */
+			0x00000c10,	/* DENALI_PHY_90_DATA */
+			0x00000000,	/* DENALI_PHY_91_DATA */
+			0x00000000,	/* DENALI_PHY_92_DATA */
+			0x00000000,	/* DENALI_PHY_93_DATA */
+			0x00000000,	/* DENALI_PHY_94_DATA */
+			0x00000000,	/* DENALI_PHY_95_DATA */
+			0x00000000,	/* DENALI_PHY_96_DATA */
+			0x00000000,	/* DENALI_PHY_97_DATA */
+			0x00000000,	/* DENALI_PHY_98_DATA */
+			0x00000000,	/* DENALI_PHY_99_DATA */
+			0x00000000,	/* DENALI_PHY_100_DATA */
+			0x00000000,	/* DENALI_PHY_101_DATA */
+			0x00000000,	/* DENALI_PHY_102_DATA */
+			0x00000000,	/* DENALI_PHY_103_DATA */
+			0x00000000,	/* DENALI_PHY_104_DATA */
+			0x00000000,	/* DENALI_PHY_105_DATA */
+			0x00000000,	/* DENALI_PHY_106_DATA */
+			0x00000000,	/* DENALI_PHY_107_DATA */
+			0x00000000,	/* DENALI_PHY_108_DATA */
+			0x00000000,	/* DENALI_PHY_109_DATA */
+			0x00000000,	/* DENALI_PHY_110_DATA */
+			0x00000000,	/* DENALI_PHY_111_DATA */
+			0x00000000,	/* DENALI_PHY_112_DATA */
+			0x00000000,	/* DENALI_PHY_113_DATA */
+			0x00000000,	/* DENALI_PHY_114_DATA */
+			0x00000000,	/* DENALI_PHY_115_DATA */
+			0x00000000,	/* DENALI_PHY_116_DATA */
+			0x00000000,	/* DENALI_PHY_117_DATA */
+			0x00000000,	/* DENALI_PHY_118_DATA */
+			0x00000000,	/* DENALI_PHY_119_DATA */
+			0x00000000,	/* DENALI_PHY_120_DATA */
+			0x00000000,	/* DENALI_PHY_121_DATA */
+			0x00000000,	/* DENALI_PHY_122_DATA */
+			0x00000000,	/* DENALI_PHY_123_DATA */
+			0x00000000,	/* DENALI_PHY_124_DATA */
+			0x00000000,	/* DENALI_PHY_125_DATA */
+			0x00000000,	/* DENALI_PHY_126_DATA */
+			0x00000000,	/* DENALI_PHY_127_DATA */
+			0x76543210,	/* DENALI_PHY_128_DATA */
+			0x0004f008,	/* DENALI_PHY_129_DATA */
+			0x00020119,	/* DENALI_PHY_130_DATA */
+			0x00000000,	/* DENALI_PHY_131_DATA */
+			0x00000000,	/* DENALI_PHY_132_DATA */
+			0x00010000,	/* DENALI_PHY_133_DATA */
+			0x01665555,	/* DENALI_PHY_134_DATA */
+			0x03665555,	/* DENALI_PHY_135_DATA */
+			0x00010f00,	/* DENALI_PHY_136_DATA */
+			0x04000100,	/* DENALI_PHY_137_DATA */
+			0x00000001,	/* DENALI_PHY_138_DATA */
+			0x00170180,	/* DENALI_PHY_139_DATA */
+			0x00cc0201,	/* DENALI_PHY_140_DATA */
+			0x00030066,	/* DENALI_PHY_141_DATA */
+			0x00000000,	/* DENALI_PHY_142_DATA */
+			0x00000000,	/* DENALI_PHY_143_DATA */
+			0x00000000,	/* DENALI_PHY_144_DATA */
+			0x00000000,	/* DENALI_PHY_145_DATA */
+			0x00000000,	/* DENALI_PHY_146_DATA */
+			0x00000000,	/* DENALI_PHY_147_DATA */
+			0x00000000,	/* DENALI_PHY_148_DATA */
+			0x00000000,	/* DENALI_PHY_149_DATA */
+			0x04080000,	/* DENALI_PHY_150_DATA */
+			0x04080400,	/* DENALI_PHY_151_DATA */
+			0x30000000,	/* DENALI_PHY_152_DATA */
+			0x0c00c007,	/* DENALI_PHY_153_DATA */
+			0x00000100,	/* DENALI_PHY_154_DATA */
+			0x00000000,	/* DENALI_PHY_155_DATA */
+			0xfd02fe01,	/* DENALI_PHY_156_DATA */
+			0xf708fb04,	/* DENALI_PHY_157_DATA */
+			0xdf20ef10,	/* DENALI_PHY_158_DATA */
+			0x7f80bf40,	/* DENALI_PHY_159_DATA */
+			0x0000aaaa,	/* DENALI_PHY_160_DATA */
+			0x00000000,	/* DENALI_PHY_161_DATA */
+			0x00000000,	/* DENALI_PHY_162_DATA */
+			0x00000000,	/* DENALI_PHY_163_DATA */
+			0x00000000,	/* DENALI_PHY_164_DATA */
+			0x00000000,	/* DENALI_PHY_165_DATA */
+			0x00000000,	/* DENALI_PHY_166_DATA */
+			0x00000000,	/* DENALI_PHY_167_DATA */
+			0x00000000,	/* DENALI_PHY_168_DATA */
+			0x00000000,	/* DENALI_PHY_169_DATA */
+			0x00000000,	/* DENALI_PHY_170_DATA */
+			0x00000000,	/* DENALI_PHY_171_DATA */
+			0x00000000,	/* DENALI_PHY_172_DATA */
+			0x00000000,	/* DENALI_PHY_173_DATA */
+			0x00000000,	/* DENALI_PHY_174_DATA */
+			0x00000000,	/* DENALI_PHY_175_DATA */
+			0x00000000,	/* DENALI_PHY_176_DATA */
+			0x00000000,	/* DENALI_PHY_177_DATA */
+			0x00000000,	/* DENALI_PHY_178_DATA */
+			0x00000000,	/* DENALI_PHY_179_DATA */
+			0x00200000,	/* DENALI_PHY_180_DATA */
+			0x00000000,	/* DENALI_PHY_181_DATA */
+			0x00000000,	/* DENALI_PHY_182_DATA */
+			0x00000000,	/* DENALI_PHY_183_DATA */
+			0x00000000,	/* DENALI_PHY_184_DATA */
+			0x00000000,	/* DENALI_PHY_185_DATA */
+			0x00000000,	/* DENALI_PHY_186_DATA */
+			0x02800280,	/* DENALI_PHY_187_DATA */
+			0x02800280,	/* DENALI_PHY_188_DATA */
+			0x02800280,	/* DENALI_PHY_189_DATA */
+			0x02800280,	/* DENALI_PHY_190_DATA */
+			0x00000280,	/* DENALI_PHY_191_DATA */
+			0x00000000,	/* DENALI_PHY_192_DATA */
+			0x00000000,	/* DENALI_PHY_193_DATA */
+			0x00000000,	/* DENALI_PHY_194_DATA */
+			0x00000000,	/* DENALI_PHY_195_DATA */
+			0x00800000,	/* DENALI_PHY_196_DATA */
+			0x00800080,	/* DENALI_PHY_197_DATA */
+			0x00800080,	/* DENALI_PHY_198_DATA */
+			0x00800080,	/* DENALI_PHY_199_DATA */
+			0x00800080,	/* DENALI_PHY_200_DATA */
+			0x00800080,	/* DENALI_PHY_201_DATA */
+			0x00800080,	/* DENALI_PHY_202_DATA */
+			0x00800080,	/* DENALI_PHY_203_DATA */
+			0x00800080,	/* DENALI_PHY_204_DATA */
+			0x01190080,	/* DENALI_PHY_205_DATA */
+			0x00000001,	/* DENALI_PHY_206_DATA */
+			0x00000000,	/* DENALI_PHY_207_DATA */
+			0x00000000,	/* DENALI_PHY_208_DATA */
+			0x00000200,	/* DENALI_PHY_209_DATA */
+			0x00000000,	/* DENALI_PHY_210_DATA */
+			0x51315152,	/* DENALI_PHY_211_DATA */
+			0xc0003150,	/* DENALI_PHY_212_DATA */
+			0x010000c0,	/* DENALI_PHY_213_DATA */
+			0x00100000,	/* DENALI_PHY_214_DATA */
+			0x07044204,	/* DENALI_PHY_215_DATA */
+			0x000f0c18,	/* DENALI_PHY_216_DATA */
+			0x01000140,	/* DENALI_PHY_217_DATA */
+			0x00000c10,	/* DENALI_PHY_218_DATA */
+			0x00000000,	/* DENALI_PHY_219_DATA */
+			0x00000000,	/* DENALI_PHY_220_DATA */
+			0x00000000,	/* DENALI_PHY_221_DATA */
+			0x00000000,	/* DENALI_PHY_222_DATA */
+			0x00000000,	/* DENALI_PHY_223_DATA */
+			0x00000000,	/* DENALI_PHY_224_DATA */
+			0x00000000,	/* DENALI_PHY_225_DATA */
+			0x00000000,	/* DENALI_PHY_226_DATA */
+			0x00000000,	/* DENALI_PHY_227_DATA */
+			0x00000000,	/* DENALI_PHY_228_DATA */
+			0x00000000,	/* DENALI_PHY_229_DATA */
+			0x00000000,	/* DENALI_PHY_230_DATA */
+			0x00000000,	/* DENALI_PHY_231_DATA */
+			0x00000000,	/* DENALI_PHY_232_DATA */
+			0x00000000,	/* DENALI_PHY_233_DATA */
+			0x00000000,	/* DENALI_PHY_234_DATA */
+			0x00000000,	/* DENALI_PHY_235_DATA */
+			0x00000000,	/* DENALI_PHY_236_DATA */
+			0x00000000,	/* DENALI_PHY_237_DATA */
+			0x00000000,	/* DENALI_PHY_238_DATA */
+			0x00000000,	/* DENALI_PHY_239_DATA */
+			0x00000000,	/* DENALI_PHY_240_DATA */
+			0x00000000,	/* DENALI_PHY_241_DATA */
+			0x00000000,	/* DENALI_PHY_242_DATA */
+			0x00000000,	/* DENALI_PHY_243_DATA */
+			0x00000000,	/* DENALI_PHY_244_DATA */
+			0x00000000,	/* DENALI_PHY_245_DATA */
+			0x00000000,	/* DENALI_PHY_246_DATA */
+			0x00000000,	/* DENALI_PHY_247_DATA */
+			0x00000000,	/* DENALI_PHY_248_DATA */
+			0x00000000,	/* DENALI_PHY_249_DATA */
+			0x00000000,	/* DENALI_PHY_250_DATA */
+			0x00000000,	/* DENALI_PHY_251_DATA */
+			0x00000000,	/* DENALI_PHY_252_DATA */
+			0x00000000,	/* DENALI_PHY_253_DATA */
+			0x00000000,	/* DENALI_PHY_254_DATA */
+			0x00000000,	/* DENALI_PHY_255_DATA */
+			0x76543210,	/* DENALI_PHY_256_DATA */
+			0x0004f008,	/* DENALI_PHY_257_DATA */
+			0x00020119,	/* DENALI_PHY_258_DATA */
+			0x00000000,	/* DENALI_PHY_259_DATA */
+			0x00000000,	/* DENALI_PHY_260_DATA */
+			0x00010000,	/* DENALI_PHY_261_DATA */
+			0x01665555,	/* DENALI_PHY_262_DATA */
+			0x03665555,	/* DENALI_PHY_263_DATA */
+			0x00010f00,	/* DENALI_PHY_264_DATA */
+			0x04000100,	/* DENALI_PHY_265_DATA */
+			0x00000001,	/* DENALI_PHY_266_DATA */
+			0x00170180,	/* DENALI_PHY_267_DATA */
+			0x00cc0201,	/* DENALI_PHY_268_DATA */
+			0x00030066,	/* DENALI_PHY_269_DATA */
+			0x00000000,	/* DENALI_PHY_270_DATA */
+			0x00000000,	/* DENALI_PHY_271_DATA */
+			0x00000000,	/* DENALI_PHY_272_DATA */
+			0x00000000,	/* DENALI_PHY_273_DATA */
+			0x00000000,	/* DENALI_PHY_274_DATA */
+			0x00000000,	/* DENALI_PHY_275_DATA */
+			0x00000000,	/* DENALI_PHY_276_DATA */
+			0x00000000,	/* DENALI_PHY_277_DATA */
+			0x04080000,	/* DENALI_PHY_278_DATA */
+			0x04080400,	/* DENALI_PHY_279_DATA */
+			0x30000000,	/* DENALI_PHY_280_DATA */
+			0x0c00c007,	/* DENALI_PHY_281_DATA */
+			0x00000100,	/* DENALI_PHY_282_DATA */
+			0x00000000,	/* DENALI_PHY_283_DATA */
+			0xfd02fe01,	/* DENALI_PHY_284_DATA */
+			0xf708fb04,	/* DENALI_PHY_285_DATA */
+			0xdf20ef10,	/* DENALI_PHY_286_DATA */
+			0x7f80bf40,	/* DENALI_PHY_287_DATA */
+			0x0001aaaa,	/* DENALI_PHY_288_DATA */
+			0x00000000,	/* DENALI_PHY_289_DATA */
+			0x00000000,	/* DENALI_PHY_290_DATA */
+			0x00000000,	/* DENALI_PHY_291_DATA */
+			0x00000000,	/* DENALI_PHY_292_DATA */
+			0x00000000,	/* DENALI_PHY_293_DATA */
+			0x00000000,	/* DENALI_PHY_294_DATA */
+			0x00000000,	/* DENALI_PHY_295_DATA */
+			0x00000000,	/* DENALI_PHY_296_DATA */
+			0x00000000,	/* DENALI_PHY_297_DATA */
+			0x00000000,	/* DENALI_PHY_298_DATA */
+			0x00000000,	/* DENALI_PHY_299_DATA */
+			0x00000000,	/* DENALI_PHY_300_DATA */
+			0x00000000,	/* DENALI_PHY_301_DATA */
+			0x00000000,	/* DENALI_PHY_302_DATA */
+			0x00000000,	/* DENALI_PHY_303_DATA */
+			0x00000000,	/* DENALI_PHY_304_DATA */
+			0x00000000,	/* DENALI_PHY_305_DATA */
+			0x00000000,	/* DENALI_PHY_306_DATA */
+			0x00000000,	/* DENALI_PHY_307_DATA */
+			0x00200000,	/* DENALI_PHY_308_DATA */
+			0x00000000,	/* DENALI_PHY_309_DATA */
+			0x00000000,	/* DENALI_PHY_310_DATA */
+			0x00000000,	/* DENALI_PHY_311_DATA */
+			0x00000000,	/* DENALI_PHY_312_DATA */
+			0x00000000,	/* DENALI_PHY_313_DATA */
+			0x00000000,	/* DENALI_PHY_314_DATA */
+			0x02800280,	/* DENALI_PHY_315_DATA */
+			0x02800280,	/* DENALI_PHY_316_DATA */
+			0x02800280,	/* DENALI_PHY_317_DATA */
+			0x02800280,	/* DENALI_PHY_318_DATA */
+			0x00000280,	/* DENALI_PHY_319_DATA */
+			0x00000000,	/* DENALI_PHY_320_DATA */
+			0x00000000,	/* DENALI_PHY_321_DATA */
+			0x00000000,	/* DENALI_PHY_322_DATA */
+			0x00000000,	/* DENALI_PHY_323_DATA */
+			0x00800000,	/* DENALI_PHY_324_DATA */
+			0x00800080,	/* DENALI_PHY_325_DATA */
+			0x00800080,	/* DENALI_PHY_326_DATA */
+			0x00800080,	/* DENALI_PHY_327_DATA */
+			0x00800080,	/* DENALI_PHY_328_DATA */
+			0x00800080,	/* DENALI_PHY_329_DATA */
+			0x00800080,	/* DENALI_PHY_330_DATA */
+			0x00800080,	/* DENALI_PHY_331_DATA */
+			0x00800080,	/* DENALI_PHY_332_DATA */
+			0x01190080,	/* DENALI_PHY_333_DATA */
+			0x00000001,	/* DENALI_PHY_334_DATA */
+			0x00000000,	/* DENALI_PHY_335_DATA */
+			0x00000000,	/* DENALI_PHY_336_DATA */
+			0x00000200,	/* DENALI_PHY_337_DATA */
+			0x00000000,	/* DENALI_PHY_338_DATA */
+			0x51315152,	/* DENALI_PHY_339_DATA */
+			0xc0003150,	/* DENALI_PHY_340_DATA */
+			0x010000c0,	/* DENALI_PHY_341_DATA */
+			0x00100000,	/* DENALI_PHY_342_DATA */
+			0x07044204,	/* DENALI_PHY_343_DATA */
+			0x000f0c18,	/* DENALI_PHY_344_DATA */
+			0x01000140,	/* DENALI_PHY_345_DATA */
+			0x00000c10,	/* DENALI_PHY_346_DATA */
+			0x00000000,	/* DENALI_PHY_347_DATA */
+			0x00000000,	/* DENALI_PHY_348_DATA */
+			0x00000000,	/* DENALI_PHY_349_DATA */
+			0x00000000,	/* DENALI_PHY_350_DATA */
+			0x00000000,	/* DENALI_PHY_351_DATA */
+			0x00000000,	/* DENALI_PHY_352_DATA */
+			0x00000000,	/* DENALI_PHY_353_DATA */
+			0x00000000,	/* DENALI_PHY_354_DATA */
+			0x00000000,	/* DENALI_PHY_355_DATA */
+			0x00000000,	/* DENALI_PHY_356_DATA */
+			0x00000000,	/* DENALI_PHY_357_DATA */
+			0x00000000,	/* DENALI_PHY_358_DATA */
+			0x00000000,	/* DENALI_PHY_359_DATA */
+			0x00000000,	/* DENALI_PHY_360_DATA */
+			0x00000000,	/* DENALI_PHY_361_DATA */
+			0x00000000,	/* DENALI_PHY_362_DATA */
+			0x00000000,	/* DENALI_PHY_363_DATA */
+			0x00000000,	/* DENALI_PHY_364_DATA */
+			0x00000000,	/* DENALI_PHY_365_DATA */
+			0x00000000,	/* DENALI_PHY_366_DATA */
+			0x00000000,	/* DENALI_PHY_367_DATA */
+			0x00000000,	/* DENALI_PHY_368_DATA */
+			0x00000000,	/* DENALI_PHY_369_DATA */
+			0x00000000,	/* DENALI_PHY_370_DATA */
+			0x00000000,	/* DENALI_PHY_371_DATA */
+			0x00000000,	/* DENALI_PHY_372_DATA */
+			0x00000000,	/* DENALI_PHY_373_DATA */
+			0x00000000,	/* DENALI_PHY_374_DATA */
+			0x00000000,	/* DENALI_PHY_375_DATA */
+			0x00000000,	/* DENALI_PHY_376_DATA */
+			0x00000000,	/* DENALI_PHY_377_DATA */
+			0x00000000,	/* DENALI_PHY_378_DATA */
+			0x00000000,	/* DENALI_PHY_379_DATA */
+			0x00000000,	/* DENALI_PHY_380_DATA */
+			0x00000000,	/* DENALI_PHY_381_DATA */
+			0x00000000,	/* DENALI_PHY_382_DATA */
+			0x00000000,	/* DENALI_PHY_383_DATA */
+			0x76543210,	/* DENALI_PHY_384_DATA */
+			0x0004f008,	/* DENALI_PHY_385_DATA */
+			0x00020119,	/* DENALI_PHY_386_DATA */
+			0x00000000,	/* DENALI_PHY_387_DATA */
+			0x00000000,	/* DENALI_PHY_388_DATA */
+			0x00010000,	/* DENALI_PHY_389_DATA */
+			0x01665555,	/* DENALI_PHY_390_DATA */
+			0x03665555,	/* DENALI_PHY_391_DATA */
+			0x00010f00,	/* DENALI_PHY_392_DATA */
+			0x04000100,	/* DENALI_PHY_393_DATA */
+			0x00000001,	/* DENALI_PHY_394_DATA */
+			0x00170180,	/* DENALI_PHY_395_DATA */
+			0x00cc0201,	/* DENALI_PHY_396_DATA */
+			0x00030066,	/* DENALI_PHY_397_DATA */
+			0x00000000,	/* DENALI_PHY_398_DATA */
+			0x00000000,	/* DENALI_PHY_399_DATA */
+			0x00000000,	/* DENALI_PHY_400_DATA */
+			0x00000000,	/* DENALI_PHY_401_DATA */
+			0x00000000,	/* DENALI_PHY_402_DATA */
+			0x00000000,	/* DENALI_PHY_403_DATA */
+			0x00000000,	/* DENALI_PHY_404_DATA */
+			0x00000000,	/* DENALI_PHY_405_DATA */
+			0x04080000,	/* DENALI_PHY_406_DATA */
+			0x04080400,	/* DENALI_PHY_407_DATA */
+			0x30000000,	/* DENALI_PHY_408_DATA */
+			0x0c00c007,	/* DENALI_PHY_409_DATA */
+			0x00000100,	/* DENALI_PHY_410_DATA */
+			0x00000000,	/* DENALI_PHY_411_DATA */
+			0xfd02fe01,	/* DENALI_PHY_412_DATA */
+			0xf708fb04,	/* DENALI_PHY_413_DATA */
+			0xdf20ef10,	/* DENALI_PHY_414_DATA */
+			0x7f80bf40,	/* DENALI_PHY_415_DATA */
+			0x0000aaaa,	/* DENALI_PHY_416_DATA */
+			0x00000000,	/* DENALI_PHY_417_DATA */
+			0x00000000,	/* DENALI_PHY_418_DATA */
+			0x00000000,	/* DENALI_PHY_419_DATA */
+			0x00000000,	/* DENALI_PHY_420_DATA */
+			0x00000000,	/* DENALI_PHY_421_DATA */
+			0x00000000,	/* DENALI_PHY_422_DATA */
+			0x00000000,	/* DENALI_PHY_423_DATA */
+			0x00000000,	/* DENALI_PHY_424_DATA */
+			0x00000000,	/* DENALI_PHY_425_DATA */
+			0x00000000,	/* DENALI_PHY_426_DATA */
+			0x00000000,	/* DENALI_PHY_427_DATA */
+			0x00000000,	/* DENALI_PHY_428_DATA */
+			0x00000000,	/* DENALI_PHY_429_DATA */
+			0x00000000,	/* DENALI_PHY_430_DATA */
+			0x00000000,	/* DENALI_PHY_431_DATA */
+			0x00000000,	/* DENALI_PHY_432_DATA */
+			0x00000000,	/* DENALI_PHY_433_DATA */
+			0x00000000,	/* DENALI_PHY_434_DATA */
+			0x00000000,	/* DENALI_PHY_435_DATA */
+			0x00200000,	/* DENALI_PHY_436_DATA */
+			0x00000000,	/* DENALI_PHY_437_DATA */
+			0x00000000,	/* DENALI_PHY_438_DATA */
+			0x00000000,	/* DENALI_PHY_439_DATA */
+			0x00000000,	/* DENALI_PHY_440_DATA */
+			0x00000000,	/* DENALI_PHY_441_DATA */
+			0x00000000,	/* DENALI_PHY_442_DATA */
+			0x02800280,	/* DENALI_PHY_443_DATA */
+			0x02800280,	/* DENALI_PHY_444_DATA */
+			0x02800280,	/* DENALI_PHY_445_DATA */
+			0x02800280,	/* DENALI_PHY_446_DATA */
+			0x00000280,	/* DENALI_PHY_447_DATA */
+			0x00000000,	/* DENALI_PHY_448_DATA */
+			0x00000000,	/* DENALI_PHY_449_DATA */
+			0x00000000,	/* DENALI_PHY_450_DATA */
+			0x00000000,	/* DENALI_PHY_451_DATA */
+			0x00800000,	/* DENALI_PHY_452_DATA */
+			0x00800080,	/* DENALI_PHY_453_DATA */
+			0x00800080,	/* DENALI_PHY_454_DATA */
+			0x00800080,	/* DENALI_PHY_455_DATA */
+			0x00800080,	/* DENALI_PHY_456_DATA */
+			0x00800080,	/* DENALI_PHY_457_DATA */
+			0x00800080,	/* DENALI_PHY_458_DATA */
+			0x00800080,	/* DENALI_PHY_459_DATA */
+			0x00800080,	/* DENALI_PHY_460_DATA */
+			0x01190080,	/* DENALI_PHY_461_DATA */
+			0x00000001,	/* DENALI_PHY_462_DATA */
+			0x00000000,	/* DENALI_PHY_463_DATA */
+			0x00000000,	/* DENALI_PHY_464_DATA */
+			0x00000200,	/* DENALI_PHY_465_DATA */
+			0x00000000,	/* DENALI_PHY_466_DATA */
+			0x51315152,	/* DENALI_PHY_467_DATA */
+			0xc0003150,	/* DENALI_PHY_468_DATA */
+			0x010000c0,	/* DENALI_PHY_469_DATA */
+			0x00100000,	/* DENALI_PHY_470_DATA */
+			0x07044204,	/* DENALI_PHY_471_DATA */
+			0x000f0c18,	/* DENALI_PHY_472_DATA */
+			0x01000140,	/* DENALI_PHY_473_DATA */
+			0x00000c10,	/* DENALI_PHY_474_DATA */
+			0x00000000,	/* DENALI_PHY_475_DATA */
+			0x00000000,	/* DENALI_PHY_476_DATA */
+			0x00000000,	/* DENALI_PHY_477_DATA */
+			0x00000000,	/* DENALI_PHY_478_DATA */
+			0x00000000,	/* DENALI_PHY_479_DATA */
+			0x00000000,	/* DENALI_PHY_480_DATA */
+			0x00000000,	/* DENALI_PHY_481_DATA */
+			0x00000000,	/* DENALI_PHY_482_DATA */
+			0x00000000,	/* DENALI_PHY_483_DATA */
+			0x00000000,	/* DENALI_PHY_484_DATA */
+			0x00000000,	/* DENALI_PHY_485_DATA */
+			0x00000000,	/* DENALI_PHY_486_DATA */
+			0x00000000,	/* DENALI_PHY_487_DATA */
+			0x00000000,	/* DENALI_PHY_488_DATA */
+			0x00000000,	/* DENALI_PHY_489_DATA */
+			0x00000000,	/* DENALI_PHY_490_DATA */
+			0x00000000,	/* DENALI_PHY_491_DATA */
+			0x00000000,	/* DENALI_PHY_492_DATA */
+			0x00000000,	/* DENALI_PHY_493_DATA */
+			0x00000000,	/* DENALI_PHY_494_DATA */
+			0x00000000,	/* DENALI_PHY_495_DATA */
+			0x00000000,	/* DENALI_PHY_496_DATA */
+			0x00000000,	/* DENALI_PHY_497_DATA */
+			0x00000000,	/* DENALI_PHY_498_DATA */
+			0x00000000,	/* DENALI_PHY_499_DATA */
+			0x00000000,	/* DENALI_PHY_500_DATA */
+			0x00000000,	/* DENALI_PHY_501_DATA */
+			0x00000000,	/* DENALI_PHY_502_DATA */
+			0x00000000,	/* DENALI_PHY_503_DATA */
+			0x00000000,	/* DENALI_PHY_504_DATA */
+			0x00000000,	/* DENALI_PHY_505_DATA */
+			0x00000000,	/* DENALI_PHY_506_DATA */
+			0x00000000,	/* DENALI_PHY_507_DATA */
+			0x00000000,	/* DENALI_PHY_508_DATA */
+			0x00000000,	/* DENALI_PHY_509_DATA */
+			0x00000000,	/* DENALI_PHY_510_DATA */
+			0x00000000,	/* DENALI_PHY_511_DATA */
+			0x00000000,	/* DENALI_PHY_512_DATA */
+			0x00000000,	/* DENALI_PHY_513_DATA */
+			0x00000000,	/* DENALI_PHY_514_DATA */
+			0x00000000,	/* DENALI_PHY_515_DATA */
+			0x00000000,	/* DENALI_PHY_516_DATA */
+			0x00000000,	/* DENALI_PHY_517_DATA */
+			0x00000000,	/* DENALI_PHY_518_DATA */
+			0x00000002,	/* DENALI_PHY_519_DATA */
+			0x00000000,	/* DENALI_PHY_520_DATA */
+			0x00000000,	/* DENALI_PHY_521_DATA */
+			0x00000000,	/* DENALI_PHY_522_DATA */
+			0x00400320,	/* DENALI_PHY_523_DATA */
+			0x00000040,	/* DENALI_PHY_524_DATA */
+			0x00dcba98,	/* DENALI_PHY_525_DATA */
+			0x00000000,	/* DENALI_PHY_526_DATA */
+			0x00dcba98,	/* DENALI_PHY_527_DATA */
+			0x01000000,	/* DENALI_PHY_528_DATA */
+			0x00020003,	/* DENALI_PHY_529_DATA */
+			0x00000000,	/* DENALI_PHY_530_DATA */
+			0x00000000,	/* DENALI_PHY_531_DATA */
+			0x00000000,	/* DENALI_PHY_532_DATA */
+			0x0000002a,	/* DENALI_PHY_533_DATA */
+			0x00000015,	/* DENALI_PHY_534_DATA */
+			0x00000015,	/* DENALI_PHY_535_DATA */
+			0x0000002a,	/* DENALI_PHY_536_DATA */
+			0x00000033,	/* DENALI_PHY_537_DATA */
+			0x0000000c,	/* DENALI_PHY_538_DATA */
+			0x0000000c,	/* DENALI_PHY_539_DATA */
+			0x00000033,	/* DENALI_PHY_540_DATA */
+			0x0a418820,	/* DENALI_PHY_541_DATA */
+			0x003f0000,	/* DENALI_PHY_542_DATA */
+			0x0000003f,	/* DENALI_PHY_543_DATA */
+			0x00030055,	/* DENALI_PHY_544_DATA */
+			0x03000300,	/* DENALI_PHY_545_DATA */
+			0x03000300,	/* DENALI_PHY_546_DATA */
+			0x00000300,	/* DENALI_PHY_547_DATA */
+			0x42080010,	/* DENALI_PHY_548_DATA */
+			0x00000003,	/* DENALI_PHY_549_DATA */
+			0x00000000,	/* DENALI_PHY_550_DATA */
+			0x00000000,	/* DENALI_PHY_551_DATA */
+			0x00000000,	/* DENALI_PHY_552_DATA */
+			0x00000000,	/* DENALI_PHY_553_DATA */
+			0x00000000,	/* DENALI_PHY_554_DATA */
+			0x00000000,	/* DENALI_PHY_555_DATA */
+			0x00000000,	/* DENALI_PHY_556_DATA */
+			0x00000000,	/* DENALI_PHY_557_DATA */
+			0x00000000,	/* DENALI_PHY_558_DATA */
+			0x00000000,	/* DENALI_PHY_559_DATA */
+			0x00000000,	/* DENALI_PHY_560_DATA */
+			0x00000000,	/* DENALI_PHY_561_DATA */
+			0x00000000,	/* DENALI_PHY_562_DATA */
+			0x00000000,	/* DENALI_PHY_563_DATA */
+			0x00000000,	/* DENALI_PHY_564_DATA */
+			0x00000000,	/* DENALI_PHY_565_DATA */
+			0x00000000,	/* DENALI_PHY_566_DATA */
+			0x00000000,	/* DENALI_PHY_567_DATA */
+			0x00000000,	/* DENALI_PHY_568_DATA */
+			0x00000000,	/* DENALI_PHY_569_DATA */
+			0x00000000,	/* DENALI_PHY_570_DATA */
+			0x00000000,	/* DENALI_PHY_571_DATA */
+			0x00000000,	/* DENALI_PHY_572_DATA */
+			0x00000000,	/* DENALI_PHY_573_DATA */
+			0x00000000,	/* DENALI_PHY_574_DATA */
+			0x00000000,	/* DENALI_PHY_575_DATA */
+			0x00000000,	/* DENALI_PHY_576_DATA */
+			0x00000000,	/* DENALI_PHY_577_DATA */
+			0x00000000,	/* DENALI_PHY_578_DATA */
+			0x00000000,	/* DENALI_PHY_579_DATA */
+			0x00000000,	/* DENALI_PHY_580_DATA */
+			0x00000000,	/* DENALI_PHY_581_DATA */
+			0x00000000,	/* DENALI_PHY_582_DATA */
+			0x00000000,	/* DENALI_PHY_583_DATA */
+			0x00000000,	/* DENALI_PHY_584_DATA */
+			0x00000000,	/* DENALI_PHY_585_DATA */
+			0x00000000,	/* DENALI_PHY_586_DATA */
+			0x00000000,	/* DENALI_PHY_587_DATA */
+			0x00000000,	/* DENALI_PHY_588_DATA */
+			0x00000000,	/* DENALI_PHY_589_DATA */
+			0x00000000,	/* DENALI_PHY_590_DATA */
+			0x00000000,	/* DENALI_PHY_591_DATA */
+			0x00000000,	/* DENALI_PHY_592_DATA */
+			0x00000000,	/* DENALI_PHY_593_DATA */
+			0x00000000,	/* DENALI_PHY_594_DATA */
+			0x00000000,	/* DENALI_PHY_595_DATA */
+			0x00000000,	/* DENALI_PHY_596_DATA */
+			0x00000000,	/* DENALI_PHY_597_DATA */
+			0x00000000,	/* DENALI_PHY_598_DATA */
+			0x00000000,	/* DENALI_PHY_599_DATA */
+			0x00000000,	/* DENALI_PHY_600_DATA */
+			0x00000000,	/* DENALI_PHY_601_DATA */
+			0x00000000,	/* DENALI_PHY_602_DATA */
+			0x00000000,	/* DENALI_PHY_603_DATA */
+			0x00000000,	/* DENALI_PHY_604_DATA */
+			0x00000000,	/* DENALI_PHY_605_DATA */
+			0x00000000,	/* DENALI_PHY_606_DATA */
+			0x00000000,	/* DENALI_PHY_607_DATA */
+			0x00000000,	/* DENALI_PHY_608_DATA */
+			0x00000000,	/* DENALI_PHY_609_DATA */
+			0x00000000,	/* DENALI_PHY_610_DATA */
+			0x00000000,	/* DENALI_PHY_611_DATA */
+			0x00000000,	/* DENALI_PHY_612_DATA */
+			0x00000000,	/* DENALI_PHY_613_DATA */
+			0x00000000,	/* DENALI_PHY_614_DATA */
+			0x00000000,	/* DENALI_PHY_615_DATA */
+			0x00000000,	/* DENALI_PHY_616_DATA */
+			0x00000000,	/* DENALI_PHY_617_DATA */
+			0x00000000,	/* DENALI_PHY_618_DATA */
+			0x00000000,	/* DENALI_PHY_619_DATA */
+			0x00000000,	/* DENALI_PHY_620_DATA */
+			0x00000000,	/* DENALI_PHY_621_DATA */
+			0x00000000,	/* DENALI_PHY_622_DATA */
+			0x00000000,	/* DENALI_PHY_623_DATA */
+			0x00000000,	/* DENALI_PHY_624_DATA */
+			0x00000000,	/* DENALI_PHY_625_DATA */
+			0x00000000,	/* DENALI_PHY_626_DATA */
+			0x00000000,	/* DENALI_PHY_627_DATA */
+			0x00000000,	/* DENALI_PHY_628_DATA */
+			0x00000000,	/* DENALI_PHY_629_DATA */
+			0x00000000,	/* DENALI_PHY_630_DATA */
+			0x00000000,	/* DENALI_PHY_631_DATA */
+			0x00000000,	/* DENALI_PHY_632_DATA */
+			0x00000000,	/* DENALI_PHY_633_DATA */
+			0x00000000,	/* DENALI_PHY_634_DATA */
+			0x00000000,	/* DENALI_PHY_635_DATA */
+			0x00000000,	/* DENALI_PHY_636_DATA */
+			0x00000000,	/* DENALI_PHY_637_DATA */
+			0x00000000,	/* DENALI_PHY_638_DATA */
+			0x00000000,	/* DENALI_PHY_639_DATA */
+			0x00000000,	/* DENALI_PHY_640_DATA */
+			0x00000000,	/* DENALI_PHY_641_DATA */
+			0x00000000,	/* DENALI_PHY_642_DATA */
+			0x00000000,	/* DENALI_PHY_643_DATA */
+			0x00000000,	/* DENALI_PHY_644_DATA */
+			0x00000000,	/* DENALI_PHY_645_DATA */
+			0x00000000,	/* DENALI_PHY_646_DATA */
+			0x00000002,	/* DENALI_PHY_647_DATA */
+			0x00000000,	/* DENALI_PHY_648_DATA */
+			0x00000000,	/* DENALI_PHY_649_DATA */
+			0x00000000,	/* DENALI_PHY_650_DATA */
+			0x00400320,	/* DENALI_PHY_651_DATA */
+			0x00000040,	/* DENALI_PHY_652_DATA */
+			0x00000000,	/* DENALI_PHY_653_DATA */
+			0x00000000,	/* DENALI_PHY_654_DATA */
+			0x00000000,	/* DENALI_PHY_655_DATA */
+			0x01000000,	/* DENALI_PHY_656_DATA */
+			0x00020003,	/* DENALI_PHY_657_DATA */
+			0x00000000,	/* DENALI_PHY_658_DATA */
+			0x00000000,	/* DENALI_PHY_659_DATA */
+			0x00000000,	/* DENALI_PHY_660_DATA */
+			0x0000002a,	/* DENALI_PHY_661_DATA */
+			0x00000015,	/* DENALI_PHY_662_DATA */
+			0x00000015,	/* DENALI_PHY_663_DATA */
+			0x0000002a,	/* DENALI_PHY_664_DATA */
+			0x00000033,	/* DENALI_PHY_665_DATA */
+			0x0000000c,	/* DENALI_PHY_666_DATA */
+			0x0000000c,	/* DENALI_PHY_667_DATA */
+			0x00000033,	/* DENALI_PHY_668_DATA */
+			0x00000000,	/* DENALI_PHY_669_DATA */
+			0x00000000,	/* DENALI_PHY_670_DATA */
+			0x00000000,	/* DENALI_PHY_671_DATA */
+			0x00030055,	/* DENALI_PHY_672_DATA */
+			0x03000300,	/* DENALI_PHY_673_DATA */
+			0x03000300,	/* DENALI_PHY_674_DATA */
+			0x00000300,	/* DENALI_PHY_675_DATA */
+			0x42080010,	/* DENALI_PHY_676_DATA */
+			0x00000003,	/* DENALI_PHY_677_DATA */
+			0x00000000,	/* DENALI_PHY_678_DATA */
+			0x00000000,	/* DENALI_PHY_679_DATA */
+			0x00000000,	/* DENALI_PHY_680_DATA */
+			0x00000000,	/* DENALI_PHY_681_DATA */
+			0x00000000,	/* DENALI_PHY_682_DATA */
+			0x00000000,	/* DENALI_PHY_683_DATA */
+			0x00000000,	/* DENALI_PHY_684_DATA */
+			0x00000000,	/* DENALI_PHY_685_DATA */
+			0x00000000,	/* DENALI_PHY_686_DATA */
+			0x00000000,	/* DENALI_PHY_687_DATA */
+			0x00000000,	/* DENALI_PHY_688_DATA */
+			0x00000000,	/* DENALI_PHY_689_DATA */
+			0x00000000,	/* DENALI_PHY_690_DATA */
+			0x00000000,	/* DENALI_PHY_691_DATA */
+			0x00000000,	/* DENALI_PHY_692_DATA */
+			0x00000000,	/* DENALI_PHY_693_DATA */
+			0x00000000,	/* DENALI_PHY_694_DATA */
+			0x00000000,	/* DENALI_PHY_695_DATA */
+			0x00000000,	/* DENALI_PHY_696_DATA */
+			0x00000000,	/* DENALI_PHY_697_DATA */
+			0x00000000,	/* DENALI_PHY_698_DATA */
+			0x00000000,	/* DENALI_PHY_699_DATA */
+			0x00000000,	/* DENALI_PHY_700_DATA */
+			0x00000000,	/* DENALI_PHY_701_DATA */
+			0x00000000,	/* DENALI_PHY_702_DATA */
+			0x00000000,	/* DENALI_PHY_703_DATA */
+			0x00000000,	/* DENALI_PHY_704_DATA */
+			0x00000000,	/* DENALI_PHY_705_DATA */
+			0x00000000,	/* DENALI_PHY_706_DATA */
+			0x00000000,	/* DENALI_PHY_707_DATA */
+			0x00000000,	/* DENALI_PHY_708_DATA */
+			0x00000000,	/* DENALI_PHY_709_DATA */
+			0x00000000,	/* DENALI_PHY_710_DATA */
+			0x00000000,	/* DENALI_PHY_711_DATA */
+			0x00000000,	/* DENALI_PHY_712_DATA */
+			0x00000000,	/* DENALI_PHY_713_DATA */
+			0x00000000,	/* DENALI_PHY_714_DATA */
+			0x00000000,	/* DENALI_PHY_715_DATA */
+			0x00000000,	/* DENALI_PHY_716_DATA */
+			0x00000000,	/* DENALI_PHY_717_DATA */
+			0x00000000,	/* DENALI_PHY_718_DATA */
+			0x00000000,	/* DENALI_PHY_719_DATA */
+			0x00000000,	/* DENALI_PHY_720_DATA */
+			0x00000000,	/* DENALI_PHY_721_DATA */
+			0x00000000,	/* DENALI_PHY_722_DATA */
+			0x00000000,	/* DENALI_PHY_723_DATA */
+			0x00000000,	/* DENALI_PHY_724_DATA */
+			0x00000000,	/* DENALI_PHY_725_DATA */
+			0x00000000,	/* DENALI_PHY_726_DATA */
+			0x00000000,	/* DENALI_PHY_727_DATA */
+			0x00000000,	/* DENALI_PHY_728_DATA */
+			0x00000000,	/* DENALI_PHY_729_DATA */
+			0x00000000,	/* DENALI_PHY_730_DATA */
+			0x00000000,	/* DENALI_PHY_731_DATA */
+			0x00000000,	/* DENALI_PHY_732_DATA */
+			0x00000000,	/* DENALI_PHY_733_DATA */
+			0x00000000,	/* DENALI_PHY_734_DATA */
+			0x00000000,	/* DENALI_PHY_735_DATA */
+			0x00000000,	/* DENALI_PHY_736_DATA */
+			0x00000000,	/* DENALI_PHY_737_DATA */
+			0x00000000,	/* DENALI_PHY_738_DATA */
+			0x00000000,	/* DENALI_PHY_739_DATA */
+			0x00000000,	/* DENALI_PHY_740_DATA */
+			0x00000000,	/* DENALI_PHY_741_DATA */
+			0x00000000,	/* DENALI_PHY_742_DATA */
+			0x00000000,	/* DENALI_PHY_743_DATA */
+			0x00000000,	/* DENALI_PHY_744_DATA */
+			0x00000000,	/* DENALI_PHY_745_DATA */
+			0x00000000,	/* DENALI_PHY_746_DATA */
+			0x00000000,	/* DENALI_PHY_747_DATA */
+			0x00000000,	/* DENALI_PHY_748_DATA */
+			0x00000000,	/* DENALI_PHY_749_DATA */
+			0x00000000,	/* DENALI_PHY_750_DATA */
+			0x00000000,	/* DENALI_PHY_751_DATA */
+			0x00000000,	/* DENALI_PHY_752_DATA */
+			0x00000000,	/* DENALI_PHY_753_DATA */
+			0x00000000,	/* DENALI_PHY_754_DATA */
+			0x00000000,	/* DENALI_PHY_755_DATA */
+			0x00000000,	/* DENALI_PHY_756_DATA */
+			0x00000000,	/* DENALI_PHY_757_DATA */
+			0x00000000,	/* DENALI_PHY_758_DATA */
+			0x00000000,	/* DENALI_PHY_759_DATA */
+			0x00000000,	/* DENALI_PHY_760_DATA */
+			0x00000000,	/* DENALI_PHY_761_DATA */
+			0x00000000,	/* DENALI_PHY_762_DATA */
+			0x00000000,	/* DENALI_PHY_763_DATA */
+			0x00000000,	/* DENALI_PHY_764_DATA */
+			0x00000000,	/* DENALI_PHY_765_DATA */
+			0x00000000,	/* DENALI_PHY_766_DATA */
+			0x00000000,	/* DENALI_PHY_767_DATA */
+			0x00000000,	/* DENALI_PHY_768_DATA */
+			0x00000000,	/* DENALI_PHY_769_DATA */
+			0x00000000,	/* DENALI_PHY_770_DATA */
+			0x00000000,	/* DENALI_PHY_771_DATA */
+			0x00000000,	/* DENALI_PHY_772_DATA */
+			0x00000000,	/* DENALI_PHY_773_DATA */
+			0x00000000,	/* DENALI_PHY_774_DATA */
+			0x00000002,	/* DENALI_PHY_775_DATA */
+			0x00000000,	/* DENALI_PHY_776_DATA */
+			0x00000000,	/* DENALI_PHY_777_DATA */
+			0x00000000,	/* DENALI_PHY_778_DATA */
+			0x00400320,	/* DENALI_PHY_779_DATA */
+			0x00000040,	/* DENALI_PHY_780_DATA */
+			0x00000000,	/* DENALI_PHY_781_DATA */
+			0x00000000,	/* DENALI_PHY_782_DATA */
+			0x00000000,	/* DENALI_PHY_783_DATA */
+			0x01000000,	/* DENALI_PHY_784_DATA */
+			0x00020003,	/* DENALI_PHY_785_DATA */
+			0x00000000,	/* DENALI_PHY_786_DATA */
+			0x00000000,	/* DENALI_PHY_787_DATA */
+			0x00000000,	/* DENALI_PHY_788_DATA */
+			0x0000002a,	/* DENALI_PHY_789_DATA */
+			0x00000015,	/* DENALI_PHY_790_DATA */
+			0x00000015,	/* DENALI_PHY_791_DATA */
+			0x0000002a,	/* DENALI_PHY_792_DATA */
+			0x00000033,	/* DENALI_PHY_793_DATA */
+			0x0000000c,	/* DENALI_PHY_794_DATA */
+			0x0000000c,	/* DENALI_PHY_795_DATA */
+			0x00000033,	/* DENALI_PHY_796_DATA */
+			0x1ee6b16a,	/* DENALI_PHY_797_DATA */
+			0x10000000,	/* DENALI_PHY_798_DATA */
+			0x00000000,	/* DENALI_PHY_799_DATA */
+			0x00030055,	/* DENALI_PHY_800_DATA */
+			0x03000300,	/* DENALI_PHY_801_DATA */
+			0x03000300,	/* DENALI_PHY_802_DATA */
+			0x00000300,	/* DENALI_PHY_803_DATA */
+			0x42080010,	/* DENALI_PHY_804_DATA */
+			0x00000003,	/* DENALI_PHY_805_DATA */
+			0x00000000,	/* DENALI_PHY_806_DATA */
+			0x00000000,	/* DENALI_PHY_807_DATA */
+			0x00000000,	/* DENALI_PHY_808_DATA */
+			0x00000000,	/* DENALI_PHY_809_DATA */
+			0x00000000,	/* DENALI_PHY_810_DATA */
+			0x00000000,	/* DENALI_PHY_811_DATA */
+			0x00000000,	/* DENALI_PHY_812_DATA */
+			0x00000000,	/* DENALI_PHY_813_DATA */
+			0x00000000,	/* DENALI_PHY_814_DATA */
+			0x00000000,	/* DENALI_PHY_815_DATA */
+			0x00000000,	/* DENALI_PHY_816_DATA */
+			0x00000000,	/* DENALI_PHY_817_DATA */
+			0x00000000,	/* DENALI_PHY_818_DATA */
+			0x00000000,	/* DENALI_PHY_819_DATA */
+			0x00000000,	/* DENALI_PHY_820_DATA */
+			0x00000000,	/* DENALI_PHY_821_DATA */
+			0x00000000,	/* DENALI_PHY_822_DATA */
+			0x00000000,	/* DENALI_PHY_823_DATA */
+			0x00000000,	/* DENALI_PHY_824_DATA */
+			0x00000000,	/* DENALI_PHY_825_DATA */
+			0x00000000,	/* DENALI_PHY_826_DATA */
+			0x00000000,	/* DENALI_PHY_827_DATA */
+			0x00000000,	/* DENALI_PHY_828_DATA */
+			0x00000000,	/* DENALI_PHY_829_DATA */
+			0x00000000,	/* DENALI_PHY_830_DATA */
+			0x00000000,	/* DENALI_PHY_831_DATA */
+			0x00000000,	/* DENALI_PHY_832_DATA */
+			0x00000000,	/* DENALI_PHY_833_DATA */
+			0x00000000,	/* DENALI_PHY_834_DATA */
+			0x00000000,	/* DENALI_PHY_835_DATA */
+			0x00000000,	/* DENALI_PHY_836_DATA */
+			0x00000000,	/* DENALI_PHY_837_DATA */
+			0x00000000,	/* DENALI_PHY_838_DATA */
+			0x00000000,	/* DENALI_PHY_839_DATA */
+			0x00000000,	/* DENALI_PHY_840_DATA */
+			0x00000000,	/* DENALI_PHY_841_DATA */
+			0x00000000,	/* DENALI_PHY_842_DATA */
+			0x00000000,	/* DENALI_PHY_843_DATA */
+			0x00000000,	/* DENALI_PHY_844_DATA */
+			0x00000000,	/* DENALI_PHY_845_DATA */
+			0x00000000,	/* DENALI_PHY_846_DATA */
+			0x00000000,	/* DENALI_PHY_847_DATA */
+			0x00000000,	/* DENALI_PHY_848_DATA */
+			0x00000000,	/* DENALI_PHY_849_DATA */
+			0x00000000,	/* DENALI_PHY_850_DATA */
+			0x00000000,	/* DENALI_PHY_851_DATA */
+			0x00000000,	/* DENALI_PHY_852_DATA */
+			0x00000000,	/* DENALI_PHY_853_DATA */
+			0x00000000,	/* DENALI_PHY_854_DATA */
+			0x00000000,	/* DENALI_PHY_855_DATA */
+			0x00000000,	/* DENALI_PHY_856_DATA */
+			0x00000000,	/* DENALI_PHY_857_DATA */
+			0x00000000,	/* DENALI_PHY_858_DATA */
+			0x00000000,	/* DENALI_PHY_859_DATA */
+			0x00000000,	/* DENALI_PHY_860_DATA */
+			0x00000000,	/* DENALI_PHY_861_DATA */
+			0x00000000,	/* DENALI_PHY_862_DATA */
+			0x00000000,	/* DENALI_PHY_863_DATA */
+			0x00000000,	/* DENALI_PHY_864_DATA */
+			0x00000000,	/* DENALI_PHY_865_DATA */
+			0x00000000,	/* DENALI_PHY_866_DATA */
+			0x00000000,	/* DENALI_PHY_867_DATA */
+			0x00000000,	/* DENALI_PHY_868_DATA */
+			0x00000000,	/* DENALI_PHY_869_DATA */
+			0x00000000,	/* DENALI_PHY_870_DATA */
+			0x00000000,	/* DENALI_PHY_871_DATA */
+			0x00000000,	/* DENALI_PHY_872_DATA */
+			0x00000000,	/* DENALI_PHY_873_DATA */
+			0x00000000,	/* DENALI_PHY_874_DATA */
+			0x00000000,	/* DENALI_PHY_875_DATA */
+			0x00000000,	/* DENALI_PHY_876_DATA */
+			0x00000000,	/* DENALI_PHY_877_DATA */
+			0x00000000,	/* DENALI_PHY_878_DATA */
+			0x00000000,	/* DENALI_PHY_879_DATA */
+			0x00000000,	/* DENALI_PHY_880_DATA */
+			0x00000000,	/* DENALI_PHY_881_DATA */
+			0x00000000,	/* DENALI_PHY_882_DATA */
+			0x00000000,	/* DENALI_PHY_883_DATA */
+			0x00000000,	/* DENALI_PHY_884_DATA */
+			0x00000000,	/* DENALI_PHY_885_DATA */
+			0x00000000,	/* DENALI_PHY_886_DATA */
+			0x00000000,	/* DENALI_PHY_887_DATA */
+			0x00000000,	/* DENALI_PHY_888_DATA */
+			0x00000000,	/* DENALI_PHY_889_DATA */
+			0x00000000,	/* DENALI_PHY_890_DATA */
+			0x00000000,	/* DENALI_PHY_891_DATA */
+			0x00000000,	/* DENALI_PHY_892_DATA */
+			0x00000000,	/* DENALI_PHY_893_DATA */
+			0x00000000,	/* DENALI_PHY_894_DATA */
+			0x00000000,	/* DENALI_PHY_895_DATA */
+			0x00000000,	/* DENALI_PHY_896_DATA */
+			0x00000000,	/* DENALI_PHY_897_DATA */
+			0x00000005,	/* DENALI_PHY_898_DATA */
+			0x04000f01,	/* DENALI_PHY_899_DATA */
+			0x00020040,	/* DENALI_PHY_900_DATA */
+			0x00020055,	/* DENALI_PHY_901_DATA */
+			0x00000000,	/* DENALI_PHY_902_DATA */
+			0x00000000,	/* DENALI_PHY_903_DATA */
+			0x00000000,	/* DENALI_PHY_904_DATA */
+			0x00000050,	/* DENALI_PHY_905_DATA */
+			0x00000000,	/* DENALI_PHY_906_DATA */
+			0x01010100,	/* DENALI_PHY_907_DATA */
+			0x00000600,	/* DENALI_PHY_908_DATA */
+			0x00000000,	/* DENALI_PHY_909_DATA */
+			0x00006400,	/* DENALI_PHY_910_DATA */
+			0x03221302,	/* DENALI_PHY_911_DATA */
+			0x00000000,	/* DENALI_PHY_912_DATA */
+			0x000d1f01,	/* DENALI_PHY_913_DATA */
+			0x0d1f0d1f,	/* DENALI_PHY_914_DATA */
+			0x0d1f0d1f,	/* DENALI_PHY_915_DATA */
+			0x00030003,	/* DENALI_PHY_916_DATA */
+			0x03000300,	/* DENALI_PHY_917_DATA */
+			0x00000300,	/* DENALI_PHY_918_DATA */
+			0x03221302,	/* DENALI_PHY_919_DATA */
+			0x00000000,	/* DENALI_PHY_920_DATA */
+			0x00000000,	/* DENALI_PHY_921_DATA */
+			0x01020000,	/* DENALI_PHY_922_DATA */
+			0x00000001,	/* DENALI_PHY_923_DATA */
+			0x00000411,	/* DENALI_PHY_924_DATA */
+			0x00000411,	/* DENALI_PHY_925_DATA */
+			0x00000040,	/* DENALI_PHY_926_DATA */
+			0x00000040,	/* DENALI_PHY_927_DATA */
+			0x00000411,	/* DENALI_PHY_928_DATA */
+			0x00000411,	/* DENALI_PHY_929_DATA */
+			0x00004410,	/* DENALI_PHY_930_DATA */
+			0x00004410,	/* DENALI_PHY_931_DATA */
+			0x00004410,	/* DENALI_PHY_932_DATA */
+			0x00004410,	/* DENALI_PHY_933_DATA */
+			0x00004410,	/* DENALI_PHY_934_DATA */
+			0x00000411,	/* DENALI_PHY_935_DATA */
+			0x00004410,	/* DENALI_PHY_936_DATA */
+			0x00000411,	/* DENALI_PHY_937_DATA */
+			0x00004410,	/* DENALI_PHY_938_DATA */
+			0x00000411,	/* DENALI_PHY_939_DATA */
+			0x00004410,	/* DENALI_PHY_940_DATA */
+			0x00000000,	/* DENALI_PHY_941_DATA */
+			0x00000000,	/* DENALI_PHY_942_DATA */
+			0x00000000,	/* DENALI_PHY_943_DATA */
+			0x64000000,	/* DENALI_PHY_944_DATA */
+			0x00000000,	/* DENALI_PHY_945_DATA */
+			0x00000000,	/* DENALI_PHY_946_DATA */
+			0x00000408,	/* DENALI_PHY_947_DATA */
+			0x00000000,	/* DENALI_PHY_948_DATA */
+			0x00000000,	/* DENALI_PHY_949_DATA */
+			0x00000000,	/* DENALI_PHY_950_DATA */
+			0x00000000,	/* DENALI_PHY_951_DATA */
+			0x00000000,	/* DENALI_PHY_952_DATA */
+			0x00000000,	/* DENALI_PHY_953_DATA */
+			0xe4000000,	/* DENALI_PHY_954_DATA */
+			0x00000000,	/* DENALI_PHY_955_DATA */
+			0x00000000,	/* DENALI_PHY_956_DATA */
+			0x01010000,	/* DENALI_PHY_957_DATA */
+			0x00000000	/* DENALI_PHY_958_DATA */
+		}
+	},
+},
diff --git a/drivers/ram/rockchip/sdram-rk3399-lpddr4-800.inc b/drivers/ram/rockchip/sdram-rk3399-lpddr4-800.inc
new file mode 100644
index 0000000000..8377e14d7b
--- /dev/null
+++ b/drivers/ram/rockchip/sdram-rk3399-lpddr4-800.inc
@@ -0,0 +1,1560 @@
+{
+	{
+		{
+			{
+				.rank = 0x2,
+				.col = 0xA,
+				.bk = 0x3,
+				.bw = 0x2,
+				.dbw = 0x1,
+				.row_3_4 = 0x0,
+				.cs0_row = 0xF,
+				.cs1_row = 0xF,
+				.cs0_high16bit_row = 0xF,
+				.cs1_high16bit_row = 0xF,
+				.ddrconfig = 1,
+			},
+			{
+				{0x801c1819},
+				{0x10040c05},
+				{0x00000602},
+				{0x00002672},
+				{0x0000004c},
+				0x00000000
+			}
+		},
+		{
+			{
+				.rank = 0x2,
+				.col = 0xA,
+				.bk = 0x3,
+				.bw = 0x2,
+				.dbw = 0x1,
+				.row_3_4 = 0x0,
+				.cs0_row = 0xF,
+				.cs1_row = 0xF,
+				.cs0_high16bit_row = 0xF,
+				.cs1_high16bit_row = 0xF,
+				.ddrconfig = 1,
+			},
+			{
+				{0x801c1819},
+				{0x10040c05},
+				{0x00000602},
+				{0x00002672},
+				{0x0000004c},
+				0x00000000
+			}
+		}
+	},
+	{
+		.ddr_freq = 800*MHZ,
+		.dramtype = LPDDR4,
+		.num_channels = 2,
+		.stride = 13,
+		.odt = 1,
+	},
+	{
+		{
+			0x00000b00,	/* DENALI_CTL_00_DATA */
+			0x00000000,	/* DENALI_CTL_01_DATA */
+			0x00000000,	/* DENALI_CTL_02_DATA */
+			0x00000000,	/* DENALI_CTL_03_DATA */
+			0x00000000,	/* DENALI_CTL_04_DATA */
+			0x00013880,	/* DENALI_CTL_05_DATA */
+			0x000c3500,	/* DENALI_CTL_06_DATA */
+			0x00000005,	/* DENALI_CTL_07_DATA */
+			0x00000320,	/* DENALI_CTL_08_DATA */
+			0x00027100,	/* DENALI_CTL_09_DATA */
+			0x00186a00,	/* DENALI_CTL_10_DATA */
+			0x00000005,	/* DENALI_CTL_11_DATA */
+			0x00000640,	/* DENALI_CTL_12_DATA */
+			0x00002710,	/* DENALI_CTL_13_DATA */
+			0x000186a0,	/* DENALI_CTL_14_DATA */
+			0x00000005,	/* DENALI_CTL_15_DATA */
+			0x01000064,	/* DENALI_CTL_16_DATA */
+			0x00000000,	/* DENALI_CTL_17_DATA */
+			0x02020101,	/* DENALI_CTL_18_DATA */
+			0x00000102,	/* DENALI_CTL_19_DATA */
+			0x00000050,	/* DENALI_CTL_20_DATA */
+			0x000000c8,	/* DENALI_CTL_21_DATA */
+			0x00000000,	/* DENALI_CTL_22_DATA */
+			0x06140000,	/* DENALI_CTL_23_DATA */
+			0x00081c00,	/* DENALI_CTL_24_DATA */
+			0x0400040c,	/* DENALI_CTL_25_DATA */
+			0x19042008,	/* DENALI_CTL_26_DATA */
+			0x10080a11,	/* DENALI_CTL_27_DATA */
+			0x22310800,	/* DENALI_CTL_28_DATA */
+			0x00200f0a,	/* DENALI_CTL_29_DATA */
+			0x0a030704,	/* DENALI_CTL_30_DATA */
+			0x08000204,	/* DENALI_CTL_31_DATA */
+			0x00000a0a,	/* DENALI_CTL_32_DATA */
+			0x04006db0,	/* DENALI_CTL_33_DATA */
+			0x0a0a0804,	/* DENALI_CTL_34_DATA */
+			0x0600db60,	/* DENALI_CTL_35_DATA */
+			0x0a0a0806,	/* DENALI_CTL_36_DATA */
+			0x04000db6,	/* DENALI_CTL_37_DATA */
+			0x02030404,	/* DENALI_CTL_38_DATA */
+			0x0f0a0800,	/* DENALI_CTL_39_DATA */
+			0x08040411,	/* DENALI_CTL_40_DATA */
+			0x1400640a,	/* DENALI_CTL_41_DATA */
+			0x02010a0a,	/* DENALI_CTL_42_DATA */
+			0x00010001,	/* DENALI_CTL_43_DATA */
+			0x04082012,	/* DENALI_CTL_44_DATA */
+			0x00041109,	/* DENALI_CTL_45_DATA */
+			0x00000000,	/* DENALI_CTL_46_DATA */
+			0x03010000,	/* DENALI_CTL_47_DATA */
+			0x06100034,	/* DENALI_CTL_48_DATA */
+			0x0c280068,	/* DENALI_CTL_49_DATA */
+			0x00bb0007,	/* DENALI_CTL_50_DATA */
+			0x00000000,	/* DENALI_CTL_51_DATA */
+			0x00060003,	/* DENALI_CTL_52_DATA */
+			0x000a0003,	/* DENALI_CTL_53_DATA */
+			0x000a0014,	/* DENALI_CTL_54_DATA */
+			0x01000000,	/* DENALI_CTL_55_DATA */
+			0x030a0000,	/* DENALI_CTL_56_DATA */
+			0x0c000002,	/* DENALI_CTL_57_DATA */
+			0x00000103,	/* DENALI_CTL_58_DATA */
+			0x0003030a,	/* DENALI_CTL_59_DATA */
+			0x00060037,	/* DENALI_CTL_60_DATA */
+			0x0003006e,	/* DENALI_CTL_61_DATA */
+			0x05050007,	/* DENALI_CTL_62_DATA */
+			0x03020605,	/* DENALI_CTL_63_DATA */
+			0x06050301,	/* DENALI_CTL_64_DATA */
+			0x06020c05,	/* DENALI_CTL_65_DATA */
+			0x05050302,	/* DENALI_CTL_66_DATA */
+			0x03020305,	/* DENALI_CTL_67_DATA */
+			0x00000301,	/* DENALI_CTL_68_DATA */
+			0x00000301,	/* DENALI_CTL_69_DATA */
+			0x00000001,	/* DENALI_CTL_70_DATA */
+			0x00000000,	/* DENALI_CTL_71_DATA */
+			0x00000000,	/* DENALI_CTL_72_DATA */
+			0x01000000,	/* DENALI_CTL_73_DATA */
+			0x80104002,	/* DENALI_CTL_74_DATA */
+			0x00040003,	/* DENALI_CTL_75_DATA */
+			0x00040005,	/* DENALI_CTL_76_DATA */
+			0x00030000,	/* DENALI_CTL_77_DATA */
+			0x00050004,	/* DENALI_CTL_78_DATA */
+			0x00000004,	/* DENALI_CTL_79_DATA */
+			0x00040003,	/* DENALI_CTL_80_DATA */
+			0x00040005,	/* DENALI_CTL_81_DATA */
+			0x18400000,	/* DENALI_CTL_82_DATA */
+			0x00000c20,	/* DENALI_CTL_83_DATA */
+			0x185030a0,	/* DENALI_CTL_84_DATA */
+			0x02ec0000,	/* DENALI_CTL_85_DATA */
+			0x00000176,	/* DENALI_CTL_86_DATA */
+			0x00000000,	/* DENALI_CTL_87_DATA */
+			0x00000000,	/* DENALI_CTL_88_DATA */
+			0x00000000,	/* DENALI_CTL_89_DATA */
+			0x00000000,	/* DENALI_CTL_90_DATA */
+			0x00000000,	/* DENALI_CTL_91_DATA */
+			0x06030300,	/* DENALI_CTL_92_DATA */
+			0x00030303,	/* DENALI_CTL_93_DATA */
+			0x02030200,	/* DENALI_CTL_94_DATA */
+			0x00040703,	/* DENALI_CTL_95_DATA */
+			0x03020302,	/* DENALI_CTL_96_DATA */
+			0x02000407,	/* DENALI_CTL_97_DATA */
+			0x07030203,	/* DENALI_CTL_98_DATA */
+			0x00030f04,	/* DENALI_CTL_99_DATA */
+			0x00070004,	/* DENALI_CTL_100_DATA */
+			0x00000000,	/* DENALI_CTL_101_DATA */
+			0x00000000,	/* DENALI_CTL_102_DATA */
+			0x00000000,	/* DENALI_CTL_103_DATA */
+			0x00000000,	/* DENALI_CTL_104_DATA */
+			0x00000000,	/* DENALI_CTL_105_DATA */
+			0x00000000,	/* DENALI_CTL_106_DATA */
+			0x00000000,	/* DENALI_CTL_107_DATA */
+			0x00010000,	/* DENALI_CTL_108_DATA */
+			0x20040020,	/* DENALI_CTL_109_DATA */
+			0x00200400,	/* DENALI_CTL_110_DATA */
+			0x01000400,	/* DENALI_CTL_111_DATA */
+			0x00000b80,	/* DENALI_CTL_112_DATA */
+			0x00000000,	/* DENALI_CTL_113_DATA */
+			0x00000001,	/* DENALI_CTL_114_DATA */
+			0x00000002,	/* DENALI_CTL_115_DATA */
+			0x0000000e,	/* DENALI_CTL_116_DATA */
+			0x00000000,	/* DENALI_CTL_117_DATA */
+			0x00000000,	/* DENALI_CTL_118_DATA */
+			0x00000000,	/* DENALI_CTL_119_DATA */
+			0x00000000,	/* DENALI_CTL_120_DATA */
+			0x00000000,	/* DENALI_CTL_121_DATA */
+			0x00500000,	/* DENALI_CTL_122_DATA */
+			0x00640028,	/* DENALI_CTL_123_DATA */
+			0x00640404,	/* DENALI_CTL_124_DATA */
+			0x005000a0,	/* DENALI_CTL_125_DATA */
+			0x060600c8,	/* DENALI_CTL_126_DATA */
+			0x000a00c8,	/* DENALI_CTL_127_DATA */
+			0x000d0005,	/* DENALI_CTL_128_DATA */
+			0x000d0404,	/* DENALI_CTL_129_DATA */
+			0x00000000,	/* DENALI_CTL_130_DATA */
+			0x00000000,	/* DENALI_CTL_131_DATA */
+			0x00000000,	/* DENALI_CTL_132_DATA */
+			0x001400a3,	/* DENALI_CTL_133_DATA */
+			0x00e30009,	/* DENALI_CTL_134_DATA */
+			0x00120024,	/* DENALI_CTL_135_DATA */
+			0x00040063,	/* DENALI_CTL_136_DATA */
+			0x00000000,	/* DENALI_CTL_137_DATA */
+			0x00310031,	/* DENALI_CTL_138_DATA */
+			0x00000031,	/* DENALI_CTL_139_DATA */
+			0x004d0000,	/* DENALI_CTL_140_DATA */
+			0x004d004d,	/* DENALI_CTL_141_DATA */
+			0x004d0000,	/* DENALI_CTL_142_DATA */
+			0x004d004d,	/* DENALI_CTL_143_DATA */
+			0x00010101,	/* DENALI_CTL_144_DATA */
+			0x00000000,	/* DENALI_CTL_145_DATA */
+			0x00000000,	/* DENALI_CTL_146_DATA */
+			0x001400a3,	/* DENALI_CTL_147_DATA */
+			0x00e30009,	/* DENALI_CTL_148_DATA */
+			0x00120024,	/* DENALI_CTL_149_DATA */
+			0x00040063,	/* DENALI_CTL_150_DATA */
+			0x00000000,	/* DENALI_CTL_151_DATA */
+			0x00310031,	/* DENALI_CTL_152_DATA */
+			0x00000031,	/* DENALI_CTL_153_DATA */
+			0x004d0000,	/* DENALI_CTL_154_DATA */
+			0x004d004d,	/* DENALI_CTL_155_DATA */
+			0x004d0000,	/* DENALI_CTL_156_DATA */
+			0x004d004d,	/* DENALI_CTL_157_DATA */
+			0x00010101,	/* DENALI_CTL_158_DATA */
+			0x00000000,	/* DENALI_CTL_159_DATA */
+			0x00000000,	/* DENALI_CTL_160_DATA */
+			0x00000000,	/* DENALI_CTL_161_DATA */
+			0x00000001,	/* DENALI_CTL_162_DATA */
+			0x00000000,	/* DENALI_CTL_163_DATA */
+			0x18151100,	/* DENALI_CTL_164_DATA */
+			0x0000000c,	/* DENALI_CTL_165_DATA */
+			0x00000000,	/* DENALI_CTL_166_DATA */
+			0x00000000,	/* DENALI_CTL_167_DATA */
+			0x00000000,	/* DENALI_CTL_168_DATA */
+			0x00000000,	/* DENALI_CTL_169_DATA */
+			0x00000000,	/* DENALI_CTL_170_DATA */
+			0x00000000,	/* DENALI_CTL_171_DATA */
+			0x00000000,	/* DENALI_CTL_172_DATA */
+			0x00000000,	/* DENALI_CTL_173_DATA */
+			0x00000000,	/* DENALI_CTL_174_DATA */
+			0x00000000,	/* DENALI_CTL_175_DATA */
+			0x00000000,	/* DENALI_CTL_176_DATA */
+			0x00000000,	/* DENALI_CTL_177_DATA */
+			0x00000000,	/* DENALI_CTL_178_DATA */
+			0x00020003,	/* DENALI_CTL_179_DATA */
+			0x00400100,	/* DENALI_CTL_180_DATA */
+			0x000c0190,	/* DENALI_CTL_181_DATA */
+			0x01000200,	/* DENALI_CTL_182_DATA */
+			0x03200040,	/* DENALI_CTL_183_DATA */
+			0x00020018,	/* DENALI_CTL_184_DATA */
+			0x00400100,	/* DENALI_CTL_185_DATA */
+			0x00080032,	/* DENALI_CTL_186_DATA */
+			0x00140000,	/* DENALI_CTL_187_DATA */
+			0x00030028,	/* DENALI_CTL_188_DATA */
+			0x01010100,	/* DENALI_CTL_189_DATA */
+			0x02000202,	/* DENALI_CTL_190_DATA */
+			0x0b000002,	/* DENALI_CTL_191_DATA */
+			0x01000f0f,	/* DENALI_CTL_192_DATA */
+			0x00000000,	/* DENALI_CTL_193_DATA */
+			0x00000000,	/* DENALI_CTL_194_DATA */
+			0x00010003,	/* DENALI_CTL_195_DATA */
+			0x00000c03,	/* DENALI_CTL_196_DATA */
+			0x00040101,	/* DENALI_CTL_197_DATA */
+			0x04010100,	/* DENALI_CTL_198_DATA */
+			0x01000000,	/* DENALI_CTL_199_DATA */
+			0x02010000,	/* DENALI_CTL_200_DATA */
+			0x00000001,	/* DENALI_CTL_201_DATA */
+			0x00000000,	/* DENALI_CTL_202_DATA */
+			0x00000000,	/* DENALI_CTL_203_DATA */
+			0x00000000,	/* DENALI_CTL_204_DATA */
+			0x00000000,	/* DENALI_CTL_205_DATA */
+			0x00000000,	/* DENALI_CTL_206_DATA */
+			0x00000000,	/* DENALI_CTL_207_DATA */
+			0x00000000,	/* DENALI_CTL_208_DATA */
+			0x00000000,	/* DENALI_CTL_209_DATA */
+			0x00000000,	/* DENALI_CTL_210_DATA */
+			0x00010000,	/* DENALI_CTL_211_DATA */
+			0x00000001,	/* DENALI_CTL_212_DATA */
+			0x01010001,	/* DENALI_CTL_213_DATA */
+			0x05040001,	/* DENALI_CTL_214_DATA */
+			0x040a0703,	/* DENALI_CTL_215_DATA */
+			0x02080808,	/* DENALI_CTL_216_DATA */
+			0x020e000a,	/* DENALI_CTL_217_DATA */
+			0x020f010b,	/* DENALI_CTL_218_DATA */
+			0x000d0008,	/* DENALI_CTL_219_DATA */
+			0x00080b0a,	/* DENALI_CTL_220_DATA */
+			0x03000200,	/* DENALI_CTL_221_DATA */
+			0x00000100,	/* DENALI_CTL_222_DATA */
+			0x00000000,	/* DENALI_CTL_223_DATA */
+			0x00000000,	/* DENALI_CTL_224_DATA */
+			0x0d000001,	/* DENALI_CTL_225_DATA */
+			0x00000028,	/* DENALI_CTL_226_DATA */
+			0x00010000,	/* DENALI_CTL_227_DATA */
+			0x00000003,	/* DENALI_CTL_228_DATA */
+			0x00000000,	/* DENALI_CTL_229_DATA */
+			0x00000000,	/* DENALI_CTL_230_DATA */
+			0x00000000,	/* DENALI_CTL_231_DATA */
+			0x00000000,	/* DENALI_CTL_232_DATA */
+			0x00000000,	/* DENALI_CTL_233_DATA */
+			0x00000000,	/* DENALI_CTL_234_DATA */
+			0x00000000,	/* DENALI_CTL_235_DATA */
+			0x00000000,	/* DENALI_CTL_236_DATA */
+			0x00010100,	/* DENALI_CTL_237_DATA */
+			0x01000000,	/* DENALI_CTL_238_DATA */
+			0x00000001,	/* DENALI_CTL_239_DATA */
+			0x00000303,	/* DENALI_CTL_240_DATA */
+			0x00000000,	/* DENALI_CTL_241_DATA */
+			0x00000000,	/* DENALI_CTL_242_DATA */
+			0x00000000,	/* DENALI_CTL_243_DATA */
+			0x00000000,	/* DENALI_CTL_244_DATA */
+			0x00000000,	/* DENALI_CTL_245_DATA */
+			0x00000000,	/* DENALI_CTL_246_DATA */
+			0x00000000,	/* DENALI_CTL_247_DATA */
+			0x00000000,	/* DENALI_CTL_248_DATA */
+			0x00000000,	/* DENALI_CTL_249_DATA */
+			0x00000000,	/* DENALI_CTL_250_DATA */
+			0x00000000,	/* DENALI_CTL_251_DATA */
+			0x00000000,	/* DENALI_CTL_252_DATA */
+			0x00000000,	/* DENALI_CTL_253_DATA */
+			0x00000000,	/* DENALI_CTL_254_DATA */
+			0x00000000,	/* DENALI_CTL_255_DATA */
+			0x000556aa,	/* DENALI_CTL_256_DATA */
+			0x000aaaaa,	/* DENALI_CTL_257_DATA */
+			0x000aa955,	/* DENALI_CTL_258_DATA */
+			0x00055555,	/* DENALI_CTL_259_DATA */
+			0x000b3133,	/* DENALI_CTL_260_DATA */
+			0x0004cd33,	/* DENALI_CTL_261_DATA */
+			0x0004cecc,	/* DENALI_CTL_262_DATA */
+			0x000b32cc,	/* DENALI_CTL_263_DATA */
+			0x00010300,	/* DENALI_CTL_264_DATA */
+			0x03000100,	/* DENALI_CTL_265_DATA */
+			0x00000000,	/* DENALI_CTL_266_DATA */
+			0x00000000,	/* DENALI_CTL_267_DATA */
+			0x00000000,	/* DENALI_CTL_268_DATA */
+			0x00000000,	/* DENALI_CTL_269_DATA */
+			0x00000000,	/* DENALI_CTL_270_DATA */
+			0x00000000,	/* DENALI_CTL_271_DATA */
+			0x00000000,	/* DENALI_CTL_272_DATA */
+			0x00000000,	/* DENALI_CTL_273_DATA */
+			0x00ffff00,	/* DENALI_CTL_274_DATA */
+			0x1a160000,	/* DENALI_CTL_275_DATA */
+			0x08000012,	/* DENALI_CTL_276_DATA */
+			0x00000c20,	/* DENALI_CTL_277_DATA */
+			0x00000200,	/* DENALI_CTL_278_DATA */
+			0x00000200,	/* DENALI_CTL_279_DATA */
+			0x00000200,	/* DENALI_CTL_280_DATA */
+			0x00000200,	/* DENALI_CTL_281_DATA */
+			0x00000c20,	/* DENALI_CTL_282_DATA */
+			0x00007940,	/* DENALI_CTL_283_DATA */
+			0x18500409,	/* DENALI_CTL_284_DATA */
+			0x00000200,	/* DENALI_CTL_285_DATA */
+			0x00000200,	/* DENALI_CTL_286_DATA */
+			0x00000200,	/* DENALI_CTL_287_DATA */
+			0x00000200,	/* DENALI_CTL_288_DATA */
+			0x00001850,	/* DENALI_CTL_289_DATA */
+			0x0000f320,	/* DENALI_CTL_290_DATA */
+			0x0176060c,	/* DENALI_CTL_291_DATA */
+			0x00000200,	/* DENALI_CTL_292_DATA */
+			0x00000200,	/* DENALI_CTL_293_DATA */
+			0x00000200,	/* DENALI_CTL_294_DATA */
+			0x00000200,	/* DENALI_CTL_295_DATA */
+			0x00000176,	/* DENALI_CTL_296_DATA */
+			0x00000e9c,	/* DENALI_CTL_297_DATA */
+			0x02020205,	/* DENALI_CTL_298_DATA */
+			0x03030202,	/* DENALI_CTL_299_DATA */
+			0x00000018,	/* DENALI_CTL_300_DATA */
+			0x00000000,	/* DENALI_CTL_301_DATA */
+			0x00000000,	/* DENALI_CTL_302_DATA */
+			0x00001403,	/* DENALI_CTL_303_DATA */
+			0x00000000,	/* DENALI_CTL_304_DATA */
+			0x00000000,	/* DENALI_CTL_305_DATA */
+			0x00000000,	/* DENALI_CTL_306_DATA */
+			0x00030000,	/* DENALI_CTL_307_DATA */
+			0x000a001c,	/* DENALI_CTL_308_DATA */
+			0x000e0020,	/* DENALI_CTL_309_DATA */
+			0x00060018,	/* DENALI_CTL_310_DATA */
+			0x00000000,	/* DENALI_CTL_311_DATA */
+			0x00000000,	/* DENALI_CTL_312_DATA */
+			0x02000000,	/* DENALI_CTL_313_DATA */
+			0x00090305,	/* DENALI_CTL_314_DATA */
+			0x00050101,	/* DENALI_CTL_315_DATA */
+			0x00000000,	/* DENALI_CTL_316_DATA */
+			0x00000000,	/* DENALI_CTL_317_DATA */
+			0x00000000,	/* DENALI_CTL_318_DATA */
+			0x00000000,	/* DENALI_CTL_319_DATA */
+			0x00000000,	/* DENALI_CTL_320_DATA */
+			0x00000000,	/* DENALI_CTL_321_DATA */
+			0x00000000,	/* DENALI_CTL_322_DATA */
+			0x00000000,	/* DENALI_CTL_323_DATA */
+			0x01000001,	/* DENALI_CTL_324_DATA */
+			0x01010101,	/* DENALI_CTL_325_DATA */
+			0x01000101,	/* DENALI_CTL_326_DATA */
+			0x01000100,	/* DENALI_CTL_327_DATA */
+			0x00010001,	/* DENALI_CTL_328_DATA */
+			0x00010002,	/* DENALI_CTL_329_DATA */
+			0x00020100,	/* DENALI_CTL_330_DATA */
+			0x00000002	/* DENALI_CTL_331_DATA */
+		}
+	},
+	{
+		{
+			0x00000b00,	/* DENALI_PI_00_DATA */
+			0x00000000,	/* DENALI_PI_01_DATA */
+			0x000002ec,	/* DENALI_PI_02_DATA */
+			0x00000176,	/* DENALI_PI_03_DATA */
+			0x000030a0,	/* DENALI_PI_04_DATA */
+			0x00001850,	/* DENALI_PI_05_DATA */
+			0x00001840,	/* DENALI_PI_06_DATA */
+			0x01760c20,	/* DENALI_PI_07_DATA */
+			0x00000200,	/* DENALI_PI_08_DATA */
+			0x00000200,	/* DENALI_PI_09_DATA */
+			0x00000200,	/* DENALI_PI_10_DATA */
+			0x00000200,	/* DENALI_PI_11_DATA */
+			0x00001850,	/* DENALI_PI_12_DATA */
+			0x00000200,	/* DENALI_PI_13_DATA */
+			0x00000200,	/* DENALI_PI_14_DATA */
+			0x00000200,	/* DENALI_PI_15_DATA */
+			0x00000200,	/* DENALI_PI_16_DATA */
+			0x00000c20,	/* DENALI_PI_17_DATA */
+			0x00000200,	/* DENALI_PI_18_DATA */
+			0x00000200,	/* DENALI_PI_19_DATA */
+			0x00000200,	/* DENALI_PI_20_DATA */
+			0x00000200,	/* DENALI_PI_21_DATA */
+			0x00010000,	/* DENALI_PI_22_DATA */
+			0x00000007,	/* DENALI_PI_23_DATA */
+			0x01000001,	/* DENALI_PI_24_DATA */
+			0x00000000,	/* DENALI_PI_25_DATA */
+			0x3fffffff,	/* DENALI_PI_26_DATA */
+			0x00000000,	/* DENALI_PI_27_DATA */
+			0x00000000,	/* DENALI_PI_28_DATA */
+			0x00000000,	/* DENALI_PI_29_DATA */
+			0x00000000,	/* DENALI_PI_30_DATA */
+			0x00000000,	/* DENALI_PI_31_DATA */
+			0x00000000,	/* DENALI_PI_32_DATA */
+			0x00000000,	/* DENALI_PI_33_DATA */
+			0x00000000,	/* DENALI_PI_34_DATA */
+			0x00000000,	/* DENALI_PI_35_DATA */
+			0x00000000,	/* DENALI_PI_36_DATA */
+			0x00000000,	/* DENALI_PI_37_DATA */
+			0x00000000,	/* DENALI_PI_38_DATA */
+			0x00000000,	/* DENALI_PI_39_DATA */
+			0x00000000,	/* DENALI_PI_40_DATA */
+			0x0f000101,	/* DENALI_PI_41_DATA */
+			0x082b3223,	/* DENALI_PI_42_DATA */
+			0x080c0004,	/* DENALI_PI_43_DATA */
+			0x00061c00,	/* DENALI_PI_44_DATA */
+			0x00000214,	/* DENALI_PI_45_DATA */
+			0x00bb0007,	/* DENALI_PI_46_DATA */
+			0x0c280068,	/* DENALI_PI_47_DATA */
+			0x06100034,	/* DENALI_PI_48_DATA */
+			0x00000500,	/* DENALI_PI_49_DATA */
+			0x00000000,	/* DENALI_PI_50_DATA */
+			0x00000000,	/* DENALI_PI_51_DATA */
+			0x00000000,	/* DENALI_PI_52_DATA */
+			0x00000000,	/* DENALI_PI_53_DATA */
+			0x00000000,	/* DENALI_PI_54_DATA */
+			0x00000000,	/* DENALI_PI_55_DATA */
+			0x00000000,	/* DENALI_PI_56_DATA */
+			0x00000000,	/* DENALI_PI_57_DATA */
+			0x04040100,	/* DENALI_PI_58_DATA */
+			0x0a000004,	/* DENALI_PI_59_DATA */
+			0x00000128,	/* DENALI_PI_60_DATA */
+			0x00000000,	/* DENALI_PI_61_DATA */
+			0x0003000f,	/* DENALI_PI_62_DATA */
+			0x00000018,	/* DENALI_PI_63_DATA */
+			0x00000000,	/* DENALI_PI_64_DATA */
+			0x00000000,	/* DENALI_PI_65_DATA */
+			0x00060002,	/* DENALI_PI_66_DATA */
+			0x00010001,	/* DENALI_PI_67_DATA */
+			0x00000101,	/* DENALI_PI_68_DATA */
+			0x00020001,	/* DENALI_PI_69_DATA */
+			0x00080004,	/* DENALI_PI_70_DATA */
+			0x00000000,	/* DENALI_PI_71_DATA */
+			0x05030000,	/* DENALI_PI_72_DATA */
+			0x070a0404,	/* DENALI_PI_73_DATA */
+			0x00000000,	/* DENALI_PI_74_DATA */
+			0x00000000,	/* DENALI_PI_75_DATA */
+			0x00000000,	/* DENALI_PI_76_DATA */
+			0x000f0f00,	/* DENALI_PI_77_DATA */
+			0x0000001e,	/* DENALI_PI_78_DATA */
+			0x00000000,	/* DENALI_PI_79_DATA */
+			0x01010300,	/* DENALI_PI_80_DATA */
+			0x00000000,	/* DENALI_PI_81_DATA */
+			0x00000000,	/* DENALI_PI_82_DATA */
+			0x01000000,	/* DENALI_PI_83_DATA */
+			0x00000101,	/* DENALI_PI_84_DATA */
+			0x55555a5a,	/* DENALI_PI_85_DATA */
+			0x55555a5a,	/* DENALI_PI_86_DATA */
+			0x55555a5a,	/* DENALI_PI_87_DATA */
+			0x55555a5a,	/* DENALI_PI_88_DATA */
+			0x0c050001,	/* DENALI_PI_89_DATA */
+			0x06020009,	/* DENALI_PI_90_DATA */
+			0x00010004,	/* DENALI_PI_91_DATA */
+			0x00000203,	/* DENALI_PI_92_DATA */
+			0x00030000,	/* DENALI_PI_93_DATA */
+			0x170f0000,	/* DENALI_PI_94_DATA */
+			0x00060018,	/* DENALI_PI_95_DATA */
+			0x000e0020,	/* DENALI_PI_96_DATA */
+			0x000a001c,	/* DENALI_PI_97_DATA */
+			0x00000000,	/* DENALI_PI_98_DATA */
+			0x00000000,	/* DENALI_PI_99_DATA */
+			0x00000100,	/* DENALI_PI_100_DATA */
+			0x140a0000,	/* DENALI_PI_101_DATA */
+			0x000d010a,	/* DENALI_PI_102_DATA */
+			0x0100c802,	/* DENALI_PI_103_DATA */
+			0x010a0064,	/* DENALI_PI_104_DATA */
+			0x000e0100,	/* DENALI_PI_105_DATA */
+			0x0100000e,	/* DENALI_PI_106_DATA */
+			0x00c900c9,	/* DENALI_PI_107_DATA */
+			0x00650100,	/* DENALI_PI_108_DATA */
+			0x1e1a0065,	/* DENALI_PI_109_DATA */
+			0x10010204,	/* DENALI_PI_110_DATA */
+			0x06070605,	/* DENALI_PI_111_DATA */
+			0x20000202,	/* DENALI_PI_112_DATA */
+			0x00201000,	/* DENALI_PI_113_DATA */
+			0x00201000,	/* DENALI_PI_114_DATA */
+			0x04041000,	/* DENALI_PI_115_DATA */
+			0x10020100,	/* DENALI_PI_116_DATA */
+			0x0003010c,	/* DENALI_PI_117_DATA */
+			0x004b004a,	/* DENALI_PI_118_DATA */
+			0x1a0f0000,	/* DENALI_PI_119_DATA */
+			0x0102041e,	/* DENALI_PI_120_DATA */
+			0x34000000,	/* DENALI_PI_121_DATA */
+			0x00000000,	/* DENALI_PI_122_DATA */
+			0x00000000,	/* DENALI_PI_123_DATA */
+			0x00010000,	/* DENALI_PI_124_DATA */
+			0x00000400,	/* DENALI_PI_125_DATA */
+			0x00310000,	/* DENALI_PI_126_DATA */
+			0x004d4d00,	/* DENALI_PI_127_DATA */
+			0x00120024,	/* DENALI_PI_128_DATA */
+			0x4d000031,	/* DENALI_PI_129_DATA */
+			0x0000144d,	/* DENALI_PI_130_DATA */
+			0x00310009,	/* DENALI_PI_131_DATA */
+			0x004d4d00,	/* DENALI_PI_132_DATA */
+			0x00000004,	/* DENALI_PI_133_DATA */
+			0x4d000031,	/* DENALI_PI_134_DATA */
+			0x0000244d,	/* DENALI_PI_135_DATA */
+			0x00310012,	/* DENALI_PI_136_DATA */
+			0x004d4d00,	/* DENALI_PI_137_DATA */
+			0x00090014,	/* DENALI_PI_138_DATA */
+			0x4d000031,	/* DENALI_PI_139_DATA */
+			0x0004004d,	/* DENALI_PI_140_DATA */
+			0x00310000,	/* DENALI_PI_141_DATA */
+			0x004d4d00,	/* DENALI_PI_142_DATA */
+			0x00120024,	/* DENALI_PI_143_DATA */
+			0x4d000031,	/* DENALI_PI_144_DATA */
+			0x0000144d,	/* DENALI_PI_145_DATA */
+			0x00310009,	/* DENALI_PI_146_DATA */
+			0x004d4d00,	/* DENALI_PI_147_DATA */
+			0x00000004,	/* DENALI_PI_148_DATA */
+			0x4d000031,	/* DENALI_PI_149_DATA */
+			0x0000244d,	/* DENALI_PI_150_DATA */
+			0x00310012,	/* DENALI_PI_151_DATA */
+			0x004d4d00,	/* DENALI_PI_152_DATA */
+			0x00090014,	/* DENALI_PI_153_DATA */
+			0x4d000031,	/* DENALI_PI_154_DATA */
+			0x0200004d,	/* DENALI_PI_155_DATA */
+			0x00c8000d,	/* DENALI_PI_156_DATA */
+			0x08080064,	/* DENALI_PI_157_DATA */
+			0x040a0404,	/* DENALI_PI_158_DATA */
+			0x03000d92,	/* DENALI_PI_159_DATA */
+			0x010a2001,	/* DENALI_PI_160_DATA */
+			0x0f11080a,	/* DENALI_PI_161_DATA */
+			0x0000110a,	/* DENALI_PI_162_DATA */
+			0x2200d92e,	/* DENALI_PI_163_DATA */
+			0x080c2003,	/* DENALI_PI_164_DATA */
+			0x0809080a,	/* DENALI_PI_165_DATA */
+			0x00000a0a,	/* DENALI_PI_166_DATA */
+			0x11006c97,	/* DENALI_PI_167_DATA */
+			0x040a2002,	/* DENALI_PI_168_DATA */
+			0x0200020a,	/* DENALI_PI_169_DATA */
+			0x02000200,	/* DENALI_PI_170_DATA */
+			0x02000200,	/* DENALI_PI_171_DATA */
+			0x02000200,	/* DENALI_PI_172_DATA */
+			0x02000200,	/* DENALI_PI_173_DATA */
+			0x00000000,	/* DENALI_PI_174_DATA */
+			0x00000000,	/* DENALI_PI_175_DATA */
+			0x00000000,	/* DENALI_PI_176_DATA */
+			0x00000000,	/* DENALI_PI_177_DATA */
+			0x00000000,	/* DENALI_PI_178_DATA */
+			0x00000000,	/* DENALI_PI_179_DATA */
+			0x00000000,	/* DENALI_PI_180_DATA */
+			0x00000000,	/* DENALI_PI_181_DATA */
+			0x00000000,	/* DENALI_PI_182_DATA */
+			0x00000000,	/* DENALI_PI_183_DATA */
+			0x00000000,	/* DENALI_PI_184_DATA */
+			0x00000000,	/* DENALI_PI_185_DATA */
+			0x01000400,	/* DENALI_PI_186_DATA */
+			0x00017600,	/* DENALI_PI_187_DATA */
+			0x00000e9c,	/* DENALI_PI_188_DATA */
+			0x00001850,	/* DENALI_PI_189_DATA */
+			0x0000f320,	/* DENALI_PI_190_DATA */
+			0x00000c20,	/* DENALI_PI_191_DATA */
+			0x00007940,	/* DENALI_PI_192_DATA */
+			0x08000000,	/* DENALI_PI_193_DATA */
+			0x00000100,	/* DENALI_PI_194_DATA */
+			0x00000000,	/* DENALI_PI_195_DATA */
+			0x00000000,	/* DENALI_PI_196_DATA */
+			0x00000000,	/* DENALI_PI_197_DATA */
+			0x00000000,	/* DENALI_PI_198_DATA */
+			0x00000002	/* DENALI_PI_199_DATA */
+		}
+	},
+	{
+		{
+			0x76543210,	/* DENALI_PHY_00_DATA */
+			0x0004f008,	/* DENALI_PHY_01_DATA */
+			0x00020119,	/* DENALI_PHY_02_DATA */
+			0x00000000,	/* DENALI_PHY_03_DATA */
+			0x00000000,	/* DENALI_PHY_04_DATA */
+			0x00010000,	/* DENALI_PHY_05_DATA */
+			0x01665555,	/* DENALI_PHY_06_DATA */
+			0x03665555,	/* DENALI_PHY_07_DATA */
+			0x00010f00,	/* DENALI_PHY_08_DATA */
+			0x05010200,	/* DENALI_PHY_09_DATA */
+			0x00000002,	/* DENALI_PHY_10_DATA */
+			0x00170180,	/* DENALI_PHY_11_DATA */
+			0x00cc0201,	/* DENALI_PHY_12_DATA */
+			0x00030066,	/* DENALI_PHY_13_DATA */
+			0x00000000,	/* DENALI_PHY_14_DATA */
+			0x00000000,	/* DENALI_PHY_15_DATA */
+			0x00000000,	/* DENALI_PHY_16_DATA */
+			0x00000000,	/* DENALI_PHY_17_DATA */
+			0x00000000,	/* DENALI_PHY_18_DATA */
+			0x00000000,	/* DENALI_PHY_19_DATA */
+			0x00000000,	/* DENALI_PHY_20_DATA */
+			0x00000000,	/* DENALI_PHY_21_DATA */
+			0x04080000,	/* DENALI_PHY_22_DATA */
+			0x04080400,	/* DENALI_PHY_23_DATA */
+			0x30000000,	/* DENALI_PHY_24_DATA */
+			0x0c00c007,	/* DENALI_PHY_25_DATA */
+			0x00000100,	/* DENALI_PHY_26_DATA */
+			0x00000000,	/* DENALI_PHY_27_DATA */
+			0xfd02fe01,	/* DENALI_PHY_28_DATA */
+			0xf708fb04,	/* DENALI_PHY_29_DATA */
+			0xdf20ef10,	/* DENALI_PHY_30_DATA */
+			0x7f80bf40,	/* DENALI_PHY_31_DATA */
+			0x0001aaaa,	/* DENALI_PHY_32_DATA */
+			0x00000000,	/* DENALI_PHY_33_DATA */
+			0x00000000,	/* DENALI_PHY_34_DATA */
+			0x00000000,	/* DENALI_PHY_35_DATA */
+			0x00000000,	/* DENALI_PHY_36_DATA */
+			0x00000000,	/* DENALI_PHY_37_DATA */
+			0x00000000,	/* DENALI_PHY_38_DATA */
+			0x00000000,	/* DENALI_PHY_39_DATA */
+			0x00000000,	/* DENALI_PHY_40_DATA */
+			0x00000000,	/* DENALI_PHY_41_DATA */
+			0x00000000,	/* DENALI_PHY_42_DATA */
+			0x00000000,	/* DENALI_PHY_43_DATA */
+			0x00000000,	/* DENALI_PHY_44_DATA */
+			0x00000000,	/* DENALI_PHY_45_DATA */
+			0x00000000,	/* DENALI_PHY_46_DATA */
+			0x00000000,	/* DENALI_PHY_47_DATA */
+			0x00000000,	/* DENALI_PHY_48_DATA */
+			0x00000000,	/* DENALI_PHY_49_DATA */
+			0x00000000,	/* DENALI_PHY_50_DATA */
+			0x00000000,	/* DENALI_PHY_51_DATA */
+			0x00200000,	/* DENALI_PHY_52_DATA */
+			0x00000000,	/* DENALI_PHY_53_DATA */
+			0x00000000,	/* DENALI_PHY_54_DATA */
+			0x00000000,	/* DENALI_PHY_55_DATA */
+			0x00000000,	/* DENALI_PHY_56_DATA */
+			0x00000000,	/* DENALI_PHY_57_DATA */
+			0x00000000,	/* DENALI_PHY_58_DATA */
+			0x02800280,	/* DENALI_PHY_59_DATA */
+			0x02800280,	/* DENALI_PHY_60_DATA */
+			0x02800280,	/* DENALI_PHY_61_DATA */
+			0x02800280,	/* DENALI_PHY_62_DATA */
+			0x00000280,	/* DENALI_PHY_63_DATA */
+			0x00000000,	/* DENALI_PHY_64_DATA */
+			0x00000000,	/* DENALI_PHY_65_DATA */
+			0x00000000,	/* DENALI_PHY_66_DATA */
+			0x00000000,	/* DENALI_PHY_67_DATA */
+			0x00800000,	/* DENALI_PHY_68_DATA */
+			0x00800080,	/* DENALI_PHY_69_DATA */
+			0x00800080,	/* DENALI_PHY_70_DATA */
+			0x00800080,	/* DENALI_PHY_71_DATA */
+			0x00800080,	/* DENALI_PHY_72_DATA */
+			0x00800080,	/* DENALI_PHY_73_DATA */
+			0x00800080,	/* DENALI_PHY_74_DATA */
+			0x00800080,	/* DENALI_PHY_75_DATA */
+			0x00800080,	/* DENALI_PHY_76_DATA */
+			0x01190080,	/* DENALI_PHY_77_DATA */
+			0x00000002,	/* DENALI_PHY_78_DATA */
+			0x00000000,	/* DENALI_PHY_79_DATA */
+			0x00000000,	/* DENALI_PHY_80_DATA */
+			0x00000200,	/* DENALI_PHY_81_DATA */
+			0x00000000,	/* DENALI_PHY_82_DATA */
+			0x51315152,	/* DENALI_PHY_83_DATA */
+			0xc0013150,	/* DENALI_PHY_84_DATA */
+			0x020000c0,	/* DENALI_PHY_85_DATA */
+			0x00100001,	/* DENALI_PHY_86_DATA */
+			0x07054204,	/* DENALI_PHY_87_DATA */
+			0x000f0c18,	/* DENALI_PHY_88_DATA */
+			0x01000140,	/* DENALI_PHY_89_DATA */
+			0x00000c10,	/* DENALI_PHY_90_DATA */
+			0x00000000,	/* DENALI_PHY_91_DATA */
+			0x00000000,	/* DENALI_PHY_92_DATA */
+			0x00000000,	/* DENALI_PHY_93_DATA */
+			0x00000000,	/* DENALI_PHY_94_DATA */
+			0x00000000,	/* DENALI_PHY_95_DATA */
+			0x00000000,	/* DENALI_PHY_96_DATA */
+			0x00000000,	/* DENALI_PHY_97_DATA */
+			0x00000000,	/* DENALI_PHY_98_DATA */
+			0x00000000,	/* DENALI_PHY_99_DATA */
+			0x00000000,	/* DENALI_PHY_100_DATA */
+			0x00000000,	/* DENALI_PHY_101_DATA */
+			0x00000000,	/* DENALI_PHY_102_DATA */
+			0x00000000,	/* DENALI_PHY_103_DATA */
+			0x00000000,	/* DENALI_PHY_104_DATA */
+			0x00000000,	/* DENALI_PHY_105_DATA */
+			0x00000000,	/* DENALI_PHY_106_DATA */
+			0x00000000,	/* DENALI_PHY_107_DATA */
+			0x00000000,	/* DENALI_PHY_108_DATA */
+			0x00000000,	/* DENALI_PHY_109_DATA */
+			0x00000000,	/* DENALI_PHY_110_DATA */
+			0x00000000,	/* DENALI_PHY_111_DATA */
+			0x00000000,	/* DENALI_PHY_112_DATA */
+			0x00000000,	/* DENALI_PHY_113_DATA */
+			0x00000000,	/* DENALI_PHY_114_DATA */
+			0x00000000,	/* DENALI_PHY_115_DATA */
+			0x00000000,	/* DENALI_PHY_116_DATA */
+			0x00000000,	/* DENALI_PHY_117_DATA */
+			0x00000000,	/* DENALI_PHY_118_DATA */
+			0x00000000,	/* DENALI_PHY_119_DATA */
+			0x00000000,	/* DENALI_PHY_120_DATA */
+			0x00000000,	/* DENALI_PHY_121_DATA */
+			0x00000000,	/* DENALI_PHY_122_DATA */
+			0x00000000,	/* DENALI_PHY_123_DATA */
+			0x00000000,	/* DENALI_PHY_124_DATA */
+			0x00000000,	/* DENALI_PHY_125_DATA */
+			0x00000000,	/* DENALI_PHY_126_DATA */
+			0x00000000,	/* DENALI_PHY_127_DATA */
+			0x76543210,	/* DENALI_PHY_128_DATA */
+			0x0004f008,	/* DENALI_PHY_129_DATA */
+			0x00020119,	/* DENALI_PHY_130_DATA */
+			0x00000000,	/* DENALI_PHY_131_DATA */
+			0x00000000,	/* DENALI_PHY_132_DATA */
+			0x00010000,	/* DENALI_PHY_133_DATA */
+			0x01665555,	/* DENALI_PHY_134_DATA */
+			0x03665555,	/* DENALI_PHY_135_DATA */
+			0x00010f00,	/* DENALI_PHY_136_DATA */
+			0x05010200,	/* DENALI_PHY_137_DATA */
+			0x00000002,	/* DENALI_PHY_138_DATA */
+			0x00170180,	/* DENALI_PHY_139_DATA */
+			0x00cc0201,	/* DENALI_PHY_140_DATA */
+			0x00030066,	/* DENALI_PHY_141_DATA */
+			0x00000000,	/* DENALI_PHY_142_DATA */
+			0x00000000,	/* DENALI_PHY_143_DATA */
+			0x00000000,	/* DENALI_PHY_144_DATA */
+			0x00000000,	/* DENALI_PHY_145_DATA */
+			0x00000000,	/* DENALI_PHY_146_DATA */
+			0x00000000,	/* DENALI_PHY_147_DATA */
+			0x00000000,	/* DENALI_PHY_148_DATA */
+			0x00000000,	/* DENALI_PHY_149_DATA */
+			0x04080000,	/* DENALI_PHY_150_DATA */
+			0x04080400,	/* DENALI_PHY_151_DATA */
+			0x30000000,	/* DENALI_PHY_152_DATA */
+			0x0c00c007,	/* DENALI_PHY_153_DATA */
+			0x00000100,	/* DENALI_PHY_154_DATA */
+			0x00000000,	/* DENALI_PHY_155_DATA */
+			0xfd02fe01,	/* DENALI_PHY_156_DATA */
+			0xf708fb04,	/* DENALI_PHY_157_DATA */
+			0xdf20ef10,	/* DENALI_PHY_158_DATA */
+			0x7f80bf40,	/* DENALI_PHY_159_DATA */
+			0x0000aaaa,	/* DENALI_PHY_160_DATA */
+			0x00000000,	/* DENALI_PHY_161_DATA */
+			0x00000000,	/* DENALI_PHY_162_DATA */
+			0x00000000,	/* DENALI_PHY_163_DATA */
+			0x00000000,	/* DENALI_PHY_164_DATA */
+			0x00000000,	/* DENALI_PHY_165_DATA */
+			0x00000000,	/* DENALI_PHY_166_DATA */
+			0x00000000,	/* DENALI_PHY_167_DATA */
+			0x00000000,	/* DENALI_PHY_168_DATA */
+			0x00000000,	/* DENALI_PHY_169_DATA */
+			0x00000000,	/* DENALI_PHY_170_DATA */
+			0x00000000,	/* DENALI_PHY_171_DATA */
+			0x00000000,	/* DENALI_PHY_172_DATA */
+			0x00000000,	/* DENALI_PHY_173_DATA */
+			0x00000000,	/* DENALI_PHY_174_DATA */
+			0x00000000,	/* DENALI_PHY_175_DATA */
+			0x00000000,	/* DENALI_PHY_176_DATA */
+			0x00000000,	/* DENALI_PHY_177_DATA */
+			0x00000000,	/* DENALI_PHY_178_DATA */
+			0x00000000,	/* DENALI_PHY_179_DATA */
+			0x00200000,	/* DENALI_PHY_180_DATA */
+			0x00000000,	/* DENALI_PHY_181_DATA */
+			0x00000000,	/* DENALI_PHY_182_DATA */
+			0x00000000,	/* DENALI_PHY_183_DATA */
+			0x00000000,	/* DENALI_PHY_184_DATA */
+			0x00000000,	/* DENALI_PHY_185_DATA */
+			0x00000000,	/* DENALI_PHY_186_DATA */
+			0x02800280,	/* DENALI_PHY_187_DATA */
+			0x02800280,	/* DENALI_PHY_188_DATA */
+			0x02800280,	/* DENALI_PHY_189_DATA */
+			0x02800280,	/* DENALI_PHY_190_DATA */
+			0x00000280,	/* DENALI_PHY_191_DATA */
+			0x00000000,	/* DENALI_PHY_192_DATA */
+			0x00000000,	/* DENALI_PHY_193_DATA */
+			0x00000000,	/* DENALI_PHY_194_DATA */
+			0x00000000,	/* DENALI_PHY_195_DATA */
+			0x00800000,	/* DENALI_PHY_196_DATA */
+			0x00800080,	/* DENALI_PHY_197_DATA */
+			0x00800080,	/* DENALI_PHY_198_DATA */
+			0x00800080,	/* DENALI_PHY_199_DATA */
+			0x00800080,	/* DENALI_PHY_200_DATA */
+			0x00800080,	/* DENALI_PHY_201_DATA */
+			0x00800080,	/* DENALI_PHY_202_DATA */
+			0x00800080,	/* DENALI_PHY_203_DATA */
+			0x00800080,	/* DENALI_PHY_204_DATA */
+			0x01190080,	/* DENALI_PHY_205_DATA */
+			0x00000002,	/* DENALI_PHY_206_DATA */
+			0x00000000,	/* DENALI_PHY_207_DATA */
+			0x00000000,	/* DENALI_PHY_208_DATA */
+			0x00000200,	/* DENALI_PHY_209_DATA */
+			0x00000000,	/* DENALI_PHY_210_DATA */
+			0x51315152,	/* DENALI_PHY_211_DATA */
+			0xc0013150,	/* DENALI_PHY_212_DATA */
+			0x020000c0,	/* DENALI_PHY_213_DATA */
+			0x00100001,	/* DENALI_PHY_214_DATA */
+			0x07054204,	/* DENALI_PHY_215_DATA */
+			0x000f0c18,	/* DENALI_PHY_216_DATA */
+			0x01000140,	/* DENALI_PHY_217_DATA */
+			0x00000c10,	/* DENALI_PHY_218_DATA */
+			0x00000000,	/* DENALI_PHY_219_DATA */
+			0x00000000,	/* DENALI_PHY_220_DATA */
+			0x00000000,	/* DENALI_PHY_221_DATA */
+			0x00000000,	/* DENALI_PHY_222_DATA */
+			0x00000000,	/* DENALI_PHY_223_DATA */
+			0x00000000,	/* DENALI_PHY_224_DATA */
+			0x00000000,	/* DENALI_PHY_225_DATA */
+			0x00000000,	/* DENALI_PHY_226_DATA */
+			0x00000000,	/* DENALI_PHY_227_DATA */
+			0x00000000,	/* DENALI_PHY_228_DATA */
+			0x00000000,	/* DENALI_PHY_229_DATA */
+			0x00000000,	/* DENALI_PHY_230_DATA */
+			0x00000000,	/* DENALI_PHY_231_DATA */
+			0x00000000,	/* DENALI_PHY_232_DATA */
+			0x00000000,	/* DENALI_PHY_233_DATA */
+			0x00000000,	/* DENALI_PHY_234_DATA */
+			0x00000000,	/* DENALI_PHY_235_DATA */
+			0x00000000,	/* DENALI_PHY_236_DATA */
+			0x00000000,	/* DENALI_PHY_237_DATA */
+			0x00000000,	/* DENALI_PHY_238_DATA */
+			0x00000000,	/* DENALI_PHY_239_DATA */
+			0x00000000,	/* DENALI_PHY_240_DATA */
+			0x00000000,	/* DENALI_PHY_241_DATA */
+			0x00000000,	/* DENALI_PHY_242_DATA */
+			0x00000000,	/* DENALI_PHY_243_DATA */
+			0x00000000,	/* DENALI_PHY_244_DATA */
+			0x00000000,	/* DENALI_PHY_245_DATA */
+			0x00000000,	/* DENALI_PHY_246_DATA */
+			0x00000000,	/* DENALI_PHY_247_DATA */
+			0x00000000,	/* DENALI_PHY_248_DATA */
+			0x00000000,	/* DENALI_PHY_249_DATA */
+			0x00000000,	/* DENALI_PHY_250_DATA */
+			0x00000000,	/* DENALI_PHY_251_DATA */
+			0x00000000,	/* DENALI_PHY_252_DATA */
+			0x00000000,	/* DENALI_PHY_253_DATA */
+			0x00000000,	/* DENALI_PHY_254_DATA */
+			0x00000000,	/* DENALI_PHY_255_DATA */
+			0x76543210,	/* DENALI_PHY_256_DATA */
+			0x0004f008,	/* DENALI_PHY_257_DATA */
+			0x00020119,	/* DENALI_PHY_258_DATA */
+			0x00000000,	/* DENALI_PHY_259_DATA */
+			0x00000000,	/* DENALI_PHY_260_DATA */
+			0x00010000,	/* DENALI_PHY_261_DATA */
+			0x01665555,	/* DENALI_PHY_262_DATA */
+			0x03665555,	/* DENALI_PHY_263_DATA */
+			0x00010f00,	/* DENALI_PHY_264_DATA */
+			0x05010200,	/* DENALI_PHY_265_DATA */
+			0x00000002,	/* DENALI_PHY_266_DATA */
+			0x00170180,	/* DENALI_PHY_267_DATA */
+			0x00cc0201,	/* DENALI_PHY_268_DATA */
+			0x00030066,	/* DENALI_PHY_269_DATA */
+			0x00000000,	/* DENALI_PHY_270_DATA */
+			0x00000000,	/* DENALI_PHY_271_DATA */
+			0x00000000,	/* DENALI_PHY_272_DATA */
+			0x00000000,	/* DENALI_PHY_273_DATA */
+			0x00000000,	/* DENALI_PHY_274_DATA */
+			0x00000000,	/* DENALI_PHY_275_DATA */
+			0x00000000,	/* DENALI_PHY_276_DATA */
+			0x00000000,	/* DENALI_PHY_277_DATA */
+			0x04080000,	/* DENALI_PHY_278_DATA */
+			0x04080400,	/* DENALI_PHY_279_DATA */
+			0x30000000,	/* DENALI_PHY_280_DATA */
+			0x0c00c007,	/* DENALI_PHY_281_DATA */
+			0x00000100,	/* DENALI_PHY_282_DATA */
+			0x00000000,	/* DENALI_PHY_283_DATA */
+			0xfd02fe01,	/* DENALI_PHY_284_DATA */
+			0xf708fb04,	/* DENALI_PHY_285_DATA */
+			0xdf20ef10,	/* DENALI_PHY_286_DATA */
+			0x7f80bf40,	/* DENALI_PHY_287_DATA */
+			0x0001aaaa,	/* DENALI_PHY_288_DATA */
+			0x00000000,	/* DENALI_PHY_289_DATA */
+			0x00000000,	/* DENALI_PHY_290_DATA */
+			0x00000000,	/* DENALI_PHY_291_DATA */
+			0x00000000,	/* DENALI_PHY_292_DATA */
+			0x00000000,	/* DENALI_PHY_293_DATA */
+			0x00000000,	/* DENALI_PHY_294_DATA */
+			0x00000000,	/* DENALI_PHY_295_DATA */
+			0x00000000,	/* DENALI_PHY_296_DATA */
+			0x00000000,	/* DENALI_PHY_297_DATA */
+			0x00000000,	/* DENALI_PHY_298_DATA */
+			0x00000000,	/* DENALI_PHY_299_DATA */
+			0x00000000,	/* DENALI_PHY_300_DATA */
+			0x00000000,	/* DENALI_PHY_301_DATA */
+			0x00000000,	/* DENALI_PHY_302_DATA */
+			0x00000000,	/* DENALI_PHY_303_DATA */
+			0x00000000,	/* DENALI_PHY_304_DATA */
+			0x00000000,	/* DENALI_PHY_305_DATA */
+			0x00000000,	/* DENALI_PHY_306_DATA */
+			0x00000000,	/* DENALI_PHY_307_DATA */
+			0x00200000,	/* DENALI_PHY_308_DATA */
+			0x00000000,	/* DENALI_PHY_309_DATA */
+			0x00000000,	/* DENALI_PHY_310_DATA */
+			0x00000000,	/* DENALI_PHY_311_DATA */
+			0x00000000,	/* DENALI_PHY_312_DATA */
+			0x00000000,	/* DENALI_PHY_313_DATA */
+			0x00000000,	/* DENALI_PHY_314_DATA */
+			0x02800280,	/* DENALI_PHY_315_DATA */
+			0x02800280,	/* DENALI_PHY_316_DATA */
+			0x02800280,	/* DENALI_PHY_317_DATA */
+			0x02800280,	/* DENALI_PHY_318_DATA */
+			0x00000280,	/* DENALI_PHY_319_DATA */
+			0x00000000,	/* DENALI_PHY_320_DATA */
+			0x00000000,	/* DENALI_PHY_321_DATA */
+			0x00000000,	/* DENALI_PHY_322_DATA */
+			0x00000000,	/* DENALI_PHY_323_DATA */
+			0x00800000,	/* DENALI_PHY_324_DATA */
+			0x00800080,	/* DENALI_PHY_325_DATA */
+			0x00800080,	/* DENALI_PHY_326_DATA */
+			0x00800080,	/* DENALI_PHY_327_DATA */
+			0x00800080,	/* DENALI_PHY_328_DATA */
+			0x00800080,	/* DENALI_PHY_329_DATA */
+			0x00800080,	/* DENALI_PHY_330_DATA */
+			0x00800080,	/* DENALI_PHY_331_DATA */
+			0x00800080,	/* DENALI_PHY_332_DATA */
+			0x01190080,	/* DENALI_PHY_333_DATA */
+			0x00000002,	/* DENALI_PHY_334_DATA */
+			0x00000000,	/* DENALI_PHY_335_DATA */
+			0x00000000,	/* DENALI_PHY_336_DATA */
+			0x00000200,	/* DENALI_PHY_337_DATA */
+			0x00000000,	/* DENALI_PHY_338_DATA */
+			0x51315152,	/* DENALI_PHY_339_DATA */
+			0xc0013150,	/* DENALI_PHY_340_DATA */
+			0x020000c0,	/* DENALI_PHY_341_DATA */
+			0x00100001,	/* DENALI_PHY_342_DATA */
+			0x07054204,	/* DENALI_PHY_343_DATA */
+			0x000f0c18,	/* DENALI_PHY_344_DATA */
+			0x01000140,	/* DENALI_PHY_345_DATA */
+			0x00000c10,	/* DENALI_PHY_346_DATA */
+			0x00000000,	/* DENALI_PHY_347_DATA */
+			0x00000000,	/* DENALI_PHY_348_DATA */
+			0x00000000,	/* DENALI_PHY_349_DATA */
+			0x00000000,	/* DENALI_PHY_350_DATA */
+			0x00000000,	/* DENALI_PHY_351_DATA */
+			0x00000000,	/* DENALI_PHY_352_DATA */
+			0x00000000,	/* DENALI_PHY_353_DATA */
+			0x00000000,	/* DENALI_PHY_354_DATA */
+			0x00000000,	/* DENALI_PHY_355_DATA */
+			0x00000000,	/* DENALI_PHY_356_DATA */
+			0x00000000,	/* DENALI_PHY_357_DATA */
+			0x00000000,	/* DENALI_PHY_358_DATA */
+			0x00000000,	/* DENALI_PHY_359_DATA */
+			0x00000000,	/* DENALI_PHY_360_DATA */
+			0x00000000,	/* DENALI_PHY_361_DATA */
+			0x00000000,	/* DENALI_PHY_362_DATA */
+			0x00000000,	/* DENALI_PHY_363_DATA */
+			0x00000000,	/* DENALI_PHY_364_DATA */
+			0x00000000,	/* DENALI_PHY_365_DATA */
+			0x00000000,	/* DENALI_PHY_366_DATA */
+			0x00000000,	/* DENALI_PHY_367_DATA */
+			0x00000000,	/* DENALI_PHY_368_DATA */
+			0x00000000,	/* DENALI_PHY_369_DATA */
+			0x00000000,	/* DENALI_PHY_370_DATA */
+			0x00000000,	/* DENALI_PHY_371_DATA */
+			0x00000000,	/* DENALI_PHY_372_DATA */
+			0x00000000,	/* DENALI_PHY_373_DATA */
+			0x00000000,	/* DENALI_PHY_374_DATA */
+			0x00000000,	/* DENALI_PHY_375_DATA */
+			0x00000000,	/* DENALI_PHY_376_DATA */
+			0x00000000,	/* DENALI_PHY_377_DATA */
+			0x00000000,	/* DENALI_PHY_378_DATA */
+			0x00000000,	/* DENALI_PHY_379_DATA */
+			0x00000000,	/* DENALI_PHY_380_DATA */
+			0x00000000,	/* DENALI_PHY_381_DATA */
+			0x00000000,	/* DENALI_PHY_382_DATA */
+			0x00000000,	/* DENALI_PHY_383_DATA */
+			0x76543210,	/* DENALI_PHY_384_DATA */
+			0x0004f008,	/* DENALI_PHY_385_DATA */
+			0x00020119,	/* DENALI_PHY_386_DATA */
+			0x00000000,	/* DENALI_PHY_387_DATA */
+			0x00000000,	/* DENALI_PHY_388_DATA */
+			0x00010000,	/* DENALI_PHY_389_DATA */
+			0x01665555,	/* DENALI_PHY_390_DATA */
+			0x03665555,	/* DENALI_PHY_391_DATA */
+			0x00010f00,	/* DENALI_PHY_392_DATA */
+			0x05010200,	/* DENALI_PHY_393_DATA */
+			0x00000002,	/* DENALI_PHY_394_DATA */
+			0x00170180,	/* DENALI_PHY_395_DATA */
+			0x00cc0201,	/* DENALI_PHY_396_DATA */
+			0x00030066,	/* DENALI_PHY_397_DATA */
+			0x00000000,	/* DENALI_PHY_398_DATA */
+			0x00000000,	/* DENALI_PHY_399_DATA */
+			0x00000000,	/* DENALI_PHY_400_DATA */
+			0x00000000,	/* DENALI_PHY_401_DATA */
+			0x00000000,	/* DENALI_PHY_402_DATA */
+			0x00000000,	/* DENALI_PHY_403_DATA */
+			0x00000000,	/* DENALI_PHY_404_DATA */
+			0x00000000,	/* DENALI_PHY_405_DATA */
+			0x04080000,	/* DENALI_PHY_406_DATA */
+			0x04080400,	/* DENALI_PHY_407_DATA */
+			0x30000000,	/* DENALI_PHY_408_DATA */
+			0x0c00c007,	/* DENALI_PHY_409_DATA */
+			0x00000100,	/* DENALI_PHY_410_DATA */
+			0x00000000,	/* DENALI_PHY_411_DATA */
+			0xfd02fe01,	/* DENALI_PHY_412_DATA */
+			0xf708fb04,	/* DENALI_PHY_413_DATA */
+			0xdf20ef10,	/* DENALI_PHY_414_DATA */
+			0x7f80bf40,	/* DENALI_PHY_415_DATA */
+			0x0000aaaa,	/* DENALI_PHY_416_DATA */
+			0x00000000,	/* DENALI_PHY_417_DATA */
+			0x00000000,	/* DENALI_PHY_418_DATA */
+			0x00000000,	/* DENALI_PHY_419_DATA */
+			0x00000000,	/* DENALI_PHY_420_DATA */
+			0x00000000,	/* DENALI_PHY_421_DATA */
+			0x00000000,	/* DENALI_PHY_422_DATA */
+			0x00000000,	/* DENALI_PHY_423_DATA */
+			0x00000000,	/* DENALI_PHY_424_DATA */
+			0x00000000,	/* DENALI_PHY_425_DATA */
+			0x00000000,	/* DENALI_PHY_426_DATA */
+			0x00000000,	/* DENALI_PHY_427_DATA */
+			0x00000000,	/* DENALI_PHY_428_DATA */
+			0x00000000,	/* DENALI_PHY_429_DATA */
+			0x00000000,	/* DENALI_PHY_430_DATA */
+			0x00000000,	/* DENALI_PHY_431_DATA */
+			0x00000000,	/* DENALI_PHY_432_DATA */
+			0x00000000,	/* DENALI_PHY_433_DATA */
+			0x00000000,	/* DENALI_PHY_434_DATA */
+			0x00000000,	/* DENALI_PHY_435_DATA */
+			0x00200000,	/* DENALI_PHY_436_DATA */
+			0x00000000,	/* DENALI_PHY_437_DATA */
+			0x00000000,	/* DENALI_PHY_438_DATA */
+			0x00000000,	/* DENALI_PHY_439_DATA */
+			0x00000000,	/* DENALI_PHY_440_DATA */
+			0x00000000,	/* DENALI_PHY_441_DATA */
+			0x00000000,	/* DENALI_PHY_442_DATA */
+			0x02800280,	/* DENALI_PHY_443_DATA */
+			0x02800280,	/* DENALI_PHY_444_DATA */
+			0x02800280,	/* DENALI_PHY_445_DATA */
+			0x02800280,	/* DENALI_PHY_446_DATA */
+			0x00000280,	/* DENALI_PHY_447_DATA */
+			0x00000000,	/* DENALI_PHY_448_DATA */
+			0x00000000,	/* DENALI_PHY_449_DATA */
+			0x00000000,	/* DENALI_PHY_450_DATA */
+			0x00000000,	/* DENALI_PHY_451_DATA */
+			0x00800000,	/* DENALI_PHY_452_DATA */
+			0x00800080,	/* DENALI_PHY_453_DATA */
+			0x00800080,	/* DENALI_PHY_454_DATA */
+			0x00800080,	/* DENALI_PHY_455_DATA */
+			0x00800080,	/* DENALI_PHY_456_DATA */
+			0x00800080,	/* DENALI_PHY_457_DATA */
+			0x00800080,	/* DENALI_PHY_458_DATA */
+			0x00800080,	/* DENALI_PHY_459_DATA */
+			0x00800080,	/* DENALI_PHY_460_DATA */
+			0x01190080,	/* DENALI_PHY_461_DATA */
+			0x00000002,	/* DENALI_PHY_462_DATA */
+			0x00000000,	/* DENALI_PHY_463_DATA */
+			0x00000000,	/* DENALI_PHY_464_DATA */
+			0x00000200,	/* DENALI_PHY_465_DATA */
+			0x00000000,	/* DENALI_PHY_466_DATA */
+			0x51315152,	/* DENALI_PHY_467_DATA */
+			0xc0013150,	/* DENALI_PHY_468_DATA */
+			0x020000c0,	/* DENALI_PHY_469_DATA */
+			0x00100001,	/* DENALI_PHY_470_DATA */
+			0x07054204,	/* DENALI_PHY_471_DATA */
+			0x000f0c18,	/* DENALI_PHY_472_DATA */
+			0x01000140,	/* DENALI_PHY_473_DATA */
+			0x00000c10,	/* DENALI_PHY_474_DATA */
+			0x00000000,	/* DENALI_PHY_475_DATA */
+			0x00000000,	/* DENALI_PHY_476_DATA */
+			0x00000000,	/* DENALI_PHY_477_DATA */
+			0x00000000,	/* DENALI_PHY_478_DATA */
+			0x00000000,	/* DENALI_PHY_479_DATA */
+			0x00000000,	/* DENALI_PHY_480_DATA */
+			0x00000000,	/* DENALI_PHY_481_DATA */
+			0x00000000,	/* DENALI_PHY_482_DATA */
+			0x00000000,	/* DENALI_PHY_483_DATA */
+			0x00000000,	/* DENALI_PHY_484_DATA */
+			0x00000000,	/* DENALI_PHY_485_DATA */
+			0x00000000,	/* DENALI_PHY_486_DATA */
+			0x00000000,	/* DENALI_PHY_487_DATA */
+			0x00000000,	/* DENALI_PHY_488_DATA */
+			0x00000000,	/* DENALI_PHY_489_DATA */
+			0x00000000,	/* DENALI_PHY_490_DATA */
+			0x00000000,	/* DENALI_PHY_491_DATA */
+			0x00000000,	/* DENALI_PHY_492_DATA */
+			0x00000000,	/* DENALI_PHY_493_DATA */
+			0x00000000,	/* DENALI_PHY_494_DATA */
+			0x00000000,	/* DENALI_PHY_495_DATA */
+			0x00000000,	/* DENALI_PHY_496_DATA */
+			0x00000000,	/* DENALI_PHY_497_DATA */
+			0x00000000,	/* DENALI_PHY_498_DATA */
+			0x00000000,	/* DENALI_PHY_499_DATA */
+			0x00000000,	/* DENALI_PHY_500_DATA */
+			0x00000000,	/* DENALI_PHY_501_DATA */
+			0x00000000,	/* DENALI_PHY_502_DATA */
+			0x00000000,	/* DENALI_PHY_503_DATA */
+			0x00000000,	/* DENALI_PHY_504_DATA */
+			0x00000000,	/* DENALI_PHY_505_DATA */
+			0x00000000,	/* DENALI_PHY_506_DATA */
+			0x00000000,	/* DENALI_PHY_507_DATA */
+			0x00000000,	/* DENALI_PHY_508_DATA */
+			0x00000000,	/* DENALI_PHY_509_DATA */
+			0x00000000,	/* DENALI_PHY_510_DATA */
+			0x00000000,	/* DENALI_PHY_511_DATA */
+			0x00000000,	/* DENALI_PHY_512_DATA */
+			0x00000000,	/* DENALI_PHY_513_DATA */
+			0x00000000,	/* DENALI_PHY_514_DATA */
+			0x00000000,	/* DENALI_PHY_515_DATA */
+			0x00000000,	/* DENALI_PHY_516_DATA */
+			0x00000000,	/* DENALI_PHY_517_DATA */
+			0x00000000,	/* DENALI_PHY_518_DATA */
+			0x00000002,	/* DENALI_PHY_519_DATA */
+			0x00000000,	/* DENALI_PHY_520_DATA */
+			0x00000000,	/* DENALI_PHY_521_DATA */
+			0x00000000,	/* DENALI_PHY_522_DATA */
+			0x00400320,	/* DENALI_PHY_523_DATA */
+			0x00000040,	/* DENALI_PHY_524_DATA */
+			0x00dcba98,	/* DENALI_PHY_525_DATA */
+			0x00000000,	/* DENALI_PHY_526_DATA */
+			0x00dcba98,	/* DENALI_PHY_527_DATA */
+			0x01000000,	/* DENALI_PHY_528_DATA */
+			0x00020003,	/* DENALI_PHY_529_DATA */
+			0x00000000,	/* DENALI_PHY_530_DATA */
+			0x00000000,	/* DENALI_PHY_531_DATA */
+			0x00000000,	/* DENALI_PHY_532_DATA */
+			0x0000002a,	/* DENALI_PHY_533_DATA */
+			0x00000015,	/* DENALI_PHY_534_DATA */
+			0x00000015,	/* DENALI_PHY_535_DATA */
+			0x0000002a,	/* DENALI_PHY_536_DATA */
+			0x00000033,	/* DENALI_PHY_537_DATA */
+			0x0000000c,	/* DENALI_PHY_538_DATA */
+			0x0000000c,	/* DENALI_PHY_539_DATA */
+			0x00000033,	/* DENALI_PHY_540_DATA */
+			0x0a418820,	/* DENALI_PHY_541_DATA */
+			0x003f0000,	/* DENALI_PHY_542_DATA */
+			0x0000003f,	/* DENALI_PHY_543_DATA */
+			0x00030055,	/* DENALI_PHY_544_DATA */
+			0x03000300,	/* DENALI_PHY_545_DATA */
+			0x03000300,	/* DENALI_PHY_546_DATA */
+			0x00000300,	/* DENALI_PHY_547_DATA */
+			0x42080010,	/* DENALI_PHY_548_DATA */
+			0x00000003,	/* DENALI_PHY_549_DATA */
+			0x00000000,	/* DENALI_PHY_550_DATA */
+			0x00000000,	/* DENALI_PHY_551_DATA */
+			0x00000000,	/* DENALI_PHY_552_DATA */
+			0x00000000,	/* DENALI_PHY_553_DATA */
+			0x00000000,	/* DENALI_PHY_554_DATA */
+			0x00000000,	/* DENALI_PHY_555_DATA */
+			0x00000000,	/* DENALI_PHY_556_DATA */
+			0x00000000,	/* DENALI_PHY_557_DATA */
+			0x00000000,	/* DENALI_PHY_558_DATA */
+			0x00000000,	/* DENALI_PHY_559_DATA */
+			0x00000000,	/* DENALI_PHY_560_DATA */
+			0x00000000,	/* DENALI_PHY_561_DATA */
+			0x00000000,	/* DENALI_PHY_562_DATA */
+			0x00000000,	/* DENALI_PHY_563_DATA */
+			0x00000000,	/* DENALI_PHY_564_DATA */
+			0x00000000,	/* DENALI_PHY_565_DATA */
+			0x00000000,	/* DENALI_PHY_566_DATA */
+			0x00000000,	/* DENALI_PHY_567_DATA */
+			0x00000000,	/* DENALI_PHY_568_DATA */
+			0x00000000,	/* DENALI_PHY_569_DATA */
+			0x00000000,	/* DENALI_PHY_570_DATA */
+			0x00000000,	/* DENALI_PHY_571_DATA */
+			0x00000000,	/* DENALI_PHY_572_DATA */
+			0x00000000,	/* DENALI_PHY_573_DATA */
+			0x00000000,	/* DENALI_PHY_574_DATA */
+			0x00000000,	/* DENALI_PHY_575_DATA */
+			0x00000000,	/* DENALI_PHY_576_DATA */
+			0x00000000,	/* DENALI_PHY_577_DATA */
+			0x00000000,	/* DENALI_PHY_578_DATA */
+			0x00000000,	/* DENALI_PHY_579_DATA */
+			0x00000000,	/* DENALI_PHY_580_DATA */
+			0x00000000,	/* DENALI_PHY_581_DATA */
+			0x00000000,	/* DENALI_PHY_582_DATA */
+			0x00000000,	/* DENALI_PHY_583_DATA */
+			0x00000000,	/* DENALI_PHY_584_DATA */
+			0x00000000,	/* DENALI_PHY_585_DATA */
+			0x00000000,	/* DENALI_PHY_586_DATA */
+			0x00000000,	/* DENALI_PHY_587_DATA */
+			0x00000000,	/* DENALI_PHY_588_DATA */
+			0x00000000,	/* DENALI_PHY_589_DATA */
+			0x00000000,	/* DENALI_PHY_590_DATA */
+			0x00000000,	/* DENALI_PHY_591_DATA */
+			0x00000000,	/* DENALI_PHY_592_DATA */
+			0x00000000,	/* DENALI_PHY_593_DATA */
+			0x00000000,	/* DENALI_PHY_594_DATA */
+			0x00000000,	/* DENALI_PHY_595_DATA */
+			0x00000000,	/* DENALI_PHY_596_DATA */
+			0x00000000,	/* DENALI_PHY_597_DATA */
+			0x00000000,	/* DENALI_PHY_598_DATA */
+			0x00000000,	/* DENALI_PHY_599_DATA */
+			0x00000000,	/* DENALI_PHY_600_DATA */
+			0x00000000,	/* DENALI_PHY_601_DATA */
+			0x00000000,	/* DENALI_PHY_602_DATA */
+			0x00000000,	/* DENALI_PHY_603_DATA */
+			0x00000000,	/* DENALI_PHY_604_DATA */
+			0x00000000,	/* DENALI_PHY_605_DATA */
+			0x00000000,	/* DENALI_PHY_606_DATA */
+			0x00000000,	/* DENALI_PHY_607_DATA */
+			0x00000000,	/* DENALI_PHY_608_DATA */
+			0x00000000,	/* DENALI_PHY_609_DATA */
+			0x00000000,	/* DENALI_PHY_610_DATA */
+			0x00000000,	/* DENALI_PHY_611_DATA */
+			0x00000000,	/* DENALI_PHY_612_DATA */
+			0x00000000,	/* DENALI_PHY_613_DATA */
+			0x00000000,	/* DENALI_PHY_614_DATA */
+			0x00000000,	/* DENALI_PHY_615_DATA */
+			0x00000000,	/* DENALI_PHY_616_DATA */
+			0x00000000,	/* DENALI_PHY_617_DATA */
+			0x00000000,	/* DENALI_PHY_618_DATA */
+			0x00000000,	/* DENALI_PHY_619_DATA */
+			0x00000000,	/* DENALI_PHY_620_DATA */
+			0x00000000,	/* DENALI_PHY_621_DATA */
+			0x00000000,	/* DENALI_PHY_622_DATA */
+			0x00000000,	/* DENALI_PHY_623_DATA */
+			0x00000000,	/* DENALI_PHY_624_DATA */
+			0x00000000,	/* DENALI_PHY_625_DATA */
+			0x00000000,	/* DENALI_PHY_626_DATA */
+			0x00000000,	/* DENALI_PHY_627_DATA */
+			0x00000000,	/* DENALI_PHY_628_DATA */
+			0x00000000,	/* DENALI_PHY_629_DATA */
+			0x00000000,	/* DENALI_PHY_630_DATA */
+			0x00000000,	/* DENALI_PHY_631_DATA */
+			0x00000000,	/* DENALI_PHY_632_DATA */
+			0x00000000,	/* DENALI_PHY_633_DATA */
+			0x00000000,	/* DENALI_PHY_634_DATA */
+			0x00000000,	/* DENALI_PHY_635_DATA */
+			0x00000000,	/* DENALI_PHY_636_DATA */
+			0x00000000,	/* DENALI_PHY_637_DATA */
+			0x00000000,	/* DENALI_PHY_638_DATA */
+			0x00000000,	/* DENALI_PHY_639_DATA */
+			0x00000000,	/* DENALI_PHY_640_DATA */
+			0x00000000,	/* DENALI_PHY_641_DATA */
+			0x00000000,	/* DENALI_PHY_642_DATA */
+			0x00000000,	/* DENALI_PHY_643_DATA */
+			0x00000000,	/* DENALI_PHY_644_DATA */
+			0x00000000,	/* DENALI_PHY_645_DATA */
+			0x00000000,	/* DENALI_PHY_646_DATA */
+			0x00000002,	/* DENALI_PHY_647_DATA */
+			0x00000000,	/* DENALI_PHY_648_DATA */
+			0x00000000,	/* DENALI_PHY_649_DATA */
+			0x00000000,	/* DENALI_PHY_650_DATA */
+			0x00400320,	/* DENALI_PHY_651_DATA */
+			0x00000040,	/* DENALI_PHY_652_DATA */
+			0x00000000,	/* DENALI_PHY_653_DATA */
+			0x00000000,	/* DENALI_PHY_654_DATA */
+			0x00000000,	/* DENALI_PHY_655_DATA */
+			0x01000000,	/* DENALI_PHY_656_DATA */
+			0x00020003,	/* DENALI_PHY_657_DATA */
+			0x00000000,	/* DENALI_PHY_658_DATA */
+			0x00000000,	/* DENALI_PHY_659_DATA */
+			0x00000000,	/* DENALI_PHY_660_DATA */
+			0x0000002a,	/* DENALI_PHY_661_DATA */
+			0x00000015,	/* DENALI_PHY_662_DATA */
+			0x00000015,	/* DENALI_PHY_663_DATA */
+			0x0000002a,	/* DENALI_PHY_664_DATA */
+			0x00000033,	/* DENALI_PHY_665_DATA */
+			0x0000000c,	/* DENALI_PHY_666_DATA */
+			0x0000000c,	/* DENALI_PHY_667_DATA */
+			0x00000033,	/* DENALI_PHY_668_DATA */
+			0x00000000,	/* DENALI_PHY_669_DATA */
+			0x00000000,	/* DENALI_PHY_670_DATA */
+			0x00000000,	/* DENALI_PHY_671_DATA */
+			0x00030055,	/* DENALI_PHY_672_DATA */
+			0x03000300,	/* DENALI_PHY_673_DATA */
+			0x03000300,	/* DENALI_PHY_674_DATA */
+			0x00000300,	/* DENALI_PHY_675_DATA */
+			0x42080010,	/* DENALI_PHY_676_DATA */
+			0x00000003,	/* DENALI_PHY_677_DATA */
+			0x00000000,	/* DENALI_PHY_678_DATA */
+			0x00000000,	/* DENALI_PHY_679_DATA */
+			0x00000000,	/* DENALI_PHY_680_DATA */
+			0x00000000,	/* DENALI_PHY_681_DATA */
+			0x00000000,	/* DENALI_PHY_682_DATA */
+			0x00000000,	/* DENALI_PHY_683_DATA */
+			0x00000000,	/* DENALI_PHY_684_DATA */
+			0x00000000,	/* DENALI_PHY_685_DATA */
+			0x00000000,	/* DENALI_PHY_686_DATA */
+			0x00000000,	/* DENALI_PHY_687_DATA */
+			0x00000000,	/* DENALI_PHY_688_DATA */
+			0x00000000,	/* DENALI_PHY_689_DATA */
+			0x00000000,	/* DENALI_PHY_690_DATA */
+			0x00000000,	/* DENALI_PHY_691_DATA */
+			0x00000000,	/* DENALI_PHY_692_DATA */
+			0x00000000,	/* DENALI_PHY_693_DATA */
+			0x00000000,	/* DENALI_PHY_694_DATA */
+			0x00000000,	/* DENALI_PHY_695_DATA */
+			0x00000000,	/* DENALI_PHY_696_DATA */
+			0x00000000,	/* DENALI_PHY_697_DATA */
+			0x00000000,	/* DENALI_PHY_698_DATA */
+			0x00000000,	/* DENALI_PHY_699_DATA */
+			0x00000000,	/* DENALI_PHY_700_DATA */
+			0x00000000,	/* DENALI_PHY_701_DATA */
+			0x00000000,	/* DENALI_PHY_702_DATA */
+			0x00000000,	/* DENALI_PHY_703_DATA */
+			0x00000000,	/* DENALI_PHY_704_DATA */
+			0x00000000,	/* DENALI_PHY_705_DATA */
+			0x00000000,	/* DENALI_PHY_706_DATA */
+			0x00000000,	/* DENALI_PHY_707_DATA */
+			0x00000000,	/* DENALI_PHY_708_DATA */
+			0x00000000,	/* DENALI_PHY_709_DATA */
+			0x00000000,	/* DENALI_PHY_710_DATA */
+			0x00000000,	/* DENALI_PHY_711_DATA */
+			0x00000000,	/* DENALI_PHY_712_DATA */
+			0x00000000,	/* DENALI_PHY_713_DATA */
+			0x00000000,	/* DENALI_PHY_714_DATA */
+			0x00000000,	/* DENALI_PHY_715_DATA */
+			0x00000000,	/* DENALI_PHY_716_DATA */
+			0x00000000,	/* DENALI_PHY_717_DATA */
+			0x00000000,	/* DENALI_PHY_718_DATA */
+			0x00000000,	/* DENALI_PHY_719_DATA */
+			0x00000000,	/* DENALI_PHY_720_DATA */
+			0x00000000,	/* DENALI_PHY_721_DATA */
+			0x00000000,	/* DENALI_PHY_722_DATA */
+			0x00000000,	/* DENALI_PHY_723_DATA */
+			0x00000000,	/* DENALI_PHY_724_DATA */
+			0x00000000,	/* DENALI_PHY_725_DATA */
+			0x00000000,	/* DENALI_PHY_726_DATA */
+			0x00000000,	/* DENALI_PHY_727_DATA */
+			0x00000000,	/* DENALI_PHY_728_DATA */
+			0x00000000,	/* DENALI_PHY_729_DATA */
+			0x00000000,	/* DENALI_PHY_730_DATA */
+			0x00000000,	/* DENALI_PHY_731_DATA */
+			0x00000000,	/* DENALI_PHY_732_DATA */
+			0x00000000,	/* DENALI_PHY_733_DATA */
+			0x00000000,	/* DENALI_PHY_734_DATA */
+			0x00000000,	/* DENALI_PHY_735_DATA */
+			0x00000000,	/* DENALI_PHY_736_DATA */
+			0x00000000,	/* DENALI_PHY_737_DATA */
+			0x00000000,	/* DENALI_PHY_738_DATA */
+			0x00000000,	/* DENALI_PHY_739_DATA */
+			0x00000000,	/* DENALI_PHY_740_DATA */
+			0x00000000,	/* DENALI_PHY_741_DATA */
+			0x00000000,	/* DENALI_PHY_742_DATA */
+			0x00000000,	/* DENALI_PHY_743_DATA */
+			0x00000000,	/* DENALI_PHY_744_DATA */
+			0x00000000,	/* DENALI_PHY_745_DATA */
+			0x00000000,	/* DENALI_PHY_746_DATA */
+			0x00000000,	/* DENALI_PHY_747_DATA */
+			0x00000000,	/* DENALI_PHY_748_DATA */
+			0x00000000,	/* DENALI_PHY_749_DATA */
+			0x00000000,	/* DENALI_PHY_750_DATA */
+			0x00000000,	/* DENALI_PHY_751_DATA */
+			0x00000000,	/* DENALI_PHY_752_DATA */
+			0x00000000,	/* DENALI_PHY_753_DATA */
+			0x00000000,	/* DENALI_PHY_754_DATA */
+			0x00000000,	/* DENALI_PHY_755_DATA */
+			0x00000000,	/* DENALI_PHY_756_DATA */
+			0x00000000,	/* DENALI_PHY_757_DATA */
+			0x00000000,	/* DENALI_PHY_758_DATA */
+			0x00000000,	/* DENALI_PHY_759_DATA */
+			0x00000000,	/* DENALI_PHY_760_DATA */
+			0x00000000,	/* DENALI_PHY_761_DATA */
+			0x00000000,	/* DENALI_PHY_762_DATA */
+			0x00000000,	/* DENALI_PHY_763_DATA */
+			0x00000000,	/* DENALI_PHY_764_DATA */
+			0x00000000,	/* DENALI_PHY_765_DATA */
+			0x00000000,	/* DENALI_PHY_766_DATA */
+			0x00000000,	/* DENALI_PHY_767_DATA */
+			0x00000000,	/* DENALI_PHY_768_DATA */
+			0x00000000,	/* DENALI_PHY_769_DATA */
+			0x00000000,	/* DENALI_PHY_770_DATA */
+			0x00000000,	/* DENALI_PHY_771_DATA */
+			0x00000000,	/* DENALI_PHY_772_DATA */
+			0x00000000,	/* DENALI_PHY_773_DATA */
+			0x00000000,	/* DENALI_PHY_774_DATA */
+			0x00000002,	/* DENALI_PHY_775_DATA */
+			0x00000000,	/* DENALI_PHY_776_DATA */
+			0x00000000,	/* DENALI_PHY_777_DATA */
+			0x00000000,	/* DENALI_PHY_778_DATA */
+			0x00400320,	/* DENALI_PHY_779_DATA */
+			0x00000040,	/* DENALI_PHY_780_DATA */
+			0x00000000,	/* DENALI_PHY_781_DATA */
+			0x00000000,	/* DENALI_PHY_782_DATA */
+			0x00000000,	/* DENALI_PHY_783_DATA */
+			0x01000000,	/* DENALI_PHY_784_DATA */
+			0x00020003,	/* DENALI_PHY_785_DATA */
+			0x00000000,	/* DENALI_PHY_786_DATA */
+			0x00000000,	/* DENALI_PHY_787_DATA */
+			0x00000000,	/* DENALI_PHY_788_DATA */
+			0x0000002a,	/* DENALI_PHY_789_DATA */
+			0x00000015,	/* DENALI_PHY_790_DATA */
+			0x00000015,	/* DENALI_PHY_791_DATA */
+			0x0000002a,	/* DENALI_PHY_792_DATA */
+			0x00000033,	/* DENALI_PHY_793_DATA */
+			0x0000000c,	/* DENALI_PHY_794_DATA */
+			0x0000000c,	/* DENALI_PHY_795_DATA */
+			0x00000033,	/* DENALI_PHY_796_DATA */
+			0x1ee6b16a,	/* DENALI_PHY_797_DATA */
+			0x10000000,	/* DENALI_PHY_798_DATA */
+			0x00000000,	/* DENALI_PHY_799_DATA */
+			0x00030055,	/* DENALI_PHY_800_DATA */
+			0x03000300,	/* DENALI_PHY_801_DATA */
+			0x03000300,	/* DENALI_PHY_802_DATA */
+			0x00000300,	/* DENALI_PHY_803_DATA */
+			0x42080010,	/* DENALI_PHY_804_DATA */
+			0x00000003,	/* DENALI_PHY_805_DATA */
+			0x00000000,	/* DENALI_PHY_806_DATA */
+			0x00000000,	/* DENALI_PHY_807_DATA */
+			0x00000000,	/* DENALI_PHY_808_DATA */
+			0x00000000,	/* DENALI_PHY_809_DATA */
+			0x00000000,	/* DENALI_PHY_810_DATA */
+			0x00000000,	/* DENALI_PHY_811_DATA */
+			0x00000000,	/* DENALI_PHY_812_DATA */
+			0x00000000,	/* DENALI_PHY_813_DATA */
+			0x00000000,	/* DENALI_PHY_814_DATA */
+			0x00000000,	/* DENALI_PHY_815_DATA */
+			0x00000000,	/* DENALI_PHY_816_DATA */
+			0x00000000,	/* DENALI_PHY_817_DATA */
+			0x00000000,	/* DENALI_PHY_818_DATA */
+			0x00000000,	/* DENALI_PHY_819_DATA */
+			0x00000000,	/* DENALI_PHY_820_DATA */
+			0x00000000,	/* DENALI_PHY_821_DATA */
+			0x00000000,	/* DENALI_PHY_822_DATA */
+			0x00000000,	/* DENALI_PHY_823_DATA */
+			0x00000000,	/* DENALI_PHY_824_DATA */
+			0x00000000,	/* DENALI_PHY_825_DATA */
+			0x00000000,	/* DENALI_PHY_826_DATA */
+			0x00000000,	/* DENALI_PHY_827_DATA */
+			0x00000000,	/* DENALI_PHY_828_DATA */
+			0x00000000,	/* DENALI_PHY_829_DATA */
+			0x00000000,	/* DENALI_PHY_830_DATA */
+			0x00000000,	/* DENALI_PHY_831_DATA */
+			0x00000000,	/* DENALI_PHY_832_DATA */
+			0x00000000,	/* DENALI_PHY_833_DATA */
+			0x00000000,	/* DENALI_PHY_834_DATA */
+			0x00000000,	/* DENALI_PHY_835_DATA */
+			0x00000000,	/* DENALI_PHY_836_DATA */
+			0x00000000,	/* DENALI_PHY_837_DATA */
+			0x00000000,	/* DENALI_PHY_838_DATA */
+			0x00000000,	/* DENALI_PHY_839_DATA */
+			0x00000000,	/* DENALI_PHY_840_DATA */
+			0x00000000,	/* DENALI_PHY_841_DATA */
+			0x00000000,	/* DENALI_PHY_842_DATA */
+			0x00000000,	/* DENALI_PHY_843_DATA */
+			0x00000000,	/* DENALI_PHY_844_DATA */
+			0x00000000,	/* DENALI_PHY_845_DATA */
+			0x00000000,	/* DENALI_PHY_846_DATA */
+			0x00000000,	/* DENALI_PHY_847_DATA */
+			0x00000000,	/* DENALI_PHY_848_DATA */
+			0x00000000,	/* DENALI_PHY_849_DATA */
+			0x00000000,	/* DENALI_PHY_850_DATA */
+			0x00000000,	/* DENALI_PHY_851_DATA */
+			0x00000000,	/* DENALI_PHY_852_DATA */
+			0x00000000,	/* DENALI_PHY_853_DATA */
+			0x00000000,	/* DENALI_PHY_854_DATA */
+			0x00000000,	/* DENALI_PHY_855_DATA */
+			0x00000000,	/* DENALI_PHY_856_DATA */
+			0x00000000,	/* DENALI_PHY_857_DATA */
+			0x00000000,	/* DENALI_PHY_858_DATA */
+			0x00000000,	/* DENALI_PHY_859_DATA */
+			0x00000000,	/* DENALI_PHY_860_DATA */
+			0x00000000,	/* DENALI_PHY_861_DATA */
+			0x00000000,	/* DENALI_PHY_862_DATA */
+			0x00000000,	/* DENALI_PHY_863_DATA */
+			0x00000000,	/* DENALI_PHY_864_DATA */
+			0x00000000,	/* DENALI_PHY_865_DATA */
+			0x00000000,	/* DENALI_PHY_866_DATA */
+			0x00000000,	/* DENALI_PHY_867_DATA */
+			0x00000000,	/* DENALI_PHY_868_DATA */
+			0x00000000,	/* DENALI_PHY_869_DATA */
+			0x00000000,	/* DENALI_PHY_870_DATA */
+			0x00000000,	/* DENALI_PHY_871_DATA */
+			0x00000000,	/* DENALI_PHY_872_DATA */
+			0x00000000,	/* DENALI_PHY_873_DATA */
+			0x00000000,	/* DENALI_PHY_874_DATA */
+			0x00000000,	/* DENALI_PHY_875_DATA */
+			0x00000000,	/* DENALI_PHY_876_DATA */
+			0x00000000,	/* DENALI_PHY_877_DATA */
+			0x00000000,	/* DENALI_PHY_878_DATA */
+			0x00000000,	/* DENALI_PHY_879_DATA */
+			0x00000000,	/* DENALI_PHY_880_DATA */
+			0x00000000,	/* DENALI_PHY_881_DATA */
+			0x00000000,	/* DENALI_PHY_882_DATA */
+			0x00000000,	/* DENALI_PHY_883_DATA */
+			0x00000000,	/* DENALI_PHY_884_DATA */
+			0x00000000,	/* DENALI_PHY_885_DATA */
+			0x00000000,	/* DENALI_PHY_886_DATA */
+			0x00000000,	/* DENALI_PHY_887_DATA */
+			0x00000000,	/* DENALI_PHY_888_DATA */
+			0x00000000,	/* DENALI_PHY_889_DATA */
+			0x00000000,	/* DENALI_PHY_890_DATA */
+			0x00000000,	/* DENALI_PHY_891_DATA */
+			0x00000000,	/* DENALI_PHY_892_DATA */
+			0x00000000,	/* DENALI_PHY_893_DATA */
+			0x00000000,	/* DENALI_PHY_894_DATA */
+			0x00000000,	/* DENALI_PHY_895_DATA */
+			0x00000000,	/* DENALI_PHY_896_DATA */
+			0x00000000,	/* DENALI_PHY_897_DATA */
+			0x00000005,	/* DENALI_PHY_898_DATA */
+			0x04000f01,	/* DENALI_PHY_899_DATA */
+			0x00020040,	/* DENALI_PHY_900_DATA */
+			0x00020055,	/* DENALI_PHY_901_DATA */
+			0x00000000,	/* DENALI_PHY_902_DATA */
+			0x00000000,	/* DENALI_PHY_903_DATA */
+			0x00000000,	/* DENALI_PHY_904_DATA */
+			0x00000050,	/* DENALI_PHY_905_DATA */
+			0x00000000,	/* DENALI_PHY_906_DATA */
+			0x01010100,	/* DENALI_PHY_907_DATA */
+			0x00000600,	/* DENALI_PHY_908_DATA */
+			0x00000000,	/* DENALI_PHY_909_DATA */
+			0x00006400,	/* DENALI_PHY_910_DATA */
+			0x01221102,	/* DENALI_PHY_911_DATA */
+			0x00000000,	/* DENALI_PHY_912_DATA */
+			0x000d1f00,	/* DENALI_PHY_913_DATA */
+			0x0d1f0d1f,	/* DENALI_PHY_914_DATA */
+			0x0d1f0d1f,	/* DENALI_PHY_915_DATA */
+			0x00030003,	/* DENALI_PHY_916_DATA */
+			0x03000300,	/* DENALI_PHY_917_DATA */
+			0x00000300,	/* DENALI_PHY_918_DATA */
+			0x01221102,	/* DENALI_PHY_919_DATA */
+			0x00000000,	/* DENALI_PHY_920_DATA */
+			0x00000000,	/* DENALI_PHY_921_DATA */
+			0x03020000,	/* DENALI_PHY_922_DATA */
+			0x00000001,	/* DENALI_PHY_923_DATA */
+			0x00000411,	/* DENALI_PHY_924_DATA */
+			0x00000411,	/* DENALI_PHY_925_DATA */
+			0x00000040,	/* DENALI_PHY_926_DATA */
+			0x00000040,	/* DENALI_PHY_927_DATA */
+			0x00000411,	/* DENALI_PHY_928_DATA */
+			0x00000411,	/* DENALI_PHY_929_DATA */
+			0x00004410,	/* DENALI_PHY_930_DATA */
+			0x00004410,	/* DENALI_PHY_931_DATA */
+			0x00004410,	/* DENALI_PHY_932_DATA */
+			0x00004410,	/* DENALI_PHY_933_DATA */
+			0x00004410,	/* DENALI_PHY_934_DATA */
+			0x00000411,	/* DENALI_PHY_935_DATA */
+			0x00004410,	/* DENALI_PHY_936_DATA */
+			0x00000411,	/* DENALI_PHY_937_DATA */
+			0x00004410,	/* DENALI_PHY_938_DATA */
+			0x00000411,	/* DENALI_PHY_939_DATA */
+			0x00004410,	/* DENALI_PHY_940_DATA */
+			0x00000000,	/* DENALI_PHY_941_DATA */
+			0x00000000,	/* DENALI_PHY_942_DATA */
+			0x00000000,	/* DENALI_PHY_943_DATA */
+			0x64000000,	/* DENALI_PHY_944_DATA */
+			0x00000000,	/* DENALI_PHY_945_DATA */
+			0x00000000,	/* DENALI_PHY_946_DATA */
+			0x00000508,	/* DENALI_PHY_947_DATA */
+			0x00000000,	/* DENALI_PHY_948_DATA */
+			0x00000000,	/* DENALI_PHY_949_DATA */
+			0x00000000,	/* DENALI_PHY_950_DATA */
+			0x00000000,	/* DENALI_PHY_951_DATA */
+			0x00000000,	/* DENALI_PHY_952_DATA */
+			0x00000000,	/* DENALI_PHY_953_DATA */
+			0xe4000000,	/* DENALI_PHY_954_DATA */
+			0x00000000,	/* DENALI_PHY_955_DATA */
+			0x00000000,	/* DENALI_PHY_956_DATA */
+			0x01010000,	/* DENALI_PHY_957_DATA */
+			0x00000000	/* DENALI_PHY_958_DATA */
+		}
+	},
+},
diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c
index ee6767bada..2d1e094c2f 100644
--- a/drivers/ram/rockchip/sdram_rk3399.c
+++ b/drivers/ram/rockchip/sdram_rk3399.c
@@ -19,11 +19,13 @@
 #include <asm/arch/sdram_rk3399.h>
 #include <asm/arch/cru_rk3399.h>
 #include <asm/arch/grf_rk3399.h>
+#include <asm/arch/pmu_rk3399.h>
 #include <asm/arch/hardware.h>
 #include <linux/err.h>
 #include <time.h>
 
 DECLARE_GLOBAL_DATA_PTR;
+
 struct chan_info {
 	struct rk3399_ddr_pctl_regs *pctl;
 	struct rk3399_ddr_pi_regs *pi;
@@ -36,6 +38,8 @@ struct dram_info {
 	struct chan_info chan[2];
 	struct clk ddr_clk;
 	struct rk3399_cru *cru;
+	struct rk3399_grf_regs *grf;
+	struct rk3399_pmu_regs *pmu;
 	struct rk3399_pmucru *pmucru;
 	struct rk3399_pmusgrf_regs *pmusgrf;
 	struct rk3399_ddr_cic_regs *cic;
@@ -48,7 +52,7 @@ struct dram_info {
 #define PRESET_GPIO0_HOLD(n)	((0x1 << (7 + 16)) | ((n) << 7))
 #define PRESET_GPIO1_HOLD(n)	((0x1 << (8 + 16)) | ((n) << 8))
 
-#define PHY_DRV_ODT_Hi_Z	0x0
+#define PHY_DRV_ODT_HI_Z	0x0
 #define PHY_DRV_ODT_240		0x1
 #define PHY_DRV_ODT_120		0x8
 #define PHY_DRV_ODT_80		0x9
@@ -68,6 +72,13 @@ struct rockchip_dmc_plat {
 	struct regmap *map;
 };
 
+u32 g_pwrup_srefresh_exit[2];
+
+struct rk3399_sdram_params dfs_configs[] = {
+#include "sdram-rk3399-lpddr4-400.inc"
+#include "sdram-rk3399-lpddr4-800.inc"
+};
+
 #define CRU_SFTRST_DDR_CTRL(ch, n)	((0x1 << (8 + 16 + (ch) * 4)) | \
 						((n) << (8 + (ch) * 4)))
 #define CRU_SFTRST_DDR_PHY(ch, n)	((0x1 << (9 + 16 + (ch) * 4)) | \
@@ -140,7 +151,8 @@ static void set_memory_map(const struct chan_info *chan, u32 channel,
 	if (sdram_ch->cap_info.ddrconfig < 2 ||
 	    sdram_ch->cap_info.ddrconfig == 4)
 		row = 16;
-	else if (sdram_ch->cap_info.ddrconfig == 3)
+	else if (sdram_ch->cap_info.ddrconfig == 3 ||
+		 sdram_ch->cap_info.ddrconfig == 5)
 		row = 14;
 	else
 		row = 15;
@@ -164,6 +176,15 @@ static void set_memory_map(const struct chan_info *chan, u32 channel,
 	clrsetbits_le32(&denali_pi[155], (0x3 << 16) | (0x7 << 24),
 			((3 - sdram_ch->cap_info.bk) << 16) |
 			((16 - row) << 24));
+	if (sdram_params->base.dramtype == LPDDR4) {
+		if (cs_map == 1)
+			cs_map = 0x5;
+		else if (cs_map == 2)
+			cs_map = 0xa;
+		else
+			cs_map = 0xF;
+	}
+
 	/* PI_41 PI_CS_MAP:RW:24:4 */
 	clrsetbits_le32(&denali_pi[41], 0xf << 24, cs_map << 24);
 	if (sdram_ch->cap_info.rank == 1 &&
@@ -171,56 +192,478 @@ static void set_memory_map(const struct chan_info *chan, u32 channel,
 		writel(0x2EC7FFFF, &denali_pi[34]);
 }
 
-static void set_ds_odt(const struct chan_info *chan,
-		       const struct rk3399_sdram_params *sdram_params)
+static void phy_io_config(const struct chan_info *chan,
+			  struct rk3399_sdram_params *sdram_params, u32 rd_vref,
+			  u32 b_reg, u32 channel)
 {
-	u32 *denali_phy = chan->publ->denali_phy;
+	u32 *denali_phy;
+	u32 *denali_ctl;
+	u32 vref_mode_dq = 0, vref_value_dq = 0;
+	u32 vref_mode_ac = 0, vref_value_ac = 0;
+	u32 mode_sel = 0;
+	u32 boostp, boostn;
+	u32 slewp, slewn;
+	u32 speed;
+	u32 rx_cm_input;
+	u32 reg_value;
+	u32 ds_value, odt_value;
+
+	if (b_reg) {
+		denali_phy = chan->publ->denali_phy;
+		denali_ctl = chan->pctl->denali_ctl;
+	} else {
+		denali_phy = sdram_params->phy_regs.denali_phy;
+		denali_ctl = sdram_params->pctl_regs.denali_ctl;
+	}
+	rd_vref *= 1000;
+	/* vref setting & mode setting */
+	if (sdram_params->base.dramtype == LPDDR4) {
+		if (rd_vref < 36700) {
+			/* MODE_LV[2:0] = LPDDR4 (Range 2)*/
+			vref_mode_dq = 0x7;
+			/* MODE[2:0]= LPDDR4 Range 2(0.4*VDDQ) */
+			mode_sel = 0x5;
+			vref_value_dq = (rd_vref - 3300) / 521;
+		} else {
+			/* MODE_LV[2:0] = LPDDR4 (Range 1)*/
+			vref_mode_dq = 0x6;
+			/* MODE[2:0]= LPDDR4 Range 1(0.33*VDDQ) */
+			mode_sel = 0x4;
+			vref_value_dq = (rd_vref - 15300) / 521;
+		}
+		vref_mode_ac = 0x6;
+		/* VDDQ/3/2=16.8% */
+		vref_value_ac = 0x3;
+	} else if (sdram_params->base.dramtype == LPDDR3) {
+		/* LPDDR3 */
+		if (sdram_params->base.odt == 1) {
+			vref_mode_dq = 0x5;  /*LPDDR3 ODT*/
+			ds_value = readl(&denali_ctl[138]) & 0xf;
+			odt_value = (readl(&denali_phy[6]) >> 4) & 0xf;
+			if (ds_value == 0x3) {	/* 48ohm */
+				switch (odt_value) {
+				case PHY_DRV_ODT_240:
+					vref_value_dq = 0x1B;
+					break;
+				case PHY_DRV_ODT_120:
+					vref_value_dq = 0x26;
+					break;
+				case PHY_DRV_ODT_60:
+					vref_value_dq = 0x36;
+					break;
+				}
+			} else if (ds_value == 0x2) {  /* 40ohm */
+				switch (odt_value) {
+				case PHY_DRV_ODT_240:
+					vref_value_dq = 0x19;
+					break;
+				case PHY_DRV_ODT_120:
+					vref_value_dq = 0x23;
+					break;
+				case PHY_DRV_ODT_60:
+					vref_value_dq = 0x31;
+					break;
+				}
+			} else if (ds_value == 0x1) {  /*34.3ohm*/
+				switch (odt_value) {
+				case PHY_DRV_ODT_240:
+					vref_value_dq = 0x17;
+					break;
+				case PHY_DRV_ODT_120:
+					vref_value_dq = 0x20;
+					break;
+				case PHY_DRV_ODT_60:
+					vref_value_dq = 0x2e;
+					break;
+				}
+			}
+		} else {
+			vref_mode_dq = 0x2;
+			vref_value_dq = 0x1f;
+		}
+		vref_mode_ac = 0x2;
+		vref_value_ac = 0x1f;
+		mode_sel = 0x0;
+	} else if (sdram_params->base.dramtype == DDR3) {
+		vref_mode_dq = 0x1;
+		vref_value_dq = 0x1f;
+		vref_mode_ac = 0x1;
+		vref_value_ac = 0x1f;
+		mode_sel = 0x1;
+	}
+
+	reg_value = (vref_mode_dq << 9) | (0x1 << 8) | vref_value_dq;
+	/* PHY_913 PHY_PAD_VREF_CTRL_DQ_0 12bits offset_8 */
+	clrsetbits_le32(&denali_phy[913], 0xfff << 8, reg_value << 8);
+	/* PHY_914 PHY_PAD_VREF_CTRL_DQ_1 12bits offset_0 */
+	clrsetbits_le32(&denali_phy[914], 0xfff, reg_value);
+	/* PHY_914 PHY_PAD_VREF_CTRL_DQ_2 12bits offset_16 */
+	clrsetbits_le32(&denali_phy[914], 0xfff << 16, reg_value << 16);
+	/* PHY_915 PHY_PAD_VREF_CTRL_DQ_3 12bits offset_0 */
+	clrsetbits_le32(&denali_phy[915], 0xfff, reg_value);
+
+	reg_value = (vref_mode_ac << 9) | (0x1 << 8) | vref_value_ac;
+	/* PHY_915 PHY_PAD_VREF_CTRL_AC 12bits offset_16 */
+	clrsetbits_le32(&denali_phy[915], 0xfff << 16, reg_value << 16);
+
+	/* PHY_924 PHY_PAD_FDBK_DRIVE */
+	clrsetbits_le32(&denali_phy[924], 0x7 << 15, mode_sel << 15);
+	/* PHY_926 PHY_PAD_DATA_DRIVE */
+	clrsetbits_le32(&denali_phy[926], 0x7 << 6, mode_sel << 6);
+	/* PHY_927 PHY_PAD_DQS_DRIVE */
+	clrsetbits_le32(&denali_phy[927], 0x7 << 6, mode_sel << 6);
+	/* PHY_928 PHY_PAD_ADDR_DRIVE */
+	clrsetbits_le32(&denali_phy[928], 0x7 << 14, mode_sel << 14);
+	/* PHY_929 PHY_PAD_CLK_DRIVE */
+	clrsetbits_le32(&denali_phy[929], 0x7 << 14, mode_sel << 14);
+	/* PHY_935 PHY_PAD_CKE_DRIVE */
+	clrsetbits_le32(&denali_phy[935], 0x7 << 14, mode_sel << 14);
+	/* PHY_937 PHY_PAD_RST_DRIVE */
+	clrsetbits_le32(&denali_phy[937], 0x7 << 14, mode_sel << 14);
+	/* PHY_939 PHY_PAD_CS_DRIVE */
+	clrsetbits_le32(&denali_phy[939], 0x7 << 14, mode_sel << 14);
+
+	/* BOOSTP_EN & BOOSTn_EN */
+	if (sdram_params->base.dramtype == LPDDR4) {
+		boostp = 0x1;
+		boostn = 0x1;
+		reg_value = ((boostp << 4) | boostn);
+		/* PHY_925 PHY_PAD_FDBK_DRIVE2 */
+		clrsetbits_le32(&denali_phy[925], 0xff << 8, reg_value << 8);
+		/* PHY_926 PHY_PAD_DATA_DRIVE */
+		clrsetbits_le32(&denali_phy[926], 0xff << 12, reg_value << 12);
+		/* PHY_927 PHY_PAD_DQS_DRIVE */
+		clrsetbits_le32(&denali_phy[927], 0xff << 14, reg_value << 14);
+		/* PHY_928 PHY_PAD_ADDR_DRIVE */
+		clrsetbits_le32(&denali_phy[928], 0xff << 20, reg_value << 20);
+		/* PHY_929 PHY_PAD_CLK_DRIVE */
+		clrsetbits_le32(&denali_phy[929], 0xff << 22, reg_value << 22);
+		/* PHY_935 PHY_PAD_CKE_DRIVE */
+		clrsetbits_le32(&denali_phy[935], 0xff << 20, reg_value << 20);
+		/* PHY_937 PHY_PAD_RST_DRIVE */
+		clrsetbits_le32(&denali_phy[937], 0xff << 20, reg_value << 20);
+		/* PHY_939 PHY_PAD_CS_DRIVE */
+		clrsetbits_le32(&denali_phy[939], 0xff << 20, reg_value << 20);
+	}
+
+	/* SLEWP & SLEWN */
+	if (sdram_params->base.dramtype == LPDDR4) {
+		slewp = 0x1;
+		slewn = 0x1;
+		reg_value = ((slewp << 3) | slewn);
+		/* PHY_924 PHY_PAD_FDBK_DRIVE */
+		clrsetbits_le32(&denali_phy[924], 0x3f << 8, reg_value << 8);
+		/* PHY_926 PHY_PAD_DATA_DRIVE */
+		clrsetbits_le32(&denali_phy[926], 0x3f, reg_value);
+		/* PHY_927 PHY_PAD_DQS_DRIVE */
+		clrsetbits_le32(&denali_phy[927], 0x3f, reg_value);
+		/* PHY_928 PHY_PAD_ADDR_DRIVE */
+		clrsetbits_le32(&denali_phy[928], 0x3f << 8, reg_value << 8);
+		/* PHY_929 PHY_PAD_CLK_DRIVE */
+		clrsetbits_le32(&denali_phy[929], 0x3f << 8, reg_value << 8);
+		/* PHY_935 PHY_PAD_CKE_DRIVE */
+		clrsetbits_le32(&denali_phy[935], 0x3f << 8, reg_value << 8);
+		/* PHY_937 PHY_PAD_RST_DRIVE */
+		clrsetbits_le32(&denali_phy[937], 0x3f << 8, reg_value << 8);
+		/* PHY_939 PHY_PAD_CS_DRIVE */
+		clrsetbits_le32(&denali_phy[939], 0x3f << 8, reg_value << 8);
+	}
+
+	/* speed setting */
+	if (sdram_params->base.ddr_freq < 400 * MHz)
+		speed = 0x0;
+	else if (sdram_params->base.ddr_freq < 800 * MHz)
+		speed = 0x1;
+	else if (sdram_params->base.ddr_freq < 1200 * MHz)
+		speed = 0x2;
+	speed = 0x2;
+
+	/* PHY_924 PHY_PAD_FDBK_DRIVE */
+	clrsetbits_le32(&denali_phy[924], 0x3 << 21, speed << 21);
+	/* PHY_926 PHY_PAD_DATA_DRIVE */
+	clrsetbits_le32(&denali_phy[926], 0x3 << 9, speed << 9);
+	/* PHY_927 PHY_PAD_DQS_DRIVE */
+	clrsetbits_le32(&denali_phy[927], 0x3 << 9, speed << 9);
+	/* PHY_928 PHY_PAD_ADDR_DRIVE */
+	clrsetbits_le32(&denali_phy[928], 0x3 << 17, speed << 17);
+	/* PHY_929 PHY_PAD_CLK_DRIVE */
+	clrsetbits_le32(&denali_phy[929], 0x3 << 17, speed << 17);
+	/* PHY_935 PHY_PAD_CKE_DRIVE */
+	clrsetbits_le32(&denali_phy[935], 0x3 << 17, speed << 17);
+	/* PHY_937 PHY_PAD_RST_DRIVE */
+	clrsetbits_le32(&denali_phy[937], 0x3 << 17, speed << 17);
+	/* PHY_939 PHY_PAD_CS_DRIVE */
+	clrsetbits_le32(&denali_phy[939], 0x3 << 17, speed << 17);
+
+	/* RX_CM_INPUT */
+	if (sdram_params->base.dramtype == LPDDR4) {
+		rx_cm_input = 0x1;
+		/* PHY_924 PHY_PAD_FDBK_DRIVE */
+		clrsetbits_le32(&denali_phy[924], 0x1 << 14, rx_cm_input << 14);
+		/* PHY_926 PHY_PAD_DATA_DRIVE */
+		clrsetbits_le32(&denali_phy[926], 0x1 << 11, rx_cm_input << 11);
+		/* PHY_927 PHY_PAD_DQS_DRIVE */
+		clrsetbits_le32(&denali_phy[927], 0x1 << 13, rx_cm_input << 13);
+		/* PHY_928 PHY_PAD_ADDR_DRIVE */
+		clrsetbits_le32(&denali_phy[928], 0x1 << 19, rx_cm_input << 19);
+		/* PHY_929 PHY_PAD_CLK_DRIVE */
+		clrsetbits_le32(&denali_phy[929], 0x1 << 21, rx_cm_input << 21);
+		/* PHY_935 PHY_PAD_CKE_DRIVE */
+		clrsetbits_le32(&denali_phy[935], 0x1 << 19, rx_cm_input << 19);
+		/* PHY_937 PHY_PAD_RST_DRIVE */
+		clrsetbits_le32(&denali_phy[937], 0x1 << 19, rx_cm_input << 19);
+		/* PHY_939 PHY_PAD_CS_DRIVE */
+		clrsetbits_le32(&denali_phy[939], 0x1 << 19, rx_cm_input << 19);
+	}
+}
+
+struct io_setting {
+	u32 mhz;
+	u32 mr5;
+	/* dram side */
+	u32 dq_odt;
+	u32 ca_odt;
+	u32 pdds;
+	u32 dq_vref;
+	u32 ca_vref;
+	/* phy side */
+	u32 rd_odt;
+	u32 wr_dq_drv;
+	u32 wr_ca_drv;
+	u32 wr_ckcs_drv;
+	u32 rd_odt_en;
+	u32 rd_vref;
+};
+
+struct io_setting lp4_io_set[] = {
+	{
+		50 * MHz,
+		0,
+		/* dram side */
+		0,	/* dq_odt; */
+		0,	/* ca_odt; */
+		6,	/* pdds; */
+		0x72,	/* dq_vref; */
+		0x72,	/* ca_vref; */
+		/* phy side */
+		PHY_DRV_ODT_HI_Z,	/* rd_odt; */
+		PHY_DRV_ODT_40,	/* wr_dq_drv; */
+		PHY_DRV_ODT_40,	/* wr_ca_drv; */
+		PHY_DRV_ODT_40,	/* wr_ckcs_drv; */
+		0,	/* rd_odt_en;*/
+		41,	/* rd_vref; (unit %, range 3.3% - 48.7%) */
+	},
+	{
+		400 * MHz,
+		0,
+		/* dram side */
+		0,	/* dq_odt; */
+		0,	/* ca_odt; */
+		6,	/* pdds; */
+		0x72,	/* dq_vref; */
+		0x72,	/* ca_vref; */
+		/* phy side */
+		PHY_DRV_ODT_HI_Z,	/* rd_odt; */
+		PHY_DRV_ODT_40,	/* wr_dq_drv; */
+		PHY_DRV_ODT_40,	/* wr_ca_drv; */
+		PHY_DRV_ODT_40,	/* wr_ckcs_drv; */
+		0,	/* rd_odt_en; */
+		/* shmoo result, read signal 41% is the best */
+		41,	/* rd_vref; (unit %, range 3.3% - 48.7%) */
+	},
+	{
+		800 * MHz,
+		0,
+		/* dram side */
+		0,	/* dq_odt; */
+		0,	/* ca_odt; */
+		1,	/* pdds; */
+		0x72,	/* dq_vref; */
+		0x72,	/* ca_vref; */
+		/* phy side */
+		PHY_DRV_ODT_40,	/* rd_odt; */
+		PHY_DRV_ODT_40,	/* wr_dq_drv; */
+		PHY_DRV_ODT_40,	/* wr_ca_drv; */
+		PHY_DRV_ODT_40,	/* wr_ckcs_drv; */
+		1,	/* rd_odt_en; */
+		17,	/* rd_vref; (unit %, range 3.3% - 48.7%) */
+	},
+	{
+		1066 * MHz,
+		0,
+		/* dram side */
+		6,	/* dq_odt; */
+		0,	/* ca_odt; */
+		1,	/* pdds; */
+		0x10,	/* dq_vref; */
+		0x72,	/* ca_vref; */
+		/* phy side */
+		PHY_DRV_ODT_40,	/* rd_odt; */
+		PHY_DRV_ODT_60,	/* wr_dq_drv; */
+		PHY_DRV_ODT_40,	/* wr_ca_drv; */
+		PHY_DRV_ODT_40,	/* wr_ckcs_drv; */
+		1,	/* rd_odt_en; */
+		17,	/* rd_vref; (unit %, range 3.3% - 48.7%) */
+	},
+};
 
+static struct io_setting *get_io_set(struct rk3399_sdram_params *sdram_params,
+				     u32 mr5)
+{
+	struct io_setting *io = NULL;
+	u32 n;
+
+	for (n = 0; n < ARRAY_SIZE(lp4_io_set); n++) {
+		io = &lp4_io_set[n];
+		if (io->mr5 != 0) {
+			if (io->mhz >= sdram_params->base.ddr_freq &&
+			    io->mr5 == mr5)
+				break;
+		} else {
+			if (io->mhz >= sdram_params->base.ddr_freq)
+				break;
+		}
+	}
+	return io;
+}
+
+/*
+ * b_reg: indicate whether set phy register
+ * or just set sdram_params.
+ * if b_reg = 0, channel, mr5 are not care
+ */
+static void set_ds_odt(const struct chan_info *chan,
+		       struct rk3399_sdram_params *sdram_params, u32 b_reg,
+		       u32 channel, u32 mr5)
+{
+	u32 *denali_phy;
+	u32 *denali_ctl;
 	u32 tsel_idle_en, tsel_wr_en, tsel_rd_en;
-	u32 tsel_idle_select_p, tsel_wr_select_p, tsel_rd_select_p;
-	u32 ca_tsel_wr_select_p, ca_tsel_wr_select_n;
-	u32 tsel_idle_select_n, tsel_wr_select_n, tsel_rd_select_n;
+	u32 tsel_idle_select_p, tsel_rd_select_p;
+	u32 tsel_idle_select_n, tsel_rd_select_n;
+	u32 tsel_wr_select_dq_p, tsel_wr_select_ca_p;
+	u32 tsel_wr_select_dq_n, tsel_wr_select_ca_n;
+	u32 soc_odt = 0;
+	u32 tsel_ckcs_select_p, tsel_ckcs_select_n;
 	u32 reg_value;
+	struct io_setting *io = NULL;
+
+	if (b_reg) {
+		denali_phy = chan->publ->denali_phy;
+		denali_ctl = chan->pctl->denali_ctl;
+	} else {
+		denali_phy = sdram_params->phy_regs.denali_phy;
+		denali_ctl = sdram_params->pctl_regs.denali_ctl;
+	}
 
 	if (sdram_params->base.dramtype == LPDDR4) {
-		tsel_rd_select_p = PHY_DRV_ODT_Hi_Z;
-		tsel_wr_select_p = PHY_DRV_ODT_40;
-		ca_tsel_wr_select_p = PHY_DRV_ODT_40;
-		tsel_idle_select_p = PHY_DRV_ODT_Hi_Z;
+		io = get_io_set(sdram_params, mr5);
 
-		tsel_rd_select_n = PHY_DRV_ODT_240;
-		tsel_wr_select_n = PHY_DRV_ODT_40;
-		ca_tsel_wr_select_n = PHY_DRV_ODT_40;
-		tsel_idle_select_n = PHY_DRV_ODT_240;
+		tsel_rd_select_p = PHY_DRV_ODT_HI_Z;
+		tsel_rd_select_n = io->rd_odt;
+
+		tsel_idle_select_p = PHY_DRV_ODT_HI_Z;
+		tsel_idle_select_n = PHY_DRV_ODT_HI_Z;
+
+		tsel_wr_select_dq_p = io->wr_dq_drv;
+		tsel_wr_select_dq_n = PHY_DRV_ODT_34_3;
+
+		tsel_wr_select_ca_p = io->wr_ca_drv;
+		tsel_wr_select_ca_n = PHY_DRV_ODT_34_3;
+
+		tsel_ckcs_select_p = io->wr_ckcs_drv;
+		tsel_ckcs_select_n = PHY_DRV_ODT_34_3;
+
+		switch (tsel_rd_select_n) {
+		case PHY_DRV_ODT_240:
+			soc_odt = 1;
+			break;
+		case PHY_DRV_ODT_120:
+			soc_odt = 2;
+			break;
+		case PHY_DRV_ODT_80:
+			soc_odt = 3;
+			break;
+		case PHY_DRV_ODT_60:
+			soc_odt = 4;
+			break;
+		case PHY_DRV_ODT_48:
+			soc_odt = 5;
+			break;
+		case PHY_DRV_ODT_40:
+			soc_odt = 6;
+			break;
+		case PHY_DRV_ODT_34_3:
+			soc_odt = 6;
+			printf("LPDDR4 MR22 Soc ODT not support\n");
+			break;
+		case PHY_DRV_ODT_HI_Z:
+		default:
+			soc_odt = 0;
+			break;
+		}
 	} else if (sdram_params->base.dramtype == LPDDR3) {
 		tsel_rd_select_p = PHY_DRV_ODT_240;
-		tsel_wr_select_p = PHY_DRV_ODT_34_3;
-		ca_tsel_wr_select_p = PHY_DRV_ODT_48;
+		tsel_rd_select_n = PHY_DRV_ODT_HI_Z;
+
 		tsel_idle_select_p = PHY_DRV_ODT_240;
+		tsel_idle_select_n = PHY_DRV_ODT_HI_Z;
+
+		tsel_wr_select_dq_p = PHY_DRV_ODT_34_3;
+		tsel_wr_select_dq_n = PHY_DRV_ODT_34_3;
 
-		tsel_rd_select_n = PHY_DRV_ODT_Hi_Z;
-		tsel_wr_select_n = PHY_DRV_ODT_34_3;
-		ca_tsel_wr_select_n = PHY_DRV_ODT_48;
-		tsel_idle_select_n = PHY_DRV_ODT_Hi_Z;
+		tsel_wr_select_ca_p = PHY_DRV_ODT_34_3;
+		tsel_wr_select_ca_n = PHY_DRV_ODT_34_3;
+
+		tsel_ckcs_select_p = PHY_DRV_ODT_34_3;
+		tsel_ckcs_select_n = PHY_DRV_ODT_34_3;
 	} else {
 		tsel_rd_select_p = PHY_DRV_ODT_240;
-		tsel_wr_select_p = PHY_DRV_ODT_34_3;
-		ca_tsel_wr_select_p = PHY_DRV_ODT_34_3;
-		tsel_idle_select_p = PHY_DRV_ODT_240;
-
 		tsel_rd_select_n = PHY_DRV_ODT_240;
-		tsel_wr_select_n = PHY_DRV_ODT_34_3;
-		ca_tsel_wr_select_n = PHY_DRV_ODT_34_3;
+
+		tsel_idle_select_p = PHY_DRV_ODT_240;
 		tsel_idle_select_n = PHY_DRV_ODT_240;
-	}
 
-	if (sdram_params->base.odt == 1)
-		tsel_rd_en = 1;
-	else
-		tsel_rd_en = 0;
+		tsel_wr_select_dq_p = PHY_DRV_ODT_34_3;
+		tsel_wr_select_dq_n = PHY_DRV_ODT_34_3;
+
+		tsel_wr_select_ca_p = PHY_DRV_ODT_34_3;
+		tsel_wr_select_ca_n = PHY_DRV_ODT_34_3;
 
+		tsel_ckcs_select_p = PHY_DRV_ODT_34_3;
+		tsel_ckcs_select_n = PHY_DRV_ODT_34_3;
+	}
+
+	if (sdram_params->base.dramtype == LPDDR4) {
+		if (sdram_params->base.odt == 1) {
+			tsel_rd_en = io->rd_odt_en;
+			tsel_idle_en = 0;
+		} else {
+			tsel_rd_en = 0;
+			tsel_idle_en = 0;
+		}
+	} else {
+		tsel_rd_en = sdram_params->base.odt;
+		tsel_idle_en = 0;
+	}
 	tsel_wr_en = 0;
-	tsel_idle_en = 0;
+
+#define CS0_MR22_VAL (0)
+#define CS1_MR22_VAL (3)
+	/* F0_0 */
+	clrsetbits_le32(&denali_ctl[145], 0xFF << 16,
+			(soc_odt | (CS0_MR22_VAL << 3)) << 16);
+	/* F2_0, F1_0 */
+	clrsetbits_le32(&denali_ctl[146], 0xFF00FF,
+			((soc_odt | (CS0_MR22_VAL << 3)) << 16) |
+			(soc_odt | (CS0_MR22_VAL << 3)));
+	/* F0_1 */
+	clrsetbits_le32(&denali_ctl[159], 0xFF << 16,
+			(soc_odt | (CS1_MR22_VAL << 3)) << 16);
+	/* F2_1, F1_1 */
+	clrsetbits_le32(&denali_ctl[160], 0xFF00FF,
+			((soc_odt | (CS1_MR22_VAL << 3)) << 16) |
+			(soc_odt | (CS1_MR22_VAL << 3)));
 
 	/*
 	 * phy_dq_tsel_select_X 24bits DENALI_PHY_6/134/262/390 offset_0
@@ -228,8 +671,8 @@ static void set_ds_odt(const struct chan_info *chan,
 	 * for write cycles for DQ/DM
 	 */
 	reg_value = tsel_rd_select_n | (tsel_rd_select_p << 0x4) |
-		    (tsel_wr_select_n << 8) | (tsel_wr_select_p << 12) |
-		    (tsel_idle_select_n << 16) | (tsel_idle_select_p << 20);
+		(tsel_wr_select_dq_n << 8) | (tsel_wr_select_dq_p << 12) |
+		(tsel_idle_select_n << 16) | (tsel_idle_select_p << 20);
 	clrsetbits_le32(&denali_phy[6], 0xffffff, reg_value);
 	clrsetbits_le32(&denali_phy[134], 0xffffff, reg_value);
 	clrsetbits_le32(&denali_phy[262], 0xffffff, reg_value);
@@ -246,31 +689,43 @@ static void set_ds_odt(const struct chan_info *chan,
 	clrsetbits_le32(&denali_phy[391], 0xffffff, reg_value);
 
 	/* phy_adr_tsel_select_ 8bits DENALI_PHY_544/672/800 offset_0 */
-	reg_value = ca_tsel_wr_select_n | (ca_tsel_wr_select_p << 0x4);
-	clrsetbits_le32(&denali_phy[544], 0xff, reg_value);
-	clrsetbits_le32(&denali_phy[672], 0xff, reg_value);
-	clrsetbits_le32(&denali_phy[800], 0xff, reg_value);
+	reg_value = tsel_wr_select_ca_n | (tsel_wr_select_ca_p << 0x4);
+	if (sdram_params->base.dramtype == LPDDR4) {
+		/* LPDDR4 these register read always return 0, so
+		 * can not use clrsetbits_le32(), need to write32
+		 */
+		writel((0x300 << 8) | reg_value, &denali_phy[544]);
+		writel((0x300 << 8) | reg_value, &denali_phy[672]);
+		writel((0x300 << 8) | reg_value, &denali_phy[800]);
+	} else {
+		clrsetbits_le32(&denali_phy[544], 0xff, reg_value);
+		clrsetbits_le32(&denali_phy[672], 0xff, reg_value);
+		clrsetbits_le32(&denali_phy[800], 0xff, reg_value);
+	}
 
 	/* phy_pad_addr_drive 8bits DENALI_PHY_928 offset_0 */
 	clrsetbits_le32(&denali_phy[928], 0xff, reg_value);
 
 	/* phy_pad_rst_drive 8bits DENALI_PHY_937 offset_0 */
-	clrsetbits_le32(&denali_phy[937], 0xff, reg_value);
+	if (!b_reg)
+		clrsetbits_le32(&denali_phy[937], 0xff, reg_value);
 
 	/* phy_pad_cke_drive 8bits DENALI_PHY_935 offset_0 */
 	clrsetbits_le32(&denali_phy[935], 0xff, reg_value);
 
 	/* phy_pad_cs_drive 8bits DENALI_PHY_939 offset_0 */
-	clrsetbits_le32(&denali_phy[939], 0xff, reg_value);
+	clrsetbits_le32(&denali_phy[939], 0xff,
+			tsel_ckcs_select_n | (tsel_ckcs_select_p << 0x4));
 
 	/* phy_pad_clk_drive 8bits DENALI_PHY_929 offset_0 */
-	clrsetbits_le32(&denali_phy[929], 0xff, reg_value);
+	clrsetbits_le32(&denali_phy[929], 0xff,
+			tsel_ckcs_select_n | (tsel_ckcs_select_p << 0x4));
 
 	/* phy_pad_fdbk_drive 23bit DENALI_PHY_924/925 */
 	clrsetbits_le32(&denali_phy[924], 0xff,
-			tsel_wr_select_n | (tsel_wr_select_p << 4));
+			tsel_wr_select_ca_n | (tsel_wr_select_ca_p << 4));
 	clrsetbits_le32(&denali_phy[925], 0xff,
-			tsel_rd_select_n | (tsel_rd_select_p << 4));
+			tsel_wr_select_dq_n | (tsel_wr_select_dq_p << 4));
 
 	/* phy_dq_tsel_enable_X 3bits DENALI_PHY_5/133/261/389 offset_16 */
 	reg_value = (tsel_rd_en | (tsel_wr_en << 1) | (tsel_idle_en << 2))
@@ -308,170 +763,483 @@ static void set_ds_odt(const struct chan_info *chan,
 
 	/* phy_pad_fdbk_term 1bit DENALI_PHY_930 offset_17 */
 	clrsetbits_le32(&denali_phy[930], 0x1 << 17, reg_value);
+
+	if (sdram_params->base.dramtype == LPDDR4)
+		phy_io_config(chan, sdram_params, io->rd_vref, b_reg, channel);
+	else
+		phy_io_config(chan, sdram_params, 0, b_reg, channel);
 }
 
-static int phy_io_config(const struct chan_info *chan,
-			 const struct rk3399_sdram_params *sdram_params)
+static void pctl_start(struct dram_info *dram,
+		       struct rk3399_sdram_params *sdram_params,
+		       u32 channel_mask)
 {
-	u32 *denali_phy = chan->publ->denali_phy;
-	u32 vref_mode_dq, vref_value_dq, vref_mode_ac, vref_value_ac;
-	u32 mode_sel;
-	u32 reg_value;
-	u32 drv_value, odt_value;
-	u32 speed;
+	const struct chan_info *chan_0 = &dram->chan[0];
+	const struct chan_info *chan_1 = &dram->chan[1];
 
-	/* vref setting */
-	if (sdram_params->base.dramtype == LPDDR4) {
-		/* LPDDR4 */
-		vref_mode_dq = 0x6;
-		vref_value_dq = 0x1f;
-		vref_mode_ac = 0x6;
-		vref_value_ac = 0x1f;
-	} else if (sdram_params->base.dramtype == LPDDR3) {
-		if (sdram_params->base.odt == 1) {
-			vref_mode_dq = 0x5;  /* LPDDR3 ODT */
-			drv_value = (readl(&denali_phy[6]) >> 12) & 0xf;
-			odt_value = (readl(&denali_phy[6]) >> 4) & 0xf;
-			if (drv_value == PHY_DRV_ODT_48) {
-				switch (odt_value) {
-				case PHY_DRV_ODT_240:
-					vref_value_dq = 0x16;
-					break;
-				case PHY_DRV_ODT_120:
-					vref_value_dq = 0x26;
-					break;
-				case PHY_DRV_ODT_60:
-					vref_value_dq = 0x36;
-					break;
-				default:
-					debug("Invalid ODT value.\n");
-					return -EINVAL;
-				}
-			} else if (drv_value == PHY_DRV_ODT_40) {
-				switch (odt_value) {
-				case PHY_DRV_ODT_240:
-					vref_value_dq = 0x19;
-					break;
-				case PHY_DRV_ODT_120:
-					vref_value_dq = 0x23;
-					break;
-				case PHY_DRV_ODT_60:
-					vref_value_dq = 0x31;
-					break;
-				default:
-					debug("Invalid ODT value.\n");
-					return -EINVAL;
-				}
-			} else if (drv_value == PHY_DRV_ODT_34_3) {
-				switch (odt_value) {
-				case PHY_DRV_ODT_240:
-					vref_value_dq = 0x17;
-					break;
-				case PHY_DRV_ODT_120:
-					vref_value_dq = 0x20;
-					break;
-				case PHY_DRV_ODT_60:
-					vref_value_dq = 0x2e;
-					break;
-				default:
-					debug("Invalid ODT value.\n");
-					return -EINVAL;
-				}
-			} else {
-				debug("Invalid DRV value.\n");
-				return -EINVAL;
+	u32 *denali_ctl_0 = chan_0->pctl->denali_ctl;
+	u32 *denali_phy_0 = chan_0->publ->denali_phy;
+	u32 *denali_ctl_1 = chan_1->pctl->denali_ctl;
+	u32 *denali_phy_1 = chan_1->publ->denali_phy;
+	u32 count, byte, tmp;
+
+	/* PHY_DLL_RST_EN */
+	if (channel_mask & 1) {
+		writel(0x01000000, &dram->grf->ddrc0_con0);
+		clrsetbits_le32(&denali_phy_0[957], 0x3 << 24, 0x2 << 24);
+	}
+
+	if (channel_mask & 1) {
+		count = 0;
+		while (!(readl(&denali_ctl_0[203]) & (1 << 3))) {
+			if (count > 1000) {
+				printf("channel 0 init err!\n");
+				while (1)
+					;
 			}
-		} else {
-			vref_mode_dq = 0x2;  /* LPDDR3 */
-			vref_value_dq = 0x1f;
+			udelay(1);
+			count++;
 		}
-		vref_mode_ac = 0x2;
-		vref_value_ac = 0x1f;
-	} else if (sdram_params->base.dramtype == DDR3) {
-		/* DDR3L */
-		vref_mode_dq = 0x1;
-		vref_value_dq = 0x1f;
-		vref_mode_ac = 0x1;
-		vref_value_ac = 0x1f;
+
+		writel(0x01000100, &dram->grf->ddrc0_con0);
+		for (byte = 0; byte < 4; byte++)	{
+			tmp = 0x820;
+			writel((tmp << 16) | tmp,
+			       &denali_phy_0[53 + (128 * byte)]);
+			writel((tmp << 16) | tmp,
+			       &denali_phy_0[54 + (128 * byte)]);
+			writel((tmp << 16) | tmp,
+			       &denali_phy_0[55 + (128 * byte)]);
+			writel((tmp << 16) | tmp,
+			       &denali_phy_0[56 + (128 * byte)]);
+			writel((tmp << 16) | tmp,
+			       &denali_phy_0[57 + (128 * byte)]);
+			clrsetbits_le32(&denali_phy_0[58 + (128 * byte)],
+					0xffff, tmp);
+		}
+		clrsetbits_le32(&denali_ctl_0[68], PWRUP_SREFRESH_EXIT,
+				g_pwrup_srefresh_exit[0]);
+	}
+
+	if (channel_mask & 2) {
+		writel(0x01000000, &dram->grf->ddrc1_con0);
+		clrsetbits_le32(&denali_phy_1[957], 0x3 << 24, 0x2 << 24);
+	}
+	if (channel_mask & 2) {
+		count = 0;
+		while (!(readl(&denali_ctl_1[203]) & (1 << 3))) {
+			if (count > 1000) {
+				printf("channel 1 init err!\n");
+				while (1)
+					;
+			}
+			udelay(1);
+			count++;
+		}
+
+		writel(0x01000100, &dram->grf->ddrc1_con0);
+		for (byte = 0; byte < 4; byte++)	{
+			tmp = 0x820;
+			writel((tmp << 16) | tmp,
+			       &denali_phy_1[53 + (128 * byte)]);
+			writel((tmp << 16) | tmp,
+			       &denali_phy_1[54 + (128 * byte)]);
+			writel((tmp << 16) | tmp,
+			       &denali_phy_1[55 + (128 * byte)]);
+			writel((tmp << 16) | tmp,
+			       &denali_phy_1[56 + (128 * byte)]);
+			writel((tmp << 16) | tmp,
+			       &denali_phy_1[57 + (128 * byte)]);
+			clrsetbits_le32(&denali_phy_1[58 + (128 * byte)],
+					0xffff, tmp);
+		}
+
+		clrsetbits_le32(&denali_ctl_1[68], PWRUP_SREFRESH_EXIT,
+				g_pwrup_srefresh_exit[1]);
+
+		/*
+		 * restore channel 1 RESET original setting
+		 * to avoid 240ohm too weak to prevent ESD test
+		 */
+		if (sdram_params->base.dramtype == LPDDR4)
+			clrsetbits_le32(&denali_phy_1[937], 0xff,
+					sdram_params->phy_regs.denali_phy[937] &
+					0xFF);
+	}
+}
+
+/* phy_fn = 0, PHY boot freq
+ * phy_fn = 1, PHY index 0
+ * phy_fn = 2, PHY index 1
+ */
+static struct rk3399_sdram_params
+	*get_phy_index_params(u32 phy_fn,
+			      struct rk3399_sdram_params *sdram_params)
+{
+	if (phy_fn == 0)
+		return sdram_params;
+	else if (phy_fn == 1)
+		return &dfs_configs[1];
+	else if (phy_fn == 2)
+		return &dfs_configs[0];
+	else
+		return NULL;
+}
+
+/*
+ * b_reg: indicate whether set phy register
+ * or just set sdram_params.
+ * if b_reg = 0, channel, mr5 are not care
+ */
+static void set_lp4_dq_odt(const struct chan_info *chan,
+			   struct rk3399_sdram_params *sdram_params, u32 ctl_fn,
+			   u32 en, u32 b_reg, u32 channel, u32 mr5)
+{
+	u32 *denali_ctl;
+	u32 *denali_pi;
+	u32 reg_value;
+	struct io_setting *io;
+
+	if (b_reg) {
+		denali_pi = chan->pi->denali_pi;
+		denali_ctl = chan->pctl->denali_ctl;
 	} else {
-		debug("Unknown DRAM type.\n");
-		return -EINVAL;
+		denali_pi = sdram_params->pi_regs.denali_pi;
+		denali_ctl = sdram_params->pctl_regs.denali_ctl;
 	}
+	io = get_io_set(sdram_params, mr5);
+	if (en)
+		reg_value = io->dq_odt;
+	else
+		reg_value = 0;
 
-	reg_value = (vref_mode_dq << 9) | (0x1 << 8) | vref_value_dq;
+	switch (ctl_fn) {
+	case 0:
+		clrsetbits_le32(&denali_ctl[139], 0x7 << 24, reg_value << 24);
+		clrsetbits_le32(&denali_ctl[153], 0x7 << 24, reg_value << 24);
 
-	/* PHY_913 PHY_PAD_VREF_CTRL_DQ_0 12bits offset_8 */
-	clrsetbits_le32(&denali_phy[913], 0xfff << 8, reg_value << 8);
-	/* PHY_914 PHY_PAD_VREF_CTRL_DQ_1 12bits offset_0 */
-	clrsetbits_le32(&denali_phy[914], 0xfff, reg_value);
-	/* PHY_914 PHY_PAD_VREF_CTRL_DQ_2 12bits offset_16 */
-	clrsetbits_le32(&denali_phy[914], 0xfff << 16, reg_value << 16);
-	/* PHY_915 PHY_PAD_VREF_CTRL_DQ_3 12bits offset_0 */
-	clrsetbits_le32(&denali_phy[915], 0xfff, reg_value);
+		clrsetbits_le32(&denali_pi[132], 0x7 << 0, (reg_value << 0));
+		clrsetbits_le32(&denali_pi[139], 0x7 << 16, (reg_value << 16));
+		clrsetbits_le32(&denali_pi[147], 0x7 << 0, (reg_value << 0));
+		clrsetbits_le32(&denali_pi[154], 0x7 << 16, (reg_value << 16));
+		break;
+	case 1:
+		clrsetbits_le32(&denali_ctl[140], 0x7 << 0, reg_value << 0);
+		clrsetbits_le32(&denali_ctl[154], 0x7 << 0, reg_value << 0);
+
+		clrsetbits_le32(&denali_pi[129], 0x7 << 16, (reg_value << 16));
+		clrsetbits_le32(&denali_pi[137], 0x7 << 0, (reg_value << 0));
+		clrsetbits_le32(&denali_pi[144], 0x7 << 16, (reg_value << 16));
+		clrsetbits_le32(&denali_pi[152], 0x7 << 0, (reg_value << 0));
+		break;
+	case 2:
+	default:
+		clrsetbits_le32(&denali_ctl[140], 0x7 << 8, (reg_value << 8));
+		clrsetbits_le32(&denali_ctl[154], 0x7 << 8, (reg_value << 8));
 
-	reg_value = (vref_mode_ac << 9) | (0x1 << 8) | vref_value_ac;
+		clrsetbits_le32(&denali_pi[127], 0x7 << 0, (reg_value << 0));
+		clrsetbits_le32(&denali_pi[134], 0x7 << 16, (reg_value << 16));
+		clrsetbits_le32(&denali_pi[142], 0x7 << 0, (reg_value << 0));
+		clrsetbits_le32(&denali_pi[149], 0x7 << 16, (reg_value << 16));
+		break;
+	}
+}
 
-	/* PHY_915 PHY_PAD_VREF_CTRL_AC 12bits offset_16 */
-	clrsetbits_le32(&denali_phy[915], 0xfff << 16, reg_value << 16);
+/*
+ * b_reg: indicate whether set phy register
+ * or just set sdram_params.
+ * if b_reg = 0, channel, mr5 are not care
+ */
+static void set_lp4_ca_odt(const struct chan_info *chan,
+			   struct rk3399_sdram_params *sdram_params, u32 ctl_fn,
+			   u32 en, u32 b_reg, u32 channel, u32 mr5)
+{
+	u32 *denali_ctl;
+	u32 *denali_pi;
+	u32 reg_value;
+	struct io_setting *io;
 
-	if (sdram_params->base.dramtype == LPDDR4)
-		mode_sel = 0x6;
-	else if (sdram_params->base.dramtype == LPDDR3)
-		mode_sel = 0x0;
-	else if (sdram_params->base.dramtype == DDR3)
-		mode_sel = 0x1;
+	if (b_reg) {
+		denali_pi = chan->pi->denali_pi;
+		denali_ctl = chan->pctl->denali_ctl;
+	} else {
+		denali_pi = sdram_params->pi_regs.denali_pi;
+		denali_ctl = sdram_params->pctl_regs.denali_ctl;
+	}
+	io = get_io_set(sdram_params, mr5);
+	if (en)
+		reg_value = io->ca_odt;
 	else
-		return -EINVAL;
+		reg_value = 0;
+
+	switch (ctl_fn) {
+	case 0:
+		clrsetbits_le32(&denali_ctl[139], 0x7 << 28, reg_value << 28);
+		clrsetbits_le32(&denali_ctl[153], 0x7 << 28, reg_value << 28);
+
+		clrsetbits_le32(&denali_pi[132], 0x7 << 4, reg_value << 4);
+		clrsetbits_le32(&denali_pi[139], 0x7 << 20, reg_value << 20);
+		clrsetbits_le32(&denali_pi[147], 0x7 << 4, reg_value << 4);
+		clrsetbits_le32(&denali_pi[154], 0x7 << 20, reg_value << 20);
+		break;
+	case 1:
+		clrsetbits_le32(&denali_ctl[140], 0x7 << 4, reg_value << 4);
+		clrsetbits_le32(&denali_ctl[154], 0x7 << 4, reg_value << 4);
+
+		clrsetbits_le32(&denali_pi[129], 0x7 << 20, reg_value << 20);
+		clrsetbits_le32(&denali_pi[137], 0x7 << 4, reg_value << 4);
+		clrsetbits_le32(&denali_pi[144], 0x7 << 20, reg_value << 20);
+		clrsetbits_le32(&denali_pi[152], 0x7 << 4, reg_value << 4);
+		break;
+	case 2:
+	default:
+		clrsetbits_le32(&denali_ctl[140], 0x7 << 12, (reg_value << 12));
+		clrsetbits_le32(&denali_ctl[154], 0x7 << 12, (reg_value << 12));
+
+		clrsetbits_le32(&denali_pi[127], 0x7 << 4, reg_value << 4);
+		clrsetbits_le32(&denali_pi[134], 0x7 << 20, reg_value << 20);
+		clrsetbits_le32(&denali_pi[142], 0x7 << 4, reg_value << 4);
+		clrsetbits_le32(&denali_pi[149], 0x7 << 20, reg_value << 20);
+		break;
+	}
+}
+
+/*
+ * b_reg: indicate whether set phy register
+ * or just set sdram_params.
+ * if b_reg = 0, channel, mr5 are not care
+ */
+static void set_lp4_MR3(const struct chan_info *chan,
+			struct rk3399_sdram_params *sdram_params, u32 ctl_fn,
+			u32 b_reg, u32 channel, u32 mr5)
+{
+	u32 *denali_ctl;
+	u32 *denali_pi;
+	u32 reg_value;
+	struct io_setting *io;
+
+	if (b_reg) {
+		denali_pi = chan->pi->denali_pi;
+		denali_ctl = chan->pctl->denali_ctl;
+	} else {
+		denali_pi = sdram_params->pi_regs.denali_pi;
+		denali_ctl = sdram_params->pctl_regs.denali_ctl;
+	}
+	io = get_io_set(sdram_params, mr5);
+
+	reg_value = ((io->pdds << 3) | 1);
+	switch (ctl_fn) {
+	case 0:
+		clrsetbits_le32(&denali_ctl[138], 0xFFFF, reg_value);
+		clrsetbits_le32(&denali_ctl[152], 0xFFFF, reg_value);
+
+		clrsetbits_le32(&denali_pi[131], 0xFFFF << 16, reg_value << 16);
+		clrsetbits_le32(&denali_pi[139], 0xFFFF, reg_value);
+		clrsetbits_le32(&denali_pi[146], 0xFFFF << 16, reg_value << 16);
+		clrsetbits_le32(&denali_pi[154], 0xFFFF, reg_value);
+		break;
+	case 1:
+		clrsetbits_le32(&denali_ctl[138], 0xFFFF << 16,
+				reg_value << 16);
+		clrsetbits_le32(&denali_ctl[152], 0xFFFF << 16,
+				reg_value << 16);
+
+		clrsetbits_le32(&denali_pi[129], 0xFFFF, reg_value);
+		clrsetbits_le32(&denali_pi[136], 0xFFFF << 16, reg_value << 16);
+		clrsetbits_le32(&denali_pi[144], 0xFFFF, reg_value);
+		clrsetbits_le32(&denali_pi[151], 0xFFFF << 16, reg_value << 16);
+		break;
+	case 2:
+	default:
+		clrsetbits_le32(&denali_ctl[139], 0xFFFF, reg_value);
+		clrsetbits_le32(&denali_ctl[153], 0xFFFF, reg_value);
+
+		clrsetbits_le32(&denali_pi[126], 0xFFFF << 16, reg_value << 16);
+		clrsetbits_le32(&denali_pi[134], 0xFFFF, reg_value);
+		clrsetbits_le32(&denali_pi[141], 0xFFFF << 16, reg_value << 16);
+		clrsetbits_le32(&denali_pi[149], 0xFFFF, reg_value);
+		break;
+	}
+}
+
+/*
+ * b_reg: indicate whether set phy register
+ * or just set sdram_params.
+ * if b_reg = 0, channel, mr5 are not care
+ */
+static void set_lp4_MR12(const struct chan_info *chan,
+			 struct rk3399_sdram_params *sdram_params, u32 ctl_fn,
+			 u32 b_reg, u32 channel, u32 mr5)
+{
+	u32 *denali_ctl;
+	u32 *denali_pi;
+	u32 reg_value;
+	struct io_setting *io;
+
+	if (b_reg) {
+		denali_pi = chan->pi->denali_pi;
+		denali_ctl = chan->pctl->denali_ctl;
+	} else {
+		denali_pi = sdram_params->pi_regs.denali_pi;
+		denali_ctl = sdram_params->pctl_regs.denali_ctl;
+	}
+	io = get_io_set(sdram_params, mr5);
+
+	reg_value = io->ca_vref;
+	switch (ctl_fn) {
+	case 0:
+		clrsetbits_le32(&denali_ctl[140], 0xFFFF << 16,
+				reg_value << 16);
+		clrsetbits_le32(&denali_ctl[154], 0xFFFF << 16,
+				reg_value << 16);
+
+		clrsetbits_le32(&denali_pi[132], 0xFF << 8, reg_value << 8);
+		clrsetbits_le32(&denali_pi[139], 0xFF << 24, reg_value << 24);
+		clrsetbits_le32(&denali_pi[147], 0xFF << 8, reg_value << 8);
+		clrsetbits_le32(&denali_pi[154], 0xFF << 24, reg_value << 24);
+		break;
+	case 1:
+		clrsetbits_le32(&denali_ctl[141], 0xFFFF, reg_value);
+		clrsetbits_le32(&denali_ctl[155], 0xFFFF, reg_value);
+
+		clrsetbits_le32(&denali_pi[129], 0xFF << 24, reg_value << 24);
+		clrsetbits_le32(&denali_pi[137], 0xFF << 8, reg_value << 8);
+		clrsetbits_le32(&denali_pi[144], 0xFF << 24, reg_value << 24);
+		clrsetbits_le32(&denali_pi[152], 0xFF << 8, reg_value << 8);
+		break;
+	case 2:
+	default:
+		clrsetbits_le32(&denali_ctl[141], 0xFFFF << 16,
+				reg_value << 16);
+		clrsetbits_le32(&denali_ctl[155], 0xFFFF << 16,
+				reg_value << 16);
+
+		clrsetbits_le32(&denali_pi[127], 0xFF << 8, reg_value << 8);
+		clrsetbits_le32(&denali_pi[134], 0xFF << 24, reg_value << 24);
+		clrsetbits_le32(&denali_pi[142], 0xFF << 8, reg_value << 8);
+		clrsetbits_le32(&denali_pi[149], 0xFF << 24, reg_value << 24);
+		break;
+	}
+}
+
+/*
+ * b_reg: indicate whether set phy register
+ * or just set sdram_params.
+ * if b_reg = 0, channel, mr5 are not care
+ */
+static void set_lp4_MR14(const struct chan_info *chan,
+			 struct rk3399_sdram_params *sdram_params, u32 ctl_fn,
+			 u32 b_reg, u32 channel, u32 mr5)
+{
+	u32 *denali_ctl;
+	u32 *denali_pi;
+	u32 reg_value;
+	struct io_setting *io;
+
+	if (b_reg) {
+		denali_pi = chan->pi->denali_pi;
+		denali_ctl = chan->pctl->denali_ctl;
+	} else {
+		denali_pi = sdram_params->pi_regs.denali_pi;
+		denali_ctl = sdram_params->pctl_regs.denali_ctl;
+	}
+	io = get_io_set(sdram_params, mr5);
+
+	reg_value = io->dq_vref;
+	switch (ctl_fn) {
+	case 0:
+		clrsetbits_le32(&denali_ctl[142], 0xFFFF << 16,
+				reg_value << 16);
+		clrsetbits_le32(&denali_ctl[156], 0xFFFF << 16,
+				reg_value << 16);
+
+		clrsetbits_le32(&denali_pi[132], 0xFF << 16, reg_value << 16);
+		clrsetbits_le32(&denali_pi[140], 0xFF << 0, reg_value << 0);
+		clrsetbits_le32(&denali_pi[147], 0xFF << 16, reg_value << 16);
+		clrsetbits_le32(&denali_pi[155], 0xFF << 0, reg_value << 0);
+		break;
+	case 1:
+		clrsetbits_le32(&denali_ctl[143], 0xFFFF, reg_value);
+		clrsetbits_le32(&denali_ctl[157], 0xFFFF, reg_value);
+
+		clrsetbits_le32(&denali_pi[130], 0xFF << 0, reg_value << 0);
+		clrsetbits_le32(&denali_pi[137], 0xFF << 16, reg_value << 16);
+		clrsetbits_le32(&denali_pi[145], 0xFF << 0, reg_value << 0);
+		clrsetbits_le32(&denali_pi[152], 0xFF << 16, reg_value << 16);
+		break;
+	case 2:
+	default:
+		clrsetbits_le32(&denali_ctl[143], 0xFFFF << 16,
+				reg_value << 16);
+		clrsetbits_le32(&denali_ctl[157], 0xFFFF << 16,
+				reg_value << 16);
+
+		clrsetbits_le32(&denali_pi[127], 0xFF << 16, reg_value << 16);
+		clrsetbits_le32(&denali_pi[135], 0xFF << 0, reg_value << 0);
+		clrsetbits_le32(&denali_pi[142], 0xFF << 16, reg_value << 16);
+		clrsetbits_le32(&denali_pi[150], 0xFF << 0, reg_value << 0);
+		break;
+	}
+}
 
-	/* PHY_924 PHY_PAD_FDBK_DRIVE */
-	clrsetbits_le32(&denali_phy[924], 0x7 << 15, mode_sel << 15);
-	/* PHY_926 PHY_PAD_DATA_DRIVE */
-	clrsetbits_le32(&denali_phy[926], 0x7 << 6, mode_sel << 6);
-	/* PHY_927 PHY_PAD_DQS_DRIVE */
-	clrsetbits_le32(&denali_phy[927], 0x7 << 6, mode_sel << 6);
-	/* PHY_928 PHY_PAD_ADDR_DRIVE */
-	clrsetbits_le32(&denali_phy[928], 0x7 << 14, mode_sel << 14);
-	/* PHY_929 PHY_PAD_CLK_DRIVE */
-	clrsetbits_le32(&denali_phy[929], 0x7 << 14, mode_sel << 14);
-	/* PHY_935 PHY_PAD_CKE_DRIVE */
-	clrsetbits_le32(&denali_phy[935], 0x7 << 14, mode_sel << 14);
-	/* PHY_937 PHY_PAD_RST_DRIVE */
-	clrsetbits_le32(&denali_phy[937], 0x7 << 14, mode_sel << 14);
-	/* PHY_939 PHY_PAD_CS_DRIVE */
-	clrsetbits_le32(&denali_phy[939], 0x7 << 14, mode_sel << 14);
+static void modify_param(const struct chan_info *chan,
+			 struct rk3399_sdram_params *sdram_params)
+{
+	struct rk3399_sdram_params *params;
+	u32 *denali_ctl_params;
+	u32 *denali_pi_params;
+	u32 *denali_phy_params;
 
-	/* speed setting */
-	if (sdram_params->base.ddr_freq < 400)
-		speed = 0x0;
-	else if (sdram_params->base.ddr_freq < 800)
-		speed = 0x1;
-	else if (sdram_params->base.ddr_freq < 1200)
-		speed = 0x2;
-	else
-		speed = 0x3;
+	denali_ctl_params = sdram_params->pctl_regs.denali_ctl;
+	denali_pi_params = sdram_params->pi_regs.denali_pi;
+	denali_phy_params = sdram_params->phy_regs.denali_phy;
 
-	/* PHY_924 PHY_PAD_FDBK_DRIVE */
-	clrsetbits_le32(&denali_phy[924], 0x3 << 21, speed << 21);
-	/* PHY_926 PHY_PAD_DATA_DRIVE */
-	clrsetbits_le32(&denali_phy[926], 0x3 << 9, speed << 9);
-	/* PHY_927 PHY_PAD_DQS_DRIVE */
-	clrsetbits_le32(&denali_phy[927], 0x3 << 9, speed << 9);
-	/* PHY_928 PHY_PAD_ADDR_DRIVE */
-	clrsetbits_le32(&denali_phy[928], 0x3 << 17, speed << 17);
-	/* PHY_929 PHY_PAD_CLK_DRIVE */
-	clrsetbits_le32(&denali_phy[929], 0x3 << 17, speed << 17);
-	/* PHY_935 PHY_PAD_CKE_DRIVE */
-	clrsetbits_le32(&denali_phy[935], 0x3 << 17, speed << 17);
-	/* PHY_937 PHY_PAD_RST_DRIVE */
-	clrsetbits_le32(&denali_phy[937], 0x3 << 17, speed << 17);
-	/* PHY_939 PHY_PAD_CS_DRIVE */
-	clrsetbits_le32(&denali_phy[939], 0x3 << 17, speed << 17);
+	if (sdram_params->base.dramtype == LPDDR4) {
+		set_lp4_dq_odt(chan, sdram_params, 2, 1, 0, 0, 0);
+		set_lp4_ca_odt(chan, sdram_params, 2, 1, 0, 0, 0);
+		set_lp4_MR3(chan, sdram_params, 2, 0, 0, 0);
+		set_lp4_MR12(chan, sdram_params, 2, 0, 0, 0);
+		set_lp4_MR14(chan, sdram_params, 2, 0, 0, 0);
+		params = get_phy_index_params(0, sdram_params);
+		set_ds_odt(chan, params, 0, 0, 0);
+		/* read two cycle preamble */
+		clrsetbits_le32(&denali_ctl_params[200], 0x3 << 24, 0x3 << 24);
+		clrsetbits_le32(&denali_phy_params[7], 0x3 << 24, 0x3 << 24);
+		clrsetbits_le32(&denali_phy_params[135], 0x3 << 24, 0x3 << 24);
+		clrsetbits_le32(&denali_phy_params[263], 0x3 << 24, 0x3 << 24);
+		clrsetbits_le32(&denali_phy_params[391], 0x3 << 24, 0x3 << 24);
+
+		/* boot frequency two cycle preamble */
+		clrsetbits_le32(&denali_phy_params[2], 0x3 << 16, 0x3 << 16);
+		clrsetbits_le32(&denali_phy_params[130], 0x3 << 16, 0x3 << 16);
+		clrsetbits_le32(&denali_phy_params[258], 0x3 << 16, 0x3 << 16);
+		clrsetbits_le32(&denali_phy_params[386], 0x3 << 16, 0x3 << 16);
+
+		clrsetbits_le32(&denali_pi_params[45], 0x3 << 8, 0x3 << 8);
+		clrsetbits_le32(&denali_pi_params[58], 0x1, 0x1);
 
-	return 0;
+		/*
+		 * bypass mode need PHY_SLICE_PWR_RDC_DISABLE_x = 1,
+		 * boot frequency mode use bypass mode
+		 */
+		setbits_le32(&denali_phy_params[10], 1 << 16);
+		setbits_le32(&denali_phy_params[138], 1 << 16);
+		setbits_le32(&denali_phy_params[266], 1 << 16);
+		setbits_le32(&denali_phy_params[394], 1 << 16);
+	} else {
+		/* modify PHY F0/F1/F2 params */
+		params = get_phy_index_params(0, sdram_params);
+		set_ds_odt(chan, params, 0, 0, 0);
+	}
+
+	clrsetbits_le32(&denali_pi_params[45], 0x1 << 24, 0x1 << 24);
+	clrsetbits_le32(&denali_pi_params[61], 0x1 << 24, 0x1 << 24);
+	clrsetbits_le32(&denali_pi_params[76], 0x1 << 24, 0x1 << 24);
+	clrsetbits_le32(&denali_pi_params[77], 0x1, 0x1);
 }
 
 static int pctl_cfg(const struct chan_info *chan, u32 channel,
-		    const struct rk3399_sdram_params *sdram_params)
+		    struct rk3399_sdram_params *sdram_params)
 {
 	u32 *denali_ctl = chan->pctl->denali_ctl;
 	u32 *denali_pi = chan->pi->denali_pi;
@@ -479,10 +1247,10 @@ static int pctl_cfg(const struct chan_info *chan, u32 channel,
 	const u32 *params_ctl = sdram_params->pctl_regs.denali_ctl;
 	const u32 *params_phy = sdram_params->phy_regs.denali_phy;
 	u32 tmp, tmp1, tmp2;
-	u32 pwrup_srefresh_exit;
-	int ret;
-	const ulong timeout_ms = 200;
+	struct rk3399_sdram_params *params;
+	u32 byte;
 
+	modify_param(chan, sdram_params);
 	/*
 	 * work around controller bug:
 	 * Do not program DRAM_CLASS until NO_PHY_IND_TRAIN_INT is programmed
@@ -490,6 +1258,20 @@ static int pctl_cfg(const struct chan_info *chan, u32 channel,
 	sdram_copy_to_reg(&denali_ctl[1], &params_ctl[1],
 			  sizeof(struct rk3399_ddr_pctl_regs) - 4);
 	writel(params_ctl[0], &denali_ctl[0]);
+
+	/*
+	 * two channel init at the same time, then ZQ Cal Start
+	 * at the same time, it will use the same RZQ.
+	 * to fix it: increase tINIT3 for channel 1, will avoid two
+	 * channel ZQ Cal Start at the same time
+	 */
+	if (sdram_params->base.dramtype == LPDDR4 && channel == 1) {
+		tmp = ((1000000 * (sdram_params->base.ddr_freq / MHz) + 999) /
+		       1000);
+		tmp1 = readl(&denali_ctl[14]);
+		writel(tmp + tmp1, &denali_ctl[14]);
+	}
+
 	sdram_copy_to_reg(denali_pi, &sdram_params->pi_regs.denali_pi[0],
 			  sizeof(struct rk3399_ddr_pi_regs));
 	/* rank count need to set for init */
@@ -499,7 +1281,15 @@ static int pctl_cfg(const struct chan_info *chan, u32 channel,
 	writel(sdram_params->phy_regs.denali_phy[911], &denali_phy[911]);
 	writel(sdram_params->phy_regs.denali_phy[912], &denali_phy[912]);
 
-	pwrup_srefresh_exit = readl(&denali_ctl[68]) & PWRUP_SREFRESH_EXIT;
+	if (sdram_params->base.dramtype == LPDDR4) {
+		writel(sdram_params->phy_regs.denali_phy[898],
+		       &denali_phy[898]);
+		writel(sdram_params->phy_regs.denali_phy[919],
+		       &denali_phy[919]);
+	}
+
+	g_pwrup_srefresh_exit[channel] = readl(&denali_ctl[68]) &
+					 PWRUP_SREFRESH_EXIT;
 	clrbits_le32(&denali_ctl[68], PWRUP_SREFRESH_EXIT);
 
 	/* PHY_DLL_RST_EN */
@@ -508,16 +1298,21 @@ static int pctl_cfg(const struct chan_info *chan, u32 channel,
 	setbits_le32(&denali_pi[0], START);
 	setbits_le32(&denali_ctl[0], START);
 
-	/* Waiting for phy DLL lock */
-	while (1) {
-		tmp = readl(&denali_phy[920]);
-		tmp1 = readl(&denali_phy[921]);
-		tmp2 = readl(&denali_phy[922]);
-		if ((((tmp >> 16) & 0x1) == 0x1) &&
-		    (((tmp1 >> 16) & 0x1) == 0x1) &&
-		    (((tmp1 >> 0) & 0x1) == 0x1) &&
-		    (((tmp2 >> 0) & 0x1) == 0x1))
-			break;
+	/* because LPDDR4 use PLL bypass mode for init
+	 * not need to wait for the PLL to lock
+	 */
+	if (sdram_params->base.dramtype != LPDDR4) {
+		/* wait lock */
+		while (1) {
+			tmp = readl(&denali_phy[920]);
+			tmp1 = readl(&denali_phy[921]);
+			tmp2 = readl(&denali_phy[922]);
+			if ((((tmp >> 16) & 0x1) == 0x1) &&
+			    (((tmp1 >> 16) & 0x1) == 0x1) &&
+			    (((tmp1 >> 0) & 0x1) == 0x1) &&
+			    (((tmp2 >> 0) & 0x1) == 0x1))
+				break;
+		}
 	}
 
 	sdram_copy_to_reg(&denali_phy[896], &params_phy[896], (958 - 895) * 4);
@@ -534,54 +1329,53 @@ static int pctl_cfg(const struct chan_info *chan, u32 channel,
 			  &params_phy[640], (677 - 640 + 1) * 4);
 	sdram_copy_to_reg(&denali_phy[768],
 			  &params_phy[768], (805 - 768 + 1) * 4);
-	set_ds_odt(chan, sdram_params);
-
-	/*
-	 * phy_dqs_tsel_wr_timing_X 8bits DENALI_PHY_84/212/340/468 offset_8
-	 * dqs_tsel_wr_end[7:4] add Half cycle
-	 */
-	tmp = (readl(&denali_phy[84]) >> 8) & 0xff;
-	clrsetbits_le32(&denali_phy[84], 0xff << 8, (tmp + 0x10) << 8);
-	tmp = (readl(&denali_phy[212]) >> 8) & 0xff;
-	clrsetbits_le32(&denali_phy[212], 0xff << 8, (tmp + 0x10) << 8);
-	tmp = (readl(&denali_phy[340]) >> 8) & 0xff;
-	clrsetbits_le32(&denali_phy[340], 0xff << 8, (tmp + 0x10) << 8);
-	tmp = (readl(&denali_phy[468]) >> 8) & 0xff;
-	clrsetbits_le32(&denali_phy[468], 0xff << 8, (tmp + 0x10) << 8);
 
-	/*
-	 * phy_dqs_tsel_wr_timing_X 8bits DENALI_PHY_83/211/339/467 offset_8
-	 * dq_tsel_wr_end[7:4] add Half cycle
-	 */
-	tmp = (readl(&denali_phy[83]) >> 16) & 0xff;
-	clrsetbits_le32(&denali_phy[83], 0xff << 16, (tmp + 0x10) << 16);
-	tmp = (readl(&denali_phy[211]) >> 16) & 0xff;
-	clrsetbits_le32(&denali_phy[211], 0xff << 16, (tmp + 0x10) << 16);
-	tmp = (readl(&denali_phy[339]) >> 16) & 0xff;
-	clrsetbits_le32(&denali_phy[339], 0xff << 16, (tmp + 0x10) << 16);
-	tmp = (readl(&denali_phy[467]) >> 16) & 0xff;
-	clrsetbits_le32(&denali_phy[467], 0xff << 16, (tmp + 0x10) << 16);
-
-	ret = phy_io_config(chan, sdram_params);
-	if (ret)
-		return ret;
+	if (sdram_params->base.dramtype == LPDDR4)
+		params = get_phy_index_params(1, sdram_params);
+	else
+		params = get_phy_index_params(0, sdram_params);
+
+	clrsetbits_le32(&params->phy_regs.denali_phy[896], 0x3 << 8,
+			0 << 8);
+	writel(params->phy_regs.denali_phy[896], &denali_phy[896]);
+
+	writel(sdram_params->phy_regs.denali_phy[83] + (0x10 << 16),
+	       &denali_phy[83]);
+	writel(sdram_params->phy_regs.denali_phy[84] + (0x10 << 8),
+	       &denali_phy[84]);
+	writel(sdram_params->phy_regs.denali_phy[211] + (0x10 << 16),
+	       &denali_phy[211]);
+	writel(sdram_params->phy_regs.denali_phy[212] + (0x10 << 8),
+	       &denali_phy[212]);
+	writel(sdram_params->phy_regs.denali_phy[339] + (0x10 << 16),
+	       &denali_phy[339]);
+	writel(sdram_params->phy_regs.denali_phy[340] + (0x10 << 8),
+	       &denali_phy[340]);
+	writel(sdram_params->phy_regs.denali_phy[467] + (0x10 << 16),
+	       &denali_phy[467]);
+	writel(sdram_params->phy_regs.denali_phy[468] + (0x10 << 8),
+	       &denali_phy[468]);
 
-	/* PHY_DLL_RST_EN */
-	clrsetbits_le32(&denali_phy[957], 0x3 << 24, 0x2 << 24);
-
-	/* Waiting for PHY and DRAM init complete */
-	tmp = get_timer(0);
-	do {
-		if (get_timer(tmp) > timeout_ms) {
-			pr_err("DRAM (%s): phy failed to lock within  %ld ms\n",
-			       __func__, timeout_ms);
-			return -ETIME;
+	if (sdram_params->base.dramtype == LPDDR4) {
+		/*
+		 * to improve write dqs and dq phase from 1.5ns to 3.5ns
+		 * at 50MHz.
+		 */
+		for (byte = 0; byte < 4; byte++) {
+			tmp = 0x680;
+			clrsetbits_le32(&denali_phy[1 + (128 * byte)],
+					0xfff << 8, tmp << 8);
 		}
-	} while (!(readl(&denali_ctl[203]) & (1 << 3)));
-	debug("DRAM (%s): phy locked after %ld ms\n", __func__, get_timer(tmp));
+		/*
+		 * to workaround 366ball two channel's RESET connect to
+		 * one RESET signal of die
+		 */
+		if (channel == 1)
+			clrsetbits_le32(&denali_phy[937], 0xff,
+					PHY_DRV_ODT_240 |
+					(PHY_DRV_ODT_240 << 0x4));
+	}
 
-	clrsetbits_le32(&denali_ctl[68], PWRUP_SREFRESH_EXIT,
-			pwrup_srefresh_exit);
 	return 0;
 }
 
@@ -640,8 +1434,16 @@ static int data_training_ca(const struct chan_info *chan, u32 channel,
 	u32 i, tmp;
 	u32 obs_0, obs_1, obs_2, obs_err = 0;
 	u32 rank = sdram_params->ch[channel].cap_info.rank;
+	u32 rank_mask;
 
-	for (i = 0; i < rank; i++) {
+	if (sdram_params->base.dramtype == LPDDR4)
+		rank_mask = (rank == 1) ? 0x5 : 0xf;
+	else
+		rank_mask = (rank == 1) ? 0x1 : 0x3;
+
+	for (i = 0; i < 4; i++) {
+		if (!(rank_mask & (1 << i)))
+			continue;
 		select_per_cs_training_index(chan, i);
 		/* PI_100 PI_CALVL_EN:RW:8:2 */
 		clrsetbits_le32(&denali_pi[100], 0x3 << 8, 0x2 << 8);
@@ -668,7 +1470,7 @@ static int data_training_ca(const struct chan_info *chan, u32 channel,
 			if ((((tmp >> 11) & 0x1) == 0x1) &&
 			    (((tmp >> 13) & 0x1) == 0x1) &&
 			    (((tmp >> 5) & 0x1) == 0x0) &&
-			    (obs_err == 0))
+			    obs_err == 0)
 				break;
 			else if ((((tmp >> 5) & 0x1) == 0x1) ||
 				 (obs_err == 1))
@@ -722,7 +1524,7 @@ static int data_training_wl(const struct chan_info *chan, u32 channel,
 			if ((((tmp >> 10) & 0x1) == 0x1) &&
 			    (((tmp >> 13) & 0x1) == 0x1) &&
 			    (((tmp >> 4) & 0x1) == 0x0) &&
-			    (obs_err == 0))
+			    obs_err == 0)
 				break;
 			else if ((((tmp >> 4) & 0x1) == 0x1) ||
 				 (obs_err == 1))
@@ -781,7 +1583,7 @@ static int data_training_rg(const struct chan_info *chan, u32 channel,
 			if ((((tmp >> 9) & 0x1) == 0x1) &&
 			    (((tmp >> 13) & 0x1) == 0x1) &&
 			    (((tmp >> 3) & 0x1) == 0x0) &&
-			    (obs_err == 0))
+			    obs_err == 0)
 				break;
 			else if ((((tmp >> 3) & 0x1) == 0x1) ||
 				 (obs_err == 1))
@@ -842,14 +1644,23 @@ static int data_training_wdql(const struct chan_info *chan, u32 channel,
 	u32 *denali_pi = chan->pi->denali_pi;
 	u32 i, tmp;
 	u32 rank = sdram_params->ch[channel].cap_info.rank;
+	u32 rank_mask;
+
+	if (sdram_params->base.dramtype == LPDDR4)
+		rank_mask = (rank == 1) ? 0x5 : 0xf;
+	else
+		rank_mask = (rank == 1) ? 0x1 : 0x3;
+
+	for (i = 0; i < 4; i++) {
+		if (!(rank_mask & (1 << i)))
+			continue;
 
-	for (i = 0; i < rank; i++) {
 		select_per_cs_training_index(chan, i);
 		/*
 		 * disable PI_WDQLVL_VREF_EN before wdq leveling?
-		 * PI_181 PI_WDQLVL_VREF_EN:RW:8:1
+		 * PI_117 PI_WDQLVL_VREF_EN:RW:8:1
 		 */
-		clrbits_le32(&denali_pi[181], 0x1 << 8);
+		clrbits_le32(&denali_pi[117], 0x1 << 8);
 		/* PI_124 PI_WDQLVL_EN:RW:16:2 */
 		clrsetbits_le32(&denali_pi[124], 0x3 << 16, 0x2 << 16);
 		/* PI_121 PI_WDQLVL_REQ:WR:8:1,PI_WDQLVL_CS:RW:16:2 */
@@ -888,7 +1699,7 @@ static int data_training(const struct chan_info *chan, u32 channel,
 
 	if (training_flag == PI_FULL_TRAINING) {
 		if (sdram_params->base.dramtype == LPDDR4) {
-			training_flag = PI_CA_TRAINING | PI_WRITE_LEVELING |
+			training_flag = PI_WRITE_LEVELING |
 					PI_READ_GATE_TRAINING |
 					PI_READ_LEVELING | PI_WDQ_LEVELING;
 		} else if (sdram_params->base.dramtype == LPDDR3) {
@@ -1074,8 +1885,8 @@ u16  ddr_cfg_2_rbc[] = {
 		((1 << 6) | (1 << 3) | (0 << 2) | 2), /* 7 */
 };
 
-unsigned int calculate_ddrconfig(struct rk3399_sdram_params *sdram_params,
-				 unsigned int channel)
+static u32 calculate_ddrconfig(struct rk3399_sdram_params *sdram_params,
+			       u32 channel)
 {
 	unsigned int i;
 	unsigned int cs0_row = sdram_params->ch[channel].cap_info.cs0_row;
@@ -1097,7 +1908,7 @@ unsigned int calculate_ddrconfig(struct rk3399_sdram_params *sdram_params,
 	return i;
 }
 
-unsigned char calculate_stride(struct rk3399_sdram_params *sdram_params)
+static unsigned char calculate_stride(struct rk3399_sdram_params *sdram_params)
 {
 	unsigned int gstride_type;
 	unsigned int channel;
@@ -1248,15 +2059,24 @@ error:
 	return (-1);
 }
 
+static u32 get_ddr_stride(struct rk3399_pmusgrf_regs *pmusgrf)
+{
+	u32 val;
+
+	val = (readl(&pmusgrf->soc_con4) >> 10) & 0x1F;
+
+	return val;
+}
+
 static void set_ddr_stride(struct rk3399_pmusgrf_regs *pmusgrf, u32 stride)
 {
 	rk_clrsetreg(&pmusgrf->soc_con4, 0x1f << 10,
 		     stride << 10);
 }
 
-void set_cap_relate_config(const struct chan_info *chan,
-			   struct rk3399_sdram_params *sdram_params,
-			   unsigned int channel)
+static void set_cap_relate_config(const struct chan_info *chan,
+				  struct rk3399_sdram_params *sdram_params,
+				  unsigned int channel)
 {
 	u32 *denali_ctl = chan->pctl->denali_ctl;
 	u32 tmp;
@@ -1288,8 +2108,8 @@ void set_cap_relate_config(const struct chan_info *chan,
 	}
 }
 
-void clear_channel_params(struct rk3399_sdram_params *sdram_params,
-			  unsigned int channel)
+static void clear_channel_params(struct rk3399_sdram_params *sdram_params,
+				 unsigned int channel)
 {
 	sdram_params->ch[channel].cap_info.rank = 0;
 	sdram_params->ch[channel].cap_info.col = 0;
@@ -1307,8 +2127,8 @@ void clear_channel_params(struct rk3399_sdram_params *sdram_params,
  * CS0 & CS1, n=3
  * cs0_cap: MB unit
  */
-void dram_set_cs(const struct chan_info *chan, u32 cs_map, u32 cs0_cap,
-		 unsigned char dramtype)
+static void dram_set_cs(const struct chan_info *chan, u32 cs_map, u32 cs0_cap,
+			unsigned char dramtype)
 {
 	u32 *denali_ctl = chan->pctl->denali_ctl;
 	u32 *denali_pi = chan->pi->denali_pi;
@@ -1332,7 +2152,7 @@ void dram_set_cs(const struct chan_info *chan, u32 cs_map, u32 cs0_cap,
 		writel(0x2EC7FFFF, &denali_pi[34]);
 }
 
-void dram_set_bw(const struct chan_info *chan, u32 bw)
+static void dram_set_bw(const struct chan_info *chan, u32 bw)
 {
 	u32 *denali_ctl = chan->pctl->denali_ctl;
 
@@ -1342,7 +2162,7 @@ void dram_set_bw(const struct chan_info *chan, u32 bw)
 		setbits_le32(&denali_ctl[196], 1 << 16);
 }
 
-void dram_set_max_col(const struct chan_info *chan, u32 bw, u32 *pcol)
+static void dram_set_max_col(const struct chan_info *chan, u32 bw, u32 *pcol)
 {
 	u32 *denali_ctl = chan->pctl->denali_ctl;
 	struct msch_regs *ddr_msch_regs = chan->msch;
@@ -1368,8 +2188,8 @@ void dram_set_max_col(const struct chan_info *chan, u32 bw, u32 *pcol)
 	*pcol = 12;
 }
 
-void dram_set_max_bank(const struct chan_info *chan, u32 bw, u32 *pbank,
-		       u32 *pcol)
+static void dram_set_max_bank(const struct chan_info *chan, u32 bw, u32 *pbank,
+			      u32 *pcol)
 {
 	u32 *denali_ctl = chan->pctl->denali_ctl;
 	u32 *denali_pi = chan->pi->denali_pi;
@@ -1385,8 +2205,8 @@ void dram_set_max_bank(const struct chan_info *chan, u32 bw, u32 *pbank,
 	*pcol = 12;
 }
 
-void dram_set_max_row(const struct chan_info *chan, u32 bw, u32 *prow,
-		      u32 *pbank, u32 *pcol)
+static void dram_set_max_row(const struct chan_info *chan, u32 bw, u32 *prow,
+			     u32 *pbank, u32 *pcol)
 {
 	u32 *denali_ctl = chan->pctl->denali_ctl;
 	u32 *denali_pi = chan->pi->denali_pi;
@@ -1426,19 +2246,21 @@ static u64 dram_detect_cap(struct dram_info *dram,
 
 	/* detect bw */
 	bw = 2;
-	dram_set_bw(chan, bw);
-	cap_info->bw = bw;
-	if (data_training(chan, channel, sdram_params, PI_READ_GATE_TRAINING)) {
-		bw = 1;
-		dram_set_bw(chan, 1);
+	if (sdram_params->base.dramtype != LPDDR4) {
+		dram_set_bw(chan, bw);
 		cap_info->bw = bw;
 		if (data_training(chan, channel, sdram_params,
 				  PI_READ_GATE_TRAINING)) {
-			printf("16bit error!!!\n");
-			goto error;
+			bw = 1;
+			dram_set_bw(chan, 1);
+			cap_info->bw = bw;
+			if (data_training(chan, channel, sdram_params,
+					  PI_READ_GATE_TRAINING)) {
+				printf("16bit error!!!\n");
+				goto error;
+			}
 		}
 	}
-
 	/*
 	 * LPDDR3 CA training msut be trigger before other training.
 	 * DDR3 is not have CA training.
@@ -1497,6 +2319,579 @@ error:
 	return (-1);
 }
 
+/* read mr_num mode register
+ * input: rank = 1: cs0, rank = 2: cs1
+ *        mr_num: mode register number
+ * output: buf
+ */
+static int read_mr(struct rk3399_ddr_pctl_regs *ddr_pctl_regs, u32 rank,
+		   u32 mr_num, u32 *buf)
+{
+	s32 timeout = 100;
+
+	writel(((1 << 16) |
+			(((rank == 2) ? 1 : 0) << 8) |
+			mr_num) << 8,
+			&ddr_pctl_regs->denali_ctl[118]);
+	while (0 == (readl(&ddr_pctl_regs->denali_ctl[203]) &
+			((1 << 21) | (1 << 12)))) {
+		udelay(1);
+		if (timeout <= 0)
+			goto error;
+		timeout--;
+	}
+	if (!(readl(&ddr_pctl_regs->denali_ctl[203]) & (1 << 12))) {
+		*buf = readl(&ddr_pctl_regs->denali_ctl[119]) & 0xFF;
+	} else {
+		printf("read mr error\n");
+		printf("MRR_ERROR_STATUS = 0x%x\n",
+		       readl(&ddr_pctl_regs->denali_ctl[17]) & 0x3);
+		*buf = 0;
+	}
+	setbits_le32(&ddr_pctl_regs->denali_ctl[205], (1 << 21) | (1 << 12));
+	return 0;
+error:
+	return (-1);
+}
+
+static int read_mr_for_detect(struct dram_info *dram, u32 channel, u32 rank,
+			      struct rk3399_sdram_params *sdram_params)
+{
+	u64 cs0_cap;
+	u32 stride;
+	u32 cs = 0, col = 0, bk = 0, bw = 0, row_3_4 = 0;
+	u32 cs0_row = 0, cs1_row = 0, ddrconfig = 0;
+	u32 mr5, mr12, mr14;
+	struct chan_info *chan =
+		&dram->chan[channel];
+	struct rk3399_ddr_pctl_regs *ddr_pctl_regs = chan->pctl;
+	int ret = 0;
+	u32 val;
+	void __iomem *addr = NULL;
+
+	stride = get_ddr_stride(dram->pmusgrf);
+
+	if (sdram_params->ch[channel].cap_info.col == 0) {
+		ret = -1;
+		goto end;
+	}
+
+	cs = sdram_params->ch[channel].cap_info.rank;
+	col = sdram_params->ch[channel].cap_info.col;
+	bk = sdram_params->ch[channel].cap_info.bk;
+	bw = sdram_params->ch[channel].cap_info.bw;
+	row_3_4 = sdram_params->ch[channel].cap_info.row_3_4;
+	cs0_row = sdram_params->ch[channel].cap_info.cs0_row;
+	cs1_row = sdram_params->ch[channel].cap_info.cs1_row;
+	ddrconfig = sdram_params->ch[channel].cap_info.ddrconfig;
+
+	/* 2GB */
+	sdram_params->ch[channel].cap_info.rank = 2;
+	sdram_params->ch[channel].cap_info.col = 10;
+	sdram_params->ch[channel].cap_info.bk = 3;
+	sdram_params->ch[channel].cap_info.bw = 2;
+	sdram_params->ch[channel].cap_info.row_3_4 = 0;
+	sdram_params->ch[channel].cap_info.cs0_row = 15;
+	sdram_params->ch[channel].cap_info.cs1_row = 15;
+	sdram_params->ch[channel].cap_info.ddrconfig = 1;
+
+	set_memory_map(chan, channel, sdram_params);
+	sdram_params->ch[channel].cap_info.ddrconfig =
+			calculate_ddrconfig(sdram_params, channel);
+	set_ddrconfig(chan, sdram_params, channel,
+		      sdram_params->ch[channel].cap_info.ddrconfig);
+	set_cap_relate_config(chan, sdram_params, channel);
+
+	cs0_cap = (1 << (sdram_params->ch[channel].cap_info.bw
+			+ sdram_params->ch[channel].cap_info.col
+			+ sdram_params->ch[channel].cap_info.bk
+			+ sdram_params->ch[channel].cap_info.cs0_row));
+
+	if (sdram_params->ch[channel].cap_info.row_3_4)
+		cs0_cap = cs0_cap * 3 / 4;
+
+	if (channel == 0)
+		set_ddr_stride(dram->pmusgrf, 0x17);
+	else
+		set_ddr_stride(dram->pmusgrf, 0x18);
+
+	/* !will soiled DRAM space here!
+	 * read and write data to DRAM, avoid be optimized by compiler.
+	 */
+	if (rank == 1)
+		addr = (void __iomem *)0x100;
+	else if (rank == 2)
+		addr = (void __iomem *)(cs0_cap + 0x100);
+
+	val = readl(addr);
+	writel(val + 1, addr);
+
+	read_mr(ddr_pctl_regs, rank, 5, &mr5);
+	read_mr(ddr_pctl_regs, rank, 12, &mr12);
+	read_mr(ddr_pctl_regs, rank, 14, &mr14);
+
+	if (mr5 == 0 || mr12 != 0x4d || mr14 != 0x4d) {
+		ret = -1;
+		goto end;
+	}
+end:
+	sdram_params->ch[channel].cap_info.rank = cs;
+	sdram_params->ch[channel].cap_info.col = col;
+	sdram_params->ch[channel].cap_info.bk = bk;
+	sdram_params->ch[channel].cap_info.bw = bw;
+	sdram_params->ch[channel].cap_info.row_3_4 = row_3_4;
+	sdram_params->ch[channel].cap_info.cs0_row = cs0_row;
+	sdram_params->ch[channel].cap_info.cs1_row = cs1_row;
+	sdram_params->ch[channel].cap_info.ddrconfig = ddrconfig;
+
+	set_ddr_stride(dram->pmusgrf, stride);
+	return ret;
+}
+
+static u32 get_phy_fn(struct rk3399_sdram_params *sdram_params, u32 ctl_fn)
+{
+	u32 lp4_phy_fn[] = {1, 0, 0xb};
+
+	if (sdram_params->base.dramtype == LPDDR4)
+		return lp4_phy_fn[ctl_fn];
+	else
+		return ctl_fn;
+}
+
+static u32 get_ctl_fn(struct rk3399_sdram_params *sdram_params, u32 phy_fn)
+{
+	u32 lp4_ctl_fn[] = {1, 0, 2};
+
+	if (sdram_params->base.dramtype == LPDDR4)
+		return lp4_ctl_fn[phy_fn];
+	else
+		return phy_fn;
+}
+
+static void dram_copy_phy_fn(struct dram_info *dram,
+			     struct rk3399_sdram_params *sdram_params, u32 fn,
+			     struct rk3399_sdram_params *f1_sdram_params,
+			     u32 channel)
+{
+	u32 *denali_ctl;
+	u32 *denali_phy;
+	u32 *denali_phy_params;
+	u32 speed = 0;
+	u32 mr5;
+	u32 ctl_fn;
+
+	denali_ctl = dram->chan[channel].pctl->denali_ctl;
+	denali_phy = dram->chan[channel].publ->denali_phy;
+	denali_phy_params = f1_sdram_params->phy_regs.denali_phy;
+
+	/* switch index */
+	clrsetbits_le32(&denali_phy_params[896], 0x3 << 8,
+			fn << 8);
+	writel(denali_phy_params[896], &denali_phy[896]);
+
+	/* phy_pll_ctrl_ca, phy_pll_ctrl */
+	writel(denali_phy_params[911], &denali_phy[911]);
+	/* phy_low_freq_sel */
+	clrsetbits_le32(&denali_phy[913], 0x1,
+			denali_phy_params[913] & 0x1);
+	/* PHY_GRP_SLAVE_DELAY_X, phy_cslvl_dly_step */
+	writel(denali_phy_params[916], &denali_phy[916]);
+	writel(denali_phy_params[917], &denali_phy[917]);
+	writel(denali_phy_params[918], &denali_phy[918]);
+	/* phy_adrZ_sw_wraddr_shift_X  */
+	writel(denali_phy_params[512], &denali_phy[512]);
+	clrsetbits_le32(&denali_phy[513], 0xFFFF,
+			denali_phy_params[513] & 0xFFFF);
+	writel(denali_phy_params[640], &denali_phy[640]);
+	clrsetbits_le32(&denali_phy[641], 0xFFFF,
+			denali_phy_params[641] & 0xFFFF);
+	writel(denali_phy_params[768], &denali_phy[768]);
+	clrsetbits_le32(&denali_phy[769], 0xFFFF,
+			denali_phy_params[769] & 0xFFFF);
+
+	writel(denali_phy_params[544], &denali_phy[544]);
+	writel(denali_phy_params[545], &denali_phy[545]);
+	writel(denali_phy_params[546], &denali_phy[546]);
+	writel(denali_phy_params[547], &denali_phy[547]);
+
+	writel(denali_phy_params[672], &denali_phy[672]);
+	writel(denali_phy_params[673], &denali_phy[673]);
+	writel(denali_phy_params[674], &denali_phy[674]);
+	writel(denali_phy_params[675], &denali_phy[675]);
+
+	writel(denali_phy_params[800], &denali_phy[800]);
+	writel(denali_phy_params[801], &denali_phy[801]);
+	writel(denali_phy_params[802], &denali_phy[802]);
+	writel(denali_phy_params[803], &denali_phy[803]);
+
+	/*
+	 * phy_adr_master_delay_start_X
+	 * phy_adr_master_delay_step_X
+	 * phy_adr_master_delay_wait_X
+	 */
+	writel(denali_phy_params[548], &denali_phy[548]);
+	writel(denali_phy_params[676], &denali_phy[676]);
+	writel(denali_phy_params[804], &denali_phy[804]);
+
+	/* phy_adr_calvl_dly_step_X */
+	writel(denali_phy_params[549], &denali_phy[549]);
+	writel(denali_phy_params[677], &denali_phy[677]);
+	writel(denali_phy_params[805], &denali_phy[805]);
+
+	/*
+	 * phy_clk_wrdm_slave_delay_X
+	 * phy_clk_wrdqZ_slave_delay_X
+	 * phy_clk_wrdqs_slave_delay_X
+	 */
+	sdram_copy_to_reg((u32 *)&denali_phy[59],
+			  (u32 *)&denali_phy_params[59],
+			  (63 - 58) * 4);
+	sdram_copy_to_reg((u32 *)&denali_phy[187],
+			  (u32 *)&denali_phy_params[187],
+			  (191 - 186) * 4);
+	sdram_copy_to_reg((u32 *)&denali_phy[315],
+			  (u32 *)&denali_phy_params[315],
+			  (319 - 314) * 4);
+	sdram_copy_to_reg((u32 *)&denali_phy[443],
+			  (u32 *)&denali_phy_params[443],
+			  (447 - 442) * 4);
+
+	/*
+	 * phy_dqs_tsel_wr_timing_X 8bits DENALI_PHY_84/212/340/468 offset_8
+	 * dqs_tsel_wr_end[7:4] add Half cycle
+	 * phy_dq_tsel_wr_timing_X 8bits DENALI_PHY_83/211/339/467 offset_8
+	 * dq_tsel_wr_end[7:4] add Half cycle
+	 */
+	writel(denali_phy_params[83] + (0x10 << 16), &denali_phy[83]);
+	writel(denali_phy_params[84] + (0x10 << 8), &denali_phy[84]);
+	writel(denali_phy_params[85], &denali_phy[85]);
+
+	writel(denali_phy_params[211] + (0x10 << 16), &denali_phy[211]);
+	writel(denali_phy_params[212] + (0x10 << 8), &denali_phy[212]);
+	writel(denali_phy_params[213], &denali_phy[213]);
+
+	writel(denali_phy_params[339] + (0x10 << 16), &denali_phy[339]);
+	writel(denali_phy_params[340] + (0x10 << 8), &denali_phy[340]);
+	writel(denali_phy_params[341], &denali_phy[341]);
+
+	writel(denali_phy_params[467] + (0x10 << 16), &denali_phy[467]);
+	writel(denali_phy_params[468] + (0x10 << 8), &denali_phy[468]);
+	writel(denali_phy_params[469], &denali_phy[469]);
+
+	/*
+	 * phy_gtlvl_resp_wait_cnt_X
+	 * phy_gtlvl_dly_step_X
+	 * phy_wrlvl_resp_wait_cnt_X
+	 * phy_gtlvl_final_step_X
+	 * phy_gtlvl_back_step_X
+	 * phy_rdlvl_dly_step_X
+	 *
+	 * phy_master_delay_step_X
+	 * phy_master_delay_wait_X
+	 * phy_wrlvl_dly_step_X
+	 * phy_rptr_update_X
+	 * phy_wdqlvl_dly_step_X
+	 */
+	writel(denali_phy_params[87], &denali_phy[87]);
+	writel(denali_phy_params[88], &denali_phy[88]);
+	writel(denali_phy_params[89], &denali_phy[89]);
+	writel(denali_phy_params[90], &denali_phy[90]);
+
+	writel(denali_phy_params[215], &denali_phy[215]);
+	writel(denali_phy_params[216], &denali_phy[216]);
+	writel(denali_phy_params[217], &denali_phy[217]);
+	writel(denali_phy_params[218], &denali_phy[218]);
+
+	writel(denali_phy_params[343], &denali_phy[343]);
+	writel(denali_phy_params[344], &denali_phy[344]);
+	writel(denali_phy_params[345], &denali_phy[345]);
+	writel(denali_phy_params[346], &denali_phy[346]);
+
+	writel(denali_phy_params[471], &denali_phy[471]);
+	writel(denali_phy_params[472], &denali_phy[472]);
+	writel(denali_phy_params[473], &denali_phy[473]);
+	writel(denali_phy_params[474], &denali_phy[474]);
+
+	/*
+	 * phy_gtlvl_lat_adj_start_X
+	 * phy_gtlvl_rddqs_slv_dly_start_X
+	 * phy_rdlvl_rddqs_dq_slv_dly_start_X
+	 * phy_wdqlvl_dqdm_slv_dly_start_X
+	 */
+	writel(denali_phy_params[80], &denali_phy[80]);
+	writel(denali_phy_params[81], &denali_phy[81]);
+
+	writel(denali_phy_params[208], &denali_phy[208]);
+	writel(denali_phy_params[209], &denali_phy[209]);
+
+	writel(denali_phy_params[336], &denali_phy[336]);
+	writel(denali_phy_params[337], &denali_phy[337]);
+
+	writel(denali_phy_params[464], &denali_phy[464]);
+	writel(denali_phy_params[465], &denali_phy[465]);
+
+	/*
+	 * phy_master_delay_start_X
+	 * phy_sw_master_mode_X
+	 * phy_rddata_en_tsel_dly_X
+	 */
+	writel(denali_phy_params[86], &denali_phy[86]);
+	writel(denali_phy_params[214], &denali_phy[214]);
+	writel(denali_phy_params[342], &denali_phy[342]);
+	writel(denali_phy_params[470], &denali_phy[470]);
+
+	/*
+	 * phy_rddqZ_slave_delay_X
+	 * phy_rddqs_dqZ_fall_slave_delay_X
+	 * phy_rddqs_dqZ_rise_slave_delay_X
+	 * phy_rddqs_dm_fall_slave_delay_X
+	 * phy_rddqs_dm_rise_slave_delay_X
+	 * phy_rddqs_gate_slave_delay_X
+	 * phy_wrlvl_delay_early_threshold_X
+	 * phy_write_path_lat_add_X
+	 * phy_rddqs_latency_adjust_X
+	 * phy_wrlvl_delay_period_threshold_X
+	 * phy_wrlvl_early_force_zero_X
+	 */
+	sdram_copy_to_reg((u32 *)&denali_phy[64],
+			  (u32 *)&denali_phy_params[64],
+			  (67 - 63) * 4);
+	clrsetbits_le32(&denali_phy[68], 0xFFFFFC00,
+			denali_phy_params[68] & 0xFFFFFC00);
+	sdram_copy_to_reg((u32 *)&denali_phy[69],
+			  (u32 *)&denali_phy_params[69],
+			  (79 - 68) * 4);
+
+	sdram_copy_to_reg((u32 *)&denali_phy[192],
+			  (u32 *)&denali_phy_params[192],
+			  (195 - 191) * 4);
+	clrsetbits_le32(&denali_phy[196], 0xFFFFFC00,
+			denali_phy_params[196] & 0xFFFFFC00);
+	sdram_copy_to_reg((u32 *)&denali_phy[197],
+			  (u32 *)&denali_phy_params[197],
+			  (207 - 196) * 4);
+
+	sdram_copy_to_reg((u32 *)&denali_phy[320],
+			  (u32 *)&denali_phy_params[320],
+			  (323 - 319) * 4);
+	clrsetbits_le32(&denali_phy[324], 0xFFFFFC00,
+			denali_phy_params[324] & 0xFFFFFC00);
+	sdram_copy_to_reg((u32 *)&denali_phy[325],
+			  (u32 *)&denali_phy_params[325],
+			  (335 - 324) * 4);
+
+	sdram_copy_to_reg((u32 *)&denali_phy[448],
+			  (u32 *)&denali_phy_params[448],
+			  (451 - 447) * 4);
+	clrsetbits_le32(&denali_phy[452], 0xFFFFFC00,
+			denali_phy_params[452] & 0xFFFFFC00);
+	sdram_copy_to_reg((u32 *)&denali_phy[453],
+			  (u32 *)&denali_phy_params[453],
+			  (463 - 452) * 4);
+
+	/* phy_two_cyc_preamble_X */
+	clrsetbits_le32(&denali_phy[7], 0x3 << 24,
+			denali_phy_params[7] & (0x3 << 24));
+	clrsetbits_le32(&denali_phy[135], 0x3 << 24,
+			denali_phy_params[135] & (0x3 << 24));
+	clrsetbits_le32(&denali_phy[263], 0x3 << 24,
+			denali_phy_params[263] & (0x3 << 24));
+	clrsetbits_le32(&denali_phy[391], 0x3 << 24,
+			denali_phy_params[391] & (0x3 << 24));
+
+	/* speed */
+	if (f1_sdram_params->base.ddr_freq < 400 * MHz)
+		speed = 0x0;
+	else if (f1_sdram_params->base.ddr_freq < 800 * MHz)
+		speed = 0x1;
+	else if (f1_sdram_params->base.ddr_freq < 1200 * MHz)
+		speed = 0x2;
+
+	/* PHY_924 PHY_PAD_FDBK_DRIVE */
+	clrsetbits_le32(&denali_phy[924],
+			0x3 << 21, speed << 21);
+	/* PHY_926 PHY_PAD_DATA_DRIVE */
+	clrsetbits_le32(&denali_phy[926],
+			0x3 << 9, speed << 9);
+	/* PHY_927 PHY_PAD_DQS_DRIVE */
+	clrsetbits_le32(&denali_phy[927],
+			0x3 << 9, speed << 9);
+	/* PHY_928 PHY_PAD_ADDR_DRIVE */
+	clrsetbits_le32(&denali_phy[928],
+			0x3 << 17, speed << 17);
+	/* PHY_929 PHY_PAD_CLK_DRIVE */
+	clrsetbits_le32(&denali_phy[929],
+			0x3 << 17, speed << 17);
+	/* PHY_935 PHY_PAD_CKE_DRIVE */
+	clrsetbits_le32(&denali_phy[935],
+			0x3 << 17, speed << 17);
+	/* PHY_937 PHY_PAD_RST_DRIVE */
+	clrsetbits_le32(&denali_phy[937],
+			0x3 << 17, speed << 17);
+	/* PHY_939 PHY_PAD_CS_DRIVE */
+	clrsetbits_le32(&denali_phy[939],
+			0x3 << 17, speed << 17);
+
+	if (f1_sdram_params->base.dramtype == LPDDR4) {
+		read_mr(dram->chan[channel].pctl, 1, 5, &mr5);
+		set_ds_odt(&dram->chan[channel], f1_sdram_params, 1, 0, mr5);
+		set_ds_odt(&dram->chan[channel], f1_sdram_params, 1, 1, mr5);
+
+		ctl_fn = get_ctl_fn(f1_sdram_params, fn);
+		set_lp4_dq_odt(&dram->chan[channel], f1_sdram_params,
+			       ctl_fn, 1, 1, 0, mr5);
+		set_lp4_ca_odt(&dram->chan[channel], f1_sdram_params,
+			       ctl_fn, 1, 1, 0, mr5);
+		set_lp4_MR3(&dram->chan[channel], f1_sdram_params,
+			    ctl_fn, 1, 0, mr5);
+		set_lp4_MR12(&dram->chan[channel], f1_sdram_params,
+			     ctl_fn, 1, 0, mr5);
+		set_lp4_MR14(&dram->chan[channel], f1_sdram_params,
+			     ctl_fn, 1, 0, mr5);
+
+		set_lp4_dq_odt(&dram->chan[channel], f1_sdram_params,
+			       ctl_fn, 1, 1, 1, mr5);
+		set_lp4_ca_odt(&dram->chan[channel], f1_sdram_params,
+			       ctl_fn, 1, 1, 1, mr5);
+		set_lp4_MR3(&dram->chan[channel], f1_sdram_params,
+			    ctl_fn, 1, 1, mr5);
+		set_lp4_MR12(&dram->chan[channel], f1_sdram_params,
+			     ctl_fn, 1, 1, mr5);
+		set_lp4_MR14(&dram->chan[channel], f1_sdram_params,
+			     ctl_fn, 1, 1, mr5);
+
+		/*
+		 * if phy_sw_master_mode_X not bypass mode,
+		 * clear PHY_SLICE_PWR_RDC_DISABLE.
+		 * NOTE: need use f1_sdram_params, not ddr_publ_regs
+		 */
+		if (!((denali_phy_params[86] >> 8)
+			& (1 << 2))) {
+			clrbits_le32(&denali_phy[10], 1 << 16);
+			clrbits_le32(&denali_phy[138], 1 << 16);
+			clrbits_le32(&denali_phy[266], 1 << 16);
+			clrbits_le32(&denali_phy[394], 1 << 16);
+		}
+
+		/*
+		 * when PHY_PER_CS_TRAINING_EN=1, W2W_DIFFCS_DLY_Fx can't
+		 * smaller than 8
+		 * NOTE: need use f1_sdram_params, not ddr_publ_regs
+		 */
+		if ((denali_phy_params[84] >> 16) & 1) {
+			if (((readl(&denali_ctl[217 + ctl_fn]) >>
+				16) & 0x1f) < 8)
+				clrsetbits_le32(&denali_ctl[217 + ctl_fn],
+						0x1f << 16,
+						8 << 16);
+		}
+	}
+}
+
+static void dram_set_phy_fn(struct dram_info *dram,
+			    struct rk3399_sdram_params *sdram_params, u32 fn,
+			    struct rk3399_sdram_params *f1_sdram_params)
+{
+	u32 channel;
+
+	for (channel = 0; channel < 2; channel++)
+		dram_copy_phy_fn(dram, sdram_params, fn, f1_sdram_params,
+				 channel);
+}
+
+static int dram_set_rate(struct dram_info *dram,
+			 struct rk3399_sdram_params *sdram_params,
+			 u32 fn, u32 hz)
+{
+	u32 channel;
+	int ret_clk, ret[2];
+
+	/* cci idle req stall */
+	writel(0x70007, &dram->grf->soc_con0);
+	/* enable all clk */
+	setbits_le32(&dram->pmu->pmu_noc_auto_ena, (0x3 << 7));
+	/* idle */
+	setbits_le32(&dram->pmu->pmu_bus_idle_req, (0x3 << 18));
+	while ((readl(&dram->pmu->pmu_bus_idle_st) & (0x3 << 18))
+	       != (0x3 << 18))
+		;
+
+	/* change freq */
+	writel((((0x3 << 4) | (1 << 2) | 1) << 16) |
+		(fn << 4) | (1 << 2) | 1, &dram->cic->cic_ctrl0);
+	while (!(readl(&dram->cic->cic_status0) & (1 << 2)))
+		;
+
+	ret_clk = clk_set_rate(&dram->ddr_clk, hz);
+	if (ret_clk < 0) {
+		printf("%s clk set failed %d\n", __func__, ret_clk);
+		return ret_clk;
+	}
+
+	writel(0x20002, &dram->cic->cic_ctrl0);
+	while (!(readl(&dram->cic->cic_status0) & (1 << 0)))
+		;
+
+	/* deidle */
+	clrbits_le32(&dram->pmu->pmu_bus_idle_req, (0x3 << 18));
+	while (readl(&dram->pmu->pmu_bus_idle_st) & (0x3 << 18))
+		;
+
+	/* clear enable all clk */
+	clrbits_le32(&dram->pmu->pmu_noc_auto_ena, (0x3 << 7));
+
+	/* LPDDR4 f2 can not do training, all training will fail */
+	if (!(sdram_params->base.dramtype == LPDDR4 && fn == 2)) {
+		for (channel = 0; channel < 2; channel++) {
+			if (!(sdram_params->ch[channel].cap_info.col))
+				continue;
+			ret[channel] = data_training(&dram->chan[channel],
+						     channel, sdram_params,
+						     PI_FULL_TRAINING);
+		}
+		for (channel = 0; channel < 2; channel++) {
+			if (!(sdram_params->ch[channel].cap_info.col))
+				continue;
+			if (ret[channel])
+				printf("channel %d training failed!\n",
+				       channel);
+			else
+				printf("channel %d training pass\n", channel);
+		}
+	}
+
+	return 0;
+}
+
+static struct rk3399_sdram_params *g_sdram_params;
+static void set_rate0(struct dram_info *dram)
+{
+	u32 ctl_fn;
+	u32 phy_fn;
+
+	ctl_fn = 0;
+	phy_fn = get_phy_fn(g_sdram_params, ctl_fn);
+	dram_set_phy_fn(dram, g_sdram_params, phy_fn, &dfs_configs[ctl_fn]);
+	dram_set_rate(dram, g_sdram_params, ctl_fn,
+		      dfs_configs[ctl_fn].base.ddr_freq);
+	printf("change freq to %d MHz %d, %d\n",
+	       dfs_configs[ctl_fn].base.ddr_freq / MHZ, ctl_fn, phy_fn);
+}
+
+static void set_rate1(struct dram_info *dram)
+{
+	u32 ctl_fn;
+	u32 phy_fn;
+
+	ctl_fn = 1;
+	phy_fn = get_phy_fn(g_sdram_params, ctl_fn);
+	dram_set_phy_fn(dram, g_sdram_params, phy_fn, &dfs_configs[ctl_fn]);
+	dram_set_rate(dram, g_sdram_params, ctl_fn,
+		      dfs_configs[ctl_fn].base.ddr_freq);
+	printf("change freq to %d MHz %d, %d\n",
+	       dfs_configs[ctl_fn].base.ddr_freq / MHZ, ctl_fn, phy_fn);
+}
+
 static int sdram_init(struct dram_info *dram,
 		      struct rk3399_sdram_params *sdram_params)
 {
@@ -1529,10 +2924,12 @@ static int sdram_init(struct dram_info *dram,
 
 				phy_pctrl_reset(cru, channel);
 				phy_dll_bypass_set(publ, ddr_freq);
-				if (pctl_cfg(chan, channel, sdram_params) != 0)
-					printf("pctl_cfg fail\n");
+				pctl_cfg(chan, channel, sdram_params);
 			}
 
+			/* start to trigger initialization */
+			pctl_start(dram, sdram_params, 3);
+
 			/* LPDDR2/LPDDR3 need to wait DAI complete, max 10us */
 			if (dramtype == LPDDR3)
 				udelay(10);
@@ -1541,20 +2938,30 @@ static int sdram_init(struct dram_info *dram,
 			dram_set_cs(&dram->chan[ch], tmp, 2048,
 				    sdram_params->base.dramtype);
 			sdram_params->ch[ch].cap_info.rank = rank;
-			/*
-			 * LPDDR3 CA training msut be trigger before
-			 * other training.
-			 * DDR3 is not have CA training.
-			 * LPDDR4 need confirm here!
-			 */
-			if (sdram_params->base.dramtype == LPDDR3)
-				training_flag = PI_CA_TRAINING |
-						PI_READ_GATE_TRAINING;
-			else
-				training_flag = PI_READ_GATE_TRAINING;
-			if (!(data_training(&dram->chan[ch], ch, sdram_params,
-					    training_flag)))
-				break;
+			if (sdram_params->base.dramtype == LPDDR4) {
+				/* two rank, then read_mr(cs1)
+				 * one rank, then read_mr(cs0)
+				 */
+				if (!read_mr_for_detect(dram, ch, rank,
+							sdram_params))
+					break;
+			} else {
+				/*
+				 * LPDDR3 CA training msut be trigger before
+				 * other training.
+				 * DDR3 is not have CA training.
+				 * LPDDR4 need confirm here!
+				 */
+				if (sdram_params->base.dramtype == LPDDR3)
+					training_flag = PI_CA_TRAINING |
+							PI_READ_GATE_TRAINING;
+				else
+					training_flag = PI_READ_GATE_TRAINING;
+				if (!(data_training(&dram->chan[ch], ch,
+						    sdram_params,
+						    training_flag)))
+					break;
+			}
 		}
 		sdram_params->ch[ch].cap_info.rank = rank;
 	}
@@ -1597,9 +3004,23 @@ static int sdram_init(struct dram_info *dram,
 		set_cap_relate_config(chan, sdram_params, channel);
 	}
 
+	if (sdram_params->base.num_channels == 0) {
+		sdram_print_dram_type(sdram_params->base.dramtype);
+		printf(" %dMHz\n", sdram_params->base.ddr_freq);
+		return -1;
+	}
+
 	sdram_params->base.stride = calculate_stride(sdram_params);
 	dram_all_config(dram, sdram_params);
-	switch_to_phy_index1(dram, sdram_params);
+
+	if (sdram_params->base.dramtype != LPDDR4)
+		switch_to_phy_index1(dram, sdram_params);
+
+	if (sdram_params->base.dramtype == LPDDR4) {
+		g_sdram_params = sdram_params;
+		set_rate0(dram);
+		set_rate1(dram);
+	}
 
 	debug("Finish SDRAM initialization...\n");
 	return 0;
@@ -1662,6 +3083,8 @@ static int rk3399_dmc_init(struct udevice *dev)
 #endif
 
 	priv->cic = syscon_get_first_range(ROCKCHIP_SYSCON_CIC);
+	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	priv->pmu = syscon_get_first_range(ROCKCHIP_SYSCON_PMU);
 	priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
 	priv->pmusgrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUSGRF);
 	priv->pmucru = rockchip_get_pmucru();
@@ -1680,8 +3103,8 @@ static int rk3399_dmc_init(struct udevice *dev)
 	      priv->chan[0].publ, priv->chan[0].msch,
 	      priv->chan[1].pctl, priv->chan[1].pi,
 	      priv->chan[1].publ, priv->chan[1].msch);
-	debug("cru %p, cic %p, grf %p, sgrf %p, pmucru %p\n", priv->cru,
-	      priv->cic, priv->pmugrf, priv->pmusgrf, priv->pmucru);
+	debug("cru %p, cic %p, grf %p, sgrf %p, pmucru %p, pmu %p\n", priv->cru,
+	      priv->cic, priv->pmugrf, priv->pmusgrf, priv->pmucru, priv->pmu);
 #if CONFIG_IS_ENABLED(OF_PLATDATA)
 	ret = clk_get_by_index_platdata(dev, 0, dtplat->clocks, &priv->ddr_clk);
 #else
@@ -1698,7 +3121,7 @@ static int rk3399_dmc_init(struct udevice *dev)
 	}
 	ret = sdram_init(priv, params);
 	if (ret < 0) {
-		printf("%s DRAM init failed%d\n", __func__, ret);
+		printf("%s DRAM init failed %d\n", __func__, ret);
 		return ret;
 	}
 
@@ -1717,8 +3140,8 @@ static int rk3399_dmc_probe(struct udevice *dev)
 	priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
 	debug("%s: pmugrf=%p\n", __func__, priv->pmugrf);
 	priv->info.base = CONFIG_SYS_SDRAM_BASE;
-	priv->info.size = rockchip_sdram_size(
-			(phys_addr_t)&priv->pmugrf->os_reg2);
+	priv->info.size =
+		rockchip_sdram_size((phys_addr_t)&priv->pmugrf->os_reg2);
 #ifdef CONFIG_SPL_BUILD
 	struct ddr_param ddr_parem;
 

commit e4011c0133ecf4526b4b3ad9c21e6eab7adceb85
Author: YouMin Chen <cym@rock-chips.com>
Date:   Fri Dec 28 17:19:01 2018 +0800

    rockchip: dts: rk3399: use u-boot,dm-pre-reloc for pmu
    
    Change-Id: I3df556ff7133532ceb8f38bd69f7d8e378d265c8
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi
index a67aa42fbd..985257cfb8 100644
--- a/arch/arm/dts/rk3399-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-u-boot.dtsi
@@ -33,6 +33,10 @@
 	u-boot,dm-pre-reloc;
 };
 
+&pmu {
+	u-boot,dm-pre-reloc;
+};
+
 &pmugrf {
 	u-boot,dm-pre-reloc;
 };

commit d6f493bc550dc87a06e7fb2f864f285e35b8bbd5
Author: YouMin Chen <cym@rock-chips.com>
Date:   Fri Dec 28 17:15:18 2018 +0800

    rockchip: arm64: rk3399: syscon add support for pmu
    
    Change-Id: Ibc89ac33df07c6ea3e38d4c6cb4f07b8747589df
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c b/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c
index 5cf57f4d45..bd1a85e030 100644
--- a/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c
@@ -14,6 +14,7 @@ static const struct udevice_id rk3399_syscon_ids[] = {
 	{ .compatible = "rockchip,rk3399-pmugrf", .data = ROCKCHIP_SYSCON_PMUGRF },
 	{ .compatible = "rockchip,rk3399-pmusgrf", .data = ROCKCHIP_SYSCON_PMUSGRF },
 	{ .compatible = "rockchip,rk3399-cic", .data = ROCKCHIP_SYSCON_CIC },
+	{ .compatible = "rockchip,rk3399-pmu", .data = ROCKCHIP_SYSCON_PMU },
 	{ }
 };
 
@@ -62,4 +63,11 @@ U_BOOT_DRIVER(rockchip_rk3399_cic) = {
 	.of_match = rk3399_syscon_ids + 3,
 	.bind = rk3399_syscon_bind_of_platdata,
 };
+
+U_BOOT_DRIVER(rockchip_rk3399_pmu) = {
+	.name = "rockchip_rk3399_pmu",
+	.id = UCLASS_SYSCON,
+	.of_match = rk3399_syscon_ids + 4,
+	.bind = rk3399_syscon_bind_of_platdata,
+};
 #endif

commit 51c830f2d215b31b40c6f914c0d433697a8c66d4
Author: YouMin Chen <cym@rock-chips.com>
Date:   Fri Dec 28 17:06:27 2018 +0800

    rockchip: clk: rk3399: support 50MHz and 400MHz for ddr clock
    
    Change-Id: I9d3a64ce38986f2c48e1f2614bcc274340674aa7
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 46b907254c..993bf57867 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -911,23 +911,31 @@ static ulong rk3399_ddr_set_clk(struct rk3399_cru *cru,
 
 	/*  clk_ddrc == DPLL = 24MHz / refdiv * fbdiv / postdiv1 / postdiv2 */
 	switch (set_rate) {
-	case 200*MHz:
+	case 50 * MHz:
+		dpll_cfg = (struct pll_div)
+		{.refdiv = 1, .fbdiv = 12, .postdiv1 = 3, .postdiv2 = 2};
+		break;
+	case 200 * MHz:
 		dpll_cfg = (struct pll_div)
 		{.refdiv = 1, .fbdiv = 50, .postdiv1 = 6, .postdiv2 = 1};
 		break;
-	case 300*MHz:
+	case 300 * MHz:
 		dpll_cfg = (struct pll_div)
 		{.refdiv = 2, .fbdiv = 100, .postdiv1 = 4, .postdiv2 = 1};
 		break;
-	case 666*MHz:
+	case 400 * MHz:
+		dpll_cfg = (struct pll_div)
+		{.refdiv = 1, .fbdiv = 50, .postdiv1 = 3, .postdiv2 = 1};
+		break;
+	case 666 * MHz:
 		dpll_cfg = (struct pll_div)
 		{.refdiv = 2, .fbdiv = 111, .postdiv1 = 2, .postdiv2 = 1};
 		break;
-	case 800*MHz:
+	case 800 * MHz:
 		dpll_cfg = (struct pll_div)
 		{.refdiv = 1, .fbdiv = 100, .postdiv1 = 3, .postdiv2 = 1};
 		break;
-	case 933*MHz:
+	case 933 * MHz:
 		dpll_cfg = (struct pll_div)
 		{.refdiv = 1, .fbdiv = 116, .postdiv1 = 3, .postdiv2 = 1};
 		break;

commit 31d8c61d58042d968391331b894224b660a2accc
Author: YouMin Chen <cym@rock-chips.com>
Date:   Tue Dec 25 10:09:42 2018 +0800

    driver: ram: rockchip: rk3399: dram init select common code
    
    Add support dram capacity detect.
    Select dram timing file base on dram type and clock frequency,
    don't need care dram capacity.Dram capacity will auto detect.
    
    Change-Id: I0554a0ec0c753a159406330aa0baa2daafe7ab93
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/dts/rk3399-sdram-ddr3-1333.dtsi b/arch/arm/dts/rk3399-sdram-ddr3-1333.dtsi
index f032eece23..d0d7c6439d 100644
--- a/arch/arm/dts/rk3399-sdram-ddr3-1333.dtsi
+++ b/arch/arm/dts/rk3399-sdram-ddr3-1333.dtsi
@@ -14,6 +14,8 @@
 		0x0
 		0xf
 		0xf
+		0xf
+		0xf
 		1
 		0x80120e12
 		0x11030802
@@ -29,6 +31,8 @@
 		0x0
 		0xf
 		0xf
+		0xf
+		0xf
 		1
 		0x80120e12
 		0x11030802
diff --git a/arch/arm/dts/rk3399-sdram-ddr3-1600.dtsi b/arch/arm/dts/rk3399-sdram-ddr3-1600.dtsi
index d54ea82d1e..cab72af48b 100644
--- a/arch/arm/dts/rk3399-sdram-ddr3-1600.dtsi
+++ b/arch/arm/dts/rk3399-sdram-ddr3-1600.dtsi
@@ -14,6 +14,8 @@
 		0x0
 		0xf
 		0xf
+		0xf
+		0xf
 		1
 		0x80151015
 		0x14040902
@@ -29,6 +31,8 @@
 		0x0
 		0xf
 		0xf
+		0xf
+		0xf
 		1
 		0x80151015
 		0x14040902
diff --git a/arch/arm/dts/rk3399-sdram-ddr3-1866.dtsi b/arch/arm/dts/rk3399-sdram-ddr3-1866.dtsi
index 80e946e35e..db407df2de 100644
--- a/arch/arm/dts/rk3399-sdram-ddr3-1866.dtsi
+++ b/arch/arm/dts/rk3399-sdram-ddr3-1866.dtsi
@@ -14,6 +14,8 @@
 		0x0
 		0xf
 		0xf
+		0xf
+		0xf
 		1
 		0x80181219
 		0x17050a03
@@ -29,6 +31,8 @@
 		0x0
 		0xf
 		0xf
+		0xf
+		0xf
 		1
 		0x80181219
 		0x17050a03
diff --git a/arch/arm/dts/rk3399-sdram-ddr3-4G-1600.dtsi b/arch/arm/dts/rk3399-sdram-ddr3-4G-1600.dtsi
index 745e2a5f2e..45db141f08 100644
--- a/arch/arm/dts/rk3399-sdram-ddr3-4G-1600.dtsi
+++ b/arch/arm/dts/rk3399-sdram-ddr3-4G-1600.dtsi
@@ -14,6 +14,8 @@
 		0x0
 		0xf
 		0xf
+		0xf
+		0xf
 		1
 		0x80151015
 		0x14040902
@@ -29,6 +31,8 @@
 		0x0
 		0xf
 		0xf
+		0xf
+		0xf
 		1
 		0x80151015
 		0x14040902
diff --git a/arch/arm/dts/rk3399-sdram-lpddr3-4GB-1600.dtsi b/arch/arm/dts/rk3399-sdram-lpddr3-4GB-1600.dtsi
index 65dfc3806c..ad2d943ced 100644
--- a/arch/arm/dts/rk3399-sdram-lpddr3-4GB-1600.dtsi
+++ b/arch/arm/dts/rk3399-sdram-lpddr3-4GB-1600.dtsi
@@ -14,6 +14,8 @@
 		0x0
 		0xf
 		0xf
+		0xf
+		0xf
 		1
 		0x1d191519
 		0x14040808
@@ -29,6 +31,8 @@
 		0x0
 		0xf
 		0xf
+		0xf
+		0xf
 		1
 		0x1d191519
 		0x14040808
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h b/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h
index 2cee2e5ee5..9f608d72ad 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h
@@ -6,6 +6,7 @@
 
 #ifndef _ASM_ARCH_SDRAM_RK3399_H
 #define _ASM_ARCH_SDRAM_RK3399_H
+#include <asm/arch/sdram_share.h>
 
 struct rk3399_ddr_pctl_regs {
 	u32 denali_ctl[332];
@@ -19,30 +20,6 @@ struct rk3399_ddr_pi_regs {
 	u32 denali_pi[200];
 };
 
-struct rk3399_msch_regs {
-	u32 coreid;
-	u32 revisionid;
-	u32 ddrconf;
-	u32 ddrsize;
-	u32 ddrtiminga0;
-	u32 ddrtimingb0;
-	u32 ddrtimingc0;
-	u32 devtodev0;
-	u32 reserved0[(0x110 - 0x20) / 4];
-	u32 ddrmode;
-	u32 reserved1[(0x1000 - 0x114) / 4];
-	u32 agingx0;
-};
-
-struct rk3399_msch_timings {
-	u32 ddrtiminga0;
-	u32 ddrtimingb0;
-	u32 ddrtimingc0;
-	u32 devtodev0;
-	u32 ddrmode;
-	u32 agingx0;
-};
-
 struct rk3399_ddr_cic_regs {
 	u32 cic_ctrl0;
 	u32 cic_ctrl1;
@@ -65,37 +42,13 @@ struct rk3399_ddr_cic_regs {
 #define MEM_RST_VALID	1
 
 struct rk3399_sdram_channel {
-	unsigned int rank;
-	/* dram column number, 0 means this channel is invalid */
-	unsigned int col;
-	/* dram bank number, 3:8bank, 2:4bank */
-	unsigned int bk;
-	/* channel buswidth, 2:32bit, 1:16bit, 0:8bit */
-	unsigned int bw;
-	/* die buswidth, 2:32bit, 1:16bit, 0:8bit */
-	unsigned int dbw;
-	/*
-	 * row_3_4 = 1: 6Gb or 12Gb die
-	 * row_3_4 = 0: normal die, power of 2
-	 */
-	unsigned int row_3_4;
-	unsigned int cs0_row;
-	unsigned int cs1_row;
-	unsigned int ddrconfig;
-	struct rk3399_msch_timings noc_timings;
-};
-
-struct rk3399_base_params {
-	unsigned int ddr_freq;
-	unsigned int dramtype;
-	unsigned int num_channels;
-	unsigned int stride;
-	unsigned int odt;
+	struct sdram_cap_info cap_info;
+	struct sdram_msch_timings noc_timings;
 };
 
 struct rk3399_sdram_params {
 	struct rk3399_sdram_channel ch[2];
-	struct rk3399_base_params base;
+	struct sdram_base_params base;
 	struct rk3399_ddr_pctl_regs pctl_regs;
 	struct rk3399_ddr_pi_regs pi_regs;
 	struct rk3399_ddr_publ_regs phy_regs;
@@ -108,4 +61,13 @@ struct rk3399_sdram_params {
 #define PI_WDQ_LEVELING		(1 << 4)
 #define PI_FULL_TRAINING	0xff
 
+enum {
+	STRIDE_128B = 0,
+	STRIDE_256B = 1,
+	STRIDE_512B = 2,
+	STRIDE_4KB = 3,
+	UN_STRIDE = 4,
+	PART_STRIDE = 5
+};
+
 #endif
diff --git a/configs/android6.0-rk3399_defconfig b/configs/android6.0-rk3399_defconfig
index f56103356f..b45169552f 100644
--- a/configs/android6.0-rk3399_defconfig
+++ b/configs/android6.0-rk3399_defconfig
@@ -67,6 +67,10 @@ CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
+CONFIG_ROCKCHIP_SDRAM_COMMON=y
+CONFIG_SDRAM_COMMON_CAP_DETECT=y
+CONFIG_SDRAM_COMMON_OSREG=y
+CONFIG_SDRAM_COMMON_MSCH_RK3399=y
 CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF1A0000
diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index a28d8fdd2d..23ab932de6 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -67,6 +67,10 @@ CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
+CONFIG_ROCKCHIP_SDRAM_COMMON=y
+CONFIG_SDRAM_COMMON_CAP_DETECT=y
+CONFIG_SDRAM_COMMON_OSREG=y
+CONFIG_SDRAM_COMMON_MSCH_RK3399=y
 CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF1A0000
diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
index 95b4d07a8f..da68739877 100644
--- a/configs/firefly-rk3399_defconfig
+++ b/configs/firefly-rk3399_defconfig
@@ -65,6 +65,10 @@ CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
+CONFIG_ROCKCHIP_SDRAM_COMMON=y
+CONFIG_SDRAM_COMMON_CAP_DETECT=y
+CONFIG_SDRAM_COMMON_OSREG=y
+CONFIG_SDRAM_COMMON_MSCH_RK3399=y
 CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF1A0000
diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig
index cb014631e5..52411bbdab 100644
--- a/configs/puma-rk3399_defconfig
+++ b/configs/puma-rk3399_defconfig
@@ -77,6 +77,10 @@ CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
+CONFIG_ROCKCHIP_SDRAM_COMMON=y
+CONFIG_SDRAM_COMMON_CAP_DETECT=y
+CONFIG_SDRAM_COMMON_OSREG=y
+CONFIG_SDRAM_COMMON_MSCH_RK3399=y
 CONFIG_DEBUG_UART_BASE=0xFF180000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
index 27830c60bd..3803831b90 100644
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -80,6 +80,10 @@ CONFIG_CHARGE_ANIMATION=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
+CONFIG_ROCKCHIP_SDRAM_COMMON=y
+CONFIG_SDRAM_COMMON_CAP_DETECT=y
+CONFIG_SDRAM_COMMON_OSREG=y
+CONFIG_SDRAM_COMMON_MSCH_RK3399=y
 CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF1A0000
diff --git a/configs/rk3399pro_defconfig b/configs/rk3399pro_defconfig
index 862689987e..1e463ce644 100644
--- a/configs/rk3399pro_defconfig
+++ b/configs/rk3399pro_defconfig
@@ -82,6 +82,10 @@ CONFIG_CHARGE_ANIMATION=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
+CONFIG_ROCKCHIP_SDRAM_COMMON=y
+CONFIG_SDRAM_COMMON_CAP_DETECT=y
+CONFIG_SDRAM_COMMON_OSREG=y
+CONFIG_SDRAM_COMMON_MSCH_RK3399=y
 CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF1A0000
diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index d0f74a4f9f..fa2b99d24c 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -12,7 +12,7 @@ obj-$(CONFIG_ROCKCHIP_RK3188) = sdram_rk3188.o
 obj-$(CONFIG_ROCKCHIP_RK322X) = sdram_rk322x.o
 obj-$(CONFIG_ROCKCHIP_RK3288) = sdram_rk3288.o
 obj-$(CONFIG_ROCKCHIP_RK3328) = sdram_rk3328.o
-obj-$(CONFIG_ROCKCHIP_RK3399) = sdram_rk3399.o
+obj-$(CONFIG_ROCKCHIP_RK3399) += sdram_rk3399.o
 obj-$(CONFIG_ROCKCHIP_PX30) += sdram_px30.o sdram_pctl_px30.o sdram_phy_px30.o
 obj-$(CONFIG_ROCKCHIP_PX30) += rockchip_sdram.o
 obj-$(CONFIG_ROCKCHIP_RK1808) = rockchip_sdram.o
diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c
index fa8da66f4e..ee6767bada 100644
--- a/drivers/ram/rockchip/sdram_rk3399.c
+++ b/drivers/ram/rockchip/sdram_rk3399.c
@@ -28,7 +28,7 @@ struct chan_info {
 	struct rk3399_ddr_pctl_regs *pctl;
 	struct rk3399_ddr_pi_regs *pi;
 	struct rk3399_ddr_publ_regs *publ;
-	struct rk3399_msch_regs *msch;
+	struct msch_regs *msch;
 };
 
 struct dram_info {
@@ -68,15 +68,30 @@ struct rockchip_dmc_plat {
 	struct regmap *map;
 };
 
-static void copy_to_reg(u32 *dest, const u32 *src, u32 n)
+#define CRU_SFTRST_DDR_CTRL(ch, n)	((0x1 << (8 + 16 + (ch) * 4)) | \
+						((n) << (8 + (ch) * 4)))
+#define CRU_SFTRST_DDR_PHY(ch, n)	((0x1 << (9 + 16 + (ch) * 4)) | \
+						((n) << (9 + (ch) * 4)))
+static void rkclk_ddr_reset(struct rk3399_cru *cru, u32 channel, u32 ctl,
+			    u32 phy)
 {
-	int i;
+	channel &= 0x1;
+	ctl &= 0x1;
+	phy &= 0x1;
+	writel(CRU_SFTRST_DDR_CTRL(channel, ctl) |
+					CRU_SFTRST_DDR_PHY(channel, phy),
+					&cru->softrst_con[4]);
+}
 
-	for (i = 0; i < n / sizeof(u32); i++) {
-		writel(*src, dest);
-		src++;
-		dest++;
-	}
+static void phy_pctrl_reset(struct rk3399_cru *cru,
+			    u32 channel)
+{
+	rkclk_ddr_reset(cru, channel, 1, 1);
+	udelay(10);
+	rkclk_ddr_reset(cru, channel, 1, 0);
+	udelay(10);
+	rkclk_ddr_reset(cru, channel, 0, 0);
+	udelay(10);
 }
 
 static void phy_dll_bypass_set(struct rk3399_ddr_publ_regs *ddr_publ_regs,
@@ -122,35 +137,37 @@ static void set_memory_map(const struct chan_info *chan, u32 channel,
 	u32 row;
 
 	/* Get row number from ddrconfig setting */
-	if (sdram_ch->ddrconfig < 2 || sdram_ch->ddrconfig == 4)
+	if (sdram_ch->cap_info.ddrconfig < 2 ||
+	    sdram_ch->cap_info.ddrconfig == 4)
 		row = 16;
-	else if (sdram_ch->ddrconfig == 3)
+	else if (sdram_ch->cap_info.ddrconfig == 3)
 		row = 14;
 	else
 		row = 15;
 
-	cs_map = (sdram_ch->rank > 1) ? 3 : 1;
-	reduc = (sdram_ch->bw == 2) ? 0 : 1;
+	cs_map = (sdram_ch->cap_info.rank > 1) ? 3 : 1;
+	reduc = (sdram_ch->cap_info.bw == 2) ? 0 : 1;
 
 	/* Set the dram configuration to ctrl */
-	clrsetbits_le32(&denali_ctl[191], 0xF, (12 - sdram_ch->col));
+	clrsetbits_le32(&denali_ctl[191], 0xF, (12 - sdram_ch->cap_info.col));
 	clrsetbits_le32(&denali_ctl[190], (0x3 << 16) | (0x7 << 24),
-			((3 - sdram_ch->bk) << 16) |
+			((3 - sdram_ch->cap_info.bk) << 16) |
 			((16 - row) << 24));
 
 	clrsetbits_le32(&denali_ctl[196], 0x3 | (1 << 16),
 			cs_map | (reduc << 16));
 
 	/* PI_199 PI_COL_DIFF:RW:0:4 */
-	clrsetbits_le32(&denali_pi[199], 0xF, (12 - sdram_ch->col));
+	clrsetbits_le32(&denali_pi[199], 0xF, (12 - sdram_ch->cap_info.col));
 
 	/* PI_155 PI_ROW_DIFF:RW:24:3 PI_BANK_DIFF:RW:16:2 */
 	clrsetbits_le32(&denali_pi[155], (0x3 << 16) | (0x7 << 24),
-			((3 - sdram_ch->bk) << 16) |
+			((3 - sdram_ch->cap_info.bk) << 16) |
 			((16 - row) << 24));
 	/* PI_41 PI_CS_MAP:RW:24:4 */
 	clrsetbits_le32(&denali_pi[41], 0xf << 24, cs_map << 24);
-	if ((sdram_ch->rank == 1) && (sdram_params->base.dramtype == DDR3))
+	if (sdram_ch->cap_info.rank == 1 &&
+	    sdram_params->base.dramtype == DDR3)
 		writel(0x2EC7FFFF, &denali_pi[34]);
 }
 
@@ -294,7 +311,7 @@ static void set_ds_odt(const struct chan_info *chan,
 }
 
 static int phy_io_config(const struct chan_info *chan,
-			  const struct rk3399_sdram_params *sdram_params)
+			 const struct rk3399_sdram_params *sdram_params)
 {
 	u32 *denali_phy = chan->publ->denali_phy;
 	u32 vref_mode_dq, vref_value_dq, vref_mode_ac, vref_value_ac;
@@ -423,7 +440,6 @@ static int phy_io_config(const struct chan_info *chan,
 	/* PHY_939 PHY_PAD_CS_DRIVE */
 	clrsetbits_le32(&denali_phy[939], 0x7 << 14, mode_sel << 14);
 
-
 	/* speed setting */
 	if (sdram_params->base.ddr_freq < 400)
 		speed = 0x0;
@@ -471,11 +487,11 @@ static int pctl_cfg(const struct chan_info *chan, u32 channel,
 	 * work around controller bug:
 	 * Do not program DRAM_CLASS until NO_PHY_IND_TRAIN_INT is programmed
 	 */
-	copy_to_reg(&denali_ctl[1], &params_ctl[1],
-		    sizeof(struct rk3399_ddr_pctl_regs) - 4);
+	sdram_copy_to_reg(&denali_ctl[1], &params_ctl[1],
+			  sizeof(struct rk3399_ddr_pctl_regs) - 4);
 	writel(params_ctl[0], &denali_ctl[0]);
-	copy_to_reg(denali_pi, &sdram_params->pi_regs.denali_pi[0],
-		    sizeof(struct rk3399_ddr_pi_regs));
+	sdram_copy_to_reg(denali_pi, &sdram_params->pi_regs.denali_pi[0],
+			  sizeof(struct rk3399_ddr_pi_regs));
 	/* rank count need to set for init */
 	set_memory_map(chan, channel, sdram_params);
 
@@ -492,7 +508,7 @@ static int pctl_cfg(const struct chan_info *chan, u32 channel,
 	setbits_le32(&denali_pi[0], START);
 	setbits_le32(&denali_ctl[0], START);
 
-	/* Wating for phy DLL lock */
+	/* Waiting for phy DLL lock */
 	while (1) {
 		tmp = readl(&denali_phy[920]);
 		tmp1 = readl(&denali_phy[921]);
@@ -504,14 +520,20 @@ static int pctl_cfg(const struct chan_info *chan, u32 channel,
 			break;
 	}
 
-	copy_to_reg(&denali_phy[896], &params_phy[896], (958 - 895) * 4);
-	copy_to_reg(&denali_phy[0], &params_phy[0], (90 - 0 + 1) * 4);
-	copy_to_reg(&denali_phy[128], &params_phy[128], (218 - 128 + 1) * 4);
-	copy_to_reg(&denali_phy[256], &params_phy[256], (346 - 256 + 1) * 4);
-	copy_to_reg(&denali_phy[384], &params_phy[384], (474 - 384 + 1) * 4);
-	copy_to_reg(&denali_phy[512], &params_phy[512], (549 - 512 + 1) * 4);
-	copy_to_reg(&denali_phy[640], &params_phy[640], (677 - 640 + 1) * 4);
-	copy_to_reg(&denali_phy[768], &params_phy[768], (805 - 768 + 1) * 4);
+	sdram_copy_to_reg(&denali_phy[896], &params_phy[896], (958 - 895) * 4);
+	sdram_copy_to_reg(&denali_phy[0], &params_phy[0], (90 - 0 + 1) * 4);
+	sdram_copy_to_reg(&denali_phy[128],
+			  &params_phy[128], (218 - 128 + 1) * 4);
+	sdram_copy_to_reg(&denali_phy[256],
+			  &params_phy[256], (346 - 256 + 1) * 4);
+	sdram_copy_to_reg(&denali_phy[384],
+			  &params_phy[384], (474 - 384 + 1) * 4);
+	sdram_copy_to_reg(&denali_phy[512],
+			  &params_phy[512], (549 - 512 + 1) * 4);
+	sdram_copy_to_reg(&denali_phy[640],
+			  &params_phy[640], (677 - 640 + 1) * 4);
+	sdram_copy_to_reg(&denali_phy[768],
+			  &params_phy[768], (805 - 768 + 1) * 4);
 	set_ds_odt(chan, sdram_params);
 
 	/*
@@ -547,12 +569,12 @@ static int pctl_cfg(const struct chan_info *chan, u32 channel,
 	/* PHY_DLL_RST_EN */
 	clrsetbits_le32(&denali_phy[957], 0x3 << 24, 0x2 << 24);
 
-	/* Wating for PHY and DRAM init complete */
+	/* Waiting for PHY and DRAM init complete */
 	tmp = get_timer(0);
 	do {
 		if (get_timer(tmp) > timeout_ms) {
 			pr_err("DRAM (%s): phy failed to lock within  %ld ms\n",
-			      __func__, timeout_ms);
+			       __func__, timeout_ms);
 			return -ETIME;
 		}
 	} while (!(readl(&denali_ctl[203]) & (1 << 3)));
@@ -569,7 +591,7 @@ static void select_per_cs_training_index(const struct chan_info *chan,
 	u32 *denali_phy = chan->publ->denali_phy;
 
 	/* PHY_84 PHY_PER_CS_TRAINING_EN_0 1bit offset_16 */
-	if ((readl(&denali_phy[84])>>16) & 1) {
+	if ((readl(&denali_phy[84]) >> 16) & 1) {
 		/*
 		 * PHY_8/136/264/392
 		 * phy_per_cs_training_index_X 1bit offset_24
@@ -617,7 +639,7 @@ static int data_training_ca(const struct chan_info *chan, u32 channel,
 	u32 *denali_phy = chan->publ->denali_phy;
 	u32 i, tmp;
 	u32 obs_0, obs_1, obs_2, obs_err = 0;
-	u32 rank = sdram_params->ch[channel].rank;
+	u32 rank = sdram_params->ch[channel].cap_info.rank;
 
 	for (i = 0; i < rank; i++) {
 		select_per_cs_training_index(chan, i);
@@ -667,7 +689,7 @@ static int data_training_wl(const struct chan_info *chan, u32 channel,
 	u32 *denali_phy = chan->publ->denali_phy;
 	u32 i, tmp;
 	u32 obs_0, obs_1, obs_2, obs_3, obs_err = 0;
-	u32 rank = sdram_params->ch[channel].rank;
+	u32 rank = sdram_params->ch[channel].cap_info.rank;
 
 	for (i = 0; i < rank; i++) {
 		select_per_cs_training_index(chan, i);
@@ -723,7 +745,7 @@ static int data_training_rg(const struct chan_info *chan, u32 channel,
 	u32 *denali_phy = chan->publ->denali_phy;
 	u32 i, tmp;
 	u32 obs_0, obs_1, obs_2, obs_3, obs_err = 0;
-	u32 rank = sdram_params->ch[channel].rank;
+	u32 rank = sdram_params->ch[channel].cap_info.rank;
 
 	for (i = 0; i < rank; i++) {
 		select_per_cs_training_index(chan, i);
@@ -778,7 +800,7 @@ static int data_training_rl(const struct chan_info *chan, u32 channel,
 {
 	u32 *denali_pi = chan->pi->denali_pi;
 	u32 i, tmp;
-	u32 rank = sdram_params->ch[channel].rank;
+	u32 rank = sdram_params->ch[channel].cap_info.rank;
 
 	for (i = 0; i < rank; i++) {
 		select_per_cs_training_index(chan, i);
@@ -819,7 +841,7 @@ static int data_training_wdql(const struct chan_info *chan, u32 channel,
 {
 	u32 *denali_pi = chan->pi->denali_pi;
 	u32 i, tmp;
-	u32 rank = sdram_params->ch[channel].rank;
+	u32 rank = sdram_params->ch[channel].cap_info.rank;
 
 	for (i = 0; i < rank; i++) {
 		select_per_cs_training_index(chan, i);
@@ -859,6 +881,7 @@ static int data_training(const struct chan_info *chan, u32 channel,
 			 u32 training_flag)
 {
 	u32 *denali_phy = chan->publ->denali_phy;
+	int ret = 0;
 
 	/* PHY_927 PHY_PAD_DQS_DRIVE  RPULL offset_22 */
 	setbits_le32(&denali_phy[927], (1 << 22));
@@ -879,29 +902,45 @@ static int data_training(const struct chan_info *chan, u32 channel,
 	}
 
 	/* ca training(LPDDR4,LPDDR3 support) */
-	if ((training_flag & PI_CA_TRAINING) == PI_CA_TRAINING)
-		data_training_ca(chan, channel, sdram_params);
+	if ((training_flag & PI_CA_TRAINING) == PI_CA_TRAINING) {
+		ret = data_training_ca(chan, channel, sdram_params);
+		if (ret != 0)
+			goto out;
+	}
 
 	/* write leveling(LPDDR4,LPDDR3,DDR3 support) */
-	if ((training_flag & PI_WRITE_LEVELING) == PI_WRITE_LEVELING)
-		data_training_wl(chan, channel, sdram_params);
+	if ((training_flag & PI_WRITE_LEVELING) == PI_WRITE_LEVELING) {
+		ret = data_training_wl(chan, channel, sdram_params);
+		if (ret != 0)
+			goto out;
+	}
 
 	/* read gate training(LPDDR4,LPDDR3,DDR3 support) */
-	if ((training_flag & PI_READ_GATE_TRAINING) == PI_READ_GATE_TRAINING)
-		data_training_rg(chan, channel, sdram_params);
+	if ((training_flag & PI_READ_GATE_TRAINING) == PI_READ_GATE_TRAINING) {
+		ret = data_training_rg(chan, channel, sdram_params);
+		if (ret != 0)
+			goto out;
+	}
 
 	/* read leveling(LPDDR4,LPDDR3,DDR3 support) */
-	if ((training_flag & PI_READ_LEVELING) == PI_READ_LEVELING)
-		data_training_rl(chan, channel, sdram_params);
+	if ((training_flag & PI_READ_LEVELING) == PI_READ_LEVELING) {
+		ret = data_training_rl(chan, channel, sdram_params);
+		if (ret != 0)
+			goto out;
+	}
 
 	/* wdq leveling(LPDDR4 support) */
-	if ((training_flag & PI_WDQ_LEVELING) == PI_WDQ_LEVELING)
-		data_training_wdql(chan, channel, sdram_params);
+	if ((training_flag & PI_WDQ_LEVELING) == PI_WDQ_LEVELING) {
+		ret = data_training_wdql(chan, channel, sdram_params);
+		if (ret != 0)
+			goto out;
+	}
 
 	/* PHY_927 PHY_PAD_DQS_DRIVE  RPULL offset_22 */
 	clrbits_le32(&denali_phy[927], (1 << 22));
 
-	return 0;
+out:
+	return ret;
 }
 
 static void set_ddrconfig(const struct chan_info *chan,
@@ -909,18 +948,18 @@ static void set_ddrconfig(const struct chan_info *chan,
 			  unsigned char channel, u32 ddrconfig)
 {
 	/* only need to set ddrconfig */
-	struct rk3399_msch_regs *ddr_msch_regs = chan->msch;
+	struct msch_regs *ddr_msch_regs = chan->msch;
 	unsigned int cs0_cap = 0;
 	unsigned int cs1_cap = 0;
 
-	cs0_cap = (1 << (sdram_params->ch[channel].cs0_row
-			+ sdram_params->ch[channel].col
-			+ sdram_params->ch[channel].bk
-			+ sdram_params->ch[channel].bw - 20));
-	if (sdram_params->ch[channel].rank > 1)
-		cs1_cap = cs0_cap >> (sdram_params->ch[channel].cs0_row
-				- sdram_params->ch[channel].cs1_row);
-	if (sdram_params->ch[channel].row_3_4) {
+	cs0_cap = (1 << (sdram_params->ch[channel].cap_info.cs0_row
+			+ sdram_params->ch[channel].cap_info.col
+			+ sdram_params->ch[channel].cap_info.bk
+			+ sdram_params->ch[channel].cap_info.bw - 20));
+	if (sdram_params->ch[channel].cap_info.rank > 1)
+		cs1_cap = cs0_cap >> (sdram_params->ch[channel].cap_info.cs0_row
+				- sdram_params->ch[channel].cap_info.cs1_row);
+	if (sdram_params->ch[channel].cap_info.row_3_4) {
 		cs0_cap = cs0_cap * 3 / 4;
 		cs1_cap = cs1_cap * 3 / 4;
 	}
@@ -931,55 +970,36 @@ static void set_ddrconfig(const struct chan_info *chan,
 }
 
 static void dram_all_config(struct dram_info *dram,
-			    const struct rk3399_sdram_params *sdram_params)
+			    struct rk3399_sdram_params *sdram_params)
 {
-	u32 sys_reg = 0;
+	u32 sys_reg2 = 0;
+	u32 sys_reg3 = 0;
 	unsigned int channel, idx;
 
-	sys_reg |= sdram_params->base.dramtype << SYS_REG_DDRTYPE_SHIFT;
-	sys_reg |= (sdram_params->base.num_channels - 1)
-		    << SYS_REG_NUM_CH_SHIFT;
 	for (channel = 0, idx = 0;
 	     (idx < sdram_params->base.num_channels) && (channel < 2);
 	     channel++) {
-		const struct rk3399_sdram_channel *info =
-			&sdram_params->ch[channel];
-		struct rk3399_msch_regs *ddr_msch_regs;
-		const struct rk3399_msch_timings *noc_timing;
+		struct msch_regs *ddr_msch_regs;
+		struct sdram_msch_timings *noc_timing;
 
-		if (sdram_params->ch[channel].col == 0)
+		if (sdram_params->ch[channel].cap_info.col == 0)
 			continue;
 		idx++;
-		sys_reg |= info->row_3_4 << SYS_REG_ROW_3_4_SHIFT(channel);
-		sys_reg |= 1 << SYS_REG_CHINFO_SHIFT(channel);
-		sys_reg |= (info->rank - 1) << SYS_REG_RANK_SHIFT(channel);
-		sys_reg |= (info->col - 9) << SYS_REG_COL_SHIFT(channel);
-		sys_reg |= info->bk == 3 ? 0 : 1 << SYS_REG_BK_SHIFT(channel);
-		sys_reg |= (info->cs0_row - 13) << SYS_REG_CS0_ROW_SHIFT(channel);
-		sys_reg |= (info->cs1_row - 13) << SYS_REG_CS1_ROW_SHIFT(channel);
-		sys_reg |= (2 >> info->bw) << SYS_REG_BW_SHIFT(channel);
-		sys_reg |= (2 >> info->dbw) << SYS_REG_DBW_SHIFT(channel);
-
+		sdram_org_config(&sdram_params->ch[channel].cap_info,
+				 &sdram_params->base, &sys_reg2,
+				 &sys_reg3, channel);
 		ddr_msch_regs = dram->chan[channel].msch;
 		noc_timing = &sdram_params->ch[channel].noc_timings;
-		writel(noc_timing->ddrtiminga0,
-		       &ddr_msch_regs->ddrtiminga0);
-		writel(noc_timing->ddrtimingb0,
-		       &ddr_msch_regs->ddrtimingb0);
-		writel(noc_timing->ddrtimingc0,
-		       &ddr_msch_regs->ddrtimingc0);
-		writel(noc_timing->devtodev0,
-		       &ddr_msch_regs->devtodev0);
-		writel(noc_timing->ddrmode,
-		       &ddr_msch_regs->ddrmode);
+		sdram_msch_config(ddr_msch_regs, noc_timing);
 
 		/* rank 1 memory clock disable (dfi_dram_clk_disable = 1) */
-		if (sdram_params->ch[channel].rank == 1)
+		if (sdram_params->ch[channel].cap_info.rank == 1)
 			setbits_le32(&dram->chan[channel].pctl->denali_ctl[276],
 				     1 << 17);
 	}
 
-	writel(sys_reg, &dram->pmugrf->os_reg2);
+	writel(sys_reg2, &dram->pmugrf->os_reg2);
+	writel(sys_reg3, &dram->pmugrf->os_reg3);
 	rk_clrsetreg(&dram->pmusgrf->soc_con4, 0x1f << 10,
 		     sdram_params->base.stride << 10);
 
@@ -991,7 +1011,7 @@ static void dram_all_config(struct dram_info *dram,
 }
 
 static int switch_to_phy_index1(struct dram_info *dram,
-				 const struct rk3399_sdram_params *sdram_params)
+				const struct rk3399_sdram_params *sdram_params)
 {
 	u32 channel;
 	u32 *denali_phy;
@@ -1025,7 +1045,7 @@ static int switch_to_phy_index1(struct dram_info *dram,
 		denali_phy = dram->chan[channel].publ->denali_phy;
 		clrsetbits_le32(&denali_phy[896], (0x3 << 8) | 1, 1 << 8);
 		ret = data_training(&dram->chan[channel], channel,
-				  sdram_params, PI_FULL_TRAINING);
+				    sdram_params, PI_FULL_TRAINING);
 		if (ret) {
 			debug("index1 training failed\n");
 			return ret;
@@ -1035,12 +1055,458 @@ static int switch_to_phy_index1(struct dram_info *dram,
 	return 0;
 }
 
+u16  ddr_cfg_2_rbc[] = {
+		/*
+		 * [6]	  highest bit col
+		 * [5:3]  max row(14+n)
+		 * [2]    insertion row
+		 * [1:0]  col(9+n),col, data bus 32bit
+		 *
+		 * highbitcol, max_row, insertion_row,  col
+		 */
+		((0 << 6) | (2 << 3) | (0 << 2) | 0), /* 0 */
+		((0 << 6) | (2 << 3) | (0 << 2) | 1), /* 1 */
+		((0 << 6) | (1 << 3) | (0 << 2) | 2), /* 2 */
+		((0 << 6) | (0 << 3) | (0 << 2) | 3), /* 3 */
+		((0 << 6) | (2 << 3) | (1 << 2) | 1), /* 4 */
+		((0 << 6) | (1 << 3) | (1 << 2) | 2), /* 5 */
+		((1 << 6) | (0 << 3) | (0 << 2) | 2), /* 6 */
+		((1 << 6) | (1 << 3) | (0 << 2) | 2), /* 7 */
+};
+
+unsigned int calculate_ddrconfig(struct rk3399_sdram_params *sdram_params,
+				 unsigned int channel)
+{
+	unsigned int i;
+	unsigned int cs0_row = sdram_params->ch[channel].cap_info.cs0_row;
+	unsigned int col = sdram_params->ch[channel].cap_info.col;
+	unsigned int bw = sdram_params->ch[channel].cap_info.bw;
+
+	col -= (bw == 2) ? 0 : 1;
+	col -= 9;
+
+	for (i = 0; i < 4; i++) {
+		if ((col == (ddr_cfg_2_rbc[i] & 0x3)) &&
+		    (cs0_row <= (((ddr_cfg_2_rbc[i] >> 3) & 0x7) + 14)))
+			break;
+	}
+
+	if (i >= 4)
+		i = -1;
+
+	return i;
+}
+
+unsigned char calculate_stride(struct rk3399_sdram_params *sdram_params)
+{
+	unsigned int gstride_type;
+	unsigned int channel;
+	unsigned int chinfo = 0;
+	unsigned int cap = 0;
+	unsigned int stride = -1;
+	unsigned int ch_cap[2] = {0, 0};
+
+	gstride_type = STRIDE_256B;
+
+	for (channel = 0; channel < 2; channel++) {
+		unsigned int cs0_cap = 0;
+		unsigned int cs1_cap = 0;
+		struct sdram_cap_info *cap_info =
+			&sdram_params->ch[channel].cap_info;
+
+		if (cap_info->col == 0)
+			continue;
+
+		cs0_cap = (1 << (cap_info->cs0_row + cap_info->col +
+				 cap_info->bk + cap_info->bw - 20));
+		if (cap_info->rank > 1)
+			cs1_cap = cs0_cap >> (cap_info->cs0_row
+					      - cap_info->cs1_row);
+		if (cap_info->row_3_4) {
+			cs0_cap = cs0_cap * 3 / 4;
+			cs1_cap = cs1_cap * 3 / 4;
+		}
+		ch_cap[channel] = cs0_cap + cs1_cap;
+		chinfo |= 1 << channel;
+	}
+
+	cap = ch_cap[0] + ch_cap[1];
+	if (sdram_params->base.num_channels == 1) {
+		if (chinfo & 1) /* channel a only */
+			stride = 0x17;
+		else /* channel b only */
+			stride = 0x18;
+	} else {/* 2 channel */
+		if (ch_cap[0] == ch_cap[1]) {
+			/* interleaved */
+			if (gstride_type == PART_STRIDE) {
+			/*
+			 * first 64MB no interleaved other 256B interleaved
+			 * if 786M+768M.useful space from 0-1280MB and
+			 * 1536MB-1792MB
+			 * if 1.5G+1.5G(continuous).useful space from 0-2560MB
+			 * and 3072MB-3584MB
+			 */
+				stride = 0x1F;
+			} else {
+				switch (cap) {
+				/* 512MB */
+				case 512:
+					stride = 0;
+					break;
+				/* 1GB unstride or 256B stride*/
+				case 1024:
+					stride = (gstride_type == UN_STRIDE) ?
+						0x1 : 0x5;
+					break;
+				/*
+				 * 768MB + 768MB same as total 2GB memory
+				 * useful space: 0-768MB 1GB-1792MB
+				 */
+				case 1536:
+				/* 2GB unstride or 256B or 512B stride */
+				case 2048:
+					stride = (gstride_type == UN_STRIDE) ?
+						0x2 :
+						((gstride_type == STRIDE_512B) ?
+						 0xA : 0x9);
+					break;
+				/* 1536MB + 1536MB */
+				case 3072:
+					stride = (gstride_type == UN_STRIDE) ?
+						0x3 :
+						((gstride_type == STRIDE_512B) ?
+						 0x12 : 0x11);
+					break;
+				/* 4GB  unstride or 128B,256B,512B,4KB stride */
+				case 4096:
+					stride = (gstride_type == UN_STRIDE) ?
+						0x3 : (0xC + gstride_type);
+					break;
+				}
+			}
+		}
+		if (ch_cap[0] == 2048 && ch_cap[1] == 1024) {
+			/* 2GB + 1GB */
+			stride = (gstride_type == UN_STRIDE) ? 0x3 : 0x19;
+		}
+		/*
+		 * remain two channel capability not equal OR capability
+		 * power function of 2
+		 */
+		if (stride == (-1)) {
+			switch ((ch_cap[0] > ch_cap[1]) ?
+				ch_cap[0] : ch_cap[1]) {
+			case 256: /* 256MB + 128MB */
+				stride = 0;
+				break;
+			case 512: /* 512MB + 256MB */
+				stride = 1;
+				break;
+			case 1024:/* 1GB + 128MB/256MB/384MB/512MB/768MB */
+				stride = 2;
+				break;
+			case 2048: /* 2GB + 128MB/256MB/384MB/512MB/768MB/1GB */
+				stride = 3;
+				break;
+			default:
+				break;
+			}
+		}
+		if (stride == (-1))
+			goto error;
+	}
+	switch (stride) {
+	case 0xc:
+		printf("128B stride\n");
+		break;
+	case 5:
+	case 9:
+	case 0xd:
+	case 0x11:
+	case 0x19:
+		printf("256B stride\n");
+		break;
+	case 0xa:
+	case 0xe:
+	case 0x12:
+		printf("512B stride\n");
+		break;
+	case 0xf:
+		printf("4K stride\n");
+		break;
+	case 0x1f:
+		printf("32MB + 256B stride\n");
+		break;
+	default:
+		printf("no stride\n");
+	}
+
+	return stride;
+error:
+	printf("Cap not support!\n");
+	return (-1);
+}
+
+static void set_ddr_stride(struct rk3399_pmusgrf_regs *pmusgrf, u32 stride)
+{
+	rk_clrsetreg(&pmusgrf->soc_con4, 0x1f << 10,
+		     stride << 10);
+}
+
+void set_cap_relate_config(const struct chan_info *chan,
+			   struct rk3399_sdram_params *sdram_params,
+			   unsigned int channel)
+{
+	u32 *denali_ctl = chan->pctl->denali_ctl;
+	u32 tmp;
+	struct sdram_msch_timings *noc_timing;
+
+	if (sdram_params->base.dramtype == LPDDR3) {
+		tmp = (8 << sdram_params->ch[channel].cap_info.bw) /
+			(8 << sdram_params->ch[channel].cap_info.dbw);
+		/* memdata_ratio
+		 * 1 -> 0, 2 -> 1, 4 -> 2
+		 */
+		clrsetbits_le32(&denali_ctl[197], 0x7,
+				(tmp >> 1));
+		clrsetbits_le32(&denali_ctl[198], 0x7 << 8,
+				(tmp >> 1) << 8);
+	}
+	noc_timing = &sdram_params->ch[channel].noc_timings;
+	/*
+	 * noc timing bw relate timing is 32 bit, and real bw is 16bit
+	 * actually noc reg is setting at function dram_all_config
+	 */
+	if (sdram_params->ch[channel].cap_info.bw == 16 &&
+	    noc_timing->ddrmode.b.mwrsize == 2) {
+		if (noc_timing->ddrmode.b.burstsize)
+			noc_timing->ddrmode.b.burstsize -= 1;
+		noc_timing->ddrmode.b.mwrsize -= 1;
+		noc_timing->ddrtimingc0.b.burstpenalty *= 2;
+		noc_timing->ddrtimingc0.b.wrtomwr *= 2;
+	}
+}
+
+void clear_channel_params(struct rk3399_sdram_params *sdram_params,
+			  unsigned int channel)
+{
+	sdram_params->ch[channel].cap_info.rank = 0;
+	sdram_params->ch[channel].cap_info.col = 0;
+	sdram_params->ch[channel].cap_info.bk = 0;
+	sdram_params->ch[channel].cap_info.bw = 32;
+	sdram_params->ch[channel].cap_info.dbw = 32;
+	sdram_params->ch[channel].cap_info.row_3_4 = 0;
+	sdram_params->ch[channel].cap_info.cs0_row = 0;
+	sdram_params->ch[channel].cap_info.cs1_row = 0;
+	sdram_params->ch[channel].cap_info.ddrconfig = 0;
+}
+
+/* CS0,n=1
+ * CS1,n=2
+ * CS0 & CS1, n=3
+ * cs0_cap: MB unit
+ */
+void dram_set_cs(const struct chan_info *chan, u32 cs_map, u32 cs0_cap,
+		 unsigned char dramtype)
+{
+	u32 *denali_ctl = chan->pctl->denali_ctl;
+	u32 *denali_pi = chan->pi->denali_pi;
+	struct msch_regs *ddr_msch_regs = chan->msch;
+
+	clrsetbits_le32(&denali_ctl[196], 0x3, cs_map);
+	writel((cs0_cap / 32) | (((4096 - cs0_cap) / 32) << 8),
+	       &ddr_msch_regs->ddrsize);
+	if (dramtype == LPDDR4) {
+		if (cs_map == 1)
+			cs_map = 0x5;
+		else if (cs_map == 2)
+			cs_map = 0xa;
+		else
+			cs_map = 0xF;
+	}
+	/*PI_41 PI_CS_MAP:RW:24:4*/
+	clrsetbits_le32(&denali_pi[41],
+			0xf << 24, cs_map << 24);
+	if (cs_map == 1 && dramtype == DDR3)
+		writel(0x2EC7FFFF, &denali_pi[34]);
+}
+
+void dram_set_bw(const struct chan_info *chan, u32 bw)
+{
+	u32 *denali_ctl = chan->pctl->denali_ctl;
+
+	if (bw == 2)
+		clrbits_le32(&denali_ctl[196], 1 << 16);
+	else
+		setbits_le32(&denali_ctl[196], 1 << 16);
+}
+
+void dram_set_max_col(const struct chan_info *chan, u32 bw, u32 *pcol)
+{
+	u32 *denali_ctl = chan->pctl->denali_ctl;
+	struct msch_regs *ddr_msch_regs = chan->msch;
+	u32 *denali_pi = chan->pi->denali_pi;
+	u32 ddrconfig;
+
+	clrbits_le32(&denali_ctl[191], 0xf);
+	clrsetbits_le32(&denali_ctl[190],
+			(7 << 24),
+			((16 - ((bw == 2) ? 14 : 15)) << 24));
+	/*PI_199 PI_COL_DIFF:RW:0:4*/
+	clrbits_le32(&denali_pi[199], 0xf);
+	/*PI_155 PI_ROW_DIFF:RW:24:3*/
+	clrsetbits_le32(&denali_pi[155],
+			(7 << 24),
+			((16 - 12) << 24));
+	ddrconfig = (bw == 2) ? 3 : 2;
+	writel(ddrconfig | (ddrconfig << 8), &ddr_msch_regs->ddrconf);
+	/* set max cs0 size */
+	writel((4096 / 32) | ((0 / 32) << 8),
+	       &ddr_msch_regs->ddrsize);
+
+	*pcol = 12;
+}
+
+void dram_set_max_bank(const struct chan_info *chan, u32 bw, u32 *pbank,
+		       u32 *pcol)
+{
+	u32 *denali_ctl = chan->pctl->denali_ctl;
+	u32 *denali_pi = chan->pi->denali_pi;
+
+	clrbits_le32(&denali_ctl[191], 0xf);
+	clrbits_le32(&denali_ctl[190], (3 << 16));
+	/*PI_199 PI_COL_DIFF:RW:0:4*/
+	clrbits_le32(&denali_pi[199], 0xf);
+	/*PI_155 PI_BANK_DIFF:RW:16:2*/
+	clrbits_le32(&denali_pi[155], (3 << 16));
+
+	*pbank = 3;
+	*pcol = 12;
+}
+
+void dram_set_max_row(const struct chan_info *chan, u32 bw, u32 *prow,
+		      u32 *pbank, u32 *pcol)
+{
+	u32 *denali_ctl = chan->pctl->denali_ctl;
+	u32 *denali_pi = chan->pi->denali_pi;
+	struct msch_regs *ddr_msch_regs = chan->msch;
+
+	clrsetbits_le32(&denali_ctl[191], 0xf, 12 - 10);
+	clrbits_le32(&denali_ctl[190],
+		     (0x3 << 16) | (0x7 << 24));
+	/*PI_199 PI_COL_DIFF:RW:0:4*/
+	clrsetbits_le32(&denali_pi[199], 0xf, 12 - 10);
+	/*PI_155 PI_ROW_DIFF:RW:24:3 PI_BANK_DIFF:RW:16:2*/
+	clrbits_le32(&denali_pi[155],
+		     (0x3 << 16) | (0x7 << 24));
+	writel(1 | (1 << 8), &ddr_msch_regs->ddrconf);
+	/* set max cs0 size */
+	writel((4096 / 32) | ((0 / 32) << 8),
+	       &ddr_msch_regs->ddrsize);
+
+	*prow = 16;
+	*pbank = 3;
+	*pcol = (bw == 2) ? 10 : 11;
+}
+
+static u64 dram_detect_cap(struct dram_info *dram,
+			   struct rk3399_sdram_params *sdram_params,
+			   unsigned char channel)
+{
+	const struct chan_info *chan = &dram->chan[channel];
+	struct sdram_cap_info *cap_info = &sdram_params->ch[channel].cap_info;
+	u32 bw;
+	u32 col_tmp;
+	u32 bk_tmp;
+	u32 row_tmp;
+	u32 cs0_cap;
+	u32 training_flag;
+	u32 ddrconfig;
+
+	/* detect bw */
+	bw = 2;
+	dram_set_bw(chan, bw);
+	cap_info->bw = bw;
+	if (data_training(chan, channel, sdram_params, PI_READ_GATE_TRAINING)) {
+		bw = 1;
+		dram_set_bw(chan, 1);
+		cap_info->bw = bw;
+		if (data_training(chan, channel, sdram_params,
+				  PI_READ_GATE_TRAINING)) {
+			printf("16bit error!!!\n");
+			goto error;
+		}
+	}
+
+	/*
+	 * LPDDR3 CA training msut be trigger before other training.
+	 * DDR3 is not have CA training.
+	 */
+	if (sdram_params->base.dramtype == LPDDR3)
+		training_flag = PI_WRITE_LEVELING;
+	else
+		training_flag = PI_FULL_TRAINING;
+
+	if (sdram_params->base.dramtype != LPDDR4) {
+		if (data_training(chan, channel, sdram_params, training_flag)) {
+			printf("full training error!!!\n");
+			goto error;
+		}
+	}
+
+	/* detect col */
+	dram_set_max_col(chan, bw, &col_tmp);
+	if (sdram_detect_col(cap_info, col_tmp) != 0)
+		goto error;
+
+	/* detect bank */
+	dram_set_max_bank(chan, bw, &bk_tmp, &col_tmp);
+	sdram_detect_bank(cap_info, col_tmp, bk_tmp);
+
+	/* detect row */
+	dram_set_max_row(chan, bw, &row_tmp, &bk_tmp, &col_tmp);
+	if (sdram_detect_row(cap_info, col_tmp, bk_tmp, row_tmp) != 0)
+		goto error;
+
+	/* detect row_3_4 */
+	sdram_detect_row_3_4(cap_info, col_tmp, bk_tmp);
+
+	/* set ddrconfig */
+	cs0_cap = (1 << (cap_info->cs0_row + cap_info->col + cap_info->bk +
+			 cap_info->bw - 20));
+	if (cap_info->row_3_4)
+		cs0_cap = cs0_cap * 3 / 4;
+
+	cap_info->cs1_row = cap_info->cs0_row;
+	set_memory_map(chan, channel, sdram_params);
+	ddrconfig = calculate_ddrconfig(sdram_params, channel);
+	if (-1 == ddrconfig)
+		goto error;
+	set_ddrconfig(chan, sdram_params, channel,
+		      cap_info->ddrconfig);
+
+	/* detect cs1 row */
+	sdram_detect_cs1_row(cap_info, sdram_params->base.dramtype);
+
+	/* detect die bw */
+	sdram_detect_dbw(cap_info, sdram_params->base.dramtype);
+
+	return 0;
+error:
+	return (-1);
+}
+
 static int sdram_init(struct dram_info *dram,
-		      const struct rk3399_sdram_params *sdram_params)
+		      struct rk3399_sdram_params *sdram_params)
 {
 	unsigned char dramtype = sdram_params->base.dramtype;
 	unsigned int ddr_freq = sdram_params->base.ddr_freq;
 	int channel;
+	u32 rank;
+	int ch;
+	u32 tmp;
+	u32 training_flag;
 
 	debug("Starting SDRAM initialization...\n");
 
@@ -1051,33 +1517,87 @@ static int sdram_init(struct dram_info *dram,
 		return -E2BIG;
 	}
 
+	/* detect rank */
+	for (ch = 0; ch < 2; ch++) {
+		sdram_params->ch[ch].cap_info.rank = 2;
+		for (rank = 2; rank != 0; rank--) {
+			for (channel = 0; channel < 2; channel++) {
+				const struct chan_info *chan =
+					&dram->chan[channel];
+				struct rk3399_cru *cru = dram->cru;
+				struct rk3399_ddr_publ_regs *publ = chan->publ;
+
+				phy_pctrl_reset(cru, channel);
+				phy_dll_bypass_set(publ, ddr_freq);
+				if (pctl_cfg(chan, channel, sdram_params) != 0)
+					printf("pctl_cfg fail\n");
+			}
+
+			/* LPDDR2/LPDDR3 need to wait DAI complete, max 10us */
+			if (dramtype == LPDDR3)
+				udelay(10);
+
+			tmp = (rank == 2) ? 3 : 1;
+			dram_set_cs(&dram->chan[ch], tmp, 2048,
+				    sdram_params->base.dramtype);
+			sdram_params->ch[ch].cap_info.rank = rank;
+			/*
+			 * LPDDR3 CA training msut be trigger before
+			 * other training.
+			 * DDR3 is not have CA training.
+			 * LPDDR4 need confirm here!
+			 */
+			if (sdram_params->base.dramtype == LPDDR3)
+				training_flag = PI_CA_TRAINING |
+						PI_READ_GATE_TRAINING;
+			else
+				training_flag = PI_READ_GATE_TRAINING;
+			if (!(data_training(&dram->chan[ch], ch, sdram_params,
+					    training_flag)))
+				break;
+		}
+		sdram_params->ch[ch].cap_info.rank = rank;
+	}
+
+	sdram_params->base.num_channels = 0;
 	for (channel = 0; channel < 2; channel++) {
 		const struct chan_info *chan = &dram->chan[channel];
-		struct rk3399_ddr_publ_regs *publ = chan->publ;
+		struct sdram_cap_info *cap_info =
+			&sdram_params->ch[channel].cap_info;
 
-		phy_dll_bypass_set(publ, ddr_freq);
-
-		if (channel >= sdram_params->base.num_channels)
+		if (cap_info->rank == 0) {
+			clear_channel_params(sdram_params, 1);
 			continue;
-
-		if (pctl_cfg(chan, channel, sdram_params) != 0) {
-			printf("pctl_cfg fail, reset\n");
-			return -EIO;
+		} else {
+			sdram_params->base.num_channels++;
 		}
 
-		/* LPDDR2/LPDDR3 need to wait DAI complete, max 10us */
-		if (dramtype == LPDDR3)
-			udelay(10);
+		printf("Channel ");
+		printf(channel ? "1: " : "0: ");
 
-		if (data_training(chan, channel,
-				  sdram_params, PI_FULL_TRAINING)) {
-			printf("SDRAM initialization failed, reset\n");
-			return -EIO;
+		if (channel == 0)
+			set_ddr_stride(dram->pmusgrf, 0x17);
+		else
+			set_ddr_stride(dram->pmusgrf, 0x18);
+
+		if (dram_detect_cap(dram, sdram_params, channel)) {
+			printf("Cap error!\n");
+			continue;
 		}
 
-		set_ddrconfig(chan, sdram_params, channel,
-			      sdram_params->ch[channel].ddrconfig);
+		sdram_print_ddr_info(cap_info, &sdram_params->base, 0);
+		set_memory_map(chan, channel, sdram_params);
+		cap_info->ddrconfig =
+			calculate_ddrconfig(sdram_params, channel);
+		if (-1 == cap_info->ddrconfig) {
+			printf("no ddrconfig find, Cap not support!\n");
+			continue;
+		}
+		set_ddrconfig(chan, sdram_params, channel, cap_info->ddrconfig);
+		set_cap_relate_config(chan, sdram_params, channel);
 	}
+
+	sdram_params->base.stride = calculate_stride(sdram_params);
 	dram_all_config(dram, sdram_params);
 	switch_to_phy_index1(dram, sdram_params);
 
@@ -1115,8 +1635,8 @@ static int conv_of_platdata(struct udevice *dev)
 	int ret;
 
 	ret = regmap_init_mem_platdata(dev, dtplat->reg,
-			ARRAY_SIZE(dtplat->reg) / 2,
-			&plat->map);
+				       ARRAY_SIZE(dtplat->reg) / 2,
+				       &plat->map);
 	if (ret)
 		return ret;
 
@@ -1225,7 +1745,6 @@ static struct ram_ops rk3399_dmc_ops = {
 	.get_info = rk3399_dmc_get_info,
 };
 
-
 static const struct udevice_id rk3399_dmc_ids[] = {
 	{ .compatible = "rockchip,rk3399-dmc" },
 	{ }

commit 55c5751eba871eec3045c5c1690074da3554b06e
Author: YouMin Chen <cym@rock-chips.com>
Date:   Mon Dec 24 21:18:19 2018 +0800

    driver: ram: rockchip: px30: dram init select common code
    
    Change-Id: I4f01c354355d61884f84bad160a54db927bb72cf
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_px30.h b/arch/arm/include/asm/arch-rockchip/sdram_px30.h
index 6b20b8eed4..dbed792f0d 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_px30.h
@@ -5,211 +5,13 @@
 
 #ifndef _ASM_ARCH_SDRAM_PX30_H
 #define _ASM_ARCH_SDRAM_PX30_H
+#include <asm/arch/sdram_share.h>
+#include <asm/arch/sdram_pctl_px30.h>
+#include <asm/arch/sdram_phy_px30.h>
+#include <asm/arch/sdram_phy_ron_rtt_px30.h>
 
 #define SR_IDLE				93
 #define PD_IDLE				13
-#define PATTERN				(0x5aa5f00f)
-
-/* ddr pctl registers define */
-#define DDR_PCTL2_MSTR			0x0
-#define DDR_PCTL2_STAT			0x4
-#define DDR_PCTL2_MSTR1			0x8
-#define DDR_PCTL2_MRCTRL0		0x10
-#define DDR_PCTL2_MRCTRL1		0x14
-#define DDR_PCTL2_MRSTAT		0x18
-#define DDR_PCTL2_MRCTRL2		0x1c
-#define DDR_PCTL2_DERATEEN		0x20
-#define DDR_PCTL2_DERATEINT		0x24
-#define DDR_PCTL2_PWRCTL		0x30
-#define DDR_PCTL2_PWRTMG		0x34
-#define DDR_PCTL2_HWLPCTL		0x38
-#define DDR_PCTL2_RFSHCTL0		0x50
-#define DDR_PCTL2_RFSHCTL1		0x54
-#define DDR_PCTL2_RFSHCTL2		0x58
-#define DDR_PCTL2_RFSHCTL4		0x5c
-#define DDR_PCTL2_RFSHCTL3		0x60
-#define DDR_PCTL2_RFSHTMG		0x64
-#define DDR_PCTL2_RFSHTMG1		0x68
-#define DDR_PCTL2_RFSHCTL5		0x6c
-#define DDR_PCTL2_INIT0			0xd0
-#define DDR_PCTL2_INIT1			0xd4
-#define DDR_PCTL2_INIT2			0xd8
-#define DDR_PCTL2_INIT3			0xdc
-#define DDR_PCTL2_INIT4			0xe0
-#define DDR_PCTL2_INIT5			0xe4
-#define DDR_PCTL2_INIT6			0xe8
-#define DDR_PCTL2_INIT7			0xec
-#define DDR_PCTL2_DIMMCTL		0xf0
-#define DDR_PCTL2_RANKCTL		0xf4
-#define DDR_PCTL2_CHCTL			0xfc
-#define DDR_PCTL2_DRAMTMG0		0x100
-#define DDR_PCTL2_DRAMTMG1		0x104
-#define DDR_PCTL2_DRAMTMG2		0x108
-#define DDR_PCTL2_DRAMTMG3		0x10c
-#define DDR_PCTL2_DRAMTMG4		0x110
-#define DDR_PCTL2_DRAMTMG5		0x114
-#define DDR_PCTL2_DRAMTMG6		0x118
-#define DDR_PCTL2_DRAMTMG7		0x11c
-#define DDR_PCTL2_DRAMTMG8		0x120
-#define DDR_PCTL2_DRAMTMG9		0x124
-#define DDR_PCTL2_DRAMTMG10		0x128
-#define DDR_PCTL2_DRAMTMG11		0x12c
-#define DDR_PCTL2_DRAMTMG12		0x130
-#define DDR_PCTL2_DRAMTMG13		0x134
-#define DDR_PCTL2_DRAMTMG14		0x138
-#define DDR_PCTL2_DRAMTMG15		0x13c
-#define DDR_PCTL2_DRAMTMG16		0x140
-#define DDR_PCTL2_ZQCTL0		0x180
-#define DDR_PCTL2_ZQCTL1		0x184
-#define DDR_PCTL2_ZQCTL2		0x188
-#define DDR_PCTL2_ZQSTAT		0x18c
-#define DDR_PCTL2_DFITMG0		0x190
-#define DDR_PCTL2_DFITMG1		0x194
-#define DDR_PCTL2_DFILPCFG0		0x198
-#define DDR_PCTL2_DFILPCFG1		0x19c
-#define DDR_PCTL2_DFIUPD0		0x1a0
-#define DDR_PCTL2_DFIUPD1		0x1a4
-#define DDR_PCTL2_DFIUPD2		0x1a8
-#define DDR_PCTL2_DFIMISC		0x1b0
-#define DDR_PCTL2_DFITMG2		0x1b4
-#define DDR_PCTL2_DFITMG3		0x1b8
-#define DDR_PCTL2_DFISTAT		0x1bc
-#define DDR_PCTL2_DBICTL		0x1c0
-#define DDR_PCTL2_ADDRMAP0		0x200
-#define DDR_PCTL2_ADDRMAP1		0x204
-#define DDR_PCTL2_ADDRMAP2		0x208
-#define DDR_PCTL2_ADDRMAP3		0x20c
-#define DDR_PCTL2_ADDRMAP4		0x210
-#define DDR_PCTL2_ADDRMAP5		0x214
-#define DDR_PCTL2_ADDRMAP6		0x218
-#define DDR_PCTL2_ADDRMAP7		0x21c
-#define DDR_PCTL2_ADDRMAP8		0x220
-#define DDR_PCTL2_ADDRMAP9		0x224
-#define DDR_PCTL2_ADDRMAP10		0x228
-#define DDR_PCTL2_ADDRMAP11		0x22c
-#define DDR_PCTL2_ODTCFG		0x240
-#define DDR_PCTL2_ODTMAP		0x244
-#define DDR_PCTL2_SCHED			0x250
-#define DDR_PCTL2_SCHED1		0x254
-#define DDR_PCTL2_PERFHPR1		0x25c
-#define DDR_PCTL2_PERFLPR1		0x264
-#define DDR_PCTL2_PERFWR1		0x26c
-#define DDR_PCTL2_DQMAP0		0x280
-#define DDR_PCTL2_DQMAP1		0x284
-#define DDR_PCTL2_DQMAP2		0x288
-#define DDR_PCTL2_DQMAP3		0x28c
-#define DDR_PCTL2_DQMAP4		0x290
-#define DDR_PCTL2_DQMAP5		0x294
-#define DDR_PCTL2_DBG0			0x300
-#define DDR_PCTL2_DBG1			0x304
-#define DDR_PCTL2_DBGCAM		0x308
-#define DDR_PCTL2_DBGCMD		0x30c
-#define DDR_PCTL2_DBGSTAT		0x310
-#define DDR_PCTL2_SWCTL			0x320
-#define DDR_PCTL2_SWSTAT		0x324
-#define DDR_PCTL2_POISONCFG		0x36c
-#define DDR_PCTL2_POISONSTAT		0x370
-#define DDR_PCTL2_ADVECCINDEX		0x374
-#define DDR_PCTL2_ADVECCSTAT		0x378
-#define DDR_PCTL2_PSTAT			0x3fc
-#define DDR_PCTL2_PCCFG			0x400
-#define DDR_PCTL2_PCFGR_n		0x404
-#define DDR_PCTL2_PCFGW_n		0x408
-#define DDR_PCTL2_PCTRL_n		0x490
-
-/* PCTL2_MRSTAT */
-#define MR_WR_BUSY			BIT(0)
-
-/* PHY_REG0 */
-#define DIGITAL_DERESET			BIT(3)
-#define ANALOG_DERESET			BIT(2)
-#define DIGITAL_RESET			(0 << 3)
-#define ANALOG_RESET			(0 << 2)
-
-/* PHY_REG1 */
-#define PHY_DDR2			(0)
-#define PHY_LPDDR2			(1)
-#define PHY_DDR3			(2)
-#define PHY_LPDDR3			(3)
-#define PHY_DDR4			(4)
-#define PHY_BL_4			(0 << 2)
-#define PHY_BL_8			BIT(2)
-
-/* PHY_REG2 */
-#define PHY_DTT_EN			BIT(0)
-#define PHY_DTT_DISB			(0 << 0)
-#define PHY_WRITE_LEVELING_EN		BIT(2)
-#define PHY_WRITE_LEVELING_DISB		(0 << 2)
-#define PHY_SELECT_CS0			(2)
-#define PHY_SELECT_CS1			(1)
-#define PHY_SELECT_CS0_1		(0)
-#define PHY_WRITE_LEVELING_SELECTCS(n)	((n) << 6)
-#define PHY_DATA_TRAINING_SELECTCS(n)	((n) << 4)
-
-#define PHY_DDR3_RON_RTT_DISABLE	(0)
-#define PHY_DDR3_RON_RTT_451ohm		(1)
-#define PHY_DDR3_RON_RTT_225ohm		(2)
-#define PHY_DDR3_RON_RTT_150ohm		(3)
-#define PHY_DDR3_RON_RTT_112ohm		(4)
-#define PHY_DDR3_RON_RTT_90ohm		(5)
-#define PHY_DDR3_RON_RTT_75ohm		(6)
-#define PHY_DDR3_RON_RTT_64ohm		(7)
-#define PHY_DDR3_RON_RTT_56ohm		(16)
-#define PHY_DDR3_RON_RTT_50ohm		(17)
-#define PHY_DDR3_RON_RTT_45ohm		(18)
-#define PHY_DDR3_RON_RTT_41ohm		(19)
-#define PHY_DDR3_RON_RTT_37ohm		(20)
-#define PHY_DDR3_RON_RTT_34ohm		(21)
-#define PHY_DDR3_RON_RTT_33ohm		(22)
-#define PHY_DDR3_RON_RTT_30ohm		(23)
-#define PHY_DDR3_RON_RTT_28ohm		(24)
-#define PHY_DDR3_RON_RTT_26ohm		(25)
-#define PHY_DDR3_RON_RTT_25ohm		(26)
-#define PHY_DDR3_RON_RTT_23ohm		(27)
-#define PHY_DDR3_RON_RTT_22ohm		(28)
-#define PHY_DDR3_RON_RTT_21ohm		(29)
-#define PHY_DDR3_RON_RTT_20ohm		(30)
-#define PHY_DDR3_RON_RTT_19ohm		(31)
-
-#define PHY_DDR4_LPDDR3_RON_RTT_DISABLE	(0)
-#define PHY_DDR4_LPDDR3_RON_RTT_480ohm	(1)
-#define PHY_DDR4_LPDDR3_RON_RTT_240ohm	(2)
-#define PHY_DDR4_LPDDR3_RON_RTT_160ohm	(3)
-#define PHY_DDR4_LPDDR3_RON_RTT_120ohm	(4)
-#define PHY_DDR4_LPDDR3_RON_RTT_96ohm	(5)
-#define PHY_DDR4_LPDDR3_RON_RTT_80ohm	(6)
-#define PHY_DDR4_LPDDR3_RON_RTT_68ohm	(7)
-#define PHY_DDR4_LPDDR3_RON_RTT_60ohm	(16)
-#define PHY_DDR4_LPDDR3_RON_RTT_53ohm	(17)
-#define PHY_DDR4_LPDDR3_RON_RTT_48ohm	(18)
-#define PHY_DDR4_LPDDR3_RON_RTT_43ohm	(19)
-#define PHY_DDR4_LPDDR3_RON_RTT_40ohm	(20)
-#define PHY_DDR4_LPDDR3_RON_RTT_37ohm	(21)
-#define PHY_DDR4_LPDDR3_RON_RTT_34ohm	(22)
-#define PHY_DDR4_LPDDR3_RON_RTT_32ohm	(23)
-#define PHY_DDR4_LPDDR3_RON_RTT_30ohm	(24)
-#define PHY_DDR4_LPDDR3_RON_RTT_28ohm	(25)
-#define PHY_DDR4_LPDDR3_RON_RTT_26ohm	(26)
-#define PHY_DDR4_LPDDR3_RON_RTT_25ohm	(27)
-#define PHY_DDR4_LPDDR3_RON_RTT_24ohm	(28)
-#define PHY_DDR4_LPDDR3_RON_RTT_22ohm	(29)
-#define PHY_DDR4_LPDDR3_RON_RTT_21ohm	(30)
-#define PHY_DDR4_LPDDR3_RON_RTT_20ohm	(31)
-
-/* noc registers define */
-#define DEVICECONF			0x8
-#define DEVICESIZE			0xc
-#define DDRTIMINGA0			0x10
-#define DDRTIMINGB0			0x14
-#define DDRTIMINGC0			0x18
-#define DEVTODEV0			0x1c
-#define DDRMODE				0x110
-#define DDR4TIMING			0x114
-#define AGINGX0				0x1000
-#define AGING0				0x1040
-#define AGING1				0x1044
-#define AGING2				0x1048
-#define AGING3				0x104c
 
 /* PMUGRF */
 #define PMUGRF_OS_REG0			(0x200)
@@ -234,75 +36,6 @@
 #define SPLIT_SIZE_MASK			(0xff)
 #define SPLIT_SIZE_OFFSET		(0)
 
-/*
- * sys_reg bitfield struct
- * [31]		row_3_4_ch1
- * [30]		row_3_4_ch0
- * [29:28]	chinfo
- * [27]		rank_ch1
- * [26:25]	col_ch1
- * [24]		bk_ch1
- * [23:22]	cs0_row_ch1
- * [21:20]	cs1_row_ch1
- * [19:18]	bw_ch1
- * [17:16]	dbw_ch1;
- * [15:13]	ddrtype
- * [12]		channelnum
- * [11]		rank_ch0
- * [10:9]	col_ch0
- * [8]		bk_ch0
- * [7:6]	cs0_row_ch0
- * [5:4]	cs1_row_ch0
- * [3:2]	bw_ch0
- * [1:0]	dbw_ch0
- */
-
-#define DDR_SYS_REG_VERSION		(0x2)
-#define SYS_REG_ENC_ROW_3_4(n)		((n) << 30)
-#define SYS_REG_DEC_ROW_3_4(n)		(((n) >> 30) & 0x1)
-#define SYS_REG_ENC_CHINFO()		(1 << 28)
-#define SYS_REG_ENC_DDRTYPE(n)		((n) << 13)
-#define SYS_REG_DEC_DDRTYPE(n)		(((n) >> 13) & 0x7)
-#define SYS_REG_ENC_NUM_CH(n)		(((n) - 1) << 12)
-#define SYS_REG_DEC_NUM_CH(n)		(1 + (((n) >> 12) & 0x1))
-#define SYS_REG_ENC_RANK(n)		(((n) - 1) << 11)
-#define SYS_REG_DEC_RANK(n)		(1 + (((n) >> 11) & 0x1))
-#define SYS_REG_ENC_COL(n)		(((n) - 9) << 9)
-#define SYS_REG_DEC_COL(n)		(9 + (((n) >> 9) & 0x3))
-#define SYS_REG_ENC_BK(n)		(((n) == 3 ? 0 : 1) << 8)
-#define SYS_REG_DEC_BK(n)		(3 - (((n) >> 8) & 0x1))
-#define SYS_REG_ENC_CS0_ROW(n)		(((n) - 13) << 6)
-#define SYS_REG_DEC_CS0_ROW(n)		(13 + (((n) >> 6) & 0x3))
-#define SYS_REG_ENC_BW(n)		((2 >> (n)) << 2)
-#define SYS_REG_DEC_BW(n)		(2 >> (((n) >> 2) & 0x3))
-#define SYS_REG_ENC_DBW(n)		((2 >> (n)) << 0)
-#define SYS_REG_DEC_DBW(n)		(2 >> (((n) >> 0) & 0x3))
-/* sys reg 3 */
-#define SYS_REG_ENC_VERSION(n)		((n) << 28)
-#define SYS_REG_DEC_VERSION(n)		(((n) >> 28) & 0xf)
-#define SYS_REG_ENC_CS0_ROW_(n, os_reg2, os_reg3) do {	\
-			(os_reg2) |= (((n) - 13) & 0x3) << 6;\
-			(os_reg3) |= ((((n) - 13) & 0x4) >> 2) << 5; \
-		} while (0)
-
-#define SYS_REG_DEC_CS0_ROW_(os_reg2, os_reg3)	\
-		((((((os_reg2) >> 6 & 0x3) | \
-		 ((((os_reg3) >> 5) & 0x1) << 2)) + 1) & 0x7) + 12)
-
-#define SYS_REG_ENC_CS1_ROW_(n, os_reg2, os_reg3) do {	\
-			(os_reg2) &= (~(0x3 << 4));\
-			(os_reg3) &= (~(0x1 << 4));\
-			(os_reg2) |= (((n) - 13) & 0x3) << 4;\
-			(os_reg3) |= ((((n) - 13) & 0x4) >> 2) << 4; \
-		} while (0)
-
-#define SYS_REG_DEC_CS1_ROW_(os_reg2, os_reg3)	\
-		((((((os_reg2) >> 4 & 0x3) | \
-		 ((((os_reg3) >> 4) & 0x1) << 2)) + 1) & 0x7) + 12)
-
-#define SYS_REG_ENC_CS1_COL(n)		(((n) - 9) << 0)
-#define SYS_REG_DEC_CS1_COL(n)		(9 + (((n) >> 0) & 0x3))
-
 /* CRU define */
 /* CRU_PLL_CON0 */
 #define PB(n)				((0x1 << (15 + 16)) | ((n) << 15))
@@ -424,113 +157,6 @@ u32 addrmap[][8] = {
 		0x06060606, 0x00000606, 0x3f3f}, /* 13 */
 };
 
-union noc_ddrtiminga0 {
-	u32 d32;
-	struct {
-		unsigned acttoact : 6;
-		unsigned reserved0 : 2;
-		unsigned rdtomiss : 6;
-		unsigned reserved1 : 2;
-		unsigned wrtomiss : 6;
-		unsigned reserved2 : 2;
-		unsigned readlatency : 8;
-	} b;
-};
-
-union noc_ddrtimingb0 {
-	u32 d32;
-	struct {
-		unsigned rdtowr : 5;
-		unsigned reserved0 : 3;
-		unsigned wrtord : 5;
-		unsigned reserved1 : 3;
-		unsigned rrd : 4;
-		unsigned reserved2 : 4;
-		unsigned faw : 6;
-		unsigned reserved3 : 2;
-	} b;
-};
-
-union noc_ddrtimingc0 {
-	u32 d32;
-	struct {
-		unsigned burstpenalty : 4;
-		unsigned reserved0 : 4;
-		unsigned wrtomwr : 6;
-		unsigned reserved1 : 18;
-	} b;
-};
-
-union noc_devtodev0 {
-	u32 d32;
-	struct {
-		unsigned busrdtord : 3;
-		unsigned reserved0 : 1;
-		unsigned busrdtowr : 3;
-		unsigned reserved1 : 1;
-		unsigned buswrtord : 3;
-		unsigned reserved2 : 1;
-		unsigned buswrtowr : 3;
-		unsigned reserved3 : 17;
-	} b;
-};
-
-union noc_ddrmode {
-	u32 d32;
-	struct {
-		unsigned autoprecharge : 1;
-		unsigned bypassfiltering : 1;
-		unsigned fawbank : 1;
-		unsigned burstsize : 2;
-		unsigned mwrsize : 2;
-		unsigned reserved2 : 1;
-		unsigned forceorder : 8;
-		unsigned forceorderstate : 8;
-		unsigned reserved3 : 8;
-	} b;
-};
-
-union noc_ddr4timing {
-	u32 d32;
-	struct {
-		unsigned ccdl : 3;
-		unsigned wrtordl : 5;
-		unsigned rrdl : 4;
-		unsigned reserved1 : 20;
-	} b;
-};
-
-struct px30_msch_timings {
-	union noc_ddrtiminga0 ddrtiminga0;
-	union noc_ddrtimingb0 ddrtimingb0;
-	union noc_ddrtimingc0 ddrtimingc0;
-	union noc_devtodev0 devtodev0;
-	union noc_ddrmode ddrmode;
-	union noc_ddr4timing ddr4timing;
-	u32 agingx0;
-};
-
-struct px30_msch_regs {
-	u32 coreid;
-	u32 revisionid;
-	u32 deviceconf;
-	u32 devicesize;
-	u32 ddrtiminga0;
-	u32 ddrtimingb0;
-	u32 ddrtimingc0;
-	u32 devtodev0;
-	u32 reserved1[(0x110 - 0x20) / 4];
-	u32 ddrmode;
-	u32 ddr4timing;
-	u32 reserved2[(0x1000 - 0x118) / 4];
-	u32 agingx0;
-	u32 reserved3[(0x1040 - 0x1004) / 4];
-	u32 aging0;
-	u32 aging1;
-	u32 aging2;
-	u32 aging3;
-};
-
 struct px30_ddr_grf_regs {
 	u32 ddr_grf_con[4];
 	u32 reserved1[(0x20 - 0x10) / 4];
@@ -539,54 +165,16 @@ struct px30_ddr_grf_regs {
 	u32 ddr_grf_status[11];
 };
 
-struct px30_ddr_pctl_regs {
-	u32 pctl[30][2];
-};
-
-struct px30_ddr_phy_regs {
-	u32 phy[5][2];
-};
-
-struct px30_ddr_skew {
-	u32 a0_a1_skew[15];
-	u32 cs0_dm0_skew[11];
-	u32 cs0_dm1_skew[11];
-	u32 cs0_dm2_skew[11];
-	u32 cs0_dm3_skew[11];
-	u32 cs1_dm0_skew[11];
-	u32 cs1_dm1_skew[11];
-	u32 cs1_dm2_skew[11];
-	u32 cs1_dm3_skew[11];
-};
-
 struct px30_sdram_channel {
-	unsigned char rank;
-	unsigned char col;
-	/* 3:8bank, 2:4bank */
-	unsigned char bk;
-	/* channel buswidth, 2:32bit, 1:16bit, 0:8bit */
-	unsigned char bw;
-	/* die buswidth, 2:32bit, 1:16bit, 0:8bit */
-	unsigned char dbw;
-	unsigned char row_3_4;
-	unsigned char cs0_row;
-	unsigned char cs1_row;
-	unsigned char cs0_high16bit_row;
-	unsigned char cs1_high16bit_row;
-	unsigned int ddrconfig;
-	struct px30_msch_timings noc_timings;
+	struct sdram_cap_info cap_info;
+	struct sdram_msch_timings noc_timings;
 };
 
 struct px30_sdram_params {
 	struct px30_sdram_channel ch;
-	unsigned int ddr_freq;
-	unsigned int dramtype;
-	unsigned int odt;
-	struct px30_ddr_pctl_regs pctl_regs;
-	struct px30_ddr_phy_regs phy_regs;
-	struct px30_ddr_skew *skew;
+	struct sdram_base_params base;
+	struct ddr_pctl_regs pctl_regs;
+	struct ddr_phy_regs phy_regs;
+	struct ddr_phy_skew *skew;
 };
-
-#define PHY_REG(base, n)		((base) + 4 * (n))
-
 #endif
diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 7fea0317d0..5b94dec8db 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -72,6 +72,10 @@ CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
+CONFIG_ROCKCHIP_SDRAM_COMMON=y
+CONFIG_SDRAM_COMMON_CAP_DETECT=y
+CONFIG_SDRAM_COMMON_OSREG=y
+CONFIG_SDRAM_COMMON_MSCH_PX30=y
 CONFIG_DM_RESET=y
 CONFIG_RKNAND=y
 CONFIG_BAUDRATE=1500000
diff --git a/configs/evb-rk3326_defconfig b/configs/evb-rk3326_defconfig
index a13a5e2889..e6e407fccf 100644
--- a/configs/evb-rk3326_defconfig
+++ b/configs/evb-rk3326_defconfig
@@ -71,6 +71,10 @@ CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
+CONFIG_ROCKCHIP_SDRAM_COMMON=y
+CONFIG_SDRAM_COMMON_CAP_DETECT=y
+CONFIG_SDRAM_COMMON_OSREG=y
+CONFIG_SDRAM_COMMON_MSCH_PX30=y
 CONFIG_DM_RESET=y
 CONFIG_RKNAND=y
 CONFIG_BAUDRATE=1500000
diff --git a/configs/rk3326_defconfig b/configs/rk3326_defconfig
index 0465f23cad..73b1b6d2c7 100644
--- a/configs/rk3326_defconfig
+++ b/configs/rk3326_defconfig
@@ -74,6 +74,10 @@ CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
+CONFIG_ROCKCHIP_SDRAM_COMMON=y
+CONFIG_SDRAM_COMMON_CAP_DETECT=y
+CONFIG_SDRAM_COMMON_OSREG=y
+CONFIG_SDRAM_COMMON_MSCH_PX30=y
 CONFIG_DM_RESET=y
 CONFIG_RKNAND=y
 CONFIG_BAUDRATE=1500000
diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index 818f340418..d0f74a4f9f 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -13,7 +13,7 @@ obj-$(CONFIG_ROCKCHIP_RK322X) = sdram_rk322x.o
 obj-$(CONFIG_ROCKCHIP_RK3288) = sdram_rk3288.o
 obj-$(CONFIG_ROCKCHIP_RK3328) = sdram_rk3328.o
 obj-$(CONFIG_ROCKCHIP_RK3399) = sdram_rk3399.o
-obj-$(CONFIG_ROCKCHIP_PX30) = sdram_px30.o
+obj-$(CONFIG_ROCKCHIP_PX30) += sdram_px30.o sdram_pctl_px30.o sdram_phy_px30.o
 obj-$(CONFIG_ROCKCHIP_PX30) += rockchip_sdram.o
 obj-$(CONFIG_ROCKCHIP_RK1808) = rockchip_sdram.o
 obj-$(CONFIG_ROCKCHIP_RK3036) = rockchip_sdram.o
diff --git a/drivers/ram/rockchip/sdram-px30-ddr3-detect-333.inc b/drivers/ram/rockchip/sdram-px30-ddr3-detect-333.inc
index 422364f462..76cd8dc1a5 100644
--- a/drivers/ram/rockchip/sdram-px30-ddr3-detect-333.inc
+++ b/drivers/ram/rockchip/sdram-px30-ddr3-detect-333.inc
@@ -1,16 +1,18 @@
 {
 	{
-		.rank = 0x1,
-		.col = 0xC,
-		.bk = 0x3,
-		.bw = 0x1,
-		.dbw = 0x0,
-		.row_3_4 = 0x0,
-		.cs0_row = 0x10,
-		.cs1_row = 0x10,
-		.cs0_high16bit_row = 0x10,
-		.cs1_high16bit_row = 0x10,
-		.ddrconfig = 0,
+		{
+			.rank = 0x1,
+			.col = 0xC,
+			.bk = 0x3,
+			.bw = 0x1,
+			.dbw = 0x0,
+			.row_3_4 = 0x0,
+			.cs0_row = 0x10,
+			.cs1_row = 0x10,
+			.cs0_high16bit_row = 0x10,
+			.cs1_high16bit_row = 0x10,
+			.ddrconfig = 0,
+		},
 		{
 			{0x290b0609},
 			{0x08020401},
@@ -21,9 +23,13 @@
 			0x000000ff
 		}
 	},
-	.ddr_freq = 333,
-	.dramtype = DDR3,
-	.odt = 0,
+	{
+		.ddr_freq = 333,
+		.dramtype = DDR3,
+		.num_channels = 1,
+		.stride = 0,
+		.odt = 0,
+	},
 	{
 		{
 			{0x00000000, 0x43041001},	/* MSTR */
diff --git a/drivers/ram/rockchip/sdram-px30-ddr4-detect-333.inc b/drivers/ram/rockchip/sdram-px30-ddr4-detect-333.inc
index 0d4152769a..f804d28393 100644
--- a/drivers/ram/rockchip/sdram-px30-ddr4-detect-333.inc
+++ b/drivers/ram/rockchip/sdram-px30-ddr4-detect-333.inc
@@ -1,16 +1,18 @@
 {
 	{
-		.rank = 0x1,
-		.col = 0xA,
-		.bk = 0x2,
-		.bw = 0x1,
-		.dbw = 0x0,
-		.row_3_4 = 0x0,
-		.cs0_row = 0x11,
-		.cs1_row = 0x0,
-		.cs0_high16bit_row = 0x11,
-		.cs1_high16bit_row = 0x0,
-		.ddrconfig = 0,
+		{
+			.rank = 0x1,
+			.col = 0xA,
+			.bk = 0x2,
+			.bw = 0x1,
+			.dbw = 0x0,
+			.row_3_4 = 0x0,
+			.cs0_row = 0x11,
+			.cs1_row = 0x0,
+			.cs0_high16bit_row = 0x11,
+			.cs1_high16bit_row = 0x0,
+			.ddrconfig = 0,
+		},
 		{
 			{0x4d110a08},
 			{0x06020501},
@@ -21,9 +23,13 @@
 			0x000000ff
 		}
 	},
-	.ddr_freq = 333,
-	.dramtype = DDR4,
-	.odt = 0,
+	{
+		.ddr_freq = 333,
+		.dramtype = DDR4,
+		.num_channels = 1,
+		.stride = 0,
+		.odt = 0,
+	},
 	{
 		{
 			{0x00000000, 0x43049010},	/* MSTR */
diff --git a/drivers/ram/rockchip/sdram-px30-lpddr2-detect-333.inc b/drivers/ram/rockchip/sdram-px30-lpddr2-detect-333.inc
index ec51ad42be..948ade483b 100644
--- a/drivers/ram/rockchip/sdram-px30-lpddr2-detect-333.inc
+++ b/drivers/ram/rockchip/sdram-px30-lpddr2-detect-333.inc
@@ -1,16 +1,18 @@
 {
 	{
-		.rank = 0x1,
-		.col = 0xC,
-		.bk = 0x3,
-		.bw = 0x1,
-		.dbw = 0x0,
-		.row_3_4 = 0x0,
-		.cs0_row = 0xF,
-		.cs1_row = 0xF,
-		.cs0_high16bit_row = 0xF,
-		.cs1_high16bit_row = 0xF,
-		.ddrconfig = 0,
+		{
+			.rank = 0x1,
+			.col = 0xC,
+			.bk = 0x3,
+			.bw = 0x1,
+			.dbw = 0x0,
+			.row_3_4 = 0x0,
+			.cs0_row = 0xF,
+			.cs1_row = 0xF,
+			.cs0_high16bit_row = 0xF,
+			.cs1_high16bit_row = 0xF,
+			.ddrconfig = 0,
+		},
 		{
 			{0x2b0c070a},
 			{0x08020303},
@@ -21,9 +23,13 @@
 			0x000000ff
 		}
 	},
-	.ddr_freq = 333,
-	.dramtype = LPDDR2,
-	.odt = 0,
+	{
+		.ddr_freq = 333,
+		.dramtype = LPDDR2,
+		.num_channels = 1,
+		.stride = 0,
+		.odt = 0,
+	},
 	{
 		{
 			{0x00000000, 0x41041004},	/* MSTR */
diff --git a/drivers/ram/rockchip/sdram-px30-lpddr3-detect-333.inc b/drivers/ram/rockchip/sdram-px30-lpddr3-detect-333.inc
index 606f6ddd94..f694a0e5b0 100644
--- a/drivers/ram/rockchip/sdram-px30-lpddr3-detect-333.inc
+++ b/drivers/ram/rockchip/sdram-px30-lpddr3-detect-333.inc
@@ -1,16 +1,18 @@
 {
 	{
-		.rank = 0x1,
-		.col = 0xC,
-		.bk = 0x3,
-		.bw = 0x1,
-		.dbw = 0x0,
-		.row_3_4 = 0x0,
-		.cs0_row = 0x10,
-		.cs1_row = 0x10,
-		.cs0_high16bit_row = 0x10,
-		.cs1_high16bit_row = 0x10,
-		.ddrconfig = 0,
+		{
+			.rank = 0x1,
+			.col = 0xC,
+			.bk = 0x3,
+			.bw = 0x1,
+			.dbw = 0x0,
+			.row_3_4 = 0x0,
+			.cs0_row = 0x10,
+			.cs1_row = 0x10,
+			.cs0_high16bit_row = 0x10,
+			.cs1_high16bit_row = 0x10,
+			.ddrconfig = 0,
+		},
 		{
 			{0x290a060a},
 			{0x08020303},
@@ -21,9 +23,13 @@
 			0x000000ff
 		}
 	},
-	.ddr_freq = 333,
-	.dramtype = LPDDR3,
-	.odt = 0,
+	{
+		.ddr_freq = 333,
+		.dramtype = LPDDR3,
+		.num_channels = 1,
+		.stride = 0,
+		.odt = 0,
+	},
 	{
 		{
 			{0x00000000, 0x43041008},	/* MSTR */
diff --git a/drivers/ram/rockchip/sdram_px30.c b/drivers/ram/rockchip/sdram_px30.c
index 1b78e67ae4..80d5f65f8d 100644
--- a/drivers/ram/rockchip/sdram_px30.c
+++ b/drivers/ram/rockchip/sdram_px30.c
@@ -30,10 +30,10 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 struct dram_info {
-	struct px30_ddr_pctl_regs *pctl;
-	struct px30_ddr_phy_regs *phy;
+	struct ddr_pctl_regs *pctl;
+	struct ddr_phy_regs *phy;
 	struct px30_cru *cru;
-	struct px30_msch_regs *msch;
+	struct msch_regs *msch;
 	struct px30_ddr_grf_regs *ddr_grf;
 	struct px30_grf *grf;
 	struct ram_info info;
@@ -54,7 +54,7 @@ struct px30_sdram_params sdram_configs[] = {
 #include	"sdram-px30-lpddr3-detect-333.inc"
 };
 
-struct px30_ddr_skew skew = {
+struct ddr_phy_skew skew = {
 #include	"sdram-px30-ddr_skew.inc"
 };
 
@@ -69,10 +69,11 @@ static void rkclk_ddr_reset(struct dram_info *dram,
 	       &dram->cru->softrst_con[2]);
 }
 
-static void rkclk_set_dpll(struct dram_info *dram, unsigned int mhz)
+static void rkclk_set_dpll(struct dram_info *dram, unsigned int hz)
 {
 	unsigned int refdiv, postdiv1, postdiv2, fbdiv;
 	int delay = 1000;
+	u32 mhz = hz / MHz;
 
 	refdiv = 1;
 	if (mhz <= 300) {
@@ -116,42 +117,7 @@ static void rkclk_configure_ddr(struct dram_info *dram,
 				struct px30_sdram_params *sdram_params)
 {
 	/* for inno ddr phy need 2*freq */
-	rkclk_set_dpll(dram,  sdram_params->ddr_freq * 2);
-}
-
-static void phy_soft_reset(struct dram_info *dram)
-{
-	void __iomem *phy_base = dram->phy;
-
-	clrbits_le32(PHY_REG(phy_base, 0), 0x3 << 2);
-	udelay(1);
-	setbits_le32(PHY_REG(phy_base, 0), ANALOG_DERESET);
-	udelay(5);
-	setbits_le32(PHY_REG(phy_base, 0), DIGITAL_DERESET);
-	udelay(1);
-}
-
-static int pctl_cfg(struct dram_info *dram,
-		    struct px30_sdram_params *sdram_params)
-{
-	u32 i;
-	void __iomem *pctl_base = dram->pctl;
-
-	for (i = 0; sdram_params->pctl_regs.pctl[i][0] != 0xFFFFFFFF; i++) {
-		writel(sdram_params->pctl_regs.pctl[i][1],
-		       pctl_base + sdram_params->pctl_regs.pctl[i][0]);
-	}
-	clrsetbits_le32(pctl_base + DDR_PCTL2_PWRTMG,
-			(0xff << 16) | 0x1f,
-			((SR_IDLE & 0xff) << 16) | (PD_IDLE & 0x1f));
-
-	clrsetbits_le32(pctl_base + DDR_PCTL2_HWLPCTL,
-			0xfff << 16,
-			5 << 16);
-	/* disable zqcs */
-	setbits_le32(pctl_base + DDR_PCTL2_ZQCTL0, 1u << 31);
-
-	return 0;
+	rkclk_set_dpll(dram,  sdram_params->base.ddr_freq * MHz * 2);
 }
 
 /* return ddrconfig value
@@ -161,16 +127,17 @@ static int pctl_cfg(struct dram_info *dram,
  */
 static unsigned int calculate_ddrconfig(struct px30_sdram_params *sdram_params)
 {
+	struct sdram_cap_info *cap_info = &sdram_params->ch.cap_info;
 	u32 bw, die_bw, col, bank;
 	u32 i, tmp;
 	u32 ddrconf = -1;
 
-	bw = sdram_params->ch.bw;
-	die_bw = sdram_params->ch.dbw;
-	col = sdram_params->ch.col;
-	bank = sdram_params->ch.bk;
+	bw = cap_info->bw;
+	die_bw = cap_info->dbw;
+	col = cap_info->col;
+	bank = cap_info->bk;
 
-	if (sdram_params->dramtype == DDR4) {
+	if (sdram_params->base.dramtype == DDR4) {
 		if (die_bw == 0)
 			ddrconf = 7 + bw;
 		else
@@ -190,18 +157,6 @@ static unsigned int calculate_ddrconfig(struct px30_sdram_params *sdram_params)
 	return ddrconf;
 }
 
-/* n: Unit bytes */
-static void copy_to_reg(u32 *dest, u32 *src, u32 n)
-{
-	int i;
-
-	for (i = 0; i < n / sizeof(u32); i++) {
-		writel(*src, dest);
-		src++;
-		dest++;
-	}
-}
-
 /*
  * calculate controller dram address map, and setting to register.
  * argument sdram_params->ch.ddrconf must be right value before
@@ -210,28 +165,29 @@ static void copy_to_reg(u32 *dest, u32 *src, u32 n)
 static void set_ctl_address_map(struct dram_info *dram,
 				struct px30_sdram_params *sdram_params)
 {
+	struct sdram_cap_info *cap_info = &sdram_params->ch.cap_info;
 	void __iomem *pctl_base = dram->pctl;
 	u32 cs_pst, bg, max_row, ddrconf;
 	u32 i;
 
-	if (sdram_params->dramtype == DDR4)
+	if (sdram_params->base.dramtype == DDR4)
 		/*
 		 * DDR4 8bit dram BG = 2(4bank groups),
 		 * 16bit dram BG = 1 (2 bank groups)
 		 */
-		bg = (sdram_params->ch.dbw == 0) ? 2 : 1;
+		bg = (cap_info->dbw == 0) ? 2 : 1;
 	else
 		bg = 0;
 
-	cs_pst = sdram_params->ch.bw + sdram_params->ch.col +
-		bg + sdram_params->ch.bk + sdram_params->ch.cs0_row;
-	if (cs_pst >= 32 || sdram_params->ch.rank == 1)
+	cs_pst = cap_info->bw + cap_info->col +
+		bg + cap_info->bk + cap_info->cs0_row;
+	if (cs_pst >= 32 || cap_info->rank == 1)
 		writel(0x1f, pctl_base + DDR_PCTL2_ADDRMAP0);
 	else
 		writel(cs_pst - 8, pctl_base + DDR_PCTL2_ADDRMAP0);
 
-	ddrconf = sdram_params->ch.ddrconfig;
-	if (sdram_params->dramtype == DDR4) {
+	ddrconf = cap_info->ddrconfig;
+	if (sdram_params->base.dramtype == DDR4) {
 		for (i = 0; i < ARRAY_SIZE(d4_rbc_2_d3_rbc); i++) {
 			if (d4_rbc_2_d3_rbc[i] == ddrconf) {
 				ddrconf = 7 + i;
@@ -240,8 +196,8 @@ static void set_ctl_address_map(struct dram_info *dram,
 		}
 	}
 
-	copy_to_reg((u32 *)(pctl_base + DDR_PCTL2_ADDRMAP1),
-		    &addrmap[ddrconf][0], 8 * 4);
+	sdram_copy_to_reg((u32 *)(pctl_base + DDR_PCTL2_ADDRMAP1),
+			  &addrmap[ddrconf][0], 8 * 4);
 	max_row = cs_pst - 1 - 8 - (addrmap[ddrconf][5] & 0xf);
 
 	if (max_row < 12)
@@ -253,184 +209,27 @@ static void set_ctl_address_map(struct dram_info *dram,
 			0xf << ((i - 12) * 8 % 32),
 			0xf << ((i - 12) * 8 % 32));
 
-	if ((sdram_params->dramtype == LPDDR3 ||
-	     sdram_params->dramtype == LPDDR2) &&
-		 sdram_params->ch.row_3_4)
+	if ((sdram_params->base.dramtype == LPDDR3 ||
+	     sdram_params->base.dramtype == LPDDR2) &&
+		 cap_info->row_3_4)
 		setbits_le32(pctl_base + DDR_PCTL2_ADDRMAP6, 1 << 31);
-	if (sdram_params->dramtype == DDR4 && sdram_params->ch.bw != 0x2)
+	if (sdram_params->base.dramtype == DDR4 && cap_info->bw != 0x2)
 		setbits_le32(pctl_base + DDR_PCTL2_PCCFG, 1 << 8);
 }
 
-static void phy_dll_bypass_set(struct dram_info *dram, u32 freq)
-{
-	void __iomem *phy_base = dram->phy;
-	u32 tmp;
-	u32 i, j;
-
-	setbits_le32(PHY_REG(phy_base, 0x13), 1 << 4);
-	clrbits_le32(PHY_REG(phy_base, 0x14), 1 << 3);
-	for (i = 0; i < 4; i++) {
-		j = 0x26 + i * 0x10;
-		setbits_le32(PHY_REG(phy_base, j), 1 << 4);
-		clrbits_le32(PHY_REG(phy_base, j + 0x1), 1 << 3);
-	}
-
-	if (freq <= (400 * MHz))
-		/* DLL bypass */
-		setbits_le32(PHY_REG(phy_base, 0xa4), 0x1f);
-	else
-		clrbits_le32(PHY_REG(phy_base, 0xa4), 0x1f);
-
-	if (freq <= (801 * MHz))
-		tmp = 2;
-	else
-		tmp = 1;
-
-	for (i = 0; i < 4; i++) {
-		j = 0x28 + i * 0x10;
-		writel(tmp, PHY_REG(phy_base, j));
-	}
-}
-
-static void set_ds_odt(struct dram_info *dram,
-		       struct px30_sdram_params *sdram_params)
-{
-	void __iomem *phy_base = dram->phy;
-	u32 cmd_drv, clk_drv, dqs_drv, dqs_odt;
-	u32 i, j;
-
-	if (sdram_params->dramtype == DDR3) {
-		cmd_drv = PHY_DDR3_RON_RTT_34ohm;
-		clk_drv = PHY_DDR3_RON_RTT_45ohm;
-		dqs_drv = PHY_DDR3_RON_RTT_34ohm;
-		dqs_odt = PHY_DDR3_RON_RTT_225ohm;
-	} else {
-		cmd_drv = PHY_DDR4_LPDDR3_RON_RTT_34ohm;
-		clk_drv = PHY_DDR4_LPDDR3_RON_RTT_43ohm;
-		dqs_drv = PHY_DDR4_LPDDR3_RON_RTT_34ohm;
-		if (sdram_params->dramtype == LPDDR2)
-			dqs_odt = PHY_DDR4_LPDDR3_RON_RTT_DISABLE;
-		else
-			dqs_odt = PHY_DDR4_LPDDR3_RON_RTT_240ohm;
-	}
-	/* DS */
-	writel(cmd_drv, PHY_REG(phy_base, 0x11));
-	clrsetbits_le32(PHY_REG(phy_base, 0x12), 0x1f << 3, cmd_drv << 3);
-	writel(clk_drv, PHY_REG(phy_base, 0x16));
-	writel(clk_drv, PHY_REG(phy_base, 0x18));
-
-	for (i = 0; i < 4; i++) {
-		j = 0x20 + i * 0x10;
-		writel(dqs_drv, PHY_REG(phy_base, j));
-		writel(dqs_drv, PHY_REG(phy_base, j + 0xf));
-		/* ODT */
-		writel(dqs_odt, PHY_REG(phy_base, j + 0x1));
-		writel(dqs_odt, PHY_REG(phy_base, j + 0xe));
-	}
-}
-
-static void phy_cfg(struct dram_info *dram,
-		    struct px30_sdram_params *sdram_params)
-{
-	void __iomem *phy_base = dram->phy;
-	u32 i;
-
-	phy_dll_bypass_set(dram, sdram_params->ddr_freq);
-	for (i = 0; sdram_params->phy_regs.phy[i][0] != 0xFFFFFFFF; i++) {
-		writel(sdram_params->phy_regs.phy[i][1],
-		       phy_base + sdram_params->phy_regs.phy[i][0]);
-	}
-	if (sdram_params->ch.bw == 2) {
-		clrsetbits_le32(PHY_REG(phy_base, 0), 0xf << 4, 0xf << 4);
-	} else if (sdram_params->ch.bw == 1) {
-		clrsetbits_le32(PHY_REG(phy_base, 0), 0xf << 4, 3 << 4);
-		/* disable DQS2,DQS3 tx dll  for saving power */
-		clrbits_le32(PHY_REG(phy_base, 0x46), 1 << 3);
-		clrbits_le32(PHY_REG(phy_base, 0x56), 1 << 3);
-	} else {
-		clrsetbits_le32(PHY_REG(phy_base, 0), 0xf << 4, 1 << 4);
-		/* disable DQS2,DQS3 tx dll  for saving power */
-		clrbits_le32(PHY_REG(phy_base, 0x36), 1 << 3);
-		clrbits_le32(PHY_REG(phy_base, 0x46), 1 << 3);
-		clrbits_le32(PHY_REG(phy_base, 0x56), 1 << 3);
-	}
-	set_ds_odt(dram, sdram_params);
-
-	/* deskew */
-	setbits_le32(PHY_REG(phy_base, 2), 8);
-	copy_to_reg(PHY_REG(phy_base, 0xb0),
-		    &sdram_params->skew->a0_a1_skew[0], 15 * 4);
-	copy_to_reg(PHY_REG(phy_base, 0x70),
-		    &sdram_params->skew->cs0_dm0_skew[0], 44 * 4);
-	copy_to_reg(PHY_REG(phy_base, 0xc0),
-		    &sdram_params->skew->cs1_dm0_skew[0], 44 * 4);
-}
-
-static int update_refresh_reg(struct dram_info *dram)
-{
-	void __iomem *pctl_base = dram->pctl;
-	u32 ret;
-
-	ret = readl(pctl_base + DDR_PCTL2_RFSHCTL3) ^ (1 << 1);
-	writel(ret, pctl_base + DDR_PCTL2_RFSHCTL3);
-
-	return 0;
-}
-
 /*
  * rank = 1: cs0
  * rank = 2: cs1
  */
 int read_mr(struct dram_info *dram, u32 rank, u32 mr_num)
 {
-	void __iomem *pctl_base = dram->pctl;
 	void __iomem *ddr_grf_base = dram->ddr_grf;
 
-	writel((rank << 4) | (1 << 0), pctl_base + DDR_PCTL2_MRCTRL0);
-	writel((mr_num << 8), pctl_base + DDR_PCTL2_MRCTRL1);
-	setbits_le32(pctl_base + DDR_PCTL2_MRCTRL0, 1u << 31);
-	while (readl(pctl_base + DDR_PCTL2_MRCTRL0) & (1u << 31))
-		continue;
-	while (readl(pctl_base + DDR_PCTL2_MRSTAT) & MR_WR_BUSY)
-		continue;
+	pctl_read_mr(dram->pctl, rank, mr_num);
 
 	return (readl(ddr_grf_base + DDR_GRF_STATUS(0)) & 0xff);
 }
 
-u32 disable_zqcs_arefresh(struct dram_info *dram)
-{
-	void __iomem *pctl_base = dram->pctl;
-	u32 dis_auto_zq = 0;
-
-	/* disable zqcs */
-	if (!(readl(pctl_base + DDR_PCTL2_ZQCTL0) &
-		(1ul << 31))) {
-		dis_auto_zq = 1;
-		setbits_le32(pctl_base + DDR_PCTL2_ZQCTL0, 1 << 31);
-	}
-
-	/* disable auto refresh */
-	setbits_le32(pctl_base + DDR_PCTL2_RFSHCTL3, 1);
-
-	update_refresh_reg(dram);
-
-	return dis_auto_zq;
-}
-
-void restore_zqcs_arefresh(struct dram_info *dram, u32 dis_auto_zq)
-{
-	void __iomem *pctl_base = dram->pctl;
-
-	/* restore zqcs */
-	if (dis_auto_zq)
-		clrbits_le32(pctl_base + DDR_PCTL2_ZQCTL0, 1 << 31);
-
-	/* restore auto refresh */
-	clrbits_le32(pctl_base + DDR_PCTL2_RFSHCTL3, 1);
-
-	update_refresh_reg(dram);
-}
-
 #define MIN(a, b)	(((a) > (b)) ? (b) : (a))
 #define MAX(a, b)	(((a) > (b)) ? (a) : (b))
 static u32 check_rd_gate(struct dram_info *dram)
@@ -469,170 +268,31 @@ static u32 check_rd_gate(struct dram_info *dram)
 }
 
 static int data_training(struct dram_info *dram, u32 cs, u32 dramtype)
-{
-	void __iomem *phy_base = dram->phy;
-	u32 ret;
-	u32 dis_auto_zq = 0;
-	u32 odt_val;
-	u32 i, j;
-
-	odt_val = readl(PHY_REG(phy_base, 0x2e));
-
-	for (i = 0; i < 4; i++) {
-		j = 0x20 + i * 0x10;
-		writel(PHY_DDR3_RON_RTT_225ohm, PHY_REG(phy_base, j + 0x1));
-		writel(0, PHY_REG(phy_base, j + 0xe));
-	}
-
-	dis_auto_zq = disable_zqcs_arefresh(dram);
-
-	if (dramtype == DDR4) {
-		clrsetbits_le32(PHY_REG(phy_base, 0x29), 0x3, 0);
-		clrsetbits_le32(PHY_REG(phy_base, 0x39), 0x3, 0);
-		clrsetbits_le32(PHY_REG(phy_base, 0x49), 0x3, 0);
-		clrsetbits_le32(PHY_REG(phy_base, 0x59), 0x3, 0);
-	}
-	/* choose training cs */
-	clrsetbits_le32(PHY_REG(phy_base, 2), 0x33, (0x20 >> cs));
-	/* enable gate training */
-	clrsetbits_le32(PHY_REG(phy_base, 2), 0x33, (0x20 >> cs) | 1);
-	udelay(50);
-	ret = readl(PHY_REG(phy_base, 0xff));
-	/* disable gate training */
-	clrsetbits_le32(PHY_REG(phy_base, 2), 0x33, (0x20 >> cs) | 0);
-	clrbits_le32(PHY_REG(phy_base, 2), 0x30);
-	restore_zqcs_arefresh(dram, dis_auto_zq);
-
-	if (dramtype == DDR4) {
-		clrsetbits_le32(PHY_REG(phy_base, 0x29), 0x3, 0x2);
-		clrsetbits_le32(PHY_REG(phy_base, 0x39), 0x3, 0x2);
-		clrsetbits_le32(PHY_REG(phy_base, 0x49), 0x3, 0x2);
-		clrsetbits_le32(PHY_REG(phy_base, 0x59), 0x3, 0x2);
-	}
-
-	if (ret & 0x10) {
-		ret = -1;
-	} else {
-		ret = (ret & 0xf) ^ (readl(PHY_REG(phy_base, 0)) >> 4);
-		ret = (ret == 0) ? 0 : -1;
-	}
-
-	for (i = 0; i < 4; i++) {
-		j = 0x20 + i * 0x10;
-		writel(odt_val, PHY_REG(phy_base, j + 0x1));
-		writel(odt_val, PHY_REG(phy_base, j + 0xe));
-	}
-
-	return ret;
-}
-
-/* rank = 1: cs0
- * rank = 2: cs1
- * rank = 3: cs0 & cs1
- * note: be careful of keep mr original val
- */
-static int write_mr(struct dram_info *dram, u32 rank, u32 mr_num, u32 arg,
-		    u32 dramtype)
-{
-	void __iomem *pctl_base = dram->pctl;
-
-	while (readl(pctl_base + DDR_PCTL2_MRSTAT) & MR_WR_BUSY)
-		continue;
-	if (dramtype == DDR3 || dramtype == DDR4) {
-		writel((mr_num << 12) | (rank << 4) | (0 << 0),
-		       pctl_base + DDR_PCTL2_MRCTRL0);
-		writel(arg, pctl_base + DDR_PCTL2_MRCTRL1);
-	} else {
-		writel((rank << 4) | (0 << 0),
-		       pctl_base + DDR_PCTL2_MRCTRL0);
-		writel((mr_num << 8) | (arg & 0xff),
-		       pctl_base + DDR_PCTL2_MRCTRL1);
-	}
-
-	setbits_le32(pctl_base + DDR_PCTL2_MRCTRL0, 1u << 31);
-	while (readl(pctl_base + DDR_PCTL2_MRCTRL0) & (1u << 31))
-		continue;
-	while (readl(pctl_base + DDR_PCTL2_MRSTAT) & MR_WR_BUSY)
-		continue;
-
-	return 0;
-}
-
-/*
- * rank : 1:cs0, 2:cs1, 3:cs0&cs1
- * vrefrate: 4500: 45%,
- */
-static int write_vrefdq(struct dram_info *dram, u32 rank, u32 vrefrate,
-			u32 dramtype)
 {
 	void __iomem *pctl_base = dram->pctl;
-	u32 tccd_l, value;
 	u32 dis_auto_zq = 0;
+	u32 pwrctl;
+	u32 ret;
 
-	if (dramtype != DDR4 || vrefrate < 4500 ||
-	    vrefrate > 9200)
-		return (-1);
-
-	tccd_l = (readl(pctl_base + DDR_PCTL2_DRAMTMG4) >> 16) & 0xf;
-	tccd_l = (tccd_l - 4) << 10;
+	/* disable auto low-power */
+	pwrctl = readl(pctl_base + DDR_PCTL2_PWRCTL);
+	writel(0, pctl_base + DDR_PCTL2_PWRCTL);
 
-	if (vrefrate > 7500) {
-		/* range 1 */
-		value = ((vrefrate - 6000) / 65) | tccd_l;
-	} else {
-		/* range 2 */
-		value = ((vrefrate - 4500) / 65) | tccd_l | (1 << 6);
-	}
+	dis_auto_zq = pctl_dis_zqcs_aref(dram->pctl);
 
-	dis_auto_zq = disable_zqcs_arefresh(dram);
+	ret = phy_data_training(dram->phy, cs, dramtype);
 
-	/* enable vrefdq calibratin */
-	write_mr(dram, rank, 6, value | (1 << 7), dramtype);
-	udelay(1);/* tvrefdqe */
-	/* write vrefdq value */
-	write_mr(dram, rank, 6, value | (1 << 7), dramtype);
-	udelay(1);/* tvref_time */
-	write_mr(dram, rank, 6, value | (0 << 7), dramtype);
-	udelay(1);/* tvrefdqx */
+	pctl_rest_zqcs_aref(dram->pctl, dis_auto_zq);
 
-	restore_zqcs_arefresh(dram, dis_auto_zq);
+	/* restore auto low-power */
+	writel(pwrctl, pctl_base + DDR_PCTL2_PWRCTL);
 
-	return 0;
+	return ret;
 }
 
-/*
- * cs: 0:cs0
- *	   1:cs1
- *     else cs0+cs1
- * note: it didn't consider about row_3_4
- */
-u64 get_cs_cap(struct px30_sdram_params *sdram_params, u32 cs)
+static void dram_set_bw(struct dram_info *dram, u32 bw)
 {
-	u32 bg;
-	u64 cap[2];
-
-	if (sdram_params->dramtype == DDR4)
-		/* DDR4 8bit dram BG = 2(4bank groups),
-		 * 16bit dram BG = 1 (2 bank groups)
-		 */
-		bg = (sdram_params->ch.dbw == 0) ? 2 : 1;
-	else
-		bg = 0;
-	cap[0] = 1llu << (sdram_params->ch.bw + sdram_params->ch.col +
-		bg + sdram_params->ch.bk + sdram_params->ch.cs0_row);
-
-	if (sdram_params->ch.rank == 2)
-		cap[1] = 1llu << (sdram_params->ch.bw + sdram_params->ch.col +
-			bg + sdram_params->ch.bk + sdram_params->ch.cs1_row);
-	else
-		cap[1] = 0;
-
-	if (cs == 0)
-		return cap[0];
-	else if (cs == 1)
-		return cap[1];
-	else
-		return (cap[0] + cap[1]);
+	phy_dram_set_bw(dram->phy, bw);
 }
 
 static void set_ddrconfig(struct dram_info *dram, u32 ddrconfig)
@@ -644,52 +304,17 @@ static void set_ddrconfig(struct dram_info *dram, u32 ddrconfig)
 static void dram_all_config(struct dram_info *dram,
 			    struct px30_sdram_params *sdram_params)
 {
-	u32 sys_reg = 0;
+	struct sdram_cap_info *cap_info = &sdram_params->ch.cap_info;
+	u32 sys_reg2 = 0;
 	u32 sys_reg3 = 0;
-	u64 cs_cap[2];
-
-	set_ddrconfig(dram, sdram_params->ch.ddrconfig);
-
-	sys_reg |= SYS_REG_ENC_DDRTYPE(sdram_params->dramtype);
-	sys_reg |= SYS_REG_ENC_ROW_3_4(sdram_params->ch.row_3_4);
-	sys_reg |= SYS_REG_ENC_RANK(sdram_params->ch.rank);
-	sys_reg |= SYS_REG_ENC_COL(sdram_params->ch.col);
-	sys_reg |= SYS_REG_ENC_BK(sdram_params->ch.bk);
-	sys_reg |= SYS_REG_ENC_BW(sdram_params->ch.bw);
-	sys_reg |= SYS_REG_ENC_DBW(sdram_params->ch.dbw);
 
-	SYS_REG_ENC_CS0_ROW_(sdram_params->ch.cs0_row, sys_reg, sys_reg3);
-	if (sdram_params->ch.cs1_row)
-		SYS_REG_ENC_CS1_ROW_(sdram_params->ch.cs1_row, sys_reg,
-				     sys_reg3);
-	sys_reg3 |= SYS_REG_ENC_CS1_COL(sdram_params->ch.col);
-	sys_reg3 |= SYS_REG_ENC_VERSION(DDR_SYS_REG_VERSION);
-
-	writel(sys_reg, &dram->pmugrf->os_reg[2]);
+	set_ddrconfig(dram, cap_info->ddrconfig);
+	sdram_org_config(cap_info, &sdram_params->base, &sys_reg2,
+			 &sys_reg3, 0);
+	writel(sys_reg2, &dram->pmugrf->os_reg[2]);
 	writel(sys_reg3, &dram->pmugrf->os_reg[3]);
-
-	cs_cap[0] = get_cs_cap(sdram_params, 0);
-	cs_cap[1] = get_cs_cap(sdram_params, 1);
-	writel(((((cs_cap[1] >> 20) / 64) & 0xff) << 8) |
-			(((cs_cap[0] >> 20) / 64) & 0xff),
-			&dram->msch->devicesize);
-
-	writel(sdram_params->ch.noc_timings.ddrtiminga0.d32,
-	       &dram->msch->ddrtiminga0);
-	writel(sdram_params->ch.noc_timings.ddrtimingb0.d32,
-	       &dram->msch->ddrtimingb0);
-	writel(sdram_params->ch.noc_timings.ddrtimingc0.d32,
-	       &dram->msch->ddrtimingc0);
-	writel(sdram_params->ch.noc_timings.devtodev0.d32,
-	       &dram->msch->devtodev0);
-	writel(sdram_params->ch.noc_timings.ddrmode.d32, &dram->msch->ddrmode);
-	writel(sdram_params->ch.noc_timings.ddr4timing.d32,
-	       &dram->msch->ddr4timing);
-	writel(sdram_params->ch.noc_timings.agingx0, &dram->msch->agingx0);
-	writel(sdram_params->ch.noc_timings.agingx0, &dram->msch->aging0);
-	writel(sdram_params->ch.noc_timings.agingx0, &dram->msch->aging1);
-	writel(sdram_params->ch.noc_timings.agingx0, &dram->msch->aging2);
-	writel(sdram_params->ch.noc_timings.agingx0, &dram->msch->aging3);
+	sdram_msch_config(dram->msch, &sdram_params->ch.noc_timings, cap_info,
+			  &sdram_params->base);
 }
 
 static void enable_low_power(struct dram_info *dram,
@@ -711,9 +336,9 @@ static void enable_low_power(struct dram_info *dram,
 	 */
 	writel(0x1f1f0617, &dram->ddr_grf->ddr_grf_con[1]);
 
-	if (sdram_params->dramtype == DDR4)
+	if (sdram_params->base.dramtype == DDR4)
 		grf_lp_con = (0x7 << 16) | (1 << 1);
-	else if (sdram_params->dramtype == DDR3)
+	else if (sdram_params->base.dramtype == DDR3)
 		grf_lp_con = (0x7 << 16) | (1 << 0);
 	else
 		grf_lp_con = (0x7 << 16) | (1 << 2);
@@ -737,76 +362,6 @@ static void enable_low_power(struct dram_info *dram,
 	setbits_le32(pctl_base + DDR_PCTL2_PWRCTL, (1 << 3));
 }
 
-static void print_ddr_info(struct px30_sdram_params *sdram_params)
-{
-	u64 cap;
-	u32 bg;
-	u32 split;
-
-	split = readl(DDR_GRF_BASE_ADDR + DDR_GRF_SPLIT_CON);
-	bg = (sdram_params->ch.dbw == 0) ? 2 : 1;
-	switch (sdram_params->dramtype) {
-	case LPDDR3:
-		printascii("LPDDR3\n");
-		break;
-	case DDR3:
-		printascii("DDR3\n");
-		break;
-	case DDR4:
-		printascii("DDR4\n");
-		break;
-	case LPDDR2:
-		printascii("LPDDR2\n");
-		break;
-	default:
-		printascii("Unknown Device\n");
-		break;
-	}
-
-	printdec(sdram_params->ddr_freq);
-	printascii("MHz\n");
-	printascii("BW=");
-	printdec(8 << sdram_params->ch.bw);
-	printascii(" Col=");
-	printdec(sdram_params->ch.col);
-	printascii(" Bk=");
-	printdec(0x1 << sdram_params->ch.bk);
-	if (sdram_params->dramtype == DDR4) {
-		printascii(" BG=");
-		printdec(1 << bg);
-	}
-	printascii(" CS0 Row=");
-	printdec(sdram_params->ch.cs0_row);
-	if (sdram_params->ch.cs0_high16bit_row !=
-		sdram_params->ch.cs0_row) {
-		printascii("/");
-		printdec(sdram_params->ch.cs0_high16bit_row);
-	}
-	if (sdram_params->ch.rank > 1) {
-		printascii(" CS1 Row=");
-		printdec(sdram_params->ch.cs1_row);
-		if (sdram_params->ch.cs1_high16bit_row !=
-			sdram_params->ch.cs1_row) {
-			printascii("/");
-			printdec(sdram_params->ch.cs1_high16bit_row);
-		}
-	}
-	printascii(" CS=");
-	printdec(sdram_params->ch.rank);
-	printascii(" Die BW=");
-	printdec(8 << sdram_params->ch.dbw);
-
-	cap = get_cs_cap(sdram_params, 3);
-	if (sdram_params->ch.row_3_4)
-		cap = cap * 3 / 4;
-	else if (!(split & (1 << SPLIT_BYPASS_OFFSET)))
-		cap = cap / 2 + ((split & 0xff) << 24) / 2;
-
-	printascii(" Size=");
-	printdec(cap >> 20);
-	printascii("MB\n");
-}
-
 /*
  * pre_init: 0: pre init for dram cap detect
  * 1: detect correct cap(except cs1 row)info, than reinit
@@ -817,6 +372,7 @@ static void print_ddr_info(struct px30_sdram_params *sdram_params)
 static int sdram_init_(struct dram_info *dram,
 		       struct px30_sdram_params *sdram_params, u32 pre_init)
 {
+	struct sdram_cap_info *cap_info = &sdram_params->ch.cap_info;
 	void __iomem *pctl_base = dram->pctl;
 
 	rkclk_ddr_reset(dram, 1, 1, 1, 1);
@@ -832,13 +388,14 @@ static int sdram_init_(struct dram_info *dram,
 	/* release phy srst to provide clk to ctrl */
 	rkclk_ddr_reset(dram, 1, 1, 0, 0);
 	udelay(10);
-	phy_soft_reset(dram);
+	phy_soft_reset(dram->phy);
 	/* release ctrl presetn, and config ctl registers */
 	rkclk_ddr_reset(dram, 1, 0, 0, 0);
-	pctl_cfg(dram, sdram_params);
-	sdram_params->ch.ddrconfig = calculate_ddrconfig(sdram_params);
+	pctl_cfg(dram->pctl, &sdram_params->pctl_regs, SR_IDLE, PD_IDLE);
+	cap_info->ddrconfig = calculate_ddrconfig(sdram_params);
 	set_ctl_address_map(dram, sdram_params);
-	phy_cfg(dram, sdram_params);
+	phy_cfg(dram->phy, &sdram_params->phy_regs, sdram_params->skew,
+		&sdram_params->base, cap_info->bw);
 
 	/* enable dfi_init_start to init phy after ctl srstn deassert */
 	setbits_le32(pctl_base + DDR_PCTL2_DFIMISC, (1 << 5) | (1 << 4));
@@ -848,12 +405,12 @@ static int sdram_init_(struct dram_info *dram,
 	while ((readl(pctl_base + DDR_PCTL2_STAT) & 0x7) == 0)
 		continue;
 
-	if (sdram_params->dramtype == LPDDR3)
-		write_mr(dram, 3, 11, 3, LPDDR3);
+	if (sdram_params->base.dramtype == LPDDR3)
+		pctl_write_mr(dram->pctl, 3, 11, 3, LPDDR3);
 
 	/* do ddr gate training */
 redo_cs0_training:
-	if (data_training(dram, 0, sdram_params->dramtype) != 0) {
+	if (data_training(dram, 0, sdram_params->base.dramtype) != 0) {
 		if (pre_init != 0)
 			printascii("DTT cs0 error\n");
 		return -1;
@@ -863,17 +420,17 @@ redo_cs0_training:
 		goto redo_cs0_training;
 	}
 
-	if (sdram_params->dramtype == LPDDR3) {
+	if (sdram_params->base.dramtype == LPDDR3) {
 		if ((read_mr(dram, 1, 8) & 0x3) != 0x3)
 			return -1;
-	} else if (sdram_params->dramtype == LPDDR2) {
+	} else if (sdram_params->base.dramtype == LPDDR2) {
 		if ((read_mr(dram, 1, 8) & 0x3) != 0x0)
 			return -1;
 	}
 	/* for px30: when 2cs, both 2 cs should be training */
-	if (pre_init != 0 && sdram_params->ch.rank == 2) {
+	if (pre_init != 0 && cap_info->rank == 2) {
 redo_cs1_training:
-		if (data_training(dram, 1, sdram_params->dramtype) != 0) {
+		if (data_training(dram, 1, sdram_params->base.dramtype) != 0) {
 			printascii("DTT cs1 error\n");
 			return -1;
 		}
@@ -883,8 +440,9 @@ redo_cs1_training:
 		}
 	}
 
-	if (sdram_params->dramtype == DDR4)
-		write_vrefdq(dram, 0x3, 5670, sdram_params->dramtype);
+	if (sdram_params->base.dramtype == DDR4)
+		pctl_write_vrefdq(dram->pctl, 0x3, 5670,
+				  sdram_params->base.dramtype);
 
 	dram_all_config(dram, sdram_params);
 	enable_low_power(dram, sdram_params);
@@ -892,12 +450,11 @@ redo_cs1_training:
 	return 0;
 }
 
-static u64 dram_detect_cap(struct dram_info *dram,
+static int dram_detect_cap(struct dram_info *dram,
 			   struct px30_sdram_params *sdram_params,
 			   unsigned char channel)
 {
-	void __iomem *pctl_base = dram->pctl;
-	void __iomem *phy_base = dram->phy;
+	struct sdram_cap_info *cap_info = &sdram_params->ch.cap_info;
 
 	/*
 	 * for ddr3: ddrconf = 3
@@ -907,14 +464,10 @@ static u64 dram_detect_cap(struct dram_info *dram,
 	 */
 	u32 bk, bktmp;
 	u32 col, coltmp;
-	u32 row, rowtmp, row_3_4;
-	void __iomem *test_addr, *test_addr1;
-	u32 dbw;
+	u32 rowtmp;
 	u32 cs;
 	u32 bw = 1;
-	u64 cap = 0;
-	u32 dram_type = sdram_params->dramtype;
-	u32 pwrctl;
+	u32 dram_type = sdram_params->base.dramtype;
 
 	if (dram_type != DDR4) {
 		/* detect col and bk for ddr3/lpddr3 */
@@ -925,33 +478,10 @@ static u64 dram_detect_cap(struct dram_info *dram,
 		else
 			rowtmp = 16;
 
-		for (col = coltmp; col >= 9; col -= 1) {
-			writel(0, CONFIG_SYS_SDRAM_BASE);
-			test_addr = (void __iomem *)(CONFIG_SYS_SDRAM_BASE +
-					(1ul << (col + bw - 1ul)));
-			writel(PATTERN, test_addr);
-			if ((readl(test_addr) == PATTERN) &&
-			    (readl(CONFIG_SYS_SDRAM_BASE) == 0))
-				break;
-		}
-		if (col == 8) {
-			printascii("col error\n");
+		if (sdram_detect_col(cap_info, coltmp) != 0)
 			goto cap_err;
-		}
-
-		test_addr = (void __iomem *)(CONFIG_SYS_SDRAM_BASE +
-				(1ul << (coltmp + bktmp + bw - 1ul)));
-		writel(0, CONFIG_SYS_SDRAM_BASE);
-		writel(PATTERN, test_addr);
-		if ((readl(test_addr) == PATTERN) &&
-		    (readl(CONFIG_SYS_SDRAM_BASE) == 0))
-			bk = 3;
-		else
-			bk = 2;
-		if (dram_type == DDR3)
-			dbw = 1;
-		else
-			dbw = 2;
+		sdram_detect_bank(cap_info, coltmp, bktmp);
+		sdram_detect_dbw(cap_info, dram_type);
 	} else {
 		/* detect bg for ddr4 */
 		coltmp = 10;
@@ -960,217 +490,62 @@ static u64 dram_detect_cap(struct dram_info *dram,
 
 		col = 10;
 		bk = 2;
-		test_addr = (void __iomem *)(CONFIG_SYS_SDRAM_BASE +
-				(1ul << (coltmp + bw + 1ul)));
-		writel(0, CONFIG_SYS_SDRAM_BASE);
-		writel(PATTERN, test_addr);
-		if ((readl(test_addr) == PATTERN) &&
-		    (readl(CONFIG_SYS_SDRAM_BASE) == 0))
-			dbw = 0;
-		else
-			dbw = 1;
+		cap_info->col = col;
+		cap_info->bk = bk;
+		sdram_detect_bg(cap_info, coltmp);
 	}
+
 	/* detect row */
-	for (row = rowtmp; row > 12; row--) {
-		writel(0, CONFIG_SYS_SDRAM_BASE);
-		test_addr = (void __iomem *)(CONFIG_SYS_SDRAM_BASE +
-				(1ul << (row + bktmp + coltmp + bw - 1ul)));
-		writel(PATTERN, test_addr);
-		if ((readl(test_addr) == PATTERN) &&
-		    (readl(CONFIG_SYS_SDRAM_BASE) == 0))
-			break;
-	}
-	if (row == 12) {
-		printascii("row error");
+	if (sdram_detect_row(cap_info, coltmp, bktmp, rowtmp) != 0)
 		goto cap_err;
-	}
-	/* detect row_3_4 */
-	test_addr = CONFIG_SYS_SDRAM_BASE;
-	test_addr1 = (void __iomem *)(CONFIG_SYS_SDRAM_BASE +
-			(0x3ul << (row + bktmp + coltmp + bw - 1ul - 1ul)));
-
-	writel(0, test_addr);
-	writel(PATTERN, test_addr1);
-	if ((readl(test_addr) == 0) &&
-	    (readl(test_addr1) == PATTERN))
-		row_3_4 = 0;
-	else
-		row_3_4 = 1;
 
-	/* disable auto low-power */
-	pwrctl = readl(pctl_base + DDR_PCTL2_PWRCTL);
-	writel(0, pctl_base + DDR_PCTL2_PWRCTL);
+	/* detect row_3_4 */
+	sdram_detect_row_3_4(cap_info, coltmp, bktmp);
 
-	/* bw and cs detect using phy read gate training */
+	/* bw and cs detect using data training */
 	if (data_training(dram, 1, dram_type) == 0)
 		cs = 1;
 	else
 		cs = 0;
+	cap_info->rank = cs + 1;
 
-	clrsetbits_le32(PHY_REG(phy_base, 0), 0xf << 4, 0xf << 4);
-	setbits_le32(PHY_REG(phy_base, 0x46), 1 << 3);
-	setbits_le32(PHY_REG(phy_base, 0x56), 1 << 3);
-
-	phy_soft_reset(dram);
-
+	dram_set_bw(dram, 2);
 	if (data_training(dram, 0, dram_type) == 0)
 		bw = 2;
 	else
 		bw = 1;
+	cap_info->bw = bw;
 
-	/* restore auto low-power */
-	writel(pwrctl, pctl_base + DDR_PCTL2_PWRCTL);
-
-	sdram_params->ch.rank = cs + 1;
-	sdram_params->ch.col = col;
-	sdram_params->ch.bk = bk;
-	sdram_params->ch.dbw = dbw;
-	sdram_params->ch.bw = bw;
-	sdram_params->ch.cs0_row = row;
-	sdram_params->ch.cs0_high16bit_row = row;
+	cap_info->cs0_high16bit_row = cap_info->cs0_row;
 	if (cs) {
-		sdram_params->ch.cs1_row = row;
-		sdram_params->ch.cs1_high16bit_row = row;
+		cap_info->cs1_row = cap_info->cs0_row;
+		cap_info->cs1_high16bit_row = cap_info->cs0_row;
 	} else {
-		sdram_params->ch.cs1_row = 0;
-		sdram_params->ch.cs1_high16bit_row = 0;
-	}
-	sdram_params->ch.row_3_4 = row_3_4;
-
-	if (dram_type == DDR4)
-		cap = 1llu << (cs + row + bk + col + ((dbw == 0) ? 2 : 1) + bw);
-	else
-		cap = 1llu << (cs + row + bk + col + bw);
-
-	return cap;
-
-cap_err:
-	return 0;
-}
-
-static u32 remodify_sdram_params(struct px30_sdram_params *sdram_params)
-{
-	u32 tmp = 0, tmp_adr = 0, i;
-
-	for (i = 0; sdram_params->pctl_regs.pctl[i][0] != 0xFFFFFFFF; i++) {
-		if (sdram_params->pctl_regs.pctl[i][0] == 0) {
-			tmp = sdram_params->pctl_regs.pctl[i][1];/* MSTR */
-			tmp_adr = i;
-		}
-	}
-
-	tmp &= ~((3ul << 30) | (3ul << 24) | (3ul << 12));
-
-	switch (sdram_params->ch.dbw) {
-	case 2:
-		tmp |= (3ul << 30);
-		break;
-	case 1:
-		tmp |= (2ul << 30);
-		break;
-	case 0:
-	default:
-		tmp |= (1ul << 30);
-		break;
+		cap_info->cs1_row = 0;
+		cap_info->cs1_high16bit_row = 0;
 	}
 
-	/*
-	 * If DDR3 or DDR4 MSTR.active_ranks=1,
-	 * it will gate memory clock when enter power down.
-	 * Force set active_ranks to 3 to workaround it.
-	 */
-	if (sdram_params->ch.rank == 2 || sdram_params->dramtype == DDR3 ||
-	    sdram_params->dramtype == DDR4)
-		tmp |= 3 << 24;
-	else
-		tmp |= 1 << 24;
-
-	tmp |= (2 - sdram_params->ch.bw) << 12;
-
-	sdram_params->pctl_regs.pctl[tmp_adr][1] = tmp;
-
 	return 0;
-}
-
-int dram_detect_high_row(struct dram_info *dram,
-			 struct px30_sdram_params *sdram_params,
-			 unsigned char channel)
-{
-	sdram_params->ch.cs0_high16bit_row = sdram_params->ch.cs0_row;
-	sdram_params->ch.cs1_high16bit_row = sdram_params->ch.cs1_row;
-
-	return 0;
-}
-
-static int dram_detect_cs1_row(struct px30_sdram_params *sdram_params,
-			       unsigned char channel)
-{
-	u32 ret = 0;
-	void __iomem *test_addr;
-	u32 row, bktmp, coltmp, bw;
-	u64 cs0_cap;
-	u32 byte_mask;
-
-	if (sdram_params->ch.rank == 2) {
-		cs0_cap = get_cs_cap(sdram_params, 0);
-
-		if (sdram_params->dramtype == DDR4) {
-			if (sdram_params->ch.dbw == 0)
-				bktmp = sdram_params->ch.bk + 2;
-			else
-				bktmp = sdram_params->ch.bk + 1;
-		} else {
-			bktmp = sdram_params->ch.bk;
-		}
-		bw = sdram_params->ch.bw;
-		coltmp = sdram_params->ch.col;
-
-		/*
-		 * because px30 support axi split,min bandwidth
-		 * is 8bit. if cs0 is 32bit, cs1 may 32bit or 16bit
-		 * so we check low 16bit data when detect cs1 row.
-		 * if cs0 is 16bit/8bit, we check low 8bit data.
-		 */
-		if (bw == 2)
-			byte_mask = 0xFFFF;
-		else
-			byte_mask = 0xFF;
-
-		/* detect cs1 row */
-		for (row = sdram_params->ch.cs0_row; row > 12; row--) {
-			test_addr = (void __iomem *)(CONFIG_SYS_SDRAM_BASE +
-				    cs0_cap +
-				    (1ul << (row + bktmp + coltmp + bw - 1ul)));
-			writel(0, CONFIG_SYS_SDRAM_BASE + cs0_cap);
-			writel(PATTERN, test_addr);
-
-			if (((readl(test_addr) & byte_mask) ==
-			     (PATTERN & byte_mask)) &&
-			    ((readl(CONFIG_SYS_SDRAM_BASE + cs0_cap) &
-			      byte_mask) == 0)) {
-				ret = row;
-				break;
-			}
-		}
-	}
-
-	return ret;
+cap_err:
+	return -1;
 }
 
 void get_ddr_param(struct px30_sdram_params *sdram_params,
 		   struct ddr_param *ddr_param)
 {
+	struct sdram_cap_info *cap_info = &sdram_params->ch.cap_info;
+	u32 dram_type = sdram_params->base.dramtype;
 	u64 cs_cap[2];
 
-	cs_cap[0] = get_cs_cap(sdram_params, 0);
-	cs_cap[1] = get_cs_cap(sdram_params, 1);
+	cs_cap[0] = sdram_get_cs_cap(cap_info, 0, dram_type);
+	cs_cap[1] = sdram_get_cs_cap(cap_info, 1, dram_type);
 
-	if (sdram_params->ch.row_3_4) {
+	if (cap_info->row_3_4) {
 		cs_cap[0] =  cs_cap[0] * 3 / 4;
 		cs_cap[1] =  cs_cap[1] * 3 / 4;
 	}
 
-	if (sdram_params->ch.row_3_4 && sdram_params->ch.rank == 2) {
+	if (cap_info->row_3_4 && cap_info->rank == 2) {
 		ddr_param->count = 2;
 		ddr_param->para[0] = 0;
 		ddr_param->para[1] = cs_cap[0] * 4 / 3;
@@ -1187,6 +562,7 @@ void get_ddr_param(struct px30_sdram_params *sdram_params,
 static int sdram_init_detect(struct dram_info *dram,
 			     struct px30_sdram_params *sdram_params)
 {
+	struct sdram_cap_info *cap_info = &sdram_params->ch.cap_info;
 	u32 ret;
 	u32 sys_reg = 0;
 	u32 sys_reg3 = 0;
@@ -1194,29 +570,29 @@ static int sdram_init_detect(struct dram_info *dram,
 	if (sdram_init_(dram, sdram_params, 0) != 0)
 		return -1;
 
-	if (dram_detect_cap(dram, sdram_params, 0) == 0)
+	if (dram_detect_cap(dram, sdram_params, 0) != 0)
 		return -1;
 
 	/* modify bw, cs related timing */
-	remodify_sdram_params(sdram_params);
+	pctl_remodify_sdram_params(&sdram_params->pctl_regs, cap_info,
+				   sdram_params->base.dramtype);
 	/* reinit sdram by real dram cap */
 	ret = sdram_init_(dram, sdram_params, 1);
 	if (ret != 0)
 		goto out;
 
 	/* redetect cs1 row */
-	sdram_params->ch.cs1_row =
-		dram_detect_cs1_row(sdram_params, 0);
-	if (sdram_params->ch.cs1_row) {
+	sdram_detect_cs1_row(cap_info, sdram_params->base.dramtype);
+	if (cap_info->cs1_row) {
 		sys_reg = readl(&dram->pmugrf->os_reg[2]);
 		sys_reg3 = readl(&dram->pmugrf->os_reg[3]);
-		SYS_REG_ENC_CS1_ROW_(sdram_params->ch.cs1_row,
-				     sys_reg, sys_reg3);
+		SYS_REG_ENC_CS1_ROW(cap_info->cs1_row,
+				    sys_reg, sys_reg3, 0);
 		writel(sys_reg, &dram->pmugrf->os_reg[2]);
 		writel(sys_reg3, &dram->pmugrf->os_reg[3]);
 	}
 
-	ret = dram_detect_high_row(dram, sdram_params, 0);
+	ret = sdram_detect_high_row(cap_info);
 
 out:
 	return ret;
@@ -1253,7 +629,8 @@ int sdram_init(void)
 
 	get_ddr_param(sdram_params, &ddr_param);
 	rockchip_setup_ddr_param(&ddr_param);
-	print_ddr_info(sdram_params);
+	sdram_print_ddr_info(&sdram_params->ch.cap_info,
+			     &sdram_params->base, 0);
 
 	printascii("out\n");
 	return ret;

commit 74803dece4f6bd70a61b317c132550d46c739458
Author: YouMin Chen <cym@rock-chips.com>
Date:   Fri Dec 21 16:12:56 2018 +0800

    driver: ram: rockchip: add common code about dram init
    
    Add commond code about rockchip dram init,include print dram info,
    capacity detect,config msch timing,config os_regs and so on.
    
    Change-Id: Ie4223dac31bde290d19627c96088542fcdd5521d
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_pctl_px30.h b/arch/arm/include/asm/arch-rockchip/sdram_pctl_px30.h
new file mode 100644
index 0000000000..9f493be489
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/sdram_pctl_px30.h
@@ -0,0 +1,139 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * Copyright (C) 2018 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _ASM_ARCH_SDRAM_PCTL_PX30_H
+#define _ASM_ARCH_SDRAM_PCTL_PX30_H
+#include <asm/arch/sdram_share.h>
+
+struct ddr_pctl_regs {
+	u32 pctl[30][2];
+};
+
+/* ddr pctl registers define */
+#define DDR_PCTL2_MSTR			0x0
+#define DDR_PCTL2_STAT			0x4
+#define DDR_PCTL2_MSTR1			0x8
+#define DDR_PCTL2_MRCTRL0		0x10
+#define DDR_PCTL2_MRCTRL1		0x14
+#define DDR_PCTL2_MRSTAT		0x18
+#define DDR_PCTL2_MRCTRL2		0x1c
+#define DDR_PCTL2_DERATEEN		0x20
+#define DDR_PCTL2_DERATEINT		0x24
+#define DDR_PCTL2_PWRCTL		0x30
+#define DDR_PCTL2_PWRTMG		0x34
+#define DDR_PCTL2_HWLPCTL		0x38
+#define DDR_PCTL2_RFSHCTL0		0x50
+#define DDR_PCTL2_RFSHCTL1		0x54
+#define DDR_PCTL2_RFSHCTL2		0x58
+#define DDR_PCTL2_RFSHCTL4		0x5c
+#define DDR_PCTL2_RFSHCTL3		0x60
+#define DDR_PCTL2_RFSHTMG		0x64
+#define DDR_PCTL2_RFSHTMG1		0x68
+#define DDR_PCTL2_RFSHCTL5		0x6c
+#define DDR_PCTL2_INIT0			0xd0
+#define DDR_PCTL2_INIT1			0xd4
+#define DDR_PCTL2_INIT2			0xd8
+#define DDR_PCTL2_INIT3			0xdc
+#define DDR_PCTL2_INIT4			0xe0
+#define DDR_PCTL2_INIT5			0xe4
+#define DDR_PCTL2_INIT6			0xe8
+#define DDR_PCTL2_INIT7			0xec
+#define DDR_PCTL2_DIMMCTL		0xf0
+#define DDR_PCTL2_RANKCTL		0xf4
+#define DDR_PCTL2_CHCTL			0xfc
+#define DDR_PCTL2_DRAMTMG0		0x100
+#define DDR_PCTL2_DRAMTMG1		0x104
+#define DDR_PCTL2_DRAMTMG2		0x108
+#define DDR_PCTL2_DRAMTMG3		0x10c
+#define DDR_PCTL2_DRAMTMG4		0x110
+#define DDR_PCTL2_DRAMTMG5		0x114
+#define DDR_PCTL2_DRAMTMG6		0x118
+#define DDR_PCTL2_DRAMTMG7		0x11c
+#define DDR_PCTL2_DRAMTMG8		0x120
+#define DDR_PCTL2_DRAMTMG9		0x124
+#define DDR_PCTL2_DRAMTMG10		0x128
+#define DDR_PCTL2_DRAMTMG11		0x12c
+#define DDR_PCTL2_DRAMTMG12		0x130
+#define DDR_PCTL2_DRAMTMG13		0x134
+#define DDR_PCTL2_DRAMTMG14		0x138
+#define DDR_PCTL2_DRAMTMG15		0x13c
+#define DDR_PCTL2_DRAMTMG16		0x140
+#define DDR_PCTL2_ZQCTL0		0x180
+#define DDR_PCTL2_ZQCTL1		0x184
+#define DDR_PCTL2_ZQCTL2		0x188
+#define DDR_PCTL2_ZQSTAT		0x18c
+#define DDR_PCTL2_DFITMG0		0x190
+#define DDR_PCTL2_DFITMG1		0x194
+#define DDR_PCTL2_DFILPCFG0		0x198
+#define DDR_PCTL2_DFILPCFG1		0x19c
+#define DDR_PCTL2_DFIUPD0		0x1a0
+#define DDR_PCTL2_DFIUPD1		0x1a4
+#define DDR_PCTL2_DFIUPD2		0x1a8
+#define DDR_PCTL2_DFIMISC		0x1b0
+#define DDR_PCTL2_DFITMG2		0x1b4
+#define DDR_PCTL2_DFITMG3		0x1b8
+#define DDR_PCTL2_DFISTAT		0x1bc
+#define DDR_PCTL2_DBICTL		0x1c0
+#define DDR_PCTL2_ADDRMAP0		0x200
+#define DDR_PCTL2_ADDRMAP1		0x204
+#define DDR_PCTL2_ADDRMAP2		0x208
+#define DDR_PCTL2_ADDRMAP3		0x20c
+#define DDR_PCTL2_ADDRMAP4		0x210
+#define DDR_PCTL2_ADDRMAP5		0x214
+#define DDR_PCTL2_ADDRMAP6		0x218
+#define DDR_PCTL2_ADDRMAP7		0x21c
+#define DDR_PCTL2_ADDRMAP8		0x220
+#define DDR_PCTL2_ADDRMAP9		0x224
+#define DDR_PCTL2_ADDRMAP10		0x228
+#define DDR_PCTL2_ADDRMAP11		0x22c
+#define DDR_PCTL2_ODTCFG		0x240
+#define DDR_PCTL2_ODTMAP		0x244
+#define DDR_PCTL2_SCHED			0x250
+#define DDR_PCTL2_SCHED1		0x254
+#define DDR_PCTL2_PERFHPR1		0x25c
+#define DDR_PCTL2_PERFLPR1		0x264
+#define DDR_PCTL2_PERFWR1		0x26c
+#define DDR_PCTL2_DQMAP0		0x280
+#define DDR_PCTL2_DQMAP1		0x284
+#define DDR_PCTL2_DQMAP2		0x288
+#define DDR_PCTL2_DQMAP3		0x28c
+#define DDR_PCTL2_DQMAP4		0x290
+#define DDR_PCTL2_DQMAP5		0x294
+#define DDR_PCTL2_DBG0			0x300
+#define DDR_PCTL2_DBG1			0x304
+#define DDR_PCTL2_DBGCAM		0x308
+#define DDR_PCTL2_DBGCMD		0x30c
+#define DDR_PCTL2_DBGSTAT		0x310
+#define DDR_PCTL2_SWCTL			0x320
+#define DDR_PCTL2_SWSTAT		0x324
+#define DDR_PCTL2_POISONCFG		0x36c
+#define DDR_PCTL2_POISONSTAT		0x370
+#define DDR_PCTL2_ADVECCINDEX		0x374
+#define DDR_PCTL2_ADVECCSTAT		0x378
+#define DDR_PCTL2_PSTAT			0x3fc
+#define DDR_PCTL2_PCCFG			0x400
+#define DDR_PCTL2_PCFGR_n		0x404
+#define DDR_PCTL2_PCFGW_n		0x408
+#define DDR_PCTL2_PCTRL_n		0x490
+
+/* PCTL2_MRSTAT */
+#define MR_WR_BUSY			BIT(0)
+
+void pctl_read_mr(void __iomem *pctl_base, u32 rank, u32 mr_num);
+int pctl_write_mr(void __iomem *pctl_base, u32 rank, u32 mr_num, u32 arg,
+		  u32 dramtype);
+int pctl_write_vrefdq(void __iomem *pctl_base, u32 rank, u32 vrefrate,
+		      u32 dramtype);
+
+u32 pctl_dis_zqcs_aref(void __iomem *pctl_base);
+void pctl_rest_zqcs_aref(void __iomem *pctl_base, u32 dis_auto_zq);
+
+u32 pctl_remodify_sdram_params(struct ddr_pctl_regs *pctl_regs,
+			       struct sdram_cap_info *cap_info,
+			       u32 dram_type);
+int pctl_cfg(void __iomem *pctl_base, struct ddr_pctl_regs *pctl_regs,
+	     u32 sr_idle, u32 pd_idle);
+
+#endif
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_phy_px30.h b/arch/arm/include/asm/arch-rockchip/sdram_phy_px30.h
new file mode 100644
index 0000000000..249be58f7e
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/sdram_phy_px30.h
@@ -0,0 +1,62 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * Copyright (C) 2018 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _ASM_ARCH_SDRAM_PHY_PX30_H
+#define _ASM_ARCH_SDRAM_PHY_PX30_H
+#include <asm/arch/sdram_share.h>
+#include <asm/arch/sdram_phy_ron_rtt_px30.h>
+
+struct ddr_phy_regs {
+	u32 phy[5][2];
+};
+
+#define PHY_REG(base, n)		((base) + 4 * (n))
+
+/* PHY_REG0 */
+#define DIGITAL_DERESET			BIT(3)
+#define ANALOG_DERESET			BIT(2)
+#define DIGITAL_RESET			(0 << 3)
+#define ANALOG_RESET			(0 << 2)
+
+/* PHY_REG1 */
+#define PHY_DDR2			(0)
+#define PHY_LPDDR2			(1)
+#define PHY_DDR3			(2)
+#define PHY_LPDDR3			(3)
+#define PHY_DDR4			(4)
+#define PHY_BL_4			(0 << 2)
+#define PHY_BL_8			BIT(2)
+
+/* PHY_REG2 */
+#define PHY_DTT_EN			BIT(0)
+#define PHY_DTT_DISB			(0 << 0)
+#define PHY_WRITE_LEVELING_EN		BIT(2)
+#define PHY_WRITE_LEVELING_DISB		(0 << 2)
+#define PHY_SELECT_CS0			(2)
+#define PHY_SELECT_CS1			(1)
+#define PHY_SELECT_CS0_1		(0)
+#define PHY_WRITE_LEVELING_SELECTCS(n)	((n) << 6)
+#define PHY_DATA_TRAINING_SELECTCS(n)	((n) << 4)
+
+struct ddr_phy_skew {
+	u32 a0_a1_skew[15];
+	u32 cs0_dm0_skew[11];
+	u32 cs0_dm1_skew[11];
+	u32 cs0_dm2_skew[11];
+	u32 cs0_dm3_skew[11];
+	u32 cs1_dm0_skew[11];
+	u32 cs1_dm1_skew[11];
+	u32 cs1_dm2_skew[11];
+	u32 cs1_dm3_skew[11];
+};
+
+void phy_soft_reset(void __iomem *phy_base);
+void phy_dram_set_bw(void __iomem *phy_base, u32 bw);
+void phy_cfg(void __iomem *phy_base,
+	     struct ddr_phy_regs *phy_regs, struct ddr_phy_skew *skew,
+	     struct sdram_base_params *base, u32 bw);
+int phy_data_training(void __iomem *phy_base, u32 cs, u32 dramtype);
+
+#endif
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_phy_ron_rtt_px30.h b/arch/arm/include/asm/arch-rockchip/sdram_phy_ron_rtt_px30.h
new file mode 100644
index 0000000000..9c15232047
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/sdram_phy_ron_rtt_px30.h
@@ -0,0 +1,59 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * Copyright (C) 2018 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _ASM_ARCH_SDRAM_PHY_RON_RTT_PX30_H
+#define _ASM_ARCH_SDRAM_PHY_RON_RTT_PX30_H
+
+#define PHY_DDR3_RON_RTT_DISABLE	(0)
+#define PHY_DDR3_RON_RTT_451ohm		(1)
+#define PHY_DDR3_RON_RTT_225ohm		(2)
+#define PHY_DDR3_RON_RTT_150ohm		(3)
+#define PHY_DDR3_RON_RTT_112ohm		(4)
+#define PHY_DDR3_RON_RTT_90ohm		(5)
+#define PHY_DDR3_RON_RTT_75ohm		(6)
+#define PHY_DDR3_RON_RTT_64ohm		(7)
+#define PHY_DDR3_RON_RTT_56ohm		(16)
+#define PHY_DDR3_RON_RTT_50ohm		(17)
+#define PHY_DDR3_RON_RTT_45ohm		(18)
+#define PHY_DDR3_RON_RTT_41ohm		(19)
+#define PHY_DDR3_RON_RTT_37ohm		(20)
+#define PHY_DDR3_RON_RTT_34ohm		(21)
+#define PHY_DDR3_RON_RTT_33ohm		(22)
+#define PHY_DDR3_RON_RTT_30ohm		(23)
+#define PHY_DDR3_RON_RTT_28ohm		(24)
+#define PHY_DDR3_RON_RTT_26ohm		(25)
+#define PHY_DDR3_RON_RTT_25ohm		(26)
+#define PHY_DDR3_RON_RTT_23ohm		(27)
+#define PHY_DDR3_RON_RTT_22ohm		(28)
+#define PHY_DDR3_RON_RTT_21ohm		(29)
+#define PHY_DDR3_RON_RTT_20ohm		(30)
+#define PHY_DDR3_RON_RTT_19ohm		(31)
+
+#define PHY_DDR4_LPDDR3_RON_RTT_DISABLE	(0)
+#define PHY_DDR4_LPDDR3_RON_RTT_480ohm	(1)
+#define PHY_DDR4_LPDDR3_RON_RTT_240ohm	(2)
+#define PHY_DDR4_LPDDR3_RON_RTT_160ohm	(3)
+#define PHY_DDR4_LPDDR3_RON_RTT_120ohm	(4)
+#define PHY_DDR4_LPDDR3_RON_RTT_96ohm	(5)
+#define PHY_DDR4_LPDDR3_RON_RTT_80ohm	(6)
+#define PHY_DDR4_LPDDR3_RON_RTT_68ohm	(7)
+#define PHY_DDR4_LPDDR3_RON_RTT_60ohm	(16)
+#define PHY_DDR4_LPDDR3_RON_RTT_53ohm	(17)
+#define PHY_DDR4_LPDDR3_RON_RTT_48ohm	(18)
+#define PHY_DDR4_LPDDR3_RON_RTT_43ohm	(19)
+#define PHY_DDR4_LPDDR3_RON_RTT_40ohm	(20)
+#define PHY_DDR4_LPDDR3_RON_RTT_37ohm	(21)
+#define PHY_DDR4_LPDDR3_RON_RTT_34ohm	(22)
+#define PHY_DDR4_LPDDR3_RON_RTT_32ohm	(23)
+#define PHY_DDR4_LPDDR3_RON_RTT_30ohm	(24)
+#define PHY_DDR4_LPDDR3_RON_RTT_28ohm	(25)
+#define PHY_DDR4_LPDDR3_RON_RTT_26ohm	(26)
+#define PHY_DDR4_LPDDR3_RON_RTT_25ohm	(27)
+#define PHY_DDR4_LPDDR3_RON_RTT_24ohm	(28)
+#define PHY_DDR4_LPDDR3_RON_RTT_22ohm	(29)
+#define PHY_DDR4_LPDDR3_RON_RTT_21ohm	(30)
+#define PHY_DDR4_LPDDR3_RON_RTT_20ohm	(31)
+
+#endif
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_share.h b/arch/arm/include/asm/arch-rockchip/sdram_share.h
new file mode 100644
index 0000000000..09a3fde15f
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/sdram_share.h
@@ -0,0 +1,285 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * Copyright (C) 2018 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _ASM_ARCH_SDRAM_SHARE_H
+#define _ASM_ARCH_SDRAM_SHARE_H
+
+#define MHZ		1000000
+
+struct sdram_cap_info {
+	unsigned int rank;
+	unsigned int col;
+	/* 3:8bank, 2:4bank */
+	unsigned int bk;
+	/* channel buswidth, 2:32bit, 1:16bit, 0:8bit */
+	unsigned int bw;
+	/* die buswidth, 2:32bit, 1:16bit, 0:8bit */
+	unsigned int dbw;
+	unsigned int row_3_4;
+	unsigned int cs0_row;
+	unsigned int cs1_row;
+	unsigned int cs0_high16bit_row;
+	unsigned int cs1_high16bit_row;
+	unsigned int ddrconfig;
+};
+
+struct sdram_base_params {
+	unsigned int ddr_freq;
+	unsigned int dramtype;
+	unsigned int num_channels;
+	unsigned int stride;
+	unsigned int odt;
+};
+
+#ifdef CONFIG_SDRAM_COMMON_OSREG
+/*
+ * sys_reg bitfield struct
+ * [31]		row_3_4_ch1
+ * [30]		row_3_4_ch0
+ * [29:28]	chinfo
+ * [27]		rank_ch1
+ * [26:25]	col_ch1
+ * [24]		bk_ch1
+ * [23:22]	cs0_row_ch1
+ * [21:20]	cs1_row_ch1
+ * [19:18]	bw_ch1
+ * [17:16]	dbw_ch1;
+ * [15:13]	ddrtype
+ * [12]		channelnum
+ * [11]		rank_ch0
+ * [10:9]	col_ch0
+ * [8]		bk_ch0
+ * [7:6]	cs0_row_ch0
+ * [5:4]	cs1_row_ch0
+ * [3:2]	bw_ch0
+ * [1:0]	dbw_ch0
+ */
+
+#define DDR_SYS_REG_VERSION		(0x2)
+#define SYS_REG_ENC_ROW_3_4(n, ch)	((n) << (30 + (ch)))
+#define SYS_REG_DEC_ROW_3_4(n, ch)	(((n) >> (30 + (ch))) & 0x1)
+#define SYS_REG_ENC_CHINFO(ch)		(1 << (28 + (ch)))
+#define SYS_REG_ENC_DDRTYPE(n)		((n) << 13)
+#define SYS_REG_DEC_DDRTYPE(n)		(((n) >> 13) & 0x7)
+#define SYS_REG_ENC_NUM_CH(n)		(((n) - 1) << 12)
+#define SYS_REG_DEC_NUM_CH(n)		(1 + (((n) >> 12) & 0x1))
+#define SYS_REG_ENC_RANK(n, ch)		(((n) - 1) << (11 + ((ch) * 16)))
+#define SYS_REG_DEC_RANK(n, ch)		(1 + (((n) >> (11 + 16 * (ch))) & 0x1))
+#define SYS_REG_ENC_COL(n, ch)		(((n) - 9) << (9 + ((ch) * 16)))
+#define SYS_REG_DEC_COL(n, ch)		(9 + (((n) >> (9 + 16 * (ch))) & 0x3))
+#define SYS_REG_ENC_BK(n, ch)		(((n) == 3 ? 0 : 1) << \
+						(8 + ((ch) * 16)))
+#define SYS_REG_DEC_BK(n, ch)		(3 - (((n) >> (8 + 16 * (ch))) & 0x1))
+#define SYS_REG_ENC_BW(n, ch)		((2 >> (n)) << (2 + ((ch) * 16)))
+#define SYS_REG_DEC_BW(n, ch)		(2 >> (((n) >> (2 + 16 * (ch))) & 0x3))
+#define SYS_REG_ENC_DBW(n, ch)		((2 >> (n)) << (0 + ((ch) * 16)))
+#define SYS_REG_DEC_DBW(n, ch)		(2 >> (((n) >> (0 + 16 * (ch))) & 0x3))
+/* sys reg 3 */
+#define SYS_REG_ENC_VERSION(n)		((n) << 28)
+#define SYS_REG_DEC_VERSION(n)		(((n) >> 28) & 0xf)
+#define SYS_REG_ENC_CS0_ROW(n, os_reg2, os_reg3, ch) do { \
+			(os_reg2) |= (((n) - 13) & 0x3) << (6 + 16 * (ch)); \
+			(os_reg3) |= ((((n) - 13) & 0x4) >> 2) << \
+				     (5 + 2 * (ch)); \
+		} while (0)
+
+#define SYS_REG_DEC_CS0_ROW(os_reg2, os_reg3, ch)	\
+		((((((os_reg2) >> (6 + 16 * (ch)) & 0x3) | \
+		 ((((os_reg3) >> (5 + 2 * (ch))) & 0x1) << 2)) + 1) & 0x7) + 12)
+
+#define SYS_REG_ENC_CS1_ROW(n, os_reg2, os_reg3, ch) do { \
+			(os_reg2) &= (~(0x3 << (4 + 16 * (ch)))); \
+			(os_reg3) &= (~(0x1 << (4 + 2 * (ch)))); \
+			(os_reg2) |= (((n) - 13) & 0x3) << (4 + 16 * (ch)); \
+			(os_reg3) |= ((((n) - 13) & 0x4) >> 2) << \
+				     (4 + 2 * (ch)); \
+		} while (0)
+
+#define SYS_REG_DEC_CS1_ROW(os_reg2, os_reg3, ch) \
+		((((((os_reg2) >> (4 + 16 * (ch)) & 0x3) | \
+		 ((((os_reg3) >> (4 + 2 * (ch))) & 0x1) << 2)) + 1) & 0x7) + 12)
+
+#define SYS_REG_ENC_CS1_COL(n, ch)	(((n) - 9) << (0 + 2 * (ch)))
+#define SYS_REG_DEC_CS1_COL(n, ch)	(9 + (((n) >> (0 + 2 * (ch))) & 0x3))
+
+void sdram_org_config(struct sdram_cap_info *cap_info,
+		      struct sdram_base_params *base,
+		      u32 *p_os_reg2, u32 *p_os_reg3, u32 channel);
+#endif
+
+#if defined(CONFIG_SDRAM_COMMON_MSCH_PX30) || \
+	defined(CONFIG_SDRAM_COMMON_MSCH_RK3399)
+union noc_ddrtiminga0 {
+	u32 d32;
+	struct {
+		unsigned acttoact : 6;
+		unsigned reserved0 : 2;
+		unsigned rdtomiss : 6;
+		unsigned reserved1 : 2;
+		unsigned wrtomiss : 6;
+		unsigned reserved2 : 2;
+		unsigned readlatency : 8;
+	} b;
+};
+
+union noc_ddrtimingb0 {
+	u32 d32;
+	struct {
+		unsigned rdtowr : 5;
+		unsigned reserved0 : 3;
+		unsigned wrtord : 5;
+		unsigned reserved1 : 3;
+		unsigned rrd : 4;
+		unsigned reserved2 : 4;
+		unsigned faw : 6;
+		unsigned reserved3 : 2;
+	} b;
+};
+
+union noc_ddrtimingc0 {
+	u32 d32;
+	struct {
+		unsigned burstpenalty : 4;
+		unsigned reserved0 : 4;
+		unsigned wrtomwr : 6;
+		unsigned reserved1 : 18;
+	} b;
+};
+
+union noc_devtodev0 {
+	u32 d32;
+	struct {
+		unsigned busrdtord : 3;
+		unsigned reserved0 : 1;
+		unsigned busrdtowr : 3;
+		unsigned reserved1 : 1;
+		unsigned buswrtord : 3;
+		unsigned reserved2 : 1;
+		unsigned buswrtowr : 3;
+		unsigned reserved3 : 17;
+	} b;
+};
+
+union noc_ddrmode {
+	u32 d32;
+	struct {
+		unsigned autoprecharge : 1;
+		unsigned bypassfiltering : 1;
+		unsigned fawbank : 1;
+		unsigned burstsize : 2;
+		unsigned mwrsize : 2;
+		unsigned reserved2 : 1;
+		unsigned forceorder : 8;
+		unsigned forceorderstate : 8;
+		unsigned reserved3 : 8;
+	} b;
+};
+
+union noc_ddr4timing {
+	u32 d32;
+	struct {
+		unsigned ccdl : 3;
+		unsigned wrtordl : 5;
+		unsigned rrdl : 4;
+		unsigned reserved1 : 20;
+	} b;
+};
+#endif
+
+#ifdef CONFIG_SDRAM_COMMON_MSCH_PX30
+struct msch_regs {
+	u32 coreid;
+	u32 revisionid;
+	u32 deviceconf;
+	u32 devicesize;
+	u32 ddrtiminga0;
+	u32 ddrtimingb0;
+	u32 ddrtimingc0;
+	u32 devtodev0;
+	u32 reserved1[(0x110 - 0x20) / 4];
+	u32 ddrmode;
+	u32 ddr4timing;
+	u32 reserved2[(0x1000 - 0x118) / 4];
+	u32 agingx0;
+	u32 reserved3[(0x1040 - 0x1004) / 4];
+	u32 aging0;
+	u32 aging1;
+	u32 aging2;
+	u32 aging3;
+};
+
+struct sdram_msch_timings {
+	union noc_ddrtiminga0 ddrtiminga0;
+	union noc_ddrtimingb0 ddrtimingb0;
+	union noc_ddrtimingc0 ddrtimingc0;
+	union noc_devtodev0 devtodev0;
+	union noc_ddrmode ddrmode;
+	union noc_ddr4timing ddr4timing;
+	u32 agingx0;
+};
+
+void sdram_msch_config(struct msch_regs *msch,
+		       struct sdram_msch_timings *noc_timings,
+		       struct sdram_cap_info *cap_info,
+		       struct sdram_base_params *base);
+#endif
+
+#ifdef CONFIG_SDRAM_COMMON_MSCH_RK3399
+struct msch_regs {
+	u32 coreid;
+	u32 revisionid;
+	u32 ddrconf;
+	u32 ddrsize;
+	union noc_ddrtiminga0 ddrtiminga0;
+	union noc_ddrtimingb0 ddrtimingb0;
+	union noc_ddrtimingc0 ddrtimingc0;
+	union noc_devtodev0 devtodev0;
+	u32 reserved0[(0x110 - 0x20) / 4];
+	union noc_ddrmode ddrmode;
+	u32 reserved1[(0x1000 - 0x114) / 4];
+	u32 agingx0;
+};
+
+struct sdram_msch_timings {
+	union noc_ddrtiminga0 ddrtiminga0;
+	union noc_ddrtimingb0 ddrtimingb0;
+	union noc_ddrtimingc0 ddrtimingc0;
+	union noc_devtodev0 devtodev0;
+	union noc_ddrmode ddrmode;
+	u32 agingx0;
+};
+
+void sdram_msch_config(struct msch_regs *msch,
+		       struct sdram_msch_timings *noc_timings);
+#endif
+
+#ifdef CONFIG_SDRAM_COMMON_CAP_DETECT
+
+#define PATTERN				(0x5aa5f00f)
+
+int sdram_detect_bw(struct sdram_cap_info *cap_info);
+int sdram_detect_cs(struct sdram_cap_info *cap_info);
+int sdram_detect_col(struct sdram_cap_info *cap_info,
+		     u32 coltmp);
+int sdram_detect_bank(struct sdram_cap_info *cap_info,
+		      u32 coltmp, u32 bktmp);
+int sdram_detect_bg(struct sdram_cap_info *cap_info,
+		    u32 coltmp);
+int sdram_detect_dbw(struct sdram_cap_info *cap_info, u32 dram_type);
+int sdram_detect_row(struct sdram_cap_info *cap_info,
+		     u32 coltmp, u32 bktmp, u32 rowtmp);
+int sdram_detect_row_3_4(struct sdram_cap_info *cap_info,
+			 u32 coltmp, u32 bktmp);
+int sdram_detect_high_row(struct sdram_cap_info *cap_info);
+int sdram_detect_cs1_row(struct sdram_cap_info *cap_info, u32 dram_type);
+#endif
+
+void sdram_print_dram_type(unsigned char dramtype);
+void sdram_print_ddr_info(struct sdram_cap_info *cap_info,
+			  struct sdram_base_params *base, u32 split);
+u64 sdram_get_cs_cap(struct sdram_cap_info *cap_info, u32 cs, u32 dram_type);
+void sdram_copy_to_reg(u32 *dest, const u32 *src, u32 n);
+
+#endif
diff --git a/drivers/ram/rockchip/Kconfig b/drivers/ram/rockchip/Kconfig
index ab21b34daf..c312366626 100644
--- a/drivers/ram/rockchip/Kconfig
+++ b/drivers/ram/rockchip/Kconfig
@@ -2,3 +2,25 @@ config ROCKCHIP_DMC
 	bool "ROCKCHIP DMC"
 	help
 	  This enable dram devfreq driver.
+
+config ROCKCHIP_SDRAM_COMMON
+	bool "Enable rockchip sdram common driver"
+	depends on TPL_RAM || SPL_RAM
+	help
+	  This enable sdram common driver
+
+config SDRAM_COMMON_CAP_DETECT
+	bool "Enable rockchip sdram capacity detect driver"
+	depends on ROCKCHIP_SDRAM_COMMON
+
+config SDRAM_COMMON_OSREG
+	bool "Enable rockchip sdram set sys os_reg driver"
+	depends on ROCKCHIP_SDRAM_COMMON
+
+config SDRAM_COMMON_MSCH_RK3399
+	bool "Enable rockchip sdram set RK3399 msch driver"
+	depends on ROCKCHIP_SDRAM_COMMON
+
+config SDRAM_COMMON_MSCH_PX30
+	bool "Enable rockchip sdram set PX30 msch driver"
+	depends on ROCKCHIP_SDRAM_COMMON
diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index 44c95981ac..818f340418 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -4,6 +4,7 @@
 # SPDX-License-Identifier:      GPL-2.0+
 #
 
+obj-$(CONFIG_ROCKCHIP_SDRAM_COMMON) += sdram_share.o
 obj-$(CONFIG_ROCKCHIP_RK3368) = dmc-rk3368.o
 obj-$(CONFIG_ROCKCHIP_RV1108) = sdram_rv1108_pctl_phy.o sdram_rv1108.o
 obj-$(CONFIG_ROCKCHIP_RK3128) = sdram_rk3128.o
diff --git a/drivers/ram/rockchip/sdram_pctl_px30.c b/drivers/ram/rockchip/sdram_pctl_px30.c
new file mode 100644
index 0000000000..247d9317b3
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_pctl_px30.c
@@ -0,0 +1,206 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd.
+ */
+
+#include <common.h>
+#include <ram.h>
+#include <asm/io.h>
+#include <asm/arch/sdram_common.h>
+#include <asm/arch/sdram_pctl_px30.h>
+
+/*
+ * rank = 1: cs0
+ * rank = 2: cs1
+ */
+void pctl_read_mr(void __iomem *pctl_base, u32 rank, u32 mr_num)
+{
+	writel((rank << 4) | (1 << 0), pctl_base + DDR_PCTL2_MRCTRL0);
+	writel((mr_num << 8), pctl_base + DDR_PCTL2_MRCTRL1);
+	setbits_le32(pctl_base + DDR_PCTL2_MRCTRL0, 1u << 31);
+	while (readl(pctl_base + DDR_PCTL2_MRCTRL0) & (1u << 31))
+		continue;
+	while (readl(pctl_base + DDR_PCTL2_MRSTAT) & MR_WR_BUSY)
+		continue;
+}
+
+/* rank = 1: cs0
+ * rank = 2: cs1
+ * rank = 3: cs0 & cs1
+ * note: be careful of keep mr original val
+ */
+int pctl_write_mr(void __iomem *pctl_base, u32 rank, u32 mr_num, u32 arg,
+		  u32 dramtype)
+{
+	while (readl(pctl_base + DDR_PCTL2_MRSTAT) & MR_WR_BUSY)
+		continue;
+	if (dramtype == DDR3 || dramtype == DDR4) {
+		writel((mr_num << 12) | (rank << 4) | (0 << 0),
+		       pctl_base + DDR_PCTL2_MRCTRL0);
+		writel(arg, pctl_base + DDR_PCTL2_MRCTRL1);
+	} else {
+		writel((rank << 4) | (0 << 0),
+		       pctl_base + DDR_PCTL2_MRCTRL0);
+		writel((mr_num << 8) | (arg & 0xff),
+		       pctl_base + DDR_PCTL2_MRCTRL1);
+	}
+
+	setbits_le32(pctl_base + DDR_PCTL2_MRCTRL0, 1u << 31);
+	while (readl(pctl_base + DDR_PCTL2_MRCTRL0) & (1u << 31))
+		continue;
+	while (readl(pctl_base + DDR_PCTL2_MRSTAT) & MR_WR_BUSY)
+		continue;
+
+	return 0;
+}
+
+/*
+ * rank : 1:cs0, 2:cs1, 3:cs0&cs1
+ * vrefrate: 4500: 45%,
+ */
+int pctl_write_vrefdq(void __iomem *pctl_base, u32 rank, u32 vrefrate,
+		      u32 dramtype)
+{
+	u32 tccd_l, value;
+	u32 dis_auto_zq = 0;
+
+	if (dramtype != DDR4 || vrefrate < 4500 ||
+	    vrefrate > 9200)
+		return (-1);
+
+	tccd_l = (readl(pctl_base + DDR_PCTL2_DRAMTMG4) >> 16) & 0xf;
+	tccd_l = (tccd_l - 4) << 10;
+
+	if (vrefrate > 7500) {
+		/* range 1 */
+		value = ((vrefrate - 6000) / 65) | tccd_l;
+	} else {
+		/* range 2 */
+		value = ((vrefrate - 4500) / 65) | tccd_l | (1 << 6);
+	}
+
+	dis_auto_zq = pctl_dis_zqcs_aref(pctl_base);
+
+	/* enable vrefdq calibratin */
+	pctl_write_mr(pctl_base, rank, 6, value | (1 << 7), dramtype);
+	udelay(1);/* tvrefdqe */
+	/* write vrefdq value */
+	pctl_write_mr(pctl_base, rank, 6, value | (1 << 7), dramtype);
+	udelay(1);/* tvref_time */
+	pctl_write_mr(pctl_base, rank, 6, value | (0 << 7), dramtype);
+	udelay(1);/* tvrefdqx */
+
+	pctl_rest_zqcs_aref(pctl_base, dis_auto_zq);
+
+	return 0;
+}
+
+static int upctl2_update_ref_reg(void __iomem *pctl_base)
+{
+	u32 ret;
+
+	ret = readl(pctl_base + DDR_PCTL2_RFSHCTL3) ^ (1 << 1);
+	writel(ret, pctl_base + DDR_PCTL2_RFSHCTL3);
+
+	return 0;
+}
+
+u32 pctl_dis_zqcs_aref(void __iomem *pctl_base)
+{
+	u32 dis_auto_zq = 0;
+
+	/* disable zqcs */
+	if (!(readl(pctl_base + DDR_PCTL2_ZQCTL0) &
+		(1ul << 31))) {
+		dis_auto_zq = 1;
+		setbits_le32(pctl_base + DDR_PCTL2_ZQCTL0, 1 << 31);
+	}
+
+	/* disable auto refresh */
+	setbits_le32(pctl_base + DDR_PCTL2_RFSHCTL3, 1);
+
+	upctl2_update_ref_reg(pctl_base);
+
+	return dis_auto_zq;
+}
+
+void pctl_rest_zqcs_aref(void __iomem *pctl_base, u32 dis_auto_zq)
+{
+	/* restore zqcs */
+	if (dis_auto_zq)
+		clrbits_le32(pctl_base + DDR_PCTL2_ZQCTL0, 1 << 31);
+
+	/* restore auto refresh */
+	clrbits_le32(pctl_base + DDR_PCTL2_RFSHCTL3, 1);
+
+	upctl2_update_ref_reg(pctl_base);
+}
+
+u32 pctl_remodify_sdram_params(struct ddr_pctl_regs *pctl_regs,
+			       struct sdram_cap_info *cap_info,
+			       u32 dram_type)
+{
+	u32 tmp = 0, tmp_adr = 0, i;
+
+	for (i = 0; pctl_regs->pctl[i][0] != 0xFFFFFFFF; i++) {
+		if (pctl_regs->pctl[i][0] == 0) {
+			tmp = pctl_regs->pctl[i][1];/* MSTR */
+			tmp_adr = i;
+		}
+	}
+
+	tmp &= ~((3ul << 30) | (3ul << 24) | (3ul << 12));
+
+	switch (cap_info->dbw) {
+	case 2:
+		tmp |= (3ul << 30);
+		break;
+	case 1:
+		tmp |= (2ul << 30);
+		break;
+	case 0:
+	default:
+		tmp |= (1ul << 30);
+		break;
+	}
+
+	/*
+	 * If DDR3 or DDR4 MSTR.active_ranks=1,
+	 * it will gate memory clock when enter power down.
+	 * Force set active_ranks to 3 to workaround it.
+	 */
+	if (cap_info->rank == 2 || dram_type == DDR3 ||
+	    dram_type == DDR4)
+		tmp |= 3 << 24;
+	else
+		tmp |= 1 << 24;
+
+	tmp |= (2 - cap_info->bw) << 12;
+
+	pctl_regs->pctl[tmp_adr][1] = tmp;
+
+	return 0;
+}
+
+int pctl_cfg(void __iomem *pctl_base, struct ddr_pctl_regs *pctl_regs,
+	     u32 sr_idle, u32 pd_idle)
+{
+	u32 i;
+
+	for (i = 0; pctl_regs->pctl[i][0] != 0xFFFFFFFF; i++) {
+		writel(pctl_regs->pctl[i][1],
+		       pctl_base + pctl_regs->pctl[i][0]);
+	}
+	clrsetbits_le32(pctl_base + DDR_PCTL2_PWRTMG,
+			(0xff << 16) | 0x1f,
+			((sr_idle & 0xff) << 16) | (pd_idle & 0x1f));
+
+	clrsetbits_le32(pctl_base + DDR_PCTL2_HWLPCTL,
+			0xfff << 16,
+			5 << 16);
+	/* disable zqcs */
+	setbits_le32(pctl_base + DDR_PCTL2_ZQCTL0, 1u << 31);
+
+	return 0;
+}
+
diff --git a/drivers/ram/rockchip/sdram_phy_px30.c b/drivers/ram/rockchip/sdram_phy_px30.c
new file mode 100644
index 0000000000..ad139d8107
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_phy_px30.c
@@ -0,0 +1,198 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd.
+ */
+
+#include <common.h>
+#include <ram.h>
+#include <asm/io.h>
+#include <asm/arch/sdram_common.h>
+#include <asm/arch/sdram_share.h>
+#include <asm/arch/sdram_phy_px30.h>
+
+static void sdram_phy_dll_bypass_set(void __iomem *phy_base, u32 freq)
+{
+	u32 tmp;
+	u32 i, j;
+
+	setbits_le32(PHY_REG(phy_base, 0x13), 1 << 4);
+	clrbits_le32(PHY_REG(phy_base, 0x14), 1 << 3);
+	for (i = 0; i < 4; i++) {
+		j = 0x26 + i * 0x10;
+		setbits_le32(PHY_REG(phy_base, j), 1 << 4);
+		clrbits_le32(PHY_REG(phy_base, j + 0x1), 1 << 3);
+	}
+
+	if (freq <= (400 * MHZ))
+		/* DLL bypass */
+		setbits_le32(PHY_REG(phy_base, 0xa4), 0x1f);
+	else
+		clrbits_le32(PHY_REG(phy_base, 0xa4), 0x1f);
+
+	if (freq <= (801 * MHZ))
+		tmp = 2;
+	else
+		tmp = 1;
+
+	for (i = 0; i < 4; i++) {
+		j = 0x28 + i * 0x10;
+		writel(tmp, PHY_REG(phy_base, j));
+	}
+}
+
+static void sdram_phy_set_ds_odt(void __iomem *phy_base,
+				 u32 dram_type)
+{
+	u32 cmd_drv, clk_drv, dqs_drv, dqs_odt;
+	u32 i, j;
+
+	if (dram_type == DDR3) {
+		cmd_drv = PHY_DDR3_RON_RTT_34ohm;
+		clk_drv = PHY_DDR3_RON_RTT_45ohm;
+		dqs_drv = PHY_DDR3_RON_RTT_34ohm;
+		dqs_odt = PHY_DDR3_RON_RTT_225ohm;
+	} else {
+		cmd_drv = PHY_DDR4_LPDDR3_RON_RTT_34ohm;
+		clk_drv = PHY_DDR4_LPDDR3_RON_RTT_43ohm;
+		dqs_drv = PHY_DDR4_LPDDR3_RON_RTT_34ohm;
+		if (dram_type == LPDDR2)
+			dqs_odt = PHY_DDR4_LPDDR3_RON_RTT_DISABLE;
+		else
+			dqs_odt = PHY_DDR4_LPDDR3_RON_RTT_240ohm;
+	}
+	/* DS */
+	writel(cmd_drv, PHY_REG(phy_base, 0x11));
+	clrsetbits_le32(PHY_REG(phy_base, 0x12), 0x1f << 3, cmd_drv << 3);
+	writel(clk_drv, PHY_REG(phy_base, 0x16));
+	writel(clk_drv, PHY_REG(phy_base, 0x18));
+
+	for (i = 0; i < 4; i++) {
+		j = 0x20 + i * 0x10;
+		writel(dqs_drv, PHY_REG(phy_base, j));
+		writel(dqs_drv, PHY_REG(phy_base, j + 0xf));
+		/* ODT */
+		writel(dqs_odt, PHY_REG(phy_base, j + 0x1));
+		writel(dqs_odt, PHY_REG(phy_base, j + 0xe));
+	}
+}
+
+void phy_soft_reset(void __iomem *phy_base)
+{
+	clrbits_le32(PHY_REG(phy_base, 0), 0x3 << 2);
+	udelay(1);
+	setbits_le32(PHY_REG(phy_base, 0), ANALOG_DERESET);
+	udelay(5);
+	setbits_le32(PHY_REG(phy_base, 0), DIGITAL_DERESET);
+	udelay(1);
+}
+
+void phy_dram_set_bw(void __iomem *phy_base, u32 bw)
+{
+	if (bw == 2) {
+		clrsetbits_le32(PHY_REG(phy_base, 0), 0xf << 4, 0xf << 4);
+		setbits_le32(PHY_REG(phy_base, 0x46), 1 << 3);
+		setbits_le32(PHY_REG(phy_base, 0x56), 1 << 3);
+	} else if (bw == 1) {
+		clrsetbits_le32(PHY_REG(phy_base, 0), 0xf << 4, 3 << 4);
+		clrbits_le32(PHY_REG(phy_base, 0x46), 1 << 3);
+		clrbits_le32(PHY_REG(phy_base, 0x56), 1 << 3);
+	} else if (bw == 0) {
+		clrsetbits_le32(PHY_REG(phy_base, 0), 0xf << 4, 1 << 4);
+		clrbits_le32(PHY_REG(phy_base, 0x36), 1 << 3);
+		clrbits_le32(PHY_REG(phy_base, 0x46), 1 << 3);
+		clrbits_le32(PHY_REG(phy_base, 0x56), 1 << 3);
+	}
+
+	phy_soft_reset(phy_base);
+}
+
+int phy_data_training(void __iomem *phy_base, u32 cs, u32 dramtype)
+{
+	u32 ret;
+	u32 odt_val;
+	u32 i, j;
+
+	odt_val = readl(PHY_REG(phy_base, 0x2e));
+
+	for (i = 0; i < 4; i++) {
+		j = 0x20 + i * 0x10;
+		writel(PHY_DDR3_RON_RTT_225ohm, PHY_REG(phy_base, j + 0x1));
+		writel(0, PHY_REG(phy_base, j + 0xe));
+	}
+
+	if (dramtype == DDR4) {
+		clrsetbits_le32(PHY_REG(phy_base, 0x29), 0x3, 0);
+		clrsetbits_le32(PHY_REG(phy_base, 0x39), 0x3, 0);
+		clrsetbits_le32(PHY_REG(phy_base, 0x49), 0x3, 0);
+		clrsetbits_le32(PHY_REG(phy_base, 0x59), 0x3, 0);
+	}
+	/* choose training cs */
+	clrsetbits_le32(PHY_REG(phy_base, 2), 0x33, (0x20 >> cs));
+	/* enable gate training */
+	clrsetbits_le32(PHY_REG(phy_base, 2), 0x33, (0x20 >> cs) | 1);
+	udelay(50);
+	ret = readl(PHY_REG(phy_base, 0xff));
+	/* disable gate training */
+	clrsetbits_le32(PHY_REG(phy_base, 2), 0x33, (0x20 >> cs) | 0);
+	clrbits_le32(PHY_REG(phy_base, 2), 0x30);
+
+	if (dramtype == DDR4) {
+		clrsetbits_le32(PHY_REG(phy_base, 0x29), 0x3, 0x2);
+		clrsetbits_le32(PHY_REG(phy_base, 0x39), 0x3, 0x2);
+		clrsetbits_le32(PHY_REG(phy_base, 0x49), 0x3, 0x2);
+		clrsetbits_le32(PHY_REG(phy_base, 0x59), 0x3, 0x2);
+	}
+
+	if (ret & 0x10) {
+		ret = -1;
+	} else {
+		ret = (ret & 0xf) ^ (readl(PHY_REG(phy_base, 0)) >> 4);
+		ret = (ret == 0) ? 0 : -1;
+	}
+
+	for (i = 0; i < 4; i++) {
+		j = 0x20 + i * 0x10;
+		writel(odt_val, PHY_REG(phy_base, j + 0x1));
+		writel(odt_val, PHY_REG(phy_base, j + 0xe));
+	}
+
+	return ret;
+}
+
+void phy_cfg(void __iomem *phy_base,
+	     struct ddr_phy_regs *phy_regs, struct ddr_phy_skew *skew,
+	     struct sdram_base_params *base, u32 bw)
+{
+	u32 i;
+
+	sdram_phy_dll_bypass_set(phy_base, base->ddr_freq);
+	for (i = 0; phy_regs->phy[i][0] != 0xFFFFFFFF; i++) {
+		writel(phy_regs->phy[i][1],
+		       phy_base + phy_regs->phy[i][0]);
+	}
+	if (bw == 2) {
+		clrsetbits_le32(PHY_REG(phy_base, 0), 0xf << 4, 0xf << 4);
+	} else if (bw == 1) {
+		clrsetbits_le32(PHY_REG(phy_base, 0), 0xf << 4, 3 << 4);
+		/* disable DQS2,DQS3 tx dll  for saving power */
+		clrbits_le32(PHY_REG(phy_base, 0x46), 1 << 3);
+		clrbits_le32(PHY_REG(phy_base, 0x56), 1 << 3);
+	} else {
+		clrsetbits_le32(PHY_REG(phy_base, 0), 0xf << 4, 1 << 4);
+		/* disable DQS2,DQS3 tx dll  for saving power */
+		clrbits_le32(PHY_REG(phy_base, 0x36), 1 << 3);
+		clrbits_le32(PHY_REG(phy_base, 0x46), 1 << 3);
+		clrbits_le32(PHY_REG(phy_base, 0x56), 1 << 3);
+	}
+	sdram_phy_set_ds_odt(phy_base, base->dramtype);
+
+	/* deskew */
+	setbits_le32(PHY_REG(phy_base, 2), 8);
+	sdram_copy_to_reg(PHY_REG(phy_base, 0xb0),
+			  &skew->a0_a1_skew[0], 15 * 4);
+	sdram_copy_to_reg(PHY_REG(phy_base, 0x70),
+			  &skew->cs0_dm0_skew[0], 44 * 4);
+	sdram_copy_to_reg(PHY_REG(phy_base, 0xc0),
+			  &skew->cs1_dm0_skew[0], 44 * 4);
+}
+
diff --git a/drivers/ram/rockchip/sdram_share.c b/drivers/ram/rockchip/sdram_share.c
new file mode 100644
index 0000000000..09bce9d972
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_share.c
@@ -0,0 +1,456 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd.
+ */
+
+#include <common.h>
+#include <debug_uart.h>
+#include <ram.h>
+#include <asm/io.h>
+#include <asm/arch/sdram_common.h>
+#include <asm/arch/sdram_share.h>
+
+void sdram_print_dram_type(unsigned char dramtype)
+{
+	switch (dramtype) {
+	case DDR3:
+		printascii("DDR3");
+		break;
+	case DDR4:
+		printascii("DDR4");
+		break;
+	case LPDDR2:
+		printascii("LPDDR2");
+		break;
+	case LPDDR3:
+		printascii("LPDDR3");
+		break;
+	case LPDDR4:
+		printascii("LPDDR4");
+		break;
+	default:
+		printascii("Unknown Device");
+		break;
+	}
+}
+
+void sdram_print_ddr_info(struct sdram_cap_info *cap_info,
+			  struct sdram_base_params *base, u32 split)
+{
+	u64 cap;
+	u32 bg;
+
+	bg = (cap_info->dbw == 0) ? 2 : 1;
+
+	sdram_print_dram_type(base->dramtype);
+
+	printascii(", ");
+	printdec(base->ddr_freq);
+	printascii("MHz\n");
+
+	printascii("BW=");
+	printdec(8 << cap_info->bw);
+	printascii(" Col=");
+	printdec(cap_info->col);
+	printascii(" Bk=");
+	printdec(0x1 << cap_info->bk);
+	if (base->dramtype == DDR4) {
+		printascii(" BG=");
+		printdec(1 << bg);
+	}
+	printascii(" CS0 Row=");
+	printdec(cap_info->cs0_row);
+	if (cap_info->cs0_high16bit_row !=
+		cap_info->cs0_row) {
+		printascii("/");
+		printdec(cap_info->cs0_high16bit_row);
+	}
+	if (cap_info->rank > 1) {
+		printascii(" CS1 Row=");
+		printdec(cap_info->cs1_row);
+		if (cap_info->cs1_high16bit_row !=
+			cap_info->cs1_row) {
+			printascii("/");
+			printdec(cap_info->cs1_high16bit_row);
+		}
+	}
+	printascii(" CS=");
+	printdec(cap_info->rank);
+	printascii(" Die BW=");
+	printdec(8 << cap_info->dbw);
+
+	cap = sdram_get_cs_cap(cap_info, 3, base->dramtype);
+	if (cap_info->row_3_4)
+		cap = cap * 3 / 4;
+	else if (split)
+		cap = cap / 2 + (split << 24) / 2;
+
+	printascii(" Size=");
+	printdec(cap >> 20);
+	printascii("MB\n");
+}
+
+/*
+ * cs: 0:cs0
+ *	   1:cs1
+ *     else cs0+cs1
+ * note: it didn't consider about row_3_4
+ */
+u64 sdram_get_cs_cap(struct sdram_cap_info *cap_info, u32 cs, u32 dram_type)
+{
+	u32 bg;
+	u64 cap[2];
+
+	if (dram_type == DDR4)
+		/* DDR4 8bit dram BG = 2(4bank groups),
+		 * 16bit dram BG = 1 (2 bank groups)
+		 */
+		bg = (cap_info->dbw == 0) ? 2 : 1;
+	else
+		bg = 0;
+	cap[0] = 1llu << (cap_info->bw + cap_info->col +
+		bg + cap_info->bk + cap_info->cs0_row);
+
+	if (cap_info->rank == 2)
+		cap[1] = 1llu << (cap_info->bw + cap_info->col +
+			bg + cap_info->bk + cap_info->cs1_row);
+	else
+		cap[1] = 0;
+
+	if (cs == 0)
+		return cap[0];
+	else if (cs == 1)
+		return cap[1];
+	else
+		return (cap[0] + cap[1]);
+}
+
+/* n: Unit bytes */
+void sdram_copy_to_reg(u32 *dest, const u32 *src, u32 n)
+{
+	int i;
+
+	for (i = 0; i < n / sizeof(u32); i++) {
+		writel(*src, dest);
+		src++;
+		dest++;
+	}
+}
+
+#ifdef CONFIG_SDRAM_COMMON_OSREG
+void sdram_org_config(struct sdram_cap_info *cap_info,
+		      struct sdram_base_params *base,
+		      u32 *p_os_reg2, u32 *p_os_reg3, u32 channel)
+{
+	*p_os_reg2 |= SYS_REG_ENC_DDRTYPE(base->dramtype);
+	*p_os_reg2 |= SYS_REG_ENC_NUM_CH(base->num_channels);
+
+	*p_os_reg2 |= SYS_REG_ENC_ROW_3_4(cap_info->row_3_4, channel);
+	*p_os_reg2 |= SYS_REG_ENC_CHINFO(channel);
+	*p_os_reg2 |= SYS_REG_ENC_RANK(cap_info->rank, channel);
+	*p_os_reg2 |= SYS_REG_ENC_COL(cap_info->col, channel);
+	*p_os_reg2 |= SYS_REG_ENC_BK(cap_info->bk, channel);
+	*p_os_reg2 |= SYS_REG_ENC_BW(cap_info->bw, channel);
+	*p_os_reg2 |= SYS_REG_ENC_DBW(cap_info->dbw, channel);
+
+	SYS_REG_ENC_CS0_ROW(cap_info->cs0_row, *p_os_reg2, *p_os_reg3, channel);
+	if (cap_info->cs1_row)
+		SYS_REG_ENC_CS1_ROW(cap_info->cs1_row, *p_os_reg2,
+				    *p_os_reg3, channel);
+	*p_os_reg3 |= SYS_REG_ENC_CS1_COL(cap_info->col, channel);
+	*p_os_reg3 |= SYS_REG_ENC_VERSION(DDR_SYS_REG_VERSION);
+}
+#endif
+
+#ifdef CONFIG_SDRAM_COMMON_MSCH_RK3399
+void sdram_msch_config(struct msch_regs *msch,
+		       struct sdram_msch_timings *noc_timings)
+{
+	writel(noc_timings->ddrtiminga0.d32,
+	       &msch->ddrtiminga0.d32);
+	writel(noc_timings->ddrtimingb0.d32,
+	       &msch->ddrtimingb0.d32);
+	writel(noc_timings->ddrtimingc0.d32,
+	       &msch->ddrtimingc0.d32);
+	writel(noc_timings->devtodev0.d32,
+	       &msch->devtodev0.d32);
+	writel(noc_timings->ddrmode.d32,
+	       &msch->ddrmode.d32);
+}
+#endif
+
+#ifdef CONFIG_SDRAM_COMMON_MSCH_PX30
+void sdram_msch_config(struct msch_regs *msch,
+		       struct sdram_msch_timings *noc_timings,
+		       struct sdram_cap_info *cap_info,
+		       struct sdram_base_params *base)
+{
+	u64 cs_cap[2];
+
+	cs_cap[0] = sdram_get_cs_cap(cap_info, 0, base->dramtype);
+	cs_cap[1] = sdram_get_cs_cap(cap_info, 1, base->dramtype);
+	writel(((((cs_cap[1] >> 20) / 64) & 0xff) << 8) |
+			(((cs_cap[0] >> 20) / 64) & 0xff),
+			&msch->devicesize);
+
+	writel(noc_timings->ddrtiminga0.d32,
+	       &msch->ddrtiminga0);
+	writel(noc_timings->ddrtimingb0.d32,
+	       &msch->ddrtimingb0);
+	writel(noc_timings->ddrtimingc0.d32,
+	       &msch->ddrtimingc0);
+	writel(noc_timings->devtodev0.d32,
+	       &msch->devtodev0);
+	writel(noc_timings->ddrmode.d32, &msch->ddrmode);
+	writel(noc_timings->ddr4timing.d32,
+	       &msch->ddr4timing);
+	writel(noc_timings->agingx0, &msch->agingx0);
+	writel(noc_timings->agingx0, &msch->aging0);
+	writel(noc_timings->agingx0, &msch->aging1);
+	writel(noc_timings->agingx0, &msch->aging2);
+	writel(noc_timings->agingx0, &msch->aging3);
+}
+
+#endif
+
+#ifdef CONFIG_SDRAM_COMMON_CAP_DETECT
+int sdram_detect_bw(struct sdram_cap_info *cap_info)
+{
+	return 0;
+}
+
+int sdram_detect_cs(struct sdram_cap_info *cap_info)
+{
+	return 0;
+}
+
+int sdram_detect_col(struct sdram_cap_info *cap_info,
+		     u32 coltmp)
+{
+	void __iomem *test_addr;
+	u32 col;
+	u32 bw = cap_info->bw;
+
+	for (col = coltmp; col >= 9; col -= 1) {
+		writel(0, CONFIG_SYS_SDRAM_BASE);
+		test_addr = (void __iomem *)(CONFIG_SYS_SDRAM_BASE +
+				(1ul << (col + bw - 1ul)));
+		writel(PATTERN, test_addr);
+		if ((readl(test_addr) == PATTERN) &&
+		    (readl(CONFIG_SYS_SDRAM_BASE) == 0))
+			break;
+	}
+	if (col == 8) {
+		printascii("col error\n");
+		return -1;
+	}
+
+	cap_info->col = col;
+
+	return 0;
+}
+
+int sdram_detect_bank(struct sdram_cap_info *cap_info,
+		      u32 coltmp, u32 bktmp)
+{
+	void __iomem *test_addr;
+	u32 bk;
+	u32 bw = cap_info->bw;
+
+	test_addr = (void __iomem *)(CONFIG_SYS_SDRAM_BASE +
+			(1ul << (coltmp + bktmp + bw - 1ul)));
+	writel(0, CONFIG_SYS_SDRAM_BASE);
+	writel(PATTERN, test_addr);
+	if ((readl(test_addr) == PATTERN) &&
+	    (readl(CONFIG_SYS_SDRAM_BASE) == 0))
+		bk = 3;
+	else
+		bk = 2;
+
+	cap_info->bk = bk;
+
+	return 0;
+}
+
+/* detect bg for ddr4 */
+int sdram_detect_bg(struct sdram_cap_info *cap_info,
+		    u32 coltmp)
+{
+	void __iomem *test_addr;
+	u32 dbw;
+	u32 bw = cap_info->bw;
+
+	test_addr = (void __iomem *)(CONFIG_SYS_SDRAM_BASE +
+			(1ul << (coltmp + bw + 1ul)));
+	writel(0, CONFIG_SYS_SDRAM_BASE);
+	writel(PATTERN, test_addr);
+	if ((readl(test_addr) == PATTERN) &&
+	    (readl(CONFIG_SYS_SDRAM_BASE) == 0))
+		dbw = 0;
+	else
+		dbw = 1;
+
+	cap_info->dbw = dbw;
+
+	return 0;
+}
+
+/* detect dbw for ddr3,lpddr2,lpddr3,lpddr4 */
+int sdram_detect_dbw(struct sdram_cap_info *cap_info, u32 dram_type)
+{
+	u32 row, col, bk, bw, cs_cap, cs;
+	u32 die_bw_0 = 0, die_bw_1 = 0;
+
+	if (dram_type == DDR3 || dram_type == LPDDR4) {
+		cap_info->dbw = 1;
+	} else if (dram_type == LPDDR3 || dram_type == LPDDR2) {
+		row = cap_info->cs0_row;
+		col = cap_info->col;
+		bk = cap_info->bk;
+		cs = cap_info->rank;
+		bw = cap_info->bw;
+		cs_cap = (1 << (row + col + bk + bw - 20));
+		if (bw == 2) {
+			if (cs_cap <= 0x2000000) /* 256Mb */
+				die_bw_0 = (col < 9) ? 2 : 1;
+			else if (cs_cap <= 0x10000000) /* 2Gb */
+				die_bw_0 = (col < 10) ? 2 : 1;
+			else if (cs_cap <= 0x40000000) /* 8Gb */
+				die_bw_0 = (col < 11) ? 2 : 1;
+			else
+				die_bw_0 = (col < 12) ? 2 : 1;
+			if (cs > 1) {
+				row = cap_info->cs1_row;
+				cs_cap = (1 << (row + col + bk + bw - 20));
+				if (cs_cap <= 0x2000000) /* 256Mb */
+					die_bw_0 = (col < 9) ? 2 : 1;
+				else if (cs_cap <= 0x10000000) /* 2Gb */
+					die_bw_0 = (col < 10) ? 2 : 1;
+				else if (cs_cap <= 0x40000000) /* 8Gb */
+					die_bw_0 = (col < 11) ? 2 : 1;
+				else
+					die_bw_0 = (col < 12) ? 2 : 1;
+			}
+		} else {
+			die_bw_1 = 1;
+			die_bw_0 = 1;
+		}
+		cap_info->dbw = (die_bw_0 > die_bw_1) ? die_bw_0 : die_bw_1;
+	}
+
+	return 0;
+}
+
+int sdram_detect_row(struct sdram_cap_info *cap_info,
+		     u32 coltmp, u32 bktmp, u32 rowtmp)
+{
+	u32 row;
+	u32 bw = cap_info->bw;
+	void __iomem *test_addr;
+
+	for (row = rowtmp; row > 12; row--) {
+		writel(0, CONFIG_SYS_SDRAM_BASE);
+		test_addr = (void __iomem *)(CONFIG_SYS_SDRAM_BASE +
+				(1ul << (row + bktmp + coltmp + bw - 1ul)));
+		writel(PATTERN, test_addr);
+		if ((readl(test_addr) == PATTERN) &&
+		    (readl(CONFIG_SYS_SDRAM_BASE) == 0))
+			break;
+	}
+	if (row == 12) {
+		printascii("row error");
+		return -1;
+	}
+
+	cap_info->cs0_row = row;
+
+	return 0;
+}
+
+int sdram_detect_row_3_4(struct sdram_cap_info *cap_info,
+			 u32 coltmp, u32 bktmp)
+{
+	u32 row_3_4;
+	u32 bw = cap_info->bw;
+	u32 row = cap_info->cs0_row;
+	void __iomem *test_addr, *test_addr1;
+
+	test_addr = CONFIG_SYS_SDRAM_BASE;
+	test_addr1 = (void __iomem *)(CONFIG_SYS_SDRAM_BASE +
+			(0x3ul << (row + bktmp + coltmp + bw - 1ul - 1ul)));
+
+	writel(0, test_addr);
+	writel(PATTERN, test_addr1);
+	if ((readl(test_addr) == 0) && (readl(test_addr1) == PATTERN))
+		row_3_4 = 0;
+	else
+		row_3_4 = 1;
+
+	cap_info->row_3_4 = row_3_4;
+
+	return 0;
+}
+
+int sdram_detect_high_row(struct sdram_cap_info *cap_info)
+{
+	cap_info->cs0_high16bit_row = cap_info->cs0_row;
+	cap_info->cs1_high16bit_row = cap_info->cs1_row;
+
+	return 0;
+}
+
+int sdram_detect_cs1_row(struct sdram_cap_info *cap_info, u32 dram_type)
+{
+	void __iomem *test_addr;
+	u32 row = 0, bktmp, coltmp, bw;
+	u64 cs0_cap;
+	u32 byte_mask;
+
+	if (cap_info->rank == 2) {
+		cs0_cap = sdram_get_cs_cap(cap_info, 0, dram_type);
+
+		if (dram_type == DDR4) {
+			if (cap_info->dbw == 0)
+				bktmp = cap_info->bk + 2;
+			else
+				bktmp = cap_info->bk + 1;
+		} else {
+			bktmp = cap_info->bk;
+		}
+		bw = cap_info->bw;
+		coltmp = cap_info->col;
+
+		/*
+		 * because px30 support axi split,min bandwidth
+		 * is 8bit. if cs0 is 32bit, cs1 may 32bit or 16bit
+		 * so we check low 16bit data when detect cs1 row.
+		 * if cs0 is 16bit/8bit, we check low 8bit data.
+		 */
+		if (bw == 2)
+			byte_mask = 0xFFFF;
+		else
+			byte_mask = 0xFF;
+
+		/* detect cs1 row */
+		for (row = cap_info->cs0_row; row > 12; row--) {
+			test_addr = (void __iomem *)(CONFIG_SYS_SDRAM_BASE +
+				    cs0_cap +
+				    (1ul << (row + bktmp + coltmp + bw - 1ul)));
+			writel(0, CONFIG_SYS_SDRAM_BASE + cs0_cap);
+			writel(PATTERN, test_addr);
+
+			if (((readl(test_addr) & byte_mask) ==
+			     (PATTERN & byte_mask)) &&
+			    ((readl(CONFIG_SYS_SDRAM_BASE + cs0_cap) &
+			      byte_mask) == 0)) {
+				break;
+			}
+		}
+	}
+
+	cap_info->cs1_row = row;
+
+	return 0;
+}
+#endif
+

commit 8d97d065e23936448f1824d13eeaa7ac098965c6
Author: shengfei Xu <xsf@rock-chips.com>
Date:   Tue Dec 25 14:48:43 2018 +0800

    fuel gauge: rk817/rk809: support rk809
    
    A “battery fuel gauge” is integrated in the RK809. Using
    the proprietary algorithms and the sensed battery current
    and voltage, the gauge can accurately calculate the battery
    capacity based on the charging/discharging characteristics
    of the battery preloaded in the system. The gauge then sends
    the battery capacity information to the processor through
    the I2C interface.
    
    Change-Id: I4d1d0cce8d76f4ec39dfcd00c495c64257fd4b7b
    Signed-off-by: Shengfei Xu <xsf@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk817.c b/drivers/power/fuel_gauge/fg_rk817.c
index 5ba8434d05..f956c1c268 100644
--- a/drivers/power/fuel_gauge/fg_rk817.c
+++ b/drivers/power/fuel_gauge/fg_rk817.c
@@ -252,6 +252,9 @@ struct rk817_battery_device {
 	ulong				finish_chrg_base;
 	ulong				term_sig_base;
 	int				sm_meet_soc;
+	u32				bat_res_up;
+	u32				bat_res_down;
+	u32				variant;
 };
 
 static u32 interpolate(int value, u32 *table, int size)
@@ -337,54 +340,74 @@ static void rk817_bat_init_voltage_kb(struct rk817_battery_device *battery)
 
 	vcalib0 = rk817_bat_get_vaclib0(battery);
 	vcalib1 =  rk817_bat_get_vaclib1(battery);
-	battery->voltage_k = (4025 - 2300) * 1000 / DIV(vcalib1 - vcalib0);
-	battery->voltage_b = 4025 - (battery->voltage_k * vcalib1) / 1000;
+
+	if (battery->variant == RK809_ID) {
+		battery->voltage_k = (1050 - 600) * 1000 / DIV(vcalib1 - vcalib0);
+		battery->voltage_b = 1050 - (battery->voltage_k * vcalib1) / 1000;
+	} else {
+		battery->voltage_k = (4025 - 2300) * 1000 / DIV(vcalib1 - vcalib0);
+		battery->voltage_b = 4025 - (battery->voltage_k * vcalib1) / 1000;
+	}
 }
 
 /* power on battery voltage */
 static int rk817_bat_get_pwron_voltage(struct rk817_battery_device *battery)
 {
-	int vol, val = 0;
+	int vol, val = 0, vol_temp;
 
 	val = rk817_bat_read(battery, PWRON_VOL_H) << 8;
 	val |= rk817_bat_read(battery, PWRON_VOL_L);
 	vol = battery->voltage_k * val / 1000 + battery->voltage_b;
+	if (battery->variant == RK809_ID) {
+		vol_temp = (vol * battery->bat_res_up / battery->bat_res_down + vol);
+		vol = vol_temp;
+	}
 
 	return vol;
 }
 
 static int rk817_bat_get_USB_voltage(struct rk817_battery_device *battery)
 {
-	int vol, val = 0;
+	int vol, val = 0, vol_temp;
 
 	val = rk817_bat_read(battery, USB_VOL_L) << 0;
 	val |= rk817_bat_read(battery, USB_VOL_H) << 8;
 
 	vol = (battery->voltage_k * val / 1000 + battery->voltage_b) * 60 / 46;
+	if (battery->variant == RK809_ID) {
+		vol_temp = vol * battery->bat_res_up / battery->bat_res_down + vol;
+		vol = vol_temp;
+	}
 
 	return vol;
 }
 
 static int rk817_bat_get_sys_voltage(struct rk817_battery_device *battery)
 {
-	int vol, val = 0;
+	int vol, val = 0, vol_temp;
 
 	val = rk817_bat_read(battery, SYS_VOL_H) << 8;
 	val |= rk817_bat_read(battery, SYS_VOL_L) << 0;
 
 	vol = (battery->voltage_k * val / 1000 + battery->voltage_b) * 60 / 46;
+	if (battery->variant == RK809_ID) {
+		vol_temp = vol * battery->bat_res_up / battery->bat_res_down + vol;
+		vol = vol_temp;
+	}
 
 	return vol;
 }
 
 static int rk817_bat_get_battery_voltage(struct rk817_battery_device *battery)
 {
-	int vol, val = 0;
+	int vol, val = 0, vol_temp;
 
 	val = rk817_bat_read(battery, BAT_VOL_H) << 8;
 	val |= rk817_bat_read(battery, BAT_VOL_L) << 0;
 
 	vol = battery->voltage_k * val / 1000 + battery->voltage_b;
+	vol_temp = (vol * battery->bat_res_up / battery->bat_res_down + vol);
+	vol = vol_temp;
 
 	return vol;
 }
@@ -921,21 +944,26 @@ static int rk817_bat_update_get_current(struct udevice *dev)
 		return VIRTUAL_POWER_CUR;
 }
 
-static int rk817_bat_dwc_otg_check_dpdm(void)
+static int rk817_bat_dwc_otg_check_dpdm(struct rk817_battery_device *battery)
 {
-	return rockchip_chg_get_type();
+	if (battery->variant == RK809_ID)
+		return 0;
+	else
+		return  rockchip_chg_get_type();
 }
 
 static bool rk817_bat_update_get_chrg_online(struct udevice *dev)
 {
-	return rk817_bat_dwc_otg_check_dpdm();
+	struct rk817_battery_device *battery = dev_get_priv(dev);
+
+	return rk817_bat_dwc_otg_check_dpdm(battery);
 }
 
 static int rk817_bat_get_usb_state(struct rk817_battery_device *battery)
 {
 	int charger_type;
 
-	switch (rk817_bat_dwc_otg_check_dpdm()) {
+	switch (rk817_bat_dwc_otg_check_dpdm(battery)) {
 	case POWER_SUPPLY_TYPE_UNKNOWN:
 		if ((rk817_bat_read(battery, PMIC_SYS_STS) & PLUG_IN_STS) != 0)
 			charger_type = DC_CHARGER;
@@ -1191,14 +1219,14 @@ static int rk817_fg_ofdata_to_platdata(struct udevice *dev)
 	int  len, value;
 	int i;
 
-	if (rk8xx->variant != 0x8170) {
+	if ((rk8xx->variant != RK817_ID) && (rk8xx->variant != RK809_ID)) {
 		debug("%s: Not support pmic variant: rk%x\n",
 		      __func__, rk8xx->variant);
 		return -EINVAL;
 	}
 
 	battery->dev = dev;
-
+	battery->variant = rk8xx->variant;
 	/* Parse ocv table */
 	prop = dev_read_prop(dev, "ocv_table", &len);
 	if (!prop) {
@@ -1233,6 +1261,20 @@ static int rk817_fg_ofdata_to_platdata(struct udevice *dev)
 		return -EINVAL;
 	}
 
+	if (rk8xx->variant == RK809_ID) {
+		battery->bat_res_up  = dev_read_u32_default(dev, "bat_res_up", -1);
+		if (battery->bat_res_up < 0) {
+			printf("can't read bat_res_up\n");
+			return -EINVAL;
+		}
+
+		battery->bat_res_down  = dev_read_u32_default(dev, "bat_res_down", -1);
+		if (battery->bat_res_down < 0) {
+			printf("can't read bat_res_down\n");
+			return -EINVAL;
+		}
+	}
+
 	value = dev_read_u32_default(dev, "sample_res", -1);
 	if (battery->res_div < 0)
 		printf("read sample_res error\n");
@@ -1246,6 +1288,8 @@ static int rk817_fg_ofdata_to_platdata(struct udevice *dev)
 	DBG("ocvsize: %d\n", battery->ocv_size);
 	DBG("battery->design_cap: %d\n", battery->design_cap);
 	DBG("battery->qmax: %d\n", battery->qmax);
+	DBG("battery->bat_res_up: %d\n", battery->bat_res_up);
+	DBG("battery->bat_res_down: %d\n", battery->bat_res_down);
 
 	return 0;
 }
@@ -1256,9 +1300,10 @@ static int rk817_fg_init(struct rk817_battery_device *battery)
 
 	value = rk817_bat_read(battery, GG_CON);
 	rk817_bat_write(battery, GG_CON, value | VOL_OUPUT_INSTANT_MODE);
-	value =  rk817_bat_read(battery, BAT_DISCHRG);
-	rk817_bat_write(battery, GG_CON, value & (~DIS_ILIM_EN));
-
+	if (battery->variant == RK817_ID) {
+		value =  rk817_bat_read(battery, BAT_DISCHRG);
+		rk817_bat_write(battery, GG_CON, value & (~DIS_ILIM_EN));
+	}
 	rk817_bat_gas_gaugle_enable(battery);
 	rk817_bat_init_voltage_kb(battery);
 	rk817_bat_calibration(battery);
@@ -1282,7 +1327,8 @@ static int rk817_fg_init(struct rk817_battery_device *battery)
 	battery->dbg_pwr_rsoc = battery->rsoc;
 	battery->dbg_pwr_vol = battery->voltage_avg;
 
-	rk817_bat_charger_setting(battery, battery->chrg_type);
+	if (battery->variant == RK817_ID)
+		rk817_bat_charger_setting(battery, battery->chrg_type);
 
 	DBG("voltage_k = %d, voltage_b = %d\n",
 	    battery->voltage_k, battery->voltage_b);
@@ -1306,7 +1352,7 @@ static int rk817_fg_probe(struct udevice *dev)
 	struct rk8xx_priv *priv = dev_get_priv(dev->parent);
 	struct rk817_battery_device *battery = dev_get_priv(dev);
 
-	if (priv->variant != 0x8170) {
+	if ((priv->variant != RK817_ID) && ((priv->variant != RK809_ID))) {
 		debug("Not support pmic variant: rk%x\n", priv->variant);
 		return -EINVAL;
 	}

commit 3e19306671294c0958598932362ba1f2d8f5fec2
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Mon Dec 24 11:24:39 2018 +0800

    cmd: memtester: add cpu data to io remap
    
    Change-Id: Ia9e2e6014c162cc929f5cbcb1559c91245c273bd
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/cmd/memtester/Makefile b/cmd/memtester/Makefile
index 4608e92fb0..ad7f391227 100644
--- a/cmd/memtester/Makefile
+++ b/cmd/memtester/Makefile
@@ -1,2 +1,3 @@
 obj-$(CONFIG_CMD_MEMTESTER) += tests.o
-obj-$(CONFIG_CMD_MEMTESTER) += memtester.o
\ No newline at end of file
+obj-$(CONFIG_CMD_MEMTESTER) += memtester.o
+obj-$(CONFIG_CMD_MEMTESTER) += io_map.o
diff --git a/cmd/memtester/io_map.c b/cmd/memtester/io_map.c
new file mode 100644
index 0000000000..88b0d3b66a
--- /dev/null
+++ b/cmd/memtester/io_map.c
@@ -0,0 +1,91 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Very simple but very effective user-space memory tester.
+ * Originally by Simon Kirby <sim@stormix.com> <sim@neato.org>
+ * Version 2 by Charles Cazabon <charlesc-memtester@pyropus.ca>
+ * Version 3 not publicly released.
+ * Version 4 rewrite:
+ * Copyright (C) 2004-2012 Charles Cazabon <charlesc-memtester@pyropus.ca>
+ * Licensed under the terms of the GNU General Public License version 2 (only).
+ * See the file COPYING for details.
+ *
+ * This file contains the functions for the actual tests, called from the
+ * main routine in memtester.c.  See other comments in that file.
+ *
+ */
+#include <common.h>
+#include "io_map.h"
+
+#define IO_TYPE_1_1_16	0
+#define IO_TYPE_1_1_32	1
+#define IO_TYPE_1_2		2
+#define IO_TYPE_2		3
+
+static u32 io_type;
+
+/* len should be 16byte align */
+int data_cpu_2_io(void *p, u32 len)
+{
+	uchar *val = p;
+	uchar buf[16];
+	u32 i, j;
+
+	if ((len % sizeof(buf)) || !len)
+		return -1;
+
+	if (io_type == IO_TYPE_1_2) {
+		len /= sizeof(buf);
+		for (j = 0; j < len; j++) {
+			memset(buf, 0, sizeof(buf));
+			for (i = 0; i < sizeof(buf); i++)
+				buf[i] = val[(i % 4) * 4 + i / 4 + j * sizeof(buf)];
+			memcpy(&val[j * sizeof(buf)], buf, sizeof(buf));
+		}
+	} else if (io_type == IO_TYPE_1_1_32) {
+		len /= 8;
+		for (j = 0; j < len; j++) {
+			memset(buf, 0, sizeof(buf));
+			for (i = 0; i < 8; i++)
+				buf[i] = val[(i % 4) * 2 + i / 4 + j * 8];
+			memcpy(&val[j * 8], buf, 8);
+		}
+	}
+	/* IO_TYPE_2 and IO_TYPE_1_1_16 do nothing*/
+	return 0;
+}
+
+void data_cpu_2_io_init(void)
+{
+	u32 osreg = 0;
+	u32 bw;
+
+#if defined(CONFIG_ROCKCHIP_RK3036)
+	io_type = IO_TYPE_1_1_16;
+#elif defined(CONFIG_ROCKCHIP_RK3228) ||	\
+	defined(CONFIG_ROCKCHIP_RV1108) ||	\
+	defined(CONFIG_ROCKCHIP_RK3368) ||	\
+	defined(CONFIG_ROCKCHIP_RK3366)
+	io_type = IO_TYPE_1_2;
+#elif defined(CONFIG_ROCKCHIP_RK3128)
+	osreg = 0x200081cc;
+#elif defined(CONFIG_ROCKCHIP_RK3288)
+	osreg = 0xff73009c;
+#elif defined(CONFIG_ROCKCHIP_RK3188)
+	osreg = 0x20004048;
+#elif defined(CONFIG_ROCKCHIP_RK3328) || \
+	defined(CONFIG_ROCKCHIP_PX30) ||	\
+	defined(CONFIG_ROCKCHIP_RK1808)
+	io_type = IO_TYPE_2;
+#else
+	io_type = IO_TYPE_2;
+#endif
+
+	if (osreg) {
+		bw = (2 >> ((osreg >> 2) & 0x3));
+		if (bw == 2)
+			io_type = IO_TYPE_1_1_32;
+		else
+			io_type = IO_TYPE_1_1_16;
+	}
+}
+
diff --git a/cmd/memtester/io_map.h b/cmd/memtester/io_map.h
new file mode 100644
index 0000000000..abcb5d0660
--- /dev/null
+++ b/cmd/memtester/io_map.h
@@ -0,0 +1,13 @@
+/*
+ * Copyright (C) 2017 Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _CMD_MEMTESTER_IO_MAP_H
+#define _CMD_MEMTESTER_IO_MAP_H
+
+int data_cpu_2_io(void *p, u32 len);
+void data_cpu_2_io_init(void);
+
+#endif /* _CMD_MEMTESTER_IO_MAP_H */
diff --git a/cmd/memtester/memtester.c b/cmd/memtester/memtester.c
index 1726b17f55..9c35acc16a 100644
--- a/cmd/memtester/memtester.c
+++ b/cmd/memtester/memtester.c
@@ -20,6 +20,7 @@
 #include "sizes.h"
 #include "types.h"
 #include "tests.h"
+#include "io_map.h"
 
 #define EXIT_FAIL_NONSTARTER    0x01
 #define EXIT_FAIL_ADDRESSLINES  0x02
@@ -148,6 +149,8 @@ static int do_memtester(cmd_tbl_t *cmdtp, int flag, int argc,
 		}
 	}
 
+	data_cpu_2_io_init();
+
 	for (loop = 1; ((!loops) || loop <= loops); loop++) {
 		for (j = 0; j < 2; j++) {
 			if (!bufa[j])
diff --git a/cmd/memtester/tests.c b/cmd/memtester/tests.c
index 6ecd047846..f50db4c19e 100644
--- a/cmd/memtester/tests.c
+++ b/cmd/memtester/tests.c
@@ -17,6 +17,7 @@
 #include "memtester.h"
 #include "sizes.h"
 #include "types.h"
+#include "io_map.h"
 
 union {
 	unsigned char bytes[UL_LEN / 8];
@@ -239,6 +240,7 @@ int test_solidbits_comparison(u32v *bufa, u32v *bufb, size_t count)
 	u32v *p2 = bufb;
 	unsigned int j;
 	u32 q;
+	u32 data[4];
 	size_t i;
 
 	printf("           ");
@@ -246,12 +248,15 @@ int test_solidbits_comparison(u32v *bufa, u32v *bufb, size_t count)
 	for (j = 0; j < 64; j++) {
 		printf("\b\b\b\b\b\b\b\b\b\b\b");
 		q = (j % 2) == 0 ? UL_ONEBITS : 0;
+		data[0] = data[2] = q;
+		data[1] = data[3] = ~q;
+		data_cpu_2_io(data, sizeof(data));
 		printf("setting %3u", j);
 		fflush(stdout);
 		p1 = (u32v *)bufa;
 		p2 = (u32v *)bufb;
 		for (i = 0; i < count; i++)
-			*p1++ = *p2++ = (i % 2) == 0 ? q : ~q;
+			*p1++ = *p2++ = data[i & 3];
 		printf("\b\b\b\b\b\b\b\b\b\b\b");
 		printf("testing %3u", j);
 		fflush(stdout);
@@ -269,6 +274,7 @@ int test_checkerboard_comparison(u32v *bufa, u32v *bufb, size_t count)
 	u32v *p2 = bufb;
 	unsigned int j;
 	u32 q;
+	u32 data[4];
 	size_t i;
 
 	printf("           ");
@@ -276,12 +282,15 @@ int test_checkerboard_comparison(u32v *bufa, u32v *bufb, size_t count)
 	for (j = 0; j < 64; j++) {
 		printf("\b\b\b\b\b\b\b\b\b\b\b");
 		q = (j % 2) == 0 ? CHECKERBOARD1 : CHECKERBOARD2;
+		data[0] = data[2] = q;
+		data[1] = data[3] = ~q;
+		data_cpu_2_io(data, sizeof(data));
 		printf("setting %3u", j);
 		fflush(stdout);
 		p1 = (u32v *)bufa;
 		p2 = (u32v *)bufb;
 		for (i = 0; i < count; i++)
-			*p1++ = *p2++ = (i % 2) == 0 ? q : ~q;
+			*p1++ = *p2++ = data[i & 3];
 		printf("\b\b\b\b\b\b\b\b\b\b\b");
 		printf("testing %3u", j);
 		fflush(stdout);
@@ -298,6 +307,7 @@ int test_blockseq_comparison(u32v *bufa, u32v *bufb, size_t count)
 	u32v *p1 = bufa;
 	u32v *p2 = bufb;
 	unsigned int j;
+	u32 data[4];
 	size_t i;
 
 	printf("           ");
@@ -308,8 +318,12 @@ int test_blockseq_comparison(u32v *bufa, u32v *bufb, size_t count)
 		p2 = (u32v *)bufb;
 		printf("setting %3u", j);
 		fflush(stdout);
+		data[0] = data[2] = (u32)UL_BYTE(j);
+		data[1] = data[3] = (u32)UL_BYTE(j);
+		data_cpu_2_io(data, sizeof(data));
+
 		for (i = 0; i < count; i++)
-			*p1++ = *p2++ = (u32)UL_BYTE(j);
+			*p1++ = *p2++ = data[i & 3];
 		printf("\b\b\b\b\b\b\b\b\b\b\b");
 		printf("testing %3u", j);
 		fflush(stdout);
@@ -326,6 +340,7 @@ int test_walkbits0_comparison(u32v *bufa, u32v *bufb, size_t count)
 	u32v *p1 = bufa;
 	u32v *p2 = bufb;
 	unsigned int j;
+	u32 data[4];
 	size_t i;
 
 	printf("           ");
@@ -336,12 +351,17 @@ int test_walkbits0_comparison(u32v *bufa, u32v *bufb, size_t count)
 		p2 = (u32v *)bufb;
 		printf("setting %3u", j);
 		fflush(stdout);
+		if (j < UL_LEN)
+			data[0] = ONE << j;
+		else
+			data[0] = ONE << (UL_LEN * 2 - j - 1);
+		data[1] = data[0];
+		data[2] = data[0];
+		data[3] = data[0];
+		data_cpu_2_io(data, sizeof(data));
+
 		for (i = 0; i < count; i++) {
-			if (j < UL_LEN) {	/* Walk it up. */
-				*p1++ = *p2++ = ONE << j;
-			} else {	/* Walk it back down. */
-				*p1++ = *p2++ = ONE << (UL_LEN * 2 - j - 1);
-			}
+				*p1++ = *p2++ = data[i & 3];
 		}
 		printf("\b\b\b\b\b\b\b\b\b\b\b");
 		printf("testing %3u", j);
@@ -359,6 +379,7 @@ int test_walkbits1_comparison(u32v *bufa, u32v *bufb, size_t count)
 	u32v *p1 = bufa;
 	u32v *p2 = bufb;
 	unsigned int j;
+	u32 data[4];
 	size_t i;
 
 	printf("           ");
@@ -369,13 +390,17 @@ int test_walkbits1_comparison(u32v *bufa, u32v *bufb, size_t count)
 		p2 = (u32v *)bufb;
 		printf("setting %3u", j);
 		fflush(stdout);
+		if (j < UL_LEN)
+			data[0] = UL_ONEBITS ^ (ONE << j);
+		else
+			data[0] = UL_ONEBITS ^ (ONE << (UL_LEN * 2 - j - 1));
+		data[1] = data[0];
+		data[2] = data[0];
+		data[3] = data[0];
+		data_cpu_2_io(data, sizeof(data));
+
 		for (i = 0; i < count; i++) {
-			if (j < UL_LEN) {	/* Walk it up. */
-				*p1++ = *p2++ = UL_ONEBITS ^ (ONE << j);
-			} else {	/* Walk it back down. */
-				*p1++ = *p2++ =
-				    UL_ONEBITS ^ (ONE << (UL_LEN * 2 - j - 1));
-			}
+				*p1++ = *p2++ = data[i & 3];
 		}
 		printf("\b\b\b\b\b\b\b\b\b\b\b");
 		printf("testing %3u", j);
@@ -393,6 +418,7 @@ int test_bitspread_comparison(u32v *bufa, u32v *bufb, size_t count)
 	u32v *p1 = bufa;
 	u32v *p2 = bufb;
 	unsigned int j;
+	u32 data[4];
 	size_t i;
 
 	printf("           ");
@@ -403,22 +429,21 @@ int test_bitspread_comparison(u32v *bufa, u32v *bufb, size_t count)
 		p2 = (u32v *)bufb;
 		printf("setting %3u", j);
 		fflush(stdout);
+		if (j < UL_LEN) {
+			data[0] = (ONE << j) | (ONE << (j + 2));
+			data[1] = UL_ONEBITS ^ ((ONE << j) | (ONE << (j + 2)));
+		} else {
+			data[0] = (ONE << (UL_LEN * 2 - 1 - j)) |
+				  (ONE << (UL_LEN * 2 + 1 - j));
+			data[1] = UL_ONEBITS ^ (ONE << (UL_LEN * 2 - 1 - j)
+						| (ONE << (UL_LEN * 2 + 1 - j)));
+		}
+		data[2] = data[0];
+		data[3] = data[1];
+		data_cpu_2_io(data, sizeof(data));
+
 		for (i = 0; i < count; i++) {
-			if (j < UL_LEN) {	/* Walk it up. */
-				*p1++ = *p2++ = (i % 2 == 0)
-				    ? (ONE << j) | (ONE << (j + 2))
-				    : UL_ONEBITS ^ ((ONE << j)
-						    | (ONE << (j + 2)));
-			} else {	/* Walk it back down. */
-				*p1++ = *p2++ = (i % 2 == 0)
-				    ? (ONE << (UL_LEN * 2 - 1 - j)) | (ONE <<
-								       (UL_LEN *
-									2 + 1 -
-									j))
-				    : UL_ONEBITS ^ (ONE << (UL_LEN * 2 - 1 - j)
-						    | (ONE <<
-						       (UL_LEN * 2 + 1 - j)));
-			}
+			*p1++ = *p2++ = data[i & 3];
 		}
 		printf("\b\b\b\b\b\b\b\b\b\b\b");
 		printf("testing %3u", j);
@@ -437,6 +462,7 @@ int test_bitflip_comparison(u32v *bufa, u32v *bufb, size_t count)
 	u32v *p2 = bufb;
 	unsigned int j, k;
 	u32 q;
+	u32 data[4];
 	size_t i;
 
 	printf("           ");
@@ -448,10 +474,13 @@ int test_bitflip_comparison(u32v *bufa, u32v *bufb, size_t count)
 			q = ~q;
 			printf("setting %3u", k * 8 + j);
 			fflush(stdout);
+			data[0] = data[2] = q;
+			data[1] = data[3] = ~q;
+			data_cpu_2_io(data, sizeof(data));
 			p1 = (u32v *)bufa;
 			p2 = (u32v *)bufb;
 			for (i = 0; i < count; i++)
-				*p1++ = *p2++ = (i % 2) == 0 ? q : ~q;
+				*p1++ = *p2++ = data[i & 3];
 			printf("\b\b\b\b\b\b\b\b\b\b\b");
 			printf("testing %3u", k * 8 + j);
 			fflush(stdout);

commit 614eb1970c6dca08122f469737584d386e62d7d7
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Wed Dec 19 09:39:51 2018 +0800

    cmd: memtester: fix dram bandwidth to 32bit
    
    For all rk chip, bandwidth is 32bit. Fix to 32bit to improve test
    effect.
    
    Change-Id: I4b7f2f3722d6c820886bec46179badc73719496a
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/cmd/memtester/memtester.c b/cmd/memtester/memtester.c
index 996cb9ba33..1726b17f55 100644
--- a/cmd/memtester/memtester.c
+++ b/cmd/memtester/memtester.c
@@ -62,7 +62,7 @@ static int do_memtester(cmd_tbl_t *cmdtp, int flag, int argc,
 	ul loop, i, j;
 	ul buf_start;
 	ul start_adr[2], length[2];
-	ulv * bufa[2], *bufb[2];
+	u32v * bufa[2], *bufb[2];
 	ul count[2];
 	ul bufsize = 0;
 	ul loops = 0;
@@ -117,14 +117,14 @@ static int do_memtester(cmd_tbl_t *cmdtp, int flag, int argc,
 	if (!bufsize) {
 		/* test all memory */
 		for (i = 0; i < 2; i++) {
-			bufa[i] = (ulv *)start_adr[i];
-			bufb[i] = (ulv *)(start_adr[i] + length[i] / 2);
-			count[i] = length[i] / 2 / sizeof(ul);
+			bufa[i] = (u32v *)start_adr[i];
+			bufb[i] = (u32v *)(start_adr[i] + length[i] / 2);
+			count[i] = length[i] / 2 / sizeof(u32);
 		}
 	} else {
-		bufa[0] = (ulv *)buf_start;
-		bufb[0] = (ulv *)(buf_start + bufsize / 2);
-		count[0] = bufsize / 2 / sizeof(ul);
+		bufa[0] = (u32v *)buf_start;
+		bufb[0] = (u32v *)(buf_start + bufsize / 2);
+		count[0] = bufsize / 2 / sizeof(u32);
 		bufa[1] = 0;
 		if (start_adr[1]) {
 			if (buf_start < start_adr[0] ||
@@ -153,7 +153,7 @@ static int do_memtester(cmd_tbl_t *cmdtp, int flag, int argc,
 			if (!bufa[j])
 				continue;
 			printf("testing:0x%lx - 0x%lx\n", (ul)bufa[j],
-			       (ul)bufa[j] + count[j] * 2 * sizeof(ul));
+			       (ul)bufa[j] + count[j] * 2 * sizeof(u32));
 			printf("Loop %lu", loop);
 			if (loops)
 				printf("/%lu", loops);
diff --git a/cmd/memtester/sizes.h b/cmd/memtester/sizes.h
index 79eba1b699..8c86e11794 100644
--- a/cmd/memtester/sizes.h
+++ b/cmd/memtester/sizes.h
@@ -19,22 +19,11 @@
 
 #define rand32() ((unsigned int)rand() | ((unsigned int)rand() << 16))
 
-#ifndef CONFIG_ARM64
 #define rand_ul() rand32()
 #define UL_ONEBITS 0xffffffff
 #define UL_LEN 32
 #define CHECKERBOARD1 0x55555555
 #define CHECKERBOARD2 0xaaaaaaaa
 #define UL_BYTE(x) ((x | x << 8 | x << 16 | x << 24))
-#else
-#define rand64() (((ul)rand32()) << 32 | ((ul)rand32()))
-#define rand_ul() rand64()
-#define UL_ONEBITS 0xffffffffffffffffUL
-#define UL_LEN 64
-#define CHECKERBOARD1 0x5555555555555555
-#define CHECKERBOARD2 0xaaaaaaaaaaaaaaaa
-#define UL_BYTE(x) (((ul)x | (ul)x << 8 | (ul)x << 16 | (ul)x << 24 |	\
-		    (ul)x << 32 | (ul)x << 40 | (ul)x << 48 | (ul)x << 56))
-#endif
 
 #endif /* __MEMTESTER_SIZES_H */
diff --git a/cmd/memtester/tests.c b/cmd/memtester/tests.c
index 327f983619..6ecd047846 100644
--- a/cmd/memtester/tests.c
+++ b/cmd/memtester/tests.c
@@ -20,12 +20,12 @@
 
 union {
 	unsigned char bytes[UL_LEN / 8];
-	ul val;
+	u32 val;
 } mword8;
 
 union {
 	unsigned short u16s[UL_LEN / 16];
-	ul val;
+	u32 val;
 } mword16;
 
 char progress[] = "-\\|/";
@@ -36,18 +36,18 @@ char progress[] = "-\\|/";
 #define fflush(n)
 
 /* Function definitions. */
-int compare_regions(ulv *bufa, ulv *bufb, size_t count)
+int compare_regions(u32v *bufa, u32v *bufb, size_t count)
 {
 	int r = 0;
 	size_t i;
-	ulv *p1 = bufa;
-	ulv *p2 = bufb;
+	u32v *p1 = bufa;
+	u32v *p2 = bufb;
 	off_t physaddr;
 
 	for (i = 0; i < count; i++, p1++, p2++) {
 		if (*p1 != *p2) {
 			if (use_phys) {
-				physaddr = physaddrbase + (i * sizeof(ul));
+				physaddr = physaddrbase + (i * sizeof(u32v));
 				fprintf(stderr,
 					"FAILURE: 0x%08lx != 0x%08lx at physical address "
 					"0x%08lx.\n",
@@ -56,7 +56,7 @@ int compare_regions(ulv *bufa, ulv *bufb, size_t count)
 				fprintf(stderr,
 					"FAILURE: 0x%08lx != 0x%08lx at offset 0x%08lx.\n",
 					(ul)*p1, (ul)*p2,
-					(ul)(i * sizeof(ul)));
+					(ul)(i * sizeof(u32v)));
 			}
 			/* printf("Skipping to next test..."); */
 			r = -1;
@@ -65,9 +65,9 @@ int compare_regions(ulv *bufa, ulv *bufb, size_t count)
 	return r;
 }
 
-int test_stuck_address(ulv *bufa, size_t count)
+int test_stuck_address(u32v *bufa, size_t count)
 {
-	ulv *p1 = bufa;
+	u32v *p1 = bufa;
 	unsigned int j;
 	size_t i;
 	off_t physaddr;
@@ -76,23 +76,23 @@ int test_stuck_address(ulv *bufa, size_t count)
 	fflush(stdout);
 	for (j = 0; j < 16; j++) {
 		printf("\b\b\b\b\b\b\b\b\b\b\b");
-		p1 = (ulv *)bufa;
+		p1 = (u32v *)bufa;
 		printf("setting %3u", j);
 		fflush(stdout);
 		for (i = 0; i < count; i++) {
-			*p1 = ((j + i) % 2) == 0 ? (ul)p1 : ~((ul)p1);
+			*p1 = ((j + i) % 2) == 0 ? (u32)(ul)p1 : ~((u32)(ul)p1);
 			*p1++;
 		}
 		printf("\b\b\b\b\b\b\b\b\b\b\b");
 		printf("testing %3u", j);
 		fflush(stdout);
-		p1 = (ulv *)bufa;
+		p1 = (u32v *)bufa;
 		for (i = 0; i < count; i++, p1++) {
-			if (*p1 !=
-				(((j + i) % 2) == 0 ? (ul)p1 : ~((ul)p1))) {
+			if (*p1 != (((j + i) % 2) == 0 ?
+				    (u32)(ul)p1 : ~((u32)(ul)p1))) {
 				if (use_phys) {
 					physaddr =
-					    physaddrbase + (i * sizeof(ul));
+					    physaddrbase + (i * sizeof(u32v));
 					fprintf(stderr,
 						"FAILURE: possible bad address line at physical "
 						"address 0x%08lx.\n", physaddr);
@@ -100,7 +100,7 @@ int test_stuck_address(ulv *bufa, size_t count)
 					fprintf(stderr,
 						"FAILURE: possible bad address line at offset "
 						"0x%08lx.\n",
-						(ul)(i * sizeof(ul)));
+						(ul)(i * sizeof(u32v)));
 				}
 				printf("Skipping to next test...\n");
 				fflush(stdout);
@@ -113,10 +113,10 @@ int test_stuck_address(ulv *bufa, size_t count)
 	return 0;
 }
 
-int test_random_value(ulv *bufa, ulv *bufb, size_t count)
+int test_random_value(u32v *bufa, u32v *bufb, size_t count)
 {
-	ulv *p1 = bufa;
-	ulv *p2 = bufb;
+	u32v *p1 = bufa;
+	u32v *p2 = bufb;
 	ul j = 0;
 	size_t i;
 
@@ -135,12 +135,12 @@ int test_random_value(ulv *bufa, ulv *bufb, size_t count)
 	return compare_regions(bufa, bufb, count);
 }
 
-int test_xor_comparison(ulv *bufa, ulv *bufb, size_t count)
+int test_xor_comparison(u32v *bufa, u32v *bufb, size_t count)
 {
-	ulv *p1 = bufa;
-	ulv *p2 = bufb;
+	u32v *p1 = bufa;
+	u32v *p2 = bufb;
 	size_t i;
-	ul q = rand_ul();
+	u32 q = rand_ul();
 
 	for (i = 0; i < count; i++) {
 		*p1++ ^= q;
@@ -149,12 +149,12 @@ int test_xor_comparison(ulv *bufa, ulv *bufb, size_t count)
 	return compare_regions(bufa, bufb, count);
 }
 
-int test_sub_comparison(ulv *bufa, ulv *bufb, size_t count)
+int test_sub_comparison(u32v *bufa, u32v *bufb, size_t count)
 {
-	ulv *p1 = bufa;
-	ulv *p2 = bufb;
+	u32v *p1 = bufa;
+	u32v *p2 = bufb;
 	size_t i;
-	ul q = rand_ul();
+	u32 q = rand_ul();
 
 	for (i = 0; i < count; i++) {
 		*p1++ -= q;
@@ -163,12 +163,12 @@ int test_sub_comparison(ulv *bufa, ulv *bufb, size_t count)
 	return compare_regions(bufa, bufb, count);
 }
 
-int test_mul_comparison(ulv *bufa, ulv *bufb, size_t count)
+int test_mul_comparison(u32v *bufa, u32v *bufb, size_t count)
 {
-	ulv *p1 = bufa;
-	ulv *p2 = bufb;
+	u32v *p1 = bufa;
+	u32v *p2 = bufb;
 	size_t i;
-	ul q = rand_ul();
+	u32 q = rand_ul();
 
 	for (i = 0; i < count; i++) {
 		*p1++ *= q;
@@ -177,12 +177,12 @@ int test_mul_comparison(ulv *bufa, ulv *bufb, size_t count)
 	return compare_regions(bufa, bufb, count);
 }
 
-int test_div_comparison(ulv *bufa, ulv *bufb, size_t count)
+int test_div_comparison(u32v *bufa, u32v *bufb, size_t count)
 {
-	ulv *p1 = bufa;
-	ulv *p2 = bufb;
+	u32v *p1 = bufa;
+	u32v *p2 = bufb;
 	size_t i;
-	ul q = rand_ul();
+	u32 q = rand_ul();
 
 	for (i = 0; i < count; i++) {
 		if (!q)
@@ -193,12 +193,12 @@ int test_div_comparison(ulv *bufa, ulv *bufb, size_t count)
 	return compare_regions(bufa, bufb, count);
 }
 
-int test_or_comparison(ulv *bufa, ulv *bufb, size_t count)
+int test_or_comparison(u32v *bufa, u32v *bufb, size_t count)
 {
-	ulv *p1 = bufa;
-	ulv *p2 = bufb;
+	u32v *p1 = bufa;
+	u32v *p2 = bufb;
 	size_t i;
-	ul q = rand_ul();
+	u32 q = rand_ul();
 
 	for (i = 0; i < count; i++) {
 		*p1++ |= q;
@@ -207,12 +207,12 @@ int test_or_comparison(ulv *bufa, ulv *bufb, size_t count)
 	return compare_regions(bufa, bufb, count);
 }
 
-int test_and_comparison(ulv *bufa, ulv *bufb, size_t count)
+int test_and_comparison(u32v *bufa, u32v *bufb, size_t count)
 {
-	ulv *p1 = bufa;
-	ulv *p2 = bufb;
+	u32v *p1 = bufa;
+	u32v *p2 = bufb;
 	size_t i;
-	ul q = rand_ul();
+	u32 q = rand_ul();
 
 	for (i = 0; i < count; i++) {
 		*p1++ &= q;
@@ -221,24 +221,24 @@ int test_and_comparison(ulv *bufa, ulv *bufb, size_t count)
 	return compare_regions(bufa, bufb, count);
 }
 
-int test_seqinc_comparison(ulv *bufa, ulv *bufb, size_t count)
+int test_seqinc_comparison(u32v *bufa, u32v *bufb, size_t count)
 {
-	ulv *p1 = bufa;
-	ulv *p2 = bufb;
+	u32v *p1 = bufa;
+	u32v *p2 = bufb;
 	size_t i;
-	ul q = rand_ul();
+	u32 q = rand_ul();
 
 	for (i = 0; i < count; i++)
 		*p1++ = *p2++ = (i + q);
 	return compare_regions(bufa, bufb, count);
 }
 
-int test_solidbits_comparison(ulv *bufa, ulv *bufb, size_t count)
+int test_solidbits_comparison(u32v *bufa, u32v *bufb, size_t count)
 {
-	ulv *p1 = bufa;
-	ulv *p2 = bufb;
+	u32v *p1 = bufa;
+	u32v *p2 = bufb;
 	unsigned int j;
-	ul q;
+	u32 q;
 	size_t i;
 
 	printf("           ");
@@ -248,8 +248,8 @@ int test_solidbits_comparison(ulv *bufa, ulv *bufb, size_t count)
 		q = (j % 2) == 0 ? UL_ONEBITS : 0;
 		printf("setting %3u", j);
 		fflush(stdout);
-		p1 = (ulv *)bufa;
-		p2 = (ulv *)bufb;
+		p1 = (u32v *)bufa;
+		p2 = (u32v *)bufb;
 		for (i = 0; i < count; i++)
 			*p1++ = *p2++ = (i % 2) == 0 ? q : ~q;
 		printf("\b\b\b\b\b\b\b\b\b\b\b");
@@ -263,12 +263,12 @@ int test_solidbits_comparison(ulv *bufa, ulv *bufb, size_t count)
 	return 0;
 }
 
-int test_checkerboard_comparison(ulv *bufa, ulv *bufb, size_t count)
+int test_checkerboard_comparison(u32v *bufa, u32v *bufb, size_t count)
 {
-	ulv *p1 = bufa;
-	ulv *p2 = bufb;
+	u32v *p1 = bufa;
+	u32v *p2 = bufb;
 	unsigned int j;
-	ul q;
+	u32 q;
 	size_t i;
 
 	printf("           ");
@@ -278,8 +278,8 @@ int test_checkerboard_comparison(ulv *bufa, ulv *bufb, size_t count)
 		q = (j % 2) == 0 ? CHECKERBOARD1 : CHECKERBOARD2;
 		printf("setting %3u", j);
 		fflush(stdout);
-		p1 = (ulv *)bufa;
-		p2 = (ulv *)bufb;
+		p1 = (u32v *)bufa;
+		p2 = (u32v *)bufb;
 		for (i = 0; i < count; i++)
 			*p1++ = *p2++ = (i % 2) == 0 ? q : ~q;
 		printf("\b\b\b\b\b\b\b\b\b\b\b");
@@ -293,10 +293,10 @@ int test_checkerboard_comparison(ulv *bufa, ulv *bufb, size_t count)
 	return 0;
 }
 
-int test_blockseq_comparison(ulv *bufa, ulv *bufb, size_t count)
+int test_blockseq_comparison(u32v *bufa, u32v *bufb, size_t count)
 {
-	ulv *p1 = bufa;
-	ulv *p2 = bufb;
+	u32v *p1 = bufa;
+	u32v *p2 = bufb;
 	unsigned int j;
 	size_t i;
 
@@ -304,12 +304,12 @@ int test_blockseq_comparison(ulv *bufa, ulv *bufb, size_t count)
 	fflush(stdout);
 	for (j = 0; j < 256; j++) {
 		printf("\b\b\b\b\b\b\b\b\b\b\b");
-		p1 = (ulv *)bufa;
-		p2 = (ulv *)bufb;
+		p1 = (u32v *)bufa;
+		p2 = (u32v *)bufb;
 		printf("setting %3u", j);
 		fflush(stdout);
 		for (i = 0; i < count; i++)
-			*p1++ = *p2++ = (ul)UL_BYTE(j);
+			*p1++ = *p2++ = (u32)UL_BYTE(j);
 		printf("\b\b\b\b\b\b\b\b\b\b\b");
 		printf("testing %3u", j);
 		fflush(stdout);
@@ -321,10 +321,10 @@ int test_blockseq_comparison(ulv *bufa, ulv *bufb, size_t count)
 	return 0;
 }
 
-int test_walkbits0_comparison(ulv *bufa, ulv *bufb, size_t count)
+int test_walkbits0_comparison(u32v *bufa, u32v *bufb, size_t count)
 {
-	ulv *p1 = bufa;
-	ulv *p2 = bufb;
+	u32v *p1 = bufa;
+	u32v *p2 = bufb;
 	unsigned int j;
 	size_t i;
 
@@ -332,8 +332,8 @@ int test_walkbits0_comparison(ulv *bufa, ulv *bufb, size_t count)
 	fflush(stdout);
 	for (j = 0; j < UL_LEN * 2; j++) {
 		printf("\b\b\b\b\b\b\b\b\b\b\b");
-		p1 = (ulv *)bufa;
-		p2 = (ulv *)bufb;
+		p1 = (u32v *)bufa;
+		p2 = (u32v *)bufb;
 		printf("setting %3u", j);
 		fflush(stdout);
 		for (i = 0; i < count; i++) {
@@ -354,10 +354,10 @@ int test_walkbits0_comparison(ulv *bufa, ulv *bufb, size_t count)
 	return 0;
 }
 
-int test_walkbits1_comparison(ulv *bufa, ulv *bufb, size_t count)
+int test_walkbits1_comparison(u32v *bufa, u32v *bufb, size_t count)
 {
-	ulv *p1 = bufa;
-	ulv *p2 = bufb;
+	u32v *p1 = bufa;
+	u32v *p2 = bufb;
 	unsigned int j;
 	size_t i;
 
@@ -365,8 +365,8 @@ int test_walkbits1_comparison(ulv *bufa, ulv *bufb, size_t count)
 	fflush(stdout);
 	for (j = 0; j < UL_LEN * 2; j++) {
 		printf("\b\b\b\b\b\b\b\b\b\b\b");
-		p1 = (ulv *)bufa;
-		p2 = (ulv *)bufb;
+		p1 = (u32v *)bufa;
+		p2 = (u32v *)bufb;
 		printf("setting %3u", j);
 		fflush(stdout);
 		for (i = 0; i < count; i++) {
@@ -388,10 +388,10 @@ int test_walkbits1_comparison(ulv *bufa, ulv *bufb, size_t count)
 	return 0;
 }
 
-int test_bitspread_comparison(ulv *bufa, ulv *bufb, size_t count)
+int test_bitspread_comparison(u32v *bufa, u32v *bufb, size_t count)
 {
-	ulv *p1 = bufa;
-	ulv *p2 = bufb;
+	u32v *p1 = bufa;
+	u32v *p2 = bufb;
 	unsigned int j;
 	size_t i;
 
@@ -399,8 +399,8 @@ int test_bitspread_comparison(ulv *bufa, ulv *bufb, size_t count)
 	fflush(stdout);
 	for (j = 0; j < UL_LEN * 2; j++) {
 		printf("\b\b\b\b\b\b\b\b\b\b\b");
-		p1 = (ulv *)bufa;
-		p2 = (ulv *)bufb;
+		p1 = (u32v *)bufa;
+		p2 = (u32v *)bufb;
 		printf("setting %3u", j);
 		fflush(stdout);
 		for (i = 0; i < count; i++) {
@@ -431,12 +431,12 @@ int test_bitspread_comparison(ulv *bufa, ulv *bufb, size_t count)
 	return 0;
 }
 
-int test_bitflip_comparison(ulv *bufa, ulv *bufb, size_t count)
+int test_bitflip_comparison(u32v *bufa, u32v *bufb, size_t count)
 {
-	ulv *p1 = bufa;
-	ulv *p2 = bufb;
+	u32v *p1 = bufa;
+	u32v *p2 = bufb;
 	unsigned int j, k;
-	ul q;
+	u32 q;
 	size_t i;
 
 	printf("           ");
@@ -448,8 +448,8 @@ int test_bitflip_comparison(ulv *bufa, ulv *bufb, size_t count)
 			q = ~q;
 			printf("setting %3u", k * 8 + j);
 			fflush(stdout);
-			p1 = (ulv *)bufa;
-			p2 = (ulv *)bufb;
+			p1 = (u32v *)bufa;
+			p2 = (u32v *)bufb;
 			for (i = 0; i < count; i++)
 				*p1++ = *p2++ = (i % 2) == 0 ? q : ~q;
 			printf("\b\b\b\b\b\b\b\b\b\b\b");
@@ -465,10 +465,10 @@ int test_bitflip_comparison(ulv *bufa, ulv *bufb, size_t count)
 }
 
 #ifdef TEST_NARROW_WRITES
-int test_8bit_wide_random(ulv *bufa, ulv *bufb, size_t count)
+int test_8bit_wide_random(u32v *bufa, u32v *bufb, size_t count)
 {
 	u8v *p1, *t;
-	ulv *p2;
+	u32v *p2;
 	int attempt;
 	unsigned int b, j = 0;
 	size_t i;
@@ -502,10 +502,10 @@ int test_8bit_wide_random(ulv *bufa, ulv *bufb, size_t count)
 	return 0;
 }
 
-int test_16bit_wide_random(ulv *bufa, ulv *bufb, size_t count)
+int test_16bit_wide_random(u32v *bufa, u32v *bufb, size_t count)
 {
 	u16v *p1, *t;
-	ulv *p2;
+	u32v *p2;
 	int attempt;
 	unsigned int b, j = 0;
 	size_t i;
diff --git a/cmd/memtester/tests.h b/cmd/memtester/tests.h
index cf43f3f3b8..cfd096e560 100644
--- a/cmd/memtester/tests.h
+++ b/cmd/memtester/tests.h
@@ -17,40 +17,40 @@
 
 /* Function declaration. */
 
-int test_stuck_address(ulv *bufa, size_t count);
-int test_random_value(ulv *bufa,
-		      ulv *bufb, size_t count);
-int test_xor_comparison(ulv *bufa,
-			ulv *bufb, size_t count);
-int test_sub_comparison(ulv *bufa,
-			ulv *bufb, size_t count);
-int test_mul_comparison(ulv *bufa,
-			ulv *bufb, size_t count);
-int test_div_comparison(ulv *bufa,
-			ulv *bufb, size_t count);
-int test_or_comparison(ulv *bufa,
-		       ulv *bufb, size_t count);
-int test_and_comparison(ulv *bufa,
-			ulv *bufb, size_t count);
-int test_seqinc_comparison(ulv *bufa,
-			   ulv *bufb, size_t count);
-int test_solidbits_comparison(ulv *bufa,
-			      ulv *bufb, size_t count);
-int test_checkerboard_comparison(ulv *bufa,
-				 ulv *bufb, size_t count);
-int test_blockseq_comparison(ulv *bufa,
-			     ulv *bufb, size_t count);
-int test_walkbits0_comparison(ulv *bufa,
-			      ulv *bufb, size_t count);
-int test_walkbits1_comparison(ulv *bufa,
-			      ulv *bufb, size_t count);
-int test_bitspread_comparison(ulv *bufa,
-			      ulv *bufb, size_t count);
-int test_bitflip_comparison(ulv *bufa,
-			    ulv *bufb, size_t count);
+int test_stuck_address(u32v *bufa, size_t count);
+int test_random_value(u32v *bufa,
+		      u32v *bufb, size_t count);
+int test_xor_comparison(u32v *bufa,
+			u32v *bufb, size_t count);
+int test_sub_comparison(u32v *bufa,
+			u32v *bufb, size_t count);
+int test_mul_comparison(u32v *bufa,
+			u32v *bufb, size_t count);
+int test_div_comparison(u32v *bufa,
+			u32v *bufb, size_t count);
+int test_or_comparison(u32v *bufa,
+		       u32v *bufb, size_t count);
+int test_and_comparison(u32v *bufa,
+			u32v *bufb, size_t count);
+int test_seqinc_comparison(u32v *bufa,
+			   u32v *bufb, size_t count);
+int test_solidbits_comparison(u32v *bufa,
+			      u32v *bufb, size_t count);
+int test_checkerboard_comparison(u32v *bufa,
+				 u32v *bufb, size_t count);
+int test_blockseq_comparison(u32v *bufa,
+			     u32v *bufb, size_t count);
+int test_walkbits0_comparison(u32v *bufa,
+			      u32v *bufb, size_t count);
+int test_walkbits1_comparison(u32v *bufa,
+			      u32v *bufb, size_t count);
+int test_bitspread_comparison(u32v *bufa,
+			      u32v *bufb, size_t count);
+int test_bitflip_comparison(u32v *bufa,
+			    u32v *bufb, size_t count);
 #ifdef TEST_NARROW_WRITES
-int test_8bit_wide_random(ulv *bufa,
-			  ulv *bufb, size_t count);
-int test_16bit_wide_random(ulv *bufa,
-			   ulv *bufb, size_t count);
+int test_8bit_wide_random(u32v *bufa,
+			  u32v *bufb, size_t count);
+int test_16bit_wide_random(u32v *bufa,
+			   u32v *bufb, size_t count);
 #endif
diff --git a/cmd/memtester/types.h b/cmd/memtester/types.h
index e25864d26c..4442eb3c2e 100644
--- a/cmd/memtester/types.h
+++ b/cmd/memtester/types.h
@@ -17,13 +17,14 @@
 
 typedef unsigned long ul;
 typedef unsigned long long ull;
-typedef unsigned long volatile ulv;
+/* for all rk chip, dram bandwidth both 32bit */
+typedef unsigned int volatile u32v;
 typedef unsigned char volatile u8v;
 typedef unsigned short volatile u16v;
 
 struct test {
 	char *name;
-	int (*fp)(ulv *bufa, ulv *bufb, size_t count);
+	int (*fp)(u32v *bufa, u32v *bufb, size_t count);
 };
 
 #endif /* __MEMTESTER_TYPES_H */

commit 3decc73706b200f4f178828a378f4875402ef562
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Tue Dec 18 14:29:58 2018 +0800

    cmd: ddr_tool: add ddr test tool code
    
    RK3328/RK3326/PX30: enable CONFIG_OF_LIVE, CONFIG_ROCKCHIP_DMC and
    CONFIG_CMD_DDR_TEST_TOOL.
    RK1808/RK3399pro npu: enable CONFIG_CMD_DDR_TEST_TOOL.
    When enable, it will create a 'ddr_test' command for user in U-Boot shell.
    
    Change-Id: Iaa286e461d53b1caa4bcc069d37a7aad16a3e5e3
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 23d8425cc1..11e1d8a79a 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1111,6 +1111,11 @@ config CMD_MEMTESTER
 	help
 	  This enables memtester for ddr.
 
+config CMD_DDR_TEST_TOOL
+	bool "Enable ddr test tool"
+	help
+	  This enable ddr test tool code.
+
 menu "Misc commands"
 
 config CMD_BMP
diff --git a/cmd/Makefile b/cmd/Makefile
index e6307041cb..8cb26cccd8 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -87,6 +87,7 @@ obj-$(CONFIG_ID_EEPROM) += mac.o
 obj-$(CONFIG_CMD_MD5SUM) += md5sum.o
 obj-$(CONFIG_CMD_MEMORY) += mem.o
 obj-$(CONFIG_CMD_MEMTESTER) += memtester/
+obj-$(CONFIG_CMD_DDR_TEST_TOOL) += ddr_tool/
 obj-$(CONFIG_CMD_IO) += io.o
 obj-$(CONFIG_CMD_MFSL) += mfsl.o
 obj-$(CONFIG_CMD_MII) += mii.o
diff --git a/cmd/ddr_tool/Makefile b/cmd/ddr_tool/Makefile
new file mode 100644
index 0000000000..1fd808bbdd
--- /dev/null
+++ b/cmd/ddr_tool/Makefile
@@ -0,0 +1,20 @@
+#
+# (C) Copyright 2018 Rockchip Electronics Co., Ltd.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+# We don't want the bootrom-helper present in a full U-Boot build, as
+# this may have entered from ATF with the stack-pointer pointing to
+# inaccessible/protected memory (and the bootrom-helper assumes that
+# the stack-pointer is valid before switching to the U-Boot stack).
+ifdef CONFIG_ROCKCHIP_PX30
+obj-$(CONFIG_CMD_DDR_TEST_TOOL) = ddr_test_px30.o
+endif
+ifdef CONFIG_ROCKCHIP_RK3328
+obj-$(CONFIG_CMD_DDR_TEST_TOOL) = ddr_test_rk3328.o
+endif
+ifdef CONFIG_ROCKCHIP_RK1808
+obj-$(CONFIG_CMD_DDR_TEST_TOOL) = ddr_test_rk1808.o
+endif
+
diff --git a/cmd/ddr_tool/ddr_test_px30.S b/cmd/ddr_tool/ddr_test_px30.S
new file mode 100644
index 0000000000..985d7be5cb
--- /dev/null
+++ b/cmd/ddr_tool/ddr_test_px30.S
@@ -0,0 +1,11844 @@
+	.arch armv8-a+nosimd
+	.file	"ddr_test_code.c"
+	.text
+.Ltext0:
+	.cfi_sections	.debug_frame
+	.section	.text.set_ddr_freq,"ax",@progbits
+	.align	2
+	.type	set_ddr_freq, %function
+set_ddr_freq:
+.LFB256:
+	.file 1 "cmd/ddr_tool/ddr_tool.c"
+	.loc 1 147 0
+	.cfi_startproc
+.LVL0:
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	.loc 1 149 0
+	mov	x1, 16959
+	movk	x1, 0xf, lsl 16
+	cmp	x0, x1
+	.loc 1 147 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	str	x19, [sp, 16]
+	.cfi_offset 19, -16
+	.loc 1 149 0
+	bhi	.L2
+	.loc 1 150 0
+	add	x1, x1, 1
+	mul	x0, x0, x1
+.LVL1:
+	.loc 1 151 0
+	cbz	x0, .L3
+.L2:
+	.loc 1 152 0
+	bl	rockchip_ddrclk_sip_round_rate_v2
+.LVL2:
+	.loc 1 153 0
+	bl	rockchip_ddrclk_sip_set_rate_v2
+.LVL3:
+.L3:
+	.loc 1 155 0
+	bl	rockchip_ddrclk_sip_recalc_rate_v2
+.LVL4:
+	mov	x19, x0
+.LVL5:
+	.loc 1 156 0
+	mov	x1, x0
+	adrp	x0, .LC1
+.LVL6:
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL7:
+	.loc 1 162 0
+	mov	w0, w19
+	ldr	x19, [sp, 16]
+.LVL8:
+	ldp	x29, x30, [sp], 32
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE256:
+	.size	set_ddr_freq, .-set_ddr_freq
+	.section	.text.set_vdd_logic,"ax",@progbits
+	.align	2
+	.type	set_vdd_logic, %function
+set_vdd_logic:
+.LFB257:
+	.loc 1 165 0
+	.cfi_startproc
+.LVL9:
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	.loc 1 169 0
+	add	x1, x29, 40
+	.loc 1 165 0
+	mov	w20, w0
+	.loc 1 169 0
+	adrp	x0, .LC2
+.LVL10:
+	add	x0, x0, :lo12:.LC2
+	bl	regulator_get_by_platname
+.LVL11:
+	.loc 1 170 0
+	cbz	w0, .L9
+	mov	w19, w0
+	.loc 1 171 0
+	adrp	x0, .LC3
+.LVL12:
+	add	x0, x0, :lo12:.LC3
+.LVL13:
+.L15:
+	.loc 1 179 0
+	bl	printf
+.LVL14:
+.L8:
+	.loc 1 181 0
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+.LVL15:
+	ldp	x29, x30, [sp], 48
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL16:
+.L9:
+	.cfi_restore_state
+	.loc 1 176 0
+	ldr	x0, [x29, 40]
+.LVL17:
+	mov	w1, w20
+	bl	regulator_set_value
+.LVL18:
+	mov	w19, w0
+.LVL19:
+	.loc 1 177 0
+	mov	x0, 100
+.LVL20:
+	bl	udelay
+.LVL21:
+	.loc 1 178 0
+	cbz	w19, .L8
+	.loc 1 179 0
+	adrp	x0, .LC4
+	add	x0, x0, :lo12:.LC4
+	b	.L15
+	.cfi_endproc
+.LFE257:
+	.size	set_vdd_logic, .-set_vdd_logic
+	.section	.text.random_test,"ax",@progbits
+	.align	2
+	.global	random_test
+	.type	random_test, %function
+random_test:
+.LFB274:
+	.file 2 "cmd/ddr_tool/random_test.c"
+	.loc 2 88 0
+	.cfi_startproc
+.LVL22:
+	stp	x29, x30, [sp, -112]!
+	.cfi_def_cfa_offset 112
+	.cfi_offset 29, -112
+	.cfi_offset 30, -104
+.LBB12:
+.LBB13:
+	.loc 2 18 0
+	mov	x2, x1
+.LBE13:
+.LBE12:
+	.loc 2 88 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -80
+	.cfi_offset 22, -72
+	mov	x22, x0
+.LVL23:
+	stp	x23, x24, [sp, 48]
+.LBB18:
+.LBB14:
+	.loc 2 37 0
+	adrp	x21, .LC6
+.LBE14:
+.LBE18:
+	.loc 2 88 0
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 23, -64
+	.cfi_offset 24, -56
+	.cfi_offset 27, -32
+	.cfi_offset 28, -24
+	mov	x23, x1
+.LVL24:
+	stp	x19, x20, [sp, 16]
+.LBB19:
+.LBB15:
+	.loc 2 18 0
+	mov	w1, -2139062144
+.LVL25:
+.LBE15:
+.LBE19:
+	.loc 2 88 0
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 19, -96
+	.cfi_offset 20, -88
+	.cfi_offset 25, -48
+	.cfi_offset 26, -40
+.LBB20:
+.LBB16:
+	.loc 2 23 0
+	adrp	x24, .LC5
+	.loc 2 18 0
+	bl	memset
+.LVL26:
+	.loc 2 23 0
+	add	x24, x24, :lo12:.LC5
+	.loc 2 37 0
+	add	x21, x21, :lo12:.LC6
+	.loc 2 24 0
+	lsr	x0, x23, 2
+	.loc 2 14 0
+	mov	w27, 0
+	.loc 2 20 0
+	mov	w25, 1077952576
+	.loc 2 19 0
+	mov	w20, -2139062144
+	.loc 2 22 0
+	mov	w28, 0
+	.loc 2 24 0
+	str	x0, [x29, 96]
+.LVL27:
+.L22:
+	.loc 2 23 0
+	mov	w1, w28
+	mov	x0, x24
+	bl	printf
+.LVL28:
+	.loc 2 24 0
+	mov	w1, 0
+.LVL29:
+.L17:
+	ldr	x2, [x29, 96]
+	uxtw	x0, w1
+	cmp	x0, x2
+	bcc	.L21
+.LVL30:
+.L20:
+	.loc 2 37 0
+	mov	x0, x21
+	.loc 2 22 0
+	add	w28, w28, 1
+.LVL31:
+	.loc 2 37 0
+	bl	printf
+.LVL32:
+	.loc 2 35 0
+	lsr	w25, w25, 1
+.LVL33:
+	.loc 2 36 0
+	lsr	w20, w20, 1
+.LVL34:
+	.loc 2 22 0
+	cmp	w28, 8
+	bne	.L22
+	mov	x19, -1
+	b	.L19
+.LVL35:
+.L21:
+	.loc 2 25 0
+	lsl	x0, x0, 2
+	add	x19, x22, x0
+	ldr	w2, [x22, x0]
+	str	w2, [x29, 108]
+	.loc 2 26 0
+	uxtw	x2, w2
+	cmp	w2, w20
+	beq	.L18
+.LVL36:
+	.loc 2 28 0
+	ldr	w27, [x19]
+	.loc 2 33 0
+	cmn	x19, #1
+	beq	.L20
+.LVL37:
+.L19:
+	.loc 2 39 0
+	adrp	x0, .LC7
+	add	x0, x0, :lo12:.LC7
+	bl	printf
+.LVL38:
+	.loc 2 40 0
+	cmn	x19, #1
+	beq	.L23
+	.loc 2 41 0
+	ldr	w2, [x29, 108]
+	adrp	x0, .LC8
+	mov	w4, w20
+	mov	w3, w27
+	mov	x1, x19
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.LVL39:
+.L36:
+.LBE16:
+.LBE20:
+.LBB21:
+.LBB22:
+	.loc 2 82 0
+	mov	w0, -1
+.L16:
+.LBE22:
+.LBE21:
+	.loc 2 96 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+.LVL40:
+	ldp	x23, x24, [sp, 48]
+.LVL41:
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL42:
+.L18:
+	.cfi_restore_state
+.LBB24:
+.LBB17:
+	.loc 2 31 0
+	str	w25, [x22, x0]
+	.loc 2 24 0
+	add	w1, w1, 1
+.LVL43:
+	b	.L17
+.LVL44:
+.L23:
+.LBE17:
+.LBE24:
+.LBB25:
+.LBB23:
+	.loc 2 58 0
+	adrp	x25, .LC9
+.LVL45:
+	.loc 2 76 0
+	adrp	x24, .LC10
+	.loc 2 66 0
+	lsr	x28, x23, 3
+.LVL46:
+	.loc 2 58 0
+	add	x25, x25, :lo12:.LC9
+	.loc 2 76 0
+	add	x24, x24, :lo12:.LC10
+	.loc 2 66 0
+	mov	x27, 0
+	mov	x19, 0
+.LVL47:
+.L30:
+	.loc 2 58 0
+	mov	x1, x19
+	mov	x0, x25
+	bl	printf
+.LVL48:
+	.loc 2 60 0
+	lsl	x20, x19, 8
+	lsl	x0, x19, 24
+	orr	x20, x20, x19, lsl 16
+	orr	x0, x0, x19, lsl 32
+	.loc 2 64 0
+	mov	x2, x23
+	.loc 2 60 0
+	orr	x20, x20, x0
+	lsl	x0, x19, 40
+	orr	x0, x0, x19, lsl 48
+	orr	x20, x20, x0
+	orr	x0, x19, x19, lsl 56
+	orr	x20, x20, x0
+.LVL49:
+	.loc 2 64 0
+	mov	x0, x22
+	mov	w1, w20
+	bl	memset
+.LVL50:
+	.loc 2 66 0
+	mov	x0, 0
+.LVL51:
+.L25:
+	cmp	x0, x28
+	bne	.L29
+.LVL52:
+.L28:
+	.loc 2 76 0
+	mov	x0, x24
+.LVL53:
+	.loc 2 57 0
+	add	x19, x19, 1
+.LVL54:
+	.loc 2 76 0
+	bl	printf
+.LVL55:
+	.loc 2 57 0
+	cmp	x19, 256
+	bne	.L30
+	mov	x21, -1
+	b	.L27
+.LVL56:
+.L29:
+	lsl	x1, x0, 3
+	add	x21, x1, x22
+	.loc 2 67 0
+	ldr	x26, [x1, x22]
+.LVL57:
+	.loc 2 68 0
+	cmp	x20, x26
+	beq	.L26
+.LVL58:
+	.loc 2 70 0
+	ldr	x27, [x21]
+.LVL59:
+	.loc 2 74 0
+	cmn	x21, #1
+	beq	.L28
+.LVL60:
+.L27:
+	.loc 2 78 0
+	adrp	x0, .LC11
+	add	x0, x0, :lo12:.LC11
+	bl	printf
+.LVL61:
+	.loc 2 84 0
+	mov	w0, 0
+	.loc 2 79 0
+	cmn	x21, #1
+	beq	.L16
+	.loc 2 80 0
+	mov	x4, x20
+	mov	x3, x27
+	mov	x2, x26
+	mov	x1, x21
+	adrp	x0, .LC12
+	add	x0, x0, :lo12:.LC12
+	bl	printf
+.LVL62:
+	b	.L36
+.LVL63:
+.L26:
+	.loc 2 66 0
+	add	x0, x0, 1
+.LVL64:
+	b	.L25
+.LBE23:
+.LBE25:
+	.cfi_endproc
+.LFE274:
+	.size	random_test, .-random_test
+	.section	.text.scan_freq,"ax",@progbits
+	.align	2
+	.type	scan_freq, %function
+scan_freq:
+.LFB255:
+	.loc 1 104 0
+	.cfi_startproc
+.LVL65:
+	stp	x29, x30, [sp, -96]!
+	.cfi_def_cfa_offset 96
+	.cfi_offset 29, -96
+	.cfi_offset 30, -88
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -80
+	.cfi_offset 20, -72
+	mov	w20, w0
+	stp	x23, x24, [sp, 48]
+	.loc 1 111 0
+	mov	w0, 16960
+.LVL66:
+	.loc 1 104 0
+	stp	x21, x22, [sp, 32]
+	.loc 1 111 0
+	movk	w0, 0xf, lsl 16
+	.loc 1 104 0
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 23, -48
+	.cfi_offset 24, -40
+	.cfi_offset 21, -64
+	.cfi_offset 22, -56
+	.cfi_offset 25, -32
+	.cfi_offset 26, -24
+	mov	x24, x2
+	str	x27, [sp, 80]
+	.cfi_offset 27, -16
+	.loc 1 111 0
+	cmp	w20, w0
+	bls	.L38
+	.loc 1 112 0
+	udiv	w20, w20, w0
+.LVL67:
+.L38:
+	.loc 1 113 0
+	cmp	w1, w0
+	bls	.L39
+	.loc 1 114 0
+	udiv	w1, w1, w0
+.LVL68:
+.L39:
+	.loc 1 116 0
+	cmp	w20, w1
+	bls	.L40
+	mov	w0, w20
+	mov	w20, w1
+.LVL69:
+	mov	w1, w0
+.LVL70:
+.L40:
+	.loc 1 125 0
+	mov	w25, 16960
+	.loc 1 126 0
+	adrp	x22, .LC13
+	.loc 1 129 0
+	adrp	x23, .LC14
+	.loc 1 121 0
+	sub	w19, w1, w20
+.LVL71:
+	.loc 1 126 0
+	add	x22, x22, :lo12:.LC13
+	.loc 1 129 0
+	add	x23, x23, :lo12:.LC14
+	.loc 1 123 0
+	mov	w21, 0
+	.loc 1 125 0
+	movk	w25, 0xf, lsl 16
+.LVL72:
+.L41:
+	.loc 1 123 0 discriminator 1
+	cmp	x24, x21, uxtw
+	bhi	.L45
+	.loc 1 123 0 is_stmt 0 discriminator 3
+	cbnz	x24, .L46
+.L45:
+	.loc 1 124 0 is_stmt 1
+	bl	rand
+.LVL73:
+	udiv	w1, w0, w19
+	msub	w0, w1, w19, w0
+.LVL74:
+	add	w0, w0, w20
+	.loc 1 125 0
+	mul	w0, w0, w25
+	and	x0, x0, 4294967232
+	bl	rockchip_ddrclk_sip_round_rate_v2
+.LVL75:
+	.loc 1 126 0
+	mov	w1, w21
+	mov	w2, w0
+	.loc 1 125 0
+	mov	x26, x0
+.LVL76:
+	.loc 1 126 0
+	mov	x0, x22
+.LVL77:
+	bl	printf
+.LVL78:
+	.loc 1 127 0
+	uxtw	x0, w26
+	bl	rockchip_ddrclk_sip_set_rate_v2
+.LVL79:
+	.loc 1 128 0
+	bl	rockchip_ddrclk_sip_recalc_rate_v2
+.LVL80:
+	.loc 1 129 0
+	mov	w1, w0
+	.loc 1 128 0
+	mov	x27, x0
+.LVL81:
+	.loc 1 129 0
+	mov	x0, x23
+.LVL82:
+	bl	printf
+.LVL83:
+	.loc 1 132 0
+	ldr	x0, [x18]
+	mov	x1, 1048576
+	ldr	x0, [x0, 136]
+	bl	random_test
+.LVL84:
+	mov	w26, w0
+.LVL85:
+	.loc 1 133 0
+	cbz	w0, .L42
+	.loc 1 134 0
+	adrp	x0, .LC15
+.LVL86:
+	mov	w1, w27
+	add	x0, x0, :lo12:.LC15
+	bl	printf
+.LVL87:
+.L37:
+	.loc 1 144 0
+	mov	w0, w26
+	ldr	x27, [sp, 80]
+	ldp	x19, x20, [sp, 16]
+.LVL88:
+	ldp	x21, x22, [sp, 32]
+.LVL89:
+	ldp	x23, x24, [sp, 48]
+.LVL90:
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL91:
+.L42:
+	.cfi_restore_state
+	.loc 1 137 0
+	bl	ctrlc
+.LVL92:
+	cbz	w0, .L44
+.LVL93:
+.L46:
+	.loc 1 123 0
+	mov	w26, 0
+	b	.L37
+.LVL94:
+.L44:
+	.loc 1 123 0 is_stmt 0 discriminator 2
+	add	w21, w21, 1
+.LVL95:
+	b	.L41
+	.cfi_endproc
+.LFE255:
+	.size	scan_freq, .-scan_freq
+	.section	.text.cpu_2_io,"ax",@progbits
+	.align	2
+	.global	cpu_2_io
+	.type	cpu_2_io, %function
+cpu_2_io:
+.LFB275:
+	.file 3 "cmd/ddr_tool/tool_common.c"
+	.loc 3 11 0 is_stmt 1
+	.cfi_startproc
+.LVL96:
+	ret
+	.cfi_endproc
+.LFE275:
+	.size	cpu_2_io, .-cpu_2_io
+	.section	.text.write_buf_to_ddr,"ax",@progbits
+	.align	2
+	.global	write_buf_to_ddr
+	.type	write_buf_to_ddr, %function
+write_buf_to_ddr:
+.LFB276:
+	.loc 3 29 0
+	.cfi_startproc
+.LVL97:
+	.loc 3 37 0
+	lsr	w1, w1, 3
+.LVL98:
+	.loc 3 39 0
+	lsr	x3, x3, 3
+.LVL99:
+	.loc 3 37 0
+	sub	w1, w1, #1
+.LVL100:
+	.loc 3 39 0
+	mov	w4, 0
+	mov	w5, 0
+.LVL101:
+.L53:
+	.loc 3 39 0 is_stmt 0 discriminator 1
+	uxtw	x6, w5
+	cmp	x6, x3
+	bcc	.L54
+	.loc 3 44 0 is_stmt 1
+	ret
+.L54:
+	.loc 3 40 0 discriminator 3
+	ldr	x7, [x0, w4, uxtw 3]
+	.loc 3 41 0 discriminator 3
+	add	w4, w4, 1
+.LVL102:
+	.loc 3 40 0 discriminator 3
+	str	x7, [x2, x6, lsl 3]
+	.loc 3 42 0 discriminator 3
+	and	w4, w1, w4
+.LVL103:
+	.loc 3 39 0 discriminator 3
+	add	w5, w5, 1
+.LVL104:
+	b	.L53
+	.cfi_endproc
+.LFE276:
+	.size	write_buf_to_ddr, .-write_buf_to_ddr
+	.section	.text.cmp_buf_data,"ax",@progbits
+	.align	2
+	.global	cmp_buf_data
+	.type	cmp_buf_data, %function
+cmp_buf_data:
+.LFB277:
+	.loc 3 48 0
+	.cfi_startproc
+.LVL105:
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	.loc 3 60 0
+	lsr	w1, w1, 3
+.LVL106:
+	.loc 3 48 0
+	mov	w10, w4
+	.loc 3 60 0
+	sub	w1, w1, #1
+	.loc 3 48 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 3 62 0
+	lsr	x3, x3, 3
+.LVL107:
+	.loc 3 48 0
+	mov	x8, x2
+.LVL108:
+	.loc 3 62 0
+	mov	w6, 0
+	.loc 3 56 0
+	mov	x2, 0
+.LVL109:
+	.loc 3 62 0
+	mov	w7, 0
+	.loc 3 48 0
+	str	x19, [sp, 16]
+	.cfi_offset 19, -16
+.LVL110:
+.L56:
+	.loc 3 62 0 discriminator 1
+	uxtw	x5, w7
+	cmp	x5, x3
+	bcc	.L59
+	.loc 3 61 0
+	mov	x19, 0
+	.loc 3 54 0
+	mov	x3, 0
+	.loc 3 55 0
+	mov	x4, 0
+	b	.L58
+.L59:
+	.loc 3 63 0
+	lsl	x5, x5, 3
+	.loc 3 64 0
+	ldr	x4, [x0, w6, uxtw 3]
+	.loc 3 63 0
+	add	x19, x8, x5
+	ldr	x2, [x8, x5]
+.LVL111:
+	.loc 3 64 0
+	cmp	x2, x4
+	beq	.L57
+	.loc 3 65 0
+	ldr	x3, [x19]
+.LVL112:
+.L58:
+	.loc 3 73 0
+	cmp	x19, 0
+	ccmp	w10, 0, 4, ne
+	beq	.L55
+	.loc 3 74 0
+	adrp	x0, .LC16
+.LVL113:
+	mov	x1, x19
+.LVL114:
+	add	x0, x0, :lo12:.LC16
+	bl	printf
+.LVL115:
+.L55:
+	.loc 3 78 0
+	mov	x0, x19
+	ldr	x19, [sp, 16]
+.LVL116:
+	ldp	x29, x30, [sp], 32
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_def_cfa 31, 0
+	ret
+.LVL117:
+.L57:
+	.cfi_restore_state
+	.loc 3 70 0 discriminator 2
+	add	w6, w6, 1
+.LVL118:
+	.loc 3 62 0 discriminator 2
+	add	w7, w7, 1
+.LVL119:
+	.loc 3 71 0 discriminator 2
+	and	w6, w1, w6
+.LVL120:
+	b	.L56
+	.cfi_endproc
+.LFE277:
+	.size	cmp_buf_data, .-cmp_buf_data
+	.section	.text.crosstalk,"ax",@progbits
+	.align	2
+	.global	crosstalk
+	.type	crosstalk, %function
+crosstalk:
+.LFB200:
+	.file 4 "cmd/ddr_tool/crosstalk.c"
+	.loc 4 46 0
+	.cfi_startproc
+.LVL121:
+	stp	x29, x30, [sp, -144]!
+	.cfi_def_cfa_offset 144
+	.cfi_offset 29, -144
+	.cfi_offset 30, -136
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -128
+	.cfi_offset 20, -120
+	.loc 4 71 0
+	add	x20, x29, 112
+	.loc 4 46 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -112
+	.cfi_offset 22, -104
+	mov	x22, x0
+	stp	x23, x24, [sp, 48]
+	.loc 4 63 0
+	adrp	x0, .LC17
+.LVL122:
+	.loc 4 46 0
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 23, -96
+	.cfi_offset 24, -88
+	.cfi_offset 27, -64
+	.cfi_offset 28, -56
+	mov	x23, x1
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 25, -80
+	.cfi_offset 26, -72
+	.loc 4 63 0
+	add	x0, x0, :lo12:.LC17
+	.loc 4 68 0
+	adrp	x24, .LC19
+	.loc 4 63 0
+	bl	printf
+.LVL123:
+	.loc 4 68 0
+	add	x27, x24, :lo12:.LC19
+	.loc 4 66 0
+	adrp	x21, .LC18
+	.loc 4 64 0
+	mov	w19, 0
+	.loc 4 66 0
+	add	x0, x21, :lo12:.LC18
+	str	x0, [x29, 104]
+.LVL124:
+.L70:
+	ldr	x0, [x29, 104]
+	.loc 4 71 0
+	mov	w25, 1
+	.loc 4 66 0
+	mov	w1, w19
+	.loc 4 71 0
+	lsl	w25, w25, w19
+	.loc 4 65 0
+	mov	w28, -1
+	.loc 4 67 0
+	mov	w26, 0
+	.loc 4 66 0
+	bl	printf
+.LVL125:
+.L69:
+	.loc 4 68 0
+	mov	w1, w26
+	mov	x0, x27
+	.loc 4 69 0
+	mvn	w28, w28
+.LVL126:
+	.loc 4 68 0
+	bl	printf
+.LVL127:
+	.loc 4 69 0
+	mov	x8, 0
+.LVL128:
+.L66:
+	.loc 4 71 0 discriminator 3
+	eor	w0, w25, w28
+	str	w0, [x8, x20]
+	add	x8, x8, 4
+	.loc 4 72 0 discriminator 3
+	mvn	w28, w28
+.LVL129:
+	.loc 4 70 0 discriminator 3
+	cmp	x8, 32
+	bne	.L66
+	.loc 4 77 0
+	mov	x3, x23
+	mov	x2, x22
+	mov	w1, w8
+	mov	x0, x20
+	bl	write_buf_to_ddr
+.LVL130:
+	.loc 4 78 0
+	mov	w1, w8
+	mov	w4, 1
+	mov	x3, x23
+	mov	x2, x22
+	mov	x0, x20
+	bl	cmp_buf_data
+.LVL131:
+	cbz	x0, .L67
+.LVL132:
+.L75:
+	.loc 4 80 0
+	mov	w0, -1
+.L65:
+	.loc 4 115 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+.LVL133:
+	ldp	x23, x24, [sp, 48]
+.LVL134:
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+.LVL135:
+	ldp	x29, x30, [sp], 144
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL136:
+.L67:
+	.cfi_restore_state
+	.loc 4 67 0 discriminator 2
+	add	w26, w26, 1
+.LVL137:
+	cmp	w26, 2
+	bne	.L69
+	.loc 4 64 0 discriminator 2
+	add	w19, w19, 1
+.LVL138:
+	cmp	w19, 32
+	bne	.L70
+	.loc 4 87 0
+	adrp	x0, .LC20
+	add	x0, x0, :lo12:.LC20
+	bl	printf
+.LVL139:
+	.loc 4 88 0
+	mov	x0, 128
+	bl	malloc
+.LVL140:
+	mov	x20, x0
+.LVL141:
+	.loc 4 89 0
+	cbnz	x0, .L71
+	.loc 4 90 0
+	adrp	x0, .LC21
+.LVL142:
+	mov	x1, 128
+	add	x0, x0, :lo12:.LC21
+	bl	printf
+.LVL143:
+.L71:
+	adrp	x25, .LANCHOR0
+	.loc 4 93 0
+	add	x26, x21, :lo12:.LC18
+.LVL144:
+	.loc 4 95 0
+	add	x24, x24, :lo12:.LC19
+	.loc 4 100 0
+	add	x25, x25, :lo12:.LANCHOR0
+	.loc 4 69 0
+	mov	w19, 0
+.LVL145:
+.L78:
+	.loc 4 94 0
+	mov	w21, 0
+	.loc 4 98 0
+	mov	w27, 1
+	.loc 4 93 0
+	mov	w1, w19
+	mov	x0, x26
+	bl	printf
+.LVL146:
+.L77:
+	.loc 4 95 0
+	mov	w1, w21
+	mov	x0, x24
+	bl	printf
+.LVL147:
+	.loc 4 98 0
+	lsl	w1, w27, w21
+	mov	x8, 0
+.LVL148:
+.L74:
+	ldr	w0, [x8, x25]
+	.loc 4 97 0
+	cbz	w19, .L72
+	.loc 4 98 0
+	eor	w0, w0, w1
+.L72:
+	.loc 4 100 0
+	str	w0, [x20, x8]
+	add	x8, x8, 4
+	.loc 4 96 0
+	cmp	x8, 128
+	bne	.L74
+	.loc 4 105 0
+	mov	x3, x23
+	mov	x2, x22
+	mov	w1, w8
+	mov	x0, x20
+	bl	write_buf_to_ddr
+.LVL149:
+	.loc 4 107 0
+	mov	w1, w8
+	mov	w4, 1
+	mov	x3, x23
+	mov	x2, x22
+	mov	x0, x20
+	bl	cmp_buf_data
+.LVL150:
+	cbnz	x0, .L75
+	.loc 4 110 0
+	cbz	w19, .L76
+	.loc 4 94 0 discriminator 2
+	add	w21, w21, 1
+.LVL151:
+	cmp	w21, 32
+	bne	.L77
+.L76:
+	.loc 4 92 0 discriminator 2
+	add	w19, w19, 1
+.LVL152:
+	cmp	w19, 2
+	bne	.L78
+	.loc 4 114 0
+	mov	w0, 0
+	b	.L65
+	.cfi_endproc
+.LFE200:
+	.size	crosstalk, .-crosstalk
+	.section	.text.diagonalscan,"ax",@progbits
+	.align	2
+	.global	diagonalscan
+	.type	diagonalscan, %function
+diagonalscan:
+.LFB271:
+	.file 5 "cmd/ddr_tool/diagonalscan.c"
+	.loc 5 49 0
+	.cfi_startproc
+.LVL153:
+	stp	x29, x30, [sp, -112]!
+	.cfi_def_cfa_offset 112
+	.cfi_offset 29, -112
+	.cfi_offset 30, -104
+	.loc 5 55 0
+	mov	x2, 32
+	.loc 5 49 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -96
+	.cfi_offset 20, -88
+	mov	x19, x1
+	.loc 5 55 0
+	adrp	x1, .LANCHOR1
+.LVL154:
+	add	x1, x1, :lo12:.LANCHOR1
+	.loc 5 49 0
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -64
+	.cfi_offset 24, -56
+	mov	x23, x0
+	stp	x21, x22, [sp, 32]
+	.loc 5 55 0
+	add	x0, x29, 80
+.LVL155:
+	.loc 5 49 0
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 21, -80
+	.cfi_offset 22, -72
+	.cfi_offset 25, -48
+	.cfi_offset 26, -40
+	.loc 5 55 0
+	bl	memcpy
+.LVL156:
+	.loc 5 60 0
+	adrp	x0, .LC22
+	add	x0, x0, :lo12:.LC22
+	bl	printf
+.LVL157:
+.LBB29:
+.LBB30:
+.LBB31:
+	.loc 5 19 0
+	mov	x0, 520
+	movk	x0, 0xff01, lsl 16
+	ldr	w20, [x0]
+.LVL158:
+#APP
+// 19 "cmd/ddr_tool/diagonalscan.c" 1
+	dmb sy
+// 0 "" 2
+.LVL159:
+#NO_APP
+.LBE31:
+.LBE30:
+.LBE29:
+	.loc 5 75 0
+	mov	x2, 32
+	add	x1, x29, 80
+	mov	x0, x23
+	bl	memcpy
+.LVL160:
+.LBB34:
+.LBB32:
+	.loc 5 40 0
+	ubfx	x0, x20, 9, 2
+	.loc 5 41 0
+	ubfx	x20, x20, 2, 2
+.LVL161:
+	.loc 5 40 0
+	add	w0, w0, 9
+	.loc 5 41 0
+	mov	w1, 2
+	asr	w20, w1, w20
+.LBE32:
+.LBE34:
+	.loc 5 76 0
+	lsr	x24, x19, 1
+.LBB35:
+.LBB33:
+	.loc 5 43 0
+	add	w0, w0, w20
+	sub	x19, x19, #32
+.LVL162:
+	mov	w25, 1
+	add	x19, x19, x23
+.LVL163:
+	lsl	w25, w25, w0
+.LBE33:
+.LBE35:
+	.loc 5 76 0
+	mov	w21, 0
+	mov	x20, 0
+.LVL164:
+.L90:
+	.loc 5 76 0 is_stmt 0 discriminator 1
+	cmp	x20, x24
+	bcc	.L94
+	mov	x0, 0
+	b	.L91
+.L94:
+	.loc 5 77 0 is_stmt 1
+	uxtw	x22, w21
+	mov	x2, 32
+	sub	x26, x19, x22
+	add	x1, x29, 80
+	mov	x0, x26
+	bl	memcpy
+.LVL165:
+	.loc 5 80 0
+	add	x2, x20, x23
+	.loc 5 79 0
+	mov	x3, 32
+	mov	w4, 1
+	add	x2, x2, x22
+	mov	w1, w3
+	add	x0, x29, 80
+	bl	cmp_buf_data
+.LVL166:
+	.loc 5 81 0
+	cbnz	x0, .L91
+	.loc 5 84 0
+	add	x22, x22, 40
+	add	x20, x20, x25
+.LVL167:
+	cmp	x25, x22
+	add	w21, w21, 8
+.LVL168:
+	csel	w21, w21, wzr, cs
+.LVL169:
+	.loc 5 86 0
+	cmp	x24, x20
+	bls	.L93
+	.loc 5 87 0
+	add	x0, x23, x20
+.LVL170:
+	mov	x2, 32
+	add	x1, x29, 80
+	add	x0, x0, x21, uxtw
+	bl	memcpy
+.LVL171:
+.L93:
+	.loc 5 89 0
+	mov	x3, 32
+	mov	w4, 1
+	mov	x2, x26
+	mov	w1, w3
+	add	x0, x29, 80
+	sub	x19, x19, x25
+	bl	cmp_buf_data
+.LVL172:
+	.loc 5 92 0
+	cbz	x0, .L90
+.LVL173:
+.L91:
+	.loc 5 100 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+.LVL174:
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 112
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE271:
+	.size	diagonalscan, .-diagonalscan
+	.section	.text.do_ddr_test,"ax",@progbits
+	.align	2
+	.type	do_ddr_test, %function
+do_ddr_test:
+.LFB258:
+	.loc 1 190 0
+	.cfi_startproc
+.LVL175:
+	stp	x29, x30, [sp, -240]!
+	.cfi_def_cfa_offset 240
+	.cfi_offset 29, -240
+	.cfi_offset 30, -232
+.LBB40:
+.LBB41:
+	.loc 1 50 0
+	mov	x0, 0
+.LVL176:
+.LBE41:
+.LBE40:
+	.loc 1 190 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -208
+	.cfi_offset 22, -200
+	mov	w22, w2
+	stp	x19, x20, [sp, 16]
+.LBB48:
+.LBB42:
+	.loc 1 50 0
+	mov	x2, x18
+.LVL177:
+.LBE42:
+.LBE48:
+	.loc 1 190 0
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 19, -224
+	.cfi_offset 20, -216
+	.cfi_offset 25, -176
+	.cfi_offset 26, -168
+.LBB49:
+.LBB43:
+	.loc 1 52 0
+	add	x20, x29, 136
+.LBE43:
+.LBE49:
+	.loc 1 190 0
+	mov	x25, x3
+.LBB50:
+.LBB44:
+	.loc 1 53 0
+	add	x21, x29, 168
+.LBE44:
+.LBE50:
+	.loc 1 190 0
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -192
+	.cfi_offset 24, -184
+.LBB51:
+.LBB45:
+	.loc 1 47 0
+	mov	w24, 0
+.LBE45:
+.LBE51:
+	.loc 1 190 0
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 27, -160
+	.cfi_offset 28, -152
+	.loc 1 193 0
+	stp	xzr, xzr, [x29, 200]
+	stp	xzr, xzr, [x29, 216]
+	str	xzr, [x29, 232]
+.LVL178:
+.L99:
+.LBB52:
+.LBB46:
+	.loc 1 50 0
+	ldr	x1, [x2]
+	ubfiz	x3, x0, 4, 32
+	.loc 1 52 0
+	str	xzr, [x20, x0, lsl 3]
+	.loc 1 50 0
+	add	x1, x1, x3
+	.loc 1 53 0
+	str	xzr, [x21, x0, lsl 3]
+	.loc 1 50 0
+	ldr	x1, [x1, 136]
+	cmp	x1, 0
+	csinc	w24, w24, w0, eq
+.LVL179:
+	add	x0, x0, 1
+.LVL180:
+	.loc 1 49 0
+	cmp	x0, 4
+	bne	.L99
+	mov	x0, 0
+.L100:
+.LVL181:
+	.loc 1 56 0
+	cmp	w0, w24
+	bcc	.L101
+	.loc 1 61 0
+	sub	w1, w24, #1
+	ldr	x0, [x2, 128]
+.LVL182:
+	lsl	x1, x1, 3
+	.loc 1 67 0
+	adrp	x26, .LC25
+	.loc 1 61 0
+	sub	x0, x0, #1048576
+	.loc 1 64 0
+	mov	x23, 0
+	.loc 1 67 0
+	add	x26, x26, :lo12:.LC25
+	.loc 1 61 0
+	ldr	x2, [x20, x1]
+	sub	x0, x0, x2
+	.loc 1 62 0
+	and	x0, x0, -4096
+	.loc 1 61 0
+	str	x0, [x21, x1]
+	.loc 1 63 0
+	adrp	x0, .LC23
+	add	x0, x0, :lo12:.LC23
+	bl	printf
+.LVL183:
+	.loc 1 64 0
+	adrp	x0, .LC24
+	add	x0, x0, :lo12:.LC24
+	bl	printf
+.LVL184:
+.L102:
+	.loc 1 65 0
+	cmp	w24, w23
+	bhi	.L104
+.LVL185:
+.LBE46:
+.LBE52:
+	.loc 1 205 0
+	cmp	w22, 1
+	ble	.L214
+	.loc 1 209 0
+	adrp	x0, .LANCHOR2
+	add	x26, x0, :lo12:.LANCHOR2
+	mov	x24, 0
+	str	x0, [x29, 120]
+.L107:
+	ldr	x1, [x26, x24, lsl 3]
+	mov	w23, w24
+.LVL186:
+	ldr	x0, [x25, 8]
+	bl	strcasecmp
+.LVL187:
+	cbz	w0, .L106
+.LVL188:
+	add	x24, x24, 1
+	.loc 1 208 0 discriminator 2
+	cmp	x24, 7
+	bne	.L107
+	.loc 1 216 0
+	adrp	x0, .LC37
+	add	x0, x0, :lo12:.LC37
+	b	.L215
+.LVL189:
+.L101:
+.LBB53:
+.LBB47:
+	.loc 1 57 0
+	ubfiz	x1, x0, 4, 32
+	ldr	x3, [x2]
+	add	x1, x1, 128
+	add	x3, x3, x1
+	ldr	x3, [x3, 8]
+	str	x3, [x20, x0, lsl 3]
+	.loc 1 58 0
+	ldr	x3, [x2]
+	add	x1, x3, x1
+	ldr	x1, [x1, 16]
+	str	x1, [x21, x0, lsl 3]
+.LVL190:
+	add	x0, x0, 1
+.LVL191:
+	b	.L100
+.LVL192:
+.L104:
+	.loc 1 66 0
+	ldr	x1, [x20, x23, lsl 3]
+	cbz	x1, .L103
+	.loc 1 67 0
+	ldr	x3, [x21, x23, lsl 3]
+	mov	x0, x26
+	add	x2, x1, x3
+	bl	printf
+.LVL193:
+.L103:
+	add	x23, x23, 1
+.LVL194:
+	b	.L102
+.LVL195:
+.L150:
+.LBE47:
+.LBE53:
+	.loc 1 221 0
+	adrp	x0, .LC26
+	add	x0, x0, :lo12:.LC26
+.LVL196:
+.L215:
+	.loc 1 216 0
+	bl	printf
+.LVL197:
+.L214:
+	.loc 1 217 0
+	mov	w22, -1
+	b	.L97
+.LVL198:
+.L110:
+	.loc 1 226 0
+	add	x0, x25, x26
+	add	x1, x29, 200
+	add	x2, x1, x26
+	mov	w1, 0
+	add	x26, x26, 8
+	ldr	x0, [x0, 16]
+	bl	strict_strtoul
+.LVL199:
+	tbz	w0, #31, .L109
+	.loc 1 227 0
+	adrp	x0, .LC27
+	add	x0, x0, :lo12:.LC27
+	b	.L215
+.LVL200:
+.L111:
+	.loc 1 247 0
+	cbnz	w23, .L112
+	.loc 1 249 0
+	ldr	x0, [x29, 208]
+.LVL201:
+	cbz	x0, .L113
+	.loc 1 250 0
+	bl	set_vdd_logic
+.LVL202:
+.L113:
+	.loc 1 251 0
+	ldr	x0, [x29, 200]
+	bl	set_ddr_freq
+.LVL203:
+.L114:
+	.loc 1 384 0
+	adrp	x0, .LC36
+	add	x0, x0, :lo12:.LC36
+	bl	printf
+.LVL204:
+	b	.L97
+.LVL205:
+.L112:
+	.loc 1 252 0
+	cmp	w23, 1
+	bne	.L115
+	.loc 1 254 0
+	ldr	x0, [x29, 224]
+.LVL206:
+	cbz	x0, .L116
+	.loc 1 255 0
+	bl	set_vdd_logic
+.LVL207:
+.L116:
+	.loc 1 256 0
+	ldr	w0, [x29, 200]
+	ldr	w1, [x29, 208]
+	ldr	x2, [x29, 216]
+	bl	scan_freq
+.LVL208:
+	b	.L114
+.LVL209:
+.L115:
+	.loc 1 257 0
+	sub	w24, w24, #5
+	cmp	w24, 1
+	bls	.L117
+.LVL210:
+.LBB54:
+.LBB55:
+	.loc 1 79 0
+	ldr	x0, [x29, 144]
+.LVL211:
+	.loc 1 82 0
+	ldr	x3, [x29, 224]
+	.loc 1 79 0
+	cmp	x0, 0
+	ldr	x0, [x29, 152]
+	ldr	x1, [x29, 160]
+	cset	w24, ne
+	.loc 1 80 0
+	cmp	x0, 0
+	mov	w0, 3
+	csinc	w0, w0, w24, ne
+.LVL212:
+	cmp	x1, 0
+	mov	w1, 4
+	csel	w0, w0, w1, eq
+.LVL213:
+	.loc 1 82 0
+	cbnz	x3, .L209
+	.loc 1 83 0
+	mov	w24, w0
+.LVL214:
+.L134:
+.LBE55:
+.LBE54:
+	.loc 1 342 0
+	ldr	x0, [x29, 200]
+	bl	set_ddr_freq
+.LVL215:
+	.loc 1 344 0
+	ldr	x0, [x29, 232]
+	cbz	x0, .L140
+	.loc 1 345 0
+	bl	set_vdd_logic
+.LVL216:
+.L140:
+	.loc 1 349 0
+	adrp	x26, .LC34
+	mov	w25, 0
+.LVL217:
+	add	x26, x26, :lo12:.LC34
+	b	.L148
+.LVL218:
+.L117:
+	.loc 1 259 0
+	ldr	x0, [x29, 224]
+.LVL219:
+	cbz	x0, .L123
+	.loc 1 260 0
+	bl	set_vdd_logic
+.LVL220:
+.L123:
+	.loc 1 261 0
+	cmp	w23, 5
+	bne	.L155
+	.loc 1 262 0
+	ldr	x1, [x29, 168]
+	mov	x0, 65535
+	movk	x0, 0x9f, lsl 16
+	cmp	x1, x0
+	bhi	.L125
+	.loc 1 263 0
+	lsr	x2, x1, 20
+	adrp	x0, .LC30
+	mov	w1, 10
+	add	x0, x0, :lo12:.LC30
+	bl	printf
+.LVL221:
+.L211:
+	.loc 1 272 0
+	mov	w27, 60
+.LVL222:
+.L124:
+	.loc 1 280 0
+	adrp	x0, .LC31
+	add	x0, x0, :lo12:.LC31
+	.loc 1 284 0
+	adrp	x28, .LC32
+	.loc 1 280 0
+	str	x0, [x29, 112]
+	.loc 1 277 0
+	mov	w26, 0
+	.loc 1 284 0
+	add	x0, x28, :lo12:.LC32
+	str	x0, [x29, 104]
+.LVL223:
+.L126:
+	.loc 1 278 0
+	ldr	x0, [x29, 216]
+	cbz	x0, .L132
+	.loc 1 278 0 is_stmt 0 discriminator 1
+	cmp	x0, x26, uxtw
+	bls	.L114
+.L132:
+	.loc 1 280 0 is_stmt 1
+	ldr	x0, [x29, 112]
+	.loc 1 279 0
+	add	w26, w26, 1
+.LVL224:
+	.loc 1 280 0
+	mov	w1, w26
+	mov	x25, 0
+	bl	printf
+.LVL225:
+.L130:
+	.loc 1 282 0
+	ldr	x23, [x20, x25, lsl 3]
+	cbz	x23, .L127
+	.loc 1 284 0
+	ldr	x0, [x29, 104]
+	mov	x2, x23
+	ldr	x24, [x21, x25, lsl 3]
+	mov	w1, w25
+	mov	x3, x24
+	bl	printf
+.LVL226:
+	.loc 1 286 0
+	ldr	x0, [x29, 208]
+	bl	set_ddr_freq
+.LVL227:
+	.loc 1 287 0
+	mov	x1, x24
+	mov	x0, x23
+	bl	random_test
+.LVL228:
+	mov	w28, w0
+.LVL229:
+	.loc 1 289 0
+	cbnz	w0, .L156
+	.loc 1 290 0
+	mov	x1, x24
+	mov	x0, x23
+.LVL230:
+	bl	crosstalk
+.LVL231:
+	mov	w28, w0
+.LVL232:
+	.loc 1 294 0
+	cbnz	w0, .L157
+	.loc 1 295 0
+	mov	x1, x24
+	mov	x0, x23
+.LVL233:
+	bl	diagonalscan
+.LVL234:
+	mov	w28, w0
+.LVL235:
+	.loc 1 299 0
+	cbnz	w0, .L158
+	.loc 1 300 0
+	ldr	w0, [x29, 200]
+.LVL236:
+	and	x2, x27, 1020
+	ldr	w1, [x29, 208]
+	.loc 1 303 0
+	mov	w19, 1
+	.loc 1 300 0
+	bl	scan_freq
+.LVL237:
+	mov	w28, w0
+.LVL238:
+.L128:
+	.loc 1 305 0
+	ldr	x0, [x29, 200]
+.LVL239:
+	bl	set_ddr_freq
+.LVL240:
+	.loc 1 306 0
+	cbnz	w28, .L159
+	.loc 1 307 0
+	mov	x1, x24
+	mov	x0, x23
+	bl	random_test
+.LVL241:
+	mov	w2, w0
+.LVL242:
+	.loc 1 311 0
+	cbnz	w0, .L160
+	str	w2, [x29, 100]
+	.loc 1 312 0
+	mov	x1, x24
+	mov	x0, x23
+.LVL243:
+	bl	crosstalk
+.LVL244:
+	.loc 1 316 0
+	ldr	w2, [x29, 100]
+	.loc 1 312 0
+	mov	w19, w0
+.LVL245:
+	.loc 1 316 0
+	cbnz	w0, .L161
+	.loc 1 317 0
+	mov	x1, x24
+	mov	x0, x23
+.LVL246:
+	bl	diagonalscan
+.LVL247:
+	mov	w28, w0
+.LVL248:
+	.loc 1 322 0
+	cbnz	w0, .L162
+	.loc 1 324 0
+	bl	ctrlc
+.LVL249:
+	cbnz	w0, .L163
+	.loc 1 319 0
+	mov	w19, 4
+.LVL250:
+.L127:
+	add	x25, x25, 1
+.LVL251:
+	.loc 1 281 0 discriminator 2
+	cmp	x25, 4
+	bne	.L130
+	mov	w2, 0
+	mov	w28, 0
+.LVL252:
+.L129:
+	.loc 1 329 0
+	orr	w2, w28, w2
+.LVL253:
+	cbz	w2, .L126
+.LVL254:
+.L131:
+	.loc 1 381 0
+	cbz	w28, .L114
+	.loc 1 382 0
+	ldr	x0, [x29, 120]
+	add	x0, x0, :lo12:.LANCHOR2
+	ldr	x1, [x0, w19, sxtw 3]
+	adrp	x0, .LC35
+	add	x0, x0, :lo12:.LC35
+	bl	printf
+.LVL255:
+	b	.L97
+.LVL256:
+.L125:
+	.loc 1 266 0
+	mov	x0, 10485760
+	.loc 1 268 0
+	stp	xzr, xzr, [x29, 144]
+	.loc 1 266 0
+	stp	xzr, x0, [x29, 160]
+.LVL257:
+	.loc 1 269 0
+	stp	xzr, xzr, [x29, 176]
+.LVL258:
+	str	xzr, [x29, 192]
+	b	.L211
+.LVL259:
+.L155:
+	.loc 1 274 0
+	mov	w27, 1000
+	b	.L124
+.LVL260:
+.L156:
+	.loc 1 288 0
+	mov	w19, 2
+	b	.L128
+.LVL261:
+.L157:
+	.loc 1 292 0
+	mov	w19, 3
+	b	.L128
+.LVL262:
+.L158:
+	.loc 1 297 0
+	mov	w19, 4
+	b	.L128
+.LVL263:
+.L159:
+	mov	w2, 0
+	b	.L129
+.LVL264:
+.L160:
+	.loc 1 307 0
+	mov	w28, w0
+	mov	w2, 0
+	.loc 1 309 0
+	mov	w19, 2
+	b	.L129
+.LVL265:
+.L161:
+	.loc 1 312 0
+	mov	w28, w0
+	.loc 1 314 0
+	mov	w19, 3
+	b	.L129
+.LVL266:
+.L162:
+	mov	w2, w19
+.LVL267:
+.L212:
+	.loc 1 319 0
+	mov	w19, 4
+	b	.L129
+.L163:
+	.loc 1 325 0
+	mov	w2, -1
+	b	.L212
+.LVL268:
+.L209:
+.LBB58:
+.LBB56:
+	.loc 1 86 0
+	ldr	x4, [x29, 216]
+	.loc 1 87 0
+	mov	x1, 0
+	mov	w24, 0
+	.loc 1 88 0
+	mov	w6, 1
+	.loc 1 87 0
+	add	x5, x3, x4
+.LVL269:
+.L136:
+	.loc 1 86 0
+	ldr	x2, [x20, x1, lsl 3]
+	cmp	x4, x2
+	bcc	.L135
+	.loc 1 87 0
+	ldr	x7, [x21, x1, lsl 3]
+	add	x2, x2, x7
+	.loc 1 88 0
+	cmp	x5, x2
+	csel	w24, w24, w6, hi
+.LVL270:
+.L135:
+	add	x1, x1, 1
+.LVL271:
+	.loc 1 85 0
+	cmp	w0, w1
+	bhi	.L136
+	.loc 1 89 0
+	cbnz	w24, .L137
+	.loc 1 90 0
+	adrp	x0, .LC33
+	add	x0, x0, :lo12:.LC33
+	bl	printf
+.LVL272:
+.L138:
+.LBE56:
+.LBE58:
+	.loc 1 339 0
+	cbnz	w24, .L134
+	.loc 1 340 0
+	mov	w22, 1
+.LVL273:
+	b	.L97
+.LVL274:
+.L137:
+.LBB59:
+.LBB57:
+	.loc 1 92 0
+	str	x4, [x29, 136]
+	.loc 1 94 0
+	cmp	w0, 1
+	.loc 1 93 0
+	str	x3, [x29, 168]
+.LVL275:
+	.loc 1 94 0
+	beq	.L138
+	.loc 1 95 0
+	str	xzr, [x29, 144]
+	.loc 1 94 0
+	cmp	w0, 2
+	.loc 1 96 0
+	str	xzr, [x29, 176]
+.LVL276:
+	.loc 1 94 0
+	beq	.L138
+	.loc 1 95 0
+	str	xzr, [x29, 152]
+	.loc 1 94 0
+	cmp	w0, 4
+	.loc 1 96 0
+	str	xzr, [x29, 184]
+.LVL277:
+	.loc 1 94 0
+	bne	.L138
+	.loc 1 95 0
+	str	xzr, [x29, 160]
+	.loc 1 96 0
+	str	xzr, [x29, 192]
+.LVL278:
+	b	.L138
+.LVL279:
+.L149:
+.LBE57:
+.LBE59:
+	.loc 1 350 0
+	mov	x27, 0
+	.loc 1 348 0
+	add	w25, w25, 1
+.LVL280:
+	.loc 1 349 0
+	mov	w1, w25
+	mov	x0, x26
+	bl	printf
+.LVL281:
+.L141:
+	.loc 1 350 0 discriminator 1
+	cmp	w24, w27
+	bhi	.L147
+	mov	w0, 0
+	mov	w28, 0
+.LVL282:
+.L146:
+	.loc 1 376 0
+	orr	w0, w28, w0
+.LVL283:
+	cbnz	w0, .L131
+.LVL284:
+.L148:
+	.loc 1 347 0
+	ldr	x0, [x29, 208]
+	cbz	x0, .L149
+	.loc 1 347 0 is_stmt 0 discriminator 1
+	cmp	x0, x25, uxtw
+	bhi	.L149
+	b	.L114
+.LVL285:
+.L147:
+	.loc 1 357 0 is_stmt 1
+	ldr	x1, [x21, x27, lsl 3]
+	.loc 1 351 0
+	cmp	w23, 3
+	.loc 1 357 0
+	ldr	x0, [x20, x27, lsl 3]
+	.loc 1 351 0
+	beq	.L143
+	cmp	w23, 4
+	beq	.L144
+	.loc 1 353 0
+	bl	random_test
+.LVL286:
+.L213:
+	.loc 1 361 0
+	mov	w28, w0
+.LVL287:
+	.loc 1 369 0
+	bl	ctrlc
+.LVL288:
+	cbnz	w0, .L166
+	add	x27, x27, 1
+.LVL289:
+	mov	w19, w23
+	.loc 1 373 0
+	cbz	w28, .L141
+.LVL290:
+	mov	w19, w23
+.LVL291:
+	b	.L146
+.LVL292:
+.L143:
+	.loc 1 357 0
+	bl	crosstalk
+.LVL293:
+	b	.L213
+.L144:
+	.loc 1 361 0
+	bl	diagonalscan
+.LVL294:
+	b	.L213
+.LVL295:
+.L166:
+	mov	w19, w23
+	.loc 1 370 0
+	mov	w0, -1
+	b	.L146
+.LVL296:
+.L106:
+	.loc 1 220 0
+	adrp	x0, .LANCHOR3
+	add	x0, x0, :lo12:.LANCHOR3
+	ldrb	w0, [x0, w24, sxtw]
+	cmp	w22, w0
+	blt	.L150
+	sub	w22, w22, #2
+.LVL297:
+	.loc 1 220 0 is_stmt 0 discriminator 1
+	mov	x26, 0
+	lsl	x22, x22, 3
+.LVL298:
+.L109:
+	.loc 1 225 0 is_stmt 1 discriminator 1
+	cmp	x26, x22
+	bne	.L110
+	.loc 1 232 0
+	ldp	x2, x3, [x29, 200]
+	mov	w1, w23
+	ldp	x4, x5, [x29, 216]
+	adrp	x0, .LC28
+	ldr	x6, [x29, 232]
+	add	x0, x0, :lo12:.LC28
+	bl	printf
+.LVL299:
+	.loc 1 238 0
+	add	x2, x29, 128
+	mov	w1, 0
+	mov	w0, 53
+	bl	uclass_get_device
+.LVL300:
+	mov	w22, w0
+.LVL301:
+	.loc 1 239 0
+	cbz	w0, .L111
+	.loc 1 240 0
+	mov	w1, w0
+	adrp	x0, .LC29
+.LVL302:
+	add	x0, x0, :lo12:.LC29
+	bl	printf
+.LVL303:
+.L97:
+	.loc 1 387 0
+	mov	w0, w22
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 240
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE258:
+	.size	do_ddr_test, .-do_ddr_test
+	.section	.text.print_memory,"ax",@progbits
+	.align	2
+	.global	print_memory
+	.type	print_memory, %function
+print_memory:
+.LFB278:
+	.loc 3 81 0
+	.cfi_startproc
+.LVL304:
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	mov	x20, x0
+.LVL305:
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -16
+	.cfi_offset 22, -8
+	.loc 3 86 0
+	adrp	x21, .LC38
+	.loc 3 85 0
+	lsr	x22, x1, 2
+	.loc 3 86 0
+	add	x21, x21, :lo12:.LC38
+	.loc 3 85 0
+	mov	w19, 0
+.LVL306:
+.L217:
+	.loc 3 85 0 is_stmt 0 discriminator 1
+	uxtw	x1, w19
+	cmp	x1, x22
+	bcc	.L218
+	.loc 3 89 0 is_stmt 1
+	ldp	x19, x20, [sp, 16]
+.LVL307:
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL308:
+.L218:
+	.cfi_restore_state
+	.loc 3 87 0 discriminator 3
+	add	w3, w19, 3
+	add	w2, w19, 2
+	add	w0, w19, 1
+	lsl	x1, x1, 2
+	.loc 3 85 0 discriminator 3
+	add	w19, w19, 4
+.LVL309:
+	.loc 3 86 0 discriminator 3
+	ldr	w5, [x20, x3, lsl 2]
+	ldr	w4, [x20, x2, lsl 2]
+	ldr	w3, [x20, x0, lsl 2]
+	mov	x0, x21
+	ldr	w2, [x20, x1]
+	add	x1, x20, x1
+	bl	printf
+.LVL310:
+	b	.L217
+	.cfi_endproc
+.LFE278:
+	.size	print_memory, .-print_memory
+	.global	_u_boot_list_2_cmd_2_ddr_test
+	.section	.rodata
+	.align	3
+	.set	.LANCHOR1,. + 0
+.LC0:
+	.word	1437226410
+	.word	-1437226411
+	.word	1515890085
+	.word	-1515890086
+	.word	-267448336
+	.word	267448335
+	.word	0
+	.word	-1
+	.section	.rodata.cmp_buf_data.str1.1,"aMS",@progbits,1
+.LC16:
+	.string	"test fail:address:0x%lx,read:0x%lx,reread:0x%lx,expect:0x%lx\n"
+	.section	.rodata.crosstalk.str1.1,"aMS",@progbits,1
+.LC17:
+	.string	"\nbitflip:   \n"
+.LC18:
+	.string	"\b\b\b%3u"
+.LC19:
+	.string	"%3u\b\b\b"
+.LC20:
+	.string	"\nISI:\n"
+.LC21:
+	.string	"malloc %lu byte fail\n"
+	.section	.rodata.diagonalscan.str1.1,"aMS",@progbits,1
+.LC22:
+	.string	"\nDiagonalScan\n"
+	.section	.rodata.do_ddr_test.str1.1,"aMS",@progbits,1
+.LC23:
+	.string	"available memory for test:\n"
+.LC24:
+	.string	"\tstart\t\t end\tlength\n"
+.LC25:
+	.string	"\t0x%08lx - 0x%08lx 0x%08lx\n"
+.LC26:
+	.string	"test parameters error\n"
+.LC27:
+	.string	"test pattern error\n"
+.LC28:
+	.string	"test pattern:%d, arg:0x%lx,0x%lx,0x%lx,0x%lx,0x%lx\n"
+.LC29:
+	.string	"rockchip dmc probe fail: %d\n"
+.LC30:
+	.string	"fasttest need %uMB, but actually only %luMB\n"
+.LC31:
+	.string	"\rtimes:%08u:\n"
+.LC32:
+	.string	"loop:%d, start:0x%lx, len:0x%lx\n"
+.LC33:
+	.string	"Invalid test address\n"
+.LC34:
+	.string	"\rtimes:%08u, "
+.LC35:
+	.string	"\n%s test fail\n"
+.LC36:
+	.string	"\ntest pass\n"
+.LC37:
+	.string	"test pattern unsupported\n"
+	.section	.rodata.g_isi_pattern,"a",@progbits
+	.align	3
+	.set	.LANCHOR0,. + 0
+	.type	g_isi_pattern, %object
+	.size	g_isi_pattern, 128
+g_isi_pattern:
+	.word	-1
+	.word	0
+	.word	-1
+	.word	0
+	.word	-1
+	.word	0
+	.word	-1
+	.word	-1
+	.word	-1
+	.word	-1
+	.word	0
+	.word	-1
+	.word	-1
+	.word	-1
+	.word	-1
+	.word	0
+	.word	-1
+	.word	0
+	.word	-1
+	.word	0
+	.word	-1
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	-1
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.section	.rodata.print_memory.str1.1,"aMS",@progbits,1
+.LC38:
+	.string	"0x%08lx: 0x%08x, 0x%08x, 0x%08x, 0x%08x\n"
+	.section	.rodata.random_test.str1.1,"aMS",@progbits,1
+.LC5:
+	.string	"%u"
+.LC6:
+	.string	"\b"
+.LC7:
+	.string	" "
+.LC8:
+	.string	"\nrandom test1 fail:address:0x%lx,read:0x%x,reread:0x%x,expect:0x%x\n"
+.LC9:
+	.string	"%4lu"
+.LC10:
+	.string	"\b\b\b\b"
+.LC11:
+	.string	"    "
+.LC12:
+	.string	"\nrandom test2 fail:address:0x%lx,read:0x%lx,reread:0x%lx,expect:0x%lx\n"
+	.section	.rodata.scan_freq.str1.1,"aMS",@progbits,1
+.LC13:
+	.string	"% d:change freq to %d Hz\n"
+.LC14:
+	.string	"\tchange freq success: %d Hz\n"
+.LC15:
+	.string	"check data fail at %d Hz\n"
+	.section	.rodata.set_ddr_freq.str1.1,"aMS",@progbits,1
+.LC1:
+	.string	"current freq:%lu Hz\n"
+	.section	.rodata.set_vdd_logic.str1.1,"aMS",@progbits,1
+.LC2:
+	.string	"vdd_logic"
+.LC3:
+	.string	"Cannot set regulator name\n"
+.LC4:
+	.string	"set vdd_logic fail\n"
+	.section	.rodata.str1.1,"aMS",@progbits,1
+.LC39:
+	.string	"ddr_test"
+.LC40:
+	.string	"for dram simple test\n"
+.LC41:
+	.ascii	"arg1: test pattern include:\n\tchangefreq\n\tscanfreq\n\tran"
+	.ascii	"dom\n\tcrosstalk\n\tdiagonalscan\n\tfast_test\n\tfull_test\n"
+	.ascii	"for changereq: arg2:freq(Hz),arg3[option]:volt\nfor scanfreq"
+	.ascii	": arg2:minfreq(Hz),arg3:maxfreq(Hz),\n\targ4:scanfreq times,"
+	.ascii	" arg5[option]:volt\nfor random, crosstalk and diagonalscan:a"
+	.ascii	"rg2:freq(Hz), arg3:test times,\n\targ4: start addr, arg5:len"
+	.ascii	"gth, arg6[option]:volt\nfor fast_test and full_test:arg2: mi"
+	.ascii	"n_freq(Hz), arg3: max_freq(Hz)\n\targ4: test times, arg5[opt"
+	.ascii	"ion]:volt\n\nfreq: means dram's target frequency,unit:Hz, if"
+	.ascii	" 0:keep current freq\nminfreq, maxfreq: means min and max fr"
+	.ascii	"equency for dram test,unit:Hz\ntest times: test loop, if 0: "
+	.ascii	"endless loop\nstart_adr: start address of memory space for t"
+	.ascii	"esting,unit:physical address\nlength: length of memory space"
+	.ascii	" for testing,unit:Byte, if 0: full memory space test\nvolt: "
+	.ascii	"means target voltage of vdd_logic\n\nexample:\nddr freq chan"
+	.ascii	"ge to:786MHz, vdd_logic:1.05v:\n\t 'ddr_test changefreq 7860"
+	.ascii	"00000 1050000'\nddr freq change to:786MHz, with default vdd_"
+	.ascii	"logic:\n\t 'ddr_test changefreq 786000000'\nscanning ddr fre"
+	.ascii	"quency between 200 and 786MHz for 10 times:\n\t 'ddr_test sc"
+	.ascii	"anfreq 200000000 786000000 100'\ndoing random test 10 times "
+	.ascii	"start from"
+	.string	" physical address 0x200000 and\nlength is 128MB, freq:786MHz, if freq=0 may keep current freq:\n\t 'ddr_test random 786000000 10 0x200000 0x8000000'\ndoing fast test for dram between 200MHz to 786MHz with 10 times:\n\t 'ddr_test fast_test 200000000 786000000 10'"
+.LC42:
+	.string	"changefreq"
+.LC43:
+	.string	"scanfreq"
+.LC44:
+	.string	"random"
+.LC45:
+	.string	"crosstalk"
+.LC46:
+	.string	"diagonalscan"
+.LC47:
+	.string	"fast_test"
+.LC48:
+	.string	"full_test"
+	.section	.rodata.test_pat_param,"a",@progbits
+	.align	3
+	.set	.LANCHOR3,. + 0
+	.type	test_pat_param, %object
+	.size	test_pat_param, 7
+test_pat_param:
+	.byte	3
+	.byte	5
+	.byte	6
+	.byte	6
+	.byte	6
+	.byte	5
+	.byte	5
+	.section	.rodata.test_pattern,"a",@progbits
+	.align	3
+	.set	.LANCHOR2,. + 0
+	.type	test_pattern, %object
+	.size	test_pattern, 56
+test_pattern:
+	.xword	.LC42
+	.xword	.LC43
+	.xword	.LC44
+	.xword	.LC45
+	.xword	.LC46
+	.xword	.LC47
+	.xword	.LC48
+	.section	.u_boot_list_2_cmd_2_ddr_test,"aw",@progbits
+	.align	2
+	.type	_u_boot_list_2_cmd_2_ddr_test, %object
+	.size	_u_boot_list_2_cmd_2_ddr_test, 48
+_u_boot_list_2_cmd_2_ddr_test:
+	.8byte	.LC39
+	.word	7
+	.word	1
+	.8byte	do_ddr_test
+	.8byte	.LC40
+	.8byte	.LC41
+	.8byte	0
+	.text
+.Letext0:
+	.file 6 "include/common.h"
+	.file 7 "./arch/arm/include/asm/types.h"
+	.file 8 "include/linux/types.h"
+	.file 9 "include/errno.h"
+	.file 10 "include/linux/string.h"
+	.file 11 "include/efi.h"
+	.file 12 "include/dm/device.h"
+	.file 13 "include/ide.h"
+	.file 14 "include/linux/list.h"
+	.file 15 "include/part.h"
+	.file 16 "include/flash.h"
+	.file 17 "include/lmb.h"
+	.file 18 "include/asm-generic/u-boot.h"
+	.file 19 "./arch/arm/include/asm/u-boot-arm.h"
+	.file 20 "include/command.h"
+	.file 21 "include/../scripts/dtc/libfdt/fdt.h"
+	.file 22 "include/libfdt_env.h"
+	.file 23 "include/image.h"
+	.file 24 "include/dm/uclass-id.h"
+	.file 25 "./arch/arm/include/asm/global_data.h"
+	.file 26 "include/asm-generic/global_data.h"
+	.file 27 "include/dm/of.h"
+	.file 28 "include/net.h"
+	.file 29 "include/malloc.h"
+	.file 30 "include/dm/ofnode.h"
+	.file 31 "include/linux/compat.h"
+	.file 32 "include/dm/uclass.h"
+	.file 33 "include/console.h"
+	.file 34 "include/stdio_dev.h"
+	.file 35 "include/iomux.h"
+	.file 36 "include/log.h"
+	.file 37 "include/stdio.h"
+	.file 38 "include/vsprintf.h"
+	.file 39 "include/power/regulator.h"
+	.file 40 "include/linux/delay.h"
+	.file 41 "./arch/arm/include/asm/arch/rockchip_dmc.h"
+	.section	.debug_info,"",@progbits
+.Ldebug_info0:
+	.4byte	0x2c16
+	.2byte	0x4
+	.4byte	.Ldebug_abbrev0
+	.byte	0x8
+	.uleb128 0x1
+	.4byte	.LASF486
+	.byte	0xc
+	.4byte	.LASF487
+	.4byte	.LASF488
+	.4byte	.Ldebug_ranges0+0x190
+	.8byte	0
+	.4byte	.Ldebug_line0
+	.uleb128 0x2
+	.4byte	.LASF4
+	.byte	0x6
+	.byte	0xd
+	.4byte	0x34
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x8
+	.4byte	.LASF0
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF1
+	.uleb128 0x4
+	.4byte	0x3b
+	.uleb128 0x3
+	.byte	0x2
+	.byte	0x7
+	.4byte	.LASF2
+	.uleb128 0x5
+	.4byte	.LASF21
+	.byte	0x9
+	.byte	0xc
+	.4byte	0x59
+	.uleb128 0x6
+	.byte	0x4
+	.byte	0x5
+	.string	"int"
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x6
+	.4byte	.LASF3
+	.uleb128 0x2
+	.4byte	.LASF5
+	.byte	0x7
+	.byte	0xc
+	.4byte	0x34
+	.uleb128 0x3
+	.byte	0x2
+	.byte	0x5
+	.4byte	.LASF6
+	.uleb128 0x2
+	.4byte	.LASF7
+	.byte	0x7
+	.byte	0x12
+	.4byte	0x84
+	.uleb128 0x3
+	.byte	0x4
+	.byte	0x7
+	.4byte	.LASF8
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x5
+	.4byte	.LASF9
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF10
+	.uleb128 0x7
+	.string	"u8"
+	.byte	0x7
+	.byte	0x1f
+	.4byte	0x34
+	.uleb128 0x8
+	.4byte	0x99
+	.uleb128 0x7
+	.string	"u32"
+	.byte	0x7
+	.byte	0x25
+	.4byte	0x84
+	.uleb128 0x4
+	.4byte	0xa8
+	.uleb128 0x2
+	.4byte	.LASF11
+	.byte	0x7
+	.byte	0x31
+	.4byte	0x92
+	.uleb128 0x2
+	.4byte	.LASF12
+	.byte	0x7
+	.byte	0x32
+	.4byte	0x92
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF13
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0xe7
+	.uleb128 0x8
+	.4byte	0xd5
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x8
+	.4byte	.LASF14
+	.uleb128 0x8
+	.4byte	0xe0
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x5
+	.4byte	.LASF15
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0xe0
+	.uleb128 0x8
+	.4byte	0xf3
+	.uleb128 0x2
+	.4byte	.LASF16
+	.byte	0x8
+	.byte	0x59
+	.4byte	0x47
+	.uleb128 0x2
+	.4byte	.LASF17
+	.byte	0x8
+	.byte	0x5b
+	.4byte	0x3b
+	.uleb128 0x2
+	.4byte	.LASF18
+	.byte	0x8
+	.byte	0x69
+	.4byte	0x67
+	.uleb128 0x2
+	.4byte	.LASF19
+	.byte	0x8
+	.byte	0x6b
+	.4byte	0x79
+	.uleb128 0x2
+	.4byte	.LASF20
+	.byte	0x8
+	.byte	0x97
+	.4byte	0x79
+	.uleb128 0xa
+	.byte	0x8
+	.uleb128 0x5
+	.4byte	.LASF22
+	.byte	0xa
+	.byte	0xb
+	.4byte	0xf3
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x2
+	.4byte	.LASF23
+	.uleb128 0xb
+	.4byte	0xe0
+	.4byte	0x154
+	.uleb128 0xc
+	.byte	0
+	.uleb128 0xd
+	.4byte	.LASF24
+	.byte	0xb
+	.2byte	0x140
+	.4byte	0x149
+	.uleb128 0xd
+	.4byte	.LASF25
+	.byte	0xb
+	.2byte	0x143
+	.4byte	0x149
+	.uleb128 0xd
+	.4byte	.LASF26
+	.byte	0xb
+	.2byte	0x143
+	.4byte	0x149
+	.uleb128 0xe
+	.4byte	.LASF45
+	.byte	0xa0
+	.byte	0xc
+	.byte	0x80
+	.4byte	0x25d
+	.uleb128 0xf
+	.4byte	.LASF27
+	.byte	0xc
+	.byte	0x81
+	.4byte	0x1505
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF28
+	.byte	0xc
+	.byte	0x82
+	.4byte	0xd5
+	.byte	0x8
+	.uleb128 0xf
+	.4byte	.LASF29
+	.byte	0xc
+	.byte	0x83
+	.4byte	0x135
+	.byte	0x10
+	.uleb128 0xf
+	.4byte	.LASF30
+	.byte	0xc
+	.byte	0x84
+	.4byte	0x135
+	.byte	0x18
+	.uleb128 0xf
+	.4byte	.LASF31
+	.byte	0xc
+	.byte	0x85
+	.4byte	0x135
+	.byte	0x20
+	.uleb128 0xf
+	.4byte	.LASF32
+	.byte	0xc
+	.byte	0x86
+	.4byte	0x14d0
+	.byte	0x28
+	.uleb128 0xf
+	.4byte	.LASF33
+	.byte	0xc
+	.byte	0x87
+	.4byte	0x109
+	.byte	0x30
+	.uleb128 0xf
+	.4byte	.LASF34
+	.byte	0xc
+	.byte	0x88
+	.4byte	0x25d
+	.byte	0x38
+	.uleb128 0xf
+	.4byte	.LASF35
+	.byte	0xc
+	.byte	0x89
+	.4byte	0x135
+	.byte	0x40
+	.uleb128 0xf
+	.4byte	.LASF36
+	.byte	0xc
+	.byte	0x8a
+	.4byte	0x1548
+	.byte	0x48
+	.uleb128 0xf
+	.4byte	.LASF37
+	.byte	0xc
+	.byte	0x8b
+	.4byte	0x135
+	.byte	0x50
+	.uleb128 0xf
+	.4byte	.LASF38
+	.byte	0xc
+	.byte	0x8c
+	.4byte	0x135
+	.byte	0x58
+	.uleb128 0xf
+	.4byte	.LASF39
+	.byte	0xc
+	.byte	0x8d
+	.4byte	0x290
+	.byte	0x60
+	.uleb128 0xf
+	.4byte	.LASF40
+	.byte	0xc
+	.byte	0x8e
+	.4byte	0x290
+	.byte	0x70
+	.uleb128 0xf
+	.4byte	.LASF41
+	.byte	0xc
+	.byte	0x8f
+	.4byte	0x290
+	.byte	0x80
+	.uleb128 0xf
+	.4byte	.LASF42
+	.byte	0xc
+	.byte	0x90
+	.4byte	0x11f
+	.byte	0x90
+	.uleb128 0xf
+	.4byte	.LASF43
+	.byte	0xc
+	.byte	0x91
+	.4byte	0x59
+	.byte	0x94
+	.uleb128 0x10
+	.string	"seq"
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+	.uleb128 0xc
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+	.uleb128 0x5
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+	.uleb128 0xf
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+	.uleb128 0xe
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+	.uleb128 0xf
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+	.byte	0xf
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+	.uleb128 0xf
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+	.uleb128 0xc
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+	.uleb128 0x5
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+	.uleb128 0xf
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+	.uleb128 0xf
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+	.uleb128 0xf
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+	.uleb128 0x16
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+	.2byte	0x1018
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+	.uleb128 0xb
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+	.uleb128 0x17
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+	.uleb128 0xb
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+	.uleb128 0x17
+	.4byte	0xce
+	.2byte	0x1ff
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+	.uleb128 0x2
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+	.byte	0x10
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+	.4byte	0x31a
+	.uleb128 0xb
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+	.4byte	0x399
+	.uleb128 0xc
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+	.uleb128 0x5
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+	.4byte	0x38e
+	.uleb128 0x3
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+	.byte	0x4
+	.4byte	.LASF58
+	.uleb128 0xe
+	.4byte	.LASF59
+	.byte	0x10
+	.byte	0x11
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+	.4byte	0x3d0
+	.uleb128 0xf
+	.4byte	.LASF60
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+	.byte	0
+	.uleb128 0xf
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+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF61
+	.byte	0xa0
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+	.byte	0x15
+	.4byte	0x401
+	.uleb128 0x10
+	.string	"cnt"
+	.byte	0x11
+	.byte	0x16
+	.4byte	0x3b
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF51
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+	.uleb128 0xf
+	.4byte	.LASF62
+	.byte	0x11
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+	.byte	0
+	.uleb128 0xb
+	.4byte	0x3ab
+	.4byte	0x411
+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x8
+	.byte	0
+	.uleb128 0x18
+	.string	"lmb"
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+	.byte	0x11
+	.byte	0x1b
+	.4byte	0x437
+	.uleb128 0xf
+	.4byte	.LASF63
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+	.uleb128 0xf
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+	.byte	0x11
+	.byte	0x1d
+	.4byte	0x3d0
+	.byte	0xa0
+	.byte	0
+	.uleb128 0x19
+	.string	"lmb"
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+	.byte	0x20
+	.4byte	0x411
+	.uleb128 0x1a
+	.byte	0x10
+	.byte	0x12
+	.byte	0x5a
+	.4byte	0x463
+	.uleb128 0xf
+	.4byte	.LASF54
+	.byte	0x12
+	.byte	0x5b
+	.4byte	0xb8
+	.byte	0
+	.uleb128 0xf
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+	.byte	0x12
+	.byte	0x5c
+	.4byte	0xc3
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+	.byte	0
+	.uleb128 0xe
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+	.byte	0xc8
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+	.byte	0x1b
+	.4byte	0x554
+	.uleb128 0xf
+	.4byte	.LASF66
+	.byte	0x12
+	.byte	0x1c
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+	.uleb128 0xf
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+	.byte	0x1d
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+	.uleb128 0xf
+	.4byte	.LASF68
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+	.uleb128 0xf
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+	.byte	0x12
+	.byte	0x1f
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+	.uleb128 0xf
+	.4byte	.LASF70
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+	.uleb128 0xf
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+	.uleb128 0xf
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+	.byte	0x30
+	.uleb128 0xf
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+	.4byte	0x3b
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+	.uleb128 0xf
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+	.uleb128 0xf
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+	.uleb128 0xf
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+	.uleb128 0xf
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+	.uleb128 0xf
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+	.uleb128 0xf
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+	.uleb128 0xf
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+	.4byte	0x3b
+	.byte	0x70
+	.uleb128 0xf
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+	.uleb128 0xf
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+	.uleb128 0xf
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+	.byte	0
+	.uleb128 0xb
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+	.uleb128 0x12
+	.4byte	0xce
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+	.uleb128 0x2
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+	.uleb128 0x5
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+	.uleb128 0x5
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+	.uleb128 0x5
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+	.uleb128 0x5
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+	.uleb128 0x5
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+	.uleb128 0x5
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+	.uleb128 0x5
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+	.uleb128 0xe
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+	.uleb128 0xf
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+	.uleb128 0xf
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+	.uleb128 0xf
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+	.byte	0xc
+	.uleb128 0x10
+	.string	"cmd"
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+	.uleb128 0xf
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+	.uleb128 0xf
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+	.uleb128 0xf
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+	.byte	0x2a
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+	.uleb128 0x14
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+	.uleb128 0x9
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+	.uleb128 0x9
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+	.uleb128 0x9
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+	.uleb128 0x9
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+	.uleb128 0x2
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+	.uleb128 0x1b
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+	.uleb128 0x1c
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+	.byte	0x1
+	.uleb128 0x1d
+	.4byte	.LASF102
+	.sleb128 -1
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+	.uleb128 0xe
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+	.uleb128 0xf
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+	.uleb128 0xf
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+	.uleb128 0xf
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+	.uleb128 0x2
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+	.uleb128 0x1e
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+	.uleb128 0x1f
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+	.uleb128 0x1f
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+	.uleb128 0x1f
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+	.uleb128 0x1f
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+	.uleb128 0x1f
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+	.uleb128 0x1f
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+	.byte	0x1c
+	.uleb128 0x1f
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+	.byte	0x1d
+	.uleb128 0x1f
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+	.byte	0x1e
+	.uleb128 0x1f
+	.4byte	.LASF127
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+	.byte	0x1f
+	.uleb128 0x1f
+	.4byte	.LASF128
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+	.4byte	0x7f5
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+	.byte	0
+	.uleb128 0xb
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+	.4byte	0x74b
+	.uleb128 0x1e
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+	.4byte	0x893
+	.uleb128 0x1f
+	.4byte	.LASF54
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+	.4byte	0x109
+	.byte	0
+	.uleb128 0x21
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+	.uleb128 0x1f
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+	.byte	0x10
+	.uleb128 0x1f
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+	.uleb128 0x1f
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+	.uleb128 0x1f
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+	.uleb128 0x1f
+	.4byte	.LASF135
+	.byte	0x17
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+	.4byte	0x114
+	.byte	0x29
+	.uleb128 0x21
+	.string	"os"
+	.byte	0x17
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+	.4byte	0x114
+	.byte	0x2a
+	.uleb128 0x1f
+	.4byte	.LASF136
+	.byte	0x17
+	.2byte	0x148
+	.4byte	0x114
+	.byte	0x2b
+	.byte	0
+	.uleb128 0x20
+	.4byte	.LASF137
+	.byte	0x17
+	.2byte	0x149
+	.4byte	0x811
+	.uleb128 0x22
+	.4byte	.LASF138
+	.2byte	0x280
+	.byte	0x17
+	.2byte	0x14f
+	.4byte	0xa3c
+	.uleb128 0x1f
+	.4byte	.LASF139
+	.byte	0x17
+	.2byte	0x155
+	.4byte	0xa3c
+	.byte	0
+	.uleb128 0x1f
+	.4byte	.LASF140
+	.byte	0x17
+	.2byte	0x156
+	.4byte	0x805
+	.byte	0x8
+	.uleb128 0x1f
+	.4byte	.LASF141
+	.byte	0x17
+	.2byte	0x157
+	.4byte	0x109
+	.byte	0x48
+	.uleb128 0x1f
+	.4byte	.LASF142
+	.byte	0x17
+	.2byte	0x15a
+	.4byte	0xd5
+	.byte	0x50
+	.uleb128 0x1f
+	.4byte	.LASF143
+	.byte	0x17
+	.2byte	0x15c
+	.4byte	0x135
+	.byte	0x58
+	.uleb128 0x1f
+	.4byte	.LASF144
+	.byte	0x17
+	.2byte	0x15d
+	.4byte	0xd5
+	.byte	0x60
+	.uleb128 0x1f
+	.4byte	.LASF145
+	.byte	0x17
+	.2byte	0x15e
+	.4byte	0x59
+	.byte	0x68
+	.uleb128 0x1f
+	.4byte	.LASF146
+	.byte	0x17
+	.2byte	0x160
+	.4byte	0x135
+	.byte	0x70
+	.uleb128 0x1f
+	.4byte	.LASF147
+	.byte	0x17
+	.2byte	0x161
+	.4byte	0xd5
+	.byte	0x78
+	.uleb128 0x1f
+	.4byte	.LASF148
+	.byte	0x17
+	.2byte	0x162
+	.4byte	0x59
+	.byte	0x80
+	.uleb128 0x1f
+	.4byte	.LASF149
+	.byte	0x17
+	.2byte	0x164
+	.4byte	0x135
+	.byte	0x88
+	.uleb128 0x1f
+	.4byte	.LASF150
+	.byte	0x17
+	.2byte	0x165
+	.4byte	0xd5
+	.byte	0x90
+	.uleb128 0x1f
+	.4byte	.LASF151
+	.byte	0x17
+	.2byte	0x166
+	.4byte	0x59
+	.byte	0x98
+	.uleb128 0x1f
+	.4byte	.LASF152
+	.byte	0x17
+	.2byte	0x168
+	.4byte	0x135
+	.byte	0xa0
+	.uleb128 0x1f
+	.4byte	.LASF153
+	.byte	0x17
+	.2byte	0x169
+	.4byte	0xd5
+	.byte	0xa8
+	.uleb128 0x1f
+	.4byte	.LASF154
+	.byte	0x17
+	.2byte	0x16a
+	.4byte	0x59
+	.byte	0xb0
+	.uleb128 0x21
+	.string	"os"
+	.byte	0x17
+	.2byte	0x16e
+	.4byte	0x893
+	.byte	0xb8
+	.uleb128 0x21
+	.string	"ep"
+	.byte	0x17
+	.2byte	0x16f
+	.4byte	0x109
+	.byte	0xe8
+	.uleb128 0x1f
+	.4byte	.LASF155
+	.byte	0x17
+	.2byte	0x171
+	.4byte	0x109
+	.byte	0xf0
+	.uleb128 0x1f
+	.4byte	.LASF156
+	.byte	0x17
+	.2byte	0x171
+	.4byte	0x109
+	.byte	0xf8
+	.uleb128 0x23
+	.4byte	.LASF157
+	.byte	0x17
+	.2byte	0x173
+	.4byte	0xf3
+	.2byte	0x100
+	.uleb128 0x23
+	.4byte	.LASF158
+	.byte	0x17
+	.2byte	0x174
+	.4byte	0x109
+	.2byte	0x108
+	.uleb128 0x23
+	.4byte	.LASF159
+	.byte	0x17
+	.2byte	0x176
+	.4byte	0x109
+	.2byte	0x110
+	.uleb128 0x23
+	.4byte	.LASF160
+	.byte	0x17
+	.2byte	0x177
+	.4byte	0x109
+	.2byte	0x118
+	.uleb128 0x23
+	.4byte	.LASF161
+	.byte	0x17
+	.2byte	0x178
+	.4byte	0x109
+	.2byte	0x120
+	.uleb128 0x23
+	.4byte	.LASF162
+	.byte	0x17
+	.2byte	0x179
+	.4byte	0x109
+	.2byte	0x128
+	.uleb128 0x24
+	.string	"kbd"
+	.byte	0x17
+	.2byte	0x17a
+	.4byte	0xa42
+	.2byte	0x130
+	.uleb128 0x23
+	.4byte	.LASF163
+	.byte	0x17
+	.2byte	0x17d
+	.4byte	0x59
+	.2byte	0x138
+	.uleb128 0x23
+	.4byte	.LASF164
+	.byte	0x17
+	.2byte	0x18a
+	.4byte	0x59
+	.2byte	0x13c
+	.uleb128 0x24
+	.string	"lmb"
+	.byte	0x17
+	.2byte	0x18d
+	.4byte	0x411
+	.2byte	0x140
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x805
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x564
+	.uleb128 0x20
+	.4byte	.LASF165
+	.byte	0x17
+	.2byte	0x18f
+	.4byte	0x89f
+	.uleb128 0xd
+	.4byte	.LASF166
+	.byte	0x17
+	.2byte	0x191
+	.4byte	0xa48
+	.uleb128 0x1b
+	.4byte	.LASF168
+	.byte	0x4
+	.4byte	0x59
+	.byte	0x18
+	.byte	0xe
+	.4byte	0xc75
+	.uleb128 0x1c
+	.4byte	.LASF169
+	.byte	0
+	.uleb128 0x1c
+	.4byte	.LASF170
+	.byte	0x1
+	.uleb128 0x1c
+	.4byte	.LASF171
+	.byte	0x2
+	.uleb128 0x1c
+	.4byte	.LASF172
+	.byte	0x3
+	.uleb128 0x1c
+	.4byte	.LASF173
+	.byte	0x4
+	.uleb128 0x1c
+	.4byte	.LASF174
+	.byte	0x5
+	.uleb128 0x1c
+	.4byte	.LASF175
+	.byte	0x6
+	.uleb128 0x1c
+	.4byte	.LASF176
+	.byte	0x7
+	.uleb128 0x1c
+	.4byte	.LASF177
+	.byte	0x8
+	.uleb128 0x1c
+	.4byte	.LASF178
+	.byte	0x9
+	.uleb128 0x1c
+	.4byte	.LASF179
+	.byte	0xa
+	.uleb128 0x1c
+	.4byte	.LASF180
+	.byte	0xb
+	.uleb128 0x1c
+	.4byte	.LASF181
+	.byte	0xc
+	.uleb128 0x1c
+	.4byte	.LASF182
+	.byte	0xd
+	.uleb128 0x1c
+	.4byte	.LASF183
+	.byte	0xe
+	.uleb128 0x1c
+	.4byte	.LASF184
+	.byte	0xf
+	.uleb128 0x1c
+	.4byte	.LASF185
+	.byte	0x10
+	.uleb128 0x1c
+	.4byte	.LASF186
+	.byte	0x11
+	.uleb128 0x1c
+	.4byte	.LASF187
+	.byte	0x12
+	.uleb128 0x1c
+	.4byte	.LASF188
+	.byte	0x13
+	.uleb128 0x1c
+	.4byte	.LASF189
+	.byte	0x14
+	.uleb128 0x1c
+	.4byte	.LASF190
+	.byte	0x15
+	.uleb128 0x1c
+	.4byte	.LASF191
+	.byte	0x16
+	.uleb128 0x1c
+	.4byte	.LASF192
+	.byte	0x17
+	.uleb128 0x1c
+	.4byte	.LASF193
+	.byte	0x18
+	.uleb128 0x1c
+	.4byte	.LASF194
+	.byte	0x19
+	.uleb128 0x1c
+	.4byte	.LASF195
+	.byte	0x1a
+	.uleb128 0x1c
+	.4byte	.LASF196
+	.byte	0x1b
+	.uleb128 0x1c
+	.4byte	.LASF197
+	.byte	0x1c
+	.uleb128 0x1c
+	.4byte	.LASF198
+	.byte	0x1d
+	.uleb128 0x1c
+	.4byte	.LASF199
+	.byte	0x1e
+	.uleb128 0x1c
+	.4byte	.LASF200
+	.byte	0x1f
+	.uleb128 0x1c
+	.4byte	.LASF201
+	.byte	0x20
+	.uleb128 0x1c
+	.4byte	.LASF202
+	.byte	0x21
+	.uleb128 0x1c
+	.4byte	.LASF203
+	.byte	0x22
+	.uleb128 0x1c
+	.4byte	.LASF204
+	.byte	0x23
+	.uleb128 0x1c
+	.4byte	.LASF205
+	.byte	0x24
+	.uleb128 0x1c
+	.4byte	.LASF206
+	.byte	0x25
+	.uleb128 0x1c
+	.4byte	.LASF207
+	.byte	0x26
+	.uleb128 0x1c
+	.4byte	.LASF208
+	.byte	0x27
+	.uleb128 0x1c
+	.4byte	.LASF209
+	.byte	0x28
+	.uleb128 0x1c
+	.4byte	.LASF210
+	.byte	0x29
+	.uleb128 0x1c
+	.4byte	.LASF211
+	.byte	0x2a
+	.uleb128 0x1c
+	.4byte	.LASF212
+	.byte	0x2b
+	.uleb128 0x1c
+	.4byte	.LASF213
+	.byte	0x2c
+	.uleb128 0x1c
+	.4byte	.LASF214
+	.byte	0x2d
+	.uleb128 0x1c
+	.4byte	.LASF215
+	.byte	0x2e
+	.uleb128 0x1c
+	.4byte	.LASF216
+	.byte	0x2f
+	.uleb128 0x1c
+	.4byte	.LASF217
+	.byte	0x30
+	.uleb128 0x1c
+	.4byte	.LASF218
+	.byte	0x31
+	.uleb128 0x1c
+	.4byte	.LASF219
+	.byte	0x32
+	.uleb128 0x1c
+	.4byte	.LASF220
+	.byte	0x33
+	.uleb128 0x1c
+	.4byte	.LASF221
+	.byte	0x34
+	.uleb128 0x1c
+	.4byte	.LASF222
+	.byte	0x35
+	.uleb128 0x1c
+	.4byte	.LASF223
+	.byte	0x36
+	.uleb128 0x1c
+	.4byte	.LASF224
+	.byte	0x37
+	.uleb128 0x1c
+	.4byte	.LASF225
+	.byte	0x38
+	.uleb128 0x1c
+	.4byte	.LASF226
+	.byte	0x39
+	.uleb128 0x1c
+	.4byte	.LASF227
+	.byte	0x3a
+	.uleb128 0x1c
+	.4byte	.LASF228
+	.byte	0x3b
+	.uleb128 0x1c
+	.4byte	.LASF229
+	.byte	0x3c
+	.uleb128 0x1c
+	.4byte	.LASF230
+	.byte	0x3d
+	.uleb128 0x1c
+	.4byte	.LASF231
+	.byte	0x3e
+	.uleb128 0x1c
+	.4byte	.LASF232
+	.byte	0x3f
+	.uleb128 0x1c
+	.4byte	.LASF233
+	.byte	0x40
+	.uleb128 0x1c
+	.4byte	.LASF234
+	.byte	0x41
+	.uleb128 0x1c
+	.4byte	.LASF235
+	.byte	0x42
+	.uleb128 0x1c
+	.4byte	.LASF236
+	.byte	0x43
+	.uleb128 0x1c
+	.4byte	.LASF237
+	.byte	0x44
+	.uleb128 0x1c
+	.4byte	.LASF238
+	.byte	0x45
+	.uleb128 0x1c
+	.4byte	.LASF239
+	.byte	0x46
+	.uleb128 0x1c
+	.4byte	.LASF240
+	.byte	0x47
+	.uleb128 0x1c
+	.4byte	.LASF241
+	.byte	0x48
+	.uleb128 0x1c
+	.4byte	.LASF242
+	.byte	0x49
+	.uleb128 0x1c
+	.4byte	.LASF243
+	.byte	0x4a
+	.uleb128 0x1c
+	.4byte	.LASF244
+	.byte	0x4b
+	.uleb128 0x1c
+	.4byte	.LASF245
+	.byte	0x4c
+	.uleb128 0x1c
+	.4byte	.LASF246
+	.byte	0x4d
+	.uleb128 0x1c
+	.4byte	.LASF247
+	.byte	0x4e
+	.uleb128 0x1c
+	.4byte	.LASF248
+	.byte	0x4f
+	.uleb128 0x1c
+	.4byte	.LASF249
+	.byte	0x50
+	.uleb128 0x1c
+	.4byte	.LASF250
+	.byte	0x51
+	.uleb128 0x1c
+	.4byte	.LASF251
+	.byte	0x52
+	.uleb128 0x1c
+	.4byte	.LASF252
+	.byte	0x53
+	.uleb128 0x1c
+	.4byte	.LASF253
+	.byte	0x54
+	.uleb128 0x1d
+	.4byte	.LASF254
+	.sleb128 -1
+	.byte	0
+	.uleb128 0x25
+	.byte	0x4
+	.4byte	0x84
+	.byte	0x24
+	.byte	0xe0
+	.4byte	0xc88
+	.uleb128 0x1c
+	.4byte	.LASF255
+	.byte	0x5
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF256
+	.byte	0x40
+	.byte	0x19
+	.byte	0xc
+	.4byte	0xd01
+	.uleb128 0xf
+	.4byte	.LASF257
+	.byte	0x19
+	.byte	0x22
+	.4byte	0x3b
+	.byte	0
+	.uleb128 0x10
+	.string	"tbu"
+	.byte	0x19
+	.byte	0x23
+	.4byte	0x84
+	.byte	0x8
+	.uleb128 0x10
+	.string	"tbl"
+	.byte	0x19
+	.byte	0x24
+	.4byte	0x84
+	.byte	0xc
+	.uleb128 0xf
+	.4byte	.LASF258
+	.byte	0x19
+	.byte	0x25
+	.4byte	0x3b
+	.byte	0x10
+	.uleb128 0xf
+	.4byte	.LASF259
+	.byte	0x19
+	.byte	0x26
+	.4byte	0x92
+	.byte	0x18
+	.uleb128 0xf
+	.4byte	.LASF260
+	.byte	0x19
+	.byte	0x28
+	.4byte	0x3b
+	.byte	0x20
+	.uleb128 0xf
+	.4byte	.LASF261
+	.byte	0x19
+	.byte	0x29
+	.4byte	0x3b
+	.byte	0x28
+	.uleb128 0xf
+	.4byte	.LASF262
+	.byte	0x19
+	.byte	0x2b
+	.4byte	0x3b
+	.byte	0x30
+	.uleb128 0xf
+	.4byte	.LASF263
+	.byte	0x19
+	.byte	0x2c
+	.4byte	0x3b
+	.byte	0x38
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF264
+	.byte	0x18
+	.byte	0x1a
+	.byte	0x22
+	.4byte	0xd3d
+	.uleb128 0xf
+	.4byte	.LASF265
+	.byte	0x1a
+	.byte	0x23
+	.4byte	0xa8
+	.byte	0
+	.uleb128 0x10
+	.string	"id"
+	.byte	0x1a
+	.byte	0x24
+	.4byte	0xa8
+	.byte	0x4
+	.uleb128 0xf
+	.4byte	.LASF266
+	.byte	0x1a
+	.byte	0x25
+	.4byte	0xa8
+	.byte	0x8
+	.uleb128 0xf
+	.4byte	.LASF267
+	.byte	0x1a
+	.byte	0x26
+	.4byte	0x109
+	.byte	0x10
+	.byte	0
+	.uleb128 0x26
+	.4byte	.LASF268
+	.2byte	0x198
+	.byte	0x1a
+	.byte	0x29
+	.4byte	0xf28
+	.uleb128 0x10
+	.string	"bd"
+	.byte	0x1a
+	.byte	0x2a
+	.4byte	0xa42
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF42
+	.byte	0x1a
+	.byte	0x2b
+	.4byte	0x3b
+	.byte	0x8
+	.uleb128 0xf
+	.4byte	.LASF266
+	.byte	0x1a
+	.byte	0x2c
+	.4byte	0x84
+	.byte	0x10
+	.uleb128 0xf
+	.4byte	.LASF269
+	.byte	0x1a
+	.byte	0x2d
+	.4byte	0x3b
+	.byte	0x18
+	.uleb128 0xf
+	.4byte	.LASF270
+	.byte	0x1a
+	.byte	0x2e
+	.4byte	0x3b
+	.byte	0x20
+	.uleb128 0xf
+	.4byte	.LASF271
+	.byte	0x1a
+	.byte	0x30
+	.4byte	0x3b
+	.byte	0x28
+	.uleb128 0xf
+	.4byte	.LASF272
+	.byte	0x1a
+	.byte	0x31
+	.4byte	0x3b
+	.byte	0x30
+	.uleb128 0xf
+	.4byte	.LASF273
+	.byte	0x1a
+	.byte	0x33
+	.4byte	0x3b
+	.byte	0x38
+	.uleb128 0xf
+	.4byte	.LASF274
+	.byte	0x1a
+	.byte	0x3d
+	.4byte	0x3b
+	.byte	0x40
+	.uleb128 0xf
+	.4byte	.LASF275
+	.byte	0x1a
+	.byte	0x41
+	.4byte	0x3b
+	.byte	0x48
+	.uleb128 0xf
+	.4byte	.LASF276
+	.byte	0x1a
+	.byte	0x42
+	.4byte	0x3b
+	.byte	0x50
+	.uleb128 0xf
+	.4byte	.LASF277
+	.byte	0x1a
+	.byte	0x44
+	.4byte	0x3b
+	.byte	0x58
+	.uleb128 0xf
+	.4byte	.LASF278
+	.byte	0x1a
+	.byte	0x45
+	.4byte	0x3b
+	.byte	0x60
+	.uleb128 0xf
+	.4byte	.LASF279
+	.byte	0x1a
+	.byte	0x46
+	.4byte	0xc3
+	.byte	0x68
+	.uleb128 0xf
+	.4byte	.LASF280
+	.byte	0x1a
+	.byte	0x47
+	.4byte	0x3b
+	.byte	0x70
+	.uleb128 0xf
+	.4byte	.LASF281
+	.byte	0x1a
+	.byte	0x48
+	.4byte	0x3b
+	.byte	0x78
+	.uleb128 0xf
+	.4byte	.LASF282
+	.byte	0x1a
+	.byte	0x49
+	.4byte	0x3b
+	.byte	0x80
+	.uleb128 0xf
+	.4byte	.LASF283
+	.byte	0x1a
+	.byte	0x4a
+	.4byte	0x3b
+	.byte	0x88
+	.uleb128 0xf
+	.4byte	.LASF284
+	.byte	0x1a
+	.byte	0x4b
+	.4byte	0xf28
+	.byte	0x90
+	.uleb128 0xf
+	.4byte	.LASF285
+	.byte	0x1a
+	.byte	0x4e
+	.4byte	0x25d
+	.byte	0x98
+	.uleb128 0xf
+	.4byte	.LASF286
+	.byte	0x1a
+	.byte	0x4f
+	.4byte	0x25d
+	.byte	0xa0
+	.uleb128 0xf
+	.4byte	.LASF287
+	.byte	0x1a
+	.byte	0x50
+	.4byte	0x290
+	.byte	0xa8
+	.uleb128 0xf
+	.4byte	.LASF288
+	.byte	0x1a
+	.byte	0x56
+	.4byte	0x263
+	.byte	0xb8
+	.uleb128 0xf
+	.4byte	.LASF289
+	.byte	0x1a
+	.byte	0x57
+	.4byte	0x135
+	.byte	0xc0
+	.uleb128 0xf
+	.4byte	.LASF290
+	.byte	0x1a
+	.byte	0x58
+	.4byte	0x3b
+	.byte	0xc8
+	.uleb128 0xf
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+	.string	"jt"
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+	.uleb128 0xf
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+	.byte	0x5d
+	.4byte	0xfb1
+	.byte	0xe0
+	.uleb128 0x16
+	.4byte	.LASF293
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+	.uleb128 0x16
+	.4byte	.LASF296
+	.byte	0x1a
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+	.uleb128 0x16
+	.4byte	.LASF297
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+	.uleb128 0x16
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+	.uleb128 0x16
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+	.uleb128 0xf
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+	.uleb128 0xf
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+	.4byte	0xfa0
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+	.uleb128 0x9
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+	.uleb128 0x2
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+	.4byte	0xd3d
+	.uleb128 0x4
+	.4byte	0xfc1
+	.uleb128 0x5
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+	.byte	0x6
+	.byte	0xab
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+	.uleb128 0xb
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+	.uleb128 0xc
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+	.uleb128 0x5
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+	.byte	0xad
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+	.uleb128 0x5
+	.4byte	.LASF312
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+	.byte	0xae
+	.4byte	0xfdc
+	.uleb128 0x5
+	.4byte	.LASF313
+	.byte	0x6
+	.byte	0xfc
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+	.uleb128 0x5
+	.4byte	.LASF314
+	.byte	0x6
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+	.uleb128 0x5
+	.4byte	.LASF315
+	.byte	0x6
+	.byte	0xfe
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+	.uleb128 0xe
+	.4byte	.LASF316
+	.byte	0x4
+	.byte	0x1c
+	.byte	0x2e
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+	.uleb128 0xf
+	.4byte	.LASF317
+	.byte	0x1c
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+	.byte	0
+	.uleb128 0x9
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+	.uleb128 0xe
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+	.byte	0xa6
+	.4byte	0x10da
+	.uleb128 0xf
+	.4byte	.LASF28
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+	.uleb128 0xf
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+	.uleb128 0xf
+	.4byte	.LASF320
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+	.4byte	0xb8
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+	.uleb128 0xf
+	.4byte	.LASF164
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+	.uleb128 0xf
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+	.uleb128 0xf
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+	.uleb128 0xf
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+	.uleb128 0xf
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+	.uleb128 0xf
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+	.uleb128 0x2d
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+	.4byte	0x14ca
+	.uleb128 0x2e
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+	.byte	0x1e
+	.byte	0x35
+	.4byte	0xec
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0xf9b
+	.uleb128 0x2
+	.4byte	.LASF378
+	.byte	0x1e
+	.byte	0x36
+	.4byte	0x14a8
+	.uleb128 0xe
+	.4byte	.LASF379
+	.byte	0x4
+	.byte	0x1f
+	.byte	0xc
+	.4byte	0x14f4
+	.uleb128 0x10
+	.string	"pid"
+	.byte	0x1f
+	.byte	0xd
+	.4byte	0x59
+	.byte	0
+	.byte	0
+	.uleb128 0x5
+	.4byte	.LASF380
+	.byte	0x1f
+	.byte	0x10
+	.4byte	0x14ff
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x14db
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x1443
+	.uleb128 0xe
+	.4byte	.LASF36
+	.byte	0x30
+	.byte	0x20
+	.byte	0x23
+	.4byte	0x1548
+	.uleb128 0xf
+	.4byte	.LASF35
+	.byte	0x20
+	.byte	0x24
+	.4byte	0x135
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF381
+	.byte	0x20
+	.byte	0x25
+	.4byte	0x1677
+	.byte	0x8
+	.uleb128 0xf
+	.4byte	.LASF382
+	.byte	0x20
+	.byte	0x26
+	.4byte	0x290
+	.byte	0x10
+	.uleb128 0xf
+	.4byte	.LASF41
+	.byte	0x20
+	.byte	0x27
+	.4byte	0x290
+	.byte	0x20
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x150b
+	.uleb128 0xe
+	.4byte	.LASF383
+	.byte	0x10
+	.byte	0xc
+	.byte	0xb5
+	.4byte	0x1573
+	.uleb128 0xf
+	.4byte	.LASF384
+	.byte	0xc
+	.byte	0xb6
+	.4byte	0xd5
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF385
+	.byte	0xc
+	.byte	0xb7
+	.4byte	0x109
+	.byte	0x8
+	.byte	0
+	.uleb128 0x8
+	.4byte	0x154e
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x1573
+	.uleb128 0x13
+	.4byte	0x59
+	.4byte	0x158d
+	.uleb128 0x14
+	.4byte	0x25d
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x157e
+	.uleb128 0xe
+	.4byte	.LASF386
+	.byte	0x80
+	.byte	0x20
+	.byte	0x54
+	.4byte	0x1677
+	.uleb128 0xf
+	.4byte	.LASF28
+	.byte	0x20
+	.byte	0x55
+	.4byte	0xd5
+	.byte	0
+	.uleb128 0x10
+	.string	"id"
+	.byte	0x20
+	.byte	0x56
+	.4byte	0xa60
+	.byte	0x8
+	.uleb128 0xf
+	.4byte	.LASF387
+	.byte	0x20
+	.byte	0x57
+	.4byte	0x158d
+	.byte	0x10
+	.uleb128 0xf
+	.4byte	.LASF388
+	.byte	0x20
+	.byte	0x58
+	.4byte	0x158d
+	.byte	0x18
+	.uleb128 0xf
+	.4byte	.LASF389
+	.byte	0x20
+	.byte	0x59
+	.4byte	0x158d
+	.byte	0x20
+	.uleb128 0xf
+	.4byte	.LASF390
+	.byte	0x20
+	.byte	0x5a
+	.4byte	0x158d
+	.byte	0x28
+	.uleb128 0xf
+	.4byte	.LASF391
+	.byte	0x20
+	.byte	0x5b
+	.4byte	0x158d
+	.byte	0x30
+	.uleb128 0xf
+	.4byte	.LASF367
+	.byte	0x20
+	.byte	0x5c
+	.4byte	0x158d
+	.byte	0x38
+	.uleb128 0xf
+	.4byte	.LASF368
+	.byte	0x20
+	.byte	0x5d
+	.4byte	0x158d
+	.byte	0x40
+	.uleb128 0xf
+	.4byte	.LASF321
+	.byte	0x20
+	.byte	0x5e
+	.4byte	0x168c
+	.byte	0x48
+	.uleb128 0xf
+	.4byte	.LASF392
+	.byte	0x20
+	.byte	0x5f
+	.4byte	0x168c
+	.byte	0x50
+	.uleb128 0xf
+	.4byte	.LASF370
+	.byte	0x20
+	.byte	0x60
+	.4byte	0x59
+	.byte	0x58
+	.uleb128 0xf
+	.4byte	.LASF393
+	.byte	0x20
+	.byte	0x61
+	.4byte	0x59
+	.byte	0x5c
+	.uleb128 0xf
+	.4byte	.LASF394
+	.byte	0x20
+	.byte	0x62
+	.4byte	0x59
+	.byte	0x60
+	.uleb128 0xf
+	.4byte	.LASF372
+	.byte	0x20
+	.byte	0x63
+	.4byte	0x59
+	.byte	0x64
+	.uleb128 0xf
+	.4byte	.LASF373
+	.byte	0x20
+	.byte	0x64
+	.4byte	0x59
+	.byte	0x68
+	.uleb128 0x10
+	.string	"ops"
+	.byte	0x20
+	.byte	0x65
+	.4byte	0x263
+	.byte	0x70
+	.uleb128 0xf
+	.4byte	.LASF42
+	.byte	0x20
+	.byte	0x66
+	.4byte	0x11f
+	.byte	0x78
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x1593
+	.uleb128 0x13
+	.4byte	0x59
+	.4byte	0x168c
+	.uleb128 0x14
+	.4byte	0x1548
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x167d
+	.uleb128 0x5
+	.4byte	.LASF395
+	.byte	0x21
+	.byte	0xb
+	.4byte	0x149
+	.uleb128 0xe
+	.4byte	.LASF396
+	.byte	0x70
+	.byte	0x22
+	.byte	0x16
+	.4byte	0x172e
+	.uleb128 0xf
+	.4byte	.LASF42
+	.byte	0x22
+	.byte	0x17
+	.4byte	0x59
+	.byte	0
+	.uleb128 0x10
+	.string	"ext"
+	.byte	0x22
+	.byte	0x18
+	.4byte	0x59
+	.byte	0x4
+	.uleb128 0xf
+	.4byte	.LASF28
+	.byte	0x22
+	.byte	0x19
+	.4byte	0xfb1
+	.byte	0x8
+	.uleb128 0xf
+	.4byte	.LASF54
+	.byte	0x22
+	.byte	0x1d
+	.4byte	0x1743
+	.byte	0x28
+	.uleb128 0xf
+	.4byte	.LASF397
+	.byte	0x22
+	.byte	0x1e
+	.4byte	0x1743
+	.byte	0x30
+	.uleb128 0xf
+	.4byte	.LASF398
+	.byte	0x22
+	.byte	0x23
+	.4byte	0x1759
+	.byte	0x38
+	.uleb128 0xf
+	.4byte	.LASF399
+	.byte	0x22
+	.byte	0x25
+	.4byte	0x176f
+	.byte	0x40
+	.uleb128 0xf
+	.4byte	.LASF400
+	.byte	0x22
+	.byte	0x2a
+	.4byte	0x1743
+	.byte	0x48
+	.uleb128 0xf
+	.4byte	.LASF401
+	.byte	0x22
+	.byte	0x2b
+	.4byte	0x1743
+	.byte	0x50
+	.uleb128 0xf
+	.4byte	.LASF35
+	.byte	0x22
+	.byte	0x2f
+	.4byte	0x135
+	.byte	0x58
+	.uleb128 0xf
+	.4byte	.LASF402
+	.byte	0x22
+	.byte	0x30
+	.4byte	0x290
+	.byte	0x60
+	.byte	0
+	.uleb128 0x13
+	.4byte	0x59
+	.4byte	0x173d
+	.uleb128 0x14
+	.4byte	0x173d
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x169d
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x172e
+	.uleb128 0x28
+	.4byte	0x1759
+	.uleb128 0x14
+	.4byte	0x173d
+	.uleb128 0x14
+	.4byte	0xe7
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x1749
+	.uleb128 0x28
+	.4byte	0x176f
+	.uleb128 0x14
+	.4byte	0x173d
+	.uleb128 0x14
+	.4byte	0xd5
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x175f
+	.uleb128 0xb
+	.4byte	0x173d
+	.4byte	0x1780
+	.uleb128 0xc
+	.byte	0
+	.uleb128 0x5
+	.4byte	.LASF403
+	.byte	0x22
+	.byte	0x48
+	.4byte	0x1775
+	.uleb128 0xb
+	.4byte	0xf3
+	.4byte	0x179b
+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x2
+	.byte	0
+	.uleb128 0x5
+	.4byte	.LASF404
+	.byte	0x22
+	.byte	0x49
+	.4byte	0x178b
+	.uleb128 0xb
+	.4byte	0x17b6
+	.4byte	0x17b6
+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x2
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x173d
+	.uleb128 0x5
+	.4byte	.LASF405
+	.byte	0x23
+	.byte	0x15
+	.4byte	0x17a6
+	.uleb128 0xb
+	.4byte	0x59
+	.4byte	0x17d7
+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x2
+	.byte	0
+	.uleb128 0x5
+	.4byte	.LASF406
+	.byte	0x23
+	.byte	0x1a
+	.4byte	0x17c7
+	.uleb128 0x25
+	.byte	0x4
+	.4byte	0x84
+	.byte	0x1
+	.byte	0x14
+	.4byte	0x181f
+	.uleb128 0x1c
+	.4byte	.LASF407
+	.byte	0
+	.uleb128 0x1c
+	.4byte	.LASF408
+	.byte	0x1
+	.uleb128 0x1c
+	.4byte	.LASF409
+	.byte	0x2
+	.uleb128 0x1c
+	.4byte	.LASF410
+	.byte	0x3
+	.uleb128 0x1c
+	.4byte	.LASF411
+	.byte	0x4
+	.uleb128 0x1c
+	.4byte	.LASF412
+	.byte	0x5
+	.uleb128 0x1c
+	.4byte	.LASF413
+	.byte	0x6
+	.uleb128 0x1c
+	.4byte	.LASF414
+	.byte	0x7
+	.byte	0
+	.uleb128 0xb
+	.4byte	0xdb
+	.4byte	0x182f
+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x6
+	.byte	0
+	.uleb128 0x8
+	.4byte	0x181f
+	.uleb128 0x2a
+	.4byte	.LASF416
+	.byte	0x1
+	.byte	0x1f
+	.4byte	0x182f
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	test_pattern
+	.uleb128 0xb
+	.4byte	0xa3
+	.4byte	0x1859
+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x6
+	.byte	0
+	.uleb128 0x8
+	.4byte	0x1849
+	.uleb128 0x2a
+	.4byte	.LASF417
+	.byte	0x1
+	.byte	0x29
+	.4byte	0x1859
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	test_pat_param
+	.uleb128 0x2f
+	.4byte	.LASF418
+	.byte	0x1
+	.2byte	0x185
+	.4byte	0x67c
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	_u_boot_list_2_cmd_2_ddr_test
+	.uleb128 0x30
+	.4byte	.LASF426
+	.byte	0x3
+	.byte	0x50
+	.8byte	.LFB278
+	.8byte	.LFE278-.LFB278
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x1904
+	.uleb128 0x31
+	.4byte	.LASF267
+	.byte	0x3
+	.byte	0x50
+	.4byte	0x135
+	.4byte	.LLST76
+	.uleb128 0x31
+	.4byte	.LASF51
+	.byte	0x3
+	.byte	0x50
+	.4byte	0x109
+	.4byte	.LLST77
+	.uleb128 0x32
+	.string	"p"
+	.byte	0x3
+	.byte	0x52
+	.4byte	0x1365
+	.4byte	.LLST78
+	.uleb128 0x32
+	.string	"i"
+	.byte	0x3
+	.byte	0x53
+	.4byte	0xa8
+	.4byte	.LLST79
+	.uleb128 0x33
+	.8byte	.LVL310
+	.4byte	0x2b65
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0xd
+	.byte	0x83
+	.sleb128 -4
+	.byte	0xc
+	.4byte	0xffffffff
+	.byte	0x1a
+	.byte	0x32
+	.byte	0x24
+	.byte	0x84
+	.sleb128 0
+	.byte	0x22
+	.byte	0
+	.byte	0
+	.uleb128 0x35
+	.4byte	.LASF428
+	.byte	0x3
+	.byte	0x2e
+	.4byte	0x109
+	.8byte	.LFB277
+	.8byte	.LFE277-.LFB277
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x1a04
+	.uleb128 0x36
+	.string	"buf"
+	.byte	0x3
+	.byte	0x2e
+	.4byte	0x1365
+	.4byte	.LLST29
+	.uleb128 0x31
+	.4byte	.LASF419
+	.byte	0x3
+	.byte	0x2e
+	.4byte	0xa8
+	.4byte	.LLST30
+	.uleb128 0x31
+	.4byte	.LASF420
+	.byte	0x3
+	.byte	0x2e
+	.4byte	0x109
+	.4byte	.LLST31
+	.uleb128 0x31
+	.4byte	.LASF375
+	.byte	0x3
+	.byte	0x2e
+	.4byte	0x109
+	.4byte	.LLST32
+	.uleb128 0x31
+	.4byte	.LASF421
+	.byte	0x3
+	.byte	0x2f
+	.4byte	0xa8
+	.4byte	.LLST33
+	.uleb128 0x37
+	.4byte	.LASF422
+	.byte	0x3
+	.byte	0x31
+	.4byte	0x1a04
+	.4byte	.LLST34
+	.uleb128 0x32
+	.string	"p"
+	.byte	0x3
+	.byte	0x32
+	.4byte	0x1a0a
+	.4byte	.LLST35
+	.uleb128 0x32
+	.string	"i"
+	.byte	0x3
+	.byte	0x33
+	.4byte	0xa8
+	.4byte	.LLST36
+	.uleb128 0x32
+	.string	"j"
+	.byte	0x3
+	.byte	0x33
+	.4byte	0xa8
+	.4byte	.LLST37
+	.uleb128 0x32
+	.string	"val"
+	.byte	0x3
+	.byte	0x34
+	.4byte	0x109
+	.4byte	.LLST38
+	.uleb128 0x37
+	.4byte	.LASF423
+	.byte	0x3
+	.byte	0x34
+	.4byte	0x109
+	.4byte	.LLST39
+	.uleb128 0x37
+	.4byte	.LASF424
+	.byte	0x3
+	.byte	0x34
+	.4byte	0x109
+	.4byte	.LLST40
+	.uleb128 0x37
+	.4byte	.LASF425
+	.byte	0x3
+	.byte	0x34
+	.4byte	0x109
+	.4byte	.LLST41
+	.uleb128 0x33
+	.8byte	.LVL115
+	.4byte	0x2b65
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC16
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x109
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x42
+	.uleb128 0x30
+	.4byte	.LASF427
+	.byte	0x3
+	.byte	0x1c
+	.8byte	.LFB276
+	.8byte	.LFE276-.LFB276
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x1a98
+	.uleb128 0x38
+	.string	"buf"
+	.byte	0x3
+	.byte	0x1c
+	.4byte	0x1365
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x31
+	.4byte	.LASF419
+	.byte	0x3
+	.byte	0x1c
+	.4byte	0xa8
+	.4byte	.LLST25
+	.uleb128 0x39
+	.4byte	.LASF420
+	.byte	0x3
+	.byte	0x1c
+	.4byte	0x109
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x31
+	.4byte	.LASF375
+	.byte	0x3
+	.byte	0x1c
+	.4byte	0x109
+	.4byte	.LLST26
+	.uleb128 0x2a
+	.4byte	.LASF422
+	.byte	0x3
+	.byte	0x1e
+	.4byte	0x1a04
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3a
+	.string	"p"
+	.byte	0x3
+	.byte	0x1f
+	.4byte	0x1a04
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x32
+	.string	"i"
+	.byte	0x3
+	.byte	0x20
+	.4byte	0xa8
+	.4byte	.LLST27
+	.uleb128 0x32
+	.string	"j"
+	.byte	0x3
+	.byte	0x20
+	.4byte	0xa8
+	.4byte	.LLST28
+	.byte	0
+	.uleb128 0x3b
+	.4byte	.LASF491
+	.byte	0x3
+	.byte	0xa
+	.byte	0x1
+	.4byte	0x1aae
+	.uleb128 0x3c
+	.string	"p"
+	.byte	0x3
+	.byte	0xa
+	.4byte	0x1365
+	.byte	0
+	.uleb128 0x35
+	.4byte	.LASF429
+	.byte	0x2
+	.byte	0x57
+	.4byte	0x59
+	.8byte	.LFB274
+	.8byte	.LFE274-.LFB274
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x1d27
+	.uleb128 0x31
+	.4byte	.LASF430
+	.byte	0x2
+	.byte	0x57
+	.4byte	0x109
+	.4byte	.LLST3
+	.uleb128 0x31
+	.4byte	.LASF431
+	.byte	0x2
+	.byte	0x57
+	.4byte	0x109
+	.4byte	.LLST4
+	.uleb128 0x3a
+	.string	"ret"
+	.byte	0x2
+	.byte	0x59
+	.4byte	0x59
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3d
+	.4byte	0x1d95
+	.8byte	.LBB12
+	.4byte	.Ldebug_ranges0+0
+	.byte	0x2
+	.byte	0x5b
+	.4byte	0x1c21
+	.uleb128 0x3e
+	.4byte	0x1db0
+	.4byte	.LLST5
+	.uleb128 0x3e
+	.4byte	0x1da5
+	.4byte	.LLST6
+	.uleb128 0x3f
+	.4byte	.Ldebug_ranges0+0
+	.uleb128 0x40
+	.4byte	0x1dbb
+	.4byte	.LLST7
+	.uleb128 0x40
+	.4byte	0x1dc4
+	.4byte	.LLST8
+	.uleb128 0x40
+	.4byte	0x1dcd
+	.4byte	.LLST9
+	.uleb128 0x40
+	.4byte	0x1dd8
+	.4byte	.LLST10
+	.uleb128 0x41
+	.4byte	0x1de3
+	.uleb128 0x40
+	.4byte	0x1dee
+	.4byte	.LLST11
+	.uleb128 0x40
+	.4byte	0x1df9
+	.4byte	.LLST12
+	.uleb128 0x40
+	.4byte	0x1e04
+	.4byte	.LLST13
+	.uleb128 0x42
+	.8byte	.LVL26
+	.4byte	0x2b70
+	.4byte	0x1b94
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
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+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x6
+	.byte	0x11
+	.sleb128 -2139062144
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL28
+	.4byte	0x2b65
+	.4byte	0x1bb2
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8c
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL32
+	.4byte	0x2b65
+	.4byte	0x1bca
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL38
+	.4byte	0x2b65
+	.4byte	0x1be9
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC7
+	.byte	0
+	.uleb128 0x33
+	.8byte	.LVL39
+	.4byte	0x2b65
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC8
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
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+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x5
+	.byte	0x8f
+	.sleb128 204
+	.byte	0x94
+	.byte	0x4
+	.uleb128 0x34
+	.uleb128 0x1
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+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x43
+	.4byte	0x1d27
+	.8byte	.LBB21
+	.4byte	.Ldebug_ranges0+0x60
+	.byte	0x2
+	.byte	0x5d
+	.uleb128 0x44
+	.4byte	0x1d42
+	.uleb128 0x44
+	.4byte	0x1d37
+	.uleb128 0x3f
+	.4byte	.Ldebug_ranges0+0x60
+	.uleb128 0x40
+	.4byte	0x1d4d
+	.4byte	.LLST14
+	.uleb128 0x40
+	.4byte	0x1d56
+	.4byte	.LLST15
+	.uleb128 0x45
+	.4byte	0x1d5f
+	.uleb128 0x1
+	.byte	0x64
+	.uleb128 0x45
+	.4byte	0x1d6a
+	.uleb128 0x1
+	.byte	0x6a
+	.uleb128 0x45
+	.4byte	0x1d75
+	.uleb128 0x1
+	.byte	0x6b
+	.uleb128 0x41
+	.4byte	0x1d80
+	.uleb128 0x40
+	.4byte	0x1d89
+	.4byte	.LLST16
+	.uleb128 0x42
+	.8byte	.LVL48
+	.4byte	0x2b65
+	.4byte	0x1c96
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL50
+	.4byte	0x2b70
+	.4byte	0x1cba
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL55
+	.4byte	0x2b65
+	.4byte	0x1cd2
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL61
+	.4byte	0x2b65
+	.4byte	0x1cf1
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC11
+	.byte	0
+	.uleb128 0x33
+	.8byte	.LVL62
+	.4byte	0x2b65
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC12
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF435
+	.byte	0x2
+	.byte	0x30
+	.4byte	0x59
+	.byte	0x1
+	.4byte	0x1d95
+	.uleb128 0x47
+	.4byte	.LASF430
+	.byte	0x2
+	.byte	0x30
+	.4byte	0x109
+	.uleb128 0x47
+	.4byte	.LASF431
+	.byte	0x2
+	.byte	0x30
+	.4byte	0x109
+	.uleb128 0x48
+	.string	"i"
+	.byte	0x2
+	.byte	0x32
+	.4byte	0x109
+	.uleb128 0x48
+	.string	"j"
+	.byte	0x2
+	.byte	0x32
+	.4byte	0x109
+	.uleb128 0x49
+	.4byte	.LASF432
+	.byte	0x2
+	.byte	0x33
+	.4byte	0x109
+	.uleb128 0x49
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+	.byte	0x2
+	.byte	0x33
+	.4byte	0x109
+	.uleb128 0x49
+	.4byte	.LASF433
+	.byte	0x2
+	.byte	0x34
+	.4byte	0x109
+	.uleb128 0x48
+	.string	"p"
+	.byte	0x2
+	.byte	0x35
+	.4byte	0x1a0a
+	.uleb128 0x49
+	.4byte	.LASF434
+	.byte	0x2
+	.byte	0x36
+	.4byte	0x109
+	.byte	0
+	.uleb128 0x46
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+	.byte	0x2
+	.byte	0xa
+	.4byte	0x59
+	.byte	0x1
+	.4byte	0x1e10
+	.uleb128 0x47
+	.4byte	.LASF430
+	.byte	0x2
+	.byte	0xa
+	.4byte	0x109
+	.uleb128 0x47
+	.4byte	.LASF431
+	.byte	0x2
+	.byte	0xa
+	.4byte	0x109
+	.uleb128 0x48
+	.string	"i"
+	.byte	0x2
+	.byte	0xc
+	.4byte	0xa8
+	.uleb128 0x48
+	.string	"j"
+	.byte	0x2
+	.byte	0xc
+	.4byte	0xa8
+	.uleb128 0x49
+	.4byte	.LASF437
+	.byte	0x2
+	.byte	0xd
+	.4byte	0xa8
+	.uleb128 0x49
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+	.byte	0x2
+	.byte	0xd
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+	.byte	0x2
+	.byte	0xd
+	.4byte	0xa8
+	.uleb128 0x49
+	.4byte	.LASF433
+	.byte	0x2
+	.byte	0xe
+	.4byte	0xa8
+	.uleb128 0x48
+	.string	"p32"
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+	.byte	0xf
+	.4byte	0x1e10
+	.uleb128 0x49
+	.4byte	.LASF434
+	.byte	0x2
+	.byte	0x10
+	.4byte	0x109
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0xb3
+	.uleb128 0x35
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+	.byte	0x5
+	.byte	0x30
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+	.8byte	.LFB271
+	.8byte	.LFE271-.LFB271
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2042
+	.uleb128 0x31
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+	.byte	0x5
+	.byte	0x30
+	.4byte	0x109
+	.4byte	.LLST49
+	.uleb128 0x31
+	.4byte	.LASF375
+	.byte	0x5
+	.byte	0x30
+	.4byte	0x109
+	.4byte	.LLST50
+	.uleb128 0x37
+	.4byte	.LASF267
+	.byte	0x5
+	.byte	0x35
+	.4byte	0x109
+	.4byte	.LLST51
+	.uleb128 0x37
+	.4byte	.LASF439
+	.byte	0x5
+	.byte	0x35
+	.4byte	0x109
+	.4byte	.LLST52
+	.uleb128 0x49
+	.4byte	.LASF440
+	.byte	0x5
+	.byte	0x36
+	.4byte	0x59
+	.uleb128 0x2a
+	.4byte	.LASF441
+	.byte	0x5
+	.byte	0x37
+	.4byte	0x2042
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -32
+	.uleb128 0x32
+	.string	"col"
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+	.4byte	0xa8
+	.4byte	.LLST53
+	.uleb128 0x37
+	.4byte	.LASF442
+	.byte	0x5
+	.byte	0x39
+	.4byte	0xa8
+	.4byte	.LLST54
+	.uleb128 0x37
+	.4byte	.LASF425
+	.byte	0x5
+	.byte	0x3a
+	.4byte	0x109
+	.4byte	.LLST55
+	.uleb128 0x4a
+	.4byte	.LASF492
+	.byte	0x5
+	.byte	0x62
+	.8byte	.L91
+	.uleb128 0x3d
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+	.8byte	.LBB29
+	.4byte	.Ldebug_ranges0+0x90
+	.byte	0x5
+	.byte	0x3d
+	.4byte	0x1f19
+	.uleb128 0x3f
+	.4byte	.Ldebug_ranges0+0x90
+	.uleb128 0x40
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+	.uleb128 0x41
+	.4byte	0x2082
+	.uleb128 0x4b
+	.8byte	.LBB31
+	.8byte	.LBE31-.LBB31
+	.uleb128 0x40
+	.4byte	0x208e
+	.4byte	.LLST57
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL156
+	.4byte	0x2b7c
+	.4byte	0x1f45
+	.uleb128 0x34
+	.uleb128 0x1
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+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 144
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
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+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
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+	.4byte	0x1f64
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC22
+	.byte	0
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+	.8byte	.LVL160
+	.4byte	0x2b85
+	.4byte	0x1f89
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
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+	.uleb128 0x1
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+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 144
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+	.uleb128 0x1
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+	.uleb128 0x2
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+	.4byte	0x2b85
+	.4byte	0x1fae
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 144
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.byte	0
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+	.4byte	0x1904
+	.4byte	0x1fe4
+	.uleb128 0x34
+	.uleb128 0x1
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+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 144
+	.uleb128 0x34
+	.uleb128 0x1
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+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x8
+	.byte	0x84
+	.sleb128 0
+	.byte	0x86
+	.sleb128 0
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+	.byte	0x87
+	.sleb128 0
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+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL171
+	.4byte	0x2b85
+	.4byte	0x2015
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0xe
+	.byte	0x85
+	.sleb128 0
+	.byte	0xc
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+	.byte	0x1a
+	.byte	0x84
+	.sleb128 0
+	.byte	0x22
+	.byte	0x87
+	.sleb128 0
+	.byte	0x22
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 144
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.byte	0
+	.uleb128 0x33
+	.8byte	.LVL172
+	.4byte	0x1904
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 144
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0xb
+	.4byte	0xa8
+	.4byte	0x2052
+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x7
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF443
+	.byte	0x5
+	.byte	0xc
+	.4byte	0x59
+	.byte	0x1
+	.4byte	0x209b
+	.uleb128 0x49
+	.4byte	.LASF444
+	.byte	0x5
+	.byte	0xe
+	.4byte	0xa8
+	.uleb128 0x48
+	.string	"col"
+	.byte	0x5
+	.byte	0xf
+	.4byte	0xa8
+	.uleb128 0x48
+	.string	"bw"
+	.byte	0x5
+	.byte	0xf
+	.4byte	0xa8
+	.uleb128 0x49
+	.4byte	.LASF440
+	.byte	0x5
+	.byte	0x10
+	.4byte	0x59
+	.uleb128 0x4c
+	.uleb128 0x48
+	.string	"__v"
+	.byte	0x5
+	.byte	0x13
+	.4byte	0xa8
+	.byte	0
+	.byte	0
+	.uleb128 0x4d
+	.4byte	.LASF455
+	.byte	0x1
+	.byte	0xbc
+	.4byte	0x59
+	.8byte	.LFB258
+	.8byte	.LFE258-.LFB258
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x25c1
+	.uleb128 0x31
+	.4byte	.LASF445
+	.byte	0x1
+	.byte	0xbc
+	.4byte	0x25c1
+	.4byte	.LLST58
+	.uleb128 0x31
+	.4byte	.LASF446
+	.byte	0x1
+	.byte	0xbc
+	.4byte	0x59
+	.4byte	.LLST59
+	.uleb128 0x31
+	.4byte	.LASF447
+	.byte	0x1
+	.byte	0xbc
+	.4byte	0x59
+	.4byte	.LLST60
+	.uleb128 0x31
+	.4byte	.LASF448
+	.byte	0x1
+	.byte	0xbd
+	.4byte	0x641
+	.4byte	.LLST61
+	.uleb128 0x32
+	.string	"i"
+	.byte	0x1
+	.byte	0xbf
+	.4byte	0x59
+	.4byte	.LLST62
+	.uleb128 0x37
+	.4byte	.LASF449
+	.byte	0x1
+	.byte	0xc0
+	.4byte	0x59
+	.4byte	.LLST63
+	.uleb128 0x37
+	.4byte	.LASF450
+	.byte	0x1
+	.byte	0xc0
+	.4byte	0x59
+	.4byte	.LLST64
+	.uleb128 0x3a
+	.string	"arg"
+	.byte	0x1
+	.byte	0xc1
+	.4byte	0x25c7
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -40
+	.uleb128 0x2a
+	.4byte	.LASF420
+	.byte	0x1
+	.byte	0xc2
+	.4byte	0x25d7
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -104
+	.uleb128 0x2a
+	.4byte	.LASF375
+	.byte	0x1
+	.byte	0xc3
+	.4byte	0x25d7
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -72
+	.uleb128 0x37
+	.4byte	.LASF451
+	.byte	0x1
+	.byte	0xc4
+	.4byte	0xa8
+	.4byte	.LLST65
+	.uleb128 0x37
+	.4byte	.LASF452
+	.byte	0x1
+	.byte	0xc5
+	.4byte	0xa8
+	.4byte	.LLST66
+	.uleb128 0x32
+	.string	"ret"
+	.byte	0x1
+	.byte	0xc6
+	.4byte	0x59
+	.4byte	.LLST67
+	.uleb128 0x37
+	.4byte	.LASF453
+	.byte	0x1
+	.byte	0xc7
+	.4byte	0x59
+	.4byte	.LLST68
+	.uleb128 0x37
+	.4byte	.LASF454
+	.byte	0x1
+	.byte	0xc8
+	.4byte	0xa8
+	.4byte	.LLST69
+	.uleb128 0x3a
+	.string	"dev"
+	.byte	0x1
+	.byte	0xec
+	.4byte	0x25d
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -112
+	.uleb128 0x3d
+	.4byte	0x28ba
+	.8byte	.LBB40
+	.4byte	.Ldebug_ranges0+0xd0
+	.byte	0x1
+	.byte	0xcb
+	.4byte	0x223d
+	.uleb128 0x3e
+	.4byte	0x28d1
+	.4byte	.LLST70
+	.uleb128 0x3e
+	.4byte	0x28c6
+	.4byte	.LLST71
+	.uleb128 0x3f
+	.4byte	.Ldebug_ranges0+0xd0
+	.uleb128 0x40
+	.4byte	0x28dc
+	.4byte	.LLST72
+	.uleb128 0x40
+	.4byte	0x28e5
+	.4byte	.LLST73
+	.uleb128 0x42
+	.8byte	.LVL183
+	.4byte	0x2b65
+	.4byte	0x2208
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC23
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL184
+	.4byte	0x2b65
+	.4byte	0x2227
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC24
+	.byte	0
+	.uleb128 0x33
+	.8byte	.LVL193
+	.4byte	0x2b65
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x4e
+	.4byte	0x2869
+	.8byte	.LBB54
+	.4byte	.Ldebug_ranges0+0x150
+	.byte	0x1
+	.2byte	0x152
+	.4byte	0x229d
+	.uleb128 0x44
+	.4byte	0x288f
+	.uleb128 0x44
+	.4byte	0x2884
+	.uleb128 0x44
+	.4byte	0x2879
+	.uleb128 0x3f
+	.4byte	.Ldebug_ranges0+0x150
+	.uleb128 0x40
+	.4byte	0x289a
+	.4byte	.LLST74
+	.uleb128 0x41
+	.4byte	0x28a3
+	.uleb128 0x40
+	.4byte	0x28ae
+	.4byte	.LLST75
+	.uleb128 0x33
+	.8byte	.LVL272
+	.4byte	0x2b65
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC33
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL187
+	.4byte	0x2b91
+	.4byte	0x22bb
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x8
+	.byte	0x88
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x8a
+	.sleb128 0
+	.byte	0x22
+	.byte	0x6
+	.byte	0
+	.uleb128 0x4f
+	.8byte	.LVL197
+	.4byte	0x2b65
+	.uleb128 0x42
+	.8byte	.LVL199
+	.4byte	0x2b9c
+	.4byte	0x22eb
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x8
+	.byte	0x8f
+	.sleb128 0
+	.byte	0x8a
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x130
+	.byte	0
+	.uleb128 0x4f
+	.8byte	.LVL202
+	.4byte	0x25e7
+	.uleb128 0x4f
+	.8byte	.LVL203
+	.4byte	0x2692
+	.uleb128 0x42
+	.8byte	.LVL204
+	.4byte	0x2b65
+	.4byte	0x2324
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC36
+	.byte	0
+	.uleb128 0x4f
+	.8byte	.LVL207
+	.4byte	0x25e7
+	.uleb128 0x4f
+	.8byte	.LVL208
+	.4byte	0x270b
+	.uleb128 0x4f
+	.8byte	.LVL215
+	.4byte	0x2692
+	.uleb128 0x4f
+	.8byte	.LVL216
+	.4byte	0x25e7
+	.uleb128 0x4f
+	.8byte	.LVL220
+	.4byte	0x25e7
+	.uleb128 0x42
+	.8byte	.LVL221
+	.4byte	0x2b65
+	.4byte	0x2389
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC30
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x3a
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL225
+	.4byte	0x2b65
+	.4byte	0x23a9
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x8f
+	.sleb128 224
+	.byte	0x6
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL226
+	.4byte	0x2b65
+	.4byte	0x23d5
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x8f
+	.sleb128 216
+	.byte	0x6
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.uleb128 0x4f
+	.8byte	.LVL227
+	.4byte	0x2692
+	.uleb128 0x42
+	.8byte	.LVL228
+	.4byte	0x1aae
+	.4byte	0x2400
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL231
+	.4byte	0x28f1
+	.4byte	0x241e
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL234
+	.4byte	0x1e16
+	.4byte	0x243c
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL237
+	.4byte	0x270b
+	.4byte	0x2458
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x6
+	.byte	0x8b
+	.sleb128 0
+	.byte	0xa
+	.2byte	0x3fc
+	.byte	0x1a
+	.byte	0
+	.uleb128 0x4f
+	.8byte	.LVL240
+	.4byte	0x2692
+	.uleb128 0x42
+	.8byte	.LVL241
+	.4byte	0x1aae
+	.4byte	0x2483
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL244
+	.4byte	0x28f1
+	.4byte	0x24a1
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL247
+	.4byte	0x1e16
+	.4byte	0x24bf
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.uleb128 0x4f
+	.8byte	.LVL249
+	.4byte	0x2ba7
+	.uleb128 0x42
+	.8byte	.LVL255
+	.4byte	0x2b65
+	.4byte	0x2504
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC35
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x15
+	.byte	0x83
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x9
+	.byte	0xe5
+	.byte	0x24
+	.byte	0x9
+	.byte	0xe5
+	.byte	0x26
+	.byte	0x3
+	.8byte	.LANCHOR2
+	.byte	0x22
+	.byte	0x6
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL281
+	.4byte	0x2b65
+	.4byte	0x2522
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.byte	0
+	.uleb128 0x4f
+	.8byte	.LVL286
+	.4byte	0x1aae
+	.uleb128 0x4f
+	.8byte	.LVL288
+	.4byte	0x2ba7
+	.uleb128 0x4f
+	.8byte	.LVL293
+	.4byte	0x28f1
+	.uleb128 0x4f
+	.8byte	.LVL294
+	.4byte	0x1e16
+	.uleb128 0x42
+	.8byte	.LVL299
+	.4byte	0x2b65
+	.4byte	0x257b
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC28
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL300
+	.4byte	0x2bb2
+	.4byte	0x259f
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x35
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 240
+	.byte	0
+	.uleb128 0x33
+	.8byte	.LVL303
+	.4byte	0x2b65
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC29
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x67c
+	.uleb128 0xb
+	.4byte	0x109
+	.4byte	0x25d7
+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x4
+	.byte	0
+	.uleb128 0xb
+	.4byte	0x109
+	.4byte	0x25e7
+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x3
+	.byte	0
+	.uleb128 0x4d
+	.4byte	.LASF456
+	.byte	0x1
+	.byte	0xa4
+	.4byte	0x59
+	.8byte	.LFB257
+	.8byte	.LFE257-.LFB257
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2692
+	.uleb128 0x36
+	.string	"uv"
+	.byte	0x1
+	.byte	0xa4
+	.4byte	0x59
+	.4byte	.LLST1
+	.uleb128 0x3a
+	.string	"dev"
+	.byte	0x1
+	.byte	0xa6
+	.4byte	0x25d
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -8
+	.uleb128 0x32
+	.string	"ret"
+	.byte	0x1
+	.byte	0xa7
+	.4byte	0x59
+	.4byte	.LLST2
+	.uleb128 0x42
+	.8byte	.LVL11
+	.4byte	0x2bbd
+	.4byte	0x2658
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC2
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8f
+	.sleb128 56
+	.byte	0
+	.uleb128 0x4f
+	.8byte	.LVL14
+	.4byte	0x2b65
+	.uleb128 0x42
+	.8byte	.LVL18
+	.4byte	0x2bc9
+	.4byte	0x267d
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x33
+	.8byte	.LVL21
+	.4byte	0x2bd5
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x64
+	.byte	0
+	.byte	0
+	.uleb128 0x4d
+	.4byte	.LASF457
+	.byte	0x1
+	.byte	0x92
+	.4byte	0x59
+	.8byte	.LFB256
+	.8byte	.LFE256-.LFB256
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x270b
+	.uleb128 0x31
+	.4byte	.LASF458
+	.byte	0x1
+	.byte	0x92
+	.4byte	0x109
+	.4byte	.LLST0
+	.uleb128 0x4f
+	.8byte	.LVL2
+	.4byte	0x2be0
+	.uleb128 0x4f
+	.8byte	.LVL3
+	.4byte	0x2beb
+	.uleb128 0x4f
+	.8byte	.LVL4
+	.4byte	0x2bf6
+	.uleb128 0x33
+	.8byte	.LVL7
+	.4byte	0x2b65
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x4d
+	.4byte	.LASF459
+	.byte	0x1
+	.byte	0x67
+	.4byte	0x59
+	.8byte	.LFB255
+	.8byte	.LFE255-.LFB255
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2869
+	.uleb128 0x31
+	.4byte	.LASF460
+	.byte	0x1
+	.byte	0x67
+	.4byte	0xa8
+	.4byte	.LLST17
+	.uleb128 0x31
+	.4byte	.LASF461
+	.byte	0x1
+	.byte	0x67
+	.4byte	0xa8
+	.4byte	.LLST18
+	.uleb128 0x31
+	.4byte	.LASF462
+	.byte	0x1
+	.byte	0x67
+	.4byte	0x109
+	.4byte	.LLST19
+	.uleb128 0x32
+	.string	"i"
+	.byte	0x1
+	.byte	0x6b
+	.4byte	0xa8
+	.4byte	.LLST20
+	.uleb128 0x37
+	.4byte	.LASF463
+	.byte	0x1
+	.byte	0x6c
+	.4byte	0xa8
+	.4byte	.LLST21
+	.uleb128 0x37
+	.4byte	.LASF464
+	.byte	0x1
+	.byte	0x6c
+	.4byte	0xa8
+	.4byte	.LLST22
+	.uleb128 0x37
+	.4byte	.LASF458
+	.byte	0x1
+	.byte	0x6c
+	.4byte	0xa8
+	.4byte	.LLST23
+	.uleb128 0x32
+	.string	"ret"
+	.byte	0x1
+	.byte	0x6d
+	.4byte	0x59
+	.4byte	.LLST24
+	.uleb128 0x4f
+	.8byte	.LVL73
+	.4byte	0x2c01
+	.uleb128 0x4f
+	.8byte	.LVL75
+	.4byte	0x2be0
+	.uleb128 0x42
+	.8byte	.LVL78
+	.4byte	0x2b65
+	.4byte	0x27da
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL79
+	.4byte	0x2beb
+	.4byte	0x27f8
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x8
+	.byte	0x8a
+	.sleb128 0
+	.byte	0xc
+	.4byte	0xffffffff
+	.byte	0x1a
+	.byte	0
+	.uleb128 0x4f
+	.8byte	.LVL80
+	.4byte	0x2bf6
+	.uleb128 0x42
+	.8byte	.LVL83
+	.4byte	0x2b65
+	.4byte	0x281d
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL84
+	.4byte	0x1aae
+	.4byte	0x2836
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x40
+	.byte	0x40
+	.byte	0x24
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL87
+	.4byte	0x2b65
+	.4byte	0x285b
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC15
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x4f
+	.8byte	.LVL92
+	.4byte	0x2ba7
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF465
+	.byte	0x1
+	.byte	0x49
+	.4byte	0x59
+	.byte	0x1
+	.4byte	0x28ba
+	.uleb128 0x3c
+	.string	"arg"
+	.byte	0x1
+	.byte	0x49
+	.4byte	0x1a04
+	.uleb128 0x47
+	.4byte	.LASF420
+	.byte	0x1
+	.byte	0x49
+	.4byte	0x1a04
+	.uleb128 0x47
+	.4byte	.LASF375
+	.byte	0x1
+	.byte	0x49
+	.4byte	0x1a04
+	.uleb128 0x48
+	.string	"i"
+	.byte	0x1
+	.byte	0x4b
+	.4byte	0xa8
+	.uleb128 0x49
+	.4byte	.LASF466
+	.byte	0x1
+	.byte	0x4b
+	.4byte	0xa8
+	.uleb128 0x49
+	.4byte	.LASF467
+	.byte	0x1
+	.byte	0x4c
+	.4byte	0xa8
+	.byte	0
+	.uleb128 0x50
+	.4byte	.LASF493
+	.byte	0x1
+	.byte	0x2d
+	.byte	0x1
+	.4byte	0x28f1
+	.uleb128 0x47
+	.4byte	.LASF420
+	.byte	0x1
+	.byte	0x2d
+	.4byte	0x1a04
+	.uleb128 0x47
+	.4byte	.LASF375
+	.byte	0x1
+	.byte	0x2d
+	.4byte	0x1a04
+	.uleb128 0x48
+	.string	"i"
+	.byte	0x1
+	.byte	0x2f
+	.4byte	0xa8
+	.uleb128 0x49
+	.4byte	.LASF466
+	.byte	0x1
+	.byte	0x2f
+	.4byte	0xa8
+	.byte	0
+	.uleb128 0x35
+	.4byte	.LASF468
+	.byte	0x4
+	.byte	0x2d
+	.4byte	0x59
+	.8byte	.LFB200
+	.8byte	.LFE200-.LFB200
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2b2d
+	.uleb128 0x31
+	.4byte	.LASF420
+	.byte	0x4
+	.byte	0x2d
+	.4byte	0x109
+	.4byte	.LLST42
+	.uleb128 0x31
+	.4byte	.LASF375
+	.byte	0x4
+	.byte	0x2d
+	.4byte	0x109
+	.4byte	.LLST43
+	.uleb128 0x37
+	.4byte	.LASF469
+	.byte	0x4
+	.byte	0x2f
+	.4byte	0xa8
+	.4byte	.LLST44
+	.uleb128 0x32
+	.string	"i"
+	.byte	0x4
+	.byte	0x2f
+	.4byte	0xa8
+	.4byte	.LLST45
+	.uleb128 0x32
+	.string	"j"
+	.byte	0x4
+	.byte	0x2f
+	.4byte	0xa8
+	.4byte	.LLST46
+	.uleb128 0x32
+	.string	"q"
+	.byte	0x4
+	.byte	0x2f
+	.4byte	0xa8
+	.4byte	.LLST47
+	.uleb128 0x3a
+	.string	"buf"
+	.byte	0x4
+	.byte	0x30
+	.4byte	0x2042
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -32
+	.uleb128 0x32
+	.string	"p"
+	.byte	0x4
+	.byte	0x31
+	.4byte	0x1365
+	.4byte	.LLST48
+	.uleb128 0x51
+	.4byte	.LASF470
+	.4byte	0x2b3d
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC45
+	.uleb128 0x42
+	.8byte	.LVL123
+	.4byte	0x2b65
+	.4byte	0x29b3
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC17
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL125
+	.4byte	0x2b65
+	.4byte	0x29d3
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x8f
+	.sleb128 200
+	.byte	0x6
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL127
+	.4byte	0x2b65
+	.4byte	0x29f1
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL130
+	.4byte	0x1a10
+	.4byte	0x2a1b
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x72
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL131
+	.4byte	0x1904
+	.4byte	0x2a44
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL139
+	.4byte	0x2b65
+	.4byte	0x2a63
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC20
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL140
+	.4byte	0x2c0d
+	.4byte	0x2a7b
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x80
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL143
+	.4byte	0x2b65
+	.4byte	0x2aa0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC21
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x80
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL146
+	.4byte	0x2b65
+	.4byte	0x2abe
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL147
+	.4byte	0x2b65
+	.4byte	0x2adc
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL149
+	.4byte	0x1a10
+	.4byte	0x2b06
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x72
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.byte	0
+	.uleb128 0x33
+	.8byte	.LVL150
+	.4byte	0x1904
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0xb
+	.4byte	0xe7
+	.4byte	0x2b3d
+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x9
+	.byte	0
+	.uleb128 0x8
+	.4byte	0x2b2d
+	.uleb128 0x52
+	.4byte	0x1a98
+	.8byte	.LFB275
+	.8byte	.LFE275-.LFB275
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2b65
+	.uleb128 0x53
+	.4byte	0x1aa4
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0
+	.uleb128 0x54
+	.4byte	.LASF471
+	.4byte	.LASF471
+	.byte	0x25
+	.byte	0x12
+	.uleb128 0x55
+	.4byte	.LASF472
+	.4byte	.LASF472
+	.byte	0x1d
+	.2byte	0x16c
+	.uleb128 0x56
+	.4byte	.LASF473
+	.4byte	.LASF473
+	.uleb128 0x55
+	.4byte	.LASF473
+	.4byte	.LASF473
+	.byte	0x1d
+	.2byte	0x16d
+	.uleb128 0x54
+	.4byte	.LASF474
+	.4byte	.LASF474
+	.byte	0xa
+	.byte	0x2d
+	.uleb128 0x54
+	.4byte	.LASF475
+	.4byte	.LASF475
+	.byte	0x26
+	.byte	0x29
+	.uleb128 0x54
+	.4byte	.LASF476
+	.4byte	.LASF476
+	.byte	0x21
+	.byte	0x11
+	.uleb128 0x54
+	.4byte	.LASF477
+	.4byte	.LASF477
+	.byte	0x20
+	.byte	0x94
+	.uleb128 0x55
+	.4byte	.LASF478
+	.4byte	.LASF478
+	.byte	0x27
+	.2byte	0x1da
+	.uleb128 0x55
+	.4byte	.LASF479
+	.4byte	.LASF479
+	.byte	0x27
+	.2byte	0x116
+	.uleb128 0x54
+	.4byte	.LASF480
+	.4byte	.LASF480
+	.byte	0x28
+	.byte	0xb
+	.uleb128 0x54
+	.4byte	.LASF481
+	.4byte	.LASF481
+	.byte	0x29
+	.byte	0xc
+	.uleb128 0x54
+	.4byte	.LASF482
+	.4byte	.LASF482
+	.byte	0x29
+	.byte	0xa
+	.uleb128 0x54
+	.4byte	.LASF483
+	.4byte	.LASF483
+	.byte	0x29
+	.byte	0xb
+	.uleb128 0x55
+	.4byte	.LASF484
+	.4byte	.LASF484
+	.byte	0x6
+	.2byte	0x2b9
+	.uleb128 0x55
+	.4byte	.LASF485
+	.4byte	.LASF485
+	.byte	0x1d
+	.2byte	0x398
+	.byte	0
+	.section	.debug_abbrev,"",@progbits
+.Ldebug_abbrev0:
+	.uleb128 0x1
+	.uleb128 0x11
+	.byte	0x1
+	.uleb128 0x25
+	.uleb128 0xe
+	.uleb128 0x13
+	.uleb128 0xb
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x1b
+	.uleb128 0xe
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x10
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x2
+	.uleb128 0x16
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x24
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3e
+	.uleb128 0xb
+	.uleb128 0x3
+	.uleb128 0xe
+	.byte	0
+	.byte	0
+	.uleb128 0x4
+	.uleb128 0x35
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x5
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.byte	0
+	.byte	0
+	.uleb128 0x6
+	.uleb128 0x24
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3e
+	.uleb128 0xb
+	.uleb128 0x3
+	.uleb128 0x8
+	.byte	0
+	.byte	0
+	.uleb128 0x7
+	.uleb128 0x16
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.uleb128 0x26
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x9
+	.uleb128 0xf
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0xa
+	.uleb128 0xf
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0x1
+	.byte	0x1
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0xc
+	.uleb128 0x21
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0xd
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.byte	0
+	.byte	0
+	.uleb128 0xe
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0xf
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x10
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x11
+	.uleb128 0x26
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x12
+	.uleb128 0x21
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2f
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x13
+	.uleb128 0x15
+	.byte	0x1
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x14
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x15
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0xb
+	.uleb128 0x5
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x16
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
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+	.byte	0
+	.uleb128 0x50
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x20
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x51
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x34
+	.uleb128 0x19
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x52
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x53
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x54
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x55
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x56
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
+	.uleb128 0x3
+	.uleb128 0xe
+	.byte	0
+	.byte	0
+	.byte	0
+	.section	.debug_loc,"",@progbits
+.Ldebug_loc0:
+.LLST76:
+	.8byte	.LVL304
+	.8byte	.LVL306
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL306
+	.8byte	.LVL307
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL307
+	.8byte	.LVL308
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL308
+	.8byte	.LFE278
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST77:
+	.8byte	.LVL304
+	.8byte	.LVL306
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL306
+	.8byte	.LFE278
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST78:
+	.8byte	.LVL305
+	.8byte	.LVL306
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL306
+	.8byte	.LVL307
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL307
+	.8byte	.LVL308
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL308
+	.8byte	.LFE278
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST79:
+	.8byte	.LVL305
+	.8byte	.LVL306
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL306
+	.8byte	.LVL307
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL307
+	.8byte	.LVL308
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL308
+	.8byte	.LVL309
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL309
+	.8byte	.LVL310
+	.2byte	0x3
+	.byte	0x83
+	.sleb128 -4
+	.byte	0x9f
+	.8byte	.LVL310
+	.8byte	.LFE278
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST29:
+	.8byte	.LVL105
+	.8byte	.LVL113
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL113
+	.8byte	.LVL117
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL117
+	.8byte	.LFE277
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST30:
+	.8byte	.LVL105
+	.8byte	.LVL106
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL106
+	.8byte	.LVL108
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL108
+	.8byte	.LVL114
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL114
+	.8byte	.LVL117
+	.2byte	0x8
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x33
+	.byte	0x25
+	.byte	0x31
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	.LVL117
+	.8byte	.LFE277
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST31:
+	.8byte	.LVL105
+	.8byte	.LVL109
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL109
+	.8byte	.LVL115-1
+	.2byte	0x1
+	.byte	0x58
+	.8byte	.LVL115-1
+	.8byte	.LVL117
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	.LVL117
+	.8byte	.LFE277
+	.2byte	0x1
+	.byte	0x58
+	.8byte	0
+	.8byte	0
+.LLST32:
+	.8byte	.LVL105
+	.8byte	.LVL107
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL107
+	.8byte	.LFE277
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST33:
+	.8byte	.LVL105
+	.8byte	.LVL110
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL110
+	.8byte	.LVL115-1
+	.2byte	0x1
+	.byte	0x5a
+	.8byte	.LVL115-1
+	.8byte	.LVL117
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x54
+	.byte	0x9f
+	.8byte	.LVL117
+	.8byte	.LFE277
+	.2byte	0x1
+	.byte	0x5a
+	.8byte	0
+	.8byte	0
+.LLST34:
+	.8byte	.LVL108
+	.8byte	.LVL113
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL113
+	.8byte	.LVL117
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL117
+	.8byte	.LFE277
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST35:
+	.8byte	.LVL108
+	.8byte	.LVL109
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL109
+	.8byte	.LVL115-1
+	.2byte	0x1
+	.byte	0x58
+	.8byte	.LVL115-1
+	.8byte	.LVL117
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	.LVL117
+	.8byte	.LFE277
+	.2byte	0x1
+	.byte	0x58
+	.8byte	0
+	.8byte	0
+.LLST36:
+	.8byte	.LVL108
+	.8byte	.LVL110
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL110
+	.8byte	.LVL115-1
+	.2byte	0x1
+	.byte	0x57
+	.8byte	.LVL117
+	.8byte	.LVL119
+	.2byte	0x1
+	.byte	0x57
+	.8byte	.LVL119
+	.8byte	.LVL120
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL120
+	.8byte	.LFE277
+	.2byte	0x1
+	.byte	0x57
+	.8byte	0
+	.8byte	0
+.LLST37:
+	.8byte	.LVL108
+	.8byte	.LVL110
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL110
+	.8byte	.LVL115-1
+	.2byte	0x1
+	.byte	0x56
+	.8byte	.LVL117
+	.8byte	.LFE277
+	.2byte	0x1
+	.byte	0x56
+	.8byte	0
+	.8byte	0
+.LLST38:
+	.8byte	.LVL108
+	.8byte	.LVL110
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL110
+	.8byte	.LVL115-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL117
+	.8byte	.LFE277
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST39:
+	.8byte	.LVL108
+	.8byte	.LVL112
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL112
+	.8byte	.LVL115-1
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL117
+	.8byte	.LFE277
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST40:
+	.8byte	.LVL108
+	.8byte	.LVL112
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL112
+	.8byte	.LVL115-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL117
+	.8byte	.LFE277
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST41:
+	.8byte	.LVL108
+	.8byte	.LVL112
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL112
+	.8byte	.LVL116
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL116
+	.8byte	.LVL117
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL117
+	.8byte	.LFE277
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST25:
+	.8byte	.LVL97
+	.8byte	.LVL98
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL98
+	.8byte	.LVL100
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL100
+	.8byte	.LFE276
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST26:
+	.8byte	.LVL97
+	.8byte	.LVL99
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL99
+	.8byte	.LFE276
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST27:
+	.8byte	.LVL100
+	.8byte	.LVL101
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL101
+	.8byte	.LFE276
+	.2byte	0x1
+	.byte	0x55
+	.8byte	0
+	.8byte	0
+.LLST28:
+	.8byte	.LVL100
+	.8byte	.LVL101
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL101
+	.8byte	.LFE276
+	.2byte	0x1
+	.byte	0x54
+	.8byte	0
+	.8byte	0
+.LLST3:
+	.8byte	.LVL22
+	.8byte	.LVL26-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL26-1
+	.8byte	.LVL40
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL40
+	.8byte	.LVL42
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL42
+	.8byte	.LFE274
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST4:
+	.8byte	.LVL22
+	.8byte	.LVL25
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL25
+	.8byte	.LVL26-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL26-1
+	.8byte	.LVL41
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL41
+	.8byte	.LVL42
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL42
+	.8byte	.LFE274
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST5:
+	.8byte	.LVL24
+	.8byte	.LVL25
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL25
+	.8byte	.LVL26-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL26-1
+	.8byte	.LVL39
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL42
+	.8byte	.LFE274
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST6:
+	.8byte	.LVL23
+	.8byte	.LVL26-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL26-1
+	.8byte	.LVL39
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL42
+	.8byte	.LFE274
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST7:
+	.8byte	.LVL28
+	.8byte	.LVL29
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL29
+	.8byte	.LVL32-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL35
+	.8byte	.LVL37
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL42
+	.8byte	.LVL44
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST8:
+	.8byte	.LVL26
+	.8byte	.LVL27
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL27
+	.8byte	.LVL31
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL31
+	.8byte	.LVL34
+	.2byte	0x3
+	.byte	0x8c
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL34
+	.8byte	.LVL39
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL42
+	.8byte	.LVL46
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	0
+	.8byte	0
+.LLST9:
+	.8byte	.LVL26
+	.8byte	.LVL27
+	.2byte	0x6
+	.byte	0x9e
+	.uleb128 0x4
+	.4byte	0x80808080
+	.8byte	.LVL27
+	.8byte	.LVL39
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL42
+	.8byte	.LVL47
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST10:
+	.8byte	.LVL26
+	.8byte	.LVL27
+	.2byte	0x6
+	.byte	0xc
+	.4byte	0x40404040
+	.byte	0x9f
+	.8byte	.LVL27
+	.8byte	.LVL39
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL42
+	.8byte	.LVL45
+	.2byte	0x1
+	.byte	0x69
+	.8byte	0
+	.8byte	0
+.LLST11:
+	.8byte	.LVL24
+	.8byte	.LVL27
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST12:
+	.8byte	.LVL26
+	.8byte	.LVL40
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL40
+	.8byte	.LVL42
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL42
+	.8byte	.LFE274
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST13:
+	.8byte	.LVL24
+	.8byte	.LVL30
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL34
+	.8byte	.LVL36
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL36
+	.8byte	.LVL39
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL42
+	.8byte	.LFE274
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST14:
+	.8byte	.LVL50
+	.8byte	.LVL51
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL51
+	.8byte	.LVL53
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL56
+	.8byte	.LVL60
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL63
+	.8byte	.LFE274
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST15:
+	.8byte	.LVL47
+	.8byte	.LVL54
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL54
+	.8byte	.LVL55
+	.2byte	0x3
+	.byte	0x83
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL55
+	.8byte	.LFE274
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST16:
+	.8byte	.LVL47
+	.8byte	.LVL52
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL55
+	.8byte	.LVL58
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL58
+	.8byte	.LVL63
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL63
+	.8byte	.LFE274
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST49:
+	.8byte	.LVL153
+	.8byte	.LVL155
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL155
+	.8byte	.LVL174
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL174
+	.8byte	.LFE271
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST50:
+	.8byte	.LVL153
+	.8byte	.LVL154
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL154
+	.8byte	.LVL162
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL162
+	.8byte	.LVL163
+	.2byte	0x3
+	.byte	0x83
+	.sleb128 32
+	.byte	0x9f
+	.8byte	.LVL163
+	.8byte	.LFE271
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST51:
+	.8byte	.LVL160
+	.8byte	.LVL164
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL164
+	.8byte	.LVL167
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST52:
+	.8byte	.LVL167
+	.8byte	.LVL173
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST53:
+	.8byte	.LVL160
+	.8byte	.LVL164
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL164
+	.8byte	.LVL168
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL168
+	.8byte	.LVL169
+	.2byte	0x3
+	.byte	0x85
+	.sleb128 -8
+	.byte	0x9f
+	.8byte	.LVL169
+	.8byte	.LVL173
+	.2byte	0x3
+	.byte	0x86
+	.sleb128 -40
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST54:
+	.8byte	.LVL169
+	.8byte	.LVL173
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST55:
+	.8byte	.LVL156
+	.8byte	.LVL166
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL166
+	.8byte	.LVL170
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL172
+	.8byte	.LFE271
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST56:
+	.8byte	.LVL159
+	.8byte	.LVL161
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST57:
+	.8byte	.LVL158
+	.8byte	.LVL159
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST58:
+	.8byte	.LVL175
+	.8byte	.LVL176
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL176
+	.8byte	.LFE258
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST59:
+	.8byte	.LVL175
+	.8byte	.LVL178
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL178
+	.8byte	.LFE258
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST60:
+	.8byte	.LVL175
+	.8byte	.LVL177
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL177
+	.8byte	.LVL196
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL196
+	.8byte	.LVL296
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	.LVL296
+	.8byte	.LVL297
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL297
+	.8byte	.LFE258
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST61:
+	.8byte	.LVL175
+	.8byte	.LVL178
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL178
+	.8byte	.LVL203
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL203
+	.8byte	.LVL205
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL205
+	.8byte	.LVL217
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL217
+	.8byte	.LVL218
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL218
+	.8byte	.LVL223
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL223
+	.8byte	.LVL256
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL256
+	.8byte	.LVL260
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL260
+	.8byte	.LVL268
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL268
+	.8byte	.LVL279
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL279
+	.8byte	.LVL296
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL296
+	.8byte	.LVL303
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL303
+	.8byte	.LFE258
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST62:
+	.8byte	.LVL186
+	.8byte	.LVL188
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL188
+	.8byte	.LVL189
+	.2byte	0x3
+	.byte	0x87
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL195
+	.8byte	.LVL196
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL221
+	.8byte	.LVL222
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL225
+	.8byte	.LVL250
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL250
+	.8byte	.LVL251
+	.2byte	0x3
+	.byte	0x89
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL257
+	.8byte	.LVL258
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL258
+	.8byte	.LVL259
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL260
+	.8byte	.LVL268
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL281
+	.8byte	.LVL282
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL285
+	.8byte	.LVL289
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL292
+	.8byte	.LVL296
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL296
+	.8byte	.LVL298
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST63:
+	.8byte	.LVL195
+	.8byte	.LVL196
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL198
+	.8byte	.LVL203
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL205
+	.8byte	.LVL223
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL256
+	.8byte	.LVL260
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL268
+	.8byte	.LVL290
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL290
+	.8byte	.LVL291
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL291
+	.8byte	.LVL303
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST64:
+	.8byte	.LVL229
+	.8byte	.LVL232
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL232
+	.8byte	.LVL235
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL235
+	.8byte	.LVL238
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL242
+	.8byte	.LVL245
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL245
+	.8byte	.LVL248
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL248
+	.8byte	.LVL250
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL260
+	.8byte	.LVL261
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL261
+	.8byte	.LVL262
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL262
+	.8byte	.LVL263
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL264
+	.8byte	.LVL265
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL265
+	.8byte	.LVL266
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL266
+	.8byte	.LVL268
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL287
+	.8byte	.LVL290
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL290
+	.8byte	.LVL292
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL295
+	.8byte	.LVL296
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST65:
+	.8byte	.LVL222
+	.8byte	.LVL223
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL223
+	.8byte	.LVL254
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL260
+	.8byte	.LVL268
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL279
+	.8byte	.LVL296
+	.2byte	0x1
+	.byte	0x69
+	.8byte	0
+	.8byte	0
+.LLST66:
+	.8byte	.LVL178
+	.8byte	.LVL203
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL205
+	.8byte	.LVL214
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL214
+	.8byte	.LVL218
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL218
+	.8byte	.LVL254
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL256
+	.8byte	.LVL272
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL272
+	.8byte	.LVL274
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL274
+	.8byte	.LVL279
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL279
+	.8byte	.LVL296
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL296
+	.8byte	.LVL303
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST67:
+	.8byte	.LVL178
+	.8byte	.LVL200
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL200
+	.8byte	.LVL201
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL201
+	.8byte	.LVL203
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL205
+	.8byte	.LVL206
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL206
+	.8byte	.LVL209
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL209
+	.8byte	.LVL211
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL211
+	.8byte	.LVL218
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL218
+	.8byte	.LVL219
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL219
+	.8byte	.LVL223
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL223
+	.8byte	.LVL229
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL229
+	.8byte	.LVL230
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL230
+	.8byte	.LVL232
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL232
+	.8byte	.LVL233
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL233
+	.8byte	.LVL235
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL235
+	.8byte	.LVL236
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL236
+	.8byte	.LVL238
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL238
+	.8byte	.LVL239
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL239
+	.8byte	.LVL242
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL242
+	.8byte	.LVL243
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL243
+	.8byte	.LVL244-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL244-1
+	.8byte	.LVL245
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 212
+	.8byte	.LVL245
+	.8byte	.LVL246
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL246
+	.8byte	.LVL248
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL248
+	.8byte	.LVL249-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL249-1
+	.8byte	.LVL250
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL250
+	.8byte	.LVL252
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL252
+	.8byte	.LVL256
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL256
+	.8byte	.LVL260
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL260
+	.8byte	.LVL263
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL263
+	.8byte	.LVL264
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL264
+	.8byte	.LVL267
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL267
+	.8byte	.LVL268
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL268
+	.8byte	.LVL273
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL274
+	.8byte	.LVL279
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL279
+	.8byte	.LVL282
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL282
+	.8byte	.LVL284
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL284
+	.8byte	.LVL287
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL287
+	.8byte	.LVL288-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL288-1
+	.8byte	.LVL292
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL292
+	.8byte	.LVL295
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL295
+	.8byte	.LVL296
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL296
+	.8byte	.LVL301
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL301
+	.8byte	.LVL302
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL302
+	.8byte	.LVL303-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL303-1
+	.8byte	.LVL303
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST68:
+	.8byte	.LVL178
+	.8byte	.LVL203
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL205
+	.8byte	.LVL252
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL252
+	.8byte	.LVL253
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL256
+	.8byte	.LVL282
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL282
+	.8byte	.LVL283
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL284
+	.8byte	.LVL303
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST69:
+	.8byte	.LVL222
+	.8byte	.LVL254
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL260
+	.8byte	.LVL268
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	0
+	.8byte	0
+.LLST70:
+	.8byte	.LVL178
+	.8byte	.LVL185
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL189
+	.8byte	.LVL195
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST71:
+	.8byte	.LVL178
+	.8byte	.LVL185
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL189
+	.8byte	.LVL195
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST72:
+	.8byte	.LVL178
+	.8byte	.LVL179
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL179
+	.8byte	.LVL180
+	.2byte	0x3
+	.byte	0x70
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL181
+	.8byte	.LVL182
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL184
+	.8byte	.LVL185
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL189
+	.8byte	.LVL190
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL190
+	.8byte	.LVL191
+	.2byte	0x3
+	.byte	0x70
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL192
+	.8byte	.LVL193
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL193
+	.8byte	.LVL194
+	.2byte	0x3
+	.byte	0x87
+	.sleb128 1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST73:
+	.8byte	.LVL178
+	.8byte	.LVL185
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL189
+	.8byte	.LVL195
+	.2byte	0x1
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST74:
+	.8byte	.LVL210
+	.8byte	.LVL212
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL212
+	.8byte	.LVL213
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL213
+	.8byte	.LVL214
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL268
+	.8byte	.LVL269
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL269
+	.8byte	.LVL270
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL270
+	.8byte	.LVL271
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL275
+	.8byte	.LVL276
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL276
+	.8byte	.LVL277
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL277
+	.8byte	.LVL278
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL278
+	.8byte	.LVL279
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST75:
+	.8byte	.LVL269
+	.8byte	.LVL272
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL274
+	.8byte	.LVL279
+	.2byte	0x1
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST1:
+	.8byte	.LVL9
+	.8byte	.LVL10
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL10
+	.8byte	.LVL15
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL15
+	.8byte	.LVL16
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL16
+	.8byte	.LFE257
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST2:
+	.8byte	.LVL11
+	.8byte	.LVL12
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL12
+	.8byte	.LVL13
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL16
+	.8byte	.LVL17
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL19
+	.8byte	.LVL20
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL20
+	.8byte	.LFE257
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST0:
+	.8byte	.LVL0
+	.8byte	.LVL1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1
+	.8byte	.LVL2-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL2
+	.8byte	.LVL3-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL5
+	.8byte	.LVL6
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL6
+	.8byte	.LVL7-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL7-1
+	.8byte	.LVL8
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST17:
+	.8byte	.LVL65
+	.8byte	.LVL66
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL66
+	.8byte	.LVL69
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL69
+	.8byte	.LVL70
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL70
+	.8byte	.LVL88
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL91
+	.8byte	.LFE255
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST18:
+	.8byte	.LVL65
+	.8byte	.LVL68
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL68
+	.8byte	.LVL72
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST19:
+	.8byte	.LVL65
+	.8byte	.LVL72
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL72
+	.8byte	.LVL90
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL90
+	.8byte	.LVL91
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	.LVL91
+	.8byte	.LFE255
+	.2byte	0x1
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST20:
+	.8byte	.LVL71
+	.8byte	.LVL72
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL72
+	.8byte	.LVL89
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL91
+	.8byte	.LFE255
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST21:
+	.8byte	.LVL71
+	.8byte	.LVL88
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL91
+	.8byte	.LFE255
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST22:
+	.8byte	.LVL73
+	.8byte	.LVL74
+	.2byte	0x9
+	.byte	0x70
+	.sleb128 0
+	.byte	0x83
+	.sleb128 0
+	.byte	0x1d
+	.byte	0x84
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST23:
+	.8byte	.LVL76
+	.8byte	.LVL77
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL77
+	.8byte	.LVL78-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL81
+	.8byte	.LVL82
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL82
+	.8byte	.LVL83-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST24:
+	.8byte	.LVL65
+	.8byte	.LVL85
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL85
+	.8byte	.LVL86
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL86
+	.8byte	.LVL87
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL91
+	.8byte	.LVL92-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL92-1
+	.8byte	.LVL93
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL94
+	.8byte	.LFE255
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	0
+	.8byte	0
+.LLST42:
+	.8byte	.LVL121
+	.8byte	.LVL122
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL122
+	.8byte	.LVL133
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL133
+	.8byte	.LVL136
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL136
+	.8byte	.LFE200
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST43:
+	.8byte	.LVL121
+	.8byte	.LVL123-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL123-1
+	.8byte	.LVL134
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL134
+	.8byte	.LVL136
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL136
+	.8byte	.LFE200
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST44:
+	.8byte	.LVL123
+	.8byte	.LVL124
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL124
+	.8byte	.LVL132
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL136
+	.8byte	.LVL145
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL146
+	.8byte	.LFE200
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST45:
+	.8byte	.LVL127
+	.8byte	.LVL128
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL147
+	.8byte	.LVL148
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST46:
+	.8byte	.LVL125
+	.8byte	.LVL132
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL136
+	.8byte	.LVL144
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL145
+	.8byte	.LFE200
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST47:
+	.8byte	.LVL124
+	.8byte	.LVL125
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL125
+	.8byte	.LVL126
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL126
+	.8byte	.LVL127
+	.2byte	0x4
+	.byte	0x8c
+	.sleb128 0
+	.byte	0x20
+	.byte	0x9f
+	.8byte	.LVL127
+	.8byte	.LVL135
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL136
+	.8byte	.LFE200
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	0
+	.8byte	0
+.LLST48:
+	.8byte	.LVL141
+	.8byte	.LVL142
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL142
+	.8byte	.LFE200
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+	.section	.debug_aranges,"",@progbits
+	.4byte	0xcc
+	.2byte	0x2
+	.4byte	.Ldebug_info0
+	.byte	0x8
+	.byte	0
+	.2byte	0
+	.2byte	0
+	.8byte	.LFB256
+	.8byte	.LFE256-.LFB256
+	.8byte	.LFB257
+	.8byte	.LFE257-.LFB257
+	.8byte	.LFB274
+	.8byte	.LFE274-.LFB274
+	.8byte	.LFB255
+	.8byte	.LFE255-.LFB255
+	.8byte	.LFB275
+	.8byte	.LFE275-.LFB275
+	.8byte	.LFB276
+	.8byte	.LFE276-.LFB276
+	.8byte	.LFB277
+	.8byte	.LFE277-.LFB277
+	.8byte	.LFB200
+	.8byte	.LFE200-.LFB200
+	.8byte	.LFB271
+	.8byte	.LFE271-.LFB271
+	.8byte	.LFB258
+	.8byte	.LFE258-.LFB258
+	.8byte	.LFB278
+	.8byte	.LFE278-.LFB278
+	.8byte	0
+	.8byte	0
+	.section	.debug_ranges,"",@progbits
+.Ldebug_ranges0:
+	.8byte	.LBB12
+	.8byte	.LBE12
+	.8byte	.LBB18
+	.8byte	.LBE18
+	.8byte	.LBB19
+	.8byte	.LBE19
+	.8byte	.LBB20
+	.8byte	.LBE20
+	.8byte	.LBB24
+	.8byte	.LBE24
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB21
+	.8byte	.LBE21
+	.8byte	.LBB25
+	.8byte	.LBE25
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB29
+	.8byte	.LBE29
+	.8byte	.LBB34
+	.8byte	.LBE34
+	.8byte	.LBB35
+	.8byte	.LBE35
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB40
+	.8byte	.LBE40
+	.8byte	.LBB48
+	.8byte	.LBE48
+	.8byte	.LBB49
+	.8byte	.LBE49
+	.8byte	.LBB50
+	.8byte	.LBE50
+	.8byte	.LBB51
+	.8byte	.LBE51
+	.8byte	.LBB52
+	.8byte	.LBE52
+	.8byte	.LBB53
+	.8byte	.LBE53
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB54
+	.8byte	.LBE54
+	.8byte	.LBB58
+	.8byte	.LBE58
+	.8byte	.LBB59
+	.8byte	.LBE59
+	.8byte	0
+	.8byte	0
+	.8byte	.LFB256
+	.8byte	.LFE256
+	.8byte	.LFB257
+	.8byte	.LFE257
+	.8byte	.LFB274
+	.8byte	.LFE274
+	.8byte	.LFB255
+	.8byte	.LFE255
+	.8byte	.LFB275
+	.8byte	.LFE275
+	.8byte	.LFB276
+	.8byte	.LFE276
+	.8byte	.LFB277
+	.8byte	.LFE277
+	.8byte	.LFB200
+	.8byte	.LFE200
+	.8byte	.LFB271
+	.8byte	.LFE271
+	.8byte	.LFB258
+	.8byte	.LFE258
+	.8byte	.LFB278
+	.8byte	.LFE278
+	.8byte	0
+	.8byte	0
+	.section	.debug_line,"",@progbits
+.Ldebug_line0:
+	.section	.debug_str,"MS",@progbits,1
+.LASF416:
+	.string	"test_pattern"
+.LASF399:
+	.string	"puts"
+.LASF64:
+	.string	"reserved"
+.LASF470:
+	.string	"__func__"
+.LASF464:
+	.string	"target_freq"
+.LASF138:
+	.string	"bootm_headers"
+.LASF227:
+	.string	"UCLASS_RAMDISK"
+.LASF156:
+	.string	"rd_end"
+.LASF318:
+	.string	"eth_device"
+.LASF452:
+	.string	"test_banks"
+.LASF127:
+	.string	"ih_comp"
+.LASF23:
+	.string	"_Bool"
+.LASF334:
+	.string	"net_root_path"
+.LASF445:
+	.string	"cmdtp"
+.LASF365:
+	.string	"unbind"
+.LASF145:
+	.string	"fit_noffset_os"
+.LASF35:
+	.string	"priv"
+.LASF486:
+	.ascii	"GNU C11 6.3.1 20170404 -ms"
+	.string	"trict-align -march=armv8-a+nosimd -mlittle-endian -mabi=lp64 -g -Os -fno-builtin -ffreestanding -fshort-wchar -fno-stack-protector -fno-delete-null-pointer-checks -fstack-usage -fno-pic -ffunction-sections -fdata-sections -ffixed-r9 -fno-common -ffixed-x18"
+.LASF22:
+	.string	"___strtok"
+.LASF234:
+	.string	"UCLASS_SPI_GENERIC"
+.LASF431:
+	.string	"capacity"
+.LASF279:
+	.string	"ram_size"
+.LASF332:
+	.string	"net_nis_domain"
+.LASF438:
+	.string	"diagonalscan"
+.LASF36:
+	.string	"uclass"
+.LASF185:
+	.string	"UCLASS_CODEC"
+.LASF47:
+	.string	"next"
+.LASF375:
+	.string	"length"
+.LASF381:
+	.string	"uc_drv"
+.LASF181:
+	.string	"UCLASS_AHCI"
+.LASF195:
+	.string	"UCLASS_I2C_MUX"
+.LASF168:
+	.string	"uclass_id"
+.LASF491:
+	.string	"cpu_2_io"
+.LASF330:
+	.string	"net_netmask"
+.LASF101:
+	.string	"CMD_RET_FAILURE"
+.LASF148:
+	.string	"fit_noffset_rd"
+.LASF228:
+	.string	"UCLASS_RTC"
+.LASF67:
+	.string	"bi_memsize"
+.LASF68:
+	.string	"bi_flashstart"
+.LASF369:
+	.string	"child_post_remove"
+.LASF323:
+	.string	"recv"
+.LASF153:
+	.string	"fit_uname_setup"
+.LASF481:
+	.string	"rockchip_ddrclk_sip_round_rate_v2"
+.LASF235:
+	.string	"UCLASS_SYSCON"
+.LASF187:
+	.string	"UCLASS_DISPLAY"
+.LASF268:
+	.string	"global_data"
+.LASF92:
+	.string	"IRQ_STACK_START_IN"
+.LASF84:
+	.string	"bi_dram"
+.LASF226:
+	.string	"UCLASS_RKNAND"
+.LASF297:
+	.string	"malloc_ptr"
+.LASF193:
+	.string	"UCLASS_I2C_EEPROM"
+.LASF177:
+	.string	"UCLASS_PCI_EMUL"
+.LASF417:
+	.string	"test_pat_param"
+.LASF103:
+	.string	"fdt_header"
+.LASF292:
+	.string	"env_buf"
+.LASF418:
+	.string	"_u_boot_list_2_cmd_2_ddr_test"
+.LASF106:
+	.string	"off_dt_struct"
+.LASF405:
+	.string	"console_devices"
+.LASF353:
+	.string	"NETLOOP_CONTINUE"
+.LASF231:
+	.string	"UCLASS_SPI"
+.LASF473:
+	.string	"memcpy"
+.LASF245:
+	.string	"UCLASS_VIDEO_CONSOLE"
+.LASF243:
+	.string	"UCLASS_VIDEO"
+.LASF357:
+	.string	"net_state"
+.LASF487:
+	.string	"cmd/ddr_tool/ddr_test_code.c"
+.LASF287:
+	.string	"uclass_root"
+.LASF86:
+	.string	"IRQ_STACK_START"
+.LASF163:
+	.string	"verify"
+.LASF354:
+	.string	"NETLOOP_RESTART"
+.LASF453:
+	.string	"abort"
+.LASF406:
+	.string	"cd_count"
+.LASF371:
+	.string	"platdata_auto_alloc_size"
+.LASF317:
+	.string	"s_addr"
+.LASF450:
+	.string	"err_case"
+.LASF167:
+	.string	"command_ret_t"
+.LASF236:
+	.string	"UCLASS_SYSRESET"
+.LASF169:
+	.string	"UCLASS_ROOT"
+.LASF301:
+	.string	"pm_ctx_phys"
+.LASF186:
+	.string	"UCLASS_CROS_EC"
+.LASF463:
+	.string	"delta_freq"
+.LASF326:
+	.string	"index"
+.LASF458:
+	.string	"freq"
+.LASF94:
+	.string	"maxargs"
+.LASF121:
+	.string	"ih_load"
+.LASF249:
+	.string	"UCLASS_KEY"
+.LASF408:
+	.string	"SCANFREQ"
+.LASF88:
+	.string	"_datarel_start_ofs"
+.LASF271:
+	.string	"pci_clk"
+.LASF180:
+	.string	"UCLASS_ADC"
+.LASF366:
+	.string	"ofdata_to_platdata"
+.LASF125:
+	.string	"ih_arch"
+.LASF309:
+	.string	"gd_t"
+.LASF198:
+	.string	"UCLASS_IRQ"
+.LASF5:
+	.string	"__u8"
+.LASF329:
+	.string	"net_gateway"
+.LASF351:
+	.string	"net_ping_ip"
+.LASF135:
+	.string	"type"
+.LASF465:
+	.string	"get_test_addr"
+.LASF61:
+	.string	"lmb_region"
+.LASF423:
+	.string	"wr_val"
+.LASF55:
+	.string	"protect"
+.LASF260:
+	.string	"tlb_addr"
+.LASF426:
+	.string	"print_memory"
+.LASF439:
+	.string	"next_adr"
+.LASF39:
+	.string	"uclass_node"
+.LASF171:
+	.string	"UCLASS_TEST"
+.LASF350:
+	.string	"net_boot_file_expected_size_in_blocks"
+.LASF24:
+	.string	"image_base"
+.LASF141:
+	.string	"legacy_hdr_valid"
+.LASF239:
+	.string	"UCLASS_TPM"
+.LASF100:
+	.string	"CMD_RET_SUCCESS"
+.LASF397:
+	.string	"stop"
+.LASF204:
+	.string	"UCLASS_MISC"
+.LASF52:
+	.string	"sector_count"
+.LASF263:
+	.string	"tlb_emerg"
+.LASF434:
+	.string	"err_addr"
+.LASF93:
+	.string	"cmd_tbl_s"
+.LASF99:
+	.string	"cmd_tbl_t"
+.LASF266:
+	.string	"baudrate"
+.LASF358:
+	.string	"mem_malloc_start"
+.LASF246:
+	.string	"UCLASS_VIDEO_CRTC"
+.LASF79:
+	.string	"bi_ethspeed"
+.LASF129:
+	.string	"image_header_t"
+.LASF382:
+	.string	"dev_head"
+.LASF11:
+	.string	"phys_addr_t"
+.LASF126:
+	.string	"ih_type"
+.LASF0:
+	.string	"unsigned char"
+.LASF409:
+	.string	"RANDOM"
+.LASF140:
+	.string	"legacy_hdr_os_copy"
+.LASF477:
+	.string	"uclass_get_device"
+.LASF211:
+	.string	"UCLASS_PANEL_BACKLIGHT"
+.LASF270:
+	.string	"bus_clk"
+.LASF173:
+	.string	"UCLASS_TEST_BUS"
+.LASF73:
+	.string	"bi_arm_freq"
+.LASF200:
+	.string	"UCLASS_LED"
+.LASF379:
+	.string	"p_current"
+.LASF342:
+	.string	"net_rx_packet_len"
+.LASF344:
+	.string	"net_null_ethaddr"
+.LASF53:
+	.string	"flash_id"
+.LASF313:
+	.string	"load_addr"
+.LASF424:
+	.string	"reread"
+.LASF321:
+	.string	"init"
+.LASF251:
+	.string	"UCLASS_CHARGE_DISPLAY"
+.LASF437:
+	.string	"cmp_value"
+.LASF178:
+	.string	"UCLASS_USB_EMUL"
+.LASF363:
+	.string	"probe"
+.LASF378:
+	.string	"ofnode"
+.LASF269:
+	.string	"cpu_clk"
+.LASF308:
+	.string	"sibling"
+.LASF265:
+	.string	"using_pre_serial"
+.LASF217:
+	.string	"UCLASS_PINCTRL"
+.LASF115:
+	.string	"fdt32_t"
+.LASF376:
+	.string	"value"
+.LASF247:
+	.string	"UCLASS_WDT"
+.LASF440:
+	.string	"page_size"
+.LASF132:
+	.string	"image_len"
+.LASF280:
+	.string	"mon_len"
+.LASF63:
+	.string	"memory"
+.LASF492:
+	.string	"exit"
+.LASF241:
+	.string	"UCLASS_USB_DEV_GENERIC"
+.LASF248:
+	.string	"UCLASS_FG"
+.LASF451:
+	.string	"test_times"
+.LASF373:
+	.string	"per_child_platdata_auto_alloc_size"
+.LASF469:
+	.string	"shift"
+.LASF21:
+	.string	"errno"
+.LASF51:
+	.string	"size"
+.LASF333:
+	.string	"net_hostname"
+.LASF31:
+	.string	"uclass_platdata"
+.LASF396:
+	.string	"stdio_dev"
+.LASF139:
+	.string	"legacy_hdr_os"
+.LASF131:
+	.string	"image_start"
+.LASF18:
+	.string	"uint8_t"
+.LASF76:
+	.string	"bi_bootflags"
+.LASF118:
+	.string	"ih_hcrc"
+.LASF392:
+	.string	"destroy"
+.LASF461:
+	.string	"max_freq"
+.LASF210:
+	.string	"UCLASS_PANEL"
+.LASF368:
+	.string	"child_pre_probe"
+.LASF257:
+	.string	"timer_rate_hz"
+.LASF33:
+	.string	"driver_data"
+.LASF427:
+	.string	"write_buf_to_ddr"
+.LASF383:
+	.string	"udevice_id"
+.LASF370:
+	.string	"priv_auto_alloc_size"
+.LASF240:
+	.string	"UCLASS_USB"
+.LASF172:
+	.string	"UCLASS_TEST_FDT"
+.LASF327:
+	.string	"eth_current"
+.LASF74:
+	.string	"bi_dsp_freq"
+.LASF4:
+	.string	"uchar"
+.LASF120:
+	.string	"ih_size"
+.LASF267:
+	.string	"addr"
+.LASF175:
+	.string	"UCLASS_SPI_EMUL"
+.LASF256:
+	.string	"arch_global_data"
+.LASF214:
+	.string	"UCLASS_PCI_GENERIC"
+.LASF71:
+	.string	"bi_sramstart"
+.LASF87:
+	.string	"FIQ_STACK_START"
+.LASF389:
+	.string	"pre_probe"
+.LASF319:
+	.string	"enetaddr"
+.LASF216:
+	.string	"UCLASS_PINCONFIG"
+.LASF421:
+	.string	"prt_en"
+.LASF225:
+	.string	"UCLASS_RESET"
+.LASF170:
+	.string	"UCLASS_DEMO"
+.LASF296:
+	.string	"malloc_limit"
+.LASF65:
+	.string	"bd_info"
+.LASF372:
+	.string	"per_child_auto_alloc_size"
+.LASF81:
+	.string	"bi_busfreq"
+.LASF281:
+	.string	"irq_sp"
+.LASF402:
+	.string	"list"
+.LASF182:
+	.string	"UCLASS_BLK"
+.LASF282:
+	.string	"start_addr_sp"
+.LASF337:
+	.string	"net_ip"
+.LASF475:
+	.string	"strict_strtoul"
+.LASF320:
+	.string	"iobase"
+.LASF123:
+	.string	"ih_dcrc"
+.LASF56:
+	.string	"flash_info_t"
+.LASF471:
+	.string	"printf"
+.LASF444:
+	.string	"os_reg"
+.LASF80:
+	.string	"bi_intfreq"
+.LASF314:
+	.string	"save_addr"
+.LASF259:
+	.string	"timer_reset_value"
+.LASF377:
+	.string	"of_offset"
+.LASF201:
+	.string	"UCLASS_LPC"
+.LASF70:
+	.string	"bi_flashoffset"
+.LASF300:
+	.string	"video_bottom"
+.LASF454:
+	.string	"scan_freq_loop"
+.LASF202:
+	.string	"UCLASS_MAILBOX"
+.LASF415:
+	.string	"g_isi_pattern"
+.LASF108:
+	.string	"off_mem_rsvmap"
+.LASF362:
+	.string	"bind"
+.LASF199:
+	.string	"UCLASS_KEYBOARD"
+.LASF206:
+	.string	"UCLASS_MOD_EXP"
+.LASF116:
+	.string	"image_header"
+.LASF110:
+	.string	"last_comp_version"
+.LASF77:
+	.string	"bi_ip_addr"
+.LASF414:
+	.string	"TESTCASSMAX"
+.LASF298:
+	.string	"cur_serial_dev"
+.LASF57:
+	.string	"flash_info"
+.LASF16:
+	.string	"ushort"
+.LASF395:
+	.string	"console_buffer"
+.LASF104:
+	.string	"magic"
+.LASF305:
+	.string	"full_name"
+.LASF472:
+	.string	"memset"
+.LASF331:
+	.string	"net_dns_server"
+.LASF482:
+	.string	"rockchip_ddrclk_sip_set_rate_v2"
+.LASF403:
+	.string	"stdio_devices"
+.LASF462:
+	.string	"times"
+.LASF355:
+	.string	"NETLOOP_SUCCESS"
+.LASF28:
+	.string	"name"
+.LASF264:
+	.string	"pre_serial"
+.LASF90:
+	.string	"_datarellocal_start_ofs"
+.LASF96:
+	.string	"usage"
+.LASF152:
+	.string	"fit_hdr_setup"
+.LASF183:
+	.string	"UCLASS_CLK"
+.LASF41:
+	.string	"sibling_node"
+.LASF160:
+	.string	"initrd_end"
+.LASF310:
+	.string	"monitor_flash_len"
+.LASF398:
+	.string	"putc"
+.LASF360:
+	.string	"mem_malloc_brk"
+.LASF12:
+	.string	"phys_size_t"
+.LASF83:
+	.string	"bi_boot_params"
+.LASF250:
+	.string	"UCLASS_RC"
+.LASF72:
+	.string	"bi_sramsize"
+.LASF293:
+	.string	"timebase_h"
+.LASF294:
+	.string	"timebase_l"
+.LASF13:
+	.string	"sizetype"
+.LASF78:
+	.string	"bi_enetaddr"
+.LASF341:
+	.string	"net_rx_packet"
+.LASF459:
+	.string	"scan_freq"
+.LASF393:
+	.string	"per_device_auto_alloc_size"
+.LASF229:
+	.string	"UCLASS_SCSI"
+.LASF2:
+	.string	"short unsigned int"
+.LASF3:
+	.string	"signed char"
+.LASF339:
+	.string	"net_tx_packet"
+.LASF54:
+	.string	"start"
+.LASF380:
+	.string	"current"
+.LASF412:
+	.string	"FASTTEST"
+.LASF255:
+	.string	"LOGF_MAX_CATEGORIES"
+.LASF134:
+	.string	"comp"
+.LASF179:
+	.string	"UCLASS_SIMPLE_BUS"
+.LASF286:
+	.string	"dm_root_f"
+.LASF37:
+	.string	"uclass_priv"
+.LASF224:
+	.string	"UCLASS_REMOTEPROC"
+.LASF149:
+	.string	"fit_hdr_fdt"
+.LASF407:
+	.string	"CHANGEFREQ"
+.LASF299:
+	.string	"video_top"
+.LASF343:
+	.string	"net_bcast_ethaddr"
+.LASF164:
+	.string	"state"
+.LASF69:
+	.string	"bi_flashsize"
+.LASF20:
+	.string	"__be32"
+.LASF162:
+	.string	"cmdline_end"
+.LASF38:
+	.string	"parent_priv"
+.LASF340:
+	.string	"net_rx_packets"
+.LASF184:
+	.string	"UCLASS_CPU"
+.LASF277:
+	.string	"ram_top"
+.LASF89:
+	.string	"_datarelrolocal_start_ofs"
+.LASF442:
+	.string	"next_col"
+.LASF348:
+	.string	"net_boot_file_name"
+.LASF391:
+	.string	"pre_remove"
+.LASF324:
+	.string	"halt"
+.LASF117:
+	.string	"ih_magic"
+.LASF285:
+	.string	"dm_root"
+.LASF17:
+	.string	"ulong"
+.LASF62:
+	.string	"region"
+.LASF7:
+	.string	"__u32"
+.LASF338:
+	.string	"net_server_ip"
+.LASF364:
+	.string	"remove"
+.LASF242:
+	.string	"UCLASS_USB_HUB"
+.LASF291:
+	.string	"of_root"
+.LASF91:
+	.string	"_datarelro_start_ofs"
+.LASF367:
+	.string	"child_post_bind"
+.LASF207:
+	.string	"UCLASS_MTD"
+.LASF165:
+	.string	"bootm_headers_t"
+.LASF15:
+	.string	"long int"
+.LASF174:
+	.string	"UCLASS_TEST_PROBE"
+.LASF212:
+	.string	"UCLASS_PCH"
+.LASF213:
+	.string	"UCLASS_PCI"
+.LASF188:
+	.string	"UCLASS_DMA"
+.LASF446:
+	.string	"flag"
+.LASF401:
+	.string	"getc"
+.LASF237:
+	.string	"UCLASS_THERMAL"
+.LASF436:
+	.string	"random_test1"
+.LASF435:
+	.string	"random_test2"
+.LASF456:
+	.string	"set_vdd_logic"
+.LASF449:
+	.string	"test_case"
+.LASF441:
+	.string	"pattern"
+.LASF387:
+	.string	"post_bind"
+.LASF335:
+	.string	"net_ethaddr"
+.LASF316:
+	.string	"in_addr"
+.LASF19:
+	.string	"uint32_t"
+.LASF130:
+	.string	"image_info"
+.LASF119:
+	.string	"ih_time"
+.LASF467:
+	.string	"available"
+.LASF489:
+	.string	"jt_funcs"
+.LASF490:
+	.string	"ofnode_union"
+.LASF474:
+	.string	"strcasecmp"
+.LASF58:
+	.string	"long double"
+.LASF112:
+	.string	"size_dt_strings"
+.LASF137:
+	.string	"image_info_t"
+.LASF302:
+	.string	"serial"
+.LASF443:
+	.string	"get_page_size"
+.LASF1:
+	.string	"long unsigned int"
+.LASF192:
+	.string	"UCLASS_I2C"
+.LASF176:
+	.string	"UCLASS_I2C_EMUL"
+.LASF50:
+	.string	"select_hwpart"
+.LASF346:
+	.string	"net_native_vlan"
+.LASF196:
+	.string	"UCLASS_I2S"
+.LASF336:
+	.string	"net_server_ethaddr"
+.LASF244:
+	.string	"UCLASS_VIDEO_BRIDGE"
+.LASF166:
+	.string	"images"
+.LASF428:
+	.string	"cmp_buf_data"
+.LASF288:
+	.string	"fdt_blob"
+.LASF14:
+	.string	"char"
+.LASF144:
+	.string	"fit_uname_os"
+.LASF143:
+	.string	"fit_hdr_os"
+.LASF476:
+	.string	"ctrlc"
+.LASF400:
+	.string	"tstc"
+.LASF29:
+	.string	"platdata"
+.LASF433:
+	.string	"reread_val"
+.LASF133:
+	.string	"load"
+.LASF352:
+	.string	"net_loop_state"
+.LASF232:
+	.string	"UCLASS_SPMI"
+.LASF230:
+	.string	"UCLASS_SERIAL"
+.LASF429:
+	.string	"random_test"
+.LASF411:
+	.string	"DIAGONALSCAN"
+.LASF215:
+	.string	"UCLASS_PHY"
+.LASF75:
+	.string	"bi_ddr_freq"
+.LASF32:
+	.string	"node"
+.LASF289:
+	.string	"new_fdt"
+.LASF420:
+	.string	"start_adr"
+.LASF136:
+	.string	"arch"
+.LASF274:
+	.string	"have_console"
+.LASF151:
+	.string	"fit_noffset_fdt"
+.LASF147:
+	.string	"fit_uname_rd"
+.LASF98:
+	.string	"complete"
+.LASF261:
+	.string	"tlb_size"
+.LASF146:
+	.string	"fit_hdr_rd"
+.LASF356:
+	.string	"NETLOOP_FAIL"
+.LASF410:
+	.string	"CROSSTALK"
+.LASF191:
+	.string	"UCLASS_FIRMWARE"
+.LASF283:
+	.string	"reloc_off"
+.LASF154:
+	.string	"fit_noffset_setup"
+.LASF359:
+	.string	"mem_malloc_end"
+.LASF220:
+	.string	"UCLASS_POWER_DOMAIN"
+.LASF203:
+	.string	"UCLASS_MASS_STORAGE"
+.LASF49:
+	.string	"block_drvr"
+.LASF208:
+	.string	"UCLASS_NORTHBRIDGE"
+.LASF485:
+	.string	"malloc"
+.LASF404:
+	.string	"stdio_names"
+.LASF27:
+	.string	"driver"
+.LASF457:
+	.string	"set_ddr_freq"
+.LASF194:
+	.string	"UCLASS_I2C_GENERIC"
+.LASF322:
+	.string	"send"
+.LASF325:
+	.string	"write_hwaddr"
+.LASF483:
+	.string	"rockchip_ddrclk_sip_recalc_rate_v2"
+.LASF275:
+	.string	"env_addr"
+.LASF384:
+	.string	"compatible"
+.LASF290:
+	.string	"fdt_size"
+.LASF272:
+	.string	"mem_clk"
+.LASF25:
+	.string	"_binary_u_boot_bin_start"
+.LASF447:
+	.string	"argc"
+.LASF480:
+	.string	"udelay"
+.LASF85:
+	.string	"bd_t"
+.LASF122:
+	.string	"ih_ep"
+.LASF66:
+	.string	"bi_memstart"
+.LASF306:
+	.string	"properties"
+.LASF448:
+	.string	"argv"
+.LASF150:
+	.string	"fit_uname_fdt"
+.LASF222:
+	.string	"UCLASS_RAM"
+.LASF46:
+	.string	"list_head"
+.LASF388:
+	.string	"pre_unbind"
+.LASF303:
+	.string	"device_node"
+.LASF157:
+	.string	"ft_addr"
+.LASF258:
+	.string	"lastinc"
+.LASF385:
+	.string	"data"
+.LASF311:
+	.string	"__dtb_dt_begin"
+.LASF254:
+	.string	"UCLASS_INVALID"
+.LASF422:
+	.string	"buful"
+.LASF304:
+	.string	"phandle"
+.LASF40:
+	.string	"child_head"
+.LASF60:
+	.string	"base"
+.LASF278:
+	.string	"relocaddr"
+.LASF142:
+	.string	"fit_uname_cfg"
+.LASF161:
+	.string	"cmdline_start"
+.LASF374:
+	.string	"property"
+.LASF455:
+	.string	"do_ddr_test"
+.LASF284:
+	.string	"new_gd"
+.LASF189:
+	.string	"UCLASS_ETH"
+.LASF276:
+	.string	"env_valid"
+.LASF312:
+	.string	"__dtb_dt_spl_begin"
+.LASF10:
+	.string	"long long unsigned int"
+.LASF34:
+	.string	"parent"
+.LASF190:
+	.string	"UCLASS_GPIO"
+.LASF107:
+	.string	"off_dt_strings"
+.LASF432:
+	.string	"wr_value"
+.LASF82:
+	.string	"bi_arch_number"
+.LASF460:
+	.string	"min_freq"
+.LASF44:
+	.string	"ide_bus_offset"
+.LASF273:
+	.string	"fb_base"
+.LASF390:
+	.string	"post_probe"
+.LASF425:
+	.string	"err_adr"
+.LASF95:
+	.string	"repeatable"
+.LASF102:
+	.string	"CMD_RET_USAGE"
+.LASF253:
+	.string	"UCLASS_COUNT"
+.LASF209:
+	.string	"UCLASS_NVME"
+.LASF347:
+	.string	"net_restart_wrap"
+.LASF111:
+	.string	"boot_cpuid_phys"
+.LASF59:
+	.string	"lmb_property"
+.LASF488:
+	.string	"/home/typ/src/u-boot_gerrit/u-boot-ddr"
+.LASF484:
+	.string	"rand"
+.LASF218:
+	.string	"UCLASS_PMIC"
+.LASF361:
+	.string	"of_match"
+.LASF9:
+	.string	"long long int"
+.LASF478:
+	.string	"regulator_get_by_platname"
+.LASF493:
+	.string	"print_available_addr"
+.LASF159:
+	.string	"initrd_start"
+.LASF233:
+	.string	"UCLASS_SPI_FLASH"
+.LASF238:
+	.string	"UCLASS_TIMER"
+.LASF386:
+	.string	"uclass_driver"
+.LASF479:
+	.string	"regulator_set_value"
+.LASF466:
+	.string	"max_bank"
+.LASF30:
+	.string	"parent_platdata"
+.LASF252:
+	.string	"UCLASS_DVFS"
+.LASF45:
+	.string	"udevice"
+.LASF345:
+	.string	"net_our_vlan"
+.LASF419:
+	.string	"buf_len"
+.LASF124:
+	.string	"ih_os"
+.LASF219:
+	.string	"UCLASS_PWM"
+.LASF43:
+	.string	"req_seq"
+.LASF205:
+	.string	"UCLASS_MMC"
+.LASF197:
+	.string	"UCLASS_IDE"
+.LASF315:
+	.string	"save_size"
+.LASF109:
+	.string	"version"
+.LASF26:
+	.string	"_binary_u_boot_bin_end"
+.LASF394:
+	.string	"per_device_platdata_auto_alloc_size"
+.LASF8:
+	.string	"unsigned int"
+.LASF413:
+	.string	"FULLTEST"
+.LASF430:
+	.string	"baseaddr"
+.LASF114:
+	.string	"working_fdt"
+.LASF468:
+	.string	"crosstalk"
+.LASF328:
+	.string	"push_packet"
+.LASF113:
+	.string	"size_dt_struct"
+.LASF128:
+	.string	"ih_name"
+.LASF221:
+	.string	"UCLASS_PWRSEQ"
+.LASF6:
+	.string	"short int"
+.LASF307:
+	.string	"child"
+.LASF262:
+	.string	"tlb_fillptr"
+.LASF97:
+	.string	"help"
+.LASF48:
+	.string	"prev"
+.LASF349:
+	.string	"net_boot_file_size"
+.LASF158:
+	.string	"ft_len"
+.LASF105:
+	.string	"totalsize"
+.LASF295:
+	.string	"malloc_base"
+.LASF223:
+	.string	"UCLASS_REGULATOR"
+.LASF42:
+	.string	"flags"
+.LASF155:
+	.string	"rd_start"
+	.hidden	malloc
+	.ident	"GCC: (Linaro GCC 6.3-2017.05) 6.3.1 20170404"
+	.section	.note.GNU-stack,"",@progbits
diff --git a/cmd/ddr_tool/ddr_test_rk1808.S b/cmd/ddr_tool/ddr_test_rk1808.S
new file mode 100644
index 0000000000..a898fe976b
--- /dev/null
+++ b/cmd/ddr_tool/ddr_test_rk1808.S
@@ -0,0 +1,10918 @@
+	.arch armv8-a+nosimd
+	.file	"ddr_test_code.c"
+	.text
+.Ltext0:
+	.cfi_sections	.debug_frame
+	.section	.text.set_vdd_logic,"ax",@progbits
+	.align	2
+	.type	set_vdd_logic, %function
+set_vdd_logic:
+.LFB258:
+	.file 1 "cmd/ddr_tool/ddr_tool.c"
+	.loc 1 165 0
+	.cfi_startproc
+.LVL0:
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	.loc 1 169 0
+	add	x1, x29, 40
+	.loc 1 165 0
+	mov	w20, w0
+	.loc 1 169 0
+	adrp	x0, .LC1
+.LVL1:
+	add	x0, x0, :lo12:.LC1
+	bl	regulator_get_by_platname
+.LVL2:
+	.loc 1 170 0
+	cbz	w0, .L2
+	mov	w19, w0
+	.loc 1 171 0
+	adrp	x0, .LC2
+.LVL3:
+	add	x0, x0, :lo12:.LC2
+.LVL4:
+.L8:
+	.loc 1 179 0
+	bl	printf
+.LVL5:
+.L1:
+	.loc 1 181 0
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+.LVL6:
+	ldp	x29, x30, [sp], 48
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL7:
+.L2:
+	.cfi_restore_state
+	.loc 1 176 0
+	ldr	x0, [x29, 40]
+.LVL8:
+	mov	w1, w20
+	bl	regulator_set_value
+.LVL9:
+	mov	w19, w0
+.LVL10:
+	.loc 1 177 0
+	mov	x0, 100
+.LVL11:
+	bl	udelay
+.LVL12:
+	.loc 1 178 0
+	cbz	w19, .L1
+	.loc 1 179 0
+	adrp	x0, .LC3
+	add	x0, x0, :lo12:.LC3
+	b	.L8
+	.cfi_endproc
+.LFE258:
+	.size	set_vdd_logic, .-set_vdd_logic
+	.section	.text.random_test,"ax",@progbits
+	.align	2
+	.global	random_test
+	.type	random_test, %function
+random_test:
+.LFB275:
+	.file 2 "cmd/ddr_tool/random_test.c"
+	.loc 2 88 0
+	.cfi_startproc
+.LVL13:
+	stp	x29, x30, [sp, -112]!
+	.cfi_def_cfa_offset 112
+	.cfi_offset 29, -112
+	.cfi_offset 30, -104
+.LBB18:
+.LBB19:
+	.loc 2 18 0
+	mov	x2, x1
+.LBE19:
+.LBE18:
+	.loc 2 88 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -80
+	.cfi_offset 22, -72
+	mov	x22, x0
+.LVL14:
+	stp	x23, x24, [sp, 48]
+.LBB24:
+.LBB20:
+	.loc 2 37 0
+	adrp	x21, .LC5
+.LBE20:
+.LBE24:
+	.loc 2 88 0
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 23, -64
+	.cfi_offset 24, -56
+	.cfi_offset 27, -32
+	.cfi_offset 28, -24
+	mov	x23, x1
+.LVL15:
+	stp	x19, x20, [sp, 16]
+.LBB25:
+.LBB21:
+	.loc 2 18 0
+	mov	w1, -2139062144
+.LVL16:
+.LBE21:
+.LBE25:
+	.loc 2 88 0
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 19, -96
+	.cfi_offset 20, -88
+	.cfi_offset 25, -48
+	.cfi_offset 26, -40
+.LBB26:
+.LBB22:
+	.loc 2 23 0
+	adrp	x24, .LC4
+	.loc 2 18 0
+	bl	memset
+.LVL17:
+	.loc 2 23 0
+	add	x24, x24, :lo12:.LC4
+	.loc 2 37 0
+	add	x21, x21, :lo12:.LC5
+	.loc 2 24 0
+	lsr	x0, x23, 2
+	.loc 2 14 0
+	mov	w27, 0
+	.loc 2 20 0
+	mov	w25, 1077952576
+	.loc 2 19 0
+	mov	w20, -2139062144
+	.loc 2 22 0
+	mov	w28, 0
+	.loc 2 24 0
+	str	x0, [x29, 96]
+.LVL18:
+.L15:
+	.loc 2 23 0
+	mov	w1, w28
+	mov	x0, x24
+	bl	printf
+.LVL19:
+	.loc 2 24 0
+	mov	w1, 0
+.LVL20:
+.L10:
+	ldr	x2, [x29, 96]
+	uxtw	x0, w1
+	cmp	x0, x2
+	bcc	.L14
+.LVL21:
+.L13:
+	.loc 2 37 0
+	mov	x0, x21
+	.loc 2 22 0
+	add	w28, w28, 1
+.LVL22:
+	.loc 2 37 0
+	bl	printf
+.LVL23:
+	.loc 2 35 0
+	lsr	w25, w25, 1
+.LVL24:
+	.loc 2 36 0
+	lsr	w20, w20, 1
+.LVL25:
+	.loc 2 22 0
+	cmp	w28, 8
+	bne	.L15
+	mov	x19, -1
+	b	.L12
+.LVL26:
+.L14:
+	.loc 2 25 0
+	lsl	x0, x0, 2
+	add	x19, x22, x0
+	ldr	w2, [x22, x0]
+	str	w2, [x29, 108]
+	.loc 2 26 0
+	uxtw	x2, w2
+	cmp	w2, w20
+	beq	.L11
+.LVL27:
+	.loc 2 28 0
+	ldr	w27, [x19]
+	.loc 2 33 0
+	cmn	x19, #1
+	beq	.L13
+.LVL28:
+.L12:
+	.loc 2 39 0
+	adrp	x0, .LC6
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.LVL29:
+	.loc 2 40 0
+	cmn	x19, #1
+	beq	.L16
+	.loc 2 41 0
+	ldr	w2, [x29, 108]
+	adrp	x0, .LC7
+	mov	w4, w20
+	mov	w3, w27
+	mov	x1, x19
+	add	x0, x0, :lo12:.LC7
+	bl	printf
+.LVL30:
+.L29:
+.LBE22:
+.LBE26:
+.LBB27:
+.LBB28:
+	.loc 2 82 0
+	mov	w0, -1
+.L9:
+.LBE28:
+.LBE27:
+	.loc 2 96 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+.LVL31:
+	ldp	x23, x24, [sp, 48]
+.LVL32:
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL33:
+.L11:
+	.cfi_restore_state
+.LBB30:
+.LBB23:
+	.loc 2 31 0
+	str	w25, [x22, x0]
+	.loc 2 24 0
+	add	w1, w1, 1
+.LVL34:
+	b	.L10
+.LVL35:
+.L16:
+.LBE23:
+.LBE30:
+.LBB31:
+.LBB29:
+	.loc 2 58 0
+	adrp	x25, .LC8
+.LVL36:
+	.loc 2 76 0
+	adrp	x24, .LC9
+	.loc 2 66 0
+	lsr	x28, x23, 3
+.LVL37:
+	.loc 2 58 0
+	add	x25, x25, :lo12:.LC8
+	.loc 2 76 0
+	add	x24, x24, :lo12:.LC9
+	.loc 2 66 0
+	mov	x27, 0
+	mov	x19, 0
+.LVL38:
+.L23:
+	.loc 2 58 0
+	mov	x1, x19
+	mov	x0, x25
+	bl	printf
+.LVL39:
+	.loc 2 60 0
+	lsl	x20, x19, 8
+	lsl	x0, x19, 24
+	orr	x20, x20, x19, lsl 16
+	orr	x0, x0, x19, lsl 32
+	.loc 2 64 0
+	mov	x2, x23
+	.loc 2 60 0
+	orr	x20, x20, x0
+	lsl	x0, x19, 40
+	orr	x0, x0, x19, lsl 48
+	orr	x20, x20, x0
+	orr	x0, x19, x19, lsl 56
+	orr	x20, x20, x0
+.LVL40:
+	.loc 2 64 0
+	mov	x0, x22
+	mov	w1, w20
+	bl	memset
+.LVL41:
+	.loc 2 66 0
+	mov	x0, 0
+.LVL42:
+.L18:
+	cmp	x0, x28
+	bne	.L22
+.LVL43:
+.L21:
+	.loc 2 76 0
+	mov	x0, x24
+.LVL44:
+	.loc 2 57 0
+	add	x19, x19, 1
+.LVL45:
+	.loc 2 76 0
+	bl	printf
+.LVL46:
+	.loc 2 57 0
+	cmp	x19, 256
+	bne	.L23
+	mov	x21, -1
+	b	.L20
+.LVL47:
+.L22:
+	lsl	x1, x0, 3
+	add	x21, x1, x22
+	.loc 2 67 0
+	ldr	x26, [x1, x22]
+.LVL48:
+	.loc 2 68 0
+	cmp	x20, x26
+	beq	.L19
+.LVL49:
+	.loc 2 70 0
+	ldr	x27, [x21]
+.LVL50:
+	.loc 2 74 0
+	cmn	x21, #1
+	beq	.L21
+.LVL51:
+.L20:
+	.loc 2 78 0
+	adrp	x0, .LC10
+	add	x0, x0, :lo12:.LC10
+	bl	printf
+.LVL52:
+	.loc 2 84 0
+	mov	w0, 0
+	.loc 2 79 0
+	cmn	x21, #1
+	beq	.L9
+	.loc 2 80 0
+	mov	x4, x20
+	mov	x3, x27
+	mov	x2, x26
+	mov	x1, x21
+	adrp	x0, .LC11
+	add	x0, x0, :lo12:.LC11
+	bl	printf
+.LVL53:
+	b	.L29
+.LVL54:
+.L19:
+	.loc 2 66 0
+	add	x0, x0, 1
+.LVL55:
+	b	.L18
+.LBE29:
+.LBE31:
+	.cfi_endproc
+.LFE275:
+	.size	random_test, .-random_test
+	.section	.text.cpu_2_io,"ax",@progbits
+	.align	2
+	.global	cpu_2_io
+	.type	cpu_2_io, %function
+cpu_2_io:
+.LFB276:
+	.file 3 "cmd/ddr_tool/tool_common.c"
+	.loc 3 11 0
+	.cfi_startproc
+.LVL56:
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	.loc 3 19 0
+	mov	x2, 0
+	.loc 3 11 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	add	x1, x29, 16
+.LVL57:
+.L31:
+	.loc 3 19 0 discriminator 1
+	cmp	x2, 16
+	bne	.L32
+	.loc 3 22 0
+	bl	memcpy
+.LVL58:
+	.loc 3 26 0
+	ldp	x29, x30, [sp], 32
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+	ret
+.LVL59:
+.L32:
+	.cfi_restore_state
+	.loc 3 20 0 discriminator 3
+	ubfiz	w3, w2, 2, 2
+	add	w3, w3, w2, asr 2
+	ldrb	w3, [x0, w3, sxtw]
+	strb	w3, [x1, x2]
+.LVL60:
+	add	x2, x2, 1
+.LVL61:
+	b	.L31
+	.cfi_endproc
+.LFE276:
+	.size	cpu_2_io, .-cpu_2_io
+	.section	.text.write_buf_to_ddr,"ax",@progbits
+	.align	2
+	.global	write_buf_to_ddr
+	.type	write_buf_to_ddr, %function
+write_buf_to_ddr:
+.LFB277:
+	.loc 3 29 0
+	.cfi_startproc
+.LVL62:
+	.loc 3 37 0
+	lsr	w1, w1, 3
+.LVL63:
+	.loc 3 39 0
+	lsr	x3, x3, 3
+.LVL64:
+	.loc 3 37 0
+	sub	w1, w1, #1
+.LVL65:
+	.loc 3 39 0
+	mov	w4, 0
+	mov	w5, 0
+.LVL66:
+.L35:
+	.loc 3 39 0 is_stmt 0 discriminator 1
+	uxtw	x6, w5
+	cmp	x6, x3
+	bcc	.L36
+	.loc 3 44 0 is_stmt 1
+	ret
+.L36:
+	.loc 3 40 0 discriminator 3
+	ldr	x7, [x0, w4, uxtw 3]
+	.loc 3 41 0 discriminator 3
+	add	w4, w4, 1
+.LVL67:
+	.loc 3 40 0 discriminator 3
+	str	x7, [x2, x6, lsl 3]
+	.loc 3 42 0 discriminator 3
+	and	w4, w1, w4
+.LVL68:
+	.loc 3 39 0 discriminator 3
+	add	w5, w5, 1
+.LVL69:
+	b	.L35
+	.cfi_endproc
+.LFE277:
+	.size	write_buf_to_ddr, .-write_buf_to_ddr
+	.section	.text.cmp_buf_data,"ax",@progbits
+	.align	2
+	.global	cmp_buf_data
+	.type	cmp_buf_data, %function
+cmp_buf_data:
+.LFB278:
+	.loc 3 48 0
+	.cfi_startproc
+.LVL70:
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	.loc 3 60 0
+	lsr	w1, w1, 3
+.LVL71:
+	.loc 3 48 0
+	mov	w10, w4
+	.loc 3 60 0
+	sub	w1, w1, #1
+	.loc 3 48 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 3 62 0
+	lsr	x3, x3, 3
+.LVL72:
+	.loc 3 48 0
+	mov	x8, x2
+.LVL73:
+	.loc 3 62 0
+	mov	w6, 0
+	.loc 3 56 0
+	mov	x2, 0
+.LVL74:
+	.loc 3 62 0
+	mov	w7, 0
+	.loc 3 48 0
+	str	x19, [sp, 16]
+	.cfi_offset 19, -16
+.LVL75:
+.L38:
+	.loc 3 62 0 discriminator 1
+	uxtw	x5, w7
+	cmp	x5, x3
+	bcc	.L41
+	.loc 3 61 0
+	mov	x19, 0
+	.loc 3 54 0
+	mov	x3, 0
+	.loc 3 55 0
+	mov	x4, 0
+	b	.L40
+.L41:
+	.loc 3 63 0
+	lsl	x5, x5, 3
+	.loc 3 64 0
+	ldr	x4, [x0, w6, uxtw 3]
+	.loc 3 63 0
+	add	x19, x8, x5
+	ldr	x2, [x8, x5]
+.LVL76:
+	.loc 3 64 0
+	cmp	x2, x4
+	beq	.L39
+	.loc 3 65 0
+	ldr	x3, [x19]
+.LVL77:
+.L40:
+	.loc 3 73 0
+	cmp	x19, 0
+	ccmp	w10, 0, 4, ne
+	beq	.L37
+	.loc 3 74 0
+	adrp	x0, .LC12
+.LVL78:
+	mov	x1, x19
+.LVL79:
+	add	x0, x0, :lo12:.LC12
+	bl	printf
+.LVL80:
+.L37:
+	.loc 3 78 0
+	mov	x0, x19
+	ldr	x19, [sp, 16]
+.LVL81:
+	ldp	x29, x30, [sp], 32
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_def_cfa 31, 0
+	ret
+.LVL82:
+.L39:
+	.cfi_restore_state
+	.loc 3 70 0 discriminator 2
+	add	w6, w6, 1
+.LVL83:
+	.loc 3 62 0 discriminator 2
+	add	w7, w7, 1
+.LVL84:
+	.loc 3 71 0 discriminator 2
+	and	w6, w1, w6
+.LVL85:
+	b	.L38
+	.cfi_endproc
+.LFE278:
+	.size	cmp_buf_data, .-cmp_buf_data
+	.section	.text.crosstalk,"ax",@progbits
+	.align	2
+	.global	crosstalk
+	.type	crosstalk, %function
+crosstalk:
+.LFB201:
+	.file 4 "cmd/ddr_tool/crosstalk.c"
+	.loc 4 46 0
+	.cfi_startproc
+.LVL86:
+	stp	x29, x30, [sp, -160]!
+	.cfi_def_cfa_offset 160
+	.cfi_offset 29, -160
+	.cfi_offset 30, -152
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -144
+	.cfi_offset 20, -136
+	.loc 4 71 0
+	add	x19, x29, 128
+	.loc 4 46 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -128
+	.cfi_offset 22, -120
+	mov	x21, x0
+	stp	x23, x24, [sp, 48]
+	mov	x22, x1
+	stp	x25, x26, [sp, 64]
+	.loc 4 63 0
+	adrp	x0, .LC13
+.LVL87:
+	.loc 4 46 0
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 23, -112
+	.cfi_offset 24, -104
+	.cfi_offset 25, -96
+	.cfi_offset 26, -88
+	.cfi_offset 27, -80
+	.cfi_offset 28, -72
+	.loc 4 63 0
+	add	x0, x0, :lo12:.LC13
+	bl	printf
+.LVL88:
+	.loc 4 66 0
+	adrp	x23, .LC14
+	add	x0, x23, :lo12:.LC14
+	.loc 4 64 0
+	mov	w20, 0
+	.loc 4 66 0
+	str	x0, [x29, 112]
+	.loc 4 76 0
+	add	x0, x19, 16
+	str	x0, [x29, 104]
+.LVL89:
+.L52:
+	.loc 4 66 0
+	ldr	x0, [x29, 112]
+	mov	w1, w20
+	.loc 4 68 0
+	adrp	x24, .LC15
+	add	x28, x24, :lo12:.LC15
+	.loc 4 65 0
+	mov	w26, -1
+	.loc 4 67 0
+	mov	w25, 0
+	.loc 4 66 0
+	bl	printf
+.LVL90:
+	.loc 4 71 0
+	mov	w0, 1
+	lsl	w0, w0, w20
+	str	w0, [x29, 120]
+.LVL91:
+.L51:
+	.loc 4 69 0
+	mvn	w26, w26
+.LVL92:
+	mov	x27, 0
+	.loc 4 68 0
+	mov	w1, w25
+	mov	x0, x28
+	bl	printf
+.LVL93:
+.L48:
+	.loc 4 71 0 discriminator 3
+	ldr	w0, [x29, 120]
+	eor	w0, w0, w26
+	str	w0, [x27, x19]
+	add	x27, x27, 4
+	.loc 4 72 0 discriminator 3
+	mvn	w26, w26
+.LVL94:
+	.loc 4 70 0 discriminator 3
+	cmp	x27, 32
+	bne	.L48
+.LVL95:
+	.loc 4 76 0 discriminator 1
+	mov	x0, x19
+	bl	cpu_2_io
+.LVL96:
+	ldr	x0, [x29, 104]
+	bl	cpu_2_io
+.LVL97:
+	.loc 4 77 0 discriminator 1
+	mov	x3, x22
+	mov	x2, x21
+	mov	w1, w27
+	mov	x0, x19
+	bl	write_buf_to_ddr
+.LVL98:
+	.loc 4 78 0 discriminator 1
+	mov	w4, 1
+	mov	x3, x22
+	mov	x2, x21
+	mov	w1, w27
+	mov	x0, x19
+	bl	cmp_buf_data
+.LVL99:
+	cbz	x0, .L49
+.LVL100:
+.L58:
+	.loc 4 80 0
+	mov	w0, -1
+.L47:
+	.loc 4 115 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+.LVL101:
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 160
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL102:
+.L49:
+	.cfi_restore_state
+	.loc 4 67 0 discriminator 2
+	add	w25, w25, 1
+.LVL103:
+	cmp	w25, 2
+	bne	.L51
+	.loc 4 64 0 discriminator 2
+	add	w20, w20, 1
+.LVL104:
+	cmp	w20, 32
+	bne	.L52
+	.loc 4 87 0
+	adrp	x0, .LC16
+	add	x0, x0, :lo12:.LC16
+	bl	printf
+.LVL105:
+	.loc 4 88 0
+	mov	x0, 128
+	bl	malloc
+.LVL106:
+	mov	x19, x0
+.LVL107:
+	.loc 4 89 0
+	cbnz	x0, .L53
+	.loc 4 90 0
+	adrp	x0, .LC17
+.LVL108:
+	mov	x1, 128
+	add	x0, x0, :lo12:.LC17
+	bl	printf
+.LVL109:
+.L53:
+	adrp	x26, .LANCHOR0
+.LVL110:
+	.loc 4 93 0
+	add	x23, x23, :lo12:.LC14
+	.loc 4 95 0
+	add	x24, x24, :lo12:.LC15
+	.loc 4 100 0
+	add	x26, x26, :lo12:.LANCHOR0
+	.loc 4 69 0
+	mov	w20, 0
+.LVL111:
+.L61:
+	.loc 4 94 0
+	mov	w25, 0
+	.loc 4 98 0
+	mov	w27, 1
+	.loc 4 93 0
+	mov	w1, w20
+	mov	x0, x23
+	bl	printf
+.LVL112:
+.L60:
+	.loc 4 95 0
+	mov	w1, w25
+	mov	x0, x24
+	bl	printf
+.LVL113:
+	.loc 4 98 0
+	lsl	w2, w27, w25
+	mov	x0, 0
+.LVL114:
+.L56:
+	ldr	w1, [x0, x26]
+	.loc 4 97 0
+	cbz	w20, .L54
+	.loc 4 98 0
+	eor	w1, w1, w2
+.L54:
+	.loc 4 100 0
+	str	w1, [x19, x0]
+	add	x0, x0, 4
+	.loc 4 96 0
+	cmp	x0, 128
+	bne	.L56
+	mov	x28, x19
+	add	x1, x19, 128
+.L57:
+	.loc 4 104 0
+	mov	x0, x28
+	str	x1, [x29, 120]
+	bl	cpu_2_io
+.LVL115:
+	add	x28, x28, 16
+	.loc 4 102 0
+	ldr	x1, [x29, 120]
+	cmp	x28, x1
+	bne	.L57
+	.loc 4 105 0
+	mov	x3, x22
+	mov	x2, x21
+	mov	w1, 128
+	mov	x0, x19
+	bl	write_buf_to_ddr
+.LVL116:
+	.loc 4 107 0
+	mov	w4, 1
+	mov	x3, x22
+	mov	x2, x21
+	mov	w1, 128
+	mov	x0, x19
+	bl	cmp_buf_data
+.LVL117:
+	cbnz	x0, .L58
+	.loc 4 110 0
+	cbz	w20, .L59
+	.loc 4 94 0 discriminator 2
+	add	w25, w25, 1
+.LVL118:
+	cmp	w25, 32
+	bne	.L60
+.L59:
+	.loc 4 92 0 discriminator 2
+	add	w20, w20, 1
+.LVL119:
+	cmp	w20, 2
+	bne	.L61
+	.loc 4 114 0
+	mov	w0, 0
+	b	.L47
+	.cfi_endproc
+.LFE201:
+	.size	crosstalk, .-crosstalk
+	.section	.text.diagonalscan,"ax",@progbits
+	.align	2
+	.global	diagonalscan
+	.type	diagonalscan, %function
+diagonalscan:
+.LFB272:
+	.file 5 "cmd/ddr_tool/diagonalscan.c"
+	.loc 5 49 0
+	.cfi_startproc
+.LVL120:
+	stp	x29, x30, [sp, -112]!
+	.cfi_def_cfa_offset 112
+	.cfi_offset 29, -112
+	.cfi_offset 30, -104
+	.loc 5 55 0
+	mov	x2, 32
+	.loc 5 49 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -96
+	.cfi_offset 20, -88
+	mov	x19, x1
+	.loc 5 55 0
+	adrp	x1, .LANCHOR1
+.LVL121:
+	add	x1, x1, :lo12:.LANCHOR1
+	.loc 5 49 0
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -64
+	.cfi_offset 24, -56
+	mov	x23, x0
+	stp	x21, x22, [sp, 32]
+	.loc 5 55 0
+	add	x0, x29, 80
+.LVL122:
+	.loc 5 49 0
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 21, -80
+	.cfi_offset 22, -72
+	.cfi_offset 25, -48
+	.cfi_offset 26, -40
+	.loc 5 55 0
+	bl	memcpy
+.LVL123:
+	.loc 5 60 0
+	adrp	x0, .LC18
+	add	x0, x0, :lo12:.LC18
+	bl	printf
+.LVL124:
+.LBB35:
+.LBB36:
+.LBB37:
+	.loc 5 35 0
+	mov	x0, 520
+	movk	x0, 0xfe02, lsl 16
+	ldr	w20, [x0]
+.LVL125:
+#APP
+// 35 "cmd/ddr_tool/diagonalscan.c" 1
+	dmb sy
+// 0 "" 2
+.LVL126:
+#NO_APP
+.LBE37:
+.LBE36:
+.LBE35:
+	.loc 5 73 0
+	add	x0, x29, 80
+	bl	cpu_2_io
+.LVL127:
+	.loc 5 75 0
+	add	x1, x29, 80
+	mov	x2, 32
+	mov	x0, x23
+	bl	memcpy
+.LVL128:
+.LBB40:
+.LBB38:
+	.loc 5 40 0
+	ubfx	x0, x20, 9, 2
+	.loc 5 41 0
+	ubfx	x20, x20, 2, 2
+.LVL129:
+	.loc 5 40 0
+	add	w0, w0, 9
+	.loc 5 41 0
+	mov	w1, 2
+	asr	w20, w1, w20
+.LBE38:
+.LBE40:
+	.loc 5 76 0
+	lsr	x24, x19, 1
+.LBB41:
+.LBB39:
+	.loc 5 43 0
+	add	w0, w0, w20
+	sub	x19, x19, #32
+.LVL130:
+	mov	w25, 1
+	add	x19, x19, x23
+.LVL131:
+	lsl	w25, w25, w0
+.LBE39:
+.LBE41:
+	.loc 5 76 0
+	mov	w21, 0
+	mov	x20, 0
+.LVL132:
+.L74:
+	.loc 5 76 0 is_stmt 0 discriminator 1
+	cmp	x20, x24
+	bcc	.L78
+	mov	x0, 0
+	b	.L75
+.L78:
+	.loc 5 77 0 is_stmt 1
+	uxtw	x22, w21
+	mov	x2, 32
+	sub	x26, x19, x22
+	add	x1, x29, 80
+	mov	x0, x26
+	bl	memcpy
+.LVL133:
+	.loc 5 80 0
+	add	x2, x20, x23
+	.loc 5 79 0
+	mov	x3, 32
+	mov	w4, 1
+	add	x2, x2, x22
+	mov	w1, w3
+	add	x0, x29, 80
+	bl	cmp_buf_data
+.LVL134:
+	.loc 5 81 0
+	cbnz	x0, .L75
+	.loc 5 84 0
+	add	x22, x22, 40
+	add	x20, x20, x25
+.LVL135:
+	cmp	x25, x22
+	add	w21, w21, 8
+.LVL136:
+	csel	w21, w21, wzr, cs
+.LVL137:
+	.loc 5 86 0
+	cmp	x24, x20
+	bls	.L77
+	.loc 5 87 0
+	add	x0, x23, x20
+.LVL138:
+	mov	x2, 32
+	add	x1, x29, 80
+	add	x0, x0, x21, uxtw
+	bl	memcpy
+.LVL139:
+.L77:
+	.loc 5 89 0
+	mov	x3, 32
+	mov	w4, 1
+	mov	x2, x26
+	mov	w1, w3
+	add	x0, x29, 80
+	sub	x19, x19, x25
+	bl	cmp_buf_data
+.LVL140:
+	.loc 5 92 0
+	cbz	x0, .L74
+.LVL141:
+.L75:
+	.loc 5 100 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+.LVL142:
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 112
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE272:
+	.size	diagonalscan, .-diagonalscan
+	.section	.text.do_ddr_test,"ax",@progbits
+	.align	2
+	.type	do_ddr_test, %function
+do_ddr_test:
+.LFB259:
+	.loc 1 190 0
+	.cfi_startproc
+.LVL143:
+	stp	x29, x30, [sp, -224]!
+	.cfi_def_cfa_offset 224
+	.cfi_offset 29, -224
+	.cfi_offset 30, -216
+.LBB46:
+.LBB47:
+	.loc 1 50 0
+	mov	x0, 0
+.LVL144:
+.LBE47:
+.LBE46:
+	.loc 1 190 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -208
+	.cfi_offset 20, -200
+.LBB54:
+.LBB48:
+	.loc 1 52 0
+	add	x20, x29, 120
+.LBE48:
+.LBE54:
+	.loc 1 190 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -192
+	.cfi_offset 22, -184
+.LBB55:
+.LBB49:
+	.loc 1 53 0
+	add	x21, x29, 152
+.LBE49:
+.LBE55:
+	.loc 1 190 0
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 25, -160
+	.cfi_offset 26, -152
+	mov	w26, w2
+	stp	x27, x28, [sp, 80]
+.LBB56:
+.LBB50:
+	.loc 1 50 0
+	mov	x2, x18
+.LVL145:
+	.cfi_offset 27, -144
+	.cfi_offset 28, -136
+.LBE50:
+.LBE56:
+	.loc 1 190 0
+	mov	x27, x3
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -176
+	.cfi_offset 24, -168
+	.loc 1 193 0
+	stp	xzr, xzr, [x29, 184]
+.LBB57:
+.LBB51:
+	.loc 1 47 0
+	mov	w23, 0
+.LBE51:
+.LBE57:
+	.loc 1 193 0
+	stp	xzr, xzr, [x29, 200]
+	str	xzr, [x29, 216]
+.LVL146:
+.L83:
+.LBB58:
+.LBB52:
+	.loc 1 50 0
+	ldr	x1, [x2]
+	ubfiz	x3, x0, 4, 32
+	.loc 1 52 0
+	str	xzr, [x20, x0, lsl 3]
+	.loc 1 50 0
+	add	x1, x1, x3
+	.loc 1 53 0
+	str	xzr, [x21, x0, lsl 3]
+	.loc 1 50 0
+	ldr	x1, [x1, 136]
+	cmp	x1, 0
+	csinc	w23, w23, w0, eq
+.LVL147:
+	add	x0, x0, 1
+.LVL148:
+	.loc 1 49 0
+	cmp	x0, 4
+	bne	.L83
+	mov	x0, 0
+.L84:
+.LVL149:
+	.loc 1 56 0
+	cmp	w0, w23
+	bcc	.L85
+	.loc 1 61 0
+	sub	w1, w23, #1
+	ldr	x0, [x2, 128]
+.LVL150:
+	lsl	x1, x1, 3
+	.loc 1 67 0
+	adrp	x24, .LC21
+	.loc 1 61 0
+	sub	x0, x0, #1048576
+	.loc 1 64 0
+	mov	x22, 0
+	.loc 1 67 0
+	add	x24, x24, :lo12:.LC21
+	.loc 1 61 0
+	ldr	x2, [x20, x1]
+	sub	x0, x0, x2
+	.loc 1 62 0
+	and	x0, x0, -4096
+	.loc 1 61 0
+	str	x0, [x21, x1]
+	.loc 1 63 0
+	adrp	x0, .LC19
+	add	x0, x0, :lo12:.LC19
+	bl	printf
+.LVL151:
+	.loc 1 64 0
+	adrp	x0, .LC20
+	add	x0, x0, :lo12:.LC20
+	bl	printf
+.LVL152:
+.L86:
+	.loc 1 65 0
+	cmp	w23, w22
+	bhi	.L88
+.LVL153:
+.LBE52:
+.LBE58:
+	.loc 1 205 0
+	cmp	w26, 1
+	ble	.L194
+	.loc 1 209 0
+	adrp	x24, .LANCHOR2
+	add	x28, x24, :lo12:.LANCHOR2
+	mov	x25, 0
+	str	x24, [x29, 104]
+.L91:
+	ldr	x1, [x28, x25, lsl 3]
+	mov	w22, w25
+.LVL154:
+	ldr	x0, [x27, 8]
+	bl	strcasecmp
+.LVL155:
+	mov	w23, w0
+	cbz	w0, .L90
+.LVL156:
+	add	x25, x25, 1
+	.loc 1 208 0 discriminator 2
+	cmp	x25, 7
+	bne	.L91
+	.loc 1 216 0
+	adrp	x0, .LC33
+	add	x0, x0, :lo12:.LC33
+	b	.L195
+.LVL157:
+.L85:
+.LBB59:
+.LBB53:
+	.loc 1 57 0
+	ubfiz	x1, x0, 4, 32
+	ldr	x3, [x2]
+	add	x1, x1, 128
+	add	x3, x3, x1
+	ldr	x3, [x3, 8]
+	str	x3, [x20, x0, lsl 3]
+	.loc 1 58 0
+	ldr	x3, [x2]
+	add	x1, x3, x1
+	ldr	x1, [x1, 16]
+	str	x1, [x21, x0, lsl 3]
+.LVL158:
+	add	x0, x0, 1
+.LVL159:
+	b	.L84
+.LVL160:
+.L88:
+	.loc 1 66 0
+	ldr	x1, [x20, x22, lsl 3]
+	cbz	x1, .L87
+	.loc 1 67 0
+	ldr	x3, [x21, x22, lsl 3]
+	mov	x0, x24
+	add	x2, x1, x3
+	bl	printf
+.LVL161:
+.L87:
+	add	x22, x22, 1
+.LVL162:
+	b	.L86
+.LVL163:
+.L131:
+.LBE53:
+.LBE59:
+	.loc 1 221 0
+	adrp	x0, .LC22
+	add	x0, x0, :lo12:.LC22
+.LVL164:
+.L195:
+	.loc 1 216 0
+	bl	printf
+.LVL165:
+.L194:
+	.loc 1 217 0
+	mov	w23, -1
+	b	.L81
+.LVL166:
+.L94:
+	.loc 1 226 0
+	add	x0, x27, x28
+	add	x1, x29, 184
+	add	x2, x1, x28
+	mov	w1, 0
+	add	x28, x28, 8
+	ldr	x0, [x0, 16]
+	bl	strict_strtoul
+.LVL167:
+	tbz	w0, #31, .L93
+	.loc 1 227 0
+	adrp	x0, .LC23
+	add	x0, x0, :lo12:.LC23
+	b	.L195
+.L95:
+	.loc 1 252 0
+	cmp	w22, 1
+	bne	.L98
+	.loc 1 254 0
+	ldr	x0, [x29, 208]
+	b	.L197
+.L98:
+	.loc 1 257 0
+	sub	w25, w25, #5
+	cmp	w25, 1
+	bls	.L99
+.LVL168:
+.LBB60:
+.LBB61:
+	.loc 1 79 0
+	ldr	x0, [x29, 128]
+	.loc 1 82 0
+	ldr	x3, [x29, 208]
+	.loc 1 79 0
+	cmp	x0, 0
+	ldr	x0, [x29, 136]
+	ldr	x1, [x29, 144]
+	cset	w25, ne
+	.loc 1 80 0
+	cmp	x0, 0
+	mov	w0, 3
+	csinc	w0, w0, w25, ne
+.LVL169:
+	cmp	x1, 0
+	mov	w1, 4
+	csel	w0, w0, w1, eq
+.LVL170:
+	.loc 1 82 0
+	cbnz	x3, .L187
+	.loc 1 83 0
+	mov	w25, w0
+.LVL171:
+.L115:
+.LBE61:
+.LBE60:
+	.loc 1 344 0
+	ldr	x0, [x29, 216]
+	cbz	x0, .L121
+	.loc 1 345 0
+	bl	set_vdd_logic
+.LVL172:
+.L121:
+	.loc 1 349 0
+	adrp	x27, .LC30
+.LVL173:
+	mov	w26, 0
+	add	x27, x27, :lo12:.LC30
+	b	.L129
+.LVL174:
+.L99:
+	.loc 1 259 0
+	ldr	x0, [x29, 208]
+	cbz	x0, .L105
+	.loc 1 260 0
+	bl	set_vdd_logic
+.LVL175:
+.L105:
+	.loc 1 261 0
+	cmp	w22, 5
+	bne	.L106
+	.loc 1 262 0
+	ldr	x1, [x29, 152]
+	mov	x0, 65535
+	movk	x0, 0x9f, lsl 16
+	cmp	x1, x0
+	bhi	.L107
+	.loc 1 263 0
+	lsr	x2, x1, 20
+	adrp	x0, .LC26
+	mov	w1, 10
+	add	x0, x0, :lo12:.LC26
+	bl	printf
+.LVL176:
+.L106:
+	.loc 1 284 0
+	adrp	x28, .LC28
+	add	x28, x28, :lo12:.LC28
+	.loc 1 280 0
+	adrp	x27, .LC27
+.LVL177:
+	.loc 1 288 0
+	mov	w26, 0
+	.loc 1 280 0
+	add	x0, x27, :lo12:.LC27
+	str	x0, [x29, 96]
+.LVL178:
+.L113:
+	.loc 1 278 0
+	ldr	x0, [x29, 200]
+	cbz	x0, .L114
+	.loc 1 278 0 is_stmt 0 discriminator 1
+	cmp	x0, x26, uxtw
+	bls	.L97
+.L114:
+	.loc 1 280 0 is_stmt 1
+	ldr	x0, [x29, 96]
+	.loc 1 279 0
+	add	w26, w26, 1
+.LVL179:
+	.loc 1 280 0
+	mov	w1, w26
+	mov	x25, 0
+	bl	printf
+.LVL180:
+.L111:
+	.loc 1 282 0
+	ldr	x22, [x20, x25, lsl 3]
+	cbz	x22, .L108
+	.loc 1 284 0
+	ldr	x19, [x21, x25, lsl 3]
+	mov	x2, x22
+	mov	w1, w25
+	mov	x0, x28
+	mov	x3, x19
+	bl	printf
+.LVL181:
+	.loc 1 287 0
+	mov	x1, x19
+	mov	x0, x22
+	bl	random_test
+.LVL182:
+	mov	w24, w0
+.LVL183:
+	.loc 1 289 0
+	cbnz	w0, .L137
+	.loc 1 290 0
+	mov	x1, x19
+	mov	x0, x22
+.LVL184:
+	bl	crosstalk
+.LVL185:
+	.loc 1 294 0
+	cbnz	w0, .L138
+	.loc 1 295 0
+	mov	x1, x19
+	mov	x0, x22
+.LVL186:
+	bl	diagonalscan
+.LVL187:
+	mov	w27, w0
+.LVL188:
+	.loc 1 299 0
+	cbz	w0, .L110
+	.loc 1 295 0
+	mov	w24, w0
+	mov	w27, 0
+.LVL189:
+.L190:
+	.loc 1 319 0
+	mov	w19, 4
+	b	.L109
+.LVL190:
+.L107:
+	.loc 1 266 0
+	mov	x0, 10485760
+	.loc 1 268 0
+	stp	xzr, xzr, [x29, 128]
+	.loc 1 266 0
+	stp	xzr, x0, [x29, 144]
+.LVL191:
+	.loc 1 269 0
+	stp	xzr, xzr, [x29, 160]
+.LVL192:
+	str	xzr, [x29, 176]
+.LVL193:
+	b	.L106
+.LVL194:
+.L137:
+	mov	w27, 0
+.L189:
+	.loc 1 309 0
+	mov	w19, 2
+	b	.L109
+.LVL195:
+.L138:
+	.loc 1 290 0
+	mov	w24, w0
+	mov	w27, 0
+.L191:
+	.loc 1 314 0
+	mov	w19, 3
+	b	.L109
+.LVL196:
+.L139:
+	.loc 1 312 0
+	mov	w24, w0
+	mov	w27, 0
+	b	.L191
+.LVL197:
+.L141:
+	.loc 1 325 0
+	mov	w27, -1
+	b	.L190
+.LVL198:
+.L187:
+.LBB64:
+.LBB62:
+	.loc 1 86 0
+	ldr	x4, [x29, 200]
+	.loc 1 87 0
+	mov	x1, 0
+	mov	w25, 0
+	.loc 1 88 0
+	mov	w6, 1
+	.loc 1 87 0
+	add	x5, x3, x4
+.LVL199:
+.L117:
+	.loc 1 86 0
+	ldr	x2, [x20, x1, lsl 3]
+	cmp	x4, x2
+	bcc	.L116
+	.loc 1 87 0
+	ldr	x7, [x21, x1, lsl 3]
+	add	x2, x2, x7
+	.loc 1 88 0
+	cmp	x5, x2
+	csel	w25, w25, w6, hi
+.LVL200:
+.L116:
+	add	x1, x1, 1
+.LVL201:
+	.loc 1 85 0
+	cmp	w0, w1
+	bhi	.L117
+	.loc 1 89 0
+	cbnz	w25, .L118
+	.loc 1 90 0
+	adrp	x0, .LC29
+	add	x0, x0, :lo12:.LC29
+	bl	printf
+.LVL202:
+.L119:
+.LBE62:
+.LBE64:
+	.loc 1 339 0
+	cbnz	w25, .L115
+	.loc 1 340 0
+	mov	w23, 1
+	b	.L81
+.LVL203:
+.L118:
+.LBB65:
+.LBB63:
+	.loc 1 92 0
+	str	x4, [x29, 120]
+	.loc 1 94 0
+	cmp	w0, 1
+	.loc 1 93 0
+	str	x3, [x29, 152]
+.LVL204:
+	.loc 1 94 0
+	beq	.L119
+	.loc 1 95 0
+	str	xzr, [x29, 128]
+	.loc 1 94 0
+	cmp	w0, 2
+	.loc 1 96 0
+	str	xzr, [x29, 160]
+.LVL205:
+	.loc 1 94 0
+	beq	.L119
+	.loc 1 95 0
+	str	xzr, [x29, 136]
+	.loc 1 94 0
+	cmp	w0, 4
+	.loc 1 96 0
+	str	xzr, [x29, 168]
+.LVL206:
+	.loc 1 94 0
+	bne	.L119
+	.loc 1 95 0
+	str	xzr, [x29, 144]
+	.loc 1 96 0
+	str	xzr, [x29, 176]
+.LVL207:
+	b	.L119
+.LVL208:
+.L130:
+.LBE63:
+.LBE65:
+	.loc 1 350 0
+	mov	x28, 0
+	.loc 1 348 0
+	add	w26, w26, 1
+.LVL209:
+	.loc 1 349 0
+	mov	w1, w26
+	mov	x0, x27
+	bl	printf
+.LVL210:
+.L122:
+	.loc 1 350 0 discriminator 1
+	cmp	w25, w28
+	bhi	.L128
+	mov	w0, 0
+	mov	w24, 0
+.LVL211:
+.L127:
+	.loc 1 376 0
+	orr	w0, w24, w0
+.LVL212:
+	cbnz	w0, .L112
+.LVL213:
+.L129:
+	.loc 1 347 0
+	ldr	x0, [x29, 192]
+	cbz	x0, .L130
+	.loc 1 347 0 is_stmt 0 discriminator 1
+	cmp	x0, x26, uxtw
+	bhi	.L130
+	b	.L97
+.LVL214:
+.L128:
+	.loc 1 357 0 is_stmt 1
+	ldr	x1, [x21, x28, lsl 3]
+	.loc 1 351 0
+	cmp	w22, 3
+	.loc 1 357 0
+	ldr	x0, [x20, x28, lsl 3]
+	.loc 1 351 0
+	beq	.L124
+	cmp	w22, 4
+	beq	.L125
+	.loc 1 353 0
+	bl	random_test
+.LVL215:
+.L192:
+	.loc 1 361 0
+	mov	w24, w0
+.LVL216:
+	.loc 1 369 0
+	bl	ctrlc
+.LVL217:
+	cbnz	w0, .L144
+	add	x28, x28, 1
+.LVL218:
+	mov	w19, w22
+	.loc 1 373 0
+	cbz	w24, .L122
+.LVL219:
+	mov	w19, w22
+.LVL220:
+	b	.L127
+.LVL221:
+.L124:
+	.loc 1 357 0
+	bl	crosstalk
+.LVL222:
+	b	.L192
+.L125:
+	.loc 1 361 0
+	bl	diagonalscan
+.LVL223:
+	b	.L192
+.LVL224:
+.L144:
+	mov	w19, w22
+	.loc 1 370 0
+	mov	w0, -1
+	b	.L127
+.LVL225:
+.L90:
+	.loc 1 220 0
+	adrp	x0, .LANCHOR3
+	add	x0, x0, :lo12:.LANCHOR3
+	ldrb	w0, [x0, w25, sxtw]
+	cmp	w26, w0
+	blt	.L131
+	sub	w26, w26, #2
+.LVL226:
+	.loc 1 220 0 is_stmt 0 discriminator 1
+	mov	x28, 0
+	lsl	x26, x26, 3
+.LVL227:
+.L93:
+	.loc 1 225 0 is_stmt 1 discriminator 1
+	cmp	x28, x26
+	bne	.L94
+	.loc 1 232 0
+	ldp	x2, x3, [x29, 184]
+	mov	w1, w22
+	ldp	x4, x5, [x29, 200]
+	adrp	x0, .LC24
+	ldr	x6, [x29, 216]
+	add	x0, x0, :lo12:.LC24
+	bl	printf
+.LVL228:
+	.loc 1 244 0
+	adrp	x0, .LC25
+	add	x0, x0, :lo12:.LC25
+	bl	printf
+.LVL229:
+	.loc 1 247 0
+	cbnz	w22, .L95
+	.loc 1 249 0
+	ldr	x0, [x29, 192]
+.L197:
+	.loc 1 254 0
+	cbz	x0, .L97
+	.loc 1 255 0
+	bl	set_vdd_logic
+.LVL230:
+.L97:
+	.loc 1 384 0
+	adrp	x0, .LC32
+	add	x0, x0, :lo12:.LC32
+	bl	printf
+.LVL231:
+	b	.L81
+.LVL232:
+.L110:
+	.loc 1 307 0
+	mov	x1, x19
+	mov	x0, x22
+	bl	random_test
+.LVL233:
+	mov	w24, w0
+.LVL234:
+	.loc 1 311 0
+	cbnz	w0, .L189
+	.loc 1 312 0
+	mov	x1, x19
+	mov	x0, x22
+.LVL235:
+	bl	crosstalk
+.LVL236:
+	mov	w27, w0
+.LVL237:
+	.loc 1 316 0
+	cbnz	w0, .L139
+	.loc 1 317 0
+	mov	x1, x19
+	mov	x0, x22
+.LVL238:
+	bl	diagonalscan
+.LVL239:
+	mov	w24, w0
+.LVL240:
+	.loc 1 322 0
+	cbnz	w0, .L190
+	.loc 1 324 0
+	bl	ctrlc
+.LVL241:
+	cbnz	w0, .L141
+	.loc 1 319 0
+	mov	w19, 4
+.LVL242:
+.L108:
+	add	x25, x25, 1
+.LVL243:
+	.loc 1 281 0 discriminator 2
+	cmp	x25, 4
+	bne	.L111
+	mov	w27, 0
+	mov	w24, 0
+.LVL244:
+.L109:
+	.loc 1 329 0
+	orr	w2, w24, w27
+	cbz	w2, .L113
+.LVL245:
+.L112:
+	.loc 1 381 0
+	cbz	w24, .L97
+	.loc 1 382 0
+	ldr	x0, [x29, 104]
+	add	x24, x0, :lo12:.LANCHOR2
+.LVL246:
+	adrp	x0, .LC31
+	add	x0, x0, :lo12:.LC31
+	ldr	x1, [x24, w19, sxtw 3]
+	bl	printf
+.LVL247:
+.L81:
+	.loc 1 387 0
+	mov	w0, w23
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 224
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE259:
+	.size	do_ddr_test, .-do_ddr_test
+	.section	.text.print_memory,"ax",@progbits
+	.align	2
+	.global	print_memory
+	.type	print_memory, %function
+print_memory:
+.LFB279:
+	.loc 3 81 0
+	.cfi_startproc
+.LVL248:
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	mov	x20, x0
+.LVL249:
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -16
+	.cfi_offset 22, -8
+	.loc 3 86 0
+	adrp	x21, .LC34
+	.loc 3 85 0
+	lsr	x22, x1, 2
+	.loc 3 86 0
+	add	x21, x21, :lo12:.LC34
+	.loc 3 85 0
+	mov	w19, 0
+.LVL250:
+.L199:
+	.loc 3 85 0 is_stmt 0 discriminator 1
+	uxtw	x1, w19
+	cmp	x1, x22
+	bcc	.L200
+	.loc 3 89 0 is_stmt 1
+	ldp	x19, x20, [sp, 16]
+.LVL251:
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL252:
+.L200:
+	.cfi_restore_state
+	.loc 3 87 0 discriminator 3
+	add	w3, w19, 3
+	add	w2, w19, 2
+	add	w0, w19, 1
+	lsl	x1, x1, 2
+	.loc 3 85 0 discriminator 3
+	add	w19, w19, 4
+.LVL253:
+	.loc 3 86 0 discriminator 3
+	ldr	w5, [x20, x3, lsl 2]
+	ldr	w4, [x20, x2, lsl 2]
+	ldr	w3, [x20, x0, lsl 2]
+	mov	x0, x21
+	ldr	w2, [x20, x1]
+	add	x1, x20, x1
+	bl	printf
+.LVL254:
+	b	.L199
+	.cfi_endproc
+.LFE279:
+	.size	print_memory, .-print_memory
+	.global	_u_boot_list_2_cmd_2_ddr_test
+	.section	.rodata
+	.align	3
+	.set	.LANCHOR1,. + 0
+.LC0:
+	.word	1437226410
+	.word	-1437226411
+	.word	1515890085
+	.word	-1515890086
+	.word	-267448336
+	.word	267448335
+	.word	0
+	.word	-1
+	.section	.rodata.cmp_buf_data.str1.1,"aMS",@progbits,1
+.LC12:
+	.string	"test fail:address:0x%lx,read:0x%lx,reread:0x%lx,expect:0x%lx\n"
+	.section	.rodata.crosstalk.str1.1,"aMS",@progbits,1
+.LC13:
+	.string	"\nbitflip:   \n"
+.LC14:
+	.string	"\b\b\b%3u"
+.LC15:
+	.string	"%3u\b\b\b"
+.LC16:
+	.string	"\nISI:\n"
+.LC17:
+	.string	"malloc %lu byte fail\n"
+	.section	.rodata.diagonalscan.str1.1,"aMS",@progbits,1
+.LC18:
+	.string	"\nDiagonalScan\n"
+	.section	.rodata.do_ddr_test.str1.1,"aMS",@progbits,1
+.LC19:
+	.string	"available memory for test:\n"
+.LC20:
+	.string	"\tstart\t\t end\tlength\n"
+.LC21:
+	.string	"\t0x%08lx - 0x%08lx 0x%08lx\n"
+.LC22:
+	.string	"test parameters error\n"
+.LC23:
+	.string	"test pattern error\n"
+.LC24:
+	.string	"test pattern:%d, arg:0x%lx,0x%lx,0x%lx,0x%lx,0x%lx\n"
+.LC25:
+	.string	"rockchip DMC didn't enable, can't change freq and freq scanning\n"
+.LC26:
+	.string	"fasttest need %uMB, but actually only %luMB\n"
+.LC27:
+	.string	"\rtimes:%08u:\n"
+.LC28:
+	.string	"loop:%d, start:0x%lx, len:0x%lx\n"
+.LC29:
+	.string	"Invalid test address\n"
+.LC30:
+	.string	"\rtimes:%08u, "
+.LC31:
+	.string	"\n%s test fail\n"
+.LC32:
+	.string	"\ntest pass\n"
+.LC33:
+	.string	"test pattern unsupported\n"
+	.section	.rodata.g_isi_pattern,"a",@progbits
+	.align	3
+	.set	.LANCHOR0,. + 0
+	.type	g_isi_pattern, %object
+	.size	g_isi_pattern, 128
+g_isi_pattern:
+	.word	-1
+	.word	0
+	.word	-1
+	.word	0
+	.word	-1
+	.word	0
+	.word	-1
+	.word	-1
+	.word	-1
+	.word	-1
+	.word	0
+	.word	-1
+	.word	-1
+	.word	-1
+	.word	-1
+	.word	0
+	.word	-1
+	.word	0
+	.word	-1
+	.word	0
+	.word	-1
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	-1
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.section	.rodata.print_memory.str1.1,"aMS",@progbits,1
+.LC34:
+	.string	"0x%08lx: 0x%08x, 0x%08x, 0x%08x, 0x%08x\n"
+	.section	.rodata.random_test.str1.1,"aMS",@progbits,1
+.LC4:
+	.string	"%u"
+.LC5:
+	.string	"\b"
+.LC6:
+	.string	" "
+.LC7:
+	.string	"\nrandom test1 fail:address:0x%lx,read:0x%x,reread:0x%x,expect:0x%x\n"
+.LC8:
+	.string	"%4lu"
+.LC9:
+	.string	"\b\b\b\b"
+.LC10:
+	.string	"    "
+.LC11:
+	.string	"\nrandom test2 fail:address:0x%lx,read:0x%lx,reread:0x%lx,expect:0x%lx\n"
+	.section	.rodata.set_vdd_logic.str1.1,"aMS",@progbits,1
+.LC1:
+	.string	"vdd_logic"
+.LC2:
+	.string	"Cannot set regulator name\n"
+.LC3:
+	.string	"set vdd_logic fail\n"
+	.section	.rodata.str1.1,"aMS",@progbits,1
+.LC35:
+	.string	"ddr_test"
+.LC36:
+	.string	"for dram simple test\n"
+.LC37:
+	.ascii	"arg1: test pattern include:\n\tchangefreq\n\tscanfreq\n\tran"
+	.ascii	"dom\n\tcrosstalk\n\tdiagonalscan\n\tfast_test\n\tfull_test\n"
+	.ascii	"for changereq: arg2:freq(Hz),arg3[option]:volt\nfor scanfreq"
+	.ascii	": arg2:minfreq(Hz),arg3:maxfreq(Hz),\n\targ4:scanfreq times,"
+	.ascii	" arg5[option]:volt\nfor random, crosstalk and diagonalscan:a"
+	.ascii	"rg2:freq(Hz), arg3:test times,\n\targ4: start addr, arg5:len"
+	.ascii	"gth, arg6[option]:volt\nfor fast_test and full_test:arg2: mi"
+	.ascii	"n_freq(Hz), arg3: max_freq(Hz)\n\targ4: test times, arg5[opt"
+	.ascii	"ion]:volt\n\nfreq: means dram's target frequency,unit:Hz, if"
+	.ascii	" 0:keep current freq\nminfreq, maxfreq: means min and max fr"
+	.ascii	"equency for dram test,unit:Hz\ntest times: test loop, if 0: "
+	.ascii	"endless loop\nstart_adr: start address of memory space for t"
+	.ascii	"esting,unit:physical address\nlength: length of memory space"
+	.ascii	" for testing,unit:Byte, if 0: full memory space test\nvolt: "
+	.ascii	"means target voltage of vdd_logic\n\nexample:\nddr freq chan"
+	.ascii	"ge to:786MHz, vdd_logic:1.05v:\n\t 'ddr_test changefreq 7860"
+	.ascii	"00000 1050000'\nddr freq change to:786MHz, with default vdd_"
+	.ascii	"logic:\n\t 'ddr_test changefreq 786000000'\nscanning ddr fre"
+	.ascii	"quency between 200 and 786MHz for 10 times:\n\t 'ddr_test sc"
+	.ascii	"anfreq 200000000 786000000 100'\ndoing random test 10 times "
+	.ascii	"start from"
+	.string	" physical address 0x200000 and\nlength is 128MB, freq:786MHz, if freq=0 may keep current freq:\n\t 'ddr_test random 786000000 10 0x200000 0x8000000'\ndoing fast test for dram between 200MHz to 786MHz with 10 times:\n\t 'ddr_test fast_test 200000000 786000000 10'"
+.LC38:
+	.string	"changefreq"
+.LC39:
+	.string	"scanfreq"
+.LC40:
+	.string	"random"
+.LC41:
+	.string	"crosstalk"
+.LC42:
+	.string	"diagonalscan"
+.LC43:
+	.string	"fast_test"
+.LC44:
+	.string	"full_test"
+	.section	.rodata.test_pat_param,"a",@progbits
+	.align	3
+	.set	.LANCHOR3,. + 0
+	.type	test_pat_param, %object
+	.size	test_pat_param, 7
+test_pat_param:
+	.byte	3
+	.byte	5
+	.byte	6
+	.byte	6
+	.byte	6
+	.byte	5
+	.byte	5
+	.section	.rodata.test_pattern,"a",@progbits
+	.align	3
+	.set	.LANCHOR2,. + 0
+	.type	test_pattern, %object
+	.size	test_pattern, 56
+test_pattern:
+	.xword	.LC38
+	.xword	.LC39
+	.xword	.LC40
+	.xword	.LC41
+	.xword	.LC42
+	.xword	.LC43
+	.xword	.LC44
+	.section	.u_boot_list_2_cmd_2_ddr_test,"aw",@progbits
+	.align	2
+	.type	_u_boot_list_2_cmd_2_ddr_test, %object
+	.size	_u_boot_list_2_cmd_2_ddr_test, 48
+_u_boot_list_2_cmd_2_ddr_test:
+	.8byte	.LC35
+	.word	7
+	.word	1
+	.8byte	do_ddr_test
+	.8byte	.LC36
+	.8byte	.LC37
+	.8byte	0
+	.text
+.Letext0:
+	.file 6 "include/common.h"
+	.file 7 "./arch/arm/include/asm/types.h"
+	.file 8 "include/linux/types.h"
+	.file 9 "include/errno.h"
+	.file 10 "include/linux/string.h"
+	.file 11 "include/efi.h"
+	.file 12 "include/dm/device.h"
+	.file 13 "include/ide.h"
+	.file 14 "include/linux/list.h"
+	.file 15 "include/part.h"
+	.file 16 "include/flash.h"
+	.file 17 "include/lmb.h"
+	.file 18 "include/asm-generic/u-boot.h"
+	.file 19 "./arch/arm/include/asm/u-boot-arm.h"
+	.file 20 "include/command.h"
+	.file 21 "include/../scripts/dtc/libfdt/fdt.h"
+	.file 22 "include/libfdt_env.h"
+	.file 23 "include/image.h"
+	.file 24 "include/dm/uclass-id.h"
+	.file 25 "./arch/arm/include/asm/global_data.h"
+	.file 26 "include/asm-generic/global_data.h"
+	.file 27 "include/dm/of.h"
+	.file 28 "include/net.h"
+	.file 29 "include/malloc.h"
+	.file 30 "include/dm/ofnode.h"
+	.file 31 "include/linux/compat.h"
+	.file 32 "include/dm/uclass.h"
+	.file 33 "include/console.h"
+	.file 34 "include/log.h"
+	.file 35 "include/stdio.h"
+	.file 36 "include/vsprintf.h"
+	.file 37 "include/power/regulator.h"
+	.file 38 "include/linux/delay.h"
+	.section	.debug_info,"",@progbits
+.Ldebug_info0:
+	.4byte	0x28ec
+	.2byte	0x4
+	.4byte	.Ldebug_abbrev0
+	.byte	0x8
+	.uleb128 0x1
+	.4byte	.LASF468
+	.byte	0xc
+	.4byte	.LASF469
+	.4byte	.LASF470
+	.4byte	.Ldebug_ranges0+0x190
+	.8byte	0
+	.4byte	.Ldebug_line0
+	.uleb128 0x2
+	.4byte	.LASF4
+	.byte	0x6
+	.byte	0xd
+	.4byte	0x34
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x8
+	.4byte	.LASF0
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF1
+	.uleb128 0x4
+	.4byte	0x3b
+	.uleb128 0x3
+	.byte	0x2
+	.byte	0x7
+	.4byte	.LASF2
+	.uleb128 0x5
+	.4byte	.LASF21
+	.byte	0x9
+	.byte	0xc
+	.4byte	0x59
+	.uleb128 0x6
+	.byte	0x4
+	.byte	0x5
+	.string	"int"
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x6
+	.4byte	.LASF3
+	.uleb128 0x2
+	.4byte	.LASF5
+	.byte	0x7
+	.byte	0xc
+	.4byte	0x34
+	.uleb128 0x3
+	.byte	0x2
+	.byte	0x5
+	.4byte	.LASF6
+	.uleb128 0x2
+	.4byte	.LASF7
+	.byte	0x7
+	.byte	0x12
+	.4byte	0x84
+	.uleb128 0x3
+	.byte	0x4
+	.byte	0x7
+	.4byte	.LASF8
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x5
+	.4byte	.LASF9
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF10
+	.uleb128 0x7
+	.string	"u8"
+	.byte	0x7
+	.byte	0x1f
+	.4byte	0x34
+	.uleb128 0x8
+	.4byte	0x99
+	.uleb128 0x7
+	.string	"u32"
+	.byte	0x7
+	.byte	0x25
+	.4byte	0x84
+	.uleb128 0x4
+	.4byte	0xa8
+	.uleb128 0x2
+	.4byte	.LASF11
+	.byte	0x7
+	.byte	0x31
+	.4byte	0x92
+	.uleb128 0x2
+	.4byte	.LASF12
+	.byte	0x7
+	.byte	0x32
+	.4byte	0x92
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF13
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0xe7
+	.uleb128 0x8
+	.4byte	0xd5
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x8
+	.4byte	.LASF14
+	.uleb128 0x8
+	.4byte	0xe0
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x5
+	.4byte	.LASF15
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0xe0
+	.uleb128 0x8
+	.4byte	0xf3
+	.uleb128 0x2
+	.4byte	.LASF16
+	.byte	0x8
+	.byte	0x59
+	.4byte	0x47
+	.uleb128 0x2
+	.4byte	.LASF17
+	.byte	0x8
+	.byte	0x5b
+	.4byte	0x3b
+	.uleb128 0x2
+	.4byte	.LASF18
+	.byte	0x8
+	.byte	0x69
+	.4byte	0x67
+	.uleb128 0x2
+	.4byte	.LASF19
+	.byte	0x8
+	.byte	0x6b
+	.4byte	0x79
+	.uleb128 0x2
+	.4byte	.LASF20
+	.byte	0x8
+	.byte	0x97
+	.4byte	0x79
+	.uleb128 0xa
+	.byte	0x8
+	.uleb128 0x5
+	.4byte	.LASF22
+	.byte	0xa
+	.byte	0xb
+	.4byte	0xf3
+	.uleb128 0xb
+	.4byte	0x99
+	.4byte	0x152
+	.uleb128 0xc
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+	.byte	0xf
+	.byte	0
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x2
+	.4byte	.LASF23
+	.uleb128 0xb
+	.4byte	0xe0
+	.4byte	0x164
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0xe
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+	.byte	0xb
+	.2byte	0x140
+	.4byte	0x159
+	.uleb128 0xe
+	.4byte	.LASF25
+	.byte	0xb
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+	.uleb128 0xe
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+	.uleb128 0xf
+	.4byte	.LASF45
+	.byte	0xa0
+	.byte	0xc
+	.byte	0x80
+	.4byte	0x26d
+	.uleb128 0x10
+	.4byte	.LASF27
+	.byte	0xc
+	.byte	0x81
+	.4byte	0x14f9
+	.byte	0
+	.uleb128 0x10
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+	.byte	0xc
+	.byte	0x82
+	.4byte	0xd5
+	.byte	0x8
+	.uleb128 0x10
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+	.byte	0xc
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+	.uleb128 0x10
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+	.byte	0xc
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+	.byte	0x18
+	.uleb128 0x10
+	.4byte	.LASF31
+	.byte	0xc
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+	.byte	0x20
+	.uleb128 0x10
+	.4byte	.LASF32
+	.byte	0xc
+	.byte	0x86
+	.4byte	0x14c4
+	.byte	0x28
+	.uleb128 0x10
+	.4byte	.LASF33
+	.byte	0xc
+	.byte	0x87
+	.4byte	0x109
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+	.uleb128 0x10
+	.4byte	.LASF34
+	.byte	0xc
+	.byte	0x88
+	.4byte	0x26d
+	.byte	0x38
+	.uleb128 0x10
+	.4byte	.LASF35
+	.byte	0xc
+	.byte	0x89
+	.4byte	0x135
+	.byte	0x40
+	.uleb128 0x10
+	.4byte	.LASF36
+	.byte	0xc
+	.byte	0x8a
+	.4byte	0x153c
+	.byte	0x48
+	.uleb128 0x10
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+	.byte	0xc
+	.byte	0x8b
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+	.byte	0x50
+	.uleb128 0x10
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+	.byte	0xc
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+	.byte	0x58
+	.uleb128 0x10
+	.4byte	.LASF39
+	.byte	0xc
+	.byte	0x8d
+	.4byte	0x2a0
+	.byte	0x60
+	.uleb128 0x10
+	.4byte	.LASF40
+	.byte	0xc
+	.byte	0x8e
+	.4byte	0x2a0
+	.byte	0x70
+	.uleb128 0x10
+	.4byte	.LASF41
+	.byte	0xc
+	.byte	0x8f
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+	.byte	0x80
+	.uleb128 0x10
+	.4byte	.LASF42
+	.byte	0xc
+	.byte	0x90
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+	.byte	0x90
+	.uleb128 0x10
+	.4byte	.LASF43
+	.byte	0xc
+	.byte	0x91
+	.4byte	0x59
+	.byte	0x94
+	.uleb128 0x11
+	.string	"seq"
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+	.byte	0x92
+	.4byte	0x59
+	.byte	0x98
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+	.uleb128 0x9
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+	.uleb128 0x9
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+	.uleb128 0x12
+	.uleb128 0xb
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+	.uleb128 0xd
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+	.uleb128 0x5
+	.4byte	.LASF44
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+	.uleb128 0xb
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+	.4byte	0x2a0
+	.uleb128 0xc
+	.4byte	0xce
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+	.uleb128 0xf
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+	.byte	0x10
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+	.4byte	0x2c5
+	.uleb128 0x10
+	.4byte	.LASF47
+	.byte	0xe
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+	.uleb128 0x10
+	.4byte	.LASF48
+	.byte	0xe
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+	.4byte	0x2c5
+	.byte	0x8
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x2a0
+	.uleb128 0xf
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+	.byte	0x10
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+	.byte	0xf
+	.4byte	0x2f0
+	.uleb128 0x10
+	.4byte	.LASF28
+	.byte	0xf
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+	.uleb128 0x10
+	.4byte	.LASF50
+	.byte	0xf
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+	.uleb128 0x8
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+	.uleb128 0x9
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+	.uleb128 0xb
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+	.uleb128 0xd
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+	.uleb128 0x8
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+	.uleb128 0x5
+	.4byte	.LASF49
+	.byte	0xf
+	.byte	0xce
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+	.uleb128 0x15
+	.2byte	0x1218
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+	.uleb128 0x10
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+	.uleb128 0x10
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+	.uleb128 0x10
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+	.uleb128 0x16
+	.4byte	.LASF55
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+	.4byte	0x382
+	.2byte	0x1018
+	.byte	0
+	.uleb128 0xb
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+	.uleb128 0x17
+	.4byte	0xce
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+	.uleb128 0xb
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+	.uleb128 0x17
+	.4byte	0xce
+	.2byte	0x1ff
+	.byte	0
+	.uleb128 0x2
+	.4byte	.LASF56
+	.byte	0x10
+	.byte	0x32
+	.4byte	0x32a
+	.uleb128 0xb
+	.4byte	0x393
+	.4byte	0x3a9
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x5
+	.4byte	.LASF57
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+	.4byte	0x39e
+	.uleb128 0x3
+	.byte	0x10
+	.byte	0x4
+	.4byte	.LASF58
+	.uleb128 0xf
+	.4byte	.LASF59
+	.byte	0x10
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+	.4byte	0x3e0
+	.uleb128 0x10
+	.4byte	.LASF60
+	.byte	0x11
+	.byte	0x11
+	.4byte	0xb8
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF51
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+	.byte	0x12
+	.4byte	0xc3
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+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF61
+	.byte	0xa0
+	.byte	0x11
+	.byte	0x15
+	.4byte	0x411
+	.uleb128 0x11
+	.string	"cnt"
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+	.4byte	0x3b
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+	.uleb128 0x10
+	.4byte	.LASF51
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+	.4byte	0xc3
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+	.uleb128 0x10
+	.4byte	.LASF62
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+	.byte	0
+	.uleb128 0xb
+	.4byte	0x3bb
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+	.uleb128 0xc
+	.4byte	0xce
+	.byte	0x8
+	.byte	0
+	.uleb128 0x18
+	.string	"lmb"
+	.2byte	0x140
+	.byte	0x11
+	.byte	0x1b
+	.4byte	0x447
+	.uleb128 0x10
+	.4byte	.LASF63
+	.byte	0x11
+	.byte	0x1c
+	.4byte	0x3e0
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF64
+	.byte	0x11
+	.byte	0x1d
+	.4byte	0x3e0
+	.byte	0xa0
+	.byte	0
+	.uleb128 0x19
+	.string	"lmb"
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+	.byte	0x20
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+	.uleb128 0x1a
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+	.uleb128 0x10
+	.4byte	.LASF54
+	.byte	0x12
+	.byte	0x5b
+	.4byte	0xb8
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF51
+	.byte	0x12
+	.byte	0x5c
+	.4byte	0xc3
+	.byte	0x8
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF65
+	.byte	0xc8
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+	.byte	0x1b
+	.4byte	0x564
+	.uleb128 0x10
+	.4byte	.LASF66
+	.byte	0x12
+	.byte	0x1c
+	.4byte	0x3b
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF67
+	.byte	0x12
+	.byte	0x1d
+	.4byte	0xc3
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF68
+	.byte	0x12
+	.byte	0x1e
+	.4byte	0x3b
+	.byte	0x10
+	.uleb128 0x10
+	.4byte	.LASF69
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+	.byte	0x1f
+	.4byte	0x3b
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+	.uleb128 0x10
+	.4byte	.LASF70
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+	.4byte	0x3b
+	.byte	0x20
+	.uleb128 0x10
+	.4byte	.LASF71
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+	.4byte	0x3b
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+	.uleb128 0x10
+	.4byte	.LASF72
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+	.4byte	0x3b
+	.byte	0x30
+	.uleb128 0x10
+	.4byte	.LASF73
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+	.4byte	0x3b
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+	.uleb128 0x10
+	.4byte	.LASF74
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+	.4byte	0x3b
+	.byte	0x40
+	.uleb128 0x10
+	.4byte	.LASF75
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+	.4byte	0x3b
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+	.uleb128 0x10
+	.4byte	.LASF76
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+	.4byte	0x3b
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+	.uleb128 0x10
+	.4byte	.LASF77
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+	.uleb128 0x10
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+	.byte	0x60
+	.uleb128 0x10
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+	.uleb128 0x10
+	.4byte	.LASF80
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+	.uleb128 0x10
+	.4byte	.LASF81
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+	.uleb128 0x10
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+	.uleb128 0x10
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+	.uleb128 0xb
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+	.uleb128 0x5
+	.4byte	.LASF92
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+	.uleb128 0xf
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+	.uleb128 0x10
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+	.byte	0xc
+	.uleb128 0x11
+	.string	"cmd"
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+	.uleb128 0x10
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+	.uleb128 0x10
+	.4byte	.LASF98
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+	.byte	0x2a
+	.4byte	0x686
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+	.uleb128 0x14
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+	.uleb128 0x9
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+	.uleb128 0x9
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+	.4byte	0xf9
+	.uleb128 0x9
+	.byte	0x8
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+	.uleb128 0x13
+	.4byte	0x59
+	.4byte	0x680
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+	.uleb128 0x1c
+	.4byte	.LASF253
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+	.uleb128 0x1d
+	.4byte	.LASF254
+	.sleb128 -1
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+	.uleb128 0x25
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+	.byte	0xe0
+	.4byte	0xc98
+	.uleb128 0x1c
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+	.byte	0
+	.uleb128 0xf
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+	.byte	0xc
+	.4byte	0xd11
+	.uleb128 0x10
+	.4byte	.LASF257
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+	.byte	0x22
+	.4byte	0x3b
+	.byte	0
+	.uleb128 0x11
+	.string	"tbu"
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+	.byte	0x23
+	.4byte	0x84
+	.byte	0x8
+	.uleb128 0x11
+	.string	"tbl"
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+	.byte	0x24
+	.4byte	0x84
+	.byte	0xc
+	.uleb128 0x10
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+	.byte	0x25
+	.4byte	0x3b
+	.byte	0x10
+	.uleb128 0x10
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+	.byte	0x26
+	.4byte	0x92
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+	.uleb128 0x10
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+	.byte	0x28
+	.4byte	0x3b
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+	.uleb128 0x10
+	.4byte	.LASF261
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+	.byte	0x29
+	.4byte	0x3b
+	.byte	0x28
+	.uleb128 0x10
+	.4byte	.LASF262
+	.byte	0x19
+	.byte	0x2b
+	.4byte	0x3b
+	.byte	0x30
+	.uleb128 0x10
+	.4byte	.LASF263
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+	.byte	0x2c
+	.4byte	0x3b
+	.byte	0x38
+	.byte	0
+	.uleb128 0xf
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+	.byte	0x18
+	.byte	0x1a
+	.byte	0x22
+	.4byte	0xd4d
+	.uleb128 0x10
+	.4byte	.LASF265
+	.byte	0x1a
+	.byte	0x23
+	.4byte	0xa8
+	.byte	0
+	.uleb128 0x11
+	.string	"id"
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+	.byte	0x24
+	.4byte	0xa8
+	.byte	0x4
+	.uleb128 0x10
+	.4byte	.LASF266
+	.byte	0x1a
+	.byte	0x25
+	.4byte	0xa8
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF267
+	.byte	0x1a
+	.byte	0x26
+	.4byte	0x109
+	.byte	0x10
+	.byte	0
+	.uleb128 0x26
+	.4byte	.LASF268
+	.2byte	0x198
+	.byte	0x1a
+	.byte	0x29
+	.4byte	0xf38
+	.uleb128 0x11
+	.string	"bd"
+	.byte	0x1a
+	.byte	0x2a
+	.4byte	0xa52
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF42
+	.byte	0x1a
+	.byte	0x2b
+	.4byte	0x3b
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF266
+	.byte	0x1a
+	.byte	0x2c
+	.4byte	0x84
+	.byte	0x10
+	.uleb128 0x10
+	.4byte	.LASF269
+	.byte	0x1a
+	.byte	0x2d
+	.4byte	0x3b
+	.byte	0x18
+	.uleb128 0x10
+	.4byte	.LASF270
+	.byte	0x1a
+	.byte	0x2e
+	.4byte	0x3b
+	.byte	0x20
+	.uleb128 0x10
+	.4byte	.LASF271
+	.byte	0x1a
+	.byte	0x30
+	.4byte	0x3b
+	.byte	0x28
+	.uleb128 0x10
+	.4byte	.LASF272
+	.byte	0x1a
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+	.4byte	0x3b
+	.byte	0x30
+	.uleb128 0x10
+	.4byte	.LASF273
+	.byte	0x1a
+	.byte	0x33
+	.4byte	0x3b
+	.byte	0x38
+	.uleb128 0x10
+	.4byte	.LASF274
+	.byte	0x1a
+	.byte	0x3d
+	.4byte	0x3b
+	.byte	0x40
+	.uleb128 0x10
+	.4byte	.LASF275
+	.byte	0x1a
+	.byte	0x41
+	.4byte	0x3b
+	.byte	0x48
+	.uleb128 0x10
+	.4byte	.LASF276
+	.byte	0x1a
+	.byte	0x42
+	.4byte	0x3b
+	.byte	0x50
+	.uleb128 0x10
+	.4byte	.LASF277
+	.byte	0x1a
+	.byte	0x44
+	.4byte	0x3b
+	.byte	0x58
+	.uleb128 0x10
+	.4byte	.LASF278
+	.byte	0x1a
+	.byte	0x45
+	.4byte	0x3b
+	.byte	0x60
+	.uleb128 0x10
+	.4byte	.LASF279
+	.byte	0x1a
+	.byte	0x46
+	.4byte	0xc3
+	.byte	0x68
+	.uleb128 0x10
+	.4byte	.LASF280
+	.byte	0x1a
+	.byte	0x47
+	.4byte	0x3b
+	.byte	0x70
+	.uleb128 0x10
+	.4byte	.LASF281
+	.byte	0x1a
+	.byte	0x48
+	.4byte	0x3b
+	.byte	0x78
+	.uleb128 0x10
+	.4byte	.LASF282
+	.byte	0x1a
+	.byte	0x49
+	.4byte	0x3b
+	.byte	0x80
+	.uleb128 0x10
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+	.byte	0x1a
+	.byte	0x4a
+	.4byte	0x3b
+	.byte	0x88
+	.uleb128 0x10
+	.4byte	.LASF284
+	.byte	0x1a
+	.byte	0x4b
+	.4byte	0xf38
+	.byte	0x90
+	.uleb128 0x10
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+	.byte	0x1a
+	.byte	0x4e
+	.4byte	0x26d
+	.byte	0x98
+	.uleb128 0x10
+	.4byte	.LASF286
+	.byte	0x1a
+	.byte	0x4f
+	.4byte	0x26d
+	.byte	0xa0
+	.uleb128 0x10
+	.4byte	.LASF287
+	.byte	0x1a
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+	.4byte	0x2a0
+	.byte	0xa8
+	.uleb128 0x10
+	.4byte	.LASF288
+	.byte	0x1a
+	.byte	0x56
+	.4byte	0x273
+	.byte	0xb8
+	.uleb128 0x10
+	.4byte	.LASF289
+	.byte	0x1a
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+	.4byte	0x135
+	.byte	0xc0
+	.uleb128 0x10
+	.4byte	.LASF290
+	.byte	0x1a
+	.byte	0x58
+	.4byte	0x3b
+	.byte	0xc8
+	.uleb128 0x10
+	.4byte	.LASF291
+	.byte	0x1a
+	.byte	0x5a
+	.4byte	0xfb0
+	.byte	0xd0
+	.uleb128 0x11
+	.string	"jt"
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+	.byte	0x5c
+	.4byte	0xfbb
+	.byte	0xd8
+	.uleb128 0x10
+	.4byte	.LASF292
+	.byte	0x1a
+	.byte	0x5d
+	.4byte	0xfc1
+	.byte	0xe0
+	.uleb128 0x16
+	.4byte	.LASF293
+	.byte	0x1a
+	.byte	0x67
+	.4byte	0x84
+	.2byte	0x100
+	.uleb128 0x16
+	.4byte	.LASF294
+	.byte	0x1a
+	.byte	0x68
+	.4byte	0x84
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+	.uleb128 0x16
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+	.2byte	0x108
+	.uleb128 0x16
+	.4byte	.LASF296
+	.byte	0x1a
+	.byte	0x6b
+	.4byte	0x3b
+	.2byte	0x110
+	.uleb128 0x16
+	.4byte	.LASF297
+	.byte	0x1a
+	.byte	0x6c
+	.4byte	0x3b
+	.2byte	0x118
+	.uleb128 0x16
+	.4byte	.LASF298
+	.byte	0x1a
+	.byte	0x75
+	.4byte	0x26d
+	.2byte	0x120
+	.uleb128 0x16
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+	.byte	0x1a
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+	.4byte	0xc98
+	.2byte	0x128
+	.uleb128 0x16
+	.4byte	.LASF299
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+	.4byte	0x109
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+	.uleb128 0x16
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+	.byte	0x1a
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+	.2byte	0x170
+	.uleb128 0x16
+	.4byte	.LASF301
+	.byte	0x1a
+	.byte	0x83
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+	.2byte	0x178
+	.uleb128 0x16
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+	.byte	0x1a
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+	.4byte	0xd11
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+	.byte	0
+	.uleb128 0x9
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+	.4byte	0xd4d
+	.uleb128 0xf
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+	.byte	0x1b
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+	.4byte	0xfab
+	.uleb128 0x10
+	.4byte	.LASF28
+	.byte	0x1b
+	.byte	0x2d
+	.4byte	0xd5
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF135
+	.byte	0x1b
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+	.4byte	0xd5
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF304
+	.byte	0x1b
+	.byte	0x2f
+	.4byte	0x143c
+	.byte	0x10
+	.uleb128 0x10
+	.4byte	.LASF305
+	.byte	0x1b
+	.byte	0x30
+	.4byte	0xd5
+	.byte	0x18
+	.uleb128 0x10
+	.4byte	.LASF306
+	.byte	0x1b
+	.byte	0x32
+	.4byte	0x1484
+	.byte	0x20
+	.uleb128 0x10
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+	.byte	0x1b
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+	.4byte	0xfb0
+	.byte	0x28
+	.uleb128 0x10
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+	.byte	0x1b
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+	.4byte	0xfb0
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+	.uleb128 0x10
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+	.byte	0x1b
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+	.uleb128 0x8
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+	.uleb128 0x9
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+	.uleb128 0x27
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+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0xfb6
+	.uleb128 0xb
+	.4byte	0xe0
+	.4byte	0xfd1
+	.uleb128 0xc
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+	.byte	0x1f
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+	.uleb128 0x2
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+	.4byte	0xd4d
+	.uleb128 0x4
+	.4byte	0xfd1
+	.uleb128 0x5
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+	.uleb128 0xb
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+	.4byte	0xff7
+	.uleb128 0xd
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+	.uleb128 0x5
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+	.uleb128 0x5
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+	.uleb128 0x5
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+	.uleb128 0xf
+	.4byte	.LASF316
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+	.uleb128 0x10
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+	.byte	0x1c
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+	.uleb128 0x9
+	.byte	0x8
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+	.uleb128 0xf
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+	.byte	0x1c
+	.byte	0xa6
+	.4byte	0x10ea
+	.uleb128 0x10
+	.4byte	.LASF28
+	.byte	0x1c
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+	.4byte	0x10ea
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+	.uleb128 0x10
+	.4byte	.LASF319
+	.byte	0x1c
+	.byte	0xa9
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+	.byte	0x10
+	.uleb128 0x10
+	.4byte	.LASF320
+	.byte	0x1c
+	.byte	0xaa
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+	.byte	0x18
+	.uleb128 0x10
+	.4byte	.LASF164
+	.byte	0x1c
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+	.byte	0x20
+	.uleb128 0x10
+	.4byte	.LASF321
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+	.4byte	0x1114
+	.byte	0x28
+	.uleb128 0x10
+	.4byte	.LASF322
+	.byte	0x1c
+	.byte	0xae
+	.4byte	0x1133
+	.byte	0x30
+	.uleb128 0x10
+	.4byte	.LASF323
+	.byte	0x1c
+	.byte	0xaf
+	.4byte	0x1148
+	.byte	0x38
+	.uleb128 0x10
+	.4byte	.LASF324
+	.byte	0x1c
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+	.byte	0x40
+	.uleb128 0x10
+	.4byte	.LASF325
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+	.uleb128 0x10
+	.4byte	.LASF47
+	.byte	0x1c
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+	.4byte	0x110e
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+	.uleb128 0x10
+	.4byte	.LASF326
+	.byte	0x1c
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+	.4byte	0x59
+	.byte	0x58
+	.uleb128 0x10
+	.4byte	.LASF35
+	.byte	0x1c
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+	.byte	0x60
+	.byte	0
+	.uleb128 0xb
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+	.uleb128 0x9
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+	.uleb128 0xe
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+	.uleb128 0xe
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+	.4byte	0x11b6
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+	.uleb128 0xe
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+	.uleb128 0xe
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+	.byte	0x1c
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+	.4byte	0x59
+	.uleb128 0xb
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+	.4byte	0x12a4
+	.uleb128 0x17
+	.4byte	0xce
+	.2byte	0x3ff
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF347
+	.byte	0x1c
+	.2byte	0x220
+	.4byte	0x1293
+	.uleb128 0xe
+	.4byte	.LASF348
+	.byte	0x1c
+	.2byte	0x222
+	.4byte	0xa8
+	.uleb128 0xe
+	.4byte	.LASF349
+	.byte	0x1c
+	.2byte	0x224
+	.4byte	0xa8
+	.uleb128 0xe
+	.4byte	.LASF350
+	.byte	0x1c
+	.2byte	0x230
+	.4byte	0x102e
+	.uleb128 0x29
+	.4byte	.LASF351
+	.byte	0x4
+	.4byte	0x84
+	.byte	0x1c
+	.2byte	0x286
+	.4byte	0x12fe
+	.uleb128 0x1c
+	.4byte	.LASF352
+	.byte	0
+	.uleb128 0x1c
+	.4byte	.LASF353
+	.byte	0x1
+	.uleb128 0x1c
+	.4byte	.LASF354
+	.byte	0x2
+	.uleb128 0x1c
+	.4byte	.LASF355
+	.byte	0x3
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF356
+	.byte	0x1c
+	.2byte	0x28c
+	.4byte	0x12d4
+	.uleb128 0xe
+	.4byte	.LASF357
+	.byte	0x1d
+	.2byte	0x3ba
+	.4byte	0x109
+	.uleb128 0xe
+	.4byte	.LASF358
+	.byte	0x1d
+	.2byte	0x3bb
+	.4byte	0x109
+	.uleb128 0xe
+	.4byte	.LASF359
+	.byte	0x1d
+	.2byte	0x3bc
+	.4byte	0x109
+	.uleb128 0xb
+	.4byte	0xa8
+	.4byte	0x133e
+	.uleb128 0xc
+	.4byte	0xce
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x2a
+	.4byte	.LASF403
+	.byte	0x4
+	.byte	0xa
+	.4byte	0x132e
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_isi_pattern
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x99
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0xa8
+	.uleb128 0xf
+	.4byte	.LASF27
+	.byte	0x78
+	.byte	0xc
+	.byte	0xee
+	.4byte	0x1437
+	.uleb128 0x10
+	.4byte	.LASF28
+	.byte	0xc
+	.byte	0xef
+	.4byte	0xf3
+	.byte	0
+	.uleb128 0x11
+	.string	"id"
+	.byte	0xc
+	.byte	0xf0
+	.4byte	0xa70
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF360
+	.byte	0xc
+	.byte	0xf1
+	.4byte	0x156c
+	.byte	0x10
+	.uleb128 0x10
+	.4byte	.LASF361
+	.byte	0xc
+	.byte	0xf2
+	.4byte	0x1581
+	.byte	0x18
+	.uleb128 0x10
+	.4byte	.LASF362
+	.byte	0xc
+	.byte	0xf3
+	.4byte	0x1581
+	.byte	0x20
+	.uleb128 0x10
+	.4byte	.LASF363
+	.byte	0xc
+	.byte	0xf4
+	.4byte	0x1581
+	.byte	0x28
+	.uleb128 0x10
+	.4byte	.LASF364
+	.byte	0xc
+	.byte	0xf5
+	.4byte	0x1581
+	.byte	0x30
+	.uleb128 0x10
+	.4byte	.LASF365
+	.byte	0xc
+	.byte	0xf6
+	.4byte	0x1581
+	.byte	0x38
+	.uleb128 0x10
+	.4byte	.LASF366
+	.byte	0xc
+	.byte	0xf7
+	.4byte	0x1581
+	.byte	0x40
+	.uleb128 0x10
+	.4byte	.LASF367
+	.byte	0xc
+	.byte	0xf8
+	.4byte	0x1581
+	.byte	0x48
+	.uleb128 0x10
+	.4byte	.LASF368
+	.byte	0xc
+	.byte	0xf9
+	.4byte	0x1581
+	.byte	0x50
+	.uleb128 0x10
+	.4byte	.LASF369
+	.byte	0xc
+	.byte	0xfa
+	.4byte	0x59
+	.byte	0x58
+	.uleb128 0x10
+	.4byte	.LASF370
+	.byte	0xc
+	.byte	0xfb
+	.4byte	0x59
+	.byte	0x5c
+	.uleb128 0x10
+	.4byte	.LASF371
+	.byte	0xc
+	.byte	0xfc
+	.4byte	0x59
+	.byte	0x60
+	.uleb128 0x10
+	.4byte	.LASF372
+	.byte	0xc
+	.byte	0xfd
+	.4byte	0x59
+	.byte	0x64
+	.uleb128 0x11
+	.string	"ops"
+	.byte	0xc
+	.byte	0xfe
+	.4byte	0x273
+	.byte	0x68
+	.uleb128 0x10
+	.4byte	.LASF42
+	.byte	0xc
+	.byte	0xff
+	.4byte	0x11f
+	.byte	0x70
+	.byte	0
+	.uleb128 0x8
+	.4byte	0x135f
+	.uleb128 0x2
+	.4byte	.LASF304
+	.byte	0x1b
+	.byte	0xf
+	.4byte	0xa8
+	.uleb128 0xf
+	.4byte	.LASF373
+	.byte	0x20
+	.byte	0x1b
+	.byte	0x19
+	.4byte	0x1484
+	.uleb128 0x10
+	.4byte	.LASF28
+	.byte	0x1b
+	.byte	0x1a
+	.4byte	0xf3
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF374
+	.byte	0x1b
+	.byte	0x1b
+	.4byte	0x59
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF375
+	.byte	0x1b
+	.byte	0x1c
+	.4byte	0x135
+	.byte	0x10
+	.uleb128 0x10
+	.4byte	.LASF47
+	.byte	0x1b
+	.byte	0x1d
+	.4byte	0x1484
+	.byte	0x18
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x1447
+	.uleb128 0x2b
+	.string	"gd"
+	.byte	0x1b
+	.byte	0x57
+	.4byte	0x1496
+	.uleb128 0x1
+	.byte	0x62
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0xfdc
+	.uleb128 0x2c
+	.4byte	.LASF472
+	.byte	0x8
+	.byte	0x1e
+	.byte	0x33
+	.4byte	0x14be
+	.uleb128 0x2d
+	.string	"np"
+	.byte	0x1e
+	.byte	0x34
+	.4byte	0x14be
+	.uleb128 0x2e
+	.4byte	.LASF376
+	.byte	0x1e
+	.byte	0x35
+	.4byte	0xec
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0xfab
+	.uleb128 0x2
+	.4byte	.LASF377
+	.byte	0x1e
+	.byte	0x36
+	.4byte	0x149c
+	.uleb128 0xf
+	.4byte	.LASF378
+	.byte	0x4
+	.byte	0x1f
+	.byte	0xc
+	.4byte	0x14e8
+	.uleb128 0x11
+	.string	"pid"
+	.byte	0x1f
+	.byte	0xd
+	.4byte	0x59
+	.byte	0
+	.byte	0
+	.uleb128 0x5
+	.4byte	.LASF379
+	.byte	0x1f
+	.byte	0x10
+	.4byte	0x14f3
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x14cf
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x1437
+	.uleb128 0xf
+	.4byte	.LASF36
+	.byte	0x30
+	.byte	0x20
+	.byte	0x23
+	.4byte	0x153c
+	.uleb128 0x10
+	.4byte	.LASF35
+	.byte	0x20
+	.byte	0x24
+	.4byte	0x135
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF380
+	.byte	0x20
+	.byte	0x25
+	.4byte	0x166b
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF381
+	.byte	0x20
+	.byte	0x26
+	.4byte	0x2a0
+	.byte	0x10
+	.uleb128 0x10
+	.4byte	.LASF41
+	.byte	0x20
+	.byte	0x27
+	.4byte	0x2a0
+	.byte	0x20
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x14ff
+	.uleb128 0xf
+	.4byte	.LASF382
+	.byte	0x10
+	.byte	0xc
+	.byte	0xb5
+	.4byte	0x1567
+	.uleb128 0x10
+	.4byte	.LASF383
+	.byte	0xc
+	.byte	0xb6
+	.4byte	0xd5
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF384
+	.byte	0xc
+	.byte	0xb7
+	.4byte	0x109
+	.byte	0x8
+	.byte	0
+	.uleb128 0x8
+	.4byte	0x1542
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x1567
+	.uleb128 0x13
+	.4byte	0x59
+	.4byte	0x1581
+	.uleb128 0x14
+	.4byte	0x26d
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x1572
+	.uleb128 0xf
+	.4byte	.LASF385
+	.byte	0x80
+	.byte	0x20
+	.byte	0x54
+	.4byte	0x166b
+	.uleb128 0x10
+	.4byte	.LASF28
+	.byte	0x20
+	.byte	0x55
+	.4byte	0xd5
+	.byte	0
+	.uleb128 0x11
+	.string	"id"
+	.byte	0x20
+	.byte	0x56
+	.4byte	0xa70
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF386
+	.byte	0x20
+	.byte	0x57
+	.4byte	0x1581
+	.byte	0x10
+	.uleb128 0x10
+	.4byte	.LASF387
+	.byte	0x20
+	.byte	0x58
+	.4byte	0x1581
+	.byte	0x18
+	.uleb128 0x10
+	.4byte	.LASF388
+	.byte	0x20
+	.byte	0x59
+	.4byte	0x1581
+	.byte	0x20
+	.uleb128 0x10
+	.4byte	.LASF389
+	.byte	0x20
+	.byte	0x5a
+	.4byte	0x1581
+	.byte	0x28
+	.uleb128 0x10
+	.4byte	.LASF390
+	.byte	0x20
+	.byte	0x5b
+	.4byte	0x1581
+	.byte	0x30
+	.uleb128 0x10
+	.4byte	.LASF366
+	.byte	0x20
+	.byte	0x5c
+	.4byte	0x1581
+	.byte	0x38
+	.uleb128 0x10
+	.4byte	.LASF367
+	.byte	0x20
+	.byte	0x5d
+	.4byte	0x1581
+	.byte	0x40
+	.uleb128 0x10
+	.4byte	.LASF321
+	.byte	0x20
+	.byte	0x5e
+	.4byte	0x1680
+	.byte	0x48
+	.uleb128 0x10
+	.4byte	.LASF391
+	.byte	0x20
+	.byte	0x5f
+	.4byte	0x1680
+	.byte	0x50
+	.uleb128 0x10
+	.4byte	.LASF369
+	.byte	0x20
+	.byte	0x60
+	.4byte	0x59
+	.byte	0x58
+	.uleb128 0x10
+	.4byte	.LASF392
+	.byte	0x20
+	.byte	0x61
+	.4byte	0x59
+	.byte	0x5c
+	.uleb128 0x10
+	.4byte	.LASF393
+	.byte	0x20
+	.byte	0x62
+	.4byte	0x59
+	.byte	0x60
+	.uleb128 0x10
+	.4byte	.LASF371
+	.byte	0x20
+	.byte	0x63
+	.4byte	0x59
+	.byte	0x64
+	.uleb128 0x10
+	.4byte	.LASF372
+	.byte	0x20
+	.byte	0x64
+	.4byte	0x59
+	.byte	0x68
+	.uleb128 0x11
+	.string	"ops"
+	.byte	0x20
+	.byte	0x65
+	.4byte	0x273
+	.byte	0x70
+	.uleb128 0x10
+	.4byte	.LASF42
+	.byte	0x20
+	.byte	0x66
+	.4byte	0x11f
+	.byte	0x78
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x1587
+	.uleb128 0x13
+	.4byte	0x59
+	.4byte	0x1680
+	.uleb128 0x14
+	.4byte	0x153c
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x1671
+	.uleb128 0x5
+	.4byte	.LASF394
+	.byte	0x21
+	.byte	0xb
+	.4byte	0x159
+	.uleb128 0x25
+	.byte	0x4
+	.4byte	0x84
+	.byte	0x1
+	.byte	0x14
+	.4byte	0x16ce
+	.uleb128 0x1c
+	.4byte	.LASF395
+	.byte	0
+	.uleb128 0x1c
+	.4byte	.LASF396
+	.byte	0x1
+	.uleb128 0x1c
+	.4byte	.LASF397
+	.byte	0x2
+	.uleb128 0x1c
+	.4byte	.LASF398
+	.byte	0x3
+	.uleb128 0x1c
+	.4byte	.LASF399
+	.byte	0x4
+	.uleb128 0x1c
+	.4byte	.LASF400
+	.byte	0x5
+	.uleb128 0x1c
+	.4byte	.LASF401
+	.byte	0x6
+	.uleb128 0x1c
+	.4byte	.LASF402
+	.byte	0x7
+	.byte	0
+	.uleb128 0xb
+	.4byte	0xdb
+	.4byte	0x16de
+	.uleb128 0xc
+	.4byte	0xce
+	.byte	0x6
+	.byte	0
+	.uleb128 0x8
+	.4byte	0x16ce
+	.uleb128 0x2a
+	.4byte	.LASF404
+	.byte	0x1
+	.byte	0x1f
+	.4byte	0x16de
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	test_pattern
+	.uleb128 0xb
+	.4byte	0xa3
+	.4byte	0x1708
+	.uleb128 0xc
+	.4byte	0xce
+	.byte	0x6
+	.byte	0
+	.uleb128 0x8
+	.4byte	0x16f8
+	.uleb128 0x2a
+	.4byte	.LASF405
+	.byte	0x1
+	.byte	0x29
+	.4byte	0x1708
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	test_pat_param
+	.uleb128 0x2f
+	.4byte	.LASF406
+	.byte	0x1
+	.2byte	0x185
+	.4byte	0x68c
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	_u_boot_list_2_cmd_2_ddr_test
+	.uleb128 0x30
+	.4byte	.LASF414
+	.byte	0x3
+	.byte	0x50
+	.8byte	.LFB279
+	.8byte	.LFE279-.LFB279
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x17b3
+	.uleb128 0x31
+	.4byte	.LASF267
+	.byte	0x3
+	.byte	0x50
+	.4byte	0x135
+	.4byte	.LLST69
+	.uleb128 0x31
+	.4byte	.LASF51
+	.byte	0x3
+	.byte	0x50
+	.4byte	0x109
+	.4byte	.LLST70
+	.uleb128 0x32
+	.string	"p"
+	.byte	0x3
+	.byte	0x52
+	.4byte	0x1359
+	.4byte	.LLST71
+	.uleb128 0x32
+	.string	"i"
+	.byte	0x3
+	.byte	0x53
+	.4byte	0xa8
+	.4byte	.LLST72
+	.uleb128 0x33
+	.8byte	.LVL254
+	.4byte	0x2873
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0xd
+	.byte	0x83
+	.sleb128 -4
+	.byte	0xc
+	.4byte	0xffffffff
+	.byte	0x1a
+	.byte	0x32
+	.byte	0x24
+	.byte	0x84
+	.sleb128 0
+	.byte	0x22
+	.byte	0
+	.byte	0
+	.uleb128 0x35
+	.4byte	.LASF417
+	.byte	0x3
+	.byte	0x2e
+	.4byte	0x109
+	.8byte	.LFB278
+	.8byte	.LFE278-.LFB278
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x18b3
+	.uleb128 0x36
+	.string	"buf"
+	.byte	0x3
+	.byte	0x2e
+	.4byte	0x1359
+	.4byte	.LLST23
+	.uleb128 0x31
+	.4byte	.LASF407
+	.byte	0x3
+	.byte	0x2e
+	.4byte	0xa8
+	.4byte	.LLST24
+	.uleb128 0x31
+	.4byte	.LASF408
+	.byte	0x3
+	.byte	0x2e
+	.4byte	0x109
+	.4byte	.LLST25
+	.uleb128 0x31
+	.4byte	.LASF374
+	.byte	0x3
+	.byte	0x2e
+	.4byte	0x109
+	.4byte	.LLST26
+	.uleb128 0x31
+	.4byte	.LASF409
+	.byte	0x3
+	.byte	0x2f
+	.4byte	0xa8
+	.4byte	.LLST27
+	.uleb128 0x37
+	.4byte	.LASF410
+	.byte	0x3
+	.byte	0x31
+	.4byte	0x18b3
+	.4byte	.LLST28
+	.uleb128 0x32
+	.string	"p"
+	.byte	0x3
+	.byte	0x32
+	.4byte	0x18b9
+	.4byte	.LLST29
+	.uleb128 0x32
+	.string	"i"
+	.byte	0x3
+	.byte	0x33
+	.4byte	0xa8
+	.4byte	.LLST30
+	.uleb128 0x32
+	.string	"j"
+	.byte	0x3
+	.byte	0x33
+	.4byte	0xa8
+	.4byte	.LLST31
+	.uleb128 0x32
+	.string	"val"
+	.byte	0x3
+	.byte	0x34
+	.4byte	0x109
+	.4byte	.LLST32
+	.uleb128 0x37
+	.4byte	.LASF411
+	.byte	0x3
+	.byte	0x34
+	.4byte	0x109
+	.4byte	.LLST33
+	.uleb128 0x37
+	.4byte	.LASF412
+	.byte	0x3
+	.byte	0x34
+	.4byte	0x109
+	.4byte	.LLST34
+	.uleb128 0x37
+	.4byte	.LASF413
+	.byte	0x3
+	.byte	0x34
+	.4byte	0x109
+	.4byte	.LLST35
+	.uleb128 0x33
+	.8byte	.LVL80
+	.4byte	0x2873
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC12
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x109
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x42
+	.uleb128 0x30
+	.4byte	.LASF415
+	.byte	0x3
+	.byte	0x1c
+	.8byte	.LFB277
+	.8byte	.LFE277-.LFB277
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x1947
+	.uleb128 0x38
+	.string	"buf"
+	.byte	0x3
+	.byte	0x1c
+	.4byte	0x1359
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x31
+	.4byte	.LASF407
+	.byte	0x3
+	.byte	0x1c
+	.4byte	0xa8
+	.4byte	.LLST19
+	.uleb128 0x39
+	.4byte	.LASF408
+	.byte	0x3
+	.byte	0x1c
+	.4byte	0x109
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x31
+	.4byte	.LASF374
+	.byte	0x3
+	.byte	0x1c
+	.4byte	0x109
+	.4byte	.LLST20
+	.uleb128 0x2a
+	.4byte	.LASF410
+	.byte	0x3
+	.byte	0x1e
+	.4byte	0x18b3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3a
+	.string	"p"
+	.byte	0x3
+	.byte	0x1f
+	.4byte	0x18b3
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x32
+	.string	"i"
+	.byte	0x3
+	.byte	0x20
+	.4byte	0xa8
+	.4byte	.LLST21
+	.uleb128 0x32
+	.string	"j"
+	.byte	0x3
+	.byte	0x20
+	.4byte	0xa8
+	.4byte	.LLST22
+	.byte	0
+	.uleb128 0x30
+	.4byte	.LASF416
+	.byte	0x3
+	.byte	0xa
+	.8byte	.LFB276
+	.8byte	.LFE276-.LFB276
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x19a9
+	.uleb128 0x36
+	.string	"p"
+	.byte	0x3
+	.byte	0xa
+	.4byte	0x1359
+	.4byte	.LLST16
+	.uleb128 0x3a
+	.string	"buf"
+	.byte	0x3
+	.byte	0xf
+	.4byte	0x142
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -16
+	.uleb128 0x32
+	.string	"tmp"
+	.byte	0x3
+	.byte	0x10
+	.4byte	0x1353
+	.4byte	.LLST17
+	.uleb128 0x32
+	.string	"i"
+	.byte	0x3
+	.byte	0x11
+	.4byte	0x59
+	.4byte	.LLST18
+	.uleb128 0x3b
+	.8byte	.LVL58
+	.4byte	0x287e
+	.byte	0
+	.uleb128 0x35
+	.4byte	.LASF418
+	.byte	0x2
+	.byte	0x57
+	.4byte	0x59
+	.8byte	.LFB275
+	.8byte	.LFE275-.LFB275
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x1c22
+	.uleb128 0x31
+	.4byte	.LASF419
+	.byte	0x2
+	.byte	0x57
+	.4byte	0x109
+	.4byte	.LLST2
+	.uleb128 0x31
+	.4byte	.LASF420
+	.byte	0x2
+	.byte	0x57
+	.4byte	0x109
+	.4byte	.LLST3
+	.uleb128 0x3a
+	.string	"ret"
+	.byte	0x2
+	.byte	0x59
+	.4byte	0x59
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3c
+	.4byte	0x1c90
+	.8byte	.LBB18
+	.4byte	.Ldebug_ranges0+0
+	.byte	0x2
+	.byte	0x5b
+	.4byte	0x1b1c
+	.uleb128 0x3d
+	.4byte	0x1cab
+	.4byte	.LLST4
+	.uleb128 0x3d
+	.4byte	0x1ca0
+	.4byte	.LLST5
+	.uleb128 0x3e
+	.4byte	.Ldebug_ranges0+0
+	.uleb128 0x3f
+	.4byte	0x1cb6
+	.4byte	.LLST6
+	.uleb128 0x3f
+	.4byte	0x1cbf
+	.4byte	.LLST7
+	.uleb128 0x3f
+	.4byte	0x1cc8
+	.4byte	.LLST8
+	.uleb128 0x3f
+	.4byte	0x1cd3
+	.4byte	.LLST9
+	.uleb128 0x40
+	.4byte	0x1cde
+	.uleb128 0x3f
+	.4byte	0x1ce9
+	.4byte	.LLST10
+	.uleb128 0x3f
+	.4byte	0x1cf4
+	.4byte	.LLST11
+	.uleb128 0x3f
+	.4byte	0x1cff
+	.4byte	.LLST12
+	.uleb128 0x41
+	.8byte	.LVL17
+	.4byte	0x288a
+	.4byte	0x1a8f
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x6
+	.byte	0x11
+	.sleb128 -2139062144
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL19
+	.4byte	0x2873
+	.4byte	0x1aad
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8c
+	.sleb128 0
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL23
+	.4byte	0x2873
+	.4byte	0x1ac5
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL29
+	.4byte	0x2873
+	.4byte	0x1ae4
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC6
+	.byte	0
+	.uleb128 0x33
+	.8byte	.LVL30
+	.4byte	0x2873
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC7
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x5
+	.byte	0x8f
+	.sleb128 204
+	.byte	0x94
+	.byte	0x4
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x42
+	.4byte	0x1c22
+	.8byte	.LBB27
+	.4byte	.Ldebug_ranges0+0x60
+	.byte	0x2
+	.byte	0x5d
+	.uleb128 0x43
+	.4byte	0x1c3d
+	.uleb128 0x43
+	.4byte	0x1c32
+	.uleb128 0x3e
+	.4byte	.Ldebug_ranges0+0x60
+	.uleb128 0x3f
+	.4byte	0x1c48
+	.4byte	.LLST13
+	.uleb128 0x3f
+	.4byte	0x1c51
+	.4byte	.LLST14
+	.uleb128 0x44
+	.4byte	0x1c5a
+	.uleb128 0x1
+	.byte	0x64
+	.uleb128 0x44
+	.4byte	0x1c65
+	.uleb128 0x1
+	.byte	0x6a
+	.uleb128 0x44
+	.4byte	0x1c70
+	.uleb128 0x1
+	.byte	0x6b
+	.uleb128 0x40
+	.4byte	0x1c7b
+	.uleb128 0x3f
+	.4byte	0x1c84
+	.4byte	.LLST15
+	.uleb128 0x41
+	.8byte	.LVL39
+	.4byte	0x2873
+	.4byte	0x1b91
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL41
+	.4byte	0x288a
+	.4byte	0x1bb5
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL46
+	.4byte	0x2873
+	.4byte	0x1bcd
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL52
+	.4byte	0x2873
+	.4byte	0x1bec
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC10
+	.byte	0
+	.uleb128 0x33
+	.8byte	.LVL53
+	.4byte	0x2873
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC11
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF424
+	.byte	0x2
+	.byte	0x30
+	.4byte	0x59
+	.byte	0x1
+	.4byte	0x1c90
+	.uleb128 0x46
+	.4byte	.LASF419
+	.byte	0x2
+	.byte	0x30
+	.4byte	0x109
+	.uleb128 0x46
+	.4byte	.LASF420
+	.byte	0x2
+	.byte	0x30
+	.4byte	0x109
+	.uleb128 0x47
+	.string	"i"
+	.byte	0x2
+	.byte	0x32
+	.4byte	0x109
+	.uleb128 0x47
+	.string	"j"
+	.byte	0x2
+	.byte	0x32
+	.4byte	0x109
+	.uleb128 0x48
+	.4byte	.LASF421
+	.byte	0x2
+	.byte	0x33
+	.4byte	0x109
+	.uleb128 0x48
+	.4byte	.LASF375
+	.byte	0x2
+	.byte	0x33
+	.4byte	0x109
+	.uleb128 0x48
+	.4byte	.LASF422
+	.byte	0x2
+	.byte	0x34
+	.4byte	0x109
+	.uleb128 0x47
+	.string	"p"
+	.byte	0x2
+	.byte	0x35
+	.4byte	0x18b9
+	.uleb128 0x48
+	.4byte	.LASF423
+	.byte	0x2
+	.byte	0x36
+	.4byte	0x109
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF425
+	.byte	0x2
+	.byte	0xa
+	.4byte	0x59
+	.byte	0x1
+	.4byte	0x1d0b
+	.uleb128 0x46
+	.4byte	.LASF419
+	.byte	0x2
+	.byte	0xa
+	.4byte	0x109
+	.uleb128 0x46
+	.4byte	.LASF420
+	.byte	0x2
+	.byte	0xa
+	.4byte	0x109
+	.uleb128 0x47
+	.string	"i"
+	.byte	0x2
+	.byte	0xc
+	.4byte	0xa8
+	.uleb128 0x47
+	.string	"j"
+	.byte	0x2
+	.byte	0xc
+	.4byte	0xa8
+	.uleb128 0x48
+	.4byte	.LASF426
+	.byte	0x2
+	.byte	0xd
+	.4byte	0xa8
+	.uleb128 0x48
+	.4byte	.LASF421
+	.byte	0x2
+	.byte	0xd
+	.4byte	0xa8
+	.uleb128 0x48
+	.4byte	.LASF375
+	.byte	0x2
+	.byte	0xd
+	.4byte	0xa8
+	.uleb128 0x48
+	.4byte	.LASF422
+	.byte	0x2
+	.byte	0xe
+	.4byte	0xa8
+	.uleb128 0x47
+	.string	"p32"
+	.byte	0x2
+	.byte	0xf
+	.4byte	0x1d0b
+	.uleb128 0x48
+	.4byte	.LASF423
+	.byte	0x2
+	.byte	0x10
+	.4byte	0x109
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0xb3
+	.uleb128 0x35
+	.4byte	.LASF427
+	.byte	0x5
+	.byte	0x30
+	.4byte	0x59
+	.8byte	.LFB272
+	.8byte	.LFE272-.LFB272
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x1f56
+	.uleb128 0x31
+	.4byte	.LASF408
+	.byte	0x5
+	.byte	0x30
+	.4byte	0x109
+	.4byte	.LLST43
+	.uleb128 0x31
+	.4byte	.LASF374
+	.byte	0x5
+	.byte	0x30
+	.4byte	0x109
+	.4byte	.LLST44
+	.uleb128 0x37
+	.4byte	.LASF267
+	.byte	0x5
+	.byte	0x35
+	.4byte	0x109
+	.4byte	.LLST45
+	.uleb128 0x37
+	.4byte	.LASF428
+	.byte	0x5
+	.byte	0x35
+	.4byte	0x109
+	.4byte	.LLST46
+	.uleb128 0x48
+	.4byte	.LASF429
+	.byte	0x5
+	.byte	0x36
+	.4byte	0x59
+	.uleb128 0x2a
+	.4byte	.LASF430
+	.byte	0x5
+	.byte	0x37
+	.4byte	0x1f56
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -32
+	.uleb128 0x32
+	.string	"col"
+	.byte	0x5
+	.byte	0x39
+	.4byte	0xa8
+	.4byte	.LLST47
+	.uleb128 0x37
+	.4byte	.LASF431
+	.byte	0x5
+	.byte	0x39
+	.4byte	0xa8
+	.4byte	.LLST48
+	.uleb128 0x37
+	.4byte	.LASF413
+	.byte	0x5
+	.byte	0x3a
+	.4byte	0x109
+	.4byte	.LLST49
+	.uleb128 0x49
+	.4byte	.LASF473
+	.byte	0x5
+	.byte	0x62
+	.8byte	.L75
+	.uleb128 0x3c
+	.4byte	0x1f66
+	.8byte	.LBB35
+	.4byte	.Ldebug_ranges0+0x90
+	.byte	0x5
+	.byte	0x3d
+	.4byte	0x1e14
+	.uleb128 0x3e
+	.4byte	.Ldebug_ranges0+0x90
+	.uleb128 0x3f
+	.4byte	0x1f76
+	.4byte	.LLST50
+	.uleb128 0x40
+	.4byte	0x1f81
+	.uleb128 0x40
+	.4byte	0x1f8c
+	.uleb128 0x40
+	.4byte	0x1f96
+	.uleb128 0x4a
+	.8byte	.LBB37
+	.8byte	.LBE37-.LBB37
+	.uleb128 0x3f
+	.4byte	0x1fa2
+	.4byte	.LLST51
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL123
+	.4byte	0x2896
+	.4byte	0x1e40
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 144
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR1
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL124
+	.4byte	0x2873
+	.4byte	0x1e5f
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC18
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL127
+	.4byte	0x1947
+	.4byte	0x1e78
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 144
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL128
+	.4byte	0x287e
+	.4byte	0x1e9d
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 144
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL133
+	.4byte	0x287e
+	.4byte	0x1ec2
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 144
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL134
+	.4byte	0x17b3
+	.4byte	0x1ef8
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 144
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x8
+	.byte	0x84
+	.sleb128 0
+	.byte	0x86
+	.sleb128 0
+	.byte	0x22
+	.byte	0x87
+	.sleb128 0
+	.byte	0x22
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL139
+	.4byte	0x287e
+	.4byte	0x1f29
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0xe
+	.byte	0x85
+	.sleb128 0
+	.byte	0xc
+	.4byte	0xffffffff
+	.byte	0x1a
+	.byte	0x84
+	.sleb128 0
+	.byte	0x22
+	.byte	0x87
+	.sleb128 0
+	.byte	0x22
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 144
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.byte	0
+	.uleb128 0x33
+	.8byte	.LVL140
+	.4byte	0x17b3
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 144
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0xb
+	.4byte	0xa8
+	.4byte	0x1f66
+	.uleb128 0xc
+	.4byte	0xce
+	.byte	0x7
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF432
+	.byte	0x5
+	.byte	0xc
+	.4byte	0x59
+	.byte	0x1
+	.4byte	0x1faf
+	.uleb128 0x48
+	.4byte	.LASF433
+	.byte	0x5
+	.byte	0xe
+	.4byte	0xa8
+	.uleb128 0x47
+	.string	"col"
+	.byte	0x5
+	.byte	0xf
+	.4byte	0xa8
+	.uleb128 0x47
+	.string	"bw"
+	.byte	0x5
+	.byte	0xf
+	.4byte	0xa8
+	.uleb128 0x48
+	.4byte	.LASF429
+	.byte	0x5
+	.byte	0x10
+	.4byte	0x59
+	.uleb128 0x4b
+	.uleb128 0x47
+	.string	"__v"
+	.byte	0x5
+	.byte	0x23
+	.4byte	0xa8
+	.byte	0
+	.byte	0
+	.uleb128 0x4c
+	.4byte	.LASF444
+	.byte	0x1
+	.byte	0xbc
+	.4byte	0x59
+	.8byte	.LFB259
+	.8byte	.LFE259-.LFB259
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2425
+	.uleb128 0x31
+	.4byte	.LASF434
+	.byte	0x1
+	.byte	0xbc
+	.4byte	0x2425
+	.4byte	.LLST52
+	.uleb128 0x31
+	.4byte	.LASF435
+	.byte	0x1
+	.byte	0xbc
+	.4byte	0x59
+	.4byte	.LLST53
+	.uleb128 0x31
+	.4byte	.LASF436
+	.byte	0x1
+	.byte	0xbc
+	.4byte	0x59
+	.4byte	.LLST54
+	.uleb128 0x31
+	.4byte	.LASF437
+	.byte	0x1
+	.byte	0xbd
+	.4byte	0x651
+	.4byte	.LLST55
+	.uleb128 0x32
+	.string	"i"
+	.byte	0x1
+	.byte	0xbf
+	.4byte	0x59
+	.4byte	.LLST56
+	.uleb128 0x37
+	.4byte	.LASF438
+	.byte	0x1
+	.byte	0xc0
+	.4byte	0x59
+	.4byte	.LLST57
+	.uleb128 0x37
+	.4byte	.LASF439
+	.byte	0x1
+	.byte	0xc0
+	.4byte	0x59
+	.4byte	.LLST58
+	.uleb128 0x3a
+	.string	"arg"
+	.byte	0x1
+	.byte	0xc1
+	.4byte	0x242b
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -40
+	.uleb128 0x2a
+	.4byte	.LASF408
+	.byte	0x1
+	.byte	0xc2
+	.4byte	0x243b
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -104
+	.uleb128 0x2a
+	.4byte	.LASF374
+	.byte	0x1
+	.byte	0xc3
+	.4byte	0x243b
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -72
+	.uleb128 0x37
+	.4byte	.LASF440
+	.byte	0x1
+	.byte	0xc4
+	.4byte	0xa8
+	.4byte	.LLST59
+	.uleb128 0x37
+	.4byte	.LASF441
+	.byte	0x1
+	.byte	0xc5
+	.4byte	0xa8
+	.4byte	.LLST60
+	.uleb128 0x32
+	.string	"ret"
+	.byte	0x1
+	.byte	0xc6
+	.4byte	0x59
+	.4byte	.LLST61
+	.uleb128 0x37
+	.4byte	.LASF442
+	.byte	0x1
+	.byte	0xc7
+	.4byte	0x59
+	.4byte	.LLST62
+	.uleb128 0x48
+	.4byte	.LASF443
+	.byte	0x1
+	.byte	0xc8
+	.4byte	0xa8
+	.uleb128 0x3c
+	.4byte	0x2595
+	.8byte	.LBB46
+	.4byte	.Ldebug_ranges0+0xd0
+	.byte	0x1
+	.byte	0xcb
+	.4byte	0x213e
+	.uleb128 0x3d
+	.4byte	0x25ac
+	.4byte	.LLST63
+	.uleb128 0x3d
+	.4byte	0x25a1
+	.4byte	.LLST64
+	.uleb128 0x3e
+	.4byte	.Ldebug_ranges0+0xd0
+	.uleb128 0x3f
+	.4byte	0x25b7
+	.4byte	.LLST65
+	.uleb128 0x3f
+	.4byte	0x25c0
+	.4byte	.LLST66
+	.uleb128 0x41
+	.8byte	.LVL151
+	.4byte	0x2873
+	.4byte	0x2109
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC19
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL152
+	.4byte	0x2873
+	.4byte	0x2128
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC20
+	.byte	0
+	.uleb128 0x33
+	.8byte	.LVL161
+	.4byte	0x2873
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x4d
+	.4byte	0x2544
+	.8byte	.LBB60
+	.4byte	.Ldebug_ranges0+0x150
+	.byte	0x1
+	.2byte	0x152
+	.4byte	0x219e
+	.uleb128 0x43
+	.4byte	0x256a
+	.uleb128 0x43
+	.4byte	0x255f
+	.uleb128 0x43
+	.4byte	0x2554
+	.uleb128 0x3e
+	.4byte	.Ldebug_ranges0+0x150
+	.uleb128 0x3f
+	.4byte	0x2575
+	.4byte	.LLST67
+	.uleb128 0x40
+	.4byte	0x257e
+	.uleb128 0x3f
+	.4byte	0x2589
+	.4byte	.LLST68
+	.uleb128 0x33
+	.8byte	.LVL202
+	.4byte	0x2873
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC29
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL155
+	.4byte	0x289f
+	.4byte	0x21bc
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x8
+	.byte	0x89
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x8c
+	.sleb128 0
+	.byte	0x22
+	.byte	0x6
+	.byte	0
+	.uleb128 0x3b
+	.8byte	.LVL165
+	.4byte	0x2873
+	.uleb128 0x41
+	.8byte	.LVL167
+	.4byte	0x28aa
+	.4byte	0x21ec
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x8
+	.byte	0x8f
+	.sleb128 0
+	.byte	0x8c
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x110
+	.byte	0
+	.uleb128 0x3b
+	.8byte	.LVL172
+	.4byte	0x244b
+	.uleb128 0x3b
+	.8byte	.LVL175
+	.4byte	0x244b
+	.uleb128 0x41
+	.8byte	.LVL176
+	.4byte	0x2873
+	.4byte	0x222a
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC26
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x3a
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL180
+	.4byte	0x2873
+	.4byte	0x224a
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x8f
+	.sleb128 192
+	.byte	0x6
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL181
+	.4byte	0x2873
+	.4byte	0x2274
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8c
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL182
+	.4byte	0x19a9
+	.4byte	0x2292
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL185
+	.4byte	0x25cc
+	.4byte	0x22b0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL187
+	.4byte	0x1d11
+	.4byte	0x22ce
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL210
+	.4byte	0x2873
+	.4byte	0x22ec
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.byte	0
+	.uleb128 0x3b
+	.8byte	.LVL215
+	.4byte	0x19a9
+	.uleb128 0x3b
+	.8byte	.LVL217
+	.4byte	0x28b5
+	.uleb128 0x3b
+	.8byte	.LVL222
+	.4byte	0x25cc
+	.uleb128 0x3b
+	.8byte	.LVL223
+	.4byte	0x1d11
+	.uleb128 0x41
+	.8byte	.LVL228
+	.4byte	0x2873
+	.4byte	0x2345
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC24
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL229
+	.4byte	0x2873
+	.4byte	0x2364
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC25
+	.byte	0
+	.uleb128 0x3b
+	.8byte	.LVL230
+	.4byte	0x244b
+	.uleb128 0x41
+	.8byte	.LVL231
+	.4byte	0x2873
+	.4byte	0x2390
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC32
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL233
+	.4byte	0x19a9
+	.4byte	0x23ae
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL236
+	.4byte	0x25cc
+	.4byte	0x23cc
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL239
+	.4byte	0x1d11
+	.4byte	0x23ea
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x3b
+	.8byte	.LVL241
+	.4byte	0x28b5
+	.uleb128 0x33
+	.8byte	.LVL247
+	.4byte	0x2873
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC31
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0xe
+	.byte	0x83
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x9
+	.byte	0xe5
+	.byte	0x24
+	.byte	0x9
+	.byte	0xe5
+	.byte	0x26
+	.byte	0x88
+	.sleb128 0
+	.byte	0x22
+	.byte	0x6
+	.byte	0
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x68c
+	.uleb128 0xb
+	.4byte	0x109
+	.4byte	0x243b
+	.uleb128 0xc
+	.4byte	0xce
+	.byte	0x4
+	.byte	0
+	.uleb128 0xb
+	.4byte	0x109
+	.4byte	0x244b
+	.uleb128 0xc
+	.4byte	0xce
+	.byte	0x3
+	.byte	0
+	.uleb128 0x4c
+	.4byte	.LASF445
+	.byte	0x1
+	.byte	0xa4
+	.4byte	0x59
+	.8byte	.LFB258
+	.8byte	.LFE258-.LFB258
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x24f6
+	.uleb128 0x36
+	.string	"uv"
+	.byte	0x1
+	.byte	0xa4
+	.4byte	0x59
+	.4byte	.LLST0
+	.uleb128 0x3a
+	.string	"dev"
+	.byte	0x1
+	.byte	0xa6
+	.4byte	0x26d
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -8
+	.uleb128 0x32
+	.string	"ret"
+	.byte	0x1
+	.byte	0xa7
+	.4byte	0x59
+	.4byte	.LLST1
+	.uleb128 0x41
+	.8byte	.LVL2
+	.4byte	0x28c0
+	.4byte	0x24bc
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8f
+	.sleb128 56
+	.byte	0
+	.uleb128 0x3b
+	.8byte	.LVL5
+	.4byte	0x2873
+	.uleb128 0x41
+	.8byte	.LVL9
+	.4byte	0x28cc
+	.4byte	0x24e1
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x33
+	.8byte	.LVL12
+	.4byte	0x28d8
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
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+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF446
+	.byte	0x1
+	.byte	0x92
+	.4byte	0x59
+	.byte	0x1
+	.4byte	0x2512
+	.uleb128 0x46
+	.4byte	.LASF447
+	.byte	0x1
+	.byte	0x92
+	.4byte	0x109
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF448
+	.byte	0x1
+	.byte	0x67
+	.4byte	0x59
+	.byte	0x1
+	.4byte	0x2544
+	.uleb128 0x46
+	.4byte	.LASF449
+	.byte	0x1
+	.byte	0x67
+	.4byte	0xa8
+	.uleb128 0x46
+	.4byte	.LASF450
+	.byte	0x1
+	.byte	0x67
+	.4byte	0xa8
+	.uleb128 0x46
+	.4byte	.LASF451
+	.byte	0x1
+	.byte	0x67
+	.4byte	0x109
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF452
+	.byte	0x1
+	.byte	0x49
+	.4byte	0x59
+	.byte	0x1
+	.4byte	0x2595
+	.uleb128 0x4e
+	.string	"arg"
+	.byte	0x1
+	.byte	0x49
+	.4byte	0x18b3
+	.uleb128 0x46
+	.4byte	.LASF408
+	.byte	0x1
+	.byte	0x49
+	.4byte	0x18b3
+	.uleb128 0x46
+	.4byte	.LASF374
+	.byte	0x1
+	.byte	0x49
+	.4byte	0x18b3
+	.uleb128 0x47
+	.string	"i"
+	.byte	0x1
+	.byte	0x4b
+	.4byte	0xa8
+	.uleb128 0x48
+	.4byte	.LASF453
+	.byte	0x1
+	.byte	0x4b
+	.4byte	0xa8
+	.uleb128 0x48
+	.4byte	.LASF454
+	.byte	0x1
+	.byte	0x4c
+	.4byte	0xa8
+	.byte	0
+	.uleb128 0x4f
+	.4byte	.LASF474
+	.byte	0x1
+	.byte	0x2d
+	.byte	0x1
+	.4byte	0x25cc
+	.uleb128 0x46
+	.4byte	.LASF408
+	.byte	0x1
+	.byte	0x2d
+	.4byte	0x18b3
+	.uleb128 0x46
+	.4byte	.LASF374
+	.byte	0x1
+	.byte	0x2d
+	.4byte	0x18b3
+	.uleb128 0x47
+	.string	"i"
+	.byte	0x1
+	.byte	0x2f
+	.4byte	0xa8
+	.uleb128 0x48
+	.4byte	.LASF453
+	.byte	0x1
+	.byte	0x2f
+	.4byte	0xa8
+	.byte	0
+	.uleb128 0x35
+	.4byte	.LASF455
+	.byte	0x4
+	.byte	0x2d
+	.4byte	0x59
+	.8byte	.LFB201
+	.8byte	.LFE201-.LFB201
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x285e
+	.uleb128 0x31
+	.4byte	.LASF408
+	.byte	0x4
+	.byte	0x2d
+	.4byte	0x109
+	.4byte	.LLST36
+	.uleb128 0x31
+	.4byte	.LASF374
+	.byte	0x4
+	.byte	0x2d
+	.4byte	0x109
+	.4byte	.LLST37
+	.uleb128 0x37
+	.4byte	.LASF456
+	.byte	0x4
+	.byte	0x2f
+	.4byte	0xa8
+	.4byte	.LLST38
+	.uleb128 0x32
+	.string	"i"
+	.byte	0x4
+	.byte	0x2f
+	.4byte	0xa8
+	.4byte	.LLST39
+	.uleb128 0x32
+	.string	"j"
+	.byte	0x4
+	.byte	0x2f
+	.4byte	0xa8
+	.4byte	.LLST40
+	.uleb128 0x32
+	.string	"q"
+	.byte	0x4
+	.byte	0x2f
+	.4byte	0xa8
+	.4byte	.LLST41
+	.uleb128 0x3a
+	.string	"buf"
+	.byte	0x4
+	.byte	0x30
+	.4byte	0x1f56
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -32
+	.uleb128 0x32
+	.string	"p"
+	.byte	0x4
+	.byte	0x31
+	.4byte	0x1359
+	.4byte	.LLST42
+	.uleb128 0x50
+	.4byte	.LASF457
+	.4byte	0x286e
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC41
+	.uleb128 0x41
+	.8byte	.LVL88
+	.4byte	0x2873
+	.4byte	0x268e
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC13
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL90
+	.4byte	0x2873
+	.4byte	0x26ae
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x8f
+	.sleb128 224
+	.byte	0x6
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL93
+	.4byte	0x2873
+	.4byte	0x26cc
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8c
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL96
+	.4byte	0x1947
+	.4byte	0x26e4
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL97
+	.4byte	0x1947
+	.4byte	0x26fe
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x8f
+	.sleb128 216
+	.byte	0x6
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL98
+	.4byte	0x18bf
+	.4byte	0x2728
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x72
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL99
+	.4byte	0x17b3
+	.4byte	0x2757
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL105
+	.4byte	0x2873
+	.4byte	0x2776
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC16
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL106
+	.4byte	0x28e3
+	.4byte	0x278e
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x80
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL109
+	.4byte	0x2873
+	.4byte	0x27b3
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC17
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x80
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL112
+	.4byte	0x2873
+	.4byte	0x27d1
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL113
+	.4byte	0x2873
+	.4byte	0x27ef
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL115
+	.4byte	0x1947
+	.4byte	0x2807
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8c
+	.sleb128 0
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL116
+	.4byte	0x18bf
+	.4byte	0x2831
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x80
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x72
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.byte	0
+	.uleb128 0x33
+	.8byte	.LVL117
+	.4byte	0x17b3
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x80
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0xb
+	.4byte	0xe7
+	.4byte	0x286e
+	.uleb128 0xc
+	.4byte	0xce
+	.byte	0x9
+	.byte	0
+	.uleb128 0x8
+	.4byte	0x285e
+	.uleb128 0x51
+	.4byte	.LASF458
+	.4byte	.LASF458
+	.byte	0x23
+	.byte	0x12
+	.uleb128 0x52
+	.4byte	.LASF459
+	.4byte	.LASF459
+	.byte	0x1d
+	.2byte	0x16d
+	.uleb128 0x52
+	.4byte	.LASF460
+	.4byte	.LASF460
+	.byte	0x1d
+	.2byte	0x16c
+	.uleb128 0x53
+	.4byte	.LASF459
+	.4byte	.LASF459
+	.uleb128 0x51
+	.4byte	.LASF461
+	.4byte	.LASF461
+	.byte	0xa
+	.byte	0x2d
+	.uleb128 0x51
+	.4byte	.LASF462
+	.4byte	.LASF462
+	.byte	0x24
+	.byte	0x29
+	.uleb128 0x51
+	.4byte	.LASF463
+	.4byte	.LASF463
+	.byte	0x21
+	.byte	0x11
+	.uleb128 0x52
+	.4byte	.LASF464
+	.4byte	.LASF464
+	.byte	0x25
+	.2byte	0x1da
+	.uleb128 0x52
+	.4byte	.LASF465
+	.4byte	.LASF465
+	.byte	0x25
+	.2byte	0x116
+	.uleb128 0x51
+	.4byte	.LASF466
+	.4byte	.LASF466
+	.byte	0x26
+	.byte	0xb
+	.uleb128 0x52
+	.4byte	.LASF467
+	.4byte	.LASF467
+	.byte	0x1d
+	.2byte	0x398
+	.byte	0
+	.section	.debug_abbrev,"",@progbits
+.Ldebug_abbrev0:
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+	.uleb128 0x11
+	.byte	0x1
+	.uleb128 0x25
+	.uleb128 0xe
+	.uleb128 0x13
+	.uleb128 0xb
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x1b
+	.uleb128 0xe
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x10
+	.uleb128 0x17
+	.byte	0
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+	.uleb128 0x2
+	.uleb128 0x16
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+	.uleb128 0x3
+	.uleb128 0xe
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+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
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+	.uleb128 0x3
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+	.uleb128 0x3e
+	.uleb128 0xb
+	.uleb128 0x3
+	.uleb128 0xe
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+	.uleb128 0xe
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+	.uleb128 0x2f
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+	.uleb128 0xd
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+	.uleb128 0x3a
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+	.uleb128 0x3
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+	.uleb128 0x3f
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+	.uleb128 0x3c
+	.uleb128 0x19
+	.byte	0
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+	.uleb128 0x1a
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0xb
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+	.uleb128 0x3a
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+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x1b
+	.uleb128 0x4
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+	.uleb128 0x3
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+	.uleb128 0x3a
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+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
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+	.uleb128 0x1c
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+	.uleb128 0xe
+	.uleb128 0x1c
+	.uleb128 0xb
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+	.uleb128 0x1d
+	.uleb128 0x28
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+	.uleb128 0xe
+	.uleb128 0x1c
+	.uleb128 0xd
+	.byte	0
+	.byte	0
+	.uleb128 0x1e
+	.uleb128 0x13
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+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0xb
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+	.uleb128 0x3a
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+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x1
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+	.uleb128 0x1f
+	.uleb128 0xd
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+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0xb
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+	.uleb128 0x16
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+	.uleb128 0x3
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+	.uleb128 0xd
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+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
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+	.uleb128 0x38
+	.uleb128 0xb
+	.byte	0
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+	.uleb128 0x22
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0xb
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+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x23
+	.uleb128 0xd
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+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
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+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0x5
+	.byte	0
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+	.uleb128 0x24
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0x5
+	.byte	0
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+	.uleb128 0x25
+	.uleb128 0x4
+	.byte	0x1
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
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+	.byte	0
+	.uleb128 0x26
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0xb
+	.uleb128 0x5
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x27
+	.uleb128 0x13
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3c
+	.uleb128 0x19
+	.byte	0
+	.byte	0
+	.uleb128 0x28
+	.uleb128 0x15
+	.byte	0x1
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x29
+	.uleb128 0x4
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
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+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x2a
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x2b
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x2c
+	.uleb128 0x17
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x2d
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x2e
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x2f
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x30
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
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+	.byte	0
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
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+	.uleb128 0x32
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x33
+	.uleb128 0x4109
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x34
+	.uleb128 0x410a
+	.byte	0
+	.uleb128 0x2
+	.uleb128 0x18
+	.uleb128 0x2111
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x35
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x36
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x37
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
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+	.uleb128 0x38
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
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+	.uleb128 0x39
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
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+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
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+	.uleb128 0x3a
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x3b
+	.uleb128 0x4109
+	.byte	0
+	.uleb128 0x11
+	.uleb128 0x1
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+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x3c
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x52
+	.uleb128 0x1
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+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0xb
+	.uleb128 0x1
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+	.byte	0
+	.byte	0
+	.uleb128 0x3d
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x3e
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x55
+	.uleb128 0x17
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+	.uleb128 0x3f
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x40
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+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
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+	.uleb128 0x41
+	.uleb128 0x4109
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
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+	.uleb128 0x13
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
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+	.uleb128 0x42
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x52
+	.uleb128 0x1
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+	.uleb128 0x17
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x43
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
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+	.uleb128 0x44
+	.uleb128 0x34
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+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x20
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x47
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x48
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0xa
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x11
+	.uleb128 0x1
+	.byte	0
+	.byte	0
+	.uleb128 0x4a
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.byte	0
+	.byte	0
+	.uleb128 0x4b
+	.uleb128 0xb
+	.byte	0x1
+	.byte	0
+	.byte	0
+	.uleb128 0x4c
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x4d
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x52
+	.uleb128 0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0x5
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x4e
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x4f
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x20
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x50
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x34
+	.uleb128 0x19
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x51
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x52
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x53
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
+	.uleb128 0x3
+	.uleb128 0xe
+	.byte	0
+	.byte	0
+	.byte	0
+	.section	.debug_loc,"",@progbits
+.Ldebug_loc0:
+.LLST69:
+	.8byte	.LVL248
+	.8byte	.LVL250
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL250
+	.8byte	.LVL251
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL251
+	.8byte	.LVL252
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL252
+	.8byte	.LFE279
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST70:
+	.8byte	.LVL248
+	.8byte	.LVL250
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL250
+	.8byte	.LFE279
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST71:
+	.8byte	.LVL249
+	.8byte	.LVL250
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL250
+	.8byte	.LVL251
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL251
+	.8byte	.LVL252
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL252
+	.8byte	.LFE279
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST72:
+	.8byte	.LVL249
+	.8byte	.LVL250
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL250
+	.8byte	.LVL251
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL251
+	.8byte	.LVL252
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL252
+	.8byte	.LVL253
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL253
+	.8byte	.LVL254
+	.2byte	0x3
+	.byte	0x83
+	.sleb128 -4
+	.byte	0x9f
+	.8byte	.LVL254
+	.8byte	.LFE279
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST23:
+	.8byte	.LVL70
+	.8byte	.LVL78
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL78
+	.8byte	.LVL82
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL82
+	.8byte	.LFE278
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST24:
+	.8byte	.LVL70
+	.8byte	.LVL71
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL71
+	.8byte	.LVL73
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL73
+	.8byte	.LVL79
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL79
+	.8byte	.LVL82
+	.2byte	0x8
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x33
+	.byte	0x25
+	.byte	0x31
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	.LVL82
+	.8byte	.LFE278
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST25:
+	.8byte	.LVL70
+	.8byte	.LVL74
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL74
+	.8byte	.LVL80-1
+	.2byte	0x1
+	.byte	0x58
+	.8byte	.LVL80-1
+	.8byte	.LVL82
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	.LVL82
+	.8byte	.LFE278
+	.2byte	0x1
+	.byte	0x58
+	.8byte	0
+	.8byte	0
+.LLST26:
+	.8byte	.LVL70
+	.8byte	.LVL72
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL72
+	.8byte	.LFE278
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST27:
+	.8byte	.LVL70
+	.8byte	.LVL75
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL75
+	.8byte	.LVL80-1
+	.2byte	0x1
+	.byte	0x5a
+	.8byte	.LVL80-1
+	.8byte	.LVL82
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x54
+	.byte	0x9f
+	.8byte	.LVL82
+	.8byte	.LFE278
+	.2byte	0x1
+	.byte	0x5a
+	.8byte	0
+	.8byte	0
+.LLST28:
+	.8byte	.LVL73
+	.8byte	.LVL78
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL78
+	.8byte	.LVL82
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL82
+	.8byte	.LFE278
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST29:
+	.8byte	.LVL73
+	.8byte	.LVL74
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL74
+	.8byte	.LVL80-1
+	.2byte	0x1
+	.byte	0x58
+	.8byte	.LVL80-1
+	.8byte	.LVL82
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	.LVL82
+	.8byte	.LFE278
+	.2byte	0x1
+	.byte	0x58
+	.8byte	0
+	.8byte	0
+.LLST30:
+	.8byte	.LVL73
+	.8byte	.LVL75
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL75
+	.8byte	.LVL80-1
+	.2byte	0x1
+	.byte	0x57
+	.8byte	.LVL82
+	.8byte	.LVL84
+	.2byte	0x1
+	.byte	0x57
+	.8byte	.LVL84
+	.8byte	.LVL85
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL85
+	.8byte	.LFE278
+	.2byte	0x1
+	.byte	0x57
+	.8byte	0
+	.8byte	0
+.LLST31:
+	.8byte	.LVL73
+	.8byte	.LVL75
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL75
+	.8byte	.LVL80-1
+	.2byte	0x1
+	.byte	0x56
+	.8byte	.LVL82
+	.8byte	.LFE278
+	.2byte	0x1
+	.byte	0x56
+	.8byte	0
+	.8byte	0
+.LLST32:
+	.8byte	.LVL73
+	.8byte	.LVL75
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL75
+	.8byte	.LVL80-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL82
+	.8byte	.LFE278
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST33:
+	.8byte	.LVL73
+	.8byte	.LVL77
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL77
+	.8byte	.LVL80-1
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL82
+	.8byte	.LFE278
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST34:
+	.8byte	.LVL73
+	.8byte	.LVL77
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL77
+	.8byte	.LVL80-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL82
+	.8byte	.LFE278
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST35:
+	.8byte	.LVL73
+	.8byte	.LVL77
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL77
+	.8byte	.LVL81
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL81
+	.8byte	.LVL82
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL82
+	.8byte	.LFE278
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST19:
+	.8byte	.LVL62
+	.8byte	.LVL63
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL63
+	.8byte	.LVL65
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL65
+	.8byte	.LFE277
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST20:
+	.8byte	.LVL62
+	.8byte	.LVL64
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL64
+	.8byte	.LFE277
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST21:
+	.8byte	.LVL65
+	.8byte	.LVL66
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL66
+	.8byte	.LFE277
+	.2byte	0x1
+	.byte	0x55
+	.8byte	0
+	.8byte	0
+.LLST22:
+	.8byte	.LVL65
+	.8byte	.LVL66
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL66
+	.8byte	.LFE277
+	.2byte	0x1
+	.byte	0x54
+	.8byte	0
+	.8byte	0
+.LLST16:
+	.8byte	.LVL56
+	.8byte	.LVL58-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL58-1
+	.8byte	.LVL59
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL59
+	.8byte	.LFE276
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST17:
+	.8byte	.LVL56
+	.8byte	.LVL58-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL58-1
+	.8byte	.LVL59
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL59
+	.8byte	.LFE276
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST18:
+	.8byte	.LVL56
+	.8byte	.LVL57
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL57
+	.8byte	.LVL58-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL59
+	.8byte	.LVL60
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL60
+	.8byte	.LVL61
+	.2byte	0x3
+	.byte	0x72
+	.sleb128 1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST2:
+	.8byte	.LVL13
+	.8byte	.LVL17-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL17-1
+	.8byte	.LVL31
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL31
+	.8byte	.LVL33
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL33
+	.8byte	.LFE275
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST3:
+	.8byte	.LVL13
+	.8byte	.LVL16
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL16
+	.8byte	.LVL17-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL17-1
+	.8byte	.LVL32
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL32
+	.8byte	.LVL33
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL33
+	.8byte	.LFE275
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST4:
+	.8byte	.LVL15
+	.8byte	.LVL16
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL16
+	.8byte	.LVL17-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL17-1
+	.8byte	.LVL30
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL33
+	.8byte	.LFE275
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST5:
+	.8byte	.LVL14
+	.8byte	.LVL17-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL17-1
+	.8byte	.LVL30
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL33
+	.8byte	.LFE275
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST6:
+	.8byte	.LVL19
+	.8byte	.LVL20
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL20
+	.8byte	.LVL23-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL26
+	.8byte	.LVL28
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL33
+	.8byte	.LVL35
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST7:
+	.8byte	.LVL17
+	.8byte	.LVL18
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL18
+	.8byte	.LVL22
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL22
+	.8byte	.LVL25
+	.2byte	0x3
+	.byte	0x8c
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL25
+	.8byte	.LVL30
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL33
+	.8byte	.LVL37
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	0
+	.8byte	0
+.LLST8:
+	.8byte	.LVL17
+	.8byte	.LVL18
+	.2byte	0x6
+	.byte	0x9e
+	.uleb128 0x4
+	.4byte	0x80808080
+	.8byte	.LVL18
+	.8byte	.LVL30
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL33
+	.8byte	.LVL38
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST9:
+	.8byte	.LVL17
+	.8byte	.LVL18
+	.2byte	0x6
+	.byte	0xc
+	.4byte	0x40404040
+	.byte	0x9f
+	.8byte	.LVL18
+	.8byte	.LVL30
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL33
+	.8byte	.LVL36
+	.2byte	0x1
+	.byte	0x69
+	.8byte	0
+	.8byte	0
+.LLST10:
+	.8byte	.LVL15
+	.8byte	.LVL18
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST11:
+	.8byte	.LVL17
+	.8byte	.LVL31
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL31
+	.8byte	.LVL33
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL33
+	.8byte	.LFE275
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST12:
+	.8byte	.LVL15
+	.8byte	.LVL21
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL25
+	.8byte	.LVL27
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL27
+	.8byte	.LVL30
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL33
+	.8byte	.LFE275
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST13:
+	.8byte	.LVL41
+	.8byte	.LVL42
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL42
+	.8byte	.LVL44
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL47
+	.8byte	.LVL51
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL54
+	.8byte	.LFE275
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST14:
+	.8byte	.LVL38
+	.8byte	.LVL45
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL45
+	.8byte	.LVL46
+	.2byte	0x3
+	.byte	0x83
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL46
+	.8byte	.LFE275
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST15:
+	.8byte	.LVL38
+	.8byte	.LVL43
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL46
+	.8byte	.LVL49
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL49
+	.8byte	.LVL54
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL54
+	.8byte	.LFE275
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST43:
+	.8byte	.LVL120
+	.8byte	.LVL122
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL122
+	.8byte	.LVL142
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL142
+	.8byte	.LFE272
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST44:
+	.8byte	.LVL120
+	.8byte	.LVL121
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL121
+	.8byte	.LVL130
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL130
+	.8byte	.LVL131
+	.2byte	0x3
+	.byte	0x83
+	.sleb128 32
+	.byte	0x9f
+	.8byte	.LVL131
+	.8byte	.LFE272
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST45:
+	.8byte	.LVL128
+	.8byte	.LVL132
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL132
+	.8byte	.LVL135
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST46:
+	.8byte	.LVL135
+	.8byte	.LVL141
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST47:
+	.8byte	.LVL128
+	.8byte	.LVL132
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL132
+	.8byte	.LVL136
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL136
+	.8byte	.LVL137
+	.2byte	0x3
+	.byte	0x85
+	.sleb128 -8
+	.byte	0x9f
+	.8byte	.LVL137
+	.8byte	.LVL141
+	.2byte	0x3
+	.byte	0x86
+	.sleb128 -40
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST48:
+	.8byte	.LVL137
+	.8byte	.LVL141
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST49:
+	.8byte	.LVL123
+	.8byte	.LVL134
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL134
+	.8byte	.LVL138
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL140
+	.8byte	.LFE272
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST50:
+	.8byte	.LVL126
+	.8byte	.LVL129
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST51:
+	.8byte	.LVL125
+	.8byte	.LVL126
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST52:
+	.8byte	.LVL143
+	.8byte	.LVL144
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL144
+	.8byte	.LFE259
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST53:
+	.8byte	.LVL143
+	.8byte	.LVL146
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL146
+	.8byte	.LFE259
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST54:
+	.8byte	.LVL143
+	.8byte	.LVL145
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL145
+	.8byte	.LVL164
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL164
+	.8byte	.LVL225
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	.LVL225
+	.8byte	.LVL226
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL226
+	.8byte	.LFE259
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST55:
+	.8byte	.LVL143
+	.8byte	.LVL146
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL146
+	.8byte	.LVL173
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL173
+	.8byte	.LVL174
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL174
+	.8byte	.LVL177
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL177
+	.8byte	.LVL190
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL190
+	.8byte	.LVL194
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL194
+	.8byte	.LVL198
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL198
+	.8byte	.LVL208
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL208
+	.8byte	.LVL225
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL225
+	.8byte	.LVL230
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL230
+	.8byte	.LFE259
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST56:
+	.8byte	.LVL154
+	.8byte	.LVL156
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL156
+	.8byte	.LVL157
+	.2byte	0x3
+	.byte	0x86
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL163
+	.8byte	.LVL164
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL180
+	.8byte	.LVL190
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL191
+	.8byte	.LVL192
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL192
+	.8byte	.LVL193
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL193
+	.8byte	.LVL194
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL194
+	.8byte	.LVL198
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL210
+	.8byte	.LVL211
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL214
+	.8byte	.LVL218
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL221
+	.8byte	.LVL225
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL225
+	.8byte	.LVL227
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL232
+	.8byte	.LVL242
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL242
+	.8byte	.LVL243
+	.2byte	0x3
+	.byte	0x89
+	.sleb128 1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST57:
+	.8byte	.LVL163
+	.8byte	.LVL164
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL166
+	.8byte	.LVL178
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL190
+	.8byte	.LVL194
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL198
+	.8byte	.LVL219
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL219
+	.8byte	.LVL220
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL220
+	.8byte	.LVL230
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST58:
+	.8byte	.LVL183
+	.8byte	.LVL185
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL185
+	.8byte	.LVL188
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL188
+	.8byte	.LVL190
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL194
+	.8byte	.LVL195
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL195
+	.8byte	.LVL197
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL197
+	.8byte	.LVL198
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL216
+	.8byte	.LVL219
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL219
+	.8byte	.LVL221
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL224
+	.8byte	.LVL225
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL232
+	.8byte	.LVL234
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL234
+	.8byte	.LVL237
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL237
+	.8byte	.LVL240
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL240
+	.8byte	.LVL242
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST59:
+	.8byte	.LVL178
+	.8byte	.LVL190
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL194
+	.8byte	.LVL198
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL208
+	.8byte	.LVL225
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL232
+	.8byte	.LVL247
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	0
+	.8byte	0
+.LLST60:
+	.8byte	.LVL146
+	.8byte	.LVL171
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL171
+	.8byte	.LVL174
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL174
+	.8byte	.LVL202
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL202
+	.8byte	.LVL203
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL203
+	.8byte	.LVL208
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL208
+	.8byte	.LVL225
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL225
+	.8byte	.LVL230
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL232
+	.8byte	.LVL245
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST61:
+	.8byte	.LVL146
+	.8byte	.LVL183
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL183
+	.8byte	.LVL184
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL184
+	.8byte	.LVL185
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL185
+	.8byte	.LVL186
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL188
+	.8byte	.LVL189
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL189
+	.8byte	.LVL190
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL190
+	.8byte	.LVL194
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL194
+	.8byte	.LVL197
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL197
+	.8byte	.LVL198
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL198
+	.8byte	.LVL211
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL211
+	.8byte	.LVL213
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL213
+	.8byte	.LVL216
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL216
+	.8byte	.LVL217-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL217-1
+	.8byte	.LVL221
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL221
+	.8byte	.LVL224
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL224
+	.8byte	.LVL225
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL225
+	.8byte	.LVL230
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL232
+	.8byte	.LVL234
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL234
+	.8byte	.LVL235
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL235
+	.8byte	.LVL237
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL237
+	.8byte	.LVL238
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL238
+	.8byte	.LVL240
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL240
+	.8byte	.LVL241-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL241-1
+	.8byte	.LVL242
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL242
+	.8byte	.LVL244
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL244
+	.8byte	.LVL246
+	.2byte	0x1
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST62:
+	.8byte	.LVL146
+	.8byte	.LVL211
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL211
+	.8byte	.LVL212
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL213
+	.8byte	.LVL230
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL232
+	.8byte	.LVL244
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL244
+	.8byte	.LVL245
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	0
+	.8byte	0
+.LLST63:
+	.8byte	.LVL146
+	.8byte	.LVL153
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL157
+	.8byte	.LVL163
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST64:
+	.8byte	.LVL146
+	.8byte	.LVL153
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL157
+	.8byte	.LVL163
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST65:
+	.8byte	.LVL146
+	.8byte	.LVL147
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL147
+	.8byte	.LVL148
+	.2byte	0x3
+	.byte	0x70
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL149
+	.8byte	.LVL150
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL152
+	.8byte	.LVL153
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL157
+	.8byte	.LVL158
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL158
+	.8byte	.LVL159
+	.2byte	0x3
+	.byte	0x70
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL160
+	.8byte	.LVL161
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL161
+	.8byte	.LVL162
+	.2byte	0x3
+	.byte	0x86
+	.sleb128 1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST66:
+	.8byte	.LVL146
+	.8byte	.LVL153
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL157
+	.8byte	.LVL163
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST67:
+	.8byte	.LVL168
+	.8byte	.LVL169
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL169
+	.8byte	.LVL170
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL170
+	.8byte	.LVL171
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL198
+	.8byte	.LVL199
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL199
+	.8byte	.LVL200
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL200
+	.8byte	.LVL201
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL204
+	.8byte	.LVL205
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL205
+	.8byte	.LVL206
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL206
+	.8byte	.LVL207
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL207
+	.8byte	.LVL208
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST68:
+	.8byte	.LVL199
+	.8byte	.LVL202
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL203
+	.8byte	.LVL208
+	.2byte	0x1
+	.byte	0x69
+	.8byte	0
+	.8byte	0
+.LLST0:
+	.8byte	.LVL0
+	.8byte	.LVL1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1
+	.8byte	.LVL6
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL6
+	.8byte	.LVL7
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL7
+	.8byte	.LFE258
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST1:
+	.8byte	.LVL2
+	.8byte	.LVL3
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL3
+	.8byte	.LVL4
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL7
+	.8byte	.LVL8
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL10
+	.8byte	.LVL11
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL11
+	.8byte	.LFE258
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST36:
+	.8byte	.LVL86
+	.8byte	.LVL87
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL87
+	.8byte	.LVL101
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL101
+	.8byte	.LVL102
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL102
+	.8byte	.LFE201
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST37:
+	.8byte	.LVL86
+	.8byte	.LVL88-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL88-1
+	.8byte	.LVL101
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL101
+	.8byte	.LVL102
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL102
+	.8byte	.LFE201
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST38:
+	.8byte	.LVL88
+	.8byte	.LVL89
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL89
+	.8byte	.LVL100
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL102
+	.8byte	.LVL111
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL112
+	.8byte	.LFE201
+	.2byte	0x1
+	.byte	0x69
+	.8byte	0
+	.8byte	0
+.LLST39:
+	.8byte	.LVL95
+	.8byte	.LVL96
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL96
+	.8byte	.LVL97
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL97
+	.8byte	.LVL100
+	.2byte	0x2
+	.byte	0x38
+	.byte	0x9f
+	.8byte	.LVL102
+	.8byte	.LVL111
+	.2byte	0x2
+	.byte	0x38
+	.byte	0x9f
+	.8byte	.LVL113
+	.8byte	.LVL114
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST40:
+	.8byte	.LVL90
+	.8byte	.LVL91
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL91
+	.8byte	.LVL100
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL102
+	.8byte	.LVL111
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL111
+	.8byte	.LFE201
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST41:
+	.8byte	.LVL89
+	.8byte	.LVL91
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL91
+	.8byte	.LVL92
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL92
+	.8byte	.LVL93
+	.2byte	0x4
+	.byte	0x8a
+	.sleb128 0
+	.byte	0x20
+	.byte	0x9f
+	.8byte	.LVL93
+	.8byte	.LVL100
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL102
+	.8byte	.LVL110
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	0
+	.8byte	0
+.LLST42:
+	.8byte	.LVL107
+	.8byte	.LVL108
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL108
+	.8byte	.LFE201
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+	.section	.debug_aranges,"",@progbits
+	.4byte	0xac
+	.2byte	0x2
+	.4byte	.Ldebug_info0
+	.byte	0x8
+	.byte	0
+	.2byte	0
+	.2byte	0
+	.8byte	.LFB258
+	.8byte	.LFE258-.LFB258
+	.8byte	.LFB275
+	.8byte	.LFE275-.LFB275
+	.8byte	.LFB276
+	.8byte	.LFE276-.LFB276
+	.8byte	.LFB277
+	.8byte	.LFE277-.LFB277
+	.8byte	.LFB278
+	.8byte	.LFE278-.LFB278
+	.8byte	.LFB201
+	.8byte	.LFE201-.LFB201
+	.8byte	.LFB272
+	.8byte	.LFE272-.LFB272
+	.8byte	.LFB259
+	.8byte	.LFE259-.LFB259
+	.8byte	.LFB279
+	.8byte	.LFE279-.LFB279
+	.8byte	0
+	.8byte	0
+	.section	.debug_ranges,"",@progbits
+.Ldebug_ranges0:
+	.8byte	.LBB18
+	.8byte	.LBE18
+	.8byte	.LBB24
+	.8byte	.LBE24
+	.8byte	.LBB25
+	.8byte	.LBE25
+	.8byte	.LBB26
+	.8byte	.LBE26
+	.8byte	.LBB30
+	.8byte	.LBE30
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB27
+	.8byte	.LBE27
+	.8byte	.LBB31
+	.8byte	.LBE31
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB35
+	.8byte	.LBE35
+	.8byte	.LBB40
+	.8byte	.LBE40
+	.8byte	.LBB41
+	.8byte	.LBE41
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB46
+	.8byte	.LBE46
+	.8byte	.LBB54
+	.8byte	.LBE54
+	.8byte	.LBB55
+	.8byte	.LBE55
+	.8byte	.LBB56
+	.8byte	.LBE56
+	.8byte	.LBB57
+	.8byte	.LBE57
+	.8byte	.LBB58
+	.8byte	.LBE58
+	.8byte	.LBB59
+	.8byte	.LBE59
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB60
+	.8byte	.LBE60
+	.8byte	.LBB64
+	.8byte	.LBE64
+	.8byte	.LBB65
+	.8byte	.LBE65
+	.8byte	0
+	.8byte	0
+	.8byte	.LFB258
+	.8byte	.LFE258
+	.8byte	.LFB275
+	.8byte	.LFE275
+	.8byte	.LFB276
+	.8byte	.LFE276
+	.8byte	.LFB277
+	.8byte	.LFE277
+	.8byte	.LFB278
+	.8byte	.LFE278
+	.8byte	.LFB201
+	.8byte	.LFE201
+	.8byte	.LFB272
+	.8byte	.LFE272
+	.8byte	.LFB259
+	.8byte	.LFE259
+	.8byte	.LFB279
+	.8byte	.LFE279
+	.8byte	0
+	.8byte	0
+	.section	.debug_line,"",@progbits
+.Ldebug_line0:
+	.section	.debug_str,"MS",@progbits,1
+.LASF309:
+	.string	"gd_t"
+.LASF15:
+	.string	"long int"
+.LASF39:
+	.string	"uclass_node"
+.LASF286:
+	.string	"dm_root_f"
+.LASF53:
+	.string	"flash_id"
+.LASF48:
+	.string	"prev"
+.LASF360:
+	.string	"of_match"
+.LASF208:
+	.string	"UCLASS_NORTHBRIDGE"
+.LASF357:
+	.string	"mem_malloc_start"
+.LASF453:
+	.string	"max_bank"
+.LASF332:
+	.string	"net_hostname"
+.LASF237:
+	.string	"UCLASS_THERMAL"
+.LASF60:
+	.string	"base"
+.LASF353:
+	.string	"NETLOOP_RESTART"
+.LASF284:
+	.string	"new_gd"
+.LASF264:
+	.string	"pre_serial"
+.LASF191:
+	.string	"UCLASS_FIRMWARE"
+.LASF466:
+	.string	"udelay"
+.LASF151:
+	.string	"fit_noffset_fdt"
+.LASF297:
+	.string	"malloc_ptr"
+.LASF90:
+	.string	"_datarellocal_start_ofs"
+.LASF420:
+	.string	"capacity"
+.LASF155:
+	.string	"rd_start"
+.LASF413:
+	.string	"err_adr"
+.LASF373:
+	.string	"property"
+.LASF263:
+	.string	"tlb_emerg"
+.LASF78:
+	.string	"bi_enetaddr"
+.LASF287:
+	.string	"uclass_root"
+.LASF198:
+	.string	"UCLASS_IRQ"
+.LASF242:
+	.string	"UCLASS_USB_HUB"
+.LASF238:
+	.string	"UCLASS_TIMER"
+.LASF42:
+	.string	"flags"
+.LASF408:
+	.string	"start_adr"
+.LASF148:
+	.string	"fit_noffset_rd"
+.LASF266:
+	.string	"baudrate"
+.LASF334:
+	.string	"net_ethaddr"
+.LASF294:
+	.string	"timebase_l"
+.LASF21:
+	.string	"errno"
+.LASF32:
+	.string	"node"
+.LASF361:
+	.string	"bind"
+.LASF458:
+	.string	"printf"
+.LASF8:
+	.string	"unsigned int"
+.LASF80:
+	.string	"bi_intfreq"
+.LASF47:
+	.string	"next"
+.LASF109:
+	.string	"version"
+.LASF393:
+	.string	"per_device_platdata_auto_alloc_size"
+.LASF140:
+	.string	"legacy_hdr_os_copy"
+.LASF205:
+	.string	"UCLASS_MMC"
+.LASF209:
+	.string	"UCLASS_NVME"
+.LASF340:
+	.string	"net_rx_packet"
+.LASF38:
+	.string	"parent_priv"
+.LASF186:
+	.string	"UCLASS_CROS_EC"
+.LASF201:
+	.string	"UCLASS_LPC"
+.LASF57:
+	.string	"flash_info"
+.LASF113:
+	.string	"size_dt_struct"
+.LASF378:
+	.string	"p_current"
+.LASF22:
+	.string	"___strtok"
+.LASF67:
+	.string	"bi_memsize"
+.LASF416:
+	.string	"cpu_2_io"
+.LASF165:
+	.string	"bootm_headers_t"
+.LASF45:
+	.string	"udevice"
+.LASF460:
+	.string	"memset"
+.LASF85:
+	.string	"bd_t"
+.LASF407:
+	.string	"buf_len"
+.LASF270:
+	.string	"bus_clk"
+.LASF399:
+	.string	"DIAGONALSCAN"
+.LASF233:
+	.string	"UCLASS_SPI_FLASH"
+.LASF199:
+	.string	"UCLASS_KEYBOARD"
+.LASF424:
+	.string	"random_test2"
+.LASF72:
+	.string	"bi_sramsize"
+.LASF195:
+	.string	"UCLASS_I2C_MUX"
+.LASF409:
+	.string	"prt_en"
+.LASF275:
+	.string	"env_addr"
+.LASF421:
+	.string	"wr_value"
+.LASF235:
+	.string	"UCLASS_SYSCON"
+.LASF182:
+	.string	"UCLASS_BLK"
+.LASF221:
+	.string	"UCLASS_PWRSEQ"
+.LASF167:
+	.string	"command_ret_t"
+.LASF141:
+	.string	"legacy_hdr_valid"
+.LASF262:
+	.string	"tlb_fillptr"
+.LASF230:
+	.string	"UCLASS_SERIAL"
+.LASF313:
+	.string	"load_addr"
+.LASF288:
+	.string	"fdt_blob"
+.LASF328:
+	.string	"net_gateway"
+.LASF219:
+	.string	"UCLASS_PWM"
+.LASF177:
+	.string	"UCLASS_PCI_EMUL"
+.LASF190:
+	.string	"UCLASS_GPIO"
+.LASF349:
+	.string	"net_boot_file_expected_size_in_blocks"
+.LASF98:
+	.string	"complete"
+.LASF215:
+	.string	"UCLASS_PHY"
+.LASF278:
+	.string	"relocaddr"
+.LASF322:
+	.string	"send"
+.LASF3:
+	.string	"signed char"
+.LASF212:
+	.string	"UCLASS_PCH"
+.LASF108:
+	.string	"off_mem_rsvmap"
+.LASF174:
+	.string	"UCLASS_TEST_PROBE"
+.LASF465:
+	.string	"regulator_set_value"
+.LASF19:
+	.string	"uint32_t"
+.LASF382:
+	.string	"udevice_id"
+.LASF315:
+	.string	"save_size"
+.LASF291:
+	.string	"of_root"
+.LASF359:
+	.string	"mem_malloc_brk"
+.LASF152:
+	.string	"fit_hdr_setup"
+.LASF405:
+	.string	"test_pat_param"
+.LASF293:
+	.string	"timebase_h"
+.LASF171:
+	.string	"UCLASS_TEST"
+.LASF276:
+	.string	"env_valid"
+.LASF86:
+	.string	"IRQ_STACK_START"
+.LASF456:
+	.string	"shift"
+.LASF70:
+	.string	"bi_flashoffset"
+.LASF467:
+	.string	"malloc"
+.LASF210:
+	.string	"UCLASS_PANEL"
+.LASF326:
+	.string	"index"
+.LASF40:
+	.string	"child_head"
+.LASF137:
+	.string	"image_info_t"
+.LASF36:
+	.string	"uclass"
+.LASF173:
+	.string	"UCLASS_TEST_BUS"
+.LASF245:
+	.string	"UCLASS_VIDEO_CONSOLE"
+.LASF441:
+	.string	"test_banks"
+.LASF362:
+	.string	"probe"
+.LASF102:
+	.string	"CMD_RET_USAGE"
+.LASF10:
+	.string	"long long unsigned int"
+.LASF258:
+	.string	"lastinc"
+.LASF386:
+	.string	"post_bind"
+.LASF358:
+	.string	"mem_malloc_end"
+.LASF100:
+	.string	"CMD_RET_SUCCESS"
+.LASF101:
+	.string	"CMD_RET_FAILURE"
+.LASF207:
+	.string	"UCLASS_MTD"
+.LASF225:
+	.string	"UCLASS_RESET"
+.LASF126:
+	.string	"ih_type"
+.LASF183:
+	.string	"UCLASS_CLK"
+.LASF350:
+	.string	"net_ping_ip"
+.LASF79:
+	.string	"bi_ethspeed"
+.LASF197:
+	.string	"UCLASS_IDE"
+.LASF377:
+	.string	"ofnode"
+.LASF239:
+	.string	"UCLASS_TPM"
+.LASF307:
+	.string	"child"
+.LASF59:
+	.string	"lmb_property"
+.LASF260:
+	.string	"tlb_addr"
+.LASF375:
+	.string	"value"
+.LASF194:
+	.string	"UCLASS_I2C_GENERIC"
+.LASF107:
+	.string	"off_dt_strings"
+.LASF111:
+	.string	"boot_cpuid_phys"
+.LASF363:
+	.string	"remove"
+.LASF142:
+	.string	"fit_uname_cfg"
+.LASF114:
+	.string	"working_fdt"
+.LASF308:
+	.string	"sibling"
+.LASF158:
+	.string	"ft_len"
+.LASF127:
+	.string	"ih_comp"
+.LASF442:
+	.string	"abort"
+.LASF81:
+	.string	"bi_busfreq"
+.LASF211:
+	.string	"UCLASS_PANEL_BACKLIGHT"
+.LASF268:
+	.string	"global_data"
+.LASF317:
+	.string	"s_addr"
+.LASF136:
+	.string	"arch"
+.LASF234:
+	.string	"UCLASS_SPI_GENERIC"
+.LASF312:
+	.string	"__dtb_dt_spl_begin"
+.LASF103:
+	.string	"fdt_header"
+.LASF187:
+	.string	"UCLASS_DISPLAY"
+.LASF388:
+	.string	"pre_probe"
+.LASF351:
+	.string	"net_loop_state"
+.LASF372:
+	.string	"per_child_platdata_auto_alloc_size"
+.LASF450:
+	.string	"max_freq"
+.LASF300:
+	.string	"video_bottom"
+.LASF253:
+	.string	"UCLASS_COUNT"
+.LASF71:
+	.string	"bi_sramstart"
+.LASF327:
+	.string	"eth_current"
+.LASF232:
+	.string	"UCLASS_SPMI"
+.LASF23:
+	.string	"_Bool"
+.LASF12:
+	.string	"phys_size_t"
+.LASF448:
+	.string	"scan_freq"
+.LASF37:
+	.string	"uclass_priv"
+.LASF132:
+	.string	"image_len"
+.LASF474:
+	.string	"print_available_addr"
+.LASF471:
+	.string	"jt_funcs"
+.LASF431:
+	.string	"next_col"
+.LASF463:
+	.string	"ctrlc"
+.LASF330:
+	.string	"net_dns_server"
+.LASF433:
+	.string	"os_reg"
+.LASF304:
+	.string	"phandle"
+.LASF285:
+	.string	"dm_root"
+.LASF117:
+	.string	"ih_magic"
+.LASF227:
+	.string	"UCLASS_RAMDISK"
+.LASF133:
+	.string	"load"
+.LASF26:
+	.string	"_binary_u_boot_bin_end"
+.LASF273:
+	.string	"fb_base"
+.LASF447:
+	.string	"freq"
+.LASF150:
+	.string	"fit_uname_fdt"
+.LASF200:
+	.string	"UCLASS_LED"
+.LASF289:
+	.string	"new_fdt"
+.LASF181:
+	.string	"UCLASS_AHCI"
+.LASF437:
+	.string	"argv"
+.LASF462:
+	.string	"strict_strtoul"
+.LASF41:
+	.string	"sibling_node"
+.LASF333:
+	.string	"net_root_path"
+.LASF49:
+	.string	"block_drvr"
+.LASF9:
+	.string	"long long int"
+.LASF418:
+	.string	"random_test"
+.LASF427:
+	.string	"diagonalscan"
+.LASF143:
+	.string	"fit_hdr_os"
+.LASF314:
+	.string	"save_addr"
+.LASF35:
+	.string	"priv"
+.LASF218:
+	.string	"UCLASS_PMIC"
+.LASF31:
+	.string	"uclass_platdata"
+.LASF14:
+	.string	"char"
+.LASF44:
+	.string	"ide_bus_offset"
+.LASF52:
+	.string	"sector_count"
+.LASF154:
+	.string	"fit_noffset_setup"
+.LASF131:
+	.string	"image_start"
+.LASF56:
+	.string	"flash_info_t"
+.LASF236:
+	.string	"UCLASS_SYSRESET"
+.LASF395:
+	.string	"CHANGEFREQ"
+.LASF473:
+	.string	"exit"
+.LASF336:
+	.string	"net_ip"
+.LASF384:
+	.string	"data"
+.LASF299:
+	.string	"video_top"
+.LASF255:
+	.string	"LOGF_MAX_CATEGORIES"
+.LASF356:
+	.string	"net_state"
+.LASF282:
+	.string	"start_addr_sp"
+.LASF144:
+	.string	"fit_uname_os"
+.LASF18:
+	.string	"uint8_t"
+.LASF7:
+	.string	"__u32"
+.LASF426:
+	.string	"cmp_value"
+.LASF364:
+	.string	"unbind"
+.LASF280:
+	.string	"mon_len"
+.LASF355:
+	.string	"NETLOOP_FAIL"
+.LASF455:
+	.string	"crosstalk"
+.LASF366:
+	.string	"child_post_bind"
+.LASF305:
+	.string	"full_name"
+.LASF400:
+	.string	"FASTTEST"
+.LASF193:
+	.string	"UCLASS_I2C_EEPROM"
+.LASF296:
+	.string	"malloc_limit"
+.LASF138:
+	.string	"bootm_headers"
+.LASF272:
+	.string	"mem_clk"
+.LASF438:
+	.string	"test_case"
+.LASF168:
+	.string	"uclass_id"
+.LASF344:
+	.string	"net_our_vlan"
+.LASF95:
+	.string	"repeatable"
+.LASF319:
+	.string	"enetaddr"
+.LASF310:
+	.string	"monitor_flash_len"
+.LASF368:
+	.string	"child_post_remove"
+.LASF371:
+	.string	"per_child_auto_alloc_size"
+.LASF222:
+	.string	"UCLASS_RAM"
+.LASF325:
+	.string	"write_hwaddr"
+.LASF365:
+	.string	"ofdata_to_platdata"
+.LASF217:
+	.string	"UCLASS_PINCTRL"
+.LASF469:
+	.string	"cmd/ddr_tool/ddr_test_code.c"
+.LASF130:
+	.string	"image_info"
+.LASF29:
+	.string	"platdata"
+.LASF257:
+	.string	"timer_rate_hz"
+.LASF89:
+	.string	"_datarelrolocal_start_ofs"
+.LASF175:
+	.string	"UCLASS_SPI_EMUL"
+.LASF206:
+	.string	"UCLASS_MOD_EXP"
+.LASF105:
+	.string	"totalsize"
+.LASF385:
+	.string	"uclass_driver"
+.LASF432:
+	.string	"get_page_size"
+.LASF73:
+	.string	"bi_arm_freq"
+.LASF324:
+	.string	"halt"
+.LASF414:
+	.string	"print_memory"
+.LASF129:
+	.string	"image_header_t"
+.LASF93:
+	.string	"cmd_tbl_s"
+.LASF68:
+	.string	"bi_flashstart"
+.LASF91:
+	.string	"_datarelro_start_ofs"
+.LASF410:
+	.string	"buful"
+.LASF346:
+	.string	"net_restart_wrap"
+.LASF383:
+	.string	"compatible"
+.LASF176:
+	.string	"UCLASS_I2C_EMUL"
+.LASF271:
+	.string	"pci_clk"
+.LASF184:
+	.string	"UCLASS_CPU"
+.LASF343:
+	.string	"net_null_ethaddr"
+.LASF250:
+	.string	"UCLASS_RC"
+.LASF337:
+	.string	"net_server_ip"
+.LASF402:
+	.string	"TESTCASSMAX"
+.LASF51:
+	.string	"size"
+.LASF58:
+	.string	"long double"
+.LASF401:
+	.string	"FULLTEST"
+.LASF76:
+	.string	"bi_bootflags"
+.LASF83:
+	.string	"bi_boot_params"
+.LASF55:
+	.string	"protect"
+.LASF412:
+	.string	"reread"
+.LASF295:
+	.string	"malloc_base"
+.LASF1:
+	.string	"long unsigned int"
+.LASF170:
+	.string	"UCLASS_DEMO"
+.LASF116:
+	.string	"image_header"
+.LASF110:
+	.string	"last_comp_version"
+.LASF311:
+	.string	"__dtb_dt_begin"
+.LASF179:
+	.string	"UCLASS_SIMPLE_BUS"
+.LASF189:
+	.string	"UCLASS_ETH"
+.LASF394:
+	.string	"console_buffer"
+.LASF162:
+	.string	"cmdline_end"
+.LASF436:
+	.string	"argc"
+.LASF75:
+	.string	"bi_ddr_freq"
+.LASF106:
+	.string	"off_dt_struct"
+.LASF302:
+	.string	"serial"
+.LASF329:
+	.string	"net_netmask"
+.LASF65:
+	.string	"bd_info"
+.LASF161:
+	.string	"cmdline_start"
+.LASF166:
+	.string	"images"
+.LASF265:
+	.string	"using_pre_serial"
+.LASF139:
+	.string	"legacy_hdr_os"
+.LASF202:
+	.string	"UCLASS_MAILBOX"
+.LASF226:
+	.string	"UCLASS_RKNAND"
+.LASF147:
+	.string	"fit_uname_rd"
+.LASF403:
+	.string	"g_isi_pattern"
+.LASF223:
+	.string	"UCLASS_REGULATOR"
+.LASF77:
+	.string	"bi_ip_addr"
+.LASF301:
+	.string	"pm_ctx_phys"
+.LASF251:
+	.string	"UCLASS_CHARGE_DISPLAY"
+.LASF33:
+	.string	"driver_data"
+.LASF396:
+	.string	"SCANFREQ"
+.LASF392:
+	.string	"per_device_auto_alloc_size"
+.LASF11:
+	.string	"phys_addr_t"
+.LASF444:
+	.string	"do_ddr_test"
+.LASF387:
+	.string	"pre_unbind"
+.LASF13:
+	.string	"sizetype"
+.LASF338:
+	.string	"net_tx_packet"
+.LASF159:
+	.string	"initrd_start"
+.LASF99:
+	.string	"cmd_tbl_t"
+.LASF34:
+	.string	"parent"
+.LASF6:
+	.string	"short int"
+.LASF415:
+	.string	"write_buf_to_ddr"
+.LASF125:
+	.string	"ih_arch"
+.LASF452:
+	.string	"get_test_addr"
+.LASF306:
+	.string	"properties"
+.LASF247:
+	.string	"UCLASS_WDT"
+.LASF454:
+	.string	"available"
+.LASF397:
+	.string	"RANDOM"
+.LASF374:
+	.string	"length"
+.LASF331:
+	.string	"net_nis_domain"
+.LASF121:
+	.string	"ih_load"
+.LASF292:
+	.string	"env_buf"
+.LASF354:
+	.string	"NETLOOP_SUCCESS"
+.LASF472:
+	.string	"ofnode_union"
+.LASF178:
+	.string	"UCLASS_USB_EMUL"
+.LASF172:
+	.string	"UCLASS_TEST_FDT"
+.LASF115:
+	.string	"fdt32_t"
+.LASF290:
+	.string	"fdt_size"
+.LASF435:
+	.string	"flag"
+.LASF404:
+	.string	"test_pattern"
+.LASF434:
+	.string	"cmdtp"
+.LASF17:
+	.string	"ulong"
+.LASF119:
+	.string	"ih_time"
+.LASF120:
+	.string	"ih_size"
+.LASF188:
+	.string	"UCLASS_DMA"
+.LASF97:
+	.string	"help"
+.LASF445:
+	.string	"set_vdd_logic"
+.LASF320:
+	.string	"iobase"
+.LASF224:
+	.string	"UCLASS_REMOTEPROC"
+.LASF352:
+	.string	"NETLOOP_CONTINUE"
+.LASF228:
+	.string	"UCLASS_RTC"
+.LASF259:
+	.string	"timer_reset_value"
+.LASF96:
+	.string	"usage"
+.LASF204:
+	.string	"UCLASS_MISC"
+.LASF62:
+	.string	"region"
+.LASF157:
+	.string	"ft_addr"
+.LASF398:
+	.string	"CROSSTALK"
+.LASF470:
+	.string	"/home/typ/src/u-boot_gerrit/u-boot-ddr"
+.LASF28:
+	.string	"name"
+.LASF54:
+	.string	"start"
+.LASF153:
+	.string	"fit_uname_setup"
+.LASF123:
+	.string	"ih_dcrc"
+.LASF24:
+	.string	"image_base"
+.LASF390:
+	.string	"pre_remove"
+.LASF169:
+	.string	"UCLASS_ROOT"
+.LASF104:
+	.string	"magic"
+.LASF248:
+	.string	"UCLASS_FG"
+.LASF146:
+	.string	"fit_hdr_rd"
+.LASF149:
+	.string	"fit_hdr_fdt"
+.LASF461:
+	.string	"strcasecmp"
+.LASF417:
+	.string	"cmp_buf_data"
+.LASF122:
+	.string	"ih_ep"
+.LASF283:
+	.string	"reloc_off"
+.LASF321:
+	.string	"init"
+.LASF246:
+	.string	"UCLASS_VIDEO_CRTC"
+.LASF243:
+	.string	"UCLASS_VIDEO"
+.LASF214:
+	.string	"UCLASS_PCI_GENERIC"
+.LASF440:
+	.string	"test_times"
+.LASF5:
+	.string	"__u8"
+.LASF376:
+	.string	"of_offset"
+.LASF256:
+	.string	"arch_global_data"
+.LASF94:
+	.string	"maxargs"
+.LASF88:
+	.string	"_datarel_start_ofs"
+.LASF25:
+	.string	"_binary_u_boot_bin_start"
+.LASF303:
+	.string	"device_node"
+.LASF261:
+	.string	"tlb_size"
+.LASF66:
+	.string	"bi_memstart"
+.LASF118:
+	.string	"ih_hcrc"
+.LASF443:
+	.string	"scan_freq_loop"
+.LASF82:
+	.string	"bi_arch_number"
+.LASF112:
+	.string	"size_dt_strings"
+.LASF339:
+	.string	"net_rx_packets"
+.LASF63:
+	.string	"memory"
+.LASF27:
+	.string	"driver"
+.LASF156:
+	.string	"rd_end"
+.LASF203:
+	.string	"UCLASS_MASS_STORAGE"
+.LASF316:
+	.string	"in_addr"
+.LASF449:
+	.string	"min_freq"
+.LASF430:
+	.string	"pattern"
+.LASF92:
+	.string	"IRQ_STACK_START_IN"
+.LASF160:
+	.string	"initrd_end"
+.LASF135:
+	.string	"type"
+.LASF341:
+	.string	"net_rx_packet_len"
+.LASF0:
+	.string	"unsigned char"
+.LASF229:
+	.string	"UCLASS_SCSI"
+.LASF16:
+	.string	"ushort"
+.LASF213:
+	.string	"UCLASS_PCI"
+.LASF348:
+	.string	"net_boot_file_size"
+.LASF391:
+	.string	"destroy"
+.LASF428:
+	.string	"next_adr"
+.LASF274:
+	.string	"have_console"
+.LASF281:
+	.string	"irq_sp"
+.LASF185:
+	.string	"UCLASS_CODEC"
+.LASF380:
+	.string	"uc_drv"
+.LASF240:
+	.string	"UCLASS_USB"
+.LASF298:
+	.string	"cur_serial_dev"
+.LASF267:
+	.string	"addr"
+.LASF46:
+	.string	"list_head"
+.LASF164:
+	.string	"state"
+.LASF20:
+	.string	"__be32"
+.LASF216:
+	.string	"UCLASS_PINCONFIG"
+.LASF241:
+	.string	"UCLASS_USB_DEV_GENERIC"
+.LASF342:
+	.string	"net_bcast_ethaddr"
+.LASF145:
+	.string	"fit_noffset_os"
+.LASF231:
+	.string	"UCLASS_SPI"
+.LASF422:
+	.string	"reread_val"
+.LASF468:
+	.ascii	"GNU C11 6.3.1 20170404 -ms"
+	.string	"trict-align -march=armv8-a+nosimd -mlittle-endian -mabi=lp64 -g -Os -fno-builtin -ffreestanding -fshort-wchar -fno-stack-protector -fno-delete-null-pointer-checks -fstack-usage -fno-pic -ffunction-sections -fdata-sections -ffixed-r9 -fno-common -ffixed-x18"
+.LASF419:
+	.string	"baseaddr"
+.LASF335:
+	.string	"net_server_ethaddr"
+.LASF439:
+	.string	"err_case"
+.LASF252:
+	.string	"UCLASS_DVFS"
+.LASF425:
+	.string	"random_test1"
+.LASF318:
+	.string	"eth_device"
+.LASF323:
+	.string	"recv"
+.LASF50:
+	.string	"select_hwpart"
+.LASF4:
+	.string	"uchar"
+.LASF69:
+	.string	"bi_flashsize"
+.LASF381:
+	.string	"dev_head"
+.LASF2:
+	.string	"short unsigned int"
+.LASF389:
+	.string	"post_probe"
+.LASF367:
+	.string	"child_pre_probe"
+.LASF74:
+	.string	"bi_dsp_freq"
+.LASF411:
+	.string	"wr_val"
+.LASF459:
+	.string	"memcpy"
+.LASF347:
+	.string	"net_boot_file_name"
+.LASF254:
+	.string	"UCLASS_INVALID"
+.LASF379:
+	.string	"current"
+.LASF457:
+	.string	"__func__"
+.LASF64:
+	.string	"reserved"
+.LASF192:
+	.string	"UCLASS_I2C"
+.LASF128:
+	.string	"ih_name"
+.LASF277:
+	.string	"ram_top"
+.LASF180:
+	.string	"UCLASS_ADC"
+.LASF43:
+	.string	"req_seq"
+.LASF279:
+	.string	"ram_size"
+.LASF423:
+	.string	"err_addr"
+.LASF446:
+	.string	"set_ddr_freq"
+.LASF196:
+	.string	"UCLASS_I2S"
+.LASF369:
+	.string	"priv_auto_alloc_size"
+.LASF30:
+	.string	"parent_platdata"
+.LASF163:
+	.string	"verify"
+.LASF87:
+	.string	"FIQ_STACK_START"
+.LASF451:
+	.string	"times"
+.LASF464:
+	.string	"regulator_get_by_platname"
+.LASF84:
+	.string	"bi_dram"
+.LASF134:
+	.string	"comp"
+.LASF345:
+	.string	"net_native_vlan"
+.LASF429:
+	.string	"page_size"
+.LASF220:
+	.string	"UCLASS_POWER_DOMAIN"
+.LASF269:
+	.string	"cpu_clk"
+.LASF406:
+	.string	"_u_boot_list_2_cmd_2_ddr_test"
+.LASF244:
+	.string	"UCLASS_VIDEO_BRIDGE"
+.LASF370:
+	.string	"platdata_auto_alloc_size"
+.LASF124:
+	.string	"ih_os"
+.LASF61:
+	.string	"lmb_region"
+.LASF249:
+	.string	"UCLASS_KEY"
+	.hidden	malloc
+	.ident	"GCC: (Linaro GCC 6.3-2017.05) 6.3.1 20170404"
+	.section	.note.GNU-stack,"",@progbits
diff --git a/cmd/ddr_tool/ddr_test_rk3328.S b/cmd/ddr_tool/ddr_test_rk3328.S
new file mode 100644
index 0000000000..985d7be5cb
--- /dev/null
+++ b/cmd/ddr_tool/ddr_test_rk3328.S
@@ -0,0 +1,11844 @@
+	.arch armv8-a+nosimd
+	.file	"ddr_test_code.c"
+	.text
+.Ltext0:
+	.cfi_sections	.debug_frame
+	.section	.text.set_ddr_freq,"ax",@progbits
+	.align	2
+	.type	set_ddr_freq, %function
+set_ddr_freq:
+.LFB256:
+	.file 1 "cmd/ddr_tool/ddr_tool.c"
+	.loc 1 147 0
+	.cfi_startproc
+.LVL0:
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	.loc 1 149 0
+	mov	x1, 16959
+	movk	x1, 0xf, lsl 16
+	cmp	x0, x1
+	.loc 1 147 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	str	x19, [sp, 16]
+	.cfi_offset 19, -16
+	.loc 1 149 0
+	bhi	.L2
+	.loc 1 150 0
+	add	x1, x1, 1
+	mul	x0, x0, x1
+.LVL1:
+	.loc 1 151 0
+	cbz	x0, .L3
+.L2:
+	.loc 1 152 0
+	bl	rockchip_ddrclk_sip_round_rate_v2
+.LVL2:
+	.loc 1 153 0
+	bl	rockchip_ddrclk_sip_set_rate_v2
+.LVL3:
+.L3:
+	.loc 1 155 0
+	bl	rockchip_ddrclk_sip_recalc_rate_v2
+.LVL4:
+	mov	x19, x0
+.LVL5:
+	.loc 1 156 0
+	mov	x1, x0
+	adrp	x0, .LC1
+.LVL6:
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL7:
+	.loc 1 162 0
+	mov	w0, w19
+	ldr	x19, [sp, 16]
+.LVL8:
+	ldp	x29, x30, [sp], 32
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE256:
+	.size	set_ddr_freq, .-set_ddr_freq
+	.section	.text.set_vdd_logic,"ax",@progbits
+	.align	2
+	.type	set_vdd_logic, %function
+set_vdd_logic:
+.LFB257:
+	.loc 1 165 0
+	.cfi_startproc
+.LVL9:
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	.loc 1 169 0
+	add	x1, x29, 40
+	.loc 1 165 0
+	mov	w20, w0
+	.loc 1 169 0
+	adrp	x0, .LC2
+.LVL10:
+	add	x0, x0, :lo12:.LC2
+	bl	regulator_get_by_platname
+.LVL11:
+	.loc 1 170 0
+	cbz	w0, .L9
+	mov	w19, w0
+	.loc 1 171 0
+	adrp	x0, .LC3
+.LVL12:
+	add	x0, x0, :lo12:.LC3
+.LVL13:
+.L15:
+	.loc 1 179 0
+	bl	printf
+.LVL14:
+.L8:
+	.loc 1 181 0
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+.LVL15:
+	ldp	x29, x30, [sp], 48
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL16:
+.L9:
+	.cfi_restore_state
+	.loc 1 176 0
+	ldr	x0, [x29, 40]
+.LVL17:
+	mov	w1, w20
+	bl	regulator_set_value
+.LVL18:
+	mov	w19, w0
+.LVL19:
+	.loc 1 177 0
+	mov	x0, 100
+.LVL20:
+	bl	udelay
+.LVL21:
+	.loc 1 178 0
+	cbz	w19, .L8
+	.loc 1 179 0
+	adrp	x0, .LC4
+	add	x0, x0, :lo12:.LC4
+	b	.L15
+	.cfi_endproc
+.LFE257:
+	.size	set_vdd_logic, .-set_vdd_logic
+	.section	.text.random_test,"ax",@progbits
+	.align	2
+	.global	random_test
+	.type	random_test, %function
+random_test:
+.LFB274:
+	.file 2 "cmd/ddr_tool/random_test.c"
+	.loc 2 88 0
+	.cfi_startproc
+.LVL22:
+	stp	x29, x30, [sp, -112]!
+	.cfi_def_cfa_offset 112
+	.cfi_offset 29, -112
+	.cfi_offset 30, -104
+.LBB12:
+.LBB13:
+	.loc 2 18 0
+	mov	x2, x1
+.LBE13:
+.LBE12:
+	.loc 2 88 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -80
+	.cfi_offset 22, -72
+	mov	x22, x0
+.LVL23:
+	stp	x23, x24, [sp, 48]
+.LBB18:
+.LBB14:
+	.loc 2 37 0
+	adrp	x21, .LC6
+.LBE14:
+.LBE18:
+	.loc 2 88 0
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 23, -64
+	.cfi_offset 24, -56
+	.cfi_offset 27, -32
+	.cfi_offset 28, -24
+	mov	x23, x1
+.LVL24:
+	stp	x19, x20, [sp, 16]
+.LBB19:
+.LBB15:
+	.loc 2 18 0
+	mov	w1, -2139062144
+.LVL25:
+.LBE15:
+.LBE19:
+	.loc 2 88 0
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 19, -96
+	.cfi_offset 20, -88
+	.cfi_offset 25, -48
+	.cfi_offset 26, -40
+.LBB20:
+.LBB16:
+	.loc 2 23 0
+	adrp	x24, .LC5
+	.loc 2 18 0
+	bl	memset
+.LVL26:
+	.loc 2 23 0
+	add	x24, x24, :lo12:.LC5
+	.loc 2 37 0
+	add	x21, x21, :lo12:.LC6
+	.loc 2 24 0
+	lsr	x0, x23, 2
+	.loc 2 14 0
+	mov	w27, 0
+	.loc 2 20 0
+	mov	w25, 1077952576
+	.loc 2 19 0
+	mov	w20, -2139062144
+	.loc 2 22 0
+	mov	w28, 0
+	.loc 2 24 0
+	str	x0, [x29, 96]
+.LVL27:
+.L22:
+	.loc 2 23 0
+	mov	w1, w28
+	mov	x0, x24
+	bl	printf
+.LVL28:
+	.loc 2 24 0
+	mov	w1, 0
+.LVL29:
+.L17:
+	ldr	x2, [x29, 96]
+	uxtw	x0, w1
+	cmp	x0, x2
+	bcc	.L21
+.LVL30:
+.L20:
+	.loc 2 37 0
+	mov	x0, x21
+	.loc 2 22 0
+	add	w28, w28, 1
+.LVL31:
+	.loc 2 37 0
+	bl	printf
+.LVL32:
+	.loc 2 35 0
+	lsr	w25, w25, 1
+.LVL33:
+	.loc 2 36 0
+	lsr	w20, w20, 1
+.LVL34:
+	.loc 2 22 0
+	cmp	w28, 8
+	bne	.L22
+	mov	x19, -1
+	b	.L19
+.LVL35:
+.L21:
+	.loc 2 25 0
+	lsl	x0, x0, 2
+	add	x19, x22, x0
+	ldr	w2, [x22, x0]
+	str	w2, [x29, 108]
+	.loc 2 26 0
+	uxtw	x2, w2
+	cmp	w2, w20
+	beq	.L18
+.LVL36:
+	.loc 2 28 0
+	ldr	w27, [x19]
+	.loc 2 33 0
+	cmn	x19, #1
+	beq	.L20
+.LVL37:
+.L19:
+	.loc 2 39 0
+	adrp	x0, .LC7
+	add	x0, x0, :lo12:.LC7
+	bl	printf
+.LVL38:
+	.loc 2 40 0
+	cmn	x19, #1
+	beq	.L23
+	.loc 2 41 0
+	ldr	w2, [x29, 108]
+	adrp	x0, .LC8
+	mov	w4, w20
+	mov	w3, w27
+	mov	x1, x19
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.LVL39:
+.L36:
+.LBE16:
+.LBE20:
+.LBB21:
+.LBB22:
+	.loc 2 82 0
+	mov	w0, -1
+.L16:
+.LBE22:
+.LBE21:
+	.loc 2 96 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+.LVL40:
+	ldp	x23, x24, [sp, 48]
+.LVL41:
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL42:
+.L18:
+	.cfi_restore_state
+.LBB24:
+.LBB17:
+	.loc 2 31 0
+	str	w25, [x22, x0]
+	.loc 2 24 0
+	add	w1, w1, 1
+.LVL43:
+	b	.L17
+.LVL44:
+.L23:
+.LBE17:
+.LBE24:
+.LBB25:
+.LBB23:
+	.loc 2 58 0
+	adrp	x25, .LC9
+.LVL45:
+	.loc 2 76 0
+	adrp	x24, .LC10
+	.loc 2 66 0
+	lsr	x28, x23, 3
+.LVL46:
+	.loc 2 58 0
+	add	x25, x25, :lo12:.LC9
+	.loc 2 76 0
+	add	x24, x24, :lo12:.LC10
+	.loc 2 66 0
+	mov	x27, 0
+	mov	x19, 0
+.LVL47:
+.L30:
+	.loc 2 58 0
+	mov	x1, x19
+	mov	x0, x25
+	bl	printf
+.LVL48:
+	.loc 2 60 0
+	lsl	x20, x19, 8
+	lsl	x0, x19, 24
+	orr	x20, x20, x19, lsl 16
+	orr	x0, x0, x19, lsl 32
+	.loc 2 64 0
+	mov	x2, x23
+	.loc 2 60 0
+	orr	x20, x20, x0
+	lsl	x0, x19, 40
+	orr	x0, x0, x19, lsl 48
+	orr	x20, x20, x0
+	orr	x0, x19, x19, lsl 56
+	orr	x20, x20, x0
+.LVL49:
+	.loc 2 64 0
+	mov	x0, x22
+	mov	w1, w20
+	bl	memset
+.LVL50:
+	.loc 2 66 0
+	mov	x0, 0
+.LVL51:
+.L25:
+	cmp	x0, x28
+	bne	.L29
+.LVL52:
+.L28:
+	.loc 2 76 0
+	mov	x0, x24
+.LVL53:
+	.loc 2 57 0
+	add	x19, x19, 1
+.LVL54:
+	.loc 2 76 0
+	bl	printf
+.LVL55:
+	.loc 2 57 0
+	cmp	x19, 256
+	bne	.L30
+	mov	x21, -1
+	b	.L27
+.LVL56:
+.L29:
+	lsl	x1, x0, 3
+	add	x21, x1, x22
+	.loc 2 67 0
+	ldr	x26, [x1, x22]
+.LVL57:
+	.loc 2 68 0
+	cmp	x20, x26
+	beq	.L26
+.LVL58:
+	.loc 2 70 0
+	ldr	x27, [x21]
+.LVL59:
+	.loc 2 74 0
+	cmn	x21, #1
+	beq	.L28
+.LVL60:
+.L27:
+	.loc 2 78 0
+	adrp	x0, .LC11
+	add	x0, x0, :lo12:.LC11
+	bl	printf
+.LVL61:
+	.loc 2 84 0
+	mov	w0, 0
+	.loc 2 79 0
+	cmn	x21, #1
+	beq	.L16
+	.loc 2 80 0
+	mov	x4, x20
+	mov	x3, x27
+	mov	x2, x26
+	mov	x1, x21
+	adrp	x0, .LC12
+	add	x0, x0, :lo12:.LC12
+	bl	printf
+.LVL62:
+	b	.L36
+.LVL63:
+.L26:
+	.loc 2 66 0
+	add	x0, x0, 1
+.LVL64:
+	b	.L25
+.LBE23:
+.LBE25:
+	.cfi_endproc
+.LFE274:
+	.size	random_test, .-random_test
+	.section	.text.scan_freq,"ax",@progbits
+	.align	2
+	.type	scan_freq, %function
+scan_freq:
+.LFB255:
+	.loc 1 104 0
+	.cfi_startproc
+.LVL65:
+	stp	x29, x30, [sp, -96]!
+	.cfi_def_cfa_offset 96
+	.cfi_offset 29, -96
+	.cfi_offset 30, -88
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -80
+	.cfi_offset 20, -72
+	mov	w20, w0
+	stp	x23, x24, [sp, 48]
+	.loc 1 111 0
+	mov	w0, 16960
+.LVL66:
+	.loc 1 104 0
+	stp	x21, x22, [sp, 32]
+	.loc 1 111 0
+	movk	w0, 0xf, lsl 16
+	.loc 1 104 0
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 23, -48
+	.cfi_offset 24, -40
+	.cfi_offset 21, -64
+	.cfi_offset 22, -56
+	.cfi_offset 25, -32
+	.cfi_offset 26, -24
+	mov	x24, x2
+	str	x27, [sp, 80]
+	.cfi_offset 27, -16
+	.loc 1 111 0
+	cmp	w20, w0
+	bls	.L38
+	.loc 1 112 0
+	udiv	w20, w20, w0
+.LVL67:
+.L38:
+	.loc 1 113 0
+	cmp	w1, w0
+	bls	.L39
+	.loc 1 114 0
+	udiv	w1, w1, w0
+.LVL68:
+.L39:
+	.loc 1 116 0
+	cmp	w20, w1
+	bls	.L40
+	mov	w0, w20
+	mov	w20, w1
+.LVL69:
+	mov	w1, w0
+.LVL70:
+.L40:
+	.loc 1 125 0
+	mov	w25, 16960
+	.loc 1 126 0
+	adrp	x22, .LC13
+	.loc 1 129 0
+	adrp	x23, .LC14
+	.loc 1 121 0
+	sub	w19, w1, w20
+.LVL71:
+	.loc 1 126 0
+	add	x22, x22, :lo12:.LC13
+	.loc 1 129 0
+	add	x23, x23, :lo12:.LC14
+	.loc 1 123 0
+	mov	w21, 0
+	.loc 1 125 0
+	movk	w25, 0xf, lsl 16
+.LVL72:
+.L41:
+	.loc 1 123 0 discriminator 1
+	cmp	x24, x21, uxtw
+	bhi	.L45
+	.loc 1 123 0 is_stmt 0 discriminator 3
+	cbnz	x24, .L46
+.L45:
+	.loc 1 124 0 is_stmt 1
+	bl	rand
+.LVL73:
+	udiv	w1, w0, w19
+	msub	w0, w1, w19, w0
+.LVL74:
+	add	w0, w0, w20
+	.loc 1 125 0
+	mul	w0, w0, w25
+	and	x0, x0, 4294967232
+	bl	rockchip_ddrclk_sip_round_rate_v2
+.LVL75:
+	.loc 1 126 0
+	mov	w1, w21
+	mov	w2, w0
+	.loc 1 125 0
+	mov	x26, x0
+.LVL76:
+	.loc 1 126 0
+	mov	x0, x22
+.LVL77:
+	bl	printf
+.LVL78:
+	.loc 1 127 0
+	uxtw	x0, w26
+	bl	rockchip_ddrclk_sip_set_rate_v2
+.LVL79:
+	.loc 1 128 0
+	bl	rockchip_ddrclk_sip_recalc_rate_v2
+.LVL80:
+	.loc 1 129 0
+	mov	w1, w0
+	.loc 1 128 0
+	mov	x27, x0
+.LVL81:
+	.loc 1 129 0
+	mov	x0, x23
+.LVL82:
+	bl	printf
+.LVL83:
+	.loc 1 132 0
+	ldr	x0, [x18]
+	mov	x1, 1048576
+	ldr	x0, [x0, 136]
+	bl	random_test
+.LVL84:
+	mov	w26, w0
+.LVL85:
+	.loc 1 133 0
+	cbz	w0, .L42
+	.loc 1 134 0
+	adrp	x0, .LC15
+.LVL86:
+	mov	w1, w27
+	add	x0, x0, :lo12:.LC15
+	bl	printf
+.LVL87:
+.L37:
+	.loc 1 144 0
+	mov	w0, w26
+	ldr	x27, [sp, 80]
+	ldp	x19, x20, [sp, 16]
+.LVL88:
+	ldp	x21, x22, [sp, 32]
+.LVL89:
+	ldp	x23, x24, [sp, 48]
+.LVL90:
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL91:
+.L42:
+	.cfi_restore_state
+	.loc 1 137 0
+	bl	ctrlc
+.LVL92:
+	cbz	w0, .L44
+.LVL93:
+.L46:
+	.loc 1 123 0
+	mov	w26, 0
+	b	.L37
+.LVL94:
+.L44:
+	.loc 1 123 0 is_stmt 0 discriminator 2
+	add	w21, w21, 1
+.LVL95:
+	b	.L41
+	.cfi_endproc
+.LFE255:
+	.size	scan_freq, .-scan_freq
+	.section	.text.cpu_2_io,"ax",@progbits
+	.align	2
+	.global	cpu_2_io
+	.type	cpu_2_io, %function
+cpu_2_io:
+.LFB275:
+	.file 3 "cmd/ddr_tool/tool_common.c"
+	.loc 3 11 0 is_stmt 1
+	.cfi_startproc
+.LVL96:
+	ret
+	.cfi_endproc
+.LFE275:
+	.size	cpu_2_io, .-cpu_2_io
+	.section	.text.write_buf_to_ddr,"ax",@progbits
+	.align	2
+	.global	write_buf_to_ddr
+	.type	write_buf_to_ddr, %function
+write_buf_to_ddr:
+.LFB276:
+	.loc 3 29 0
+	.cfi_startproc
+.LVL97:
+	.loc 3 37 0
+	lsr	w1, w1, 3
+.LVL98:
+	.loc 3 39 0
+	lsr	x3, x3, 3
+.LVL99:
+	.loc 3 37 0
+	sub	w1, w1, #1
+.LVL100:
+	.loc 3 39 0
+	mov	w4, 0
+	mov	w5, 0
+.LVL101:
+.L53:
+	.loc 3 39 0 is_stmt 0 discriminator 1
+	uxtw	x6, w5
+	cmp	x6, x3
+	bcc	.L54
+	.loc 3 44 0 is_stmt 1
+	ret
+.L54:
+	.loc 3 40 0 discriminator 3
+	ldr	x7, [x0, w4, uxtw 3]
+	.loc 3 41 0 discriminator 3
+	add	w4, w4, 1
+.LVL102:
+	.loc 3 40 0 discriminator 3
+	str	x7, [x2, x6, lsl 3]
+	.loc 3 42 0 discriminator 3
+	and	w4, w1, w4
+.LVL103:
+	.loc 3 39 0 discriminator 3
+	add	w5, w5, 1
+.LVL104:
+	b	.L53
+	.cfi_endproc
+.LFE276:
+	.size	write_buf_to_ddr, .-write_buf_to_ddr
+	.section	.text.cmp_buf_data,"ax",@progbits
+	.align	2
+	.global	cmp_buf_data
+	.type	cmp_buf_data, %function
+cmp_buf_data:
+.LFB277:
+	.loc 3 48 0
+	.cfi_startproc
+.LVL105:
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	.loc 3 60 0
+	lsr	w1, w1, 3
+.LVL106:
+	.loc 3 48 0
+	mov	w10, w4
+	.loc 3 60 0
+	sub	w1, w1, #1
+	.loc 3 48 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 3 62 0
+	lsr	x3, x3, 3
+.LVL107:
+	.loc 3 48 0
+	mov	x8, x2
+.LVL108:
+	.loc 3 62 0
+	mov	w6, 0
+	.loc 3 56 0
+	mov	x2, 0
+.LVL109:
+	.loc 3 62 0
+	mov	w7, 0
+	.loc 3 48 0
+	str	x19, [sp, 16]
+	.cfi_offset 19, -16
+.LVL110:
+.L56:
+	.loc 3 62 0 discriminator 1
+	uxtw	x5, w7
+	cmp	x5, x3
+	bcc	.L59
+	.loc 3 61 0
+	mov	x19, 0
+	.loc 3 54 0
+	mov	x3, 0
+	.loc 3 55 0
+	mov	x4, 0
+	b	.L58
+.L59:
+	.loc 3 63 0
+	lsl	x5, x5, 3
+	.loc 3 64 0
+	ldr	x4, [x0, w6, uxtw 3]
+	.loc 3 63 0
+	add	x19, x8, x5
+	ldr	x2, [x8, x5]
+.LVL111:
+	.loc 3 64 0
+	cmp	x2, x4
+	beq	.L57
+	.loc 3 65 0
+	ldr	x3, [x19]
+.LVL112:
+.L58:
+	.loc 3 73 0
+	cmp	x19, 0
+	ccmp	w10, 0, 4, ne
+	beq	.L55
+	.loc 3 74 0
+	adrp	x0, .LC16
+.LVL113:
+	mov	x1, x19
+.LVL114:
+	add	x0, x0, :lo12:.LC16
+	bl	printf
+.LVL115:
+.L55:
+	.loc 3 78 0
+	mov	x0, x19
+	ldr	x19, [sp, 16]
+.LVL116:
+	ldp	x29, x30, [sp], 32
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_def_cfa 31, 0
+	ret
+.LVL117:
+.L57:
+	.cfi_restore_state
+	.loc 3 70 0 discriminator 2
+	add	w6, w6, 1
+.LVL118:
+	.loc 3 62 0 discriminator 2
+	add	w7, w7, 1
+.LVL119:
+	.loc 3 71 0 discriminator 2
+	and	w6, w1, w6
+.LVL120:
+	b	.L56
+	.cfi_endproc
+.LFE277:
+	.size	cmp_buf_data, .-cmp_buf_data
+	.section	.text.crosstalk,"ax",@progbits
+	.align	2
+	.global	crosstalk
+	.type	crosstalk, %function
+crosstalk:
+.LFB200:
+	.file 4 "cmd/ddr_tool/crosstalk.c"
+	.loc 4 46 0
+	.cfi_startproc
+.LVL121:
+	stp	x29, x30, [sp, -144]!
+	.cfi_def_cfa_offset 144
+	.cfi_offset 29, -144
+	.cfi_offset 30, -136
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -128
+	.cfi_offset 20, -120
+	.loc 4 71 0
+	add	x20, x29, 112
+	.loc 4 46 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -112
+	.cfi_offset 22, -104
+	mov	x22, x0
+	stp	x23, x24, [sp, 48]
+	.loc 4 63 0
+	adrp	x0, .LC17
+.LVL122:
+	.loc 4 46 0
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 23, -96
+	.cfi_offset 24, -88
+	.cfi_offset 27, -64
+	.cfi_offset 28, -56
+	mov	x23, x1
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 25, -80
+	.cfi_offset 26, -72
+	.loc 4 63 0
+	add	x0, x0, :lo12:.LC17
+	.loc 4 68 0
+	adrp	x24, .LC19
+	.loc 4 63 0
+	bl	printf
+.LVL123:
+	.loc 4 68 0
+	add	x27, x24, :lo12:.LC19
+	.loc 4 66 0
+	adrp	x21, .LC18
+	.loc 4 64 0
+	mov	w19, 0
+	.loc 4 66 0
+	add	x0, x21, :lo12:.LC18
+	str	x0, [x29, 104]
+.LVL124:
+.L70:
+	ldr	x0, [x29, 104]
+	.loc 4 71 0
+	mov	w25, 1
+	.loc 4 66 0
+	mov	w1, w19
+	.loc 4 71 0
+	lsl	w25, w25, w19
+	.loc 4 65 0
+	mov	w28, -1
+	.loc 4 67 0
+	mov	w26, 0
+	.loc 4 66 0
+	bl	printf
+.LVL125:
+.L69:
+	.loc 4 68 0
+	mov	w1, w26
+	mov	x0, x27
+	.loc 4 69 0
+	mvn	w28, w28
+.LVL126:
+	.loc 4 68 0
+	bl	printf
+.LVL127:
+	.loc 4 69 0
+	mov	x8, 0
+.LVL128:
+.L66:
+	.loc 4 71 0 discriminator 3
+	eor	w0, w25, w28
+	str	w0, [x8, x20]
+	add	x8, x8, 4
+	.loc 4 72 0 discriminator 3
+	mvn	w28, w28
+.LVL129:
+	.loc 4 70 0 discriminator 3
+	cmp	x8, 32
+	bne	.L66
+	.loc 4 77 0
+	mov	x3, x23
+	mov	x2, x22
+	mov	w1, w8
+	mov	x0, x20
+	bl	write_buf_to_ddr
+.LVL130:
+	.loc 4 78 0
+	mov	w1, w8
+	mov	w4, 1
+	mov	x3, x23
+	mov	x2, x22
+	mov	x0, x20
+	bl	cmp_buf_data
+.LVL131:
+	cbz	x0, .L67
+.LVL132:
+.L75:
+	.loc 4 80 0
+	mov	w0, -1
+.L65:
+	.loc 4 115 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+.LVL133:
+	ldp	x23, x24, [sp, 48]
+.LVL134:
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+.LVL135:
+	ldp	x29, x30, [sp], 144
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL136:
+.L67:
+	.cfi_restore_state
+	.loc 4 67 0 discriminator 2
+	add	w26, w26, 1
+.LVL137:
+	cmp	w26, 2
+	bne	.L69
+	.loc 4 64 0 discriminator 2
+	add	w19, w19, 1
+.LVL138:
+	cmp	w19, 32
+	bne	.L70
+	.loc 4 87 0
+	adrp	x0, .LC20
+	add	x0, x0, :lo12:.LC20
+	bl	printf
+.LVL139:
+	.loc 4 88 0
+	mov	x0, 128
+	bl	malloc
+.LVL140:
+	mov	x20, x0
+.LVL141:
+	.loc 4 89 0
+	cbnz	x0, .L71
+	.loc 4 90 0
+	adrp	x0, .LC21
+.LVL142:
+	mov	x1, 128
+	add	x0, x0, :lo12:.LC21
+	bl	printf
+.LVL143:
+.L71:
+	adrp	x25, .LANCHOR0
+	.loc 4 93 0
+	add	x26, x21, :lo12:.LC18
+.LVL144:
+	.loc 4 95 0
+	add	x24, x24, :lo12:.LC19
+	.loc 4 100 0
+	add	x25, x25, :lo12:.LANCHOR0
+	.loc 4 69 0
+	mov	w19, 0
+.LVL145:
+.L78:
+	.loc 4 94 0
+	mov	w21, 0
+	.loc 4 98 0
+	mov	w27, 1
+	.loc 4 93 0
+	mov	w1, w19
+	mov	x0, x26
+	bl	printf
+.LVL146:
+.L77:
+	.loc 4 95 0
+	mov	w1, w21
+	mov	x0, x24
+	bl	printf
+.LVL147:
+	.loc 4 98 0
+	lsl	w1, w27, w21
+	mov	x8, 0
+.LVL148:
+.L74:
+	ldr	w0, [x8, x25]
+	.loc 4 97 0
+	cbz	w19, .L72
+	.loc 4 98 0
+	eor	w0, w0, w1
+.L72:
+	.loc 4 100 0
+	str	w0, [x20, x8]
+	add	x8, x8, 4
+	.loc 4 96 0
+	cmp	x8, 128
+	bne	.L74
+	.loc 4 105 0
+	mov	x3, x23
+	mov	x2, x22
+	mov	w1, w8
+	mov	x0, x20
+	bl	write_buf_to_ddr
+.LVL149:
+	.loc 4 107 0
+	mov	w1, w8
+	mov	w4, 1
+	mov	x3, x23
+	mov	x2, x22
+	mov	x0, x20
+	bl	cmp_buf_data
+.LVL150:
+	cbnz	x0, .L75
+	.loc 4 110 0
+	cbz	w19, .L76
+	.loc 4 94 0 discriminator 2
+	add	w21, w21, 1
+.LVL151:
+	cmp	w21, 32
+	bne	.L77
+.L76:
+	.loc 4 92 0 discriminator 2
+	add	w19, w19, 1
+.LVL152:
+	cmp	w19, 2
+	bne	.L78
+	.loc 4 114 0
+	mov	w0, 0
+	b	.L65
+	.cfi_endproc
+.LFE200:
+	.size	crosstalk, .-crosstalk
+	.section	.text.diagonalscan,"ax",@progbits
+	.align	2
+	.global	diagonalscan
+	.type	diagonalscan, %function
+diagonalscan:
+.LFB271:
+	.file 5 "cmd/ddr_tool/diagonalscan.c"
+	.loc 5 49 0
+	.cfi_startproc
+.LVL153:
+	stp	x29, x30, [sp, -112]!
+	.cfi_def_cfa_offset 112
+	.cfi_offset 29, -112
+	.cfi_offset 30, -104
+	.loc 5 55 0
+	mov	x2, 32
+	.loc 5 49 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -96
+	.cfi_offset 20, -88
+	mov	x19, x1
+	.loc 5 55 0
+	adrp	x1, .LANCHOR1
+.LVL154:
+	add	x1, x1, :lo12:.LANCHOR1
+	.loc 5 49 0
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -64
+	.cfi_offset 24, -56
+	mov	x23, x0
+	stp	x21, x22, [sp, 32]
+	.loc 5 55 0
+	add	x0, x29, 80
+.LVL155:
+	.loc 5 49 0
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 21, -80
+	.cfi_offset 22, -72
+	.cfi_offset 25, -48
+	.cfi_offset 26, -40
+	.loc 5 55 0
+	bl	memcpy
+.LVL156:
+	.loc 5 60 0
+	adrp	x0, .LC22
+	add	x0, x0, :lo12:.LC22
+	bl	printf
+.LVL157:
+.LBB29:
+.LBB30:
+.LBB31:
+	.loc 5 19 0
+	mov	x0, 520
+	movk	x0, 0xff01, lsl 16
+	ldr	w20, [x0]
+.LVL158:
+#APP
+// 19 "cmd/ddr_tool/diagonalscan.c" 1
+	dmb sy
+// 0 "" 2
+.LVL159:
+#NO_APP
+.LBE31:
+.LBE30:
+.LBE29:
+	.loc 5 75 0
+	mov	x2, 32
+	add	x1, x29, 80
+	mov	x0, x23
+	bl	memcpy
+.LVL160:
+.LBB34:
+.LBB32:
+	.loc 5 40 0
+	ubfx	x0, x20, 9, 2
+	.loc 5 41 0
+	ubfx	x20, x20, 2, 2
+.LVL161:
+	.loc 5 40 0
+	add	w0, w0, 9
+	.loc 5 41 0
+	mov	w1, 2
+	asr	w20, w1, w20
+.LBE32:
+.LBE34:
+	.loc 5 76 0
+	lsr	x24, x19, 1
+.LBB35:
+.LBB33:
+	.loc 5 43 0
+	add	w0, w0, w20
+	sub	x19, x19, #32
+.LVL162:
+	mov	w25, 1
+	add	x19, x19, x23
+.LVL163:
+	lsl	w25, w25, w0
+.LBE33:
+.LBE35:
+	.loc 5 76 0
+	mov	w21, 0
+	mov	x20, 0
+.LVL164:
+.L90:
+	.loc 5 76 0 is_stmt 0 discriminator 1
+	cmp	x20, x24
+	bcc	.L94
+	mov	x0, 0
+	b	.L91
+.L94:
+	.loc 5 77 0 is_stmt 1
+	uxtw	x22, w21
+	mov	x2, 32
+	sub	x26, x19, x22
+	add	x1, x29, 80
+	mov	x0, x26
+	bl	memcpy
+.LVL165:
+	.loc 5 80 0
+	add	x2, x20, x23
+	.loc 5 79 0
+	mov	x3, 32
+	mov	w4, 1
+	add	x2, x2, x22
+	mov	w1, w3
+	add	x0, x29, 80
+	bl	cmp_buf_data
+.LVL166:
+	.loc 5 81 0
+	cbnz	x0, .L91
+	.loc 5 84 0
+	add	x22, x22, 40
+	add	x20, x20, x25
+.LVL167:
+	cmp	x25, x22
+	add	w21, w21, 8
+.LVL168:
+	csel	w21, w21, wzr, cs
+.LVL169:
+	.loc 5 86 0
+	cmp	x24, x20
+	bls	.L93
+	.loc 5 87 0
+	add	x0, x23, x20
+.LVL170:
+	mov	x2, 32
+	add	x1, x29, 80
+	add	x0, x0, x21, uxtw
+	bl	memcpy
+.LVL171:
+.L93:
+	.loc 5 89 0
+	mov	x3, 32
+	mov	w4, 1
+	mov	x2, x26
+	mov	w1, w3
+	add	x0, x29, 80
+	sub	x19, x19, x25
+	bl	cmp_buf_data
+.LVL172:
+	.loc 5 92 0
+	cbz	x0, .L90
+.LVL173:
+.L91:
+	.loc 5 100 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+.LVL174:
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 112
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE271:
+	.size	diagonalscan, .-diagonalscan
+	.section	.text.do_ddr_test,"ax",@progbits
+	.align	2
+	.type	do_ddr_test, %function
+do_ddr_test:
+.LFB258:
+	.loc 1 190 0
+	.cfi_startproc
+.LVL175:
+	stp	x29, x30, [sp, -240]!
+	.cfi_def_cfa_offset 240
+	.cfi_offset 29, -240
+	.cfi_offset 30, -232
+.LBB40:
+.LBB41:
+	.loc 1 50 0
+	mov	x0, 0
+.LVL176:
+.LBE41:
+.LBE40:
+	.loc 1 190 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -208
+	.cfi_offset 22, -200
+	mov	w22, w2
+	stp	x19, x20, [sp, 16]
+.LBB48:
+.LBB42:
+	.loc 1 50 0
+	mov	x2, x18
+.LVL177:
+.LBE42:
+.LBE48:
+	.loc 1 190 0
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 19, -224
+	.cfi_offset 20, -216
+	.cfi_offset 25, -176
+	.cfi_offset 26, -168
+.LBB49:
+.LBB43:
+	.loc 1 52 0
+	add	x20, x29, 136
+.LBE43:
+.LBE49:
+	.loc 1 190 0
+	mov	x25, x3
+.LBB50:
+.LBB44:
+	.loc 1 53 0
+	add	x21, x29, 168
+.LBE44:
+.LBE50:
+	.loc 1 190 0
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -192
+	.cfi_offset 24, -184
+.LBB51:
+.LBB45:
+	.loc 1 47 0
+	mov	w24, 0
+.LBE45:
+.LBE51:
+	.loc 1 190 0
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 27, -160
+	.cfi_offset 28, -152
+	.loc 1 193 0
+	stp	xzr, xzr, [x29, 200]
+	stp	xzr, xzr, [x29, 216]
+	str	xzr, [x29, 232]
+.LVL178:
+.L99:
+.LBB52:
+.LBB46:
+	.loc 1 50 0
+	ldr	x1, [x2]
+	ubfiz	x3, x0, 4, 32
+	.loc 1 52 0
+	str	xzr, [x20, x0, lsl 3]
+	.loc 1 50 0
+	add	x1, x1, x3
+	.loc 1 53 0
+	str	xzr, [x21, x0, lsl 3]
+	.loc 1 50 0
+	ldr	x1, [x1, 136]
+	cmp	x1, 0
+	csinc	w24, w24, w0, eq
+.LVL179:
+	add	x0, x0, 1
+.LVL180:
+	.loc 1 49 0
+	cmp	x0, 4
+	bne	.L99
+	mov	x0, 0
+.L100:
+.LVL181:
+	.loc 1 56 0
+	cmp	w0, w24
+	bcc	.L101
+	.loc 1 61 0
+	sub	w1, w24, #1
+	ldr	x0, [x2, 128]
+.LVL182:
+	lsl	x1, x1, 3
+	.loc 1 67 0
+	adrp	x26, .LC25
+	.loc 1 61 0
+	sub	x0, x0, #1048576
+	.loc 1 64 0
+	mov	x23, 0
+	.loc 1 67 0
+	add	x26, x26, :lo12:.LC25
+	.loc 1 61 0
+	ldr	x2, [x20, x1]
+	sub	x0, x0, x2
+	.loc 1 62 0
+	and	x0, x0, -4096
+	.loc 1 61 0
+	str	x0, [x21, x1]
+	.loc 1 63 0
+	adrp	x0, .LC23
+	add	x0, x0, :lo12:.LC23
+	bl	printf
+.LVL183:
+	.loc 1 64 0
+	adrp	x0, .LC24
+	add	x0, x0, :lo12:.LC24
+	bl	printf
+.LVL184:
+.L102:
+	.loc 1 65 0
+	cmp	w24, w23
+	bhi	.L104
+.LVL185:
+.LBE46:
+.LBE52:
+	.loc 1 205 0
+	cmp	w22, 1
+	ble	.L214
+	.loc 1 209 0
+	adrp	x0, .LANCHOR2
+	add	x26, x0, :lo12:.LANCHOR2
+	mov	x24, 0
+	str	x0, [x29, 120]
+.L107:
+	ldr	x1, [x26, x24, lsl 3]
+	mov	w23, w24
+.LVL186:
+	ldr	x0, [x25, 8]
+	bl	strcasecmp
+.LVL187:
+	cbz	w0, .L106
+.LVL188:
+	add	x24, x24, 1
+	.loc 1 208 0 discriminator 2
+	cmp	x24, 7
+	bne	.L107
+	.loc 1 216 0
+	adrp	x0, .LC37
+	add	x0, x0, :lo12:.LC37
+	b	.L215
+.LVL189:
+.L101:
+.LBB53:
+.LBB47:
+	.loc 1 57 0
+	ubfiz	x1, x0, 4, 32
+	ldr	x3, [x2]
+	add	x1, x1, 128
+	add	x3, x3, x1
+	ldr	x3, [x3, 8]
+	str	x3, [x20, x0, lsl 3]
+	.loc 1 58 0
+	ldr	x3, [x2]
+	add	x1, x3, x1
+	ldr	x1, [x1, 16]
+	str	x1, [x21, x0, lsl 3]
+.LVL190:
+	add	x0, x0, 1
+.LVL191:
+	b	.L100
+.LVL192:
+.L104:
+	.loc 1 66 0
+	ldr	x1, [x20, x23, lsl 3]
+	cbz	x1, .L103
+	.loc 1 67 0
+	ldr	x3, [x21, x23, lsl 3]
+	mov	x0, x26
+	add	x2, x1, x3
+	bl	printf
+.LVL193:
+.L103:
+	add	x23, x23, 1
+.LVL194:
+	b	.L102
+.LVL195:
+.L150:
+.LBE47:
+.LBE53:
+	.loc 1 221 0
+	adrp	x0, .LC26
+	add	x0, x0, :lo12:.LC26
+.LVL196:
+.L215:
+	.loc 1 216 0
+	bl	printf
+.LVL197:
+.L214:
+	.loc 1 217 0
+	mov	w22, -1
+	b	.L97
+.LVL198:
+.L110:
+	.loc 1 226 0
+	add	x0, x25, x26
+	add	x1, x29, 200
+	add	x2, x1, x26
+	mov	w1, 0
+	add	x26, x26, 8
+	ldr	x0, [x0, 16]
+	bl	strict_strtoul
+.LVL199:
+	tbz	w0, #31, .L109
+	.loc 1 227 0
+	adrp	x0, .LC27
+	add	x0, x0, :lo12:.LC27
+	b	.L215
+.LVL200:
+.L111:
+	.loc 1 247 0
+	cbnz	w23, .L112
+	.loc 1 249 0
+	ldr	x0, [x29, 208]
+.LVL201:
+	cbz	x0, .L113
+	.loc 1 250 0
+	bl	set_vdd_logic
+.LVL202:
+.L113:
+	.loc 1 251 0
+	ldr	x0, [x29, 200]
+	bl	set_ddr_freq
+.LVL203:
+.L114:
+	.loc 1 384 0
+	adrp	x0, .LC36
+	add	x0, x0, :lo12:.LC36
+	bl	printf
+.LVL204:
+	b	.L97
+.LVL205:
+.L112:
+	.loc 1 252 0
+	cmp	w23, 1
+	bne	.L115
+	.loc 1 254 0
+	ldr	x0, [x29, 224]
+.LVL206:
+	cbz	x0, .L116
+	.loc 1 255 0
+	bl	set_vdd_logic
+.LVL207:
+.L116:
+	.loc 1 256 0
+	ldr	w0, [x29, 200]
+	ldr	w1, [x29, 208]
+	ldr	x2, [x29, 216]
+	bl	scan_freq
+.LVL208:
+	b	.L114
+.LVL209:
+.L115:
+	.loc 1 257 0
+	sub	w24, w24, #5
+	cmp	w24, 1
+	bls	.L117
+.LVL210:
+.LBB54:
+.LBB55:
+	.loc 1 79 0
+	ldr	x0, [x29, 144]
+.LVL211:
+	.loc 1 82 0
+	ldr	x3, [x29, 224]
+	.loc 1 79 0
+	cmp	x0, 0
+	ldr	x0, [x29, 152]
+	ldr	x1, [x29, 160]
+	cset	w24, ne
+	.loc 1 80 0
+	cmp	x0, 0
+	mov	w0, 3
+	csinc	w0, w0, w24, ne
+.LVL212:
+	cmp	x1, 0
+	mov	w1, 4
+	csel	w0, w0, w1, eq
+.LVL213:
+	.loc 1 82 0
+	cbnz	x3, .L209
+	.loc 1 83 0
+	mov	w24, w0
+.LVL214:
+.L134:
+.LBE55:
+.LBE54:
+	.loc 1 342 0
+	ldr	x0, [x29, 200]
+	bl	set_ddr_freq
+.LVL215:
+	.loc 1 344 0
+	ldr	x0, [x29, 232]
+	cbz	x0, .L140
+	.loc 1 345 0
+	bl	set_vdd_logic
+.LVL216:
+.L140:
+	.loc 1 349 0
+	adrp	x26, .LC34
+	mov	w25, 0
+.LVL217:
+	add	x26, x26, :lo12:.LC34
+	b	.L148
+.LVL218:
+.L117:
+	.loc 1 259 0
+	ldr	x0, [x29, 224]
+.LVL219:
+	cbz	x0, .L123
+	.loc 1 260 0
+	bl	set_vdd_logic
+.LVL220:
+.L123:
+	.loc 1 261 0
+	cmp	w23, 5
+	bne	.L155
+	.loc 1 262 0
+	ldr	x1, [x29, 168]
+	mov	x0, 65535
+	movk	x0, 0x9f, lsl 16
+	cmp	x1, x0
+	bhi	.L125
+	.loc 1 263 0
+	lsr	x2, x1, 20
+	adrp	x0, .LC30
+	mov	w1, 10
+	add	x0, x0, :lo12:.LC30
+	bl	printf
+.LVL221:
+.L211:
+	.loc 1 272 0
+	mov	w27, 60
+.LVL222:
+.L124:
+	.loc 1 280 0
+	adrp	x0, .LC31
+	add	x0, x0, :lo12:.LC31
+	.loc 1 284 0
+	adrp	x28, .LC32
+	.loc 1 280 0
+	str	x0, [x29, 112]
+	.loc 1 277 0
+	mov	w26, 0
+	.loc 1 284 0
+	add	x0, x28, :lo12:.LC32
+	str	x0, [x29, 104]
+.LVL223:
+.L126:
+	.loc 1 278 0
+	ldr	x0, [x29, 216]
+	cbz	x0, .L132
+	.loc 1 278 0 is_stmt 0 discriminator 1
+	cmp	x0, x26, uxtw
+	bls	.L114
+.L132:
+	.loc 1 280 0 is_stmt 1
+	ldr	x0, [x29, 112]
+	.loc 1 279 0
+	add	w26, w26, 1
+.LVL224:
+	.loc 1 280 0
+	mov	w1, w26
+	mov	x25, 0
+	bl	printf
+.LVL225:
+.L130:
+	.loc 1 282 0
+	ldr	x23, [x20, x25, lsl 3]
+	cbz	x23, .L127
+	.loc 1 284 0
+	ldr	x0, [x29, 104]
+	mov	x2, x23
+	ldr	x24, [x21, x25, lsl 3]
+	mov	w1, w25
+	mov	x3, x24
+	bl	printf
+.LVL226:
+	.loc 1 286 0
+	ldr	x0, [x29, 208]
+	bl	set_ddr_freq
+.LVL227:
+	.loc 1 287 0
+	mov	x1, x24
+	mov	x0, x23
+	bl	random_test
+.LVL228:
+	mov	w28, w0
+.LVL229:
+	.loc 1 289 0
+	cbnz	w0, .L156
+	.loc 1 290 0
+	mov	x1, x24
+	mov	x0, x23
+.LVL230:
+	bl	crosstalk
+.LVL231:
+	mov	w28, w0
+.LVL232:
+	.loc 1 294 0
+	cbnz	w0, .L157
+	.loc 1 295 0
+	mov	x1, x24
+	mov	x0, x23
+.LVL233:
+	bl	diagonalscan
+.LVL234:
+	mov	w28, w0
+.LVL235:
+	.loc 1 299 0
+	cbnz	w0, .L158
+	.loc 1 300 0
+	ldr	w0, [x29, 200]
+.LVL236:
+	and	x2, x27, 1020
+	ldr	w1, [x29, 208]
+	.loc 1 303 0
+	mov	w19, 1
+	.loc 1 300 0
+	bl	scan_freq
+.LVL237:
+	mov	w28, w0
+.LVL238:
+.L128:
+	.loc 1 305 0
+	ldr	x0, [x29, 200]
+.LVL239:
+	bl	set_ddr_freq
+.LVL240:
+	.loc 1 306 0
+	cbnz	w28, .L159
+	.loc 1 307 0
+	mov	x1, x24
+	mov	x0, x23
+	bl	random_test
+.LVL241:
+	mov	w2, w0
+.LVL242:
+	.loc 1 311 0
+	cbnz	w0, .L160
+	str	w2, [x29, 100]
+	.loc 1 312 0
+	mov	x1, x24
+	mov	x0, x23
+.LVL243:
+	bl	crosstalk
+.LVL244:
+	.loc 1 316 0
+	ldr	w2, [x29, 100]
+	.loc 1 312 0
+	mov	w19, w0
+.LVL245:
+	.loc 1 316 0
+	cbnz	w0, .L161
+	.loc 1 317 0
+	mov	x1, x24
+	mov	x0, x23
+.LVL246:
+	bl	diagonalscan
+.LVL247:
+	mov	w28, w0
+.LVL248:
+	.loc 1 322 0
+	cbnz	w0, .L162
+	.loc 1 324 0
+	bl	ctrlc
+.LVL249:
+	cbnz	w0, .L163
+	.loc 1 319 0
+	mov	w19, 4
+.LVL250:
+.L127:
+	add	x25, x25, 1
+.LVL251:
+	.loc 1 281 0 discriminator 2
+	cmp	x25, 4
+	bne	.L130
+	mov	w2, 0
+	mov	w28, 0
+.LVL252:
+.L129:
+	.loc 1 329 0
+	orr	w2, w28, w2
+.LVL253:
+	cbz	w2, .L126
+.LVL254:
+.L131:
+	.loc 1 381 0
+	cbz	w28, .L114
+	.loc 1 382 0
+	ldr	x0, [x29, 120]
+	add	x0, x0, :lo12:.LANCHOR2
+	ldr	x1, [x0, w19, sxtw 3]
+	adrp	x0, .LC35
+	add	x0, x0, :lo12:.LC35
+	bl	printf
+.LVL255:
+	b	.L97
+.LVL256:
+.L125:
+	.loc 1 266 0
+	mov	x0, 10485760
+	.loc 1 268 0
+	stp	xzr, xzr, [x29, 144]
+	.loc 1 266 0
+	stp	xzr, x0, [x29, 160]
+.LVL257:
+	.loc 1 269 0
+	stp	xzr, xzr, [x29, 176]
+.LVL258:
+	str	xzr, [x29, 192]
+	b	.L211
+.LVL259:
+.L155:
+	.loc 1 274 0
+	mov	w27, 1000
+	b	.L124
+.LVL260:
+.L156:
+	.loc 1 288 0
+	mov	w19, 2
+	b	.L128
+.LVL261:
+.L157:
+	.loc 1 292 0
+	mov	w19, 3
+	b	.L128
+.LVL262:
+.L158:
+	.loc 1 297 0
+	mov	w19, 4
+	b	.L128
+.LVL263:
+.L159:
+	mov	w2, 0
+	b	.L129
+.LVL264:
+.L160:
+	.loc 1 307 0
+	mov	w28, w0
+	mov	w2, 0
+	.loc 1 309 0
+	mov	w19, 2
+	b	.L129
+.LVL265:
+.L161:
+	.loc 1 312 0
+	mov	w28, w0
+	.loc 1 314 0
+	mov	w19, 3
+	b	.L129
+.LVL266:
+.L162:
+	mov	w2, w19
+.LVL267:
+.L212:
+	.loc 1 319 0
+	mov	w19, 4
+	b	.L129
+.L163:
+	.loc 1 325 0
+	mov	w2, -1
+	b	.L212
+.LVL268:
+.L209:
+.LBB58:
+.LBB56:
+	.loc 1 86 0
+	ldr	x4, [x29, 216]
+	.loc 1 87 0
+	mov	x1, 0
+	mov	w24, 0
+	.loc 1 88 0
+	mov	w6, 1
+	.loc 1 87 0
+	add	x5, x3, x4
+.LVL269:
+.L136:
+	.loc 1 86 0
+	ldr	x2, [x20, x1, lsl 3]
+	cmp	x4, x2
+	bcc	.L135
+	.loc 1 87 0
+	ldr	x7, [x21, x1, lsl 3]
+	add	x2, x2, x7
+	.loc 1 88 0
+	cmp	x5, x2
+	csel	w24, w24, w6, hi
+.LVL270:
+.L135:
+	add	x1, x1, 1
+.LVL271:
+	.loc 1 85 0
+	cmp	w0, w1
+	bhi	.L136
+	.loc 1 89 0
+	cbnz	w24, .L137
+	.loc 1 90 0
+	adrp	x0, .LC33
+	add	x0, x0, :lo12:.LC33
+	bl	printf
+.LVL272:
+.L138:
+.LBE56:
+.LBE58:
+	.loc 1 339 0
+	cbnz	w24, .L134
+	.loc 1 340 0
+	mov	w22, 1
+.LVL273:
+	b	.L97
+.LVL274:
+.L137:
+.LBB59:
+.LBB57:
+	.loc 1 92 0
+	str	x4, [x29, 136]
+	.loc 1 94 0
+	cmp	w0, 1
+	.loc 1 93 0
+	str	x3, [x29, 168]
+.LVL275:
+	.loc 1 94 0
+	beq	.L138
+	.loc 1 95 0
+	str	xzr, [x29, 144]
+	.loc 1 94 0
+	cmp	w0, 2
+	.loc 1 96 0
+	str	xzr, [x29, 176]
+.LVL276:
+	.loc 1 94 0
+	beq	.L138
+	.loc 1 95 0
+	str	xzr, [x29, 152]
+	.loc 1 94 0
+	cmp	w0, 4
+	.loc 1 96 0
+	str	xzr, [x29, 184]
+.LVL277:
+	.loc 1 94 0
+	bne	.L138
+	.loc 1 95 0
+	str	xzr, [x29, 160]
+	.loc 1 96 0
+	str	xzr, [x29, 192]
+.LVL278:
+	b	.L138
+.LVL279:
+.L149:
+.LBE57:
+.LBE59:
+	.loc 1 350 0
+	mov	x27, 0
+	.loc 1 348 0
+	add	w25, w25, 1
+.LVL280:
+	.loc 1 349 0
+	mov	w1, w25
+	mov	x0, x26
+	bl	printf
+.LVL281:
+.L141:
+	.loc 1 350 0 discriminator 1
+	cmp	w24, w27
+	bhi	.L147
+	mov	w0, 0
+	mov	w28, 0
+.LVL282:
+.L146:
+	.loc 1 376 0
+	orr	w0, w28, w0
+.LVL283:
+	cbnz	w0, .L131
+.LVL284:
+.L148:
+	.loc 1 347 0
+	ldr	x0, [x29, 208]
+	cbz	x0, .L149
+	.loc 1 347 0 is_stmt 0 discriminator 1
+	cmp	x0, x25, uxtw
+	bhi	.L149
+	b	.L114
+.LVL285:
+.L147:
+	.loc 1 357 0 is_stmt 1
+	ldr	x1, [x21, x27, lsl 3]
+	.loc 1 351 0
+	cmp	w23, 3
+	.loc 1 357 0
+	ldr	x0, [x20, x27, lsl 3]
+	.loc 1 351 0
+	beq	.L143
+	cmp	w23, 4
+	beq	.L144
+	.loc 1 353 0
+	bl	random_test
+.LVL286:
+.L213:
+	.loc 1 361 0
+	mov	w28, w0
+.LVL287:
+	.loc 1 369 0
+	bl	ctrlc
+.LVL288:
+	cbnz	w0, .L166
+	add	x27, x27, 1
+.LVL289:
+	mov	w19, w23
+	.loc 1 373 0
+	cbz	w28, .L141
+.LVL290:
+	mov	w19, w23
+.LVL291:
+	b	.L146
+.LVL292:
+.L143:
+	.loc 1 357 0
+	bl	crosstalk
+.LVL293:
+	b	.L213
+.L144:
+	.loc 1 361 0
+	bl	diagonalscan
+.LVL294:
+	b	.L213
+.LVL295:
+.L166:
+	mov	w19, w23
+	.loc 1 370 0
+	mov	w0, -1
+	b	.L146
+.LVL296:
+.L106:
+	.loc 1 220 0
+	adrp	x0, .LANCHOR3
+	add	x0, x0, :lo12:.LANCHOR3
+	ldrb	w0, [x0, w24, sxtw]
+	cmp	w22, w0
+	blt	.L150
+	sub	w22, w22, #2
+.LVL297:
+	.loc 1 220 0 is_stmt 0 discriminator 1
+	mov	x26, 0
+	lsl	x22, x22, 3
+.LVL298:
+.L109:
+	.loc 1 225 0 is_stmt 1 discriminator 1
+	cmp	x26, x22
+	bne	.L110
+	.loc 1 232 0
+	ldp	x2, x3, [x29, 200]
+	mov	w1, w23
+	ldp	x4, x5, [x29, 216]
+	adrp	x0, .LC28
+	ldr	x6, [x29, 232]
+	add	x0, x0, :lo12:.LC28
+	bl	printf
+.LVL299:
+	.loc 1 238 0
+	add	x2, x29, 128
+	mov	w1, 0
+	mov	w0, 53
+	bl	uclass_get_device
+.LVL300:
+	mov	w22, w0
+.LVL301:
+	.loc 1 239 0
+	cbz	w0, .L111
+	.loc 1 240 0
+	mov	w1, w0
+	adrp	x0, .LC29
+.LVL302:
+	add	x0, x0, :lo12:.LC29
+	bl	printf
+.LVL303:
+.L97:
+	.loc 1 387 0
+	mov	w0, w22
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 240
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE258:
+	.size	do_ddr_test, .-do_ddr_test
+	.section	.text.print_memory,"ax",@progbits
+	.align	2
+	.global	print_memory
+	.type	print_memory, %function
+print_memory:
+.LFB278:
+	.loc 3 81 0
+	.cfi_startproc
+.LVL304:
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	mov	x20, x0
+.LVL305:
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -16
+	.cfi_offset 22, -8
+	.loc 3 86 0
+	adrp	x21, .LC38
+	.loc 3 85 0
+	lsr	x22, x1, 2
+	.loc 3 86 0
+	add	x21, x21, :lo12:.LC38
+	.loc 3 85 0
+	mov	w19, 0
+.LVL306:
+.L217:
+	.loc 3 85 0 is_stmt 0 discriminator 1
+	uxtw	x1, w19
+	cmp	x1, x22
+	bcc	.L218
+	.loc 3 89 0 is_stmt 1
+	ldp	x19, x20, [sp, 16]
+.LVL307:
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL308:
+.L218:
+	.cfi_restore_state
+	.loc 3 87 0 discriminator 3
+	add	w3, w19, 3
+	add	w2, w19, 2
+	add	w0, w19, 1
+	lsl	x1, x1, 2
+	.loc 3 85 0 discriminator 3
+	add	w19, w19, 4
+.LVL309:
+	.loc 3 86 0 discriminator 3
+	ldr	w5, [x20, x3, lsl 2]
+	ldr	w4, [x20, x2, lsl 2]
+	ldr	w3, [x20, x0, lsl 2]
+	mov	x0, x21
+	ldr	w2, [x20, x1]
+	add	x1, x20, x1
+	bl	printf
+.LVL310:
+	b	.L217
+	.cfi_endproc
+.LFE278:
+	.size	print_memory, .-print_memory
+	.global	_u_boot_list_2_cmd_2_ddr_test
+	.section	.rodata
+	.align	3
+	.set	.LANCHOR1,. + 0
+.LC0:
+	.word	1437226410
+	.word	-1437226411
+	.word	1515890085
+	.word	-1515890086
+	.word	-267448336
+	.word	267448335
+	.word	0
+	.word	-1
+	.section	.rodata.cmp_buf_data.str1.1,"aMS",@progbits,1
+.LC16:
+	.string	"test fail:address:0x%lx,read:0x%lx,reread:0x%lx,expect:0x%lx\n"
+	.section	.rodata.crosstalk.str1.1,"aMS",@progbits,1
+.LC17:
+	.string	"\nbitflip:   \n"
+.LC18:
+	.string	"\b\b\b%3u"
+.LC19:
+	.string	"%3u\b\b\b"
+.LC20:
+	.string	"\nISI:\n"
+.LC21:
+	.string	"malloc %lu byte fail\n"
+	.section	.rodata.diagonalscan.str1.1,"aMS",@progbits,1
+.LC22:
+	.string	"\nDiagonalScan\n"
+	.section	.rodata.do_ddr_test.str1.1,"aMS",@progbits,1
+.LC23:
+	.string	"available memory for test:\n"
+.LC24:
+	.string	"\tstart\t\t end\tlength\n"
+.LC25:
+	.string	"\t0x%08lx - 0x%08lx 0x%08lx\n"
+.LC26:
+	.string	"test parameters error\n"
+.LC27:
+	.string	"test pattern error\n"
+.LC28:
+	.string	"test pattern:%d, arg:0x%lx,0x%lx,0x%lx,0x%lx,0x%lx\n"
+.LC29:
+	.string	"rockchip dmc probe fail: %d\n"
+.LC30:
+	.string	"fasttest need %uMB, but actually only %luMB\n"
+.LC31:
+	.string	"\rtimes:%08u:\n"
+.LC32:
+	.string	"loop:%d, start:0x%lx, len:0x%lx\n"
+.LC33:
+	.string	"Invalid test address\n"
+.LC34:
+	.string	"\rtimes:%08u, "
+.LC35:
+	.string	"\n%s test fail\n"
+.LC36:
+	.string	"\ntest pass\n"
+.LC37:
+	.string	"test pattern unsupported\n"
+	.section	.rodata.g_isi_pattern,"a",@progbits
+	.align	3
+	.set	.LANCHOR0,. + 0
+	.type	g_isi_pattern, %object
+	.size	g_isi_pattern, 128
+g_isi_pattern:
+	.word	-1
+	.word	0
+	.word	-1
+	.word	0
+	.word	-1
+	.word	0
+	.word	-1
+	.word	-1
+	.word	-1
+	.word	-1
+	.word	0
+	.word	-1
+	.word	-1
+	.word	-1
+	.word	-1
+	.word	0
+	.word	-1
+	.word	0
+	.word	-1
+	.word	0
+	.word	-1
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	-1
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.section	.rodata.print_memory.str1.1,"aMS",@progbits,1
+.LC38:
+	.string	"0x%08lx: 0x%08x, 0x%08x, 0x%08x, 0x%08x\n"
+	.section	.rodata.random_test.str1.1,"aMS",@progbits,1
+.LC5:
+	.string	"%u"
+.LC6:
+	.string	"\b"
+.LC7:
+	.string	" "
+.LC8:
+	.string	"\nrandom test1 fail:address:0x%lx,read:0x%x,reread:0x%x,expect:0x%x\n"
+.LC9:
+	.string	"%4lu"
+.LC10:
+	.string	"\b\b\b\b"
+.LC11:
+	.string	"    "
+.LC12:
+	.string	"\nrandom test2 fail:address:0x%lx,read:0x%lx,reread:0x%lx,expect:0x%lx\n"
+	.section	.rodata.scan_freq.str1.1,"aMS",@progbits,1
+.LC13:
+	.string	"% d:change freq to %d Hz\n"
+.LC14:
+	.string	"\tchange freq success: %d Hz\n"
+.LC15:
+	.string	"check data fail at %d Hz\n"
+	.section	.rodata.set_ddr_freq.str1.1,"aMS",@progbits,1
+.LC1:
+	.string	"current freq:%lu Hz\n"
+	.section	.rodata.set_vdd_logic.str1.1,"aMS",@progbits,1
+.LC2:
+	.string	"vdd_logic"
+.LC3:
+	.string	"Cannot set regulator name\n"
+.LC4:
+	.string	"set vdd_logic fail\n"
+	.section	.rodata.str1.1,"aMS",@progbits,1
+.LC39:
+	.string	"ddr_test"
+.LC40:
+	.string	"for dram simple test\n"
+.LC41:
+	.ascii	"arg1: test pattern include:\n\tchangefreq\n\tscanfreq\n\tran"
+	.ascii	"dom\n\tcrosstalk\n\tdiagonalscan\n\tfast_test\n\tfull_test\n"
+	.ascii	"for changereq: arg2:freq(Hz),arg3[option]:volt\nfor scanfreq"
+	.ascii	": arg2:minfreq(Hz),arg3:maxfreq(Hz),\n\targ4:scanfreq times,"
+	.ascii	" arg5[option]:volt\nfor random, crosstalk and diagonalscan:a"
+	.ascii	"rg2:freq(Hz), arg3:test times,\n\targ4: start addr, arg5:len"
+	.ascii	"gth, arg6[option]:volt\nfor fast_test and full_test:arg2: mi"
+	.ascii	"n_freq(Hz), arg3: max_freq(Hz)\n\targ4: test times, arg5[opt"
+	.ascii	"ion]:volt\n\nfreq: means dram's target frequency,unit:Hz, if"
+	.ascii	" 0:keep current freq\nminfreq, maxfreq: means min and max fr"
+	.ascii	"equency for dram test,unit:Hz\ntest times: test loop, if 0: "
+	.ascii	"endless loop\nstart_adr: start address of memory space for t"
+	.ascii	"esting,unit:physical address\nlength: length of memory space"
+	.ascii	" for testing,unit:Byte, if 0: full memory space test\nvolt: "
+	.ascii	"means target voltage of vdd_logic\n\nexample:\nddr freq chan"
+	.ascii	"ge to:786MHz, vdd_logic:1.05v:\n\t 'ddr_test changefreq 7860"
+	.ascii	"00000 1050000'\nddr freq change to:786MHz, with default vdd_"
+	.ascii	"logic:\n\t 'ddr_test changefreq 786000000'\nscanning ddr fre"
+	.ascii	"quency between 200 and 786MHz for 10 times:\n\t 'ddr_test sc"
+	.ascii	"anfreq 200000000 786000000 100'\ndoing random test 10 times "
+	.ascii	"start from"
+	.string	" physical address 0x200000 and\nlength is 128MB, freq:786MHz, if freq=0 may keep current freq:\n\t 'ddr_test random 786000000 10 0x200000 0x8000000'\ndoing fast test for dram between 200MHz to 786MHz with 10 times:\n\t 'ddr_test fast_test 200000000 786000000 10'"
+.LC42:
+	.string	"changefreq"
+.LC43:
+	.string	"scanfreq"
+.LC44:
+	.string	"random"
+.LC45:
+	.string	"crosstalk"
+.LC46:
+	.string	"diagonalscan"
+.LC47:
+	.string	"fast_test"
+.LC48:
+	.string	"full_test"
+	.section	.rodata.test_pat_param,"a",@progbits
+	.align	3
+	.set	.LANCHOR3,. + 0
+	.type	test_pat_param, %object
+	.size	test_pat_param, 7
+test_pat_param:
+	.byte	3
+	.byte	5
+	.byte	6
+	.byte	6
+	.byte	6
+	.byte	5
+	.byte	5
+	.section	.rodata.test_pattern,"a",@progbits
+	.align	3
+	.set	.LANCHOR2,. + 0
+	.type	test_pattern, %object
+	.size	test_pattern, 56
+test_pattern:
+	.xword	.LC42
+	.xword	.LC43
+	.xword	.LC44
+	.xword	.LC45
+	.xword	.LC46
+	.xword	.LC47
+	.xword	.LC48
+	.section	.u_boot_list_2_cmd_2_ddr_test,"aw",@progbits
+	.align	2
+	.type	_u_boot_list_2_cmd_2_ddr_test, %object
+	.size	_u_boot_list_2_cmd_2_ddr_test, 48
+_u_boot_list_2_cmd_2_ddr_test:
+	.8byte	.LC39
+	.word	7
+	.word	1
+	.8byte	do_ddr_test
+	.8byte	.LC40
+	.8byte	.LC41
+	.8byte	0
+	.text
+.Letext0:
+	.file 6 "include/common.h"
+	.file 7 "./arch/arm/include/asm/types.h"
+	.file 8 "include/linux/types.h"
+	.file 9 "include/errno.h"
+	.file 10 "include/linux/string.h"
+	.file 11 "include/efi.h"
+	.file 12 "include/dm/device.h"
+	.file 13 "include/ide.h"
+	.file 14 "include/linux/list.h"
+	.file 15 "include/part.h"
+	.file 16 "include/flash.h"
+	.file 17 "include/lmb.h"
+	.file 18 "include/asm-generic/u-boot.h"
+	.file 19 "./arch/arm/include/asm/u-boot-arm.h"
+	.file 20 "include/command.h"
+	.file 21 "include/../scripts/dtc/libfdt/fdt.h"
+	.file 22 "include/libfdt_env.h"
+	.file 23 "include/image.h"
+	.file 24 "include/dm/uclass-id.h"
+	.file 25 "./arch/arm/include/asm/global_data.h"
+	.file 26 "include/asm-generic/global_data.h"
+	.file 27 "include/dm/of.h"
+	.file 28 "include/net.h"
+	.file 29 "include/malloc.h"
+	.file 30 "include/dm/ofnode.h"
+	.file 31 "include/linux/compat.h"
+	.file 32 "include/dm/uclass.h"
+	.file 33 "include/console.h"
+	.file 34 "include/stdio_dev.h"
+	.file 35 "include/iomux.h"
+	.file 36 "include/log.h"
+	.file 37 "include/stdio.h"
+	.file 38 "include/vsprintf.h"
+	.file 39 "include/power/regulator.h"
+	.file 40 "include/linux/delay.h"
+	.file 41 "./arch/arm/include/asm/arch/rockchip_dmc.h"
+	.section	.debug_info,"",@progbits
+.Ldebug_info0:
+	.4byte	0x2c16
+	.2byte	0x4
+	.4byte	.Ldebug_abbrev0
+	.byte	0x8
+	.uleb128 0x1
+	.4byte	.LASF486
+	.byte	0xc
+	.4byte	.LASF487
+	.4byte	.LASF488
+	.4byte	.Ldebug_ranges0+0x190
+	.8byte	0
+	.4byte	.Ldebug_line0
+	.uleb128 0x2
+	.4byte	.LASF4
+	.byte	0x6
+	.byte	0xd
+	.4byte	0x34
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x8
+	.4byte	.LASF0
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF1
+	.uleb128 0x4
+	.4byte	0x3b
+	.uleb128 0x3
+	.byte	0x2
+	.byte	0x7
+	.4byte	.LASF2
+	.uleb128 0x5
+	.4byte	.LASF21
+	.byte	0x9
+	.byte	0xc
+	.4byte	0x59
+	.uleb128 0x6
+	.byte	0x4
+	.byte	0x5
+	.string	"int"
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x6
+	.4byte	.LASF3
+	.uleb128 0x2
+	.4byte	.LASF5
+	.byte	0x7
+	.byte	0xc
+	.4byte	0x34
+	.uleb128 0x3
+	.byte	0x2
+	.byte	0x5
+	.4byte	.LASF6
+	.uleb128 0x2
+	.4byte	.LASF7
+	.byte	0x7
+	.byte	0x12
+	.4byte	0x84
+	.uleb128 0x3
+	.byte	0x4
+	.byte	0x7
+	.4byte	.LASF8
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x5
+	.4byte	.LASF9
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF10
+	.uleb128 0x7
+	.string	"u8"
+	.byte	0x7
+	.byte	0x1f
+	.4byte	0x34
+	.uleb128 0x8
+	.4byte	0x99
+	.uleb128 0x7
+	.string	"u32"
+	.byte	0x7
+	.byte	0x25
+	.4byte	0x84
+	.uleb128 0x4
+	.4byte	0xa8
+	.uleb128 0x2
+	.4byte	.LASF11
+	.byte	0x7
+	.byte	0x31
+	.4byte	0x92
+	.uleb128 0x2
+	.4byte	.LASF12
+	.byte	0x7
+	.byte	0x32
+	.4byte	0x92
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF13
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0xe7
+	.uleb128 0x8
+	.4byte	0xd5
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x8
+	.4byte	.LASF14
+	.uleb128 0x8
+	.4byte	0xe0
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x5
+	.4byte	.LASF15
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0xe0
+	.uleb128 0x8
+	.4byte	0xf3
+	.uleb128 0x2
+	.4byte	.LASF16
+	.byte	0x8
+	.byte	0x59
+	.4byte	0x47
+	.uleb128 0x2
+	.4byte	.LASF17
+	.byte	0x8
+	.byte	0x5b
+	.4byte	0x3b
+	.uleb128 0x2
+	.4byte	.LASF18
+	.byte	0x8
+	.byte	0x69
+	.4byte	0x67
+	.uleb128 0x2
+	.4byte	.LASF19
+	.byte	0x8
+	.byte	0x6b
+	.4byte	0x79
+	.uleb128 0x2
+	.4byte	.LASF20
+	.byte	0x8
+	.byte	0x97
+	.4byte	0x79
+	.uleb128 0xa
+	.byte	0x8
+	.uleb128 0x5
+	.4byte	.LASF22
+	.byte	0xa
+	.byte	0xb
+	.4byte	0xf3
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x2
+	.4byte	.LASF23
+	.uleb128 0xb
+	.4byte	0xe0
+	.4byte	0x154
+	.uleb128 0xc
+	.byte	0
+	.uleb128 0xd
+	.4byte	.LASF24
+	.byte	0xb
+	.2byte	0x140
+	.4byte	0x149
+	.uleb128 0xd
+	.4byte	.LASF25
+	.byte	0xb
+	.2byte	0x143
+	.4byte	0x149
+	.uleb128 0xd
+	.4byte	.LASF26
+	.byte	0xb
+	.2byte	0x143
+	.4byte	0x149
+	.uleb128 0xe
+	.4byte	.LASF45
+	.byte	0xa0
+	.byte	0xc
+	.byte	0x80
+	.4byte	0x25d
+	.uleb128 0xf
+	.4byte	.LASF27
+	.byte	0xc
+	.byte	0x81
+	.4byte	0x1505
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF28
+	.byte	0xc
+	.byte	0x82
+	.4byte	0xd5
+	.byte	0x8
+	.uleb128 0xf
+	.4byte	.LASF29
+	.byte	0xc
+	.byte	0x83
+	.4byte	0x135
+	.byte	0x10
+	.uleb128 0xf
+	.4byte	.LASF30
+	.byte	0xc
+	.byte	0x84
+	.4byte	0x135
+	.byte	0x18
+	.uleb128 0xf
+	.4byte	.LASF31
+	.byte	0xc
+	.byte	0x85
+	.4byte	0x135
+	.byte	0x20
+	.uleb128 0xf
+	.4byte	.LASF32
+	.byte	0xc
+	.byte	0x86
+	.4byte	0x14d0
+	.byte	0x28
+	.uleb128 0xf
+	.4byte	.LASF33
+	.byte	0xc
+	.byte	0x87
+	.4byte	0x109
+	.byte	0x30
+	.uleb128 0xf
+	.4byte	.LASF34
+	.byte	0xc
+	.byte	0x88
+	.4byte	0x25d
+	.byte	0x38
+	.uleb128 0xf
+	.4byte	.LASF35
+	.byte	0xc
+	.byte	0x89
+	.4byte	0x135
+	.byte	0x40
+	.uleb128 0xf
+	.4byte	.LASF36
+	.byte	0xc
+	.byte	0x8a
+	.4byte	0x1548
+	.byte	0x48
+	.uleb128 0xf
+	.4byte	.LASF37
+	.byte	0xc
+	.byte	0x8b
+	.4byte	0x135
+	.byte	0x50
+	.uleb128 0xf
+	.4byte	.LASF38
+	.byte	0xc
+	.byte	0x8c
+	.4byte	0x135
+	.byte	0x58
+	.uleb128 0xf
+	.4byte	.LASF39
+	.byte	0xc
+	.byte	0x8d
+	.4byte	0x290
+	.byte	0x60
+	.uleb128 0xf
+	.4byte	.LASF40
+	.byte	0xc
+	.byte	0x8e
+	.4byte	0x290
+	.byte	0x70
+	.uleb128 0xf
+	.4byte	.LASF41
+	.byte	0xc
+	.byte	0x8f
+	.4byte	0x290
+	.byte	0x80
+	.uleb128 0xf
+	.4byte	.LASF42
+	.byte	0xc
+	.byte	0x90
+	.4byte	0x11f
+	.byte	0x90
+	.uleb128 0xf
+	.4byte	.LASF43
+	.byte	0xc
+	.byte	0x91
+	.4byte	0x59
+	.byte	0x94
+	.uleb128 0x10
+	.string	"seq"
+	.byte	0xc
+	.byte	0x92
+	.4byte	0x59
+	.byte	0x98
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x178
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x269
+	.uleb128 0x11
+	.uleb128 0xb
+	.4byte	0x109
+	.4byte	0x275
+	.uleb128 0xc
+	.byte	0
+	.uleb128 0x5
+	.4byte	.LASF44
+	.byte	0xd
+	.byte	0x10
+	.4byte	0x26a
+	.uleb128 0xb
+	.4byte	0x34
+	.4byte	0x290
+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x5
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF46
+	.byte	0x10
+	.byte	0xe
+	.byte	0x16
+	.4byte	0x2b5
+	.uleb128 0xf
+	.4byte	.LASF47
+	.byte	0xe
+	.byte	0x17
+	.4byte	0x2b5
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF48
+	.byte	0xe
+	.byte	0x17
+	.4byte	0x2b5
+	.byte	0x8
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x290
+	.uleb128 0xe
+	.4byte	.LASF49
+	.byte	0x10
+	.byte	0xf
+	.byte	0xf
+	.4byte	0x2e0
+	.uleb128 0xf
+	.4byte	.LASF28
+	.byte	0xf
+	.byte	0x10
+	.4byte	0xf3
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF50
+	.byte	0xf
+	.byte	0x11
+	.4byte	0x2f9
+	.byte	0x8
+	.byte	0
+	.uleb128 0x8
+	.4byte	0x2bb
+	.uleb128 0x13
+	.4byte	0x59
+	.4byte	0x2f9
+	.uleb128 0x14
+	.4byte	0x59
+	.uleb128 0x14
+	.4byte	0x59
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x2e5
+	.uleb128 0xb
+	.4byte	0x2e0
+	.4byte	0x30a
+	.uleb128 0xc
+	.byte	0
+	.uleb128 0x8
+	.4byte	0x2ff
+	.uleb128 0x5
+	.4byte	.LASF49
+	.byte	0xf
+	.byte	0xce
+	.4byte	0x30a
+	.uleb128 0x15
+	.2byte	0x1218
+	.byte	0x10
+	.byte	0x13
+	.4byte	0x361
+	.uleb128 0xf
+	.4byte	.LASF51
+	.byte	0x10
+	.byte	0x14
+	.4byte	0x109
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF52
+	.byte	0x10
+	.byte	0x15
+	.4byte	0xfe
+	.byte	0x8
+	.uleb128 0xf
+	.4byte	.LASF53
+	.byte	0x10
+	.byte	0x16
+	.4byte	0x109
+	.byte	0x10
+	.uleb128 0xf
+	.4byte	.LASF54
+	.byte	0x10
+	.byte	0x17
+	.4byte	0x361
+	.byte	0x18
+	.uleb128 0x16
+	.4byte	.LASF55
+	.byte	0x10
+	.byte	0x18
+	.4byte	0x372
+	.2byte	0x1018
+	.byte	0
+	.uleb128 0xb
+	.4byte	0x109
+	.4byte	0x372
+	.uleb128 0x17
+	.4byte	0xce
+	.2byte	0x1ff
+	.byte	0
+	.uleb128 0xb
+	.4byte	0x29
+	.4byte	0x383
+	.uleb128 0x17
+	.4byte	0xce
+	.2byte	0x1ff
+	.byte	0
+	.uleb128 0x2
+	.4byte	.LASF56
+	.byte	0x10
+	.byte	0x32
+	.4byte	0x31a
+	.uleb128 0xb
+	.4byte	0x383
+	.4byte	0x399
+	.uleb128 0xc
+	.byte	0
+	.uleb128 0x5
+	.4byte	.LASF57
+	.byte	0x10
+	.byte	0x34
+	.4byte	0x38e
+	.uleb128 0x3
+	.byte	0x10
+	.byte	0x4
+	.4byte	.LASF58
+	.uleb128 0xe
+	.4byte	.LASF59
+	.byte	0x10
+	.byte	0x11
+	.byte	0x10
+	.4byte	0x3d0
+	.uleb128 0xf
+	.4byte	.LASF60
+	.byte	0x11
+	.byte	0x11
+	.4byte	0xb8
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF51
+	.byte	0x11
+	.byte	0x12
+	.4byte	0xc3
+	.byte	0x8
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF61
+	.byte	0xa0
+	.byte	0x11
+	.byte	0x15
+	.4byte	0x401
+	.uleb128 0x10
+	.string	"cnt"
+	.byte	0x11
+	.byte	0x16
+	.4byte	0x3b
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF51
+	.byte	0x11
+	.byte	0x17
+	.4byte	0xc3
+	.byte	0x8
+	.uleb128 0xf
+	.4byte	.LASF62
+	.byte	0x11
+	.byte	0x18
+	.4byte	0x401
+	.byte	0x10
+	.byte	0
+	.uleb128 0xb
+	.4byte	0x3ab
+	.4byte	0x411
+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x8
+	.byte	0
+	.uleb128 0x18
+	.string	"lmb"
+	.2byte	0x140
+	.byte	0x11
+	.byte	0x1b
+	.4byte	0x437
+	.uleb128 0xf
+	.4byte	.LASF63
+	.byte	0x11
+	.byte	0x1c
+	.4byte	0x3d0
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF64
+	.byte	0x11
+	.byte	0x1d
+	.4byte	0x3d0
+	.byte	0xa0
+	.byte	0
+	.uleb128 0x19
+	.string	"lmb"
+	.byte	0x11
+	.byte	0x20
+	.4byte	0x411
+	.uleb128 0x1a
+	.byte	0x10
+	.byte	0x12
+	.byte	0x5a
+	.4byte	0x463
+	.uleb128 0xf
+	.4byte	.LASF54
+	.byte	0x12
+	.byte	0x5b
+	.4byte	0xb8
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF51
+	.byte	0x12
+	.byte	0x5c
+	.4byte	0xc3
+	.byte	0x8
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF65
+	.byte	0xc8
+	.byte	0x12
+	.byte	0x1b
+	.4byte	0x554
+	.uleb128 0xf
+	.4byte	.LASF66
+	.byte	0x12
+	.byte	0x1c
+	.4byte	0x3b
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF67
+	.byte	0x12
+	.byte	0x1d
+	.4byte	0xc3
+	.byte	0x8
+	.uleb128 0xf
+	.4byte	.LASF68
+	.byte	0x12
+	.byte	0x1e
+	.4byte	0x3b
+	.byte	0x10
+	.uleb128 0xf
+	.4byte	.LASF69
+	.byte	0x12
+	.byte	0x1f
+	.4byte	0x3b
+	.byte	0x18
+	.uleb128 0xf
+	.4byte	.LASF70
+	.byte	0x12
+	.byte	0x20
+	.4byte	0x3b
+	.byte	0x20
+	.uleb128 0xf
+	.4byte	.LASF71
+	.byte	0x12
+	.byte	0x21
+	.4byte	0x3b
+	.byte	0x28
+	.uleb128 0xf
+	.4byte	.LASF72
+	.byte	0x12
+	.byte	0x22
+	.4byte	0x3b
+	.byte	0x30
+	.uleb128 0xf
+	.4byte	.LASF73
+	.byte	0x12
+	.byte	0x24
+	.4byte	0x3b
+	.byte	0x38
+	.uleb128 0xf
+	.4byte	.LASF74
+	.byte	0x12
+	.byte	0x25
+	.4byte	0x3b
+	.byte	0x40
+	.uleb128 0xf
+	.4byte	.LASF75
+	.byte	0x12
+	.byte	0x26
+	.4byte	0x3b
+	.byte	0x48
+	.uleb128 0xf
+	.4byte	.LASF76
+	.byte	0x12
+	.byte	0x31
+	.4byte	0x3b
+	.byte	0x50
+	.uleb128 0xf
+	.4byte	.LASF77
+	.byte	0x12
+	.byte	0x32
+	.4byte	0x3b
+	.byte	0x58
+	.uleb128 0xf
+	.4byte	.LASF78
+	.byte	0x12
+	.byte	0x33
+	.4byte	0x280
+	.byte	0x60
+	.uleb128 0xf
+	.4byte	.LASF79
+	.byte	0x12
+	.byte	0x34
+	.4byte	0x47
+	.byte	0x66
+	.uleb128 0xf
+	.4byte	.LASF80
+	.byte	0x12
+	.byte	0x35
+	.4byte	0x3b
+	.byte	0x68
+	.uleb128 0xf
+	.4byte	.LASF81
+	.byte	0x12
+	.byte	0x36
+	.4byte	0x3b
+	.byte	0x70
+	.uleb128 0xf
+	.4byte	.LASF82
+	.byte	0x12
+	.byte	0x57
+	.4byte	0x109
+	.byte	0x78
+	.uleb128 0xf
+	.4byte	.LASF83
+	.byte	0x12
+	.byte	0x58
+	.4byte	0x109
+	.byte	0x80
+	.uleb128 0xf
+	.4byte	.LASF84
+	.byte	0x12
+	.byte	0x5d
+	.4byte	0x554
+	.byte	0x88
+	.byte	0
+	.uleb128 0xb
+	.4byte	0x442
+	.4byte	0x564
+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x3
+	.byte	0
+	.uleb128 0x2
+	.4byte	.LASF85
+	.byte	0x12
+	.byte	0x5f
+	.4byte	0x463
+	.uleb128 0x5
+	.4byte	.LASF86
+	.byte	0x13
+	.byte	0x13
+	.4byte	0x109
+	.uleb128 0x5
+	.4byte	.LASF87
+	.byte	0x13
+	.byte	0x14
+	.4byte	0x109
+	.uleb128 0x5
+	.4byte	.LASF88
+	.byte	0x13
+	.byte	0x15
+	.4byte	0x109
+	.uleb128 0x5
+	.4byte	.LASF89
+	.byte	0x13
+	.byte	0x16
+	.4byte	0x109
+	.uleb128 0x5
+	.4byte	.LASF90
+	.byte	0x13
+	.byte	0x17
+	.4byte	0x109
+	.uleb128 0x5
+	.4byte	.LASF91
+	.byte	0x13
+	.byte	0x18
+	.4byte	0x109
+	.uleb128 0x5
+	.4byte	.LASF92
+	.byte	0x13
+	.byte	0x19
+	.4byte	0x109
+	.uleb128 0xe
+	.4byte	.LASF93
+	.byte	0x30
+	.byte	0x14
+	.byte	0x1e
+	.4byte	0x61d
+	.uleb128 0xf
+	.4byte	.LASF28
+	.byte	0x14
+	.byte	0x1f
+	.4byte	0xf3
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF94
+	.byte	0x14
+	.byte	0x20
+	.4byte	0x59
+	.byte	0x8
+	.uleb128 0xf
+	.4byte	.LASF95
+	.byte	0x14
+	.byte	0x21
+	.4byte	0x59
+	.byte	0xc
+	.uleb128 0x10
+	.string	"cmd"
+	.byte	0x14
+	.byte	0x23
+	.4byte	0x647
+	.byte	0x10
+	.uleb128 0xf
+	.4byte	.LASF96
+	.byte	0x14
+	.byte	0x24
+	.4byte	0xf3
+	.byte	0x18
+	.uleb128 0xf
+	.4byte	.LASF97
+	.byte	0x14
+	.byte	0x26
+	.4byte	0xf3
+	.byte	0x20
+	.uleb128 0xf
+	.4byte	.LASF98
+	.byte	0x14
+	.byte	0x2a
+	.4byte	0x676
+	.byte	0x28
+	.byte	0
+	.uleb128 0x13
+	.4byte	0x59
+	.4byte	0x63b
+	.uleb128 0x14
+	.4byte	0x63b
+	.uleb128 0x14
+	.4byte	0x59
+	.uleb128 0x14
+	.4byte	0x59
+	.uleb128 0x14
+	.4byte	0x641
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x5bc
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0xf9
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x61d
+	.uleb128 0x13
+	.4byte	0x59
+	.4byte	0x670
+	.uleb128 0x14
+	.4byte	0x59
+	.uleb128 0x14
+	.4byte	0x641
+	.uleb128 0x14
+	.4byte	0xe0
+	.uleb128 0x14
+	.4byte	0x59
+	.uleb128 0x14
+	.4byte	0x670
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0xf3
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x64d
+	.uleb128 0x2
+	.4byte	.LASF99
+	.byte	0x14
+	.byte	0x2e
+	.4byte	0x5bc
+	.uleb128 0x1b
+	.4byte	.LASF167
+	.byte	0x4
+	.4byte	0x59
+	.byte	0x14
+	.byte	0x7a
+	.4byte	0x6aa
+	.uleb128 0x1c
+	.4byte	.LASF100
+	.byte	0
+	.uleb128 0x1c
+	.4byte	.LASF101
+	.byte	0x1
+	.uleb128 0x1d
+	.4byte	.LASF102
+	.sleb128 -1
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF103
+	.byte	0x28
+	.byte	0x15
+	.byte	0x39
+	.4byte	0x72f
+	.uleb128 0xf
+	.4byte	.LASF104
+	.byte	0x15
+	.byte	0x3a
+	.4byte	0x740
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF105
+	.byte	0x15
+	.byte	0x3b
+	.4byte	0x740
+	.byte	0x4
+	.uleb128 0xf
+	.4byte	.LASF106
+	.byte	0x15
+	.byte	0x3c
+	.4byte	0x740
+	.byte	0x8
+	.uleb128 0xf
+	.4byte	.LASF107
+	.byte	0x15
+	.byte	0x3d
+	.4byte	0x740
+	.byte	0xc
+	.uleb128 0xf
+	.4byte	.LASF108
+	.byte	0x15
+	.byte	0x3e
+	.4byte	0x740
+	.byte	0x10
+	.uleb128 0xf
+	.4byte	.LASF109
+	.byte	0x15
+	.byte	0x3f
+	.4byte	0x740
+	.byte	0x14
+	.uleb128 0xf
+	.4byte	.LASF110
+	.byte	0x15
+	.byte	0x40
+	.4byte	0x740
+	.byte	0x18
+	.uleb128 0xf
+	.4byte	.LASF111
+	.byte	0x15
+	.byte	0x43
+	.4byte	0x740
+	.byte	0x1c
+	.uleb128 0xf
+	.4byte	.LASF112
+	.byte	0x15
+	.byte	0x46
+	.4byte	0x740
+	.byte	0x20
+	.uleb128 0xf
+	.4byte	.LASF113
+	.byte	0x15
+	.byte	0x49
+	.4byte	0x740
+	.byte	0x24
+	.byte	0
+	.uleb128 0x5
+	.4byte	.LASF114
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+	.uleb128 0x21
+	.string	"ep"
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+	.uleb128 0x26
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+	.2byte	0x198
+	.byte	0x1a
+	.byte	0x29
+	.4byte	0xf28
+	.uleb128 0x10
+	.string	"bd"
+	.byte	0x1a
+	.byte	0x2a
+	.4byte	0xa42
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF42
+	.byte	0x1a
+	.byte	0x2b
+	.4byte	0x3b
+	.byte	0x8
+	.uleb128 0xf
+	.4byte	.LASF266
+	.byte	0x1a
+	.byte	0x2c
+	.4byte	0x84
+	.byte	0x10
+	.uleb128 0xf
+	.4byte	.LASF269
+	.byte	0x1a
+	.byte	0x2d
+	.4byte	0x3b
+	.byte	0x18
+	.uleb128 0xf
+	.4byte	.LASF270
+	.byte	0x1a
+	.byte	0x2e
+	.4byte	0x3b
+	.byte	0x20
+	.uleb128 0xf
+	.4byte	.LASF271
+	.byte	0x1a
+	.byte	0x30
+	.4byte	0x3b
+	.byte	0x28
+	.uleb128 0xf
+	.4byte	.LASF272
+	.byte	0x1a
+	.byte	0x31
+	.4byte	0x3b
+	.byte	0x30
+	.uleb128 0xf
+	.4byte	.LASF273
+	.byte	0x1a
+	.byte	0x33
+	.4byte	0x3b
+	.byte	0x38
+	.uleb128 0xf
+	.4byte	.LASF274
+	.byte	0x1a
+	.byte	0x3d
+	.4byte	0x3b
+	.byte	0x40
+	.uleb128 0xf
+	.4byte	.LASF275
+	.byte	0x1a
+	.byte	0x41
+	.4byte	0x3b
+	.byte	0x48
+	.uleb128 0xf
+	.4byte	.LASF276
+	.byte	0x1a
+	.byte	0x42
+	.4byte	0x3b
+	.byte	0x50
+	.uleb128 0xf
+	.4byte	.LASF277
+	.byte	0x1a
+	.byte	0x44
+	.4byte	0x3b
+	.byte	0x58
+	.uleb128 0xf
+	.4byte	.LASF278
+	.byte	0x1a
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+	.4byte	0x3b
+	.byte	0x60
+	.uleb128 0xf
+	.4byte	.LASF279
+	.byte	0x1a
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+	.4byte	0xc3
+	.byte	0x68
+	.uleb128 0xf
+	.4byte	.LASF280
+	.byte	0x1a
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+	.4byte	0x3b
+	.byte	0x70
+	.uleb128 0xf
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+	.byte	0x1a
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+	.4byte	0x3b
+	.byte	0x78
+	.uleb128 0xf
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+	.4byte	0x3b
+	.byte	0x80
+	.uleb128 0xf
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+	.4byte	0x3b
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+	.uleb128 0xf
+	.4byte	.LASF284
+	.byte	0x1a
+	.byte	0x4b
+	.4byte	0xf28
+	.byte	0x90
+	.uleb128 0xf
+	.4byte	.LASF285
+	.byte	0x1a
+	.byte	0x4e
+	.4byte	0x25d
+	.byte	0x98
+	.uleb128 0xf
+	.4byte	.LASF286
+	.byte	0x1a
+	.byte	0x4f
+	.4byte	0x25d
+	.byte	0xa0
+	.uleb128 0xf
+	.4byte	.LASF287
+	.byte	0x1a
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+	.4byte	0x290
+	.byte	0xa8
+	.uleb128 0xf
+	.4byte	.LASF288
+	.byte	0x1a
+	.byte	0x56
+	.4byte	0x263
+	.byte	0xb8
+	.uleb128 0xf
+	.4byte	.LASF289
+	.byte	0x1a
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+	.4byte	0x135
+	.byte	0xc0
+	.uleb128 0xf
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+	.byte	0x1a
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+	.4byte	0x3b
+	.byte	0xc8
+	.uleb128 0xf
+	.4byte	.LASF291
+	.byte	0x1a
+	.byte	0x5a
+	.4byte	0xfa0
+	.byte	0xd0
+	.uleb128 0x10
+	.string	"jt"
+	.byte	0x1a
+	.byte	0x5c
+	.4byte	0xfab
+	.byte	0xd8
+	.uleb128 0xf
+	.4byte	.LASF292
+	.byte	0x1a
+	.byte	0x5d
+	.4byte	0xfb1
+	.byte	0xe0
+	.uleb128 0x16
+	.4byte	.LASF293
+	.byte	0x1a
+	.byte	0x67
+	.4byte	0x84
+	.2byte	0x100
+	.uleb128 0x16
+	.4byte	.LASF294
+	.byte	0x1a
+	.byte	0x68
+	.4byte	0x84
+	.2byte	0x104
+	.uleb128 0x16
+	.4byte	.LASF295
+	.byte	0x1a
+	.byte	0x6a
+	.4byte	0x3b
+	.2byte	0x108
+	.uleb128 0x16
+	.4byte	.LASF296
+	.byte	0x1a
+	.byte	0x6b
+	.4byte	0x3b
+	.2byte	0x110
+	.uleb128 0x16
+	.4byte	.LASF297
+	.byte	0x1a
+	.byte	0x6c
+	.4byte	0x3b
+	.2byte	0x118
+	.uleb128 0x16
+	.4byte	.LASF298
+	.byte	0x1a
+	.byte	0x75
+	.4byte	0x25d
+	.2byte	0x120
+	.uleb128 0x16
+	.4byte	.LASF136
+	.byte	0x1a
+	.byte	0x76
+	.4byte	0xc88
+	.2byte	0x128
+	.uleb128 0x16
+	.4byte	.LASF299
+	.byte	0x1a
+	.byte	0x7c
+	.4byte	0x109
+	.2byte	0x168
+	.uleb128 0x16
+	.4byte	.LASF300
+	.byte	0x1a
+	.byte	0x7d
+	.4byte	0x109
+	.2byte	0x170
+	.uleb128 0x16
+	.4byte	.LASF301
+	.byte	0x1a
+	.byte	0x83
+	.4byte	0xb8
+	.2byte	0x178
+	.uleb128 0x16
+	.4byte	.LASF302
+	.byte	0x1a
+	.byte	0x88
+	.4byte	0xd01
+	.2byte	0x180
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0xd3d
+	.uleb128 0xe
+	.4byte	.LASF303
+	.byte	0x40
+	.byte	0x1b
+	.byte	0x2c
+	.4byte	0xf9b
+	.uleb128 0xf
+	.4byte	.LASF28
+	.byte	0x1b
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+	.4byte	0xd5
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF135
+	.byte	0x1b
+	.byte	0x2e
+	.4byte	0xd5
+	.byte	0x8
+	.uleb128 0xf
+	.4byte	.LASF304
+	.byte	0x1b
+	.byte	0x2f
+	.4byte	0x1448
+	.byte	0x10
+	.uleb128 0xf
+	.4byte	.LASF305
+	.byte	0x1b
+	.byte	0x30
+	.4byte	0xd5
+	.byte	0x18
+	.uleb128 0xf
+	.4byte	.LASF306
+	.byte	0x1b
+	.byte	0x32
+	.4byte	0x1490
+	.byte	0x20
+	.uleb128 0xf
+	.4byte	.LASF34
+	.byte	0x1b
+	.byte	0x33
+	.4byte	0xfa0
+	.byte	0x28
+	.uleb128 0xf
+	.4byte	.LASF307
+	.byte	0x1b
+	.byte	0x34
+	.4byte	0xfa0
+	.byte	0x30
+	.uleb128 0xf
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+	.byte	0x1b
+	.byte	0x35
+	.4byte	0xfa0
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+	.uleb128 0x9
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+	.uleb128 0x27
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+	.uleb128 0x9
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+	.uleb128 0xb
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+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x1f
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+	.uleb128 0x2
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+	.byte	0x1a
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+	.4byte	0xd3d
+	.uleb128 0x4
+	.4byte	0xfc1
+	.uleb128 0x5
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+	.byte	0xab
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+	.uleb128 0xb
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+	.4byte	0xfe7
+	.uleb128 0xc
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+	.uleb128 0x5
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+	.byte	0x6
+	.byte	0xad
+	.4byte	0xfdc
+	.uleb128 0x5
+	.4byte	.LASF312
+	.byte	0x6
+	.byte	0xae
+	.4byte	0xfdc
+	.uleb128 0x5
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+	.byte	0x6
+	.byte	0xfc
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+	.uleb128 0x5
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+	.byte	0xfd
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+	.uleb128 0x5
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+	.uleb128 0xe
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+	.byte	0x4
+	.byte	0x1c
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+	.4byte	0x1037
+	.uleb128 0xf
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+	.byte	0x1c
+	.byte	0x2f
+	.4byte	0x12a
+	.byte	0
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x29
+	.uleb128 0xe
+	.4byte	.LASF318
+	.byte	0x68
+	.byte	0x1c
+	.byte	0xa6
+	.4byte	0x10da
+	.uleb128 0xf
+	.4byte	.LASF28
+	.byte	0x1c
+	.byte	0xa8
+	.4byte	0x10da
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF319
+	.byte	0x1c
+	.byte	0xa9
+	.4byte	0x280
+	.byte	0x10
+	.uleb128 0xf
+	.4byte	.LASF320
+	.byte	0x1c
+	.byte	0xaa
+	.4byte	0xb8
+	.byte	0x18
+	.uleb128 0xf
+	.4byte	.LASF164
+	.byte	0x1c
+	.byte	0xab
+	.4byte	0x59
+	.byte	0x20
+	.uleb128 0xf
+	.4byte	.LASF321
+	.byte	0x1c
+	.byte	0xad
+	.4byte	0x1104
+	.byte	0x28
+	.uleb128 0xf
+	.4byte	.LASF322
+	.byte	0x1c
+	.byte	0xae
+	.4byte	0x1123
+	.byte	0x30
+	.uleb128 0xf
+	.4byte	.LASF323
+	.byte	0x1c
+	.byte	0xaf
+	.4byte	0x1138
+	.byte	0x38
+	.uleb128 0xf
+	.4byte	.LASF324
+	.byte	0x1c
+	.byte	0xb0
+	.4byte	0x1149
+	.byte	0x40
+	.uleb128 0xf
+	.4byte	.LASF325
+	.byte	0x1c
+	.byte	0xb4
+	.4byte	0x1138
+	.byte	0x48
+	.uleb128 0xf
+	.4byte	.LASF47
+	.byte	0x1c
+	.byte	0xb5
+	.4byte	0x10fe
+	.byte	0x50
+	.uleb128 0xf
+	.4byte	.LASF326
+	.byte	0x1c
+	.byte	0xb6
+	.4byte	0x59
+	.byte	0x58
+	.uleb128 0xf
+	.4byte	.LASF35
+	.byte	0x1c
+	.byte	0xb7
+	.4byte	0x135
+	.byte	0x60
+	.byte	0
+	.uleb128 0xb
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+	.uleb128 0x12
+	.4byte	0xce
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+	.uleb128 0x9
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+	.4byte	0x1123
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+	.uleb128 0x14
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+	.uleb128 0x9
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+	.uleb128 0x13
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+	.4byte	0x1138
+	.uleb128 0x14
+	.4byte	0x10fe
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+	.uleb128 0x9
+	.byte	0x8
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+	.uleb128 0x28
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+	.uleb128 0x14
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+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
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+	.uleb128 0x5
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+	.byte	0x1c
+	.byte	0xbd
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+	.uleb128 0x14
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+	.uleb128 0x14
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+	.uleb128 0xd
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+	.uleb128 0x9
+	.byte	0x8
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+	.uleb128 0xb
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+	.4byte	0x118c
+	.uleb128 0x12
+	.4byte	0xce
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+	.uleb128 0xd
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+	.4byte	0x101e
+	.uleb128 0xd
+	.4byte	.LASF330
+	.byte	0x1c
+	.2byte	0x1fe
+	.4byte	0x101e
+	.uleb128 0xd
+	.4byte	.LASF331
+	.byte	0x1c
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+	.4byte	0x101e
+	.uleb128 0xd
+	.4byte	.LASF332
+	.byte	0x1c
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+	.4byte	0xfb1
+	.uleb128 0xd
+	.4byte	.LASF333
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+	.4byte	0xfb1
+	.uleb128 0xb
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+	.4byte	0x11d8
+	.uleb128 0x12
+	.4byte	0xce
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+	.uleb128 0xd
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+	.4byte	0x11c8
+	.uleb128 0xd
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+	.4byte	0x117c
+	.uleb128 0xd
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+	.4byte	0x117c
+	.uleb128 0xd
+	.4byte	.LASF337
+	.byte	0x1c
+	.2byte	0x20b
+	.4byte	0x101e
+	.uleb128 0xd
+	.4byte	.LASF338
+	.byte	0x1c
+	.2byte	0x20c
+	.4byte	0x101e
+	.uleb128 0xd
+	.4byte	.LASF339
+	.byte	0x1c
+	.2byte	0x20d
+	.4byte	0x1037
+	.uleb128 0xb
+	.4byte	0x1037
+	.4byte	0x1230
+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x3
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+	.uleb128 0xd
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+	.byte	0x1c
+	.2byte	0x20e
+	.4byte	0x1220
+	.uleb128 0xd
+	.4byte	.LASF341
+	.byte	0x1c
+	.2byte	0x20f
+	.4byte	0x1037
+	.uleb128 0xd
+	.4byte	.LASF342
+	.byte	0x1c
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+	.uleb128 0xb
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+	.4byte	0x1264
+	.uleb128 0x12
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+	.uleb128 0x8
+	.4byte	0x1254
+	.uleb128 0xd
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+	.4byte	0x1264
+	.uleb128 0xd
+	.4byte	.LASF344
+	.byte	0x1c
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+	.4byte	0x1264
+	.uleb128 0xd
+	.4byte	.LASF345
+	.byte	0x1c
+	.2byte	0x216
+	.4byte	0xfe
+	.uleb128 0xd
+	.4byte	.LASF346
+	.byte	0x1c
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+	.4byte	0xfe
+	.uleb128 0xd
+	.4byte	.LASF347
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+	.uleb128 0xb
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+	.4byte	0x12b6
+	.uleb128 0x17
+	.4byte	0xce
+	.2byte	0x3ff
+	.byte	0
+	.uleb128 0xd
+	.4byte	.LASF348
+	.byte	0x1c
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+	.4byte	0x12a5
+	.uleb128 0xd
+	.4byte	.LASF349
+	.byte	0x1c
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+	.4byte	0xa8
+	.uleb128 0xd
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+	.4byte	0xa8
+	.uleb128 0xd
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+	.uleb128 0x29
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+	.4byte	0x1310
+	.uleb128 0x1c
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+	.byte	0
+	.uleb128 0x1c
+	.4byte	.LASF354
+	.byte	0x1
+	.uleb128 0x1c
+	.4byte	.LASF355
+	.byte	0x2
+	.uleb128 0x1c
+	.4byte	.LASF356
+	.byte	0x3
+	.byte	0
+	.uleb128 0xd
+	.4byte	.LASF357
+	.byte	0x1c
+	.2byte	0x28c
+	.4byte	0x12e6
+	.uleb128 0xd
+	.4byte	.LASF358
+	.byte	0x1d
+	.2byte	0x3ba
+	.4byte	0x109
+	.uleb128 0xd
+	.4byte	.LASF359
+	.byte	0x1d
+	.2byte	0x3bb
+	.4byte	0x109
+	.uleb128 0xd
+	.4byte	.LASF360
+	.byte	0x1d
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+	.uleb128 0xb
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+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x1f
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+	.uleb128 0x2a
+	.4byte	.LASF415
+	.byte	0x4
+	.byte	0xa
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+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_isi_pattern
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0xa8
+	.uleb128 0xe
+	.4byte	.LASF27
+	.byte	0x78
+	.byte	0xc
+	.byte	0xee
+	.4byte	0x1443
+	.uleb128 0xf
+	.4byte	.LASF28
+	.byte	0xc
+	.byte	0xef
+	.4byte	0xf3
+	.byte	0
+	.uleb128 0x10
+	.string	"id"
+	.byte	0xc
+	.byte	0xf0
+	.4byte	0xa60
+	.byte	0x8
+	.uleb128 0xf
+	.4byte	.LASF361
+	.byte	0xc
+	.byte	0xf1
+	.4byte	0x1578
+	.byte	0x10
+	.uleb128 0xf
+	.4byte	.LASF362
+	.byte	0xc
+	.byte	0xf2
+	.4byte	0x158d
+	.byte	0x18
+	.uleb128 0xf
+	.4byte	.LASF363
+	.byte	0xc
+	.byte	0xf3
+	.4byte	0x158d
+	.byte	0x20
+	.uleb128 0xf
+	.4byte	.LASF364
+	.byte	0xc
+	.byte	0xf4
+	.4byte	0x158d
+	.byte	0x28
+	.uleb128 0xf
+	.4byte	.LASF365
+	.byte	0xc
+	.byte	0xf5
+	.4byte	0x158d
+	.byte	0x30
+	.uleb128 0xf
+	.4byte	.LASF366
+	.byte	0xc
+	.byte	0xf6
+	.4byte	0x158d
+	.byte	0x38
+	.uleb128 0xf
+	.4byte	.LASF367
+	.byte	0xc
+	.byte	0xf7
+	.4byte	0x158d
+	.byte	0x40
+	.uleb128 0xf
+	.4byte	.LASF368
+	.byte	0xc
+	.byte	0xf8
+	.4byte	0x158d
+	.byte	0x48
+	.uleb128 0xf
+	.4byte	.LASF369
+	.byte	0xc
+	.byte	0xf9
+	.4byte	0x158d
+	.byte	0x50
+	.uleb128 0xf
+	.4byte	.LASF370
+	.byte	0xc
+	.byte	0xfa
+	.4byte	0x59
+	.byte	0x58
+	.uleb128 0xf
+	.4byte	.LASF371
+	.byte	0xc
+	.byte	0xfb
+	.4byte	0x59
+	.byte	0x5c
+	.uleb128 0xf
+	.4byte	.LASF372
+	.byte	0xc
+	.byte	0xfc
+	.4byte	0x59
+	.byte	0x60
+	.uleb128 0xf
+	.4byte	.LASF373
+	.byte	0xc
+	.byte	0xfd
+	.4byte	0x59
+	.byte	0x64
+	.uleb128 0x10
+	.string	"ops"
+	.byte	0xc
+	.byte	0xfe
+	.4byte	0x263
+	.byte	0x68
+	.uleb128 0xf
+	.4byte	.LASF42
+	.byte	0xc
+	.byte	0xff
+	.4byte	0x11f
+	.byte	0x70
+	.byte	0
+	.uleb128 0x8
+	.4byte	0x136b
+	.uleb128 0x2
+	.4byte	.LASF304
+	.byte	0x1b
+	.byte	0xf
+	.4byte	0xa8
+	.uleb128 0xe
+	.4byte	.LASF374
+	.byte	0x20
+	.byte	0x1b
+	.byte	0x19
+	.4byte	0x1490
+	.uleb128 0xf
+	.4byte	.LASF28
+	.byte	0x1b
+	.byte	0x1a
+	.4byte	0xf3
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF375
+	.byte	0x1b
+	.byte	0x1b
+	.4byte	0x59
+	.byte	0x8
+	.uleb128 0xf
+	.4byte	.LASF376
+	.byte	0x1b
+	.byte	0x1c
+	.4byte	0x135
+	.byte	0x10
+	.uleb128 0xf
+	.4byte	.LASF47
+	.byte	0x1b
+	.byte	0x1d
+	.4byte	0x1490
+	.byte	0x18
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x1453
+	.uleb128 0x2b
+	.string	"gd"
+	.byte	0x1b
+	.byte	0x57
+	.4byte	0x14a2
+	.uleb128 0x1
+	.byte	0x62
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0xfcc
+	.uleb128 0x2c
+	.4byte	.LASF490
+	.byte	0x8
+	.byte	0x1e
+	.byte	0x33
+	.4byte	0x14ca
+	.uleb128 0x2d
+	.string	"np"
+	.byte	0x1e
+	.byte	0x34
+	.4byte	0x14ca
+	.uleb128 0x2e
+	.4byte	.LASF377
+	.byte	0x1e
+	.byte	0x35
+	.4byte	0xec
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0xf9b
+	.uleb128 0x2
+	.4byte	.LASF378
+	.byte	0x1e
+	.byte	0x36
+	.4byte	0x14a8
+	.uleb128 0xe
+	.4byte	.LASF379
+	.byte	0x4
+	.byte	0x1f
+	.byte	0xc
+	.4byte	0x14f4
+	.uleb128 0x10
+	.string	"pid"
+	.byte	0x1f
+	.byte	0xd
+	.4byte	0x59
+	.byte	0
+	.byte	0
+	.uleb128 0x5
+	.4byte	.LASF380
+	.byte	0x1f
+	.byte	0x10
+	.4byte	0x14ff
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x14db
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x1443
+	.uleb128 0xe
+	.4byte	.LASF36
+	.byte	0x30
+	.byte	0x20
+	.byte	0x23
+	.4byte	0x1548
+	.uleb128 0xf
+	.4byte	.LASF35
+	.byte	0x20
+	.byte	0x24
+	.4byte	0x135
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF381
+	.byte	0x20
+	.byte	0x25
+	.4byte	0x1677
+	.byte	0x8
+	.uleb128 0xf
+	.4byte	.LASF382
+	.byte	0x20
+	.byte	0x26
+	.4byte	0x290
+	.byte	0x10
+	.uleb128 0xf
+	.4byte	.LASF41
+	.byte	0x20
+	.byte	0x27
+	.4byte	0x290
+	.byte	0x20
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x150b
+	.uleb128 0xe
+	.4byte	.LASF383
+	.byte	0x10
+	.byte	0xc
+	.byte	0xb5
+	.4byte	0x1573
+	.uleb128 0xf
+	.4byte	.LASF384
+	.byte	0xc
+	.byte	0xb6
+	.4byte	0xd5
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF385
+	.byte	0xc
+	.byte	0xb7
+	.4byte	0x109
+	.byte	0x8
+	.byte	0
+	.uleb128 0x8
+	.4byte	0x154e
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x1573
+	.uleb128 0x13
+	.4byte	0x59
+	.4byte	0x158d
+	.uleb128 0x14
+	.4byte	0x25d
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x157e
+	.uleb128 0xe
+	.4byte	.LASF386
+	.byte	0x80
+	.byte	0x20
+	.byte	0x54
+	.4byte	0x1677
+	.uleb128 0xf
+	.4byte	.LASF28
+	.byte	0x20
+	.byte	0x55
+	.4byte	0xd5
+	.byte	0
+	.uleb128 0x10
+	.string	"id"
+	.byte	0x20
+	.byte	0x56
+	.4byte	0xa60
+	.byte	0x8
+	.uleb128 0xf
+	.4byte	.LASF387
+	.byte	0x20
+	.byte	0x57
+	.4byte	0x158d
+	.byte	0x10
+	.uleb128 0xf
+	.4byte	.LASF388
+	.byte	0x20
+	.byte	0x58
+	.4byte	0x158d
+	.byte	0x18
+	.uleb128 0xf
+	.4byte	.LASF389
+	.byte	0x20
+	.byte	0x59
+	.4byte	0x158d
+	.byte	0x20
+	.uleb128 0xf
+	.4byte	.LASF390
+	.byte	0x20
+	.byte	0x5a
+	.4byte	0x158d
+	.byte	0x28
+	.uleb128 0xf
+	.4byte	.LASF391
+	.byte	0x20
+	.byte	0x5b
+	.4byte	0x158d
+	.byte	0x30
+	.uleb128 0xf
+	.4byte	.LASF367
+	.byte	0x20
+	.byte	0x5c
+	.4byte	0x158d
+	.byte	0x38
+	.uleb128 0xf
+	.4byte	.LASF368
+	.byte	0x20
+	.byte	0x5d
+	.4byte	0x158d
+	.byte	0x40
+	.uleb128 0xf
+	.4byte	.LASF321
+	.byte	0x20
+	.byte	0x5e
+	.4byte	0x168c
+	.byte	0x48
+	.uleb128 0xf
+	.4byte	.LASF392
+	.byte	0x20
+	.byte	0x5f
+	.4byte	0x168c
+	.byte	0x50
+	.uleb128 0xf
+	.4byte	.LASF370
+	.byte	0x20
+	.byte	0x60
+	.4byte	0x59
+	.byte	0x58
+	.uleb128 0xf
+	.4byte	.LASF393
+	.byte	0x20
+	.byte	0x61
+	.4byte	0x59
+	.byte	0x5c
+	.uleb128 0xf
+	.4byte	.LASF394
+	.byte	0x20
+	.byte	0x62
+	.4byte	0x59
+	.byte	0x60
+	.uleb128 0xf
+	.4byte	.LASF372
+	.byte	0x20
+	.byte	0x63
+	.4byte	0x59
+	.byte	0x64
+	.uleb128 0xf
+	.4byte	.LASF373
+	.byte	0x20
+	.byte	0x64
+	.4byte	0x59
+	.byte	0x68
+	.uleb128 0x10
+	.string	"ops"
+	.byte	0x20
+	.byte	0x65
+	.4byte	0x263
+	.byte	0x70
+	.uleb128 0xf
+	.4byte	.LASF42
+	.byte	0x20
+	.byte	0x66
+	.4byte	0x11f
+	.byte	0x78
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x1593
+	.uleb128 0x13
+	.4byte	0x59
+	.4byte	0x168c
+	.uleb128 0x14
+	.4byte	0x1548
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x167d
+	.uleb128 0x5
+	.4byte	.LASF395
+	.byte	0x21
+	.byte	0xb
+	.4byte	0x149
+	.uleb128 0xe
+	.4byte	.LASF396
+	.byte	0x70
+	.byte	0x22
+	.byte	0x16
+	.4byte	0x172e
+	.uleb128 0xf
+	.4byte	.LASF42
+	.byte	0x22
+	.byte	0x17
+	.4byte	0x59
+	.byte	0
+	.uleb128 0x10
+	.string	"ext"
+	.byte	0x22
+	.byte	0x18
+	.4byte	0x59
+	.byte	0x4
+	.uleb128 0xf
+	.4byte	.LASF28
+	.byte	0x22
+	.byte	0x19
+	.4byte	0xfb1
+	.byte	0x8
+	.uleb128 0xf
+	.4byte	.LASF54
+	.byte	0x22
+	.byte	0x1d
+	.4byte	0x1743
+	.byte	0x28
+	.uleb128 0xf
+	.4byte	.LASF397
+	.byte	0x22
+	.byte	0x1e
+	.4byte	0x1743
+	.byte	0x30
+	.uleb128 0xf
+	.4byte	.LASF398
+	.byte	0x22
+	.byte	0x23
+	.4byte	0x1759
+	.byte	0x38
+	.uleb128 0xf
+	.4byte	.LASF399
+	.byte	0x22
+	.byte	0x25
+	.4byte	0x176f
+	.byte	0x40
+	.uleb128 0xf
+	.4byte	.LASF400
+	.byte	0x22
+	.byte	0x2a
+	.4byte	0x1743
+	.byte	0x48
+	.uleb128 0xf
+	.4byte	.LASF401
+	.byte	0x22
+	.byte	0x2b
+	.4byte	0x1743
+	.byte	0x50
+	.uleb128 0xf
+	.4byte	.LASF35
+	.byte	0x22
+	.byte	0x2f
+	.4byte	0x135
+	.byte	0x58
+	.uleb128 0xf
+	.4byte	.LASF402
+	.byte	0x22
+	.byte	0x30
+	.4byte	0x290
+	.byte	0x60
+	.byte	0
+	.uleb128 0x13
+	.4byte	0x59
+	.4byte	0x173d
+	.uleb128 0x14
+	.4byte	0x173d
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x169d
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x172e
+	.uleb128 0x28
+	.4byte	0x1759
+	.uleb128 0x14
+	.4byte	0x173d
+	.uleb128 0x14
+	.4byte	0xe7
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x1749
+	.uleb128 0x28
+	.4byte	0x176f
+	.uleb128 0x14
+	.4byte	0x173d
+	.uleb128 0x14
+	.4byte	0xd5
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x175f
+	.uleb128 0xb
+	.4byte	0x173d
+	.4byte	0x1780
+	.uleb128 0xc
+	.byte	0
+	.uleb128 0x5
+	.4byte	.LASF403
+	.byte	0x22
+	.byte	0x48
+	.4byte	0x1775
+	.uleb128 0xb
+	.4byte	0xf3
+	.4byte	0x179b
+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x2
+	.byte	0
+	.uleb128 0x5
+	.4byte	.LASF404
+	.byte	0x22
+	.byte	0x49
+	.4byte	0x178b
+	.uleb128 0xb
+	.4byte	0x17b6
+	.4byte	0x17b6
+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x2
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x173d
+	.uleb128 0x5
+	.4byte	.LASF405
+	.byte	0x23
+	.byte	0x15
+	.4byte	0x17a6
+	.uleb128 0xb
+	.4byte	0x59
+	.4byte	0x17d7
+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x2
+	.byte	0
+	.uleb128 0x5
+	.4byte	.LASF406
+	.byte	0x23
+	.byte	0x1a
+	.4byte	0x17c7
+	.uleb128 0x25
+	.byte	0x4
+	.4byte	0x84
+	.byte	0x1
+	.byte	0x14
+	.4byte	0x181f
+	.uleb128 0x1c
+	.4byte	.LASF407
+	.byte	0
+	.uleb128 0x1c
+	.4byte	.LASF408
+	.byte	0x1
+	.uleb128 0x1c
+	.4byte	.LASF409
+	.byte	0x2
+	.uleb128 0x1c
+	.4byte	.LASF410
+	.byte	0x3
+	.uleb128 0x1c
+	.4byte	.LASF411
+	.byte	0x4
+	.uleb128 0x1c
+	.4byte	.LASF412
+	.byte	0x5
+	.uleb128 0x1c
+	.4byte	.LASF413
+	.byte	0x6
+	.uleb128 0x1c
+	.4byte	.LASF414
+	.byte	0x7
+	.byte	0
+	.uleb128 0xb
+	.4byte	0xdb
+	.4byte	0x182f
+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x6
+	.byte	0
+	.uleb128 0x8
+	.4byte	0x181f
+	.uleb128 0x2a
+	.4byte	.LASF416
+	.byte	0x1
+	.byte	0x1f
+	.4byte	0x182f
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	test_pattern
+	.uleb128 0xb
+	.4byte	0xa3
+	.4byte	0x1859
+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x6
+	.byte	0
+	.uleb128 0x8
+	.4byte	0x1849
+	.uleb128 0x2a
+	.4byte	.LASF417
+	.byte	0x1
+	.byte	0x29
+	.4byte	0x1859
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	test_pat_param
+	.uleb128 0x2f
+	.4byte	.LASF418
+	.byte	0x1
+	.2byte	0x185
+	.4byte	0x67c
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	_u_boot_list_2_cmd_2_ddr_test
+	.uleb128 0x30
+	.4byte	.LASF426
+	.byte	0x3
+	.byte	0x50
+	.8byte	.LFB278
+	.8byte	.LFE278-.LFB278
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x1904
+	.uleb128 0x31
+	.4byte	.LASF267
+	.byte	0x3
+	.byte	0x50
+	.4byte	0x135
+	.4byte	.LLST76
+	.uleb128 0x31
+	.4byte	.LASF51
+	.byte	0x3
+	.byte	0x50
+	.4byte	0x109
+	.4byte	.LLST77
+	.uleb128 0x32
+	.string	"p"
+	.byte	0x3
+	.byte	0x52
+	.4byte	0x1365
+	.4byte	.LLST78
+	.uleb128 0x32
+	.string	"i"
+	.byte	0x3
+	.byte	0x53
+	.4byte	0xa8
+	.4byte	.LLST79
+	.uleb128 0x33
+	.8byte	.LVL310
+	.4byte	0x2b65
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0xd
+	.byte	0x83
+	.sleb128 -4
+	.byte	0xc
+	.4byte	0xffffffff
+	.byte	0x1a
+	.byte	0x32
+	.byte	0x24
+	.byte	0x84
+	.sleb128 0
+	.byte	0x22
+	.byte	0
+	.byte	0
+	.uleb128 0x35
+	.4byte	.LASF428
+	.byte	0x3
+	.byte	0x2e
+	.4byte	0x109
+	.8byte	.LFB277
+	.8byte	.LFE277-.LFB277
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x1a04
+	.uleb128 0x36
+	.string	"buf"
+	.byte	0x3
+	.byte	0x2e
+	.4byte	0x1365
+	.4byte	.LLST29
+	.uleb128 0x31
+	.4byte	.LASF419
+	.byte	0x3
+	.byte	0x2e
+	.4byte	0xa8
+	.4byte	.LLST30
+	.uleb128 0x31
+	.4byte	.LASF420
+	.byte	0x3
+	.byte	0x2e
+	.4byte	0x109
+	.4byte	.LLST31
+	.uleb128 0x31
+	.4byte	.LASF375
+	.byte	0x3
+	.byte	0x2e
+	.4byte	0x109
+	.4byte	.LLST32
+	.uleb128 0x31
+	.4byte	.LASF421
+	.byte	0x3
+	.byte	0x2f
+	.4byte	0xa8
+	.4byte	.LLST33
+	.uleb128 0x37
+	.4byte	.LASF422
+	.byte	0x3
+	.byte	0x31
+	.4byte	0x1a04
+	.4byte	.LLST34
+	.uleb128 0x32
+	.string	"p"
+	.byte	0x3
+	.byte	0x32
+	.4byte	0x1a0a
+	.4byte	.LLST35
+	.uleb128 0x32
+	.string	"i"
+	.byte	0x3
+	.byte	0x33
+	.4byte	0xa8
+	.4byte	.LLST36
+	.uleb128 0x32
+	.string	"j"
+	.byte	0x3
+	.byte	0x33
+	.4byte	0xa8
+	.4byte	.LLST37
+	.uleb128 0x32
+	.string	"val"
+	.byte	0x3
+	.byte	0x34
+	.4byte	0x109
+	.4byte	.LLST38
+	.uleb128 0x37
+	.4byte	.LASF423
+	.byte	0x3
+	.byte	0x34
+	.4byte	0x109
+	.4byte	.LLST39
+	.uleb128 0x37
+	.4byte	.LASF424
+	.byte	0x3
+	.byte	0x34
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+	.8byte	.LFE276-.LFB276
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+	.uleb128 0x38
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+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0xe
+	.byte	0x85
+	.sleb128 0
+	.byte	0xc
+	.4byte	0xffffffff
+	.byte	0x1a
+	.byte	0x84
+	.sleb128 0
+	.byte	0x22
+	.byte	0x87
+	.sleb128 0
+	.byte	0x22
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 144
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.byte	0
+	.uleb128 0x33
+	.8byte	.LVL172
+	.4byte	0x1904
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 144
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0xb
+	.4byte	0xa8
+	.4byte	0x2052
+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x7
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF443
+	.byte	0x5
+	.byte	0xc
+	.4byte	0x59
+	.byte	0x1
+	.4byte	0x209b
+	.uleb128 0x49
+	.4byte	.LASF444
+	.byte	0x5
+	.byte	0xe
+	.4byte	0xa8
+	.uleb128 0x48
+	.string	"col"
+	.byte	0x5
+	.byte	0xf
+	.4byte	0xa8
+	.uleb128 0x48
+	.string	"bw"
+	.byte	0x5
+	.byte	0xf
+	.4byte	0xa8
+	.uleb128 0x49
+	.4byte	.LASF440
+	.byte	0x5
+	.byte	0x10
+	.4byte	0x59
+	.uleb128 0x4c
+	.uleb128 0x48
+	.string	"__v"
+	.byte	0x5
+	.byte	0x13
+	.4byte	0xa8
+	.byte	0
+	.byte	0
+	.uleb128 0x4d
+	.4byte	.LASF455
+	.byte	0x1
+	.byte	0xbc
+	.4byte	0x59
+	.8byte	.LFB258
+	.8byte	.LFE258-.LFB258
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x25c1
+	.uleb128 0x31
+	.4byte	.LASF445
+	.byte	0x1
+	.byte	0xbc
+	.4byte	0x25c1
+	.4byte	.LLST58
+	.uleb128 0x31
+	.4byte	.LASF446
+	.byte	0x1
+	.byte	0xbc
+	.4byte	0x59
+	.4byte	.LLST59
+	.uleb128 0x31
+	.4byte	.LASF447
+	.byte	0x1
+	.byte	0xbc
+	.4byte	0x59
+	.4byte	.LLST60
+	.uleb128 0x31
+	.4byte	.LASF448
+	.byte	0x1
+	.byte	0xbd
+	.4byte	0x641
+	.4byte	.LLST61
+	.uleb128 0x32
+	.string	"i"
+	.byte	0x1
+	.byte	0xbf
+	.4byte	0x59
+	.4byte	.LLST62
+	.uleb128 0x37
+	.4byte	.LASF449
+	.byte	0x1
+	.byte	0xc0
+	.4byte	0x59
+	.4byte	.LLST63
+	.uleb128 0x37
+	.4byte	.LASF450
+	.byte	0x1
+	.byte	0xc0
+	.4byte	0x59
+	.4byte	.LLST64
+	.uleb128 0x3a
+	.string	"arg"
+	.byte	0x1
+	.byte	0xc1
+	.4byte	0x25c7
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -40
+	.uleb128 0x2a
+	.4byte	.LASF420
+	.byte	0x1
+	.byte	0xc2
+	.4byte	0x25d7
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -104
+	.uleb128 0x2a
+	.4byte	.LASF375
+	.byte	0x1
+	.byte	0xc3
+	.4byte	0x25d7
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -72
+	.uleb128 0x37
+	.4byte	.LASF451
+	.byte	0x1
+	.byte	0xc4
+	.4byte	0xa8
+	.4byte	.LLST65
+	.uleb128 0x37
+	.4byte	.LASF452
+	.byte	0x1
+	.byte	0xc5
+	.4byte	0xa8
+	.4byte	.LLST66
+	.uleb128 0x32
+	.string	"ret"
+	.byte	0x1
+	.byte	0xc6
+	.4byte	0x59
+	.4byte	.LLST67
+	.uleb128 0x37
+	.4byte	.LASF453
+	.byte	0x1
+	.byte	0xc7
+	.4byte	0x59
+	.4byte	.LLST68
+	.uleb128 0x37
+	.4byte	.LASF454
+	.byte	0x1
+	.byte	0xc8
+	.4byte	0xa8
+	.4byte	.LLST69
+	.uleb128 0x3a
+	.string	"dev"
+	.byte	0x1
+	.byte	0xec
+	.4byte	0x25d
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -112
+	.uleb128 0x3d
+	.4byte	0x28ba
+	.8byte	.LBB40
+	.4byte	.Ldebug_ranges0+0xd0
+	.byte	0x1
+	.byte	0xcb
+	.4byte	0x223d
+	.uleb128 0x3e
+	.4byte	0x28d1
+	.4byte	.LLST70
+	.uleb128 0x3e
+	.4byte	0x28c6
+	.4byte	.LLST71
+	.uleb128 0x3f
+	.4byte	.Ldebug_ranges0+0xd0
+	.uleb128 0x40
+	.4byte	0x28dc
+	.4byte	.LLST72
+	.uleb128 0x40
+	.4byte	0x28e5
+	.4byte	.LLST73
+	.uleb128 0x42
+	.8byte	.LVL183
+	.4byte	0x2b65
+	.4byte	0x2208
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC23
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL184
+	.4byte	0x2b65
+	.4byte	0x2227
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC24
+	.byte	0
+	.uleb128 0x33
+	.8byte	.LVL193
+	.4byte	0x2b65
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x4e
+	.4byte	0x2869
+	.8byte	.LBB54
+	.4byte	.Ldebug_ranges0+0x150
+	.byte	0x1
+	.2byte	0x152
+	.4byte	0x229d
+	.uleb128 0x44
+	.4byte	0x288f
+	.uleb128 0x44
+	.4byte	0x2884
+	.uleb128 0x44
+	.4byte	0x2879
+	.uleb128 0x3f
+	.4byte	.Ldebug_ranges0+0x150
+	.uleb128 0x40
+	.4byte	0x289a
+	.4byte	.LLST74
+	.uleb128 0x41
+	.4byte	0x28a3
+	.uleb128 0x40
+	.4byte	0x28ae
+	.4byte	.LLST75
+	.uleb128 0x33
+	.8byte	.LVL272
+	.4byte	0x2b65
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC33
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL187
+	.4byte	0x2b91
+	.4byte	0x22bb
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x8
+	.byte	0x88
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x8a
+	.sleb128 0
+	.byte	0x22
+	.byte	0x6
+	.byte	0
+	.uleb128 0x4f
+	.8byte	.LVL197
+	.4byte	0x2b65
+	.uleb128 0x42
+	.8byte	.LVL199
+	.4byte	0x2b9c
+	.4byte	0x22eb
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x8
+	.byte	0x8f
+	.sleb128 0
+	.byte	0x8a
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x130
+	.byte	0
+	.uleb128 0x4f
+	.8byte	.LVL202
+	.4byte	0x25e7
+	.uleb128 0x4f
+	.8byte	.LVL203
+	.4byte	0x2692
+	.uleb128 0x42
+	.8byte	.LVL204
+	.4byte	0x2b65
+	.4byte	0x2324
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC36
+	.byte	0
+	.uleb128 0x4f
+	.8byte	.LVL207
+	.4byte	0x25e7
+	.uleb128 0x4f
+	.8byte	.LVL208
+	.4byte	0x270b
+	.uleb128 0x4f
+	.8byte	.LVL215
+	.4byte	0x2692
+	.uleb128 0x4f
+	.8byte	.LVL216
+	.4byte	0x25e7
+	.uleb128 0x4f
+	.8byte	.LVL220
+	.4byte	0x25e7
+	.uleb128 0x42
+	.8byte	.LVL221
+	.4byte	0x2b65
+	.4byte	0x2389
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC30
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x3a
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL225
+	.4byte	0x2b65
+	.4byte	0x23a9
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x8f
+	.sleb128 224
+	.byte	0x6
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL226
+	.4byte	0x2b65
+	.4byte	0x23d5
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x8f
+	.sleb128 216
+	.byte	0x6
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.uleb128 0x4f
+	.8byte	.LVL227
+	.4byte	0x2692
+	.uleb128 0x42
+	.8byte	.LVL228
+	.4byte	0x1aae
+	.4byte	0x2400
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL231
+	.4byte	0x28f1
+	.4byte	0x241e
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL234
+	.4byte	0x1e16
+	.4byte	0x243c
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL237
+	.4byte	0x270b
+	.4byte	0x2458
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x6
+	.byte	0x8b
+	.sleb128 0
+	.byte	0xa
+	.2byte	0x3fc
+	.byte	0x1a
+	.byte	0
+	.uleb128 0x4f
+	.8byte	.LVL240
+	.4byte	0x2692
+	.uleb128 0x42
+	.8byte	.LVL241
+	.4byte	0x1aae
+	.4byte	0x2483
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL244
+	.4byte	0x28f1
+	.4byte	0x24a1
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL247
+	.4byte	0x1e16
+	.4byte	0x24bf
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.uleb128 0x4f
+	.8byte	.LVL249
+	.4byte	0x2ba7
+	.uleb128 0x42
+	.8byte	.LVL255
+	.4byte	0x2b65
+	.4byte	0x2504
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC35
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x15
+	.byte	0x83
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x9
+	.byte	0xe5
+	.byte	0x24
+	.byte	0x9
+	.byte	0xe5
+	.byte	0x26
+	.byte	0x3
+	.8byte	.LANCHOR2
+	.byte	0x22
+	.byte	0x6
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL281
+	.4byte	0x2b65
+	.4byte	0x2522
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.byte	0
+	.uleb128 0x4f
+	.8byte	.LVL286
+	.4byte	0x1aae
+	.uleb128 0x4f
+	.8byte	.LVL288
+	.4byte	0x2ba7
+	.uleb128 0x4f
+	.8byte	.LVL293
+	.4byte	0x28f1
+	.uleb128 0x4f
+	.8byte	.LVL294
+	.4byte	0x1e16
+	.uleb128 0x42
+	.8byte	.LVL299
+	.4byte	0x2b65
+	.4byte	0x257b
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC28
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL300
+	.4byte	0x2bb2
+	.4byte	0x259f
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x35
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 240
+	.byte	0
+	.uleb128 0x33
+	.8byte	.LVL303
+	.4byte	0x2b65
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC29
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x67c
+	.uleb128 0xb
+	.4byte	0x109
+	.4byte	0x25d7
+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x4
+	.byte	0
+	.uleb128 0xb
+	.4byte	0x109
+	.4byte	0x25e7
+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x3
+	.byte	0
+	.uleb128 0x4d
+	.4byte	.LASF456
+	.byte	0x1
+	.byte	0xa4
+	.4byte	0x59
+	.8byte	.LFB257
+	.8byte	.LFE257-.LFB257
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2692
+	.uleb128 0x36
+	.string	"uv"
+	.byte	0x1
+	.byte	0xa4
+	.4byte	0x59
+	.4byte	.LLST1
+	.uleb128 0x3a
+	.string	"dev"
+	.byte	0x1
+	.byte	0xa6
+	.4byte	0x25d
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -8
+	.uleb128 0x32
+	.string	"ret"
+	.byte	0x1
+	.byte	0xa7
+	.4byte	0x59
+	.4byte	.LLST2
+	.uleb128 0x42
+	.8byte	.LVL11
+	.4byte	0x2bbd
+	.4byte	0x2658
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC2
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8f
+	.sleb128 56
+	.byte	0
+	.uleb128 0x4f
+	.8byte	.LVL14
+	.4byte	0x2b65
+	.uleb128 0x42
+	.8byte	.LVL18
+	.4byte	0x2bc9
+	.4byte	0x267d
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x33
+	.8byte	.LVL21
+	.4byte	0x2bd5
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x64
+	.byte	0
+	.byte	0
+	.uleb128 0x4d
+	.4byte	.LASF457
+	.byte	0x1
+	.byte	0x92
+	.4byte	0x59
+	.8byte	.LFB256
+	.8byte	.LFE256-.LFB256
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x270b
+	.uleb128 0x31
+	.4byte	.LASF458
+	.byte	0x1
+	.byte	0x92
+	.4byte	0x109
+	.4byte	.LLST0
+	.uleb128 0x4f
+	.8byte	.LVL2
+	.4byte	0x2be0
+	.uleb128 0x4f
+	.8byte	.LVL3
+	.4byte	0x2beb
+	.uleb128 0x4f
+	.8byte	.LVL4
+	.4byte	0x2bf6
+	.uleb128 0x33
+	.8byte	.LVL7
+	.4byte	0x2b65
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x4d
+	.4byte	.LASF459
+	.byte	0x1
+	.byte	0x67
+	.4byte	0x59
+	.8byte	.LFB255
+	.8byte	.LFE255-.LFB255
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2869
+	.uleb128 0x31
+	.4byte	.LASF460
+	.byte	0x1
+	.byte	0x67
+	.4byte	0xa8
+	.4byte	.LLST17
+	.uleb128 0x31
+	.4byte	.LASF461
+	.byte	0x1
+	.byte	0x67
+	.4byte	0xa8
+	.4byte	.LLST18
+	.uleb128 0x31
+	.4byte	.LASF462
+	.byte	0x1
+	.byte	0x67
+	.4byte	0x109
+	.4byte	.LLST19
+	.uleb128 0x32
+	.string	"i"
+	.byte	0x1
+	.byte	0x6b
+	.4byte	0xa8
+	.4byte	.LLST20
+	.uleb128 0x37
+	.4byte	.LASF463
+	.byte	0x1
+	.byte	0x6c
+	.4byte	0xa8
+	.4byte	.LLST21
+	.uleb128 0x37
+	.4byte	.LASF464
+	.byte	0x1
+	.byte	0x6c
+	.4byte	0xa8
+	.4byte	.LLST22
+	.uleb128 0x37
+	.4byte	.LASF458
+	.byte	0x1
+	.byte	0x6c
+	.4byte	0xa8
+	.4byte	.LLST23
+	.uleb128 0x32
+	.string	"ret"
+	.byte	0x1
+	.byte	0x6d
+	.4byte	0x59
+	.4byte	.LLST24
+	.uleb128 0x4f
+	.8byte	.LVL73
+	.4byte	0x2c01
+	.uleb128 0x4f
+	.8byte	.LVL75
+	.4byte	0x2be0
+	.uleb128 0x42
+	.8byte	.LVL78
+	.4byte	0x2b65
+	.4byte	0x27da
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL79
+	.4byte	0x2beb
+	.4byte	0x27f8
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x8
+	.byte	0x8a
+	.sleb128 0
+	.byte	0xc
+	.4byte	0xffffffff
+	.byte	0x1a
+	.byte	0
+	.uleb128 0x4f
+	.8byte	.LVL80
+	.4byte	0x2bf6
+	.uleb128 0x42
+	.8byte	.LVL83
+	.4byte	0x2b65
+	.4byte	0x281d
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL84
+	.4byte	0x1aae
+	.4byte	0x2836
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x40
+	.byte	0x40
+	.byte	0x24
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL87
+	.4byte	0x2b65
+	.4byte	0x285b
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC15
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x4f
+	.8byte	.LVL92
+	.4byte	0x2ba7
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF465
+	.byte	0x1
+	.byte	0x49
+	.4byte	0x59
+	.byte	0x1
+	.4byte	0x28ba
+	.uleb128 0x3c
+	.string	"arg"
+	.byte	0x1
+	.byte	0x49
+	.4byte	0x1a04
+	.uleb128 0x47
+	.4byte	.LASF420
+	.byte	0x1
+	.byte	0x49
+	.4byte	0x1a04
+	.uleb128 0x47
+	.4byte	.LASF375
+	.byte	0x1
+	.byte	0x49
+	.4byte	0x1a04
+	.uleb128 0x48
+	.string	"i"
+	.byte	0x1
+	.byte	0x4b
+	.4byte	0xa8
+	.uleb128 0x49
+	.4byte	.LASF466
+	.byte	0x1
+	.byte	0x4b
+	.4byte	0xa8
+	.uleb128 0x49
+	.4byte	.LASF467
+	.byte	0x1
+	.byte	0x4c
+	.4byte	0xa8
+	.byte	0
+	.uleb128 0x50
+	.4byte	.LASF493
+	.byte	0x1
+	.byte	0x2d
+	.byte	0x1
+	.4byte	0x28f1
+	.uleb128 0x47
+	.4byte	.LASF420
+	.byte	0x1
+	.byte	0x2d
+	.4byte	0x1a04
+	.uleb128 0x47
+	.4byte	.LASF375
+	.byte	0x1
+	.byte	0x2d
+	.4byte	0x1a04
+	.uleb128 0x48
+	.string	"i"
+	.byte	0x1
+	.byte	0x2f
+	.4byte	0xa8
+	.uleb128 0x49
+	.4byte	.LASF466
+	.byte	0x1
+	.byte	0x2f
+	.4byte	0xa8
+	.byte	0
+	.uleb128 0x35
+	.4byte	.LASF468
+	.byte	0x4
+	.byte	0x2d
+	.4byte	0x59
+	.8byte	.LFB200
+	.8byte	.LFE200-.LFB200
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2b2d
+	.uleb128 0x31
+	.4byte	.LASF420
+	.byte	0x4
+	.byte	0x2d
+	.4byte	0x109
+	.4byte	.LLST42
+	.uleb128 0x31
+	.4byte	.LASF375
+	.byte	0x4
+	.byte	0x2d
+	.4byte	0x109
+	.4byte	.LLST43
+	.uleb128 0x37
+	.4byte	.LASF469
+	.byte	0x4
+	.byte	0x2f
+	.4byte	0xa8
+	.4byte	.LLST44
+	.uleb128 0x32
+	.string	"i"
+	.byte	0x4
+	.byte	0x2f
+	.4byte	0xa8
+	.4byte	.LLST45
+	.uleb128 0x32
+	.string	"j"
+	.byte	0x4
+	.byte	0x2f
+	.4byte	0xa8
+	.4byte	.LLST46
+	.uleb128 0x32
+	.string	"q"
+	.byte	0x4
+	.byte	0x2f
+	.4byte	0xa8
+	.4byte	.LLST47
+	.uleb128 0x3a
+	.string	"buf"
+	.byte	0x4
+	.byte	0x30
+	.4byte	0x2042
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -32
+	.uleb128 0x32
+	.string	"p"
+	.byte	0x4
+	.byte	0x31
+	.4byte	0x1365
+	.4byte	.LLST48
+	.uleb128 0x51
+	.4byte	.LASF470
+	.4byte	0x2b3d
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC45
+	.uleb128 0x42
+	.8byte	.LVL123
+	.4byte	0x2b65
+	.4byte	0x29b3
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC17
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL125
+	.4byte	0x2b65
+	.4byte	0x29d3
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x8f
+	.sleb128 200
+	.byte	0x6
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL127
+	.4byte	0x2b65
+	.4byte	0x29f1
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL130
+	.4byte	0x1a10
+	.4byte	0x2a1b
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x72
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL131
+	.4byte	0x1904
+	.4byte	0x2a44
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL139
+	.4byte	0x2b65
+	.4byte	0x2a63
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC20
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL140
+	.4byte	0x2c0d
+	.4byte	0x2a7b
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x80
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL143
+	.4byte	0x2b65
+	.4byte	0x2aa0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC21
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x80
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL146
+	.4byte	0x2b65
+	.4byte	0x2abe
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL147
+	.4byte	0x2b65
+	.4byte	0x2adc
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL149
+	.4byte	0x1a10
+	.4byte	0x2b06
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x72
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.byte	0
+	.uleb128 0x33
+	.8byte	.LVL150
+	.4byte	0x1904
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0xb
+	.4byte	0xe7
+	.4byte	0x2b3d
+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x9
+	.byte	0
+	.uleb128 0x8
+	.4byte	0x2b2d
+	.uleb128 0x52
+	.4byte	0x1a98
+	.8byte	.LFB275
+	.8byte	.LFE275-.LFB275
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2b65
+	.uleb128 0x53
+	.4byte	0x1aa4
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0
+	.uleb128 0x54
+	.4byte	.LASF471
+	.4byte	.LASF471
+	.byte	0x25
+	.byte	0x12
+	.uleb128 0x55
+	.4byte	.LASF472
+	.4byte	.LASF472
+	.byte	0x1d
+	.2byte	0x16c
+	.uleb128 0x56
+	.4byte	.LASF473
+	.4byte	.LASF473
+	.uleb128 0x55
+	.4byte	.LASF473
+	.4byte	.LASF473
+	.byte	0x1d
+	.2byte	0x16d
+	.uleb128 0x54
+	.4byte	.LASF474
+	.4byte	.LASF474
+	.byte	0xa
+	.byte	0x2d
+	.uleb128 0x54
+	.4byte	.LASF475
+	.4byte	.LASF475
+	.byte	0x26
+	.byte	0x29
+	.uleb128 0x54
+	.4byte	.LASF476
+	.4byte	.LASF476
+	.byte	0x21
+	.byte	0x11
+	.uleb128 0x54
+	.4byte	.LASF477
+	.4byte	.LASF477
+	.byte	0x20
+	.byte	0x94
+	.uleb128 0x55
+	.4byte	.LASF478
+	.4byte	.LASF478
+	.byte	0x27
+	.2byte	0x1da
+	.uleb128 0x55
+	.4byte	.LASF479
+	.4byte	.LASF479
+	.byte	0x27
+	.2byte	0x116
+	.uleb128 0x54
+	.4byte	.LASF480
+	.4byte	.LASF480
+	.byte	0x28
+	.byte	0xb
+	.uleb128 0x54
+	.4byte	.LASF481
+	.4byte	.LASF481
+	.byte	0x29
+	.byte	0xc
+	.uleb128 0x54
+	.4byte	.LASF482
+	.4byte	.LASF482
+	.byte	0x29
+	.byte	0xa
+	.uleb128 0x54
+	.4byte	.LASF483
+	.4byte	.LASF483
+	.byte	0x29
+	.byte	0xb
+	.uleb128 0x55
+	.4byte	.LASF484
+	.4byte	.LASF484
+	.byte	0x6
+	.2byte	0x2b9
+	.uleb128 0x55
+	.4byte	.LASF485
+	.4byte	.LASF485
+	.byte	0x1d
+	.2byte	0x398
+	.byte	0
+	.section	.debug_abbrev,"",@progbits
+.Ldebug_abbrev0:
+	.uleb128 0x1
+	.uleb128 0x11
+	.byte	0x1
+	.uleb128 0x25
+	.uleb128 0xe
+	.uleb128 0x13
+	.uleb128 0xb
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x1b
+	.uleb128 0xe
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x10
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x2
+	.uleb128 0x16
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x24
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3e
+	.uleb128 0xb
+	.uleb128 0x3
+	.uleb128 0xe
+	.byte	0
+	.byte	0
+	.uleb128 0x4
+	.uleb128 0x35
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x5
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.byte	0
+	.byte	0
+	.uleb128 0x6
+	.uleb128 0x24
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3e
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+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x52
+	.uleb128 0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x20
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x47
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x48
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x4a
+	.uleb128 0xa
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x11
+	.uleb128 0x1
+	.byte	0
+	.byte	0
+	.uleb128 0x4b
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.byte	0
+	.byte	0
+	.uleb128 0x4c
+	.uleb128 0xb
+	.byte	0x1
+	.byte	0
+	.byte	0
+	.uleb128 0x4d
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x4e
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x52
+	.uleb128 0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0x5
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x4f
+	.uleb128 0x4109
+	.byte	0
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x50
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x20
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x51
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x34
+	.uleb128 0x19
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x52
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x53
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x54
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x55
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x56
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
+	.uleb128 0x3
+	.uleb128 0xe
+	.byte	0
+	.byte	0
+	.byte	0
+	.section	.debug_loc,"",@progbits
+.Ldebug_loc0:
+.LLST76:
+	.8byte	.LVL304
+	.8byte	.LVL306
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL306
+	.8byte	.LVL307
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL307
+	.8byte	.LVL308
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL308
+	.8byte	.LFE278
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST77:
+	.8byte	.LVL304
+	.8byte	.LVL306
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL306
+	.8byte	.LFE278
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST78:
+	.8byte	.LVL305
+	.8byte	.LVL306
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL306
+	.8byte	.LVL307
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL307
+	.8byte	.LVL308
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL308
+	.8byte	.LFE278
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST79:
+	.8byte	.LVL305
+	.8byte	.LVL306
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL306
+	.8byte	.LVL307
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL307
+	.8byte	.LVL308
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL308
+	.8byte	.LVL309
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL309
+	.8byte	.LVL310
+	.2byte	0x3
+	.byte	0x83
+	.sleb128 -4
+	.byte	0x9f
+	.8byte	.LVL310
+	.8byte	.LFE278
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST29:
+	.8byte	.LVL105
+	.8byte	.LVL113
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL113
+	.8byte	.LVL117
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL117
+	.8byte	.LFE277
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST30:
+	.8byte	.LVL105
+	.8byte	.LVL106
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL106
+	.8byte	.LVL108
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL108
+	.8byte	.LVL114
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL114
+	.8byte	.LVL117
+	.2byte	0x8
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x33
+	.byte	0x25
+	.byte	0x31
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	.LVL117
+	.8byte	.LFE277
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST31:
+	.8byte	.LVL105
+	.8byte	.LVL109
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL109
+	.8byte	.LVL115-1
+	.2byte	0x1
+	.byte	0x58
+	.8byte	.LVL115-1
+	.8byte	.LVL117
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	.LVL117
+	.8byte	.LFE277
+	.2byte	0x1
+	.byte	0x58
+	.8byte	0
+	.8byte	0
+.LLST32:
+	.8byte	.LVL105
+	.8byte	.LVL107
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL107
+	.8byte	.LFE277
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST33:
+	.8byte	.LVL105
+	.8byte	.LVL110
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL110
+	.8byte	.LVL115-1
+	.2byte	0x1
+	.byte	0x5a
+	.8byte	.LVL115-1
+	.8byte	.LVL117
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x54
+	.byte	0x9f
+	.8byte	.LVL117
+	.8byte	.LFE277
+	.2byte	0x1
+	.byte	0x5a
+	.8byte	0
+	.8byte	0
+.LLST34:
+	.8byte	.LVL108
+	.8byte	.LVL113
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL113
+	.8byte	.LVL117
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL117
+	.8byte	.LFE277
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST35:
+	.8byte	.LVL108
+	.8byte	.LVL109
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL109
+	.8byte	.LVL115-1
+	.2byte	0x1
+	.byte	0x58
+	.8byte	.LVL115-1
+	.8byte	.LVL117
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	.LVL117
+	.8byte	.LFE277
+	.2byte	0x1
+	.byte	0x58
+	.8byte	0
+	.8byte	0
+.LLST36:
+	.8byte	.LVL108
+	.8byte	.LVL110
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL110
+	.8byte	.LVL115-1
+	.2byte	0x1
+	.byte	0x57
+	.8byte	.LVL117
+	.8byte	.LVL119
+	.2byte	0x1
+	.byte	0x57
+	.8byte	.LVL119
+	.8byte	.LVL120
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL120
+	.8byte	.LFE277
+	.2byte	0x1
+	.byte	0x57
+	.8byte	0
+	.8byte	0
+.LLST37:
+	.8byte	.LVL108
+	.8byte	.LVL110
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL110
+	.8byte	.LVL115-1
+	.2byte	0x1
+	.byte	0x56
+	.8byte	.LVL117
+	.8byte	.LFE277
+	.2byte	0x1
+	.byte	0x56
+	.8byte	0
+	.8byte	0
+.LLST38:
+	.8byte	.LVL108
+	.8byte	.LVL110
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL110
+	.8byte	.LVL115-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL117
+	.8byte	.LFE277
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST39:
+	.8byte	.LVL108
+	.8byte	.LVL112
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL112
+	.8byte	.LVL115-1
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL117
+	.8byte	.LFE277
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST40:
+	.8byte	.LVL108
+	.8byte	.LVL112
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL112
+	.8byte	.LVL115-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL117
+	.8byte	.LFE277
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST41:
+	.8byte	.LVL108
+	.8byte	.LVL112
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL112
+	.8byte	.LVL116
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL116
+	.8byte	.LVL117
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL117
+	.8byte	.LFE277
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST25:
+	.8byte	.LVL97
+	.8byte	.LVL98
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL98
+	.8byte	.LVL100
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL100
+	.8byte	.LFE276
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST26:
+	.8byte	.LVL97
+	.8byte	.LVL99
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL99
+	.8byte	.LFE276
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST27:
+	.8byte	.LVL100
+	.8byte	.LVL101
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL101
+	.8byte	.LFE276
+	.2byte	0x1
+	.byte	0x55
+	.8byte	0
+	.8byte	0
+.LLST28:
+	.8byte	.LVL100
+	.8byte	.LVL101
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL101
+	.8byte	.LFE276
+	.2byte	0x1
+	.byte	0x54
+	.8byte	0
+	.8byte	0
+.LLST3:
+	.8byte	.LVL22
+	.8byte	.LVL26-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL26-1
+	.8byte	.LVL40
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL40
+	.8byte	.LVL42
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL42
+	.8byte	.LFE274
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST4:
+	.8byte	.LVL22
+	.8byte	.LVL25
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL25
+	.8byte	.LVL26-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL26-1
+	.8byte	.LVL41
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL41
+	.8byte	.LVL42
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL42
+	.8byte	.LFE274
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST5:
+	.8byte	.LVL24
+	.8byte	.LVL25
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL25
+	.8byte	.LVL26-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL26-1
+	.8byte	.LVL39
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL42
+	.8byte	.LFE274
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST6:
+	.8byte	.LVL23
+	.8byte	.LVL26-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL26-1
+	.8byte	.LVL39
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL42
+	.8byte	.LFE274
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST7:
+	.8byte	.LVL28
+	.8byte	.LVL29
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL29
+	.8byte	.LVL32-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL35
+	.8byte	.LVL37
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL42
+	.8byte	.LVL44
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST8:
+	.8byte	.LVL26
+	.8byte	.LVL27
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL27
+	.8byte	.LVL31
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL31
+	.8byte	.LVL34
+	.2byte	0x3
+	.byte	0x8c
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL34
+	.8byte	.LVL39
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL42
+	.8byte	.LVL46
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	0
+	.8byte	0
+.LLST9:
+	.8byte	.LVL26
+	.8byte	.LVL27
+	.2byte	0x6
+	.byte	0x9e
+	.uleb128 0x4
+	.4byte	0x80808080
+	.8byte	.LVL27
+	.8byte	.LVL39
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL42
+	.8byte	.LVL47
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST10:
+	.8byte	.LVL26
+	.8byte	.LVL27
+	.2byte	0x6
+	.byte	0xc
+	.4byte	0x40404040
+	.byte	0x9f
+	.8byte	.LVL27
+	.8byte	.LVL39
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL42
+	.8byte	.LVL45
+	.2byte	0x1
+	.byte	0x69
+	.8byte	0
+	.8byte	0
+.LLST11:
+	.8byte	.LVL24
+	.8byte	.LVL27
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST12:
+	.8byte	.LVL26
+	.8byte	.LVL40
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL40
+	.8byte	.LVL42
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL42
+	.8byte	.LFE274
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST13:
+	.8byte	.LVL24
+	.8byte	.LVL30
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL34
+	.8byte	.LVL36
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL36
+	.8byte	.LVL39
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL42
+	.8byte	.LFE274
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST14:
+	.8byte	.LVL50
+	.8byte	.LVL51
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL51
+	.8byte	.LVL53
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL56
+	.8byte	.LVL60
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL63
+	.8byte	.LFE274
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST15:
+	.8byte	.LVL47
+	.8byte	.LVL54
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL54
+	.8byte	.LVL55
+	.2byte	0x3
+	.byte	0x83
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL55
+	.8byte	.LFE274
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST16:
+	.8byte	.LVL47
+	.8byte	.LVL52
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL55
+	.8byte	.LVL58
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL58
+	.8byte	.LVL63
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL63
+	.8byte	.LFE274
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST49:
+	.8byte	.LVL153
+	.8byte	.LVL155
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL155
+	.8byte	.LVL174
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL174
+	.8byte	.LFE271
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST50:
+	.8byte	.LVL153
+	.8byte	.LVL154
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL154
+	.8byte	.LVL162
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL162
+	.8byte	.LVL163
+	.2byte	0x3
+	.byte	0x83
+	.sleb128 32
+	.byte	0x9f
+	.8byte	.LVL163
+	.8byte	.LFE271
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST51:
+	.8byte	.LVL160
+	.8byte	.LVL164
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL164
+	.8byte	.LVL167
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST52:
+	.8byte	.LVL167
+	.8byte	.LVL173
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST53:
+	.8byte	.LVL160
+	.8byte	.LVL164
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL164
+	.8byte	.LVL168
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL168
+	.8byte	.LVL169
+	.2byte	0x3
+	.byte	0x85
+	.sleb128 -8
+	.byte	0x9f
+	.8byte	.LVL169
+	.8byte	.LVL173
+	.2byte	0x3
+	.byte	0x86
+	.sleb128 -40
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST54:
+	.8byte	.LVL169
+	.8byte	.LVL173
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST55:
+	.8byte	.LVL156
+	.8byte	.LVL166
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL166
+	.8byte	.LVL170
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL172
+	.8byte	.LFE271
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST56:
+	.8byte	.LVL159
+	.8byte	.LVL161
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST57:
+	.8byte	.LVL158
+	.8byte	.LVL159
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST58:
+	.8byte	.LVL175
+	.8byte	.LVL176
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL176
+	.8byte	.LFE258
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST59:
+	.8byte	.LVL175
+	.8byte	.LVL178
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL178
+	.8byte	.LFE258
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST60:
+	.8byte	.LVL175
+	.8byte	.LVL177
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL177
+	.8byte	.LVL196
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL196
+	.8byte	.LVL296
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	.LVL296
+	.8byte	.LVL297
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL297
+	.8byte	.LFE258
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST61:
+	.8byte	.LVL175
+	.8byte	.LVL178
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL178
+	.8byte	.LVL203
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL203
+	.8byte	.LVL205
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL205
+	.8byte	.LVL217
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL217
+	.8byte	.LVL218
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL218
+	.8byte	.LVL223
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL223
+	.8byte	.LVL256
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL256
+	.8byte	.LVL260
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL260
+	.8byte	.LVL268
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL268
+	.8byte	.LVL279
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL279
+	.8byte	.LVL296
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL296
+	.8byte	.LVL303
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL303
+	.8byte	.LFE258
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST62:
+	.8byte	.LVL186
+	.8byte	.LVL188
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL188
+	.8byte	.LVL189
+	.2byte	0x3
+	.byte	0x87
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL195
+	.8byte	.LVL196
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL221
+	.8byte	.LVL222
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL225
+	.8byte	.LVL250
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL250
+	.8byte	.LVL251
+	.2byte	0x3
+	.byte	0x89
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL257
+	.8byte	.LVL258
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL258
+	.8byte	.LVL259
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL260
+	.8byte	.LVL268
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL281
+	.8byte	.LVL282
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL285
+	.8byte	.LVL289
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL292
+	.8byte	.LVL296
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL296
+	.8byte	.LVL298
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST63:
+	.8byte	.LVL195
+	.8byte	.LVL196
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL198
+	.8byte	.LVL203
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL205
+	.8byte	.LVL223
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL256
+	.8byte	.LVL260
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL268
+	.8byte	.LVL290
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL290
+	.8byte	.LVL291
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL291
+	.8byte	.LVL303
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST64:
+	.8byte	.LVL229
+	.8byte	.LVL232
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL232
+	.8byte	.LVL235
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL235
+	.8byte	.LVL238
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL242
+	.8byte	.LVL245
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL245
+	.8byte	.LVL248
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL248
+	.8byte	.LVL250
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL260
+	.8byte	.LVL261
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL261
+	.8byte	.LVL262
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL262
+	.8byte	.LVL263
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL264
+	.8byte	.LVL265
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL265
+	.8byte	.LVL266
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL266
+	.8byte	.LVL268
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL287
+	.8byte	.LVL290
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL290
+	.8byte	.LVL292
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL295
+	.8byte	.LVL296
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST65:
+	.8byte	.LVL222
+	.8byte	.LVL223
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL223
+	.8byte	.LVL254
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL260
+	.8byte	.LVL268
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL279
+	.8byte	.LVL296
+	.2byte	0x1
+	.byte	0x69
+	.8byte	0
+	.8byte	0
+.LLST66:
+	.8byte	.LVL178
+	.8byte	.LVL203
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL205
+	.8byte	.LVL214
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL214
+	.8byte	.LVL218
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL218
+	.8byte	.LVL254
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL256
+	.8byte	.LVL272
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL272
+	.8byte	.LVL274
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL274
+	.8byte	.LVL279
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL279
+	.8byte	.LVL296
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL296
+	.8byte	.LVL303
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST67:
+	.8byte	.LVL178
+	.8byte	.LVL200
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL200
+	.8byte	.LVL201
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL201
+	.8byte	.LVL203
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL205
+	.8byte	.LVL206
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL206
+	.8byte	.LVL209
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL209
+	.8byte	.LVL211
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL211
+	.8byte	.LVL218
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL218
+	.8byte	.LVL219
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL219
+	.8byte	.LVL223
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL223
+	.8byte	.LVL229
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL229
+	.8byte	.LVL230
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL230
+	.8byte	.LVL232
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL232
+	.8byte	.LVL233
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL233
+	.8byte	.LVL235
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL235
+	.8byte	.LVL236
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL236
+	.8byte	.LVL238
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL238
+	.8byte	.LVL239
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL239
+	.8byte	.LVL242
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL242
+	.8byte	.LVL243
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL243
+	.8byte	.LVL244-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL244-1
+	.8byte	.LVL245
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 212
+	.8byte	.LVL245
+	.8byte	.LVL246
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL246
+	.8byte	.LVL248
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL248
+	.8byte	.LVL249-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL249-1
+	.8byte	.LVL250
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL250
+	.8byte	.LVL252
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL252
+	.8byte	.LVL256
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL256
+	.8byte	.LVL260
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL260
+	.8byte	.LVL263
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL263
+	.8byte	.LVL264
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL264
+	.8byte	.LVL267
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL267
+	.8byte	.LVL268
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL268
+	.8byte	.LVL273
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL274
+	.8byte	.LVL279
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL279
+	.8byte	.LVL282
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL282
+	.8byte	.LVL284
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL284
+	.8byte	.LVL287
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL287
+	.8byte	.LVL288-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL288-1
+	.8byte	.LVL292
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL292
+	.8byte	.LVL295
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL295
+	.8byte	.LVL296
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL296
+	.8byte	.LVL301
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL301
+	.8byte	.LVL302
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL302
+	.8byte	.LVL303-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL303-1
+	.8byte	.LVL303
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST68:
+	.8byte	.LVL178
+	.8byte	.LVL203
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL205
+	.8byte	.LVL252
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL252
+	.8byte	.LVL253
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL256
+	.8byte	.LVL282
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL282
+	.8byte	.LVL283
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL284
+	.8byte	.LVL303
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST69:
+	.8byte	.LVL222
+	.8byte	.LVL254
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL260
+	.8byte	.LVL268
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	0
+	.8byte	0
+.LLST70:
+	.8byte	.LVL178
+	.8byte	.LVL185
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL189
+	.8byte	.LVL195
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST71:
+	.8byte	.LVL178
+	.8byte	.LVL185
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL189
+	.8byte	.LVL195
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST72:
+	.8byte	.LVL178
+	.8byte	.LVL179
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL179
+	.8byte	.LVL180
+	.2byte	0x3
+	.byte	0x70
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL181
+	.8byte	.LVL182
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL184
+	.8byte	.LVL185
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL189
+	.8byte	.LVL190
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL190
+	.8byte	.LVL191
+	.2byte	0x3
+	.byte	0x70
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL192
+	.8byte	.LVL193
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL193
+	.8byte	.LVL194
+	.2byte	0x3
+	.byte	0x87
+	.sleb128 1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST73:
+	.8byte	.LVL178
+	.8byte	.LVL185
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL189
+	.8byte	.LVL195
+	.2byte	0x1
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST74:
+	.8byte	.LVL210
+	.8byte	.LVL212
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL212
+	.8byte	.LVL213
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL213
+	.8byte	.LVL214
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL268
+	.8byte	.LVL269
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL269
+	.8byte	.LVL270
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL270
+	.8byte	.LVL271
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL275
+	.8byte	.LVL276
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL276
+	.8byte	.LVL277
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL277
+	.8byte	.LVL278
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL278
+	.8byte	.LVL279
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST75:
+	.8byte	.LVL269
+	.8byte	.LVL272
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL274
+	.8byte	.LVL279
+	.2byte	0x1
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST1:
+	.8byte	.LVL9
+	.8byte	.LVL10
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL10
+	.8byte	.LVL15
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL15
+	.8byte	.LVL16
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL16
+	.8byte	.LFE257
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST2:
+	.8byte	.LVL11
+	.8byte	.LVL12
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL12
+	.8byte	.LVL13
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL16
+	.8byte	.LVL17
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL19
+	.8byte	.LVL20
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL20
+	.8byte	.LFE257
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST0:
+	.8byte	.LVL0
+	.8byte	.LVL1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1
+	.8byte	.LVL2-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL2
+	.8byte	.LVL3-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL5
+	.8byte	.LVL6
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL6
+	.8byte	.LVL7-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL7-1
+	.8byte	.LVL8
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST17:
+	.8byte	.LVL65
+	.8byte	.LVL66
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL66
+	.8byte	.LVL69
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL69
+	.8byte	.LVL70
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL70
+	.8byte	.LVL88
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL91
+	.8byte	.LFE255
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST18:
+	.8byte	.LVL65
+	.8byte	.LVL68
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL68
+	.8byte	.LVL72
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST19:
+	.8byte	.LVL65
+	.8byte	.LVL72
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL72
+	.8byte	.LVL90
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL90
+	.8byte	.LVL91
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	.LVL91
+	.8byte	.LFE255
+	.2byte	0x1
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST20:
+	.8byte	.LVL71
+	.8byte	.LVL72
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL72
+	.8byte	.LVL89
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL91
+	.8byte	.LFE255
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST21:
+	.8byte	.LVL71
+	.8byte	.LVL88
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL91
+	.8byte	.LFE255
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST22:
+	.8byte	.LVL73
+	.8byte	.LVL74
+	.2byte	0x9
+	.byte	0x70
+	.sleb128 0
+	.byte	0x83
+	.sleb128 0
+	.byte	0x1d
+	.byte	0x84
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST23:
+	.8byte	.LVL76
+	.8byte	.LVL77
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL77
+	.8byte	.LVL78-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL81
+	.8byte	.LVL82
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL82
+	.8byte	.LVL83-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST24:
+	.8byte	.LVL65
+	.8byte	.LVL85
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL85
+	.8byte	.LVL86
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL86
+	.8byte	.LVL87
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL91
+	.8byte	.LVL92-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL92-1
+	.8byte	.LVL93
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL94
+	.8byte	.LFE255
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	0
+	.8byte	0
+.LLST42:
+	.8byte	.LVL121
+	.8byte	.LVL122
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL122
+	.8byte	.LVL133
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL133
+	.8byte	.LVL136
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL136
+	.8byte	.LFE200
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST43:
+	.8byte	.LVL121
+	.8byte	.LVL123-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL123-1
+	.8byte	.LVL134
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL134
+	.8byte	.LVL136
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL136
+	.8byte	.LFE200
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST44:
+	.8byte	.LVL123
+	.8byte	.LVL124
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL124
+	.8byte	.LVL132
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL136
+	.8byte	.LVL145
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL146
+	.8byte	.LFE200
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST45:
+	.8byte	.LVL127
+	.8byte	.LVL128
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL147
+	.8byte	.LVL148
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST46:
+	.8byte	.LVL125
+	.8byte	.LVL132
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL136
+	.8byte	.LVL144
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL145
+	.8byte	.LFE200
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST47:
+	.8byte	.LVL124
+	.8byte	.LVL125
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL125
+	.8byte	.LVL126
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL126
+	.8byte	.LVL127
+	.2byte	0x4
+	.byte	0x8c
+	.sleb128 0
+	.byte	0x20
+	.byte	0x9f
+	.8byte	.LVL127
+	.8byte	.LVL135
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL136
+	.8byte	.LFE200
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	0
+	.8byte	0
+.LLST48:
+	.8byte	.LVL141
+	.8byte	.LVL142
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL142
+	.8byte	.LFE200
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+	.section	.debug_aranges,"",@progbits
+	.4byte	0xcc
+	.2byte	0x2
+	.4byte	.Ldebug_info0
+	.byte	0x8
+	.byte	0
+	.2byte	0
+	.2byte	0
+	.8byte	.LFB256
+	.8byte	.LFE256-.LFB256
+	.8byte	.LFB257
+	.8byte	.LFE257-.LFB257
+	.8byte	.LFB274
+	.8byte	.LFE274-.LFB274
+	.8byte	.LFB255
+	.8byte	.LFE255-.LFB255
+	.8byte	.LFB275
+	.8byte	.LFE275-.LFB275
+	.8byte	.LFB276
+	.8byte	.LFE276-.LFB276
+	.8byte	.LFB277
+	.8byte	.LFE277-.LFB277
+	.8byte	.LFB200
+	.8byte	.LFE200-.LFB200
+	.8byte	.LFB271
+	.8byte	.LFE271-.LFB271
+	.8byte	.LFB258
+	.8byte	.LFE258-.LFB258
+	.8byte	.LFB278
+	.8byte	.LFE278-.LFB278
+	.8byte	0
+	.8byte	0
+	.section	.debug_ranges,"",@progbits
+.Ldebug_ranges0:
+	.8byte	.LBB12
+	.8byte	.LBE12
+	.8byte	.LBB18
+	.8byte	.LBE18
+	.8byte	.LBB19
+	.8byte	.LBE19
+	.8byte	.LBB20
+	.8byte	.LBE20
+	.8byte	.LBB24
+	.8byte	.LBE24
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB21
+	.8byte	.LBE21
+	.8byte	.LBB25
+	.8byte	.LBE25
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB29
+	.8byte	.LBE29
+	.8byte	.LBB34
+	.8byte	.LBE34
+	.8byte	.LBB35
+	.8byte	.LBE35
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB40
+	.8byte	.LBE40
+	.8byte	.LBB48
+	.8byte	.LBE48
+	.8byte	.LBB49
+	.8byte	.LBE49
+	.8byte	.LBB50
+	.8byte	.LBE50
+	.8byte	.LBB51
+	.8byte	.LBE51
+	.8byte	.LBB52
+	.8byte	.LBE52
+	.8byte	.LBB53
+	.8byte	.LBE53
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB54
+	.8byte	.LBE54
+	.8byte	.LBB58
+	.8byte	.LBE58
+	.8byte	.LBB59
+	.8byte	.LBE59
+	.8byte	0
+	.8byte	0
+	.8byte	.LFB256
+	.8byte	.LFE256
+	.8byte	.LFB257
+	.8byte	.LFE257
+	.8byte	.LFB274
+	.8byte	.LFE274
+	.8byte	.LFB255
+	.8byte	.LFE255
+	.8byte	.LFB275
+	.8byte	.LFE275
+	.8byte	.LFB276
+	.8byte	.LFE276
+	.8byte	.LFB277
+	.8byte	.LFE277
+	.8byte	.LFB200
+	.8byte	.LFE200
+	.8byte	.LFB271
+	.8byte	.LFE271
+	.8byte	.LFB258
+	.8byte	.LFE258
+	.8byte	.LFB278
+	.8byte	.LFE278
+	.8byte	0
+	.8byte	0
+	.section	.debug_line,"",@progbits
+.Ldebug_line0:
+	.section	.debug_str,"MS",@progbits,1
+.LASF416:
+	.string	"test_pattern"
+.LASF399:
+	.string	"puts"
+.LASF64:
+	.string	"reserved"
+.LASF470:
+	.string	"__func__"
+.LASF464:
+	.string	"target_freq"
+.LASF138:
+	.string	"bootm_headers"
+.LASF227:
+	.string	"UCLASS_RAMDISK"
+.LASF156:
+	.string	"rd_end"
+.LASF318:
+	.string	"eth_device"
+.LASF452:
+	.string	"test_banks"
+.LASF127:
+	.string	"ih_comp"
+.LASF23:
+	.string	"_Bool"
+.LASF334:
+	.string	"net_root_path"
+.LASF445:
+	.string	"cmdtp"
+.LASF365:
+	.string	"unbind"
+.LASF145:
+	.string	"fit_noffset_os"
+.LASF35:
+	.string	"priv"
+.LASF486:
+	.ascii	"GNU C11 6.3.1 20170404 -ms"
+	.string	"trict-align -march=armv8-a+nosimd -mlittle-endian -mabi=lp64 -g -Os -fno-builtin -ffreestanding -fshort-wchar -fno-stack-protector -fno-delete-null-pointer-checks -fstack-usage -fno-pic -ffunction-sections -fdata-sections -ffixed-r9 -fno-common -ffixed-x18"
+.LASF22:
+	.string	"___strtok"
+.LASF234:
+	.string	"UCLASS_SPI_GENERIC"
+.LASF431:
+	.string	"capacity"
+.LASF279:
+	.string	"ram_size"
+.LASF332:
+	.string	"net_nis_domain"
+.LASF438:
+	.string	"diagonalscan"
+.LASF36:
+	.string	"uclass"
+.LASF185:
+	.string	"UCLASS_CODEC"
+.LASF47:
+	.string	"next"
+.LASF375:
+	.string	"length"
+.LASF381:
+	.string	"uc_drv"
+.LASF181:
+	.string	"UCLASS_AHCI"
+.LASF195:
+	.string	"UCLASS_I2C_MUX"
+.LASF168:
+	.string	"uclass_id"
+.LASF491:
+	.string	"cpu_2_io"
+.LASF330:
+	.string	"net_netmask"
+.LASF101:
+	.string	"CMD_RET_FAILURE"
+.LASF148:
+	.string	"fit_noffset_rd"
+.LASF228:
+	.string	"UCLASS_RTC"
+.LASF67:
+	.string	"bi_memsize"
+.LASF68:
+	.string	"bi_flashstart"
+.LASF369:
+	.string	"child_post_remove"
+.LASF323:
+	.string	"recv"
+.LASF153:
+	.string	"fit_uname_setup"
+.LASF481:
+	.string	"rockchip_ddrclk_sip_round_rate_v2"
+.LASF235:
+	.string	"UCLASS_SYSCON"
+.LASF187:
+	.string	"UCLASS_DISPLAY"
+.LASF268:
+	.string	"global_data"
+.LASF92:
+	.string	"IRQ_STACK_START_IN"
+.LASF84:
+	.string	"bi_dram"
+.LASF226:
+	.string	"UCLASS_RKNAND"
+.LASF297:
+	.string	"malloc_ptr"
+.LASF193:
+	.string	"UCLASS_I2C_EEPROM"
+.LASF177:
+	.string	"UCLASS_PCI_EMUL"
+.LASF417:
+	.string	"test_pat_param"
+.LASF103:
+	.string	"fdt_header"
+.LASF292:
+	.string	"env_buf"
+.LASF418:
+	.string	"_u_boot_list_2_cmd_2_ddr_test"
+.LASF106:
+	.string	"off_dt_struct"
+.LASF405:
+	.string	"console_devices"
+.LASF353:
+	.string	"NETLOOP_CONTINUE"
+.LASF231:
+	.string	"UCLASS_SPI"
+.LASF473:
+	.string	"memcpy"
+.LASF245:
+	.string	"UCLASS_VIDEO_CONSOLE"
+.LASF243:
+	.string	"UCLASS_VIDEO"
+.LASF357:
+	.string	"net_state"
+.LASF487:
+	.string	"cmd/ddr_tool/ddr_test_code.c"
+.LASF287:
+	.string	"uclass_root"
+.LASF86:
+	.string	"IRQ_STACK_START"
+.LASF163:
+	.string	"verify"
+.LASF354:
+	.string	"NETLOOP_RESTART"
+.LASF453:
+	.string	"abort"
+.LASF406:
+	.string	"cd_count"
+.LASF371:
+	.string	"platdata_auto_alloc_size"
+.LASF317:
+	.string	"s_addr"
+.LASF450:
+	.string	"err_case"
+.LASF167:
+	.string	"command_ret_t"
+.LASF236:
+	.string	"UCLASS_SYSRESET"
+.LASF169:
+	.string	"UCLASS_ROOT"
+.LASF301:
+	.string	"pm_ctx_phys"
+.LASF186:
+	.string	"UCLASS_CROS_EC"
+.LASF463:
+	.string	"delta_freq"
+.LASF326:
+	.string	"index"
+.LASF458:
+	.string	"freq"
+.LASF94:
+	.string	"maxargs"
+.LASF121:
+	.string	"ih_load"
+.LASF249:
+	.string	"UCLASS_KEY"
+.LASF408:
+	.string	"SCANFREQ"
+.LASF88:
+	.string	"_datarel_start_ofs"
+.LASF271:
+	.string	"pci_clk"
+.LASF180:
+	.string	"UCLASS_ADC"
+.LASF366:
+	.string	"ofdata_to_platdata"
+.LASF125:
+	.string	"ih_arch"
+.LASF309:
+	.string	"gd_t"
+.LASF198:
+	.string	"UCLASS_IRQ"
+.LASF5:
+	.string	"__u8"
+.LASF329:
+	.string	"net_gateway"
+.LASF351:
+	.string	"net_ping_ip"
+.LASF135:
+	.string	"type"
+.LASF465:
+	.string	"get_test_addr"
+.LASF61:
+	.string	"lmb_region"
+.LASF423:
+	.string	"wr_val"
+.LASF55:
+	.string	"protect"
+.LASF260:
+	.string	"tlb_addr"
+.LASF426:
+	.string	"print_memory"
+.LASF439:
+	.string	"next_adr"
+.LASF39:
+	.string	"uclass_node"
+.LASF171:
+	.string	"UCLASS_TEST"
+.LASF350:
+	.string	"net_boot_file_expected_size_in_blocks"
+.LASF24:
+	.string	"image_base"
+.LASF141:
+	.string	"legacy_hdr_valid"
+.LASF239:
+	.string	"UCLASS_TPM"
+.LASF100:
+	.string	"CMD_RET_SUCCESS"
+.LASF397:
+	.string	"stop"
+.LASF204:
+	.string	"UCLASS_MISC"
+.LASF52:
+	.string	"sector_count"
+.LASF263:
+	.string	"tlb_emerg"
+.LASF434:
+	.string	"err_addr"
+.LASF93:
+	.string	"cmd_tbl_s"
+.LASF99:
+	.string	"cmd_tbl_t"
+.LASF266:
+	.string	"baudrate"
+.LASF358:
+	.string	"mem_malloc_start"
+.LASF246:
+	.string	"UCLASS_VIDEO_CRTC"
+.LASF79:
+	.string	"bi_ethspeed"
+.LASF129:
+	.string	"image_header_t"
+.LASF382:
+	.string	"dev_head"
+.LASF11:
+	.string	"phys_addr_t"
+.LASF126:
+	.string	"ih_type"
+.LASF0:
+	.string	"unsigned char"
+.LASF409:
+	.string	"RANDOM"
+.LASF140:
+	.string	"legacy_hdr_os_copy"
+.LASF477:
+	.string	"uclass_get_device"
+.LASF211:
+	.string	"UCLASS_PANEL_BACKLIGHT"
+.LASF270:
+	.string	"bus_clk"
+.LASF173:
+	.string	"UCLASS_TEST_BUS"
+.LASF73:
+	.string	"bi_arm_freq"
+.LASF200:
+	.string	"UCLASS_LED"
+.LASF379:
+	.string	"p_current"
+.LASF342:
+	.string	"net_rx_packet_len"
+.LASF344:
+	.string	"net_null_ethaddr"
+.LASF53:
+	.string	"flash_id"
+.LASF313:
+	.string	"load_addr"
+.LASF424:
+	.string	"reread"
+.LASF321:
+	.string	"init"
+.LASF251:
+	.string	"UCLASS_CHARGE_DISPLAY"
+.LASF437:
+	.string	"cmp_value"
+.LASF178:
+	.string	"UCLASS_USB_EMUL"
+.LASF363:
+	.string	"probe"
+.LASF378:
+	.string	"ofnode"
+.LASF269:
+	.string	"cpu_clk"
+.LASF308:
+	.string	"sibling"
+.LASF265:
+	.string	"using_pre_serial"
+.LASF217:
+	.string	"UCLASS_PINCTRL"
+.LASF115:
+	.string	"fdt32_t"
+.LASF376:
+	.string	"value"
+.LASF247:
+	.string	"UCLASS_WDT"
+.LASF440:
+	.string	"page_size"
+.LASF132:
+	.string	"image_len"
+.LASF280:
+	.string	"mon_len"
+.LASF63:
+	.string	"memory"
+.LASF492:
+	.string	"exit"
+.LASF241:
+	.string	"UCLASS_USB_DEV_GENERIC"
+.LASF248:
+	.string	"UCLASS_FG"
+.LASF451:
+	.string	"test_times"
+.LASF373:
+	.string	"per_child_platdata_auto_alloc_size"
+.LASF469:
+	.string	"shift"
+.LASF21:
+	.string	"errno"
+.LASF51:
+	.string	"size"
+.LASF333:
+	.string	"net_hostname"
+.LASF31:
+	.string	"uclass_platdata"
+.LASF396:
+	.string	"stdio_dev"
+.LASF139:
+	.string	"legacy_hdr_os"
+.LASF131:
+	.string	"image_start"
+.LASF18:
+	.string	"uint8_t"
+.LASF76:
+	.string	"bi_bootflags"
+.LASF118:
+	.string	"ih_hcrc"
+.LASF392:
+	.string	"destroy"
+.LASF461:
+	.string	"max_freq"
+.LASF210:
+	.string	"UCLASS_PANEL"
+.LASF368:
+	.string	"child_pre_probe"
+.LASF257:
+	.string	"timer_rate_hz"
+.LASF33:
+	.string	"driver_data"
+.LASF427:
+	.string	"write_buf_to_ddr"
+.LASF383:
+	.string	"udevice_id"
+.LASF370:
+	.string	"priv_auto_alloc_size"
+.LASF240:
+	.string	"UCLASS_USB"
+.LASF172:
+	.string	"UCLASS_TEST_FDT"
+.LASF327:
+	.string	"eth_current"
+.LASF74:
+	.string	"bi_dsp_freq"
+.LASF4:
+	.string	"uchar"
+.LASF120:
+	.string	"ih_size"
+.LASF267:
+	.string	"addr"
+.LASF175:
+	.string	"UCLASS_SPI_EMUL"
+.LASF256:
+	.string	"arch_global_data"
+.LASF214:
+	.string	"UCLASS_PCI_GENERIC"
+.LASF71:
+	.string	"bi_sramstart"
+.LASF87:
+	.string	"FIQ_STACK_START"
+.LASF389:
+	.string	"pre_probe"
+.LASF319:
+	.string	"enetaddr"
+.LASF216:
+	.string	"UCLASS_PINCONFIG"
+.LASF421:
+	.string	"prt_en"
+.LASF225:
+	.string	"UCLASS_RESET"
+.LASF170:
+	.string	"UCLASS_DEMO"
+.LASF296:
+	.string	"malloc_limit"
+.LASF65:
+	.string	"bd_info"
+.LASF372:
+	.string	"per_child_auto_alloc_size"
+.LASF81:
+	.string	"bi_busfreq"
+.LASF281:
+	.string	"irq_sp"
+.LASF402:
+	.string	"list"
+.LASF182:
+	.string	"UCLASS_BLK"
+.LASF282:
+	.string	"start_addr_sp"
+.LASF337:
+	.string	"net_ip"
+.LASF475:
+	.string	"strict_strtoul"
+.LASF320:
+	.string	"iobase"
+.LASF123:
+	.string	"ih_dcrc"
+.LASF56:
+	.string	"flash_info_t"
+.LASF471:
+	.string	"printf"
+.LASF444:
+	.string	"os_reg"
+.LASF80:
+	.string	"bi_intfreq"
+.LASF314:
+	.string	"save_addr"
+.LASF259:
+	.string	"timer_reset_value"
+.LASF377:
+	.string	"of_offset"
+.LASF201:
+	.string	"UCLASS_LPC"
+.LASF70:
+	.string	"bi_flashoffset"
+.LASF300:
+	.string	"video_bottom"
+.LASF454:
+	.string	"scan_freq_loop"
+.LASF202:
+	.string	"UCLASS_MAILBOX"
+.LASF415:
+	.string	"g_isi_pattern"
+.LASF108:
+	.string	"off_mem_rsvmap"
+.LASF362:
+	.string	"bind"
+.LASF199:
+	.string	"UCLASS_KEYBOARD"
+.LASF206:
+	.string	"UCLASS_MOD_EXP"
+.LASF116:
+	.string	"image_header"
+.LASF110:
+	.string	"last_comp_version"
+.LASF77:
+	.string	"bi_ip_addr"
+.LASF414:
+	.string	"TESTCASSMAX"
+.LASF298:
+	.string	"cur_serial_dev"
+.LASF57:
+	.string	"flash_info"
+.LASF16:
+	.string	"ushort"
+.LASF395:
+	.string	"console_buffer"
+.LASF104:
+	.string	"magic"
+.LASF305:
+	.string	"full_name"
+.LASF472:
+	.string	"memset"
+.LASF331:
+	.string	"net_dns_server"
+.LASF482:
+	.string	"rockchip_ddrclk_sip_set_rate_v2"
+.LASF403:
+	.string	"stdio_devices"
+.LASF462:
+	.string	"times"
+.LASF355:
+	.string	"NETLOOP_SUCCESS"
+.LASF28:
+	.string	"name"
+.LASF264:
+	.string	"pre_serial"
+.LASF90:
+	.string	"_datarellocal_start_ofs"
+.LASF96:
+	.string	"usage"
+.LASF152:
+	.string	"fit_hdr_setup"
+.LASF183:
+	.string	"UCLASS_CLK"
+.LASF41:
+	.string	"sibling_node"
+.LASF160:
+	.string	"initrd_end"
+.LASF310:
+	.string	"monitor_flash_len"
+.LASF398:
+	.string	"putc"
+.LASF360:
+	.string	"mem_malloc_brk"
+.LASF12:
+	.string	"phys_size_t"
+.LASF83:
+	.string	"bi_boot_params"
+.LASF250:
+	.string	"UCLASS_RC"
+.LASF72:
+	.string	"bi_sramsize"
+.LASF293:
+	.string	"timebase_h"
+.LASF294:
+	.string	"timebase_l"
+.LASF13:
+	.string	"sizetype"
+.LASF78:
+	.string	"bi_enetaddr"
+.LASF341:
+	.string	"net_rx_packet"
+.LASF459:
+	.string	"scan_freq"
+.LASF393:
+	.string	"per_device_auto_alloc_size"
+.LASF229:
+	.string	"UCLASS_SCSI"
+.LASF2:
+	.string	"short unsigned int"
+.LASF3:
+	.string	"signed char"
+.LASF339:
+	.string	"net_tx_packet"
+.LASF54:
+	.string	"start"
+.LASF380:
+	.string	"current"
+.LASF412:
+	.string	"FASTTEST"
+.LASF255:
+	.string	"LOGF_MAX_CATEGORIES"
+.LASF134:
+	.string	"comp"
+.LASF179:
+	.string	"UCLASS_SIMPLE_BUS"
+.LASF286:
+	.string	"dm_root_f"
+.LASF37:
+	.string	"uclass_priv"
+.LASF224:
+	.string	"UCLASS_REMOTEPROC"
+.LASF149:
+	.string	"fit_hdr_fdt"
+.LASF407:
+	.string	"CHANGEFREQ"
+.LASF299:
+	.string	"video_top"
+.LASF343:
+	.string	"net_bcast_ethaddr"
+.LASF164:
+	.string	"state"
+.LASF69:
+	.string	"bi_flashsize"
+.LASF20:
+	.string	"__be32"
+.LASF162:
+	.string	"cmdline_end"
+.LASF38:
+	.string	"parent_priv"
+.LASF340:
+	.string	"net_rx_packets"
+.LASF184:
+	.string	"UCLASS_CPU"
+.LASF277:
+	.string	"ram_top"
+.LASF89:
+	.string	"_datarelrolocal_start_ofs"
+.LASF442:
+	.string	"next_col"
+.LASF348:
+	.string	"net_boot_file_name"
+.LASF391:
+	.string	"pre_remove"
+.LASF324:
+	.string	"halt"
+.LASF117:
+	.string	"ih_magic"
+.LASF285:
+	.string	"dm_root"
+.LASF17:
+	.string	"ulong"
+.LASF62:
+	.string	"region"
+.LASF7:
+	.string	"__u32"
+.LASF338:
+	.string	"net_server_ip"
+.LASF364:
+	.string	"remove"
+.LASF242:
+	.string	"UCLASS_USB_HUB"
+.LASF291:
+	.string	"of_root"
+.LASF91:
+	.string	"_datarelro_start_ofs"
+.LASF367:
+	.string	"child_post_bind"
+.LASF207:
+	.string	"UCLASS_MTD"
+.LASF165:
+	.string	"bootm_headers_t"
+.LASF15:
+	.string	"long int"
+.LASF174:
+	.string	"UCLASS_TEST_PROBE"
+.LASF212:
+	.string	"UCLASS_PCH"
+.LASF213:
+	.string	"UCLASS_PCI"
+.LASF188:
+	.string	"UCLASS_DMA"
+.LASF446:
+	.string	"flag"
+.LASF401:
+	.string	"getc"
+.LASF237:
+	.string	"UCLASS_THERMAL"
+.LASF436:
+	.string	"random_test1"
+.LASF435:
+	.string	"random_test2"
+.LASF456:
+	.string	"set_vdd_logic"
+.LASF449:
+	.string	"test_case"
+.LASF441:
+	.string	"pattern"
+.LASF387:
+	.string	"post_bind"
+.LASF335:
+	.string	"net_ethaddr"
+.LASF316:
+	.string	"in_addr"
+.LASF19:
+	.string	"uint32_t"
+.LASF130:
+	.string	"image_info"
+.LASF119:
+	.string	"ih_time"
+.LASF467:
+	.string	"available"
+.LASF489:
+	.string	"jt_funcs"
+.LASF490:
+	.string	"ofnode_union"
+.LASF474:
+	.string	"strcasecmp"
+.LASF58:
+	.string	"long double"
+.LASF112:
+	.string	"size_dt_strings"
+.LASF137:
+	.string	"image_info_t"
+.LASF302:
+	.string	"serial"
+.LASF443:
+	.string	"get_page_size"
+.LASF1:
+	.string	"long unsigned int"
+.LASF192:
+	.string	"UCLASS_I2C"
+.LASF176:
+	.string	"UCLASS_I2C_EMUL"
+.LASF50:
+	.string	"select_hwpart"
+.LASF346:
+	.string	"net_native_vlan"
+.LASF196:
+	.string	"UCLASS_I2S"
+.LASF336:
+	.string	"net_server_ethaddr"
+.LASF244:
+	.string	"UCLASS_VIDEO_BRIDGE"
+.LASF166:
+	.string	"images"
+.LASF428:
+	.string	"cmp_buf_data"
+.LASF288:
+	.string	"fdt_blob"
+.LASF14:
+	.string	"char"
+.LASF144:
+	.string	"fit_uname_os"
+.LASF143:
+	.string	"fit_hdr_os"
+.LASF476:
+	.string	"ctrlc"
+.LASF400:
+	.string	"tstc"
+.LASF29:
+	.string	"platdata"
+.LASF433:
+	.string	"reread_val"
+.LASF133:
+	.string	"load"
+.LASF352:
+	.string	"net_loop_state"
+.LASF232:
+	.string	"UCLASS_SPMI"
+.LASF230:
+	.string	"UCLASS_SERIAL"
+.LASF429:
+	.string	"random_test"
+.LASF411:
+	.string	"DIAGONALSCAN"
+.LASF215:
+	.string	"UCLASS_PHY"
+.LASF75:
+	.string	"bi_ddr_freq"
+.LASF32:
+	.string	"node"
+.LASF289:
+	.string	"new_fdt"
+.LASF420:
+	.string	"start_adr"
+.LASF136:
+	.string	"arch"
+.LASF274:
+	.string	"have_console"
+.LASF151:
+	.string	"fit_noffset_fdt"
+.LASF147:
+	.string	"fit_uname_rd"
+.LASF98:
+	.string	"complete"
+.LASF261:
+	.string	"tlb_size"
+.LASF146:
+	.string	"fit_hdr_rd"
+.LASF356:
+	.string	"NETLOOP_FAIL"
+.LASF410:
+	.string	"CROSSTALK"
+.LASF191:
+	.string	"UCLASS_FIRMWARE"
+.LASF283:
+	.string	"reloc_off"
+.LASF154:
+	.string	"fit_noffset_setup"
+.LASF359:
+	.string	"mem_malloc_end"
+.LASF220:
+	.string	"UCLASS_POWER_DOMAIN"
+.LASF203:
+	.string	"UCLASS_MASS_STORAGE"
+.LASF49:
+	.string	"block_drvr"
+.LASF208:
+	.string	"UCLASS_NORTHBRIDGE"
+.LASF485:
+	.string	"malloc"
+.LASF404:
+	.string	"stdio_names"
+.LASF27:
+	.string	"driver"
+.LASF457:
+	.string	"set_ddr_freq"
+.LASF194:
+	.string	"UCLASS_I2C_GENERIC"
+.LASF322:
+	.string	"send"
+.LASF325:
+	.string	"write_hwaddr"
+.LASF483:
+	.string	"rockchip_ddrclk_sip_recalc_rate_v2"
+.LASF275:
+	.string	"env_addr"
+.LASF384:
+	.string	"compatible"
+.LASF290:
+	.string	"fdt_size"
+.LASF272:
+	.string	"mem_clk"
+.LASF25:
+	.string	"_binary_u_boot_bin_start"
+.LASF447:
+	.string	"argc"
+.LASF480:
+	.string	"udelay"
+.LASF85:
+	.string	"bd_t"
+.LASF122:
+	.string	"ih_ep"
+.LASF66:
+	.string	"bi_memstart"
+.LASF306:
+	.string	"properties"
+.LASF448:
+	.string	"argv"
+.LASF150:
+	.string	"fit_uname_fdt"
+.LASF222:
+	.string	"UCLASS_RAM"
+.LASF46:
+	.string	"list_head"
+.LASF388:
+	.string	"pre_unbind"
+.LASF303:
+	.string	"device_node"
+.LASF157:
+	.string	"ft_addr"
+.LASF258:
+	.string	"lastinc"
+.LASF385:
+	.string	"data"
+.LASF311:
+	.string	"__dtb_dt_begin"
+.LASF254:
+	.string	"UCLASS_INVALID"
+.LASF422:
+	.string	"buful"
+.LASF304:
+	.string	"phandle"
+.LASF40:
+	.string	"child_head"
+.LASF60:
+	.string	"base"
+.LASF278:
+	.string	"relocaddr"
+.LASF142:
+	.string	"fit_uname_cfg"
+.LASF161:
+	.string	"cmdline_start"
+.LASF374:
+	.string	"property"
+.LASF455:
+	.string	"do_ddr_test"
+.LASF284:
+	.string	"new_gd"
+.LASF189:
+	.string	"UCLASS_ETH"
+.LASF276:
+	.string	"env_valid"
+.LASF312:
+	.string	"__dtb_dt_spl_begin"
+.LASF10:
+	.string	"long long unsigned int"
+.LASF34:
+	.string	"parent"
+.LASF190:
+	.string	"UCLASS_GPIO"
+.LASF107:
+	.string	"off_dt_strings"
+.LASF432:
+	.string	"wr_value"
+.LASF82:
+	.string	"bi_arch_number"
+.LASF460:
+	.string	"min_freq"
+.LASF44:
+	.string	"ide_bus_offset"
+.LASF273:
+	.string	"fb_base"
+.LASF390:
+	.string	"post_probe"
+.LASF425:
+	.string	"err_adr"
+.LASF95:
+	.string	"repeatable"
+.LASF102:
+	.string	"CMD_RET_USAGE"
+.LASF253:
+	.string	"UCLASS_COUNT"
+.LASF209:
+	.string	"UCLASS_NVME"
+.LASF347:
+	.string	"net_restart_wrap"
+.LASF111:
+	.string	"boot_cpuid_phys"
+.LASF59:
+	.string	"lmb_property"
+.LASF488:
+	.string	"/home/typ/src/u-boot_gerrit/u-boot-ddr"
+.LASF484:
+	.string	"rand"
+.LASF218:
+	.string	"UCLASS_PMIC"
+.LASF361:
+	.string	"of_match"
+.LASF9:
+	.string	"long long int"
+.LASF478:
+	.string	"regulator_get_by_platname"
+.LASF493:
+	.string	"print_available_addr"
+.LASF159:
+	.string	"initrd_start"
+.LASF233:
+	.string	"UCLASS_SPI_FLASH"
+.LASF238:
+	.string	"UCLASS_TIMER"
+.LASF386:
+	.string	"uclass_driver"
+.LASF479:
+	.string	"regulator_set_value"
+.LASF466:
+	.string	"max_bank"
+.LASF30:
+	.string	"parent_platdata"
+.LASF252:
+	.string	"UCLASS_DVFS"
+.LASF45:
+	.string	"udevice"
+.LASF345:
+	.string	"net_our_vlan"
+.LASF419:
+	.string	"buf_len"
+.LASF124:
+	.string	"ih_os"
+.LASF219:
+	.string	"UCLASS_PWM"
+.LASF43:
+	.string	"req_seq"
+.LASF205:
+	.string	"UCLASS_MMC"
+.LASF197:
+	.string	"UCLASS_IDE"
+.LASF315:
+	.string	"save_size"
+.LASF109:
+	.string	"version"
+.LASF26:
+	.string	"_binary_u_boot_bin_end"
+.LASF394:
+	.string	"per_device_platdata_auto_alloc_size"
+.LASF8:
+	.string	"unsigned int"
+.LASF413:
+	.string	"FULLTEST"
+.LASF430:
+	.string	"baseaddr"
+.LASF114:
+	.string	"working_fdt"
+.LASF468:
+	.string	"crosstalk"
+.LASF328:
+	.string	"push_packet"
+.LASF113:
+	.string	"size_dt_struct"
+.LASF128:
+	.string	"ih_name"
+.LASF221:
+	.string	"UCLASS_PWRSEQ"
+.LASF6:
+	.string	"short int"
+.LASF307:
+	.string	"child"
+.LASF262:
+	.string	"tlb_fillptr"
+.LASF97:
+	.string	"help"
+.LASF48:
+	.string	"prev"
+.LASF349:
+	.string	"net_boot_file_size"
+.LASF158:
+	.string	"ft_len"
+.LASF105:
+	.string	"totalsize"
+.LASF295:
+	.string	"malloc_base"
+.LASF223:
+	.string	"UCLASS_REGULATOR"
+.LASF42:
+	.string	"flags"
+.LASF155:
+	.string	"rd_start"
+	.hidden	malloc
+	.ident	"GCC: (Linaro GCC 6.3-2017.05) 6.3.1 20170404"
+	.section	.note.GNU-stack,"",@progbits

commit bdd65000c036791b7594d5484e0131bf34078f33
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Dec 6 10:02:20 2018 +0800

    common: bootm: test cmdtp is NULL or not before use it
    
    Test cmdtp is NULL or not before use it. If not and the image is
    incorrect, then the error occur:
    "Synchronous Abort" handler, esr 0x96000010
    * Relocate offset = 0000000007911000
    * ELR(PC)    =   00000000006148f8
    * LR         =   00000000006148f8
    * SP         =   0000000005b020d0
    
    * ESR_EL2    =   0000000096000010
            EC[31:26] == 100101, Exception from a Data abort,
                         from current exception level
            IL[25] == 1, 32-bit instruction trapped
    
    * DAIF       =   00000000000003c0
            D[9] == 1, DBG masked
            A[8] == 1, ABORT masked
            I[7] == 1, IRQ masked
            F[6] == 1, FIQ masked
    
    * SPSR_EL2   =   00000000000003c9
            D[9] == 1, DBG masked
            A[8] == 1, ABORT masked
            I[7] == 1, IRQ masked
            F[6] == 1, FIQ masked
            M[4] == 0, Exception taken from AArch64
            M[3:0] == 1001, EL2h
    
    * SCTLR_EL2  =   0000000030c51835
            I[12] == 1, Icaches enabled
            C[2] == 1, Dcache enabled
    
    Change-Id: I367051e8e91a1b6fee957390af79980bfd5e5916
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/bootm.c b/common/bootm.c
index 2863bcaa67..08bb5b7b91 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -878,8 +878,9 @@ static const void *boot_get_kernel(cmd_tbl_t *cmdtp, int flag, int argc,
 			*os_len = image_get_data_size(hdr);
 			break;
 		default:
-			printf("Wrong Image Type for %s command\n",
-			       cmdtp->name);
+			if (cmdtp)
+				printf("Wrong Image Type for %s command\n",
+				       cmdtp->name);
 			bootstage_error(BOOTSTAGE_ID_CHECK_IMAGETYPE);
 			return NULL;
 		}
@@ -923,7 +924,9 @@ static const void *boot_get_kernel(cmd_tbl_t *cmdtp, int flag, int argc,
 		break;
 #endif
 	default:
-		printf("Wrong Image Format for %s command\n", cmdtp->name);
+		if (cmdtp)
+			printf("Wrong Image Format for %s command\n",
+			       cmdtp->name);
 		bootstage_error(BOOTSTAGE_ID_FIT_KERNEL_INFO);
 		return NULL;
 	}

commit 7cacd0a8516f2e79a1c4e40e194eae58a9777655
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Tue Dec 18 20:17:40 2018 +0800

    video/drm: panel/phy code style clean up and fixes
    
    Silence debug messages if the panel/phy does not exist.
    
    Change-Id: Ifa027017e9aa9af54992e26f2bbde7048b22bb04
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index e03738a97a..46f4d98514 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -119,9 +119,6 @@ static int get_public_phy(struct display_state *state,
 			return 0;
 		}
 
-		conn_state->phy_dev = dev;
-		conn_state->phy_node = dev->node;
-
 		ret = rockchip_phy_init(phy);
 		if (ret) {
 			printf("failed to init phy driver\n");
@@ -130,7 +127,6 @@ static int get_public_phy(struct display_state *state,
 		conn_state->phy = phy;
 
 		printf("inno hdmi phy init success, save it\n");
-		data->phy_node = ofnode_to_offset(conn_state->phy_node);
 		data->phy_drv = conn_state->phy;
 		data->phy_init = true;
 		return 0;
@@ -175,9 +171,7 @@ static int connector_phy_init(struct display_state *state,
 			      struct public_phy_data *data)
 {
 	struct connector_state *conn_state = &state->conn_state;
-	struct rockchip_phy *phy;
-	struct udevice *dev;
-	int ret, type;
+	int type;
 
 	/* does this connector use public phy with others */
 	type = check_public_use_phy(state);
@@ -195,39 +189,10 @@ static int connector_phy_init(struct display_state *state,
 		}
 
 		/* if this phy has been initialized, get it directly */
-		conn_state->phy_node = offset_to_ofnode(data->phy_node);
 		conn_state->phy = (struct rockchip_phy *)data->phy_drv;
 		return 0;
 	}
 
-	/*
-	 * if this connector don't use the same phy with others,
-	 * just get phy as original method.
-	 */
-	ret = uclass_get_device_by_phandle(UCLASS_PHY, conn_state->dev, "phys",
-					   &dev);
-	if (ret) {
-		printf("Warn: can't find phy driver\n");
-		return 0;
-	}
-
-	phy = (struct rockchip_phy *)dev_get_driver_data(dev);
-	if (!phy) {
-		printf("failed to find phy driver\n");
-		return 0;
-	}
-
-	conn_state->phy_dev = dev;
-	conn_state->phy_node = dev->node;
-
-	ret = rockchip_phy_init(phy);
-	if (ret) {
-		printf("failed to init phy driver\n");
-		return ret;
-	}
-
-	conn_state->phy = phy;
-
 	return 0;
 }
 
@@ -242,14 +207,6 @@ static int connector_panel_init(struct display_state *state)
 	if (!panel)
 		return 0;
 
-	if (panel->funcs && panel->funcs->init) {
-		ret = panel->funcs->init(state);
-		if (ret) {
-			printf("failed to init panel driver\n");
-			return ret;
-		}
-	}
-
 	dsp_lut_node = dev_read_subnode(panel->dev, "dsp-lut");
 	if (!ofnode_valid(dsp_lut_node)) {
 		debug("%s can not find dsp-lut node\n", __func__);
@@ -514,7 +471,6 @@ static int display_get_timing(struct display_state *state)
 	const struct drm_display_mode *m;
 	struct panel_state *panel_state = &state->panel_state;
 	const struct rockchip_panel *panel = panel_state->panel;
-	int ret;
 
 	if (dev_of_valid(panel->dev) &&
 	    !display_get_timing_from_dts(panel_state, mode)) {
@@ -532,24 +488,12 @@ static int display_get_timing(struct display_state *state)
 	if (conn_funcs->get_edid && !conn_funcs->get_edid(state)) {
 		int panel_bits_per_colourp;
 
-		/* In order to read EDID, the panel needs to be powered on */
-		if (panel->funcs->prepare) {
-			ret = panel->funcs->prepare(state);
-			if (ret) {
-				printf("failed to prepare panel\n");
-				return ret;
-			}
-		}
-
 		if (!edid_get_drm_mode((void *)&conn_state->edid,
 				     sizeof(conn_state->edid), mode,
 				     &panel_bits_per_colourp)) {
 			printf("Using display timing from edid\n");
 			edid_print_info((void *)&conn_state->edid);
 			goto done;
-		} else {
-			if (panel->funcs->unprepare)
-				panel->funcs->unprepare(state);
 		}
 	}
 
@@ -596,11 +540,18 @@ static int display_init(struct display_state *state)
 		return -ENXIO;
 	}
 
+	if (panel_state->panel)
+		rockchip_panel_init(panel_state->panel);
+
 	if (conn_funcs->init) {
 		ret = conn_funcs->init(state);
 		if (ret)
 			goto deinit;
 	}
+
+	if (conn_state->phy)
+		rockchip_phy_init(conn_state->phy);
+
 	/*
 	 * support hotplug, but not connect;
 	 */
@@ -700,58 +651,6 @@ static int display_set_plane(struct display_state *state)
 	return 0;
 }
 
-static int display_panel_prepare(struct display_state *state)
-{
-	struct panel_state *panel_state = &state->panel_state;
-	const struct rockchip_panel *panel = panel_state->panel;
-
-	if (!panel || !panel->funcs || !panel->funcs->prepare) {
-		printf("%s: failed to find panel prepare funcs\n", __func__);
-		return -ENODEV;
-	}
-
-	return panel->funcs->prepare(state);
-}
-
-static int display_panel_enable(struct display_state *state)
-{
-	struct panel_state *panel_state = &state->panel_state;
-	const struct rockchip_panel *panel = panel_state->panel;
-
-	if (!panel || !panel->funcs || !panel->funcs->enable) {
-		printf("%s: failed to find panel enable funcs\n", __func__);
-		return -ENODEV;
-	}
-
-	return panel->funcs->enable(state);
-}
-
-static void display_panel_unprepare(struct display_state *state)
-{
-	struct panel_state *panel_state = &state->panel_state;
-	const struct rockchip_panel *panel = panel_state->panel;
-
-	if (!panel || !panel->funcs || !panel->funcs->unprepare) {
-		printf("%s: failed to find panel unprepare funcs\n", __func__);
-		return;
-	}
-
-	panel->funcs->unprepare(state);
-}
-
-static void display_panel_disable(struct display_state *state)
-{
-	struct panel_state *panel_state = &state->panel_state;
-	const struct rockchip_panel *panel = panel_state->panel;
-
-	if (!panel || !panel->funcs || !panel->funcs->disable) {
-		printf("%s: failed to find panel disable funcs\n", __func__);
-		return;
-	}
-
-	panel->funcs->disable(state);
-}
-
 static int display_enable(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
@@ -760,6 +659,7 @@ static int display_enable(struct display_state *state)
 	struct crtc_state *crtc_state = &state->crtc_state;
 	const struct rockchip_crtc *crtc = crtc_state->crtc;
 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
+	struct panel_state *panel_state = &state->panel_state;
 	int ret = 0;
 
 	display_init(state);
@@ -785,7 +685,8 @@ static int display_enable(struct display_state *state)
 	if (conn_state->bridge)
 		rockchip_bridge_pre_enable(conn_state->bridge);
 
-	display_panel_prepare(state);
+	if (panel_state->panel)
+		rockchip_panel_prepare(panel_state->panel);
 
 	if (crtc_funcs->enable) {
 		ret = crtc_funcs->enable(state);
@@ -802,7 +703,8 @@ static int display_enable(struct display_state *state)
 	if (conn_state->bridge)
 		rockchip_bridge_enable(conn_state->bridge);
 
-	display_panel_enable(state);
+	if (panel_state->panel)
+		rockchip_panel_enable(panel_state->panel);
 
 	state->is_enable = true;
 	return 0;
@@ -827,6 +729,7 @@ static int display_disable(struct display_state *state)
 	struct crtc_state *crtc_state = &state->crtc_state;
 	const struct rockchip_crtc *crtc = crtc_state->crtc;
 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
+	struct panel_state *panel_state = &state->panel_state;
 
 	if (!state->is_init)
 		return 0;
@@ -834,7 +737,8 @@ static int display_disable(struct display_state *state)
 	if (!state->is_enable)
 		return 0;
 
-	display_panel_disable(state);
+	if (panel_state->panel)
+		rockchip_panel_disable(panel_state->panel);
 
 	if (conn_state->bridge)
 		rockchip_bridge_disable(conn_state->bridge);
@@ -845,7 +749,8 @@ static int display_disable(struct display_state *state)
 	if (crtc_funcs->disable)
 		crtc_funcs->disable(state);
 
-	display_panel_unprepare(state);
+	if (panel_state->panel)
+		rockchip_panel_unprepare(panel_state->panel);
 
 	if (conn_state->bridge)
 		rockchip_bridge_post_disable(conn_state->bridge);
@@ -1337,6 +1242,18 @@ static struct udevice *rockchip_of_find_connector(ofnode endpoint)
 	return dev;
 }
 
+static struct rockchip_phy *rockchip_of_find_phy(struct udevice *dev)
+{
+	struct udevice *phy_dev;
+	int ret;
+
+	ret = uclass_get_device_by_phandle(UCLASS_PHY, dev, "phys", &phy_dev);
+	if (ret)
+		return NULL;
+
+	return (struct rockchip_phy *)dev_get_driver_data(phy_dev);
+}
+
 static int rockchip_display_probe(struct udevice *dev)
 {
 	struct video_priv *uc_priv = dev_get_uclass_priv(dev);
@@ -1348,6 +1265,7 @@ static int rockchip_display_probe(struct udevice *dev)
 	const struct rockchip_connector *conn;
 	struct rockchip_panel *panel = NULL;
 	struct rockchip_bridge *bridge = NULL;
+	struct rockchip_phy *phy = NULL;
 	struct display_state *s;
 	const char *name;
 	int ret;
@@ -1412,6 +1330,8 @@ static int rockchip_display_probe(struct udevice *dev)
 
 		conn = (const struct rockchip_connector *)dev_get_driver_data(conn_dev);
 
+		phy = rockchip_of_find_phy(conn_dev);
+
 		bridge = rockchip_of_find_bridge(conn_dev);
 		if (bridge)
 			panel = rockchip_of_find_panel(bridge->dev);
@@ -1447,6 +1367,7 @@ static int rockchip_display_probe(struct udevice *dev)
 		s->conn_state.node = conn_dev->node;
 		s->conn_state.dev = conn_dev;
 		s->conn_state.connector = conn;
+		s->conn_state.phy = phy;
 		s->conn_state.bridge = bridge;
 		s->conn_state.overscan.left_margin = 100;
 		s->conn_state.overscan.right_margin = 100;
@@ -1461,6 +1382,9 @@ static int rockchip_display_probe(struct udevice *dev)
 		if (bridge)
 			bridge->state = s;
 
+		if (panel)
+			panel->state = s;
+
 		get_crtc_mcu_mode(&s->crtc_state);
 
 		if (connector_panel_init(s)) {
diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index e2301b02c2..1c72aa966f 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -103,10 +103,8 @@ struct connector_state {
 	struct udevice *dev;
 	const struct rockchip_connector *connector;
 	struct rockchip_bridge *bridge;
-	struct udevice *phy_dev;
 	struct rockchip_phy *phy;
 	ofnode node;
-	ofnode phy_node;
 
 	void *private;
 
diff --git a/drivers/video/drm/rockchip_panel.c b/drivers/video/drm/rockchip_panel.c
index 859a999dff..33e7b3b362 100644
--- a/drivers/video/drm/rockchip_panel.c
+++ b/drivers/video/drm/rockchip_panel.c
@@ -251,55 +251,55 @@ static int rockchip_panel_send_dsi_cmds(struct display_state *state,
 	return 0;
 }
 
-static int rockchip_panel_prepare(struct display_state *state)
+static void panel_simple_prepare(struct rockchip_panel *panel)
 {
-	struct rockchip_panel *panel = state_get_panel(state);
 	struct rockchip_panel_plat *plat = dev_get_platdata(panel->dev);
 	struct rockchip_panel_priv *priv = dev_get_priv(panel->dev);
 	int ret;
 
 	if (priv->prepared)
-		return 0;
+		return;
 
-	if (priv->power_supply) {
-		ret = regulator_set_enable(priv->power_supply,
-					   !plat->power_invert);
-		if (ret) {
-			printf("%s: failed to enable power supply", __func__);
-			return ret;
-		}
-	}
+	if (priv->power_supply)
+		regulator_set_enable(priv->power_supply, !plat->power_invert);
+
+	if (dm_gpio_is_valid(&priv->enable_gpio))
+		dm_gpio_set_value(&priv->enable_gpio, 1);
 
-	dm_gpio_set_value(&priv->enable_gpio, 1);
-	mdelay(plat->delay.prepare);
+	if (plat->delay.prepare)
+		mdelay(plat->delay.prepare);
 
-	dm_gpio_set_value(&priv->reset_gpio, 1);
-	mdelay(plat->delay.reset);
-	dm_gpio_set_value(&priv->reset_gpio, 0);
+	if (dm_gpio_is_valid(&priv->reset_gpio))
+		dm_gpio_set_value(&priv->reset_gpio, 1);
 
-	mdelay(plat->delay.init);
+	if (plat->delay.reset)
+		mdelay(plat->delay.reset);
+
+	if (dm_gpio_is_valid(&priv->reset_gpio))
+		dm_gpio_set_value(&priv->reset_gpio, 0);
+
+	if (plat->delay.init)
+		mdelay(plat->delay.init);
 
 	if (plat->on_cmds) {
 		if (priv->cmd_type == CMD_TYPE_SPI)
-			ret = rockchip_panel_send_spi_cmds(state,
+			ret = rockchip_panel_send_spi_cmds(panel->state,
 							   plat->on_cmds);
 		else if (priv->cmd_type == CMD_TYPE_MCU)
-			ret = rockchip_panel_send_mcu_cmds(state, plat->on_cmds);
+			ret = rockchip_panel_send_mcu_cmds(panel->state,
+							   plat->on_cmds);
 		else
-			ret = rockchip_panel_send_dsi_cmds(state,
+			ret = rockchip_panel_send_dsi_cmds(panel->state,
 							   plat->on_cmds);
 		if (ret)
 			printf("failed to send on cmds: %d\n", ret);
 	}
 
 	priv->prepared = true;
-
-	return 0;
 }
 
-static void rockchip_panel_unprepare(struct display_state *state)
+static void panel_simple_unprepare(struct rockchip_panel *panel)
 {
-	struct rockchip_panel *panel = state_get_panel(state);
 	struct rockchip_panel_plat *plat = dev_get_platdata(panel->dev);
 	struct rockchip_panel_priv *priv = dev_get_priv(panel->dev);
 	int ret;
@@ -309,55 +309,52 @@ static void rockchip_panel_unprepare(struct display_state *state)
 
 	if (plat->off_cmds) {
 		if (priv->cmd_type == CMD_TYPE_SPI)
-			ret = rockchip_panel_send_spi_cmds(state,
+			ret = rockchip_panel_send_spi_cmds(panel->state,
 							   plat->off_cmds);
 		else if (priv->cmd_type == CMD_TYPE_MCU)
-			ret = rockchip_panel_send_mcu_cmds(state,
+			ret = rockchip_panel_send_mcu_cmds(panel->state,
 							   plat->off_cmds);
 		else
-			ret = rockchip_panel_send_dsi_cmds(state,
+			ret = rockchip_panel_send_dsi_cmds(panel->state,
 							   plat->off_cmds);
 		if (ret)
 			printf("failed to send off cmds: %d\n", ret);
 	}
 
-	dm_gpio_set_value(&priv->reset_gpio, 1);
-	dm_gpio_set_value(&priv->enable_gpio, 0);
+	if (dm_gpio_is_valid(&priv->reset_gpio))
+		dm_gpio_set_value(&priv->reset_gpio, 1);
 
-	if (priv->power_supply) {
-		ret = regulator_set_enable(priv->power_supply,
-					   plat->power_invert);
-		if (ret)
-			printf("%s: failed to disable power supply", __func__);
-	}
+	if (dm_gpio_is_valid(&priv->enable_gpio))
+		dm_gpio_set_value(&priv->enable_gpio, 0);
 
-	mdelay(plat->delay.unprepare);
+	if (priv->power_supply)
+		regulator_set_enable(priv->power_supply, plat->power_invert);
+
+	if (plat->delay.unprepare)
+		mdelay(plat->delay.unprepare);
 
 	priv->prepared = false;
 }
 
-static int rockchip_panel_enable(struct display_state *state)
+static void panel_simple_enable(struct rockchip_panel *panel)
 {
-	struct rockchip_panel *panel = state_get_panel(state);
 	struct rockchip_panel_plat *plat = dev_get_platdata(panel->dev);
 	struct rockchip_panel_priv *priv = dev_get_priv(panel->dev);
 
 	if (priv->enabled)
-		return 0;
+		return;
 
-	mdelay(plat->delay.enable);
+	if (plat->delay.enable)
+		mdelay(plat->delay.enable);
 
 	if (priv->backlight)
 		backlight_enable(priv->backlight);
 
 	priv->enabled = true;
-
-	return 0;
 }
 
-static void rockchip_panel_disable(struct display_state *state)
+static void panel_simple_disable(struct rockchip_panel *panel)
 {
-	struct rockchip_panel *panel = state_get_panel(state);
 	struct rockchip_panel_plat *plat = dev_get_platdata(panel->dev);
 	struct rockchip_panel_priv *priv = dev_get_priv(panel->dev);
 
@@ -367,27 +364,26 @@ static void rockchip_panel_disable(struct display_state *state)
 	if (priv->backlight)
 		backlight_disable(priv->backlight);
 
-	mdelay(plat->delay.disable);
+	if (plat->delay.disable)
+		mdelay(plat->delay.disable);
 
 	priv->enabled = false;
 }
 
-static int rockchip_panel_init(struct display_state *state)
+static void panel_simple_init(struct rockchip_panel *panel)
 {
+	struct display_state *state = panel->state;
 	struct connector_state *conn_state = &state->conn_state;
-	struct rockchip_panel *panel = state_get_panel(state);
 
 	conn_state->bus_format = panel->bus_format;
-
-	return 0;
 }
 
 static const struct rockchip_panel_funcs rockchip_panel_funcs = {
-	.init = rockchip_panel_init,
-	.prepare = rockchip_panel_prepare,
-	.unprepare = rockchip_panel_unprepare,
-	.enable = rockchip_panel_enable,
-	.disable = rockchip_panel_disable,
+	.init = panel_simple_init,
+	.prepare = panel_simple_prepare,
+	.unprepare = panel_simple_unprepare,
+	.enable = panel_simple_enable,
+	.disable = panel_simple_disable,
 };
 
 static int rockchip_panel_ofdata_to_platdata(struct udevice *dev)
diff --git a/drivers/video/drm/rockchip_panel.h b/drivers/video/drm/rockchip_panel.h
index e8aab0a5d4..d4d5ef113a 100644
--- a/drivers/video/drm/rockchip_panel.h
+++ b/drivers/video/drm/rockchip_panel.h
@@ -8,14 +8,14 @@
 #define _ROCKCHIP_PANEL_H_
 
 struct display_state;
+struct rockchip_panel;
 
 struct rockchip_panel_funcs {
-	int (*init)(struct display_state *state);
-	void (*deinit)(struct display_state *state);
-	int (*prepare)(struct display_state *state);
-	void (*unprepare)(struct display_state *state);
-	int (*enable)(struct display_state *state);
-	void (*disable)(struct display_state *state);
+	void (*init)(struct rockchip_panel *panel);
+	void (*prepare)(struct rockchip_panel *panel);
+	void (*unprepare)(struct rockchip_panel *panel);
+	void (*enable)(struct rockchip_panel *panel);
+	void (*disable)(struct rockchip_panel *panel);
 };
 
 struct rockchip_panel {
@@ -23,6 +23,53 @@ struct rockchip_panel {
 	u32 bus_format;
 	const struct rockchip_panel_funcs *funcs;
 	const void *data;
+
+	struct display_state *state;
 };
 
+static inline void rockchip_panel_init(struct rockchip_panel *panel)
+{
+	if (!panel)
+		return;
+
+	if (panel->funcs && panel->funcs->init)
+		panel->funcs->init(panel);
+}
+
+static inline void rockchip_panel_prepare(struct rockchip_panel *panel)
+{
+	if (!panel)
+		return;
+
+	if (panel->funcs && panel->funcs->prepare)
+		panel->funcs->prepare(panel);
+}
+
+static inline void rockchip_panel_enable(struct rockchip_panel *panel)
+{
+	if (!panel)
+		return;
+
+	if (panel->funcs && panel->funcs->enable)
+		panel->funcs->enable(panel);
+}
+
+static inline void rockchip_panel_unprepare(struct rockchip_panel *panel)
+{
+	if (!panel)
+		return;
+
+	if (panel->funcs && panel->funcs->unprepare)
+		panel->funcs->unprepare(panel);
+}
+
+static inline void rockchip_panel_disable(struct rockchip_panel *panel)
+{
+	if (!panel)
+		return;
+
+	if (panel->funcs && panel->funcs->disable)
+		panel->funcs->disable(panel);
+}
+
 #endif	/* _ROCKCHIP_PANEL_H_ */
diff --git a/drivers/video/drm/rockchip_phy.c b/drivers/video/drm/rockchip_phy.c
index 9609f8c2ac..b92511e8db 100644
--- a/drivers/video/drm/rockchip_phy.c
+++ b/drivers/video/drm/rockchip_phy.c
@@ -12,7 +12,7 @@ int rockchip_phy_init(struct rockchip_phy *phy)
 	if (!phy)
 		return -ENODEV;
 
-	if (phy->funcs || phy->funcs->init)
+	if (phy->funcs && phy->funcs->init)
 		return phy->funcs->init(phy);
 
 	return 0;
@@ -23,7 +23,7 @@ int rockchip_phy_power_on(struct rockchip_phy *phy)
 	if (!phy)
 		return -ENODEV;
 
-	if (phy->funcs || phy->funcs->power_on)
+	if (phy->funcs && phy->funcs->power_on)
 		return phy->funcs->power_on(phy);
 
 	return 0;

commit fa36e9fb107f4bc1d2c9504555d1f7b81745d898
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Tue Dec 18 15:54:18 2018 +0800

    configs: px30: enable CONFIG_VIDEO_BRIDGE_ANALOGIX_ANX6345
    
    Change-Id: I9ca5e9db2c9ea8f9692b72fb69a1fa4d2e868aca
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 6fc0641ea1..7fea0317d0 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -105,6 +105,7 @@ CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_DRM_ROCKCHIP_RK618=y
+CONFIG_VIDEO_BRIDGE_ANALOGIX_ANX6345=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y

commit c52351ffbe8d698997ed6d1eaedc72399a017ebb
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Dec 17 20:29:11 2018 +0800

    video/bridge: anx6345: Convert to rockchip_bridge
    
    Use the rockchip_bridge_funcs instead of the video_bridge_ops so that
    anx6345 device can work on the rockchip platform.
    
    Change-Id: I3ded401816ba8347bddfedcae8aacab4667df2af
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/anx98xx-edp.h b/drivers/video/anx98xx-edp.h
index f7e8baa167..b6c21a399d 100644
--- a/drivers/video/anx98xx-edp.h
+++ b/drivers/video/anx98xx-edp.h
@@ -83,6 +83,7 @@
 
 #define ANX9804_VID_CTRL1_REG					0x08
 #define ANX9804_VID_CTRL1_VID_EN				BIT(7)
+#define ANX9804_VID_CTRL1_DDR_CTRL				BIT(1)
 #define ANX9804_VID_CTRL1_EDGE					BIT(0)
 
 #define ANX9804_VID_CTRL2_REG					0x09
diff --git a/drivers/video/bridge/anx6345.c b/drivers/video/bridge/anx6345.c
index 0a94affb9f..5b12720b23 100644
--- a/drivers/video/bridge/anx6345.c
+++ b/drivers/video/bridge/anx6345.c
@@ -11,6 +11,7 @@
 #include <edid.h>
 #include <video_bridge.h>
 #include "../anx98xx-edp.h"
+#include "../drm/rockchip_bridge.h"
 
 #define DP_MAX_LINK_RATE		0x001
 #define DP_MAX_LANE_COUNT		0x002
@@ -19,6 +20,7 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 struct anx6345_priv {
+	u8 chipid;
 	u8 edid[EDID_SIZE];
 };
 
@@ -254,6 +256,13 @@ static int anx6345_read_dpcd(struct udevice *dev, u32 reg, u8 *val)
 static int anx6345_read_edid(struct udevice *dev, u8 *buf, int size)
 {
 	struct anx6345_priv *priv = dev_get_priv(dev);
+	int ret;
+
+	ret = anx6345_read_aux_i2c(dev, 0x50, 0x0, EDID_SIZE, priv->edid);
+	if (ret < 0) {
+		dev_err(dev, "failed to get edid\n");
+		return ret;
+	}
 
 	if (size > EDID_SIZE)
 		size = EDID_SIZE;
@@ -268,12 +277,11 @@ static int anx6345_attach(struct udevice *dev)
 	return 0;
 }
 
-static int anx6345_enable(struct udevice *dev)
+static int anx6345_init(struct udevice *dev)
 {
-	u8 chipid, colordepth, lanes, data_rate, c;
-	int ret, i, bpp;
-	struct display_timing timing;
 	struct anx6345_priv *priv = dev_get_priv(dev);
+	u8 c;
+	int ret, i;
 
 	/* Deassert reset and enable power */
 	ret = video_bridge_set_active(dev, true);
@@ -288,16 +296,16 @@ static int anx6345_enable(struct udevice *dev)
 	/* Write 0 to the powerdown reg (powerup everything) */
 	anx6345_write_r1(dev, ANX9804_POWERD_CTRL_REG, 0);
 
-	ret = anx6345_read_r1(dev, ANX9804_DEV_IDH_REG, &chipid);
+	ret = anx6345_read_r1(dev, ANX9804_DEV_IDH_REG, &priv->chipid);
 	if (ret)
 		debug("%s: read id failed: %d\n", __func__, ret);
 
-	switch (chipid) {
+	switch (priv->chipid) {
 	case 0x63:
 		debug("ANX63xx detected.\n");
 		break;
 	default:
-		debug("Error anx6345 chipid mismatch: %.2x\n", (int)chipid);
+		debug("Error anx6345 chipid mismatch: %.2x\n", priv->chipid);
 		return -ENODEV;
 	}
 
@@ -339,7 +347,16 @@ static int anx6345_enable(struct udevice *dev)
 	anx6345_write_r0(dev, ANX9804_HDCP_CONTROL_0_REG, 0x00);
 	anx6345_write_r0(dev, 0xa7, 0x00);
 
-	anx6345_read_aux_i2c(dev, 0x50, 0x0, EDID_SIZE, priv->edid);
+	return 0;
+}
+
+static int anx6345_enable(struct udevice *dev)
+{
+	u8 colordepth, lanes, data_rate, c;
+	int i, bpp;
+	struct display_timing timing;
+	struct anx6345_priv *priv = dev_get_priv(dev);
+
 	if (edid_get_timing(priv->edid, EDID_SIZE, &timing, &bpp) != 0) {
 		debug("Failed to parse EDID\n");
 		return -EIO;
@@ -374,7 +391,7 @@ static int anx6345_enable(struct udevice *dev)
 	mdelay(5);
 	for (i = 0; i < 100; i++) {
 		anx6345_read_r0(dev, ANX9804_LINK_TRAINING_CTRL_REG, &c);
-		if ((chipid == 0x63) && (c & 0x80) == 0)
+		if ((priv->chipid == 0x63) && (c & 0x80) == 0)
 			break;
 
 		mdelay(5);
@@ -385,8 +402,8 @@ static int anx6345_enable(struct udevice *dev)
 	}
 
 	/* Enable */
-	anx6345_write_r1(dev, ANX9804_VID_CTRL1_REG,
-			 ANX9804_VID_CTRL1_VID_EN | ANX9804_VID_CTRL1_EDGE);
+	anx6345_write_r1(dev, ANX9804_VID_CTRL1_REG, ANX9804_VID_CTRL1_VID_EN |
+			 ANX9804_VID_CTRL1_DDR_CTRL | ANX9804_VID_CTRL1_EDGE);
 	/* Force stream valid */
 	anx6345_write_r0(dev, ANX9804_SYS_CTRL3_REG,
 			 ANX9804_SYS_CTRL3_F_HPD |
@@ -399,20 +416,40 @@ static int anx6345_enable(struct udevice *dev)
 
 static int anx6345_probe(struct udevice *dev)
 {
+	struct rockchip_bridge *bridge =
+		(struct rockchip_bridge *)dev_get_driver_data(dev);
+
 	if (device_get_uclass_id(dev->parent) != UCLASS_I2C)
 		return -EPROTONOSUPPORT;
 
-	return anx6345_enable(dev);
+	bridge->dev = dev;
+
+	return anx6345_init(dev);
 }
 
-struct video_bridge_ops anx6345_ops = {
+static const struct video_bridge_ops anx6345_ops = {
 	.attach = anx6345_attach,
 	.set_backlight = anx6345_set_backlight,
 	.read_edid = anx6345_read_edid,
 };
 
+static void anx6345_bridge_enable(struct rockchip_bridge *bridge)
+{
+	anx6345_enable(bridge->dev);
+}
+
+static const struct rockchip_bridge_funcs anx6345_bridge_funcs = {
+	.enable = anx6345_bridge_enable,
+};
+
+static struct rockchip_bridge anx6345_driver_data = {
+	.funcs = &anx6345_bridge_funcs,
+};
+
 static const struct udevice_id anx6345_ids[] = {
-	{ .compatible = "analogix,anx6345", },
+	{
+		.compatible = "analogix,anx6345",
+		.data = (ulong)&anx6345_driver_data, },
 	{ }
 };
 

commit a4878dda5ec2c73fc57bf90e2c44c6bf3c471010
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Tue Dec 18 15:55:28 2018 +0800

    video/drm: rgb: Allow to configure data sync from DT
    
    Change-Id: I2e83a7ed7e2d74a23b74301c57899a9e763ca1bf
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_rgb.c b/drivers/video/drm/rockchip_rgb.c
index 9d58987124..424b0986cd 100644
--- a/drivers/video/drm/rockchip_rgb.c
+++ b/drivers/video/drm/rockchip_rgb.c
@@ -32,6 +32,7 @@ struct rockchip_rgb_funcs {
 
 struct rockchip_rgb {
 	struct regmap *grf;
+	bool data_sync;
 	const struct rockchip_rgb_funcs *funcs;
 };
 
@@ -102,27 +103,19 @@ static int rockchip_rgb_probe(struct udevice *dev)
 
 	rgb->funcs = connector->data;
 	rgb->grf = syscon_get_regmap(dev_get_parent(dev));
+	rgb->data_sync = dev_read_bool(dev, "rockchip,data-sync");
 
 	return 0;
 }
 
 static void px30_rgb_enable(struct rockchip_rgb *rgb, int pipe)
 {
-	regmap_write(rgb->grf, PX30_GRF_PD_VO_CON1,
-		     PX30_RGB_VOP_SEL(pipe));
-	regmap_write(rgb->grf, PX30_GRF_PD_VO_CON1,
-		     PX30_RGB_DATA_SYNC_BYPASS(1));
-}
-
-static void px30_rgb_disable(struct rockchip_rgb *rgb)
-{
-	regmap_write(rgb->grf, PX30_GRF_PD_VO_CON1,
-		     PX30_RGB_DATA_SYNC_BYPASS(0));
+	regmap_write(rgb->grf, PX30_GRF_PD_VO_CON1, PX30_RGB_VOP_SEL(pipe) |
+		     PX30_RGB_DATA_SYNC_BYPASS(!rgb->data_sync));
 }
 
 static const struct rockchip_rgb_funcs px30_rgb_funcs = {
 	.enable = px30_rgb_enable,
-	.disable = px30_rgb_disable,
 };
 
 static const struct rockchip_connector px30_rgb_driver_data = {
@@ -133,18 +126,11 @@ static const struct rockchip_connector px30_rgb_driver_data = {
 static void rk1808_rgb_enable(struct rockchip_rgb *rgb, int pipe)
 {
 	regmap_write(rgb->grf, RK1808_GRF_PD_VO_CON1,
-		     RK1808_RGB_DATA_SYNC_BYPASS(1));
-}
-
-static void rk1808_rgb_disable(struct rockchip_rgb *rgb)
-{
-	regmap_write(rgb->grf, RK1808_GRF_PD_VO_CON1,
-		     RK1808_RGB_DATA_SYNC_BYPASS(0));
+		     RK1808_RGB_DATA_SYNC_BYPASS(!rgb->data_sync));
 }
 
 static const struct rockchip_rgb_funcs rk1808_rgb_funcs = {
 	.enable = rk1808_rgb_enable,
-	.disable = rk1808_rgb_disable,
 };
 
 static const struct rockchip_connector rk1808_rgb_driver_data = {

commit d71853e78848410e8084c9d67df52dcdbd51777c
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Dec 17 09:47:12 2018 +0800

    configs: evb-px30: enable CONFIG_DRM_ROCKCHIP_RK618
    
    Change-Id: Ic21c8aaf735129b02fc2270cdb5057db382f6092
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 5ef64e2c0c..6fc0641ea1 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -104,6 +104,7 @@ CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
+CONFIG_DRM_ROCKCHIP_RK618=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y

commit 117fdc8998f55907f022765031d3a64fabd01ef0
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Thu Jul 26 17:25:57 2018 +0800

    video/drm: Add support for rk618
    
    RK618 is a partner chip for Rockchip mobile application processor.
    
    RK618 includes two RGB display input interface with double data rate.
    With the internal MUX function, it can output 1080P HDMI signal to
    TV and output RGB/LVDS/MIPI signal to TFT panel. In this case, RK618
    can support dual panel (TV and TFT) display.
    
    Change-Id: I566b161211e6662f73e5de2b14fb20b33e8e57ef
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/Kconfig b/drivers/video/drm/Kconfig
index 4365815e45..6f071f8cb1 100644
--- a/drivers/video/drm/Kconfig
+++ b/drivers/video/drm/Kconfig
@@ -71,6 +71,15 @@ config DRM_ROCKCHIP_RGB
 	  Choose this option to enable support for Rockchip RGB driver.
 	  say Y to enable its driver.
 
+config DRM_ROCKCHIP_RK618
+	bool "Rockchip RK618 display bridge driver"
+	depends on DRM_ROCKCHIP
+	select DRM_ROCKCHIP_PANEL
+	select VIDEO_BRIDGE
+	help
+	  Choose this option to enable support for Rockchip RK618 display
+	  bridge chips driver. say Y to enable its driver.
+
 config ROCKCHIP_DRM_TVE
 	bool "Rockchip TVE Support"
 	depends on DRM_ROCKCHIP
diff --git a/drivers/video/drm/Makefile b/drivers/video/drm/Makefile
index eb647ebc11..c91f46967a 100644
--- a/drivers/video/drm/Makefile
+++ b/drivers/video/drm/Makefile
@@ -17,3 +17,4 @@ obj-$(CONFIG_DRM_ROCKCHIP_ANALOGIX_DP) += analogix_dp.o analogix_dp_reg.o
 obj-$(CONFIG_DRM_ROCKCHIP_LVDS) += rockchip_lvds.o
 obj-$(CONFIG_DRM_ROCKCHIP_RGB) += rockchip_rgb.o
 obj-$(CONFIG_DRM_ROCKCHIP_PANEL) += rockchip_panel.o
+obj-$(CONFIG_DRM_ROCKCHIP_RK618) += rk618.o rk618_lvds.o
diff --git a/drivers/video/drm/rk618.c b/drivers/video/drm/rk618.c
new file mode 100644
index 0000000000..72d6dbacbc
--- /dev/null
+++ b/drivers/video/drm/rk618.c
@@ -0,0 +1,183 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2008-2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <i2c.h>
+#include <errno.h>
+#include <dm.h>
+#include <dm/uclass.h>
+#include <dm/uclass-id.h>
+
+#include "rk618.h"
+
+int rk618_i2c_write(struct rk618 *rk618, u16 reg, u32 val)
+{
+	struct dm_i2c_chip *chip = dev_get_parent_platdata(rk618->dev);
+	struct i2c_msg msg;
+	u8 buf[] = {
+		(reg >> 0) & 0xff, (reg >> 8) & 0xff,
+		(val >> 0) & 0xff, (val >> 8) & 0xff,
+		(val >> 16) & 0xff, (val >> 24) & 0xff
+	};
+	int ret;
+
+	msg.addr = chip->chip_addr;
+	msg.flags = 0;
+	msg.len = sizeof(buf);
+	msg.buf = buf;
+
+	ret = dm_i2c_xfer(rk618->dev, &msg, 1);
+	if (ret) {
+		dev_err(rk618->dev, "Could not execute transfer: %d\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+int rk618_i2c_read(struct rk618 *rk618, u16 reg, u32 *val)
+{
+	struct dm_i2c_chip *chip = dev_get_parent_platdata(rk618->dev);
+	u32 data;
+	struct i2c_msg msg[] = {
+		{
+			.addr = chip->chip_addr,
+			.flags = 0,
+			.buf = (u8 *)&reg,
+			.len = 2,
+		}, {
+			.addr = chip->chip_addr,
+			.flags = I2C_M_RD,
+			.buf = (u8 *)&data,
+			.len = 4,
+		}
+	};
+	int ret;
+
+	ret = dm_i2c_xfer(rk618->dev, msg, 2);
+	if (ret) {
+		dev_err(rk618->dev, "Could not execute transfer: %d\n", ret);
+		return ret;
+	}
+
+	*val = data;
+
+	return 0;
+}
+
+void rk618_frc_dither_disable(struct rk618 *rk618)
+{
+	rk618_i2c_write(rk618, RK618_FRC_REG, FRC_DITHER_DISABLE);
+}
+
+void rk618_frc_dither_enable(struct rk618 *rk618)
+{
+	rk618_i2c_write(rk618, RK618_FRC_REG, FRC_DITHER_ENABLE);
+}
+
+void rk618_frc_dclk_invert(struct rk618 *rk618)
+{
+	rk618_i2c_write(rk618, RK618_FRC_REG, FRC_DCLK_INV);
+}
+
+static int rk618_power_on(struct rk618 *rk618)
+{
+	if (rk618->power_supply)
+		regulator_set_enable(rk618->power_supply, 1);
+
+	if (dm_gpio_is_valid(&rk618->enable_gpio))
+		dm_gpio_set_value(&rk618->enable_gpio, 1);
+
+	mdelay(2);
+	dm_gpio_set_value(&rk618->reset_gpio, 0);
+	mdelay(4);
+	dm_gpio_set_value(&rk618->reset_gpio, 1);
+	mdelay(50);
+	dm_gpio_set_value(&rk618->reset_gpio, 0);
+
+	return 0;
+}
+
+static void rk618_cru_init(struct rk618 *rk618)
+{
+	rk618_i2c_write(rk618, 0x0058, 0xffff0000);
+	rk618_i2c_write(rk618, 0x005c, 0xffff1d1e);
+	rk618_i2c_write(rk618, 0x0060, 0x00000000);
+	rk618_i2c_write(rk618, 0x0064, 0xffff2186);
+	rk618_i2c_write(rk618, 0x0068, 0xffff1028);
+	rk618_i2c_write(rk618, 0x006c, 0xffff0641);
+	rk618_i2c_write(rk618, 0x0070, 0x00800000);
+	rk618_i2c_write(rk618, 0x0074, 0xffff1028);
+	rk618_i2c_write(rk618, 0x0078, 0xffff0641);
+	rk618_i2c_write(rk618, 0x007c, 0x00800000);
+}
+
+static int rk618_probe(struct udevice *dev)
+{
+	struct rk618 *rk618 = dev_get_priv(dev);
+	int ret;
+
+	rk618->dev = dev;
+
+	ret = uclass_get_device_by_phandle(UCLASS_REGULATOR, dev,
+					   "power-supply",
+					   &rk618->power_supply);
+	if (ret && ret != -ENOENT) {
+		dev_err(dev, "Cannot get power supply: %d\n", ret);
+		return ret;
+	}
+
+	ret = gpio_request_by_name(dev, "enable-gpios", 0,
+				   &rk618->enable_gpio, GPIOD_IS_OUT);
+	if (ret && ret != -ENOENT) {
+		dev_err(dev, "Cannot get enable GPIO: %d\n", ret);
+		return ret;
+	}
+
+	ret = gpio_request_by_name(dev, "reset-gpios", 0,
+				   &rk618->reset_gpio, GPIOD_IS_OUT);
+	if (ret) {
+		dev_err(dev, "Cannot get reset GPIO: %d\n", ret);
+		return ret;
+	}
+
+	ret = clk_get_by_name(dev, "clkin", &rk618->clkin);
+	if (ret < 0) {
+		dev_err(dev, "failed to get clkin: %d\n", ret);
+		return ret;
+	}
+
+	ret = clk_set_rate(&rk618->clkin, 12000000);
+	if (ret < 0) {
+		dev_err(dev, "failed to set rate: %d\n", ret);
+		return ret;
+	}
+
+	clk_enable(&rk618->clkin);
+
+	ret = rk618_power_on(rk618);
+	if (ret) {
+		dev_err(dev, "failed to power on: %d\n", ret);
+		return ret;
+	}
+
+	rk618_cru_init(rk618);
+
+	return 0;
+}
+
+static const struct udevice_id rk618_of_match[] = {
+	{ .compatible = "rockchip,rk618" },
+	{}
+};
+
+U_BOOT_DRIVER(rk618) = {
+	.name = "rk618",
+	.id = UCLASS_I2C_GENERIC,
+	.of_match = rk618_of_match,
+	.probe = rk618_probe,
+	.bind = dm_scan_fdt_dev,
+	.priv_auto_alloc_size = sizeof(struct rk618),
+};
diff --git a/drivers/video/drm/rk618.h b/drivers/video/drm/rk618.h
new file mode 100644
index 0000000000..ab93da90b9
--- /dev/null
+++ b/drivers/video/drm/rk618.h
@@ -0,0 +1,73 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2008-2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _RK618_H_
+#define _RK618_H_
+
+#include <clk.h>
+#include <dm/device.h>
+#include <power/regulator.h>
+#include <asm/gpio.h>
+
+#define UPDATE(v, h, l)	(((v) << (l)) & GENMASK((h), (l)))
+#define HIWORD_UPDATE(v, h, l)	(((v) << (l)) | (GENMASK(h, l) << 16))
+
+#define RK618_FRC_REG			0x0054
+#define FRC_DEN_INV			HIWORD_UPDATE(1, 6, 6)
+#define FRC_SYNC_INV			HIWORD_UPDATE(1, 5, 5)
+#define FRC_DCLK_INV			HIWORD_UPDATE(1, 4, 4)
+#define FRC_OUT_ZERO			HIWORD_UPDATE(1, 3, 3)
+#define FRC_OUT_MODE_RGB666		HIWORD_UPDATE(1, 2, 2)
+#define FRC_OUT_MODE_RGB888		HIWORD_UPDATE(0, 2, 2)
+#define FRC_DITHER_MODE_HI_FRC		HIWORD_UPDATE(1, 1, 1)
+#define FRC_DITHER_MODE_FRC		HIWORD_UPDATE(0, 1, 1)
+#define FRC_DITHER_ENABLE		HIWORD_UPDATE(1, 0, 0)
+#define FRC_DITHER_DISABLE		HIWORD_UPDATE(0, 0, 0)
+#define RK618_LVDS_CON			0x0084
+#define LVDS_CON_START_PHASE(x)		HIWORD_UPDATE(x, 14, 14)
+#define LVDS_DCLK_INV			HIWORD_UPDATE(1, 13, 13)
+#define LVDS_CON_CHADS_10PF		HIWORD_UPDATE(3, 12, 11)
+#define LVDS_CON_CHADS_5PF		HIWORD_UPDATE(2, 12, 11)
+#define LVDS_CON_CHADS_7PF		HIWORD_UPDATE(1, 12, 11)
+#define LVDS_CON_CHADS_3PF		HIWORD_UPDATE(0, 12, 11)
+#define LVDS_CON_CHA1TTL_ENABLE		HIWORD_UPDATE(1, 10, 10)
+#define LVDS_CON_CHA1TTL_DISABLE	HIWORD_UPDATE(0, 10, 10)
+#define LVDS_CON_CHA0TTL_ENABLE		HIWORD_UPDATE(1, 9, 9)
+#define LVDS_CON_CHA0TTL_DISABLE	HIWORD_UPDATE(0, 9, 9)
+#define LVDS_CON_CHA1_POWER_UP		HIWORD_UPDATE(1, 8, 8)
+#define LVDS_CON_CHA1_POWER_DOWN	HIWORD_UPDATE(0, 8, 8)
+#define LVDS_CON_CHA0_POWER_UP		HIWORD_UPDATE(1, 7, 7)
+#define LVDS_CON_CHA0_POWER_DOWN	HIWORD_UPDATE(0, 7, 7)
+#define LVDS_CON_CBG_POWER_UP		HIWORD_UPDATE(1, 6, 6)
+#define LVDS_CON_CBG_POWER_DOWN		HIWORD_UPDATE(0, 6, 6)
+#define LVDS_CON_PLL_POWER_DOWN		HIWORD_UPDATE(1, 5, 5)
+#define LVDS_CON_PLL_POWER_UP		HIWORD_UPDATE(0, 5, 5)
+#define LVDS_CON_START_SEL_EVEN_PIXEL	HIWORD_UPDATE(1, 4, 4)
+#define LVDS_CON_START_SEL_ODD_PIXEL	HIWORD_UPDATE(0, 4, 4)
+#define LVDS_CON_CHASEL_DOUBLE_CHANNEL	HIWORD_UPDATE(1, 3, 3)
+#define LVDS_CON_CHASEL_SINGLE_CHANNEL	HIWORD_UPDATE(0, 3, 3)
+#define LVDS_CON_MSBSEL_D7		HIWORD_UPDATE(1, 2, 2)
+#define LVDS_CON_MSBSEL_D0		HIWORD_UPDATE(0, 2, 2)
+#define LVDS_CON_SELECT(x)		HIWORD_UPDATE(x, 1, 0)
+#define LVDS_CON_SELECT_6BIT_MODE	HIWORD_UPDATE(3, 1, 0)
+#define LVDS_CON_SELECT_8BIT_MODE_3	HIWORD_UPDATE(2, 1, 0)
+#define LVDS_CON_SELECT_8BIT_MODE_2	HIWORD_UPDATE(1, 1, 0)
+#define LVDS_CON_SELECT_8BIT_MODE_1	HIWORD_UPDATE(0, 1, 0)
+
+struct rk618 {
+	struct udevice *dev;
+	struct udevice *power_supply;
+	struct gpio_desc enable_gpio;
+	struct gpio_desc reset_gpio;
+	struct clk clkin;
+};
+
+int rk618_i2c_write(struct rk618 *rk618, u16 reg, u32 val);
+int rk618_i2c_read(struct rk618 *rk618, u16 reg, u32 *val);
+void rk618_frc_dither_disable(struct rk618 *rk618);
+void rk618_frc_dither_enable(struct rk618 *rk618);
+void rk618_frc_dclk_invert(struct rk618 *rk618);
+
+#endif
diff --git a/drivers/video/drm/rk618_lvds.c b/drivers/video/drm/rk618_lvds.c
new file mode 100644
index 0000000000..ad1e35979d
--- /dev/null
+++ b/drivers/video/drm/rk618_lvds.c
@@ -0,0 +1,127 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2008-2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/device-internal.h>
+#include <errno.h>
+#include <i2c.h>
+#include <video_bridge.h>
+#include <linux/media-bus-format.h>
+
+#include "rockchip_display.h"
+#include "rockchip_bridge.h"
+#include "rockchip_panel.h"
+
+#include "rk618.h"
+
+enum {
+	LVDS_8BIT_MODE_FORMAT_1,
+	LVDS_8BIT_MODE_FORMAT_2,
+	LVDS_8BIT_MODE_FORMAT_3,
+	LVDS_6BIT_MODE,
+};
+
+struct rk618_lvds_priv {
+	struct udevice *dev;
+	struct rk618 *parent;
+	bool dual_channel;
+};
+
+static int lvds_write(struct rk618_lvds_priv *priv, u16 reg, u32 val)
+{
+	return rk618_i2c_write(priv->parent, reg, val);
+}
+
+static void rk618_lvds_bridge_enable(struct rockchip_bridge *bridge)
+{
+	struct rk618_lvds_priv *priv = dev_get_priv(bridge->dev);
+	struct rockchip_panel *panel = state_get_panel(bridge->state);
+	u32 value, format;
+
+	rk618_frc_dclk_invert(priv->parent);
+
+	switch (panel->bus_format) {
+	case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:	/* jeida-18 */
+		format = LVDS_6BIT_MODE;
+		break;
+	case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:	/* jeida-24 */
+		format = LVDS_8BIT_MODE_FORMAT_2;
+		break;
+	case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:	/* vesa-24 */
+		format = LVDS_8BIT_MODE_FORMAT_1;
+		break;
+	default:
+		format = LVDS_8BIT_MODE_FORMAT_3;
+		break;
+	}
+
+	value = LVDS_CON_CHA0TTL_DISABLE | LVDS_CON_CHA1TTL_DISABLE |
+		LVDS_CON_CHA0_POWER_UP | LVDS_CON_CBG_POWER_UP |
+		LVDS_CON_PLL_POWER_UP | LVDS_CON_SELECT(format);
+
+	if (priv->dual_channel)
+		value |= LVDS_CON_CHA1_POWER_UP | LVDS_DCLK_INV |
+			 LVDS_CON_CHASEL_DOUBLE_CHANNEL;
+	else
+		value |= LVDS_CON_CHA1_POWER_DOWN |
+			 LVDS_CON_CHASEL_SINGLE_CHANNEL;
+
+	lvds_write(priv, RK618_LVDS_CON, value);
+}
+
+static void rk618_lvds_bridge_disable(struct rockchip_bridge *bridge)
+{
+	struct rk618_lvds_priv *priv = dev_get_priv(bridge->dev);
+
+	lvds_write(priv, RK618_LVDS_CON,
+		   LVDS_CON_CHA0_POWER_DOWN | LVDS_CON_CHA1_POWER_DOWN |
+		   LVDS_CON_CBG_POWER_DOWN | LVDS_CON_PLL_POWER_DOWN);
+}
+
+static const struct rockchip_bridge_funcs rk618_lvds_bridge_funcs = {
+	.enable = rk618_lvds_bridge_enable,
+	.disable = rk618_lvds_bridge_disable,
+};
+
+static int rk618_lvds_probe(struct udevice *dev)
+{
+	struct rk618_lvds_priv *priv = dev_get_priv(dev);
+	struct rockchip_bridge *bridge =
+		(struct rockchip_bridge *)dev_get_driver_data(dev);
+	int ret;
+
+	priv->dev = dev;
+	priv->parent = dev_get_priv(dev->parent);
+	priv->dual_channel = dev_read_bool(dev, "dual-channel");
+
+	ret = device_probe(dev->parent);
+	if (ret)
+		return ret;
+
+	bridge->dev = dev;
+
+	return 0;
+}
+
+static struct rockchip_bridge rk618_lvds_driver_data = {
+	.funcs = &rk618_lvds_bridge_funcs,
+};
+
+static const struct udevice_id rk618_lvds_ids[] = {
+	{
+		.compatible = "rockchip,rk618-lvds",
+		.data = (ulong)&rk618_lvds_driver_data,
+	},
+	{ }
+};
+
+U_BOOT_DRIVER(rk618_lvds) = {
+	.name = "rk618_lvds",
+	.id = UCLASS_VIDEO_BRIDGE,
+	.of_match = rk618_lvds_ids,
+	.probe = rk618_lvds_probe,
+	.priv_auto_alloc_size = sizeof(struct rk618_lvds_priv),
+};

commit 1a8d717c29a3f61ca24a13437be5fb509287df96
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Nov 30 17:23:04 2018 +0800

    video/drm: Add rockchip bridge framework
    
    The current implementation assumes that the only possible peripheral
    device is a panel. Using an output bridge device should also be possible.
    
    Such sequence is required by Rockchip RK618 bridge, which is a RGB
    peripheral bridge device.
    
    Change-Id: I3e4e5e9e23c8ed7c74ed1276946b7b54f4cd5ee8
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/Kconfig b/drivers/video/drm/Kconfig
index 0c60d9d73d..4365815e45 100644
--- a/drivers/video/drm/Kconfig
+++ b/drivers/video/drm/Kconfig
@@ -1,6 +1,7 @@
 menuconfig DRM_ROCKCHIP
 	bool "Rockchip DRM Support"
 	depends on DM_VIDEO && OF_LIVE
+	select VIDEO_BRIDGE
 	help
 	  Rockchip SoCs provide video output capabilities for High-Definition
 	  Multimedia Interface (HDMI), Low-voltage Differential Signalling
diff --git a/drivers/video/drm/Makefile b/drivers/video/drm/Makefile
index 1c89eee57e..eb647ebc11 100644
--- a/drivers/video/drm/Makefile
+++ b/drivers/video/drm/Makefile
@@ -4,7 +4,7 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
 
-obj-y += rockchip_display.o rockchip_crtc.o rockchip_phy.o \
+obj-y += rockchip_display.o rockchip_crtc.o rockchip_phy.o rockchip_bridge.o \
 		rockchip_vop.o rockchip_vop_reg.o bmp_helper.o
 
 obj-$(CONFIG_DRM_ROCKCHIP_MIPI_DSI)	+= rockchip_mipi_dsi.o
diff --git a/drivers/video/drm/rockchip_bridge.c b/drivers/video/drm/rockchip_bridge.c
new file mode 100644
index 0000000000..61870b5efb
--- /dev/null
+++ b/drivers/video/drm/rockchip_bridge.c
@@ -0,0 +1,42 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2008-2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include "rockchip_bridge.h"
+
+void rockchip_bridge_pre_enable(struct rockchip_bridge *bridge)
+{
+	if (!bridge)
+		return;
+
+	if (bridge->funcs && bridge->funcs->pre_enable)
+		bridge->funcs->pre_enable(bridge);
+}
+
+void rockchip_bridge_post_disable(struct rockchip_bridge *bridge)
+{
+	if (!bridge)
+		return;
+
+	if (bridge->funcs && bridge->funcs->post_disable)
+		bridge->funcs->post_disable(bridge);
+}
+
+void rockchip_bridge_enable(struct rockchip_bridge *bridge)
+{
+	if (!bridge)
+		return;
+
+	if (bridge->funcs && bridge->funcs->enable)
+		bridge->funcs->enable(bridge);
+}
+
+void rockchip_bridge_disable(struct rockchip_bridge *bridge)
+{
+	if (!bridge)
+		return;
+
+	if (bridge->funcs && bridge->funcs->disable)
+		bridge->funcs->disable(bridge);
+}
diff --git a/drivers/video/drm/rockchip_bridge.h b/drivers/video/drm/rockchip_bridge.h
new file mode 100644
index 0000000000..687b9f277b
--- /dev/null
+++ b/drivers/video/drm/rockchip_bridge.h
@@ -0,0 +1,36 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2008-2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _ROCKCHIP_BRIDGE_H_
+#define _ROCKCHIP_BRIDGE_H_
+
+#include <config.h>
+#include <common.h>
+#include <dm/device.h>
+#include <errno.h>
+
+struct display_state;
+struct rockchip_bridge;
+
+struct rockchip_bridge_funcs {
+	void (*enable)(struct rockchip_bridge *bridge);
+	void (*disable)(struct rockchip_bridge *bridge);
+	void (*pre_enable)(struct rockchip_bridge *bridge);
+	void (*post_disable)(struct rockchip_bridge *bridge);
+};
+
+struct rockchip_bridge {
+	struct udevice *dev;
+	const struct rockchip_bridge_funcs *funcs;
+
+	struct display_state *state;
+};
+
+void rockchip_bridge_enable(struct rockchip_bridge *bridge);
+void rockchip_bridge_disable(struct rockchip_bridge *bridge);
+void rockchip_bridge_pre_enable(struct rockchip_bridge *bridge);
+void rockchip_bridge_post_disable(struct rockchip_bridge *bridge);
+
+#endif
diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 804f2ac8ce..e03738a97a 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -18,6 +18,7 @@
 #include <malloc.h>
 #include <video.h>
 #include <video_rockchip.h>
+#include <video_bridge.h>
 #include <dm/device.h>
 #include <dm/uclass-internal.h>
 #include <asm/arch-rockchip/resource_img.h>
@@ -26,6 +27,7 @@
 #include "rockchip_display.h"
 #include "rockchip_crtc.h"
 #include "rockchip_connector.h"
+#include "rockchip_bridge.h"
 #include "rockchip_phy.h"
 #include "rockchip_panel.h"
 #include <dm.h>
@@ -169,65 +171,6 @@ static bool can_direct_logo(int bpp)
 	return bpp == 24 || bpp == 32;
 }
 
-
-static struct udevice *get_panel_device(struct display_state *state, ofnode conn_node)
-{
-	struct panel_state *panel_state = &state->panel_state;
-	struct udevice *dev;
-	struct connector_state *conn_state = &state->conn_state;
-	ofnode node, ports_node, port_node;
-	struct device_node *port, *panel, *ep;
-	int ph;
-	int ret;
-
-	node = dev_read_subnode(conn_state->dev, "panel");
-	if (ofnode_valid(node) &&
-	    of_device_is_available(ofnode_to_np(node))) {
-		ret = uclass_get_device_by_ofnode(UCLASS_PANEL, node, &dev);
-		if (!ret) {
-			panel_state->node = node;
-			return dev;
-		}
-	}
-
-	/* TODO: this path not tested */
-	ports_node = dev_read_subnode(conn_state->dev, "ports");
-	if (!ofnode_valid(ports_node))
-		return NULL;
-
-	ofnode_for_each_subnode(port_node, ports_node) {
-		ofnode_for_each_subnode(node, port_node) {
-			ph = ofnode_read_u32_default(node, "remote-endpoint", -1);
-			if (!ph)
-				continue;
-			ep = of_find_node_by_phandle(ph);
-			if (!ofnode_valid(np_to_ofnode(ep))) {
-				printf("Warn: can't find endpoint from phdl\n");
-				continue;
-			}
-			port = of_get_parent(ep);
-			if (!ofnode_valid(np_to_ofnode(port))) {
-				printf("Warn: can't find port node\n");
-				continue;
-			}
-			panel = of_get_parent(port);
-			if (!ofnode_valid(np_to_ofnode(panel))) {
-				printf("Warn: can't find panel node\n");
-				continue;
-			}
-			ret = uclass_get_device_by_ofnode(UCLASS_PANEL,
-							  np_to_ofnode(panel),
-							  &dev);
-			if (!ret) {
-				panel_state->node = np_to_ofnode(panel);
-				return dev;
-			}
-		}
-	}
-
-	return NULL;
-}
-
 static int connector_phy_init(struct display_state *state,
 			      struct public_phy_data *data)
 {
@@ -292,27 +235,12 @@ static int connector_panel_init(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
 	struct panel_state *panel_state = &state->panel_state;
-	struct udevice *dev;
-	ofnode conn_node = conn_state->node;
-	const struct rockchip_panel *panel;
+	const struct rockchip_panel *panel = panel_state->panel;
 	ofnode dsp_lut_node;
 	int ret, len;
 
-	dm_scan_fdt_dev(conn_state->dev);
-
-	dev = get_panel_device(state, conn_node);
-	if (!dev) {
+	if (!panel)
 		return 0;
-	}
-
-	panel = (const struct rockchip_panel *)dev_get_driver_data(dev);
-	if (!panel) {
-		printf("failed to find panel driver\n");
-		return 0;
-	}
-
-	panel_state->dev = dev;
-	panel_state->panel = panel;
 
 	if (panel->funcs && panel->funcs->init) {
 		ret = panel->funcs->init(state);
@@ -322,7 +250,7 @@ static int connector_panel_init(struct display_state *state)
 		}
 	}
 
-	dsp_lut_node = dev_read_subnode(dev, "dsp-lut");
+	dsp_lut_node = dev_read_subnode(panel->dev, "dsp-lut");
 	if (!ofnode_valid(dsp_lut_node)) {
 		debug("%s can not find dsp-lut node\n", __func__);
 		return 0;
@@ -379,6 +307,7 @@ int drm_mode_vrefresh(const struct drm_display_mode *mode)
 static int display_get_timing_from_dts(struct panel_state *panel_state,
 				       struct drm_display_mode *mode)
 {
+	struct rockchip_panel *panel = panel_state->panel;
 	int phandle;
 	int hactive, vactive, pixelclock;
 	int hfront_porch, hback_porch, hsync_len;
@@ -386,7 +315,7 @@ static int display_get_timing_from_dts(struct panel_state *panel_state,
 	int val, flags = 0;
 	ofnode timing, native_mode;
 
-	timing = dev_read_subnode(panel_state->dev, "display-timings");
+	timing = dev_read_subnode(panel->dev, "display-timings");
 	if (!ofnode_valid(timing))
 		return -ENODEV;
 
@@ -585,11 +514,10 @@ static int display_get_timing(struct display_state *state)
 	const struct drm_display_mode *m;
 	struct panel_state *panel_state = &state->panel_state;
 	const struct rockchip_panel *panel = panel_state->panel;
-	const struct rockchip_panel_funcs *panel_funcs = panel->funcs;
-	ofnode panel_node = panel_state->node;
 	int ret;
 
-	if (ofnode_valid(panel_node) && !display_get_timing_from_dts(panel_state, mode)) {
+	if (dev_of_valid(panel->dev) &&
+	    !display_get_timing_from_dts(panel_state, mode)) {
 		printf("Using display timing dts\n");
 		goto done;
 	}
@@ -605,8 +533,8 @@ static int display_get_timing(struct display_state *state)
 		int panel_bits_per_colourp;
 
 		/* In order to read EDID, the panel needs to be powered on */
-		if (panel_funcs->prepare) {
-			ret = panel_funcs->prepare(state);
+		if (panel->funcs->prepare) {
+			ret = panel->funcs->prepare(state);
 			if (ret) {
 				printf("failed to prepare panel\n");
 				return ret;
@@ -620,8 +548,8 @@ static int display_get_timing(struct display_state *state)
 			edid_print_info((void *)&conn_state->edid);
 			goto done;
 		} else {
-			if (panel_funcs->unprepare)
-				panel_funcs->unprepare(state);
+			if (panel->funcs->unprepare)
+				panel->funcs->unprepare(state);
 		}
 	}
 
@@ -645,6 +573,7 @@ done:
 static int display_init(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
+	struct panel_state *panel_state = &state->panel_state;
 	const struct rockchip_connector *conn = conn_state->connector;
 	const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
 	struct crtc_state *crtc_state = &state->crtc_state;
@@ -698,13 +627,24 @@ static int display_init(struct display_state *state)
 
 	if (conn_funcs->get_timing) {
 		ret = conn_funcs->get_timing(state);
-		if (ret)
-			goto deinit;
-	} else {
+	} else if (panel_state->panel) {
 		ret = display_get_timing(state);
-		if (ret)
-			goto deinit;
+	} else if (conn_state->bridge) {
+		int bpc;
+
+		ret = video_bridge_read_edid(conn_state->bridge->dev,
+					     conn_state->edid, EDID_SIZE);
+		if (ret > 0) {
+			ret = edid_get_drm_mode(conn_state->edid, ret, mode,
+						&bpc);
+			if (!ret)
+				edid_print_info((void *)&conn_state->edid);
+		}
 	}
+
+	if (ret)
+		goto deinit;
+
 	drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
 
 	if (crtc_funcs->init) {
@@ -842,6 +782,9 @@ static int display_enable(struct display_state *state)
 			goto unprepare_crtc;
 	}
 
+	if (conn_state->bridge)
+		rockchip_bridge_pre_enable(conn_state->bridge);
+
 	display_panel_prepare(state);
 
 	if (crtc_funcs->enable) {
@@ -856,6 +799,9 @@ static int display_enable(struct display_state *state)
 			goto disable_crtc;
 	}
 
+	if (conn_state->bridge)
+		rockchip_bridge_enable(conn_state->bridge);
+
 	display_panel_enable(state);
 
 	state->is_enable = true;
@@ -890,14 +836,20 @@ static int display_disable(struct display_state *state)
 
 	display_panel_disable(state);
 
-	if (crtc_funcs->disable)
-		crtc_funcs->disable(state);
+	if (conn_state->bridge)
+		rockchip_bridge_disable(conn_state->bridge);
 
 	if (conn_funcs->disable)
 		conn_funcs->disable(state);
 
+	if (crtc_funcs->disable)
+		crtc_funcs->disable(state);
+
 	display_panel_unprepare(state);
 
+	if (conn_state->bridge)
+		rockchip_bridge_post_disable(conn_state->bridge);
+
 	if (conn_funcs->unprepare)
 		conn_funcs->unprepare(state);
 
@@ -1232,6 +1184,126 @@ void rockchip_show_logo(void)
 	}
 }
 
+enum {
+	PORT_DIR_IN,
+	PORT_DIR_OUT,
+};
+
+static struct rockchip_panel *rockchip_of_find_panel(struct udevice *dev)
+{
+	ofnode panel_node, ports, port, ep;
+	struct udevice *panel_dev;
+	int ret;
+
+	panel_node = dev_read_subnode(dev, "panel");
+	if (ofnode_valid(panel_node) && ofnode_is_available(panel_node)) {
+		ret = uclass_get_device_by_ofnode(UCLASS_PANEL, panel_node,
+						  &panel_dev);
+		if (!ret)
+			goto found;
+	}
+
+	ports = dev_read_subnode(dev, "ports");
+	if (!ofnode_valid(ports))
+		return NULL;
+
+	ofnode_for_each_subnode(port, ports) {
+		u32 reg;
+
+		if (ofnode_read_u32(port, "reg", &reg))
+			continue;
+
+		if (reg != PORT_DIR_OUT)
+			continue;
+
+		ofnode_for_each_subnode(ep, port) {
+			ofnode _ep, _port;
+			uint phandle;
+
+			if (ofnode_read_u32(ep, "remote-endpoint", &phandle))
+				continue;
+
+			_ep = ofnode_get_by_phandle(phandle);
+			if (!ofnode_valid(_ep))
+				continue;
+
+			_port = ofnode_get_parent(_ep);
+			if (!ofnode_valid(_port))
+				continue;
+
+			panel_node = ofnode_get_parent(_port);
+			if (!ofnode_valid(panel_node))
+				continue;
+
+			ret = uclass_get_device_by_ofnode(UCLASS_PANEL,
+							  panel_node,
+							  &panel_dev);
+			if (!ret)
+				goto found;
+		}
+	}
+
+	return NULL;
+
+found:
+	return (struct rockchip_panel *)dev_get_driver_data(panel_dev);
+}
+
+static struct rockchip_bridge *rockchip_of_find_bridge(struct udevice *conn_dev)
+{
+	ofnode node, ports, port, ep;
+	struct udevice *dev;
+	int ret;
+
+	ports = dev_read_subnode(conn_dev, "ports");
+	if (!ofnode_valid(ports))
+		return NULL;
+
+	ofnode_for_each_subnode(port, ports) {
+		u32 reg;
+
+		if (ofnode_read_u32(port, "reg", &reg))
+			continue;
+
+		if (reg != PORT_DIR_OUT)
+			continue;
+
+		ofnode_for_each_subnode(ep, port) {
+			ofnode _ep, _port, _ports;
+			uint phandle;
+
+			if (ofnode_read_u32(ep, "remote-endpoint", &phandle))
+				continue;
+
+			_ep = ofnode_get_by_phandle(phandle);
+			if (!ofnode_valid(_ep))
+				continue;
+
+			_port = ofnode_get_parent(_ep);
+			if (!ofnode_valid(_port))
+				continue;
+
+			_ports = ofnode_get_parent(_port);
+			if (!ofnode_valid(_ports))
+				continue;
+
+			node = ofnode_get_parent(_ports);
+			if (!ofnode_valid(node))
+				continue;
+
+			ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_BRIDGE,
+							  node, &dev);
+			if (!ret)
+				goto found;
+		}
+	}
+
+	return NULL;
+
+found:
+	return (struct rockchip_bridge *)dev_get_driver_data(dev);
+}
+
 static struct udevice *rockchip_of_find_connector(ofnode endpoint)
 {
 	ofnode ep, port, ports, conn;
@@ -1274,6 +1346,8 @@ static int rockchip_display_probe(struct udevice *dev)
 	struct udevice *crtc_dev, *conn_dev;
 	struct rockchip_crtc *crtc;
 	const struct rockchip_connector *conn;
+	struct rockchip_panel *panel = NULL;
+	struct rockchip_bridge *bridge = NULL;
 	struct display_state *s;
 	const char *name;
 	int ret;
@@ -1338,6 +1412,12 @@ static int rockchip_display_probe(struct udevice *dev)
 
 		conn = (const struct rockchip_connector *)dev_get_driver_data(conn_dev);
 
+		bridge = rockchip_of_find_bridge(conn_dev);
+		if (bridge)
+			panel = rockchip_of_find_panel(bridge->dev);
+		else
+			panel = rockchip_of_find_panel(conn_dev);
+
 		s = malloc(sizeof(*s));
 		if (!s)
 			continue;
@@ -1363,9 +1443,11 @@ static int rockchip_display_probe(struct udevice *dev)
 			s->charge_logo_mode = ROCKCHIP_DISPLAY_CENTER;
 
 		s->blob = blob;
+		s->panel_state.panel = panel;
 		s->conn_state.node = conn_dev->node;
 		s->conn_state.dev = conn_dev;
 		s->conn_state.connector = conn;
+		s->conn_state.bridge = bridge;
 		s->conn_state.overscan.left_margin = 100;
 		s->conn_state.overscan.right_margin = 100;
 		s->conn_state.overscan.top_margin = 100;
@@ -1375,6 +1457,10 @@ static int rockchip_display_probe(struct udevice *dev)
 		s->crtc_state.crtc = crtc;
 		s->crtc_state.crtc_id = get_crtc_id(np_to_ofnode(ep_node));
 		s->node = node;
+
+		if (bridge)
+			bridge->state = s;
+
 		get_crtc_mcu_mode(&s->crtc_state);
 
 		if (connector_panel_init(s)) {
diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index d30eb50c4b..e2301b02c2 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -87,12 +87,9 @@ struct crtc_state {
 };
 
 struct panel_state {
-	struct udevice *dev;
-	ofnode node;
-	ofnode dsp_lut_node;
+	struct rockchip_panel *panel;
 
-	const struct rockchip_panel *panel;
-	void *private;
+	ofnode dsp_lut_node;
 };
 
 struct overscan {
@@ -105,6 +102,7 @@ struct overscan {
 struct connector_state {
 	struct udevice *dev;
 	const struct rockchip_connector *connector;
+	struct rockchip_bridge *bridge;
 	struct udevice *phy_dev;
 	struct rockchip_phy *phy;
 	ofnode node;
@@ -167,6 +165,13 @@ struct display_state {
 	int is_enable;
 };
 
+static inline struct rockchip_panel *state_get_panel(struct display_state *s)
+{
+	struct panel_state *panel_state = &s->panel_state;
+
+	return panel_state->panel;
+}
+
 int drm_mode_vrefresh(const struct drm_display_mode *mode);
 int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val);
 bool drm_mode_is_420(const struct drm_display_info *display,
diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index 721d39454d..fe081a417c 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -23,6 +23,7 @@
 #include "rockchip_display.h"
 #include "rockchip_crtc.h"
 #include "rockchip_connector.h"
+#include "rockchip_panel.h"
 #include "rockchip_lvds.h"
 
 enum rockchip_lvds_sub_devtype {
@@ -524,8 +525,7 @@ static int rockchip_lvds_init(struct display_state *state)
 	const char *name;
 	int i, width;
 	struct resource lvds_phy, lvds_ctrl;
-	struct panel_state *panel_state = &state->panel_state;
-	ofnode panel_node = panel_state->node;
+	struct rockchip_panel *panel = state_get_panel(state);
 	int ret;
 
 	lvds = malloc(sizeof(*lvds));
@@ -561,7 +561,7 @@ static int rockchip_lvds_init(struct display_state *state)
 		return  -ENXIO;
 	}
 
-	ret = dev_read_string_index(panel_state->dev, "rockchip,output", 0, &name);
+	ret = dev_read_string_index(panel->dev, "rockchip,output", 0, &name);
 	if (ret)
 		/* default set it as output rgb */
 		lvds->output = DISPLAY_OUTPUT_RGB;
@@ -572,7 +572,8 @@ static int rockchip_lvds_init(struct display_state *state)
 		free(lvds);
 		return lvds->output;
 	}
-	ret = dev_read_string_index(panel_state->dev, "rockchip,data-mapping", 0, &name);
+	ret = dev_read_string_index(panel->dev, "rockchip,data-mapping",
+				    0, &name);
 	if (ret)
 		/* default set it as format jeida */
 		lvds->format = LVDS_FORMAT_JEIDA;
@@ -584,7 +585,7 @@ static int rockchip_lvds_init(struct display_state *state)
 		free(lvds);
 		return lvds->format;
 	}
-	width = ofnode_read_u32_default(panel_node, "rockchip,data-width", 24);
+	width = dev_read_u32_default(panel->dev, "rockchip,data-width", 24);
 	if (width == 24) {
 		lvds->format |= LVDS_24BIT;
 	} else if (width == 18) {
diff --git a/drivers/video/drm/rockchip_panel.c b/drivers/video/drm/rockchip_panel.c
index ebf599635d..859a999dff 100644
--- a/drivers/video/drm/rockchip_panel.c
+++ b/drivers/video/drm/rockchip_panel.c
@@ -183,8 +183,8 @@ static int rockchip_panel_send_mcu_cmds(struct display_state *state,
 static int rockchip_panel_send_spi_cmds(struct display_state *state,
 					struct rockchip_panel_cmds *cmds)
 {
-	struct panel_state *panel_state = &state->panel_state;
-	struct rockchip_panel_priv *priv = dev_get_priv(panel_state->dev);
+	struct rockchip_panel *panel = state_get_panel(state);
+	struct rockchip_panel_priv *priv = dev_get_priv(panel->dev);
 	int i;
 
 	if (!cmds)
@@ -253,9 +253,9 @@ static int rockchip_panel_send_dsi_cmds(struct display_state *state,
 
 static int rockchip_panel_prepare(struct display_state *state)
 {
-	struct panel_state *panel_state = &state->panel_state;
-	struct rockchip_panel_plat *plat = dev_get_platdata(panel_state->dev);
-	struct rockchip_panel_priv *priv = dev_get_priv(panel_state->dev);
+	struct rockchip_panel *panel = state_get_panel(state);
+	struct rockchip_panel_plat *plat = dev_get_platdata(panel->dev);
+	struct rockchip_panel_priv *priv = dev_get_priv(panel->dev);
 	int ret;
 
 	if (priv->prepared)
@@ -299,9 +299,9 @@ static int rockchip_panel_prepare(struct display_state *state)
 
 static void rockchip_panel_unprepare(struct display_state *state)
 {
-	struct panel_state *panel_state = &state->panel_state;
-	struct rockchip_panel_plat *plat = dev_get_platdata(panel_state->dev);
-	struct rockchip_panel_priv *priv = dev_get_priv(panel_state->dev);
+	struct rockchip_panel *panel = state_get_panel(state);
+	struct rockchip_panel_plat *plat = dev_get_platdata(panel->dev);
+	struct rockchip_panel_priv *priv = dev_get_priv(panel->dev);
 	int ret;
 
 	if (!priv->prepared)
@@ -338,9 +338,9 @@ static void rockchip_panel_unprepare(struct display_state *state)
 
 static int rockchip_panel_enable(struct display_state *state)
 {
-	struct panel_state *panel_state = &state->panel_state;
-	struct rockchip_panel_plat *plat = dev_get_platdata(panel_state->dev);
-	struct rockchip_panel_priv *priv = dev_get_priv(panel_state->dev);
+	struct rockchip_panel *panel = state_get_panel(state);
+	struct rockchip_panel_plat *plat = dev_get_platdata(panel->dev);
+	struct rockchip_panel_priv *priv = dev_get_priv(panel->dev);
 
 	if (priv->enabled)
 		return 0;
@@ -357,9 +357,9 @@ static int rockchip_panel_enable(struct display_state *state)
 
 static void rockchip_panel_disable(struct display_state *state)
 {
-	struct panel_state *panel_state = &state->panel_state;
-	struct rockchip_panel_plat *plat = dev_get_platdata(panel_state->dev);
-	struct rockchip_panel_priv *priv = dev_get_priv(panel_state->dev);
+	struct rockchip_panel *panel = state_get_panel(state);
+	struct rockchip_panel_plat *plat = dev_get_platdata(panel->dev);
+	struct rockchip_panel_priv *priv = dev_get_priv(panel->dev);
 
 	if (!priv->enabled)
 		return;
@@ -375,10 +375,9 @@ static void rockchip_panel_disable(struct display_state *state)
 static int rockchip_panel_init(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
-	struct panel_state *panel_state = &state->panel_state;
-	struct rockchip_panel_plat *plat = dev_get_platdata(panel_state->dev);
+	struct rockchip_panel *panel = state_get_panel(state);
 
-	conn_state->bus_format = plat->bus_format;
+	conn_state->bus_format = panel->bus_format;
 
 	return 0;
 }
@@ -450,6 +449,9 @@ free_on_cmds:
 static int rockchip_panel_probe(struct udevice *dev)
 {
 	struct rockchip_panel_priv *priv = dev_get_priv(dev);
+	struct rockchip_panel_plat *plat = dev_get_platdata(dev);
+	struct rockchip_panel *panel =
+		(struct rockchip_panel *)dev_get_driver_data(dev);
 	int ret;
 	const char *cmd_type;
 
@@ -515,6 +517,9 @@ static int rockchip_panel_probe(struct udevice *dev)
 		dm_gpio_set_value(&priv->reset_gpio, 0);
 	}
 
+	panel->dev = dev;
+	panel->bus_format = plat->bus_format;
+
 	return 0;
 }
 
@@ -532,7 +537,7 @@ static const struct drm_display_mode auo_b125han03_mode = {
 	.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
 };
 
-static const struct rockchip_panel auo_b125han03_data = {
+static const struct rockchip_panel auo_b125han03_driver_data = {
 	.funcs = &rockchip_panel_funcs,
 	.data = &auo_b125han03_mode,
 };
@@ -551,28 +556,32 @@ static const struct drm_display_mode lg_lp079qx1_sp0v_mode = {
 	.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
 };
 
-static const struct rockchip_panel lg_lp079qx1_sp0v_data = {
+static const struct rockchip_panel lg_lp079qx1_sp0v_driver_data = {
 	.funcs = &rockchip_panel_funcs,
 	.data = &lg_lp079qx1_sp0v_mode,
 };
 
-static const struct rockchip_panel rockchip_panel_data = {
+static const struct rockchip_panel panel_simple_driver_data = {
+	.funcs = &rockchip_panel_funcs,
+};
+
+static const struct rockchip_panel panel_simple_dsi_driver_data = {
 	.funcs = &rockchip_panel_funcs,
 };
 
 static const struct udevice_id rockchip_panel_ids[] = {
 	{
 		.compatible = "auo,b125han03",
-		.data = (ulong)&auo_b125han03_data,
+		.data = (ulong)&auo_b125han03_driver_data,
 	}, {
 		.compatible = "lg,lp079qx1-sp0v",
-		.data = (ulong)&lg_lp079qx1_sp0v_data,
+		.data = (ulong)&lg_lp079qx1_sp0v_driver_data,
 	}, {
 		.compatible = "simple-panel",
-		.data = (ulong)&rockchip_panel_data,
+		.data = (ulong)&panel_simple_driver_data,
 	}, {
 		.compatible = "simple-panel-dsi",
-		.data = (ulong)&rockchip_panel_data,
+		.data = (ulong)&panel_simple_dsi_driver_data,
 	},
 	{}
 };
diff --git a/drivers/video/drm/rockchip_panel.h b/drivers/video/drm/rockchip_panel.h
index c947c9e4c7..e8aab0a5d4 100644
--- a/drivers/video/drm/rockchip_panel.h
+++ b/drivers/video/drm/rockchip_panel.h
@@ -7,6 +7,8 @@
 #ifndef _ROCKCHIP_PANEL_H_
 #define _ROCKCHIP_PANEL_H_
 
+struct display_state;
+
 struct rockchip_panel_funcs {
 	int (*init)(struct display_state *state);
 	void (*deinit)(struct display_state *state);
@@ -17,6 +19,8 @@ struct rockchip_panel_funcs {
 };
 
 struct rockchip_panel {
+	struct udevice *dev;
+	u32 bus_format;
 	const struct rockchip_panel_funcs *funcs;
 	const void *data;
 };

commit 152682ed57d97b84c3ed3ad4bcf81c8e3e854c77
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Dec 17 09:53:14 2018 +0800

    clk: rockchip: px30: support setting clk_i2s_out_mclk to 12MHz
    
    Change-Id: I53fb5ceac0c423dd90c493d6f05069569c839f4e
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 56f05e58af..d9ab5875f4 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -1017,6 +1017,37 @@ static ulong px30_crypto_set_clk(struct px30_clk_priv *priv, ulong clk_id,
 
 	return px30_crypto_get_clk(priv, clk_id);
 }
+
+static ulong px30_i2s1_mclk_get_clk(struct px30_clk_priv *priv, ulong clk_id)
+{
+	struct px30_cru *cru = priv->cru;
+	u32 con;
+
+	con = readl(&cru->clksel_con[30]);
+
+	if (!(con & CLK_I2S1_OUT_SEL_MASK))
+		return -ENOENT;
+
+	return 12000000;
+}
+
+static ulong px30_i2s1_mclk_set_clk(struct px30_clk_priv *priv, ulong clk_id,
+				    ulong hz)
+{
+	struct px30_cru *cru = priv->cru;
+
+	if (hz != 12000000) {
+		printf("do not support this i2s1_mclk freq\n");
+		return -EINVAL;
+	}
+
+	rk_clrsetreg(&cru->clksel_con[30], CLK_I2S1_OUT_SEL_MASK,
+		     CLK_I2S1_OUT_SEL_OSC);
+	rk_clrsetreg(&cru->clkgate_con[10], CLK_I2S1_OUT_MCLK_PAD_MASK,
+		     CLK_I2S1_OUT_MCLK_PAD_ENABLE);
+
+	return px30_i2s1_mclk_get_clk(priv, clk_id);
+}
 #endif
 
 static int px30_clk_get_gpll_rate(ulong *rate)
@@ -1253,6 +1284,9 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_CRYPTO_APK:
 		ret = px30_crypto_set_clk(priv, clk->id, rate);
 		break;
+	case SCLK_I2S1_OUT:
+		ret = px30_i2s1_mclk_set_clk(priv, clk->id, rate);
+		break;
 #endif
 	default:
 		return -ENOENT;

commit 74ea6d2f10b2e33e28ac1c0361f3c0b892d9be17
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Dec 17 08:57:54 2018 +0800

    video/drm: dsi: scan sub-nodes of the dsi node
    
    This allows the panel on child nodes of the dsi node can be binded.
    
    Change-Id: I6d5ae71cd10afa2bc100955847b301f0279a0ee2
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index cb57b84cb5..4769c801c6 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -1515,5 +1515,6 @@ U_BOOT_DRIVER(dw_mipi_dsi) = {
 	.id = UCLASS_DISPLAY,
 	.of_match = dw_mipi_dsi_ids,
 	.probe = dw_mipi_dsi_probe,
+	.bind = dm_scan_fdt_dev,
 	.priv_auto_alloc_size = sizeof(struct dw_mipi_dsi),
 };

commit 96b9f0a76ab469456ff397a66cd1b07a12fbc1d8
Author: Vasily Khoruzhick <anarsoul@gmail.com>
Date:   Wed Sep 20 23:29:09 2017 -0700

    UPSTREAM: video: add anx6345 DM driver
    
    This is a eDP bridge similar to ANX9804, it allows to connect eDP panels
    to the chips that can output only parallel signal
    
    Change-Id: I35dbe3ea1c8868420fce58279e877a0641903b94
    Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
    [agust: fixed most checkpatch errors/warnings]
    Signed-off-by: Anatolij Gustschin <agust@denx.de>
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
    (cherry-picked from 491041c74965275defd2749db0e2248b2a7e317a)

diff --git a/drivers/video/bridge/Kconfig b/drivers/video/bridge/Kconfig
index 2a3b6c4bee..765f7380b8 100644
--- a/drivers/video/bridge/Kconfig
+++ b/drivers/video/bridge/Kconfig
@@ -25,3 +25,11 @@ config VIDEO_BRIDGE_NXP_PTN3460
 	  signalling) converter. It enables an LVDS LCD panel to be connected
 	  to an eDP output device such as an SoC that lacks LVDS capability,
 	  or where LVDS requires too many signals to route on the PCB.
+
+config VIDEO_BRIDGE_ANALOGIX_ANX6345
+	bool "Support Analogix ANX6345 RGB->DP bridge"
+	depends on VIDEO_BRIDGE
+	select DM_I2C
+	help
+	 The Analogix ANX6345 is RGB-to-DP converter. It enables an eDP LCD
+	 panel to be connected to an parallel LCD interface.
diff --git a/drivers/video/bridge/Makefile b/drivers/video/bridge/Makefile
index ce731fa4ca..2a746c6f8b 100644
--- a/drivers/video/bridge/Makefile
+++ b/drivers/video/bridge/Makefile
@@ -7,3 +7,4 @@
 obj-$(CONFIG_VIDEO_BRIDGE) += video-bridge-uclass.o
 obj-$(CONFIG_VIDEO_BRIDGE_PARADE_PS862X) += ps862x.o
 obj-$(CONFIG_VIDEO_BRIDGE_NXP_PTN3460) += ptn3460.o
+obj-$(CONFIG_VIDEO_BRIDGE_ANALOGIX_ANX6345) += anx6345.o
diff --git a/drivers/video/bridge/anx6345.c b/drivers/video/bridge/anx6345.c
new file mode 100644
index 0000000000..0a94affb9f
--- /dev/null
+++ b/drivers/video/bridge/anx6345.c
@@ -0,0 +1,426 @@
+/*
+ * Copyright (C) 2017 Vasily Khoruzhick <anarsoul@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <i2c.h>
+#include <edid.h>
+#include <video_bridge.h>
+#include "../anx98xx-edp.h"
+
+#define DP_MAX_LINK_RATE		0x001
+#define DP_MAX_LANE_COUNT		0x002
+#define DP_MAX_LANE_COUNT_MASK		0x1f
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct anx6345_priv {
+	u8 edid[EDID_SIZE];
+};
+
+static int anx6345_write(struct udevice *dev, unsigned int addr_off,
+			 unsigned char reg_addr, unsigned char value)
+{
+	uint8_t buf[2];
+	struct i2c_msg msg;
+	int ret;
+
+	msg.addr = addr_off;
+	msg.flags = 0;
+	buf[0] = reg_addr;
+	buf[1] = value;
+	msg.buf = buf;
+	msg.len = 2;
+	ret = dm_i2c_xfer(dev, &msg, 1);
+	if (ret) {
+		debug("%s: write failed, reg=%#x, value=%#x, ret=%d\n",
+		      __func__, reg_addr, value, ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int anx6345_read(struct udevice *dev, unsigned int addr_off,
+			unsigned char reg_addr, unsigned char *value)
+{
+	uint8_t addr, val;
+	struct i2c_msg msg[2];
+	int ret;
+
+	msg[0].addr = addr_off;
+	msg[0].flags = 0;
+	addr = reg_addr;
+	msg[0].buf = &addr;
+	msg[0].len = 1;
+	msg[1].addr = addr_off;
+	msg[1].flags = I2C_M_RD;
+	msg[1].buf = &val;
+	msg[1].len = 1;
+	ret = dm_i2c_xfer(dev, msg, 2);
+	if (ret) {
+		debug("%s: read failed, reg=%.2x, value=%p, ret=%d\n",
+		      __func__, (int)reg_addr, value, ret);
+		return ret;
+	}
+	*value = val;
+
+	return 0;
+}
+
+static int anx6345_write_r0(struct udevice *dev, unsigned char reg_addr,
+			    unsigned char value)
+{
+	struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
+
+	return anx6345_write(dev, chip->chip_addr, reg_addr, value);
+}
+
+static int anx6345_read_r0(struct udevice *dev, unsigned char reg_addr,
+			   unsigned char *value)
+{
+	struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
+
+	return anx6345_read(dev, chip->chip_addr, reg_addr, value);
+}
+
+static int anx6345_write_r1(struct udevice *dev, unsigned char reg_addr,
+			    unsigned char value)
+{
+	struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
+
+	return anx6345_write(dev, chip->chip_addr + 1, reg_addr, value);
+}
+
+static int anx6345_read_r1(struct udevice *dev, unsigned char reg_addr,
+			   unsigned char *value)
+{
+	struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
+
+	return anx6345_read(dev, chip->chip_addr + 1, reg_addr, value);
+}
+
+static int anx6345_set_backlight(struct udevice *dev, int percent)
+{
+	return -ENOSYS;
+}
+
+static int anx6345_aux_wait(struct udevice *dev)
+{
+	int ret = -ETIMEDOUT;
+	u8 v;
+	int retries = 1000;
+
+	do {
+		anx6345_read_r0(dev, ANX9804_DP_AUX_CH_CTL_2, &v);
+		if (!(v & ANX9804_AUX_EN)) {
+			ret = 0;
+			break;
+		}
+		udelay(100);
+	} while (retries--);
+
+	if (ret) {
+		debug("%s: timed out waiting for AUX_EN to clear\n", __func__);
+		return ret;
+	}
+
+	ret = -ETIMEDOUT;
+	retries = 1000;
+	do {
+		anx6345_read_r1(dev, ANX9804_DP_INT_STA, &v);
+		if (v & ANX9804_RPLY_RECEIV) {
+			ret = 0;
+			break;
+		}
+		udelay(100);
+	} while (retries--);
+
+	if (ret) {
+		debug("%s: timed out waiting to receive reply\n", __func__);
+		return ret;
+	}
+
+	/* Clear RPLY_RECEIV bit */
+	anx6345_write_r1(dev, ANX9804_DP_INT_STA, v);
+
+	anx6345_read_r0(dev, ANX9804_AUX_CH_STA, &v);
+	if ((v & ANX9804_AUX_STATUS_MASK) != 0) {
+		debug("AUX status: %d\n", v & ANX9804_AUX_STATUS_MASK);
+		ret = -EIO;
+	}
+
+	return ret;
+}
+
+static void anx6345_aux_addr(struct udevice *dev, u32 addr)
+{
+	u8 val;
+
+	val = addr & 0xff;
+	anx6345_write_r0(dev, ANX9804_DP_AUX_ADDR_7_0, val);
+	val = (addr >> 8) & 0xff;
+	anx6345_write_r0(dev, ANX9804_DP_AUX_ADDR_15_8, val);
+	val = (addr >> 16) & 0x0f;
+	anx6345_write_r0(dev, ANX9804_DP_AUX_ADDR_19_16, val);
+}
+
+static int anx6345_aux_transfer(struct udevice *dev, u8 req,
+				u32 addr, u8 *buf, size_t len)
+{
+	int i, ret;
+	u8 ctrl1 = req;
+	u8 ctrl2 = ANX9804_AUX_EN;
+
+	if (len > 16)
+		return -E2BIG;
+
+	if (len)
+		ctrl1 |= ANX9804_AUX_LENGTH(len);
+	else
+		ctrl2 |= ANX9804_ADDR_ONLY;
+
+	if (len && !(req & ANX9804_AUX_TX_COMM_READ)) {
+		for (i = 0; i < len; i++)
+			anx6345_write_r0(dev, ANX9804_BUF_DATA_0 + i, buf[i]);
+	}
+
+	anx6345_aux_addr(dev, addr);
+	anx6345_write_r0(dev, ANX9804_DP_AUX_CH_CTL_1, ctrl1);
+	anx6345_write_r0(dev, ANX9804_DP_AUX_CH_CTL_2, ctrl2);
+	ret = anx6345_aux_wait(dev);
+	if (ret) {
+		debug("AUX transaction timed out\n");
+		return ret;
+	}
+
+	if (len && (req & ANX9804_AUX_TX_COMM_READ)) {
+		for (i = 0; i < len; i++)
+			anx6345_read_r0(dev, ANX9804_BUF_DATA_0 + i, &buf[i]);
+	}
+
+	return 0;
+}
+
+static int anx6345_read_aux_i2c(struct udevice *dev, u8 chip_addr,
+				u8 offset, size_t count, u8 *buf)
+{
+	int i, ret;
+	size_t cur_cnt;
+	u8 cur_offset;
+
+	for (i = 0; i < count; i += 16) {
+		cur_cnt = (count - i) > 16 ? 16 : count - i;
+		cur_offset = offset + i;
+		ret = anx6345_aux_transfer(dev, ANX9804_AUX_TX_COMM_MOT,
+					   chip_addr, &cur_offset, 1);
+		if (ret) {
+			debug("%s: failed to set i2c offset: %d\n",
+			      __func__, ret);
+			return ret;
+		}
+		ret = anx6345_aux_transfer(dev, ANX9804_AUX_TX_COMM_READ,
+					   chip_addr, buf + i, cur_cnt);
+		if (ret) {
+			debug("%s: failed to read from i2c device: %d\n",
+			      __func__, ret);
+			return ret;
+		}
+	}
+
+	return 0;
+}
+
+static int anx6345_read_dpcd(struct udevice *dev, u32 reg, u8 *val)
+{
+	int ret;
+
+	ret = anx6345_aux_transfer(dev,
+				   ANX9804_AUX_TX_COMM_READ |
+				   ANX9804_AUX_TX_COMM_DP_TRANSACTION,
+				   reg, val, 1);
+	if (ret) {
+		debug("Failed to read DPCD\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+static int anx6345_read_edid(struct udevice *dev, u8 *buf, int size)
+{
+	struct anx6345_priv *priv = dev_get_priv(dev);
+
+	if (size > EDID_SIZE)
+		size = EDID_SIZE;
+	memcpy(buf, priv->edid, size);
+
+	return size;
+}
+
+static int anx6345_attach(struct udevice *dev)
+{
+	/* No-op */
+	return 0;
+}
+
+static int anx6345_enable(struct udevice *dev)
+{
+	u8 chipid, colordepth, lanes, data_rate, c;
+	int ret, i, bpp;
+	struct display_timing timing;
+	struct anx6345_priv *priv = dev_get_priv(dev);
+
+	/* Deassert reset and enable power */
+	ret = video_bridge_set_active(dev, true);
+	if (ret)
+		return ret;
+
+	/* Reset */
+	anx6345_write_r1(dev, ANX9804_RST_CTRL_REG, 1);
+	mdelay(100);
+	anx6345_write_r1(dev, ANX9804_RST_CTRL_REG, 0);
+
+	/* Write 0 to the powerdown reg (powerup everything) */
+	anx6345_write_r1(dev, ANX9804_POWERD_CTRL_REG, 0);
+
+	ret = anx6345_read_r1(dev, ANX9804_DEV_IDH_REG, &chipid);
+	if (ret)
+		debug("%s: read id failed: %d\n", __func__, ret);
+
+	switch (chipid) {
+	case 0x63:
+		debug("ANX63xx detected.\n");
+		break;
+	default:
+		debug("Error anx6345 chipid mismatch: %.2x\n", (int)chipid);
+		return -ENODEV;
+	}
+
+	for (i = 0; i < 100; i++) {
+		anx6345_read_r0(dev, ANX9804_SYS_CTRL2_REG, &c);
+		anx6345_write_r0(dev, ANX9804_SYS_CTRL2_REG, c);
+		anx6345_read_r0(dev, ANX9804_SYS_CTRL2_REG, &c);
+		if ((c & ANX9804_SYS_CTRL2_CHA_STA) == 0)
+			break;
+
+		mdelay(5);
+	}
+	if (i == 100)
+		debug("Error anx6345 clock is not stable\n");
+
+	/* Set a bunch of analog related register values */
+	anx6345_write_r0(dev, ANX9804_PLL_CTRL_REG, 0x00);
+	anx6345_write_r1(dev, ANX9804_ANALOG_DEBUG_REG1, 0x70);
+	anx6345_write_r0(dev, ANX9804_LINK_DEBUG_REG, 0x30);
+
+	/* Force HPD */
+	anx6345_write_r0(dev, ANX9804_SYS_CTRL3_REG,
+			 ANX9804_SYS_CTRL3_F_HPD | ANX9804_SYS_CTRL3_HPD_CTRL);
+
+	/* Power up and configure lanes */
+	anx6345_write_r0(dev, ANX9804_ANALOG_POWER_DOWN_REG, 0x00);
+	anx6345_write_r0(dev, ANX9804_TRAINING_LANE0_SET_REG, 0x00);
+	anx6345_write_r0(dev, ANX9804_TRAINING_LANE1_SET_REG, 0x00);
+	anx6345_write_r0(dev, ANX9804_TRAINING_LANE2_SET_REG, 0x00);
+	anx6345_write_r0(dev, ANX9804_TRAINING_LANE3_SET_REG, 0x00);
+
+	/* Reset AUX CH */
+	anx6345_write_r1(dev, ANX9804_RST_CTRL2_REG,
+			 ANX9804_RST_CTRL2_AUX);
+	anx6345_write_r1(dev, ANX9804_RST_CTRL2_REG, 0);
+
+	/* Powerdown audio and some other unused bits */
+	anx6345_write_r1(dev, ANX9804_POWERD_CTRL_REG, ANX9804_POWERD_AUDIO);
+	anx6345_write_r0(dev, ANX9804_HDCP_CONTROL_0_REG, 0x00);
+	anx6345_write_r0(dev, 0xa7, 0x00);
+
+	anx6345_read_aux_i2c(dev, 0x50, 0x0, EDID_SIZE, priv->edid);
+	if (edid_get_timing(priv->edid, EDID_SIZE, &timing, &bpp) != 0) {
+		debug("Failed to parse EDID\n");
+		return -EIO;
+	}
+	debug("%s: panel found: %dx%d, bpp %d\n", __func__,
+	      timing.hactive.typ, timing.vactive.typ, bpp);
+	if (bpp == 6)
+		colordepth = 0x00; /* 6 bit */
+	else
+		colordepth = 0x10; /* 8 bit */
+	anx6345_write_r1(dev, ANX9804_VID_CTRL2_REG, colordepth);
+
+	if (anx6345_read_dpcd(dev, DP_MAX_LINK_RATE, &data_rate)) {
+		debug("%s: Failed to DP_MAX_LINK_RATE\n", __func__);
+		return -EIO;
+	}
+	debug("%s: data_rate: %d\n", __func__, (int)data_rate);
+	if (anx6345_read_dpcd(dev, DP_MAX_LANE_COUNT, &lanes)) {
+		debug("%s: Failed to read DP_MAX_LANE_COUNT\n", __func__);
+		return -EIO;
+	}
+	lanes &= DP_MAX_LANE_COUNT_MASK;
+	debug("%s: lanes: %d\n", __func__, (int)lanes);
+
+	/* Set data-rate / lanes */
+	anx6345_write_r0(dev, ANX9804_LINK_BW_SET_REG, data_rate);
+	anx6345_write_r0(dev, ANX9804_LANE_COUNT_SET_REG, lanes);
+
+	/* Link training */
+	anx6345_write_r0(dev, ANX9804_LINK_TRAINING_CTRL_REG,
+			 ANX9804_LINK_TRAINING_CTRL_EN);
+	mdelay(5);
+	for (i = 0; i < 100; i++) {
+		anx6345_read_r0(dev, ANX9804_LINK_TRAINING_CTRL_REG, &c);
+		if ((chipid == 0x63) && (c & 0x80) == 0)
+			break;
+
+		mdelay(5);
+	}
+	if (i == 100) {
+		debug("Error anx6345 link training timeout\n");
+		return -ENODEV;
+	}
+
+	/* Enable */
+	anx6345_write_r1(dev, ANX9804_VID_CTRL1_REG,
+			 ANX9804_VID_CTRL1_VID_EN | ANX9804_VID_CTRL1_EDGE);
+	/* Force stream valid */
+	anx6345_write_r0(dev, ANX9804_SYS_CTRL3_REG,
+			 ANX9804_SYS_CTRL3_F_HPD |
+			 ANX9804_SYS_CTRL3_HPD_CTRL |
+			 ANX9804_SYS_CTRL3_F_VALID |
+			 ANX9804_SYS_CTRL3_VALID_CTRL);
+
+	return 0;
+}
+
+static int anx6345_probe(struct udevice *dev)
+{
+	if (device_get_uclass_id(dev->parent) != UCLASS_I2C)
+		return -EPROTONOSUPPORT;
+
+	return anx6345_enable(dev);
+}
+
+struct video_bridge_ops anx6345_ops = {
+	.attach = anx6345_attach,
+	.set_backlight = anx6345_set_backlight,
+	.read_edid = anx6345_read_edid,
+};
+
+static const struct udevice_id anx6345_ids[] = {
+	{ .compatible = "analogix,anx6345", },
+	{ }
+};
+
+U_BOOT_DRIVER(analogix_anx6345) = {
+	.name	= "analogix_anx6345",
+	.id	= UCLASS_VIDEO_BRIDGE,
+	.of_match = anx6345_ids,
+	.probe	= anx6345_probe,
+	.ops	= &anx6345_ops,
+	.priv_auto_alloc_size = sizeof(struct anx6345_priv),
+};

commit caedb0c4c82e049e1456e6779284bb9044e2b3d8
Author: Fabio Estevam <fabio.estevam@nxp.com>
Date:   Sat Apr 7 18:06:27 2018 -0300

    UPSTREAM: treewide: fix up files incorrectly marked executable
    
    Inspired by the following kernel commit:
    
    "commit 90fda63fa1156ec1bcfd7f9ca384cec221f70a21
    Author: Linus Torvalds <torvalds@linux-foundation.org>
    Date:   Sat Apr 7 13:31:23 2018 -0700
    
    treewide: fix up files incorrectly marked executable
    
    Joe Perches noted that we have a few source files that for some
    inexplicable reason (read: I'm too lazy to even go look at the history)
    are marked executable:
    
    drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
    drivers/net/ethernet/cadence/macb_ptp.c
    
    A simple git command line to show executable C/asm/header files is this:
    
       git ls-files -s '*.[chsS]' | grep '^100755'
    
    and then you can fix them up with scripting by just feeding that output
    into:
    
      | cut -f2 | xargs chmod -x
    
    and commit it.
    
    Which is exactly what this commit does.
    
    Reported-by: Joe Perches <joe@perches.com>
    Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>"
    
    Do the same in the U-Boot source tree.
    
    Change-Id: Ie086d3ab3b393097a9dd6c041546296a16eee2dc
    Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
    (cherry-picked from 02325c7bfd7ccafae600774273f1b8ac11e90c08)

diff --git a/drivers/video/anx9804.c b/drivers/video/anx9804.c
old mode 100755
new mode 100644
diff --git a/include/configs/blanche.h b/include/configs/blanche.h
old mode 100755
new mode 100644

commit 791f74cf96ff3400ead965f3267238a52e01c411
Author: Vasily Khoruzhick <anarsoul@gmail.com>
Date:   Wed Sep 20 23:29:08 2017 -0700

    UPSTREAM: video: anx9804: split out registers definitions into a separate header
    
    This header will be used in anx6345 driver
    
    Change-Id: Ib6beea5f2d063d7bfb5054f24d5098ee7e0a42ca
    Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
    [agust: moved header to drivers/video]
    Signed-off-by: Anatolij Gustschin <agust@denx.de>
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
    (cherry-picked from 24bf59d0243f0ee496b20aee985968729b8d0386)

diff --git a/drivers/video/anx9804.c b/drivers/video/anx9804.c
index 37ad69a039..3910458bf1 100755
--- a/drivers/video/anx9804.c
+++ b/drivers/video/anx9804.c
@@ -12,61 +12,9 @@
 
 #include <common.h>
 #include <i2c.h>
+#include "anx98xx-edp.h"
 #include "anx9804.h"
 
-/* Registers at i2c address 0x38 */
-
-#define ANX9804_HDCP_CONTROL_0_REG				0x01
-
-#define ANX9804_SYS_CTRL2_REG					0x81
-#define ANX9804_SYS_CTRL2_CHA_STA				0x04
-
-#define ANX9804_SYS_CTRL3_REG					0x82
-#define ANX9804_SYS_CTRL3_VALID_CTRL				BIT(0)
-#define ANX9804_SYS_CTRL3_F_VALID				BIT(1)
-#define ANX9804_SYS_CTRL3_HPD_CTRL				BIT(4)
-#define ANX9804_SYS_CTRL3_F_HPD					BIT(5)
-
-#define ANX9804_LINK_BW_SET_REG					0xa0
-#define ANX9804_LANE_COUNT_SET_REG				0xa1
-#define ANX9804_TRAINING_PTN_SET_REG				0xa2
-#define ANX9804_TRAINING_LANE0_SET_REG				0xa3
-#define ANX9804_TRAINING_LANE1_SET_REG				0xa4
-#define ANX9804_TRAINING_LANE2_SET_REG				0xa5
-#define ANX9804_TRAINING_LANE3_SET_REG				0xa6
-
-#define ANX9804_LINK_TRAINING_CTRL_REG				0xa8
-#define ANX9804_LINK_TRAINING_CTRL_EN				BIT(0)
-
-#define ANX9804_LINK_DEBUG_REG					0xb8
-#define ANX9804_PLL_CTRL_REG					0xc7	
-#define ANX9804_ANALOG_POWER_DOWN_REG				0xc8
-
-/* Registers at i2c address 0x39 */
-
-#define ANX9804_DEV_IDH_REG					0x03
-
-#define ANX9804_POWERD_CTRL_REG					0x05
-#define ANX9804_POWERD_AUDIO					BIT(4)
-
-#define ANX9804_RST_CTRL_REG					0x06
-
-#define ANX9804_RST_CTRL2_REG					0x07
-#define ANX9804_RST_CTRL2_AUX					BIT(2)
-#define ANX9804_RST_CTRL2_AC_MODE				BIT(6)
-
-#define ANX9804_VID_CTRL1_REG					0x08
-#define ANX9804_VID_CTRL1_VID_EN				BIT(7)
-#define ANX9804_VID_CTRL1_EDGE					BIT(0)
-
-#define ANX9804_VID_CTRL2_REG					0x09
-#define ANX9804_ANALOG_DEBUG_REG1				0xdc
-#define ANX9804_ANALOG_DEBUG_REG3				0xde
-#define ANX9804_PLL_FILTER_CTRL1				0xdf
-#define ANX9804_PLL_FILTER_CTRL3				0xe1
-#define ANX9804_PLL_FILTER_CTRL					0xe2
-#define ANX9804_PLL_CTRL3					0xe6
-
 /**
  * anx9804_init() - Init anx9804 parallel lcd to edp bridge chip
  *
diff --git a/drivers/video/anx98xx-edp.h b/drivers/video/anx98xx-edp.h
new file mode 100644
index 0000000000..f7e8baa167
--- /dev/null
+++ b/drivers/video/anx98xx-edp.h
@@ -0,0 +1,98 @@
+/*
+ * Copyright (C) 2015 Hans de Goede <hdegoede@redhat.com>
+ * Copyright (C) 2017 Vasily Khoruzhick <anarsoul@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+/* Registers at i2c address 0x38 */
+
+#define ANX9804_HDCP_CONTROL_0_REG				0x01
+
+#define ANX9804_SYS_CTRL1_REG					0x80
+#define ANX9804_SYS_CTRL1_PD_IO					0x80
+#define ANX9804_SYS_CTRL1_PD_VID				0x40
+#define ANX9804_SYS_CTRL1_PD_LINK				0x20
+#define ANX9804_SYS_CTRL1_PD_TOTAL				0x10
+#define ANX9804_SYS_CTRL1_MODE_SEL				0x08
+#define ANX9804_SYS_CTRL1_DET_STA				0x04
+#define ANX9804_SYS_CTRL1_FORCE_DET				0x02
+#define ANX9804_SYS_CTRL1_DET_CTRL				0x01
+
+#define ANX9804_SYS_CTRL2_REG					0x81
+#define ANX9804_SYS_CTRL2_CHA_STA				0x04
+
+#define ANX9804_SYS_CTRL3_REG					0x82
+#define ANX9804_SYS_CTRL3_VALID_CTRL				BIT(0)
+#define ANX9804_SYS_CTRL3_F_VALID				BIT(1)
+#define ANX9804_SYS_CTRL3_HPD_CTRL				BIT(4)
+#define ANX9804_SYS_CTRL3_F_HPD					BIT(5)
+
+#define ANX9804_LINK_BW_SET_REG					0xa0
+#define ANX9804_LANE_COUNT_SET_REG				0xa1
+#define ANX9804_TRAINING_PTN_SET_REG				0xa2
+#define ANX9804_TRAINING_LANE0_SET_REG				0xa3
+#define ANX9804_TRAINING_LANE1_SET_REG				0xa4
+#define ANX9804_TRAINING_LANE2_SET_REG				0xa5
+#define ANX9804_TRAINING_LANE3_SET_REG				0xa6
+
+#define ANX9804_LINK_TRAINING_CTRL_REG				0xa8
+#define ANX9804_LINK_TRAINING_CTRL_EN				BIT(0)
+
+#define ANX9804_LINK_DEBUG_REG					0xb8
+#define ANX9804_PLL_CTRL_REG					0xc7
+#define ANX9804_ANALOG_POWER_DOWN_REG				0xc8
+
+#define ANX9804_AUX_CH_STA					0xe0
+#define ANX9804_AUX_BUSY					BIT(4)
+#define ANX9804_AUX_STATUS_MASK					0x0f
+
+#define ANX9804_DP_AUX_RX_COMM					0xe3
+#define ANX9804_AUX_RX_COMM_I2C_DEFER				BIT(3)
+#define ANX9804_AUX_RX_COMM_AUX_DEFER				BIT(1)
+
+#define ANX9804_DP_AUX_CH_CTL_1					0xe5
+#define ANX9804_AUX_LENGTH(x)					(((x - 1) & 0x0f) << 4)
+#define ANX9804_AUX_TX_COMM_MASK				0x0f
+#define ANX9804_AUX_TX_COMM_DP_TRANSACTION			BIT(3)
+#define ANX9804_AUX_TX_COMM_MOT					BIT(2)
+#define ANX9804_AUX_TX_COMM_READ				BIT(0)
+
+#define ANX9804_DP_AUX_ADDR_7_0					0xe6
+#define ANX9804_DP_AUX_ADDR_15_8				0xe7
+#define ANX9804_DP_AUX_ADDR_19_16				0xe8
+
+#define ANX9804_DP_AUX_CH_CTL_2					0xe9
+#define ANX9804_ADDR_ONLY					BIT(1)
+#define ANX9804_AUX_EN						BIT(0)
+
+#define ANX9804_BUF_DATA_0					0xf0
+
+/* Registers at i2c address 0x39 */
+
+#define ANX9804_DEV_IDH_REG					0x03
+
+#define ANX9804_POWERD_CTRL_REG					0x05
+#define ANX9804_POWERD_AUDIO					BIT(4)
+
+#define ANX9804_RST_CTRL_REG					0x06
+
+#define ANX9804_RST_CTRL2_REG					0x07
+#define ANX9804_RST_CTRL2_AUX					BIT(2)
+#define ANX9804_RST_CTRL2_AC_MODE				BIT(6)
+
+#define ANX9804_VID_CTRL1_REG					0x08
+#define ANX9804_VID_CTRL1_VID_EN				BIT(7)
+#define ANX9804_VID_CTRL1_EDGE					BIT(0)
+
+#define ANX9804_VID_CTRL2_REG					0x09
+#define ANX9804_ANALOG_DEBUG_REG1				0xdc
+#define ANX9804_ANALOG_DEBUG_REG3				0xde
+#define ANX9804_PLL_FILTER_CTRL1				0xdf
+#define ANX9804_PLL_FILTER_CTRL3				0xe1
+#define ANX9804_PLL_FILTER_CTRL					0xe2
+#define ANX9804_PLL_CTRL3					0xe6
+
+#define ANX9804_DP_INT_STA					0xf7
+#define ANX9804_RPLY_RECEIV					BIT(1)
+#define ANX9804_AUX_ERR						BIT(0)

commit 7587ed89681ec6b3f3b0e99733792076fa50cdaf
Author: Vasily Khoruzhick <anarsoul@gmail.com>
Date:   Mon Nov 5 20:24:29 2018 -0800

    UPSTREAM: dm: video: bridge: don't fail to activate bridge if reset or sleep GPIO is missing
    
    Both GPIOs are optional, so we shouldn't fail if any is missing.
    Without this fix reset is not deasserted if sleep GPIO is missing.
    
    Change-Id: I25f2d11d7df96a4a93fcd844bcf34c3fb5109336
    Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
    Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
    Tested-by: Maxime Ripard <maxime.ripard@bootlin.com>
    Reviewed-by: Andre Przywara <andre.przywara@arm.com>
    Cc: Vagrant Cascadian <vagrant@debian.org>
    (cherry-picked from 8336a43792a103c13d939b3925cb75322911f7fb)

diff --git a/drivers/video/bridge/video-bridge-uclass.c b/drivers/video/bridge/video-bridge-uclass.c
index 79facd02a6..29f5b7e9a4 100644
--- a/drivers/video/bridge/video-bridge-uclass.c
+++ b/drivers/video/bridge/video-bridge-uclass.c
@@ -107,13 +107,19 @@ static int video_bridge_pre_probe(struct udevice *dev)
 int video_bridge_set_active(struct udevice *dev, bool active)
 {
 	struct video_bridge_priv *uc_priv = dev_get_uclass_priv(dev);
-	int ret;
+	int ret = 0;
 
 	debug("%s: %d\n", __func__, active);
-	ret = dm_gpio_set_value(&uc_priv->sleep, !active);
-	if (ret)
-		return ret;
-	if (active) {
+	if (uc_priv->sleep.dev) {
+		ret = dm_gpio_set_value(&uc_priv->sleep, !active);
+		if (ret)
+			return ret;
+	}
+
+	if (!active)
+		return 0;
+
+	if (uc_priv->reset.dev) {
 		ret = dm_gpio_set_value(&uc_priv->reset, true);
 		if (ret)
 			return ret;

commit d2bb07b716e012adfd6870e41568397940d7090c
Author: Vasily Khoruzhick <anarsoul@gmail.com>
Date:   Wed Sep 20 23:29:07 2017 -0700

    UPSTREAM: dm: video: bridge: add operation to read EDID
    
    Add an operation to read EDID, since bridge may have ability to read
    EDID from the panel that is connected to it, for example LCD<->eDP bridge.
    
    Change-Id: I03b711cd3a138f83c896ef656ffc5171b30eee40
    Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
    (cherry-picked from fdb5525572ec7dc240ccc960888ae969253fede4)

diff --git a/drivers/video/bridge/video-bridge-uclass.c b/drivers/video/bridge/video-bridge-uclass.c
index 07270bac9e..79facd02a6 100644
--- a/drivers/video/bridge/video-bridge-uclass.c
+++ b/drivers/video/bridge/video-bridge-uclass.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <edid.h>
 #include <video_bridge.h>
 
 int video_bridge_set_backlight(struct udevice *dev, int percent)
@@ -45,6 +46,15 @@ int video_bridge_check_attached(struct udevice *dev)
 	return ops->check_attached(dev);
 }
 
+int video_bridge_read_edid(struct udevice *dev, u8 *buf, int buf_size)
+{
+	struct video_bridge_ops *ops = video_bridge_get_ops(dev);
+
+	if (!ops || !ops->read_edid)
+		return -ENOSYS;
+	return ops->read_edid(dev, buf, buf_size);
+}
+
 static int video_bridge_pre_probe(struct udevice *dev)
 {
 	struct video_bridge_priv *uc_priv = dev_get_uclass_priv(dev);
diff --git a/include/video_bridge.h b/include/video_bridge.h
index c7b8681849..0699a8dda8 100644
--- a/include/video_bridge.h
+++ b/include/video_bridge.h
@@ -53,6 +53,16 @@ struct video_bridge_ops {
 	 * @return 0 if OK, -ve on error
 	 */
 	int (*set_backlight)(struct udevice *dev, int percent);
+
+	/**
+	 * read_edid() - Read information from EDID
+	 *
+	 * @dev:	Device to read from
+	 * @buf:	Buffer to read into
+	 * @buf_size:	Buffer size
+	 * @return number of bytes read, <=0 for error
+	 */
+	int (*read_edid)(struct udevice *dev, u8 *buf, int buf_size);
 };
 
 #define video_bridge_get_ops(dev) \
@@ -89,4 +99,14 @@ int video_bridge_set_active(struct udevice *dev, bool active);
  */
 int video_bridge_check_attached(struct udevice *dev);
 
+/**
+ * video_bridge_read_edid() - Read information from EDID
+ *
+ * @dev:	Device to read from
+ * @buf:	Buffer to read into
+ * @buf_size:	Buffer size
+ * @return number of bytes read, <=0 for error
+ */
+int video_bridge_read_edid(struct udevice *dev, u8 *buf, int buf_size);
+
 #endif

commit 752032c993324e8a25c3605d89f3a99f92f6ab29
Author: David.Wu <david.wu@rock-chips.com>
Date:   Wed Dec 26 09:12:43 2018 +0800

    pinctrl: rockchip: Add gpio3b4 io function recalculated select for RK3308B
    
    Accroding to the datasheet, the pin of gpio3b4 needs to be
    recalculated for iomux selecting.
    
    Change-Id: I827be9a51851ee9323a133d8bded8b09e068f1b4
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index c45ee11001..b6f6adfc9c 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -569,6 +569,12 @@ static struct rockchip_mux_recalced_data rk3308b_mux_recalced_data[] = {
 		.reg = 0x34,
 		.bit = 8,
 		.mask = 0xf
+	}, {
+		.num = 3,
+		.pin = 12,
+		.reg = 0x68,
+		.bit = 8,
+		.mask = 0xf
 	}, {
 		.num = 3,
 		.pin = 13,

commit 415cf08001eb16cbc669512e4e2111dd6c1cb4f0
Author: jon.lin <jon.lin@rock-chips.com>
Date:   Wed Dec 19 18:49:02 2018 -0800

    drivers: rkflash: add new spi nand devices
    
    1.FS35ND01G-S1 FS35ND02G-S2, EM73C044SNC-G, EM73D044SNB-G
    
    Change-Id: Ic90fbfe8f9f82183c9254af6a77c5c16cb5856c3
    Signed-off-by: jon.lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/sfc_nand.c b/drivers/rkflash/sfc_nand.c
index 18f5a04d8d..81434126cc 100644
--- a/drivers/rkflash/sfc_nand.c
+++ b/drivers/rkflash/sfc_nand.c
@@ -16,15 +16,13 @@
 
 static struct nand_info spi_nand_tbl[] = {
 	/* TC58CVG0S0HxAIx */
-	{0x98C2, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x02, 0xD8, 0x00, 18, 8, 0xB0, 0XFF, 4, 8, NULL},
+	{0x98C2, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x02, 0xD8, 0x00, 18, 8, 0xFF, 0xFF, 4, 8, NULL},
 	/* TC58CVG1S0HxAIx */
-	{0x98CB, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x02, 0xD8, 0x00, 19, 8, 0xB0, 0XFF, 4, 8, NULL},
+	{0x98CB, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x02, 0xD8, 0x00, 19, 8, 0xFF, 0xFF, 4, 8, NULL},
 	/* MX35LF1GE4AB */
 	{0xC212, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 4, 0xB0, 0, 4, 8, &sfc_nand_ecc_status_sp1},
 	/* MX35LF2GE4AB */
 	{0xC222, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 4, 0xB0, 0, 4, 8, &sfc_nand_ecc_status_sp1},
-	/* MX66L1G45G */
-	{0x90AF, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x00, 18, 4, 0xB0, 0, 4, 8, &sfc_nand_ecc_status_sp1},
 	/* GD5F1GQ4UAYIG */
 	{0xC8F1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 8, 0xB0, 0, 4, 8, NULL},
 	/* MT29F1G01ZAC */
@@ -34,11 +32,9 @@ static struct nand_info spi_nand_tbl[] = {
 	/* GD5F1GQ4U */
 	{0xC8D1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 8, 0xB0, 0, 4, 8, &sfc_nand_ecc_status_sp3},
 	/* IS37SML01G1 */
-	{0xC821, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x00, 18, 1, 0xB0, 0XFF, 8, 12, &sfc_nand_ecc_status_sp1},
+	{0xC821, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x00, 18, 1, 0xFF, 0xFF, 8, 12, &sfc_nand_ecc_status_sp1},
 	/* W25N01GV */
-	{0xEFAA, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xFF, 0XFF, 4, 20, &sfc_nand_ecc_status_sp1},
-	/* HYF2GQ4UAACAE */
-	{0xC952, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 14, 0xB0, 0, 4, 36, NULL},
+	{0xEFAA, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xFF, 0xFF, 4, 20, &sfc_nand_ecc_status_sp1},
 	/* HYF2GQ4UAACAE */
 	{0xC952, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 14, 0xB0, 0, 4, 36, NULL},
 	/* HYF2GQ4UDACAE */
@@ -48,15 +44,23 @@ static struct nand_info spi_nand_tbl[] = {
 	/* HYF1GQ4UDACAE */
 	{0xC921, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 4, 0xB0, 0, 4, 20, NULL},
 	/* F50L1G41LB */
-	{0xC801, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xFF, 0xFF, 20, 36, NULL},
+	{0xC801, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xFF, 0xFF, 20, 36, &sfc_nand_ecc_status_sp1},
 	/* XT26G02A */
-	{0x0be2, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 1, 0xB0, 0x0, 8, 12, &sfc_nand_ecc_status_sp4},
+	{0x0BE2, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 1, 0xB0, 0x0, 8, 12, &sfc_nand_ecc_status_sp4},
 	/* XT26G01A */
-	{0x0be1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xB0, 0x0, 8, 12, &sfc_nand_ecc_status_sp4},
+	{0x0BE1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xB0, 0x0, 8, 12, &sfc_nand_ecc_status_sp4},
 	/* FS35ND01G-S1 */
 	{0xCDB1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 4, 0xB0, 0x0, 16, 20, &sfc_nand_ecc_status_sp5},
 	/* FS35ND02G-S2 */
 	{0xCDA2, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x03, 0x02, 0xD8, 0x00, 19, 4, 0xFF, 0xFF, 16, 20, &sfc_nand_ecc_status_sp5},
+	/* DS35Q1GA-1B */
+	{0xE571, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 4, 0xB0, 0x0, 4, 20, &sfc_nand_ecc_status_sp1},
+	/* DS35Q2GA-1B */
+	{0xE572, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 4, 0xB0, 0x0, 4, 20, &sfc_nand_ecc_status_sp1},
+	/* EM73C044SNC-G */
+	{0xD522, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 8, 0xB0, 0x0, 4, 20, NULL},
+	/* EM73D044SNB-G */
+	{0xD520, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 8, 0xB0, 0x0, 4, 20, NULL}
 };
 
 static u8 id_byte[8];
@@ -375,6 +379,7 @@ static u32 sfc_nand_erase_block(u8 cs, u32 addr)
 static u32 sfc_nand_prog_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
 {
 	int ret;
+	u32 plane;
 	union SFCCMD_DATA sfcmd;
 	union SFCCTRL_DATA sfctrl;
 	u8 status;
@@ -383,6 +388,7 @@ static u32 sfc_nand_prog_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
 	u32 spare_offs_2 = p_nand_info->spare_offs_2;
 
 	memcpy(gp_page_buf, p_data, data_sz);
+	ftl_memset(&gp_page_buf[data_sz / 4], 0xff, 64);
 	gp_page_buf[(data_sz + spare_offs_1) / 4] = p_spare[0];
 	gp_page_buf[(data_sz + spare_offs_2) / 4] = p_spare[1];
 
@@ -401,7 +407,8 @@ static u32 sfc_nand_prog_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
 	sfctrl.d32 = 0;
 	sfctrl.b.datalines = sfc_nand_dev.prog_lines;
 	sfctrl.b.addrbits = 16;
-	sfc_request(sfcmd.d32, sfctrl.d32, 0, gp_page_buf);
+	plane = p_nand_info->plane_per_die == 2 ? ((addr >> 6) & 0x1) << 12 : 0;
+	sfc_request(sfcmd.d32, sfctrl.d32, plane, gp_page_buf);
 
 	sfcmd.d32 = 0;
 	sfcmd.b.cmd = p_nand_info->page_prog_cmd;
@@ -420,6 +427,7 @@ static u32 sfc_nand_prog_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
 static u32 sfc_nand_read_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
 {
 	int ret;
+	u32 plane;
 	union SFCCMD_DATA sfcmd;
 	union SFCCTRL_DATA sfctrl;
 	u32 ecc_result;
@@ -450,8 +458,9 @@ static u32 sfc_nand_read_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
 	sfctrl.d32 = 0;
 	sfctrl.b.datalines = sfc_nand_dev.read_lines;
 
+	plane = p_nand_info->plane_per_die == 2 ? ((addr >> 6) & 0x1) << 12 : 0;
 	memset(gp_page_buf, 0, SFC_NAND_PAGE_MAX_SIZE);
-	ret = sfc_request(sfcmd.d32, sfctrl.d32, 0, gp_page_buf);
+	ret = sfc_request(sfcmd.d32, sfctrl.d32, plane << 8, gp_page_buf);
 
 	memcpy(p_data, gp_page_buf, data_sz);
 	p_spare[0] = gp_page_buf[(data_sz + spare_offs_1) / 4];

commit 47fb924aca361cbca861a947c79358624a20e24e
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Tue Dec 25 11:56:32 2018 +0800

    arm: rockchip: rk1808 add set qos priority for cif
    
    Set cif qos priority to 2.
    
    Change-Id: I42354ae12394472d99af17af1d586a7bc3bb3c37
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk1808/rk1808.c b/arch/arm/mach-rockchip/rk1808/rk1808.c
index 021da42f52..03de8b932e 100644
--- a/arch/arm/mach-rockchip/rk1808/rk1808.c
+++ b/arch/arm/mach-rockchip/rk1808/rk1808.c
@@ -11,6 +11,10 @@
 #include <debug_uart.h>
 
 #include <asm/armv8/mmu.h>
+
+#define NIU_CIF_ADDR		0xfe8a0188
+#define QOS_PRIORITY_LEVEL(h, l)	((((h) & 3) << 8) | ((l) & 3))
+
 static struct mm_region rk1808_mem_map[] = {
 	{
 		.virt = 0x0UL,
@@ -56,6 +60,14 @@ enum {
 	UART2_IO_SEL_USB,
 };
 
+int arch_cpu_init(void)
+{
+	/* Set cif qos priority */
+	writel(QOS_PRIORITY_LEVEL(2, 2), NIU_CIF_ADDR);
+
+	return 0;
+}
+
 /*
  * Default use UART2_TX/RX_M0(TX: GPIO4_A2, RX: GPIO4_A3)
  */

commit f70f0bfd86cf8392694a891f5dc4b49db729dde7
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Nov 19 22:12:33 2018 +0800

    gpt: repair the gpt table when head or backup gpt table is invalid
    
    There is some gpt table errors when use open source tools to download
    gpt table or is destroyed by other procedure.
    Such as:
    1.Get error storage size.
    2.Download the gpt table in the error place.
    3.The gpt table is destroyed by other procedure.
    
    So test the gpt table is correct or not firstly. If the gpt table header is
    error, update the correct gpt table. If the last partition size error in
    the gpt table entry, get the size of current storage by dev_desc and update
    the last partition size.
    
    Change-Id: I0ef91a0f8462eca52924d17c5aaefcdae602267d
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/disk/part_efi.c b/disk/part_efi.c
index bc5ce215f6..f65fceb0c6 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -339,6 +339,93 @@ int part_get_info_efi(struct blk_desc *dev_desc, int part,
 	return 0;
 }
 
+#ifdef RKIMG_BOOTLOADER
+static void gpt_entry_modify(struct blk_desc *dev_desc,
+			     gpt_entry *gpt_pte,
+			     gpt_header *gpt_head)
+{
+	int i;
+	uint32_t calc_crc32;
+
+	for (i = 0; i < gpt_head->num_partition_entries; i++) {
+		if (!is_pte_valid(&gpt_pte[i]))
+			break;
+	}
+
+	if (gpt_pte[i - 1].ending_lba <= (dev_desc->lba - 0x22))
+		return;
+
+	gpt_pte[i - 1].ending_lba = dev_desc->lba - 0x22;
+	calc_crc32 = efi_crc32((const unsigned char *)gpt_pte,
+			       le32_to_cpu(gpt_head->num_partition_entries) *
+			       le32_to_cpu(gpt_head->sizeof_partition_entry));
+	gpt_head->partition_entry_array_crc32 = calc_crc32;
+}
+
+static int part_efi_repair(struct blk_desc *dev_desc, gpt_entry *gpt_pte,
+			   gpt_header *gpt_head, int head_gpt_valid,
+			   int backup_gpt_valid)
+{
+	uint32_t calc_crc32;
+	size_t count = 0, blk_cnt;
+	lbaint_t blk;
+
+	if (head_gpt_valid == 1 && backup_gpt_valid == 1) {
+		return 0;
+	} else if (head_gpt_valid == 0 && backup_gpt_valid == 0) {
+		return -1;
+	} else if (head_gpt_valid == 1 && backup_gpt_valid == 0) {
+		gpt_head->header_crc32 = 0;
+		gpt_head->my_lba = dev_desc->lba - 1;
+		gpt_head->alternate_lba = 1;
+		gpt_head->partition_entry_lba = dev_desc->lba - 0x21;
+		gpt_entry_entry_modify(dev_desc, gpt_pte, gpt_head);
+		calc_crc32 = efi_crc32((const unsigned char *)gpt_head,
+				       le32_to_cpu(gpt_head->header_size));
+		gpt_head->header_crc32 = calc_crc32;
+		if (blk_dwrite(dev_desc, dev_desc->lba - 1, 1, gpt_head) != 1) {
+			printf("*** ERROR: Can't write GPT header ***\n");
+			return -1;
+		}
+		count = le32_to_cpu(gpt_head->num_partition_entries) *
+			le32_to_cpu(gpt_head->sizeof_partition_entry);
+		blk = le64_to_cpu(gpt_head->partition_entry_lba);
+		blk_cnt = BLOCK_CNT(count, dev_desc);
+		if (blk_dwrite(dev_desc, blk, (lbaint_t)blk_cnt, gpt_pte) !=
+		    blk_cnt) {
+			printf("*** ERROR: Can't write entry partitions ***\n");
+			return -1;
+		}
+		printf("Repair the backup gpt table OK!\n");
+	} else if (head_gpt_valid == 0 && backup_gpt_valid == 1) {
+		gpt_head->header_crc32 = 0;
+		gpt_head->my_lba = 1;
+		gpt_head->alternate_lba = dev_desc->lba - 1;
+		gpt_head->partition_entry_lba = 0x22;
+		gpt_entry_entry_modify(dev_desc, gpt_pte, gpt_head);
+		calc_crc32 = efi_crc32((const unsigned char *)gpt_head,
+				       le32_to_cpu(gpt_head->header_size));
+		gpt_head->header_crc32 = calc_crc32;
+		if (blk_dwrite(dev_desc, 1, 1, gpt_head) != 1) {
+			printf("*** ERROR: Can't write GPT header ***\n");
+			return -1;
+		}
+		count = le32_to_cpu(gpt_head->num_partition_entries) *
+			le32_to_cpu(gpt_head->sizeof_partition_entry);
+		blk = le64_to_cpu(gpt_head->partition_entry_lba);
+		blk_cnt = BLOCK_CNT(count, dev_desc);
+		if (blk_dwrite(dev_desc, blk, (lbaint_t)blk_cnt, gpt_pte) !=
+		    blk_cnt) {
+			printf("*** ERROR: Can't write entry partitions ***\n");
+			return -1;
+		}
+		printf("Repair the Primary gpt table OK!\n");
+	}
+
+	return 0;
+}
+#endif
+
 static int part_test_efi(struct blk_desc *dev_desc)
 {
 	ALLOC_CACHE_ALIGN_BUFFER_PAD(legacy_mbr, legacymbr, 1, dev_desc->blksz);
@@ -348,6 +435,41 @@ static int part_test_efi(struct blk_desc *dev_desc)
 		|| (is_pmbr_valid(legacymbr) != 1)) {
 		return -1;
 	}
+#ifdef RKIMG_BOOTLOADER
+	gpt_entry *h_gpt_pte = NULL;
+	gpt_header *h_gpt_head = NULL;
+	gpt_entry *b_gpt_pte = NULL;
+	gpt_header *b_gpt_head = NULL;
+	int head_gpt_valid = 0;
+	int backup_gpt_valid = 0;
+
+	if (!h_gpt_head)
+		h_gpt_head = memalign(ARCH_DMA_MINALIGN, dev_desc->blksz);
+	if (!b_gpt_head)
+		b_gpt_head = memalign(ARCH_DMA_MINALIGN, dev_desc->blksz);
+
+	head_gpt_valid = is_gpt_valid(dev_desc, GPT_PRIMARY_PARTITION_TABLE_LBA,
+				      h_gpt_head, &h_gpt_pte);
+	backup_gpt_valid = is_gpt_valid(dev_desc, (dev_desc->lba - 1),
+					b_gpt_head, &b_gpt_pte);
+	if (head_gpt_valid == 1 && backup_gpt_valid == 0) {
+		if (part_efi_repair(dev_desc, h_gpt_pte, h_gpt_head,
+				    head_gpt_valid, backup_gpt_valid))
+			printf("Backup GPT repair fail!\n");
+	} else if (head_gpt_valid == 0 && backup_gpt_valid == 1) {
+		if (part_efi_repair(dev_desc, b_gpt_pte, b_gpt_head,
+				    head_gpt_valid, backup_gpt_valid))
+			printf("Primary GPT repair fail!\n");
+	}
+	free(h_gpt_pte);
+	h_gpt_pte = NULL;
+	free(h_gpt_head);
+	h_gpt_head = NULL;
+	free(b_gpt_pte);
+	b_gpt_pte = NULL;
+	free(b_gpt_head);
+	b_gpt_head = NULL;
+#endif
 	return 0;
 }
 

commit f05ce84792cbd2e5573a414010d421eb8fbb7689
Author: Alexey Brodkin <Alexey.Brodkin@synopsys.com>
Date:   Wed Jan 24 20:47:09 2018 +0300

    UPSTREAM: fdt: Implement weak arch_fixup_fdt()
    
    Only ARM and in some configs MIPS really implement arch_fixup_fdt().
    Others just use the same boilerplate which is not good by itself,
    but what's worse if we try to build with disabled CONFIG_CMD_BOOTM
    and enabled CONFIG_OF_LIBFDT we'll hit an unknown symbol which was
    apparently implemented in arch/xxx/lib/bootm.c.
    
    Now with weak arch_fixup_fdt() right in image-fdt.c where it is
    used we get both items highlighted above fixed.
    
    Change-Id: Iaac96fbb0bcc484906952ced132b10b2cead782e
    Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
    Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
    Cc: Simon Glass <sjg@chromium.org>
    Cc: York Sun <york.sun@nxp.com>
    Cc: Stefan Roese <sr@denx.de>
    Reviewed-by: Tom Rini <trini@konsulko.com>
    Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arc/lib/bootm.c b/arch/arc/lib/bootm.c
index a498ce5b29..17e501c0e2 100644
--- a/arch/arc/lib/bootm.c
+++ b/arch/arc/lib/bootm.c
@@ -37,11 +37,6 @@ void arch_lmb_reserve(struct lmb *lmb)
 	lmb_reserve(lmb, sp, (CONFIG_SYS_SDRAM_BASE + gd->ram_size - sp));
 }
 
-int arch_fixup_fdt(void *blob)
-{
-	return 0;
-}
-
 static int cleanup_before_linux(void)
 {
 	disable_interrupts();
diff --git a/arch/microblaze/lib/bootm.c b/arch/microblaze/lib/bootm.c
index 0a286e82c2..f33ef08757 100644
--- a/arch/microblaze/lib/bootm.c
+++ b/arch/microblaze/lib/bootm.c
@@ -17,11 +17,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-int arch_fixup_fdt(void *blob)
-{
-	return 0;
-}
-
 int do_bootm_linux(int flag, int argc, char * const argv[],
 		   bootm_headers_t *images)
 {
diff --git a/arch/mips/lib/bootm.c b/arch/mips/lib/bootm.c
index 5a9a2811ff..9dc4740768 100644
--- a/arch/mips/lib/bootm.c
+++ b/arch/mips/lib/bootm.c
@@ -253,17 +253,15 @@ static int boot_reloc_fdt(bootm_headers_t *images)
 #endif
 }
 
+#if CONFIG_IS_ENABLED(MIPS_BOOT_FDT) && CONFIG_IS_ENABLED(OF_LIBFDT)
 int arch_fixup_fdt(void *blob)
 {
-#if CONFIG_IS_ENABLED(MIPS_BOOT_FDT) && CONFIG_IS_ENABLED(OF_LIBFDT)
 	u64 mem_start = virt_to_phys((void *)gd->bd->bi_memstart);
 	u64 mem_size = gd->ram_size;
 
 	return fdt_fixup_memory_banks(blob, &mem_start, &mem_size, 1);
-#else
-	return 0;
-#endif
 }
+#endif
 
 static int boot_setup_fdt(bootm_headers_t *images)
 {
diff --git a/arch/nds32/lib/bootm.c b/arch/nds32/lib/bootm.c
index e834329e0b..a3309f8aa9 100644
--- a/arch/nds32/lib/bootm.c
+++ b/arch/nds32/lib/bootm.c
@@ -16,12 +16,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-int arch_fixup_fdt(void *blob)
-{
-	return 0;
-}
-
-
 #if defined(CONFIG_SETUP_MEMORY_TAGS) || \
 	defined(CONFIG_CMDLINE_TAG) || \
 	defined(CONFIG_INITRD_TAG) || \
diff --git a/arch/powerpc/lib/bootm.c b/arch/powerpc/lib/bootm.c
index 6cf8e78a33..5f14bcd28e 100644
--- a/arch/powerpc/lib/bootm.c
+++ b/arch/powerpc/lib/bootm.c
@@ -40,11 +40,6 @@ static void set_clocks_in_mhz (bd_t *kbd);
 #define CONFIG_SYS_LINUX_LOWMEM_MAX_SIZE	(768*1024*1024)
 #endif
 
-int arch_fixup_fdt(void *blob)
-{
-	return 0;
-}
-
 static void boot_jump_linux(bootm_headers_t *images)
 {
 	void	(*kernel)(bd_t *, ulong r4, ulong r5, ulong r6,
diff --git a/arch/sandbox/lib/bootm.c b/arch/sandbox/lib/bootm.c
index 4cdd18fe14..0c9a7979d2 100644
--- a/arch/sandbox/lib/bootm.c
+++ b/arch/sandbox/lib/bootm.c
@@ -50,11 +50,6 @@ int bootz_setup(ulong image, ulong *start, ulong *end)
 	return ret;
 }
 
-int arch_fixup_fdt(void *blob)
-{
-	return 0;
-}
-
 int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)
 {
 	if (flag & (BOOTM_STATE_OS_GO | BOOTM_STATE_OS_FAKE_GO)) {
diff --git a/arch/x86/lib/bootm.c b/arch/x86/lib/bootm.c
index ecd4f4e6c6..cd9f5b675c 100644
--- a/arch/x86/lib/bootm.c
+++ b/arch/x86/lib/bootm.c
@@ -28,11 +28,6 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #define COMMAND_LINE_OFFSET 0x9000
 
-int arch_fixup_fdt(void *blob)
-{
-	return 0;
-}
-
 __weak void board_quiesce_devices(void)
 {
 }
diff --git a/common/image-fdt.c b/common/image-fdt.c
index 6bdd15e853..c092675f4a 100644
--- a/common/image-fdt.c
+++ b/common/image-fdt.c
@@ -483,6 +483,11 @@ __weak int ft_verify_fdt(void *fdt)
 	return 1;
 }
 
+__weak int arch_fixup_fdt(void *blob)
+{
+	return 0;
+}
+
 int image_setup_libfdt(bootm_headers_t *images, void *blob,
 		       int of_size, struct lmb *lmb)
 {

commit 0e00a84cdedf7a1949486746225b35984b351eca
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Mon Mar 5 01:20:11 2018 +0900

    UPSTREAM: libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h>
    
    Thomas reported U-Boot failed to build host tools if libfdt-devel
    package is installed because tools include libfdt headers from
    /usr/include/ instead of using internal ones.
    
    This commit moves the header code:
      include/libfdt.h         -> include/linux/libfdt.h
      include/libfdt_env.h     -> include/linux/libfdt_env.h
    
    and replaces include directives:
      #include <libfdt.h>      -> #include <linux/libfdt.h>
      #include <libfdt_env.h>  -> #include <linux/libfdt_env.h>
    
    Change-Id: I6c0f7e50e8b571106627f25ddac008a62bd2994e
    Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/cpu/armv7/ls102xa/fdt.c b/arch/arm/cpu/armv7/ls102xa/fdt.c
index d21ad39f8a..eb3e287b7d 100644
--- a/arch/arm/cpu/armv7/ls102xa/fdt.c
+++ b/arch/arm/cpu/armv7/ls102xa/fdt.c
@@ -5,7 +5,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <asm/io.h>
 #include <asm/processor.h>
diff --git a/arch/arm/cpu/armv7/virt-dt.c b/arch/arm/cpu/armv7/virt-dt.c
index 707dad4829..204187c1b4 100644
--- a/arch/arm/cpu/armv7/virt-dt.c
+++ b/arch/arm/cpu/armv7/virt-dt.c
@@ -21,7 +21,7 @@
 #include <linux/ctype.h>
 #include <linux/types.h>
 #include <asm/global_data.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <asm/armv7.h>
 #include <asm/psci.h>
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
index c9252751db..247a1833bc 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
@@ -6,7 +6,7 @@
 
 #include <common.h>
 #include <efi_loader.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <phy.h>
 #ifdef CONFIG_FSL_LSCH3
diff --git a/arch/arm/cpu/armv8/spin_table.c b/arch/arm/cpu/armv8/spin_table.c
index ec1c9b8ddb..195901a7a7 100644
--- a/arch/arm/cpu/armv8/spin_table.c
+++ b/arch/arm/cpu/armv8/spin_table.c
@@ -6,7 +6,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <asm/spin_table.h>
 
 int spin_table_update_dt(void *fdt)
diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index fd2f101992..61f64715bb 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -19,7 +19,7 @@
 #include <image.h>
 #include <u-boot/zlib.h>
 #include <asm/byteorder.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <mapmem.h>
 #include <fdt_support.h>
 #include <asm/bootm.h>
diff --git a/arch/arm/lib/psci-dt.c b/arch/arm/lib/psci-dt.c
index 05e0ad6e70..5502ea23c9 100644
--- a/arch/arm/lib/psci-dt.c
+++ b/arch/arm/lib/psci-dt.c
@@ -5,7 +5,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <linux/sizes.h>
 #include <linux/kernel.h>
diff --git a/arch/arm/mach-imx/mx6/litesom.c b/arch/arm/mach-imx/mx6/litesom.c
index 590e92f4e1..777e7b36dc 100644
--- a/arch/arm/mach-imx/mx6/litesom.c
+++ b/arch/arm/mach-imx/mx6/litesom.c
@@ -77,7 +77,7 @@ int litesom_mmc_init(bd_t *bis)
 #endif
 
 #ifdef CONFIG_SPL_BUILD
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <spl.h>
 #include <asm/arch/mx6-ddr.h>
 
diff --git a/arch/arm/mach-imx/mx6/opos6ul.c b/arch/arm/mach-imx/mx6/opos6ul.c
index f8d7e8ee68..2de1321b56 100644
--- a/arch/arm/mach-imx/mx6/opos6ul.c
+++ b/arch/arm/mach-imx/mx6/opos6ul.c
@@ -154,7 +154,7 @@ int dram_init(void)
 #ifdef CONFIG_SPL_BUILD
 #include <asm/arch/mx6-ddr.h>
 #include <asm/arch/opos6ul.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <spl.h>
 
 #define USDHC_PAD_CTRL (                                       \
diff --git a/arch/arm/mach-meson/board.c b/arch/arm/mach-meson/board.c
index e89c6aace9..3d6d69a096 100644
--- a/arch/arm/mach-meson/board.c
+++ b/arch/arm/mach-meson/board.c
@@ -5,7 +5,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <linux/err.h>
 #include <asm/arch/gxbb.h>
 #include <asm/arch/sm.h>
diff --git a/arch/arm/mach-mvebu/arm64-common.c b/arch/arm/mach-mvebu/arm64-common.c
index 69cb21d052..3c84043a2c 100644
--- a/arch/arm/mach-mvebu/arm64-common.c
+++ b/arch/arm/mach-mvebu/arm64-common.c
@@ -7,7 +7,7 @@
 #include <common.h>
 #include <dm.h>
 #include <fdtdec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <pci.h>
 #include <asm/io.h>
 #include <asm/system.h>
diff --git a/arch/arm/mach-mvebu/armada3700/cpu.c b/arch/arm/mach-mvebu/armada3700/cpu.c
index 6499eec4ea..b9214f7bd9 100644
--- a/arch/arm/mach-mvebu/armada3700/cpu.c
+++ b/arch/arm/mach-mvebu/armada3700/cpu.c
@@ -7,7 +7,7 @@
 #include <common.h>
 #include <dm.h>
 #include <fdtdec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <asm/io.h>
 #include <asm/system.h>
 #include <asm/arch/cpu.h>
diff --git a/arch/arm/mach-mvebu/armada8k/cpu.c b/arch/arm/mach-mvebu/armada8k/cpu.c
index 38e7d33cb3..ce7e913b70 100644
--- a/arch/arm/mach-mvebu/armada8k/cpu.c
+++ b/arch/arm/mach-mvebu/armada8k/cpu.c
@@ -7,7 +7,7 @@
 #include <common.h>
 #include <dm.h>
 #include <fdtdec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <asm/io.h>
 #include <asm/system.h>
 #include <asm/arch/cpu.h>
diff --git a/arch/arm/mach-omap2/am33xx/fdt.c b/arch/arm/mach-omap2/am33xx/fdt.c
index 02e8243800..fa99dc76d3 100644
--- a/arch/arm/mach-omap2/am33xx/fdt.c
+++ b/arch/arm/mach-omap2/am33xx/fdt.c
@@ -5,7 +5,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <malloc.h>
 
diff --git a/arch/arm/mach-omap2/fdt-common.c b/arch/arm/mach-omap2/fdt-common.c
index 9297e9db48..3c368ba93b 100644
--- a/arch/arm/mach-omap2/fdt-common.c
+++ b/arch/arm/mach-omap2/fdt-common.c
@@ -5,7 +5,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 
 #include <asm/omap_common.h>
diff --git a/arch/arm/mach-omap2/omap5/fdt.c b/arch/arm/mach-omap2/omap5/fdt.c
index 1e556da9be..3aae94d560 100644
--- a/arch/arm/mach-omap2/omap5/fdt.c
+++ b/arch/arm/mach-omap2/omap5/fdt.c
@@ -5,7 +5,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <malloc.h>
 
diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c
index 00eff90275..692466c3e1 100644
--- a/arch/arm/mach-socfpga/misc.c
+++ b/arch/arm/mach-socfpga/misc.c
@@ -8,7 +8,7 @@
 #include <asm/io.h>
 #include <errno.h>
 #include <fdtdec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <altera.h>
 #include <miiphy.h>
 #include <netdev.h>
diff --git a/arch/arm/mach-socfpga/misc_gen5.c b/arch/arm/mach-socfpga/misc_gen5.c
index 2f1da740fb..e3054e98b9 100644
--- a/arch/arm/mach-socfpga/misc_gen5.c
+++ b/arch/arm/mach-socfpga/misc_gen5.c
@@ -8,7 +8,7 @@
 #include <asm/io.h>
 #include <errno.h>
 #include <fdtdec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <altera.h>
 #include <miiphy.h>
 #include <netdev.h>
diff --git a/arch/arm/mach-uniphier/board_late_init.c b/arch/arm/mach-uniphier/board_late_init.c
index b9a2cbe148..23b57c3a64 100644
--- a/arch/arm/mach-uniphier/board_late_init.c
+++ b/arch/arm/mach-uniphier/board_late_init.c
@@ -8,7 +8,7 @@
 
 #include <common.h>
 #include <spl.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <nand.h>
 #include <linux/io.h>
 #include <../drivers/mtd/nand/denali.h>
diff --git a/arch/arm/mach-uniphier/boards.c b/arch/arm/mach-uniphier/boards.c
index 9bfc4c2541..104ed90fe9 100644
--- a/arch/arm/mach-uniphier/boards.c
+++ b/arch/arm/mach-uniphier/boards.c
@@ -6,7 +6,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <linux/kernel.h>
 
 #include "init.h"
diff --git a/arch/powerpc/cpu/mpc83xx/cpu.c b/arch/powerpc/cpu/mpc83xx/cpu.c
index cb82621ec4..3bdebd845c 100644
--- a/arch/powerpc/cpu/mpc83xx/cpu.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu.c
@@ -15,7 +15,7 @@
 #include <command.h>
 #include <mpc83xx.h>
 #include <asm/processor.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <tsec.h>
 #include <netdev.h>
 #include <fsl_esdhc.h>
diff --git a/arch/powerpc/cpu/mpc83xx/fdt.c b/arch/powerpc/cpu/mpc83xx/fdt.c
index 3ac4eb1dd8..5250571250 100644
--- a/arch/powerpc/cpu/mpc83xx/fdt.c
+++ b/arch/powerpc/cpu/mpc83xx/fdt.c
@@ -8,7 +8,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <asm/processor.h>
 
diff --git a/arch/powerpc/cpu/mpc83xx/pci.c b/arch/powerpc/cpu/mpc83xx/pci.c
index c7ea94cab5..bf41c69d88 100644
--- a/arch/powerpc/cpu/mpc83xx/pci.c
+++ b/arch/powerpc/cpu/mpc83xx/pci.c
@@ -11,7 +11,7 @@
 #include <pci.h>
 
 #if defined(CONFIG_OF_LIBFDT)
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #endif
 
diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c
index 297dc4af48..bae081a1f9 100644
--- a/arch/powerpc/cpu/mpc85xx/fdt.c
+++ b/arch/powerpc/cpu/mpc85xx/fdt.c
@@ -8,7 +8,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <asm/processor.h>
 #include <linux/ctype.h>
diff --git a/arch/powerpc/cpu/mpc85xx/liodn.c b/arch/powerpc/cpu/mpc85xx/liodn.c
index 7a4465fefc..6cfe2f6759 100644
--- a/arch/powerpc/cpu/mpc85xx/liodn.c
+++ b/arch/powerpc/cpu/mpc85xx/liodn.c
@@ -5,7 +5,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 
 #include <asm/immap_85xx.h>
diff --git a/arch/powerpc/cpu/mpc85xx/portals.c b/arch/powerpc/cpu/mpc85xx/portals.c
index 3777c6faa1..abb12837d2 100644
--- a/arch/powerpc/cpu/mpc85xx/portals.c
+++ b/arch/powerpc/cpu/mpc85xx/portals.c
@@ -5,7 +5,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 
 #include <asm/processor.h>
diff --git a/arch/powerpc/cpu/mpc86xx/fdt.c b/arch/powerpc/cpu/mpc86xx/fdt.c
index 30fbf14f1b..948ad8fa1c 100644
--- a/arch/powerpc/cpu/mpc86xx/fdt.c
+++ b/arch/powerpc/cpu/mpc86xx/fdt.c
@@ -5,7 +5,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <asm/mp.h>
 
diff --git a/arch/powerpc/cpu/mpc8xx/cpu.c b/arch/powerpc/cpu/mpc8xx/cpu.c
index 1e0ea28a91..1120fd7441 100644
--- a/arch/powerpc/cpu/mpc8xx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xx/cpu.c
@@ -28,7 +28,7 @@
 #include <asm/io.h>
 
 #if defined(CONFIG_OF_LIBFDT)
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #endif
 
diff --git a/arch/powerpc/cpu/mpc8xx/fdt.c b/arch/powerpc/cpu/mpc8xx/fdt.c
index f9b74ded5a..9c46762418 100644
--- a/arch/powerpc/cpu/mpc8xx/fdt.c
+++ b/arch/powerpc/cpu/mpc8xx/fdt.c
@@ -7,7 +7,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/powerpc/cpu/mpc8xxx/fdt.c b/arch/powerpc/cpu/mpc8xxx/fdt.c
index 9cc1676b60..1f928bd136 100644
--- a/arch/powerpc/cpu/mpc8xxx/fdt.c
+++ b/arch/powerpc/cpu/mpc8xxx/fdt.c
@@ -8,7 +8,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <asm/mp.h>
 #include <asm/fsl_serdes.h>
diff --git a/arch/powerpc/lib/bootm.c b/arch/powerpc/lib/bootm.c
index b9ae24dc98..6cf8e78a33 100644
--- a/arch/powerpc/lib/bootm.c
+++ b/arch/powerpc/lib/bootm.c
@@ -22,7 +22,7 @@
 #include <vxworks.h>
 
 #if defined(CONFIG_OF_LIBFDT)
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #endif
 
diff --git a/arch/sandbox/cpu/cpu.c b/arch/sandbox/cpu/cpu.c
index 01991049cc..38b5d68afc 100644
--- a/arch/sandbox/cpu/cpu.c
+++ b/arch/sandbox/cpu/cpu.c
@@ -6,7 +6,7 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <os.h>
 #include <asm/io.h>
 #include <asm/state.h>
diff --git a/arch/x86/cpu/intel_common/microcode.c b/arch/x86/cpu/intel_common/microcode.c
index eac5b781e9..8813258754 100644
--- a/arch/x86/cpu/intel_common/microcode.c
+++ b/arch/x86/cpu/intel_common/microcode.c
@@ -10,7 +10,7 @@
 #include <common.h>
 #include <errno.h>
 #include <fdtdec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <asm/cpu.h>
 #include <asm/microcode.h>
 #include <asm/msr.h>
diff --git a/board/Arcturus/ucp1020/ucp1020.c b/board/Arcturus/ucp1020/ucp1020.c
index 3f786a2014..00bda7a4fc 100644
--- a/board/Arcturus/ucp1020/ucp1020.c
+++ b/board/Arcturus/ucp1020/ucp1020.c
@@ -15,7 +15,7 @@
 #include <pci.h>
 #include <i2c.h>
 #include <miiphy.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <fsl_mdio.h>
 #include <tsec.h>
diff --git a/board/armltd/vexpress/vexpress_tc2.c b/board/armltd/vexpress/vexpress_tc2.c
index c7adf950f5..b143e04097 100644
--- a/board/armltd/vexpress/vexpress_tc2.c
+++ b/board/armltd/vexpress/vexpress_tc2.c
@@ -11,7 +11,7 @@
 #include <asm/io.h>
 #include <asm/u-boot.h>
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 
 #define SCC_BASE	0x7fff0000
 
diff --git a/board/congatec/cgtqmx6eval/cgtqmx6eval.c b/board/congatec/cgtqmx6eval/cgtqmx6eval.c
index 2ed66d3ba3..3609f2219c 100644
--- a/board/congatec/cgtqmx6eval/cgtqmx6eval.c
+++ b/board/congatec/cgtqmx6eval/cgtqmx6eval.c
@@ -766,7 +766,7 @@ int board_late_init(void)
 #ifdef CONFIG_SPL_BUILD
 #include <asm/arch/mx6-ddr.h>
 #include <spl.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <spi_flash.h>
 #include <spi.h>
 
diff --git a/board/el/el6x/el6x.c b/board/el/el6x/el6x.c
index fb128f5d4c..2f78e37b24 100644
--- a/board/el/el6x/el6x.c
+++ b/board/el/el6x/el6x.c
@@ -480,7 +480,7 @@ int checkboard(void)
 
 #ifdef CONFIG_SPL_BUILD
 #include <spl.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 
 const struct mx6dq_iomux_ddr_regs mx6_ddr_ioregs = {
 	.dram_sdclk_0 =  0x00020030,
diff --git a/board/esd/vme8349/vme8349.c b/board/esd/vme8349/vme8349.c
index 36a55195df..35a1538c00 100644
--- a/board/esd/vme8349/vme8349.c
+++ b/board/esd/vme8349/vme8349.c
@@ -17,7 +17,7 @@
 #include <mpc83xx.h>
 #include <asm/mpc8349_pci.h>
 #if defined(CONFIG_OF_LIBFDT)
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #endif
 #include <asm/io.h>
 #include <asm/mmu.h>
diff --git a/board/freescale/b4860qds/pci.c b/board/freescale/b4860qds/pci.c
index d9ccac7a6a..1216d63299 100644
--- a/board/freescale/b4860qds/pci.c
+++ b/board/freescale/b4860qds/pci.c
@@ -8,7 +8,7 @@
 #include <command.h>
 #include <pci.h>
 #include <asm/fsl_pci.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <asm/fsl_serdes.h>
 
diff --git a/board/freescale/bsc9131rdb/bsc9131rdb.c b/board/freescale/bsc9131rdb/bsc9131rdb.c
index c642e88a09..9b105765bd 100644
--- a/board/freescale/bsc9131rdb/bsc9131rdb.c
+++ b/board/freescale/bsc9131rdb/bsc9131rdb.c
@@ -11,7 +11,7 @@
 #include <asm/immap_85xx.h>
 #include <asm/io.h>
 #include <miiphy.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <fsl_mdio.h>
 #include <tsec.h>
diff --git a/board/freescale/bsc9132qds/bsc9132qds.c b/board/freescale/bsc9132qds/bsc9132qds.c
index ed0b453e54..7a93e7c89a 100644
--- a/board/freescale/bsc9132qds/bsc9132qds.c
+++ b/board/freescale/bsc9132qds/bsc9132qds.c
@@ -11,7 +11,7 @@
 #include <asm/immap_85xx.h>
 #include <asm/io.h>
 #include <miiphy.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <fsl_mdio.h>
 #include <tsec.h>
diff --git a/board/freescale/c29xpcie/c29xpcie.c b/board/freescale/c29xpcie/c29xpcie.c
index 23901a4f96..9d2888d867 100644
--- a/board/freescale/c29xpcie/c29xpcie.c
+++ b/board/freescale/c29xpcie/c29xpcie.c
@@ -11,7 +11,7 @@
 #include <asm/immap_85xx.h>
 #include <asm/io.h>
 #include <miiphy.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <fsl_mdio.h>
 #include <tsec.h>
diff --git a/board/freescale/common/cds_pci_ft.c b/board/freescale/common/cds_pci_ft.c
index 571dfbbaad..90bd7bc9e2 100644
--- a/board/freescale/common/cds_pci_ft.c
+++ b/board/freescale/common/cds_pci_ft.c
@@ -5,7 +5,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include "cadmus.h"
 
diff --git a/board/freescale/common/fman.c b/board/freescale/common/fman.c
index b5025ab14e..e6952b5e55 100644
--- a/board/freescale/common/fman.c
+++ b/board/freescale/common/fman.c
@@ -5,8 +5,8 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
-#include <libfdt_env.h>
+#include <linux/libfdt.h>
+#include <linux/libfdt_env.h>
 #include <fdt_support.h>
 
 #include <fm_eth.h>
diff --git a/board/freescale/common/p_corenet/pci.c b/board/freescale/common/p_corenet/pci.c
index 9f4f808376..ccea8b17cf 100644
--- a/board/freescale/common/p_corenet/pci.c
+++ b/board/freescale/common/p_corenet/pci.c
@@ -8,7 +8,7 @@
 #include <command.h>
 #include <pci.h>
 #include <asm/fsl_pci.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <asm/fsl_serdes.h>
 
diff --git a/board/freescale/common/sgmii_riser.c b/board/freescale/common/sgmii_riser.c
index 5c3c59375c..f3e0fb2cd5 100644
--- a/board/freescale/common/sgmii_riser.c
+++ b/board/freescale/common/sgmii_riser.c
@@ -15,7 +15,7 @@
 #include <config.h>
 #include <common.h>
 #include <net.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <tsec.h>
 #include <fdt_support.h>
 
diff --git a/board/freescale/ls1043aqds/eth.c b/board/freescale/ls1043aqds/eth.c
index 3411bed276..e8639e09ad 100644
--- a/board/freescale/ls1043aqds/eth.c
+++ b/board/freescale/ls1043aqds/eth.c
@@ -11,7 +11,7 @@
 #include <fm_eth.h>
 #include <fsl_mdio.h>
 #include <fsl_dtsec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <malloc.h>
 #include <asm/arch/fsl_serdes.h>
 
diff --git a/board/freescale/ls2080a/ls2080a.c b/board/freescale/ls2080a/ls2080a.c
index 41417e9dc6..e1da73fb1a 100644
--- a/board/freescale/ls2080a/ls2080a.c
+++ b/board/freescale/ls2080a/ls2080a.c
@@ -11,7 +11,7 @@
 #include <fsl_ddr.h>
 #include <asm/io.h>
 #include <fdt_support.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fsl-mc/fsl_mc.h>
 #include <environment.h>
 #include <asm/arch/soc.h>
diff --git a/board/freescale/ls2080aqds/ls2080aqds.c b/board/freescale/ls2080aqds/ls2080aqds.c
index 83773d0af5..0f42b0d7f6 100644
--- a/board/freescale/ls2080aqds/ls2080aqds.c
+++ b/board/freescale/ls2080aqds/ls2080aqds.c
@@ -11,7 +11,7 @@
 #include <fsl_ddr.h>
 #include <asm/io.h>
 #include <fdt_support.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fsl-mc/fsl_mc.h>
 #include <environment.h>
 #include <i2c.h>
diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c
index 07ba0266d5..6435e1aa33 100644
--- a/board/freescale/ls2080ardb/ls2080ardb.c
+++ b/board/freescale/ls2080ardb/ls2080ardb.c
@@ -13,7 +13,7 @@
 #include <asm/io.h>
 #include <hwconfig.h>
 #include <fdt_support.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fsl-mc/fsl_mc.h>
 #include <environment.h>
 #include <efi_loader.h>
diff --git a/board/freescale/mpc8308rdb/mpc8308rdb.c b/board/freescale/mpc8308rdb/mpc8308rdb.c
index b4a0dd5d1a..93c7200509 100644
--- a/board/freescale/mpc8308rdb/mpc8308rdb.c
+++ b/board/freescale/mpc8308rdb/mpc8308rdb.c
@@ -9,7 +9,7 @@
 #include <hwconfig.h>
 #include <i2c.h>
 #include <spi.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <pci.h>
 #include <mpc83xx.h>
diff --git a/board/freescale/mpc8313erdb/mpc8313erdb.c b/board/freescale/mpc8313erdb/mpc8313erdb.c
index 8974378326..6587c6f41a 100644
--- a/board/freescale/mpc8313erdb/mpc8313erdb.c
+++ b/board/freescale/mpc8313erdb/mpc8313erdb.c
@@ -8,7 +8,7 @@
 
 #include <common.h>
 #if defined(CONFIG_OF_LIBFDT)
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #endif
 #include <pci.h>
 #include <mpc83xx.h>
diff --git a/board/freescale/mpc8315erdb/mpc8315erdb.c b/board/freescale/mpc8315erdb/mpc8315erdb.c
index 22f1565b4c..52e2ce3bdd 100644
--- a/board/freescale/mpc8315erdb/mpc8315erdb.c
+++ b/board/freescale/mpc8315erdb/mpc8315erdb.c
@@ -10,7 +10,7 @@
 #include <common.h>
 #include <hwconfig.h>
 #include <i2c.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <pci.h>
 #include <mpc83xx.h>
diff --git a/board/freescale/mpc8323erdb/mpc8323erdb.c b/board/freescale/mpc8323erdb/mpc8323erdb.c
index b715d8363e..772688186b 100644
--- a/board/freescale/mpc8323erdb/mpc8323erdb.c
+++ b/board/freescale/mpc8323erdb/mpc8323erdb.c
@@ -15,7 +15,7 @@
 #include <i2c.h>
 #include <miiphy.h>
 #include <command.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #if defined(CONFIG_PCI)
 #include <pci.h>
 #endif
diff --git a/board/freescale/mpc832xemds/mpc832xemds.c b/board/freescale/mpc832xemds/mpc832xemds.c
index b49e03e4f9..c960228701 100644
--- a/board/freescale/mpc832xemds/mpc832xemds.c
+++ b/board/freescale/mpc832xemds/mpc832xemds.c
@@ -17,7 +17,7 @@
 #endif
 #include <asm/mmu.h>
 #if defined(CONFIG_OF_LIBFDT)
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #endif
 #if defined(CONFIG_PQ_MDS_PIB)
 #include "../common/pq-mds-pib.h"
diff --git a/board/freescale/mpc8349emds/mpc8349emds.c b/board/freescale/mpc8349emds/mpc8349emds.c
index 5f502e2a65..2dc26f2bf7 100644
--- a/board/freescale/mpc8349emds/mpc8349emds.c
+++ b/board/freescale/mpc8349emds/mpc8349emds.c
@@ -19,7 +19,7 @@
 #endif
 
 #if defined(CONFIG_OF_LIBFDT)
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #endif
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/freescale/mpc8349itx/mpc8349itx.c b/board/freescale/mpc8349itx/mpc8349itx.c
index 895e9ffda6..2818c5d5ee 100644
--- a/board/freescale/mpc8349itx/mpc8349itx.c
+++ b/board/freescale/mpc8349itx/mpc8349itx.c
@@ -17,7 +17,7 @@
 #include <spd_sdram.h>
 #include <asm/mmu.h>
 #if defined(CONFIG_OF_LIBFDT)
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #endif
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/freescale/mpc837xemds/mpc837xemds.c b/board/freescale/mpc837xemds/mpc837xemds.c
index 233049227f..7a470647fd 100644
--- a/board/freescale/mpc837xemds/mpc837xemds.c
+++ b/board/freescale/mpc837xemds/mpc837xemds.c
@@ -12,7 +12,7 @@
 #include <asm/fsl_mpc83xx_serdes.h>
 #include <spd_sdram.h>
 #include <tsec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <fsl_esdhc.h>
 #include <fsl_mdio.h>
diff --git a/board/freescale/mpc8536ds/mpc8536ds.c b/board/freescale/mpc8536ds/mpc8536ds.c
index cede1da634..51cb637606 100644
--- a/board/freescale/mpc8536ds/mpc8536ds.c
+++ b/board/freescale/mpc8536ds/mpc8536ds.c
@@ -17,7 +17,7 @@
 #include <asm/fsl_serdes.h>
 #include <spd.h>
 #include <miiphy.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <spd_sdram.h>
 #include <fdt_support.h>
 #include <fsl_mdio.h>
diff --git a/board/freescale/mpc8541cds/mpc8541cds.c b/board/freescale/mpc8541cds/mpc8541cds.c
index 7b264dddd1..33ced17a64 100644
--- a/board/freescale/mpc8541cds/mpc8541cds.c
+++ b/board/freescale/mpc8541cds/mpc8541cds.c
@@ -14,7 +14,7 @@
 #include <fsl_ddr_sdram.h>
 #include <ioports.h>
 #include <spd_sdram.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 
 #include "../common/cadmus.h"
diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c
index 66fb228a90..a283365ba7 100644
--- a/board/freescale/mpc8544ds/mpc8544ds.c
+++ b/board/freescale/mpc8544ds/mpc8544ds.c
@@ -15,7 +15,7 @@
 #include <asm/fsl_serdes.h>
 #include <asm/io.h>
 #include <miiphy.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <fsl_mdio.h>
 #include <tsec.h>
diff --git a/board/freescale/mpc8548cds/mpc8548cds.c b/board/freescale/mpc8548cds/mpc8548cds.c
index de76d36174..7574b1d4a0 100644
--- a/board/freescale/mpc8548cds/mpc8548cds.c
+++ b/board/freescale/mpc8548cds/mpc8548cds.c
@@ -15,7 +15,7 @@
 #include <fsl_ddr_sdram.h>
 #include <asm/fsl_serdes.h>
 #include <miiphy.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <tsec.h>
 #include <fsl_mdio.h>
diff --git a/board/freescale/mpc8555cds/mpc8555cds.c b/board/freescale/mpc8555cds/mpc8555cds.c
index de5f5669e6..9c74bfdd1d 100644
--- a/board/freescale/mpc8555cds/mpc8555cds.c
+++ b/board/freescale/mpc8555cds/mpc8555cds.c
@@ -12,7 +12,7 @@
 #include <fsl_ddr_sdram.h>
 #include <ioports.h>
 #include <spd_sdram.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 
 #include "../common/cadmus.h"
diff --git a/board/freescale/mpc8568mds/mpc8568mds.c b/board/freescale/mpc8568mds/mpc8568mds.c
index a5c5d9dd1a..4ad4270899 100644
--- a/board/freescale/mpc8568mds/mpc8568mds.c
+++ b/board/freescale/mpc8568mds/mpc8568mds.c
@@ -17,7 +17,7 @@
 #include <spd_sdram.h>
 #include <i2c.h>
 #include <ioports.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 
 #include "bcsr.h"
diff --git a/board/freescale/mpc8569mds/mpc8569mds.c b/board/freescale/mpc8569mds/mpc8569mds.c
index 122490c026..8e72864bec 100644
--- a/board/freescale/mpc8569mds/mpc8569mds.c
+++ b/board/freescale/mpc8569mds/mpc8569mds.c
@@ -21,7 +21,7 @@
 #include <spd_sdram.h>
 #include <i2c.h>
 #include <ioports.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <fsl_esdhc.h>
 #include <phy.h>
diff --git a/board/freescale/mpc8572ds/mpc8572ds.c b/board/freescale/mpc8572ds/mpc8572ds.c
index 93d54f5c4a..f6a34b5124 100644
--- a/board/freescale/mpc8572ds/mpc8572ds.c
+++ b/board/freescale/mpc8572ds/mpc8572ds.c
@@ -16,7 +16,7 @@
 #include <asm/io.h>
 #include <asm/fsl_serdes.h>
 #include <miiphy.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <tsec.h>
 #include <fsl_mdio.h>
diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c b/board/freescale/mpc8610hpcd/mpc8610hpcd.c
index d97562c849..0c307793bf 100644
--- a/board/freescale/mpc8610hpcd/mpc8610hpcd.c
+++ b/board/freescale/mpc8610hpcd/mpc8610hpcd.c
@@ -14,7 +14,7 @@
 #include <asm/fsl_serdes.h>
 #include <i2c.h>
 #include <asm/io.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <spd_sdram.h>
 #include <netdev.h>
diff --git a/board/freescale/mpc8641hpcn/mpc8641hpcn.c b/board/freescale/mpc8641hpcn/mpc8641hpcn.c
index 2604a51e91..2714cacfbe 100644
--- a/board/freescale/mpc8641hpcn/mpc8641hpcn.c
+++ b/board/freescale/mpc8641hpcn/mpc8641hpcn.c
@@ -12,7 +12,7 @@
 #include <fsl_ddr_sdram.h>
 #include <asm/fsl_serdes.h>
 #include <asm/io.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <netdev.h>
 
diff --git a/board/freescale/mx6sabreauto/mx6sabreauto.c b/board/freescale/mx6sabreauto/mx6sabreauto.c
index 15ca0294f5..f7159f88a4 100644
--- a/board/freescale/mx6sabreauto/mx6sabreauto.c
+++ b/board/freescale/mx6sabreauto/mx6sabreauto.c
@@ -776,7 +776,7 @@ int board_ehci_power(int port, int on)
 #ifdef CONFIG_SPL_BUILD
 #include <asm/arch/mx6-ddr.h>
 #include <spl.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 
 #ifdef CONFIG_SPL_OS_BOOT
 int spl_start_uboot(void)
diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c
index 5b50bc815f..72954a81db 100644
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -722,7 +722,7 @@ int checkboard(void)
 #ifdef CONFIG_SPL_BUILD
 #include <asm/arch/mx6-ddr.h>
 #include <spl.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 
 #ifdef CONFIG_SPL_OS_BOOT
 int spl_start_uboot(void)
diff --git a/board/freescale/mx6slevk/mx6slevk.c b/board/freescale/mx6slevk/mx6slevk.c
index 8afd5da49f..635b20dff0 100644
--- a/board/freescale/mx6slevk/mx6slevk.c
+++ b/board/freescale/mx6slevk/mx6slevk.c
@@ -303,7 +303,7 @@ int checkboard(void)
 
 #ifdef CONFIG_SPL_BUILD
 #include <spl.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 
 #define USDHC1_CD_GPIO	IMX_GPIO_NR(4, 7)
 #define USDHC2_CD_GPIO	IMX_GPIO_NR(5, 0)
diff --git a/board/freescale/mx6sxsabresd/mx6sxsabresd.c b/board/freescale/mx6sxsabresd/mx6sxsabresd.c
index 2aeef61ffd..47367846c0 100644
--- a/board/freescale/mx6sxsabresd/mx6sxsabresd.c
+++ b/board/freescale/mx6sxsabresd/mx6sxsabresd.c
@@ -548,7 +548,7 @@ int checkboard(void)
 }
 
 #ifdef CONFIG_SPL_BUILD
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <spl.h>
 #include <asm/arch/mx6-ddr.h>
 
diff --git a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
index cf7a069c56..a7b0fa86e0 100644
--- a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
+++ b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
@@ -696,7 +696,7 @@ int checkboard(void)
 }
 
 #ifdef CONFIG_SPL_BUILD
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <spl.h>
 #include <asm/arch/mx6-ddr.h>
 
diff --git a/board/freescale/p1010rdb/p1010rdb.c b/board/freescale/p1010rdb/p1010rdb.c
index aa04e993c4..2ad147f182 100644
--- a/board/freescale/p1010rdb/p1010rdb.c
+++ b/board/freescale/p1010rdb/p1010rdb.c
@@ -11,7 +11,7 @@
 #include <asm/immap_85xx.h>
 #include <asm/io.h>
 #include <miiphy.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <fsl_mdio.h>
 #include <tsec.h>
diff --git a/board/freescale/p1022ds/p1022ds.c b/board/freescale/p1022ds/p1022ds.c
index bf493262d0..4e3c824e75 100644
--- a/board/freescale/p1022ds/p1022ds.c
+++ b/board/freescale/p1022ds/p1022ds.c
@@ -17,7 +17,7 @@
 #include <fsl_ddr_sdram.h>
 #include <asm/fsl_serdes.h>
 #include <asm/io.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <fsl_mdio.h>
 #include <tsec.h>
diff --git a/board/freescale/p1023rdb/p1023rdb.c b/board/freescale/p1023rdb/p1023rdb.c
index ccda824125..05abf371c4 100644
--- a/board/freescale/p1023rdb/p1023rdb.c
+++ b/board/freescale/p1023rdb/p1023rdb.c
@@ -18,7 +18,7 @@
 #include <asm/fsl_pci.h>
 #include <fsl_ddr_sdram.h>
 #include <asm/fsl_portals.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <netdev.h>
 #include <malloc.h>
diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
index 31c8ed9ae1..4b792cf6ee 100644
--- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
+++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
@@ -20,7 +20,7 @@
 #include <asm/fsl_lbc.h>
 #include <asm/mp.h>
 #include <miiphy.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <fsl_mdio.h>
 #include <tsec.h>
diff --git a/board/freescale/p1_twr/p1_twr.c b/board/freescale/p1_twr/p1_twr.c
index 02c89998cb..87ae1b1734 100644
--- a/board/freescale/p1_twr/p1_twr.c
+++ b/board/freescale/p1_twr/p1_twr.c
@@ -20,7 +20,7 @@
 #include <asm/fsl_lbc.h>
 #include <asm/mp.h>
 #include <miiphy.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <fsl_mdio.h>
 #include <tsec.h>
diff --git a/board/freescale/qemu-ppce500/qemu-ppce500.c b/board/freescale/qemu-ppce500/qemu-ppce500.c
index cf5023c505..2353f3ff1f 100644
--- a/board/freescale/qemu-ppce500/qemu-ppce500.c
+++ b/board/freescale/qemu-ppce500/qemu-ppce500.c
@@ -11,7 +11,7 @@
 #include <asm/mmu.h>
 #include <asm/fsl_pci.h>
 #include <asm/io.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <netdev.h>
 #include <fdtdec.h>
diff --git a/board/freescale/t102xqds/pci.c b/board/freescale/t102xqds/pci.c
index 7369289618..5ece77993d 100644
--- a/board/freescale/t102xqds/pci.c
+++ b/board/freescale/t102xqds/pci.c
@@ -8,7 +8,7 @@
 #include <command.h>
 #include <pci.h>
 #include <asm/fsl_pci.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <asm/fsl_serdes.h>
 
diff --git a/board/freescale/t102xrdb/pci.c b/board/freescale/t102xrdb/pci.c
index ba7041af95..f13d41c77d 100644
--- a/board/freescale/t102xrdb/pci.c
+++ b/board/freescale/t102xrdb/pci.c
@@ -8,7 +8,7 @@
 #include <command.h>
 #include <pci.h>
 #include <asm/fsl_pci.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <asm/fsl_serdes.h>
 
diff --git a/board/freescale/t1040qds/pci.c b/board/freescale/t1040qds/pci.c
index c53e3b76a4..68ee74b785 100644
--- a/board/freescale/t1040qds/pci.c
+++ b/board/freescale/t1040qds/pci.c
@@ -8,7 +8,7 @@
 #include <command.h>
 #include <pci.h>
 #include <asm/fsl_pci.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <asm/fsl_serdes.h>
 
diff --git a/board/freescale/t104xrdb/pci.c b/board/freescale/t104xrdb/pci.c
index c53e3b76a4..68ee74b785 100644
--- a/board/freescale/t104xrdb/pci.c
+++ b/board/freescale/t104xrdb/pci.c
@@ -8,7 +8,7 @@
 #include <command.h>
 #include <pci.h>
 #include <asm/fsl_pci.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <asm/fsl_serdes.h>
 
diff --git a/board/freescale/t208xqds/pci.c b/board/freescale/t208xqds/pci.c
index 84a89dad4f..5a6731c12b 100644
--- a/board/freescale/t208xqds/pci.c
+++ b/board/freescale/t208xqds/pci.c
@@ -8,7 +8,7 @@
 #include <command.h>
 #include <pci.h>
 #include <asm/fsl_pci.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <asm/fsl_serdes.h>
 
diff --git a/board/freescale/t208xrdb/pci.c b/board/freescale/t208xrdb/pci.c
index ba7041af95..f13d41c77d 100644
--- a/board/freescale/t208xrdb/pci.c
+++ b/board/freescale/t208xrdb/pci.c
@@ -8,7 +8,7 @@
 #include <command.h>
 #include <pci.h>
 #include <asm/fsl_pci.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <asm/fsl_serdes.h>
 
diff --git a/board/freescale/t4qds/pci.c b/board/freescale/t4qds/pci.c
index 08d74b444a..398c62bc48 100644
--- a/board/freescale/t4qds/pci.c
+++ b/board/freescale/t4qds/pci.c
@@ -8,7 +8,7 @@
 #include <command.h>
 #include <pci.h>
 #include <asm/fsl_pci.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <asm/fsl_serdes.h>
 
diff --git a/board/freescale/t4rdb/pci.c b/board/freescale/t4rdb/pci.c
index 6387a20cae..36cff0dac4 100644
--- a/board/freescale/t4rdb/pci.c
+++ b/board/freescale/t4rdb/pci.c
@@ -8,7 +8,7 @@
 #include <command.h>
 #include <pci.h>
 #include <asm/fsl_pci.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <asm/fsl_serdes.h>
 
diff --git a/board/gdsys/mpc8308/hrcon.c b/board/gdsys/mpc8308/hrcon.c
index 7e485074ce..96f60bef95 100644
--- a/board/gdsys/mpc8308/hrcon.c
+++ b/board/gdsys/mpc8308/hrcon.c
@@ -9,7 +9,7 @@
 #include <hwconfig.h>
 #include <i2c.h>
 #include <spi.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <pci.h>
 #include <mpc83xx.h>
diff --git a/board/gdsys/mpc8308/strider.c b/board/gdsys/mpc8308/strider.c
index fec691515d..8821105061 100644
--- a/board/gdsys/mpc8308/strider.c
+++ b/board/gdsys/mpc8308/strider.c
@@ -9,7 +9,7 @@
 #include <hwconfig.h>
 #include <i2c.h>
 #include <spi.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <pci.h>
 #include <mpc83xx.h>
diff --git a/board/gdsys/p1022/controlcenterd.c b/board/gdsys/p1022/controlcenterd.c
index 9fb814d8c7..b5f445a943 100644
--- a/board/gdsys/p1022/controlcenterd.c
+++ b/board/gdsys/p1022/controlcenterd.c
@@ -32,7 +32,7 @@
 #include <fsl_ddr_sdram.h>
 #include <asm/fsl_serdes.h>
 #include <asm/io.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <fsl_mdio.h>
 #include <tsec.h>
diff --git a/board/ids/ids8313/ids8313.c b/board/ids/ids8313/ids8313.c
index 4433e8c77e..67818931f0 100644
--- a/board/ids/ids8313/ids8313.c
+++ b/board/ids/ids8313/ids8313.c
@@ -15,7 +15,7 @@
 #include <common.h>
 #include <mpc83xx.h>
 #include <spi.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 /** CPLD contains the info about:
diff --git a/board/keymile/km83xx/km83xx.c b/board/keymile/km83xx/km83xx.c
index 5e07faa818..81835e8493 100644
--- a/board/keymile/km83xx/km83xx.c
+++ b/board/keymile/km83xx/km83xx.c
@@ -23,7 +23,7 @@
 #include <asm/mmu.h>
 #include <asm/processor.h>
 #include <pci.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <post.h>
 
 #include "../common/common.h"
diff --git a/board/keymile/kmp204x/pci.c b/board/keymile/kmp204x/pci.c
index b827e43a7a..b2c3679719 100644
--- a/board/keymile/kmp204x/pci.c
+++ b/board/keymile/kmp204x/pci.c
@@ -11,7 +11,7 @@
 #include <command.h>
 #include <pci.h>
 #include <asm/fsl_pci.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <asm/fsl_serdes.h>
 #include <linux/errno.h>
diff --git a/board/mpc8308_p1m/mpc8308_p1m.c b/board/mpc8308_p1m/mpc8308_p1m.c
index 234a387801..e96645f82d 100644
--- a/board/mpc8308_p1m/mpc8308_p1m.c
+++ b/board/mpc8308_p1m/mpc8308_p1m.c
@@ -7,7 +7,7 @@
 
 #include <common.h>
 #include <i2c.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <pci.h>
 #include <mpc83xx.h>
diff --git a/board/phytec/pcm058/pcm058.c b/board/phytec/pcm058/pcm058.c
index 1538158987..277590f4a9 100644
--- a/board/phytec/pcm058/pcm058.c
+++ b/board/phytec/pcm058/pcm058.c
@@ -397,7 +397,7 @@ int board_late_init(void)
 
 #ifdef CONFIG_SPL_BUILD
 #include <spl.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 
 static const struct mx6dq_iomux_ddr_regs mx6_ddr_ioregs = {
 	.dram_sdclk_0 = 0x00000030,
diff --git a/board/phytec/pfla02/pfla02.c b/board/phytec/pfla02/pfla02.c
index 136f1d5e70..18ff9efeb1 100644
--- a/board/phytec/pfla02/pfla02.c
+++ b/board/phytec/pfla02/pfla02.c
@@ -400,7 +400,7 @@ int board_late_init(void)
 #ifdef CONFIG_SPL_BUILD
 #include <asm/arch/mx6-ddr.h>
 #include <spl.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 
 #define MX6_PHYFLEX_ERR006282	IMX_GPIO_NR(2, 11)
 static void phyflex_err006282_workaround(void)
diff --git a/board/sbc8349/sbc8349.c b/board/sbc8349/sbc8349.c
index a3395ed680..ef87f9f0fe 100644
--- a/board/sbc8349/sbc8349.c
+++ b/board/sbc8349/sbc8349.c
@@ -16,7 +16,7 @@
 #include <spd_sdram.h>
 #include <miiphy.h>
 #if defined(CONFIG_OF_LIBFDT)
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #endif
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/sbc8548/sbc8548.c b/board/sbc8548/sbc8548.c
index 25329e4473..1a48a6c89f 100644
--- a/board/sbc8548/sbc8548.c
+++ b/board/sbc8548/sbc8548.c
@@ -21,7 +21,7 @@
 #include <netdev.h>
 #include <tsec.h>
 #include <miiphy.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/sbc8641d/sbc8641d.c b/board/sbc8641d/sbc8641d.c
index 08ced102b6..b58e123f1f 100644
--- a/board/sbc8641d/sbc8641d.c
+++ b/board/sbc8641d/sbc8641d.c
@@ -20,7 +20,7 @@
 #include <asm/fsl_pci.h>
 #include <fsl_ddr_sdram.h>
 #include <asm/fsl_serdes.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/socrates/socrates.c b/board/socrates/socrates.c
index 004f37009a..a130b7daec 100644
--- a/board/socrates/socrates.c
+++ b/board/socrates/socrates.c
@@ -17,7 +17,7 @@
 #include <asm/immap_85xx.h>
 #include <ioports.h>
 #include <flash.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <asm/io.h>
 #include <i2c.h>
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index 70e01437c4..4e05faf9af 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -29,7 +29,7 @@
 #include <asm/io.h>
 #include <crc.h>
 #include <environment.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <nand.h>
 #include <net.h>
 #include <sy8106a.h>
diff --git a/board/toradex/apalis_imx6/apalis_imx6.c b/board/toradex/apalis_imx6/apalis_imx6.c
index ebc6c12cbc..b246c27dfe 100644
--- a/board/toradex/apalis_imx6/apalis_imx6.c
+++ b/board/toradex/apalis_imx6/apalis_imx6.c
@@ -892,7 +892,7 @@ void ldo_mode_set(int ldo_bypass)
 
 #ifdef CONFIG_SPL_BUILD
 #include <spl.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include "asm/arch/mx6q-ddr.h"
 #include "asm/arch/iomux.h"
 #include "asm/arch/crm_regs.h"
diff --git a/board/toradex/colibri_imx6/colibri_imx6.c b/board/toradex/colibri_imx6/colibri_imx6.c
index 669d9123ca..1a1f021e89 100644
--- a/board/toradex/colibri_imx6/colibri_imx6.c
+++ b/board/toradex/colibri_imx6/colibri_imx6.c
@@ -742,7 +742,7 @@ void ldo_mode_set(int ldo_bypass)
 
 #ifdef CONFIG_SPL_BUILD
 #include <spl.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include "asm/arch/mx6dl-ddr.h"
 #include "asm/arch/iomux.h"
 #include "asm/arch/crm_regs.h"
diff --git a/board/toradex/common/tdx-common.c b/board/toradex/common/tdx-common.c
index b4e4727e63..6e12d279e8 100644
--- a/board/toradex/common/tdx-common.c
+++ b/board/toradex/common/tdx-common.c
@@ -6,7 +6,7 @@
 
 #include <common.h>
 #include <g_dnl.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 
 #include "tdx-cfg-block.h"
 #include <asm/setup.h>
diff --git a/board/tqc/tqma6/tqma6.c b/board/tqc/tqma6/tqma6.c
index 14991fdb00..d13e75c207 100644
--- a/board/tqc/tqma6/tqma6.c
+++ b/board/tqc/tqma6/tqma6.c
@@ -20,7 +20,7 @@
 #include <asm/mach-imx/spi.h>
 #include <common.h>
 #include <fsl_esdhc.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <i2c.h>
 #include <mmc.h>
 #include <power/pfuze100_pmic.h>
diff --git a/board/tqc/tqma6/tqma6_mba6.c b/board/tqc/tqma6/tqma6_mba6.c
index 1188215738..be4c132fbe 100644
--- a/board/tqc/tqma6/tqma6_mba6.c
+++ b/board/tqc/tqma6/tqma6_mba6.c
@@ -20,7 +20,7 @@
 
 #include <common.h>
 #include <fsl_esdhc.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <malloc.h>
 #include <i2c.h>
 #include <micrel.h>
diff --git a/board/tqc/tqma6/tqma6_wru4.c b/board/tqc/tqma6/tqma6_wru4.c
index 2360cffdd9..128748fcab 100644
--- a/board/tqc/tqma6/tqma6_wru4.c
+++ b/board/tqc/tqma6/tqma6_wru4.c
@@ -23,7 +23,7 @@
 
 #include <common.h>
 #include <fsl_esdhc.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <malloc.h>
 #include <i2c.h>
 #include <micrel.h>
diff --git a/board/udoo/neo/neo.c b/board/udoo/neo/neo.c
index 7fa1289de0..dba63d9554 100644
--- a/board/udoo/neo/neo.c
+++ b/board/udoo/neo/neo.c
@@ -445,7 +445,7 @@ int board_late_init(void)
 
 #ifdef CONFIG_SPL_BUILD
 
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <asm/arch/mx6-ddr.h>
 
 static const struct mx6sx_iomux_ddr_regs mx6_ddr_ioregs = {
diff --git a/board/varisys/cyrus/pci.c b/board/varisys/cyrus/pci.c
index 4780e8c147..1853b197e7 100644
--- a/board/varisys/cyrus/pci.c
+++ b/board/varisys/cyrus/pci.c
@@ -8,7 +8,7 @@
 #include <command.h>
 #include <pci.h>
 #include <asm/fsl_pci.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <asm/fsl_serdes.h>
 
diff --git a/board/ve8313/ve8313.c b/board/ve8313/ve8313.c
index 3818ab96b3..bb5574c190 100644
--- a/board/ve8313/ve8313.c
+++ b/board/ve8313/ve8313.c
@@ -10,7 +10,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <pci.h>
 #include <mpc83xx.h>
 #include <ns16550.h>
diff --git a/board/vscom/baltos/board.c b/board/vscom/baltos/board.c
index cb39190c28..999d89c018 100644
--- a/board/vscom/baltos/board.c
+++ b/board/vscom/baltos/board.c
@@ -10,7 +10,7 @@
 
 #include <common.h>
 #include <errno.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <spl.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/hardware.h>
diff --git a/board/xes/common/fsl_8xxx_pci.c b/board/xes/common/fsl_8xxx_pci.c
index 62375717f0..45924cdb48 100644
--- a/board/xes/common/fsl_8xxx_pci.c
+++ b/board/xes/common/fsl_8xxx_pci.c
@@ -11,7 +11,7 @@
 #include <asm/fsl_serdes.h>
 #include <asm/io.h>
 #include <linux/compiler.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 
 
diff --git a/board/xes/xpedite520x/xpedite520x.c b/board/xes/xpedite520x/xpedite520x.c
index 6a3df52391..4b3a46c8cb 100644
--- a/board/xes/xpedite520x/xpedite520x.c
+++ b/board/xes/xpedite520x/xpedite520x.c
@@ -14,7 +14,7 @@
 #include <asm/io.h>
 #include <asm/cache.h>
 #include <asm/mmu.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <pca953x.h>
 
diff --git a/board/xes/xpedite537x/xpedite537x.c b/board/xes/xpedite537x/xpedite537x.c
index 41419feb17..ae606f5ba7 100644
--- a/board/xes/xpedite537x/xpedite537x.c
+++ b/board/xes/xpedite537x/xpedite537x.c
@@ -12,7 +12,7 @@
 #include <asm/fsl_pci.h>
 #include <asm/io.h>
 #include <asm/cache.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <pca953x.h>
 
diff --git a/board/xes/xpedite550x/xpedite550x.c b/board/xes/xpedite550x/xpedite550x.c
index 1f05150d0f..c90bb89dae 100644
--- a/board/xes/xpedite550x/xpedite550x.c
+++ b/board/xes/xpedite550x/xpedite550x.c
@@ -12,7 +12,7 @@
 #include <asm/fsl_pci.h>
 #include <asm/io.h>
 #include <asm/cache.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <pca953x.h>
 
diff --git a/cmd/bootefi.c b/cmd/bootefi.c
index c65c619d63..52e046383d 100644
--- a/cmd/bootefi.c
+++ b/cmd/bootefi.c
@@ -11,8 +11,8 @@
 #include <dm.h>
 #include <efi_loader.h>
 #include <errno.h>
-#include <libfdt.h>
-#include <libfdt_env.h>
+#include <linux/libfdt.h>
+#include <linux/libfdt_env.h>
 #include <memalign.h>
 #include <asm/global_data.h>
 #include <asm-generic/sections.h>
diff --git a/cmd/fdt.c b/cmd/fdt.c
index b783b0df42..65661fabb2 100644
--- a/cmd/fdt.c
+++ b/cmd/fdt.c
@@ -13,7 +13,7 @@
 #include <linux/ctype.h>
 #include <linux/types.h>
 #include <asm/global_data.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <mapmem.h>
 #include <asm/io.h>
diff --git a/cmd/spl.c b/cmd/spl.c
index 3b8992a163..593989717f 100644
--- a/cmd/spl.c
+++ b/cmd/spl.c
@@ -8,7 +8,7 @@
 #include <common.h>
 #include <command.h>
 #include <cmd_spl.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/common/board_info.c b/common/board_info.c
index aa45e24b34..16cf966233 100644
--- a/common/board_info.c
+++ b/common/board_info.c
@@ -3,7 +3,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <linux/compiler.h>
 
 int __weak checkboard(void)
diff --git a/common/boot_fit.c b/common/boot_fit.c
index add65c4bae..4b5cec58d0 100644
--- a/common/boot_fit.c
+++ b/common/boot_fit.c
@@ -11,7 +11,7 @@
 #include <common.h>
 #include <errno.h>
 #include <image.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 
 static int fdt_offset(const void *fit)
 {
diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 7b6028b426..d3fb0aae7a 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -7,7 +7,7 @@
 #include <common.h>
 #include <bootm.h>
 #include <linux/list.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <malloc.h>
 #include <asm/arch/resource_img.h>
 #include <asm/arch/rockchip_crc.h>
diff --git a/common/bootm_os.c b/common/bootm_os.c
index 31b1878dc4..5e6b1777e4 100644
--- a/common/bootm_os.c
+++ b/common/bootm_os.c
@@ -8,7 +8,7 @@
 #include <common.h>
 #include <bootm.h>
 #include <fdt_support.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <malloc.h>
 #include <vxworks.h>
 
diff --git a/common/bootstage.c b/common/bootstage.c
index 61479d7f07..bef293ce4f 100644
--- a/common/bootstage.c
+++ b/common/bootstage.c
@@ -11,7 +11,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <malloc.h>
 #include <linux/compiler.h>
 
diff --git a/common/common_fit.c b/common/common_fit.c
index 85b33d8c3b..3fef74084c 100644
--- a/common/common_fit.c
+++ b/common/common_fit.c
@@ -8,7 +8,7 @@
 #include <common.h>
 #include <errno.h>
 #include <image.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <spl.h>
 
 ulong fdt_getprop_u32(const void *fdt, int node, const char *prop)
diff --git a/common/fdt_support.c b/common/fdt_support.c
index fc588c3340..b096762b1b 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -13,7 +13,7 @@
 #include <linux/ctype.h>
 #include <linux/types.h>
 #include <asm/global_data.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <exports.h>
 #include <fdtdec.h>
diff --git a/common/image-fdt.c b/common/image-fdt.c
index 76e8230226..6bdd15e853 100644
--- a/common/image-fdt.c
+++ b/common/image-fdt.c
@@ -14,7 +14,7 @@
 #include <fdt_support.h>
 #include <errno.h>
 #include <image.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <mapmem.h>
 #include <asm/io.h>
 
diff --git a/common/image.c b/common/image.c
index 3667e86857..f0a5c80b25 100644
--- a/common/image.c
+++ b/common/image.c
@@ -22,7 +22,7 @@
 #include <mapmem.h>
 
 #if IMAGE_ENABLE_FIT || IMAGE_ENABLE_OF_LIBFDT
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <fpga.h>
 #include <xilinx.h>
diff --git a/common/lcd_simplefb.c b/common/lcd_simplefb.c
index d7e9fc9f65..81f3f42191 100644
--- a/common/lcd_simplefb.c
+++ b/common/lcd_simplefb.c
@@ -11,7 +11,7 @@
 #include <dm.h>
 #include <lcd.h>
 #include <fdt_support.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <video.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/common/spl/spl_fat.c b/common/spl/spl_fat.c
index 60b85f082d..59a85a986a 100644
--- a/common/spl/spl_fat.c
+++ b/common/spl/spl_fat.c
@@ -15,7 +15,7 @@
 #include <fat.h>
 #include <errno.h>
 #include <image.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 
 static int fat_registered;
 
diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index ebfd5bc2e3..f97fa03800 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -8,7 +8,7 @@
 #include <common.h>
 #include <errno.h>
 #include <image.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <spl.h>
 #include <malloc.h>
 
diff --git a/common/spl/spl_nand.c b/common/spl/spl_nand.c
index cd39f9be9d..d075985374 100644
--- a/common/spl/spl_nand.c
+++ b/common/spl/spl_nand.c
@@ -9,7 +9,7 @@
 #include <spl.h>
 #include <asm/io.h>
 #include <nand.h>
-#include <libfdt_env.h>
+#include <linux/libfdt_env.h>
 #include <fdt.h>
 
 #if defined(CONFIG_SPL_NAND_RAW_ONLY)
diff --git a/common/spl/spl_net.c b/common/spl/spl_net.c
index 88831097fa..79c9b3584b 100644
--- a/common/spl/spl_net.c
+++ b/common/spl/spl_net.c
@@ -11,7 +11,7 @@
 #include <errno.h>
 #include <spl.h>
 #include <net.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/common/spl/spl_ram.c b/common/spl/spl_ram.c
index b2645a1948..1b1a16c9c1 100644
--- a/common/spl/spl_ram.c
+++ b/common/spl/spl_ram.c
@@ -12,7 +12,7 @@
  */
 #include <common.h>
 #include <spl.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 
 #ifndef CONFIG_SPL_LOAD_FIT_ADDRESS
 # define CONFIG_SPL_LOAD_FIT_ADDRESS	0
diff --git a/common/spl/spl_ymodem.c b/common/spl/spl_ymodem.c
index ff8085b795..4ab3dcd624 100644
--- a/common/spl/spl_ymodem.c
+++ b/common/spl/spl_ymodem.c
@@ -14,7 +14,7 @@
 #include <xyzModem.h>
 #include <asm/u-boot.h>
 #include <asm/utils.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 
 #define BUF_SIZE 1024
 
diff --git a/drivers/core/of_access.c b/drivers/core/of_access.c
index f164b07946..863f6ecc47 100644
--- a/drivers/core/of_access.c
+++ b/drivers/core/of_access.c
@@ -21,7 +21,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <dm/of_access.h>
 #include <linux/ctype.h>
 #include <linux/err.h>
diff --git a/drivers/core/of_addr.c b/drivers/core/of_addr.c
index 4757066967..7513ea2cf7 100644
--- a/drivers/core/of_addr.c
+++ b/drivers/core/of_addr.c
@@ -8,7 +8,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <dm/of_access.h>
 #include <dm/of_addr.h>
 #include <linux/err.h>
diff --git a/drivers/core/of_extra.c b/drivers/core/of_extra.c
index 0381909848..ca2e92b32b 100644
--- a/drivers/core/of_extra.c
+++ b/drivers/core/of_extra.c
@@ -6,7 +6,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <dm/of_access.h>
 #include <dm/of_extra.h>
 #include <dm/ofnode.h>
diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index 8543c9366b..3f51b6d74b 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -9,7 +9,7 @@
 #include <dm.h>
 #include <fdtdec.h>
 #include <fdt_support.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <dm/of_access.h>
 #include <dm/of_addr.h>
 #include <dm/ofnode.h>
diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c
index 1f9d8b4a3e..9d844c1090 100644
--- a/drivers/core/regmap.c
+++ b/drivers/core/regmap.c
@@ -8,7 +8,7 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <malloc.h>
 #include <mapmem.h>
 #include <regmap.h>
diff --git a/drivers/core/root.c b/drivers/core/root.c
index 976e2c4fdd..d6dfeea263 100644
--- a/drivers/core/root.c
+++ b/drivers/core/root.c
@@ -11,7 +11,7 @@
 #include <errno.h>
 #include <fdtdec.h>
 #include <malloc.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <dm/device.h>
 #include <dm/device-internal.h>
 #include <dm/lists.h>
diff --git a/drivers/core/util.c b/drivers/core/util.c
index aaaed4ec02..24abe1445b 100644
--- a/drivers/core/util.c
+++ b/drivers/core/util.c
@@ -6,7 +6,7 @@
 
 #include <common.h>
 #include <dm/util.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <vsprintf.h>
 
 #ifdef CONFIG_DM_WARN
diff --git a/drivers/crypto/fsl/sec.c b/drivers/crypto/fsl/sec.c
index 0940faf768..470e662d8e 100644
--- a/drivers/crypto/fsl/sec.c
+++ b/drivers/crypto/fsl/sec.c
@@ -5,7 +5,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #if CONFIG_SYS_FSL_SEC_COMPAT == 2 || CONFIG_SYS_FSL_SEC_COMPAT >= 4
 #include <fsl_sec.h>
diff --git a/drivers/firmware/psci.c b/drivers/firmware/psci.c
index ab72b984fc..8c72db997c 100644
--- a/drivers/firmware/psci.c
+++ b/drivers/firmware/psci.c
@@ -10,7 +10,7 @@
 #include <common.h>
 #include <dm.h>
 #include <dm/lists.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <linux/arm-smccc.h>
 #include <linux/errno.h>
 #include <linux/psci.h>
diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c
index 5edd383c68..7d823814ad 100644
--- a/drivers/mmc/exynos_dw_mmc.c
+++ b/drivers/mmc/exynos_dw_mmc.c
@@ -8,7 +8,7 @@
 #include <common.h>
 #include <dwmmc.h>
 #include <fdtdec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <malloc.h>
 #include <errno.h>
 #include <asm/arch/dwmmc.h>
diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index 4f0a8e7ab2..2852fa71f2 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -10,7 +10,7 @@
 #include <common.h>
 #include <dm.h>
 #include <dt-structs.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <malloc.h>
 #include <mapmem.h>
 #include <sdhci.h>
diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c
index 95447310ab..6007a8ab64 100644
--- a/drivers/mmc/s5p_sdhci.c
+++ b/drivers/mmc/s5p_sdhci.c
@@ -10,7 +10,7 @@
 #include <malloc.h>
 #include <sdhci.h>
 #include <fdtdec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <asm/gpio.h>
 #include <asm/arch/mmc.h>
 #include <asm/arch/clk.h>
diff --git a/drivers/mmc/sdhci-cadence.c b/drivers/mmc/sdhci-cadence.c
index f83c1d7241..e027642008 100644
--- a/drivers/mmc/sdhci-cadence.c
+++ b/drivers/mmc/sdhci-cadence.c
@@ -10,7 +10,7 @@
 #include <linux/io.h>
 #include <linux/iopoll.h>
 #include <linux/sizes.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <mmc.h>
 #include <sdhci.h>
 
diff --git a/drivers/mmc/socfpga_dw_mmc.c b/drivers/mmc/socfpga_dw_mmc.c
index 759686ccd6..9ace505fe4 100644
--- a/drivers/mmc/socfpga_dw_mmc.c
+++ b/drivers/mmc/socfpga_dw_mmc.c
@@ -11,7 +11,7 @@
 #include <dwmmc.h>
 #include <errno.h>
 #include <fdtdec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <linux/err.h>
 #include <malloc.h>
 
diff --git a/drivers/mmc/xenon_sdhci.c b/drivers/mmc/xenon_sdhci.c
index 5d8ee35a19..f41e628222 100644
--- a/drivers/mmc/xenon_sdhci.c
+++ b/drivers/mmc/xenon_sdhci.c
@@ -18,7 +18,7 @@
 #include <common.h>
 #include <dm.h>
 #include <fdtdec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <malloc.h>
 #include <sdhci.h>
 
diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c
index 0fddb420dc..4a5600f31f 100644
--- a/drivers/mmc/zynq_sdhci.c
+++ b/drivers/mmc/zynq_sdhci.c
@@ -10,7 +10,7 @@
 #include <common.h>
 #include <dm.h>
 #include <fdtdec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <malloc.h>
 #include <sdhci.h>
 
diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c
index bdb6792c72..d90d150b29 100644
--- a/drivers/net/fsl-mc/mc.c
+++ b/drivers/net/fsl-mc/mc.c
@@ -8,7 +8,7 @@
 #include <errno.h>
 #include <linux/bug.h>
 #include <asm/io.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <net.h>
 #include <fdt_support.h>
 #include <fsl-mc/fsl_mc.h>
diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c
index df76a94144..11104dcc69 100644
--- a/drivers/pci/fsl_pci_init.c
+++ b/drivers/pci/fsl_pci_init.c
@@ -886,7 +886,7 @@ int fsl_pcie_init_board(int busno)
 #endif
 
 #ifdef CONFIG_OF_BOARD_SETUP
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 
 void ft_fsl_pci_setup(void *blob, const char *pci_compat,
diff --git a/drivers/pci/pci-emul-uclass.c b/drivers/pci/pci-emul-uclass.c
index 0f8e3c9fcb..dcea192418 100644
--- a/drivers/pci/pci-emul-uclass.c
+++ b/drivers/pci/pci-emul-uclass.c
@@ -8,7 +8,7 @@
 #include <common.h>
 #include <dm.h>
 #include <fdtdec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <pci.h>
 #include <dm/lists.h>
 
diff --git a/drivers/pci/pcie_layerscape_fixup.c b/drivers/pci/pcie_layerscape_fixup.c
index 9e6c2f5dfc..b4a5ac6bc6 100644
--- a/drivers/pci/pcie_layerscape_fixup.c
+++ b/drivers/pci/pcie_layerscape_fixup.c
@@ -12,7 +12,7 @@
 #include <asm/io.h>
 #include <errno.h>
 #ifdef CONFIG_OF_BOARD_SETUP
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #ifdef CONFIG_ARM
 #include <asm/arch/clock.h>
diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c
index a38d774ddc..72f99be7e6 100644
--- a/drivers/pinctrl/pinctrl-single.c
+++ b/drivers/pinctrl/pinctrl-single.c
@@ -7,7 +7,7 @@
 #include <common.h>
 #include <dm.h>
 #include <dm/pinctrl.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <asm/io.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/drivers/pinctrl/pinctrl-uclass.c b/drivers/pinctrl/pinctrl-uclass.c
index 5abfeba3bf..a0a326a142 100644
--- a/drivers/pinctrl/pinctrl-uclass.c
+++ b/drivers/pinctrl/pinctrl-uclass.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <linux/libfdt.h>
 #include <linux/err.h>
 #include <linux/list.h>
 #include <dm.h>
diff --git a/drivers/power/pmic/act8846.c b/drivers/power/pmic/act8846.c
index a6b0940956..7d107f4427 100644
--- a/drivers/power/pmic/act8846.c
+++ b/drivers/power/pmic/act8846.c
@@ -9,7 +9,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <fdtdec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <power/act8846_pmic.h>
 #include <power/pmic.h>
 
diff --git a/drivers/power/pmic/rn5t567.c b/drivers/power/pmic/rn5t567.c
index 001e69553e..9e5b0b119b 100644
--- a/drivers/power/pmic/rn5t567.c
+++ b/drivers/power/pmic/rn5t567.c
@@ -9,7 +9,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <fdtdec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <power/rn5t567_pmic.h>
 #include <power/pmic.h>
 
diff --git a/drivers/qe/fdt.c b/drivers/qe/fdt.c
index 4f48f984ab..9bbdc60353 100644
--- a/drivers/qe/fdt.c
+++ b/drivers/qe/fdt.c
@@ -8,7 +8,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <fsl_qe.h>
 
diff --git a/drivers/sound/rockchip-sound.c b/drivers/sound/rockchip-sound.c
index cf58725907..cb26eeba4f 100644
--- a/drivers/sound/rockchip-sound.c
+++ b/drivers/sound/rockchip-sound.c
@@ -7,7 +7,7 @@
 #include <malloc.h>
 #include <common.h>
 #include <asm/io.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdtdec.h>
 #include <i2s.h>
 #include <sound.h>
diff --git a/drivers/sound/sound-i2s.c b/drivers/sound/sound-i2s.c
index 749bbbd031..be69fb0b01 100644
--- a/drivers/sound/sound-i2s.c
+++ b/drivers/sound/sound-i2s.c
@@ -8,7 +8,7 @@
 #include <malloc.h>
 #include <common.h>
 #include <asm/io.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdtdec.h>
 #include <i2c.h>
 #include <i2s.h>
diff --git a/drivers/usb/common/common.c b/drivers/usb/common/common.c
index e8432bb016..69cf11cbf5 100644
--- a/drivers/usb/common/common.c
+++ b/drivers/usb/common/common.c
@@ -8,7 +8,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <linux/usb/otg.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/drivers/usb/host/ehci-exynos.c b/drivers/usb/host/ehci-exynos.c
index 30297b02d3..a2c6d5abfb 100644
--- a/drivers/usb/host/ehci-exynos.c
+++ b/drivers/usb/host/ehci-exynos.c
@@ -10,7 +10,7 @@
 #include <common.h>
 #include <dm.h>
 #include <fdtdec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <malloc.h>
 #include <usb.h>
 #include <asm/arch/cpu.h>
diff --git a/drivers/usb/host/ehci-msm.c b/drivers/usb/host/ehci-msm.c
index 2c0c63322c..79f655889e 100644
--- a/drivers/usb/host/ehci-msm.c
+++ b/drivers/usb/host/ehci-msm.c
@@ -12,7 +12,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <fdtdec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <usb.h>
 #include <usb/ehci-ci.h>
 #include <usb/ulpi.h>
diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c
index 1c72330b0c..f317cf00ea 100644
--- a/drivers/usb/host/ehci-tegra.c
+++ b/drivers/usb/host/ehci-tegra.c
@@ -16,7 +16,7 @@
 #include <asm/arch-tegra/clk_rst.h>
 #include <usb.h>
 #include <usb/ulpi.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 
 #include "ehci.h"
 
diff --git a/drivers/usb/host/ehci-vf.c b/drivers/usb/host/ehci-vf.c
index 5bb3763814..3d63cfa193 100644
--- a/drivers/usb/host/ehci-vf.c
+++ b/drivers/usb/host/ehci-vf.c
@@ -20,7 +20,7 @@
 #include <asm/mach-imx/iomux-v3.h>
 #include <asm/mach-imx/regs-usbphy.h>
 #include <usb/ehci-ci.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdtdec.h>
 
 #include "ehci.h"
diff --git a/drivers/usb/host/xhci-exynos5.c b/drivers/usb/host/xhci-exynos5.c
index bf7286554e..6f08d5d5a2 100644
--- a/drivers/usb/host/xhci-exynos5.c
+++ b/drivers/usb/host/xhci-exynos5.c
@@ -16,7 +16,7 @@
 #include <common.h>
 #include <dm.h>
 #include <fdtdec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <malloc.h>
 #include <usb.h>
 #include <watchdog.h>
diff --git a/drivers/usb/phy/rockchip_usb2_phy.c b/drivers/usb/phy/rockchip_usb2_phy.c
index d5f1199546..a6e071290a 100644
--- a/drivers/usb/phy/rockchip_usb2_phy.c
+++ b/drivers/usb/phy/rockchip_usb2_phy.c
@@ -8,7 +8,6 @@
 #include <asm/arch/clock.h>
 #include <asm/io.h>
 #include <fdtdec.h>
-#include <libfdt.h>
 #include <syscon.h>
 
 #include "../gadget/dwc2_udc_otg_priv.h"
diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 0d13a640d4..804f2ac8ce 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -8,7 +8,7 @@
 #include <config.h>
 #include <common.h>
 #include <errno.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdtdec.h>
 #include <fdt_support.h>
 #include <linux/hdmi.h>
diff --git a/drivers/video/exynos/exynos_dp.c b/drivers/video/exynos/exynos_dp.c
index 092342e7ad..f7a1116a30 100644
--- a/drivers/video/exynos/exynos_dp.c
+++ b/drivers/video/exynos/exynos_dp.c
@@ -11,7 +11,7 @@
 #include <common.h>
 #include <display.h>
 #include <fdtdec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <malloc.h>
 #include <video_bridge.h>
 #include <linux/compat.h>
diff --git a/drivers/video/exynos/exynos_dp_lowlevel.c b/drivers/video/exynos/exynos_dp_lowlevel.c
index aae78a8159..f84dd7097f 100644
--- a/drivers/video/exynos/exynos_dp_lowlevel.c
+++ b/drivers/video/exynos/exynos_dp_lowlevel.c
@@ -13,7 +13,7 @@
 #include <asm/arch/dp_info.h>
 #include <asm/arch/dp.h>
 #include <fdtdec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include "exynos_dp_lowlevel.h"
 
 /* Declare global data pointer */
diff --git a/drivers/video/exynos/exynos_fb.c b/drivers/video/exynos/exynos_fb.c
index 6ca17f2db2..a2879a9c57 100644
--- a/drivers/video/exynos/exynos_fb.c
+++ b/drivers/video/exynos/exynos_fb.c
@@ -13,7 +13,7 @@
 #include <div64.h>
 #include <dm.h>
 #include <fdtdec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <panel.h>
 #include <video.h>
 #include <video_bridge.h>
diff --git a/drivers/video/exynos/exynos_mipi_dsi.c b/drivers/video/exynos/exynos_mipi_dsi.c
index a5d9b59218..724d08f7ae 100644
--- a/drivers/video/exynos/exynos_mipi_dsi.c
+++ b/drivers/video/exynos/exynos_mipi_dsi.c
@@ -10,7 +10,7 @@
 #include <common.h>
 #include <malloc.h>
 #include <fdtdec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <linux/compat.h>
 #include <linux/err.h>
 #include <asm/arch/dsim.h>
diff --git a/include/fdt_support.h b/include/fdt_support.h
index 4f4b48ebb0..fff6ae916e 100644
--- a/include/fdt_support.h
+++ b/include/fdt_support.h
@@ -10,7 +10,7 @@
 
 #ifdef CONFIG_OF_LIBFDT
 
-#include <libfdt.h>
+#include <linux/libfdt.h>
 
 u32 fdt_getprop_u32_default_node(const void *fdt, int off, int cell,
 				const char *prop, const u32 dflt);
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 5592527fda..bb3643690e 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -14,7 +14,7 @@
  * changes to support FDT are minimized.
  */
 
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <pci.h>
 
 /*
diff --git a/include/image.h b/include/image.h
index d8892114e7..7b2e314974 100644
--- a/include/image.h
+++ b/include/image.h
@@ -53,7 +53,7 @@ struct lmb;
 
 #if IMAGE_ENABLE_FIT
 #include <hash.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 # ifdef CONFIG_SPL_BUILD
 #  ifdef CONFIG_SPL_CRC32_SUPPORT
diff --git a/include/libfdt.h b/include/libfdt.h
deleted file mode 100755
index f0821d8a0e..0000000000
--- a/include/libfdt.h
+++ /dev/null
@@ -1,315 +0,0 @@
-#ifndef UBOOT_LIBFDT_H
-#define UBOOT_LIBFDT_H
-/*
- * SPDX-License-Identifier:     GPL-2.0+ BSD-2-Clause
- */
-
-#ifdef USE_HOSTCC
-#include "../scripts/dtc/libfdt/libfdt.h"
-#else
-#include <linux/libfdt.h>
-#endif
-
-/* U-Boot local hacks */
-
-#ifndef SWIG /* Not available in Python */
-struct fdt_region {
-	int offset;
-	int size;
-};
-
-/*
- * Flags for fdt_find_regions()
- *
- * Add a region for the string table (always the last region)
- */
-#define FDT_REG_ADD_STRING_TAB		(1 << 0)
-
-/*
- * Add all supernodes of a matching node/property, useful for creating a
- * valid subset tree
- */
-#define FDT_REG_SUPERNODES		(1 << 1)
-
-/* Add the FDT_BEGIN_NODE tags of subnodes, including their names */
-#define FDT_REG_DIRECT_SUBNODES	(1 << 2)
-
-/* Add all subnodes of a matching node */
-#define FDT_REG_ALL_SUBNODES		(1 << 3)
-
-/* Add a region for the mem_rsvmap table (always the first region) */
-#define FDT_REG_ADD_MEM_RSVMAP		(1 << 4)
-
-/* Indicates what an fdt part is (node, property, value) */
-#define FDT_IS_NODE			(1 << 0)
-#define FDT_IS_PROP			(1 << 1)
-#define FDT_IS_VALUE			(1 << 2)	/* not supported */
-#define FDT_IS_COMPAT			(1 << 3)	/* used internally */
-#define FDT_NODE_HAS_PROP		(1 << 4)	/* node contains prop */
-
-#define FDT_ANY_GLOBAL		(FDT_IS_NODE | FDT_IS_PROP | FDT_IS_VALUE | \
-					FDT_IS_COMPAT)
-#define FDT_IS_ANY			0x1f		/* all the above */
-
-/* We set a reasonable limit on the number of nested nodes */
-#define FDT_MAX_DEPTH			32
-
-/* Decribes what we want to include from the current tag */
-enum want_t {
-	WANT_NOTHING,
-	WANT_NODES_ONLY,		/* No properties */
-	WANT_NODES_AND_PROPS,		/* Everything for one level */
-	WANT_ALL_NODES_AND_PROPS	/* Everything for all levels */
-};
-
-/* Keeps track of the state at parent nodes */
-struct fdt_subnode_stack {
-	int offset;		/* Offset of node */
-	enum want_t want;	/* The 'want' value here */
-	int included;		/* 1 if we included this node, 0 if not */
-};
-
-struct fdt_region_ptrs {
-	int depth;			/* Current tree depth */
-	int done;			/* What we have completed scanning */
-	enum want_t want;		/* What we are currently including */
-	char *end;			/* Pointer to end of full node path */
-	int nextoffset;			/* Next node offset to check */
-};
-
-/* The state of our finding algortihm */
-struct fdt_region_state {
-	struct fdt_subnode_stack stack[FDT_MAX_DEPTH];	/* node stack */
-	struct fdt_region *region;	/* Contains list of regions found */
-	int count;			/* Numnber of regions found */
-	const void *fdt;		/* FDT blob */
-	int max_regions;		/* Maximum regions to find */
-	int can_merge;		/* 1 if we can merge with previous region */
-	int start;			/* Start position of current region */
-	struct fdt_region_ptrs ptrs;	/* Pointers for what we are up to */
-};
-
-/**
- * fdt_find_regions() - find regions in device tree
- *
- * Given a list of nodes to include and properties to exclude, find
- * the regions of the device tree which describe those included parts.
- *
- * The intent is to get a list of regions which will be invariant provided
- * those parts are invariant. For example, if you request a list of regions
- * for all nodes but exclude the property "data", then you will get the
- * same region contents regardless of any change to "data" properties.
- *
- * This function can be used to produce a byte-stream to send to a hashing
- * function to verify that critical parts of the FDT have not changed.
- *
- * Nodes which are given in 'inc' are included in the region list, as
- * are the names of the immediate subnodes nodes (but not the properties
- * or subnodes of those subnodes).
- *
- * For eaxample "/" means to include the root node, all root properties
- * and the FDT_BEGIN_NODE and FDT_END_NODE of all subnodes of /. The latter
- * ensures that we capture the names of the subnodes. In a hashing situation
- * it prevents the root node from changing at all Any change to non-excluded
- * properties, names of subnodes or number of subnodes would be detected.
- *
- * When used with FITs this provides the ability to hash and sign parts of
- * the FIT based on different configurations in the FIT. Then it is
- * impossible to change anything about that configuration (include images
- * attached to the configuration), but it may be possible to add new
- * configurations, new images or new signatures within the existing
- * framework.
- *
- * Adding new properties to a device tree may result in the string table
- * being extended (if the new property names are different from those
- * already added). This function can optionally include a region for
- * the string table so that this can be part of the hash too.
- *
- * The device tree header is not included in the list.
- *
- * @fdt:	Device tree to check
- * @inc:	List of node paths to included
- * @inc_count:	Number of node paths in list
- * @exc_prop:	List of properties names to exclude
- * @exc_prop_count:	Number of properties in exclude list
- * @region:	Returns list of regions
- * @max_region:	Maximum length of region list
- * @path:	Pointer to a temporary string for the function to use for
- *		building path names
- * @path_len:	Length of path, must be large enough to hold the longest
- *		path in the tree
- * @add_string_tab:	1 to add a region for the string table
- * @return number of regions in list. If this is >max_regions then the
- * region array was exhausted. You should increase max_regions and try
- * the call again.
- */
-int fdt_find_regions(const void *fdt, char * const inc[], int inc_count,
-		     char * const exc_prop[], int exc_prop_count,
-		     struct fdt_region region[], int max_regions,
-		     char *path, int path_len, int add_string_tab);
-
-/**
- * fdt_first_region() - find regions in device tree
- *
- * Given a nodes and properties to include and properties to exclude, find
- * the regions of the device tree which describe those included parts.
- *
- * The use for this function is twofold. Firstly it provides a convenient
- * way of performing a structure-aware grep of the tree. For example it is
- * possible to grep for a node and get all the properties associated with
- * that node. Trees can be subsetted easily, by specifying the nodes that
- * are required, and then writing out the regions returned by this function.
- * This is useful for small resource-constrained systems, such as boot
- * loaders, which want to use an FDT but do not need to know about all of
- * it.
- *
- * Secondly it makes it easy to hash parts of the tree and detect changes.
- * The intent is to get a list of regions which will be invariant provided
- * those parts are invariant. For example, if you request a list of regions
- * for all nodes but exclude the property "data", then you will get the
- * same region contents regardless of any change to "data" properties.
- *
- * This function can be used to produce a byte-stream to send to a hashing
- * function to verify that critical parts of the FDT have not changed.
- * Note that semantically null changes in order could still cause false
- * hash misses. Such reordering might happen if the tree is regenerated
- * from source, and nodes are reordered (the bytes-stream will be emitted
- * in a different order and many hash functions will detect this). However
- * if an existing tree is modified using libfdt functions, such as
- * fdt_add_subnode() and fdt_setprop(), then this problem is avoided.
- *
- * The nodes/properties to include/exclude are defined by a function
- * provided by the caller. This function is called for each node and
- * property, and must return:
- *
- *    0 - to exclude this part
- *    1 - to include this part
- *   -1 - for FDT_IS_PROP only: no information is available, so include
- *		if its containing node is included
- *
- * The last case is only used to deal with properties. Often a property is
- * included if its containing node is included - this is the case where
- * -1 is returned.. However if the property is specifically required to be
- * included/excluded, then 0 or 1 can be returned. Note that including a
- * property when the FDT_REG_SUPERNODES flag is given will force its
- * containing node to be included since it is not valid to have a property
- * that is not in a node.
- *
- * Using the information provided, the inclusion of a node can be controlled
- * either by a node name or its compatible string, or any other property
- * that the function can determine.
- *
- * As an example, including node "/" means to include the root node and all
- * root properties. A flag provides a way of also including supernodes (of
- * which there is none for the root node), and another flag includes
- * immediate subnodes, so in this case we would get the FDT_BEGIN_NODE and
- * FDT_END_NODE of all subnodes of /.
- *
- * The subnode feature helps in a hashing situation since it prevents the
- * root node from changing at all. Any change to non-excluded properties,
- * names of subnodes or number of subnodes would be detected.
- *
- * When used with FITs this provides the ability to hash and sign parts of
- * the FIT based on different configurations in the FIT. Then it is
- * impossible to change anything about that configuration (include images
- * attached to the configuration), but it may be possible to add new
- * configurations, new images or new signatures within the existing
- * framework.
- *
- * Adding new properties to a device tree may result in the string table
- * being extended (if the new property names are different from those
- * already added). This function can optionally include a region for
- * the string table so that this can be part of the hash too. This is always
- * the last region.
- *
- * The FDT also has a mem_rsvmap table which can also be included, and is
- * always the first region if so.
- *
- * The device tree header is not included in the region list. Since the
- * contents of the FDT are changing (shrinking, often), the caller will need
- * to regenerate the header anyway.
- *
- * @fdt:	Device tree to check
- * @h_include:	Function to call to determine whether to include a part or
- *		not:
- *
- *		@priv: Private pointer as passed to fdt_find_regions()
- *		@fdt: Pointer to FDT blob
- *		@offset: Offset of this node / property
- *		@type: Type of this part, FDT_IS_...
- *		@data: Pointer to data (node name, property name, compatible
- *			string, value (not yet supported)
- *		@size: Size of data, or 0 if none
- *		@return 0 to exclude, 1 to include, -1 if no information is
- *		available
- * @priv:	Private pointer passed to h_include
- * @region:	Returns list of regions, sorted by offset
- * @max_regions: Maximum length of region list
- * @path:	Pointer to a temporary string for the function to use for
- *		building path names
- * @path_len:	Length of path, must be large enough to hold the longest
- *		path in the tree
- * @flags:	Various flags that control the region algortihm, see
- *		FDT_REG_...
- * @return number of regions in list. If this is >max_regions then the
- * region array was exhausted. You should increase max_regions and try
- * the call again. Only the first max_regions elements are available in the
- * array.
- *
- * On error a -ve value is return, which can be:
- *
- *	-FDT_ERR_BADSTRUCTURE (too deep or more END tags than BEGIN tags
- *	-FDT_ERR_BADLAYOUT
- *	-FDT_ERR_NOSPACE (path area is too small)
- */
-int fdt_first_region(const void *fdt,
-		     int (*h_include)(void *priv, const void *fdt, int offset,
-				      int type, const char *data, int size),
-		     void *priv, struct fdt_region *region,
-		     char *path, int path_len, int flags,
-		     struct fdt_region_state *info);
-
-/** fdt_next_region() - find next region
- *
- * See fdt_first_region() for full description. This function finds the
- * next region according to the provided parameters, which must be the same
- * as passed to fdt_first_region().
- *
- * This function can additionally return -FDT_ERR_NOTFOUND when there are no
- * more regions
- */
-int fdt_next_region(const void *fdt,
-		    int (*h_include)(void *priv, const void *fdt, int offset,
-				     int type, const char *data, int size),
-		    void *priv, struct fdt_region *region,
-		    char *path, int path_len, int flags,
-		    struct fdt_region_state *info);
-
-/**
- * fdt_add_alias_regions() - find aliases that point to existing regions
- *
- * Once a device tree grep is complete some of the nodes will be present
- * and some will have been dropped. This function checks all the alias nodes
- * to figure out which points point to nodes which are still present. These
- * aliases need to be kept, along with the nodes they reference.
- *
- * Given a list of regions function finds the aliases that still apply and
- * adds more regions to the list for these. This function is called after
- * fdt_next_region() has finished returning regions and requires the same
- * state.
- *
- * @fdt:	Device tree file to reference
- * @region:	List of regions that will be kept
- * @count:	Number of regions
- * @max_regions: Number of entries that can fit in @region
- * @info:	Region state as returned from fdt_next_region()
- * @return new number of regions in @region (i.e. count + the number added)
- * or -FDT_ERR_NOSPACE if there was not enough space.
- */
-int fdt_add_alias_regions(const void *fdt, struct fdt_region *region, int count,
-			  int max_regions, struct fdt_region_state *info);
-#endif /* SWIG */
-
-extern struct fdt_header *working_fdt;  /* Pointer to the working fdt */
-
-#endif /* UBOOT_LIBFDT_H */
diff --git a/include/libfdt_env.h b/include/libfdt_env.h
deleted file mode 100644
index d7e9d32863..0000000000
--- a/include/libfdt_env.h
+++ /dev/null
@@ -1,5 +0,0 @@
-#ifdef USE_HOSTCC
-#include "../scripts/dtc/libfdt/libfdt_env.h"
-#else
-#include <linux/libfdt_env.h>
-#endif
diff --git a/include/linux/libfdt.h b/include/linux/libfdt.h
index 2a663c6bb4..eeb2344971 100644
--- a/include/linux/libfdt.h
+++ b/include/linux/libfdt.h
@@ -1,17 +1,312 @@
-#ifndef _LIBFDT_ENV_H
-#define _LIBFDT_ENV_H
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef _INCLUDE_LIBFDT_H_
+#define _INCLUDE_LIBFDT_H_
 
-#include <linux/string.h>
+#ifndef USE_HOSTCC
+#include <linux/libfdt_env.h>
+#endif
+#include "../../scripts/dtc/libfdt/libfdt.h"
 
-#include <asm/byteorder.h>
+/* U-Boot local hacks */
 
-typedef __be16 fdt16_t;
-typedef __be32 fdt32_t;
-typedef __be64 fdt64_t;
+#ifndef SWIG /* Not available in Python */
+struct fdt_region {
+	int offset;
+	int size;
+};
 
-#define fdt32_to_cpu(x) be32_to_cpu(x)
-#define cpu_to_fdt32(x) cpu_to_be32(x)
-#define fdt64_to_cpu(x) be64_to_cpu(x)
-#define cpu_to_fdt64(x) cpu_to_be64(x)
+/*
+ * Flags for fdt_find_regions()
+ *
+ * Add a region for the string table (always the last region)
+ */
+#define FDT_REG_ADD_STRING_TAB		(1 << 0)
 
-#endif /* _LIBFDT_ENV_H */
+/*
+ * Add all supernodes of a matching node/property, useful for creating a
+ * valid subset tree
+ */
+#define FDT_REG_SUPERNODES		(1 << 1)
+
+/* Add the FDT_BEGIN_NODE tags of subnodes, including their names */
+#define FDT_REG_DIRECT_SUBNODES	(1 << 2)
+
+/* Add all subnodes of a matching node */
+#define FDT_REG_ALL_SUBNODES		(1 << 3)
+
+/* Add a region for the mem_rsvmap table (always the first region) */
+#define FDT_REG_ADD_MEM_RSVMAP		(1 << 4)
+
+/* Indicates what an fdt part is (node, property, value) */
+#define FDT_IS_NODE			(1 << 0)
+#define FDT_IS_PROP			(1 << 1)
+#define FDT_IS_VALUE			(1 << 2)	/* not supported */
+#define FDT_IS_COMPAT			(1 << 3)	/* used internally */
+#define FDT_NODE_HAS_PROP		(1 << 4)	/* node contains prop */
+
+#define FDT_ANY_GLOBAL		(FDT_IS_NODE | FDT_IS_PROP | FDT_IS_VALUE | \
+					FDT_IS_COMPAT)
+#define FDT_IS_ANY			0x1f		/* all the above */
+
+/* We set a reasonable limit on the number of nested nodes */
+#define FDT_MAX_DEPTH			32
+
+/* Decribes what we want to include from the current tag */
+enum want_t {
+	WANT_NOTHING,
+	WANT_NODES_ONLY,		/* No properties */
+	WANT_NODES_AND_PROPS,		/* Everything for one level */
+	WANT_ALL_NODES_AND_PROPS	/* Everything for all levels */
+};
+
+/* Keeps track of the state at parent nodes */
+struct fdt_subnode_stack {
+	int offset;		/* Offset of node */
+	enum want_t want;	/* The 'want' value here */
+	int included;		/* 1 if we included this node, 0 if not */
+};
+
+struct fdt_region_ptrs {
+	int depth;			/* Current tree depth */
+	int done;			/* What we have completed scanning */
+	enum want_t want;		/* What we are currently including */
+	char *end;			/* Pointer to end of full node path */
+	int nextoffset;			/* Next node offset to check */
+};
+
+/* The state of our finding algortihm */
+struct fdt_region_state {
+	struct fdt_subnode_stack stack[FDT_MAX_DEPTH];	/* node stack */
+	struct fdt_region *region;	/* Contains list of regions found */
+	int count;			/* Numnber of regions found */
+	const void *fdt;		/* FDT blob */
+	int max_regions;		/* Maximum regions to find */
+	int can_merge;		/* 1 if we can merge with previous region */
+	int start;			/* Start position of current region */
+	struct fdt_region_ptrs ptrs;	/* Pointers for what we are up to */
+};
+
+/**
+ * fdt_find_regions() - find regions in device tree
+ *
+ * Given a list of nodes to include and properties to exclude, find
+ * the regions of the device tree which describe those included parts.
+ *
+ * The intent is to get a list of regions which will be invariant provided
+ * those parts are invariant. For example, if you request a list of regions
+ * for all nodes but exclude the property "data", then you will get the
+ * same region contents regardless of any change to "data" properties.
+ *
+ * This function can be used to produce a byte-stream to send to a hashing
+ * function to verify that critical parts of the FDT have not changed.
+ *
+ * Nodes which are given in 'inc' are included in the region list, as
+ * are the names of the immediate subnodes nodes (but not the properties
+ * or subnodes of those subnodes).
+ *
+ * For eaxample "/" means to include the root node, all root properties
+ * and the FDT_BEGIN_NODE and FDT_END_NODE of all subnodes of /. The latter
+ * ensures that we capture the names of the subnodes. In a hashing situation
+ * it prevents the root node from changing at all Any change to non-excluded
+ * properties, names of subnodes or number of subnodes would be detected.
+ *
+ * When used with FITs this provides the ability to hash and sign parts of
+ * the FIT based on different configurations in the FIT. Then it is
+ * impossible to change anything about that configuration (include images
+ * attached to the configuration), but it may be possible to add new
+ * configurations, new images or new signatures within the existing
+ * framework.
+ *
+ * Adding new properties to a device tree may result in the string table
+ * being extended (if the new property names are different from those
+ * already added). This function can optionally include a region for
+ * the string table so that this can be part of the hash too.
+ *
+ * The device tree header is not included in the list.
+ *
+ * @fdt:	Device tree to check
+ * @inc:	List of node paths to included
+ * @inc_count:	Number of node paths in list
+ * @exc_prop:	List of properties names to exclude
+ * @exc_prop_count:	Number of properties in exclude list
+ * @region:	Returns list of regions
+ * @max_region:	Maximum length of region list
+ * @path:	Pointer to a temporary string for the function to use for
+ *		building path names
+ * @path_len:	Length of path, must be large enough to hold the longest
+ *		path in the tree
+ * @add_string_tab:	1 to add a region for the string table
+ * @return number of regions in list. If this is >max_regions then the
+ * region array was exhausted. You should increase max_regions and try
+ * the call again.
+ */
+int fdt_find_regions(const void *fdt, char * const inc[], int inc_count,
+		     char * const exc_prop[], int exc_prop_count,
+		     struct fdt_region region[], int max_regions,
+		     char *path, int path_len, int add_string_tab);
+
+/**
+ * fdt_first_region() - find regions in device tree
+ *
+ * Given a nodes and properties to include and properties to exclude, find
+ * the regions of the device tree which describe those included parts.
+ *
+ * The use for this function is twofold. Firstly it provides a convenient
+ * way of performing a structure-aware grep of the tree. For example it is
+ * possible to grep for a node and get all the properties associated with
+ * that node. Trees can be subsetted easily, by specifying the nodes that
+ * are required, and then writing out the regions returned by this function.
+ * This is useful for small resource-constrained systems, such as boot
+ * loaders, which want to use an FDT but do not need to know about all of
+ * it.
+ *
+ * Secondly it makes it easy to hash parts of the tree and detect changes.
+ * The intent is to get a list of regions which will be invariant provided
+ * those parts are invariant. For example, if you request a list of regions
+ * for all nodes but exclude the property "data", then you will get the
+ * same region contents regardless of any change to "data" properties.
+ *
+ * This function can be used to produce a byte-stream to send to a hashing
+ * function to verify that critical parts of the FDT have not changed.
+ * Note that semantically null changes in order could still cause false
+ * hash misses. Such reordering might happen if the tree is regenerated
+ * from source, and nodes are reordered (the bytes-stream will be emitted
+ * in a different order and many hash functions will detect this). However
+ * if an existing tree is modified using libfdt functions, such as
+ * fdt_add_subnode() and fdt_setprop(), then this problem is avoided.
+ *
+ * The nodes/properties to include/exclude are defined by a function
+ * provided by the caller. This function is called for each node and
+ * property, and must return:
+ *
+ *    0 - to exclude this part
+ *    1 - to include this part
+ *   -1 - for FDT_IS_PROP only: no information is available, so include
+ *		if its containing node is included
+ *
+ * The last case is only used to deal with properties. Often a property is
+ * included if its containing node is included - this is the case where
+ * -1 is returned.. However if the property is specifically required to be
+ * included/excluded, then 0 or 1 can be returned. Note that including a
+ * property when the FDT_REG_SUPERNODES flag is given will force its
+ * containing node to be included since it is not valid to have a property
+ * that is not in a node.
+ *
+ * Using the information provided, the inclusion of a node can be controlled
+ * either by a node name or its compatible string, or any other property
+ * that the function can determine.
+ *
+ * As an example, including node "/" means to include the root node and all
+ * root properties. A flag provides a way of also including supernodes (of
+ * which there is none for the root node), and another flag includes
+ * immediate subnodes, so in this case we would get the FDT_BEGIN_NODE and
+ * FDT_END_NODE of all subnodes of /.
+ *
+ * The subnode feature helps in a hashing situation since it prevents the
+ * root node from changing at all. Any change to non-excluded properties,
+ * names of subnodes or number of subnodes would be detected.
+ *
+ * When used with FITs this provides the ability to hash and sign parts of
+ * the FIT based on different configurations in the FIT. Then it is
+ * impossible to change anything about that configuration (include images
+ * attached to the configuration), but it may be possible to add new
+ * configurations, new images or new signatures within the existing
+ * framework.
+ *
+ * Adding new properties to a device tree may result in the string table
+ * being extended (if the new property names are different from those
+ * already added). This function can optionally include a region for
+ * the string table so that this can be part of the hash too. This is always
+ * the last region.
+ *
+ * The FDT also has a mem_rsvmap table which can also be included, and is
+ * always the first region if so.
+ *
+ * The device tree header is not included in the region list. Since the
+ * contents of the FDT are changing (shrinking, often), the caller will need
+ * to regenerate the header anyway.
+ *
+ * @fdt:	Device tree to check
+ * @h_include:	Function to call to determine whether to include a part or
+ *		not:
+ *
+ *		@priv: Private pointer as passed to fdt_find_regions()
+ *		@fdt: Pointer to FDT blob
+ *		@offset: Offset of this node / property
+ *		@type: Type of this part, FDT_IS_...
+ *		@data: Pointer to data (node name, property name, compatible
+ *			string, value (not yet supported)
+ *		@size: Size of data, or 0 if none
+ *		@return 0 to exclude, 1 to include, -1 if no information is
+ *		available
+ * @priv:	Private pointer passed to h_include
+ * @region:	Returns list of regions, sorted by offset
+ * @max_regions: Maximum length of region list
+ * @path:	Pointer to a temporary string for the function to use for
+ *		building path names
+ * @path_len:	Length of path, must be large enough to hold the longest
+ *		path in the tree
+ * @flags:	Various flags that control the region algortihm, see
+ *		FDT_REG_...
+ * @return number of regions in list. If this is >max_regions then the
+ * region array was exhausted. You should increase max_regions and try
+ * the call again. Only the first max_regions elements are available in the
+ * array.
+ *
+ * On error a -ve value is return, which can be:
+ *
+ *	-FDT_ERR_BADSTRUCTURE (too deep or more END tags than BEGIN tags
+ *	-FDT_ERR_BADLAYOUT
+ *	-FDT_ERR_NOSPACE (path area is too small)
+ */
+int fdt_first_region(const void *fdt,
+		     int (*h_include)(void *priv, const void *fdt, int offset,
+				      int type, const char *data, int size),
+		     void *priv, struct fdt_region *region,
+		     char *path, int path_len, int flags,
+		     struct fdt_region_state *info);
+
+/** fdt_next_region() - find next region
+ *
+ * See fdt_first_region() for full description. This function finds the
+ * next region according to the provided parameters, which must be the same
+ * as passed to fdt_first_region().
+ *
+ * This function can additionally return -FDT_ERR_NOTFOUND when there are no
+ * more regions
+ */
+int fdt_next_region(const void *fdt,
+		    int (*h_include)(void *priv, const void *fdt, int offset,
+				     int type, const char *data, int size),
+		    void *priv, struct fdt_region *region,
+		    char *path, int path_len, int flags,
+		    struct fdt_region_state *info);
+
+/**
+ * fdt_add_alias_regions() - find aliases that point to existing regions
+ *
+ * Once a device tree grep is complete some of the nodes will be present
+ * and some will have been dropped. This function checks all the alias nodes
+ * to figure out which points point to nodes which are still present. These
+ * aliases need to be kept, along with the nodes they reference.
+ *
+ * Given a list of regions function finds the aliases that still apply and
+ * adds more regions to the list for these. This function is called after
+ * fdt_next_region() has finished returning regions and requires the same
+ * state.
+ *
+ * @fdt:	Device tree file to reference
+ * @region:	List of regions that will be kept
+ * @count:	Number of regions
+ * @max_regions: Number of entries that can fit in @region
+ * @info:	Region state as returned from fdt_next_region()
+ * @return new number of regions in @region (i.e. count + the number added)
+ * or -FDT_ERR_NOSPACE if there was not enough space.
+ */
+int fdt_add_alias_regions(const void *fdt, struct fdt_region *region, int count,
+			  int max_regions, struct fdt_region_state *info);
+#endif /* SWIG */
+
+extern struct fdt_header *working_fdt;  /* Pointer to the working fdt */
+
+#endif /* _INCLUDE_LIBFDT_H_ */
diff --git a/include/linux/libfdt_env.h b/include/linux/libfdt_env.h
index 8178f9174b..0d209a6492 100644
--- a/include/linux/libfdt_env.h
+++ b/include/linux/libfdt_env.h
@@ -1,3 +1,11 @@
+#ifdef USE_HOSTCC
+#include "../scripts/dtc/libfdt/libfdt_env.h"
+#else
+/*
+ * This position of the include guard is intentional.
+ * Using the same guard name as that of scripts/dtc/libfdt/libfdt_env.h
+ * prevents it from being included.
+ */
 #ifndef _LIBFDT_ENV_H
 #define _LIBFDT_ENV_H
 
@@ -20,3 +28,4 @@ typedef __be64 fdt64_t;
 #define strtoul(cp, endp, base)	simple_strtoul(cp, endp, base)
 
 #endif /* _LIBFDT_ENV_H */
+#endif
diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c
index 43f32385fa..289ed4c95b 100644
--- a/lib/efi_loader/efi_boottime.c
+++ b/lib/efi_loader/efi_boottime.c
@@ -10,7 +10,7 @@
 #include <efi_loader.h>
 #include <malloc.h>
 #include <asm/global_data.h>
-#include <libfdt_env.h>
+#include <linux/libfdt_env.h>
 #include <u-boot/crc.h>
 #include <bootm.h>
 #include <inttypes.h>
diff --git a/lib/efi_loader/efi_memory.c b/lib/efi_loader/efi_memory.c
index 9e079f1fa3..402ab7fd56 100644
--- a/lib/efi_loader/efi_memory.c
+++ b/lib/efi_loader/efi_memory.c
@@ -10,7 +10,7 @@
 #include <efi_loader.h>
 #include <malloc.h>
 #include <asm/global_data.h>
-#include <libfdt_env.h>
+#include <linux/libfdt_env.h>
 #include <linux/list_sort.h>
 #include <inttypes.h>
 #include <watchdog.h>
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 5749d3510f..d06dbdf10b 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -11,7 +11,7 @@
 #include <errno.h>
 #include <fdtdec.h>
 #include <fdt_support.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <serial.h>
 #include <asm/sections.h>
 #include <linux/ctype.h>
diff --git a/lib/fdtdec_common.c b/lib/fdtdec_common.c
index 63b704a3d7..2d083418e0 100644
--- a/lib/fdtdec_common.c
+++ b/lib/fdtdec_common.c
@@ -10,7 +10,7 @@
 
 #ifndef USE_HOSTCC
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdtdec.h>
 #else
 #include "libfdt.h"
diff --git a/lib/fdtdec_test.c b/lib/fdtdec_test.c
index cc8b918f64..c51ffd7ecf 100644
--- a/lib/fdtdec_test.c
+++ b/lib/fdtdec_test.c
@@ -8,7 +8,7 @@
 
 #include <common.h>
 #include <fdtdec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <malloc.h>
 #include <os.h>
 
diff --git a/lib/libfdt/Makefile b/lib/libfdt/Makefile
index 4e3e12f505..edd8e64ce0 100644
--- a/lib/libfdt/Makefile
+++ b/lib/libfdt/Makefile
@@ -23,3 +23,5 @@ obj-y += fdt_ro.o
 
 # U-Boot own file
 obj-y += fdt_region.o
+
+ccflags-y := -I$(srctree)/scripts/dtc/libfdt
diff --git a/lib/libfdt/fdt_region.c b/lib/libfdt/fdt_region.c
index 5bfc4da370..70914a4e9b 100644
--- a/lib/libfdt/fdt_region.c
+++ b/lib/libfdt/fdt_region.c
@@ -5,11 +5,11 @@
  * SPDX-License-Identifier:	GPL-2.0+ BSD-2-Clause
  */
 
-#include <libfdt_env.h>
+#include <linux/libfdt_env.h>
 
 #ifndef USE_HOSTCC
 #include <fdt.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #else
 #include "fdt_host.h"
 #endif
diff --git a/lib/libfdt/fdt_ro.c b/lib/libfdt/fdt_ro.c
index 14ead04480..7bd7897fcb 100755
--- a/lib/libfdt/fdt_ro.c
+++ b/lib/libfdt/fdt_ro.c
@@ -3,11 +3,11 @@
  * Copyright (C) 2006 David Gibson, IBM Corporation.
  * SPDX-License-Identifier:	GPL-2.0+ BSD-2-Clause
  */
-#include <libfdt_env.h>
+#include <linux/libfdt_env.h>
 
 #ifndef USE_HOSTCC
 #include <fdt.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #else
 #include "fdt_host.h"
 #endif
diff --git a/lib/of_live.c b/lib/of_live.c
index f351483387..148865c967 100644
--- a/lib/of_live.c
+++ b/lib/of_live.c
@@ -10,7 +10,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <of_live.h>
 #include <malloc.h>
 #include <dm/of_access.h>
diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py
index dc9c0d9f45..c5767e5fb4 100644
--- a/tools/dtoc/dtb_platdata.py
+++ b/tools/dtoc/dtb_platdata.py
@@ -422,7 +422,7 @@ class DtbPlatdata(object):
         """
         self.out_header()
         self.out('#include <stdbool.h>\n')
-        self.out('#include <libfdt.h>\n')
+        self.out('#include <linux/libfdt.h>\n')
 
         # Output the struct definition
         for name in sorted(structs):
diff --git a/tools/dtoc/test_dtoc.py b/tools/dtoc/test_dtoc.py
index 41ed80e6da..0553b5cdf9 100644
--- a/tools/dtoc/test_dtoc.py
+++ b/tools/dtoc/test_dtoc.py
@@ -33,7 +33,7 @@ HEADER = '''/*
  */
 
 #include <stdbool.h>
-#include <libfdt.h>'''
+#include <linux/libfdt.h>'''
 
 C_HEADER = '''/*
  * DO NOT MODIFY
diff --git a/tools/fdt_host.h b/tools/fdt_host.h
index 8d4aa066bb..98acf278a3 100644
--- a/tools/fdt_host.h
+++ b/tools/fdt_host.h
@@ -8,7 +8,7 @@
 #define __FDT_HOST_H__
 
 /* Make sure to include u-boot version of libfdt include files */
-#include "../include/libfdt.h"
+#include "../include/linux/libfdt.h"
 #include "../include/fdt_support.h"
 
 /**
diff --git a/tools/ifdtool.c b/tools/ifdtool.c
index 729991ee33..e4c2f82c4a 100644
--- a/tools/ifdtool.c
+++ b/tools/ifdtool.c
@@ -19,7 +19,7 @@
 #include <unistd.h>
 #include <sys/types.h>
 #include <sys/stat.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include "ifdtool.h"
 
 #undef DEBUG

commit fe47e2a1d257ee323ae284b7ce3702ffe1a71621
Author: Paul Kocialkowski <contact@paulk.fr>
Date:   Fri Mar 2 23:13:42 2018 +0100

    UPSTREAM: tools: Include U-Boot libfdt headers from their actual path
    
    There are no headers for libfdt in lib/libfdt, as they are instead
    located in scripts/dtc/libfdt. Specifying lib/libfdt for headers
    inclusion in host tools results in using the system libfdt headers,
    which is not what we want. Change this to the proper path.
    
    Change-Id: I3ad1329f563d1083828ce168e2c4ee791b553da8
    Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/tools/Makefile b/tools/Makefile
index f3bf68204e..e4a18e37f6 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -255,7 +255,7 @@ endif # !LOGO_BMP
 #
 HOST_EXTRACFLAGS += -include $(srctree)/include/compiler.h \
 		$(patsubst -I%,-idirafter%, $(filter -I%, $(UBOOTINCLUDE))) \
-		-I$(srctree)/lib/libfdt \
+		-I$(srctree)/scripts/dtc/libfdt \
 		-I$(srctree)/tools \
 		-DUSE_HOSTCC \
 		-D__KERNEL_STRICT_NAMES \

commit 02f12fd1d34f4c2403586382be08bfe6208d4ada
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Sun Jan 21 19:19:17 2018 +0900

    UPSTREAM: libfdt: migrate libfdt.h to a wrapper + U-Boot own code
    
    There is tons of code duplication between lib/libfdt/libfdt.h and
    scripts/dtc/libfdt/libfdt.h.  Evacuate the U-Boot own code to
    include/libfdt.h and remove lib/libfdt/libfdt.h.
    
    For host tools, <libfdt.h> should include scripts/dtc/libfdt/libfdt.h,
    which is already suitable for user-space.
    
    For compiling U-Boot, <linux/libfdt.h> should be included because we
    need a different libfdt_env.h .
    
    Change-Id: I61a718a3fecb9f316cf3ddbac7c125394532a9c5
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/libfdt.h b/include/libfdt.h
index de5743bfa7..f0821d8a0e 100755
--- a/include/libfdt.h
+++ b/include/libfdt.h
@@ -4,8 +4,312 @@
  * SPDX-License-Identifier:     GPL-2.0+ BSD-2-Clause
  */
 
-#include "../lib/libfdt/libfdt.h"
+#ifdef USE_HOSTCC
+#include "../scripts/dtc/libfdt/libfdt.h"
+#else
+#include <linux/libfdt.h>
+#endif
 
-extern struct fdt_header *working_fdt;	/* Pointer to the working fdt */
+/* U-Boot local hacks */
+
+#ifndef SWIG /* Not available in Python */
+struct fdt_region {
+	int offset;
+	int size;
+};
+
+/*
+ * Flags for fdt_find_regions()
+ *
+ * Add a region for the string table (always the last region)
+ */
+#define FDT_REG_ADD_STRING_TAB		(1 << 0)
+
+/*
+ * Add all supernodes of a matching node/property, useful for creating a
+ * valid subset tree
+ */
+#define FDT_REG_SUPERNODES		(1 << 1)
+
+/* Add the FDT_BEGIN_NODE tags of subnodes, including their names */
+#define FDT_REG_DIRECT_SUBNODES	(1 << 2)
+
+/* Add all subnodes of a matching node */
+#define FDT_REG_ALL_SUBNODES		(1 << 3)
+
+/* Add a region for the mem_rsvmap table (always the first region) */
+#define FDT_REG_ADD_MEM_RSVMAP		(1 << 4)
+
+/* Indicates what an fdt part is (node, property, value) */
+#define FDT_IS_NODE			(1 << 0)
+#define FDT_IS_PROP			(1 << 1)
+#define FDT_IS_VALUE			(1 << 2)	/* not supported */
+#define FDT_IS_COMPAT			(1 << 3)	/* used internally */
+#define FDT_NODE_HAS_PROP		(1 << 4)	/* node contains prop */
+
+#define FDT_ANY_GLOBAL		(FDT_IS_NODE | FDT_IS_PROP | FDT_IS_VALUE | \
+					FDT_IS_COMPAT)
+#define FDT_IS_ANY			0x1f		/* all the above */
+
+/* We set a reasonable limit on the number of nested nodes */
+#define FDT_MAX_DEPTH			32
+
+/* Decribes what we want to include from the current tag */
+enum want_t {
+	WANT_NOTHING,
+	WANT_NODES_ONLY,		/* No properties */
+	WANT_NODES_AND_PROPS,		/* Everything for one level */
+	WANT_ALL_NODES_AND_PROPS	/* Everything for all levels */
+};
+
+/* Keeps track of the state at parent nodes */
+struct fdt_subnode_stack {
+	int offset;		/* Offset of node */
+	enum want_t want;	/* The 'want' value here */
+	int included;		/* 1 if we included this node, 0 if not */
+};
+
+struct fdt_region_ptrs {
+	int depth;			/* Current tree depth */
+	int done;			/* What we have completed scanning */
+	enum want_t want;		/* What we are currently including */
+	char *end;			/* Pointer to end of full node path */
+	int nextoffset;			/* Next node offset to check */
+};
+
+/* The state of our finding algortihm */
+struct fdt_region_state {
+	struct fdt_subnode_stack stack[FDT_MAX_DEPTH];	/* node stack */
+	struct fdt_region *region;	/* Contains list of regions found */
+	int count;			/* Numnber of regions found */
+	const void *fdt;		/* FDT blob */
+	int max_regions;		/* Maximum regions to find */
+	int can_merge;		/* 1 if we can merge with previous region */
+	int start;			/* Start position of current region */
+	struct fdt_region_ptrs ptrs;	/* Pointers for what we are up to */
+};
+
+/**
+ * fdt_find_regions() - find regions in device tree
+ *
+ * Given a list of nodes to include and properties to exclude, find
+ * the regions of the device tree which describe those included parts.
+ *
+ * The intent is to get a list of regions which will be invariant provided
+ * those parts are invariant. For example, if you request a list of regions
+ * for all nodes but exclude the property "data", then you will get the
+ * same region contents regardless of any change to "data" properties.
+ *
+ * This function can be used to produce a byte-stream to send to a hashing
+ * function to verify that critical parts of the FDT have not changed.
+ *
+ * Nodes which are given in 'inc' are included in the region list, as
+ * are the names of the immediate subnodes nodes (but not the properties
+ * or subnodes of those subnodes).
+ *
+ * For eaxample "/" means to include the root node, all root properties
+ * and the FDT_BEGIN_NODE and FDT_END_NODE of all subnodes of /. The latter
+ * ensures that we capture the names of the subnodes. In a hashing situation
+ * it prevents the root node from changing at all Any change to non-excluded
+ * properties, names of subnodes or number of subnodes would be detected.
+ *
+ * When used with FITs this provides the ability to hash and sign parts of
+ * the FIT based on different configurations in the FIT. Then it is
+ * impossible to change anything about that configuration (include images
+ * attached to the configuration), but it may be possible to add new
+ * configurations, new images or new signatures within the existing
+ * framework.
+ *
+ * Adding new properties to a device tree may result in the string table
+ * being extended (if the new property names are different from those
+ * already added). This function can optionally include a region for
+ * the string table so that this can be part of the hash too.
+ *
+ * The device tree header is not included in the list.
+ *
+ * @fdt:	Device tree to check
+ * @inc:	List of node paths to included
+ * @inc_count:	Number of node paths in list
+ * @exc_prop:	List of properties names to exclude
+ * @exc_prop_count:	Number of properties in exclude list
+ * @region:	Returns list of regions
+ * @max_region:	Maximum length of region list
+ * @path:	Pointer to a temporary string for the function to use for
+ *		building path names
+ * @path_len:	Length of path, must be large enough to hold the longest
+ *		path in the tree
+ * @add_string_tab:	1 to add a region for the string table
+ * @return number of regions in list. If this is >max_regions then the
+ * region array was exhausted. You should increase max_regions and try
+ * the call again.
+ */
+int fdt_find_regions(const void *fdt, char * const inc[], int inc_count,
+		     char * const exc_prop[], int exc_prop_count,
+		     struct fdt_region region[], int max_regions,
+		     char *path, int path_len, int add_string_tab);
+
+/**
+ * fdt_first_region() - find regions in device tree
+ *
+ * Given a nodes and properties to include and properties to exclude, find
+ * the regions of the device tree which describe those included parts.
+ *
+ * The use for this function is twofold. Firstly it provides a convenient
+ * way of performing a structure-aware grep of the tree. For example it is
+ * possible to grep for a node and get all the properties associated with
+ * that node. Trees can be subsetted easily, by specifying the nodes that
+ * are required, and then writing out the regions returned by this function.
+ * This is useful for small resource-constrained systems, such as boot
+ * loaders, which want to use an FDT but do not need to know about all of
+ * it.
+ *
+ * Secondly it makes it easy to hash parts of the tree and detect changes.
+ * The intent is to get a list of regions which will be invariant provided
+ * those parts are invariant. For example, if you request a list of regions
+ * for all nodes but exclude the property "data", then you will get the
+ * same region contents regardless of any change to "data" properties.
+ *
+ * This function can be used to produce a byte-stream to send to a hashing
+ * function to verify that critical parts of the FDT have not changed.
+ * Note that semantically null changes in order could still cause false
+ * hash misses. Such reordering might happen if the tree is regenerated
+ * from source, and nodes are reordered (the bytes-stream will be emitted
+ * in a different order and many hash functions will detect this). However
+ * if an existing tree is modified using libfdt functions, such as
+ * fdt_add_subnode() and fdt_setprop(), then this problem is avoided.
+ *
+ * The nodes/properties to include/exclude are defined by a function
+ * provided by the caller. This function is called for each node and
+ * property, and must return:
+ *
+ *    0 - to exclude this part
+ *    1 - to include this part
+ *   -1 - for FDT_IS_PROP only: no information is available, so include
+ *		if its containing node is included
+ *
+ * The last case is only used to deal with properties. Often a property is
+ * included if its containing node is included - this is the case where
+ * -1 is returned.. However if the property is specifically required to be
+ * included/excluded, then 0 or 1 can be returned. Note that including a
+ * property when the FDT_REG_SUPERNODES flag is given will force its
+ * containing node to be included since it is not valid to have a property
+ * that is not in a node.
+ *
+ * Using the information provided, the inclusion of a node can be controlled
+ * either by a node name or its compatible string, or any other property
+ * that the function can determine.
+ *
+ * As an example, including node "/" means to include the root node and all
+ * root properties. A flag provides a way of also including supernodes (of
+ * which there is none for the root node), and another flag includes
+ * immediate subnodes, so in this case we would get the FDT_BEGIN_NODE and
+ * FDT_END_NODE of all subnodes of /.
+ *
+ * The subnode feature helps in a hashing situation since it prevents the
+ * root node from changing at all. Any change to non-excluded properties,
+ * names of subnodes or number of subnodes would be detected.
+ *
+ * When used with FITs this provides the ability to hash and sign parts of
+ * the FIT based on different configurations in the FIT. Then it is
+ * impossible to change anything about that configuration (include images
+ * attached to the configuration), but it may be possible to add new
+ * configurations, new images or new signatures within the existing
+ * framework.
+ *
+ * Adding new properties to a device tree may result in the string table
+ * being extended (if the new property names are different from those
+ * already added). This function can optionally include a region for
+ * the string table so that this can be part of the hash too. This is always
+ * the last region.
+ *
+ * The FDT also has a mem_rsvmap table which can also be included, and is
+ * always the first region if so.
+ *
+ * The device tree header is not included in the region list. Since the
+ * contents of the FDT are changing (shrinking, often), the caller will need
+ * to regenerate the header anyway.
+ *
+ * @fdt:	Device tree to check
+ * @h_include:	Function to call to determine whether to include a part or
+ *		not:
+ *
+ *		@priv: Private pointer as passed to fdt_find_regions()
+ *		@fdt: Pointer to FDT blob
+ *		@offset: Offset of this node / property
+ *		@type: Type of this part, FDT_IS_...
+ *		@data: Pointer to data (node name, property name, compatible
+ *			string, value (not yet supported)
+ *		@size: Size of data, or 0 if none
+ *		@return 0 to exclude, 1 to include, -1 if no information is
+ *		available
+ * @priv:	Private pointer passed to h_include
+ * @region:	Returns list of regions, sorted by offset
+ * @max_regions: Maximum length of region list
+ * @path:	Pointer to a temporary string for the function to use for
+ *		building path names
+ * @path_len:	Length of path, must be large enough to hold the longest
+ *		path in the tree
+ * @flags:	Various flags that control the region algortihm, see
+ *		FDT_REG_...
+ * @return number of regions in list. If this is >max_regions then the
+ * region array was exhausted. You should increase max_regions and try
+ * the call again. Only the first max_regions elements are available in the
+ * array.
+ *
+ * On error a -ve value is return, which can be:
+ *
+ *	-FDT_ERR_BADSTRUCTURE (too deep or more END tags than BEGIN tags
+ *	-FDT_ERR_BADLAYOUT
+ *	-FDT_ERR_NOSPACE (path area is too small)
+ */
+int fdt_first_region(const void *fdt,
+		     int (*h_include)(void *priv, const void *fdt, int offset,
+				      int type, const char *data, int size),
+		     void *priv, struct fdt_region *region,
+		     char *path, int path_len, int flags,
+		     struct fdt_region_state *info);
+
+/** fdt_next_region() - find next region
+ *
+ * See fdt_first_region() for full description. This function finds the
+ * next region according to the provided parameters, which must be the same
+ * as passed to fdt_first_region().
+ *
+ * This function can additionally return -FDT_ERR_NOTFOUND when there are no
+ * more regions
+ */
+int fdt_next_region(const void *fdt,
+		    int (*h_include)(void *priv, const void *fdt, int offset,
+				     int type, const char *data, int size),
+		    void *priv, struct fdt_region *region,
+		    char *path, int path_len, int flags,
+		    struct fdt_region_state *info);
+
+/**
+ * fdt_add_alias_regions() - find aliases that point to existing regions
+ *
+ * Once a device tree grep is complete some of the nodes will be present
+ * and some will have been dropped. This function checks all the alias nodes
+ * to figure out which points point to nodes which are still present. These
+ * aliases need to be kept, along with the nodes they reference.
+ *
+ * Given a list of regions function finds the aliases that still apply and
+ * adds more regions to the list for these. This function is called after
+ * fdt_next_region() has finished returning regions and requires the same
+ * state.
+ *
+ * @fdt:	Device tree file to reference
+ * @region:	List of regions that will be kept
+ * @count:	Number of regions
+ * @max_regions: Number of entries that can fit in @region
+ * @info:	Region state as returned from fdt_next_region()
+ * @return new number of regions in @region (i.e. count + the number added)
+ * or -FDT_ERR_NOSPACE if there was not enough space.
+ */
+int fdt_add_alias_regions(const void *fdt, struct fdt_region *region, int count,
+			  int max_regions, struct fdt_region_state *info);
+#endif /* SWIG */
+
+extern struct fdt_header *working_fdt;  /* Pointer to the working fdt */
 
 #endif /* UBOOT_LIBFDT_H */
diff --git a/lib/libfdt/libfdt.h b/lib/libfdt/libfdt.h
deleted file mode 100644
index cb533f4275..0000000000
--- a/lib/libfdt/libfdt.h
+++ /dev/null
@@ -1,2192 +0,0 @@
-#ifndef _LIBFDT_H
-#define _LIBFDT_H
-/*
- * libfdt - Flat Device Tree manipulation
- * Copyright (C) 2006 David Gibson, IBM Corporation.
- *
- * SPDX-License-Identifier:     GPL-2.0+ BSD-2-Clause
- */
-
-#include <libfdt_env.h>
-#include <fdt.h>
-
-#define FDT_FIRST_SUPPORTED_VERSION	0x10
-#define FDT_LAST_SUPPORTED_VERSION	0x11
-
-/* Error codes: informative error codes */
-#define FDT_ERR_NOTFOUND	1
-	/* FDT_ERR_NOTFOUND: The requested node or property does not exist */
-#define FDT_ERR_EXISTS		2
-	/* FDT_ERR_EXISTS: Attempted to create a node or property which
-	 * already exists */
-#define FDT_ERR_NOSPACE		3
-	/* FDT_ERR_NOSPACE: Operation needed to expand the device
-	 * tree, but its buffer did not have sufficient space to
-	 * contain the expanded tree. Use fdt_open_into() to move the
-	 * device tree to a buffer with more space. */
-
-/* Error codes: codes for bad parameters */
-#define FDT_ERR_BADOFFSET	4
-	/* FDT_ERR_BADOFFSET: Function was passed a structure block
-	 * offset which is out-of-bounds, or which points to an
-	 * unsuitable part of the structure for the operation. */
-#define FDT_ERR_BADPATH		5
-	/* FDT_ERR_BADPATH: Function was passed a badly formatted path
-	 * (e.g. missing a leading / for a function which requires an
-	 * absolute path) */
-#define FDT_ERR_BADPHANDLE	6
-	/* FDT_ERR_BADPHANDLE: Function was passed an invalid phandle.
-	 * This can be caused either by an invalid phandle property
-	 * length, or the phandle value was either 0 or -1, which are
-	 * not permitted. */
-#define FDT_ERR_BADSTATE	7
-	/* FDT_ERR_BADSTATE: Function was passed an incomplete device
-	 * tree created by the sequential-write functions, which is
-	 * not sufficiently complete for the requested operation. */
-
-/* Error codes: codes for bad device tree blobs */
-#define FDT_ERR_TRUNCATED	8
-	/* FDT_ERR_TRUNCATED: Structure block of the given device tree
-	 * ends without an FDT_END tag. */
-#define FDT_ERR_BADMAGIC	9
-	/* FDT_ERR_BADMAGIC: Given "device tree" appears not to be a
-	 * device tree at all - it is missing the flattened device
-	 * tree magic number. */
-#define FDT_ERR_BADVERSION	10
-	/* FDT_ERR_BADVERSION: Given device tree has a version which
-	 * can't be handled by the requested operation.  For
-	 * read-write functions, this may mean that fdt_open_into() is
-	 * required to convert the tree to the expected version. */
-#define FDT_ERR_BADSTRUCTURE	11
-	/* FDT_ERR_BADSTRUCTURE: Given device tree has a corrupt
-	 * structure block or other serious error (e.g. misnested
-	 * nodes, or subnodes preceding properties). */
-#define FDT_ERR_BADLAYOUT	12
-	/* FDT_ERR_BADLAYOUT: For read-write functions, the given
-	 * device tree has it's sub-blocks in an order that the
-	 * function can't handle (memory reserve map, then structure,
-	 * then strings).  Use fdt_open_into() to reorganize the tree
-	 * into a form suitable for the read-write operations. */
-
-/* "Can't happen" error indicating a bug in libfdt */
-#define FDT_ERR_INTERNAL	13
-	/* FDT_ERR_INTERNAL: libfdt has failed an internal assertion.
-	 * Should never be returned, if it is, it indicates a bug in
-	 * libfdt itself. */
-
-/* Errors in device tree content */
-#define FDT_ERR_BADNCELLS	14
-	/* FDT_ERR_BADNCELLS: Device tree has a #address-cells, #size-cells
-	 * or similar property with a bad format or value */
-
-#define FDT_ERR_BADVALUE	15
-	/* FDT_ERR_BADVALUE: Device tree has a property with an unexpected
-	 * value. For example: a property expected to contain a string list
-	 * is not NUL-terminated within the length of its value. */
-
-#define FDT_ERR_BADOVERLAY	16
-	/* FDT_ERR_BADOVERLAY: The device tree overlay, while
-	 * correctly structured, cannot be applied due to some
-	 * unexpected or missing value, property or node. */
-
-#define FDT_ERR_NOPHANDLES	17
-	/* FDT_ERR_NOPHANDLES: The device tree doesn't have any
-	 * phandle available anymore without causing an overflow */
-
-#define FDT_ERR_MAX		17
-
-/**********************************************************************/
-/* Low-level functions (you probably don't need these)                */
-/**********************************************************************/
-
-#ifndef SWIG /* This function is not useful in Python */
-const void *fdt_offset_ptr(const void *fdt, int offset, unsigned int checklen);
-#endif
-static inline void *fdt_offset_ptr_w(void *fdt, int offset, int checklen)
-{
-	return (void *)(uintptr_t)fdt_offset_ptr(fdt, offset, checklen);
-}
-
-uint32_t fdt_next_tag(const void *fdt, int offset, int *nextoffset);
-
-/**********************************************************************/
-/* Traversal functions                                                */
-/**********************************************************************/
-
-int fdt_next_node(const void *fdt, int offset, int *depth);
-
-/**
- * fdt_first_subnode() - get offset of first direct subnode
- *
- * @fdt:	FDT blob
- * @offset:	Offset of node to check
- * @return offset of first subnode, or -FDT_ERR_NOTFOUND if there is none
- */
-int fdt_first_subnode(const void *fdt, int offset);
-
-/**
- * fdt_next_subnode() - get offset of next direct subnode
- *
- * After first calling fdt_first_subnode(), call this function repeatedly to
- * get direct subnodes of a parent node.
- *
- * @fdt:	FDT blob
- * @offset:	Offset of previous subnode
- * @return offset of next subnode, or -FDT_ERR_NOTFOUND if there are no more
- * subnodes
- */
-int fdt_next_subnode(const void *fdt, int offset);
-
-/**
- * fdt_for_each_subnode - iterate over all subnodes of a parent
- *
- * @node:	child node (int, lvalue)
- * @fdt:	FDT blob (const void *)
- * @parent:	parent node (int)
- *
- * This is actually a wrapper around a for loop and would be used like so:
- *
- *	fdt_for_each_subnode(node, fdt, parent) {
- *		Use node
- *		...
- *	}
- *
- *	if ((node < 0) && (node != -FDT_ERR_NOT_FOUND)) {
- *		Error handling
- *	}
- *
- * Note that this is implemented as a macro and @node is used as
- * iterator in the loop. The parent variable be constant or even a
- * literal.
- *
- */
-#define fdt_for_each_subnode(node, fdt, parent)		\
-	for (node = fdt_first_subnode(fdt, parent);	\
-	     node >= 0;					\
-	     node = fdt_next_subnode(fdt, node))
-
-/**********************************************************************/
-/* General functions                                                  */
-/**********************************************************************/
-#define fdt_get_header(fdt, field) \
-	(fdt32_to_cpu(((const struct fdt_header *)(fdt))->field))
-#define fdt_magic(fdt)			(fdt_get_header(fdt, magic))
-#define fdt_totalsize(fdt)		(fdt_get_header(fdt, totalsize))
-#define fdt_off_dt_struct(fdt)		(fdt_get_header(fdt, off_dt_struct))
-#define fdt_off_dt_strings(fdt)		(fdt_get_header(fdt, off_dt_strings))
-#define fdt_off_mem_rsvmap(fdt)		(fdt_get_header(fdt, off_mem_rsvmap))
-#define fdt_version(fdt)		(fdt_get_header(fdt, version))
-#define fdt_last_comp_version(fdt)	(fdt_get_header(fdt, last_comp_version))
-#define fdt_boot_cpuid_phys(fdt)	(fdt_get_header(fdt, boot_cpuid_phys))
-#define fdt_size_dt_strings(fdt)	(fdt_get_header(fdt, size_dt_strings))
-#define fdt_size_dt_struct(fdt)		(fdt_get_header(fdt, size_dt_struct))
-
-#define __fdt_set_hdr(name) \
-	static inline void fdt_set_##name(void *fdt, uint32_t val) \
-	{ \
-		struct fdt_header *fdth = (struct fdt_header *)fdt; \
-		fdth->name = cpu_to_fdt32(val); \
-	}
-__fdt_set_hdr(magic);
-__fdt_set_hdr(totalsize);
-__fdt_set_hdr(off_dt_struct);
-__fdt_set_hdr(off_dt_strings);
-__fdt_set_hdr(off_mem_rsvmap);
-__fdt_set_hdr(version);
-__fdt_set_hdr(last_comp_version);
-__fdt_set_hdr(boot_cpuid_phys);
-__fdt_set_hdr(size_dt_strings);
-__fdt_set_hdr(size_dt_struct);
-#undef __fdt_set_hdr
-
-/**
- * fdt_check_header - sanity check a device tree or possible device tree
- * @fdt: pointer to data which might be a flattened device tree
- *
- * fdt_check_header() checks that the given buffer contains what
- * appears to be a flattened device tree with sane information in its
- * header.
- *
- * returns:
- *     0, if the buffer appears to contain a valid device tree
- *     -FDT_ERR_BADMAGIC,
- *     -FDT_ERR_BADVERSION,
- *     -FDT_ERR_BADSTATE, standard meanings, as above
- */
-int fdt_check_header(const void *fdt);
-
-/**
- * fdt_move - move a device tree around in memory
- * @fdt: pointer to the device tree to move
- * @buf: pointer to memory where the device is to be moved
- * @bufsize: size of the memory space at buf
- *
- * fdt_move() relocates, if possible, the device tree blob located at
- * fdt to the buffer at buf of size bufsize.  The buffer may overlap
- * with the existing device tree blob at fdt.  Therefore,
- *     fdt_move(fdt, fdt, fdt_totalsize(fdt))
- * should always succeed.
- *
- * returns:
- *     0, on success
- *     -FDT_ERR_NOSPACE, bufsize is insufficient to contain the device tree
- *     -FDT_ERR_BADMAGIC,
- *     -FDT_ERR_BADVERSION,
- *     -FDT_ERR_BADSTATE, standard meanings
- */
-int fdt_move(const void *fdt, void *buf, int bufsize);
-
-/**********************************************************************/
-/* Read-only functions                                                */
-/**********************************************************************/
-
-/**
- * fdt_string - retrieve a string from the strings block of a device tree
- * @fdt: pointer to the device tree blob
- * @stroffset: offset of the string within the strings block (native endian)
- *
- * fdt_string() retrieves a pointer to a single string from the
- * strings block of the device tree blob at fdt.
- *
- * returns:
- *     a pointer to the string, on success
- *     NULL, if stroffset is out of bounds
- */
-const char *fdt_string(const void *fdt, int stroffset);
-
-/**
- * fdt_get_max_phandle - retrieves the highest phandle in a tree
- * @fdt: pointer to the device tree blob
- *
- * fdt_get_max_phandle retrieves the highest phandle in the given
- * device tree. This will ignore badly formatted phandles, or phandles
- * with a value of 0 or -1.
- *
- * returns:
- *      the highest phandle on success
- *      0, if no phandle was found in the device tree
- *      -1, if an error occurred
- */
-uint32_t fdt_get_max_phandle(const void *fdt);
-
-/**
- * fdt_num_mem_rsv - retrieve the number of memory reserve map entries
- * @fdt: pointer to the device tree blob
- *
- * Returns the number of entries in the device tree blob's memory
- * reservation map.  This does not include the terminating 0,0 entry
- * or any other (0,0) entries reserved for expansion.
- *
- * returns:
- *     the number of entries
- */
-int fdt_num_mem_rsv(const void *fdt);
-
-/**
- * fdt_get_mem_rsv - retrieve one memory reserve map entry
- * @fdt: pointer to the device tree blob
- * @address, @size: pointers to 64-bit variables
- *
- * On success, *address and *size will contain the address and size of
- * the n-th reserve map entry from the device tree blob, in
- * native-endian format.
- *
- * returns:
- *     0, on success
- *     -FDT_ERR_BADMAGIC,
- *     -FDT_ERR_BADVERSION,
- *     -FDT_ERR_BADSTATE, standard meanings
- */
-int fdt_get_mem_rsv(const void *fdt, int n, uint64_t *address, uint64_t *size);
-
-/**
- * fdt_subnode_offset_namelen - find a subnode based on substring
- * @fdt: pointer to the device tree blob
- * @parentoffset: structure block offset of a node
- * @name: name of the subnode to locate
- * @namelen: number of characters of name to consider
- *
- * Identical to fdt_subnode_offset(), but only examine the first
- * namelen characters of name for matching the subnode name.  This is
- * useful for finding subnodes based on a portion of a larger string,
- * such as a full path.
- */
-#ifndef SWIG /* Not available in Python */
-int fdt_subnode_offset_namelen(const void *fdt, int parentoffset,
-			       const char *name, int namelen);
-#endif
-/**
- * fdt_subnode_offset - find a subnode of a given node
- * @fdt: pointer to the device tree blob
- * @parentoffset: structure block offset of a node
- * @name: name of the subnode to locate
- *
- * fdt_subnode_offset() finds a subnode of the node at structure block
- * offset parentoffset with the given name.  name may include a unit
- * address, in which case fdt_subnode_offset() will find the subnode
- * with that unit address, or the unit address may be omitted, in
- * which case fdt_subnode_offset() will find an arbitrary subnode
- * whose name excluding unit address matches the given name.
- *
- * returns:
- *	structure block offset of the requested subnode (>=0), on success
- *	-FDT_ERR_NOTFOUND, if the requested subnode does not exist
- *	-FDT_ERR_BADOFFSET, if parentoffset did not point to an FDT_BEGIN_NODE
- *		tag
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_TRUNCATED, standard meanings.
- */
-int fdt_subnode_offset(const void *fdt, int parentoffset, const char *name);
-
-/**
- * fdt_path_offset_namelen - find a tree node by its full path
- * @fdt: pointer to the device tree blob
- * @path: full path of the node to locate
- * @namelen: number of characters of path to consider
- *
- * Identical to fdt_path_offset(), but only consider the first namelen
- * characters of path as the path name.
- */
-#ifndef SWIG /* Not available in Python */
-int fdt_path_offset_namelen(const void *fdt, const char *path, int namelen);
-#endif
-
-/**
- * fdt_path_offset - find a tree node by its full path
- * @fdt: pointer to the device tree blob
- * @path: full path of the node to locate
- *
- * fdt_path_offset() finds a node of a given path in the device tree.
- * Each path component may omit the unit address portion, but the
- * results of this are undefined if any such path component is
- * ambiguous (that is if there are multiple nodes at the relevant
- * level matching the given component, differentiated only by unit
- * address).
- *
- * returns:
- *	structure block offset of the node with the requested path (>=0), on
- *		success
- *	-FDT_ERR_BADPATH, given path does not begin with '/' or is invalid
- *	-FDT_ERR_NOTFOUND, if the requested node does not exist
- *      -FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_TRUNCATED, standard meanings.
- */
-int fdt_path_offset(const void *fdt, const char *path);
-
-/**
- * fdt_get_name - retrieve the name of a given node
- * @fdt: pointer to the device tree blob
- * @nodeoffset: structure block offset of the starting node
- * @lenp: pointer to an integer variable (will be overwritten) or NULL
- *
- * fdt_get_name() retrieves the name (including unit address) of the
- * device tree node at structure block offset nodeoffset.  If lenp is
- * non-NULL, the length of this name is also returned, in the integer
- * pointed to by lenp.
- *
- * returns:
- *	pointer to the node's name, on success
- *		If lenp is non-NULL, *lenp contains the length of that name
- *			(>=0)
- *	NULL, on error
- *		if lenp is non-NULL *lenp contains an error code (<0):
- *		-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE
- *			tag
- *		-FDT_ERR_BADMAGIC,
- *		-FDT_ERR_BADVERSION,
- *		-FDT_ERR_BADSTATE, standard meanings
- */
-const char *fdt_get_name(const void *fdt, int nodeoffset, int *lenp);
-
-/**
- * fdt_first_property_offset - find the offset of a node's first property
- * @fdt: pointer to the device tree blob
- * @nodeoffset: structure block offset of a node
- *
- * fdt_first_property_offset() finds the first property of the node at
- * the given structure block offset.
- *
- * returns:
- *	structure block offset of the property (>=0), on success
- *	-FDT_ERR_NOTFOUND, if the requested node has no properties
- *	-FDT_ERR_BADOFFSET, if nodeoffset did not point to an FDT_BEGIN_NODE tag
- *      -FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_TRUNCATED, standard meanings.
- */
-int fdt_first_property_offset(const void *fdt, int nodeoffset);
-
-/**
- * fdt_next_property_offset - step through a node's properties
- * @fdt: pointer to the device tree blob
- * @offset: structure block offset of a property
- *
- * fdt_next_property_offset() finds the property immediately after the
- * one at the given structure block offset.  This will be a property
- * of the same node as the given property.
- *
- * returns:
- *	structure block offset of the next property (>=0), on success
- *	-FDT_ERR_NOTFOUND, if the given property is the last in its node
- *	-FDT_ERR_BADOFFSET, if nodeoffset did not point to an FDT_PROP tag
- *      -FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_TRUNCATED, standard meanings.
- */
-int fdt_next_property_offset(const void *fdt, int offset);
-
-/**
- * fdt_for_each_property_offset - iterate over all properties of a node
- *
- * @property_offset:	property offset (int, lvalue)
- * @fdt:		FDT blob (const void *)
- * @node:		node offset (int)
- *
- * This is actually a wrapper around a for loop and would be used like so:
- *
- *	fdt_for_each_property_offset(property, fdt, node) {
- *		Use property
- *		...
- *	}
- *
- *	if ((property < 0) && (property != -FDT_ERR_NOT_FOUND)) {
- *		Error handling
- *	}
- *
- * Note that this is implemented as a macro and property is used as
- * iterator in the loop. The node variable can be constant or even a
- * literal.
- */
-#define fdt_for_each_property_offset(property, fdt, node)	\
-	for (property = fdt_first_property_offset(fdt, node);	\
-	     property >= 0;					\
-	     property = fdt_next_property_offset(fdt, property))
-
-/**
- * fdt_get_property_by_offset - retrieve the property at a given offset
- * @fdt: pointer to the device tree blob
- * @offset: offset of the property to retrieve
- * @lenp: pointer to an integer variable (will be overwritten) or NULL
- *
- * fdt_get_property_by_offset() retrieves a pointer to the
- * fdt_property structure within the device tree blob at the given
- * offset.  If lenp is non-NULL, the length of the property value is
- * also returned, in the integer pointed to by lenp.
- *
- * returns:
- *	pointer to the structure representing the property
- *		if lenp is non-NULL, *lenp contains the length of the property
- *		value (>=0)
- *	NULL, on error
- *		if lenp is non-NULL, *lenp contains an error code (<0):
- *		-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_PROP tag
- *		-FDT_ERR_BADMAGIC,
- *		-FDT_ERR_BADVERSION,
- *		-FDT_ERR_BADSTATE,
- *		-FDT_ERR_BADSTRUCTURE,
- *		-FDT_ERR_TRUNCATED, standard meanings
- */
-const struct fdt_property *fdt_get_property_by_offset(const void *fdt,
-						      int offset,
-						      int *lenp);
-
-/**
- * fdt_get_property_namelen - find a property based on substring
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose property to find
- * @name: name of the property to find
- * @namelen: number of characters of name to consider
- * @lenp: pointer to an integer variable (will be overwritten) or NULL
- *
- * Identical to fdt_get_property(), but only examine the first namelen
- * characters of name for matching the property name.
- */
-#ifndef SWIG /* Not available in Python */
-const struct fdt_property *fdt_get_property_namelen(const void *fdt,
-						    int nodeoffset,
-						    const char *name,
-						    int namelen, int *lenp);
-#endif
-
-/**
- * fdt_get_property - find a given property in a given node
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose property to find
- * @name: name of the property to find
- * @lenp: pointer to an integer variable (will be overwritten) or NULL
- *
- * fdt_get_property() retrieves a pointer to the fdt_property
- * structure within the device tree blob corresponding to the property
- * named 'name' of the node at offset nodeoffset.  If lenp is
- * non-NULL, the length of the property value is also returned, in the
- * integer pointed to by lenp.
- *
- * returns:
- *	pointer to the structure representing the property
- *		if lenp is non-NULL, *lenp contains the length of the property
- *		value (>=0)
- *	NULL, on error
- *		if lenp is non-NULL, *lenp contains an error code (<0):
- *		-FDT_ERR_NOTFOUND, node does not have named property
- *		-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE
- *			tag
- *		-FDT_ERR_BADMAGIC,
- *		-FDT_ERR_BADVERSION,
- *		-FDT_ERR_BADSTATE,
- *		-FDT_ERR_BADSTRUCTURE,
- *		-FDT_ERR_TRUNCATED, standard meanings
- */
-const struct fdt_property *fdt_get_property(const void *fdt, int nodeoffset,
-					    const char *name, int *lenp);
-static inline struct fdt_property *fdt_get_property_w(void *fdt, int nodeoffset,
-						      const char *name,
-						      int *lenp)
-{
-	return (struct fdt_property *)(uintptr_t)
-		fdt_get_property(fdt, nodeoffset, name, lenp);
-}
-
-/**
- * fdt_getprop_by_offset - retrieve the value of a property at a given offset
- * @fdt: pointer to the device tree blob
- * @ffset: offset of the property to read
- * @namep: pointer to a string variable (will be overwritten) or NULL
- * @lenp: pointer to an integer variable (will be overwritten) or NULL
- *
- * fdt_getprop_by_offset() retrieves a pointer to the value of the
- * property at structure block offset 'offset' (this will be a pointer
- * to within the device blob itself, not a copy of the value).  If
- * lenp is non-NULL, the length of the property value is also
- * returned, in the integer pointed to by lenp.  If namep is non-NULL,
- * the property's namne will also be returned in the char * pointed to
- * by namep (this will be a pointer to within the device tree's string
- * block, not a new copy of the name).
- *
- * returns:
- *	pointer to the property's value
- *		if lenp is non-NULL, *lenp contains the length of the property
- *		value (>=0)
- *		if namep is non-NULL *namep contiains a pointer to the property
- *		name.
- *	NULL, on error
- *		if lenp is non-NULL, *lenp contains an error code (<0):
- *		-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_PROP tag
- *		-FDT_ERR_BADMAGIC,
- *		-FDT_ERR_BADVERSION,
- *		-FDT_ERR_BADSTATE,
- *		-FDT_ERR_BADSTRUCTURE,
- *		-FDT_ERR_TRUNCATED, standard meanings
- */
-#ifndef SWIG /* This function is not useful in Python */
-const void *fdt_getprop_by_offset(const void *fdt, int offset,
-				  const char **namep, int *lenp);
-#endif
-
-/**
- * fdt_getprop_namelen - get property value based on substring
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose property to find
- * @name: name of the property to find
- * @namelen: number of characters of name to consider
- * @lenp: pointer to an integer variable (will be overwritten) or NULL
- *
- * Identical to fdt_getprop(), but only examine the first namelen
- * characters of name for matching the property name.
- */
-#ifndef SWIG /* Not available in Python */
-const void *fdt_getprop_namelen(const void *fdt, int nodeoffset,
-				const char *name, int namelen, int *lenp);
-static inline void *fdt_getprop_namelen_w(void *fdt, int nodeoffset,
-					  const char *name, int namelen,
-					  int *lenp)
-{
-	return (void *)(uintptr_t)fdt_getprop_namelen(fdt, nodeoffset, name,
-						      namelen, lenp);
-}
-#endif
-
-/**
- * fdt_getprop - retrieve the value of a given property
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose property to find
- * @name: name of the property to find
- * @lenp: pointer to an integer variable (will be overwritten) or NULL
- *
- * fdt_getprop() retrieves a pointer to the value of the property
- * named 'name' of the node at offset nodeoffset (this will be a
- * pointer to within the device blob itself, not a copy of the value).
- * If lenp is non-NULL, the length of the property value is also
- * returned, in the integer pointed to by lenp.
- *
- * returns:
- *	pointer to the property's value
- *		if lenp is non-NULL, *lenp contains the length of the property
- *		value (>=0)
- *	NULL, on error
- *		if lenp is non-NULL, *lenp contains an error code (<0):
- *		-FDT_ERR_NOTFOUND, node does not have named property
- *		-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE
- *			tag
- *		-FDT_ERR_BADMAGIC,
- *		-FDT_ERR_BADVERSION,
- *		-FDT_ERR_BADSTATE,
- *		-FDT_ERR_BADSTRUCTURE,
- *		-FDT_ERR_TRUNCATED, standard meanings
- */
-const void *fdt_getprop(const void *fdt, int nodeoffset,
-			const char *name, int *lenp);
-static inline void *fdt_getprop_w(void *fdt, int nodeoffset,
-				  const char *name, int *lenp)
-{
-	return (void *)(uintptr_t)fdt_getprop(fdt, nodeoffset, name, lenp);
-}
-
-/**
- * fdt_get_phandle - retrieve the phandle of a given node
- * @fdt: pointer to the device tree blob
- * @nodeoffset: structure block offset of the node
- *
- * fdt_get_phandle() retrieves the phandle of the device tree node at
- * structure block offset nodeoffset.
- *
- * returns:
- *	the phandle of the node at nodeoffset, on success (!= 0, != -1)
- *	0, if the node has no phandle, or another error occurs
- */
-uint32_t fdt_get_phandle(const void *fdt, int nodeoffset);
-
-/**
- * fdt_get_alias_namelen - get alias based on substring
- * @fdt: pointer to the device tree blob
- * @name: name of the alias th look up
- * @namelen: number of characters of name to consider
- *
- * Identical to fdt_get_alias(), but only examine the first namelen
- * characters of name for matching the alias name.
- */
-#ifndef SWIG /* Not available in Python */
-const char *fdt_get_alias_namelen(const void *fdt,
-				  const char *name, int namelen);
-#endif
-
-/**
- * fdt_get_alias - retrieve the path referenced by a given alias
- * @fdt: pointer to the device tree blob
- * @name: name of the alias th look up
- *
- * fdt_get_alias() retrieves the value of a given alias.  That is, the
- * value of the property named 'name' in the node /aliases.
- *
- * returns:
- *	a pointer to the expansion of the alias named 'name', if it exists
- *	NULL, if the given alias or the /aliases node does not exist
- */
-const char *fdt_get_alias(const void *fdt, const char *name);
-
-/**
- * fdt_get_path - determine the full path of a node
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose path to find
- * @buf: character buffer to contain the returned path (will be overwritten)
- * @buflen: size of the character buffer at buf
- *
- * fdt_get_path() computes the full path of the node at offset
- * nodeoffset, and records that path in the buffer at buf.
- *
- * NOTE: This function is expensive, as it must scan the device tree
- * structure from the start to nodeoffset.
- *
- * returns:
- *	0, on success
- *		buf contains the absolute path of the node at
- *		nodeoffset, as a NUL-terminated string.
- *	-FDT_ERR_BADOFFSET, nodeoffset does not refer to a BEGIN_NODE tag
- *	-FDT_ERR_NOSPACE, the path of the given node is longer than (bufsize-1)
- *		characters and will not fit in the given buffer.
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE, standard meanings
- */
-int fdt_get_path(const void *fdt, int nodeoffset, char *buf, int buflen);
-
-/**
- * fdt_supernode_atdepth_offset - find a specific ancestor of a node
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose parent to find
- * @supernodedepth: depth of the ancestor to find
- * @nodedepth: pointer to an integer variable (will be overwritten) or NULL
- *
- * fdt_supernode_atdepth_offset() finds an ancestor of the given node
- * at a specific depth from the root (where the root itself has depth
- * 0, its immediate subnodes depth 1 and so forth).  So
- *	fdt_supernode_atdepth_offset(fdt, nodeoffset, 0, NULL);
- * will always return 0, the offset of the root node.  If the node at
- * nodeoffset has depth D, then:
- *	fdt_supernode_atdepth_offset(fdt, nodeoffset, D, NULL);
- * will return nodeoffset itself.
- *
- * NOTE: This function is expensive, as it must scan the device tree
- * structure from the start to nodeoffset.
- *
- * returns:
- *	structure block offset of the node at node offset's ancestor
- *		of depth supernodedepth (>=0), on success
- *	-FDT_ERR_BADOFFSET, nodeoffset does not refer to a BEGIN_NODE tag
- *	-FDT_ERR_NOTFOUND, supernodedepth was greater than the depth of
- *		nodeoffset
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE, standard meanings
- */
-int fdt_supernode_atdepth_offset(const void *fdt, int nodeoffset,
-				 int supernodedepth, int *nodedepth);
-
-/**
- * fdt_node_depth - find the depth of a given node
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose parent to find
- *
- * fdt_node_depth() finds the depth of a given node.  The root node
- * has depth 0, its immediate subnodes depth 1 and so forth.
- *
- * NOTE: This function is expensive, as it must scan the device tree
- * structure from the start to nodeoffset.
- *
- * returns:
- *	depth of the node at nodeoffset (>=0), on success
- *	-FDT_ERR_BADOFFSET, nodeoffset does not refer to a BEGIN_NODE tag
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE, standard meanings
- */
-int fdt_node_depth(const void *fdt, int nodeoffset);
-
-/**
- * fdt_parent_offset - find the parent of a given node
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose parent to find
- *
- * fdt_parent_offset() locates the parent node of a given node (that
- * is, it finds the offset of the node which contains the node at
- * nodeoffset as a subnode).
- *
- * NOTE: This function is expensive, as it must scan the device tree
- * structure from the start to nodeoffset, *twice*.
- *
- * returns:
- *	structure block offset of the parent of the node at nodeoffset
- *		(>=0), on success
- *	-FDT_ERR_BADOFFSET, nodeoffset does not refer to a BEGIN_NODE tag
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE, standard meanings
- */
-int fdt_parent_offset(const void *fdt, int nodeoffset);
-
-/**
- * fdt_node_offset_by_prop_value - find nodes with a given property value
- * @fdt: pointer to the device tree blob
- * @startoffset: only find nodes after this offset
- * @propname: property name to check
- * @propval: property value to search for
- * @proplen: length of the value in propval
- *
- * fdt_node_offset_by_prop_value() returns the offset of the first
- * node after startoffset, which has a property named propname whose
- * value is of length proplen and has value equal to propval; or if
- * startoffset is -1, the very first such node in the tree.
- *
- * To iterate through all nodes matching the criterion, the following
- * idiom can be used:
- *	offset = fdt_node_offset_by_prop_value(fdt, -1, propname,
- *					       propval, proplen);
- *	while (offset != -FDT_ERR_NOTFOUND) {
- *		// other code here
- *		offset = fdt_node_offset_by_prop_value(fdt, offset, propname,
- *						       propval, proplen);
- *	}
- *
- * Note the -1 in the first call to the function, if 0 is used here
- * instead, the function will never locate the root node, even if it
- * matches the criterion.
- *
- * returns:
- *	structure block offset of the located node (>= 0, >startoffset),
- *		 on success
- *	-FDT_ERR_NOTFOUND, no node matching the criterion exists in the
- *		tree after startoffset
- *	-FDT_ERR_BADOFFSET, nodeoffset does not refer to a BEGIN_NODE tag
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE, standard meanings
- */
-int fdt_node_offset_by_prop_value(const void *fdt, int startoffset,
-				  const char *propname,
-				  const void *propval, int proplen);
-
-/**
- * fdt_node_offset_by_phandle - find the node with a given phandle
- * @fdt: pointer to the device tree blob
- * @phandle: phandle value
- *
- * fdt_node_offset_by_phandle() returns the offset of the node
- * which has the given phandle value.  If there is more than one node
- * in the tree with the given phandle (an invalid tree), results are
- * undefined.
- *
- * returns:
- *	structure block offset of the located node (>= 0), on success
- *	-FDT_ERR_NOTFOUND, no node with that phandle exists
- *	-FDT_ERR_BADPHANDLE, given phandle value was invalid (0 or -1)
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE, standard meanings
- */
-int fdt_node_offset_by_phandle(const void *fdt, uint32_t phandle);
-
-/**
- * fdt_node_check_compatible: check a node's compatible property
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of a tree node
- * @compatible: string to match against
- *
- *
- * fdt_node_check_compatible() returns 0 if the given node contains a
- * 'compatible' property with the given string as one of its elements,
- * it returns non-zero otherwise, or on error.
- *
- * returns:
- *	0, if the node has a 'compatible' property listing the given string
- *	1, if the node has a 'compatible' property, but it does not list
- *		the given string
- *	-FDT_ERR_NOTFOUND, if the given node has no 'compatible' property
- *	-FDT_ERR_BADOFFSET, if nodeoffset does not refer to a BEGIN_NODE tag
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE, standard meanings
- */
-int fdt_node_check_compatible(const void *fdt, int nodeoffset,
-			      const char *compatible);
-
-/**
- * fdt_node_offset_by_compatible - find nodes with a given 'compatible' value
- * @fdt: pointer to the device tree blob
- * @startoffset: only find nodes after this offset
- * @compatible: 'compatible' string to match against
- *
- * fdt_node_offset_by_compatible() returns the offset of the first
- * node after startoffset, which has a 'compatible' property which
- * lists the given compatible string; or if startoffset is -1, the
- * very first such node in the tree.
- *
- * To iterate through all nodes matching the criterion, the following
- * idiom can be used:
- *	offset = fdt_node_offset_by_compatible(fdt, -1, compatible);
- *	while (offset != -FDT_ERR_NOTFOUND) {
- *		// other code here
- *		offset = fdt_node_offset_by_compatible(fdt, offset, compatible);
- *	}
- *
- * Note the -1 in the first call to the function, if 0 is used here
- * instead, the function will never locate the root node, even if it
- * matches the criterion.
- *
- * returns:
- *	structure block offset of the located node (>= 0, >startoffset),
- *		 on success
- *	-FDT_ERR_NOTFOUND, no node matching the criterion exists in the
- *		tree after startoffset
- *	-FDT_ERR_BADOFFSET, nodeoffset does not refer to a BEGIN_NODE tag
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE, standard meanings
- */
-int fdt_node_offset_by_compatible(const void *fdt, int startoffset,
-				  const char *compatible);
-
-/**
- * fdt_stringlist_contains - check a string list property for a string
- * @strlist: Property containing a list of strings to check
- * @listlen: Length of property
- * @str: String to search for
- *
- * This is a utility function provided for convenience. The list contains
- * one or more strings, each terminated by \0, as is found in a device tree
- * "compatible" property.
- *
- * @return: 1 if the string is found in the list, 0 not found, or invalid list
- */
-int fdt_stringlist_contains(const char *strlist, int listlen, const char *str);
-
-/**
- * fdt_stringlist_count - count the number of strings in a string list
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of a tree node
- * @property: name of the property containing the string list
- * @return:
- *   the number of strings in the given property
- *   -FDT_ERR_BADVALUE if the property value is not NUL-terminated
- *   -FDT_ERR_NOTFOUND if the property does not exist
- */
-int fdt_stringlist_count(const void *fdt, int nodeoffset, const char *property);
-
-/**
- * fdt_stringlist_search - find a string in a string list and return its index
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of a tree node
- * @property: name of the property containing the string list
- * @string: string to look up in the string list
- *
- * Note that it is possible for this function to succeed on property values
- * that are not NUL-terminated. That's because the function will stop after
- * finding the first occurrence of @string. This can for example happen with
- * small-valued cell properties, such as #address-cells, when searching for
- * the empty string.
- *
- * @return:
- *   the index of the string in the list of strings
- *   -FDT_ERR_BADVALUE if the property value is not NUL-terminated
- *   -FDT_ERR_NOTFOUND if the property does not exist or does not contain
- *                     the given string
- */
-int fdt_stringlist_search(const void *fdt, int nodeoffset, const char *property,
-			  const char *string);
-
-/**
- * fdt_stringlist_get() - obtain the string at a given index in a string list
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of a tree node
- * @property: name of the property containing the string list
- * @index: index of the string to return
- * @lenp: return location for the string length or an error code on failure
- *
- * Note that this will successfully extract strings from properties with
- * non-NUL-terminated values. For example on small-valued cell properties
- * this function will return the empty string.
- *
- * If non-NULL, the length of the string (on success) or a negative error-code
- * (on failure) will be stored in the integer pointer to by lenp.
- *
- * @return:
- *   A pointer to the string at the given index in the string list or NULL on
- *   failure. On success the length of the string will be stored in the memory
- *   location pointed to by the lenp parameter, if non-NULL. On failure one of
- *   the following negative error codes will be returned in the lenp parameter
- *   (if non-NULL):
- *     -FDT_ERR_BADVALUE if the property value is not NUL-terminated
- *     -FDT_ERR_NOTFOUND if the property does not exist
- */
-const char *fdt_stringlist_get(const void *fdt, int nodeoffset,
-			       const char *property, int index,
-			       int *lenp);
-
-/**********************************************************************/
-/* Read-only functions (addressing related)                           */
-/**********************************************************************/
-
-/**
- * FDT_MAX_NCELLS - maximum value for #address-cells and #size-cells
- *
- * This is the maximum value for #address-cells, #size-cells and
- * similar properties that will be processed by libfdt.  IEE1275
- * requires that OF implementations handle values up to 4.
- * Implementations may support larger values, but in practice higher
- * values aren't used.
- */
-#define FDT_MAX_NCELLS		4
-
-/**
- * fdt_address_cells - retrieve address size for a bus represented in the tree
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node to find the address size for
- *
- * When the node has a valid #address-cells property, returns its value.
- *
- * returns:
- *	0 <= n < FDT_MAX_NCELLS, on success
- *      2, if the node has no #address-cells property
- *      -FDT_ERR_BADNCELLS, if the node has a badly formatted or invalid
- *		#address-cells property
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_TRUNCATED, standard meanings
- */
-int fdt_address_cells(const void *fdt, int nodeoffset);
-
-/**
- * fdt_size_cells - retrieve address range size for a bus represented in the
- *                  tree
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node to find the address range size for
- *
- * When the node has a valid #size-cells property, returns its value.
- *
- * returns:
- *	0 <= n < FDT_MAX_NCELLS, on success
- *      2, if the node has no #address-cells property
- *      -FDT_ERR_BADNCELLS, if the node has a badly formatted or invalid
- *		#size-cells property
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_TRUNCATED, standard meanings
- */
-int fdt_size_cells(const void *fdt, int nodeoffset);
-
-
-/**********************************************************************/
-/* Write-in-place functions                                           */
-/**********************************************************************/
-
-/**
- * fdt_setprop_inplace_namelen_partial - change a property's value,
- *                                       but not its size
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose property to change
- * @name: name of the property to change
- * @namelen: number of characters of name to consider
- * @idx: index of the property to change in the array
- * @val: pointer to data to replace the property value with
- * @len: length of the property value
- *
- * Identical to fdt_setprop_inplace(), but modifies the given property
- * starting from the given index, and using only the first characters
- * of the name. It is useful when you want to manipulate only one value of
- * an array and you have a string that doesn't end with \0.
- */
-#ifndef SWIG /* Not available in Python */
-int fdt_setprop_inplace_namelen_partial(void *fdt, int nodeoffset,
-					const char *name, int namelen,
-					uint32_t idx, const void *val,
-					int len);
-#endif
-
-/**
- * fdt_setprop_inplace - change a property's value, but not its size
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose property to change
- * @name: name of the property to change
- * @val: pointer to data to replace the property value with
- * @len: length of the property value
- *
- * fdt_setprop_inplace() replaces the value of a given property with
- * the data in val, of length len.  This function cannot change the
- * size of a property, and so will only work if len is equal to the
- * current length of the property.
- *
- * This function will alter only the bytes in the blob which contain
- * the given property value, and will not alter or move any other part
- * of the tree.
- *
- * returns:
- *	0, on success
- *	-FDT_ERR_NOSPACE, if len is not equal to the property's current length
- *	-FDT_ERR_NOTFOUND, node does not have the named property
- *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_TRUNCATED, standard meanings
- */
-#ifndef SWIG /* Not available in Python */
-int fdt_setprop_inplace(void *fdt, int nodeoffset, const char *name,
-			const void *val, int len);
-#endif
-
-/**
- * fdt_setprop_inplace_u32 - change the value of a 32-bit integer property
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose property to change
- * @name: name of the property to change
- * @val: 32-bit integer value to replace the property with
- *
- * fdt_setprop_inplace_u32() replaces the value of a given property
- * with the 32-bit integer value in val, converting val to big-endian
- * if necessary.  This function cannot change the size of a property,
- * and so will only work if the property already exists and has length
- * 4.
- *
- * This function will alter only the bytes in the blob which contain
- * the given property value, and will not alter or move any other part
- * of the tree.
- *
- * returns:
- *	0, on success
- *	-FDT_ERR_NOSPACE, if the property's length is not equal to 4
- *	-FDT_ERR_NOTFOUND, node does not have the named property
- *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_TRUNCATED, standard meanings
- */
-static inline int fdt_setprop_inplace_u32(void *fdt, int nodeoffset,
-					  const char *name, uint32_t val)
-{
-	fdt32_t tmp = cpu_to_fdt32(val);
-	return fdt_setprop_inplace(fdt, nodeoffset, name, &tmp, sizeof(tmp));
-}
-
-/**
- * fdt_setprop_inplace_u64 - change the value of a 64-bit integer property
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose property to change
- * @name: name of the property to change
- * @val: 64-bit integer value to replace the property with
- *
- * fdt_setprop_inplace_u64() replaces the value of a given property
- * with the 64-bit integer value in val, converting val to big-endian
- * if necessary.  This function cannot change the size of a property,
- * and so will only work if the property already exists and has length
- * 8.
- *
- * This function will alter only the bytes in the blob which contain
- * the given property value, and will not alter or move any other part
- * of the tree.
- *
- * returns:
- *	0, on success
- *	-FDT_ERR_NOSPACE, if the property's length is not equal to 8
- *	-FDT_ERR_NOTFOUND, node does not have the named property
- *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_TRUNCATED, standard meanings
- */
-static inline int fdt_setprop_inplace_u64(void *fdt, int nodeoffset,
-					  const char *name, uint64_t val)
-{
-	fdt64_t tmp = cpu_to_fdt64(val);
-	return fdt_setprop_inplace(fdt, nodeoffset, name, &tmp, sizeof(tmp));
-}
-
-/**
- * fdt_setprop_inplace_cell - change the value of a single-cell property
- *
- * This is an alternative name for fdt_setprop_inplace_u32()
- */
-static inline int fdt_setprop_inplace_cell(void *fdt, int nodeoffset,
-					   const char *name, uint32_t val)
-{
-	return fdt_setprop_inplace_u32(fdt, nodeoffset, name, val);
-}
-
-/**
- * fdt_nop_property - replace a property with nop tags
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose property to nop
- * @name: name of the property to nop
- *
- * fdt_nop_property() will replace a given property's representation
- * in the blob with FDT_NOP tags, effectively removing it from the
- * tree.
- *
- * This function will alter only the bytes in the blob which contain
- * the property, and will not alter or move any other part of the
- * tree.
- *
- * returns:
- *	0, on success
- *	-FDT_ERR_NOTFOUND, node does not have the named property
- *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_TRUNCATED, standard meanings
- */
-int fdt_nop_property(void *fdt, int nodeoffset, const char *name);
-
-/**
- * fdt_nop_node - replace a node (subtree) with nop tags
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node to nop
- *
- * fdt_nop_node() will replace a given node's representation in the
- * blob, including all its subnodes, if any, with FDT_NOP tags,
- * effectively removing it from the tree.
- *
- * This function will alter only the bytes in the blob which contain
- * the node and its properties and subnodes, and will not alter or
- * move any other part of the tree.
- *
- * returns:
- *	0, on success
- *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_TRUNCATED, standard meanings
- */
-int fdt_nop_node(void *fdt, int nodeoffset);
-
-/**********************************************************************/
-/* Sequential write functions                                         */
-/**********************************************************************/
-
-int fdt_create(void *buf, int bufsize);
-int fdt_resize(void *fdt, void *buf, int bufsize);
-int fdt_add_reservemap_entry(void *fdt, uint64_t addr, uint64_t size);
-int fdt_finish_reservemap(void *fdt);
-int fdt_begin_node(void *fdt, const char *name);
-int fdt_property(void *fdt, const char *name, const void *val, int len);
-static inline int fdt_property_u32(void *fdt, const char *name, uint32_t val)
-{
-	fdt32_t tmp = cpu_to_fdt32(val);
-	return fdt_property(fdt, name, &tmp, sizeof(tmp));
-}
-static inline int fdt_property_u64(void *fdt, const char *name, uint64_t val)
-{
-	fdt64_t tmp = cpu_to_fdt64(val);
-	return fdt_property(fdt, name, &tmp, sizeof(tmp));
-}
-static inline int fdt_property_cell(void *fdt, const char *name, uint32_t val)
-{
-	return fdt_property_u32(fdt, name, val);
-}
-
-/**
- * fdt_property_placeholder - add a new property and return a ptr to its value
- *
- * @fdt: pointer to the device tree blob
- * @name: name of property to add
- * @len: length of property value in bytes
- * @valp: returns a pointer to where where the value should be placed
- *
- * returns:
- *	0, on success
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_NOSPACE, standard meanings
- */
-int fdt_property_placeholder(void *fdt, const char *name, int len, void **valp);
-
-#define fdt_property_string(fdt, name, str) \
-	fdt_property(fdt, name, str, strlen(str)+1)
-int fdt_end_node(void *fdt);
-int fdt_finish(void *fdt);
-
-/**********************************************************************/
-/* Read-write functions                                               */
-/**********************************************************************/
-
-int fdt_create_empty_tree(void *buf, int bufsize);
-int fdt_open_into(const void *fdt, void *buf, int bufsize);
-int fdt_pack(void *fdt);
-
-/**
- * fdt_add_mem_rsv - add one memory reserve map entry
- * @fdt: pointer to the device tree blob
- * @address, @size: 64-bit values (native endian)
- *
- * Adds a reserve map entry to the given blob reserving a region at
- * address address of length size.
- *
- * This function will insert data into the reserve map and will
- * therefore change the indexes of some entries in the table.
- *
- * returns:
- *	0, on success
- *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
- *		contain the new reservation entry
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_TRUNCATED, standard meanings
- */
-int fdt_add_mem_rsv(void *fdt, uint64_t address, uint64_t size);
-
-/**
- * fdt_del_mem_rsv - remove a memory reserve map entry
- * @fdt: pointer to the device tree blob
- * @n: entry to remove
- *
- * fdt_del_mem_rsv() removes the n-th memory reserve map entry from
- * the blob.
- *
- * This function will delete data from the reservation table and will
- * therefore change the indexes of some entries in the table.
- *
- * returns:
- *	0, on success
- *	-FDT_ERR_NOTFOUND, there is no entry of the given index (i.e. there
- *		are less than n+1 reserve map entries)
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_TRUNCATED, standard meanings
- */
-int fdt_del_mem_rsv(void *fdt, int n);
-
-/**
- * fdt_set_name - change the name of a given node
- * @fdt: pointer to the device tree blob
- * @nodeoffset: structure block offset of a node
- * @name: name to give the node
- *
- * fdt_set_name() replaces the name (including unit address, if any)
- * of the given node with the given string.  NOTE: this function can't
- * efficiently check if the new name is unique amongst the given
- * node's siblings; results are undefined if this function is invoked
- * with a name equal to one of the given node's siblings.
- *
- * This function may insert or delete data from the blob, and will
- * therefore change the offsets of some existing nodes.
- *
- * returns:
- *	0, on success
- *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob
- *		to contain the new name
- *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE, standard meanings
- */
-int fdt_set_name(void *fdt, int nodeoffset, const char *name);
-
-/**
- * fdt_setprop - create or change a property
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose property to change
- * @name: name of the property to change
- * @val: pointer to data to set the property value to
- * @len: length of the property value
- *
- * fdt_setprop() sets the value of the named property in the given
- * node to the given value and length, creating the property if it
- * does not already exist.
- *
- * This function may insert or delete data from the blob, and will
- * therefore change the offsets of some existing nodes.
- *
- * returns:
- *	0, on success
- *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
- *		contain the new property value
- *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_TRUNCATED, standard meanings
- */
-int fdt_setprop(void *fdt, int nodeoffset, const char *name,
-		const void *val, int len);
-
-/**
- * fdt_setprop _placeholder - allocate space for a property
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose property to change
- * @name: name of the property to change
- * @len: length of the property value
- * @prop_data: return pointer to property data
- *
- * fdt_setprop_placeholer() allocates the named property in the given node.
- * If the property exists it is resized. In either case a pointer to the
- * property data is returned.
- *
- * This function may insert or delete data from the blob, and will
- * therefore change the offsets of some existing nodes.
- *
- * returns:
- *	0, on success
- *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
- *		contain the new property value
- *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_TRUNCATED, standard meanings
- */
-int fdt_setprop_placeholder(void *fdt, int nodeoffset, const char *name,
-			    int len, void **prop_data);
-
-/**
- * fdt_setprop_u32 - set a property to a 32-bit integer
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose property to change
- * @name: name of the property to change
- * @val: 32-bit integer value for the property (native endian)
- *
- * fdt_setprop_u32() sets the value of the named property in the given
- * node to the given 32-bit integer value (converting to big-endian if
- * necessary), or creates a new property with that value if it does
- * not already exist.
- *
- * This function may insert or delete data from the blob, and will
- * therefore change the offsets of some existing nodes.
- *
- * returns:
- *	0, on success
- *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
- *		contain the new property value
- *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_TRUNCATED, standard meanings
- */
-static inline int fdt_setprop_u32(void *fdt, int nodeoffset, const char *name,
-				  uint32_t val)
-{
-	fdt32_t tmp = cpu_to_fdt32(val);
-	return fdt_setprop(fdt, nodeoffset, name, &tmp, sizeof(tmp));
-}
-
-/**
- * fdt_setprop_u64 - set a property to a 64-bit integer
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose property to change
- * @name: name of the property to change
- * @val: 64-bit integer value for the property (native endian)
- *
- * fdt_setprop_u64() sets the value of the named property in the given
- * node to the given 64-bit integer value (converting to big-endian if
- * necessary), or creates a new property with that value if it does
- * not already exist.
- *
- * This function may insert or delete data from the blob, and will
- * therefore change the offsets of some existing nodes.
- *
- * returns:
- *	0, on success
- *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
- *		contain the new property value
- *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_TRUNCATED, standard meanings
- */
-static inline int fdt_setprop_u64(void *fdt, int nodeoffset, const char *name,
-				  uint64_t val)
-{
-	fdt64_t tmp = cpu_to_fdt64(val);
-	return fdt_setprop(fdt, nodeoffset, name, &tmp, sizeof(tmp));
-}
-
-/**
- * fdt_setprop_cell - set a property to a single cell value
- *
- * This is an alternative name for fdt_setprop_u32()
- */
-static inline int fdt_setprop_cell(void *fdt, int nodeoffset, const char *name,
-				   uint32_t val)
-{
-	return fdt_setprop_u32(fdt, nodeoffset, name, val);
-}
-
-/**
- * fdt_setprop_string - set a property to a string value
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose property to change
- * @name: name of the property to change
- * @str: string value for the property
- *
- * fdt_setprop_string() sets the value of the named property in the
- * given node to the given string value (using the length of the
- * string to determine the new length of the property), or creates a
- * new property with that value if it does not already exist.
- *
- * This function may insert or delete data from the blob, and will
- * therefore change the offsets of some existing nodes.
- *
- * returns:
- *	0, on success
- *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
- *		contain the new property value
- *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_TRUNCATED, standard meanings
- */
-#define fdt_setprop_string(fdt, nodeoffset, name, str) \
-	fdt_setprop((fdt), (nodeoffset), (name), (str), strlen(str)+1)
-
-
-/**
- * fdt_setprop_empty - set a property to an empty value
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose property to change
- * @name: name of the property to change
- *
- * fdt_setprop_empty() sets the value of the named property in the
- * given node to an empty (zero length) value, or creates a new empty
- * property if it does not already exist.
- *
- * This function may insert or delete data from the blob, and will
- * therefore change the offsets of some existing nodes.
- *
- * returns:
- *	0, on success
- *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
- *		contain the new property value
- *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_TRUNCATED, standard meanings
- */
-#define fdt_setprop_empty(fdt, nodeoffset, name) \
-	fdt_setprop((fdt), (nodeoffset), (name), NULL, 0)
-
-/**
- * fdt_appendprop - append to or create a property
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose property to change
- * @name: name of the property to append to
- * @val: pointer to data to append to the property value
- * @len: length of the data to append to the property value
- *
- * fdt_appendprop() appends the value to the named property in the
- * given node, creating the property if it does not already exist.
- *
- * This function may insert data into the blob, and will therefore
- * change the offsets of some existing nodes.
- *
- * returns:
- *	0, on success
- *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
- *		contain the new property value
- *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_TRUNCATED, standard meanings
- */
-int fdt_appendprop(void *fdt, int nodeoffset, const char *name,
-		   const void *val, int len);
-
-/**
- * fdt_appendprop_u32 - append a 32-bit integer value to a property
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose property to change
- * @name: name of the property to change
- * @val: 32-bit integer value to append to the property (native endian)
- *
- * fdt_appendprop_u32() appends the given 32-bit integer value
- * (converting to big-endian if necessary) to the value of the named
- * property in the given node, or creates a new property with that
- * value if it does not already exist.
- *
- * This function may insert data into the blob, and will therefore
- * change the offsets of some existing nodes.
- *
- * returns:
- *	0, on success
- *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
- *		contain the new property value
- *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_TRUNCATED, standard meanings
- */
-static inline int fdt_appendprop_u32(void *fdt, int nodeoffset,
-				     const char *name, uint32_t val)
-{
-	fdt32_t tmp = cpu_to_fdt32(val);
-	return fdt_appendprop(fdt, nodeoffset, name, &tmp, sizeof(tmp));
-}
-
-/**
- * fdt_appendprop_u64 - append a 64-bit integer value to a property
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose property to change
- * @name: name of the property to change
- * @val: 64-bit integer value to append to the property (native endian)
- *
- * fdt_appendprop_u64() appends the given 64-bit integer value
- * (converting to big-endian if necessary) to the value of the named
- * property in the given node, or creates a new property with that
- * value if it does not already exist.
- *
- * This function may insert data into the blob, and will therefore
- * change the offsets of some existing nodes.
- *
- * returns:
- *	0, on success
- *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
- *		contain the new property value
- *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_TRUNCATED, standard meanings
- */
-static inline int fdt_appendprop_u64(void *fdt, int nodeoffset,
-				     const char *name, uint64_t val)
-{
-	fdt64_t tmp = cpu_to_fdt64(val);
-	return fdt_appendprop(fdt, nodeoffset, name, &tmp, sizeof(tmp));
-}
-
-/**
- * fdt_appendprop_cell - append a single cell value to a property
- *
- * This is an alternative name for fdt_appendprop_u32()
- */
-static inline int fdt_appendprop_cell(void *fdt, int nodeoffset,
-				      const char *name, uint32_t val)
-{
-	return fdt_appendprop_u32(fdt, nodeoffset, name, val);
-}
-
-/**
- * fdt_appendprop_string - append a string to a property
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose property to change
- * @name: name of the property to change
- * @str: string value to append to the property
- *
- * fdt_appendprop_string() appends the given string to the value of
- * the named property in the given node, or creates a new property
- * with that value if it does not already exist.
- *
- * This function may insert data into the blob, and will therefore
- * change the offsets of some existing nodes.
- *
- * returns:
- *	0, on success
- *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
- *		contain the new property value
- *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_TRUNCATED, standard meanings
- */
-#define fdt_appendprop_string(fdt, nodeoffset, name, str) \
-	fdt_appendprop((fdt), (nodeoffset), (name), (str), strlen(str)+1)
-
-/**
- * fdt_delprop - delete a property
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose property to nop
- * @name: name of the property to nop
- *
- * fdt_del_property() will delete the given property.
- *
- * This function will delete data from the blob, and will therefore
- * change the offsets of some existing nodes.
- *
- * returns:
- *	0, on success
- *	-FDT_ERR_NOTFOUND, node does not have the named property
- *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_TRUNCATED, standard meanings
- */
-int fdt_delprop(void *fdt, int nodeoffset, const char *name);
-
-/**
- * fdt_add_subnode_namelen - creates a new node based on substring
- * @fdt: pointer to the device tree blob
- * @parentoffset: structure block offset of a node
- * @name: name of the subnode to locate
- * @namelen: number of characters of name to consider
- *
- * Identical to fdt_add_subnode(), but use only the first namelen
- * characters of name as the name of the new node.  This is useful for
- * creating subnodes based on a portion of a larger string, such as a
- * full path.
- */
-#ifndef SWIG /* Not available in Python */
-int fdt_add_subnode_namelen(void *fdt, int parentoffset,
-			    const char *name, int namelen);
-#endif
-
-/**
- * fdt_add_subnode - creates a new node
- * @fdt: pointer to the device tree blob
- * @parentoffset: structure block offset of a node
- * @name: name of the subnode to locate
- *
- * fdt_add_subnode() creates a new node as a subnode of the node at
- * structure block offset parentoffset, with the given name (which
- * should include the unit address, if any).
- *
- * This function will insert data into the blob, and will therefore
- * change the offsets of some existing nodes.
-
- * returns:
- *	structure block offset of the created nodeequested subnode (>=0), on
- *		success
- *	-FDT_ERR_NOTFOUND, if the requested subnode does not exist
- *	-FDT_ERR_BADOFFSET, if parentoffset did not point to an FDT_BEGIN_NODE
- *		tag
- *	-FDT_ERR_EXISTS, if the node at parentoffset already has a subnode of
- *		the given name
- *	-FDT_ERR_NOSPACE, if there is insufficient free space in the
- *		blob to contain the new node
- *	-FDT_ERR_NOSPACE
- *	-FDT_ERR_BADLAYOUT
- *      -FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_TRUNCATED, standard meanings.
- */
-int fdt_add_subnode(void *fdt, int parentoffset, const char *name);
-
-/**
- * fdt_del_node - delete a node (subtree)
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node to nop
- *
- * fdt_del_node() will remove the given node, including all its
- * subnodes if any, from the blob.
- *
- * This function will delete data from the blob, and will therefore
- * change the offsets of some existing nodes.
- *
- * returns:
- *	0, on success
- *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_TRUNCATED, standard meanings
- */
-int fdt_del_node(void *fdt, int nodeoffset);
-
-/**
- * fdt_overlay_apply - Applies a DT overlay on a base DT
- * @fdt: pointer to the base device tree blob
- * @fdto: pointer to the device tree overlay blob
- *
- * fdt_overlay_apply() will apply the given device tree overlay on the
- * given base device tree.
- *
- * Expect the base device tree to be modified, even if the function
- * returns an error.
- *
- * returns:
- *	0, on success
- *	-FDT_ERR_NOSPACE, there's not enough space in the base device tree
- *	-FDT_ERR_NOTFOUND, the overlay points to some inexistant nodes or
- *		properties in the base DT
- *	-FDT_ERR_BADPHANDLE,
- *	-FDT_ERR_BADOVERLAY,
- *	-FDT_ERR_NOPHANDLES,
- *	-FDT_ERR_INTERNAL,
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADOFFSET,
- *	-FDT_ERR_BADPATH,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_TRUNCATED, standard meanings
- */
-int fdt_overlay_apply(void *fdt, void *fdto);
-
-/**********************************************************************/
-/* Debugging / informational functions                                */
-/**********************************************************************/
-
-#ifndef SWIG /* Not available in Python */
-const char *fdt_strerror(int errval);
-
-/**
- * fdt_remove_unused_strings() - Remove any unused strings from an FDT
- *
- * This creates a new device tree in @new with unused strings removed. The
- * called can then use fdt_pack() to minimise the space consumed.
- *
- * @old:	Old device tree blog
- * @new:	Place to put new device tree blob, which must be as large as
- *		@old
- * @return
- *	0, on success
- *	-FDT_ERR_BADOFFSET, corrupt device tree
- *	-FDT_ERR_NOSPACE, out of space, which should not happen unless there
- *		is something very wrong with the device tree input
- */
-int fdt_remove_unused_strings(const void *old, void *new);
-
-struct fdt_region {
-	int offset;
-	int size;
-};
-
-/*
- * Flags for fdt_find_regions()
- *
- * Add a region for the string table (always the last region)
- */
-#define FDT_REG_ADD_STRING_TAB		(1 << 0)
-
-/*
- * Add all supernodes of a matching node/property, useful for creating a
- * valid subset tree
- */
-#define FDT_REG_SUPERNODES		(1 << 1)
-
-/* Add the FDT_BEGIN_NODE tags of subnodes, including their names */
-#define FDT_REG_DIRECT_SUBNODES	(1 << 2)
-
-/* Add all subnodes of a matching node */
-#define FDT_REG_ALL_SUBNODES		(1 << 3)
-
-/* Add a region for the mem_rsvmap table (always the first region) */
-#define FDT_REG_ADD_MEM_RSVMAP		(1 << 4)
-
-/* Indicates what an fdt part is (node, property, value) */
-#define FDT_IS_NODE			(1 << 0)
-#define FDT_IS_PROP			(1 << 1)
-#define FDT_IS_VALUE			(1 << 2)	/* not supported */
-#define FDT_IS_COMPAT			(1 << 3)	/* used internally */
-#define FDT_NODE_HAS_PROP		(1 << 4)	/* node contains prop */
-
-#define FDT_ANY_GLOBAL		(FDT_IS_NODE | FDT_IS_PROP | FDT_IS_VALUE | \
-					FDT_IS_COMPAT)
-#define FDT_IS_ANY			0x1f		/* all the above */
-
-/* We set a reasonable limit on the number of nested nodes */
-#define FDT_MAX_DEPTH			32
-
-/* Decribes what we want to include from the current tag */
-enum want_t {
-	WANT_NOTHING,
-	WANT_NODES_ONLY,		/* No properties */
-	WANT_NODES_AND_PROPS,		/* Everything for one level */
-	WANT_ALL_NODES_AND_PROPS	/* Everything for all levels */
-};
-
-/* Keeps track of the state at parent nodes */
-struct fdt_subnode_stack {
-	int offset;		/* Offset of node */
-	enum want_t want;	/* The 'want' value here */
-	int included;		/* 1 if we included this node, 0 if not */
-};
-
-struct fdt_region_ptrs {
-	int depth;			/* Current tree depth */
-	int done;			/* What we have completed scanning */
-	enum want_t want;		/* What we are currently including */
-	char *end;			/* Pointer to end of full node path */
-	int nextoffset;			/* Next node offset to check */
-};
-
-/* The state of our finding algortihm */
-struct fdt_region_state {
-	struct fdt_subnode_stack stack[FDT_MAX_DEPTH];	/* node stack */
-	struct fdt_region *region;	/* Contains list of regions found */
-	int count;			/* Numnber of regions found */
-	const void *fdt;		/* FDT blob */
-	int max_regions;		/* Maximum regions to find */
-	int can_merge;		/* 1 if we can merge with previous region */
-	int start;			/* Start position of current region */
-	struct fdt_region_ptrs ptrs;	/* Pointers for what we are up to */
-};
-
-/**
- * fdt_find_regions() - find regions in device tree
- *
- * Given a list of nodes to include and properties to exclude, find
- * the regions of the device tree which describe those included parts.
- *
- * The intent is to get a list of regions which will be invariant provided
- * those parts are invariant. For example, if you request a list of regions
- * for all nodes but exclude the property "data", then you will get the
- * same region contents regardless of any change to "data" properties.
- *
- * This function can be used to produce a byte-stream to send to a hashing
- * function to verify that critical parts of the FDT have not changed.
- *
- * Nodes which are given in 'inc' are included in the region list, as
- * are the names of the immediate subnodes nodes (but not the properties
- * or subnodes of those subnodes).
- *
- * For eaxample "/" means to include the root node, all root properties
- * and the FDT_BEGIN_NODE and FDT_END_NODE of all subnodes of /. The latter
- * ensures that we capture the names of the subnodes. In a hashing situation
- * it prevents the root node from changing at all Any change to non-excluded
- * properties, names of subnodes or number of subnodes would be detected.
- *
- * When used with FITs this provides the ability to hash and sign parts of
- * the FIT based on different configurations in the FIT. Then it is
- * impossible to change anything about that configuration (include images
- * attached to the configuration), but it may be possible to add new
- * configurations, new images or new signatures within the existing
- * framework.
- *
- * Adding new properties to a device tree may result in the string table
- * being extended (if the new property names are different from those
- * already added). This function can optionally include a region for
- * the string table so that this can be part of the hash too.
- *
- * The device tree header is not included in the list.
- *
- * @fdt:	Device tree to check
- * @inc:	List of node paths to included
- * @inc_count:	Number of node paths in list
- * @exc_prop:	List of properties names to exclude
- * @exc_prop_count:	Number of properties in exclude list
- * @region:	Returns list of regions
- * @max_region:	Maximum length of region list
- * @path:	Pointer to a temporary string for the function to use for
- *		building path names
- * @path_len:	Length of path, must be large enough to hold the longest
- *		path in the tree
- * @add_string_tab:	1 to add a region for the string table
- * @return number of regions in list. If this is >max_regions then the
- * region array was exhausted. You should increase max_regions and try
- * the call again.
- */
-int fdt_find_regions(const void *fdt, char * const inc[], int inc_count,
-		     char * const exc_prop[], int exc_prop_count,
-		     struct fdt_region region[], int max_regions,
-		     char *path, int path_len, int add_string_tab);
-
-/**
- * fdt_first_region() - find regions in device tree
- *
- * Given a nodes and properties to include and properties to exclude, find
- * the regions of the device tree which describe those included parts.
- *
- * The use for this function is twofold. Firstly it provides a convenient
- * way of performing a structure-aware grep of the tree. For example it is
- * possible to grep for a node and get all the properties associated with
- * that node. Trees can be subsetted easily, by specifying the nodes that
- * are required, and then writing out the regions returned by this function.
- * This is useful for small resource-constrained systems, such as boot
- * loaders, which want to use an FDT but do not need to know about all of
- * it.
- *
- * Secondly it makes it easy to hash parts of the tree and detect changes.
- * The intent is to get a list of regions which will be invariant provided
- * those parts are invariant. For example, if you request a list of regions
- * for all nodes but exclude the property "data", then you will get the
- * same region contents regardless of any change to "data" properties.
- *
- * This function can be used to produce a byte-stream to send to a hashing
- * function to verify that critical parts of the FDT have not changed.
- * Note that semantically null changes in order could still cause false
- * hash misses. Such reordering might happen if the tree is regenerated
- * from source, and nodes are reordered (the bytes-stream will be emitted
- * in a different order and mnay hash functions will detect this). However
- * if an existing tree is modified using libfdt functions, such as
- * fdt_add_subnode() and fdt_setprop(), then this problem is avoided.
- *
- * The nodes/properties to include/exclude are defined by a function
- * provided by the caller. This function is called for each node and
- * property, and must return:
- *
- *    0 - to exclude this part
- *    1 - to include this part
- *   -1 - for FDT_IS_PROP only: no information is available, so include
- *		if its containing node is included
- *
- * The last case is only used to deal with properties. Often a property is
- * included if its containing node is included - this is the case where
- * -1 is returned.. However if the property is specifically required to be
- * included/excluded, then 0 or 1 can be returned. Note that including a
- * property when the FDT_REG_SUPERNODES flag is given will force its
- * containing node to be included since it is not valid to have a property
- * that is not in a node.
- *
- * Using the information provided, the inclusion of a node can be controlled
- * either by a node name or its compatible string, or any other property
- * that the function can determine.
- *
- * As an example, including node "/" means to include the root node and all
- * root properties. A flag provides a way of also including supernodes (of
- * which there is none for the root node), and another flag includes
- * immediate subnodes, so in this case we would get the FDT_BEGIN_NODE and
- * FDT_END_NODE of all subnodes of /.
- *
- * The subnode feature helps in a hashing situation since it prevents the
- * root node from changing at all. Any change to non-excluded properties,
- * names of subnodes or number of subnodes would be detected.
- *
- * When used with FITs this provides the ability to hash and sign parts of
- * the FIT based on different configurations in the FIT. Then it is
- * impossible to change anything about that configuration (include images
- * attached to the configuration), but it may be possible to add new
- * configurations, new images or new signatures within the existing
- * framework.
- *
- * Adding new properties to a device tree may result in the string table
- * being extended (if the new property names are different from those
- * already added). This function can optionally include a region for
- * the string table so that this can be part of the hash too. This is always
- * the last region.
- *
- * The FDT also has a mem_rsvmap table which can also be included, and is
- * always the first region if so.
- *
- * The device tree header is not included in the region list. Since the
- * contents of the FDT are changing (shrinking, often), the caller will need
- * to regenerate the header anyway.
- *
- * @fdt:	Device tree to check
- * @h_include:	Function to call to determine whether to include a part or
- *		not:
- *
- *		@priv: Private pointer as passed to fdt_find_regions()
- *		@fdt: Pointer to FDT blob
- *		@offset: Offset of this node / property
- *		@type: Type of this part, FDT_IS_...
- *		@data: Pointer to data (node name, property name, compatible
- *			string, value (not yet supported)
- *		@size: Size of data, or 0 if none
- *		@return 0 to exclude, 1 to include, -1 if no information is
- *		available
- * @priv:	Private pointer passed to h_include
- * @region:	Returns list of regions, sorted by offset
- * @max_regions: Maximum length of region list
- * @path:	Pointer to a temporary string for the function to use for
- *		building path names
- * @path_len:	Length of path, must be large enough to hold the longest
- *		path in the tree
- * @flags:	Various flags that control the region algortihm, see
- *		FDT_REG_...
- * @return number of regions in list. If this is >max_regions then the
- * region array was exhausted. You should increase max_regions and try
- * the call again. Only the first max_regions elements are available in the
- * array.
- *
- * On error a -ve value is return, which can be:
- *
- *	-FDT_ERR_BADSTRUCTURE (too deep or more END tags than BEGIN tags
- *	-FDT_ERR_BADLAYOUT
- *	-FDT_ERR_NOSPACE (path area is too small)
- */
-int fdt_first_region(const void *fdt,
-		int (*h_include)(void *priv, const void *fdt, int offset,
-				 int type, const char *data, int size),
-		void *priv, struct fdt_region *region,
-		char *path, int path_len, int flags,
-		struct fdt_region_state *info);
-
-/** fdt_next_region() - find next region
- *
- * See fdt_first_region() for full description. This function finds the
- * next region according to the provided parameters, which must be the same
- * as passed to fdt_first_region().
- *
- * This function can additionally return -FDT_ERR_NOTFOUND when there are no
- * more regions
- */
-int fdt_next_region(const void *fdt,
-		int (*h_include)(void *priv, const void *fdt, int offset,
-				 int type, const char *data, int size),
-		void *priv, struct fdt_region *region,
-		char *path, int path_len, int flags,
-		struct fdt_region_state *info);
-
-/**
- * fdt_add_alias_regions() - find aliases that point to existing regions
- *
- * Once a device tree grep is complete some of the nodes will be present
- * and some will have been dropped. This function checks all the alias nodes
- * to figure out which points point to nodes which are still present. These
- * aliases need to be kept, along with the nodes they reference.
- *
- * Given a list of regions function finds the aliases that still apply and
- * adds more regions to the list for these. This function is called after
- * fdt_next_region() has finished returning regions and requires the same
- * state.
- *
- * @fdt:	Device tree file to reference
- * @region:	List of regions that will be kept
- * @count:	Number of regions
- * @max_regions: Number of entries that can fit in @region
- * @info:	Region state as returned from fdt_next_region()
- * @return new number of regions in @region (i.e. count + the number added)
- * or -FDT_ERR_NOSPACE if there was not enough space.
- */
-int fdt_add_alias_regions(const void *fdt, struct fdt_region *region, int count,
-			  int max_regions, struct fdt_region_state *info);
-int fdt_device_is_available(const void *blob, int node);
-/**
- * fdt_node_offset_by_phandle_node - find the node with a given phandle and node
- * @fdt: pointer to the device tree blob
- * @phandle: phandle value
- * @node: start node value
- *
- * fdt_node_offset_by_phandle_node() returns the offset of the node
- * which has the given phandle value.  If there is more than one node
- * in the tree with the given phandle (an invalid tree), results are
- * undefined.
- *
- * returns:
- *	structure block offset of the located node (>= 0), on success
- *	-FDT_ERR_NOTFOUND, no node with that phandle exists
- *	-FDT_ERR_BADPHANDLE, given phandle value was invalid (0 or -1)
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE, standard meanings
- */
-int fdt_node_offset_by_phandle_node(const void *fdt, int node, uint32_t phandle);
-#endif /* SWIG */
-
-#endif /* _LIBFDT_H */

commit 4e2c3b8c76d8e0f31bdb66eb72a7492c1070b1d5
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Sun Jan 21 19:19:13 2018 +0900

    UPSTREAM: libfdt: migrate fdt_rw.c to a wrapper of scripts/dtc/libfdt/fdt_rw.c
    
    The only difference between scripts/dtc/libfdt/fdt_rw.c and
    lib/libfdt/fdt_rw.c is fdt_remove_unused_strings().
    
    It is only used by fdtgrep, so we do not need to compile it for U-Boot
    image.  Move it to tools/libfdt/fdw_rw.c so that lib/libfdt/fdt_rw.c
    can be a wrapper of scripts/dtc/libfdt/fdt_rw.c.
    
    Change-Id: I6e2578d4bfdf75438d3aa1cb51f270f34527d37d
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/lib/libfdt/Makefile b/lib/libfdt/Makefile
index be42e946b7..4e3e12f505 100644
--- a/lib/libfdt/Makefile
+++ b/lib/libfdt/Makefile
@@ -11,6 +11,7 @@ obj-y += \
 	fdt_wip.o \
 	fdt_strerror.o \
 	fdt_sw.o \
+	fdt_rw.o \
 	fdt_empty_tree.o \
 	fdt_addresses.o
 
@@ -18,9 +19,7 @@ obj-$(CONFIG_OF_LIBFDT_OVERLAY) += fdt_overlay.o
 
 # Locally modified for U-Boot.
 # TODO: split out the local modifiction.
-obj-y += \
-	fdt_ro.o \
-	fdt_rw.o
+obj-y += fdt_ro.o
 
 # U-Boot own file
 obj-y += fdt_region.o
diff --git a/lib/libfdt/fdt_rw.c b/lib/libfdt/fdt_rw.c
index 3dc775261f..aafded07a1 100644
--- a/lib/libfdt/fdt_rw.c
+++ b/lib/libfdt/fdt_rw.c
@@ -1,496 +1,2 @@
-/*
- * libfdt - Flat Device Tree manipulation
- * Copyright (C) 2006 David Gibson, IBM Corporation.
- * SPDX-License-Identifier:	GPL-2.0+ BSD-2-Clause
- */
-#include <libfdt_env.h>
-
-#ifndef USE_HOSTCC
-#include <fdt.h>
-#include <libfdt.h>
-#else
-#include "fdt_host.h"
-#endif
-
-#include "libfdt_internal.h"
-
-static int _fdt_blocks_misordered(const void *fdt,
-			      int mem_rsv_size, int struct_size)
-{
-	return (fdt_off_mem_rsvmap(fdt) < FDT_ALIGN(sizeof(struct fdt_header), 8))
-		|| (fdt_off_dt_struct(fdt) <
-		    (fdt_off_mem_rsvmap(fdt) + mem_rsv_size))
-		|| (fdt_off_dt_strings(fdt) <
-		    (fdt_off_dt_struct(fdt) + struct_size))
-		|| (fdt_totalsize(fdt) <
-		    (fdt_off_dt_strings(fdt) + fdt_size_dt_strings(fdt)));
-}
-
-static int _fdt_rw_check_header(void *fdt)
-{
-	FDT_CHECK_HEADER(fdt);
-
-	if (fdt_version(fdt) < 17)
-		return -FDT_ERR_BADVERSION;
-	if (_fdt_blocks_misordered(fdt, sizeof(struct fdt_reserve_entry),
-				   fdt_size_dt_struct(fdt)))
-		return -FDT_ERR_BADLAYOUT;
-	if (fdt_version(fdt) > 17)
-		fdt_set_version(fdt, 17);
-
-	return 0;
-}
-
-#define FDT_RW_CHECK_HEADER(fdt) \
-	{ \
-		int __err; \
-		if ((__err = _fdt_rw_check_header(fdt)) != 0) \
-			return __err; \
-	}
-
-static inline int _fdt_data_size(void *fdt)
-{
-	return fdt_off_dt_strings(fdt) + fdt_size_dt_strings(fdt);
-}
-
-static int _fdt_splice(void *fdt, void *splicepoint, int oldlen, int newlen)
-{
-	char *p = splicepoint;
-	char *end = (char *)fdt + _fdt_data_size(fdt);
-
-	if (((p + oldlen) < p) || ((p + oldlen) > end))
-		return -FDT_ERR_BADOFFSET;
-	if ((p < (char *)fdt) || ((end - oldlen + newlen) < (char *)fdt))
-		return -FDT_ERR_BADOFFSET;
-	if ((end - oldlen + newlen) > ((char *)fdt + fdt_totalsize(fdt)))
-		return -FDT_ERR_NOSPACE;
-	memmove(p + newlen, p + oldlen, end - p - oldlen);
-	return 0;
-}
-
-static int _fdt_splice_mem_rsv(void *fdt, struct fdt_reserve_entry *p,
-			       int oldn, int newn)
-{
-	int delta = (newn - oldn) * sizeof(*p);
-	int err;
-	err = _fdt_splice(fdt, p, oldn * sizeof(*p), newn * sizeof(*p));
-	if (err)
-		return err;
-	fdt_set_off_dt_struct(fdt, fdt_off_dt_struct(fdt) + delta);
-	fdt_set_off_dt_strings(fdt, fdt_off_dt_strings(fdt) + delta);
-	return 0;
-}
-
-static int _fdt_splice_struct(void *fdt, void *p,
-			      int oldlen, int newlen)
-{
-	int delta = newlen - oldlen;
-	int err;
-
-	if ((err = _fdt_splice(fdt, p, oldlen, newlen)))
-		return err;
-
-	fdt_set_size_dt_struct(fdt, fdt_size_dt_struct(fdt) + delta);
-	fdt_set_off_dt_strings(fdt, fdt_off_dt_strings(fdt) + delta);
-	return 0;
-}
-
-static int _fdt_splice_string(void *fdt, int newlen)
-{
-	void *p = (char *)fdt
-		+ fdt_off_dt_strings(fdt) + fdt_size_dt_strings(fdt);
-	int err;
-
-	if ((err = _fdt_splice(fdt, p, 0, newlen)))
-		return err;
-
-	fdt_set_size_dt_strings(fdt, fdt_size_dt_strings(fdt) + newlen);
-	return 0;
-}
-
-static int _fdt_find_add_string(void *fdt, const char *s)
-{
-	char *strtab = (char *)fdt + fdt_off_dt_strings(fdt);
-	const char *p;
-	char *new;
-	int len = strlen(s) + 1;
-	int err;
-
-	p = _fdt_find_string(strtab, fdt_size_dt_strings(fdt), s);
-	if (p)
-		/* found it */
-		return (p - strtab);
-
-	new = strtab + fdt_size_dt_strings(fdt);
-	err = _fdt_splice_string(fdt, len);
-	if (err)
-		return err;
-
-	memcpy(new, s, len);
-	return (new - strtab);
-}
-
-int fdt_add_mem_rsv(void *fdt, uint64_t address, uint64_t size)
-{
-	struct fdt_reserve_entry *re;
-	int err;
-
-	FDT_RW_CHECK_HEADER(fdt);
-
-	re = _fdt_mem_rsv_w(fdt, fdt_num_mem_rsv(fdt));
-	err = _fdt_splice_mem_rsv(fdt, re, 0, 1);
-	if (err)
-		return err;
-
-	re->address = cpu_to_fdt64(address);
-	re->size = cpu_to_fdt64(size);
-	return 0;
-}
-
-int fdt_del_mem_rsv(void *fdt, int n)
-{
-	struct fdt_reserve_entry *re = _fdt_mem_rsv_w(fdt, n);
-
-	FDT_RW_CHECK_HEADER(fdt);
-
-	if (n >= fdt_num_mem_rsv(fdt))
-		return -FDT_ERR_NOTFOUND;
-
-	return _fdt_splice_mem_rsv(fdt, re, 1, 0);
-}
-
-static int _fdt_resize_property(void *fdt, int nodeoffset, const char *name,
-				int len, struct fdt_property **prop)
-{
-	int oldlen;
-	int err;
-
-	*prop = fdt_get_property_w(fdt, nodeoffset, name, &oldlen);
-	if (!*prop)
-		return oldlen;
-
-	if ((err = _fdt_splice_struct(fdt, (*prop)->data, FDT_TAGALIGN(oldlen),
-				      FDT_TAGALIGN(len))))
-		return err;
-
-	(*prop)->len = cpu_to_fdt32(len);
-	return 0;
-}
-
-static int _fdt_add_property(void *fdt, int nodeoffset, const char *name,
-			     int len, struct fdt_property **prop)
-{
-	int proplen;
-	int nextoffset;
-	int namestroff;
-	int err;
-
-	if ((nextoffset = _fdt_check_node_offset(fdt, nodeoffset)) < 0)
-		return nextoffset;
-
-	namestroff = _fdt_find_add_string(fdt, name);
-	if (namestroff < 0)
-		return namestroff;
-
-	*prop = _fdt_offset_ptr_w(fdt, nextoffset);
-	proplen = sizeof(**prop) + FDT_TAGALIGN(len);
-
-	err = _fdt_splice_struct(fdt, *prop, 0, proplen);
-	if (err)
-		return err;
-
-	(*prop)->tag = cpu_to_fdt32(FDT_PROP);
-	(*prop)->nameoff = cpu_to_fdt32(namestroff);
-	(*prop)->len = cpu_to_fdt32(len);
-	return 0;
-}
-
-int fdt_set_name(void *fdt, int nodeoffset, const char *name)
-{
-	char *namep;
-	int oldlen, newlen;
-	int err;
-
-	FDT_RW_CHECK_HEADER(fdt);
-
-	namep = (char *)(uintptr_t)fdt_get_name(fdt, nodeoffset, &oldlen);
-	if (!namep)
-		return oldlen;
-
-	newlen = strlen(name);
-
-	err = _fdt_splice_struct(fdt, namep, FDT_TAGALIGN(oldlen+1),
-				 FDT_TAGALIGN(newlen+1));
-	if (err)
-		return err;
-
-	memcpy(namep, name, newlen+1);
-	return 0;
-}
-
-int fdt_setprop_placeholder(void *fdt, int nodeoffset, const char *name,
-			    int len, void **prop_data)
-{
-	struct fdt_property *prop;
-	int err;
-
-	FDT_RW_CHECK_HEADER(fdt);
-
-	err = _fdt_resize_property(fdt, nodeoffset, name, len, &prop);
-	if (err == -FDT_ERR_NOTFOUND)
-		err = _fdt_add_property(fdt, nodeoffset, name, len, &prop);
-	if (err)
-		return err;
-
-	*prop_data = prop->data;
-	return 0;
-}
-
-int fdt_setprop(void *fdt, int nodeoffset, const char *name,
-		const void *val, int len)
-{
-	void *prop_data;
-	int err;
-
-	err = fdt_setprop_placeholder(fdt, nodeoffset, name, len, &prop_data);
-	if (err)
-		return err;
-
-	if (len)
-		memcpy(prop_data, val, len);
-	return 0;
-}
-
-int fdt_appendprop(void *fdt, int nodeoffset, const char *name,
-		   const void *val, int len)
-{
-	struct fdt_property *prop;
-	int err, oldlen, newlen;
-
-	FDT_RW_CHECK_HEADER(fdt);
-
-	prop = fdt_get_property_w(fdt, nodeoffset, name, &oldlen);
-	if (prop) {
-		newlen = len + oldlen;
-		err = _fdt_splice_struct(fdt, prop->data,
-					 FDT_TAGALIGN(oldlen),
-					 FDT_TAGALIGN(newlen));
-		if (err)
-			return err;
-		prop->len = cpu_to_fdt32(newlen);
-		memcpy(prop->data + oldlen, val, len);
-	} else {
-		err = _fdt_add_property(fdt, nodeoffset, name, len, &prop);
-		if (err)
-			return err;
-		memcpy(prop->data, val, len);
-	}
-	return 0;
-}
-
-int fdt_delprop(void *fdt, int nodeoffset, const char *name)
-{
-	struct fdt_property *prop;
-	int len, proplen;
-
-	FDT_RW_CHECK_HEADER(fdt);
-
-	prop = fdt_get_property_w(fdt, nodeoffset, name, &len);
-	if (!prop)
-		return len;
-
-	proplen = sizeof(*prop) + FDT_TAGALIGN(len);
-	return _fdt_splice_struct(fdt, prop, proplen, 0);
-}
-
-int fdt_add_subnode_namelen(void *fdt, int parentoffset,
-			    const char *name, int namelen)
-{
-	struct fdt_node_header *nh;
-	int offset, nextoffset;
-	int nodelen;
-	int err;
-	uint32_t tag;
-	fdt32_t *endtag;
-
-	FDT_RW_CHECK_HEADER(fdt);
-
-	offset = fdt_subnode_offset_namelen(fdt, parentoffset, name, namelen);
-	if (offset >= 0)
-		return -FDT_ERR_EXISTS;
-	else if (offset != -FDT_ERR_NOTFOUND)
-		return offset;
-
-	/* Try to place the new node after the parent's properties */
-	fdt_next_tag(fdt, parentoffset, &nextoffset); /* skip the BEGIN_NODE */
-	do {
-		offset = nextoffset;
-		tag = fdt_next_tag(fdt, offset, &nextoffset);
-	} while ((tag == FDT_PROP) || (tag == FDT_NOP));
-
-	nh = _fdt_offset_ptr_w(fdt, offset);
-	nodelen = sizeof(*nh) + FDT_TAGALIGN(namelen+1) + FDT_TAGSIZE;
-
-	err = _fdt_splice_struct(fdt, nh, 0, nodelen);
-	if (err)
-		return err;
-
-	nh->tag = cpu_to_fdt32(FDT_BEGIN_NODE);
-	memset(nh->name, 0, FDT_TAGALIGN(namelen+1));
-	memcpy(nh->name, name, namelen);
-	endtag = (fdt32_t *)((char *)nh + nodelen - FDT_TAGSIZE);
-	*endtag = cpu_to_fdt32(FDT_END_NODE);
-
-	return offset;
-}
-
-int fdt_add_subnode(void *fdt, int parentoffset, const char *name)
-{
-	return fdt_add_subnode_namelen(fdt, parentoffset, name, strlen(name));
-}
-
-int fdt_del_node(void *fdt, int nodeoffset)
-{
-	int endoffset;
-
-	FDT_RW_CHECK_HEADER(fdt);
-
-	endoffset = _fdt_node_end_offset(fdt, nodeoffset);
-	if (endoffset < 0)
-		return endoffset;
-
-	return _fdt_splice_struct(fdt, _fdt_offset_ptr_w(fdt, nodeoffset),
-				  endoffset - nodeoffset, 0);
-}
-
-static void _fdt_packblocks(const char *old, char *new,
-			    int mem_rsv_size, int struct_size)
-{
-	int mem_rsv_off, struct_off, strings_off;
-
-	mem_rsv_off = FDT_ALIGN(sizeof(struct fdt_header), 8);
-	struct_off = mem_rsv_off + mem_rsv_size;
-	strings_off = struct_off + struct_size;
-
-	memmove(new + mem_rsv_off, old + fdt_off_mem_rsvmap(old), mem_rsv_size);
-	fdt_set_off_mem_rsvmap(new, mem_rsv_off);
-
-	memmove(new + struct_off, old + fdt_off_dt_struct(old), struct_size);
-	fdt_set_off_dt_struct(new, struct_off);
-	fdt_set_size_dt_struct(new, struct_size);
-
-	memmove(new + strings_off, old + fdt_off_dt_strings(old),
-		fdt_size_dt_strings(old));
-	fdt_set_off_dt_strings(new, strings_off);
-	fdt_set_size_dt_strings(new, fdt_size_dt_strings(old));
-}
-
-int fdt_open_into(const void *fdt, void *buf, int bufsize)
-{
-	int err;
-	int mem_rsv_size, struct_size;
-	int newsize;
-	const char *fdtstart = fdt;
-	const char *fdtend = fdtstart + fdt_totalsize(fdt);
-	char *tmp;
-
-	FDT_CHECK_HEADER(fdt);
-
-	mem_rsv_size = (fdt_num_mem_rsv(fdt)+1)
-		* sizeof(struct fdt_reserve_entry);
-
-	if (fdt_version(fdt) >= 17) {
-		struct_size = fdt_size_dt_struct(fdt);
-	} else {
-		struct_size = 0;
-		while (fdt_next_tag(fdt, struct_size, &struct_size) != FDT_END)
-			;
-		if (struct_size < 0)
-			return struct_size;
-	}
-
-	if (!_fdt_blocks_misordered(fdt, mem_rsv_size, struct_size)) {
-		/* no further work necessary */
-		err = fdt_move(fdt, buf, bufsize);
-		if (err)
-			return err;
-		fdt_set_version(buf, 17);
-		fdt_set_size_dt_struct(buf, struct_size);
-		fdt_set_totalsize(buf, bufsize);
-		return 0;
-	}
-
-	/* Need to reorder */
-	newsize = FDT_ALIGN(sizeof(struct fdt_header), 8) + mem_rsv_size
-		+ struct_size + fdt_size_dt_strings(fdt);
-
-	if (bufsize < newsize)
-		return -FDT_ERR_NOSPACE;
-
-	/* First attempt to build converted tree at beginning of buffer */
-	tmp = buf;
-	/* But if that overlaps with the old tree... */
-	if (((tmp + newsize) > fdtstart) && (tmp < fdtend)) {
-		/* Try right after the old tree instead */
-		tmp = (char *)(uintptr_t)fdtend;
-		if ((tmp + newsize) > ((char *)buf + bufsize))
-			return -FDT_ERR_NOSPACE;
-	}
-
-	_fdt_packblocks(fdt, tmp, mem_rsv_size, struct_size);
-	memmove(buf, tmp, newsize);
-
-	fdt_set_magic(buf, FDT_MAGIC);
-	fdt_set_totalsize(buf, bufsize);
-	fdt_set_version(buf, 17);
-	fdt_set_last_comp_version(buf, 16);
-	fdt_set_boot_cpuid_phys(buf, fdt_boot_cpuid_phys(fdt));
-
-	return 0;
-}
-
-int fdt_pack(void *fdt)
-{
-	int mem_rsv_size;
-
-	FDT_RW_CHECK_HEADER(fdt);
-
-	mem_rsv_size = (fdt_num_mem_rsv(fdt)+1)
-		* sizeof(struct fdt_reserve_entry);
-	_fdt_packblocks(fdt, fdt, mem_rsv_size, fdt_size_dt_struct(fdt));
-	fdt_set_totalsize(fdt, _fdt_data_size(fdt));
-
-	return 0;
-}
-
-int fdt_remove_unused_strings(const void *old, void *new)
-{
-	const struct fdt_property *old_prop;
-	struct fdt_property *new_prop;
-	int size = fdt_totalsize(old);
-	int next_offset, offset;
-	const char *str;
-	int ret;
-	int tag = FDT_PROP;
-
-	/* Make a copy and remove the strings */
-	memcpy(new, old, size);
-	fdt_set_size_dt_strings(new, 0);
-
-	/* Add every property name back into the new string table */
-	for (offset = 0; tag != FDT_END; offset = next_offset) {
-		tag = fdt_next_tag(old, offset, &next_offset);
-		if (tag != FDT_PROP)
-			continue;
-		old_prop = fdt_get_property_by_offset(old, offset, NULL);
-		new_prop = (struct fdt_property *)(unsigned long)
-			fdt_get_property_by_offset(new, offset, NULL);
-		str = fdt_string(old, fdt32_to_cpu(old_prop->nameoff));
-		ret = _fdt_find_add_string(new, str);
-		if (ret < 0)
-			return ret;
-		new_prop->nameoff = cpu_to_fdt32(ret);
-	}
-
-	return 0;
-}
+#include <linux/libfdt_env.h>
+#include "../../scripts/dtc/libfdt/fdt_rw.c"
diff --git a/tools/Makefile b/tools/Makefile
index ebbd8930d9..f3bf68204e 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -76,11 +76,11 @@ FIT_SIG_OBJS-$(CONFIG_FIT_SIGNATURE) := common/image-sig.o
 
 # The following files are synced with upstream DTC.
 # Use synced versions from scripts/dtc/libfdt/.
-LIBFDT_SRCS_SYNCED := fdt.c fdt_wip.c fdt_sw.c fdt_strerror.c fdt_empty_tree.c \
-		      fdt_addresses.c fdt_overlay.c
+LIBFDT_SRCS_SYNCED := fdt.c fdt_wip.c fdt_sw.c fdt_rw.c \
+		fdt_strerror.c fdt_empty_tree.c fdt_addresses.c fdt_overlay.c
 # The following files are locally modified for U-Boot (unfotunately).
 # Use U-Boot own versions from lib/libfdt/.
-LIBFDT_SRCS_UNSYNCED := fdt_ro.c fdt_rw.c fdt_region.c
+LIBFDT_SRCS_UNSYNCED := fdt_ro.c fdt_region.c
 
 LIBFDT_OBJS := $(addprefix libfdt/, $(patsubst %.c, %.o, $(LIBFDT_SRCS_SYNCED))) \
 	       $(addprefix lib/libfdt/, $(patsubst %.c, %.o, $(LIBFDT_SRCS_UNSYNCED)))
diff --git a/tools/fdt_host.h b/tools/fdt_host.h
index 134d965713..8d4aa066bb 100644
--- a/tools/fdt_host.h
+++ b/tools/fdt_host.h
@@ -11,6 +11,23 @@
 #include "../include/libfdt.h"
 #include "../include/fdt_support.h"
 
+/**
+ * fdt_remove_unused_strings() - Remove any unused strings from an FDT
+ *
+ * This creates a new device tree in @new with unused strings removed. The
+ * called can then use fdt_pack() to minimise the space consumed.
+ *
+ * @old:	Old device tree blog
+ * @new:	Place to put new device tree blob, which must be as large as
+ *		@old
+ * @return
+ *	0, on success
+ *	-FDT_ERR_BADOFFSET, corrupt device tree
+ *	-FDT_ERR_NOSPACE, out of space, which should not happen unless there
+ *		is something very wrong with the device tree input
+ */
+int fdt_remove_unused_strings(const void *old, void *new);
+
 int fit_check_sign(const void *working_fdt, const void *key);
 
 #endif /* __FDT_HOST_H__ */
diff --git a/tools/fdtgrep.c b/tools/fdtgrep.c
index b46f775d15..8d33205ea2 100644
--- a/tools/fdtgrep.c
+++ b/tools/fdtgrep.c
@@ -19,7 +19,7 @@
 #include <string.h>
 #include <unistd.h>
 
-#include "../include/libfdt.h"
+#include "fdt_host.h"
 #include "libfdt_internal.h"
 
 /* Define DEBUG to get some debugging output on stderr */
diff --git a/tools/libfdt/fdt_rw.c b/tools/libfdt/fdt_rw.c
new file mode 100644
index 0000000000..e475084fae
--- /dev/null
+++ b/tools/libfdt/fdt_rw.c
@@ -0,0 +1,35 @@
+/* SPDX-License-Identifier:	GPL-2.0+ BSD-2-Clause */
+#include "fdt_host.h"
+#include "../../scripts/dtc/libfdt/fdt_rw.c"
+
+int fdt_remove_unused_strings(const void *old, void *new)
+{
+	const struct fdt_property *old_prop;
+	struct fdt_property *new_prop;
+	int size = fdt_totalsize(old);
+	int next_offset, offset;
+	const char *str;
+	int ret;
+	int tag = FDT_PROP;
+
+	/* Make a copy and remove the strings */
+	memcpy(new, old, size);
+	fdt_set_size_dt_strings(new, 0);
+
+	/* Add every property name back into the new string table */
+	for (offset = 0; tag != FDT_END; offset = next_offset) {
+		tag = fdt_next_tag(old, offset, &next_offset);
+		if (tag != FDT_PROP)
+			continue;
+		old_prop = fdt_get_property_by_offset(old, offset, NULL);
+		new_prop = (struct fdt_property *)(unsigned long)
+			fdt_get_property_by_offset(new, offset, NULL);
+		str = fdt_string(old, fdt32_to_cpu(old_prop->nameoff));
+		ret = _fdt_find_add_string(new, str);
+		if (ret < 0)
+			return ret;
+		new_prop->nameoff = cpu_to_fdt32(ret);
+	}
+
+	return 0;
+}

commit 9862beb6eb2e5a8d16dcc661682dab7e3f23afc1
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Sun Jan 21 19:19:15 2018 +0900

    UPSTREAM: tools: include necessary headers explicitly
    
    Several host-tools use "bool" type without including <stdbool.h>.
    This relies on the crappy header inclusion chain.
    
    tools/Makefile has the following line:
    
      HOST_EXTRACFLAGS += -include $(srctree)/include/libfdt_env.h \
    
    All host-tools are forced to include libfdt_env.h even if they are
    totally unrelated to FDT.  Then, <stdbool.h> is indirectly included
    as follows:
    
         include/libfdt_env.h
      -> include/linux/types.h
      -> <stdbool.h>
    
    I am fixing this horrible crap.  In advance, I need to add necessary
    include directives explicitly.  tools/fdtgrep.c needs more; <fctl.h>
    for open() and <errno.h> for errno.
    
    Change-Id: Ic2b0e0d4c417841f7eeb152e486d63fdfd1a4eff
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/tools/fdtgrep.c b/tools/fdtgrep.c
index 5897b6d5f7..b46f775d15 100644
--- a/tools/fdtgrep.c
+++ b/tools/fdtgrep.c
@@ -10,7 +10,10 @@
 
 #include <assert.h>
 #include <ctype.h>
+#include <errno.h>
 #include <getopt.h>
+#include <fcntl.h>
+#include <stdbool.h>
 #include <stdio.h>
 #include <stdlib.h>
 #include <string.h>
diff --git a/tools/gen_ethaddr_crc.c b/tools/gen_ethaddr_crc.c
index fe9896dca9..8cf86f4835 100644
--- a/tools/gen_ethaddr_crc.c
+++ b/tools/gen_ethaddr_crc.c
@@ -6,6 +6,7 @@
  */
 
 #include <ctype.h>
+#include <stdbool.h>
 #include <stdint.h>
 #include <stdio.h>
 #include <stdlib.h>
diff --git a/tools/ifdtool.c b/tools/ifdtool.c
index 195b1533ab..729991ee33 100644
--- a/tools/ifdtool.c
+++ b/tools/ifdtool.c
@@ -12,6 +12,7 @@
 #include <assert.h>
 #include <fcntl.h>
 #include <getopt.h>
+#include <stdbool.h>
 #include <stdlib.h>
 #include <stdio.h>
 #include <string.h>
diff --git a/tools/imagetool.h b/tools/imagetool.h
index 0b2a707037..ac8f7d71ec 100644
--- a/tools/imagetool.h
+++ b/tools/imagetool.h
@@ -12,6 +12,7 @@
 #include "os_support.h"
 #include <errno.h>
 #include <fcntl.h>
+#include <stdbool.h>
 #include <stdio.h>
 #include <stdlib.h>
 #include <string.h>
diff --git a/tools/mips-relocs.c b/tools/mips-relocs.c
index 8be69d320f..27d47308e0 100644
--- a/tools/mips-relocs.c
+++ b/tools/mips-relocs.c
@@ -11,6 +11,7 @@
 #include <errno.h>
 #include <fcntl.h>
 #include <limits.h>
+#include <stdbool.h>
 #include <stdio.h>
 #include <stdlib.h>
 #include <sys/mman.h>

commit fbedfcfba2a6f4d773323cde922570a76c1ef357
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Sun Jan 21 19:19:18 2018 +0900

    UPSTREAM: libfdt: migrate include/libfdt_env.h to a wrapper
    
    libfdt_env.h is supposed to provide system-dependent defines.
    
    scripts/dtc/libfdt/libfdt_env.h from upstream DTC is suitable
    for user-space, so we should use this for USE_HOSTCC case.
    
    For compiling U-Boot, we need to override such system-dependent
    defines, so use <linux/libfdt_env.h> imported from Linux.
    
    <libfdt.h> selects a proper one.  Maybe, we should split header
    inclusion completely, but I do not want too many patches at one.
    
    I can rip off the include/libfdt_env.h from HOST_EXTRACFLAGS.
    
    Change-Id: I6f5ea1067cd3ada1c8ece0c39b7bf43382c58ff6
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/libfdt_env.h b/include/libfdt_env.h
index ea26979fc2..d7e9d32863 100644
--- a/include/libfdt_env.h
+++ b/include/libfdt_env.h
@@ -1,24 +1,5 @@
-/*
- * libfdt - Flat Device Tree manipulation (build/run environment adaptation)
- * Copyright (C) 2007 Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com
- * Original version written by David Gibson, IBM Corporation.
- *
- * SPDX-License-Identifier:	LGPL-2.1+
- */
-
-#ifndef _LIBFDT_ENV_H
-#define _LIBFDT_ENV_H
-
-#include "compiler.h"
-#include "linux/types.h"
-
-typedef __be16 fdt16_t;
-typedef __be32 fdt32_t;
-typedef __be64 fdt64_t;
-
-#define fdt32_to_cpu(x)		be32_to_cpu(x)
-#define cpu_to_fdt32(x)		cpu_to_be32(x)
-#define fdt64_to_cpu(x)		be64_to_cpu(x)
-#define cpu_to_fdt64(x)		cpu_to_be64(x)
-
-#endif /* _LIBFDT_ENV_H */
+#ifdef USE_HOSTCC
+#include "../scripts/dtc/libfdt/libfdt_env.h"
+#else
+#include <linux/libfdt_env.h>
+#endif
diff --git a/tools/Makefile b/tools/Makefile
index 73701a814b..ebbd8930d9 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -253,7 +253,7 @@ endif # !LOGO_BMP
 # Define __KERNEL_STRICT_NAMES to prevent typedef overlaps
 # Define _GNU_SOURCE to obtain the getline prototype from stdio.h
 #
-HOST_EXTRACFLAGS += -include $(srctree)/include/libfdt_env.h \
+HOST_EXTRACFLAGS += -include $(srctree)/include/compiler.h \
 		$(patsubst -I%,-idirafter%, $(filter -I%, $(UBOOTINCLUDE))) \
 		-I$(srctree)/lib/libfdt \
 		-I$(srctree)/tools \

commit c78841b69b6e99434769070b1bb5b00f2c2681f1
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Wed Mar 21 18:03:33 2018 +0900

    UPSTREAM: libfdt: move FDT_RAMDISK_OVERHEAD to image-fdt.c
    
    This macro is locally referenced in common/image-fdt.c
    
    Change-Id: Iaf308d919d666be2615ef8f894099c538366e89d
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/image-fdt.c b/common/image-fdt.c
index 94e53d47b1..76e8230226 100644
--- a/common/image-fdt.c
+++ b/common/image-fdt.c
@@ -22,6 +22,9 @@
 #define CONFIG_SYS_FDT_PAD 0x3000
 #endif
 
+/* adding a ramdisk needs 0x44 bytes in version 2008.10 */
+#define FDT_RAMDISK_OVERHEAD	0x80
+
 DECLARE_GLOBAL_DATA_PTR;
 
 static void fdt_error(const char *msg)
diff --git a/include/libfdt.h b/include/libfdt.h
index dbc56ec62e..de5743bfa7 100755
--- a/include/libfdt.h
+++ b/include/libfdt.h
@@ -8,7 +8,4 @@
 
 extern struct fdt_header *working_fdt;	/* Pointer to the working fdt */
 
-/* adding a ramdisk needs 0x44 bytes in version 2008.10 */
-#define FDT_RAMDISK_OVERHEAD	0x80
-
 #endif /* UBOOT_LIBFDT_H */

commit f976fdd5c9b8cd35542785893984a98d2de948df
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Sun Jan 21 19:19:16 2018 +0900

    UPSTREAM: libfdt: move working_fdt and FDT_RAMDISK_OVERHEAD to include/libfdt.h
    
    libfdt_env.h exists to contain system-dependent defines:
    
      - typedef of fdt*_t
      - fdt*_to_cpu(), cpu_to_fdt*
    
    working_fdt and FDT_RAMDISK_OVERHEAD are unrelated to the environment,
    so they must get out of this header.
    
    Change-Id: Ib37fbe1ef1926d9a1696f541fd356b493d5d4db7
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/libfdt.h b/include/libfdt.h
index 7ba13e634b..dbc56ec62e 100755
--- a/include/libfdt.h
+++ b/include/libfdt.h
@@ -1 +1,14 @@
+#ifndef UBOOT_LIBFDT_H
+#define UBOOT_LIBFDT_H
+/*
+ * SPDX-License-Identifier:     GPL-2.0+ BSD-2-Clause
+ */
+
 #include "../lib/libfdt/libfdt.h"
+
+extern struct fdt_header *working_fdt;	/* Pointer to the working fdt */
+
+/* adding a ramdisk needs 0x44 bytes in version 2008.10 */
+#define FDT_RAMDISK_OVERHEAD	0x80
+
+#endif /* UBOOT_LIBFDT_H */
diff --git a/include/libfdt_env.h b/include/libfdt_env.h
index 273b5d30f8..ea26979fc2 100644
--- a/include/libfdt_env.h
+++ b/include/libfdt_env.h
@@ -12,8 +12,6 @@
 #include "compiler.h"
 #include "linux/types.h"
 
-extern struct fdt_header *working_fdt;  /* Pointer to the working fdt */
-
 typedef __be16 fdt16_t;
 typedef __be32 fdt32_t;
 typedef __be64 fdt64_t;
@@ -23,7 +21,4 @@ typedef __be64 fdt64_t;
 #define fdt64_to_cpu(x)		be64_to_cpu(x)
 #define cpu_to_fdt64(x)		cpu_to_be64(x)
 
-/* adding a ramdisk needs 0x44 bytes in version 2008.10 */
-#define FDT_RAMDISK_OVERHEAD	0x80
-
 #endif /* _LIBFDT_ENV_H */

commit 260eab18736e797f65a0a14c691ddaeb2f4e32a9
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Dec 21 11:07:52 2018 +0800

    rockchip: video: use common API instead of private
    
    We can use fdtdec_get_is_enabled() instead of fdt_device_is_available().
    
    Change-Id: I7aa03ed82f83fc72206659889a4f7f095dc66b36
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_drm_tve.c b/drivers/video/drm/rockchip_drm_tve.c
index 91748be98b..7c68ca7931 100644
--- a/drivers/video/drm/rockchip_drm_tve.c
+++ b/drivers/video/drm/rockchip_drm_tve.c
@@ -287,7 +287,7 @@ static int rockchip_drm_tve_init(struct display_state *state)
 	}
 #endif
 
-	if (!fdt_device_is_available(gd->fdt_blob, node)) {
+	if (!fdtdec_get_is_enabled(gd->fdt_blob, node)) {
 		printf("tve is disabled\n");
 		goto err;
 	}
diff --git a/lib/libfdt/fdt_ro.c b/lib/libfdt/fdt_ro.c
index 49c3cddc6f..14ead04480 100755
--- a/lib/libfdt/fdt_ro.c
+++ b/lib/libfdt/fdt_ro.c
@@ -703,26 +703,3 @@ int fdt_node_offset_by_compatible(const void *fdt, int startoffset,
 
 	return offset; /* error from fdt_next_node() */
 }
-
-
-/**
- *  of_device_is_available - check if a device is available for use
- *
- *  @device: Node to check for availability
- *
- *  Returns 1 if the status property is absent or set to "okay" or "ok",
- *  0 otherwise
- */
-int fdt_device_is_available(const void *blob, int node)
-{
-	const char *cell;
-	cell = fdt_getprop(blob, node, "status", NULL);
-	if (cell) {
-		if (!strcmp(cell, "okay") || !strcmp(cell, "ok"))
-			return 1;
-	} else {
-		return 1;
-	}
-	return 0;
-}
-

commit 1f4079200dac1639a89120dc8eee77dbcabf9223
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Mon Dec 17 17:58:22 2018 +0800

    configs: rk3399pro: support io-domain driver
    
    Change-Id: I332a9be7e45746089e869bec2f8d3846a296cc84
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/configs/rk3399pro_defconfig b/configs/rk3399pro_defconfig
index bde4f091dd..862689987e 100644
--- a/configs/rk3399pro_defconfig
+++ b/configs/rk3399pro_defconfig
@@ -70,6 +70,8 @@ CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
 CONFIG_POWER_FG_RK818=y
+CONFIG_IO_DOMAIN=y
+CONFIG_ROCKCHIP_IO_DOMAIN=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y

commit dae202865e450295f70bc2b9ed110c7fdef5a5c7
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Mon Dec 17 17:56:40 2018 +0800

    rockchip: board: add io-domain init
    
    Change-Id: I073cb6567e8becfdb1be09c7faef3c06b308dc6f
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index e86191fd00..230a1e2302 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -23,6 +23,9 @@
 #ifdef CONFIG_DM_DVFS
 #include <dvfs.h>
 #endif
+#ifdef CONFIG_ROCKCHIP_IO_DOMAIN
+#include <io-domain.h>
+#endif
 #ifdef CONFIG_DM_REGULATOR
 #include <power/regulator.h>
 #endif
@@ -232,6 +235,11 @@ int board_init(void)
 	if (ret)
 		debug("%s: Cannot enable boot on regulator\n", __func__);
 #endif
+
+#ifdef CONFIG_ROCKCHIP_IO_DOMAIN
+	io_domain_init();
+#endif
+
 	set_armclk_rate();
 
 #ifdef CONFIG_DM_DVFS

commit 4f43646e3628de1a420479d1c38d0f9e1544fb94
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Fri Dec 14 11:55:36 2018 +0800

    power: rockchip: add io-domain driver
    
    The io-domains on Rockchip SoCs will be supplied with 1.8V or 3.3V(3.0V)
    depends on hardware design. The driver needs to config them through grf
    register.
    
    Change-Id: Ic896b94bfadd0b808da54992e58e2cf4a8fee950
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/Makefile b/Makefile
index 7060da1c5f..efedc288d4 100644
--- a/Makefile
+++ b/Makefile
@@ -672,7 +672,8 @@ libs-y += drivers/power/ \
 	drivers/power/pmic/ \
 	drivers/power/battery/ \
 	drivers/power/regulator/ \
-	drivers/power/dvfs/
+	drivers/power/dvfs/ \
+	drivers/power/io-domain/
 libs-y += drivers/spi/
 libs-$(CONFIG_FMAN_ENET) += drivers/net/fm/
 libs-$(CONFIG_SYS_FSL_DDR) += drivers/ddr/fsl/
diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index adf5ff58bf..608df55cca 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -4,6 +4,8 @@ source "drivers/power/domain/Kconfig"
 
 source "drivers/power/fuel_gauge/Kconfig"
 
+source "drivers/power/io-domain/Kconfig"
+
 source "drivers/power/pmic/Kconfig"
 
 source "drivers/power/regulator/Kconfig"
diff --git a/drivers/power/io-domain/Kconfig b/drivers/power/io-domain/Kconfig
new file mode 100644
index 0000000000..1c71e0a9a2
--- /dev/null
+++ b/drivers/power/io-domain/Kconfig
@@ -0,0 +1,19 @@
+menu "IO Domain Support"
+
+config IO_DOMAIN
+	bool "Enable io domain support using Driver Model"
+	depends on DM && OF_CONTROL
+	help
+	  Enable support for the io domain driver class. Many SoCs allow
+	  power to be applied to or removed from portions of the SoC (io
+	  domains). This may be used to save power. This API provides the
+	  means to control such power management hardware.
+
+config ROCKCHIP_IO_DOMAIN
+	bool "Enable the rockchip io domain driver"
+	depends on IO_DOMAIN && ARCH_ROCKCHIP
+	help
+	  Enable support for manipulating ROCKCHIP io domains via MMIO mapped
+	  registers.
+
+endmenu
diff --git a/drivers/power/io-domain/Makefile b/drivers/power/io-domain/Makefile
new file mode 100644
index 0000000000..f1e7af71d2
--- /dev/null
+++ b/drivers/power/io-domain/Makefile
@@ -0,0 +1,6 @@
+# Copyright (c) 2018 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier: GPL-2.0
+
+obj-$(CONFIG_IO_DOMAIN) += io-domain-uclass.o
+obj-$(CONFIG_ROCKCHIP_IO_DOMAIN) += rockchip-io-domain.o
diff --git a/drivers/power/io-domain/io-domain-uclass.c b/drivers/power/io-domain/io-domain-uclass.c
new file mode 100644
index 0000000000..7d5139e3c1
--- /dev/null
+++ b/drivers/power/io-domain/io-domain-uclass.c
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier:     GPL-2.0+
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <console.h>
+#include <io-domain.h>
+
+void io_domain_init(void)
+{
+	int ret;
+	struct udevice *dev;
+
+	ret = uclass_get_device(UCLASS_IO_DOMAIN, 0, &dev);
+	if (ret)
+		printf("Can't find UCLASS_IO_DOMAIN driver %d\n", ret);
+}
+
+UCLASS_DRIVER(io_domain) = {
+	.id		= UCLASS_IO_DOMAIN,
+	.name		= "io_domain",
+};
diff --git a/drivers/power/io-domain/rockchip-io-domain.c b/drivers/power/io-domain/rockchip-io-domain.c
new file mode 100644
index 0000000000..ced9fd4f49
--- /dev/null
+++ b/drivers/power/io-domain/rockchip-io-domain.c
@@ -0,0 +1,620 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/of_access.h>
+#include <regmap.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+#include <fdtdec.h>
+#include <linux/compat.h>
+#include <linux/err.h>
+#include <power/regulator.h>
+
+#define MAX_SUPPLIES		16
+
+/*
+ * The max voltage for 1.8V and 3.3V come from the Rockchip datasheet under
+ * "Recommended Operating Conditions" for "Digital GPIO".   When the typical
+ * is 3.3V the max is 3.6V.  When the typical is 1.8V the max is 1.98V.
+ *
+ * They are used like this:
+ * - If the voltage on a rail is above the "1.8" voltage (1.98V) we'll tell the
+ *   SoC we're at 3.3.
+ * - If the voltage on a rail is above the "3.3" voltage (3.6V) we'll consider
+ *   that to be an error.
+ */
+#define MAX_VOLTAGE_1_8	1980000
+#define MAX_VOLTAGE_3_3	3600000
+
+#define PX30_IO_VSEL			0x180
+#define PX30_IO_VSEL_VCCIO6_SRC		BIT(0)
+#define PX30_IO_VSEL_VCCIO6_SUPPLY_NUM	1
+
+#define RK3288_SOC_CON2			0x24c
+#define RK3288_SOC_CON2_FLASH0		BIT(7)
+#define RK3288_SOC_FLASH_SUPPLY_NUM	2
+
+#define RK3308_SOC_CON0			0x300
+#define RK3308_SOC_CON0_VCCIO3		BIT(8)
+#define RK3308_SOC_VCCIO3_SUPPLY_NUM	3
+
+#define RK3328_SOC_CON4			0x410
+#define RK3328_SOC_CON4_VCCIO2		BIT(7)
+#define RK3328_SOC_VCCIO2_SUPPLY_NUM	1
+
+#define RK3366_SOC_CON6			0x418
+#define RK3366_SOC_CON6_FLASH0		BIT(14)
+#define RK3366_SOC_FLASH_SUPPLY_NUM	2
+
+#define RK3368_SOC_CON15		0x43c
+#define RK3368_SOC_CON15_FLASH0		BIT(14)
+#define RK3368_SOC_FLASH_SUPPLY_NUM	2
+
+#define RK3399_PMUGRF_CON0		0x180
+#define RK3399_PMUGRF_CON0_VSEL		BIT(8)
+#define RK3399_PMUGRF_VSEL_SUPPLY_NUM	9
+
+struct rockchip_iodomain_priv;
+
+/**
+ * @supplies: voltage settings matching the register bits.
+ */
+struct rockchip_iodomain_soc_data {
+	int grf_offset;
+	const char *supply_names[MAX_SUPPLIES];
+	void (*init)(struct rockchip_iodomain_priv *iod);
+};
+
+struct rockchip_iodomain_supply {
+	struct rockchip_iodomain_priv *iod;
+	struct udevice *reg;
+	int idx;
+};
+
+struct rockchip_iodomain_priv {
+	struct regmap *regmap_base;
+	struct rockchip_iodomain_soc_data *sdata;
+	struct rockchip_iodomain_supply supplies[MAX_SUPPLIES];
+};
+
+static int rockchip_ofdata_to_platdata(struct udevice *dev)
+{
+	struct rockchip_iodomain_priv *priv = dev_get_priv(dev);
+	struct regmap *regmap;
+
+	/* get grf-reg base address */
+	regmap = syscon_get_regmap_by_driver_data(ROCKCHIP_SYSCON_GRF);
+	if (IS_ERR(regmap))
+		return PTR_ERR(regmap);
+
+	priv->regmap_base = regmap;
+
+	return 0;
+}
+
+static int rockchip_iodomain_write(struct rockchip_iodomain_supply *supply,
+				   int uV)
+{
+	struct rockchip_iodomain_priv *priv = supply->iod;
+	struct regmap *regmap = priv->regmap_base;
+	u32 val;
+	int ret;
+
+	/* set value bit */
+	val = (uV > MAX_VOLTAGE_1_8) ? 0 : 1;
+	val <<= supply->idx;
+
+	/* apply hiword-mask */
+	val |= (BIT(supply->idx) << 16);
+
+	ret = regmap_write(regmap, priv->sdata->grf_offset, val);
+	if (ret) {
+		dev_err(priv->dev, "Couldn't write to GRF\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+static void px30_iodomain_init(struct rockchip_iodomain_priv *iod)
+{
+	int ret;
+	u32 val;
+
+	/* if no VCCIO0 supply we should leave things alone */
+	if (!iod->supplies[PX30_IO_VSEL_VCCIO6_SUPPLY_NUM].reg)
+		return;
+
+	/*
+	 * set vccio0 iodomain to also use this framework
+	 * instead of a special gpio.
+	 */
+	val = PX30_IO_VSEL_VCCIO6_SRC | (PX30_IO_VSEL_VCCIO6_SRC << 16);
+	ret = regmap_write(iod->regmap_base, PX30_IO_VSEL, val);
+	if (ret < 0)
+		dev_warn(iod->dev, "couldn't update vccio0 ctrl\n");
+}
+
+static void rk3288_iodomain_init(struct rockchip_iodomain_priv *iod)
+{
+	int ret;
+	u32 val;
+
+	/* if no flash supply we should leave things alone */
+	if (!iod->supplies[RK3288_SOC_FLASH_SUPPLY_NUM].reg)
+		return;
+
+	/*
+	 * set flash0 iodomain to also use this framework
+	 * instead of a special gpio.
+	 */
+	val = RK3288_SOC_CON2_FLASH0 | (RK3288_SOC_CON2_FLASH0 << 16);
+	ret = regmap_write(iod->regmap_base, RK3288_SOC_CON2, val);
+	if (ret < 0)
+		dev_warn(iod->dev, "couldn't update flash0 ctrl\n");
+}
+
+static void rk3308_iodomain_init(struct rockchip_iodomain_priv *iod)
+{
+	int ret;
+	u32 val;
+
+	/* if no vccio3 supply we should leave things alone */
+	if (!iod->supplies[RK3308_SOC_VCCIO3_SUPPLY_NUM].reg)
+		return;
+
+	/*
+	 * set vccio3 iodomain to also use this framework
+	 * instead of a special gpio.
+	 */
+	val = RK3308_SOC_CON0_VCCIO3 | (RK3308_SOC_CON0_VCCIO3 << 16);
+	ret = regmap_write(iod->regmap_base, RK3308_SOC_CON0, val);
+	if (ret < 0)
+		dev_warn(iod->dev, "couldn't update vccio3 vsel ctrl\n");
+}
+
+static void rk3328_iodomain_init(struct rockchip_iodomain_priv *iod)
+{
+	int ret;
+	u32 val;
+
+	/* if no vccio2 supply we should leave things alone */
+	if (!iod->supplies[RK3328_SOC_VCCIO2_SUPPLY_NUM].reg)
+		return;
+
+	/*
+	 * set vccio2 iodomain to also use this framework
+	 * instead of a special gpio.
+	 */
+	val = RK3328_SOC_CON4_VCCIO2 | (RK3328_SOC_CON4_VCCIO2 << 16);
+	ret = regmap_write(iod->regmap_base, RK3328_SOC_CON4, val);
+	if (ret < 0)
+		dev_warn(iod->dev, "couldn't update vccio2 vsel ctrl\n");
+}
+
+static void rk3366_iodomain_init(struct rockchip_iodomain_priv *iod)
+{
+	int ret;
+	u32 val;
+
+	/* if no flash supply we should leave things alone */
+	if (!iod->supplies[RK3366_SOC_FLASH_SUPPLY_NUM].reg)
+		return;
+
+	/*
+	 * set flash0 iodomain to also use this framework
+	 * instead of a special gpio.
+	 */
+	val = RK3366_SOC_CON6_FLASH0 | (RK3366_SOC_CON6_FLASH0 << 16);
+	ret = regmap_write(iod->regmap_base, RK3368_SOC_CON15, val);
+	if (ret < 0)
+		dev_warn(iod->dev, "couldn't update flash0 ctrl\n");
+}
+
+static void rk3368_iodomain_init(struct rockchip_iodomain_priv *iod)
+{
+	int ret;
+	u32 val;
+
+	/* if no flash supply we should leave things alone */
+	if (!iod->supplies[RK3368_SOC_FLASH_SUPPLY_NUM].reg)
+		return;
+
+	/*
+	 * set flash0 iodomain to also use this framework
+	 * instead of a special gpio.
+	 */
+	val = RK3368_SOC_CON15_FLASH0 | (RK3368_SOC_CON15_FLASH0 << 16);
+	ret = regmap_write(iod->regmap_base, RK3368_SOC_CON15, val);
+	if (ret < 0)
+		dev_warn(iod->dev, "couldn't update flash0 ctrl\n");
+}
+
+static void rk3399_pmu_iodomain_init(struct rockchip_iodomain_priv *iod)
+{
+	int ret;
+	u32 val;
+
+	/* if no pmu io supply we should leave things alone */
+	if (!iod->supplies[RK3399_PMUGRF_VSEL_SUPPLY_NUM].reg)
+		return;
+
+	/*
+	 * set pmu io iodomain to also use this framework
+	 * instead of a special gpio.
+	 */
+	val = RK3399_PMUGRF_CON0_VSEL | (RK3399_PMUGRF_CON0_VSEL << 16);
+	ret = regmap_write(iod->regmap_base, RK3399_PMUGRF_CON0, val);
+	if (ret < 0)
+		dev_warn(iod->dev, "couldn't update pmu io iodomain ctrl\n");
+}
+
+static const struct rockchip_iodomain_soc_data soc_data_px30 = {
+	.grf_offset = 0x180,
+	.supply_names = {
+		NULL,
+		"vccio6",
+		"vccio1",
+		"vccio2",
+		"vccio3",
+		"vccio4",
+		"vccio5",
+		"vccio-oscgpi",
+	},
+	.init = px30_iodomain_init,
+};
+
+static const struct rockchip_iodomain_soc_data soc_data_px30_pmu = {
+	.grf_offset = 0x100,
+	.supply_names = {
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		"pmuio1",
+		"pmuio2",
+	},
+};
+
+/*
+ * On the rk3188 the io-domains are handled by a shared register with the
+ * lower 8 bits being still being continuing drive-strength settings.
+ */
+static const struct rockchip_iodomain_soc_data soc_data_rk3188 = {
+	.grf_offset = 0x104,
+	.supply_names = {
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		"ap0",
+		"ap1",
+		"cif",
+		"flash",
+		"vccio0",
+		"vccio1",
+		"lcdc0",
+		"lcdc1",
+	},
+};
+
+static const struct rockchip_iodomain_soc_data soc_data_rk322x = {
+	.grf_offset = 0x418,
+	.supply_names = {
+		"vccio1",
+		"vccio2",
+		"vccio3",
+		"vccio4",
+	},
+};
+
+static const struct rockchip_iodomain_soc_data soc_data_rk3288 = {
+	.grf_offset = 0x380,
+	.supply_names = {
+		"lcdc",		/* LCDC_VDD */
+		"dvp",		/* DVPIO_VDD */
+		"flash0",	/* FLASH0_VDD (emmc) */
+		"flash1",	/* FLASH1_VDD (sdio1) */
+		"wifi",		/* APIO3_VDD  (sdio0) */
+		"bb",		/* APIO5_VDD */
+		"audio",	/* APIO4_VDD */
+		"sdcard",	/* SDMMC0_VDD (sdmmc) */
+		"gpio30",	/* APIO1_VDD */
+		"gpio1830",	/* APIO2_VDD */
+	},
+	.init = rk3288_iodomain_init,
+};
+
+static const struct rockchip_iodomain_soc_data soc_data_rk3308 = {
+	.grf_offset = 0x300,
+	.supply_names = {
+		"vccio0",
+		"vccio1",
+		"vccio2",
+		"vccio3",
+		"vccio4",
+		"vccio5",
+	},
+	.init = rk3308_iodomain_init,
+};
+
+static const struct rockchip_iodomain_soc_data soc_data_rk3328 = {
+	.grf_offset = 0x410,
+	.supply_names = {
+		"vccio1",
+		"vccio2",
+		"vccio3",
+		"vccio4",
+		"vccio5",
+		"vccio6",
+		"pmuio",
+	},
+	.init = rk3328_iodomain_init,
+};
+
+static const struct rockchip_iodomain_soc_data soc_data_rk3366 = {
+	.grf_offset = 0x900,
+	.supply_names = {
+		"lcdc",         /* LCDC_IOVDD */
+		"dvpts",        /* DVP_IOVDD */
+		"flash",        /* FLASH_IOVDD (emmc) */
+		"wifibt",       /* APIO1_IOVDD */
+		NULL,
+		"audio",        /* AUDIO_IODVDD */
+		"sdcard",       /* SDMMC_IOVDD (sdmmc) */
+		"tphdsor",      /* APIO2_IOVDD */
+	},
+	.init = rk3366_iodomain_init,
+};
+
+static const struct rockchip_iodomain_soc_data soc_data_rk3368 = {
+	.grf_offset = 0x900,
+	.supply_names = {
+		NULL,		/* reserved */
+		"dvp",		/* DVPIO_VDD */
+		"flash0",	/* FLASH0_VDD (emmc) */
+		"wifi",		/* APIO2_VDD (sdio0) */
+		NULL,
+		"audio",	/* APIO3_VDD */
+		"sdcard",	/* SDMMC0_VDD (sdmmc) */
+		"gpio30",	/* APIO1_VDD */
+		"gpio1830",	/* APIO4_VDD (gpujtag) */
+	},
+	.init = rk3368_iodomain_init,
+};
+
+static const struct rockchip_iodomain_soc_data soc_data_rk3368_pmu = {
+	.grf_offset = 0x100,
+	.supply_names = {
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		"pmu",	        /*PMU IO domain*/
+		"vop",	        /*LCDC IO domain*/
+	},
+};
+
+static const struct rockchip_iodomain_soc_data soc_data_rk3399 = {
+	.grf_offset = 0xe640,
+	.supply_names = {
+		"bt656",		/* APIO2_VDD */
+		"audio",		/* APIO5_VDD */
+		"sdmmc",		/* SDMMC0_VDD */
+		"gpio1830",		/* APIO4_VDD */
+	},
+};
+
+static const struct rockchip_iodomain_soc_data soc_data_rk3399_pmu = {
+	.grf_offset = 0x180,
+	.supply_names = {
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		"pmu1830",		/* PMUIO2_VDD */
+	},
+	.init = rk3399_pmu_iodomain_init,
+};
+
+static const struct rockchip_iodomain_soc_data soc_data_rv1108 = {
+	.grf_offset = 0x404,
+	.supply_names = {
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		"vccio1",
+		"vccio2",
+		"vccio3",
+		"vccio5",
+		"vccio6",
+	},
+
+};
+
+static const struct rockchip_iodomain_soc_data soc_data_rv1108_pmu = {
+	.grf_offset = 0x104,
+	.supply_names = {
+		"pmu",
+	},
+};
+
+static struct udevice *of_get_regulator(ofnode node, const char *supply)
+{
+	char sname[32]; /* 32 is max size of property name */
+	struct udevice *sudev;
+	ofnode snode;
+	u32 phandle;
+	int ret;
+
+	snprintf(sname, 32, "%s-supply", supply);
+
+	/* Get regulator and clk */
+	if (!ofnode_read_u32(node, sname, &phandle)) {
+		snode = ofnode_get_by_phandle(phandle);
+		ret = regulator_get_by_devname(snode.np->name, &sudev);
+		if (ret) {
+			printf("%s: %s: Get supply(%s) failed, ret=%d",
+			       __func__,
+			       sudev->name, snode.np->full_name, ret);
+			return NULL;
+		}
+		debug("IO-DOMAIN: supply: %s\n", snode.np->full_name);
+	}
+
+	return sudev;
+}
+
+static int rockchip_iodomain_probe(struct udevice *dev)
+{
+	struct rockchip_iodomain_priv *priv = dev_get_priv(dev);
+	struct rockchip_iodomain_soc_data *sdata;
+	int i, ret;
+
+	sdata = (struct rockchip_iodomain_soc_data *)dev_get_driver_data(dev);
+	priv->sdata = sdata;
+
+	if (!priv->regmap_base)
+		return -1;
+
+	for (i = 0; i < MAX_SUPPLIES; i++) {
+		const char *supply_name = priv->sdata->supply_names[i];
+		struct rockchip_iodomain_supply *supply = &priv->supplies[i];
+		struct udevice *reg;
+		u32 uV;
+
+		if (!supply_name)
+			continue;
+
+		reg = of_get_regulator(dev_ofnode(dev), supply_name);
+		if (!reg) {
+			printf("could not find regulator %s\n", supply_name);
+			return -1;
+		}
+
+		uV = regulator_get_value(reg);
+		if (uV < 0) {
+			printf("could not get voltage from %s\n", reg->name);
+			return -1;
+		}
+
+		if (uV > MAX_VOLTAGE_3_3) {
+			printf("%d uV is too high from %s\n", uV, reg->name);
+			return -1;
+		}
+
+		/* setup our supply */
+		supply->idx = i;
+		supply->iod = priv;
+		supply->reg = reg;
+
+		ret = rockchip_iodomain_write(supply, uV);
+		if (ret)
+			supply->reg = NULL;
+	}
+
+	if (priv->sdata->init)
+		priv->sdata->init(priv);
+
+	return 0;
+}
+
+static const struct udevice_id rockchip_iodomain_match[] = {
+	{
+		.compatible = "rockchip,px30-io-voltage-domain",
+		.data = (ulong)&soc_data_px30
+	},
+	{
+		.compatible = "rockchip,px30-pmu-io-voltage-domain",
+		.data = (ulong)&soc_data_px30_pmu
+	},
+	{
+		.compatible = "rockchip,rk3188-io-voltage-domain",
+		.data = (ulong)&soc_data_rk3188
+	},
+	{
+		.compatible = "rockchip,rk322x-io-voltage-domain",
+		.data = (ulong)&soc_data_rk322x
+	},
+	{
+		.compatible = "rockchip,rk3288-io-voltage-domain",
+		.data = (ulong)&soc_data_rk3288
+	},
+	{
+		.compatible = "rockchip,rk3308-io-voltage-domain",
+		.data = (ulong)&soc_data_rk3308
+	},
+	{
+		.compatible = "rockchip,rk3328-io-voltage-domain",
+		.data = (ulong)&soc_data_rk3328
+	},
+	{
+		.compatible = "rockchip,rk3366-io-voltage-domain",
+		.data = (ulong)&soc_data_rk3366
+	},
+	{
+		.compatible = "rockchip,rk3368-io-voltage-domain",
+		.data = (ulong)&soc_data_rk3368
+	},
+	{
+		.compatible = "rockchip,rk3368-pmu-io-voltage-domain",
+		.data = (ulong)&soc_data_rk3368_pmu
+	},
+	{
+		.compatible = "rockchip,rk3399-io-voltage-domain",
+		.data = (ulong)&soc_data_rk3399
+	},
+	{
+		.compatible = "rockchip,rk3399-pmu-io-voltage-domain",
+		.data = (ulong)&soc_data_rk3399_pmu
+	},
+	{
+		.compatible = "rockchip,rv1108-io-voltage-domain",
+		.data = (ulong)&soc_data_rv1108
+	},
+	{
+		.compatible = "rockchip,rv1108-pmu-io-voltage-domain",
+		.data = (ulong)&soc_data_rv1108_pmu
+	},
+	{ /* sentinel */ },
+};
+
+U_BOOT_DRIVER(io_domain) = {
+	.name		= "io_domain",
+	.id		= UCLASS_IO_DOMAIN,
+	.of_match	= rockchip_iodomain_match,
+	.priv_auto_alloc_size = sizeof(struct rockchip_iodomain_priv),
+	.ofdata_to_platdata	= rockchip_ofdata_to_platdata,
+	.probe		= rockchip_iodomain_probe,
+};
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index addf27639b..76c5eb7d88 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -99,6 +99,7 @@ enum uclass_id {
 	UCLASS_RC,		/* Remote Controller */
 	UCLASS_CHARGE_DISPLAY,	/* Charge display */
 	UCLASS_DVFS,		/* DVFS policy */
+	UCLASS_IO_DOMAIN,	/* IO domain */
 
 	UCLASS_COUNT,
 	UCLASS_INVALID = -1,
diff --git a/include/io-domain.h b/include/io-domain.h
new file mode 100644
index 0000000000..a52b9a7e37
--- /dev/null
+++ b/include/io-domain.h
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _IO_DOMAIN_H_
+#define _IO_DOMAIN_H_
+
+#include <dm.h>
+
+/**
+ * io_domain_init() - init io-domain driver
+ */
+void io_domain_init(void);
+
+#endif	/* _IO_DOMAIN_H_ */

commit 32c25d1fa3871a2f60767be3c8f24d903503c464
Author: David Wu <david.wu@rock-chips.com>
Date:   Mon Jul 23 10:57:08 2018 +0800

    pinctrl: rockchip: Add slew rate support for px30
    
    The usage of slew rate is needed to config it at DTS,
    such as:
      fast speed: slew-rate = <1>;
      slew speed: slew-rate = <0>;
    
    Change-Id: I60ea4ddd37ca70adf1dbd504ba1c3c348e41348b
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 70ad8640d7..c45ee11001 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -325,6 +325,9 @@ struct rockchip_pin_ctrl {
 	int	(*schmitt_calc_reg)(struct rockchip_pin_bank *bank,
 				    int pin_num, struct regmap **regmap,
 				    int *reg, u8 *bit);
+	int	(*slew_rate_calc_reg)(struct rockchip_pin_bank *bank,
+				      int pin_num, struct regmap **regmap,
+				      int *reg, u8 *bit);
 };
 
 /**
@@ -2376,6 +2379,59 @@ static int rockchip_set_schmitt(struct rockchip_pin_bank *bank,
 	return regmap_write(regmap, reg, data);
 }
 
+#define PX30_SLEW_RATE_PMU_OFFSET		0x30
+#define PX30_SLEW_RATE_GRF_OFFSET		0x90
+#define PX30_SLEW_RATE_PINS_PER_PMU_REG		16
+#define PX30_SLEW_RATE_BANK_STRIDE		16
+#define PX30_SLEW_RATE_PINS_PER_GRF_REG		8
+
+static int px30_calc_slew_rate_reg_and_bit(struct rockchip_pin_bank *bank,
+					   int pin_num,
+					   struct regmap **regmap,
+					   int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	int pins_per_reg;
+
+	if (bank->bank_num == 0) {
+		*regmap = priv->regmap_pmu;
+		*reg = PX30_SLEW_RATE_PMU_OFFSET;
+		pins_per_reg = PX30_SCHMITT_PINS_PER_PMU_REG;
+	} else {
+		*regmap = priv->regmap_base;
+		*reg = PX30_SCHMITT_GRF_OFFSET;
+		pins_per_reg = PX30_SCHMITT_PINS_PER_GRF_REG;
+		*reg += (bank->bank_num  - 1) * PX30_SCHMITT_BANK_STRIDE;
+	}
+	*reg += ((pin_num / pins_per_reg) * 4);
+	*bit = pin_num % pins_per_reg;
+
+	return 0;
+}
+
+static int rockchip_set_slew_rate(struct rockchip_pin_bank *bank,
+				  int pin_num, int speed)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	struct rockchip_pin_ctrl *ctrl = priv->ctrl;
+	struct regmap *regmap;
+	int reg, ret;
+	u8 bit;
+	u32 data;
+
+	debug("setting slew rate of GPIO%d-%d to %d\n", bank->bank_num,
+	      pin_num, speed);
+
+	ret = ctrl->slew_rate_calc_reg(bank, pin_num, &regmap, &reg, &bit);
+	if (ret)
+		return ret;
+
+	/* enable the write to the equivalent lower bits */
+	data = BIT(bit + 16) | (speed << bit);
+
+	return regmap_write(regmap, reg, data);
+}
+
 /*
  * Pinconf_ops handling
  */
@@ -2451,6 +2507,16 @@ static int rockchip_pinconf_set(struct rockchip_pin_bank *bank,
 			return rc;
 		break;
 
+	case PIN_CONFIG_SLEW_RATE:
+		if (!ctrl->slew_rate_calc_reg)
+			return -ENOTSUPP;
+
+		rc = rockchip_set_slew_rate(bank,
+					    pin - bank->pin_base, arg);
+		if (rc < 0)
+			return rc;
+		break;
+
 	default:
 		break;
 	}
@@ -2468,6 +2534,7 @@ static const struct pinconf_param rockchip_conf_params[] = {
 	{ "input-disable", PIN_CONFIG_INPUT_ENABLE, 0 },
 	{ "input-schmitt-disable", PIN_CONFIG_INPUT_SCHMITT_ENABLE, 0 },
 	{ "input-schmitt-enable", PIN_CONFIG_INPUT_SCHMITT_ENABLE, 1 },
+	{ "slew-rate", PIN_CONFIG_SLEW_RATE, 0 },
 };
 
 static int rockchip_pinconf_prop_name_to_param(const char *property,
@@ -2849,6 +2916,7 @@ static struct rockchip_pin_ctrl px30_pin_ctrl = {
 		.pull_calc_reg		= px30_calc_pull_reg_and_bit,
 		.drv_calc_reg		= px30_calc_drv_reg_and_bit,
 		.schmitt_calc_reg	= px30_calc_schmitt_reg_and_bit,
+		.slew_rate_calc_reg	= px30_calc_slew_rate_reg_and_bit,
 };
 
 static struct rockchip_pin_bank rv1108_pin_banks[] = {

commit a1e5c945ad058e602ed83e564dd636a5e0ea24e7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Dec 21 15:12:15 2018 +0800

    rockchip: dts: rk3368: enable nandc
    
    fix model string typo.
    
    Change-Id: I1e96a986a381c86999839efd486fb371ca8ed82c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3368-evb.dts b/arch/arm/dts/rk3368-evb.dts
index 32992c3b96..7502caca5b 100644
--- a/arch/arm/dts/rk3368-evb.dts
+++ b/arch/arm/dts/rk3368-evb.dts
@@ -10,7 +10,7 @@
 #include <dt-bindings/input/input.h>
 
 / {
-	model = "Rockchip RK3399 Evaluation Board";
+	model = "Rockchip RK3368 Evaluation Board";
 	compatible = "rockchip,rk3368-evb", "rockchip,rk3368";
 };
 
@@ -53,4 +53,4 @@
 
 &usb_otg {
 	status = "okay";
-};
\ No newline at end of file
+};
diff --git a/arch/arm/dts/rk3368-u-boot.dtsi b/arch/arm/dts/rk3368-u-boot.dtsi
index 89469f2509..6e2a2ab2b4 100644
--- a/arch/arm/dts/rk3368-u-boot.dtsi
+++ b/arch/arm/dts/rk3368-u-boot.dtsi
@@ -29,6 +29,11 @@
 	status = "okay";
 };
 
+&nandc0 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 &service_msch {
 	u-boot,dm-pre-reloc;
 };
@@ -59,4 +64,4 @@
 
 &usb_otg {
 	u-boot,dm-pre-reloc;
-};
\ No newline at end of file
+};
diff --git a/arch/arm/dts/rk3368.dtsi b/arch/arm/dts/rk3368.dtsi
index 8bc18d8627..082954f212 100644
--- a/arch/arm/dts/rk3368.dtsi
+++ b/arch/arm/dts/rk3368.dtsi
@@ -380,6 +380,16 @@
 		status = "disabled";
 	};
 
+	nandc0: nandc@ff400000 {
+		compatible = "rockchip,rk-nandc";
+		reg = <0x0 0xff400000 0x0 0x4000>;
+		interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+		nandc_id = <0>;
+		clocks = <&cru SCLK_NANDC0>, <&cru HCLK_NANDC0>;
+		clock-names = "clk_nandc", "hclk_nandc";
+		status = "disabled";
+	};
+
 	uart0: serial@ff180000 {
 		compatible = "rockchip,rk3368-uart", "snps,dw-apb-uart";
 		reg = <0x0 0xff180000 0x0 0x100>;

commit 4585497ae778ba28aa945dcea664311e06d2e631
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Dec 20 09:52:12 2018 +0800

    thermal: rockchip: get "rockchip,hw-tshut-polarity" form dts node
    
    setting tshut-polarity base on the dts node parameter.
    
    Change-Id: Ie85ffd5e15676984d77d280f589c3748d74419a2
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index 0d48b8299a..798f619239 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -166,6 +166,7 @@ struct rockchip_thermal_priv {
 	void *base;
 	void *grf;
 	enum tshut_mode tshut_mode;
+	enum tshut_polarity tshut_polarity;
 	const struct rockchip_tsadc_chip *data;
 };
 
@@ -563,7 +564,7 @@ static void tsadc_init_v2(struct udevice *dev)
 	writel(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
 	       priv->base + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
 
-	if (priv->data->tshut_polarity == TSHUT_HIGH_ACTIVE)
+	if (priv->tshut_polarity == TSHUT_HIGH_ACTIVE)
 		writel(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
 		       priv->base + TSADCV2_AUTO_CON);
 	else
@@ -787,6 +788,12 @@ static int rockchip_thermal_probe(struct udevice *dev)
 	if (priv->tshut_mode < 0)
 		priv->tshut_mode = priv->data->tshut_mode;
 
+	priv->tshut_polarity = dev_read_u32_default(dev,
+						    "rockchip,hw-tshut-polarity",
+						    -1);
+	if (priv->tshut_polarity < 0)
+		priv->tshut_polarity = tsadc->tshut_polarity;
+
 	if (priv->tshut_mode == TSHUT_MODE_GPIO)
 		pinctrl_select_state(dev, "otpout");
 	else

commit e54cf6dba77ac6d2c1d495ebf95f5396402d3106
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Dec 18 10:11:41 2018 +0800

    power: regulator: add fan53555 regulator
    
    add driver support for fan53555\syr82x\tcs452x dcdc.
    
    Change-Id: Ib6132d7063ba8bda9631b45e128df1d278222dad
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/power/regulator/Kconfig b/drivers/power/regulator/Kconfig
index a11408ff2e..5b4605f5a2 100644
--- a/drivers/power/regulator/Kconfig
+++ b/drivers/power/regulator/Kconfig
@@ -51,6 +51,14 @@ config DM_REGULATOR_PFUZE100
 	features for REGULATOR PFUZE100. The driver implements get/set api for:
 	value, enable and mode.
 
+config REGULATOR_FAN53555
+	bool "Enable driver for fan53555 regulators"
+	depends on DM_REGULATOR
+	---help---
+	Enable support for the regulator functions of the fan53555 DCDC. The
+	driver implements get/set api for the various BUCK.This driver is
+	controlled by a device tree node which includes voltage limits.
+
 config REGULATOR_PWM
 	bool "Enable driver for PWM regulators"
 	depends on DM_REGULATOR
diff --git a/drivers/power/regulator/Makefile b/drivers/power/regulator/Makefile
index 18fb870e43..d582ee1bc2 100644
--- a/drivers/power/regulator/Makefile
+++ b/drivers/power/regulator/Makefile
@@ -11,6 +11,7 @@ obj-$(CONFIG_REGULATOR_AS3722)	+= as3722_regulator.o
 obj-$(CONFIG_DM_REGULATOR_MAX77686) += max77686.o
 obj-$(CONFIG_DM_REGULATOR_PFUZE100) += pfuze100.o
 obj-$(CONFIG_REGULATOR_PWM) += pwm_regulator.o
+obj-$(CONFIG_REGULATOR_FAN53555) += fan53555_regulator.o
 obj-$(CONFIG_$(SPL_)DM_REGULATOR_FIXED) += fixed.o
 obj-$(CONFIG_$(SPL_)DM_REGULATOR_GPIO) += gpio-regulator.o
 obj-$(CONFIG_REGULATOR_RK8XX) += rk8xx.o
diff --git a/drivers/power/regulator/fan53555_regulator.c b/drivers/power/regulator/fan53555_regulator.c
new file mode 100644
index 0000000000..3a3e1970d6
--- /dev/null
+++ b/drivers/power/regulator/fan53555_regulator.c
@@ -0,0 +1,506 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <asm/gpio.h>
+#include <power/regulator.h>
+#include <i2c.h>
+#include <asm/arch/clock.h>
+#include <asm/io.h>
+#include <syscon.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* Voltage setting */
+#define FAN53555_VSEL0		0x00
+#define FAN53555_VSEL1		0x01
+
+#define TCS452X_VSEL0		0x11
+#define TCS452X_VSEL1		0x10
+#define TCS452X_TIME		0x13
+#define TCS452X_COMMAND		0x14
+
+/* Control register */
+#define FAN53555_CONTROL	0x02
+/* IC Type */
+#define FAN53555_ID1		0x03
+/* IC mask version */
+#define FAN53555_ID2		0x04
+/* Monitor register */
+#define FAN53555_MONITOR	0x05
+
+/* VSEL bit definitions */
+#define VSEL_BUCK_EN		BIT(7)
+#define VSEL_MODE		BIT(6)
+#define VSEL_NSEL_MASK		0x3F
+
+/* Chip ID and Version */
+#define DIE_ID			0x0F/* ID1 */
+#define DIE_REV			0x0F/* ID2 */
+/* Control bit definitions */
+#define CTL_OUTPUT_DISCHG	BIT(7)
+#define CTL_SLEW_MASK		(0x7 << 4)
+#define CTL_SLEW_SHIFT		4
+#define CTL_RESET		BIT(2)
+
+#define TCS_VSEL_NSEL_MASK	0x7f
+#define TCS_VSEL0_MODE		BIT(7)
+#define TCS_VSEL1_MODE		BIT(6)
+
+#define TCS_SLEW_SHIFT		3
+#define TCS_SLEW_MASK		(0x3 < 3)
+
+#define FAN53555_NVOLTAGES_64	64/* Numbers of voltages */
+#define FAN53555_NVOLTAGES_127	127/* Numbers of voltages */
+
+enum fan53555_vendor {
+	FAN53555_VENDOR_FAIRCHILD = 0,
+	FAN53555_VENDOR_SILERGY,
+	FAN53555_VENDOR_TCS,
+};
+
+/* IC Type */
+enum {
+	FAN53555_CHIP_ID_00 = 0,
+	FAN53555_CHIP_ID_01,
+	FAN53555_CHIP_ID_02,
+	FAN53555_CHIP_ID_03,
+	FAN53555_CHIP_ID_04,
+	FAN53555_CHIP_ID_05,
+	FAN53555_CHIP_ID_08 = 8,
+};
+
+/* IC mask revision */
+enum {
+	FAN53555_CHIP_REV_00 = 0x3,
+	FAN53555_CHIP_REV_13 = 0xf,
+};
+
+enum {
+	SILERGY_SYR82X = 8,
+};
+
+enum {
+	FAN53555_VSEL_ID_0 = 0,
+	FAN53555_VSEL_ID_1,
+};
+
+struct fan53555_regulator_info {
+	enum fan53555_vendor vendor;
+	struct udevice *dev;
+	/* IC Type and Rev */
+	int chip_id;
+	int chip_rev;
+	/* Voltage setting register */
+	unsigned int vol_reg;
+	unsigned int sleep_reg;
+	unsigned int mode_reg;
+	unsigned int vol_mask;
+	unsigned int mode_mask;
+	/* Voltage range and step(linear) */
+	unsigned int vsel_min;
+	unsigned int vsel_step;
+	struct gpio_desc vsel_gpio;
+	unsigned int sleep_vsel_id;
+};
+
+static int fan53555_write(struct udevice *dev, uint reg, const uint8_t *buff,
+			  int len)
+{
+	int ret;
+
+	ret = dm_i2c_write(dev, reg, buff, len);
+	if (ret) {
+		debug("%s: write reg 0x%02x failed, ret=%d\n",
+		      __func__, reg, ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int fan53555_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
+{
+	int ret;
+
+	ret = dm_i2c_read(dev, reg, buff, len);
+	if (ret) {
+		debug("%s: read reg 0x%02x failed, ret=%d\n",
+		      __func__, reg, ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+int fan53555_reg_read(struct udevice *dev, uint reg)
+{
+	u8 byte;
+	int ret;
+
+	debug("%s: reg=%x", __func__, reg);
+	ret = fan53555_read(dev, reg, &byte, 1);
+	debug(", value=%x, ret=%d\n", byte, ret);
+
+	return ret ? ret : byte;
+}
+
+int fan53555_reg_write(struct udevice *dev, uint reg, uint value)
+{
+	u8 byte = value;
+	int ret;
+
+	debug("%s: reg=%x, value=%x", __func__, reg, value);
+	ret = fan53555_write(dev, reg, &byte, 1);
+	debug(", ret=%d\n", ret);
+
+	return ret;
+}
+
+int  fan53555_clrsetbits(struct udevice *dev, uint reg, uint clr, uint set)
+{
+	u8 byte;
+	int ret;
+
+	ret = fan53555_reg_read(dev, reg);
+	if (ret < 0)
+		return ret;
+	byte = (ret & ~clr) | set;
+
+	return fan53555_reg_write(dev, reg, byte);
+}
+
+static int fan53555_regulator_set_enable(struct udevice *dev, bool enable)
+{
+	struct fan53555_regulator_info *priv = dev_get_priv(dev);
+	int val, sleep_vsel_id;
+
+	if (enable) {
+		val = VSEL_BUCK_EN;
+		sleep_vsel_id = !priv->sleep_vsel_id;
+	} else {
+		val = 0;
+		sleep_vsel_id = priv->sleep_vsel_id;
+	}
+
+	if (dm_gpio_is_valid(&priv->vsel_gpio)) {
+		dm_gpio_set_value(&priv->vsel_gpio, sleep_vsel_id);
+		return 0;
+	}
+	fan53555_clrsetbits(dev, priv->vol_reg, VSEL_BUCK_EN, val);
+
+	return 0;
+}
+
+static int fan53555_regulator_get_enable(struct udevice *dev)
+{
+	struct fan53555_regulator_info *priv = dev_get_priv(dev);
+	int val;
+
+	if (dm_gpio_is_valid(&priv->vsel_gpio)) {
+		if (priv->sleep_vsel_id)
+			return !dm_gpio_get_value(&priv->vsel_gpio);
+		else
+			return dm_gpio_get_value(&priv->vsel_gpio);
+	}
+
+	val = fan53555_reg_read(dev, priv->vol_reg);
+	if (val & VSEL_BUCK_EN)
+		return 1;
+	else
+		return 0;
+}
+
+static int fan53555_regulator_set_suspend_enable(struct udevice *dev,
+						 bool enable)
+{
+	struct fan53555_regulator_info *priv = dev_get_priv(dev);
+	int val;
+
+	if (enable)
+		val = VSEL_BUCK_EN;
+	else
+		val = 0;
+
+	fan53555_clrsetbits(dev, priv->sleep_reg, VSEL_BUCK_EN, val);
+
+	return 0;
+}
+
+static int fan53555_regulator_get_suspend_enable(struct udevice *dev)
+{
+	struct fan53555_regulator_info *priv = dev_get_priv(dev);
+	int val;
+
+	val = fan53555_reg_read(dev, priv->sleep_reg);
+	if (val & VSEL_BUCK_EN)
+		return 1;
+	else
+		return 0;
+}
+
+static int fan53555_regulator_get_voltage(struct udevice *dev)
+{
+	struct fan53555_regulator_info *priv = dev_get_priv(dev);
+	int uvolt = 0, val;
+
+	val = fan53555_reg_read(dev, priv->vol_reg);
+	val &= priv->vol_mask;
+	uvolt = (val * priv->vsel_step) + priv->vsel_min;
+
+	return uvolt;
+}
+
+static int fan53555_regulator_set_voltage(struct udevice *dev, int uvolt)
+{
+	struct fan53555_regulator_info *priv = dev_get_priv(dev);
+	int val;
+
+	val = ((uvolt - priv->vsel_min) / priv->vsel_step);
+	fan53555_clrsetbits(dev, priv->vol_reg, priv->vol_mask, val);
+
+	return 0;
+}
+
+static int fan53555_regulator_get_suspend_voltage(struct udevice *dev)
+{
+	struct fan53555_regulator_info *priv = dev_get_priv(dev);
+	int uvolt = 0, val;
+
+	val = fan53555_reg_read(dev, priv->sleep_reg);
+	val &= priv->vol_mask;
+	uvolt = (val * priv->vsel_step) + priv->vsel_min;
+
+	return uvolt;
+}
+
+static int fan53555_regulator_set_suspend_voltage(struct udevice *dev,
+						  int uvolt)
+{
+	struct fan53555_regulator_info *priv = dev_get_priv(dev);
+	int val;
+
+	val = ((uvolt - priv->vsel_min) / priv->vsel_step);
+	fan53555_clrsetbits(dev, priv->sleep_reg, priv->vol_mask, val);
+
+	return 0;
+}
+
+static int fan53555_voltages_setup_fairchild(struct fan53555_regulator_info *di)
+{
+	/* Init voltage range and step */
+	switch (di->chip_id) {
+	case FAN53555_CHIP_ID_00:
+		switch (di->chip_rev) {
+		case FAN53555_CHIP_REV_00:
+			di->vsel_min = 600000;
+			di->vsel_step = 10000;
+			break;
+		case FAN53555_CHIP_REV_13:
+			di->vsel_min = 800000;
+			di->vsel_step = 10000;
+			break;
+		default:
+			dev_err(di->dev,
+				"Chip ID %d with rev %d not supported!\n",
+				di->chip_id, di->chip_rev);
+			return -EINVAL;
+		}
+		break;
+	case FAN53555_CHIP_ID_01:
+	case FAN53555_CHIP_ID_03:
+	case FAN53555_CHIP_ID_05:
+	case FAN53555_CHIP_ID_08:
+		di->vsel_min = 600000;
+		di->vsel_step = 10000;
+		break;
+	case FAN53555_CHIP_ID_04:
+		di->vsel_min = 603000;
+		di->vsel_step = 12826;
+		break;
+	default:
+		dev_err(di->dev,
+			"Chip ID %d not supported!\n", di->chip_id);
+		return -EINVAL;
+	}
+	di->vol_mask = VSEL_NSEL_MASK;
+
+	return 0;
+}
+
+static int fan53555_voltages_setup_silergy(struct fan53555_regulator_info *di)
+{
+	/* Init voltage range and step */
+	di->vsel_min = 712500;
+	di->vsel_step = 12500;
+	di->vol_mask = VSEL_NSEL_MASK;
+
+	return 0;
+}
+
+static int fan53555_voltages_setup_tcs(struct fan53555_regulator_info *di)
+{
+	if (di->sleep_vsel_id) {
+		di->sleep_reg = TCS452X_VSEL1;
+		di->vol_reg = TCS452X_VSEL0;
+	} else {
+		di->sleep_reg = TCS452X_VSEL0;
+		di->vol_reg = TCS452X_VSEL1;
+	}
+
+	di->vol_mask = TCS_VSEL_NSEL_MASK;
+
+	/* Init voltage range and step */
+	di->vsel_min = 600000;
+	di->vsel_step = 6250;
+
+	return 0;
+}
+
+/* For 00,01,03,05 options:
+ * VOUT = 0.60V + NSELx * 10mV, from 0.60 to 1.23V.
+ * For 04 option:
+ * VOUT = 0.603V + NSELx * 12.826mV, from 0.603 to 1.411V.
+ *
+ */
+
+static int fan53555_device_setup(struct fan53555_regulator_info *di)
+{
+	int ret = 0;
+
+	/* Setup voltage control register */
+	switch (di->sleep_vsel_id) {
+	case FAN53555_VSEL_ID_0:
+		di->sleep_reg = FAN53555_VSEL0;
+		di->vol_reg = FAN53555_VSEL1;
+		break;
+	case FAN53555_VSEL_ID_1:
+		di->sleep_reg = FAN53555_VSEL1;
+		di->vol_reg = FAN53555_VSEL0;
+		break;
+	default:
+		dev_err(di->dev, "Invalid VSEL ID!\n");
+		return -EINVAL;
+	}
+
+	switch (di->vendor) {
+	case FAN53555_VENDOR_FAIRCHILD:
+		ret = fan53555_voltages_setup_fairchild(di);
+		break;
+	case FAN53555_VENDOR_SILERGY:
+		ret = fan53555_voltages_setup_silergy(di);
+		break;
+	case FAN53555_VENDOR_TCS:
+		ret = fan53555_voltages_setup_tcs(di);
+		break;
+	default:
+		dev_err(di->dev, "vendor %d not supported!\n", di->vendor);
+		return -EINVAL;
+	}
+
+	return ret;
+}
+
+static int fan53555_regulator_ofdata_to_platdata(struct udevice *dev)
+{
+	struct fan53555_regulator_info *priv = dev_get_priv(dev);
+	int ret;
+
+	priv->sleep_vsel_id = dev_read_u32_default(dev,
+						   "fcs,suspend-voltage-selector",
+						   1);
+
+	ret = gpio_request_by_name(dev, "vsel-gpios", 0,
+				   &priv->vsel_gpio, GPIOD_IS_OUT);
+	if (ret)
+		dev_err(dev, "vsel-gpios- not found! Error: %d\n", ret);
+
+	if (dm_gpio_is_valid(&priv->vsel_gpio))
+		dm_gpio_set_value(&priv->vsel_gpio, !priv->sleep_vsel_id);
+
+	priv->vendor = dev_get_driver_data(dev);
+
+	return 0;
+}
+
+static int fan53555_regulator_probe(struct udevice *dev)
+{
+	struct fan53555_regulator_info *di = dev_get_priv(dev);
+	struct dm_regulator_uclass_platdata *uc_pdata;
+	u8 val;
+	int ret;
+
+	uc_pdata = dev_get_uclass_platdata(dev);
+	uc_pdata->type = REGULATOR_TYPE_BUCK;
+	uc_pdata->mode_count = 0;
+
+	/* Get chip ID */
+	val = fan53555_reg_read(dev, FAN53555_ID1);
+	if (val < 0) {
+		dev_err(dev, "Failed to get chip ID!\n");
+		return val;
+	}
+	di->chip_id = val & DIE_ID;
+
+	/* Get chip revision */
+	val = fan53555_reg_read(dev, FAN53555_ID2);
+	if (val < 0) {
+		dev_err(dev, "Failed to get chip Rev!\n");
+		return val;
+	}
+	di->chip_rev = val & DIE_REV;
+
+	debug("FAN53555 Option[%d] Rev[%d] Detected!\n",
+	      di->chip_id, di->chip_rev);
+
+	/* Device init */
+	ret = fan53555_device_setup(di);
+	if (ret < 0) {
+		dev_err(dev, "Failed to setup device!\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+static const struct udevice_id fan53555_id[] = {
+	{
+		.compatible = "fan53555",
+		.data = FAN53555_VENDOR_FAIRCHILD,
+	}, {
+		.compatible = "silergy,syr827",
+		.data = FAN53555_VENDOR_SILERGY,
+	}, {
+		.compatible = "silergy,syr828",
+		.data = FAN53555_VENDOR_SILERGY,
+	}, {
+		.compatible = "tcs,tcs452x", /* tcs4525/4526 */
+		.data = FAN53555_VENDOR_TCS,
+	},
+	{ },
+};
+
+static const struct dm_regulator_ops fan53555_regulator_ops = {
+	.get_value  = fan53555_regulator_get_voltage,
+	.set_value  = fan53555_regulator_set_voltage,
+	.set_suspend_value = fan53555_regulator_set_suspend_voltage,
+	.get_suspend_value = fan53555_regulator_get_suspend_voltage,
+	.set_enable = fan53555_regulator_set_enable,
+	.get_enable = fan53555_regulator_get_enable,
+	.set_suspend_enable = fan53555_regulator_set_suspend_enable,
+	.get_suspend_enable = fan53555_regulator_get_suspend_enable,
+};
+
+U_BOOT_DRIVER(fan53555_regulator) = {
+	.name = "fan53555_regulator",
+	.id = UCLASS_REGULATOR,
+	.ops = &fan53555_regulator_ops,
+	.probe = fan53555_regulator_probe,
+	.of_match = fan53555_id,
+	.ofdata_to_platdata = fan53555_regulator_ofdata_to_platdata,
+	.priv_auto_alloc_size = sizeof(struct fan53555_regulator_info),
+};
+

commit cfb11cfb1474101334b8db66e0b4b22910594e08
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 19 18:56:32 2018 +0800

    configs: rk3308-aarch32: enable lzo/lz4
    
    remove some unused modules to reduce size.
    
    Change-Id: I7706e501b7496e596bb4a766cb55736ee2c2e233
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3308-aarch32_defconfig b/configs/rk3308-aarch32_defconfig
index 2ee0ec4c6c..a4720bf15c 100644
--- a/configs/rk3308-aarch32_defconfig
+++ b/configs/rk3308-aarch32_defconfig
@@ -14,16 +14,31 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 # CONFIG_PASS_DEVICE_SERIAL_BY_FDT is not set
 CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 # CONFIG_FASTBOOT is not set
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_CONSOLE is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
 CONFIG_CMD_GPT=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
+# CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_MISC is not set
 CONFIG_CMD_PMIC=y
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_REGMAP=y
@@ -75,5 +90,7 @@ CONFIG_G_DNL_VENDOR_NUM=0x2207
 CONFIG_G_DNL_PRODUCT_NUM=0x330d
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
+CONFIG_LZ4=y
+CONFIG_LZO=y
 CONFIG_ERRNO_STR=y
 CONFIG_TEST_ROCKCHIP=y

commit 5c773029dfd727adad76264573402116929dfa00
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 19 15:08:10 2018 +0800

    configs: add rk3308 aarch64 defconfig
    
    This defconfig enables kernel dtb.
    
    Change-Id: I55fe3922de0e0888f148a4c21865649076f27603
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3308_defconfig b/configs/rk3308_defconfig
new file mode 100644
index 0000000000..007c6d0114
--- /dev/null
+++ b/configs/rk3308_defconfig
@@ -0,0 +1,95 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_ROCKCHIP_RK3308=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_TARGET_EVB_RK3308=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3308-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+# CONFIG_PASS_DEVICE_SERIAL_BY_FDT is not set
+CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+# CONFIG_FASTBOOT is not set
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_CONSOLE is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPT=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_ITEST is not set
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_PMIC=y
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_RK8XX_PWRKEY=y
+CONFIG_ADC_KEY=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PINCTRL=y
+CONFIG_DM_FUEL_GAUGE=y
+CONFIG_POWER_FG_RK816=y
+CONFIG_DM_PMIC=y
+# CONFIG_SPL_PMIC_CHILDREN is not set
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_DM_DVFS=y
+CONFIG_ROCKCHIP_WTEMP_DVFS=y
+CONFIG_DM_CHARGE_DISPLAY=y
+CONFIG_CHARGE_ANIMATION=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_RKFLASH=y
+CONFIG_RKNANDC_NAND=y
+CONFIG_RKSFC_NAND=y
+CONFIG_RKSFC_NOR=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0xFF0C0000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_SYSRESET=y
+CONFIG_DM_THERMAL=y
+CONFIG_ROCKCHIP_THERMAL=y
+CONFIG_USB=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x330d
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_LZ4=y
+CONFIG_LZO=y
+CONFIG_ERRNO_STR=y
+# CONFIG_EFI_LOADER is not set
+CONFIG_TEST_ROCKCHIP=y

commit d24a078f3ffb77b87c95ad0a5e1e12271cac16dc
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 19 17:40:35 2018 +0800

    core: device_bind_common: don't bind UCLASS_SPI_FLASH again
    
    Change-Id: Ie4cfe40398fc1e483b558832663bc50683510ac0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/core/device.c b/drivers/core/device.c
index f2261d7c94..21eb2527a0 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -52,8 +52,9 @@ static int device_bind_common(struct udevice *parent, const struct driver *drv,
 
 #ifdef CONFIG_USING_KERNEL_DTB
 	if (gd->flags & GD_FLG_RELOC) {
-		/* For mmc and nand, just update from kernel dtb instead bind again*/
-		if (drv->id == UCLASS_MMC || drv->id == UCLASS_RKNAND) {
+		/* For mmc/nand/spiflash, just update from kernel dtb instead bind again*/
+		if (drv->id == UCLASS_MMC || drv->id == UCLASS_RKNAND ||
+		    drv->id == UCLASS_SPI_FLASH) {
 			list_for_each_entry(dev, &uc->dev_head, uclass_node) {
 				if (!strcmp(name, dev->name)) {
 					debug("%s do not bind dev already in list %s\n",

commit 8bea6fa8fe12e6f70e64293750edcdfe874cd464
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 19 17:25:11 2018 +0800

    common: rkimg: add dev_desc validation check
    
    If we use a NULL dev_desc, it causes data abort.
    
    Change-Id: Iaf315f7f0ca4a8c33d4d4b809fffea35fc5dcc51
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 962c582f38..7b6028b426 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -227,6 +227,10 @@ struct blk_desc *rockchip_get_bootdev(void)
 	devnum = env_get_ulong("devnum", 10, 0);
 
 	dev_desc = blk_get_devnum_by_type(dev_type, devnum);
+	if (!dev_desc) {
+		printf("%s: can't find dev_desc!\n", __func__);
+		return NULL;
+	}
 
 	printf("PartType: %s\n", part_get_type(dev_desc));
 

commit afd559b8e3318305feec6ebf00919317d2bbe7a3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 19 16:55:49 2018 +0800

    rkflash: spinor/spinand use different blk name
    
    - The same blk name take a lot confuse for debugging;
    - When kernel dtb is enabled and setup dm tree, dm framework can't allow
      devices with same name, only one is left in dm tree list.
    
    Change-Id: Ieed15ffbed28f381e90c18cf0c5f3d257d72eab2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/rkflash/rksfc_base.c b/drivers/rkflash/rksfc_base.c
index a42fb09639..2120c7802c 100644
--- a/drivers/rkflash/rksfc_base.c
+++ b/drivers/rkflash/rksfc_base.c
@@ -75,10 +75,10 @@ static int rksfc_blk_bind(struct udevice *udev)
 	struct udevice *bdev;
 	int ret;
 
-	ret = blk_create_devicef(udev, "rkflash_blk", "blk",
+	ret = blk_create_devicef(udev, "rkflash_blk", "spinand.blk",
 				 IF_TYPE_SPINAND,
 				 0, 512, 0, &bdev);
-	ret = blk_create_devicef(udev, "rkflash_blk", "blk",
+	ret = blk_create_devicef(udev, "rkflash_blk", "spinor.blk",
 				 IF_TYPE_SPINOR,
 				 1, 512, 0, &bdev);
 

commit 8d1dd0c451162b9ebd12a2314728fe452a998414
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 19 14:59:57 2018 +0800

    rockchip: atags: add serial id print
    
    Change-Id: I8b41ba9e1b02b300c385b2036e7af78ac544cfe1
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk_atags.c b/arch/arm/mach-rockchip/rk_atags.c
index a545139af1..cde2f23a3e 100644
--- a/arch/arm/mach-rockchip/rk_atags.c
+++ b/arch/arm/mach-rockchip/rk_atags.c
@@ -270,6 +270,7 @@ void atags_print_tag(struct tag *t)
 		printf("      addr = 0x%llx\n", t->u.serial.addr);
 		printf("  baudrate = %d\n", t->u.serial.baudrate);
 		printf("    m_mode = 0x%x\n", t->u.serial.m_mode);
+		printf("        id = 0x%x\n", t->u.serial.id);
 		for (i = 0; i < ARRAY_SIZE(t->u.serial.reserved); i++)
 			printf("    res[%d] = 0x%x\n", i, t->u.serial.reserved[i]);
 		break;

commit 147c40830c5a76128a0d950ce94b94eddebfef9b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 19 14:14:10 2018 +0800

    dm: ramdisk: remove unused function
    
    blk uclass would take over initialization.
    
    Change-Id: I34bcb858520b06110685f643705da83c4640a094
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/ram/ramdisk-uclass.c b/drivers/ram/ramdisk-uclass.c
index edb1b7bdfd..dfa8c3cb9b 100644
--- a/drivers/ram/ramdisk-uclass.c
+++ b/drivers/ram/ramdisk-uclass.c
@@ -12,13 +12,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-int bramdisk_initialize(void)
-{
-	struct udevice *dev;
-
-	return uclass_get_device(UCLASS_BLK, 0, &dev);
-}
-
 static ulong ramdisk_bread(struct udevice *dev, lbaint_t start,
 			   lbaint_t blkcnt, void *dst)
 {
diff --git a/include/ramdisk.h b/include/ramdisk.h
index 73432eaef2..3f5df7043b 100644
--- a/include/ramdisk.h
+++ b/include/ramdisk.h
@@ -45,9 +45,4 @@ struct ramdisk_ops {
 	ulong (*erase)(struct blk_desc *desc, lbaint_t start, lbaint_t blkcnt);
 };
 
-/*
- * bramdisk_initialize() - do blk ramdisk initialize
- */
-int bramdisk_initialize(void);
-
 #endif /* __RAMDISK_H__ */

commit 717cd360cabd4343308f33d42e594cbfe510c5f1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 19 11:55:40 2018 +0800

    rockchip: boot_mode: fallback to legacy bootdev init when atags is invalid
    
    verbose "Bootdev(atags):" if bootdev is from preloader atags, otherwise "Bootdev:"
    
    Change-Id: Ib02a1f6deea330bf33aca60f752a3006a48bc3ac
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index 1efa19620f..8a217fc0c5 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -92,16 +92,21 @@ void boot_devtype_init(void)
 	const char *devtype_num_set = "run rkimg_bootdev";
 	char *devtype = NULL, *devnum = NULL;
 	static int done = 0;
+	int atags_en = 0;
 	int ret;
 
 	if (done)
 		return;
 
+	/*
+	 * New way: get bootdev from preloader atags info.
+	 */
 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
 	struct tag *t;
 
 	t = atags_get_tag(ATAG_BOOTDEV);
 	if (t) {
+		atags_en = 1;
 		switch (t->u.bootdev.devtype) {
 		case BOOT_TYPE_EMMC:
 			devtype = "mmc";
@@ -131,7 +136,7 @@ void boot_devtype_init(void)
 		default:
 			printf("Unknown bootdev type: 0x%x\n",
 			       t->u.bootdev.devtype);
-			break;
+			goto fallback;
 		}
 	}
 
@@ -148,6 +153,10 @@ void boot_devtype_init(void)
 	}
 #endif
 
+	/*
+	 * Legacy way: get bootdev by going through all boot media.
+	 */
+fallback:
 #ifdef CONFIG_DM_MMC
 	mmc_initialize(gd->bd);
 #endif
@@ -161,7 +170,8 @@ void boot_devtype_init(void)
 	}
 finish:
 	done = 1;
-	printf("Bootdev: %s %s\n", env_get("devtype"), env_get("devnum"));
+	printf("Bootdev%s: %s %s\n", atags_en ? "(atags)" : "",
+	       env_get("devtype"), env_get("devnum"));
 }
 
 void rockchip_dnl_mode_check(void)

commit 61ad391ffa12feaf80816bacd04638564fe588b6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 19 11:15:20 2018 +0800

    configs: rk3399pro-npu: enable CONFIG_SYS_CONSOLE_INFO_QUIET
    
    Change-Id: I20f7c4008627baa4db203ad2c89fa17ce8278e25
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3399pro-npu_defconfig b/configs/rk3399pro-npu_defconfig
index eea5cceccf..4ba467c66c 100644
--- a/configs/rk3399pro-npu_defconfig
+++ b/configs/rk3399pro-npu_defconfig
@@ -12,6 +12,7 @@ CONFIG_DEBUG_UART=y
 CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 CONFIG_ANDROID_BOOT_IMAGE=y
 CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_HUSH_PARSER=y

commit 5ea39a570fd62dc37f5f6f9cd828f32231af609c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 19 10:02:13 2018 +0800

    common: autoboot: using ctrl+c to exit bootdelay and enter hush
    
    We hope user can have more clear purpose on entering hush shell,
    this avoids some unexpected key hit during normal boot.
    
    Update message from:
    Hit any key to stop autoboot: 5 => Hit key to stop autoboot('CTRL+C'): 5
    
    Change-Id: Ifb1b594dc38f92fa38e2c2b8a9a576e38bbdf03e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/autoboot.c b/common/autoboot.c
index f201a95cfa..d30d4e6701 100644
--- a/common/autoboot.c
+++ b/common/autoboot.c
@@ -216,7 +216,7 @@ static int __abortboot(int bootdelay)
 #ifdef CONFIG_MENUPROMPT
 	printf(CONFIG_MENUPROMPT);
 #else
-	printf("Hit any key to stop autoboot: %2d ", bootdelay);
+	printf("Hit key to stop autoboot('CTRL+C'): %2d ", bootdelay);
 #endif
 
 #ifdef CONFIG_ARCH_ROCKCHIP
@@ -237,13 +237,11 @@ static int __abortboot(int bootdelay)
 		/* delay 1000 ms */
 		ts = get_timer(0);
 		do {
-			if (tstc()) {	/* we got a key press	*/
+			if (ctrlc()) {	/* we got a ctrl+c key press	*/
 				abort  = 1;	/* don't auto boot	*/
 				bootdelay = 0;	/* no more delay	*/
 # ifdef CONFIG_MENUKEY
-				menukey = getc();
-# else
-				(void) getc();  /* consume input	*/
+				menukey = 0x03;	/* ctrl+c key code */
 # endif
 				break;
 			}

commit dc11069f9788a42831d9a6d58966ed4b67cb85d3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 18 17:00:56 2018 +0800

    rockchip: boot_mode: separate key press and vbus attach conditions message
    
    Change-Id: Iace9c890526179cdceef327f1113db5c8a4c26bd
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index f3e7c40bf5..1efa19620f 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -167,13 +167,15 @@ finish:
 void rockchip_dnl_mode_check(void)
 {
 	if (rockchip_dnl_key_pressed()) {
+		printf("download key pressed... ");
 		if (rockchip_u2phy_vbus_detect()) {
-			printf("download key pressed, entering download mode...\n");
+			printf("entering download mode...\n");
 			/* If failed, we fall back to bootrom download mode */
 			run_command_list("rockusb 0 ${devtype} ${devnum}", -1, 0);
 			set_back_to_bootrom_dnl_flag();
 			do_reset(NULL, 0, 0, NULL);
 		} else {
+			printf("\n");
 #ifdef CONFIG_RKIMG_BOOTLOADER
 			/* If there is no recovery partition, just boot on */
 			struct blk_desc *dev_desc;

commit 2b49f256f5cf9e4c0dab199bfa07d488f5199b41
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Dec 17 20:55:48 2018 +0800

    configs: rk3399: enable CONFIG_SYS_CONSOLE_INFO_QUIET
    
    Change-Id: I19a4621c051518df50618815ccaca8e6d5e0256d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
index aa9e5b167d..27830c60bd 100644
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_RK3399=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x50000
 CONFIG_RKIMG_BOOTLOADER=y
@@ -12,8 +13,8 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y

commit 3e4afe6b7c97fe89167811081f6fba50fed34fdc
Author: William Wu <william.wu@rock-chips.com>
Date:   Wed Dec 5 11:39:02 2018 +0800

    usb: phy: rockchip: support vbus detect for rk3288
    
    This patch implements USB vbus detect API for rk3288,
    it can be used for user to determine whether enter
    download mode or not.
    
    Change-Id: Ic493b40b56cd149ec19f57ce914d70d288c54ca9
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/drivers/usb/phy/rockchip_usb2_phy.c b/drivers/usb/phy/rockchip_usb2_phy.c
index edcdb3268f..d5f1199546 100644
--- a/drivers/usb/phy/rockchip_usb2_phy.c
+++ b/drivers/usb/phy/rockchip_usb2_phy.c
@@ -67,6 +67,20 @@ static void property_enable(struct dwc2_plat_otg_data *pdata,
 	writel(val, pdata->regs_phy + reg->offset);
 }
 
+int rockchip_u2phy_vbus_detect(void)
+{
+	u32 val = 0;
+
+#ifdef CONFIG_ROCKCHIP_RK3288
+	u32 grf_base = (u32)syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
+	val = readl(grf_base + 0x288);
+	val = (val & BIT(14)) >> 14;
+#endif
+
+	return val;
+}
+
 static int otg_phy_parse(struct dwc2_udc *dev)
 {
 	int node, phy_node;
diff --git a/include/linux/usb/phy-rockchip-inno-usb2.h b/include/linux/usb/phy-rockchip-inno-usb2.h
index a44c00433d..c646ea30c9 100644
--- a/include/linux/usb/phy-rockchip-inno-usb2.h
+++ b/include/linux/usb/phy-rockchip-inno-usb2.h
@@ -9,7 +9,7 @@
 
 extern int rockchip_chg_get_type(void);
 
-#ifdef CONFIG_PHY_ROCKCHIP_INNO_USB2
+#if defined(CONFIG_PHY_ROCKCHIP_INNO_USB2) || defined(CONFIG_ROCKCHIP_USB2_PHY)
 int rockchip_u2phy_vbus_detect(void);
 #else
 static inline int rockchip_u2phy_vbus_detect(void)

commit 9f1dd9df855f3714c02b048e40bf29cb0cae1be1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 18 16:13:21 2018 +0800

    dm: key: make kernel dtb key has higher priority than U-Boot keys
    
    We add recovery key node with property "u-boot,dm-pre-reloc"
    in uboot dts in order to make sure recovery key works normally
    even when kernel dtb is load failed. But There are too many
    boards for a platform(eg. RK3399/RK3399PRO), which may cause
    a mistake key match between boards via U-Boot dts key nodes,
    so that we make kernel dtb key has higher priority.
    
    Change-Id: I771d72860aa626e4a6a1638117cb1876fe5d1a44
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/key-uclass.c b/drivers/input/key-uclass.c
index 3cc541e687..7f369665b2 100644
--- a/drivers/input/key-uclass.c
+++ b/drivers/input/key-uclass.c
@@ -144,17 +144,53 @@ void key_add(struct input_key *key)
 	if (!key)
 		return;
 
+	if (!key->parent) {
+		printf("Err: Can't find key(code=%d) device\n", key->code);
+		return;
+	}
+
+	key->pre_reloc = dev_read_bool(key->parent, "u-boot,dm-pre-reloc");
 	list_add_tail(&key->link, &key_list);
 }
 
+static int __key_read(struct input_key *key)
+{
+	unsigned int adcval;
+	int keyval = KEY_NOT_EXIST;
+	int ret;
+
+	/* Is a adc key? */
+	if (key->type & ADC_KEY) {
+		ret = adc_channel_single_shot("saradc",
+					      key->channel, &adcval);
+		if (ret)
+			printf("%s: failed to read saradc, ret=%d\n",
+			       key->name, ret);
+		else
+			keyval = key_read_adc_simple_event(key, adcval);
+	/* Is a gpio key? */
+	} else if (key->type & GPIO_KEY) {
+		/* All pwrkey must register as an interrupt event */
+		if (key->code == KEY_POWER)
+			keyval = key_read_gpio_interrupt_event(key);
+		else
+			keyval = key_read_gpio_simple_event(key);
+	} else {
+		printf("%s: invalid key type!\n", __func__);
+	}
+
+	debug("%s: '%s'(code=%d) is %s\n",
+	      __func__, key->name, key->code, evt_name[keyval]);
+
+	return keyval;
+}
+
 int key_read(int code)
 {
 	struct udevice *dev;
 	struct input_key *key;
 	static int initialized;
-	unsigned int adcval;
 	int keyval = KEY_NOT_EXIST;
-	int ret;
 
 	/* Initialize all key drivers */
 	if (!initialized) {
@@ -166,36 +202,28 @@ int key_read(int code)
 		}
 	}
 
-	/* Search on the key list */
+	/* The key from kernel dtb has higher priority */
+	debug("Reading key from kernel\n");
 	list_for_each_entry(key, &key_list, link) {
-		if (key->code != code)
+		if (key->pre_reloc || (key->code != code))
 			continue;
 
-		/* Is a adc key? */
-		if (key->type & ADC_KEY) {
-			ret = adc_channel_single_shot("saradc",
-						      key->channel, &adcval);
-			if (ret)
-				printf("%s: failed to read saradc, ret=%d\n",
-				       key->name, ret);
-			else
-				keyval = key_read_adc_simple_event(key, adcval);
-		/* Is a gpio key? */
-		} else if (key->type & GPIO_KEY) {
-			/* All pwrkey must register as an interrupt event */
-			if (key->code == KEY_POWER)
-				keyval = key_read_gpio_interrupt_event(key);
-			else
-				keyval = key_read_gpio_simple_event(key);
-		} else {
-			printf("%s: invalid key type!\n", __func__);
-		}
+		keyval = __key_read(key);
+		if (key_is_pressed(keyval))
+			return keyval;
+	}
 
-		debug("%s: '%s'(code=%d) is %s\n",
-		      __func__, key->name, key->code, evt_name[keyval]);
+	/* If not found any key from kernel dtb, reading from U-Boot dtb */
+	if (keyval == KEY_NOT_EXIST) {
+		debug("Reading key from U-Boot\n");
+		list_for_each_entry(key, &key_list, link) {
+			if (!key->pre_reloc || (key->code != code))
+				continue;
 
-		if (keyval == KEY_PRESS_DOWN || keyval == KEY_PRESS_LONG_DOWN)
-			break;
+			keyval = __key_read(key);
+			if (key_is_pressed(keyval))
+				return keyval;
+		}
 	}
 
 	return keyval;
diff --git a/include/key.h b/include/key.h
index a1c610f993..f85e1f3164 100644
--- a/include/key.h
+++ b/include/key.h
@@ -29,6 +29,7 @@ struct input_key {
 	struct udevice *parent;
 	struct list_head link;
 	const char *name;
+	bool pre_reloc;
 	u32 code;
 	u8 type;
 

commit e7cd9ad210c25311dab14dfa0343f83bc5a49561
Author: jon.lin <jon.lin@rock-chips.com>
Date:   Mon Dec 17 22:55:26 2018 -0800

    configs: rk1808: enable sfc spi nor
    
    Change-Id: Ic53f834e805cab86a7cc5666e1767b8d4bd7083f
    Signed-off-by: jon.lin <jon.lin@rock-chips.com>

diff --git a/configs/rk1808_defconfig b/configs/rk1808_defconfig
index 147bf4a0eb..5a66cb55d2 100644
--- a/configs/rk1808_defconfig
+++ b/configs/rk1808_defconfig
@@ -65,6 +65,8 @@ CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_DM_RESET=y
 CONFIG_RKNAND=y
+CONFIG_RKFLASH=y
+CONFIG_RKSFC_NOR=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xff550000
 CONFIG_DEBUG_UART_CLOCK=24000000

commit c09b5fad43a5d9e138c1a8c8cc3237d7efe1f2bd
Author: jon.lin <jon.lin@rock-chips.com>
Date:   Mon Dec 17 18:25:22 2018 -0800

    rockchip: dts: rk1808: add sfc node and enable it
    
    Change-Id: Iaebdadf5eb45fdfa7c693156c851c573a6acb45e
    Signed-off-by: jon.lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/dts/rk1808-u-boot.dtsi b/arch/arm/dts/rk1808-u-boot.dtsi
index ee258ff182..6ec0c68a5d 100644
--- a/arch/arm/dts/rk1808-u-boot.dtsi
+++ b/arch/arm/dts/rk1808-u-boot.dtsi
@@ -56,6 +56,11 @@
 	status = "okay";
 };
 
+&sfc {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 &uart0 {
 	u-boot,dm-pre-reloc;
 };
diff --git a/arch/arm/dts/rk1808.dtsi b/arch/arm/dts/rk1808.dtsi
index e7de04cfd2..13ff2b5516 100644
--- a/arch/arm/dts/rk1808.dtsi
+++ b/arch/arm/dts/rk1808.dtsi
@@ -990,6 +990,15 @@
 		};
 	};
 
+	sfc: sfc@ffc50000 {
+		compatible = "rockchip,rksfc";
+		reg = <0x0 0xffc50000 0x0 0x4000>;
+		interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
+		clock-names = "clk_sfc", "hclk_sfc";
+		status = "disabled";
+	};
+
 	sdio: dwmmc@ffc60000 {
 		compatible = "rockchip,rk1808-dw-mshc", "rockchip,rk3288-dw-mshc";
 		reg = <0x0 0xffc60000 0x0 0x4000>;

commit 6f920c07e00b5a951bf54a2cb19fd89e470ddfed
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Tue Dec 18 08:56:46 2018 +0800

    video/drm: Rename rockchip_analogix_dp to analogix_dp
    
    Change-Id: I5603a709abde6a852fcca0b3a5b833727d5f3cad
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/Makefile b/drivers/video/drm/Makefile
index 2f77efe22d..1c89eee57e 100644
--- a/drivers/video/drm/Makefile
+++ b/drivers/video/drm/Makefile
@@ -13,7 +13,7 @@ obj-$(CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI) += rockchip-dw-mipi-dsi.o \
 obj-$(CONFIG_DRM_ROCKCHIP_DW_HDMI) += rockchip_dw_hdmi.o dw_hdmi.o
 obj-$(CONFIG_ROCKCHIP_INNO_HDMI_PHY) += rockchip-inno-hdmi-phy.o
 obj-$(CONFIG_ROCKCHIP_DRM_TVE) += rockchip_drm_tve.o
-obj-$(CONFIG_DRM_ROCKCHIP_ANALOGIX_DP) += rockchip_analogix_dp.o rockchip_analogix_dp_reg.o
+obj-$(CONFIG_DRM_ROCKCHIP_ANALOGIX_DP) += analogix_dp.o analogix_dp_reg.o
 obj-$(CONFIG_DRM_ROCKCHIP_LVDS) += rockchip_lvds.o
 obj-$(CONFIG_DRM_ROCKCHIP_RGB) += rockchip_rgb.o
 obj-$(CONFIG_DRM_ROCKCHIP_PANEL) += rockchip_panel.o
diff --git a/drivers/video/drm/rockchip_analogix_dp.c b/drivers/video/drm/analogix_dp.c
similarity index 99%
rename from drivers/video/drm/rockchip_analogix_dp.c
rename to drivers/video/drm/analogix_dp.c
index 7c0070023a..181d5661cf 100644
--- a/drivers/video/drm/rockchip_analogix_dp.c
+++ b/drivers/video/drm/analogix_dp.c
@@ -20,7 +20,7 @@
 #include "rockchip_display.h"
 #include "rockchip_crtc.h"
 #include "rockchip_connector.h"
-#include "rockchip_analogix_dp.h"
+#include "analogix_dp.h"
 
 /**
  * struct rockchip_dp_chip_data - splite the grf setting of kind of chips
diff --git a/drivers/video/drm/rockchip_analogix_dp.h b/drivers/video/drm/analogix_dp.h
similarity index 100%
rename from drivers/video/drm/rockchip_analogix_dp.h
rename to drivers/video/drm/analogix_dp.h
diff --git a/drivers/video/drm/rockchip_analogix_dp_reg.c b/drivers/video/drm/analogix_dp_reg.c
similarity index 99%
rename from drivers/video/drm/rockchip_analogix_dp_reg.c
rename to drivers/video/drm/analogix_dp_reg.c
index 3cf93b3990..a38900b5b8 100644
--- a/drivers/video/drm/rockchip_analogix_dp_reg.c
+++ b/drivers/video/drm/analogix_dp_reg.c
@@ -25,7 +25,7 @@
 #include "rockchip_display.h"
 #include "rockchip_crtc.h"
 #include "rockchip_connector.h"
-#include "rockchip_analogix_dp.h"
+#include "analogix_dp.h"
 
 #define COMMON_INT_MASK_1	0
 #define COMMON_INT_MASK_2	0

commit 9c3b19b6a2edc22eba72185fbc9eed9890592c6f
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Tue Dec 18 08:52:20 2018 +0800

    video/drm: edp: code style cleanup and fixes
    
    Change-Id: I7ae761ca7a493e72fc4b4ed55f6cb2aa40a7cbfa
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_analogix_dp.c b/drivers/video/drm/rockchip_analogix_dp.c
index 1e63d7f60c..7c0070023a 100644
--- a/drivers/video/drm/rockchip_analogix_dp.c
+++ b/drivers/video/drm/rockchip_analogix_dp.c
@@ -136,7 +136,7 @@ static int analogix_dp_link_start(struct analogix_dp_device *dp)
 	pll_tries = 0;
 	while (analogix_dp_get_pll_lock_status(dp) == PLL_UNLOCKED) {
 		if (pll_tries == DP_TIMEOUT_LOOP_COUNT) {
-			pr_err("Wait for PLL lock timed out\n");
+			dev_err(dp->dev, "Wait for PLL lock timed out\n");
 			return -ETIMEDOUT;
 		}
 
@@ -334,7 +334,7 @@ static int analogix_dp_process_clock_recovery(struct analogix_dp_device *dp)
 		if (retval)
 			return retval;
 
-		pr_info("Link Training Clock Recovery success\n");
+		dev_info(dp->dev, "Link Training Clock Recovery success\n");
 		dp->link_train.lt_state = EQUALIZER_TRAINING;
 	} else {
 		for (lane = 0; lane < lane_count; lane++) {
@@ -354,7 +354,7 @@ static int analogix_dp_process_clock_recovery(struct analogix_dp_device *dp)
 			if (dp->link_train.cr_loop[lane] == MAX_CR_LOOP ||
 			    voltage_swing == VOLTAGE_LEVEL_3 ||
 			    pre_emphasis == PRE_EMPHASIS_LEVEL_3) {
-				pr_err("CR Max reached (%d,%d,%d)\n",
+				dev_err(dp->dev, "CR Max reached (%d,%d,%d)\n",
 					dp->link_train.cr_loop[lane],
 					voltage_swing, pre_emphasis);
 				analogix_dp_reduce_link_rate(dp);
@@ -414,17 +414,15 @@ static int analogix_dp_process_equalizer_training(struct analogix_dp_device *dp)
 		/* traing pattern Set to Normal */
 		analogix_dp_training_pattern_dis(dp);
 
-		pr_info("Link Training success!\n");
+		printf("Link Training success!\n");
 
 		analogix_dp_get_link_bandwidth(dp, &reg);
 		dp->link_train.link_rate = reg;
-		pr_debug("final bandwidth = %.2x\n",
-			dp->link_train.link_rate);
-
 		analogix_dp_get_lane_count(dp, &reg);
 		dp->link_train.lane_count = reg;
-		pr_debug("final lane count = %.2x\n",
-			dp->link_train.lane_count);
+
+		printf("final link rate = 0x%.2x, lane count = 0x%.2x\n",
+		       dp->link_train.link_rate, dp->link_train.lane_count);
 
 		/* set enhanced mode if available */
 		analogix_dp_set_enhanced_mode(dp);
@@ -437,7 +435,7 @@ static int analogix_dp_process_equalizer_training(struct analogix_dp_device *dp)
 	dp->link_train.eq_loop++;
 
 	if (dp->link_train.eq_loop > MAX_EQ_LOOP) {
-		pr_err("EQ Max loop\n");
+		dev_dbg(dp->dev, "EQ Max loop\n");
 		analogix_dp_reduce_link_rate(dp);
 		return -EIO;
 	}
@@ -480,9 +478,9 @@ static void analogix_dp_get_max_rx_lane_count(struct analogix_dp_device *dp,
 	*lane_count = DPCD_MAX_LANE_COUNT(data);
 }
 
-static void analogix_dp_init_training(struct analogix_dp_device *dp,
-				      enum link_lane_count_type max_lane,
-				      int max_rate)
+static int analogix_dp_init_training(struct analogix_dp_device *dp,
+				     enum link_lane_count_type max_lane,
+				     int max_rate)
 {
 	/*
 	 * MACRO_RST must be applied after the PLL_LOCK to avoid
@@ -497,15 +495,13 @@ static void analogix_dp_init_training(struct analogix_dp_device *dp,
 	if ((dp->link_train.link_rate != DP_LINK_BW_1_62) &&
 	    (dp->link_train.link_rate != DP_LINK_BW_2_7) &&
 	    (dp->link_train.link_rate != DP_LINK_BW_5_4)) {
-		pr_err("Rx Max Link Rate is abnormal :%x !\n",
-			dp->link_train.link_rate);
-		dp->link_train.link_rate = DP_LINK_BW_1_62;
+		dev_err(dp->dev, "failed to get Rx Max Link Rate\n");
+		return -ENODEV;
 	}
 
 	if (dp->link_train.lane_count == 0) {
-		pr_err("Rx Max Lane count is abnormal :%x !\n",
-			dp->link_train.lane_count);
-		dp->link_train.lane_count = (u8)LANE_COUNT1;
+		dev_err(dp->dev, "failed to get Rx Max Lane Count\n");
+		return -ENODEV;
 	}
 
 	/* Setup TX lane count & rate */
@@ -516,6 +512,8 @@ static void analogix_dp_init_training(struct analogix_dp_device *dp,
 
 	/* All DP analog module power up */
 	analogix_dp_set_analog_power_down(dp, POWER_ALL, 0);
+
+	return 0;
 }
 
 static int analogix_dp_sw_link_training(struct analogix_dp_device *dp)
@@ -530,17 +528,17 @@ static int analogix_dp_sw_link_training(struct analogix_dp_device *dp)
 		case START:
 			retval = analogix_dp_link_start(dp);
 			if (retval)
-				pr_err("LT link start failed!\n");
+				dev_err(dp->dev, "LT link start failed!\n");
 			break;
 		case CLOCK_RECOVERY:
 			retval = analogix_dp_process_clock_recovery(dp);
 			if (retval)
-				pr_err("LT CR failed!\n");
+				dev_err(dp->dev, "LT CR failed!\n");
 			break;
 		case EQUALIZER_TRAINING:
 			retval = analogix_dp_process_equalizer_training(dp);
 			if (retval)
-				pr_err("LT EQ failed!\n");
+				dev_err(dp->dev, "LT EQ failed!\n");
 			break;
 		case FINISHED:
 			training_finished = 1;
@@ -549,8 +547,6 @@ static int analogix_dp_sw_link_training(struct analogix_dp_device *dp)
 			return -EREMOTEIO;
 		}
 	}
-	if (retval)
-		pr_err("eDP link training failed (%d)\n", retval);
 
 	return retval;
 }
@@ -558,24 +554,25 @@ static int analogix_dp_sw_link_training(struct analogix_dp_device *dp)
 static int analogix_dp_set_link_train(struct analogix_dp_device *dp,
 				      u32 count, u32 bwtype)
 {
-	int i;
-	int retval;
+	int ret;
 
-	for (i = 0; i < DP_TIMEOUT_LOOP_COUNT; i++) {
-		analogix_dp_init_training(dp, count, bwtype);
-		retval = analogix_dp_sw_link_training(dp);
-		if (retval == 0)
-			break;
+	ret = analogix_dp_init_training(dp, count, bwtype);
+	if (ret < 0) {
+		dev_err(dp->dev, "failed to init training\n");
+		return ret;
+	}
 
-		udelay(110);
+	ret = analogix_dp_sw_link_training(dp);
+	if (ret < 0) {
+		dev_err(dp->dev, "failed to do sw link training\n");
+		return ret;
 	}
 
-	return retval;
+	return 0;
 }
 
 static int analogix_dp_config_video(struct analogix_dp_device *dp)
 {
-	int retval = 0;
 	int timeout_loop = 0;
 	int done_count = 0;
 
@@ -584,7 +581,7 @@ static int analogix_dp_config_video(struct analogix_dp_device *dp)
 	analogix_dp_set_video_color_format(dp);
 
 	if (analogix_dp_get_pll_lock_status(dp) == PLL_UNLOCKED) {
-		pr_err("PLL is not locked yet.\n");
+		dev_err(dp->dev, "PLL is not locked yet.\n");
 		return -EINVAL;
 	}
 
@@ -593,7 +590,7 @@ static int analogix_dp_config_video(struct analogix_dp_device *dp)
 		if (analogix_dp_is_slave_video_stream_clock_on(dp) == 0)
 			break;
 		if (timeout_loop > DP_TIMEOUT_LOOP_COUNT) {
-			pr_err("Timeout of video streamclk ok\n");
+			dev_err(dp->dev, "Timeout of video streamclk ok\n");
 			return -ETIMEDOUT;
 		}
 
@@ -627,17 +624,14 @@ static int analogix_dp_config_video(struct analogix_dp_device *dp)
 			done_count = 0;
 		}
 		if (timeout_loop > DP_TIMEOUT_LOOP_COUNT) {
-			pr_err("Timeout of video streamclk ok\n");
+			dev_err(dp->dev, "Timeout of video streamclk ok\n");
 			return -ETIMEDOUT;
 		}
 
 		udelay(1001);
 	}
 
-	if (retval != 0)
-		pr_err("Video stream is not detected!\n");
-
-	return retval;
+	return 0;
 }
 
 static void analogix_dp_enable_scramble(struct analogix_dp_device *dp,
@@ -698,7 +692,6 @@ static int analogix_dp_read_edid(struct analogix_dp_device *dp)
 {
 	unsigned char *edid = dp->edid;
 	unsigned int extend_block = 0;
-	unsigned char sum;
 	unsigned char test_vector;
 	int retval;
 
@@ -724,15 +717,11 @@ static int analogix_dp_read_edid(struct analogix_dp_device *dp)
 						EDID_HEADER_PATTERN,
 						EDID_BLOCK_LENGTH,
 						&edid[EDID_HEADER_PATTERN]);
-		if (retval != 0) {
-			pr_err("EDID Read failed!\n");
-			return -EIO;
-		}
-		sum = analogix_dp_calc_edid_check_sum(edid);
-		if (sum != 0) {
-			pr_err("EDID bad checksum!\n");
-			return -EIO;
-		}
+		if (retval < 0)
+			return retval;
+
+		if (analogix_dp_calc_edid_check_sum(edid))
+			return -EINVAL;
 
 		/* Read additional EDID data */
 		retval = analogix_dp_read_bytes_from_i2c(dp,
@@ -740,15 +729,11 @@ static int analogix_dp_read_edid(struct analogix_dp_device *dp)
 				EDID_BLOCK_LENGTH,
 				EDID_BLOCK_LENGTH,
 				&edid[EDID_BLOCK_LENGTH]);
-		if (retval != 0) {
-			pr_err("EDID Read failed!\n");
-			return -EIO;
-		}
-		sum = analogix_dp_calc_edid_check_sum(&edid[EDID_BLOCK_LENGTH]);
-		if (sum != 0) {
-			pr_err("EDID bad checksum!\n");
-			return -EIO;
-		}
+		if (retval < 0)
+			return retval;
+
+		if (analogix_dp_calc_edid_check_sum(&edid[EDID_BLOCK_LENGTH]))
+			return -EINVAL;
 
 		analogix_dp_read_byte_from_dpcd(dp, DP_TEST_REQUEST,
 						&test_vector);
@@ -761,21 +746,18 @@ static int analogix_dp_read_edid(struct analogix_dp_device *dp)
 				DP_TEST_EDID_CHECKSUM_WRITE);
 		}
 	} else {
-		pr_info("EDID data does not include any extensions.\n");
+		dev_info(dp->dev,
+			 "EDID data does not include any extensions.\n");
 
 		/* Read EDID data */
 		retval = analogix_dp_read_bytes_from_i2c(dp,
 				I2C_EDID_DEVICE_ADDR, EDID_HEADER_PATTERN,
 				EDID_BLOCK_LENGTH, &edid[EDID_HEADER_PATTERN]);
-		if (retval != 0) {
-			pr_err("EDID Read failed!\n");
-			return -EIO;
-		}
-		sum = analogix_dp_calc_edid_check_sum(edid);
-		if (sum != 0) {
-			pr_err("EDID bad checksum!\n");
-			return -EIO;
-		}
+		if (retval < 0)
+			return retval;
+
+		if (analogix_dp_calc_edid_check_sum(edid))
+			return -EINVAL;
 
 		analogix_dp_read_byte_from_dpcd(dp, DP_TEST_REQUEST,
 						&test_vector);
@@ -787,7 +769,6 @@ static int analogix_dp_read_edid(struct analogix_dp_device *dp)
 		}
 	}
 
-	debug("EDID Read success!\n");
 	return 0;
 }
 
@@ -819,165 +800,61 @@ retry:
 	return retval;
 }
 
-const struct rockchip_dp_chip_data rk3399_analogix_edp_drv_data = {
-	.lcdsel_grf_reg = 0x6250,
-	.lcdsel_big = 0 | BIT(21),
-	.lcdsel_lit = BIT(5) | BIT(21),
-	.chip_type = RK3399_EDP,
-	.has_vop_sel = true,
-};
-
-const struct rockchip_dp_chip_data rk3288_analogix_dp_drv_data = {
-	.lcdsel_grf_reg = 0x025c,
-	.lcdsel_big = 0 | BIT(21),
-	.lcdsel_lit = BIT(5) | BIT(21),
-	.chip_type = RK3288_DP,
-	.has_vop_sel = true,
-};
-
-const struct rockchip_dp_chip_data rk3368_analogix_edp_drv_data = {
-	.chip_type = RK3368_EDP,
-	.has_vop_sel = false,
-};
-
-static int rockchip_analogix_dp_init(struct display_state *state)
+static int analogix_dp_connector_init(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
-	const struct rockchip_connector *connector = conn_state->connector;
-	const struct rockchip_dp_chip_data *pdata = connector->data;
-	struct analogix_dp_device *dp;
-	struct analogix_dp_plat_data *plat_data;
-	int ret;
-
-	dp = malloc(sizeof(*dp));
-	if (!dp)
-		return -ENOMEM;
-
-	memset(dp, 0, sizeof(*dp));
-	plat_data = malloc(sizeof(*pdata));
-	if (!plat_data)
-		return -ENOMEM;
-	dp->reg_base = dev_read_addr_ptr(conn_state->dev);
-	dp->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	if (dp->grf <= 0) {
-		printf("%s: Get syscon grf failed (ret=%p)\n",
-		      __func__, dp->grf);
-		return  -ENXIO;
-	}
-
-	ret = gpio_request_by_name(conn_state->dev, "hpd-gpios", 0,
-				   &dp->hpd_gpio, GPIOD_IS_IN);
-	if (ret != -ENOENT) {
-		printf("%s: Warning: cannot get hpd GPIO: ret=%d\n",
-		      __func__, ret);
-		return ret;
-	}
-
-	dp->plat_data = plat_data;
-	dp->plat_data->dev_type = ROCKCHIP_DP;
-	dp->plat_data->subdev_type = pdata->chip_type;
-	/*
-	 * Like Rockchip DisplayPort TRM indicate that "Main link
-	 * containing 4 physical lanes of 2.7/1.62 Gbps/lane".
-	 */
-	dp->video_info.max_link_rate = 0x0A;
-	dp->video_info.max_lane_count = 0x04;
+	struct analogix_dp_device *dp = dev_get_priv(conn_state->dev);
 
-	conn_state->private = dp;
 	conn_state->type = DRM_MODE_CONNECTOR_eDP;
 	conn_state->output_mode = ROCKCHIP_OUT_MODE_AAAA;
 	conn_state->color_space = V4L2_COLORSPACE_DEFAULT;
 
-#if 0
-	if (pdata->chip_type == RK3399_EDP) {
-		/*
-		 * reset edp controller.
-		 */
-		writel(0x20002000, RKIO_CRU_PHYS + 0x444);
-		mdelay(10);
-		writel(0x20000000, RKIO_CRU_PHYS + 0x444);
-		mdelay(10);
-	} else if (pdata->chip_type == RK3368_EDP) {
-		/* edp ref clk sel */
-		writel(0x00010001, RKIO_GRF_PHYS + 0x410);
-		/* edp 24m clock domain software reset */
-		writel(0x80008000, RKIO_CRU_PHYS + 0x318);
-		udelay(20);
-		writel(0x80000000, RKIO_CRU_PHYS + 0x318);
-		/* edp ctrl apb bus software reset */
-		writel(0x04000400, RKIO_CRU_PHYS + 0x31c);
-		udelay(20);
-		writel(0x04000000, RKIO_CRU_PHYS + 0x31c);
-	} else if (pdata->chip_type == RK3288_DP) {
-		/* edp ref clk sel */
-		writel(0x00100010, RKIO_GRF_PHYS + 0x274);
-		/* edp 24m clock domain software reset */
-		writel(0x80008000, RKIO_CRU_PHYS + 0x1d0);
-		udelay(20);
-		writel(0x80000000, RKIO_CRU_PHYS + 0x1d0);
-		udelay(20);
-	}
-#endif
-
 	analogix_dp_init_dp(dp);
 
 	return 0;
 }
 
-static void rockchip_analogix_dp_deinit(struct display_state *state)
-{
-	/* TODO */
-}
-
-static int rockchip_analogix_dp_get_edid(struct display_state *state)
+static int analogix_dp_connector_get_edid(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
-	struct analogix_dp_device *dp = conn_state->private;
+	struct analogix_dp_device *dp = dev_get_priv(conn_state->dev);
 	int ret;
 
 	ret = analogix_dp_handle_edid(dp);
-	if (ret)
+	if (ret) {
+		dev_err(dp->dev, "failed to get edid\n");
 		return ret;
+	}
+
 	memcpy(&conn_state->edid, &dp->edid, sizeof(dp->edid));
 
 	return 0;
 }
 
-static int rockchip_analogix_dp_prepare(struct display_state *state)
+static int analogix_dp_connector_enable(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
 	struct crtc_state *crtc_state = &state->crtc_state;
 	const struct rockchip_connector *connector = conn_state->connector;
 	const struct rockchip_dp_chip_data *pdata = connector->data;
-	struct analogix_dp_device *dp = conn_state->private;
+	struct analogix_dp_device *dp = dev_get_priv(conn_state->dev);
 	u32 val;
+	int ret;
 
-	if (!pdata->has_vop_sel)
-		return 0;
-
-	if (crtc_state->crtc_id)
-		val = pdata->lcdsel_lit;
-	else
-		val = pdata->lcdsel_big;
-
-	writel(val, dp->grf + pdata->lcdsel_grf_reg);
-
-	debug("vop %s output to edp\n", (crtc_state->crtc_id) ? "LIT" : "BIG");
-
-	return 0;
-}
+	if (pdata->has_vop_sel) {
+		if (crtc_state->crtc_id)
+			val = pdata->lcdsel_lit;
+		else
+			val = pdata->lcdsel_big;
 
-static int rockchip_analogix_dp_enable(struct display_state *state)
-{
-	struct connector_state *conn_state = &state->conn_state;
-	struct analogix_dp_device *dp = conn_state->private;
-	int ret;
+		writel(val, dp->grf + pdata->lcdsel_grf_reg);
+	}
 
 	ret = analogix_dp_set_link_train(dp, dp->video_info.max_lane_count,
 					 dp->video_info.max_link_rate);
 	if (ret) {
-		pr_err("unable to do link train\n");
-		return 0;
+		dev_err(dp->dev, "unable to do link train\n");
+		return ret;
 	}
 
 	analogix_dp_enable_scramble(dp, 1);
@@ -986,58 +863,116 @@ static int rockchip_analogix_dp_enable(struct display_state *state)
 
 	analogix_dp_init_video(dp);
 	ret = analogix_dp_config_video(dp);
-	if (ret)
-		pr_err("unable to config video\n");
+	if (ret) {
+		dev_err(dp->dev, "unable to config video\n");
+		return ret;
+	}
 
 	return 0;
 }
 
-static int rockchip_analogix_dp_disable(struct display_state *state)
+static int analogix_dp_connector_disable(struct display_state *state)
 {
 	/* TODO */
 
 	return 0;
 }
 
-const struct rockchip_connector_funcs rockchip_analogix_dp_funcs = {
-	.init = rockchip_analogix_dp_init,
-	.deinit = rockchip_analogix_dp_deinit,
-	.get_edid = rockchip_analogix_dp_get_edid,
-	.prepare = rockchip_analogix_dp_prepare,
-	.enable = rockchip_analogix_dp_enable,
-	.disable = rockchip_analogix_dp_disable,
+static const struct rockchip_connector_funcs analogix_dp_connector_funcs = {
+	.init = analogix_dp_connector_init,
+	.get_edid = analogix_dp_connector_get_edid,
+	.enable = analogix_dp_connector_enable,
+	.disable = analogix_dp_connector_disable,
 };
 
-static const struct rockchip_connector rk3288_analogix_dp_data = {
-	 .funcs = &rockchip_analogix_dp_funcs,
-	 .data = &rk3288_analogix_dp_drv_data,
+static int analogix_dp_probe(struct udevice *dev)
+{
+	struct analogix_dp_device *dp = dev_get_priv(dev);
+	const struct rockchip_connector *connector =
+		(const struct rockchip_connector *)dev_get_driver_data(dev);
+	const struct rockchip_dp_chip_data *pdata = connector->data;
+	int ret;
+
+	dp->reg_base = dev_read_addr_ptr(dev);
+	dp->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	if (IS_ERR(dp->grf))
+		return PTR_ERR(dp->grf);
+
+	ret = gpio_request_by_name(dev, "hpd-gpios", 0, &dp->hpd_gpio,
+				   GPIOD_IS_IN);
+	if (ret && ret != -ENOENT) {
+		dev_err(dev, "failed to get hpd GPIO: %d\n", ret);
+		return ret;
+	}
+
+	dp->plat_data.dev_type = ROCKCHIP_DP;
+	dp->plat_data.subdev_type = pdata->chip_type;
+	/*
+	 * Like Rockchip DisplayPort TRM indicate that "Main link
+	 * containing 4 physical lanes of 2.7/1.62 Gbps/lane".
+	 */
+	dp->video_info.max_link_rate = 0x0A;
+	dp->video_info.max_lane_count = 0x04;
+
+	dp->dev = dev;
+
+	return 0;
+}
+
+static const struct rockchip_dp_chip_data rk3288_edp_platform_data = {
+	.lcdsel_grf_reg = 0x025c,
+	.lcdsel_big = 0 | BIT(21),
+	.lcdsel_lit = BIT(5) | BIT(21),
+	.chip_type = RK3288_DP,
+	.has_vop_sel = true,
+};
+
+static const struct rockchip_connector rk3288_edp_driver_data = {
+	 .funcs = &analogix_dp_connector_funcs,
+	 .data = &rk3288_edp_platform_data,
+};
+
+static const struct rockchip_dp_chip_data rk3368_edp_platform_data = {
+	.chip_type = RK3368_EDP,
+	.has_vop_sel = false,
+};
+
+static const struct rockchip_connector rk3368_edp_driver_data = {
+	 .funcs = &analogix_dp_connector_funcs,
+	 .data = &rk3368_edp_platform_data,
 };
 
-static const struct rockchip_connector rk3399_analogix_edp_data = {
-	 .funcs = &rockchip_analogix_dp_funcs,
-	 .data = &rk3399_analogix_edp_drv_data,
+static const struct rockchip_dp_chip_data rk3399_edp_platform_data = {
+	.lcdsel_grf_reg = 0x6250,
+	.lcdsel_big = 0 | BIT(21),
+	.lcdsel_lit = BIT(5) | BIT(21),
+	.chip_type = RK3399_EDP,
+	.has_vop_sel = true,
 };
 
-static const struct rockchip_connector rk3368_analogix_edp_data = {
-	 .funcs = &rockchip_analogix_dp_funcs,
-	 .data = &rk3368_analogix_edp_drv_data,
+static const struct rockchip_connector rk3399_edp_driver_data = {
+	 .funcs = &analogix_dp_connector_funcs,
+	 .data = &rk3399_edp_platform_data,
 };
 
-static const struct udevice_id rockchip_analogix_dp_ids[] = {
+static const struct udevice_id analogix_dp_ids[] = {
 	{
-	 .compatible = "rockchip,rk3288-dp",
-	 .data = (ulong)&rk3288_analogix_dp_data,
-	},{
-	 .compatible = "rockchip,rk3399-edp",
-	 .data = (ulong)&rk3399_analogix_edp_data,
-	},{
-	 .compatible = "rockchip,rk3368-edp",
-	 .data = (ulong)&rk3368_analogix_edp_data,
-	}, {}
+		.compatible = "rockchip,rk3288-dp",
+		.data = (ulong)&rk3288_edp_driver_data,
+	}, {
+		.compatible = "rockchip,rk3368-edp",
+		.data = (ulong)&rk3368_edp_driver_data,
+	}, {
+		.compatible = "rockchip,rk3399-edp",
+		.data = (ulong)&rk3399_edp_driver_data,
+	},
+	{}
 };
 
-U_BOOT_DRIVER(rockchip_analogix_dp) = {
-	.name = "rockchip_analogix_dp",
+U_BOOT_DRIVER(analogix_dp) = {
+	.name = "analogix_dp",
 	.id = UCLASS_DISPLAY,
-	.of_match = rockchip_analogix_dp_ids,
+	.of_match = analogix_dp_ids,
+	.probe = analogix_dp_probe,
+	.priv_auto_alloc_size = sizeof(struct analogix_dp_device),
 };
diff --git a/drivers/video/drm/rockchip_analogix_dp.h b/drivers/video/drm/rockchip_analogix_dp.h
index dc54ea8e1b..68295d01f2 100644
--- a/drivers/video/drm/rockchip_analogix_dp.h
+++ b/drivers/video/drm/rockchip_analogix_dp.h
@@ -1068,13 +1068,14 @@ struct analogix_dp_plat_data {
 };
 
 struct analogix_dp_device {
+	struct udevice *dev;
 	void *reg_base;
 	void *grf;
 	struct gpio_desc hpd_gpio;
 	struct video_info	video_info;
 	struct link_train	link_train;
 	struct drm_display_mode *mode;
-	struct analogix_dp_plat_data *plat_data;
+	struct analogix_dp_plat_data plat_data;
 	unsigned char edid[EDID_BLOCK_LENGTH * 2];
 };
 
diff --git a/drivers/video/drm/rockchip_analogix_dp_reg.c b/drivers/video/drm/rockchip_analogix_dp_reg.c
index 4cdcdfd0ab..3cf93b3990 100644
--- a/drivers/video/drm/rockchip_analogix_dp_reg.c
+++ b/drivers/video/drm/rockchip_analogix_dp_reg.c
@@ -81,10 +81,10 @@ void analogix_dp_init_analog_param(struct analogix_dp_device *dp)
 	reg = SEL_24M | TX_DVDD_BIT_1_0625V;
 	writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_2);
 
-	if (dp->plat_data && (dp->plat_data->dev_type == ROCKCHIP_DP)) {
+	if (dp->plat_data.dev_type == ROCKCHIP_DP) {
 		reg = REF_CLK_24M;
-		if (dp->plat_data->subdev_type == RK3288_DP ||
-		    dp->plat_data->subdev_type == RK3368_EDP)
+		if (dp->plat_data.subdev_type == RK3288_DP ||
+		    dp->plat_data.subdev_type == RK3368_EDP)
 			reg ^= REF_CLK_MASK;
 
 		writel(reg, dp->reg_base + ANALOGIX_DP_PLL_REG_1);
@@ -256,7 +256,7 @@ void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
 	u32 reg;
 	u32 phy_pd_addr = ANALOGIX_DP_PHY_PD;
 
-	if (dp->plat_data && (dp->plat_data->dev_type == ROCKCHIP_DP))
+	if (dp->plat_data.dev_type == ROCKCHIP_DP)
 		phy_pd_addr = ANALOGIX_DP_PD;
 
 	switch (block) {
@@ -360,8 +360,9 @@ void analogix_dp_init_analog_func(struct analogix_dp_device *dp)
 
 		while (analogix_dp_get_pll_lock_status(dp) == PLL_UNLOCKED) {
 			timeout_loop++;
-			if(DP_TIMEOUT_LOOP_COUNT < timeout_loop) {
-				pr_err("failed to get pll lock status\n");
+			if (timeout_loop > DP_TIMEOUT_LOOP_COUNT) {
+				dev_err(dp->dev,
+					"failed to get pll lock status\n");
 				return;
 			}
 			udelay(20);
@@ -460,7 +461,7 @@ void analogix_dp_init_aux(struct analogix_dp_device *dp)
 	analogix_dp_reset_aux(dp);
 
 	/* Disable AUX transaction H/W retry */
-	if (dp->plat_data && (dp->plat_data->dev_type == ROCKCHIP_DP))
+	if (dp->plat_data.dev_type == ROCKCHIP_DP)
 		reg = AUX_BIT_PERIOD_EXPECTED_DELAY(0) |
 		      AUX_HW_RETRY_COUNT_SEL(3) |
 		      AUX_HW_RETRY_INTERVAL_600_MICROSECONDS;
@@ -521,9 +522,10 @@ int analogix_dp_start_aux_transaction(struct analogix_dp_device *dp)
 	while (!(reg & RPLY_RECEIV)) {
 		timeout_loop++;
 		if (DP_TIMEOUT_LOOP_COUNT < timeout_loop) {
-			pr_err("AUX CH command reply failed!\n");
+			dev_err(dp->dev, "AUX CH command reply failed!\n");
 			return -ETIMEDOUT;
 		}
+
 		reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA);
 		udelay(11);
 	}
@@ -541,8 +543,8 @@ int analogix_dp_start_aux_transaction(struct analogix_dp_device *dp)
 	/* Check AUX CH error access status */
 	reg = readl(dp->reg_base + ANALOGIX_DP_AUX_CH_STA);
 	if ((reg & AUX_STATUS_MASK) != 0) {
-		pr_err("AUX CH error happens: %d\n\n",
-			reg & AUX_STATUS_MASK);
+		dev_err(dp->dev,
+			"AUX CH error happens: %d\n", reg & AUX_STATUS_MASK);
 		return -EREMOTEIO;
 	}
 
@@ -586,8 +588,6 @@ int analogix_dp_write_byte_to_dpcd(struct analogix_dp_device *dp,
 		retval = analogix_dp_start_aux_transaction(dp);
 		if (retval == 0)
 			break;
-
-		pr_debug("%s: Aux Transaction fail!\n", __func__);
 	}
 
 	return retval;
@@ -626,8 +626,6 @@ int analogix_dp_read_byte_from_dpcd(struct analogix_dp_device *dp,
 		retval = analogix_dp_start_aux_transaction(dp);
 		if (retval == 0)
 			break;
-
-		pr_info("%s: Aux Transaction fail!\n", __func__);
 	}
 
 	/* Read data buffer */
@@ -691,9 +689,6 @@ int analogix_dp_write_bytes_to_dpcd(struct analogix_dp_device *dp,
 			retval = analogix_dp_start_aux_transaction(dp);
 			if (retval == 0)
 				break;
-
-			pr_debug("%s: Aux Transaction fail!\n",
-				__func__);
 		}
 
 		start_offset += cur_data_count;
@@ -749,9 +744,6 @@ int analogix_dp_read_bytes_from_dpcd(struct analogix_dp_device *dp,
 			retval = analogix_dp_start_aux_transaction(dp);
 			if (retval == 0)
 				break;
-
-			pr_debug("%s: Aux Transaction fail!\n",
-				__func__);
 		}
 
 		for (cur_data_idx = 0; cur_data_idx < cur_data_count;
@@ -795,10 +787,10 @@ int analogix_dp_select_i2c_device(struct analogix_dp_device *dp,
 
 	/* Start AUX transaction */
 	retval = analogix_dp_start_aux_transaction(dp);
-	if (retval != 0)
-		pr_debug("%s: Aux Transaction fail!\n", __func__);
+	if (retval < 0)
+		return retval;
 
-	return retval;
+	return 0;
 }
 
 int analogix_dp_read_byte_from_i2c(struct analogix_dp_device *dp,
@@ -834,8 +826,6 @@ int analogix_dp_read_byte_from_i2c(struct analogix_dp_device *dp,
 		retval = analogix_dp_start_aux_transaction(dp);
 		if (retval == 0)
 			break;
-
-		pr_debug("%s: Aux Transaction fail!\n", __func__);
 	}
 
 	/* Read data */
@@ -894,15 +884,12 @@ int analogix_dp_read_bytes_from_i2c(struct analogix_dp_device *dp,
 				retval = analogix_dp_start_aux_transaction(dp);
 				if (retval == 0)
 					break;
-
-				pr_debug("%s: Aux Transaction fail!\n",
-					__func__);
 			}
 			/* Check if Rx sends defer */
 			reg = readl(dp->reg_base + ANALOGIX_DP_AUX_RX_COMM);
 			if (reg == AUX_RX_COMM_AUX_DEFER ||
 			    reg == AUX_RX_COMM_I2C_DEFER) {
-				pr_err("Defer: %d\n\n", reg);
+				dev_dbg(dp->dev, "Defer: %d\n\n", reg);
 				defer = 1;
 			}
 		}
@@ -1175,21 +1162,16 @@ int analogix_dp_is_slave_video_stream_clock_on(struct analogix_dp_device *dp)
 
 	reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_1);
 
-	if (!(reg & DET_STA)) {
-		pr_debug("Input stream clock not detected.\n");
+	if (!(reg & DET_STA))
 		return -EINVAL;
-	}
 
 	reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_2);
 	writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_2);
 
 	reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_2);
-	pr_debug("wait SYS_CTL_2.\n");
 
-	if (reg & CHA_STA) {
-		pr_debug("Input stream clk is changing\n");
+	if (reg & CHA_STA)
 		return -EINVAL;
-	}
 
 	return 0;
 }
@@ -1277,10 +1259,8 @@ int analogix_dp_is_video_stream_on(struct analogix_dp_device *dp)
 	writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
 
 	reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
-	if (!(reg & STRM_VALID)) {
-		pr_debug("Input video stream is not detected.\n");
+	if (!(reg & STRM_VALID))
 		return -EINVAL;
-	}
 
 	return 0;
 }

commit 95351b7a0ea594607638a7fb4f89bff8a966c570
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Dec 17 16:04:29 2018 +0800

    rockchip: dts: rk3399: add rk3399pro evb board recovery key
    
    Change-Id: I5fe5a5532e7a6d47209ac38774497575b9c3072a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts
index 46bf2072b3..bbc1c0f4a1 100644
--- a/arch/arm/dts/rk3399-evb.dts
+++ b/arch/arm/dts/rk3399-evb.dts
@@ -18,17 +18,33 @@
 	compatible = "rockchip,rk3399-evb", "rockchip,rk3399",
 		     "google,rk3399evb-rev2";
 
-	rk_key: rockchip-key {
+	/* RK3399 evb board */
+	rk_key0 {
 		u-boot,dm-pre-reloc;
 		compatible = "rockchip,key";
 		status = "okay";
 		io-channels = <&saradc 1>;
 
 		vol-up-key {
-				u-boot,dm-pre-reloc;
-		        linux,code = <KEY_VOLUMEUP>;
-		        label = "volume up";
-		        rockchip,adc_value = <1>;
+			u-boot,dm-pre-reloc;
+			linux,code = <KEY_VOLUMEUP>;
+			label = "volume up";
+			rockchip,adc_value = <1>;
+		};
+	};
+
+	/* RK3399PRO evb board */
+	rk_key1 {
+		u-boot,dm-pre-reloc;
+		compatible = "rockchip,key";
+		status = "okay";
+		io-channels = <&saradc 2>;
+
+		vol-up-key {
+			u-boot,dm-pre-reloc;
+			linux,code = <KEY_VOLUMEUP>;
+			label = "volume up";
+			rockchip,adc_value = <10>;
 		};
 	};
 

commit adba3792a71bd52a6f8276fae1acc1c323997d72
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Dec 17 17:19:20 2018 +0800

    dm: key: support register multiple same key code
    
    Due to some board use the same u-boot rkxx-evb.dts, dm key had
    better support parse same key code for times.
    
    Change-Id: Ifeeb75bef90e52e2747ef2858cec500a928c806d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/key-uclass.c b/drivers/input/key-uclass.c
index 43ed0ddd38..3cc541e687 100644
--- a/drivers/input/key-uclass.c
+++ b/drivers/input/key-uclass.c
@@ -11,6 +11,13 @@
 
 static LIST_HEAD(key_list);
 
+const char *evt_name[] = {
+	"Not down",
+	"Down",
+	"Long down",
+	"Not exist",
+};
+
 static inline uint64_t arch_counter_get_cntpct(void)
 {
 	uint64_t cval = 0;
@@ -50,8 +57,8 @@ static int key_read_adc_simple_event(struct input_key *key, unsigned int adcval)
 	else
 		min = 0;
 
-	debug("%s: %s: val=%d, max=%d, min=%d, adcval=%d\n",
-	      __func__, key->name, key->adcval, max, min, adcval);
+	debug("%s: '%s' configure adc=%d: range[%d~%d]; hw adcval=%d\n",
+	      __func__, key->name, key->adcval, min, max, adcval);
 
 	/* Check */
 	if ((adcval <= max) && (adcval >= min)) {
@@ -147,52 +154,50 @@ int key_read(int code)
 	static int initialized;
 	unsigned int adcval;
 	int keyval = KEY_NOT_EXIST;
-	int found = 0, ret;
+	int ret;
 
 	/* Initialize all key drivers */
 	if (!initialized) {
 		for (uclass_first_device(UCLASS_KEY, &dev);
 		     dev;
 		     uclass_next_device(&dev)) {
-			debug("%s: dev.name = %s\n", __func__, dev->name);
-			;
+			debug("%s: have found key driver '%s'\n\n",
+			      __func__, dev->name);
 		}
 	}
 
 	/* Search on the key list */
 	list_for_each_entry(key, &key_list, link) {
-		if (key->code == code) {
-			found = 1;
-			break;
-		}
-	}
-	if (!found)
-		goto out;
-
-	/* Is a adc key? */
-	if (key->type & ADC_KEY) {
-		ret = adc_channel_single_shot("saradc", key->channel, &adcval);
-		if (ret)
-			printf("%s: failed to read saradc, ret=%d\n",
-			       key->name, ret);
-		else
-			keyval = key_read_adc_simple_event(key, adcval);
-	/* Is a gpio key? */
-	} else if (key->type & GPIO_KEY) {
-		/* All pwrkey must register as an interrupt event */
-		if (key->code == KEY_POWER) {
-			keyval = key_read_gpio_interrupt_event(key);
+		if (key->code != code)
+			continue;
+
+		/* Is a adc key? */
+		if (key->type & ADC_KEY) {
+			ret = adc_channel_single_shot("saradc",
+						      key->channel, &adcval);
+			if (ret)
+				printf("%s: failed to read saradc, ret=%d\n",
+				       key->name, ret);
+			else
+				keyval = key_read_adc_simple_event(key, adcval);
+		/* Is a gpio key? */
+		} else if (key->type & GPIO_KEY) {
+			/* All pwrkey must register as an interrupt event */
+			if (key->code == KEY_POWER)
+				keyval = key_read_gpio_interrupt_event(key);
+			else
+				keyval = key_read_gpio_simple_event(key);
 		} else {
-			keyval = key_read_gpio_simple_event(key);
+			printf("%s: invalid key type!\n", __func__);
 		}
-	} else {
-		printf("%s: invalid key type!\n", __func__);
-	}
 
-	debug("%s: key.name=%s, code=%d, keyval=%d\n",
-	      __func__, key->name, key->code, keyval);
+		debug("%s: '%s'(code=%d) is %s\n",
+		      __func__, key->name, key->code, evt_name[keyval]);
+
+		if (keyval == KEY_PRESS_DOWN || keyval == KEY_PRESS_LONG_DOWN)
+			break;
+	}
 
-out:
 	return keyval;
 }
 

commit 8171b1ba1b36d8a6236ad21a69c67a23466d8198
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Dec 17 15:54:28 2018 +0800

    rockchip: rk3399: support rk3399pro uart2 input
    
    RK3399: uart2c; RK3399PRO: uart2a.
    
    Change-Id: Ic750e862c30cfd63de4ad800ebf49133feaefb01
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3399.h b/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
index b541e2caa1..c29e2379d9 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
@@ -527,6 +527,8 @@ enum {
 	/* GRF_SOC_CON7 */
 	GRF_UART_DBG_SEL_SHIFT  = 10,
 	GRF_UART_DBG_SEL_MASK   = 3 << GRF_UART_DBG_SEL_SHIFT,
+	GRF_UART_DBG_SEL_A	= 0,
+	GRF_UART_DBG_SEL_B	= 1,
 	GRF_UART_DBG_SEL_C      = 2,
 
 	/* GRF_SOC_CON20 */
diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c
index 89b3b6d004..ca154f745b 100644
--- a/arch/arm/mach-rockchip/rk3399/rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
@@ -128,16 +128,23 @@ void board_debug_uart_init(void)
 		     GRF_GPIO2C1_SEL_MASK,
 		     GRF_UART0BT_SOUT << GRF_GPIO2C1_SEL_SHIFT);
 #else
-	/* Enable early UART2 channel C on the RK3399 */
+	/* Enable early UART2 channel C on the RK3399/RK3399PRO */
 	rk_clrsetreg(&grf->gpio4c_iomux,
 		     GRF_GPIO4C3_SEL_MASK,
 		     GRF_UART2DGBC_SIN << GRF_GPIO4C3_SEL_SHIFT);
 	rk_clrsetreg(&grf->gpio4c_iomux,
 		     GRF_GPIO4C4_SEL_MASK,
 		     GRF_UART2DBGC_SOUT << GRF_GPIO4C4_SEL_SHIFT);
+#if defined(CONFIG_ROCKCHIP_RK3399PRO)
+	/* Set channel A as UART2 input */
+	rk_clrsetreg(&grf->soc_con7,
+		     GRF_UART_DBG_SEL_MASK,
+		     GRF_UART_DBG_SEL_A << GRF_UART_DBG_SEL_SHIFT);
+#else
 	/* Set channel C as UART2 input */
 	rk_clrsetreg(&grf->soc_con7,
 		     GRF_UART_DBG_SEL_MASK,
 		     GRF_UART_DBG_SEL_C << GRF_UART_DBG_SEL_SHIFT);
 #endif
+#endif
 }

commit 4d763c7bd8f8c0f0a074738ccf687cf3f4506122
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Dec 17 14:59:21 2018 +0800

    rockchip: rk3399: add syscon scan sub dev
    
    Change-Id: Icb0b59fa7cb61e41fc611b5671625854894d2283
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c b/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c
index 74d4552017..5cf57f4d45 100644
--- a/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c
@@ -20,6 +20,9 @@ static const struct udevice_id rk3399_syscon_ids[] = {
 U_BOOT_DRIVER(syscon_rk3399) = {
 	.name = "rk3399_syscon",
 	.id = UCLASS_SYSCON,
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	.bind = dm_scan_fdt_dev,
+#endif
 	.of_match = rk3399_syscon_ids,
 };
 

commit 80cc39079267eb5fe8b8f9c040b320cccbe1642b
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Wed Dec 12 15:15:05 2018 +0800

    dts: rockchip: rk3288: update ddc-bus for hdmi
    
    use hdmi_ddc instead of i2c5 for read edid.
    
    Change-Id: Ie2efcf99a50bb7cdb68eaa4b8c3a783a743e758e
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index 963930923f..6e7418378e 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -818,11 +818,12 @@
 		compatible = "rockchip,rk3288-dw-hdmi";
 		reg = <0xff980000 0x20000>;
 		reg-io-width = <4>;
-		ddc-i2c-bus = <&i2c5>;
 		rockchip,grf = <&grf>;
 		interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru  PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>;
 		clock-names = "iahb", "isfr";
+		pinctrl-names = "default";
+		pinctrl-0 = <&hdmi_ddc>;
 		status = "disabled";
 		ports {
 			hdmi_in: port {
@@ -1134,6 +1135,13 @@
 			#interrupt-cells = <2>;
 		};
 
+		hdmi {
+			hdmi_ddc: hdmi-ddc {
+				rockchip,pins = <7 19 RK_FUNC_2 &pcfg_pull_none>,
+						<7 20 RK_FUNC_2 &pcfg_pull_none>;
+			};
+		};
+
 		pcfg_pull_up: pcfg-pull-up {
 			bias-pull-up;
 		};

commit d52543056c6a017f27d8fc2a4af38d939863815d
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Mon Dec 10 10:41:45 2018 +0800

    configs: rk322x_defconfig: update with save defconfig
    
    Change-Id: Iedb228f9794bdba0cdc5598935a877291730b1b9
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/configs/rk322x_defconfig b/configs/rk322x_defconfig
index 80019e4a3a..4da83f994e 100644
--- a/configs/rk322x_defconfig
+++ b/configs/rk322x_defconfig
@@ -3,12 +3,12 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x1000
-CONFIG_ROCKCHIP_RK322X=y
 CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl.lds"
 CONFIG_TPL_TEXT_BASE=0x10081000
 CONFIG_TPL_MAX_SIZE=28672
+CONFIG_ROCKCHIP_RK322X=y
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
 CONFIG_TPL_STACK=0x10088000
-CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
@@ -19,7 +19,6 @@ CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
@@ -101,10 +100,10 @@ CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_HDMI=y
 CONFIG_ROCKCHIP_INNO_HDMI_PHY=y
-CONFIG_ROCKCHIP_DRM_TVE=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
+CONFIG_ROCKCHIP_DRM_TVE=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y

commit 048ac2b7215613cb9392f8d8ffafd14d7533b4ff
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Wed Dec 12 14:51:44 2018 +0800

    dts: rockchip: rk3288: update dsi node from kernel.
    
    Change-Id: I43ffd5e2d782bb18ac6c7fb96db0628458bb5a2d
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3288-evb-rk1608.dtsi b/arch/arm/dts/rk3288-evb-rk1608.dtsi
index a21868b1b9..3c07e5a83a 100644
--- a/arch/arm/dts/rk3288-evb-rk1608.dtsi
+++ b/arch/arm/dts/rk3288-evb-rk1608.dtsi
@@ -440,7 +440,7 @@
 	status = "okay";
 };
 
-&mipi_dsi0 {
+&dsi0 {
 	status = "disabled";
 	rockchip,panel = <&panel>;
 	display-timings {
diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index ce27705144..963930923f 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -868,13 +868,15 @@
 		};
 	};
 
-	mipi_dsi0: mipi@ff960000 {
-		compatible = "rockchip,rk3288_mipi_dsi";
+	dsi0: mipi@ff960000 {
+		compatible = "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi";
 		reg = <0xff960000 0x4000>;
-		clocks = <&cru PCLK_MIPI_DSI0>;
-		clock-names = "pclk_mipi";
-		/*pinctrl-names = "default";
-		pinctrl-0 = <&lcdc0_ctl>;*/
+		interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_MIPIDSI_24M>, <&cru PCLK_MIPI_DSI0>;
+		clock-names = "ref", "pclk";
+		resets = <&cru SRST_MIPIDSI0>;
+		reset-names = "apb";
+		power-domains = <&power RK3288_PD_VIO>;
 		rockchip,grf = <&grf>;
 		#address-cells = <1>;
 		#size-cells = <0>;

commit 0fd7e0574c9d7b88d3ddb3234481387444fe09ee
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Wed Dec 12 14:37:44 2018 +0800

    rockchip: dt-bindings: clk: rk3288: add SCLK_MIPIDSI_24M
    
    Change-Id: I268aadd6065f93f17e5a48e9b5acf63d2e5132a1
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/include/dt-bindings/clock/rk3288-cru.h b/include/dt-bindings/clock/rk3288-cru.h
index e37113a72d..c86ae74381 100644
--- a/include/dt-bindings/clock/rk3288-cru.h
+++ b/include/dt-bindings/clock/rk3288-cru.h
@@ -75,6 +75,7 @@
 #define SCLK_USBPHY480M_SRC	122
 #define SCLK_PVTM_CORE		123
 #define SCLK_PVTM_GPU		124
+#define SCLK_MIPIDSI_24M	126
 
 #define SCLK_MAC_PLL		150
 #define SCLK_MAC		151

commit 03773c159a231a891a4af23d0d1db2763799d341
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Wed Dec 12 14:31:28 2018 +0800

    dts: rockchip: rk3288: sync display-subsystem route node form kernel.
    
    Change-Id: I6758525abe308a35e4dcf3b20905c114d8a5ab46
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index 20adb0dece..ce27705144 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -183,6 +183,24 @@
 				charge_logo,mode = "center";
 				connect = <&vopl_out_edp>;
 			};
+
+			route_dsi0: route-dsi0 {
+				status = "disabled";
+				logo,uboot = "logo.bmp";
+				logo,kernel = "logo_kernel.bmp";
+				logo,mode = "center";
+				charge_logo,mode = "center";
+				connect = <&vopl_out_dsi0>;
+			};
+
+			route_lvds: route-lvds {
+				status = "disabled";
+				logo,uboot = "logo.bmp";
+				logo,kernel = "logo_kernel.bmp";
+				logo,mode = "center";
+				charge_logo,mode = "center";
+				connect = <&vopl_out_lvds>;
+			};
 		};
 	};
 
@@ -340,6 +358,7 @@
 		pinctrl-0 = <&i2c5_xfer>;
 		status = "disabled";
 	};
+
 	uart0: serial@ff180000 {
 		compatible = "rockchip,rk3288-uart", "snps,dw-apb-uart";
 		reg = <0xff180000 0x100>;
@@ -408,6 +427,7 @@
 		pinctrl-0 = <&uart4_xfer>;
 		status = "disabled";
 	};
+
 	thermal: thermal-zones {
 		#include "rk3288-thermal.dtsi"
 	};
@@ -702,9 +722,9 @@
 				reg = <2>;
 				remote-endpoint = <&lvds_in_vopb>;
 			};
-			vopb_out_mipi: endpoint@3 {
+			vopb_out_dsi0: endpoint@3 {
 				reg = <3>;
-				remote-endpoint = <&mipi_in_vopb>;
+				remote-endpoint = <&dsi0_in_vopb>;
 			};
 
 		};
@@ -746,9 +766,9 @@
 				reg = <2>;
 				remote-endpoint = <&lvds_in_vopl>;
 			};
-			vopl_out_mipi: endpoint@3 {
+			vopl_out_dsi0: endpoint@3 {
 				reg = <3>;
-				remote-endpoint = <&mipi_in_vopl>;
+				remote-endpoint = <&dsi0_in_vopl>;
 			};
 
 		};
@@ -866,13 +886,13 @@
 			mipi_in: port {
 				#address-cells = <1>;
 				#size-cells = <0>;
-				mipi_in_vopb: endpoint@0 {
+				dsi0_in_vopb: endpoint@0 {
 					reg = <0>;
-					remote-endpoint = <&vopb_out_mipi>;
+					remote-endpoint = <&vopb_out_dsi0>;
 				};
-				mipi_in_vopl: endpoint@1 {
+				dsi0_in_vopl: endpoint@1 {
 					reg = <1>;
-					remote-endpoint = <&vopl_out_mipi>;
+					remote-endpoint = <&vopl_out_dsi0>;
 				};
 			};
 		};

commit 8b75ff344498e2106fe6a0b7f699e1697b0c5eb7
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Wed Dec 12 11:06:18 2018 +0800

    clk: rockchip: rk3399: support clk dump
    
    add clk_dump.
    add peri clk getting rate.
    modify aplll init freq to 816M.
    
    Change-Id: I57a9c2f708c12968909b804f957e80fb0c6d3573
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
index 15144d71e8..78d7066ac3 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
@@ -97,6 +97,7 @@ check_member(rk3399_cru, sdio1_con[1], 0x594);
 
 enum apll_frequencies {
 	APLL_1600_MHZ,
+	APLL_816_MHZ,
 	APLL_600_MHZ,
 };
 
@@ -119,4 +120,10 @@ enum rk3399_pll_id {
 	END_PLL_ID
 };
 
+struct rk3399_clk_info {
+	unsigned long id;
+	char *name;
+	bool is_cru;
+};
+
 #endif	/* __ASM_ARCH_CRU_RK3399_H_ */
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index ae8a9c7dbe..46b907254c 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -56,13 +56,42 @@ static const struct pll_div ppll_init_cfg = PLL_DIVISORS(PPLL_HZ, 2, 2, 1);
 static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 1, 3, 1);
 static const struct pll_div npll_init_cfg = PLL_DIVISORS(NPLL_HZ, 1, 3, 1);
 static const struct pll_div apll_1600_cfg = PLL_DIVISORS(1600*MHz, 3, 1, 1);
+static const struct pll_div apll_816_cfg = PLL_DIVISORS(816 * MHz, 1, 2, 1);
 static const struct pll_div apll_600_cfg = PLL_DIVISORS(600*MHz, 1, 2, 1);
 
 static const struct pll_div *apll_cfgs[] = {
 	[APLL_1600_MHZ] = &apll_1600_cfg,
+	[APLL_816_MHZ] = &apll_816_cfg,
 	[APLL_600_MHZ] = &apll_600_cfg,
 };
 
+#ifndef CONFIG_SPL_BUILD
+#define RK3399_CLK_DUMP(_id, _name, _iscru)    \
+{                                              \
+	.id = _id,                              \
+	.name = _name,                          \
+	.is_cru = _iscru,                       \
+}
+
+static const struct rk3399_clk_info clks_dump[] = {
+	RK3399_CLK_DUMP(PLL_APLLL, "aplll", true),
+	RK3399_CLK_DUMP(PLL_APLLB, "apllb", true),
+	RK3399_CLK_DUMP(PLL_DPLL, "dpll", true),
+	RK3399_CLK_DUMP(PLL_CPLL, "cpll", true),
+	RK3399_CLK_DUMP(PLL_GPLL, "gpll", true),
+	RK3399_CLK_DUMP(PLL_NPLL, "npll", true),
+	RK3399_CLK_DUMP(PLL_VPLL, "vpll", true),
+	RK3399_CLK_DUMP(ACLK_PERIHP, "aclk_perihp", true),
+	RK3399_CLK_DUMP(HCLK_PERIHP, "hclk_perihp", true),
+	RK3399_CLK_DUMP(PCLK_PERIHP, "pclk_perihp", true),
+	RK3399_CLK_DUMP(ACLK_PERILP0, "aclk_perilp0", true),
+	RK3399_CLK_DUMP(HCLK_PERILP0, "hclk_perilp0", true),
+	RK3399_CLK_DUMP(PCLK_PERILP0, "pclk_perilp0", true),
+	RK3399_CLK_DUMP(HCLK_PERILP1, "hclk_perilp1", true),
+	RK3399_CLK_DUMP(PCLK_PERILP1, "pclk_perilp1", true),
+};
+#endif
+
 enum {
 	/* PLL_CON0 */
 	PLL_FBDIV_MASK			= 0xfff,
@@ -1018,6 +1047,68 @@ static ulong rk3399_crypto_set_clk(struct rk3399_clk_priv *priv, ulong clk_id,
 
 	return rk3399_crypto_get_clk(priv, clk_id);
 }
+
+static ulong rk3399_peri_get_clk(struct rk3399_clk_priv *priv, ulong clk_id)
+{
+	struct rk3399_cru *cru = priv->cru;
+	u32 div, con, parent;
+
+	switch (clk_id) {
+	case ACLK_PERIHP:
+		con = readl(&cru->clksel_con[14]);
+		div = (con & ACLK_PERIHP_DIV_CON_MASK) >>
+		      ACLK_PERIHP_DIV_CON_SHIFT;
+		parent = GPLL_HZ;
+		break;
+	case PCLK_PERIHP:
+		con = readl(&cru->clksel_con[14]);
+		div = (con & PCLK_PERIHP_DIV_CON_MASK) >>
+		      PCLK_PERIHP_DIV_CON_SHIFT;
+		parent = rk3399_peri_get_clk(priv, ACLK_PERIHP);
+		break;
+	case HCLK_PERIHP:
+		con = readl(&cru->clksel_con[14]);
+		div = (con & HCLK_PERIHP_DIV_CON_MASK) >>
+		      HCLK_PERIHP_DIV_CON_SHIFT;
+		parent = rk3399_peri_get_clk(priv, ACLK_PERIHP);
+		break;
+	case ACLK_PERILP0:
+		con = readl(&cru->clksel_con[23]);
+		div = (con & ACLK_PERILP0_DIV_CON_MASK) >>
+		      ACLK_PERILP0_DIV_CON_SHIFT;
+		parent = GPLL_HZ;
+		break;
+	case HCLK_PERILP0:
+		con = readl(&cru->clksel_con[23]);
+		div = (con & HCLK_PERILP0_DIV_CON_MASK) >>
+		      HCLK_PERILP0_DIV_CON_SHIFT;
+		parent = rk3399_peri_get_clk(priv, ACLK_PERILP0);
+		break;
+	case PCLK_PERILP0:
+		con = readl(&cru->clksel_con[23]);
+		div = (con & PCLK_PERILP0_DIV_CON_MASK) >>
+		      PCLK_PERILP0_DIV_CON_SHIFT;
+		parent = rk3399_peri_get_clk(priv, ACLK_PERILP0);
+		break;
+	case HCLK_PERILP1:
+		con = readl(&cru->clksel_con[25]);
+		div = (con & HCLK_PERILP1_DIV_CON_MASK) >>
+		      HCLK_PERILP1_DIV_CON_SHIFT;
+		parent = GPLL_HZ;
+		break;
+	case PCLK_PERILP1:
+		con = readl(&cru->clksel_con[25]);
+		div = (con & PCLK_PERILP1_DIV_CON_MASK) >>
+		      PCLK_PERILP1_DIV_CON_SHIFT;
+		parent = rk3399_peri_get_clk(priv, HCLK_PERILP1);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
 #endif
 
 static ulong rk3399_clk_get_rate(struct clk *clk)
@@ -1033,7 +1124,7 @@ static ulong rk3399_clk_get_rate(struct clk *clk)
 	case PLL_GPLL:
 	case PLL_NPLL:
 	case PLL_VPLL:
-		rate = rk3399_pll_get_rate(priv, clk->id - 1);
+		rate = rk3399_pll_get_rate(priv, clk->id);
 		break;
 	case HCLK_SDMMC:
 	case SCLK_SDMMC:
@@ -1075,6 +1166,16 @@ static ulong rk3399_clk_get_rate(struct clk *clk)
 	case SCLK_CRYPTO1:
 		rate = rk3399_crypto_get_clk(priv, clk->id);
 		break;
+	case ACLK_PERIHP:
+	case HCLK_PERIHP:
+	case PCLK_PERIHP:
+	case ACLK_PERILP0:
+	case HCLK_PERILP0:
+	case PCLK_PERILP0:
+	case HCLK_PERILP1:
+	case PCLK_PERILP1:
+		rate = rk3399_peri_get_clk(priv, clk->id);
+		break;
 #endif
 	default:
 		return -ENOENT;
@@ -1267,7 +1368,7 @@ static void rkclk_init(struct rk3399_cru *cru)
 	u32 hclk_div;
 	u32 pclk_div;
 
-	rk3399_configure_cpu(cru, APLL_600_MHZ, CPU_CLUSTER_LITTLE);
+	rk3399_configure_cpu(cru, APLL_816_MHZ, CPU_CLUSTER_LITTLE);
 
 	/*
 	 * some cru registers changed by bootrom, we'd better reset them to
@@ -1621,3 +1722,71 @@ U_BOOT_DRIVER(rockchip_rk3399_pmuclk) = {
 	.platdata_auto_alloc_size = sizeof(struct rk3399_pmuclk_plat),
 #endif
 };
+
+#ifndef CONFIG_SPL_BUILD
+/**
+ * soc_clk_dump() - Print clock frequencies
+ * Returns zero on success
+ *
+ * Implementation for the clk dump command.
+ */
+int soc_clk_dump(void)
+{
+	struct udevice *cru_dev, *pmucru_dev;
+	const struct rk3399_clk_info *clk_dump;
+	struct clk clk;
+	unsigned long clk_count = ARRAY_SIZE(clks_dump);
+	unsigned long rate;
+	int i, ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_CLK,
+					  DM_GET_DRIVER(clk_rk3399),
+					  &cru_dev);
+	if (ret) {
+		printf("%s failed to get cru device\n", __func__);
+		return ret;
+	}
+
+	ret = uclass_get_device_by_driver(UCLASS_CLK,
+					  DM_GET_DRIVER(rockchip_rk3399_pmuclk),
+					  &pmucru_dev);
+	if (ret) {
+		printf("%s failed to get pmucru device\n", __func__);
+		return ret;
+	}
+
+	printf("CLK:\n");
+	for (i = 0; i < clk_count; i++) {
+		clk_dump = &clks_dump[i];
+		if (clk_dump->name) {
+			clk.id = clk_dump->id;
+			if (clk_dump->is_cru)
+				ret = clk_request(cru_dev, &clk);
+			else
+				ret = clk_request(pmucru_dev, &clk);
+			if (ret < 0)
+				return ret;
+
+			rate = clk_get_rate(&clk);
+			clk_free(&clk);
+			if (i == 0) {
+				if (rate < 0)
+					printf("%s %s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("%s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
+			} else {
+				if (rate < 0)
+					printf("%s %s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("%s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
+			}
+		}
+	}
+
+	return 0;
+}
+#endif

commit cf04b7e8f20b882458f0416981e1363a660101b7
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Dec 11 18:04:57 2018 +0800

    clk: rockchip: rk3328: support crypto clk setting
    
    Change-Id: I9e4d58050b087c3da6649efe4d3115da2ce6dce7
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3328.h b/arch/arm/include/asm/arch-rockchip/cru_rk3328.h
index 2608bba3c5..06bf1fa092 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3328.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3328.h
@@ -127,6 +127,14 @@ enum {
 	HCLK_PERI_DIV_CON_SHIFT		= 0,
 	HCLK_PERI_DIV_CON_MASK		= 3 << HCLK_PERI_DIV_CON_SHIFT,
 
+	/* CLKSEL_CON20 */
+	CRYPTO_PLL_SEL_SHIFT		= 7,
+	CRYPTO_PLL_SEL_MASK		= 0x1 << CRYPTO_PLL_SEL_SHIFT,
+	CRYPTO_PLL_SEL_CPLL		= 0,
+	CRYPTO_PLL_SEL_GPLL,
+	CRYPTO_DIV_SHIFT		= 0,
+	CRYPTO_DIV_MASK			= 0x7f << CRYPTO_DIV_SHIFT,
+
 	/* CLKSEL_CON22 */
 	CLK_TSADC_DIV_CON_SHIFT		= 0,
 	CLK_TSADC_DIV_CON_MASK		= 0x3ff,
diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c
index d16d914060..343baaedcc 100644
--- a/drivers/clk/rockchip/clk_rk3328.c
+++ b/drivers/clk/rockchip/clk_rk3328.c
@@ -663,6 +663,54 @@ static ulong rk3328_peri_set_clk(struct rk3328_clk_priv *priv,
 	return rk3328_peri_get_clk(priv, clk_id);
 }
 
+#ifndef CONFIG_SPL_BUILD
+static ulong rk3328_crypto_get_clk(struct rk3328_clk_priv *priv, ulong clk_id)
+{
+	struct rk3328_cru *cru = priv->cru;
+	u32 div, con, parent;
+
+	switch (clk_id) {
+	case SCLK_CRYPTO:
+		con = readl(&cru->clksel_con[20]);
+		div = (con & CRYPTO_DIV_MASK) >> CRYPTO_DIV_SHIFT;
+		parent = priv->gpll_hz;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rk3328_crypto_set_clk(struct rk3328_clk_priv *priv, ulong clk_id,
+				   ulong hz)
+{
+	struct rk3328_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+	assert(src_clk_div - 1 <= 127);
+
+	/*
+	 * select gpll as crypto clock source and
+	 * set up dependent divisors for crypto clocks.
+	 */
+	switch (clk_id) {
+	case SCLK_CRYPTO:
+		rk_clrsetreg(&cru->clksel_con[20],
+			     CRYPTO_PLL_SEL_MASK | CRYPTO_DIV_MASK,
+			     CRYPTO_PLL_SEL_GPLL << CRYPTO_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << CRYPTO_DIV_SHIFT);
+		break;
+	default:
+		printf("do not support this peri freq\n");
+		return -EINVAL;
+	}
+
+	return rk3328_crypto_get_clk(priv, clk_id);
+}
+#endif
+
 static ulong rk3328_clk_get_rate(struct clk *clk)
 {
 	struct rk3328_clk_priv *priv = dev_get_priv(clk->dev);
@@ -734,6 +782,9 @@ static ulong rk3328_clk_get_rate(struct clk *clk)
 	case HCLK_VIO:
 		rate = rk3328_vop_get_clk(priv, clk->id);
 		break;
+	case SCLK_CRYPTO:
+		rate = rk3328_crypto_get_clk(priv, clk->id);
+		break;
 #endif
 	default:
 		return -ENOENT;
@@ -811,6 +862,9 @@ static ulong rk3328_clk_set_rate(struct clk *clk, ulong rate)
 	case HCLK_VIO:
 		rate = rk3328_vop_set_clk(priv, clk->id, rate);
 		break;
+	case SCLK_CRYPTO:
+		rate = rk3328_crypto_set_clk(priv, clk->id, rate);
+		break;
 #endif
 	case SCLK_PDM:
 	case SCLK_RTC32K:

commit a7c5f87313809eac146b7e97e6b6e776e3014ac4
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Dec 11 18:01:36 2018 +0800

    clk: rockchip: rk322x: support crypto clk setting
    
    Change-Id: Id92acae9424fd0b200f9b4f33982f753f6123207
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk322x.h b/arch/arm/include/asm/arch-rockchip/cru_rk322x.h
index 98bda7548f..3162b411a9 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk322x.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk322x.h
@@ -148,6 +148,14 @@ enum {
 	SDIO_DIV_SHIFT		= 0,
 	SDIO_DIV_MASK		= 0xff << SDIO_DIV_SHIFT,
 
+	/* CLKSEL_CON24 */
+	CRYPTO_PLL_SEL_SHIFT	= 5,
+	CRYPTO_PLL_SEL_MASK	= 0x1 << CRYPTO_PLL_SEL_SHIFT,
+	CRYPTO_PLL_SEL_CPLL	= 0,
+	CRYPTO_PLL_SEL_GPLL,
+	CRYPTO_DIV_SHIFT	= 0,
+	CRYPTO_DIV_MASK		= 0x1f << CRYPTO_DIV_SHIFT,
+
 	/* CRU_CLKSEL26_CON */
 	DDR_CLK_PLL_SEL_SHIFT	= 8,
 	DDR_CLK_PLL_SEL_MASK	= 3 << DDR_CLK_PLL_SEL_SHIFT,
diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c
index 5371e95cd9..b6c437f607 100644
--- a/drivers/clk/rockchip/clk_rk322x.c
+++ b/drivers/clk/rockchip/clk_rk322x.c
@@ -499,6 +499,52 @@ static ulong rk322x_vop_set_clk(struct rk322x_clk_priv *priv,
 
 	return rk322x_vop_get_clk(priv, clk_id);
 }
+
+static ulong rk322x_crypto_get_clk(struct rk322x_clk_priv *priv, ulong clk_id)
+{
+	struct rk322x_cru *cru = priv->cru;
+	u32 div, con, parent;
+
+	switch (clk_id) {
+	case SCLK_CRYPTO:
+		con = readl(&cru->cru_clksel_con[24]);
+		div = (con & CRYPTO_DIV_MASK) >> CRYPTO_DIV_SHIFT;
+		parent = priv->gpll_hz;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rk322x_crypto_set_clk(struct rk322x_clk_priv *priv, ulong clk_id,
+				   ulong hz)
+{
+	struct rk322x_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+	assert(src_clk_div - 1 <= 31);
+
+	/*
+	 * select gpll as crypto clock source and
+	 * set up dependent divisors for crypto clocks.
+	 */
+	switch (clk_id) {
+	case SCLK_CRYPTO:
+		rk_clrsetreg(&cru->cru_clksel_con[24],
+			     CRYPTO_PLL_SEL_MASK | CRYPTO_DIV_MASK,
+			     CRYPTO_PLL_SEL_GPLL << CRYPTO_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << CRYPTO_DIV_SHIFT);
+		break;
+	default:
+		printf("do not support this peri freq\n");
+		return -EINVAL;
+	}
+
+	return rk322x_crypto_get_clk(priv, clk_id);
+}
 #endif
 
 static ulong rk322x_clk_get_rate(struct clk *clk)
@@ -548,6 +594,9 @@ static ulong rk322x_clk_get_rate(struct clk *clk)
 	case ACLK_VOP:
 		rate = rk322x_vop_get_clk(priv, clk->id);
 		break;
+	case SCLK_CRYPTO:
+		rate = rk322x_crypto_get_clk(priv, clk->id);
+		break;
 #endif
 	default:
 		return -ENOENT;
@@ -612,6 +661,9 @@ static ulong rk322x_clk_set_rate(struct clk *clk, ulong rate)
 	case ACLK_VOP:
 		ret = rk322x_vop_set_clk(priv, clk->id, rate);
 		break;
+	case SCLK_CRYPTO:
+		ret = rk322x_crypto_set_clk(priv, clk->id, rate);
+		break;
 #endif
 	default:
 		return -ENOENT;

commit 51d1c6b1dd4cd8e8e244f61ee0046d8b8a577487
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Dec 11 18:00:37 2018 +0800

    clk: rockchip: px30: support crypto clk setting
    
    Change-Id: I9971fb2b6a40640d78fb259c72aac32582f8e90d
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_px30.h b/arch/arm/include/asm/arch-rockchip/cru_px30.h
index 6703603744..322e962ebf 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_px30.h
@@ -295,6 +295,19 @@ enum {
 	BUS_HCLK_DIV_SHIFT	= 0,
 	BUS_HCLK_DIV_MASK	= 0x1f << BUS_HCLK_DIV_SHIFT,
 
+	/* CRU_CLK_SEL25_CON */
+	CRYPTO_APK_SEL_SHIFT	= 14,
+	CRYPTO_APK_PLL_SEL_MASK	= 3 << CRYPTO_APK_SEL_SHIFT,
+	CRYPTO_PLL_SEL_GPLL	= 0,
+	CRYPTO_PLL_SEL_CPLL,
+	CRYPTO_PLL_SEL_NPLL	= 0,
+	CRYPTO_APK_DIV_SHIFT	= 8,
+	CRYPTO_APK_DIV_MASK	= 0x1f << CRYPTO_APK_DIV_SHIFT,
+	CRYPTO_PLL_SEL_SHIFT	= 6,
+	CRYPTO_PLL_SEL_MASK	= 3 << CRYPTO_PLL_SEL_SHIFT,
+	CRYPTO_DIV_SHIFT	= 0,
+	CRYPTO_DIV_MASK		= 0x1f << CRYPTO_DIV_SHIFT,
+
 	/* CRU_CLK_SEL37_CON */
 	UART2_PLL_SEL_SHIFT	= 14,
 	UART2_PLL_SEL_MASK	= 3 << UART2_PLL_SEL_SHIFT,
diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index fdfa2ed204..56f05e58af 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -960,6 +960,65 @@ static ulong px30_peri_set_clk(struct px30_clk_priv *priv, ulong clk_id,
 	return px30_peri_get_clk(priv, clk_id);
 }
 
+#ifndef CONFIG_SPL_BUILD
+static ulong px30_crypto_get_clk(struct px30_clk_priv *priv, ulong clk_id)
+{
+	struct px30_cru *cru = priv->cru;
+	u32 div, con, parent;
+
+	switch (clk_id) {
+	case SCLK_CRYPTO:
+		con = readl(&cru->clksel_con[25]);
+		div = (con & CRYPTO_DIV_MASK) >> CRYPTO_DIV_SHIFT;
+		parent = priv->gpll_hz;
+		break;
+	case SCLK_CRYPTO_APK:
+		con = readl(&cru->clksel_con[25]);
+		div = (con & CRYPTO_APK_DIV_MASK) >> CRYPTO_APK_DIV_SHIFT;
+		parent = priv->gpll_hz;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong px30_crypto_set_clk(struct px30_clk_priv *priv, ulong clk_id,
+				 ulong hz)
+{
+	struct px30_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+	assert(src_clk_div - 1 <= 31);
+
+	/*
+	 * select gpll as crypto clock source and
+	 * set up dependent divisors for crypto clocks.
+	 */
+	switch (clk_id) {
+	case SCLK_CRYPTO:
+		rk_clrsetreg(&cru->clksel_con[25],
+			     CRYPTO_PLL_SEL_MASK | CRYPTO_DIV_MASK,
+			     CRYPTO_PLL_SEL_GPLL << CRYPTO_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << CRYPTO_DIV_SHIFT);
+		break;
+	case SCLK_CRYPTO_APK:
+		rk_clrsetreg(&cru->clksel_con[25],
+			     CRYPTO_APK_PLL_SEL_MASK | CRYPTO_APK_DIV_MASK,
+			     CRYPTO_PLL_SEL_GPLL << CRYPTO_APK_SEL_SHIFT |
+			     (src_clk_div - 1) << CRYPTO_APK_DIV_SHIFT);
+		break;
+	default:
+		printf("do not support this peri freq\n");
+		return -EINVAL;
+	}
+
+	return px30_crypto_get_clk(priv, clk_id);
+}
+#endif
+
 static int px30_clk_get_gpll_rate(ulong *rate)
 {
 	struct udevice *pmucru_dev;
@@ -1112,6 +1171,12 @@ static ulong px30_clk_get_rate(struct clk *clk)
 	case HCLK_PERI_PRE:
 		rate = px30_peri_get_clk(priv, clk->id);
 		break;
+#ifndef CONFIG_SPL_BUILD
+	case SCLK_CRYPTO:
+	case SCLK_CRYPTO_APK:
+		rate = px30_crypto_get_clk(priv, clk->id);
+		break;
+#endif
 	default:
 		return -ENOENT;
 	}
@@ -1183,6 +1248,12 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate)
 	case HCLK_PERI_PRE:
 		ret = px30_peri_set_clk(priv, clk->id, rate);
 		break;
+#ifndef CONFIG_SPL_BUILD
+	case SCLK_CRYPTO:
+	case SCLK_CRYPTO_APK:
+		ret = px30_crypto_set_clk(priv, clk->id, rate);
+		break;
+#endif
 	default:
 		return -ENOENT;
 	}

commit 0cde592567d77e0f4857d49ea0feda1aebb82e88
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Dec 11 17:59:37 2018 +0800

    clk: rockchip: rk3308: support crypto clk setting
    
    Change-Id: I58967fe70fbae6630fe0404414daaee6b1498b72
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
index 21da536757..66f02039d8 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
@@ -166,6 +166,19 @@ enum {
 	BUS_HCLK_DIV_SHIFT	= 0,
 	BUS_HCLK_DIV_MASK	= 0x1f << BUS_HCLK_DIV_SHIFT,
 
+	/* CRU_CLK_SEL7_CON */
+	CRYPTO_APK_SEL_SHIFT	= 14,
+	CRYPTO_APK_PLL_SEL_MASK	= 3 << CRYPTO_APK_SEL_SHIFT,
+	CRYPTO_PLL_SEL_DPLL	= 0,
+	CRYPTO_PLL_SEL_VPLL0,
+	CRYPTO_PLL_SEL_VPLL1	= 0,
+	CRYPTO_APK_DIV_SHIFT	= 8,
+	CRYPTO_APK_DIV_MASK	= 0x1f << CRYPTO_APK_DIV_SHIFT,
+	CRYPTO_PLL_SEL_SHIFT	= 6,
+	CRYPTO_PLL_SEL_MASK	= 3 << CRYPTO_PLL_SEL_SHIFT,
+	CRYPTO_DIV_SHIFT	= 0,
+	CRYPTO_DIV_MASK		= 0x1f << CRYPTO_DIV_SHIFT,
+
 	/* CRU_CLK_SEL8_CON */
 	DCLK_VOP_SEL_SHIFT	= 14,
 	DCLK_VOP_SEL_MASK	= 0x3 << DCLK_VOP_SEL_SHIFT,
diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index 28d2c2c657..57cf430dc0 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -696,6 +696,65 @@ static ulong rk3308_audio_set_clk(struct rk3308_clk_priv *priv, ulong clk_id,
 	return rk3308_peri_get_clk(priv, clk_id);
 }
 
+#ifndef CONFIG_SPL_BUILD
+static ulong rk3308_crypto_get_clk(struct rk3308_clk_priv *priv, ulong clk_id)
+{
+	struct rk3308_cru *cru = priv->cru;
+	u32 div, con, parent;
+
+	switch (clk_id) {
+	case SCLK_CRYPTO:
+		con = readl(&cru->clksel_con[7]);
+		div = (con & CRYPTO_DIV_MASK) >> CRYPTO_DIV_SHIFT;
+		parent = priv->vpll0_hz;
+		break;
+	case SCLK_CRYPTO_APK:
+		con = readl(&cru->clksel_con[7]);
+		div = (con & CRYPTO_APK_DIV_MASK) >> CRYPTO_APK_DIV_SHIFT;
+		parent = priv->vpll0_hz;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rk3308_crypto_set_clk(struct rk3308_clk_priv *priv, ulong clk_id,
+				   ulong hz)
+{
+	struct rk3308_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->vpll0_hz, hz);
+	assert(src_clk_div - 1 <= 31);
+
+	/*
+	 * select gpll as crypto clock source and
+	 * set up dependent divisors for crypto clocks.
+	 */
+	switch (clk_id) {
+	case SCLK_CRYPTO:
+		rk_clrsetreg(&cru->clksel_con[7],
+			     CRYPTO_PLL_SEL_MASK | CRYPTO_DIV_MASK,
+			     CRYPTO_PLL_SEL_VPLL0 << CRYPTO_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << CRYPTO_DIV_SHIFT);
+		break;
+	case SCLK_CRYPTO_APK:
+		rk_clrsetreg(&cru->clksel_con[7],
+			     CRYPTO_APK_PLL_SEL_MASK | CRYPTO_APK_DIV_MASK,
+			     CRYPTO_PLL_SEL_VPLL0 << CRYPTO_APK_SEL_SHIFT |
+			     (src_clk_div - 1) << CRYPTO_APK_DIV_SHIFT);
+		break;
+	default:
+		printf("do not support this peri freq\n");
+		return -EINVAL;
+	}
+
+	return rk3308_crypto_get_clk(priv, clk_id);
+}
+#endif
+
 static ulong rk3308_clk_get_rate(struct clk *clk)
 {
 	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
@@ -764,6 +823,12 @@ static ulong rk3308_clk_get_rate(struct clk *clk)
 	case PCLK_AUDIO:
 		rate = rk3308_audio_get_clk(priv, clk->id);
 		break;
+#ifndef CONFIG_SPL_BUILD
+	case SCLK_CRYPTO:
+	case SCLK_CRYPTO_APK:
+		rate = rk3308_crypto_get_clk(priv, clk->id);
+		break;
+#endif
 	default:
 		return -ENOENT;
 	}
@@ -832,6 +897,12 @@ static ulong rk3308_clk_set_rate(struct clk *clk, ulong rate)
 	case PCLK_AUDIO:
 		rate = rk3308_audio_set_clk(priv, clk->id, rate);
 		break;
+#ifndef CONFIG_SPL_BUILD
+	case SCLK_CRYPTO:
+	case SCLK_CRYPTO_APK:
+		ret = rk3308_crypto_set_clk(priv, clk->id, rate);
+		break;
+#endif
 	default:
 		return -ENOENT;
 	}

commit 187d951b8fecf328c5dd353239776ca64fcb4f2e
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Dec 11 17:58:23 2018 +0800

    clk: rockchip: rk3399: support crypto clk setting
    
    Change-Id: I12cbaeac250f21d4cb05d8ef3ef0e9238cb3f911
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index cd2a85b6e2..ae8a9c7dbe 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -169,6 +169,15 @@ enum {
 	ACLK_PERILP0_DIV_CON_SHIFT	= 0,
 	ACLK_PERILP0_DIV_CON_MASK	= 0x1f,
 
+	/* CRU_CLK_SEL24_CON */
+	CRYPTO0_PLL_SEL_SHIFT		= 6,
+	CRYPTO0_PLL_SEL_MASK		= 3 << CRYPTO0_PLL_SEL_SHIFT,
+	CRYPTO_PLL_SEL_CPLL		= 0,
+	CRYPTO_PLL_SEL_GPLL,
+	CRYPTO_PLL_SEL_PPLL		= 0,
+	CRYPTO0_DIV_SHIFT		= 0,
+	CRYPTO0_DIV_MASK		= 0x1f << CRYPTO0_DIV_SHIFT,
+
 	/* CLKSEL_CON25 */
 	PCLK_PERILP1_DIV_CON_SHIFT	= 8,
 	PCLK_PERILP1_DIV_CON_MASK	= 0x7 << PCLK_PERILP1_DIV_CON_SHIFT,
@@ -183,6 +192,10 @@ enum {
 	CLK_SARADC_DIV_CON_SHIFT	= 8,
 	CLK_SARADC_DIV_CON_MASK		= GENMASK(15, 8),
 	CLK_SARADC_DIV_CON_WIDTH	= 8,
+	CRYPTO1_PLL_SEL_SHIFT		= 6,
+	CRYPTO1_PLL_SEL_MASK		= 3 << CRYPTO1_PLL_SEL_SHIFT,
+	CRYPTO1_DIV_SHIFT		= 0,
+	CRYPTO1_DIV_MASK		= 0x1f << CRYPTO1_DIV_SHIFT,
 
 	/* CLKSEL_CON27 */
 	CLK_TSADC_SEL_X24M		= 0x0,
@@ -948,6 +961,65 @@ static ulong rk3399_tsadc_set_clk(struct rk3399_cru *cru, uint hz)
 	return rk3399_tsadc_get_clk(cru);
 }
 
+#ifndef CONFIG_SPL_BUILD
+static ulong rk3399_crypto_get_clk(struct rk3399_clk_priv *priv, ulong clk_id)
+{
+	struct rk3399_cru *cru = priv->cru;
+	u32 div, con, parent;
+
+	switch (clk_id) {
+	case SCLK_CRYPTO0:
+		con = readl(&cru->clksel_con[24]);
+		div = (con & CRYPTO0_DIV_MASK) >> CRYPTO0_DIV_SHIFT;
+		parent = GPLL_HZ;
+		break;
+	case SCLK_CRYPTO1:
+		con = readl(&cru->clksel_con[26]);
+		div = (con & CRYPTO1_DIV_MASK) >> CRYPTO1_DIV_SHIFT;
+		parent = GPLL_HZ;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rk3399_crypto_set_clk(struct rk3399_clk_priv *priv, ulong clk_id,
+				   ulong hz)
+{
+	struct rk3399_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(GPLL_HZ, hz);
+	assert(src_clk_div - 1 <= 31);
+
+	/*
+	 * select gpll as crypto clock source and
+	 * set up dependent divisors for crypto clocks.
+	 */
+	switch (clk_id) {
+	case SCLK_CRYPTO0:
+		rk_clrsetreg(&cru->clksel_con[24],
+			     CRYPTO0_PLL_SEL_MASK | CRYPTO0_DIV_MASK,
+			     CRYPTO_PLL_SEL_GPLL << CRYPTO0_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << CRYPTO0_DIV_SHIFT);
+		break;
+	case SCLK_CRYPTO1:
+		rk_clrsetreg(&cru->clksel_con[26],
+			     CRYPTO1_PLL_SEL_MASK | CRYPTO1_DIV_MASK,
+			     CRYPTO_PLL_SEL_GPLL << CRYPTO1_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << CRYPTO1_DIV_SHIFT);
+		break;
+	default:
+		printf("do not support this peri freq\n");
+		return -EINVAL;
+	}
+
+	return rk3399_crypto_get_clk(priv, clk_id);
+}
+#endif
+
 static ulong rk3399_clk_get_rate(struct clk *clk)
 {
 	struct rk3399_clk_priv *priv = dev_get_priv(clk->dev);
@@ -998,6 +1070,12 @@ static ulong rk3399_clk_get_rate(struct clk *clk)
 	case SCLK_TSADC:
 		rate = rk3399_tsadc_get_clk(priv->cru);
 		break;
+#ifndef CONFIG_SPL_BUILD
+	case SCLK_CRYPTO0:
+	case SCLK_CRYPTO1:
+		rate = rk3399_crypto_get_clk(priv, clk->id);
+		break;
+#endif
 	default:
 		return -ENOENT;
 	}
@@ -1069,6 +1147,12 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_TSADC:
 		ret = rk3399_tsadc_set_clk(priv->cru, rate);
 		break;
+#ifndef CONFIG_SPL_BUILD
+	case SCLK_CRYPTO0:
+	case SCLK_CRYPTO1:
+		ret = rk3399_crypto_set_clk(priv, clk->id, rate);
+		break;
+#endif
 	default:
 		return -ENOENT;
 	}

commit ce18b1fcdc0dc15df054d2c1b0970bc555ca56b4
Author: Weixin Zhou <zwx@rock-chips.com>
Date:   Thu Dec 13 20:08:58 2018 +0800

    rk3399pro: set wifi_26M to 24M and disable by default
    
    fix current leak due to wifi_26M clk enable by default
    
    Change-Id: I53cb7fbfa49a0cda29834bb2e2871aedde6b7d15
    Signed-off-by: Weixin Zhou <zwx@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c
index c131713d65..89b3b6d004 100644
--- a/arch/arm/mach-rockchip/rk3399/rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
@@ -8,6 +8,7 @@
 #include <asm/armv8/mmu.h>
 #include <asm/arch/bootrom.h>
 #include <asm/arch/grf_rk3399.h>
+#include <asm/arch/cru_rk3399.h>
 #include <asm/arch/hardware.h>
 #include <asm/io.h>
 #include <syscon.h>
@@ -71,6 +72,7 @@ void rockchip_stimer_init(void)
 #define GRF_BASE	0xff770000
 #define PMUGRF_BASE	0xff320000
 #define PMUSGRF_BASE	0xff330000
+#define PMUCRU_BASE	0xff750000
 
 int arch_cpu_init(void)
 {
@@ -101,6 +103,14 @@ int arch_cpu_init(void)
 	/* PWM3 select pwm3a io */
 	rk_clrreg(&pmugrf->soc_con0, 1 << 5);
 
+#if defined(CONFIG_ROCKCHIP_RK3399PRO)
+	struct rk3399_pmucru *pmucru = (void *)PMUCRU_BASE;
+
+	/* set wifi_26M to 24M and disabled by default */
+	writel(0x7f002000, &pmucru->pmucru_clksel[1]);
+	writel(0x01000100, &pmucru->pmucru_clkgate_con[0]);
+#endif
+
 	return 0;
 }
 

commit 0fd8dec7ce1771e13ce13ab4ff24023e33fea036
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Wed Dec 12 18:04:52 2018 +0800

    clk: rockchip: rk3288: adjust gpll init_cfg
    
    This patch adjust gpll init nr/no/nf/bw values.
    keep them the same as kernel RK3066_PLL_RATE_NB(594000000, 2, 198, 4, 1)
    for better clock jitter when hdmi SI test.
    
    Change-Id: I781205d860945214f3f0957882223b8846c00773
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index 941b619454..954dd25cfa 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -143,7 +143,7 @@ enum {
 
 /* Keep divisors as low as possible to reduce jitter and power usage */
 static const struct pll_div apll_init_cfg = PLL_DIVISORS(APLL_HZ, 1, 1);
-static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 2);
+static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 4);
 static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 1, 2);
 
 static int rkclk_set_pll(struct rk3288_cru *cru, enum rk_clk_id clk_id,
@@ -167,7 +167,12 @@ static int rkclk_set_pll(struct rk3288_cru *cru, enum rk_clk_id clk_id,
 	rk_clrsetreg(&pll->con0, CLKR_MASK | PLL_OD_MASK,
 		     ((div->nr - 1) << CLKR_SHIFT) | (div->no - 1));
 	rk_clrsetreg(&pll->con1, CLKF_MASK, div->nf - 1);
-	rk_clrsetreg(&pll->con2, PLL_BWADJ_MASK, (div->nf >> 1) - 1);
+
+	/* adjust gpll bw for better clock jitter */
+	if (pll_id == 3)
+		rk_clrsetreg(&pll->con2, PLL_BWADJ_MASK, 0);
+	else
+		rk_clrsetreg(&pll->con2, PLL_BWADJ_MASK, (div->nf >> 1) - 1);
 
 	udelay(10);
 

commit 885305022055a126eb2bcd25958c1b5a83a51801
Author: Zorro Liu <lyx@rock-chips.com>
Date:   Thu Dec 13 14:13:00 2018 +0800

    configs: rk3368: add fuel_gauge rk818
    
    Change-Id: I32141e3fb5d09964f82ceb15a63091bb812fa68c
    Signed-off-by: Zorro Liu <lyx@rock-chips.com>

diff --git a/configs/rk3368_defconfig b/configs/rk3368_defconfig
index 796476dcd2..e3f6af0e3f 100644
--- a/configs/rk3368_defconfig
+++ b/configs/rk3368_defconfig
@@ -45,6 +45,7 @@ CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
+CONFIG_POWER_FG_RK818=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y

commit 2c16899d6009fb92788a60360d8b79913980a150
Author: David.Wu <david.wu@rock-chips.com>
Date:   Wed Dec 12 21:00:02 2018 +0800

    pinctrl: rockchip: Fix the cleaning of drv/pull type mask
    
    Where need to clean the special mask for rockchip_perpin_drv_list
    and rockchip_pull_list.
    
    Change-Id: I98bac7768aa0570c12c947913ef2ea91ae303f95
    Signed-off-by: David.Wu <david.wu@rock-chips.com>

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index e7f3d69c84..70ad8640d7 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -2157,7 +2157,8 @@ static int rockchip_set_drive_perpin(struct rockchip_pin_bank *bank,
 	int reg, ret, i;
 	u32 data, rmask_bits, temp;
 	u8 bit;
-	int drv_type = bank->drv[pin_num / 8].drv_type & DRV_TYPE_IO_MASK;
+	/* Where need to clean the special mask for rockchip_perpin_drv_list */
+	int drv_type = bank->drv[pin_num / 8].drv_type & (~DRV_TYPE_IO_MASK);
 
 	debug("setting drive of GPIO%d-%d to %d\n", bank->bank_num,
 	      pin_num, strength);
@@ -2292,7 +2293,11 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank,
 	case RK3308:
 	case RK3368:
 	case RK3399:
-		pull_type = bank->pull_type[pin_num / 8] & PULL_TYPE_IO_MASK;
+		/*
+		 * Where need to clean the special mask for
+		 * rockchip_pull_list.
+		 */
+		pull_type = bank->pull_type[pin_num / 8] & (~PULL_TYPE_IO_MASK);
 		ret = -EINVAL;
 		for (i = 0; i < ARRAY_SIZE(rockchip_pull_list[pull_type]);
 			i++) {

commit c9eb255473a77824de7372284c116e99bc89097f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 12 09:38:40 2018 +0800

    make.sh: add debug command to enable bootstage timing report
    
    Change-Id: I3550de5beb985932fff294953bda4b315805b7ea
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 1c8c5c9f8a..cba6591bdb 100755
--- a/make.sh
+++ b/make.sh
@@ -421,6 +421,7 @@ debug_command()
 			echo "    9. armv7 start.S: print entry warning"
 			echo "   10. armv8 start.S: print entry warning"
 			echo "   11. firmware bootflow debug() -> printf()"
+			echo "   12. bootstage timing report"
 			echo
 			echo "Enabled: "
 			grep '^CONFIG_ROCKCHIP_DEBUGGER=y' ${OUTDIR}/.config > /dev/null \
@@ -476,6 +477,11 @@ debug_command()
 			sed -i 's/\<debug\>/printf/g' common/image-android.c
 			sed -i 's/\<debug\>/printf/g' common/android_bootloader.c
 			echo "DEBUG [11]: firmware bootflow debug() -> printf()"
+		elif [ "${opt}" = '12' ]; then
+			sed -i '$a\CONFIG_BOOTSTAGE=y\' ${OUTDIR}/.config
+			sed -i '$a\CONFIG_BOOTSTAGE_REPORT=y\' ${OUTDIR}/.config
+			sed -i '$a\CONFIG_CMD_BOOTSTAGE=y\' ${OUTDIR}/.config
+			echo "DEBUG [12]: bootstage timing report"
 		fi
 		echo
 }

commit caed6b4f82005b8727fd369a0173474570fc67f3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 11 16:02:12 2018 +0800

    rockchip: make avb boot flow uninterruptable
    
    - only allow "boot_android" as bootcmd;
    - enter rockusb or fastboot when boot failed;
    - don't allow ctrl+c to enter hush;
    
    Change-Id: I7a67f4b738ed78370f19fe2c8c920a5abc104b4b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/console.c b/common/console.c
index 260236b998..399f001f27 100644
--- a/common/console.c
+++ b/common/console.c
@@ -412,6 +412,13 @@ int getc(void)
 
 int tstc(void)
 {
+/* Don't allow drivers call tstc() to do some "exit" event(maybe enter hush) */
+#if defined(CONFIG_ARCH_ROCKCHIP) && \
+    defined(CONFIG_AVB_VBMETA_PUBLIC_KEY_VALIDATE) && \
+    defined(CONFIG_BOOTDELAY) && (CONFIG_BOOTDELAY <= 0)
+	return 0;
+#endif
+
 #ifdef CONFIG_DISABLE_CONSOLE
 	if (gd->flags & GD_FLG_DISABLE_CONSOLE)
 		return 0;
@@ -594,6 +601,12 @@ static int ctrlc_disabled = 0;	/* see disable_ctrl() */
 static int ctrlc_was_pressed = 0;
 int ctrlc(void)
 {
+/* Don't allow drivers call ctrlc() to do some "exit" event(maybe enter hush) */
+#if defined(CONFIG_ARCH_ROCKCHIP) && \
+    defined(CONFIG_AVB_VBMETA_PUBLIC_KEY_VALIDATE)
+	return 0;
+#endif
+
 #ifndef CONFIG_SANDBOX
 	if (!ctrlc_disabled && gd->have_console) {
 		if (tstc()) {
diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index a92a46d783..189e23e03c 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -123,11 +123,18 @@
 		"setenv devtype spinor; setenv devnum 1;" \
 	"fi; \0"
 
+#ifdef CONFIG_AVB_VBMETA_PUBLIC_KEY_VALIDATE
+#define RKIMG_BOOTCOMMAND \
+	"boot_android ${devtype} ${devnum};" \
+	"echo AVB boot failed and enter rockusb or fastboot!;" \
+	"rockusb 0 ${devtype} ${devnum};" \
+	"fastboot usb 0;"
+#else
 #define RKIMG_BOOTCOMMAND \
 	"boot_android ${devtype} ${devnum};" \
 	"bootrkp;" \
 	"run distro_bootcmd;"
-
+#endif
 #endif
 
 #define CONFIG_DISPLAY_BOARDINFO_LATE
diff --git a/lib/avb/libavb_user/avb_ops_user.c b/lib/avb/libavb_user/avb_ops_user.c
index 0838880ef9..38fe2c6cfb 100755
--- a/lib/avb/libavb_user/avb_ops_user.c
+++ b/lib/avb/libavb_user/avb_ops_user.c
@@ -160,7 +160,9 @@ validate_vbmeta_public_key(AvbOps *ops,
 			   size_t public_key_metadata_length,
 			   bool *out_is_trusted)
 {
-#ifdef AVB_VBMETA_PUBLIC_KEY_VALIDATE
+/* remain AVB_VBMETA_PUBLIC_KEY_VALIDATE to compatible legacy code */
+#if defined(CONFIG_AVB_VBMETA_PUBLIC_KEY_VALIDATE) || \
+    defined(AVB_VBMETA_PUBLIC_KEY_VALIDATE)
 	if (out_is_trusted) {
 		avb_atx_validate_vbmeta_public_key(ops,
 						   public_key_data,

commit a349065b9f5b6f1ca51a515ad271634a4cddf258
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 11 16:01:41 2018 +0800

    avb: Kconfig: add config AVB_VBMETA_PUBLIC_KEY_VALIDATE
    
    Change-Id: I2f9c74a8427874066e1bb7ac7b774a0fb3befba9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/lib/avb/libavb_user/Kconfig b/lib/avb/libavb_user/Kconfig
index c27412fcba..8107902213 100755
--- a/lib/avb/libavb_user/Kconfig
+++ b/lib/avb/libavb_user/Kconfig
@@ -6,6 +6,12 @@ config AVB_LIBAVB_USER
 	  so on. And it can provide some a/b and avb information
 	  to fastboot and kernel.
 
+config AVB_VBMETA_PUBLIC_KEY_VALIDATE
+        bool "Support vbmeta public key validate"
+        depends on AVB_LIBAVB_USER
+        help
+          support vbmeta public key validate.
+
 config SPL_AVB_LIBAVB_USER
 	bool "Android AVB read/write hardware for spl"
 	help

commit c8df86e75095204192a37341862beb06ea21ec85
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 11 11:31:59 2018 +0800

    fuel gauge: rk816/8: add battery existence report
    
    Change-Id: I69fda35bd918d167aff7ac6d5d0d75ba6aa38372
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk816.c b/drivers/power/fuel_gauge/fg_rk816.c
index 49f947ed4a..904096e7a0 100644
--- a/drivers/power/fuel_gauge/fg_rk816.c
+++ b/drivers/power/fuel_gauge/fg_rk816.c
@@ -1290,6 +1290,13 @@ out:
 	rk816_bat_debug_info(di);
 }
 
+static int rk816_bat_bat_is_exit(struct udevice *dev)
+{
+	struct battery_priv *di = dev_get_priv(dev);
+
+	return is_rk816_bat_exist(di);
+}
+
 static int rk816_bat_update_get_soc(struct udevice *dev)
 {
 	struct battery_priv *di = dev_get_priv(dev);
@@ -1343,6 +1350,7 @@ static bool rk816_bat_update_get_chrg_online(struct udevice *dev)
 }
 
 static struct dm_fuel_gauge_ops fg_ops = {
+	.bat_is_exist = rk816_bat_bat_is_exit,
 	.get_soc = rk816_bat_update_get_soc,
 	.get_voltage = rk816_bat_update_get_voltage,
 	.get_current = rk816_bat_update_get_current,
diff --git a/drivers/power/fuel_gauge/fg_rk818.c b/drivers/power/fuel_gauge/fg_rk818.c
index 34b1cbbe69..b45388020a 100644
--- a/drivers/power/fuel_gauge/fg_rk818.c
+++ b/drivers/power/fuel_gauge/fg_rk818.c
@@ -1665,6 +1665,13 @@ static int rk818_bat_update_temperature(struct battery_priv *di)
 	return 0;
 }
 
+static int rk818_bat_bat_is_exit(struct udevice *dev)
+{
+	struct battery_priv *di = dev_get_priv(dev);
+
+	return is_rk818_bat_exist(di);
+}
+
 static int rk818_bat_update_get_soc(struct udevice *dev)
 {
 	struct battery_priv *di = dev_get_priv(dev);
@@ -1731,6 +1738,7 @@ static bool rk818_bat_update_get_chrg_online(struct udevice *dev)
 }
 
 static struct dm_fuel_gauge_ops fg_ops = {
+	.bat_is_exist = rk818_bat_bat_is_exit,
 	.get_soc = rk818_bat_update_get_soc,
 	.get_voltage = rk818_bat_update_get_voltage,
 	.get_current = rk818_bat_update_get_current,

commit 61a7a6d6a166251c63db906469589ffd4e3f643e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 11 10:19:59 2018 +0800

    power: charge animation: add battery existence check
    
    Change-Id: I8451d3069c11faa91d6b0087a764685cdf4f1bbf
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index a4854aa401..9d147de49a 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -342,6 +342,11 @@ static int charge_animation_show(struct udevice *dev)
  * 6. Enter charge !
  *
  */
+	if (!fuel_gauge_bat_is_exist(fg)) {
+		printf("Exit charge: battery is not exist\n");
+		return 0;
+	}
+
 	/* Extrem low power charge */
 	ret = charge_extrem_low_power(dev);
 	if (ret < 0) {
@@ -350,7 +355,7 @@ static int charge_animation_show(struct udevice *dev)
 	}
 
 	/* If there is preboot command, exit */
-	if (preboot) {
+	if (preboot && !strstr(preboot, "dvfs")) {
 		printf("Exit charge: due to preboot cmd '%s'\n", preboot);
 		return 0;
 	}
diff --git a/drivers/power/fuel_gauge/fuel_gauge_uclass.c b/drivers/power/fuel_gauge/fuel_gauge_uclass.c
index 101f1d7132..8d7d400109 100644
--- a/drivers/power/fuel_gauge/fuel_gauge_uclass.c
+++ b/drivers/power/fuel_gauge/fuel_gauge_uclass.c
@@ -10,6 +10,16 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+int fuel_gauge_bat_is_exist(struct udevice *dev)
+{
+	const struct dm_fuel_gauge_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->bat_is_exist)
+		return -ENOSYS;
+
+	return ops->bat_is_exist(dev);
+}
+
 int fuel_gauge_get_current(struct udevice *dev)
 {
 	const struct dm_fuel_gauge_ops *ops = dev_get_driver_ops(dev);
diff --git a/include/power/fuel_gauge.h b/include/power/fuel_gauge.h
index 9473e6220a..cf9ef8be7e 100644
--- a/include/power/fuel_gauge.h
+++ b/include/power/fuel_gauge.h
@@ -8,12 +8,14 @@
 #define _FUEL_GAUGE_H_
 
 struct dm_fuel_gauge_ops {
+	int (*bat_is_exist)(struct udevice *dev);
 	int (*get_soc)(struct udevice *dev);
 	int (*get_voltage)(struct udevice *dev);
 	int (*get_current)(struct udevice *dev);
 	bool (*get_chrg_online)(struct udevice *dev);
 };
 
+int fuel_gauge_bat_is_exist(struct udevice *dev);
 int fuel_gauge_get_soc(struct udevice *dev);
 int fuel_gauge_get_voltage(struct udevice *dev);
 int fuel_gauge_get_current(struct udevice *dev);

commit d60cbc66d7c528768b9e82e247a7f7c83d4b0514
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 11 09:31:27 2018 +0800

    rockchip: add rk3399pro project build
    
    build command: ./make.sh rk3399pro
    
    Change-Id: I50d4aba026d35ff7ed73257dc1edcb50426aa64f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 2a2991b4e2..c16ad23909 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -337,6 +337,9 @@ config ROCKCHIP_RK3399
 
 if ROCKCHIP_RK3399
 
+config ROCKCHIP_RK3399PRO
+	bool "Support Rockchip RK3399Pro"
+
 config TPL_LDSCRIPT
 	default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
 
diff --git a/configs/rk3399pro_defconfig b/configs/rk3399pro_defconfig
new file mode 100644
index 0000000000..bde4f091dd
--- /dev/null
+++ b/configs/rk3399pro_defconfig
@@ -0,0 +1,122 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
+CONFIG_ROCKCHIP_RK3399=y
+CONFIG_ROCKCHIP_RK3399PRO=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x50000
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_SPL_STACK_R_ADDR=0x80000
+CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_BOOTDELAY=0
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_FASTBOOT_BUF_ADDR=0x00800800
+CONFIG_FASTBOOT_BUF_SIZE=0x08000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_CMD_PMIC=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_RKPARM_PARTITION=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_ADC_KEY=y
+CONFIG_GPIO_KEY=y
+CONFIG_RK_KEY=y
+CONFIG_MISC=y
+CONFIG_ROCKCHIP_EFUSE=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_DM_FUEL_GAUGE=y
+CONFIG_POWER_FG_RK818=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_DM_CHARGE_DISPLAY=y
+CONFIG_CHARGE_ANIMATION=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0xFF1A0000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x330a
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX=y
+CONFIG_USB_ETHER_ASIX88179=y
+CONFIG_USB_ETHER_MCS7830=y
+CONFIG_USB_ETHER_RTL8152=y
+CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_DW_HDMI=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
+CONFIG_DRM_ROCKCHIP_LVDS=y
+CONFIG_DRM_ROCKCHIP_RGB=y
+CONFIG_LCD=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
+CONFIG_TEST_ROCKCHIP=y
diff --git a/make.sh b/make.sh
index 20e8def0f3..1c8c5c9f8a 100755
--- a/make.sh
+++ b/make.sh
@@ -334,6 +334,8 @@ select_chip_info()
 			&& RKCHIP=RK3326
 		grep '^CONFIG_ROCKCHIP_RK3128X=y' ${OUTDIR}/.config >/dev/null \
 			&& RKCHIP=RK3128X
+		grep '^CONFIG_ROCKCHIP_RK3399PRO=y' ${OUTDIR}/.config >/dev/null \
+			&& RKCHIP=RK3399PRO
 	else
 		echo "Can't get Rockchip SoC definition in .config"
 		exit 1

commit 4dcd3d7498cb4a6e1921f386e6cab618a70084b0
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 19 17:46:30 2018 +0800

    rockchip: px30: enable wide temperature dvfs
    
    Change-Id: I0584f1c0d01b017bbc949af38065f9f521c361f4
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index b7a0aab7d1..5ef64e2c0c 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -64,6 +64,8 @@ CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_REGULATOR_RK8XX=y
+CONFIG_DM_DVFS=y
+CONFIG_ROCKCHIP_WTEMP_DVFS=y
 CONFIG_DM_CHARGE_DISPLAY=y
 CONFIG_CHARGE_ANIMATION=y
 CONFIG_PWM_ROCKCHIP=y
@@ -82,6 +84,8 @@ CONFIG_I2S_ROCKCHIP=y
 CONFIG_SOUND_RK817=y
 CONFIG_SOUND_ROCKCHIP=y
 CONFIG_SYSRESET=y
+CONFIG_DM_THERMAL=y
+CONFIG_ROCKCHIP_THERMAL=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_GENERIC=y
diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index cea2d2e5e9..65335ce05d 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -40,7 +40,11 @@
 #define CONFIG_SYS_SDRAM_BASE		0
 #define SDRAM_MAX_SIZE			0xff000000
 #define SDRAM_BANK_SIZE			(2UL << 30)
+#ifdef CONFIG_DM_DVFS
+#define CONFIG_PREBOOT			"dvfs repeat"
+#else
 #define CONFIG_PREBOOT
+#endif
 
 #ifndef CONFIG_SPL_BUILD
 

commit 60137d8147021b71d1c3d01a415dbf5b9f8d6033
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 28 16:51:06 2018 +0800

    rockchip: rk3308-aarch32: enable wide temperature dvfs
    
    Change-Id: I743498049ad054e163dc700bbf4899eb1eec673b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3308-aarch32_defconfig b/configs/rk3308-aarch32_defconfig
index 70c10d9eb0..2ee0ec4c6c 100644
--- a/configs/rk3308-aarch32_defconfig
+++ b/configs/rk3308-aarch32_defconfig
@@ -47,6 +47,8 @@ CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_REGULATOR_RK8XX=y
+CONFIG_DM_DVFS=y
+CONFIG_ROCKCHIP_WTEMP_DVFS=y
 CONFIG_DM_CHARGE_DISPLAY=y
 CONFIG_CHARGE_ANIMATION=y
 CONFIG_PWM_ROCKCHIP=y
@@ -62,6 +64,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_SYSRESET=y
+CONFIG_DM_THERMAL=y
+CONFIG_ROCKCHIP_THERMAL=y
 CONFIG_USB=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h
index 9a2fae5699..66ed3bc7ad 100644
--- a/include/configs/rk3308_common.h
+++ b/include/configs/rk3308_common.h
@@ -36,7 +36,11 @@
 #define CONFIG_SYS_SDRAM_BASE		0
 #define SDRAM_MAX_SIZE			0xff000000
 #define SDRAM_BANK_SIZE			(2UL << 30)
+#ifdef CONFIG_DM_DVFS
+#define CONFIG_PREBOOT			"dvfs repeat"
+#else
 #define CONFIG_PREBOOT
+#endif
 
 #ifndef CONFIG_SPL_BUILD
 

commit 3acf4edfaf658c0ca070e85ba732e39fa2179868
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 19 18:42:21 2018 +0800

    rockchip: board: add dvfs init
    
    Change-Id: I24bff1e8528f0e8ad17718a47d3f725a9e5a5c8c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 0117c22621..e86191fd00 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -20,6 +20,9 @@
 #ifdef CONFIG_DM_CHARGE_DISPLAY
 #include <power/charge_display.h>
 #endif
+#ifdef CONFIG_DM_DVFS
+#include <dvfs.h>
+#endif
 #ifdef CONFIG_DM_REGULATOR
 #include <power/regulator.h>
 #endif
@@ -231,6 +234,10 @@ int board_init(void)
 #endif
 	set_armclk_rate();
 
+#ifdef CONFIG_DM_DVFS
+	dvfs_init(true);
+#endif
+
 	return rk_board_init();
 }
 

commit 0eea0d250e65f61dbae608a25eb07e26567ef430
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 19 17:43:25 2018 +0800

    dm: add dvfs uclass and wide temperature dvfs support
    
    - add dvfs uclass;
    - add dvfs command;
    - add a simple wide temperature dvfs driver.
    
    About wide temperature dvfs driver policy, see description in:
    drivers/power/dvfs/rockchip_wtemp_dvfs.c
    
    Change-Id: I36a8de6e47f8375bf1795b794c77d96b4571a361
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/Makefile b/Makefile
index b3f61a2eac..7060da1c5f 100644
--- a/Makefile
+++ b/Makefile
@@ -671,7 +671,8 @@ libs-y += drivers/power/ \
 	drivers/power/mfd/ \
 	drivers/power/pmic/ \
 	drivers/power/battery/ \
-	drivers/power/regulator/
+	drivers/power/regulator/ \
+	drivers/power/dvfs/
 libs-y += drivers/spi/
 libs-$(CONFIG_FMAN_ENET) += drivers/net/fm/
 libs-$(CONFIG_SYS_FSL_DDR) += drivers/ddr/fsl/
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 5aeedebee5..23d8425cc1 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1296,6 +1296,16 @@ config CMD_CHARGE_DISPLAY
 	help
 	  Support U-Boot charge display.
 
+config CMD_DVFS
+	bool "Enable Driver Model DVFS command"
+	depends on DM_DVFS
+	default y
+	help
+	  Support dvfs policy apply API
+	  User interface features:
+	  - dvfs            - apply dvfs policy once
+	  - dvfs repeat     - repeat apply dvfs policy until achieve the target temperature
+
 endmenu
 
 menu "Security commands"
diff --git a/cmd/Makefile b/cmd/Makefile
index d4ceacf98e..e6307041cb 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -158,6 +158,7 @@ obj-$(CONFIG_CMD_ETHSW) += ethsw.o
 # Power
 obj-$(CONFIG_CMD_PMIC) += pmic.o
 obj-$(CONFIG_CMD_REGULATOR) += regulator.o
+obj-$(CONFIG_CMD_DVFS) += dvfs.o
 
 obj-$(CONFIG_CMD_BLOB) += blob.o
 endif # !CONFIG_SPL_BUILD
diff --git a/cmd/dvfs.c b/cmd/dvfs.c
new file mode 100644
index 0000000000..73a6f06a1e
--- /dev/null
+++ b/cmd/dvfs.c
@@ -0,0 +1,37 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <console.h>
+#include <dvfs.h>
+
+static int do_dvfs(cmd_tbl_t *cmdtp, int flag,
+		   int argc, char *const argv[])
+{
+	struct udevice *dev;
+	int ret;
+
+	ret = uclass_get_device(UCLASS_DVFS, 0, &dev);
+	if (ret) {
+		printf("DVFS: Get dvfs device failed, ret=%d\n", ret);
+		return ret;
+	}
+
+	if (argc == 1)
+		return dvfs_apply(dev);
+	else if (!strcmp(argv[1], "repeat"))
+		return dvfs_repeat_apply(dev);
+	else
+		return CMD_RET_USAGE;
+
+	return 0;
+}
+
+U_BOOT_CMD(
+	dvfs, 2, 1, do_dvfs,
+	"Start DVFS policy",
+	"dvfs - apply dvfs policy once\n"
+	"dvfs repeat - repeat apply dvfs policy until achieve the target temperature"
+);
diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index d1eac1757f..adf5ff58bf 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -8,6 +8,8 @@ source "drivers/power/pmic/Kconfig"
 
 source "drivers/power/regulator/Kconfig"
 
+source "drivers/power/dvfs/Kconfig"
+
 config DM_CHARGE_DISPLAY
 	bool "Enable driver model for charge display support"
 	depends on DM
diff --git a/drivers/power/dvfs/Kconfig b/drivers/power/dvfs/Kconfig
new file mode 100644
index 0000000000..0a3580e0b5
--- /dev/null
+++ b/drivers/power/dvfs/Kconfig
@@ -0,0 +1,11 @@
+config DM_DVFS
+	bool "Enable Driver Model for DVFS drivers (UCLASS_DVFS)"
+	depends on DM
+	---help---
+	This config enables the driver-model DVFS support.
+
+config ROCKCHIP_WTEMP_DVFS
+	bool "Enable rockchip wide temperature dvfs policy"
+	depends on DM_DVFS && ROCKCHIP_THERMAL
+	help
+	  This enable support wide temperature dvfs for rockchip platforms.
diff --git a/drivers/power/dvfs/Makefile b/drivers/power/dvfs/Makefile
new file mode 100644
index 0000000000..1734cd8007
--- /dev/null
+++ b/drivers/power/dvfs/Makefile
@@ -0,0 +1,9 @@
+#
+# Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-$(CONFIG_DM_DVFS) += dvfs-uclass.o
+obj-$(CONFIG_ROCKCHIP_WTEMP_DVFS) += rockchip_wtemp_dvfs.o
+
diff --git a/drivers/power/dvfs/dvfs-uclass.c b/drivers/power/dvfs/dvfs-uclass.c
new file mode 100644
index 0000000000..abd04dcb5e
--- /dev/null
+++ b/drivers/power/dvfs/dvfs-uclass.c
@@ -0,0 +1,50 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <console.h>
+#include <dvfs.h>
+
+int dvfs_apply(struct udevice *dev)
+{
+	const struct dm_dvfs_ops *ops = device_get_ops(dev);
+
+	if (!ops->apply)
+		return -ENOSYS;
+
+	return ops->apply(dev);
+}
+
+int dvfs_repeat_apply(struct udevice *dev)
+{
+	const struct dm_dvfs_ops *ops = device_get_ops(dev);
+
+	if (!ops->repeat_apply)
+		return -ENOSYS;
+
+	return ops->repeat_apply(dev);
+}
+
+int dvfs_init(bool apply)
+{
+	struct udevice *dev;
+	int ret;
+
+	ret = uclass_get_device(UCLASS_DVFS, 0, &dev);
+	if (ret) {
+		printf("DVFS: Get dvfs device failed, ret=%d\n", ret);
+		return ret;
+	}
+
+	if (apply)
+		return dvfs_apply(dev);
+
+	return 0;
+}
+
+UCLASS_DRIVER(dvfs) = {
+	.id	= UCLASS_DVFS,
+	.name	= "dvfs",
+};
diff --git a/drivers/power/dvfs/rockchip_wtemp_dvfs.c b/drivers/power/dvfs/rockchip_wtemp_dvfs.c
new file mode 100644
index 0000000000..d7fe67145c
--- /dev/null
+++ b/drivers/power/dvfs/rockchip_wtemp_dvfs.c
@@ -0,0 +1,639 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+#include <common.h>
+#include <dm.h>
+#include <clk.h>
+#include <dvfs.h>
+#include <thermal.h>
+#include <linux/list.h>
+
+#include <asm/arch/clock.h>
+#include <power/regulator.h>
+#ifdef CONFIG_ROCKCHIP_DMC
+#include <asm/arch/rockchip_dmc.h>
+#endif
+
+/*
+ * # This is a simple wide temperature(ie. wtemp) dvfs driver, the policy is:
+ *
+ * 1. U-Boot parse cpu/dmc opp table from kernel dtb, anyone of
+ *    "rockchip,low-temp = <...>" and "rockchip,high-temp = <...>" present in
+ *    cpu/dmc nodes means wtemp is enabled.
+ *
+ *    1.1. When temperature trigger "rockchip,low-temp", increase 50mv voltage
+ *         as target voltage. If target voltage is over "rockchip,max-volt",
+ *         just set "rockchip,max-volt" as target voltage and lower 2 level freq,
+ *
+ *    1.2. When temperature trigger "rockchip,high-temp", just apply opp table[0]
+ *         voltage and freq.
+ *
+ * 2. U-Boot parse cpu/dmc thermal zone "trip-point-0" temperature from kernel
+ *    dtb, and apply the same rules as above [1.2] policy.
+ *
+ *
+ * # The dvfs policy apply moment is:
+ *
+ * 1. Appy it after clk and regulator drivers setup;
+ * 2. Repeat apply it by CONFIG_PREBOOT command until achieve the target
+ *    temperature. user should add: #define CONFIG_PREBOOT "dvfs repeat" and
+ *    assign repeat property in dts:
+ *
+ *	uboot-wide-temperature {
+ *		status = "okay";
+ *		compatible = "rockchip,uboot-wide-temperature";
+ *
+ *		cpu,low-temp-repeat;
+ *		cpu,high-temp-repeat;
+ *		dmc,low-temp-repeat;
+ *		dmc,high-temp-repeat;
+ *	};
+ */
+
+#define FDT_PATH_CPUS		"/cpus"
+#define FDT_PATH_DMC		"/dmc"
+#define FDT_PATH_THREMAL_TRIP_POINT0	\
+	"/thermal-zones/soc-thermal/trips/trip-point-0"
+#define FDT_PATH_THREMAL_COOLING_MAPS	\
+	"/thermal-zones/soc-thermal/cooling-maps"
+
+#define OPP_TABLE_MAX		20
+#define RATE_LOWER_LEVEL_N	2
+#define DIFF_VOLTAGE_UV		50000
+#define TEMP_STRING_LEN		12
+#define REPEAT_PERIOD_US	1000000
+
+static LIST_HEAD(pm_e_head);
+
+enum pm_id {
+	PM_CPU,
+	PM_DMC,
+};
+
+enum pm_event {
+	PM_EVT_NONE = 0x0,
+	PM_EVT_LOW  = 0x1,
+	PM_EVT_HIGH = 0x2,
+	PM_EVT_BOTH = PM_EVT_LOW | PM_EVT_HIGH,
+};
+
+struct opp_table {
+	u64 hz;
+	u32 uv;
+};
+
+struct lmt_param {
+	int low_temp;		/* milli degree */
+	int high_temp;		/* milli degree */
+	int tz_temp;		/* milli degree */
+	int max_volt;		/* uV */
+
+	bool htemp_repeat;
+	bool ltemp_repeat;
+
+	bool ltemp_limit;
+	bool htemp_limit;
+	bool tztemp_limit;
+};
+
+struct pm_element {
+	int id;
+	const char *name;
+	const char *supply_name;
+	int volt_diff;
+	u32 opp_nr;
+	struct opp_table opp[OPP_TABLE_MAX];
+	struct lmt_param lmt;
+	struct udevice *supply;
+	struct clk clk;
+	struct list_head node;
+};
+
+struct wtemp_dvfs_priv {
+	struct udevice *thermal;
+	struct pm_element *cpu;
+	struct pm_element *dmc;
+};
+
+static struct pm_element pm_cpu = {
+	.id		= PM_CPU,
+	.name		= "cpu",
+	.supply_name	= "cpu-supply",
+	.volt_diff	= DIFF_VOLTAGE_UV,
+};
+
+static struct pm_element pm_dmc = {
+	.id		= PM_DMC,
+	.name		= "dmc",
+	.supply_name	= "center-supply",
+	.volt_diff	= DIFF_VOLTAGE_UV,
+};
+
+static void temp2string(int temp, char *data, int len)
+{
+	int decimal_point;
+	int integer;
+
+	integer = abs(temp) / 1000;
+	decimal_point = abs(temp) % 1000;
+	snprintf(data, len, "%s%d.%d",
+		 temp < 0 ? "-" : "", integer, decimal_point);
+}
+
+static ulong wtemp_get_lowlevel_rate(ulong rate, u32 level,
+				     struct pm_element *e)
+{
+	struct opp_table *opp;
+	int i, count, idx = 0;
+
+	opp = e->opp;
+	count = e->opp_nr;
+
+	for (i = 0; i < count; i++) {
+		if (opp[i].hz >= rate) {
+			idx = (i <= level) ? 0 : i - level;
+			break;
+		}
+	}
+
+	return opp[idx].hz;
+}
+
+static ulong __wtemp_clk_get_rate(struct pm_element *e)
+{
+#ifdef CONFIG_ROCKCHIP_DMC
+	if (e->id == PM_DMC)
+		return rockchip_ddrclk_sip_recalc_rate_v2();
+#endif
+	return clk_get_rate(&e->clk);
+}
+
+static ulong __wtemp_clk_set_rate(struct pm_element *e, ulong rate)
+{
+#ifdef CONFIG_ROCKCHIP_DMC
+	if (e->id == PM_DMC) {
+		rate = rockchip_ddrclk_sip_round_rate_v2(rate);
+		rockchip_ddrclk_sip_set_rate_v2(rate);
+	} else
+#endif
+		clk_set_rate(&e->clk, rate);
+
+	return rate;
+}
+
+static int __wtemp_regulator_get_value(struct pm_element *e)
+{
+	return regulator_get_value(e->supply);
+}
+
+static int __wtemp_regulator_set_value(struct pm_element *e, int value)
+{
+	return regulator_set_value(e->supply, value);
+}
+
+/*
+ * Policy: Increase voltage
+ *
+ * 1. target volt = original volt + diff volt;
+ * 2. If target volt is not over max_volt, just set it;
+ * 3. Otherwise set max_volt as target volt and lower the rate(front N level).
+ */
+static void wtemp_dvfs_low_temp_adjust(struct udevice *dev, struct pm_element *e)
+{
+	struct wtemp_dvfs_priv *priv = dev_get_priv(dev);
+	ulong org_rate, tgt_rate, rb_rate;
+	int org_volt, tgt_volt, rb_volt;
+
+	org_rate = __wtemp_clk_get_rate(e);
+	org_volt = __wtemp_regulator_get_value(e);
+	tgt_volt = org_volt + e->volt_diff;
+	if ((e->lmt.max_volt != -ENODATA) && (tgt_volt > e->lmt.max_volt)) {
+		tgt_volt = e->lmt.max_volt;
+		__wtemp_regulator_set_value(e, tgt_volt);
+		tgt_rate = wtemp_get_lowlevel_rate(org_rate,
+						RATE_LOWER_LEVEL_N, priv->cpu);
+		tgt_rate = __wtemp_clk_set_rate(e, tgt_rate);
+	} else {
+		__wtemp_regulator_set_value(e, tgt_volt);
+		tgt_rate = org_rate;
+	}
+
+	/* Check */
+	rb_rate = __wtemp_clk_get_rate(e);
+	rb_volt = __wtemp_regulator_get_value(e);
+	if (tgt_rate != rb_rate)
+		printf("DVFS: %s: target rate=%ld, readback rate=%ld !\n",
+		       e->name, tgt_rate, rb_rate);
+	if (tgt_volt != rb_volt)
+		printf("DVFS: %s: target volt=%d, readback volt=%d !\n",
+		       e->name, tgt_volt, rb_volt);
+
+	printf("DVFS: %s(low): %ld->%ld Hz, %d->%d uV\n",
+	       e->name, org_rate, rb_rate, org_volt, rb_volt);
+}
+
+/*
+ * Policy:
+ *
+ * Just set opp table[0] volt and rate, i.e. the lowest performance.
+ */
+static void wtemp_dvfs_high_temp_adjust(struct udevice *dev, struct pm_element *e)
+{
+	ulong org_rate, tgt_rate, rb_rate;
+	int org_volt, tgt_volt, rb_volt;
+
+	/* Apply opp[0] */
+	org_rate = __wtemp_clk_get_rate(e);
+	tgt_rate = e->opp[0].hz;
+	tgt_rate = __wtemp_clk_set_rate(e, tgt_rate);
+
+	org_volt = __wtemp_regulator_get_value(e);
+	tgt_volt = e->opp[0].uv;
+	__wtemp_regulator_set_value(e, tgt_volt);
+
+	/* Check */
+	rb_rate = __wtemp_clk_get_rate(e);
+	rb_volt = __wtemp_regulator_get_value(e);
+	if (tgt_rate != rb_rate)
+		printf("DVFS: %s: target rate=%ld, readback rate=%ld !\n",
+		       e->name, tgt_rate, rb_rate);
+	if (tgt_volt != rb_volt)
+		printf("DVFS: %s: target volt=%d, readback volt=%d !\n",
+		       e->name, tgt_volt, rb_volt);
+
+	printf("DVFS: %s(high): %ld->%ld Hz, %d->%d uV\n",
+	       e->name, org_rate, tgt_rate, org_volt, tgt_volt);
+}
+
+static bool wtemp_dvfs_is_effect(struct pm_element *e,
+				 int temp, enum pm_event evt)
+{
+	if (evt & PM_EVT_LOW) {
+		if (e->lmt.ltemp_limit && temp <= e->lmt.low_temp)
+			return false;
+	}
+
+	if (evt & PM_EVT_HIGH) {
+		if (e->lmt.tztemp_limit && temp >= e->lmt.tz_temp)
+			return false;
+		else if (e->lmt.htemp_limit && temp >= e->lmt.high_temp)
+			return false;
+	}
+
+	return true;
+}
+
+static int __wtemp_dvfs_apply(struct udevice *dev, struct pm_element *e,
+			      int temp, enum pm_event evt)
+{
+	enum pm_event ret = PM_EVT_NONE;
+
+	if (evt & PM_EVT_LOW) {
+		/* Over lowest temperature: increase voltage */
+		if (e->lmt.ltemp_limit && temp <= e->lmt.low_temp) {
+			ret |= PM_EVT_LOW;
+			wtemp_dvfs_low_temp_adjust(dev, e);
+		}
+	}
+
+	if (evt & PM_EVT_HIGH) {
+		/* Over highest/thermal_zone temperature: decrease rate and voltage */
+		if (e->lmt.tztemp_limit && temp >= e->lmt.tz_temp) {
+			ret |= PM_EVT_HIGH;
+			wtemp_dvfs_high_temp_adjust(dev, e);
+		} else if (e->lmt.htemp_limit && temp >= e->lmt.high_temp) {
+			ret |= PM_EVT_HIGH;
+			wtemp_dvfs_high_temp_adjust(dev, e);
+		}
+	}
+
+	return ret;
+}
+
+static int __wtemp_common_ofdata_to_platdata(ofnode node, struct pm_element *e)
+{
+	ofnode supply, opp_node;
+	u32 phandle, uv, clock[2];
+	uint64_t hz;
+	int ret;
+
+	/* Get regulator and clk */
+	if (!ofnode_read_u32(node, e->supply_name, &phandle)) {
+		supply = ofnode_get_by_phandle(phandle);
+		ret = regulator_get_by_devname(supply.np->name, &e->supply);
+		if (ret) {
+			printf("DVFS: %s: Get supply(%s) failed, ret=%d",
+			       e->name, supply.np->full_name, ret);
+			return ret;
+		}
+		debug("DVFS: supply: %s\n", supply.np->full_name);
+	}
+
+	if (!ofnode_read_u32_array(node, "clocks", clock, ARRAY_SIZE(clock))) {
+		e->clk.id = clock[1];
+		ret = rockchip_get_clk(&e->clk.dev);
+		if (ret) {
+			printf("DVFS: %s: Get clk failed, ret=%d\n", e->name, ret);
+			return ret;
+		}
+	}
+
+	/* Get opp-table & limit param */
+	if (!ofnode_read_u32(node, "operating-points-v2", &phandle)) {
+		opp_node = ofnode_get_by_phandle(phandle);
+		e->lmt.low_temp = ofnode_read_s32_default(opp_node,
+						"rockchip,low-temp", -ENODATA);
+		e->lmt.high_temp = ofnode_read_s32_default(opp_node,
+						"rockchip,high-temp", -ENODATA);
+		e->lmt.max_volt = ofnode_read_u32_default(opp_node,
+						"rockchip,max-volt", -ENODATA);
+
+		debug("DVFS: %s: low-temp=%d, high-temp=%d, max-volt=%d\n",
+		      e->name, e->lmt.low_temp, e->lmt.high_temp,
+		      e->lmt.max_volt);
+
+		ofnode_for_each_subnode(node, opp_node) {
+			if (e->opp_nr >= OPP_TABLE_MAX) {
+				printf("DVFS: over max(%d) opp table items\n",
+				       OPP_TABLE_MAX);
+				break;
+			}
+			ofnode_read_u64(node, "opp-hz", &hz);
+			ofnode_read_u32_array(node, "opp-microvolt", &uv, 1);
+			e->opp[e->opp_nr].hz = hz;
+			e->opp[e->opp_nr].uv = uv;
+			e->opp_nr++;
+			debug("DVFS: %s: opp[%d]: hz=%lld, uv=%d, %s\n",
+			      e->name, e->opp_nr - 1,
+			      hz, uv, ofnode_get_name(node));
+		}
+	}
+	if (!e->opp_nr) {
+		printf("DVFS: %s: Can't find opp table\n", e->name);
+		return -EINVAL;
+	}
+
+	if (e->lmt.max_volt == -ENODATA)
+		e->lmt.max_volt = e->opp[e->opp_nr - 1].uv;
+	if (e->lmt.low_temp != -ENODATA)
+		e->lmt.ltemp_limit = true;
+	if (e->lmt.high_temp != -ENODATA)
+		e->lmt.htemp_limit = true;
+
+	return 0;
+}
+
+static int wtemp_dvfs_apply(struct udevice *dev)
+{
+	struct wtemp_dvfs_priv *priv = dev_get_priv(dev);
+	struct list_head *node;
+	struct pm_element *e;
+	char s_temp[TEMP_STRING_LEN];
+	int temp, ret;
+
+	ret = thermal_get_temp(priv->thermal, &temp);
+	if (ret) {
+		printf("DVFS: Get temperature failed, ret=%d\n", ret);
+		return ret;
+	}
+
+	temp2string(temp, s_temp, TEMP_STRING_LEN);
+	printf("DVFS: %s'c\n", s_temp);
+
+	/* Apply dvfs policy for all pm element */
+	list_for_each(node, &pm_e_head) {
+		e = list_entry(node, struct pm_element, node);
+		__wtemp_dvfs_apply(dev, e, temp, PM_EVT_BOTH);
+	}
+
+	return 0;
+}
+
+static int wtemp_dvfs_repeat_apply(struct udevice *dev)
+{
+	struct wtemp_dvfs_priv *priv = dev_get_priv(dev);
+	struct list_head *node;
+	struct pm_element *e;
+	enum pm_event applied;
+	char s_temp[TEMP_STRING_LEN];
+	int temp, ret;
+
+repeat:
+	ret = thermal_get_temp(priv->thermal, &temp);
+	if (ret) {
+		printf("DVFS: Get thermal temperature failed, ret=%d\n", ret);
+		return false;
+	}
+
+	/* Apply dvfs policy for all pm element if there is repeat request */
+	applied = PM_EVT_NONE;
+	list_for_each(node, &pm_e_head) {
+		e = list_entry(node, struct pm_element, node);
+		if (e->lmt.ltemp_repeat)
+			applied |= __wtemp_dvfs_apply(dev, e, temp, PM_EVT_LOW);
+		if (e->lmt.htemp_repeat)
+			applied |= __wtemp_dvfs_apply(dev, e, temp, PM_EVT_HIGH);
+	}
+
+	/* Everything is fine, exit */
+	if (applied == PM_EVT_NONE)
+		goto finish;
+
+	/* Check repeat result */
+	udelay(REPEAT_PERIOD_US);
+	list_for_each(node, &pm_e_head) {
+		e = list_entry(node, struct pm_element, node);
+		if (e->lmt.ltemp_repeat &&
+		    !wtemp_dvfs_is_effect(e, temp, PM_EVT_LOW))
+			goto repeat;
+		if (e->lmt.htemp_repeat &&
+		    !wtemp_dvfs_is_effect(e, temp, PM_EVT_HIGH))
+			goto repeat;
+	}
+
+finish:
+	list_for_each(node, &pm_e_head) {
+		e = list_entry(node, struct pm_element, node);
+		temp2string(temp, s_temp, TEMP_STRING_LEN);
+		printf("DVFS: %s %s'c, %ld Hz, %d uV\n", e->name,
+		       s_temp, __wtemp_clk_get_rate(e),
+		       __wtemp_regulator_get_value(e));
+	}
+
+	return 0;
+}
+
+static void print_e_state(void)
+{
+	struct pm_element *e;
+	struct list_head *node;
+	char s_low[TEMP_STRING_LEN];
+	char s_high[TEMP_STRING_LEN];
+	char s_tz[TEMP_STRING_LEN];
+
+	list_for_each(node, &pm_e_head) {
+		e = list_entry(node, struct pm_element, node);
+		if (!e->lmt.ltemp_limit &&
+		    !e->lmt.htemp_limit && !e->lmt.tztemp_limit)
+			return;
+
+		temp2string(e->lmt.tz_temp, s_tz, TEMP_STRING_LEN);
+		temp2string(e->lmt.low_temp, s_low, TEMP_STRING_LEN);
+		temp2string(e->lmt.high_temp, s_high, TEMP_STRING_LEN);
+		printf("DVFS: %s: low=%s'c, high=%s'c, Vmax=%duV, tz_temp=%s'c, "
+			  "h_repeat=%d, l_repeat=%d\n",
+			  e->name, e->lmt.ltemp_limit ? s_low : NULL,
+			  e->lmt.htemp_limit ? s_high : NULL,
+			  e->lmt.max_volt,
+			  e->lmt.tztemp_limit ? s_tz : NULL,
+			  e->lmt.htemp_repeat, e->lmt.ltemp_repeat);
+	}
+}
+
+static int wtemp_dvfs_ofdata_to_platdata(struct udevice *dev)
+{
+	struct wtemp_dvfs_priv *priv = dev_get_priv(dev);
+	ofnode tz_trip0, cooling_maps, node;
+	ofnode cpus, cpu, dmc;
+	const char *name;
+	int ret, tz_temp;
+	u32 phandle;
+
+	INIT_LIST_HEAD(&pm_e_head);
+
+	/* 1. Parse cpu node */
+	priv->cpu = &pm_cpu;
+	cpus = ofnode_path(FDT_PATH_CPUS);
+	if (!ofnode_valid(cpus)) {
+		debug("DVFS: Can't find %s\n", FDT_PATH_CPUS);
+		goto parse_dmc;
+	}
+
+	ofnode_for_each_subnode(cpu, cpus) {
+		name = ofnode_get_property(cpu, "device_type", NULL);
+		if (!name)
+			continue;
+		if (!strcmp(name, "cpu")) {
+			ret = __wtemp_common_ofdata_to_platdata(cpu, priv->cpu);
+			if (ret)
+				return ret;
+			break;
+		}
+	}
+
+	priv->cpu->lmt.ltemp_repeat =
+		dev_read_bool(dev, "cpu,low-temp-repeat");
+	priv->cpu->lmt.htemp_repeat =
+		dev_read_bool(dev, "cpu,high-temp-repeat");
+
+	list_add_tail(&priv->cpu->node, &pm_e_head);
+
+	/* 2. Parse dmc node */
+parse_dmc:
+	priv->dmc = &pm_dmc;
+	dmc = ofnode_path(FDT_PATH_DMC);
+	if (!ofnode_valid(dmc)) {
+		debug("DVFS: Can't find %s\n", FDT_PATH_CPUS);
+		goto parse_tz;
+	}
+	if (!IS_ENABLED(CONFIG_ROCKCHIP_DMC)) {
+		debug("DVFS: CONFIG_ROCKCHIP_DMC is disabled\n");
+		goto parse_tz;
+	}
+
+	ret = __wtemp_common_ofdata_to_platdata(dmc, priv->dmc);
+	if (ret)
+		return ret;
+
+	priv->dmc->lmt.ltemp_repeat =
+		dev_read_bool(dev, "dmc,low-temp-repeat");
+	priv->dmc->lmt.htemp_repeat =
+		dev_read_bool(dev, "dmc,high-temp-repeat");
+
+	list_add_tail(&priv->dmc->node, &pm_e_head);
+
+	/* 3. Parse thermal zone node */
+parse_tz:
+	tz_trip0 = ofnode_path(FDT_PATH_THREMAL_TRIP_POINT0);
+	if (!ofnode_valid(tz_trip0)) {
+		debug("DVFS: Can't find %s\n", FDT_PATH_THREMAL_TRIP_POINT0);
+		goto finish;
+	}
+
+	tz_temp = ofnode_read_s32_default(tz_trip0, "temperature", -ENODATA);
+	if (tz_temp == -ENODATA) {
+		debug("DVFS: Can't get thermal zone trip0 temperature\n");
+		goto finish;
+	}
+
+	cooling_maps = ofnode_path(FDT_PATH_THREMAL_COOLING_MAPS);
+	if (!ofnode_valid(cooling_maps)) {
+		debug("DVFS: Can't find %s\n", FDT_PATH_THREMAL_COOLING_MAPS);
+		goto finish;
+	}
+
+	ofnode_for_each_subnode(node, cooling_maps) {
+		ofnode_read_u32_array(node, "cooling-device", &phandle, 1);
+		name = ofnode_get_name(ofnode_get_by_phandle(phandle));
+		if (!name)
+			continue;
+		if (strstr(name, "cpu")) {
+			priv->cpu->lmt.tztemp_limit = true;
+			priv->cpu->lmt.tz_temp = tz_temp;
+		} else if (strstr(name, "dmc")) {
+			priv->dmc->lmt.tztemp_limit = true;
+			priv->dmc->lmt.tz_temp = tz_temp;
+		}
+	}
+
+finish:
+	print_e_state();
+
+	return 0;
+}
+
+static const struct dm_dvfs_ops wtemp_dvfs_ops = {
+	.apply = wtemp_dvfs_apply,
+	.repeat_apply = wtemp_dvfs_repeat_apply,
+};
+
+static int wtemp_dvfs_probe(struct udevice *dev)
+{
+	struct wtemp_dvfs_priv *priv = dev_get_priv(dev);
+	int ret;
+
+#ifdef CONFIG_ROCKCHIP_DMC
+	struct udevice *ram_dev;
+
+	/* Init dmc */
+	ret = uclass_get_device(UCLASS_RAM, 0, &ram_dev);
+	if (ret) {
+		printf("DVFS: Get dmc device failed, ret=%d\n", ret);
+		return ret;
+	}
+#endif
+	/* Init thermal */
+	ret = uclass_get_device(UCLASS_THERMAL, 0, &priv->thermal);
+	if (ret) {
+		printf("DVFS: Get thermal device failed, ret=%d\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static const struct udevice_id wtemp_dvfs_match[] = {
+	{ .compatible = "rockchip,uboot-wide-temperature", },
+	{},
+};
+
+U_BOOT_DRIVER(rockchip_wide_temp_dvfs) = {
+	.name		      = "rockchip_wide_temp_dvfs",
+	.id		      = UCLASS_DVFS,
+	.ops		      = &wtemp_dvfs_ops,
+	.of_match	      = wtemp_dvfs_match,
+	.probe		      = wtemp_dvfs_probe,
+	.ofdata_to_platdata   = wtemp_dvfs_ofdata_to_platdata,
+	.priv_auto_alloc_size = sizeof(struct wtemp_dvfs_priv),
+};
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index fdfa9b5f58..addf27639b 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -98,6 +98,7 @@ enum uclass_id {
 	UCLASS_KEY,		/* Key */
 	UCLASS_RC,		/* Remote Controller */
 	UCLASS_CHARGE_DISPLAY,	/* Charge display */
+	UCLASS_DVFS,		/* DVFS policy */
 
 	UCLASS_COUNT,
 	UCLASS_INVALID = -1,
diff --git a/include/dvfs.h b/include/dvfs.h
new file mode 100644
index 0000000000..6b93239bf4
--- /dev/null
+++ b/include/dvfs.h
@@ -0,0 +1,47 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _DVFS_H_
+#define _DVFS_H_
+
+#include <dm.h>
+
+/**
+ * dvfs_init() - init first dvfs driver
+ *
+ * @apply: do dvfs policy apply if true, otherwise just init.
+ * @return 0 if OK, 1 on error
+ */
+int dvfs_init(bool apply);
+
+/**
+ * dvfs_apply() - do dvfs policy apply
+ *
+ * @dev: dvfs device
+ * @return 0 if OK, otherwise on error
+ */
+int dvfs_apply(struct udevice *dev);
+
+/**
+ * dvfs_repeat_apply() - do dvfs policy repeat apply
+ *
+ * @dev: dvfs device
+ * @return 0 if OK, otherwise on error
+ */
+int dvfs_repeat_apply(struct udevice *dev);
+
+/**
+ * struct dm_dvfs_ops - Driver model Thermal operations
+ *
+ * The uclass interface is implemented by all Thermal devices which use
+ * driver model.
+ */
+
+struct dm_dvfs_ops {
+	int (*apply)(struct udevice *dev);
+	int (*repeat_apply)(struct udevice *dev);
+};
+
+#endif	/* _DVFS_H_ */

commit 3e6a97f92c48343022ef3adf97f1041976d30fbe
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Dec 10 17:51:46 2018 +0800

    rockchip: destroy atags before jump to kernel
    
    Change-Id: I69f1050ed57a1ebccbc9c7cd5bf9c2eaac9ab30e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 2d6f01903d..0117c22621 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -265,6 +265,12 @@ int board_fdt_fixup(void *blob)
 	return ret;
 }
 
+void board_quiesce_devices(void)
+{
+	/* Destroy atags makes next warm boot safer */
+	atags_destroy();
+}
+
 void enable_caches(void)
 {
 	icache_enable();

commit da73f11ce7403b016599ca18cf29729154877cfc
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Dec 10 15:45:06 2018 +0800

    configs: rk1808: enable console info quiet and disable cmd net
    
    Change-Id: Ic885a4c4f5ce5e12bdb90547903c1429bd3c5df2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk1808_defconfig b/configs/rk1808_defconfig
index a634a3bbc1..147bf4a0eb 100644
--- a/configs/rk1808_defconfig
+++ b/configs/rk1808_defconfig
@@ -12,6 +12,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_BOOTDELAY=0
 # CONFIG_CONSOLE_MUX is not set
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_FASTBOOT_BUF_ADDR=0x00800800
@@ -34,12 +35,14 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_NET is not set
 # CONFIG_CMD_MISC is not set
 # CONFIG_DOS_PARTITION is not set
 # CONFIG_ISO_PARTITION is not set
 CONFIG_RKPARM_PARTITION=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_NET=y
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_CLK=y

commit f90a7d862b3a7ae8efff6bade2d69b6acf5630dc
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 4 17:32:01 2018 +0800

    rk3308: add "kernel_addr_no_bl32_r=0x00280000"
    
    it's used to override "kernel_addr_r" when bl32 is disabled.
    
    load kernel as close as possible to the start of system RAM in
    order to make full use of memory for kernel.
    
    Change-Id: I3908d34866186bf962d207f0f6d4aac47acdeb7a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h
index d380b3abc5..9a2fae5699 100644
--- a/include/configs/rk3308_common.h
+++ b/include/configs/rk3308_common.h
@@ -49,6 +49,7 @@
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x01f00000\0" \
+	"kernel_addr_no_bl32_r=0x00280000\0" \
 	"kernel_addr_r=0x00680000\0" \
 	"kernel_addr_c=0x02480000\0" \
 	"ramdisk_addr_r=0x04000000\0"

commit caf555d05f4f04defddedb938277993e6e5c4a58
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 4 17:29:19 2018 +0800

    rk1808: update kernel load address
    
    - rk3328: set "kernel_addr_r" as 0x00280000
    - add "kernel_addr_no_bl32_r" to override "kernel_addr_r" when bl32 is disabled.
    
    load kernel as close as possible to the start of system RAM in
    order to make full use of memory for kernel.
    
    Change-Id: I8789c3010102d86fae98a46cb6b145b4afb3b3b9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk1808_common.h b/include/configs/rk1808_common.h
index 27e8dabaea..836acae37f 100644
--- a/include/configs/rk1808_common.h
+++ b/include/configs/rk1808_common.h
@@ -39,7 +39,8 @@
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x01f00000\0" \
-	"kernel_addr_r=0x02080000\0" \
+	"kernel_addr_no_bl32_r=0x00280000\0" \
+	"kernel_addr_r=0x00680000\0" \
 	"kernel_addr_c=0x04080000\0" \
 	"ramdisk_addr_r=0x0a200000\0"
 

commit bcf66543f032c1550427e7c6c20a6d9bf2cb7ed8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 4 17:28:35 2018 +0800

    rk3328: set "kernel_addr_r" as 0x00280000
    
    load kernel as close as possible to the start of system RAM in
    order to make full use of memory for kernel.
    
    Change-Id: I95ed8c58d5bbb2de6132d0bbd99ed0a65c8104fe
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index a5be7c3bde..76ed911ef2 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -59,7 +59,7 @@
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x01f00000\0" \
-	"kernel_addr_r=0x02080000\0" \
+	"kernel_addr_r=0x00280000\0" \
 	"ramdisk_addr_r=0x04000000\0"
 
 #include <config_distro_bootcmd.h>

commit 4c35db102eb06f59a93b80ba0e8f65072fa1533a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 4 17:28:15 2018 +0800

    px30: set "kernel_addr_r" as 0x00280000
    
    load kernel as close as possible to the start of system RAM in
    order to make full use of memory for kernel.
    
    Change-Id: I383ba5cc521340e18db0ae3048d02711af59e43b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index 4b1c5457db..cea2d2e5e9 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -52,7 +52,7 @@
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x01f00000\0" \
-	"kernel_addr_r=0x02080000\0" \
+	"kernel_addr_r=0x00280000\0" \
 	"kernel_addr_c=0x03e80000\0" \
 	"ramdisk_addr_r=0x0a200000\0"
 

commit 342ca48f820b3c062652e2cf967e740dac00d8ee
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 4 17:28:03 2018 +0800

    rk3368: set "kernel_addr_r" as 0x00280000
    
    load kernel as close as possible to the start of system RAM in
    order to make full use of memory for kernel.
    
    Change-Id: I199c01bc60dbb3107105e6ea669f64839ead0b80
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h
index e9e3a97aee..b82e9e2df2 100644
--- a/include/configs/rk3368_common.h
+++ b/include/configs/rk3368_common.h
@@ -52,7 +52,7 @@
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x01f00000\0" \
-	"kernel_addr_r=0x02080000\0" \
+	"kernel_addr_r=0x00280000\0" \
 	"ramdisk_addr_r=0x0a200000\0"
 
 #include <config_distro_bootcmd.h>

commit 66768e9e40f86fc79c9500c832301aa54fdf7b9a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 4 17:25:19 2018 +0800

    rk3399: set "kernel_addr_r" as 0x00280000
    
    load kernel as close as possible to the start of system RAM in
    order to make full use of memory for kernel.
    
    Change-Id: I95562432bca16566e92459f8cd56d07f65f77d59
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index 4921ae93f3..3b8adb41fa 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -58,7 +58,7 @@
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x01f00000\0" \
-	"kernel_addr_r=0x02080000\0" \
+	"kernel_addr_r=0x00280000\0" \
 	"ramdisk_addr_r=0x0a200000\0"
 
 #include <config_distro_bootcmd.h>

commit 8c2a7835d0a4e2c8b49262e2f4e347933ebdcfac
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Dec 6 09:50:43 2018 +0800

    common: board_r: enable initr_serial() anyway
    
    If we don't enable initr_serial(), even after relocation done, the
    serial driver always use no relocation address of ns16550_serial_ops
    which is setup in serial_init(). This makes abort issue when arm64 kernel
    is load to overlap the ram area.
    
    fixes: 064eb4931464a5c5dc66e25fc3af2561bc4cb948
    (serial: ns16550: support using pre-loader serial)
    
    Change-Id: Iab67010ba3712754c036ecb2aee76c13a0b200b6
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/board_r.c b/common/board_r.c
index 5f41768878..006c5d6781 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -172,22 +172,7 @@ static int initr_reloc_global_data(void)
 
 static int initr_serial(void)
 {
-/*
- * 1. Serial has been initialized in board_f.c => serial_init(), there is
- *    no special reason to init it again;
- *
- * 2. Pre-serial works depending on aliases to get pre-serial phandle when
- *    parse dtb. If CONFIG_USING_KERNEL_DTB is enabled, there are both kernel
- *    dtb and U-Boot dtb aliases added into aliases_lookup, these nodes have
- *    same names but different phanles(U-Boot nodes has high prior), this may
- *    lead a wrong aliases node finding if try to get a node after kenrel dtb
- *    unflattened, i.e. using U-Boot phandle to get kernel dtb node!!
- *
- *    Notice: of_alias_dump() is provided to dump all aliases node.
- */
-#ifndef CONFIG_USING_KERNEL_DTB
 	serial_initialize();
-#endif
 	return 0;
 }
 

commit f935b6dc55d3285fc022373100a600f1fa146e2f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Dec 6 10:36:32 2018 +0800

    core: of_access: delete exist aliases when adding new one
    
    This new one is from kernel dtb if kernel dtb is enabled.
    
    Change-Id: I6fb54812188fe8749271a7aaae565bc7fa4cb3cc
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/core/of_access.c b/drivers/core/of_access.c
index 5dbed31ceb..f164b07946 100644
--- a/drivers/core/of_access.c
+++ b/drivers/core/of_access.c
@@ -702,10 +702,22 @@ int of_count_phandle_with_args(const struct device_node *np,
 static void of_alias_add(struct alias_prop *ap, struct device_node *np,
 			 int id, const char *stem, int stem_len)
 {
+	struct alias_prop *oldap;
 	ap->np = np;
 	ap->id = id;
 	strncpy(ap->stem, stem, stem_len);
 	ap->stem[stem_len] = 0;
+
+	/* Delete U-Boot alias which is same with kernel */
+	mutex_lock(&of_mutex);
+	list_for_each_entry(oldap, &aliases_lookup, link) {
+		if (stem && !strcmp(stem, oldap->alias) && (id == oldap->id)) {
+			list_del(&oldap->link);
+			break;
+		}
+	}
+	mutex_unlock(&of_mutex);
+
 	list_add_tail(&ap->link, &aliases_lookup);
 	debug("adding DT alias:%s: stem=%s id=%i node=%s\n",
 	      ap->alias, ap->stem, ap->id, of_node_full_name(np));

commit b4913f9584f5dfb0786eadbc5f4cfadd4445b167
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 4 20:29:44 2018 +0800

    android: make android boot message more accurate and clear
    
    1. Actually, the "kernel_address" is android header address but not
       real kernel address, let's use "kernel_addr_r/c" to verbose.
    
    2. print compressed type info, like:
       "Booting LZ4 kernel at 0x02480000(Uncompress to 00680000) with fdt at 1f00000..." or
       "Booting kernel at 0x00680000 with fdt at 0x1f00000..."
    
    Change-Id: Ifb628ab355670681f78d8f73893baddee21223a0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index de7492d571..464e23a3bf 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -300,15 +300,34 @@ static int android_bootloader_get_fdt(const char *part_name,
 
 int android_bootloader_boot_kernel(unsigned long kernel_address)
 {
+	ulong comp;
 	char kernel_addr_str[12];
 	char *fdt_addr = env_get("fdt_addr");
+	char *kernel_addr_r = env_get("kernel_addr_r");
+	char *kernel_addr_c = env_get("kernel_addr_c");
+
+	const char *comp_name[] = {
+		[IH_COMP_NONE]  = "",
+		[IH_COMP_GZIP]  = "GZIP",
+		[IH_COMP_BZIP2] = "BZIP2",
+		[IH_COMP_LZMA]  = "LZMA",
+		[IH_COMP_LZO]   = "LZO",
+		[IH_COMP_LZ4]   = "LZ4",
+		[IH_COMP_ZIMAGE]= "ZIMAGE",
+	};
 	char *bootm_args[] = {
 		"bootm", kernel_addr_str, kernel_addr_str, fdt_addr, NULL };
 
+	comp = android_image_get_comp((struct andr_img_hdr *)kernel_address);
 	sprintf(kernel_addr_str, "0x%lx", kernel_address);
 
-	printf("Booting kernel at %s with fdt at %s...\n\n\n",
-	       kernel_addr_str, fdt_addr);
+	if (comp != IH_COMP_NONE)
+		printf("Booting %s kernel at %s(Uncompress to %s) with fdt at %s...\n\n\n",
+		       comp_name[comp], kernel_addr_c, kernel_addr_r, fdt_addr);
+	else
+		printf("Booting kernel at %s with fdt at %s...\n\n\n",
+		       kernel_addr_r, fdt_addr);
+
 	do_bootm(NULL, 0, 4, bootm_args);
 
 	return -1;

commit eb94a25c6fea82022e6271a59e60c744101a8453
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 4 21:02:28 2018 +0800

    android: fix android load address missing reserve page size
    
    fixes: ee465021feb46515c76fe2291d3fdf31eb6dbb4
    (android: support boot images packed with rockchip android hdr)
    
    Change-Id: Iaf340c828196553e433b17322929eaeed6afbf55
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/image-android.c b/common/image-android.c
index 36207e2770..3405fc7578 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -314,6 +314,7 @@ long android_image_load(struct blk_desc *dev_desc,
 		if (comp != IH_COMP_NONE) {
 			load_address += android_image_get_ksize(hdr) * 3;
 			load_address = env_get_ulong("kernel_addr_c", 16, load_address);
+			load_address -= hdr->page_size;
 			unmap_sysmem(buf);
 			buf = map_sysmem(load_address, 0 /* size */);
 		}

commit 59c7ef16b353241fb0a4b37a5625ee54ab2adc4a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Dec 10 15:02:12 2018 +0800

    make.sh: clean debug commands to a function
    
    Change-Id: Ia141a0830428ae51d9dd45da80a61d3805f62f4a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index d866a46d91..20e8def0f3 100755
--- a/make.sh
+++ b/make.sh
@@ -237,77 +237,7 @@ sub_commands()
 		;;
 
 		debug)
-		if [ "${cmd}" = 'debug' -a "${opt}" = 'debug' ]; then
-			echo
-			echo "The commands will modify .config and files, and can't auto restore changes!"
-			echo "debug-N, the N:"
-			echo "    1. lib/initcall.c debug() -> printf()"
-			echo "    2. common/board_r.c and common/board_f.c debug() -> printf()"
-			echo "    3. global #define DEBUG"
-			echo "    4. enable CONFIG_ROCKCHIP_DEBUGGER"
-			echo "    5. enable CONFIG_ROCKCHIP_CRC"
-			echo "    6. enable CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP"
-			echo "    7. enable CONFIG_ROCKCHIP_CRASH_DUMP"
-			echo "    8. set CONFIG_BOOTDELAY=5"
-			echo "    9. armv7 start.S: print entry warning"
-			echo "   10. armv8 start.S: print entry warning"
-			echo "   11. firmware bootflow debug() -> printf()"
-			echo
-			echo "Enabled: "
-			grep '^CONFIG_ROCKCHIP_DEBUGGER=y' ${OUTDIR}/.config > /dev/null \
-			&& echo "    CONFIG_ROCKCHIP_DEBUGGER"
-			grep '^CONFIG_ROCKCHIP_CRC=y' ${OUTDIR}/.config > /dev/null \
-			&& echo "    CONFIG_ROCKCHIP_CRC"
-			grep '^CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP=y' ${OUTDIR}/.config > /dev/null \
-			&& echo "    CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP"
-			grep '^CONFIG_ROCKCHIP_CRASH_DUMP=y' ${OUTDIR}/.config > /dev/null \
-			&& echo "    CONFIG_ROCKCHIP_CRASH_DUMP"
-
-		elif [ "${opt}" = '1' ]; then
-			sed -i 's/\<debug\>/printf/g' lib/initcall.c
-			echo "DEBUG [1]: lib/initcall.c debug() -> printf()"
-		elif [ "${opt}" = '2' ]; then
-			sed -i 's/\<debug\>/printf/g' ./common/board_f.c
-			sed -i 's/\<debug\>/printf/g' ./common/board_r.c
-			echo "DEBUG [2]: common/board_r.c and common/board_f.c debug() -> printf()"
-		elif [ "${opt}" = '3' ]; then
-			sed -i '$i \#define DEBUG\' include/configs/rockchip-common.h
-			echo "DEBUG [3]: global #define DEBUG"
-		elif [ "${opt}" = '4' ]; then
-			sed -i 's/\# CONFIG_ROCKCHIP_DEBUGGER is not set/CONFIG_ROCKCHIP_DEBUGGER=y/g' ${OUTDIR}/.config
-			echo "DEBUG [4]: CONFIG_ROCKCHIP_DEBUGGER is enabled"
-		elif [ "${opt}" = '5' ]; then
-			sed -i 's/\# CONFIG_ROCKCHIP_CRC is not set/CONFIG_ROCKCHIP_CRC=y/g' ${OUTDIR}/.config
-			echo "DEBUG [5]: CONFIG_ROCKCHIP_CRC is enabled"
-		elif [ "${opt}" = '6' ]; then
-			sed -i 's/\# CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP is not set/CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP=y/g' ${OUTDIR}/.config
-			echo "DEBUG [6]: CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP is enabled"
-		elif [ "${opt}" = '7' ]; then
-			sed -i 's/\# CONFIG_ROCKCHIP_CRASH_DUMP is not set/CONFIG_ROCKCHIP_CRASH_DUMP=y/g' ${OUTDIR}/.config
-			echo "DEBUG [7]: CONFIG_ROCKCHIP_CRASH_DUMP is enabled"
-		elif [ "${opt}" = '8' ]; then
-			sed -i 's/^CONFIG_BOOTDELAY=0/CONFIG_BOOTDELAY=5/g' ${OUTDIR}/.config
-			echo "DEBUG [8]: CONFIG_BOOTDELAY is 5s"
-		elif [ "${opt}" = '9' ]; then
-			sed -i '/save_boot_params_ret:/a\ldr r0, =CONFIG_DEBUG_UART_BASE\nmov r1, #100\nloop:\nmov r2, #0x55\nstr r2, [r0]\nsub r1, r1, #1\ncmp r1, #0\nbne loop\ndsb' \
-			./arch/arm/cpu/armv7/start.S
-			echo "DEBUG [9]: armv7 start.S entry warning 'UUUU...'"
-		elif [ "${opt}" = '10' ]; then
-			sed -i '/save_boot_params_ret:/a\ldr x0, =CONFIG_DEBUG_UART_BASE\nmov x1, #100\nloop:\nmov x2, #0x55\nstr x2, [x0]\nsub x1, x1, #1\ncmp x1, #0\nb.ne loop\ndsb sy' \
-			./arch/arm/cpu/armv8/start.S
-			echo "DEBUG [10]: armv8 start.S entry warning 'UUUU...'"
-		elif [ "${opt}" = '11' ]; then
-			sed -i 's/\<debug\>/printf/g' common/fdt_support.c
-			sed -i 's/\<debug\>/printf/g' common/image-fdt.c
-			sed -i 's/\<debug\>/printf/g' common/image.c
-			sed -i 's/\<debug\>/printf/g' arch/arm/lib/bootm.c
-			sed -i 's/\<debug\>/printf/g' common/bootm.c
-			sed -i 's/\<debug\>/printf/g' common/image.c
-			sed -i 's/\<debug\>/printf/g' common/image-android.c
-			sed -i 's/\<debug\>/printf/g' common/android_bootloader.c
-			echo "DEBUG [11]: firmware bootflow debug() -> printf()"
-		fi
-		echo
+		debug_command
 		exit 0
 		;;
 
@@ -472,6 +402,82 @@ fixup_platform_configure()
 	fi
 }
 
+debug_command()
+{
+		if [ "${cmd}" = 'debug' -a "${opt}" = 'debug' ]; then
+			echo
+			echo "The commands will modify .config and files, and can't auto restore changes!"
+			echo "debug-N, the N:"
+			echo "    1. lib/initcall.c debug() -> printf()"
+			echo "    2. common/board_r.c and common/board_f.c debug() -> printf()"
+			echo "    3. global #define DEBUG"
+			echo "    4. enable CONFIG_ROCKCHIP_DEBUGGER"
+			echo "    5. enable CONFIG_ROCKCHIP_CRC"
+			echo "    6. enable CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP"
+			echo "    7. enable CONFIG_ROCKCHIP_CRASH_DUMP"
+			echo "    8. set CONFIG_BOOTDELAY=5"
+			echo "    9. armv7 start.S: print entry warning"
+			echo "   10. armv8 start.S: print entry warning"
+			echo "   11. firmware bootflow debug() -> printf()"
+			echo
+			echo "Enabled: "
+			grep '^CONFIG_ROCKCHIP_DEBUGGER=y' ${OUTDIR}/.config > /dev/null \
+			&& echo "    CONFIG_ROCKCHIP_DEBUGGER"
+			grep '^CONFIG_ROCKCHIP_CRC=y' ${OUTDIR}/.config > /dev/null \
+			&& echo "    CONFIG_ROCKCHIP_CRC"
+			grep '^CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP=y' ${OUTDIR}/.config > /dev/null \
+			&& echo "    CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP"
+			grep '^CONFIG_ROCKCHIP_CRASH_DUMP=y' ${OUTDIR}/.config > /dev/null \
+			&& echo "    CONFIG_ROCKCHIP_CRASH_DUMP"
+
+		elif [ "${opt}" = '1' ]; then
+			sed -i 's/\<debug\>/printf/g' lib/initcall.c
+			sed -i 's/ifdef DEBUG/if 1/g' lib/initcall.c
+			echo "DEBUG [1]: lib/initcall.c debug() -> printf()"
+		elif [ "${opt}" = '2' ]; then
+			sed -i 's/\<debug\>/printf/g' ./common/board_f.c
+			sed -i 's/\<debug\>/printf/g' ./common/board_r.c
+			echo "DEBUG [2]: common/board_r.c and common/board_f.c debug() -> printf()"
+		elif [ "${opt}" = '3' ]; then
+			sed -i '$i \#define DEBUG\' include/configs/rockchip-common.h
+			echo "DEBUG [3]: global #define DEBUG"
+		elif [ "${opt}" = '4' ]; then
+			sed -i 's/\# CONFIG_ROCKCHIP_DEBUGGER is not set/CONFIG_ROCKCHIP_DEBUGGER=y/g' ${OUTDIR}/.config
+			echo "DEBUG [4]: CONFIG_ROCKCHIP_DEBUGGER is enabled"
+		elif [ "${opt}" = '5' ]; then
+			sed -i 's/\# CONFIG_ROCKCHIP_CRC is not set/CONFIG_ROCKCHIP_CRC=y/g' ${OUTDIR}/.config
+			echo "DEBUG [5]: CONFIG_ROCKCHIP_CRC is enabled"
+		elif [ "${opt}" = '6' ]; then
+			sed -i 's/\# CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP is not set/CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP=y/g' ${OUTDIR}/.config
+			echo "DEBUG [6]: CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP is enabled"
+		elif [ "${opt}" = '7' ]; then
+			sed -i 's/\# CONFIG_ROCKCHIP_CRASH_DUMP is not set/CONFIG_ROCKCHIP_CRASH_DUMP=y/g' ${OUTDIR}/.config
+			echo "DEBUG [7]: CONFIG_ROCKCHIP_CRASH_DUMP is enabled"
+		elif [ "${opt}" = '8' ]; then
+			sed -i 's/^CONFIG_BOOTDELAY=0/CONFIG_BOOTDELAY=5/g' ${OUTDIR}/.config
+			echo "DEBUG [8]: CONFIG_BOOTDELAY is 5s"
+		elif [ "${opt}" = '9' ]; then
+			sed -i '/save_boot_params_ret:/a\ldr r0, =CONFIG_DEBUG_UART_BASE\nmov r1, #100\nloop:\nmov r2, #0x55\nstr r2, [r0]\nsub r1, r1, #1\ncmp r1, #0\nbne loop\ndsb' \
+			./arch/arm/cpu/armv7/start.S
+			echo "DEBUG [9]: armv7 start.S entry warning 'UUUU...'"
+		elif [ "${opt}" = '10' ]; then
+			sed -i '/save_boot_params_ret:/a\ldr x0, =CONFIG_DEBUG_UART_BASE\nmov x1, #100\nloop:\nmov x2, #0x55\nstr x2, [x0]\nsub x1, x1, #1\ncmp x1, #0\nb.ne loop\ndsb sy' \
+			./arch/arm/cpu/armv8/start.S
+			echo "DEBUG [10]: armv8 start.S entry warning 'UUUU...'"
+		elif [ "${opt}" = '11' ]; then
+			sed -i 's/\<debug\>/printf/g' common/fdt_support.c
+			sed -i 's/\<debug\>/printf/g' common/image-fdt.c
+			sed -i 's/\<debug\>/printf/g' common/image.c
+			sed -i 's/\<debug\>/printf/g' arch/arm/lib/bootm.c
+			sed -i 's/\<debug\>/printf/g' common/bootm.c
+			sed -i 's/\<debug\>/printf/g' common/image.c
+			sed -i 's/\<debug\>/printf/g' common/image-android.c
+			sed -i 's/\<debug\>/printf/g' common/android_bootloader.c
+			echo "DEBUG [11]: firmware bootflow debug() -> printf()"
+		fi
+		echo
+}
+
 pack_uboot_image()
 {
 	local UBOOT_LOAD_ADDR

commit 36ba3f8d39ecc8eca0b0ed34154f08be164b93a3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Dec 6 16:05:24 2018 +0800

    lib: initcall: add time cost verbose
    
    This is more helpful than bootstage timing record since it
    is quite possible for every developer to enable inicall
    verbose for debug and find abnormal time cost as early as
    possible.
    
    It looks like:
      initcall: 000000000061015c
                                                                      #   183 us
      initcall: 000000000ff3e614
                                                                      #     0 us
      initcall: 000000000ff3e408
                                                                      #     0 us
      initcall: 00000000006105fc (relocated to 000000000ff3e5fc)
                                                                      #  6401 us
      initcall: 0000000000610420 (relocated to 000000000ff3e420)
                                                                      #     1 us
      initcall: 0000000000604444 (relocated to 000000000ff32444)
                                                                      #     5 us
    Change-Id: Ib59f3e5052f921d0046a6fa73cbfb968000fd34e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/lib/initcall.c b/lib/initcall.c
index db7c558bde..73c72cf1a5 100644
--- a/lib/initcall.c
+++ b/lib/initcall.c
@@ -10,9 +10,18 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#define SYS_TICKS_TO_US(ticks)	 ((ticks) / (COUNTER_FREQUENCY / 1000000))
+
+#ifdef DEBUG
+static inline void call_get_ticks(ulong *ticks) { *ticks = get_ticks(); }
+#else
+static inline void call_get_ticks(ulong *ticks) { }
+#endif
+
 int initcall_run_list(const init_fnc_t init_sequence[])
 {
 	const init_fnc_t *init_fnc_ptr;
+	__maybe_unused ulong start = 0, end = 0;
 
 	for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) {
 		unsigned long reloc_ofs = 0;
@@ -28,7 +37,11 @@ int initcall_run_list(const init_fnc_t init_sequence[])
 			debug(" (relocated to %p)\n", (char *)*init_fnc_ptr);
 		else
 			debug("\n");
+		call_get_ticks(&start);
 		ret = (*init_fnc_ptr)();
+		call_get_ticks(&end);
+		if (start != end)
+			debug("\t\t\t\t\t\t\t\t#%6ld us\n", SYS_TICKS_TO_US(end - start));
 		if (ret) {
 			printf("initcall sequence %p failed at call %p (err=%d)\n",
 			       init_sequence,

commit bc04a3dd9a41813372820ba50655022a6a28bfbf
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 4 17:21:31 2018 +0800

    rockchip: fixup "kernel_addr_r" when bl32 is disabled
    
    some platform which is not determined to enable bl32,
    we had better choose kernel load address dynamically in
    order to make full use of memory for kernel.
    
    Change-Id: If5c15a3755dabfff8d3cce8dec38c9215c464ed2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 79122316ce..2d6f01903d 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -197,6 +197,18 @@ int init_kernel_dtb(void)
 }
 #endif
 
+void board_env_fixup(void)
+{
+	ulong kernel_addr_r;
+
+	if (gd->flags & GD_FLG_BL32_ENABLED)
+		return;
+
+	/* If bl32 is disabled, maybe kernel can be load to lower address. */
+	kernel_addr_r = env_get_ulong("kernel_addr_no_bl32_r", 16, -1);
+	if (kernel_addr_r != -1)
+		env_set_hex("kernel_addr_r", kernel_addr_r);
+}
 
 int board_init(void)
 {
diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
index 3f15c18000..2c4d26826f 100644
--- a/arch/arm/mach-rockchip/sdram_common.c
+++ b/arch/arm/mach-rockchip/sdram_common.c
@@ -117,6 +117,7 @@ static int __dram_init_banksize(int resv_tee)
 		    (tos_parameter->tee_mem.flags == 1)) {
 			tos_addr = tos_parameter->tee_mem.phy_addr;
 			tos_size = tos_parameter->tee_mem.size;
+			gd->flags |= GD_FLG_BL32_ENABLED;
 		}
 	}
 
diff --git a/env/common.c b/env/common.c
index 70715bb6e7..1c75fd3133 100644
--- a/env/common.c
+++ b/env/common.c
@@ -41,6 +41,8 @@ int env_get_yesno(const char *var)
 		1 : 0;
 }
 
+__weak void board_env_fixup(void) {}
+
 /*
  * Look up the variable from the default environment
  */
@@ -88,6 +90,8 @@ void set_default_env(const char *s)
 
 	gd->flags |= GD_FLG_ENV_READY;
 	gd->flags |= GD_FLG_ENV_DEFAULT;
+
+	board_env_fixup();
 }
 
 
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index 17103318b8..d43ea5a173 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -171,6 +171,8 @@ typedef struct global_data {
 #ifdef CONFIG_ARCH_ROCKCHIP
 /* Currently, we use it to indicate console can be flushed before jump to OS */
 #define GD_FLG_OS_RUN		0x10000
+/* BL32 is enabled */
+#define GD_FLG_BL32_ENABLED	0x20000
 #endif
 
 #endif /* __ASM_GENERIC_GBL_DATA_H */
diff --git a/include/common.h b/include/common.h
index 1c280d86f8..e300aa3c25 100644
--- a/include/common.h
+++ b/include/common.h
@@ -477,6 +477,7 @@ int board_late_init (void);
 int board_postclk_init (void); /* after clocks/timebase, before env/serial */
 int board_early_init_r (void);
 void board_poweroff (void);
+void board_env_fixup(void);
 
 #if defined(CONFIG_SYS_DRAM_TEST)
 int testdram(void);

commit a65ff5dd0e5fd572494d2b25b5831239dc36a439
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Thu Dec 6 17:00:35 2018 +0800

    video/drm: dsi: Add support for adapted command mode (Auto mode)
    
    Change-Id: I301bb5d9b40ebccdb1d2395e14a2d4cab5ea2325
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index a219f15f93..cb57b84cb5 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -59,6 +59,8 @@
 #define OUTVACT_LPCMD_TIME(p)		(((p) & 0xff) << 16)
 #define INVACT_LPCMD_TIME(p)		((p) & 0xff)
 
+#define DSI_DBI_VCID			0x1c
+#define DBI_VCID(x)			UPDATE(x, 1, 0)
 #define DSI_DBI_CFG			0x20
 #define DSI_DBI_CMDSIZE			0x28
 
@@ -68,11 +70,10 @@
 #define BTA_EN				BIT(2)
 #define EOTP_RX_EN			BIT(1)
 #define EOTP_TX_EN			BIT(0)
-
 #define DSI_MODE_CFG			0x34
-#define ENABLE_VIDEO_MODE		0
-#define ENABLE_CMD_MODE			BIT(0)
-
+#define CMD_VIDEO_MODE			BIT(0)
+#define COMMAND_MODE			BIT(0)
+#define VIDEO_MODE			0
 #define DSI_VID_MODE_CFG		0x38
 #define VPG_EN				BIT(16)
 #define LP_CMD_EN			BIT(15)
@@ -100,34 +101,22 @@
 #define DSI_VID_VBP_LINES		0x58
 #define DSI_VID_VFP_LINES		0x5c
 #define DSI_VID_VACTIVE_LINES		0x60
+#define DSI_EDPI_CMD_SIZE		0x64
 #define DSI_CMD_MODE_CFG		0x68
-#define MAX_RD_PKT_SIZE_LP		BIT(24)
-#define DCS_LW_TX_LP			BIT(19)
-#define DCS_SR_0P_TX_LP			BIT(18)
-#define DCS_SW_1P_TX_LP			BIT(17)
-#define DCS_SW_0P_TX_LP			BIT(16)
-#define GEN_LW_TX_LP			BIT(14)
-#define GEN_SR_2P_TX_LP			BIT(13)
-#define GEN_SR_1P_TX_LP			BIT(12)
-#define GEN_SR_0P_TX_LP			BIT(11)
-#define GEN_SW_2P_TX_LP			BIT(10)
-#define GEN_SW_1P_TX_LP			BIT(9)
-#define GEN_SW_0P_TX_LP			BIT(8)
-#define EN_ACK_RQST			BIT(1)
-#define EN_TEAR_FX			BIT(0)
-
-#define CMD_MODE_ALL_LP			(MAX_RD_PKT_SIZE_LP | \
-					 DCS_LW_TX_LP | \
-					 DCS_SR_0P_TX_LP | \
-					 DCS_SW_1P_TX_LP | \
-					 DCS_SW_0P_TX_LP | \
-					 GEN_LW_TX_LP | \
-					 GEN_SR_2P_TX_LP | \
-					 GEN_SR_1P_TX_LP | \
-					 GEN_SR_0P_TX_LP | \
-					 GEN_SW_2P_TX_LP | \
-					 GEN_SW_1P_TX_LP | \
-					 GEN_SW_0P_TX_LP)
+#define MAX_RD_PKT_SIZE			BIT(24)
+#define DCS_LW_TX			BIT(19)
+#define DCS_SR_0P_TX			BIT(18)
+#define DCS_SW_1P_TX			BIT(17)
+#define DCS_SW_0P_TX			BIT(16)
+#define GEN_LW_TX			BIT(14)
+#define GEN_SR_2P_TX			BIT(13)
+#define GEN_SR_1P_TX			BIT(12)
+#define GEN_SR_0P_TX			BIT(11)
+#define GEN_SW_2P_TX			BIT(10)
+#define GEN_SW_1P_TX			BIT(9)
+#define GEN_SW_0P_TX			BIT(8)
+#define ACK_RQST_EN			BIT(1)
+#define TEAR_FX_EN			BIT(0)
 
 #define DSI_GEN_HDR			0x6c
 #define GEN_HDATA(data)			(((data) & 0xffff) << 8)
@@ -319,11 +308,6 @@ struct dw_mipi_dsi {
 	const struct dw_mipi_dsi_plat_data *pdata;
 };
 
-enum dw_mipi_dsi_mode {
-	DSI_COMMAND_MODE,
-	DSI_VIDEO_MODE,
-};
-
 struct dphy_pll_testdin_map {
 	unsigned int max_mbps;
 	u8 testdin;
@@ -621,18 +605,6 @@ static int dw_mipi_dsi_get_lane_bps(struct dw_mipi_dsi *dsi)
 	return 0;
 }
 
-static void dw_mipi_dsi_set_transfer_mode(struct dw_mipi_dsi *dsi)
-{
-	if (dsi->mode_flags & MIPI_DSI_MODE_LPM) {
-		dsi_write(dsi, DSI_CMD_MODE_CFG, CMD_MODE_ALL_LP);
-		dsi_update_bits(dsi, DSI_LPCLK_CTRL, PHY_TXREQUESTCLKHS, 0);
-	} else {
-		dsi_write(dsi, DSI_CMD_MODE_CFG, 0);
-		dsi_update_bits(dsi, DSI_LPCLK_CTRL,
-				PHY_TXREQUESTCLKHS, PHY_TXREQUESTCLKHS);
-	}
-}
-
 static int dw_mipi_dsi_read_from_fifo(struct dw_mipi_dsi *dsi,
 				      const struct mipi_dsi_msg *msg)
 {
@@ -707,28 +679,88 @@ static ssize_t dw_mipi_dsi_transfer(struct dw_mipi_dsi *dsi,
 	int ret;
 	int val;
 
+	if (dsi->mode_flags & MIPI_DSI_MODE_LPM) {
+		dsi_update_bits(dsi, DSI_VID_MODE_CFG, LP_CMD_EN, LP_CMD_EN);
+		dsi_update_bits(dsi, DSI_LPCLK_CTRL, PHY_TXREQUESTCLKHS, 0);
+	} else {
+		dsi_update_bits(dsi, DSI_VID_MODE_CFG, LP_CMD_EN, 0);
+		dsi_update_bits(dsi, DSI_LPCLK_CTRL,
+				PHY_TXREQUESTCLKHS, PHY_TXREQUESTCLKHS);
+	}
+
 	switch (msg->type) {
 	case MIPI_DSI_SHUTDOWN_PERIPHERAL:
 		return dw_mipi_dsi_shutdown_peripheral(dsi);
 	case MIPI_DSI_TURN_ON_PERIPHERAL:
 		return dw_mipi_dsi_turn_on_peripheral(dsi);
 	case MIPI_DSI_DCS_SHORT_WRITE:
+		dsi_update_bits(dsi, DSI_CMD_MODE_CFG, DCS_SW_0P_TX,
+				dsi->mode_flags & MIPI_DSI_MODE_LPM ?
+				DCS_SW_0P_TX : 0);
+		break;
 	case MIPI_DSI_DCS_SHORT_WRITE_PARAM:
+		dsi_update_bits(dsi, DSI_CMD_MODE_CFG, DCS_SW_1P_TX,
+				dsi->mode_flags & MIPI_DSI_MODE_LPM ?
+				DCS_SW_1P_TX : 0);
+		break;
 	case MIPI_DSI_DCS_LONG_WRITE:
+		dsi_update_bits(dsi, DSI_CMD_MODE_CFG, DCS_LW_TX,
+				dsi->mode_flags & MIPI_DSI_MODE_LPM ?
+				DCS_LW_TX : 0);
+		break;
 	case MIPI_DSI_DCS_READ:
+		dsi_update_bits(dsi, DSI_CMD_MODE_CFG, DCS_SR_0P_TX,
+				dsi->mode_flags & MIPI_DSI_MODE_LPM ?
+				DCS_SR_0P_TX : 0);
+		break;
 	case MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE:
+		dsi_update_bits(dsi, DSI_CMD_MODE_CFG, MAX_RD_PKT_SIZE,
+				dsi->mode_flags & MIPI_DSI_MODE_LPM ?
+				MAX_RD_PKT_SIZE : 0);
+		break;
 	case MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM:
+		dsi_update_bits(dsi, DSI_CMD_MODE_CFG, GEN_SW_0P_TX,
+				dsi->mode_flags & MIPI_DSI_MODE_LPM ?
+				GEN_SW_0P_TX : 0);
+		break;
 	case MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM:
+		dsi_update_bits(dsi, DSI_CMD_MODE_CFG, GEN_SW_1P_TX,
+				dsi->mode_flags & MIPI_DSI_MODE_LPM ?
+				GEN_SW_1P_TX : 0);
+		break;
 	case MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM:
+		dsi_update_bits(dsi, DSI_CMD_MODE_CFG, GEN_SW_2P_TX,
+				dsi->mode_flags & MIPI_DSI_MODE_LPM ?
+				GEN_SW_2P_TX : 0);
+		break;
 	case MIPI_DSI_GENERIC_LONG_WRITE:
+		dsi_update_bits(dsi, DSI_CMD_MODE_CFG, GEN_LW_TX,
+				dsi->mode_flags & MIPI_DSI_MODE_LPM ?
+				GEN_LW_TX : 0);
+		break;
 	case MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM:
+		dsi_update_bits(dsi, DSI_CMD_MODE_CFG, GEN_SR_0P_TX,
+				dsi->mode_flags & MIPI_DSI_MODE_LPM ?
+				GEN_SR_0P_TX : 0);
+		break;
 	case MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM:
+		dsi_update_bits(dsi, DSI_CMD_MODE_CFG, GEN_SR_1P_TX,
+				dsi->mode_flags & MIPI_DSI_MODE_LPM ?
+				GEN_SR_1P_TX : 0);
+		break;
 	case MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM:
+		dsi_update_bits(dsi, DSI_CMD_MODE_CFG, GEN_SR_2P_TX,
+				dsi->mode_flags & MIPI_DSI_MODE_LPM ?
+				GEN_SR_2P_TX : 0);
 		break;
 	default:
 		return -EINVAL;
 	}
 
+	if (msg->flags & MIPI_DSI_MSG_REQ_ACK)
+		dsi_update_bits(dsi, DSI_CMD_MODE_CFG,
+				ACK_RQST_EN, ACK_RQST_EN);
+
 	/* create a packet to the DSI protocol */
 	ret = mipi_dsi_create_packet(&packet, msg);
 	if (ret) {
@@ -736,8 +768,6 @@ static ssize_t dw_mipi_dsi_transfer(struct dw_mipi_dsi *dsi,
 		return ret;
 	}
 
-	dw_mipi_dsi_set_transfer_mode(dsi);
-
 	/* Send payload */
 	while (DIV_ROUND_UP(packet.payload_length, 4)) {
 		/*
@@ -808,7 +838,7 @@ static ssize_t dw_mipi_dsi_connector_transfer(struct display_state *state,
 static void dw_mipi_dsi_video_mode_config(struct dw_mipi_dsi *dsi)
 {
 	u32 val = LP_VACT_EN | LP_VFP_EN | LP_VBP_EN | LP_VSA_EN |
-		  LP_HFP_EN | LP_HBP_EN | LP_CMD_EN;
+		  LP_HFP_EN | LP_HBP_EN;
 
 	if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_HFP)
 		val &= ~LP_HFP_EN;
@@ -830,23 +860,26 @@ static void dw_mipi_dsi_video_mode_config(struct dw_mipi_dsi *dsi)
 				AUTO_CLKLANE_CTRL, AUTO_CLKLANE_CTRL);
 }
 
-static void dw_mipi_dsi_set_mode(struct dw_mipi_dsi *dsi,
-				 enum dw_mipi_dsi_mode mode)
+static void dw_mipi_dsi_enable(struct dw_mipi_dsi *dsi)
 {
-	if (mode == DSI_COMMAND_MODE) {
-		dsi_write(dsi, DSI_MODE_CFG, ENABLE_CMD_MODE);
+	const struct drm_display_mode *mode = dsi->mode;
+
+	dsi_update_bits(dsi, DSI_LPCLK_CTRL,
+			PHY_TXREQUESTCLKHS, PHY_TXREQUESTCLKHS);
+
+	dsi_write(dsi, DSI_PWR_UP, RESET);
+
+	if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO) {
+		dsi_update_bits(dsi, DSI_MODE_CFG, CMD_VIDEO_MODE, VIDEO_MODE);
 	} else {
-		dsi_write(dsi, DSI_PWR_UP, RESET);
-		dsi_update_bits(dsi, DSI_LPCLK_CTRL,
-				PHY_TXREQUESTCLKHS, PHY_TXREQUESTCLKHS);
-		dsi_write(dsi, DSI_MODE_CFG, ENABLE_VIDEO_MODE);
-		dsi_write(dsi, DSI_PWR_UP, POWERUP);
+		dsi_write(dsi, DSI_DBI_VCID, DBI_VCID(dsi->channel));
+		dsi_update_bits(dsi, DSI_CMD_MODE_CFG, DCS_LW_TX, 0);
+		dsi_write(dsi, DSI_EDPI_CMD_SIZE, mode->hdisplay);
+		dsi_update_bits(dsi, DSI_MODE_CFG,
+				CMD_VIDEO_MODE, COMMAND_MODE);
 	}
-}
 
-static void dw_mipi_dsi_enable(struct dw_mipi_dsi *dsi)
-{
-	dw_mipi_dsi_set_mode(dsi, DSI_VIDEO_MODE);
+	dsi_write(dsi, DSI_PWR_UP, POWERUP);
 
 	if (dsi->slave)
 		dw_mipi_dsi_enable(dsi->slave);
@@ -854,13 +887,23 @@ static void dw_mipi_dsi_enable(struct dw_mipi_dsi *dsi)
 
 static void dw_mipi_dsi_disable(struct dw_mipi_dsi *dsi)
 {
-	dw_mipi_dsi_set_mode(dsi, DSI_COMMAND_MODE);
+	dsi_write(dsi, DSI_PWR_UP, RESET);
 	dsi_write(dsi, DSI_LPCLK_CTRL, 0);
+	dsi_write(dsi, DSI_EDPI_CMD_SIZE, 0);
+	dsi_update_bits(dsi, DSI_MODE_CFG, CMD_VIDEO_MODE, COMMAND_MODE);
+	dsi_write(dsi, DSI_PWR_UP, POWERUP);
+
+	if (dsi->slave)
+		dw_mipi_dsi_disable(dsi->slave);
+}
+
+static void dw_mipi_dsi_post_disable(struct dw_mipi_dsi *dsi)
+{
 	dsi_write(dsi, DSI_PWR_UP, RESET);
 	dsi_write(dsi, DSI_PHY_RSTZ, 0);
 
 	if (dsi->slave)
-		dw_mipi_dsi_disable(dsi->slave);
+		dw_mipi_dsi_post_disable(dsi->slave);
 }
 
 static void dw_mipi_dsi_init(struct dw_mipi_dsi *dsi)
@@ -1156,7 +1199,7 @@ static void dw_mipi_dsi_host_init(struct dw_mipi_dsi *dsi)
 	dw_mipi_dsi_video_mode_config(dsi);
 	dw_mipi_dsi_video_packet_config(dsi, dsi->mode);
 	dw_mipi_dsi_command_mode_config(dsi);
-	dw_mipi_dsi_set_mode(dsi, DSI_COMMAND_MODE);
+	dsi_update_bits(dsi, DSI_MODE_CFG, CMD_VIDEO_MODE, COMMAND_MODE);
 	dw_mipi_dsi_line_timer_config(dsi);
 	dw_mipi_dsi_vertical_timing_config(dsi);
 	dw_mipi_dsi_dphy_timing_config(dsi);
@@ -1225,6 +1268,14 @@ static int dw_mipi_dsi_connector_prepare(struct display_state *state)
 	return 0;
 }
 
+static void dw_mipi_dsi_connector_unprepare(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct dw_mipi_dsi *dsi = conn_state->private;
+
+	dw_mipi_dsi_post_disable(dsi);
+}
+
 static int dw_mipi_dsi_connector_enable(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
@@ -1248,6 +1299,7 @@ static int dw_mipi_dsi_connector_disable(struct display_state *state)
 static const struct rockchip_connector_funcs dw_mipi_dsi_connector_funcs = {
 	.init = dw_mipi_dsi_connector_init,
 	.prepare = dw_mipi_dsi_connector_prepare,
+	.unprepare = dw_mipi_dsi_connector_unprepare,
 	.enable = dw_mipi_dsi_connector_enable,
 	.disable = dw_mipi_dsi_connector_disable,
 	.transfer = dw_mipi_dsi_connector_transfer,

commit 6307c8ee3072b5698bde6cc1db23cad99c1dbc84
Author: jon.lin <jon.lin@rock-chips.com>
Date:   Thu Dec 6 03:34:23 2018 -0800

    rockchip: rv1108: define macro CONFIG_SYS_SDRAM_BASE to real num
    
    Change-Id: I2b5f05952d1d10e853d83bf7486a8cf53226d189
    Signed-off-by: jon.lin <jon.lin@rock-chips.com>

diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h
index b0f6b90ddf..44cd4e3f6f 100644
--- a/include/configs/rv1108_common.h
+++ b/include/configs/rv1108_common.h
@@ -15,7 +15,7 @@
 
 #define CONFIG_SYS_SDRAM_BASE		0x60000000
 #define SDRAM_MAX_SIZE			0x80000000
-#define CONFIG_SYS_TEXT_BASE		CONFIG_SYS_SDRAM_BASE
+#define CONFIG_SYS_TEXT_BASE		0x60000000
 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_TEXT_BASE + 0x200000)
 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x2000000)
 

commit 5c90ec81f3773565dae1abf9284f849d79cb9062
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 4 20:09:17 2018 +0800

    make.sh: add debug command to enable printf for firmware bootflow
    
    Change-Id: Iff523db0ecc26ca09d9a62e867031abfd85a3b42
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 6e9092cd7c..d866a46d91 100755
--- a/make.sh
+++ b/make.sh
@@ -251,6 +251,7 @@ sub_commands()
 			echo "    8. set CONFIG_BOOTDELAY=5"
 			echo "    9. armv7 start.S: print entry warning"
 			echo "   10. armv8 start.S: print entry warning"
+			echo "   11. firmware bootflow debug() -> printf()"
 			echo
 			echo "Enabled: "
 			grep '^CONFIG_ROCKCHIP_DEBUGGER=y' ${OUTDIR}/.config > /dev/null \
@@ -295,6 +296,16 @@ sub_commands()
 			sed -i '/save_boot_params_ret:/a\ldr x0, =CONFIG_DEBUG_UART_BASE\nmov x1, #100\nloop:\nmov x2, #0x55\nstr x2, [x0]\nsub x1, x1, #1\ncmp x1, #0\nb.ne loop\ndsb sy' \
 			./arch/arm/cpu/armv8/start.S
 			echo "DEBUG [10]: armv8 start.S entry warning 'UUUU...'"
+		elif [ "${opt}" = '11' ]; then
+			sed -i 's/\<debug\>/printf/g' common/fdt_support.c
+			sed -i 's/\<debug\>/printf/g' common/image-fdt.c
+			sed -i 's/\<debug\>/printf/g' common/image.c
+			sed -i 's/\<debug\>/printf/g' arch/arm/lib/bootm.c
+			sed -i 's/\<debug\>/printf/g' common/bootm.c
+			sed -i 's/\<debug\>/printf/g' common/image.c
+			sed -i 's/\<debug\>/printf/g' common/image-android.c
+			sed -i 's/\<debug\>/printf/g' common/android_bootloader.c
+			echo "DEBUG [11]: firmware bootflow debug() -> printf()"
 		fi
 		echo
 		exit 0

commit 0163ec82065570b5c06584c562cbdeff10e4d29d
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Dec 5 20:05:19 2018 +0800

    video/drm: lvds: add bandgap handling
    
    Fixes: 3c5714f034cf ("video/drm: lvds: add bandgap handling")
    Change-Id: Ieb88e8cae77bf8c2f8c874ed39c1e9d76b832716
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index 70c9244159..721d39454d 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -302,6 +302,8 @@ static void px30_output_lvds(struct display_state *state)
 	struct rockchip_lvds_device *lvds = conn_state->private;
 	u32 val = 0;
 
+	lvds_writel(lvds, MIPIPHY_REG0, 0x01);
+
 	/* enable lvds mode */
 	val = PX30_LVDS_PHY_MODE(1) | PX30_DPHY_FORCERXMODE(1);
 	/* config lvds_format */

commit d8100d74a0eed48ed1bef17f6497acaea4b35ecf
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Tue Nov 6 14:29:57 2018 +0800

    lib: optee_client: remove widevine ta from uboot
    
    Change-Id: I9e6e4d6743d0a8e9787c2b01e535d920d4f93008
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/include/optee_include/c11fe8ac-b997-48cf-a28de2a55e5240ef.h b/include/optee_include/c11fe8ac-b997-48cf-a28de2a55e5240ef.h
deleted file mode 100644
index 4b2aeff231..0000000000
--- a/include/optee_include/c11fe8ac-b997-48cf-a28de2a55e5240ef.h
+++ /dev/null
@@ -1,12 +0,0 @@
-/*
- * (C) Copyright 2018 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-#ifndef _WIDEVINE_TA_H_
-#define _WIDEVINE_TA_H_
-
-extern const uint8_t widevine_keybox_data[];
-extern const uint32_t widevine_keybox_size;
-
-#endif /* _WIDEVINE_TA_H_ */
diff --git a/lib/optee_clientApi/Makefile b/lib/optee_clientApi/Makefile
index aab27e389b..e039115f98 100644
--- a/lib/optee_clientApi/Makefile
+++ b/lib/optee_clientApi/Makefile
@@ -12,11 +12,6 @@ obj-y += tee_smc-arm64.o
 
 ifdef CONFIG_OPTEE_V1
 obj-y += OpteeClientRkFs.o
-
-obj-y += c11fe8ac-b997-48cf-a28de2a55e5240ef.o
-lib/optee_clientApi/c11fe8ac-b997-48cf-a28de2a55e5240ef.o: lib/optee_clientApi/c11fe8ac-b997-48cf-a28de2a55e5240ef.c
-lib/optee_clientApi/c11fe8ac-b997-48cf-a28de2a55e5240ef.c: lib/optee_clientApi/c11fe8ac-b997-48cf-a28de2a55e5240ef.ta
-	$(srctree)/lib/optee_clientApi/tabinary_to_cfile.py --prefix widevine_keybox --TA $< --out $@
 endif
 
 ifdef CONFIG_OPTEE_V2
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index e9b0cb9ab0..e41388b185 100755
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -100,23 +100,17 @@ uint32_t rk_send_keybox_to_ta(uint8_t *filename, uint32_t filename_size,
 						    TEEC_MEMREF_TEMP_INOUT,
 						    TEEC_NONE);
 
-	printf("check: does keybox exised in secure storage...\n");
+	printf("write keybox to secure storage\n");
 	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					122,
+					6,
 					&TeecOperation,
 					&ErrorOrigin);
 	if (TeecResult != TEEC_SUCCESS) {
-		printf("no keybox in secure storage, write keybox to secure storage\n");
-		TeecResult = TEEC_InvokeCommand(&TeecSession,
-						121,
-						&TeecOperation,
-						&ErrorOrigin);
-		if (TeecResult != TEEC_SUCCESS) {
-			printf("send data to TA failed with code 0x%x\n", TeecResult);
-		} else {
-			printf("send data to TA success with code 0x%x\n", TeecResult);
-		}
+		printf("send data to TA failed with code 0x%x\n", TeecResult);
+	} else {
+		printf("send data to TA success with code 0x%x\n", TeecResult);
 	}
+
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
 	TEEC_ReleaseSharedMemory(&SharedMem2);
@@ -131,22 +125,19 @@ int write_keybox_to_secure_storage(uint8_t *uboot_data, uint32_t len)
 {
 	uint32_t key_size;
 	uint32_t data_size;
-	uint32_t object_id;
+	TEEC_Result ret;
 	int rc = 0;
 
 	if (memcmp(uboot_data, WIDEVINE_TAG, 4) == 0) {
 		/* widevine keybox */
-		TEEC_Result ret;
-
-		TEEC_UUID widevine_uuid = { 0xc11fe8ac, 0xb997, 0x48cf,
-			{ 0xa2, 0x8d, 0xe2, 0xa5, 0x5e, 0x52, 0x40, 0xef} };
-		object_id = 101;
+		TEEC_UUID widevine_uuid = { 0x1b484ea5, 0x698b, 0x4142,
+			{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
 
 		key_size = *(uboot_data + 4);
 		data_size = *(uboot_data + 8);
 
-		ret = rk_send_keybox_to_ta((uint8_t *)&object_id,
-					   sizeof(uint32_t),
+		ret = rk_send_keybox_to_ta((uint8_t *)"widevine_keybox",
+					   sizeof("widevine_keybox"),
 					   widevine_uuid,
 					   uboot_data + 12,
 					   key_size,
diff --git a/lib/optee_clientApi/OpteeClientRPC.c b/lib/optee_clientApi/OpteeClientRPC.c
index f8d0df396e..fe92eaa270 100644
--- a/lib/optee_clientApi/OpteeClientRPC.c
+++ b/lib/optee_clientApi/OpteeClientRPC.c
@@ -15,7 +15,6 @@
 #include <optee_include/teesmc_optee.h>
 #include <optee_include/tee_rpc_types.h>
 #include <optee_include/tee_rpc.h>
-#include <optee_include/c11fe8ac-b997-48cf-a28de2a55e5240ef.h>
 #ifdef CONFIG_OPTEE_V1
 #include <optee_include/OpteeClientRkFs.h>
 #endif
@@ -113,8 +112,8 @@ TEEC_Result OpteeRpcCmdLoadTa(t_teesmc32_arg *TeeSmc32Arg)
 		ImageData = (void *)0;
 		ImageSize = 0;
 	} else {
-		ImageData = (void *)widevine_keybox_data;
-		ImageSize = widevine_keybox_size;
+		ImageData = (void *)0;
+		ImageSize = 0;
 	}
 
 	if (Status != 0) {
diff --git a/lib/optee_clientApi/c11fe8ac-b997-48cf-a28de2a55e5240ef.ta b/lib/optee_clientApi/c11fe8ac-b997-48cf-a28de2a55e5240ef.ta
deleted file mode 100644
index 2d466e3223..0000000000
Binary files a/lib/optee_clientApi/c11fe8ac-b997-48cf-a28de2a55e5240ef.ta and /dev/null differ

commit 509ea9e58d3f246635af36847a88bf9fae4446a2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 4 17:05:55 2018 +0800

    arm: rockchip: select SKIP_RELOCATE_UBOOT if !ARM64
    
    According to kernel: Documentation/arm64/booting.txt introduce:
    
    NOTE: versions prior to v4.6 cannot make use of memory below the
    physical offset of the Image so it is recommended that the Image be
    placed as close as possible to the start of system RAM.
    
    We shall remain ARM64 relocation to avoid ram overlap between uboot
    and kernel.
    
    fixes: 9841897eb91367ee57c09032b41a2c07bc7b7642
    (arm: rockchip: select SKIP_RELOCATE_UBOOT)
    
    Change-Id: I6b092e979c9f365ca9d9b9dbb8b4e7afbf864d6e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 99aa72b583..b8cd54762d 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1132,7 +1132,7 @@ config ARCH_ROCKCHIP
 	select CMD_ROCKUSB if USB_GADGET_DOWNLOAD
 	select ENABLE_ARM_SOC_BOOT0_HOOK
 	select SYS_NS16550
-	select SKIP_RELOCATE_UBOOT
+	select SKIP_RELOCATE_UBOOT if !ARM64
 	imply CMD_FASTBOOT
 	imply FASTBOOT
 	imply FAT_WRITE

commit c3385ddc3fce4b56bc7016e9cdd558e7cf4b30c2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Nov 30 17:41:27 2018 +0800

    configs: evb-rk3308: remove unused modules
    
    This patch decreases u-boot.bin size: 594Kb => 542Kb
    
    Change-Id: I292362fca6be8fd308eae864483c6890df61ad42
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index fcc1e167eb..362f98f361 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -4,6 +4,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3308=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 # CONFIG_USING_KERNEL_DTB is not set
 CONFIG_TARGET_EVB_RK3308=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3308-evb"
@@ -16,12 +17,27 @@ CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 # CONFIG_FASTBOOT is not set
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_CONSOLE is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
 CONFIG_CMD_GPT=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
+# CONFIG_CMD_ECHO is not set
+# CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_MISC is not set
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_REGMAP=y
@@ -29,8 +45,6 @@ CONFIG_SYSCON=y
 CONFIG_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
-CONFIG_DM_KEY=y
-CONFIG_ADC_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PHY=y
@@ -44,8 +58,8 @@ CONFIG_RAM=y
 CONFIG_DM_RESET=y
 CONFIG_RKFLASH=y
 CONFIG_RKNANDC_NAND=y
-CONFIG_RKSFC_NOR=y
 CONFIG_RKSFC_NAND=y
+CONFIG_RKSFC_NOR=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF0C0000
 CONFIG_DEBUG_UART_CLOCK=24000000
@@ -64,4 +78,4 @@ CONFIG_SPL_TINY_MEMSET=y
 CONFIG_LZ4=y
 CONFIG_LZO=y
 CONFIG_ERRNO_STR=y
-CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+# CONFIG_EFI_LOADER is not set

commit 7ae458341f511c20594e1acbd1a5e52a8b6253cf
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 4 14:59:17 2018 +0800

    power: charge animation: print reason of exit charge
    
    This is helpful to know charge state.
    
    Change-Id: I96401b67220a0ebb782c5da1f8001b3bf4682c06
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 8e556ec242..a4854aa401 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -351,7 +351,7 @@ static int charge_animation_show(struct udevice *dev)
 
 	/* If there is preboot command, exit */
 	if (preboot) {
-		debug("exit charge, due to preboot: %s\n", preboot);
+		printf("Exit charge: due to preboot cmd '%s'\n", preboot);
 		return 0;
 	}
 
@@ -360,7 +360,7 @@ static int charge_animation_show(struct udevice *dev)
 	boot_mode = rockchip_get_boot_mode();
 	if ((boot_mode != BOOT_MODE_CHARGING) &&
 	    (boot_mode != BOOT_MODE_UNDEFINE)) {
-		debug("exit charge, due to boot mode: %d\n", boot_mode);
+		printf("Exit charge: due to boot mode\n");
 		return 0;
 	}
 #endif
@@ -368,7 +368,7 @@ static int charge_animation_show(struct udevice *dev)
 	/* Not charger online, exit */
 	charging = fuel_gauge_get_chrg_online(fg);
 	if (charging <= 0) {
-		debug("exit charge, due to charger offline\n");
+		printf("Exit charge: due to charger offline\n");
 		return 0;
 	}
 
@@ -380,7 +380,7 @@ static int charge_animation_show(struct udevice *dev)
 
 	/* Not enable U-Boot charge, exit */
 	if (!pdata->uboot_charge) {
-		debug("exit charge, due to not enable uboot charge\n");
+		printf("Exit charge: due to not enable uboot charge\n");
 		return 0;
 	}
 

commit d08ee362540d3f208537002f7cc7ce66bbb8d037
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 4 14:42:46 2018 +0800

    configs: rk3308-aarch32: enable rk8xx pwrkey
    
    Change-Id: I2161a6640ce6e11e32f37002af993838e30506f3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3308-aarch32_defconfig b/configs/rk3308-aarch32_defconfig
index 7b7d2412b6..70c10d9eb0 100644
--- a/configs/rk3308-aarch32_defconfig
+++ b/configs/rk3308-aarch32_defconfig
@@ -32,6 +32,7 @@ CONFIG_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y
+CONFIG_RK8XX_PWRKEY=y
 CONFIG_ADC_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y

commit 0b4bf9764efc2ef2696b06d70c3cb9bbe8331ab8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Aug 14 20:05:16 2018 +0800

    rockchip: rk3308: enable IRQs
    
    Change-Id: I1d708bd89bbe9e2ad7a5213cc7bed22a0c2655a5
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 357ffe9379..2a2991b4e2 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -214,6 +214,7 @@ config ROCKCHIP_RK3308
 	select ARM64 if !ARM64_BOOT_AARCH32
 	select DEBUG_UART_BOARD_INIT
 	select ARM_SMCCC
+	select GICV2
 	help
 	  The Rockchip RK3308 is a ARM-based Soc which embeded with quad
 	  Cortex-A35 and highly integrated audio interfaces.
diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h
index 587b32c62d..d380b3abc5 100644
--- a/include/configs/rk3308_common.h
+++ b/include/configs/rk3308_common.h
@@ -25,8 +25,8 @@
 
 #define COUNTER_FREQUENCY		24000000
 
-#define GICD_BASE			0xff131000
-#define GICC_BASE			0xff132000
+#define GICD_BASE			0xff581000
+#define GICC_BASE			0xff582000
 
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */
 
diff --git a/include/irq-platform.h b/include/irq-platform.h
index 878de36ac9..230a16737e 100644
--- a/include/irq-platform.h
+++ b/include/irq-platform.h
@@ -153,6 +153,25 @@
 #define GPIO_BANK_NUM			4
 #define GPIO_BANK_PINS			32
 
+#elif defined(CONFIG_ROCKCHIP_RK3308)
+#define GPIO0_PHYS			0xff220000
+#define GPIO1_PHYS			0xff230000
+#define GPIO2_PHYS			0xff240000
+#define GPIO3_PHYS			0xff250000
+#define GPIO4_PHYS			0xff260000
+
+#define IRQ_TIMER1			58	/* ch0 ns timer1 */
+#define IRQ_GPIO0			72
+#define IRQ_GPIO1			73
+#define IRQ_GPIO2			74
+#define IRQ_GPIO3			75
+#define IRQ_GPIO4			76
+
+#define GIC_IRQS_NR			(5 * 32)
+#define GPIO_IRQS_NR			(5 * 32)
+
+#define GPIO_BANK_NUM			5
+#define GPIO_BANK_PINS			32
 #else
 "Missing define RIQ relative things"
 #endif
diff --git a/include/rk_timer_irq.h b/include/rk_timer_irq.h
index d44277bacf..c9a968d39c 100644
--- a/include/rk_timer_irq.h
+++ b/include/rk_timer_irq.h
@@ -41,6 +41,9 @@
 #elif defined(CONFIG_ROCKCHIP_RK3399)
 #define TIMER_BASE		(0xFF850000 + 0x20)	/* TIMER 1 */
 #define TIMER_IRQ		IRQ_TIMER1
+#elif defined(CONFIG_ROCKCHIP_RK3308)
+#define TIMER_BASE		(0xFF1a0000 + 0x20)	/* TIMER 1 */
+#define TIMER_IRQ		IRQ_TIMER1
 #elif defined(CONFIG_ROCKCHIP_PX30)
 /*
  * Use timer0 and never change, because timer0 will be used in charge animation

commit f6fe8359aa8a64f9c0e1a1ff7b239084ddb08734
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Dec 3 19:36:09 2018 +0800

    arm: crt0: don't relocate vector if CONFIG_SKIP_RELOCATE_UBOOT is enabled
    
    This patch fixes interrupt issue when uboot disable relocation.
    
    fixes: 645a442d90864589c105abad1f8e582f59724d08
    (common: support skip U-Boot relocation)
    
    Change-Id: I58928744625a10beb9cd1b60cbcefdbb521149d5
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S
index 2a6414169b..8936439f18 100644
--- a/arch/arm/lib/crt0.S
+++ b/arch/arm/lib/crt0.S
@@ -114,12 +114,23 @@ ENTRY(_main)
 	b	relocate_code
 #endif
 here:
+
 /*
- * now relocate vectors
+ * The "relocate_vectors" is in section: .text.relocate_vectors, if we don't
+ * compile "bl	relocate_vectors", there seems something wrong about sections
+ * layout(U-Boot code section is quite large, I don't find root cause now),
+ * so let's just skip it.
  */
+#ifdef CONFIG_SKIP_RELOCATE_UBOOT
+	b	c_runtime
+#endif
 
+/*
+ * now relocate vectors
+ */
 	bl	relocate_vectors
 
+c_runtime:
 /* Set up final (full) environment */
 
 	bl	c_runtime_cpu_setup	/* we still call old routine here */

commit ac374906e810aa5d24ba599975f654f25ec5a204
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Dec 3 09:40:41 2018 +0800

    rockchip: smccc: add secure region read/write interface
    
    Adding more qoute for APIs.
    
    Change-Id: I976cfe3193c242c439195efd9d774a31af003f3c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h b/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
index e16ef93eb9..6d389580d6 100644
--- a/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
+++ b/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
@@ -60,23 +60,88 @@ typedef enum {
 	SHARE_PAGE_TYPE_MAX,
 } share_page_type_t;
 
-/* Stand PSCI system suspend */
-int psci_system_suspend(unsigned long unused);
-
-/* Rockchip SMC Calls */
+/*
+ * sip_smc_set_suspend_mode() - Set U-Boot system suspend state before trap to trust.
+ *
+ * see kernel-4.4: drivers/soc/rockchip/rockchip_pm_config.c
+ */
 int sip_smc_set_suspend_mode(unsigned long ctrl,
 			     unsigned long config1,
 			     unsigned long config2);
 
+/*
+ * sip_smc_dram() - Set dram configure for trust.
+ *
+ * see: ./drivers/ram/rockchip/rockchip_dmc.c
+ */
 struct arm_smccc_res sip_smc_dram(unsigned long arg0,
 				  unsigned long arg1,
 				  unsigned long arg2);
 
+/*
+ * sip_smc_request_share_mem() - Request share memory from trust.
+ *
+ * @page_num:	page numbers
+ * @page_type:  page type, see: share_page_type_t
+ *
+ * @return arm_smccc_res structure, res.a0 equals 0 on success(res.a1 contains
+ *  share memory base address), otherwise failed.
+ */
 struct arm_smccc_res sip_smc_request_share_mem(unsigned long page_num,
 					       share_page_type_t page_type);
 
+/*
+ * sip_smc_secure_reg_read() - Read secure info(ddr/register...) from trust.
+ *
+ * @addr_phy:	address to read
+ *
+ * @return arm_smccc_res structure, res.a0 equals 0 on success(res.a1 contains
+ *  valid data), otherwise failed.
+ */
+struct arm_smccc_res sip_smc_secure_reg_read(unsigned long addr_phy);
+
+/*
+ * sip_smc_secure_reg_write() - Write data to trust secure info(ddr/register...).
+ *
+ * @addr_phy:	address to write
+ * @val:	value to write
+ *
+ * @return 0 on success, otherwise failed.
+ */
+int sip_smc_secure_reg_write(unsigned long addr_phy, unsigned long val);
+
+/*
+ * sip_smc_set_sip_version() - Set sip version to trust.
+ *
+ * @return 0 on success, otherwise failed.
+ */
 int sip_smc_set_sip_version(unsigned long version);
+
+/*
+ * sip_smc_get_sip_version() - Get sip version to trust.
+ *
+ * @return arm_smccc_res structure, res.a0 equals 0 on success(res.a1 contains
+ *  sip version), otherwise failed.
+ */
 struct arm_smccc_res sip_smc_get_sip_version(void);
+
+/*
+ * psci_cpu_on() - Standard ARM PSCI cpu on call.
+ *
+ * @cpuid:		cpu id
+ * @entry_point:	boot entry point
+ *
+ * @return 0 on success, otherwise failed.
+ */
 int psci_cpu_on(unsigned long cpuid, unsigned long entry_point);
 
+/*
+ * psci_system_suspend() - Standard ARM PSCI system suspend call.
+ *
+ * @unused:		unused now, always 0 recommend
+ *
+ * @return 0 on success, otherwise failed.
+ */
+int psci_system_suspend(unsigned long unused);
+
 #endif
diff --git a/arch/arm/mach-rockchip/rockchip_smccc.c b/arch/arm/mach-rockchip/rockchip_smccc.c
index 3af89fc57a..a39e5b2830 100644
--- a/arch/arm/mach-rockchip/rockchip_smccc.c
+++ b/arch/arm/mach-rockchip/rockchip_smccc.c
@@ -84,6 +84,22 @@ error:
 	return res;
 }
 
+struct arm_smccc_res sip_smc_secure_reg_read(unsigned long addr_phy)
+{
+	struct arm_smccc_res res;
+
+	res = __invoke_sip_fn_smc(SIP_ACCESS_REG, 0, addr_phy, SECURE_REG_RD);
+	return res;
+}
+
+int sip_smc_secure_reg_write(unsigned long addr_phy, unsigned long val)
+{
+	struct arm_smccc_res res;
+
+	res = __invoke_sip_fn_smc(SIP_ACCESS_REG, val, addr_phy, SECURE_REG_WR);
+	return res.a0;
+}
+
 struct arm_smccc_res sip_smc_get_sip_version(void)
 {
 	return __invoke_sip_fn_smc(SIP_SIP_VERSION, 0, 0, 0);

commit 71ebef54f7c9adc13483176c64513a17ebb679eb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Dec 3 16:45:44 2018 +0800

    dm: regulator: update regulator init voltage message
    
    Change-Id: Ic24328579e765d011840e383618b771a31370d9c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/regulator-uclass.c b/drivers/power/regulator/regulator-uclass.c
index 5b1f574e86..a883ea0f1a 100644
--- a/drivers/power/regulator/regulator-uclass.c
+++ b/drivers/power/regulator/regulator-uclass.c
@@ -284,7 +284,7 @@ int regulator_autoset(struct udevice *dev)
 	if (uc_pdata->init_uV > 0) {
 		ret = regulator_set_value(dev, uc_pdata->init_uV);
 		if (!ret)
-			printf("regulator(%s) init %d uV\n",
+			printf("%s init %d uV\n",
 			       dev->name, uc_pdata->init_uV);
 	}
 

commit d51c16c5a422b3104156a013368a6bca9f4e0443
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Nov 30 17:41:42 2018 +0800

    fuel gauge: Kconfig: remove default y for CW201x
    
    Change-Id: I1e2af720ad00f95f37b6e663db7a25feb51e40ce
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/Kconfig b/drivers/power/fuel_gauge/Kconfig
index c61b911884..e55dbc4690 100644
--- a/drivers/power/fuel_gauge/Kconfig
+++ b/drivers/power/fuel_gauge/Kconfig
@@ -7,7 +7,6 @@ config DM_FUEL_GAUGE
 config POWER_FG_CW201X
 	bool "CW201X Fuel gauge support"
 	depends on DM_FUEL_GAUGE
-	default y
 	help
 	  This adds support for CW201X fuel gauge support.
 

commit 16a92a426ee3d8bcd4aba3ee039c6e94031d7fbd
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Wed Sep 5 11:19:18 2018 +0800

    rockchip dmc: add rockchip dmc code
    
    This dmc code is prepare for ddr test tool to scanning ddr freq,
    normal firmware no need to enable it.
    Current version only support PX30/RK3326 and RK3328/RK3228H,
    CONFIG_ROCKCHIP_DMC=y to enable it
    
    Change-Id: I25360846bb5af74eb82bdc6e64bdaa2d55ab0f64
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rockchip_dmc.h b/arch/arm/include/asm/arch-rockchip/rockchip_dmc.h
new file mode 100644
index 0000000000..555998e6b7
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/rockchip_dmc.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef __ROCKCHIP_DMC_H_
+#define __ROCKCHIP_DMC_H_
+#include <dm.h>
+
+int rockchip_ddrclk_sip_set_rate_v2(unsigned long drate);
+unsigned long rockchip_ddrclk_sip_recalc_rate_v2(void);
+unsigned long rockchip_ddrclk_sip_round_rate_v2(unsigned long rate);
+int rockchip_dmcfreq_probe(struct udevice *dev);
+
+#endif
diff --git a/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h b/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
index 0167f3c4df..e16ef93eb9 100644
--- a/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
+++ b/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
@@ -24,6 +24,16 @@
 #define SIP_REMOTECTL_CFG		0x8200000b
 #define PSCI_SIP_VPU_RESET		0x8200000c
 
+#define ROCKCHIP_SIP_CONFIG_DRAM_INIT		0x00
+#define ROCKCHIP_SIP_CONFIG_DRAM_SET_RATE	0x01
+#define ROCKCHIP_SIP_CONFIG_DRAM_ROUND_RATE	0x02
+#define ROCKCHIP_SIP_CONFIG_DRAM_SET_AT_SR	0x03
+#define ROCKCHIP_SIP_CONFIG_DRAM_GET_BW		0x04
+#define ROCKCHIP_SIP_CONFIG_DRAM_GET_RATE	0x05
+#define ROCKCHIP_SIP_CONFIG_DRAM_CLR_IRQ	0x06
+#define ROCKCHIP_SIP_CONFIG_DRAM_SET_PARAM	0x07
+#define ROCKCHIP_SIP_CONFIG_DRAM_GET_VERSION	0x08
+
 /* Rockchip Sip version */
 #define SIP_IMPLEMENT_V1                (1)
 #define SIP_IMPLEMENT_V2                (2)
diff --git a/drivers/ram/Kconfig b/drivers/ram/Kconfig
index d26c590d9f..2cf8adefb6 100644
--- a/drivers/ram/Kconfig
+++ b/drivers/ram/Kconfig
@@ -46,3 +46,5 @@ config RAMDISK_READONLY
         depends on DM_RAMDISK
         help
           This enables the read only ramdisk support.
+
+source "drivers/ram/rockchip/Kconfig"
diff --git a/drivers/ram/rockchip/Kconfig b/drivers/ram/rockchip/Kconfig
new file mode 100644
index 0000000000..ab21b34daf
--- /dev/null
+++ b/drivers/ram/rockchip/Kconfig
@@ -0,0 +1,4 @@
+config ROCKCHIP_DMC
+	bool "ROCKCHIP DMC"
+	help
+	  This enable dram devfreq driver.
diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index 9b12db19d4..44c95981ac 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -17,3 +17,6 @@ obj-$(CONFIG_ROCKCHIP_PX30) += rockchip_sdram.o
 obj-$(CONFIG_ROCKCHIP_RK1808) = rockchip_sdram.o
 obj-$(CONFIG_ROCKCHIP_RK3036) = rockchip_sdram.o
 obj-$(CONFIG_ROCKCHIP_RK3308) = rockchip_sdram.o
+ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
+obj-$(CONFIG_ROCKCHIP_DMC) += rockchip_dmc.o
+endif
diff --git a/drivers/ram/rockchip/rockchip_dmc.c b/drivers/ram/rockchip/rockchip_dmc.c
new file mode 100644
index 0000000000..37aaa6eab5
--- /dev/null
+++ b/drivers/ram/rockchip/rockchip_dmc.c
@@ -0,0 +1,888 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ */
+#include <asm/arch/rockchip_smccc.h>
+#include <asm/arch/rockchip_dmc.h>
+#include <asm/io.h>
+#include <asm/psci.h>
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <dm/of_access.h>
+#include <dt-structs.h>
+#include <linux/arm-smccc.h>
+#include <linux/err.h>
+#include <linux/errno.h>
+#include <ram.h>
+#include <regmap.h>
+
+#define DTS_PAR_OFFSET		(4096)
+
+struct share_params {
+	u32 hz;
+	u32 lcdc_type;
+	u32 vop;
+	u32 vop_dclk_mode;
+	u32 sr_idle_en;
+	u32 addr_mcu_el3;
+	/*
+	 * 1: need to wait flag1
+	 * 0: never wait flag1
+	 */
+	u32 wait_flag1;
+	/*
+	 * 1: need to wait flag1
+	 * 0: never wait flag1
+	 */
+	u32 wait_flag0;
+	u32 complt_hwirq;
+	/* if need, add parameter after */
+};
+
+static struct share_params *ddr_psci_param;
+
+/* hope this define can adapt all future platfor */
+static const char * const rk3328_dts_timing[] = {
+	"ddr3_speed_bin",
+	"ddr4_speed_bin",
+	"pd_idle",
+	"sr_idle",
+	"sr_mc_gate_idle",
+	"srpd_lite_idle",
+	"standby_idle",
+
+	"auto_pd_dis_freq",
+	"auto_sr_dis_freq",
+	"ddr3_dll_dis_freq",
+	"ddr4_dll_dis_freq",
+	"phy_dll_dis_freq",
+
+	"ddr3_odt_dis_freq",
+	"phy_ddr3_odt_dis_freq",
+	"ddr3_drv",
+	"ddr3_odt",
+	"phy_ddr3_ca_drv",
+	"phy_ddr3_ck_drv",
+	"phy_ddr3_dq_drv",
+	"phy_ddr3_odt",
+
+	"lpddr3_odt_dis_freq",
+	"phy_lpddr3_odt_dis_freq",
+	"lpddr3_drv",
+	"lpddr3_odt",
+	"phy_lpddr3_ca_drv",
+	"phy_lpddr3_ck_drv",
+	"phy_lpddr3_dq_drv",
+	"phy_lpddr3_odt",
+
+	"lpddr4_odt_dis_freq",
+	"phy_lpddr4_odt_dis_freq",
+	"lpddr4_drv",
+	"lpddr4_dq_odt",
+	"lpddr4_ca_odt",
+	"phy_lpddr4_ca_drv",
+	"phy_lpddr4_ck_cs_drv",
+	"phy_lpddr4_dq_drv",
+	"phy_lpddr4_odt",
+
+	"ddr4_odt_dis_freq",
+	"phy_ddr4_odt_dis_freq",
+	"ddr4_drv",
+	"ddr4_odt",
+	"phy_ddr4_ca_drv",
+	"phy_ddr4_ck_drv",
+	"phy_ddr4_dq_drv",
+	"phy_ddr4_odt",
+};
+
+static const char * const px30_dts_timing[] = {
+	"ddr2_speed_bin",
+	"ddr3_speed_bin",
+	"ddr4_speed_bin",
+	"pd_idle",
+	"sr_idle",
+	"sr_mc_gate_idle",
+	"srpd_lite_idle",
+	"standby_idle",
+
+	"auto_pd_dis_freq",
+	"auto_sr_dis_freq",
+	"ddr2_dll_dis_freq",
+	"ddr3_dll_dis_freq",
+	"ddr4_dll_dis_freq",
+	"phy_dll_dis_freq",
+
+	"ddr2_odt_dis_freq",
+	"phy_ddr2_odt_dis_freq",
+	"ddr2_drv",
+	"ddr2_odt",
+	"phy_ddr2_ca_drv",
+	"phy_ddr2_ck_drv",
+	"phy_ddr2_dq_drv",
+	"phy_ddr2_odt",
+
+	"ddr3_odt_dis_freq",
+	"phy_ddr3_odt_dis_freq",
+	"ddr3_drv",
+	"ddr3_odt",
+	"phy_ddr3_ca_drv",
+	"phy_ddr3_ck_drv",
+	"phy_ddr3_dq_drv",
+	"phy_ddr3_odt",
+
+	"phy_lpddr2_odt_dis_freq",
+	"lpddr2_drv",
+	"phy_lpddr2_ca_drv",
+	"phy_lpddr2_ck_drv",
+	"phy_lpddr2_dq_drv",
+	"phy_lpddr2_odt",
+
+	"lpddr3_odt_dis_freq",
+	"phy_lpddr3_odt_dis_freq",
+	"lpddr3_drv",
+	"lpddr3_odt",
+	"phy_lpddr3_ca_drv",
+	"phy_lpddr3_ck_drv",
+	"phy_lpddr3_dq_drv",
+	"phy_lpddr3_odt",
+
+	"lpddr4_odt_dis_freq",
+	"phy_lpddr4_odt_dis_freq",
+	"lpddr4_drv",
+	"lpddr4_dq_odt",
+	"lpddr4_ca_odt",
+	"phy_lpddr4_ca_drv",
+	"phy_lpddr4_ck_cs_drv",
+	"phy_lpddr4_dq_drv",
+	"phy_lpddr4_odt",
+
+	"ddr4_odt_dis_freq",
+	"phy_ddr4_odt_dis_freq",
+	"ddr4_drv",
+	"ddr4_odt",
+	"phy_ddr4_ca_drv",
+	"phy_ddr4_ck_drv",
+	"phy_ddr4_dq_drv",
+	"phy_ddr4_odt",
+};
+
+static const char * const rk3328_dts_ca_timing[] = {
+	"ddr3a1_ddr4a9_de-skew",
+	"ddr3a0_ddr4a10_de-skew",
+	"ddr3a3_ddr4a6_de-skew",
+	"ddr3a2_ddr4a4_de-skew",
+	"ddr3a5_ddr4a8_de-skew",
+	"ddr3a4_ddr4a5_de-skew",
+	"ddr3a7_ddr4a11_de-skew",
+	"ddr3a6_ddr4a7_de-skew",
+	"ddr3a9_ddr4a0_de-skew",
+	"ddr3a8_ddr4a13_de-skew",
+	"ddr3a11_ddr4a3_de-skew",
+	"ddr3a10_ddr4cs0_de-skew",
+	"ddr3a13_ddr4a2_de-skew",
+	"ddr3a12_ddr4ba1_de-skew",
+	"ddr3a15_ddr4odt0_de-skew",
+	"ddr3a14_ddr4a1_de-skew",
+	"ddr3ba1_ddr4a15_de-skew",
+	"ddr3ba0_ddr4bg0_de-skew",
+	"ddr3ras_ddr4cke_de-skew",
+	"ddr3ba2_ddr4ba0_de-skew",
+	"ddr3we_ddr4bg1_de-skew",
+	"ddr3cas_ddr4a12_de-skew",
+	"ddr3ckn_ddr4ckn_de-skew",
+	"ddr3ckp_ddr4ckp_de-skew",
+	"ddr3cke_ddr4a16_de-skew",
+	"ddr3odt0_ddr4a14_de-skew",
+	"ddr3cs0_ddr4act_de-skew",
+	"ddr3reset_ddr4reset_de-skew",
+	"ddr3cs1_ddr4cs1_de-skew",
+	"ddr3odt1_ddr4odt1_de-skew",
+};
+
+static const char * const rk3328_dts_cs0_timing[] = {
+	"cs0_dm0_rx_de-skew",
+	"cs0_dm0_tx_de-skew",
+	"cs0_dq0_rx_de-skew",
+	"cs0_dq0_tx_de-skew",
+	"cs0_dq1_rx_de-skew",
+	"cs0_dq1_tx_de-skew",
+	"cs0_dq2_rx_de-skew",
+	"cs0_dq2_tx_de-skew",
+	"cs0_dq3_rx_de-skew",
+	"cs0_dq3_tx_de-skew",
+	"cs0_dq4_rx_de-skew",
+	"cs0_dq4_tx_de-skew",
+	"cs0_dq5_rx_de-skew",
+	"cs0_dq5_tx_de-skew",
+	"cs0_dq6_rx_de-skew",
+	"cs0_dq6_tx_de-skew",
+	"cs0_dq7_rx_de-skew",
+	"cs0_dq7_tx_de-skew",
+	"cs0_dqs0_rx_de-skew",
+	"cs0_dqs0p_tx_de-skew",
+	"cs0_dqs0n_tx_de-skew",
+
+	"cs0_dm1_rx_de-skew",
+	"cs0_dm1_tx_de-skew",
+	"cs0_dq8_rx_de-skew",
+	"cs0_dq8_tx_de-skew",
+	"cs0_dq9_rx_de-skew",
+	"cs0_dq9_tx_de-skew",
+	"cs0_dq10_rx_de-skew",
+	"cs0_dq10_tx_de-skew",
+	"cs0_dq11_rx_de-skew",
+	"cs0_dq11_tx_de-skew",
+	"cs0_dq12_rx_de-skew",
+	"cs0_dq12_tx_de-skew",
+	"cs0_dq13_rx_de-skew",
+	"cs0_dq13_tx_de-skew",
+	"cs0_dq14_rx_de-skew",
+	"cs0_dq14_tx_de-skew",
+	"cs0_dq15_rx_de-skew",
+	"cs0_dq15_tx_de-skew",
+	"cs0_dqs1_rx_de-skew",
+	"cs0_dqs1p_tx_de-skew",
+	"cs0_dqs1n_tx_de-skew",
+
+	"cs0_dm2_rx_de-skew",
+	"cs0_dm2_tx_de-skew",
+	"cs0_dq16_rx_de-skew",
+	"cs0_dq16_tx_de-skew",
+	"cs0_dq17_rx_de-skew",
+	"cs0_dq17_tx_de-skew",
+	"cs0_dq18_rx_de-skew",
+	"cs0_dq18_tx_de-skew",
+	"cs0_dq19_rx_de-skew",
+	"cs0_dq19_tx_de-skew",
+	"cs0_dq20_rx_de-skew",
+	"cs0_dq20_tx_de-skew",
+	"cs0_dq21_rx_de-skew",
+	"cs0_dq21_tx_de-skew",
+	"cs0_dq22_rx_de-skew",
+	"cs0_dq22_tx_de-skew",
+	"cs0_dq23_rx_de-skew",
+	"cs0_dq23_tx_de-skew",
+	"cs0_dqs2_rx_de-skew",
+	"cs0_dqs2p_tx_de-skew",
+	"cs0_dqs2n_tx_de-skew",
+
+	"cs0_dm3_rx_de-skew",
+	"cs0_dm3_tx_de-skew",
+	"cs0_dq24_rx_de-skew",
+	"cs0_dq24_tx_de-skew",
+	"cs0_dq25_rx_de-skew",
+	"cs0_dq25_tx_de-skew",
+	"cs0_dq26_rx_de-skew",
+	"cs0_dq26_tx_de-skew",
+	"cs0_dq27_rx_de-skew",
+	"cs0_dq27_tx_de-skew",
+	"cs0_dq28_rx_de-skew",
+	"cs0_dq28_tx_de-skew",
+	"cs0_dq29_rx_de-skew",
+	"cs0_dq29_tx_de-skew",
+	"cs0_dq30_rx_de-skew",
+	"cs0_dq30_tx_de-skew",
+	"cs0_dq31_rx_de-skew",
+	"cs0_dq31_tx_de-skew",
+	"cs0_dqs3_rx_de-skew",
+	"cs0_dqs3p_tx_de-skew",
+	"cs0_dqs3n_tx_de-skew",
+};
+
+static const char * const rk3328_dts_cs1_timing[] = {
+	"cs1_dm0_rx_de-skew",
+	"cs1_dm0_tx_de-skew",
+	"cs1_dq0_rx_de-skew",
+	"cs1_dq0_tx_de-skew",
+	"cs1_dq1_rx_de-skew",
+	"cs1_dq1_tx_de-skew",
+	"cs1_dq2_rx_de-skew",
+	"cs1_dq2_tx_de-skew",
+	"cs1_dq3_rx_de-skew",
+	"cs1_dq3_tx_de-skew",
+	"cs1_dq4_rx_de-skew",
+	"cs1_dq4_tx_de-skew",
+	"cs1_dq5_rx_de-skew",
+	"cs1_dq5_tx_de-skew",
+	"cs1_dq6_rx_de-skew",
+	"cs1_dq6_tx_de-skew",
+	"cs1_dq7_rx_de-skew",
+	"cs1_dq7_tx_de-skew",
+	"cs1_dqs0_rx_de-skew",
+	"cs1_dqs0p_tx_de-skew",
+	"cs1_dqs0n_tx_de-skew",
+
+	"cs1_dm1_rx_de-skew",
+	"cs1_dm1_tx_de-skew",
+	"cs1_dq8_rx_de-skew",
+	"cs1_dq8_tx_de-skew",
+	"cs1_dq9_rx_de-skew",
+	"cs1_dq9_tx_de-skew",
+	"cs1_dq10_rx_de-skew",
+	"cs1_dq10_tx_de-skew",
+	"cs1_dq11_rx_de-skew",
+	"cs1_dq11_tx_de-skew",
+	"cs1_dq12_rx_de-skew",
+	"cs1_dq12_tx_de-skew",
+	"cs1_dq13_rx_de-skew",
+	"cs1_dq13_tx_de-skew",
+	"cs1_dq14_rx_de-skew",
+	"cs1_dq14_tx_de-skew",
+	"cs1_dq15_rx_de-skew",
+	"cs1_dq15_tx_de-skew",
+	"cs1_dqs1_rx_de-skew",
+	"cs1_dqs1p_tx_de-skew",
+	"cs1_dqs1n_tx_de-skew",
+
+	"cs1_dm2_rx_de-skew",
+	"cs1_dm2_tx_de-skew",
+	"cs1_dq16_rx_de-skew",
+	"cs1_dq16_tx_de-skew",
+	"cs1_dq17_rx_de-skew",
+	"cs1_dq17_tx_de-skew",
+	"cs1_dq18_rx_de-skew",
+	"cs1_dq18_tx_de-skew",
+	"cs1_dq19_rx_de-skew",
+	"cs1_dq19_tx_de-skew",
+	"cs1_dq20_rx_de-skew",
+	"cs1_dq20_tx_de-skew",
+	"cs1_dq21_rx_de-skew",
+	"cs1_dq21_tx_de-skew",
+	"cs1_dq22_rx_de-skew",
+	"cs1_dq22_tx_de-skew",
+	"cs1_dq23_rx_de-skew",
+	"cs1_dq23_tx_de-skew",
+	"cs1_dqs2_rx_de-skew",
+	"cs1_dqs2p_tx_de-skew",
+	"cs1_dqs2n_tx_de-skew",
+
+	"cs1_dm3_rx_de-skew",
+	"cs1_dm3_tx_de-skew",
+	"cs1_dq24_rx_de-skew",
+	"cs1_dq24_tx_de-skew",
+	"cs1_dq25_rx_de-skew",
+	"cs1_dq25_tx_de-skew",
+	"cs1_dq26_rx_de-skew",
+	"cs1_dq26_tx_de-skew",
+	"cs1_dq27_rx_de-skew",
+	"cs1_dq27_tx_de-skew",
+	"cs1_dq28_rx_de-skew",
+	"cs1_dq28_tx_de-skew",
+	"cs1_dq29_rx_de-skew",
+	"cs1_dq29_tx_de-skew",
+	"cs1_dq30_rx_de-skew",
+	"cs1_dq30_tx_de-skew",
+	"cs1_dq31_rx_de-skew",
+	"cs1_dq31_tx_de-skew",
+	"cs1_dqs3_rx_de-skew",
+	"cs1_dqs3p_tx_de-skew",
+	"cs1_dqs3n_tx_de-skew",
+};
+
+struct rk3328_ddr_dts_config_timing {
+	unsigned int ddr3_speed_bin;
+	unsigned int ddr4_speed_bin;
+	unsigned int pd_idle;
+	unsigned int sr_idle;
+	unsigned int sr_mc_gate_idle;
+	unsigned int srpd_lite_idle;
+	unsigned int standby_idle;
+
+	unsigned int auto_pd_dis_freq;
+	unsigned int auto_sr_dis_freq;
+	/* for ddr3 only */
+	unsigned int ddr3_dll_dis_freq;
+	/* for ddr4 only */
+	unsigned int ddr4_dll_dis_freq;
+	unsigned int phy_dll_dis_freq;
+
+	unsigned int ddr3_odt_dis_freq;
+	unsigned int phy_ddr3_odt_dis_freq;
+	unsigned int ddr3_drv;
+	unsigned int ddr3_odt;
+	unsigned int phy_ddr3_ca_drv;
+	unsigned int phy_ddr3_ck_drv;
+	unsigned int phy_ddr3_dq_drv;
+	unsigned int phy_ddr3_odt;
+
+	unsigned int lpddr3_odt_dis_freq;
+	unsigned int phy_lpddr3_odt_dis_freq;
+	unsigned int lpddr3_drv;
+	unsigned int lpddr3_odt;
+	unsigned int phy_lpddr3_ca_drv;
+	unsigned int phy_lpddr3_ck_drv;
+	unsigned int phy_lpddr3_dq_drv;
+	unsigned int phy_lpddr3_odt;
+
+	unsigned int lpddr4_odt_dis_freq;
+	unsigned int phy_lpddr4_odt_dis_freq;
+	unsigned int lpddr4_drv;
+	unsigned int lpddr4_dq_odt;
+	unsigned int lpddr4_ca_odt;
+	unsigned int phy_lpddr4_ca_drv;
+	unsigned int phy_lpddr4_ck_cs_drv;
+	unsigned int phy_lpddr4_dq_drv;
+	unsigned int phy_lpddr4_odt;
+
+	unsigned int ddr4_odt_dis_freq;
+	unsigned int phy_ddr4_odt_dis_freq;
+	unsigned int ddr4_drv;
+	unsigned int ddr4_odt;
+	unsigned int phy_ddr4_ca_drv;
+	unsigned int phy_ddr4_ck_drv;
+	unsigned int phy_ddr4_dq_drv;
+	unsigned int phy_ddr4_odt;
+
+	unsigned int ca_skew[15];
+	unsigned int cs0_skew[44];
+	unsigned int cs1_skew[44];
+
+	unsigned int available;
+};
+
+struct px30_ddr_dts_config_timing {
+	unsigned int ddr2_speed_bin;
+	unsigned int ddr3_speed_bin;
+	unsigned int ddr4_speed_bin;
+	unsigned int pd_idle;
+	unsigned int sr_idle;
+	unsigned int sr_mc_gate_idle;
+	unsigned int srpd_lite_idle;
+	unsigned int standby_idle;
+
+	unsigned int auto_pd_dis_freq;
+	unsigned int auto_sr_dis_freq;
+	/* for ddr2 only */
+	unsigned int ddr2_dll_dis_freq;
+	/* for ddr3 only */
+	unsigned int ddr3_dll_dis_freq;
+	/* for ddr4 only */
+	unsigned int ddr4_dll_dis_freq;
+	unsigned int phy_dll_dis_freq;
+
+	unsigned int ddr2_odt_dis_freq;
+	unsigned int phy_ddr2_odt_dis_freq;
+	unsigned int ddr2_drv;
+	unsigned int ddr2_odt;
+	unsigned int phy_ddr2_ca_drv;
+	unsigned int phy_ddr2_ck_drv;
+	unsigned int phy_ddr2_dq_drv;
+	unsigned int phy_ddr2_odt;
+
+	unsigned int ddr3_odt_dis_freq;
+	unsigned int phy_ddr3_odt_dis_freq;
+	unsigned int ddr3_drv;
+	unsigned int ddr3_odt;
+	unsigned int phy_ddr3_ca_drv;
+	unsigned int phy_ddr3_ck_drv;
+	unsigned int phy_ddr3_dq_drv;
+	unsigned int phy_ddr3_odt;
+
+	unsigned int phy_lpddr2_odt_dis_freq;
+	unsigned int lpddr2_drv;
+	unsigned int phy_lpddr2_ca_drv;
+	unsigned int phy_lpddr2_ck_drv;
+	unsigned int phy_lpddr2_dq_drv;
+	unsigned int phy_lpddr2_odt;
+
+	unsigned int lpddr3_odt_dis_freq;
+	unsigned int phy_lpddr3_odt_dis_freq;
+	unsigned int lpddr3_drv;
+	unsigned int lpddr3_odt;
+	unsigned int phy_lpddr3_ca_drv;
+	unsigned int phy_lpddr3_ck_drv;
+	unsigned int phy_lpddr3_dq_drv;
+	unsigned int phy_lpddr3_odt;
+
+	unsigned int lpddr4_odt_dis_freq;
+	unsigned int phy_lpddr4_odt_dis_freq;
+	unsigned int lpddr4_drv;
+	unsigned int lpddr4_dq_odt;
+	unsigned int lpddr4_ca_odt;
+	unsigned int phy_lpddr4_ca_drv;
+	unsigned int phy_lpddr4_ck_cs_drv;
+	unsigned int phy_lpddr4_dq_drv;
+	unsigned int phy_lpddr4_odt;
+
+	unsigned int ddr4_odt_dis_freq;
+	unsigned int phy_ddr4_odt_dis_freq;
+	unsigned int ddr4_drv;
+	unsigned int ddr4_odt;
+	unsigned int phy_ddr4_ca_drv;
+	unsigned int phy_ddr4_ck_drv;
+	unsigned int phy_ddr4_dq_drv;
+	unsigned int phy_ddr4_odt;
+
+	unsigned int ca_skew[15];
+	unsigned int cs0_skew[44];
+	unsigned int cs1_skew[44];
+
+	unsigned int available;
+};
+
+struct rk3328_ddr_de_skew_setting {
+	unsigned int ca_de_skew[30];
+	unsigned int cs0_de_skew[84];
+	unsigned int cs1_de_skew[84];
+};
+
+static void
+rk3328_de_skew_setting_2_register(struct rk3328_ddr_de_skew_setting *de_skew,
+				  struct rk3328_ddr_dts_config_timing *tim)
+{
+	u32 n;
+	u32 offset;
+	u32 shift;
+
+	memset_io(tim->ca_skew, 0, sizeof(tim->ca_skew));
+	memset_io(tim->cs0_skew, 0, sizeof(tim->cs0_skew));
+	memset_io(tim->cs1_skew, 0, sizeof(tim->cs1_skew));
+
+	/* CA de-skew */
+	for (n = 0; n < ARRAY_SIZE(de_skew->ca_de_skew); n++) {
+		offset = n / 2;
+		shift = n % 2;
+		/* 0 => 4; 1 => 0 */
+		shift = (shift == 0) ? 4 : 0;
+		tim->ca_skew[offset] &= ~(0xf << shift);
+		tim->ca_skew[offset] |= (de_skew->ca_de_skew[n] << shift);
+	}
+
+	/* CS0 data de-skew */
+	for (n = 0; n < ARRAY_SIZE(de_skew->cs0_de_skew); n++) {
+		offset = ((n / 21) * 11) + ((n % 21) / 2);
+		shift = ((n % 21) % 2);
+		if ((n % 21) == 20)
+			shift = 0;
+		else
+			/* 0 => 4; 1 => 0 */
+			shift = (shift == 0) ? 4 : 0;
+		tim->cs0_skew[offset] &= ~(0xf << shift);
+		tim->cs0_skew[offset] |= (de_skew->cs0_de_skew[n] << shift);
+	}
+
+	/* CS1 data de-skew */
+	for (n = 0; n < ARRAY_SIZE(de_skew->cs1_de_skew); n++) {
+		offset = ((n / 21) * 11) + ((n % 21) / 2);
+		shift = ((n % 21) % 2);
+		if ((n % 21) == 20)
+			shift = 0;
+		else
+			/* 0 => 4; 1 => 0 */
+			shift = (shift == 0) ? 4 : 0;
+		tim->cs1_skew[offset] &= ~(0xf << shift);
+		tim->cs1_skew[offset] |= (de_skew->cs1_de_skew[n] << shift);
+	}
+}
+
+static void px30_de_skew_set_2_reg(struct rk3328_ddr_de_skew_setting *de_skew,
+				   struct px30_ddr_dts_config_timing *tim)
+{
+	u32 n;
+	u32 offset;
+	u32 shift;
+
+	memset_io(tim->ca_skew, 0, sizeof(tim->ca_skew));
+	memset_io(tim->cs0_skew, 0, sizeof(tim->cs0_skew));
+	memset_io(tim->cs1_skew, 0, sizeof(tim->cs1_skew));
+
+	/* CA de-skew */
+	for (n = 0; n < ARRAY_SIZE(de_skew->ca_de_skew); n++) {
+		offset = n / 2;
+		shift = n % 2;
+		/* 0 => 4; 1 => 0 */
+		shift = (shift == 0) ? 4 : 0;
+		tim->ca_skew[offset] &= ~(0xf << shift);
+		tim->ca_skew[offset] |= (de_skew->ca_de_skew[n] << shift);
+	}
+
+	/* CS0 data de-skew */
+	for (n = 0; n < ARRAY_SIZE(de_skew->cs0_de_skew); n++) {
+		offset = ((n / 21) * 11) + ((n % 21) / 2);
+		shift = ((n % 21) % 2);
+		if ((n % 21) == 20)
+			shift = 0;
+		else
+			/* 0 => 4; 1 => 0 */
+			shift = (shift == 0) ? 4 : 0;
+		tim->cs0_skew[offset] &= ~(0xf << shift);
+		tim->cs0_skew[offset] |= (de_skew->cs0_de_skew[n] << shift);
+	}
+
+	/* CS1 data de-skew */
+	for (n = 0; n < ARRAY_SIZE(de_skew->cs1_de_skew); n++) {
+		offset = ((n / 21) * 11) + ((n % 21) / 2);
+		shift = ((n % 21) % 2);
+		if ((n % 21) == 20)
+			shift = 0;
+		else
+			/* 0 => 4; 1 => 0 */
+			shift = (shift == 0) ? 4 : 0;
+		tim->cs1_skew[offset] &= ~(0xf << shift);
+		tim->cs1_skew[offset] |= (de_skew->cs1_de_skew[n] << shift);
+	}
+}
+
+static void of_get_rk3328_timings(struct udevice *dev, uint32_t *timing)
+{
+	struct device_node *np_tim;
+	u32 *p;
+	struct rk3328_ddr_dts_config_timing *dts_timing;
+	struct rk3328_ddr_de_skew_setting *de_skew;
+	int ret = 0;
+	u32 i;
+
+	dts_timing =
+		(struct rk3328_ddr_dts_config_timing *)(timing +
+							DTS_PAR_OFFSET / 4);
+
+	np_tim = of_parse_phandle(ofnode_to_np(dev_ofnode(dev)),
+				  "ddr_timing", 0);
+	if (!np_tim) {
+		ret = -EINVAL;
+		goto end;
+	}
+	de_skew = malloc(sizeof(*de_skew));
+	if (!de_skew) {
+		ret = -ENOMEM;
+		goto end;
+	}
+	p = (u32 *)dts_timing;
+	for (i = 0; i < ARRAY_SIZE(rk3328_dts_timing); i++)
+		ret |= ofnode_read_u32(np_to_ofnode(np_tim),
+				       rk3328_dts_timing[i], p + i);
+
+	p = (u32 *)de_skew->ca_de_skew;
+	for (i = 0; i < ARRAY_SIZE(rk3328_dts_ca_timing); i++)
+		ret |= ofnode_read_u32(np_to_ofnode(np_tim),
+				       rk3328_dts_ca_timing[i], p + i);
+	p = (u32 *)de_skew->cs0_de_skew;
+	for (i = 0; i < ARRAY_SIZE(rk3328_dts_cs0_timing); i++)
+		ret |= ofnode_read_u32(np_to_ofnode(np_tim),
+				       rk3328_dts_cs0_timing[i], p + i);
+	p = (u32 *)de_skew->cs1_de_skew;
+	for (i = 0; i < ARRAY_SIZE(rk3328_dts_cs1_timing); i++)
+		ret |= ofnode_read_u32(np_to_ofnode(np_tim),
+				       rk3328_dts_cs1_timing[i], p + i);
+
+	if (!ret)
+		rk3328_de_skew_setting_2_register(de_skew, dts_timing);
+	free(de_skew);
+end:
+	if (!ret) {
+		dts_timing->available = 1;
+	} else {
+		dts_timing->available = 0;
+		printf("of_get_ddr_timings: fail\n");
+	}
+}
+
+static void of_get_px30_timings(struct udevice *dev, uint32_t *timing)
+{
+	struct device_node *np_tim;
+	u32 *p;
+	struct px30_ddr_dts_config_timing *dts_timing;
+	struct rk3328_ddr_de_skew_setting *de_skew;
+	int ret = 0;
+	u32 i;
+
+	dts_timing =
+		(struct px30_ddr_dts_config_timing *)(timing +
+							DTS_PAR_OFFSET / 4);
+
+	np_tim = of_parse_phandle(ofnode_to_np(dev_ofnode(dev)),
+				  "ddr_timing", 0);
+	if (!np_tim) {
+		ret = -EINVAL;
+		goto end;
+	}
+	de_skew = malloc(sizeof(*de_skew));
+	if (!de_skew) {
+		ret = -ENOMEM;
+		goto end;
+	}
+	p = (u32 *)dts_timing;
+	for (i = 0; i < ARRAY_SIZE(px30_dts_timing); i++)
+		ret |= ofnode_read_u32(np_to_ofnode(np_tim), px30_dts_timing[i],
+					p + i);
+	p = (u32 *)de_skew->ca_de_skew;
+	for (i = 0; i < ARRAY_SIZE(rk3328_dts_ca_timing); i++)
+		ret |= ofnode_read_u32(np_to_ofnode(np_tim),
+				       rk3328_dts_ca_timing[i], p + i);
+	p = (u32 *)de_skew->cs0_de_skew;
+	for (i = 0; i < ARRAY_SIZE(rk3328_dts_cs0_timing); i++)
+		ret |= ofnode_read_u32(np_to_ofnode(np_tim),
+				       rk3328_dts_cs0_timing[i], p + i);
+	p = (u32 *)de_skew->cs1_de_skew;
+	for (i = 0; i < ARRAY_SIZE(rk3328_dts_cs1_timing); i++)
+		ret |= ofnode_read_u32(np_to_ofnode(np_tim),
+				       rk3328_dts_cs1_timing[i], p + i);
+	if (!ret)
+		px30_de_skew_set_2_reg(de_skew, dts_timing);
+	free(de_skew);
+end:
+	if (!ret) {
+		dts_timing->available = 1;
+	} else {
+		dts_timing->available = 0;
+		printf("of_get_ddr_timings: fail\n");
+	}
+}
+
+static __maybe_unused int rk3328_devfreq_init(struct udevice *dev)
+{
+	struct arm_smccc_res res;
+	u32 size;
+
+	res = sip_smc_dram(0, 0,
+			   ROCKCHIP_SIP_CONFIG_DRAM_GET_VERSION);
+	printf("current ATF version 0x%lx!\n", res.a1);
+	if (res.a0 || res.a1 < 0x101) {
+		printf("trusted firmware need to update or is invalid!\n");
+		return -ENXIO;
+	}
+
+	printf("read tf version 0x%lx!\n", res.a1);
+
+	/*
+	 * first 4KB is used for interface parameters
+	 * after 4KB * N is dts parameters
+	 */
+	size = sizeof(struct rk3328_ddr_dts_config_timing);
+	res = sip_smc_request_share_mem(DIV_ROUND_UP(size, 4096) + 1,
+					SHARE_PAGE_TYPE_DDR);
+	if (res.a0 != 0) {
+		printf("no ATF memory for init\n");
+		return -ENOMEM;
+	}
+	ddr_psci_param = (struct share_params *)res.a1;
+	of_get_rk3328_timings(dev, (uint32_t *)ddr_psci_param);
+
+	flush_cache((unsigned long)ddr_psci_param,
+		    (DIV_ROUND_UP(size, 4096) + 1) * 0x1000);
+
+	res = sip_smc_dram(SHARE_PAGE_TYPE_DDR, 0,
+			   ROCKCHIP_SIP_CONFIG_DRAM_INIT);
+	if (res.a0) {
+		printf("rockchip_sip_config_dram_init error:%lx\n",
+		       res.a0);
+		return -ENOMEM;
+	}
+
+	return 0;
+}
+
+static __maybe_unused int px30_devfreq_init(struct udevice *dev)
+{
+	struct arm_smccc_res res;
+	u32 size;
+
+	res = sip_smc_dram(0, 0,
+			   ROCKCHIP_SIP_CONFIG_DRAM_GET_VERSION);
+	printf("current ATF version 0x%lx!\n", res.a1);
+	if (res.a0 || res.a1 < 0x103) {
+		printf("trusted firmware need to update or is invalid!\n");
+		return -ENXIO;
+	}
+
+	printf("read tf version 0x%lx!\n", res.a1);
+
+	/*
+	 * first 4KB is used for interface parameters
+	 * after 4KB * N is dts parameters
+	 */
+	size = sizeof(struct px30_ddr_dts_config_timing);
+	res = sip_smc_request_share_mem(DIV_ROUND_UP(size, 4096) + 1,
+					SHARE_PAGE_TYPE_DDR);
+	if (res.a0 != 0) {
+		printf("no ATF memory for init\n");
+		return -ENOMEM;
+	}
+
+	ddr_psci_param = (struct share_params *)res.a1;
+	of_get_px30_timings(dev, (uint32_t *)ddr_psci_param);
+
+	flush_cache((unsigned long)ddr_psci_param,
+		    (DIV_ROUND_UP(size, 4096) + 1) * 0x1000);
+	res = sip_smc_dram(SHARE_PAGE_TYPE_DDR, 0,
+			   ROCKCHIP_SIP_CONFIG_DRAM_INIT);
+	if (res.a0) {
+		printf("rockchip_sip_config_dram_init error:%lx\n",
+		       res.a0);
+		return -ENOMEM;
+	}
+
+	return 0;
+}
+
+int rockchip_ddrclk_sip_set_rate_v2(unsigned long drate)
+{
+	struct share_params *p;
+	struct arm_smccc_res res;
+
+	p = ddr_psci_param;
+
+	p->hz = drate;
+	p->lcdc_type = 0;
+	p->wait_flag1 = 0;
+	p->wait_flag0 = 0;
+	p->complt_hwirq = 105;
+
+	flush_cache((unsigned long)ddr_psci_param, sizeof(struct share_params));
+	res = sip_smc_dram(SHARE_PAGE_TYPE_DDR, 0,
+			   ROCKCHIP_SIP_CONFIG_DRAM_SET_RATE);
+
+	return res.a0;
+}
+
+unsigned long rockchip_ddrclk_sip_recalc_rate_v2(void)
+{
+	struct arm_smccc_res res;
+
+	res = sip_smc_dram(SHARE_PAGE_TYPE_DDR, 0,
+			   ROCKCHIP_SIP_CONFIG_DRAM_GET_RATE);
+	if (!res.a0)
+		return res.a1;
+	else
+		return 0;
+}
+
+unsigned long rockchip_ddrclk_sip_round_rate_v2(unsigned long rate)
+{
+	struct share_params *p;
+	struct arm_smccc_res res;
+
+	p = ddr_psci_param;
+
+	p->hz = rate;
+
+	flush_cache((unsigned long)ddr_psci_param, sizeof(struct share_params));
+
+	res = sip_smc_dram(SHARE_PAGE_TYPE_DDR, 0,
+			   ROCKCHIP_SIP_CONFIG_DRAM_ROUND_RATE);
+	if (!res.a0)
+		return res.a1;
+	else
+		return 0;
+}
+
+int rockchip_dmcfreq_probe(struct udevice *dev)
+{
+	int ret;
+
+#if defined(CONFIG_ROCKCHIP_PX30)
+	ret = px30_devfreq_init(dev);
+#elif defined(CONFIG_ROCKCHIP_RK3328)
+	ret = rk3328_devfreq_init(dev);
+#else
+	ret = -1;
+	printf("Unsupported chip type\n");
+#endif
+	if (ret)
+		return ret;
+
+	printf("dram freq:%ld Hz\n", rockchip_ddrclk_sip_recalc_rate_v2());
+
+	return 0;
+}
diff --git a/drivers/ram/rockchip/rockchip_sdram.c b/drivers/ram/rockchip/rockchip_sdram.c
index aa65623108..78e15eb142 100644
--- a/drivers/ram/rockchip/rockchip_sdram.c
+++ b/drivers/ram/rockchip/rockchip_sdram.c
@@ -12,6 +12,7 @@
 #include <asm/arch/grf_rk1808.h>
 #include <asm/arch/grf_rk3036.h>
 #include <asm/arch/grf_rk3308.h>
+#include <asm/arch/rockchip_dmc.h>
 #include <asm/arch/sdram_common.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -23,35 +24,47 @@ struct dram_info {
 
 static int dmc_probe(struct udevice *dev)
 {
+	int ret = 0;
 	struct dram_info *priv = dev_get_priv(dev);
 
+	if (!(gd->flags & GD_FLG_RELOC)) {
 #if defined(CONFIG_ROCKCHIP_RK3036)
-	struct rk3036_grf *grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+		struct rk3036_grf *grf =
+			syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 
-	priv->info.size = rockchip_sdram_size((phys_addr_t)&grf->os_reg[1]);
+		priv->info.size =
+			rockchip_sdram_size((phys_addr_t)&grf->os_reg[1]);
 #elif defined(CONFIG_ROCKCHIP_RK3308)
-	struct rk3308_grf *grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+		struct rk3308_grf *grf =
+			syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 
-	priv->info.size = rockchip_sdram_size((phys_addr_t)&grf->os_reg2);
+		priv->info.size =
+			rockchip_sdram_size((phys_addr_t)&grf->os_reg2);
 #elif defined(CONFIG_ROCKCHIP_PX30)
-	struct px30_pmugrf *pmugrf =
-		syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
+		struct px30_pmugrf *pmugrf =
+			syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
 
-	priv->info.size =
-		rockchip_sdram_size((phys_addr_t)&pmugrf->os_reg[2]);
+		priv->info.size =
+			rockchip_sdram_size((phys_addr_t)&pmugrf->os_reg[2]);
 #elif defined(CONFIG_ROCKCHIP_RK1808)
-	struct rk1808_pmugrf *pmugrf =
-		syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
+		struct rk1808_pmugrf *pmugrf =
+			syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
 
-	priv->info.size =
-		rockchip_sdram_size((phys_addr_t)&pmugrf->os_reg[2]);
+		priv->info.size =
+			rockchip_sdram_size((phys_addr_t)&pmugrf->os_reg[2]);
 #else
 #error chip error
 #endif
+		priv->info.base = CONFIG_SYS_SDRAM_BASE;
+	} else {
+#if defined(CONFIG_ROCKCHIP_PX30)
+#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_ROCKCHIP_DMC)
+		ret = rockchip_dmcfreq_probe(dev);
+#endif
+#endif
+	}
 
-	priv->info.base = CONFIG_SYS_SDRAM_BASE;
-
-	return 0;
+	return ret;
 }
 
 static int dmc_get_info(struct udevice *dev, struct ram_info *info)
diff --git a/drivers/ram/rockchip/sdram_rk3328.c b/drivers/ram/rockchip/sdram_rk3328.c
index 7782d6a690..1941e1c9e2 100644
--- a/drivers/ram/rockchip/sdram_rk3328.c
+++ b/drivers/ram/rockchip/sdram_rk3328.c
@@ -15,6 +15,7 @@
 #include <asm/arch/clock.h>
 #include <asm/arch/cru_rk3328.h>
 #include <asm/arch/grf_rk3328.h>
+#include <asm/arch/rockchip_dmc.h>
 #include <asm/arch/sdram_common.h>
 #include <asm/arch/sdram_rk3328.h>
 #include <asm/arch/uart.h>
@@ -981,17 +982,20 @@ static int rk3328_dmc_ofdata_to_platdata(struct udevice *dev)
 
 static int rk3328_dmc_probe(struct udevice *dev)
 {
+	int ret = 0;
 #ifdef CONFIG_TPL_BUILD
 	if (rk3328_dmc_init(dev))
 		return 0;
 #else
-	struct dram_info *priv = dev_get_priv(dev);
-
-	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	debug("%s: grf=%p\n", __func__, priv->grf);
-	priv->info.base = CONFIG_SYS_SDRAM_BASE;
-	priv->info.size = rockchip_sdram_size(
-				(phys_addr_t)&priv->grf->os_reg[2]);
+	struct dram_info *priv;
+
+	if (!(gd->flags & GD_FLG_RELOC)) {
+		priv = dev_get_priv(dev);
+		priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+		debug("%s: grf=%p\n", __func__, priv->grf);
+		priv->info.base = CONFIG_SYS_SDRAM_BASE;
+		priv->info.size =
+			rockchip_sdram_size((phys_addr_t)&priv->grf->os_reg[2]);
 #ifdef CONFIG_SPL_BUILD
 	struct ddr_param ddr_parem;
 
@@ -1000,8 +1004,13 @@ static int rk3328_dmc_probe(struct udevice *dev)
 	ddr_parem.para[1] = priv->info.size;
 	rockchip_setup_ddr_param(&ddr_parem);
 #endif
+	} else {
+#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_ROCKCHIP_DMC)
+		ret = rockchip_dmcfreq_probe(dev);
 #endif
-	return 0;
+	}
+#endif
+	return ret;
 }
 
 static int rk3328_dmc_get_info(struct udevice *dev, struct ram_info *info)

commit 94727c946fcad341c75edf65baf764de1481306a
Author: zain wang <wzz@rock-chips.com>
Date:   Fri Nov 30 16:52:27 2018 +0800

    rockchip: rk3326: enable lzo/lz4 compressed kernel image
    
    Change-Id: Ia86b0be60cebf55e53ddc3b33679104f216579a6
    Signed-off-by: zain wang <wzz@rock-chips.com>

diff --git a/configs/evb-rk3326_defconfig b/configs/evb-rk3326_defconfig
index b78fb4f43b..a13a5e2889 100644
--- a/configs/evb-rk3326_defconfig
+++ b/configs/evb-rk3326_defconfig
@@ -5,26 +5,25 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_PX30=y
 CONFIG_ROCKCHIP_RK3326=y
-CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
-CONFIG_SPL_STACK_R_ADDR=0x600000
 CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_TARGET_EVB_PX30=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
 CONFIG_DEFAULT_DEVICE_TREE="rk3326-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 CONFIG_FIT=y
-CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
-CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
@@ -78,7 +77,6 @@ CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF160000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
@@ -95,15 +93,15 @@ CONFIG_G_DNL_VENDOR_NUM=0x2207
 CONFIG_G_DNL_PRODUCT_NUM=0x330d
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
-CONFIG_DISPLAY_ROCKCHIP_MIPI=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
-CONFIG_DRM_ROCKCHIP_PANEL=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
+CONFIG_LZ4=y
+CONFIG_LZO=y
 CONFIG_ERRNO_STR=y
 CONFIG_OPTEE_CLIENT=y
 CONFIG_OPTEE_V2=y
diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index cb26415285..4b1c5457db 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -53,6 +53,7 @@
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x01f00000\0" \
 	"kernel_addr_r=0x02080000\0" \
+	"kernel_addr_c=0x03e80000\0" \
 	"ramdisk_addr_r=0x0a200000\0"
 
 #include <config_distro_bootcmd.h>

commit fafc46378e5842c5e3cf78c73775f2ae5a98dc10
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Tue Nov 6 19:06:51 2018 +0800

    rockchip: sdhci: print helpful message out explicitly
    
    Change-Id: If51e25ed7e1b321edd06eaa153894ec638a7963a
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index 592f31ec4f..4f0a8e7ab2 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -86,7 +86,7 @@ static void rk3399_emmc_phy_power_on(struct rockchip_emmc_phy *phy, u32 clock)
 	caldone = readl(&phy->emmcphy_status);
 	caldone = (caldone >> PHYCTRL_CALDONE_SHIFT) & PHYCTRL_CALDONE_MASK;
 	if (caldone != PHYCTRL_CALDONE_DONE) {
-		debug("%s: caldone timeout.\n", __func__);
+		printf("%s: caldone timeout.\n", __func__);
 		return;
 	}
 
@@ -115,7 +115,7 @@ static void rk3399_emmc_phy_power_on(struct rockchip_emmc_phy *phy, u32 clock)
 	} while (get_timer(start) < 50000);
 
 	if (dllrdy != PHYCTRL_DLLRDY_DONE)
-		debug("%s: dllrdy timeout.\n", __func__);
+		printf("%s: dllrdy timeout.\n", __func__);
 }
 
 static void rk3399_emmc_phy_power_off(struct rockchip_emmc_phy *phy)

commit 5727ee429586583c072e969f4209c0656e861880
Author: jon.lin <jon.lin@rock-chips.com>
Date:   Mon Nov 12 00:03:34 2018 -0800

    drivers: rkflash: dump ret when flash init failed
    
    1.dump flash id;
    2.dump ret.
    
    Change-Id: I850fdfadaa12cde62953a0e109e16510b66a8b5e
    Signed-off-by: jon.lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/rknandc_base.c b/drivers/rkflash/rknandc_base.c
index 30e0c680a9..c632897c23 100644
--- a/drivers/rkflash/rknandc_base.c
+++ b/drivers/rkflash/rknandc_base.c
@@ -98,6 +98,8 @@ static int rockchip_nand_probe(struct udevice *udev)
 					      nandc_flash_op.vendor_write);
 #endif
 		debug("%s probe success\n", __func__);
+	} else {
+		pr_err("ret %d\n", ret);
 	}
 
 	return ret;
diff --git a/drivers/rkflash/rksfc_base.c b/drivers/rkflash/rksfc_base.c
index d9075a3e74..a42fb09639 100644
--- a/drivers/rkflash/rksfc_base.c
+++ b/drivers/rkflash/rksfc_base.c
@@ -127,6 +127,8 @@ static int rockchip_rksfc_probe(struct udevice *udev)
 #endif
 			debug("%s probe success\n", __func__);
 			break;
+		} else {
+			pr_err("ret %d\n", ret);
 		}
 	}
 
diff --git a/drivers/rkflash/sfc_nand.c b/drivers/rkflash/sfc_nand.c
index 2ef7a2f21d..18f5a04d8d 100644
--- a/drivers/rkflash/sfc_nand.c
+++ b/drivers/rkflash/sfc_nand.c
@@ -654,7 +654,7 @@ u32 sfc_nand_init(void)
 	PRINT_SFC_I("...%s enter...\n", __func__);
 
 	sfc_nand_read_id_raw(id_byte);
-	PRINT_SFC_I("sfc_nand id: %x %x %x\n",
+	PRINT_SFC_E("sfc_nand id: %x %x %x\n",
 		    id_byte[0], id_byte[1], id_byte[2]);
 	if (id_byte[0] == 0xFF || id_byte[0] == 0x00)
 		return FTL_NO_FLASH;
diff --git a/drivers/rkflash/sfc_nor.c b/drivers/rkflash/sfc_nor.c
index db78567d78..74f20a5798 100644
--- a/drivers/rkflash/sfc_nor.c
+++ b/drivers/rkflash/sfc_nor.c
@@ -536,7 +536,7 @@ int snor_init(struct SFNOR_DEV *p_dev)
 
 	memset(p_dev, 0, sizeof(struct SFNOR_DEV));
 	snor_read_id(id_byte);
-	PRINT_SFC_I("sfc nor id: %x %x %x\n",
+	PRINT_SFC_E("sfc nor id: %x %x %x\n",
 		    id_byte[0], id_byte[1], id_byte[2]);
 	if (0xFF == id_byte[0] || 0x00 == id_byte[0]) {
 		err = SFC_ERROR;

commit 9841897eb91367ee57c09032b41a2c07bc7b7642
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 29 20:12:38 2018 +0800

    arm: rockchip: select SKIP_RELOCATE_UBOOT
    
    there is no necessary reason to do uboot relocation, and actually
    it brings trouble for our debug at some time, so skip it.
    
    Change-Id: I56567a6ff13c8431e7e1773652826692ec0e6c9e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 895346ab40..99aa72b583 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1132,6 +1132,7 @@ config ARCH_ROCKCHIP
 	select CMD_ROCKUSB if USB_GADGET_DOWNLOAD
 	select ENABLE_ARM_SOC_BOOT0_HOOK
 	select SYS_NS16550
+	select SKIP_RELOCATE_UBOOT
 	imply CMD_FASTBOOT
 	imply FASTBOOT
 	imply FAT_WRITE

commit 645a442d90864589c105abad1f8e582f59724d08
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 28 11:42:39 2018 +0800

    common: support skip U-Boot relocation
    
    Change-Id: I8640907204c82928c2fb07177835dc55a126aaf0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S
index c6a9c90828..2a6414169b 100644
--- a/arch/arm/lib/crt0.S
+++ b/arch/arm/lib/crt0.S
@@ -103,6 +103,7 @@ ENTRY(_main)
 	ldr	r9, [r9, #GD_BD]		/* r9 = gd->bd */
 	sub	r9, r9, #GD_SIZE		/* new GD is below bd */
 
+#ifndef CONFIG_SKIP_RELOCATE_UBOOT
 	adr	lr, here
 	ldr	r0, [r9, #GD_RELOC_OFF]		/* r0 = gd->reloc_off */
 	add	lr, lr, r0
@@ -111,6 +112,7 @@ ENTRY(_main)
 #endif
 	ldr	r0, [r9, #GD_RELOCADDR]		/* r0 = gd->relocaddr */
 	b	relocate_code
+#endif
 here:
 /*
  * now relocate vectors
diff --git a/arch/arm/lib/crt0_64.S b/arch/arm/lib/crt0_64.S
index bac5de4081..d34e49cc8a 100644
--- a/arch/arm/lib/crt0_64.S
+++ b/arch/arm/lib/crt0_64.S
@@ -98,6 +98,7 @@ ENTRY(_main)
 	bic	sp, x0, #0xf	/* 16-byte alignment for ABI compliance */
 	ldr	x18, [x18, #GD_NEW_GD]		/* x18 <- gd->new_gd */
 
+#ifndef CONFIG_SKIP_RELOCATE_UBOOT
 	adr	lr, relocation_return
 #if CONFIG_POSITION_INDEPENDENT
 	/* Add in link-vs-runtime offset */
@@ -111,6 +112,7 @@ ENTRY(_main)
 	add	lr, lr, x9	/* new return address after relocation */
 	ldr	x0, [x18, #GD_RELOCADDR]	/* x0 <- gd->relocaddr */
 	b	relocate_code
+#endif
 
 relocation_return:
 
diff --git a/common/Kconfig b/common/Kconfig
index 8856c7d520..980fb15643 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -609,6 +609,11 @@ config ANDROID_BOOT_IMAGE
 	  This enables support for booting images which use the Android
 	  image format header.
 
+config SKIP_RELOCATE_UBOOT
+	bool "Skip U-Boot relocation"
+	help
+	  This enable support for skipping U-Boot relocation.
+
 menu "Security support"
 
 config HASH
diff --git a/common/board_f.c b/common/board_f.c
index 8ce40bef74..888dc367ae 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -627,6 +627,7 @@ static int setup_reloc(void)
 		return 0;
 	}
 
+#ifndef CONFIG_SKIP_RELOCATE_UBOOT
 #ifdef CONFIG_SYS_TEXT_BASE
 #ifdef ARM
 	gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
@@ -639,6 +640,10 @@ static int setup_reloc(void)
 #else
 	gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
 #endif
+#endif
+
+#else
+	gd->reloc_off = 0;
 #endif
 	memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
 
diff --git a/common/board_r.c b/common/board_r.c
index 3885fd4c66..5f41768878 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -338,7 +338,15 @@ __weak int power_init_board(void)
 
 static int initr_announce(void)
 {
-	debug("Now running in RAM - U-Boot at: %08lx\n", gd->relocaddr);
+	ulong addr;
+
+#ifndef CONFIG_SKIP_RELOCATE_UBOOT
+	addr = gd->relocaddr;
+#else
+	addr = CONFIG_SYS_TEXT_BASE;
+#endif
+	debug("Now running in RAM - U-Boot at: %08lx\n", addr);
+
 	return 0;
 }
 

commit 3065df6c98538ebb0827d4abcb09f87fa9ee1928
Author: Shunqian Zheng <zhengsq@rock-chips.com>
Date:   Thu Nov 1 17:55:12 2018 +0800

    ARCH: arm: px30: clear force_jtag mode
    
    If SDMMC0_DET pull low gpio1_d4/d5 mux as sdmmc functions, otherwise
    they mux as JTAG or UART. But the jtag_force(grf_cpu_con1[7])
    is enable after reset.
    
    This clear force_jtag mode to enable uart4 when SDMMC0_DET is high.
    
    Change-Id: I2a2dadaad7dc2df8de3b43ff47d27d266caca62f
    Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c
index 308d3d5a1a..23dd428861 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -17,6 +17,7 @@
 #include <dt-bindings/clock/px30-cru.h>
 
 #define PMU_PWRDN_CON			0xff000018
+#define GRF_CPU_CON1			0xff140504
 
 #define VIDEO_PHY_BASE			0xff2e0000
 
@@ -65,6 +66,9 @@ int arch_cpu_init(void)
 	writel(0x82, VIDEO_PHY_BASE + 0x0000);
 	writel(0x05, VIDEO_PHY_BASE + 0x03ac);
 
+	/* Clear the force_jtag */
+	rk_clrreg(GRF_CPU_CON1, 1 << 7);
+
 	return 0;
 }
 

commit 98ebaf0e5b1c03e1e64aab11e8ac1d624af72171
Author: vicent.chi <vicent.chi@rock-chips.com>
Date:   Fri Nov 30 09:07:20 2018 +0800

    CRU: rv1108 add emmc clk get and set
    
    Change-Id: I8cbfda46d2f7e84f11dbcca844d00c87559d0aa0
    Signed-off-by: vicent.chi <vicent.chi@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rv1108.h b/arch/arm/include/asm/arch-rockchip/cru_rv1108.h
index 3e752ab62e..d220d0d3ff 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rv1108.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rv1108.h
@@ -181,6 +181,17 @@ enum {
 	MAC_CLK_DIV_MASK		= 0x1f,
 	MAC_CLK_DIV_SHIFT		= 0,
 
+	/* CLKSEL25_CON */
+	EMMC_PLL_SEL_SHIFT	= 12,
+	EMMC_PLL_SEL_MASK	= 3 << EMMC_PLL_SEL_SHIFT,
+	EMMC_PLL_SEL_DPLL	= 0,
+	EMMC_PLL_SEL_GPLL,
+	EMMC_PLL_SEL_OSC,
+
+	/* CLKSEL26_CON */
+	EMMC_CLK_DIV_SHIFT	= 8,
+	EMMC_CLK_DIV_MASK	= 0xff << EMMC_CLK_DIV_SHIFT,
+
 	/* CLKSEL27_CON */
 	SFC_PLL_SEL_SHIFT		= 7,
 	SFC_PLL_SEL_MASK		= 1 << SFC_PLL_SEL_SHIFT,
diff --git a/drivers/clk/rockchip/clk_rv1108.c b/drivers/clk/rockchip/clk_rv1108.c
index 62c239283f..5dcc2f723c 100644
--- a/drivers/clk/rockchip/clk_rv1108.c
+++ b/drivers/clk/rockchip/clk_rv1108.c
@@ -484,6 +484,53 @@ static ulong rv1108_i2c_set_clk(struct rv1108_cru *cru, ulong clk_id, uint hz)
 	return rv1108_i2c_get_clk(cru, clk_id);
 }
 
+static ulong rv1108_mmc_get_clk(struct rv1108_cru *cru)
+{
+	u32 div, con;
+	ulong mmc_clk;
+
+	con = readl(&cru->clksel_con[26]);
+	div = bitfield_extract(con, EMMC_CLK_DIV_SHIFT, 8);
+
+	con = readl(&cru->clksel_con[25]);
+
+	if ((con & EMMC_PLL_SEL_MASK) >> EMMC_PLL_SEL_SHIFT == EMMC_PLL_SEL_OSC)
+		mmc_clk = DIV_TO_RATE(OSC_HZ, div) / 2;
+	else
+		mmc_clk = DIV_TO_RATE(GPLL_HZ, div) / 2;
+
+	debug("%s div %d get_clk %ld\n", __func__, div, mmc_clk);
+	return mmc_clk;
+}
+
+static ulong rv1108_mmc_set_clk(struct rv1108_cru *cru, ulong rate)
+{
+	int div;
+	u32 pll_rate;
+
+	div = DIV_ROUND_UP(rkclk_pll_get_rate(cru, CLK_GENERAL), rate);
+
+	if (div < 127) {
+		debug("%s source gpll\n", __func__);
+		rk_clrsetreg(&cru->clksel_con[25], EMMC_PLL_SEL_MASK,
+			     (EMMC_PLL_SEL_GPLL << EMMC_PLL_SEL_SHIFT));
+		pll_rate = rkclk_pll_get_rate(cru, CLK_GENERAL);
+	} else {
+		debug("%s source 24m\n", __func__);
+		rk_clrsetreg(&cru->clksel_con[25], EMMC_PLL_SEL_MASK,
+			     (EMMC_PLL_SEL_OSC << EMMC_PLL_SEL_SHIFT));
+		pll_rate = OSC_HZ;
+	}
+
+	div = DIV_ROUND_UP(pll_rate / 2, rate);
+	rk_clrsetreg(&cru->clksel_con[26], EMMC_CLK_DIV_MASK,
+		     ((div - 1) << EMMC_CLK_DIV_SHIFT));
+
+	debug("%s set_rate %ld div %d\n", __func__,  rate, div);
+
+	return DIV_TO_RATE(pll_rate, div);
+}
+
 static ulong rv1108_clk_get_rate(struct clk *clk)
 {
 	struct rv1108_clk_priv *priv = dev_get_priv(clk->dev);
@@ -512,6 +559,10 @@ static ulong rv1108_clk_get_rate(struct clk *clk)
 	case SCLK_I2C2:
 	case SCLK_I2C3:
 		return rv1108_i2c_get_clk(priv->cru, clk->id);
+	case HCLK_EMMC:
+	case SCLK_EMMC:
+	case SCLK_EMMC_SAMPLE:
+		return rv1108_mmc_get_clk(priv->cru);
 	default:
 		return -ENOENT;
 	}
@@ -559,6 +610,10 @@ static ulong rv1108_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_I2C3:
 		new_rate = rv1108_i2c_set_clk(priv->cru, clk->id, rate);
 		break;
+	case HCLK_EMMC:
+	case SCLK_EMMC:
+		new_rate = rv1108_mmc_set_clk(priv->cru, rate);
+		break;
 	default:
 		return -ENOENT;
 	}

commit 57d18453974687b88bd0fbf2e2b4c0493463f3ef
Author: jon.lin <jon.lin@rock-chips.com>
Date:   Mon Nov 26 19:02:18 2018 -0800

    drivers: rkflash: support 4KB page size slc nand
    
    1.support 4KB page size slc nand;
    2.support idblock update when NANDC version is 9.
    
    Change-Id: I393bfae2b03e8293ed21acf901ffcc80d0ca0302
    Signed-off-by: jon.lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/flash.c b/drivers/rkflash/flash.c
index 974ad80493..50cee9ed68 100644
--- a/drivers/rkflash/flash.c
+++ b/drivers/rkflash/flash.c
@@ -83,6 +83,11 @@ static void flash_bch_sel(u8 bits)
 	nandc_bch_sel(bits);
 }
 
+static void flash_set_sector(u8 num)
+{
+	nand_para.sec_per_page = num;
+}
+
 static __maybe_unused void flash_timing_cfg(u32 ahb_khz)
 {
 	nandc_time_cfg(nand_para.access_freq);
@@ -429,6 +434,8 @@ static void nandc_flash_print_info(void)
 
 static void ftl_flash_init(void)
 {
+	u8 nandc_ver = nandc_get_version();
+
 	/* para init */
 	g_nand_phy_info.nand_type	= nand_para.cell;
 	g_nand_phy_info.die_num		= nand_para.die_per_chip;
@@ -451,6 +458,10 @@ static void ftl_flash_init(void)
 	g_nand_ops.erase_blk		= flash_erase_block;
 	g_nand_ops.prog_page		= flash_prog_page;
 	g_nand_ops.read_page		= flash_read_page;
+	if (nandc_ver == 9) {
+		g_nand_ops.bch_sel = flash_bch_sel;
+		g_nand_ops.set_sec_num = flash_set_sector;
+	}
 }
 
 u32 nandc_flash_init(void __iomem *nandc_addr)
@@ -487,6 +498,9 @@ u32 nandc_flash_init(void __iomem *nandc_addr)
 		if (id_byte[0][0] == 0x2C && id_byte[0][3] == 0xA6) {
 			nand_para.plane_per_die = 2;
 			nand_para.sec_per_page = 8;
+		} else if (id_byte[0][0] == 0x98 && id_byte[0][3] == 0x26) {
+			nand_para.blk_per_plane = 2048;
+			nand_para.sec_per_page = 8;
 		} else {
 			nand_para.plane_per_die = 2;
 			nand_para.blk_per_plane = 2048;
diff --git a/drivers/rkflash/flash_com.h b/drivers/rkflash/flash_com.h
index 65081efade..71055797c8 100644
--- a/drivers/rkflash/flash_com.h
+++ b/drivers/rkflash/flash_com.h
@@ -61,6 +61,8 @@ struct nand_ops {
 	u32 (*erase_blk)(u8 cs, u32 page_addr);
 	u32 (*prog_page)(u8 cs, u32 page_addr, u32 *data, u32 *spare);
 	u32 (*read_page)(u8 cs, u32 page_addr, u32 *data, u32 *spare);
+	void (*bch_sel)(u8 bits);
+	void (*set_sec_num)(u8 num);
 };
 
 #endif
diff --git a/drivers/rkflash/nandc.c b/drivers/rkflash/nandc.c
index f8efb695bd..c7b79298ea 100644
--- a/drivers/rkflash/nandc.c
+++ b/drivers/rkflash/nandc.c
@@ -26,6 +26,11 @@ static struct MASTER_INFO_T master;
 static u32 *g_master_temp_buf;
 #endif
 
+u8 nandc_get_version(void)
+{
+	return g_nandc_ver;
+}
+
 void nandc_init(void __iomem *nandc_addr)
 {
 	union FM_CTL_T ctl_reg;
diff --git a/drivers/rkflash/nandc.h b/drivers/rkflash/nandc.h
index 7043329691..e0eb40355c 100644
--- a/drivers/rkflash/nandc.h
+++ b/drivers/rkflash/nandc.h
@@ -344,5 +344,6 @@ void nandc_bch_sel(u8 bits);
 void nandc_read_not_case_busy_en(u8 en);
 void nandc_time_cfg(u32 ns);
 void nandc_clean_irq(void);
+u8 nandc_get_version(void);
 
 #endif
diff --git a/drivers/rkflash/rk_sftl_arm_v7.S b/drivers/rkflash/rk_sftl_arm_v7.S
index 80bc31450f..a46a097bf8 100644
--- a/drivers/rkflash/rk_sftl_arm_v7.S
+++ b/drivers/rkflash/rk_sftl_arm_v7.S
@@ -2,7 +2,7 @@
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:    GPL-2.0
- * date: 2018-10-29
+ * date: 2018-11-29
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -179,89 +179,90 @@ FtlSysBlkNumInit:
 	.fpu softvfp
 	.type	FtlConstantsInit, %function
 FtlConstantsInit:
-	@ args = 0, pretend = 0, frame = 0
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldrh	r1, [r0]
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r3, r0
+	ldrh	r4, [r0]
 	ldr	r2, .L25
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r7, r0
 	ldrh	r5, [r0, #2]
-	strh	r1, [r2]	@ movhi
-	ldr	r2, .L25+4
 	ldrh	r0, [r0, #4]
+	strh	r4, [r2]	@ movhi
+	ldr	r2, .L25+4
+	ldrh	r1, [r3, #6]
+	ldrh	r7, [r3, #14]
 	strh	r5, [r2]	@ movhi
 	ldr	r2, .L25+8
+	ldr	r6, .L25+12
+	cmp	r7, #4
 	strh	r0, [r2]	@ movhi
-	ldrh	r2, [r7, #14]
-	cmp	r2, #4
-	bne	.L16
-	ldrh	r2, [r7, #6]
-	ldr	r4, .L25+12
-	lsrs	r2, r2, #1
-	strh	r2, [r4]	@ movhi
-	movs	r4, #8
 	ldr	r2, .L25+16
-	strh	r4, [r2]	@ movhi
-.L16:
-	ldr	r4, .L25+20
-	movs	r2, #0
+	strh	r7, [r6]	@ movhi
+	ldr	r7, .L25+20
+	strh	r1, [r2]	@ movhi
+	itttt	eq
+	lsreq	r1, r1, #1
+	strheq	r1, [r2]	@ movhi
+	moveq	r1, #8
+	strheq	r1, [r6]	@ movhi
+	movs	r1, #0
 .L17:
-	strb	r2, [r2, r4]
-	adds	r2, r2, #1
-	cmp	r2, #32
+	strb	r1, [r1, r7]
+	adds	r1, r1, #1
+	cmp	r1, #32
 	bne	.L17
-	ldr	r2, .L25+24
-	cmp	r1, #1
-	mov	r4, #5
+	ldr	r1, .L25+24
+	cmp	r4, #1
+	mov	r7, #5
 	smulbb	r5, r5, r0
-	mov	r6, #0
-	strh	r4, [r2]	@ movhi
+	mov	ip, #0
+	str	r3, [sp, #4]
+	strh	r7, [r1]	@ movhi
 	it	eq
-	strheq	r1, [r2]	@ movhi
-	mov	r1, #640
-	ldr	r2, .L25+28
+	strheq	r4, [r1]	@ movhi
+	mov	r4, #640
+	ldr	r1, .L25+28
 	uxth	r5, r5
-	ldr	r4, .L25+32
-	strh	r1, [r2]	@ movhi
-	ldr	r2, .L25+36
-	strh	r6, [r4]	@ movhi
-	ldr	r6, .L25+40
-	strh	r5, [r2]	@ movhi
-	ldr	r2, .L25+12
+	ldr	r7, .L25+32
+	strh	r4, [r1]	@ movhi
 	ldrh	r4, [r2]
-	ldr	r2, .L25+44
+	ldr	r1, .L25+36
+	ldr	r2, .L25+40
+	strh	ip, [r7]	@ movhi
 	smulbb	r0, r0, r4
+	strh	r5, [r1]	@ movhi
+	ldr	r7, .L25+44
 	uxth	r0, r0
 	strh	r0, [r2]	@ movhi
 	bl	Ftl_log2
+	ldr	r3, [sp, #4]
 	ldr	r2, .L25+48
-	ldrh	r8, [r7, #12]
-	ldr	r3, .L25+52
+	ldrh	fp, [r6]
+	ldrh	r8, [r3, #12]
 	strh	r0, [r2]	@ movhi
-	ldr	r2, .L25+56
+	ldr	r2, .L25+52
+	mov	r0, fp
+	strh	r8, [r7]	@ movhi
 	smulbb	r1, r5, r8
-	strh	r8, [r3]	@ movhi
+	ldr	r6, .L25+56
 	strh	r8, [r2]	@ movhi
 	ldr	r2, .L25+60
 	strh	r1, [r2]	@ movhi
-	ldr	r2, .L25+16
-	ldrh	fp, [r2]
-	mov	r0, fp
 	bl	Ftl_log2
 	lsl	r2, fp, #9
 	ldr	r1, .L25+64
-	ldr	r3, .L25+68
+	ldr	r3, [sp, #4]
 	mov	r10, r0
 	uxth	r2, r2
 	strh	r0, [r6]	@ movhi
 	mov	r0, #5120
 	strh	r2, [r1]	@ movhi
 	lsrs	r2, r2, #8
-	ldr	r1, .L25+72
+	ldr	r1, .L25+68
 	strh	r2, [r1]	@ movhi
 	mul	r1, r8, fp
-	ldrh	r2, [r7, #20]
-	ldr	r7, .L25+52
+	ldrh	r2, [r3, #20]
+	ldr	r3, .L25+72
 	strh	r2, [r3]	@ movhi
 	mul	r3, r4, r5
 	ldr	r2, .L25+76
@@ -331,6 +332,8 @@ FtlConstantsInit:
 	ldr	r3, [r10]
 	adds	r3, r3, #3
 	str	r3, [r10]
+	add	sp, sp, #8
+	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
 .L26:
 	.align	2
@@ -338,22 +341,22 @@ FtlConstantsInit:
 	.word	.LANCHOR9
 	.word	.LANCHOR10
 	.word	.LANCHOR11
-	.word	.LANCHOR6
 	.word	.LANCHOR12
+	.word	.LANCHOR6
 	.word	.LANCHOR13
 	.word	.LANCHOR14
 	.word	.LANCHOR16
 	.word	.LANCHOR15
 	.word	.LANCHOR3
-	.word	.LANCHOR22
 	.word	.LANCHOR17
-	.word	.LANCHOR18
 	.word	.LANCHOR19
+	.word	.LANCHOR18
 	.word	.LANCHOR20
+	.word	.LANCHOR22
 	.word	.LANCHOR21
 	.word	.LANCHOR23
-	.word	.LANCHOR25
 	.word	.LANCHOR24
+	.word	.LANCHOR25
 	.word	.LANCHOR8
 	.word	.LANCHOR26
 	.word	.LANCHOR28
@@ -11073,15 +11076,15 @@ sftl_deinit:
 .L1468:
 	.word	.LANCHOR86
 	.size	sftl_deinit, .-sftl_deinit
-	.section	.text.FtlDiscard,"ax",%progbits
+	.section	.text.sftl_discard,"ax",%progbits
 	.align	1
-	.global	FtlDiscard
+	.global	sftl_discard
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlDiscard, %function
-FtlDiscard:
+	.type	sftl_discard, %function
+sftl_discard:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	ldr	r3, .L1485
@@ -11172,7 +11175,7 @@ FtlDiscard:
 	.word	.LANCHOR172
 	.word	.LANCHOR63
 	.word	.LANCHOR12
-	.size	FtlDiscard, .-FtlDiscard
+	.size	sftl_discard, .-sftl_discard
 	.section	.text.FtlVpcCheckAndModify,"ax",%progbits
 	.align	1
 	.global	FtlVpcCheckAndModify
@@ -11433,7 +11436,7 @@ FtlProgPages:
 	ldrh	r3, [r3]
 	cmp	r2, r3
 	bcc	.L1519
-	movw	r2, #955
+	movw	r2, #957
 	ldr	r1, .L1528+12
 	ldr	r0, .L1528+16
 	bl	printf
@@ -11470,7 +11473,7 @@ FtlProgPages:
 	ldrh	r3, [r3]
 	cmp	r2, r3
 	bcc	.L1514
-	movw	r2, #970
+	mov	r2, #972
 	ldr	r1, .L1528+12
 	ldr	r0, .L1528+16
 	bl	printf
@@ -13386,7 +13389,7 @@ FtlWrite:
 	ldrh	r3, [r3]
 	cmp	r2, r3
 	bcc	.L1775
-	movw	r2, #1011
+	movw	r2, #1013
 	ldr	r1, .L1822+44
 	ldr	r0, .L1822+48
 	bl	printf
@@ -13433,7 +13436,7 @@ FtlWrite:
 	ldrh	r3, [r3]
 	cmp	r2, r3
 	bcc	.L1780
-	movw	r2, #1044
+	movw	r2, #1046
 	ldr	r1, .L1822+44
 	ldr	r0, .L1822+48
 	bl	printf
@@ -13454,7 +13457,7 @@ FtlWrite:
 	ldr	r3, [sp, #8]
 	cmp	fp, r3
 	bls	.L1802
-	movw	r2, #1121
+	movw	r2, #1123
 	ldr	r1, .L1822+44
 	ldr	r0, .L1822+48
 	bl	printf
@@ -13556,7 +13559,7 @@ FtlWrite:
 	ldrh	r2, [r3]
 	cmp	r1, r2
 	bcc	.L1798
-	mov	r2, #1112
+	movw	r2, #1114
 	ldr	r1, .L1822+44
 	ldr	r0, .L1822+48
 	bl	printf
@@ -13660,7 +13663,7 @@ FtlWrite:
 	ldr	r2, [r10, #8]
 	cmp	r6, r2
 	beq	.L1796
-	movw	r2, #1097
+	movw	r2, #1099
 	ldr	r1, .L1824+16
 	ldr	r0, .L1824+20
 	bl	printf
@@ -13750,554 +13753,181 @@ FtlWrite:
 	.word	.LANCHOR83
 	.word	.LANCHOR82
 	.size	FtlWrite, .-FtlWrite
-	.global	__aeabi_idivmod
-	.section	.text.sftl_write,"ax",%progbits
+	.section	.text.FtlMakeBbt,"ax",%progbits
 	.align	1
-	.global	sftl_write
+	.global	FtlMakeBbt
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	sftl_write, %function
-sftl_write:
-	@ args = 0, pretend = 0, frame = 128
+	.type	FtlMakeBbt, %function
+FtlMakeBbt:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	adds	r7, r0, r1
-	add	r8, r7, #-1
-	sub	sp, sp, #136
-	cmp	r8, #63
-	mov	fp, r0
-	str	r1, [sp, #24]
-	str	r2, [sp, #44]
-	ldr	r4, .L1871
-	bls	.L1827
-	cmp	r0, #576
-	bcc	.L1828
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r6, #0
+	ldr	r7, .L1845
+	bl	FtlBbtMemInit
+	sub	r8, r7, #18
+	bl	FtlLoadFactoryBbt
 .L1827:
-	ldr	r3, [r4]
-	cbz	r3, .L1830
-	ldr	r3, .L1871+4
-	ldr	r10, [r3]
-	ldr	r3, .L1871+8
-	ldr	r2, [r10]
+	ldr	r3, .L1845+4
+	ldrh	r3, [r3]
+	cmp	r6, r3
+	bcc	.L1833
+	ldr	r5, .L1845+8
+	movs	r4, #0
+.L1834:
+	ldrh	r3, [r5]
+	uxth	r0, r4
+	adds	r4, r4, #1
+	cmp	r3, r0
+	bhi	.L1835
+	ldr	r4, .L1845+12
+	movw	r6, #65535
+	ldrh	r5, [r4, #12]
+	subs	r5, r5, #1
+	uxth	r5, r5
+.L1836:
+	ldrh	r3, [r4, #12]
+	subs	r3, r3, #47
+	cmp	r3, r5
+	bgt	.L1840
+	mov	r0, r5
+	bl	FtlBbmIsBadBlock
+	cmp	r0, #1
+	beq	.L1837
+	mov	r0, r5
+	bl	FlashTestBlk
+	cmp	r0, #0
+	beq	.L1838
+	mov	r0, r5
+	bl	FtlBbmMapBadBlock
+.L1837:
+	subs	r5, r5, #1
+	uxth	r5, r5
+	b	.L1836
+.L1833:
+	ldr	r3, .L1845+16
+	ldr	r5, .L1845+20
+	ldrh	r2, [r8, #2]!
+	ldr	r4, .L1845+24
+	ldr	r0, [r3]
+	movw	r3, #65535
+	ldr	r10, [r5]
 	cmp	r2, r3
+	mov	fp, r4
+	ldr	r3, .L1845+28
+	str	r0, [r4, #8]
+	str	r10, [r4, #12]
+	beq	.L1828
+	ldrh	r5, [r3]
+	mov	r0, r4
+	str	r3, [sp]
+	mla	r5, r6, r5, r2
+	lsls	r2, r5, #10
+	str	r2, [r4, #4]
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+	ldr	r3, [sp]
+	ldr	r1, [r4, #8]
+	ldr	r0, [r7]
+	ldrh	r2, [r3]
+	adds	r2, r2, #7
+	asrs	r2, r2, #3
+	bl	ftl_memcpy
+.L1829:
+	uxth	r0, r5
+	adds	r6, r6, #1
+	adds	r7, r7, #4
+	bl	FtlBbmMapBadBlock
+	b	.L1827
+.L1828:
+	mov	r1, r6
+	str	r3, [sp]
+	bl	FlashGetBadBlockList
+	ldr	r0, [r4, #8]
+	ldr	r1, [r7]
+	bl	FtlBbt2Bitmap
+	ldr	r3, [sp]
+	str	r5, [sp, #4]
+	ldrh	r4, [r3]
+	subs	r4, r4, #1
+	uxth	r4, r4
+.L1830:
+	ldr	r3, [sp]
+	ldrh	r0, [r3]
+	smlabb	r0, r0, r6, r4
+	uxth	r0, r0
+	bl	FtlBbmIsBadBlock
+	cmp	r0, #1
 	beq	.L1831
-.L1848:
-	ldr	r3, .L1871
-	movs	r2, #0
-	str	r2, [r3]
-	ldr	r3, .L1871+4
+	ldr	r3, [sp, #4]
+	movs	r2, #16
+	movs	r1, #0
+	strh	r4, [r8]	@ movhi
 	ldr	r0, [r3]
-	bl	free
-	ldr	r3, .L1871+12
+	bl	ftl_memset
+	ldr	r3, .L1845+16
+	mov	r2, #4096
+	movs	r1, #0
 	ldr	r0, [r3]
-	bl	free
-.L1830:
-	ldr	r3, [sp, #44]
-	mov	r1, fp
-	ldr	r2, [sp, #24]
-	movs	r0, #0
-	bl	FtlWrite
-	add	sp, sp, #136
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1831:
-	ldr	r3, .L1871+16
-	add	r0, r10, #262144
-	movw	r2, #65535
-	ldrh	r4, [r3, #14]
-	ldrh	r5, [r3, #10]
+	bl	ftl_memset
+	ldr	r2, [sp]
+	movw	r3, #61664
+	strh	r3, [r10]	@ movhi
 	movs	r3, #0
-.L1835:
-	ldr	r1, [r0, #-4]
-	cbnz	r1, .L1832
-	ldr	r1, [r10, r3, lsl #2]
+	str	r3, [r10, #4]
+	ldrh	r5, [r2]
+	ldrh	r3, [r8]
+	ldr	r1, [r7]
+	ldr	r0, [fp, #8]
+	strh	r3, [r10, #2]	@ movhi
+	mla	r5, r6, r5, r3
+	lsls	r3, r5, #10
+	str	r3, [fp, #4]
+	ldr	r3, .L1845+32
+	ldrh	r2, [r3]
+	lsls	r2, r2, #2
+	bl	ftl_memcpy
+	movs	r2, #1
+	ldr	r0, .L1845+24
+	mov	r1, r2
+	bl	FlashEraseBlocks
+	movs	r3, #1
+	ldr	r0, .L1845+24
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+	ldr	r3, [fp]
 	adds	r3, r3, #1
-	cmp	r3, #4096
-	add	r2, r2, #-1
-	it	hi
-	movhi	r3, #0
-	cmp	r2, #4096
-	str	r1, [r0, #-4]!
-	bne	.L1835
-	mov	r3, #512
-	str	r3, [sp, #12]
+	bne	.L1829
+	uxth	r0, r5
+	bl	FtlBbmMapBadBlock
+	b	.L1830
+.L1831:
+	subs	r4, r4, #1
+	uxth	r4, r4
+	b	.L1830
+.L1835:
+	bl	FtlBbmMapBadBlock
 	b	.L1834
-.L1832:
-	add	r3, r2, #127
-	ldr	r0, .L1871+20
-	lsrs	r3, r3, #7
-	str	r3, [sp, #12]
-	bl	printf
-.L1834:
-	uxtb	r4, r4
-	mov	r8, #0
-	smulbb	r5, r4, r5
-	uxth	r3, r5
-	ldr	r5, .L1871+24
-	str	r3, [sp, #16]
-	subs	r0, r3, #1
-	mov	r1, r3
-	ldr	r3, [sp, #12]
-	add	r0, r0, r3
-	bl	__aeabi_uidiv
-	ldr	r2, [sp, #16]
-	mov	r3, r0
-	str	r0, [sp, #20]
-	str	r0, [sp, #40]
-	str	r8, [sp, #32]
-	muls	r3, r2, r3
-	str	r3, [sp, #28]
-	ldr	r3, [sp, #12]
-	lsls	r3, r3, #7
-	str	r3, [sp, #56]
-	b	.L1847
-.L1856:
-	str	r3, [sp, #40]
-.L1847:
-	ldr	r3, .L1871+12
-	mov	r2, #512
-	movs	r1, #0
-	ldr	r0, [r3]
-	bl	memset
-	ldr	r3, .L1871+16
-	mov	r0, r8
-	ldrh	r7, [r3, #14]
-	mov	r1, r7
-	uxtb	r6, r7
-	uxth	r3, r6
-	str	r3, [sp, #36]
-	ldr	r3, .L1871+16
-	ldrh	r4, [r3, #10]
-	ldrh	r3, [sp, #36]
-	smulbb	r4, r4, r3
-	bl	__aeabi_uidiv
-	ldr	r3, [r5, #4]
-	mov	r1, r0
-	movs	r0, #0
-	uxth	r4, r4
-	blx	r3
-	ldr	r3, [sp, #28]
-	cmp	r3, r4
-	bls	.L1836
-	mov	r1, r7
-	add	r0, r4, r8
-	bl	__aeabi_uidiv
-	ldr	r3, [r5, #4]
-	mov	r1, r0
-	movs	r0, #0
-	blx	r3
-.L1836:
-	mov	r1, r4
-	mov	r0, r8
-	movs	r4, #0
-	bl	__aeabi_uidivmod
-	sub	r3, r8, r1
-	str	r1, [sp, #48]
-	str	r3, [sp, #52]
-.L1837:
-	ldr	r3, [sp, #28]
-	cmp	r3, r4
-	bhi	.L1838
-	ldr	r3, .L1871+12
-	mov	r0, r8
-	movs	r4, #0
-	ldr	r3, [r3]
-	str	r3, [sp, #52]
-	ldr	r3, .L1871+16
-	ldrb	r7, [r3, #14]	@ zero_extendqisi2
-	uxth	r3, r7
-	str	r3, [sp, #48]
-	ldr	r3, .L1871+16
-	ldrh	r1, [r3, #10]
-	ldrh	r3, [sp, #48]
-	smulbb	r1, r1, r3
-	uxth	r1, r1
-	bl	__aeabi_uidivmod
-	str	r1, [sp, #36]
-	sub	r3, r8, r1
-	ldrh	r0, [sp, #36]
-	mov	r1, r7
-	str	r3, [sp, #60]
-	bl	__aeabi_idivmod
-	uxth	r6, r1
-.L1839:
-	ldr	r3, [sp, #12]
-	cmp	r4, r3
-	bcs	.L1843
-	ldr	r3, [sp, #48]
-	mov	r1, r7
-	subs	r3, r3, r6
-	uxth	r3, r3
-	str	r3, [sp, #64]
-	ldr	r3, [sp, #52]
-	add	r2, r3, r4, lsl #9
-	ldr	r3, [sp, #36]
-	str	r2, [sp, #68]
-	adds	r0, r3, r4
-	bl	__aeabi_uidiv
-	ldr	r3, [sp, #60]
-	uxth	r0, r0
-	mov	r1, r7
-	add	r6, r6, r3
-	mla	r0, r7, r0, r6
-	bl	__aeabi_uidiv
-	ldr	r6, [r5, #12]
-	mov	r1, r0
-	add	r3, sp, #72
-	ldr	r2, [sp, #68]
-	movs	r0, #0
-	blx	r6
-	adds	r0, r0, #1
-	bne	.L1840
-.L1843:
-	ldr	r3, .L1871+12
-	mov	r1, r10
-	movs	r4, #0
-	ldr	r0, [r3]
-.L1841:
-	mov	r7, r1
-	ldr	r2, [r0, r4, lsl #2]
-	ldr	r3, [r7]
-	lsls	r6, r4, #2
-	adds	r1, r1, #4
-	cmp	r2, r3
-	beq	.L1844
-	mov	r2, #512
-	movs	r1, #0
-	bl	memset
-	ldr	r3, .L1871+12
-	mov	r1, r8
-	ldr	r0, .L1871+28
-	ldr	r2, [r3]
-	str	r4, [sp]
-	ldr	r3, [r7]
-	ldr	r2, [r2, r6]
-	bl	printf
-	ldr	r3, [r5, #4]
-	mov	r1, r8
-	movs	r0, #0
-	blx	r3
-	ldr	r3, [sp, #20]
-	cmp	r3, #1
-	bls	.L1855
-	ldr	r2, [sp, #16]
-	movs	r0, #0
-	ldr	r3, [r5, #4]
-	add	r1, r2, r8
-	blx	r3
-.L1855:
-	ldr	r2, [sp, #40]
-	ldr	r3, [sp, #20]
-	add	r3, r3, r2
-	ldr	r2, [sp, #28]
-	add	r8, r8, r2
-	ldr	r2, [sp, #40]
-	cmp	r2, #15
-	bls	.L1856
-	b	.L1848
-.L1838:
-	ldr	r3, [sp, #48]
-	mov	r1, r6
-	adds	r0, r3, r4
-	bl	__aeabi_uidiv
-	uxth	r3, r0
-	add	r2, r10, r4, lsl #9
-	ldr	r0, [sp, #52]
-	mov	r7, r3
-	muls	r3, r6, r3
-	mov	r1, r6
-	str	r2, [sp, #60]
-	str	r3, [sp, #72]
-	movw	r3, #61424
-	str	r3, [sp, #76]
-	bl	__aeabi_uidiv
-	add	r3, sp, #72
-	adds	r1, r0, r7
-	ldr	r2, [sp, #60]
-	movs	r0, #0
-	ldr	r7, [r5, #8]
-	blx	r7
-	ldr	r3, [sp, #36]
-	add	r4, r4, r3
-	uxth	r4, r4
-	b	.L1837
-.L1840:
-	ldr	r3, [sp, #64]
-	movs	r6, #0
-	add	r3, r3, r4
-	uxth	r4, r3
-	b	.L1839
-.L1844:
-	ldr	r3, [sp, #56]
-	adds	r4, r4, #1
-	cmp	r4, r3
-	bne	.L1841
-	ldr	r3, [sp, #32]
-	adds	r3, r3, #1
-	cmp	r3, #5
-	str	r3, [sp, #32]
-	bls	.L1855
-	b	.L1848
-.L1872:
-	.align	2
-.L1871:
-	.word	.LANCHOR184
-	.word	.LANCHOR185
-	.word	-52655045
-	.word	.LANCHOR186
-	.word	.LANCHOR0
-	.word	.LC114
-	.word	.LANCHOR105
-	.word	.LC115
-.L1828:
-	cmp	r0, #64
-	bne	.L1849
-	ldr	r5, .L1873
-	mov	r0, #262144
-	bl	ftl_malloc
-	str	r0, [r5]
-	mov	r0, #262144
-	bl	ftl_malloc
-	ldr	r3, .L1873+4
-	str	r0, [r3]
-	ldr	r3, [r5]
-	cbz	r3, .L1850
-	cbz	r0, .L1850
-	movs	r2, #1
-	movs	r1, #0
-	str	r2, [r4]
-	mov	r0, r3
-	mov	r2, #262144
-	bl	ftl_memset
-.L1849:
-	ldr	r3, [r4]
-	cmp	r3, #0
-	beq	.L1830
-	ldr	r3, .L1873
-	cmp	fp, #63
-	ldr	r1, [r3]
-	bhi	.L1852
-	ldr	r3, [sp, #24]
-	rsb	r5, fp, #64
-	mov	r4, r1
-	subs	r6, r3, r5
-	ldr	r3, [sp, #44]
-	add	r5, r3, r5, lsl #9
-.L1853:
-	cmp	r8, #576
-	ldr	r0, .L1873+8
-	it	cs
-	subcs	r6, r6, r7
-	mov	r3, r4
-	it	cs
-	subcs	r6, r6, #446
-	mov	r2, #262144
-	str	r6, [sp]
-	bl	printf
-	lsls	r2, r6, #9
-	mov	r1, r5
-	mov	r0, r4
-	bl	ftl_memcpy
-	b	.L1830
-.L1850:
-	ldr	r1, .L1873+12
-	ldr	r0, .L1873+16
-	bl	printf
-	b	.L1849
-.L1852:
-	ldr	r4, .L1873+20
-	ldr	r5, [sp, #44]
-	ldr	r6, [sp, #24]
-	add	r4, r4, fp
-	add	r4, r1, r4, lsl #9
-	b	.L1853
-.L1874:
-	.align	2
-.L1873:
-	.word	.LANCHOR185
-	.word	.LANCHOR186
-	.word	.LC117
-	.word	.LANCHOR187
-	.word	.LC116
-	.word	8388544
-	.size	sftl_write, .-sftl_write
-	.section	.text.FtlMakeBbt,"ax",%progbits
-	.align	1
-	.global	FtlMakeBbt
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlMakeBbt, %function
-FtlMakeBbt:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r6, #0
-	ldr	r7, .L1894
-	bl	FtlBbtMemInit
-	sub	r8, r7, #18
-	bl	FtlLoadFactoryBbt
-.L1876:
-	ldr	r3, .L1894+4
-	ldrh	r3, [r3]
-	cmp	r6, r3
-	bcc	.L1882
-	ldr	r5, .L1894+8
-	movs	r4, #0
-.L1883:
-	ldrh	r3, [r5]
-	uxth	r0, r4
-	adds	r4, r4, #1
-	cmp	r3, r0
-	bhi	.L1884
-	ldr	r4, .L1894+12
-	movw	r6, #65535
-	ldrh	r5, [r4, #12]
-	subs	r5, r5, #1
-	uxth	r5, r5
-.L1885:
-	ldrh	r3, [r4, #12]
-	subs	r3, r3, #47
-	cmp	r3, r5
-	bgt	.L1889
-	mov	r0, r5
-	bl	FtlBbmIsBadBlock
-	cmp	r0, #1
-	beq	.L1886
-	mov	r0, r5
-	bl	FlashTestBlk
-	cmp	r0, #0
-	beq	.L1887
-	mov	r0, r5
-	bl	FtlBbmMapBadBlock
-.L1886:
-	subs	r5, r5, #1
-	uxth	r5, r5
-	b	.L1885
-.L1882:
-	ldr	r3, .L1894+16
-	ldr	r5, .L1894+20
-	ldrh	r2, [r8, #2]!
-	ldr	r4, .L1894+24
-	ldr	r0, [r3]
-	movw	r3, #65535
-	ldr	r10, [r5]
-	cmp	r2, r3
-	mov	fp, r4
-	ldr	r3, .L1894+28
-	str	r0, [r4, #8]
-	str	r10, [r4, #12]
-	beq	.L1877
-	ldrh	r5, [r3]
-	mov	r0, r4
-	str	r3, [sp]
-	mla	r5, r6, r5, r2
-	lsls	r2, r5, #10
-	str	r2, [r4, #4]
-	movs	r2, #1
-	mov	r1, r2
-	bl	FlashReadPages
-	ldr	r3, [sp]
-	ldr	r1, [r4, #8]
-	ldr	r0, [r7]
-	ldrh	r2, [r3]
-	adds	r2, r2, #7
-	asrs	r2, r2, #3
-	bl	ftl_memcpy
-.L1878:
-	uxth	r0, r5
-	adds	r6, r6, #1
-	adds	r7, r7, #4
-	bl	FtlBbmMapBadBlock
-	b	.L1876
-.L1877:
-	mov	r1, r6
-	str	r3, [sp]
-	bl	FlashGetBadBlockList
-	ldr	r0, [r4, #8]
-	ldr	r1, [r7]
-	bl	FtlBbt2Bitmap
-	ldr	r3, [sp]
-	str	r5, [sp, #4]
-	ldrh	r4, [r3]
-	subs	r4, r4, #1
-	uxth	r4, r4
-.L1879:
-	ldr	r3, [sp]
-	ldrh	r0, [r3]
-	smlabb	r0, r0, r6, r4
-	uxth	r0, r0
-	bl	FtlBbmIsBadBlock
-	cmp	r0, #1
-	beq	.L1880
-	ldr	r3, [sp, #4]
-	movs	r2, #16
-	movs	r1, #0
-	strh	r4, [r8]	@ movhi
-	ldr	r0, [r3]
-	bl	ftl_memset
-	ldr	r3, .L1894+16
-	mov	r2, #4096
-	movs	r1, #0
-	ldr	r0, [r3]
-	bl	ftl_memset
-	ldr	r2, [sp]
-	movw	r3, #61664
-	strh	r3, [r10]	@ movhi
-	movs	r3, #0
-	str	r3, [r10, #4]
-	ldrh	r5, [r2]
-	ldrh	r3, [r8]
-	ldr	r1, [r7]
-	ldr	r0, [fp, #8]
-	strh	r3, [r10, #2]	@ movhi
-	mla	r5, r6, r5, r3
-	lsls	r3, r5, #10
-	str	r3, [fp, #4]
-	ldr	r3, .L1894+32
-	ldrh	r2, [r3]
-	lsls	r2, r2, #2
-	bl	ftl_memcpy
-	movs	r2, #1
-	ldr	r0, .L1894+24
-	mov	r1, r2
-	bl	FlashEraseBlocks
-	movs	r3, #1
-	ldr	r0, .L1894+24
-	mov	r2, r3
-	mov	r1, r3
-	bl	FlashProgPages
-	ldr	r3, [fp]
-	adds	r3, r3, #1
-	bne	.L1878
-	uxth	r0, r5
-	bl	FtlBbmMapBadBlock
-	b	.L1879
-.L1880:
-	subs	r4, r4, #1
-	uxth	r4, r4
-	b	.L1879
-.L1884:
-	bl	FtlBbmMapBadBlock
-	b	.L1883
-.L1887:
-	ldrh	r3, [r4]
-	cmp	r3, r6
-	bne	.L1888
-	strh	r5, [r4]	@ movhi
-	b	.L1886
-.L1888:
-	strh	r5, [r4, #4]	@ movhi
-.L1889:
-	ldr	r3, .L1894+36
-	movs	r5, #0
-	str	r5, [r4, #8]
-	movs	r1, #1
-	movs	r2, #2
-	strh	r5, [r4, #2]	@ movhi
+.L1838:
+	ldrh	r3, [r4]
+	cmp	r3, r6
+	bne	.L1839
+	strh	r5, [r4]	@ movhi
+	b	.L1837
+.L1839:
+	strh	r5, [r4, #4]	@ movhi
+.L1840:
+	ldr	r3, .L1845+36
+	movs	r5, #0
+	str	r5, [r4, #8]
+	movs	r1, #1
+	movs	r2, #2
+	strh	r5, [r4, #2]	@ movhi
 	ldr	r0, [r3]
 	ldrh	r3, [r4]
 	lsls	r3, r3, #10
@@ -14324,9 +13954,9 @@ FtlMakeBbt:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1895:
+.L1846:
 	.align	2
-.L1894:
+.L1845:
 	.word	.LANCHOR37+28
 	.word	.LANCHOR10
 	.word	.LANCHOR25
@@ -14351,62 +13981,62 @@ ftl_low_format:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #0
-	ldr	r6, .L1920
-	ldr	r2, .L1920+4
-	ldr	r5, .L1920+8
+	ldr	r6, .L1871
+	ldr	r2, .L1871+4
+	ldr	r5, .L1871+8
 	ldrh	r0, [r6]
 	str	r3, [r2]
 	str	r3, [r5]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	r0, .L1897
+	cbz	r0, .L1848
 	bl	FtlMakeBbt
-.L1897:
-	ldr	r3, .L1920+12
-	ldr	r2, .L1920+16
-	ldr	ip, .L1920+100
+.L1848:
+	ldr	r3, .L1871+12
+	ldr	r2, .L1871+16
+	ldr	ip, .L1871+100
 	ldrh	r1, [r3]
 	ldr	r4, [r2]
-	ldr	r2, .L1920+20
+	ldr	r2, .L1871+20
 	str	r3, [sp, #4]
 	lsls	r1, r1, #7
 	ldr	r7, [r2]
 	movs	r2, #0
-.L1898:
+.L1849:
 	uxth	r3, r2
 	adds	r2, r2, #1
 	cmp	r3, r1
-	blt	.L1899
-	ldr	r3, .L1920+24
+	blt	.L1850
+	ldr	r3, .L1871+24
 	movs	r7, #0
-	ldr	r10, .L1920+104
+	ldr	r10, .L1871+104
 	ldrh	r4, [r3]
 	mov	r8, r3
 	mov	fp, r10
-.L1900:
+.L1851:
 	ldrh	r3, [r10]
 	cmp	r3, r4
-	bhi	.L1901
-	ldr	r4, .L1920+28
+	bhi	.L1852
+	ldr	r4, .L1871+28
 	subs	r3, r7, #2
 	ldrh	r1, [r4]
 	cmp	r3, r1, lsl #1
-	bgt	.L1902
-.L1906:
+	bgt	.L1853
+.L1857:
 	movs	r6, #0
 	mov	r7, r6
-.L1903:
+.L1854:
 	ldrh	r3, [r8]
 	uxth	r0, r6
 	adds	r6, r6, #1
 	cmp	r3, r0
-	bhi	.L1907
+	bhi	.L1858
 	ldrh	r2, [fp]
-	ldr	r3, .L1920+32
+	ldr	r3, .L1871+32
 	ldrh	r4, [r4]
-	ldr	r6, .L1920+36
+	ldr	r6, .L1871+36
 	str	r2, [r3]
-	ldr	r3, .L1920+40
+	ldr	r3, .L1871+40
 	mov	r1, r4
 	ldr	r2, [r3]
 	mov	r0, r2
@@ -14416,13 +14046,13 @@ ftl_low_format:
 	mov	r3, r0
 	str	r0, [r6]
 	add	r1, r10, #36
-	ldr	r0, .L1920+44
+	ldr	r0, .L1871+44
 	strh	r1, [r0]	@ movhi
 	movs	r1, #24
 	muls	r1, r4, r1
 	str	r0, [sp]
 	cmp	r7, r1
-	ble	.L1908
+	ble	.L1859
 	ldr	r2, [sp, #12]
 	mov	r1, r4
 	str	r3, [sp, #8]
@@ -14434,11 +14064,11 @@ ftl_low_format:
 	adds	r0, r0, #24
 	strh	r0, [r3]	@ movhi
 	ldr	r3, [sp, #8]
-.L1908:
-	ldr	r2, .L1920+48
+.L1859:
+	ldr	r2, .L1871+48
 	ldrh	r2, [r2]
-	cbz	r2, .L1910
-	ldr	r1, .L1920+44
+	cbz	r2, .L1861
+	ldr	r1, .L1871+44
 	ldrh	r0, [r1]
 	add	r0, r0, r2, lsr #1
 	strh	r0, [r1]	@ movhi
@@ -14449,24 +14079,24 @@ ftl_low_format:
 	strlt	r3, [r6]
 	addlt	r2, r2, r10
 	strhlt	r2, [r1]	@ movhi
-.L1910:
+.L1861:
 	ldr	r3, [sp]
-	ldr	r7, .L1920+52
-	ldr	r10, .L1920+108
+	ldr	r7, .L1871+52
+	ldr	r10, .L1871+108
 	ldrh	r2, [r3]
 	ldr	r3, [r6]
 	subs	r3, r3, r2
 	muls	r4, r3, r4
-	ldr	r3, .L1920+56
+	ldr	r3, .L1871+56
 	ldrh	r3, [r3]
 	str	r4, [r7]
 	muls	r4, r3, r4
 	ldr	r3, [sp, #4]
 	ldrh	r3, [r3]
 	str	r4, [r6]
-	ldr	r6, .L1920+60
+	ldr	r6, .L1871+60
 	muls	r4, r3, r4
-	ldr	r3, .L1920+64
+	ldr	r3, .L1871+64
 	str	r4, [r3]
 	movw	r4, #65535
 	bl	FtlBbmTblFlush
@@ -14475,13 +14105,13 @@ ftl_low_format:
 	ldr	r0, [r10]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-	ldr	r2, .L1920+68
+	ldr	r2, .L1871+68
 	movs	r3, #0
 	strh	r3, [r6, #2]	@ movhi
 	movs	r1, #255
 	strb	r3, [r6, #6]
 	str	r3, [r2]
-	ldr	r2, .L1920+72
+	ldr	r2, .L1871+72
 	strh	r3, [r6]	@ movhi
 	strh	r3, [r2, #2]	@ movhi
 	strb	r3, [r2, #6]
@@ -14492,30 +14122,30 @@ ftl_low_format:
 	mov	r8, r10
 	strb	r3, [r6, #8]
 	mov	r10, r6
-	ldr	r3, .L1920+76
+	ldr	r3, .L1871+76
 	lsrs	r2, r2, #3
 	ldr	r0, [r3]
 	bl	ftl_memset
-.L1912:
+.L1863:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r6, #7]	@ zero_extendqisi2
 	ldrh	r2, [r6]
 	cmp	r3, #0
-	bne	.L1913
+	bne	.L1864
 	ldr	r3, [r8]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r6]
 	adds	r3, r3, #1
 	strh	r3, [r6]	@ movhi
-	b	.L1912
-.L1899:
+	b	.L1863
+.L1850:
 	mvns	r0, r3
 	orr	r0, r3, r0, lsl #16
 	str	r0, [r4, r3, lsl #2]
 	str	ip, [r7, r3, lsl #2]
-	b	.L1898
-.L1901:
+	b	.L1849
+.L1852:
 	mov	r0, r4
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
@@ -14523,11 +14153,11 @@ ftl_low_format:
 	add	r7, r7, r0
 	uxth	r7, r7
 	uxth	r4, r4
-	b	.L1900
-.L1902:
+	b	.L1851
+.L1853:
 	mov	r0, r7
 	bl	__aeabi_uidiv
-	ldr	r3, .L1920+80
+	ldr	r3, .L1871+80
 	ldr	r3, [r3]
 	add	r0, r0, r3
 	uxth	r0, r0
@@ -14535,133 +14165,585 @@ ftl_low_format:
 	ldrh	r0, [r6]
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	r6, [r8]
+.L1855:
+	ldrh	r3, [fp]
+	cmp	r3, r6
+	bls	.L1857
+	mov	r0, r6
+	movs	r1, #1
+	adds	r6, r6, #1
+	bl	FtlLowFormatEraseBlock
+	uxth	r6, r6
+	b	.L1855
+.L1858:
+	movs	r1, #0
+	bl	FtlLowFormatEraseBlock
+	add	r7, r7, r0
+	uxth	r7, r7
+	b	.L1854
+.L1864:
+	ldr	r3, [r5]
+	ldrh	r1, [r6, #4]
+	ldr	r4, .L1871+84
+	str	r3, [r6, #12]
+	adds	r3, r3, #1
+	str	r3, [r5]
+	ldr	r3, [r8]
+	mov	r10, r4
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	movs	r3, #0
+	strh	r3, [r4, #2]	@ movhi
+	strb	r3, [r4, #6]
+	ldrh	r3, [r6]
+	movw	r6, #65535
+	adds	r3, r3, #1
+	strh	r3, [r4]	@ movhi
+	movs	r3, #1
+	strb	r3, [r4, #8]
+.L1865:
+	mov	r0, r10
+	bl	make_superblock
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	ldrh	r2, [r4]
+	cbnz	r3, .L1866
+	ldr	r3, [r8]
+	strh	r6, [r3, r2, lsl #1]	@ movhi
+	ldrh	r3, [r4]
+	adds	r3, r3, #1
+	strh	r3, [r4]	@ movhi
+	b	.L1865
+.L1866:
+	ldr	r3, [r5]
+	ldrh	r1, [r4, #4]
+	str	r3, [r4, #12]
+	adds	r3, r3, #1
+	str	r3, [r5]
+	movw	r4, #65535
+	ldr	r3, [r8]
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	ldr	r3, .L1871+88
+	strh	r4, [r3]	@ movhi
+	bl	FtlFreeSysBlkQueueOut
+	ldr	r3, .L1871+92
+	movs	r2, #0
+	strh	r2, [r3, #2]	@ movhi
+	ldr	r2, [r7]
+	strh	r0, [r3]	@ movhi
+	strh	r4, [r3, #4]	@ movhi
+	strh	r2, [r3, #6]	@ movhi
+	ldr	r2, [r5]
+	str	r2, [r3, #8]
+	adds	r2, r2, #1
+	str	r2, [r5]
+	bl	FtlVpcTblFlush
+	bl	FtlSysBlkInit
+	cbnz	r0, .L1867
+	ldr	r3, .L1871+96
+	movs	r2, #1
+	str	r2, [r3]
+.L1867:
+	movs	r0, #0
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1872:
+	.align	2
+.L1871:
+	.word	.LANCHOR4
+	.word	.LANCHOR71
+	.word	.LANCHOR70
+	.word	.LANCHOR12
+	.word	.LANCHOR118
+	.word	.LANCHOR119
+	.word	.LANCHOR5
+	.word	.LANCHOR3
+	.word	.LANCHOR111
+	.word	.LANCHOR61
+	.word	.LANCHOR7
+	.word	.LANCHOR78
+	.word	.LANCHOR15
+	.word	.LANCHOR152
+	.word	.LANCHOR19
+	.word	.LANCHOR51
+	.word	.LANCHOR34
+	.word	.LANCHOR59
+	.word	.LANCHOR80
+	.word	.LANCHOR1
+	.word	.LANCHOR31
+	.word	.LANCHOR52
+	.word	.LANCHOR53
+	.word	.LANCHOR79
+	.word	.LANCHOR86
+	.word	168778952
+	.word	.LANCHOR6
+	.word	.LANCHOR42
+	.size	ftl_low_format, .-ftl_low_format
+	.section	.text.ftl_memcmp,"ax",%progbits
+	.align	1
+	.global	ftl_memcmp
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_memcmp, %function
+ftl_memcmp:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	memcmp
+	.size	ftl_memcmp, .-ftl_memcmp
+	.section	.text.FtlWriteToIDB,"ax",%progbits
+	.align	1
+	.global	FtlWriteToIDB
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlWriteToIDB, %function
+FtlWriteToIDB:
+	@ args = 0, pretend = 0, frame = 104
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	add	r8, r1, r0
+	add	r10, r8, #-1
+	sub	sp, sp, #112
+	cmp	r10, #63
+	mov	r4, r0
+	mov	r6, r1
+	mov	r7, r2
+	ldr	r5, .L1946
+	bls	.L1875
+	cmp	r0, #576
+	bcc	.L1876
+.L1875:
+	ldr	r3, [r5]
+	cbnz	r3, .L1877
+.L1945:
+	movs	r4, #0
+	b	.L1874
+.L1877:
+	ldr	r3, .L1946+4
+	ldr	r3, [r3]
+	ldr	r2, [r3]
+	str	r3, [sp, #12]
+	ldr	r3, .L1946+8
+	cmp	r2, r3
+	bne	.L1879
+	ldr	r3, .L1946+12
+	movs	r2, #0
+	ldrh	r1, [r3, #10]
+	ldr	r3, [sp, #12]
+	add	r0, r3, #262144
+	movw	r3, #65535
+.L1883:
+	ldr	r4, [r0, #-4]
+	cbnz	r4, .L1880
+	ldr	r4, [sp, #12]
+	subs	r3, r3, #1
+	ldr	r4, [r4, r2, lsl #2]
+	adds	r2, r2, #1
+	cmp	r2, #4096
+	it	hi
+	movhi	r2, #0
+	cmp	r3, #4096
+	str	r4, [r0, #-4]!
+	bne	.L1883
+	mov	r3, #512
+	b	.L1942
+.L1880:
+	adds	r3, r3, #127
+	lsrs	r3, r3, #7
+.L1942:
+	str	r3, [sp, #16]
+	lsls	r1, r1, #2
+	ldr	r3, [sp, #16]
+	uxth	r1, r1
+	ldr	r4, .L1946+16
+	adds	r0, r3, #4
+	bl	__aeabi_uidiv
+	adds	r3, r0, #1
+	str	r3, [sp, #24]
+	ldr	r3, [sp, #16]
+	lsls	r3, r3, #7
+	str	r3, [sp, #36]
+	movs	r3, #0
+	mov	r10, r3
+	str	r3, [sp, #20]
+.L1906:
+	ldr	r3, .L1946+20
+	mov	r2, #512
+	movs	r1, #0
+	ldr	r0, [r3]
+	bl	memset
+	ldr	r3, .L1946+12
+	ldrh	r6, [r3, #10]
+	ldr	r3, [r4, #16]
+	mul	fp, r10, r6
+	cmp	r3, #0
+	beq	.L1914
+	ldr	r3, [r4, #20]
+	cmp	r3, #0
+	ite	eq
+	moveq	r3, #6
+	movne	r3, #9
+.L1943:
+	str	r3, [sp, #28]
+	mov	r1, fp
+	ldr	r3, .L1946+16
+	movs	r0, #0
+	ldr	r3, [r3, #4]
+	blx	r3
+	ldr	r3, [sp, #24]
+	cmp	r3, #1
+	beq	.L1885
+	ldr	r3, .L1946+16
+	add	r1, r6, fp
+	movs	r0, #0
+	ldr	r3, [r3, #4]
+	blx	r3
+.L1885:
+	ldr	r3, [sp, #28]
+	cmp	r3, #9
+	bne	.L1916
+	ldr	r3, .L1946+20
+	mov	r2, #1024
+	movs	r1, #0
+	ldr	r5, [r3]
+	mov	r0, r5
+	bl	ftl_memset
+	ldr	r2, .L1946+24
+	movs	r3, #12
+	add	r1, r5, #11
+	add	r0, r5, #23
+	stm	r5, {r2, r3}
+	movs	r2, #4
+	strb	r2, [r5, #17]
+	movs	r3, #0
+	ldr	r2, .L1946+12
+	str	r3, [r5, #12]
+	strb	r3, [r5, #16]
+	ldrh	r2, [r2, #10]
+	strb	r3, [r5, #20]
+	strh	r3, [r5, #22]	@ movhi
+	ldr	r3, .L1946+28
+	strh	r2, [r5, #18]	@ movhi
+	movs	r2, #16
+	strb	r2, [r5, #21]
+.L1887:
+	lsrs	r2, r3, #2
+	ldrb	ip, [r1, #1]!	@ zero_extendqisi2
+	add	r2, r2, r3, lsl #5
+	cmp	r0, r1
+	add	r2, r2, ip
+	eor	r3, r3, r2
+	bne	.L1887
+	str	r3, [r5, #8]
+.L1886:
+	ldr	r3, [sp, #24]
+	mov	r8, fp
+	muls	r3, r6, r3
+	movs	r6, #0
+	str	r3, [sp, #40]
+	ldr	r3, [sp, #12]
+	str	r3, [sp, #32]
+.L1888:
+	ldr	r3, [sp, #40]
+	cmp	r6, r3
+	beq	.L1895
+	ldr	r3, [sp, #28]
+	cmp	r3, #9
+	itet	ne
+	addne	r3, fp, r6
+	addeq	r3, r8, #1
+	lslne	r3, r3, #2
+	str	r3, [sp, #48]
+	movw	r3, #61424
+	str	r3, [sp, #52]
+	cmp	r6, #0
+	bne	.L1891
+	ldr	r3, [sp, #28]
+	cmp	r3, #9
+	bne	.L1891
+	ldr	r3, [r4, #16]
+	movs	r0, #70
+	blx	r3
+	add	r3, sp, #48
+	mov	r2, r5
+	mov	r1, fp
+	mov	r0, r6
+	ldr	r7, [r4, #8]
+	blx	r7
+	ldr	r2, .L1946+12
+	str	r0, [sp, #44]
+	ldr	r3, [r4, #16]
+	ldrb	r0, [r2, #22]	@ zero_extendqisi2
+	blx	r3
+	ldr	r2, [sp, #44]
+	adds	r2, r2, #1
+	bne	.L1892
+.L1895:
+	ldr	r3, .L1946+20
+	ldr	r2, [r4, #16]
+	ldr	r6, [r3]
+	ldr	r3, .L1946+12
+	ldrb	r3, [r3, #14]	@ zero_extendqisi2
+	str	r3, [sp, #28]
+	ldr	r3, .L1946+12
+	ldrh	r3, [r3, #10]
+	mul	r8, r10, r3
+	cmp	r2, #0
+	bne	.L1893
+	mov	fp, #6
+.L1894:
+	ldr	r2, [sp, #24]
+	movs	r5, #0
+	muls	r3, r2, r3
+	str	r3, [sp, #32]
+.L1897:
+	ldr	r3, [sp, #32]
+	cmp	r5, r3
+	beq	.L1901
+	cmp	r5, #0
+	bne	.L1898
+	cmp	fp, #9
+	bne	.L1898
+	ldr	r3, [r4, #16]
+	movs	r0, #70
+	blx	r3
+	ldr	r3, [r4, #20]
+	movs	r0, #2
+	blx	r3
+	mov	r2, r6
+	mov	r1, r8
+	add	r3, sp, #48
+	mov	r0, r5
+	ldr	r7, [r4, #12]
+	blx	r7
+	ldr	r3, [r4, #20]
+	ldr	r0, [sp, #28]
+	blx	r3
+	ldr	r2, .L1946+12
+	ldr	r3, [r4, #16]
+	ldrb	r0, [r2, #22]	@ zero_extendqisi2
+	blx	r3
+	ldr	r3, [r6]
+	ldr	r2, .L1946+24
+	cmp	r3, r2
+	beq	.L1899
+.L1901:
+	ldr	r3, .L1946+20
+	movs	r5, #0
+	ldr	r1, [sp, #12]
+	ldr	r0, [r3]
+.L1900:
+	mov	r8, r1
+	ldr	r2, [r0, r5, lsl #2]
+	ldr	r3, [r8]
+	lsls	r6, r5, #2
+	adds	r1, r1, #4
+	cmp	r2, r3
+	beq	.L1903
+	mov	r2, #512
+	movs	r1, #0
+	bl	memset
+	ldr	r3, .L1946+20
+	mov	r1, r10
+	ldr	r0, .L1946+32
+	ldr	r2, [r3]
+	str	r5, [sp]
+	ldr	r3, [r8]
+	ldr	r2, [r2, r6]
+	bl	printf
+	ldr	r3, .L1946+12
+	movs	r0, #0
+	ldrh	r1, [r3, #10]
+	ldr	r3, [r4, #4]
+	mul	r1, r10, r1
+	blx	r3
 .L1904:
-	ldrh	r3, [fp]
-	cmp	r3, r6
+	ldr	r3, [sp, #24]
+	add	r10, r10, r3
+	cmp	r10, #15
 	bls	.L1906
-	mov	r0, r6
-	movs	r1, #1
-	adds	r6, r6, #1
-	bl	FtlLowFormatEraseBlock
-	uxth	r6, r6
-	b	.L1904
+	ldr	r3, [sp, #20]
+	cbnz	r3, .L1907
+.L1879:
+	mov	r3, #-1
+	str	r3, [sp, #16]
 .L1907:
-	movs	r1, #0
-	bl	FtlLowFormatEraseBlock
-	add	r7, r7, r0
-	uxth	r7, r7
-	b	.L1903
-.L1913:
-	ldr	r3, [r5]
-	ldrh	r1, [r6, #4]
-	ldr	r4, .L1920+84
-	str	r3, [r6, #12]
-	adds	r3, r3, #1
-	str	r3, [r5]
-	ldr	r3, [r8]
-	mov	r10, r4
-	strh	r1, [r3, r2, lsl #1]	@ movhi
-	movs	r3, #0
-	strh	r3, [r4, #2]	@ movhi
-	strb	r3, [r4, #6]
-	ldrh	r3, [r6]
-	movw	r6, #65535
-	adds	r3, r3, #1
-	strh	r3, [r4]	@ movhi
-	movs	r3, #1
-	strb	r3, [r4, #8]
-.L1914:
-	mov	r0, r10
-	bl	make_superblock
-	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	ldrh	r2, [r4]
-	cbnz	r3, .L1915
-	ldr	r3, [r8]
-	strh	r6, [r3, r2, lsl #1]	@ movhi
-	ldrh	r3, [r4]
-	adds	r3, r3, #1
-	strh	r3, [r4]	@ movhi
-	b	.L1914
-.L1915:
-	ldr	r3, [r5]
-	ldrh	r1, [r4, #4]
-	str	r3, [r4, #12]
-	adds	r3, r3, #1
-	str	r3, [r5]
-	movw	r4, #65535
-	ldr	r3, [r8]
-	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L1920+88
-	strh	r4, [r3]	@ movhi
-	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L1920+92
+	ldr	r3, .L1946
 	movs	r2, #0
-	strh	r2, [r3, #2]	@ movhi
-	ldr	r2, [r7]
-	strh	r0, [r3]	@ movhi
-	strh	r4, [r3, #4]	@ movhi
-	strh	r2, [r3, #6]	@ movhi
-	ldr	r2, [r5]
-	str	r2, [r3, #8]
-	adds	r2, r2, #1
-	str	r2, [r5]
-	bl	FtlVpcTblFlush
-	bl	FtlSysBlkInit
-	cbnz	r0, .L1916
-	ldr	r3, .L1920+96
-	movs	r2, #1
+	ldr	r4, [sp, #16]
 	str	r2, [r3]
-.L1916:
-	movs	r0, #0
-	add	sp, sp, #16
+	ldr	r3, .L1946+4
+	ldr	r0, [r3]
+	bl	free
+	ldr	r3, .L1946+20
+	ldr	r0, [r3]
+	bl	free
+.L1874:
+	mov	r0, r4
+	add	sp, sp, #112
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1921:
+.L1914:
+	movs	r3, #6
+	b	.L1943
+.L1916:
+	movs	r5, #0
+	b	.L1886
+.L1891:
+	add	r3, sp, #48
+	ldr	r2, [sp, #32]
+	mov	r1, r8
+	movs	r0, #0
+	ldr	r7, [r4, #8]
+	blx	r7
+	adds	r0, r0, #1
+	beq	.L1895
+	ldr	r3, [sp, #32]
+	add	r3, r3, #2048
+	str	r3, [sp, #32]
+.L1892:
+	adds	r6, r6, #1
+	add	r8, r8, #1
+	b	.L1888
+.L1893:
+	ldr	r2, [r4, #20]
+	cmp	r2, #0
+	ite	eq
+	moveq	fp, #6
+	movne	fp, #9
+	b	.L1894
+.L1947:
 	.align	2
-.L1920:
-	.word	.LANCHOR4
-	.word	.LANCHOR71
-	.word	.LANCHOR70
-	.word	.LANCHOR12
-	.word	.LANCHOR118
-	.word	.LANCHOR119
-	.word	.LANCHOR5
-	.word	.LANCHOR3
-	.word	.LANCHOR111
-	.word	.LANCHOR61
-	.word	.LANCHOR7
-	.word	.LANCHOR78
-	.word	.LANCHOR15
-	.word	.LANCHOR152
-	.word	.LANCHOR19
-	.word	.LANCHOR51
-	.word	.LANCHOR34
-	.word	.LANCHOR59
-	.word	.LANCHOR80
-	.word	.LANCHOR1
-	.word	.LANCHOR31
-	.word	.LANCHOR52
-	.word	.LANCHOR53
-	.word	.LANCHOR79
-	.word	.LANCHOR86
-	.word	168778952
-	.word	.LANCHOR6
-	.word	.LANCHOR42
-	.size	ftl_low_format, .-ftl_low_format
-	.section	.text.ftl_memcmp,"ax",%progbits
+.L1946:
+	.word	.LANCHOR184
+	.word	.LANCHOR185
+	.word	-52655045
+	.word	.LANCHOR0
+	.word	.LANCHOR105
+	.word	.LANCHOR186
+	.word	1179535694
+	.word	1204201446
+	.word	.LC114
+.L1898:
+	add	r3, sp, #48
+	mov	r2, r6
+	add	r1, r8, r5
+	movs	r0, #0
+	ldr	r7, [r4, #12]
+	blx	r7
+	adds	r0, r0, #1
+	beq	.L1901
+	ldr	r2, [sp, #52]
+	movw	r3, #61424
+	cmp	r2, r3
+	bne	.L1901
+	add	r6, r6, #2048
+.L1899:
+	adds	r5, r5, #1
+	b	.L1897
+.L1903:
+	ldr	r3, [sp, #36]
+	adds	r5, r5, #1
+	cmp	r5, r3
+	bne	.L1900
+	ldr	r3, [sp, #20]
+	adds	r3, r3, #1
+	cmp	r3, #5
+	str	r3, [sp, #20]
+	bls	.L1904
+	b	.L1907
+.L1876:
+	cmp	r0, #64
+	bne	.L1908
+	ldr	fp, .L1948+4
+	mov	r0, #262144
+	bl	ftl_malloc
+	str	r0, [fp]
+	mov	r0, #262144
+	bl	ftl_malloc
+	ldr	r3, .L1948
+	str	r0, [r3]
+	ldr	r3, [fp]
+	cbz	r3, .L1909
+	cbz	r0, .L1909
+	movs	r2, #1
+	movs	r1, #0
+	str	r2, [r5]
+	mov	r0, r3
+	mov	r2, #262144
+	bl	ftl_memset
+.L1908:
+	ldr	r3, [r5]
+	cmp	r3, #0
+	beq	.L1945
+	ldr	r3, .L1948+4
+	cmp	r4, #63
+	iteee	hi
+	ldrhi	r5, .L1948+8
+	rsbls	r4, r4, #64
+	subls	r6, r6, r4
+	addls	r7, r7, r4, lsl #9
+	ldr	r1, [r3]
+	mov	r2, #262144
+	it	hi
+	addhi	r5, r5, r4
+	ldr	r0, .L1948+12
+	ite	ls
+	movls	r5, r1
+	addhi	r5, r1, r5, lsl #9
+	cmp	r10, #576
+	itt	cs
+	subcs	r6, r6, r8
+	subcs	r6, r6, #446
+	mov	r3, r5
+	str	r6, [sp]
+	bl	printf
+	lsls	r2, r6, #9
+	mov	r1, r7
+	mov	r0, r5
+	bl	ftl_memcpy
+	b	.L1945
+.L1909:
+	ldr	r1, .L1948+16
+	ldr	r0, .L1948+20
+	bl	printf
+	b	.L1908
+.L1949:
+	.align	2
+.L1948:
+	.word	.LANCHOR186
+	.word	.LANCHOR185
+	.word	8388544
+	.word	.LC116
+	.word	.LANCHOR187
+	.word	.LC115
+	.size	FtlWriteToIDB, .-FtlWriteToIDB
+	.section	.text.sftl_write,"ax",%progbits
 	.align	1
-	.global	ftl_memcmp
+	.global	sftl_write
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_memcmp, %function
-ftl_memcmp:
+	.type	sftl_write, %function
+sftl_write:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	memcmp
-	.size	ftl_memcmp, .-ftl_memcmp
+	push	{r4, r5, r6, lr}
+	mov	r5, r1
+	mov	r6, r2
+	mov	r4, r0
+	bl	FtlWriteToIDB
+	mov	r3, r6
+	mov	r2, r5
+	mov	r1, r4
+	movs	r0, #0
+	pop	{r4, r5, r6, lr}
+	b	FtlWrite
+	.size	sftl_write, .-sftl_write
 	.global	g_nand_ops
 	.global	g_nand_phy_info
 	.global	gc_ink_free_return_value
@@ -15353,9 +15435,9 @@ g_min_erase_count:
 	.align	2
 	.set	.LANCHOR105,. + 0
 	.type	g_nand_ops, %object
-	.size	g_nand_ops, 16
+	.size	g_nand_ops, 24
 g_nand_ops:
-	.space	16
+	.space	24
 	.section	.bss.g_nand_phy_info,"aw",%nobits
 	.align	1
 	.set	.LANCHOR0,. + 0
@@ -16093,6 +16175,13 @@ power_up_flag:
 	.section	.rodata.FtlWrite.str1.1,"aMS",%progbits,1
 .LC113:
 	.ascii	"FtlWrite: lpa error:%x %x\012\000"
+	.section	.rodata.FtlWriteToIDB.str1.1,"aMS",%progbits,1
+.LC114:
+	.ascii	"write_idblock fail! %x %x %x %x\012\000"
+.LC115:
+	.ascii	"%s idb buffer alloc fail\012\000"
+.LC116:
+	.ascii	"%p %x %p %x\012\000"
 	.section	.rodata.GetSwlReplaceBlock.str1.1,"aMS",%progbits,1
 .LC72:
 	.ascii	"swblk %x ,avg = %x max= %x vpc= %x,ec=%x ,max ec=%x"
@@ -16100,222 +16189,222 @@ power_up_flag:
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",%progbits,1
 .LC1:
 	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
-	.section	.rodata.__func__.10034,"a",%progbits
-	.set	.LANCHOR176,. + 0
-	.type	__func__.10034, %object
-	.size	__func__.10034, 19
-__func__.10034:
-	.ascii	"FtlGcFreeTempBlock\000"
-	.section	.rodata.__func__.10145,"a",%progbits
+	.section	.rodata.__func__.10094,"a",%progbits
 	.set	.LANCHOR180,. + 0
-	.type	__func__.10145, %object
-	.size	__func__.10145, 23
-__func__.10145:
+	.type	__func__.10094, %object
+	.size	__func__.10094, 23
+__func__.10094:
 	.ascii	"rk_ftl_garbage_collect\000"
-	.section	.rodata.__func__.10407,"a",%progbits
+	.section	.rodata.__func__.10356,"a",%progbits
 	.set	.LANCHOR147,. + 0
-	.type	__func__.10407, %object
-	.size	__func__.10407, 15
-__func__.10407:
+	.type	__func__.10356, %object
+	.size	__func__.10356, 15
+__func__.10356:
 	.ascii	"FlashReadPages\000"
-	.section	.rodata.__func__.10426,"a",%progbits
+	.section	.rodata.__func__.10375,"a",%progbits
 	.set	.LANCHOR153,. + 0
-	.type	__func__.10426, %object
-	.size	__func__.10426, 15
-__func__.10426:
+	.type	__func__.10375, %object
+	.size	__func__.10375, 15
+__func__.10375:
 	.ascii	"FlashProgPages\000"
-	.section	.rodata.__func__.10450,"a",%progbits
+	.section	.rodata.__func__.10399,"a",%progbits
 	.set	.LANCHOR104,. + 0
-	.type	__func__.10450, %object
-	.size	__func__.10450, 17
-__func__.10450:
+	.type	__func__.10399, %object
+	.size	__func__.10399, 17
+__func__.10399:
 	.ascii	"FlashEraseBlocks\000"
-	.section	.rodata.__func__.8814,"a",%progbits
+	.section	.rodata.__func__.10514,"a",%progbits
+	.set	.LANCHOR187,. + 0
+	.type	__func__.10514, %object
+	.size	__func__.10514, 14
+__func__.10514:
+	.ascii	"FtlWriteToIDB\000"
+	.section	.rodata.__func__.8835,"a",%progbits
 	.set	.LANCHOR138,. + 0
-	.type	__func__.8814, %object
-	.size	__func__.8814, 11
-__func__.8814:
+	.type	__func__.8835, %object
+	.size	__func__.8835, 11
+__func__.8835:
 	.ascii	"FtlMemInit\000"
-	.section	.rodata.__func__.8938,"a",%progbits
+	.section	.rodata.__func__.8959,"a",%progbits
 	.set	.LANCHOR175,. + 0
-	.type	__func__.8938, %object
-	.size	__func__.8938, 13
-__func__.8938:
+	.type	__func__.8959, %object
+	.size	__func__.8959, 13
+__func__.8959:
 	.ascii	"FtlProgPages\000"
-	.section	.rodata.__func__.8966,"a",%progbits
+	.section	.rodata.__func__.8987,"a",%progbits
 	.set	.LANCHOR183,. + 0
-	.type	__func__.8966, %object
-	.size	__func__.8966, 9
-__func__.8966:
+	.type	__func__.8987, %object
+	.size	__func__.8987, 9
+__func__.8987:
 	.ascii	"FtlWrite\000"
-	.section	.rodata.__func__.9072,"a",%progbits
-	.set	.LANCHOR187,. + 0
-	.type	__func__.9072, %object
-	.size	__func__.9072, 14
-__func__.9072:
-	.ascii	"FtlWriteToIDB\000"
-	.section	.rodata.__func__.9113,"a",%progbits
+	.section	.rodata.__func__.9062,"a",%progbits
 	.set	.LANCHOR139,. + 0
-	.type	__func__.9113, %object
-	.size	__func__.9113, 14
-__func__.9113:
+	.type	__func__.9062, %object
+	.size	__func__.9062, 14
+__func__.9062:
 	.ascii	"FtlBbt2Bitmap\000"
-	.section	.rodata.__func__.9156,"a",%progbits
+	.section	.rodata.__func__.9105,"a",%progbits
 	.set	.LANCHOR150,. + 0
-	.type	__func__.9156, %object
-	.size	__func__.9156, 11
-__func__.9156:
+	.type	__func__.9105, %object
+	.size	__func__.9105, 11
+__func__.9105:
 	.ascii	"FtlLoadBbt\000"
-	.section	.rodata.__func__.9271,"a",%progbits
+	.section	.rodata.__func__.9220,"a",%progbits
 	.set	.LANCHOR49,. + 0
-	.type	__func__.9271, %object
-	.size	__func__.9271, 17
-__func__.9271:
+	.type	__func__.9220, %object
+	.size	__func__.9220, 17
+__func__.9220:
 	.ascii	"INSERT_FREE_LIST\000"
-	.section	.rodata.__func__.9276,"a",%progbits
+	.section	.rodata.__func__.9225,"a",%progbits
 	.set	.LANCHOR46,. + 0
-	.type	__func__.9276, %object
-	.size	__func__.9276, 17
-__func__.9276:
+	.type	__func__.9225, %object
+	.size	__func__.9225, 17
+__func__.9225:
 	.ascii	"INSERT_DATA_LIST\000"
-	.section	.rodata.__func__.9307,"a",%progbits
+	.section	.rodata.__func__.9256,"a",%progbits
 	.set	.LANCHOR50,. + 0
-	.type	__func__.9307, %object
-	.size	__func__.9307, 17
-__func__.9307:
+	.type	__func__.9256, %object
+	.size	__func__.9256, 17
+__func__.9256:
 	.ascii	"List_remove_node\000"
-	.section	.rodata.__func__.9339,"a",%progbits
+	.section	.rodata.__func__.9288,"a",%progbits
 	.set	.LANCHOR54,. + 0
-	.type	__func__.9339, %object
-	.size	__func__.9339, 22
-__func__.9339:
+	.type	__func__.9288, %object
+	.size	__func__.9288, 22
+__func__.9288:
 	.ascii	"List_update_data_list\000"
-	.section	.rodata.__func__.9348,"a",%progbits
+	.section	.rodata.__func__.9297,"a",%progbits
 	.set	.LANCHOR156,. + 0
-	.type	__func__.9348, %object
-	.size	__func__.9348, 16
-__func__.9348:
+	.type	__func__.9297, %object
+	.size	__func__.9297, 16
+__func__.9297:
 	.ascii	"load_l2p_region\000"
-	.section	.rodata.__func__.9381,"a",%progbits
+	.section	.rodata.__func__.9330,"a",%progbits
 	.set	.LANCHOR107,. + 0
-	.type	__func__.9381, %object
-	.size	__func__.9381, 26
-__func__.9381:
+	.type	__func__.9330, %object
+	.size	__func__.9330, 26
+__func__.9330:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.section	.rodata.__func__.9392,"a",%progbits
+	.section	.rodata.__func__.9341,"a",%progbits
 	.set	.LANCHOR157,. + 0
-	.type	__func__.9392, %object
-	.size	__func__.9392, 15
-__func__.9392:
+	.type	__func__.9341, %object
+	.size	__func__.9341, 15
+__func__.9341:
 	.ascii	"ftl_map_blk_gc\000"
-	.section	.rodata.__func__.9407,"a",%progbits
+	.section	.rodata.__func__.9356,"a",%progbits
 	.set	.LANCHOR154,. + 0
-	.type	__func__.9407, %object
-	.size	__func__.9407, 31
-__func__.9407:
+	.type	__func__.9356, %object
+	.size	__func__.9356, 31
+__func__.9356:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.section	.rodata.__func__.9421,"a",%progbits
+	.section	.rodata.__func__.9370,"a",%progbits
 	.set	.LANCHOR155,. + 0
-	.type	__func__.9421, %object
-	.size	__func__.9421, 16
-__func__.9421:
+	.type	__func__.9370, %object
+	.size	__func__.9370, 16
+__func__.9370:
 	.ascii	"FtlMapWritePage\000"
-	.section	.rodata.__func__.9446,"a",%progbits
+	.section	.rodata.__func__.9395,"a",%progbits
 	.set	.LANCHOR57,. + 0
-	.type	__func__.9446, %object
-	.size	__func__.9446, 22
-__func__.9446:
+	.type	__func__.9395, %object
+	.size	__func__.9395, 22
+__func__.9395:
 	.ascii	"select_l2p_ram_region\000"
-	.section	.rodata.__func__.9463,"a",%progbits
+	.section	.rodata.__func__.9412,"a",%progbits
 	.set	.LANCHOR159,. + 0
-	.type	__func__.9463, %object
-	.size	__func__.9463, 9
-__func__.9463:
+	.type	__func__.9412, %object
+	.size	__func__.9412, 9
+__func__.9412:
 	.ascii	"log2phys\000"
-	.section	.rodata.__func__.9536,"a",%progbits
+	.section	.rodata.__func__.9485,"a",%progbits
 	.set	.LANCHOR171,. + 0
-	.type	__func__.9536, %object
-	.size	__func__.9536, 15
-__func__.9536:
+	.type	__func__.9485, %object
+	.size	__func__.9485, 15
+__func__.9485:
 	.ascii	"FtlVpcTblFlush\000"
-	.section	.rodata.__func__.9558,"a",%progbits
+	.section	.rodata.__func__.9507,"a",%progbits
 	.set	.LANCHOR149,. + 0
-	.type	__func__.9558, %object
-	.size	__func__.9558, 14
-__func__.9558:
+	.type	__func__.9507, %object
+	.size	__func__.9507, 14
+__func__.9507:
 	.ascii	"FtlScanSysBlk\000"
-	.section	.rodata.__func__.9615,"a",%progbits
+	.section	.rodata.__func__.9564,"a",%progbits
 	.set	.LANCHOR151,. + 0
-	.type	__func__.9615, %object
-	.size	__func__.9615, 15
-__func__.9615:
+	.type	__func__.9564, %object
+	.size	__func__.9564, 15
+__func__.9564:
 	.ascii	"FtlLoadSysInfo\000"
-	.section	.rodata.__func__.9678,"a",%progbits
+	.section	.rodata.__func__.9627,"a",%progbits
 	.set	.LANCHOR160,. + 0
-	.type	__func__.9678, %object
-	.size	__func__.9678, 16
-__func__.9678:
+	.type	__func__.9627, %object
+	.size	__func__.9627, 16
+__func__.9627:
 	.ascii	"FtlReUsePrevPpa\000"
-	.section	.rodata.__func__.9712,"a",%progbits
+	.section	.rodata.__func__.9661,"a",%progbits
 	.set	.LANCHOR166,. + 0
-	.type	__func__.9712, %object
-	.size	__func__.9712, 22
-__func__.9712:
+	.type	__func__.9661, %object
+	.size	__func__.9661, 22
+__func__.9661:
 	.ascii	"FtlRecoverySuperblock\000"
-	.section	.rodata.__func__.9769,"a",%progbits
+	.section	.rodata.__func__.9718,"a",%progbits
 	.set	.LANCHOR60,. + 0
-	.type	__func__.9769, %object
-	.size	__func__.9769, 16
-__func__.9769:
+	.type	__func__.9718, %object
+	.size	__func__.9718, 16
+__func__.9718:
 	.ascii	"make_superblock\000"
-	.section	.rodata.__func__.9790,"a",%progbits
+	.section	.rodata.__func__.9739,"a",%progbits
 	.set	.LANCHOR146,. + 0
-	.type	__func__.9790, %object
-	.size	__func__.9790, 18
-__func__.9790:
+	.type	__func__.9739, %object
+	.size	__func__.9739, 18
+__func__.9739:
 	.ascii	"SupperBlkListInit\000"
-	.section	.rodata.__func__.9815,"a",%progbits
+	.section	.rodata.__func__.9764,"a",%progbits
 	.set	.LANCHOR173,. + 0
-	.type	__func__.9815, %object
-	.size	__func__.9815, 21
-__func__.9815:
+	.type	__func__.9764, %object
+	.size	__func__.9764, 21
+__func__.9764:
 	.ascii	"FtlVpcCheckAndModify\000"
-	.section	.rodata.__func__.9831,"a",%progbits
+	.section	.rodata.__func__.9780,"a",%progbits
 	.set	.LANCHOR161,. + 0
-	.type	__func__.9831, %object
-	.size	__func__.9831, 14
-__func__.9831:
+	.type	__func__.9780, %object
+	.size	__func__.9780, 14
+__func__.9780:
 	.ascii	"ftl_check_vpc\000"
-	.section	.rodata.__func__.9916,"a",%progbits
+	.section	.rodata.__func__.9865,"a",%progbits
 	.set	.LANCHOR163,. + 0
-	.type	__func__.9916, %object
-	.size	__func__.9916, 25
-__func__.9916:
+	.type	__func__.9865, %object
+	.size	__func__.9865, 25
+__func__.9865:
 	.ascii	"allocate_data_superblock\000"
-	.section	.rodata.__func__.9937,"a",%progbits
+	.section	.rodata.__func__.9886,"a",%progbits
 	.set	.LANCHOR174,. + 0
-	.type	__func__.9937, %object
-	.size	__func__.9937, 29
-__func__.9937:
+	.type	__func__.9886, %object
+	.size	__func__.9886, 29
+__func__.9886:
 	.ascii	"allocate_new_data_superblock\000"
-	.section	.rodata.__func__.9944,"a",%progbits
+	.section	.rodata.__func__.9893,"a",%progbits
 	.set	.LANCHOR88,. + 0
-	.type	__func__.9944, %object
-	.size	__func__.9944, 19
-__func__.9944:
+	.type	__func__.9893, %object
+	.size	__func__.9893, 19
+__func__.9893:
 	.ascii	"get_new_active_ppa\000"
-	.section	.rodata.__func__.9957,"a",%progbits
+	.section	.rodata.__func__.9906,"a",%progbits
 	.set	.LANCHOR164,. + 0
-	.type	__func__.9957, %object
-	.size	__func__.9957, 16
-__func__.9957:
+	.type	__func__.9906, %object
+	.size	__func__.9906, 16
+__func__.9906:
 	.ascii	"update_vpc_list\000"
-	.section	.rodata.__func__.9964,"a",%progbits
+	.section	.rodata.__func__.9913,"a",%progbits
 	.set	.LANCHOR165,. + 0
-	.type	__func__.9964, %object
-	.size	__func__.9964, 20
-__func__.9964:
+	.type	__func__.9913, %object
+	.size	__func__.9913, 20
+__func__.9913:
 	.ascii	"decrement_vpc_count\000"
+	.section	.rodata.__func__.9983,"a",%progbits
+	.set	.LANCHOR176,. + 0
+	.type	__func__.9983, %object
+	.size	__func__.9983, 19
+__func__.9983:
+	.ascii	"FtlGcFreeTempBlock\000"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",%progbits,1
 .LC105:
 	.ascii	"decrement_vpc_count %x = %d\012\000"
@@ -16360,16 +16449,7 @@ __func__.9964:
 	.ascii	"\012\000"
 	.section	.rodata.rknand_proc_ftlread.str1.1,"aMS",%progbits,1
 .LC70:
-	.ascii	"SFTL version: 5.0.48 20181029\000"
+	.ascii	"SFTL version: 5.0.49 20181030\000"
 .LC71:
 	.ascii	"%s\012\000"
-	.section	.rodata.sftl_write.str1.1,"aMS",%progbits,1
-.LC114:
-	.ascii	"write_idblock fix data %x %x %x\012\000"
-.LC115:
-	.ascii	"write_idblock fail! %x %x %x %x\012\000"
-.LC116:
-	.ascii	"%s idb buffer alloc fail\012\000"
-.LC117:
-	.ascii	"%p %x %p %x\012\000"
 	.hidden	free
diff --git a/drivers/rkflash/rk_sftl_arm_v8.S b/drivers/rkflash/rk_sftl_arm_v8.S
index 04304422f9..02cb67bcaf 100644
--- a/drivers/rkflash/rk_sftl_arm_v8.S
+++ b/drivers/rkflash/rk_sftl_arm_v8.S
@@ -2,7 +2,7 @@
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:    GPL-2.0
- * date: 2018-10-29
+ * date: 2018-11-29
  */
 	.arch armv8-a+nosimd
 	.file	"rk_sftl.c"
@@ -111,59 +111,61 @@ FtlConstantsInit:
 	stp	x29, x30, [sp, -16]!
 	mov	x5, x0
 	adrp	x1, .LANCHOR11
+	adrp	x6, .LANCHOR12
 	add	x29, sp, 0
-	ldrh	w2, [x0]
+	ldrh	w3, [x0]
 	adrp	x0, .LANCHOR9
 	ldrh	w4, [x5, 2]
-	strh	w2, [x0, #:lo12:.LANCHOR9]
+	strh	w3, [x0, #:lo12:.LANCHOR9]
 	adrp	x0, .LANCHOR10
+	ldrh	w7, [x5, 14]
 	strh	w4, [x0, #:lo12:.LANCHOR10]
 	ldrh	w0, [x5, 4]
+	cmp	w7, 4
 	strh	w0, [x1, #:lo12:.LANCHOR11]
-	ldrh	w1, [x5, 14]
-	cmp	w1, 4
+	adrp	x1, .LANCHOR6
+	ldrh	w2, [x5, 6]
+	strh	w2, [x1, #:lo12:.LANCHOR6]
+	strh	w7, [x6, #:lo12:.LANCHOR12]
 	bne	.L10
-	ldrh	w1, [x5, 6]
-	adrp	x3, .LANCHOR6
-	lsr	w1, w1, 1
-	strh	w1, [x3, #:lo12:.LANCHOR6]
-	adrp	x1, .LANCHOR12
-	mov	w3, 8
-	strh	w3, [x1, #:lo12:.LANCHOR12]
+	lsr	w2, w2, 1
+	strh	w2, [x1, #:lo12:.LANCHOR6]
+	mov	w2, 8
+	strh	w2, [x6, #:lo12:.LANCHOR12]
 .L10:
-	adrp	x3, .LANCHOR13
-	add	x3, x3, :lo12:.LANCHOR13
-	mov	x1, 0
+	adrp	x7, .LANCHOR13
+	add	x7, x7, :lo12:.LANCHOR13
+	mov	x2, 0
 .L11:
-	strb	w1, [x1, x3]
-	add	x1, x1, 1
-	cmp	x1, 32
+	strb	w2, [x2, x7]
+	add	x2, x2, 1
+	cmp	x2, 32
 	bne	.L11
-	adrp	x1, .LANCHOR14
-	mov	w3, 5
-	cmp	w2, 1
-	strh	w3, [x1, #:lo12:.LANCHOR14]
-	adrp	x3, .LANCHOR15
-	strh	wzr, [x3, #:lo12:.LANCHOR15]
+	adrp	x2, .LANCHOR14
+	mov	w7, 5
+	cmp	w3, 1
+	strh	w7, [x2, #:lo12:.LANCHOR14]
+	adrp	x7, .LANCHOR15
+	strh	wzr, [x7, #:lo12:.LANCHOR15]
 	bne	.L12
-	strh	w2, [x1, #:lo12:.LANCHOR14]
+	strh	w3, [x2, #:lo12:.LANCHOR14]
 .L12:
-	adrp	x1, .LANCHOR16
-	mov	w2, 640
+	adrp	x2, .LANCHOR16
+	mov	w3, 640
 	mul	w4, w4, w0
-	strh	w2, [x1, #:lo12:.LANCHOR16]
-	adrp	x1, .LANCHOR3
-	and	w4, w4, 65535
-	strh	w4, [x1, #:lo12:.LANCHOR3]
-	adrp	x1, .LANCHOR6
+	strh	w3, [x2, #:lo12:.LANCHOR16]
+	adrp	x2, .LANCHOR3
 	ldrh	w3, [x1, #:lo12:.LANCHOR6]
+	and	w4, w4, 65535
 	adrp	x1, .LANCHOR17
+	strh	w4, [x2, #:lo12:.LANCHOR3]
 	mul	w0, w0, w3
 	and	w0, w0, 65535
 	strh	w0, [x1, #:lo12:.LANCHOR17]
 	bl	Ftl_log2
 	ldrh	w7, [x5, 12]
 	adrp	x1, .LANCHOR18
+	ldrh	w6, [x6, #:lo12:.LANCHOR12]
 	adrp	x8, .LANCHOR19
 	strh	w0, [x1, #:lo12:.LANCHOR18]
 	adrp	x0, .LANCHOR20
@@ -172,54 +174,52 @@ FtlConstantsInit:
 	strh	w7, [x0, #:lo12:.LANCHOR20]
 	adrp	x0, .LANCHOR21
 	strh	w1, [x0, #:lo12:.LANCHOR21]
-	adrp	x0, .LANCHOR12
-	ldrh	w6, [x0, #:lo12:.LANCHOR12]
 	mov	w0, w6
 	bl	Ftl_log2
-	and	w1, w0, 65535
+	and	w10, w0, 65535
 	adrp	x2, .LANCHOR22
-	adrp	x10, .LANCHOR23
-	ldrh	w5, [x5, 20]
+	ubfiz	w1, w6, 9, 7
 	strh	w0, [x2, #:lo12:.LANCHOR22]
-	ubfiz	w0, w6, 9, 7
-	strh	w0, [x10, #:lo12:.LANCHOR23]
-	adrp	x10, .LANCHOR24
-	ubfx	w0, w0, 8, 8
-	strh	w0, [x10, #:lo12:.LANCHOR24]
+	adrp	x0, .LANCHOR23
+	strh	w1, [x0, #:lo12:.LANCHOR23]
+	adrp	x0, .LANCHOR24
+	ubfx	w1, w1, 8, 8
+	strh	w1, [x0, #:lo12:.LANCHOR24]
 	adrp	x0, .LANCHOR25
-	strh	w5, [x0, #:lo12:.LANCHOR25]
+	ldrh	w1, [x5, 20]
+	adrp	x5, .LANCHOR27
+	strh	w1, [x0, #:lo12:.LANCHOR25]
 	mul	w0, w4, w3
-	adrp	x5, .LANCHOR8
-	str	w0, [x5, #:lo12:.LANCHOR8]
-	adrp	x5, .LANCHOR26
+	adrp	x1, .LANCHOR8
+	str	w0, [x1, #:lo12:.LANCHOR8]
+	adrp	x1, .LANCHOR26
 	mul	w0, w0, w6
 	mul	w6, w6, w7
 	mul	w0, w0, w7
 	mov	x7, x2
 	asr	w0, w0, 11
-	str	w0, [x5, #:lo12:.LANCHOR26]
+	str	w0, [x1, #:lo12:.LANCHOR26]
 	mov	w0, 5120
-	adrp	x5, .LANCHOR27
 	sdiv	w0, w0, w6
 	and	w0, w0, 65535
 	cmp	w0, 4
 	bls	.L13
 .L19:
 	strh	w0, [x5, #:lo12:.LANCHOR27]
-	adrp	x2, .LANCHOR28
+	adrp	x1, .LANCHOR28
 	mov	w0, 640
 	lsl	w3, w3, 6
-	asr	w0, w0, w1
+	asr	w0, w0, w10
 	add	w0, w0, 2
-	add	w1, w1, 9
-	strh	w0, [x2, #:lo12:.LANCHOR28]
-	adrp	x0, .LANCHOR29
-	cmp	w4, 1
-	asr	w3, w3, w1
+	strh	w0, [x1, #:lo12:.LANCHOR28]
+	add	w0, w10, 9
 	adrp	x1, .LANCHOR30
+	cmp	w4, 1
+	asr	w3, w3, w0
+	adrp	x0, .LANCHOR29
+	adrp	x6, .LANCHOR2
 	strh	w3, [x0, #:lo12:.LANCHOR29]
 	and	w3, w3, 65535
-	adrp	x6, .LANCHOR2
 	mul	w0, w3, w4
 	add	w3, w3, 8
 	str	w0, [x1, #:lo12:.LANCHOR30]
@@ -9656,11 +9656,11 @@ sftl_deinit:
 	mov	w0, 0
 	ret
 	.size	sftl_deinit, .-sftl_deinit
-	.section	.text.FtlDiscard,"ax",@progbits
+	.section	.text.sftl_discard,"ax",@progbits
 	.align	2
-	.global	FtlDiscard
-	.type	FtlDiscard, %function
-FtlDiscard:
+	.global	sftl_discard
+	.type	sftl_discard, %function
+sftl_discard:
 	stp	x29, x30, [sp, -80]!
 	add	w2, w0, w1
 	add	x29, sp, 0
@@ -9743,7 +9743,7 @@ FtlDiscard:
 .L1346:
 	mov	w0, -1
 	b	.L1338
-	.size	FtlDiscard, .-FtlDiscard
+	.size	sftl_discard, .-sftl_discard
 	.section	.text.FtlVpcCheckAndModify,"ax",@progbits
 	.align	2
 	.global	FtlVpcCheckAndModify
@@ -10003,7 +10003,7 @@ FtlProgPages:
 	bcc	.L1385
 	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
-	mov	w2, 955
+	mov	w2, 957
 	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
@@ -10045,7 +10045,7 @@ FtlProgPages:
 	bcc	.L1380
 	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
-	mov	w2, 970
+	mov	w2, 972
 	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
@@ -11759,7 +11759,7 @@ FtlWrite:
 	bcc	.L1617
 	adrp	x1, .LANCHOR183
 	adrp	x0, .LC1
-	mov	w2, 1011
+	mov	w2, 1013
 	add	x1, x1, :lo12:.LANCHOR183
 	add	x0, x0, :lo12:.LC1
 	bl	printf
@@ -11808,7 +11808,7 @@ FtlWrite:
 	bcc	.L1622
 	adrp	x1, .LANCHOR183
 	adrp	x0, .LC1
-	mov	w2, 1044
+	mov	w2, 1046
 	add	x1, x1, :lo12:.LANCHOR183
 	add	x0, x0, :lo12:.LC1
 	bl	printf
@@ -11837,7 +11837,7 @@ FtlWrite:
 	bcs	.L1643
 	adrp	x1, .LANCHOR183
 	adrp	x0, .LC1
-	mov	w2, 1121
+	mov	w2, 1123
 	add	x1, x1, :lo12:.LANCHOR183
 	add	x0, x0, :lo12:.LC1
 	bl	printf
@@ -11917,7 +11917,7 @@ FtlWrite:
 	bcc	.L1639
 	adrp	x1, .LANCHOR183
 	adrp	x0, .LC1
-	mov	w2, 1112
+	mov	w2, 1114
 	add	x1, x1, :lo12:.LANCHOR183
 	add	x0, x0, :lo12:.LC1
 	bl	printf
@@ -12022,7 +12022,7 @@ FtlWrite:
 	ldr	w0, [x23, 8]
 	cmp	w20, w0
 	beq	.L1637
-	mov	w2, 1097
+	mov	w2, 1099
 	adrp	x1, .LANCHOR183
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR183
@@ -12093,355 +12093,6 @@ FtlWrite:
 	mov	w0, -1
 	b	.L1612
 	.size	FtlWrite, .-FtlWrite
-	.section	.text.sftl_write,"ax",@progbits
-	.align	2
-	.global	sftl_write
-	.type	sftl_write, %function
-sftl_write:
-	stp	x29, x30, [sp, -256]!
-	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	mov	w21, w0
-	stp	x19, x20, [sp, 16]
-	add	w20, w0, w1
-	stp	x23, x24, [sp, 48]
-	sub	w22, w20, #1
-	stp	x25, x26, [sp, 64]
-	mov	w24, w1
-	stp	x27, x28, [sp, 80]
-	cmp	w22, 63
-	str	x2, [x29, 168]
-	adrp	x25, .LANCHOR184
-	bls	.L1664
-	cmp	w0, 575
-	bls	.L1665
-.L1664:
-	ldr	w0, [x25, #:lo12:.LANCHOR184]
-	cbz	w0, .L1667
-	adrp	x0, .LANCHOR185
-	str	x0, [x29, 128]
-	mov	w1, 35899
-	ldr	x23, [x0, #:lo12:.LANCHOR185]
-	movk	w1, 0xfcdc, lsl 16
-	ldr	w2, [x23]
-	cmp	w2, w1
-	beq	.L1668
-.L1685:
-	ldr	x0, [x29, 128]
-	str	wzr, [x25, #:lo12:.LANCHOR184]
-	ldr	x0, [x0, #:lo12:.LANCHOR185]
-	bl	free
-	adrp	x0, .LANCHOR186
-	ldr	x0, [x0, #:lo12:.LANCHOR186]
-	bl	free
-.L1667:
-	ldr	x3, [x29, 168]
-	mov	w2, w24
-	mov	w1, w21
-	mov	w0, 0
-	bl	FtlWrite
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 256
-	ret
-.L1668:
-	adrp	x1, .LANCHOR0
-	add	x0, x1, :lo12:.LANCHOR0
-	mov	w2, 65535
-	mov	w4, 4097
-	str	x1, [x29, 152]
-	ldrh	w20, [x0, 14]
-	ldrh	w19, [x0, 10]
-	mov	x0, 262140
-	add	x3, x23, x0
-	mov	w0, 0
-.L1672:
-	ldr	w1, [x3]
-	cbnz	w1, .L1669
-	ldr	w1, [x23, w0, uxtw 2]
-	add	w0, w0, 1
-	str	w1, [x3], -4
-	cmp	w0, w4
-	sub	w2, w2, #1
-	csel	w0, w0, wzr, cc
-	cmp	w2, 4096
-	bne	.L1672
-	mov	w22, 512
-	b	.L1671
-.L1669:
-	add	w22, w2, 127
-	adrp	x0, .LC114
-	lsr	w22, w22, 7
-	add	x0, x0, :lo12:.LC114
-	mov	w3, w22
-	bl	printf
-.L1671:
-	and	w20, w20, 255
-	adrp	x26, .LANCHOR105
-	mul	w19, w19, w20
-	and	w0, w19, 65535
-	str	w0, [x29, 188]
-	sub	w20, w0, #1
-	mov	w19, 0
-	add	w20, w20, w22
-	udiv	w20, w20, w0
-	mul	w0, w0, w20
-	stp	w20, wzr, [x29, 176]
-	str	w0, [x29, 184]
-	lsl	w0, w22, 7
-	str	w0, [x29, 148]
-	add	x0, x26, :lo12:.LANCHOR105
-	str	x0, [x29, 120]
-	b	.L1684
-.L1675:
-	add	w0, w5, w4
-	ldr	x3, [x29, 120]
-	ubfiz	x2, x4, 9, 16
-	stp	w5, w4, [x29, 100]
-	str	w6, [x29, 112]
-	add	x2, x23, x2
-	udiv	w0, w0, w27
-	str	w7, [x29, 144]
-	ldr	x8, [x3, 16]
-	add	x3, x29, 192
-	and	w0, w0, 65535
-	mul	w1, w0, w27
-	stp	w1, w7, [x29, 192]
-	udiv	w1, w6, w27
-	add	w1, w1, w0
-	mov	w0, 0
-	blr	x8
-	ldp	w5, w4, [x29, 100]
-	ldr	w0, [x29, 136]
-	ldr	w6, [x29, 112]
-	add	w4, w0, w4
-	ldr	w7, [x29, 144]
-	and	w4, w4, 65535
-	b	.L1674
-.L1677:
-	add	w27, w8, w27
-	mov	w0, 0
-	and	w27, w27, 65535
-	b	.L1676
-.L1682:
-	mov	x27, x2
-	ldr	w4, [x0, x1, lsl 2]
-	lsl	x5, x1, 2
-	add	x2, x2, 4
-	add	x1, x1, 1
-	ldr	w3, [x27]
-	cmp	w4, w3
-	beq	.L1678
-	mov	x2, 512
-	mov	w1, 0
-	str	x5, [x29, 136]
-	bl	memset
-	ldr	x0, [x29, 160]
-	mov	w4, w28
-	ldr	x5, [x29, 136]
-	mov	w1, w19
-	ldr	w3, [x27]
-	add	x27, x26, :lo12:.LANCHOR105
-	ldr	x0, [x0, #:lo12:.LANCHOR186]
-	ldr	w2, [x0, x5]
-	adrp	x0, .LC115
-	add	x0, x0, :lo12:.LC115
-	bl	printf
-	ldr	x2, [x27, 8]
-	mov	w1, w19
-	mov	w0, 0
-	blr	x2
-	cmp	w20, 1
-	bls	.L1692
-	ldr	x2, [x27, 8]
-	ldr	w0, [x29, 188]
-	add	w1, w0, w19
-	mov	w0, 0
-	blr	x2
-.L1692:
-	ldr	w1, [x29, 184]
-	ldr	w0, [x29, 176]
-	add	w19, w19, w1
-	ldr	w1, [x29, 176]
-	add	w0, w20, w0
-	cmp	w1, 15
-	bhi	.L1685
-	str	w0, [x29, 176]
-.L1684:
-	adrp	x5, .LANCHOR186
-	mov	x2, 512
-	mov	w1, 0
-	str	x5, [x29, 160]
-	ldr	x0, [x5, #:lo12:.LANCHOR186]
-	bl	memset
-	ldr	x0, [x29, 152]
-	add	x4, x26, :lo12:.LANCHOR105
-	str	x4, [x29, 104]
-	add	x0, x0, :lo12:.LANCHOR0
-	ldr	x6, [x4, 8]
-	ldrh	w3, [x0, 14]
-	ldrh	w2, [x0, 10]
-	mov	w0, 0
-	and	w27, w3, 255
-	str	w3, [x29, 112]
-	str	w27, [x29, 136]
-	udiv	w1, w19, w3
-	mul	w2, w27, w2
-	and	w28, w2, 65535
-	blr	x6
-	ldr	w0, [x29, 184]
-	ldr	w3, [x29, 112]
-	cmp	w0, w28
-	ldr	x4, [x29, 104]
-	bls	.L1673
-	add	w1, w28, w19
-	ldr	x4, [x4, 8]
-	mov	w0, 0
-	udiv	w1, w1, w3
-	blr	x4
-.L1673:
-	udiv	w5, w19, w28
-	mov	w4, 0
-	mov	w7, 61424
-	msub	w5, w5, w28, w19
-	sub	w6, w19, w5
-.L1674:
-	ldr	w0, [x29, 184]
-	cmp	w0, w4
-	bhi	.L1675
-	ldr	x0, [x29, 160]
-	add	x10, x26, :lo12:.LANCHOR105
-	mov	w27, 0
-	ldr	x6, [x0, #:lo12:.LANCHOR186]
-	ldr	x0, [x29, 152]
-	add	x0, x0, :lo12:.LANCHOR0
-	ldrh	w4, [x0, 14]
-	ldrh	w5, [x0, 10]
-	and	w28, w4, 255
-	mov	w4, w28
-	mul	w5, w28, w5
-	and	w0, w5, 65535
-	udiv	w5, w19, w0
-	msub	w5, w5, w0, w19
-	and	w1, w5, 65535
-	sub	w7, w19, w5
-	sdiv	w0, w1, w28
-	msub	w0, w0, w28, w1
-	and	w0, w0, 65535
-.L1676:
-	cmp	w27, w22
-	bcs	.L1680
-	add	w1, w5, w27
-	sub	w8, w4, w0
-	add	w0, w0, w7
-	ldr	x11, [x10, 24]
-	and	w8, w8, 65535
-	ubfiz	x2, x27, 9, 16
-	udiv	w1, w1, w28
-	add	x2, x6, x2
-	stp	w4, w8, [x29, 96]
-	add	x3, x29, 192
-	str	w7, [x29, 104]
-	str	x10, [x29, 112]
-	and	w1, w1, 65535
-	str	x6, [x29, 136]
-	str	w5, [x29, 144]
-	madd	w1, w1, w28, w0
-	mov	w0, 0
-	udiv	w1, w1, w28
-	blr	x11
-	cmn	w0, #1
-	ldp	w4, w8, [x29, 96]
-	ldr	w7, [x29, 104]
-	ldr	w5, [x29, 144]
-	ldr	x10, [x29, 112]
-	ldr	x6, [x29, 136]
-	bne	.L1677
-.L1680:
-	ldr	x0, [x29, 160]
-	mov	x2, x23
-	mov	x1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR186]
-.L1678:
-	ldr	w3, [x29, 148]
-	mov	w28, w1
-	cmp	w1, w3
-	bcc	.L1682
-	ldr	w0, [x29, 180]
-	add	w0, w0, 1
-	str	w0, [x29, 180]
-	cmp	w0, 5
-	bls	.L1692
-	b	.L1685
-.L1665:
-	cmp	w0, 64
-	bne	.L1686
-	adrp	x19, .LANCHOR185
-	mov	w0, 262144
-	bl	ftl_malloc
-	str	x0, [x19, #:lo12:.LANCHOR185]
-	mov	w0, 262144
-	bl	ftl_malloc
-	mov	x1, x0
-	adrp	x0, .LANCHOR186
-	str	x1, [x0, #:lo12:.LANCHOR186]
-	ldr	x0, [x19, #:lo12:.LANCHOR185]
-	cbz	x0, .L1687
-	cbz	x1, .L1687
-	mov	w1, 1
-	mov	w2, 262144
-	str	w1, [x25, #:lo12:.LANCHOR184]
-	mov	w1, 0
-	bl	ftl_memset
-.L1686:
-	ldr	w0, [x25, #:lo12:.LANCHOR184]
-	cbz	w0, .L1667
-	adrp	x0, .LANCHOR185
-	cmp	w21, 63
-	ldr	x1, [x0, #:lo12:.LANCHOR185]
-	bhi	.L1689
-	mov	w23, 64
-	ldr	x0, [x29, 168]
-	sub	w23, w23, w21
-	mov	x19, x1
-	sub	w25, w24, w23
-	ubfiz	x23, x23, 9, 25
-	add	x23, x0, x23
-.L1690:
-	cmp	w22, 575
-	bls	.L1691
-	sub	w25, w25, w20
-	sub	w25, w25, #446
-.L1691:
-	mov	w4, w25
-	mov	x3, x19
-	mov	w2, 262144
-	adrp	x0, .LC117
-	add	x0, x0, :lo12:.LC117
-	bl	printf
-	lsl	w2, w25, 9
-	mov	x1, x23
-	mov	x0, x19
-	bl	ftl_memcpy
-	b	.L1667
-.L1687:
-	adrp	x1, .LANCHOR187
-	adrp	x0, .LC116
-	add	x1, x1, :lo12:.LANCHOR187
-	add	x0, x0, :lo12:.LC116
-	bl	printf
-	b	.L1686
-.L1689:
-	lsl	w19, w21, 7
-	mov	w25, w24
-	sub	w19, w19, #8192
-	ldr	x23, [x29, 168]
-	add	x19, x1, x19, lsl 2
-	b	.L1690
-	.size	sftl_write, .-sftl_write
 	.section	.text.FtlMakeBbt,"ax",@progbits
 	.align	2
 	.global	FtlMakeBbt
@@ -12466,42 +12117,42 @@ FtlMakeBbt:
 	adrp	x0, .LANCHOR10
 	add	x0, x0, :lo12:.LANCHOR10
 	str	x0, [x29, 120]
-.L1710:
+.L1664:
 	ldr	x0, [x29, 120]
 	ldrh	w0, [x0]
 	cmp	w22, w0
-	bcc	.L1716
+	bcc	.L1670
 	adrp	x21, .LANCHOR25
 	add	x21, x21, :lo12:.LANCHOR25
 	mov	w19, 0
-.L1717:
+.L1671:
 	ldrh	w0, [x21]
 	cmp	w0, w19
-	bhi	.L1718
+	bhi	.L1672
 	add	x21, x20, :lo12:.LANCHOR37
 	mov	w22, 65535
 	ldrh	w19, [x21, 12]
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L1719:
+.L1673:
 	ldrh	w0, [x21, 12]
 	sub	w0, w0, #47
 	cmp	w0, w19
-	bgt	.L1723
+	bgt	.L1677
 	mov	w0, w19
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L1720
+	beq	.L1674
 	mov	w0, w19
 	bl	FlashTestBlk
-	cbz	w0, .L1721
+	cbz	w0, .L1675
 	mov	w0, w19
 	bl	FtlBbmMapBadBlock
-.L1720:
+.L1674:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L1719
-.L1716:
+	b	.L1673
+.L1670:
 	adrp	x2, .LANCHOR123
 	adrp	x0, .LANCHOR115
 	add	x19, x28, :lo12:.LANCHOR148
@@ -12513,7 +12164,7 @@ FtlMakeBbt:
 	stp	x0, x26, [x19, 8]
 	adrp	x23, .LANCHOR17
 	str	x2, [x29, 112]
-	beq	.L1711
+	beq	.L1665
 	ldrh	w4, [x23, #:lo12:.LANCHOR17]
 	mov	w2, 1
 	madd	w27, w4, w22, w1
@@ -12528,14 +12179,14 @@ FtlMakeBbt:
 	add	w2, w2, 7
 	lsr	w2, w2, 3
 	bl	ftl_memcpy
-.L1712:
+.L1666:
 	mov	w0, w27
 	add	w22, w22, 1
 	bl	FtlBbmMapBadBlock
 	add	x24, x24, 8
 	add	x21, x21, 2
-	b	.L1710
-.L1711:
+	b	.L1664
+.L1665:
 	mov	w1, w22
 	bl	FlashGetBadBlockList
 	ldr	x0, [x19, 8]
@@ -12548,12 +12199,12 @@ FtlMakeBbt:
 	add	x0, x0, :lo12:.LANCHOR137
 	and	w19, w19, 65535
 	str	x0, [x29, 104]
-.L1713:
+.L1667:
 	ldrh	w0, [x23]
 	madd	w0, w22, w0, w19
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L1714
+	beq	.L1668
 	ldr	x0, [x29, 112]
 	mov	w2, 16
 	strh	w19, [x21]
@@ -12591,29 +12242,29 @@ FtlMakeBbt:
 	bl	FlashProgPages
 	ldr	w0, [x25]
 	cmn	w0, #1
-	bne	.L1712
+	bne	.L1666
 	mov	w0, w27
 	bl	FtlBbmMapBadBlock
-	b	.L1713
-.L1714:
+	b	.L1667
+.L1668:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L1713
-.L1718:
+	b	.L1667
+.L1672:
 	mov	w0, w19
 	add	w19, w19, 1
 	bl	FtlBbmMapBadBlock
 	and	w19, w19, 65535
-	b	.L1717
-.L1721:
+	b	.L1671
+.L1675:
 	ldrh	w0, [x21]
 	cmp	w0, w22
-	bne	.L1722
+	bne	.L1676
 	strh	w19, [x21]
-	b	.L1720
-.L1722:
+	b	.L1674
+.L1676:
 	strh	w19, [x21, 4]
-.L1723:
+.L1677:
 	adrp	x0, .LANCHOR106
 	add	x19, x20, :lo12:.LANCHOR37
 	ldrh	w1, [x20, #:lo12:.LANCHOR37]
@@ -12670,9 +12321,9 @@ ftl_low_format:
 	str	wzr, [x20, #:lo12:.LANCHOR70]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	w0, .L1730
+	cbz	w0, .L1684
 	bl	FtlMakeBbt
-.L1730:
+.L1684:
 	adrp	x23, .LANCHOR12
 	adrp	x0, .LANCHOR118
 	mov	w6, 23752
@@ -12683,31 +12334,31 @@ ftl_low_format:
 	lsl	w1, w1, 7
 	ldr	x5, [x0, #:lo12:.LANCHOR119]
 	mov	w0, 0
-.L1731:
+.L1685:
 	cmp	w0, w1
-	blt	.L1732
+	blt	.L1686
 	adrp	x21, .LANCHOR5
 	adrp	x22, .LANCHOR6
 	add	x26, x22, :lo12:.LANCHOR6
 	mov	w19, 0
 	ldrh	w25, [x21, #:lo12:.LANCHOR5]
-.L1733:
+.L1687:
 	ldrh	w0, [x26]
 	cmp	w0, w25
-	bhi	.L1734
+	bhi	.L1688
 	adrp	x25, .LANCHOR3
 	sub	w1, w19, #2
 	ldrh	w0, [x25, #:lo12:.LANCHOR3]
 	cmp	w1, w0, lsl 1
-	bgt	.L1735
-.L1739:
+	bgt	.L1689
+.L1693:
 	add	x26, x21, :lo12:.LANCHOR5
 	mov	w19, 0
 	mov	w24, 0
-.L1736:
+.L1690:
 	ldrh	w0, [x26]
 	cmp	w0, w24
-	bhi	.L1740
+	bhi	.L1694
 	adrp	x0, .LANCHOR111
 	ldrh	w1, [x22, #:lo12:.LANCHOR6]
 	ldrh	w4, [x25, #:lo12:.LANCHOR3]
@@ -12724,28 +12375,28 @@ ftl_low_format:
 	mov	w6, 24
 	mul	w6, w4, w6
 	cmp	w19, w6
-	ble	.L1741
+	ble	.L1695
 	sub	w1, w1, w19
 	udiv	w1, w1, w4
 	str	w1, [x3, #:lo12:.LANCHOR61]
 	lsr	w1, w1, 5
 	add	w1, w1, 24
 	strh	w1, [x2, #:lo12:.LANCHOR78]
-.L1741:
+.L1695:
 	adrp	x1, .LANCHOR15
 	ldrh	w1, [x1, #:lo12:.LANCHOR15]
-	cbz	w1, .L1743
+	cbz	w1, .L1697
 	ldrh	w6, [x2, #:lo12:.LANCHOR78]
 	add	w6, w6, w1, lsr 1
 	strh	w6, [x2, #:lo12:.LANCHOR78]
 	mul	w6, w1, w4
 	cmp	w19, w6
-	bge	.L1743
+	bge	.L1697
 	add	w1, w1, 32
 	str	w5, [x3, #:lo12:.LANCHOR61]
 	add	w1, w0, w1
 	strh	w1, [x2, #:lo12:.LANCHOR78]
-.L1743:
+.L1697:
 	ldrh	w1, [x2, #:lo12:.LANCHOR78]
 	adrp	x25, .LANCHOR152
 	ldr	w0, [x3, #:lo12:.LANCHOR61]
@@ -12789,20 +12440,20 @@ ftl_low_format:
 	ldr	x0, [x0, #:lo12:.LANCHOR1]
 	strb	wzr, [x19, 6]
 	bl	ftl_memset
-.L1745:
+.L1699:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1746
+	cbnz	w1, .L1700
 	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L1745
-.L1732:
+	b	.L1699
+.L1686:
 	ubfiz	x3, x0, 2, 16
 	mvn	w2, w0
 	orr	w2, w0, w2, lsl 16
@@ -12810,8 +12461,8 @@ ftl_low_format:
 	and	w0, w0, 65535
 	str	w2, [x4, x3]
 	str	w6, [x5, x3]
-	b	.L1731
-.L1734:
+	b	.L1685
+.L1688:
 	mov	w0, w25
 	mov	w1, 1
 	add	w25, w25, 1
@@ -12819,8 +12470,8 @@ ftl_low_format:
 	add	w19, w19, w0
 	and	w25, w25, 65535
 	and	w19, w19, 65535
-	b	.L1733
-.L1735:
+	b	.L1687
+.L1689:
 	udiv	w0, w19, w0
 	adrp	x1, .LANCHOR31
 	ldr	w19, [x1, #:lo12:.LANCHOR31]
@@ -12830,17 +12481,17 @@ ftl_low_format:
 	add	x24, x22, :lo12:.LANCHOR6
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	w19, [x21, #:lo12:.LANCHOR5]
-.L1737:
+.L1691:
 	ldrh	w0, [x24]
 	cmp	w0, w19
-	bls	.L1739
+	bls	.L1693
 	mov	w0, w19
 	add	w19, w19, 1
 	mov	w1, 1
 	and	w19, w19, 65535
 	bl	FtlLowFormatEraseBlock
-	b	.L1737
-.L1740:
+	b	.L1691
+.L1694:
 	mov	w0, w24
 	mov	w1, 0
 	add	w24, w24, 1
@@ -12848,8 +12499,8 @@ ftl_low_format:
 	add	w19, w19, w0
 	and	w24, w24, 65535
 	and	w19, w19, 65535
-	b	.L1736
-.L1746:
+	b	.L1690
+.L1700:
 	ldr	w1, [x20, #:lo12:.LANCHOR70]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
@@ -12869,20 +12520,20 @@ ftl_low_format:
 	mov	w1, 1
 	strb	wzr, [x0, 6]
 	strb	w1, [x0, 8]
-.L1747:
+.L1701:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1748
+	cbnz	w1, .L1702
 	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L1747
-.L1748:
+	b	.L1701
+.L1702:
 	ldr	w1, [x20, #:lo12:.LANCHOR70]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
@@ -12908,11 +12559,11 @@ ftl_low_format:
 	str	w0, [x20, #:lo12:.LANCHOR70]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	w0, .L1749
+	cbnz	w0, .L1703
 	adrp	x0, .LANCHOR86
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR86]
-.L1749:
+.L1703:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -12929,6 +12580,444 @@ ftl_memcmp:
 	uxtw	x2, w2
 	b	memcmp
 	.size	ftl_memcmp, .-ftl_memcmp
+	.section	.text.FtlWriteToIDB,"ax",@progbits
+	.align	2
+	.global	FtlWriteToIDB
+	.type	FtlWriteToIDB, %function
+FtlWriteToIDB:
+	stp	x29, x30, [sp, -224]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	add	w23, w1, w0
+	stp	x25, x26, [sp, 64]
+	sub	w25, w23, #1
+	stp	x19, x20, [sp, 16]
+	cmp	w25, 63
+	stp	x21, x22, [sp, 32]
+	adrp	x24, .LANCHOR184
+	stp	x27, x28, [sp, 80]
+	bls	.L1710
+	mov	w19, w0
+	cmp	w0, 575
+	bls	.L1711
+.L1710:
+	ldr	w0, [x24, #:lo12:.LANCHOR184]
+	cbnz	w0, .L1712
+.L1779:
+	mov	w19, 0
+	b	.L1709
+.L1712:
+	adrp	x0, .LANCHOR185
+	str	x0, [x29, 120]
+	mov	w1, 35899
+	ldr	x23, [x0, #:lo12:.LANCHOR185]
+	movk	w1, 0xfcdc, lsl 16
+	ldr	w2, [x23]
+	cmp	w2, w1
+	bne	.L1714
+	adrp	x21, .LANCHOR0
+	add	x0, x21, :lo12:.LANCHOR0
+	mov	w19, 65535
+	mov	w3, 4097
+	ldrh	w1, [x0, 10]
+	mov	x0, 262140
+	add	x2, x23, x0
+	mov	w0, 0
+.L1718:
+	ldr	w4, [x2]
+	cbnz	w4, .L1715
+	ldr	w4, [x23, w0, uxtw 2]
+	add	w0, w0, 1
+	str	w4, [x2], -4
+	cmp	w0, w3
+	sub	w19, w19, #1
+	csel	w0, w0, wzr, cc
+	cmp	w19, 4096
+	bne	.L1718
+	mov	w19, 512
+	b	.L1717
+.L1715:
+	add	w19, w19, 127
+	lsr	w19, w19, 7
+.L1717:
+	add	w0, w19, 4
+	ubfiz	w1, w1, 2, 14
+	mov	w22, 0
+	udiv	w0, w0, w1
+	add	w0, w0, 1
+	stp	wzr, w0, [x29, 152]
+	lsl	w0, w19, 7
+	str	w0, [x29, 136]
+	adrp	x0, .LANCHOR105
+	add	x20, x0, :lo12:.LANCHOR105
+.L1741:
+	adrp	x26, .LANCHOR186
+	mov	w1, 0
+	mov	x2, 512
+	ldr	x0, [x26, #:lo12:.LANCHOR186]
+	bl	memset
+	str	x26, [x29, 144]
+	add	x0, x21, :lo12:.LANCHOR0
+	ldrh	w27, [x0, 10]
+	adrp	x0, .LANCHOR105
+	add	x0, x0, :lo12:.LANCHOR105
+	ldr	x1, [x0, 32]
+	mul	w25, w27, w22
+	cbz	x1, .L1749
+	ldr	x0, [x0, 40]
+	mov	w26, 6
+	cmp	x0, 0
+	mov	w0, 9
+	csel	w26, w26, w0, eq
+.L1719:
+	ldr	x2, [x20, 8]
+	mov	w1, w25
+	mov	w0, 0
+	blr	x2
+	ldr	w0, [x29, 156]
+	cmp	w0, 1
+	beq	.L1720
+	ldr	x2, [x20, 8]
+	add	w1, w27, w25
+	mov	w0, 0
+	blr	x2
+.L1720:
+	cmp	w26, 9
+	bne	.L1751
+	ldr	x0, [x29, 144]
+	mov	w2, 1024
+	mov	w1, 0
+	ldr	x28, [x0, #:lo12:.LANCHOR186]
+	mov	x0, x28
+	bl	ftl_memset
+	mov	w0, 18766
+	add	x5, x28, 12
+	movk	w0, 0x464e, lsl 16
+	str	w0, [x28]
+	mov	w0, 12
+	str	w0, [x28, 4]
+	mov	w0, 4
+	strb	w0, [x28, 17]
+	add	x0, x21, :lo12:.LANCHOR0
+	strb	wzr, [x28, 16]
+	strb	wzr, [x28, 20]
+	mov	x2, 0
+	strh	wzr, [x28, 22]
+	ldrh	w0, [x0, 10]
+	strh	w0, [x28, 18]
+	mov	w0, 16
+	strb	w0, [x28, 21]
+	mov	w0, 42982
+	str	wzr, [x28, 12]
+	movk	w0, 0x47c6, lsl 16
+.L1722:
+	lsr	w1, w0, 2
+	ldrb	w3, [x5, x2]
+	add	w1, w1, w0, lsl 5
+	add	x2, x2, 1
+	add	w1, w1, w3
+	cmp	x2, 12
+	eor	w0, w0, w1
+	bne	.L1722
+	str	w0, [x28, 8]
+.L1721:
+	ldr	w0, [x29, 156]
+	mov	x6, x23
+	mul	w0, w0, w27
+	mov	x27, 0
+	str	w0, [x29, 140]
+	add	w0, w25, 1
+	str	w0, [x29, 132]
+.L1723:
+	ldr	w0, [x29, 140]
+	mov	w1, w27
+	cmp	w27, w0
+	bcs	.L1730
+	cmp	w26, 9
+	bne	.L1724
+	ldr	w0, [x29, 132]
+	add	w0, w0, w1
+.L1778:
+	str	w0, [x29, 160]
+	mov	w0, 61424
+	str	w0, [x29, 164]
+	cmp	w1, 0
+	ccmp	w26, 9, 0, eq
+	bne	.L1726
+	ldr	x1, [x20, 32]
+	mov	w0, 70
+	str	x6, [x29, 104]
+	blr	x1
+	ldr	x7, [x20, 16]
+	add	x3, x29, 160
+	mov	x2, x28
+	mov	w1, w25
+	mov	w0, 0
+	blr	x7
+	mov	w1, w0
+	add	x0, x21, :lo12:.LANCHOR0
+	ldr	x2, [x20, 32]
+	str	w1, [x29, 112]
+	ldrb	w0, [x0, 22]
+	blr	x2
+	ldr	w1, [x29, 112]
+	ldr	x6, [x29, 104]
+	cmn	w1, #1
+	bne	.L1727
+.L1730:
+	ldr	x0, [x29, 144]
+	ldr	x26, [x0, #:lo12:.LANCHOR186]
+	add	x0, x21, :lo12:.LANCHOR0
+	ldrb	w28, [x0, 14]
+	ldrh	w0, [x0, 10]
+	mul	w1, w0, w22
+	str	w1, [x29, 140]
+	ldr	x1, [x20, 32]
+	cbnz	x1, .L1728
+	mov	w25, 6
+.L1729:
+	ldr	w1, [x29, 156]
+	mov	x27, 0
+	mul	w0, w1, w0
+	str	w0, [x29, 132]
+.L1732:
+	ldr	w0, [x29, 132]
+	mov	w1, w27
+	cmp	w0, w27
+	bls	.L1736
+	cmp	w27, 0
+	ccmp	w25, 9, 0, eq
+	bne	.L1733
+	ldr	x1, [x20, 32]
+	mov	w0, 70
+	blr	x1
+	ldr	x1, [x20, 40]
+	mov	w0, 2
+	blr	x1
+	ldr	x6, [x20, 24]
+	add	x3, x29, 160
+	ldr	w1, [x29, 140]
+	mov	x2, x26
+	mov	w0, 0
+	blr	x6
+	ldr	x1, [x20, 40]
+	mov	w0, w28
+	blr	x1
+	add	x0, x21, :lo12:.LANCHOR0
+	ldr	x1, [x20, 32]
+	ldrb	w0, [x0, 22]
+	blr	x1
+	ldr	w0, [x26]
+	mov	w1, 18766
+	movk	w1, 0x464e, lsl 16
+	cmp	w0, w1
+	beq	.L1734
+.L1736:
+	ldr	x0, [x29, 144]
+	mov	x2, x23
+	mov	x1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR186]
+.L1735:
+	ldr	w3, [x29, 136]
+	mov	w26, w1
+	cmp	w1, w3
+	bcc	.L1739
+	ldr	w0, [x29, 152]
+	add	w0, w0, 1
+	str	w0, [x29, 152]
+	cmp	w0, 5
+	bls	.L1738
+	b	.L1742
+.L1749:
+	mov	w26, 6
+	b	.L1719
+.L1751:
+	mov	x28, 0
+	b	.L1721
+.L1724:
+	add	w0, w1, w25
+	lsl	w0, w0, 2
+	b	.L1778
+.L1726:
+	ldr	x7, [x20, 16]
+	add	x3, x29, 160
+	mov	x2, x6
+	add	w1, w1, w25
+	mov	w0, 0
+	str	x6, [x29, 112]
+	blr	x7
+	cmn	w0, #1
+	beq	.L1730
+	ldr	x6, [x29, 112]
+	add	x6, x6, 2048
+.L1727:
+	add	x27, x27, 1
+	b	.L1723
+.L1728:
+	ldr	x1, [x20, 40]
+	mov	w25, 6
+	cmp	x1, 0
+	mov	w1, 9
+	csel	w25, w25, w1, eq
+	b	.L1729
+.L1733:
+	ldr	x6, [x20, 24]
+	add	x3, x29, 160
+	ldr	w0, [x29, 140]
+	mov	x2, x26
+	add	w1, w0, w1
+	mov	w0, 0
+	blr	x6
+	cmn	w0, #1
+	beq	.L1736
+	ldr	w0, [x29, 164]
+	mov	w1, 61424
+	cmp	w0, w1
+	bne	.L1736
+	add	x26, x26, 2048
+.L1734:
+	add	x27, x27, 1
+	b	.L1732
+.L1739:
+	mov	x25, x2
+	ldr	w4, [x0, x1, lsl 2]
+	lsl	x27, x1, 2
+	add	x2, x2, 4
+	add	x1, x1, 1
+	ldr	w3, [x25]
+	cmp	w4, w3
+	beq	.L1735
+	mov	x2, 512
+	mov	w1, 0
+	bl	memset
+	ldr	x0, [x29, 144]
+	mov	w1, w22
+	ldr	w3, [x25]
+	mov	w4, w26
+	ldr	x0, [x0, #:lo12:.LANCHOR186]
+	ldr	w2, [x0, x27]
+	adrp	x0, .LC114
+	add	x0, x0, :lo12:.LC114
+	bl	printf
+	add	x0, x21, :lo12:.LANCHOR0
+	ldr	x2, [x20, 8]
+	ldrh	w1, [x0, 10]
+	mov	w0, 0
+	mul	w1, w1, w22
+	blr	x2
+.L1738:
+	ldr	w0, [x29, 156]
+	add	w22, w22, w0
+	cmp	w22, 15
+	bls	.L1741
+	ldr	w0, [x29, 152]
+	cbnz	w0, .L1742
+.L1714:
+	mov	w19, -1
+.L1742:
+	ldr	x0, [x29, 120]
+	str	wzr, [x24, #:lo12:.LANCHOR184]
+	ldr	x0, [x0, #:lo12:.LANCHOR185]
+	bl	free
+	adrp	x0, .LANCHOR186
+	ldr	x0, [x0, #:lo12:.LANCHOR186]
+	bl	free
+.L1709:
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 224
+	ret
+.L1711:
+	mov	w21, w1
+	mov	x22, x2
+	cmp	w0, 64
+	bne	.L1743
+	adrp	x20, .LANCHOR185
+	mov	w0, 262144
+	bl	ftl_malloc
+	str	x0, [x20, #:lo12:.LANCHOR185]
+	mov	w0, 262144
+	bl	ftl_malloc
+	mov	x1, x0
+	adrp	x0, .LANCHOR186
+	str	x1, [x0, #:lo12:.LANCHOR186]
+	ldr	x0, [x20, #:lo12:.LANCHOR185]
+	cbz	x0, .L1744
+	cbz	x1, .L1744
+	mov	w1, 1
+	mov	w2, 262144
+	str	w1, [x24, #:lo12:.LANCHOR184]
+	mov	w1, 0
+	bl	ftl_memset
+.L1743:
+	ldr	w0, [x24, #:lo12:.LANCHOR184]
+	cbz	w0, .L1779
+	adrp	x0, .LANCHOR185
+	cmp	w19, 63
+	ldr	x1, [x0, #:lo12:.LANCHOR185]
+	bhi	.L1746
+	mov	w0, 64
+	sub	w19, w0, w19
+	sub	w21, w21, w19
+	ubfiz	x19, x19, 9, 25
+	add	x22, x22, x19
+	mov	x20, x1
+.L1747:
+	cmp	w25, 575
+	bls	.L1748
+	sub	w21, w21, w23
+	sub	w21, w21, #446
+.L1748:
+	mov	w4, w21
+	mov	x3, x20
+	mov	w2, 262144
+	adrp	x0, .LC116
+	add	x0, x0, :lo12:.LC116
+	bl	printf
+	lsl	w2, w21, 9
+	mov	x1, x22
+	mov	x0, x20
+	bl	ftl_memcpy
+	b	.L1779
+.L1744:
+	adrp	x1, .LANCHOR187
+	adrp	x0, .LC115
+	add	x1, x1, :lo12:.LANCHOR187
+	add	x0, x0, :lo12:.LC115
+	bl	printf
+	b	.L1743
+.L1746:
+	lsl	w20, w19, 7
+	sub	w20, w20, #8192
+	add	x20, x1, x20, lsl 2
+	b	.L1747
+	.size	FtlWriteToIDB, .-FtlWriteToIDB
+	.section	.text.sftl_write,"ax",@progbits
+	.align	2
+	.global	sftl_write
+	.type	sftl_write, %function
+sftl_write:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w20, w1
+	mov	w19, w0
+	str	x21, [sp, 32]
+	mov	x21, x2
+	bl	FtlWriteToIDB
+	mov	x3, x21
+	mov	w2, w20
+	mov	w1, w19
+	ldr	x21, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x29, x30, [sp], 48
+	b	FtlWrite
+	.size	sftl_write, .-sftl_write
 	.global	g_nand_ops
 	.global	g_nand_phy_info
 	.global	gc_ink_free_return_value
@@ -13620,9 +13709,9 @@ g_min_erase_count:
 	.align	3
 	.set	.LANCHOR105,. + 0
 	.type	g_nand_ops, %object
-	.size	g_nand_ops, 32
+	.size	g_nand_ops, 48
 g_nand_ops:
-	.zero	32
+	.zero	48
 	.section	.bss.g_nand_phy_info,"aw",@nobits
 	.align	3
 	.set	.LANCHOR0,. + 0
@@ -14359,264 +14448,271 @@ power_up_flag:
 	.section	.rodata.FtlWrite.str1.1,"aMS",@progbits,1
 .LC113:
 	.string	"FtlWrite: lpa error:%x %x\n"
+	.section	.rodata.FtlWriteToIDB.str1.1,"aMS",@progbits,1
+.LC114:
+	.string	"write_idblock fail! %x %x %x %x\n"
+.LC115:
+	.string	"%s idb buffer alloc fail\n"
+.LC116:
+	.string	"%p %x %p %x\n"
 	.section	.rodata.GetSwlReplaceBlock.str1.1,"aMS",@progbits,1
 .LC72:
 	.string	"swblk %x ,avg = %x max= %x vpc= %x,ec=%x ,max ec=%x\n"
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",@progbits,1
 .LC1:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
-	.section	.rodata.__func__.6127,"a",@progbits
+	.section	.rodata.__func__.6148,"a",@progbits
 	.align	3
 	.set	.LANCHOR138,. + 0
-	.type	__func__.6127, %object
-	.size	__func__.6127, 11
-__func__.6127:
+	.type	__func__.6148, %object
+	.size	__func__.6148, 11
+__func__.6148:
 	.string	"FtlMemInit"
-	.section	.rodata.__func__.6251,"a",@progbits
+	.section	.rodata.__func__.6272,"a",@progbits
 	.align	3
 	.set	.LANCHOR175,. + 0
-	.type	__func__.6251, %object
-	.size	__func__.6251, 13
-__func__.6251:
+	.type	__func__.6272, %object
+	.size	__func__.6272, 13
+__func__.6272:
 	.string	"FtlProgPages"
-	.section	.rodata.__func__.6279,"a",@progbits
+	.section	.rodata.__func__.6300,"a",@progbits
 	.align	3
 	.set	.LANCHOR183,. + 0
-	.type	__func__.6279, %object
-	.size	__func__.6279, 9
-__func__.6279:
+	.type	__func__.6300, %object
+	.size	__func__.6300, 9
+__func__.6300:
 	.string	"FtlWrite"
-	.section	.rodata.__func__.6385,"a",@progbits
-	.align	3
-	.set	.LANCHOR187,. + 0
-	.type	__func__.6385, %object
-	.size	__func__.6385, 14
-__func__.6385:
-	.string	"FtlWriteToIDB"
-	.section	.rodata.__func__.6426,"a",@progbits
+	.section	.rodata.__func__.6375,"a",@progbits
 	.align	3
 	.set	.LANCHOR139,. + 0
-	.type	__func__.6426, %object
-	.size	__func__.6426, 14
-__func__.6426:
+	.type	__func__.6375, %object
+	.size	__func__.6375, 14
+__func__.6375:
 	.string	"FtlBbt2Bitmap"
-	.section	.rodata.__func__.6469,"a",@progbits
+	.section	.rodata.__func__.6418,"a",@progbits
 	.align	3
 	.set	.LANCHOR150,. + 0
-	.type	__func__.6469, %object
-	.size	__func__.6469, 11
-__func__.6469:
+	.type	__func__.6418, %object
+	.size	__func__.6418, 11
+__func__.6418:
 	.string	"FtlLoadBbt"
-	.section	.rodata.__func__.6584,"a",@progbits
+	.section	.rodata.__func__.6533,"a",@progbits
 	.align	3
 	.set	.LANCHOR49,. + 0
-	.type	__func__.6584, %object
-	.size	__func__.6584, 17
-__func__.6584:
+	.type	__func__.6533, %object
+	.size	__func__.6533, 17
+__func__.6533:
 	.string	"INSERT_FREE_LIST"
-	.section	.rodata.__func__.6589,"a",@progbits
+	.section	.rodata.__func__.6538,"a",@progbits
 	.align	3
 	.set	.LANCHOR46,. + 0
-	.type	__func__.6589, %object
-	.size	__func__.6589, 17
-__func__.6589:
+	.type	__func__.6538, %object
+	.size	__func__.6538, 17
+__func__.6538:
 	.string	"INSERT_DATA_LIST"
-	.section	.rodata.__func__.6620,"a",@progbits
+	.section	.rodata.__func__.6569,"a",@progbits
 	.align	3
 	.set	.LANCHOR50,. + 0
-	.type	__func__.6620, %object
-	.size	__func__.6620, 17
-__func__.6620:
+	.type	__func__.6569, %object
+	.size	__func__.6569, 17
+__func__.6569:
 	.string	"List_remove_node"
-	.section	.rodata.__func__.6652,"a",@progbits
+	.section	.rodata.__func__.6601,"a",@progbits
 	.align	3
 	.set	.LANCHOR54,. + 0
-	.type	__func__.6652, %object
-	.size	__func__.6652, 22
-__func__.6652:
+	.type	__func__.6601, %object
+	.size	__func__.6601, 22
+__func__.6601:
 	.string	"List_update_data_list"
-	.section	.rodata.__func__.6661,"a",@progbits
+	.section	.rodata.__func__.6610,"a",@progbits
 	.align	3
 	.set	.LANCHOR156,. + 0
-	.type	__func__.6661, %object
-	.size	__func__.6661, 16
-__func__.6661:
+	.type	__func__.6610, %object
+	.size	__func__.6610, 16
+__func__.6610:
 	.string	"load_l2p_region"
-	.section	.rodata.__func__.6694,"a",@progbits
+	.section	.rodata.__func__.6643,"a",@progbits
 	.align	3
 	.set	.LANCHOR107,. + 0
-	.type	__func__.6694, %object
-	.size	__func__.6694, 26
-__func__.6694:
+	.type	__func__.6643, %object
+	.size	__func__.6643, 26
+__func__.6643:
 	.string	"ftl_map_blk_alloc_new_blk"
-	.section	.rodata.__func__.6705,"a",@progbits
+	.section	.rodata.__func__.6654,"a",@progbits
 	.align	3
 	.set	.LANCHOR157,. + 0
-	.type	__func__.6705, %object
-	.size	__func__.6705, 15
-__func__.6705:
+	.type	__func__.6654, %object
+	.size	__func__.6654, 15
+__func__.6654:
 	.string	"ftl_map_blk_gc"
-	.section	.rodata.__func__.6720,"a",@progbits
+	.section	.rodata.__func__.6669,"a",@progbits
 	.align	3
 	.set	.LANCHOR154,. + 0
-	.type	__func__.6720, %object
-	.size	__func__.6720, 31
-__func__.6720:
+	.type	__func__.6669, %object
+	.size	__func__.6669, 31
+__func__.6669:
 	.string	"Ftl_write_map_blk_to_last_page"
-	.section	.rodata.__func__.6734,"a",@progbits
+	.section	.rodata.__func__.6683,"a",@progbits
 	.align	3
 	.set	.LANCHOR155,. + 0
-	.type	__func__.6734, %object
-	.size	__func__.6734, 16
-__func__.6734:
+	.type	__func__.6683, %object
+	.size	__func__.6683, 16
+__func__.6683:
 	.string	"FtlMapWritePage"
-	.section	.rodata.__func__.6759,"a",@progbits
+	.section	.rodata.__func__.6708,"a",@progbits
 	.align	3
 	.set	.LANCHOR57,. + 0
-	.type	__func__.6759, %object
-	.size	__func__.6759, 22
-__func__.6759:
+	.type	__func__.6708, %object
+	.size	__func__.6708, 22
+__func__.6708:
 	.string	"select_l2p_ram_region"
-	.section	.rodata.__func__.6776,"a",@progbits
+	.section	.rodata.__func__.6725,"a",@progbits
 	.align	3
 	.set	.LANCHOR159,. + 0
-	.type	__func__.6776, %object
-	.size	__func__.6776, 9
-__func__.6776:
+	.type	__func__.6725, %object
+	.size	__func__.6725, 9
+__func__.6725:
 	.string	"log2phys"
-	.section	.rodata.__func__.6849,"a",@progbits
+	.section	.rodata.__func__.6798,"a",@progbits
 	.align	3
 	.set	.LANCHOR171,. + 0
-	.type	__func__.6849, %object
-	.size	__func__.6849, 15
-__func__.6849:
+	.type	__func__.6798, %object
+	.size	__func__.6798, 15
+__func__.6798:
 	.string	"FtlVpcTblFlush"
-	.section	.rodata.__func__.6871,"a",@progbits
+	.section	.rodata.__func__.6820,"a",@progbits
 	.align	3
 	.set	.LANCHOR149,. + 0
-	.type	__func__.6871, %object
-	.size	__func__.6871, 14
-__func__.6871:
+	.type	__func__.6820, %object
+	.size	__func__.6820, 14
+__func__.6820:
 	.string	"FtlScanSysBlk"
-	.section	.rodata.__func__.6928,"a",@progbits
+	.section	.rodata.__func__.6877,"a",@progbits
 	.align	3
 	.set	.LANCHOR151,. + 0
-	.type	__func__.6928, %object
-	.size	__func__.6928, 15
-__func__.6928:
+	.type	__func__.6877, %object
+	.size	__func__.6877, 15
+__func__.6877:
 	.string	"FtlLoadSysInfo"
-	.section	.rodata.__func__.6991,"a",@progbits
+	.section	.rodata.__func__.6940,"a",@progbits
 	.align	3
 	.set	.LANCHOR160,. + 0
-	.type	__func__.6991, %object
-	.size	__func__.6991, 16
-__func__.6991:
+	.type	__func__.6940, %object
+	.size	__func__.6940, 16
+__func__.6940:
 	.string	"FtlReUsePrevPpa"
-	.section	.rodata.__func__.7025,"a",@progbits
+	.section	.rodata.__func__.6974,"a",@progbits
 	.align	3
 	.set	.LANCHOR166,. + 0
-	.type	__func__.7025, %object
-	.size	__func__.7025, 22
-__func__.7025:
+	.type	__func__.6974, %object
+	.size	__func__.6974, 22
+__func__.6974:
 	.string	"FtlRecoverySuperblock"
-	.section	.rodata.__func__.7082,"a",@progbits
+	.section	.rodata.__func__.7031,"a",@progbits
 	.align	3
 	.set	.LANCHOR60,. + 0
-	.type	__func__.7082, %object
-	.size	__func__.7082, 16
-__func__.7082:
+	.type	__func__.7031, %object
+	.size	__func__.7031, 16
+__func__.7031:
 	.string	"make_superblock"
-	.section	.rodata.__func__.7103,"a",@progbits
+	.section	.rodata.__func__.7052,"a",@progbits
 	.align	3
 	.set	.LANCHOR146,. + 0
-	.type	__func__.7103, %object
-	.size	__func__.7103, 18
-__func__.7103:
+	.type	__func__.7052, %object
+	.size	__func__.7052, 18
+__func__.7052:
 	.string	"SupperBlkListInit"
-	.section	.rodata.__func__.7128,"a",@progbits
+	.section	.rodata.__func__.7077,"a",@progbits
 	.align	3
 	.set	.LANCHOR173,. + 0
-	.type	__func__.7128, %object
-	.size	__func__.7128, 21
-__func__.7128:
+	.type	__func__.7077, %object
+	.size	__func__.7077, 21
+__func__.7077:
 	.string	"FtlVpcCheckAndModify"
-	.section	.rodata.__func__.7144,"a",@progbits
+	.section	.rodata.__func__.7093,"a",@progbits
 	.align	3
 	.set	.LANCHOR161,. + 0
-	.type	__func__.7144, %object
-	.size	__func__.7144, 14
-__func__.7144:
+	.type	__func__.7093, %object
+	.size	__func__.7093, 14
+__func__.7093:
 	.string	"ftl_check_vpc"
-	.section	.rodata.__func__.7229,"a",@progbits
+	.section	.rodata.__func__.7178,"a",@progbits
 	.align	3
 	.set	.LANCHOR163,. + 0
-	.type	__func__.7229, %object
-	.size	__func__.7229, 25
-__func__.7229:
+	.type	__func__.7178, %object
+	.size	__func__.7178, 25
+__func__.7178:
 	.string	"allocate_data_superblock"
-	.section	.rodata.__func__.7250,"a",@progbits
+	.section	.rodata.__func__.7199,"a",@progbits
 	.align	3
 	.set	.LANCHOR174,. + 0
-	.type	__func__.7250, %object
-	.size	__func__.7250, 29
-__func__.7250:
+	.type	__func__.7199, %object
+	.size	__func__.7199, 29
+__func__.7199:
 	.string	"allocate_new_data_superblock"
-	.section	.rodata.__func__.7257,"a",@progbits
+	.section	.rodata.__func__.7206,"a",@progbits
 	.align	3
 	.set	.LANCHOR88,. + 0
-	.type	__func__.7257, %object
-	.size	__func__.7257, 19
-__func__.7257:
+	.type	__func__.7206, %object
+	.size	__func__.7206, 19
+__func__.7206:
 	.string	"get_new_active_ppa"
-	.section	.rodata.__func__.7270,"a",@progbits
+	.section	.rodata.__func__.7219,"a",@progbits
 	.align	3
 	.set	.LANCHOR164,. + 0
-	.type	__func__.7270, %object
-	.size	__func__.7270, 16
-__func__.7270:
+	.type	__func__.7219, %object
+	.size	__func__.7219, 16
+__func__.7219:
 	.string	"update_vpc_list"
-	.section	.rodata.__func__.7277,"a",@progbits
+	.section	.rodata.__func__.7226,"a",@progbits
 	.align	3
 	.set	.LANCHOR165,. + 0
-	.type	__func__.7277, %object
-	.size	__func__.7277, 20
-__func__.7277:
+	.type	__func__.7226, %object
+	.size	__func__.7226, 20
+__func__.7226:
 	.string	"decrement_vpc_count"
-	.section	.rodata.__func__.7347,"a",@progbits
+	.section	.rodata.__func__.7296,"a",@progbits
 	.align	3
 	.set	.LANCHOR176,. + 0
-	.type	__func__.7347, %object
-	.size	__func__.7347, 19
-__func__.7347:
+	.type	__func__.7296, %object
+	.size	__func__.7296, 19
+__func__.7296:
 	.string	"FtlGcFreeTempBlock"
-	.section	.rodata.__func__.7458,"a",@progbits
+	.section	.rodata.__func__.7407,"a",@progbits
 	.align	3
 	.set	.LANCHOR180,. + 0
-	.type	__func__.7458, %object
-	.size	__func__.7458, 23
-__func__.7458:
+	.type	__func__.7407, %object
+	.size	__func__.7407, 23
+__func__.7407:
 	.string	"rk_ftl_garbage_collect"
-	.section	.rodata.__func__.7720,"a",@progbits
+	.section	.rodata.__func__.7669,"a",@progbits
 	.align	3
 	.set	.LANCHOR147,. + 0
-	.type	__func__.7720, %object
-	.size	__func__.7720, 15
-__func__.7720:
+	.type	__func__.7669, %object
+	.size	__func__.7669, 15
+__func__.7669:
 	.string	"FlashReadPages"
-	.section	.rodata.__func__.7739,"a",@progbits
+	.section	.rodata.__func__.7688,"a",@progbits
 	.align	3
 	.set	.LANCHOR153,. + 0
-	.type	__func__.7739, %object
-	.size	__func__.7739, 15
-__func__.7739:
+	.type	__func__.7688, %object
+	.size	__func__.7688, 15
+__func__.7688:
 	.string	"FlashProgPages"
-	.section	.rodata.__func__.7763,"a",@progbits
+	.section	.rodata.__func__.7712,"a",@progbits
 	.align	3
 	.set	.LANCHOR104,. + 0
-	.type	__func__.7763, %object
-	.size	__func__.7763, 17
-__func__.7763:
+	.type	__func__.7712, %object
+	.size	__func__.7712, 17
+__func__.7712:
 	.string	"FlashEraseBlocks"
+	.section	.rodata.__func__.7827,"a",@progbits
+	.align	3
+	.set	.LANCHOR187,. + 0
+	.type	__func__.7827, %object
+	.size	__func__.7827, 14
+__func__.7827:
+	.string	"FtlWriteToIDB"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",@progbits,1
 .LC105:
 	.string	"decrement_vpc_count %x = %d\n"
@@ -14660,16 +14756,7 @@ __func__.7763:
 	.string	"\n"
 	.section	.rodata.rknand_proc_ftlread.str1.1,"aMS",@progbits,1
 .LC70:
-	.string	"SFTL version: 5.0.48 20181029"
+	.string	"SFTL version: 5.0.49 20181030"
 .LC71:
 	.string	"%s\n"
-	.section	.rodata.sftl_write.str1.1,"aMS",@progbits,1
-.LC114:
-	.string	"write_idblock fix data %x %x %x\n"
-.LC115:
-	.string	"write_idblock fail! %x %x %x %x\n"
-.LC116:
-	.string	"%s idb buffer alloc fail\n"
-.LC117:
-	.string	"%p %x %p %x\n"
 	.hidden	free
diff --git a/drivers/rkflash/sfc_nand.c b/drivers/rkflash/sfc_nand.c
index f9c3d91054..2ef7a2f21d 100644
--- a/drivers/rkflash/sfc_nand.c
+++ b/drivers/rkflash/sfc_nand.c
@@ -624,6 +624,7 @@ static void ftl_flash_init(void)
 	g_nand_ops.erase_blk		= sfc_nand_erase_block;
 	g_nand_ops.prog_page		= sfc_nand_prog_page;
 	g_nand_ops.read_page		= sfc_nand_read_page;
+	g_nand_ops.bch_sel		= NULL;
 }
 
 static int spi_nand_enable_QE(void)

commit eee2651354e117f641245ac9a764fa2a4240bfa2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Nov 30 09:51:04 2018 +0800

    rockchip: rk3308: detect adc key by uboot fdt info
    
    fixes: bcf84996f0eb29eedad33b308776f7c95380e9b0
    (rockchip: rk3308: fix adc key read failed when kernel dtb is enabled)
    
    Change-Id: I46071bf516cc9ee81f4e33cf884ba7baaa5f2d89
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/board/rockchip/evb_rk3308/evb_rk3308.c b/board/rockchip/evb_rk3308/evb_rk3308.c
index e823a34ef1..fad6b81f37 100644
--- a/board/rockchip/evb_rk3308/evb_rk3308.c
+++ b/board/rockchip/evb_rk3308/evb_rk3308.c
@@ -12,7 +12,6 @@ DECLARE_GLOBAL_DATA_PTR;
 #define KEY_DOWN_MIN_VAL        0
 #define KEY_DOWN_MAX_VAL        30
 
-#ifndef CONFIG_USING_KERNEL_DTB
 /*
  * Two board variants whith adc channel 3 is for board id
  * v10: 1024, v11: 512
@@ -44,4 +43,3 @@ int rockchip_dnl_key_pressed(void)
 	else
 		return false;
 }
-#endif

commit 861ce1a0075875e2e4c54129f98099ad4598a021
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Fri Nov 30 11:25:21 2018 +0800

    Revert "Add: Allow logo in 16bit or 32bit color BMP"
    
    This reverts commit 39965620e81ccfb2848305331c45b947bf23e1ea.
    
    Change-Id: Ic2996614b9cddc1835b079c2e7ac784daa99ad3f
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/bmp_helper.c b/drivers/video/drm/bmp_helper.c
old mode 100644
new mode 100755
index 523506f278..a95fe88147
--- a/drivers/video/drm/bmp_helper.c
+++ b/drivers/video/drm/bmp_helper.c
@@ -4,8 +4,6 @@
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
-#include <command.h>
-#include <log.h>
 #include <config.h>
 #include <common.h>
 #include <malloc.h>
@@ -143,30 +141,9 @@ static void decode_rle8_bitmap(void *psrc, void *pdst, uint16_t *cmap,
 	}
 }
 
-static void dump_bmp_dib_head(void *bmp_addr)
-{
-	struct bmp_image *bmp = bmp_addr;
-
-	debug("########## BMP DIB_HEAD ##########\n"
-	      "Width  : %u\n"
-	      "Height : %u\n"
-	      "Bpp    : %u\n"
-	      "Compression method : %u\n"
-	      "Image size : %u\n"
-	      "Colors in palette  : %u\n"
-	      "##################################\n",
-		bmp->header.width,
-		bmp->header.height,
-		bmp->header.bit_count,
-		bmp->header.compression,
-		bmp->header.image_size,
-		bmp->header.colors_used);
-}
-
 int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp)
 {
-	int i, j;
-	int stride, padded_width, bpp, width, height;
+	int stride, padded_width, bpp, i, width, height;
 	struct bmp_image *bmp = bmp_addr;
 	uint8_t *src = bmp_addr;
 	uint8_t *dst = pdst;
@@ -176,10 +153,9 @@ int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp)
 
 	if (!bmp || !(bmp->header.signature[0] == 'B' &&
 	    bmp->header.signature[1] == 'M')) {
-		printf("Error: Invalid bmp file.\n");
+		printf("cat not find bmp file\n");
 		return -1;
 	}
-	dump_bmp_dib_head(bmp);
 	width = get_unaligned_le32(&bmp->header.width);
 	height = get_unaligned_le32(&bmp->header.height);
 	bpp = get_unaligned_le16(&bmp->header.bit_count);
@@ -196,8 +172,8 @@ int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp)
 	switch (bpp) {
 	case 8:
 		if (dst_bpp != 16) {
-			printf("Error: Target pixel's bpp is not 16bit.\n");
-
+			printf("can't support covert bmap to bit[%d]\n",
+			       dst_bpp);
 			return -1;
 		}
 		cmap = malloc(sizeof(cmap) * 256);
@@ -217,6 +193,7 @@ int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp)
 			decode_rle8_bitmap(src, dst, cmap, width, height,
 					   bpp, 0, 0, flip);
 		} else {
+			int j;
 			stride = width * 2;
 
 			if (flip)
@@ -234,35 +211,9 @@ int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp)
 		}
 		free(cmap);
 		break;
-	case 16:
-		if (get_unaligned_le32(&bmp->header.compression)) {
-			printf("Error: Failed to decompression bmp file.\n");
-
-			return -1;
-		}
-		stride = ALIGN(width * bpp / 8, 4);
-		if (flip)
-			src += stride * (height - 1);
-		for (i = 0; i < height; i++) {
-			for (j = 0; j < width; j++) {
-				ushort color = (src[1] << 8) | src[0];
-
-				color = (((color & 0x7c00) << 1) |
-					((color & 0x03e0) << 1) |
-					(color & 0x001f));
-				*(uint16_t *)dst = color;
-				src += 2;
-				dst += 2;
-			}
-			src += (padded_width - width);
-			if (flip)
-				src -= stride * 2;
-		}
-		break;
 	case 24:
 		if (get_unaligned_le32(&bmp->header.compression)) {
-			printf("Error: Failed to decompression bmp file.\n");
-
+			printf("can't not support compression for 24bit bmap");
 			return -1;
 		}
 		stride = ALIGN(width * 3, 4);
@@ -277,26 +228,10 @@ int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp)
 				src -= stride * 2;
 		}
 		break;
+	case 16:
 	case 32:
-		if (get_unaligned_le32(&bmp->header.compression)) {
-			printf("Error: Failed to decompression bmp file.\n");
-
-			return -1;
-		}
-		stride = ALIGN(width * 4, 4);
-		if (flip)
-			src += stride * (height - 1);
-
-		for (i = 0; i < height; i++) {
-			memcpy(dst, src, 4 * width);
-			dst += stride;
-			src += stride;
-			if (flip)
-				src -= stride * 2;
-		}
-		break;
 	default:
-		printf("Error: Can't decode this bmp file with bit=%d\n", bpp);
+		printf("unsupport bit=%d now\n", bpp);
 		return -1;
 	}
 
diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 390d314686..0d13a640d4 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -4,7 +4,6 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
-#include <asm/io.h>
 #include <asm/unaligned.h>
 #include <config.h>
 #include <common.h>
@@ -29,7 +28,6 @@
 #include "rockchip_connector.h"
 #include "rockchip_phy.h"
 #include "rockchip_panel.h"
-#include "rockchip_vop.h"
 #include <dm.h>
 #include <dm/of_access.h>
 #include <dm/ofnode.h>
@@ -166,40 +164,9 @@ static unsigned long get_display_size(void)
 	return memory_end - memory_start;
 }
 
-/**
- * vop_support_ymirror - ensure whethere vop support the feature of ymirror.
- * @logo:	the pointer to the logo information.
- *
- */
-static bool vop_support_ymirror(struct logo_info *logo)
+static bool can_direct_logo(int bpp)
 {
-	bool ret;
-	struct display_state *state;
-	struct vop_data *vop_data;
-
-	ret = false;
-	state = container_of(logo, struct display_state, logo);
-	if (state->crtc_state.crtc->data) {
-		vop_data = (struct vop_data *)state->crtc_state.crtc->data;
-		printf("VOP hardware version v%d.%d, ",
-		       VOP_MAJOR(vop_data->version),
-		       VOP_MINOR(vop_data->version));
-		/*
-		 * if the version of VOP is higher than v3.0,
-		 * which means that the VOP support ymirror,
-		 * so it isn't need to mirror image by ourself.
-		 */
-		if (vop_data->version >= VOP_VERSION(3, 0)) {
-			printf("Support mirror mode.\n");
-			ret = true;
-		} else {
-			printf("Not support mirror mode.\n");
-		}
-	} else {
-		printf("Error: CRTC drivers is not ready.\n");
-	}
-
-	return ret;
+	return bpp == 24 || bpp == 32;
 }
 
 
@@ -357,7 +324,7 @@ static int connector_panel_init(struct display_state *state)
 
 	dsp_lut_node = dev_read_subnode(dev, "dsp-lut");
 	if (!ofnode_valid(dsp_lut_node)) {
-		printf("%s can not find dsp-lut node\n", __func__);
+		debug("%s can not find dsp-lut node\n", __func__);
 		return 0;
 	}
 
@@ -965,6 +932,7 @@ static int display_logo(struct display_state *state)
 		printf("can't support bmp bits[%d]\n", logo->bpp);
 		return -EINVAL;
 	}
+	crtc_state->rb_swap = logo->bpp != 32;
 	hdisplay = conn_state->mode.hdisplay;
 	vdisplay = conn_state->mode.vdisplay;
 	crtc_state->src_w = logo->width;
@@ -1152,16 +1120,19 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 	logo->bpp = get_unaligned_le16(&header->bit_count);
 	logo->width = get_unaligned_le32(&header->width);
 	logo->height = get_unaligned_le32(&header->height);
-
 	size = get_unaligned_le32(&header->file_size);
-	if (size > MEMORY_POOL_SIZE) {
-		printf("failed to use boot buf as temp bmp buffer\n");
-		ret = -ENOMEM;
-		goto free_header;
-	}
+	if (!can_direct_logo(logo->bpp)) {
+		if (size > MEMORY_POOL_SIZE) {
+			printf("failed to use boot buf as temp bmp buffer\n");
+			ret = -ENOMEM;
+			goto free_header;
+		}
+		pdst = get_display_buffer(size);
 
-	pdst = get_display_buffer(size);
-	dst = pdst;
+	} else {
+		pdst = get_display_buffer(size);
+		dst = pdst;
+	}
 
 	len = rockchip_read_resource_file(pdst, bmp_name, 0, size);
 	if (len != size) {
@@ -1170,7 +1141,7 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 		goto free_header;
 	}
 
-	if (!vop_support_ymirror(logo)) {
+	if (!can_direct_logo(logo->bpp)) {
 		int dst_size;
 		/*
 		 * TODO: force use 16bpp if bpp less than 16;
@@ -1183,7 +1154,6 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 			ret = -ENOMEM;
 			goto free_header;
 		}
-		memset(dst, 0, dst_size);
 		if (bmpdecoder(pdst, dst, logo->bpp)) {
 			printf("failed to decode bmp %s\n", bmp_name);
 			ret = -EINVAL;

commit 55e2f86dd40f207c32b43f01ba246e45f6e852c0
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Fri Nov 30 11:25:10 2018 +0800

    Revert "video/drm: logo: fix show 8bit bmp logo failed"
    
    This reverts commit 78d830ca5bf0a0b904748403c801d5fa3a8ddc8f.
    
    Change-Id: Ic2996614b9cddc1835b079c2e7ac784daa99ad3a
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/bmp_helper.c b/drivers/video/drm/bmp_helper.c
index ca4d92b4e7..523506f278 100644
--- a/drivers/video/drm/bmp_helper.c
+++ b/drivers/video/drm/bmp_helper.c
@@ -163,13 +163,14 @@ static void dump_bmp_dib_head(void *bmp_addr)
 		bmp->header.colors_used);
 }
 
-int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp, bool flip)
+int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp)
 {
 	int i, j;
 	int stride, padded_width, bpp, width, height;
 	struct bmp_image *bmp = bmp_addr;
 	uint8_t *src = bmp_addr;
 	uint8_t *dst = pdst;
+	bool flip = false;
 	uint16_t *cmap;
 	uint8_t *cmap_base;
 
@@ -184,10 +185,11 @@ int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp, bool flip)
 	bpp = get_unaligned_le16(&bmp->header.bit_count);
 	padded_width = width & 0x3 ? (width & ~0x3) + 4 : width;
 
-	if (height < 0) {
+	if (height < 0)
 		height = 0 - height;
-		flip = false;
-	}
+	else
+		flip = true;
+
 	cmap_base = src + sizeof(bmp->header);
 	src = bmp_addr + get_unaligned_le32(&bmp->header.data_offset);
 
diff --git a/drivers/video/drm/bmp_helper.h b/drivers/video/drm/bmp_helper.h
index 0a875f829d..5e125004d2 100644
--- a/drivers/video/drm/bmp_helper.h
+++ b/drivers/video/drm/bmp_helper.h
@@ -15,5 +15,5 @@
 
 #define range(x, min, max) ((x) < (min)) ? (min) : (((x) > (max)) ? (max) : (x))
 
-int bmpdecoder(void *bmp_addr, void *dst, int dst_bpp, bool flip);
+int bmpdecoder(void *bmp_addr, void *dst, int dst_bpp);
 #endif /* _BMP_HELPER_H_ */
diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 29f984985e..390d314686 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -166,11 +166,6 @@ static unsigned long get_display_size(void)
 	return memory_end - memory_start;
 }
 
-static bool bmp_can_disp_direct(struct logo_info *logo)
-{
-	return logo->bpp == 24 || logo->bpp == 32;
-}
-
 /**
  * vop_support_ymirror - ensure whethere vop support the feature of ymirror.
  * @logo:	the pointer to the logo information.
@@ -184,23 +179,21 @@ static bool vop_support_ymirror(struct logo_info *logo)
 
 	ret = false;
 	state = container_of(logo, struct display_state, logo);
-
-	vop_data = (struct vop_data *)state->crtc_state.crtc->data;
-	if (vop_data) {
+	if (state->crtc_state.crtc->data) {
+		vop_data = (struct vop_data *)state->crtc_state.crtc->data;
 		printf("VOP hardware version v%d.%d, ",
 		       VOP_MAJOR(vop_data->version),
 		       VOP_MINOR(vop_data->version));
-
 		/*
 		 * if the version of VOP is higher than v3.0,
 		 * which means that the VOP support ymirror,
 		 * so it isn't need to mirror image by ourself.
 		 */
-		if (VOP_WIN_SUPPORT(vop_data, vop_data->win, ymirror)) {
-			printf("support mirror mode.\n");
+		if (vop_data->version >= VOP_VERSION(3, 0)) {
+			printf("Support mirror mode.\n");
 			ret = true;
 		} else {
-			printf("not support mirror mode.\n");
+			printf("Not support mirror mode.\n");
 		}
 	} else {
 		printf("Error: CRTC drivers is not ready.\n");
@@ -972,14 +965,12 @@ static int display_logo(struct display_state *state)
 		printf("can't support bmp bits[%d]\n", logo->bpp);
 		return -EINVAL;
 	}
-
 	hdisplay = conn_state->mode.hdisplay;
 	vdisplay = conn_state->mode.vdisplay;
 	crtc_state->src_w = logo->width;
 	crtc_state->src_h = logo->height;
 	crtc_state->src_x = 0;
 	crtc_state->src_y = 0;
-	crtc_state->rb_swap = logo->rb_swap;
 	crtc_state->ymirror = logo->ymirror;
 
 	crtc_state->dma_addr = (u32)(unsigned long)logo->mem + logo->offset;
@@ -1134,8 +1125,6 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 	struct rockchip_logo_cache *logo_cache;
 	struct bmp_header *header;
 	void *dst = NULL, *pdst;
-	bool bmp_disp_direct = false;
-	bool vop_supp_ymirror = false;
 	int size, len;
 	int ret = 0;
 
@@ -1180,24 +1169,22 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 		ret = -ENOENT;
 		goto free_header;
 	}
-	vop_supp_ymirror = vop_support_ymirror(logo);
-	bmp_disp_direct = bmp_can_disp_direct(logo);
-	if (!vop_supp_ymirror || !bmp_disp_direct) {
+
+	if (!vop_support_ymirror(logo)) {
 		int dst_size;
 		/*
 		 * TODO: force use 16bpp if bpp less than 16;
 		 */
-		logo->rb_swap = (logo->bpp == 8 ? true : false);
 		logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp;
 		dst_size = logo->width * logo->height * logo->bpp >> 3;
+
 		dst = get_display_buffer(dst_size);
 		if (!dst) {
 			ret = -ENOMEM;
 			goto free_header;
 		}
 		memset(dst, 0, dst_size);
-		if (bmpdecoder(pdst, dst, logo->bpp,
-			       !vop_supp_ymirror)) {
+		if (bmpdecoder(pdst, dst, logo->bpp)) {
 			printf("failed to decode bmp %s\n", bmp_name);
 			ret = -EINVAL;
 			goto free_header;
@@ -1205,12 +1192,12 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 		flush_dcache_range((ulong)dst,
 				   ALIGN((ulong)dst + dst_size,
 					 CONFIG_SYS_CACHELINE_SIZE));
+
 		logo->offset = 0;
-		logo->ymirror = vop_supp_ymirror;
+		logo->ymirror = 0;
 	} else {
 		logo->offset = get_unaligned_le32(&header->data_offset);
-		logo->rb_swap = (logo->bpp != 32 ? true : false);
-		logo->ymirror = true;
+		logo->ymirror = 1;
 	}
 	logo->mem = dst;
 
diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index 0173face1a..d30eb50c4b 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -130,7 +130,6 @@ struct connector_state {
 struct logo_info {
 	int mode;
 	char *mem;
-	bool rb_swap;
 	bool ymirror;
 	u32 offset;
 	u32 width;
diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index 01986844b1..b0fa315537 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -72,7 +72,7 @@ static const struct vop_win rk3288_win01_data = {
 	.enable = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 0),
 	.format = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 1),
 	.rb_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 12),
-	.ymirror = VOP_REG_VER(RK3288_DSP_CTRL0, 0x1, 23, 3, 1, -1),
+	.ymirror = VOP_REG_VER(RK3368_WIN0_CTRL0, 0x1, 22, 3, 2, -1),
 	.act_info = VOP_REG(RK3288_WIN0_ACT_INFO, 0x1fff1fff, 0),
 	.dsp_info = VOP_REG(RK3288_WIN0_DSP_INFO, 0x0fff0fff, 0),
 	.dsp_st = VOP_REG(RK3288_WIN0_DSP_ST, 0x1fff1fff, 0),

commit 0a9c335c555ac9182787953e671550e0a83199c2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 29 09:12:35 2018 +0800

    rockchip: dts: rk3288: add u-boot,dm-pre-reloc for usb otg
    
    It makes rockusb works normally even there is no valid kernel dtb.
    
    Change-Id: Ie7a125450de1b9394ed5c17fc5a0df3239e203d6
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3288-u-boot.dtsi b/arch/arm/dts/rk3288-u-boot.dtsi
index 979d119764..42e2b025ea 100644
--- a/arch/arm/dts/rk3288-u-boot.dtsi
+++ b/arch/arm/dts/rk3288-u-boot.dtsi
@@ -64,3 +64,16 @@
 &gpio8 {
 	u-boot,dm-pre-reloc;
 };
+
+&usbphy0 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&usbphy {
+	u-boot,dm-pre-reloc;
+};
+
+&usb_otg {
+	u-boot,dm-pre-reloc;
+};

commit 1927b5fd8af799f416122226fd14bad06e15f2a2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 29 09:17:01 2018 +0800

    rockchip: dts: rk3368: add u-boot,dm-pre-reloc for usb otg
    
    It makes rockusb works normally even there is no valid kernel dtb.
    
    Change-Id: Ic2996614b9cddc1835b079c2e7ac784daa99ad3e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3368-evb.dts b/arch/arm/dts/rk3368-evb.dts
index fe55e234b1..32992c3b96 100644
--- a/arch/arm/dts/rk3368-evb.dts
+++ b/arch/arm/dts/rk3368-evb.dts
@@ -33,10 +33,6 @@
 
 &u2phy {
 	status = "okay";
-
-	u2phy_host: host-port {
-		status = "okay";
-	};
 };
 
 &usb_host0_ehci {
@@ -47,6 +43,14 @@
 	status = "okay";
 };
 
-&usb_otg {
+&u2phy_host {
+	status = "okay";
+};
+
+&u2phy_otg {
 	status = "okay";
 };
+
+&usb_otg {
+	status = "okay";
+};
\ No newline at end of file
diff --git a/arch/arm/dts/rk3368-u-boot.dtsi b/arch/arm/dts/rk3368-u-boot.dtsi
index 4a4cd71f42..89469f2509 100644
--- a/arch/arm/dts/rk3368-u-boot.dtsi
+++ b/arch/arm/dts/rk3368-u-boot.dtsi
@@ -47,4 +47,16 @@
 
 &grf {
 	u-boot,dm-pre-reloc;
+};
+
+&u2phy {
+	u-boot,dm-pre-reloc;
+};
+
+&u2phy_otg {
+	u-boot,dm-pre-reloc;
+};
+
+&usb_otg {
+	u-boot,dm-pre-reloc;
 };
\ No newline at end of file

commit 203b897e056e92faf4a89deb55f4be182b7883a4
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Wed Nov 28 16:01:56 2018 +0800

    rockchip: rk3308: boot kernel Image at 0x00680000 for aarch64
    
    According to commit c791e8a8("rockchip: rk3308: set text base to
    0x00600000").
    
    Boot aarch64 kernel Image from 0x680000(6M + 512KB) will make
    better usage of the ram space.
    
    Load compressed zImage to 0x02480000(36M + 512 KB), then decompress
    it to 0x680000.
    
    Change-Id: I08760029ab4daf442ec97b9074db40c54b1413e7
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h
index 2420e224e2..587b32c62d 100644
--- a/include/configs/rk3308_common.h
+++ b/include/configs/rk3308_common.h
@@ -49,8 +49,8 @@
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x01f00000\0" \
-	"kernel_addr_r=0x02080000\0" \
-	"kernel_addr_c=0x01880000\0" \
+	"kernel_addr_r=0x00680000\0" \
+	"kernel_addr_c=0x02480000\0" \
 	"ramdisk_addr_r=0x04000000\0"
 #else
 #define ENV_MEM_LAYOUT_SETTINGS \

commit 21ab40a87385e6a27fe0e99630a49668bc263cf2
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Wed Nov 28 18:14:21 2018 +0800

    rockchip: clk: rk3308: Add flag for clk_set_defaults
    
    Change-Id: Ic9009b35e395cfe8c2a8f8d367b75b85294c7354
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
index ba331115b3..21da536757 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
@@ -47,10 +47,11 @@ struct rk3308_clk_info {
 /* Private data for the clock driver - used by rockchip_get_cru() */
 struct rk3308_clk_priv {
 	struct rk3308_cru *cru;
-	ulong armclk_hz;;
+	ulong armclk_hz;
 	ulong dpll_hz;
 	ulong vpll0_hz;
 	ulong vpll1_hz;
+	bool is_assigned;
 };
 
 struct rk3308_cru {
diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index 4f4059d15f..28d2c2c657 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -786,7 +786,7 @@ static ulong rk3308_clk_set_rate(struct clk *clk, ulong rate)
 						      priv->cru, DPLL);
 		break;
 	case ARMCLK:
-		if (priv->armclk_hz)
+		if (priv->is_assigned)
 			rk3308_armclk_set_clk(priv, rate);
 		priv->armclk_hz = rate;
 		break;
@@ -997,6 +997,7 @@ static void rk3308_clk_init(struct udevice *dev)
 
 static int rk3308_clk_probe(struct udevice *dev)
 {
+	struct rk3308_clk_priv *priv = dev_get_priv(dev);
 	int ret;
 
 	rk3308_clk_init(dev);
@@ -1005,6 +1006,7 @@ static int rk3308_clk_probe(struct udevice *dev)
 	ret = clk_set_defaults(dev);
 	if (ret)
 		debug("%s clk_set_defaults failed %d\n", __func__, ret);
+	priv->is_assigned = true;
 
 	return 0;
 }

commit e04b9c6bbdde91b2e692b727f5b6e4a8870cf207
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 28 17:15:51 2018 +0800

    clk: rockchip: rk3308: add arm clk 408M support
    
    Change-Id: I133576889860c7bae3f722dcd53df6a50c500c35
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index cfeff9e267..4f4059d15f 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -54,6 +54,7 @@ static struct rockchip_cpu_rate_table rk3308_cpu_rates[] = {
 	RK3308_CPUCLK_RATE(1008000000, 1, 5),
 	RK3308_CPUCLK_RATE(816000000, 1, 3),
 	RK3308_CPUCLK_RATE(600000000, 1, 3),
+	RK3308_CPUCLK_RATE(408000000, 1, 1),
 };
 
 static const struct rk3308_clk_info clks_dump[] = {

commit a33c12a6fea78874a03ff322c2c1622c5f831418
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 28 16:56:29 2018 +0800

    rockchip: rk3308: add rockchip_get_clk/cru interface
    
    Change-Id: I63bb32228af0fc9bb86374aae3a3c96d0901540d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3308/Makefile b/arch/arm/mach-rockchip/rk3308/Makefile
index 196774d3e5..ce4d44bb34 100644
--- a/arch/arm/mach-rockchip/rk3308/Makefile
+++ b/arch/arm/mach-rockchip/rk3308/Makefile
@@ -6,3 +6,4 @@
 
 obj-y += syscon_rk3308.o
 obj-y += rk3308.o
+obj-y += clk_rk3308.o
diff --git a/arch/arm/mach-rockchip/rk3308/clk_rk3308.c b/arch/arm/mach-rockchip/rk3308/clk_rk3308.c
new file mode 100644
index 0000000000..f6562e0a30
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3308/clk_rk3308.c
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk3308.h>
+
+int rockchip_get_clk(struct udevice **devp)
+{
+	return uclass_get_device_by_driver(UCLASS_CLK,
+			DM_GET_DRIVER(rockchip_rk3308_cru), devp);
+}
+
+void *rockchip_get_cru(void)
+{
+	struct rk3308_clk_priv *priv;
+	struct udevice *dev;
+	int ret;
+
+	ret = rockchip_get_clk(&dev);
+	if (ret)
+		return ERR_PTR(ret);
+
+	priv = dev_get_priv(dev);
+
+	return priv->cru;
+}

commit 53dc0e67788fc711d60062de1ff7a94d3e96ecad
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 29 14:39:09 2018 +0800

    regulator: pwm: use debug to verbose init voltage
    
    dm regulator uclass would verbose this message.
    
    Change-Id: I76c73bdcf6354d7d892f75ad022be416d3ab0c09
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/pwm_regulator.c b/drivers/power/regulator/pwm_regulator.c
index 7710e7960b..b719d54d3e 100644
--- a/drivers/power/regulator/pwm_regulator.c
+++ b/drivers/power/regulator/pwm_regulator.c
@@ -137,7 +137,7 @@ static int pwm_regulator_probe(struct udevice *dev)
 	priv->min_voltage = uc_pdata->min_uV;
 
 	if (priv->init_voltage > 0) {
-		printf("pwm-regulator(%s): init %d uV\n",
+		debug("pwm-regulator(%s): init %d uV\n",
 		       dev->name, priv->init_voltage);
 		pwm_regulator_set_voltage(dev, priv->init_voltage);
 	}

commit d9e2bd8a57e925fc1a92b0cf82a9fb3c3886e50c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 29 14:33:03 2018 +0800

    common: boot_rkimg: verbose partition type
    
    rockchip platforms support both efi and rkparam partition types,
    it helps a lot for debug.
    
    Change-Id: I3ba3fe552ecd99c38112a1417eb6c22721a03242
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index a5316e1510..962c582f38 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -14,6 +14,7 @@
 #include <boot_rkimg.h>
 #include <asm/arch/boot_mode.h>
 #include <asm/io.h>
+#include <part.h>
 
 #define TAG_KERNEL			0x4C4E524B
 
@@ -227,6 +228,8 @@ struct blk_desc *rockchip_get_bootdev(void)
 
 	dev_desc = blk_get_devnum_by_type(dev_type, devnum);
 
+	printf("PartType: %s\n", part_get_type(dev_desc));
+
 	return dev_desc;
 }
 

commit df2027612e85fd37126e3f7e276709c8927915a4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 29 14:32:29 2018 +0800

    disk: part: add interface to get partition type
    
    Change-Id: I69894f5e4ce03909a8290e941d8808593d027080
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/disk/part.c b/disk/part.c
index 095127dfdf..097e4e7e0e 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -319,6 +319,19 @@ void part_print(struct blk_desc *dev_desc)
 		drv->print(dev_desc);
 }
 
+const char *part_get_type(struct blk_desc *dev_desc)
+{
+	struct part_driver *drv;
+
+	drv = part_driver_lookup_type(dev_desc);
+	if (!drv) {
+		printf("## Unknown partition table type %x\n",
+		       dev_desc->part_type);
+		return NULL;
+	}
+
+	return drv->name;
+}
 #endif /* HAVE_BLOCK_DEVICE */
 
 int part_get_info(struct blk_desc *dev_desc, int part,
diff --git a/include/part.h b/include/part.h
index 5a42526d00..287311863c 100644
--- a/include/part.h
+++ b/include/part.h
@@ -105,7 +105,7 @@ int part_get_info(struct blk_desc *dev_desc, int part, disk_partition_t *info);
  * a partition occupying the entire disk.
  */
 int part_get_info_whole_disk(struct blk_desc *dev_desc, disk_partition_t *info);
-
+const char *part_get_type(struct blk_desc *dev_desc);
 void part_print(struct blk_desc *dev_desc);
 void part_init(struct blk_desc *dev_desc);
 void dev_print(struct blk_desc *dev_desc);
@@ -214,6 +214,8 @@ static inline int part_get_info(struct blk_desc *dev_desc, int part,
 static inline int part_get_info_whole_disk(struct blk_desc *dev_desc,
 					   disk_partition_t *info)
 { return -1; }
+
+static inline const char *part_get_type(struct blk_desc *dev_desc) { return NULL; }
 static inline void part_print(struct blk_desc *dev_desc) {}
 static inline void part_init(struct blk_desc *dev_desc) {}
 static inline void dev_print(struct blk_desc *dev_desc) {}

commit 61184b8f14d3ea554e6e44e4a8726a4438a6ecc3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 29 14:29:46 2018 +0800

    rockchip: board: remove verbose "Using kernel dtb"
    
    This is a debug message to know if we use kernel dtb.
    We have already got this info from "DTB: rk-kernel.dtb",
    so remove it.
    
    Change-Id: I28e29e43aa818ac61c9864b94bd80ceb85fc9c3a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 10d72a15ad..79122316ce 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -193,8 +193,6 @@ int init_kernel_dtb(void)
 
 	gd->fdt_blob = (void *)fdt_addr;
 
-	printf("Using kernel dtb\n");
-
 	return 0;
 }
 #endif

commit 0e107a57eb12f5260b6e9b10c63ebb167469d426
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 28 20:43:52 2018 +0800

    rockchip: dts: rk3128: add u-boot,dm-pre-reloc for usb otg
    
    It makes rockusb works normally even there is no valid kernel dtb.
    
    Change-Id: I7f17bda7fdd841135d0ab0392db58cfc65cc7f5e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3128-u-boot.dtsi b/arch/arm/dts/rk3128-u-boot.dtsi
index d702a58c46..fb5f1f7f07 100644
--- a/arch/arm/dts/rk3128-u-boot.dtsi
+++ b/arch/arm/dts/rk3128-u-boot.dtsi
@@ -46,3 +46,18 @@
 	u-boot,dm-pre-reloc;
 	clock-frequency = <24000000>;
 };
+
+&u2phy {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&u2phy_otg {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&usb_otg {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
\ No newline at end of file

commit 0a6aa43dec76ed2ad5cea5482bd00ae69b6b41c3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 28 20:35:14 2018 +0800

    rockchip: dts: rk322x: add u-boot,dm-pre-reloc for usb otg
    
    It makes rockusb works normally even there is no valid kernel dtb.
    
    Change-Id: Icdb2f9611d25525bbe15d4aafb9120e31e749af2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk322x-u-boot.dtsi b/arch/arm/dts/rk322x-u-boot.dtsi
index 4246af1b6c..608eec99a2 100644
--- a/arch/arm/dts/rk322x-u-boot.dtsi
+++ b/arch/arm/dts/rk322x-u-boot.dtsi
@@ -42,3 +42,18 @@
 &uart2 {
 	u-boot,dm-pre-reloc;
 };
+
+&u2phy0 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&u2phy0_otg {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&usb20_otg {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};

commit c111479f4f070f8ee93f7a61f094b68744f7f463
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 19 17:44:29 2018 +0800

    clk: rockchip: px30: support arm clk 408M
    
    Change-Id: I98cd856c99ebf2cd77d1a8ff94d2e0a40f0a4bfb
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index f867e4f8aa..fdfa2ed204 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -86,6 +86,7 @@ static struct cpu_rate_table px30_cpu_rates[] = {
 	PX30_CPUCLK_RATE(1008000000, 1, 5),
 	PX30_CPUCLK_RATE(816000000, 1, 3),
 	PX30_CPUCLK_RATE(600000000, 1, 3),
+	PX30_CPUCLK_RATE(408000000, 1, 1),
 };
 
 static u8 pll_mode_shift[PLL_COUNT] = {

commit d59cf5aebb67b925168bd8f731d061f6aa633d8a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Oct 24 15:57:05 2018 +0800

    dm: of_access: add ofnode_read_u64() support
    
    only support of-live.
    
    Change-Id: I37c10efa30ef46369f4a4ad7f16c4c758d6ad563
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/core/of_access.c b/drivers/core/of_access.c
index 92443d401c..5dbed31ceb 100644
--- a/drivers/core/of_access.c
+++ b/drivers/core/of_access.c
@@ -439,6 +439,33 @@ int of_read_u32(const struct device_node *np, const char *propname, u32 *outp)
 	return 0;
 }
 
+/**
+ * of_property_read_u64 - Find and read a 64 bit integer from a property
+ * @np:         device node from which the property value is to be read.
+ * @propname:   name of the property to be searched.
+ * @out_value:  pointer to return value, modified only if return value is 0.
+ *
+ * Search for a property in a device node and read a 64-bit value from
+ * it. Returns 0 on success, -EINVAL if the property does not exist,
+ * -ENODATA if property does not have a value, and -EOVERFLOW if the
+ * property data isn't large enough.
+ *
+ * The out_value is modified only if a valid u64 value can be decoded.
+ */
+int of_property_read_u64(const struct device_node *np, const char *propname,
+                         u64 *out_value)
+{
+	const __be32 *val = of_find_property_value_of_size(np, propname,
+							   sizeof(*out_value));
+
+	if (IS_ERR(val))
+		return PTR_ERR(val);
+
+	*out_value = of_read_number(val, 2);
+
+	return 0;
+}
+
 int of_read_u32_array(const struct device_node *np, const char *propname,
 		      u32 *out_values, size_t sz)
 {
diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index 44eb2bbb5f..8543c9366b 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -56,6 +56,21 @@ int ofnode_read_s32_default(ofnode node, const char *propname, s32 def)
 	return def;
 }
 
+int ofnode_read_u64(ofnode node, const char *propname, u64 *outp)
+{
+	assert(ofnode_valid(node));
+	debug("%s: %s: ", __func__, propname);
+
+	if (ofnode_is_np(node)) {
+		return of_property_read_u64(ofnode_to_np(node), propname, outp);
+	} else {
+		printf("%s: not implement\n", __func__);
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
 bool ofnode_read_bool(ofnode node, const char *propname)
 {
 	const void *prop;
diff --git a/include/dm/of_access.h b/include/dm/of_access.h
index 64efdb7035..035f0c8d65 100644
--- a/include/dm/of_access.h
+++ b/include/dm/of_access.h
@@ -219,6 +219,22 @@ struct device_node *of_find_node_by_phandle(phandle handle);
  */
 int of_read_u32(const struct device_node *np, const char *propname, u32 *outp);
 
+/**
+ * of_property_read_u64 - Find and read a 64 bit integer from a property
+ * @np:         device node from which the property value is to be read.
+ * @propname:   name of the property to be searched.
+ * @out_value:  pointer to return value, modified only if return value is 0.
+ *
+ * Search for a property in a device node and read a 64-bit value from
+ * it. Returns 0 on success, -EINVAL if the property does not exist,
+ * -ENODATA if property does not have a value, and -EOVERFLOW if the
+ * property data isn't large enough.
+ *
+ * The out_value is modified only if a valid u64 value can be decoded.
+ */
+int of_property_read_u64(const struct device_node *np, const char *propname,
+                         u64 *out_value);
+
 /**
  * of_read_u32_array() - Find and read an array of 32 bit integers
  *
diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index 742d6028c5..f90ce33ea9 100644
--- a/include/dm/ofnode.h
+++ b/include/dm/ofnode.h
@@ -227,6 +227,16 @@ static inline int ofnode_read_s32(ofnode node, const char *propname,
  */
 int ofnode_read_u32_default(ofnode ref, const char *propname, u32 def);
 
+/**
+ * ofnode_read_u64() - Read a 64-bit integer from a property
+ *
+ * @ref:	valid node reference to read property from
+ * @propname:	name of the property to read from
+ * @outp:	place to put value (if found)
+ * @return 0 if OK, -ve on error
+ */
+int ofnode_read_u64(ofnode node, const char *propname, u64 *outp);
+
 /**
  * ofnode_read_s32_default() - Read a 32-bit integer from a property
  *

commit 03af66d3ee7057293abd02708d5a02bf5665fa47
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 21 10:55:49 2018 +0800

    dm: pmic: use strstr() to match regulator prefix
    
    this is more flexsible to match regulator type.
    
    Change-Id: I5589b5d1d32d8ac1c6d09d64e680eddd31f2ba90
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/pmic/pmic-uclass.c b/drivers/power/pmic/pmic-uclass.c
index 8ef0d8bc71..8671c58100 100644
--- a/drivers/power/pmic/pmic-uclass.c
+++ b/drivers/power/pmic/pmic-uclass.c
@@ -30,7 +30,6 @@ int pmic_bind_children(struct udevice *pmic, ofnode parent,
 	const char *reg_name;
 	int bind_count = 0;
 	ofnode node;
-	int prefix_len;
 	int ret;
 	bool enable;
 
@@ -56,13 +55,12 @@ int pmic_bind_children(struct udevice *pmic, ofnode parent,
 		for (info = child_info; info->prefix && info->driver; info++) {
 			debug("  - compatible prefix: '%s'\n", info->prefix);
 
-			prefix_len = strlen(info->prefix);
-			if (strncmp(info->prefix, node_name, prefix_len)) {
+			if (!strstr(node_name, info->prefix)) {
 				reg_name = ofnode_read_string(node,
 							      "regulator-name");
 				if (!reg_name)
 					continue;
-				if (strncmp(info->prefix, reg_name, prefix_len))
+				if (!strstr(reg_name, info->prefix))
 					continue;
 			}
 
diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index 7ad88b75b7..d5669695ea 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -26,9 +26,9 @@ static struct reg_data rk817_init_reg[] = {
 #endif
 
 static const struct pmic_child_info pmic_children_info[] = {
-	{ .prefix = "DCDC_REG", .driver = "rk8xx_buck"},
-	{ .prefix = "LDO_REG", .driver = "rk8xx_ldo"},
-	{ .prefix = "SWITCH_REG", .driver = "rk8xx_switch"},
+	{ .prefix = "DCDC", .driver = "rk8xx_buck"},
+	{ .prefix = "LDO", .driver = "rk8xx_ldo"},
+	{ .prefix = "SWITCH", .driver = "rk8xx_switch"},
 	{ },
 };
 

commit 08b717aba0fef536e99f0b0d65b20bd4a4da785d
Author: Lin Huang <hl@rock-chips.com>
Date:   Thu Nov 22 10:29:21 2018 +0800

    clk: rockchip: rk1808: set apll default frequency to 1.2GHz
    
    For cpu_vdd default voltage enough to support cpu frequency to 1.2GHz,
    so set rk1808 default cpu frequency to 1.2GHz.
    
    Change-Id: Ia8a888ee79ab3ae3868790bcc1851552acf90086
    Signed-off-by: Lin Huang <hl@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk1808.h b/arch/arm/include/asm/arch-rockchip/cru_rk1808.h
index cf67ed18fb..1c7976460d 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk1808.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk1808.h
@@ -11,7 +11,7 @@
 #define MHz		1000000
 #define KHz		1000
 #define OSC_HZ		(24 * MHz)
-#define APLL_HZ		(600 * MHz)
+#define APLL_HZ		(1200 * MHz)
 #define PCLK_PMU_HZ	(100 * MHz)
 
 /* PX30 pll id */

commit fc1a55637d53e2e8447433577335dd601764e196
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Nov 21 13:40:41 2018 +0800

    rockush: add serialnumber to usb_device_descriptor
    
    Change-Id: I498be22dd73ffa8e8844bd9ceedb294b5bba72ce
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index cbc270c4f2..10d72a15ad 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -149,6 +149,7 @@ __weak int set_armclk_rate(void)
 
 int board_late_init(void)
 {
+	rockchip_set_serialno();
 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0)
 	setup_boot_mode();
 #endif
@@ -160,7 +161,6 @@ int board_late_init(void)
 #ifdef CONFIG_DRM_ROCKCHIP
 	rockchip_show_logo();
 #endif
-	rockchip_set_serialno();
 
 	soc_clk_dump();
 
diff --git a/cmd/rockusb.c b/cmd/rockusb.c
index e80194dfef..35d7020db8 100644
--- a/cmd/rockusb.c
+++ b/cmd/rockusb.c
@@ -140,6 +140,7 @@ static int do_rkusb(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 	unsigned int controller_index;
 	int rc;
 	int cable_ready_timeout __maybe_unused;
+	const char *s;
 
 	if (argc != 4)
 		return CMD_RET_USAGE;
@@ -168,6 +169,10 @@ static int do_rkusb(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 		goto cleanup_board;
 	}
 
+	s = env_get("serial#");
+	if (s)
+		g_dnl_set_serialnumber((char *)s);
+
 	rc = g_dnl_register("rkusb_ums_dnl");
 	if (rc) {
 		pr_err("g_dnl_register failed");

commit d55170174a87b02d954a993349a5475db77250f7
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Nov 14 19:31:12 2018 +0800

    pinctrl: rockchip: Add pinctrl support for rk3308b
    
    Change-Id: Ibf85312e909e040ef0efb120efe3f48c4a2c6ab9
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 3590b01912..e7f3d69c84 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -10,6 +10,7 @@
 #include <dm/ofnode.h>
 #include <regmap.h>
 #include <syscon.h>
+#include <asm/arch/cpu.h>
 
 #define MAX_ROCKCHIP_GPIO_PER_BANK	32
 #define RK_FUNC_GPIO			0
@@ -311,6 +312,10 @@ struct rockchip_pin_ctrl {
 	struct rockchip_mux_route_data *iomux_routes;
 	u32				niomux_routes;
 
+	int	(*ctrl_data_re_init)(struct rockchip_pin_ctrl *ctrl);
+
+	int	(*soc_data_init)(struct rockchip_pinctrl_priv *info);
+
 	void	(*pull_calc_reg)(struct rockchip_pin_bank *bank,
 				 int pin_num, struct regmap **regmap,
 				 int *reg, u8 *bit);
@@ -512,6 +517,94 @@ static struct rockchip_mux_recalced_data rk3308_mux_recalced_data[] = {
 	},
 };
 
+static struct rockchip_mux_recalced_data rk3308b_mux_recalced_data[] = {
+	{
+		.num = 1,
+		.pin = 14,
+		.reg = 0x28,
+		.bit = 12,
+		.mask = 0xf
+	}, {
+		.num = 1,
+		.pin = 15,
+		.reg = 0x2c,
+		.bit = 0,
+		.mask = 0x3
+	}, {
+		.num = 1,
+		.pin = 18,
+		.reg = 0x30,
+		.bit = 4,
+		.mask = 0xf
+	}, {
+		.num = 1,
+		.pin = 19,
+		.reg = 0x30,
+		.bit = 8,
+		.mask = 0xf
+	}, {
+		.num = 1,
+		.pin = 20,
+		.reg = 0x30,
+		.bit = 12,
+		.mask = 0xf
+	}, {
+		.num = 1,
+		.pin = 21,
+		.reg = 0x34,
+		.bit = 0,
+		.mask = 0xf
+	}, {
+		.num = 1,
+		.pin = 22,
+		.reg = 0x34,
+		.bit = 4,
+		.mask = 0xf
+	}, {
+		.num = 1,
+		.pin = 23,
+		.reg = 0x34,
+		.bit = 8,
+		.mask = 0xf
+	}, {
+		.num = 3,
+		.pin = 13,
+		.reg = 0x68,
+		.bit = 12,
+		.mask = 0xf
+	}, {
+		.num = 2,
+		.pin = 2,
+		.reg = 0x608,
+		.bit = 0,
+		.mask = 0x7
+	}, {
+		.num = 2,
+		.pin = 3,
+		.reg = 0x608,
+		.bit = 4,
+		.mask = 0x7
+	}, {
+		.num = 2,
+		.pin = 16,
+		.reg = 0x610,
+		.bit = 8,
+		.mask = 0x7
+	}, {
+		.num = 3,
+		.pin = 10,
+		.reg = 0x610,
+		.bit = 0,
+		.mask = 0x7
+	}, {
+		.num = 3,
+		.pin = 11,
+		.reg = 0x610,
+		.bit = 4,
+		.mask = 0x7
+	},
+};
+
 static struct rockchip_mux_recalced_data rk3328_mux_recalced_data[] = {
 	{
 		.num = 2,
@@ -859,6 +952,13 @@ static struct rockchip_mux_route_data rk3288_mux_route_data[] = {
 
 static struct rockchip_mux_route_data rk3308_mux_route_data[] = {
 	{
+		/* rtc_clk */
+		.bank_num = 0,
+		.pin = 19,
+		.func = 1,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 0) | BIT(0),
+	}, {
 		/* uart2_rxm0 */
 		.bank_num = 1,
 		.pin = 22,
@@ -885,7 +985,249 @@ static struct rockchip_mux_route_data rk3308_mux_route_data[] = {
 		.pin = 12,
 		.func = 2,
 		.route_offset = 0x314,
-		.route_val =  BIT(16 + 4) | BIT(4),
+		.route_val = BIT(16 + 4) | BIT(4),
+	}, {
+		/* i2s-8ch-1-sclktxm0 */
+		.bank_num = 1,
+		.pin = 3,
+		.func = 2,
+		.route_offset = 0x308,
+		.route_val = BIT(16 + 3),
+	}, {
+		/* i2s-8ch-1-sclkrxm0 */
+		.bank_num = 1,
+		.pin = 4,
+		.func = 2,
+		.route_offset = 0x308,
+		.route_val = BIT(16 + 3),
+	}, {
+		/* i2s-8ch-1-sclktxm1 */
+		.bank_num = 1,
+		.pin = 13,
+		.func = 2,
+		.route_offset = 0x308,
+		.route_val = BIT(16 + 3) | BIT(3),
+	}, {
+		/* i2s-8ch-1-sclkrxm1 */
+		.bank_num = 1,
+		.pin = 14,
+		.func = 2,
+		.route_offset = 0x308,
+		.route_val = BIT(16 + 3) | BIT(3),
+	}, {
+		/* pdm-clkm0 */
+		.bank_num = 1,
+		.pin = 4,
+		.func = 3,
+		.route_offset = 0x308,
+		.route_val = BIT(16 + 12) | BIT(16 + 13),
+	}, {
+		/* pdm-clkm1 */
+		.bank_num = 1,
+		.pin = 14,
+		.func = 4,
+		.route_offset = 0x308,
+		.route_val = BIT(16 + 12) | BIT(16 + 13) | BIT(12),
+	}, {
+		/* pdm-clkm2 */
+		.bank_num = 2,
+		.pin = 6,
+		.func = 2,
+		.route_offset = 0x308,
+		.route_val = BIT(16 + 12) | BIT(16 + 13) | BIT(13),
+	}, {
+		/* pdm-clkm-m2 */
+		.bank_num = 2,
+		.pin = 4,
+		.func = 3,
+		.route_offset = 0x600,
+		.route_val = BIT(16 + 2) | BIT(2),
+	},
+};
+
+static struct rockchip_mux_route_data rk3308b_mux_route_data[] = {
+	{
+		/* rtc_clk */
+		.bank_num = 0,
+		.pin = 19,
+		.func = 1,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 0) | BIT(0),
+	}, {
+		/* uart2_rxm0 */
+		.bank_num = 1,
+		.pin = 22,
+		.func = 2,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 2) | BIT(16 + 3),
+	}, {
+		/* uart2_rxm1 */
+		.bank_num = 4,
+		.pin = 26,
+		.func = 2,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 2) | BIT(16 + 3) | BIT(2),
+	}, {
+		/* i2c3_sdam0 */
+		.bank_num = 0,
+		.pin = 15,
+		.func = 2,
+		.route_offset = 0x608,
+		.route_val = BIT(16 + 8) | BIT(16 + 9),
+	}, {
+		/* i2c3_sdam1 */
+		.bank_num = 3,
+		.pin = 12,
+		.func = 2,
+		.route_offset = 0x608,
+		.route_val = BIT(16 + 8) | BIT(16 + 9) | BIT(8),
+	}, {
+		/* i2c3_sdam2 */
+		.bank_num = 2,
+		.pin = 0,
+		.func = 3,
+		.route_offset = 0x608,
+		.route_val = BIT(16 + 8) | BIT(16 + 9) | BIT(9),
+	}, {
+		/* i2s-8ch-1-sclktxm0 */
+		.bank_num = 1,
+		.pin = 3,
+		.func = 2,
+		.route_offset = 0x308,
+		.route_val = BIT(16 + 3),
+	}, {
+		/* i2s-8ch-1-sclkrxm0 */
+		.bank_num = 1,
+		.pin = 4,
+		.func = 2,
+		.route_offset = 0x308,
+		.route_val = BIT(16 + 3),
+	}, {
+		/* i2s-8ch-1-sclktxm1 */
+		.bank_num = 1,
+		.pin = 13,
+		.func = 2,
+		.route_offset = 0x308,
+		.route_val = BIT(16 + 3) | BIT(3),
+	}, {
+		/* i2s-8ch-1-sclkrxm1 */
+		.bank_num = 1,
+		.pin = 14,
+		.func = 2,
+		.route_offset = 0x308,
+		.route_val = BIT(16 + 3) | BIT(3),
+	}, {
+		/* pdm-clkm0 */
+		.bank_num = 1,
+		.pin = 4,
+		.func = 3,
+		.route_offset = 0x308,
+		.route_val =  BIT(16 + 12) | BIT(16 + 13),
+	}, {
+		/* pdm-clkm1 */
+		.bank_num = 1,
+		.pin = 14,
+		.func = 4,
+		.route_offset = 0x308,
+		.route_val = BIT(16 + 12) | BIT(16 + 13) | BIT(12),
+	}, {
+		/* pdm-clkm2 */
+		.bank_num = 2,
+		.pin = 6,
+		.func = 2,
+		.route_offset = 0x308,
+		.route_val = BIT(16 + 12) | BIT(16 + 13) | BIT(13),
+	}, {
+		/* pdm-clkm-m2 */
+		.bank_num = 2,
+		.pin = 4,
+		.func = 3,
+		.route_offset = 0x600,
+		.route_val = BIT(16 + 2) | BIT(2),
+	}, {
+		/* spi1_miso */
+		.bank_num = 3,
+		.pin = 10,
+		.func = 3,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 9),
+	}, {
+		/* spi1_miso_m1 */
+		.bank_num = 2,
+		.pin = 4,
+		.func = 2,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 9) | BIT(9),
+	}, {
+		/* owire_m0 */
+		.bank_num = 0,
+		.pin = 11,
+		.func = 3,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 10) | BIT(16 + 11),
+	}, {
+		/* owire_m1 */
+		.bank_num = 1,
+		.pin = 22,
+		.func = 7,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 10) | BIT(16 + 11) | BIT(10),
+	}, {
+		/* owire_m2 */
+		.bank_num = 2,
+		.pin = 2,
+		.func = 5,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 10) | BIT(16 + 11) | BIT(11),
+	}, {
+		/* can_rxd_m0 */
+		.bank_num = 0,
+		.pin = 11,
+		.func = 2,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 12) | BIT(16 + 13),
+	}, {
+		/* can_rxd_m1 */
+		.bank_num = 1,
+		.pin = 22,
+		.func = 5,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 12) | BIT(16 + 13) | BIT(12),
+	}, {
+		/* can_rxd_m2 */
+		.bank_num = 2,
+		.pin = 2,
+		.func = 4,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 12) | BIT(16 + 13) | BIT(13),
+	}, {
+		/* mac_rxd0_m0 */
+		.bank_num = 1,
+		.pin = 20,
+		.func = 3,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 14),
+	}, {
+		/* mac_rxd0_m1 */
+		.bank_num = 4,
+		.pin = 2,
+		.func = 2,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 14) | BIT(14),
+	}, {
+		/* uart3_rx */
+		.bank_num = 3,
+		.pin = 12,
+		.func = 4,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 15),
+	}, {
+		/* uart3_rx_m1 */
+		.bank_num = 0,
+		.pin = 17,
+		.func = 3,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 15) | BIT(15),
 	},
 };
 
@@ -2238,6 +2580,23 @@ static struct pinctrl_ops rockchip_pinctrl_ops = {
 	.get_gpio_mux			= rockchip_pinctrl_get_gpio_mux,
 };
 
+/* Ctrl data specially handle */
+static int rk3308b_ctrl_data_re_init(struct rockchip_pin_ctrl *ctrl)
+{
+	/*
+	 * Special for rk3308b, where we need to replace the recalced
+	 * and routed arrays.
+	 */
+	if (soc_is_rk3308b()) {
+		ctrl->iomux_recalced = rk3308b_mux_recalced_data;
+		ctrl->niomux_recalced = ARRAY_SIZE(rk3308b_mux_recalced_data);
+		ctrl->iomux_routes = rk3308b_mux_route_data;
+		ctrl->niomux_routes = ARRAY_SIZE(rk3308b_mux_route_data);
+	}
+
+	return 0;
+}
+
 /* retrieve the soc specific data */
 static struct rockchip_pin_ctrl *rockchip_pinctrl_get_soc_data(struct udevice *dev)
 {
@@ -2253,6 +2612,12 @@ static struct rockchip_pin_ctrl *rockchip_pinctrl_get_soc_data(struct udevice *d
 	drv_grf_offs = ctrl->grf_drv_offset;
 	bank = ctrl->pin_banks;
 
+	/* Ctrl data re-initialize for some Socs */
+	if (ctrl->ctrl_data_re_init) {
+		if (ctrl->ctrl_data_re_init(ctrl))
+			return NULL;
+	}
+
 	for (i = 0; i < ctrl->nr_banks; ++i, ++bank) {
 		int bank_pins = 0;
 
@@ -2348,6 +2713,48 @@ static struct rockchip_pin_ctrl *rockchip_pinctrl_get_soc_data(struct udevice *d
 	return ctrl;
 }
 
+/* SoC data specially handle */
+
+/* rk3308b SoC data initialize */
+#define RK3308B_GRF_SOC_CON13			0x608
+#define RK3308B_GRF_SOC_CON15			0x610
+
+/* RK3308B_GRF_SOC_CON13 */
+#define RK3308B_GRF_I2C3_IOFUNC_SRC_CTRL	(BIT(16 + 10) | BIT(10))
+#define RK3308B_GRF_GPIO2A3_SEL_SRC_CTRL	(BIT(16 + 7)  | BIT(7))
+#define RK3308B_GRF_GPIO2A2_SEL_SRC_CTRL	(BIT(16 + 3)  | BIT(3))
+
+/* RK3308B_GRF_SOC_CON15 */
+#define RK3308B_GRF_GPIO2C0_SEL_SRC_CTRL	(BIT(16 + 11) | BIT(11))
+#define RK3308B_GRF_GPIO3B3_SEL_SRC_CTRL	(BIT(16 + 7)  | BIT(7))
+#define RK3308B_GRF_GPIO3B2_SEL_SRC_CTRL	(BIT(16 + 3)  | BIT(3))
+
+static int rk3308b_soc_data_init(struct rockchip_pinctrl_priv *priv)
+{
+	int ret;
+
+	/*
+	 * Enable the special ctrl  of selected sources.
+	 */
+	if (soc_is_rk3308b()) {
+		ret = regmap_write(priv->regmap_base, RK3308B_GRF_SOC_CON13,
+				   RK3308B_GRF_I2C3_IOFUNC_SRC_CTRL |
+				   RK3308B_GRF_GPIO2A3_SEL_SRC_CTRL |
+				   RK3308B_GRF_GPIO2A2_SEL_SRC_CTRL);
+		if (ret)
+			return ret;
+
+		ret = regmap_write(priv->regmap_base, RK3308B_GRF_SOC_CON15,
+				   RK3308B_GRF_GPIO2C0_SEL_SRC_CTRL |
+				   RK3308B_GRF_GPIO3B3_SEL_SRC_CTRL |
+				   RK3308B_GRF_GPIO3B2_SEL_SRC_CTRL);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
 static int rockchip_pinctrl_probe(struct udevice *dev)
 {
 	struct rockchip_pinctrl_priv *priv = dev_get_priv(dev);
@@ -2391,6 +2798,13 @@ static int rockchip_pinctrl_probe(struct udevice *dev)
 		return -EINVAL;
 	}
 
+	/* Special handle for some Socs */
+	if (ctrl->soc_data_init) {
+		ret = ctrl->soc_data_init(priv);
+		if (ret)
+			return ret;
+	}
+
 	priv->ctrl = ctrl;
 	return 0;
 }
@@ -2704,6 +3118,8 @@ static struct rockchip_pin_ctrl rk3308_pin_ctrl = {
 		.niomux_recalced	= ARRAY_SIZE(rk3308_mux_recalced_data),
 		.iomux_routes		= rk3308_mux_route_data,
 		.niomux_routes		= ARRAY_SIZE(rk3308_mux_route_data),
+		.ctrl_data_re_init	= rk3308b_ctrl_data_re_init,
+		.soc_data_init		= rk3308b_soc_data_init,
 		.pull_calc_reg		= rk3308_calc_pull_reg_and_bit,
 		.drv_calc_reg		= rk3308_calc_drv_reg_and_bit,
 		.schmitt_calc_reg	= rk3308_calc_schmitt_reg_and_bit,

commit 58e5d8f2cde190d3dc845513141783ac589aae52
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Tue Nov 20 16:45:27 2018 +0800

    rockchip: add api to distinguish soc variants
    
    Add api soc_is_xxx for soc variants distinguishing.
    Most of them borrowed from linux kernel
    include/linux/rockchip/cpu.h.
    
    Change-Id: Ifb932c022ffdf001b64979fe2554452f0d480e88
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cpu.h b/arch/arm/include/asm/arch-rockchip/cpu.h
new file mode 100644
index 0000000000..110c4addfd
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/cpu.h
@@ -0,0 +1,69 @@
+/* SPDX-License-Identifier: GPL-2.0+  */
+/*
+ * Rockchip Electronics Co., Ltd.
+ *
+ */
+
+#ifndef __ASM_ARCH_CPU_H
+#define __ASM_ARCH_CPU_H
+
+#include <asm/io.h>
+
+#define ROCKCHIP_CPU_MASK       0xffff0000
+#define ROCKCHIP_CPU_RK312X     0x31260000
+#define ROCKCHIP_CPU_RK3288     0x32880000
+#define ROCKCHIP_CPU_RK3308	0x33080000
+
+#define ROCKCHIP_SOC_MASK	(ROCKCHIP_CPU_MASK | 0xff)
+#define ROCKCHIP_SOC_RK3126     (ROCKCHIP_CPU_RK312X | 0x00)
+#define ROCKCHIP_SOC_RK3126B    (ROCKCHIP_CPU_RK312X | 0x10)
+#define ROCKCHIP_SOC_RK3126C    (ROCKCHIP_CPU_RK312X | 0x20)
+#define ROCKCHIP_SOC_RK3128     (ROCKCHIP_CPU_RK312X | 0x01)
+#define ROCKCHIP_SOC_RK3288     (ROCKCHIP_CPU_RK3288 | 0x00)
+#define ROCKCHIP_SOC_RK3288W    (ROCKCHIP_CPU_RK3288 | 0x01)
+#define ROCKCHIP_SOC_RK3308	(ROCKCHIP_CPU_RK3308 | 0x00)
+#define ROCKCHIP_SOC_RK3308B	(ROCKCHIP_CPU_RK3308 | 0x01)
+
+static inline int rockchip_soc_id(void)
+{
+#if defined(CONFIG_ROCKCHIP_RK3288)
+	/* RK3288W HDMI Revision ID is 0x1A */
+	if (readl(0xFF980004) == 0x1A)
+		return ROCKCHIP_SOC_RK3288W;
+	else
+		return ROCKCHIP_SOC_RK3288;
+#elif defined(CONFIG_ROCKCHIP_RK3308)
+	/*
+	 * The CHIP_ID is stored in GRF_CHIP_ID:
+	 * RK3308:  0xcea (3306 in decimal)
+	 * RK3308B: 0x3308
+	 *
+	 */
+	if (readl(0xFF000800) == 3306)
+		return ROCKCHIP_SOC_RK3308;
+	else
+		return ROCKCHIP_SOC_RK3308B;
+#else
+	return 0;
+#endif
+}
+
+#define ROCKCHIP_SOC(id, ID) \
+static inline bool soc_is_##id(void) \
+{ \
+	int soc_id = rockchip_soc_id(); \
+	if (soc_id) \
+		return ((soc_id & ROCKCHIP_SOC_MASK) == ROCKCHIP_SOC_ ##ID); \
+	return false; \
+}
+
+ROCKCHIP_SOC(rk3126, RK3126)
+ROCKCHIP_SOC(rk3126b, RK3126B)
+ROCKCHIP_SOC(rk3126c, RK3126C)
+ROCKCHIP_SOC(rk3128, RK3128)
+ROCKCHIP_SOC(rk3288, RK3288)
+ROCKCHIP_SOC(rk3288w, RK3288W)
+ROCKCHIP_SOC(rk3308, RK3308)
+ROCKCHIP_SOC(rk3308b, RK3308B)
+
+#endif

commit 7cb1213267da696ab292a004e3f83eae227ef0f0
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Apr 18 18:01:21 2018 +0800

    Revert "rockchip: firefly: Add "usb start" to auto-start USB device"
    
    This reverts commit a1903c18db13e740e6bedb8955b3272dce5104e1.
    
    It's really bad idea to add "usb start" in preboot, it will spend
    a lot of time to scan usb bus, and most of people do not need this
    feature.
    
    Change-Id: Ifbc97320ca786f3c4ba593e415c0b2af2a979c47
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/include/configs/firefly-rk3288.h b/include/configs/firefly-rk3288.h
index d6bb9f6fb4..2b0ac9ec5f 100644
--- a/include/configs/firefly-rk3288.h
+++ b/include/configs/firefly-rk3288.h
@@ -10,8 +10,7 @@
 #define ROCKCHIP_DEVICE_SETTINGS \
 		"stdin=serial,usbkbd\0" \
 		"stdout=serial,vidconsole\0" \
-		"stderr=serial,vidconsole\0" \
-		"preboot=usb start\0"
+		"stderr=serial,vidconsole\0"
 
 #include <configs/rk3288_common.h>
 

commit 31bc0a57fb367e2a998911595e51a4304985c91b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Nov 21 18:19:25 2018 +0800

    rockchip: make_fit_optee: update output dir
    
    The output directory is not the same for different build system,
    let's get it from environment.
    
    Change-Id: Ifa05c9bc09d5b609d16bcbed767bccd3c2bbaa38
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/make_fit_optee.sh b/arch/arm/mach-rockchip/make_fit_optee.sh
index ee36779d07..f91c31e544 100755
--- a/arch/arm/mach-rockchip/make_fit_optee.sh
+++ b/arch/arm/mach-rockchip/make_fit_optee.sh
@@ -23,7 +23,7 @@ cat << EOF
 			compression = "none";
 EOF
 
-OUTDIR="/home/kever/src/u-boot"
+OUTDIR=$PWD
 DARM_BASE=`sed -n "/CONFIG_SYS_SDRAM_BASE=/s/CONFIG_SYS_SDRAM_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
 UBOOT_OFFSET=0x00200000
 UBOOT_BASE=$((DARM_BASE+UBOOT_OFFSET))

commit 41442d6c2cd15a66e08fe690a8f7944eff8d5b36
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Oct 26 10:39:11 2018 +0800

    configs: rk3328: remove unused modules to reduce size
    
    remove: usb-host/net/irq/partitions/command
    
    Change-Id: If4584ae2f608d482b07e2179056fbe1b7c7be596
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index 190b2dd904..b80af6d33a 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -30,17 +30,30 @@ CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_CONSOLE is not set
 CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_LZMADEC is not set
+# CONFIG_CMD_UNZIP is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
 CONFIG_CMD_GPT=y
-CONFIG_CMD_LOAD_ANDROID=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
-CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_TIME=y
+# CONFIG_CMD_MISC is not set
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=32
 CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_TPL_OF_CONTROL=y
@@ -61,15 +74,10 @@ CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y
 CONFIG_ADC_KEY=y
-CONFIG_GPIO_KEY=y
-CONFIG_RK_KEY=y
 CONFIG_MISC=y
 CONFIG_ROCKCHIP_EFUSE=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_DM_ETH=y
-CONFIG_ETH_DESIGNWARE=y
-CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
@@ -91,14 +99,6 @@ CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
-CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_GENERIC=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_OHCI_GENERIC=y
-CONFIG_USB_DWC2=y
-CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
@@ -108,13 +108,12 @@ CONFIG_G_DNL_PRODUCT_NUM=0x330a
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_PANEL=y
 CONFIG_DRM_ROCKCHIP_DW_HDMI=y
 CONFIG_ROCKCHIP_INNO_HDMI_PHY=y
-CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
-CONFIG_DRM_ROCKCHIP_LVDS=y
-CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_ROCKCHIP_DRM_TVE=y
 CONFIG_LCD=y
+# CONFIG_IRQ is not set
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y

commit 1e8c0e44aa2958d63eda2f36fa1ecb4472abcad0
Author: Tony Xu <tony.xu@rock-chips.com>
Date:   Sat Nov 3 17:42:39 2018 +0800

    Attestation key: write attestation key to secure storage
    
    Split attestation key into AttestationKey.ec and AttestationKey.rsa,
    then write to secure storage.
    
    Change-Id: I8e00d602c4174a002e6ecad2e4cfa846f32a681f
    Signed-off-by: Tony Xu <tony.xu@rock-chips.com>

diff --git a/common/attestation_key.c b/common/attestation_key.c
index 675e48a19b..d90d8d9b78 100644
--- a/common/attestation_key.c
+++ b/common/attestation_key.c
@@ -12,7 +12,7 @@
 
 #include <optee_include/OpteeClientApiLib.h>
 
-/* attestation data offset*/
+/* attestation data offset */
 #define ATTESTATION_DATA_OFFSET  65536
 
 /* block size */
@@ -24,6 +24,15 @@
 #define ATAP_BLOB_LEN_MAX 2048
 #define ATAP_CERT_CHAIN_LEN_MAX 8192
 #define ATAP_CERT_CHAIN_ENTRIES_MAX 8
+#define CA_HEADER_LEN 16
+
+/*
+ * Name of the attestation key file is
+ * ATTESTATION_KEY_PREFIX.%algorithm,
+ * which include PrivateKey and CertificateChain,
+ * where algorithm is either "EC" or "RSA"
+ */
+#define ATTESTATION_KEY_FILE "AttestationKey"
 
 /*
  * Name of the attestation key file is
@@ -58,7 +67,7 @@ typedef struct {
 } atap_certchain;
 
 uint32_t write_to_keymaster(uint8_t *filename, uint32_t filename_size,
-				uint8_t *data, uint32_t data_size);
+			    uint8_t *data, uint32_t data_size);
 
 static const char *get_keyslot_str(keymaster_algorithm_t key_type)
 {
@@ -87,7 +96,6 @@ static void free_cert_chain(atap_certchain cert_chain)
 	for (i = 0; i < cert_chain.entry_count; ++i) {
 		if (cert_chain.entries[i].data)
 			free(cert_chain.entries[i].data);
-
 		cert_chain.entries[i].data_length = 0;
 	}
 	memset(&cert_chain, 0, sizeof(atap_certchain));
@@ -195,7 +203,7 @@ static uint32_t write_key(keymaster_algorithm_t key_type,
 {
 	char key_file[STORAGE_ID_LENGTH_MAX] = {0};
 
-	snprintf(key_file, STORAGE_ID_LENGTH_MAX, "%s.%s", ATTESTATION_KEY_PREFIX,
+	snprintf(key_file, STORAGE_ID_LENGTH_MAX, "%s.%s", ATTESTATION_KEY_FILE,
 		get_keyslot_str(key_type));
 	write_to_keymaster((uint8_t *)key_file, strlen(key_file),
 				(uint8_t *)key, key_size);
@@ -379,3 +387,88 @@ atap_result load_attestation_key(struct blk_desc *dev_desc,
 
 	return ATAP_RESULT_OK;
 }
+
+atap_result read_key_data(uint8_t **key_buf, uint8_t *key_data,
+			  uint32_t *key_data_length)
+{
+	atap_blob key;
+	atap_certchain certchain;
+
+	 /* read private key */
+	if (copy_blob_from_buf(key_buf, &key) == false) {
+		printf("copy_blob_from_buf failed!\n");
+		return ATAP_RESULT_ERROR_BUF_COPY;
+	}
+	memcpy(key_data, &key.data_length, sizeof(uint32_t));
+	memcpy(key_data + 4, key.data, key.data_length);
+	*key_data_length = 4 + key.data_length;
+
+	/* read certchain */
+	if (copy_cert_chain_from_buf(key_buf, &certchain) == false) {
+		printf("copy_cert_chain_from_buf failed!\n");
+		return ATAP_RESULT_ERROR_BUF_COPY;
+	}
+	memcpy(key_data + *key_data_length,
+	       &certchain.entry_count, sizeof(uint32_t));
+	*key_data_length += 4;
+	for (int i = 0; i < certchain.entry_count; ++i) {
+		memcpy(key_data + *key_data_length,
+		       &certchain.entries[i].data_length, sizeof(uint32_t));
+		*key_data_length += 4;
+		memcpy(key_data + *key_data_length, certchain.entries[i].data,
+		       certchain.entries[i].data_length);
+		*key_data_length += certchain.entries[i].data_length;
+	}
+
+	free_blob(key);
+	free_cert_chain(certchain);
+
+	return 0;
+}
+
+atap_result write_attestation_key_to_secure_storage(uint8_t *received_data,
+						    uint32_t len)
+{
+	unsigned char keybuf[ATTESTATION_DATA_OFFSET] = {0};
+	uint32_t device_id_size = 0;
+	uint8_t device_id[32] = {0};
+	uint8_t *key_buf = NULL;
+	uint32_t algorithm;
+	uint8_t *key_data;
+	uint32_t key_data_length = 0;
+	/* skip the tag(4 byte) and the size of key(4 byte) */
+	memcpy(keybuf, received_data + 8, ATTESTATION_DATA_OFFSET);
+	key_data = malloc(ATTESTATION_DATA_OFFSET);
+	/* read device id from keybuf */
+	memcpy(&device_id_size, keybuf + CA_HEADER_LEN, sizeof(uint32_t));
+	if (device_id_size < 0 || device_id_size > sizeof(device_id)) {
+		printf("invalidate device_id_size:%d\n", device_id_size);
+		return ATAP_RESULT_ERROR_INVALID_DEVICE_ID;
+	}
+
+	memcpy(device_id, keybuf + CA_HEADER_LEN + sizeof(uint32_t),
+	       device_id_size);
+	printf("device_id:%s\n", device_id);
+
+	/* read algorithm(RSA) from keybuf */
+	key_buf = keybuf + CA_HEADER_LEN + sizeof(uint32_t) + device_id_size;
+	copy_uint32_from_buf(&key_buf, &algorithm);
+	printf("\n algorithm: %d\n", algorithm);
+	/* read rsa key and certchain */
+	read_key_data(&key_buf, key_data, &key_data_length);
+	printf("write attestation key: RSA\n");
+	write_key(KM_ALGORITHM_RSA, key_data, key_data_length);
+
+	/* read algorithm(EC) from keybuf */
+	copy_uint32_from_buf(&key_buf, &algorithm);
+	printf("\n algorithm: %d\n", algorithm);
+	/* read ec key and certchain */
+	read_key_data(&key_buf, key_data, &key_data_length);
+	printf("write attestation key: EC\n");
+	write_key(KM_ALGORITHM_EC, key_data, key_data_length);
+
+	memset(keybuf, 0, sizeof(keybuf));
+	free(key_data);
+
+	return ATAP_RESULT_OK;
+}
diff --git a/include/attestation_key.h b/include/attestation_key.h
index 0eb09069f2..87b3abb89c 100644
--- a/include/attestation_key.h
+++ b/include/attestation_key.h
@@ -26,5 +26,14 @@ typedef enum {
 /* load attestation key from misc partition. */
 atap_result load_attestation_key(struct blk_desc *dev_desc,
 				disk_partition_t *misc_partition);
-
+atap_result read_key_data(uint8_t **key_buf, uint8_t *key_data,
+			  uint32_t *key_data_length);
+/*
+ * write attestation key to secure storage.
+ * @received_data: received data from usb
+ * @len: the size of received_data
+ * @return ATAP_RESULT_OK if ok, or ATAP_RESULT_ERROR_* on error
+ */
+atap_result write_attestation_key_to_secure_storage(uint8_t *received_data,
+						    uint32_t len);
 #endif	//ATTESTATION_KEY_H_
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index facc268948..e9b0cb9ab0 100755
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -11,6 +11,7 @@
 #include <optee_include/tee_api_defines.h>
 #include <boot_rkimg.h>
 #include <stdlib.h>
+#include <attestation_key.h>
 
 #define	BOOT_FROM_EMMC	(1 << 1)
 #define	WIDEVINE_TAG	"KBOX"
@@ -131,11 +132,12 @@ int write_keybox_to_secure_storage(uint8_t *uboot_data, uint32_t len)
 	uint32_t key_size;
 	uint32_t data_size;
 	uint32_t object_id;
-	TEEC_Result ret;
 	int rc = 0;
 
 	if (memcmp(uboot_data, WIDEVINE_TAG, 4) == 0) {
 		/* widevine keybox */
+		TEEC_Result ret;
+
 		TEEC_UUID widevine_uuid = { 0xc11fe8ac, 0xb997, 0x48cf,
 			{ 0xa2, 0x8d, 0xe2, 0xa5, 0x5e, 0x52, 0x40, 0xef} };
 		object_id = 101;
@@ -159,9 +161,17 @@ int write_keybox_to_secure_storage(uint8_t *uboot_data, uint32_t len)
 		}
 	} else if (memcmp(uboot_data, ATTESTATION_TAG, 4) == 0) {
 		/* attestation key */
+		atap_result ret;
 
+		ret = write_attestation_key_to_secure_storage(uboot_data, len);
+		if (ret == ATAP_RESULT_OK) {
+			rc = 0;
+			printf("write attestation key to secure storage success\n");
+		} else {
+			rc = -EIO;
+			printf("write attestation key to secure storage fail\n");
+		}
 	}
-
 	return rc;
 }
 

commit da54d0c8b44d36b84919283d924c3d3c266d094f
Author: YouMin Chen <cym@rock-chips.com>
Date:   Tue Nov 6 20:02:34 2018 +0800

    rockchip: rk3328: add support ddr4
    
    Change-Id: Id4d5faa579c8715ea3833744420c61fbf34ddfea
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/dts/rk3328-sdram-ddr4-666.dtsi b/arch/arm/dts/rk3328-sdram-ddr4-666.dtsi
new file mode 100644
index 0000000000..78be7f0bec
--- /dev/null
+++ b/arch/arm/dts/rk3328-sdram-ddr4-666.dtsi
@@ -0,0 +1,212 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd.
+
+&dmc {
+	rockchip,sdram-params = <
+		0x1
+		0xA
+		0x2
+		0x1
+		0x0
+		0x0
+		0x11
+		0x0
+		0
+
+		0x94291288
+		0x00000000
+		0x00000027
+		0x00000462
+		0x00000015
+		0x00000242
+		0x000000ff
+
+		333
+		0
+		0
+
+		0x00000000
+		0x43049010
+		0x00000064
+		0x0028003b
+		0x000000d0
+		0x00020053
+		0x000000d4
+		0x00220000
+		0x000000d8
+		0x00000100
+		0x000000dc
+		0x00040000
+		0x000000e0
+		0x00000000
+		0x000000e4
+		0x00110000
+		0x000000e8
+		0x00000420
+		0x000000ec
+		0x00000400
+		0x000000f4
+		0x000f011f
+		0x00000100
+		0x09060b06
+		0x00000104
+		0x00020209
+		0x00000108
+		0x0505040a
+		0x0000010c
+		0x0040400c
+		0x00000110
+		0x05030206
+		0x00000114
+		0x03030202
+		0x00000120
+		0x03030b03
+		0x00000124
+		0x00020208
+		0x00000180
+		0x01000040
+		0x00000184
+		0x00000000
+		0x00000190
+		0x07030003
+		0x00000198
+		0x05001100
+		0x000001a0
+		0xc0400003
+		0x00000240
+		0x06000604
+		0x00000244
+		0x00000201
+		0x00000250
+		0x00000f00
+		0x00000490
+		0x00000001
+		0xffffffff
+		0xffffffff
+		0xffffffff
+		0xffffffff
+
+		0x00000004
+		0x0000000c
+		0x00000028
+		0x0000000a
+		0x0000002c
+		0x00000000
+		0x00000030
+		0x00000009
+		0xffffffff
+		0xffffffff
+
+		0x77
+		0x88
+		0x79
+		0x79
+		0x87
+		0x97
+		0x87
+		0x78
+		0x77
+		0x78
+		0x87
+		0x88
+		0x87
+		0x87
+		0x77
+
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x69
+		0x9
+
+		0x77
+		0x78
+		0x77
+		0x78
+		0x77
+		0x78
+		0x77
+		0x78
+		0x77
+		0x79
+		0x9
+
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x69
+		0x9
+
+		0x77
+		0x78
+		0x77
+		0x77
+		0x77
+		0x77
+		0x77
+		0x77
+		0x77
+		0x79
+		0x9
+
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x69
+		0x9
+
+		0x77
+		0x78
+		0x77
+		0x78
+		0x77
+		0x78
+		0x77
+		0x78
+		0x77
+		0x79
+		0x9
+
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x69
+		0x9
+
+		0x77
+		0x78
+		0x77
+		0x77
+		0x77
+		0x77
+		0x77
+		0x77
+		0x77
+		0x79
+		0x9
+	>;
+};

commit 5356fe17e9a249e4e70aea55b8f3f0debe0f3092
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Wed Nov 7 16:13:31 2018 +0800

    video/drm: lvds: enable chanel1 when in ttl mode
    
    Change-Id: I1b2022455fb9a6d45290628831c9683a026cefde
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index f534013ac6..70c9244159 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -87,7 +87,8 @@ static inline void lvds_writel(struct rockchip_lvds_device *lvds,
 	writel(val, lvds->regbase + offset);
 
 	if ((lvds->pdata->chip_type == RK3288_LVDS) &&
-	    (lvds->output == DISPLAY_OUTPUT_DUAL_LVDS))
+	    ((lvds->output == DISPLAY_OUTPUT_DUAL_LVDS) ||
+	     (lvds->output == DISPLAY_OUTPUT_RGB)))
 		writel(val, lvds->regbase + offset + 0x100);
 }
 

commit 3c5714f034cfff1095a2379757c8a564e5b03d5f
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Nov 16 11:27:20 2018 +0800

    video/drm: lvds: add bandgap handling
    
    Change-Id: I8dbeefe22f41ba384a9fbd5576ab9e1dbd6886ee
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index e02f8d3813..f534013ac6 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -141,7 +141,8 @@ static int rk336x_lvds_pwr_off(struct display_state *state)
 	/* disable lvds lane and power off pll */
 	lvds_writel(lvds, MIPIPHY_REGEB,
 		    v_LANE0_EN(0) | v_LANE1_EN(0) | v_LANE2_EN(0) |
-		    v_LANE3_EN(0) | v_LANECLK_EN(0) | v_PLL_PWR_OFF(1));
+		    v_LANE3_EN(0) | v_LANECLK_EN(0) | v_PLL_PWR_OFF(1) |
+		    v_LVDS_BGPD(1));
 
 	/* power down lvds pll and bandgap */
 	lvds_msk_reg(lvds, MIPIPHY_REG1,
@@ -186,7 +187,8 @@ static int rk336x_lvds_pwr_on(struct display_state *state)
 		/* enable lvds lane and power on pll */
 		lvds_writel(lvds, MIPIPHY_REGEB,
 			    v_LANE0_EN(1) | v_LANE1_EN(1) | v_LANE2_EN(1) |
-			    v_LANE3_EN(1) | v_LANECLK_EN(1) | v_PLL_PWR_OFF(0));
+			    v_LANE3_EN(1) | v_LANECLK_EN(1) | v_PLL_PWR_OFF(0) |
+			    v_LVDS_BGPD(0));
 
 		/* enable lvds */
 		lvds_msk_reg(lvds, MIPIPHY_REGE3,
@@ -224,9 +226,9 @@ static void px30_output_ttl(struct display_state *state)
 	writel(val, lvds->grf + PX30_GRF_PD_VO_CON1);
 
 	/* enable lane */
-	lvds_writel(lvds, MIPIPHY_REG0, 0x7f);
+	lvds_msk_reg(lvds, MIPIPHY_REG0, 0x7c, 0x7c);
 	val = v_LANE0_EN(1) | v_LANE1_EN(1) | v_LANE2_EN(1) | v_LANE3_EN(1) |
-		v_LANECLK_EN(1) | v_PLL_PWR_OFF(1);
+		v_LANECLK_EN(1) | v_PLL_PWR_OFF(1) | v_LVDS_BGPD(0);
 	lvds_writel(lvds, MIPIPHY_REGEB, val);
 	/* set ttl mode and reset phy config */
 	val = v_LVDS_MODE_EN(0) | v_TTL_MODE_EN(1) | v_MIPI_MODE_EN(0) |
@@ -254,9 +256,9 @@ static void rk3126_output_ttl(struct display_state *state)
 		v_RK3126_MIPITTL_LANE3_EN(1);
 	writel(val, lvds->grf + lvds->pdata->grf_soc_con15);
 	/* enable lane */
-	lvds_writel(lvds, MIPIPHY_REG0, 0x7f);
+	lvds_msk_reg(lvds, MIPIPHY_REG0, 0x7c, 0x7c);
 	val = v_LANE0_EN(1) | v_LANE1_EN(1) | v_LANE2_EN(1) | v_LANE3_EN(1) |
-		v_LANECLK_EN(1) | v_PLL_PWR_OFF(1);
+		v_LANECLK_EN(1) | v_PLL_PWR_OFF(1) | v_LVDS_BGPD(0);
 	lvds_writel(lvds, MIPIPHY_REGEB, val);
 	/* set ttl mode and reset phy config */
 	val = v_LVDS_MODE_EN(0) | v_TTL_MODE_EN(1) | v_MIPI_MODE_EN(0) |
@@ -280,9 +282,9 @@ static void rk336x_output_ttl(struct display_state *state)
 	writel(val, lvds->grf + lvds->pdata->grf_soc_con15);
 
 	/* enable lane */
-	lvds_writel(lvds, MIPIPHY_REG0, 0x7f);
+	lvds_msk_reg(lvds, MIPIPHY_REG0, 0x7c, 0x7c);
 	val = v_LANE0_EN(1) | v_LANE1_EN(1) | v_LANE2_EN(1) | v_LANE3_EN(1) |
-		v_LANECLK_EN(1) | v_PLL_PWR_OFF(1);
+		v_LANECLK_EN(1) | v_PLL_PWR_OFF(1) | v_LVDS_BGPD(0);
 	lvds_writel(lvds, MIPIPHY_REGEB, val);
 
 	/* set ttl mode and reset phy config */
diff --git a/drivers/video/drm/rockchip_lvds.h b/drivers/video/drm/rockchip_lvds.h
index 813b8288da..8c5f23e9f8 100644
--- a/drivers/video/drm/rockchip_lvds.h
+++ b/drivers/video/drm/rockchip_lvds.h
@@ -225,6 +225,7 @@ enum {
 #define MIPIPHY_REGE8           0x03a0
 
 #define MIPIPHY_REGEB           0x03ac
+#define v_LVDS_BGPD(x)		BITS_MASK(x, 1, 0)
 #define v_PLL_PWR_OFF(x)        BITS_MASK(x, 1, 2)
 #define v_LANECLK_EN(x)         BITS_MASK(x, 1, 3)
 #define v_LANE3_EN(x)           BITS_MASK(x, 1, 4)

commit 206cad104e0d6f6bb3b0a978c468d2a2224506f9
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Nov 16 11:21:48 2018 +0800

    rockchip: px30: disable video phy bandgap by default to reduce power consumption
    
    Change-Id: I98f84a9fd73a42252c695ab0dcc8fe0185ecd611
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c
index 86e7248982..308d3d5a1a 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -18,6 +18,8 @@
 
 #define PMU_PWRDN_CON			0xff000018
 
+#define VIDEO_PHY_BASE			0xff2e0000
+
 #define SERVICE_CORE_ADDR		0xff508000
 #define QOS_PRIORITY			0x08
 
@@ -59,6 +61,10 @@ int arch_cpu_init(void)
 	writel(QOS_PRIORITY_LEVEL(1, 1), SERVICE_CORE_ADDR + QOS_PRIORITY);
 #endif
 
+	/* Disable video phy bandgap by default */
+	writel(0x82, VIDEO_PHY_BASE + 0x0000);
+	writel(0x05, VIDEO_PHY_BASE + 0x03ac);
+
 	return 0;
 }
 

commit 7bd73124c26922d3f6cd6f0e74e3399d87a692cc
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Tue Nov 20 16:39:52 2018 +0800

    rockchip: rk3308: set compressed kernel image to 0x01880000(24M + 0x80000) for aarch64
    
    We put decompressed kernel image at 0x02080000(32M + 0x80000)
    for arm64, so there is very limit space left after 32M offset
    for some boards which run with 64M DRAM.
    Put compressed kernel image to 24M + 0x8000, then u-boot can
    decompresse it to 32M + 0x80000, this make boards with 64M
    SDRAM can boot compressed kernel image.
    
    Change-Id: Ifbed027fca1e6dfa420ad52bc903aa770244af2f
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h
index 5417838907..2420e224e2 100644
--- a/include/configs/rk3308_common.h
+++ b/include/configs/rk3308_common.h
@@ -50,7 +50,7 @@
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x01f00000\0" \
 	"kernel_addr_r=0x02080000\0" \
-	"kernel_addr_c=0x04080000\0" \
+	"kernel_addr_c=0x01880000\0" \
 	"ramdisk_addr_r=0x04000000\0"
 #else
 #define ENV_MEM_LAYOUT_SETTINGS \

commit 37a2bd9eec297fb82b3a804291a02f17f70bd909
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Thu Nov 15 09:39:57 2018 +0800

    configs: popmetal-rk3288: disable silent console
    
    We still hope to see the boot log from console.
    
    Change-Id: Id7d8588aab198161361b6f8b59177fd3bb7f90a6
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/configs/popmetal-rk3288_defconfig b/configs/popmetal-rk3288_defconfig
index da2b7cd362..0a4fb89b9c 100644
--- a/configs/popmetal-rk3288_defconfig
+++ b/configs/popmetal-rk3288_defconfig
@@ -8,7 +8,6 @@ CONFIG_TARGET_POPMETAL_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-popmetal"
 CONFIG_DEBUG_UART=y
-CONFIG_SILENT_CONSOLE=y
 CONFIG_CONSOLE_MUX=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y

commit b57700811558b80e4235111c1d3b399e428117c5
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Thu Nov 15 09:37:45 2018 +0800

    configs: popmetal-rk3288: enable boot_android command
    
    Enable boot_android command to boot Android format image.
    
    Change-Id: Ia516d77af5480608f5d33ae3cdf8f7e69eb307ba
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/configs/popmetal-rk3288_defconfig b/configs/popmetal-rk3288_defconfig
index c9f958b1f0..da2b7cd362 100644
--- a/configs/popmetal-rk3288_defconfig
+++ b/configs/popmetal-rk3288_defconfig
@@ -8,16 +8,18 @@ CONFIG_TARGET_POPMETAL_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-popmetal"
 CONFIG_DEBUG_UART=y
-# CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_SILENT_CONSOLE=y
 CONFIG_CONSOLE_MUX=y
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

commit a21c2f0ae12614a874794d649040f6de50b9ca6b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 14 10:57:24 2018 +0800

    rockchip: dts: rk3368-evb: move chosen to *-u-boot.dtsi
    
    Change-Id: I642736143d7a01df24a2814ad188247314d9315f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3368-evb.dts b/arch/arm/dts/rk3368-evb.dts
index 6461d8a3b2..fe55e234b1 100644
--- a/arch/arm/dts/rk3368-evb.dts
+++ b/arch/arm/dts/rk3368-evb.dts
@@ -12,10 +12,6 @@
 / {
 	model = "Rockchip RK3399 Evaluation Board";
 	compatible = "rockchip,rk3368-evb", "rockchip,rk3368";
-
-	chosen {
-		stdout-path = "serial2:115200n8";
-	};
 };
 
 &emmc {
diff --git a/arch/arm/dts/rk3368-u-boot.dtsi b/arch/arm/dts/rk3368-u-boot.dtsi
index cd53b84579..4a4cd71f42 100644
--- a/arch/arm/dts/rk3368-u-boot.dtsi
+++ b/arch/arm/dts/rk3368-u-boot.dtsi
@@ -9,6 +9,10 @@
 		mmc0 = &emmc;
 		mmc1 = &sdmmc;
 	};
+
+	chosen {
+		stdout-path = "serial2:115200n8";
+	};
 };
 
 &uart2 {

commit 01a0b7a601cf0dad4958e764383b8242fde6dac0
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 14 10:55:24 2018 +0800

    make.sh: using wide range match for all loader ini
    
    Change-Id: I1d4f63ed0685816f0b41796ac10bdafae068eee2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index a9be77561f..6e9092cd7c 100755
--- a/make.sh
+++ b/make.sh
@@ -492,7 +492,7 @@ pack_loader_image()
 	cd ${RKBIN}
 
 	if [ "${mode}" = 'all' ]; then
-		files=`ls ${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL*.ini`
+		files=`ls ${RKBIN}/RKBOOT/${RKCHIP_LOADER}*MINIALL*.ini`
 		for ini in $files
 		do
 			if [ -f "$ini" ]; then

commit ae1f243a7bef8894787afa9aa526c0afbd38ccbd
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Nov 19 14:46:15 2018 +0800

    mmc: delete SEND_STATUS after set-timing in hs200 mode
    
    In the eMMC spec, “Note that while the actual timing change is done,
    the behavior of any command sent command sent (like CMD13) cannot be
    guaranteed due to the asynchronous operation. Therefore it is not
    recommended to use CMD13 to check the busy completion of the timing
    change indication.” indicates that SEND_STATUS can not be send after
    set-timing, so delete it.
    
    Test eMMC model:
    Manufacturer ID: 45
    OEM: 100
    Name: DG401
    Rd Block Len: 512
    MMC version 5.1
    Capacity: 14.7 GiB
    
    Change-Id: Idd47461b529f28af649f2275041f36ef998ee404
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 7f74c0864d..54a316fab5 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -844,7 +844,6 @@ static int mmc_select_hs_ddr(struct mmc *mmc)
 static int mmc_select_hs200(struct mmc *mmc)
 {
 	int ret;
-	struct mmc_cmd cmd;
 
 	/*
 	 * Set the bus width(4 or 8) with host's support and
@@ -861,18 +860,6 @@ static int mmc_select_hs200(struct mmc *mmc)
 			return ret;
 
 		mmc_set_timing(mmc, MMC_TIMING_MMC_HS200);
-
-		cmd.cmdidx = MMC_CMD_SEND_STATUS;
-		cmd.resp_type = MMC_RSP_R1;
-		cmd.cmdarg = mmc->rca << 16;
-
-		ret = mmc_send_cmd(mmc, &cmd, NULL);
-
-		if (ret)
-			return ret;
-
-		if (cmd.response[0] & MMC_STATUS_SWITCH_ERROR)
-			return -EBADMSG;
 	}
 
 	return ret;

commit 9e8ce8162d1b0500db3a56b0878c10ae0dbdc425
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Tue Nov 6 17:11:17 2018 +0800

    mmc: distinguish switch command via send_status
    
    The cmd13 can't guarantee the switch command is success even it response
    without any error bit assert. So we should wait busy signal to wait the
    behaviour of the device is completed.
    
    Change-Id: Ia7e9efc27b5e05a7bcb9b4c98eef1e134efc29e7
    Fixes: 55e5defd2071 ("mmc: rework mmc_switch for non-send_status scenario")
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index afe772284d..7f74c0864d 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -562,7 +562,7 @@ static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
 	return err;
 }
 
-static int mmc_poll_for_busy(struct mmc *mmc)
+static int mmc_poll_for_busy(struct mmc *mmc, u8 send_status)
 {
 	struct mmc_cmd cmd;
 	u8 busy = true;
@@ -576,8 +576,13 @@ static int mmc_poll_for_busy(struct mmc *mmc)
 
 	start = get_timer(0);
 
+	if (!send_status && !mmc_can_card_busy(mmc)) {
+		mdelay(timeout);
+		return 0;
+	}
+
 	do {
-		if (mmc_can_card_busy(mmc)) {
+		if (!send_status) {
 			busy = mmc_card_busy(mmc);
 		} else {
 			ret = mmc_send_cmd(mmc, &cmd, NULL);
@@ -614,8 +619,8 @@ static int __mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value,
 	do {
 		ret = mmc_send_cmd(mmc, &cmd, NULL);
 
-		if (!ret && send_status)
-			return mmc_poll_for_busy(mmc);
+		if (!ret)
+			return mmc_poll_for_busy(mmc, send_status);
 	} while (--retries > 0 && ret);
 
 	return ret;

commit 2b78fc239c59189239a03a461d11bc6911331cc6
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Nov 19 11:40:23 2018 +0800

    rockchip: remove unused fit source file
    
    We use fit generator script instead.
    
    Change-Id: Ia799d5032e5f4ce21647548eca6efa70856da1a5
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/fit_spl_optee.its b/arch/arm/mach-rockchip/fit_spl_optee.its
deleted file mode 100644
index e07a5394db..0000000000
--- a/arch/arm/mach-rockchip/fit_spl_optee.its
+++ /dev/null
@@ -1,50 +0,0 @@
-/*
- * Copyright (C) 2017 Rockchip Electronic Co.,Ltd
- *
- * Simple U-boot fit source file containing U-Boot, dtb and optee
- */
-
-/dts-v1/;
-
-/ {
-	description = "Simple image with OP-TEE support";
-	#address-cells = <1>;
-
-	images {
-		uboot@1 {
-			description = "U-Boot";
-			data = /incbin/("../../../u-boot-nodtb.bin");
-			type = "standalone";
-			os = "U-Boot";
-			arch = "arm";
-			compression = "none";
-			load = <0x60200000>;
-		};
-		optee@1 {
-			description = "OP-TEE";
-			data = /incbin/("../../../tee.bin");
-			type = "firmware";
-			arch = "arm";
-			os = "op-tee";
-			compression = "none";
-			load = <0x68400000>;
-			entry = <0x68400000>;
-		};
-		fdt@1 {
-			description = "dtb";
-			data = /incbin/("../../../u-boot.dtb");
-			type = "flat_dt";
-			compression = "none";
-		};
-	};
-
-	configurations {
-		default = "conf@1";
-		conf@1 {
-			description = "Rockchip armv7 with OP-TEE";
-			firmware = "optee@1";
-			loadables = "uboot@1";
-			fdt = "fdt@1";
-		};
-	};
-};

commit 38f74602a53194a61c9c240ad31090f11b7e0e46
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Nov 19 11:30:14 2018 +0800

    rockchip: configs: use FIT_GENERATOR instead of FIT_SOURCE
    
    There are some armv7 SoCs like RK3288 have a different SDRAM_BASE,
    so we need a script to generate correct BASE, update all SoC configs
    to use script.
    
    Change-Id: Ibba2f6adc6b9a104b54bbe9c7feefa92e6efcfe0
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3036_defconfig b/configs/evb-rk3036_defconfig
index 8ee6329d53..2e8fcf21ad 100644
--- a/configs/evb-rk3036_defconfig
+++ b/configs/evb-rk3036_defconfig
@@ -19,7 +19,7 @@ CONFIG_TPL_SYS_MALLOC_F_LEN=0x0
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_SOURCE="arch/arm/mach-rockchip/fit_spl_optee.its"
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index 49cdf3bb40..a6c05c99da 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -22,7 +22,7 @@ CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_SOURCE="arch/arm/mach-rockchip/fit_spl_optee.its"
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
diff --git a/configs/kylin-rk3036_defconfig b/configs/kylin-rk3036_defconfig
index 565ec37f67..a11cd6ea82 100644
--- a/configs/kylin-rk3036_defconfig
+++ b/configs/kylin-rk3036_defconfig
@@ -20,7 +20,7 @@ CONFIG_TPL_SYS_MALLOC_F_LEN=0x0
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_SOURCE="arch/arm/mach-rockchip/fit_spl_optee.its"
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
 # CONFIG_DISPLAY_CPUINFO is not set
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
diff --git a/configs/rk3036_defconfig b/configs/rk3036_defconfig
index b19cbefe39..b963f9deb8 100644
--- a/configs/rk3036_defconfig
+++ b/configs/rk3036_defconfig
@@ -20,7 +20,7 @@ CONFIG_TPL_SYS_MALLOC_F_LEN=0x0
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_SOURCE="arch/arm/mach-rockchip/fit_spl_optee.its"
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
diff --git a/configs/rk3128x_defconfig b/configs/rk3128x_defconfig
index 965309bf4f..bde55f9083 100644
--- a/configs/rk3128x_defconfig
+++ b/configs/rk3128x_defconfig
@@ -20,7 +20,7 @@ CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_SOURCE="arch/arm/mach-rockchip/fit_spl_optee.its"
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
diff --git a/configs/rk322x_defconfig b/configs/rk322x_defconfig
index 728458d59a..80019e4a3a 100644
--- a/configs/rk322x_defconfig
+++ b/configs/rk322x_defconfig
@@ -19,7 +19,7 @@ CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_SOURCE="arch/arm/mach-rockchip/fit_spl_optee.its"
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y

commit 6d64bf28b28a4c7d3feb93a6d4d85218b6f642db
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Nov 19 11:18:05 2018 +0800

    rockchip: add script to generate optee fit its
    
    The U-Boot and OP-TEE load&entry address may not the same for
    different SoCs, so we need a script to adapt it.
    
    Change-Id: Id5418aa8ac8b35045be9310f317a73e7c24d7518
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/make_fit_optee.sh b/arch/arm/mach-rockchip/make_fit_optee.sh
new file mode 100755
index 0000000000..ee36779d07
--- /dev/null
+++ b/arch/arm/mach-rockchip/make_fit_optee.sh
@@ -0,0 +1,70 @@
+#!/bin/bash
+
+cat << EOF
+/*
+ * Copyright (C) 2017 Rockchip Electronic Co.,Ltd
+ *
+ * Simple U-boot fit source file containing U-Boot, dtb and optee
+ */
+
+/dts-v1/;
+
+/ {
+	description = "Simple image with OP-TEE support";
+	#address-cells = <1>;
+
+	images {
+		uboot@1 {
+			description = "U-Boot";
+			data = /incbin/("./u-boot-nodtb.bin");
+			type = "standalone";
+			os = "U-Boot";
+			arch = "arm";
+			compression = "none";
+EOF
+
+OUTDIR="/home/kever/src/u-boot"
+DARM_BASE=`sed -n "/CONFIG_SYS_SDRAM_BASE=/s/CONFIG_SYS_SDRAM_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
+UBOOT_OFFSET=0x00200000
+UBOOT_BASE=$((DARM_BASE+UBOOT_OFFSET))
+UBOOT_BASE=$(echo "obase=16;${UBOOT_BASE}"|bc)
+echo "			load = <0x"$UBOOT_BASE">;"
+
+cat << EOF
+		};
+		optee@1 {
+			description = "OP-TEE";
+			data = /incbin/("./tee.bin");
+			type = "firmware";
+			arch = "arm";
+			os = "op-tee";
+			compression = "none";
+EOF
+
+TEE_OFFSET=0x8400000
+TEE_LOAD_ADDR=$((DARM_BASE+TEE_OFFSET))
+TEE_LOAD_ADDR=$(echo "obase=16;${TEE_LOAD_ADDR}"|bc)
+echo "			load = <0x"$TEE_LOAD_ADDR">;"
+echo "			entry = <0x"$TEE_LOAD_ADDR">;"
+
+cat << EOF
+		};
+		fdt@1 {
+			description = "dtb";
+			data = /incbin/("./u-boot.dtb");
+			type = "flat_dt";
+			compression = "none";
+		};
+	};
+
+	configurations {
+		default = "conf@1";
+		conf@1 {
+			description = "Rockchip armv7 with OP-TEE";
+			firmware = "optee@1";
+			loadables = "uboot@1";
+			fdt = "fdt@1";
+		};
+	};
+};
+EOF

commit fb7f9b09f0a023572632c3d482190bc4263ed43a
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Nov 16 18:27:43 2018 +0800

    rockchip: firefly-rk3288: remove SPL_STACK_R
    
    The rk3288 TPL is always running in DDR, we do not need a relocate
    STACK address.
    
    Change-Id: Ibc4c543ee96f81b407db6374f6293a07928cffda
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig
index e0f243021b..e7f778013b 100644
--- a/configs/firefly-rk3288_defconfig
+++ b/configs/firefly-rk3288_defconfig
@@ -2,22 +2,16 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3288=y
-CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_TARGET_FIREFLY_RK3288=y
-CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-firefly"
 CONFIG_DEBUG_UART=y
-# CONFIG_SILENT_CONSOLE is not set
 # CONFIG_DISPLAY_CPUINFO is not set
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
+CONFIG_ANDROID_BOOTLOADER=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
-CONFIG_ANDROID_BOOT_IMAGE=y
-CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
@@ -46,9 +40,9 @@ CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEYBOARD=y
 CONFIG_DM_KEY=y
 CONFIG_ADC_KEY=y
-CONFIG_DM_KEYBOARD=y
 CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_MMC_DW=y

commit 3ddbcffe0cd44a0c37c9c96b89758c757322dd63
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Nov 16 18:26:05 2018 +0800

    rockchip: rk3288: enable FIT and OPTEE for SPL
    
    rk3288 is going to enable trust(OPTEE), which pack in FIT image.
    
    Change-Id: Ic8872b4b6cb68d321c6996fde1b3e4083ef3b6da
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 850685e400..357ffe9379 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -169,6 +169,9 @@ config ROCKCHIP_RK3288
 	imply TPL_SERIAL_SUPPORT
 	select GICV2
 	select ARM_SMCCC
+	select SPL_OPTEE
+	select FIT
+	select SPL_LOAD_FIT
 	select TPL_LIBCOMMON_SUPPORT
 	select TPL_LIBGENERIC_SUPPORT
 	select TPL_SYS_MALLOC_SIMPLE
@@ -189,6 +192,8 @@ config ROCKCHIP_RK3288
 	  USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
 
 if ROCKCHIP_RK3288
+config SPL_FIT_GENERATOR
+	default "arch/arm/mach-rockchip/make_fit_optee.sh"
 
 config TPL_LDSCRIPT
 	default "arch/arm/mach-rockchip/u-boot-tpl.lds"

commit 0adb499810c5e7c53c2e89c91b77b09cb388d035
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Nov 16 18:16:38 2018 +0800

    rockchip: rk3288: support TPL
    
    rk3288 is going to use TPL+SPL as preloader.
    
    Change-Id: I2c712564b7c3b4d7c826bda09135f7188b0abc22
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 8248a7c96d..850685e400 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -161,9 +161,26 @@ config ROCKCHIP_RK3288
 	select CPU_V7
 	select SPL_BOARD_INIT if SPL
 	select SUPPORT_SPL
+	select SUPPORT_TPL
 	select SPL
+	select TPL
+	select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
+	select TPL_NEEDS_SEPARATE_STACK if TPL
+	imply TPL_SERIAL_SUPPORT
 	select GICV2
 	select ARM_SMCCC
+	select TPL_LIBCOMMON_SUPPORT
+	select TPL_LIBGENERIC_SUPPORT
+	select TPL_SYS_MALLOC_SIMPLE
+	select TPL_BOOTROM_SUPPORT
+	select TPL_DRIVERS_MISC_SUPPORT
+	select TPL_OF_CONTROL
+	select TPL_DM
+	select TPL_REGMAP
+	select TPL_SYSCON
+	select TPL_RAM
+	select TPL_CLK
+	select TPL_TINY_MEMSET
 	help
 	  The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
 	  including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
@@ -171,6 +188,22 @@ config ROCKCHIP_RK3288
 	  and video codec support. Peripherals include Gigabit Ethernet,
 	  USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
 
+if ROCKCHIP_RK3288
+
+config TPL_LDSCRIPT
+	default "arch/arm/mach-rockchip/u-boot-tpl.lds"
+
+config TPL_TEXT_BASE
+	default 0xff704000
+
+config TPL_MAX_SIZE
+	default 28672
+
+config TPL_STACK
+	default 0xff718000
+
+endif
+
 config ROCKCHIP_RK3308
 	bool "Support Rockchip RK3308"
 	select ARM64 if !ARM64_BOOT_AARCH32
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index 8faf67d8ee..a5f4a86faf 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -20,15 +20,12 @@
 #define CONFIG_SYS_CBSIZE		1024
 
 #define CONFIG_SPL_FRAMEWORK
-#ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM
-/* Bootrom will load u-boot binary to 0x0 once return from SPL */
-#define CONFIG_SYS_TEXT_BASE		0x00000000
-#else
 #define CONFIG_SYS_TEXT_BASE		0x00200000
-#endif
 #define CONFIG_SYS_INIT_SP_ADDR		0x00400000
 #define CONFIG_SYS_LOAD_ADDR		0x00800800
-#define CONFIG_SPL_STACK		0xff718000
+#define CONFIG_SPL_STACK		0x00180000
+#define CONFIG_SPL_TEXT_BASE		0x00000000
+#define CONFIG_SPL_MAX_SIZE		0x100000
 
 #define CONFIG_SYS_BOOTM_LEN		(64 << 20)	/*  64M */
 #define GICD_BASE			0xffc01000
@@ -36,12 +33,6 @@
 
 #define CONFIG_ROCKUSB_G_DNL_PID	0x320A
 
-#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_TPL_BOOTROM_SUPPORT)
-# define CONFIG_SPL_TEXT_BASE		0x0
-#else
-# define CONFIG_SPL_TEXT_BASE		0xff704000
-#endif
-
 /* MMC/SD IP block */
 #define CONFIG_BOUNCE_BUFFER
 

commit 10e7f377e47fc061f933962fc31e12927f228a0a
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Nov 19 13:02:01 2018 +0800

    misc: i2c_eeprom: use separate config for spl and tpl
    
    We may not need I2C_EEPROM in SPL and TPL.
    
    Change-Id: I8e8ded63601b791d12d6531dd958121b87e9231d
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 10265c8fb4..1e6a58d2f8 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -20,7 +20,7 @@ obj-$(CONFIG_CROS_EC_SPI) += cros_ec_spi.o
 endif
 obj-$(CONFIG_FSL_IIM) += fsl_iim.o
 obj-$(CONFIG_LED_STATUS_GPIO) += gpio_led.o
-obj-$(CONFIG_I2C_EEPROM) += i2c_eeprom.o
+obj-$(CONFIG_$(SPL_TPL_)I2C_EEPROM) += i2c_eeprom.o
 obj-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o
 obj-$(CONFIG_MXC_OCOTP) += mxc_ocotp.o
 obj-$(CONFIG_MXS_OCOTP) += mxs_ocotp.o

commit cd08d188cfbd14390163ef2a949c81fa6a6bead6
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Nov 16 18:14:48 2018 +0800

    rockchip: dts: rk3288: add spl-boot-order
    
    SPL can boot from EMMC or SD card.
    
    Change-Id: Id6cf82880760a734eb9324bb4715dfd2e1c9d9ca
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3288-u-boot.dtsi b/arch/arm/dts/rk3288-u-boot.dtsi
index f073361c4d..979d119764 100644
--- a/arch/arm/dts/rk3288-u-boot.dtsi
+++ b/arch/arm/dts/rk3288-u-boot.dtsi
@@ -11,6 +11,7 @@
 
 	chosen {
 		stdout-path = &uart2;
+		u-boot,spl-boot-order = &emmc, &sdmmc;
 	};
 };
 

commit a196d7fc6a45d7b8e356a95e18fdc3d850735915
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Nov 15 15:57:09 2018 +0800

    rockchip: display: handle error when there is no 'mcu-timing'
    
    The 'mcu-timing' may not in dts, and the following access will
    cause assert of invalid of_node.
    
    Change-Id: I98cfed0de471b8985642e7ffc14ab2e97ef6f575
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 69aa6b94c6..29f984985e 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -1040,6 +1040,8 @@ static int get_crtc_mcu_mode(struct crtc_state *crtc_state)
 	int total_pixel, cs_pst, cs_pend, rw_pst, rw_pend;
 
 	mcu_node = dev_read_subnode(crtc_state->dev, "mcu-timing");
+	if (!ofnode_valid(mcu_node))
+		return -ENODEV;
 
 #define FDT_GET_MCU_INT(val, name) \
 	do { \

commit dcb787042760be2baf3bf7179fe23aef5716ae27
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Nov 15 14:33:36 2018 +0800

    clk: rockchip: rk322x: fix up the vop clk setting assert error
    
    Change-Id: Ied72bcb5e92e300eeccd7bfd32285d2eeb4d4860
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c
index a59d945c9c..5371e95cd9 100644
--- a/drivers/clk/rockchip/clk_rk322x.c
+++ b/drivers/clk/rockchip/clk_rk322x.c
@@ -464,11 +464,10 @@ static ulong rk322x_vop_set_clk(struct rk322x_clk_priv *priv,
 	int src_clk_div;
 	u32 con, parent;
 
-	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
-	assert(src_clk_div - 1 < 32);
-
 	switch (clk_id) {
 	case ACLK_VOP:
+		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+		assert(src_clk_div - 1 < 32);
 		rk_clrsetreg(&cru->cru_clksel_con[33],
 			     ACLK_VOP_PLL_SEL_MASK | ACLK_VOP_DIV_CON_MASK,
 			     ACLK_VOP_PLL_SEL_GPLL << ACLK_VOP_PLL_SEL_SHIFT |
@@ -486,6 +485,7 @@ static ulong rk322x_vop_set_clk(struct rk322x_clk_priv *priv,
 			else
 				src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
 
+			assert(src_clk_div - 1 < 256);
 			rk_clrsetreg(&cru->cru_clksel_con[27],
 				     DCLK_LCDC_DIV_CON_MASK,
 				     (src_clk_div - 1) <<

commit 8b2c667148fef7f1df535649ff18bda4f9713a20
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Nov 15 16:53:05 2018 +0800

    rockchip: rk3036: add boot order to enable both emmc and sdmmc
    
    The SPL can scan sdmmc and emmc one by one.
    
    Change-Id: Iaac25a606528c59420613e648573993009b7f2c1
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3036-sdk.dts b/arch/arm/dts/rk3036-sdk.dts
index 6754625f00..e881387035 100644
--- a/arch/arm/dts/rk3036-sdk.dts
+++ b/arch/arm/dts/rk3036-sdk.dts
@@ -13,6 +13,7 @@
 	compatible = "sdk,sdk-rk3036", "rockchip,rk3036";
 
 	chosen {
+		u-boot,spl-boot-order = &sdmmc, &emmc;
 		stdout-path = &uart2;
 	};
 

commit eb01a1246aa15f90f101cc32189b90131fdbd189
Author: Cody Xie <cody.xie@rock-chips.com>
Date:   Thu Nov 15 10:58:58 2018 +0800

    rockchip: Add distro boot script for rknand devices
    
    Change-Id: I4776c9d4124bb858f6aae89ce32de36fb2db9074
    Signed-off-by: Cody Xie <cody.xie@rock-chips.com>

diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h
index a728fa3709..5417838907 100644
--- a/include/configs/rk3308_common.h
+++ b/include/configs/rk3308_common.h
@@ -68,6 +68,7 @@
 	"partitions=" PARTS_DEFAULT \
 	ROCKCHIP_DEVICE_SETTINGS \
 	RKIMG_DET_BOOTDEV \
+	BOOTENV_SHARED_RKNAND \
 	BOOTENV
 
 #endif
diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index c8dfcb4248..a92a46d783 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -25,6 +25,18 @@
 #ifndef CONFIG_SPL_BUILD
 #include <config_distro_defaults.h>
 
+#ifdef CONFIG_CMD_RKNAND
+#define BOOTENV_SHARED_RKNAND	BOOTENV_SHARED_BLKDEV(rknand)
+#define BOOTENV_DEV_RKNAND		BOOTENV_DEV_BLKDEV
+#define BOOTENV_DEV_NAME_RKNAND	BOOTENV_DEV_NAME_BLKDEV
+#else
+#define BOOTENV_SHARED_RKNAND
+#define BOOTENV_DEV_RKNAND \
+	BOOT_TARGET_DEVICES_references_RKNAND_without_CONFIG_CMD_RKNAND
+#define BOOTENV_DEV_NAME_RKNAND \
+	BOOT_TARGET_DEVICES_references_RKNAND_without_CONFIG_CMD_RKNAND
+#endif
+
 /* First try to boot from SD (index 1), then eMMC (index 0) */
 #if CONFIG_IS_ENABLED(CMD_MMC)
 	#define BOOT_TARGET_MMC(func) \
@@ -34,6 +46,12 @@
 	#define BOOT_TARGET_MMC(func)
 #endif
 
+#if CONFIG_IS_ENABLED(CMD_RKNAND)
+	#define BOOT_TARGET_RKNAND(func) func(RKNAND, rknand, 0)
+#else
+	#define BOOT_TARGET_RKNAND(func)
+#endif
+
 #if CONFIG_IS_ENABLED(CMD_USB)
 	#define BOOT_TARGET_USB(func) func(USB, usb, 0)
 #else
@@ -54,6 +72,7 @@
 
 #define BOOT_TARGET_DEVICES(func) \
 	BOOT_TARGET_MMC(func) \
+	BOOT_TARGET_RKNAND(func) \
 	BOOT_TARGET_USB(func) \
 	BOOT_TARGET_PXE(func) \
 	BOOT_TARGET_DHCP(func)

commit 2dc2d048e2677cfcfa1ae637d5c986ff6da2a5e0
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 15 15:55:56 2018 +0800

    rockchip: lmb: limit highest memory from 768MB to 512MB for 32-bit platform
    
    Ramdisk is a compressed image and it expands after descompress, which accesses
    768MB+ memory and brings "Unable to handle kernel paging request at virtual address ...".
    
    We make a appointment that the highest memory is 512MB, it makes lmb alloc safer.
    
    fixes: 2c6a058b7ea25398013cb25b4e3bb96fe40da1a5
    (rockchip: implement board_lmb_reserve())
    
    Change-Id: I728a1fbff216194b940372713387cf171028b20b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index caf046719e..cbc270c4f2 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -261,6 +261,7 @@ void enable_caches(void)
 	dcache_enable();
 }
 
+#ifdef CONFIG_LMB
 /*
  * Using last bi_dram[...] to initialize "bootm_low" and "bootm_mapsize".
  * This makes lmb_alloc_base() always alloc from tail of sdram.
@@ -283,24 +284,31 @@ void board_lmb_reserve(struct lmb *lmb)
 	size = gd->bd->bi_dram[i - 1].size;
 
 	/*
-	 * 32-bit kernel: ramdisk/fdt shouldn't be loaded to highmem area, otherwise
-	 * "Unable to handle kernel paging request at virtual address ...".
-	 * If so, using low address region, i.e before tustos region(132MB).
+	 * 32-bit kernel: ramdisk/fdt shouldn't be loaded to highmem area(768MB+),
+	 * otherwise "Unable to handle kernel paging request at virtual address ...".
+	 *
+	 * So that we hope limit highest address at 768M, but there comes the the
+	 * problem: ramdisk is a compressed image and it expands after descompress,
+	 * so it accesses 768MB+ and brings the above "Unable to handle kernel ...".
+	 *
+	 * We make a appointment that the highest memory address is 512MB, it
+	 * makes lmb alloc safer.
 	 */
-#ifndef ARM64
-	if (start >= ((u64)CONFIG_SYS_SDRAM_BASE + SZ_768M)) {
+#ifndef CONFIG_ARM64
+	if (start >= ((u64)CONFIG_SYS_SDRAM_BASE + SZ_512M)) {
 		start = gd->bd->bi_dram[i - 2].start;
 		size = gd->bd->bi_dram[i - 2].size;
 	}
 
-	if ((start + size) > ((u64)CONFIG_SYS_SDRAM_BASE + SZ_768M))
-		size = (u64)CONFIG_SYS_SDRAM_BASE + SZ_768M - start;
+	if ((start + size) > ((u64)CONFIG_SYS_SDRAM_BASE + SZ_512M))
+		size = (u64)CONFIG_SYS_SDRAM_BASE + SZ_512M - start;
 #endif
 	sprintf(bootm_low, "0x%llx", start);
 	sprintf(bootm_mapsize, "0x%llx", size);
 	env_set("bootm_low", bootm_low);
 	env_set("bootm_mapsize", bootm_mapsize);
 }
+#endif
 
 #ifdef CONFIG_ROCKCHIP_PRELOADER_SERIAL
 int board_init_f_init_serial(void)

commit 8f88277439fbb0a967de722c132effe099a4fc9b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 14 11:51:10 2018 +0800

    rockchip: support get boot devtype and devnum from atags
    
    - preloader would pass bootdev info;
    - avoid going through all the possible bootdev;
    - rename devtype_num_envset() to boot_devtype_init();
    
    Change-Id: Ia047c744dc7aca97db97664fc92473e46ba102a9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/boot_mode.h b/arch/arm/include/asm/arch-rockchip/boot_mode.h
index e38627e4c1..16ec54bb7c 100644
--- a/arch/arm/include/asm/arch-rockchip/boot_mode.h
+++ b/arch/arm/include/asm/arch-rockchip/boot_mode.h
@@ -20,7 +20,7 @@
 
 #ifndef __ASSEMBLY__
 int setup_boot_mode(void);
-void devtype_num_envset(void);
+void boot_devtype_init(void);
 #endif
 
 #endif
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 29500e36ad..caf046719e 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -29,10 +29,6 @@
 #ifdef CONFIG_ROCKCHIP_DEBUGGER
 #include <rockchip_debugger.h>
 #endif
-#ifdef CONFIG_DM_RAMDISK
-#include <ramdisk.h>
-#endif
-#include <mmc.h>
 #include <of_live.h>
 #include <dm/root.h>
 
@@ -179,16 +175,6 @@ int init_kernel_dtb(void)
 	int ret = 0;
 	ulong fdt_addr = 0;
 
-#ifdef CONFIG_DM_MMC
-	ret = mmc_initialize(gd->bd);
-	if (ret)
-		debug("%s: mmc initialized failed, ret=%d\n", __func__ ,ret);
-#else
-	ret = bramdisk_initialize();
-	if (ret)
-		debug("%s: bramdisk initialized failed, ret=%d\n", __func__, ret);
-#endif
-
 	fdt_addr = env_get_ulong("fdt_addr_r", 16, 0);
 	if (!fdt_addr) {
 		printf("No Found FDT Load Address.\n");
diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index 59b8beb26e..f3e7c40bf5 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -8,12 +8,17 @@
 #include <adc.h>
 #include <asm/io.h>
 #include <asm/arch/boot_mode.h>
+#include <asm/arch/rk_atags.h>
 #include <cli.h>
 #include <dm.h>
 #include <fdtdec.h>
 #include <boot_rkimg.h>
 #include <linux/usb/phy-rockchip-inno-usb2.h>
 #include <key.h>
+#ifdef CONFIG_DM_RAMDISK
+#include <ramdisk.h>
+#endif
+#include <mmc.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -82,24 +87,81 @@ __weak int rockchip_dnl_key_pressed(void)
 	return keyval;
 }
 
-void devtype_num_envset(void)
+void boot_devtype_init(void)
 {
+	const char *devtype_num_set = "run rkimg_bootdev";
+	char *devtype = NULL, *devnum = NULL;
 	static int done = 0;
-	int ret = 0;
+	int ret;
 
 	if (done)
 		return;
 
-	const char *devtype_num_set = "run rkimg_bootdev";
+#ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
+	struct tag *t;
+
+	t = atags_get_tag(ATAG_BOOTDEV);
+	if (t) {
+		switch (t->u.bootdev.devtype) {
+		case BOOT_TYPE_EMMC:
+			devtype = "mmc";
+			devnum = "0";
+			break;
+		case BOOT_TYPE_SD0:
+		case BOOT_TYPE_SD1:
+			devtype = "mmc";
+			devnum = "1";
+			break;
+		case BOOT_TYPE_NAND:
+			devtype = "rknand";
+			devnum = "0";
+			break;
+		case BOOT_TYPE_SPI_NAND:
+			devtype = "spinand";
+			devnum = "0";
+			break;
+		case BOOT_TYPE_SPI_NOR:
+			devtype = "spinor";
+			devnum = "1";
+			break;
+		case BOOT_TYPE_RAM:
+			devtype = "ramdisk";
+			devnum = "0";
+			break;
+		default:
+			printf("Unknown bootdev type: 0x%x\n",
+			       t->u.bootdev.devtype);
+			break;
+		}
+	}
+
+	debug("%s: Get bootdev from atags: %s %s\n", __func__, devtype, devnum);
 
+	if (devtype && devnum) {
+		env_set("devtype", devtype);
+		env_set("devnum", devnum);
+#ifdef CONFIG_DM_MMC
+		if (!strcmp("mmc", devtype))
+			mmc_initialize(gd->bd);
+#endif
+		goto finish;
+	}
+#endif
+
+#ifdef CONFIG_DM_MMC
+	mmc_initialize(gd->bd);
+#endif
 	ret = run_command_list(devtype_num_set, -1, 0);
 	if (ret) {
 		/* Set default dev type/num if command not valid */
-		env_set("devtype", "mmc");
-		env_set("devnum", "0");
+		devtype = "mmc";
+		devnum = "0";
+		env_set("devtype", devtype);
+		env_set("devnum", devnum);
 	}
-
+finish:
 	done = 1;
+	printf("Bootdev: %s %s\n", env_get("devtype"), env_get("devnum"));
 }
 
 void rockchip_dnl_mode_check(void)
@@ -139,7 +201,7 @@ int setup_boot_mode(void)
 	int boot_mode = BOOT_MODE_NORMAL;
 	char env_preboot[256] = {0};
 
-	devtype_num_envset();
+	boot_devtype_init();
 	rockchip_dnl_mode_check();
 #ifdef CONFIG_RKIMG_BOOTLOADER
 	boot_mode = rockchip_get_boot_mode();
diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 59d40e5926..a5316e1510 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -221,7 +221,7 @@ struct blk_desc *rockchip_get_bootdev(void)
 	if (dev_desc)
 		return dev_desc;
 
-	devtype_num_envset();
+	boot_devtype_init();
 	dev_type = get_bootdev_type();
 	devnum = env_get_ulong("devnum", 10, 0);
 

commit c7775636267d04079b3ead087c5f318c31cfbf1a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 14 18:03:28 2018 +0800

    boot rkimg: record blk_desc for late use
    
    Change-Id: Iddd87d441d8ea71929cf7d9494c319345f972fe3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 42432bb918..59d40e5926 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -214,10 +214,13 @@ int get_bootdev_type(void)
 
 struct blk_desc *rockchip_get_bootdev(void)
 {
-	struct blk_desc *dev_desc;
+	static struct blk_desc *dev_desc = NULL;
 	int dev_type;
 	int devnum;
 
+	if (dev_desc)
+		return dev_desc;
+
 	devtype_num_envset();
 	dev_type = get_bootdev_type();
 	devnum = env_get_ulong("devnum", 10, 0);

commit b9756a5b0845f761ae0b61df30ac936c1b0ab540
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Nov 15 17:45:56 2018 +0800

    rockchip: boot0: init gd as null in TINY_TPL
    
    Init gd to NULL in case someone using it.
    For example, below patch using gd in debug_uart_init:
    064eb49314 serial: ns16550: support using pre-loader serial
    
    Change-Id: Iee71dc8bc9168a0364598a3b4027807cba522594
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/boot0.h b/arch/arm/include/asm/arch-rockchip/boot0.h
index 796ccdee23..f25c29468f 100644
--- a/arch/arm/include/asm/arch-rockchip/boot0.h
+++ b/arch/arm/include/asm/arch-rockchip/boot0.h
@@ -55,6 +55,12 @@ _start:
 .type   save_boot_params_ret, % function
 .globl	save_boot_params_ret
 save_boot_params_ret:
+	/* Init gd as null */
+#ifdef CONFIG_ARM64
+	mov	x18, #0
+#else
+	mov	r9, #0
+#endif
 	b board_init_f
 #else
 	b reset

commit a2795c339d2c9641b341d660bbefa03b6f803cf8
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Wed Nov 7 16:27:01 2018 +0800

    clk: rockchip: rk312x: add sfc clk init
    
    Change-Id: I5edf0a4b650a57a48f837fa3e007cfaf6a733f92
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3128.h b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
index 43c63323a2..a2f99d5657 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
@@ -123,6 +123,12 @@ enum {
 	ACLK_PERI_DIV_MASK	= 0x1f << ACLK_PERI_DIV_SHIFT,
 
 	/* CRU_CLKSEL11_CON */
+	SFC_PLL_SEL_SHIFT	= 14,
+	SFC_PLL_SEL_MASK	= 3 << SFC_PLL_SEL_SHIFT,
+	SFC_PLL_SEL_CPLL	= 0,
+	SFC_PLL_SEL_GPLL,
+	SFC_CLK_DIV_SHIFT	= 8,
+	SFC_CLK_DIV_MASK	= 0x1f << SFC_CLK_DIV_SHIFT,
 	MMC0_PLL_SHIFT		= 6,
 	MMC0_PLL_MASK		= 3 << MMC0_PLL_SHIFT,
 	MMC0_SEL_APLL		= 0,
diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c
index 4f2b6c19f3..1b2943f59a 100644
--- a/drivers/clk/rockchip/clk_rk3128.c
+++ b/drivers/clk/rockchip/clk_rk3128.c
@@ -751,6 +751,11 @@ static void rkclk_init(struct rk3128_clk_priv *priv)
 		     NANDC_PLL_SEL_MASK | NANDC_CLK_DIV_MASK,
 		     NANDC_PLL_SEL_GPLL << NANDC_PLL_SEL_SHIFT |
 		     3 << NANDC_CLK_DIV_SHIFT);
+	rk_clrsetreg(&priv->cru->cru_clksel_con[11],
+		     SFC_PLL_SEL_MASK | SFC_CLK_DIV_MASK,
+		     SFC_PLL_SEL_GPLL << SFC_PLL_SEL_SHIFT |
+		     9 << SFC_CLK_DIV_SHIFT);
+
 	rk3128_bus_set_clk(priv, ACLK_CPU, ACLK_BUS_HZ);
 	rk3128_bus_set_clk(priv, HCLK_CPU, ACLK_BUS_HZ / 2);
 	rk3128_bus_set_clk(priv, PCLK_CPU, ACLK_BUS_HZ / 2);

commit a95a20c7835e9b102cd6c9de9e68a407aaf888c8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 14 10:35:38 2018 +0800

    rockchip: dts: rk3288-evb: move dm-pre-reloc nodes to *-u-boot.dtsi
    
    it makes users easy to override their kernel dts when
    CONFIG_USING_KERNEL_DTB is disabled.
    
    Change-Id: If794a5d3e8be334e81519d5bd69f97062db4b208
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3288-evb.dts b/arch/arm/dts/rk3288-evb.dts
index 3f03e1326c..9c6ac001c9 100644
--- a/arch/arm/dts/rk3288-evb.dts
+++ b/arch/arm/dts/rk3288-evb.dts
@@ -6,14 +6,11 @@
 
 /dts-v1/;
 #include "rk3288-evb.dtsi"
+#include "rk3288-u-boot.dtsi"
 
 / {
 	model = "Evb-RK3288";
 	compatible = "evb-rk3288,evb-rk3288", "rockchip,rk3288";
-
-	chosen {
-		stdout-path = &uart2;
-	};
 };
 
 &dmc {
@@ -27,31 +24,10 @@
 	rockchip,sdram-params = <0x20d266a4 0x5b6 2 533000000 6 9 0>;
 };
 
-&pinctrl {
-	u-boot,dm-pre-reloc;
-};
-
 &pwm1 {
 	status = "okay";
 };
 
 &uart2 {
-	u-boot,dm-pre-reloc;
 	reg-shift = <2>;
 };
-
-&sdmmc {
-	u-boot,dm-pre-reloc;
-};
-
-&emmc {
-	u-boot,dm-pre-reloc;
-};
-
-&gpio3 {
-	u-boot,dm-pre-reloc;
-};
-
-&gpio8 {
-	u-boot,dm-pre-reloc;
-};
diff --git a/arch/arm/dts/rk3288-u-boot.dtsi b/arch/arm/dts/rk3288-u-boot.dtsi
index a80334192b..f073361c4d 100644
--- a/arch/arm/dts/rk3288-u-boot.dtsi
+++ b/arch/arm/dts/rk3288-u-boot.dtsi
@@ -8,6 +8,10 @@
 		mmc0 = &emmc;
 		mmc1 = &sdmmc;
 	};
+
+	chosen {
+		stdout-path = &uart2;
+	};
 };
 
 &uart2 {
@@ -40,6 +44,22 @@
 	u-boot,dm-pre-reloc;
 };
 
+&emmc {
+	u-boot,dm-pre-reloc;
+};
+
 &sdmmc {
 	u-boot,dm-pre-reloc;
-};
\ No newline at end of file
+};
+
+&pinctrl {
+	u-boot,dm-pre-reloc;
+};
+
+&gpio3 {
+	u-boot,dm-pre-reloc;
+};
+
+&gpio8 {
+	u-boot,dm-pre-reloc;
+};

commit d153e81420b8ba6070586f5c041cc6562fa2af6a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 14 10:29:09 2018 +0800

    rockchip: dts: rk3128: move dm-pre-reloc nodes to *-u-boot.dtsi
    
    it makes users easy to override their kernel dts when
    CONFIG_USING_KERNEL_DTB is disabled.
    
    Change-Id: Id038494e1cbd1c63afa3397e64cb60f981aa0509
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/px3se-evb.dts b/arch/arm/dts/px3se-evb.dts
index 4371b34cd8..07cbe41575 100644
--- a/arch/arm/dts/px3se-evb.dts
+++ b/arch/arm/dts/px3se-evb.dts
@@ -14,6 +14,10 @@
 	model = "Rockchip PX3SE Evaluation board";
 	compatible = "rockchip,px3se-evb", "rockchip,px3se";
 
+	chosen {
+		stdout-path = &uart1;
+	};
+
 	adc-keys {
 		compatible = "adc-keys";
 		io-channels = <&saradc 1>;
@@ -34,10 +38,6 @@
 		};
 	};
 
-	chosen {
-		stdout-path = &uart1;
-	};
-
 	vcc50_otg: vcc50-otg {
 		compatible = "regulator-fixed";
 		regulator-name = "vcc50_otg";
@@ -71,8 +71,6 @@
 };
 
 &uart1 {
-	clock-frequency = <24000000>;
-	u-boot,dm-pre-reloc;
 	status = "okay";
 };
 
diff --git a/arch/arm/dts/rk3126-evb.dts b/arch/arm/dts/rk3126-evb.dts
index 26fe2500d6..263d524163 100644
--- a/arch/arm/dts/rk3126-evb.dts
+++ b/arch/arm/dts/rk3126-evb.dts
@@ -14,10 +14,6 @@
 	model = "Rockchip RK3126 Evaluation board";
 	compatible = "rockchip,rk3126-evb", "rockchip,rk3126";
 
-	chosen {
-		stdout-path = &uart2;
-	};
-
 	vcc5v0_otg: vcc5v0-otg-drv {
 		compatible = "regulator-fixed";
 		regulator-name = "vcc5v0_otg";
@@ -62,8 +58,6 @@
 };
 
 &uart2 {
-	clock-frequency = <24000000>;
-	u-boot,dm-pre-reloc;
 	status = "okay";
 };
 
diff --git a/arch/arm/dts/rk3128-evb.dts b/arch/arm/dts/rk3128-evb.dts
index b6cee9b105..e896b29f33 100644
--- a/arch/arm/dts/rk3128-evb.dts
+++ b/arch/arm/dts/rk3128-evb.dts
@@ -13,10 +13,6 @@
 	model = "Rockchip RK3128 Evaluation board";
 	compatible = "rockchip,rk3128-evb", "rockchip,rk3128";
 
-	chosen {
-		stdout-path = &uart2;
-	};
-
 	vcc5v0_otg: vcc5v0-otg-drv {
 		compatible = "regulator-fixed";
 		regulator-name = "vcc5v0_otg";
@@ -64,8 +60,6 @@
 };
 
 &uart2 {
-	clock-frequency = <24000000>;
-	u-boot,dm-pre-reloc;
 	status = "okay";
 };
 
diff --git a/arch/arm/dts/rk3128-u-boot.dtsi b/arch/arm/dts/rk3128-u-boot.dtsi
index 3561fe1530..d702a58c46 100644
--- a/arch/arm/dts/rk3128-u-boot.dtsi
+++ b/arch/arm/dts/rk3128-u-boot.dtsi
@@ -4,6 +4,16 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 
+/ {
+	aliases {
+		mmc0 = &emmc;
+		mmc1 = &sdmmc;
+	};
+
+	chosen {
+		stdout-path = &uart2;
+	};
+};
 
 &dmc {
 	u-boot,dm-pre-reloc;
@@ -27,6 +37,11 @@
 	u-boot,dm-pre-reloc;
 };
 
+&uart1 {
+	clock-frequency = <24000000>;
+	u-boot,dm-pre-reloc;
+};
+
 &uart2 {
 	u-boot,dm-pre-reloc;
 	clock-frequency = <24000000>;

commit b000829baf8f19fb48f5bfdd5ecfee408807f433
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 14 09:20:55 2018 +0800

    rockchip: atags: give a valid range for magic check
    
    Avoid "bad magic" report in case that new atags magic has been
    added in preloader but U-Boot not.
    
    Change-Id: Id144bd7ae3245323f792bd5fe5d4e0cdef15ea22
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rk_atags.h b/arch/arm/include/asm/arch-rockchip/rk_atags.h
index 150b171912..78c0039b1e 100644
--- a/arch/arm/include/asm/arch-rockchip/rk_atags.h
+++ b/arch/arm/include/asm/arch-rockchip/rk_atags.h
@@ -17,6 +17,7 @@
 #define ATAG_TOS_MEM		0x54410053
 #define ATAG_RAM_PARTITION	0x54410054
 #define ATAG_ATF_MEM		0x54410055
+#define ATAG_MAX		0x544100ff
 
 /* Tag size and offset */
 #define ATAGS_SIZE		(0x2000)	/* 8K */
diff --git a/arch/arm/mach-rockchip/rk_atags.c b/arch/arm/mach-rockchip/rk_atags.c
index a7ceaf2333..a545139af1 100644
--- a/arch/arm/mach-rockchip/rk_atags.c
+++ b/arch/arm/mach-rockchip/rk_atags.c
@@ -76,12 +76,7 @@ static int inline bad_magic(u32 magic)
 {
 	return ((magic != ATAG_CORE) &&
 		(magic != ATAG_NONE) &&
-		(magic != ATAG_SERIAL) &&
-		(magic != ATAG_BOOTDEV) &&
-		(magic != ATAG_DDR_MEM) &&
-		(magic != ATAG_TOS_MEM) &&
-		(magic != ATAG_RAM_PARTITION) &&
-		(magic != ATAG_ATF_MEM));
+		(magic < ATAG_SERIAL || magic > ATAG_MAX));
 }
 
 static int inline atags_size_overflow(struct tag *t, u32 tag_size)

commit 6e71c4dcccb35919ca49c1705235ae20911f7f72
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Nov 14 09:57:33 2018 +0800

    video/drm: dsi: support non-continuous clock behavior
    
    Fixes: eff8995ad7e9 ("video/drm: dsi: support non-continuous clock behavior")
    Change-Id: I5207d7a6bd3d0720180afdfe508c3ee165dc83ed
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index 7a33dab5bd..a219f15f93 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -824,6 +824,10 @@ static void dw_mipi_dsi_video_mode_config(struct dw_mipi_dsi *dsi)
 		val |= VID_MODE_TYPE_BURST_SYNC_EVENTS;
 
 	dsi_write(dsi, DSI_VID_MODE_CFG, val);
+
+	if (dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS)
+		dsi_update_bits(dsi, DSI_LPCLK_CTRL,
+				AUTO_CLKLANE_CTRL, AUTO_CLKLANE_CTRL);
 }
 
 static void dw_mipi_dsi_set_mode(struct dw_mipi_dsi *dsi,
@@ -833,7 +837,8 @@ static void dw_mipi_dsi_set_mode(struct dw_mipi_dsi *dsi,
 		dsi_write(dsi, DSI_MODE_CFG, ENABLE_CMD_MODE);
 	} else {
 		dsi_write(dsi, DSI_PWR_UP, RESET);
-		dsi_write(dsi, DSI_LPCLK_CTRL, PHY_TXREQUESTCLKHS);
+		dsi_update_bits(dsi, DSI_LPCLK_CTRL,
+				PHY_TXREQUESTCLKHS, PHY_TXREQUESTCLKHS);
 		dsi_write(dsi, DSI_MODE_CFG, ENABLE_VIDEO_MODE);
 		dsi_write(dsi, DSI_PWR_UP, POWERUP);
 	}

commit 2c6a058b7ea25398013cb25b4e3bb96fe40da1a5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Nov 2 11:35:19 2018 +0800

    rockchip: implement board_lmb_reserve()
    
    Using last bi_dram[...] to initialize "bootm_low" and "bootm_mapsize".
    This makes lmb_alloc_base() always alloc from tail of sdram.
    If we don't assign it, bi_dram[0] is used by default and it may cause
    lmb_alloc_base() fail when bi_dram[0] range is small.
    
    Change-Id: I13c2c2d6135e26e647dcfde4c173d896c800fea5
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 954e17d8c3..29500e36ad 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -275,6 +275,47 @@ void enable_caches(void)
 	dcache_enable();
 }
 
+/*
+ * Using last bi_dram[...] to initialize "bootm_low" and "bootm_mapsize".
+ * This makes lmb_alloc_base() always alloc from tail of sdram.
+ * If we don't assign it, bi_dram[0] is used by default and it may cause
+ * lmb_alloc_base() fail when bi_dram[0] range is small.
+ */
+void board_lmb_reserve(struct lmb *lmb)
+{
+	u64 start, size;
+	char bootm_low[32];
+	char bootm_mapsize[32];
+	int i;
+
+	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+		if (!gd->bd->bi_dram[i].size)
+			break;
+	}
+
+	start = gd->bd->bi_dram[i - 1].start;
+	size = gd->bd->bi_dram[i - 1].size;
+
+	/*
+	 * 32-bit kernel: ramdisk/fdt shouldn't be loaded to highmem area, otherwise
+	 * "Unable to handle kernel paging request at virtual address ...".
+	 * If so, using low address region, i.e before tustos region(132MB).
+	 */
+#ifndef ARM64
+	if (start >= ((u64)CONFIG_SYS_SDRAM_BASE + SZ_768M)) {
+		start = gd->bd->bi_dram[i - 2].start;
+		size = gd->bd->bi_dram[i - 2].size;
+	}
+
+	if ((start + size) > ((u64)CONFIG_SYS_SDRAM_BASE + SZ_768M))
+		size = (u64)CONFIG_SYS_SDRAM_BASE + SZ_768M - start;
+#endif
+	sprintf(bootm_low, "0x%llx", start);
+	sprintf(bootm_mapsize, "0x%llx", size);
+	env_set("bootm_low", bootm_low);
+	env_set("bootm_mapsize", bootm_mapsize);
+}
+
 #ifdef CONFIG_ROCKCHIP_PRELOADER_SERIAL
 int board_init_f_init_serial(void)
 {
diff --git a/include/linux/sizes.h b/include/linux/sizes.h
index ce3e8150c1..9f234b581d 100644
--- a/include/linux/sizes.h
+++ b/include/linux/sizes.h
@@ -40,6 +40,7 @@
 #define SZ_128M				0x08000000
 #define SZ_256M				0x10000000
 #define SZ_512M				0x20000000
+#define SZ_768M				0x30000000
 
 #define SZ_1G				0x40000000
 #define SZ_2G				0x80000000

commit 9ebaf67ccdedf3ef53d4eb35e5f1e392777e6cd2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Nov 2 12:54:06 2018 +0800

    common: boot_rkimg: init lmb by bi_dram[...] data.
    
    Keep same with ./common/bootm.c.
    
    Don't rely on env_get_bootm_low() and env_get_bootm_size() since
    they can't provide a confirm value, but bi_dram[...] it is.
    
    Change-Id: I2c2b64e7b8dfa3c7b38a6498567a5af7248e7a1e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 6c53a25d66..42432bb918 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -51,16 +51,22 @@ struct rockchip_image {
 #ifdef CONFIG_LMB
 static void boot_start_lmb(bootm_headers_t *images)
 {
+	lmb_init(&images->lmb);
+#ifdef CONFIG_NR_DRAM_BANKS
+	int i;
+
+	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+		lmb_add(&images->lmb, gd->bd->bi_dram[i].start,
+			gd->bd->bi_dram[i].size);
+	}
+#else
 	ulong		mem_start;
 	phys_size_t	mem_size;
 
-	lmb_init(&images->lmb);
-
 	mem_start = env_get_bootm_low();
 	mem_size = env_get_bootm_size();
-
 	lmb_add(&images->lmb, (phys_addr_t)mem_start, mem_size);
-
+#endif
 	arch_lmb_reserve(&images->lmb);
 	board_lmb_reserve(&images->lmb);
 }

commit 7c233ca6374c69de21651620f00526ea799d444a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 12 18:18:24 2018 +0800

    android: read two blocks of kernel image
    
    this patch fixes zboot.img boot up failed due to getting kernel
    compress type failed(reading IH_COMP_NONE).
    
    we need to read a few kernel image info, i.e. compress type.
    Assume 2 blocks maybe enough.
    
    fixes: ee465021feb46515c76fe2291d3fdf31eb6dbb4
    (android: support boot images packed with rockchip android hdr)
    
    Change-Id: I140832a899102984aebaad160a3902cfc483bfeb
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/image-android.c b/common/image-android.c
index 5681775190..36207e2770 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -279,9 +279,9 @@ long android_image_load(struct blk_desc *dev_desc,
 
 	/*
 	 * Read the Android boot.img header and a few parts of
-	 * the head of kernel image.
+	 * the head of kernel image(2 blocks maybe enough).
 	 */
-	blkcnt = DIV_ROUND_UP(sizeof(*hdr), 512);
+	blkcnt = DIV_ROUND_UP(sizeof(*hdr), 512) + 2;
 	hdr = memalign(ARCH_DMA_MINALIGN, blkcnt * 512);
 	if (!hdr) {
 		printf("%s: no memory\n", __func__);

commit 2efa632c45634fc459fe5b66c436ce1ca0068f37
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 12 16:16:09 2018 +0800

    common: bootm: add lmb reserve for fdt
    
    this avoids fdt being overriden when ramdisk relocation if
    fdt is too close to lmb allocable high memory region.
    
    fixes: 5af94f7887ab4057e9feb37243f843b811a5c0cf
    (android: get fdt by suitable ways)
    
    Change-Id: Iadd5854269d0832b0c0455c8423b9d4172768ce3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/bootm.c b/common/bootm.c
index 97bfd23226..2863bcaa67 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -252,6 +252,7 @@ int bootm_find_images(int flag, int argc, char * const argv[])
 		return 1;
 	}
 	set_working_fdt_addr((ulong)images.ft_addr);
+	lmb_reserve(&images.lmb, (ulong)images.ft_addr, (ulong)images.ft_len);
 #endif
 
 #if IMAGE_ENABLE_FIT

commit 9983001913787102d6d1e7f64134d1c2f896e98d
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Tue Oct 30 17:27:14 2018 +0800

    lib: optee_client: remove keymaster ta from uboot
    
    keymaster ta is too large, so we change store data
    to static ta and remove keymaster ta
    
    Change-Id: Icdb694138caf005d2cb2821714a8526d0391b18b
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/include/optee_include/258be795-f9ca-40e6-a8699ce6886c5d5d.h b/include/optee_include/258be795-f9ca-40e6-a8699ce6886c5d5d.h
deleted file mode 100644
index 2e07fbb105..0000000000
--- a/include/optee_include/258be795-f9ca-40e6-a8699ce6886c5d5d.h
+++ /dev/null
@@ -1,12 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-#ifndef _KEYMASTER_TA_H_
-#define _KEYMASTER_TA_H_
-
-extern const uint8_t keymaster_data[];
-extern const uint32_t keymaster_size;
-
-#endif /* _KEYMASTER_TA_H_ */
diff --git a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta
deleted file mode 100644
index a18356d16a..0000000000
Binary files a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta and /dev/null differ
diff --git a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta
deleted file mode 100644
index 66daec857b..0000000000
Binary files a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta and /dev/null differ
diff --git a/lib/optee_clientApi/Makefile b/lib/optee_clientApi/Makefile
index 552135f4da..aab27e389b 100644
--- a/lib/optee_clientApi/Makefile
+++ b/lib/optee_clientApi/Makefile
@@ -12,10 +12,6 @@ obj-y += tee_smc-arm64.o
 
 ifdef CONFIG_OPTEE_V1
 obj-y += OpteeClientRkFs.o
-obj-y += 258be795-f9ca-40e6-a8699ce6886c5d5d.o
-lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.o: lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c
-lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c: lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta
-	$(srctree)/lib/optee_clientApi/tabinary_to_cfile.py --prefix keymaster --TA $< --out $@
 
 obj-y += c11fe8ac-b997-48cf-a28de2a55e5240ef.o
 lib/optee_clientApi/c11fe8ac-b997-48cf-a28de2a55e5240ef.o: lib/optee_clientApi/c11fe8ac-b997-48cf-a28de2a55e5240ef.c
@@ -25,9 +21,5 @@ endif
 
 ifdef CONFIG_OPTEE_V2
 obj-y += OpteeClientRkFs-v2.o
-obj-y += 258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.o
-lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.o: lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.c
-lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.c: lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta
-	$(srctree)/lib/optee_clientApi/tabinary_to_cfile.py --prefix keymaster --TA $< --out $@
 endif
 
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index fc7d788a82..facc268948 100755
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -459,8 +459,8 @@ uint32_t trusty_read_permanent_attributes(uint8_t *attributes, uint32_t size)
 	TEEC_Context TeecContext;
 	TEEC_Session TeecSession;
 	uint32_t ErrorOrigin;
-	TEEC_UUID tempuuid = { 0x258be795, 0xf9ca, 0x40e6,
-		{ 0xa8, 0x69, 0x9c, 0xe6, 0x88, 0x6c, 0x5d, 0x5d } };
+	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
@@ -522,7 +522,7 @@ uint32_t trusty_read_permanent_attributes(uint8_t *attributes, uint32_t size)
 						TEEC_NONE);
 
 	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					142,
+					0,
 					&TeecOperation,
 					&ErrorOrigin);
 	if (TeecResult == TEEC_SUCCESS)
@@ -542,8 +542,8 @@ uint32_t trusty_write_permanent_attributes(uint8_t *attributes, uint32_t size)
 	TEEC_Context TeecContext;
 	TEEC_Session TeecSession;
 	uint32_t ErrorOrigin;
-	TEEC_UUID tempuuid = { 0x258be795, 0xf9ca, 0x40e6,
-		{ 0xa8, 0x69, 0x9c, 0xe6, 0x88, 0x6c, 0x5d, 0x5d } };
+	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
@@ -607,7 +607,7 @@ uint32_t trusty_write_permanent_attributes(uint8_t *attributes, uint32_t size)
 						TEEC_NONE);
 
 	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					141,
+					1,
 					&TeecOperation,
 					&ErrorOrigin);
 
@@ -964,8 +964,8 @@ TEEC_Result read_from_keymaster(uint8_t *filename,
 	TEEC_Context TeecContext;
 	TEEC_Session TeecSession;
 	uint32_t ErrorOrigin;
-	TEEC_UUID tempuuid = { 0x258be795, 0xf9ca, 0x40e6,
-		{ 0xa8, 0x69, 0x9c, 0xe6, 0x88, 0x6c, 0x5d, 0x5d } };
+	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
@@ -1027,7 +1027,7 @@ TEEC_Result read_from_keymaster(uint8_t *filename,
 						TEEC_NONE);
 
 	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					142,
+					0,
 					&TeecOperation,
 					&ErrorOrigin);
 	if (TeecResult == TEEC_SUCCESS)
@@ -1050,9 +1050,8 @@ uint32_t write_to_keymaster(uint8_t *filename,
 	TEEC_Context TeecContext;
 	TEEC_Session TeecSession;
 	uint32_t ErrorOrigin;
-
-	TEEC_UUID tempuuid = { 0x258be795, 0xf9ca, 0x40e6,
-		{ 0xa8, 0x69, 0x9c, 0xe6, 0x88, 0x6c, 0x5d, 0x5d } };
+	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
@@ -1116,7 +1115,7 @@ uint32_t write_to_keymaster(uint8_t *filename,
 						TEEC_NONE);
 
 	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					141,
+					1,
 					&TeecOperation,
 					&ErrorOrigin);
 
@@ -1494,8 +1493,8 @@ uint32_t trusty_read_permanent_attributes_flag(uint8_t *attributes)
 	TEEC_Context TeecContext;
 	TEEC_Session TeecSession;
 	uint32_t ErrorOrigin;
-	TEEC_UUID tempuuid = { 0x258be795, 0xf9ca, 0x40e6,
-		{ 0xa8, 0x69, 0x9c, 0xe6, 0x88, 0x6c, 0x5d, 0x5d } };
+	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
@@ -1556,7 +1555,7 @@ uint32_t trusty_read_permanent_attributes_flag(uint8_t *attributes)
 						TEEC_NONE);
 
 	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					142,
+					0,
 					&TeecOperation,
 					&ErrorOrigin);
 	if (TeecResult == TEEC_SUCCESS)
@@ -1576,8 +1575,8 @@ uint32_t trusty_write_permanent_attributes_flag(uint8_t attributes)
 	TEEC_Context TeecContext;
 	TEEC_Session TeecSession;
 	uint32_t ErrorOrigin;
-	TEEC_UUID tempuuid = { 0x258be795, 0xf9ca, 0x40e6,
-		{ 0xa8, 0x69, 0x9c, 0xe6, 0x88, 0x6c, 0x5d, 0x5d } };
+	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
@@ -1640,7 +1639,7 @@ uint32_t trusty_write_permanent_attributes_flag(uint8_t attributes)
 						TEEC_NONE);
 
 	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					141,
+					1,
 					&TeecOperation,
 					&ErrorOrigin);
 
diff --git a/lib/optee_clientApi/OpteeClientRPC.c b/lib/optee_clientApi/OpteeClientRPC.c
index 9de072765e..f8d0df396e 100644
--- a/lib/optee_clientApi/OpteeClientRPC.c
+++ b/lib/optee_clientApi/OpteeClientRPC.c
@@ -15,7 +15,6 @@
 #include <optee_include/teesmc_optee.h>
 #include <optee_include/tee_rpc_types.h>
 #include <optee_include/tee_rpc.h>
-#include <optee_include/258be795-f9ca-40e6-a8699ce6886c5d5d.h>
 #include <optee_include/c11fe8ac-b997-48cf-a28de2a55e5240ef.h>
 #ifdef CONFIG_OPTEE_V1
 #include <optee_include/OpteeClientRkFs.h>
@@ -111,8 +110,8 @@ TEEC_Result OpteeRpcCmdLoadTa(t_teesmc32_arg *TeeSmc32Arg)
 	size_t AllocAddress = 0;
 
 	if (is_uuid_equal(TeeLoadTaCmd->uuid, TA_RK_KEYMASTER_UUID)) {
-		ImageData = (void *)keymaster_data;
-		ImageSize = keymaster_size;
+		ImageData = (void *)0;
+		ImageSize = 0;
 	} else {
 		ImageData = (void *)widevine_keybox_data;
 		ImageSize = widevine_keybox_size;
@@ -171,11 +170,11 @@ TEEC_Result OpteeRpcCmdLoadV2Ta(t_teesmc32_arg *TeeSmc32Arg)
 		debug("uuid 0x%x", uuid[i]);
 
 	if (TeeSmc32Param[1].u.memref.buf_ptr == 0) {
-		debug("return size of TA, keymaster_size = 0x%x", keymaster_size);
-		TeeSmc32Param[1].u.memref.size = keymaster_size;
+		debug("return size of TA, keymaster_size = 0");
+		TeeSmc32Param[1].u.memref.size = 0;
 	} else {
-		memcpy((void *)(size_t)TeeSmc32Param[1].u.memref.buf_ptr,
-			(void *)keymaster_data, TeeSmc32Param[1].u.memref.size);
+		/*memcpy((void *)(size_t)TeeSmc32Param[1].u.memref.buf_ptr,
+			(void *)keymaster_data, TeeSmc32Param[1].u.memref.size);*/
 		debug("memref.buf_ptr = 0x%llx; memref.size = 0x%llx",
 			TeeSmc32Param[1].u.memref.buf_ptr,
 			TeeSmc32Param[1].u.memref.size);

commit ca77381e94c0a5a1f14e592d7cf7eedc8595f2e0
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Nov 12 16:22:47 2018 +0800

    rockchip: ram: rk3399: update for TPL
    
    Init the ddr sdram in TPL instead of SPL, update the code.
    
    Change-Id: I29ab54a2fe9aacc839826fc40ef263a10ef7033c
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c
index 76c1fe80a7..fa8da66f4e 100644
--- a/drivers/ram/rockchip/sdram_rk3399.c
+++ b/drivers/ram/rockchip/sdram_rk3399.c
@@ -32,7 +32,7 @@ struct chan_info {
 };
 
 struct dram_info {
-#ifdef CONFIG_SPL_BUILD
+#ifdef CONFIG_TPL_BUILD
 	struct chan_info chan[2];
 	struct clk ddr_clk;
 	struct rk3399_cru *cru;
@@ -57,7 +57,7 @@ struct dram_info {
 #define PHY_DRV_ODT_40		0xe
 #define PHY_DRV_ODT_34_3	0xf
 
-#ifdef CONFIG_SPL_BUILD
+#ifdef CONFIG_TPL_BUILD
 
 struct rockchip_dmc_plat {
 #if CONFIG_IS_ENABLED(OF_PLATDATA)
@@ -1188,7 +1188,7 @@ static int rk3399_dmc_init(struct udevice *dev)
 
 static int rk3399_dmc_probe(struct udevice *dev)
 {
-#ifdef CONFIG_SPL_BUILD
+#ifdef CONFIG_TPL_BUILD
 	if (rk3399_dmc_init(dev))
 		return 0;
 #else
@@ -1199,6 +1199,15 @@ static int rk3399_dmc_probe(struct udevice *dev)
 	priv->info.base = CONFIG_SYS_SDRAM_BASE;
 	priv->info.size = rockchip_sdram_size(
 			(phys_addr_t)&priv->pmugrf->os_reg2);
+#ifdef CONFIG_SPL_BUILD
+	struct ddr_param ddr_parem;
+
+	ddr_parem.count = 1;
+	ddr_parem.para[0] = priv->info.base;
+	ddr_parem.para[1] = priv->info.size;
+	rockchip_setup_ddr_param(&ddr_parem);
+#endif
+
 #endif
 	return 0;
 }
@@ -1227,12 +1236,12 @@ U_BOOT_DRIVER(dmc_rk3399) = {
 	.id = UCLASS_RAM,
 	.of_match = rk3399_dmc_ids,
 	.ops = &rk3399_dmc_ops,
-#ifdef CONFIG_SPL_BUILD
+#ifdef CONFIG_TPL_BUILD
 	.ofdata_to_platdata = rk3399_dmc_ofdata_to_platdata,
 #endif
 	.probe = rk3399_dmc_probe,
 	.priv_auto_alloc_size = sizeof(struct dram_info),
-#ifdef CONFIG_SPL_BUILD
+#ifdef CONFIG_TPL_BUILD
 	.platdata_auto_alloc_size = sizeof(struct rockchip_dmc_plat),
 #endif
 };

commit 90d1164a0442653b949e15ca23eb18a815e13931
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Nov 12 16:18:01 2018 +0800

    spl: fit: use ddr for mmc read buffer in SPL
    
    SPL need read data to IRAM for bl31(m0&data), but the SDHCI does
    not support this path, we need to use DDR space as buffer.
    The SDHCI driver do not have any error/warning if we set the
    destination address to IRAM, and complete seems normally, but
    the data is not transfer.
    
    Change-Id: Ied9eed835961470bc87fda99a1565992c4103d9c
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 72ae8f4c50..ebfd5bc2e3 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -10,6 +10,7 @@
 #include <image.h>
 #include <libfdt.h>
 #include <spl.h>
+#include <malloc.h>
 
 #ifndef CONFIG_SYS_BOOTM_LEN
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)
@@ -196,6 +197,10 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 			return -ENOENT;
 
 		load_ptr = (load_addr + align_len) & ~align_len;
+#ifdef CONFIG_ROCKCHIP_RK3399
+		if ((load_ptr & 0xffff0000) == CONFIG_ROCKCHIP_IRAM_START_ADDR)
+			load_ptr = (ulong)memalign(ARCH_DMA_MINALIGN, len);
+#endif
 		length = len;
 
 		overhead = get_aligned_image_overhead(info, offset);

commit f7669824484e34ff707cd9f8b6f83f0f352a6597
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Nov 9 11:21:38 2018 +0800

    rockchip: rk3399: update defconfig for TPL
    
    The SPL is now running at SDRAM, and 0x10000 is used by BL31,
    and the ARM SPL do not support relocate now, we need reserved
    0x50000 so that it won't overwrite the code when we load the
    bl31 to target space.
    We should remove this after we enable the relocate feature.
    
    The SPL need malloc 0x9000 for MMC as buffer used for transfer
    data to IRAM(The EMMC DMA can not transfer data to IRAM directly).
    
    Change-Id: Ib6b73b3004345989d091d17c85b10698a97538b7
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/android6.0-rk3399_defconfig b/configs/android6.0-rk3399_defconfig
index 2a907019bd..f56103356f 100644
--- a/configs/android6.0-rk3399_defconfig
+++ b/configs/android6.0-rk3399_defconfig
@@ -4,7 +4,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_ROCKCHIP_RK3399=y
-CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x50000
 CONFIG_RKIMG_BOOTLOADER=y
 # CONFIG_USING_KERNEL_DTB is not set
 CONFIG_SPL_STACK_R_ADDR=0x80000
@@ -16,7 +16,7 @@ CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_FASTBOOT_BUF_ADDR=0x00800800
@@ -101,4 +101,5 @@ CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index 305f0a405d..a28d8fdd2d 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -4,7 +4,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_ROCKCHIP_RK3399=y
-CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x50000
 CONFIG_RKIMG_BOOTLOADER=y
 # CONFIG_USING_KERNEL_DTB is not set
 CONFIG_SPL_STACK_R_ADDR=0x80000
@@ -16,7 +16,7 @@ CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_FASTBOOT_BUF_ADDR=0x00800800
@@ -103,4 +103,5 @@ CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
index f0931266aa..95b4d07a8f 100644
--- a/configs/firefly-rk3399_defconfig
+++ b/configs/firefly-rk3399_defconfig
@@ -4,19 +4,18 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_ROCKCHIP_RK3399=y
-CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x50000
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3399-firefly"
 CONFIG_DEBUG_UART=y
-CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_FIT=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_FASTBOOT_BUF_ADDR=0x00800800
@@ -92,4 +91,5 @@ CONFIG_USB_ETHER_MCS7830=y
 CONFIG_USB_ETHER_RTL8152=y
 CONFIG_USB_ETHER_SMSC95XX=y
 CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
index cff3149344..aa9e5b167d 100644
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -4,7 +4,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_ROCKCHIP_RK3399=y
-CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x50000
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
@@ -17,7 +17,7 @@ CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_FASTBOOT_BUF_ADDR=0x00800800
@@ -116,5 +116,6 @@ CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
 CONFIG_TEST_ROCKCHIP=y

commit c7b9ee6b6f206c31475cfd7a6a965be5c07d9331
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Nov 9 11:18:15 2018 +0800

    rockchip: rk3399: add tpl support in Kconfig
    
    Rockchp platform suppose to use TPL(run in SRAM) as dram init and
    SPL(run in DDR SDRAM) as pre-loader, so that the SPL would not be
    limited by SRAM size.
    
    Change-Id: Ib4115dbf6679fd4649e694d069a6489346112a97
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/boot0.h b/arch/arm/include/asm/arch-rockchip/boot0.h
index feb659d07b..796ccdee23 100644
--- a/arch/arm/include/asm/arch-rockchip/boot0.h
+++ b/arch/arm/include/asm/arch-rockchip/boot0.h
@@ -72,6 +72,6 @@ _start:
 	ARM_VECTORS
 #endif
 
-#if defined(CONFIG_SPL_BUILD) && (CONFIG_ROCKCHIP_SPL_RESERVE_IRAM > 0)
+#if !defined(CONFIG_TPL_BUILD) && defined(CONFIG_SPL_BUILD) && (CONFIG_ROCKCHIP_SPL_RESERVE_IRAM > 0)
 	.space CONFIG_ROCKCHIP_SPL_RESERVE_IRAM	/* space for the ATF data */
 #endif
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index fe90a710b3..8248a7c96d 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -262,7 +262,12 @@ config ROCKCHIP_RK3399
 	bool "Support Rockchip RK3399"
 	select ARM64
 	select SUPPORT_SPL
+	select SUPPORT_TPL
 	select SPL
+	select TPL
+	select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
+	select TPL_NEEDS_SEPARATE_STACK if TPL
+	imply TPL_SERIAL_SUPPORT
 	select SPL_SEPARATE_BSS
 	select SPL_SERIAL_SUPPORT
 	select SPL_DRIVERS_MISC_SUPPORT
@@ -271,6 +276,18 @@ config ROCKCHIP_RK3399
 	select BOARD_LATE_INIT
 	select ROCKCHIP_BROM_HELPER
 	select ARM_SMCCC
+	select TPL_LIBCOMMON_SUPPORT
+	select TPL_LIBGENERIC_SUPPORT
+	select TPL_SYS_MALLOC_SIMPLE
+	select TPL_BOOTROM_SUPPORT
+	select TPL_DRIVERS_MISC_SUPPORT
+	select TPL_OF_CONTROL
+	select TPL_DM
+	select TPL_REGMAP
+	select TPL_SYSCON
+	select TPL_RAM
+	select TPL_CLK
+	select TPL_TINY_MEMSET
 	help
 	  The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
 	  and quad-core Cortex-A53.
@@ -279,6 +296,23 @@ config ROCKCHIP_RK3399
 	  and video codec support. Peripherals include Gigabit Ethernet,
 	  USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
 
+if ROCKCHIP_RK3399
+
+config TPL_LDSCRIPT
+	default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
+
+config TPL_TEXT_BASE
+        default 0xff8c2000
+
+config TPL_MAX_SIZE
+        default 188416
+
+config TPL_STACK
+        default 0xff8effff
+
+endif
+
+
 config ROCKCHIP_RK1808
 	bool "Support Rockchip RK1808"
 	select ARM64
@@ -338,7 +372,7 @@ config SPL_ROCKCHIP_BACK_TO_BROM
 
 config TPL_ROCKCHIP_BACK_TO_BROM
 	bool "TPL returns to bootrom"
-	default y if ROCKCHIP_RK3368 || ROCKCHIP_RK3328
+	default y
 	select ROCKCHIP_BROM_HELPER
 	depends on TPL
 	help
diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index 6f5b909762..4921ae93f3 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -20,13 +20,11 @@
 #define CONFIG_SYS_TEXT_BASE		0x00200000
 #define CONFIG_SYS_INIT_SP_ADDR		0x00400000
 #define CONFIG_SYS_LOAD_ADDR		0x00800800
-#define CONFIG_SPL_STACK		0xff8effff
-#define CONFIG_SPL_TEXT_BASE		0xff8c2000
-#define CONFIG_SPL_MAX_SIZE		0x30000 - 0x2000
-/*  BSS setup */
-#define CONFIG_SPL_BSS_START_ADDR       0xff8e4000
-#define CONFIG_SPL_BSS_MAX_SIZE         0x10000 - 0x4000
-
+#define CONFIG_SPL_STACK		0x00400000
+#define CONFIG_SPL_TEXT_BASE		0x00000000
+#define CONFIG_SPL_MAX_SIZE             0x100000
+#define CONFIG_SPL_BSS_START_ADDR	0x00400000
+#define CONFIG_SPL_BSS_MAX_SIZE         0x2000
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */
 
 #define GICD_BASE			0xFEE00000

commit cd2964574b61bec2d95b17676b5e8b540c05b6c2
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Nov 8 11:01:54 2018 +0800

    rockchip: rk3229: add spl-boot-order in chosen
    
    Add spl-boot-order to boot from both EMMC and SD.
    
    Change-Id: I7975a6faa79ad5a536faccac33ed6b342f99dc3f
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3229-evb.dts b/arch/arm/dts/rk3229-evb.dts
index 09665abb4c..d137064283 100644
--- a/arch/arm/dts/rk3229-evb.dts
+++ b/arch/arm/dts/rk3229-evb.dts
@@ -14,6 +14,10 @@
 	model = "Rockchip RK3229 Evaluation board";
 	compatible = "rockchip,rk3229-evb", "rockchip,rk3229";
 
+	chosen {
+		u-boot,spl-boot-order = &emmc, &sdmmc;
+	};
+
 	ext_gmac: ext_gmac {
 		compatible = "fixed-clock";
 		clock-frequency = <125000000>;

commit 10f01e730f49875e57aba303175e0af8819a1367
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Tue Nov 6 18:19:26 2018 +0800

    rockchip: sdhci: improve calpad busy trimming
    
    Change-Id: I8326d72d36a6aa58615d8c502881e4d446451a99
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index af840fc56d..592f31ec4f 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -79,9 +79,10 @@ static void rk3399_emmc_phy_power_on(struct rockchip_emmc_phy *phy, u32 clock)
 
 	/*
 	 * According to the user manual, it asks driver to
-	 * wait 5us for calpad busy trimming
+	 * wait 5us for calpad busy trimming. But it seems that
+	 * 5us of caldone isn't enough for all cases.
 	 */
-	udelay(5);
+	udelay(500);
 	caldone = readl(&phy->emmcphy_status);
 	caldone = (caldone >> PHYCTRL_CALDONE_SHIFT) & PHYCTRL_CALDONE_MASK;
 	if (caldone != PHYCTRL_CALDONE_DONE) {

commit 0598134af8ae8c77ee388a501236cf1e3dbe1482
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Nov 2 16:59:05 2018 +0800

    rockchip: rk322x: fix clock assert value
    
    The value after '<' should be max value instead of 'max-1'
    
    Change-Id: I7a1deaa75b8a931631a54e8dfd154c266251c7fc
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c
index 59bcd0540c..a59d945c9c 100644
--- a/drivers/clk/rockchip/clk_rk322x.c
+++ b/drivers/clk/rockchip/clk_rk322x.c
@@ -313,7 +313,7 @@ static ulong rk322x_bus_set_clk(struct rk322x_clk_priv *priv,
 	switch (clk_id) {
 	case ACLK_CPU:
 		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
-		assert(src_clk_div - 1 < 31);
+		assert(src_clk_div - 1 < 32);
 		rk_clrsetreg(&cru->cru_clksel_con[0],
 			     BUS_ACLK_PLL_SEL_MASK | BUS_ACLK_DIV_MASK,
 			     BUS_ACLK_PLL_SEL_GPLL << BUS_ACLK_PLL_SEL_SHIFT |
@@ -323,7 +323,7 @@ static ulong rk322x_bus_set_clk(struct rk322x_clk_priv *priv,
 		src_clk_div = DIV_ROUND_UP(rk322x_bus_get_clk(priv,
 							      ACLK_CPU),
 					   hz);
-		assert(src_clk_div - 1 < 3);
+		assert(src_clk_div - 1 < 4);
 		rk_clrsetreg(&cru->cru_clksel_con[1],
 			     BUS_HCLK_DIV_MASK,
 			     (src_clk_div - 1) << BUS_HCLK_DIV_SHIFT);
@@ -332,7 +332,7 @@ static ulong rk322x_bus_set_clk(struct rk322x_clk_priv *priv,
 		src_clk_div = DIV_ROUND_UP(rk322x_bus_get_clk(priv,
 							      ACLK_CPU),
 					   hz);
-		assert(src_clk_div - 1 < 7);
+		assert(src_clk_div - 1 < 8);
 		rk_clrsetreg(&cru->cru_clksel_con[1],
 			     BUS_PCLK_DIV_MASK,
 			     (src_clk_div - 1) << BUS_PCLK_DIV_SHIFT);
@@ -386,7 +386,7 @@ static ulong rk322x_peri_set_clk(struct rk322x_clk_priv *priv,
 	switch (clk_id) {
 	case ACLK_PERI:
 		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
-		assert(src_clk_div - 1 < 31);
+		assert(src_clk_div - 1 < 32);
 		rk_clrsetreg(&cru->cru_clksel_con[10],
 			     PERI_PLL_SEL_MASK | PERI_ACLK_DIV_MASK,
 			     PERI_PLL_GPLL << PERI_PLL_SEL_SHIFT |
@@ -396,7 +396,7 @@ static ulong rk322x_peri_set_clk(struct rk322x_clk_priv *priv,
 		src_clk_div = DIV_ROUND_UP(rk322x_peri_get_clk(priv,
 							       ACLK_PERI),
 					   hz);
-		assert(src_clk_div - 1 < 3);
+		assert(src_clk_div - 1 < 4);
 		rk_clrsetreg(&cru->cru_clksel_con[10],
 			     PERI_HCLK_DIV_MASK,
 			     (src_clk_div - 1) << PERI_HCLK_DIV_SHIFT);
@@ -405,7 +405,7 @@ static ulong rk322x_peri_set_clk(struct rk322x_clk_priv *priv,
 		src_clk_div = DIV_ROUND_UP(rk322x_peri_get_clk(priv,
 							       ACLK_PERI),
 					   hz);
-		assert(src_clk_div - 1 < 7);
+		assert(src_clk_div - 1 < 8);
 		rk_clrsetreg(&cru->cru_clksel_con[10],
 			     PERI_PCLK_DIV_MASK,
 			     (src_clk_div - 1) << PERI_PCLK_DIV_SHIFT);
@@ -465,7 +465,7 @@ static ulong rk322x_vop_set_clk(struct rk322x_clk_priv *priv,
 	u32 con, parent;
 
 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
-	assert(src_clk_div - 1 < 31);
+	assert(src_clk_div - 1 < 32);
 
 	switch (clk_id) {
 	case ACLK_VOP:

commit cfadd6bbce098ddf265e0f4c6951576a2a5d49f8
Author: YouMin Chen <cym@rock-chips.com>
Date:   Thu Oct 25 15:31:04 2018 +0800

    driver: ram: rockchip: fix rockchip_setup_ddr_param
    
    rockchip_setup_ddr_param use to write ddr param to
    a known place for trustos.
    
    Change-Id: Ied4636d5e709ed036a45434202d99e916a5f1dcb
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h b/arch/arm/include/asm/arch-rockchip/sdram_common.h
index 33c8192f8e..2f63d92584 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_common.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_common.h
@@ -17,6 +17,12 @@ enum {
 	UNUSED = 0xFF
 };
 
+struct ddr_param {
+	u32 count;
+	u32 reserved;
+	u64 para[8];
+};
+
 /*
  * sys_reg bitfield struct
  * [31]		row_3_4_ch1
@@ -85,6 +91,6 @@ size_t rockchip_sdram_size(phys_addr_t reg);
 int dram_init(void);
 
 /* Write ddr param to a known place for trustos */
-int rockchip_setup_ddr_param(struct ram_info *info);
+int rockchip_setup_ddr_param(struct ddr_param *info);
 
 #endif
diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
index 16108c51ec..3f15c18000 100644
--- a/arch/arm/mach-rockchip/sdram_common.c
+++ b/arch/arm/mach-rockchip/sdram_common.c
@@ -13,14 +13,7 @@
 #include <dm/uclass-internal.h>
 
 DECLARE_GLOBAL_DATA_PTR;
-struct ddr_param{
-	u32 count;
-	u32 reserved;
-	u64 bank_addr;
-	u64 bank_size;
-};
 #define PARAM_DRAM_INFO_OFFSET 0x2000000
-
 #define TRUST_PARAMETER_OFFSET    (34 * 1024 * 1024)
 
 struct tos_parameter_t {
@@ -435,14 +428,15 @@ ulong board_get_usable_ram_top(ulong total_size)
 	return (gd->ram_top > top) ? top : gd->ram_top;
 }
 
-int rockchip_setup_ddr_param(struct ram_info *info)
+int rockchip_setup_ddr_param(struct ddr_param *info)
 {
+	u32 i;
 	struct ddr_param *dinfo = (struct ddr_param *)(CONFIG_SYS_SDRAM_BASE +
 					PARAM_DRAM_INFO_OFFSET);
 
-	dinfo->count = 1;
-	dinfo->bank_addr = info->base;
-	dinfo->bank_size = info->size;
+	dinfo->count = info->count;
+	for (i = 0; i < (info->count * 2); i++)
+		dinfo->para[i] = info->para[i];
 
 	return 0;
 }
diff --git a/drivers/ram/rockchip/sdram_px30.c b/drivers/ram/rockchip/sdram_px30.c
index 35149d046e..1b78e67ae4 100644
--- a/drivers/ram/rockchip/sdram_px30.c
+++ b/drivers/ram/rockchip/sdram_px30.c
@@ -1157,6 +1157,32 @@ static int dram_detect_cs1_row(struct px30_sdram_params *sdram_params,
 	return ret;
 }
 
+void get_ddr_param(struct px30_sdram_params *sdram_params,
+		   struct ddr_param *ddr_param)
+{
+	u64 cs_cap[2];
+
+	cs_cap[0] = get_cs_cap(sdram_params, 0);
+	cs_cap[1] = get_cs_cap(sdram_params, 1);
+
+	if (sdram_params->ch.row_3_4) {
+		cs_cap[0] =  cs_cap[0] * 3 / 4;
+		cs_cap[1] =  cs_cap[1] * 3 / 4;
+	}
+
+	if (sdram_params->ch.row_3_4 && sdram_params->ch.rank == 2) {
+		ddr_param->count = 2;
+		ddr_param->para[0] = 0;
+		ddr_param->para[1] = cs_cap[0] * 4 / 3;
+		ddr_param->para[2] = cs_cap[0];
+		ddr_param->para[3] = cs_cap[1];
+	} else {
+		ddr_param->count = 1;
+		ddr_param->para[0] = 0;
+		ddr_param->para[1] = (u64)cs_cap[0] + (u64)cs_cap[1];
+	}
+}
+
 /* return: 0 = success, other = fail */
 static int sdram_init_detect(struct dram_info *dram,
 			     struct px30_sdram_params *sdram_params)
@@ -1209,6 +1235,7 @@ int sdram_init(void)
 {
 	struct px30_sdram_params *sdram_params;
 	int ret = 0;
+	struct ddr_param ddr_param;
 
 	dram_info.phy = (void *)DDR_PHY_BASE_ADDR;
 	dram_info.pctl = (void *)DDRC_BASE_ADDR;
@@ -1224,6 +1251,8 @@ int sdram_init(void)
 	if (ret)
 		goto error;
 
+	get_ddr_param(sdram_params, &ddr_param);
+	rockchip_setup_ddr_param(&ddr_param);
 	print_ddr_info(sdram_params);
 
 	printascii("out\n");
diff --git a/drivers/ram/rockchip/sdram_rk3328.c b/drivers/ram/rockchip/sdram_rk3328.c
index 24825971f7..7782d6a690 100644
--- a/drivers/ram/rockchip/sdram_rk3328.c
+++ b/drivers/ram/rockchip/sdram_rk3328.c
@@ -993,7 +993,12 @@ static int rk3328_dmc_probe(struct udevice *dev)
 	priv->info.size = rockchip_sdram_size(
 				(phys_addr_t)&priv->grf->os_reg[2]);
 #ifdef CONFIG_SPL_BUILD
-	rockchip_setup_ddr_param(&priv->info);
+	struct ddr_param ddr_parem;
+
+	ddr_parem.count = 1;
+	ddr_parem.para[0] = priv->info.base;
+	ddr_parem.para[1] = priv->info.size;
+	rockchip_setup_ddr_param(&ddr_parem);
 #endif
 #endif
 	return 0;

commit f799a6361c91d94b87cac21aa12385127a99d26e
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Mon Oct 22 14:59:46 2018 +0800

    configs: rk3328_common: Increase the size of malloc to 128MB.
    
    If vbmeta does not have signature information, avb will load all
    data in the vbmeta partition, which requires more malloc size.
    
    Change-Id: I8f03ec149a5b516d5dfa2b7906a54260c4e2e149
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index d9f06f52dd..a5be7c3bde 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -9,7 +9,7 @@
 
 #include "rockchip-common.h"
 
-#define CONFIG_SYS_MALLOC_LEN		(32 << 20)
+#define CONFIG_SYS_MALLOC_LEN		(128 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
 

commit 151cb556ea0d429a5ed937f00fa72bc0d2d28371
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 7 09:40:04 2018 +0800

    fuel gauge: rk816: default enable usb sys
    
    Change-Id: I54be4aa41a02adc51d764a48f1a1c966bff0445e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk816.c b/drivers/power/fuel_gauge/fg_rk816.c
index 7257211d60..49f947ed4a 100644
--- a/drivers/power/fuel_gauge/fg_rk816.c
+++ b/drivers/power/fuel_gauge/fg_rk816.c
@@ -73,6 +73,9 @@ static int dbg_enable = 0;
 /* CHRG_USB_CTRL*/
 #define CHRG_EN			(1 << 7)
 
+/* BAT_CTRL_REG */
+#define USB_SYS_EN		(1 << 6)
+
 /*SUP_STS_REG*/
 #define BAT_EXS			(1 << 7)
 #define USB_EXIST		(1 << 1)
@@ -233,6 +236,15 @@ static int rk816_bat_get_dsoc(struct  battery_priv *di)
 	return rk816_bat_read(di, SOC_REG);
 }
 
+static void rk816_bat_enable_input_current(struct battery_priv *di)
+{
+	u8 val;
+
+	val = rk816_bat_read(di, BAT_CTRL_REG);
+	val |= USB_SYS_EN;
+	rk816_bat_write(di, BAT_CTRL_REG, val);
+}
+
 static void rk816_bat_enable_gauge(struct battery_priv *di)
 {
 	u8 val;
@@ -976,6 +988,7 @@ void rk816_bat_init_rsoc(struct battery_priv *di)
 
 static int rk816_fg_init(struct battery_priv *di)
 {
+	rk816_bat_enable_input_current(di);
 	rk816_bat_enable_gauge(di);
 	rk816_bat_set_vol_instant_mode(di);
 	rk816_bat_init_voltage_kb(di);

commit ff6f33d024ee23ae3ef6043c5183017a69610109
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Nov 6 20:16:40 2018 +0800

    rockchip: rk3308: rename rk3308-evb-u-boot.dtsi to rk3308-u-boot.dtsi
    
    follow other platforms name style, like: rkxx-u-boot.dtsi
    
    Change-Id: Ic05c37bf49daad1c531c07f7d82abde4a485e432
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-evb.dts b/arch/arm/dts/rk3308-evb.dts
index d3853ef3eb..dfcd3f2916 100644
--- a/arch/arm/dts/rk3308-evb.dts
+++ b/arch/arm/dts/rk3308-evb.dts
@@ -6,6 +6,7 @@
 
 /dts-v1/;
 #include "rk3308.dtsi"
+#include "rk3308-u-boot.dtsi"
 #include <dt-bindings/input/input.h>
 #include <linux/media-bus-format.h>
 
diff --git a/arch/arm/dts/rk3308-evb-u-boot.dtsi b/arch/arm/dts/rk3308-u-boot.dtsi
similarity index 100%
rename from arch/arm/dts/rk3308-evb-u-boot.dtsi
rename to arch/arm/dts/rk3308-u-boot.dtsi

commit 12c19cb411c5b52b672d6505352af91784afc822
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Thu Oct 18 17:10:42 2018 +0800

    configs: rk3328_common: enable CONFIG_SUPPORT_EMMC_RPMB
    
    Change-Id: I3c1989db974be233395080a777fc7d5cd554d70e
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index 362e3843dd..d9f06f52dd 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -28,6 +28,8 @@
 #define GICD_BASE			0xFF811000
 #define GICC_BASE			0xFF812000
 
+#define CONFIG_SUPPORT_EMMC_RPMB
+
 #define CONFIG_ROCKUSB_G_DNL_PID	0x320C
 
 /* MMC/SD IP block */

commit 2a32feb3116845f729eda449405d8499c8a61e10
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Thu Oct 18 16:44:28 2018 +0800

    configs: rk3328_defconfig: update with save defconfig
    
    Change-Id: I58b2f69e7237126ad87c15da3b23817159abd471
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index 82324f27f7..190b2dd904 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -110,10 +110,10 @@ CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_HDMI=y
 CONFIG_ROCKCHIP_INNO_HDMI_PHY=y
-CONFIG_ROCKCHIP_DRM_TVE=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
+CONFIG_ROCKCHIP_DRM_TVE=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y

commit fee1ae3406b3348dab974acca10f130b696dad6d
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Mon Nov 5 11:59:58 2018 +0800

    usb: phy: add missed siddq set for rk3288 platform
    
    power up usb phy analog blocks by siddq when reboot-loader.
    
    Change-Id: I2fb1f8640bbb00a14cb18252cab78e8190efdd19
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/drivers/usb/phy/rockchip_usb2_phy.c b/drivers/usb/phy/rockchip_usb2_phy.c
index 133664b380..edcdb3268f 100644
--- a/drivers/usb/phy/rockchip_usb2_phy.c
+++ b/drivers/usb/phy/rockchip_usb2_phy.c
@@ -33,6 +33,7 @@ struct usb2phy_reg {
  */
 struct rockchip_usb2_phy_cfg {
 	struct usb2phy_reg port_reset;
+	struct usb2phy_reg siddq;
 	struct usb2phy_reg soft_con;
 	struct usb2phy_reg suspend;
 };
@@ -44,6 +45,7 @@ struct rockchip_usb2_phy_dt_id {
 
 static const struct rockchip_usb2_phy_cfg rk3288_pdata = {
 	.port_reset     = {0x00, 12, 12, 0, 1},
+	.siddq		= {0x00, 13, 13, 0, 1},
 	.soft_con       = {0x08, 2, 2, 0, 1},
 	.suspend	= {0x0c, 5, 0, 0x01, 0x2A},
 };
@@ -153,6 +155,10 @@ void otg_phy_init(struct dwc2_udc *dev)
 		return;
 	}
 	pdata->priv = phy_cfg;
+
+	/* power up usb phy analog blocks by set siddq 0 */
+	property_enable(pdata, &phy_cfg->siddq, false);
+
 	/* disable software control */
 	property_enable(pdata, &phy_cfg->soft_con, false);
 

commit 11f8577f04767d17b0f62044b58a0800a1f498b9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Nov 6 14:14:14 2018 +0800

    rockchip: rk3036: add rk3036_defconfig
    
    enable kernel dtb.
    
    Change-Id: I1a62889b618c2ad068309e017ca4a4de174b52c2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3036_defconfig b/configs/rk3036_defconfig
new file mode 100644
index 0000000000..b19cbefe39
--- /dev/null
+++ b/configs/rk3036_defconfig
@@ -0,0 +1,97 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x1000
+CONFIG_TPL_TEXT_BASE=0x10081000
+CONFIG_ROCKCHIP_RK3036=y
+CONFIG_TPL_STACK=0x10081fff
+# CONFIG_SPL_ROCKCHIP_BACK_TO_BROM is not set
+CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_TARGET_EVB_RK3036=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_STACK_R_ADDR=0x60600000
+CONFIG_DEFAULT_DEVICE_TREE="rk3036-sdk"
+CONFIG_DEBUG_UART=y
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x0
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_SOURCE="arch/arm/mach-rockchip/fit_spl_optee.its"
+CONFIG_BOOTDELAY=0
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
+CONFIG_SPL_OPTEE_SUPPORT=y
+CONFIG_SPL_OPTEE=y
+CONFIG_TPL_TINY_FRAMEWORK=y
+CONFIG_TPL_SERIAL_SUPPORT=y
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIME=y
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_ISO_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_SPL_PARTITION_UUIDS=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_ADC_KEY=y
+CONFIG_LED=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_DM_RESET=y
+# CONFIG_TPL_DM_SERIAL is not set
+CONFIG_DEBUG_UART_BASE=0x20068000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x310a
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_CMD_DHRYSTONE=y
+CONFIG_ERRNO_STR=y
+CONFIG_AVB_LIBAVB=y
+CONFIG_AVB_LIBAVB_AB=y
+CONFIG_AVB_LIBAVB_ATX=y
+CONFIG_AVB_LIBAVB_USER=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V1=y
+CONFIG_TEST_ROCKCHIP=y
diff --git a/include/configs/evb_rk3036.h b/include/configs/evb_rk3036.h
index 807bf7ec55..1bfb8c9178 100644
--- a/include/configs/evb_rk3036.h
+++ b/include/configs/evb_rk3036.h
@@ -38,6 +38,9 @@
 #define CONFIG_SETUP_MEMORY_TAGS
 #define CONFIG_CMDLINE_TAG
 
+#undef CONFIG_BOOTCOMMAND
+#define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
+
 #endif
 
 #endif
diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index 065a517084..fec756cf7f 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -65,6 +65,7 @@
 	"fdt_high=0x7fffffff\0" \
 	"partitions=" PARTS_DEFAULT \
 	ENV_MEM_LAYOUT_SETTINGS \
+	RKIMG_DET_BOOTDEV \
 	BOOTENV
 #endif
 

commit 6ebb5f3d0d2a204fde747628af93d2c2310fe798
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Tue Nov 6 10:30:37 2018 +0800

    common: boot_rkimg: get boot_mode from register without misc partition
    
    If the misc partition is nonexistent, it's still to be hope that get the
    boot mode from GRF register.
    
    Change-Id: I94e6a64b9433a0c95071e3ee380841b8fddf768d
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index c5f421480b..6c53a25d66 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -308,7 +308,7 @@ int rockchip_get_boot_mode(void)
 {
 	struct blk_desc *dev_desc;
 	disk_partition_t part_info;
-	struct bootloader_message *bmsg;
+	struct bootloader_message *bmsg = NULL;
 	int size = DIV_ROUND_UP(sizeof(struct bootloader_message), RK_BLK_SIZE)
 		   * RK_BLK_SIZE;
 	int ret;
@@ -336,7 +336,7 @@ int rockchip_get_boot_mode(void)
 			&part_info);
 	if (ret < 0) {
 		printf("get part %s fail %d\n", PART_MISC, ret);
-		return -EIO;
+		goto fallback;
 	}
 
 	bmsg = memalign(ARCH_DMA_MINALIGN, size);
@@ -348,8 +348,9 @@ int rockchip_get_boot_mode(void)
 		return -EIO;
 	}
 
+fallback:
 	/* Mode from misc partition */
-	if (!strcmp(bmsg->command, "boot-recovery")) {
+	if (bmsg && !strcmp(bmsg->command, "boot-recovery")) {
 		boot_mode = BOOT_MODE_RECOVERY;
 	} else {
 		/* Mode from boot mode register */

commit 1631bee789029b0155e0efccad7d37b4522b9bb8
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Nov 6 10:01:20 2018 +0800

    rockchip: dtsi: rk3128: sync from kernel
    
    base on commit 4d46be090:
            (clk: rockchip: rk3128: add hclk_sfc)
    
    Change-Id: Ied6584460fa5243abd26efa5602b2312222898a1
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/include/dt-bindings/clock/rk3128-cru.h b/include/dt-bindings/clock/rk3128-cru.h
index 95efd48eb4..a5fc4b8377 100644
--- a/include/dt-bindings/clock/rk3128-cru.h
+++ b/include/dt-bindings/clock/rk3128-cru.h
@@ -120,6 +120,7 @@
 #define PCLK_MIPIPHY		370
 
 /* hclk gates */
+#define HCLK_SFC		439
 #define HCLK_SPDIF		440
 #define HCLK_GPS		441
 #define HCLK_USBHOST		442

commit c664c887179b5dc1b26fff5b9c9721aee7437c98
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Nov 2 17:59:21 2018 +0800

    rockchip: rk1808: correct SDRAM_MAX_SIZE
    
    Change-Id: Icdefdeff0a9e4f1ae8a161eb15b748471b291b74
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk1808_common.h b/include/configs/rk1808_common.h
index b7a25f4bbc..27e8dabaea 100644
--- a/include/configs/rk1808_common.h
+++ b/include/configs/rk1808_common.h
@@ -26,7 +26,7 @@
 #define CONFIG_BOUNCE_BUFFER
 
 #define CONFIG_SYS_SDRAM_BASE		0
-#define SDRAM_MAX_SIZE			0xff000000
+#define SDRAM_MAX_SIZE			0xf8000000
 #define SDRAM_BANK_SIZE			(2UL << 30)
 #define CONFIG_PREBOOT
 

commit 823ecf52e243ded1472198525f6568d319b258d6
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Oct 30 10:13:53 2018 +0800

    clk: rockchip: rk3328: add clk_set_defaults for cru node
    
    Change-Id: I715dde89f691fd95487db53569cc6d8164dc5f28
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c
index fec75dbd5d..d16d914060 100644
--- a/drivers/clk/rockchip/clk_rk3328.c
+++ b/drivers/clk/rockchip/clk_rk3328.c
@@ -1146,9 +1146,14 @@ static void rkclk_init(struct rk3328_clk_priv *priv)
 static int rk3328_clk_probe(struct udevice *dev)
 {
 	struct rk3328_clk_priv *priv = dev_get_priv(dev);
+	int ret = 0;
 
 	rkclk_init(priv);
 
+	ret = clk_set_defaults(dev);
+	if (ret)
+		debug("%s clk_set_defaults failed %d\n", __func__, ret);
+
 	return 0;
 }
 

commit 50aff7d28a6634483bed0f2206157aac6d56a87d
Author: William Wu <william.wu@rock-chips.com>
Date:   Mon Oct 29 15:18:55 2018 +0800

    rockchip: dts: rk1808: enable usb
    
    Change-Id: Ie0d4862c1ea835357c1e2adecab2d813c6240a66
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/arch/arm/dts/rk1808-u-boot.dtsi b/arch/arm/dts/rk1808-u-boot.dtsi
index d6bfe24d36..ee258ff182 100644
--- a/arch/arm/dts/rk1808-u-boot.dtsi
+++ b/arch/arm/dts/rk1808-u-boot.dtsi
@@ -87,3 +87,43 @@
 &uart7 {
 	u-boot,dm-pre-reloc;
 };
+
+&u2phy {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&usb2phy_grf {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&u2phy_host {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&u2phy_otg {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&usb_host0_ehci {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&usb_host0_ohci {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&usbdrd3 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&usbdrd_dwc3 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};

commit 460677440cba1cb616232ae4febd9c3cac72a879
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Oct 31 14:48:58 2018 +0800

    rockchip: rk322x: update mmc base in boot info
    
    Correct sdmmc and emmc base addr for rk322x.
    
    Change-Id: I1a05fa5a477924c2ae829e7094f81766db41e95c
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk322x/rk322x.c b/arch/arm/mach-rockchip/rk322x/rk322x.c
index 252fdae86b..57a3d59a44 100644
--- a/arch/arm/mach-rockchip/rk322x/rk322x.c
+++ b/arch/arm/mach-rockchip/rk322x/rk322x.c
@@ -13,8 +13,8 @@
 #define SGRF_DDR_CON0	0x10150000
 
 const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
-	[BROM_BOOTSOURCE_EMMC] = "/sdhci@fe330000",
-	[BROM_BOOTSOURCE_SD] = "/dwmmc@fe320000",
+	[BROM_BOOTSOURCE_EMMC] = "/dwmmc@30020000",
+	[BROM_BOOTSOURCE_SD] = "/dwmmc@30000000",
 };
 
 int arch_cpu_init(void)

commit bbf5ac4250981e60e89bb73d9c24e39845b619e5
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Oct 31 14:46:25 2018 +0800

    rockchip: fit_spl_optee: update U-Boot text base
    
    This is a fix to:
    50f3250a1d rockchip: rk322x: adjust U-Boot text base and init sp
    
    Change-Id: I52ef77a3b086c26169b23756a4738723deddc19c
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/fit_spl_optee.its b/arch/arm/mach-rockchip/fit_spl_optee.its
index 3aeecb8ec5..e07a5394db 100644
--- a/arch/arm/mach-rockchip/fit_spl_optee.its
+++ b/arch/arm/mach-rockchip/fit_spl_optee.its
@@ -18,7 +18,7 @@
 			os = "U-Boot";
 			arch = "arm";
 			compression = "none";
-			load = <0x61000000>;
+			load = <0x60200000>;
 		};
 		optee@1 {
 			description = "OP-TEE";

commit 41410fa39a034c3b62b568f89ee12f7b26efd692
Author: Wang Panzhenzhuan <randy.wang@rock-chips.com>
Date:   Fri Oct 26 09:54:25 2018 +0800

    rockchip: rk3126c : modify arch_cpu_init()
    
    raise rk3126c cif-qos
    
    Change-Id: Ib16b6a951961a0d46bb2af5196e68182f9a22484
    Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3128/rk3128.c b/arch/arm/mach-rockchip/rk3128/rk3128.c
index 56c36af60c..30b21e7d91 100644
--- a/arch/arm/mach-rockchip/rk3128/rk3128.c
+++ b/arch/arm/mach-rockchip/rk3128/rk3128.c
@@ -15,6 +15,7 @@
 #define	CPU_AXI_QOS_PRIORITY_BASE	0x1012f188
 #define CPU_AXI_QOS_PRIORITY_LEVEL(h, l) \
 	((((h) & 3) << 8) | (((h) & 3) << 2) | ((l) & 3))
+#define	CPU_AXI_CIF_QOS_PRIORITY_BASE	0x1012f208
 
 int arch_cpu_init(void)
 {
@@ -35,6 +36,9 @@ int arch_cpu_init(void)
 	 * is an IC hardware issue.
 	 */
 	writel(0, SDMMC_INTMASK);
+
+	/* raise cif ddr qos priority */
+	writel(CPU_AXI_QOS_PRIORITY_LEVEL(3, 3), CPU_AXI_CIF_QOS_PRIORITY_BASE);
 #endif
 
 	return 0;

commit 6096696b6d1464512bf271d71f4fc4e979ae978d
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Mon Oct 29 11:57:30 2018 +0800

    rkflash: drivers: rkflash_debug code is adjusted to use block desc
    standard api
    
    Change-Id: I47d6fc0f0a4e660d0fa88cd72dcf2bffb8bb090c
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/rkflash_debug.c b/drivers/rkflash/rkflash_debug.c
index f30fdafb10..38c2842170 100644
--- a/drivers/rkflash/rkflash_debug.c
+++ b/drivers/rkflash/rkflash_debug.c
@@ -8,6 +8,7 @@
 
 #include "rkflash_debug.h"
 #include "rkflash_blk.h"
+#include "boot_rkimg.h"
 
 void rkflash_print_hex(char *s, void *buf, u32 width, u32 len)
 {
@@ -42,20 +43,24 @@ static u8 pread[max_test_sector * 512];
 static u32 *pwrite32;
 void blk_stress_test(struct udevice *udev)
 {
-	struct blk_desc *block_dev = dev_get_uclass_platdata(udev);
-	struct rkflash_info *priv = dev_get_priv(udev->parent);
+	struct blk_desc *block_dev = rockchip_get_bootdev();
 	u16 i, j, loop = 0;
 	u32 test_end_lba;
-	u32 test_lba = 0;
+	u32 test_lba;
 	u16 test_sec_count = 1;
 	u16 print_flag;
 
-	if (!priv || !block_dev) {
+	if (!block_dev) {
 		printf("device unknown\n");
 		return;
 	}
 
-	test_end_lba = priv->density;
+	if (block_dev->if_type == IF_TYPE_SPINOR)
+		test_lba = 0x800;
+	else
+		test_lba = 0;
+
+	test_end_lba = block_dev->lba;
 	pwrite32 = (u32 *)pwrite;
 	for (i = 0; i < (max_test_sector * 512); i++)
 		pwrite[i] = i;
@@ -65,8 +70,7 @@ void blk_stress_test(struct udevice *udev)
 		test_sec_count = 1;
 		printf("test_end_lba = %x\n", test_end_lba);
 		printf("test_lba = %x\n", test_lba);
-		for (test_lba = 0;
-		     (test_lba + test_sec_count) < test_end_lba;) {
+		for (; (test_lba + test_sec_count) < test_end_lba;) {
 			pwrite32[0] = test_lba;
 			blk_dwrite(block_dev, test_lba, test_sec_count, pwrite);
 			blk_dread(block_dev, test_lba, test_sec_count, pread);
@@ -101,8 +105,7 @@ void blk_stress_test(struct udevice *udev)
 		printf("---------Test ftl check---------\n");
 
 		test_sec_count = 1;
-		for (test_lba = 0;
-		     (test_lba + test_sec_count) < test_end_lba;) {
+		for (; (test_lba + test_sec_count) < test_end_lba;) {
 			pwrite32[0] = test_lba;
 			blk_dread(block_dev, test_lba, test_sec_count, pread);
 			print_flag = test_lba & 0x7FF;

commit 314d8b77cf1236e2acf50827ecbc59a0af6aeaec
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Mon Oct 29 11:29:57 2018 +0800

    rkflash: drivers: add misoeration protection for idblock upgrading
    
    1.when upgrading not start at NAND_IDB_START, do nothing
    
    Change-Id: Ie0c46c41676adec2f87e43c543ef049bda64c3bf
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/rk_sftl_arm_v7.S b/drivers/rkflash/rk_sftl_arm_v7.S
index a63d3b0c17..80bc31450f 100644
--- a/drivers/rkflash/rk_sftl_arm_v7.S
+++ b/drivers/rkflash/rk_sftl_arm_v7.S
@@ -2,7 +2,7 @@
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:    GPL-2.0
- * date: 2018-10-12
+ * date: 2018-10-29
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -13763,37 +13763,37 @@ sftl_write:
 	@ args = 0, pretend = 0, frame = 128
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	adds	r4, r0, r1
-	subs	r5, r4, #1
+	adds	r7, r0, r1
+	add	r8, r7, #-1
 	sub	sp, sp, #136
-	cmp	r5, #63
+	cmp	r8, #63
 	mov	fp, r0
 	str	r1, [sp, #24]
 	str	r2, [sp, #44]
+	ldr	r4, .L1871
 	bls	.L1827
 	cmp	r0, #576
-	bls	.L1828
+	bcc	.L1828
 .L1827:
-	ldr	r3, .L1869
-	ldr	r3, [r3]
-	cbz	r3, .L1829
-	ldr	r3, .L1869+4
+	ldr	r3, [r4]
+	cbz	r3, .L1830
+	ldr	r3, .L1871+4
 	ldr	r10, [r3]
-	ldr	r3, .L1869+8
+	ldr	r3, .L1871+8
 	ldr	r2, [r10]
 	cmp	r2, r3
-	beq	.L1830
-.L1847:
-	ldr	r3, .L1869
+	beq	.L1831
+.L1848:
+	ldr	r3, .L1871
 	movs	r2, #0
 	str	r2, [r3]
-	ldr	r3, .L1869+4
+	ldr	r3, .L1871+4
 	ldr	r0, [r3]
 	bl	free
-	ldr	r3, .L1869+12
+	ldr	r3, .L1871+12
 	ldr	r0, [r3]
 	bl	free
-.L1829:
+.L1830:
 	ldr	r3, [sp, #44]
 	mov	r1, fp
 	ldr	r2, [sp, #24]
@@ -13802,16 +13802,16 @@ sftl_write:
 	add	sp, sp, #136
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1830:
-	ldr	r3, .L1869+16
+.L1831:
+	ldr	r3, .L1871+16
 	add	r0, r10, #262144
 	movw	r2, #65535
 	ldrh	r4, [r3, #14]
 	ldrh	r5, [r3, #10]
 	movs	r3, #0
-.L1834:
+.L1835:
 	ldr	r1, [r0, #-4]
-	cbnz	r1, .L1831
+	cbnz	r1, .L1832
 	ldr	r1, [r10, r3, lsl #2]
 	adds	r3, r3, #1
 	cmp	r3, #4096
@@ -13820,22 +13820,22 @@ sftl_write:
 	movhi	r3, #0
 	cmp	r2, #4096
 	str	r1, [r0, #-4]!
-	bne	.L1834
+	bne	.L1835
 	mov	r3, #512
 	str	r3, [sp, #12]
-	b	.L1833
-.L1831:
+	b	.L1834
+.L1832:
 	add	r3, r2, #127
-	ldr	r0, .L1869+20
+	ldr	r0, .L1871+20
 	lsrs	r3, r3, #7
 	str	r3, [sp, #12]
 	bl	printf
-.L1833:
+.L1834:
 	uxtb	r4, r4
 	mov	r8, #0
 	smulbb	r5, r4, r5
 	uxth	r3, r5
-	ldr	r5, .L1869+24
+	ldr	r5, .L1871+24
 	str	r3, [sp, #16]
 	subs	r0, r3, #1
 	mov	r1, r3
@@ -13852,23 +13852,23 @@ sftl_write:
 	ldr	r3, [sp, #12]
 	lsls	r3, r3, #7
 	str	r3, [sp, #56]
-	b	.L1846
-.L1854:
+	b	.L1847
+.L1856:
 	str	r3, [sp, #40]
-.L1846:
-	ldr	r3, .L1869+12
+.L1847:
+	ldr	r3, .L1871+12
 	mov	r2, #512
 	movs	r1, #0
 	ldr	r0, [r3]
 	bl	memset
-	ldr	r3, .L1869+16
+	ldr	r3, .L1871+16
 	mov	r0, r8
 	ldrh	r7, [r3, #14]
 	mov	r1, r7
 	uxtb	r6, r7
 	uxth	r3, r6
 	str	r3, [sp, #36]
-	ldr	r3, .L1869+16
+	ldr	r3, .L1871+16
 	ldrh	r4, [r3, #10]
 	ldrh	r3, [sp, #36]
 	smulbb	r4, r4, r3
@@ -13880,7 +13880,7 @@ sftl_write:
 	blx	r3
 	ldr	r3, [sp, #28]
 	cmp	r3, r4
-	bls	.L1835
+	bls	.L1836
 	mov	r1, r7
 	add	r0, r4, r8
 	bl	__aeabi_uidiv
@@ -13888,7 +13888,7 @@ sftl_write:
 	mov	r1, r0
 	movs	r0, #0
 	blx	r3
-.L1835:
+.L1836:
 	mov	r1, r4
 	mov	r0, r8
 	movs	r4, #0
@@ -13896,20 +13896,20 @@ sftl_write:
 	sub	r3, r8, r1
 	str	r1, [sp, #48]
 	str	r3, [sp, #52]
-.L1836:
+.L1837:
 	ldr	r3, [sp, #28]
 	cmp	r3, r4
-	bhi	.L1837
-	ldr	r3, .L1869+12
+	bhi	.L1838
+	ldr	r3, .L1871+12
 	mov	r0, r8
 	movs	r4, #0
 	ldr	r3, [r3]
 	str	r3, [sp, #52]
-	ldr	r3, .L1869+16
+	ldr	r3, .L1871+16
 	ldrb	r7, [r3, #14]	@ zero_extendqisi2
 	uxth	r3, r7
 	str	r3, [sp, #48]
-	ldr	r3, .L1869+16
+	ldr	r3, .L1871+16
 	ldrh	r1, [r3, #10]
 	ldrh	r3, [sp, #48]
 	smulbb	r1, r1, r3
@@ -13922,10 +13922,10 @@ sftl_write:
 	str	r3, [sp, #60]
 	bl	__aeabi_idivmod
 	uxth	r6, r1
-.L1838:
+.L1839:
 	ldr	r3, [sp, #12]
 	cmp	r4, r3
-	bcs	.L1842
+	bcs	.L1843
 	ldr	r3, [sp, #48]
 	mov	r1, r7
 	subs	r3, r3, r6
@@ -13950,26 +13950,26 @@ sftl_write:
 	movs	r0, #0
 	blx	r6
 	adds	r0, r0, #1
-	bne	.L1839
-.L1842:
-	ldr	r3, .L1869+12
+	bne	.L1840
+.L1843:
+	ldr	r3, .L1871+12
 	mov	r1, r10
 	movs	r4, #0
 	ldr	r0, [r3]
-.L1840:
+.L1841:
 	mov	r7, r1
 	ldr	r2, [r0, r4, lsl #2]
 	ldr	r3, [r7]
 	lsls	r6, r4, #2
 	adds	r1, r1, #4
 	cmp	r2, r3
-	beq	.L1843
+	beq	.L1844
 	mov	r2, #512
 	movs	r1, #0
 	bl	memset
-	ldr	r3, .L1869+12
+	ldr	r3, .L1871+12
 	mov	r1, r8
-	ldr	r0, .L1869+28
+	ldr	r0, .L1871+28
 	ldr	r2, [r3]
 	str	r4, [sp]
 	ldr	r3, [r7]
@@ -13981,13 +13981,13 @@ sftl_write:
 	blx	r3
 	ldr	r3, [sp, #20]
 	cmp	r3, #1
-	bls	.L1853
+	bls	.L1855
 	ldr	r2, [sp, #16]
 	movs	r0, #0
 	ldr	r3, [r5, #4]
 	add	r1, r2, r8
 	blx	r3
-.L1853:
+.L1855:
 	ldr	r2, [sp, #40]
 	ldr	r3, [sp, #20]
 	add	r3, r3, r2
@@ -13995,9 +13995,9 @@ sftl_write:
 	add	r8, r8, r2
 	ldr	r2, [sp, #40]
 	cmp	r2, #15
-	bls	.L1854
-	b	.L1847
-.L1837:
+	bls	.L1856
+	b	.L1848
+.L1838:
 	ldr	r3, [sp, #48]
 	mov	r1, r6
 	adds	r0, r3, r4
@@ -14022,89 +14022,103 @@ sftl_write:
 	ldr	r3, [sp, #36]
 	add	r4, r4, r3
 	uxth	r4, r4
-	b	.L1836
-.L1839:
+	b	.L1837
+.L1840:
 	ldr	r3, [sp, #64]
 	movs	r6, #0
 	add	r3, r3, r4
 	uxth	r4, r3
-	b	.L1838
-.L1843:
+	b	.L1839
+.L1844:
 	ldr	r3, [sp, #56]
 	adds	r4, r4, #1
 	cmp	r4, r3
-	bne	.L1840
+	bne	.L1841
 	ldr	r3, [sp, #32]
 	adds	r3, r3, #1
 	cmp	r3, #5
 	str	r3, [sp, #32]
-	bls	.L1853
-	b	.L1847
+	bls	.L1855
+	b	.L1848
+.L1872:
+	.align	2
+.L1871:
+	.word	.LANCHOR184
+	.word	.LANCHOR185
+	.word	-52655045
+	.word	.LANCHOR186
+	.word	.LANCHOR0
+	.word	.LC114
+	.word	.LANCHOR105
+	.word	.LC115
 .L1828:
 	cmp	r0, #64
-	ldr	r6, .L1869+4
-	bne	.L1848
+	bne	.L1849
+	ldr	r5, .L1873
 	mov	r0, #262144
 	bl	ftl_malloc
-	str	r0, [r6]
+	str	r0, [r5]
 	mov	r0, #262144
 	bl	ftl_malloc
-	ldr	r3, .L1869+12
+	ldr	r3, .L1873+4
 	str	r0, [r3]
-	ldr	r3, [r6]
-	cbz	r3, .L1849
-	cbz	r0, .L1849
-	ldr	r2, .L1869
-	movs	r1, #1
+	ldr	r3, [r5]
+	cbz	r3, .L1850
+	cbz	r0, .L1850
+	movs	r2, #1
+	movs	r1, #0
+	str	r2, [r4]
 	mov	r0, r3
-	str	r1, [r2]
 	mov	r2, #262144
-	movs	r1, #0
 	bl	ftl_memset
-.L1848:
+.L1849:
+	ldr	r3, [r4]
+	cmp	r3, #0
+	beq	.L1830
+	ldr	r3, .L1873
 	cmp	fp, #63
-	ldr	r0, [r6]
-	bhi	.L1850
+	ldr	r1, [r3]
+	bhi	.L1852
 	ldr	r3, [sp, #24]
-	rsb	r1, fp, #64
-	subs	r2, r3, r1
+	rsb	r5, fp, #64
+	mov	r4, r1
+	subs	r6, r3, r5
 	ldr	r3, [sp, #44]
-	add	r1, r3, r1, lsl #9
-.L1851:
-	cmp	r5, #576
-	ittt	hi
-	subhi	r2, r2, r4
-	mvnhi	r3, #446
-	addhi	r2, r2, r3
-	lsls	r2, r2, #9
+	add	r5, r3, r5, lsl #9
+.L1853:
+	cmp	r8, #576
+	ldr	r0, .L1873+8
+	it	cs
+	subcs	r6, r6, r7
+	mov	r3, r4
+	it	cs
+	subcs	r6, r6, #446
+	mov	r2, #262144
+	str	r6, [sp]
+	bl	printf
+	lsls	r2, r6, #9
+	mov	r1, r5
+	mov	r0, r4
 	bl	ftl_memcpy
-	b	.L1829
-.L1870:
+	b	.L1830
+.L1850:
+	ldr	r1, .L1873+12
+	ldr	r0, .L1873+16
+	bl	printf
+	b	.L1849
+.L1852:
+	ldr	r4, .L1873+20
+	ldr	r5, [sp, #44]
+	ldr	r6, [sp, #24]
+	add	r4, r4, fp
+	add	r4, r1, r4, lsl #9
+	b	.L1853
+.L1874:
 	.align	2
-.L1869:
-	.word	.LANCHOR184
+.L1873:
 	.word	.LANCHOR185
-	.word	-52655045
 	.word	.LANCHOR186
-	.word	.LANCHOR0
-	.word	.LC114
-	.word	.LANCHOR105
-	.word	.LC115
-.L1849:
-	ldr	r1, .L1871
-	ldr	r0, .L1871+4
-	bl	printf
-	b	.L1848
-.L1850:
-	ldr	r3, .L1871+8
-	ldr	r1, [sp, #44]
-	ldr	r2, [sp, #24]
-	add	r3, r3, fp
-	add	r0, r0, r3, lsl #9
-	b	.L1851
-.L1872:
-	.align	2
-.L1871:
+	.word	.LC117
 	.word	.LANCHOR187
 	.word	.LC116
 	.word	8388544
@@ -14122,61 +14136,61 @@ FtlMakeBbt:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r6, #0
-	ldr	r7, .L1892
+	ldr	r7, .L1894
 	bl	FtlBbtMemInit
 	sub	r8, r7, #18
 	bl	FtlLoadFactoryBbt
-.L1874:
-	ldr	r3, .L1892+4
+.L1876:
+	ldr	r3, .L1894+4
 	ldrh	r3, [r3]
 	cmp	r6, r3
-	bcc	.L1880
-	ldr	r5, .L1892+8
+	bcc	.L1882
+	ldr	r5, .L1894+8
 	movs	r4, #0
-.L1881:
+.L1883:
 	ldrh	r3, [r5]
 	uxth	r0, r4
 	adds	r4, r4, #1
 	cmp	r3, r0
-	bhi	.L1882
-	ldr	r4, .L1892+12
+	bhi	.L1884
+	ldr	r4, .L1894+12
 	movw	r6, #65535
 	ldrh	r5, [r4, #12]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L1883:
+.L1885:
 	ldrh	r3, [r4, #12]
 	subs	r3, r3, #47
 	cmp	r3, r5
-	bgt	.L1887
+	bgt	.L1889
 	mov	r0, r5
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L1884
+	beq	.L1886
 	mov	r0, r5
 	bl	FlashTestBlk
 	cmp	r0, #0
-	beq	.L1885
+	beq	.L1887
 	mov	r0, r5
 	bl	FtlBbmMapBadBlock
-.L1884:
+.L1886:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L1883
-.L1880:
-	ldr	r3, .L1892+16
-	ldr	r5, .L1892+20
+	b	.L1885
+.L1882:
+	ldr	r3, .L1894+16
+	ldr	r5, .L1894+20
 	ldrh	r2, [r8, #2]!
-	ldr	r4, .L1892+24
+	ldr	r4, .L1894+24
 	ldr	r0, [r3]
 	movw	r3, #65535
 	ldr	r10, [r5]
 	cmp	r2, r3
 	mov	fp, r4
-	ldr	r3, .L1892+28
+	ldr	r3, .L1894+28
 	str	r0, [r4, #8]
 	str	r10, [r4, #12]
-	beq	.L1875
+	beq	.L1877
 	ldrh	r5, [r3]
 	mov	r0, r4
 	str	r3, [sp]
@@ -14193,13 +14207,13 @@ FtlMakeBbt:
 	adds	r2, r2, #7
 	asrs	r2, r2, #3
 	bl	ftl_memcpy
-.L1876:
+.L1878:
 	uxth	r0, r5
 	adds	r6, r6, #1
 	adds	r7, r7, #4
 	bl	FtlBbmMapBadBlock
-	b	.L1874
-.L1875:
+	b	.L1876
+.L1877:
 	mov	r1, r6
 	str	r3, [sp]
 	bl	FlashGetBadBlockList
@@ -14211,21 +14225,21 @@ FtlMakeBbt:
 	ldrh	r4, [r3]
 	subs	r4, r4, #1
 	uxth	r4, r4
-.L1877:
+.L1879:
 	ldr	r3, [sp]
 	ldrh	r0, [r3]
 	smlabb	r0, r0, r6, r4
 	uxth	r0, r0
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L1878
+	beq	.L1880
 	ldr	r3, [sp, #4]
 	movs	r2, #16
 	movs	r1, #0
 	strh	r4, [r8]	@ movhi
 	ldr	r0, [r3]
 	bl	ftl_memset
-	ldr	r3, .L1892+16
+	ldr	r3, .L1894+16
 	mov	r2, #4096
 	movs	r1, #0
 	ldr	r0, [r3]
@@ -14243,42 +14257,42 @@ FtlMakeBbt:
 	mla	r5, r6, r5, r3
 	lsls	r3, r5, #10
 	str	r3, [fp, #4]
-	ldr	r3, .L1892+32
+	ldr	r3, .L1894+32
 	ldrh	r2, [r3]
 	lsls	r2, r2, #2
 	bl	ftl_memcpy
 	movs	r2, #1
-	ldr	r0, .L1892+24
+	ldr	r0, .L1894+24
 	mov	r1, r2
 	bl	FlashEraseBlocks
 	movs	r3, #1
-	ldr	r0, .L1892+24
+	ldr	r0, .L1894+24
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
 	ldr	r3, [fp]
 	adds	r3, r3, #1
-	bne	.L1876
+	bne	.L1878
 	uxth	r0, r5
 	bl	FtlBbmMapBadBlock
-	b	.L1877
-.L1878:
+	b	.L1879
+.L1880:
 	subs	r4, r4, #1
 	uxth	r4, r4
-	b	.L1877
-.L1882:
+	b	.L1879
+.L1884:
 	bl	FtlBbmMapBadBlock
-	b	.L1881
-.L1885:
+	b	.L1883
+.L1887:
 	ldrh	r3, [r4]
 	cmp	r3, r6
-	bne	.L1886
+	bne	.L1888
 	strh	r5, [r4]	@ movhi
-	b	.L1884
-.L1886:
+	b	.L1886
+.L1888:
 	strh	r5, [r4, #4]	@ movhi
-.L1887:
-	ldr	r3, .L1892+36
+.L1889:
+	ldr	r3, .L1894+36
 	movs	r5, #0
 	str	r5, [r4, #8]
 	movs	r1, #1
@@ -14310,9 +14324,9 @@ FtlMakeBbt:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1893:
+.L1895:
 	.align	2
-.L1892:
+.L1894:
 	.word	.LANCHOR37+28
 	.word	.LANCHOR10
 	.word	.LANCHOR25
@@ -14337,62 +14351,62 @@ ftl_low_format:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #0
-	ldr	r6, .L1918
-	ldr	r2, .L1918+4
-	ldr	r5, .L1918+8
+	ldr	r6, .L1920
+	ldr	r2, .L1920+4
+	ldr	r5, .L1920+8
 	ldrh	r0, [r6]
 	str	r3, [r2]
 	str	r3, [r5]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	r0, .L1895
+	cbz	r0, .L1897
 	bl	FtlMakeBbt
-.L1895:
-	ldr	r3, .L1918+12
-	ldr	r2, .L1918+16
-	ldr	ip, .L1918+100
+.L1897:
+	ldr	r3, .L1920+12
+	ldr	r2, .L1920+16
+	ldr	ip, .L1920+100
 	ldrh	r1, [r3]
 	ldr	r4, [r2]
-	ldr	r2, .L1918+20
+	ldr	r2, .L1920+20
 	str	r3, [sp, #4]
 	lsls	r1, r1, #7
 	ldr	r7, [r2]
 	movs	r2, #0
-.L1896:
+.L1898:
 	uxth	r3, r2
 	adds	r2, r2, #1
 	cmp	r3, r1
-	blt	.L1897
-	ldr	r3, .L1918+24
+	blt	.L1899
+	ldr	r3, .L1920+24
 	movs	r7, #0
-	ldr	r10, .L1918+104
+	ldr	r10, .L1920+104
 	ldrh	r4, [r3]
 	mov	r8, r3
 	mov	fp, r10
-.L1898:
+.L1900:
 	ldrh	r3, [r10]
 	cmp	r3, r4
-	bhi	.L1899
-	ldr	r4, .L1918+28
+	bhi	.L1901
+	ldr	r4, .L1920+28
 	subs	r3, r7, #2
 	ldrh	r1, [r4]
 	cmp	r3, r1, lsl #1
-	bgt	.L1900
-.L1904:
+	bgt	.L1902
+.L1906:
 	movs	r6, #0
 	mov	r7, r6
-.L1901:
+.L1903:
 	ldrh	r3, [r8]
 	uxth	r0, r6
 	adds	r6, r6, #1
 	cmp	r3, r0
-	bhi	.L1905
+	bhi	.L1907
 	ldrh	r2, [fp]
-	ldr	r3, .L1918+32
+	ldr	r3, .L1920+32
 	ldrh	r4, [r4]
-	ldr	r6, .L1918+36
+	ldr	r6, .L1920+36
 	str	r2, [r3]
-	ldr	r3, .L1918+40
+	ldr	r3, .L1920+40
 	mov	r1, r4
 	ldr	r2, [r3]
 	mov	r0, r2
@@ -14402,13 +14416,13 @@ ftl_low_format:
 	mov	r3, r0
 	str	r0, [r6]
 	add	r1, r10, #36
-	ldr	r0, .L1918+44
+	ldr	r0, .L1920+44
 	strh	r1, [r0]	@ movhi
 	movs	r1, #24
 	muls	r1, r4, r1
 	str	r0, [sp]
 	cmp	r7, r1
-	ble	.L1906
+	ble	.L1908
 	ldr	r2, [sp, #12]
 	mov	r1, r4
 	str	r3, [sp, #8]
@@ -14420,11 +14434,11 @@ ftl_low_format:
 	adds	r0, r0, #24
 	strh	r0, [r3]	@ movhi
 	ldr	r3, [sp, #8]
-.L1906:
-	ldr	r2, .L1918+48
+.L1908:
+	ldr	r2, .L1920+48
 	ldrh	r2, [r2]
-	cbz	r2, .L1908
-	ldr	r1, .L1918+44
+	cbz	r2, .L1910
+	ldr	r1, .L1920+44
 	ldrh	r0, [r1]
 	add	r0, r0, r2, lsr #1
 	strh	r0, [r1]	@ movhi
@@ -14435,24 +14449,24 @@ ftl_low_format:
 	strlt	r3, [r6]
 	addlt	r2, r2, r10
 	strhlt	r2, [r1]	@ movhi
-.L1908:
+.L1910:
 	ldr	r3, [sp]
-	ldr	r7, .L1918+52
-	ldr	r10, .L1918+108
+	ldr	r7, .L1920+52
+	ldr	r10, .L1920+108
 	ldrh	r2, [r3]
 	ldr	r3, [r6]
 	subs	r3, r3, r2
 	muls	r4, r3, r4
-	ldr	r3, .L1918+56
+	ldr	r3, .L1920+56
 	ldrh	r3, [r3]
 	str	r4, [r7]
 	muls	r4, r3, r4
 	ldr	r3, [sp, #4]
 	ldrh	r3, [r3]
 	str	r4, [r6]
-	ldr	r6, .L1918+60
+	ldr	r6, .L1920+60
 	muls	r4, r3, r4
-	ldr	r3, .L1918+64
+	ldr	r3, .L1920+64
 	str	r4, [r3]
 	movw	r4, #65535
 	bl	FtlBbmTblFlush
@@ -14461,13 +14475,13 @@ ftl_low_format:
 	ldr	r0, [r10]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-	ldr	r2, .L1918+68
+	ldr	r2, .L1920+68
 	movs	r3, #0
 	strh	r3, [r6, #2]	@ movhi
 	movs	r1, #255
 	strb	r3, [r6, #6]
 	str	r3, [r2]
-	ldr	r2, .L1918+72
+	ldr	r2, .L1920+72
 	strh	r3, [r6]	@ movhi
 	strh	r3, [r2, #2]	@ movhi
 	strb	r3, [r2, #6]
@@ -14478,30 +14492,30 @@ ftl_low_format:
 	mov	r8, r10
 	strb	r3, [r6, #8]
 	mov	r10, r6
-	ldr	r3, .L1918+76
+	ldr	r3, .L1920+76
 	lsrs	r2, r2, #3
 	ldr	r0, [r3]
 	bl	ftl_memset
-.L1910:
+.L1912:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r6, #7]	@ zero_extendqisi2
 	ldrh	r2, [r6]
 	cmp	r3, #0
-	bne	.L1911
+	bne	.L1913
 	ldr	r3, [r8]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r6]
 	adds	r3, r3, #1
 	strh	r3, [r6]	@ movhi
-	b	.L1910
-.L1897:
+	b	.L1912
+.L1899:
 	mvns	r0, r3
 	orr	r0, r3, r0, lsl #16
 	str	r0, [r4, r3, lsl #2]
 	str	ip, [r7, r3, lsl #2]
-	b	.L1896
-.L1899:
+	b	.L1898
+.L1901:
 	mov	r0, r4
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
@@ -14509,11 +14523,11 @@ ftl_low_format:
 	add	r7, r7, r0
 	uxth	r7, r7
 	uxth	r4, r4
-	b	.L1898
-.L1900:
+	b	.L1900
+.L1902:
 	mov	r0, r7
 	bl	__aeabi_uidiv
-	ldr	r3, .L1918+80
+	ldr	r3, .L1920+80
 	ldr	r3, [r3]
 	add	r0, r0, r3
 	uxth	r0, r0
@@ -14521,26 +14535,26 @@ ftl_low_format:
 	ldrh	r0, [r6]
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	r6, [r8]
-.L1902:
+.L1904:
 	ldrh	r3, [fp]
 	cmp	r3, r6
-	bls	.L1904
+	bls	.L1906
 	mov	r0, r6
 	movs	r1, #1
 	adds	r6, r6, #1
 	bl	FtlLowFormatEraseBlock
 	uxth	r6, r6
-	b	.L1902
-.L1905:
+	b	.L1904
+.L1907:
 	movs	r1, #0
 	bl	FtlLowFormatEraseBlock
 	add	r7, r7, r0
 	uxth	r7, r7
-	b	.L1901
-.L1911:
+	b	.L1903
+.L1913:
 	ldr	r3, [r5]
 	ldrh	r1, [r6, #4]
-	ldr	r4, .L1918+84
+	ldr	r4, .L1920+84
 	str	r3, [r6, #12]
 	adds	r3, r3, #1
 	str	r3, [r5]
@@ -14556,19 +14570,19 @@ ftl_low_format:
 	strh	r3, [r4]	@ movhi
 	movs	r3, #1
 	strb	r3, [r4, #8]
-.L1912:
+.L1914:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r4]
-	cbnz	r3, .L1913
+	cbnz	r3, .L1915
 	ldr	r3, [r8]
 	strh	r6, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	b	.L1912
-.L1913:
+	b	.L1914
+.L1915:
 	ldr	r3, [r5]
 	ldrh	r1, [r4, #4]
 	str	r3, [r4, #12]
@@ -14577,10 +14591,10 @@ ftl_low_format:
 	movw	r4, #65535
 	ldr	r3, [r8]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L1918+88
+	ldr	r3, .L1920+88
 	strh	r4, [r3]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L1918+92
+	ldr	r3, .L1920+92
 	movs	r2, #0
 	strh	r2, [r3, #2]	@ movhi
 	ldr	r2, [r7]
@@ -14593,18 +14607,18 @@ ftl_low_format:
 	str	r2, [r5]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	r0, .L1914
-	ldr	r3, .L1918+96
+	cbnz	r0, .L1916
+	ldr	r3, .L1920+96
 	movs	r2, #1
 	str	r2, [r3]
-.L1914:
+.L1916:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1919:
+.L1921:
 	.align	2
-.L1918:
+.L1920:
 	.word	.LANCHOR4
 	.word	.LANCHOR71
 	.word	.LANCHOR70
@@ -16086,221 +16100,221 @@ power_up_flag:
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",%progbits,1
 .LC1:
 	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
-	.section	.rodata.__func__.10026,"a",%progbits
+	.section	.rodata.__func__.10034,"a",%progbits
 	.set	.LANCHOR176,. + 0
-	.type	__func__.10026, %object
-	.size	__func__.10026, 19
-__func__.10026:
+	.type	__func__.10034, %object
+	.size	__func__.10034, 19
+__func__.10034:
 	.ascii	"FtlGcFreeTempBlock\000"
-	.section	.rodata.__func__.10137,"a",%progbits
+	.section	.rodata.__func__.10145,"a",%progbits
 	.set	.LANCHOR180,. + 0
-	.type	__func__.10137, %object
-	.size	__func__.10137, 23
-__func__.10137:
+	.type	__func__.10145, %object
+	.size	__func__.10145, 23
+__func__.10145:
 	.ascii	"rk_ftl_garbage_collect\000"
-	.section	.rodata.__func__.10399,"a",%progbits
+	.section	.rodata.__func__.10407,"a",%progbits
 	.set	.LANCHOR147,. + 0
-	.type	__func__.10399, %object
-	.size	__func__.10399, 15
-__func__.10399:
+	.type	__func__.10407, %object
+	.size	__func__.10407, 15
+__func__.10407:
 	.ascii	"FlashReadPages\000"
-	.section	.rodata.__func__.10418,"a",%progbits
+	.section	.rodata.__func__.10426,"a",%progbits
 	.set	.LANCHOR153,. + 0
-	.type	__func__.10418, %object
-	.size	__func__.10418, 15
-__func__.10418:
+	.type	__func__.10426, %object
+	.size	__func__.10426, 15
+__func__.10426:
 	.ascii	"FlashProgPages\000"
-	.section	.rodata.__func__.10442,"a",%progbits
+	.section	.rodata.__func__.10450,"a",%progbits
 	.set	.LANCHOR104,. + 0
-	.type	__func__.10442, %object
-	.size	__func__.10442, 17
-__func__.10442:
+	.type	__func__.10450, %object
+	.size	__func__.10450, 17
+__func__.10450:
 	.ascii	"FlashEraseBlocks\000"
-	.section	.rodata.__func__.8806,"a",%progbits
+	.section	.rodata.__func__.8814,"a",%progbits
 	.set	.LANCHOR138,. + 0
-	.type	__func__.8806, %object
-	.size	__func__.8806, 11
-__func__.8806:
+	.type	__func__.8814, %object
+	.size	__func__.8814, 11
+__func__.8814:
 	.ascii	"FtlMemInit\000"
-	.section	.rodata.__func__.8930,"a",%progbits
+	.section	.rodata.__func__.8938,"a",%progbits
 	.set	.LANCHOR175,. + 0
-	.type	__func__.8930, %object
-	.size	__func__.8930, 13
-__func__.8930:
+	.type	__func__.8938, %object
+	.size	__func__.8938, 13
+__func__.8938:
 	.ascii	"FtlProgPages\000"
-	.section	.rodata.__func__.8958,"a",%progbits
+	.section	.rodata.__func__.8966,"a",%progbits
 	.set	.LANCHOR183,. + 0
-	.type	__func__.8958, %object
-	.size	__func__.8958, 9
-__func__.8958:
+	.type	__func__.8966, %object
+	.size	__func__.8966, 9
+__func__.8966:
 	.ascii	"FtlWrite\000"
-	.section	.rodata.__func__.9064,"a",%progbits
+	.section	.rodata.__func__.9072,"a",%progbits
 	.set	.LANCHOR187,. + 0
-	.type	__func__.9064, %object
-	.size	__func__.9064, 14
-__func__.9064:
+	.type	__func__.9072, %object
+	.size	__func__.9072, 14
+__func__.9072:
 	.ascii	"FtlWriteToIDB\000"
-	.section	.rodata.__func__.9105,"a",%progbits
+	.section	.rodata.__func__.9113,"a",%progbits
 	.set	.LANCHOR139,. + 0
-	.type	__func__.9105, %object
-	.size	__func__.9105, 14
-__func__.9105:
+	.type	__func__.9113, %object
+	.size	__func__.9113, 14
+__func__.9113:
 	.ascii	"FtlBbt2Bitmap\000"
-	.section	.rodata.__func__.9148,"a",%progbits
+	.section	.rodata.__func__.9156,"a",%progbits
 	.set	.LANCHOR150,. + 0
-	.type	__func__.9148, %object
-	.size	__func__.9148, 11
-__func__.9148:
+	.type	__func__.9156, %object
+	.size	__func__.9156, 11
+__func__.9156:
 	.ascii	"FtlLoadBbt\000"
-	.section	.rodata.__func__.9263,"a",%progbits
+	.section	.rodata.__func__.9271,"a",%progbits
 	.set	.LANCHOR49,. + 0
-	.type	__func__.9263, %object
-	.size	__func__.9263, 17
-__func__.9263:
+	.type	__func__.9271, %object
+	.size	__func__.9271, 17
+__func__.9271:
 	.ascii	"INSERT_FREE_LIST\000"
-	.section	.rodata.__func__.9268,"a",%progbits
+	.section	.rodata.__func__.9276,"a",%progbits
 	.set	.LANCHOR46,. + 0
-	.type	__func__.9268, %object
-	.size	__func__.9268, 17
-__func__.9268:
+	.type	__func__.9276, %object
+	.size	__func__.9276, 17
+__func__.9276:
 	.ascii	"INSERT_DATA_LIST\000"
-	.section	.rodata.__func__.9299,"a",%progbits
+	.section	.rodata.__func__.9307,"a",%progbits
 	.set	.LANCHOR50,. + 0
-	.type	__func__.9299, %object
-	.size	__func__.9299, 17
-__func__.9299:
+	.type	__func__.9307, %object
+	.size	__func__.9307, 17
+__func__.9307:
 	.ascii	"List_remove_node\000"
-	.section	.rodata.__func__.9331,"a",%progbits
+	.section	.rodata.__func__.9339,"a",%progbits
 	.set	.LANCHOR54,. + 0
-	.type	__func__.9331, %object
-	.size	__func__.9331, 22
-__func__.9331:
+	.type	__func__.9339, %object
+	.size	__func__.9339, 22
+__func__.9339:
 	.ascii	"List_update_data_list\000"
-	.section	.rodata.__func__.9340,"a",%progbits
+	.section	.rodata.__func__.9348,"a",%progbits
 	.set	.LANCHOR156,. + 0
-	.type	__func__.9340, %object
-	.size	__func__.9340, 16
-__func__.9340:
+	.type	__func__.9348, %object
+	.size	__func__.9348, 16
+__func__.9348:
 	.ascii	"load_l2p_region\000"
-	.section	.rodata.__func__.9373,"a",%progbits
+	.section	.rodata.__func__.9381,"a",%progbits
 	.set	.LANCHOR107,. + 0
-	.type	__func__.9373, %object
-	.size	__func__.9373, 26
-__func__.9373:
+	.type	__func__.9381, %object
+	.size	__func__.9381, 26
+__func__.9381:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.section	.rodata.__func__.9384,"a",%progbits
+	.section	.rodata.__func__.9392,"a",%progbits
 	.set	.LANCHOR157,. + 0
-	.type	__func__.9384, %object
-	.size	__func__.9384, 15
-__func__.9384:
+	.type	__func__.9392, %object
+	.size	__func__.9392, 15
+__func__.9392:
 	.ascii	"ftl_map_blk_gc\000"
-	.section	.rodata.__func__.9399,"a",%progbits
+	.section	.rodata.__func__.9407,"a",%progbits
 	.set	.LANCHOR154,. + 0
-	.type	__func__.9399, %object
-	.size	__func__.9399, 31
-__func__.9399:
+	.type	__func__.9407, %object
+	.size	__func__.9407, 31
+__func__.9407:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.section	.rodata.__func__.9413,"a",%progbits
+	.section	.rodata.__func__.9421,"a",%progbits
 	.set	.LANCHOR155,. + 0
-	.type	__func__.9413, %object
-	.size	__func__.9413, 16
-__func__.9413:
+	.type	__func__.9421, %object
+	.size	__func__.9421, 16
+__func__.9421:
 	.ascii	"FtlMapWritePage\000"
-	.section	.rodata.__func__.9438,"a",%progbits
+	.section	.rodata.__func__.9446,"a",%progbits
 	.set	.LANCHOR57,. + 0
-	.type	__func__.9438, %object
-	.size	__func__.9438, 22
-__func__.9438:
+	.type	__func__.9446, %object
+	.size	__func__.9446, 22
+__func__.9446:
 	.ascii	"select_l2p_ram_region\000"
-	.section	.rodata.__func__.9455,"a",%progbits
+	.section	.rodata.__func__.9463,"a",%progbits
 	.set	.LANCHOR159,. + 0
-	.type	__func__.9455, %object
-	.size	__func__.9455, 9
-__func__.9455:
+	.type	__func__.9463, %object
+	.size	__func__.9463, 9
+__func__.9463:
 	.ascii	"log2phys\000"
-	.section	.rodata.__func__.9528,"a",%progbits
+	.section	.rodata.__func__.9536,"a",%progbits
 	.set	.LANCHOR171,. + 0
-	.type	__func__.9528, %object
-	.size	__func__.9528, 15
-__func__.9528:
+	.type	__func__.9536, %object
+	.size	__func__.9536, 15
+__func__.9536:
 	.ascii	"FtlVpcTblFlush\000"
-	.section	.rodata.__func__.9550,"a",%progbits
+	.section	.rodata.__func__.9558,"a",%progbits
 	.set	.LANCHOR149,. + 0
-	.type	__func__.9550, %object
-	.size	__func__.9550, 14
-__func__.9550:
+	.type	__func__.9558, %object
+	.size	__func__.9558, 14
+__func__.9558:
 	.ascii	"FtlScanSysBlk\000"
-	.section	.rodata.__func__.9607,"a",%progbits
+	.section	.rodata.__func__.9615,"a",%progbits
 	.set	.LANCHOR151,. + 0
-	.type	__func__.9607, %object
-	.size	__func__.9607, 15
-__func__.9607:
+	.type	__func__.9615, %object
+	.size	__func__.9615, 15
+__func__.9615:
 	.ascii	"FtlLoadSysInfo\000"
-	.section	.rodata.__func__.9670,"a",%progbits
+	.section	.rodata.__func__.9678,"a",%progbits
 	.set	.LANCHOR160,. + 0
-	.type	__func__.9670, %object
-	.size	__func__.9670, 16
-__func__.9670:
+	.type	__func__.9678, %object
+	.size	__func__.9678, 16
+__func__.9678:
 	.ascii	"FtlReUsePrevPpa\000"
-	.section	.rodata.__func__.9704,"a",%progbits
+	.section	.rodata.__func__.9712,"a",%progbits
 	.set	.LANCHOR166,. + 0
-	.type	__func__.9704, %object
-	.size	__func__.9704, 22
-__func__.9704:
+	.type	__func__.9712, %object
+	.size	__func__.9712, 22
+__func__.9712:
 	.ascii	"FtlRecoverySuperblock\000"
-	.section	.rodata.__func__.9761,"a",%progbits
+	.section	.rodata.__func__.9769,"a",%progbits
 	.set	.LANCHOR60,. + 0
-	.type	__func__.9761, %object
-	.size	__func__.9761, 16
-__func__.9761:
+	.type	__func__.9769, %object
+	.size	__func__.9769, 16
+__func__.9769:
 	.ascii	"make_superblock\000"
-	.section	.rodata.__func__.9782,"a",%progbits
+	.section	.rodata.__func__.9790,"a",%progbits
 	.set	.LANCHOR146,. + 0
-	.type	__func__.9782, %object
-	.size	__func__.9782, 18
-__func__.9782:
+	.type	__func__.9790, %object
+	.size	__func__.9790, 18
+__func__.9790:
 	.ascii	"SupperBlkListInit\000"
-	.section	.rodata.__func__.9807,"a",%progbits
+	.section	.rodata.__func__.9815,"a",%progbits
 	.set	.LANCHOR173,. + 0
-	.type	__func__.9807, %object
-	.size	__func__.9807, 21
-__func__.9807:
+	.type	__func__.9815, %object
+	.size	__func__.9815, 21
+__func__.9815:
 	.ascii	"FtlVpcCheckAndModify\000"
-	.section	.rodata.__func__.9823,"a",%progbits
+	.section	.rodata.__func__.9831,"a",%progbits
 	.set	.LANCHOR161,. + 0
-	.type	__func__.9823, %object
-	.size	__func__.9823, 14
-__func__.9823:
+	.type	__func__.9831, %object
+	.size	__func__.9831, 14
+__func__.9831:
 	.ascii	"ftl_check_vpc\000"
-	.section	.rodata.__func__.9908,"a",%progbits
+	.section	.rodata.__func__.9916,"a",%progbits
 	.set	.LANCHOR163,. + 0
-	.type	__func__.9908, %object
-	.size	__func__.9908, 25
-__func__.9908:
+	.type	__func__.9916, %object
+	.size	__func__.9916, 25
+__func__.9916:
 	.ascii	"allocate_data_superblock\000"
-	.section	.rodata.__func__.9929,"a",%progbits
+	.section	.rodata.__func__.9937,"a",%progbits
 	.set	.LANCHOR174,. + 0
-	.type	__func__.9929, %object
-	.size	__func__.9929, 29
-__func__.9929:
+	.type	__func__.9937, %object
+	.size	__func__.9937, 29
+__func__.9937:
 	.ascii	"allocate_new_data_superblock\000"
-	.section	.rodata.__func__.9936,"a",%progbits
+	.section	.rodata.__func__.9944,"a",%progbits
 	.set	.LANCHOR88,. + 0
-	.type	__func__.9936, %object
-	.size	__func__.9936, 19
-__func__.9936:
+	.type	__func__.9944, %object
+	.size	__func__.9944, 19
+__func__.9944:
 	.ascii	"get_new_active_ppa\000"
-	.section	.rodata.__func__.9949,"a",%progbits
+	.section	.rodata.__func__.9957,"a",%progbits
 	.set	.LANCHOR164,. + 0
-	.type	__func__.9949, %object
-	.size	__func__.9949, 16
-__func__.9949:
+	.type	__func__.9957, %object
+	.size	__func__.9957, 16
+__func__.9957:
 	.ascii	"update_vpc_list\000"
-	.section	.rodata.__func__.9956,"a",%progbits
+	.section	.rodata.__func__.9964,"a",%progbits
 	.set	.LANCHOR165,. + 0
-	.type	__func__.9956, %object
-	.size	__func__.9956, 20
-__func__.9956:
+	.type	__func__.9964, %object
+	.size	__func__.9964, 20
+__func__.9964:
 	.ascii	"decrement_vpc_count\000"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",%progbits,1
 .LC105:
@@ -16346,7 +16360,7 @@ __func__.9956:
 	.ascii	"\012\000"
 	.section	.rodata.rknand_proc_ftlread.str1.1,"aMS",%progbits,1
 .LC70:
-	.ascii	"SFTL version: 5.0.48 20180930\000"
+	.ascii	"SFTL version: 5.0.48 20181029\000"
 .LC71:
 	.ascii	"%s\012\000"
 	.section	.rodata.sftl_write.str1.1,"aMS",%progbits,1
@@ -16356,4 +16370,6 @@ __func__.9956:
 	.ascii	"write_idblock fail! %x %x %x %x\012\000"
 .LC116:
 	.ascii	"%s idb buffer alloc fail\012\000"
+.LC117:
+	.ascii	"%p %x %p %x\012\000"
 	.hidden	free
diff --git a/drivers/rkflash/rk_sftl_arm_v8.S b/drivers/rkflash/rk_sftl_arm_v8.S
index b4b319d64e..04304422f9 100644
--- a/drivers/rkflash/rk_sftl_arm_v8.S
+++ b/drivers/rkflash/rk_sftl_arm_v8.S
@@ -2,7 +2,7 @@
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:    GPL-2.0
- * date: 2018-10-12
+ * date: 2018-10-29
  */
 	.arch armv8-a+nosimd
 	.file	"rk_sftl.c"
@@ -12098,48 +12098,46 @@ FtlWrite:
 	.global	sftl_write
 	.type	sftl_write, %function
 sftl_write:
-	stp	x29, x30, [sp, -272]!
+	stp	x29, x30, [sp, -256]!
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	add	w19, w0, w1
 	stp	x21, x22, [sp, 32]
-	sub	w20, w19, #1
-	stp	x25, x26, [sp, 64]
-	mov	w22, w0
+	mov	w21, w0
+	stp	x19, x20, [sp, 16]
+	add	w20, w0, w1
 	stp	x23, x24, [sp, 48]
-	mov	w25, w1
+	sub	w22, w20, #1
+	stp	x25, x26, [sp, 64]
+	mov	w24, w1
 	stp	x27, x28, [sp, 80]
-	cmp	w20, 63
-	str	x2, [x29, 184]
+	cmp	w22, 63
+	str	x2, [x29, 168]
+	adrp	x25, .LANCHOR184
 	bls	.L1664
-	cmp	w0, 576
+	cmp	w0, 575
 	bls	.L1665
 .L1664:
-	adrp	x0, .LANCHOR184
-	str	x0, [x29, 152]
-	ldr	w1, [x0, #:lo12:.LANCHOR184]
-	cbz	w1, .L1666
+	ldr	w0, [x25, #:lo12:.LANCHOR184]
+	cbz	w0, .L1667
 	adrp	x0, .LANCHOR185
-	str	x0, [x29, 144]
+	str	x0, [x29, 128]
 	mov	w1, 35899
-	ldr	x24, [x0, #:lo12:.LANCHOR185]
+	ldr	x23, [x0, #:lo12:.LANCHOR185]
 	movk	w1, 0xfcdc, lsl 16
-	ldr	w2, [x24]
+	ldr	w2, [x23]
 	cmp	w2, w1
-	beq	.L1667
-.L1684:
-	ldr	x0, [x29, 152]
-	str	wzr, [x0, #:lo12:.LANCHOR184]
-	ldr	x0, [x29, 144]
+	beq	.L1668
+.L1685:
+	ldr	x0, [x29, 128]
+	str	wzr, [x25, #:lo12:.LANCHOR184]
 	ldr	x0, [x0, #:lo12:.LANCHOR185]
 	bl	free
 	adrp	x0, .LANCHOR186
 	ldr	x0, [x0, #:lo12:.LANCHOR186]
 	bl	free
-.L1666:
-	ldr	x3, [x29, 184]
-	mov	w2, w25
-	mov	w1, w22
+.L1667:
+	ldr	x3, [x29, 168]
+	mov	w2, w24
+	mov	w1, w21
 	mov	w0, 0
 	bl	FtlWrite
 	ldp	x19, x20, [sp, 16]
@@ -12147,87 +12145,88 @@ sftl_write:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 272
+	ldp	x29, x30, [sp], 256
 	ret
-.L1667:
+.L1668:
 	adrp	x1, .LANCHOR0
 	add	x0, x1, :lo12:.LANCHOR0
 	mov	w2, 65535
 	mov	w4, 4097
-	str	x1, [x29, 168]
-	ldrh	w19, [x0, 14]
-	ldrh	w20, [x0, 10]
+	str	x1, [x29, 152]
+	ldrh	w20, [x0, 14]
+	ldrh	w19, [x0, 10]
 	mov	x0, 262140
-	add	x3, x24, x0
+	add	x3, x23, x0
 	mov	w0, 0
-.L1671:
+.L1672:
 	ldr	w1, [x3]
-	cbnz	w1, .L1668
-	ldr	w1, [x24, w0, uxtw 2]
+	cbnz	w1, .L1669
+	ldr	w1, [x23, w0, uxtw 2]
 	add	w0, w0, 1
 	str	w1, [x3], -4
 	cmp	w0, w4
 	sub	w2, w2, #1
 	csel	w0, w0, wzr, cc
 	cmp	w2, 4096
-	bne	.L1671
-	mov	w23, 512
-	b	.L1670
-.L1668:
-	add	w23, w2, 127
+	bne	.L1672
+	mov	w22, 512
+	b	.L1671
+.L1669:
+	add	w22, w2, 127
 	adrp	x0, .LC114
-	lsr	w23, w23, 7
+	lsr	w22, w22, 7
 	add	x0, x0, :lo12:.LC114
-	mov	w3, w23
+	mov	w3, w22
 	bl	printf
-.L1670:
-	and	w19, w19, 255
+.L1671:
+	and	w20, w20, 255
 	adrp	x26, .LANCHOR105
-	mul	w20, w20, w19
+	mul	w19, w19, w20
+	and	w0, w19, 65535
+	str	w0, [x29, 188]
+	sub	w20, w0, #1
 	mov	w19, 0
-	and	w20, w20, 65535
-	sub	w21, w20, #1
-	add	w21, w21, w23
-	udiv	w21, w21, w20
-	mul	w0, w20, w21
-	stp	w21, wzr, [x29, 196]
-	str	w0, [x29, 204]
-	lsl	w0, w23, 7
-	str	w0, [x29, 192]
+	add	w20, w20, w22
+	udiv	w20, w20, w0
+	mul	w0, w0, w20
+	stp	w20, wzr, [x29, 176]
+	str	w0, [x29, 184]
+	lsl	w0, w22, 7
+	str	w0, [x29, 148]
 	add	x0, x26, :lo12:.LANCHOR105
-	str	x0, [x29, 136]
-	b	.L1683
-.L1674:
+	str	x0, [x29, 120]
+	b	.L1684
+.L1675:
 	add	w0, w5, w4
-	ldr	x3, [x29, 136]
+	ldr	x3, [x29, 120]
 	ubfiz	x2, x4, 9, 16
-	stp	w5, w7, [x29, 112]
-	str	w4, [x29, 120]
-	add	x2, x24, x2
+	stp	w5, w4, [x29, 100]
+	str	w6, [x29, 112]
+	add	x2, x23, x2
 	udiv	w0, w0, w27
-	str	w6, [x29, 128]
+	str	w7, [x29, 144]
 	ldr	x8, [x3, 16]
-	add	x3, x29, 208
+	add	x3, x29, 192
 	and	w0, w0, 65535
 	mul	w1, w0, w27
-	stp	w1, w7, [x29, 208]
+	stp	w1, w7, [x29, 192]
 	udiv	w1, w6, w27
 	add	w1, w1, w0
 	mov	w0, 0
 	blr	x8
-	ldr	w4, [x29, 120]
-	ldr	w0, [x29, 160]
-	ldp	w5, w7, [x29, 112]
+	ldp	w5, w4, [x29, 100]
+	ldr	w0, [x29, 136]
+	ldr	w6, [x29, 112]
 	add	w4, w0, w4
-	ldr	w6, [x29, 128]
+	ldr	w7, [x29, 144]
 	and	w4, w4, 65535
-	b	.L1673
-.L1676:
+	b	.L1674
+.L1677:
 	add	w27, w8, w27
 	mov	w0, 0
 	and	w27, w27, 65535
-	b	.L1675
-.L1681:
+	b	.L1676
+.L1682:
 	mov	x27, x2
 	ldr	w4, [x0, x1, lsl 2]
 	lsl	x5, x1, 2
@@ -12235,14 +12234,14 @@ sftl_write:
 	add	x1, x1, 1
 	ldr	w3, [x27]
 	cmp	w4, w3
-	beq	.L1677
+	beq	.L1678
 	mov	x2, 512
 	mov	w1, 0
-	str	x5, [x29, 160]
+	str	x5, [x29, 136]
 	bl	memset
-	ldr	x0, [x29, 176]
+	ldr	x0, [x29, 160]
 	mov	w4, w28
-	ldr	x5, [x29, 160]
+	ldr	x5, [x29, 136]
 	mov	w1, w19
 	ldr	w3, [x27]
 	add	x27, x26, :lo12:.LANCHOR105
@@ -12255,68 +12254,69 @@ sftl_write:
 	mov	w1, w19
 	mov	w0, 0
 	blr	x2
-	cmp	w21, 1
-	bls	.L1690
+	cmp	w20, 1
+	bls	.L1692
 	ldr	x2, [x27, 8]
-	add	w1, w20, w19
+	ldr	w0, [x29, 188]
+	add	w1, w0, w19
 	mov	w0, 0
 	blr	x2
-.L1690:
-	ldr	w1, [x29, 204]
-	ldr	w0, [x29, 196]
+.L1692:
+	ldr	w1, [x29, 184]
+	ldr	w0, [x29, 176]
 	add	w19, w19, w1
-	ldr	w1, [x29, 196]
-	add	w0, w21, w0
+	ldr	w1, [x29, 176]
+	add	w0, w20, w0
 	cmp	w1, 15
-	bhi	.L1684
-	str	w0, [x29, 196]
-.L1683:
+	bhi	.L1685
+	str	w0, [x29, 176]
+.L1684:
 	adrp	x5, .LANCHOR186
 	mov	x2, 512
 	mov	w1, 0
-	str	x5, [x29, 176]
+	str	x5, [x29, 160]
 	ldr	x0, [x5, #:lo12:.LANCHOR186]
 	bl	memset
-	ldr	x0, [x29, 168]
+	ldr	x0, [x29, 152]
 	add	x4, x26, :lo12:.LANCHOR105
-	str	x4, [x29, 120]
+	str	x4, [x29, 104]
 	add	x0, x0, :lo12:.LANCHOR0
 	ldr	x6, [x4, 8]
 	ldrh	w3, [x0, 14]
 	ldrh	w2, [x0, 10]
 	mov	w0, 0
 	and	w27, w3, 255
-	str	w3, [x29, 128]
-	str	w27, [x29, 160]
+	str	w3, [x29, 112]
+	str	w27, [x29, 136]
 	udiv	w1, w19, w3
 	mul	w2, w27, w2
 	and	w28, w2, 65535
 	blr	x6
-	ldr	w0, [x29, 204]
-	ldr	w3, [x29, 128]
+	ldr	w0, [x29, 184]
+	ldr	w3, [x29, 112]
 	cmp	w0, w28
-	ldr	x4, [x29, 120]
-	bls	.L1672
+	ldr	x4, [x29, 104]
+	bls	.L1673
 	add	w1, w28, w19
 	ldr	x4, [x4, 8]
 	mov	w0, 0
 	udiv	w1, w1, w3
 	blr	x4
-.L1672:
+.L1673:
 	udiv	w5, w19, w28
 	mov	w4, 0
 	mov	w7, 61424
 	msub	w5, w5, w28, w19
 	sub	w6, w19, w5
-.L1673:
-	ldr	w0, [x29, 204]
+.L1674:
+	ldr	w0, [x29, 184]
 	cmp	w0, w4
-	bhi	.L1674
-	ldr	x0, [x29, 176]
+	bhi	.L1675
+	ldr	x0, [x29, 160]
 	add	x10, x26, :lo12:.LANCHOR105
 	mov	w27, 0
 	ldr	x6, [x0, #:lo12:.LANCHOR186]
-	ldr	x0, [x29, 168]
+	ldr	x0, [x29, 152]
 	add	x0, x0, :lo12:.LANCHOR0
 	ldrh	w4, [x0, 14]
 	ldrh	w5, [x0, 10]
@@ -12331,9 +12331,9 @@ sftl_write:
 	sdiv	w0, w1, w28
 	msub	w0, w0, w28, w1
 	and	w0, w0, 65535
-.L1675:
-	cmp	w27, w23
-	bcs	.L1679
+.L1676:
+	cmp	w27, w22
+	bcs	.L1680
 	add	w1, w5, w27
 	sub	w8, w4, w0
 	add	w0, w0, w7
@@ -12342,92 +12342,105 @@ sftl_write:
 	ubfiz	x2, x27, 9, 16
 	udiv	w1, w1, w28
 	add	x2, x6, x2
-	stp	w4, w8, [x29, 108]
-	add	x3, x29, 208
-	stp	w5, w7, [x29, 116]
-	str	x10, [x29, 128]
+	stp	w4, w8, [x29, 96]
+	add	x3, x29, 192
+	str	w7, [x29, 104]
+	str	x10, [x29, 112]
 	and	w1, w1, 65535
-	str	x6, [x29, 160]
+	str	x6, [x29, 136]
+	str	w5, [x29, 144]
 	madd	w1, w1, w28, w0
 	mov	w0, 0
 	udiv	w1, w1, w28
 	blr	x11
 	cmn	w0, #1
-	ldp	w4, w8, [x29, 108]
-	ldp	w5, w7, [x29, 116]
-	ldr	x10, [x29, 128]
-	ldr	x6, [x29, 160]
-	bne	.L1676
-.L1679:
-	ldr	x0, [x29, 176]
-	mov	x2, x24
+	ldp	w4, w8, [x29, 96]
+	ldr	w7, [x29, 104]
+	ldr	w5, [x29, 144]
+	ldr	x10, [x29, 112]
+	ldr	x6, [x29, 136]
+	bne	.L1677
+.L1680:
+	ldr	x0, [x29, 160]
+	mov	x2, x23
 	mov	x1, 0
 	ldr	x0, [x0, #:lo12:.LANCHOR186]
-.L1677:
-	ldr	w3, [x29, 192]
+.L1678:
+	ldr	w3, [x29, 148]
 	mov	w28, w1
 	cmp	w1, w3
-	bcc	.L1681
-	ldr	w0, [x29, 200]
+	bcc	.L1682
+	ldr	w0, [x29, 180]
 	add	w0, w0, 1
-	str	w0, [x29, 200]
+	str	w0, [x29, 180]
 	cmp	w0, 5
-	bls	.L1690
-	b	.L1684
+	bls	.L1692
+	b	.L1685
 .L1665:
 	cmp	w0, 64
-	adrp	x21, .LANCHOR185
-	bne	.L1685
+	bne	.L1686
+	adrp	x19, .LANCHOR185
 	mov	w0, 262144
 	bl	ftl_malloc
-	str	x0, [x21, #:lo12:.LANCHOR185]
+	str	x0, [x19, #:lo12:.LANCHOR185]
 	mov	w0, 262144
 	bl	ftl_malloc
 	mov	x1, x0
 	adrp	x0, .LANCHOR186
 	str	x1, [x0, #:lo12:.LANCHOR186]
-	ldr	x0, [x21, #:lo12:.LANCHOR185]
-	cbz	x0, .L1686
-	cbz	x1, .L1686
-	adrp	x1, .LANCHOR184
-	mov	w2, 1
-	str	w2, [x1, #:lo12:.LANCHOR184]
+	ldr	x0, [x19, #:lo12:.LANCHOR185]
+	cbz	x0, .L1687
+	cbz	x1, .L1687
+	mov	w1, 1
 	mov	w2, 262144
+	str	w1, [x25, #:lo12:.LANCHOR184]
 	mov	w1, 0
 	bl	ftl_memset
-.L1685:
-	ldr	x0, [x21, #:lo12:.LANCHOR185]
-	cmp	w22, 63
-	bhi	.L1687
-	mov	w1, 64
-	ldr	x3, [x29, 184]
-	sub	w1, w1, w22
-	sub	w2, w25, w1
-	ubfiz	x1, x1, 9, 25
-	add	x1, x3, x1
-.L1688:
-	cmp	w20, 576
-	bls	.L1689
-	sub	w2, w2, w19
-	sub	w2, w2, #447
-.L1689:
-	lsl	w2, w2, 9
-	bl	ftl_memcpy
-	b	.L1666
 .L1686:
+	ldr	w0, [x25, #:lo12:.LANCHOR184]
+	cbz	w0, .L1667
+	adrp	x0, .LANCHOR185
+	cmp	w21, 63
+	ldr	x1, [x0, #:lo12:.LANCHOR185]
+	bhi	.L1689
+	mov	w23, 64
+	ldr	x0, [x29, 168]
+	sub	w23, w23, w21
+	mov	x19, x1
+	sub	w25, w24, w23
+	ubfiz	x23, x23, 9, 25
+	add	x23, x0, x23
+.L1690:
+	cmp	w22, 575
+	bls	.L1691
+	sub	w25, w25, w20
+	sub	w25, w25, #446
+.L1691:
+	mov	w4, w25
+	mov	x3, x19
+	mov	w2, 262144
+	adrp	x0, .LC117
+	add	x0, x0, :lo12:.LC117
+	bl	printf
+	lsl	w2, w25, 9
+	mov	x1, x23
+	mov	x0, x19
+	bl	ftl_memcpy
+	b	.L1667
+.L1687:
 	adrp	x1, .LANCHOR187
 	adrp	x0, .LC116
 	add	x1, x1, :lo12:.LANCHOR187
 	add	x0, x0, :lo12:.LC116
 	bl	printf
-	b	.L1685
-.L1687:
-	lsl	w1, w22, 7
-	mov	w2, w25
-	sub	w1, w1, #8192
-	add	x0, x0, x1, lsl 2
-	ldr	x1, [x29, 184]
-	b	.L1688
+	b	.L1686
+.L1689:
+	lsl	w19, w21, 7
+	mov	w25, w24
+	sub	w19, w19, #8192
+	ldr	x23, [x29, 168]
+	add	x19, x1, x19, lsl 2
+	b	.L1690
 	.size	sftl_write, .-sftl_write
 	.section	.text.FtlMakeBbt,"ax",@progbits
 	.align	2
@@ -12453,42 +12466,42 @@ FtlMakeBbt:
 	adrp	x0, .LANCHOR10
 	add	x0, x0, :lo12:.LANCHOR10
 	str	x0, [x29, 120]
-.L1708:
+.L1710:
 	ldr	x0, [x29, 120]
 	ldrh	w0, [x0]
 	cmp	w22, w0
-	bcc	.L1714
+	bcc	.L1716
 	adrp	x21, .LANCHOR25
 	add	x21, x21, :lo12:.LANCHOR25
 	mov	w19, 0
-.L1715:
+.L1717:
 	ldrh	w0, [x21]
 	cmp	w0, w19
-	bhi	.L1716
+	bhi	.L1718
 	add	x21, x20, :lo12:.LANCHOR37
 	mov	w22, 65535
 	ldrh	w19, [x21, 12]
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L1717:
+.L1719:
 	ldrh	w0, [x21, 12]
 	sub	w0, w0, #47
 	cmp	w0, w19
-	bgt	.L1721
+	bgt	.L1723
 	mov	w0, w19
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L1718
+	beq	.L1720
 	mov	w0, w19
 	bl	FlashTestBlk
-	cbz	w0, .L1719
+	cbz	w0, .L1721
 	mov	w0, w19
 	bl	FtlBbmMapBadBlock
-.L1718:
+.L1720:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L1717
-.L1714:
+	b	.L1719
+.L1716:
 	adrp	x2, .LANCHOR123
 	adrp	x0, .LANCHOR115
 	add	x19, x28, :lo12:.LANCHOR148
@@ -12500,7 +12513,7 @@ FtlMakeBbt:
 	stp	x0, x26, [x19, 8]
 	adrp	x23, .LANCHOR17
 	str	x2, [x29, 112]
-	beq	.L1709
+	beq	.L1711
 	ldrh	w4, [x23, #:lo12:.LANCHOR17]
 	mov	w2, 1
 	madd	w27, w4, w22, w1
@@ -12515,14 +12528,14 @@ FtlMakeBbt:
 	add	w2, w2, 7
 	lsr	w2, w2, 3
 	bl	ftl_memcpy
-.L1710:
+.L1712:
 	mov	w0, w27
 	add	w22, w22, 1
 	bl	FtlBbmMapBadBlock
 	add	x24, x24, 8
 	add	x21, x21, 2
-	b	.L1708
-.L1709:
+	b	.L1710
+.L1711:
 	mov	w1, w22
 	bl	FlashGetBadBlockList
 	ldr	x0, [x19, 8]
@@ -12535,12 +12548,12 @@ FtlMakeBbt:
 	add	x0, x0, :lo12:.LANCHOR137
 	and	w19, w19, 65535
 	str	x0, [x29, 104]
-.L1711:
+.L1713:
 	ldrh	w0, [x23]
 	madd	w0, w22, w0, w19
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L1712
+	beq	.L1714
 	ldr	x0, [x29, 112]
 	mov	w2, 16
 	strh	w19, [x21]
@@ -12578,29 +12591,29 @@ FtlMakeBbt:
 	bl	FlashProgPages
 	ldr	w0, [x25]
 	cmn	w0, #1
-	bne	.L1710
+	bne	.L1712
 	mov	w0, w27
 	bl	FtlBbmMapBadBlock
-	b	.L1711
-.L1712:
+	b	.L1713
+.L1714:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L1711
-.L1716:
+	b	.L1713
+.L1718:
 	mov	w0, w19
 	add	w19, w19, 1
 	bl	FtlBbmMapBadBlock
 	and	w19, w19, 65535
-	b	.L1715
-.L1719:
+	b	.L1717
+.L1721:
 	ldrh	w0, [x21]
 	cmp	w0, w22
-	bne	.L1720
+	bne	.L1722
 	strh	w19, [x21]
-	b	.L1718
-.L1720:
+	b	.L1720
+.L1722:
 	strh	w19, [x21, 4]
-.L1721:
+.L1723:
 	adrp	x0, .LANCHOR106
 	add	x19, x20, :lo12:.LANCHOR37
 	ldrh	w1, [x20, #:lo12:.LANCHOR37]
@@ -12657,9 +12670,9 @@ ftl_low_format:
 	str	wzr, [x20, #:lo12:.LANCHOR70]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	w0, .L1728
+	cbz	w0, .L1730
 	bl	FtlMakeBbt
-.L1728:
+.L1730:
 	adrp	x23, .LANCHOR12
 	adrp	x0, .LANCHOR118
 	mov	w6, 23752
@@ -12670,31 +12683,31 @@ ftl_low_format:
 	lsl	w1, w1, 7
 	ldr	x5, [x0, #:lo12:.LANCHOR119]
 	mov	w0, 0
-.L1729:
+.L1731:
 	cmp	w0, w1
-	blt	.L1730
+	blt	.L1732
 	adrp	x21, .LANCHOR5
 	adrp	x22, .LANCHOR6
 	add	x26, x22, :lo12:.LANCHOR6
 	mov	w19, 0
 	ldrh	w25, [x21, #:lo12:.LANCHOR5]
-.L1731:
+.L1733:
 	ldrh	w0, [x26]
 	cmp	w0, w25
-	bhi	.L1732
+	bhi	.L1734
 	adrp	x25, .LANCHOR3
 	sub	w1, w19, #2
 	ldrh	w0, [x25, #:lo12:.LANCHOR3]
 	cmp	w1, w0, lsl 1
-	bgt	.L1733
-.L1737:
+	bgt	.L1735
+.L1739:
 	add	x26, x21, :lo12:.LANCHOR5
 	mov	w19, 0
 	mov	w24, 0
-.L1734:
+.L1736:
 	ldrh	w0, [x26]
 	cmp	w0, w24
-	bhi	.L1738
+	bhi	.L1740
 	adrp	x0, .LANCHOR111
 	ldrh	w1, [x22, #:lo12:.LANCHOR6]
 	ldrh	w4, [x25, #:lo12:.LANCHOR3]
@@ -12711,28 +12724,28 @@ ftl_low_format:
 	mov	w6, 24
 	mul	w6, w4, w6
 	cmp	w19, w6
-	ble	.L1739
+	ble	.L1741
 	sub	w1, w1, w19
 	udiv	w1, w1, w4
 	str	w1, [x3, #:lo12:.LANCHOR61]
 	lsr	w1, w1, 5
 	add	w1, w1, 24
 	strh	w1, [x2, #:lo12:.LANCHOR78]
-.L1739:
+.L1741:
 	adrp	x1, .LANCHOR15
 	ldrh	w1, [x1, #:lo12:.LANCHOR15]
-	cbz	w1, .L1741
+	cbz	w1, .L1743
 	ldrh	w6, [x2, #:lo12:.LANCHOR78]
 	add	w6, w6, w1, lsr 1
 	strh	w6, [x2, #:lo12:.LANCHOR78]
 	mul	w6, w1, w4
 	cmp	w19, w6
-	bge	.L1741
+	bge	.L1743
 	add	w1, w1, 32
 	str	w5, [x3, #:lo12:.LANCHOR61]
 	add	w1, w0, w1
 	strh	w1, [x2, #:lo12:.LANCHOR78]
-.L1741:
+.L1743:
 	ldrh	w1, [x2, #:lo12:.LANCHOR78]
 	adrp	x25, .LANCHOR152
 	ldr	w0, [x3, #:lo12:.LANCHOR61]
@@ -12776,20 +12789,20 @@ ftl_low_format:
 	ldr	x0, [x0, #:lo12:.LANCHOR1]
 	strb	wzr, [x19, 6]
 	bl	ftl_memset
-.L1743:
+.L1745:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1744
+	cbnz	w1, .L1746
 	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L1743
-.L1730:
+	b	.L1745
+.L1732:
 	ubfiz	x3, x0, 2, 16
 	mvn	w2, w0
 	orr	w2, w0, w2, lsl 16
@@ -12797,8 +12810,8 @@ ftl_low_format:
 	and	w0, w0, 65535
 	str	w2, [x4, x3]
 	str	w6, [x5, x3]
-	b	.L1729
-.L1732:
+	b	.L1731
+.L1734:
 	mov	w0, w25
 	mov	w1, 1
 	add	w25, w25, 1
@@ -12806,8 +12819,8 @@ ftl_low_format:
 	add	w19, w19, w0
 	and	w25, w25, 65535
 	and	w19, w19, 65535
-	b	.L1731
-.L1733:
+	b	.L1733
+.L1735:
 	udiv	w0, w19, w0
 	adrp	x1, .LANCHOR31
 	ldr	w19, [x1, #:lo12:.LANCHOR31]
@@ -12817,17 +12830,17 @@ ftl_low_format:
 	add	x24, x22, :lo12:.LANCHOR6
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	w19, [x21, #:lo12:.LANCHOR5]
-.L1735:
+.L1737:
 	ldrh	w0, [x24]
 	cmp	w0, w19
-	bls	.L1737
+	bls	.L1739
 	mov	w0, w19
 	add	w19, w19, 1
 	mov	w1, 1
 	and	w19, w19, 65535
 	bl	FtlLowFormatEraseBlock
-	b	.L1735
-.L1738:
+	b	.L1737
+.L1740:
 	mov	w0, w24
 	mov	w1, 0
 	add	w24, w24, 1
@@ -12835,8 +12848,8 @@ ftl_low_format:
 	add	w19, w19, w0
 	and	w24, w24, 65535
 	and	w19, w19, 65535
-	b	.L1734
-.L1744:
+	b	.L1736
+.L1746:
 	ldr	w1, [x20, #:lo12:.LANCHOR70]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
@@ -12856,20 +12869,20 @@ ftl_low_format:
 	mov	w1, 1
 	strb	wzr, [x0, 6]
 	strb	w1, [x0, 8]
-.L1745:
+.L1747:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1746
+	cbnz	w1, .L1748
 	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L1745
-.L1746:
+	b	.L1747
+.L1748:
 	ldr	w1, [x20, #:lo12:.LANCHOR70]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
@@ -12895,11 +12908,11 @@ ftl_low_format:
 	str	w0, [x20, #:lo12:.LANCHOR70]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	w0, .L1747
+	cbnz	w0, .L1749
 	adrp	x0, .LANCHOR86
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR86]
-.L1747:
+.L1749:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -14352,257 +14365,257 @@ power_up_flag:
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",@progbits,1
 .LC1:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
-	.section	.rodata.__func__.6119,"a",@progbits
+	.section	.rodata.__func__.6127,"a",@progbits
 	.align	3
 	.set	.LANCHOR138,. + 0
-	.type	__func__.6119, %object
-	.size	__func__.6119, 11
-__func__.6119:
+	.type	__func__.6127, %object
+	.size	__func__.6127, 11
+__func__.6127:
 	.string	"FtlMemInit"
-	.section	.rodata.__func__.6243,"a",@progbits
+	.section	.rodata.__func__.6251,"a",@progbits
 	.align	3
 	.set	.LANCHOR175,. + 0
-	.type	__func__.6243, %object
-	.size	__func__.6243, 13
-__func__.6243:
+	.type	__func__.6251, %object
+	.size	__func__.6251, 13
+__func__.6251:
 	.string	"FtlProgPages"
-	.section	.rodata.__func__.6271,"a",@progbits
+	.section	.rodata.__func__.6279,"a",@progbits
 	.align	3
 	.set	.LANCHOR183,. + 0
-	.type	__func__.6271, %object
-	.size	__func__.6271, 9
-__func__.6271:
+	.type	__func__.6279, %object
+	.size	__func__.6279, 9
+__func__.6279:
 	.string	"FtlWrite"
-	.section	.rodata.__func__.6377,"a",@progbits
+	.section	.rodata.__func__.6385,"a",@progbits
 	.align	3
 	.set	.LANCHOR187,. + 0
-	.type	__func__.6377, %object
-	.size	__func__.6377, 14
-__func__.6377:
+	.type	__func__.6385, %object
+	.size	__func__.6385, 14
+__func__.6385:
 	.string	"FtlWriteToIDB"
-	.section	.rodata.__func__.6418,"a",@progbits
+	.section	.rodata.__func__.6426,"a",@progbits
 	.align	3
 	.set	.LANCHOR139,. + 0
-	.type	__func__.6418, %object
-	.size	__func__.6418, 14
-__func__.6418:
+	.type	__func__.6426, %object
+	.size	__func__.6426, 14
+__func__.6426:
 	.string	"FtlBbt2Bitmap"
-	.section	.rodata.__func__.6461,"a",@progbits
+	.section	.rodata.__func__.6469,"a",@progbits
 	.align	3
 	.set	.LANCHOR150,. + 0
-	.type	__func__.6461, %object
-	.size	__func__.6461, 11
-__func__.6461:
+	.type	__func__.6469, %object
+	.size	__func__.6469, 11
+__func__.6469:
 	.string	"FtlLoadBbt"
-	.section	.rodata.__func__.6576,"a",@progbits
+	.section	.rodata.__func__.6584,"a",@progbits
 	.align	3
 	.set	.LANCHOR49,. + 0
-	.type	__func__.6576, %object
-	.size	__func__.6576, 17
-__func__.6576:
+	.type	__func__.6584, %object
+	.size	__func__.6584, 17
+__func__.6584:
 	.string	"INSERT_FREE_LIST"
-	.section	.rodata.__func__.6581,"a",@progbits
+	.section	.rodata.__func__.6589,"a",@progbits
 	.align	3
 	.set	.LANCHOR46,. + 0
-	.type	__func__.6581, %object
-	.size	__func__.6581, 17
-__func__.6581:
+	.type	__func__.6589, %object
+	.size	__func__.6589, 17
+__func__.6589:
 	.string	"INSERT_DATA_LIST"
-	.section	.rodata.__func__.6612,"a",@progbits
+	.section	.rodata.__func__.6620,"a",@progbits
 	.align	3
 	.set	.LANCHOR50,. + 0
-	.type	__func__.6612, %object
-	.size	__func__.6612, 17
-__func__.6612:
+	.type	__func__.6620, %object
+	.size	__func__.6620, 17
+__func__.6620:
 	.string	"List_remove_node"
-	.section	.rodata.__func__.6644,"a",@progbits
+	.section	.rodata.__func__.6652,"a",@progbits
 	.align	3
 	.set	.LANCHOR54,. + 0
-	.type	__func__.6644, %object
-	.size	__func__.6644, 22
-__func__.6644:
+	.type	__func__.6652, %object
+	.size	__func__.6652, 22
+__func__.6652:
 	.string	"List_update_data_list"
-	.section	.rodata.__func__.6653,"a",@progbits
+	.section	.rodata.__func__.6661,"a",@progbits
 	.align	3
 	.set	.LANCHOR156,. + 0
-	.type	__func__.6653, %object
-	.size	__func__.6653, 16
-__func__.6653:
+	.type	__func__.6661, %object
+	.size	__func__.6661, 16
+__func__.6661:
 	.string	"load_l2p_region"
-	.section	.rodata.__func__.6686,"a",@progbits
+	.section	.rodata.__func__.6694,"a",@progbits
 	.align	3
 	.set	.LANCHOR107,. + 0
-	.type	__func__.6686, %object
-	.size	__func__.6686, 26
-__func__.6686:
+	.type	__func__.6694, %object
+	.size	__func__.6694, 26
+__func__.6694:
 	.string	"ftl_map_blk_alloc_new_blk"
-	.section	.rodata.__func__.6697,"a",@progbits
+	.section	.rodata.__func__.6705,"a",@progbits
 	.align	3
 	.set	.LANCHOR157,. + 0
-	.type	__func__.6697, %object
-	.size	__func__.6697, 15
-__func__.6697:
+	.type	__func__.6705, %object
+	.size	__func__.6705, 15
+__func__.6705:
 	.string	"ftl_map_blk_gc"
-	.section	.rodata.__func__.6712,"a",@progbits
+	.section	.rodata.__func__.6720,"a",@progbits
 	.align	3
 	.set	.LANCHOR154,. + 0
-	.type	__func__.6712, %object
-	.size	__func__.6712, 31
-__func__.6712:
+	.type	__func__.6720, %object
+	.size	__func__.6720, 31
+__func__.6720:
 	.string	"Ftl_write_map_blk_to_last_page"
-	.section	.rodata.__func__.6726,"a",@progbits
+	.section	.rodata.__func__.6734,"a",@progbits
 	.align	3
 	.set	.LANCHOR155,. + 0
-	.type	__func__.6726, %object
-	.size	__func__.6726, 16
-__func__.6726:
+	.type	__func__.6734, %object
+	.size	__func__.6734, 16
+__func__.6734:
 	.string	"FtlMapWritePage"
-	.section	.rodata.__func__.6751,"a",@progbits
+	.section	.rodata.__func__.6759,"a",@progbits
 	.align	3
 	.set	.LANCHOR57,. + 0
-	.type	__func__.6751, %object
-	.size	__func__.6751, 22
-__func__.6751:
+	.type	__func__.6759, %object
+	.size	__func__.6759, 22
+__func__.6759:
 	.string	"select_l2p_ram_region"
-	.section	.rodata.__func__.6768,"a",@progbits
+	.section	.rodata.__func__.6776,"a",@progbits
 	.align	3
 	.set	.LANCHOR159,. + 0
-	.type	__func__.6768, %object
-	.size	__func__.6768, 9
-__func__.6768:
+	.type	__func__.6776, %object
+	.size	__func__.6776, 9
+__func__.6776:
 	.string	"log2phys"
-	.section	.rodata.__func__.6841,"a",@progbits
+	.section	.rodata.__func__.6849,"a",@progbits
 	.align	3
 	.set	.LANCHOR171,. + 0
-	.type	__func__.6841, %object
-	.size	__func__.6841, 15
-__func__.6841:
+	.type	__func__.6849, %object
+	.size	__func__.6849, 15
+__func__.6849:
 	.string	"FtlVpcTblFlush"
-	.section	.rodata.__func__.6863,"a",@progbits
+	.section	.rodata.__func__.6871,"a",@progbits
 	.align	3
 	.set	.LANCHOR149,. + 0
-	.type	__func__.6863, %object
-	.size	__func__.6863, 14
-__func__.6863:
+	.type	__func__.6871, %object
+	.size	__func__.6871, 14
+__func__.6871:
 	.string	"FtlScanSysBlk"
-	.section	.rodata.__func__.6920,"a",@progbits
+	.section	.rodata.__func__.6928,"a",@progbits
 	.align	3
 	.set	.LANCHOR151,. + 0
-	.type	__func__.6920, %object
-	.size	__func__.6920, 15
-__func__.6920:
+	.type	__func__.6928, %object
+	.size	__func__.6928, 15
+__func__.6928:
 	.string	"FtlLoadSysInfo"
-	.section	.rodata.__func__.6983,"a",@progbits
+	.section	.rodata.__func__.6991,"a",@progbits
 	.align	3
 	.set	.LANCHOR160,. + 0
-	.type	__func__.6983, %object
-	.size	__func__.6983, 16
-__func__.6983:
+	.type	__func__.6991, %object
+	.size	__func__.6991, 16
+__func__.6991:
 	.string	"FtlReUsePrevPpa"
-	.section	.rodata.__func__.7017,"a",@progbits
+	.section	.rodata.__func__.7025,"a",@progbits
 	.align	3
 	.set	.LANCHOR166,. + 0
-	.type	__func__.7017, %object
-	.size	__func__.7017, 22
-__func__.7017:
+	.type	__func__.7025, %object
+	.size	__func__.7025, 22
+__func__.7025:
 	.string	"FtlRecoverySuperblock"
-	.section	.rodata.__func__.7074,"a",@progbits
+	.section	.rodata.__func__.7082,"a",@progbits
 	.align	3
 	.set	.LANCHOR60,. + 0
-	.type	__func__.7074, %object
-	.size	__func__.7074, 16
-__func__.7074:
+	.type	__func__.7082, %object
+	.size	__func__.7082, 16
+__func__.7082:
 	.string	"make_superblock"
-	.section	.rodata.__func__.7095,"a",@progbits
+	.section	.rodata.__func__.7103,"a",@progbits
 	.align	3
 	.set	.LANCHOR146,. + 0
-	.type	__func__.7095, %object
-	.size	__func__.7095, 18
-__func__.7095:
+	.type	__func__.7103, %object
+	.size	__func__.7103, 18
+__func__.7103:
 	.string	"SupperBlkListInit"
-	.section	.rodata.__func__.7120,"a",@progbits
+	.section	.rodata.__func__.7128,"a",@progbits
 	.align	3
 	.set	.LANCHOR173,. + 0
-	.type	__func__.7120, %object
-	.size	__func__.7120, 21
-__func__.7120:
+	.type	__func__.7128, %object
+	.size	__func__.7128, 21
+__func__.7128:
 	.string	"FtlVpcCheckAndModify"
-	.section	.rodata.__func__.7136,"a",@progbits
+	.section	.rodata.__func__.7144,"a",@progbits
 	.align	3
 	.set	.LANCHOR161,. + 0
-	.type	__func__.7136, %object
-	.size	__func__.7136, 14
-__func__.7136:
+	.type	__func__.7144, %object
+	.size	__func__.7144, 14
+__func__.7144:
 	.string	"ftl_check_vpc"
-	.section	.rodata.__func__.7221,"a",@progbits
+	.section	.rodata.__func__.7229,"a",@progbits
 	.align	3
 	.set	.LANCHOR163,. + 0
-	.type	__func__.7221, %object
-	.size	__func__.7221, 25
-__func__.7221:
+	.type	__func__.7229, %object
+	.size	__func__.7229, 25
+__func__.7229:
 	.string	"allocate_data_superblock"
-	.section	.rodata.__func__.7242,"a",@progbits
+	.section	.rodata.__func__.7250,"a",@progbits
 	.align	3
 	.set	.LANCHOR174,. + 0
-	.type	__func__.7242, %object
-	.size	__func__.7242, 29
-__func__.7242:
+	.type	__func__.7250, %object
+	.size	__func__.7250, 29
+__func__.7250:
 	.string	"allocate_new_data_superblock"
-	.section	.rodata.__func__.7249,"a",@progbits
+	.section	.rodata.__func__.7257,"a",@progbits
 	.align	3
 	.set	.LANCHOR88,. + 0
-	.type	__func__.7249, %object
-	.size	__func__.7249, 19
-__func__.7249:
+	.type	__func__.7257, %object
+	.size	__func__.7257, 19
+__func__.7257:
 	.string	"get_new_active_ppa"
-	.section	.rodata.__func__.7262,"a",@progbits
+	.section	.rodata.__func__.7270,"a",@progbits
 	.align	3
 	.set	.LANCHOR164,. + 0
-	.type	__func__.7262, %object
-	.size	__func__.7262, 16
-__func__.7262:
+	.type	__func__.7270, %object
+	.size	__func__.7270, 16
+__func__.7270:
 	.string	"update_vpc_list"
-	.section	.rodata.__func__.7269,"a",@progbits
+	.section	.rodata.__func__.7277,"a",@progbits
 	.align	3
 	.set	.LANCHOR165,. + 0
-	.type	__func__.7269, %object
-	.size	__func__.7269, 20
-__func__.7269:
+	.type	__func__.7277, %object
+	.size	__func__.7277, 20
+__func__.7277:
 	.string	"decrement_vpc_count"
-	.section	.rodata.__func__.7339,"a",@progbits
+	.section	.rodata.__func__.7347,"a",@progbits
 	.align	3
 	.set	.LANCHOR176,. + 0
-	.type	__func__.7339, %object
-	.size	__func__.7339, 19
-__func__.7339:
+	.type	__func__.7347, %object
+	.size	__func__.7347, 19
+__func__.7347:
 	.string	"FtlGcFreeTempBlock"
-	.section	.rodata.__func__.7450,"a",@progbits
+	.section	.rodata.__func__.7458,"a",@progbits
 	.align	3
 	.set	.LANCHOR180,. + 0
-	.type	__func__.7450, %object
-	.size	__func__.7450, 23
-__func__.7450:
+	.type	__func__.7458, %object
+	.size	__func__.7458, 23
+__func__.7458:
 	.string	"rk_ftl_garbage_collect"
-	.section	.rodata.__func__.7712,"a",@progbits
+	.section	.rodata.__func__.7720,"a",@progbits
 	.align	3
 	.set	.LANCHOR147,. + 0
-	.type	__func__.7712, %object
-	.size	__func__.7712, 15
-__func__.7712:
+	.type	__func__.7720, %object
+	.size	__func__.7720, 15
+__func__.7720:
 	.string	"FlashReadPages"
-	.section	.rodata.__func__.7731,"a",@progbits
+	.section	.rodata.__func__.7739,"a",@progbits
 	.align	3
 	.set	.LANCHOR153,. + 0
-	.type	__func__.7731, %object
-	.size	__func__.7731, 15
-__func__.7731:
+	.type	__func__.7739, %object
+	.size	__func__.7739, 15
+__func__.7739:
 	.string	"FlashProgPages"
-	.section	.rodata.__func__.7755,"a",@progbits
+	.section	.rodata.__func__.7763,"a",@progbits
 	.align	3
 	.set	.LANCHOR104,. + 0
-	.type	__func__.7755, %object
-	.size	__func__.7755, 17
-__func__.7755:
+	.type	__func__.7763, %object
+	.size	__func__.7763, 17
+__func__.7763:
 	.string	"FlashEraseBlocks"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",@progbits,1
 .LC105:
@@ -14647,7 +14660,7 @@ __func__.7755:
 	.string	"\n"
 	.section	.rodata.rknand_proc_ftlread.str1.1,"aMS",@progbits,1
 .LC70:
-	.string	"SFTL version: 5.0.48 20180930"
+	.string	"SFTL version: 5.0.48 20181029"
 .LC71:
 	.string	"%s\n"
 	.section	.rodata.sftl_write.str1.1,"aMS",@progbits,1
@@ -14657,4 +14670,6 @@ __func__.7755:
 	.string	"write_idblock fail! %x %x %x %x\n"
 .LC116:
 	.string	"%s idb buffer alloc fail\n"
+.LC117:
+	.string	"%p %x %p %x\n"
 	.hidden	free

commit ee465021feb46515c76fe2291d3fdf31eb6dbb49
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 22 20:20:21 2018 +0800

    android: support boot images packed with rockchip android hdr
    
    For some legacy reasons, rockchip use mkbootimg tool to pack android
    images with special pack parameters(SDK version lower than 8.1) to
    assign kernel/ramdisk/seconds address and page size.
    
    Android hdr on RK3399 SDK-7.1:
       kernel size:      1299808
       kernel address:   60408000
       ramdisk size:     1e6b80
       ramdisk addrress: 62000000
       second size:      41c00
       second address:   60f00000
       tags address:     60088000
       page size:        4000
       header_version:   0
       os_version:       e041114 (ver: 1.7.2, level: 2017.4)
       name:
       cmdline:          buildvariant=userdebug
    
    The kernel/ramdisk/seconds address base is not from 0x10000000 and
    page size is not 0x800!
    
    This patch makes bootflow to compatible with above legacy packing.
    
    Change-Id: I663a0d1386694658c97586706ff21ed887d6a2e7
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/cmd/boot_android.c b/cmd/boot_android.c
index e815ec4762..255e4921fe 100755
--- a/cmd/boot_android.c
+++ b/cmd/boot_android.c
@@ -48,7 +48,7 @@ static int do_boot_android(cmd_tbl_t *cmdtp, int flag, int argc,
 	 */
 	load_address &= ~0x7ffff;
 #endif
-	load_address -= 0x800; /* default page size for boot header */
+
 	dev_desc = blk_get_dev(argv[1], simple_strtoul(argv[2], NULL, 16));
 	if (!dev_desc) {
 		printf("Could not get %s %s\n", argv[1], argv[2]);
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 367a258d52..de7492d571 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -424,7 +424,7 @@ static void slot_set_unbootable(AvbABSlotData* slot)
 }
 
 static AvbSlotVerifyResult android_slot_verify(char *boot_partname,
-			       unsigned long load_address,
+			       unsigned long *android_load_address,
 			       char *slot_suffix)
 {
 	const char *requested_partitions[1] = {NULL};
@@ -437,6 +437,8 @@ static AvbSlotVerifyResult android_slot_verify(char *boot_partname,
 	size_t slot_index_to_boot = 0;
 	char verify_state[38] = {0};
 	char can_boot = 1;
+	unsigned long load_address = *android_load_address;
+	struct andr_img_hdr *hdr;
 
 	requested_partitions[0] = boot_partname;
 	ops = avb_ops_user_new();
@@ -539,6 +541,11 @@ static AvbSlotVerifyResult android_slot_verify(char *boot_partname,
 			strcat(newbootargs, slot_data[0]->cmdline);
 		env_set("bootargs", newbootargs);
 
+		/* Reserve page_size */
+		hdr = (void *)slot_data[0]->loaded_partitions->data;
+		load_address -= hdr->page_size;
+		*android_load_address = load_address;
+
 		memcpy((uint8_t *)load_address,
 		       slot_data[0]->loaded_partitions->data,
 		       slot_data[0]->loaded_partitions->data_size);
@@ -878,7 +885,7 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	}
 
 #ifdef CONFIG_ANDROID_AVB
-	if (android_slot_verify(boot_partname, load_address, slot_suffix))
+	if (android_slot_verify(boot_partname, &load_address, slot_suffix))
 		return -1;
 #else
 	/*
diff --git a/common/image-android.c b/common/image-android.c
index 7148e3580c..5681775190 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -38,7 +38,25 @@ static ulong android_image_get_kernel_addr(const struct andr_img_hdr *hdr)
 	if (hdr->kernel_addr == ANDROID_IMAGE_DEFAULT_KERNEL_ADDR)
 		return (ulong)hdr + hdr->page_size;
 
+#ifdef CONFIG_ARCH_ROCKCHIP
+	/*
+	 * If kernel is compressed, kernel_addr is set as decompressed address
+	 * after compressed being loaded to ram, so let's use it.
+	 */
+	if (android_kernel_comp_type != IH_COMP_NONE &&
+	    android_kernel_comp_type != IH_COMP_ZIMAGE)
+		return hdr->kernel_addr;
+
+	/*
+	 * Compatble with rockchip legacy packing with kernel/ramdisk/second
+	 * address base from 0x60000000(SDK versiont < 8.1), these are invalid
+	 * address, so we calc it by real size.
+	 */
+	return (ulong)hdr + hdr->page_size;
+#else
 	return hdr->kernel_addr;
+#endif
+
 }
 
 void android_image_set_comp(struct andr_img_hdr *hdr, u32 comp)
@@ -172,14 +190,14 @@ int android_image_get_ramdisk(const struct andr_img_hdr *hdr,
 		return -1;
 	}
 
-	printf("RAM disk load addr 0x%08x size %u KiB\n",
-	       hdr->ramdisk_addr, DIV_ROUND_UP(hdr->ramdisk_size, 1024));
-
 	*rd_data = (unsigned long)hdr;
 	*rd_data += hdr->page_size;
 	*rd_data += ALIGN(hdr->kernel_size, hdr->page_size);
-
 	*rd_len = hdr->ramdisk_size;
+
+	printf("RAM disk load addr 0x%08lx size %u KiB\n",
+	       *rd_data, DIV_ROUND_UP(hdr->ramdisk_size, 1024));
+
 	return 0;
 }
 
@@ -253,37 +271,48 @@ long android_image_load(struct blk_desc *dev_desc,
 	long blk_read = 0;
 	u32 comp;
 	u32 kload_addr;
+	u32 blkcnt;
+	struct andr_img_hdr *hdr;
 
 	if (max_size < part_info->blksz)
 		return -1;
 
-	/* We don't know the size of the Android image before reading the header
-	 * so we don't limit the size of the mapped memory.
-	 */
-	buf = map_sysmem(load_address, 0 /* size */);
-
-	/* Read the Android boot.img header and a few parts of
+	/*
+	 * Read the Android boot.img header and a few parts of
 	 * the head of kernel image.
 	 */
-	if (blk_dread(dev_desc, part_info->start, 8, buf) != 8)
+	blkcnt = DIV_ROUND_UP(sizeof(*hdr), 512);
+	hdr = memalign(ARCH_DMA_MINALIGN, blkcnt * 512);
+	if (!hdr) {
+		printf("%s: no memory\n", __func__);
+		return -1;
+	}
+
+	if (blk_dread(dev_desc, part_info->start, blkcnt, hdr) != blkcnt)
 		blk_read = -1;
 
-	if (!blk_read && android_image_check_header(buf) != 0) {
+	if (!blk_read && android_image_check_header(hdr) != 0) {
 		printf("** Invalid Android Image header **\n");
 		blk_read = -1;
 	}
 
+	/* page_size for image header */
+	load_address -= hdr->page_size;
 
+	/* We don't know the size of the Android image before reading the header
+	 * so we don't limit the size of the mapped memory.
+	 */
+	buf = map_sysmem(load_address, 0 /* size */);
 	if (!blk_read) {
-		blk_cnt = (android_image_get_end(buf) - (ulong)buf +
+		blk_cnt = (android_image_get_end(hdr) - (ulong)hdr +
 			   part_info->blksz - 1) / part_info->blksz;
-		comp = android_image_parse_kernel_comp(buf);
+		comp = android_image_parse_kernel_comp(hdr);
 		/*
 		 * We should load a compressed kernel Image
 		 * to high memory
 		 */
 		if (comp != IH_COMP_NONE) {
-			load_address += android_image_get_ksize(buf) * 3;
+			load_address += android_image_get_ksize(hdr) * 3;
 			load_address = env_get_ulong("kernel_addr_c", 16, load_address);
 			unmap_sysmem(buf);
 			buf = map_sysmem(load_address, 0 /* size */);
@@ -291,7 +320,7 @@ long android_image_load(struct blk_desc *dev_desc,
 
 		if (blk_cnt * part_info->blksz > max_size) {
 			debug("Android Image too big (%lu bytes, max %lu)\n",
-			      android_image_get_end(buf) - (ulong)buf,
+			      android_image_get_end(hdr) - (ulong)hdr,
 			      max_size);
 			blk_read = -1;
 		} else {
@@ -315,6 +344,7 @@ long android_image_load(struct blk_desc *dev_desc,
 
 	}
 
+	free(hdr);
 	unmap_sysmem(buf);
 
 	debug("%lu blocks read: %s\n",

commit ab70714e5a4975b7ff215aed85c5b4ce124c275c
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Oct 31 14:44:19 2018 +0800

    Makefile: clean img file
    
    Some img file is generate by local script, like uboot.img, trust,img,
    remove them in clean command.
    
    Change-Id: Ie724772dc10652c96b12cc2312ccbfce4231a9bb
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/Makefile b/Makefile
index f81ac1f9f9..b3f61a2eac 100644
--- a/Makefile
+++ b/Makefile
@@ -1488,7 +1488,7 @@ CLEAN_DIRS  += $(MODVERDIR) \
 			$(filter-out include, $(shell ls -1 $d 2>/dev/null))))
 
 CLEAN_FILES += include/bmp_logo.h include/bmp_logo_data.h \
-	       boot* u-boot* MLO* SPL System.map fit-dtb.blob *.bin
+	       boot* u-boot* MLO* SPL System.map fit-dtb.blob *.bin *.img
 
 # Directories & files removed with 'make mrproper'
 MRPROPER_DIRS  += include/config include/generated spl tpl \

commit c93db2f3565f17c8654f6b0e5e3c5e5d842df96b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Aug 22 20:52:32 2018 +0800

    rockchip: rk3229: tpl skip rkclk_init
    
    The new rkclk_init is too complecate and not able to run in TPL,
    skip it in TPL.
    
    Change-Id: I46f30613050a86ee74060e713283bcb7980c3348
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c
index 9716801b7a..59bcd0540c 100644
--- a/drivers/clk/rockchip/clk_rk322x.c
+++ b/drivers/clk/rockchip/clk_rk322x.c
@@ -862,6 +862,7 @@ static int rk322x_clk_ofdata_to_platdata(struct udevice *dev)
 	return 0;
 }
 
+#ifndef CONFIG_TPL_BUILD
 static void rkclk_init(struct rk322x_clk_priv *priv)
 {
 	struct rk322x_cru *cru = priv->cru;
@@ -921,13 +922,14 @@ static void rkclk_init(struct rk322x_clk_priv *priv)
 	rk_clrsetreg(&cru->cru_misc_con, (0x1 << 13) |
 		     (0x1 << 15), (0 << 15) | (0 << 13));
 }
+#endif
 
 static int rk322x_clk_probe(struct udevice *dev)
 {
+#ifndef CONFIG_TPL_BUILD
 	struct rk322x_clk_priv *priv = dev_get_priv(dev);
-
 	rkclk_init(priv);
-
+#endif
 	return 0;
 }
 

commit 61c13b299ee40281878bfe1af05e306096cf6659
Author: Shunqian Zheng <zhengsq@rock-chips.com>
Date:   Wed Sep 12 14:33:32 2018 +0800

    rockchip: dts: rk312x: correct pwm2 pin mux
    
    rk312x pwm2 pin mux should be gpio0_d4.
    
    Change-Id: I9a4dcf30bd987701ff17ed7cbc828848327a41e9
    Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>

diff --git a/arch/arm/dts/rk3128.dtsi b/arch/arm/dts/rk3128.dtsi
index e0b43c1b03..9bac7e40d8 100644
--- a/arch/arm/dts/rk3128.dtsi
+++ b/arch/arm/dts/rk3128.dtsi
@@ -904,7 +904,7 @@
 
 		pwm2 {
 			pwm2_pin: pwm2-pin {
-				rockchip,pins = <1 RK_PD4 1 &pcfg_pull_none>;
+				rockchip,pins = <0 RK_PD4 1 &pcfg_pull_none>;
 			};
 		};
 

commit 099b8ebcd186f9d17df7073f9cd2f3162e747269
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Fri Oct 26 15:56:34 2018 +0800

    lib: optee_client: fix bug for security partition not find
    
    bug make error R&W when security partition is not defined
    
    Change-Id: Iddf840d3f9c090292e58f73492c20f84e4b3b4ea
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/OpteeClientRkFs-v2.c b/lib/optee_clientApi/OpteeClientRkFs-v2.c
index c0f331dbd4..37f881b815 100644
--- a/lib/optee_clientApi/OpteeClientRkFs-v2.c
+++ b/lib/optee_clientApi/OpteeClientRkFs-v2.c
@@ -159,20 +159,21 @@ static int rkss_read_multi_sections(unsigned char *data, unsigned long index, un
 		dev_desc = rockchip_get_bootdev();
 		if (!dev_desc) {
 			printf("%s: Could not find device\n", __func__);
-			return TEEC_ERROR_GENERIC;
+			return -1;
 		}
 
 		if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
+			dev_desc = NULL;
 			printf("Could not find security partition\n");
-			return TEEC_ERROR_GENERIC;
+			return -1;
 		}
 	}
 	ret = blk_dread(dev_desc, part_info.start + index, num, data);
 	if (ret != num) {
 		printf("blk_dread fail \n");
-		return TEEC_ERROR_GENERIC;
+		return -1;
 	}
-	return TEEC_SUCCESS;
+	return 0;
 }
 
 static int rkss_write_multi_sections(unsigned char *data, unsigned long index, unsigned int num)
@@ -183,20 +184,21 @@ static int rkss_write_multi_sections(unsigned char *data, unsigned long index, u
 		dev_desc = rockchip_get_bootdev();
 		if (!dev_desc) {
 			printf("%s: Could not find device\n", __func__);
-			return TEEC_ERROR_GENERIC;
+			return -1;
 		}
 
 		if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
+			dev_desc = NULL;
 			printf("Could not find security partition\n");
-			return TEEC_ERROR_GENERIC;
+			return -1;
 		}
 	}
 	ret = blk_dwrite(dev_desc, part_info.start + index, num, data);
 	if (ret != num) {
 		printf("blk_dwrite fail \n");
-		return TEEC_ERROR_GENERIC;
+		return -1;
 	}
-	return TEEC_SUCCESS;
+	return 0;
 }
 
 static int rkss_read_patition_tables(unsigned char *data)
@@ -207,20 +209,21 @@ static int rkss_read_patition_tables(unsigned char *data)
 		dev_desc = rockchip_get_bootdev();
 		if (!dev_desc) {
 			printf("%s: Could not find device\n", __func__);
-			return TEEC_ERROR_GENERIC;
+			return -1;
 		}
 
 		if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
+			dev_desc = NULL;
 			printf("Could not find security partition\n");
-			return TEEC_ERROR_GENERIC;
+			return -1;
 		}
 	}
 	ret = blk_dread(dev_desc, part_info.start, RKSS_PARTITION_TABLE_COUNT, data);
 	if (ret != RKSS_PARTITION_TABLE_COUNT) {
 		printf("blk_dread fail \n");
-		return TEEC_ERROR_GENERIC;
+		return -1;
 	}
-	return TEEC_SUCCESS;
+	return 0;
 }
 
 #ifdef DEBUG_RKFSS
diff --git a/lib/optee_clientApi/OpteeClientRkFs.c b/lib/optee_clientApi/OpteeClientRkFs.c
index 179c8c71c9..73b839db8a 100644
--- a/lib/optee_clientApi/OpteeClientRkFs.c
+++ b/lib/optee_clientApi/OpteeClientRkFs.c
@@ -175,6 +175,7 @@ static int rkss_read_multi_sections(unsigned char *data, unsigned long index, un
 		}
 
 		if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
+			dev_desc = NULL;
 			printf("Could not find security partition\n");
 			return -1;
 		}
@@ -204,6 +205,7 @@ static int rkss_write_multi_sections(unsigned char *data, unsigned long index, u
 		}
 
 		if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
+			dev_desc = NULL;
 			printf("Could not find security partition\n");
 			return -1;
 		}
@@ -233,6 +235,7 @@ static int rkss_read_patition_tables(unsigned char *data)
 		}
 
 		if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
+			dev_desc = NULL;
 			printf("Could not find security partition\n");
 			return -1;
 		}

commit 5a616fcf52f0aaa308004becb01428fb3d57dd11
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Mon Oct 29 11:04:35 2018 +0800

    clk: rockchip: rk3288: support aclk_vop freq setting
    
    Change-Id: Ifb595f244608378bff1e6443dfc017418f28ce2a
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3288.h b/arch/arm/include/asm/arch-rockchip/cru_rk3288.h
index 568a119bf4..846a34e6a0 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3288.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3288.h
@@ -155,6 +155,21 @@ enum {
 	DCLK_VOP1_SELECT_NPLL	= 2,
 };
 
+/* CRU_CLKSEL31_CON */
+enum {
+	ACLK_VOP_SELECT_CPLL	= 0,
+	ACLK_VOP_SELECT_GPLL	= 1,
+	ACLK_VOP_SELECT_USB480	= 2,
+	ACLK_VOP1_PLL_SHIFT	= 14,
+	ACLK_VOP1_PLL_MASK	= 3 << ACLK_VOP1_PLL_SHIFT,
+	ACLK_VOP1_DIV_SHIFT	= 8,
+	ACLK_VOP1_DIV_MASK	= 0x1f << ACLK_VOP1_DIV_SHIFT,
+	ACLK_VOP0_PLL_SHIFT	= 6,
+	ACLK_VOP0_PLL_MASK	= 3 << ACLK_VOP0_PLL_SHIFT,
+	ACLK_VOP0_DIV_SHIFT	= 0,
+	ACLK_VOP0_DIV_MASK	= 0x1f << ACLK_VOP0_DIV_SHIFT,
+};
+
 /* CRU_CLKSEL37_CON */
 enum {
 	PCLK_CORE_DBG_DIV_SHIFT	= 9,
diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index 0c6a4651c2..941b619454 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -379,7 +379,7 @@ static int rockchip_vop_set_clk(struct rk3288_cru *cru, struct rk3288_grf *grf,
 	struct pll_div cpll_config = {0};
 	u32 lcdc_div, parent;
 	int ret;
-	unsigned int gpll_rate, npll_rate;
+	unsigned int gpll_rate, npll_rate, cpll_rate;
 
 	gpll_rate = rkclk_pll_get_rate(cru, CLK_GENERAL);
 	npll_rate = rkclk_pll_get_rate(cru, CLK_NEW);
@@ -387,7 +387,7 @@ static int rockchip_vop_set_clk(struct rk3288_cru *cru, struct rk3288_grf *grf,
 	/* vop dclk source clk: cpll,dclk_div: 1 */
 	switch (periph) {
 	case DCLK_VOP0:
-		ret = (readl(&cru->cru_clksel_con[27]) && DCLK_VOP0_PLL_MASK) >>
+		ret = (readl(&cru->cru_clksel_con[27]) & DCLK_VOP0_PLL_MASK) >>
 		      DCLK_VOP0_PLL_SHIFT;
 		if (ret == DCLK_VOP0_SELECT_CPLL) {
 			ret = pll_para_config(rate_hz, &cpll_config, &lcdc_div);
@@ -424,7 +424,7 @@ static int rockchip_vop_set_clk(struct rk3288_cru *cru, struct rk3288_grf *grf,
 			     (parent << DCLK_VOP0_PLL_SHIFT));
 		break;
 	case DCLK_VOP1:
-		ret = (readl(&cru->cru_clksel_con[29]) && DCLK_VOP1_PLL_MASK) >>
+		ret = (readl(&cru->cru_clksel_con[29]) & DCLK_VOP1_PLL_MASK) >>
 		      DCLK_VOP1_PLL_SHIFT;
 		if (ret == DCLK_VOP1_SELECT_CPLL) {
 			ret = pll_para_config(rate_hz, &cpll_config, &lcdc_div);
@@ -461,6 +461,22 @@ static int rockchip_vop_set_clk(struct rk3288_cru *cru, struct rk3288_grf *grf,
 			     ((lcdc_div - 1) << DCLK_VOP1_DIV_SHIFT) |
 			     (parent << DCLK_VOP1_PLL_SHIFT));
 		break;
+	case ACLK_VOP0:
+		cpll_rate = rkclk_pll_get_rate(cru, CLK_CODEC);
+		lcdc_div = DIV_ROUND_UP(cpll_rate, rate_hz);
+		rk_clrsetreg(&cru->cru_clksel_con[31],
+			     ACLK_VOP0_PLL_MASK | ACLK_VOP0_DIV_MASK,
+			     ACLK_VOP_SELECT_CPLL << ACLK_VOP0_PLL_SHIFT |
+			     (lcdc_div - 1) << ACLK_VOP0_DIV_SHIFT);
+		break;
+	case ACLK_VOP1:
+		cpll_rate = rkclk_pll_get_rate(cru, CLK_CODEC);
+		lcdc_div = DIV_ROUND_UP(cpll_rate, rate_hz);
+		rk_clrsetreg(&cru->cru_clksel_con[31],
+			     ACLK_VOP1_PLL_MASK | ACLK_VOP1_DIV_MASK,
+			     ACLK_VOP_SELECT_CPLL << ACLK_VOP1_PLL_SHIFT |
+			     (lcdc_div - 1) << ACLK_VOP1_DIV_SHIFT);
+		break;
 	}
 
 	return 0;
@@ -865,6 +881,8 @@ static ulong rk3288_clk_set_rate(struct clk *clk, ulong rate)
 		break;
 	case DCLK_VOP0:
 	case DCLK_VOP1:
+	case ACLK_VOP0:
+	case ACLK_VOP1:
 		new_rate = rockchip_vop_set_clk(cru, priv->grf, clk->id, rate);
 		break;
 	case SCLK_EDP_24M:
@@ -877,29 +895,6 @@ static ulong rk3288_clk_set_rate(struct clk *clk, ulong rate)
 		rk_clrreg(&cru->cru_clksel_con[6], 1 << 15);
 		new_rate = rate;
 		break;
-	case ACLK_VOP0:
-	case ACLK_VOP1: {
-		u32 div;
-
-		/* vop aclk source clk: cpll */
-		div = CPLL_HZ / rate;
-		assert((div - 1 < 64) && (div * rate == CPLL_HZ));
-
-		switch (clk->id) {
-		case ACLK_VOP0:
-			rk_clrsetreg(&cru->cru_clksel_con[31],
-				     3 << 6 | 0x1f << 0,
-				     0 << 6 | (div - 1) << 0);
-			break;
-		case ACLK_VOP1:
-			rk_clrsetreg(&cru->cru_clksel_con[31],
-				     3 << 14 | 0x1f << 8,
-				     0 << 14 | (div - 1) << 8);
-			break;
-		}
-		new_rate = rate;
-		break;
-	}
 	case PCLK_HDMI_CTRL:
 		/* enable pclk hdmi ctrl */
 		rk_clrreg(&cru->cru_clkgate_con[16], 1 << 9);

commit 78d830ca5bf0a0b904748403c801d5fa3a8ddc8f
Author: Gaoyang Ye <gaoyang.ye@rock-chips.com>
Date:   Fri Oct 12 14:36:37 2018 +0800

    video/drm: logo: fix show 8bit bmp logo failed
    
    Remark: 3996562  (Add: Allow logo in 16bit or 32bit color BMP)
    
    Change-Id: Ie5b1ed4af1c09ad0af3101b882278ecf3b8c6b35
    Signed-off-by: Gaoyang Ye <gaoyang.ye@rock-chips.com>

diff --git a/drivers/video/drm/bmp_helper.c b/drivers/video/drm/bmp_helper.c
index 523506f278..ca4d92b4e7 100644
--- a/drivers/video/drm/bmp_helper.c
+++ b/drivers/video/drm/bmp_helper.c
@@ -163,14 +163,13 @@ static void dump_bmp_dib_head(void *bmp_addr)
 		bmp->header.colors_used);
 }
 
-int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp)
+int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp, bool flip)
 {
 	int i, j;
 	int stride, padded_width, bpp, width, height;
 	struct bmp_image *bmp = bmp_addr;
 	uint8_t *src = bmp_addr;
 	uint8_t *dst = pdst;
-	bool flip = false;
 	uint16_t *cmap;
 	uint8_t *cmap_base;
 
@@ -185,11 +184,10 @@ int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp)
 	bpp = get_unaligned_le16(&bmp->header.bit_count);
 	padded_width = width & 0x3 ? (width & ~0x3) + 4 : width;
 
-	if (height < 0)
+	if (height < 0) {
 		height = 0 - height;
-	else
-		flip = true;
-
+		flip = false;
+	}
 	cmap_base = src + sizeof(bmp->header);
 	src = bmp_addr + get_unaligned_le32(&bmp->header.data_offset);
 
diff --git a/drivers/video/drm/bmp_helper.h b/drivers/video/drm/bmp_helper.h
index 5e125004d2..0a875f829d 100644
--- a/drivers/video/drm/bmp_helper.h
+++ b/drivers/video/drm/bmp_helper.h
@@ -15,5 +15,5 @@
 
 #define range(x, min, max) ((x) < (min)) ? (min) : (((x) > (max)) ? (max) : (x))
 
-int bmpdecoder(void *bmp_addr, void *dst, int dst_bpp);
+int bmpdecoder(void *bmp_addr, void *dst, int dst_bpp, bool flip);
 #endif /* _BMP_HELPER_H_ */
diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index d8799ae909..69aa6b94c6 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -166,6 +166,11 @@ static unsigned long get_display_size(void)
 	return memory_end - memory_start;
 }
 
+static bool bmp_can_disp_direct(struct logo_info *logo)
+{
+	return logo->bpp == 24 || logo->bpp == 32;
+}
+
 /**
  * vop_support_ymirror - ensure whethere vop support the feature of ymirror.
  * @logo:	the pointer to the logo information.
@@ -179,21 +184,23 @@ static bool vop_support_ymirror(struct logo_info *logo)
 
 	ret = false;
 	state = container_of(logo, struct display_state, logo);
-	if (state->crtc_state.crtc->data) {
-		vop_data = (struct vop_data *)state->crtc_state.crtc->data;
+
+	vop_data = (struct vop_data *)state->crtc_state.crtc->data;
+	if (vop_data) {
 		printf("VOP hardware version v%d.%d, ",
 		       VOP_MAJOR(vop_data->version),
 		       VOP_MINOR(vop_data->version));
+
 		/*
 		 * if the version of VOP is higher than v3.0,
 		 * which means that the VOP support ymirror,
 		 * so it isn't need to mirror image by ourself.
 		 */
-		if (vop_data->version >= VOP_VERSION(3, 0)) {
-			printf("Support mirror mode.\n");
+		if (VOP_WIN_SUPPORT(vop_data, vop_data->win, ymirror)) {
+			printf("support mirror mode.\n");
 			ret = true;
 		} else {
-			printf("Not support mirror mode.\n");
+			printf("not support mirror mode.\n");
 		}
 	} else {
 		printf("Error: CRTC drivers is not ready.\n");
@@ -965,12 +972,14 @@ static int display_logo(struct display_state *state)
 		printf("can't support bmp bits[%d]\n", logo->bpp);
 		return -EINVAL;
 	}
+
 	hdisplay = conn_state->mode.hdisplay;
 	vdisplay = conn_state->mode.vdisplay;
 	crtc_state->src_w = logo->width;
 	crtc_state->src_h = logo->height;
 	crtc_state->src_x = 0;
 	crtc_state->src_y = 0;
+	crtc_state->rb_swap = logo->rb_swap;
 	crtc_state->ymirror = logo->ymirror;
 
 	crtc_state->dma_addr = (u32)(unsigned long)logo->mem + logo->offset;
@@ -1123,6 +1132,8 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 	struct rockchip_logo_cache *logo_cache;
 	struct bmp_header *header;
 	void *dst = NULL, *pdst;
+	bool bmp_disp_direct = false;
+	bool vop_supp_ymirror = false;
 	int size, len;
 	int ret = 0;
 
@@ -1167,22 +1178,24 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 		ret = -ENOENT;
 		goto free_header;
 	}
-
-	if (!vop_support_ymirror(logo)) {
+	vop_supp_ymirror = vop_support_ymirror(logo);
+	bmp_disp_direct = bmp_can_disp_direct(logo);
+	if (!vop_supp_ymirror || !bmp_disp_direct) {
 		int dst_size;
 		/*
 		 * TODO: force use 16bpp if bpp less than 16;
 		 */
+		logo->rb_swap = (logo->bpp == 8 ? true : false);
 		logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp;
 		dst_size = logo->width * logo->height * logo->bpp >> 3;
-
 		dst = get_display_buffer(dst_size);
 		if (!dst) {
 			ret = -ENOMEM;
 			goto free_header;
 		}
 		memset(dst, 0, dst_size);
-		if (bmpdecoder(pdst, dst, logo->bpp)) {
+		if (bmpdecoder(pdst, dst, logo->bpp,
+			       !vop_supp_ymirror)) {
 			printf("failed to decode bmp %s\n", bmp_name);
 			ret = -EINVAL;
 			goto free_header;
@@ -1190,12 +1203,12 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 		flush_dcache_range((ulong)dst,
 				   ALIGN((ulong)dst + dst_size,
 					 CONFIG_SYS_CACHELINE_SIZE));
-
 		logo->offset = 0;
-		logo->ymirror = 0;
+		logo->ymirror = vop_supp_ymirror;
 	} else {
 		logo->offset = get_unaligned_le32(&header->data_offset);
-		logo->ymirror = 1;
+		logo->rb_swap = (logo->bpp != 32 ? true : false);
+		logo->ymirror = true;
 	}
 	logo->mem = dst;
 
diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index d30eb50c4b..0173face1a 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -130,6 +130,7 @@ struct connector_state {
 struct logo_info {
 	int mode;
 	char *mem;
+	bool rb_swap;
 	bool ymirror;
 	u32 offset;
 	u32 width;
diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index b0fa315537..01986844b1 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -72,7 +72,7 @@ static const struct vop_win rk3288_win01_data = {
 	.enable = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 0),
 	.format = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 1),
 	.rb_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 12),
-	.ymirror = VOP_REG_VER(RK3368_WIN0_CTRL0, 0x1, 22, 3, 2, -1),
+	.ymirror = VOP_REG_VER(RK3288_DSP_CTRL0, 0x1, 23, 3, 1, -1),
 	.act_info = VOP_REG(RK3288_WIN0_ACT_INFO, 0x1fff1fff, 0),
 	.dsp_info = VOP_REG(RK3288_WIN0_DSP_INFO, 0x0fff0fff, 0),
 	.dsp_st = VOP_REG(RK3288_WIN0_DSP_ST, 0x1fff1fff, 0),

commit 4171cf46e3d13ab294cdafc102c9f5ab0ee2ad86
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Oct 29 15:29:36 2018 +0800

    android: fix error when the vbmeta is NULL or verification error
    
    If the vbmeta has no data or verify errors occur, the system get abort:
    "Synchronous Abort" handler, esr 0x96000010
    * Relocate offset = 000000003db40000
    * ELR(PC)    =   0000000000220d2c
    * LR         =   0000000000220d08
    * SP         =   0000000031d35040
    
    Change-Id: I452e9b109ef5f61dfc338ff5bfb72a687a2b0003
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index c24f9e8b85..367a258d52 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -436,6 +436,7 @@ static AvbSlotVerifyResult android_slot_verify(char *boot_partname,
 	AvbABData ab_data, ab_data_orig;
 	size_t slot_index_to_boot = 0;
 	char verify_state[38] = {0};
+	char can_boot = 1;
 
 	requested_partitions[0] = boot_partname;
 	ops = avb_ops_user_new();
@@ -502,6 +503,11 @@ static AvbSlotVerifyResult android_slot_verify(char *boot_partname,
 		break;
 	}
 
+	if (!slot_data[0]) {
+		can_boot = 0;
+		goto out;
+	}
+
 	if (verify_result == AVB_SLOT_VERIFY_RESULT_OK ||
 	    verify_result == AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED ||
 	    (unlocked & LOCK_MASK)) {
@@ -546,6 +552,7 @@ static AvbSlotVerifyResult android_slot_verify(char *boot_partname,
 		slot_set_unbootable(&ab_data.slots[slot_index_to_boot]);
 	}
 
+out:
 	env_update("bootargs", verify_state);
 	if (save_metadata_if_changed(ops->ab_ops, &ab_data, &ab_data_orig)) {
 		printf("Can not save metadata\n");
@@ -555,7 +562,7 @@ static AvbSlotVerifyResult android_slot_verify(char *boot_partname,
 	if (slot_data[0] != NULL)
 		avb_slot_verify_data_free(slot_data[0]);
 
-	if (unlocked & LOCK_MASK)
+	if ((unlocked & LOCK_MASK) && can_boot)
 		return 0;
 	else
 		return verify_result;

commit b7ecfec62c4ce14e2764792ddd51bcda0fed9741
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Oct 25 15:53:00 2018 +0800

    rockchip: update kernel default load address
    
    The 32bit arm kernel load address should be end with 0x8000 for
    non-compress Image.
    The compress zImage is fine for different address because the
    decomporess program will copy the Image to address end with 0x8000.
    
    Change-Id: I26fc58f06324fd93dbaeeb39a0b81c81fde0fef5
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h
index 7ef5972e24..fd7fce2c80 100644
--- a/include/configs/rk3128_common.h
+++ b/include/configs/rk3128_common.h
@@ -56,7 +56,7 @@
 	"scriptaddr=0x60500000\0" \
 	"pxefile_addr_r=0x60600000\0" \
 	"fdt_addr_r=0x61f00000\0" \
-	"kernel_addr_r=0x62000000\0" \
+	"kernel_addr_r=0x62008000\0" \
 	"ramdisk_addr_r=0x64000000\0"
 
 #include <config_distro_bootcmd.h>
diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h
index f30ed6e753..947bb176e2 100644
--- a/include/configs/rk322x_common.h
+++ b/include/configs/rk322x_common.h
@@ -45,7 +45,7 @@
 	"scriptaddr=0x60000000\0" \
 	"pxefile_addr_r=0x60100000\0" \
 	"fdt_addr_r=0x61f00000\0" \
-	"kernel_addr_r=0x62000000\0" \
+	"kernel_addr_r=0x62008000\0" \
 	"ramdisk_addr_r=0x64000000\0"
 
 #include <config_distro_bootcmd.h>
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index 0685002b05..8faf67d8ee 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -73,7 +73,7 @@
 	"scriptaddr=0x00000000\0" \
 	"pxefile_addr_r=0x00100000\0" \
 	"fdt_addr_r=0x01f00000\0" \
-	"kernel_addr_r=0x02000000\0" \
+	"kernel_addr_r=0x02008000\0" \
 	"ramdisk_addr_r=0x04000000\0"
 
 #include <config_distro_bootcmd.h>

commit 4711f91491300727937a3a02df8b6ad0bc24c3eb
Author: Jian Qiu <qiujian@rock-chips.com>
Date:   Wed Oct 24 17:04:12 2018 +0800

    lib: optee_client: Reduce keymaster ta size
    
    Change-Id: I2a82e33f92123ba29e6fb456b4e6b35312620e64
    Signed-off-by: Jian Qiu <qiujian@rock-chips.com>

diff --git a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta
index 53809c04ff..a18356d16a 100644
Binary files a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta and b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta differ
diff --git a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta
index dfdefc81d8..66daec857b 100644
Binary files a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta and b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta differ

commit 6259b22e60ef6869825b19214eba043d34d093c8
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Oct 25 10:39:04 2018 +0800

    clk: rockchip: rk1808: add pll 100M config parameters
    
    PPLL 100M use refdiv =1 fbdiv = 150, postdiv1= 6,
    postdiv2=6, vco= 3.6G, is best for pcie.
    
    Change-Id: Ie9fddbb32baa0d4b8883b399b0e903b83afc820f
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk1808.c b/drivers/clk/rockchip/clk_rk1808.c
index 260b4224be..4eddd0aaa9 100644
--- a/drivers/clk/rockchip/clk_rk1808.c
+++ b/drivers/clk/rockchip/clk_rk1808.c
@@ -42,6 +42,7 @@ static struct rockchip_pll_rate_table rk1808_pll_rates[] = {
 	RK3036_PLL_RATE(594000000, 2, 99, 2, 1, 1, 0),
 	RK3036_PLL_RATE(500000000, 6, 250, 2, 1, 1, 0),
 	RK3036_PLL_RATE(200000000, 1, 200, 6, 4, 1, 0),
+	RK3036_PLL_RATE(100000000, 1, 150, 6, 6, 1, 0),
 	{ /* sentinel */ },
 };
 

commit 93c44d3481025e0a013d24b16c2e063dc867b1f4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Oct 25 11:39:45 2018 +0800

    configs: rk322x-gva/evb: increase CONFIG_SYS_MALLOC_F_LEN to 0x1000
    
    fix out of memory when bind pre-reloc drivers
    
    Change-Id: I7aecb52b117612ba31f58af7764928b2791c1402
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index 32502c215f..49cdf3bb40 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -2,7 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SYS_MALLOC_F_LEN=0x800
+CONFIG_SYS_MALLOC_F_LEN=0x1000
 CONFIG_ROCKCHIP_RK322X=y
 CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl.lds"
 CONFIG_TPL_TEXT_BASE=0x10081000
diff --git a/configs/gva-rk3229_defconfig b/configs/gva-rk3229_defconfig
index f438447f61..e2230b5322 100644
--- a/configs/gva-rk3229_defconfig
+++ b/configs/gva-rk3229_defconfig
@@ -2,7 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SYS_MALLOC_F_LEN=0x800
+CONFIG_SYS_MALLOC_F_LEN=0x1000
 CONFIG_ROCKCHIP_RK322X=y
 CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl.lds"
 CONFIG_TPL_TEXT_BASE=0x10081004

commit a88d9d29380613d2aa323966b43c6da7f2ec9207
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Oct 25 11:39:16 2018 +0800

    configs: rk3128x: increase CONFIG_SYS_MALLOC_F_LEN to 0x1000
    
    fix out of memory when bind pre-reloc drivers
    
    Change-Id: I8c936e45db0e813966eb09a0d39685a11d0ef597
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3128x_defconfig b/configs/rk3128x_defconfig
index 665f8a226d..965309bf4f 100644
--- a/configs/rk3128x_defconfig
+++ b/configs/rk3128x_defconfig
@@ -2,7 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SYS_MALLOC_F_LEN=0x800
+CONFIG_SYS_MALLOC_F_LEN=0x1000
 CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl.lds"
 CONFIG_TPL_TEXT_BASE=0x10081000
 CONFIG_TPL_MAX_SIZE=28672

commit 5553e43343078d41d58b8a12d15741f2336a00fb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 23 18:11:58 2018 +0800

    configs: rk322x: increase CONFIG_SYS_MALLOC_F_LEN to 0x1000
    
    fix out of memory when bind pre-reloc drivers
    
    Change-Id: I1e0826b026d15ebf5f410cab19652c3a040a1805
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk322x_defconfig b/configs/rk322x_defconfig
index bd8b4daf4f..728458d59a 100644
--- a/configs/rk322x_defconfig
+++ b/configs/rk322x_defconfig
@@ -2,7 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SYS_MALLOC_F_LEN=0x800
+CONFIG_SYS_MALLOC_F_LEN=0x1000
 CONFIG_ROCKCHIP_RK322X=y
 CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl.lds"
 CONFIG_TPL_TEXT_BASE=0x10081000

commit 2dd69d6619d0e0e038e5b570d64ede5bb231688b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 23 18:14:10 2018 +0800

    rockchip: dts: px30/rk3326: move dm-pre-reloc nodes to *-u-boot.dtsi
    
    it makes users easy to override their kernel dts when
    CONFIG_USING_KERNEL_DTB is disabled.
    
    Change-Id: Ia197686bef465b3c49c2be6ed7486ec9d672155e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/px30-evb.dts b/arch/arm/dts/px30-evb.dts
index 9eaa7d88e7..83e93d015a 100644
--- a/arch/arm/dts/px30-evb.dts
+++ b/arch/arm/dts/px30-evb.dts
@@ -13,16 +13,6 @@
 	model = "Rockchip PX30 EVB";
 	compatible = "rockchip,px30-evb", "rockchip,px30";
 
-	chosen {
-		stdout-path = &uart2;
-	};
-
-	dmc: dmc@20004000 {
-		u-boot,dm-pre-reloc;
-		compatible = "rockchip,px30-dmc", "syscon";
-		reg = <0x0 0xff2a0000 0x0 0x1000>;
-	};
-
 	adc-keys {
 		u-boot,dm-pre-reloc;
 		compatible = "adc-keys";
@@ -412,7 +402,7 @@
 	status = "okay";
 };
 
-&saradc {
+&uart2 {
 	status = "okay";
 };
 
diff --git a/arch/arm/dts/px30-u-boot.dtsi b/arch/arm/dts/px30-u-boot.dtsi
index 0e294196b5..ae3e4f973a 100644
--- a/arch/arm/dts/px30-u-boot.dtsi
+++ b/arch/arm/dts/px30-u-boot.dtsi
@@ -9,12 +9,19 @@
 		mmc0 = &emmc;
 		mmc1 = &sdmmc;
 	};
+
+	chosen {
+		stdout-path = &uart2;
+	};
+};
+
+&dmc {
+	u-boot,dm-pre-reloc;
 };
 
 &uart2 {
 	clock-frequency = <24000000>;
 	u-boot,dm-pre-reloc;
-	status = "okay";
 };
 
 &nandc0 {
diff --git a/arch/arm/dts/px30.dtsi b/arch/arm/dts/px30.dtsi
index 85c6460f60..668eb51257 100644
--- a/arch/arm/dts/px30.dtsi
+++ b/arch/arm/dts/px30.dtsi
@@ -69,6 +69,11 @@
 		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
 	};
 
+	dmc: dmc {
+		compatible = "rockchip,px30-dmc", "syscon";
+		reg = <0x0 0xff2a0000 0x0 0x1000>;
+	};
+
 	display_subsystem: display-subsystem {
 		compatible = "rockchip,display-subsystem";
 		ports = <&vopb_out>, <&vopl_out>;
diff --git a/arch/arm/dts/rk3326-evb.dts b/arch/arm/dts/rk3326-evb.dts
index fca2dac8be..6427423c0e 100644
--- a/arch/arm/dts/rk3326-evb.dts
+++ b/arch/arm/dts/rk3326-evb.dts
@@ -13,16 +13,6 @@
 	model = "Rockchip RK3326 EVB";
 	compatible = "rockchip,rk3326-evb", "rockchip,rk3326";
 
-	chosen {
-		stdout-path = &uart2;
-	};
-
-	dmc: dmc {
-		u-boot,dm-pre-reloc;
-		compatible = "rockchip,px30-dmc", "syscon";
-		reg = <0x0 0xff2a0000 0x0 0x1000>;
-	};
-
 	adc-keys {
 		u-boot,dm-pre-reloc;
 		compatible = "adc-keys";
@@ -436,3 +426,7 @@
 &u2phy_host {
 	status = "okay";
 };
+
+&uart2 {
+	status = "okay";
+};

commit a2815bda5f240d3db7fe7ca8e5f9aecc847ff97c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 23 18:10:12 2018 +0800

    rockchip: dts: rk322x: move dm-pre-reloc nodes to *-u-boot.dtsi
    
    it makes users easy to override their kernel dts when
    CONFIG_USING_KERNEL_DTB is disabled.
    
    Change-Id: I0537f3aa0232901c3f506fa86a94bf07881bb06e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3229-evb.dts b/arch/arm/dts/rk3229-evb.dts
index f43fe86f6a..09665abb4c 100644
--- a/arch/arm/dts/rk3229-evb.dts
+++ b/arch/arm/dts/rk3229-evb.dts
@@ -7,21 +7,13 @@
 /dts-v1/;
 
 #include "rk322x.dtsi"
+#include "rk322x-u-boot.dtsi"
 #include <dt-bindings/input/input.h>
 
 / {
 	model = "Rockchip RK3229 Evaluation board";
 	compatible = "rockchip,rk3229-evb", "rockchip,rk3229";
 
-	chosen {
-		stdout-path = &uart2;
-	};
-
-	memory@60000000 {
-		device_type = "memory";
-		reg = <0x60000000 0x40000000>;
-	};
-
 	ext_gmac: ext_gmac {
 		compatible = "fixed-clock";
 		clock-frequency = <125000000>;
@@ -68,7 +60,6 @@
 };
 
 &emmc {
-	u-boot,dm-pre-reloc;
 	status = "okay";
 };
 
@@ -84,7 +75,6 @@
 };
 
 &uart2 {
-	u-boot,dm-pre-reloc;
 	status = "okay";
 };
 
diff --git a/arch/arm/dts/rk3229-gva.dts b/arch/arm/dts/rk3229-gva.dts
index f6a8f97121..79770a95d9 100644
--- a/arch/arm/dts/rk3229-gva.dts
+++ b/arch/arm/dts/rk3229-gva.dts
@@ -7,6 +7,7 @@
 /dts-v1/;
 
 #include "rk322x.dtsi"
+#include "rk322x-u-boot.dtsi"
 #include <dt-bindings/input/input.h>
 
 / {
@@ -288,12 +289,10 @@
 };
 
 &emmc {
-	u-boot,dm-pre-reloc;
 	status = "okay";
 };
 
 &uart2 {
-	u-boot,dm-pre-reloc;
 	status = "okay";
 };
 
diff --git a/arch/arm/dts/rk322x-u-boot.dtsi b/arch/arm/dts/rk322x-u-boot.dtsi
new file mode 100644
index 0000000000..4246af1b6c
--- /dev/null
+++ b/arch/arm/dts/rk322x-u-boot.dtsi
@@ -0,0 +1,44 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+/ {
+	aliases {
+		mmc0 = &emmc;
+		mmc1 = &sdmmc;
+	};
+
+	chosen {
+		stdout-path = &uart2;
+	};
+};
+
+&cru {
+	u-boot,dm-pre-reloc;
+};
+
+&dmc {
+	u-boot,dm-pre-reloc;
+};
+
+&grf {
+	u-boot,dm-pre-reloc;
+};
+
+&service_msch {
+	u-boot,dm-pre-reloc;
+};
+
+&emmc {
+	u-boot,dm-pre-reloc;
+};
+
+&sdmmc {
+	u-boot,dm-pre-reloc;
+};
+
+&uart2 {
+	u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/rk322x.dtsi b/arch/arm/dts/rk322x.dtsi
index e05835267d..f5fb16b6e1 100644
--- a/arch/arm/dts/rk322x.dtsi
+++ b/arch/arm/dts/rk322x.dtsi
@@ -91,6 +91,11 @@
 		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
 	};
 
+	memory@60000000 {
+		device_type = "memory";
+		reg = <0x60000000 0x40000000>;
+	};
+
 	timer {
 		compatible = "arm,armv7-timer";
 		arm,cpu-registers-not-fw-configured;
@@ -166,7 +171,6 @@
 	};
 
 	grf: syscon@11000000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3228-grf", "syscon";
 		reg = <0x11000000 0x1000>;
 		#address-cells = <1>;
@@ -380,7 +384,6 @@
 	};
 
 	cru: clock-controller@110e0000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3228-cru";
 		reg = <0x110e0000 0x1000>;
 		rockchip,grf = <&grf>;
@@ -835,7 +838,6 @@
 	};
 
 	dmc: dmc@11200000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3228-dmc", "syscon";
 		rockchip,cru = <&cru>;
 		rockchip,grf = <&grf>;
@@ -846,7 +848,6 @@
 	};
 
 	service_msch: syscon@31090000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3228-msch", "syscon";
 		reg = <0x31090000 0x2000>;
 	};

commit 99484ec71f2b633548eddf7c78d75b412c53b33d
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Mon Oct 22 21:02:26 2018 +0800

    configs: rk3288: enable hdmi display
    
    and remove some unused config
    
    Change-Id: I01d19513037b88e2fd1467180045375934cb2ae8
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/configs/rk3288_defconfig b/configs/rk3288_defconfig
index f7522aeeaf..c0e6284571 100644
--- a/configs/rk3288_defconfig
+++ b/configs/rk3288_defconfig
@@ -81,10 +81,8 @@ CONFIG_G_DNL_VENDOR_NUM=0x2207
 CONFIG_G_DNL_PRODUCT_NUM=0x320a
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
-CONFIG_VIDEO_ROCKCHIP=y
-CONFIG_VIDEO_ROCKCHIP_MAX_YRES=1200
-CONFIG_DISPLAY_ROCKCHIP_MIPI=y
 CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_DW_HDMI=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
 CONFIG_DRM_ROCKCHIP_LVDS=y

commit 918c540d289c784b0cc5bb6d9232d4bbf329d2f6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 23 17:29:39 2018 +0800

    rockchip: dts: rk3328: add adc key pre-reloc support
    
    clean up node to *-u-boot.dtsi and coding style.
    
    Change-Id: I9e7bd550cd9b86d273c7e833f751686955b98242
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts
index aafafec649..c7256de867 100644
--- a/arch/arm/dts/rk3328-evb.dts
+++ b/arch/arm/dts/rk3328-evb.dts
@@ -8,13 +8,27 @@
 #include "rk3328.dtsi"
 #include "rk3328-u-boot.dtsi"
 #include "rk3328-sdram-ddr3-666.dtsi"
+#include <dt-bindings/input/input.h>
 
 / {
 	model = "Rockchip RK3328 EVB";
 	compatible = "rockchip,rk3328-evb", "rockchip,rk3328";
 
-	chosen {
-		stdout-path = &uart2;
+	adc-keys {
+		status = "okay";
+
+		u-boot,dm-pre-reloc;
+		compatible = "adc-keys";
+		io-channels = <&saradc 0>;
+		io-channel-names = "buttons";
+		keyup-threshold-microvolt = <1800000>;
+
+		vol-up-key {
+			u-boot,dm-pre-reloc;
+			linux,code = <KEY_VOLUMEUP>;
+			label = "volume up";
+			press-threshold-microvolt = <10000>;
+		};
 	};
 
 	gmac_clkin: external-gmac-clock {
@@ -58,10 +72,6 @@
 	};
 };
 
-&saradc {
-	status = "okay";
-};
-
 &uart2 {
 	status = "okay";
 };
@@ -107,15 +117,15 @@
 };
 
 &u2phy {
-        status = "okay";
+	status = "okay";
 };
 
 &u2phy_otg {
-        status = "okay";
+	status = "okay";
 };
 
 &u2phy_host {
-        status = "okay";
+	status = "okay";
 };
 
 &usb_host0_ehci {
diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi
index 2a92490190..7a07362a95 100644
--- a/arch/arm/dts/rk3328-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-u-boot.dtsi
@@ -9,6 +9,11 @@
 		mmc0 = &emmc;
 		mmc1 = &sdmmc;
 	};
+
+	chosen {
+		stdout-path = &uart2;
+	};
+
 };
 
 &cru {
@@ -35,6 +40,11 @@
 	u-boot,dm-pre-reloc;
 };
 
+&saradc {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 &usb20_otg {
 	u-boot,dm-pre-reloc;
 };

commit bcf84996f0eb29eedad33b308776f7c95380e9b0
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 22 21:39:34 2018 +0800

    rockchip: rk3308: fix adc key read failed when kernel dtb is enabled
    
    return negative erro num makes board_r.c bootflow abort, so that
    the adc key driver can not be probe.
    
    Change-Id: I815b16427dc4bf1fdeaab3b75077ed40f5a2beab
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3308/rk3308.c b/arch/arm/mach-rockchip/rk3308/rk3308.c
index 586c4efcf2..c864b31c2e 100644
--- a/arch/arm/mach-rockchip/rk3308/rk3308.c
+++ b/arch/arm/mach-rockchip/rk3308/rk3308.c
@@ -104,8 +104,8 @@ int rk_board_init(void)
 
 	ret = gpio_request(GPIO0_A4, "gpio0_a4");
 	if (ret < 0) {
-		debug("request for gpio0_a4 failed:%d\n", ret);
-		return ret;
+		printf("request for gpio0_a4 failed:%d\n", ret);
+		return 0;
 	}
 
 	gpio_direction_input(GPIO0_A4);
diff --git a/board/rockchip/evb_rk3308/evb_rk3308.c b/board/rockchip/evb_rk3308/evb_rk3308.c
index fad6b81f37..e823a34ef1 100644
--- a/board/rockchip/evb_rk3308/evb_rk3308.c
+++ b/board/rockchip/evb_rk3308/evb_rk3308.c
@@ -12,6 +12,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define KEY_DOWN_MIN_VAL        0
 #define KEY_DOWN_MAX_VAL        30
 
+#ifndef CONFIG_USING_KERNEL_DTB
 /*
  * Two board variants whith adc channel 3 is for board id
  * v10: 1024, v11: 512
@@ -43,3 +44,4 @@ int rockchip_dnl_key_pressed(void)
 	else
 		return false;
 }
+#endif

commit bbbd2329f3b1db750ae5bff865e7921e23b8864b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 22 21:38:03 2018 +0800

    rockchip: dts: rk3308: support using U-Boot usb otg
    
    If kernel dtb is enabled but not load correctly, we
    could still use U-Boot usb otg to enter rockusb mode.
    
    Change-Id: If304fa157a7a720be7db054d3fab0d63e13aef9c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-evb-u-boot.dtsi b/arch/arm/dts/rk3308-evb-u-boot.dtsi
index 7dabf27e04..4da226322c 100644
--- a/arch/arm/dts/rk3308-evb-u-boot.dtsi
+++ b/arch/arm/dts/rk3308-evb-u-boot.dtsi
@@ -64,6 +64,10 @@
 	u-boot,dm-pre-reloc;
 };
 
+&usb2phy_grf {
+	u-boot,dm-pre-reloc;
+};
+
 &u2phy {
 	u-boot,dm-pre-reloc;
 	status = "okay";
diff --git a/arch/arm/dts/rk3308-evb.dts b/arch/arm/dts/rk3308-evb.dts
index 8293adabef..d3853ef3eb 100644
--- a/arch/arm/dts/rk3308-evb.dts
+++ b/arch/arm/dts/rk3308-evb.dts
@@ -14,6 +14,7 @@
 	compatible = "rockchip,rk3308-evb", "rockchip,rk3308";
 
 	adc-keys0 {
+		u-boot,dm-pre-reloc;
 		compatible = "adc-keys";
 		io-channels = <&saradc 0>;
 		io-channel-names = "buttons";
@@ -21,6 +22,7 @@
 		keyup-threshold-microvolt = <1800000>;
 
 		vol-up-key {
+			u-boot,dm-pre-reloc;
 			linux,code = <KEY_VOLUMEUP>;
 			label = "volume up";
 			press-threshold-microvolt = <18000>;
@@ -28,6 +30,7 @@
 	};
 
 	adc-keys1 {
+		u-boot,dm-pre-reloc;
 		compatible = "adc-keys";
 		io-channels = <&saradc 1>;
 		io-channel-names = "buttons";
@@ -59,6 +62,7 @@
 		};
 
 		vol-up-key {
+			u-boot,dm-pre-reloc;
 			linux,code = <KEY_VOLUMEUP>;
 			label = "volume up";
 			press-threshold-microvolt = <18000>;

commit eeccd3064a868cef914671d809ec6c90a0de7872
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 22 20:36:58 2018 +0800

    rockchip: dts: rk3308: move dm-pre-reloc nodes to *-u-boot.dtsi
    
    it makes users easy to override their kernel dts when
    CONFIG_USING_KERNEL_DTB is disabled.
    
    Change-Id: Id20c365729ca249171b3b8d131365ed5db4fa212
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-evb-u-boot.dtsi b/arch/arm/dts/rk3308-evb-u-boot.dtsi
index 5381939309..7dabf27e04 100644
--- a/arch/arm/dts/rk3308-evb-u-boot.dtsi
+++ b/arch/arm/dts/rk3308-evb-u-boot.dtsi
@@ -5,15 +5,18 @@
  */
 
 / {
-	dmc: dmc@20004000 {
-		u-boot,dm-pre-reloc;
-		compatible = "rockchip,rk3308-dmc";
-		reg = <0x0 0xff010000 0x0 0x10000>;
+
+	chosen {
+		stdout-path = &uart2;
 	};
 };
 
+&dmc {
+	u-boot,dm-pre-reloc;
+};
+
 &cru {
-        u-boot,dm-pre-reloc;
+	u-boot,dm-pre-reloc;
 };
 
 &emmc {
@@ -34,6 +37,11 @@
 	status = "okay";
 };
 
+&saradc {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 &uart0 {
 	u-boot,dm-pre-reloc;
 };
@@ -54,4 +62,23 @@
 
 &uart4 {
 	u-boot,dm-pre-reloc;
+};
+
+&u2phy {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&u2phy_otg {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&usb20_otg {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&route_rgb {
+	status = "disabled";
 };
\ No newline at end of file
diff --git a/arch/arm/dts/rk3308-evb.dts b/arch/arm/dts/rk3308-evb.dts
index 862c628fed..8293adabef 100644
--- a/arch/arm/dts/rk3308-evb.dts
+++ b/arch/arm/dts/rk3308-evb.dts
@@ -13,10 +13,6 @@
 	model = "Rockchip RK3308 EVB";
 	compatible = "rockchip,rk3308-evb", "rockchip,rk3308";
 
-	chosen {
-		stdout-path = "serial2:1500000n8";
-	};
-
 	adc-keys0 {
 		compatible = "adc-keys";
 		io-channels = <&saradc 0>;
@@ -290,10 +286,6 @@
 	status = "disabled";
 };
 
-&saradc {
-	status = "okay";
-};
-
 &u2phy {
 	status = "okay";
 };
diff --git a/arch/arm/dts/rk3308.dtsi b/arch/arm/dts/rk3308.dtsi
index 01a83c85ad..1e9ec023e6 100644
--- a/arch/arm/dts/rk3308.dtsi
+++ b/arch/arm/dts/rk3308.dtsi
@@ -84,6 +84,11 @@
 		};
 	};
 
+	dmc: dmc@20004000 {
+		compatible = "rockchip,rk3308-dmc";
+		reg = <0x0 0xff010000 0x0 0x10000>;
+	};
+
 	psci {
 		compatible = "arm,psci-1.0";
 		method = "smc";

commit cc86a65c4a8f2d491615b6131ffdf57467b9de07
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 22 20:28:40 2018 +0800

    rockchip: dts: rk1808: clean up
    
    Movimg dm-pre-reloc nodes to *-u-boot.dtsi, it makes users easy
    to override their kernel dts when CONFIG_USING_KERNEL_DTB is disabled.
    
    Change-Id: I3305ef8ec164deb74cf8651d524c250f2575a1e7
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk1808-evb.dts b/arch/arm/dts/rk1808-evb.dts
index 5129539227..728ca1c73b 100644
--- a/arch/arm/dts/rk1808-evb.dts
+++ b/arch/arm/dts/rk1808-evb.dts
@@ -14,18 +14,9 @@
 	model = "Rockchip RK1808 EVB";
 	compatible = "rockchip,rk1808-evb", "rockchip,rk1808";
 
-	chosen {
-		stdout-path = &uart2;
-	};
-
-	xin24m: xin24m {
-		compatible = "fixed-clock";
-		#clock-cells = <0>;
-		clock-frequency = <24000000>;
-		clock-output-names = "xin24m";
-	};
-
 	adc-keys {
+		status = "okay";
+
 		u-boot,dm-pre-reloc;
 		compatible = "adc-keys";
 		io-channels = <&saradc 2>;
@@ -53,11 +44,6 @@
 	status = "okay";
 };
 
-&sdmmc {
-	supports-sd;
-	status = "disabled";
-};
-
 &uart2 {
 	clock-frequency = <24000000>;
 	status = "okay";
diff --git a/arch/arm/dts/rk1808-u-boot.dtsi b/arch/arm/dts/rk1808-u-boot.dtsi
index ae50dd12d2..d6bfe24d36 100644
--- a/arch/arm/dts/rk1808-u-boot.dtsi
+++ b/arch/arm/dts/rk1808-u-boot.dtsi
@@ -7,6 +7,8 @@
 / {
 	aliases {
 		mmc0 = &emmc;
+		mmc1 = &sdmmc;
+
 		serial0 = &uart0;
 		serial1 = &uart1;
 		serial2 = &uart2;
@@ -16,6 +18,11 @@
 		serial6 = &uart6;
 		serial7 = &uart7;
 	};
+
+	chosen {
+		stdout-path = &uart2;
+	};
+
 };
 
 &dmc {
@@ -39,6 +46,11 @@
 	status = "okay";
 };
 
+&sdmmc {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 &saradc {
 	u-boot,dm-pre-reloc;
 	status = "okay";

commit 48dac9b0c6212fb6c301b59b964b036f1f921d40
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Sep 30 15:38:30 2018 +0800

    rockchip: dts: rk3399: move dm-pre-reloc nodes to *-u-boot.dtsi
    
    it makes users easy to override their kernel dts when
    CONFIG_USING_KERNEL_DTB is disabled.
    
    Change-Id: Ifd6cab36dc03da767b7bb768a872e43264bed532
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts
index 1a9e87c342..46bf2072b3 100644
--- a/arch/arm/dts/rk3399-evb.dts
+++ b/arch/arm/dts/rk3399-evb.dts
@@ -11,15 +11,25 @@
 #include "rk3399-sdram-lpddr3-4GB-1600.dtsi"
 #include "rk3399-u-boot.dtsi"
 #include <linux/media-bus-format.h>
+#include <dt-bindings/input/input.h>
 
 / {
 	model = "Rockchip RK3399 Evaluation Board";
 	compatible = "rockchip,rk3399-evb", "rockchip,rk3399",
 		     "google,rk3399evb-rev2";
 
-	chosen {
-		stdout-path = &uart2;
-		u-boot,spl-boot-order = &sdhci, &sdmmc;
+	rk_key: rockchip-key {
+		u-boot,dm-pre-reloc;
+		compatible = "rockchip,key";
+		status = "okay";
+		io-channels = <&saradc 1>;
+
+		vol-up-key {
+				u-boot,dm-pre-reloc;
+		        linux,code = <KEY_VOLUMEUP>;
+		        label = "volume up";
+		        rockchip,adc_value = <1>;
+		};
 	};
 
 	vdd_center: vdd-center {
@@ -189,6 +199,10 @@
 
 };
 
+&uart2 {
+	status = "okay";
+};
+
 &emmc_phy {
 	status = "okay";
 };
diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi
index 8000614357..a67aa42fbd 100644
--- a/arch/arm/dts/rk3399-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-u-boot.dtsi
@@ -9,12 +9,20 @@
 		mmc0 = &sdhci;
 		mmc1 = &sdmmc;
 	};
+
+	chosen {
+		stdout-path = &uart2;
+		u-boot,spl-boot-order = &sdhci, &sdmmc;
+	};
 };
 
 &uart2 {
 	clock-frequency = <24000000>;
 	u-boot,dm-pre-reloc;
-	status = "okay";
+};
+
+&saradc {
+	u-boot,dm-pre-reloc;
 };
 
 &sdmmc {

commit a45106b63b323a8bfd446273c8cdb2d2f9c9357c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 23 09:36:17 2018 +0800

    rockchip: atags: follow miniloader bootdev type definitions
    
    Change-Id: Id9fbb25aadc4dafe0432b38e27b219d9dfa5108f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rk_atags.h b/arch/arm/include/asm/arch-rockchip/rk_atags.h
index f7402861d0..150b171912 100644
--- a/arch/arm/include/asm/arch-rockchip/rk_atags.h
+++ b/arch/arm/include/asm/arch-rockchip/rk_atags.h
@@ -30,11 +30,13 @@
 #endif
 
 /* tag_bootdev.devtype */
-#define BOOT_TYPE_EMMC		0x0
-#define BOOT_TYPE_NAND		0x1
-#define BOOT_TYPE_SDCARD	0x2
-#define BOOT_TYPE_SPI_NOR	0x3
-#define BOOT_TYPE_SPI_NAND	0x4
+#define BOOT_TYPE_NAND		(1 << 0)
+#define BOOT_TYPE_EMMC		(1 << 1)
+#define BOOT_TYPE_SD0		(1 << 2)
+#define BOOT_TYPE_SD1		(1 << 3)
+#define BOOT_TYPE_SPI_NOR	(1 << 4)
+#define BOOT_TYPE_SPI_NAND	(1 << 5)
+#define BOOT_TYPE_RAM		(1 << 6)
 
 /* tag_serial.m_mode */
 #define SERIAL_M_MODE_M0	0x0

commit ed2a409163e58b38cd11ddb1d19d519e1a4ef7fd
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Mon Oct 22 18:02:22 2018 +0800

    clk: rockchip: rk3288: fix up the dclk_vop setting freq error
    
    fix the commit b328c914c:
    (clk: rockchip: rk3288: fix up the dclk_vop freq setting)
    
    Change-Id: Ic4df8bcd4410dbc0484c1ea50d73e70aa64556bb
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index 20b1fc82ee..0c6a4651c2 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -396,7 +396,7 @@ static int rockchip_vop_set_clk(struct rk3288_cru *cru, struct rk3288_grf *grf,
 
 			rk_clrsetreg(&cru->cru_mode_con, CPLL_MODE_MASK,
 				     CPLL_MODE_SLOW << CPLL_MODE_SHIFT);
-			rkclk_set_pll(cru, CLK_NEW, &cpll_config);
+			rkclk_set_pll(cru, CLK_CODEC, &cpll_config);
 
 			/* waiting for pll lock */
 			while (1) {
@@ -433,7 +433,7 @@ static int rockchip_vop_set_clk(struct rk3288_cru *cru, struct rk3288_grf *grf,
 
 			rk_clrsetreg(&cru->cru_mode_con, CPLL_MODE_MASK,
 				     CPLL_MODE_SLOW << CPLL_MODE_SHIFT);
-			rkclk_set_pll(cru, CLK_NEW, &cpll_config);
+			rkclk_set_pll(cru, CLK_CODEC, &cpll_config);
 
 			/* waiting for pll lock */
 			while (1) {

commit fab096102c5c905a820e745efabf4667c54215e1
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Oct 11 15:57:47 2018 +0800

    clk: rockchip: rk1808: Support dclk_voplite to set any of the frequencies
    
    Change-Id: I7ac53f75244388e7fb448a721e55b6b1e789d4d7
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk1808.c b/drivers/clk/rockchip/clk_rk1808.c
index 67f05c37c4..260b4224be 100644
--- a/drivers/clk/rockchip/clk_rk1808.c
+++ b/drivers/clk/rockchip/clk_rk1808.c
@@ -521,11 +521,11 @@ static ulong rk1808_vop_set_clk(struct rk1808_clk_priv *priv,
 			     DCLK_VOPRAW_SEL_MASK |
 			     DCLK_VOPRAW_PLL_SEL_MASK |
 			     DCLK_VOPRAW_DIV_CON_MASK,
-			     DCLK_VOPRAW_SEL_VOPRAW <<
-			     DCLK_VOPRAW_SEL_SHIFT |
-			     DCLK_VOPRAW_PLL_SEL_NPLL <<
-			     DCLK_VOPRAW_PLL_SEL_SHIFT |
-			     (src_clk_div - 1) << DCLK_VOPRAW_DIV_CON_SHIFT);
+			     (DCLK_VOPRAW_SEL_VOPRAW <<
+			     DCLK_VOPRAW_SEL_SHIFT) |
+			     (DCLK_VOPRAW_PLL_SEL_NPLL <<
+			     DCLK_VOPRAW_PLL_SEL_SHIFT) |
+			     ((src_clk_div - 1) << DCLK_VOPRAW_DIV_CON_SHIFT));
 		rockchip_pll_set_rate(&rk1808_pll_clks[NPLL],
 				      priv->cru, NPLL, src_clk_div * hz);
 
@@ -534,15 +534,19 @@ static ulong rk1808_vop_set_clk(struct rk1808_clk_priv *priv,
 		/*
 		 * vopl dclk source from cpll, and equals to
 		 */
-		if (!(priv->npll_hz % hz)) {
-			parent = DCLK_VOPLITE_PLL_SEL_NPLL;
-			src_clk_div = do_div(priv->npll_hz, hz);
-		} else if (!(priv->cpll_hz % hz)) {
+		if (!(priv->cpll_hz % hz)) {
 			parent = DCLK_VOPLITE_PLL_SEL_CPLL;
-			src_clk_div = do_div(priv->cpll_hz, hz);
-		} else {
+			src_clk_div = DIV_ROUND_UP(priv->cpll_hz, hz);
+		} else if (!(priv->gpll_hz % hz)) {
 			parent = DCLK_VOPLITE_PLL_SEL_GPLL;
 			src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+		} else {
+			parent = DCLK_VOPLITE_PLL_SEL_NPLL;
+			src_clk_div = DIV_ROUND_UP(RK1808_VOP_PLL_LIMIT_FREQ,
+						   hz);
+			rockchip_pll_set_rate(&rk1808_pll_clks[NPLL],
+					      priv->cru, NPLL,
+					      src_clk_div * hz);
 		}
 		rk_clrsetreg(&cru->clksel_con[7],
 			     DCLK_VOPLITE_SEL_MASK | DCLK_VOPLITE_PLL_SEL_MASK |

commit 363be8774904c193177caf82385f045df7985986
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Oct 19 09:47:14 2018 +0800

    make.sh: add debug subcmd to print entry warning "UUU..." in start.S
    
    Change-Id: Icac8e2479dbc11283e1e53cee430e479e401a710
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 4be5eff987..a9be77561f 100755
--- a/make.sh
+++ b/make.sh
@@ -249,6 +249,8 @@ sub_commands()
 			echo "    6. enable CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP"
 			echo "    7. enable CONFIG_ROCKCHIP_CRASH_DUMP"
 			echo "    8. set CONFIG_BOOTDELAY=5"
+			echo "    9. armv7 start.S: print entry warning"
+			echo "   10. armv8 start.S: print entry warning"
 			echo
 			echo "Enabled: "
 			grep '^CONFIG_ROCKCHIP_DEBUGGER=y' ${OUTDIR}/.config > /dev/null \
@@ -285,6 +287,14 @@ sub_commands()
 		elif [ "${opt}" = '8' ]; then
 			sed -i 's/^CONFIG_BOOTDELAY=0/CONFIG_BOOTDELAY=5/g' ${OUTDIR}/.config
 			echo "DEBUG [8]: CONFIG_BOOTDELAY is 5s"
+		elif [ "${opt}" = '9' ]; then
+			sed -i '/save_boot_params_ret:/a\ldr r0, =CONFIG_DEBUG_UART_BASE\nmov r1, #100\nloop:\nmov r2, #0x55\nstr r2, [r0]\nsub r1, r1, #1\ncmp r1, #0\nbne loop\ndsb' \
+			./arch/arm/cpu/armv7/start.S
+			echo "DEBUG [9]: armv7 start.S entry warning 'UUUU...'"
+		elif [ "${opt}" = '10' ]; then
+			sed -i '/save_boot_params_ret:/a\ldr x0, =CONFIG_DEBUG_UART_BASE\nmov x1, #100\nloop:\nmov x2, #0x55\nstr x2, [x0]\nsub x1, x1, #1\ncmp x1, #0\nb.ne loop\ndsb sy' \
+			./arch/arm/cpu/armv8/start.S
+			echo "DEBUG [10]: armv8 start.S entry warning 'UUUU...'"
 		fi
 		echo
 		exit 0

commit 3310f2032b5bdf62e31cfee8112d1c66fab8e055
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Oct 18 10:45:01 2018 +0800

    rockchip: dtsi: rk3308: add all serial nodes
    
    add alias and "u-boot,dm-pre-reloc;" to support
    preloader serial.
    
    Change-Id: Id563752bb07309a96a767e9ffdf957bcf7f0b008
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-evb-u-boot.dtsi b/arch/arm/dts/rk3308-evb-u-boot.dtsi
index f1ee370846..5381939309 100644
--- a/arch/arm/dts/rk3308-evb-u-boot.dtsi
+++ b/arch/arm/dts/rk3308-evb-u-boot.dtsi
@@ -34,8 +34,24 @@
 	status = "okay";
 };
 
+&uart0 {
+	u-boot,dm-pre-reloc;
+};
+
+&uart1 {
+	u-boot,dm-pre-reloc;
+};
+
 &uart2 {
 	u-boot,dm-pre-reloc;
 	clock-frequency = <24000000>;
 	status = "okay";
 };
+
+&uart3 {
+	u-boot,dm-pre-reloc;
+};
+
+&uart4 {
+	u-boot,dm-pre-reloc;
+};
\ No newline at end of file
diff --git a/arch/arm/dts/rk3308.dtsi b/arch/arm/dts/rk3308.dtsi
index 1502276446..01a83c85ad 100644
--- a/arch/arm/dts/rk3308.dtsi
+++ b/arch/arm/dts/rk3308.dtsi
@@ -21,6 +21,8 @@
 		serial0 = &uart0;
 		serial1 = &uart1;
 		serial2 = &uart2;
+		serial3 = &uart3;
+		serial4 = &uart4;
 	};
 
 	cpus {
@@ -181,6 +183,28 @@
 		status = "disabled";
 	};
 
+	uart3: serial@ff0d0000 {
+		compatible = "rockchip,rk3308-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xff0d0000 0x0 0x100>;
+		interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		status = "disabled";
+	};
+
+	uart4: serial@ff0e0000 {
+		compatible = "rockchip,rk3308-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xff0e0000 0x0 0x100>;
+		interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		status = "disabled";
+	};
+
 	vop: vop@ff2e0000 {
 		compatible = "rockchip,rk3308-vop";
 		reg = <0x0 0xff2e0000 0x0 0x1fc>, <0x0 0xff2e0a00 0x0 0x400>;

commit 5b289214896ecfb6721623ce0f65499d72b4bc44
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 9 19:38:59 2018 +0800

    rockchip: dts: rk1808: add/clean serial nodes
    
    add alias and "u-boot,dm-pre-reloc;" to support
    preloader serial.
    
    Change-Id: I70e65b59bc49e93af591ca96994b79abe5915021
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk1808-evb.dts b/arch/arm/dts/rk1808-evb.dts
index 11f750512f..5129539227 100644
--- a/arch/arm/dts/rk1808-evb.dts
+++ b/arch/arm/dts/rk1808-evb.dts
@@ -60,8 +60,5 @@
 
 &uart2 {
 	clock-frequency = <24000000>;
-	clocks = <&xin24m>, <&xin24m>;
-	clock-names = "baudclk", "apb_pclk";
-
 	status = "okay";
 };
diff --git a/arch/arm/dts/rk1808-u-boot.dtsi b/arch/arm/dts/rk1808-u-boot.dtsi
index 068f9c75c8..ae50dd12d2 100644
--- a/arch/arm/dts/rk1808-u-boot.dtsi
+++ b/arch/arm/dts/rk1808-u-boot.dtsi
@@ -7,6 +7,14 @@
 / {
 	aliases {
 		mmc0 = &emmc;
+		serial0 = &uart0;
+		serial1 = &uart1;
+		serial2 = &uart2;
+		serial3 = &uart3;
+		serial4 = &uart4;
+		serial5 = &uart5;
+		serial6 = &uart6;
+		serial7 = &uart7;
 	};
 };
 
@@ -31,11 +39,39 @@
 	status = "okay";
 };
 
+&saradc {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&uart0 {
+	u-boot,dm-pre-reloc;
+};
+
+&uart1 {
+	u-boot,dm-pre-reloc;
+};
+
 &uart2 {
 	u-boot,dm-pre-reloc;
 };
 
-&saradc {
+&uart3 {
 	u-boot,dm-pre-reloc;
-	status = "okay";
-};
\ No newline at end of file
+};
+
+&uart4 {
+	u-boot,dm-pre-reloc;
+};
+
+&uart5 {
+	u-boot,dm-pre-reloc;
+};
+
+&uart6 {
+	u-boot,dm-pre-reloc;
+};
+
+&uart7 {
+	u-boot,dm-pre-reloc;
+};

commit 58456f69ac94d0956295d42c3cb9851bed973e5a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Oct 10 09:42:21 2018 +0800

    rockchip: rk1808: initialize debug uart only in TPL
    
    rk1808 uses preloader serial configure from TPL.
    
    Change-Id: Iff775590bf75bb1db4ef4802ae3e16daeff149b4
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk1808/rk1808.c b/arch/arm/mach-rockchip/rk1808/rk1808.c
index 16525447ec..021da42f52 100644
--- a/arch/arm/mach-rockchip/rk1808/rk1808.c
+++ b/arch/arm/mach-rockchip/rk1808/rk1808.c
@@ -61,6 +61,7 @@ enum {
  */
 void board_debug_uart_init(void)
 {
+#ifdef CONFIG_TPL_BUILD
 	static struct rk1808_grf * const grf = (void *)GRF_BASE;
 
 	/* Enable early UART2 channel m0 on the rk1808 */
@@ -72,4 +73,5 @@ void board_debug_uart_init(void)
 		     GPIO4A3_MASK | GPIO4A2_MASK,
 		     GPIO4A2_UART2_TX_M0 << GPIO4A2_SHIFT |
 		     GPIO4A3_UART2_RX_M0 << GPIO4A3_SHIFT);
+#endif
 }

commit 064eb4931464a5c5dc66e25fc3af2561bc4cb948
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 9 19:45:00 2018 +0800

    serial: ns16550: support using pre-loader serial
    
    - pass pre-loader serial configure by rk atags;
    - it depends on serial aliases to find uart port;
    - enabled by CONFIG_ROCKCHIP_USING_PRELOADER_SERIAL;
    
    Change-Id: I6723cccc5e1f3dac77203b4cc19cdac631f5133b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S
index f7e1755ea1..c6a9c90828 100644
--- a/arch/arm/lib/crt0.S
+++ b/arch/arm/lib/crt0.S
@@ -84,6 +84,7 @@ ENTRY(_main)
 	/* set up gd here, outside any C code */
 	mov	r9, r0
 	bl	board_init_f_init_reserve
+	bl	board_init_f_init_serial
 
 	mov	r0, #0
 	bl	board_init_f
diff --git a/arch/arm/lib/crt0_64.S b/arch/arm/lib/crt0_64.S
index 9cb70552fe..bac5de4081 100644
--- a/arch/arm/lib/crt0_64.S
+++ b/arch/arm/lib/crt0_64.S
@@ -83,6 +83,7 @@ ENTRY(_main)
 	/* set up gd here, outside any C code */
 	mov	x18, x0
 	bl	board_init_f_init_reserve
+	bl	board_init_f_init_serial
 
 	mov	x0, #0
 	bl	board_init_f
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 02e0269e94..fe90a710b3 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -519,6 +519,13 @@ config ROCKCHIP_PRELOADER_ATAGS
 	  tos, U-Boot, etc. It delivers boot and configure information, shared with pre-loaders
 	  and finally ends with U-Boot.
 
+config ROCKCHIP_PRELOADER_SERIAL
+	bool "Rockchip pre-loader serial"
+	default y if ROCKCHIP_PRELOADER_ATAGS
+	help
+	  This enable U-Boot using pre-loader atags serial configure to initialize console.
+	  It denpends on serial aliases to find pre-loader serial number.
+
 config GICV2
 	bool "ARM GICv2"
 
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 9e3f5cfed5..954e17d8c3 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -16,6 +16,7 @@
 #include <asm/arch/clock.h>
 #include <asm/arch/periph.h>
 #include <asm/arch/boot_mode.h>
+#include <asm/arch/rk_atags.h>
 #ifdef CONFIG_DM_CHARGE_DISPLAY
 #include <power/charge_display.h>
 #endif
@@ -274,6 +275,27 @@ void enable_caches(void)
 	dcache_enable();
 }
 
+#ifdef CONFIG_ROCKCHIP_PRELOADER_SERIAL
+int board_init_f_init_serial(void)
+{
+	struct tag *t = atags_get_tag(ATAG_SERIAL);
+
+	if (t) {
+		gd->serial.using_pre_serial = t->u.serial.enable;
+		gd->serial.addr = t->u.serial.addr;
+		gd->serial.baudrate = t->u.serial.baudrate;
+		gd->serial.id = t->u.serial.id;
+
+		debug("%s: enable=%d, addr=0x%lx, baudrate=%d, id=%d\n",
+		      __func__, gd->serial.using_pre_serial,
+		      gd->serial.addr, gd->serial.baudrate,
+		      gd->serial.id);
+	}
+
+	return 0;
+}
+#endif
+
 #if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
 #include <fdt_support.h>
 #include <usb.h>
diff --git a/common/board_f.c b/common/board_f.c
index f76f7da756..8ce40bef74 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -117,7 +117,11 @@ __weak void board_add_ram_info(int use_default)
 
 static int init_baud_rate(void)
 {
-	gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE);
+	if (gd && gd->serial.using_pre_serial)
+		gd->baudrate = env_get_ulong("baudrate", 10, gd->serial.baudrate);
+	else
+		gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE);
+
 	return 0;
 }
 
@@ -142,6 +146,16 @@ static int display_text_info(void)
 	return 0;
 }
 
+#if defined(CONFIG_ROCKCHIP_PRELOADER_SERIAL)
+static int announce_pre_serial(void)
+{
+	if (gd && gd->serial.using_pre_serial)
+		printf("PreSerial: %d\n", gd->serial.id);
+
+	return 0;
+}
+#endif
+
 static int announce_dram_init(void)
 {
 	puts("DRAM:  ");
@@ -803,6 +817,9 @@ static const init_fnc_t init_sequence_f[] = {
 #endif
 #if defined(CONFIG_HARD_SPI)
 	init_func_spi,
+#endif
+#if defined(CONFIG_ROCKCHIP_PRELOADER_SERIAL)
+	announce_pre_serial,
 #endif
 	announce_dram_init,
 	dram_init,		/* configure available RAM banks */
diff --git a/common/board_r.c b/common/board_r.c
index 818543446b..3885fd4c66 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -172,7 +172,22 @@ static int initr_reloc_global_data(void)
 
 static int initr_serial(void)
 {
+/*
+ * 1. Serial has been initialized in board_f.c => serial_init(), there is
+ *    no special reason to init it again;
+ *
+ * 2. Pre-serial works depending on aliases to get pre-serial phandle when
+ *    parse dtb. If CONFIG_USING_KERNEL_DTB is enabled, there are both kernel
+ *    dtb and U-Boot dtb aliases added into aliases_lookup, these nodes have
+ *    same names but different phanles(U-Boot nodes has high prior), this may
+ *    lead a wrong aliases node finding if try to get a node after kenrel dtb
+ *    unflattened, i.e. using U-Boot phandle to get kernel dtb node!!
+ *
+ *    Notice: of_alias_dump() is provided to dump all aliases node.
+ */
+#ifndef CONFIG_USING_KERNEL_DTB
 	serial_initialize();
+#endif
 	return 0;
 }
 
diff --git a/common/init/board_init.c b/common/init/board_init.c
index 4a391beba9..9269ca858d 100644
--- a/common/init/board_init.c
+++ b/common/init/board_init.c
@@ -129,6 +129,14 @@ void board_init_f_init_reserve(ulong base)
 #endif
 }
 
+/*
+ * Board-specific Platform code can init serial earlier if needed
+ */
+__weak int board_init_f_init_serial(void)
+{
+	return 0;
+}
+
 /*
  * Board-specific Platform code can reimplement show_boot_progress () if needed
  */
diff --git a/drivers/core/of_access.c b/drivers/core/of_access.c
index ff7be7b5b5..92443d401c 100644
--- a/drivers/core/of_access.c
+++ b/drivers/core/of_access.c
@@ -804,5 +804,17 @@ struct device_node *of_alias_dump(void)
 
 struct device_node *of_get_stdout(void)
 {
+	struct device_node *np;
+
+	if (gd && gd->serial.using_pre_serial) {
+		np = of_alias_get_dev("serial", gd->serial.id);
+		if (!np)
+			printf("Can't find alias serial%d\n", gd->serial.id);
+		else
+			debug("Find alias serial: %s\n", np->full_name);
+
+		of_stdout = np;
+	}
+
 	return of_stdout;
 }
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index ad7a3d77ab..6f2ee6960d 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -254,6 +254,13 @@ static inline void _debug_uart_init(void)
 	 */
 	baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
 					    CONFIG_BAUDRATE);
+
+	if (gd && gd->serial.using_pre_serial) {
+		com_port = (struct NS16550 *)gd->serial.addr;
+		baud_divisor = ns16550_calc_divisor(com_port,
+			CONFIG_DEBUG_UART_CLOCK, gd->serial.baudrate);
+	}
+
 	serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER);
 	serial_dout(&com_port->mcr, UART_MCRVAL);
 	serial_dout(&com_port->fcr, UART_FCR_DEFVAL);
@@ -268,6 +275,9 @@ static inline void _debug_uart_putc(int ch)
 {
 	struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
 
+	if (gd && gd->serial.using_pre_serial)
+		com_port = (struct NS16550 *)gd->serial.addr;
+
 	while (!(serial_din(&com_port->lsr) & UART_LSR_THRE))
 		;
 	serial_dout(&com_port->thr, ch);
@@ -288,6 +298,13 @@ static inline void _debug_uart_init(void)
 
 	baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
 					    CONFIG_BAUDRATE);
+
+	if (gd && gd->serial.using_pre_serial) {
+		com_port = (struct NS16550 *)gd->serial.addr;
+		baud_divisor = ns16550_calc_divisor(com_port,
+			CONFIG_DEBUG_UART_CLOCK, gd->serial.baudrate);
+	}
+
 	serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER);
 	serial_dout(&com_port->mdr1, 0x7);
 	serial_dout(&com_port->mcr, UART_MCRVAL);
@@ -304,6 +321,9 @@ static inline void _debug_uart_putc(int ch)
 {
 	struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
 
+	if (gd && gd->serial.using_pre_serial)
+		com_port = (struct NS16550 *)gd->serial.addr;
+
 	while (!(serial_din(&com_port->lsr) & UART_LSR_THRE))
 		;
 	serial_dout(&com_port->thr, ch);
@@ -456,6 +476,10 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
 	plat->base = addr;
 #else
+
+	if (gd && gd->serial.using_pre_serial)
+		addr = gd->serial.addr;
+
 	plat->base = (unsigned long)map_physmem(addr, 0, MAP_NOCACHE);
 #endif
 
diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c
index 2e5116f7ce..0c7a4d7c87 100644
--- a/drivers/serial/serial-uclass.c
+++ b/drivers/serial/serial-uclass.c
@@ -54,6 +54,23 @@ static int serial_check_stdout(const void *blob, struct udevice **devp)
 	}
 	if (node < 0)
 		node = fdt_path_offset(blob, "console");
+
+	if (gd && gd->serial.using_pre_serial) {
+		const char *serial_path;
+		char serial[12];
+
+		snprintf(serial, 12, "serial%d", gd->serial.id);
+		serial_path = fdt_get_alias(blob, serial);
+		if (serial_path) {
+			debug("Find alias %s, path: %s\n", serial, serial_path);
+			node = fdt_path_offset(blob, serial_path);
+			if (node < 0)
+				printf("Can't find %s by path\n", serial);
+		} else {
+			printf("Can't find alias %s\n", serial);
+		}
+	}
+
 	if (!uclass_get_device_by_of_offset(UCLASS_SERIAL, node, devp))
 		return 0;
 
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index b46e542500..17103318b8 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -31,6 +31,13 @@ struct pm_ctx {
 	unsigned long suspend_regs[15];
 };
 
+struct pre_serial {
+	u32 using_pre_serial;
+	u32 id;
+	u32 baudrate;
+	ulong addr;
+};
+
 typedef struct global_data {
 	bd_t *bd;
 	unsigned long flags;
@@ -126,7 +133,7 @@ typedef struct global_data {
 #ifdef CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP
 	int new_line;
 #endif
-
+	struct pre_serial serial;
 #ifdef CONFIG_LOG
 	int log_drop_count;		/* Number of dropped log messages */
 	int default_log_level;		/* For devices with no filters */
diff --git a/include/common.h b/include/common.h
index 7c42b6453d..1c280d86f8 100644
--- a/include/common.h
+++ b/include/common.h
@@ -144,6 +144,11 @@ ulong board_init_f_alloc_reserve(ulong top);
  */
 void board_init_f_init_reserve(ulong base);
 
+/*
+ * Board-specific Platform code can init serial earlier if needed
+ */
+__weak int board_init_f_init_serial(void);
+
 /**
  * arch_setup_gd() - Set up the global_data pointer
  *

commit 701d3ebca892f339bb1719e7d424f7edbd190217
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Oct 10 10:20:03 2018 +0800

    rockchip: sdram: support atags parse ddr and reserve atf/optee memory regions
    
    it compatibles with legacy ways.
    
    Change-Id: I0e66d7973263ed2284a1524e571c8d99ff77326f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
index faeb0dffa5..16108c51ec 100644
--- a/arch/arm/mach-rockchip/sdram_common.c
+++ b/arch/arm/mach-rockchip/sdram_common.c
@@ -8,6 +8,7 @@
 #include <dm.h>
 #include <ram.h>
 #include <asm/io.h>
+#include <asm/arch/rk_atags.h>
 #include <asm/arch/sdram_common.h>
 #include <dm/uclass-internal.h>
 
@@ -57,74 +58,235 @@ static uint16_t trust_checksum(const uint8_t *buf, uint16_t len)
 	return checksum;
 }
 
-int dram_init_banksize(void)
+#define SDRAM_OFFSET(offset)	(CONFIG_SYS_SDRAM_BASE + (offset))
+#define NOT_INITIAL		-1
+static int __dram_init_banksize(int resv_tee)
 {
 	size_t top = min((unsigned long)(gd->ram_size + CONFIG_SYS_SDRAM_BASE),
 			 gd->ram_top);
+	u64 start[CONFIG_NR_DRAM_BANKS], size[CONFIG_NR_DRAM_BANKS];
+	u64 tos_addr = 0, atf_addr = 0;
+	u64 tos_size = 0, atf_size = 0;
+	u32 checksum, i;
+	int idx = NOT_INITIAL;
 	struct tos_parameter_t *tos_parameter;
-	u32 checksum __maybe_unused;
-
-	tos_parameter = (struct tos_parameter_t *)(CONFIG_SYS_SDRAM_BASE +
-			TRUST_PARAMETER_OFFSET);
-
-	checksum = trust_checksum((uint8_t *)(unsigned long)tos_parameter + 8,
-				  sizeof(struct tos_parameter_t) - 8);
+#ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
+	struct tag *t = NULL;
+
+	/*
+	 * Get memory region of ATF
+	 *
+	 * 1. New way: atags info;
+	 * 2. Leagcy way: 2MB size and start from ddr 0x0 offset;
+	 */
+	t = atags_get_tag(ATAG_ATF_MEM);
+	if (t && t->u.atf_mem.size) {
+		atf_addr = t->u.atf_mem.phy_addr;
+		atf_size = t->u.atf_mem.size;
+		/* Sanity */
+		if (atf_addr + atf_size > SDRAM_OFFSET(SZ_1M)) {
+			printf("%s: ATF reserved region is not within 0-1MB offset(0x%08llx-0x%08llx)!\n",
+			       __func__, atf_addr, atf_addr + atf_size);
+			return -EINVAL;
+		}
+	}
 
-#if defined(CONFIG_ARM64) || defined(CONFIG_ARM64_BOOT_AARCH32)
-	/* Reserve 0x200000 for ATF bl31 */
-	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE + 0x200000;
-#else
-	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+	/*
+	 * Get memory region of OP-TEE
+	 *
+	 * 1. New way: atags info;
+	 * 2. Leagcy way: info in ddr 34M offset;
+	 */
+	t = atags_get_tag(ATAG_TOS_MEM);
+	if (t && (t->u.tos_mem.tee_mem.flags == 1)) {
+		tos_addr = t->u.tos_mem.tee_mem.phy_addr;
+		tos_size = t->u.tos_mem.tee_mem.size;
+	}
 #endif
-	gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start;
 
-/*
- * OP-TEE:
- *	ARM64(AArch32) 64-bit: enable dcache; (U-boot: map region dcache cachable)
- *	ARM 32-bit: disable dcache; (U-boot: map region dcache off)
- */
+	/* Legacy */
+	if (!atf_size) {
+		if (IS_ENABLED(CONFIG_ARM64) ||
+		    IS_ENABLED(CONFIG_ARM64_BOOT_AARCH32)) {
+			atf_addr = SDRAM_OFFSET(0);
+			atf_size = SZ_1M;
+		}
+	}
 
-#if !defined(CONFIG_ARM64_BOOT_AARCH32)
-	if ((checksum == tos_parameter->checksum) &&
-	    (tos_parameter->tee_mem.flags == 1)) {
-		gd->bd->bi_dram[0].size = tos_parameter->tee_mem.phy_addr
-					- gd->bd->bi_dram[0].start;
-		gd->bd->bi_dram[1].start = tos_parameter->tee_mem.phy_addr +
-					tos_parameter->tee_mem.size;
-		gd->bd->bi_dram[1].size = top - gd->bd->bi_dram[1].start;
+	/* Legacy */
+	if (!tos_size) {
+		tos_parameter =
+		(struct tos_parameter_t *)(SDRAM_OFFSET(TRUST_PARAMETER_OFFSET));
+		checksum =
+		trust_checksum((uint8_t *)(unsigned long)tos_parameter + 8,
+				sizeof(struct tos_parameter_t) - 8);
+		if ((checksum == tos_parameter->checksum) &&
+		    (tos_parameter->tee_mem.flags == 1)) {
+			tos_addr = tos_parameter->tee_mem.phy_addr;
+			tos_size = tos_parameter->tee_mem.size;
+		}
 	}
+
+	debug("ATF: 0x%llx - 0x%llx\n", atf_addr, atf_addr + atf_size);
+	debug("TOS: 0x%llx - 0x%llx\n", tos_addr, tos_addr + tos_size);
+
+	/*
+	 * Reserve region for ATF bl31
+	 *
+	 * What ever U-Boot runs on AArch64 or AArch32 mode, the bl31 is always
+	 * present and AArch64 mode, let's reserve it.
+	 *
+	 * Maybe:
+	 *	1. ATF region is from 0x0 offset and 1MB size(legacy);
+	 *	2. ATF region is from 0x0 offset but not 1MB size;
+	 *	3. ATF region is not from 0x0 offset but within 1MB;
+	 *
+	 * 1. The "*****" means visible region to kernel.
+	 * 2. 1M~2M is always reserved in ARM64 for pstore, shmem, etc.
+	 *
+	 *
+	 * Possible memory layout:
+	 *
+	 * Leagcy:
+	 *	 |------------o-------o------------------------|
+	 *	 |     ATF    | RES   |************************|
+	 *	 |------------o-------o------------------------|
+	 *	 0x0          1M      2M                      .....
+	 *
+	 *
+	 * New:
+	 *	 |-----|------o-------o------------------------|
+	 *	 | ATF |******| RES   |************************|
+	 *	 |-----|------o-------o------------------------|
+	 *	 0x0          1M      2M                      .....
+	 *
+	 *
+	 *	 |----|---|---o-------o------------------------|
+	 *	 |****|ATF|***| RES   |************************|
+	 *	 |----|---|---o-------o------------------------|
+	 *	 0x0  64K     1M      2M                      .....
+	 *
+	 * Note: these are only initilized once from dram_init_banksize(),
+	 *       which is before relocation.
+	 */
+	if (atf_size && !(gd->flags & GD_FLG_RELOC)) {
+		idx = 0;
+		memset(size, 0, sizeof(size));
+
+		start[0] = SDRAM_OFFSET(0);
+		 size[0] = atf_addr - start[0];
+		start[1] = atf_addr + atf_size;
+		 size[1] = SDRAM_OFFSET(SZ_1M) - start[1];
+		start[2] = SDRAM_OFFSET(SZ_2M);
+		 size[2] = top - start[2];
+
+		for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+			if (!size[i])
+				continue;
+
+			gd->bd->bi_dram[idx].start = start[i];
+			gd->bd->bi_dram[idx].size = size[i];
+			idx++;
+		}
+	/* There is no bl31, fill whole ram size */
+	} else if (!(gd->flags & GD_FLG_RELOC)) {
+		gd->bd->bi_dram[0].start = SDRAM_OFFSET(0);
+		gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start;
+	} else {
+		/*
+		 * Do nothing for bl31 when called from dram_initr_banksize(),
+		 * which is after relocation.
+		 */
+	}
+
+	/*
+	 * Reserve region for OP-TEE
+	 *
+	 * What ever U-Boot runs on AArch64 or AArch32 mode, the OP-TEE is
+	 * AArch64 mode.
+	 *
+	 * For OP-TEE:
+	 *	AArch64: dcache is enabled;
+	 *	AArch32: dcache is disabled(due to some unknown issues);
+	 *
+	 * For the data coherence, U-Boot has to follow the OP-TEE dcache
+	 * policy to map MMU attributes of OP-TEE region.
+	 *
+	 * For AArch64: MMU translate table is created manual by rkxxx.c file
+	 * and all memory region is mapped, that's good to match OP-TEE policy.
+	 * For AArch32: MMU translate table is setup according to bi_dram[..]
+	 * that OP-TEE region has been reserved and would not be mapped,
+	 * i.e. dcache is disabled, that's also good to match OP-TEE policy.
+	 *
+	 * When CONFIG_ARM64_BOOT_AARCH32 is enabled, U-Boot runs on AArch32
+	 * while OP-TEE runs on AArch64. U-Boot shouldn't reserved OP-TEE region
+	 * too early and should map MMU translate table of it(in intir_cache()).
+	 * So we reserve the region in dram_initr_banksize() after MMU setup.
+	 *
+	 *
+	 *	The are two kinds of OP-TEE memory layout
+	 *
+	 * legacy:
+	 * 	|----|-------o---------------------------------|
+	 * 	|....| OPTEE |*********************************|
+	 * 	|----|-------o---------------------------------|
+	 * 	0x0 2M      6M(or more)                 .....
+	 *
+	 * new:
+	 * 	|----|-------------------o-------o-------------|
+	 * 	|....|*******************| OPTEE |*************|
+	 * 	|----|-------------------o-------o-------------|
+	 * 	0x0  2M                132M     164M(or less) .....
+	 */
+
+	if (resv_tee && tos_size) {
+		/* If idx is not initialized, calculate idx */
+		if (idx == NOT_INITIAL) {
+			for (idx = 0; idx < CONFIG_NR_DRAM_BANKS; idx++) {
+				if (!gd->bd->bi_dram[idx].size)
+					break;
+			}
+		}
+
+		if (tos_addr == SZ_2M) {
+			gd->bd->bi_dram[idx - 1].start = tos_addr + tos_size;
+			gd->bd->bi_dram[idx - 1].size =
+					top - gd->bd->bi_dram[idx - 1].start;
+		} else {
+			gd->bd->bi_dram[idx - 1].size = tos_addr -
+					gd->bd->bi_dram[idx - 1].start;
+			gd->bd->bi_dram[idx].start = tos_addr + tos_size;
+			gd->bd->bi_dram[idx].size =
+					top - gd->bd->bi_dram[idx].start;
+		}
+#ifdef DEBUG
+		for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+			debug("%s: bank[%d]=0x%llx-0x%llx\n",
+			      __func__, i, (u64)gd->bd->bi_dram[i].start,
+			      (u64)gd->bd->bi_dram[i].start +
+			      gd->bd->bi_dram[i].size);
+		}
 #endif
+	}
 
 	return 0;
 }
 
-#if defined(CONFIG_ARM64_BOOT_AARCH32)
-int dram_initr_banksize(void)
+/*
+ * !defined(CONFIG_ARM64_BOOT_AARCH32) means: U-Boot and OP-TEE both run
+ * on AArch32 or AArch64, they are same mode. Otherwise OP-TEE is AArch64
+ * while U-Boot is AArch32. There is data cache coherence issue to fix.
+ */
+int dram_init_banksize(void)
 {
-	size_t top = min((unsigned long)(gd->ram_size + CONFIG_SYS_SDRAM_BASE),
-			 gd->ram_top);
-	struct tos_parameter_t *tos_parameter;
-	u32 checksum;
-
-	tos_parameter = (struct tos_parameter_t *)(CONFIG_SYS_SDRAM_BASE +
-			TRUST_PARAMETER_OFFSET);
-
-	checksum = trust_checksum((uint8_t *)(unsigned long)tos_parameter + 8,
-				  sizeof(struct tos_parameter_t) - 8);
-
-	if ((checksum == tos_parameter->checksum) &&
-	    (tos_parameter->tee_mem.flags == 1)) {
-		gd->bd->bi_dram[0].size = tos_parameter->tee_mem.phy_addr
-					- gd->bd->bi_dram[0].start;
-		gd->bd->bi_dram[1].start = tos_parameter->tee_mem.phy_addr +
-					tos_parameter->tee_mem.size;
-		gd->bd->bi_dram[1].size = top - gd->bd->bi_dram[1].start;
-	}
+	return __dram_init_banksize(!IS_ENABLED(CONFIG_ARM64_BOOT_AARCH32));
+}
 
-	return 0;
+int dram_initr_banksize(void)
+{
+	return __dram_init_banksize(IS_ENABLED(CONFIG_ARM64_BOOT_AARCH32));
 }
 #endif
-#endif
 
 size_t rockchip_sdram_size(phys_addr_t reg)
 {
@@ -226,6 +388,28 @@ int dram_init(void)
 	struct udevice *dev;
 	int ret;
 
+	/* New way: atags info */
+#ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
+	struct tag *t = NULL;
+	int i, count;
+
+	t = atags_get_tag(ATAG_DDR_MEM);
+	if (t && t->u.ddr_mem.count) {
+		gd->ram_size = 0;
+		count = t->u.ddr_mem.count;
+
+		for (i = 0; i < count; i++) {
+			gd->ram_size += t->u.ddr_mem.bank[i + count];
+			debug("%s: ram[%d] start=0x%08llx, size=0x%08llx, sum=0x%08llx\n",
+			      __func__, i, (u64)gd->bd->bi_dram[i].start,
+			      (u64)gd->bd->bi_dram[i].size, (u64)gd->ram_size);
+		}
+
+		return 0;
+	}
+#endif
+
+	/* Legacy way: os registers */
 	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
 	if (ret) {
 		debug("DRAM init failed: %d\n", ret);
diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index f159cbddf3..c8dfcb4248 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -20,7 +20,7 @@
 
 #define CONFIG_SYS_NS16550_MEM32
 
-#define CONFIG_NR_DRAM_BANKS		2
+#define CONFIG_NR_DRAM_BANKS		4
 
 #ifndef CONFIG_SPL_BUILD
 #include <config_distro_defaults.h>

commit b328c914c0d2f742a0badebd0420dc85e504bfcb
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Oct 16 17:05:33 2018 +0800

    clk: rockchip: rk3288: fix up the dclk_vop freq setting
    
    Change-Id: I960a02cba63076afbc845e5ccdfb9f85a553d38b
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3288.h b/arch/arm/include/asm/arch-rockchip/cru_rk3288.h
index 79a6d6db80..568a119bf4 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3288.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3288.h
@@ -133,6 +133,28 @@ enum {
 	SPI0_DIV_MASK		= 0x7f << SPI0_DIV_SHIFT,
 };
 
+/* CRU_CLKSEL27_CON */
+enum {
+	DCLK_VOP0_DIV_SHIFT	= 8,
+	DCLK_VOP0_DIV_MASK	= 0xff << DCLK_VOP0_DIV_SHIFT,
+	DCLK_VOP0_PLL_SHIFT	= 0,
+	DCLK_VOP0_PLL_MASK	= 3 << DCLK_VOP0_PLL_SHIFT,
+	DCLK_VOP0_SELECT_CPLL	= 0,
+	DCLK_VOP0_SELECT_GPLL	= 1,
+	DCLK_VOP0_SELECT_NPLL	= 2,
+};
+
+/* CRU_CLKSEL29_CON */
+enum {
+	DCLK_VOP1_DIV_SHIFT	= 8,
+	DCLK_VOP1_DIV_MASK	= 0xff << DCLK_VOP1_DIV_SHIFT,
+	DCLK_VOP1_PLL_SHIFT	= 6,
+	DCLK_VOP1_PLL_MASK	= 3 << DCLK_VOP1_PLL_SHIFT,
+	DCLK_VOP1_SELECT_CPLL	= 0,
+	DCLK_VOP1_SELECT_GPLL	= 1,
+	DCLK_VOP1_SELECT_NPLL	= 2,
+};
+
 /* CRU_CLKSEL37_CON */
 enum {
 	PCLK_CORE_DBG_DIV_SHIFT	= 9,
diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index 20dd359742..20b1fc82ee 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -177,6 +177,40 @@ static int rkclk_set_pll(struct rk3288_cru *cru, enum rk_clk_id clk_id,
 	return 0;
 }
 
+/* Get pll rate by id */
+static u32 rkclk_pll_get_rate(struct rk3288_cru *cru,
+			      enum rk_clk_id clk_id)
+{
+	u32 nr, no, nf;
+	u32 con;
+	int pll_id = rk_pll_id(clk_id);
+	struct rk3288_pll *pll = &cru->pll[pll_id];
+	static u8 clk_shift[CLK_COUNT] = {
+		0xff, APLL_MODE_SHIFT, DPLL_MODE_SHIFT, CPLL_MODE_SHIFT,
+		GPLL_MODE_SHIFT, NPLL_MODE_SHIFT
+	};
+	uint shift;
+
+	con = readl(&cru->cru_mode_con);
+	shift = clk_shift[clk_id];
+	switch ((con >> shift) & CRU_MODE_MASK) {
+	case APLL_MODE_SLOW:
+		return OSC_HZ;
+	case APLL_MODE_NORMAL:
+		/* normal mode */
+		con = readl(&pll->con0);
+		no = ((con & CLKOD_MASK) >> CLKOD_SHIFT) + 1;
+		nr = ((con & CLKR_MASK) >> CLKR_SHIFT) + 1;
+		con = readl(&pll->con1);
+		nf = ((con & CLKF_MASK) >> CLKF_SHIFT) + 1;
+
+		return (24 * nf / (nr * no)) * 1000000;
+	case APLL_MODE_DEEP:
+	default:
+		return 32768;
+	}
+}
+
 static int rkclk_configure_ddr(struct rk3288_cru *cru, struct rk3288_grf *grf,
 			       unsigned int hz)
 {
@@ -342,37 +376,90 @@ static int rockchip_mac_set_clk(struct rk3288_cru *cru, uint freq)
 static int rockchip_vop_set_clk(struct rk3288_cru *cru, struct rk3288_grf *grf,
 				int periph, unsigned int rate_hz)
 {
-	struct pll_div npll_config = {0};
-	u32 lcdc_div;
+	struct pll_div cpll_config = {0};
+	u32 lcdc_div, parent;
 	int ret;
+	unsigned int gpll_rate, npll_rate;
 
-	ret = pll_para_config(rate_hz, &npll_config, &lcdc_div);
-	if (ret)
-		return ret;
-
-	rk_clrsetreg(&cru->cru_mode_con, NPLL_MODE_MASK,
-		     NPLL_MODE_SLOW << NPLL_MODE_SHIFT);
-	rkclk_set_pll(cru, CLK_NEW, &npll_config);
-
-	/* waiting for pll lock */
-	while (1) {
-		if (readl(&grf->soc_status[1]) & SOCSTS_NPLL_LOCK)
-			break;
-		udelay(1);
-	}
-
-	rk_clrsetreg(&cru->cru_mode_con, NPLL_MODE_MASK,
-		     NPLL_MODE_NORMAL << NPLL_MODE_SHIFT);
+	gpll_rate = rkclk_pll_get_rate(cru, CLK_GENERAL);
+	npll_rate = rkclk_pll_get_rate(cru, CLK_NEW);
 
-	/* vop dclk source clk: npll,dclk_div: 1 */
+	/* vop dclk source clk: cpll,dclk_div: 1 */
 	switch (periph) {
 	case DCLK_VOP0:
-		rk_clrsetreg(&cru->cru_clksel_con[27], 0xff << 8 | 3 << 0,
-			     (lcdc_div - 1) << 8 | 2 << 0);
+		ret = (readl(&cru->cru_clksel_con[27]) && DCLK_VOP0_PLL_MASK) >>
+		      DCLK_VOP0_PLL_SHIFT;
+		if (ret == DCLK_VOP0_SELECT_CPLL) {
+			ret = pll_para_config(rate_hz, &cpll_config, &lcdc_div);
+			if (ret)
+				return ret;
+
+			rk_clrsetreg(&cru->cru_mode_con, CPLL_MODE_MASK,
+				     CPLL_MODE_SLOW << CPLL_MODE_SHIFT);
+			rkclk_set_pll(cru, CLK_NEW, &cpll_config);
+
+			/* waiting for pll lock */
+			while (1) {
+				if (readl(&grf->soc_status[1]) &
+					  SOCSTS_CPLL_LOCK)
+					break;
+				udelay(1);
+			}
+
+			rk_clrsetreg(&cru->cru_mode_con, CPLL_MODE_MASK,
+				     CPLL_MODE_NORMAL << CPLL_MODE_SHIFT);
+			parent = DCLK_VOP0_SELECT_CPLL;
+		} else if (ret == DCLK_VOP0_SELECT_GPLL) {
+			parent = DCLK_VOP0_SELECT_GPLL;
+			lcdc_div = DIV_ROUND_UP(gpll_rate,
+						rate_hz);
+		} else {
+			parent = DCLK_VOP0_SELECT_NPLL;
+			lcdc_div = DIV_ROUND_UP(npll_rate,
+						rate_hz);
+		}
+		rk_clrsetreg(&cru->cru_clksel_con[27],
+			     DCLK_VOP0_DIV_MASK | DCLK_VOP0_PLL_MASK,
+			     ((lcdc_div - 1) << DCLK_VOP0_DIV_SHIFT) |
+			     (parent << DCLK_VOP0_PLL_SHIFT));
 		break;
 	case DCLK_VOP1:
-		rk_clrsetreg(&cru->cru_clksel_con[29], 0xff << 8 | 3 << 6,
-			     (lcdc_div - 1) << 8 | 2 << 6);
+		ret = (readl(&cru->cru_clksel_con[29]) && DCLK_VOP1_PLL_MASK) >>
+		      DCLK_VOP1_PLL_SHIFT;
+		if (ret == DCLK_VOP1_SELECT_CPLL) {
+			ret = pll_para_config(rate_hz, &cpll_config, &lcdc_div);
+			if (ret)
+				return ret;
+
+			rk_clrsetreg(&cru->cru_mode_con, CPLL_MODE_MASK,
+				     CPLL_MODE_SLOW << CPLL_MODE_SHIFT);
+			rkclk_set_pll(cru, CLK_NEW, &cpll_config);
+
+			/* waiting for pll lock */
+			while (1) {
+				if (readl(&grf->soc_status[1]) &
+				    SOCSTS_CPLL_LOCK)
+					break;
+				udelay(1);
+			}
+
+			rk_clrsetreg(&cru->cru_mode_con, CPLL_MODE_MASK,
+				     CPLL_MODE_NORMAL << CPLL_MODE_SHIFT);
+
+			parent = DCLK_VOP1_SELECT_CPLL;
+		} else if (ret == DCLK_VOP1_SELECT_GPLL) {
+			parent = DCLK_VOP1_SELECT_GPLL;
+			lcdc_div = DIV_ROUND_UP(gpll_rate,
+						rate_hz);
+		} else {
+			parent = DCLK_VOP1_SELECT_NPLL;
+			lcdc_div = DIV_ROUND_UP(npll_rate,
+						rate_hz);
+		}
+		rk_clrsetreg(&cru->cru_clksel_con[29],
+			     DCLK_VOP1_DIV_MASK | DCLK_VOP1_PLL_MASK,
+			     ((lcdc_div - 1) << DCLK_VOP1_DIV_SHIFT) |
+			     (parent << DCLK_VOP1_PLL_SHIFT));
 		break;
 	}
 
@@ -495,40 +582,6 @@ void rk3288_clk_configure_cpu(struct rk3288_cru *cru, struct rk3288_grf *grf)
 		     APLL_MODE_NORMAL << APLL_MODE_SHIFT);
 }
 
-/* Get pll rate by id */
-static uint32_t rkclk_pll_get_rate(struct rk3288_cru *cru,
-				   enum rk_clk_id clk_id)
-{
-	uint32_t nr, no, nf;
-	uint32_t con;
-	int pll_id = rk_pll_id(clk_id);
-	struct rk3288_pll *pll = &cru->pll[pll_id];
-	static u8 clk_shift[CLK_COUNT] = {
-		0xff, APLL_MODE_SHIFT, DPLL_MODE_SHIFT, CPLL_MODE_SHIFT,
-		GPLL_MODE_SHIFT, NPLL_MODE_SHIFT
-	};
-	uint shift;
-
-	con = readl(&cru->cru_mode_con);
-	shift = clk_shift[clk_id];
-	switch ((con >> shift) & CRU_MODE_MASK) {
-	case APLL_MODE_SLOW:
-		return OSC_HZ;
-	case APLL_MODE_NORMAL:
-		/* normal mode */
-		con = readl(&pll->con0);
-		no = ((con & CLKOD_MASK) >> CLKOD_SHIFT) + 1;
-		nr = ((con & CLKR_MASK) >> CLKR_SHIFT) + 1;
-		con = readl(&pll->con1);
-		nf = ((con & CLKF_MASK) >> CLKF_SHIFT) + 1;
-
-		return (24 * nf / (nr * no)) * 1000000;
-	case APLL_MODE_DEEP:
-	default:
-		return 32768;
-	}
-}
-
 static ulong rockchip_mmc_get_clk(struct rk3288_cru *cru, uint gclk_rate,
 				  int periph)
 {
@@ -1039,11 +1092,52 @@ static int __maybe_unused rk3288_gmac_set_parent(struct clk *clk, struct clk *pa
 	return -EINVAL;
 }
 
+static int __maybe_unused rk3288_vop_set_parent(struct clk *clk,
+						struct clk *parent)
+{
+	struct rk3288_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3288_cru *cru = priv->cru;
+	int parent_sel;
+
+	switch (parent->id) {
+	case PLL_CPLL:
+		parent_sel = 0;
+		break;
+	case PLL_GPLL:
+		parent_sel = 1;
+		break;
+	case PLL_NPLL:
+		parent_sel = 2;
+		break;
+	default:
+		parent_sel = 0;
+		break;
+	}
+
+	switch (clk->id) {
+	case DCLK_VOP0:
+		rk_clrsetreg(&cru->cru_clksel_con[27],
+			     DCLK_VOP0_PLL_MASK, parent_sel << 0);
+		break;
+	case DCLK_VOP1:
+		rk_clrsetreg(&cru->cru_clksel_con[29],
+			     DCLK_VOP1_PLL_MASK, parent_sel << 6);
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
 static int __maybe_unused rk3288_clk_set_parent(struct clk *clk, struct clk *parent)
 {
 	switch (clk->id) {
 	case SCLK_MAC:
 		return rk3288_gmac_set_parent(clk, parent);
+	case DCLK_VOP0:
+	case DCLK_VOP1:
+		return rk3288_vop_set_parent(clk, parent);
 	case SCLK_USBPHY480M_SRC:
 		return 0;
 	}

commit ba5feded0a113bb8ec33b9cec56cf8853d0af22a
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Fri Sep 28 17:03:59 2018 +0800

    clk: rockchip: rk312x: add cpll freq init
    
    Add cpll freq setting in rkclk_init.
    If have vop display, the cpll is just for dclk vop.
    The cpll freq will be setting by dclk freq set.
    But if no vop display, the cpll need to set init freq for other
    children clk.
    
    Change-Id: Ia45892dd3c8efb77cf32b631329d927aceb8dd86
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3128.h b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
index b0d85824ef..43c63323a2 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
@@ -14,6 +14,7 @@
 
 #define APLL_HZ		(600 * MHz)
 #define GPLL_HZ		(594 * MHz)
+#define CPLL_HZ		(400 * MHz)
 #define ACLK_BUS_HZ	(148500000)
 #define ACLK_PERI_HZ	(148500000)
 
diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c
index e4064b8363..4f2b6c19f3 100644
--- a/drivers/clk/rockchip/clk_rk3128.c
+++ b/drivers/clk/rockchip/clk_rk3128.c
@@ -43,6 +43,7 @@ static struct rockchip_pll_rate_table rk3128_pll_rates[] = {
 	RK3036_PLL_RATE(600000000, 1, 75, 3, 1, 1, 0),
 	RK3036_PLL_RATE(594000000, 1, 99, 4, 1, 1, 0),
 	RK3036_PLL_RATE(500000000, 1, 125, 6, 1, 1, 0),
+	RK3036_PLL_RATE(400000000, 1, 100, 6, 1, 1, 0),
 	{ /* sentinel */ },
 };
 
@@ -756,6 +757,9 @@ static void rkclk_init(struct rk3128_clk_priv *priv)
 	rk3128_peri_set_clk(priv, ACLK_PERI, ACLK_PERI_HZ);
 	rk3128_peri_set_clk(priv, HCLK_PERI, ACLK_PERI_HZ / 2);
 	rk3128_peri_set_clk(priv, PCLK_PERI, ACLK_PERI_HZ / 2);
+
+	rockchip_pll_set_rate(&rk3128_pll_clks[CPLL],
+			      priv->cru, CPLL, CPLL_HZ);
 }
 
 static int rk3128_clk_probe(struct udevice *dev)

commit 5ef89808109426b2107da160891518698b607d99
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Aug 21 17:55:32 2018 +0800

    mmc: dw_mmc: set DWMCI_MSIZE to 6
    
    We set the fifo_depth to 0x100 word in Rockchip platform, and
    fifo_depth/2 must be multiple of dma_multiple_transaction_size.
    So we can set DWMCI_MSIZE to 6 according to max
    dma_multiple_transaction_size being 128.
    
    The DWMCI_MSIZE must be set as larger as possible. If not, dma fifo will
    be full, and crc error occur when the clock stop during the data phase.
    
    Change-Id: I013b6f9c272edbc723b2f627e88d30d653c42d1b
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 5f894297ed..3a13b51a41 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -611,7 +611,8 @@ static int dwmci_init(struct mmc *mmc)
 
 		fifo_size = dwmci_readl(host, DWMCI_FIFOTH);
 		fifo_size = ((fifo_size & RX_WMARK_MASK) >> RX_WMARK_SHIFT) + 1;
-		host->fifoth_val = MSIZE(0x2) | RX_WMARK(fifo_size / 2 - 1) |
+		host->fifoth_val = MSIZE(DWMCI_MSIZE) |
+				RX_WMARK(fifo_size / 2 - 1) |
 				TX_WMARK(fifo_size / 2);
 	}
 	dwmci_writel(host, DWMCI_FIFOTH, host->fifoth_val);
diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index 382013bd6e..d159c6f64c 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -186,7 +186,7 @@ static int rockchip_dwmmc_probe(struct udevice *dev)
 		debug("MMC: sample clock not found, not support hs200!\n");
 	host->execute_tuning = rockchip_dwmmc_execute_tuning;
 #endif
-	host->fifoth_val = MSIZE(0x2) |
+	host->fifoth_val = MSIZE(DWMCI_MSIZE) |
 		RX_WMARK(priv->fifo_depth / 2 - 1) |
 		TX_WMARK(priv->fifo_depth / 2);
 
diff --git a/include/dwmmc.h b/include/dwmmc.h
index 2003f40b60..9e5966d320 100644
--- a/include/dwmmc.h
+++ b/include/dwmmc.h
@@ -135,6 +135,12 @@
 /* quirks */
 #define DWMCI_QUIRK_DISABLE_SMU		(1 << 0)
 
+/*
+ * DWMCI_MSIZE is uses to set burst size of multiple transaction.
+ * The burst size is set to 128 if DWMCI_MSIZE is set to 0x6.
+ */
+#define DWMCI_MSIZE    0x6
+
 /**
  * struct dwmci_host - Information about a designware MMC host
  *

commit c30b51158f59cb3336bfa7ed29c0c7b0b6993b9e
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jul 25 10:47:37 2018 +0800

    mmc: re-init when read error occur
    
    Change-Id: I1cb7e913159c4588e0f5dee2180aa1945504eaf5
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index b9a1795f91..afe772284d 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -308,7 +308,26 @@ ulong mmc_bread(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt,
 			mmc->cfg->b_max : blocks_todo;
 		if (mmc_read_blocks(mmc, dst, start, cur) != cur) {
 			debug("%s: Failed to read blocks\n", __func__);
-			return 0;
+			int timeout = 0;
+re_init_retry:
+			timeout++;
+			/*
+			 * Try re-init seven times.
+			 */
+			if (timeout > 7) {
+				printf("Re-init retry timeout\n");
+				return 0;
+			}
+
+			mmc->has_init = 0;
+			if (mmc_init(mmc))
+				return 0;
+
+			if (mmc_read_blocks(mmc, dst, start, cur) != cur) {
+				printf("%s: Re-init mmc_read_blocks error\n",
+				       __func__);
+				goto re_init_retry;
+			}
 		}
 		blocks_todo -= cur;
 		start += cur;

commit 4a6b865662c5895170c5aabaa7e2f2728fad536e
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jul 25 10:56:33 2018 +0800

    mmc: dw_mmc: change the strategy of tuning
    
    The valid window of mmc sample phase is 0-360. It is separated
    to four options for tuning to improve tuning efficiency.
    If init_retry counter exceeds four, set init_retry to zero.
    
    If the default_phase is set, we use it. If fail, try strategy of
    tuning above.
    
    Change-Id: I4938717937d37ef156c278277d188f1b25d6ebbc
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index 7965f54afe..382013bd6e 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -103,120 +103,49 @@ static int rockchip_dwmmc_ofdata_to_platdata(struct udevice *dev)
 	return 0;
 }
 
-#define NUM_PHASES			270
-#define TUNING_ITERATION_TO_PHASE(i)	(DIV_ROUND_UP((i) * 270, NUM_PHASES))
-
 static int rockchip_dwmmc_execute_tuning(struct dwmci_host *host, u32 opcode)
 {
-	int ret = 0;
-	int i;
-	bool v, prev_v = 0, first_v;
-	struct range_t {
-		int start;
-		int end; /* inclusive */
-	};
-	struct range_t *ranges;
-	unsigned int range_count = 0;
-	int longest_range_len = -1;
-	int longest_range = -1;
-	int middle_phase;
+	int i = 0;
+	int ret = -1;
+	struct mmc *mmc = host->mmc;
 	struct udevice *dev = host->priv;
 	struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
-	struct mmc *mmc = host->mmc;
 
 	if (IS_ERR(&priv->sample_clk))
 		return -EIO;
 
-	ranges = calloc(sizeof(*ranges), NUM_PHASES / 2 + 1);
-	if (!ranges)
-		return -ENOMEM;
-
-	/* Try each phase and extract good ranges */
-	for (i = 0; i < NUM_PHASES; ) {
-		clk_set_phase(&priv->sample_clk, TUNING_ITERATION_TO_PHASE(i));
-
-		v = !mmc_send_tuning(mmc, opcode);
-
-		if (i == 0)
-			first_v = v;
-
-		if ((!prev_v) && v) {
-			range_count++;
-			ranges[range_count - 1].start = i;
-		}
-		if (v) {
-			ranges[range_count - 1].end = i;
-			i++;
-		} else if (i == NUM_PHASES - 1) {
-			/* No extra skipping rules if we're at the end */
-			i++;
-		} else {
-			/*
-			 * No need to check too close to an invalid
-			 * one since testing bad phases is slow.  Skip
-			 * 20 degrees.
-			 */
-			i += DIV_ROUND_UP(20 * NUM_PHASES, NUM_PHASES);
-
-			/* Always test the last one */
-			if (i >= NUM_PHASES)
-				i = NUM_PHASES - 1;
-		}
-
-		prev_v = v;
-	}
-
-	if (range_count == 0) {
-		debug("All phases bad!");
-		ret = -EIO;
-		goto free;
-	}
-
-	/* wrap around case, merge the end points */
-	if ((range_count > 1) && first_v && v) {
-		ranges[0].start = ranges[range_count - 1].start;
-		range_count--;
-	}
-
-	if (ranges[0].start == 0 && ranges[0].end == NUM_PHASES - 1) {
-		clk_set_phase(&priv->sample_clk,
-			      TUNING_ITERATION_TO_PHASE(NUM_PHASES / 2));
-		debug("All phases work, using middle phase.\n");
-		goto free;
+	if (mmc->default_phase > 0 && mmc->default_phase < 360) {
+		ret = clk_set_phase(&priv->sample_clk, mmc->default_phase);
+		if (ret)
+			printf("set clk phase fail\n");
+		else
+			ret = mmc_send_tuning(mmc, opcode);
+		mmc->default_phase = 0;
 	}
+	/*
+	 * If use default_phase to tune successfully, return.
+	 * Otherwise, use the othe phase to tune.
+	 */
+	if (!ret)
+		return ret;
 
-	/* Find the longest range */
-	for (i = 0; i < range_count; i++) {
-		int len = (ranges[i].end - ranges[i].start + 1);
-
-		if (len < 0)
-			len += NUM_PHASES;
+	for (i = 0; i < 5; i++) {
+		/* mmc->init_retry must be 0, 1, 2, 3 */
+		if (mmc->init_retry == 4)
+			mmc->init_retry = 0;
 
-		if (longest_range_len < len) {
-			longest_range_len = len;
-			longest_range = i;
+		ret = clk_set_phase(&priv->sample_clk, 90 * mmc->init_retry);
+		if (ret) {
+			printf("set clk phase fail\n");
+			break;
 		}
-
-		debug("Good phase range %d-%d (%d len)\n",
-		      TUNING_ITERATION_TO_PHASE(ranges[i].start),
-		      TUNING_ITERATION_TO_PHASE(ranges[i].end), len);
+		ret = mmc_send_tuning(mmc, opcode);
+		debug("Tuning phase is %d, ret is %d\n", mmc->init_retry * 90, ret);
+		mmc->init_retry++;
+		if (!ret)
+			break;
 	}
 
-	printf("Best phase range %d-%d (%d len)\n",
-	       TUNING_ITERATION_TO_PHASE(ranges[longest_range].start),
-	       TUNING_ITERATION_TO_PHASE(ranges[longest_range].end),
-	       longest_range_len);
-
-	middle_phase = ranges[longest_range].start + longest_range_len / 2;
-	middle_phase %= NUM_PHASES;
-	debug("Successfully tuned phase to %d\n",
-	      TUNING_ITERATION_TO_PHASE(middle_phase));
-
-	clk_set_phase(&priv->sample_clk,
-		      TUNING_ITERATION_TO_PHASE(middle_phase));
-
-free:
-	free(ranges);
 	return ret;
 }
 

commit e860ec325800fca3ea2cdfb09645a563b8bb37a1
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Aug 27 09:42:34 2018 +0800

    mmc: add init_retry
    
    Use the init_retry when mmc error occur.
    
    Change-Id: I5db56d59d4c1f2ed2744d800f475da228cfcaf69
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index ef57f0edfe..7965f54afe 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -284,6 +284,7 @@ static int rockchip_dwmmc_probe(struct udevice *dev)
 		plat->cfg.host_caps |= MMC_MODE_HS200;
 	plat->mmc.default_phase =
 		dev_read_u32_default(dev, "default-sample-phase", 0);
+	plat->mmc.init_retry = 0;
 	host->mmc = &plat->mmc;
 	host->mmc->priv = &priv->host;
 	host->mmc->dev = dev;
diff --git a/include/mmc.h b/include/mmc.h
index 94922945b6..e3e1bbaeaf 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -567,6 +567,7 @@ struct mmc {
 	uint erase_grp_size;	/* in 512-byte sectors */
 	uint hc_wp_grp_size;	/* in 512-byte sectors */
 	int default_phase;	/* set the default sample clock phase */
+	uint init_retry;        /* re-init mmc when error occur */
 	struct sd_ssr	ssr;	/* SD status register */
 	struct emmc_esr esr;    /* emmc status register */
 	u64 capacity;

commit 6ba4112660633d4412fb4a0ae45b5cf727c431c2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 8 14:25:23 2018 +0800

    board_r: env: support storage env when kernel dtb is enabled
    
    if we would like to use kernel dtb, it must depends on nowhere
    env to detect boot media and initialize it. After storage is
    initialized, we switch env from nowhere to CONFIG_ENV_IS_IN_xxx=y,
    nowhere env info will append or override to storage env.
    
    Change-Id: Id1cf44d4b25dcaba3c142b283ed093bed0decafe
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/board_r.c b/common/board_r.c
index cd79e97bae..818543446b 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -32,6 +32,7 @@
 #endif
 #include <malloc.h>
 #include <mapmem.h>
+#include <memalign.h>
 #ifdef CONFIG_BITBANGMII
 #include <miiphy.h>
 #endif
@@ -435,6 +436,7 @@ static int initr_mmc(void)
 }
 #endif
 
+#if !defined(CONFIG_USING_KERNEL_DTB) || !defined(CONFIG_ENV_IS_NOWHERE)
 /*
  * Tell if it's OK to load the environment early in boot.
  *
@@ -473,6 +475,44 @@ static int initr_env(void)
 
 	return 0;
 }
+#endif
+
+#ifdef CONFIG_USING_KERNEL_DTB
+static int initr_env_nowhere(void)
+{
+#if defined(CONFIG_NEEDS_MANUAL_RELOC)
+	env_reloc();
+	env_htab.change_ok += gd->reloc_off;
+#endif
+	set_default_env(NULL);
+
+	return 0;
+}
+
+#if !defined(CONFIG_ENV_IS_NOWHERE)
+static int initr_env_switch(void)
+{
+	ALLOC_CACHE_ALIGN_BUFFER(env_t, env_nowhere, 1);
+	int ret;
+
+	/* Export nowhere env for late use */
+	ret = env_export(env_nowhere);
+	if (ret) {
+		printf("%s: export nowhere env fail, ret=%d\n", __func__, ret);
+		return -EINVAL;
+	}
+
+	/* Destroy nowhere env and import storage env */
+	initr_env();
+
+	/* Append/override nowhere env to storage env */
+	himport_r(&env_htab, (char *)env_nowhere->data, ENV_SIZE, '\0',
+		  H_NOCLEAR, 0, 0, NULL);
+
+	return 0;
+}
+#endif	/* CONFIG_ENV_IS_NOWHERE */
+#endif	/* CONFIG_USING_KERNEL_DTB */
 
 #ifdef CONFIG_SYS_BOOTPARAMS_LEN
 static int initr_malloc_bootparams(void)
@@ -738,12 +778,27 @@ static init_fnc_t init_sequence_r[] = {
 #ifdef CONFIG_DM
 	initr_dm,
 #endif
+
+/*
+ * kernel dtb must depends on nowhere to detect boot storage media
+ * and initialize it.
+ */
 #ifdef CONFIG_USING_KERNEL_DTB
-	initr_env,
+	initr_env_nowhere,
 #endif
+
 #if defined(CONFIG_ARM) || defined(CONFIG_NDS32)
 	board_init,	/* Setup chipselects */
 #endif
+
+/*
+ * Now that storage has been initialized in board_init(), we could switch env
+ * from nowhere to storage, i.e. CONFIG_ENV_IS_IN_xxx=y.
+ */
+#if defined(CONFIG_USING_KERNEL_DTB) && !defined(CONFIG_ENV_IS_NOWHERE)
+	initr_env_switch,
+#endif
+
 	/*
 	 * TODO: printing of the clock inforamtion of the board is now
 	 * implemented as part of bdinfo command. Currently only support for

commit 2e02c4e25b46c09290872450562aa02248de403f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 9 19:40:28 2018 +0800

    dm: of_access: add of_alias_get_dev() and of_alias_dump()
    
     - support get device_node by given stem and alias id;
     - dump of alias nodes added in aliases_lookup.
    
    Change-Id: I3ed8bd4692dd3fbbeebe9978a797a5a2dcf7eb23
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/core/of_access.c b/drivers/core/of_access.c
index c31cba7fd6..ff7be7b5b5 100644
--- a/drivers/core/of_access.c
+++ b/drivers/core/of_access.c
@@ -766,6 +766,42 @@ int of_alias_get_id(const struct device_node *np, const char *stem)
 	return id;
 }
 
+struct device_node *of_alias_get_dev(const char *stem, int id)
+{
+	struct alias_prop *app;
+	struct device_node *np = NULL;
+
+	mutex_lock(&of_mutex);
+	list_for_each_entry(app, &aliases_lookup, link) {
+		if (strcmp(app->stem, stem) != 0)
+			continue;
+
+		if (id == app->id) {
+			np = app->np;
+			break;
+		}
+	}
+	mutex_unlock(&of_mutex);
+
+	return np;
+}
+
+struct device_node *of_alias_dump(void)
+{
+	struct alias_prop *app;
+	struct device_node *np = NULL;
+
+	mutex_lock(&of_mutex);
+	list_for_each_entry(app, &aliases_lookup, link) {
+		printf("%s: Alias %s%d: %s, phandle=%d\n", __func__,
+		       app->stem, app->id,
+		       app->np->full_name, app->np->phandle);
+	}
+	mutex_unlock(&of_mutex);
+
+	return np;
+}
+
 struct device_node *of_get_stdout(void)
 {
 	return of_stdout;
diff --git a/include/dm/of_access.h b/include/dm/of_access.h
index c49d287dd6..64efdb7035 100644
--- a/include/dm/of_access.h
+++ b/include/dm/of_access.h
@@ -393,6 +393,22 @@ int of_alias_scan(void);
  */
 int of_alias_get_id(const struct device_node *np, const char *stem);
 
+/**
+ * of_alias_get_dev - Get device_node by given stem and alias id
+ *
+ * Travels the lookup table to get the device_node by given stem and alias id.
+ *
+ * @stem:	Alias stem of the given device_node
+ * @id:         Alias id of the given device_node
+ * @return device_node, if found, else NULL
+ */
+struct device_node *of_alias_get_dev(const char *stem, int id);
+
+/**
+ * of_alias_dump - Dump of alias nodes added in aliases_lookup.
+ */
+struct device_node *of_alias_dump(void);
+
 /**
  * of_get_stdout() - Get node to use for stdout
  *

commit ebdb22331243b804491cf9049454d2c4f3886ccd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 16 10:13:33 2018 +0800

    make.sh: rk1808 support RSA-PKCS1 V2.1 pack for trust
    
    Change-Id: I9b27795c339516198cb2b499c2796ff7a7ef0b11
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 2851949c09..4be5eff987 100755
--- a/make.sh
+++ b/make.sh
@@ -423,8 +423,8 @@ fixup_platform_configure()
 	local count plat
 
 # <*> Fixup rsa/sha pack mode for platforms
-	# RK3308/PX30/RK3326 use RSA-PKCS1 V2.1, it's pack magic is "3"
-	if [ $RKCHIP = "PX30" -o $RKCHIP = "RK3326" -o $RKCHIP = "RK3308" ]; then
+	# RK3308/PX30/RK3326/RK1808 use RSA-PKCS1 V2.1, it's pack magic is "3"
+	if [ $RKCHIP = "PX30" -o $RKCHIP = "RK3326" -o $RKCHIP = "RK3308" -o $RKCHIP = "RK1808" ]; then
 		PLATFORM_RSA="--rsa 3"
 	# RK3368 use rk big endian SHA256, it's pack magic is "2"
 	elif [ $RKCHIP = "RK3368" ]; then

commit 4e40f4e8332f82f7a741f4239387830ece41584f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 16 09:33:13 2018 +0800

    rockchip: atags: destroy atags only when atags header is valid
    
    Change-Id: Ied01c2460291084714002293a3b4ed01e69fa270
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk_atags.c b/arch/arm/mach-rockchip/rk_atags.c
index a8f0d99b2e..a7ceaf2333 100644
--- a/arch/arm/mach-rockchip/rk_atags.c
+++ b/arch/arm/mach-rockchip/rk_atags.c
@@ -227,7 +227,8 @@ struct tag *atags_get_tag(u32 magic)
 
 void atags_destroy(void)
 {
-	memset((char *)ATAGS_PHYS_BASE, 0, sizeof(struct tag));
+	if (atags_is_available())
+		memset((char *)ATAGS_PHYS_BASE, 0, sizeof(struct tag));
 }
 
 #if (defined(CONFIG_DEBUG_ATAGS) || defined(DEBUG)) && \

commit a59bd218a507e5913401e3faa77982ebfcd654bc
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Oct 10 12:09:03 2018 +0800

    rockchip: sdhci: support hs200&hs400
    
    Add the "mmc-hs200-1_8v & mmc-hs400-1_8v" to the dts
    to support hs200&hs400
    
    Change-Id: Ic141b75b328a56609853aae50c8a094c605931e1
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index 63b5ddddfd..af840fc56d 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -319,6 +319,10 @@ static int arasan_sdhci_probe(struct udevice *dev)
 	host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD;
 	host->max_clk = max_frequency;
 
+	if (dev_read_bool(dev, "mmc-hs200-1_8v"))
+		host->host_caps |= MMC_MODE_HS200;
+	else if (dev_read_bool(dev, "mmc-hs400-1_8v"))
+		host->host_caps |= MMC_MODE_HS400;
 	ret = sdhci_setup_cfg(&plat->cfg, host, 0, EMMC_MIN_FREQ);
 
 	host->mmc = &plat->mmc;

commit 09494d3a1b72d07d6b18a4c8b17c3260dfdddc47
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jul 25 09:50:11 2018 +0800

    mmc: add default_phase
    
    Add default sample clock phase and it can be used when
    run mmc_send_tuning.
    
    The function mmc_send_tuning will use default_phase directly
    to set the sample clock phase, and this can improve tuning's
    efficiency. If use default_phase to run mmc_send_tuning fail,
    it will change to tune 0&45...&270 phase.
    
    Change-Id: I747f7820a7d2a67ffb9152794acec31b15e97e2b
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index 7030f2fc6a..ef57f0edfe 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -282,6 +282,8 @@ static int rockchip_dwmmc_probe(struct udevice *dev)
 	dwmci_setup_cfg(&plat->cfg, host, priv->minmax[1], priv->minmax[0]);
 	if (dev_read_bool(dev, "mmc-hs200-1_8v"))
 		plat->cfg.host_caps |= MMC_MODE_HS200;
+	plat->mmc.default_phase =
+		dev_read_u32_default(dev, "default-sample-phase", 0);
 	host->mmc = &plat->mmc;
 	host->mmc->priv = &priv->host;
 	host->mmc->dev = dev;
diff --git a/include/mmc.h b/include/mmc.h
index 9fb43b6a8c..94922945b6 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -566,6 +566,7 @@ struct mmc {
 	uint write_bl_len;
 	uint erase_grp_size;	/* in 512-byte sectors */
 	uint hc_wp_grp_size;	/* in 512-byte sectors */
+	int default_phase;	/* set the default sample clock phase */
 	struct sd_ssr	ssr;	/* SD status register */
 	struct emmc_esr esr;    /* emmc status register */
 	u64 capacity;

commit 26dd3474b39b26f6e68e08626b09657c4f976574
Author: William Wu <william.wu@rock-chips.com>
Date:   Sat Sep 29 16:35:37 2018 +0800

    usb: gadget: add SuperSpeed support to the Gadget Framework
    
    This patch implements the Binary Device Object Store (BOS)
    Descriptor for SuperSpeed. It also add SuperSpeed Endpoint
    Descriptors for fastboot and rockusb gadget.
    
    Change-Id: I7d858e1b5117d403919f5fdacb40072a5fad336f
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c
index ff89c1599c..90cbdddd28 100644
--- a/drivers/usb/gadget/composite.c
+++ b/drivers/usb/gadget/composite.c
@@ -57,6 +57,8 @@ int usb_add_function(struct usb_configuration *config,
 		config->fullspeed = 1;
 	if (!config->highspeed && function->hs_descriptors)
 		config->highspeed = 1;
+	if (!config->superspeed && function->ss_descriptors)
+		config->superspeed = 1;
 
 done:
 	if (value)
@@ -192,10 +194,17 @@ static int config_buf(struct usb_configuration *config,
 
 	/* add each function's descriptors */
 	list_for_each_entry(f, &config->functions, list) {
-		if (speed == USB_SPEED_HIGH)
+		switch (speed) {
+		case USB_SPEED_SUPER:
+			descriptors = f->ss_descriptors;
+			break;
+		case USB_SPEED_HIGH:
 			descriptors = f->hs_descriptors;
-		else
+			break;
+		default:
 			descriptors = f->descriptors;
+		}
+
 		if (!descriptors)
 			continue;
 		status = usb_descriptor_fillbuf(next, len,
@@ -219,7 +228,9 @@ static int config_desc(struct usb_composite_dev *cdev, unsigned w_value)
 	int                             hs = 0;
 	struct usb_configuration	*c;
 
-	if (gadget_is_dualspeed(gadget)) {
+	if (gadget->speed == USB_SPEED_SUPER)
+		speed = gadget->speed;
+	else if (gadget_is_dualspeed(gadget)) {
 		if (gadget->speed == USB_SPEED_HIGH)
 			hs = 1;
 		if (type == USB_DT_OTHER_SPEED_CONFIG)
@@ -230,13 +241,20 @@ static int config_desc(struct usb_composite_dev *cdev, unsigned w_value)
 
 	w_value &= 0xff;
 	list_for_each_entry(c, &cdev->configs, list) {
-		if (speed == USB_SPEED_HIGH) {
+		switch (speed) {
+		case USB_SPEED_SUPER:
+			if (!c->superspeed)
+				continue;
+			break;
+		case USB_SPEED_HIGH:
 			if (!c->highspeed)
 				continue;
-		} else {
+			break;
+		default:
 			if (!c->fullspeed)
 				continue;
 		}
+
 		if (w_value == 0)
 			return config_buf(c, speed, cdev->req->buf, type);
 		w_value--;
@@ -274,6 +292,8 @@ static int count_configs(struct usb_composite_dev *cdev, unsigned type)
 static int bos_desc(struct usb_composite_dev *cdev)
 {
 	struct usb_dev_cap_header	*cap;
+	struct usb_ext_cap_descriptor	*usb_ext;
+	struct usb_ss_cap_descriptor	*ss_cap;
 	struct usb_bos_descriptor	*bos = cdev->req->buf;
 
 	bos->bLength = USB_DT_BOS_SIZE;
@@ -281,12 +301,49 @@ static int bos_desc(struct usb_composite_dev *cdev)
 	bos->wTotalLength = cpu_to_le16(USB_DT_BOS_SIZE);
 	bos->bNumDeviceCaps = 0;
 
-	cap = cdev->req->buf + le16_to_cpu(bos->wTotalLength);
-	bos->bNumDeviceCaps++;
-	bos->wTotalLength = cpu_to_le16(bos->wTotalLength + sizeof(*cap));
-	cap->bLength = sizeof(*cap);
-	cap->bDescriptorType = USB_DT_DEVICE_CAPABILITY;
-	cap->bDevCapabilityType = 0;
+	if (cdev->gadget->speed < USB_SPEED_SUPER) {
+		/* For rockusb with bcdUSB (0x0201) */
+		cap = cdev->req->buf + le16_to_cpu(bos->wTotalLength);
+		bos->bNumDeviceCaps++;
+		bos->wTotalLength = cpu_to_le16(bos->wTotalLength +
+						sizeof(*cap));
+		cap->bLength = sizeof(*cap);
+		cap->bDescriptorType = USB_DT_DEVICE_CAPABILITY;
+		cap->bDevCapabilityType = 0;
+	} else {
+		/*
+		 * A SuperSpeed device shall include the USB2.0
+		 * extension descriptor and shall support LPM when
+		 * operating in USB2.0 HS mode.
+		 */
+		usb_ext = cdev->req->buf + le16_to_cpu(bos->wTotalLength);
+		bos->bNumDeviceCaps++;
+		bos->wTotalLength = cpu_to_le16(bos->wTotalLength +
+						USB_DT_USB_EXT_CAP_SIZE);
+		usb_ext->bLength = USB_DT_USB_EXT_CAP_SIZE;
+		usb_ext->bDescriptorType = USB_DT_DEVICE_CAPABILITY;
+		usb_ext->bDevCapabilityType = USB_CAP_TYPE_EXT;
+		usb_ext->bmAttributes = USB_LPM_SUPPORT;
+
+		/*
+		 * The Superspeed USB Capability descriptor shall be
+		 * implemented by all SuperSpeed devices.
+		 */
+		ss_cap = cdev->req->buf + le16_to_cpu(bos->wTotalLength);
+		bos->bNumDeviceCaps++;
+		bos->wTotalLength = cpu_to_le16(bos->wTotalLength +
+						USB_DT_USB_SS_CAP_SIZE);
+		ss_cap->bLength = USB_DT_USB_SS_CAP_SIZE;
+		ss_cap->bDescriptorType = USB_DT_DEVICE_CAPABILITY;
+		ss_cap->bDevCapabilityType = USB_SS_CAP_TYPE;
+		ss_cap->bmAttributes = 0; /* LTM is not supported yet */
+		ss_cap->wSpeedSupported = cpu_to_le16(USB_FULL_SPEED_OPERATION |
+				USB_HIGH_SPEED_OPERATION |
+				USB_5GBPS_OPERATION);
+		ss_cap->bFunctionalitySupport = USB_FULL_SPEED_OPERATION;
+		ss_cap->bU1devExitLat = USB_DEFAULT_U1_DEV_EXIT_LAT;
+		ss_cap->bU2DevExitLat = cpu_to_le16(USB_DEFAULT_U2_DEV_EXIT_LAT);
+	}
 
 	return le16_to_cpu(bos->wTotalLength);
 }
@@ -352,21 +409,24 @@ static int set_config(struct usb_composite_dev *cdev,
 		result = 0;
 
 	debug("%s: %s speed config #%d: %s\n", __func__,
-	     ({ char *speed;
-		     switch (gadget->speed) {
-		     case USB_SPEED_LOW:
-			     speed = "low";
-			     break;
-		     case USB_SPEED_FULL:
-			     speed = "full";
-			     break;
-		     case USB_SPEED_HIGH:
-			     speed = "high";
-			     break;
-		     default:
-			     speed = "?";
-			     break;
-		     };
+	      ({ char *speed;
+		switch (gadget->speed) {
+		case USB_SPEED_LOW:
+			speed = "low";
+			break;
+		case USB_SPEED_FULL:
+			speed = "full";
+			break;
+		case USB_SPEED_HIGH:
+			speed = "high";
+			break;
+		case USB_SPEED_SUPER:
+			speed = "super";
+			break;
+		default:
+			speed = "?";
+			break;
+		};
 		     speed;
 	     }), number, c ? c->label : "unconfigured");
 
@@ -387,10 +447,16 @@ static int set_config(struct usb_composite_dev *cdev,
 		 * function's setup callback instead of the current
 		 * configuration's setup callback.
 		 */
-		if (gadget->speed == USB_SPEED_HIGH)
+		switch (gadget->speed) {
+		case USB_SPEED_SUPER:
+			descriptors = f->ss_descriptors;
+			break;
+		case USB_SPEED_HIGH:
 			descriptors = f->hs_descriptors;
-		else
+			break;
+		default:
 			descriptors = f->descriptors;
+		}
 
 		for (; *descriptors; ++descriptors) {
 			if ((*descriptors)->bDescriptorType != USB_DT_ENDPOINT)
@@ -467,14 +533,13 @@ int usb_add_config(struct usb_composite_dev *cdev,
 		list_del(&config->list);
 		config->cdev = NULL;
 	} else {
-		debug("cfg %d/%p speeds:%s%s\n",
-			config->bConfigurationValue, config,
-			config->highspeed ? " high" : "",
-			config->fullspeed
-				? (gadget_is_dualspeed(cdev->gadget)
-					? " full"
-					: " full/low")
-				: "");
+		debug("cfg %d/%p speeds:%s%s%s\n",
+		      config->bConfigurationValue, config,
+		      config->superspeed ? " super" : "",
+		      config->highspeed ? " high" : "",
+		      config->fullspeed ?
+		      (gadget_is_dualspeed(cdev->gadget) ?
+		      " full" : " full/low") : "");
 
 		for (i = 0; i < MAX_CONFIG_INTERFACES; i++) {
 			f = config->interface[i];
@@ -742,6 +807,7 @@ composite_setup(struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl)
 	gadget->ep0->driver_data = cdev;
 	standard = (ctrl->bRequestType & USB_TYPE_MASK)
 						== USB_TYPE_STANDARD;
+
 	if (!standard)
 		goto unknown;
 
@@ -758,6 +824,20 @@ composite_setup(struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl)
 				count_configs(cdev, USB_DT_DEVICE);
 			cdev->desc.bMaxPacketSize0 =
 				cdev->gadget->ep0->maxpacket;
+			if (gadget_is_superspeed(gadget) &&
+			    gadget->speed >= USB_SPEED_SUPER) {
+				/*
+				 * bcdUSB should be 0x0300 for superspeed,
+				 * but we change it to 0x0301 for rockusb.
+				 */
+				if (!strncmp(cdev->driver->name,
+					     "rkusb_ums_dnl", 13))
+					cdev->desc.bcdUSB = cpu_to_le16(0x0301);
+				else
+					cdev->desc.bcdUSB = cpu_to_le16(0x0300);
+				cdev->desc.bMaxPacketSize0 = 9;
+			}
+
 			value = min(w_length, (u16) sizeof cdev->desc);
 			memcpy(req->buf, &cdev->desc, value);
 			break;
@@ -791,7 +871,8 @@ composite_setup(struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl)
 			 * which request BOS descriptor in this case that bcdUSB
 			 * is set to 0x0201.
 			 */
-			if (!strncmp(cdev->driver->name, "rkusb_ums_dnl", 13)) {
+			if (gadget_is_superspeed(gadget) ||
+			    !strncmp(cdev->driver->name, "rkusb_ums_dnl", 13)) {
 				value = bos_desc(cdev);
 				value = min(w_length, (u16) value);
 			}
diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 9ec9d2bbd3..3bd1d7a1b8 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -114,6 +114,34 @@ static struct usb_endpoint_descriptor hs_ep_out = {
 	.wMaxPacketSize		= cpu_to_le16(512),
 };
 
+static struct usb_endpoint_descriptor ss_ep_in = {
+	.bLength		= USB_DT_ENDPOINT_SIZE,
+	.bDescriptorType	= USB_DT_ENDPOINT,
+	.bEndpointAddress	= USB_DIR_IN,
+	.bmAttributes		= USB_ENDPOINT_XFER_BULK,
+	.wMaxPacketSize		= cpu_to_le16(1024),
+};
+
+static struct usb_ss_ep_comp_descriptor ss_ep_in_comp_desc = {
+	.bLength		= sizeof(ss_ep_in_comp_desc),
+	.bDescriptorType	= USB_DT_SS_ENDPOINT_COMP,
+	/* .bMaxBurst		= DYNAMIC, */
+};
+
+static struct usb_endpoint_descriptor ss_ep_out = {
+	.bLength		= USB_DT_ENDPOINT_SIZE,
+	.bDescriptorType	= USB_DT_ENDPOINT,
+	.bEndpointAddress	= USB_DIR_OUT,
+	.bmAttributes		= USB_ENDPOINT_XFER_BULK,
+	.wMaxPacketSize		= cpu_to_le16(1024),
+};
+
+static struct usb_ss_ep_comp_descriptor ss_ep_out_comp_desc = {
+	.bLength		= sizeof(ss_ep_out_comp_desc),
+	.bDescriptorType	= USB_DT_SS_ENDPOINT_COMP,
+	/* .bMaxBurst		= DYNAMIC, */
+};
+
 static struct usb_interface_descriptor interface_desc = {
 	.bLength		= USB_DT_INTERFACE_SIZE,
 	.bDescriptorType	= USB_DT_INTERFACE,
@@ -138,13 +166,44 @@ static struct usb_descriptor_header *fb_hs_function[] = {
 	NULL,
 };
 
+static struct usb_descriptor_header *fb_ss_function[] = {
+	(struct usb_descriptor_header *)&interface_desc,
+	(struct usb_descriptor_header *)&ss_ep_in,
+	(struct usb_descriptor_header *)&ss_ep_in_comp_desc,
+	(struct usb_descriptor_header *)&ss_ep_out,
+	(struct usb_descriptor_header *)&ss_ep_out_comp_desc,
+	NULL,
+};
+
 static struct usb_endpoint_descriptor *
 fb_ep_desc(struct usb_gadget *g, struct usb_endpoint_descriptor *fs,
-	    struct usb_endpoint_descriptor *hs)
+	   struct usb_endpoint_descriptor *hs,
+	   struct usb_endpoint_descriptor *ss,
+	   struct usb_ss_ep_comp_descriptor *comp_desc,
+	   struct usb_ep *ep)
 {
-	if (gadget_is_dualspeed(g) && g->speed == USB_SPEED_HIGH)
-		return hs;
-	return fs;
+	struct usb_endpoint_descriptor *speed_desc = NULL;
+
+	/* select desired speed */
+	switch (g->speed) {
+	case USB_SPEED_SUPER:
+		if (gadget_is_superspeed(g)) {
+			speed_desc = ss;
+			ep->comp_desc = comp_desc;
+			break;
+		}
+		/* else: Fall trough */
+	case USB_SPEED_HIGH:
+		if (gadget_is_dualspeed(g)) {
+			speed_desc = hs;
+			break;
+		}
+		/* else: fall through */
+	default:
+		speed_desc = fs;
+	}
+
+	return speed_desc;
 }
 
 /*
@@ -301,6 +360,14 @@ static int fastboot_bind(struct usb_configuration *c, struct usb_function *f)
 		f->hs_descriptors = fb_hs_function;
 	}
 
+	if (gadget_is_superspeed(gadget)) {
+		/* Assume endpoint addresses are the same as full speed */
+		ss_ep_in.bEndpointAddress = fs_ep_in.bEndpointAddress;
+		ss_ep_out.bEndpointAddress = fs_ep_out.bEndpointAddress;
+		/* copy SS descriptors */
+		f->ss_descriptors = fb_ss_function;
+	}
+
 	s = env_get("serial#");
 	if (s)
 		g_dnl_set_serialnumber((char *)s);
@@ -363,7 +430,8 @@ static int fastboot_set_alt(struct usb_function *f,
 	debug("%s: func: %s intf: %d alt: %d\n",
 	      __func__, f->name, interface, alt);
 
-	d = fb_ep_desc(gadget, &fs_ep_out, &hs_ep_out);
+	d = fb_ep_desc(gadget, &fs_ep_out, &hs_ep_out, &ss_ep_out,
+		       &ss_ep_out_comp_desc, f_fb->out_ep);
 	ret = usb_ep_enable(f_fb->out_ep, d);
 	if (ret) {
 		puts("failed to enable out ep\n");
@@ -378,7 +446,8 @@ static int fastboot_set_alt(struct usb_function *f,
 	}
 	f_fb->out_req->complete = rx_handler_command;
 
-	d = fb_ep_desc(gadget, &fs_ep_in, &hs_ep_in);
+	d = fb_ep_desc(gadget, &fs_ep_in, &hs_ep_in, &ss_ep_in,
+		       &ss_ep_in_comp_desc, f_fb->in_ep);
 	ret = usb_ep_enable(f_fb->in_ep, d);
 	if (ret) {
 		puts("failed to enable in ep\n");
diff --git a/drivers/usb/gadget/f_mass_storage.c b/drivers/usb/gadget/f_mass_storage.c
index ce8a70bcb3..404e8eafdb 100644
--- a/drivers/usb/gadget/f_mass_storage.c
+++ b/drivers/usb/gadget/f_mass_storage.c
@@ -2253,14 +2253,18 @@ reset:
 
 	/* Enable the endpoints */
 	d = fsg_ep_desc(common->gadget,
-			&fsg_fs_bulk_in_desc, &fsg_hs_bulk_in_desc);
+			&fsg_fs_bulk_in_desc, &fsg_hs_bulk_in_desc,
+			&fsg_ss_bulk_in_desc, &fsg_ss_bulk_in_comp_desc,
+			fsg->bulk_in);
 	rc = enable_endpoint(common, fsg->bulk_in, d);
 	if (rc)
 		goto reset;
 	fsg->bulk_in_enabled = 1;
 
 	d = fsg_ep_desc(common->gadget,
-			&fsg_fs_bulk_out_desc, &fsg_hs_bulk_out_desc);
+			&fsg_fs_bulk_out_desc, &fsg_hs_bulk_out_desc,
+			&fsg_ss_bulk_out_desc, &fsg_ss_bulk_out_comp_desc,
+			fsg->bulk_out);
 	rc = enable_endpoint(common, fsg->bulk_out, d);
 	if (rc)
 		goto reset;
@@ -2735,6 +2739,23 @@ static int fsg_bind(struct usb_configuration *c, struct usb_function *f)
 			return -ENOMEM;
 		}
 	}
+
+	if (gadget_is_superspeed(gadget)) {
+		/* Assume endpoint addresses are the same as full speed */
+		fsg_ss_bulk_in_desc.bEndpointAddress =
+			fsg_fs_bulk_in_desc.bEndpointAddress;
+		fsg_ss_bulk_out_desc.bEndpointAddress =
+			fsg_fs_bulk_out_desc.bEndpointAddress;
+
+		if (IS_RKUSB_UMS_DNL(c->cdev->driver->name))
+			f->ss_descriptors =
+				usb_copy_descriptors(rkusb_ss_function);
+
+		if (unlikely(!f->ss_descriptors)) {
+			free(f->descriptors);
+			return -ENOMEM;
+		}
+	}
 	return 0;
 
 autoconf_fail:
diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index ceeafb6f2b..114da0bbc4 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -45,6 +45,15 @@ static struct usb_descriptor_header *rkusb_hs_function[] = {
 	NULL,
 };
 
+static struct usb_descriptor_header *rkusb_ss_function[] = {
+	(struct usb_descriptor_header *)&rkusb_intf_desc,
+	(struct usb_descriptor_header *)&fsg_ss_bulk_in_desc,
+	(struct usb_descriptor_header *)&fsg_ss_bulk_in_comp_desc,
+	(struct usb_descriptor_header *)&fsg_ss_bulk_out_desc,
+	(struct usb_descriptor_header *)&fsg_ss_bulk_out_comp_desc,
+	NULL,
+};
+
 struct rk_flash_info {
 	u32	flash_size;
 	u16	block_size;
diff --git a/drivers/usb/gadget/storage_common.c b/drivers/usb/gadget/storage_common.c
index 4d5a9a8c42..ce1b0a3a85 100644
--- a/drivers/usb/gadget/storage_common.c
+++ b/drivers/usb/gadget/storage_common.c
@@ -530,14 +530,70 @@ static struct usb_descriptor_header *fsg_hs_function[] = {
 	NULL,
 };
 
+static struct usb_endpoint_descriptor
+fsg_ss_bulk_in_desc = {
+	.bLength =		USB_DT_ENDPOINT_SIZE,
+	.bDescriptorType =	USB_DT_ENDPOINT,
+
+	/* bEndpointAddress copied from fs_bulk_in_desc during fsg_bind() */
+	.bmAttributes =		USB_ENDPOINT_XFER_BULK,
+	.wMaxPacketSize =	cpu_to_le16(1024),
+};
+
+static struct usb_ss_ep_comp_descriptor
+fsg_ss_bulk_in_comp_desc = {
+	.bLength		= sizeof(fsg_ss_bulk_in_comp_desc),
+	.bDescriptorType	= USB_DT_SS_ENDPOINT_COMP,
+	/* .bMaxBurst		= DYNAMIC, */
+};
+
+static struct usb_endpoint_descriptor
+fsg_ss_bulk_out_desc = {
+	.bLength =		USB_DT_ENDPOINT_SIZE,
+	.bDescriptorType =	USB_DT_ENDPOINT,
+
+	/* bEndpointAddress copied from fs_bulk_out_desc during fsg_bind() */
+	.bmAttributes =		USB_ENDPOINT_XFER_BULK,
+	.wMaxPacketSize =	cpu_to_le16(1024),
+};
+
+static struct usb_ss_ep_comp_descriptor
+fsg_ss_bulk_out_comp_desc = {
+	.bLength		= sizeof(fsg_ss_bulk_out_comp_desc),
+	.bDescriptorType	= USB_DT_SS_ENDPOINT_COMP,
+	/* .bMaxBurst		= DYNAMIC, */
+};
+
 /* Maxpacket and other transfer characteristics vary by speed. */
 static struct usb_endpoint_descriptor *
 fsg_ep_desc(struct usb_gadget *g, struct usb_endpoint_descriptor *fs,
-		struct usb_endpoint_descriptor *hs)
+	    struct usb_endpoint_descriptor *hs,
+	    struct usb_endpoint_descriptor *ss,
+	    struct usb_ss_ep_comp_descriptor *comp_desc,
+	    struct usb_ep *ep)
 {
-	if (gadget_is_dualspeed(g) && g->speed == USB_SPEED_HIGH)
-		return hs;
-	return fs;
+	struct usb_endpoint_descriptor *speed_desc = NULL;
+
+	/* select desired speed */
+	switch (g->speed) {
+	case USB_SPEED_SUPER:
+		if (gadget_is_superspeed(g)) {
+			speed_desc = ss;
+			ep->comp_desc = comp_desc;
+			break;
+		}
+		/* else: Fall trough */
+	case USB_SPEED_HIGH:
+		if (gadget_is_dualspeed(g)) {
+			speed_desc = hs;
+			break;
+		}
+		/* else: fall through */
+	default:
+		speed_desc = fs;
+	}
+
+	return speed_desc;
 }
 
 /* Static strings, in UTF-8 (for simplicity we use only ASCII characters) */
diff --git a/include/linux/usb/composite.h b/include/linux/usb/composite.h
index 86e1ceac3c..e676d8beff 100644
--- a/include/linux/usb/composite.h
+++ b/include/linux/usb/composite.h
@@ -49,6 +49,9 @@ struct usb_configuration;
  * @hs_descriptors: Table of high speed descriptors, using interface and
  *	string identifiers assigned during @bind().  If this pointer is null,
  *	the function will not be available at high speed.
+ * @ss_descriptors: Table of super speed descriptors, using interface and
+ *	string identifiers assigned during @bind(). If this pointer is null,
+ *	the function will not be available at super speed.
  * @config: assigned when @usb_add_function() is called; this is the
  *	configuration with which this function is associated.
  * @bind: Before the gadget can register, all of its functions bind() to the
@@ -96,6 +99,7 @@ struct usb_function {
 	struct usb_gadget_strings	**strings;
 	struct usb_descriptor_header	**descriptors;
 	struct usb_descriptor_header	**hs_descriptors;
+	struct usb_descriptor_header	**ss_descriptors;
 
 	struct usb_configuration	*config;
 
@@ -224,6 +228,7 @@ struct usb_configuration {
 	struct list_head	list;
 	struct list_head	functions;
 	u8			next_interface_id;
+	unsigned		superspeed:1;
 	unsigned		highspeed:1;
 	unsigned		fullspeed:1;
 	struct usb_function	*interface[MAX_CONFIG_INTERFACES];
diff --git a/include/linux/usb/gadget.h b/include/linux/usb/gadget.h
index b824f13477..0961a64cda 100644
--- a/include/linux/usb/gadget.h
+++ b/include/linux/usb/gadget.h
@@ -427,6 +427,8 @@ static inline void usb_ep_fifo_flush(struct usb_ep *ep)
 
 
 /*-------------------------------------------------------------------------*/
+#define USB_DEFAULT_U1_DEV_EXIT_LAT	0x01	/* Less then 1 microsec */
+#define USB_DEFAULT_U2_DEV_EXIT_LAT	0x1F4	/* Less then 500 microsec */
 
 struct usb_gadget;
 struct usb_gadget_driver;
@@ -549,6 +551,15 @@ static inline int gadget_is_dualspeed(struct usb_gadget *g)
 #endif
 }
 
+/**
+ * gadget_is_superspeed() - return true if the hardware handles superspeed
+ * @g: controller that might support superspeed
+ */
+static inline int gadget_is_superspeed(struct usb_gadget *g)
+{
+	return g->max_speed >= USB_SPEED_SUPER;
+}
+
 /**
  * gadget_is_otg - return true iff the hardware is OTG-ready
  * @g: controller that might have a Mini-AB connector

commit f97316439ce13fb11330d59cbbcf554722bc073d
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Thu Oct 11 17:52:46 2018 +0800

    drivers: rkflash: fix gc recovery bug
    
    Read flash address is out of range.
    
    Change-Id: I46275995b361406ac53549a27c5fd6e6978b7463
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/rk_sftl_arm_v7.S b/drivers/rkflash/rk_sftl_arm_v7.S
index a051330c1d..a63d3b0c17 100644
--- a/drivers/rkflash/rk_sftl_arm_v7.S
+++ b/drivers/rkflash/rk_sftl_arm_v7.S
@@ -2,7 +2,7 @@
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:    GPL-2.0
- * date: 2018-09-29
+ * date: 2018-10-12
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -5095,7 +5095,7 @@ FlashReadPages:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	fp, r1
-	ldr	r3, .L638
+	ldr	r3, .L639
 	mov	r4, r0
 	mov	r10, #0
 	ldrh	r2, [r3, #12]
@@ -5103,43 +5103,53 @@ FlashReadPages:
 	str	r2, [sp]
 .L612:
 	cmp	r10, fp
-	bne	.L622
+	bne	.L623
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L622:
+.L623:
 	ldr	r3, [r4, #8]
 	cbz	r3, .L613
 	ldr	r3, [r4, #12]
 	cbnz	r3, .L614
 .L613:
 	movs	r2, #90
-	ldr	r1, .L638+4
-	ldr	r0, .L638+8
+	ldr	r1, .L639+4
+	ldr	r0, .L639+8
 	bl	printf
 .L614:
 	add	r2, sp, #8
 	add	r1, sp, #12
 	ldr	r0, [r4, #4]
 	bl	l2p_addr_tran.isra.0
+	ldr	r0, [sp, #8]
+	cmp	r0, #3
+	bls	.L615
+	mov	r3, #-1
+	str	r3, [r4]
+.L616:
+	add	r10, r10, #1
+	adds	r4, r4, #20
+	b	.L612
+.L615:
 	ldr	r5, [r4, #8]
-	ldr	r8, .L638+20
-	ldr	r7, .L638+12
+	uxtb	r0, r0
+	ldr	r8, .L639+20
+	ldr	r7, .L639+12
 	tst	r5, #63
 	ldr	r3, [r4, #12]
 	it	ne
 	ldrne	r5, [r8]
 	ldr	r1, [sp, #12]
-	ldrb	r0, [sp, #8]	@ zero_extendqisi2
-	mov	r2, r5
 	ldr	r6, [r7, #12]
+	mov	r2, r5
 	blx	r6
 	ldr	r3, [sp, #4]
 	str	r0, [r4]
 	ldrh	r3, [r3, #14]
 	cmp	r3, #4
-	bne	.L617
+	bne	.L619
 	ldr	r0, [sp]
 	add	r2, r5, #2048
 	ldr	r3, [r4, #12]
@@ -5150,46 +5160,43 @@ FlashReadPages:
 	ldrb	r0, [sp, #8]	@ zero_extendqisi2
 	blx	r7
 	adds	r3, r0, #1
-	beq	.L618
+	beq	.L620
 	ldr	r3, [r4, #12]
 	ldr	r2, [r3, #12]
 	adds	r2, r2, #1
-	bne	.L619
+	bne	.L621
 	ldr	r2, [r3, #8]
 	adds	r2, r2, #1
-	bne	.L619
+	bne	.L621
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L619
-.L618:
+	beq	.L621
+.L620:
 	mov	r3, #-1
 	str	r3, [r4]
-.L619:
+.L621:
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L617
+	beq	.L619
 	cmp	r0, #256
 	it	eq
 	streq	r0, [r4]
-.L617:
+.L619:
 	ldr	r3, [r8]
 	cmp	r5, r3
-	bne	.L621
+	bne	.L616
 	ldr	r0, [r4, #8]
 	cmp	r5, r0
-	beq	.L621
-	ldr	r3, .L638+16
+	beq	.L616
+	ldr	r3, .L639+16
 	mov	r1, r5
 	ldrh	r2, [r3]
 	lsls	r2, r2, #9
 	bl	ftl_memcpy
-.L621:
-	add	r10, r10, #1
-	adds	r4, r4, #20
-	b	.L612
-.L639:
+	b	.L616
+.L640:
 	.align	2
-.L638:
+.L639:
 	.word	.LANCHOR0
 	.word	.LANCHOR147
 	.word	.LC1
@@ -5208,36 +5215,36 @@ FlashReadPages:
 FtlLoadFactoryBbt:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L650
+	ldr	r3, .L651
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r6, #0
-	ldr	r5, .L650+4
+	ldr	r5, .L651+4
 	ldr	r3, [r3]
-	ldr	r7, .L650+8
-	ldr	r10, .L650+20
+	ldr	r7, .L651+8
+	ldr	r10, .L651+20
 	str	r3, [r5, #8]
-	ldr	r3, .L650+12
+	ldr	r3, .L651+12
 	ldr	r8, [r3]
 	str	r8, [r5, #12]
-.L641:
-	ldr	r3, .L650+16
+.L642:
+	ldr	r3, .L651+16
 	ldrh	r3, [r3]
 	cmp	r6, r3
-	bcc	.L646
+	bcc	.L647
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L646:
+.L647:
 	ldrh	r4, [r10]
 	movw	r3, #65535
-	ldr	fp, .L650+4
+	ldr	fp, .L651+4
 	strh	r3, [r7, #2]!	@ movhi
 	subs	r4, r4, #1
 	uxth	r4, r4
-.L642:
+.L643:
 	ldrh	r3, [r10]
 	sub	r2, r3, #15
 	cmp	r2, r4
-	bgt	.L644
+	bgt	.L645
 	mla	r3, r6, r3, r4
 	movs	r2, #1
 	mov	r1, r2
@@ -5247,22 +5254,22 @@ FtlLoadFactoryBbt:
 	bl	FlashReadPages
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L643
+	beq	.L644
 	ldrh	r2, [r8]
 	movw	r3, #61664
 	cmp	r2, r3
-	bne	.L643
+	bne	.L644
 	strh	r4, [r7]	@ movhi
-.L644:
+.L645:
 	adds	r6, r6, #1
-	b	.L641
-.L643:
+	b	.L642
+.L644:
 	subs	r4, r4, #1
 	uxth	r4, r4
-	b	.L642
-.L651:
+	b	.L643
+.L652:
 	.align	2
-.L650:
+.L651:
 	.word	.LANCHOR115
 	.word	.LANCHOR148
 	.word	.LANCHOR37+10
@@ -5284,17 +5291,17 @@ FtlGetLastWrittenPage:
 	cmp	r1, #1
 	push	{r4, r5, r6, r7, r8, lr}
 	it	eq
-	ldreq	r3, .L664
+	ldreq	r3, .L665
 	sub	sp, sp, #88
 	lsl	r7, r0, #10
 	mov	r2, r1
 	it	ne
-	ldrne	r3, .L664+4
+	ldrne	r3, .L665+4
 	mov	r6, r1
 	add	r0, sp, #4
 	movs	r1, #1
 	ldrh	r5, [r3]
-	ldr	r3, .L664+8
+	ldr	r3, .L665+8
 	subs	r5, r5, #1
 	ldr	r3, [r3]
 	sxth	r5, r5
@@ -5306,17 +5313,17 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	bne	.L655
+	bne	.L656
 	mov	r8, #0
-.L656:
+.L657:
 	cmp	r8, r5
-	ble	.L659
-.L655:
+	ble	.L660
+.L656:
 	mov	r0, r5
 	add	sp, sp, #88
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L659:
+.L660:
 	add	r3, r8, r5
 	mov	r2, r6
 	add	r3, r3, r3, lsr #31
@@ -5329,23 +5336,23 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	bne	.L657
+	bne	.L658
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
-	bne	.L657
+	bne	.L658
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
-	beq	.L657
+	beq	.L658
 	subs	r4, r4, #1
 	sxth	r5, r4
-	b	.L656
-.L657:
+	b	.L657
+.L658:
 	adds	r4, r4, #1
 	sxth	r8, r4
-	b	.L656
-.L665:
+	b	.L657
+.L666:
 	.align	2
-.L664:
+.L665:
 	.word	.LANCHOR20
 	.word	.LANCHOR19
 	.word	.LANCHOR121
@@ -5363,69 +5370,69 @@ FtlScanSysBlk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r5, .L747
+	ldr	r5, .L748
 	sub	sp, sp, #32
 	mov	r1, r4
-	ldr	r3, .L747+4
+	ldr	r3, .L748+4
 	ldr	r2, [r5]
-	ldr	r6, .L747+8
+	ldr	r6, .L748+8
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L747+12
+	ldr	r3, .L748+12
 	lsls	r2, r2, #2
 	strh	r4, [r6]	@ movhi
-	ldr	r7, .L747+16
+	ldr	r7, .L748+16
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldr	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L747+20
+	ldr	r3, .L748+20
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r7]
 	mov	r1, r4
-	ldr	r3, .L747+24
+	ldr	r3, .L748+24
 	lsls	r2, r2, #2
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r7]
 	mov	r1, r4
-	ldr	r3, .L747+28
+	ldr	r3, .L748+28
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	movs	r2, #12
 	movs	r1, #255
-	ldr	r0, .L747+32
+	ldr	r0, .L748+32
 	bl	ftl_memset
-	ldr	r3, .L747+36
+	ldr	r3, .L748+36
 	str	r6, [sp, #12]
 	str	r5, [sp, #16]
 	ldrh	r3, [r3]
 	str	r3, [sp, #4]
-.L667:
-	ldr	r3, .L747+40
+.L668:
+	ldr	r3, .L748+40
 	ldr	r2, [sp, #4]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bls	.L708
-	ldr	r3, .L747+44
+	bls	.L709
+	ldr	r3, .L748+44
 	movs	r5, #0
-	ldr	r1, .L747+48
+	ldr	r1, .L748+48
 	mov	fp, r5
 	movs	r7, #20
 	ldrh	r8, [r3]
-	ldr	r3, .L747+52
+	ldr	r3, .L748+52
 	ldr	r2, [r1]
-	ldr	r1, .L747+56
+	ldr	r1, .L748+56
 	ldr	r6, [r3]
-	ldr	r3, .L747+60
+	ldr	r3, .L748+60
 	str	r2, [sp, #8]
 	ldrh	r10, [r1]
 	ldr	r3, [r3]
-	ldr	r2, .L747+64
-	b	.L709
-.L669:
+	ldr	r2, .L748+64
+	b	.L710
+.L670:
 	ldrb	r0, [r2, r5]	@ zero_extendqisi2
 	ldr	r1, [sp, #4]
 	str	r3, [sp, #28]
@@ -5435,7 +5442,7 @@ FtlScanSysBlk:
 	bl	FtlBbmIsBadBlock
 	ldr	r2, [sp, #24]
 	ldr	r3, [sp, #28]
-	cbnz	r0, .L668
+	cbnz	r0, .L669
 	ldr	r1, [sp, #20]
 	mla	r0, r7, fp, r6
 	ldr	r4, [sp, #8]
@@ -5448,31 +5455,31 @@ FtlScanSysBlk:
 	str	r1, [r0, #12]
 	add	r1, fp, #1
 	uxth	fp, r1
-.L668:
+.L669:
 	adds	r5, r5, #1
-.L709:
+.L710:
 	uxth	r1, r5
 	cmp	r8, r1
-	bhi	.L669
+	bhi	.L670
 	cmp	fp, #0
-	bne	.L670
-.L707:
+	bne	.L671
+.L708:
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	str	r3, [sp, #4]
-	b	.L667
-.L670:
+	b	.L668
+.L671:
 	movs	r7, #0
 	movs	r2, #1
 	mov	r1, fp
 	mov	r0, r6
 	bl	FlashReadPages
-.L671:
+.L672:
 	uxth	r3, r7
 	cmp	fp, r3
-	bls	.L707
-	ldr	r3, .L747+52
+	bls	.L708
+	ldr	r3, .L748+52
 	mov	r8, #20
 	mul	r8, r8, r7
 	ldr	r3, [r3]
@@ -5482,10 +5489,10 @@ FtlScanSysBlk:
 	ldr	r6, [r2, #12]
 	adds	r3, r3, #1
 	ubfx	r5, r5, #10, #16
-	bne	.L674
+	bne	.L675
 	mov	r10, #16
-.L676:
-	ldr	r3, .L747+52
+.L677:
+	ldr	r3, .L748+52
 	movs	r2, #1
 	mov	r1, r2
 	ldr	r0, [r3]
@@ -5497,83 +5504,83 @@ FtlScanSysBlk:
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	ldr	r3, .L747+52
+	ldr	r3, .L748+52
 	ldr	r3, [r3]
-	bne	.L673
+	bne	.L674
 	mov	r2, #-1
 	str	r2, [r3, r8]
-	ldr	r3, .L747+52
+	ldr	r3, .L748+52
 	ldr	r3, [r3]
 	ldr	r3, [r3, r8]
 	cmp	r3, r2
-	bne	.L674
-.L675:
+	bne	.L675
+.L676:
 	movs	r1, #1
-	b	.L746
-.L673:
+	b	.L747
+.L674:
 	ldr	r3, [r3, r8]
 	adds	r3, r3, #1
-	bne	.L674
+	bne	.L675
 	add	r10, r10, #-1
 	uxth	r10, r10
 	cmp	r10, #0
-	bne	.L676
-	b	.L675
-.L674:
-	ldr	r3, .L747+68
+	bne	.L677
+	b	.L676
+.L675:
+	ldr	r3, .L748+68
 	ldr	r2, [r3]
 	ldr	r3, [r6, #4]
 	adds	r1, r2, #1
-	beq	.L677
+	beq	.L678
 	cmp	r2, r3
-	bhi	.L678
-.L677:
+	bhi	.L679
+.L678:
 	adds	r2, r3, #1
 	ittt	ne
-	ldrne	r1, .L747+68
+	ldrne	r1, .L748+68
 	addne	r2, r3, #1
 	strne	r2, [r1]
-.L678:
+.L679:
 	ldrh	r2, [r6]
 	movw	r1, #61604
 	cmp	r2, r1
-	beq	.L680
-	bhi	.L681
+	beq	.L681
+	bhi	.L682
 	movw	r3, #61574
 	cmp	r2, r3
-	beq	.L682
-.L679:
+	beq	.L683
+.L680:
 	adds	r7, r7, #1
-	b	.L671
-.L681:
+	b	.L672
+.L682:
 	movw	r3, #61634
 	cmp	r2, r3
-	beq	.L683
+	beq	.L684
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L679
+	bne	.L680
 	movs	r1, #0
-.L746:
+.L747:
 	mov	r0, r5
 	bl	FtlFreeSysBlkQueueIn
-	b	.L679
-.L683:
-	ldr	r3, .L747+8
+	b	.L680
+.L684:
+	ldr	r3, .L748+8
 	ldrh	r2, [r3]
-	ldr	r3, .L747
+	ldr	r3, .L748
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bls	.L685
+	bls	.L686
 	movw	r2, #1222
-	ldr	r1, .L747+72
-	ldr	r0, .L747+76
+	ldr	r1, .L748+72
+	ldr	r0, .L748+76
 	bl	printf
-.L685:
+.L686:
 	ldr	r3, [sp, #16]
 	ldr	r2, [sp, #12]
 	ldr	r1, [r3]
 	ldrh	r0, [r2]
-	ldr	r2, .L747+12
+	ldr	r2, .L748+12
 	uxth	r10, r1
 	ldr	ip, [r2]
 	add	r3, r10, #-1
@@ -5581,61 +5588,61 @@ FtlScanSysBlk:
 	add	r10, r10, #-1
 	sxth	r3, r3
 	sxth	r10, r10
-.L686:
+.L687:
 	cmp	r3, r10
-	bgt	.L692
+	bgt	.L693
 	cmp	r3, #0
-	bge	.L724
-	b	.L679
-.L692:
+	bge	.L725
+	b	.L680
+.L693:
 	ldr	r2, [ip, r3, lsl #2]
 	add	r8, ip, r3, lsl #2
 	ldr	r4, [r6, #4]
 	cmp	r4, r2
-	bls	.L687
+	bls	.L688
 	ldr	r2, [ip]
-	cbnz	r2, .L688
+	cbnz	r2, .L689
 	cmp	r1, r0
 	ittt	ne
-	ldrne	r2, .L747+8
+	ldrne	r2, .L748+8
 	addne	r0, r0, #1
 	strhne	r0, [r2]	@ movhi
-.L688:
-	ldr	r2, .L747+20
+.L689:
+	ldr	r2, .L748+20
 	uxth	r10, r3
 	ldr	r0, [r2]
 	movs	r2, #0
-.L689:
+.L690:
 	uxth	lr, r2
 	sxth	r1, r2
 	cmp	r10, lr
-	bhi	.L690
+	bhi	.L691
 	ldr	r2, [r6, #4]
 	cmp	r3, #0
 	str	r2, [r8]
 	strh	r5, [r0, r3, lsl #1]	@ movhi
-	blt	.L679
-	ldr	r2, .L747+8
+	blt	.L680
+	ldr	r2, .L748+8
 	ldrh	r0, [r2]
-	ldr	r2, .L747
+	ldr	r2, .L748
 	ldr	r2, [r2]
 	subs	r2, r2, r0
 	subs	r2, r2, #1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L679
-.L724:
-	ldr	r2, .L747+8
+	bgt	.L680
+.L725:
+	ldr	r2, .L748+8
 	adds	r0, r0, #1
 	strh	r0, [r2]	@ movhi
 	ldr	r2, [r6, #4]
 	str	r2, [ip, r3, lsl #2]
-	ldr	r2, .L747+20
-.L744:
+	ldr	r2, .L748+20
+.L745:
 	ldr	r2, [r2]
 	strh	r5, [r2, r3, lsl #1]	@ movhi
-	b	.L679
-.L690:
+	b	.L680
+.L691:
 	add	lr, ip, r1, lsl #2
 	adds	r2, r2, #1
 	ldr	r4, [lr, #4]
@@ -5643,14 +5650,14 @@ FtlScanSysBlk:
 	ldrh	lr, [lr, #2]
 	str	r4, [ip, r1, lsl #2]
 	strh	lr, [r0, r1, lsl #1]	@ movhi
-	b	.L689
-.L687:
+	b	.L690
+.L688:
 	subs	r3, r3, #1
 	sxth	r3, r3
-	b	.L686
-.L748:
+	b	.L687
+.L749:
 	.align	2
-.L747:
+.L748:
 	.word	.LANCHOR30
 	.word	.LANCHOR35
 	.word	.LANCHOR141
@@ -5671,72 +5678,72 @@ FtlScanSysBlk:
 	.word	.LANCHOR70
 	.word	.LANCHOR149
 	.word	.LC1
-.L682:
-	ldr	r8, .L749+12
-	ldr	r10, .L749+20
+.L683:
+	ldr	r8, .L750+12
+	ldr	r10, .L750+20
 	ldrh	r2, [r8]
 	ldrh	r3, [r10]
 	cmp	r2, r3
-	bls	.L695
+	bls	.L696
 	movw	r2, #1263
-	ldr	r1, .L749
-	ldr	r0, .L749+4
+	ldr	r1, .L750
+	ldr	r0, .L750+4
 	bl	printf
-.L695:
-	ldr	r2, .L749+8
+.L696:
+	ldr	r2, .L750+8
 	ldrh	lr, [r10]
 	ldrh	ip, [r8]
 	ldr	r0, [r2]
 	add	r10, lr, #-1
 	sxth	r3, r10
 	sub	r10, r10, ip
-.L696:
+.L697:
 	cmp	r3, r10
-	ble	.L701
+	ble	.L702
 	ldr	r1, [r6, #4]
 	add	r8, r0, r3, lsl #2
 	ldr	r2, [r0, r3, lsl #2]
 	cmp	r1, r2
-	bls	.L697
+	bls	.L698
 	ldr	r2, [r0]
-	cbnz	r2, .L698
+	cbnz	r2, .L699
 	cmp	lr, ip
 	ittt	ne
-	ldrne	r2, .L749+12
+	ldrne	r2, .L750+12
 	addne	ip, ip, #1
 	strhne	ip, [r2]	@ movhi
-.L698:
-	ldr	r2, .L749+16
+.L699:
+	ldr	r2, .L750+16
 	uxth	r10, r3
 	ldr	ip, [r2]
 	movs	r2, #0
-.L699:
+.L700:
 	uxth	lr, r2
 	sxth	r1, r2
 	cmp	r10, lr
-	bhi	.L700
+	bhi	.L701
 	ldr	r2, [r6, #4]
 	str	r2, [r8]
 	strh	r5, [ip, r3, lsl #1]	@ movhi
-.L701:
+.L702:
 	cmp	r3, #0
-	blt	.L679
-	ldr	r2, .L749+20
-	ldr	ip, .L749+12
+	blt	.L680
+	ldr	r2, .L750+20
+	ldr	ip, .L750+12
 	ldrh	r2, [r2]
 	ldrh	r1, [ip]
 	subs	r2, r2, #1
 	subs	r2, r2, r1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L679
+	bgt	.L680
 	ldr	r2, [r6, #4]
 	adds	r1, r1, #1
 	strh	r1, [ip]	@ movhi
 	str	r2, [r0, r3, lsl #2]
-	ldr	r2, .L749+16
-	b	.L744
-.L700:
+	ldr	r2, .L750+16
+	b	.L745
+.L701:
 	add	lr, r0, r1, lsl #2
 	adds	r2, r2, #1
 	ldr	r4, [lr, #4]
@@ -5744,88 +5751,88 @@ FtlScanSysBlk:
 	ldrh	lr, [lr, #2]
 	str	r4, [r0, r1, lsl #2]
 	strh	lr, [ip, r1, lsl #1]	@ movhi
-	b	.L699
-.L697:
+	b	.L700
+.L698:
 	subs	r3, r3, #1
 	sxth	r3, r3
-	b	.L696
-.L680:
-	ldr	r8, .L749+40
+	b	.L697
+.L681:
+	ldr	r8, .L750+40
 	movw	r2, #65535
 	ldrh	r1, [r8]
 	cmp	r1, r2
-	bne	.L703
-.L745:
+	bne	.L704
+.L746:
 	strh	r5, [r8]	@ movhi
 	str	r3, [r8, #8]
-	b	.L679
-.L703:
+	b	.L680
+.L704:
 	ldrh	r0, [r8, #4]
 	cmp	r0, r2
-	beq	.L704
+	beq	.L705
 	movs	r1, #1
 	bl	FtlFreeSysBlkQueueIn
-.L704:
+.L705:
 	ldr	r3, [r6, #4]
 	ldr	r2, [r8, #8]
 	cmp	r2, r3
-	bcs	.L705
+	bcs	.L706
 	ldrh	r2, [r8]
 	strh	r2, [r8, #4]	@ movhi
-	b	.L745
-.L705:
+	b	.L746
+.L706:
 	strh	r5, [r8, #4]	@ movhi
-	b	.L679
-.L708:
-	ldr	r3, .L749+24
+	b	.L680
+.L709:
+	ldr	r3, .L750+24
 	ldr	r2, [r3]
 	ldrh	r3, [r2]
-	cbz	r3, .L710
-.L713:
-	ldr	r3, .L749+16
+	cbz	r3, .L711
+.L714:
+	ldr	r3, .L750+16
 	ldr	r4, [r3]
 	ldrh	r2, [r4]
 	cmp	r2, #0
-	beq	.L711
-.L712:
-	ldr	r3, .L749+28
+	beq	.L712
+.L713:
+	ldr	r3, .L750+28
 	ldrh	r2, [r3]
-	ldr	r3, .L749+32
+	ldr	r3, .L750+32
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bls	.L743
+	bls	.L744
 	movw	r2, #1388
-	ldr	r1, .L749
-	ldr	r0, .L749+4
+	ldr	r1, .L750
+	ldr	r0, .L750+4
 	bl	printf
-.L743:
+.L744:
 	movs	r0, #0
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L710:
-	ldr	r1, .L749+28
+.L711:
+	ldr	r1, .L750+28
 	ldrh	r1, [r1]
 	cmp	r1, #0
-	beq	.L713
-	ldr	r5, .L749+32
+	beq	.L714
+	ldr	r5, .L750+32
 	ldr	r0, [r5]
-.L714:
+.L715:
 	sxth	r1, r3
 	cmp	r1, r0
-	bcs	.L713
+	bcs	.L714
 	ldrh	r4, [r2, r1, lsl #1]
 	adds	r3, r3, #1
 	cmp	r4, #0
-	beq	.L714
-	ldr	r3, .L749+36
+	beq	.L715
+	ldr	r3, .L750+36
 	movs	r6, #0
 	ldr	r0, [r3]
 	mov	r3, r1
-.L715:
+.L716:
 	ldr	r4, [r5]
 	cmp	r3, r4
-	bcs	.L713
+	bcs	.L714
 	ldrh	r7, [r2, r3, lsl #1]
 	subs	r4, r3, r1
 	strh	r7, [r2, r4, lsl #1]	@ movhi
@@ -5834,30 +5841,30 @@ FtlScanSysBlk:
 	strh	r6, [r2, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	sxth	r3, r3
-	b	.L715
-.L711:
-	ldr	r3, .L749+12
+	b	.L716
+.L712:
+	ldr	r3, .L750+12
 	ldrh	r3, [r3]
 	cmp	r3, #0
-	beq	.L712
-	ldr	r5, .L749+20
+	beq	.L713
+	ldr	r5, .L750+20
 	ldrh	r1, [r5]
-.L720:
+.L721:
 	sxth	r3, r2
 	cmp	r3, r1
 	mov	r6, r3
-	bge	.L712
+	bge	.L713
 	ldrh	r0, [r4, r3, lsl #1]
 	adds	r2, r2, #1
 	cmp	r0, #0
-	beq	.L720
-	ldr	r2, .L749+8
+	beq	.L721
+	ldr	r2, .L750+8
 	movs	r0, #0
 	ldr	r2, [r2]
-.L721:
+.L722:
 	ldrh	r1, [r5]
 	cmp	r3, r1
-	bge	.L712
+	bge	.L713
 	ldrh	r7, [r4, r3, lsl #1]
 	subs	r1, r3, r6
 	strh	r7, [r4, r1, lsl #1]	@ movhi
@@ -5866,10 +5873,10 @@ FtlScanSysBlk:
 	adds	r1, r3, #1
 	strh	r0, [r4, r3, lsl #1]	@ movhi
 	sxth	r3, r1
-	b	.L721
-.L750:
+	b	.L722
+.L751:
 	.align	2
-.L749:
+.L750:
 	.word	.LANCHOR149
 	.word	.LC1
 	.word	.LANCHOR132
@@ -5894,24 +5901,24 @@ FtlLoadBbt:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	ldr	r8, .L780+40
-	ldr	r4, .L780
+	ldr	r8, .L781+40
+	ldr	r4, .L781
 	ldr	r3, [r8]
-	ldr	r7, .L780+4
+	ldr	r7, .L781+4
 	mov	r10, r4
 	str	r3, [r4, #8]
-	ldr	r3, .L780+8
+	ldr	r3, .L781+8
 	ldr	r6, [r3]
 	str	r6, [r4, #12]
 	bl	FtlBbtMemInit
 	ldrh	r5, [r7]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L752:
+.L753:
 	ldrh	r3, [r7]
 	subs	r3, r3, #15
 	cmp	r3, r5
-	bgt	.L755
+	bgt	.L756
 	lsls	r3, r5, #10
 	movs	r2, #1
 	mov	r1, r2
@@ -5920,7 +5927,7 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	bne	.L753
+	bne	.L754
 	ldr	r3, [r4, #4]
 	movs	r2, #1
 	mov	r1, r2
@@ -5928,101 +5935,101 @@ FtlLoadBbt:
 	adds	r3, r3, #1
 	str	r3, [r4, #4]
 	bl	FlashReadPages
-.L753:
+.L754:
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L754
+	beq	.L755
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L754
-	ldr	r3, .L780+12
+	bne	.L755
+	ldr	r3, .L781+12
 	ldr	r2, [r6, #4]
 	strh	r5, [r3]	@ movhi
 	str	r2, [r3, #8]
 	ldrh	r2, [r6, #8]
 	strh	r2, [r3, #4]	@ movhi
-.L755:
-	ldr	r5, .L780+12
+.L756:
+	ldr	r5, .L781+12
 	movw	r2, #65535
 	ldrh	r3, [r5]
 	cmp	r3, r2
-	beq	.L769
+	beq	.L770
 	ldrh	r3, [r5, #4]
 	cmp	r3, r2
-	beq	.L759
+	beq	.L760
 	lsls	r3, r3, #10
 	movs	r2, #1
 	mov	r1, r2
-	ldr	r0, .L780
+	ldr	r0, .L781
 	str	r3, [r4, #4]
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L759
+	beq	.L760
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L759
+	bne	.L760
 	ldr	r3, [r6, #4]
 	ldr	r2, [r5, #8]
 	cmp	r3, r2
-	bls	.L759
+	bls	.L760
 	ldrh	r2, [r5, #4]
 	str	r3, [r5, #8]
 	ldrh	r3, [r6, #8]
 	strh	r2, [r5]	@ movhi
 	strh	r3, [r5, #4]	@ movhi
-.L759:
-	ldr	r10, .L780
+.L760:
+	ldr	r10, .L781
 	movs	r1, #1
 	ldrh	r0, [r5]
 	bl	FtlGetLastWrittenPage
 	sxth	r7, r0
 	adds	r0, r0, #1
 	strh	r0, [r5, #2]	@ movhi
-.L761:
+.L762:
 	cmp	r7, #0
-	bge	.L764
+	bge	.L765
 	movs	r2, #253
-	ldr	r1, .L780+16
-	ldr	r0, .L780+20
+	ldr	r1, .L781+16
+	ldr	r0, .L781+20
 	bl	printf
-.L763:
+.L764:
 	ldrh	r3, [r6, #10]
 	ldrh	r0, [r6, #12]
 	strh	r3, [r5, #6]	@ movhi
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L766
-	ldr	r3, .L780+24
+	beq	.L767
+	ldr	r3, .L781+24
 	ldr	r2, [r3]
 	cmp	r0, r2
-	beq	.L766
-	ldr	r3, .L780+28
+	beq	.L767
+	ldr	r3, .L781+28
 	ldrh	r3, [r3]
 	lsrs	r3, r3, #2
 	cmp	r2, r3
-	bcs	.L766
+	bcs	.L767
 	cmp	r0, r3
-	bcs	.L766
+	bcs	.L767
 	bl	FtlSysBlkNumInit
-.L766:
-	ldr	r6, .L780+32
-	movs	r5, #0
-	ldr	r7, .L780+36
-	ldr	r8, .L780+44
 .L767:
+	ldr	r6, .L781+32
+	movs	r5, #0
+	ldr	r7, .L781+36
+	ldr	r8, .L781+44
+.L768:
 	ldrh	r3, [r7]
 	cmp	r5, r3
-	bcc	.L768
+	bcc	.L769
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L754:
+.L755:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L752
-.L764:
+	b	.L753
+.L765:
 	ldrh	r3, [r5]
 	movs	r2, #1
 	mov	r1, r2
@@ -6034,16 +6041,16 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L762
+	beq	.L763
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	beq	.L763
-.L762:
+	beq	.L764
+.L763:
 	subs	r7, r7, #1
 	sxth	r7, r7
-	b	.L761
-.L768:
+	b	.L762
+.L769:
 	ldrh	r2, [r8]
 	ldr	r1, [r4, #8]
 	ldr	r0, [r6, #4]!
@@ -6051,13 +6058,13 @@ FtlLoadBbt:
 	mla	r1, r5, r2, r1
 	adds	r5, r5, #1
 	bl	ftl_memcpy
-	b	.L767
-.L769:
+	b	.L768
+.L770:
 	mov	r0, #-1
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L781:
+.L782:
 	.align	2
-.L780:
+.L781:
 	.word	.LANCHOR148
 	.word	.LANCHOR17
 	.word	.LANCHOR123
@@ -6084,15 +6091,15 @@ FtlLoadSysInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r1, #0
-	ldr	r8, .L803+136
-	ldr	r5, .L803
+	ldr	r8, .L804+136
+	ldr	r5, .L804
 	ldr	r3, [r8]
-	ldr	r4, .L803+4
-	ldr	r10, .L803+140
+	ldr	r4, .L804+4
+	ldr	r10, .L804+140
 	ldrh	r2, [r5]
-	ldr	r7, .L803+8
+	ldr	r7, .L804+8
 	str	r3, [r4, #8]
-	ldr	r6, .L803+12
+	ldr	r6, .L804+12
 	ldr	r3, [r10]
 	lsls	r2, r2, #1
 	ldr	r0, [r7]
@@ -6102,41 +6109,41 @@ FtlLoadSysInfo:
 	movw	r3, #65535
 	str	r7, [sp]
 	cmp	r0, r3
-	bne	.L783
-.L791:
+	bne	.L784
+.L792:
 	mov	r0, #-1
-.L782:
+.L783:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L783:
+.L784:
 	movs	r1, #1
 	mov	fp, r4
 	bl	FtlGetLastWrittenPage
-	ldr	r3, .L803+16
+	ldr	r3, .L804+16
 	sxth	r7, r0
 	adds	r0, r0, #1
 	strh	r0, [r6, #2]	@ movhi
-.L785:
+.L786:
 	cmp	r7, #0
-	bge	.L788
+	bge	.L789
 	mov	r2, #1448
-	ldr	r1, .L803+20
-	ldr	r0, .L803+24
+	ldr	r1, .L804+20
+	ldr	r0, .L804+24
 	bl	printf
-.L787:
-	ldr	r2, .L803+28
+.L788:
+	ldr	r2, .L804+28
 	ldrh	r3, [r5]
 	ldrh	r2, [r2]
 	adds	r3, r3, #24
 	cmp	r2, r3, lsl #1
-	bcs	.L790
+	bcs	.L791
 	movw	r2, #1450
-	ldr	r1, .L803+20
-	ldr	r0, .L803+24
+	ldr	r1, .L804+20
+	ldr	r0, .L804+24
 	bl	printf
-.L790:
-	ldr	r7, .L803+32
+.L791:
+	ldr	r7, .L804+32
 	movs	r2, #48
 	ldr	r1, [r4, #8]
 	mov	r0, r7
@@ -6157,60 +6164,60 @@ FtlLoadSysInfo:
 	adds	r2, r2, #4
 	bic	r1, r1, #3
 	add	r1, r1, r3
-	ldr	r3, .L803+36
+	ldr	r3, .L804+36
 	ldr	r0, [r3]
 	bl	ftl_memcpy
 	ldr	r2, [r7]
-	ldr	r3, .L803+16
+	ldr	r3, .L804+16
 	cmp	r2, r3
-	bne	.L791
-	ldr	r3, .L803+40
+	bne	.L792
+	ldr	r3, .L804+40
 	ldrb	r2, [r7, #10]	@ zero_extendqisi2
 	ldrh	r5, [r7, #8]
 	ldrh	r3, [r3]
 	strh	r5, [r6, #6]	@ movhi
 	cmp	r2, r3
-	bne	.L791
-	ldr	r3, .L803+44
-	ldr	r2, .L803+48
+	bne	.L792
+	ldr	r3, .L804+44
+	ldr	r2, .L804+48
 	str	r5, [r3]
-	ldr	r3, .L803+52
+	ldr	r3, .L804+52
 	ldrh	r3, [r3]
 	muls	r3, r5, r3
 	str	r3, [r2]
-	ldr	r2, .L803+56
+	ldr	r2, .L804+56
 	ldrh	r2, [r2]
 	muls	r3, r2, r3
-	ldr	r2, .L803+60
+	ldr	r2, .L804+60
 	str	r3, [r2]
-	ldr	r3, .L803+64
+	ldr	r3, .L804+64
 	ldr	r6, [r3]
-	ldr	r3, .L803+68
+	ldr	r3, .L804+68
 	ldrh	r0, [r3, #6]
-	ldr	r3, .L803+72
+	ldr	r3, .L804+72
 	subs	r0, r6, r0
 	ldrh	r1, [r3]
 	subs	r0, r0, r5
 	bl	__aeabi_uidiv
-	ldr	r3, .L803+76
+	ldr	r3, .L804+76
 	cmp	r5, r6
 	strh	r0, [r3]	@ movhi
-	bls	.L792
+	bls	.L793
 	mov	r2, #1472
-	ldr	r1, .L803+20
-	ldr	r0, .L803+24
+	ldr	r1, .L804+20
+	ldr	r0, .L804+24
 	bl	printf
-.L792:
+.L793:
 	ldrh	r2, [r4, #16]
-	ldr	r3, .L803+80
+	ldr	r3, .L804+80
 	ldrh	ip, [r4, #14]
-	ldr	r7, .L803+84
+	ldr	r7, .L804+84
 	lsrs	r1, r2, #6
 	and	r2, r2, #63
 	strb	r2, [r3, #6]
 	ldrb	r2, [r4, #11]	@ zero_extendqisi2
 	strh	r1, [r3, #2]	@ movhi
-	ldr	r1, .L803+88
+	ldr	r1, .L804+88
 	strb	r2, [r3, #8]
 	ldrh	r2, [r4, #18]
 	strh	ip, [r3]	@ movhi
@@ -6229,7 +6236,7 @@ FtlLoadSysInfo:
 	strh	r5, [r1, #2]	@ movhi
 	ldrh	r5, [r4, #22]
 	strb	r2, [r1, #8]
-	ldr	r2, .L803+92
+	ldr	r2, .L804+92
 	strh	r5, [r2]	@ movhi
 	ldrh	r5, [r4, #24]
 	lsrs	r6, r5, #6
@@ -6239,31 +6246,31 @@ FtlLoadSysInfo:
 	strh	r6, [r2, #2]	@ movhi
 	ldr	r6, [r4, #32]
 	strb	r5, [r2, #8]
-	ldr	r5, .L803+96
+	ldr	r5, .L804+96
 	str	r3, [r5]
-	ldr	r5, .L803+100
+	ldr	r5, .L804+100
 	str	r3, [r5]
-	ldr	r5, .L803+104
+	ldr	r5, .L804+104
 	str	r3, [r5]
-	ldr	r5, .L803+108
+	ldr	r5, .L804+108
 	str	r3, [r5]
-	ldr	r5, .L803+112
+	ldr	r5, .L804+112
 	str	r6, [r5]
 	mov	r6, r1
-	ldr	r5, .L803+116
+	ldr	r5, .L804+116
 	str	r3, [r5]
-	ldr	r5, .L803+120
+	ldr	r5, .L804+120
 	str	r3, [r5]
-	ldr	r5, .L803+124
+	ldr	r5, .L804+124
 	ldr	lr, [r4, #40]
 	str	r3, [r5]
-	ldr	r3, .L803+128
+	ldr	r3, .L804+128
 	ldr	r5, [r3]
 	cmp	lr, r5
 	mov	r5, r2
 	it	hi
 	strhi	lr, [r3]
-	ldr	r3, .L803+132
+	ldr	r3, .L804+132
 	ldr	r2, [r4, #36]
 	ldr	r1, [r3]
 	cmp	r2, r1
@@ -6271,34 +6278,34 @@ FtlLoadSysInfo:
 	strhi	r2, [r3]
 	movw	r3, #65535
 	cmp	ip, r3
-	beq	.L795
-	ldr	r0, .L803+80
-	bl	make_superblock
-.L795:
-	ldrh	r2, [r6]
-	movw	r3, #65535
-	cmp	r2, r3
 	beq	.L796
-	ldr	r0, .L803+88
+	ldr	r0, .L804+80
 	bl	make_superblock
 .L796:
-	ldrh	r2, [r5]
+	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
 	beq	.L797
-	ldr	r0, .L803+92
+	ldr	r0, .L804+88
 	bl	make_superblock
 .L797:
-	ldrh	r2, [r7]
+	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
 	beq	.L798
-	ldr	r0, .L803+84
+	ldr	r0, .L804+92
 	bl	make_superblock
 .L798:
+	ldrh	r2, [r7]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L799
+	ldr	r0, .L804+84
+	bl	make_superblock
+.L799:
 	movs	r0, #0
-	b	.L782
-.L788:
+	b	.L783
+.L789:
 	ldrh	r2, [r6]
 	mov	r0, fp
 	str	r3, [sp, #4]
@@ -6312,23 +6319,23 @@ FtlLoadSysInfo:
 	ldr	r2, [r4]
 	ldr	r3, [sp, #4]
 	adds	r2, r2, #1
-	beq	.L786
+	beq	.L787
 	ldr	r2, [r8]
 	ldr	r2, [r2]
 	cmp	r2, r3
-	bne	.L786
+	bne	.L787
 	ldr	r2, [r10]
 	ldrh	r1, [r2]
 	movw	r2, #61604
 	cmp	r1, r2
-	beq	.L787
-.L786:
+	beq	.L788
+.L787:
 	subs	r7, r7, #1
 	sxth	r7, r7
-	b	.L785
-.L804:
+	b	.L786
+.L805:
 	.align	2
-.L803:
+.L804:
 	.word	.LANCHOR5
 	.word	.LANCHOR148
 	.word	.LANCHOR42
@@ -6383,26 +6390,26 @@ FlashProgPages:
 	mov	r10, r1
 	mov	r4, r0
 	mov	r5, r0
-	ldr	r3, .L843
+	ldr	r3, .L846
 	mov	r8, #0
-	ldr	fp, .L843+48
+	ldr	fp, .L846+48
 	str	r2, [sp, #8]
 	ldrh	r3, [r3, #12]
 	str	r3, [sp]
 	lsls	r3, r3, #3
 	str	r3, [sp, #4]
-.L806:
+.L807:
 	cmp	r8, r10
-	bne	.L818
+	bne	.L820
 	ldr	r3, [sp, #12]
 	cmp	r3, #0
-	beq	.L836
-	ldr	r6, .L843+4
+	beq	.L838
+	ldr	r6, .L846+4
 	movs	r5, #0
-.L820:
+.L822:
 	cmp	r8, r5
-	beq	.L836
-	ldr	r7, .L843+8
+	beq	.L838
+	ldr	r7, .L846+8
 	movs	r1, #0
 	ldr	r2, [r6]
 	add	r0, sp, #28
@@ -6418,66 +6425,73 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	r10, [sp, #28]
 	cmp	r10, #-1
-	bne	.L821
+	bne	.L823
 	ldr	r1, [r4, #4]
-	ldr	r0, .L843+12
+	ldr	r0, .L846+12
 	bl	printf
 	str	r10, [r4]
-.L821:
+.L823:
 	ldr	r3, [r4, #12]
-	cbz	r3, .L822
+	cbz	r3, .L824
 	ldr	r2, [r3]
 	ldr	r3, [r7]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L822
+	beq	.L824
 	ldr	r1, [r4, #4]
-	ldr	r0, .L843+16
+	ldr	r0, .L846+16
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4]
-.L822:
+.L824:
 	ldr	r3, [r4, #8]
-	cbz	r3, .L823
+	cbz	r3, .L825
 	ldr	r2, [r3]
 	ldr	r3, [r6]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L823
+	beq	.L825
 	ldr	r1, [r4, #4]
-	ldr	r0, .L843+20
+	ldr	r0, .L846+20
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4]
-.L823:
+.L825:
 	adds	r5, r5, #1
 	adds	r4, r4, #20
-	b	.L820
-.L818:
+	b	.L822
+.L820:
 	ldr	r3, [r5, #8]
-	cbz	r3, .L807
+	cbz	r3, .L808
 	ldr	r3, [r5, #12]
-	cbnz	r3, .L808
-.L807:
-	movs	r2, #130
-	ldr	r1, .L843+24
-	ldr	r0, .L843+28
-	bl	printf
+	cbnz	r3, .L809
 .L808:
+	movs	r2, #134
+	ldr	r1, .L846+24
+	ldr	r0, .L846+28
+	bl	printf
+.L809:
 	add	r2, sp, #20
 	add	r1, sp, #24
 	ldr	r0, [r5, #4]
 	bl	l2p_addr_tran.isra.0
 	ldr	r6, [sp, #20]
-	cbnz	r6, .L809
+	cmp	r6, #3
+	bls	.L810
+.L845:
+	mov	r3, #-1
+	str	r3, [r5]
+	b	.L811
+.L810:
+	cbnz	r6, .L812
 	ldr	r3, [sp, #24]
 	ldr	r2, [sp, #4]
 	cmp	r2, r3
-	bls	.L809
-	ldr	r5, .L843+24
-	ldr	r7, .L843+32
-	b	.L842
-.L811:
+	bls	.L812
+	ldr	r5, .L846+24
+	ldr	r7, .L846+32
+	b	.L844
+.L814:
 	mov	r3, #-1
 	ldr	r2, [r4, #-16]
 	str	r3, [r4, #-20]
@@ -6488,49 +6502,49 @@ FlashProgPages:
 	movs	r3, #16
 	movs	r2, #4
 	ldr	r1, [r4, #-12]
-	ldr	r0, .L843+36
+	ldr	r0, .L846+36
 	bl	rknand_print_hex
 	movs	r3, #4
 	ldr	r1, [r4, #-8]
 	mov	r2, r3
-	ldr	r0, .L843+40
+	ldr	r0, .L846+40
 	bl	rknand_print_hex
-.L842:
+.L844:
 	cmp	r6, r10
 	add	r4, r4, #20
-	bne	.L811
-.L836:
+	bne	.L814
+.L838:
 	movs	r0, #0
 	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L809:
+.L812:
 	ldr	r1, [r5, #8]
 	lsls	r3, r1, #26
-	beq	.L825
-	ldr	r3, .L843+4
+	beq	.L827
+	ldr	r3, .L846+4
 	ldr	r6, [r3]
 	cmp	r1, r6
-	beq	.L812
-	ldr	r3, .L843+44
+	beq	.L815
+	ldr	r3, .L846+44
 	mov	r0, r6
 	ldrh	r2, [r3]
 	lsls	r2, r2, #9
 	bl	ftl_memcpy
-.L812:
+.L815:
 	ldr	r3, [r5, #12]
 	mov	r2, r6
 	ldr	r1, [sp, #24]
 	ldrb	r0, [sp, #20]	@ zero_extendqisi2
 	ldr	r7, [fp, #8]
 	blx	r7
-	cbnz	r0, .L813
+	cbnz	r0, .L816
 	str	r0, [r5]
-.L814:
-	ldr	r3, .L843
+.L817:
+	ldr	r3, .L846
 	ldrh	r3, [r3, #14]
 	cmp	r3, #4
-	bne	.L816
+	bne	.L811
 	ldr	r0, [sp]
 	add	r2, r6, #2048
 	ldr	r3, [r5, #12]
@@ -6540,23 +6554,22 @@ FlashProgPages:
 	add	r1, r1, r0
 	ldrb	r0, [sp, #20]	@ zero_extendqisi2
 	blx	r6
-	cbz	r0, .L816
-	mov	r3, #-1
-	str	r3, [r5]
-.L816:
+	cmp	r0, #0
+	bne	.L845
+.L811:
 	add	r8, r8, #1
 	adds	r5, r5, #20
-	b	.L806
-.L825:
+	b	.L807
+.L827:
 	mov	r6, r1
-	b	.L812
-.L813:
+	b	.L815
+.L816:
 	mov	r3, #-1
 	str	r3, [r5]
-	b	.L814
-.L844:
+	b	.L817
+.L847:
 	.align	2
-.L843:
+.L846:
 	.word	.LANCHOR0
 	.word	.LANCHOR120
 	.word	.LANCHOR122
@@ -6582,133 +6595,133 @@ FlashProgPages:
 FtlLowFormatEraseBlock:
 	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L888
+	ldr	r3, .L891
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #32
-	ldr	r7, .L888+4
+	ldr	r7, .L891+4
 	mov	r8, #0
 	mov	r6, r1
 	mov	r5, r8
 	str	r0, [r3]
 	mov	r4, r8
-	ldr	r3, .L888+8
+	ldr	r3, .L891+8
 	mov	fp, #20
 	ldr	r10, [r7]
 	str	r0, [sp, #4]
 	ldrh	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L888+12
+	ldr	r3, .L891+12
 	ldr	r3, [r3]
 	str	r3, [sp, #16]
-	ldr	r3, .L888+16
+	ldr	r3, .L891+16
 	ldr	r3, [r3]
 	str	r3, [sp, #20]
-	ldr	r3, .L888+20
+	ldr	r3, .L891+20
 	ldrh	r3, [r3]
 	str	r3, [sp, #24]
-.L846:
+.L849:
 	ldr	r3, [sp, #12]
 	uxth	r2, r8
 	cmp	r3, r2
-	bhi	.L850
+	bhi	.L853
 	cmp	r5, #0
-	beq	.L845
+	beq	.L848
 	mov	r0, r10
 	mov	r8, #0
 	mov	r10, #20
 	mov	r2, r5
 	movs	r1, #0
 	bl	FlashEraseBlocks
-.L853:
+.L856:
 	uxth	r3, r8
 	cmp	r5, r3
-	bhi	.L855
+	bhi	.L858
 	cmp	r6, #0
-	beq	.L871
-	ldr	r3, .L888+24
+	beq	.L874
+	ldr	r3, .L891+24
 	mov	r10, #1
 	ldrh	r3, [r3]
 	str	r3, [sp, #8]
-.L856:
+.L859:
 	movs	r7, #0
-.L865:
-	ldr	r3, .L888+8
+.L868:
+	ldr	r3, .L891+8
 	mov	r8, #0
 	mov	r5, r8
 	ldrh	r3, [r3]
 	str	r3, [sp, #16]
-	ldr	r3, .L888+4
+	ldr	r3, .L891+4
 	ldr	fp, [r3]
-	ldr	r3, .L888+28
+	ldr	r3, .L891+28
 	ldr	r3, [r3]
 	str	r3, [sp, #20]
-	ldr	r3, .L888+12
+	ldr	r3, .L891+12
 	ldr	r3, [r3]
 	str	r3, [sp, #24]
-	ldr	r3, .L888+20
+	ldr	r3, .L891+20
 	ldrh	r3, [r3]
 	str	r3, [sp, #28]
-.L857:
+.L860:
 	ldr	r3, [sp, #16]
 	uxth	r2, r8
 	cmp	r3, r2
-	bhi	.L860
-	cbz	r5, .L845
+	bhi	.L863
+	cbz	r5, .L848
 	mov	r0, fp
-	ldr	fp, .L888+4
+	ldr	fp, .L891+4
 	movs	r3, #1
 	mov	r2, r10
 	mov	r1, r5
 	mov	r8, #0
 	bl	FlashProgPages
 	movs	r3, #20
-.L862:
+.L865:
 	uxth	r2, r8
 	cmp	r5, r2
-	bhi	.L864
+	bhi	.L867
 	adds	r7, r7, #1
 	ldr	r2, [sp, #8]
 	uxth	r3, r7
 	cmp	r2, r3
-	bhi	.L865
-	ldr	r8, .L888+4
+	bhi	.L868
+	ldr	r8, .L891+4
 	movs	r7, #0
 	mov	fp, #20
-.L866:
+.L869:
 	uxth	r3, r7
 	cmp	r5, r3
-	bhi	.L868
+	bhi	.L871
 	ldr	r3, [sp, #4]
 	cmp	r3, #63
-	bls	.L869
-	cbz	r6, .L845
-.L869:
-	ldr	r3, .L888+4
+	bls	.L872
+	cbz	r6, .L848
+.L872:
+	ldr	r3, .L891+4
 	mov	r2, r5
 	mov	r1, r10
 	ldr	r0, [r3]
 	bl	FlashEraseBlocks
-.L845:
+.L848:
 	mov	r0, r4
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L850:
+.L853:
 	mul	r2, fp, r8
 	movs	r3, #0
 	ldr	r1, [sp, #4]
 	str	r3, [r10, r2]
-	ldr	r3, .L888+32
+	ldr	r3, .L891+32
 	ldrb	r0, [r3, r8]	@ zero_extendqisi2
 	bl	V2P_block
 	str	r0, [sp, #8]
-	cbz	r6, .L847
+	cbz	r6, .L850
 	bl	IsBlkInVendorPart
-	cbnz	r0, .L848
-.L847:
+	cbnz	r0, .L851
+.L850:
 	ldr	r0, [sp, #8]
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L849
+	cbnz	r0, .L852
 	ldr	r3, [sp, #8]
 	mla	r1, fp, r5, r10
 	lsls	r2, r3, #10
@@ -6723,50 +6736,50 @@ FtlLowFormatEraseBlock:
 	bic	r2, r2, #3
 	add	r2, r2, r3
 	str	r2, [r1, #12]
-.L848:
+.L851:
 	add	r8, r8, #1
-	b	.L846
-.L849:
+	b	.L849
+.L852:
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L848
-.L855:
+	b	.L851
+.L858:
 	mul	r3, r10, r8
 	ldr	r2, [r7]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
 	adds	r3, r3, #1
-	bne	.L854
+	bne	.L857
 	ldr	r0, [r1, #4]
 	adds	r4, r4, #1
 	uxth	r4, r4
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.L854:
+.L857:
 	add	r8, r8, #1
-	b	.L853
-.L871:
+	b	.L856
+.L874:
 	movs	r3, #2
 	mov	r10, r6
 	str	r3, [sp, #8]
-	b	.L856
-.L860:
+	b	.L859
+.L863:
 	movs	r3, #20
 	ldr	r1, [sp, #4]
 	mul	r2, r3, r8
 	movs	r3, #0
 	str	r3, [fp, r2]
-	ldr	r3, .L888+32
+	ldr	r3, .L891+32
 	ldrb	r0, [r3, r8]	@ zero_extendqisi2
 	bl	V2P_block
 	str	r0, [sp, #12]
-	cbz	r6, .L858
+	cbz	r6, .L861
 	bl	IsBlkInVendorPart
-	cbnz	r0, .L859
-.L858:
+	cbnz	r0, .L862
+.L861:
 	ldr	r0, [sp, #12]
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L859
+	cbnz	r0, .L862
 	movs	r3, #20
 	mla	r1, r3, r5, fp
 	ldr	r3, [sp, #12]
@@ -6782,15 +6795,15 @@ FtlLowFormatEraseBlock:
 	bic	r2, r2, #3
 	add	r2, r2, r3
 	str	r2, [r1, #12]
-.L859:
+.L862:
 	add	r8, r8, #1
-	b	.L857
-.L864:
+	b	.L860
+.L867:
 	mul	r2, r3, r8
 	ldr	r1, [fp]
 	adds	r0, r1, r2
 	ldr	r2, [r1, r2]
-	cbz	r2, .L863
+	cbz	r2, .L866
 	ldr	r0, [r0, #4]
 	adds	r4, r4, #1
 	str	r3, [sp, #12]
@@ -6798,26 +6811,26 @@ FtlLowFormatEraseBlock:
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
 	ldr	r3, [sp, #12]
-.L863:
+.L866:
 	add	r8, r8, #1
-	b	.L862
-.L868:
-	cbz	r6, .L867
+	b	.L865
+.L871:
+	cbz	r6, .L870
 	mul	r3, fp, r7
 	ldr	r2, [r8]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
-	cbnz	r3, .L867
+	cbnz	r3, .L870
 	ldr	r0, [r1, #4]
 	movs	r1, #1
 	ubfx	r0, r0, #10, #16
 	bl	FtlFreeSysBlkQueueIn
-.L867:
+.L870:
 	adds	r7, r7, #1
-	b	.L866
-.L889:
+	b	.L869
+.L892:
 	.align	2
-.L888:
+.L891:
 	.word	.LANCHOR111
 	.word	.LANCHOR106
 	.word	.LANCHOR3
@@ -6845,14 +6858,14 @@ Ftl_write_map_blk_to_last_page:
 	mov	r4, r0
 	ldr	r5, [r0, #12]
 	cmp	r3, r2
-	bne	.L891
+	bne	.L894
 	ldrh	r3, [r0, #8]
-	cbz	r3, .L892
+	cbz	r3, .L895
 	movw	r2, #641
-	ldr	r1, .L900
-	ldr	r0, .L900+4
+	ldr	r1, .L903
+	ldr	r0, .L903+4
 	bl	printf
-.L892:
+.L895:
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
@@ -6864,20 +6877,20 @@ Ftl_write_map_blk_to_last_page:
 	ldr	r3, [r4, #28]
 	adds	r3, r3, #1
 	str	r3, [r4, #28]
-.L893:
+.L896:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L891:
+.L894:
 	ldrh	r5, [r5, r3, lsl #1]
 	movs	r1, #255
 	ldrh	r3, [r0, #2]
-	ldr	r2, .L900+8
-	ldr	r7, .L900+12
+	ldr	r2, .L903+8
+	ldr	r7, .L903+12
 	ldr	r6, [r0, #24]
 	orr	r3, r3, r5, lsl #10
 	ldr	r0, [r7]
 	str	r3, [r2, #4]
-	ldr	r3, .L900+16
+	ldr	r3, .L903+16
 	str	r0, [r2, #8]
 	ldr	r3, [r3]
 	str	r3, [r2, #12]
@@ -6888,7 +6901,7 @@ Ftl_write_map_blk_to_last_page:
 	ldrh	r2, [r4, #4]
 	strh	r5, [r3, #2]	@ movhi
 	strh	r2, [r3]	@ movhi
-	ldr	r3, .L900+20
+	ldr	r3, .L903+20
 	ldrh	r2, [r3]
 	lsls	r2, r2, #3
 	bl	ftl_memset
@@ -6896,37 +6909,37 @@ Ftl_write_map_blk_to_last_page:
 	movs	r3, #0
 	ldr	r1, [r7]
 	mov	r2, r3
-.L894:
+.L897:
 	uxth	r0, r3
 	cmp	ip, r0
-	bhi	.L896
+	bhi	.L899
 	movs	r2, #1
 	movs	r3, #0
 	mov	r1, r2
-	ldr	r0, .L900+8
+	ldr	r0, .L903+8
 	bl	FlashProgPages
 	ldrh	r3, [r4, #2]
 	mov	r0, r4
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	bl	ftl_map_blk_gc
-	b	.L893
-.L896:
+	b	.L896
+.L899:
 	ldr	r0, [r6, r3, lsl #2]
 	cmp	r5, r0, lsr #10
-	bne	.L895
+	bne	.L898
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r3, [r1, r2, lsl #3]
 	add	r7, r1, r2, lsl #3
 	ldr	r0, [r6, r3, lsl #2]
 	str	r0, [r7, #4]
-.L895:
+.L898:
 	adds	r3, r3, #1
-	b	.L894
-.L901:
+	b	.L897
+.L904:
 	.align	2
-.L900:
+.L903:
 	.word	.LANCHOR154
 	.word	.LC1
 	.word	.LANCHOR148
@@ -6947,13 +6960,13 @@ FtlMapWritePage:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-	ldr	r8, .L926+28
+	ldr	r8, .L929+28
 	mov	r7, r1
 	movs	r6, #0
 	str	r2, [sp, #4]
 	mov	fp, r8
-.L903:
-	ldr	r2, .L926
+.L906:
+	ldr	r2, .L929
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
@@ -6961,44 +6974,44 @@ FtlMapWritePage:
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	bge	.L904
+	bge	.L907
 	ldrh	r2, [r4]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L905
-.L904:
+	bne	.L908
+.L907:
 	mov	r0, r4
 	bl	Ftl_write_map_blk_to_last_page
-.L905:
+.L908:
 	ldrh	r2, [r4]
 	ldr	r3, [r4, #12]
 	ldrh	r3, [r3, r2, lsl #1]
-	cbnz	r3, .L906
+	cbnz	r3, .L909
 	movw	r2, #699
-	ldr	r1, .L926+4
-	ldr	r0, .L926+8
+	ldr	r1, .L929+4
+	ldr	r0, .L929+8
 	bl	printf
-.L906:
+.L909:
 	ldrh	r2, [r4]
 	ldrh	r3, [r4, #10]
 	cmp	r2, r3
-	bcc	.L907
+	bcc	.L910
 	mov	r2, #700
-	ldr	r1, .L926+4
-	ldr	r0, .L926+8
+	ldr	r1, .L929+4
+	ldr	r0, .L929+8
 	bl	printf
-.L907:
+.L910:
 	ldrh	r2, [r4]
 	movs	r1, #0
 	ldr	r3, [r4, #12]
-	ldr	r5, .L926+12
+	ldr	r5, .L929+12
 	ldrh	r10, [r3, r2, lsl #1]
 	ldrh	r2, [r4, #2]
 	ldr	r3, [sp, #4]
 	orr	r2, r2, r10, lsl #10
 	str	r3, [r5, #8]
 	str	r2, [r5, #4]
-	ldr	r2, .L926+16
+	ldr	r2, .L929+16
 	ldr	r0, [r2]
 	movs	r2, #16
 	str	r0, [r5, #12]
@@ -7021,10 +7034,10 @@ FtlMapWritePage:
 	uxth	r2, r2
 	adds	r3, r1, #1
 	strh	r2, [r4, #2]	@ movhi
-	bne	.L908
+	bne	.L911
 	ldr	r1, [r5, #4]
 	adds	r6, r6, #1
-	ldr	r0, .L926+20
+	ldr	r0, .L929+20
 	uxth	r6, r6
 	bl	printf
 	ldrh	r2, [r4, #2]
@@ -7034,40 +7047,40 @@ FtlMapWritePage:
 	addls	r2, r2, #-1
 	strhls	r2, [r4, #2]	@ movhi
 	cmp	r6, #3
-	bls	.L910
+	bls	.L913
 	mov	r2, r6
 	ldr	r1, [r5, #4]
-	ldr	r0, .L926+24
+	ldr	r0, .L929+24
 	bl	printf
-.L911:
-	b	.L911
-.L910:
+.L914:
+	b	.L914
+.L913:
 	ldr	r3, [r4, #32]
 	cmp	r3, #0
-	beq	.L903
-.L925:
-	b	.L925
-.L908:
+	beq	.L906
+.L928:
+	b	.L928
+.L911:
 	cmp	r2, #1
-	beq	.L914
+	beq	.L917
 	cmp	r1, #256
-	beq	.L914
+	beq	.L917
 	ldr	r0, [r4, #36]
-	cbz	r0, .L915
-.L914:
+	cbz	r0, .L918
+.L917:
 	movs	r3, #0
 	str	r3, [r4, #36]
-	b	.L903
-.L915:
+	b	.L906
+.L918:
 	ldr	r2, [r5, #4]
 	ldr	r3, [r4, #24]
 	str	r2, [r3, r7, lsl #2]
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L927:
+.L930:
 	.align	2
-.L926:
+.L929:
 	.word	.LANCHOR66
 	.word	.LANCHOR155
 	.word	.LC1
@@ -7088,31 +7101,31 @@ FtlMapWritePage:
 load_l2p_region:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L935
+	ldr	r3, .L938
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r5, r0
 	mov	r10, r1
 	ldrh	r2, [r3]
 	str	r3, [sp, #4]
 	cmp	r2, r0
-	bcs	.L929
+	bcs	.L932
 	movw	r2, #485
-	ldr	r1, .L935+4
-	ldr	r0, .L935+8
+	ldr	r1, .L938+4
+	ldr	r0, .L938+8
 	bl	printf
-.L929:
-	ldr	fp, .L935+48
+.L932:
+	ldr	fp, .L938+48
 	movs	r4, #12
-	ldr	r7, .L935+12
+	ldr	r7, .L938+12
 	ldr	r3, [fp]
 	ldr	r8, [r3, r5, lsl #2]
 	cmp	r8, #0
-	bne	.L930
+	bne	.L933
 	mul	r4, r4, r10
 	ldr	r2, [r7]
 	movs	r1, #255
 	adds	r0, r2, r4
-	ldr	r2, .L935+16
+	ldr	r2, .L938+16
 	ldr	r0, [r0, #8]
 	ldrh	r2, [r2]
 	bl	ftl_memset
@@ -7120,21 +7133,21 @@ load_l2p_region:
 	adds	r1, r2, r4
 	strh	r5, [r2, r4]	@ movhi
 	str	r8, [r1, #4]
-.L931:
+.L934:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L930:
+.L933:
 	mul	r4, r4, r10
 	ldr	r2, [r7]
-	ldr	r6, .L935+20
+	ldr	r6, .L938+20
 	add	r2, r2, r4
 	mov	r0, r6
 	ldr	r2, [r2, #8]
 	str	r8, [r6, #4]
 	str	r2, [r6, #8]
-	ldr	r2, .L935+24
+	ldr	r2, .L938+24
 	ldr	r2, [r2]
 	str	r2, [r6, #12]
 	movs	r2, #1
@@ -7143,55 +7156,55 @@ load_l2p_region:
 	ldr	r10, [r6, #12]
 	ldrh	r2, [r10, #8]
 	cmp	r2, r5
-	beq	.L932
+	beq	.L935
 	mov	r2, r8
 	mov	r1, r5
-	ldr	r0, .L935+28
+	ldr	r0, .L938+28
 	bl	printf
 	movs	r3, #4
 	ldr	r1, [r6, #12]
 	mov	r2, r3
-	ldr	r0, .L935+32
+	ldr	r0, .L938+32
 	bl	rknand_print_hex
 	ldr	r3, [sp, #4]
 	movs	r2, #4
 	ldr	r1, [fp]
-	ldr	r0, .L935+36
+	ldr	r0, .L938+36
 	ldrh	r3, [r3]
 	bl	rknand_print_hex
-.L933:
+.L936:
 	ldrh	r3, [r10, #8]
 	cmp	r3, r5
-	beq	.L934
+	beq	.L937
 	mov	r2, #508
-	ldr	r1, .L935+4
-	ldr	r0, .L935+8
+	ldr	r1, .L938+4
+	ldr	r0, .L938+8
 	bl	printf
-.L934:
+.L937:
 	ldr	r3, [r7]
 	movs	r1, #0
 	adds	r2, r3, r4
 	str	r1, [r2, #4]
 	strh	r5, [r3, r4]	@ movhi
-	b	.L931
-.L932:
+	b	.L934
+.L935:
 	ldr	r2, [r6]
 	cmp	r2, #256
-	bne	.L933
+	bne	.L936
 	mov	r2, r8
 	mov	r1, r5
-	ldr	r0, .L935+40
+	ldr	r0, .L938+40
 	bl	printf
 	ldr	r3, [r7]
 	mov	r1, r5
-	ldr	r0, .L935+44
+	ldr	r0, .L938+44
 	add	r3, r3, r4
 	ldr	r2, [r3, #8]
 	bl	FtlMapWritePage
-	b	.L933
-.L936:
+	b	.L936
+.L939:
 	.align	2
-.L935:
+.L938:
 	.word	.LANCHOR32
 	.word	.LANCHOR156
 	.word	.LC1
@@ -7227,13 +7240,13 @@ ftl_map_blk_gc:
 	ldrh	r2, [r4, #8]
 	subs	r3, r3, #5
 	cmp	r2, r3
-	blt	.L938
+	blt	.L941
 	uxth	r0, r0
 	ldrh	r8, [r5, r0, lsl #1]
 	cmp	r8, #0
-	beq	.L938
+	beq	.L941
 	ldr	r3, [r4, #32]
-	cbnz	r3, .L938
+	cbnz	r3, .L941
 	movs	r2, #1
 	str	r2, [r4, #32]
 	strh	r3, [r5, r0, lsl #1]	@ movhi
@@ -7241,39 +7254,39 @@ ftl_map_blk_gc:
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	ldr	r3, .L953
+	ldr	r3, .L956
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L939
+	bcc	.L942
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L939:
-	ldr	r5, .L953+4
+.L942:
+	ldr	r5, .L956+4
 	movs	r6, #0
-.L940:
+.L943:
 	ldrh	r3, [r4, #6]
 	uxth	r10, r6
 	cmp	r3, r10
-	bhi	.L947
+	bhi	.L950
 	movs	r1, #1
 	mov	r0, r8
 	bl	FtlFreeSysBlkQueueIn
 	movs	r3, #0
 	str	r3, [r4, #32]
-.L938:
-	ldr	r3, .L953
+.L941:
+	ldr	r3, .L956
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L948
+	bcc	.L951
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L948:
+.L951:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L947:
+.L950:
 	ldr	r3, [sp]
 	uxth	fp, r6
 	add	r3, r3, fp, lsl #2
@@ -7281,53 +7294,53 @@ ftl_map_blk_gc:
 	ldr	r3, [sp]
 	ldr	r2, [r3, fp, lsl #2]
 	cmp	r8, r2, lsr #10
-	bne	.L941
-	ldr	r3, .L953+8
+	bne	.L944
+	ldr	r3, .L956+8
 	str	r2, [r5, #4]
 	movs	r2, #1
-	ldr	r0, .L953+4
+	ldr	r0, .L956+4
 	ldr	r1, [r3]
 	str	r1, [r5, #8]
-	ldr	r1, .L953+12
+	ldr	r1, .L956+12
 	ldr	r7, [r1]
 	mov	r1, r2
 	str	r7, [r5, #12]
 	bl	FlashReadPages
 	ldrh	r2, [r7, #8]
 	cmp	r2, r10
-	beq	.L942
+	beq	.L945
 	movw	r2, #611
-	ldr	r1, .L953+16
-	ldr	r0, .L953+20
+	ldr	r1, .L956+16
+	ldr	r0, .L956+20
 	bl	printf
-.L942:
+.L945:
 	ldr	r2, [r5]
 	adds	r2, r2, #1
-	bne	.L943
-.L945:
+	bne	.L946
+.L948:
 	ldr	r2, [sp, #4]
 	movs	r3, #0
 	str	r3, [r2]
-.L944:
-	b	.L944
-.L943:
+.L947:
+	b	.L947
+.L946:
 	ldrh	r2, [r7, #8]
 	cmp	r2, r10
-	bne	.L945
+	bne	.L948
 	ldrh	r1, [r7]
 	ldrh	r2, [r4, #4]
 	cmp	r1, r2
-	bne	.L945
+	bne	.L948
 	ldr	r2, [r5, #8]
 	mov	r1, fp
 	mov	r0, r4
 	bl	FtlMapWritePage
-.L941:
+.L944:
 	adds	r6, r6, #1
-	b	.L940
-.L954:
+	b	.L943
+.L957:
 	.align	2
-.L953:
+.L956:
 	.word	.LANCHOR20
 	.word	.LANCHOR148
 	.word	.LANCHOR116
@@ -7359,16 +7372,16 @@ FtlMapTblRecovery:
 	lsl	r2, fp, #2
 	ldr	r10, [r0, #12]
 	mov	r0, r8
-	ldr	r5, .L982
+	ldr	r5, .L985
 	str	r3, [sp, #4]
 	bl	ftl_memset
-	ldr	r3, .L982+4
+	ldr	r3, .L985+4
 	str	r6, [r4, #32]
 	str	r6, [r4, #28]
 	ldr	r2, [r3]
 	str	r3, [sp, #8]
 	str	r2, [r5, #8]
-	ldr	r2, .L982+8
+	ldr	r2, .L985+8
 	ldr	r7, [r2]
 	movw	r2, #65535
 	str	r7, [r5, #12]
@@ -7376,16 +7389,16 @@ FtlMapTblRecovery:
 	strh	r2, [r4, #2]	@ movhi
 	movs	r2, #1
 	str	r2, [r4, #36]
-.L956:
+.L959:
 	ldr	r2, [sp, #4]
 	sxth	r3, r6
 	cmp	r3, r2
-	bge	.L973
+	bge	.L976
 	ldr	r2, [sp, #4]
 	subs	r2, r2, #1
 	cmp	r3, r2
 	lsl	r2, r3, #1
-	bne	.L957
+	bne	.L960
 	ldrh	r0, [r10, r3, lsl #1]
 	movs	r1, #1
 	add	r5, r10, r2
@@ -7401,22 +7414,22 @@ FtlMapTblRecovery:
 	strh	r0, [r4, #2]	@ movhi
 	ldr	r3, [r2, r3, lsl #2]
 	str	r3, [r4, #28]
-	ldr	r3, .L982
-.L958:
+	ldr	r3, .L985
+.L961:
 	sxth	r2, r6
 	cmp	r2, r10
-	ble	.L960
-.L973:
+	ble	.L963
+.L976:
 	mov	r0, r4
 	bl	ftl_free_no_use_map_blk
-	ldr	r3, .L982+12
+	ldr	r3, .L985+12
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L962
+	bne	.L965
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L962:
+.L965:
 	mov	r0, r4
 	bl	ftl_map_blk_gc
 	mov	r0, r4
@@ -7425,9 +7438,9 @@ FtlMapTblRecovery:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L960:
+.L963:
 	ldrh	r1, [r5]
-	ldr	r0, .L982
+	ldr	r0, .L985
 	str	r3, [sp, #4]
 	orr	r2, r2, r1, lsl #10
 	str	r2, [r3, #4]
@@ -7437,28 +7450,28 @@ FtlMapTblRecovery:
 	ldr	r3, [sp, #4]
 	ldr	r2, [r3]
 	adds	r2, r2, #1
-	beq	.L959
+	beq	.L962
 	ldrh	r2, [r7, #8]
 	cmp	fp, r2
-	bls	.L959
+	bls	.L962
 	ldrh	r1, [r4, #4]
 	ldrh	r0, [r7]
 	cmp	r0, r1
 	itt	eq
 	ldreq	r1, [r3, #4]
 	streq	r1, [r8, r2, lsl #2]
-.L959:
+.L962:
 	adds	r6, r6, #1
-	b	.L958
-.L957:
+	b	.L961
+.L960:
 	ldr	r1, [sp, #8]
 	add	r2, r10, r2
 	str	r2, [sp, #16]
-	ldr	r0, .L982
+	ldr	r0, .L985
 	ldr	r1, [r1]
 	str	r1, [r5, #8]
 	ldrh	r1, [r10, r3, lsl #1]
-	ldr	r3, .L982+12
+	ldr	r3, .L985+12
 	ldrh	r2, [r3]
 	str	r3, [sp, #20]
 	subs	r2, r2, #1
@@ -7469,27 +7482,27 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	r2, [r5]
 	adds	r2, r2, #1
-	beq	.L975
+	beq	.L978
 	ldrh	r1, [r7]
 	ldrh	r2, [r4, #4]
 	ldr	r3, [sp, #20]
 	cmp	r1, r2
-	bne	.L975
+	bne	.L978
 	ldrh	r1, [r7, #8]
 	movw	r2, #64245
 	cmp	r1, r2
-	beq	.L964
-.L975:
+	beq	.L967
+.L978:
 	movs	r3, #0
-.L965:
-	ldr	r1, .L982+12
+.L968:
+	ldr	r1, .L985+12
 	sxth	r2, r3
 	ldrh	r1, [r1]
 	cmp	r2, r1
-	bge	.L971
+	bge	.L974
 	str	r3, [sp, #20]
 	ldr	r3, [sp, #16]
-	ldr	r0, .L982
+	ldr	r0, .L985
 	ldrh	r1, [r3]
 	orr	r2, r2, r1, lsl #10
 	str	r2, [r5, #4]
@@ -7499,33 +7512,33 @@ FtlMapTblRecovery:
 	ldr	r2, [r5]
 	ldr	r3, [sp, #20]
 	adds	r2, r2, #1
-	beq	.L969
+	beq	.L972
 	ldrh	r2, [r7, #8]
 	cmp	fp, r2
-	bls	.L969
+	bls	.L972
 	ldrh	r1, [r4, #4]
 	ldrh	r0, [r7]
 	cmp	r0, r1
 	itt	eq
 	ldreq	r1, [r5, #4]
 	streq	r1, [r8, r2, lsl #2]
-.L969:
+.L972:
 	adds	r3, r3, #1
-	b	.L965
-.L964:
+	b	.L968
+.L967:
 	ldrh	r2, [r3]
 	movs	r1, #0
 	ldr	r3, [sp, #8]
 	subs	r2, r2, #1
 	ldr	ip, [r3]
-.L966:
+.L969:
 	sxth	r3, r1
 	cmp	r3, r2
-	blt	.L968
-.L971:
+	blt	.L971
+.L974:
 	adds	r6, r6, #1
-	b	.L956
-.L968:
+	b	.L959
+.L971:
 	lsls	r0, r3, #3
 	ldr	r3, [ip, r3, lsl #3]
 	adds	r1, r1, #1
@@ -7536,10 +7549,10 @@ FtlMapTblRecovery:
 	movhi	r3, lr
 	ldrhi	r0, [r0, #4]
 	strhi	r0, [r8, r3, lsl #2]
-	b	.L966
-.L983:
+	b	.L969
+.L986:
 	.align	2
-.L982:
+.L985:
 	.word	.LANCHOR148
 	.word	.LANCHOR115
 	.word	.LANCHOR123
@@ -7557,36 +7570,36 @@ FtlLoadVonderInfo:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L985
-	ldr	r0, .L985+4
+	ldr	r3, .L988
+	ldr	r0, .L988+4
 	ldrh	r3, [r3]
 	strh	r3, [r0, #10]	@ movhi
 	movw	r3, #61574
 	strh	r3, [r0, #4]	@ movhi
-	ldr	r3, .L985+8
+	ldr	r3, .L988+8
 	ldrh	r3, [r3]
 	strh	r3, [r0, #8]	@ movhi
-	ldr	r3, .L985+12
+	ldr	r3, .L988+12
 	ldrh	r3, [r3]
 	strh	r3, [r0, #6]	@ movhi
-	ldr	r3, .L985+16
+	ldr	r3, .L988+16
 	ldr	r3, [r3]
 	str	r3, [r0, #12]
-	ldr	r3, .L985+20
+	ldr	r3, .L988+20
 	ldr	r3, [r3]
 	str	r3, [r0, #16]
-	ldr	r3, .L985+24
+	ldr	r3, .L988+24
 	ldr	r3, [r3]
 	str	r3, [r0, #20]
-	ldr	r3, .L985+28
+	ldr	r3, .L988+28
 	ldr	r3, [r3]
 	str	r3, [r0, #24]
 	bl	FtlMapTblRecovery
 	movs	r0, #0
 	pop	{r3, pc}
-.L986:
+.L989:
 	.align	2
-.L985:
+.L988:
 	.word	.LANCHOR27
 	.word	.LANCHOR158
 	.word	.LANCHOR35
@@ -7609,13 +7622,13 @@ FtlLoadMapInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	FtlL2PDataInit
-	ldr	r0, .L988
+	ldr	r0, .L991
 	bl	FtlMapTblRecovery
 	movs	r0, #0
 	pop	{r3, pc}
-.L989:
+.L992:
 	.align	2
-.L988:
+.L991:
 	.word	.LANCHOR140
 	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
 	.section	.text.flush_l2p_region,"ax",%progbits
@@ -7631,9 +7644,9 @@ flush_l2p_region:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #12
-	ldr	r5, .L991
+	ldr	r5, .L994
 	muls	r4, r0, r4
-	ldr	r0, .L991+4
+	ldr	r0, .L994+4
 	ldr	r3, [r5]
 	adds	r2, r3, r4
 	ldrh	r1, [r3, r4]
@@ -7646,9 +7659,9 @@ flush_l2p_region:
 	bic	r3, r3, #-2147483648
 	str	r3, [r4, #4]
 	pop	{r3, r4, r5, pc}
-.L992:
+.L995:
 	.align	2
-.L991:
+.L994:
 	.word	.LANCHOR55
 	.word	.LANCHOR140
 	.size	flush_l2p_region, .-flush_l2p_region
@@ -7665,36 +7678,36 @@ log2phys:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r7, r2
-	ldr	r4, .L1006
+	ldr	r4, .L1009
 	mov	r10, r0
 	mov	r5, r1
-	ldr	r3, .L1006+4
+	ldr	r3, .L1009+4
 	ldr	r2, [r4]
 	ldrh	fp, [r3]
 	cmp	r0, r2
-	bcc	.L994
+	bcc	.L997
 	movw	r2, #811
-	ldr	r1, .L1006+8
-	ldr	r0, .L1006+12
+	ldr	r1, .L1009+8
+	ldr	r0, .L1009+12
 	bl	printf
-.L994:
+.L997:
 	ldr	r3, [r4]
 	cmp	r10, r3
-	bcs	.L995
-	ldr	r3, .L1006+16
+	bcs	.L998
+	ldr	r3, .L1009+16
 	add	fp, fp, #7
 	lsr	r6, r10, fp
 	movs	r2, #0
 	ldrh	r1, [r3]
 	uxth	r6, r6
-	ldr	r3, .L1006+20
+	ldr	r3, .L1009+20
 	ldr	r0, [r3]
 	mov	r8, r3
 	movs	r3, #12
-.L996:
+.L999:
 	uxth	r4, r2
 	cmp	r4, r1
-	bcc	.L1001
+	bcc	.L1004
 	str	r3, [sp, #4]
 	bl	select_l2p_ram_region
 	ldr	r3, [sp, #4]
@@ -7705,31 +7718,31 @@ log2phys:
 	ldrh	r2, [r2, r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1002
+	beq	.L1005
 	ldr	r3, [r1, #4]
 	cmp	r3, #0
-	bge	.L1002
+	bge	.L1005
 	bl	flush_l2p_region
-.L1002:
+.L1005:
 	mov	r1, r4
 	mov	r0, r6
 	bl	load_l2p_region
-	b	.L998
-.L995:
+	b	.L1001
+.L998:
 	mov	r0, #-1
-	cbnz	r7, .L993
+	cbnz	r7, .L996
 	str	r0, [r5]
-.L993:
+.L996:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1001:
+.L1004:
 	adds	r2, r2, #1
 	mla	ip, r3, r2, r0
 	ldrh	ip, [ip, #-12]
 	cmp	ip, r6
-	bne	.L996
-.L998:
+	bne	.L999
+.L1001:
 	movs	r0, #1
 	ldr	r2, [r8]
 	lsl	r0, r0, fp
@@ -7738,35 +7751,35 @@ log2phys:
 	and	r0, r0, r10
 	uxth	r0, r0
 	mla	r3, r3, r4, r2
-	cbnz	r7, .L999
+	cbnz	r7, .L1002
 	ldr	r3, [r3, #8]
 	ldr	r3, [r3, r0, lsl #2]
 	str	r3, [r5]
-.L1000:
+.L1003:
 	ldr	r2, [r8]
 	movs	r3, #12
 	mla	r4, r3, r4, r2
 	ldr	r3, [r4, #4]
 	adds	r2, r3, #1
-	beq	.L1004
+	beq	.L1007
 	adds	r3, r3, #1
 	str	r3, [r4, #4]
-.L1004:
+.L1007:
 	movs	r0, #0
-	b	.L993
-.L999:
+	b	.L996
+.L1002:
 	ldr	r1, [r5]
 	ldr	r2, [r3, #8]
 	str	r1, [r2, r0, lsl #2]
 	ldr	r2, [r3, #4]
 	orr	r2, r2, #-2147483648
 	str	r2, [r3, #4]
-	ldr	r3, .L1006+24
+	ldr	r3, .L1009+24
 	strh	r6, [r3]	@ movhi
-	b	.L1000
-.L1007:
+	b	.L1003
+.L1010:
 	.align	2
-.L1006:
+.L1009:
 	.word	.LANCHOR61
 	.word	.LANCHOR22
 	.word	.LANCHOR159
@@ -7788,22 +7801,22 @@ FtlReUsePrevPpa:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r6, r0
-	ldr	r5, .L1018
+	ldr	r5, .L1021
 	ubfx	r0, r1, #10, #16
 	str	r1, [sp, #4]
 	bl	P2V_block_in_plane
 	ldr	r2, [r5]
 	mov	r7, r0
 	ldrh	r3, [r2, r0, lsl #1]
-	cbnz	r3, .L1009
-	ldr	r2, .L1018+4
+	cbnz	r3, .L1012
+	ldr	r2, .L1021+4
 	ldr	r4, [r2]
 	cmp	r4, #0
-	beq	.L1010
-	ldr	r2, .L1018+8
+	beq	.L1013
+	ldr	r2, .L1021+8
 	movw	lr, #65535
-	ldr	ip, .L1018+24
-	ldr	r0, .L1018+12
+	ldr	ip, .L1021+24
+	ldr	r0, .L1021+12
 	ldr	r2, [r2]
 	ldrh	r1, [r0]
 	mov	r8, r0
@@ -7812,22 +7825,22 @@ FtlReUsePrevPpa:
 	mul	r4, ip, r4
 	mov	ip, #6
 	uxth	r4, r4
-.L1011:
+.L1014:
 	uxth	r0, r3
 	cmp	r1, r0
-	bls	.L1010
+	bls	.L1013
 	cmp	r4, r7
-	bne	.L1012
+	bne	.L1015
 	mov	r1, r4
-	ldr	r0, .L1018+4
+	ldr	r0, .L1021+4
 	bl	List_remove_node
 	ldrh	r3, [r8]
-	cbnz	r3, .L1013
+	cbnz	r3, .L1016
 	movw	r2, #1699
-	ldr	r1, .L1018+16
-	ldr	r0, .L1018+20
+	ldr	r1, .L1021+16
+	ldr	r0, .L1021+20
 	bl	printf
-.L1013:
+.L1016:
 	ldrh	r3, [r8]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -7835,17 +7848,17 @@ FtlReUsePrevPpa:
 	bl	INSERT_DATA_LIST
 	ldr	r2, [r5]
 	ldrh	r3, [r2, r7, lsl #1]
-.L1009:
+.L1012:
 	adds	r3, r3, #1
 	strh	r3, [r2, r7, lsl #1]	@ movhi
-	b	.L1010
-.L1012:
+	b	.L1013
+.L1015:
 	mul	r4, ip, r4
 	adds	r3, r3, #1
 	ldrh	r4, [r2, r4]
 	cmp	r4, lr
-	bne	.L1011
-.L1010:
+	bne	.L1014
+.L1013:
 	movs	r2, #1
 	add	r1, sp, #4
 	mov	r0, r6
@@ -7853,9 +7866,9 @@ FtlReUsePrevPpa:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1019:
+.L1022:
 	.align	2
-.L1018:
+.L1021:
 	.word	.LANCHOR42
 	.word	.LANCHOR47
 	.word	.LANCHOR40
@@ -7877,56 +7890,56 @@ ftl_check_vpc:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r6, .L1044
-	ldr	r5, .L1044+4
-	ldr	r1, .L1044+8
-	ldr	r0, .L1044+12
+	ldr	r6, .L1047
+	ldr	r5, .L1047+4
+	ldr	r1, .L1047+8
+	ldr	r0, .L1047+12
 	bl	printf
 	mov	r2, #8192
 	movs	r1, #0
-	ldr	r0, .L1044+4
+	ldr	r0, .L1047+4
 	bl	ftl_memset
-.L1021:
+.L1024:
 	ldr	r3, [r6]
 	cmp	r4, r3
-	bcc	.L1023
-	ldr	r10, .L1044+48
+	bcc	.L1026
+	ldr	r10, .L1047+48
 	movs	r4, #0
-	ldr	r7, .L1044+16
+	ldr	r7, .L1047+16
 	mov	r6, r4
-.L1024:
+.L1027:
 	ldrh	r2, [r10]
 	uxth	r3, r4
 	cmp	r2, r3
-	bhi	.L1026
-	ldr	r3, .L1044+20
+	bhi	.L1029
+	ldr	r3, .L1047+20
 	ldr	r4, [r3]
-	cbz	r4, .L1027
-	ldr	r3, .L1044+24
+	cbz	r4, .L1030
+	ldr	r3, .L1047+24
 	mov	r8, #0
-	ldr	r5, .L1044+28
-	ldr	r10, .L1044+16
+	ldr	r5, .L1047+28
+	ldr	r10, .L1047+16
 	ldrh	r7, [r3]
 	ldr	r3, [r5]
-	ldr	fp, .L1044+4
+	ldr	fp, .L1047+4
 	subs	r4, r4, r3
-	ldr	r3, .L1044+32
+	ldr	r3, .L1047+32
 	asrs	r4, r4, #1
 	muls	r4, r3, r4
 	uxth	r4, r4
-.L1028:
+.L1031:
 	uxth	r3, r8
 	cmp	r7, r3
-	bls	.L1027
+	bls	.L1030
 	ldr	r3, [r10]
 	ldrh	r2, [r3, r4, lsl #1]
-	cbz	r2, .L1029
+	cbz	r2, .L1032
 	movs	r6, #1
 	ldrh	r3, [fp, r4, lsl #1]
 	mov	r1, r4
-	ldr	r0, .L1044+36
+	ldr	r0, .L1047+36
 	bl	printf
-.L1029:
+.L1032:
 	movs	r3, #6
 	ldr	r2, [r5]
 	muls	r4, r3, r4
@@ -7934,59 +7947,59 @@ ftl_check_vpc:
 	add	r8, r8, #1
 	ldrh	r4, [r2, r4]
 	cmp	r4, r3
-	bne	.L1028
-.L1027:
-	cbz	r6, .L1020
+	bne	.L1031
+.L1030:
+	cbz	r6, .L1023
 	movw	r2, #2343
-	ldr	r1, .L1044+8
-	ldr	r0, .L1044+40
+	ldr	r1, .L1047+8
+	ldr	r0, .L1047+40
 	bl	printf
-.L1020:
+.L1023:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1023:
+.L1026:
 	movs	r2, #0
 	add	r1, sp, #4
 	mov	r0, r4
 	bl	log2phys
 	ldr	r0, [sp, #4]
 	adds	r3, r0, #1
-	beq	.L1022
+	beq	.L1025
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r5, r0, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r5, r0, lsl #1]	@ movhi
-.L1022:
+.L1025:
 	adds	r4, r4, #1
-	b	.L1021
-.L1026:
+	b	.L1024
+.L1029:
 	ldr	r3, [r7]
 	uxth	r5, r4
-	ldr	r8, .L1044+4
+	ldr	r8, .L1047+4
 	ldrh	r2, [r3, r5, lsl #1]
 	ldrh	r3, [r8, r5, lsl #1]
 	cmp	r2, r3
-	beq	.L1025
+	beq	.L1028
 	mov	r1, r5
-	ldr	r0, .L1044+44
+	ldr	r0, .L1047+44
 	bl	printf
 	ldr	r3, [r7]
 	movw	r2, #65535
 	ldrh	r3, [r3, r5, lsl #1]
 	cmp	r3, r2
-	beq	.L1025
+	beq	.L1028
 	ldrh	r2, [r8, r5, lsl #1]
 	cmp	r2, r3
 	it	hi
 	movhi	r6, #1
-.L1025:
+.L1028:
 	adds	r4, r4, #1
-	b	.L1024
-.L1045:
+	b	.L1027
+.L1048:
 	.align	2
-.L1044:
+.L1047:
 	.word	.LANCHOR61
 	.word	check_vpc_table
 	.word	.LANCHOR161
@@ -8014,60 +8027,60 @@ ftl_scan_all_data:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r5, #0
-	ldr	r7, .L1060
+	ldr	r7, .L1063
 	sub	sp, sp, #32
 	movs	r1, #0
-	ldr	r8, .L1060+24
-	ldr	r0, .L1060+4
+	ldr	r8, .L1063+24
+	ldr	r0, .L1063+4
 	bl	printf
-.L1047:
+.L1050:
 	ldr	r3, [r7]
 	cmp	r5, r3
-	bcc	.L1053
+	bcc	.L1056
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1053:
+.L1056:
 	movs	r2, #0
 	add	r1, sp, #28
 	mov	r0, r5
 	bl	log2phys
 	ubfx	r3, r5, #0, #11
-	cbnz	r3, .L1048
+	cbnz	r3, .L1051
 	ldr	r2, [sp, #28]
 	mov	r1, r5
 	mov	r0, r8
 	bl	printf
-.L1048:
+.L1051:
 	ldr	r3, [sp, #28]
 	adds	r2, r3, #1
-	beq	.L1050
-	ldr	r4, .L1060+8
+	beq	.L1053
+	ldr	r4, .L1063+8
 	movs	r2, #0
 	movs	r1, #1
 	str	r3, [r4, #4]
 	mov	r0, r4
-	ldr	r3, .L1060+12
+	ldr	r3, .L1063+12
 	str	r5, [r4, #16]
 	str	r2, [r4]
 	ldr	r3, [r3]
 	str	r3, [r4, #8]
-	ldr	r3, .L1060+16
+	ldr	r3, .L1063+16
 	ldr	r6, [r3]
 	str	r6, [r4, #12]
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	cmp	r3, #256
-	beq	.L1051
+	beq	.L1054
 	adds	r3, r3, #1
-	beq	.L1051
+	beq	.L1054
 	ldr	r3, [r6, #8]
 	cmp	r5, r3
-	beq	.L1050
-.L1051:
+	beq	.L1053
+.L1054:
 	ldr	r2, [r4, #8]
 	ldr	r3, [r4, #12]
-	ldr	r0, .L1060+20
+	ldr	r0, .L1063+20
 	ldr	r1, [r2, #4]
 	str	r1, [sp, #16]
 	mov	r1, r5
@@ -8082,12 +8095,12 @@ ftl_scan_all_data:
 	ldr	r2, [r4, #4]
 	ldr	r3, [r3]
 	bl	printf
-.L1050:
+.L1053:
 	adds	r5, r5, #1
-	b	.L1047
-.L1061:
+	b	.L1050
+.L1064:
 	.align	2
-.L1060:
+.L1063:
 	.word	.LANCHOR61
 	.word	.LC97
 	.word	.LANCHOR148
@@ -8107,7 +8120,7 @@ ftl_scan_all_data:
 FtlGcScanTempBlk:
 	@ args = 0, pretend = 0, frame = 48
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1092
+	ldr	r3, .L1098
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #48
 	mov	r4, r0
@@ -8115,63 +8128,63 @@ FtlGcScanTempBlk:
 	ldrh	r5, [r3]
 	movw	r3, #65535
 	cmp	r5, r3
-	beq	.L1086
-	cbnz	r5, .L1063
-.L1064:
+	beq	.L1090
+	cbnz	r5, .L1066
+.L1067:
 	bl	FtlGcPageVarInit
-	b	.L1065
-.L1086:
+	b	.L1068
+.L1090:
 	movs	r5, #0
-.L1063:
-	ldr	r3, .L1092+4
+.L1066:
+	ldr	r3, .L1098+4
 	ldr	r2, [sp, #8]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	beq	.L1064
-.L1065:
-	ldr	fp, .L1092+48
+	beq	.L1067
+.L1068:
+	ldr	fp, .L1098+52
 	movs	r3, #0
 	str	r3, [sp]
-.L1066:
+.L1069:
 	ldrh	r2, [r4]
 	movs	r3, #0
 	strb	r3, [r4, #8]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1067
-.L1083:
-	ldr	r3, .L1092+8
+	beq	.L1070
+.L1087:
+	ldr	r3, .L1098+8
 	movs	r2, #0
 	ldr	r0, [fp]
 	mov	r7, r2
 	movw	lr, #65535
 	mov	r8, #20
 	ldrh	r10, [r3]
-	ldr	r3, .L1092+12
+	ldr	r3, .L1098+12
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L1092+16
+	ldr	r3, .L1098+16
 	ldrh	r3, [r3]
 	str	r3, [sp, #16]
-	ldr	r3, .L1092+20
+	ldr	r3, .L1098+20
 	ldr	r3, [r3]
 	str	r3, [sp, #20]
-	ldr	r3, .L1092+24
+	ldr	r3, .L1098+24
 	ldrh	ip, [r3]
 	add	r3, r4, #16
 	str	r3, [sp, #4]
-.L1068:
+.L1071:
 	uxth	r3, r2
 	cmp	r10, r3
-	bhi	.L1070
+	bhi	.L1073
 	mov	r10, #0
 	movs	r2, #0
 	mov	r1, r7
 	bl	FlashReadPages
-.L1071:
+.L1074:
 	uxth	r3, r10
 	cmp	r7, r3
-	bhi	.L1081
+	bhi	.L1085
 	ldr	r3, [sp]
 	adds	r5, r5, #1
 	uxth	r5, r5
@@ -8180,14 +8193,14 @@ FtlGcScanTempBlk:
 	ldr	r2, [sp]
 	ldr	r3, [sp, #8]
 	cmp	r3, r2
-	ldr	r2, .L1092+4
-	bls	.L1082
-.L1084:
+	ldr	r2, .L1098+4
+	bls	.L1086
+.L1088:
 	ldrh	r3, [r2]
 	cmp	r3, r5
-	bhi	.L1083
-.L1067:
-	ldr	r3, .L1092
+	bhi	.L1087
+.L1070:
+	ldr	r3, .L1098
 	movw	r2, #65535
 	strh	r5, [r4, #2]	@ movhi
 	mov	r1, r5
@@ -8196,13 +8209,13 @@ FtlGcScanTempBlk:
 	movs	r2, #0
 	strb	r2, [r4, #6]
 	bl	ftl_sb_update_avl_pages
-	b	.L1085
-.L1070:
+	b	.L1089
+.L1073:
 	ldr	r1, [sp, #4]
 	ldrh	r3, [r1], #2
 	cmp	r3, lr
 	str	r1, [sp, #4]
-	beq	.L1069
+	beq	.L1072
 	mla	r1, r8, r7, r0
 	ldr	r6, [sp, #12]
 	orr	r3, r5, r3, lsl #10
@@ -8219,10 +8232,10 @@ FtlGcScanTempBlk:
 	bic	r3, r3, #3
 	add	r3, r3, r6
 	str	r3, [r1, #12]
-.L1069:
+.L1072:
 	adds	r2, r2, #1
-	b	.L1068
-.L1081:
+	b	.L1071
+.L1085:
 	movs	r3, #20
 	ldr	r1, [fp]
 	mul	r3, r3, r10
@@ -8230,110 +8243,105 @@ FtlGcScanTempBlk:
 	ldr	r6, [r1, r3]
 	ldr	r0, [r2, #4]
 	str	r0, [sp, #4]
-	cmp	r6, #0
-	bne	.L1072
+	cbnz	r6, .L1075
 	ldr	r8, [r2, #12]
-	movw	r1, #65535
-	ldrh	r2, [r8]
-	cmp	r2, r1
-	bne	.L1073
-	ldr	r3, .L1092+28
-	ldrh	r1, [r4]
-	str	r2, [sp, #4]
+	movw	r2, #65535
+	ldrh	r1, [r8]
+	cmp	r1, r2
+	bne	.L1076
+.L1075:
+	ldr	r3, .L1098+28
+	movs	r1, #0
+	ldrh	r2, [r4]
+	movs	r5, #0
 	ldr	r3, [r3]
-	strh	r6, [r3, r1, lsl #1]	@ movhi
+	strh	r1, [r3, r2, lsl #1]	@ movhi
 	ldrh	r0, [r4]
 	bl	INSERT_FREE_LIST
-	ldr	r2, [sp, #4]
-	strh	r2, [r4]	@ movhi
-.L1091:
+	movw	r3, #65535
+	strh	r3, [r4]	@ movhi
 	bl	FtlGcPageVarInit
-	movs	r5, #0
-	b	.L1066
-.L1073:
+	b	.L1069
+.L1076:
+	str	r3, [sp, #12]
+	ldr	r3, .L1098+32
+	ldr	r0, [r8, #8]
+	ldr	r2, [r3]
+	cmp	r0, r2
+	bhi	.L1075
 	mov	r2, r6
 	add	r1, sp, #24
-	ldr	r0, [r8, #8]
-	str	r3, [sp, #12]
 	bl	log2phys
 	ldr	r2, [r8, #12]
 	ldr	r1, [sp, #24]
 	ldr	r3, [sp, #12]
 	cmp	r2, r1
-	beq	.L1075
-.L1079:
+	beq	.L1079
+.L1080:
 	ldr	r2, [r8, #8]
 	add	r10, r10, #1
 	ldr	r1, [sp, #4]
 	ldr	r0, [r8, #12]
 	bl	FtlGcUpdatePage
-	b	.L1071
-.L1075:
+	b	.L1074
+.L1079:
 	str	r3, [sp, #12]
+	adds	r3, r2, #1
+	beq	.L1080
+	str	r2, [sp, #32]
 	movs	r1, #1
-	ldr	r3, .L1092+32
+	ldr	r2, .L1098+36
 	add	r0, sp, #28
-	str	r2, [sp, #32]
-	ldr	r2, [r3]
+	ldr	r2, [r2]
 	str	r2, [sp, #36]
-	ldr	r2, .L1092+36
+	ldr	r2, .L1098+40
 	ldr	r2, [r2]
 	str	r2, [sp, #40]
 	mov	r2, r6
 	bl	FlashReadPages
-	ldr	r2, .L1092+40
+	ldr	r2, .L1098+44
 	ldr	r1, [fp]
 	ldr	r3, [sp, #12]
 	ldrh	r2, [r2]
 	ldr	r0, [sp, #36]
 	add	ip, r3, r1
 	lsls	r2, r2, #7
-.L1076:
+.L1081:
 	cmp	r6, r2
-	beq	.L1079
+	beq	.L1080
 	ldr	r1, [ip, #8]
 	ldr	r3, [r0, r6, lsl #2]
 	ldr	r1, [r1, r6, lsl #2]
 	cmp	r1, r3
-	beq	.L1077
+	beq	.L1082
 	ldr	r2, [sp, #32]
 	ldrh	r1, [r4]
-	ldr	r0, .L1092+44
+	ldr	r0, .L1098+48
 	bl	printf
-.L1072:
-	ldr	r3, .L1092+28
-	movs	r1, #0
-	ldrh	r2, [r4]
-	ldr	r3, [r3]
-	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldrh	r0, [r4]
-	bl	INSERT_FREE_LIST
-	movw	r3, #65535
-	strh	r3, [r4]	@ movhi
-	b	.L1091
-.L1077:
-	adds	r6, r6, #1
-	b	.L1076
+	b	.L1075
 .L1082:
-	ldr	r1, .L1092
+	adds	r6, r6, #1
+	b	.L1081
+.L1086:
+	ldr	r1, .L1098
 	movw	r0, #65535
 	ldrh	r3, [r1]
 	cmp	r3, r0
-	beq	.L1084
+	beq	.L1088
 	ldr	r0, [sp]
 	add	r3, r3, r0
 	strh	r3, [r1]	@ movhi
 	ldrh	r3, [r2]
 	cmp	r3, r5
-	bls	.L1084
-.L1085:
+	bls	.L1088
+.L1089:
 	mov	r0, #-1
 	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1093:
+.L1099:
 	.align	2
-.L1092:
+.L1098:
 	.word	.LANCHOR162
 	.word	.LANCHOR19
 	.word	.LANCHOR3
@@ -8342,6 +8350,7 @@ FtlGcScanTempBlk:
 	.word	.LANCHOR92
 	.word	.LANCHOR24
 	.word	.LANCHOR42
+	.word	.LANCHOR61
 	.word	.LANCHOR119
 	.word	.LANCHOR124
 	.word	.LANCHOR12
@@ -8359,24 +8368,24 @@ FtlGcScanTempBlk:
 FtlReadRefresh:
 	@ args = 0, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1107
+	ldr	r3, .L1113
 	push	{r4, r5, r6, lr}
 	sub	sp, sp, #88
 	mov	r4, r3
 	ldr	r0, [r3, #80]
 	cmp	r0, #0
-	beq	.L1095
-	ldr	r6, .L1107+4
+	beq	.L1101
+	ldr	r6, .L1113+4
 	ldr	r0, [r3, #84]
 	ldr	r1, [r6]
 	cmp	r0, r1
-	bcs	.L1096
+	bcs	.L1102
 	mov	r5, #2048
-.L1101:
+.L1107:
 	ldr	r0, [r4, #84]
 	ldr	r3, [r6]
 	cmp	r0, r3
-	bcs	.L1098
+	bcs	.L1104
 	movs	r2, #0
 	mov	r1, sp
 	bl	log2phys
@@ -8385,10 +8394,10 @@ FtlReadRefresh:
 	adds	r1, r2, #1
 	add	r3, r3, #1
 	str	r3, [r4, #84]
-	beq	.L1099
+	beq	.L1105
 	str	r3, [sp, #20]
 	add	r0, sp, #88
-	ldr	r3, .L1107+8
+	ldr	r3, .L1113+8
 	movs	r1, #1
 	str	r2, [sp, #8]
 	movs	r2, #0
@@ -8400,58 +8409,58 @@ FtlReadRefresh:
 	bl	FlashReadPages
 	ldr	r3, [sp, #4]
 	cmp	r3, #256
-	bne	.L1098
+	bne	.L1104
 	ldr	r0, [sp]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-.L1098:
+.L1104:
 	mov	r0, #-1
-.L1094:
+.L1100:
 	add	sp, sp, #88
 	@ sp needed
 	pop	{r4, r5, r6, pc}
-.L1099:
+.L1105:
 	subs	r5, r5, #1
-	bne	.L1101
-	b	.L1098
-.L1096:
-	ldr	r2, .L1107+12
+	bne	.L1107
+	b	.L1104
+.L1102:
+	ldr	r2, .L1113+12
 	movs	r0, #0
 	str	r0, [r3, #80]
 	str	r0, [r3, #84]
 	ldr	r2, [r2]
 	str	r2, [r3, #76]
-	b	.L1094
-.L1095:
+	b	.L1100
+.L1101:
 	ldr	r1, [r3, #76]
-	ldr	r3, .L1107+12
+	ldr	r3, .L1113+12
 	ldr	r5, [r3]
 	add	r3, r5, #1048576
 	cmp	r1, r3
-	bhi	.L1104
-	ldr	r3, .L1107+16
+	bhi	.L1110
+	ldr	r3, .L1113+16
 	ldr	r2, [r3]
 	mov	r3, #33554432
 	lsrs	r2, r2, #10
 	asrs	r3, r3, r2
 	add	r3, r3, r1
 	cmp	r5, r3
-	bhi	.L1104
-	ldr	r3, .L1107+20
+	bhi	.L1110
+	ldr	r3, .L1113+20
 	ldrb	r3, [r3, #28]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1094
-.L1104:
+	bne	.L1100
+.L1110:
 	movs	r3, #1
 	movs	r0, #0
 	str	r3, [r4, #80]
 	str	r0, [r4, #84]
 	str	r5, [r4, #76]
-	b	.L1094
-.L1108:
+	b	.L1100
+.L1114:
 	.align	2
-.L1107:
+.L1113:
 	.word	.LANCHOR81
 	.word	.LANCHOR61
 	.word	.LANCHOR121
@@ -8473,44 +8482,44 @@ FtlMapBlkWriteDump_data:
 	ldr	r3, [r0, #36]
 	push	{r4, r5, r6, lr}
 	mov	r6, r0
-	cbz	r3, .L1109
+	cbz	r3, .L1115
 	ldrh	r5, [r0, #6]
 	movs	r3, #0
 	ldr	r2, [r0, #24]
 	str	r3, [r0, #36]
 	subs	r5, r5, #1
-	ldr	r3, .L1113
-	ldr	r1, .L1113+4
+	ldr	r3, .L1119
+	ldr	r1, .L1119+4
 	uxth	r5, r5
-	ldr	r4, .L1113+8
+	ldr	r4, .L1119+8
 	ldr	r2, [r2, r5, lsl #2]
 	ldr	r0, [r3]
 	ldr	r1, [r1]
 	str	r2, [r4, #4]
 	str	r0, [r4, #8]
 	str	r1, [r4, #12]
-	cbz	r2, .L1111
+	cbz	r2, .L1117
 	movs	r2, #1
 	mov	r0, r4
 	mov	r1, r2
 	bl	FlashReadPages
-.L1112:
+.L1118:
 	ldr	r2, [r4, #8]
 	mov	r1, r5
 	mov	r0, r6
 	pop	{r4, r5, r6, lr}
 	b	FtlMapWritePage
-.L1111:
-	ldr	r3, .L1113+12
+.L1117:
+	ldr	r3, .L1119+12
 	movs	r1, #255
 	ldrh	r2, [r3]
 	bl	ftl_memset
-	b	.L1112
-.L1109:
+	b	.L1118
+.L1115:
 	pop	{r4, r5, r6, pc}
-.L1114:
+.L1120:
 	.align	2
-.L1113:
+.L1119:
 	.word	.LANCHOR116
 	.word	.LANCHOR123
 	.word	.LANCHOR148
@@ -8531,8 +8540,8 @@ FlashTestBlk:
 	push	{r4, r5, lr}
 	mov	r4, r0
 	sub	sp, sp, #92
-	bls	.L1117
-	ldr	r5, .L1118
+	bls	.L1123
+	ldr	r5, .L1124
 	add	r0, sp, #24
 	movs	r2, #32
 	movs	r1, #165
@@ -8564,17 +8573,17 @@ FlashTestBlk:
 	movne	r4, #1
 	negs	r4, r4
 	bl	FlashEraseBlocks
-.L1115:
+.L1121:
 	mov	r0, r4
 	add	sp, sp, #92
 	@ sp needed
 	pop	{r4, r5, pc}
-.L1117:
+.L1123:
 	movs	r4, #0
-	b	.L1115
-.L1119:
+	b	.L1121
+.L1125:
 	.align	2
-.L1118:
+.L1124:
 	.word	.LANCHOR121
 	.size	FlashTestBlk, .-FlashTestBlk
 	.section	.text.FtlBbmTblFlush,"ax",%progbits
@@ -8590,28 +8599,28 @@ FtlBbmTblFlush:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r7, .L1129
+	ldr	r7, .L1135
 	movs	r1, #0
-	ldr	r5, .L1129+4
+	ldr	r5, .L1135+4
 	ldr	r3, [r7]
 	mov	fp, r7
-	ldr	r8, .L1129+48
-	ldr	r6, .L1129+8
+	ldr	r8, .L1135+48
+	ldr	r6, .L1135+8
 	str	r3, [r5, #12]
-	ldr	r7, .L1129+12
-	ldr	r3, .L1129+16
-	ldr	r10, .L1129+52
+	ldr	r7, .L1135+12
+	ldr	r3, .L1135+16
+	ldr	r10, .L1135+52
 	ldr	r0, [r8]
 	ldrh	r2, [r3]
 	str	r0, [r5, #8]
 	bl	ftl_memset
-.L1121:
+.L1127:
 	ldrh	r3, [r7]
 	cmp	r4, r3
-	blt	.L1122
+	blt	.L1128
 	ldr	r6, [r5, #12]
 	movs	r2, #16
-	ldr	r4, .L1129+20
+	ldr	r4, .L1135+20
 	movs	r1, #255
 	movs	r7, #0
 	mov	r0, r6
@@ -8628,10 +8637,10 @@ FtlBbmTblFlush:
 	strh	r3, [r6, #8]	@ movhi
 	ldrh	r3, [r4, #6]
 	strh	r3, [r6, #10]	@ movhi
-	ldr	r3, .L1129+24
+	ldr	r3, .L1135+24
 	ldr	r3, [r3]
 	strh	r3, [r6, #12]	@ movhi
-.L1123:
+.L1129:
 	ldr	r3, [r8]
 	ldrh	r2, [r4, #2]
 	ldrh	r1, [r4]
@@ -8645,14 +8654,14 @@ FtlBbmTblFlush:
 	str	r3, [r5, #4]
 	ldrh	r3, [r4, #4]
 	str	r0, [sp]
-	ldr	r0, .L1129+28
+	ldr	r0, .L1135+28
 	bl	printf
-	ldr	r3, .L1129+32
+	ldr	r3, .L1135+32
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1124
+	blt	.L1130
 	ldr	r3, [r4, #8]
 	mov	r1, #0	@ movhi
 	ldrh	r2, [r4]
@@ -8663,7 +8672,7 @@ FtlBbmTblFlush:
 	strh	r2, [r6, #8]	@ movhi
 	ldrh	r3, [r4, #4]
 	strh	r2, [r4, #4]	@ movhi
-	ldr	r2, .L1129+36
+	ldr	r2, .L1135+36
 	strh	r3, [r4]	@ movhi
 	lsls	r3, r3, #10
 	ldr	r0, [r2]
@@ -8672,9 +8681,9 @@ FtlBbmTblFlush:
 	mov	r1, r2
 	str	r3, [r0, #4]
 	bl	FlashEraseBlocks
-.L1124:
+.L1130:
 	movs	r3, #1
-	ldr	r0, .L1129+4
+	ldr	r0, .L1135+4
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
@@ -8683,21 +8692,21 @@ FtlBbmTblFlush:
 	strh	r3, [r10, #2]	@ movhi
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	bne	.L1125
+	bne	.L1131
 	adds	r7, r7, #1
 	ldr	r1, [r5, #4]
 	uxth	r7, r7
-	ldr	r0, .L1129+40
+	ldr	r0, .L1135+40
 	bl	printf
 	cmp	r7, #3
-	bls	.L1123
+	bls	.L1129
 	mov	r2, r7
 	ldr	r1, [r5, #4]
-	ldr	r0, .L1129+44
+	ldr	r0, .L1135+44
 	bl	printf
-.L1127:
-	b	.L1127
-.L1122:
+.L1133:
+	b	.L1133
+.L1128:
 	ldrh	r2, [r10]
 	ldr	r3, [r5, #8]
 	ldr	r1, [r6, #4]!
@@ -8706,22 +8715,22 @@ FtlBbmTblFlush:
 	adds	r4, r4, #1
 	add	r0, r3, r0, lsl #2
 	bl	ftl_memcpy
-	b	.L1121
-.L1128:
+	b	.L1127
+.L1134:
 	movs	r3, #1
 	str	r3, [sp, #12]
-	b	.L1123
-.L1125:
+	b	.L1129
+.L1131:
 	ldr	r3, [sp, #12]
 	cmp	r3, #0
-	beq	.L1128
+	beq	.L1134
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1130:
+.L1136:
 	.align	2
-.L1129:
+.L1135:
 	.word	.LANCHOR123
 	.word	.LANCHOR148
 	.word	.LANCHOR37+24
@@ -8750,26 +8759,26 @@ allocate_data_superblock:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-.L1132:
-	ldr	r3, .L1171
-	ldr	r8, .L1171+68
+.L1138:
+	ldr	r3, .L1177
+	ldr	r8, .L1177+68
 	ldrh	r3, [r3]
-	ldr	r10, .L1171+72
+	ldr	r10, .L1177+72
 	ldrh	r2, [r8]
 	add	r3, r3, r2
 	ldrh	r2, [r10]
 	cmp	r3, r2
-	ble	.L1133
+	ble	.L1139
 	movw	r2, #2615
-	ldr	r1, .L1171+4
-	ldr	r0, .L1171+8
+	ldr	r1, .L1177+4
+	ldr	r0, .L1177+8
 	bl	printf
-.L1133:
-	ldr	r3, .L1171+12
+.L1139:
+	ldr	r3, .L1177+12
 	cmp	r4, r3
-	bne	.L1159
-	ldr	r3, .L1171
-	ldr	r2, .L1171+16
+	bne	.L1165
+	ldr	r3, .L1177
+	ldr	r2, .L1177+16
 	ldrh	r3, [r3]
 	ldr	r2, [r2]
 	lsrs	r1, r3, #1
@@ -8777,118 +8786,118 @@ allocate_data_superblock:
 	adds	r1, r1, #1
 	add	r1, r1, r2, lsr #2
 	uxth	r1, r1
-	cbz	r1, .L1134
+	cbz	r1, .L1140
 	subs	r1, r1, #1
 	uxth	r1, r1
-.L1134:
-	ldr	r0, .L1171+20
+.L1140:
+	ldr	r0, .L1177+20
 	bl	List_pop_index_node
-	ldr	r3, .L1171
+	ldr	r3, .L1177
 	mov	r5, r0
 	uxth	r7, r0
 	ldrh	r3, [r3]
-	cbnz	r3, .L1135
+	cbnz	r3, .L1141
 	mov	r2, #2624
-	ldr	r1, .L1171+4
-	ldr	r0, .L1171+8
+	ldr	r1, .L1177+4
+	ldr	r0, .L1177+8
 	bl	printf
-.L1135:
-	ldr	r3, .L1171
-	ldr	r2, .L1171
+.L1141:
+	ldr	r3, .L1177
+	ldr	r2, .L1177
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	strh	r3, [r2]	@ movhi
 	ldrh	r3, [r10]
 	cmp	r3, r7
-	bls	.L1132
+	bls	.L1138
 	uxth	r5, r5
 	lsls	r3, r5, #1
 	str	r3, [sp]
-	ldr	r3, .L1171+24
+	ldr	r3, .L1177+24
 	ldr	r3, [r3]
 	ldrh	r6, [r3, r5, lsl #1]
 	cmp	r6, #0
-	bne	.L1132
+	bne	.L1138
 	strh	r7, [r4]	@ movhi
 	mov	r0, r4
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1137
-	ldr	r3, .L1171+24
+	cbnz	r3, .L1143
+	ldr	r3, .L1177+24
 	movw	r2, #65535
 	mov	r0, r7
 	ldr	r3, [r3]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
 	bl	INSERT_DATA_LIST
-	ldr	r3, .L1171
+	ldr	r3, .L1177
 	ldrh	r2, [r8]
 	ldrh	r3, [r3]
 	add	r3, r3, r2
 	ldrh	r2, [r10]
 	cmp	r3, r2
-	ble	.L1132
+	ble	.L1138
 	movw	r2, #2638
-	ldr	r1, .L1171+4
-	ldr	r0, .L1171+8
+	ldr	r1, .L1177+4
+	ldr	r0, .L1177+8
 	bl	printf
-	b	.L1132
-.L1159:
+	b	.L1138
+.L1165:
 	movs	r1, #0
-	b	.L1134
-.L1137:
-	ldr	r3, .L1171
+	b	.L1140
+.L1143:
+	ldr	r3, .L1177
 	ldrh	r2, [r8]
 	ldrh	r3, [r3]
 	add	r3, r3, r2
 	ldrh	r2, [r10]
 	cmp	r3, r2
-	ble	.L1139
+	ble	.L1145
 	movw	r2, #2641
-	ldr	r1, .L1171+4
-	ldr	r0, .L1171+8
+	ldr	r1, .L1177+4
+	ldr	r0, .L1177+8
 	bl	printf
-.L1139:
-	ldr	r3, .L1171+28
+.L1145:
+	ldr	r3, .L1177+28
 	add	lr, r4, #16
-	ldr	r2, .L1171+32
+	ldr	r2, .L1177+32
 	mov	r8, #0
 	ldr	ip, [r3]
 	ldrh	r0, [r2]
 	movs	r2, #20
 	mov	r3, ip
 	mla	r0, r2, r0, ip
-.L1140:
+.L1146:
 	cmp	r0, r3
-	bne	.L1142
-	cbnz	r6, .L1143
+	bne	.L1148
+	cbnz	r6, .L1149
 	movw	r2, #2652
-	ldr	r1, .L1171+4
-	ldr	r0, .L1171+8
+	ldr	r1, .L1177+4
+	ldr	r0, .L1177+8
 	bl	printf
-.L1143:
-	ldr	r3, .L1171+36
+.L1149:
+	ldr	r3, .L1177+36
 	ldrh	r3, [r3]
 	cmp	r3, r7
-	bne	.L1144
+	bne	.L1150
 	movw	r2, #2654
-	ldr	r1, .L1171+4
-	ldr	r0, .L1171+8
+	ldr	r1, .L1177+4
+	ldr	r0, .L1177+8
 	bl	printf
-.L1144:
+.L1150:
 	ldrb	r2, [r4, #8]	@ zero_extendqisi2
-	ldr	r3, .L1171+40
-	ldr	fp, .L1171+76
-	ldr	r8, .L1171+80
+	ldr	r3, .L1177+40
+	ldr	fp, .L1177+76
+	ldr	r8, .L1177+80
 	ldr	r1, [r3]
 	cmp	r2, #0
-	bne	.L1145
+	bne	.L1151
 	ldrh	r2, [r1, r5, lsl #1]
 	cmp	r2, #0
-	beq	.L1146
-	ldr	r0, .L1171+44
+	beq	.L1152
+	ldr	r0, .L1177+44
 	ldrh	r0, [r0]
 	add	r2, r2, r0
-.L1169:
+.L1175:
 	strh	r2, [r1, r5, lsl #1]	@ movhi
 	mov	r0, r7
 	ldr	r2, [fp]
@@ -8897,83 +8906,83 @@ allocate_data_superblock:
 	adds	r2, r2, #1
 	str	r2, [fp]
 	bl	ftl_set_blk_mode
-.L1170:
+.L1176:
 	ldr	r3, [sp, #4]
 	ldr	r0, [fp]
 	ldr	r3, [r3]
 	ldrh	r1, [r3, r5, lsl #1]
-	ldr	r3, .L1171+48
+	ldr	r3, .L1177+48
 	ldr	r2, [r3]
 	cmp	r1, r2
 	it	hi
 	strhi	r1, [r3]
-	ldr	r3, .L1171+44
+	ldr	r3, .L1177+44
 	ldrh	r1, [r10]
 	ldrh	r2, [r3]
 	ldr	r3, [r8]
 	mla	r0, r0, r2, r3
 	bl	__aeabi_uidiv
-	ldr	r3, .L1171+52
-	ldr	ip, .L1171+84
+	ldr	r3, .L1177+52
+	ldr	ip, .L1177+84
 	str	r0, [r3]
-	ldr	r3, .L1171+56
+	ldr	r3, .L1177+56
 	ldr	r2, [r3]
 	ldr	r3, [r2, #16]
 	adds	r3, r3, #1
 	str	r3, [r2, #16]
 	movs	r2, #20
-	ldr	r3, .L1171+28
+	ldr	r3, .L1177+28
 	ldr	r0, [r3]
 	adds	r3, r0, #4
 	mla	r2, r2, r6, r0
 	adds	r2, r2, #24
-.L1150:
+.L1156:
 	adds	r3, r3, #20
 	cmp	r2, r3
-	bne	.L1151
+	bne	.L1157
 	mov	r2, r6
 	ldrb	r1, [r4, #8]	@ zero_extendqisi2
 	mov	r8, #0
 	bl	FlashEraseBlocks
 	mov	r10, r8
 	movs	r3, #20
-.L1152:
+.L1158:
 	uxth	r2, r8
 	cmp	r6, r2
-	bhi	.L1154
+	bhi	.L1160
 	cmp	r10, #0
-	beq	.L1155
+	beq	.L1161
 	mov	r0, r7
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L1155:
+.L1161:
 	ldrb	r2, [r4, #7]	@ zero_extendqisi2
 	cmp	r2, #0
-	bne	.L1156
-	ldr	r3, .L1171+24
+	bne	.L1162
+	ldr	r3, .L1177+24
 	movw	r2, #65535
 	ldr	r3, [r3]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
-	b	.L1132
-.L1142:
+	b	.L1138
+.L1148:
 	ldrh	r1, [lr], #2
 	movw	fp, #65535
 	str	r8, [r3, #8]
 	str	r8, [r3, #12]
 	cmp	r1, fp
-	beq	.L1141
+	beq	.L1147
 	mla	fp, r2, r6, ip
 	adds	r6, r6, #1
 	lsls	r1, r1, #10
 	uxth	r6, r6
 	str	r1, [fp, #4]
-.L1141:
+.L1147:
 	adds	r3, r3, #20
-	b	.L1140
-.L1146:
+	b	.L1146
+.L1152:
 	movs	r2, #2
-	b	.L1169
-.L1145:
+	b	.L1175
+.L1151:
 	ldrh	r2, [r1, r5, lsl #1]
 	mov	r0, r7
 	str	r3, [sp, #4]
@@ -8983,20 +8992,20 @@ allocate_data_superblock:
 	adds	r2, r2, #1
 	str	r2, [r8]
 	bl	ftl_set_blk_mode.part.6
-	b	.L1170
-.L1151:
+	b	.L1176
+.L1157:
 	ldr	r1, [r3, #-20]
 	and	r1, r1, ip
 	str	r1, [r3, #-20]
-	b	.L1150
-.L1154:
-	ldr	r1, .L1171+28
+	b	.L1156
+.L1160:
+	ldr	r1, .L1177+28
 	mul	r2, r3, r8
 	ldr	r1, [r1]
 	ldr	fp, [r1, r2]
 	adds	r0, r1, r2
 	cmp	fp, #-1
-	bne	.L1153
+	bne	.L1159
 	ldr	r0, [r0, #4]
 	add	r10, r10, #1
 	str	r3, [sp, #4]
@@ -9008,12 +9017,12 @@ allocate_data_superblock:
 	ldrb	r2, [r4, #7]	@ zero_extendqisi2
 	subs	r2, r2, #1
 	strb	r2, [r4, #7]
-.L1153:
+.L1159:
 	add	r8, r8, #1
-	b	.L1152
-.L1156:
-	ldr	r3, .L1171+60
-	ldr	r1, .L1171+64
+	b	.L1158
+.L1162:
+	ldr	r3, .L1177+60
+	ldr	r1, .L1177+64
 	ldrh	r3, [r3]
 	strh	r7, [r4]	@ movhi
 	smulbb	r3, r3, r2
@@ -9026,27 +9035,27 @@ allocate_data_superblock:
 	str	r2, [r4, #12]
 	adds	r2, r2, #1
 	str	r2, [r1]
-	ldr	r2, .L1171+24
+	ldr	r2, .L1177+24
 	ldr	r1, [sp]
 	ldr	r2, [r2]
 	strh	r3, [r2, r1]	@ movhi
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L1157
+	cbz	r3, .L1163
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1158
-.L1157:
+	cbnz	r3, .L1164
+.L1163:
 	movw	r2, #2707
-	ldr	r1, .L1171+4
-	ldr	r0, .L1171+8
+	ldr	r1, .L1177+4
+	ldr	r0, .L1177+8
 	bl	printf
-.L1158:
+.L1164:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1172:
+.L1178:
 	.align	2
-.L1171:
+.L1177:
 	.word	.LANCHOR48
 	.word	.LANCHOR163
 	.word	.LC1
@@ -9083,44 +9092,44 @@ FtlGcFreeBadSuperBlk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, r0
-	ldr	r4, .L1185
+	ldr	r4, .L1191
 	ldrh	r3, [r4]
-	cbz	r3, .L1174
-	ldr	r8, .L1185+16
+	cbz	r3, .L1180
+	ldr	r8, .L1191+16
 	movs	r6, #0
-.L1175:
-	ldr	r3, .L1185+4
+.L1181:
+	ldr	r3, .L1191+4
 	ldrh	r2, [r3]
 	uxth	r3, r6
 	cmp	r2, r3
-	bhi	.L1181
+	bhi	.L1187
 	bl	FtlGcReFreshBadBlk
-.L1174:
+.L1180:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1181:
-	ldr	r2, .L1185+8
+.L1187:
+	ldr	r2, .L1191+8
 	uxth	r3, r6
 	mov	r1, r10
 	movs	r7, #0
 	ldrb	r0, [r2, r3]	@ zero_extendqisi2
 	bl	V2P_block
-	ldr	r2, .L1185+12
+	ldr	r2, .L1191+12
 	mov	fp, r0
-.L1176:
+.L1182:
 	ldrh	r3, [r4]
 	uxth	r5, r7
 	cmp	r3, r5
-	bhi	.L1180
+	bhi	.L1186
 	adds	r6, r6, #1
-	b	.L1175
-.L1180:
+	b	.L1181
+.L1186:
 	uxth	r3, r7
 	ldrh	r1, [r8, r3, lsl #1]
 	cmp	r1, fp
-	bne	.L1177
+	bne	.L1183
 	mov	r1, fp
 	mov	r0, r2
 	str	r3, [sp, #4]
@@ -9133,23 +9142,23 @@ FtlGcFreeBadSuperBlk:
 	ldrh	r1, [r4]
 	ldr	r2, [sp]
 	add	r3, r8, r3, lsl #1
-.L1178:
+.L1184:
 	cmp	r5, r1
-	bcc	.L1179
+	bcc	.L1185
 	subs	r1, r1, #1
 	strh	r1, [r4]	@ movhi
-.L1177:
+.L1183:
 	adds	r7, r7, #1
-	b	.L1176
-.L1179:
+	b	.L1182
+.L1185:
 	ldrh	r0, [r3, #2]!
 	adds	r5, r5, #1
 	uxth	r5, r5
 	strh	r0, [r3, #-2]	@ movhi
-	b	.L1178
-.L1186:
+	b	.L1184
+.L1192:
 	.align	2
-.L1185:
+.L1191:
 	.word	.LANCHOR101
 	.word	.LANCHOR3
 	.word	.LANCHOR13
@@ -9169,29 +9178,29 @@ update_vpc_list:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	mov	r4, r0
-	ldr	r3, .L1197
+	ldr	r3, .L1203
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	bne	.L1188
-	ldr	r2, .L1197+4
+	bne	.L1194
+	ldr	r2, .L1203+4
 	ldrh	r1, [r2]
 	cmp	r1, r0
-	bne	.L1189
+	bne	.L1195
 	movw	r3, #65535
 	strh	r3, [r2]	@ movhi
-.L1190:
-	ldr	r5, .L1197+8
+.L1196:
+	ldr	r5, .L1203+8
 	mov	r1, r4
-	ldr	r0, .L1197+12
+	ldr	r0, .L1203+12
 	bl	List_remove_node
 	ldrh	r3, [r5]
-	cbnz	r3, .L1192
+	cbnz	r3, .L1198
 	movw	r2, #2777
-	ldr	r1, .L1197+16
-	ldr	r0, .L1197+20
+	ldr	r1, .L1203+16
+	ldr	r0, .L1203+20
 	bl	printf
-.L1192:
+.L1198:
 	ldrh	r3, [r5]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -9199,44 +9208,44 @@ update_vpc_list:
 	bl	free_data_superblock
 	mov	r0, r4
 	bl	FtlGcFreeBadSuperBlk
-	ldr	r3, .L1197+24
+	ldr	r3, .L1203+24
 	ldrh	r2, [r5]
 	ldrh	r3, [r3]
 	add	r3, r3, r2
-	ldr	r2, .L1197+28
+	ldr	r2, .L1203+28
 	ldrh	r2, [r2]
 	cmp	r3, r2
-	ble	.L1196
+	ble	.L1202
 	movw	r2, #2780
-	ldr	r1, .L1197+16
-	ldr	r0, .L1197+20
+	ldr	r1, .L1203+16
+	ldr	r0, .L1203+20
 	bl	printf
-.L1196:
+.L1202:
 	movs	r3, #1
-	b	.L1187
-.L1189:
-	ldr	r2, .L1197+32
+	b	.L1193
+.L1195:
+	ldr	r2, .L1203+32
 	ldrh	r2, [r2]
 	cmp	r2, r0
-	beq	.L1187
-	ldr	r2, .L1197+36
+	beq	.L1193
+	ldr	r2, .L1203+36
 	ldrh	r2, [r2]
 	cmp	r2, r0
-	beq	.L1187
-	ldr	r2, .L1197+40
+	beq	.L1193
+	ldr	r2, .L1203+40
 	ldrh	r2, [r2]
 	cmp	r2, r0
-	bne	.L1190
-.L1187:
+	bne	.L1196
+.L1193:
 	mov	r0, r3
 	pop	{r3, r4, r5, pc}
-.L1188:
+.L1194:
 	bl	List_update_data_list
 	movs	r3, #0
-	b	.L1187
-.L1198:
+	b	.L1193
+.L1204:
 	.align	2
-.L1197:
+.L1203:
 	.word	.LANCHOR42
 	.word	.LANCHOR80
 	.word	.LANCHOR45
@@ -9264,47 +9273,47 @@ decrement_vpc_count:
 	push	{r4, r5, r6, lr}
 	cmp	r0, r3
 	mov	r4, r0
-	beq	.L1200
-	ldr	r5, .L1208
+	beq	.L1206
+	ldr	r5, .L1214
 	ldr	r3, [r5]
 	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L1201
+	cbnz	r2, .L1207
 	mov	r1, r0
-	ldr	r0, .L1208+4
+	ldr	r0, .L1214+4
 	bl	printf
 	ldr	r3, [r5]
 	ldrh	r5, [r3, r4, lsl #1]
-	cbz	r5, .L1202
-.L1206:
+	cbz	r5, .L1208
+.L1212:
 	movs	r5, #0
-.L1199:
+.L1205:
 	mov	r0, r5
 	pop	{r4, r5, r6, pc}
-.L1202:
+.L1208:
 	movw	r2, #2795
-.L1207:
-	ldr	r1, .L1208+8
-	ldr	r0, .L1208+12
+.L1213:
+	ldr	r1, .L1214+8
+	ldr	r0, .L1214+12
 	bl	printf
-	b	.L1199
-.L1201:
+	b	.L1205
+.L1207:
 	subs	r2, r2, #1
 	strh	r2, [r3, r0, lsl #1]	@ movhi
-.L1200:
-	ldr	r6, .L1208+16
+.L1206:
+	ldr	r6, .L1214+16
 	movw	r3, #65535
 	ldrh	r0, [r6]
 	cmp	r0, r3
-	bne	.L1204
+	bne	.L1210
 	strh	r4, [r6]	@ movhi
-	b	.L1206
-.L1204:
+	b	.L1212
+.L1210:
 	cmp	r4, r0
-	beq	.L1206
+	beq	.L1212
 	bl	update_vpc_list
-	ldr	r3, .L1208+20
+	ldr	r3, .L1214+20
 	adds	r5, r0, #0
-	ldr	r2, .L1208+24
+	ldr	r2, .L1214+24
 	it	ne
 	movne	r5, #1
 	strh	r4, [r6]	@ movhi
@@ -9312,21 +9321,21 @@ decrement_vpc_count:
 	ldr	r2, [r2]
 	subs	r3, r3, r2
 	asrs	r2, r3, #1
-	ldr	r3, .L1208+28
+	ldr	r3, .L1214+28
 	muls	r3, r2, r3
-	ldr	r2, .L1208
+	ldr	r2, .L1214
 	ldr	r2, [r2]
 	uxth	r1, r3
 	ldrh	r2, [r2, r1, lsl #1]
 	cmp	r2, #0
-	bne	.L1199
+	bne	.L1205
 	cmp	r4, r1
-	beq	.L1199
+	beq	.L1205
 	movw	r2, #2811
-	b	.L1207
-.L1209:
+	b	.L1213
+.L1215:
 	.align	2
-.L1208:
+.L1214:
 	.word	.LANCHOR42
 	.word	.LC105
 	.word	.LANCHOR165
@@ -9353,144 +9362,144 @@ FtlRecoverySuperblock:
 	mov	r8, r0
 	sub	sp, sp, #48
 	cmp	r3, r2
-	beq	.L1338
+	beq	.L1344
 	ldrh	r3, [r0, #2]
 	str	r3, [sp, #4]
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	ldr	r1, [sp, #4]
 	str	r3, [sp, #20]
-	ldr	r3, .L1346
+	ldr	r3, .L1352
 	ldrh	r3, [r3]
 	cmp	r3, r1
 	mov	r3, #0
-	bne	.L1213
+	bne	.L1219
 	strh	r3, [r0, #4]	@ movhi
-.L1344:
+.L1350:
 	strb	r3, [r8, #6]
-.L1338:
+.L1344:
 	movs	r0, #0
 	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1213:
+.L1219:
 	ldrh	r0, [r0, #16]
-.L1214:
+.L1220:
 	cmp	r0, r2
 	uxth	r5, r3
 	add	r3, r3, #1
-	beq	.L1215
+	beq	.L1221
 	movs	r1, #1
 	bl	FtlGetLastWrittenPage
 	mov	r4, r0
 	adds	r0, r0, #1
-	beq	.L1216
-	ldr	r3, .L1346+4
+	beq	.L1222
+	ldr	r3, .L1352+4
 	movs	r2, #0
 	mov	r5, r2
 	movw	fp, #65535
 	mov	r10, #20
 	ldrh	ip, [r3]
-	ldr	r3, .L1346+8
+	ldr	r3, .L1352+8
 	ldr	r0, [r3]
-	ldr	r3, .L1346+12
+	ldr	r3, .L1352+12
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
-	ldr	r3, .L1346+16
+	ldr	r3, .L1352+16
 	ldrh	r7, [r3]
-	ldr	r3, .L1346+20
+	ldr	r3, .L1352+20
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L1346+24
+	ldr	r3, .L1352+24
 	ldrh	lr, [r3]
 	add	r3, r8, #16
 	str	r3, [sp, #16]
 	str	r3, [sp]
-.L1217:
+.L1223:
 	uxth	r3, r2
 	cmp	ip, r3
-	bhi	.L1221
+	bhi	.L1227
 	movs	r2, #0
 	mov	r1, r5
 	bl	FlashReadPages
-	ldr	r2, .L1346+28
+	ldr	r2, .L1352+28
 	uxth	r1, r4
 	movw	fp, #65535
 	str	r1, [sp, #12]
 	ldr	r3, [r2]
 	subs	r3, r3, #1
 	str	r3, [sp]
-	ldr	r3, .L1346+8
+	ldr	r3, .L1352+8
 	ldr	r10, [r3]
 	movs	r3, #0
 	mov	r7, r10
-.L1222:
+.L1228:
 	uxth	r1, r3
 	cmp	r5, r1
-	bhi	.L1227
-	bne	.L1225
+	bhi	.L1233
+	bne	.L1231
 	adds	r3, r4, #1
 	uxth	r3, r3
 	str	r3, [sp, #8]
-.L1339:
+.L1345:
 	ldr	r0, [r10, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_plane
-	ldr	r3, .L1346
+	ldr	r3, .L1352
 	mov	r10, r0
 	ldr	r2, [sp, #8]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bne	.L1229
+	bne	.L1235
 	ldrh	r3, [sp, #8]
 	strh	r3, [r8, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [r8, #6]
 	strh	r3, [r8, #4]	@ movhi
-.L1229:
+.L1235:
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #4]
 	cmp	r3, r2
-	bne	.L1230
+	bne	.L1236
 	ldr	r3, [sp, #20]
 	cmp	r10, r3
-	bne	.L1230
+	bne	.L1236
 	ldr	r1, [sp, #8]
 	mov	r2, r10
-.L1345:
+.L1351:
 	mov	r0, r8
 	bl	ftl_sb_update_avl_pages
-	b	.L1338
-.L1215:
+	b	.L1344
+.L1221:
 	uxth	r1, r3
 	adds	r1, r1, #8
 	ldrh	r0, [r8, r1, lsl #1]
-	b	.L1214
-.L1216:
+	b	.L1220
+.L1222:
 	ldr	r3, [sp, #4]
-	cbz	r3, .L1218
+	cbz	r3, .L1224
 	movw	r2, #1766
-	ldr	r1, .L1346+32
-	ldr	r0, .L1346+36
+	ldr	r1, .L1352+32
+	ldr	r0, .L1352+36
 	bl	printf
-.L1218:
+.L1224:
 	ldr	r3, [sp, #20]
-	cbz	r3, .L1219
+	cbz	r3, .L1225
 	cmp	r5, r3
-	beq	.L1219
+	beq	.L1225
 	movw	r2, #1767
-	ldr	r1, .L1346+32
-	ldr	r0, .L1346+36
+	ldr	r1, .L1352+32
+	ldr	r0, .L1352+36
 	bl	printf
-.L1219:
+.L1225:
 	movs	r3, #0
 	strh	r3, [r8, #2]	@ movhi
-	b	.L1344
-.L1221:
+	b	.L1350
+.L1227:
 	ldr	r1, [sp]
 	ldrh	r3, [r1], #2
 	cmp	r3, fp
 	str	r1, [sp]
-	beq	.L1220
+	beq	.L1226
 	mla	r1, r10, r5, r0
 	ldr	r6, [sp, #8]
 	orr	r3, r4, r3, lsl #10
@@ -9506,53 +9515,53 @@ FtlRecoverySuperblock:
 	bic	r3, r3, #3
 	add	r3, r3, r6
 	str	r3, [r1, #12]
-.L1220:
+.L1226:
 	adds	r2, r2, #1
-	b	.L1217
-.L1227:
+	b	.L1223
+.L1233:
 	ldr	r1, [r7]
-	cbnz	r1, .L1223
+	cbnz	r1, .L1229
 	ldr	r1, [r7, #12]
 	ldr	r6, [r1, #4]
 	str	r1, [sp, #8]
 	adds	r1, r6, #1
-	beq	.L1224
+	beq	.L1230
 	ldr	r1, [r2]
 	mov	r0, r6
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L1224
+	cbz	r0, .L1230
 	adds	r6, r6, #1
 	str	r6, [r2]
-.L1224:
+.L1230:
 	ldr	r1, [sp, #8]
 	ldr	r1, [r1]
 	adds	r1, r1, #1
-	bne	.L1226
-.L1225:
+	bne	.L1232
+.L1231:
 	uxth	r2, r4
 	uxth	r3, r3
 	str	r2, [sp, #8]
 	movs	r2, #20
 	mla	r10, r2, r3, r10
-	b	.L1339
-.L1223:
+	b	.L1345
+.L1229:
 	ldr	fp, [sp, #12]
-.L1226:
+.L1232:
 	adds	r3, r3, #1
 	adds	r7, r7, #20
-	b	.L1222
-.L1230:
+	b	.L1228
+.L1236:
 	movw	r3, #65535
 	cmp	fp, r3
-	bne	.L1231
+	bne	.L1237
 	ldrb	r3, [r8, #8]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1232
-.L1231:
-	ldr	r3, .L1346+40
+	bne	.L1238
+.L1237:
+	ldr	r3, .L1352+40
 	uxth	r6, r4
 	uxth	r4, r4
-	ldr	r7, .L1346+8
+	ldr	r7, .L1352+8
 	ldr	r2, [r3]
 	adds	r2, r2, #1
 	itt	eq
@@ -9565,10 +9574,10 @@ FtlRecoverySuperblock:
 	subgt	r4, r6, #7
 	ldrle	r4, [sp, #4]
 	uxthgt	r4, r4
-.L1235:
+.L1241:
 	cmp	r4, r6
-	bhi	.L1245
-	ldr	r3, .L1346+4
+	bhi	.L1251
+	ldr	r3, .L1352+4
 	movw	lr, #65535
 	ldr	r0, [r7]
 	mov	ip, #20
@@ -9577,47 +9586,47 @@ FtlRecoverySuperblock:
 	str	r3, [sp, #12]
 	movs	r3, #0
 	mov	r5, r3
-	b	.L1246
-.L1237:
+	b	.L1252
+.L1243:
 	ldr	r1, [sp, #12]
 	ldrh	r2, [r1], #2
 	cmp	r2, lr
 	str	r1, [sp, #12]
-	beq	.L1236
+	beq	.L1242
 	mla	r1, ip, r5, r0
 	adds	r5, r5, #1
 	orr	r2, r4, r2, lsl #10
 	uxth	r5, r5
 	str	r2, [r1, #4]
-.L1236:
+.L1242:
 	adds	r3, r3, #1
-.L1246:
+.L1252:
 	uxth	r2, r3
 	cmp	fp, r2
-	bhi	.L1237
+	bhi	.L1243
 	mov	r1, r5
 	movs	r2, #0
 	bl	FlashReadPages
-	ldr	r3, .L1346+40
+	ldr	r3, .L1352+40
 	movs	r1, #20
 	movs	r0, #0
 	movw	ip, #65535
 	ldr	r2, [r3]
 	ldr	r3, [r7]
 	mla	r5, r1, r5, r3
-.L1238:
+.L1244:
 	cmp	r5, r3
-	bne	.L1243
-	cbz	r0, .L1244
-	ldr	r3, .L1346+40
+	bne	.L1249
+	cbz	r0, .L1250
+	ldr	r3, .L1352+40
 	str	r2, [r3]
-.L1244:
+.L1250:
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L1235
-.L1347:
+	b	.L1241
+.L1353:
 	.align	2
-.L1346:
+.L1352:
 	.word	.LANCHOR19
 	.word	.LANCHOR3
 	.word	.LANCHOR112
@@ -9629,22 +9638,22 @@ FtlRecoverySuperblock:
 	.word	.LANCHOR166
 	.word	.LC1
 	.word	.LANCHOR145
-.L1243:
+.L1249:
 	ldr	r1, [r3]
 	cmp	r1, #0
-	beq	.L1239
-	cbz	r0, .L1232
-.L1340:
-	ldr	r3, .L1348
+	beq	.L1245
+	cbz	r0, .L1238
+.L1346:
+	ldr	r3, .L1354
 	str	r2, [r3]
-.L1232:
+.L1238:
 	ldr	fp, [sp, #4]
 	movs	r2, #1
-	ldr	r6, .L1348+4
-	ldr	r3, .L1348+8
+	ldr	r6, .L1354+4
+	ldr	r3, .L1354+8
 	strh	r2, [r3]	@ movhi
-.L1247:
-	ldr	r3, .L1348+12
+.L1253:
+	ldr	r3, .L1354+12
 	movw	lr, #65535
 	ldr	r0, [r6]
 	movs	r7, #20
@@ -9652,64 +9661,64 @@ FtlRecoverySuperblock:
 	ldrh	r4, [r3]
 	movs	r3, #0
 	str	r3, [sp, #12]
-.L1248:
+.L1254:
 	uxth	r2, r3
 	cmp	r4, r2
-	bhi	.L1250
+	bhi	.L1256
 	movs	r2, #0
 	ldr	r1, [sp, #12]
 	bl	FlashReadPages
 	movs	r3, #0
-.L1343:
+.L1349:
 	str	r3, [sp, #24]
 	ldr	r2, [sp, #12]
 	ldrh	r3, [sp, #24]
 	cmp	r2, r3
-	bhi	.L1278
-	ldr	r3, .L1348+16
+	bhi	.L1284
+	ldr	r3, .L1354+16
 	add	fp, fp, #1
 	uxth	fp, fp
 	ldrh	r3, [r3]
 	cmp	r3, fp
-	bne	.L1247
-	ldr	r2, .L1348+12
+	bne	.L1253
+	ldr	r2, .L1354+12
 	movw	r0, #65535
 	movs	r3, #0
 	strh	fp, [r8, #2]	@ movhi
 	strh	r3, [r8, #4]	@ movhi
 	ldrh	r2, [r2]
-.L1279:
+.L1285:
 	uxth	r1, r3
 	cmp	r1, r2
-	bcs	.L1338
+	bcs	.L1344
 	ldr	r1, [sp, #16]
 	ldrh	r4, [r1], #2
 	cmp	r4, r0
 	str	r1, [sp, #16]
 	add	r1, r3, #1
-	bne	.L1344
+	bne	.L1350
 	mov	r3, r1
-	b	.L1279
-.L1239:
+	b	.L1285
+.L1245:
 	ldr	r1, [r3, #12]
 	ldrh	lr, [r1]
 	cmp	lr, ip
-	beq	.L1242
+	beq	.L1248
 	ldr	r1, [r1, #4]
 	cmp	r1, #-1
 	itt	ne
 	movne	r2, r1
 	movne	r0, #1
-.L1242:
+.L1248:
 	adds	r3, r3, #20
-	b	.L1238
-.L1245:
+	b	.L1244
+.L1251:
 	mov	r2, #-1
-	b	.L1340
-.L1250:
+	b	.L1346
+.L1256:
 	ldrh	r2, [r1], #2
 	cmp	r2, lr
-	beq	.L1249
+	beq	.L1255
 	ldr	r5, [sp, #12]
 	orr	r2, fp, r2, lsl #10
 	mla	ip, r7, r5, r0
@@ -9718,10 +9727,10 @@ FtlRecoverySuperblock:
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r2, [sp, #12]
-.L1249:
+.L1255:
 	adds	r3, r3, #1
-	b	.L1248
-.L1278:
+	b	.L1254
+.L1284:
 	ldr	r3, [sp, #24]
 	movs	r5, #20
 	muls	r5, r3, r5
@@ -9734,45 +9743,45 @@ FtlRecoverySuperblock:
 	bl	P2V_plane
 	ldr	r3, [sp, #4]
 	cmp	fp, r3
-	bcc	.L1252
+	bcc	.L1258
 	ldr	r3, [sp, #28]
-	bne	.L1253
+	bne	.L1259
 	ldr	r2, [sp, #20]
 	cmp	r2, r0
-	bhi	.L1252
-.L1253:
+	bhi	.L1258
+.L1259:
 	ldr	r2, [sp, #8]
 	cmp	fp, r2
-	bne	.L1254
+	bne	.L1260
 	cmp	r10, r0
-	beq	.L1255
-.L1254:
+	beq	.L1261
+.L1260:
 	ldr	r3, [r3, r5]
 	adds	r3, r3, #1
-	beq	.L1256
+	beq	.L1262
 	ldr	r3, [r7, #12]
 	movw	r2, #61589
 	ldrh	r1, [r3]
 	cmp	r1, r2
-	beq	.L1257
+	beq	.L1263
 	ldrh	r0, [r8]
-.L1341:
+.L1347:
 	bl	decrement_vpc_count
-	b	.L1252
-.L1257:
+	b	.L1258
+.L1263:
 	ldr	r2, [r3, #4]
 	str	r2, [sp]
 	adds	r2, r2, #1
-	beq	.L1258
-	ldr	r2, .L1348+20
+	beq	.L1264
+	ldr	r2, .L1354+20
 	ldr	r0, [sp]
 	ldr	r1, [r2]
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L1258
+	cbz	r0, .L1264
 	ldr	r1, [sp]
 	adds	r1, r1, #1
 	str	r1, [r2]
-.L1258:
+.L1264:
 	ldr	r4, [r3, #8]
 	add	r1, sp, #40
 	ldr	r3, [r3, #12]
@@ -9780,17 +9789,17 @@ FtlRecoverySuperblock:
 	mov	r0, r4
 	str	r3, [sp, #36]
 	bl	log2phys
-	ldr	r3, .L1348
+	ldr	r3, .L1354
 	ldr	r1, [r3]
 	adds	r3, r1, #1
-	beq	.L1259
+	beq	.L1265
 	ldr	r0, [sp]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1259
+	beq	.L1265
 	ldr	r3, [sp, #36]
 	adds	r7, r3, #1
-	beq	.L1260
+	beq	.L1266
 	ldr	r0, [r6]
 	movs	r2, #0
 	movs	r1, #1
@@ -9802,130 +9811,130 @@ FtlRecoverySuperblock:
 	ldr	r1, [r2, r5]
 	adds	r3, r2, r5
 	adds	r1, r1, #1
-	bne	.L1261
-.L1262:
+	bne	.L1267
+.L1268:
 	mov	r3, #-1
 	str	r3, [sp, #36]
-.L1269:
+.L1275:
 	ldr	r7, [sp, #36]
 	adds	r0, r7, #1
-	beq	.L1252
-.L1282:
+	beq	.L1258
+.L1288:
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L1348+24
+	ldr	r3, .L1354+24
 	mov	r4, r0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bhi	.L1274
+	bhi	.L1280
 	movw	r2, #2019
-	ldr	r1, .L1348+28
-	ldr	r0, .L1348+32
+	ldr	r1, .L1354+28
+	ldr	r0, .L1354+32
 	bl	printf
-.L1274:
-	ldr	r3, .L1348+36
+.L1280:
+	ldr	r3, .L1354+36
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
 	cmp	r3, #0
-	beq	.L1275
+	beq	.L1281
 	mov	r0, r4
-	b	.L1341
-.L1260:
+	b	.L1347
+.L1266:
 	ldr	r3, [sp, #44]
 	ldr	r2, [sp, #40]
 	cmp	r2, r3
-	bne	.L1252
+	bne	.L1258
 	movs	r2, #1
 	add	r1, sp, #36
 	mov	r0, r4
 	bl	log2phys
-.L1252:
+.L1258:
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	b	.L1343
-.L1261:
+	b	.L1349
+.L1267:
 	ldr	r1, [r7, #8]
 	cmp	r4, r1
-	bne	.L1262
-	ldr	r0, .L1348
+	bne	.L1268
+	ldr	r0, .L1354
 	ldr	r1, [r7, #4]
 	ldr	r0, [r0]
 	str	r1, [sp, #28]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1262
+	beq	.L1268
 	ldr	r1, [sp, #40]
 	ldr	r0, [sp, #44]
 	cmp	r1, r0
-	bne	.L1264
-.L1267:
+	bne	.L1270
+.L1273:
 	ldr	r1, [sp, #36]
 	mov	r0, r4
 	bl	FtlReUsePrevPpa
-	b	.L1262
-.L1264:
+	b	.L1268
+.L1270:
 	ldr	r0, [sp, #36]
 	cmp	r1, r0
-	beq	.L1262
+	beq	.L1268
 	adds	r0, r1, #1
-	beq	.L1265
+	beq	.L1271
 	str	r1, [r3, #4]
 	movs	r2, #0
 	movs	r1, #1
 	mov	r0, r3
 	ldr	r7, [r3, #12]
 	bl	FlashReadPages
-.L1266:
+.L1272:
 	ldr	r3, [r6]
 	ldr	r3, [r3, r5]
 	adds	r3, r3, #1
-	beq	.L1267
+	beq	.L1273
 	ldr	r3, [r7, #4]
-	ldr	r2, .L1348
+	ldr	r2, .L1354
 	mov	r1, r3
 	ldr	r0, [r2]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1267
+	beq	.L1273
 	mov	r1, r3
 	ldr	r0, [sp, #28]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1262
-	b	.L1267
-.L1265:
+	beq	.L1268
+	b	.L1273
+.L1271:
 	str	r1, [r2, r5]
-	b	.L1266
-.L1259:
+	b	.L1272
+.L1265:
 	ldr	r3, [sp, #44]
 	ldr	r2, [sp, #40]
 	cmp	r2, r3
-	beq	.L1269
+	beq	.L1275
 	movs	r2, #1
 	add	r1, sp, #44
 	mov	r0, r4
 	bl	log2phys
 	ldr	r7, [sp, #40]
 	adds	r5, r7, #1
-	beq	.L1269
+	beq	.L1275
 	ldr	r3, [sp, #36]
 	cmp	r7, r3
-	beq	.L1282
+	beq	.L1288
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L1348+40
+	ldr	r3, .L1354+40
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L1273
-	ldr	r3, .L1348+44
+	beq	.L1279
+	ldr	r3, .L1354+44
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L1273
-	ldr	r3, .L1348+48
+	beq	.L1279
+	ldr	r3, .L1354+48
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L1269
-.L1273:
+	bne	.L1275
+.L1279:
 	ldr	r0, [r6]
 	movs	r2, #0
 	movs	r1, #1
@@ -9935,20 +9944,20 @@ FtlRecoverySuperblock:
 	ldr	r3, [r6]
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L1269
+	beq	.L1275
 	ldr	r1, [r5, #4]
 	ldr	r0, [sp]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	bne	.L1269
+	bne	.L1275
 	movs	r2, #1
 	add	r1, sp, #40
 	mov	r0, r4
 	bl	log2phys
-	b	.L1269
-.L1349:
+	b	.L1275
+.L1355:
 	.align	2
-.L1348:
+.L1354:
 	.word	.LANCHOR145
 	.word	.LANCHOR112
 	.word	.LANCHOR167
@@ -9962,47 +9971,47 @@ FtlRecoverySuperblock:
 	.word	.LANCHOR51
 	.word	.LANCHOR52
 	.word	.LANCHOR53
-.L1275:
+.L1281:
 	mov	r1, r4
-	ldr	r0, .L1350
+	ldr	r0, .L1356
 	bl	printf
-	b	.L1252
-.L1256:
-	ldr	r3, .L1350+4
+	b	.L1258
+.L1262:
+	ldr	r3, .L1356+4
 	ldr	r3, [r3]
 	cmp	r3, #31
-	bhi	.L1276
-	ldr	r2, .L1350+8
+	bhi	.L1282
+	ldr	r2, .L1356+8
 	str	r4, [r2, r3, lsl #2]
 	adds	r3, r3, #1
-	ldr	r2, .L1350+4
+	ldr	r2, .L1356+4
 	str	r3, [r2]
-.L1276:
+.L1282:
 	ldrh	r0, [r8]
 	bl	decrement_vpc_count
-	ldr	r3, .L1350+12
+	ldr	r3, .L1356+12
 	ldr	r2, [r3]
 	adds	r1, r2, #1
-	bne	.L1277
+	bne	.L1283
 	ldr	r2, [sp]
-.L1342:
+.L1348:
 	str	r2, [r3]
-	b	.L1252
-.L1277:
+	b	.L1258
+.L1283:
 	ldr	r1, [sp]
 	cmp	r1, r2
-	bcs	.L1252
+	bcs	.L1258
 	mov	r2, r1
-	b	.L1342
-.L1255:
+	b	.L1348
+.L1261:
 	strb	r10, [r8, #6]
 	mov	r2, r10
 	strh	fp, [r8, #2]	@ movhi
 	mov	r1, fp
-	b	.L1345
-.L1351:
+	b	.L1351
+.L1357:
 	.align	2
-.L1350:
+.L1356:
 	.word	.LC106
 	.word	.LANCHOR168
 	.word	.LANCHOR169
@@ -10021,74 +10030,74 @@ FtlWriteDump_data:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #24
-	ldr	r4, .L1371
+	ldr	r4, .L1377
 	ldrh	r2, [r4, #4]
 	cmp	r2, #0
-	beq	.L1353
+	beq	.L1359
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1353
-	ldr	r3, .L1371+4
+	bne	.L1359
+	ldr	r3, .L1377+4
 	ldrb	r1, [r4, #7]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	muls	r3, r1, r3
 	cmp	r2, r3
-	beq	.L1353
+	beq	.L1359
 	ldrb	r7, [r4, #10]	@ zero_extendqisi2
-	cbnz	r7, .L1352
-	ldr	r3, .L1371+8
+	cbnz	r7, .L1358
+	ldr	r3, .L1377+8
 	mov	r2, r7
 	mov	r1, sp
 	ldr	r6, [r3]
-	ldr	r3, .L1371+12
+	ldr	r3, .L1377+12
 	subs	r6, r6, #1
 	mov	r0, r6
 	ldrh	r8, [r3]
 	bl	log2phys
-	ldr	r2, .L1371+16
+	ldr	r2, .L1377+16
 	ldr	r3, [sp]
 	str	r6, [sp, #20]
 	ldr	r0, [r2]
-	ldr	r2, .L1371+20
+	ldr	r2, .L1377+20
 	str	r3, [sp, #8]
 	adds	r3, r3, #1
 	str	r0, [sp, #12]
 	ldr	r5, [r2]
 	str	r5, [sp, #16]
 	str	r7, [r5, #4]
-	beq	.L1355
+	beq	.L1361
 	mov	r2, r7
 	movs	r1, #1
 	add	r0, sp, #4
 	bl	FlashReadPages
-.L1356:
-	ldr	fp, .L1371
+.L1362:
+	ldr	fp, .L1377
 	lsl	r8, r8, #2
-	ldr	r10, .L1371+28
+	ldr	r10, .L1377+28
 	movs	r7, #0
 	movw	r3, #61589
 	strh	r3, [r5]	@ movhi
-.L1357:
+.L1363:
 	cmp	r8, r7
-	bne	.L1361
-.L1358:
+	bne	.L1367
+.L1364:
 	movs	r3, #1
-.L1370:
+.L1376:
 	strb	r3, [r4, #10]
-.L1352:
+.L1358:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1355:
-	ldr	r3, .L1371+24
+.L1361:
+	ldr	r3, .L1377+24
 	movs	r1, #255
 	ldrh	r2, [r3]
 	bl	ftl_memset
-	b	.L1356
-.L1361:
+	b	.L1362
+.L1367:
 	ldrh	r3, [r4, #4]
 	cmp	r3, #0
-	beq	.L1358
+	beq	.L1364
 	ldr	r3, [sp, #8]
 	mov	r0, fp
 	str	r6, [r5, #8]
@@ -10112,13 +10121,13 @@ FtlWriteDump_data:
 	bl	FlashProgPages
 	ldrh	r0, [r4]
 	bl	decrement_vpc_count
-	b	.L1357
-.L1353:
+	b	.L1363
+.L1359:
 	movs	r3, #0
-	b	.L1370
-.L1372:
+	b	.L1376
+.L1378:
 	.align	2
-.L1371:
+.L1377:
 	.word	.LANCHOR51
 	.word	.LANCHOR19
 	.word	.LANCHOR61
@@ -10141,31 +10150,31 @@ l2p_flush:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
 	movs	r4, #0
-	ldr	r5, .L1377
-	ldr	r6, .L1377+4
+	ldr	r5, .L1383
+	ldr	r6, .L1383+4
 	bl	FtlWriteDump_data
-.L1374:
+.L1380:
 	ldrh	r3, [r5]
 	uxth	r0, r4
 	cmp	r3, r0
-	bhi	.L1376
+	bhi	.L1382
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L1376:
+.L1382:
 	ldr	r2, [r6]
 	uxth	r3, r4
 	movs	r1, #12
 	mla	r3, r1, r3, r2
 	ldr	r3, [r3, #4]
 	cmp	r3, #0
-	bge	.L1375
+	bge	.L1381
 	bl	flush_l2p_region
-.L1375:
+.L1381:
 	adds	r4, r4, #1
-	b	.L1374
-.L1378:
+	b	.L1380
+.L1384:
 	.align	2
-.L1377:
+.L1383:
 	.word	.LANCHOR33
 	.word	.LANCHOR55
 	.size	l2p_flush, .-l2p_flush
@@ -10183,14 +10192,14 @@ FtlSuperblockPowerLostFix:
 	push	{r4, r5, r6, r7, r8, lr}
 	mov	r3, #-1
 	sub	sp, sp, #24
-	ldr	r2, .L1392
+	ldr	r2, .L1398
 	movs	r6, #0
 	mov	r4, r0
 	str	r3, [sp, #20]
-	ldr	r3, .L1392+4
+	ldr	r3, .L1398+4
 	ldr	r5, [r2]
 	mvn	r2, #2
-	ldr	r8, .L1392+16
+	ldr	r8, .L1398+16
 	ldr	r3, [r3]
 	str	r5, [sp, #16]
 	str	r3, [sp, #12]
@@ -10211,18 +10220,18 @@ FtlSuperblockPowerLostFix:
 	ite	eq
 	moveq	r7, #6
 	movne	r7, #7
-.L1385:
+.L1391:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1381
-.L1382:
-	ldr	r3, .L1392+8
+	cbnz	r3, .L1387
+.L1388:
+	ldr	r3, .L1398+8
 	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
-	ldr	r3, .L1392+12
+	ldr	r3, .L1398+12
 	ldrh	r3, [r3]
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
@@ -10231,12 +10240,12 @@ FtlSuperblockPowerLostFix:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1381:
+.L1387:
 	mov	r0, r4
 	bl	get_new_active_ppa
 	str	r0, [sp, #8]
 	adds	r0, r0, #1
-	beq	.L1382
+	beq	.L1388
 	ldr	r3, [r8]
 	movs	r1, #1
 	add	r0, sp, #4
@@ -10252,11 +10261,11 @@ FtlSuperblockPowerLostFix:
 	ldrh	r0, [r4]
 	bl	decrement_vpc_count
 	subs	r7, r7, #1
-	bne	.L1385
-	b	.L1382
-.L1393:
+	bne	.L1391
+	b	.L1388
+.L1399:
 	.align	2
-.L1392:
+.L1398:
 	.word	.LANCHOR123
 	.word	.LANCHOR115
 	.word	.LANCHOR42
@@ -10274,7 +10283,7 @@ FtlSuperblockPowerLostFix:
 FtlVendorPartWrite:
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1406
+	ldr	r3, .L1412
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #104
 	str	r2, [sp]
@@ -10283,26 +10292,26 @@ FtlVendorPartWrite:
 	mov	r5, r1
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1402
-	ldr	r3, .L1406+4
+	bhi	.L1408
+	ldr	r3, .L1412+4
 	mov	r8, #0
 	ldrh	r6, [r3]
 	lsr	r6, r0, r6
 	lsl	fp, r6, #2
-.L1396:
-	cbnz	r5, .L1401
-.L1394:
+.L1402:
+	cbnz	r5, .L1407
+.L1400:
 	mov	r0, r8
 	add	sp, sp, #104
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1401:
-	ldr	r3, .L1406+8
+.L1407:
+	ldr	r3, .L1412+8
 	mov	r0, r7
-	ldr	r10, .L1406+24
+	ldr	r10, .L1412+24
 	ldr	r3, [r3]
 	ldr	r2, [r3, fp]
-	ldr	r3, .L1406+12
+	ldr	r3, .L1412+12
 	str	r2, [sp, #12]
 	ldrh	r3, [r3]
 	mov	r1, r3
@@ -10316,9 +10325,9 @@ FtlVendorPartWrite:
 	cmp	r5, r4
 	it	cc
 	uxthcc	r4, r5
-	cbz	r2, .L1398
+	cbz	r2, .L1404
 	cmp	r4, r3
-	beq	.L1398
+	beq	.L1404
 	ldr	r3, [r10]
 	add	r0, sp, #20
 	str	r2, [sp, #24]
@@ -10328,7 +10337,7 @@ FtlVendorPartWrite:
 	add	r3, sp, #40
 	str	r3, [sp, #32]
 	bl	FlashReadPages
-.L1399:
+.L1405:
 	lsls	r3, r4, #9
 	ldr	r0, [r10]
 	subs	r5, r5, r4
@@ -10341,7 +10350,7 @@ FtlVendorPartWrite:
 	bl	ftl_memcpy
 	ldr	r2, [r10]
 	mov	r1, r6
-	ldr	r0, .L1406+16
+	ldr	r0, .L1412+16
 	adds	r6, r6, #1
 	bl	FtlMapWritePage
 	ldr	r3, [sp]
@@ -10352,20 +10361,20 @@ FtlVendorPartWrite:
 	ldr	r3, [sp, #8]
 	add	r2, r2, r3
 	str	r2, [sp]
-	b	.L1396
-.L1398:
-	ldr	r3, .L1406+20
+	b	.L1402
+.L1404:
+	ldr	r3, .L1412+20
 	movs	r1, #0
 	ldr	r0, [r10]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-	b	.L1399
-.L1402:
+	b	.L1405
+.L1408:
 	mov	r8, #-1
-	b	.L1394
-.L1407:
+	b	.L1400
+.L1413:
 	.align	2
-.L1406:
+.L1412:
 	.word	.LANCHOR16
 	.word	.LANCHOR22
 	.word	.LANCHOR133
@@ -10386,57 +10395,57 @@ Ftl_save_ext_data:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L1410
-	ldr	r3, .L1410+4
+	ldr	r2, .L1416
+	ldr	r3, .L1416+4
 	ldr	r1, [r2]
 	cmp	r1, r3
-	bne	.L1408
-	ldr	r3, .L1410+8
+	bne	.L1414
+	ldr	r3, .L1416+8
 	movs	r1, #1
 	movs	r0, #0
 	str	r3, [r2, #4]
-	ldr	r3, .L1410+12
+	ldr	r3, .L1416+12
 	ldr	r3, [r3]
 	str	r3, [r2, #88]
-	ldr	r3, .L1410+16
+	ldr	r3, .L1416+16
 	ldr	r3, [r3]
 	str	r3, [r2, #92]
-	ldr	r3, .L1410+20
+	ldr	r3, .L1416+20
 	ldr	r3, [r3]
 	str	r3, [r2, #8]
-	ldr	r3, .L1410+24
+	ldr	r3, .L1416+24
 	ldr	r3, [r3]
 	str	r3, [r2, #12]
-	ldr	r3, .L1410+28
+	ldr	r3, .L1416+28
 	ldr	r3, [r3]
 	str	r3, [r2, #16]
-	ldr	r3, .L1410+32
+	ldr	r3, .L1416+32
 	ldr	r3, [r3]
 	str	r3, [r2, #20]
-	ldr	r3, .L1410+36
+	ldr	r3, .L1416+36
 	ldr	r3, [r3]
 	str	r3, [r2, #28]
-	ldr	r3, .L1410+40
+	ldr	r3, .L1416+40
 	ldr	r3, [r3]
 	str	r3, [r2, #32]
-	ldr	r3, .L1410+44
+	ldr	r3, .L1416+44
 	ldr	r3, [r3]
 	str	r3, [r2, #36]
-	ldr	r3, .L1410+48
+	ldr	r3, .L1416+48
 	ldr	r3, [r3]
 	str	r3, [r2, #40]
-	ldr	r3, .L1410+52
+	ldr	r3, .L1416+52
 	ldr	r3, [r3]
 	str	r3, [r2, #44]
-	ldr	r3, .L1410+56
+	ldr	r3, .L1416+56
 	ldr	r3, [r3]
 	str	r3, [r2, #48]
 	b	FtlVendorPartWrite
-.L1408:
+.L1414:
 	bx	lr
-.L1411:
+.L1417:
 	.align	2
-.L1410:
+.L1416:
 	.word	.LANCHOR81
 	.word	1179929683
 	.word	1342177352
@@ -10464,7 +10473,7 @@ Ftl_save_ext_data:
 FtlEctTblFlush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L1417
+	ldr	r2, .L1423
 	push	{r3, lr}
 	ldrh	r3, [r2]
 	cmp	r3, #31
@@ -10473,22 +10482,22 @@ FtlEctTblFlush:
 	movhi	r3, #32
 	strhls	r3, [r2]	@ movhi
 	movls	r3, #1
-	ldr	r2, .L1417+4
-	cbnz	r0, .L1414
+	ldr	r2, .L1423+4
+	cbnz	r0, .L1420
 	ldr	r1, [r2]
 	ldr	r0, [r1, #20]
 	ldr	r1, [r1, #16]
 	add	r3, r3, r0
 	cmp	r1, r3
-	bcc	.L1415
-.L1414:
+	bcc	.L1421
+.L1420:
 	ldr	r2, [r2]
 	movs	r0, #64
 	ldr	r3, [r2, #16]
 	str	r3, [r2, #20]
-	ldr	r3, .L1417+8
+	ldr	r3, .L1423+8
 	str	r3, [r2]
-	ldr	r3, .L1417+12
+	ldr	r3, .L1423+12
 	ldrh	r1, [r3]
 	lsls	r3, r1, #9
 	str	r3, [r2, #12]
@@ -10499,12 +10508,12 @@ FtlEctTblFlush:
 	str	r3, [r2, #4]
 	bl	FtlVendorPartWrite
 	bl	Ftl_save_ext_data
-.L1415:
+.L1421:
 	movs	r0, #0
 	pop	{r3, pc}
-.L1418:
+.L1424:
 	.align	2
-.L1417:
+.L1423:
 	.word	.LANCHOR170
 	.word	.LANCHOR127
 	.word	1112818501
@@ -10536,7 +10545,7 @@ sftl_vendor_write:
 FtlVendorPartRead:
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1430
+	ldr	r3, .L1436
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, r2
 	adds	r2, r0, r1
@@ -10545,28 +10554,28 @@ FtlVendorPartRead:
 	mov	r6, r1
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1429
-	ldr	r3, .L1430+4
+	bhi	.L1435
+	ldr	r3, .L1436+4
 	mov	r8, #0
-	ldr	fp, .L1430+28
+	ldr	fp, .L1436+28
 	ldrh	r5, [r3]
 	lsr	r5, r0, r5
 	lsls	r3, r5, #2
 	str	r3, [sp]
-.L1422:
-	cbnz	r6, .L1428
-.L1420:
+.L1428:
+	cbnz	r6, .L1434
+.L1426:
 	mov	r0, r8
 	add	sp, sp, #104
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1428:
-	ldr	r3, .L1430+8
+.L1434:
+	ldr	r3, .L1436+8
 	mov	r0, r7
 	ldr	r2, [sp]
 	ldr	r3, [r3]
 	ldr	r3, [r3, r2]
-	ldr	r2, .L1430+12
+	ldr	r2, .L1436+12
 	str	r3, [sp, #8]
 	ldrh	r4, [r2]
 	mov	r1, r4
@@ -10581,7 +10590,7 @@ FtlVendorPartRead:
 	lsls	r2, r4, #9
 	str	r2, [sp, #8]
 	cmp	r3, #0
-	beq	.L1424
+	beq	.L1430
 	ldr	r2, [fp]
 	add	r0, sp, #20
 	str	r3, [sp, #24]
@@ -10595,28 +10604,28 @@ FtlVendorPartRead:
 	ldr	r2, [sp, #20]
 	ldr	r3, [sp, #12]
 	adds	r2, r2, #1
-	ldr	r2, .L1430+16
+	ldr	r2, .L1436+16
 	it	eq
 	moveq	r8, #-1
 	ldr	r2, [r2]
 	cmp	r2, #256
-	bne	.L1426
+	bne	.L1432
 	mov	r2, r3
 	mov	r1, r5
-	ldr	r0, .L1430+20
+	ldr	r0, .L1436+20
 	bl	printf
 	ldr	r2, [fp]
 	mov	r1, r5
-	ldr	r0, .L1430+24
+	ldr	r0, .L1436+24
 	bl	FtlMapWritePage
-.L1426:
+.L1432:
 	ldr	r1, [fp]
 	lsls	r2, r4, #9
 	ldr	r3, [sp, #4]
 	mov	r0, r10
 	add	r1, r1, r3, lsl #9
 	bl	ftl_memcpy
-.L1427:
+.L1433:
 	ldr	r3, [sp, #8]
 	adds	r5, r5, #1
 	subs	r6, r6, r4
@@ -10625,19 +10634,19 @@ FtlVendorPartRead:
 	ldr	r3, [sp]
 	adds	r3, r3, #4
 	str	r3, [sp]
-	b	.L1422
-.L1424:
+	b	.L1428
+.L1430:
 	lsls	r2, r4, #9
 	mov	r1, r3
 	mov	r0, r10
 	bl	ftl_memset
-	b	.L1427
-.L1429:
+	b	.L1433
+.L1435:
 	mov	r8, #-1
-	b	.L1420
-.L1431:
+	b	.L1426
+.L1437:
 	.align	2
-.L1430:
+.L1436:
 	.word	.LANCHOR16
 	.word	.LANCHOR22
 	.word	.LANCHOR133
@@ -10660,30 +10669,30 @@ FtlLoadEctTbl:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r0, #64
-	ldr	r4, .L1434
-	ldr	r5, .L1434+4
+	ldr	r4, .L1440
+	ldr	r5, .L1440+4
 	ldr	r2, [r4]
 	ldrh	r1, [r5]
 	bl	FtlVendorPartRead
 	ldr	r3, [r4]
 	ldr	r2, [r3]
-	ldr	r3, .L1434+8
+	ldr	r3, .L1440+8
 	cmp	r2, r3
-	beq	.L1433
-	ldr	r1, .L1434+12
-	ldr	r0, .L1434+16
+	beq	.L1439
+	ldr	r1, .L1440+12
+	ldr	r0, .L1440+16
 	bl	printf
 	ldrh	r2, [r5]
 	movs	r1, #0
 	ldr	r0, [r4]
 	lsls	r2, r2, #9
 	bl	ftl_memset
-.L1433:
+.L1439:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L1435:
+.L1441:
 	.align	2
-.L1434:
+.L1440:
 	.word	.LANCHOR127
 	.word	.LANCHOR125
 	.word	1112818501
@@ -10703,75 +10712,75 @@ Ftl_load_ext_data:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r1, #1
-	ldr	r4, .L1439
+	ldr	r4, .L1445
 	movs	r0, #0
-	ldr	r5, .L1439+4
+	ldr	r5, .L1445+4
 	mov	r2, r4
 	bl	FtlVendorPartRead
 	ldr	r3, [r4]
 	cmp	r3, r5
-	beq	.L1437
+	beq	.L1443
 	mov	r2, #512
 	movs	r1, #0
 	mov	r0, r4
 	bl	ftl_memset
 	str	r5, [r4]
-.L1437:
+.L1443:
 	ldr	r3, [r4]
 	cmp	r3, r5
-	ldr	r3, .L1439+8
-	bne	.L1438
+	ldr	r3, .L1445+8
+	bne	.L1444
 	ldr	r1, [r4, #88]
-	ldr	r2, .L1439+12
+	ldr	r2, .L1445+12
 	str	r1, [r2]
 	ldr	r1, [r4, #92]
-	ldr	r2, .L1439+16
+	ldr	r2, .L1445+16
 	str	r1, [r2]
 	ldr	r1, [r4, #8]
-	ldr	r2, .L1439+20
+	ldr	r2, .L1445+20
 	str	r1, [r2]
 	ldr	r1, [r4, #12]
-	ldr	r2, .L1439+24
+	ldr	r2, .L1445+24
 	str	r1, [r2]
 	ldr	r1, [r4, #16]
-	ldr	r2, .L1439+28
+	ldr	r2, .L1445+28
 	str	r1, [r2]
 	ldr	r1, [r4, #20]
-	ldr	r2, .L1439+32
+	ldr	r2, .L1445+32
 	str	r1, [r2]
 	ldr	r2, [r4, #28]
 	ldr	r1, [r4, #32]
 	str	r2, [r3]
-	ldr	r2, .L1439+36
+	ldr	r2, .L1445+36
 	str	r1, [r2]
 	ldr	r1, [r4, #36]
-	ldr	r2, .L1439+40
+	ldr	r2, .L1445+40
 	str	r1, [r2]
 	ldr	r1, [r4, #40]
-	ldr	r2, .L1439+44
+	ldr	r2, .L1445+44
 	str	r1, [r2]
 	ldr	r1, [r4, #44]
-	ldr	r2, .L1439+48
+	ldr	r2, .L1445+48
 	str	r1, [r2]
 	ldr	r1, [r4, #48]
-	ldr	r2, .L1439+52
+	ldr	r2, .L1445+52
 	str	r1, [r2]
-.L1438:
-	ldr	r1, .L1439+56
-	ldr	r2, .L1439+60
+.L1444:
+	ldr	r1, .L1445+56
+	ldr	r2, .L1445+60
 	ldr	r3, [r3]
 	ldr	r0, [r1]
 	ldrh	r2, [r2]
-	ldr	r1, .L1439+64
+	ldr	r1, .L1445+64
 	mla	r0, r0, r2, r3
 	ldrh	r1, [r1]
 	bl	__aeabi_uidiv
-	ldr	r3, .L1439+68
+	ldr	r3, .L1445+68
 	str	r0, [r3]
 	pop	{r3, r4, r5, pc}
-.L1440:
+.L1446:
 	.align	2
-.L1439:
+.L1445:
 	.word	.LANCHOR81
 	.word	1179929683
 	.word	.LANCHOR73
@@ -10819,11 +10828,11 @@ FtlVpcTblFlush:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	fp, #0
-	ldr	r3, .L1457
-	ldr	r4, .L1457+4
-	ldr	r10, .L1457+76
+	ldr	r3, .L1463
+	ldr	r4, .L1463+4
+	ldr	r10, .L1463+76
 	ldr	r0, [r3]
-	ldr	r5, .L1457+8
+	ldr	r5, .L1463+8
 	ldr	r7, [r10]
 	ldrh	r2, [r4]
 	str	r0, [r5, #8]
@@ -10832,21 +10841,21 @@ FtlVpcTblFlush:
 	movw	r2, #61604
 	strh	r2, [r7]	@ movhi
 	ldr	r2, [r4, #8]
-	ldr	r6, .L1457+12
-	ldr	ip, .L1457+80
+	ldr	r6, .L1463+12
+	ldr	ip, .L1463+80
 	str	r2, [r7, #4]
-	ldr	r2, .L1457+16
+	ldr	r2, .L1463+16
 	str	fp, [r7, #8]
 	str	fp, [r7, #12]
 	stm	r6, {r2, ip}
 	ldrh	r2, [r4, #6]
 	str	r3, [sp, #4]
-	ldr	r8, .L1457+84
+	ldr	r8, .L1463+84
 	strh	r2, [r6, #8]	@ movhi
-	ldr	r2, .L1457+20
+	ldr	r2, .L1463+20
 	ldrh	r2, [r2]
 	strb	r2, [r6, #10]
-	ldr	r2, .L1457+24
+	ldr	r2, .L1463+24
 	ldrh	r1, [r2]
 	ldrh	ip, [r2, #2]
 	strh	r1, [r6, #14]	@ movhi
@@ -10854,7 +10863,7 @@ FtlVpcTblFlush:
 	ldrb	r2, [r2, #8]	@ zero_extendqisi2
 	strb	r2, [r6, #11]
 	orr	r1, r1, ip, lsl #6
-	ldr	r2, .L1457+28
+	ldr	r2, .L1463+28
 	strh	r1, [r6, #16]	@ movhi
 	ldrh	r1, [r2]
 	ldrh	ip, [r2, #2]
@@ -10864,7 +10873,7 @@ FtlVpcTblFlush:
 	orr	r1, r1, ip, lsl #6
 	strh	r1, [r6, #20]	@ movhi
 	strb	r2, [r6, #12]
-	ldr	r2, .L1457+32
+	ldr	r2, .L1463+32
 	ldrh	r1, [r2]
 	ldrh	ip, [r2, #2]
 	strh	r1, [r6, #22]	@ movhi
@@ -10872,33 +10881,33 @@ FtlVpcTblFlush:
 	ldrb	r2, [r2, #8]	@ zero_extendqisi2
 	strb	r2, [r6, #13]
 	orr	r1, r1, ip, lsl #6
-	ldr	r2, .L1457+36
+	ldr	r2, .L1463+36
 	strh	r1, [r6, #24]	@ movhi
 	movs	r1, #255
 	ldr	r2, [r2]
 	str	r2, [r6, #32]
 	ldr	r2, [r8]
 	str	r2, [r6, #40]
-	ldr	r2, .L1457+40
+	ldr	r2, .L1463+40
 	ldr	r2, [r2]
 	str	r2, [r6, #36]
-	ldr	r2, .L1457+44
+	ldr	r2, .L1463+44
 	ldrh	r2, [r2]
 	bl	ftl_memset
 	mov	r1, r6
-	ldr	r6, .L1457+48
+	ldr	r6, .L1463+48
 	movs	r2, #48
 	ldr	r0, [r5, #8]
 	bl	ftl_memcpy
 	ldrh	r2, [r6]
 	ldr	r0, [r5, #8]
-	ldr	r1, .L1457+52
+	ldr	r1, .L1463+52
 	lsls	r2, r2, #1
 	adds	r0, r0, #48
 	ldr	r1, [r1]
 	bl	ftl_memcpy
 	ldrh	r0, [r6]
-	ldr	r1, .L1457+56
+	ldr	r1, .L1463+56
 	ldr	r6, [r5, #8]
 	lsrs	r2, r0, #3
 	adds	r0, r0, #24
@@ -10912,7 +10921,7 @@ FtlVpcTblFlush:
 	mov	r0, fp
 	movw	fp, #65535
 	bl	FtlUpdateVaildLpn
-.L1443:
+.L1449:
 	ldr	r3, [sp, #4]
 	ldrh	r1, [r4, #2]
 	ldrh	r2, [r4]
@@ -10922,11 +10931,11 @@ FtlVpcTblFlush:
 	str	r3, [r5, #12]
 	orr	r3, r1, r2, lsl #10
 	str	r3, [r5, #4]
-	ldr	r3, .L1457+60
+	ldr	r3, .L1463+60
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r1, r3
-	blt	.L1444
+	blt	.L1450
 	movs	r3, #0
 	ldrh	fp, [r4, #4]
 	strh	r3, [r4, #2]	@ movhi
@@ -10941,9 +10950,9 @@ FtlVpcTblFlush:
 	str	r2, [r5, #4]
 	str	r3, [r7, #4]
 	strh	r0, [r7, #2]	@ movhi
-.L1444:
+.L1450:
 	movs	r3, #1
-	ldr	r0, .L1457+8
+	ldr	r0, .L1463+8
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
@@ -10953,50 +10962,50 @@ FtlVpcTblFlush:
 	uxth	r3, r3
 	adds	r1, r2, #1
 	strh	r3, [r4, #2]	@ movhi
-	bne	.L1445
+	bne	.L1451
 	cmp	r3, #1
-	bne	.L1446
+	bne	.L1452
 	movw	r2, #1135
-	ldr	r1, .L1457+64
-	ldr	r0, .L1457+68
+	ldr	r1, .L1463+64
+	ldr	r0, .L1463+68
 	bl	printf
-.L1446:
+.L1452:
 	ldrh	r3, [r4, #2]
 	adds	r6, r6, #1
 	uxth	r6, r6
 	cmp	r3, #1
 	itttt	eq
-	ldreq	r3, .L1457+60
+	ldreq	r3, .L1463+60
 	ldrheq	r3, [r3]
 	addeq	r3, r3, #-1
 	strheq	r3, [r4, #2]	@ movhi
 	cmp	r6, #3
-	bls	.L1443
+	bls	.L1449
 	mov	r2, r6
 	ldr	r1, [r5, #4]
-	ldr	r0, .L1457+72
+	ldr	r0, .L1463+72
 	bl	printf
-.L1449:
-	b	.L1449
-.L1445:
+.L1455:
+	b	.L1455
+.L1451:
 	cmp	r3, #1
-	beq	.L1443
+	beq	.L1449
 	cmp	r2, #256
-	beq	.L1443
+	beq	.L1449
 	movw	r3, #65535
 	cmp	fp, r3
-	beq	.L1450
+	beq	.L1456
 	movs	r1, #1
 	mov	r0, fp
 	bl	FtlFreeSysBlkQueueIn
-.L1450:
+.L1456:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1458:
+.L1464:
 	.align	2
-.L1457:
+.L1463:
 	.word	.LANCHOR115
 	.word	.LANCHOR79
 	.word	.LANCHOR148
@@ -11051,17 +11060,17 @@ sftl_deinit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L1462
+	ldr	r3, .L1468
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L1461
+	bne	.L1467
 	bl	FtlSysFlush
-.L1461:
+.L1467:
 	movs	r0, #0
 	pop	{r3, pc}
-.L1463:
+.L1469:
 	.align	2
-.L1462:
+.L1468:
 	.word	.LANCHOR86
 	.size	sftl_deinit, .-sftl_deinit
 	.section	.text.FtlDiscard,"ax",%progbits
@@ -11075,24 +11084,24 @@ sftl_deinit:
 FtlDiscard:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1479
+	ldr	r3, .L1485
 	adds	r2, r0, r1
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r7, r0
 	mov	r5, r1
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1472
+	bhi	.L1478
 	cmp	r1, #31
-	bhi	.L1466
-.L1471:
+	bhi	.L1472
+.L1477:
 	movs	r0, #0
-.L1464:
+.L1470:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1466:
-	ldr	r8, .L1479+12
+.L1472:
+	ldr	r8, .L1485+12
 	ldrh	r4, [r8]
 	mov	r1, r4
 	bl	__aeabi_uidiv
@@ -11100,7 +11109,7 @@ FtlDiscard:
 	mov	r6, r0
 	subs	r7, r7, r3
 	uxth	r7, r7
-	cbz	r7, .L1467
+	cbz	r7, .L1473
 	subs	r4, r4, r7
 	adds	r6, r6, #1
 	cmp	r4, r5
@@ -11108,32 +11117,32 @@ FtlDiscard:
 	movcs	r4, r5
 	uxth	r4, r4
 	subs	r5, r5, r4
-.L1467:
-	ldr	r4, .L1479+4
+.L1473:
+	ldr	r4, .L1485+4
 	mov	r3, #-1
-	ldr	r7, .L1479+8
+	ldr	r7, .L1485+8
 	str	r3, [sp, #4]
-.L1468:
+.L1474:
 	ldrh	r3, [r8]
 	cmp	r5, r3
-	bcs	.L1470
-	ldr	r3, .L1479+4
+	bcs	.L1476
+	ldr	r3, .L1485+4
 	ldr	r2, [r3]
 	cmp	r2, #32
-	bls	.L1471
+	bls	.L1477
 	movs	r4, #0
 	str	r4, [r3]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L1471
-.L1470:
+	b	.L1477
+.L1476:
 	movs	r2, #0
 	mov	r1, sp
 	mov	r0, r6
 	bl	log2phys
 	ldr	r3, [sp]
 	adds	r3, r3, #1
-	beq	.L1469
+	beq	.L1475
 	ldr	r3, [r4]
 	movs	r2, #1
 	add	r1, sp, #4
@@ -11148,17 +11157,17 @@ FtlDiscard:
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L1469:
+.L1475:
 	ldrh	r3, [r8]
 	adds	r6, r6, #1
 	subs	r5, r5, r3
-	b	.L1468
-.L1472:
+	b	.L1474
+.L1478:
 	mov	r0, #-1
-	b	.L1464
-.L1480:
+	b	.L1470
+.L1486:
 	.align	2
-.L1479:
+.L1485:
 	.word	.LANCHOR34
 	.word	.LANCHOR172
 	.word	.LANCHOR63
@@ -11177,96 +11186,96 @@ FtlVpcCheckAndModify:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
 	movs	r4, #0
-	ldr	r1, .L1494
-	ldr	r0, .L1494+4
+	ldr	r1, .L1500
+	ldr	r0, .L1500+4
 	bl	printf
-	ldr	r3, .L1494+8
+	ldr	r3, .L1500+8
 	movs	r1, #0
-	ldr	r5, .L1494+12
-	ldr	r6, .L1494+16
+	ldr	r5, .L1500+12
+	ldr	r6, .L1500+16
 	ldrh	r2, [r3]
 	ldr	r0, [r5]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-.L1482:
+.L1488:
 	ldr	r3, [r6]
 	cmp	r4, r3
-	bcc	.L1484
-	ldr	r10, .L1494+36
+	bcc	.L1490
+	ldr	r10, .L1500+36
 	movs	r7, #0
-	ldr	r8, .L1494+40
-.L1485:
+	ldr	r8, .L1500+40
+.L1491:
 	ldrh	r3, [r10]
 	uxth	r6, r7
 	cmp	r3, r6
-	bhi	.L1490
+	bhi	.L1496
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L1484:
+.L1490:
 	movs	r2, #0
 	add	r1, sp, #4
 	mov	r0, r4
 	bl	log2phys
 	ldr	r0, [sp, #4]
 	adds	r3, r0, #1
-	beq	.L1483
+	beq	.L1489
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldr	r2, [r5]
 	ldrh	r3, [r2, r0, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r0, lsl #1]	@ movhi
-.L1483:
+.L1489:
 	adds	r4, r4, #1
-	b	.L1482
-.L1490:
+	b	.L1488
+.L1496:
 	ldr	r3, [r8]
 	uxth	r4, r7
 	ldrh	r2, [r3, r4, lsl #1]
 	ldr	r3, [r5]
 	ldrh	r3, [r3, r4, lsl #1]
 	cmp	r2, r3
-	beq	.L1487
+	beq	.L1493
 	movw	r1, #65535
 	cmp	r2, r1
-	beq	.L1487
+	beq	.L1493
 	mov	r1, r4
-	ldr	r0, .L1494+20
+	ldr	r0, .L1500+20
 	bl	printf
-	ldr	r3, .L1494+24
+	ldr	r3, .L1500+24
 	ldrh	r3, [r3]
 	cmp	r3, r6
-	beq	.L1487
-	ldr	r3, .L1494+28
+	beq	.L1493
+	ldr	r3, .L1500+28
 	ldrh	r3, [r3]
 	cmp	r3, r6
-	beq	.L1487
-	ldr	r3, .L1494+32
+	beq	.L1493
+	ldr	r3, .L1500+32
 	ldrh	r3, [r3]
 	cmp	r3, r6
-	beq	.L1487
+	beq	.L1493
 	ldr	r3, [r8]
 	ldrh	r2, [r3, r4, lsl #1]
-	cbnz	r2, .L1489
+	cbnz	r2, .L1495
 	ldr	r2, [r5]
 	ldrh	r2, [r2, r4, lsl #1]
 	strh	r2, [r3, r4, lsl #1]	@ movhi
-.L1487:
+.L1493:
 	adds	r7, r7, #1
-	b	.L1485
-.L1489:
+	b	.L1491
+.L1495:
 	ldr	r2, [r5]
 	mov	r0, r6
 	ldrh	r2, [r2, r4, lsl #1]
 	strh	r2, [r3, r4, lsl #1]	@ movhi
 	bl	update_vpc_list
-	b	.L1487
-.L1495:
+	b	.L1493
+.L1501:
 	.align	2
-.L1494:
+.L1500:
 	.word	.LANCHOR173
 	.word	.LC94
 	.word	.LANCHOR6
@@ -11290,47 +11299,47 @@ FtlVpcCheckAndModify:
 allocate_new_data_superblock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1506
+	ldr	r3, .L1512
 	push	{r4, r5, r6, lr}
 	mov	r6, r0
 	ldrh	r4, [r0]
 	ldrh	r3, [r3]
 	cmp	r3, r4
-	bcs	.L1497
+	bcs	.L1503
 	movw	r2, #2714
-	ldr	r1, .L1506+4
-	ldr	r0, .L1506+8
+	ldr	r1, .L1512+4
+	ldr	r0, .L1512+8
 	bl	printf
-.L1497:
+.L1503:
 	movw	r3, #65535
 	cmp	r4, r3
-	beq	.L1498
-	ldr	r3, .L1506+12
+	beq	.L1504
+	ldr	r3, .L1512+12
 	mov	r0, r4
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
-	cbz	r3, .L1499
+	cbz	r3, .L1505
 	bl	INSERT_DATA_LIST
-.L1498:
-	ldr	r5, .L1506+16
+.L1504:
+	ldr	r5, .L1512+16
 	movw	r2, #65535
 	movs	r3, #1
 	strb	r3, [r6, #8]
 	ldrh	r0, [r5]
 	cmp	r0, r2
-	beq	.L1500
+	beq	.L1506
 	cmp	r4, r0
-	bne	.L1501
-	ldr	r3, .L1506+12
+	bne	.L1507
+	ldr	r3, .L1512+12
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L1502
-.L1501:
+	cbz	r3, .L1508
+.L1507:
 	bl	update_vpc_list
-.L1502:
+.L1508:
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.L1500:
+.L1506:
 	mov	r0, r6
 	bl	allocate_data_superblock
 	bl	l2p_flush
@@ -11339,12 +11348,12 @@ allocate_new_data_superblock:
 	bl	FtlVpcTblFlush
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L1499:
+.L1505:
 	bl	INSERT_FREE_LIST
-	b	.L1498
-.L1507:
+	b	.L1504
+.L1513:
 	.align	2
-.L1506:
+.L1512:
 	.word	.LANCHOR5
 	.word	.LANCHOR174
 	.word	.LC1
@@ -11364,25 +11373,25 @@ FtlProgPages:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r6, #0
-	ldr	r8, .L1522+24
+	ldr	r8, .L1528+24
 	mov	r4, r3
 	movs	r2, #0
 	mov	r5, r0
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
 	mov	r10, r1
 	bl	FlashProgPages
-.L1509:
+.L1515:
 	cmp	r6, r10
-	beq	.L1516
-	ldr	r7, .L1522
-	b	.L1517
-.L1512:
+	beq	.L1522
+	ldr	r7, .L1528
+	b	.L1523
+.L1518:
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r4]
 	cmp	r3, r0
-	bne	.L1510
+	bne	.L1516
 	ldr	r1, [r8]
 	ldrh	r0, [r4, #4]
 	ldrh	r2, [r1, r3, lsl #1]
@@ -11393,13 +11402,13 @@ FtlProgPages:
 	movs	r3, #0
 	strb	r3, [r4, #6]
 	strh	r3, [r4, #4]	@ movhi
-.L1510:
+.L1516:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1511
+	cbnz	r3, .L1517
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-.L1511:
-	ldr	r2, .L1522+4
+.L1517:
+	ldr	r2, .L1528+4
 	ldr	r3, [r2, #96]
 	adds	r3, r3, #1
 	str	r3, [r2, #96]
@@ -11415,20 +11424,20 @@ FtlProgPages:
 	ldrb	r3, [r4, #9]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	FlashProgPages
-.L1517:
+.L1523:
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L1512
-	ldr	r3, .L1522+8
+	beq	.L1518
+	ldr	r3, .L1528+8
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1513
+	bcc	.L1519
 	movw	r2, #955
-	ldr	r1, .L1522+12
-	ldr	r0, .L1522+16
+	ldr	r1, .L1528+12
+	ldr	r0, .L1528+16
 	bl	printf
-.L1513:
+.L1519:
 	ldr	r3, [r5, #4]
 	add	r1, sp, #8
 	movs	r2, #1
@@ -11441,37 +11450,37 @@ FtlProgPages:
 	bl	P2V_block_in_plane
 	cmp	fp, #-1
 	mov	r7, r0
-	beq	.L1514
+	beq	.L1520
 	ldr	r3, [r8]
 	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L1515
+	cbnz	r2, .L1521
 	mov	r1, r0
-	ldr	r0, .L1522+20
+	ldr	r0, .L1528+20
 	bl	printf
-.L1515:
+.L1521:
 	mov	r0, r7
 	bl	decrement_vpc_count
-.L1514:
+.L1520:
 	adds	r6, r6, #1
 	adds	r5, r5, #20
-	b	.L1509
-.L1516:
-	ldr	r3, .L1522+8
+	b	.L1515
+.L1522:
+	ldr	r3, .L1528+8
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1508
+	bcc	.L1514
 	movw	r2, #970
-	ldr	r1, .L1522+12
-	ldr	r0, .L1522+16
+	ldr	r1, .L1528+12
+	ldr	r0, .L1528+16
 	bl	printf
-.L1508:
+.L1514:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1523:
+.L1529:
 	.align	2
-.L1522:
+.L1528:
 	.word	.LANCHOR19
 	.word	.LANCHOR81
 	.word	.LANCHOR3
@@ -11493,54 +11502,54 @@ FtlGcFreeTempBlock:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movw	r2, #65535
-	ldr	r4, .L1550
-	ldr	r6, .L1550+4
+	ldr	r4, .L1556
+	ldr	r6, .L1556+4
 	ldrh	r5, [r4]
 	ldrh	r1, [r6]
 	cmp	r5, r2
-	bne	.L1525
-.L1535:
-	ldr	r3, .L1550+8
+	bne	.L1531
+.L1541:
+	ldr	r3, .L1556+8
 	movs	r2, #0
 	str	r2, [r3]
 	movw	r3, #65535
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	bne	.L1548
-.L1526:
+	bne	.L1554
+.L1532:
 	movs	r0, #0
-.L1524:
+.L1530:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1525:
-	cbz	r0, .L1528
-	ldr	r3, .L1550+12
+.L1531:
+	cbz	r0, .L1534
+	ldr	r3, .L1556+12
 	ldrh	r0, [r3]
 	cmp	r0, r2
-	beq	.L1529
-.L1530:
+	beq	.L1535
+.L1536:
 	movs	r1, #2
-.L1528:
-	ldr	r0, .L1550
+.L1534:
+	ldr	r0, .L1556
 	bl	FtlGcScanTempBlk
 	str	r0, [sp, #12]
 	adds	r0, r0, #1
-	beq	.L1531
-	ldr	r3, .L1550+16
+	beq	.L1537
+	ldr	r3, .L1556+16
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r5, lsl #1]
 	cmp	r3, #4
-	bls	.L1532
+	bls	.L1538
 	subs	r3, r3, #5
 	movs	r0, #1
 	strh	r3, [r2, r5, lsl #1]	@ movhi
 	bl	FtlEctTblFlush
-.L1532:
-	ldr	r4, .L1550+8
+.L1538:
+	ldr	r4, .L1556+8
 	ldr	r2, [r4]
-	cbnz	r2, .L1533
-	ldr	r2, .L1550+20
+	cbnz	r2, .L1539
+	ldr	r2, .L1556+20
 	ldr	r0, [sp, #12]
 	ldr	r3, [r2, #96]
 	ubfx	r0, r0, #10, #16
@@ -11548,60 +11557,60 @@ FtlGcFreeTempBlock:
 	str	r3, [r2, #96]
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
-.L1533:
+.L1539:
 	movs	r3, #0
 	str	r3, [r4]
-.L1544:
+.L1550:
 	movs	r0, #1
-	b	.L1524
-.L1529:
+	b	.L1530
+.L1535:
 	movs	r2, #0
 	strh	r2, [r3]	@ movhi
-	ldr	r3, .L1550+24
+	ldr	r3, .L1556+24
 	ldrh	r3, [r3]
 	cmp	r3, #17
-	bhi	.L1530
-	b	.L1528
-.L1531:
-	ldr	r3, .L1550+12
+	bhi	.L1536
+	b	.L1534
+.L1537:
+	ldr	r3, .L1556+12
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1544
-	b	.L1535
-.L1548:
+	bne	.L1550
+	b	.L1541
+.L1554:
 	ldrb	r1, [r4, #7]	@ zero_extendqisi2
 	ldrh	r3, [r6]
-	ldr	r5, .L1550+28
+	ldr	r5, .L1556+28
 	muls	r3, r1, r3
 	ldrh	r2, [r5]
 	cmp	r2, r3
-	beq	.L1536
+	beq	.L1542
 	movs	r2, #162
-	ldr	r1, .L1550+32
-	ldr	r0, .L1550+36
+	ldr	r1, .L1556+32
+	ldr	r0, .L1556+36
 	bl	printf
-.L1536:
+.L1542:
 	ldrh	r6, [r6]
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	ldr	r2, .L1550+40
+	ldr	r2, .L1556+40
 	ldrh	r0, [r4]
-	ldr	fp, .L1550+68
+	ldr	fp, .L1556+68
 	smulbb	r3, r3, r6
 	ldr	r1, [r2]
 	movs	r6, #0
 	str	r2, [sp, #4]
 	strh	r3, [r1, r0, lsl #1]	@ movhi
-	ldr	r1, .L1550+44
+	ldr	r1, .L1556+44
 	ldrh	r3, [r5]
 	ldr	r0, [r1]
 	add	r3, r3, r0
 	str	r3, [r1]
-.L1537:
+.L1543:
 	ldrh	r2, [r5]
 	uxth	r3, r6
 	cmp	r2, r3
-	bhi	.L1541
+	bhi	.L1547
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	ldr	r3, [sp, #4]
@@ -11609,10 +11618,10 @@ FtlGcFreeTempBlock:
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	beq	.L1542
+	beq	.L1548
 	bl	INSERT_DATA_LIST
-.L1543:
-	ldr	r3, .L1550+48
+.L1549:
+	ldr	r3, .L1556+48
 	movw	r6, #65535
 	strh	r6, [r4]	@ movhi
 	movs	r4, #0
@@ -11620,35 +11629,35 @@ FtlGcFreeTempBlock:
 	strh	r4, [r3]	@ movhi
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	ldr	r3, .L1550+52
+	ldr	r3, .L1556+52
 	strh	r6, [r3]	@ movhi
-	ldr	r3, .L1550+24
+	ldr	r3, .L1556+24
 	ldrh	r2, [r3]
-	ldr	r3, .L1550+56
+	ldr	r3, .L1556+56
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, asr #2
-	ble	.L1526
-	ldr	r3, .L1550+60
+	ble	.L1532
+	ldr	r3, .L1556+60
 	movs	r2, #20
 	strh	r2, [r3]	@ movhi
-	b	.L1526
-.L1541:
+	b	.L1532
+.L1547:
 	uxth	r3, r6
 	movs	r7, #12
 	ldr	r2, [fp]
 	muls	r7, r3, r7
-	ldr	r3, .L1550+64
+	ldr	r3, .L1556+64
 	ldr	r8, [r3]
 	add	r10, r8, r7
 	ldr	r1, [r10, #8]
 	cmp	r1, r2
-	bcc	.L1538
+	bcc	.L1544
 	movs	r2, #168
-	ldr	r1, .L1550+32
-	ldr	r0, .L1550+36
+	ldr	r1, .L1556+32
+	ldr	r0, .L1556+36
 	bl	printf
-.L1538:
+.L1544:
 	movs	r2, #0
 	add	r1, sp, #12
 	ldr	r0, [r10, #8]
@@ -11656,7 +11665,7 @@ FtlGcFreeTempBlock:
 	ldr	r2, [sp, #12]
 	ldr	r0, [r8, r7]
 	cmp	r0, r2
-	bne	.L1539
+	bne	.L1545
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	movs	r2, #1
@@ -11665,23 +11674,23 @@ FtlGcFreeTempBlock:
 	ldr	r0, [r10, #8]
 	bl	log2phys
 	mov	r0, r7
-.L1549:
+.L1555:
 	bl	decrement_vpc_count
-.L1540:
+.L1546:
 	adds	r6, r6, #1
-	b	.L1537
-.L1539:
+	b	.L1543
+.L1545:
 	ldr	r3, [r10, #4]
 	cmp	r2, r3
-	beq	.L1540
+	beq	.L1546
 	ldrh	r0, [r4]
-	b	.L1549
-.L1542:
+	b	.L1555
+.L1548:
 	bl	INSERT_FREE_LIST
-	b	.L1543
-.L1551:
+	b	.L1549
+.L1557:
 	.align	2
-.L1550:
+.L1556:
 	.word	.LANCHOR53
 	.word	.LANCHOR19
 	.word	.LANCHOR144
@@ -11713,27 +11722,27 @@ FtlGcPageRecovery:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	ldr	r4, .L1554
-	ldr	r5, .L1554+4
+	ldr	r4, .L1560
+	ldr	r5, .L1560+4
 	ldrh	r1, [r4]
 	mov	r0, r5
 	bl	FtlGcScanTempBlk
 	ldrh	r2, [r5, #2]
 	ldrh	r3, [r4]
 	cmp	r2, r3
-	bcc	.L1552
-	ldr	r0, .L1554+8
+	bcc	.L1558
+	ldr	r0, .L1560+8
 	bl	FtlMapBlkWriteDump_data
 	movs	r0, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r3, .L1554+12
+	ldr	r3, .L1560+12
 	movs	r2, #0
 	str	r2, [r3]
-.L1552:
+.L1558:
 	pop	{r3, r4, r5, pc}
-.L1555:
+.L1561:
 	.align	2
-.L1554:
+.L1560:
 	.word	.LANCHOR19
 	.word	.LANCHOR53
 	.word	.LANCHOR140
@@ -11752,13 +11761,13 @@ FtlPowerLostRecovery:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #0
-	ldr	r5, .L1557
-	ldr	r3, .L1557+4
+	ldr	r5, .L1563
+	ldr	r3, .L1563+4
 	mov	r0, r5
 	str	r4, [r3]
 	bl	FtlRecoverySuperblock
 	mov	r0, r5
-	ldr	r5, .L1557+8
+	ldr	r5, .L1563+8
 	bl	FtlSlcSuperblockCheck
 	mov	r0, r5
 	bl	FtlRecoverySuperblock
@@ -11769,9 +11778,9 @@ FtlPowerLostRecovery:
 	bl	decrement_vpc_count
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L1558:
+.L1564:
 	.align	2
-.L1557:
+.L1563:
 	.word	.LANCHOR51
 	.word	.LANCHOR168
 	.word	.LANCHOR52
@@ -11789,45 +11798,45 @@ Ftl_gc_temp_data_write_back:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r3, #0
-	ldr	r4, .L1566
+	ldr	r4, .L1572
 	movs	r6, #0
 	movs	r7, #20
 	mov	r2, r3
-	ldr	r5, .L1566+4
+	ldr	r5, .L1572+4
 	ldr	r1, [r4]
 	ldr	r0, [r5]
 	bl	FlashProgPages
-.L1560:
+.L1566:
 	ldr	r1, [r4]
 	uxth	r3, r6
 	cmp	r1, r3
-	bhi	.L1563
+	bhi	.L1569
 	ldr	r0, [r5]
 	bl	FtlGcBufFree
-	ldr	r3, .L1566+8
+	ldr	r3, .L1572+8
 	movs	r0, #0
 	str	r0, [r4]
 	ldrh	r3, [r3, #4]
-	cbnz	r3, .L1559
+	cbnz	r3, .L1565
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
-	b	.L1565
-.L1563:
+	b	.L1571
+.L1569:
 	muls	r3, r7, r3
 	ldr	r2, [r5]
 	adds	r6, r6, #1
 	adds	r1, r2, r3
 	ldr	r2, [r2, r3]
 	adds	r3, r2, #1
-	bne	.L1561
-	ldr	r3, .L1566+8
+	bne	.L1567
+	ldr	r3, .L1572+8
 	movs	r5, #0
-	ldr	r0, .L1566+12
+	ldr	r0, .L1572+12
 	ldrh	r4, [r3]
 	ldr	r0, [r0]
 	strh	r5, [r0, r4, lsl #1]	@ movhi
 	strh	r2, [r3]	@ movhi
-	ldr	r2, .L1566+16
+	ldr	r2, .L1572+16
 	ldr	r0, [r1, #4]
 	ldr	r3, [r2, #96]
 	ubfx	r0, r0, #10, #16
@@ -11836,20 +11845,20 @@ Ftl_gc_temp_data_write_back:
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
 	bl	FtlGcPageVarInit
-.L1565:
+.L1571:
 	movs	r0, #1
-.L1559:
+.L1565:
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1561:
+.L1567:
 	ldr	r3, [r1, #12]
 	ldr	r1, [r1, #4]
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
 	bl	FtlGcUpdatePage
-	b	.L1560
-.L1567:
+	b	.L1566
+.L1573:
 	.align	2
-.L1566:
+.L1572:
 	.word	.LANCHOR89
 	.word	.LANCHOR113
 	.word	.LANCHOR53
@@ -11869,34 +11878,34 @@ Ftl_get_new_temp_ppa:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movw	r3, #65535
-	ldr	r4, .L1571
+	ldr	r4, .L1577
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	beq	.L1569
+	beq	.L1575
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1570
-.L1569:
+	cbnz	r3, .L1576
+.L1575:
 	movs	r0, #0
 	movs	r5, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r0, .L1571
+	ldr	r0, .L1577
 	strb	r5, [r4, #8]
 	bl	allocate_data_superblock
-	ldr	r3, .L1571+4
+	ldr	r3, .L1577+4
 	strh	r5, [r3]	@ movhi
-	ldr	r3, .L1571+8
+	ldr	r3, .L1577+8
 	strh	r5, [r3]	@ movhi
 	bl	l2p_flush
 	mov	r0, r5
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1570:
-	ldr	r0, .L1571
+.L1576:
+	ldr	r0, .L1577
 	pop	{r3, r4, r5, lr}
 	b	get_new_active_ppa
-.L1572:
+.L1578:
 	.align	2
-.L1571:
+.L1577:
 	.word	.LANCHOR53
 	.word	.LANCHOR96
 	.word	.LANCHOR97
@@ -11914,27 +11923,27 @@ FtlSysBlkInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r3, #0
-	ldr	r6, .L1588
+	ldr	r6, .L1594
 	strh	r3, [r6]	@ movhi
-	ldr	r3, .L1588+4
+	ldr	r3, .L1594+4
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlScanSysBlk
-	ldr	r3, .L1588+8
+	ldr	r3, .L1594+8
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1574
-.L1576:
+	bne	.L1580
+.L1582:
 	mov	r7, #-1
-.L1573:
+.L1579:
 	mov	r0, r7
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1574:
+.L1580:
 	bl	FtlLoadSysInfo
 	mov	r7, r0
 	cmp	r0, #0
-	bne	.L1576
+	bne	.L1582
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -11944,40 +11953,40 @@ FtlSysBlkInit:
 	bl	FtlPowerLostRecovery
 	movs	r0, #1
 	bl	FtlUpdateVaildLpn
-	ldr	r3, .L1588+12
+	ldr	r3, .L1594+12
 	movs	r0, #12
 	ldrh	r1, [r3]
-	ldr	r3, .L1588+16
+	ldr	r3, .L1594+16
 	ldr	r2, [r3]
 	mov	r3, r7
-.L1577:
+.L1583:
 	cmp	r3, r1
-	bge	.L1582
+	bge	.L1588
 	mla	r4, r0, r3, r2
 	ldr	r4, [r4, #4]
 	cmp	r4, #0
-	bge	.L1578
-.L1582:
-	ldr	r5, .L1588+20
+	bge	.L1584
+.L1588:
+	ldr	r5, .L1594+20
 	cmp	r3, r1
-	ldr	r4, .L1588+24
+	ldr	r4, .L1594+24
 	ldrh	r2, [r5, #28]
 	add	r2, r2, #1
 	strh	r2, [r5, #28]	@ movhi
-	bge	.L1587
-.L1579:
-	ldr	r6, .L1588+28
-	ldr	r0, .L1588+24
+	bge	.L1593
+.L1585:
+	ldr	r6, .L1594+28
+	ldr	r0, .L1594+24
 	bl	FtlSuperblockPowerLostFix
 	mov	r0, r6
 	bl	FtlSuperblockPowerLostFix
-	ldr	r3, .L1588+32
+	ldr	r3, .L1594+32
 	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
-	ldr	r0, .L1588+36
+	ldr	r0, .L1594+36
 	strh	r3, [r2, r1, lsl #1]	@ movhi
 	ldrh	ip, [r6]
 	ldrh	r3, [r0]
@@ -11999,39 +12008,39 @@ FtlSysBlkInit:
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
 	bl	FtlVpcTblFlush
-	b	.L1583
-.L1578:
+	b	.L1589
+.L1584:
 	adds	r3, r3, #1
-	b	.L1577
-.L1587:
+	b	.L1583
+.L1593:
 	ldrh	r3, [r6]
 	cmp	r3, #0
-	bne	.L1579
-.L1583:
+	bne	.L1585
+.L1589:
 	bl	FtlVpcCheckAndModify
 	ldrh	r0, [r4]
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1573
+	beq	.L1579
 	ldrh	r3, [r4, #4]
 	cmp	r3, #0
-	bne	.L1573
-	ldr	r4, .L1588+28
+	bne	.L1579
+	ldr	r4, .L1594+28
 	ldrh	r3, [r4, #4]
 	cmp	r3, #0
-	bne	.L1573
+	bne	.L1579
 	bl	FtlGcRefreshBlock
 	ldrh	r0, [r4]
 	bl	FtlGcRefreshBlock
 	bl	FtlVpcTblFlush
-	ldr	r0, .L1588+24
+	ldr	r0, .L1594+24
 	bl	allocate_new_data_superblock
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-	b	.L1573
-.L1589:
+	b	.L1579
+.L1595:
 	.align	2
-.L1588:
+.L1594:
 	.word	.LANCHOR167
 	.word	.LANCHOR4
 	.word	.LANCHOR79
@@ -12054,33 +12063,33 @@ FtlSysBlkInit:
 rk_ftl_garbage_collect:
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1713
+	ldr	r3, .L1719
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #48
 	str	r0, [sp, #8]
 	ldr	r0, [r3]
 	cmp	r0, #0
-	bne	.L1667
-	ldr	r3, .L1713+4
+	bne	.L1673
+	ldr	r3, .L1719+4
 	ldrh	r3, [r3]
 	cmp	r3, #47
-	bls	.L1590
-	ldr	r3, .L1713+8
+	bls	.L1596
+	ldr	r3, .L1719+8
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1592
-.L1595:
-	ldr	r3, .L1713+12
+	bne	.L1598
+.L1601:
+	ldr	r3, .L1719+12
 	movw	r4, #65535
 	ldrh	r0, [r3]
 	cmp	r0, r4
-	bne	.L1593
-.L1594:
+	bne	.L1599
+.L1600:
 	bl	FtlReadRefresh
-	ldr	r2, .L1713+16
+	ldr	r2, .L1719+16
 	movw	r5, #65535
-	ldr	r6, .L1713+20
+	ldr	r6, .L1719+20
 	ldr	r1, [sp, #8]
 	ldr	r3, [r2]
 	ldrh	r0, [r6]
@@ -12088,251 +12097,251 @@ rk_ftl_garbage_collect:
 	add	r3, r3, r1, lsl #7
 	cmp	r0, r5
 	str	r3, [r2]
-	bne	.L1596
-	ldr	r1, .L1713+24
+	bne	.L1602
+	ldr	r1, .L1719+24
 	ldrh	r1, [r1]
 	cmp	r1, r0
-	bne	.L1597
-	ldr	r0, .L1713+28
+	bne	.L1603
+	ldr	r0, .L1719+28
 	ldrh	r8, [r0]
 	cmp	r8, r1
-	bne	.L1598
-	ldr	r7, .L1713+32
+	bne	.L1604
+	ldr	r7, .L1719+32
 	ldrh	r1, [r7]
 	cmp	r1, #24
 	ite	cc
 	movcc	r1, #5120
 	movcs	r1, #1024
 	cmp	r3, r1
-	bls	.L1598
-	ldr	r3, .L1713+36
+	bls	.L1604
+	ldr	r3, .L1719+36
 	movs	r4, #0
 	str	r4, [r2]
 	strh	r4, [r3]	@ movhi
 	bl	GetSwlReplaceBlock
 	cmp	r0, r8
 	mov	r5, r0
-	bne	.L1671
-	ldr	r8, .L1713+96
+	bne	.L1677
+	ldr	r8, .L1719+96
 	ldrh	r2, [r7]
 	ldrh	r3, [r8]
 	cmp	r2, r3
-	bcs	.L1601
+	bcs	.L1607
 	movs	r0, #64
 	bl	List_get_gc_head_node
 	uxth	r3, r0
 	cmp	r3, r5
-	beq	.L1603
+	beq	.L1609
 	mov	r0, r3
-	ldr	r3, .L1713+40
+	ldr	r3, .L1719+40
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #7
-	bhi	.L1604
+	bhi	.L1610
 	mov	r0, r4
 	bl	List_get_gc_head_node
 	uxth	r4, r0
 	movs	r3, #128
 	strh	r3, [r8]	@ movhi
 	cmp	r4, r5
-	bne	.L1600
-.L1603:
+	bne	.L1606
+.L1609:
 	bl	FtlGcReFreshBadBlk
 	ldr	r3, [sp, #8]
 	cmp	r3, #0
-	bne	.L1606
+	bne	.L1612
 	movw	r3, #65535
 	cmp	r5, r3
-	bne	.L1606
-.L1665:
-	ldr	r3, .L1713+32
+	bne	.L1612
+.L1671:
+	ldr	r3, .L1719+32
 	ldrh	r3, [r3]
 	cmp	r3, #24
-	bhi	.L1672
-	ldr	r2, .L1713+44
+	bhi	.L1678
+	ldr	r2, .L1719+44
 	cmp	r3, #16
 	ldrh	r4, [r2]
-	bls	.L1608
+	bls	.L1614
 	lsrs	r4, r4, #5
-.L1607:
-	ldr	r1, .L1713+48
+.L1613:
+	ldr	r1, .L1719+48
 	ldrh	r2, [r1]
 	cmp	r2, r3
 	mov	r2, r1
-	bcs	.L1611
-	ldr	r3, .L1713+24
+	bcs	.L1617
+	ldr	r3, .L1719+24
 	movw	r0, #65535
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L1612
-	ldr	r0, .L1713+28
+	bne	.L1618
+	ldr	r0, .L1719+28
 	ldrh	r0, [r0]
 	cmp	r0, r3
-	bne	.L1612
-	ldr	r3, .L1713+36
+	bne	.L1618
+	ldr	r3, .L1719+36
 	ldrh	r0, [r3]
-	cbnz	r0, .L1613
-	ldr	r3, .L1713+52
-	ldr	r4, .L1713+56
+	cbnz	r0, .L1619
+	ldr	r3, .L1719+52
+	ldr	r4, .L1719+56
 	ldr	r3, [r3]
 	ldr	r4, [r4]
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, lsr #2
-	bcs	.L1614
-.L1613:
-	ldr	r3, .L1713+60
+	bcs	.L1620
+.L1619:
+	ldr	r3, .L1719+60
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r2]	@ movhi
-.L1615:
-	ldr	r3, .L1713+64
+.L1621:
+	ldr	r3, .L1719+64
 	movs	r2, #0
 	str	r2, [r3]
-.L1590:
+.L1596:
 	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1592:
-	ldr	r2, .L1713+24
+.L1598:
+	ldr	r2, .L1719+24
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L1595
+	beq	.L1601
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
 	cmp	r0, #0
-	beq	.L1595
+	beq	.L1601
 	movs	r0, #1
-	b	.L1590
-.L1593:
-	ldr	r1, .L1713+28
+	b	.L1596
+.L1599:
+	ldr	r1, .L1719+28
 	ldrh	r2, [r1]
 	cmp	r2, r4
 	itt	eq
 	strheq	r0, [r1]	@ movhi
 	strheq	r2, [r3]	@ movhi
-	b	.L1594
-.L1604:
+	b	.L1600
+.L1610:
 	movs	r3, #64
-.L1707:
+.L1713:
 	strh	r3, [r8]	@ movhi
-	b	.L1603
-.L1601:
+	b	.L1609
+.L1607:
 	movs	r3, #80
-	b	.L1707
-.L1671:
+	b	.L1713
+.L1677:
 	mov	r4, r0
-.L1600:
-	ldr	r3, .L1713+40
+.L1606:
+	ldr	r3, .L1719+40
 	mov	r5, r4
-	ldr	r1, .L1713+48
+	ldr	r1, .L1719+48
 	ldrh	r2, [r7]
 	ldr	r3, [r3]
 	ldrh	r1, [r1]
-	ldr	r0, .L1713+68
+	ldr	r0, .L1719+68
 	ldrh	r3, [r3, r4, lsl #1]
 	str	r1, [sp, #4]
-	ldr	r1, .L1713+72
+	ldr	r1, .L1719+72
 	ldr	r1, [r1]
 	ldrh	r1, [r1, r4, lsl #1]
 	str	r1, [sp]
 	mov	r1, r4
 	bl	printf
-	b	.L1603
-.L1608:
+	b	.L1609
+.L1614:
 	cmp	r3, #12
-	bls	.L1609
+	bls	.L1615
 	lsrs	r4, r4, #4
-	b	.L1607
-.L1609:
+	b	.L1613
+.L1615:
 	cmp	r3, #8
-	bls	.L1607
+	bls	.L1613
 	lsrs	r4, r4, #2
-	b	.L1607
-.L1672:
+	b	.L1613
+.L1678:
 	movs	r4, #1
-	b	.L1607
-.L1614:
+	b	.L1613
+.L1620:
 	movs	r3, #18
 	strh	r3, [r1]	@ movhi
-	b	.L1615
-.L1612:
-	ldr	r3, .L1713+60
+	b	.L1621
+.L1618:
+	ldr	r3, .L1719+60
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r2]	@ movhi
-.L1611:
-	ldr	r3, .L1713+76
+.L1617:
+	ldr	r3, .L1719+76
 	ldrh	r3, [r3]
-	cbz	r3, .L1673
+	cbz	r3, .L1679
 	adds	r4, r4, #32
 	uxth	r4, r4
-.L1673:
+.L1679:
 	movw	r5, #65535
-.L1617:
+.L1623:
 	ldrh	r3, [r6]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1626
+	bne	.L1632
 	cmp	r5, r3
-	beq	.L1627
+	beq	.L1633
 	strh	r5, [r6]	@ movhi
-.L1628:
+.L1634:
 	ldrh	r0, [r6]
 	movw	r7, #65535
 	movs	r3, #0
 	strb	r3, [r6, #8]
 	cmp	r0, r7
-	beq	.L1626
+	beq	.L1632
 	bl	IsBlkInGcList
-	cbz	r0, .L1631
+	cbz	r0, .L1637
 	strh	r7, [r6]	@ movhi
-.L1631:
+.L1637:
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1626
-	ldr	r0, .L1713+20
+	beq	.L1632
+	ldr	r0, .L1719+20
 	bl	make_superblock
-	ldr	r2, .L1713+80
+	ldr	r2, .L1719+80
 	movs	r3, #0
 	strh	r3, [r6, #2]	@ movhi
 	strb	r3, [r6, #6]
 	strh	r3, [r2]	@ movhi
-	ldr	r3, .L1713+40
+	ldr	r3, .L1719+40
 	ldrh	r2, [r6]
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r2, lsl #1]
-	ldr	r3, .L1713+84
+	ldr	r3, .L1719+84
 	strh	r2, [r3]	@ movhi
-.L1626:
-	ldr	r2, .L1713+88
+.L1632:
+	ldr	r2, .L1719+88
 	ldrh	r3, [r6]
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L1632
-	ldr	r2, .L1713+92
+	beq	.L1638
+	ldr	r2, .L1719+92
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bne	.L1633
-.L1632:
+	bne	.L1639
+.L1638:
 	movw	r3, #65535
 	strh	r3, [r6]	@ movhi
-.L1633:
-	ldr	fp, .L1713+20
+.L1639:
+	ldr	fp, .L1719+20
 	mov	r6, fp
-.L1663:
+.L1669:
 	ldrh	r2, [fp]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1634
-	ldr	r10, .L1713+100
+	bne	.L1640
+	ldr	r10, .L1719+100
 	movs	r2, #0
-	ldr	r3, .L1713+64
+	ldr	r3, .L1719+64
 	mov	r8, r10
 	str	r2, [r3]
-.L1635:
+.L1641:
 	ldrh	r7, [r10]
 	mov	r0, r7
 	bl	List_get_gc_head_node
@@ -12340,14 +12349,14 @@ rk_ftl_garbage_collect:
 	movw	r1, #65535
 	cmp	r3, r1
 	strh	r3, [r6]	@ movhi
-	bne	.L1636
+	bne	.L1642
 	movs	r3, #0
 	movs	r0, #8
 	strh	r3, [r10]	@ movhi
-	b	.L1590
-.L1714:
+	b	.L1596
+.L1720:
 	.align	2
-.L1713:
+.L1719:
 	.word	.LANCHOR108
 	.word	.LANCHOR45
 	.word	.LANCHOR162
@@ -12374,100 +12383,100 @@ rk_ftl_garbage_collect:
 	.word	.LANCHOR52
 	.word	.LANCHOR83
 	.word	.LANCHOR85
-.L1618:
-	ldr	r3, .L1715
+.L1624:
+	ldr	r3, .L1721
 	movs	r2, #0
-	ldr	r5, .L1715+4
-	ldr	r4, .L1715+8
+	ldr	r5, .L1721+4
+	ldr	r4, .L1721+8
 	str	r2, [r3]
 	ldrh	r2, [r5]
 	ldrh	r3, [r4]
-	ldr	r7, .L1715+12
+	ldr	r7, .L1721+12
 	cmp	r2, r3
-	bls	.L1619
+	bls	.L1625
 	ldrh	r3, [r7]
-	cbnz	r3, .L1620
-	ldr	r3, .L1715+16
-	ldr	r2, .L1715+20
+	cbnz	r3, .L1626
+	ldr	r3, .L1721+16
+	ldr	r2, .L1721+20
 	ldr	r3, [r3]
 	ldr	r2, [r2]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, lsr #2
-	bcs	.L1621
-.L1620:
-	ldr	r3, .L1715+24
+	bcs	.L1627
+.L1626:
+	ldr	r3, .L1721+24
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
-.L1708:
+.L1714:
 	strh	r3, [r4]	@ movhi
 	bl	FtlReadRefresh
 	movs	r0, #0
 	bl	List_get_gc_head_node
-	ldr	r3, .L1715+28
+	ldr	r3, .L1721+28
 	uxth	r0, r0
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #4
-	bls	.L1619
-.L1711:
+	bls	.L1625
+.L1717:
 	ldrh	r0, [r7]
-	b	.L1590
-.L1621:
+	b	.L1596
+.L1627:
 	movs	r3, #18
-	b	.L1708
-.L1619:
+	b	.L1714
+.L1625:
 	ldrh	r0, [r7]
 	cmp	r0, #0
-	bne	.L1623
-	ldr	r3, .L1715+24
+	bne	.L1629
+	ldr	r3, .L1721+24
 	ldrh	r8, [r3]
 	add	r2, r8, r8, lsl #1
 	asrs	r2, r2, #2
 	strh	r2, [r4]	@ movhi
 	bl	List_get_gc_head_node
-	ldr	r3, .L1715+28
+	ldr	r3, .L1721+28
 	uxth	r0, r0
-	ldr	r2, .L1715+32
+	ldr	r2, .L1721+32
 	ldr	r3, [r3]
 	ldrh	r2, [r2]
 	ldrh	r1, [r3, r0, lsl #1]
-	ldr	r3, .L1715+36
+	ldr	r3, .L1721+36
 	ldrh	r3, [r3]
 	muls	r2, r3, r2
 	cmp	r1, r2, asr #1
-	ble	.L1624
+	ble	.L1630
 	ldrh	r2, [r5]
 	add	r3, r8, #-1
 	cmp	r2, r3
-	blt	.L1624
+	blt	.L1630
 	bl	FtlReadRefresh
-	b	.L1711
-.L1624:
+	b	.L1717
+.L1630:
 	cmp	r1, #0
-	bne	.L1623
+	bne	.L1629
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	ldrh	r0, [r5]
 	adds	r0, r0, #1
-	b	.L1590
-.L1627:
-	ldr	r3, .L1715+40
+	b	.L1596
+.L1633:
+	ldr	r3, .L1721+40
 	ldrh	r2, [r3]
 	cmp	r2, r5
-	beq	.L1628
-	ldr	r1, .L1715+28
+	beq	.L1634
+	ldr	r1, .L1721+28
 	ldr	r1, [r1]
 	ldrh	r2, [r1, r2, lsl #1]
-	cbnz	r2, .L1629
+	cbnz	r2, .L1635
 	strh	r5, [r3]	@ movhi
-.L1629:
+.L1635:
 	ldrh	r2, [r3]
 	strh	r2, [r6]	@ movhi
 	movw	r2, #65535
 	strh	r2, [r3]	@ movhi
-	b	.L1628
-.L1636:
+	b	.L1634
+.L1642:
 	str	r0, [sp, #16]
 	mov	r0, r3
 	str	r3, [sp, #12]
@@ -12475,11 +12484,11 @@ rk_ftl_garbage_collect:
 	bl	IsBlkInGcList
 	ldr	r3, [sp, #12]
 	ldr	r2, [sp, #16]
-	cbz	r0, .L1637
+	cbz	r0, .L1643
 	strh	r7, [r10]	@ movhi
-	b	.L1635
-.L1637:
-	ldr	lr, .L1715+28
+	b	.L1641
+.L1643:
+	ldr	lr, .L1721+28
 	uxth	r0, r2
 	uxth	r7, r7
 	ldr	r2, [lr]
@@ -12487,111 +12496,111 @@ rk_ftl_garbage_collect:
 	str	lr, [sp, #16]
 	ldrh	ip, [r2, r0, lsl #1]
 	str	r2, [sp, #12]
-	ldr	r2, .L1715+44
+	ldr	r2, .L1721+44
 	ldrh	r2, [r2]
 	mov	r1, r2
-	ldr	r2, .L1715+32
+	ldr	r2, .L1721+32
 	ldrh	r2, [r2]
 	muls	r2, r1, r2
 	cmp	ip, r2, asr #1
-	bgt	.L1639
+	bgt	.L1645
 	cmp	r7, #48
-	bls	.L1640
+	bls	.L1646
 	cmp	ip, #8
-	bls	.L1640
-	ldr	r7, .L1715+48
+	bls	.L1646
+	ldr	r7, .L1721+48
 	ldrh	r7, [r7]
 	cmp	r7, #35
-	bhi	.L1640
-.L1639:
+	bhi	.L1646
+.L1645:
 	movs	r7, #0
 	strh	r7, [r8]	@ movhi
-.L1640:
+.L1646:
 	ldr	r1, [sp, #12]
 	ldrh	r1, [r1, r0, lsl #1]
 	cmp	r2, r1
-	bgt	.L1641
+	bgt	.L1647
 	movw	r2, #65535
 	cmp	r5, r2
-	bne	.L1641
+	bne	.L1647
 	ldrh	r2, [r8]
 	cmp	r2, #3
-	bhi	.L1641
+	bhi	.L1647
 	movs	r3, #0
 	strh	r5, [r6]	@ movhi
 	strh	r3, [r8]	@ movhi
-.L1712:
-	ldr	r3, .L1715+12
+.L1718:
+	ldr	r3, .L1721+12
 	ldrh	r0, [r3]
-	b	.L1590
-.L1641:
-	cbnz	r1, .L1642
+	b	.L1596
+.L1647:
+	cbnz	r1, .L1648
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	ldrh	r3, [r8]
 	adds	r3, r3, #1
 	strh	r3, [r8]	@ movhi
-	b	.L1635
-.L1642:
+	b	.L1641
+.L1648:
 	movs	r2, #0
 	strb	r2, [r6, #8]
-	ldr	r2, .L1715+52
+	ldr	r2, .L1721+52
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bne	.L1643
+	bne	.L1649
 	mov	r2, #700
-	ldr	r1, .L1715+56
-	ldr	r0, .L1715+60
+	ldr	r1, .L1721+56
+	ldr	r0, .L1721+60
 	bl	printf
-.L1643:
-	ldr	r3, .L1715+64
+.L1649:
+	ldr	r3, .L1721+64
 	ldrh	r2, [r6]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1644
+	bne	.L1650
 	movw	r2, #701
-	ldr	r1, .L1715+56
-	ldr	r0, .L1715+60
+	ldr	r1, .L1721+56
+	ldr	r0, .L1721+60
 	bl	printf
-.L1644:
-	ldr	r3, .L1715+68
+.L1650:
+	ldr	r3, .L1721+68
 	ldrh	r2, [r6]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1645
+	bne	.L1651
 	movw	r2, #702
-	ldr	r1, .L1715+56
-	ldr	r0, .L1715+60
+	ldr	r1, .L1721+56
+	ldr	r0, .L1721+60
 	bl	printf
-.L1645:
+.L1651:
 	mov	r0, fp
 	bl	make_superblock
-	ldr	r2, .L1715+72
+	ldr	r2, .L1721+72
 	movs	r3, #0
 	ldrh	r1, [r6]
 	strh	r3, [r2]	@ movhi
 	ldr	r2, [sp, #16]
 	ldr	r2, [r2]
 	ldrh	r1, [r2, r1, lsl #1]
-	ldr	r2, .L1715+76
+	ldr	r2, .L1721+76
 	strh	r3, [r6, #2]	@ movhi
 	strb	r3, [r6, #6]
 	strh	r1, [r2]	@ movhi
-.L1634:
-	ldr	r3, .L1715+80
+.L1640:
+	ldr	r3, .L1721+80
 	movs	r2, #1
 	str	r2, [r3]
-	ldr	r3, .L1715+44
+	ldr	r3, .L1721+44
 	ldrh	r3, [r3]
 	str	r3, [sp, #20]
 	ldr	r3, [sp, #8]
-	cbz	r3, .L1646
-	ldr	r3, .L1715+32
+	cbz	r3, .L1652
+	ldr	r3, .L1721+32
 	ldr	r2, [sp, #20]
 	ldrh	r1, [r6]
 	ldrh	r3, [r3]
 	muls	r3, r2, r3
-	ldr	r2, .L1715+28
+	ldr	r2, .L1721+28
 	ldr	r2, [r2]
 	ldrh	r2, [r2, r1, lsl #1]
 	subs	r3, r3, r2
@@ -12599,7 +12608,7 @@ rk_ftl_garbage_collect:
 	addmi	r3, r3, #3
 	add	r4, r4, r3, asr #2
 	uxth	r4, r4
-.L1646:
+.L1652:
 	ldrh	r3, [r6, #2]
 	ldr	r1, [sp, #20]
 	adds	r2, r3, r4
@@ -12610,29 +12619,29 @@ rk_ftl_garbage_collect:
 	mov	r3, #0
 	it	gt
 	uxthgt	r4, r4
-.L1710:
+.L1716:
 	str	r3, [sp, #28]
 	ldrh	r3, [sp, #28]
 	cmp	r4, r3
-	bls	.L1657
-	ldr	r3, .L1715+32
+	bls	.L1663
+	ldr	r3, .L1721+32
 	movw	lr, #65535
 	ldrh	r1, [fp, #2]
 	mov	ip, #20
-	ldr	r7, .L1715+84
+	ldr	r7, .L1721+84
 	ldrh	r8, [r3]
-	ldr	r3, .L1715+88
+	ldr	r3, .L1721+88
 	ldr	r0, [r3]
 	ldr	r3, [sp, #28]
 	adds	r3, r1, r3
 	str	r3, [sp, #16]
 	movs	r3, #0
 	str	r3, [sp, #12]
-	b	.L1658
-.L1651:
+	b	.L1664
+.L1657:
 	ldrh	r2, [r7, #2]!
 	cmp	r2, lr
-	beq	.L1650
+	beq	.L1656
 	ldr	r1, [sp, #12]
 	mla	r10, ip, r1, r0
 	ldr	r1, [sp, #16]
@@ -12642,28 +12651,28 @@ rk_ftl_garbage_collect:
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r2, [sp, #12]
-.L1650:
+.L1656:
 	adds	r3, r3, #1
-.L1658:
+.L1664:
 	uxth	r2, r3
 	cmp	r8, r2
-	bhi	.L1651
+	bhi	.L1657
 	ldrb	r2, [fp, #8]	@ zero_extendqisi2
 	ldr	r1, [sp, #12]
 	bl	FlashReadPages
 	movs	r3, #0
-.L1709:
+.L1715:
 	str	r3, [sp, #24]
 	ldr	r2, [sp, #12]
 	ldrh	r3, [sp, #24]
 	cmp	r2, r3
-	bhi	.L1656
+	bhi	.L1662
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
-	b	.L1710
-.L1716:
+	b	.L1716
+.L1722:
 	.align	2
-.L1715:
+.L1721:
 	.word	.LANCHOR87
 	.word	.LANCHOR48
 	.word	.LANCHOR82
@@ -12687,51 +12696,51 @@ rk_ftl_garbage_collect:
 	.word	.LANCHOR108
 	.word	.LANCHOR80+14
 	.word	.LANCHOR93
-.L1656:
+.L1662:
 	ldr	r3, [sp, #24]
 	movs	r7, #20
 	muls	r7, r3, r7
-	ldr	r3, .L1717
+	ldr	r3, .L1723
 	ldr	r3, [r3]
 	adds	r2, r3, r7
 	ldr	r3, [r3, r7]
 	adds	r3, r3, #1
-	beq	.L1653
+	beq	.L1659
 	ldr	r3, [r2, #12]
 	ldrh	r2, [r3]
 	str	r3, [sp, #16]
 	movw	r3, #61589
 	cmp	r2, r3
-	bne	.L1653
+	bne	.L1659
 	ldr	r3, [sp, #16]
 	ldr	r8, [r3, #8]
 	cmp	r8, #-1
-	bne	.L1654
+	bne	.L1660
 	mov	r2, #736
-	ldr	r1, .L1717+4
-	ldr	r0, .L1717+8
+	ldr	r1, .L1723+4
+	ldr	r0, .L1723+8
 	bl	printf
-.L1654:
+.L1660:
 	movs	r2, #0
 	add	r1, sp, #44
 	mov	r0, r8
 	bl	log2phys
-	ldr	r3, .L1717
+	ldr	r3, .L1723
 	ldr	r1, [r3]
 	ldr	r3, [sp, #44]
 	add	r1, r1, r7
 	ldr	r2, [r1, #4]
 	cmp	r2, r3
-	bne	.L1653
-	ldr	r3, .L1717+12
+	bne	.L1659
+	ldr	r3, .L1723+12
 	mov	r10, #20
-	ldr	r2, .L1717+12
-	ldr	r8, .L1717+32
+	ldr	r2, .L1723+12
+	ldr	r8, .L1723+32
 	ldrh	r3, [r3]
 	ldr	r1, [r1, #16]
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L1717+16
+	ldr	r2, .L1723+16
 	ldr	r3, [r8]
 	ldr	r0, [r2]
 	str	r2, [sp, #36]
@@ -12746,11 +12755,11 @@ rk_ftl_garbage_collect:
 	ldr	r2, [r2]
 	ldr	r3, [r8]
 	mla	r10, r10, r3, r2
-	ldr	r2, .L1717
+	ldr	r2, .L1723
 	adds	r3, r3, #1
 	ldr	r0, [r2]
 	add	r0, r0, r7
-	ldr	r7, .L1717+20
+	ldr	r7, .L1723+20
 	ldr	r2, [r0, #8]
 	str	r2, [r10, #8]
 	ldr	r2, [r0, #12]
@@ -12759,7 +12768,7 @@ rk_ftl_garbage_collect:
 	str	r2, [r1, #12]
 	ldrh	r2, [r7]
 	strh	r2, [r1, #2]	@ movhi
-	ldr	r2, .L1717+24
+	ldr	r2, .L1723+24
 	str	r3, [r8]
 	ldr	r2, [r2]
 	str	r2, [r1, #4]
@@ -12768,114 +12777,114 @@ rk_ftl_garbage_collect:
 	ldrb	r2, [r7, #7]	@ zero_extendqisi2
 	ldr	r3, [r8]
 	cmp	r2, r3
-	beq	.L1655
+	beq	.L1661
 	ldrh	r3, [r7, #4]
-	cbnz	r3, .L1653
-.L1655:
+	cbnz	r3, .L1659
+.L1661:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	r0, .L1653
-	ldr	r3, .L1717+28
+	cbz	r0, .L1659
+	ldr	r3, .L1723+28
 	movs	r2, #0
 	str	r2, [r3]
-	b	.L1712
-.L1653:
+	b	.L1718
+.L1659:
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	b	.L1709
-.L1657:
+	b	.L1715
+.L1663:
 	ldrh	r3, [fp, #2]
 	add	r4, r4, r3
 	ldr	r3, [sp, #20]
 	uxth	r4, r4
 	cmp	r3, r4
 	strh	r4, [fp, #2]	@ movhi
-	ldr	r4, .L1717+28
-	bhi	.L1659
-	ldr	r3, .L1717+32
+	ldr	r4, .L1723+28
+	bhi	.L1665
+	ldr	r3, .L1723+32
 	ldr	r3, [r3]
-	cbz	r3, .L1660
+	cbz	r3, .L1666
 	bl	Ftl_gc_temp_data_write_back
-	cbz	r0, .L1660
+	cbz	r0, .L1666
 	movs	r3, #0
 	str	r3, [r4]
-	b	.L1712
-.L1660:
-	ldr	r3, .L1717+12
+	b	.L1718
+.L1666:
+	ldr	r3, .L1723+12
 	ldrh	r1, [r3]
-	cbnz	r1, .L1661
-	ldr	r3, .L1717+36
+	cbnz	r1, .L1667
+	ldr	r3, .L1723+36
 	ldrh	r2, [fp]
 	ldr	r3, [r3]
 	ldrh	r0, [r3, r2, lsl #1]
-	cbz	r0, .L1661
+	cbz	r0, .L1667
 	strh	r1, [r3, r2, lsl #1]	@ movhi
 	ldrh	r0, [fp]
 	bl	update_vpc_list
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1661:
+.L1667:
 	movw	r3, #65535
 	strh	r3, [fp]	@ movhi
-.L1659:
+.L1665:
 	movs	r3, #0
 	str	r3, [r4]
-	ldr	r3, .L1717+40
+	ldr	r3, .L1723+40
 	ldrh	r3, [r3]
 	cmp	r3, #2
-	bhi	.L1662
-	ldr	r3, .L1717+44
+	bhi	.L1668
+	ldr	r3, .L1723+44
 	ldrh	r4, [r3]
-	b	.L1663
-.L1662:
-	ldr	r2, .L1717+48
+	b	.L1669
+.L1668:
+	ldr	r2, .L1723+48
 	ldrh	r0, [r2]
 	cmp	r0, #0
-	bne	.L1590
+	bne	.L1596
 	adds	r0, r3, #1
-	b	.L1590
-.L1667:
+	b	.L1596
+.L1673:
 	movs	r0, #0
-	b	.L1590
-.L1596:
+	b	.L1596
+.L1602:
 	ldr	r3, [sp, #8]
 	cmp	r3, #0
-	beq	.L1665
-.L1606:
-	ldr	r3, .L1717+20
+	beq	.L1671
+.L1612:
+	ldr	r3, .L1723+20
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1676
-.L1666:
-	ldr	r3, .L1717+52
+	bne	.L1682
+.L1672:
+	ldr	r3, .L1723+52
 	movw	r2, #65535
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bne	.L1676
+	bne	.L1682
 	cmp	r5, r3
-	bne	.L1676
+	bne	.L1682
 	ldrh	r3, [r6]
 	cmp	r3, r5
-	beq	.L1618
-.L1623:
+	beq	.L1624
+.L1629:
 	movw	r5, #65535
-.L1676:
+.L1682:
 	movs	r4, #1
-	b	.L1617
-.L1598:
+	b	.L1623
+.L1604:
 	ldr	r3, [sp, #8]
 	cmp	r3, #0
-	beq	.L1665
+	beq	.L1671
 	movw	r5, #65535
-	b	.L1666
-.L1597:
+	b	.L1672
+.L1603:
 	ldr	r3, [sp, #8]
 	cmp	r3, #0
-	bne	.L1623
-	b	.L1665
-.L1718:
+	bne	.L1629
+	b	.L1671
+.L1724:
 	.align	2
-.L1717:
+.L1723:
 	.word	.LANCHOR93
 	.word	.LANCHOR180
 	.word	.LC1
@@ -12904,41 +12913,41 @@ sftl_init:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
 	mov	r3, #-1
-	ldr	r4, .L1725
-	ldr	r1, .L1725+4
-	ldr	r0, .L1725+8
+	ldr	r4, .L1731
+	ldr	r1, .L1731+4
+	ldr	r0, .L1731+8
 	str	r3, [r4]
 	bl	printf
-	ldr	r0, .L1725+12
+	ldr	r0, .L1731+12
 	bl	FtlConstantsInit
 	bl	FtlMemInit
 	bl	FtlVariablesInit
-	ldr	r3, .L1725+16
+	ldr	r3, .L1731+16
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbnz	r0, .L1723
+	cbnz	r0, .L1729
 	bl	FtlSysBlkInit
-	cbnz	r0, .L1723
+	cbnz	r0, .L1729
 	movs	r3, #1
 	str	r3, [r4]
-	ldr	r3, .L1725+20
+	ldr	r3, .L1731+20
 	ldrh	r3, [r3]
 	cmp	r3, #15
-	bhi	.L1723
+	bhi	.L1729
 	movw	r4, #8129
-.L1722:
+.L1728:
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
 	subs	r4, r4, #1
-	bne	.L1722
-.L1723:
+	bne	.L1728
+.L1729:
 	movs	r0, #0
 	pop	{r4, pc}
-.L1726:
+.L1732:
 	.align	2
-.L1725:
+.L1731:
 	.word	.LANCHOR86
 	.word	.LC70
 	.word	.LC71
@@ -12979,31 +12988,31 @@ FtlRead:
 	mov	r6, r1
 	mov	r8, r3
 	str	r2, [sp, #24]
-	bne	.L1729
+	bne	.L1735
 	mov	r2, r3
 	ldr	r1, [sp, #24]
 	add	r0, r6, #256
 	bl	FtlVendorPartRead
 	str	r0, [sp, #4]
-.L1728:
+.L1734:
 	ldr	r0, [sp, #4]
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1729:
+.L1735:
 	ldr	r3, [sp, #24]
 	adds	r3, r1, r3
 	str	r3, [sp, #12]
-	ldr	r3, .L1761
+	ldr	r3, .L1767
 	ldr	r2, [sp, #12]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1750
-	ldr	r3, .L1761+4
+	bhi	.L1756
+	ldr	r3, .L1767+4
 	ldr	r3, [r3]
 	adds	r4, r3, #1
-	beq	.L1751
-	ldr	r3, .L1761+8
+	beq	.L1757
+	ldr	r3, .L1767+8
 	mov	r0, r6
 	movs	r7, #0
 	mov	r5, r7
@@ -13016,7 +13025,7 @@ FtlRead:
 	subs	r0, r3, #1
 	bl	__aeabi_uidiv
 	ldr	r3, [sp, #16]
-	ldr	r2, .L1761+12
+	ldr	r2, .L1767+12
 	ldr	r1, [sp, #24]
 	rsb	r3, r3, #1
 	ldr	r4, [sp, #16]
@@ -13029,54 +13038,54 @@ FtlRead:
 	add	r3, r3, r1
 	ldr	r1, [sp, #8]
 	str	r3, [r2]
-	ldr	r2, .L1761+16
+	ldr	r2, .L1767+16
 	str	r7, [sp, #4]
 	ldr	r3, [r2]
 	add	r3, r3, r1
 	str	r3, [r2]
-.L1731:
+.L1737:
 	ldr	r3, [sp, #8]
-	cbnz	r3, .L1748
-	ldr	r3, .L1761+20
+	cbnz	r3, .L1754
+	ldr	r3, .L1767+20
 	ldrh	r3, [r3]
-	cbnz	r3, .L1749
-	ldr	r3, .L1761+24
+	cbnz	r3, .L1755
+	ldr	r3, .L1767+24
 	ldrh	r3, [r3]
 	cmp	r3, #31
-	bhi	.L1728
-.L1749:
+	bhi	.L1734
+.L1755:
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
-	b	.L1728
-.L1748:
+	b	.L1734
+.L1754:
 	movs	r2, #0
 	add	r1, sp, #52
 	mov	r0, r4
 	bl	log2phys
 	ldr	r3, [sp, #52]
 	adds	r0, r3, #1
-	bne	.L1732
-	ldr	fp, .L1761+8
+	bne	.L1738
+	ldr	fp, .L1767+8
 	mov	r10, #0
-.L1733:
+.L1739:
 	ldrh	r0, [fp]
 	cmp	r10, r0
-	bcc	.L1735
-.L1736:
+	bcc	.L1741
+.L1742:
 	ldr	r3, [sp, #8]
 	adds	r4, r4, #1
 	subs	r3, r3, #1
 	str	r3, [sp, #8]
-	beq	.L1740
-	ldr	r3, .L1761+28
+	beq	.L1746
+	ldr	r3, .L1767+28
 	ldrh	r3, [r3]
 	cmp	r5, r3, lsl #2
-	bne	.L1731
-.L1740:
+	bne	.L1737
+.L1746:
 	cmp	r5, #0
-	beq	.L1731
-	ldr	r3, .L1761+32
+	beq	.L1737
+	ldr	r3, .L1767+32
 	movs	r2, #0
 	mov	r1, r5
 	mov	r10, #0
@@ -13090,29 +13099,29 @@ FtlRead:
 	ldr	r3, [sp, #32]
 	lsls	r3, r3, #9
 	str	r3, [sp, #40]
-.L1747:
+.L1753:
 	movs	r3, #20
 	mul	fp, r3, r10
-	ldr	r3, .L1761+32
+	ldr	r3, .L1767+32
 	ldr	r2, [r3]
 	ldr	r3, [sp, #16]
 	add	r2, r2, fp
 	ldr	r1, [r2, #16]
 	cmp	r3, r1
-	bne	.L1742
+	bne	.L1748
 	ldr	r1, [r2, #8]
-	ldr	r2, .L1761+36
+	ldr	r2, .L1767+36
 	ldr	r2, [r2]
 	cmp	r1, r2
-	bne	.L1743
+	bne	.L1749
 	ldr	r3, [sp, #36]
 	mov	r0, r8
 	ldr	r2, [sp, #40]
 	add	r1, r1, r3
-.L1760:
+.L1766:
 	bl	ftl_memcpy
-.L1743:
-	ldr	r3, .L1761+32
+.L1749:
+	ldr	r3, .L1767+32
 	ldr	r3, [r3]
 	add	r2, r3, fp
 	ldr	r3, [r3, fp]
@@ -13121,49 +13130,49 @@ FtlRead:
 	ldr	r0, [r0, #8]
 	cmp	r1, r0
 	itttt	ne
-	ldrne	r0, .L1761+40
+	ldrne	r0, .L1767+40
 	ldrne	r1, [r0, #72]
 	addne	r1, r1, #1
 	strne	r1, [r0, #72]
 	adds	r1, r3, #1
-	bne	.L1745
-	ldr	r1, .L1761+40
+	bne	.L1751
+	ldr	r1, .L1767+40
 	str	r3, [sp, #4]
 	ldr	r2, [r1, #72]
 	adds	r2, r2, #1
 	str	r2, [r1, #72]
-.L1746:
+.L1752:
 	add	r10, r10, #1
 	cmp	r5, r10
-	bne	.L1747
+	bne	.L1753
 	movs	r5, #0
-	b	.L1731
-.L1735:
+	b	.L1737
+.L1741:
 	mla	r0, r0, r4, r10
 	cmp	r6, r0
-	bhi	.L1734
+	bhi	.L1740
 	ldr	r3, [sp, #12]
 	cmp	r3, r0
-	bls	.L1734
+	bls	.L1740
 	subs	r0, r0, r6
 	mov	r2, #512
 	movs	r1, #0
 	add	r0, r8, r0, lsl #9
 	bl	ftl_memset
-.L1734:
+.L1740:
 	add	r10, r10, #1
-	b	.L1733
-.L1732:
-	ldr	r2, .L1761+32
+	b	.L1739
+.L1738:
+	ldr	r2, .L1767+32
 	mov	r10, #20
 	ldr	r2, [r2]
 	mla	r10, r10, r5, r2
 	str	r3, [r10, #4]
 	ldr	r3, [sp, #16]
 	cmp	r4, r3
-	ldr	r3, .L1761+8
-	bne	.L1737
-	ldr	r2, .L1761+36
+	ldr	r3, .L1767+8
+	bne	.L1743
+	ldr	r2, .L1767+36
 	mov	r0, r6
 	ldrh	fp, [r3]
 	ldr	r2, [r2]
@@ -13178,11 +13187,11 @@ FtlRead:
 	movcs	r3, r2
 	cmp	fp, r3
 	str	r3, [sp, #32]
-	bne	.L1738
+	bne	.L1744
 	str	r8, [r10, #8]
-.L1738:
-	ldr	r3, .L1761+44
-	ldr	r2, .L1761+48
+.L1744:
+	ldr	r3, .L1767+44
+	ldr	r2, .L1767+48
 	str	r4, [r10, #16]
 	ldrh	r3, [r3]
 	ldr	r2, [r2]
@@ -13191,12 +13200,12 @@ FtlRead:
 	bic	r3, r3, #3
 	add	r3, r3, r2
 	str	r3, [r10, #12]
-	b	.L1736
-.L1737:
+	b	.L1742
+.L1743:
 	ldr	r2, [sp, #20]
 	cmp	r4, r2
-	bne	.L1739
-	ldr	r2, .L1761+52
+	bne	.L1745
+	ldr	r2, .L1767+52
 	ldr	r1, [sp, #12]
 	ldr	r2, [r2]
 	str	r2, [r10, #8]
@@ -13204,49 +13213,49 @@ FtlRead:
 	mul	r3, r2, r4
 	subs	r7, r1, r3
 	cmp	r2, r7
-	bne	.L1738
-.L1759:
+	bne	.L1744
+.L1765:
 	subs	r3, r3, r6
 	add	r3, r8, r3, lsl #9
 	str	r3, [r10, #8]
-	b	.L1738
-.L1739:
+	b	.L1744
+.L1745:
 	ldrh	r3, [r3]
 	muls	r3, r4, r3
-	b	.L1759
-.L1742:
+	b	.L1765
+.L1748:
 	ldr	r3, [sp, #20]
 	cmp	r3, r1
-	bne	.L1743
-	ldr	r3, .L1761+52
+	bne	.L1749
+	ldr	r3, .L1767+52
 	ldr	r1, [r2, #8]
 	ldr	r2, [r3]
 	cmp	r1, r2
-	bne	.L1743
-	ldr	r2, .L1761+8
+	bne	.L1749
+	ldr	r2, .L1767+8
 	ldr	r3, [sp, #20]
 	ldrh	r0, [r2]
 	ldr	r2, [sp, #44]
 	muls	r0, r3, r0
 	subs	r0, r0, r6
 	add	r0, r8, r0, lsl #9
-	b	.L1760
-.L1745:
+	b	.L1766
+.L1751:
 	cmp	r3, #256
-	bne	.L1746
+	bne	.L1752
 	ldr	r0, [r2, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-	b	.L1746
-.L1750:
+	b	.L1752
+.L1756:
 	mov	r3, #-1
-.L1751:
+.L1757:
 	str	r3, [sp, #4]
-	b	.L1728
-.L1762:
+	b	.L1734
+.L1768:
 	.align	2
-.L1761:
+.L1767:
 	.word	.LANCHOR34
 	.word	.LANCHOR86
 	.word	.LANCHOR12
@@ -13297,46 +13306,46 @@ FtlWrite:
 	str	r1, [sp, #4]
 	str	r2, [sp, #20]
 	str	r3, [sp, #16]
-	bne	.L1765
+	bne	.L1771
 	mov	r2, r3
 	ldr	r3, [sp, #4]
 	ldr	r1, [sp, #20]
 	add	r0, r3, #256
 	bl	FtlVendorPartWrite
-.L1764:
+.L1770:
 	add	sp, sp, #72
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1765:
+.L1771:
 	ldr	r3, [sp, #4]
 	ldr	r2, [sp, #20]
 	adds	r4, r3, r2
-	ldr	r3, .L1816
+	ldr	r3, .L1822
 	ldr	r3, [r3]
 	cmp	r4, r3
-	bhi	.L1802
-	ldr	r3, .L1816+4
+	bhi	.L1808
+	ldr	r3, .L1822+4
 	ldr	r0, [r3]
 	adds	r5, r0, #1
-	beq	.L1764
-	ldr	r3, .L1816+8
+	beq	.L1770
+	ldr	r3, .L1822+8
 	mov	r2, #2048
 	ldr	r0, [sp, #4]
 	str	r2, [r3]
-	ldr	r3, .L1816+12
+	ldr	r3, .L1822+12
 	ldrh	r5, [r3]
 	mov	r1, r5
 	bl	__aeabi_uidiv
 	mov	r1, r5
 	str	r0, [sp, #12]
 	subs	r0, r4, #1
-	ldr	r5, .L1816+16
+	ldr	r5, .L1822+16
 	bl	__aeabi_uidiv
 	ldr	r2, [sp, #12]
 	ldr	r1, [sp, #20]
 	str	r0, [sp, #28]
 	subs	r3, r0, r2
-	ldr	r2, .L1816+20
+	ldr	r2, .L1822+20
 	str	r3, [sp, #32]
 	adds	r3, r3, #1
 	str	r3, [sp, #8]
@@ -13344,70 +13353,70 @@ FtlWrite:
 	add	r3, r3, r1
 	ldr	r1, [sp, #8]
 	str	r3, [r2]
-	ldr	r2, .L1816+24
+	ldr	r2, .L1822+24
 	ldr	r3, [r2]
 	add	r3, r3, r1
 	str	r3, [r2]
-	ldr	r3, .L1816+28
+	ldr	r3, .L1822+28
 	ldr	r3, [r3]
-	cbz	r3, .L1767
+	cbz	r3, .L1773
 	ldrh	r2, [r5, #4]
-	ldr	r3, .L1816+32
+	ldr	r3, .L1822+32
 	cmp	r2, #0
 	it	eq
 	moveq	r5, r3
-.L1767:
+.L1773:
 	ldr	r6, [sp, #12]
-.L1768:
+.L1774:
 	ldr	r3, [sp, #8]
-	cbnz	r3, .L1797
-	ldr	r5, .L1816+36
+	cbnz	r3, .L1803
+	ldr	r5, .L1822+36
 	mov	r0, r3
 	ldr	r1, [sp, #32]
 	bl	rk_ftl_garbage_collect
 	ldrh	r2, [r5]
 	cmp	r2, #5
-	bls	.L1798
-.L1800:
+	bls	.L1804
+.L1806:
 	movs	r0, #0
-	b	.L1764
-.L1797:
-	ldr	r3, .L1816+40
+	b	.L1770
+.L1803:
+	ldr	r3, .L1822+40
 	ldrb	r2, [r5, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1769
+	bcc	.L1775
 	movw	r2, #1011
-	ldr	r1, .L1816+44
-	ldr	r0, .L1816+48
+	ldr	r1, .L1822+44
+	ldr	r0, .L1822+48
 	bl	printf
-.L1769:
+.L1775:
 	ldrh	r2, [r5, #4]
-	cbnz	r2, .L1770
-	ldr	r3, .L1816+16
-	ldr	r4, .L1816+28
+	cbnz	r2, .L1776
+	ldr	r3, .L1822+16
+	ldr	r4, .L1822+28
 	cmp	r5, r3
-	bne	.L1771
-	ldr	r0, .L1816+32
+	bne	.L1777
+	ldr	r0, .L1822+32
 	ldrh	r5, [r0, #4]
-	cbnz	r5, .L1772
+	cbnz	r5, .L1778
 	bl	allocate_new_data_superblock
 	str	r5, [r4]
-.L1772:
-	ldr	r0, .L1816+16
+.L1778:
+	ldr	r0, .L1822+16
 	bl	allocate_new_data_superblock
-	ldr	r5, .L1816+16
+	ldr	r5, .L1822+16
 	ldr	r2, [r4]
-	ldr	r3, .L1816+32
+	ldr	r3, .L1822+32
 	cmp	r2, #0
 	it	ne
 	movne	r5, r3
-.L1773:
+.L1779:
 	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1770
+	cbnz	r3, .L1776
 	mov	r0, r5
 	bl	allocate_new_data_superblock
-.L1770:
+.L1776:
 	ldrh	r2, [r5, #4]
 	ldr	r3, [sp, #8]
 	cmp	r2, r3
@@ -13418,25 +13427,25 @@ FtlWrite:
 	cmp	r2, r3
 	it	cs
 	movcs	r2, r3
-	ldr	r3, .L1816+40
+	ldr	r3, .L1822+40
 	str	r2, [sp, #44]
 	ldrb	r2, [r5, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1774
+	bcc	.L1780
 	movw	r2, #1044
-	ldr	r1, .L1816+44
-	ldr	r0, .L1816+48
+	ldr	r1, .L1822+44
+	ldr	r0, .L1822+48
 	bl	printf
-.L1774:
-	ldr	r8, .L1816+52
+.L1780:
+	ldr	r8, .L1822+52
 	mov	fp, #0
-.L1775:
+.L1781:
 	ldr	r3, [sp, #44]
 	cmp	fp, r3
-	bne	.L1795
-.L1776:
-	ldr	r0, .L1816+52
+	bne	.L1801
+.L1782:
+	ldr	r0, .L1822+52
 	mov	r3, r5
 	movs	r2, #0
 	mov	r1, fp
@@ -13444,30 +13453,30 @@ FtlWrite:
 	bl	FtlProgPages
 	ldr	r3, [sp, #8]
 	cmp	fp, r3
-	bls	.L1796
+	bls	.L1802
 	movw	r2, #1121
-	ldr	r1, .L1816+44
-	ldr	r0, .L1816+48
+	ldr	r1, .L1822+44
+	ldr	r0, .L1822+48
 	bl	printf
-.L1796:
+.L1802:
 	ldr	r3, [sp, #8]
 	sub	r3, r3, fp
 	str	r3, [sp, #8]
-	b	.L1768
-.L1771:
+	b	.L1774
+.L1777:
 	str	r2, [r4]
 	ldrh	r2, [r3, #4]
-	cbnz	r2, .L1807
+	cbnz	r2, .L1813
 	mov	r0, r5
 	bl	allocate_new_data_superblock
-	b	.L1773
-.L1807:
+	b	.L1779
+.L1813:
 	mov	r5, r3
-	b	.L1770
-.L1795:
+	b	.L1776
+.L1801:
 	ldrh	r2, [r5, #4]
 	cmp	r2, #0
-	beq	.L1776
+	beq	.L1782
 	movs	r2, #0
 	add	r1, sp, #48
 	mov	r0, r6
@@ -13476,7 +13485,7 @@ FtlWrite:
 	mov	r0, r5
 	mul	r7, r7, fp
 	bl	get_new_active_ppa
-	ldr	r3, .L1816+56
+	ldr	r3, .L1822+56
 	ldr	r1, [r8]
 	ldrh	r2, [r3]
 	add	r1, r1, r7
@@ -13484,7 +13493,7 @@ FtlWrite:
 	str	r6, [r1, #16]
 	mul	r0, r2, fp
 	bic	r3, r0, #3
-	ldr	r0, .L1816+60
+	ldr	r0, .L1822+60
 	str	r3, [sp, #36]
 	ldr	r3, [r0]
 	ldr	r0, [sp, #36]
@@ -13495,12 +13504,12 @@ FtlWrite:
 	movs	r1, #0
 	bl	ftl_memset
 	ldr	r3, [sp, #12]
-	ldr	r2, .L1816+12
+	ldr	r2, .L1822+12
 	cmp	r6, r3
-	beq	.L1777
+	beq	.L1783
 	ldr	r3, [sp, #28]
 	cmp	r6, r3
-	bne	.L1812
+	bne	.L1818
 	ldrh	r2, [r2]
 	ldr	r3, [sp, #4]
 	ldr	r1, [sp, #20]
@@ -13510,8 +13519,8 @@ FtlWrite:
 	subs	r4, r4, r2
 	str	r3, [sp, #24]
 	uxth	r4, r4
-	b	.L1780
-.L1777:
+	b	.L1786
+.L1783:
 	ldrh	r4, [r2]
 	ldr	r0, [sp, #4]
 	mov	r1, r4
@@ -13522,13 +13531,13 @@ FtlWrite:
 	cmp	r4, r3
 	it	cs
 	movcs	r4, r3
-.L1780:
-	ldr	r2, .L1816+12
+.L1786:
+	ldr	r2, .L1822+12
 	ldr	r3, [sp, #12]
 	ldrh	r2, [r2]
 	cmp	r4, r2
 	ldr	r2, [r8]
-	bne	.L1781
+	bne	.L1787
 	cmp	r6, r3
 	add	r7, r7, r2
 	ittet	ne
@@ -13541,23 +13550,23 @@ FtlWrite:
 	streq	r3, [r7, #8]
 	addne	r4, r3, r4, lsl #9
 	strne	r4, [r7, #8]
-.L1783:
-	ldr	r3, .L1816+40
+.L1789:
+	ldr	r3, .L1822+40
 	ldrb	r1, [r5, #6]	@ zero_extendqisi2
 	ldrh	r2, [r3]
 	cmp	r1, r2
-	bcc	.L1792
+	bcc	.L1798
 	mov	r2, #1112
-	ldr	r1, .L1816+44
-	ldr	r0, .L1816+48
+	ldr	r1, .L1822+44
+	ldr	r0, .L1822+48
 	bl	printf
-.L1792:
+.L1798:
 	ldr	r3, [sp, #40]
 	movw	r2, #61589
 	ldr	r1, [sp, #36]
 	add	fp, fp, #1
 	strh	r2, [r3, r1]	@ movhi
-	ldr	r1, .L1816+64
+	ldr	r1, .L1822+64
 	str	r6, [r10, #8]
 	adds	r6, r6, #1
 	ldr	r2, [r1]
@@ -13571,10 +13580,10 @@ FtlWrite:
 	str	r2, [r10, #12]
 	ldrh	r2, [r5]
 	strh	r2, [r10, #2]	@ movhi
-	b	.L1775
-.L1817:
+	b	.L1781
+.L1823:
 	.align	2
-.L1816:
+.L1822:
 	.word	.LANCHOR34
 	.word	.LANCHOR86
 	.word	.LANCHOR181
@@ -13592,17 +13601,17 @@ FtlWrite:
 	.word	.LANCHOR24
 	.word	.LANCHOR124
 	.word	.LANCHOR71
-.L1781:
+.L1787:
 	cmp	r6, r3
 	add	r2, r2, r7
 	ite	eq
-	ldreq	r1, .L1818
-	ldrne	r1, .L1818+4
+	ldreq	r1, .L1824
+	ldrne	r1, .L1824+4
 	ldr	r1, [r1]
 	str	r1, [r2, #8]
 	ldr	r2, [sp, #48]
 	adds	r1, r2, #1
-	beq	.L1786
+	beq	.L1792
 	str	r2, [sp, #56]
 	add	r0, sp, #52
 	ldr	r2, [r8]
@@ -13617,56 +13626,56 @@ FtlWrite:
 	bl	FlashReadPages
 	ldr	r2, [sp, #52]
 	adds	r2, r2, #1
-	bne	.L1787
-	ldr	r1, .L1818+8
+	bne	.L1793
+	ldr	r1, .L1824+8
 	ldr	r2, [r1, #72]
 	adds	r2, r2, #1
 	str	r2, [r1, #72]
-.L1790:
+.L1796:
 	ldr	r3, [sp, #12]
 	lsls	r2, r4, #9
 	cmp	r6, r3
-	bne	.L1791
+	bne	.L1797
 	ldr	r1, [r8]
 	ldr	r3, [sp, #24]
 	add	r7, r7, r1
 	ldr	r1, [sp, #16]
 	ldr	r0, [r7, #8]
 	add	r0, r0, r3, lsl #9
-.L1814:
+.L1820:
 	bl	ftl_memcpy
-	b	.L1783
-.L1787:
+	b	.L1789
+.L1793:
 	ldr	r1, [r10, #8]
 	cmp	r6, r1
-	beq	.L1789
-	ldr	r0, .L1818+8
+	beq	.L1795
+	ldr	r0, .L1824+8
 	ldr	r2, [r0, #72]
 	adds	r2, r2, #1
 	str	r2, [r0, #72]
 	mov	r2, r6
-	ldr	r0, .L1818+12
+	ldr	r0, .L1824+12
 	bl	printf
-.L1789:
+.L1795:
 	ldr	r2, [r10, #8]
 	cmp	r6, r2
-	beq	.L1790
+	beq	.L1796
 	movw	r2, #1097
-	ldr	r1, .L1818+16
-	ldr	r0, .L1818+20
+	ldr	r1, .L1824+16
+	ldr	r0, .L1824+20
 	bl	printf
-	b	.L1790
-.L1786:
+	b	.L1796
+.L1792:
 	ldr	r2, [r8]
 	movs	r1, #0
 	adds	r0, r2, r7
-	ldr	r2, .L1818+24
+	ldr	r2, .L1824+24
 	ldr	r0, [r0, #8]
 	ldrh	r2, [r2]
 	bl	ftl_memset
-	b	.L1790
-.L1791:
-	ldr	r1, .L1818+28
+	b	.L1796
+.L1797:
+	ldr	r1, .L1824+28
 	ldr	r3, [sp, #4]
 	ldr	r0, [r8]
 	ldrh	r1, [r1]
@@ -13676,8 +13685,8 @@ FtlWrite:
 	subs	r1, r1, r3
 	ldr	r3, [sp, #16]
 	add	r1, r3, r1, lsl #9
-	b	.L1814
-.L1812:
+	b	.L1820
+.L1818:
 	ldrh	r2, [r2]
 	ldr	r3, [sp, #4]
 	ldr	r1, [r8]
@@ -13687,30 +13696,30 @@ FtlWrite:
 	ldr	r3, [sp, #16]
 	add	r2, r3, r2, lsl #9
 	str	r2, [r7, #8]
-	b	.L1783
-.L1798:
-	ldr	r6, .L1818+32
+	b	.L1789
+.L1804:
+	ldr	r6, .L1824+32
 	mov	r4, #256
-	ldr	r7, .L1818+36
-.L1801:
+	ldr	r7, .L1824+36
+.L1807:
 	ldrh	r3, [r6]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1799
+	bne	.L1805
 	ldrh	r2, [r7]
 	cmp	r2, r3
-	bne	.L1799
+	bne	.L1805
 	movs	r0, #0
 	bl	List_get_gc_head_node
 	uxth	r0, r0
 	bl	FtlGcRefreshBlock
-.L1799:
-	ldr	r2, .L1818+40
+.L1805:
+	ldr	r2, .L1824+40
 	movs	r3, #128
 	movs	r1, #1
 	mov	r0, r1
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L1818+44
+	ldr	r2, .L1824+44
 	strh	r3, [r2]	@ movhi
 	bl	rk_ftl_garbage_collect
 	movs	r1, #1
@@ -13718,16 +13727,16 @@ FtlWrite:
 	bl	rk_ftl_garbage_collect
 	ldrh	r3, [r5]
 	cmp	r3, #2
-	bhi	.L1800
+	bhi	.L1806
 	subs	r4, r4, #1
-	bne	.L1801
-	b	.L1800
-.L1802:
+	bne	.L1807
+	b	.L1806
+.L1808:
 	mov	r0, #-1
-	b	.L1764
-.L1819:
+	b	.L1770
+.L1825:
 	.align	2
-.L1818:
+.L1824:
 	.word	.LANCHOR118
 	.word	.LANCHOR119
 	.word	.LANCHOR81
@@ -13761,30 +13770,30 @@ sftl_write:
 	mov	fp, r0
 	str	r1, [sp, #24]
 	str	r2, [sp, #44]
-	bls	.L1821
+	bls	.L1827
 	cmp	r0, #576
-	bls	.L1822
-.L1821:
-	ldr	r3, .L1863
+	bls	.L1828
+.L1827:
+	ldr	r3, .L1869
 	ldr	r3, [r3]
-	cbz	r3, .L1823
-	ldr	r3, .L1863+4
+	cbz	r3, .L1829
+	ldr	r3, .L1869+4
 	ldr	r10, [r3]
-	ldr	r3, .L1863+8
+	ldr	r3, .L1869+8
 	ldr	r2, [r10]
 	cmp	r2, r3
-	beq	.L1824
-.L1841:
-	ldr	r3, .L1863
+	beq	.L1830
+.L1847:
+	ldr	r3, .L1869
 	movs	r2, #0
 	str	r2, [r3]
-	ldr	r3, .L1863+4
+	ldr	r3, .L1869+4
 	ldr	r0, [r3]
 	bl	free
-	ldr	r3, .L1863+12
+	ldr	r3, .L1869+12
 	ldr	r0, [r3]
 	bl	free
-.L1823:
+.L1829:
 	ldr	r3, [sp, #44]
 	mov	r1, fp
 	ldr	r2, [sp, #24]
@@ -13793,16 +13802,16 @@ sftl_write:
 	add	sp, sp, #136
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1824:
-	ldr	r3, .L1863+16
+.L1830:
+	ldr	r3, .L1869+16
 	add	r0, r10, #262144
 	movw	r2, #65535
 	ldrh	r4, [r3, #14]
 	ldrh	r5, [r3, #10]
 	movs	r3, #0
-.L1828:
+.L1834:
 	ldr	r1, [r0, #-4]
-	cbnz	r1, .L1825
+	cbnz	r1, .L1831
 	ldr	r1, [r10, r3, lsl #2]
 	adds	r3, r3, #1
 	cmp	r3, #4096
@@ -13811,22 +13820,22 @@ sftl_write:
 	movhi	r3, #0
 	cmp	r2, #4096
 	str	r1, [r0, #-4]!
-	bne	.L1828
+	bne	.L1834
 	mov	r3, #512
 	str	r3, [sp, #12]
-	b	.L1827
-.L1825:
+	b	.L1833
+.L1831:
 	add	r3, r2, #127
-	ldr	r0, .L1863+20
+	ldr	r0, .L1869+20
 	lsrs	r3, r3, #7
 	str	r3, [sp, #12]
 	bl	printf
-.L1827:
+.L1833:
 	uxtb	r4, r4
 	mov	r8, #0
 	smulbb	r5, r4, r5
 	uxth	r3, r5
-	ldr	r5, .L1863+24
+	ldr	r5, .L1869+24
 	str	r3, [sp, #16]
 	subs	r0, r3, #1
 	mov	r1, r3
@@ -13843,23 +13852,23 @@ sftl_write:
 	ldr	r3, [sp, #12]
 	lsls	r3, r3, #7
 	str	r3, [sp, #56]
-	b	.L1840
-.L1848:
+	b	.L1846
+.L1854:
 	str	r3, [sp, #40]
-.L1840:
-	ldr	r3, .L1863+12
+.L1846:
+	ldr	r3, .L1869+12
 	mov	r2, #512
 	movs	r1, #0
 	ldr	r0, [r3]
 	bl	memset
-	ldr	r3, .L1863+16
+	ldr	r3, .L1869+16
 	mov	r0, r8
 	ldrh	r7, [r3, #14]
 	mov	r1, r7
 	uxtb	r6, r7
 	uxth	r3, r6
 	str	r3, [sp, #36]
-	ldr	r3, .L1863+16
+	ldr	r3, .L1869+16
 	ldrh	r4, [r3, #10]
 	ldrh	r3, [sp, #36]
 	smulbb	r4, r4, r3
@@ -13871,7 +13880,7 @@ sftl_write:
 	blx	r3
 	ldr	r3, [sp, #28]
 	cmp	r3, r4
-	bls	.L1829
+	bls	.L1835
 	mov	r1, r7
 	add	r0, r4, r8
 	bl	__aeabi_uidiv
@@ -13879,7 +13888,7 @@ sftl_write:
 	mov	r1, r0
 	movs	r0, #0
 	blx	r3
-.L1829:
+.L1835:
 	mov	r1, r4
 	mov	r0, r8
 	movs	r4, #0
@@ -13887,20 +13896,20 @@ sftl_write:
 	sub	r3, r8, r1
 	str	r1, [sp, #48]
 	str	r3, [sp, #52]
-.L1830:
+.L1836:
 	ldr	r3, [sp, #28]
 	cmp	r3, r4
-	bhi	.L1831
-	ldr	r3, .L1863+12
+	bhi	.L1837
+	ldr	r3, .L1869+12
 	mov	r0, r8
 	movs	r4, #0
 	ldr	r3, [r3]
 	str	r3, [sp, #52]
-	ldr	r3, .L1863+16
+	ldr	r3, .L1869+16
 	ldrb	r7, [r3, #14]	@ zero_extendqisi2
 	uxth	r3, r7
 	str	r3, [sp, #48]
-	ldr	r3, .L1863+16
+	ldr	r3, .L1869+16
 	ldrh	r1, [r3, #10]
 	ldrh	r3, [sp, #48]
 	smulbb	r1, r1, r3
@@ -13913,10 +13922,10 @@ sftl_write:
 	str	r3, [sp, #60]
 	bl	__aeabi_idivmod
 	uxth	r6, r1
-.L1832:
+.L1838:
 	ldr	r3, [sp, #12]
 	cmp	r4, r3
-	bcs	.L1836
+	bcs	.L1842
 	ldr	r3, [sp, #48]
 	mov	r1, r7
 	subs	r3, r3, r6
@@ -13941,26 +13950,26 @@ sftl_write:
 	movs	r0, #0
 	blx	r6
 	adds	r0, r0, #1
-	bne	.L1833
-.L1836:
-	ldr	r3, .L1863+12
+	bne	.L1839
+.L1842:
+	ldr	r3, .L1869+12
 	mov	r1, r10
 	movs	r4, #0
 	ldr	r0, [r3]
-.L1834:
+.L1840:
 	mov	r7, r1
 	ldr	r2, [r0, r4, lsl #2]
 	ldr	r3, [r7]
 	lsls	r6, r4, #2
 	adds	r1, r1, #4
 	cmp	r2, r3
-	beq	.L1837
+	beq	.L1843
 	mov	r2, #512
 	movs	r1, #0
 	bl	memset
-	ldr	r3, .L1863+12
+	ldr	r3, .L1869+12
 	mov	r1, r8
-	ldr	r0, .L1863+28
+	ldr	r0, .L1869+28
 	ldr	r2, [r3]
 	str	r4, [sp]
 	ldr	r3, [r7]
@@ -13972,13 +13981,13 @@ sftl_write:
 	blx	r3
 	ldr	r3, [sp, #20]
 	cmp	r3, #1
-	bls	.L1847
+	bls	.L1853
 	ldr	r2, [sp, #16]
 	movs	r0, #0
 	ldr	r3, [r5, #4]
 	add	r1, r2, r8
 	blx	r3
-.L1847:
+.L1853:
 	ldr	r2, [sp, #40]
 	ldr	r3, [sp, #20]
 	add	r3, r3, r2
@@ -13986,9 +13995,9 @@ sftl_write:
 	add	r8, r8, r2
 	ldr	r2, [sp, #40]
 	cmp	r2, #15
-	bls	.L1848
-	b	.L1841
-.L1831:
+	bls	.L1854
+	b	.L1847
+.L1837:
 	ldr	r3, [sp, #48]
 	mov	r1, r6
 	adds	r0, r3, r4
@@ -14013,55 +14022,55 @@ sftl_write:
 	ldr	r3, [sp, #36]
 	add	r4, r4, r3
 	uxth	r4, r4
-	b	.L1830
-.L1833:
+	b	.L1836
+.L1839:
 	ldr	r3, [sp, #64]
 	movs	r6, #0
 	add	r3, r3, r4
 	uxth	r4, r3
-	b	.L1832
-.L1837:
+	b	.L1838
+.L1843:
 	ldr	r3, [sp, #56]
 	adds	r4, r4, #1
 	cmp	r4, r3
-	bne	.L1834
+	bne	.L1840
 	ldr	r3, [sp, #32]
 	adds	r3, r3, #1
 	cmp	r3, #5
 	str	r3, [sp, #32]
-	bls	.L1847
-	b	.L1841
-.L1822:
+	bls	.L1853
+	b	.L1847
+.L1828:
 	cmp	r0, #64
-	ldr	r6, .L1863+4
-	bne	.L1842
+	ldr	r6, .L1869+4
+	bne	.L1848
 	mov	r0, #262144
 	bl	ftl_malloc
 	str	r0, [r6]
 	mov	r0, #262144
 	bl	ftl_malloc
-	ldr	r3, .L1863+12
+	ldr	r3, .L1869+12
 	str	r0, [r3]
 	ldr	r3, [r6]
-	cbz	r3, .L1843
-	cbz	r0, .L1843
-	ldr	r2, .L1863
+	cbz	r3, .L1849
+	cbz	r0, .L1849
+	ldr	r2, .L1869
 	movs	r1, #1
 	mov	r0, r3
 	str	r1, [r2]
 	mov	r2, #262144
 	movs	r1, #0
 	bl	ftl_memset
-.L1842:
+.L1848:
 	cmp	fp, #63
 	ldr	r0, [r6]
-	bhi	.L1844
+	bhi	.L1850
 	ldr	r3, [sp, #24]
 	rsb	r1, fp, #64
 	subs	r2, r3, r1
 	ldr	r3, [sp, #44]
 	add	r1, r3, r1, lsl #9
-.L1845:
+.L1851:
 	cmp	r5, #576
 	ittt	hi
 	subhi	r2, r2, r4
@@ -14069,10 +14078,10 @@ sftl_write:
 	addhi	r2, r2, r3
 	lsls	r2, r2, #9
 	bl	ftl_memcpy
-	b	.L1823
-.L1864:
+	b	.L1829
+.L1870:
 	.align	2
-.L1863:
+.L1869:
 	.word	.LANCHOR184
 	.word	.LANCHOR185
 	.word	-52655045
@@ -14081,21 +14090,21 @@ sftl_write:
 	.word	.LC114
 	.word	.LANCHOR105
 	.word	.LC115
-.L1843:
-	ldr	r1, .L1865
-	ldr	r0, .L1865+4
+.L1849:
+	ldr	r1, .L1871
+	ldr	r0, .L1871+4
 	bl	printf
-	b	.L1842
-.L1844:
-	ldr	r3, .L1865+8
+	b	.L1848
+.L1850:
+	ldr	r3, .L1871+8
 	ldr	r1, [sp, #44]
 	ldr	r2, [sp, #24]
 	add	r3, r3, fp
 	add	r0, r0, r3, lsl #9
-	b	.L1845
-.L1866:
+	b	.L1851
+.L1872:
 	.align	2
-.L1865:
+.L1871:
 	.word	.LANCHOR187
 	.word	.LC116
 	.word	8388544
@@ -14113,61 +14122,61 @@ FtlMakeBbt:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r6, #0
-	ldr	r7, .L1886
+	ldr	r7, .L1892
 	bl	FtlBbtMemInit
 	sub	r8, r7, #18
 	bl	FtlLoadFactoryBbt
-.L1868:
-	ldr	r3, .L1886+4
+.L1874:
+	ldr	r3, .L1892+4
 	ldrh	r3, [r3]
 	cmp	r6, r3
-	bcc	.L1874
-	ldr	r5, .L1886+8
+	bcc	.L1880
+	ldr	r5, .L1892+8
 	movs	r4, #0
-.L1875:
+.L1881:
 	ldrh	r3, [r5]
 	uxth	r0, r4
 	adds	r4, r4, #1
 	cmp	r3, r0
-	bhi	.L1876
-	ldr	r4, .L1886+12
+	bhi	.L1882
+	ldr	r4, .L1892+12
 	movw	r6, #65535
 	ldrh	r5, [r4, #12]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L1877:
+.L1883:
 	ldrh	r3, [r4, #12]
 	subs	r3, r3, #47
 	cmp	r3, r5
-	bgt	.L1881
+	bgt	.L1887
 	mov	r0, r5
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L1878
+	beq	.L1884
 	mov	r0, r5
 	bl	FlashTestBlk
 	cmp	r0, #0
-	beq	.L1879
+	beq	.L1885
 	mov	r0, r5
 	bl	FtlBbmMapBadBlock
-.L1878:
+.L1884:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L1877
-.L1874:
-	ldr	r3, .L1886+16
-	ldr	r5, .L1886+20
+	b	.L1883
+.L1880:
+	ldr	r3, .L1892+16
+	ldr	r5, .L1892+20
 	ldrh	r2, [r8, #2]!
-	ldr	r4, .L1886+24
+	ldr	r4, .L1892+24
 	ldr	r0, [r3]
 	movw	r3, #65535
 	ldr	r10, [r5]
 	cmp	r2, r3
 	mov	fp, r4
-	ldr	r3, .L1886+28
+	ldr	r3, .L1892+28
 	str	r0, [r4, #8]
 	str	r10, [r4, #12]
-	beq	.L1869
+	beq	.L1875
 	ldrh	r5, [r3]
 	mov	r0, r4
 	str	r3, [sp]
@@ -14184,13 +14193,13 @@ FtlMakeBbt:
 	adds	r2, r2, #7
 	asrs	r2, r2, #3
 	bl	ftl_memcpy
-.L1870:
+.L1876:
 	uxth	r0, r5
 	adds	r6, r6, #1
 	adds	r7, r7, #4
 	bl	FtlBbmMapBadBlock
-	b	.L1868
-.L1869:
+	b	.L1874
+.L1875:
 	mov	r1, r6
 	str	r3, [sp]
 	bl	FlashGetBadBlockList
@@ -14202,21 +14211,21 @@ FtlMakeBbt:
 	ldrh	r4, [r3]
 	subs	r4, r4, #1
 	uxth	r4, r4
-.L1871:
+.L1877:
 	ldr	r3, [sp]
 	ldrh	r0, [r3]
 	smlabb	r0, r0, r6, r4
 	uxth	r0, r0
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L1872
+	beq	.L1878
 	ldr	r3, [sp, #4]
 	movs	r2, #16
 	movs	r1, #0
 	strh	r4, [r8]	@ movhi
 	ldr	r0, [r3]
 	bl	ftl_memset
-	ldr	r3, .L1886+16
+	ldr	r3, .L1892+16
 	mov	r2, #4096
 	movs	r1, #0
 	ldr	r0, [r3]
@@ -14234,42 +14243,42 @@ FtlMakeBbt:
 	mla	r5, r6, r5, r3
 	lsls	r3, r5, #10
 	str	r3, [fp, #4]
-	ldr	r3, .L1886+32
+	ldr	r3, .L1892+32
 	ldrh	r2, [r3]
 	lsls	r2, r2, #2
 	bl	ftl_memcpy
 	movs	r2, #1
-	ldr	r0, .L1886+24
+	ldr	r0, .L1892+24
 	mov	r1, r2
 	bl	FlashEraseBlocks
 	movs	r3, #1
-	ldr	r0, .L1886+24
+	ldr	r0, .L1892+24
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
 	ldr	r3, [fp]
 	adds	r3, r3, #1
-	bne	.L1870
+	bne	.L1876
 	uxth	r0, r5
 	bl	FtlBbmMapBadBlock
-	b	.L1871
-.L1872:
+	b	.L1877
+.L1878:
 	subs	r4, r4, #1
 	uxth	r4, r4
-	b	.L1871
-.L1876:
+	b	.L1877
+.L1882:
 	bl	FtlBbmMapBadBlock
-	b	.L1875
-.L1879:
+	b	.L1881
+.L1885:
 	ldrh	r3, [r4]
 	cmp	r3, r6
-	bne	.L1880
+	bne	.L1886
 	strh	r5, [r4]	@ movhi
-	b	.L1878
-.L1880:
+	b	.L1884
+.L1886:
 	strh	r5, [r4, #4]	@ movhi
-.L1881:
-	ldr	r3, .L1886+36
+.L1887:
+	ldr	r3, .L1892+36
 	movs	r5, #0
 	str	r5, [r4, #8]
 	movs	r1, #1
@@ -14301,9 +14310,9 @@ FtlMakeBbt:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1887:
+.L1893:
 	.align	2
-.L1886:
+.L1892:
 	.word	.LANCHOR37+28
 	.word	.LANCHOR10
 	.word	.LANCHOR25
@@ -14328,62 +14337,62 @@ ftl_low_format:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #0
-	ldr	r6, .L1912
-	ldr	r2, .L1912+4
-	ldr	r5, .L1912+8
+	ldr	r6, .L1918
+	ldr	r2, .L1918+4
+	ldr	r5, .L1918+8
 	ldrh	r0, [r6]
 	str	r3, [r2]
 	str	r3, [r5]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	r0, .L1889
+	cbz	r0, .L1895
 	bl	FtlMakeBbt
-.L1889:
-	ldr	r3, .L1912+12
-	ldr	r2, .L1912+16
-	ldr	ip, .L1912+100
+.L1895:
+	ldr	r3, .L1918+12
+	ldr	r2, .L1918+16
+	ldr	ip, .L1918+100
 	ldrh	r1, [r3]
 	ldr	r4, [r2]
-	ldr	r2, .L1912+20
+	ldr	r2, .L1918+20
 	str	r3, [sp, #4]
 	lsls	r1, r1, #7
 	ldr	r7, [r2]
 	movs	r2, #0
-.L1890:
+.L1896:
 	uxth	r3, r2
 	adds	r2, r2, #1
 	cmp	r3, r1
-	blt	.L1891
-	ldr	r3, .L1912+24
+	blt	.L1897
+	ldr	r3, .L1918+24
 	movs	r7, #0
-	ldr	r10, .L1912+104
+	ldr	r10, .L1918+104
 	ldrh	r4, [r3]
 	mov	r8, r3
 	mov	fp, r10
-.L1892:
+.L1898:
 	ldrh	r3, [r10]
 	cmp	r3, r4
-	bhi	.L1893
-	ldr	r4, .L1912+28
+	bhi	.L1899
+	ldr	r4, .L1918+28
 	subs	r3, r7, #2
 	ldrh	r1, [r4]
 	cmp	r3, r1, lsl #1
-	bgt	.L1894
-.L1898:
+	bgt	.L1900
+.L1904:
 	movs	r6, #0
 	mov	r7, r6
-.L1895:
+.L1901:
 	ldrh	r3, [r8]
 	uxth	r0, r6
 	adds	r6, r6, #1
 	cmp	r3, r0
-	bhi	.L1899
+	bhi	.L1905
 	ldrh	r2, [fp]
-	ldr	r3, .L1912+32
+	ldr	r3, .L1918+32
 	ldrh	r4, [r4]
-	ldr	r6, .L1912+36
+	ldr	r6, .L1918+36
 	str	r2, [r3]
-	ldr	r3, .L1912+40
+	ldr	r3, .L1918+40
 	mov	r1, r4
 	ldr	r2, [r3]
 	mov	r0, r2
@@ -14393,13 +14402,13 @@ ftl_low_format:
 	mov	r3, r0
 	str	r0, [r6]
 	add	r1, r10, #36
-	ldr	r0, .L1912+44
+	ldr	r0, .L1918+44
 	strh	r1, [r0]	@ movhi
 	movs	r1, #24
 	muls	r1, r4, r1
 	str	r0, [sp]
 	cmp	r7, r1
-	ble	.L1900
+	ble	.L1906
 	ldr	r2, [sp, #12]
 	mov	r1, r4
 	str	r3, [sp, #8]
@@ -14411,11 +14420,11 @@ ftl_low_format:
 	adds	r0, r0, #24
 	strh	r0, [r3]	@ movhi
 	ldr	r3, [sp, #8]
-.L1900:
-	ldr	r2, .L1912+48
+.L1906:
+	ldr	r2, .L1918+48
 	ldrh	r2, [r2]
-	cbz	r2, .L1902
-	ldr	r1, .L1912+44
+	cbz	r2, .L1908
+	ldr	r1, .L1918+44
 	ldrh	r0, [r1]
 	add	r0, r0, r2, lsr #1
 	strh	r0, [r1]	@ movhi
@@ -14426,24 +14435,24 @@ ftl_low_format:
 	strlt	r3, [r6]
 	addlt	r2, r2, r10
 	strhlt	r2, [r1]	@ movhi
-.L1902:
+.L1908:
 	ldr	r3, [sp]
-	ldr	r7, .L1912+52
-	ldr	r10, .L1912+108
+	ldr	r7, .L1918+52
+	ldr	r10, .L1918+108
 	ldrh	r2, [r3]
 	ldr	r3, [r6]
 	subs	r3, r3, r2
 	muls	r4, r3, r4
-	ldr	r3, .L1912+56
+	ldr	r3, .L1918+56
 	ldrh	r3, [r3]
 	str	r4, [r7]
 	muls	r4, r3, r4
 	ldr	r3, [sp, #4]
 	ldrh	r3, [r3]
 	str	r4, [r6]
-	ldr	r6, .L1912+60
+	ldr	r6, .L1918+60
 	muls	r4, r3, r4
-	ldr	r3, .L1912+64
+	ldr	r3, .L1918+64
 	str	r4, [r3]
 	movw	r4, #65535
 	bl	FtlBbmTblFlush
@@ -14452,13 +14461,13 @@ ftl_low_format:
 	ldr	r0, [r10]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-	ldr	r2, .L1912+68
+	ldr	r2, .L1918+68
 	movs	r3, #0
 	strh	r3, [r6, #2]	@ movhi
 	movs	r1, #255
 	strb	r3, [r6, #6]
 	str	r3, [r2]
-	ldr	r2, .L1912+72
+	ldr	r2, .L1918+72
 	strh	r3, [r6]	@ movhi
 	strh	r3, [r2, #2]	@ movhi
 	strb	r3, [r2, #6]
@@ -14469,30 +14478,30 @@ ftl_low_format:
 	mov	r8, r10
 	strb	r3, [r6, #8]
 	mov	r10, r6
-	ldr	r3, .L1912+76
+	ldr	r3, .L1918+76
 	lsrs	r2, r2, #3
 	ldr	r0, [r3]
 	bl	ftl_memset
-.L1904:
+.L1910:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r6, #7]	@ zero_extendqisi2
 	ldrh	r2, [r6]
 	cmp	r3, #0
-	bne	.L1905
+	bne	.L1911
 	ldr	r3, [r8]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r6]
 	adds	r3, r3, #1
 	strh	r3, [r6]	@ movhi
-	b	.L1904
-.L1891:
+	b	.L1910
+.L1897:
 	mvns	r0, r3
 	orr	r0, r3, r0, lsl #16
 	str	r0, [r4, r3, lsl #2]
 	str	ip, [r7, r3, lsl #2]
-	b	.L1890
-.L1893:
+	b	.L1896
+.L1899:
 	mov	r0, r4
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
@@ -14500,11 +14509,11 @@ ftl_low_format:
 	add	r7, r7, r0
 	uxth	r7, r7
 	uxth	r4, r4
-	b	.L1892
-.L1894:
+	b	.L1898
+.L1900:
 	mov	r0, r7
 	bl	__aeabi_uidiv
-	ldr	r3, .L1912+80
+	ldr	r3, .L1918+80
 	ldr	r3, [r3]
 	add	r0, r0, r3
 	uxth	r0, r0
@@ -14512,26 +14521,26 @@ ftl_low_format:
 	ldrh	r0, [r6]
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	r6, [r8]
-.L1896:
+.L1902:
 	ldrh	r3, [fp]
 	cmp	r3, r6
-	bls	.L1898
+	bls	.L1904
 	mov	r0, r6
 	movs	r1, #1
 	adds	r6, r6, #1
 	bl	FtlLowFormatEraseBlock
 	uxth	r6, r6
-	b	.L1896
-.L1899:
+	b	.L1902
+.L1905:
 	movs	r1, #0
 	bl	FtlLowFormatEraseBlock
 	add	r7, r7, r0
 	uxth	r7, r7
-	b	.L1895
-.L1905:
+	b	.L1901
+.L1911:
 	ldr	r3, [r5]
 	ldrh	r1, [r6, #4]
-	ldr	r4, .L1912+84
+	ldr	r4, .L1918+84
 	str	r3, [r6, #12]
 	adds	r3, r3, #1
 	str	r3, [r5]
@@ -14547,19 +14556,19 @@ ftl_low_format:
 	strh	r3, [r4]	@ movhi
 	movs	r3, #1
 	strb	r3, [r4, #8]
-.L1906:
+.L1912:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r4]
-	cbnz	r3, .L1907
+	cbnz	r3, .L1913
 	ldr	r3, [r8]
 	strh	r6, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	b	.L1906
-.L1907:
+	b	.L1912
+.L1913:
 	ldr	r3, [r5]
 	ldrh	r1, [r4, #4]
 	str	r3, [r4, #12]
@@ -14568,10 +14577,10 @@ ftl_low_format:
 	movw	r4, #65535
 	ldr	r3, [r8]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L1912+88
+	ldr	r3, .L1918+88
 	strh	r4, [r3]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L1912+92
+	ldr	r3, .L1918+92
 	movs	r2, #0
 	strh	r2, [r3, #2]	@ movhi
 	ldr	r2, [r7]
@@ -14584,18 +14593,18 @@ ftl_low_format:
 	str	r2, [r5]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	r0, .L1908
-	ldr	r3, .L1912+96
+	cbnz	r0, .L1914
+	ldr	r3, .L1918+96
 	movs	r2, #1
 	str	r2, [r3]
-.L1908:
+.L1914:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1913:
+.L1919:
 	.align	2
-.L1912:
+.L1918:
 	.word	.LANCHOR4
 	.word	.LANCHOR71
 	.word	.LANCHOR70
@@ -16095,17 +16104,17 @@ __func__.10137:
 	.size	__func__.10399, 15
 __func__.10399:
 	.ascii	"FlashReadPages\000"
-	.section	.rodata.__func__.10417,"a",%progbits
+	.section	.rodata.__func__.10418,"a",%progbits
 	.set	.LANCHOR153,. + 0
-	.type	__func__.10417, %object
-	.size	__func__.10417, 15
-__func__.10417:
+	.type	__func__.10418, %object
+	.size	__func__.10418, 15
+__func__.10418:
 	.ascii	"FlashProgPages\000"
-	.section	.rodata.__func__.10440,"a",%progbits
+	.section	.rodata.__func__.10442,"a",%progbits
 	.set	.LANCHOR104,. + 0
-	.type	__func__.10440, %object
-	.size	__func__.10440, 17
-__func__.10440:
+	.type	__func__.10442, %object
+	.size	__func__.10442, 17
+__func__.10442:
 	.ascii	"FlashEraseBlocks\000"
 	.section	.rodata.__func__.8806,"a",%progbits
 	.set	.LANCHOR138,. + 0
diff --git a/drivers/rkflash/rk_sftl_arm_v8.S b/drivers/rkflash/rk_sftl_arm_v8.S
index 83c74a38c1..b4b319d64e 100644
--- a/drivers/rkflash/rk_sftl_arm_v8.S
+++ b/drivers/rkflash/rk_sftl_arm_v8.S
@@ -2,7 +2,7 @@
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:    GPL-2.0
- * date: 2018-09-30
+ * date: 2018-10-12
  */
 	.arch armv8-a+nosimd
 	.file	"rk_sftl.c"
@@ -4211,7 +4211,7 @@ FlashReadPages:
 	add	x25, x25, :lo12:.LC1
 .L538:
 	cmp	x23, x19
-	bne	.L548
+	bne	.L549
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -4220,7 +4220,7 @@ FlashReadPages:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L548:
+.L549:
 	ldr	x0, [x19, 8]
 	cbz	x0, .L539
 	ldr	x0, [x19, 16]
@@ -4234,18 +4234,26 @@ FlashReadPages:
 	ldr	w0, [x19, 4]
 	add	x2, x29, 104
 	add	x1, x29, 108
-	adrp	x26, .LANCHOR120
 	bl	l2p_addr_tran.isra.0
+	ldr	w0, [x29, 104]
+	cmp	w0, 3
+	bls	.L541
+	mov	w0, -1
+	str	w0, [x19]
+.L542:
+	add	x19, x19, 32
+	b	.L538
+.L541:
 	ldr	x20, [x19, 8]
+	adrp	x26, .LANCHOR120
 	tst	x20, 63
-	beq	.L541
+	beq	.L543
 	ldr	x20, [x26, #:lo12:.LANCHOR120]
-.L541:
+.L543:
 	adrp	x22, .LANCHOR105
 	add	x22, x22, :lo12:.LANCHOR105
-	ldrb	w0, [x29, 104]
-	mov	x2, x20
 	ldr	w1, [x29, 108]
+	mov	x2, x20
 	ldr	x3, [x19, 16]
 	ldr	x4, [x22, 24]
 	blr	x4
@@ -4253,7 +4261,7 @@ FlashReadPages:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
-	bne	.L543
+	bne	.L545
 	ldrb	w0, [x29, 104]
 	add	x2, x20, 2048
 	ldr	x4, [x22, 24]
@@ -4263,42 +4271,40 @@ FlashReadPages:
 	add	x3, x3, 8
 	blr	x4
 	cmn	w0, #1
-	beq	.L544
+	beq	.L546
 	ldr	x1, [x19, 16]
 	ldr	w2, [x1, 12]
 	cmn	w2, #1
-	bne	.L545
+	bne	.L547
 	ldr	w2, [x1, 8]
 	cmn	w2, #1
-	bne	.L545
+	bne	.L547
 	ldr	w1, [x1]
 	cmn	w1, #1
-	beq	.L545
-.L544:
+	beq	.L547
+.L546:
 	mov	w1, -1
 	str	w1, [x19]
-.L545:
+.L547:
 	ldr	w1, [x19]
 	cmn	w1, #1
-	beq	.L543
+	beq	.L545
 	cmp	w0, 256
-	bne	.L543
+	bne	.L545
 	str	w0, [x19]
-.L543:
+.L545:
 	ldr	x0, [x26, #:lo12:.LANCHOR120]
 	cmp	x20, x0
-	bne	.L547
+	bne	.L542
 	ldr	x0, [x19, 8]
 	cmp	x20, x0
-	beq	.L547
+	beq	.L542
 	adrp	x1, .LANCHOR12
 	ldrh	w2, [x1, #:lo12:.LANCHOR12]
 	mov	x1, x20
 	lsl	w2, w2, 9
 	bl	ftl_memcpy
-.L547:
-	add	x19, x19, 32
-	b	.L538
+	b	.L542
 	.size	FlashReadPages, .-FlashReadPages
 	.section	.text.FtlLoadFactoryBbt,"ax",@progbits
 	.align	2
@@ -4330,10 +4336,10 @@ FtlLoadFactoryBbt:
 	mov	w21, 0
 	mov	w27, -1
 	str	x25, [x1, 16]
-.L566:
+.L567:
 	ldrh	w0, [x23]
 	cmp	w21, w0
-	bcc	.L571
+	bcc	.L572
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -4342,18 +4348,18 @@ FtlLoadFactoryBbt:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L571:
+.L572:
 	ldrh	w19, [x26, #:lo12:.LANCHOR17]
 	add	x24, x22, :lo12:.LANCHOR148
 	strh	w27, [x20]
 	mov	w3, 61664
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L567:
+.L568:
 	ldrh	w0, [x28]
 	sub	w1, w0, #15
 	cmp	w1, w19
-	bgt	.L569
+	bgt	.L570
 	madd	w0, w0, w21, w19
 	mov	w2, 1
 	str	w3, [x29, 108]
@@ -4365,19 +4371,19 @@ FtlLoadFactoryBbt:
 	ldr	w0, [x24]
 	ldr	w3, [x29, 108]
 	cmn	w0, #1
-	beq	.L568
+	beq	.L569
 	ldrh	w0, [x25]
 	cmp	w0, w3
-	bne	.L568
+	bne	.L569
 	strh	w19, [x20]
-.L569:
+.L570:
 	add	w21, w21, 1
 	add	x20, x20, 2
-	b	.L566
-.L568:
+	b	.L567
+.L569:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L567
+	b	.L568
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
 	.section	.text.FtlGetLastWrittenPage,"ax",@progbits
 	.align	2
@@ -4391,10 +4397,10 @@ FtlGetLastWrittenPage:
 	mov	w23, w1
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	bne	.L577
+	bne	.L578
 	adrp	x1, .LANCHOR20
 	ldrh	w19, [x1, #:lo12:.LANCHOR20]
-.L578:
+.L579:
 	adrp	x1, .LANCHOR121
 	sub	w19, w19, #1
 	sxth	w19, w19
@@ -4411,24 +4417,24 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 96]
 	cmn	w0, #1
-	bne	.L579
+	bne	.L580
 	mov	w22, 0
 	mov	w24, 2
-.L580:
+.L581:
 	cmp	w22, w19
-	ble	.L583
-.L579:
+	ble	.L584
+.L580:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 160
 	ret
-.L577:
+.L578:
 	adrp	x1, .LANCHOR19
 	ldrh	w19, [x1, #:lo12:.LANCHOR19]
-	b	.L578
-.L583:
+	b	.L579
+.L584:
 	add	w20, w22, w19
 	mov	w2, w23
 	mov	w1, 1
@@ -4440,20 +4446,20 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 96]
 	cmn	w0, #1
-	bne	.L581
+	bne	.L582
 	ldr	w0, [x29, 100]
 	cmn	w0, #1
-	bne	.L581
+	bne	.L582
 	ldr	w0, [x29, 64]
 	cmn	w0, #1
-	beq	.L581
+	beq	.L582
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L580
-.L581:
+	b	.L581
+.L582:
 	add	w20, w20, 1
 	sxth	w22, w20
-	b	.L580
+	b	.L581
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
 	.section	.text.FtlScanSysBlk,"ax",@progbits
 	.align	2
@@ -4513,12 +4519,12 @@ FtlScanSysBlk:
 	adrp	x0, .LANCHOR70
 	add	x0, x0, :lo12:.LANCHOR70
 	str	x0, [x29, 112]
-.L589:
+.L590:
 	ldr	x0, [x29, 120]
 	ldr	w1, [x29, 172]
 	ldrh	w0, [x0]
 	cmp	w0, w1
-	bls	.L629
+	bls	.L630
 	adrp	x0, .LANCHOR3
 	adrp	x25, .LANCHOR112
 	adrp	x6, .LANCHOR13
@@ -4533,14 +4539,14 @@ FtlScanSysBlk:
 	ldr	x10, [x0, #:lo12:.LANCHOR92]
 	adrp	x0, .LANCHOR24
 	ldrh	w8, [x0, #:lo12:.LANCHOR24]
-	b	.L630
-.L591:
+	b	.L631
+.L592:
 	ldrh	w1, [x29, 172]
 	ldrb	w0, [x6, x5]
 	bl	V2P_block
 	and	w4, w0, 65535
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L590
+	cbnz	w0, .L591
 	ubfiz	x0, x22, 5, 16
 	mul	w1, w22, w8
 	add	x0, x7, x0
@@ -4551,19 +4557,19 @@ FtlScanSysBlk:
 	add	x1, x10, x1, sxtw 2
 	str	w4, [x0, 4]
 	stp	x11, x1, [x0, 8]
-.L590:
+.L591:
 	add	x5, x5, 1
-.L630:
+.L631:
 	cmp	w12, w5, uxth
-	bhi	.L591
-	cbnz	w22, .L592
-.L628:
+	bhi	.L592
+	cbnz	w22, .L593
+.L629:
 	ldr	w0, [x29, 172]
 	add	w26, w0, 1
 	and	w0, w26, 65535
 	str	w0, [x29, 172]
-	b	.L589
-.L592:
+	b	.L590
+.L593:
 	mov	w1, w22
 	mov	w2, 1
 	mov	x0, x7
@@ -4574,7 +4580,7 @@ FtlScanSysBlk:
 	adrp	x0, .LANCHOR149
 	add	x0, x0, :lo12:.LANCHOR149
 	str	x0, [x29, 136]
-.L627:
+.L628:
 	ldr	x0, [x25, #:lo12:.LANCHOR112]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
@@ -4582,10 +4588,10 @@ FtlScanSysBlk:
 	cmn	w0, #1
 	ldr	x27, [x1, 16]
 	ubfx	x26, x3, 10, 16
-	bne	.L595
+	bne	.L596
 	mov	w5, 16
 	mov	w7, 65535
-.L597:
+.L598:
 	ldr	x0, [x25, #:lo12:.LANCHOR112]
 	add	x6, x25, :lo12:.LANCHOR112
 	mov	w2, 1
@@ -4603,78 +4609,78 @@ FtlScanSysBlk:
 	ldr	w5, [x29, 168]
 	cmp	w0, w7
 	ldr	x6, [x29, 104]
-	bne	.L594
+	bne	.L595
 	ldr	x0, [x6]
 	mov	w1, -1
 	str	w1, [x0, x22]
 	ldr	x0, [x6]
 	ldr	w0, [x0, x22]
 	cmp	w0, w1
-	bne	.L595
-.L596:
+	bne	.L596
+.L597:
 	mov	w1, 1
-	b	.L666
-.L594:
+	b	.L667
+.L595:
 	ldr	x0, [x25, #:lo12:.LANCHOR112]
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	bne	.L595
+	bne	.L596
 	sub	w5, w5, #1
 	ands	w5, w5, 65535
-	bne	.L597
-	b	.L596
-.L595:
+	bne	.L598
+	b	.L597
+.L596:
 	adrp	x0, .LANCHOR70
 	ldr	w1, [x0, #:lo12:.LANCHOR70]
 	ldr	w0, [x27, 4]
 	cmn	w1, #1
-	beq	.L598
+	beq	.L599
 	cmp	w1, w0
-	bhi	.L599
-.L598:
+	bhi	.L600
+.L599:
 	cmn	w0, #1
-	beq	.L599
+	beq	.L600
 	ldr	x2, [x29, 112]
 	add	w1, w0, 1
 	str	w1, [x2]
-.L599:
+.L600:
 	ldrh	w1, [x27]
 	mov	w2, 61604
 	cmp	w1, w2
-	beq	.L601
-	bhi	.L602
+	beq	.L602
+	bhi	.L603
 	mov	w0, 61574
 	cmp	w1, w0
-	beq	.L603
-.L600:
+	beq	.L604
+.L601:
 	ldr	x0, [x29, 128]
 	add	x22, x22, 32
 	cmp	x0, x22
-	bne	.L627
-	b	.L628
-.L602:
+	bne	.L628
+	b	.L629
+.L603:
 	mov	w0, 61634
 	cmp	w1, w0
-	beq	.L604
+	beq	.L605
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L600
+	bne	.L601
 	mov	w1, 0
-.L666:
+.L667:
 	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-	b	.L600
-.L604:
+	b	.L601
+.L605:
 	ldrh	w1, [x20, #:lo12:.LANCHOR141]
 	ldr	w0, [x21, #:lo12:.LANCHOR30]
 	cmp	w1, w0
-	bls	.L606
+	bls	.L607
 	ldr	x1, [x29, 136]
 	adrp	x0, .LC1
 	mov	w2, 1222
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L606:
+.L607:
 	ldr	w6, [x21, #:lo12:.LANCHOR30]
 	ldr	x3, [x29, 152]
 	ldrh	w1, [x20, #:lo12:.LANCHOR141]
@@ -4685,53 +4691,53 @@ FtlScanSysBlk:
 	sub	w2, w2, #1
 	ldr	x5, [x3, #:lo12:.LANCHOR135]
 	sxth	w2, w2
-.L607:
+.L608:
 	cmp	w0, w2
-	bgt	.L613
-	tbz	w0, #31, .L647
-	b	.L600
-.L613:
+	bgt	.L614
+	tbz	w0, #31, .L648
+	b	.L601
+.L614:
 	sxtw	x8, w0
 	ldr	w11, [x27, 4]
 	lsl	x7, x8, 2
 	add	x10, x5, x7
 	ldr	w7, [x5, x7]
 	cmp	w11, w7
-	bls	.L608
+	bls	.L609
 	ldr	w2, [x5]
-	cbnz	w2, .L609
+	cbnz	w2, .L610
 	cmp	w6, w1
-	beq	.L609
+	beq	.L610
 	add	w1, w1, 1
 	strh	w1, [x20, #:lo12:.LANCHOR141]
-.L609:
+.L610:
 	ldr	x1, [x29, 160]
 	ldr	x6, [x1, #:lo12:.LANCHOR129]
 	mov	w1, 0
-.L610:
+.L611:
 	cmp	w1, w0
-	bne	.L611
+	bne	.L612
 	ldr	w1, [x27, 4]
 	str	w1, [x10]
 	strh	w26, [x6, x8, lsl 1]
-	tbnz	w0, #31, .L600
+	tbnz	w0, #31, .L601
 	ldrh	w1, [x20, #:lo12:.LANCHOR141]
 	ldr	w2, [x21, #:lo12:.LANCHOR30]
 	sub	w2, w2, w1
 	sub	w2, w2, #1
 	cmp	w0, w2, sxth
-	bgt	.L600
-.L647:
+	bgt	.L601
+.L648:
 	add	w1, w1, 1
 	strh	w1, [x20, #:lo12:.LANCHOR141]
 	ldr	w1, [x27, 4]
 	str	w1, [x5, x0, lsl 2]
 	ldr	x1, [x29, 160]
 	ldr	x1, [x1, #:lo12:.LANCHOR129]
-.L665:
+.L666:
 	strh	w26, [x1, x0, lsl 1]
-	b	.L600
-.L611:
+	b	.L601
+.L612:
 	sxtw	x2, w1
 	add	w1, w1, 1
 	lsl	x7, x2, 2
@@ -4743,22 +4749,22 @@ FtlScanSysBlk:
 	add	x7, x6, x2
 	ldrh	w7, [x7, 2]
 	strh	w7, [x6, x2]
-	b	.L610
-.L608:
+	b	.L611
+.L609:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L607
-.L603:
+	b	.L608
+.L604:
 	ldrh	w1, [x23, #:lo12:.LANCHOR35]
 	ldrh	w0, [x19, #:lo12:.LANCHOR27]
 	cmp	w1, w0
-	bls	.L616
+	bls	.L617
 	ldr	x1, [x29, 136]
 	adrp	x0, .LC1
 	mov	w2, 1263
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L616:
+.L617:
 	ldrh	w6, [x19, #:lo12:.LANCHOR27]
 	ldrh	w2, [x23, #:lo12:.LANCHOR35]
 	sub	w1, w6, #1
@@ -4766,46 +4772,46 @@ FtlScanSysBlk:
 	sub	w5, w1, w2
 	ldr	x1, [x29, 144]
 	ldr	x1, [x1, #:lo12:.LANCHOR132]
-.L617:
+.L618:
 	cmp	w0, w5
-	ble	.L622
+	ble	.L623
 	sxtw	x7, w0
 	ldr	w11, [x27, 4]
 	lsl	x8, x7, 2
 	add	x10, x1, x8
 	ldr	w8, [x1, x8]
 	cmp	w11, w8
-	bls	.L618
+	bls	.L619
 	ldr	w5, [x1]
-	cbnz	w5, .L619
+	cbnz	w5, .L620
 	cmp	w6, w2
-	beq	.L619
+	beq	.L620
 	add	w2, w2, 1
 	strh	w2, [x23, #:lo12:.LANCHOR35]
-.L619:
+.L620:
 	ldr	x6, [x28, #:lo12:.LANCHOR36]
 	mov	w2, 0
-.L620:
+.L621:
 	cmp	w2, w0
-	bne	.L621
+	bne	.L622
 	ldr	w2, [x27, 4]
 	str	w2, [x10]
 	strh	w26, [x6, x7, lsl 1]
-.L622:
-	tbnz	w0, #31, .L600
+.L623:
+	tbnz	w0, #31, .L601
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	ldrh	w5, [x23, #:lo12:.LANCHOR35]
 	sub	w2, w2, #1
 	sub	w2, w2, w5
 	cmp	w0, w2, sxth
-	bgt	.L600
+	bgt	.L601
 	add	w5, w5, 1
 	ldr	w2, [x27, 4]
 	strh	w5, [x23, #:lo12:.LANCHOR35]
 	str	w2, [x1, x0, lsl 2]
 	ldr	x1, [x28, #:lo12:.LANCHOR36]
-	b	.L665
-.L621:
+	b	.L666
+.L622:
 	sxtw	x5, w2
 	add	w2, w2, 1
 	lsl	x8, x5, 2
@@ -4817,61 +4823,61 @@ FtlScanSysBlk:
 	add	x8, x6, x5
 	ldrh	w8, [x8, 2]
 	strh	w8, [x6, x5]
-	b	.L620
-.L618:
+	b	.L621
+.L619:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L617
-.L601:
+	b	.L618
+.L602:
 	ldrh	w5, [x24, #:lo12:.LANCHOR79]
 	mov	w1, 65535
 	add	x2, x24, :lo12:.LANCHOR79
 	cmp	w5, w1
-	bne	.L624
+	bne	.L625
 	strh	w26, [x24, #:lo12:.LANCHOR79]
 	str	w0, [x2, 8]
-	b	.L600
-.L624:
+	b	.L601
+.L625:
 	ldrh	w0, [x2, 4]
 	cmp	w0, w1
-	beq	.L625
+	beq	.L626
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.L625:
+.L626:
 	add	x0, x24, :lo12:.LANCHOR79
 	ldr	w1, [x27, 4]
 	ldr	w2, [x0, 8]
 	cmp	w2, w1
-	bcs	.L626
+	bcs	.L627
 	ldrh	w2, [x24, #:lo12:.LANCHOR79]
 	strh	w2, [x0, 4]
 	strh	w26, [x24, #:lo12:.LANCHOR79]
 	str	w1, [x0, 8]
-	b	.L600
-.L626:
+	b	.L601
+.L627:
 	strh	w26, [x0, 4]
-	b	.L600
-.L629:
+	b	.L601
+.L630:
 	ldr	x0, [x29, 160]
 	ldr	x2, [x0, #:lo12:.LANCHOR129]
 	ldrh	w0, [x2]
-	cbz	w0, .L631
-.L634:
+	cbz	w0, .L632
+.L635:
 	ldr	x1, [x28, #:lo12:.LANCHOR36]
 	ldrh	w0, [x1]
-	cbz	w0, .L632
-.L633:
+	cbz	w0, .L633
+.L634:
 	ldrh	w1, [x20, #:lo12:.LANCHOR141]
 	ldr	w0, [x21, #:lo12:.LANCHOR30]
 	cmp	w1, w0
-	bls	.L663
+	bls	.L664
 	adrp	x1, .LANCHOR149
 	adrp	x0, .LC1
 	mov	w2, 1388
 	add	x1, x1, :lo12:.LANCHOR149
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L663:
+.L664:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -4880,24 +4886,24 @@ FtlScanSysBlk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L631:
+.L632:
 	ldrh	w0, [x20, #:lo12:.LANCHOR141]
-	cbz	w0, .L634
+	cbz	w0, .L635
 	ldr	w1, [x21, #:lo12:.LANCHOR30]
 	mov	w0, 0
-.L635:
+.L636:
 	cmp	w0, w1
-	bcs	.L634
+	bcs	.L635
 	ldrh	w3, [x2, w0, sxtw 1]
-	cbz	w3, .L636
+	cbz	w3, .L637
 	ldr	x1, [x29, 152]
 	add	x7, x21, :lo12:.LANCHOR30
 	ldr	x4, [x1, #:lo12:.LANCHOR135]
 	mov	w1, w0
-.L637:
+.L638:
 	ldr	w3, [x7]
 	cmp	w1, w3
-	bcs	.L634
+	bcs	.L635
 	sxtw	x6, w1
 	sub	w3, w1, w0
 	lsl	x5, x6, 1
@@ -4909,29 +4915,29 @@ FtlScanSysBlk:
 	strh	w8, [x2, x3, lsl 1]
 	str	w6, [x4, x3, lsl 2]
 	strh	wzr, [x2, x5]
-	b	.L637
-.L636:
+	b	.L638
+.L637:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L635
-.L632:
+	b	.L636
+.L633:
 	ldrh	w0, [x23, #:lo12:.LANCHOR35]
-	cbz	w0, .L633
+	cbz	w0, .L634
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	mov	w0, 0
-.L642:
+.L643:
 	mov	w6, w0
 	cmp	w0, w2
-	bge	.L633
+	bge	.L634
 	ldrh	w3, [x1, w0, sxtw 1]
-	cbz	w3, .L643
+	cbz	w3, .L644
 	ldr	x2, [x29, 144]
 	add	x19, x19, :lo12:.LANCHOR27
 	ldr	x3, [x2, #:lo12:.LANCHOR132]
-.L644:
+.L645:
 	ldrh	w2, [x19]
 	cmp	w0, w2
-	bge	.L633
+	bge	.L634
 	sxtw	x5, w0
 	sub	w2, w0, w6
 	lsl	x4, x5, 1
@@ -4943,11 +4949,11 @@ FtlScanSysBlk:
 	strh	w7, [x1, x2, lsl 1]
 	str	w5, [x3, x2, lsl 2]
 	strh	wzr, [x1, x4]
-	b	.L644
-.L643:
+	b	.L645
+.L644:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L642
+	b	.L643
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
 	.section	.text.FtlLoadBbt,"ax",@progbits
 	.align	2
@@ -4975,11 +4981,11 @@ FtlLoadBbt:
 	add	x24, x24, :lo12:.LANCHOR17
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L668:
+.L669:
 	ldrh	w0, [x24]
 	sub	w0, w0, #15
 	cmp	w0, w19
-	bgt	.L671
+	bgt	.L672
 	lsl	w0, w19, 10
 	mov	w2, 1
 	str	w0, [x20, 4]
@@ -4988,7 +4994,7 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L669
+	bne	.L670
 	ldr	w0, [x20, 4]
 	mov	w2, 1
 	mov	w1, w2
@@ -4996,13 +5002,13 @@ FtlLoadBbt:
 	str	w0, [x20, 4]
 	mov	x0, x20
 	bl	FlashReadPages
-.L669:
+.L670:
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L670
+	beq	.L671
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	bne	.L670
+	bne	.L671
 	adrp	x1, .LANCHOR37
 	add	x0, x1, :lo12:.LANCHOR37
 	strh	w19, [x1, #:lo12:.LANCHOR37]
@@ -5010,16 +5016,16 @@ FtlLoadBbt:
 	str	w1, [x0, 8]
 	ldrh	w1, [x21, 8]
 	strh	w1, [x0, 4]
-.L671:
+.L672:
 	adrp	x19, .LANCHOR37
 	mov	w0, 65535
 	add	x20, x19, :lo12:.LANCHOR37
 	ldrh	w1, [x19, #:lo12:.LANCHOR37]
 	cmp	w1, w0
-	beq	.L685
+	beq	.L686
 	ldrh	w1, [x20, 4]
 	cmp	w1, w0
-	beq	.L675
+	beq	.L676
 	add	x0, x22, :lo12:.LANCHOR148
 	lsl	w1, w1, 10
 	mov	w2, 1
@@ -5028,21 +5034,21 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x22, #:lo12:.LANCHOR148]
 	cmn	w0, #1
-	beq	.L675
+	beq	.L676
 	ldrh	w1, [x21]
 	mov	w0, 61649
 	cmp	w1, w0
-	bne	.L675
+	bne	.L676
 	ldr	w1, [x20, 8]
 	ldr	w0, [x21, 4]
 	cmp	w0, w1
-	bls	.L675
+	bls	.L676
 	ldrh	w1, [x20, 4]
 	str	w0, [x20, 8]
 	ldrh	w0, [x21, 8]
 	strh	w1, [x19, #:lo12:.LANCHOR37]
 	strh	w0, [x20, 4]
-.L675:
+.L676:
 	ldrh	w0, [x19, #:lo12:.LANCHOR37]
 	add	x24, x19, :lo12:.LANCHOR37
 	mov	w1, 1
@@ -5052,35 +5058,35 @@ FtlLoadBbt:
 	add	w0, w0, 1
 	strh	w0, [x24, 2]
 	add	x24, x22, :lo12:.LANCHOR148
-.L677:
-	tbz	w20, #31, .L680
+.L678:
+	tbz	w20, #31, .L681
 	adrp	x1, .LANCHOR150
 	adrp	x0, .LC1
 	mov	w2, 253
 	add	x1, x1, :lo12:.LANCHOR150
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L679:
+.L680:
 	add	x0, x19, :lo12:.LANCHOR37
 	ldrh	w1, [x21, 10]
 	strh	w1, [x0, 6]
 	mov	w1, 65535
 	ldrh	w0, [x21, 12]
 	cmp	w0, w1
-	beq	.L682
+	beq	.L683
 	adrp	x1, .LANCHOR2
 	ldr	w2, [x1, #:lo12:.LANCHOR2]
 	cmp	w0, w2
-	beq	.L682
+	beq	.L683
 	adrp	x1, .LANCHOR6
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	lsr	w1, w1, 2
 	cmp	w2, w1
-	bcs	.L682
+	bcs	.L683
 	cmp	w0, w1
-	bcs	.L682
+	bcs	.L683
 	bl	FtlSysBlkNumInit
-.L682:
+.L683:
 	add	x19, x19, :lo12:.LANCHOR37
 	adrp	x21, .LANCHOR10
 	adrp	x23, .LANCHOR137
@@ -5089,23 +5095,23 @@ FtlLoadBbt:
 	add	x23, x23, :lo12:.LANCHOR137
 	add	x22, x22, :lo12:.LANCHOR148
 	mov	w20, 0
-.L683:
+.L684:
 	ldrh	w0, [x21]
 	cmp	w20, w0
-	bcc	.L684
+	bcc	.L685
 	mov	w0, 0
-.L667:
+.L668:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L670:
+.L671:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L668
-.L680:
+	b	.L669
+.L681:
 	ldrh	w0, [x19, #:lo12:.LANCHOR37]
 	mov	w2, 1
 	mov	w1, w2
@@ -5117,15 +5123,15 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x24]
 	cmn	w0, #1
-	beq	.L678
+	beq	.L679
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	beq	.L679
-.L678:
+	beq	.L680
+.L679:
 	sub	w20, w20, #1
 	sxth	w20, w20
-	b	.L677
-.L684:
+	b	.L678
+.L685:
 	ldrh	w2, [x23]
 	ldr	x0, [x22, 8]
 	mul	w1, w2, w20
@@ -5134,10 +5140,10 @@ FtlLoadBbt:
 	add	x1, x0, x1, lsl 2
 	ldr	x0, [x19], 8
 	bl	ftl_memcpy
-	b	.L683
-.L685:
+	b	.L684
+.L686:
 	mov	w0, -1
-	b	.L667
+	b	.L668
 	.size	FtlLoadBbt, .-FtlLoadBbt
 	.section	.text.FtlLoadSysInfo,"ax",@progbits
 	.align	2
@@ -5170,10 +5176,10 @@ FtlLoadSysInfo:
 	ldrh	w0, [x20, #:lo12:.LANCHOR79]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L698
-.L706:
+	bne	.L699
+.L707:
 	mov	w0, -1
-.L697:
+.L698:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -5181,7 +5187,7 @@ FtlLoadSysInfo:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L698:
+.L699:
 	add	x27, x20, :lo12:.LANCHOR79
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
@@ -5191,28 +5197,28 @@ FtlLoadSysInfo:
 	strh	w0, [x27, 2]
 	mov	w27, 19539
 	movk	w27, 0x4654, lsl 16
-.L700:
-	tbz	w22, #31, .L703
+.L701:
+	tbz	w22, #31, .L704
 	adrp	x1, .LANCHOR151
 	adrp	x0, .LC1
 	mov	w2, 1448
 	add	x1, x1, :lo12:.LANCHOR151
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L702:
+.L703:
 	adrp	x1, .LANCHOR23
 	ldrh	w0, [x24, #:lo12:.LANCHOR5]
 	ldrh	w1, [x1, #:lo12:.LANCHOR23]
 	add	x0, x0, 24
 	cmp	x1, x0, lsl 1
-	bcs	.L705
+	bcs	.L706
 	adrp	x1, .LANCHOR151
 	adrp	x0, .LC1
 	mov	w2, 1450
 	add	x1, x1, :lo12:.LANCHOR151
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L705:
+.L706:
 	add	x22, x19, :lo12:.LANCHOR148
 	adrp	x19, .LANCHOR39
 	add	x21, x19, :lo12:.LANCHOR39
@@ -5241,7 +5247,7 @@ FtlLoadSysInfo:
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L706
+	bne	.L707
 	add	x20, x20, :lo12:.LANCHOR79
 	adrp	x0, .LANCHOR10
 	ldrh	w1, [x21, 8]
@@ -5249,7 +5255,7 @@ FtlLoadSysInfo:
 	ldrh	w0, [x0, #:lo12:.LANCHOR10]
 	strh	w1, [x20, 6]
 	cmp	w2, w0
-	bne	.L706
+	bne	.L707
 	adrp	x0, .LANCHOR152
 	adrp	x2, .LANCHOR61
 	adrp	x3, .LANCHOR3
@@ -5274,14 +5280,14 @@ FtlLoadSysInfo:
 	udiv	w0, w0, w3
 	adrp	x3, .LANCHOR78
 	strh	w0, [x3, #:lo12:.LANCHOR78]
-	bls	.L707
+	bls	.L708
 	adrp	x1, .LANCHOR151
 	adrp	x0, .LC1
 	mov	w2, 1472
 	add	x1, x1, :lo12:.LANCHOR151
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L707:
+.L708:
 	add	x1, x19, :lo12:.LANCHOR39
 	adrp	x0, .LANCHOR51
 	add	x3, x0, :lo12:.LANCHOR51
@@ -5346,47 +5352,47 @@ FtlLoadSysInfo:
 	adrp	x1, .LANCHOR70
 	ldr	w5, [x1, #:lo12:.LANCHOR70]
 	cmp	w3, w5
-	bls	.L708
+	bls	.L709
 	str	w3, [x1, #:lo12:.LANCHOR70]
-.L708:
+.L709:
 	add	x19, x19, :lo12:.LANCHOR39
 	adrp	x1, .LANCHOR71
 	ldr	w3, [x1, #:lo12:.LANCHOR71]
 	ldr	w2, [x19, 36]
 	cmp	w2, w3
-	bls	.L709
+	bls	.L710
 	str	w2, [x1, #:lo12:.LANCHOR71]
-.L709:
+.L710:
 	mov	w1, 65535
 	cmp	w6, w1
-	beq	.L710
+	beq	.L711
 	add	x0, x0, :lo12:.LANCHOR51
 	bl	make_superblock
-.L710:
+.L711:
 	ldrh	w2, [x21, #:lo12:.LANCHOR52]
 	mov	w1, 65535
 	add	x0, x21, :lo12:.LANCHOR52
 	cmp	w2, w1
-	beq	.L711
+	beq	.L712
 	bl	make_superblock
-.L711:
+.L712:
 	ldrh	w2, [x22, #:lo12:.LANCHOR53]
 	mov	w1, 65535
 	add	x0, x22, :lo12:.LANCHOR53
 	cmp	w2, w1
-	beq	.L712
+	beq	.L713
 	bl	make_superblock
-.L712:
+.L713:
 	ldrh	w2, [x20, #:lo12:.LANCHOR80]
 	mov	w1, 65535
 	add	x0, x20, :lo12:.LANCHOR80
 	cmp	w2, w1
-	beq	.L713
+	beq	.L714
 	bl	make_superblock
-.L713:
+.L714:
 	mov	w0, 0
-	b	.L697
-.L703:
+	b	.L698
+.L704:
 	ldrh	w0, [x20, #:lo12:.LANCHOR79]
 	mov	w2, 1
 	mov	w1, w2
@@ -5398,19 +5404,19 @@ FtlLoadSysInfo:
 	bl	FlashReadPages
 	ldr	w0, [x21]
 	cmn	w0, #1
-	beq	.L701
+	beq	.L702
 	ldr	x0, [x23, #:lo12:.LANCHOR115]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L701
+	bne	.L702
 	ldr	x0, [x26, #:lo12:.LANCHOR123]
 	ldrh	w0, [x0]
 	cmp	w0, w28
-	beq	.L702
-.L701:
+	beq	.L703
+.L702:
 	sub	w22, w22, #1
 	sxth	w22, w22
-	b	.L700
+	b	.L701
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
 	.section	.text.FlashProgPages,"ax",@progbits
 	.align	2
@@ -5437,18 +5443,18 @@ FlashProgPages:
 	mov	x25, x0
 	add	x28, x24, :lo12:.LANCHOR105
 	lsl	w27, w23, 3
-.L720:
+.L721:
 	cmp	x25, x20
-	bne	.L732
+	bne	.L734
 	ldr	w0, [x29, 104]
-	cbz	w0, .L745
+	cbz	w0, .L747
 	adrp	x21, .LANCHOR120
 	adrp	x22, .LANCHOR122
 	mov	x23, x21
 	mov	x24, x22
-.L734:
+.L736:
 	cmp	x19, x20
-	beq	.L745
+	beq	.L747
 	ldr	x1, [x21, #:lo12:.LANCHOR120]
 	ldr	x0, [x22, #:lo12:.LANCHOR122]
 	str	wzr, [x1]
@@ -5462,71 +5468,78 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	w26, [x29, 128]
 	cmn	w26, #1
-	bne	.L735
+	bne	.L737
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC85
 	add	x0, x0, :lo12:.LC85
 	bl	printf
 	str	w26, [x19]
-.L735:
+.L737:
 	ldr	x0, [x19, 16]
-	cbz	x0, .L736
+	cbz	x0, .L738
 	ldr	w2, [x0]
 	ldr	x0, [x24, #:lo12:.LANCHOR122]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L736
+	beq	.L738
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC86
 	add	x0, x0, :lo12:.LC86
 	bl	printf
 	mov	w0, -1
 	str	w0, [x19]
-.L736:
+.L738:
 	ldr	x0, [x19, 8]
-	cbz	x0, .L737
+	cbz	x0, .L739
 	ldr	w2, [x0]
 	ldr	x0, [x23, #:lo12:.LANCHOR120]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L737
+	beq	.L739
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC87
 	add	x0, x0, :lo12:.LC87
 	bl	printf
 	mov	w0, -1
 	str	w0, [x19]
-.L737:
+.L739:
 	add	x19, x19, 32
-	b	.L734
-.L732:
+	b	.L736
+.L734:
 	ldr	x0, [x25, 8]
-	cbz	x0, .L721
+	cbz	x0, .L722
 	ldr	x0, [x25, 16]
-	cbnz	x0, .L722
-.L721:
+	cbnz	x0, .L723
+.L722:
 	adrp	x0, .LC1
-	mov	w2, 130
+	mov	w2, 134
 	mov	x1, x22
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L722:
+.L723:
 	ldr	w0, [x25, 4]
 	add	x2, x29, 120
 	add	x1, x29, 124
 	bl	l2p_addr_tran.isra.0
 	ldr	w0, [x29, 120]
-	cbnz	w0, .L723
+	cmp	w0, 3
+	bls	.L724
+.L760:
+	mov	w0, -1
+	str	w0, [x25]
+	b	.L725
+.L724:
+	cbnz	w0, .L726
 	ldr	w0, [x29, 124]
 	cmp	w27, w0
-	bls	.L723
+	bls	.L726
 	adrp	x21, .LANCHOR153
 	adrp	x22, .LC79
 	mov	w23, -1
 	add	x21, x21, :lo12:.LANCHOR153
 	add	x22, x22, :lo12:.LC79
-	b	.L756
-.L725:
+	b	.L758
+.L728:
 	ldr	w2, [x19, 4]
 	mov	x1, x21
 	str	w23, [x19]
@@ -5545,10 +5558,10 @@ FlashProgPages:
 	mov	w2, w3
 	add	x0, x0, :lo12:.LC81
 	bl	rknand_print_hex
-.L756:
+.L758:
 	cmp	x19, x20
-	bne	.L725
-.L745:
+	bne	.L728
+.L747:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -5557,20 +5570,20 @@ FlashProgPages:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L723:
+.L726:
 	ldr	x1, [x25, 8]
 	tst	x1, 63
-	beq	.L739
+	beq	.L741
 	adrp	x0, .LANCHOR120
 	ldr	x26, [x0, #:lo12:.LANCHOR120]
 	cmp	x1, x26
-	beq	.L726
+	beq	.L729
 	adrp	x0, .LANCHOR12
 	ldrh	w2, [x0, #:lo12:.LANCHOR12]
 	mov	x0, x26
 	lsl	w2, w2, 9
 	bl	ftl_memcpy
-.L726:
+.L729:
 	add	x0, x24, :lo12:.LANCHOR105
 	ldr	w1, [x29, 124]
 	ldr	x3, [x25, 16]
@@ -5578,13 +5591,13 @@ FlashProgPages:
 	ldr	x6, [x0, 16]
 	ldrb	w0, [x29, 120]
 	blr	x6
-	cbnz	w0, .L727
+	cbnz	w0, .L730
 	str	wzr, [x25]
-.L728:
+.L731:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
-	bne	.L730
+	bne	.L725
 	ldrb	w0, [x29, 120]
 	add	x2, x26, 2048
 	ldr	x6, [x28, 16]
@@ -5593,19 +5606,17 @@ FlashProgPages:
 	add	w1, w23, w1
 	add	x3, x3, 8
 	blr	x6
-	cbz	w0, .L730
-	mov	w0, -1
-	str	w0, [x25]
-.L730:
+	cbnz	w0, .L760
+.L725:
 	add	x25, x25, 32
-	b	.L720
-.L739:
+	b	.L721
+.L741:
 	mov	x26, x1
-	b	.L726
-.L727:
+	b	.L729
+.L730:
 	mov	w0, -1
 	str	w0, [x25]
-	b	.L728
+	b	.L731
 	.size	FlashProgPages, .-FlashProgPages
 	.section	.text.FtlLowFormatEraseBlock,"ax",@progbits
 	.align	2
@@ -5639,43 +5650,43 @@ FtlLowFormatEraseBlock:
 	ldrh	w12, [x25, #:lo12:.LANCHOR24]
 	stp	x27, x28, [sp, 80]
 	str	x0, [x29, 112]
-.L759:
+.L762:
 	cmp	w8, w5, uxth
-	bhi	.L763
-	cbz	w24, .L758
+	bhi	.L766
+	cbz	w24, .L761
 	mov	w2, w24
 	ubfiz	x24, x24, 5, 16
 	mov	x26, 0
 	mov	w1, 0
 	mov	x0, x6
 	bl	FlashEraseBlocks
-.L767:
+.L770:
 	ldr	x0, [x21, #:lo12:.LANCHOR106]
 	add	x1, x0, x26
 	ldr	w0, [x0, x26]
 	cmn	w0, #1
-	bne	.L766
+	bne	.L769
 	ldr	w0, [x1, 4]
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.L766:
+.L769:
 	add	x26, x26, 32
 	cmp	x26, x24
-	bne	.L767
-	cbz	w22, .L780
+	bne	.L770
+	cbz	w22, .L783
 	adrp	x0, .LANCHOR20
 	mov	w26, 1
 	ldrh	w28, [x0, #:lo12:.LANCHOR20]
-.L768:
+.L771:
 	add	x0, x20, :lo12:.LANCHOR3
 	adrp	x27, .LANCHOR13
 	str	x0, [x29, 120]
 	mov	w24, 0
 	add	x0, x27, :lo12:.LANCHOR13
 	str	x0, [x29, 104]
-.L776:
+.L779:
 	ldr	x0, [x29, 120]
 	mov	x5, 0
 	ldr	x6, [x21, #:lo12:.LANCHOR106]
@@ -5686,10 +5697,10 @@ FtlLowFormatEraseBlock:
 	ldr	x8, [x0, #:lo12:.LANCHOR118]
 	ldr	x0, [x29, 112]
 	ldr	x10, [x0, #:lo12:.LANCHOR119]
-.L769:
+.L772:
 	cmp	w7, w5, uxth
-	bhi	.L772
-	cbz	w20, .L758
+	bhi	.L775
+	cbz	w20, .L761
 	mov	w1, w20
 	mov	w3, 1
 	mov	w2, w26
@@ -5697,11 +5708,11 @@ FtlLowFormatEraseBlock:
 	bl	FlashProgPages
 	mov	x27, 0
 	ubfiz	x1, x20, 5, 16
-.L775:
+.L778:
 	ldr	x0, [x21, #:lo12:.LANCHOR106]
 	add	x3, x0, x27
 	ldr	w0, [x0, x27]
-	cbz	w0, .L774
+	cbz	w0, .L777
 	ldr	w0, [x3, 4]
 	add	w19, w19, 1
 	str	x1, [x29, 96]
@@ -5709,36 +5720,36 @@ FtlLowFormatEraseBlock:
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
 	ldr	x1, [x29, 96]
-.L774:
+.L777:
 	add	x27, x27, 32
 	cmp	x1, x27
-	bne	.L775
+	bne	.L778
 	add	w24, w24, 1
 	cmp	w28, w24, uxth
-	bhi	.L776
+	bhi	.L779
 	mov	x24, 0
-.L778:
-	cbz	w22, .L777
+.L781:
+	cbz	w22, .L780
 	ldr	x0, [x21, #:lo12:.LANCHOR106]
 	add	x1, x0, x24
 	ldr	w0, [x0, x24]
-	cbnz	w0, .L777
+	cbnz	w0, .L780
 	ldr	w0, [x1, 4]
 	mov	w1, 1
 	lsr	w0, w0, 10
 	bl	FtlFreeSysBlkQueueIn
-.L777:
+.L780:
 	add	x24, x24, 32
 	cmp	x24, x27
-	bne	.L778
+	bne	.L781
 	cmp	w23, 63
 	ccmp	w22, 0, 0, hi
-	beq	.L758
+	beq	.L761
 	ldr	x0, [x21, #:lo12:.LANCHOR106]
 	mov	w2, w20
 	mov	w1, w26
 	bl	FlashEraseBlocks
-.L758:
+.L761:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -5747,7 +5758,7 @@ FtlLowFormatEraseBlock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L763:
+.L766:
 	lsl	x0, x5, 5
 	mov	w1, w23
 	str	wzr, [x6, x0]
@@ -5755,13 +5766,13 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	and	w13, w0, 65535
 	mov	w14, w13
-	cbz	w22, .L760
+	cbz	w22, .L763
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L761
-.L760:
+	cbnz	w0, .L764
+.L763:
 	mov	w0, w14
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L762
+	cbnz	w0, .L765
 	ubfiz	x0, x24, 5, 16
 	mul	w1, w24, w12
 	add	x0, x6, x0
@@ -5772,18 +5783,18 @@ FtlLowFormatEraseBlock:
 	add	x1, x11, x1, sxtw 2
 	str	w13, [x0, 4]
 	stp	x10, x1, [x0, 8]
-.L761:
+.L764:
 	add	x5, x5, 1
-	b	.L759
-.L762:
+	b	.L762
+.L765:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L761
-.L780:
+	b	.L764
+.L783:
 	mov	w26, 0
 	mov	w28, 2
-	b	.L768
-.L772:
+	b	.L771
+.L775:
 	lsl	x0, x5, 5
 	mov	w1, w23
 	str	wzr, [x6, x0]
@@ -5792,13 +5803,13 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	and	w12, w0, 65535
 	mov	w13, w12
-	cbz	w22, .L770
+	cbz	w22, .L773
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L771
-.L770:
+	cbnz	w0, .L774
+.L773:
 	mov	w0, w13
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L771
+	cbnz	w0, .L774
 	ubfiz	x0, x20, 5, 16
 	mul	w1, w20, w11
 	add	x0, x6, x0
@@ -5809,9 +5820,9 @@ FtlLowFormatEraseBlock:
 	add	x1, x10, x1, sxtw 2
 	str	w12, [x0, 4]
 	stp	x8, x1, [x0, 8]
-.L771:
+.L774:
 	add	x5, x5, 1
-	b	.L769
+	b	.L772
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
 	.section	.text.Ftl_write_map_blk_to_last_page,"ax",@progbits
 	.align	2
@@ -5828,16 +5839,16 @@ Ftl_write_map_blk_to_last_page:
 	ldrh	w0, [x0]
 	str	x23, [sp, 48]
 	cmp	w0, w1
-	bne	.L802
+	bne	.L805
 	ldrh	w0, [x19, 8]
-	cbz	w0, .L803
+	cbz	w0, .L806
 	adrp	x1, .LANCHOR154
 	adrp	x0, .LC1
 	mov	w2, 641
 	add	x1, x1, :lo12:.LANCHOR154
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L803:
+.L806:
 	ldrh	w0, [x19, 8]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
@@ -5848,14 +5859,14 @@ Ftl_write_map_blk_to_last_page:
 	add	w0, w0, 1
 	strh	wzr, [x19]
 	str	w0, [x19, 48]
-.L804:
+.L807:
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L802:
+.L805:
 	ubfiz	x0, x0, 1, 16
 	adrp	x1, .LANCHOR123
 	adrp	x23, .LANCHOR115
@@ -5886,9 +5897,9 @@ Ftl_write_map_blk_to_last_page:
 	mov	x1, 0
 	ldr	x3, [x23, #:lo12:.LANCHOR115]
 	mov	w2, 0
-.L805:
+.L808:
 	cmp	w4, w1, uxth
-	bhi	.L807
+	bhi	.L810
 	mov	w2, 1
 	mov	w3, 0
 	mov	w1, w2
@@ -5899,11 +5910,11 @@ Ftl_write_map_blk_to_last_page:
 	strh	w0, [x19, 2]
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-	b	.L804
-.L807:
+	b	.L807
+.L810:
 	ldr	w0, [x22, x1, lsl 2]
 	cmp	w21, w0, lsr 10
-	bne	.L806
+	bne	.L809
 	add	w2, w2, 1
 	and	w2, w2, 65535
 	ubfiz	x0, x2, 1, 16
@@ -5911,9 +5922,9 @@ Ftl_write_map_blk_to_last_page:
 	add	x0, x0, 1
 	ldr	w5, [x22, x1, lsl 2]
 	str	w5, [x3, x0, lsl 2]
-.L806:
+.L809:
 	add	x1, x1, 1
-	b	.L805
+	b	.L808
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
 	.section	.text.FtlMapWritePage,"ax",@progbits
 	.align	2
@@ -5937,7 +5948,7 @@ FtlMapWritePage:
 	add	x28, x26, :lo12:.LANCHOR20
 	stp	x21, x22, [sp, 32]
 	mov	w22, 0
-.L813:
+.L816:
 	ldr	w0, [x23]
 	ldrh	w1, [x19, 2]
 	add	w0, w0, 1
@@ -5945,35 +5956,35 @@ FtlMapWritePage:
 	ldrh	w0, [x26, #:lo12:.LANCHOR20]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	bge	.L814
+	bge	.L817
 	ldrh	w1, [x19]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L815
-.L814:
+	bne	.L818
+.L817:
 	mov	x0, x19
 	bl	Ftl_write_map_blk_to_last_page
-.L815:
+.L818:
 	ldrh	w1, [x19]
 	ldr	x0, [x19, 16]
 	ldrh	w0, [x0, x1, lsl 1]
-	cbnz	w0, .L816
+	cbnz	w0, .L819
 	adrp	x0, .LC1
 	mov	w2, 699
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L816:
+.L819:
 	ldrh	w1, [x19]
 	ldrh	w0, [x19, 10]
 	cmp	w1, w0
-	bcc	.L817
+	bcc	.L820
 	adrp	x0, .LC1
 	mov	w2, 700
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L817:
+.L820:
 	ldrh	w1, [x19]
 	adrp	x21, .LANCHOR148
 	ldr	x0, [x19, 16]
@@ -6009,7 +6020,7 @@ FtlMapWritePage:
 	and	w0, w0, 65535
 	strh	w0, [x19, 2]
 	cmn	w1, #1
-	bne	.L818
+	bne	.L821
 	ldr	w1, [x20, 4]
 	adrp	x0, .LC88
 	add	x0, x0, :lo12:.LC88
@@ -6018,37 +6029,37 @@ FtlMapWritePage:
 	bl	printf
 	ldrh	w0, [x19, 2]
 	cmp	w0, 2
-	bhi	.L819
+	bhi	.L822
 	ldrh	w0, [x28]
 	sub	w0, w0, #1
 	strh	w0, [x19, 2]
-.L819:
+.L822:
 	cmp	w22, 3
-	bls	.L820
+	bls	.L823
 	add	x21, x21, :lo12:.LANCHOR148
 	adrp	x0, .LC89
 	mov	w2, w22
 	add	x0, x0, :lo12:.LC89
 	ldr	w1, [x21, 4]
 	bl	printf
-.L821:
-	b	.L821
-.L820:
+.L824:
+	b	.L824
+.L823:
 	ldr	w0, [x19, 52]
-	cbz	w0, .L813
-.L835:
-	b	.L835
-.L818:
+	cbz	w0, .L816
+.L838:
+	b	.L838
+.L821:
 	cmp	w0, 1
-	beq	.L824
+	beq	.L827
 	cmp	w1, 256
-	beq	.L824
+	beq	.L827
 	ldr	w0, [x19, 56]
-	cbz	w0, .L825
-.L824:
+	cbz	w0, .L828
+.L827:
 	str	wzr, [x19, 56]
-	b	.L813
-.L825:
+	b	.L816
+.L828:
 	ldr	x0, [x19, 40]
 	ldr	w1, [x20, 4]
 	ldp	x21, x22, [sp, 32]
@@ -6078,20 +6089,20 @@ load_l2p_region:
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
 	cmp	w0, w20
-	bcs	.L838
+	bcs	.L841
 	adrp	x1, .LANCHOR156
 	adrp	x0, .LC1
 	mov	w2, 485
 	add	x1, x1, :lo12:.LANCHOR156
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L838:
+.L841:
 	adrp	x27, .LANCHOR134
 	ubfiz	x0, x20, 2, 16
 	adrp	x22, .LANCHOR55
 	ldr	x1, [x27, #:lo12:.LANCHOR134]
 	ldr	w23, [x1, x0]
-	cbnz	w23, .L839
+	cbnz	w23, .L842
 	ldr	x0, [x22, #:lo12:.LANCHOR55]
 	lsl	x19, x19, 4
 	adrp	x1, .LANCHOR23
@@ -6104,7 +6115,7 @@ load_l2p_region:
 	add	x1, x0, x19
 	strh	w20, [x0, x19]
 	str	wzr, [x1, 4]
-.L840:
+.L843:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -6113,7 +6124,7 @@ load_l2p_region:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L839:
+.L842:
 	ldr	x0, [x22, #:lo12:.LANCHOR55]
 	lsl	x19, x19, 4
 	adrp	x26, .LANCHOR148
@@ -6132,7 +6143,7 @@ load_l2p_region:
 	ldr	x25, [x21, 16]
 	ldrh	w0, [x25, 8]
 	cmp	w0, w20
-	beq	.L841
+	beq	.L844
 	mov	w2, w23
 	mov	w1, w20
 	adrp	x0, .LC90
@@ -6150,26 +6161,26 @@ load_l2p_region:
 	mov	w2, 4
 	add	x0, x0, :lo12:.LC92
 	bl	rknand_print_hex
-.L842:
+.L845:
 	ldrh	w0, [x25, 8]
 	cmp	w0, w20
-	beq	.L843
+	beq	.L846
 	adrp	x1, .LANCHOR156
 	adrp	x0, .LC1
 	mov	w2, 508
 	add	x1, x1, :lo12:.LANCHOR156
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L843:
+.L846:
 	ldr	x0, [x22, #:lo12:.LANCHOR55]
 	add	x1, x0, x19
 	str	wzr, [x1, 4]
 	strh	w20, [x0, x19]
-	b	.L840
-.L841:
+	b	.L843
+.L844:
 	ldr	w0, [x26, #:lo12:.LANCHOR148]
 	cmp	w0, 256
-	bne	.L842
+	bne	.L845
 	mov	w2, w23
 	mov	w1, w20
 	adrp	x0, .LC93
@@ -6182,7 +6193,7 @@ load_l2p_region:
 	adrp	x0, .LANCHOR140
 	add	x0, x0, :lo12:.LANCHOR140
 	bl	FtlMapWritePage
-	b	.L842
+	b	.L845
 	.size	load_l2p_region, .-load_l2p_region
 	.section	.text.ftl_map_blk_gc,"ax",@progbits
 	.align	2
@@ -6205,12 +6216,12 @@ ftl_map_blk_gc:
 	ldrh	w2, [x19, 8]
 	sub	w1, w1, #5
 	cmp	w2, w1
-	blt	.L846
+	blt	.L849
 	ubfiz	x0, x0, 1, 16
 	ldrh	w22, [x20, x0]
-	cbz	w22, .L846
+	cbz	w22, .L849
 	ldr	w1, [x19, 52]
-	cbnz	w1, .L846
+	cbnz	w1, .L849
 	mov	w1, 1
 	str	w1, [x19, 52]
 	strh	wzr, [x20, x0]
@@ -6220,31 +6231,31 @@ ftl_map_blk_gc:
 	strh	w0, [x19, 8]
 	ldrh	w0, [x24, #:lo12:.LANCHOR20]
 	cmp	w1, w0
-	bcc	.L847
+	bcc	.L850
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L847:
+.L850:
 	adrp	x26, .LANCHOR148
 	adrp	x23, .LANCHOR157
 	add	x27, x26, :lo12:.LANCHOR148
 	add	x23, x23, :lo12:.LANCHOR157
 	mov	w20, 0
-.L848:
+.L851:
 	ldrh	w0, [x19, 6]
 	cmp	w0, w20
-	bhi	.L855
+	bhi	.L858
 	mov	w1, 1
 	mov	w0, w22
 	bl	FtlFreeSysBlkQueueIn
 	str	wzr, [x19, 52]
-.L846:
+.L849:
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x24, #:lo12:.LANCHOR20]
 	cmp	w1, w0
-	bcc	.L856
+	bcc	.L859
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L856:
+.L859:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6253,12 +6264,12 @@ ftl_map_blk_gc:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L855:
+.L858:
 	ubfiz	x0, x20, 2, 16
 	add	x28, x25, x0
 	ldr	w1, [x25, x0]
 	cmp	w22, w1, lsr 10
-	bne	.L849
+	bne	.L852
 	adrp	x2, .LANCHOR116
 	add	x0, x26, :lo12:.LANCHOR148
 	ldr	x2, [x2, #:lo12:.LANCHOR116]
@@ -6272,36 +6283,36 @@ ftl_map_blk_gc:
 	bl	FlashReadPages
 	ldrh	w0, [x21, 8]
 	cmp	w0, w20
-	beq	.L850
+	beq	.L853
 	adrp	x0, .LC1
 	mov	w2, 611
 	mov	x1, x23
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L850:
+.L853:
 	ldr	w0, [x27]
 	cmn	w0, #1
-	bne	.L851
-.L853:
+	bne	.L854
+.L856:
 	str	wzr, [x28]
-.L852:
-	b	.L852
-.L851:
+.L855:
+	b	.L855
+.L854:
 	ldrh	w0, [x21, 8]
 	cmp	w0, w20
-	bne	.L853
+	bne	.L856
 	ldrh	w1, [x21]
 	ldrh	w0, [x19, 4]
 	cmp	w1, w0
-	bne	.L853
+	bne	.L856
 	ldr	x2, [x27, 8]
 	mov	w1, w20
 	mov	x0, x19
 	bl	FtlMapWritePage
-.L849:
+.L852:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L848
+	b	.L851
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
 	.section	.text.FtlMapTblRecovery,"ax",@progbits
 	.align	2
@@ -6351,14 +6362,14 @@ FtlMapTblRecovery:
 	str	w0, [x29, 136]
 	add	x0, x24, :lo12:.LANCHOR20
 	str	x0, [x29, 112]
-.L863:
+.L866:
 	ldr	w0, [x29, 140]
 	cmp	w27, w0
-	bge	.L880
+	bge	.L883
 	ldr	w0, [x29, 136]
 	sxtw	x28, w27
 	cmp	w27, w0
-	bne	.L864
+	bne	.L867
 	lsl	x0, x28, 1
 	mov	w1, 1
 	add	x24, x22, x0
@@ -6374,20 +6385,20 @@ FtlMapTblRecovery:
 	str	w0, [x19, 48]
 	ldr	x0, [x29, 120]
 	add	x20, x0, :lo12:.LANCHOR148
-.L865:
+.L868:
 	cmp	w22, w26
-	ble	.L867
-.L880:
+	ble	.L870
+.L883:
 	mov	x0, x19
 	bl	ftl_free_no_use_map_blk
 	adrp	x0, .LANCHOR20
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x0, #:lo12:.LANCHOR20]
 	cmp	w1, w0
-	bne	.L869
+	bne	.L872
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L869:
+.L872:
 	mov	x0, x19
 	bl	ftl_map_blk_gc
 	mov	x0, x19
@@ -6400,7 +6411,7 @@ FtlMapTblRecovery:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L867:
+.L870:
 	ldrh	w0, [x24]
 	mov	w2, 1
 	mov	w1, w2
@@ -6410,22 +6421,22 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L866
+	beq	.L869
 	ldrh	w0, [x25, 8]
 	cmp	w23, w0
-	bls	.L866
+	bls	.L869
 	ldrh	w2, [x25]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
-	bne	.L866
+	bne	.L869
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x20, 4]
 	str	w1, [x21, x0]
-.L866:
+.L869:
 	add	w22, w22, 1
 	sxth	w22, w22
-	b	.L865
-.L864:
+	b	.L868
+.L867:
 	ldr	x0, [x26, #:lo12:.LANCHOR115]
 	mov	w2, 1
 	str	x0, [x20, 8]
@@ -6441,22 +6452,22 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L882
+	beq	.L885
 	ldrh	w1, [x25]
 	ldrh	w0, [x19, 4]
 	cmp	w1, w0
-	bne	.L882
+	bne	.L885
 	ldrh	w1, [x25, 8]
 	mov	w0, 64245
 	cmp	w1, w0
-	beq	.L871
-.L882:
+	beq	.L874
+.L885:
 	mov	w5, 0
-.L872:
+.L875:
 	ldr	x0, [x29, 112]
 	ldrh	w0, [x0]
 	cmp	w5, w0
-	bge	.L878
+	bge	.L881
 	ldrh	w0, [x28]
 	mov	w2, 1
 	str	w5, [x29, 108]
@@ -6468,48 +6479,48 @@ FtlMapTblRecovery:
 	ldr	w0, [x20]
 	ldr	w5, [x29, 108]
 	cmn	w0, #1
-	beq	.L876
+	beq	.L879
 	ldrh	w0, [x25, 8]
 	cmp	w23, w0
-	bls	.L876
+	bls	.L879
 	ldrh	w2, [x25]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
-	bne	.L876
+	bne	.L879
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x20, 4]
 	str	w1, [x21, x0]
-.L876:
+.L879:
 	add	w5, w5, 1
 	sxth	w5, w5
-	b	.L872
-.L871:
+	b	.L875
+.L874:
 	ldrh	w5, [x24, #:lo12:.LANCHOR20]
 	mov	w0, 0
 	ldr	x10, [x26, #:lo12:.LANCHOR115]
 	sub	w5, w5, #1
-.L873:
+.L876:
 	cmp	w0, w5
-	blt	.L875
-.L878:
+	blt	.L878
+.L881:
 	add	w4, w27, 1
 	sxth	w27, w4
-	b	.L863
-.L875:
+	b	.L866
+.L878:
 	lsl	w2, w0, 1
 	sxtw	x2, w2
 	lsl	x1, x2, 2
 	ldrh	w1, [x10, x1]
 	cmp	w23, w1
-	bls	.L874
+	bls	.L877
 	add	x2, x2, 1
 	ubfiz	x1, x1, 2, 16
 	ldr	w2, [x10, x2, lsl 2]
 	str	w2, [x21, x1]
-.L874:
+.L877:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L873
+	b	.L876
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
 	.section	.text.FtlLoadVonderInfo,"ax",@progbits
 	.align	2
@@ -6610,17 +6621,17 @@ log2phys:
 	ldr	w1, [x0, #:lo12:.LANCHOR61]
 	mov	w21, w2
 	cmp	w25, w1
-	bcc	.L897
+	bcc	.L900
 	adrp	x1, .LANCHOR159
 	adrp	x0, .LC1
 	mov	w2, 811
 	add	x1, x1, :lo12:.LANCHOR159
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L897:
+.L900:
 	ldr	w0, [x19, #:lo12:.LANCHOR61]
 	cmp	w25, w0
-	bcs	.L898
+	bcs	.L901
 	adrp	x23, .LANCHOR55
 	add	w24, w24, 7
 	adrp	x0, .LANCHOR33
@@ -6629,10 +6640,10 @@ log2phys:
 	and	w22, w22, 65535
 	ldrh	w1, [x0, #:lo12:.LANCHOR33]
 	mov	x0, 0
-.L899:
+.L902:
 	and	x19, x0, 65535
 	cmp	w19, w1
-	bcc	.L904
+	bcc	.L907
 	bl	select_l2p_ram_region
 	and	x19, x0, 65535
 	ldr	x2, [x23, #:lo12:.LANCHOR55]
@@ -6642,33 +6653,33 @@ log2phys:
 	ldrh	w2, [x2, x1]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L905
+	beq	.L908
 	ldr	w1, [x3, 4]
-	tbz	w1, #31, .L905
+	tbz	w1, #31, .L908
 	bl	flush_l2p_region
-.L905:
+.L908:
 	mov	w1, w26
 	mov	w0, w22
 	bl	load_l2p_region
-	b	.L901
-.L898:
+	b	.L904
+.L901:
 	mov	w0, -1
-	cbnz	w21, .L896
+	cbnz	w21, .L899
 	str	w0, [x20]
-.L896:
+.L899:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L904:
+.L907:
 	add	x0, x0, 1
 	add	x3, x2, x0, lsl 4
 	ldrh	w3, [x3, -16]
 	cmp	w3, w22
-	bne	.L899
-.L901:
+	bne	.L902
+.L904:
 	mov	x0, 1
 	ldr	x1, [x23, #:lo12:.LANCHOR55]
 	lsl	x0, x0, x24
@@ -6676,22 +6687,22 @@ log2phys:
 	and	w0, w0, w25
 	and	x0, x0, 65535
 	add	x1, x1, x19, lsl 4
-	cbnz	w21, .L902
+	cbnz	w21, .L905
 	ldr	x1, [x1, 8]
 	ldr	w0, [x1, x0, lsl 2]
 	str	w0, [x20]
-.L903:
+.L906:
 	ldr	x0, [x23, #:lo12:.LANCHOR55]
 	add	x19, x0, x19, lsl 4
 	ldr	w0, [x19, 4]
 	cmn	w0, #1
-	beq	.L907
+	beq	.L910
 	add	w0, w0, 1
 	str	w0, [x19, 4]
-.L907:
+.L910:
 	mov	w0, 0
-	b	.L896
-.L902:
+	b	.L899
+.L905:
 	ldr	x2, [x1, 8]
 	ldr	w3, [x20]
 	str	w3, [x2, x0, lsl 2]
@@ -6700,7 +6711,7 @@ log2phys:
 	str	w0, [x1, 4]
 	adrp	x0, .LANCHOR56
 	strh	w22, [x0, #:lo12:.LANCHOR56]
-	b	.L903
+	b	.L906
 	.size	log2phys, .-log2phys
 	.section	.text.FtlReUsePrevPpa,"ax",@progbits
 	.align	2
@@ -6721,10 +6732,10 @@ FtlReUsePrevPpa:
 	and	w3, w0, 65535
 	ubfiz	x20, x3, 1, 16
 	ldrh	w1, [x2, x20]
-	cbnz	w1, .L911
+	cbnz	w1, .L914
 	adrp	x0, .LANCHOR47
 	ldr	x19, [x0, #:lo12:.LANCHOR47]
-	cbz	x19, .L912
+	cbz	x19, .L915
 	adrp	x2, .LANCHOR40
 	mov	x5, -6148914691236517206
 	movk	x5, 0xaaab, lsl 0
@@ -6737,23 +6748,23 @@ FtlReUsePrevPpa:
 	mul	x19, x19, x5
 	mov	w5, 6
 	and	w19, w19, 65535
-.L913:
+.L916:
 	cmp	w1, w4
-	beq	.L912
+	beq	.L915
 	cmp	w19, w3
-	bne	.L914
+	bne	.L917
 	mov	w1, w19
 	add	x0, x0, :lo12:.LANCHOR47
 	bl	List_remove_node
 	ldrh	w0, [x23, #:lo12:.LANCHOR48]
-	cbnz	w0, .L915
+	cbnz	w0, .L918
 	adrp	x1, .LANCHOR160
 	adrp	x0, .LC1
 	mov	w2, 1699
 	add	x1, x1, :lo12:.LANCHOR160
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L915:
+.L918:
 	ldrh	w0, [x23, #:lo12:.LANCHOR48]
 	sub	w0, w0, #1
 	strh	w0, [x23, #:lo12:.LANCHOR48]
@@ -6763,7 +6774,7 @@ FtlReUsePrevPpa:
 	ldrh	w0, [x1, x20]
 	add	w0, w0, 1
 	strh	w0, [x1, x20]
-.L912:
+.L915:
 	add	x1, x29, 76
 	mov	w2, 1
 	mov	w0, w21
@@ -6773,18 +6784,18 @@ FtlReUsePrevPpa:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L914:
+.L917:
 	umull	x19, w19, w5
 	ldrh	w19, [x2, x19]
 	cmp	w19, w6
-	beq	.L912
+	beq	.L915
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L913
-.L911:
+	b	.L916
+.L914:
 	add	w1, w1, 1
 	strh	w1, [x2, x20]
-	b	.L912
+	b	.L915
 	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
 	.section	.text.ftl_check_vpc,"ax",@progbits
 	.align	2
@@ -6812,10 +6823,10 @@ ftl_check_vpc:
 	mov	w1, 0
 	mov	x0, x19
 	bl	ftl_memset
-.L922:
+.L925:
 	ldr	w0, [x23]
 	cmp	w22, w0
-	bcc	.L924
+	bcc	.L927
 	adrp	x22, .LANCHOR5
 	adrp	x24, .LC95
 	add	x22, x22, :lo12:.LANCHOR5
@@ -6824,13 +6835,13 @@ ftl_check_vpc:
 	mov	w23, 0
 	mov	w19, 0
 	adrp	x25, .LANCHOR42
-.L925:
+.L928:
 	ldrh	w0, [x22]
 	cmp	w0, w19
-	bhi	.L927
+	bhi	.L930
 	adrp	x0, .LANCHOR47
 	ldr	x19, [x0, #:lo12:.LANCHOR47]
-	cbz	x19, .L928
+	cbz	x19, .L931
 	adrp	x0, .LANCHOR48
 	adrp	x25, .LC96
 	add	x20, x20, :lo12:check_vpc_table
@@ -6848,17 +6859,17 @@ ftl_check_vpc:
 	movk	x1, 0xaaab, lsl 0
 	mul	x19, x19, x1
 	and	w19, w19, 65535
-.L929:
+.L932:
 	cmp	w22, w26
-	bne	.L931
-.L928:
-	cbz	w23, .L921
+	bne	.L934
+.L931:
+	cbz	w23, .L924
 	adrp	x0, .LC1
 	mov	w2, 2343
 	add	x1, x21, :lo12:.LANCHOR161
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L921:
+.L924:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -6866,31 +6877,31 @@ ftl_check_vpc:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L924:
+.L927:
 	mov	w2, 0
 	add	x1, x29, 108
 	mov	w0, w22
 	bl	log2phys
 	ldr	w0, [x29, 108]
 	cmn	w0, #1
-	beq	.L923
+	beq	.L926
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	and	x0, x0, 65535
 	ldrh	w1, [x19, x0, lsl 1]
 	add	w1, w1, 1
 	strh	w1, [x19, x0, lsl 1]
-.L923:
+.L926:
 	add	w22, w22, 1
-	b	.L922
-.L927:
+	b	.L925
+.L930:
 	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	ubfiz	x28, x19, 1, 16
 	sxtw	x27, w19
 	ldrh	w2, [x0, x28]
 	ldrh	w3, [x26, x27, lsl 1]
 	cmp	w2, w3
-	beq	.L926
+	beq	.L929
 	mov	w1, w19
 	mov	x0, x24
 	bl	printf
@@ -6898,34 +6909,34 @@ ftl_check_vpc:
 	mov	w1, 65535
 	ldrh	w0, [x0, x28]
 	cmp	w0, w1
-	beq	.L926
+	beq	.L929
 	ldrh	w1, [x26, x27, lsl 1]
 	cmp	w1, w0
 	csinc	w23, w23, wzr, ls
-.L926:
+.L929:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L925
-.L931:
+	b	.L928
+.L934:
 	ldr	x1, [x27, #:lo12:.LANCHOR42]
 	ubfiz	x0, x19, 1, 16
 	ldrh	w2, [x1, x0]
-	cbz	w2, .L930
+	cbz	w2, .L933
 	ldrh	w3, [x20, w19, sxtw 1]
 	mov	w23, 1
 	mov	w1, w19
 	mov	x0, x25
 	bl	printf
-.L930:
+.L933:
 	ldr	x0, [x24, #:lo12:.LANCHOR40]
 	umull	x19, w19, w28
 	ldrh	w19, [x0, x19]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L928
+	beq	.L931
 	add	w22, w22, 1
 	and	w22, w22, 65535
-	b	.L929
+	b	.L932
 	.size	ftl_check_vpc, .-ftl_check_vpc
 	.section	.text.ftl_scan_all_data,"ax",@progbits
 	.align	2
@@ -6947,32 +6958,32 @@ ftl_scan_all_data:
 	add	x21, x21, :lo12:.LANCHOR61
 	str	x23, [sp, 64]
 	bl	printf
-.L947:
+.L950:
 	ldr	w0, [x21]
 	cmp	w19, w0
-	bcc	.L953
+	bcc	.L956
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x29, x30, [sp, 16]
 	ldr	x23, [sp, 64]
 	add	sp, sp, 96
 	ret
-.L953:
+.L956:
 	mov	w2, 0
 	add	x1, x29, 76
 	mov	w0, w19
 	bl	log2phys
 	tst	x19, 2047
-	bne	.L948
+	bne	.L951
 	ldr	w2, [x29, 76]
 	adrp	x0, .LC98
 	mov	w1, w19
 	add	x0, x0, :lo12:.LC98
 	bl	printf
-.L948:
+.L951:
 	ldr	w1, [x29, 76]
 	cmn	w1, #1
-	beq	.L950
+	beq	.L953
 	add	x0, x20, :lo12:.LANCHOR148
 	str	wzr, [x20, #:lo12:.LANCHOR148]
 	mov	w2, 0
@@ -6989,11 +7000,11 @@ ftl_scan_all_data:
 	ldr	w0, [x20, #:lo12:.LANCHOR148]
 	cmp	w0, 256
 	ccmn	w0, #1, 4, ne
-	beq	.L951
+	beq	.L954
 	ldr	w0, [x23, 8]
 	cmp	w19, w0
-	beq	.L950
-.L951:
+	beq	.L953
+.L954:
 	ldp	x1, x0, [x22, 8]
 	ldr	w2, [x1, 4]
 	str	w2, [sp]
@@ -7005,139 +7016,136 @@ ftl_scan_all_data:
 	add	x0, x0, :lo12:.LC99
 	mov	w1, w19
 	bl	printf
-.L950:
+.L953:
 	add	w19, w19, 1
-	b	.L947
+	b	.L950
 	.size	ftl_scan_all_data, .-ftl_scan_all_data
 	.section	.text.FtlGcScanTempBlk,"ax",@progbits
 	.align	2
 	.global	FtlGcScanTempBlk
 	.type	FtlGcScanTempBlk, %function
 FtlGcScanTempBlk:
-	stp	x29, x30, [sp, -176]!
+	stp	x29, x30, [sp, -160]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR162
-	stp	x27, x28, [sp, 80]
-	mov	w27, w1
+	adrp	x22, .LANCHOR162
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	ldrh	w28, [x21, #:lo12:.LANCHOR162]
+	stp	x27, x28, [sp, 80]
 	mov	w0, 65535
+	ldrh	w20, [x22, #:lo12:.LANCHOR162]
+	mov	w27, w1
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	cmp	w28, w0
-	beq	.L978
-	cbnz	w28, .L956
-.L957:
+	cmp	w20, w0
+	beq	.L982
+	cbnz	w20, .L959
+.L960:
 	bl	FtlGcPageVarInit
-	b	.L958
-.L978:
-	mov	w28, 0
-.L956:
+	b	.L961
+.L982:
+	mov	w20, 0
+.L959:
 	adrp	x0, .LANCHOR19
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	cmp	w0, w27
-	beq	.L957
-.L958:
-	mov	w24, 0
-.L959:
+	beq	.L960
+.L961:
+	adrp	x26, .LANCHOR61
+	add	x26, x26, :lo12:.LANCHOR61
+	mov	w25, 0
+.L962:
 	ldrh	w0, [x19]
-	mov	w22, 65535
+	mov	w23, 65535
 	strb	wzr, [x19, 8]
-	cmp	w0, w22
-	beq	.L960
-	adrp	x25, .LANCHOR23
-	add	x0, x25, :lo12:.LANCHOR23
-	str	x0, [x29, 104]
-.L975:
+	cmp	w0, w23
+	beq	.L963
+.L979:
 	adrp	x1, .LANCHOR91
-	adrp	x23, .LANCHOR112
-	add	x5, x19, 16
-	mov	w20, 0
-	ldr	x6, [x1, #:lo12:.LANCHOR91]
-	ldr	x1, [x29, 104]
-	ldr	x0, [x23, #:lo12:.LANCHOR112]
-	ldrh	w7, [x1]
+	adrp	x24, .LANCHOR112
+	add	x4, x19, 16
+	mov	w21, 0
+	ldr	x5, [x1, #:lo12:.LANCHOR91]
+	adrp	x1, .LANCHOR23
+	ldr	x0, [x24, #:lo12:.LANCHOR112]
+	ldrh	w6, [x1, #:lo12:.LANCHOR23]
 	adrp	x1, .LANCHOR92
-	ldr	x8, [x1, #:lo12:.LANCHOR92]
+	ldr	x7, [x1, #:lo12:.LANCHOR92]
 	adrp	x1, .LANCHOR24
-	ldrh	w10, [x1, #:lo12:.LANCHOR24]
+	ldrh	w8, [x1, #:lo12:.LANCHOR24]
 	adrp	x1, .LANCHOR3
 	ldrh	w1, [x1, #:lo12:.LANCHOR3]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.L961:
-	cmp	x1, x5
-	bne	.L963
-	mov	w1, w20
+.L964:
+	cmp	x1, x4
+	bne	.L966
 	mov	w2, 0
-	adrp	x26, .LANCHOR12
+	mov	w1, w21
 	bl	FlashReadPages
-	add	x26, x26, :lo12:.LANCHOR12
-	ubfiz	x0, x20, 5, 16
-	mov	x20, 0
-	str	x0, [x29, 112]
-.L964:
-	ldr	x0, [x29, 112]
-	cmp	x20, x0
-	bne	.L973
-	add	w3, w28, 1
-	add	w24, w24, 1
-	and	w28, w3, 65535
-	cmp	w27, w24
+	mov	x28, 0
+	ubfiz	x0, x21, 5, 16
+	str	x0, [x29, 96]
+.L967:
+	ldr	x0, [x29, 96]
+	cmp	x0, x28
+	bne	.L977
+	add	w20, w20, 1
+	add	w25, w25, 1
+	and	w20, w20, 65535
+	cmp	w27, w25
 	adrp	x1, .LANCHOR19
-	bls	.L974
-.L976:
+	bls	.L978
+.L980:
 	ldrh	w0, [x1, #:lo12:.LANCHOR19]
-	cmp	w0, w28
-	bhi	.L975
-.L960:
-	strh	w28, [x19, 2]
+	cmp	w0, w20
+	bhi	.L979
+.L963:
+	strh	w20, [x19, 2]
 	mov	w0, -1
 	strb	wzr, [x19, 6]
 	mov	w2, 0
-	strh	w0, [x21, #:lo12:.LANCHOR162]
-	mov	w1, w28
+	strh	w0, [x22, #:lo12:.LANCHOR162]
+	mov	w1, w20
 	mov	x0, x19
 	bl	ftl_sb_update_avl_pages
-	b	.L977
-.L963:
-	ldrh	w4, [x5]
-	cmp	w4, w22
-	beq	.L962
-	ubfiz	x2, x20, 5, 16
-	orr	w4, w28, w4, lsl 10
+	b	.L981
+.L966:
+	ldrh	w3, [x4]
+	cmp	w3, w23
+	beq	.L965
+	ubfiz	x2, x21, 5, 16
+	orr	w3, w20, w3, lsl 10
 	add	x2, x0, x2
-	str	w4, [x2, 4]
-	mul	w4, w20, w7
-	asr	w4, w4, 2
-	add	x4, x6, x4, sxtw 2
-	str	x4, [x2, 8]
-	mul	w4, w20, w10
-	add	w20, w20, 1
-	and	w20, w20, 65535
-	asr	w4, w4, 2
-	add	x4, x8, x4, sxtw 2
-	str	x4, [x2, 16]
-.L962:
-	add	x5, x5, 2
-	b	.L961
-.L973:
-	ldr	x1, [x23, #:lo12:.LANCHOR112]
-	add	x0, x1, x20
-	ldr	w1, [x1, x20]
-	ldr	w2, [x0, 4]
-	str	w2, [x29, 124]
-	cbnz	w1, .L965
-	ldr	x25, [x0, 16]
-	ldrh	w0, [x25]
-	cmp	w0, w22
-	bne	.L966
+	str	w3, [x2, 4]
+	mul	w3, w21, w6
+	asr	w3, w3, 2
+	add	x3, x5, x3, sxtw 2
+	str	x3, [x2, 8]
+	mul	w3, w21, w8
+	add	w21, w21, 1
+	and	w21, w21, 65535
+	asr	w3, w3, 2
+	add	x3, x7, x3, sxtw 2
+	str	x3, [x2, 16]
 .L965:
+	add	x4, x4, 2
+	b	.L964
+.L977:
+	ldr	x1, [x24, #:lo12:.LANCHOR112]
+	add	x0, x1, x28
+	ldr	w1, [x1, x28]
+	ldr	w2, [x0, 4]
+	str	w2, [x29, 108]
+	cbnz	w1, .L968
+	ldr	x21, [x0, 16]
+	ldrh	w0, [x21]
+	cmp	w0, w23
+	bne	.L969
+.L968:
 	adrp	x0, .LANCHOR42
 	ldrh	w1, [x19]
-	mov	w28, 0
+	mov	w20, 0
 	ldr	x0, [x0, #:lo12:.LANCHOR42]
 	strh	wzr, [x0, x1, lsl 1]
 	ldrh	w0, [x19]
@@ -7145,73 +7153,79 @@ FtlGcScanTempBlk:
 	mov	w0, -1
 	strh	w0, [x19]
 	bl	FtlGcPageVarInit
-	b	.L959
-.L966:
-	ldr	w0, [x25, 8]
-	add	x1, x29, 140
+	b	.L962
+.L969:
+	ldr	w0, [x21, 8]
+	ldr	w1, [x26]
+	cmp	w0, w1
+	bhi	.L968
+	add	x1, x29, 124
 	mov	w2, 0
 	bl	log2phys
-	ldr	w0, [x25, 12]
-	ldr	w1, [x29, 140]
-	cmp	w0, w1
-	beq	.L968
-.L971:
-	ldp	w2, w0, [x25, 8]
-	add	x20, x20, 32
+	ldr	w0, [x21, 12]
 	ldr	w1, [x29, 124]
+	cmp	w0, w1
+	beq	.L972
+.L973:
+	ldp	w2, w0, [x21, 8]
+	add	x28, x28, 32
+	ldr	w1, [x29, 108]
 	bl	FtlGcUpdatePage
-	b	.L964
-.L968:
-	str	w0, [x29, 148]
+	b	.L967
+.L972:
+	cmn	w0, #1
+	beq	.L973
+	str	w0, [x29, 132]
 	adrp	x0, .LANCHOR119
 	mov	w2, 0
 	mov	w1, 1
 	ldr	x0, [x0, #:lo12:.LANCHOR119]
-	str	x0, [x29, 152]
+	str	x0, [x29, 136]
 	adrp	x0, .LANCHOR124
 	ldr	x0, [x0, #:lo12:.LANCHOR124]
-	str	x0, [x29, 160]
-	add	x0, x29, 144
+	str	x0, [x29, 144]
+	add	x0, x29, 128
 	bl	FlashReadPages
-	ldrh	w1, [x26]
+	adrp	x0, .LANCHOR12
+	ldr	x2, [x24, #:lo12:.LANCHOR112]
+	ldr	x5, [x29, 136]
+	ldrh	w1, [x0, #:lo12:.LANCHOR12]
+	add	x2, x2, x28
 	mov	x0, 0
-	ldr	x2, [x23, #:lo12:.LANCHOR112]
-	ldr	x6, [x29, 152]
-	add	x2, x2, x20
 	ubfiz	x1, x1, 9, 16
-.L969:
+.L974:
 	cmp	x0, x1
-	beq	.L971
-	ldr	x7, [x2, 8]
-	ldr	w8, [x7, x0]
+	beq	.L973
+	ldr	x6, [x2, 8]
+	ldr	w7, [x6, x0]
 	add	x0, x0, 4
-	add	x7, x6, x0
-	ldr	w7, [x7, -4]
-	cmp	w8, w7
-	beq	.L969
+	add	x6, x5, x0
+	ldr	w6, [x6, -4]
+	cmp	w7, w6
+	beq	.L974
 	ldrh	w1, [x19]
 	adrp	x0, .LC100
-	ldr	w2, [x29, 148]
+	ldr	w2, [x29, 132]
 	add	x0, x0, :lo12:.LC100
 	bl	printf
-	b	.L965
-.L974:
-	ldrh	w0, [x21, #:lo12:.LANCHOR162]
-	cmp	w0, w22
-	beq	.L976
-	add	w0, w0, w24
-	strh	w0, [x21, #:lo12:.LANCHOR162]
+	b	.L968
+.L978:
+	ldrh	w0, [x22, #:lo12:.LANCHOR162]
+	cmp	w0, w23
+	beq	.L980
+	add	w0, w0, w25
+	strh	w0, [x22, #:lo12:.LANCHOR162]
 	ldrh	w0, [x1, #:lo12:.LANCHOR19]
-	cmp	w0, w28
-	bls	.L976
-.L977:
+	cmp	w0, w20
+	bls	.L980
+.L981:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, -1
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 176
+	ldp	x29, x30, [sp], 160
 	ret
 	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
 	.section	.text.FtlReadRefresh,"ax",@progbits
@@ -7222,12 +7236,12 @@ FtlReadRefresh:
 	adrp	x1, .LANCHOR81
 	add	x0, x1, :lo12:.LANCHOR81
 	ldr	w2, [x0, 80]
-	cbz	w2, .L986
+	cbz	w2, .L993
 	adrp	x1, .LANCHOR61
 	ldr	w3, [x0, 84]
 	ldr	w2, [x1, #:lo12:.LANCHOR61]
 	cmp	w3, w2
-	bcs	.L987
+	bcs	.L994
 	stp	x29, x30, [sp, -160]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
@@ -7235,11 +7249,11 @@ FtlReadRefresh:
 	add	x20, x1, :lo12:.LANCHOR61
 	str	x21, [sp, 32]
 	mov	w21, 2048
-.L992:
+.L999:
 	ldr	w0, [x19, 84]
 	ldr	w1, [x20]
 	cmp	w0, w1
-	bcs	.L989
+	bcs	.L996
 	add	x1, x29, 60
 	mov	w2, 0
 	bl	log2phys
@@ -7248,7 +7262,7 @@ FtlReadRefresh:
 	add	w0, w0, 1
 	str	w0, [x19, 84]
 	cmn	w1, #1
-	beq	.L990
+	beq	.L997
 	str	w0, [x29, 88]
 	adrp	x0, .LANCHOR121
 	str	w1, [x29, 68]
@@ -7263,36 +7277,36 @@ FtlReadRefresh:
 	bl	FlashReadPages
 	ldr	w0, [x29, 64]
 	cmp	w0, 256
-	bne	.L989
+	bne	.L996
 	ldr	w0, [x29, 60]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-.L989:
+.L996:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, -1
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 160
 	ret
-.L990:
+.L997:
 	subs	w21, w21, #1
-	bne	.L992
-	b	.L989
-.L987:
+	bne	.L999
+	b	.L996
+.L994:
 	adrp	x1, .LANCHOR62
 	str	wzr, [x0, 84]
 	ldr	w1, [x1, #:lo12:.LANCHOR62]
 	stp	w1, wzr, [x0, 76]
-.L996:
+.L1003:
 	mov	w0, 0
 	ret
-.L986:
+.L993:
 	ldr	w4, [x0, 76]
 	adrp	x0, .LANCHOR62
 	ldr	w2, [x0, #:lo12:.LANCHOR62]
 	add	w0, w2, 1048576
 	cmp	w4, w0
-	bhi	.L995
+	bhi	.L1002
 	adrp	x0, .LANCHOR76
 	ldr	w0, [x0, #:lo12:.LANCHOR76]
 	lsr	w3, w0, 10
@@ -7300,16 +7314,16 @@ FtlReadRefresh:
 	asr	w0, w0, w3
 	add	w0, w0, w4
 	cmp	w2, w0
-	bhi	.L995
+	bhi	.L1002
 	adrp	x0, .LANCHOR39+28
 	ldrb	w0, [x0, #:lo12:.LANCHOR39+28]
-	cbnz	w0, .L996
-.L995:
+	cbnz	w0, .L1003
+.L1002:
 	add	x0, x1, :lo12:.LANCHOR81
 	mov	w1, 1
 	str	wzr, [x0, 84]
 	stp	w2, w1, [x0, 76]
-	b	.L996
+	b	.L1003
 	.size	FtlReadRefresh, .-FtlReadRefresh
 	.section	.text.FtlMapBlkWriteDump_data,"ax",@progbits
 	.align	2
@@ -7317,7 +7331,7 @@ FtlReadRefresh:
 	.type	FtlMapBlkWriteDump_data, %function
 FtlMapBlkWriteDump_data:
 	ldr	w1, [x0, 56]
-	cbz	w1, .L1002
+	cbz	w1, .L1009
 	stp	x29, x30, [sp, -48]!
 	adrp	x1, .LANCHOR148
 	adrp	x2, .LANCHOR123
@@ -7339,11 +7353,11 @@ FtlMapBlkWriteDump_data:
 	mov	x21, x1
 	ldr	w2, [x4, x2]
 	str	w2, [x0, 4]
-	cbz	w2, .L1004
+	cbz	w2, .L1011
 	mov	w2, 1
 	mov	w1, w2
 	bl	FlashReadPages
-.L1005:
+.L1012:
 	add	x1, x21, :lo12:.LANCHOR148
 	mov	x0, x19
 	ldr	x21, [sp, 32]
@@ -7352,14 +7366,14 @@ FtlMapBlkWriteDump_data:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	b	FtlMapWritePage
-.L1004:
+.L1011:
 	adrp	x0, .LANCHOR23
 	mov	w1, 255
 	ldrh	w2, [x0, #:lo12:.LANCHOR23]
 	mov	x0, x3
 	bl	ftl_memset
-	b	.L1005
-.L1002:
+	b	.L1012
+.L1009:
 	ret
 	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
 	.section	.text.FlashTestBlk,"ax",@progbits
@@ -7372,7 +7386,7 @@ FlashTestBlk:
 	stp	x19, x20, [sp, 16]
 	and	w19, w0, 65535
 	cmp	w19, 11
-	bls	.L1011
+	bls	.L1018
 	adrp	x20, .LANCHOR121
 	mov	w2, 32
 	mov	w1, 165
@@ -7403,14 +7417,14 @@ FlashTestBlk:
 	add	x0, x29, 32
 	csetm	w19, ne
 	bl	FlashEraseBlocks
-.L1009:
+.L1016:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1011:
+.L1018:
 	mov	w19, 0
-	b	.L1009
+	b	.L1016
 	.size	FlashTestBlk, .-FlashTestBlk
 	.section	.text.FtlBbmTblFlush,"ax",@progbits
 	.align	2
@@ -7443,10 +7457,10 @@ FtlBbmTblFlush:
 	add	x27, x27, :lo12:.LANCHOR137
 	mov	w1, 0
 	bl	ftl_memset
-.L1014:
+.L1021:
 	ldrh	w0, [x26]
 	cmp	w24, w0
-	blt	.L1015
+	blt	.L1022
 	add	x20, x20, :lo12:.LANCHOR148
 	add	x19, x21, :lo12:.LANCHOR37
 	mov	w2, 16
@@ -7473,7 +7487,7 @@ FtlBbmTblFlush:
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0, #:lo12:.LANCHOR2]
 	strh	w0, [x27, 12]
-.L1016:
+.L1023:
 	ldrh	w1, [x19]
 	ldrh	w4, [x27, 10]
 	ldrh	w2, [x19, 2]
@@ -7491,7 +7505,7 @@ FtlBbmTblFlush:
 	ldrh	w1, [x19, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L1017
+	blt	.L1024
 	ldr	w0, [x19, 8]
 	mov	w2, 1
 	ldrh	w1, [x19, 4]
@@ -7510,7 +7524,7 @@ FtlBbmTblFlush:
 	str	w1, [x0, 4]
 	mov	w1, w2
 	bl	FlashEraseBlocks
-.L1017:
+.L1024:
 	mov	w3, 1
 	mov	x0, x20
 	mov	w2, w3
@@ -7521,7 +7535,7 @@ FtlBbmTblFlush:
 	strh	w0, [x19, 2]
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L1018
+	bne	.L1025
 	ldr	w1, [x20, 4]
 	add	w21, w21, 1
 	adrp	x0, .LC102
@@ -7529,15 +7543,15 @@ FtlBbmTblFlush:
 	add	x0, x0, :lo12:.LC102
 	bl	printf
 	cmp	w21, 3
-	bls	.L1016
+	bls	.L1023
 	ldr	w1, [x20, 4]
 	adrp	x0, .LC103
 	mov	w2, w21
 	add	x0, x0, :lo12:.LC103
 	bl	printf
-.L1020:
-	b	.L1020
-.L1015:
+.L1027:
+	b	.L1027
+.L1022:
 	ldrh	w2, [x27]
 	ldr	x1, [x25], 8
 	ldr	x0, [x19, 8]
@@ -7546,12 +7560,12 @@ FtlBbmTblFlush:
 	add	w24, w24, 1
 	add	x0, x0, x3, sxtw 2
 	bl	ftl_memcpy
-	b	.L1014
-.L1021:
+	b	.L1021
+.L1028:
 	mov	w25, 1
-	b	.L1016
-.L1018:
-	cbz	w25, .L1021
+	b	.L1023
+.L1025:
+	cbz	w25, .L1028
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -7579,7 +7593,7 @@ allocate_data_superblock:
 	add	x0, x27, :lo12:.LANCHOR45
 	stp	x25, x26, [sp, 64]
 	str	x0, [x29, 104]
-.L1024:
+.L1031:
 	ldr	x1, [x29, 104]
 	adrp	x23, .LANCHOR5
 	ldrh	w0, [x28, #:lo12:.LANCHOR48]
@@ -7587,18 +7601,18 @@ allocate_data_superblock:
 	add	w0, w0, w1
 	ldrh	w1, [x23, #:lo12:.LANCHOR5]
 	cmp	w0, w1
-	ble	.L1025
+	ble	.L1032
 	adrp	x1, .LANCHOR163
 	adrp	x0, .LC1
 	mov	w2, 2615
 	add	x1, x1, :lo12:.LANCHOR163
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1025:
+.L1032:
 	adrp	x0, .LANCHOR53
 	add	x0, x0, :lo12:.LANCHOR53
 	cmp	x19, x0
-	bne	.L1051
+	bne	.L1058
 	adrp	x1, .LANCHOR87
 	ldrh	w0, [x24]
 	ldr	w1, [x1, #:lo12:.LANCHOR87]
@@ -7607,39 +7621,39 @@ allocate_data_superblock:
 	add	w0, w0, 1
 	add	w1, w0, w1, lsr 2
 	ands	w1, w1, 65535
-	beq	.L1026
+	beq	.L1033
 	sub	w1, w1, #1
 	and	w1, w1, 65535
-.L1026:
+.L1033:
 	adrp	x0, .LANCHOR47
 	add	x0, x0, :lo12:.LANCHOR47
 	bl	List_pop_index_node
 	and	w22, w0, 65535
 	ldrh	w0, [x24]
-	cbnz	w0, .L1027
+	cbnz	w0, .L1034
 	adrp	x1, .LANCHOR163
 	adrp	x0, .LC1
 	mov	w2, 2624
 	add	x1, x1, :lo12:.LANCHOR163
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1027:
+.L1034:
 	ldrh	w0, [x24]
 	sub	w0, w0, #1
 	strh	w0, [x24]
 	ldrh	w0, [x23, #:lo12:.LANCHOR5]
 	cmp	w0, w22
-	bls	.L1024
+	bls	.L1031
 	adrp	x25, .LANCHOR42
 	ubfiz	x20, x22, 1, 16
 	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	ldrh	w21, [x0, x20]
-	cbnz	w21, .L1024
+	cbnz	w21, .L1031
 	strh	w22, [x19]
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L1029
+	cbnz	w0, .L1036
 	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	mov	w1, -1
 	strh	w1, [x0, x20]
@@ -7650,31 +7664,31 @@ allocate_data_superblock:
 	add	w0, w0, w1
 	ldrh	w1, [x23, #:lo12:.LANCHOR5]
 	cmp	w0, w1
-	ble	.L1024
+	ble	.L1031
 	mov	w2, 2638
 	adrp	x1, .LANCHOR163
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR163
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	b	.L1024
-.L1051:
+	b	.L1031
+.L1058:
 	mov	w1, 0
-	b	.L1026
-.L1029:
+	b	.L1033
+.L1036:
 	ldrh	w1, [x27, #:lo12:.LANCHOR45]
 	ldrh	w0, [x24]
 	add	w0, w0, w1
 	ldrh	w1, [x23, #:lo12:.LANCHOR5]
 	cmp	w0, w1
-	ble	.L1031
+	ble	.L1038
 	adrp	x1, .LANCHOR163
 	adrp	x0, .LC1
 	mov	w2, 2641
 	add	x1, x1, :lo12:.LANCHOR163
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1031:
+.L1038:
 	adrp	x0, .LANCHOR3
 	adrp	x25, .LANCHOR106
 	add	x26, x19, 16
@@ -7686,40 +7700,40 @@ allocate_data_superblock:
 	add	x1, x3, 8
 	add	x0, x0, 8
 	add	x0, x3, x0
-.L1032:
+.L1039:
 	cmp	x0, x1
-	bne	.L1034
-	cbnz	w21, .L1035
+	bne	.L1041
+	cbnz	w21, .L1042
 	adrp	x1, .LANCHOR163
 	adrp	x0, .LC1
 	mov	w2, 2652
 	add	x1, x1, :lo12:.LANCHOR163
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1035:
+.L1042:
 	adrp	x0, .LANCHOR80
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w0, w22
-	bne	.L1036
+	bne	.L1043
 	adrp	x1, .LANCHOR163
 	adrp	x0, .LC1
 	mov	w2, 2654
 	add	x1, x1, :lo12:.LANCHOR163
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1036:
+.L1043:
 	ldrb	w0, [x19, 8]
 	adrp	x6, .LANCHOR43
 	adrp	x7, .LANCHOR14
 	adrp	x5, .LANCHOR72
 	adrp	x4, .LANCHOR73
 	ldr	x1, [x6, #:lo12:.LANCHOR43]
-	cbnz	w0, .L1037
+	cbnz	w0, .L1044
 	ldrh	w0, [x1, x20]
-	cbz	w0, .L1038
+	cbz	w0, .L1045
 	ldrh	w2, [x7, #:lo12:.LANCHOR14]
 	add	w0, w0, w2
-.L1062:
+.L1069:
 	strh	w0, [x1, x20]
 	mov	w1, 0
 	ldr	w0, [x5, #:lo12:.LANCHOR72]
@@ -7727,15 +7741,15 @@ allocate_data_superblock:
 	str	w0, [x5, #:lo12:.LANCHOR72]
 	mov	w0, w22
 	bl	ftl_set_blk_mode
-.L1040:
+.L1047:
 	ldr	x0, [x6, #:lo12:.LANCHOR43]
 	ldrh	w1, [x0, x20]
 	adrp	x0, .LANCHOR76
 	ldr	w2, [x0, #:lo12:.LANCHOR76]
 	cmp	w1, w2
-	bls	.L1041
+	bls	.L1048
 	str	w1, [x0, #:lo12:.LANCHOR76]
-.L1041:
+.L1048:
 	ldr	w2, [x5, #:lo12:.LANCHOR72]
 	ldr	w1, [x4, #:lo12:.LANCHOR73]
 	ldrh	w0, [x7, #:lo12:.LANCHOR14]
@@ -7754,48 +7768,48 @@ allocate_data_superblock:
 	add	x1, x1, 4
 	add	x2, x0, 4
 	add	x1, x0, x1
-.L1042:
+.L1049:
 	cmp	x1, x2
-	bne	.L1043
+	bne	.L1050
 	ldrb	w1, [x19, 8]
 	mov	w2, w21
 	mov	x23, 0
 	bl	FlashEraseBlocks
 	mov	w1, 0
-.L1044:
+.L1051:
 	cmp	w21, w23, uxth
-	bhi	.L1046
-	cbz	w1, .L1047
+	bhi	.L1053
+	cbz	w1, .L1054
 	mov	w0, w22
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L1047:
+.L1054:
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L1048
+	cbnz	w0, .L1055
 	adrp	x0, .LANCHOR42
 	mov	w1, -1
 	ldr	x0, [x0, #:lo12:.LANCHOR42]
 	strh	w1, [x0, x20]
-	b	.L1024
-.L1034:
+	b	.L1031
+.L1041:
 	ldrh	w2, [x4]
 	stp	xzr, xzr, [x1]
 	cmp	w2, w6
-	beq	.L1033
+	beq	.L1040
 	ubfiz	x5, x21, 5, 16
 	add	w21, w21, 1
 	add	x5, x3, x5
 	and	w21, w21, 65535
 	lsl	w2, w2, 10
 	str	w2, [x5, 4]
-.L1033:
+.L1040:
 	add	x1, x1, 32
 	add	x4, x4, 2
-	b	.L1032
-.L1038:
+	b	.L1039
+.L1045:
 	mov	w0, 2
-	b	.L1062
-.L1037:
+	b	.L1069
+.L1044:
 	ldrh	w0, [x1, x20]
 	add	w0, w0, 1
 	strh	w0, [x1, x20]
@@ -7804,19 +7818,19 @@ allocate_data_superblock:
 	str	w0, [x4, #:lo12:.LANCHOR73]
 	mov	w0, w22
 	bl	ftl_set_blk_mode.part.6
-	b	.L1040
-.L1043:
+	b	.L1047
+.L1050:
 	ldr	w3, [x2]
 	and	w3, w3, -1024
 	str	w3, [x2], 32
-	b	.L1042
-.L1046:
+	b	.L1049
+.L1053:
 	ldr	x2, [x25, #:lo12:.LANCHOR106]
 	lsl	x0, x23, 5
 	add	x3, x2, x0
 	ldr	w2, [x2, x0]
 	cmn	w2, #1
-	bne	.L1045
+	bne	.L1052
 	add	w1, w1, 1
 	ldr	w0, [x3, 4]
 	stp	w2, w1, [x29, 96]
@@ -7827,11 +7841,11 @@ allocate_data_superblock:
 	ldrb	w0, [x19, 7]
 	sub	w0, w0, #1
 	strb	w0, [x19, 7]
-.L1045:
+.L1052:
 	add	x23, x23, 1
 	add	x26, x26, 2
-	b	.L1044
-.L1048:
+	b	.L1051
+.L1055:
 	adrp	x1, .LANCHOR19
 	adrp	x2, .LANCHOR70
 	strh	wzr, [x19, 2]
@@ -7849,17 +7863,17 @@ allocate_data_superblock:
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	strh	w0, [x1, x20]
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1049
+	cbz	w0, .L1056
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L1050
-.L1049:
+	cbnz	w0, .L1057
+.L1056:
 	adrp	x1, .LANCHOR163
 	adrp	x0, .LC1
 	mov	w2, 2707
 	add	x1, x1, :lo12:.LANCHOR163
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1050:
+.L1057:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -7884,17 +7898,17 @@ FtlGcFreeBadSuperBlk:
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	str	x27, [sp, 80]
-	cbz	w0, .L1064
+	cbz	w0, .L1071
 	adrp	x23, .LANCHOR102
 	add	x24, x23, :lo12:.LANCHOR102
 	mov	w19, 0
-.L1065:
+.L1072:
 	adrp	x0, .LANCHOR3
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w0, w19
-	bhi	.L1071
+	bhi	.L1078
 	bl	FtlGcReFreshBadBlk
-.L1064:
+.L1071:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -7903,7 +7917,7 @@ FtlGcFreeBadSuperBlk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1071:
+.L1078:
 	adrp	x0, .LANCHOR13
 	add	x0, x0, :lo12:.LANCHOR13
 	mov	w1, w25
@@ -7912,19 +7926,19 @@ FtlGcFreeBadSuperBlk:
 	ldrb	w0, [x0, w19, sxtw]
 	bl	V2P_block
 	and	w26, w0, 65535
-.L1066:
+.L1073:
 	ldrh	w0, [x22]
 	cmp	w0, w20
-	bhi	.L1070
+	bhi	.L1077
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1065
-.L1070:
+	b	.L1072
+.L1077:
 	add	x0, x23, :lo12:.LANCHOR102
 	add	w27, w20, 1
 	ldrh	w0, [x0, w20, sxtw 1]
 	cmp	w0, w26
-	bne	.L1067
+	bne	.L1074
 	mov	w1, w26
 	adrp	x0, .LC104
 	add	x0, x0, :lo12:.LC104
@@ -7936,22 +7950,22 @@ FtlGcFreeBadSuperBlk:
 	sxtw	x3, w27
 	and	x4, x20, 65535
 	mov	x0, 0
-.L1068:
+.L1075:
 	add	w2, w20, w0
 	cmp	w1, w2, uxth
-	bhi	.L1069
+	bhi	.L1076
 	sub	w1, w1, #1
 	strh	w1, [x22]
-.L1067:
+.L1074:
 	and	w20, w27, 65535
-	b	.L1066
-.L1069:
+	b	.L1073
+.L1076:
 	add	x2, x3, x0
 	ldrh	w5, [x24, x2, lsl 1]
 	add	x2, x4, x0
 	add	x0, x0, 1
 	strh	w5, [x24, x2, lsl 1]
-	b	.L1068
+	b	.L1075
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
 	.section	.text.update_vpc_list,"ax",@progbits
 	.align	2
@@ -7966,28 +7980,28 @@ update_vpc_list:
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ubfiz	x0, x19, 1, 16
 	ldrh	w0, [x1, x0]
-	cbnz	w0, .L1077
+	cbnz	w0, .L1084
 	adrp	x0, .LANCHOR80
 	ldrh	w1, [x0, #:lo12:.LANCHOR80]
 	cmp	w1, w19
-	bne	.L1078
+	bne	.L1085
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR80]
-.L1079:
+.L1086:
 	adrp	x20, .LANCHOR45
 	mov	w1, w19
 	adrp	x0, .LANCHOR41
 	add	x0, x0, :lo12:.LANCHOR41
 	bl	List_remove_node
 	ldrh	w0, [x20, #:lo12:.LANCHOR45]
-	cbnz	w0, .L1081
+	cbnz	w0, .L1088
 	adrp	x1, .LANCHOR164
 	adrp	x0, .LC1
 	mov	w2, 2777
 	add	x1, x1, :lo12:.LANCHOR164
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1081:
+.L1088:
 	ldrh	w0, [x20, #:lo12:.LANCHOR45]
 	sub	w0, w0, #1
 	strh	w0, [x20, #:lo12:.LANCHOR45]
@@ -8002,39 +8016,39 @@ update_vpc_list:
 	adrp	x1, .LANCHOR5
 	ldrh	w1, [x1, #:lo12:.LANCHOR5]
 	cmp	w0, w1
-	ble	.L1085
+	ble	.L1092
 	adrp	x1, .LANCHOR164
 	adrp	x0, .LC1
 	mov	w2, 2780
 	add	x1, x1, :lo12:.LANCHOR164
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1085:
+.L1092:
 	mov	w0, 1
-	b	.L1076
-.L1078:
+	b	.L1083
+.L1085:
 	adrp	x0, .LANCHOR51
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w19
-	beq	.L1084
+	beq	.L1091
 	adrp	x0, .LANCHOR52
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
-	beq	.L1084
+	beq	.L1091
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w19
-	bne	.L1079
-.L1084:
+	bne	.L1086
+.L1091:
 	mov	w0, 0
-.L1076:
+.L1083:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1077:
+.L1084:
 	mov	w0, w19
 	bl	List_update_data_list
-	b	.L1084
+	b	.L1091
 	.size	update_vpc_list, .-update_vpc_list
 	.section	.text.decrement_vpc_count,"ax",@progbits
 	.align	2
@@ -8048,12 +8062,12 @@ decrement_vpc_count:
 	str	x21, [sp, 32]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1088
+	beq	.L1095
 	adrp	x21, .LANCHOR42
 	ubfiz	x20, x19, 1, 16
 	ldr	x1, [x21, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x20]
-	cbnz	w0, .L1089
+	cbnz	w0, .L1096
 	mov	w2, 0
 	mov	w1, w19
 	adrp	x0, .LC105
@@ -8061,37 +8075,37 @@ decrement_vpc_count:
 	bl	printf
 	ldr	x0, [x21, #:lo12:.LANCHOR42]
 	ldrh	w0, [x0, x20]
-	cbz	w0, .L1090
-.L1095:
+	cbz	w0, .L1097
+.L1102:
 	mov	w20, 0
-.L1087:
+.L1094:
 	mov	w0, w20
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1090:
+.L1097:
 	mov	w2, 2795
 	adrp	x1, .LANCHOR165
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR165
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	b	.L1095
-.L1089:
+	b	.L1102
+.L1096:
 	sub	w0, w0, #1
 	strh	w0, [x1, x20]
-.L1088:
+.L1095:
 	adrp	x21, .LANCHOR142
 	mov	w1, 65535
 	ldrh	w0, [x21, #:lo12:.LANCHOR142]
 	cmp	w0, w1
-	bne	.L1092
+	bne	.L1099
 	strh	w19, [x21, #:lo12:.LANCHOR142]
-	b	.L1095
-.L1092:
+	b	.L1102
+.L1099:
 	cmp	w19, w0
-	beq	.L1095
+	beq	.L1102
 	bl	update_vpc_list
 	cmp	w0, 0
 	adrp	x1, .LANCHOR40
@@ -8109,16 +8123,16 @@ decrement_vpc_count:
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	and	x2, x0, 65535
 	ldrh	w1, [x1, x2, lsl 1]
-	cbnz	w1, .L1087
+	cbnz	w1, .L1094
 	cmp	w19, w0, uxth
-	beq	.L1087
+	beq	.L1094
 	mov	w2, 2811
 	adrp	x1, .LANCHOR165
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR165
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	b	.L1087
+	b	.L1094
 	.size	decrement_vpc_count, .-decrement_vpc_count
 	.section	.text.FtlRecoverySuperblock,"ax",@progbits
 	.align	2
@@ -8136,7 +8150,7 @@ FtlRecoverySuperblock:
 	stp	x25, x26, [sp, 64]
 	cmp	w0, w1
 	stp	x27, x28, [sp, 80]
-	beq	.L1219
+	beq	.L1226
 	ldrb	w0, [x19, 6]
 	str	w0, [x29, 164]
 	adrp	x0, .LANCHOR19
@@ -8144,11 +8158,11 @@ FtlRecoverySuperblock:
 	str	x0, [x29, 128]
 	ldrh	w2, [x0, #:lo12:.LANCHOR19]
 	cmp	w2, w26
-	bne	.L1099
+	bne	.L1106
 	strh	wzr, [x19, 4]
-.L1225:
+.L1232:
 	strb	wzr, [x19, 6]
-.L1219:
+.L1226:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -8157,17 +8171,17 @@ FtlRecoverySuperblock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L1099:
+.L1106:
 	ldrh	w0, [x19, 16]
 	mov	w20, 0
-.L1100:
+.L1107:
 	cmp	w0, w1
-	beq	.L1101
+	beq	.L1108
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
 	mov	w23, w0
 	cmn	w0, #1
-	beq	.L1102
+	beq	.L1109
 	adrp	x1, .LANCHOR91
 	adrp	x2, .LANCHOR3
 	adrp	x20, .LANCHOR112
@@ -8188,9 +8202,9 @@ FtlRecoverySuperblock:
 	ldrh	w1, [x2, #:lo12:.LANCHOR3]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.L1103:
+.L1110:
 	cmp	x4, x1
-	bne	.L1107
+	bne	.L1114
 	mov	w2, 0
 	mov	w1, w22
 	bl	FlashReadPages
@@ -8204,69 +8218,69 @@ FtlRecoverySuperblock:
 	mov	w3, 0
 	sub	w21, w21, #1
 	str	x0, [x29, 144]
-.L1108:
+.L1115:
 	cmp	w22, w3
-	bne	.L1113
+	bne	.L1120
 	add	w22, w23, 1
 	ldr	w0, [x4, 4]
 	and	w22, w22, 65535
-.L1221:
+.L1228:
 	lsr	w0, w0, 10
 	bl	P2V_plane
 	and	w27, w0, 65535
 	ldr	x0, [x29, 128]
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	cmp	w0, w22
-	bne	.L1115
+	bne	.L1122
 	strh	w22, [x19, 2]
 	strb	wzr, [x19, 6]
 	strh	wzr, [x19, 4]
-.L1115:
+.L1122:
 	ldr	w0, [x29, 164]
 	cmp	w22, w26
 	cset	w1, eq
 	cmp	w27, w0
 	cset	w0, eq
 	tst	w1, w0
-	beq	.L1116
-.L1226:
+	beq	.L1123
+.L1233:
 	mov	w2, w27
 	mov	w1, w22
 	mov	x0, x19
 	bl	ftl_sb_update_avl_pages
-	b	.L1219
-.L1101:
+	b	.L1226
+.L1108:
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	add	x0, x19, x20, sxtw 1
 	ldrh	w0, [x0, 16]
-	b	.L1100
-.L1102:
-	cbz	w26, .L1104
+	b	.L1107
+.L1109:
+	cbz	w26, .L1111
 	adrp	x1, .LANCHOR166
 	adrp	x0, .LC1
 	mov	w2, 1766
 	add	x1, x1, :lo12:.LANCHOR166
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1104:
+.L1111:
 	ldr	w0, [x29, 164]
 	cmp	w0, 0
 	ccmp	w20, w0, 4, ne
-	beq	.L1105
+	beq	.L1112
 	adrp	x1, .LANCHOR166
 	adrp	x0, .LC1
 	mov	w2, 1767
 	add	x1, x1, :lo12:.LANCHOR166
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1105:
+.L1112:
 	strh	wzr, [x19, 2]
-	b	.L1225
-.L1107:
+	b	.L1232
+.L1114:
 	ldrh	w3, [x4]
 	cmp	w3, w10
-	beq	.L1106
+	beq	.L1113
 	ubfiz	x2, x22, 5, 16
 	orr	w3, w23, w3, lsl 10
 	add	x2, x0, x2
@@ -8281,90 +8295,90 @@ FtlRecoverySuperblock:
 	asr	w3, w3, 2
 	add	x3, x7, x3, sxtw 2
 	str	x3, [x2, 16]
-.L1106:
-	add	x4, x4, 2
-	b	.L1103
 .L1113:
+	add	x4, x4, 2
+	b	.L1110
+.L1120:
 	ldr	w0, [x11]
-	cbnz	w0, .L1109
+	cbnz	w0, .L1116
 	ldr	x8, [x11, 16]
 	ldr	w5, [x8, 4]
 	cmn	w5, #1
-	beq	.L1110
+	beq	.L1117
 	ldr	w1, [x7]
 	mov	w0, w5
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L1110
+	cbz	w0, .L1117
 	add	w5, w5, 1
 	str	w5, [x7]
-.L1110:
+.L1117:
 	ldr	w0, [x8]
 	cmn	w0, #1
-	bne	.L1112
+	bne	.L1119
 	ubfiz	x3, x3, 5, 16
 	and	w22, w23, 65535
 	add	x3, x4, x3
 	ldr	w0, [x3, 4]
-	b	.L1221
-.L1109:
+	b	.L1228
+.L1116:
 	mov	w6, w10
-.L1112:
+.L1119:
 	add	w3, w3, 1
 	add	x11, x11, 32
 	and	w3, w3, 65535
-	b	.L1108
-.L1116:
+	b	.L1115
+.L1123:
 	mov	w0, 65535
 	cmp	w6, w0
-	bne	.L1117
+	bne	.L1124
 	ldrb	w0, [x19, 8]
-	cbnz	w0, .L1118
-.L1117:
+	cbnz	w0, .L1125
+.L1124:
 	adrp	x25, .LANCHOR145
 	and	w28, w23, 65535
 	ldr	w0, [x25, #:lo12:.LANCHOR145]
 	cmn	w0, #1
-	bne	.L1119
+	bne	.L1126
 	str	w21, [x25, #:lo12:.LANCHOR145]
-.L1119:
+.L1126:
 	add	w0, w26, 7
 	cmp	w0, w23, uxth
-	bge	.L1168
+	bge	.L1175
 	sub	w24, w28, #7
 	and	w24, w24, 65535
-.L1120:
+.L1127:
 	ldr	x0, [x29, 152]
 	mov	w3, 65535
 	mov	w5, 1
 	add	x4, x0, :lo12:.LANCHOR3
-.L1121:
+.L1128:
 	cmp	w24, w28
-	bhi	.L1131
+	bhi	.L1138
 	ldrh	w1, [x4]
 	mov	w23, 0
 	ldr	x0, [x20, #:lo12:.LANCHOR112]
 	add	x1, x1, 8
 	ldr	x2, [x29, 168]
 	add	x1, x19, x1, lsl 1
-	b	.L1132
-.L1168:
+	b	.L1139
+.L1175:
 	mov	w24, w26
-	b	.L1120
-.L1123:
+	b	.L1127
+.L1130:
 	ldrh	w6, [x2]
 	cmp	w6, w3
-	beq	.L1122
+	beq	.L1129
 	ubfiz	x7, x23, 5, 16
 	add	w23, w23, 1
 	add	x7, x0, x7
 	and	w23, w23, 65535
 	orr	w6, w24, w6, lsl 10
 	str	w6, [x7, 4]
-.L1122:
+.L1129:
 	add	x2, x2, 2
-.L1132:
+.L1139:
 	cmp	x2, x1
-	bne	.L1123
+	bne	.L1130
 	mov	w1, w23
 	mov	w2, 0
 	str	w5, [x29, 112]
@@ -8381,21 +8395,21 @@ FtlRecoverySuperblock:
 	add	x23, x2, x23
 	ldr	x4, [x29, 136]
 	mov	w2, 0
-.L1124:
+.L1131:
 	cmp	x23, x0
-	bne	.L1129
-	cbz	w2, .L1130
+	bne	.L1136
+	cbz	w2, .L1137
 	str	w1, [x25, #:lo12:.LANCHOR145]
-.L1130:
+.L1137:
 	add	w24, w24, 1
 	and	w24, w24, 65535
-	b	.L1121
-.L1129:
+	b	.L1128
+.L1136:
 	ldr	w6, [x0, -16]
-	cbz	w6, .L1125
-	cbz	w2, .L1118
+	cbz	w6, .L1132
+	cbz	w2, .L1125
 	str	w1, [x25, #:lo12:.LANCHOR145]
-.L1118:
+.L1125:
 	adrp	x0, .LANCHOR167
 	mov	w23, w26
 	mov	w1, 1
@@ -8403,7 +8417,7 @@ FtlRecoverySuperblock:
 	strh	w1, [x0, #:lo12:.LANCHOR167]
 	add	x0, x28, :lo12:.LANCHOR145
 	str	x0, [x29, 104]
-.L1133:
+.L1140:
 	ldr	x1, [x29, 152]
 	mov	w24, 0
 	ldr	x0, [x20, #:lo12:.LANCHOR112]
@@ -8412,9 +8426,9 @@ FtlRecoverySuperblock:
 	ldrh	w1, [x1, #:lo12:.LANCHOR3]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.L1134:
+.L1141:
 	cmp	x1, x2
-	bne	.L1136
+	bne	.L1143
 	mov	w2, 0
 	mov	w1, w24
 	bl	FlashReadPages
@@ -8424,62 +8438,62 @@ FtlRecoverySuperblock:
 	adrp	x0, .LANCHOR168
 	add	x0, x0, :lo12:.LANCHOR168
 	str	x0, [x29, 120]
-.L1137:
+.L1144:
 	ldr	x0, [x29, 112]
 	cmp	x25, x0
-	bne	.L1162
+	bne	.L1169
 	ldr	x0, [x29, 128]
 	add	w23, w23, 1
 	and	w23, w23, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	cmp	w0, w23
-	bne	.L1133
+	bne	.L1140
 	ldr	x0, [x29, 152]
 	mov	w2, 65535
 	strh	w23, [x19, 2]
 	strh	wzr, [x19, 4]
 	ldrh	w1, [x0, #:lo12:.LANCHOR3]
 	mov	w0, 0
-.L1163:
+.L1170:
 	cmp	w0, w1
-	beq	.L1219
+	beq	.L1226
 	ldr	x4, [x29, 168]
 	ldrh	w3, [x4], 2
 	str	x4, [x29, 168]
 	cmp	w3, w2
-	beq	.L1164
+	beq	.L1171
 	strb	w0, [x19, 6]
-	b	.L1219
-.L1125:
+	b	.L1226
+.L1132:
 	ldr	x6, [x0]
 	ldrh	w7, [x6]
 	cmp	w7, w3
-	beq	.L1128
+	beq	.L1135
 	ldr	w6, [x6, 4]
 	cmn	w6, #1
 	csel	w1, w1, w6, eq
 	csel	w2, w2, w5, eq
-.L1128:
+.L1135:
 	add	x0, x0, 32
-	b	.L1124
-.L1131:
+	b	.L1131
+.L1138:
 	mov	w0, -1
 	str	w0, [x25, #:lo12:.LANCHOR145]
-	b	.L1118
-.L1136:
+	b	.L1125
+.L1143:
 	ldrh	w3, [x2]
 	cmp	w3, w5
-	beq	.L1135
+	beq	.L1142
 	ubfiz	x4, x24, 5, 16
 	add	w24, w24, 1
 	add	x4, x0, x4
 	and	w24, w24, 65535
 	orr	w3, w23, w3, lsl 10
 	str	w3, [x4, 4]
-.L1135:
+.L1142:
 	add	x2, x2, 2
-	b	.L1134
-.L1162:
+	b	.L1141
+.L1169:
 	ldr	x4, [x20, #:lo12:.LANCHOR112]
 	add	x4, x4, x25
 	ldr	w5, [x4, 4]
@@ -8488,38 +8502,38 @@ FtlRecoverySuperblock:
 	bl	P2V_plane
 	and	w0, w0, 65535
 	cmp	w23, w26
-	bcc	.L1138
+	bcc	.L1145
 	ldr	w1, [x29, 164]
 	ccmp	w1, w0, 0, eq
-	bhi	.L1138
+	bhi	.L1145
 	cmp	w23, w22
 	ccmp	w27, w0, 0, eq
-	beq	.L1139
+	beq	.L1146
 	ldr	w0, [x4]
 	cmn	w0, #1
-	beq	.L1140
+	beq	.L1147
 	ldr	x3, [x4, 16]
 	mov	w0, 61589
 	ldrh	w1, [x3]
 	cmp	w1, w0
-	beq	.L1141
+	beq	.L1148
 	ldrh	w0, [x19]
-.L1223:
+.L1230:
 	bl	decrement_vpc_count
-	b	.L1138
-.L1141:
+	b	.L1145
+.L1148:
 	ldr	w21, [x3, 4]
 	cmn	w21, #1
-	beq	.L1142
+	beq	.L1149
 	ldr	x0, [x29, 144]
 	ldr	w1, [x0, #:lo12:.LANCHOR71]
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L1142
+	cbz	w0, .L1149
 	ldr	x1, [x29, 144]
 	add	w0, w21, 1
 	str	w0, [x1, #:lo12:.LANCHOR71]
-.L1142:
+.L1149:
 	ldp	w24, w0, [x3, 8]
 	add	x1, x29, 184
 	str	w0, [x29, 180]
@@ -8528,13 +8542,13 @@ FtlRecoverySuperblock:
 	bl	log2phys
 	ldr	w1, [x28, #:lo12:.LANCHOR145]
 	cmn	w1, #1
-	beq	.L1143
+	beq	.L1150
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L1143
+	cbz	w0, .L1150
 	ldr	w1, [x29, 180]
 	cmn	w1, #1
-	beq	.L1144
+	beq	.L1151
 	ldr	x0, [x20, #:lo12:.LANCHOR112]
 	mov	w2, 0
 	add	x0, x0, x25
@@ -8548,15 +8562,15 @@ FtlRecoverySuperblock:
 	add	x4, x0, x25
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	bne	.L1145
-.L1146:
+	bne	.L1152
+.L1153:
 	mov	w0, -1
 	str	w0, [x29, 180]
-.L1153:
+.L1160:
 	ldr	w3, [x29, 180]
 	cmn	w3, #1
-	beq	.L1138
-.L1167:
+	beq	.L1145
+.L1174:
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
 	and	w24, w0, 65535
@@ -8564,7 +8578,7 @@ FtlRecoverySuperblock:
 	mov	w3, w24
 	ldrh	w0, [x0, #:lo12:.LANCHOR5]
 	cmp	w0, w24
-	bhi	.L1158
+	bhi	.L1165
 	mov	w2, 2019
 	adrp	x1, .LANCHOR166
 	adrp	x0, .LC1
@@ -8573,50 +8587,50 @@ FtlRecoverySuperblock:
 	str	w24, [x29, 136]
 	bl	printf
 	ldr	w3, [x29, 136]
-.L1158:
+.L1165:
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x24, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1159
+	cbz	w0, .L1166
 	mov	w0, w3
-	b	.L1223
-.L1144:
+	b	.L1230
+.L1151:
 	ldp	w1, w0, [x29, 184]
 	cmp	w1, w0
-	bne	.L1138
+	bne	.L1145
 	mov	w2, 1
 	add	x1, x29, 180
 	mov	w0, w24
 	bl	log2phys
-.L1138:
-	add	x25, x25, 32
-	b	.L1137
 .L1145:
+	add	x25, x25, 32
+	b	.L1144
+.L1152:
 	ldr	w0, [x3, 8]
 	cmp	w24, w0
-	bne	.L1146
+	bne	.L1153
 	ldr	w0, [x3, 4]
 	str	w0, [x29, 136]
 	str	x3, [x29, 96]
 	uxtw	x1, w0
 	ldr	w0, [x28, #:lo12:.LANCHOR145]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L1146
+	cbz	w0, .L1153
 	ldp	w0, w1, [x29, 184]
 	ldr	x3, [x29, 96]
 	cmp	w0, w1
 	ldr	w1, [x29, 180]
-	bne	.L1148
-.L1222:
+	bne	.L1155
+.L1229:
 	mov	w0, w24
 	bl	FtlReUsePrevPpa
-	b	.L1146
-.L1148:
+	b	.L1153
+.L1155:
 	cmp	w0, w1
-	beq	.L1146
+	beq	.L1153
 	cmn	w0, #1
-	beq	.L1149
+	beq	.L1156
 	ldr	x3, [x4, 16]
 	mov	w2, 0
 	str	w0, [x4, 4]
@@ -8625,57 +8639,57 @@ FtlRecoverySuperblock:
 	mov	x0, x4
 	bl	FlashReadPages
 	ldr	x3, [x29, 96]
-.L1150:
+.L1157:
 	ldr	x0, [x20, #:lo12:.LANCHOR112]
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	beq	.L1151
+	beq	.L1158
 	ldr	x0, [x29, 104]
 	ldr	w3, [x3, 4]
 	mov	w1, w3
 	ldr	w0, [x0]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L1151
+	cbz	w0, .L1158
 	ldr	w0, [x29, 136]
 	mov	w1, w3
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L1146
-.L1151:
+	cbz	w0, .L1153
+.L1158:
 	ldr	w1, [x29, 180]
-	b	.L1222
-.L1149:
+	b	.L1229
+.L1156:
 	str	w0, [x4]
-	b	.L1150
-.L1143:
+	b	.L1157
+.L1150:
 	ldp	w1, w0, [x29, 184]
 	cmp	w1, w0
-	beq	.L1153
+	beq	.L1160
 	mov	w2, 1
 	add	x1, x29, 188
 	mov	w0, w24
 	bl	log2phys
 	ldr	w3, [x29, 184]
 	cmn	w3, #1
-	beq	.L1153
+	beq	.L1160
 	ldr	w0, [x29, 180]
 	cmp	w3, w0
-	beq	.L1167
+	beq	.L1174
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
 	adrp	x1, .LANCHOR51
 	and	w0, w0, 65535
 	ldrh	w1, [x1, #:lo12:.LANCHOR51]
 	cmp	w1, w0
-	beq	.L1157
+	beq	.L1164
 	adrp	x1, .LANCHOR52
 	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	beq	.L1157
+	beq	.L1164
 	adrp	x1, .LANCHOR53
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L1153
-.L1157:
+	bne	.L1160
+.L1164:
 	ldr	x0, [x20, #:lo12:.LANCHOR112]
 	mov	w2, 0
 	mov	w1, 1
@@ -8686,55 +8700,55 @@ FtlRecoverySuperblock:
 	ldr	x0, [x20, #:lo12:.LANCHOR112]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L1153
+	beq	.L1160
 	ldr	x4, [x29, 136]
 	mov	w0, w21
 	ldr	w1, [x4, 4]
 	bl	ftl_cmp_data_ver
-	cbnz	w0, .L1153
+	cbnz	w0, .L1160
 	mov	w2, 1
 	add	x1, x29, 184
 	mov	w0, w24
 	bl	log2phys
-	b	.L1153
-.L1159:
+	b	.L1160
+.L1166:
 	mov	w1, w24
 	adrp	x0, .LC106
 	add	x0, x0, :lo12:.LC106
 	bl	printf
-	b	.L1138
-.L1140:
+	b	.L1145
+.L1147:
 	ldr	x0, [x29, 120]
 	ldr	w0, [x0]
 	cmp	w0, 31
-	bhi	.L1160
+	bhi	.L1167
 	adrp	x1, .LANCHOR169
 	add	x1, x1, :lo12:.LANCHOR169
 	str	w5, [x1, w0, uxtw 2]
 	add	w0, w0, 1
 	ldr	x1, [x29, 120]
 	str	w0, [x1]
-.L1160:
+.L1167:
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
 	ldr	w0, [x28, #:lo12:.LANCHOR145]
 	cmn	w0, #1
-	bne	.L1161
-.L1224:
+	bne	.L1168
+.L1231:
 	str	w21, [x28, #:lo12:.LANCHOR145]
-	b	.L1138
-.L1161:
+	b	.L1145
+.L1168:
 	cmp	w21, w0
-	bcs	.L1138
-	b	.L1224
-.L1164:
+	bcs	.L1145
+	b	.L1231
+.L1171:
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L1163
-.L1139:
+	b	.L1170
+.L1146:
 	strb	w27, [x19, 6]
 	strh	w22, [x19, 2]
-	b	.L1226
+	b	.L1233
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
 	.section	.text.FtlWriteDump_data,"ax",@progbits
 	.align	2
@@ -8750,17 +8764,17 @@ FtlWriteDump_data:
 	stp	x23, x24, [sp, 48]
 	ldrh	w2, [x0, 4]
 	str	x25, [sp, 64]
-	cbz	w2, .L1228
+	cbz	w2, .L1235
 	ldrb	w1, [x0, 8]
-	cbnz	w1, .L1228
+	cbnz	w1, .L1235
 	adrp	x3, .LANCHOR19
 	ldrb	w1, [x0, 7]
 	ldrh	w3, [x3, #:lo12:.LANCHOR19]
 	mul	w1, w1, w3
 	cmp	w2, w1
-	beq	.L1228
+	beq	.L1235
 	ldrb	w0, [x0, 10]
-	cbnz	w0, .L1227
+	cbnz	w0, .L1234
 	adrp	x0, .LANCHOR61
 	mov	w2, 0
 	add	x1, x29, 92
@@ -8780,12 +8794,12 @@ FtlWriteDump_data:
 	stp	x0, x20, [x29, 104]
 	str	w21, [x29, 120]
 	str	wzr, [x20, 4]
-	beq	.L1230
+	beq	.L1237
 	mov	w2, 0
 	mov	w1, 1
 	add	x0, x29, 96
 	bl	FlashReadPages
-.L1231:
+.L1238:
 	adrp	x23, .LANCHOR71
 	lsl	w25, w25, 2
 	add	x22, x19, :lo12:.LANCHOR51
@@ -8793,29 +8807,29 @@ FtlWriteDump_data:
 	mov	w0, -3947
 	mov	w24, 0
 	strh	w0, [x20]
-.L1232:
+.L1239:
 	cmp	w25, w24
-	bne	.L1236
-.L1233:
+	bne	.L1243
+.L1240:
 	add	x19, x19, :lo12:.LANCHOR51
 	mov	w0, 1
 	strb	w0, [x19, 10]
-.L1227:
+.L1234:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1230:
+.L1237:
 	adrp	x1, .LANCHOR23
 	ldrh	w2, [x1, #:lo12:.LANCHOR23]
 	mov	w1, 255
 	bl	ftl_memset
-	b	.L1231
-.L1236:
+	b	.L1238
+.L1243:
 	ldrh	w0, [x22, 4]
-	cbz	w0, .L1233
+	cbz	w0, .L1240
 	ldr	w0, [x29, 100]
 	add	w24, w24, 1
 	stp	w21, w0, [x20, 8]
@@ -8837,11 +8851,11 @@ FtlWriteDump_data:
 	bl	FlashProgPages
 	ldrh	w0, [x22]
 	bl	decrement_vpc_count
-	b	.L1232
-.L1228:
+	b	.L1239
+.L1235:
 	add	x19, x19, :lo12:.LANCHOR51
 	strb	wzr, [x19, 10]
-	b	.L1227
+	b	.L1234
 	.size	FtlWriteDump_data, .-FtlWriteDump_data
 	.section	.text.l2p_flush,"ax",@progbits
 	.align	2
@@ -8857,27 +8871,27 @@ l2p_flush:
 	mov	w19, 0
 	adrp	x21, .LANCHOR55
 	bl	FtlWriteDump_data
-.L1246:
+.L1253:
 	ldrh	w0, [x20]
 	cmp	w0, w19
-	bhi	.L1248
+	bhi	.L1255
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1248:
+.L1255:
 	ldr	x1, [x21, #:lo12:.LANCHOR55]
 	ubfiz	x0, x19, 4, 16
 	add	x0, x1, x0
 	ldr	w0, [x0, 4]
-	tbz	w0, #31, .L1247
+	tbz	w0, #31, .L1254
 	mov	w0, w19
 	bl	flush_l2p_region
-.L1247:
+.L1254:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1246
+	b	.L1253
 	.size	l2p_flush, .-l2p_flush
 	.section	.text.FtlSuperblockPowerLostFix,"ax",@progbits
 	.align	2
@@ -8914,10 +8928,10 @@ FtlSuperblockPowerLostFix:
 	mov	w1, 22136
 	movk	w1, 0x1234, lsl 16
 	str	w1, [x0, 4]
-.L1256:
+.L1263:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1252
-.L1253:
+	cbnz	w0, .L1259
+.L1260:
 	ldrh	w0, [x19]
 	adrp	x1, .LANCHOR42
 	ldrh	w3, [x19, 4]
@@ -8935,12 +8949,12 @@ FtlSuperblockPowerLostFix:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1252:
+.L1259:
 	mov	x0, x19
 	bl	get_new_active_ppa
 	str	w0, [x29, 52]
 	cmn	w0, #1
-	beq	.L1253
+	beq	.L1260
 	ldr	w0, [x22]
 	mov	w3, 0
 	str	w0, [x21, 4]
@@ -8955,8 +8969,8 @@ FtlSuperblockPowerLostFix:
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
 	subs	w20, w20, #1
-	bne	.L1256
-	b	.L1253
+	bne	.L1263
+	b	.L1260
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
 	.section	.text.FtlVendorPartWrite,"ax",@progbits
 	.align	2
@@ -8976,7 +8990,7 @@ FtlVendorPartWrite:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w1, w0
-	bhi	.L1272
+	bhi	.L1279
 	adrp	x0, .LANCHOR22
 	adrp	x25, .LANCHOR12
 	adrp	x26, .LANCHOR23
@@ -8986,9 +9000,9 @@ FtlVendorPartWrite:
 	add	x26, x26, :lo12:.LANCHOR23
 	mov	w23, 0
 	lsr	w21, w28, w21
-.L1266:
-	cbnz	w20, .L1271
-.L1264:
+.L1273:
+	cbnz	w20, .L1278
+.L1271:
 	mov	w0, w23
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -8997,7 +9011,7 @@ FtlVendorPartWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 208
 	ret
-.L1271:
+.L1278:
 	ldrh	w1, [x25]
 	adrp	x0, .LANCHOR133
 	adrp	x27, .LANCHOR117
@@ -9010,9 +9024,9 @@ FtlVendorPartWrite:
 	and	w19, w19, 65535
 	cmp	w20, w19
 	csel	w19, w0, w19, cc
-	cbz	w2, .L1268
+	cbz	w2, .L1275
 	cmp	w19, w1
-	beq	.L1268
+	beq	.L1275
 	ldr	x0, [x27, #:lo12:.LANCHOR117]
 	str	x0, [x29, 120]
 	add	x0, x29, 144
@@ -9022,7 +9036,7 @@ FtlVendorPartWrite:
 	mov	w1, w2
 	add	x0, x29, 112
 	bl	FlashReadPages
-.L1269:
+.L1276:
 	lsl	w4, w19, 9
 	ldr	x0, [x27, #:lo12:.LANCHOR117]
 	lsl	w22, w22, 7
@@ -9043,16 +9057,16 @@ FtlVendorPartWrite:
 	ldr	w4, [x29, 108]
 	csinv	w23, w23, wzr, ne
 	add	x24, x24, x4, sxtw
-	b	.L1266
-.L1268:
+	b	.L1273
+.L1275:
 	ldrh	w2, [x26]
 	mov	w1, 0
 	ldr	x0, [x27, #:lo12:.LANCHOR117]
 	bl	ftl_memset
-	b	.L1269
-.L1272:
+	b	.L1276
+.L1279:
 	mov	w23, -1
-	b	.L1264
+	b	.L1271
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.section	.text.Ftl_save_ext_data,"ax",@progbits
 	.align	2
@@ -9065,7 +9079,7 @@ Ftl_save_ext_data:
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1277
+	bne	.L1284
 	mov	w0, 72
 	mov	w1, 1
 	movk	w0, 0x5000, lsl 16
@@ -9108,7 +9122,7 @@ Ftl_save_ext_data:
 	str	w0, [x2, 48]
 	mov	w0, 0
 	b	FtlVendorPartWrite
-.L1277:
+.L1284:
 	ret
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
 	.section	.text.FtlEctTblFlush,"ax",@progbits
@@ -9119,20 +9133,20 @@ FtlEctTblFlush:
 	adrp	x2, .LANCHOR170
 	ldrh	w1, [x2, #:lo12:.LANCHOR170]
 	cmp	w1, 31
-	bhi	.L1283
+	bhi	.L1290
 	add	w1, w1, 1
 	strh	w1, [x2, #:lo12:.LANCHOR170]
 	mov	w1, 1
-.L1280:
+.L1287:
 	adrp	x2, .LANCHOR127
-	cbnz	w0, .L1281
+	cbnz	w0, .L1288
 	ldr	x0, [x2, #:lo12:.LANCHOR127]
 	ldr	w3, [x0, 20]
 	ldr	w0, [x0, 16]
 	add	w1, w1, w3
 	cmp	w0, w1
-	bcc	.L1285
-.L1281:
+	bcc	.L1292
+.L1288:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	ldr	x2, [x2, #:lo12:.LANCHOR127]
@@ -9155,10 +9169,10 @@ FtlEctTblFlush:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1283:
+.L1290:
 	mov	w1, 32
-	b	.L1280
-.L1285:
+	b	.L1287
+.L1292:
 	mov	w0, 0
 	ret
 	.size	FtlEctTblFlush, .-FtlEctTblFlush
@@ -9188,7 +9202,7 @@ FtlVendorPartRead:
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	cmp	w1, w0
-	bhi	.L1297
+	bhi	.L1304
 	adrp	x0, .LANCHOR22
 	mov	x25, x2
 	mov	w24, 0
@@ -9198,9 +9212,9 @@ FtlVendorPartRead:
 	add	x0, x0, :lo12:.LANCHOR12
 	str	x0, [x29, 104]
 	lsr	w20, w22, w20
-.L1290:
-	cbnz	w21, .L1296
-.L1288:
+.L1297:
+	cbnz	w21, .L1303
+.L1295:
 	mov	w0, w24
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9209,7 +9223,7 @@ FtlVendorPartRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 208
 	ret
-.L1296:
+.L1303:
 	ldr	x0, [x27, #:lo12:.LANCHOR133]
 	ldr	w4, [x0, w20, uxtw 2]
 	ldr	x0, [x29, 104]
@@ -9222,7 +9236,7 @@ FtlVendorPartRead:
 	cmp	w21, w19
 	csel	w19, w0, w19, cc
 	lsl	w26, w19, 9
-	cbz	w4, .L1292
+	cbz	w4, .L1299
 	adrp	x28, .LANCHOR117
 	mov	w2, 1
 	str	w4, [x29, 96]
@@ -9242,7 +9256,7 @@ FtlVendorPartRead:
 	csinv	w24, w24, wzr, ne
 	ldr	w0, [x0, #:lo12:.LANCHOR148]
 	cmp	w0, 256
-	bne	.L1294
+	bne	.L1301
 	mov	w2, w4
 	mov	w1, w20
 	adrp	x0, .LC107
@@ -9255,28 +9269,28 @@ FtlVendorPartRead:
 	add	x0, x0, :lo12:.LANCHOR158
 	bl	FtlMapWritePage
 	ldr	x5, [x29, 96]
-.L1294:
+.L1301:
 	ldr	x1, [x5, #:lo12:.LANCHOR117]
 	lsl	w23, w23, 7
 	mov	w2, w26
 	mov	x0, x25
 	add	x1, x1, x23, sxtw 2
 	bl	ftl_memcpy
-.L1295:
+.L1302:
 	add	w20, w20, 1
 	sub	w21, w21, w19
 	add	w22, w22, w19
 	add	x25, x25, x26, sxtw
-	b	.L1290
-.L1292:
+	b	.L1297
+.L1299:
 	mov	w2, w26
 	mov	w1, 0
 	mov	x0, x25
 	bl	ftl_memset
-	b	.L1295
-.L1297:
+	b	.L1302
+.L1304:
 	mov	w24, -1
-	b	.L1288
+	b	.L1295
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
 	.section	.text.FtlLoadEctTbl,"ax",@progbits
 	.align	2
@@ -9297,7 +9311,7 @@ FtlLoadEctTbl:
 	mov	w0, 17221
 	movk	w0, 0x4254, lsl 16
 	cmp	w1, w0
-	beq	.L1300
+	beq	.L1307
 	adrp	x1, .LC108
 	adrp	x0, .LC71
 	add	x1, x1, :lo12:.LC108
@@ -9308,7 +9322,7 @@ FtlLoadEctTbl:
 	ldrh	w2, [x20, #:lo12:.LANCHOR125]
 	lsl	w2, w2, 9
 	bl	ftl_memset
-.L1300:
+.L1307:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -9333,18 +9347,18 @@ Ftl_load_ext_data:
 	mov	w20, 19539
 	movk	w20, 0x4654, lsl 16
 	cmp	w0, w20
-	beq	.L1303
+	beq	.L1310
 	mov	w2, 512
 	mov	w1, 0
 	mov	x0, x21
 	bl	ftl_memset
 	str	w20, [x19, #:lo12:.LANCHOR81]
-.L1303:
+.L1310:
 	ldr	w1, [x19, #:lo12:.LANCHOR81]
 	add	x0, x19, :lo12:.LANCHOR81
 	cmp	w1, w20
 	adrp	x1, .LANCHOR73
-	bne	.L1304
+	bne	.L1311
 	adrp	x2, .LANCHOR68
 	ldr	w3, [x0, 88]
 	str	w3, [x2, #:lo12:.LANCHOR68]
@@ -9379,7 +9393,7 @@ Ftl_load_ext_data:
 	ldr	w2, [x0, 48]
 	adrp	x0, .LANCHOR77
 	str	w2, [x0, #:lo12:.LANCHOR77]
-.L1304:
+.L1311:
 	adrp	x0, .LANCHOR14
 	adrp	x2, .LANCHOR72
 	ldr	w1, [x1, #:lo12:.LANCHOR73]
@@ -9519,7 +9533,7 @@ FtlVpcTblFlush:
 	mov	w0, 0
 	bl	FtlUpdateVaildLpn
 	str	x20, [x29, 104]
-.L1308:
+.L1315:
 	ldrh	w2, [x19, 2]
 	ldrh	w1, [x19]
 	ldr	x0, [x24, #:lo12:.LANCHOR115]
@@ -9531,7 +9545,7 @@ FtlVpcTblFlush:
 	ldrh	w0, [x20]
 	sub	w0, w0, #1
 	cmp	w2, w0
-	blt	.L1309
+	blt	.L1316
 	ldrh	w26, [x19, 4]
 	strh	wzr, [x19, 2]
 	strh	w1, [x19, 4]
@@ -9545,7 +9559,7 @@ FtlVpcTblFlush:
 	strh	w0, [x19]
 	strh	w0, [x27, 2]
 	str	w1, [x27, 4]
-.L1309:
+.L1316:
 	mov	w3, 1
 	mov	x0, x28
 	mov	w1, w3
@@ -9557,48 +9571,48 @@ FtlVpcTblFlush:
 	and	w0, w0, 65535
 	strh	w0, [x19, 2]
 	cmn	w1, #1
-	bne	.L1310
+	bne	.L1317
 	cmp	w0, 1
-	bne	.L1311
+	bne	.L1318
 	adrp	x1, .LANCHOR171
 	adrp	x0, .LC1
 	mov	w2, 1135
 	add	x1, x1, :lo12:.LANCHOR171
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1311:
+.L1318:
 	ldrh	w0, [x19, 2]
 	cmp	w0, 1
-	bne	.L1312
+	bne	.L1319
 	ldr	x0, [x29, 104]
 	ldrh	w0, [x0]
 	sub	w0, w0, #1
 	strh	w0, [x19, 2]
-.L1312:
+.L1319:
 	add	w21, w21, 1
 	and	w21, w21, 65535
 	cmp	w21, 3
-	bls	.L1308
+	bls	.L1315
 	add	x22, x22, :lo12:.LANCHOR148
 	adrp	x0, .LC109
 	mov	w2, w21
 	add	x0, x0, :lo12:.LC109
 	ldr	w1, [x22, 4]
 	bl	printf
-.L1314:
-	b	.L1314
-.L1310:
+.L1321:
+	b	.L1321
+.L1317:
 	cmp	w0, 1
-	beq	.L1308
+	beq	.L1315
 	cmp	w1, 256
-	beq	.L1308
+	beq	.L1315
 	mov	w0, 65535
 	cmp	w26, w0
-	beq	.L1315
+	beq	.L1322
 	mov	w1, 1
 	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-.L1315:
+.L1322:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -9631,14 +9645,14 @@ sftl_deinit:
 	adrp	x0, .LANCHOR86
 	ldr	w0, [x0, #:lo12:.LANCHOR86]
 	cmp	w0, 1
-	bne	.L1328
+	bne	.L1335
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	FtlSysFlush
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1328:
+.L1335:
 	mov	w0, 0
 	ret
 	.size	sftl_deinit, .-sftl_deinit
@@ -9657,56 +9671,56 @@ FtlDiscard:
 	str	x23, [sp, 48]
 	ldr	w1, [x1, #:lo12:.LANCHOR34]
 	cmp	w2, w1
-	bhi	.L1339
+	bhi	.L1346
 	cmp	w19, 31
-	bhi	.L1333
-.L1347:
+	bhi	.L1340
+.L1354:
 	mov	w0, 0
-.L1331:
+.L1338:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1333:
+.L1340:
 	adrp	x21, .LANCHOR12
 	ldrh	w1, [x21, #:lo12:.LANCHOR12]
 	udiv	w20, w0, w1
 	msub	w0, w1, w20, w0
 	ands	w0, w0, 65535
-	beq	.L1334
+	beq	.L1341
 	sub	w1, w1, w0
 	add	w20, w20, 1
 	cmp	w1, w19
 	csel	w1, w1, w19, ls
 	sub	w19, w19, w1, uxth
-.L1334:
+.L1341:
 	adrp	x22, .LANCHOR172
 	adrp	x23, .LANCHOR63
 	add	x22, x22, :lo12:.LANCHOR172
 	add	x23, x23, :lo12:.LANCHOR63
 	mov	w0, -1
 	str	w0, [x29, 76]
-.L1335:
+.L1342:
 	ldrh	w0, [x21, #:lo12:.LANCHOR12]
 	cmp	w19, w0
-	bcs	.L1337
+	bcs	.L1344
 	adrp	x0, .LANCHOR172
 	ldr	w1, [x0, #:lo12:.LANCHOR172]
 	cmp	w1, 32
-	bls	.L1347
+	bls	.L1354
 	str	wzr, [x0, #:lo12:.LANCHOR172]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L1347
-.L1337:
+	b	.L1354
+.L1344:
 	mov	w2, 0
 	add	x1, x29, 72
 	mov	w0, w20
 	bl	log2phys
 	ldr	w0, [x29, 72]
 	cmn	w0, #1
-	beq	.L1336
+	beq	.L1343
 	ldr	w0, [x22]
 	mov	w2, 1
 	add	x1, x29, 76
@@ -9721,14 +9735,14 @@ FtlDiscard:
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L1336:
+.L1343:
 	ldrh	w0, [x21, #:lo12:.LANCHOR12]
 	add	w20, w20, 1
 	sub	w19, w19, w0
-	b	.L1335
-.L1339:
+	b	.L1342
+.L1346:
 	mov	w0, -1
-	b	.L1331
+	b	.L1338
 	.size	FtlDiscard, .-FtlDiscard
 	.section	.text.FtlVpcCheckAndModify,"ax",@progbits
 	.align	2
@@ -9756,10 +9770,10 @@ FtlVpcCheckAndModify:
 	ldr	x0, [x24, #:lo12:.LANCHOR128]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.L1349:
+.L1356:
 	ldr	w0, [x20]
 	cmp	w19, w0
-	bcc	.L1351
+	bcc	.L1358
 	adrp	x21, .LANCHOR5
 	adrp	x22, .LC110
 	add	x21, x21, :lo12:.LANCHOR5
@@ -9767,10 +9781,10 @@ FtlVpcCheckAndModify:
 	mov	w19, 0
 	adrp	x25, .LANCHOR42
 	mov	w23, 65535
-.L1352:
+.L1359:
 	ldrh	w0, [x21]
 	cmp	w0, w19
-	bhi	.L1357
+	bhi	.L1364
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
 	ldr	x25, [sp, 64]
@@ -9779,14 +9793,14 @@ FtlVpcCheckAndModify:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1351:
+.L1358:
 	mov	w2, 0
 	add	x1, x29, 92
 	mov	w0, w19
 	bl	log2phys
 	ldr	w0, [x29, 92]
 	cmn	w0, #1
-	beq	.L1350
+	beq	.L1357
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	ldr	x2, [x24, #:lo12:.LANCHOR128]
@@ -9794,51 +9808,51 @@ FtlVpcCheckAndModify:
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-.L1350:
-	add	w19, w19, 1
-	b	.L1349
 .L1357:
+	add	w19, w19, 1
+	b	.L1356
+.L1364:
 	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	ubfiz	x20, x19, 1, 16
 	ldrh	w2, [x0, x20]
 	ldr	x0, [x24, #:lo12:.LANCHOR128]
 	ldrh	w3, [x0, x20]
 	cmp	w2, w3
-	beq	.L1354
+	beq	.L1361
 	cmp	w2, w23
-	beq	.L1354
+	beq	.L1361
 	mov	w1, w19
 	mov	x0, x22
 	bl	printf
 	adrp	x0, .LANCHOR51
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w19
-	beq	.L1354
+	beq	.L1361
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w19
-	beq	.L1354
+	beq	.L1361
 	adrp	x0, .LANCHOR52
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
-	beq	.L1354
+	beq	.L1361
 	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	ldrh	w1, [x0, x20]
-	cbnz	w1, .L1356
+	cbnz	w1, .L1363
 	ldr	x1, [x24, #:lo12:.LANCHOR128]
 	ldrh	w1, [x1, x20]
 	strh	w1, [x0, x20]
-.L1354:
+.L1361:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1352
-.L1356:
+	b	.L1359
+.L1363:
 	ldr	x1, [x24, #:lo12:.LANCHOR128]
 	ldrh	w1, [x1, x20]
 	strh	w1, [x0, x20]
 	mov	w0, w19
 	bl	update_vpc_list
-	b	.L1354
+	b	.L1361
 	.size	FtlVpcCheckAndModify, .-FtlVpcCheckAndModify
 	.section	.text.allocate_new_data_superblock,"ax",@progbits
 	.align	2
@@ -9854,25 +9868,25 @@ allocate_new_data_superblock:
 	adrp	x0, .LANCHOR5
 	ldrh	w0, [x0, #:lo12:.LANCHOR5]
 	cmp	w0, w19
-	bcs	.L1363
+	bcs	.L1370
 	adrp	x1, .LANCHOR174
 	adrp	x0, .LC1
 	mov	w2, 2714
 	add	x1, x1, :lo12:.LANCHOR174
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1363:
+.L1370:
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1364
+	beq	.L1371
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x19, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1365
+	cbz	w0, .L1372
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-.L1364:
+.L1371:
 	adrp	x1, .LANCHOR142
 	mov	w0, 1
 	strb	w0, [x21, 8]
@@ -9880,20 +9894,20 @@ allocate_new_data_superblock:
 	ldrh	w0, [x1, #:lo12:.LANCHOR142]
 	mov	x20, x1
 	cmp	w0, w2
-	beq	.L1366
+	beq	.L1373
 	cmp	w19, w0
-	bne	.L1367
+	bne	.L1374
 	adrp	x2, .LANCHOR42
 	ubfiz	x1, x0, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR42]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1368
-.L1367:
+	cbz	w1, .L1375
+.L1374:
 	bl	update_vpc_list
-.L1368:
+.L1375:
 	mov	w0, -1
 	strh	w0, [x20, #:lo12:.LANCHOR142]
-.L1366:
+.L1373:
 	mov	x0, x21
 	bl	allocate_data_superblock
 	bl	l2p_flush
@@ -9905,10 +9919,10 @@ allocate_new_data_superblock:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1365:
+.L1372:
 	mov	w0, w19
 	bl	INSERT_FREE_LIST
-	b	.L1364
+	b	.L1371
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
 	.section	.text.FtlProgPages,"ax",@progbits
 	.align	2
@@ -9934,19 +9948,19 @@ FtlProgPages:
 	add	x24, x24, :lo12:.LANCHOR19
 	add	x23, x23, :lo12:.LANCHOR81
 	bl	FlashProgPages
-.L1374:
+.L1381:
 	cmp	x20, x21
-	beq	.L1381
+	beq	.L1388
 	sub	x22, x20, #4
 	adrp	x25, .LANCHOR42
-	b	.L1382
-.L1377:
+	b	.L1389
+.L1384:
 	ldr	w0, [x20]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	ldrh	w1, [x19]
 	cmp	w1, w0, uxth
-	bne	.L1375
+	bne	.L1382
 	ldr	x2, [x25, #:lo12:.LANCHOR42]
 	ubfiz	x1, x1, 1, 16
 	ldrh	w3, [x19, 4]
@@ -9957,12 +9971,12 @@ FtlProgPages:
 	ldrh	w0, [x24]
 	strh	w0, [x19, 2]
 	strh	wzr, [x19, 4]
-.L1375:
+.L1382:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1376
+	cbnz	w0, .L1383
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.L1376:
+.L1383:
 	ldr	w0, [x23, 96]
 	add	w0, w0, 1
 	str	w0, [x23, 96]
@@ -9978,22 +9992,22 @@ FtlProgPages:
 	ldrb	w3, [x19, 9]
 	mov	x0, x22
 	bl	FlashProgPages
-.L1382:
+.L1389:
 	ldr	w0, [x20, -4]
 	cmn	w0, #1
-	beq	.L1377
+	beq	.L1384
 	adrp	x0, .LANCHOR3
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1378
+	bcc	.L1385
 	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
 	mov	w2, 955
 	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1378:
+.L1385:
 	add	x1, x29, 96
 	ldr	w0, [x22, 4]
 	mov	w2, 1
@@ -10007,35 +10021,35 @@ FtlProgPages:
 	and	w1, w0, 65535
 	mov	w22, w1
 	cmn	w3, #1
-	beq	.L1379
+	beq	.L1386
 	adrp	x2, .LANCHOR42
 	ubfiz	x0, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR42]
 	ldrh	w0, [x2, x0]
-	cbnz	w0, .L1380
+	cbnz	w0, .L1387
 	adrp	x0, .LC111
 	mov	w2, 0
 	add	x0, x0, :lo12:.LC111
 	bl	printf
-.L1380:
+.L1387:
 	mov	w0, w22
 	bl	decrement_vpc_count
-.L1379:
+.L1386:
 	add	x20, x20, 32
-	b	.L1374
-.L1381:
+	b	.L1381
+.L1388:
 	adrp	x0, .LANCHOR3
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1373
+	bcc	.L1380
 	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
 	mov	w2, 970
 	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1373:
+.L1380:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -10061,18 +10075,18 @@ FtlGcFreeTempBlock:
 	cmp	w20, w2
 	str	x27, [sp, 80]
 	ldrh	w1, [x21, #:lo12:.LANCHOR19]
-	bne	.L1389
-.L1399:
+	bne	.L1396
+.L1406:
 	adrp	x0, .LANCHOR144
 	ldrh	w2, [x19, #:lo12:.LANCHOR53]
 	mov	w1, 65535
 	str	wzr, [x0, #:lo12:.LANCHOR144]
 	cmp	w2, w1
 	add	x0, x19, :lo12:.LANCHOR53
-	bne	.L1412
-.L1415:
+	bne	.L1419
+.L1422:
 	mov	w0, 0
-.L1388:
+.L1395:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -10080,35 +10094,35 @@ FtlGcFreeTempBlock:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1389:
-	cbz	w0, .L1392
+.L1396:
+	cbz	w0, .L1399
 	adrp	x0, .LANCHOR162
 	ldrh	w3, [x0, #:lo12:.LANCHOR162]
 	cmp	w3, w2
-	beq	.L1393
-.L1394:
+	beq	.L1400
+.L1401:
 	mov	w1, 2
-.L1392:
+.L1399:
 	add	x0, x19, :lo12:.LANCHOR53
 	bl	FtlGcScanTempBlk
 	str	w0, [x29, 108]
 	cmn	w0, #1
-	beq	.L1395
+	beq	.L1402
 	adrp	x0, .LANCHOR43
 	ubfiz	x20, x20, 1, 16
 	ldr	x1, [x0, #:lo12:.LANCHOR43]
 	ldrh	w0, [x1, x20]
 	cmp	w0, 4
-	bls	.L1396
+	bls	.L1403
 	sub	w0, w0, #5
 	strh	w0, [x1, x20]
 	mov	w0, 1
 	bl	FtlEctTblFlush
-.L1396:
+.L1403:
 	adrp	x0, .LANCHOR144
 	mov	x19, x0
 	ldr	w1, [x0, #:lo12:.LANCHOR144]
-	cbnz	w1, .L1397
+	cbnz	w1, .L1404
 	adrp	x0, .LANCHOR81
 	add	x0, x0, :lo12:.LANCHOR81
 	ldr	w1, [x0, 96]
@@ -10118,40 +10132,40 @@ FtlGcFreeTempBlock:
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
-.L1397:
+.L1404:
 	str	wzr, [x19, #:lo12:.LANCHOR144]
-.L1408:
+.L1415:
 	mov	w0, 1
-	b	.L1388
-.L1393:
+	b	.L1395
+.L1400:
 	strh	wzr, [x0, #:lo12:.LANCHOR162]
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 17
-	bhi	.L1394
-	b	.L1392
-.L1395:
+	bhi	.L1401
+	b	.L1399
+.L1402:
 	adrp	x0, .LANCHOR162
 	ldrh	w1, [x0, #:lo12:.LANCHOR162]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1408
-	b	.L1399
-.L1412:
+	bne	.L1415
+	b	.L1406
+.L1419:
 	ldrb	w0, [x0, 7]
 	adrp	x20, .LANCHOR97
 	ldrh	w2, [x21, #:lo12:.LANCHOR19]
 	ldrh	w1, [x20, #:lo12:.LANCHOR97]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L1400
+	beq	.L1407
 	adrp	x1, .LANCHOR176
 	adrp	x0, .LC1
 	mov	w2, 162
 	add	x1, x1, :lo12:.LANCHOR176
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1400:
+.L1407:
 	add	x0, x19, :lo12:.LANCHOR53
 	adrp	x23, .LANCHOR42
 	ldrh	w3, [x21, #:lo12:.LANCHOR19]
@@ -10170,19 +10184,19 @@ FtlGcFreeTempBlock:
 	ldr	w2, [x1, #:lo12:.LANCHOR67]
 	add	w0, w0, w2
 	str	w0, [x1, #:lo12:.LANCHOR67]
-.L1401:
+.L1408:
 	ldrh	w0, [x20, #:lo12:.LANCHOR97]
 	cmp	w0, w21
-	bhi	.L1405
+	bhi	.L1412
 	mov	w0, -1
 	bl	decrement_vpc_count
 	ldrh	w0, [x19, #:lo12:.LANCHOR53]
 	ldr	x2, [x23, #:lo12:.LANCHOR42]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1406
+	cbz	w1, .L1413
 	bl	INSERT_DATA_LIST
-.L1407:
+.L1414:
 	adrp	x0, .LANCHOR95
 	mov	w21, -1
 	strh	wzr, [x20, #:lo12:.LANCHOR97]
@@ -10198,12 +10212,12 @@ FtlGcFreeTempBlock:
 	ldrh	w0, [x0, #:lo12:.LANCHOR78]
 	add	w0, w0, w0, lsl 1
 	cmp	w1, w0, lsr 2
-	ble	.L1415
+	ble	.L1422
 	adrp	x0, .LANCHOR82
 	mov	w1, 20
 	strh	w1, [x0, #:lo12:.LANCHOR82]
-	b	.L1415
-.L1405:
+	b	.L1422
+.L1412:
 	adrp	x0, .LANCHOR98
 	mov	w24, 12
 	ldr	x27, [x0, #:lo12:.LANCHOR98]
@@ -10212,13 +10226,13 @@ FtlGcFreeTempBlock:
 	add	x22, x27, x24
 	ldr	w1, [x22, 8]
 	cmp	w1, w0
-	bcc	.L1402
+	bcc	.L1409
 	adrp	x0, .LC1
 	mov	w2, 168
 	mov	x1, x26
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1402:
+.L1409:
 	ldr	w0, [x22, 8]
 	add	x1, x29, 108
 	mov	w2, 0
@@ -10226,7 +10240,7 @@ FtlGcFreeTempBlock:
 	ldr	w0, [x27, x24]
 	ldr	w1, [x29, 108]
 	cmp	w0, w1
-	bne	.L1403
+	bne	.L1410
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	mov	w24, w0
@@ -10235,21 +10249,21 @@ FtlGcFreeTempBlock:
 	add	x1, x22, 4
 	bl	log2phys
 	mov	w0, w24
-.L1414:
+.L1421:
 	bl	decrement_vpc_count
-.L1404:
+.L1411:
 	add	w21, w21, 1
 	and	w21, w21, 65535
-	b	.L1401
-.L1403:
+	b	.L1408
+.L1410:
 	ldr	w0, [x22, 4]
 	cmp	w1, w0
-	beq	.L1404
+	beq	.L1411
 	ldrh	w0, [x19, #:lo12:.LANCHOR53]
-	b	.L1414
-.L1406:
+	b	.L1421
+.L1413:
 	bl	INSERT_FREE_LIST
-	b	.L1407
+	b	.L1414
 	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
 	.section	.text.FtlGcPageRecovery,"ax",@progbits
 	.align	2
@@ -10268,7 +10282,7 @@ FtlGcPageRecovery:
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR19]
 	cmp	w1, w0
-	bcc	.L1416
+	bcc	.L1423
 	adrp	x0, .LANCHOR140
 	add	x0, x0, :lo12:.LANCHOR140
 	bl	FtlMapBlkWriteDump_data
@@ -10276,7 +10290,7 @@ FtlGcPageRecovery:
 	bl	FtlGcFreeTempBlock
 	adrp	x0, .LANCHOR144
 	str	wzr, [x0, #:lo12:.LANCHOR144]
-.L1416:
+.L1423:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -10328,26 +10342,26 @@ Ftl_gc_temp_data_write_back:
 	ldr	x0, [x20, #:lo12:.LANCHOR113]
 	bl	FlashProgPages
 	mov	w11, 0
-.L1422:
+.L1429:
 	ldr	w1, [x19]
 	cmp	w11, w1
-	bcc	.L1425
+	bcc	.L1432
 	ldr	x0, [x20, #:lo12:.LANCHOR113]
 	bl	FtlGcBufFree
 	str	wzr, [x19]
 	adrp	x0, .LANCHOR53+4
 	ldrh	w0, [x0, #:lo12:.LANCHOR53+4]
-	cbnz	w0, .L1426
+	cbnz	w0, .L1433
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
-	b	.L1428
-.L1425:
+	b	.L1435
+.L1432:
 	ldr	x2, [x20, #:lo12:.LANCHOR113]
 	ubfiz	x0, x11, 5, 16
 	add	x1, x2, x0
 	ldr	w2, [x2, x0]
 	cmn	w2, #1
-	bne	.L1423
+	bne	.L1430
 	adrp	x0, .LANCHOR53
 	adrp	x3, .LANCHOR42
 	ldrh	w4, [x0, #:lo12:.LANCHOR53]
@@ -10364,23 +10378,23 @@ Ftl_gc_temp_data_write_back:
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
 	bl	FtlGcPageVarInit
-.L1428:
+.L1435:
 	mov	w0, 1
-.L1421:
+.L1428:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1423:
+.L1430:
 	ldr	x0, [x1, 16]
 	ldr	w1, [x1, 4]
 	ldp	w2, w0, [x0, 8]
 	bl	FtlGcUpdatePage
 	add	w11, w11, 1
 	and	w11, w11, 65535
-	b	.L1422
-.L1426:
+	b	.L1429
+.L1433:
 	mov	w0, 0
-	b	.L1421
+	b	.L1428
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
 	.section	.text.Ftl_get_new_temp_ppa,"ax",@progbits
 	.align	2
@@ -10395,11 +10409,11 @@ Ftl_get_new_temp_ppa:
 	mov	x19, x0
 	ldrh	w3, [x0, #:lo12:.LANCHOR53]
 	cmp	w3, w2
-	beq	.L1430
+	beq	.L1437
 	add	x1, x0, :lo12:.LANCHOR53
 	ldrh	w0, [x1, 4]
-	cbnz	w0, .L1431
-.L1430:
+	cbnz	w0, .L1438
+.L1437:
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
 	add	x0, x19, :lo12:.LANCHOR53
@@ -10413,7 +10427,7 @@ Ftl_get_new_temp_ppa:
 	mov	w0, 0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1431:
+.L1438:
 	add	x0, x19, :lo12:.LANCHOR53
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -10439,20 +10453,20 @@ FtlSysBlkInit:
 	ldrh	w1, [x0, #:lo12:.LANCHOR79]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1434
-.L1436:
+	bne	.L1441
+.L1443:
 	mov	w23, -1
-.L1433:
+.L1440:
 	mov	w0, w23
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1434:
+.L1441:
 	bl	FtlLoadSysInfo
 	mov	w23, w0
-	cbnz	w0, .L1436
+	cbnz	w0, .L1443
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -10468,12 +10482,12 @@ FtlSysBlkInit:
 	adrp	x0, .LANCHOR55
 	ldr	x0, [x0, #:lo12:.LANCHOR55]
 	add	x0, x0, 4
-.L1437:
+.L1444:
 	cmp	w1, w3
-	bge	.L1442
+	bge	.L1449
 	ldr	w2, [x0], 16
-	tbz	w2, #31, .L1438
-.L1442:
+	tbz	w2, #31, .L1445
+.L1449:
 	adrp	x0, .LANCHOR39
 	add	x4, x0, :lo12:.LANCHOR39
 	cmp	w1, w3
@@ -10482,8 +10496,8 @@ FtlSysBlkInit:
 	ldrh	w2, [x4, 28]
 	add	w2, w2, 1
 	strh	w2, [x4, 28]
-	bge	.L1447
-.L1439:
+	bge	.L1454
+.L1446:
 	add	x21, x22, :lo12:.LANCHOR51
 	adrp	x24, .LANCHOR52
 	mov	x0, x21
@@ -10521,26 +10535,26 @@ FtlSysBlkInit:
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
 	bl	FtlVpcTblFlush
-	b	.L1443
-.L1438:
+	b	.L1450
+.L1445:
 	add	w1, w1, 1
-	b	.L1437
-.L1447:
+	b	.L1444
+.L1454:
 	ldrh	w0, [x20, #:lo12:.LANCHOR167]
-	cbnz	w0, .L1439
-.L1443:
+	cbnz	w0, .L1446
+.L1450:
 	bl	FtlVpcCheckAndModify
 	add	x20, x22, :lo12:.LANCHOR51
 	ldrh	w0, [x22, #:lo12:.LANCHOR51]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L1433
+	beq	.L1440
 	ldrh	w1, [x20, 4]
-	cbnz	w1, .L1433
+	cbnz	w1, .L1440
 	adrp	x21, .LANCHOR52
 	add	x19, x21, :lo12:.LANCHOR52
 	ldrh	w1, [x19, 4]
-	cbnz	w1, .L1433
+	cbnz	w1, .L1440
 	bl	FtlGcRefreshBlock
 	ldrh	w0, [x21, #:lo12:.LANCHOR52]
 	bl	FtlGcRefreshBlock
@@ -10549,7 +10563,7 @@ FtlSysBlkInit:
 	bl	allocate_new_data_superblock
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-	b	.L1433
+	b	.L1440
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.section	.text.rk_ftl_garbage_collect,"ax",@progbits
 	.align	2
@@ -10566,24 +10580,24 @@ rk_ftl_garbage_collect:
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	str	x1, [x29, 144]
-	cbnz	w2, .L1522
+	cbnz	w2, .L1529
 	adrp	x1, .LANCHOR45
 	ldrh	w1, [x1, #:lo12:.LANCHOR45]
 	cmp	w1, 47
-	bls	.L1522
+	bls	.L1529
 	str	w0, [x29, 152]
 	adrp	x0, .LANCHOR162
 	ldrh	w1, [x0, #:lo12:.LANCHOR162]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1451
-.L1454:
+	bne	.L1458
+.L1461:
 	adrp	x0, .LANCHOR100
 	mov	w3, 65535
 	ldrh	w2, [x0, #:lo12:.LANCHOR100]
 	cmp	w2, w3
-	bne	.L1452
-.L1453:
+	bne	.L1459
+.L1460:
 	bl	FtlReadRefresh
 	adrp	x19, .LANCHOR80
 	adrp	x2, .LANCHOR84
@@ -10595,15 +10609,15 @@ rk_ftl_garbage_collect:
 	ldrh	w1, [x19, #:lo12:.LANCHOR80]
 	str	w0, [x2, #:lo12:.LANCHOR84]
 	cmp	w1, w21
-	bne	.L1455
+	bne	.L1462
 	adrp	x3, .LANCHOR53
 	ldrh	w21, [x3, #:lo12:.LANCHOR53]
 	cmp	w21, w1
-	bne	.L1525
+	bne	.L1532
 	adrp	x1, .LANCHOR99
 	ldrh	w20, [x1, #:lo12:.LANCHOR99]
 	cmp	w20, w21
-	bne	.L1455
+	bne	.L1462
 	adrp	x22, .LANCHOR48
 	mov	w3, 1024
 	ldrh	w1, [x22, #:lo12:.LANCHOR48]
@@ -10611,89 +10625,89 @@ rk_ftl_garbage_collect:
 	mov	w1, 5120
 	csel	w1, w1, w3, cc
 	cmp	w0, w1
-	bls	.L1528
+	bls	.L1535
 	adrp	x0, .LANCHOR177
 	str	wzr, [x2, #:lo12:.LANCHOR84]
 	strh	wzr, [x0, #:lo12:.LANCHOR177]
 	bl	GetSwlReplaceBlock
 	and	w21, w0, 65535
 	cmp	w21, w20
-	bne	.L1529
+	bne	.L1536
 	adrp	x5, .LANCHOR83
 	ldrh	w1, [x22, #:lo12:.LANCHOR48]
 	ldrh	w0, [x5, #:lo12:.LANCHOR83]
 	cmp	w1, w0
-	bcs	.L1458
+	bcs	.L1465
 	mov	w0, 64
 	bl	List_get_gc_head_node
 	and	w0, w0, 65535
 	cmp	w0, w21
-	beq	.L1460
+	beq	.L1467
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x0, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x0]
 	cmp	w0, 7
-	bhi	.L1461
+	bhi	.L1468
 	mov	w0, 0
 	bl	List_get_gc_head_node
 	and	w20, w0, 65535
 	mov	w0, 128
 	strh	w0, [x5, #:lo12:.LANCHOR83]
 	cmp	w20, w21
-	bne	.L1457
-.L1460:
+	bne	.L1464
+.L1467:
 	bl	FtlGcReFreshBadBlk
-.L1455:
+.L1462:
 	ldr	w1, [x29, 152]
 	mov	w0, 65535
 	cmp	w1, 0
 	ccmp	w21, w0, 0, eq
-	bne	.L1463
+	bne	.L1470
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 24
-	bhi	.L1530
+	bhi	.L1537
 	adrp	x1, .LANCHOR19
 	cmp	w0, 16
 	ldrh	w20, [x1, #:lo12:.LANCHOR19]
-	bls	.L1465
+	bls	.L1472
 	lsr	w20, w20, 5
-.L1464:
+.L1471:
 	adrp	x2, .LANCHOR82
 	mov	x3, x2
 	ldrh	w1, [x2, #:lo12:.LANCHOR82]
 	cmp	w1, w0
-	bcs	.L1468
+	bcs	.L1475
 	adrp	x0, .LANCHOR53
 	mov	w1, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w1
-	bne	.L1469
+	bne	.L1476
 	adrp	x1, .LANCHOR99
 	ldrh	w1, [x1, #:lo12:.LANCHOR99]
 	cmp	w1, w0
-	bne	.L1469
+	bne	.L1476
 	adrp	x0, .LANCHOR177
 	ldrh	w0, [x0, #:lo12:.LANCHOR177]
-	cbnz	w0, .L1470
+	cbnz	w0, .L1477
 	adrp	x1, .LANCHOR61
 	adrp	x4, .LANCHOR59
 	ldr	w1, [x1, #:lo12:.LANCHOR61]
 	ldr	w4, [x4, #:lo12:.LANCHOR59]
 	add	w1, w1, w1, lsl 1
 	cmp	w4, w1, lsr 2
-	bcs	.L1471
-.L1470:
+	bcs	.L1478
+.L1477:
 	adrp	x1, .LANCHOR78
 	ldrh	w1, [x1, #:lo12:.LANCHOR78]
 	add	w1, w1, w1, lsl 1
 	asr	w1, w1, 2
 	strh	w1, [x3, #:lo12:.LANCHOR82]
-.L1472:
+.L1479:
 	adrp	x1, .LANCHOR87
 	str	wzr, [x1, #:lo12:.LANCHOR87]
-.L1449:
+.L1456:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -10701,36 +10715,36 @@ rk_ftl_garbage_collect:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1451:
+.L1458:
 	adrp	x1, .LANCHOR53
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	beq	.L1454
+	beq	.L1461
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
-	cbz	w0, .L1454
+	cbz	w0, .L1461
 	mov	w0, 1
-	b	.L1449
-.L1452:
+	b	.L1456
+.L1459:
 	adrp	x1, .LANCHOR99
 	ldrh	w4, [x1, #:lo12:.LANCHOR99]
 	cmp	w4, w3
-	bne	.L1453
+	bne	.L1460
 	strh	w2, [x1, #:lo12:.LANCHOR99]
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR100]
-	b	.L1453
-.L1461:
+	b	.L1460
+.L1468:
 	mov	w0, 64
-.L1557:
+.L1564:
 	strh	w0, [x5, #:lo12:.LANCHOR83]
-	b	.L1460
-.L1458:
+	b	.L1467
+.L1465:
 	mov	w0, 80
-	b	.L1557
-.L1529:
+	b	.L1564
+.L1536:
 	mov	w20, w21
-.L1457:
+.L1464:
 	adrp	x1, .LANCHOR43
 	ubfiz	x0, x20, 1, 32
 	adrp	x3, .LANCHOR82
@@ -10746,69 +10760,69 @@ rk_ftl_garbage_collect:
 	adrp	x0, .LC112
 	add	x0, x0, :lo12:.LC112
 	bl	printf
-	b	.L1460
-.L1525:
+	b	.L1467
+.L1532:
 	mov	w21, w1
-	b	.L1455
-.L1528:
+	b	.L1462
+.L1535:
 	mov	w21, w20
-	b	.L1455
-.L1465:
+	b	.L1462
+.L1472:
 	cmp	w0, 12
-	bls	.L1466
+	bls	.L1473
 	lsr	w20, w20, 4
-	b	.L1464
-.L1466:
+	b	.L1471
+.L1473:
 	cmp	w0, 8
-	bls	.L1464
+	bls	.L1471
 	lsr	w20, w20, 2
-	b	.L1464
-.L1530:
+	b	.L1471
+.L1537:
 	mov	w20, 1
-	b	.L1464
-.L1471:
+	b	.L1471
+.L1478:
 	mov	w1, 18
 	strh	w1, [x2, #:lo12:.LANCHOR82]
-	b	.L1472
-.L1469:
+	b	.L1479
+.L1476:
 	adrp	x0, .LANCHOR78
 	ldrh	w0, [x0, #:lo12:.LANCHOR78]
 	add	w0, w0, w0, lsl 1
 	asr	w0, w0, 2
 	strh	w0, [x3, #:lo12:.LANCHOR82]
-.L1468:
+.L1475:
 	adrp	x0, .LANCHOR101
 	ldrh	w0, [x0, #:lo12:.LANCHOR101]
-	cbz	w0, .L1531
+	cbz	w0, .L1538
 	add	w20, w20, 32
 	and	w20, w20, 65535
-.L1531:
+.L1538:
 	mov	w21, 65535
-.L1474:
+.L1481:
 	ldrh	w0, [x19, #:lo12:.LANCHOR80]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L1483
+	bne	.L1490
 	cmp	w21, w0
-	beq	.L1484
+	beq	.L1491
 	strh	w21, [x19, #:lo12:.LANCHOR80]
-.L1485:
+.L1492:
 	add	x0, x19, :lo12:.LANCHOR80
 	mov	w1, 65535
 	strb	wzr, [x0, 8]
 	ldrh	w0, [x19, #:lo12:.LANCHOR80]
 	cmp	w0, w1
-	beq	.L1483
+	beq	.L1490
 	bl	IsBlkInGcList
-	cbz	w0, .L1488
+	cbz	w0, .L1495
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR80]
-.L1488:
+.L1495:
 	ldrh	w1, [x19, #:lo12:.LANCHOR80]
 	mov	w0, 65535
 	add	x22, x19, :lo12:.LANCHOR80
 	cmp	w1, w0
-	beq	.L1483
+	beq	.L1490
 	mov	x0, x22
 	bl	make_superblock
 	adrp	x0, .LANCHOR178
@@ -10821,33 +10835,33 @@ rk_ftl_garbage_collect:
 	ldrh	w1, [x0, x1, lsl 1]
 	adrp	x0, .LANCHOR179
 	strh	w1, [x0, #:lo12:.LANCHOR179]
-.L1483:
+.L1490:
 	adrp	x1, .LANCHOR51
 	ldrh	w0, [x19, #:lo12:.LANCHOR80]
 	str	x1, [x29, 120]
 	ldrh	w2, [x1, #:lo12:.LANCHOR51]
 	cmp	w2, w0
-	beq	.L1489
+	beq	.L1496
 	adrp	x1, .LANCHOR52
 	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bne	.L1490
-.L1489:
+	bne	.L1497
+.L1496:
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR80]
-.L1490:
+.L1497:
 	adrp	x25, .LANCHOR85
 	add	x26, x25, :lo12:.LANCHOR85
-.L1519:
+.L1526:
 	ldrh	w1, [x19, #:lo12:.LANCHOR80]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1491
+	bne	.L1498
 	adrp	x0, .LANCHOR87
 	adrp	x22, .LANCHOR19
 	add	x22, x22, :lo12:.LANCHOR19
 	str	wzr, [x0, #:lo12:.LANCHOR87]
-.L1492:
+.L1499:
 	ldrh	w5, [x25, #:lo12:.LANCHOR85]
 	add	x7, x25, :lo12:.LANCHOR85
 	mov	w0, w5
@@ -10856,28 +10870,28 @@ rk_ftl_garbage_collect:
 	strh	w6, [x19, #:lo12:.LANCHOR80]
 	mov	w0, 65535
 	cmp	w6, w0
-	bne	.L1493
+	bne	.L1500
 	strh	wzr, [x7]
 	mov	w0, 8
-	b	.L1449
-.L1463:
+	b	.L1456
+.L1470:
 	adrp	x1, .LANCHOR53
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L1534
+	bne	.L1541
 	adrp	x0, .LANCHOR99
 	ldrh	w0, [x0, #:lo12:.LANCHOR99]
 	cmp	w0, w1
-	bne	.L1534
+	bne	.L1541
 	cmp	w21, w0
-	bne	.L1534
+	bne	.L1541
 	ldrh	w0, [x19, #:lo12:.LANCHOR80]
 	cmp	w0, w21
-	beq	.L1475
-.L1534:
+	beq	.L1482
+.L1541:
 	mov	w20, 1
-	b	.L1474
-.L1475:
+	b	.L1481
+.L1482:
 	adrp	x0, .LANCHOR87
 	adrp	x22, .LANCHOR48
 	adrp	x20, .LANCHOR82
@@ -10886,22 +10900,22 @@ rk_ftl_garbage_collect:
 	ldrh	w1, [x22, #:lo12:.LANCHOR48]
 	ldrh	w0, [x20, #:lo12:.LANCHOR82]
 	cmp	w1, w0
-	bls	.L1476
+	bls	.L1483
 	ldrh	w0, [x23, #:lo12:.LANCHOR177]
-	cbnz	w0, .L1477
+	cbnz	w0, .L1484
 	adrp	x0, .LANCHOR61
 	adrp	x1, .LANCHOR59
 	ldr	w0, [x0, #:lo12:.LANCHOR61]
 	ldr	w1, [x1, #:lo12:.LANCHOR59]
 	add	w0, w0, w0, lsl 1
 	cmp	w1, w0, lsr 2
-	bcs	.L1478
-.L1477:
+	bcs	.L1485
+.L1484:
 	adrp	x0, .LANCHOR78
 	ldrh	w0, [x0, #:lo12:.LANCHOR78]
 	add	w0, w0, w0, lsl 1
 	asr	w0, w0, 2
-.L1558:
+.L1565:
 	strh	w0, [x20, #:lo12:.LANCHOR82]
 	bl	FtlReadRefresh
 	mov	w0, 0
@@ -10911,16 +10925,16 @@ rk_ftl_garbage_collect:
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x0]
 	cmp	w0, 4
-	bls	.L1476
-.L1559:
+	bls	.L1483
+.L1566:
 	ldrh	w0, [x23, #:lo12:.LANCHOR177]
-	b	.L1449
-.L1478:
+	b	.L1456
+.L1485:
 	mov	w0, 18
-	b	.L1558
-.L1476:
+	b	.L1565
+.L1483:
 	ldrh	w0, [x23, #:lo12:.LANCHOR177]
-	cbnz	w0, .L1534
+	cbnz	w0, .L1541
 	adrp	x0, .LANCHOR78
 	ldrh	w5, [x0, #:lo12:.LANCHOR78]
 	add	w0, w5, w5, lsl 1
@@ -10938,46 +10952,46 @@ rk_ftl_garbage_collect:
 	ldrh	w0, [x0, #:lo12:.LANCHOR20]
 	mul	w0, w0, w2
 	cmp	w1, w0, asr 1
-	ble	.L1481
+	ble	.L1488
 	ldrh	w0, [x22, #:lo12:.LANCHOR48]
 	sub	w5, w5, #1
 	cmp	w0, w5
-	blt	.L1481
+	blt	.L1488
 	bl	FtlReadRefresh
-	b	.L1559
-.L1481:
-	cbnz	w1, .L1534
+	b	.L1566
+.L1488:
+	cbnz	w1, .L1541
 	mov	w0, -1
 	bl	decrement_vpc_count
 	ldrh	w0, [x22, #:lo12:.LANCHOR48]
 	add	w0, w0, 1
-	b	.L1449
-.L1484:
+	b	.L1456
+.L1491:
 	adrp	x0, .LANCHOR99
 	ldrh	w1, [x0, #:lo12:.LANCHOR99]
 	cmp	w1, w21
-	beq	.L1485
+	beq	.L1492
 	adrp	x2, .LANCHOR42
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR42]
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L1486
+	cbnz	w1, .L1493
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR99]
-.L1486:
+.L1493:
 	ldrh	w1, [x0, #:lo12:.LANCHOR99]
 	strh	w1, [x19, #:lo12:.LANCHOR80]
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR99]
-	b	.L1485
-.L1493:
+	b	.L1492
+.L1500:
 	mov	w0, w6
 	bl	IsBlkInGcList
 	add	w5, w5, 1
-	cbz	w0, .L1494
+	cbz	w0, .L1501
 	strh	w5, [x25, #:lo12:.LANCHOR85]
-	b	.L1492
-.L1494:
+	b	.L1499
+.L1501:
 	adrp	x23, .LANCHOR42
 	adrp	x4, .LANCHOR3
 	ldrh	w0, [x22]
@@ -10989,80 +11003,80 @@ rk_ftl_garbage_collect:
 	ldrh	w3, [x2, x1]
 	mul	w0, w0, w4
 	cmp	w3, w0, asr 1
-	bgt	.L1496
+	bgt	.L1503
 	cmp	w5, 48
-	bls	.L1497
+	bls	.L1504
 	cmp	w3, 8
-	bls	.L1497
+	bls	.L1504
 	adrp	x3, .LANCHOR95
 	ldrh	w3, [x3, #:lo12:.LANCHOR95]
 	cmp	w3, 35
-	bhi	.L1497
-.L1496:
+	bhi	.L1504
+.L1503:
 	strh	wzr, [x26]
-.L1497:
+.L1504:
 	ldrh	w1, [x2, x1]
 	cmp	w0, w1
-	bgt	.L1498
+	bgt	.L1505
 	mov	w0, 65535
 	cmp	w21, w0
-	bne	.L1498
+	bne	.L1505
 	ldrh	w0, [x26]
 	cmp	w0, 3
-	bhi	.L1498
+	bhi	.L1505
 	mov	w0, -1
 	strh	wzr, [x26]
 	strh	w0, [x19, #:lo12:.LANCHOR80]
-.L1560:
+.L1567:
 	adrp	x0, .LANCHOR177
 	ldrh	w0, [x0, #:lo12:.LANCHOR177]
-	b	.L1449
-.L1498:
-	cbnz	w1, .L1499
+	b	.L1456
+.L1505:
+	cbnz	w1, .L1506
 	mov	w0, -1
 	bl	decrement_vpc_count
 	ldrh	w0, [x26]
 	add	w0, w0, 1
 	strh	w0, [x26]
-	b	.L1492
-.L1499:
+	b	.L1499
+.L1506:
 	add	x0, x19, :lo12:.LANCHOR80
 	strb	wzr, [x0, 8]
 	ldr	x0, [x29, 120]
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w6
-	bne	.L1500
+	bne	.L1507
 	adrp	x1, .LANCHOR180
 	adrp	x0, .LC1
 	mov	w2, 700
 	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1500:
+.L1507:
 	adrp	x0, .LANCHOR52
 	ldrh	w1, [x19, #:lo12:.LANCHOR80]
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bne	.L1501
+	bne	.L1508
 	adrp	x1, .LANCHOR180
 	adrp	x0, .LC1
 	mov	w2, 701
 	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1501:
+.L1508:
 	adrp	x0, .LANCHOR53
 	ldrh	w1, [x19, #:lo12:.LANCHOR80]
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L1502
+	bne	.L1509
 	adrp	x1, .LANCHOR180
 	adrp	x0, .LC1
 	mov	w2, 702
 	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1502:
+.L1509:
 	add	x22, x19, :lo12:.LANCHOR80
 	mov	x0, x22
 	bl	make_superblock
@@ -11075,7 +11089,7 @@ rk_ftl_garbage_collect:
 	strh	wzr, [x22, 2]
 	strh	w1, [x0, #:lo12:.LANCHOR179]
 	strb	wzr, [x22, 6]
-.L1491:
+.L1498:
 	ldr	x1, [x29, 144]
 	mov	w0, 1
 	str	w0, [x1, #:lo12:.LANCHOR108]
@@ -11084,7 +11098,7 @@ rk_ftl_garbage_collect:
 	ldrh	w1, [x0, #:lo12:.LANCHOR19]
 	ldr	w0, [x29, 152]
 	str	w1, [x29, 156]
-	cbz	w0, .L1503
+	cbz	w0, .L1510
 	adrp	x0, .LANCHOR3
 	ldrh	w2, [x19, #:lo12:.LANCHOR80]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
@@ -11097,23 +11111,23 @@ rk_ftl_garbage_collect:
 	sdiv	w0, w0, w1
 	add	w20, w20, w0
 	and	w20, w20, 65535
-.L1503:
+.L1510:
 	add	x0, x19, :lo12:.LANCHOR80
 	ldr	w2, [x29, 156]
 	ldrh	w0, [x0, 2]
 	add	w1, w0, w20
 	cmp	w1, w2
-	ble	.L1504
+	ble	.L1511
 	sub	w20, w2, w0
 	and	w20, w20, 65535
-.L1504:
+.L1511:
 	adrp	x0, .LANCHOR178
 	mov	w28, 0
 	add	x0, x0, :lo12:.LANCHOR178
 	str	x0, [x29, 136]
-.L1505:
+.L1512:
 	cmp	w20, w28, uxth
-	bls	.L1513
+	bls	.L1520
 	add	x1, x19, :lo12:.LANCHOR80
 	adrp	x0, .LANCHOR3
 	adrp	x23, .LANCHOR93
@@ -11125,24 +11139,24 @@ rk_ftl_garbage_collect:
 	ldr	x0, [x23, #:lo12:.LANCHOR93]
 	mov	w6, 65535
 	add	w4, w4, w28
-	b	.L1514
-.L1507:
+	b	.L1521
+.L1514:
 	ldrh	w3, [x1]
 	cmp	w3, w6
-	beq	.L1506
+	beq	.L1513
 	ubfiz	x5, x22, 5, 16
 	add	w22, w22, 1
 	add	x5, x0, x5
 	and	w22, w22, 65535
 	orr	w3, w4, w3, lsl 10
 	str	w3, [x5, 4]
-.L1506:
+.L1513:
 	add	w2, w2, 1
 	add	x1, x1, 2
 	and	w2, w2, 65535
-.L1514:
+.L1521:
 	cmp	w2, w7
-	bne	.L1507
+	bne	.L1514
 	add	x1, x19, :lo12:.LANCHOR80
 	adrp	x24, .LANCHOR89
 	add	x24, x24, :lo12:.LANCHOR89
@@ -11152,26 +11166,26 @@ rk_ftl_garbage_collect:
 	ubfiz	x0, x22, 5, 16
 	mov	x22, 0
 	str	x0, [x29, 128]
-.L1508:
+.L1515:
 	ldr	x0, [x29, 128]
 	cmp	x0, x22
-	bne	.L1512
+	bne	.L1519
 	add	w28, w28, 1
-	b	.L1505
-.L1512:
+	b	.L1512
+.L1519:
 	ldr	x0, [x23, #:lo12:.LANCHOR93]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	beq	.L1509
+	beq	.L1516
 	ldr	x27, [x1, 16]
 	mov	w0, 61589
 	ldrh	w1, [x27]
 	cmp	w1, w0
-	bne	.L1509
+	bne	.L1516
 	ldr	w4, [x27, 8]
 	cmn	w4, #1
-	bne	.L1510
+	bne	.L1517
 	str	w4, [x29, 104]
 	mov	w2, 736
 	adrp	x1, .LANCHOR180
@@ -11180,7 +11194,7 @@ rk_ftl_garbage_collect:
 	add	x0, x0, :lo12:.LC1
 	bl	printf
 	ldr	w4, [x29, 104]
-.L1510:
+.L1517:
 	mov	w2, 0
 	add	x1, x29, 172
 	mov	w0, w4
@@ -11190,7 +11204,7 @@ rk_ftl_garbage_collect:
 	add	x0, x0, x22
 	ldr	w2, [x0, 4]
 	cmp	w2, w1
-	bne	.L1509
+	bne	.L1516
 	ldr	x1, [x29, 136]
 	adrp	x4, .LANCHOR113
 	ldr	x2, [x29, 136]
@@ -11232,20 +11246,20 @@ rk_ftl_garbage_collect:
 	ldrb	w1, [x11, 7]
 	ldr	w0, [x24]
 	cmp	w1, w0
-	beq	.L1511
+	beq	.L1518
 	ldrh	w0, [x11, 4]
-	cbnz	w0, .L1509
-.L1511:
+	cbnz	w0, .L1516
+.L1518:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	w0, .L1509
-.L1561:
+	cbz	w0, .L1516
+.L1568:
 	ldr	x0, [x29, 144]
 	str	wzr, [x0, #:lo12:.LANCHOR108]
-	b	.L1560
-.L1509:
+	b	.L1567
+.L1516:
 	add	x22, x22, 32
-	b	.L1508
-.L1513:
+	b	.L1515
+.L1520:
 	add	x1, x19, :lo12:.LANCHOR80
 	ldrh	w0, [x1, 2]
 	add	w20, w20, w0
@@ -11253,49 +11267,49 @@ rk_ftl_garbage_collect:
 	and	w20, w20, 65535
 	strh	w20, [x1, 2]
 	cmp	w0, w20
-	bhi	.L1515
+	bhi	.L1522
 	adrp	x0, .LANCHOR89
 	ldr	w0, [x0, #:lo12:.LANCHOR89]
-	cbz	w0, .L1516
+	cbz	w0, .L1523
 	bl	Ftl_gc_temp_data_write_back
-	cbnz	w0, .L1561
-.L1516:
+	cbnz	w0, .L1568
+.L1523:
 	adrp	x0, .LANCHOR178
 	ldrh	w0, [x0, #:lo12:.LANCHOR178]
-	cbnz	w0, .L1517
+	cbnz	w0, .L1524
 	ldrh	w0, [x19, #:lo12:.LANCHOR80]
 	adrp	x1, .LANCHOR42
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	lsl	x0, x0, 1
 	ldrh	w2, [x1, x0]
-	cbz	w2, .L1517
+	cbz	w2, .L1524
 	strh	wzr, [x1, x0]
 	ldrh	w0, [x19, #:lo12:.LANCHOR80]
 	bl	update_vpc_list
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1517:
+.L1524:
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR80]
-.L1515:
+.L1522:
 	ldr	x0, [x29, 144]
 	str	wzr, [x0, #:lo12:.LANCHOR108]
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 2
-	bhi	.L1518
+	bhi	.L1525
 	ldr	x0, [x29, 112]
 	ldrh	w20, [x0, #:lo12:.LANCHOR19]
-	b	.L1519
-.L1518:
+	b	.L1526
+.L1525:
 	adrp	x1, .LANCHOR177
 	ldrh	w1, [x1, #:lo12:.LANCHOR177]
 	cmp	w1, 0
 	csinc	w0, w1, w0, ne
-	b	.L1449
-.L1522:
+	b	.L1456
+.L1529:
 	mov	w0, 0
-	b	.L1449
+	b	.L1456
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
 	.section	.text.sftl_init,"ax",@progbits
 	.align	2
@@ -11322,23 +11336,23 @@ sftl_init:
 	ldrh	w0, [x0, #:lo12:.LANCHOR4]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbnz	w0, .L1566
+	cbnz	w0, .L1573
 	bl	FtlSysBlkInit
-	cbnz	w0, .L1566
+	cbnz	w0, .L1573
 	mov	w0, 1
 	str	w0, [x19, #:lo12:.LANCHOR86]
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 15
-	bhi	.L1566
+	bhi	.L1573
 	mov	w19, 8129
-.L1565:
+.L1572:
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
 	subs	w19, w19, #1
-	bne	.L1565
-.L1566:
+	bne	.L1572
+.L1573:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -11370,13 +11384,13 @@ FtlRead:
 	mov	w26, w2
 	stp	x21, x22, [sp, 32]
 	stp	x27, x28, [sp, 80]
-	bne	.L1571
+	bne	.L1578
 	mov	x2, x3
 	mov	w1, w26
 	add	w0, w19, 256
 	bl	FtlVendorPartRead
 	mov	w21, w0
-.L1570:
+.L1577:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11385,18 +11399,18 @@ FtlRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1571:
+.L1578:
 	add	w0, w1, w2
 	str	w0, [x29, 136]
 	adrp	x0, .LANCHOR34
 	add	w1, w1, w2
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	cmp	w1, w0
-	bhi	.L1592
+	bhi	.L1599
 	adrp	x0, .LANCHOR86
 	ldr	w21, [x0, #:lo12:.LANCHOR86]
 	cmn	w21, #1
-	beq	.L1570
+	beq	.L1577
 	adrp	x22, .LANCHOR12
 	adrp	x25, .LANCHOR81
 	add	x25, x25, :lo12:.LANCHOR81
@@ -11424,47 +11438,47 @@ FtlRead:
 	ldr	w0, [x1, #:lo12:.LANCHOR62]
 	add	w0, w0, w2
 	str	w0, [x1, #:lo12:.LANCHOR62]
-.L1573:
+.L1580:
 	ldr	w0, [x29, 156]
-	cbnz	w0, .L1590
+	cbnz	w0, .L1597
 	adrp	x0, .LANCHOR101
 	ldrh	w0, [x0, #:lo12:.LANCHOR101]
-	cbnz	w0, .L1591
+	cbnz	w0, .L1598
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 31
-	bhi	.L1570
-.L1591:
+	bhi	.L1577
+.L1598:
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-	b	.L1570
-.L1590:
+	b	.L1577
+.L1597:
 	add	x1, x29, 172
 	mov	w2, 0
 	mov	w0, w20
 	bl	log2phys
 	ldr	w1, [x29, 172]
 	cmn	w1, #1
-	bne	.L1574
+	bne	.L1581
 	add	x5, x22, :lo12:.LANCHOR12
 	mov	w4, 0
-.L1575:
+.L1582:
 	ldrh	w0, [x5]
 	cmp	w4, w0
-	bcc	.L1577
-.L1578:
+	bcc	.L1584
+.L1585:
 	ldr	w0, [x29, 156]
 	add	w20, w20, 1
 	subs	w0, w0, #1
 	str	w0, [x29, 156]
-	beq	.L1582
+	beq	.L1589
 	adrp	x0, .LANCHOR3
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w27, w0, lsl 2
-	bne	.L1573
-.L1582:
-	cbz	w27, .L1573
+	bne	.L1580
+.L1589:
+	cbz	w27, .L1580
 	ldr	x0, [x28, #:lo12:.LANCHOR112]
 	mov	w1, w27
 	mov	w2, 0
@@ -11483,57 +11497,57 @@ FtlRead:
 	str	x0, [x29, 104]
 	add	x0, x22, :lo12:.LANCHOR12
 	str	x0, [x29, 96]
-.L1589:
+.L1596:
 	ldr	x0, [x28, #:lo12:.LANCHOR112]
 	ldr	w2, [x29, 152]
 	add	x0, x0, x27
 	ldr	w1, [x0, 24]
 	cmp	w2, w1
-	bne	.L1584
+	bne	.L1591
 	ldr	x1, [x0, 8]
 	adrp	x0, .LANCHOR118
 	ldr	x0, [x0, #:lo12:.LANCHOR118]
 	cmp	x1, x0
-	bne	.L1585
+	bne	.L1592
 	ldr	x0, [x29, 128]
 	ldr	w2, [x29, 120]
 	add	x1, x1, x0
 	mov	x0, x23
-.L1603:
+.L1610:
 	bl	ftl_memcpy
-.L1585:
+.L1592:
 	ldr	x0, [x28, #:lo12:.LANCHOR112]
 	add	x0, x0, x27
 	ldr	x1, [x0, 16]
 	ldr	w2, [x0, 24]
 	ldr	w1, [x1, 8]
 	cmp	w2, w1
-	beq	.L1586
+	beq	.L1593
 	ldr	w1, [x25, 72]
 	add	w1, w1, 1
 	str	w1, [x25, 72]
-.L1586:
+.L1593:
 	ldr	w1, [x0]
 	cmn	w1, #1
-	bne	.L1587
+	bne	.L1594
 	ldr	w0, [x25, 72]
 	mov	w21, w1
 	add	w0, w0, 1
 	str	w0, [x25, 72]
-.L1588:
+.L1595:
 	ldr	x0, [x29, 104]
 	add	x27, x27, 32
 	cmp	x0, x27
-	bne	.L1589
+	bne	.L1596
 	mov	w27, 0
-	b	.L1573
-.L1577:
+	b	.L1580
+.L1584:
 	madd	w0, w20, w0, w4
 	cmp	w19, w0
-	bhi	.L1576
+	bhi	.L1583
 	ldr	w1, [x29, 136]
 	cmp	w1, w0
-	bls	.L1576
+	bls	.L1583
 	sub	w0, w0, w19
 	str	x5, [x29, 120]
 	lsl	w0, w0, 9
@@ -11544,17 +11558,17 @@ FtlRead:
 	bl	ftl_memset
 	ldr	w4, [x29, 128]
 	ldr	x5, [x29, 120]
-.L1576:
+.L1583:
 	add	w4, w4, 1
-	b	.L1575
-.L1574:
+	b	.L1582
+.L1581:
 	ldr	x2, [x28, #:lo12:.LANCHOR112]
 	ubfiz	x0, x27, 5, 32
 	add	x0, x2, x0
 	str	w1, [x0, 4]
 	ldr	w1, [x29, 152]
 	cmp	w20, w1
-	bne	.L1579
+	bne	.L1586
 	adrp	x1, .LANCHOR118
 	ldr	x1, [x1, #:lo12:.LANCHOR118]
 	str	x1, [x0, 8]
@@ -11567,9 +11581,9 @@ FtlRead:
 	csel	w2, w26, w2, ls
 	str	w2, [x29, 144]
 	cmp	w1, w2
-	bne	.L1580
+	bne	.L1587
 	str	x23, [x0, 8]
-.L1580:
+.L1587:
 	adrp	x1, .LANCHOR24
 	adrp	x2, .LANCHOR124
 	str	w20, [x0, 24]
@@ -11580,10 +11594,10 @@ FtlRead:
 	and	x1, x1, 4294967292
 	add	x1, x2, x1
 	str	x1, [x0, 16]
-	b	.L1578
-.L1579:
+	b	.L1585
+.L1586:
 	cmp	w20, w24
-	bne	.L1581
+	bne	.L1588
 	ldrh	w2, [x22, #:lo12:.LANCHOR12]
 	adrp	x1, .LANCHOR119
 	ldr	w3, [x29, 136]
@@ -11593,25 +11607,25 @@ FtlRead:
 	sub	w3, w3, w1
 	str	w3, [x29, 140]
 	cmp	w2, w3
-	bne	.L1580
-.L1602:
+	bne	.L1587
+.L1609:
 	sub	w1, w1, w19
 	lsl	w1, w1, 9
 	add	x1, x23, x1
 	str	x1, [x0, 8]
-	b	.L1580
-.L1581:
+	b	.L1587
+.L1588:
 	ldrh	w1, [x22, #:lo12:.LANCHOR12]
 	mul	w1, w1, w20
-	b	.L1602
-.L1584:
+	b	.L1609
+.L1591:
 	cmp	w24, w1
-	bne	.L1585
+	bne	.L1592
 	ldr	x1, [x0, 8]
 	adrp	x0, .LANCHOR119
 	ldr	x0, [x0, #:lo12:.LANCHOR119]
 	cmp	x1, x0
-	bne	.L1585
+	bne	.L1592
 	ldr	x0, [x29, 96]
 	ldr	w2, [x29, 116]
 	ldrh	w0, [x0]
@@ -11619,18 +11633,18 @@ FtlRead:
 	sub	w0, w0, w19
 	lsl	w0, w0, 9
 	add	x0, x23, x0
-	b	.L1603
-.L1587:
+	b	.L1610
+.L1594:
 	cmp	w1, 256
-	bne	.L1588
+	bne	.L1595
 	ldr	w0, [x0, 4]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-	b	.L1588
-.L1592:
+	b	.L1595
+.L1599:
 	mov	w21, -1
-	b	.L1570
+	b	.L1577
 	.size	FtlRead, .-FtlRead
 	.section	.text.sftl_read,"ax",@progbits
 	.align	2
@@ -11660,12 +11674,12 @@ FtlWrite:
 	stp	x23, x24, [sp, 48]
 	stp	x27, x28, [sp, 80]
 	str	w2, [x29, 180]
-	bne	.L1606
+	bne	.L1613
 	add	w0, w1, 256
 	ldr	w1, [x29, 180]
 	mov	x2, x3
 	bl	FtlVendorPartWrite
-.L1605:
+.L1612:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -11673,7 +11687,7 @@ FtlWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 240
 	ret
-.L1606:
+.L1613:
 	ldr	w0, [x29, 180]
 	add	w0, w1, w0
 	str	w0, [x29, 168]
@@ -11681,11 +11695,11 @@ FtlWrite:
 	ldr	w1, [x29, 168]
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	cmp	w1, w0
-	bhi	.L1642
+	bhi	.L1649
 	adrp	x0, .LANCHOR86
 	ldr	w0, [x0, #:lo12:.LANCHOR86]
 	cmn	w0, #1
-	beq	.L1605
+	beq	.L1612
 	adrp	x0, .LANCHOR181
 	mov	w1, 2048
 	adrp	x22, .LANCHOR12
@@ -11713,18 +11727,18 @@ FtlWrite:
 	ldr	w1, [x0, #:lo12:.LANCHOR182]
 	adrp	x0, .LANCHOR51
 	add	x19, x0, :lo12:.LANCHOR51
-	cbz	w1, .L1608
+	cbz	w1, .L1615
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1608
+	cbnz	w0, .L1615
 	adrp	x19, .LANCHOR52
 	add	x19, x19, :lo12:.LANCHOR52
-.L1608:
+.L1615:
 	mov	w20, w25
 	adrp	x0, .LANCHOR52
 	add	x0, x0, :lo12:.LANCHOR52
 	str	x0, [x29, 96]
-.L1609:
-	cbnz	w24, .L1637
+.L1616:
+	cbnz	w24, .L1644
 	ldr	w1, [x29, 152]
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
@@ -11732,38 +11746,38 @@ FtlWrite:
 	mov	x22, x0
 	ldrh	w1, [x0, #:lo12:.LANCHOR48]
 	cmp	w1, 5
-	bls	.L1638
-.L1640:
+	bls	.L1645
+.L1647:
 	mov	w0, 0
-	b	.L1605
-.L1637:
+	b	.L1612
+.L1644:
 	adrp	x0, .LANCHOR3
 	ldrb	w2, [x19, 6]
 	str	x0, [x29, 120]
 	ldrh	w1, [x0, #:lo12:.LANCHOR3]
 	cmp	w2, w1
-	bcc	.L1610
+	bcc	.L1617
 	adrp	x1, .LANCHOR183
 	adrp	x0, .LC1
 	mov	w2, 1011
 	add	x1, x1, :lo12:.LANCHOR183
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1610:
+.L1617:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1611
+	cbnz	w0, .L1618
 	adrp	x0, .LANCHOR51
 	add	x0, x0, :lo12:.LANCHOR51
 	cmp	x19, x0
-	bne	.L1612
+	bne	.L1619
 	adrp	x0, .LANCHOR52
 	add	x0, x0, :lo12:.LANCHOR52
 	ldrh	w1, [x0, 4]
-	cbnz	w1, .L1613
+	cbnz	w1, .L1620
 	bl	allocate_new_data_superblock
 	ldr	x0, [x29, 160]
 	str	wzr, [x0, #:lo12:.LANCHOR182]
-.L1613:
+.L1620:
 	adrp	x0, .LANCHOR51
 	add	x19, x0, :lo12:.LANCHOR51
 	mov	x0, x19
@@ -11773,12 +11787,12 @@ FtlWrite:
 	cmp	w0, 0
 	ldr	x0, [x29, 96]
 	csel	x19, x0, x19, ne
-.L1614:
+.L1621:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1611
+	cbnz	w0, .L1618
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.L1611:
+.L1618:
 	ldrh	w0, [x19, 4]
 	ldrb	w1, [x19, 7]
 	cmp	w0, w24
@@ -11791,14 +11805,14 @@ FtlWrite:
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1615
+	bcc	.L1622
 	adrp	x1, .LANCHOR183
 	adrp	x0, .LC1
 	mov	w2, 1044
 	add	x1, x1, :lo12:.LANCHOR183
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1615:
+.L1622:
 	adrp	x0, .LANCHOR24
 	add	x0, x0, :lo12:.LANCHOR24
 	str	xzr, [x29, 184]
@@ -11806,44 +11820,44 @@ FtlWrite:
 	adrp	x0, .LANCHOR23
 	add	x0, x0, :lo12:.LANCHOR23
 	str	x0, [x29, 104]
-.L1616:
+.L1623:
 	ldr	w1, [x29, 148]
 	adrp	x27, .LANCHOR114
 	ldr	w23, [x29, 184]
 	cmp	w23, w1
-	bcc	.L1635
+	bcc	.L1642
 	mov	x23, x1
-.L1617:
+.L1624:
 	ldr	x0, [x27, #:lo12:.LANCHOR114]
 	mov	x3, x19
 	mov	w2, 0
 	mov	w1, w23
 	bl	FtlProgPages
 	cmp	w24, w23
-	bcs	.L1636
+	bcs	.L1643
 	adrp	x1, .LANCHOR183
 	adrp	x0, .LC1
 	mov	w2, 1121
 	add	x1, x1, :lo12:.LANCHOR183
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1636:
+.L1643:
 	sub	w24, w24, w23
-	b	.L1609
-.L1612:
+	b	.L1616
+.L1619:
 	ldr	x1, [x29, 160]
 	str	wzr, [x1, #:lo12:.LANCHOR182]
 	ldrh	w1, [x0, 4]
-	cbnz	w1, .L1647
+	cbnz	w1, .L1654
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-	b	.L1614
-.L1647:
+	b	.L1621
+.L1654:
 	mov	x19, x0
-	b	.L1611
-.L1635:
+	b	.L1618
+.L1642:
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1617
+	cbz	w0, .L1624
 	add	x1, x29, 204
 	mov	w2, 0
 	mov	w0, w20
@@ -11873,9 +11887,9 @@ FtlWrite:
 	ldr	w0, [x29, 156]
 	cmp	w20, w25
 	ccmp	w20, w0, 4, ne
-	bne	.L1618
+	bne	.L1625
 	cmp	w20, w25
-	bne	.L1619
+	bne	.L1626
 	ldrh	w2, [x22, #:lo12:.LANCHOR12]
 	udiv	w0, w21, w2
 	msub	w0, w0, w2, w21
@@ -11885,29 +11899,29 @@ FtlWrite:
 	cmp	w2, w0
 	csel	w0, w2, w0, ls
 	str	w0, [x29, 176]
-.L1620:
+.L1627:
 	ldrh	w0, [x22, #:lo12:.LANCHOR12]
 	ldr	w1, [x29, 176]
 	cmp	w1, w0
 	ldr	x0, [x27, #:lo12:.LANCHOR114]
-	bne	.L1621
+	bne	.L1628
 	add	x3, x0, x28
 	cmp	w20, w25
-	bne	.L1622
+	bne	.L1629
 	str	x26, [x3, 8]
-.L1623:
+.L1630:
 	ldr	x0, [x29, 120]
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1632
+	bcc	.L1639
 	adrp	x1, .LANCHOR183
 	adrp	x0, .LC1
 	mov	w2, 1112
 	add	x1, x1, :lo12:.LANCHOR183
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1632:
+.L1639:
 	ldp	x1, x2, [x29, 128]
 	mov	w0, -3947
 	strh	w0, [x1, x2]
@@ -11926,34 +11940,34 @@ FtlWrite:
 	ldr	x0, [x29, 184]
 	add	x0, x0, 1
 	str	x0, [x29, 184]
-	b	.L1616
-.L1619:
+	b	.L1623
+.L1626:
 	ldr	w0, [x29, 168]
 	ldrh	w2, [x22, #:lo12:.LANCHOR12]
 	msub	w2, w20, w2, w0
 	and	w0, w2, 65535
 	stp	wzr, w0, [x29, 172]
-	b	.L1620
-.L1622:
+	b	.L1627
+.L1629:
 	ldr	w0, [x29, 176]
-.L1654:
+.L1661:
 	mul	w0, w0, w20
 	sub	w0, w0, w21
 	lsl	w0, w0, 9
 	add	x0, x26, x0
 	str	x0, [x3, 8]
-	b	.L1623
-.L1621:
+	b	.L1630
+.L1628:
 	add	x0, x0, x28
 	cmp	w20, w25
-	bne	.L1624
+	bne	.L1631
 	adrp	x1, .LANCHOR118
 	ldr	x1, [x1, #:lo12:.LANCHOR118]
-.L1653:
+.L1660:
 	str	x1, [x0, 8]
 	ldr	w0, [x29, 204]
 	cmn	w0, #1
-	beq	.L1626
+	beq	.L1633
 	str	w0, [x29, 212]
 	mov	w2, 0
 	ldr	x0, [x27, #:lo12:.LANCHOR114]
@@ -11966,17 +11980,17 @@ FtlWrite:
 	bl	FlashReadPages
 	ldr	w0, [x29, 208]
 	cmn	w0, #1
-	bne	.L1627
+	bne	.L1634
 	adrp	x0, .LANCHOR81
 	add	x0, x0, :lo12:.LANCHOR81
 	ldr	w1, [x0, 72]
 	add	w1, w1, 1
 	str	w1, [x0, 72]
-.L1630:
+.L1637:
 	ldr	w0, [x29, 176]
 	cmp	w20, w25
 	lsl	w2, w0, 9
-	bne	.L1631
+	bne	.L1638
 	ldr	x0, [x27, #:lo12:.LANCHOR114]
 	mov	x1, x26
 	add	x3, x0, x28
@@ -11984,17 +11998,17 @@ FtlWrite:
 	ldr	x3, [x3, 8]
 	lsl	w0, w0, 9
 	add	x0, x3, x0
-.L1655:
+.L1662:
 	bl	ftl_memcpy
-	b	.L1623
-.L1624:
+	b	.L1630
+.L1631:
 	adrp	x1, .LANCHOR119
 	ldr	x1, [x1, #:lo12:.LANCHOR119]
-	b	.L1653
-.L1627:
+	b	.L1660
+.L1634:
 	ldr	w1, [x23, 8]
 	cmp	w20, w1
-	beq	.L1629
+	beq	.L1636
 	adrp	x0, .LANCHOR81
 	add	x0, x0, :lo12:.LANCHOR81
 	ldr	w2, [x0, 72]
@@ -12004,18 +12018,18 @@ FtlWrite:
 	mov	w2, w20
 	add	x0, x0, :lo12:.LC113
 	bl	printf
-.L1629:
+.L1636:
 	ldr	w0, [x23, 8]
 	cmp	w20, w0
-	beq	.L1630
+	beq	.L1637
 	mov	w2, 1097
 	adrp	x1, .LANCHOR183
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR183
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	b	.L1630
-.L1626:
+	b	.L1637
+.L1633:
 	ldr	x0, [x27, #:lo12:.LANCHOR114]
 	ldr	x1, [x29, 104]
 	add	x0, x0, x28
@@ -12023,8 +12037,8 @@ FtlWrite:
 	mov	w1, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	b	.L1630
-.L1631:
+	b	.L1637
+.L1638:
 	ldrh	w1, [x22, #:lo12:.LANCHOR12]
 	ldr	x0, [x27, #:lo12:.LANCHOR114]
 	add	x3, x0, x28
@@ -12033,13 +12047,13 @@ FtlWrite:
 	ldr	x0, [x3, 8]
 	lsl	w1, w1, 9
 	add	x1, x26, x1
-	b	.L1655
-.L1618:
+	b	.L1662
+.L1625:
 	ldr	x0, [x27, #:lo12:.LANCHOR114]
 	add	x3, x0, x28
 	ldrh	w0, [x22, #:lo12:.LANCHOR12]
-	b	.L1654
-.L1638:
+	b	.L1661
+.L1645:
 	adrp	x23, .LANCHOR99
 	adrp	x20, .LANCHOR83
 	adrp	x21, .LANCHOR82
@@ -12047,19 +12061,19 @@ FtlWrite:
 	add	x20, x20, :lo12:.LANCHOR83
 	add	x21, x21, :lo12:.LANCHOR82
 	mov	w19, 256
-.L1641:
+.L1648:
 	adrp	x0, .LANCHOR80
 	mov	w1, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w0, w1
-	bne	.L1639
+	bne	.L1646
 	ldrh	w1, [x23]
 	cmp	w1, w0
-	bne	.L1639
+	bne	.L1646
 	mov	w0, 0
 	bl	List_get_gc_head_node
 	bl	FtlGcRefreshBlock
-.L1639:
+.L1646:
 	mov	w0, 128
 	mov	w1, 1
 	strh	w0, [x20]
@@ -12071,13 +12085,13 @@ FtlWrite:
 	bl	rk_ftl_garbage_collect
 	ldrh	w0, [x22, #:lo12:.LANCHOR48]
 	cmp	w0, 2
-	bhi	.L1640
+	bhi	.L1647
 	subs	w19, w19, #1
-	bne	.L1641
-	b	.L1640
-.L1642:
+	bne	.L1648
+	b	.L1647
+.L1649:
 	mov	w0, -1
-	b	.L1605
+	b	.L1612
 	.size	FtlWrite, .-FtlWrite
 	.section	.text.sftl_write,"ax",@progbits
 	.align	2
@@ -12097,14 +12111,14 @@ sftl_write:
 	stp	x27, x28, [sp, 80]
 	cmp	w20, 63
 	str	x2, [x29, 184]
-	bls	.L1657
+	bls	.L1664
 	cmp	w0, 576
-	bls	.L1658
-.L1657:
+	bls	.L1665
+.L1664:
 	adrp	x0, .LANCHOR184
 	str	x0, [x29, 152]
 	ldr	w1, [x0, #:lo12:.LANCHOR184]
-	cbz	w1, .L1659
+	cbz	w1, .L1666
 	adrp	x0, .LANCHOR185
 	str	x0, [x29, 144]
 	mov	w1, 35899
@@ -12112,8 +12126,8 @@ sftl_write:
 	movk	w1, 0xfcdc, lsl 16
 	ldr	w2, [x24]
 	cmp	w2, w1
-	beq	.L1660
-.L1677:
+	beq	.L1667
+.L1684:
 	ldr	x0, [x29, 152]
 	str	wzr, [x0, #:lo12:.LANCHOR184]
 	ldr	x0, [x29, 144]
@@ -12122,7 +12136,7 @@ sftl_write:
 	adrp	x0, .LANCHOR186
 	ldr	x0, [x0, #:lo12:.LANCHOR186]
 	bl	free
-.L1659:
+.L1666:
 	ldr	x3, [x29, 184]
 	mov	w2, w25
 	mov	w1, w22
@@ -12135,7 +12149,7 @@ sftl_write:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 272
 	ret
-.L1660:
+.L1667:
 	adrp	x1, .LANCHOR0
 	add	x0, x1, :lo12:.LANCHOR0
 	mov	w2, 65535
@@ -12146,9 +12160,9 @@ sftl_write:
 	mov	x0, 262140
 	add	x3, x24, x0
 	mov	w0, 0
-.L1664:
+.L1671:
 	ldr	w1, [x3]
-	cbnz	w1, .L1661
+	cbnz	w1, .L1668
 	ldr	w1, [x24, w0, uxtw 2]
 	add	w0, w0, 1
 	str	w1, [x3], -4
@@ -12156,17 +12170,17 @@ sftl_write:
 	sub	w2, w2, #1
 	csel	w0, w0, wzr, cc
 	cmp	w2, 4096
-	bne	.L1664
+	bne	.L1671
 	mov	w23, 512
-	b	.L1663
-.L1661:
+	b	.L1670
+.L1668:
 	add	w23, w2, 127
 	adrp	x0, .LC114
 	lsr	w23, w23, 7
 	add	x0, x0, :lo12:.LC114
 	mov	w3, w23
 	bl	printf
-.L1663:
+.L1670:
 	and	w19, w19, 255
 	adrp	x26, .LANCHOR105
 	mul	w20, w20, w19
@@ -12182,8 +12196,8 @@ sftl_write:
 	str	w0, [x29, 192]
 	add	x0, x26, :lo12:.LANCHOR105
 	str	x0, [x29, 136]
-	b	.L1676
-.L1667:
+	b	.L1683
+.L1674:
 	add	w0, w5, w4
 	ldr	x3, [x29, 136]
 	ubfiz	x2, x4, 9, 16
@@ -12207,13 +12221,13 @@ sftl_write:
 	add	w4, w0, w4
 	ldr	w6, [x29, 128]
 	and	w4, w4, 65535
-	b	.L1666
-.L1669:
+	b	.L1673
+.L1676:
 	add	w27, w8, w27
 	mov	w0, 0
 	and	w27, w27, 65535
-	b	.L1668
-.L1674:
+	b	.L1675
+.L1681:
 	mov	x27, x2
 	ldr	w4, [x0, x1, lsl 2]
 	lsl	x5, x1, 2
@@ -12221,7 +12235,7 @@ sftl_write:
 	add	x1, x1, 1
 	ldr	w3, [x27]
 	cmp	w4, w3
-	beq	.L1670
+	beq	.L1677
 	mov	x2, 512
 	mov	w1, 0
 	str	x5, [x29, 160]
@@ -12242,21 +12256,21 @@ sftl_write:
 	mov	w0, 0
 	blr	x2
 	cmp	w21, 1
-	bls	.L1683
+	bls	.L1690
 	ldr	x2, [x27, 8]
 	add	w1, w20, w19
 	mov	w0, 0
 	blr	x2
-.L1683:
+.L1690:
 	ldr	w1, [x29, 204]
 	ldr	w0, [x29, 196]
 	add	w19, w19, w1
 	ldr	w1, [x29, 196]
 	add	w0, w21, w0
 	cmp	w1, 15
-	bhi	.L1677
+	bhi	.L1684
 	str	w0, [x29, 196]
-.L1676:
+.L1683:
 	adrp	x5, .LANCHOR186
 	mov	x2, 512
 	mov	w1, 0
@@ -12282,22 +12296,22 @@ sftl_write:
 	ldr	w3, [x29, 128]
 	cmp	w0, w28
 	ldr	x4, [x29, 120]
-	bls	.L1665
+	bls	.L1672
 	add	w1, w28, w19
 	ldr	x4, [x4, 8]
 	mov	w0, 0
 	udiv	w1, w1, w3
 	blr	x4
-.L1665:
+.L1672:
 	udiv	w5, w19, w28
 	mov	w4, 0
 	mov	w7, 61424
 	msub	w5, w5, w28, w19
 	sub	w6, w19, w5
-.L1666:
+.L1673:
 	ldr	w0, [x29, 204]
 	cmp	w0, w4
-	bhi	.L1667
+	bhi	.L1674
 	ldr	x0, [x29, 176]
 	add	x10, x26, :lo12:.LANCHOR105
 	mov	w27, 0
@@ -12317,9 +12331,9 @@ sftl_write:
 	sdiv	w0, w1, w28
 	msub	w0, w0, w28, w1
 	and	w0, w0, 65535
-.L1668:
+.L1675:
 	cmp	w27, w23
-	bcs	.L1672
+	bcs	.L1679
 	add	w1, w5, w27
 	sub	w8, w4, w0
 	add	w0, w0, w7
@@ -12343,27 +12357,27 @@ sftl_write:
 	ldp	w5, w7, [x29, 116]
 	ldr	x10, [x29, 128]
 	ldr	x6, [x29, 160]
-	bne	.L1669
-.L1672:
+	bne	.L1676
+.L1679:
 	ldr	x0, [x29, 176]
 	mov	x2, x24
 	mov	x1, 0
 	ldr	x0, [x0, #:lo12:.LANCHOR186]
-.L1670:
+.L1677:
 	ldr	w3, [x29, 192]
 	mov	w28, w1
 	cmp	w1, w3
-	bcc	.L1674
+	bcc	.L1681
 	ldr	w0, [x29, 200]
 	add	w0, w0, 1
 	str	w0, [x29, 200]
 	cmp	w0, 5
-	bls	.L1683
-	b	.L1677
-.L1658:
+	bls	.L1690
+	b	.L1684
+.L1665:
 	cmp	w0, 64
 	adrp	x21, .LANCHOR185
-	bne	.L1678
+	bne	.L1685
 	mov	w0, 262144
 	bl	ftl_malloc
 	str	x0, [x21, #:lo12:.LANCHOR185]
@@ -12373,47 +12387,47 @@ sftl_write:
 	adrp	x0, .LANCHOR186
 	str	x1, [x0, #:lo12:.LANCHOR186]
 	ldr	x0, [x21, #:lo12:.LANCHOR185]
-	cbz	x0, .L1679
-	cbz	x1, .L1679
+	cbz	x0, .L1686
+	cbz	x1, .L1686
 	adrp	x1, .LANCHOR184
 	mov	w2, 1
 	str	w2, [x1, #:lo12:.LANCHOR184]
 	mov	w2, 262144
 	mov	w1, 0
 	bl	ftl_memset
-.L1678:
+.L1685:
 	ldr	x0, [x21, #:lo12:.LANCHOR185]
 	cmp	w22, 63
-	bhi	.L1680
+	bhi	.L1687
 	mov	w1, 64
 	ldr	x3, [x29, 184]
 	sub	w1, w1, w22
 	sub	w2, w25, w1
 	ubfiz	x1, x1, 9, 25
 	add	x1, x3, x1
-.L1681:
+.L1688:
 	cmp	w20, 576
-	bls	.L1682
+	bls	.L1689
 	sub	w2, w2, w19
 	sub	w2, w2, #447
-.L1682:
+.L1689:
 	lsl	w2, w2, 9
 	bl	ftl_memcpy
-	b	.L1659
-.L1679:
+	b	.L1666
+.L1686:
 	adrp	x1, .LANCHOR187
 	adrp	x0, .LC116
 	add	x1, x1, :lo12:.LANCHOR187
 	add	x0, x0, :lo12:.LC116
 	bl	printf
-	b	.L1678
-.L1680:
+	b	.L1685
+.L1687:
 	lsl	w1, w22, 7
 	mov	w2, w25
 	sub	w1, w1, #8192
 	add	x0, x0, x1, lsl 2
 	ldr	x1, [x29, 184]
-	b	.L1681
+	b	.L1688
 	.size	sftl_write, .-sftl_write
 	.section	.text.FtlMakeBbt,"ax",@progbits
 	.align	2
@@ -12439,42 +12453,42 @@ FtlMakeBbt:
 	adrp	x0, .LANCHOR10
 	add	x0, x0, :lo12:.LANCHOR10
 	str	x0, [x29, 120]
-.L1701:
+.L1708:
 	ldr	x0, [x29, 120]
 	ldrh	w0, [x0]
 	cmp	w22, w0
-	bcc	.L1707
+	bcc	.L1714
 	adrp	x21, .LANCHOR25
 	add	x21, x21, :lo12:.LANCHOR25
 	mov	w19, 0
-.L1708:
+.L1715:
 	ldrh	w0, [x21]
 	cmp	w0, w19
-	bhi	.L1709
+	bhi	.L1716
 	add	x21, x20, :lo12:.LANCHOR37
 	mov	w22, 65535
 	ldrh	w19, [x21, 12]
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L1710:
+.L1717:
 	ldrh	w0, [x21, 12]
 	sub	w0, w0, #47
 	cmp	w0, w19
-	bgt	.L1714
+	bgt	.L1721
 	mov	w0, w19
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L1711
+	beq	.L1718
 	mov	w0, w19
 	bl	FlashTestBlk
-	cbz	w0, .L1712
+	cbz	w0, .L1719
 	mov	w0, w19
 	bl	FtlBbmMapBadBlock
-.L1711:
+.L1718:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L1710
-.L1707:
+	b	.L1717
+.L1714:
 	adrp	x2, .LANCHOR123
 	adrp	x0, .LANCHOR115
 	add	x19, x28, :lo12:.LANCHOR148
@@ -12486,7 +12500,7 @@ FtlMakeBbt:
 	stp	x0, x26, [x19, 8]
 	adrp	x23, .LANCHOR17
 	str	x2, [x29, 112]
-	beq	.L1702
+	beq	.L1709
 	ldrh	w4, [x23, #:lo12:.LANCHOR17]
 	mov	w2, 1
 	madd	w27, w4, w22, w1
@@ -12501,14 +12515,14 @@ FtlMakeBbt:
 	add	w2, w2, 7
 	lsr	w2, w2, 3
 	bl	ftl_memcpy
-.L1703:
+.L1710:
 	mov	w0, w27
 	add	w22, w22, 1
 	bl	FtlBbmMapBadBlock
 	add	x24, x24, 8
 	add	x21, x21, 2
-	b	.L1701
-.L1702:
+	b	.L1708
+.L1709:
 	mov	w1, w22
 	bl	FlashGetBadBlockList
 	ldr	x0, [x19, 8]
@@ -12521,12 +12535,12 @@ FtlMakeBbt:
 	add	x0, x0, :lo12:.LANCHOR137
 	and	w19, w19, 65535
 	str	x0, [x29, 104]
-.L1704:
+.L1711:
 	ldrh	w0, [x23]
 	madd	w0, w22, w0, w19
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L1705
+	beq	.L1712
 	ldr	x0, [x29, 112]
 	mov	w2, 16
 	strh	w19, [x21]
@@ -12564,29 +12578,29 @@ FtlMakeBbt:
 	bl	FlashProgPages
 	ldr	w0, [x25]
 	cmn	w0, #1
-	bne	.L1703
+	bne	.L1710
 	mov	w0, w27
 	bl	FtlBbmMapBadBlock
-	b	.L1704
-.L1705:
+	b	.L1711
+.L1712:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L1704
-.L1709:
+	b	.L1711
+.L1716:
 	mov	w0, w19
 	add	w19, w19, 1
 	bl	FtlBbmMapBadBlock
 	and	w19, w19, 65535
-	b	.L1708
-.L1712:
+	b	.L1715
+.L1719:
 	ldrh	w0, [x21]
 	cmp	w0, w22
-	bne	.L1713
+	bne	.L1720
 	strh	w19, [x21]
-	b	.L1711
-.L1713:
+	b	.L1718
+.L1720:
 	strh	w19, [x21, 4]
-.L1714:
+.L1721:
 	adrp	x0, .LANCHOR106
 	add	x19, x20, :lo12:.LANCHOR37
 	ldrh	w1, [x20, #:lo12:.LANCHOR37]
@@ -12643,9 +12657,9 @@ ftl_low_format:
 	str	wzr, [x20, #:lo12:.LANCHOR70]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	w0, .L1721
+	cbz	w0, .L1728
 	bl	FtlMakeBbt
-.L1721:
+.L1728:
 	adrp	x23, .LANCHOR12
 	adrp	x0, .LANCHOR118
 	mov	w6, 23752
@@ -12656,31 +12670,31 @@ ftl_low_format:
 	lsl	w1, w1, 7
 	ldr	x5, [x0, #:lo12:.LANCHOR119]
 	mov	w0, 0
-.L1722:
+.L1729:
 	cmp	w0, w1
-	blt	.L1723
+	blt	.L1730
 	adrp	x21, .LANCHOR5
 	adrp	x22, .LANCHOR6
 	add	x26, x22, :lo12:.LANCHOR6
 	mov	w19, 0
 	ldrh	w25, [x21, #:lo12:.LANCHOR5]
-.L1724:
+.L1731:
 	ldrh	w0, [x26]
 	cmp	w0, w25
-	bhi	.L1725
+	bhi	.L1732
 	adrp	x25, .LANCHOR3
 	sub	w1, w19, #2
 	ldrh	w0, [x25, #:lo12:.LANCHOR3]
 	cmp	w1, w0, lsl 1
-	bgt	.L1726
-.L1730:
+	bgt	.L1733
+.L1737:
 	add	x26, x21, :lo12:.LANCHOR5
 	mov	w19, 0
 	mov	w24, 0
-.L1727:
+.L1734:
 	ldrh	w0, [x26]
 	cmp	w0, w24
-	bhi	.L1731
+	bhi	.L1738
 	adrp	x0, .LANCHOR111
 	ldrh	w1, [x22, #:lo12:.LANCHOR6]
 	ldrh	w4, [x25, #:lo12:.LANCHOR3]
@@ -12697,28 +12711,28 @@ ftl_low_format:
 	mov	w6, 24
 	mul	w6, w4, w6
 	cmp	w19, w6
-	ble	.L1732
+	ble	.L1739
 	sub	w1, w1, w19
 	udiv	w1, w1, w4
 	str	w1, [x3, #:lo12:.LANCHOR61]
 	lsr	w1, w1, 5
 	add	w1, w1, 24
 	strh	w1, [x2, #:lo12:.LANCHOR78]
-.L1732:
+.L1739:
 	adrp	x1, .LANCHOR15
 	ldrh	w1, [x1, #:lo12:.LANCHOR15]
-	cbz	w1, .L1734
+	cbz	w1, .L1741
 	ldrh	w6, [x2, #:lo12:.LANCHOR78]
 	add	w6, w6, w1, lsr 1
 	strh	w6, [x2, #:lo12:.LANCHOR78]
 	mul	w6, w1, w4
 	cmp	w19, w6
-	bge	.L1734
+	bge	.L1741
 	add	w1, w1, 32
 	str	w5, [x3, #:lo12:.LANCHOR61]
 	add	w1, w0, w1
 	strh	w1, [x2, #:lo12:.LANCHOR78]
-.L1734:
+.L1741:
 	ldrh	w1, [x2, #:lo12:.LANCHOR78]
 	adrp	x25, .LANCHOR152
 	ldr	w0, [x3, #:lo12:.LANCHOR61]
@@ -12762,20 +12776,20 @@ ftl_low_format:
 	ldr	x0, [x0, #:lo12:.LANCHOR1]
 	strb	wzr, [x19, 6]
 	bl	ftl_memset
-.L1736:
+.L1743:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1737
+	cbnz	w1, .L1744
 	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L1736
-.L1723:
+	b	.L1743
+.L1730:
 	ubfiz	x3, x0, 2, 16
 	mvn	w2, w0
 	orr	w2, w0, w2, lsl 16
@@ -12783,8 +12797,8 @@ ftl_low_format:
 	and	w0, w0, 65535
 	str	w2, [x4, x3]
 	str	w6, [x5, x3]
-	b	.L1722
-.L1725:
+	b	.L1729
+.L1732:
 	mov	w0, w25
 	mov	w1, 1
 	add	w25, w25, 1
@@ -12792,8 +12806,8 @@ ftl_low_format:
 	add	w19, w19, w0
 	and	w25, w25, 65535
 	and	w19, w19, 65535
-	b	.L1724
-.L1726:
+	b	.L1731
+.L1733:
 	udiv	w0, w19, w0
 	adrp	x1, .LANCHOR31
 	ldr	w19, [x1, #:lo12:.LANCHOR31]
@@ -12803,17 +12817,17 @@ ftl_low_format:
 	add	x24, x22, :lo12:.LANCHOR6
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	w19, [x21, #:lo12:.LANCHOR5]
-.L1728:
+.L1735:
 	ldrh	w0, [x24]
 	cmp	w0, w19
-	bls	.L1730
+	bls	.L1737
 	mov	w0, w19
 	add	w19, w19, 1
 	mov	w1, 1
 	and	w19, w19, 65535
 	bl	FtlLowFormatEraseBlock
-	b	.L1728
-.L1731:
+	b	.L1735
+.L1738:
 	mov	w0, w24
 	mov	w1, 0
 	add	w24, w24, 1
@@ -12821,8 +12835,8 @@ ftl_low_format:
 	add	w19, w19, w0
 	and	w24, w24, 65535
 	and	w19, w19, 65535
-	b	.L1727
-.L1737:
+	b	.L1734
+.L1744:
 	ldr	w1, [x20, #:lo12:.LANCHOR70]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
@@ -12842,20 +12856,20 @@ ftl_low_format:
 	mov	w1, 1
 	strb	wzr, [x0, 6]
 	strb	w1, [x0, 8]
-.L1738:
+.L1745:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1739
+	cbnz	w1, .L1746
 	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L1738
-.L1739:
+	b	.L1745
+.L1746:
 	ldr	w1, [x20, #:lo12:.LANCHOR70]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
@@ -12881,11 +12895,11 @@ ftl_low_format:
 	str	w0, [x20, #:lo12:.LANCHOR70]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	w0, .L1740
+	cbnz	w0, .L1747
 	adrp	x0, .LANCHOR86
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR86]
-.L1740:
+.L1747:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -14576,19 +14590,19 @@ __func__.7450:
 	.size	__func__.7712, 15
 __func__.7712:
 	.string	"FlashReadPages"
-	.section	.rodata.__func__.7730,"a",@progbits
+	.section	.rodata.__func__.7731,"a",@progbits
 	.align	3
 	.set	.LANCHOR153,. + 0
-	.type	__func__.7730, %object
-	.size	__func__.7730, 15
-__func__.7730:
+	.type	__func__.7731, %object
+	.size	__func__.7731, 15
+__func__.7731:
 	.string	"FlashProgPages"
-	.section	.rodata.__func__.7753,"a",@progbits
+	.section	.rodata.__func__.7755,"a",@progbits
 	.align	3
 	.set	.LANCHOR104,. + 0
-	.type	__func__.7753, %object
-	.size	__func__.7753, 17
-__func__.7753:
+	.type	__func__.7755, %object
+	.size	__func__.7755, 17
+__func__.7755:
 	.string	"FlashEraseBlocks"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",@progbits,1
 .LC105:

commit f18b06fb49ee7a4d1fbc876e72d427ee23b0c31b
Author: Tony Xu <tony.xu@rock-chips.com>
Date:   Thu Sep 13 11:41:37 2018 +0800

    lib: optee_clientApi: Optimze the function write_keybox_to_secure_storage
    
    Change-Id: Icb88355494eb23c9403fc078adb5f2f46c4a870c
    Signed-off-by: Tony Xu <tony.xu@rock-chips.com>

diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index 29a81bd45b..ceeafb6f2b 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -357,7 +357,7 @@ static int rkusb_do_vs_write(struct fsg_common *common)
 				rc =
 				write_keybox_to_secure_storage((u8 *)data,
 							       vhead->size);
-				if (!rc)
+				if (rc < 0)
 					return -EIO;
 #endif
 			}
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index 166c00446f..fc7d788a82 100755
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -13,6 +13,8 @@
 #include <stdlib.h>
 
 #define	BOOT_FROM_EMMC	(1 << 1)
+#define	WIDEVINE_TAG	"KBOX"
+#define	ATTESTATION_TAG	"ATTE"
 
 uint32_t rk_send_keybox_to_ta(uint8_t *filename, uint32_t filename_size,
 			      TEEC_UUID uuid,
@@ -126,73 +128,41 @@ uint32_t rk_send_keybox_to_ta(uint8_t *filename, uint32_t filename_size,
 
 int write_keybox_to_secure_storage(uint8_t *uboot_data, uint32_t len)
 {
-	typedef struct VENDOR_DATA {
-		uint8_t tag[4];
-		uint32_t key_size;
-		uint32_t data_size;
-		uint8_t *all_data;
-	} VENDOR_DATA;
-
-	uint8_t *key = NULL;
-	uint8_t *data = NULL;
-	VENDOR_DATA tmp_data;
-
-	memset(&tmp_data, 0, sizeof(VENDOR_DATA));
-	memcpy(tmp_data.tag, uboot_data, 4);
-	tmp_data.key_size = *(uboot_data + 4);
-	tmp_data.data_size = *(uboot_data + 8);
-	tmp_data.all_data = malloc(tmp_data.key_size + tmp_data.data_size);
-	memcpy(tmp_data.all_data, uboot_data + 12,
-	       tmp_data.key_size + tmp_data.data_size);
-
-	uint8_t widevine_tag[] = {'K', 'B', 'O', 'X'};
-	uint8_t tag[] = {0};
-
-	uint32_t object_id = 101;
-
-	TEEC_UUID tmp_uuid;
+	uint32_t key_size;
+	uint32_t data_size;
+	uint32_t object_id;
+	TEEC_Result ret;
+	int rc = 0;
 
-	if (memcmp(uboot_data, widevine_tag, 4) == 0) {
+	if (memcmp(uboot_data, WIDEVINE_TAG, 4) == 0) {
+		/* widevine keybox */
 		TEEC_UUID widevine_uuid = { 0xc11fe8ac, 0xb997, 0x48cf,
 			{ 0xa2, 0x8d, 0xe2, 0xa5, 0x5e, 0x52, 0x40, 0xef} };
-		tmp_uuid = widevine_uuid;
-		memcpy(tag, uboot_data, 4);
-		printf("check tag success! %s\n", tag);
-	} else {
-		memcpy(tag, uboot_data, 4);
-		printf("check tag failed! %s\n", tag);
-	}
-
-	key = malloc(tmp_data.key_size);
-	if (!key) {
-		printf("Malloc key failed!!\n");
-		goto reboot;
-	}
+		object_id = 101;
+
+		key_size = *(uboot_data + 4);
+		data_size = *(uboot_data + 8);
+
+		ret = rk_send_keybox_to_ta((uint8_t *)&object_id,
+					   sizeof(uint32_t),
+					   widevine_uuid,
+					   uboot_data + 12,
+					   key_size,
+					   uboot_data + 12 + key_size,
+					   data_size);
+		if (ret == TEEC_SUCCESS) {
+			rc = 0;
+			printf("write widevine keybox to secure storage success\n");
+		} else {
+			rc = -EIO;
+			printf("write widevine keybox to secure storage fail\n");
+		}
+	} else if (memcmp(uboot_data, ATTESTATION_TAG, 4) == 0) {
+		/* attestation key */
 
-	data = malloc(tmp_data.data_size);
-	if (!data) {
-		printf("Malloc data failed!!\n");
-		goto reboot;
 	}
 
-	memcpy(key, tmp_data.all_data, tmp_data.key_size);
-	memcpy(data, tmp_data.all_data + tmp_data.key_size,
-	       tmp_data.data_size);
-
-	rk_send_keybox_to_ta((uint8_t *)&object_id, sizeof(uint32_t),
-			     tmp_uuid,
-			     key, tmp_data.key_size,
-			     data, tmp_data.data_size);
-reboot:
-	if (key)
-		free(key);
-	if (data)
-		free(data);
-	if (tmp_data.all_data)
-	free(tmp_data.all_data);
-
-	memset(&tmp_data, 0, sizeof(VENDOR_DATA));
-	return 0;
+	return rc;
 }
 
 void test_optee(void)

commit 8fd483da849f3e4d28c23fc8d96e8461cb1dcd60
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Oct 11 10:25:05 2018 +0800

    rockchip: dtsi: rk1808: sync from kernel
    
    base on commit 54e75c20:
        (clk: rockchip: rk1808: add clk ID for clk_rtc32k_frac)
    
    Change-Id: Iac1db11af0e6c9d54e66a1d634d890ef6999c7d9
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/dts/rk1808.dtsi b/arch/arm/dts/rk1808.dtsi
index 8ede0da498..e7de04cfd2 100644
--- a/arch/arm/dts/rk1808.dtsi
+++ b/arch/arm/dts/rk1808.dtsi
@@ -1110,7 +1110,7 @@
 			compatible = "rockchip,gpio-bank";
 			reg = <0x0 0xff4c0000 0x0 0x100>;
 			interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&cru SCLK_PMU_GPIO0>, <&cru PCLK_GPIO0_PMU>;
+			clocks = <&cru PCLK_GPIO0_PMU>, <&cru DBCLK_PMU_GPIO0>;
 			gpio-controller;
 			#gpio-cells = <2>;
 
@@ -1122,7 +1122,7 @@
 			compatible = "rockchip,gpio-bank";
 			reg = <0x0 0xff690000 0x0 0x100>;
 			interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&cru SCLK_GPIO1>, <&cru PCLK_GPIO1>;
+			clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>;
 			gpio-controller;
 			#gpio-cells = <2>;
 
@@ -1134,7 +1134,7 @@
 			compatible = "rockchip,gpio-bank";
 			reg = <0x0 0xff6a0000 0x0 0x100>;
 			interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&cru SCLK_GPIO2>, <&cru PCLK_GPIO2>;
+			clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>;
 			gpio-controller;
 			#gpio-cells = <2>;
 
@@ -1146,7 +1146,7 @@
 			compatible = "rockchip,gpio-bank";
 			reg = <0x0 0xff6b0000 0x0 0x100>;
 			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&cru SCLK_GPIO3>, <&cru PCLK_GPIO3>;
+			clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>;
 			gpio-controller;
 			#gpio-cells = <2>;
 
@@ -1158,7 +1158,7 @@
 			compatible = "rockchip,gpio-bank";
 			reg = <0x0 0xff6c0000 0x0 0x100>;
 			interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&cru SCLK_GPIO4>, <&cru PCLK_GPIO4>;
+			clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>;
 			gpio-controller;
 			#gpio-cells = <2>;
 
diff --git a/include/dt-bindings/clock/rk1808-cru.h b/include/dt-bindings/clock/rk1808-cru.h
index 91a71dd0a1..3dd5c76d52 100644
--- a/include/dt-bindings/clock/rk1808-cru.h
+++ b/include/dt-bindings/clock/rk1808-cru.h
@@ -78,10 +78,10 @@
 #define SCLK_SARADC		77
 #define SCLK_EFUSE_S		78
 #define SCLK_EFUSE_NS		79
-#define SCLK_GPIO1		80
-#define SCLK_GPIO2		81
-#define SCLK_GPIO3		82
-#define SCLK_GPIO4		83
+#define DBCLK_GPIO1		80
+#define DBCLK_GPIO2		81
+#define DBCLK_GPIO3		82
+#define DBCLK_GPIO4		83
 #define SCLK_PWM0		84
 #define SCLK_PWM1		85
 #define SCLK_PWM2		86
@@ -105,11 +105,12 @@
 #define SCLK_UART0_PMU		104
 #define SCLK_PVTM_PMU		105
 #define SCLK_PMU_I2C0		106
-#define SCLK_PMU_GPIO0		107
+#define DBCLK_PMU_GPIO0		107
 #define SCLK_REF24M_PMU		108
 #define SCLK_USBPHY_REF		109
 #define SCLK_MIPIDSIPHY_REF	110
 #define SCLK_PCIEPHY_REF	111
+#define SCLK_RTC32K_FRAC	112
 
 /* aclk gates */
 #define ACLK_GIC_PRE		145
@@ -147,7 +148,6 @@
 #define HCLK_VOPLITE		203
 #define HCLK_RGA		204
 #define HCLK_ISP		205
-#define HCLK_CIF		205
 #define LSCLK_PCIE		206
 #define HCLK_HOST		207
 #define LSCLK_PERI		208
@@ -165,6 +165,7 @@
 #define MSCLK_CORE_NIU		220
 #define HSCLK_IMEM		221
 #define HCLK_HOST_ARB		222
+#define HCLK_CIF		223
 
 /* pclk gates */
 #define PCLK_DDR		250

commit ba09f8360d44fe2dbbe07c3f8735a01eb3412bd1
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Oct 11 10:16:07 2018 +0800

    thermal: rockchip: Use incremental code table for rk1808
    
    Change-Id: Ifcd0785fefdb34d0b766dcc3b414d30329769218
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index e826d5e12f..0d48b8299a 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -170,42 +170,42 @@ struct rockchip_thermal_priv {
 };
 
 static const struct tsadc_table rk1808_code_table[] = {
-	{TSADCV2_DATA_MASK, -40000},
-	{641, -40000},
-	{633, -35000},
-	{625, -30000},
-	{617, -25000},
-	{609, -20000},
-	{601, -15000},
-	{593, -10000},
-	{585, -5000},
-	{577, 0},
-	{569, 5000},
-	{561, 10000},
-	{553, 15000},
-	{545, 20000},
-	{537, 25000},
-	{529, 30000},
-	{520, 35000},
-	{512, 40000},
-	{504, 45000},
-	{496, 50000},
-	{487, 55000},
-	{479, 60000},
-	{471, 65000},
-	{463, 70000},
-	{454, 75000},
-	{446, 80000},
-	{437, 85000},
-	{429, 90000},
-	{421, 95000},
-	{412, 100000},
-	{404, 105000},
-	{395, 110000},
-	{387, 115000},
-	{378, 120000},
-	{370, 125000},
-	{0, 125000},
+	{0, -40000},
+	{3455, -40000},
+	{3463, -35000},
+	{3471, -30000},
+	{3479, -25000},
+	{3487, -20000},
+	{3495, -15000},
+	{3503, -10000},
+	{3511, -5000},
+	{3519, 0},
+	{3527, 5000},
+	{3535, 10000},
+	{3543, 15000},
+	{3551, 20000},
+	{3559, 25000},
+	{3567, 30000},
+	{3576, 35000},
+	{3584, 40000},
+	{3592, 45000},
+	{3600, 50000},
+	{3609, 55000},
+	{3617, 60000},
+	{3625, 65000},
+	{3633, 70000},
+	{3642, 75000},
+	{3650, 80000},
+	{3659, 85000},
+	{3667, 90000},
+	{3675, 95000},
+	{3684, 100000},
+	{3692, 105000},
+	{3701, 110000},
+	{3709, 115000},
+	{3718, 120000},
+	{3726, 125000},
+	{TSADCV2_DATA_MASK, 125000},
 };
 
 static const struct tsadc_table rk3228_code_table[] = {
@@ -846,7 +846,7 @@ static const struct rockchip_tsadc_chip rk1808_tsadc_data = {
 		.id = rk1808_code_table,
 		.length = ARRAY_SIZE(rk1808_code_table),
 		.data_mask = TSADCV2_DATA_MASK,
-		.mode = ADC_DECREMENT,
+		.mode = ADC_INCREMENT,
 	},
 };
 

commit 550311a9cad449567d5c16f7852838a12cc76d17
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Oct 10 14:15:56 2018 +0800

    rockchip: atags: add tag_atf_mem support
    
    it's mainly for U-Boot to reserve ATF memory region.
    
    Change-Id: I1039204c263adf91e84ec3b813094e4cf588013f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rk_atags.h b/arch/arm/include/asm/arch-rockchip/rk_atags.h
index 67762d3a15..f7402861d0 100644
--- a/arch/arm/include/asm/arch-rockchip/rk_atags.h
+++ b/arch/arm/include/asm/arch-rockchip/rk_atags.h
@@ -16,6 +16,7 @@
 #define ATAG_DDR_MEM		0x54410052
 #define ATAG_TOS_MEM		0x54410053
 #define ATAG_RAM_PARTITION	0x54410054
+#define ATAG_ATF_MEM		0x54410055
 
 /* Tag size and offset */
 #define ATAGS_SIZE		(0x2000)	/* 8K */
@@ -84,6 +85,14 @@ struct tag_tos_mem {
 	u64 reserved[8];
 } __packed;
 
+struct tag_atf_mem {
+	u32 version;
+	u64 phy_addr;
+	u32 size;
+	u32 flags;
+	u32 reserved[3];
+} __packed;
+
 struct tag_ram_partition {
 	u32 version;
 	u32 count;
@@ -117,6 +126,7 @@ struct tag {
 		struct tag_ddr_mem	ddr_mem;
 		struct tag_tos_mem	tos_mem;
 		struct tag_ram_partition ram_part;
+		struct tag_atf_mem	atf_mem;
 	} u;
 } __aligned(4);
 
diff --git a/arch/arm/mach-rockchip/rk_atags.c b/arch/arm/mach-rockchip/rk_atags.c
index 865e724105..a8f0d99b2e 100644
--- a/arch/arm/mach-rockchip/rk_atags.c
+++ b/arch/arm/mach-rockchip/rk_atags.c
@@ -80,7 +80,8 @@ static int inline bad_magic(u32 magic)
 		(magic != ATAG_BOOTDEV) &&
 		(magic != ATAG_DDR_MEM) &&
 		(magic != ATAG_TOS_MEM) &&
-		(magic != ATAG_RAM_PARTITION));
+		(magic != ATAG_RAM_PARTITION) &&
+		(magic != ATAG_ATF_MEM));
 }
 
 static int inline atags_size_overflow(struct tag *t, u32 tag_size)
@@ -167,7 +168,9 @@ int atags_set_tag(u32 magic, void *tagdata)
 	case ATAG_RAM_PARTITION:
 		size = tag_size(tag_ram_partition);
 		break;
-
+	case ATAG_ATF_MEM:
+		size = tag_size(tag_atf_mem);
+		break;
 	};
 
 	if (atags_size_overflow(t, size)) {
@@ -330,6 +333,16 @@ void atags_print_tag(struct tag *t)
 			       t->u.ram_part.part[i].start,
 			       t->u.ram_part.part[i].size);
 		break;
+	case ATAG_ATF_MEM:
+		printf("[atf_mem]:\n");
+		printf("     magic = 0x%x\n", t->hdr.magic);
+		printf("      size = 0x%x\n\n", t->hdr.size << 2);
+		printf("   version = 0x%x\n", t->u.atf_mem.version);
+		printf("  phy_addr = 0x%llx\n", t->u.atf_mem.phy_addr);
+		printf("      size = 0x%x\n", t->u.atf_mem.size);
+		for (i = 0; i < ARRAY_SIZE(t->u.atf_mem.reserved); i++)
+			printf("    res[%d] = 0x%x\n", i, t->u.atf_mem.reserved[i]);
+		break;
 	case ATAG_CORE:
 		printf("[core]:\n");
 		printf("     magic = 0x%x\n", t->hdr.magic);
@@ -367,12 +380,14 @@ void atags_test(void)
 	struct tag_ddr_mem t_ddr_mem;
 	struct tag_tos_mem t_tos_mem;
 	struct tag_ram_partition t_ram_param;
+	struct tag_atf_mem t_atf_mem;
 
 	memset(&t_serial,  0x1, sizeof(t_serial));
 	memset(&t_bootdev, 0x2, sizeof(t_bootdev));
 	memset(&t_ddr_mem, 0x3, sizeof(t_ddr_mem));
 	memset(&t_tos_mem, 0x4, sizeof(t_tos_mem));
-	memset(&t_tos_mem, 0x0, sizeof(t_ram_param));
+	memset(&t_ram_param, 0x0, sizeof(t_ram_param));
+	memset(&t_atf_mem, 0x5, sizeof(t_atf_mem));
 
 	memcpy(&t_tos_mem.tee_mem.name, "tee_mem", 8);
 	memcpy(&t_tos_mem.drm_mem.name, "drm_mem", 8);
@@ -402,6 +417,7 @@ void atags_test(void)
 	atags_set_tag(ATAG_DDR_MEM, &t_ddr_mem);
 	atags_set_tag(ATAG_TOS_MEM, &t_tos_mem);
 	atags_set_tag(ATAG_RAM_PARTITION, &t_ram_param);
+	atags_set_tag(ATAG_ATF_MEM, &t_atf_mem);
 
 	atags_print_all_tags();
 	atags_stat();

commit 503a09680021b57201875d637541ed691696cc7d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 9 19:42:58 2018 +0800

    rockchip: atags: add serial id
    
    Change-Id: I13342303a3103b3610eec932b014f9e99e148381
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rk_atags.h b/arch/arm/include/asm/arch-rockchip/rk_atags.h
index d07bf1b0a1..67762d3a15 100644
--- a/arch/arm/include/asm/arch-rockchip/rk_atags.h
+++ b/arch/arm/include/asm/arch-rockchip/rk_atags.h
@@ -46,7 +46,8 @@ struct tag_serial {
 	u64 addr;
 	u32 baudrate;
 	u32 m_mode;
-	u32 reserved[4];
+	u32 id;
+	u32 reserved[3];
 } __packed;
 
 struct tag_bootdev {

commit 4fb128796ae2640ab4a259d7316acdc8c3a6129b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Oct 11 18:07:02 2018 +0800

    Revert "rockchip: px30: add fdt_high/initrd_high to avoid relocation"
    
    This reverts commit d6ceaafd1a113ad77916608ec7c45e6f4f7f2730.
    
    Change-Id: Ia039a3e7fd4ced0f01fbc9ec1d6d168e5b4fc20a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index abec304cba..cb26415285 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -49,8 +49,6 @@
 #define CONFIG_ROCKUSB_G_DNL_PID        0x330d
 
 #define ENV_MEM_LAYOUT_SETTINGS \
-	"fdt_high=0xffffffffffffffff\0" \
-	"initrd_high=0xffffffffffffffff\0" \
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x01f00000\0" \

commit 6d57a5ae712146627fe41d21d831e5bef5c98794
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Oct 11 17:52:46 2018 +0800

    Revert "rockchip: rk1808: add fdt_high/initrd_high to avoid relocation"
    
    This reverts commit 15349ff5d02923ba1f6358cb0c778f9f6cec0cab.
    
    Change-Id: I4fb10b36ab949c87adef83ec7d568897e799dcd8
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk1808_common.h b/include/configs/rk1808_common.h
index 276db39af0..b7a25f4bbc 100644
--- a/include/configs/rk1808_common.h
+++ b/include/configs/rk1808_common.h
@@ -36,8 +36,6 @@
 #define CONFIG_ROCKUSB_G_DNL_PID	0x330d
 
 #define ENV_MEM_LAYOUT_SETTINGS \
-	"fdt_high=0xffffffffffffffff\0" \
-	"initrd_high=0xffffffffffffffff\0" \
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x01f00000\0" \

commit 6cb8d50f5d5e662c6d224d0a5a77e3cecf41361d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Oct 10 18:03:06 2018 +0800

    arm: bootm-fdt: improve bi_dram[] print format
    
    print start and end address is more easily for users to understand.
    
    Change-Id: I42bcf5aaa0ea7ce4b988336069649e96117f13dd
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/lib/bootm-fdt.c b/arch/arm/lib/bootm-fdt.c
index b693496d39..d564746cf2 100644
--- a/arch/arm/lib/bootm-fdt.c
+++ b/arch/arm/lib/bootm-fdt.c
@@ -51,8 +51,8 @@ int arch_fixup_fdt(void *blob)
 		size[bank] = bd->bi_dram[bank].size;
 		if (size[bank] == 0)
 			continue;
-		printf("Adding bank: start=0x%08llx, size=0x%08llx\n",
-		       start[bank], size[bank]);
+		printf("Adding bank: 0x%08llx - 0x%08llx (size: 0x%08llx)\n",
+		       start[bank], start[bank] + size[bank], size[bank]);
 
 #ifdef CONFIG_ARMV7_NONSEC
 		ret = armv7_apply_memory_carveout(&start[bank], &size[bank]);

commit 34ae5fd272ecdeec8035380ec6aaaa6b6079ffb3
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Wed Oct 10 10:35:19 2018 +0800

    configs: rk1808: enable display subsystem module
    
    Change-Id: I4b99e564fa17343580be0e0e407977dab835900a
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/configs/rk1808_defconfig b/configs/rk1808_defconfig
index c033b50164..a634a3bbc1 100644
--- a/configs/rk1808_defconfig
+++ b/configs/rk1808_defconfig
@@ -11,6 +11,7 @@ CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_BOOTDELAY=0
+# CONFIG_CONSOLE_MUX is not set
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_FASTBOOT_BUF_ADDR=0x00800800
@@ -80,6 +81,12 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Rockchip"
 CONFIG_G_DNL_VENDOR_NUM=0x2207
 CONFIG_G_DNL_PRODUCT_NUM=0x330d
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_DRM_ROCKCHIP_RGB=y
+CONFIG_LCD=y
 CONFIG_LZ4=y
 # CONFIG_EFI_LOADER is not set
 CONFIG_TEST_ROCKCHIP=y

commit ad3aa75a65245306f52b94a1ccc0a0cbc92be834
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Wed Oct 10 10:29:50 2018 +0800

    drm/rockchip: vop: Add support rk1808 vop lite
    
    Change-Id: I9a17036597bc8a5bd6ae197d9306260374933503
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_crtc.c b/drivers/video/drm/rockchip_crtc.c
index 3fb1886df8..6fec03a71c 100644
--- a/drivers/video/drm/rockchip_crtc.c
+++ b/drivers/video/drm/rockchip_crtc.c
@@ -42,6 +42,11 @@ static const struct rockchip_crtc rk3308_vop_data = {
 	.data = &rk3308_vop,
 };
 
+static const struct rockchip_crtc rk1808_vop_data = {
+	.funcs = &rockchip_vop_funcs,
+	.data = &rk1808_vop,
+};
+
 static const struct rockchip_crtc rk3288_vop_big_data = {
 	.funcs = &rockchip_vop_funcs,
 	.data = &rk3288_vop_big,
@@ -101,6 +106,9 @@ static const struct udevice_id rockchip_vop_ids[] = {
 	}, {
 		.compatible = "rockchip,rk3308-vop",
 		.data = (ulong)&rk3308_vop_data,
+	}, {
+		.compatible = "rockchip,rk1808-vop-lit",
+		.data = (ulong)&rk1808_vop_data,
 	}, {
 		.compatible = "rockchip,rk3288-vop-big",
 		.data = (ulong)&rk3288_vop_big_data,
diff --git a/drivers/video/drm/rockchip_crtc.h b/drivers/video/drm/rockchip_crtc.h
index 6681446c7e..75edb4c16f 100644
--- a/drivers/video/drm/rockchip_crtc.h
+++ b/drivers/video/drm/rockchip_crtc.h
@@ -31,6 +31,7 @@ extern const struct vop_data rk3036_vop;
 extern const struct vop_data px30_vop_lit;
 extern const struct vop_data px30_vop_big;
 extern const struct vop_data rk3308_vop;
+extern const struct vop_data rk1808_vop;
 extern const struct vop_data rk3288_vop_big;
 extern const struct vop_data rk3288_vop_lit;
 extern const struct vop_data rk3368_vop;
diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index 8784138cbf..b0fa315537 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -658,6 +658,20 @@ const struct vop_data rk3308_vop = {
 	.reg_len = RK3366_LIT_FRC_LOWER01_0 * 4,
 };
 
+static const struct vop_grf_ctrl rk1808_grf_ctrl = {
+	.grf_dclk_inv = VOP_REG(RK1808_GRF_PD_VO_CON1, 0x1, 4),
+};
+
+const struct vop_data rk1808_vop = {
+	.version = VOP_VERSION(2, 8),
+	.max_output = {1920, 1080},
+	.ctrl = &px30_ctrl_data,
+	.grf_ctrl = &rk1808_grf_ctrl,
+	.win = &rk3366_win1_data,
+	.line_flag = &rk3366_vop_lite_line_flag,
+	.reg_len = RK3366_LIT_FRC_LOWER01_0 * 4,
+};
+
 const struct vop_data rv1108_vop = {
 	.version = VOP_VERSION(2, 4),
 	.max_output = {1920, 1080},
diff --git a/drivers/video/drm/rockchip_vop_reg.h b/drivers/video/drm/rockchip_vop_reg.h
index f300e7be63..18ee5d83f9 100644
--- a/drivers/video/drm/rockchip_vop_reg.h
+++ b/drivers/video/drm/rockchip_vop_reg.h
@@ -959,4 +959,9 @@
 #define PX30_AFBCD0_AXI_CTRL			0x00250
 #define PX30_GRF_PD_VO_CON1			0x00438
 /* px30 register definition end */
+
+/* rk1808 register definition start*/
+#define RK1808_GRF_PD_VO_CON1			0x00000444
+/* rk1808 register definition end*/
+
 #endif /* _ROCKCHIP_VOP_REG_H */

commit 1cd89291afa7d8a78e05895cb70927a36562bf7d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 9 14:58:01 2018 +0800

    rockchip: atags: add atags existence verify before get
    
    Change-Id: I939b1ff1a46c888fed928fe18f5298fdcb79215d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk_atags.c b/arch/arm/mach-rockchip/rk_atags.c
index 58fbc654f4..865e724105 100644
--- a/arch/arm/mach-rockchip/rk_atags.c
+++ b/arch/arm/mach-rockchip/rk_atags.c
@@ -201,6 +201,9 @@ struct tag *atags_get_tag(u32 magic)
 {
 	struct tag *t;
 
+	if (!atags_is_available())
+		return NULL;
+
 	for_each_tag(t, (struct tag *)ATAGS_PHYS_BASE) {
 		if (bad_magic(t->hdr.magic)) {
 #if !CONFIG_IS_ENABLED(TINY_FRAMEWORK)
@@ -266,7 +269,7 @@ void atags_print_tag(struct tag *t)
 		printf("   version = 0x%x\n", t->u.serial.version);
 		printf("    enable = 0x%x\n", t->u.serial.enable);
 		printf("      addr = 0x%llx\n", t->u.serial.addr);
-		printf("  baudrate = 0x%x\n", t->u.serial.baudrate);
+		printf("  baudrate = %d\n", t->u.serial.baudrate);
 		printf("    m_mode = 0x%x\n", t->u.serial.m_mode);
 		for (i = 0; i < ARRAY_SIZE(t->u.serial.reserved); i++)
 			printf("    res[%d] = 0x%x\n", i, t->u.serial.reserved[i]);

commit 6b9c0415e61f8669c7996d049555124b00aaac05
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Wed Oct 10 10:12:20 2018 +0800

    video/drm: rgb: Add support rk1808
    
    Change-Id: I9e7636fadb10b9652ac69151a6c901735b90bc46
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_rgb.c b/drivers/video/drm/rockchip_rgb.c
index ce737953ad..9d58987124 100644
--- a/drivers/video/drm/rockchip_rgb.c
+++ b/drivers/video/drm/rockchip_rgb.c
@@ -16,38 +16,55 @@
 #include "rockchip_crtc.h"
 #include "rockchip_connector.h"
 
-#define PX30_GRF_PD_VO_CON1	0x0438
-#define PX30_LCDC_DCLK_INV(v)	HIWORD_UPDATE(v, 4, 4)
-#define PX30_RGB_SYNC_BYPASS(v)	HIWORD_UPDATE(v, 3, 3)
-#define PX30_RGB_VOP_SEL(v)	HIWORD_UPDATE(v, 2, 2)
+#define PX30_GRF_PD_VO_CON1		0x0438
+#define PX30_RGB_DATA_SYNC_BYPASS(v)	HIWORD_UPDATE(v, 3, 3)
+#define PX30_RGB_VOP_SEL(v)		HIWORD_UPDATE(v, 2, 2)
 
-struct rockchip_rgb_priv {
+#define RK1808_GRF_PD_VO_CON1		0x0444
+#define RK1808_RGB_DATA_SYNC_BYPASS(v)	HIWORD_UPDATE(v, 3, 3)
+
+struct rockchip_rgb;
+
+struct rockchip_rgb_funcs {
+	void (*enable)(struct rockchip_rgb *rgb, int pipe);
+	void (*disable)(struct rockchip_rgb *rgb);
+};
+
+struct rockchip_rgb {
 	struct regmap *grf;
+	const struct rockchip_rgb_funcs *funcs;
 };
 
-static int rockchip_rgb_enable(struct display_state *state)
+static inline struct rockchip_rgb *state_to_rgb(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
-	struct rockchip_rgb_priv *priv = dev_get_priv(conn_state->dev);
+
+	return dev_get_priv(conn_state->dev);
+}
+
+static int rockchip_rgb_connector_enable(struct display_state *state)
+{
+	struct rockchip_rgb *rgb = state_to_rgb(state);
 	struct crtc_state *crtc_state = &state->crtc_state;
 	int pipe = crtc_state->crtc_id;
 
-	if (!IS_ERR_OR_NULL(priv->grf)) {
-		regmap_write(priv->grf, PX30_GRF_PD_VO_CON1,
-			     PX30_RGB_VOP_SEL(pipe));
-		regmap_write(priv->grf, PX30_GRF_PD_VO_CON1,
-			     PX30_RGB_SYNC_BYPASS(1));
-	}
+	if (rgb->funcs && rgb->funcs->enable)
+		rgb->funcs->enable(rgb, pipe);
 
 	return 0;
 }
 
-static int rockchip_rgb_disable(struct display_state *state)
+static int rockchip_rgb_connector_disable(struct display_state *state)
 {
+	struct rockchip_rgb *rgb = state_to_rgb(state);
+
+	if (rgb->funcs && rgb->funcs->disable)
+		rgb->funcs->disable(rgb);
+
 	return 0;
 }
 
-static int rockchip_rgb_init(struct display_state *state)
+static int rockchip_rgb_connector_init(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
 
@@ -71,41 +88,94 @@ static int rockchip_rgb_init(struct display_state *state)
 	return 0;
 }
 
-static const struct rockchip_connector_funcs rockchip_rgb_funcs = {
-	.init = rockchip_rgb_init,
-	.enable = rockchip_rgb_enable,
-	.disable = rockchip_rgb_disable,
+static const struct rockchip_connector_funcs rockchip_rgb_connector_funcs = {
+	.init = rockchip_rgb_connector_init,
+	.enable = rockchip_rgb_connector_enable,
+	.disable = rockchip_rgb_connector_disable,
 };
 
 static int rockchip_rgb_probe(struct udevice *dev)
 {
-	struct rockchip_rgb_priv *priv = dev_get_priv(dev);
+	struct rockchip_rgb *rgb = dev_get_priv(dev);
+	const struct rockchip_connector *connector =
+		(const struct rockchip_connector *)dev_get_driver_data(dev);
 
-	priv->grf = syscon_get_regmap(dev_get_parent(dev));
+	rgb->funcs = connector->data;
+	rgb->grf = syscon_get_regmap(dev_get_parent(dev));
 
 	return 0;
 }
 
-static const struct rockchip_connector rockchip_rgb_data = {
-	 .funcs = &rockchip_rgb_funcs,
+static void px30_rgb_enable(struct rockchip_rgb *rgb, int pipe)
+{
+	regmap_write(rgb->grf, PX30_GRF_PD_VO_CON1,
+		     PX30_RGB_VOP_SEL(pipe));
+	regmap_write(rgb->grf, PX30_GRF_PD_VO_CON1,
+		     PX30_RGB_DATA_SYNC_BYPASS(1));
+}
+
+static void px30_rgb_disable(struct rockchip_rgb *rgb)
+{
+	regmap_write(rgb->grf, PX30_GRF_PD_VO_CON1,
+		     PX30_RGB_DATA_SYNC_BYPASS(0));
+}
+
+static const struct rockchip_rgb_funcs px30_rgb_funcs = {
+	.enable = px30_rgb_enable,
+	.disable = px30_rgb_disable,
+};
+
+static const struct rockchip_connector px30_rgb_driver_data = {
+	 .funcs = &rockchip_rgb_connector_funcs,
+	 .data = &px30_rgb_funcs,
+};
+
+static void rk1808_rgb_enable(struct rockchip_rgb *rgb, int pipe)
+{
+	regmap_write(rgb->grf, RK1808_GRF_PD_VO_CON1,
+		     RK1808_RGB_DATA_SYNC_BYPASS(1));
+}
+
+static void rk1808_rgb_disable(struct rockchip_rgb *rgb)
+{
+	regmap_write(rgb->grf, RK1808_GRF_PD_VO_CON1,
+		     RK1808_RGB_DATA_SYNC_BYPASS(0));
+}
+
+static const struct rockchip_rgb_funcs rk1808_rgb_funcs = {
+	.enable = rk1808_rgb_enable,
+	.disable = rk1808_rgb_disable,
+};
+
+static const struct rockchip_connector rk1808_rgb_driver_data = {
+	.funcs = &rockchip_rgb_connector_funcs,
+	.data = &rk1808_rgb_funcs,
+};
+
+static const struct rockchip_connector rockchip_rgb_driver_data = {
+	.funcs = &rockchip_rgb_connector_funcs,
 };
 
 static const struct udevice_id rockchip_rgb_ids[] = {
 	{
 		.compatible = "rockchip,px30-rgb",
-		.data = (ulong)&rockchip_rgb_data,
+		.data = (ulong)&px30_rgb_driver_data,
+	},
+	{
+		.compatible = "rockchip,rk1808-rgb",
+		.data = (ulong)&rk1808_rgb_driver_data,
 	},
 	{
 		.compatible = "rockchip,rk3066-rgb",
-		.data = (ulong)&rockchip_rgb_data,
+		.data = (ulong)&rockchip_rgb_driver_data,
 	},
 	{
 		.compatible = "rockchip,rk3308-rgb",
-		.data = (ulong)&rockchip_rgb_data,
+		.data = (ulong)&rockchip_rgb_driver_data,
 	},
 	{
 		.compatible = "rockchip,rv1108-rgb",
-		.data = (ulong)&rockchip_rgb_data,
+		.data = (ulong)&rockchip_rgb_driver_data,
 	},
 	{}
 };
@@ -115,5 +185,5 @@ U_BOOT_DRIVER(rockchip_rgb) = {
 	.id = UCLASS_DISPLAY,
 	.of_match = rockchip_rgb_ids,
 	.probe = rockchip_rgb_probe,
-	.priv_auto_alloc_size = sizeof(struct rockchip_rgb_priv),
+	.priv_auto_alloc_size = sizeof(struct rockchip_rgb),
 };

commit edfa0430072456d0cd44fe11cac125191e2ccb1f
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Tue Sep 18 17:26:08 2018 +0800

    rockchip: dts: rk3326: amend dmc node name
    
    Make sure dmc node name of uboot's dts is the same as kernel,
    so that uboot can update dmc node when do device binding after
    uboot relocate.
    
    Change-Id: I1e56e92433545470533260f10b713da3b6494970
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/arch/arm/dts/rk3326-evb.dts b/arch/arm/dts/rk3326-evb.dts
index 278a8ba6a0..fca2dac8be 100644
--- a/arch/arm/dts/rk3326-evb.dts
+++ b/arch/arm/dts/rk3326-evb.dts
@@ -17,7 +17,7 @@
 		stdout-path = &uart2;
 	};
 
-	dmc: dmc@20004000 {
+	dmc: dmc {
 		u-boot,dm-pre-reloc;
 		compatible = "rockchip,px30-dmc", "syscon";
 		reg = <0x0 0xff2a0000 0x0 0x1000>;

commit a43995868a8d4c4577cdef9e9c62aabfd1767086
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Thu Sep 13 18:23:30 2018 +0800

    drivers: rknand: register vendor ops interface
    
    Change-Id: Ia82a16f9fbc2c4600b4721018bf1b34ad0e85b51
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/drivers/rknand/rknand.c b/drivers/rknand/rknand.c
index 533e25ab13..49347d9a94 100644
--- a/drivers/rknand/rknand.c
+++ b/drivers/rknand/rknand.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <asm/arch/vendor.h>
 #include <dm.h>
 #include <dm/device-internal.h>
 #include <dm/lists.h>
@@ -93,6 +94,34 @@ ulong rknand_berase(struct udevice *udev, lbaint_t start,
 	return blkcnt;
 }
 
+int rkftl_nand_vendor_read(struct blk_desc *dev_desc,
+			   u32 index,
+			   u32 n_sec,
+			   void *p_data)
+{
+	int ret;
+
+	ret = ftl_vendor_read(index, n_sec, p_data);
+	if (!ret)
+		return n_sec;
+	else
+		return -EIO;
+}
+
+int rkftl_nand_vendor_write(struct blk_desc *dev_desc,
+			    u32 index,
+			    u32 n_sec,
+			    void *p_data)
+{
+	int ret;
+
+	ret = ftl_vendor_write(index, n_sec, p_data);
+	if (!ret)
+		return n_sec;
+	else
+		return -EIO;
+}
+
 int rknand_scan_namespace(void)
 {
 	struct uclass *uc;
@@ -162,6 +191,10 @@ static int rockchip_nand_probe(struct udevice *udev)
 		ndev->read = ftl_read;
 		ndev->write = ftl_write;
 		ndev->erase = ftl_discard;
+#ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
+		flash_vendor_dev_ops_register(rkftl_nand_vendor_read,
+					      rkftl_nand_vendor_write);
+#endif
 	}
 
 	return ret;
diff --git a/drivers/rknand/rknand.h b/drivers/rknand/rknand.h
index 5ab9940b39..10534943dd 100644
--- a/drivers/rknand/rknand.h
+++ b/drivers/rknand/rknand.h
@@ -58,5 +58,6 @@ u32 ftl_read(u8 lun, u32 start, u32 blkcnt, void *buffer);
 u32 ftl_discard(u8 lun, u32 start, u32 blkcnt);
 u32 ftl_get_density(u8 lun);
 int rk_ftl_init(u32 *reg_base);
-
+u32 ftl_vendor_read(u32 index, u32 nsec, void *buf);
+u32 ftl_vendor_write(u32 index, u32 nsec, void *buf);
 #endif /* __DRIVER_RKNAND_H__ */

commit 6a188a49ffaa7951ca54d90d75afb6cface59ff4
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Thu Sep 13 18:20:12 2018 +0800

    drivers: rknand: rkftl support spectek L84C/L84D/L05B NAND FLASH
    
    1. support spectek L84C/L84D/L05B NAND FLASH
    2. add vendor storage api
    
    Change-Id: Ib11cf39bd655032eb3f1fd164edc729a54a975b1
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/drivers/rknand/rk_ftl_arm_v7.S b/drivers/rknand/rk_ftl_arm_v7.S
index ebf23e322e..b16e02e93b 100644
--- a/drivers/rknand/rk_ftl_arm_v7.S
+++ b/drivers/rknand/rk_ftl_arm_v7.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2018-08-10
+ * date: 2018-09-5
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -4237,7 +4237,7 @@ ftl_map_blk_alloc_new_blk:
 	cmp	r3, r5
 	bhi	.L603
 	ldr	r1, .L605+8
-	mov	r2, #628
+	movw	r2, #629
 	ldr	r0, .L605+12
 	bl	printf
 	ldr	r1, .L605+16
@@ -4300,7 +4300,7 @@ select_l2p_ram_region:
 	bcc	.L616
 	cmp	r4, r2
 	bcc	.L609
-	movw	r2, #863
+	movw	r2, #855
 	ldr	r1, .L617+12
 	ldr	r0, .L617+16
 	bl	printf
@@ -4543,7 +4543,7 @@ make_superblock:
 	cmp	r2, r3
 	bcc	.L648
 	ldr	r1, .L660+4
-	movw	r2, #2613
+	mov	r2, #2544
 	ldr	r0, .L660+8
 	bl	printf
 	ldr	r1, .L660+12
@@ -5100,15 +5100,15 @@ FtlGcUpdatePage:
 	.word	.LANCHOR111
 	.word	.LANCHOR112
 	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
-	.section	.text.FtlGcRefreshBlock,"ax",%progbits
+	.section	.text.FtlGcRefreshOpenBlock,"ax",%progbits
 	.align	1
-	.global	FtlGcRefreshBlock
+	.global	FtlGcRefreshOpenBlock
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlGcRefreshBlock, %function
-FtlGcRefreshBlock:
+	.type	FtlGcRefreshOpenBlock, %function
+FtlGcRefreshOpenBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	ldr	ip, .L732+12
@@ -5157,21 +5157,68 @@ FtlGcRefreshBlock:
 	.word	.LANCHOR115
 	.word	.LANCHOR116
 	.word	.LANCHOR113
-	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
-	.section	.text.FtlGcRefreshOpenBlock,"ax",%progbits
+	.size	FtlGcRefreshOpenBlock, .-FtlGcRefreshOpenBlock
+	.section	.text.FtlGcRefreshBlock,"ax",%progbits
 	.align	1
-	.global	FtlGcRefreshOpenBlock
+	.global	FtlGcRefreshBlock
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlGcRefreshOpenBlock, %function
-FtlGcRefreshOpenBlock:
+	.type	FtlGcRefreshBlock, %function
+FtlGcRefreshBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	FtlGcRefreshBlock
-	.size	FtlGcRefreshOpenBlock, .-FtlGcRefreshOpenBlock
+	ldr	ip, .L744+12
+	push	{r4, r5, r6, r7, lr}
+	ldrh	lr, [ip]
+	cmp	lr, r0
+	beq	.L742
+	ldr	r6, .L744
+	ldrh	r7, [r6]
+	cmp	r0, r7
+	beq	.L742
+	ldr	r4, .L744+4
+	ldrh	r5, [r4]
+	cmp	r0, r5
+	beq	.L742
+	ldr	r2, .L744+8
+	ldrh	r1, [r2]
+	cmp	r0, r1
+	beq	.L742
+	movw	r3, #65535
+	cmp	lr, r3
+	bne	.L736
+	strh	r0, [ip]	@ movhi
+.L742:
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, pc}
+.L736:
+	cmp	r7, r3
+	bne	.L737
+	strh	r0, [r6]	@ movhi
+	b	.L742
+.L737:
+	cmp	r5, r3
+	bne	.L738
+	strh	r0, [r4]	@ movhi
+	b	.L742
+.L738:
+	cmp	r1, r3
+	bne	.L743
+	strh	r0, [r2]	@ movhi
+	b	.L742
+.L743:
+	mov	r0, #-1
+	pop	{r4, r5, r6, r7, pc}
+.L745:
+	.align	2
+.L744:
+	.word	.LANCHOR114
+	.word	.LANCHOR115
+	.word	.LANCHOR116
+	.word	.LANCHOR113
+	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
 	.section	.text.FtlGcMarkBadPhyBlk,"ax",%progbits
 	.align	1
 	.global	FtlGcMarkBadPhyBlk
@@ -5188,44 +5235,44 @@ FtlGcMarkBadPhyBlk:
 	bl	P2V_block_in_plane
 	mov	r5, r0
 	bl	FtlGcRefreshBlock
-	ldr	r3, .L743
+	ldr	r3, .L754
 	ldr	r3, [r3]
-	cbz	r3, .L736
-	ldr	r3, .L743+4
+	cbz	r3, .L747
+	ldr	r3, .L754+4
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r5, lsl #1]
 	cmp	r3, #39
 	itt	hi
 	subhi	r3, r3, #40
 	strhhi	r3, [r2, r5, lsl #1]	@ movhi
-.L736:
-	ldr	r2, .L743+8
+.L747:
+	ldr	r2, .L754+8
 	movs	r1, #0
-	ldr	r5, .L743+12
+	ldr	r5, .L754+12
 	ldrh	r3, [r2]
-.L737:
+.L748:
 	uxth	r0, r1
 	cmp	r3, r0
-	bhi	.L739
+	bhi	.L750
 	cmp	r3, #15
 	itttt	ls
 	addls	r1, r3, #1
 	strhls	r1, [r2]	@ movhi
-	ldrls	r2, .L743+12
+	ldrls	r2, .L754+12
 	strhls	r4, [r2, r3, lsl #1]	@ movhi
-	b	.L738
-.L739:
+	b	.L749
+.L750:
 	adds	r1, r1, #1
 	add	r0, r5, r1, lsl #1
 	ldrh	r0, [r0, #-2]
 	cmp	r0, r4
-	bne	.L737
-.L738:
+	bne	.L748
+.L749:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L744:
+.L755:
 	.align	2
-.L743:
+.L754:
 	.word	.LANCHOR28
 	.word	.LANCHOR79
 	.word	.LANCHOR117
@@ -5242,22 +5289,22 @@ FtlGcMarkBadPhyBlk:
 FtlGcReFreshBadBlk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L751
+	ldr	r3, .L762
 	push	{r4, lr}
 	ldrh	r3, [r3]
-	cbz	r3, .L746
-	ldr	r2, .L751+4
+	cbz	r3, .L757
+	ldr	r2, .L762+4
 	ldrh	r1, [r2]
 	movw	r2, #65535
 	cmp	r1, r2
-	bne	.L746
-	ldr	r4, .L751+8
+	bne	.L757
+	ldr	r4, .L762+8
 	ldrh	r2, [r4]
 	cmp	r2, r3
 	itt	cs
 	movcs	r3, #0
 	strhcs	r3, [r4]	@ movhi
-	ldr	r3, .L751+12
+	ldr	r3, .L762+12
 	ldrh	r2, [r4]
 	ldrh	r0, [r3, r2, lsl #1]
 	bl	P2V_block_in_plane
@@ -5265,12 +5312,12 @@ FtlGcReFreshBadBlk:
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-.L746:
+.L757:
 	movs	r0, #0
 	pop	{r4, pc}
-.L752:
+.L763:
 	.align	2
-.L751:
+.L762:
 	.word	.LANCHOR117
 	.word	.LANCHOR113
 	.word	.LANCHOR119
@@ -5288,17 +5335,17 @@ flash_boot_enter_slc_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L755
+	ldr	r3, .L766
 	ldr	r2, [r3]
-	ldr	r3, .L755+4
+	ldr	r3, .L766+4
 	cmp	r2, r3
-	bne	.L753
+	bne	.L764
 	b	flash_enter_slc_mode
-.L753:
+.L764:
 	bx	lr
-.L756:
+.L767:
 	.align	2
-.L755:
+.L766:
 	.word	.LANCHOR29
 	.word	1446522928
 	.size	flash_boot_enter_slc_mode, .-flash_boot_enter_slc_mode
@@ -5314,17 +5361,17 @@ flash_boot_exit_slc_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L759
+	ldr	r3, .L770
 	ldr	r2, [r3]
-	ldr	r3, .L759+4
+	ldr	r3, .L770+4
 	cmp	r2, r3
-	bne	.L757
+	bne	.L768
 	b	flash_exit_slc_mode
-.L757:
+.L768:
 	bx	lr
-.L760:
+.L771:
 	.align	2
-.L759:
+.L770:
 	.word	.LANCHOR29
 	.word	1446522928
 	.size	flash_boot_exit_slc_mode, .-flash_boot_exit_slc_mode
@@ -5338,7 +5385,7 @@ flash_boot_exit_slc_mode:
 FW_FlashBlockErase.constprop.41:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L762
+	ldr	r3, .L773
 	push	{r4, lr}
 	mov	r4, r0
 	movs	r0, #0
@@ -5356,9 +5403,9 @@ FW_FlashBlockErase.constprop.41:
 	bl	flash_boot_exit_slc_mode
 	uxtb	r0, r1
 	pop	{r4, pc}
-.L763:
+.L774:
 	.align	2
-.L762:
+.L773:
 	.word	.LANCHOR18
 	.size	FW_FlashBlockErase.constprop.41, .-FW_FlashBlockErase.constprop.41
 	.section	.text.ftl_memset,"ax",%progbits
@@ -5388,54 +5435,54 @@ BuildFlashLsbPageTable:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
 	mov	r4, r1
-	cbnz	r0, .L766
-	ldr	r3, .L803
-.L767:
+	cbnz	r0, .L777
+	ldr	r3, .L814
+.L778:
 	strh	r0, [r3, r0, lsl #1]	@ movhi
 	adds	r0, r0, #1
 	cmp	r0, #256
-	bne	.L767
-.L773:
+	bne	.L778
+.L784:
 	movs	r1, #255
 	mov	r2, #1024
-	ldr	r0, .L803+4
+	ldr	r0, .L814+4
 	uxth	r4, r4
 	bl	ftl_memset
-	ldr	r1, .L803
+	ldr	r1, .L814
 	movs	r3, #0
-	ldr	r0, .L803+4
-.L768:
+	ldr	r0, .L814+4
+.L779:
 	uxth	r2, r3
 	cmp	r4, r2
-	bhi	.L790
+	bhi	.L801
 	pop	{r4, pc}
-.L766:
+.L777:
 	cmp	r0, #1
-	bne	.L769
-	ldr	r1, .L803
+	bne	.L780
+	ldr	r1, .L814
 	movs	r3, #0
-.L772:
+.L783:
 	cmp	r3, #3
 	uxth	r2, r3
-	bls	.L770
+	bls	.L781
 	tst	r2, #1
 	ite	ne
 	movne	r0, #3
 	moveq	r0, #2
 	rsb	r2, r0, r2, lsl #1
 	uxth	r2, r2
-.L770:
+.L781:
 	strh	r2, [r1, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	cmp	r3, #256
-	bne	.L772
-	b	.L773
-.L769:
+	bne	.L783
+	b	.L784
+.L780:
 	cmp	r0, #2
-	bne	.L774
-	ldr	r1, .L803
+	bne	.L785
+	ldr	r1, .L814
 	movs	r2, #0
-.L776:
+.L787:
 	uxth	r3, r2
 	cmp	r2, #1
 	ittt	hi
@@ -5445,34 +5492,34 @@ BuildFlashLsbPageTable:
 	strh	r3, [r1, r2, lsl #1]	@ movhi
 	adds	r2, r2, #1
 	cmp	r2, #256
-	bne	.L776
-	b	.L773
-.L774:
+	bne	.L787
+	b	.L784
+.L785:
 	cmp	r0, #3
-	bne	.L777
-	ldr	r1, .L803
+	bne	.L788
+	ldr	r1, .L814
 	movs	r3, #0
-.L780:
+.L791:
 	cmp	r3, #5
 	uxth	r2, r3
-	bls	.L778
+	bls	.L789
 	tst	r2, #1
 	ite	ne
 	movne	r0, #5
 	moveq	r0, #4
 	rsb	r2, r0, r2, lsl #1
 	uxth	r2, r2
-.L778:
+.L789:
 	strh	r2, [r1, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	cmp	r3, #256
-	bne	.L780
-	b	.L773
-.L777:
+	bne	.L791
+	b	.L784
+.L788:
 	cmp	r0, #4
 	mov	r3, #0
-	bne	.L781
-	ldr	r2, .L803
+	bne	.L792
+	ldr	r2, .L814
 	strh	r3, [r2]	@ movhi
 	movs	r3, #1
 	strh	r3, [r2, #2]	@ movhi
@@ -5487,7 +5534,7 @@ BuildFlashLsbPageTable:
 	movs	r3, #8
 	strh	r0, [r2, #8]	@ movhi
 	strh	r3, [r2, #14]!	@ movhi
-.L783:
+.L794:
 	tst	r3, #1
 	ite	ne
 	movne	r1, #7
@@ -5497,56 +5544,56 @@ BuildFlashLsbPageTable:
 	uxth	r3, r3
 	strh	r1, [r2, #2]!	@ movhi
 	cmp	r3, #256
-	bne	.L783
-	b	.L773
-.L781:
+	bne	.L794
+	b	.L784
+.L792:
 	cmp	r0, #5
-	bne	.L784
-	ldr	r2, .L803
-.L785:
+	bne	.L795
+	ldr	r2, .L814
+.L796:
 	strh	r3, [r2, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	cmp	r3, #16
-	bne	.L785
-	ldr	r2, .L803+8
-.L786:
+	bne	.L796
+	ldr	r2, .L814+8
+.L797:
 	strh	r3, [r2, #2]!	@ movhi
 	adds	r3, r3, #2
 	uxth	r3, r3
 	cmp	r3, #496
-	bne	.L786
-	b	.L773
-.L784:
+	bne	.L797
+	b	.L784
+.L795:
 	cmp	r0, #6
-	bne	.L773
-	ldr	r0, .L803
+	bne	.L784
+	ldr	r0, .L814
 	mov	r1, r3
-.L789:
+.L800:
 	cmp	r1, #5
 	uxth	r2, r1
-	bls	.L787
+	bls	.L798
 	tst	r2, #1
 	ite	ne
 	movne	r2, #12
 	moveq	r2, #10
 	subs	r2, r3, r2
 	uxth	r2, r2
-.L787:
+.L798:
 	strh	r2, [r0, r1, lsl #1]	@ movhi
 	adds	r1, r1, #1
 	cmp	r1, #256
 	add	r3, r3, #3
 	uxth	r3, r3
-	bne	.L789
-	b	.L773
-.L790:
+	bne	.L800
+	b	.L784
+.L801:
 	ldrh	r2, [r1, r3, lsl #1]
 	adds	r3, r3, #1
 	strh	r2, [r0, r2, lsl #1]	@ movhi
-	b	.L768
-.L804:
+	b	.L779
+.L815:
 	.align	2
-.L803:
+.L814:
 	.word	.LANCHOR16
 	.word	.LANCHOR120
 	.word	.LANCHOR16+30
@@ -5564,92 +5611,92 @@ FlashDieInfoInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #0
-	ldr	r2, .L823
-	ldr	r4, .L823+4
+	ldr	r2, .L834
+	ldr	r4, .L834+4
 	strb	r3, [r2]
 	str	r2, [sp]
 	strb	r3, [r4]
-	ldr	r3, .L823+8
-	ldr	r7, .L823+12
+	ldr	r3, .L834+8
+	ldr	r7, .L834+12
 	ldrh	r3, [r3, #10]
 	cmp	r3, #256
-	bls	.L806
+	bls	.L817
 	mov	r3, #512
-.L822:
+.L833:
 	movs	r2, #8
 	movs	r1, #0
-	ldr	r0, .L823+16
+	ldr	r0, .L834+16
 	movs	r6, #0
 	str	r3, [r7]
 	bl	ftl_memset
 	movs	r2, #32
 	movs	r1, #0
-	ldr	r0, .L823+20
+	ldr	r0, .L834+20
 	bl	ftl_memset
 	movs	r2, #128
 	movs	r1, #0
-	ldr	r0, .L823+24
+	ldr	r0, .L834+24
 	bl	ftl_memset
-	ldr	r3, .L823+28
-	ldr	fp, .L823+36
+	ldr	r3, .L834+28
+	ldr	fp, .L834+36
 	ldr	r5, [r3]
-	ldr	r3, .L823+16
+	ldr	r3, .L834+16
 	ldrb	r10, [r5]	@ zero_extendqisi2
 	add	r8, r5, #1
-.L810:
+.L821:
 	mov	r2, r10
 	add	r1, fp, r6, lsl #3
 	mov	r0, r8
 	str	r3, [sp, #4]
 	bl	FlashMemCmp8
 	ldr	r3, [sp, #4]
-	cbnz	r0, .L809
+	cbnz	r0, .L820
 	ldrb	r2, [r4]	@ zero_extendqisi2
-	ldr	r1, .L823+20
+	ldr	r1, .L834+20
 	strb	r6, [r3, r2]
 	str	r0, [r1, r2, lsl #2]
 	adds	r1, r2, #1
 	strb	r1, [r4]
-.L809:
+.L820:
 	adds	r6, r6, #1
 	cmp	r6, #4
-	bne	.L810
+	bne	.L821
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	ldr	r2, [sp]
 	strb	r3, [r2]
 	ldrb	r3, [r5, #8]	@ zero_extendqisi2
 	cmp	r3, #2
-	beq	.L811
-.L815:
+	beq	.L822
+.L826:
 	ldrh	r2, [r5, #14]
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	smulbb	r3, r3, r2
 	ldrb	r2, [r5, #13]	@ zero_extendqisi2
 	smulbb	r3, r3, r2
-	ldr	r2, .L823+32
+	ldr	r2, .L834+32
 	strh	r3, [r2]	@ movhi
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L806:
+.L817:
 	cmp	r3, #128
 	it	hi
 	movhi	r3, #256
-	b	.L822
-.L811:
+	b	.L833
+.L822:
 	ldr	fp, [r7]
 	movs	r6, #0
-	ldr	r7, .L823+20
-	ldr	r3, .L823+16
-.L814:
+	ldr	r7, .L834+20
+	ldr	r3, .L834+16
+.L825:
 	str	r3, [sp]
 	mov	r2, r10
-	ldr	r3, .L823+36
+	ldr	r3, .L834+36
 	mov	r0, r8
 	add	r1, r3, r6, lsl #3
 	bl	FlashMemCmp8
 	ldr	r3, [sp]
-	cbnz	r0, .L812
+	cbnz	r0, .L823
 	ldrh	r2, [r5, #14]
 	ldrb	r1, [r4]	@ zero_extendqisi2
 	and	r0, r2, #65280
@@ -5658,21 +5705,21 @@ FlashDieInfoInit:
 	muls	r2, r0, r2
 	str	r2, [r7, r1, lsl #2]
 	ldrb	r0, [r5, #23]	@ zero_extendqisi2
-	cbz	r0, .L813
+	cbz	r0, .L824
 	lsls	r2, r2, #1
 	str	r2, [r7, r1, lsl #2]
-.L813:
+.L824:
 	adds	r2, r1, #1
 	strb	r6, [r3, r1]
 	strb	r2, [r4]
-.L812:
+.L823:
 	adds	r6, r6, #1
 	cmp	r6, #4
-	bne	.L814
-	b	.L815
-.L824:
+	bne	.L825
+	b	.L826
+.L835:
 	.align	2
-.L823:
+.L834:
 	.word	.LANCHOR121
 	.word	.LANCHOR25
 	.word	.LANCHOR31
@@ -5700,10 +5747,10 @@ ReadFlashInfo:
 	movs	r1, #0
 	mov	r4, r0
 	bl	ftl_memset
-	ldr	r3, .L828
+	ldr	r3, .L839
 	movs	r2, #0
 	ldr	r1, [r3]
-	ldr	r3, .L828+4
+	ldr	r3, .L839+4
 	ldrb	r0, [r1, #9]	@ zero_extendqisi2
 	ldr	r3, [r3]
 	smulbb	r3, r3, r0
@@ -5711,10 +5758,10 @@ ReadFlashInfo:
 	strb	r3, [r4, #4]
 	lsrs	r3, r3, #8
 	strb	r3, [r4, #5]
-	ldr	r3, .L828+8
+	ldr	r3, .L839+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	strb	r3, [r4, #7]
-	ldr	r3, .L828+12
+	ldr	r3, .L839+12
 	ldrb	r5, [r3]	@ zero_extendqisi2
 	strb	r5, [r4]
 	ldrb	r5, [r3, #1]	@ zero_extendqisi2
@@ -5728,28 +5775,28 @@ ReadFlashInfo:
 	movs	r3, #32
 	strb	r3, [r4, #8]
 	ldrb	r3, [r1, #7]	@ zero_extendqisi2
-	ldr	r0, .L828+16
+	ldr	r0, .L839+16
 	strb	r2, [r4, #10]
 	strb	r3, [r4, #9]
-	ldr	r3, .L828+20
+	ldr	r3, .L839+20
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	mov	r3, r2
-.L826:
+.L837:
 	uxtb	r2, r3
 	cmp	r1, r2
-	bhi	.L827
+	bhi	.L838
 	pop	{r4, r5, r6, pc}
-.L827:
+.L838:
 	ldrb	r2, [r3, r0]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	ldrb	r6, [r4, #10]	@ zero_extendqisi2
 	lsl	r2, r5, r2
 	orrs	r2, r2, r6
 	strb	r2, [r4, #10]
-	b	.L826
-.L829:
+	b	.L837
+.L840:
 	.align	2
-.L828:
+.L839:
 	.word	.LANCHOR18
 	.word	.LANCHOR3
 	.word	.LANCHOR33
@@ -5768,35 +5815,35 @@ ReadFlashInfo:
 FtlBbt2Bitmap:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L836
+	ldr	r3, .L847
 	push	{r4, r5, r6, r7, r8, lr}
 	mov	r5, r0
-	ldr	r7, .L836+4
+	ldr	r7, .L847+4
 	mov	r6, r1
 	subs	r4, r5, #2
 	addw	r5, r5, #1022
 	ldrh	r2, [r3]
 	movs	r1, #0
-	ldr	r8, .L836+20
+	ldr	r8, .L847+20
 	mov	r0, r6
 	lsls	r2, r2, #2
 	bl	ftl_memset
-.L833:
+.L844:
 	ldrh	r3, [r4, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L830
+	beq	.L841
 	ldrh	r2, [r7]
 	cmp	r2, r3
-	bhi	.L832
+	bhi	.L843
 	mov	r1, r8
 	movs	r2, #79
-	ldr	r0, .L836+8
+	ldr	r0, .L847+8
 	bl	printf
-	ldr	r1, .L836+12
-	ldr	r0, .L836+16
+	ldr	r1, .L847+12
+	ldr	r0, .L847+16
 	bl	printf
-.L832:
+.L843:
 	ldrh	r3, [r4, #2]!
 	movs	r2, #1
 	cmp	r5, r4
@@ -5806,12 +5853,12 @@ FtlBbt2Bitmap:
 	ldr	r2, [r6, r1, lsl #2]
 	orr	r2, r2, r3
 	str	r2, [r6, r1, lsl #2]
-	bne	.L833
-.L830:
+	bne	.L844
+.L841:
 	pop	{r4, r5, r6, r7, r8, pc}
-.L837:
+.L848:
 	.align	2
-.L836:
+.L847:
 	.word	.LANCHOR123
 	.word	.LANCHOR51
 	.word	.LC5
@@ -5831,7 +5878,7 @@ FtlBbtMemInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r0, .L839
+	ldr	r0, .L850
 	movw	r3, #65535
 	movs	r2, #16
 	movs	r1, #255
@@ -5840,9 +5887,9 @@ FtlBbtMemInit:
 	strh	r3, [r0, #6]	@ movhi
 	adds	r0, r0, #12
 	b	ftl_memset
-.L840:
+.L851:
 	.align	2
-.L839:
+.L850:
 	.word	.LANCHOR75
 	.size	FtlBbtMemInit, .-FtlBbtMemInit
 	.section	.text.FtlFreeSysBlkQueueInit,"ax",%progbits
@@ -5856,7 +5903,7 @@ FtlBbtMemInit:
 FtlFreeSysBlkQueueInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L842
+	ldr	r3, .L853
 	mov	r2, #2048
 	push	{r4, lr}
 	movs	r4, #0
@@ -5869,9 +5916,9 @@ FtlFreeSysBlkQueueInit:
 	bl	ftl_memset
 	mov	r0, r4
 	pop	{r4, pc}
-.L843:
+.L854:
 	.align	2
-.L842:
+.L853:
 	.word	.LANCHOR76
 	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
 	.section	.text.ftl_free_no_use_map_blk,"ax",%progbits
@@ -5890,88 +5937,96 @@ ftl_free_no_use_map_blk:
 	mov	r4, r0
 	ldr	r5, [r0, #20]
 	movs	r1, #0
-	ldr	r10, [r0, #12]
+	ldr	r7, [r0, #12]
 	lsls	r2, r2, #1
 	ldr	r6, [r0, #24]
 	mov	r0, r5
 	bl	ftl_memset
 	movs	r3, #0
-.L845:
+.L856:
 	ldrh	r1, [r4, #6]
 	uxth	r2, r3
 	cmp	r1, r2
-	bhi	.L849
-	ldrh	r3, [r5]
+	bhi	.L860
+	ldr	r3, .L875
 	movs	r6, #0
-	ldr	r2, .L858
-	mov	fp, r6
-.L850:
-	ldrh	r0, [r4, #10]
-	uxth	r1, r6
-	cmp	r0, r1
-	bhi	.L854
-	mov	r0, fp
+	mov	r10, r6
+	ldrh	r2, [r3]
+	ldrh	r3, [r4]
+	strh	r2, [r5, r3, lsl #1]	@ movhi
+	mov	r2, r6
+	ldrh	fp, [r5]
+.L861:
+	ldrh	r3, [r4, #10]
+	uxth	ip, r6
+	cmp	r3, ip
+	bhi	.L865
+	mov	r0, r10
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L849:
+.L860:
 	uxth	r2, r3
 	ldr	r1, [r6, r2, lsl #2]
 	movs	r2, #0
 	ubfx	r1, r1, #10, #16
-.L846:
-	ldrh	r7, [r4, #10]
+.L857:
+	ldrh	ip, [r4, #10]
 	uxth	r0, r2
-	cmp	r7, r0
-	bhi	.L848
+	cmp	ip, r0
+	bhi	.L859
 	adds	r3, r3, #1
-	b	.L845
-.L848:
+	b	.L856
+.L859:
 	uxth	r0, r2
+	ldrh	ip, [r7, r0, lsl #1]
+	cmp	ip, r1
+	bne	.L858
+	cbz	r1, .L858
+	ldrh	ip, [r5, r0, lsl #1]
+	add	ip, ip, #1
+	strh	ip, [r5, r0, lsl #1]	@ movhi
+.L858:
 	adds	r2, r2, #1
-	ldrh	r7, [r10, r0, lsl #1]
-	cmp	r7, r1
-	ittt	eq
-	ldrheq	r7, [r5, r0, lsl #1]
-	addeq	r7, r7, #1
-	strheq	r7, [r5, r0, lsl #1]	@ movhi
-	b	.L846
-.L854:
-	ldrh	r0, [r4]
-	uxth	r7, r6
-	cmp	r0, r1
-	bne	.L851
-	ldrh	r0, [r2]
-	ldrh	ip, [r4, #2]
-	cmp	ip, r0
-	it	cc
-	strhcc	r0, [r5, r7, lsl #1]	@ movhi
-.L851:
-	ldrh	r8, [r5, r7, lsl #1]
-	cmp	r3, r8
-	itt	hi
-	movhi	fp, r1
-	movhi	r3, r8
-	cmp	r8, #0
-	bne	.L853
-	ldrh	r0, [r10, r7, lsl #1]
-	cbz	r0, .L853
+	b	.L857
+.L865:
+	uxth	r1, r6
+	ldrh	r3, [r5, r1, lsl #1]
+	lsl	r8, r1, #1
+	cmp	fp, r3
+	bls	.L862
+	ldrh	r0, [r7, r1, lsl #1]
+	add	r8, r8, r7
+	cbnz	r0, .L863
+.L864:
+	adds	r6, r6, #1
+	b	.L861
+.L862:
+	cmp	r3, #0
+	bne	.L864
+	ldrh	r0, [r7, r1, lsl #1]
+	add	r8, r8, r7
+	cmp	r0, #0
+	beq	.L864
+.L866:
 	movs	r1, #1
 	str	r2, [sp, #4]
-	str	r3, [sp]
 	bl	FtlFreeSysBlkQueueIn
-	strh	r8, [r10, r7, lsl #1]	@ movhi
 	ldr	r2, [sp, #4]
-	ldrh	r1, [r4, #8]
-	ldr	r3, [sp]
-	subs	r1, r1, #1
-	strh	r1, [r4, #8]	@ movhi
-.L853:
-	adds	r6, r6, #1
-	b	.L850
-.L859:
+	strh	r2, [r8]	@ movhi
+	ldrh	r3, [r4, #8]
+	subs	r3, r3, #1
+	strh	r3, [r4, #8]	@ movhi
+	b	.L864
+.L863:
+	mov	r10, ip
+	mov	fp, r3
+	cmp	r3, #0
+	beq	.L866
+	b	.L864
+.L876:
 	.align	2
-.L858:
+.L875:
 	.word	.LANCHOR54
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.section	.text.FtlL2PDataInit,"ax",%progbits
@@ -5987,14 +6042,14 @@ FtlL2PDataInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r1, #0
-	ldr	r5, .L863
-	ldr	r4, .L863+4
+	ldr	r5, .L880
+	ldr	r4, .L880+4
 	ldr	r2, [r5]
-	ldr	r7, .L863+8
-	ldr	r6, .L863+12
+	ldr	r7, .L880+8
+	ldr	r6, .L880+12
 	ldr	r0, [r4]
 	lsls	r2, r2, #1
-	ldr	r8, .L863+44
+	ldr	r8, .L880+44
 	bl	ftl_memset
 	ldrh	r3, [r7]
 	movs	r1, #255
@@ -6002,7 +6057,7 @@ FtlL2PDataInit:
 	ldr	r0, [r8]
 	muls	r2, r3, r2
 	bl	ftl_memset
-	ldr	r3, .L863+16
+	ldr	r3, .L880+16
 	movw	r0, #65535
 	ldrh	r1, [r6]
 	ldr	ip, [r8]
@@ -6013,48 +6068,47 @@ FtlL2PDataInit:
 	adds	r1, r2, r3
 	movs	r3, #0
 	mov	lr, r3
-.L861:
+.L878:
 	adds	r2, r2, #12
 	adds	r6, r3, r7
 	cmp	r2, r1
-	bne	.L862
-	ldr	r3, .L863+20
+	bne	.L879
+	ldr	r3, .L880+20
 	ldr	r2, [r5]
 	strh	r0, [r3, #2]	@ movhi
 	strh	r2, [r3, #10]	@ movhi
 	movw	r2, #61634
 	strh	r2, [r3, #4]	@ movhi
-	ldr	r2, .L863+24
+	ldr	r2, .L880+24
 	strh	r0, [r3]	@ movhi
-	strh	r0, [r3, #40]	@ movhi
 	ldrh	r2, [r2]
 	strh	r2, [r3, #8]	@ movhi
-	ldr	r2, .L863+28
+	ldr	r2, .L880+28
 	ldrh	r2, [r2]
 	strh	r2, [r3, #6]	@ movhi
-	ldr	r2, .L863+32
+	ldr	r2, .L880+32
 	ldr	r2, [r2]
 	str	r2, [r3, #12]
-	ldr	r2, .L863+36
+	ldr	r2, .L880+36
 	ldr	r2, [r2]
 	str	r2, [r3, #16]
 	ldr	r2, [r4]
 	str	r2, [r3, #20]
-	ldr	r2, .L863+40
+	ldr	r2, .L880+40
 	ldr	r2, [r2]
 	str	r2, [r3, #24]
 	pop	{r4, r5, r6, r7, r8, pc}
-.L862:
+.L879:
 	bic	r3, r3, #3
 	str	lr, [r2, #-8]
 	add	r3, r3, ip
 	strh	r0, [r2, #-12]	@ movhi
 	str	r3, [r2, #-4]
 	mov	r3, r6
-	b	.L861
-.L864:
+	b	.L878
+.L881:
 	.align	2
-.L863:
+.L880:
 	.word	.LANCHOR65
 	.word	.LANCHOR125
 	.word	.LANCHOR58
@@ -6081,57 +6135,57 @@ FtlVariablesInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #0
-	ldr	r3, .L866
+	ldr	r3, .L883
 	movw	r2, #65535
 	mov	r1, r4
-	ldr	r5, .L866+4
+	ldr	r5, .L883+4
 	str	r4, [r3]
-	ldr	r3, .L866+8
+	ldr	r3, .L883+8
 	strh	r2, [r3]	@ movhi
 	mov	r2, #-1
-	ldr	r3, .L866+12
+	ldr	r3, .L883+12
 	str	r4, [r3]
-	ldr	r3, .L866+16
+	ldr	r3, .L883+16
 	str	r4, [r3]
-	ldr	r3, .L866+20
+	ldr	r3, .L883+20
 	str	r2, [r3]
-	ldr	r3, .L866+24
+	ldr	r3, .L883+24
 	str	r4, [r3]
-	ldr	r3, .L866+28
+	ldr	r3, .L883+28
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L866+32
+	ldr	r3, .L883+32
 	ldrh	r2, [r3]
-	ldr	r3, .L866+36
+	ldr	r3, .L883+36
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L866+40
+	ldr	r3, .L883+40
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L866+44
+	ldr	r3, .L883+44
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	mov	r1, r4
 	movs	r2, #48
-	ldr	r0, .L866+48
+	ldr	r0, .L883+48
 	bl	ftl_memset
 	mov	r2, #512
 	mov	r1, r4
-	ldr	r0, .L866+52
+	ldr	r0, .L883+52
 	bl	ftl_memset
 	bl	FtlGcBufInit
 	bl	FtlL2PDataInit
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L867:
+.L884:
 	.align	2
-.L866:
+.L883:
 	.word	.LANCHOR132
 	.word	.LANCHOR41
 	.word	.LANCHOR133
@@ -6158,11 +6212,11 @@ FtlVariablesInit:
 SupperBlkListInit:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L879
+	ldr	r3, .L896
 	movs	r2, #6
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r1, #0
-	ldr	r6, .L879+4
+	ldr	r6, .L896+4
 	sub	sp, sp, #24
 	movs	r4, #0
 	ldrh	r3, [r3]
@@ -6172,39 +6226,39 @@ SupperBlkListInit:
 	mov	r10, r6
 	muls	r2, r3, r2
 	bl	ftl_memset
-	ldr	r3, .L879+8
-	ldr	r2, .L879+12
-	ldr	r1, .L879+16
+	ldr	r3, .L896+8
+	ldr	r2, .L896+12
+	ldr	r1, .L896+16
 	str	r4, [r3]
-	ldr	r3, .L879+20
+	ldr	r3, .L896+20
 	strh	r4, [r2]	@ movhi
 	strh	r4, [r1]	@ movhi
 	str	r4, [r3]
-	ldr	r3, .L879+24
+	ldr	r3, .L896+24
 	str	r2, [sp, #8]
 	str	r4, [r3]
-	ldr	r3, .L879+28
+	ldr	r3, .L896+28
 	mov	fp, r3
 	strh	r4, [r3]	@ movhi
-.L869:
-	ldr	r3, .L879+32
+.L886:
+	ldr	r3, .L896+32
 	sxth	r7, r4
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	bge	.L876
-	ldr	r3, .L879+36
+	bge	.L893
+	ldr	r3, .L896+36
 	uxth	r1, r4
 	str	r1, [sp, #12]
 	ldrh	r2, [r3]
-	ldr	r3, .L879+40
+	ldr	r3, .L896+40
 	ldrh	r3, [r3]
 	str	r3, [sp, #4]
 	movs	r3, #0
 	mov	r6, r3
-	b	.L877
-.L871:
+	b	.L894
+.L888:
 	str	r3, [sp, #20]
-	ldr	r3, .L879+44
+	ldr	r3, .L896+44
 	ldr	r1, [sp, #12]
 	str	r2, [sp, #16]
 	ldrb	r0, [r3, r0]	@ zero_extendqisi2
@@ -6212,85 +6266,85 @@ SupperBlkListInit:
 	bl	FtlBbmIsBadBlock
 	ldr	r2, [sp, #16]
 	ldr	r3, [sp, #20]
-	cbnz	r0, .L870
+	cbnz	r0, .L887
 	ldr	r1, [sp, #4]
 	add	r6, r6, r1
 	sxth	r6, r6
-.L870:
+.L887:
 	adds	r3, r3, #1
-.L877:
+.L894:
 	sxth	r0, r3
 	cmp	r0, r2
-	blt	.L871
+	blt	.L888
 	lsls	r3, r7, #1
-	cbz	r6, .L872
+	cbz	r6, .L889
 	mov	r1, r6
 	str	r3, [sp, #4]
 	mov	r0, #32768
 	bl	__aeabi_idiv
 	ldr	r3, [sp, #4]
 	sxth	r6, r0
-.L873:
+.L890:
 	ldr	r2, [r10]
 	add	r3, r3, r7
 	add	r2, r2, r3, lsl #1
-	ldr	r3, .L879+48
+	ldr	r3, .L896+48
 	strh	r6, [r2, #4]	@ movhi
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	beq	.L874
-	ldr	r3, .L879+52
+	beq	.L891
+	ldr	r3, .L896+52
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	beq	.L874
-	ldr	r3, .L879+56
+	beq	.L891
+	ldr	r3, .L896+56
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	beq	.L874
-	ldr	r3, .L879+60
+	beq	.L891
+	ldr	r3, .L896+60
 	uxth	r0, r4
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r7, lsl #1]
-	cbnz	r3, .L875
+	cbnz	r3, .L892
 	add	r8, r8, #1
 	uxth	r8, r8
 	bl	INSERT_FREE_LIST
-.L874:
+.L891:
 	adds	r4, r4, #1
-	b	.L869
-.L872:
-	ldr	r2, .L879+60
+	b	.L886
+.L889:
+	ldr	r2, .L896+60
 	movw	r1, #65535
 	ldr	r2, [r2]
 	strh	r1, [r2, r7, lsl #1]	@ movhi
-	b	.L873
-.L875:
+	b	.L890
+.L892:
 	adds	r5, r5, #1
 	uxth	r5, r5
 	bl	INSERT_DATA_LIST
-	b	.L874
-.L876:
+	b	.L891
+.L893:
 	ldr	r2, [sp, #8]
 	strh	r8, [fp]	@ movhi
 	strh	r5, [r2]	@ movhi
 	add	r5, r5, r8
 	cmp	r3, r5
-	bge	.L878
-	ldr	r1, .L879+64
-	movw	r2, #2683
-	ldr	r0, .L879+68
+	bge	.L895
+	ldr	r1, .L896+64
+	movw	r2, #2614
+	ldr	r0, .L896+68
 	bl	printf
-	ldr	r1, .L879+72
-	ldr	r0, .L879+76
+	ldr	r1, .L896+72
+	ldr	r0, .L896+76
 	bl	printf
-.L878:
+.L895:
 	movs	r0, #0
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L880:
+.L897:
 	.align	2
-.L879:
+.L896:
 	.word	.LANCHOR41
 	.word	.LANCHOR82
 	.word	.LANCHOR88
@@ -6323,16 +6377,16 @@ SupperBlkListInit:
 FtlGcPageVarInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L882
+	ldr	r2, .L899
 	movs	r3, #0
 	push	{r4, lr}
 	movs	r1, #255
-	ldr	r4, .L882+4
+	ldr	r4, .L899+4
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L882+8
+	ldr	r2, .L899+8
 	strh	r3, [r2]	@ movhi
 	ldrh	r2, [r4]
-	ldr	r3, .L882+12
+	ldr	r3, .L899+12
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
@@ -6340,14 +6394,14 @@ FtlGcPageVarInit:
 	movs	r2, #12
 	movs	r1, #255
 	muls	r2, r3, r2
-	ldr	r3, .L882+16
+	ldr	r3, .L899+16
 	ldr	r0, [r3]
 	bl	ftl_memset
 	pop	{r4, lr}
 	b	FtlGcBufInit
-.L883:
+.L900:
 	.align	2
-.L882:
+.L899:
 	.word	.LANCHOR110
 	.word	.LANCHOR55
 	.word	.LANCHOR111
@@ -6368,13 +6422,13 @@ idb_init:
 	push	{r3, lr}
 	mov	r2, #262144
 	movs	r1, #0
-	ldr	r0, .L885
+	ldr	r0, .L902
 	bl	ftl_memset
 	movs	r0, #0
 	pop	{r3, pc}
-.L886:
+.L903:
 	.align	2
-.L885:
+.L902:
 	.word	idb_buf
 	.size	idb_init, .-idb_init
 	.section	.text.ftl_memcpy,"ax",%progbits
@@ -6404,13 +6458,13 @@ FlashReadIdbData:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	mov	r2, #2048
-	ldr	r1, .L889
+	ldr	r1, .L906
 	bl	ftl_memcpy
 	movs	r0, #0
 	pop	{r3, pc}
-.L890:
+.L907:
 	.align	2
-.L889:
+.L906:
 	.word	.LANCHOR141
 	.size	FlashReadIdbData, .-FlashReadIdbData
 	.section	.text.FlashLoadPhyInfoInRam,"ax",%progbits
@@ -6426,52 +6480,52 @@ FlashLoadPhyInfoInRam:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r6, #0
-	ldr	r7, .L899
-	ldr	r5, .L899+4
-.L894:
+	ldr	r7, .L916
+	ldr	r5, .L916+4
+.L911:
 	ldrb	r2, [r7, #-1]	@ zero_extendqisi2
 	mov	r1, r5
 	mov	r0, r7
 	lsl	r8, r6, #5
 	bl	FlashMemCmp8
 	mov	r4, r0
-	cbnz	r0, .L892
-	ldr	r5, .L899+8
+	cbnz	r0, .L909
+	ldr	r5, .L916+8
 	mov	r3, r4
-	ldr	r2, .L899+12
+	ldr	r2, .L916+12
 	add	r5, r5, r8
 	ldrb	r0, [r5, #22]	@ zero_extendqisi2
 	mov	r1, r2
-.L893:
+.L910:
 	lsls	r6, r3, #5
 	ldrb	r6, [r6, r2]	@ zero_extendqisi2
 	cmp	r6, r0
-	beq	.L896
+	beq	.L913
 	adds	r3, r3, #1
 	cmp	r3, #4
-	bne	.L893
-.L896:
+	bne	.L910
+.L913:
 	add	r1, r1, r3, lsl #5
 	movs	r2, #32
-	ldr	r0, .L899+16
+	ldr	r0, .L916+16
 	bl	ftl_memcpy
 	movs	r2, #32
 	mov	r1, r5
-	ldr	r0, .L899+20
+	ldr	r0, .L916+20
 	bl	ftl_memcpy
-	b	.L891
-.L892:
+	b	.L908
+.L909:
 	adds	r6, r6, #1
 	adds	r7, r7, #32
 	cmp	r6, #77
-	bne	.L894
+	bne	.L911
 	mov	r4, #-1
-.L891:
+.L908:
 	mov	r0, r4
 	pop	{r4, r5, r6, r7, r8, pc}
-.L900:
+.L917:
 	.align	2
-.L899:
+.L916:
 	.word	.LANCHOR142+1
 	.word	.LANCHOR22
 	.word	.LANCHOR142
@@ -6492,15 +6546,15 @@ ftl_memcpy32:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	movs	r3, #0
 	push	{r4, lr}
-.L902:
+.L919:
 	cmp	r3, r2
-	bne	.L903
+	bne	.L920
 	pop	{r4, pc}
-.L903:
+.L920:
 	ldr	r4, [r1, r3, lsl #2]
 	str	r4, [r0, r3, lsl #2]
 	adds	r3, r3, #1
-	b	.L902
+	b	.L919
 	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.NandcCopy1KB,"ax",%progbits
 	.align	1
@@ -6520,15 +6574,15 @@ NandcCopy1KB:
 	add	r6, r0, #512
 	add	r0, r2, r4, lsl #9
 	ldr	r5, [sp, #16]
-	bne	.L905
-	cbz	r3, .L906
+	bne	.L922
+	cbz	r3, .L923
 	lsls	r1, r3, #30
-	bne	.L907
+	bne	.L924
 	mov	r2, #256
 	mov	r1, r3
 	bl	ftl_memcpy32
-.L906:
-	cbz	r5, .L904
+.L923:
+	cbz	r5, .L921
 	ldrb	r2, [r5, #1]	@ zero_extendqisi2
 	lsrs	r4, r4, #1
 	ldrb	r3, [r5]	@ zero_extendqisi2
@@ -6541,21 +6595,21 @@ NandcCopy1KB:
 	orr	r3, r3, r2, lsl #24
 	str	r3, [r6, r4]
 	pop	{r4, r5, r6, pc}
-.L907:
+.L924:
 	mov	r2, #1024
 	mov	r1, r3
 	bl	ftl_memcpy
-	b	.L906
-.L905:
-	cbz	r3, .L910
+	b	.L923
+.L922:
+	cbz	r3, .L927
 	lsls	r2, r3, #30
-	bne	.L911
+	bne	.L928
 	mov	r1, r0
 	mov	r2, #256
 	mov	r0, r3
 	bl	ftl_memcpy32
-.L910:
-	cbz	r5, .L904
+.L927:
+	cbz	r5, .L921
 	lsrs	r4, r4, #1
 	add	r4, r4, r4, lsl #1
 	lsls	r4, r4, #4
@@ -6567,14 +6621,14 @@ NandcCopy1KB:
 	lsrs	r3, r3, #24
 	strb	r2, [r5, #2]
 	strb	r3, [r5, #3]
-.L904:
+.L921:
 	pop	{r4, r5, r6, pc}
-.L911:
+.L928:
 	mov	r1, r0
 	mov	r2, #1024
 	mov	r0, r3
 	bl	ftl_memcpy
-	b	.L910
+	b	.L927
 	.size	NandcCopy1KB, .-NandcCopy1KB
 	.section	.text.NandcXferData,"ax",%progbits
 	.align	1
@@ -6589,7 +6643,7 @@ NandcXferData:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r7, r3
-	ldr	r3, .L958
+	ldr	r3, .L975
 	sub	sp, sp, #96
 	mov	r6, r0
 	mov	r10, r2
@@ -6597,14 +6651,14 @@ NandcXferData:
 	ldr	r5, [r3, r0, lsl #3]
 	lsls	r3, r7, #26
 	ldr	r4, [sp, #128]
-	bne	.L923
-	cbnz	r4, .L924
+	bne	.L940
+	cbnz	r4, .L941
 	add	r4, sp, #32
 	movs	r2, #64
 	movs	r1, #255
 	add	r0, sp, #32
 	bl	ftl_memset
-.L924:
+.L941:
 	movs	r3, #0
 	mov	r2, r10
 	ldr	r1, [sp, #12]
@@ -6616,10 +6670,10 @@ NandcXferData:
 	bl	NandcXferComp
 	ldr	r3, [sp, #12]
 	cmp	r3, #0
-	bne	.L948
-	ldr	r2, .L958+4
+	bne	.L965
+	ldr	r2, .L975+4
 	lsr	r0, r10, #1
-	ldr	ip, .L958+12
+	ldr	ip, .L975+12
 	ldr	r3, [r2]
 	cmp	r3, #25
 	ldr	r3, [sp, #12]
@@ -6627,31 +6681,31 @@ NandcXferData:
 	movcc	r7, #64
 	movcs	r7, #128
 	mov	r1, r3
-.L927:
+.L944:
 	cmp	r1, r0
 	add	r4, r4, #4
 	add	r6, r7, r3
-	bcc	.L928
-	ldr	r3, .L958+8
+	bcc	.L945
+	ldr	r3, .L975+8
 	lsr	r4, r10, #2
 	ldr	r0, [r2]
 	movs	r2, #0
 	mov	r8, r2
 	ldr	r1, [r3]
-.L929:
+.L946:
 	cmp	r2, r4
-	bcs	.L925
-	cbnz	r0, .L935
-.L925:
+	bcs	.L942
+	cbnz	r0, .L952
+.L942:
 	movs	r3, #0
 	str	r3, [r5, #16]
-.L936:
-	ldr	r3, .L958+8
+.L953:
+	ldr	r3, .L975+8
 	ldr	r3, [r3]
 	cmp	r3, #5
-	bls	.L922
+	bls	.L939
 	ldr	r3, [sp, #12]
-	cbnz	r3, .L922
+	cbnz	r3, .L939
 	ldr	r3, [r5]
 	and	r2, r3, #139264
 	cmp	r2, #139264
@@ -6659,12 +6713,12 @@ NandcXferData:
 	moveq	r8, #-1
 	orreq	r3, r3, #131072
 	streq	r3, [r5]
-.L922:
+.L939:
 	mov	r0, r8
 	add	sp, sp, #96
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L928:
+.L945:
 	bic	lr, r3, #3
 	ldr	r3, [ip, #4]
 	adds	r1, r1, #1
@@ -6677,20 +6731,20 @@ NandcXferData:
 	strb	lr, [r4, #-2]
 	strb	r3, [r4, #-1]
 	mov	r3, r6
-	b	.L927
-.L935:
+	b	.L944
+.L952:
 	add	r3, r2, #8
 	ldr	r3, [r5, r3, lsl #2]
 	str	r3, [sp, #28]
 	ldr	r3, [sp, #28]
 	lsls	r6, r3, #29
-	bmi	.L951
+	bmi	.L968
 	ldr	r3, [sp, #28]
 	ubfx	r3, r3, #15, #1
 	cmp	r3, #0
-	bne	.L951
+	bne	.L968
 	cmp	r1, #5
-	bls	.L931
+	bls	.L948
 	ldr	r6, [sp, #28]
 	ldr	r3, [sp, #28]
 	ubfx	r6, r6, #3, #5
@@ -6711,18 +6765,18 @@ NandcXferData:
 	ite	hi
 	ubfxhi	r6, r6, #27, #1
 	ubfxls	r6, r6, #29, #1
-.L957:
+.L974:
 	orr	r3, r3, r6, lsl #5
-.L933:
+.L950:
 	cmp	r8, r3
 	it	cc
 	movcc	r8, r3
-.L930:
+.L947:
 	adds	r2, r2, #1
-	b	.L929
-.L931:
+	b	.L946
+.L948:
 	cmp	r1, #3
-	bls	.L933
+	bls	.L950
 	ldr	r6, [sp, #28]
 	ldr	r3, [sp, #28]
 	ubfx	r6, r6, #3, #5
@@ -6743,33 +6797,33 @@ NandcXferData:
 	ite	hi
 	ubfxhi	r6, r6, #28, #1
 	ubfxls	r6, r6, #30, #1
-	b	.L957
-.L951:
+	b	.L974
+.L968:
 	mov	r8, #-1
-	b	.L930
-.L948:
+	b	.L947
+.L965:
 	mov	r8, #0
-	b	.L925
-.L923:
+	b	.L942
+.L940:
 	ldr	r3, [sp, #12]
 	cmp	r3, #1
-	bne	.L937
+	bne	.L954
 	cmp	r4, #0
 	mov	r8, #0
 	ite	ne
 	movne	r3, #4
 	moveq	r3, #0
 	str	r3, [sp, #16]
-.L938:
+.L955:
 	cmp	r8, r10
-	bcc	.L940
+	bcc	.L957
 	mov	r8, #0
-	b	.L936
-.L940:
+	b	.L953
+.L957:
 	and	fp, r8, #3
-	cbz	r7, .L953
+	cbz	r7, .L970
 	add	r3, r7, r8, lsl #9
-.L939:
+.L956:
 	str	r4, [sp]
 	mov	r2, fp
 	movs	r1, #1
@@ -6788,11 +6842,11 @@ NandcXferData:
 	bl	NandcXferComp
 	ldr	r3, [sp, #16]
 	add	r4, r4, r3
-	b	.L938
-.L953:
+	b	.L955
+.L970:
 	mov	r3, r7
-	b	.L939
-.L937:
+	b	.L956
+.L954:
 	mov	r8, #0
 	movs	r2, #2
 	mov	r3, r8
@@ -6808,16 +6862,16 @@ NandcXferData:
 	movne	r3, #4
 	moveq	r3, r8
 	str	r3, [sp, #20]
-.L941:
+.L958:
 	cmp	r4, r10
-	bcs	.L936
+	bcs	.L953
 	mov	r0, r6
 	adds	r4, r4, #2
 	bl	NandcXferComp
 	ldr	r3, [r5, #32]
 	cmp	r10, r4
 	str	r3, [sp, #28]
-	bls	.L942
+	bls	.L959
 	movs	r3, #0
 	movs	r2, #2
 	str	r3, [sp, #4]
@@ -6826,10 +6880,10 @@ NandcXferData:
 	mov	r0, r6
 	and	r3, r4, #3
 	bl	NandcXferStart
-.L942:
+.L959:
 	ldr	r3, [sp, #28]
 	lsls	r3, r3, #29
-	bmi	.L954
+	bmi	.L971
 	ldr	r3, [sp, #28]
 	ldr	r2, [sp, #28]
 	ubfx	r3, r3, #3, #5
@@ -6838,7 +6892,7 @@ NandcXferData:
 	cmp	r8, r3
 	it	cc
 	movcc	r8, r3
-.L943:
+.L960:
 	ldr	r3, [sp, #16]
 	cmp	r7, #0
 	sub	r2, r4, #2
@@ -6855,13 +6909,13 @@ NandcXferData:
 	ldr	r2, [sp, #20]
 	add	r3, r3, r2
 	str	r3, [sp, #16]
-	b	.L941
-.L954:
+	b	.L958
+.L971:
 	mov	r8, #-1
-	b	.L943
-.L959:
+	b	.L960
+.L976:
 	.align	2
-.L958:
+.L975:
 	.word	.LANCHOR6
 	.word	.LANCHOR32
 	.word	.LANCHOR34
@@ -6880,21 +6934,21 @@ FlashReadRawPage:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r8, r3
-	ldr	r3, .L962
+	ldr	r3, .L979
 	mov	r6, r1
 	mov	r7, r2
 	mov	r4, r0
 	ldrb	r5, [r3, #9]	@ zero_extendqisi2
-	cbnz	r0, .L961
-	ldr	r3, .L962+4
-	ldr	r2, .L962+8
+	cbnz	r0, .L978
+	ldr	r3, .L979+4
+	ldr	r2, .L979+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	ldr	r0, [r2]
 	muls	r0, r3, r0
 	cmp	r0, r1
 	it	hi
 	movhi	r5, #4
-.L961:
+.L978:
 	mov	r0, r4
 	bl	NandcWaitFlashReady
 	mov	r0, r4
@@ -6917,9 +6971,9 @@ FlashReadRawPage:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L963:
+.L980:
 	.align	2
-.L962:
+.L979:
 	.word	.LANCHOR31
 	.word	.LANCHOR2
 	.word	.LANCHOR3
@@ -6937,7 +6991,7 @@ FlashDdrTunningRead:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r7, r3
-	ldr	r3, .L989
+	ldr	r3, .L1006
 	sub	sp, sp, #24
 	str	r0, [sp, #8]
 	ldr	r3, [r3]
@@ -6945,7 +6999,7 @@ FlashDdrTunningRead:
 	str	r2, [sp, #4]
 	ldr	r3, [r3, #304]
 	str	r3, [sp, #20]
-	ldr	r3, .L989+4
+	ldr	r3, .L1006+4
 	ldr	r3, [r3]
 	cmp	r3, #8
 	ldr	r3, [sp, #56]
@@ -6953,9 +7007,9 @@ FlashDdrTunningRead:
 	movcc	fp, #6
 	movcs	fp, #12
 	cmp	r3, #0
-	beq	.L978
+	beq	.L995
 	movs	r0, #1
-	ldr	r4, .L989+8
+	ldr	r4, .L1006+8
 	bl	FlashSetInterfaceMode
 	movs	r0, #1
 	bl	NandcSetMode
@@ -6972,37 +7026,37 @@ FlashDdrTunningRead:
 	ldrb	r0, [r4]	@ zero_extendqisi2
 	bl	NandcSetMode
 	adds	r3, r6, #1
-	bne	.L967
-.L976:
+	bne	.L984
+.L993:
 	mov	r6, #-1
-.L964:
+.L981:
 	mov	r0, r6
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L967:
+.L984:
 	mov	r2, r6
 	ldr	r1, [sp, #12]
-	ldr	r0, .L989+12
+	ldr	r0, .L1006+12
 	bl	printf
-	ldr	r2, .L989+16
+	ldr	r2, .L1006+16
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	cmp	r3, #2048
-	bcs	.L969
+	bcs	.L986
 	str	r3, [r2]
-	b	.L964
-.L969:
+	b	.L981
+.L986:
 	movs	r7, #0
 	str	r7, [r2]
 	str	r7, [sp, #4]
-.L966:
+.L983:
 	mov	r10, #0
 	mov	r8, #-1
 	mov	r5, r10
 	mov	r4, r10
 	str	r10, [sp, #16]
-.L974:
+.L991:
 	uxtb	r0, fp
 	bl	NandcSetDdrPara
 	mov	r3, r7
@@ -7012,72 +7066,72 @@ FlashDdrTunningRead:
 	bl	FlashReadRawPage
 	adds	r3, r6, #1
 	cmp	r0, r3
-	bhi	.L970
+	bhi	.L987
 	cmp	r0, #2
-	bhi	.L980
+	bhi	.L997
 	adds	r4, r4, #1
 	cmp	r4, #9
-	bls	.L980
+	bls	.L997
 	mov	r3, r5
 	mov	r6, r0
 	sub	r5, fp, r4
 	mov	r8, #0
-.L972:
+.L989:
 	ldr	r2, [sp, #16]
 	cmp	r4, r2
 	it	ls
 	movls	r5, r3
-.L973:
-	cbz	r5, .L975
+.L990:
+	cbz	r5, .L992
 	mov	r1, r5
-	ldr	r0, .L989+20
+	ldr	r0, .L1006+20
 	bl	printf
 	uxtb	r0, r5
 	bl	NandcSetDdrPara
-.L975:
+.L992:
 	cmp	r8, #0
-	beq	.L964
+	beq	.L981
 	ldr	r2, [sp, #12]
 	ldr	r1, [sp, #8]
-	ldr	r0, .L989+24
+	ldr	r0, .L1006+24
 	bl	printf
 	ldr	r3, [sp, #56]
 	cmp	r3, #0
-	beq	.L976
+	beq	.L993
 	ldr	r3, [sp, #20]
 	ubfx	r0, r3, #8, #8
 	bl	NandcSetDdrPara
-	b	.L964
-.L978:
+	b	.L981
+.L995:
 	mov	r6, #1024
-	b	.L966
-.L970:
+	b	.L983
+.L987:
 	ldr	r3, [sp, #16]
 	cmp	r4, r3
-	bls	.L981
+	bls	.L998
 	cmp	r4, #7
 	sub	r5, r10, r4
-	bhi	.L973
+	bhi	.L990
 	str	r4, [sp, #16]
-.L981:
+.L998:
 	movs	r4, #0
-	b	.L971
-.L980:
+	b	.L988
+.L997:
 	mov	r8, #0
 	mov	r10, fp
 	mov	r6, r0
 	mov	r7, r8
 	str	r8, [sp, #4]
-.L971:
+.L988:
 	add	fp, fp, #2
 	cmp	fp, #69
-	bls	.L974
+	bls	.L991
 	mov	r3, r5
 	mov	r5, r10
-	b	.L972
-.L990:
+	b	.L989
+.L1007:
 	.align	2
-.L989:
+.L1006:
 	.word	.LANCHOR19
 	.word	.LANCHOR34
 	.word	.LANCHOR24
@@ -7105,16 +7159,16 @@ FlashReadPage:
 	bl	FlashReadRawPage
 	adds	r2, r0, #1
 	mov	r4, r0
-	bne	.L992
-	ldr	r10, .L1010+20
+	bne	.L1009
+	ldr	r10, .L1027+20
 	ldrb	fp, [r10]	@ zero_extendqisi2
 	cmp	fp, #0
-	bne	.L993
-.L995:
-	ldr	r3, .L1010
+	bne	.L1010
+.L1012:
+	ldr	r3, .L1027
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L992
-	ldr	r3, .L1010+4
+	cbz	r3, .L1009
+	ldr	r3, .L1027+4
 	mov	r1, r6
 	mov	r2, r7
 	mov	r0, r5
@@ -7126,16 +7180,16 @@ FlashReadPage:
 	bl	FlashDdrTunningRead
 	adds	r1, r0, #1
 	mov	r4, r0
-	beq	.L996
-	ldr	r3, .L1010+8
+	beq	.L1013
+	ldr	r3, .L1027+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r0, r3, lsr #1
-	bls	.L992
-.L996:
+	bls	.L1009
+.L1013:
 	ubfx	r0, r10, #8, #8
 	bl	NandcSetDdrPara
-	b	.L992
-.L993:
+	b	.L1009
+.L1010:
 	movs	r3, #0
 	mov	r2, r7
 	strb	r3, [r10]
@@ -7145,15 +7199,15 @@ FlashReadPage:
 	bl	FlashReadRawPage
 	adds	r3, r0, #1
 	strb	fp, [r10]
-	beq	.L995
+	beq	.L1012
 	mov	r4, r0
-.L992:
-	ldr	r10, .L1010+24
+.L1009:
+	ldr	r10, .L1027+24
 	ldr	fp, [r10]
 	cmp	fp, #0
-	beq	.L991
+	beq	.L1008
 	adds	r2, r4, #1
-	bne	.L991
+	bne	.L1008
 	mov	r3, r8
 	mov	r2, r7
 	mov	r1, r6
@@ -7163,13 +7217,13 @@ FlashReadPage:
 	mov	r4, r0
 	mov	r1, r0
 	mov	r2, r5
-	ldr	r0, .L1010+12
+	ldr	r0, .L1027+12
 	bl	printf
 	adds	r3, r4, #1
-	bne	.L991
-	ldr	r3, .L1010+16
+	bne	.L1008
+	ldr	r3, .L1027+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L991
+	cbz	r3, .L1008
 	mov	r0, r5
 	bl	flash_enter_slc_mode
 	ldr	r4, [r10]
@@ -7181,14 +7235,14 @@ FlashReadPage:
 	mov	r4, r0
 	mov	r0, r5
 	bl	flash_exit_slc_mode
-.L991:
+.L1008:
 	mov	r0, r4
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1011:
+.L1028:
 	.align	2
-.L1010:
+.L1027:
 	.word	.LANCHOR30
 	.word	.LANCHOR19
 	.word	.LANCHOR33
@@ -7210,7 +7264,7 @@ FlashDdrParaScan:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r6, r0
-	ldr	r4, .L1023
+	ldr	r4, .L1040
 	movs	r5, #0
 	mov	r7, r1
 	ldrb	r0, [r4]	@ zero_extendqisi2
@@ -7228,33 +7282,33 @@ FlashDdrParaScan:
 	mov	r8, r0
 	mov	r1, r7
 	mov	r0, r6
-	ldr	r5, .L1023+4
+	ldr	r5, .L1040+4
 	bl	FlashReadRawPage
 	adds	r0, r0, #1
-	beq	.L1013
+	beq	.L1030
 	cmp	r8, #-1
-	bne	.L1014
-.L1013:
+	bne	.L1031
+.L1030:
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	lsls	r3, r3, #31
-	bpl	.L1014
+	bpl	.L1031
 	movs	r0, #1
 	bl	FlashSetInterfaceMode
 	movs	r0, #1
 	bl	NandcSetMode
 	movs	r3, #0
-.L1022:
+.L1039:
 	movs	r0, #0
 	strb	r3, [r5]
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1014:
+.L1031:
 	movs	r3, #1
-	b	.L1022
-.L1024:
+	b	.L1039
+.L1041:
 	.align	2
-.L1023:
+.L1040:
 	.word	.LANCHOR24
 	.word	.LANCHOR30
 	.size	FlashDdrParaScan, .-FlashDdrParaScan
@@ -7272,7 +7326,7 @@ FlashLoadPhyInfo:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #60
 	sub	sp, sp, #24
-	ldr	fp, .L1040+8
+	ldr	fp, .L1057+8
 	movs	r4, #0
 	movs	r7, #4
 	strb	r3, [sp, #20]
@@ -7281,13 +7335,13 @@ FlashLoadPhyInfo:
 	movs	r3, #24
 	strb	r3, [sp, #22]
 	movs	r3, #16
-	ldr	r1, .L1040
+	ldr	r1, .L1057
 	mov	r0, r4
 	strb	r3, [sp, #23]
 	mov	r6, #-1
 	ldrh	r3, [fp, #10]
-	ldr	r8, .L1040+36
-	ldr	r5, .L1040+4
+	ldr	r8, .L1057+36
+	ldr	r5, .L1057+4
 	str	r3, [sp, #4]
 	ldr	r3, [r1]
 	str	r4, [r8]
@@ -7295,11 +7349,11 @@ FlashLoadPhyInfo:
 	bl	flash_enter_slc_mode
 	mov	r10, r1
 	str	r8, [sp, #12]
-.L1026:
+.L1043:
 	mov	r8, #0
 	adds	r3, r4, #1
 	str	r3, [sp, #8]
-.L1028:
+.L1045:
 	add	r3, sp, #20
 	ldrb	r0, [r3, r8]	@ zero_extendqisi2
 	bl	FlashBchSel
@@ -7309,94 +7363,94 @@ FlashLoadPhyInfo:
 	mov	r0, r3
 	bl	FlashReadRawPage
 	adds	r0, r0, #1
-	bne	.L1027
+	bne	.L1044
 	movs	r3, #0
 	ldr	r2, [r10]
 	ldr	r1, [sp, #8]
 	mov	r0, r3
 	bl	FlashReadRawPage
 	adds	r0, r0, #1
-	bne	.L1027
+	bne	.L1044
 	add	r8, r8, #1
 	cmp	r8, #4
-	bne	.L1028
-.L1029:
+	bne	.L1045
+.L1046:
 	ldr	r3, [sp, #4]
 	subs	r7, r7, #1
 	add	r4, r4, r3
-	bne	.L1026
+	bne	.L1043
 	mov	r0, r7
-	b	.L1039
-.L1030:
+	b	.L1056
+.L1047:
 	movw	r1, #2036
 	add	r0, r8, #12
 	bl	JSHash
 	ldr	r3, [r8, #8]
 	cmp	r3, r0
-	bne	.L1036
+	bne	.L1053
 	movs	r2, #32
 	add	r1, r8, #160
-	ldr	r0, .L1040+8
+	ldr	r0, .L1057+8
 	bl	ftl_memcpy
 	ldr	r1, [r5]
 	movs	r2, #32
-	ldr	r0, .L1040+12
+	ldr	r0, .L1057+12
 	adds	r1, r1, #192
 	bl	ftl_memcpy
 	ldr	r1, [r5]
 	mov	r2, #852
-	ldr	r0, .L1040+16
+	ldr	r0, .L1057+16
 	adds	r1, r1, #224
 	bl	ftl_memcpy
 	ldr	r6, [r5]
 	mov	r0, r4
-	ldr	r3, .L1040+20
+	ldr	r3, .L1057+20
 	ldrh	r1, [fp, #10]
 	ldr	r2, [r6, #1076]
 	strb	r2, [r3]
 	ldr	r3, [sp, #12]
 	str	r4, [r3]
 	bl	__aeabi_uidiv
-	ldr	r3, .L1040+24
+	ldr	r3, .L1057+24
 	adds	r2, r0, #1
-	cbz	r0, .L1032
-.L1038:
+	cbz	r0, .L1049
+.L1055:
 	str	r2, [r3]
 	ldrh	r2, [r6, #14]
 	movs	r6, #0
-	ldr	r3, .L1040+28
+	ldr	r3, .L1057+28
 	strb	r2, [r3]
-	b	.L1029
-.L1032:
+	b	.L1046
+.L1049:
 	movs	r2, #2
-	b	.L1038
-.L1036:
+	b	.L1055
+.L1053:
 	mov	r6, #-1
-	b	.L1029
-.L1027:
+	b	.L1046
+.L1044:
 	ldr	r8, [r5]
-	ldr	r2, .L1040+32
+	ldr	r2, .L1057+32
 	ldr	r3, [r8]
 	cmp	r3, r2
-	bne	.L1029
+	bne	.L1046
 	cmp	r6, #0
-	bne	.L1030
+	bne	.L1047
 	ldrh	r1, [fp, #10]
 	mov	r0, r4
 	bl	__aeabi_uidiv
-	ldr	r3, .L1040+24
+	ldr	r3, .L1057+24
 	adds	r0, r0, #1
 	str	r0, [r3]
 	mov	r0, r6
-.L1039:
+.L1056:
 	bl	flash_exit_slc_mode
 	mov	r0, r6
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1041:
+.L1058:
 	.align	2
-.L1040:
+.L1057:
 	.word	.LANCHOR147
 	.word	.LANCHOR146
 	.word	.LANCHOR31
@@ -7426,8 +7480,8 @@ ToshibaReadRetrial:
 	mov	fp, r3
 	str	r1, [sp, #20]
 	bl	NandcWaitFlashReady
-	ldr	r3, .L1069
-	ldr	r2, .L1069+4
+	ldr	r3, .L1086
+	ldr	r2, .L1086+4
 	ldr	r4, [r3, r6, lsl #3]
 	add	r3, r3, r6, lsl #3
 	str	r2, [sp, #16]
@@ -7437,83 +7491,83 @@ ToshibaReadRetrial:
 	subs	r3, r3, #67
 	add	r5, r4, r5, lsl #8
 	cmp	r3, #1
-	bls	.L1059
-	ldr	r3, .L1069+8
+	bls	.L1076
+	ldr	r3, .L1086+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1060
+	cbz	r3, .L1077
 	movs	r0, #0
 	bl	NandcSetDdrMode
 	movs	r3, #1
-.L1060:
+.L1077:
 	str	r3, [sp, #8]
 	add	r3, r4, r7, lsl #8
 	movs	r2, #92
 	str	r2, [r3, #2056]
 	movs	r2, #197
 	str	r2, [r3, #2056]
-.L1043:
+.L1060:
 	mov	r8, #1
 	mov	r3, #-1
 	str	r3, [sp, #4]
-.L1045:
-	ldr	r3, .L1069+12
+.L1062:
+	ldr	r3, .L1086+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	cmp	r8, r3
-	bcc	.L1054
+	bcc	.L1071
 	ldr	r10, [sp, #4]
-.L1053:
+.L1070:
 	ldr	r3, [sp, #16]
 	movs	r1, #0
 	mov	r0, r5
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	subs	r2, r2, #67
 	cmp	r2, #1
-	bhi	.L1055
+	bhi	.L1072
 	bl	SandiskSetRRPara
-.L1056:
+.L1073:
 	add	r4, r4, r7, lsl #8
 	movs	r2, #255
 	str	r2, [r4, #2056]
-	ldr	r2, .L1069+16
+	ldr	r2, .L1086+16
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	add	r2, r2, r2, lsl #1
 	cmp	r10, r2, asr #2
-	bcc	.L1057
+	bcc	.L1074
 	cmp	r10, #-1
 	it	ne
 	movne	r10, #256
-.L1057:
+.L1074:
 	mov	r0, r6
 	bl	NandcWaitFlashReady
 	ldr	r3, [sp, #8]
-	cbz	r3, .L1042
+	cbz	r3, .L1059
 	movs	r0, #4
 	bl	NandcSetDdrMode
-.L1042:
+.L1059:
 	mov	r0, r10
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1059:
+.L1076:
 	movs	r3, #0
 	str	r3, [sp, #8]
-	b	.L1043
-.L1054:
+	b	.L1060
+.L1071:
 	ldr	r3, [sp, #16]
 	mov	r0, r5
 	uxtb	r1, r8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	subs	r3, r3, #67
 	cmp	r3, #1
-	bhi	.L1046
+	bhi	.L1063
 	bl	SandiskSetRRPara
-.L1047:
+.L1064:
 	ldr	r3, [sp, #16]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #34
-	bne	.L1048
-	ldr	r3, .L1069+12
+	bne	.L1065
+	ldr	r3, .L1086+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	subs	r3, r3, #3
 	cmp	r8, r3
@@ -7521,14 +7575,14 @@ ToshibaReadRetrial:
 	addeq	r3, r4, r7, lsl #8
 	moveq	r2, #179
 	streq	r2, [r3, #2056]
-.L1048:
+.L1065:
 	add	r3, r4, r7, lsl #8
 	movs	r2, #38
 	str	r2, [r3, #2056]
 	movs	r2, #93
 	str	r2, [r3, #2056]
 	ldr	r3, [sp, #8]
-	cbz	r3, .L1049
+	cbz	r3, .L1066
 	movs	r0, #4
 	bl	NandcSetDdrMode
 	mov	r3, fp
@@ -7539,10 +7593,10 @@ ToshibaReadRetrial:
 	mov	r10, r0
 	movs	r0, #0
 	bl	NandcSetDdrMode
-.L1050:
+.L1067:
 	cmp	r10, #-1
-	beq	.L1051
-	ldr	r2, .L1069+16
+	beq	.L1068
+	ldr	r2, .L1086+16
 	ldr	r3, [sp, #4]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r3, #-1
@@ -7551,29 +7605,29 @@ ToshibaReadRetrial:
 	str	r3, [sp, #4]
 	add	r2, r2, r2, lsl #1
 	cmp	r10, r2, asr #2
-	bcc	.L1053
+	bcc	.L1070
 	mov	fp, #0
 	str	fp, [sp, #12]
-.L1051:
+.L1068:
 	add	r8, r8, #1
-	b	.L1045
-.L1046:
+	b	.L1062
+.L1063:
 	bl	ToshibaSetRRPara
-	b	.L1047
-.L1049:
+	b	.L1064
+.L1066:
 	mov	r3, fp
 	ldr	r2, [sp, #12]
 	ldr	r1, [sp, #20]
 	mov	r0, r6
 	bl	FlashReadRawPage
 	mov	r10, r0
-	b	.L1050
-.L1055:
+	b	.L1067
+.L1072:
 	bl	ToshibaSetRRPara
-	b	.L1056
-.L1070:
+	b	.L1073
+.L1087:
 	.align	2
-.L1069:
+.L1086:
 	.word	.LANCHOR6
 	.word	.LANCHOR10
 	.word	.LANCHOR30
@@ -7598,35 +7652,35 @@ SamsungReadRetrial:
 	mov	fp, r1
 	movs	r6, #1
 	bl	NandcWaitFlashReady
-	ldr	r2, .L1084
+	ldr	r2, .L1101
 	mov	r4, #-1
 	add	r3, r2, r7, lsl #3
 	ldrb	r5, [r3, #4]	@ zero_extendqisi2
 	add	r3, r5, #8
 	ldr	r5, [r2, r7, lsl #3]
 	add	r5, r5, r3, lsl #8
-.L1072:
-	ldr	r3, .L1084+4
+.L1089:
+	ldr	r3, .L1101+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	cmp	r6, r3
-	bcc	.L1076
-.L1075:
+	bcc	.L1093
+.L1092:
 	movs	r1, #0
 	mov	r0, r5
 	bl	SamsungSetRRPara
-	ldr	r3, .L1084+8
+	ldr	r3, .L1101+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, asr #2
-	bcc	.L1071
+	bcc	.L1088
 	adds	r3, r4, #1
 	it	ne
 	movne	r4, #256
-.L1071:
+.L1088:
 	mov	r0, r4
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1076:
+.L1093:
 	uxtb	r1, r6
 	mov	r0, r5
 	bl	SamsungSetRRPara
@@ -7636,26 +7690,26 @@ SamsungReadRetrial:
 	mov	r0, r7
 	bl	FlashReadRawPage
 	adds	r2, r0, #1
-	beq	.L1073
-	ldr	r3, .L1084+8
+	beq	.L1090
+	ldr	r3, .L1101+8
 	cmp	r4, #-1
 	it	eq
 	moveq	r4, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r0, r3, asr #2
-	bcc	.L1079
+	bcc	.L1096
 	mov	r8, #0
 	mov	r10, r8
-.L1073:
+.L1090:
 	adds	r6, r6, #1
-	b	.L1072
-.L1079:
+	b	.L1089
+.L1096:
 	mov	r4, r0
-	b	.L1075
-.L1085:
+	b	.L1092
+.L1102:
 	.align	2
-.L1084:
+.L1101:
 	.word	.LANCHOR6
 	.word	.LANCHOR151
 	.word	.LANCHOR33
@@ -7673,28 +7727,28 @@ MicronReadRetrial:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r7, r3
-	ldr	r3, .L1111
+	ldr	r3, .L1128
 	sub	sp, sp, #40
 	mov	r5, r0
 	str	r2, [sp, #16]
 	ldrb	r2, [r3]	@ zero_extendqisi2
-	ldr	r3, .L1111+4
+	ldr	r3, .L1128+4
 	str	r1, [sp, #28]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1087
+	bne	.L1104
 	add	r2, r2, r2, lsl #1
 	asrs	r3, r2, #2
-.L1110:
-.L1088:
+.L1127:
+.L1105:
 	mov	r8, #0
 	str	r3, [sp, #12]
 	mov	r6, r8
-.L1098:
+.L1115:
 	mov	r0, r5
 	mov	r10, #0
 	bl	NandcWaitFlashReady
-	ldr	r3, .L1111+8
+	ldr	r3, .L1128+8
 	mov	r4, #-1
 	ldr	r2, [r3, r5, lsl #3]
 	add	r3, r3, r5, lsl #3
@@ -7702,12 +7756,12 @@ MicronReadRetrial:
 	str	r2, [sp, #24]
 	lsl	r3, fp, #8
 	str	r3, [sp, #32]
-.L1089:
-	ldr	r3, .L1111+12
+.L1106:
+	ldr	r3, .L1128+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r10, r3
-	bcc	.L1093
-.L1092:
+	bcc	.L1110
+.L1109:
 	ldr	r3, [sp, #24]
 	movs	r0, #200
 	add	fp, r3, fp, lsl #8
@@ -7722,7 +7776,7 @@ MicronReadRetrial:
 	cmp	r4, r3
 	str	r6, [fp, #2048]
 	str	r6, [fp, #2048]
-	bcc	.L1094
+	bcc	.L1111
 	adds	r1, r4, #1
 	mov	r3, r10
 	it	ne
@@ -7730,26 +7784,26 @@ MicronReadRetrial:
 	ldr	r2, [sp, #28]
 	str	r4, [sp]
 	mov	r1, r10
-	ldr	r0, .L1111+16
+	ldr	r0, .L1128+16
 	bl	printf
 	cmp	r8, #0
-	bne	.L1096
-	ldr	r3, .L1111+4
+	bne	.L1113
+	ldr	r3, .L1128+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1086
+	beq	.L1103
 	adds	r2, r4, #1
-	bne	.L1086
+	bne	.L1103
 	movs	r1, #3
 	mov	r0, r5
 	bl	micron_auto_read_calibration_config
 	mov	r8, #1
-	b	.L1098
-.L1087:
-	ldr	r3, .L1111+20
+	b	.L1115
+.L1104:
+	ldr	r3, .L1128+20
 	smull	r2, r3, r2, r3
-	b	.L1110
-.L1093:
+	b	.L1127
+.L1110:
 	ldr	r2, [sp, #32]
 	movs	r0, #200
 	ldr	r3, [sp, #24]
@@ -7774,46 +7828,46 @@ MicronReadRetrial:
 	mov	r3, r7
 	bl	FlashReadRawPage
 	adds	r3, r0, #1
-	beq	.L1090
+	beq	.L1107
 	ldr	r3, [sp, #12]
 	cmp	r4, #-1
 	it	eq
 	moveq	r4, r0
 	cmp	r0, r3
-	bcc	.L1100
+	bcc	.L1117
 	movs	r7, #0
 	str	r7, [sp, #16]
-.L1090:
+.L1107:
 	ldr	r10, [sp, #20]
-	b	.L1089
-.L1100:
+	b	.L1106
+.L1117:
 	movs	r7, #0
 	mov	r4, r0
 	str	r7, [sp, #16]
-	b	.L1092
-.L1096:
+	b	.L1109
+.L1113:
 	movs	r1, #0
 	mov	r0, r5
 	bl	micron_auto_read_calibration_config
 	adds	r3, r4, #1
 	it	ne
 	movne	r4, #256
-.L1086:
+.L1103:
 	mov	r0, r4
 	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1094:
+.L1111:
 	cmp	r8, #0
-	beq	.L1086
+	beq	.L1103
 	movs	r1, #0
 	mov	r0, r5
 	bl	micron_auto_read_calibration_config
 	mov	r4, #256
-	b	.L1086
-.L1112:
+	b	.L1103
+.L1129:
 	.align	2
-.L1111:
+.L1128:
 	.word	.LANCHOR33
 	.word	.LANCHOR8
 	.word	.LANCHOR6
@@ -7834,7 +7888,7 @@ HynixReadRetrial:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	fp, r2
-	ldr	r4, .L1130
+	ldr	r4, .L1147
 	mov	r8, #0
 	mov	r6, #-1
 	mov	r10, r3
@@ -7844,44 +7898,44 @@ HynixReadRetrial:
 	adds	r3, r4, r0
 	ldrb	r5, [r3, #12]	@ zero_extendqisi2
 	str	r2, [sp]
-	ldr	r2, .L1130+4
+	ldr	r2, .L1147+4
 	ldr	r2, [r2]
 	ldrb	r2, [r2, #19]	@ zero_extendqisi2
 	cmp	r2, #7
 	it	eq
 	ldrbeq	r5, [r3, #20]	@ zero_extendqisi2
 	bl	NandcWaitFlashReady
-.L1115:
+.L1132:
 	ldr	r3, [sp]
 	cmp	r8, r3
-	bcc	.L1120
-.L1119:
-	ldr	r3, .L1130+4
+	bcc	.L1137
+.L1136:
+	ldr	r3, .L1147+4
 	add	r4, r4, r7
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	cmp	r3, #7
-	ldr	r3, .L1130+8
+	ldr	r3, .L1147+8
 	ite	eq
 	strbeq	r5, [r4, #20]
 	strbne	r5, [r4, #12]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r6, r3, asr #2
-	bcc	.L1113
+	bcc	.L1130
 	adds	r3, r6, #1
 	it	ne
 	movne	r6, #256
-.L1113:
+.L1130:
 	mov	r0, r6
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1120:
+.L1137:
 	ldr	r3, [sp]
 	adds	r5, r5, #1
 	uxtb	r5, r5
-	ldr	r2, .L1130+12
+	ldr	r2, .L1147+12
 	ldrb	r1, [r4, #1]	@ zero_extendqisi2
 	mov	r0, r7
 	cmp	r3, r5
@@ -7895,26 +7949,26 @@ HynixReadRetrial:
 	mov	r0, r7
 	bl	FlashReadRawPage
 	adds	r2, r0, #1
-	beq	.L1117
-	ldr	r3, .L1130+8
+	beq	.L1134
+	ldr	r3, .L1147+8
 	cmp	r6, #-1
 	it	eq
 	moveq	r6, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r0, r3, asr #2
-	bcc	.L1124
+	bcc	.L1141
 	mov	r10, #0
 	mov	fp, r10
-.L1117:
+.L1134:
 	add	r8, r8, #1
-	b	.L1115
-.L1124:
+	b	.L1132
+.L1141:
 	mov	r6, r0
-	b	.L1119
-.L1131:
+	b	.L1136
+.L1148:
 	.align	2
-.L1130:
+.L1147:
 	.word	.LANCHOR20
 	.word	.LANCHOR18
 	.word	.LANCHOR33
@@ -7933,24 +7987,24 @@ FlashProgPage:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r8, r3
-	ldr	r3, .L1135
+	ldr	r3, .L1152
 	mov	r5, r1
 	mov	r7, r2
 	mov	r4, r0
 	ldrb	r6, [r3, #9]	@ zero_extendqisi2
-	cbnz	r0, .L1133
-	ldr	r3, .L1135+4
-	ldr	r2, .L1135+8
+	cbnz	r0, .L1150
+	ldr	r3, .L1152+4
+	ldr	r2, .L1152+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	ldr	r1, [r2]
 	muls	r1, r3, r1
 	cmp	r1, r5
-	bls	.L1133
-	ldr	r3, .L1135+12
+	bls	.L1150
+	ldr	r3, .L1152+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L1134
+	cbnz	r3, .L1151
 	subs	r6, r6, #2
-.L1133:
+.L1150:
 	mov	r0, r4
 	bl	NandcWaitFlashReady
 	mov	r0, r4
@@ -7979,12 +8033,12 @@ FlashProgPage:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1134:
+.L1151:
 	movs	r6, #4
-	b	.L1133
-.L1136:
+	b	.L1150
+.L1153:
 	.align	2
-.L1135:
+.L1152:
 	.word	.LANCHOR31
 	.word	.LANCHOR2
 	.word	.LANCHOR3
@@ -8002,13 +8056,13 @@ FlashSavePhyInfo:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r7, .L1146
-	ldr	r4, .L1146+4
+	ldr	r7, .L1163
+	ldr	r4, .L1163+4
 	ldr	r3, [r7]
-	ldr	r10, .L1146+60
-	ldr	r8, .L1146+64
+	ldr	r10, .L1163+60
+	ldr	r8, .L1163+64
 	str	r3, [r4]
-	ldr	r3, .L1146+8
+	ldr	r3, .L1163+8
 	ldrb	r0, [r3]	@ zero_extendqisi2
 	bl	FlashBchSel
 	mov	r2, #2048
@@ -8017,49 +8071,49 @@ FlashSavePhyInfo:
 	bl	ftl_memset
 	ldr	r0, [r4]
 	movs	r2, #32
-	ldr	r3, .L1146+12
-	ldr	r1, .L1146+16
+	ldr	r3, .L1163+12
+	ldr	r1, .L1163+16
 	str	r10, [r0]
 	adds	r0, r0, #16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	strh	r3, [r0, #-4]	@ movhi
-	ldr	r3, .L1146+20
+	ldr	r3, .L1163+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	strh	r3, [r0, #-2]	@ movhi
-	ldr	r3, .L1146+24
+	ldr	r3, .L1163+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r3, [r0, #1060]
 	bl	ftl_memcpy
 	ldr	r0, [r4]
 	movs	r2, #8
-	ldr	r1, .L1146+28
+	ldr	r1, .L1163+28
 	adds	r0, r0, #80
 	bl	ftl_memcpy
 	ldr	r0, [r4]
 	movs	r2, #32
-	ldr	r1, .L1146+32
+	ldr	r1, .L1163+32
 	adds	r0, r0, #96
 	bl	ftl_memcpy
 	ldr	r0, [r4]
 	movs	r2, #32
-	ldr	r1, .L1146+36
+	ldr	r1, .L1163+36
 	adds	r0, r0, #160
 	bl	ftl_memcpy
 	ldr	r0, [r4]
 	movs	r2, #32
-	ldr	r1, .L1146+40
+	ldr	r1, .L1163+40
 	adds	r0, r0, #192
 	bl	ftl_memcpy
 	ldr	r0, [r4]
 	mov	r2, #852
-	ldr	r1, .L1146+44
+	ldr	r1, .L1163+44
 	adds	r0, r0, #224
 	bl	ftl_memcpy
 	ldr	r5, [r4]
 	movw	r1, #2036
 	add	r0, r5, #12
 	bl	JSHash
-	ldr	r1, .L1146+48
+	ldr	r1, .L1163+48
 	mov	r3, #1592
 	str	r3, [r5, #4]
 	str	r0, [r5, #8]
@@ -8070,7 +8124,7 @@ FlashSavePhyInfo:
 	str	r3, [r4]
 	bl	flash_enter_slc_mode
 	mov	fp, r1
-.L1140:
+.L1157:
 	ldr	r1, [r8]
 	movs	r2, #0
 	mov	r0, r2
@@ -8097,11 +8151,11 @@ FlashSavePhyInfo:
 	bl	FlashReadRawPage
 	adds	r0, r0, #1
 	add	r2, r6, #1
-	beq	.L1138
+	beq	.L1155
 	ldr	r3, [r4]
 	ldr	r1, [r3]
 	cmp	r1, r10
-	bne	.L1138
+	bne	.L1155
 	add	r0, r3, #12
 	movw	r1, #2036
 	str	r2, [sp, #4]
@@ -8111,21 +8165,21 @@ FlashSavePhyInfo:
 	ldr	r2, [sp, #4]
 	ldr	r3, [r3, #8]
 	cmp	r3, r0
-	bne	.L1138
-	ldr	r3, .L1146+52
+	bne	.L1155
+	ldr	r3, .L1163+52
 	cmp	r5, #1
 	str	r2, [r3]
 	ldr	r3, [r8]
 	mul	r6, r6, r3
-	ldr	r3, .L1146+56
+	ldr	r3, .L1163+56
 	str	r6, [r3]
-	beq	.L1141
+	beq	.L1158
 	movs	r5, #1
-.L1138:
+.L1155:
 	cmp	r2, #4
 	mov	r6, r2
-	bne	.L1140
-.L1139:
+	bne	.L1157
+.L1156:
 	movs	r0, #0
 	bl	flash_exit_slc_mode
 	clz	r0, r5
@@ -8134,12 +8188,12 @@ FlashSavePhyInfo:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1141:
+.L1158:
 	movs	r5, #2
-	b	.L1139
-.L1147:
+	b	.L1156
+.L1164:
 	.align	2
-.L1146:
+.L1163:
 	.word	.LANCHOR147
 	.word	.LANCHOR146
 	.word	.LANCHOR152
@@ -8172,7 +8226,7 @@ FlashReadIdbDataRaw:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #60
 	sub	sp, sp, #24
-	ldr	r2, .L1160
+	ldr	r2, .L1177
 	mov	r10, r0
 	strb	r3, [sp, #20]
 	movs	r3, #40
@@ -8181,49 +8235,49 @@ FlashReadIdbDataRaw:
 	strb	r3, [sp, #22]
 	movs	r3, #16
 	strb	r3, [sp, #23]
-	ldr	r3, .L1160+4
+	ldr	r3, .L1177+4
 	ldr	r1, [r2]
 	str	r2, [sp, #8]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r3, [sp, #4]
-	ldr	r3, .L1160+8
+	ldr	r3, .L1177+8
 	cmp	r1, r3
 	str	r3, [sp, #12]
-	bne	.L1149
+	bne	.L1166
 	movs	r0, #0
 	bl	flash_enter_slc_mode
-.L1149:
+.L1166:
 	mov	r7, #-1
 	movs	r4, #2
 	mov	r2, #2048
 	movs	r1, #0
 	mov	r0, r10
 	bl	ftl_memset
-.L1150:
-	ldr	r3, .L1160+12
+.L1167:
+	ldr	r3, .L1177+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r4, r3
-	bcc	.L1155
-.L1154:
+	bcc	.L1172
+.L1171:
 	ldr	r0, [sp, #4]
 	bl	FlashBchSel
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #12]
 	ldr	r3, [r3]
 	cmp	r3, r2
-	bne	.L1148
+	bne	.L1165
 	movs	r0, #0
 	bl	flash_exit_slc_mode
-.L1148:
+.L1165:
 	mov	r0, r7
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1155:
-	ldr	r5, .L1160+16
+.L1172:
+	ldr	r5, .L1177+16
 	movs	r6, #0
-	ldr	fp, .L1160+32
-.L1152:
+	ldr	fp, .L1177+32
+.L1169:
 	add	r3, sp, #20
 	ldrb	r8, [r6, r3]	@ zero_extendqisi2
 	mov	r0, r8
@@ -8235,44 +8289,44 @@ FlashReadIdbDataRaw:
 	muls	r1, r4, r1
 	bl	FlashReadRawPage
 	adds	r0, r0, #1
-	bne	.L1151
+	bne	.L1168
 	adds	r6, r6, #1
 	cmp	r6, #4
-	bne	.L1152
-.L1153:
+	bne	.L1169
+.L1170:
 	adds	r4, r4, #1
-	b	.L1150
-.L1158:
+	b	.L1167
+.L1175:
 	movs	r7, #0
-	b	.L1154
-.L1151:
+	b	.L1171
+.L1168:
 	ldr	r3, [r5]
 	ldr	r2, [r3]
-	ldr	r3, .L1160+20
+	ldr	r3, .L1177+20
 	cmp	r2, r3
-	bne	.L1153
+	bne	.L1170
 	mov	r1, r8
-	ldr	r0, .L1160+24
+	ldr	r0, .L1177+24
 	bl	printf
 	mov	r2, #2048
 	ldr	r1, [r5]
 	mov	r0, r10
 	bl	ftl_memcpy
 	ldr	r3, [r5]
-	ldr	r2, .L1160+12
+	ldr	r2, .L1177+12
 	ldr	r3, [r3, #512]
 	strb	r3, [r2]
-	ldr	r3, .L1160+28
+	ldr	r3, .L1177+28
 	ldr	r2, [r3]
 	cmp	r4, r2
-	bcs	.L1158
+	bcs	.L1175
 	str	r4, [r3]
 	movs	r7, #0
 	bl	FlashSavePhyInfo
-	b	.L1153
-.L1161:
+	b	.L1170
+.L1178:
 	.align	2
-.L1160:
+.L1177:
 	.word	.LANCHOR29
 	.word	.LANCHOR33
 	.word	1446522928
@@ -8296,34 +8350,34 @@ FlashPageProgMsbFFData:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
 	mov	r4, r2
-	ldr	r5, .L1172
+	ldr	r5, .L1189
 	mov	r6, r0
 	mov	r7, r1
 	ldr	r3, [r5]
 	ldrb	r2, [r3, #19]	@ zero_extendqisi2
-	ldr	r3, .L1172+4
+	ldr	r3, .L1189+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1163
-	ldr	r3, .L1172+8
+	cbz	r3, .L1180
+	ldr	r3, .L1189+8
 	ldr	r1, [r3]
-	ldr	r3, .L1172+12
+	ldr	r3, .L1189+12
 	cmp	r1, r3
-	beq	.L1162
-.L1163:
+	beq	.L1179
+.L1180:
 	subs	r3, r2, #5
 	uxtb	r3, r3
 	cmp	r3, #30
-	bhi	.L1164
-	ldr	r2, .L1172+16
+	bhi	.L1181
+	ldr	r2, .L1189+16
 	lsr	r3, r2, r3
 	lsls	r3, r3, #31
-	bmi	.L1166
+	bmi	.L1183
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L1167:
+.L1184:
 	ldrh	r2, [r10, r4, lsl #1]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1162
+	bne	.L1179
 	mov	r2, #32768
 	movs	r1, #255
 	ldr	r0, [r8]
@@ -8335,24 +8389,24 @@ FlashPageProgMsbFFData:
 	ldr	r2, [r8]
 	mov	r0, r6
 	bl	FlashProgPage
-.L1168:
+.L1185:
 	ldr	r3, [r5]
 	ldrh	r3, [r3, #10]
 	cmp	r3, r4
-	bhi	.L1167
+	bhi	.L1184
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L1164:
+.L1181:
 	cmp	r2, #68
-	bne	.L1162
-.L1166:
-	ldr	r10, .L1172+20
-	ldr	r8, .L1172+24
-	b	.L1168
-.L1162:
+	bne	.L1179
+.L1183:
+	ldr	r10, .L1189+20
+	ldr	r8, .L1189+24
+	b	.L1185
+.L1179:
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L1173:
+.L1190:
 	.align	2
-.L1172:
+.L1189:
 	.word	.LANCHOR18
 	.word	.LANCHOR8
 	.word	.LANCHOR29
@@ -8378,45 +8432,45 @@ idb_write_data:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	cmp	r2, #63
 	sub	sp, sp, #104
-	bls	.L1175
+	bls	.L1192
 	cmp	r0, #576
-	bcs	.L1176
-	ldr	r2, .L1227
+	bcs	.L1193
+	ldr	r2, .L1244
 	cmp	r0, #64
 	mov	r4, #1
 	str	r4, [r2]
-	bhi	.L1177
+	bhi	.L1194
 	rsb	r0, r0, #64
 	subs	r2, r3, r0
 	add	r1, r1, r0, lsl #9
-	ldr	r0, .L1227+4
+	ldr	r0, .L1244+4
 	lsls	r2, r2, #9
-.L1226:
+.L1243:
 	bl	ftl_memcpy
-.L1215:
+.L1232:
 	movs	r0, #0
 	add	sp, sp, #104
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1177:
+.L1194:
 	rsb	r2, r0, #576
 	subs	r0, r0, #64
 	cmp	r2, r3
 	it	cs
 	movcs	r2, r3
-	ldr	r3, .L1227+4
+	ldr	r3, .L1244+4
 	lsls	r2, r2, #9
 	add	r0, r3, r0, lsl #9
-	b	.L1226
-.L1175:
+	b	.L1243
+.L1192:
 	cmp	r0, #576
-	bcc	.L1215
-.L1176:
-	ldr	r3, .L1227
+	bcc	.L1232
+.L1193:
+	ldr	r3, .L1244
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L1215
-	ldr	r3, .L1227+8
+	beq	.L1232
+	ldr	r3, .L1244+8
 	ldr	r2, [r3]
 	ldrb	r3, [r2, #9]	@ zero_extendqisi2
 	ldrh	r2, [r2, #10]
@@ -8426,14 +8480,14 @@ idb_write_data:
 	addw	r0, r3, #511
 	str	r3, [sp, #8]
 	bl	__aeabi_uidiv
-	ldr	r1, .L1227+4
+	ldr	r1, .L1244+4
 	movs	r3, #0
 	str	r0, [sp, #20]
 	movw	r2, #65535
 	mov	r0, r1
-.L1181:
+.L1198:
 	ldr	r4, [r1, r2, lsl #2]
-	cbnz	r4, .L1179
+	cbnz	r4, .L1196
 	ldr	r4, [r1, r3, lsl #2]
 	adds	r3, r3, #1
 	cmp	r3, #4096
@@ -8442,13 +8496,13 @@ idb_write_data:
 	str	r4, [r1, r2, lsl #2]
 	subs	r2, r2, #1
 	cmp	r2, #4096
-	bne	.L1181
-.L1179:
+	bne	.L1198
+.L1196:
 	ldr	r1, [r0, r2, lsl #2]
 	mov	r3, #512
-	ldr	r0, .L1227+12
+	ldr	r0, .L1244+12
 	bl	printf
-	ldr	r3, .L1227+16
+	ldr	r3, .L1244+16
 	ldr	r2, [sp, #8]
 	ldr	r3, [r3]
 	str	r3, [sp, #16]
@@ -8459,35 +8513,35 @@ idb_write_data:
 	mul	r4, r3, r2
 	movs	r3, #0
 	str	r3, [sp, #12]
-.L1182:
+.L1199:
 	ldr	r3, [sp, #16]
 	cmp	r3, #15
-	bls	.L1199
+	bls	.L1216
 	ldr	r3, [sp, #12]
-	cbnz	r3, .L1201
+	cbnz	r3, .L1218
 	mov	r1, r3
-	ldr	r0, .L1227+20
+	ldr	r0, .L1244+20
 	bl	printf
-.L1201:
-	ldr	r3, .L1227
+.L1218:
+	ldr	r3, .L1244
 	movs	r2, #0
 	str	r2, [r3]
-	b	.L1215
-.L1228:
+	b	.L1232
+.L1245:
 	.align	2
-.L1227:
+.L1244:
 	.word	.LANCHOR154
 	.word	idb_buf
 	.word	.LANCHOR18
 	.word	.LC15
 	.word	.LANCHOR149
 	.word	.LC17
-.L1199:
+.L1216:
 	mov	r2, #512
 	movs	r1, #0
-	ldr	r0, .L1229
+	ldr	r0, .L1246
 	bl	memset
-	ldr	r3, .L1229+4
+	ldr	r3, .L1246+4
 	mov	r0, r4
 	ldr	r3, [r3]
 	ldrb	fp, [r3, #9]	@ zero_extendqisi2
@@ -8496,61 +8550,61 @@ idb_write_data:
 	smulbb	r5, r5, fp
 	uxth	r5, r5
 	cmp	r5, #512
-	bcs	.L1183
+	bcs	.L1200
 	adds	r0, r5, r4
 	bl	FW_FlashBlockErase.constprop.41
-.L1183:
-	ldr	r7, .L1229+8
+.L1200:
+	ldr	r7, .L1246+8
 	mov	r1, r5
-	ldr	r10, .L1229+36
+	ldr	r10, .L1246+36
 	mov	r0, r4
 	bl	__aeabi_uidivmod
 	mov	r6, r1
 	subs	r3, r4, r1
 	str	r3, [sp, #24]
-.L1187:
+.L1204:
 	lsrs	r2, r6, #2
-	beq	.L1184
-	ldr	r0, .L1229+12
+	beq	.L1201
+	ldr	r0, .L1246+12
 	adds	r1, r2, #1
-	ldr	r3, .L1229+16
+	ldr	r3, .L1246+16
 	ldrb	r0, [r0]	@ zero_extendqisi2
 	ldrh	r3, [r3, r1, lsl #1]
-	cbz	r0, .L1185
+	cbz	r0, .L1202
 	ldr	r0, [r10]
-	ldr	r5, .L1229+20
+	ldr	r5, .L1246+20
 	cmp	r0, r5
 	it	eq
 	moveq	r3, r1
-.L1185:
+.L1202:
 	add	r3, r3, #1073741824
 	subs	r3, r3, #1
 	lsls	r3, r3, #2
 	str	r3, [sp, #40]
-.L1184:
+.L1201:
 	movw	r3, #61424
 	str	r3, [sp, #44]
-	ldr	r3, .L1229+16
+	ldr	r3, .L1246+16
 	ldrh	r5, [r3, r2, lsl #1]
-	ldr	r3, .L1229+12
+	ldr	r3, .L1246+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1186
+	cbz	r3, .L1203
 	ldr	r3, [r10]
-	ldr	r1, .L1229+20
+	ldr	r1, .L1246+20
 	cmp	r3, r1
 	it	eq
 	moveq	r5, r2
-.L1186:
+.L1203:
 	ldr	r3, [sp, #24]
 	adds	r6, r6, #4
-	ldr	r2, .L1229+24
-	ldr	r8, .L1229+4
+	ldr	r2, .L1246+24
+	ldr	r8, .L1246+4
 	mla	r3, r5, fp, r3
 	adds	r5, r5, #1
 	uxth	r5, r5
 	str	r3, [sp, #32]
 	ldrb	r3, [r2]	@ zero_extendqisi2
-	ldr	r2, .L1229+28
+	ldr	r2, .L1246+28
 	str	r3, [sp, #28]
 	ldrb	r0, [r2]	@ zero_extendqisi2
 	bl	FlashBchSel
@@ -8578,12 +8632,12 @@ idb_write_data:
 	mov	r1, r0
 	movs	r0, #0
 	bl	FlashPageProgMsbFFData
-	ldr	r3, .L1229+32
+	ldr	r3, .L1246+32
 	cmp	r7, r3
-	bne	.L1187
+	bne	.L1204
 	ldr	r3, [r8]
 	mov	r0, r4
-	ldr	r7, .L1229
+	ldr	r7, .L1246
 	movs	r6, #0
 	ldrb	r8, [r3, #9]	@ zero_extendqisi2
 	ldrh	r1, [r3, #10]
@@ -8595,47 +8649,47 @@ idb_write_data:
 	subs	r3, r4, r1
 	str	r3, [sp, #28]
 	ubfx	r5, r5, #2, #2
-.L1188:
+.L1205:
 	cmp	r6, #512
-	bcs	.L1195
-	ldr	r1, .L1229+12
+	bcs	.L1212
+	ldr	r1, .L1246+12
 	rsb	r3, r5, #4
 	uxth	r3, r3
-	ldr	r2, .L1229+16
+	ldr	r2, .L1246+16
 	ldrb	r1, [r1]	@ zero_extendqisi2
 	str	r3, [sp, #24]
 	add	r3, r10, r6
 	lsrs	r3, r3, #2
 	ldrh	r2, [r2, r3, lsl #1]
-	cbz	r1, .L1189
-	ldr	r1, .L1229+36
-	ldr	r0, .L1229+20
+	cbz	r1, .L1206
+	ldr	r1, .L1246+36
+	ldr	r0, .L1246+20
 	ldr	r1, [r1]
 	cmp	r1, r0
 	it	eq
 	moveq	r2, r3
-.L1189:
+.L1206:
 	ldr	r3, [sp, #28]
 	add	r5, r5, r3
-	ldr	r3, .L1229+24
+	ldr	r3, .L1246+24
 	mla	r5, r2, r8, r5
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r3, [sp, #32]
-	ldr	r3, .L1229+4
+	ldr	r3, .L1246+4
 	ldr	r3, [r3]
 	ldrb	fp, [r3, #9]	@ zero_extendqisi2
-	ldr	r3, .L1229+40
+	ldr	r3, .L1246+40
 	ldrh	r2, [r3, #26]
-	ldr	r3, .L1229+44
+	ldr	r3, .L1246+44
 	ldr	r3, [r3]
 	muls	r3, r2, r3
 	mul	r3, fp, r3
 	cmp	r5, r3
-	bcs	.L1190
-	ldr	r3, .L1229+28
+	bcs	.L1207
+	ldr	r3, .L1246+28
 	ldrb	r0, [r3]	@ zero_extendqisi2
 	bl	FlashBchSel
-.L1190:
+.L1207:
 	movs	r0, #0
 	bl	flash_boot_enter_slc_mode
 	mov	r1, fp
@@ -8649,11 +8703,11 @@ idb_write_data:
 	bl	FlashReadPage
 	adds	r3, r0, #1
 	mov	r5, r0
-	bne	.L1191
-	ldr	r3, .L1229+28
+	bne	.L1208
+	ldr	r3, .L1246+28
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #40
-	beq	.L1191
+	beq	.L1208
 	movs	r0, #40
 	bl	FlashBchSel
 	add	r3, sp, #40
@@ -8662,7 +8716,7 @@ idb_write_data:
 	movs	r0, #0
 	bl	FlashReadPage
 	mov	r5, r0
-.L1191:
+.L1208:
 	movs	r0, #0
 	bl	flash_boot_exit_slc_mode
 	ldr	r0, [sp, #32]
@@ -8671,63 +8725,63 @@ idb_write_data:
 	mov	r5, #-1
 	it	ne
 	movne	r5, #0
-	cbz	r5, .L1192
-.L1195:
-	ldr	r3, .L1229+8
+	cbz	r5, .L1209
+.L1212:
+	ldr	r3, .L1246+8
 	movs	r5, #0
-	ldr	r6, .L1229
-.L1193:
+	ldr	r6, .L1246
+.L1210:
 	mov	r7, r3
 	ldr	r1, [r6, r5, lsl #2]
 	ldr	r2, [r7]
 	adds	r3, r3, #4
 	cmp	r1, r2
-	beq	.L1196
+	beq	.L1213
 	mov	r2, #512
 	movs	r1, #0
-	ldr	r0, .L1229
+	ldr	r0, .L1246
 	bl	memset
 	str	r5, [sp]
 	mov	r1, r4
 	ldr	r3, [r7]
 	ldr	r2, [r6, r5, lsl #2]
-	ldr	r0, .L1229+48
+	ldr	r0, .L1246+48
 	bl	printf
 	mov	r0, r4
 	bl	FW_FlashBlockErase.constprop.41
 	ldr	r3, [sp, #20]
 	cmp	r3, #1
-	bls	.L1197
+	bls	.L1214
 	ldr	r3, [sp, #8]
 	adds	r0, r3, r4
 	bl	FW_FlashBlockErase.constprop.41
-.L1197:
+.L1214:
 	ldr	r3, [sp, #16]
 	ldr	r2, [sp, #20]
 	add	r3, r3, r2
 	str	r3, [sp, #16]
 	ldr	r3, [sp, #36]
 	add	r4, r4, r3
-	b	.L1182
-.L1192:
+	b	.L1199
+.L1209:
 	ldr	r3, [sp, #24]
 	add	r6, r6, r3
 	add	r7, r7, r3, lsl #9
 	uxth	r6, r6
-	b	.L1188
-.L1196:
+	b	.L1205
+.L1213:
 	adds	r5, r5, #1
 	cmp	r5, #65536
-	bne	.L1193
+	bne	.L1210
 	ldr	r3, [sp, #12]
 	adds	r3, r3, #1
 	cmp	r3, #5
 	str	r3, [sp, #12]
-	bls	.L1197
-	b	.L1201
-.L1230:
+	bls	.L1214
+	b	.L1218
+.L1247:
 	.align	2
-.L1229:
+.L1246:
 	.word	gp_flash_check_buf
 	.word	.LANCHOR18
 	.word	idb_buf
@@ -8768,11 +8822,11 @@ rknand_get_clk_rate:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r0, .L1233
+	ldr	r0, .L1250
 	bx	lr
-.L1234:
+.L1251:
 	.align	2
-.L1233:
+.L1250:
 	.word	148000000
 	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
 	.section	.text.ftl_malloc,"ax",%progbits
@@ -8803,9 +8857,9 @@ NandcInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r2, #1
-	ldr	r3, .L1238
+	ldr	r3, .L1255
 	movs	r4, #0
-	ldr	r5, .L1238+4
+	ldr	r5, .L1255+4
 	str	r2, [r3, #12]
 	movs	r2, #2
 	str	r2, [r3, #20]
@@ -8815,8 +8869,8 @@ NandcInit:
 	str	r0, [r3, #16]
 	str	r2, [r3, #28]
 	str	r0, [r3, #24]
-	ldr	r3, .L1238+8
-	ldr	r2, .L1238+12
+	ldr	r3, .L1255+8
+	ldr	r2, .L1255+12
 	str	r0, [r3]
 	ldr	r3, [r0]
 	and	r3, r3, #253952
@@ -8825,7 +8879,7 @@ NandcInit:
 	str	r1, [r2]
 	orr	r3, r3, #256
 	ldr	r2, [r0, #352]
-	ldr	r1, .L1238+16
+	ldr	r1, .L1255+16
 	ubfx	r2, r2, #16, #4
 	str	r2, [r1]
 	ldr	r2, [r0, #352]
@@ -8841,23 +8895,23 @@ NandcInit:
 	str	r3, [r0, #4]
 	movw	r3, #8322
 	str	r3, [r0, #344]
-	ldr	r3, .L1238+20
+	ldr	r3, .L1255+20
 	str	r3, [r0, #304]
 	mov	r0, #36864
 	bl	ftl_malloc
-	ldr	r3, .L1238+24
+	ldr	r3, .L1255+24
 	str	r0, [r3]
-	ldr	r3, .L1238+28
+	ldr	r3, .L1255+28
 	str	r0, [r3]
 	add	r0, r0, #32768
 	str	r0, [r3, #4]
 	str	r4, [r3, #24]
-	ldr	r3, .L1238+32
+	ldr	r3, .L1255+32
 	str	r4, [r3]
 	pop	{r3, r4, r5, pc}
-.L1239:
+.L1256:
 	.align	2
-.L1238:
+.L1255:
 	.word	.LANCHOR6
 	.word	.LANCHOR29
 	.word	.LANCHOR19
@@ -8879,114 +8933,114 @@ NandcInit:
 FtlMemInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1245
+	ldr	r3, .L1262
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r2, .L1245+4
+	ldr	r2, .L1262+4
 	movs	r6, #12
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L1245+8
-	ldr	r5, .L1245+12
-	ldr	r10, .L1245+304
+	ldr	r3, .L1262+8
+	ldr	r5, .L1262+12
+	ldr	r10, .L1262+304
 	str	r4, [r3]
-	ldr	r3, .L1245+16
-	ldr	r8, .L1245+308
-	ldr	fp, .L1245+312
+	ldr	r3, .L1262+16
+	ldr	r8, .L1262+308
+	ldr	fp, .L1262+312
 	str	r4, [r3]
-	ldr	r3, .L1245+20
+	ldr	r3, .L1262+20
 	str	r4, [r3]
-	ldr	r3, .L1245+24
+	ldr	r3, .L1262+24
 	str	r4, [r3]
-	ldr	r3, .L1245+28
+	ldr	r3, .L1262+28
 	str	r4, [r3]
-	ldr	r3, .L1245+32
+	ldr	r3, .L1262+32
 	str	r4, [r3]
-	ldr	r3, .L1245+36
+	ldr	r3, .L1262+36
 	str	r4, [r3]
-	ldr	r3, .L1245+40
+	ldr	r3, .L1262+40
 	str	r4, [r3]
-	ldr	r3, .L1245+44
+	ldr	r3, .L1262+44
 	str	r4, [r3]
-	ldr	r3, .L1245+48
+	ldr	r3, .L1262+48
 	str	r4, [r3]
-	ldr	r3, .L1245+52
+	ldr	r3, .L1262+52
 	str	r4, [r3]
-	ldr	r3, .L1245+56
+	ldr	r3, .L1262+56
 	str	r4, [r3]
-	ldr	r3, .L1245+60
+	ldr	r3, .L1262+60
 	str	r4, [r3]
-	ldr	r3, .L1245+64
+	ldr	r3, .L1262+64
 	str	r4, [r3]
-	ldr	r3, .L1245+68
+	ldr	r3, .L1262+68
 	str	r4, [r3]
-	ldr	r3, .L1245+72
+	ldr	r3, .L1262+72
 	str	r4, [r3]
-	ldr	r3, .L1245+76
+	ldr	r3, .L1262+76
 	str	r4, [r3]
 	movw	r3, #65535
 	str	r3, [r2]
-	ldr	r2, .L1245+80
+	ldr	r2, .L1262+80
 	str	r4, [r2]
-	ldr	r2, .L1245+84
+	ldr	r2, .L1262+84
 	str	r4, [r2]
-	ldr	r2, .L1245+88
+	ldr	r2, .L1262+88
 	str	r4, [r2]
-	ldr	r2, .L1245+92
+	ldr	r2, .L1262+92
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L1245+96
+	ldr	r2, .L1262+96
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L1245+100
+	ldr	r2, .L1262+100
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L1245+104
+	ldr	r2, .L1262+104
 	strh	r3, [r2]	@ movhi
 	movs	r2, #32
-	ldr	r3, .L1245+108
+	ldr	r3, .L1262+108
 	strh	r2, [r3]	@ movhi
 	movs	r2, #128
-	ldr	r3, .L1245+112
+	ldr	r3, .L1262+112
 	strh	r2, [r3]	@ movhi
-	ldr	r3, .L1245+116
+	ldr	r3, .L1262+116
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L1245+120
+	ldr	r3, .L1262+120
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L1245+124
+	ldr	r3, .L1262+124
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L1245+128
+	ldr	r3, .L1262+128
 	strh	r4, [r3]	@ movhi
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L1245+132
+	ldr	r3, .L1262+132
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	movs	r5, #36
 	muls	r0, r6, r0
 	bl	ftl_malloc
-	ldr	r3, .L1245+136
+	ldr	r3, .L1262+136
 	str	r0, [r3]
 	ldrh	r3, [r10]
 	muls	r5, r3, r5
 	lsls	r7, r5, #2
 	mov	r0, r7
 	bl	ftl_malloc
-	ldr	r3, .L1245+140
+	ldr	r3, .L1262+140
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1245+144
+	ldr	r3, .L1262+144
 	str	r0, [r3]
 	mov	r0, r7
 	bl	ftl_malloc
-	ldr	r3, .L1245+148
-	ldr	r7, .L1245+152
+	ldr	r3, .L1262+148
+	ldr	r7, .L1262+152
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1245+156
+	ldr	r3, .L1262+156
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1245+160
+	ldr	r3, .L1262+160
 	ldrh	r5, [r7]
 	str	r0, [r3]
 	ldrh	r3, [r10]
@@ -8995,157 +9049,157 @@ FtlMemInit:
 	adds	r3, r3, #1
 	str	r3, [r8]
 	bl	ftl_malloc
-	ldr	r3, .L1245+164
+	ldr	r3, .L1262+164
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1245+168
+	ldr	r3, .L1262+168
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1245+172
+	ldr	r3, .L1262+172
 	str	r0, [r3]
 	ldr	r0, [r8]
 	muls	r0, r5, r0
 	bl	ftl_malloc
-	ldr	r3, .L1245+176
+	ldr	r3, .L1262+176
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1245+180
+	ldr	r3, .L1262+180
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1245+184
+	ldr	r3, .L1262+184
 	str	r0, [r3]
 	ldr	r0, [r8]
 	muls	r0, r6, r0
 	bl	ftl_malloc
-	ldr	r3, .L1245+188
+	ldr	r3, .L1262+188
 	ldrh	r5, [r10]
-	ldr	r10, .L1245+316
+	ldr	r10, .L1262+316
 	str	r0, [r3]
 	ldrh	r3, [fp]
 	muls	r5, r3, r5
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1245+192
+	ldr	r3, .L1262+192
 	str	r0, [r3]
 	lsls	r0, r5, #2
-	ldr	r5, .L1245+196
+	ldr	r5, .L1262+196
 	bl	ftl_malloc
-	ldr	r3, .L1245+200
+	ldr	r3, .L1262+200
 	str	r0, [r3]
 	ldrh	r3, [fp]
 	ldr	r0, [r8]
-	ldr	r8, .L1245+320
+	ldr	r8, .L1262+320
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L1245+204
+	ldr	r3, .L1262+204
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	uxth	r0, r0
 	strh	r0, [r8]	@ movhi
 	bl	ftl_malloc
-	ldr	r3, .L1245+208
+	ldr	r3, .L1262+208
 	str	r0, [r3]
 	ldrh	r3, [r8]
-	ldr	r0, .L1245+212
+	ldr	r0, .L1262+212
 	addw	r3, r3, #547
 	lsrs	r3, r3, #9
 	and	r0, r0, r3, lsl #9
 	strh	r3, [r8]	@ movhi
 	bl	ftl_malloc
-	ldr	r3, .L1245+216
+	ldr	r3, .L1262+216
 	str	r0, [r3]
 	adds	r0, r0, #32
-	ldr	r3, .L1245+220
+	ldr	r3, .L1262+220
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L1245+224
+	ldr	r3, .L1262+224
 	str	r0, [r3]
 	ldr	r3, [r10]
 	lsl	r8, r3, #1
 	mov	r0, r8
 	bl	ftl_malloc
-	ldr	r3, .L1245+228
+	ldr	r3, .L1262+228
 	str	r0, [r3]
 	mov	r0, r8
 	bl	ftl_malloc
-	ldr	r3, .L1245+232
-	ldr	r8, .L1245+324
+	ldr	r3, .L1262+232
+	ldr	r8, .L1262+324
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	lsrs	r0, r0, #3
 	adds	r0, r0, #4
 	bl	ftl_malloc
-	ldr	r3, .L1245+236
+	ldr	r3, .L1262+236
 	str	r0, [r3]
 	ldrh	r0, [r8]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L1245+240
+	ldr	r3, .L1262+240
 	str	r0, [r3]
 	ldrh	r0, [r8]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L1245+244
+	ldr	r3, .L1262+244
 	str	r0, [r3]
 	ldrh	r0, [r8]
-	ldr	r8, .L1245+328
+	ldr	r8, .L1262+328
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L1245+248
+	ldr	r3, .L1262+248
 	str	r0, [r3]
 	ldrh	r0, [r8]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
 	ldrh	r2, [r8]
 	mov	r1, r4
-	ldr	r3, .L1245+252
+	ldr	r3, .L1262+252
 	lsls	r2, r2, #2
 	str	r0, [r3]
 	bl	ftl_memset
-	ldr	r3, .L1245+256
+	ldr	r3, .L1262+256
 	ldrh	r4, [r3]
 	lsls	r4, r4, #2
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L1245+260
+	ldr	r3, .L1262+260
 	str	r0, [r3]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L1245+264
-	ldr	r4, .L1245+268
+	ldr	r3, .L1262+264
+	ldr	r4, .L1262+268
 	str	r0, [r3]
 	ldr	r0, [r10]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L1245+272
+	ldr	r3, .L1262+272
 	str	r0, [r3]
 	ldrh	r0, [r4]
 	muls	r0, r6, r0
-	ldr	r6, .L1245+276
+	ldr	r6, .L1262+276
 	bl	ftl_malloc
-	ldr	r3, .L1245+280
+	ldr	r3, .L1262+280
 	str	r0, [r3]
 	ldrh	r3, [r4]
 	ldrh	r0, [r7]
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L1245+284
+	ldr	r3, .L1262+284
 	str	r0, [r3]
 	movs	r0, #6
 	ldrh	r3, [r5]
-	ldr	r5, .L1245+288
+	ldr	r5, .L1262+288
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L1245+292
+	ldr	r3, .L1262+292
 	str	r0, [r3]
-	ldr	r3, .L1245+296
+	ldr	r3, .L1262+296
 	ldrh	r0, [r3]
 	ldrh	r3, [r6]
 	adds	r0, r0, #31
@@ -9156,15 +9210,15 @@ FtlMemInit:
 	bl	ftl_malloc
 	ldrh	r1, [r5]
 	movs	r2, #1
-	ldr	r3, .L1245+300
+	ldr	r3, .L1262+300
 	ldrh	r6, [r6]
 	lsls	r1, r1, #2
 	mov	r4, r3
 	str	r0, [r4, #28]!
-	b	.L1246
-.L1247:
+	b	.L1263
+.L1264:
 	.align	2
-.L1245:
+.L1262:
 	.word	.LANCHOR139
 	.word	.LANCHOR173
 	.word	.LANCHOR157
@@ -9248,33 +9302,33 @@ FtlMemInit:
 	.word	.LANCHOR190
 	.word	.LANCHOR62
 	.word	.LANCHOR63
-.L1246:
+.L1263:
 	mov	r0, r1
-.L1241:
+.L1258:
 	cmp	r2, r6
-	bcc	.L1242
+	bcc	.L1259
 	add	r3, r3, r2, lsl #2
-	ldr	r2, .L1248
+	ldr	r2, .L1265
 	movs	r1, #0
 	adds	r3, r3, #24
-.L1243:
+.L1260:
 	cmp	r3, r2
-	bne	.L1244
+	bne	.L1261
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1242:
+.L1259:
 	ldr	r5, [r3, #28]
 	adds	r2, r2, #1
 	add	r5, r5, r0
 	add	r0, r0, r1
 	str	r5, [r4, #4]!
-	b	.L1241
-.L1244:
+	b	.L1258
+.L1261:
 	str	r1, [r3, #4]!
-	b	.L1243
-.L1249:
+	b	.L1260
+.L1266:
 	.align	2
-.L1248:
+.L1265:
 	.word	.LANCHOR75+56
 	.size	FtlMemInit, .-FtlMemInit
 	.section	.text.ftl_free,"ax",%progbits
@@ -9374,12 +9428,12 @@ rk_ftl_get_capacity:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L1256
+	ldr	r3, .L1273
 	ldr	r0, [r3]
 	bx	lr
-.L1257:
+.L1274:
 	.align	2
-.L1256:
+.L1273:
 	.word	.LANCHOR69
 	.size	rk_ftl_get_capacity, .-rk_ftl_get_capacity
 	.section	.text.rknand_print_hex,"ax",%progbits
@@ -9395,51 +9449,51 @@ rknand_print_hex:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r5, #0
-	ldr	r7, .L1267
+	ldr	r7, .L1284
 	mov	fp, r0
 	mov	r6, r1
 	mov	r8, r2
 	mov	r10, r3
 	mov	r4, r5
-.L1259:
+.L1276:
 	cmp	r4, r10
-	bne	.L1265
-	ldr	r1, .L1267+4
-	ldr	r0, .L1267+8
+	bne	.L1282
+	ldr	r1, .L1284+4
+	ldr	r0, .L1284+8
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
 	b	printf
-.L1265:
-	cbnz	r5, .L1260
+.L1282:
+	cbnz	r5, .L1277
 	mov	r2, r4
 	mov	r1, fp
-	ldr	r0, .L1267+12
+	ldr	r0, .L1284+12
 	bl	printf
-.L1260:
+.L1277:
 	cmp	r8, #4
-	bne	.L1261
+	bne	.L1278
 	ldr	r1, [r6, r4, lsl #2]
-.L1266:
+.L1283:
 	mov	r0, r7
 	adds	r5, r5, #1
 	bl	printf
 	cmp	r5, #15
-	bls	.L1264
+	bls	.L1281
 	movs	r5, #0
-	ldr	r1, .L1267+4
-	ldr	r0, .L1267+8
+	ldr	r1, .L1284+4
+	ldr	r0, .L1284+8
 	bl	printf
-.L1264:
+.L1281:
 	adds	r4, r4, #1
-	b	.L1259
-.L1261:
+	b	.L1276
+.L1278:
 	cmp	r8, #2
 	ite	eq
 	ldrsheq	r1, [r6, r4, lsl #1]
 	ldrbne	r1, [r6, r4]	@ zero_extendqisi2
-	b	.L1266
-.L1268:
+	b	.L1283
+.L1285:
 	.align	2
-.L1267:
+.L1284:
 	.word	.LC19
 	.word	.LC20
 	.word	.LC7
@@ -9458,7 +9512,7 @@ HynixGetReadRetryDefault:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #172
-	ldr	r5, .L1368
+	ldr	r5, .L1385
 	cmp	r0, #2
 	mov	r1, #173
 	mov	r2, #174
@@ -9470,18 +9524,18 @@ HynixGetReadRetryDefault:
 	strb	r1, [r5, #5]
 	strb	r2, [r5, #6]
 	strb	r3, [r5, #7]
-	bne	.L1270
+	bne	.L1287
 	movs	r3, #167
 	movs	r2, #247
 	strb	r3, [r5, #4]
-	ldr	r3, .L1368+4
+	ldr	r3, .L1385+4
 	strb	r2, [r3, #17]
-.L1326:
+.L1343:
 	mov	r10, #7
-	b	.L1362
-.L1270:
+	b	.L1379
+.L1287:
 	cmp	r0, #3
-	bne	.L1272
+	bne	.L1289
 	movs	r3, #176
 	strb	r3, [r5, #4]
 	movs	r3, #177
@@ -9497,31 +9551,31 @@ HynixGetReadRetryDefault:
 	movs	r3, #182
 	strb	r3, [r5, #10]
 	movs	r3, #183
-.L1363:
+.L1380:
 	mov	r10, #8
 	strb	r3, [r5, #11]
 	mov	fp, r10
-.L1271:
+.L1288:
 	subs	r3, r4, #1
 	cmp	r3, #1
-	bhi	.L1276
+	bhi	.L1293
 	mov	r8, #0
-.L1277:
-	ldr	r3, .L1368+8
+.L1294:
+	ldr	r3, .L1385+8
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	uxtb	r3, r8
 	cmp	r2, r3
-	bhi	.L1283
-.L1284:
-	ldr	r3, .L1368
+	bhi	.L1300
+.L1301:
+	ldr	r3, .L1385
 	strb	fp, [r3, #1]
 	strb	r10, [r3, #2]
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1272:
+.L1289:
 	cmp	r0, #4
-	bne	.L1273
+	bne	.L1290
 	movs	r0, #204
 	strb	r1, [r5, #9]
 	strb	r0, [r5, #4]
@@ -9534,10 +9588,10 @@ HynixGetReadRetryDefault:
 	movs	r0, #205
 	strb	r0, [r5, #8]
 	strb	r2, [r5, #10]
-	b	.L1363
-.L1273:
+	b	.L1380
+.L1290:
 	cmp	r0, #5
-	bne	.L1274
+	bne	.L1291
 	movs	r3, #56
 	mov	r10, #8
 	strb	r3, [r5, #4]
@@ -9547,12 +9601,12 @@ HynixGetReadRetryDefault:
 	strb	r3, [r5, #6]
 	movs	r3, #59
 	strb	r3, [r5, #7]
-.L1362:
+.L1379:
 	mov	fp, #4
-	b	.L1271
-.L1274:
+	b	.L1288
+.L1291:
 	cmp	r0, #6
-	bne	.L1275
+	bne	.L1292
 	movs	r3, #14
 	mov	r10, #12
 	strb	r3, [r5, #4]
@@ -9562,10 +9616,10 @@ HynixGetReadRetryDefault:
 	strb	r3, [r5, #6]
 	movs	r3, #17
 	strb	r3, [r5, #7]
-	b	.L1362
-.L1275:
+	b	.L1379
+.L1292:
 	cmp	r0, #7
-	bne	.L1326
+	bne	.L1343
 	movs	r3, #176
 	mov	r10, #12
 	strb	r3, [r5, #4]
@@ -9588,12 +9642,12 @@ HynixGetReadRetryDefault:
 	movs	r3, #213
 	strb	r3, [r5, #13]
 	mov	fp, #10
-	b	.L1271
-.L1283:
-	ldr	r2, .L1368+12
+	b	.L1288
+.L1300:
+	ldr	r2, .L1385+12
 	movs	r6, #0
 	ldrb	r2, [r2, r3]	@ zero_extendqisi2
-	ldr	r3, .L1368+16
+	ldr	r3, .L1385+16
 	ldr	r7, [r3, r2, lsl #3]
 	add	r4, r5, r2, lsl #6
 	add	r3, r3, r2, lsl #3
@@ -9602,7 +9656,7 @@ HynixGetReadRetryDefault:
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
 	add	r7, r7, r3, lsl #8
 	addw	r3, r7, #2056
-.L1278:
+.L1295:
 	adds	r1, r5, r6
 	str	r2, [r3]
 	ldrb	r1, [r1, #4]	@ zero_extendqisi2
@@ -9618,25 +9672,25 @@ HynixGetReadRetryDefault:
 	adds	r6, r6, #1
 	uxtb	r1, r6
 	cmp	fp, r1
-	bhi	.L1278
-	ldr	r7, .L1368+4
+	bhi	.L1295
+	ldr	r7, .L1385+4
 	mov	r1, r4
 	movs	r2, #0
-.L1281:
+.L1298:
 	movs	r3, #1
 	adds	r6, r7, r2
-.L1280:
+.L1297:
 	ldrb	r0, [r6, r3, lsl #2]	@ zero_extendqisi2
 	ldrb	ip, [r1]	@ zero_extendqisi2
 	add	r0, r0, ip
 	strb	r0, [r1, r3, lsl #3]
 	adds	r3, r3, #1
 	cmp	r3, #7
-	bne	.L1280
+	bne	.L1297
 	adds	r2, r2, #1
 	adds	r1, r1, #1
 	cmp	r2, #4
-	bne	.L1281
+	bne	.L1298
 	movs	r3, #0
 	add	r8, r8, #1
 	strb	r3, [r4, #16]
@@ -9646,11 +9700,11 @@ HynixGetReadRetryDefault:
 	strb	r3, [r4, #48]
 	strb	r3, [r4, #41]
 	strb	r3, [r4, #49]
-	b	.L1277
-.L1276:
+	b	.L1294
+.L1293:
 	subs	r3, r4, #3
 	cmp	r3, #4
-	bhi	.L1284
+	bhi	.L1301
 	smulbb	r3, r10, fp
 	asrs	r2, r3, #2
 	lsls	r3, r3, #4
@@ -9661,19 +9715,19 @@ HynixGetReadRetryDefault:
 	lsls	r3, r2, #2
 	str	r3, [sp, #32]
 	movs	r3, #0
-.L1367:
+.L1384:
 	str	r3, [sp, #28]
 	ldrb	r3, [sp, #28]	@ zero_extendqisi2
 	str	r3, [sp, #16]
-	ldr	r3, .L1368+8
+	ldr	r3, .L1385+8
 	ldr	r2, [sp, #16]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r2
-	bls	.L1284
+	bls	.L1301
 	ldr	r2, [sp, #16]
-	ldr	r3, .L1368+12
+	ldr	r3, .L1385+12
 	ldrb	r8, [r3, r2]	@ zero_extendqisi2
-	ldr	r3, .L1368+16
+	ldr	r3, .L1385+16
 	mov	r0, r8
 	ldr	r2, [r3, r8, lsl #3]
 	add	r3, r3, r8, lsl #3
@@ -9686,7 +9740,7 @@ HynixGetReadRetryDefault:
 	movs	r2, #255
 	str	r2, [r3, #2056]
 	bl	NandcWaitFlashReady
-	ldr	r1, .L1368
+	ldr	r1, .L1385
 	cmp	r4, #7
 	it	eq
 	moveq	r3, #160
@@ -9702,25 +9756,25 @@ HynixGetReadRetryDefault:
 	add	r3, r3, r2, lsl #8
 	mov	r2, #54
 	str	r2, [r3, #2056]
-	bne	.L1288
+	bne	.L1305
 	movs	r2, #255
 	str	r2, [r3, #2052]
 	movs	r2, #64
 	str	r2, [r3, #2048]
 	movs	r2, #204
-.L1365:
+.L1382:
 	str	r2, [r3, #2052]
 	movs	r2, #77
-	b	.L1366
-.L1288:
+	b	.L1383
+.L1305:
 	subs	r2, r4, #5
 	cmp	r2, #1
-	bhi	.L1290
-	ldr	r2, .L1368
+	bhi	.L1307
+	ldr	r2, .L1385
 	ldrb	r2, [r2, #4]	@ zero_extendqisi2
 	str	r2, [r3, #2052]
 	movs	r2, #82
-.L1366:
+.L1383:
 	str	r2, [r3, #2048]
 	cmp	r4, #6
 	ldr	r3, [sp, #4]
@@ -9755,57 +9809,57 @@ HynixGetReadRetryDefault:
 	subs	r3, r4, #5
 	cmp	r3, #1
 	str	r3, [sp, #40]
-	bls	.L1327
+	bls	.L1344
 	cmp	r4, #7
 	ite	eq
 	moveq	r2, #32
 	movne	r2, #2
-.L1293:
-	ldr	r3, .L1368+20
+.L1310:
+	ldr	r3, .L1385+20
 	subs	r2, r2, #1
 	ldr	r3, [r3]
 	subs	r1, r3, #1
 	uxtab	r2, r3, r2
 	mov	r0, r1
-.L1294:
+.L1311:
 	ldr	r6, [r5, #2048]
 	strb	r6, [r0, #1]!
 	cmp	r2, r0
-	bne	.L1294
+	bne	.L1311
 	cmp	r4, #7
-	bne	.L1295
+	bne	.L1312
 	movs	r2, #0
-.L1297:
+.L1314:
 	ldrb	r0, [r3, r2, lsl #2]	@ zero_extendqisi2
 	uxtb	r1, r2
 	cmp	r0, #12
-	beq	.L1296
+	beq	.L1313
 	add	r0, r3, r2, lsl #2
 	ldrb	r0, [r0, #1]	@ zero_extendqisi2
 	cmp	r0, #10
-	beq	.L1296
+	beq	.L1313
 	adds	r2, r2, #1
 	cmp	r2, #8
-	bne	.L1297
-.L1298:
+	bne	.L1314
+.L1315:
 	movs	r1, #0
-	ldr	r0, .L1368+24
+	ldr	r0, .L1385+24
 	bl	printf
-.L1300:
-	b	.L1300
-.L1290:
+.L1317:
+	b	.L1317
+.L1307:
 	movs	r2, #174
 	str	r2, [r3, #2052]
 	movs	r2, #0
 	str	r2, [r3, #2048]
 	movs	r2, #176
-	b	.L1365
-.L1327:
+	b	.L1382
+.L1344:
 	movs	r2, #16
-	b	.L1293
-.L1369:
+	b	.L1310
+.L1386:
 	.align	2
-.L1368:
+.L1385:
 	.word	.LANCHOR20
 	.word	.LANCHOR196
 	.word	.LANCHOR25
@@ -9813,44 +9867,44 @@ HynixGetReadRetryDefault:
 	.word	.LANCHOR6
 	.word	.LANCHOR147
 	.word	.LC21
-.L1296:
+.L1313:
 	cmp	r1, #6
-	bhi	.L1298
-.L1299:
-	ldr	r3, .L1370
+	bhi	.L1315
+.L1316:
+	ldr	r3, .L1387
 	ldr	lr, [r3]
 	mov	r3, lr
-.L1304:
+.L1321:
 	ldr	r1, [sp, #52]
 	sub	r2, r3, lr
 	cmp	r1, r2
-	bgt	.L1305
-	ldr	r3, .L1370
+	bgt	.L1322
+	ldr	r3, .L1387
 	ldr	r1, [r3]
 	ldr	r3, [sp, #32]
 	adds	r0, r1, r3
 	movs	r3, #8
-.L1307:
+.L1324:
 	mov	r7, r0
 	movs	r6, #0
-.L1306:
+.L1323:
 	ldr	r2, [r7]
 	adds	r6, r6, #1
 	mvns	r2, r2
 	str	r2, [r7], #4
 	ldr	r2, [sp, #12]
 	cmp	r2, r6
-	bgt	.L1306
+	bgt	.L1323
 	ldr	r2, [sp, #48]
 	subs	r3, r3, #1
 	add	r0, r0, r2
-	bne	.L1307
+	bne	.L1324
 	str	r1, [sp, #20]
 	str	r3, [sp, #24]
-.L1313:
+.L1330:
 	movs	r0, #0
 	mov	r2, r0
-.L1312:
+.L1329:
 	movs	r3, #1
 	mov	ip, #0
 	lsl	r7, r3, r2
@@ -9858,7 +9912,7 @@ HynixGetReadRetryDefault:
 	str	r3, [sp, #44]
 	mov	r6, r7
 	ldr	r7, [sp, #20]
-.L1310:
+.L1327:
 	ldr	r3, [r7]
 	bics	r3, r6, r3
 	ldr	r3, [sp, #32]
@@ -9868,14 +9922,14 @@ HynixGetReadRetryDefault:
 	ldr	r3, [sp, #44]
 	subs	r3, r3, #1
 	str	r3, [sp, #44]
-	bne	.L1310
+	bne	.L1327
 	cmp	ip, #8
 	add	r2, r2, #1
 	itt	hi
 	movhi	r3, r6
 	orrhi	r0, r0, r3
 	cmp	r2, #32
-	bne	.L1312
+	bne	.L1329
 	ldr	r3, [sp, #20]
 	str	r0, [r3], #4
 	str	r3, [sp, #20]
@@ -9885,78 +9939,78 @@ HynixGetReadRetryDefault:
 	ldr	r2, [sp, #24]
 	ldr	r3, [sp, #12]
 	cmp	r3, r2
-	bgt	.L1313
+	bgt	.L1330
 	subs	r2, r1, #4
 	add	r0, r1, #28
 	movs	r3, #0
-.L1316:
+.L1333:
 	ldr	r6, [r2, #4]!
-	cbnz	r6, .L1315
+	cbnz	r6, .L1332
 	adds	r3, r3, #1
-.L1315:
+.L1332:
 	cmp	r0, r2
-	bne	.L1316
+	bne	.L1333
 	cmp	r3, #7
-	ble	.L1317
-	ldr	r0, .L1370+4
+	ble	.L1334
+	ldr	r0, .L1387+4
 	mov	r3, #1024
 	movs	r2, #1
 	bl	rknand_print_hex
 	movs	r1, #0
-	ldr	r0, .L1370+8
+	ldr	r0, .L1387+8
 	bl	printf
-.L1318:
-	b	.L1318
-.L1295:
+.L1335:
+	b	.L1335
+.L1312:
 	cmp	r4, #6
-	bne	.L1299
+	bne	.L1316
 	adds	r3, r3, #7
-.L1301:
+.L1318:
 	ldrb	r2, [r1, #1]!	@ zero_extendqisi2
 	cmp	r2, #12
-	beq	.L1299
+	beq	.L1316
 	ldrb	r2, [r1, #8]	@ zero_extendqisi2
 	cmp	r2, #4
-	beq	.L1299
+	beq	.L1316
 	cmp	r3, r1
-	bne	.L1301
+	bne	.L1318
 	movs	r1, #0
-	ldr	r0, .L1370+8
+	ldr	r0, .L1387+8
 	bl	printf
-.L1303:
-	b	.L1303
-.L1305:
+.L1320:
+	b	.L1320
+.L1322:
 	ldr	r2, [r5, #2048]
 	strb	r2, [r3], #1
-	b	.L1304
-.L1317:
+	b	.L1321
+.L1334:
 	cmp	r4, #6
-	beq	.L1329
+	beq	.L1346
 	cmp	r4, #7
 	ite	eq
 	moveq	ip, #10
 	movne	ip, #8
-.L1319:
+.L1336:
 	add	r3, fp, #-1
 	ldr	r1, [sp, #36]
 	uxtb	r3, r3
 	movs	r0, #0
 	adds	r3, r3, #1
-.L1320:
+.L1337:
 	mov	r7, r1
 	mov	r2, lr
-.L1321:
+.L1338:
 	ldrb	r6, [r2], #1	@ zero_extendqisi2
 	strb	r6, [r7], #1
 	sub	r6, r2, lr
 	uxtb	r6, r6
 	cmp	fp, r6
-	bhi	.L1321
+	bhi	.L1338
 	adds	r0, r0, #1
 	add	lr, lr, r3
 	cmp	r10, r0
 	add	r1, r1, ip
-	bgt	.L1320
+	bgt	.L1337
 	ldr	r3, [sp, #4]
 	mov	r0, r8
 	ldr	r2, [sp, #8]
@@ -9966,11 +10020,11 @@ HynixGetReadRetryDefault:
 	bl	NandcWaitFlashReady
 	ldr	r3, [sp, #40]
 	cmp	r3, #1
-	bhi	.L1323
+	bhi	.L1340
 	movs	r3, #54
 	mov	r1, #-1
 	str	r3, [r6, #2056]
-	ldr	r3, .L1370+12
+	ldr	r3, .L1387+12
 	ldr	r0, [sp, #16]
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
 	str	r3, [r5, #2052]
@@ -9979,22 +10033,22 @@ HynixGetReadRetryDefault:
 	movs	r3, #22
 	str	r3, [r6, #2056]
 	bl	FlashReadCmd
-.L1324:
+.L1341:
 	mov	r0, r8
 	bl	NandcWaitFlashReady
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
-	b	.L1367
-.L1329:
+	b	.L1384
+.L1346:
 	mov	ip, #4
-	b	.L1319
-.L1323:
+	b	.L1336
+.L1340:
 	movs	r3, #56
 	str	r3, [r6, #2056]
-	b	.L1324
-.L1371:
+	b	.L1341
+.L1388:
 	.align	2
-.L1370:
+.L1387:
 	.word	.LANCHOR147
 	.word	.LC22
 	.word	.LC21
@@ -10013,72 +10067,72 @@ FlashGetReadRetryDefault:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	mov	r3, r0
-	cbz	r0, .L1372
+	cbz	r0, .L1389
 	subs	r2, r0, #1
 	cmp	r2, #6
-	bhi	.L1374
+	bhi	.L1391
 	b	HynixGetReadRetryDefault
-.L1374:
+.L1391:
 	cmp	r0, #49
-	bne	.L1375
-	ldr	r0, .L1395
+	bne	.L1392
+	ldr	r0, .L1412
 	movs	r2, #64
-	ldr	r1, .L1395+4
+	ldr	r1, .L1412+4
 	strb	r3, [r0]
 	movs	r3, #4
 	strb	r3, [r0, #1]
 	movs	r3, #15
 	strb	r3, [r0, #2]
-.L1393:
+.L1410:
 	adds	r0, r0, #4
 	b	ftl_memcpy
-.L1375:
+.L1392:
 	cmp	r0, #33
-	beq	.L1376
+	beq	.L1393
 	sub	r2, r0, #65
 	cmp	r2, #1
-	bhi	.L1377
-.L1376:
-	ldr	r0, .L1395
+	bhi	.L1394
+.L1393:
+	ldr	r0, .L1412
 	strb	r3, [r0]
 	movs	r3, #4
-.L1394:
+.L1411:
 	strb	r3, [r0, #1]
 	movs	r3, #7
 	strb	r3, [r0, #2]
 	movs	r2, #45
-	ldr	r1, .L1395+8
-	b	.L1393
-.L1377:
+	ldr	r1, .L1412+8
+	b	.L1410
+.L1394:
 	cmp	r0, #34
-	beq	.L1378
+	beq	.L1395
 	cmp	r0, #67
-	bne	.L1379
-.L1378:
-	ldr	r0, .L1395
+	bne	.L1396
+.L1395:
+	ldr	r0, .L1412
 	strb	r3, [r0]
 	movs	r3, #5
-	b	.L1394
-.L1379:
+	b	.L1411
+.L1396:
 	cmp	r0, #35
-	beq	.L1380
+	beq	.L1397
 	cmp	r0, #68
-	bne	.L1372
-.L1380:
-	ldr	r0, .L1395
+	bne	.L1389
+.L1397:
+	ldr	r0, .L1412
 	movs	r2, #95
-	ldr	r1, .L1395+12
+	ldr	r1, .L1412+12
 	strb	r3, [r0]
 	movs	r3, #5
 	strb	r3, [r0, #1]
 	movs	r3, #17
 	strb	r3, [r0, #2]
-	b	.L1393
-.L1372:
+	b	.L1410
+.L1389:
 	bx	lr
-.L1396:
+.L1413:
 	.align	2
-.L1395:
+.L1412:
 	.word	.LANCHOR20
 	.word	.LANCHOR14
 	.word	.LANCHOR9
@@ -10101,28 +10155,28 @@ FlashInit:
 	mov	r0, #32768
 	movs	r5, #0
 	bl	ftl_malloc
-	ldr	r3, .L1490
-	ldr	r10, .L1490+132
-	ldr	r8, .L1490+136
+	ldr	r3, .L1507
+	ldr	r10, .L1507+132
+	ldr	r8, .L1507+136
 	str	r0, [r3]
 	mov	r0, #32768
 	bl	ftl_malloc
-	ldr	r3, .L1490+4
-	ldr	r6, .L1490+8
-	ldr	r7, .L1490+12
+	ldr	r3, .L1507+4
+	ldr	r6, .L1507+8
+	ldr	r7, .L1507+12
 	str	r0, [r3]
 	mov	r0, #4096
 	bl	ftl_malloc
-	ldr	r3, .L1490+16
+	ldr	r3, .L1507+16
 	str	r0, [r3]
 	mov	r0, #32768
 	bl	ftl_malloc
-	ldr	r3, .L1490+20
+	ldr	r3, .L1507+20
 	str	r0, [r3]
 	mov	r0, #4096
 	bl	ftl_malloc
-	ldr	r3, .L1490+24
-	ldr	r2, .L1490+28
+	ldr	r3, .L1507+24
+	ldr	r2, .L1507+28
 	strb	r5, [r8]
 	str	r0, [r3]
 	movs	r3, #50
@@ -10130,23 +10184,23 @@ FlashInit:
 	mov	r0, r4
 	strb	r3, [r2]
 	movs	r2, #128
-	ldr	r3, .L1490+32
-	ldr	r4, .L1490+36
+	ldr	r3, .L1507+32
+	ldr	r4, .L1507+36
 	strb	r5, [r7]
 	str	r5, [r3]
-	ldr	r3, .L1490+40
+	ldr	r3, .L1507+40
 	str	r2, [r3]
-	ldr	r3, .L1490+44
+	ldr	r3, .L1507+44
 	str	r5, [r3]
 	movs	r3, #60
 	strb	r3, [r6]
 	bl	NandcInit
 	str	r10, [sp, #20]
-	ldr	r10, .L1490+140
+	ldr	r10, .L1507+140
 	str	r8, [sp, #16]
 	mov	r8, r6
 	mov	r6, r4
-.L1402:
+.L1419:
 	uxtb	fp, r5
 	mov	r0, fp
 	bl	FlashReset
@@ -10186,10 +10240,10 @@ FlashInit:
 	subs	r3, r2, #1
 	uxtb	r3, r3
 	cmp	r3, #253
-	bhi	.L1398
+	bhi	.L1415
 	ldrb	r1, [r4, #5]	@ zero_extendqisi2
 	ldrb	r3, [r4, #1]	@ zero_extendqisi2
-	ldr	r0, .L1490+48
+	ldr	r0, .L1507+48
 	str	r1, [sp, #12]
 	ldrb	r1, [r4, #4]	@ zero_extendqisi2
 	str	r1, [sp, #8]
@@ -10199,17 +10253,17 @@ FlashInit:
 	str	r1, [sp]
 	adds	r1, r5, #1
 	bl	printf
-.L1398:
-	cbnz	r5, .L1399
+.L1415:
+	cbnz	r5, .L1416
 	ldrb	r3, [r6]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, #253
-	bhi	.L1443
+	bhi	.L1460
 	ldrb	r3, [r6, #1]	@ zero_extendqisi2
 	cmp	r3, #255
-	beq	.L1443
-.L1399:
+	beq	.L1460
+.L1416:
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	adds	r5, r5, #1
 	adds	r4, r4, #8
@@ -10218,38 +10272,38 @@ FlashInit:
 	moveq	r3, #44
 	strbeq	r3, [r4, #-8]
 	cmp	r5, #4
-	bne	.L1402
+	bne	.L1419
 	ldrb	r3, [r6]	@ zero_extendqisi2
 	cmp	r3, #173
-	beq	.L1403
-	ldr	r3, .L1490+52
+	beq	.L1420
+	ldr	r3, .L1507+52
 	ldr	r0, [r3]
 	bl	NandcSetDdrMode
-.L1403:
+.L1420:
 	mov	r2, #852
 	movs	r1, #0
-	ldr	r0, .L1490+56
+	ldr	r0, .L1507+56
 	bl	ftl_memset
-	ldr	r4, .L1490+60
-	ldr	r3, .L1490+64
-	ldr	r5, .L1490+68
+	ldr	r4, .L1507+60
+	ldr	r3, .L1507+64
+	ldr	r5, .L1507+68
 	str	r3, [r4]
 	movs	r3, #0
 	strb	r3, [r5]
 	ldrb	r3, [r6, #1]	@ zero_extendqisi2
 	cmp	r3, #161
-	beq	.L1404
+	beq	.L1421
 	cmp	r3, #218
-	beq	.L1404
+	beq	.L1421
 	and	r2, r3, #223
 	cmp	r2, #209
-	beq	.L1404
+	beq	.L1421
 	cmp	r3, #220
-	bne	.L1405
+	bne	.L1422
 	ldrb	r2, [r6, #3]	@ zero_extendqisi2
 	cmp	r2, #149
-	bne	.L1405
-.L1404:
+	bne	.L1422
+.L1421:
 	ldr	r1, [sp, #16]
 	movs	r2, #1
 	strb	r2, [r1]
@@ -10258,113 +10312,113 @@ FlashInit:
 	strb	r2, [r8]
 	strb	r2, [r1]
 	ldrb	r1, [r6]	@ zero_extendqisi2
-	ldr	r2, .L1490+72
+	ldr	r2, .L1507+72
 	cmp	r1, #152
 	strb	r1, [r2, #1]
 	strb	r3, [r2, #2]
-	bne	.L1406
+	bne	.L1423
 	ldrsb	r1, [r6, #4]
 	cmp	r1, #0
 	itt	ge
 	movge	r1, #24
 	strbge	r1, [r8]
-.L1406:
-	ldr	r1, .L1490+76
-	ldr	r0, .L1490+80
+.L1423:
+	ldr	r1, .L1507+76
+	ldr	r0, .L1507+80
 	ldr	r1, [r1]
 	cmp	r1, r0
-	beq	.L1407
+	beq	.L1424
 	movw	r0, #2049
 	cmp	r1, r0
-	bne	.L1408
-.L1407:
+	bne	.L1425
+.L1424:
 	movs	r1, #16
 	strb	r1, [r8]
-.L1408:
+.L1425:
 	cmp	r3, #218
-	bne	.L1409
+	bne	.L1426
 	mov	r1, #2048
-.L1486:
+.L1503:
 	strh	r1, [r2, #14]	@ movhi
 	strb	r3, [r2, #2]
-.L1410:
+.L1427:
 	movs	r2, #32
-	ldr	r1, .L1490+84
-	ldr	r0, .L1490+88
+	ldr	r1, .L1507+84
+	ldr	r0, .L1507+88
 	bl	ftl_memcpy
 	movs	r2, #32
-	ldr	r1, .L1490+72
-	ldr	r0, .L1490+64
+	ldr	r1, .L1507+72
+	ldr	r0, .L1507+64
 	bl	ftl_memcpy
-.L1405:
+.L1422:
 	ldr	r3, [sp, #16]
-	ldr	r8, .L1490+144
+	ldr	r8, .L1507+144
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1412
+	bne	.L1429
 	bl	FlashLoadPhyInfoInRam
-	cbnz	r0, .L1414
+	cbnz	r0, .L1431
 	ldr	r3, [r4]
-	ldr	r10, .L1490+100
+	ldr	r10, .L1507+100
 	ldrh	r3, [r3, #16]
 	lsrs	r3, r3, #8
 	lsls	r1, r3, #31
 	and	r0, r3, #7
 	strb	r0, [r10]
-	bmi	.L1414
+	bmi	.L1431
 	movs	r3, #1
 	strb	r3, [r7]
 	bl	FlashSetInterfaceMode
 	ldrb	r0, [r10]	@ zero_extendqisi2
 	bl	NandcSetMode
-.L1414:
+.L1431:
 	ldr	r3, [r4]
 	ldrb	r3, [r3, #26]	@ zero_extendqisi2
 	strb	r3, [r8]
 	bl	FlashLoadPhyInfo
 	cmp	r0, #0
-	beq	.L1412
+	beq	.L1429
 	ldr	r3, [r4]
-	ldr	r0, .L1490+92
+	ldr	r0, .L1507+92
 	ldrh	r1, [r3, #14]
 	bl	printf
 	bl	FlashLoadPhyInfoInRam
 	adds	r2, r0, #1
-	beq	.L1397
+	beq	.L1414
 	bl	FlashDieInfoInit
 	ldr	r3, [r4]
 	ldrb	r0, [r3, #19]	@ zero_extendqisi2
 	bl	FlashGetReadRetryDefault
 	ldr	r3, [r4]
-	ldr	r2, .L1490+96
+	ldr	r2, .L1507+96
 	ldrb	r1, [r3, #9]	@ zero_extendqisi2
 	ldrh	r2, [r2]
 	addw	r2, r2, #4095
 	cmp	r1, r2, asr #12
-	blt	.L1417
+	blt	.L1434
 	ldrh	r2, [r3, #14]
 	adds	r2, r2, #255
 	cmp	r1, r2, asr #8
-	bge	.L1418
-.L1417:
+	bge	.L1435
+.L1434:
 	ldrh	r2, [r3, #14]
 	bic	r2, r2, #255
 	strh	r2, [r3, #14]	@ movhi
-.L1418:
-	ldr	r3, .L1490+100
+.L1435:
+	ldr	r3, .L1507+100
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	tst	r3, #6
-	beq	.L1419
+	beq	.L1436
 	bl	FlashSavePhyInfo
-	ldr	r3, .L1490+104
+	ldr	r3, .L1507+104
 	movs	r0, #0
 	ldr	r1, [r3]
 	bl	FlashDdrParaScan
-.L1419:
+.L1436:
 	bl	FlashSavePhyInfo
-.L1412:
+.L1429:
 	ldr	fp, [r4]
-	ldr	r10, .L1490+100
+	ldr	r10, .L1507+100
 	ldrb	r3, [fp, #26]	@ zero_extendqisi2
 	ldrh	r0, [fp, #10]
 	strb	r3, [r8]
@@ -10372,11 +10426,11 @@ FlashInit:
 	ubfx	r2, r3, #7, #1
 	ubfx	r1, r3, #3, #1
 	strb	r2, [r5]
-	ldr	r2, .L1490+108
-	ldr	r5, .L1490+112
+	ldr	r2, .L1507+108
+	ldr	r5, .L1507+112
 	strb	r1, [r2]
 	ubfx	r1, r3, #4, #1
-	ldr	r2, .L1490+116
+	ldr	r2, .L1507+116
 	ubfx	r3, r3, #8, #3
 	strb	r3, [r10]
 	movs	r3, #0
@@ -10392,21 +10446,21 @@ FlashInit:
 	mov	ip, r5
 	ldrh	r2, [r3, #16]
 	tst	r2, #64
-	beq	.L1421
+	beq	.L1438
 	ldrb	r0, [r3, #19]	@ zero_extendqisi2
-	ldr	r3, .L1490+120
-	ldr	r2, .L1490+124
+	ldr	r3, .L1507+120
+	ldr	r2, .L1507+124
 	strb	r0, [r3]
-	ldr	r3, .L1490+56
+	ldr	r3, .L1507+56
 	ldrb	r1, [r3, #1]	@ zero_extendqisi2
 	ldrb	lr, [r3, #2]	@ zero_extendqisi2
 	strb	r1, [r2]
-	ldr	r1, .L1490+128
+	ldr	r1, .L1507+128
 	strb	lr, [r1]
-	b	.L1491
-.L1492:
+	b	.L1508
+.L1509:
 	.align	2
-.L1490:
+.L1507:
 	.word	.LANCHOR147
 	.word	.LANCHOR153
 	.word	.LANCHOR152
@@ -10444,85 +10498,85 @@ FlashInit:
 	.word	.LANCHOR1
 	.word	.LANCHOR6
 	.word	.LANCHOR8
-.L1491:
+.L1508:
 	add	lr, r0, #-1
 	cmp	lr, #6
 	mov	lr, r1
-	bhi	.L1422
-	ldr	r2, .L1493
+	bhi	.L1439
+	ldr	r2, .L1510
 	str	r2, [r5]
 	subs	r2, r0, #5
 	cmp	r2, #1
-	bhi	.L1423
-	ldr	r2, .L1493+4
+	bhi	.L1440
+	ldr	r2, .L1510+4
 	adds	r3, r3, #20
 	movs	r1, #1
 	str	r1, [r2]
-.L1424:
+.L1441:
 	subs	r1, r3, #1
 	movs	r2, #0
 	adds	r3, r3, #31
-.L1426:
+.L1443:
 	ldrsb	r5, [r1, #1]!
-	cbnz	r5, .L1425
+	cbnz	r5, .L1442
 	adds	r2, r2, #1
-.L1425:
+.L1442:
 	cmp	r3, r1
-	bne	.L1426
+	bne	.L1443
 	cmp	r2, #27
-	bls	.L1421
+	bls	.L1438
 	bl	FlashGetReadRetryDefault
 	bl	FlashSavePhyInfo
-.L1421:
-	ldr	r3, .L1493+8
+.L1438:
+	ldr	r3, .L1510+8
 	ldr	r2, [r3]
-	ldr	r3, .L1493+12
+	ldr	r3, .L1510+12
 	cmp	r2, r3
-	bne	.L1437
+	bne	.L1454
 	ldrb	r3, [r8]	@ zero_extendqisi2
-	cbz	r3, .L1437
+	cbz	r3, .L1454
 	ldr	r3, [r4]
 	movs	r2, #0
 	strb	r2, [r3, #18]
-.L1437:
+.L1454:
 	ldrb	r3, [r6]	@ zero_extendqisi2
 	cmp	r3, #44
-	bne	.L1438
+	bne	.L1455
 	ldrb	r3, [r7]	@ zero_extendqisi2
-	cbz	r3, .L1438
+	cbz	r3, .L1455
 	movs	r3, #0
 	movs	r0, #1
 	strb	r3, [r7]
 	bl	FlashSetInterfaceMode
 	movs	r0, #1
 	bl	NandcSetMode
-.L1438:
+.L1455:
 	movs	r0, #0
 	bl	flash_enter_slc_mode
 	ldrb	r3, [r10]	@ zero_extendqisi2
 	tst	r3, #6
-	beq	.L1439
+	beq	.L1456
 	ldrb	r2, [r7]	@ zero_extendqisi2
-	cbnz	r2, .L1440
+	cbnz	r2, .L1457
 	lsls	r3, r3, #31
-	bmi	.L1439
-.L1440:
-	ldr	r3, .L1493+16
+	bmi	.L1456
+.L1457:
+	ldr	r3, .L1510+16
 	movs	r0, #0
 	ldr	r1, [r3]
 	bl	FlashDdrParaScan
-.L1439:
+.L1456:
 	movs	r0, #0
 	movs	r7, #16
 	bl	flash_exit_slc_mode
 	ldr	r3, [r4]
 	ldrb	r0, [r3, #20]	@ zero_extendqisi2
 	bl	FlashBchSel
-	ldr	r0, .L1493+20
+	ldr	r0, .L1510+20
 	bl	FlashReadIdbDataRaw
 	ldr	r8, [r4]
 	ldr	r3, [sp, #20]
-	ldr	r4, .L1493+24
+	ldr	r4, .L1510+24
 	ldrb	r1, [r8, #12]	@ zero_extendqisi2
 	strb	r7, [r3]
 	ldrh	r5, [r8, #10]
@@ -10533,7 +10587,7 @@ FlashInit:
 	ldr	r3, [r6]
 	ldrh	r6, [r8, #14]
 	str	r3, [r4]
-	ldr	r3, .L1493+28
+	ldr	r3, .L1510+28
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	strh	r3, [r4, #10]	@ movhi
 	ldrb	r3, [r8, #13]	@ zero_extendqisi2
@@ -10553,7 +10607,7 @@ FlashInit:
 	uxth	r5, r5
 	cmp	r2, #1
 	strh	r5, [r4, #22]	@ movhi
-	bne	.L1441
+	bne	.L1458
 	lsls	r3, r3, #1
 	lsrs	r2, r6, #1
 	lsls	r5, r5, #1
@@ -10562,92 +10616,92 @@ FlashInit:
 	strh	r2, [r4, #14]	@ movhi
 	strh	r5, [r4, #22]	@ movhi
 	strh	r3, [r4, #26]	@ movhi
-.L1441:
+.L1458:
 	ldrb	r0, [r8, #20]	@ zero_extendqisi2
 	bl	FlashBchSel
 	movs	r0, #0
-.L1397:
+.L1414:
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1409:
+.L1426:
 	cmp	r3, #220
-	bne	.L1410
+	bne	.L1427
 	mov	r1, #4096
-	b	.L1486
-.L1423:
+	b	.L1503
+.L1440:
 	add	r2, r3, #28
 	adds	r3, r3, #20
 	cmp	r0, #7
 	it	eq
 	moveq	r3, r2
-	b	.L1424
-.L1422:
+	b	.L1441
+.L1439:
 	sub	r3, r0, #17
 	cmp	r3, #2
-	bhi	.L1428
-	ldr	r3, .L1493+32
+	bhi	.L1445
+	ldr	r3, .L1510+32
 	cmp	r0, #19
 	str	r3, [r5]
 	ite	ne
 	movne	r3, #7
 	moveq	r3, #15
 	strb	r3, [r1]
-	b	.L1421
-.L1428:
+	b	.L1438
+.L1445:
 	cmp	r0, #33
-	beq	.L1430
+	beq	.L1447
 	sub	r3, r0, #65
 	cmp	r3, #1
-	bhi	.L1431
-.L1430:
-	ldr	r3, .L1493+36
+	bhi	.L1448
+.L1447:
+	ldr	r3, .L1510+36
 	str	r3, [ip]
 	movs	r3, #4
 	strb	r3, [r2]
 	movs	r3, #7
 	strb	r3, [lr]
-	b	.L1421
-.L1431:
+	b	.L1438
+.L1448:
 	sub	r3, r0, #67
 	uxtb	r3, r3
 	cmp	r3, #1
-	bls	.L1432
+	bls	.L1449
 	sub	r1, r0, #34
 	cmp	r1, #1
-	bhi	.L1433
-.L1432:
-	ldr	r1, .L1493+36
+	bhi	.L1450
+.L1449:
+	ldr	r1, .L1510+36
 	cmp	r0, #35
 	str	r1, [ip]
-	ldr	r1, .L1493+40
-	beq	.L1434
+	ldr	r1, .L1510+40
+	beq	.L1451
 	cmp	r0, #68
-	beq	.L1434
+	beq	.L1451
 	movs	r0, #7
-.L1487:
+.L1504:
 	cmp	r3, #1
 	strb	r0, [r1]
 	ite	ls
 	movls	r3, #4
 	movhi	r3, #5
 	strb	r3, [r2]
-	b	.L1421
-.L1434:
+	b	.L1438
+.L1451:
 	movs	r0, #17
-	b	.L1487
-.L1433:
+	b	.L1504
+.L1450:
 	cmp	r0, #49
 	itt	eq
-	ldreq	r3, .L1493+44
+	ldreq	r3, .L1510+44
 	streq	r3, [r5]
-	b	.L1421
-.L1443:
+	b	.L1438
+.L1460:
 	mvn	r0, #1
-	b	.L1397
-.L1494:
+	b	.L1414
+.L1511:
 	.align	2
-.L1493:
+.L1510:
 	.word	HynixReadRetrial
 	.word	.LANCHOR36
 	.word	.LANCHOR29
@@ -10674,19 +10728,19 @@ FlashReadSlc2KPages:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r8, r1
-	ldr	r3, .L1524
+	ldr	r3, .L1541
 	mov	fp, r2
 	mov	r4, r0
 	movs	r7, #0
 	ldrb	r10, [r3, #9]	@ zero_extendqisi2
-.L1496:
+.L1513:
 	cmp	r7, r8
-	bne	.L1509
+	bne	.L1526
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1509:
+.L1526:
 	sub	r3, r8, r7
 	add	r2, sp, #12
 	uxtb	r3, r3
@@ -10695,19 +10749,19 @@ FlashReadSlc2KPages:
 	str	r3, [sp]
 	add	r3, sp, #8
 	bl	LogAddr2PhyAddr
-	ldr	r2, .L1524+4
+	ldr	r2, .L1541+4
 	ldr	r3, [sp, #8]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, r3
-	bhi	.L1497
+	bhi	.L1514
 	mov	r3, #-1
 	str	r3, [r4]
-.L1498:
+.L1515:
 	adds	r7, r7, #1
 	adds	r4, r4, #36
-	b	.L1496
-.L1497:
-	ldr	r2, .L1524+8
+	b	.L1513
+.L1514:
+	ldr	r2, .L1541+8
 	ldrb	r5, [r2, r3]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	NandcWaitFlashReady
@@ -10725,7 +10779,7 @@ FlashReadSlc2KPages:
 	str	r3, [sp]
 	ldr	r3, [r4, #8]
 	bl	NandcXferData
-	ldr	r3, .L1524+12
+	ldr	r3, .L1541+12
 	mov	r6, r0
 	ldr	r1, [sp, #12]
 	mov	r0, r5
@@ -10733,13 +10787,13 @@ FlashReadSlc2KPages:
 	add	r1, r1, r3
 	bl	FlashReadCmd
 	ldr	r3, [r4, #8]
-	cbz	r3, .L1499
+	cbz	r3, .L1516
 	add	r3, r3, #2048
-.L1499:
+.L1516:
 	ldr	r2, [r4, #12]
-	cbz	r2, .L1500
+	cbz	r2, .L1517
 	adds	r2, r2, #8
-.L1500:
+.L1517:
 	str	r2, [sp]
 	movs	r1, #0
 	mov	r2, r10
@@ -10748,60 +10802,60 @@ FlashReadSlc2KPages:
 	mov	r1, r0
 	mov	r0, r5
 	bl	NandcFlashDeCs
-	ldr	r3, .L1524+16
+	ldr	r3, .L1541+16
 	cmp	r6, r1
 	it	cc
 	movcc	r6, r1
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	add	r3, r2, r2, lsl #1
 	cmp	r6, r3, asr #2
-	bls	.L1501
+	bls	.L1518
 	adds	r5, r6, #1
 	it	ne
 	movne	r6, #256
 	str	r6, [r4]
-.L1504:
+.L1521:
 	ldr	r3, [r4, #12]
-	cbz	r3, .L1505
+	cbz	r3, .L1522
 	ldr	r1, [r3, #12]
 	adds	r1, r1, #1
-	bne	.L1505
+	bne	.L1522
 	ldr	r1, [r3, #8]
 	adds	r0, r1, #1
-	bne	.L1505
+	bne	.L1522
 	ldr	r3, [r3]
 	adds	r3, r3, #1
 	it	ne
 	strne	r1, [r4]
-.L1505:
+.L1522:
 	ldr	r3, [r4]
 	adds	r1, r3, #1
-	bne	.L1498
+	bne	.L1515
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1524+20
+	ldr	r0, .L1541+20
 	bl	printf
 	ldr	r1, [r4, #8]
-	cbz	r1, .L1507
+	cbz	r1, .L1524
 	movs	r3, #8
 	movs	r2, #4
-	ldr	r0, .L1524+24
+	ldr	r0, .L1541+24
 	bl	rknand_print_hex
-.L1507:
+.L1524:
 	ldr	r1, [r4, #12]
 	cmp	r1, #0
-	beq	.L1498
+	beq	.L1515
 	movs	r3, #4
-	ldr	r0, .L1524+28
+	ldr	r0, .L1541+28
 	mov	r2, r3
 	bl	rknand_print_hex
-	b	.L1498
-.L1501:
+	b	.L1515
+.L1518:
 	movs	r3, #0
 	str	r3, [r4]
-	b	.L1504
-.L1525:
+	b	.L1521
+.L1542:
 	.align	2
-.L1524:
+.L1541:
 	.word	.LANCHOR31
 	.word	.LANCHOR25
 	.word	.LANCHOR26
@@ -10822,36 +10876,36 @@ FlashReadSlc2KPages:
 FlashReadPages:
 	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1617
+	ldr	r3, .L1634
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #40
 	mov	r10, r0
 	str	r1, [sp, #24]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r2, [sp, #12]
-	cbnz	r3, .L1527
-	ldr	r2, .L1617+4
+	cbnz	r3, .L1544
+	ldr	r2, .L1634+4
 	mov	r8, r3
 	str	r3, [sp, #8]
 	ldrb	r2, [r2, #9]	@ zero_extendqisi2
 	str	r2, [sp, #20]
-	ldr	r2, .L1617+8
+	ldr	r2, .L1634+8
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	str	r2, [sp, #28]
-.L1528:
+.L1545:
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #24]
 	cmp	r3, r2
-	bcc	.L1566
+	bcc	.L1583
 	movs	r0, #0
-	b	.L1526
-.L1527:
+	b	.L1543
+.L1544:
 	bl	FlashReadSlc2KPages
-.L1526:
+.L1543:
 	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1566:
+.L1583:
 	ldr	r2, [sp, #8]
 	movs	r3, #36
 	ldr	r1, [sp, #12]
@@ -10867,85 +10921,85 @@ FlashReadPages:
 	str	r3, [sp]
 	add	r3, sp, #32
 	bl	LogAddr2PhyAddr
-	ldr	r2, .L1617+12
+	ldr	r2, .L1634+12
 	mov	r5, r0
 	ldr	r3, [sp, #32]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, r3
-	bhi	.L1530
+	bhi	.L1547
 	mov	r3, #-1
 	str	r3, [r10, fp]
-.L1531:
+.L1548:
 	ldr	r3, [sp, #8]
 	adds	r3, r3, #1
 	str	r3, [sp, #8]
-	b	.L1528
-.L1530:
-	ldr	r2, .L1617+16
+	b	.L1545
+.L1547:
+	ldr	r2, .L1634+16
 	ldrb	r4, [r2, r3]	@ zero_extendqisi2
-	ldr	r3, .L1617+20
+	ldr	r3, .L1634+20
 	mov	r0, r4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
 	it	eq
 	moveq	r5, #0
 	bl	NandcWaitFlashReady
-	ldr	r3, .L1617+24
+	ldr	r3, .L1634+24
 	ldr	r3, [r3]
 	ldrb	r1, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r1, #1
 	cmp	r3, #6
-	bhi	.L1533
-	ldr	r3, .L1617+28
+	bhi	.L1550
+	ldr	r3, .L1634+28
 	cmp	r1, #7
 	add	r2, r3, r4
 	ldrb	r3, [r2, #12]	@ zero_extendqisi2
 	it	eq
 	ldrbeq	r3, [r2, #20]	@ zero_extendqisi2
-	ldr	r2, .L1617+32
+	ldr	r2, .L1634+32
 	ldrb	r2, [r2, r4]	@ zero_extendqisi2
 	cmp	r2, r3
-	beq	.L1533
-	ldr	r2, .L1617+36
+	beq	.L1550
+	ldr	r2, .L1634+36
 	mov	r0, r4
 	ldrb	r1, [r2, #-3]	@ zero_extendqisi2
 	bl	HynixSetRRPara
-.L1533:
+.L1550:
 	mov	r0, r4
 	bl	NandcFlashCs
 	ldr	r3, [sp, #12]
 	cmp	r3, #1
-	beq	.L1535
+	beq	.L1552
 	ldr	r3, [sp, #16]
 	cmp	r3, #0
-	bge	.L1536
-.L1535:
-	ldr	r3, .L1617+40
+	bge	.L1553
+.L1552:
+	ldr	r3, .L1634+40
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1536
+	cbz	r3, .L1553
 	mov	r0, r4
 	bl	flash_enter_slc_mode
-.L1543:
+.L1560:
 	ldr	r1, [sp, #36]
 	adds	r6, r1, #1
-	bne	.L1538
+	bne	.L1555
 	cmp	r4, #255
-	beq	.L1568
-.L1538:
-	cbz	r5, .L1540
-	ldr	r3, .L1617+44
+	beq	.L1585
+.L1555:
+	cbz	r5, .L1557
+	ldr	r3, .L1634+44
 	mov	r0, r4
 	ldr	r2, [r3]
 	add	r2, r2, r1
 	bl	FlashReadDpCmd
-.L1541:
+.L1558:
 	mov	r0, r4
 	bl	NandcWaitFlashReady
-	cbz	r5, .L1539
+	cbz	r5, .L1556
 	ldr	r1, [sp, #36]
 	mov	r0, r4
 	bl	FlashReadDpDataOutCmd
-.L1539:
+.L1556:
 	ldr	r3, [r7, #12]
 	movs	r1, #0
 	ldr	r2, [sp, #20]
@@ -10953,30 +11007,30 @@ FlashReadPages:
 	str	r3, [sp]
 	ldr	r3, [r7, #8]
 	bl	NandcXferData
-	ldr	r3, .L1617+8
+	ldr	r3, .L1634+8
 	mov	r6, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1542
+	cbz	r3, .L1559
 	adds	r0, r0, #1
-	bne	.L1542
-	ldr	r3, .L1617+8
+	bne	.L1559
+	ldr	r3, .L1634+8
 	movs	r5, #0
 	strb	r5, [r3]
-	b	.L1543
-.L1536:
+	b	.L1560
+.L1553:
 	mov	r0, r4
 	bl	flash_exit_slc_mode
-	b	.L1543
-.L1540:
+	b	.L1560
+.L1557:
 	mov	r0, r4
 	bl	FlashReadCmd
-	b	.L1541
-.L1568:
+	b	.L1558
+.L1585:
 	movs	r5, #0
-	b	.L1539
-.L1542:
-	cbz	r5, .L1544
-	ldr	r3, .L1617+44
+	b	.L1556
+.L1559:
+	cbz	r5, .L1561
+	ldr	r3, .L1634+44
 	mov	r0, r4
 	ldr	r1, [sp, #36]
 	ldr	r3, [r3]
@@ -10995,30 +11049,30 @@ FlashReadPages:
 	mov	r8, r0
 	it	eq
 	moveq	r5, #0
-.L1544:
+.L1561:
 	mov	r0, r4
 	bl	NandcFlashDeCs
-	ldr	r3, .L1617+8
+	ldr	r3, .L1634+8
 	adds	r1, r6, #1
 	ldrb	r2, [sp, #28]	@ zero_extendqisi2
 	strb	r2, [r3]
-	bne	.L1545
-	ldr	r3, .L1617+48
+	bne	.L1562
+	ldr	r3, .L1634+48
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L1546
-.L1550:
-	ldr	r3, .L1617+52
+	cbnz	r3, .L1563
+.L1567:
+	ldr	r3, .L1634+52
 	ldr	r5, [r3]
 	cmp	r5, #0
-	bne	.L1547
+	bne	.L1564
 	ldr	r3, [r7, #12]
 	mov	r0, r4
 	ldr	r2, [r7, #8]
 	ldr	r1, [sp, #36]
 	bl	FlashReadRawPage
-	b	.L1616
-.L1546:
-	ldr	r3, .L1617+56
+	b	.L1633
+.L1563:
+	ldr	r3, .L1634+56
 	mov	r0, r4
 	ldr	r1, [sp, #36]
 	ldr	r3, [r3]
@@ -11030,33 +11084,33 @@ FlashReadPages:
 	bl	FlashDdrTunningRead
 	adds	r2, r0, #1
 	mov	r6, r0
-	beq	.L1549
-	ldr	r3, .L1617+60
+	beq	.L1566
+	ldr	r3, .L1634+60
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r0, r3, lsr #1
-	bls	.L1569
-.L1549:
+	bls	.L1586
+.L1566:
 	ubfx	r0, r5, #8, #8
 	bl	NandcSetDdrPara
 	adds	r3, r6, #1
-	beq	.L1550
-.L1569:
+	beq	.L1567
+.L1586:
 	movs	r5, #0
-.L1545:
-	ldr	r3, .L1617+60
+.L1562:
+	ldr	r3, .L1634+60
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r6, r3, asr #2
-	bls	.L1558
-	ldr	r3, .L1617+52
+	bls	.L1575
+	ldr	r3, .L1634+52
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L1558
+	bne	.L1575
 	mov	r6, #256
-	b	.L1553
-.L1618:
+	b	.L1570
+.L1635:
 	.align	2
-.L1617:
+.L1634:
 	.word	.LANCHOR1
 	.word	.LANCHOR31
 	.word	.LANCHOR5
@@ -11073,7 +11127,7 @@ FlashReadPages:
 	.word	.LANCHOR145
 	.word	.LANCHOR19
 	.word	.LANCHOR33
-.L1547:
+.L1564:
 	ldr	r3, [r7, #12]
 	mov	r0, r4
 	ldr	r2, [r7, #8]
@@ -11081,128 +11135,128 @@ FlashReadPages:
 	blx	r5
 	adds	r5, r0, #1
 	mov	r6, r0
-	bne	.L1551
-	ldr	r3, .L1619
+	bne	.L1568
+	ldr	r3, .L1636
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	cmp	r3, #6
-	bhi	.L1552
-	ldr	r2, .L1619+4
+	bhi	.L1569
+	ldr	r2, .L1636+4
 	movs	r3, #0
 	mov	r0, r4
 	ldrb	r1, [r2, #-3]	@ zero_extendqisi2
 	bl	HynixSetRRPara
-.L1552:
+.L1569:
 	ldr	r3, [r7, #12]
 	mov	r0, r4
 	ldr	r2, [r7, #8]
 	ldr	r1, [sp, #36]
 	bl	FlashReadRawPage
-	ldr	r2, .L1619+8
+	ldr	r2, .L1636+8
 	mov	r6, r0
 	mov	r3, r0
 	ldr	r1, [r7, #4]
-	ldr	r0, .L1619+12
+	ldr	r0, .L1636+12
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	bl	printf
 	adds	r0, r6, #1
-	bne	.L1551
-	ldr	r3, .L1619+16
+	bne	.L1568
+	ldr	r3, .L1636+16
 	ldrb	r5, [r3]	@ zero_extendqisi2
-	cbz	r5, .L1553
+	cbz	r5, .L1570
 	ldr	r3, [sp, #12]
 	mov	r0, r4
 	cmp	r3, #1
-	beq	.L1554
+	beq	.L1571
 	ldr	r3, [sp, #16]
 	cmp	r3, #0
-	bge	.L1555
-.L1554:
+	bge	.L1572
+.L1571:
 	bl	flash_enter_slc_mode
-.L1556:
-	ldr	r3, .L1619+20
+.L1573:
+	ldr	r3, .L1636+20
 	mov	r0, r4
 	ldr	r2, [r7, #8]
 	ldr	r1, [sp, #36]
 	ldr	r5, [r3]
 	ldr	r3, [r7, #12]
 	blx	r5
-.L1616:
+.L1633:
 	adds	r1, r0, #1
 	mov	r6, r0
 	mov	r5, #0
-	bne	.L1558
-.L1553:
+	bne	.L1575
+.L1570:
 	str	r6, [r10, fp]
-.L1559:
+.L1576:
 	ldr	r3, [r10, fp]
 	adds	r2, r3, #1
-	bne	.L1561
-	ldr	r2, .L1619+8
+	bne	.L1578
+	ldr	r2, .L1636+8
 	ldr	r1, [r7, #4]
-	ldr	r0, .L1619+24
+	ldr	r0, .L1636+24
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	bl	printf
 	ldr	r1, [r7, #12]
-	cbz	r1, .L1561
+	cbz	r1, .L1578
 	movs	r3, #4
-	ldr	r0, .L1619+28
+	ldr	r0, .L1636+28
 	mov	r2, r3
 	bl	rknand_print_hex
-.L1561:
-	cbz	r5, .L1563
-	ldr	r3, .L1619+8
+.L1578:
+	cbz	r5, .L1580
+	ldr	r3, .L1636+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r8, r3, asr #2
-	bls	.L1564
-	ldr	r3, .L1619+20
+	bls	.L1581
+	ldr	r3, .L1636+20
 	ldr	r3, [r3]
 	cmp	r3, #0
 	it	eq
 	moveq	r8, #256
-.L1564:
+.L1581:
 	cmp	r8, #-1
 	add	r3, fp, #36
 	str	r8, [r10, r3]
-	beq	.L1563
+	beq	.L1580
 	cmp	r8, #256
 	itt	ne
 	movne	r2, #0
 	strne	r2, [r10, r3]
-.L1563:
+.L1580:
 	ldr	r3, [sp, #8]
 	add	r3, r3, r5
 	str	r3, [sp, #8]
 	ldr	r3, [sp, #12]
 	cmp	r3, #1
-	beq	.L1565
+	beq	.L1582
 	ldr	r3, [sp, #16]
 	cmp	r3, #0
-	bge	.L1531
-.L1565:
-	ldr	r3, .L1619+16
+	bge	.L1548
+.L1582:
+	ldr	r3, .L1636+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1531
+	beq	.L1548
 	mov	r0, r4
 	bl	flash_exit_slc_mode
-	b	.L1531
-.L1555:
+	b	.L1548
+.L1572:
 	bl	flash_exit_slc_mode
-	b	.L1556
-.L1551:
+	b	.L1573
+.L1568:
 	movs	r5, #0
-.L1558:
+.L1575:
 	cmp	r6, #256
-	beq	.L1553
+	beq	.L1570
 	movs	r3, #0
 	str	r3, [r10, fp]
-	b	.L1559
-.L1620:
+	b	.L1576
+.L1637:
 	.align	2
-.L1619:
+.L1636:
 	.word	.LANCHOR18
 	.word	.LANCHOR20+4
 	.word	.LANCHOR33
@@ -11229,23 +11283,23 @@ FlashProgSlc2KPages:
 	mov	r8, r1
 	mov	r4, r0
 	mov	r6, r0
-	ldr	r3, .L1650
+	ldr	r3, .L1667
 	movs	r7, #0
-	ldr	fp, .L1650+28
+	ldr	fp, .L1667+28
 	str	r2, [sp, #8]
 	ldrb	r10, [r3, #9]	@ zero_extendqisi2
-.L1622:
+.L1639:
 	cmp	r7, r8
-	bne	.L1628
+	bne	.L1645
 	ldr	r3, [sp, #12]
 	cmp	r3, #0
-	bne	.L1639
-.L1649:
+	bne	.L1656
+.L1666:
 	movs	r0, #0
 	add	sp, sp, #64
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1628:
+.L1645:
 	sub	r3, r8, r7
 	add	r2, sp, #20
 	uxtb	r3, r3
@@ -11254,19 +11308,19 @@ FlashProgSlc2KPages:
 	str	r3, [sp]
 	add	r3, sp, #24
 	bl	LogAddr2PhyAddr
-	ldr	r2, .L1650+4
+	ldr	r2, .L1667+4
 	ldr	r3, [sp, #24]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, r3
-	bhi	.L1623
+	bhi	.L1640
 	mov	r3, #-1
 	str	r3, [r6]
-.L1624:
+.L1641:
 	adds	r7, r7, #1
 	adds	r6, r6, #36
-	b	.L1622
-.L1623:
-	ldr	r2, .L1650+8
+	b	.L1639
+.L1640:
+	ldr	r2, .L1667+8
 	ldrb	r5, [r2, r3]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	NandcWaitFlashReady
@@ -11298,13 +11352,13 @@ FlashProgSlc2KPages:
 	add	r1, r1, r3
 	bl	FlashProgFirstCmd
 	ldr	r3, [r6, #8]
-	cbz	r3, .L1625
+	cbz	r3, .L1642
 	add	r3, r3, #2048
-.L1625:
+.L1642:
 	ldr	r2, [r6, #12]
-	cbz	r2, .L1626
+	cbz	r2, .L1643
 	adds	r2, r2, #8
-.L1626:
+.L1643:
 	str	r2, [sp]
 	movs	r1, #1
 	mov	r2, r10
@@ -11326,24 +11380,24 @@ FlashProgSlc2KPages:
 	movmi	r3, #-1
 	strmi	r3, [r6]
 	bl	NandcFlashDeCs
-	b	.L1624
-.L1635:
+	b	.L1641
+.L1652:
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	bne	.L1630
+	bne	.L1647
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1650+12
+	ldr	r0, .L1667+12
 	bl	printf
-.L1631:
+.L1648:
 	add	r8, r8, #1
 	adds	r4, r4, #36
-.L1629:
+.L1646:
 	cmp	r7, r8
-	bne	.L1635
-	b	.L1649
-.L1630:
+	bne	.L1652
+	b	.L1666
+.L1647:
 	sub	r3, r7, r8
-	ldr	fp, .L1650+32
+	ldr	fp, .L1667+32
 	uxtb	r3, r3
 	add	r2, sp, #20
 	ldr	r1, [sp, #8]
@@ -11372,46 +11426,46 @@ FlashProgSlc2KPages:
 	bl	FlashReadPages
 	ldr	r5, [sp, #28]
 	adds	r3, r5, #1
-	bne	.L1632
+	bne	.L1649
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1650+16
+	ldr	r0, .L1667+16
 	bl	printf
 	str	r5, [r4]
-.L1632:
+.L1649:
 	ldr	r3, [r4, #12]
-	cbz	r3, .L1633
+	cbz	r3, .L1650
 	ldr	r2, [r3]
 	ldr	r3, [fp]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L1633
+	beq	.L1650
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1650+20
+	ldr	r0, .L1667+20
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4]
-.L1633:
+.L1650:
 	ldr	r3, [r4, #8]
 	cmp	r3, #0
-	beq	.L1631
+	beq	.L1648
 	ldr	r2, [r3]
 	ldr	r3, [r10]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L1631
+	beq	.L1648
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1650+24
+	ldr	r0, .L1667+24
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4]
-	b	.L1631
-.L1639:
+	b	.L1648
+.L1656:
 	mov	r8, #0
-	ldr	r10, .L1650+36
-	b	.L1629
-.L1651:
+	ldr	r10, .L1667+36
+	b	.L1646
+.L1668:
 	.align	2
-.L1650:
+.L1667:
 	.word	.LANCHOR31
 	.word	.LANCHOR25
 	.word	.LANCHOR26
@@ -11436,7 +11490,7 @@ FlashProgPages:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #72
-	ldr	r5, .L1704
+	ldr	r5, .L1721
 	mov	r4, r0
 	mov	r8, r2
 	str	r1, [sp, #8]
@@ -11444,36 +11498,36 @@ FlashProgPages:
 	str	r3, [sp, #20]
 	ldrb	r5, [r5, #19]	@ zero_extendqisi2
 	str	r5, [sp, #16]
-	ldr	r5, .L1704+4
+	ldr	r5, .L1721+4
 	ldrb	r7, [r5]	@ zero_extendqisi2
-	cbnz	r7, .L1653
-	ldr	r3, .L1704+8
+	cbnz	r7, .L1670
+	ldr	r3, .L1721+8
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
 	str	r3, [sp, #12]
-.L1654:
+.L1671:
 	ldr	r3, [sp, #8]
 	cmp	r7, r3
-	bcc	.L1667
-	ldr	r6, .L1704+12
+	bcc	.L1684
+	ldr	r6, .L1721+12
 	movs	r5, #0
-	ldr	r7, .L1704+16
-.L1668:
+	ldr	r7, .L1721+16
+.L1685:
 	ldrb	r3, [r6]	@ zero_extendqisi2
 	cmp	r5, r3
-	bcc	.L1670
+	bcc	.L1687
 	ldr	r3, [sp, #20]
 	cmp	r3, #0
-	bne	.L1671
-.L1679:
+	bne	.L1688
+.L1696:
 	movs	r0, #0
-	b	.L1652
-.L1653:
+	b	.L1669
+.L1670:
 	bl	FlashProgSlc2KPages
-.L1652:
+.L1669:
 	add	sp, sp, #72
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1667:
+.L1684:
 	ldr	r3, [sp, #8]
 	movs	r6, #36
 	muls	r6, r7, r6
@@ -11486,81 +11540,81 @@ FlashProgPages:
 	mov	r0, fp
 	add	r3, sp, #32
 	bl	LogAddr2PhyAddr
-	ldr	r3, .L1704+12
+	ldr	r3, .L1721+12
 	mov	r10, r0
 	ldr	r0, [sp, #32]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r0
-	bhi	.L1656
+	bhi	.L1673
 	mov	r3, #-1
 	str	r3, [r4, r6]
-.L1657:
+.L1674:
 	adds	r7, r7, #1
-	b	.L1654
-.L1656:
-	ldr	r3, .L1704+20
+	b	.L1671
+.L1673:
+	ldr	r3, .L1721+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	ldr	r3, .L1704+24
+	ldr	r3, .L1721+24
 	it	eq
 	moveq	r10, #0
 	add	r3, r3, r0, lsl #4
 	ldr	r3, [r3, #8]
-	cbz	r3, .L1659
+	cbz	r3, .L1676
 	uxtb	r0, r0
 	bl	FlashWaitCmdDone
-.L1659:
+.L1676:
 	ldr	r3, [sp, #32]
 	movs	r1, #0
-	ldr	r2, .L1704+24
+	ldr	r2, .L1721+24
 	add	r2, r2, r3, lsl #4
 	str	r1, [r2, #12]
 	ldr	r1, [sp, #28]
 	str	fp, [r2, #8]
 	str	r1, [r2, #4]
 	cmp	r10, #0
-	beq	.L1660
+	beq	.L1677
 	add	r1, r6, #36
 	add	r1, r1, r4
 	str	r1, [r2, #12]
-.L1660:
-	ldr	r2, .L1704+28
+.L1677:
+	ldr	r2, .L1721+28
 	ldrb	r5, [r2, r3]	@ zero_extendqisi2
 	lsls	r3, r3, #4
-	ldr	r2, .L1704+24
+	ldr	r2, .L1721+24
 	mov	r0, r5
 	strb	r5, [r2, r3]
-	ldr	r3, .L1704+12
+	ldr	r3, .L1721+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1661
+	bne	.L1678
 	bl	NandcWaitFlashReady
-.L1662:
+.L1679:
 	ldr	r3, [sp, #16]
 	subs	r3, r3, #1
 	cmp	r3, #6
-	bhi	.L1663
-	ldr	r3, .L1704+32
+	bhi	.L1680
+	ldr	r3, .L1721+32
 	ldrb	r3, [r3, r5]	@ zero_extendqisi2
-	cbz	r3, .L1663
-	ldr	r1, .L1704+36
+	cbz	r3, .L1680
+	ldr	r1, .L1721+36
 	movs	r3, #0
 	mov	r0, r5
 	adds	r2, r1, #4
 	ldrb	r1, [r1, #1]	@ zero_extendqisi2
 	bl	HynixSetRRPara
-.L1663:
+.L1680:
 	mov	r0, r5
 	bl	NandcFlashCs
 	cmp	r8, #1
 	mov	r0, r5
-	bne	.L1664
-	ldr	r3, .L1704+16
+	bne	.L1681
+	ldr	r3, .L1721+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1664
+	beq	.L1681
 	bl	flash_enter_slc_mode
-.L1665:
+.L1682:
 	ldr	r1, [sp, #28]
 	mov	r0, r5
 	bl	FlashProgFirstCmd
@@ -11572,11 +11626,11 @@ FlashProgPages:
 	ldr	r3, [fp, #8]
 	bl	NandcXferData
 	cmp	r10, #0
-	beq	.L1666
+	beq	.L1683
 	ldr	r1, [sp, #28]
 	mov	r0, r5
 	bl	FlashProgDpFirstCmd
-	ldr	r3, .L1704+40
+	ldr	r3, .L1721+40
 	mov	r0, r5
 	ldr	r2, [sp, #32]
 	adds	r6, r6, #36
@@ -11587,7 +11641,7 @@ FlashProgPages:
 	it	ne
 	movne	r2, #1
 	bl	FlashWaitReadyEN
-	ldr	r3, .L1704+44
+	ldr	r3, .L1721+44
 	mov	r0, r5
 	ldr	r1, [sp, #28]
 	ldr	r3, [r3]
@@ -11600,19 +11654,19 @@ FlashProgPages:
 	str	r3, [sp]
 	ldr	r3, [r6, #8]
 	bl	NandcXferData
-.L1666:
+.L1683:
 	ldr	r1, [sp, #28]
 	mov	r0, r5
 	bl	FlashProgSecondCmd
 	mov	r0, r5
 	add	r7, r7, r10
 	bl	NandcFlashDeCs
-	b	.L1657
-.L1661:
+	b	.L1674
+.L1678:
 	bl	NandcFlashCs
 	ldr	r2, [sp, #32]
 	mov	r0, r5
-	ldr	r3, .L1704+40
+	ldr	r3, .L1721+40
 	ldr	r1, [sp, #28]
 	ldr	r2, [r3, r2, lsl #2]
 	adds	r2, r2, #0
@@ -11621,45 +11675,45 @@ FlashProgPages:
 	bl	FlashWaitReadyEN
 	mov	r0, r5
 	bl	NandcFlashDeCs
-	b	.L1662
-.L1664:
+	b	.L1679
+.L1681:
 	bl	flash_exit_slc_mode
-	b	.L1665
-.L1670:
+	b	.L1682
+.L1687:
 	uxtb	r0, r5
 	bl	FlashWaitCmdDone
 	cmp	r8, #1
-	bne	.L1669
+	bne	.L1686
 	ldrb	r3, [r7]	@ zero_extendqisi2
-	cbz	r3, .L1669
-	ldr	r2, .L1704+24
+	cbz	r3, .L1686
+	ldr	r2, .L1721+24
 	lsls	r3, r5, #4
 	ldrb	r0, [r2, r3]	@ zero_extendqisi2
 	bl	flash_exit_slc_mode
-.L1669:
+.L1686:
 	adds	r5, r5, #1
-	b	.L1668
-.L1671:
-	ldr	r10, .L1704+64
+	b	.L1685
+.L1688:
+	ldr	r10, .L1721+64
 	movs	r7, #0
-.L1672:
+.L1689:
 	ldr	r3, [sp, #8]
 	cmp	r7, r3
-	beq	.L1679
+	beq	.L1696
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	bne	.L1673
+	bne	.L1690
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1704+48
+	ldr	r0, .L1721+48
 	bl	printf
-.L1674:
+.L1691:
 	adds	r7, r7, #1
 	adds	r4, r4, #36
-	b	.L1672
-.L1673:
+	b	.L1689
+.L1690:
 	ldr	r3, [sp, #8]
 	add	r2, sp, #28
-	ldr	fp, .L1704+68
+	ldr	fp, .L1721+68
 	mov	r1, r8
 	mov	r0, r4
 	mov	r6, r4
@@ -11688,42 +11742,42 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	r5, [sp, #36]
 	adds	r3, r5, #1
-	bne	.L1675
+	bne	.L1692
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1704+52
+	ldr	r0, .L1721+52
 	bl	printf
 	str	r5, [r4]
-.L1675:
+.L1692:
 	ldr	r3, [r4, #12]
-	cbz	r3, .L1676
+	cbz	r3, .L1693
 	ldr	r2, [r3]
 	ldr	r3, [fp]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L1676
+	beq	.L1693
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1704+56
+	ldr	r0, .L1721+56
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4]
-.L1676:
+.L1693:
 	ldr	r3, [r4, #8]
 	cmp	r3, #0
-	beq	.L1674
+	beq	.L1691
 	ldr	r2, [r3]
 	ldr	r3, [r10]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L1674
+	beq	.L1691
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1704+60
+	ldr	r0, .L1721+60
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4]
-	b	.L1674
-.L1705:
+	b	.L1691
+.L1722:
 	.align	2
-.L1704:
+.L1721:
 	.word	.LANCHOR18
 	.word	.LANCHOR1
 	.word	.LANCHOR31
@@ -11754,14 +11808,14 @@ FlashProgPages:
 FlashTestBlk:
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1709
+	ldr	r3, .L1726
 	push	{r4, r5, lr}
 	mov	r4, r0
 	sub	sp, sp, #108
 	ldr	r3, [r3]
 	cmp	r0, r3
-	bcc	.L1708
-	ldr	r5, .L1709+4
+	bcc	.L1725
+	ldr	r5, .L1726+4
 	add	r0, sp, #40
 	movs	r2, #32
 	movs	r1, #165
@@ -11793,17 +11847,17 @@ FlashTestBlk:
 	movne	r4, #1
 	negs	r4, r4
 	bl	FlashEraseBlocks
-.L1706:
+.L1723:
 	mov	r0, r4
 	add	sp, sp, #108
 	@ sp needed
 	pop	{r4, r5, pc}
-.L1708:
+.L1725:
 	movs	r4, #0
-	b	.L1706
-.L1710:
+	b	.L1723
+.L1727:
 	.align	2
-.L1709:
+.L1726:
 	.word	.LANCHOR149
 	.word	.LANCHOR153
 	.size	FlashTestBlk, .-FlashTestBlk
@@ -11818,48 +11872,48 @@ FlashTestBlk:
 FtlLowFormatEraseBlock:
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1756
+	ldr	r3, .L1773
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #40
 	str	r0, [sp, #8]
 	ldr	r3, [r3]
 	str	r1, [sp, #4]
 	cmp	r3, #0
-	bne	.L1738
-	ldr	r2, .L1756+4
+	bne	.L1755
+	ldr	r2, .L1773+4
 	mov	r10, r3
 	mov	r5, r3
 	mov	r4, r3
 	mov	r8, #36
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	str	r2, [sp, #20]
-	ldr	r2, .L1756+8
+	ldr	r2, .L1773+8
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	str	r2, [sp, #12]
-	ldr	r2, .L1756+12
+	ldr	r2, .L1773+12
 	str	r0, [r2]
-	ldr	r2, .L1756+16
+	ldr	r2, .L1773+16
 	ldrh	fp, [r2]
-	ldr	r2, .L1756+20
+	ldr	r2, .L1773+20
 	ldr	r7, [r2]
-	ldr	r2, .L1756+24
+	ldr	r2, .L1773+24
 	ldr	r2, [r2]
 	str	r2, [sp, #16]
-	ldr	r2, .L1756+28
+	ldr	r2, .L1773+28
 	ldrh	r2, [r2]
 	str	r2, [sp, #24]
-.L1713:
+.L1730:
 	uxth	r2, r10
 	cmp	fp, r2
-	bhi	.L1717
+	bhi	.L1734
 	cmp	r5, #0
-	beq	.L1711
+	beq	.L1728
 	ldr	r3, [sp, #12]
 	mov	r0, r7
-	ldr	r10, .L1756+4
+	ldr	r10, .L1773+4
 	mov	r8, #0
 	mov	r2, r5
-	ldr	r7, .L1756+20
+	ldr	r7, .L1773+20
 	adds	r6, r3, #0
 	it	ne
 	movne	r6, #1
@@ -11869,44 +11923,44 @@ FtlLowFormatEraseBlock:
 	ldrb	r3, [sp, #20]	@ zero_extendqisi2
 	strb	r3, [r10]
 	mov	r10, #36
-.L1719:
+.L1736:
 	uxth	r3, r8
 	cmp	r5, r3
-	bhi	.L1721
+	bhi	.L1738
 	ldr	r3, [sp, #4]
 	cmp	r3, #0
-	bne	.L1722
+	bne	.L1739
 	uxth	r6, r6
 	movs	r3, #6
 	str	r3, [sp, #16]
 	movs	r3, #1
 	str	r3, [sp, #12]
-.L1723:
+.L1740:
 	mov	r8, #0
-.L1732:
-	ldr	r3, .L1756+16
+.L1749:
+	ldr	r3, .L1773+16
 	mov	fp, #0
 	mov	r5, fp
 	ldrh	r3, [r3]
 	str	r3, [sp, #24]
-	ldr	r3, .L1756+20
+	ldr	r3, .L1773+20
 	ldr	r10, [r3]
-	ldr	r3, .L1756+32
+	ldr	r3, .L1773+32
 	ldr	r3, [r3]
 	str	r3, [sp, #28]
-	ldr	r3, .L1756+36
+	ldr	r3, .L1773+36
 	ldr	r3, [r3]
 	str	r3, [sp, #32]
-	ldr	r3, .L1756+28
+	ldr	r3, .L1773+28
 	ldrh	r3, [r3]
 	str	r3, [sp, #36]
-.L1724:
+.L1741:
 	ldr	r3, [sp, #24]
 	uxth	r2, fp
 	cmp	r3, r2
-	bhi	.L1727
-	cbz	r5, .L1711
-	ldr	fp, .L1756+4
+	bhi	.L1744
+	cbz	r5, .L1728
+	ldr	fp, .L1773+4
 	movs	r3, #1
 	mov	r0, r10
 	movs	r7, #0
@@ -11915,59 +11969,59 @@ FtlLowFormatEraseBlock:
 	strb	r7, [fp]
 	bl	FlashProgPages
 	ldrb	r3, [sp, #20]	@ zero_extendqisi2
-	ldr	r10, .L1756+20
+	ldr	r10, .L1773+20
 	strb	r3, [fp]
 	mov	fp, #36
-.L1729:
+.L1746:
 	uxth	r3, r7
 	cmp	r5, r3
-	bhi	.L1731
+	bhi	.L1748
 	ldr	r3, [sp, #16]
 	add	r8, r8, r3
 	ldr	r3, [sp, #12]
 	uxth	r8, r8
 	cmp	r3, r8
-	bhi	.L1732
-	ldr	r8, .L1756+20
+	bhi	.L1749
+	ldr	r8, .L1773+20
 	movs	r7, #0
 	mov	r10, #36
-.L1733:
+.L1750:
 	uxth	r3, r7
 	cmp	r5, r3
-	bhi	.L1735
+	bhi	.L1752
 	ldr	r3, [sp, #8]
 	cmp	r3, #63
-	bls	.L1736
+	bls	.L1753
 	ldr	r3, [sp, #4]
-	cbz	r3, .L1711
-.L1736:
-	ldr	r3, .L1756+20
+	cbz	r3, .L1728
+.L1753:
+	ldr	r3, .L1773+20
 	mov	r2, r5
 	mov	r1, r6
 	ldr	r0, [r3]
 	bl	FlashEraseBlocks
-.L1711:
+.L1728:
 	mov	r0, r4
 	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1717:
+.L1734:
 	mul	r2, r8, r10
 	movs	r3, #0
 	ldr	r1, [sp, #8]
 	str	r3, [r7, r2]
-	ldr	r3, .L1756+40
+	ldr	r3, .L1773+40
 	ldrb	r0, [r3, r10]	@ zero_extendqisi2
 	bl	V2P_block
 	ldr	r3, [sp, #4]
 	mov	r6, r0
-	cbz	r3, .L1714
+	cbz	r3, .L1731
 	bl	IsBlkInVendorPart
-	cbnz	r0, .L1715
-.L1714:
+	cbnz	r0, .L1732
+.L1731:
 	mov	r0, r6
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L1716
+	cbnz	r0, .L1733
 	ldr	r3, [sp, #24]
 	mla	r1, r8, r5, r7
 	lsls	r6, r6, #10
@@ -11980,62 +12034,62 @@ FtlLowFormatEraseBlock:
 	bic	r2, r2, #3
 	add	r2, r2, r3
 	str	r2, [r1, #12]
-.L1715:
+.L1732:
 	add	r10, r10, #1
-	b	.L1713
-.L1716:
+	b	.L1730
+.L1733:
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L1715
-.L1721:
+	b	.L1732
+.L1738:
 	mul	r3, r10, r8
 	ldr	r2, [r7]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
 	adds	r3, r3, #1
-	bne	.L1720
+	bne	.L1737
 	ldr	r0, [r1, #4]
 	adds	r4, r4, #1
 	uxth	r4, r4
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.L1720:
+.L1737:
 	add	r8, r8, #1
-	b	.L1719
-.L1722:
-	ldr	r3, .L1756+44
+	b	.L1736
+.L1739:
+	ldr	r3, .L1773+44
 	ldrh	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L1756+8
+	ldr	r3, .L1773+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L1739
+	cbnz	r3, .L1756
 	ldr	r3, [sp, #12]
 	movs	r6, #1
 	lsrs	r3, r3, #2
 	str	r3, [sp, #16]
-	b	.L1723
-.L1739:
+	b	.L1740
+.L1756:
 	movs	r6, #1
 	str	r6, [sp, #16]
-	b	.L1723
-.L1727:
+	b	.L1740
+.L1744:
 	movs	r3, #36
 	ldr	r1, [sp, #8]
 	mul	r2, r3, fp
 	movs	r3, #0
 	str	r3, [r10, r2]
-	ldr	r3, .L1756+40
+	ldr	r3, .L1773+40
 	ldrb	r0, [r3, fp]	@ zero_extendqisi2
 	bl	V2P_block
 	ldr	r3, [sp, #4]
 	mov	r7, r0
-	cbz	r3, .L1725
+	cbz	r3, .L1742
 	bl	IsBlkInVendorPart
-	cbnz	r0, .L1726
-.L1725:
+	cbnz	r0, .L1743
+.L1742:
 	mov	r0, r7
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L1726
+	cbnz	r0, .L1743
 	movs	r3, #36
 	add	r7, r8, r7, lsl #10
 	mla	r1, r3, r5, r10
@@ -12050,44 +12104,44 @@ FtlLowFormatEraseBlock:
 	bic	r2, r2, #3
 	add	r2, r2, r3
 	str	r2, [r1, #12]
-.L1726:
+.L1743:
 	add	fp, fp, #1
-	b	.L1724
-.L1731:
+	b	.L1741
+.L1748:
 	mul	r3, fp, r7
 	ldr	r2, [r10]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
-	cbz	r3, .L1730
+	cbz	r3, .L1747
 	ldr	r0, [r1, #4]
 	adds	r4, r4, #1
 	uxth	r4, r4
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.L1730:
+.L1747:
 	adds	r7, r7, #1
-	b	.L1729
-.L1735:
+	b	.L1746
+.L1752:
 	ldr	r3, [sp, #4]
-	cbz	r3, .L1734
+	cbz	r3, .L1751
 	mul	r3, r10, r7
 	ldr	r2, [r8]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
-	cbnz	r3, .L1734
+	cbnz	r3, .L1751
 	ldr	r0, [r1, #4]
 	movs	r1, #1
 	ubfx	r0, r0, #10, #16
 	bl	FtlFreeSysBlkQueueIn
-.L1734:
+.L1751:
 	adds	r7, r7, #1
-	b	.L1733
-.L1738:
+	b	.L1750
+.L1755:
 	movs	r4, #0
-	b	.L1711
-.L1757:
+	b	.L1728
+.L1774:
 	.align	2
-.L1756:
+.L1773:
 	.word	.LANCHOR77
 	.word	.LANCHOR27
 	.word	.LANCHOR8
@@ -12113,33 +12167,33 @@ FtlBbmTblFlush:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L1769
+	ldr	r3, .L1786
 	ldr	r4, [r3]
 	str	r3, [sp, #12]
 	cmp	r4, #0
-	bne	.L1760
-	ldr	r3, .L1769+4
+	bne	.L1777
+	ldr	r3, .L1786+4
 	mov	r1, r4
-	ldr	r7, .L1769+8
-	ldr	r5, .L1769+12
+	ldr	r7, .L1786+8
+	ldr	r5, .L1786+12
 	ldr	r3, [r3]
 	ldr	r0, [r7]
 	mov	r8, r7
-	ldr	r6, .L1769+16
+	ldr	r6, .L1786+16
 	str	r3, [r5, #12]
-	ldr	r7, .L1769+20
-	ldr	r3, .L1769+24
-	ldr	r10, .L1769+56
+	ldr	r7, .L1786+20
+	ldr	r3, .L1786+24
+	ldr	r10, .L1786+56
 	str	r0, [r5, #8]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-.L1761:
+.L1778:
 	ldrh	r3, [r7]
 	cmp	r4, r3
-	blt	.L1762
+	blt	.L1779
 	ldr	r6, [r5, #12]
 	movs	r2, #16
-	ldr	r4, .L1769+28
+	ldr	r4, .L1786+28
 	movs	r1, #255
 	movs	r7, #0
 	mov	r0, r6
@@ -12156,16 +12210,16 @@ FtlBbmTblFlush:
 	strh	r3, [r6, #8]	@ movhi
 	ldrh	r3, [r4, #6]
 	strh	r3, [r6, #10]	@ movhi
-	ldr	r3, .L1769+32
+	ldr	r3, .L1786+32
 	ldr	r3, [r3]
 	strh	r3, [r6, #12]	@ movhi
-.L1763:
+.L1780:
 	ldr	r3, [r8]
 	mov	fp, #0
-	ldrh	r1, [r4]
 	ldrh	r2, [r4, #2]
+	ldrh	r1, [r4]
 	str	r3, [r5, #8]
-	ldr	r3, .L1769+4
+	ldr	r3, .L1786+4
 	ldrh	r0, [r6, #10]
 	str	fp, [r5]
 	ldr	r3, [r3]
@@ -12174,19 +12228,14 @@ FtlBbmTblFlush:
 	str	r3, [r5, #4]
 	ldrh	r3, [r4, #4]
 	str	r0, [sp]
-	ldr	r0, .L1769+36
+	ldr	r0, .L1786+36
 	bl	printf
-	movs	r3, #1
-	ldr	r0, .L1769+12
-	mov	r2, r3
-	mov	r1, r3
-	bl	FlashProgPages
-	ldr	r3, .L1769+40
+	ldr	r3, .L1786+40
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1764
+	blt	.L1781
 	ldr	r3, [r4, #8]
 	ldrh	r2, [r4]
 	strh	fp, [r4, #2]	@ movhi
@@ -12196,7 +12245,7 @@ FtlBbmTblFlush:
 	strh	r2, [r6, #8]	@ movhi
 	ldrh	r3, [r4, #4]
 	strh	r2, [r4, #4]	@ movhi
-	ldr	r2, .L1769+44
+	ldr	r2, .L1786+44
 	strh	r3, [r4]	@ movhi
 	lsls	r3, r3, #10
 	ldr	r0, [r2]
@@ -12205,38 +12254,38 @@ FtlBbmTblFlush:
 	mov	r1, r2
 	str	r3, [r0, #4]
 	bl	FlashEraseBlocks
+.L1781:
 	movs	r3, #1
-	ldr	r0, .L1769+12
+	ldr	r0, .L1786+12
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.L1764:
 	ldrh	r3, [r10, #2]
 	adds	r3, r3, #1
 	strh	r3, [r10, #2]	@ movhi
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	bne	.L1765
+	bne	.L1782
 	adds	r7, r7, #1
 	ldr	r1, [r5, #4]
 	uxth	r7, r7
-	ldr	r0, .L1769+48
+	ldr	r0, .L1786+48
 	bl	printf
 	cmp	r7, #3
-	bls	.L1763
+	bls	.L1780
 	mov	r2, r7
 	ldr	r1, [r5, #4]
-	ldr	r0, .L1769+52
+	ldr	r0, .L1786+52
 	bl	printf
 	ldr	r2, [sp, #12]
 	movs	r3, #1
 	str	r3, [r2]
-.L1760:
+.L1777:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1762:
+.L1779:
 	ldrh	r2, [r10]
 	ldr	r3, [r5, #8]
 	ldr	r1, [r6, #4]!
@@ -12245,17 +12294,17 @@ FtlBbmTblFlush:
 	adds	r4, r4, #1
 	add	r0, r3, r0, lsl #2
 	bl	ftl_memcpy
-	b	.L1761
-.L1765:
+	b	.L1778
+.L1782:
 	ldr	r3, [sp, #8]
 	cmp	r3, #0
-	bne	.L1760
+	bne	.L1777
 	movs	r3, #1
 	str	r3, [sp, #8]
-	b	.L1763
-.L1770:
+	b	.L1780
+.L1787:
 	.align	2
-.L1769:
+.L1786:
 	.word	.LANCHOR77
 	.word	.LANCHOR188
 	.word	.LANCHOR183
@@ -12281,264 +12330,288 @@ FtlBbmTblFlush:
 	.fpu softvfp
 	.type	allocate_data_superblock, %function
 allocate_data_superblock:
-	@ args = 0, pretend = 0, frame = 16
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r3, .L1853
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-	ldr	r3, .L1834
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L1773
-	ldr	r7, .L1834+4
-.L1772:
-	ldr	r3, .L1834+4
-	ldr	r6, .L1834+8
+	bne	.L1790
+.L1789:
+	ldr	r3, .L1853+4
+	ldr	r8, .L1853+60
+	ldr	r7, .L1853+8
 	ldrh	r3, [r3]
-	ldrh	r2, [r6]
+	ldrh	r2, [r8]
 	add	r3, r3, r2
-	ldr	r2, .L1834+12
-	ldrh	r2, [r2]
+	ldrh	r2, [r7]
 	cmp	r3, r2
-	ble	.L1774
-	ldr	r1, .L1834+16
-	mov	r2, #3168
-	ldr	r0, .L1834+20
+	ble	.L1791
+	ldr	r1, .L1853+12
+	movw	r2, #3108
+	ldr	r0, .L1853+16
 	bl	printf
-	ldr	r1, .L1834+24
-	ldr	r0, .L1834+28
+	ldr	r1, .L1853+20
+	ldr	r0, .L1853+24
 	bl	printf
-.L1774:
-	ldr	r3, .L1834+32
+.L1791:
+	ldr	r3, .L1853+28
 	ldrb	r2, [r4, #8]	@ zero_extendqisi2
 	cmp	r4, r3
-	bne	.L1775
-	ldr	r3, .L1834+36
-	ldrh	r5, [r7]
+	bne	.L1792
+	ldr	r3, .L1853+4
+	ldrh	r5, [r3]
+	ldr	r3, .L1853+32
 	ldr	r3, [r3]
 	lsrs	r0, r5, #1
-	mul	ip, r3, r5
 	adds	r1, r0, #1
-	add	r1, r1, ip, lsr #2
-	ldr	ip, .L1834+48
+	mul	r6, r3, r5
+	add	r1, r1, r6, lsr #2
+	ldr	r6, .L1853+36
 	uxth	r1, r1
-	ldr	ip, [ip]
-	cmp	ip, #0
-	beq	.L1776
-	ldr	ip, .L1834+52
-	ldr	ip, [ip]
-	cmp	ip, #39
-	bhi	.L1776
-	cmp	ip, #2
-	bls	.L1809
-	lsls	r5, r5, #31
-	bpl	.L1805
+	ldr	r6, [r6]
+	cbz	r6, .L1793
+	ldr	r6, .L1853+40
+	ldr	r6, [r6]
+	cmp	r6, #39
+	bhi	.L1793
+	cmp	r6, #2
+	bls	.L1827
+	lsls	r1, r5, #31
+	bpl	.L1823
 	cmp	r3, #0
-	beq	.L1809
-.L1805:
+	beq	.L1827
+.L1823:
 	mov	r1, r0
-	b	.L1776
-.L1775:
+	b	.L1793
+.L1792:
 	cmp	r2, #1
-	bne	.L1809
-	ldr	r3, .L1834+40
+	bne	.L1827
+	ldr	r3, .L1853+44
 	ldrh	r3, [r3]
 	cmp	r3, #1
-	beq	.L1809
-	ldr	r3, .L1834+44
+	beq	.L1827
+	ldr	r3, .L1853+48
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1809
-	ldr	r0, .L1834+48
-	ldrh	r3, [r7]
+	bne	.L1827
+	ldr	r3, .L1853+4
+	ldr	r0, .L1853+36
+	ldrh	r3, [r3]
 	ldr	r0, [r0]
 	lsrs	r1, r3, #3
-	cbz	r0, .L1776
-	ldr	r0, .L1834+52
+	cbz	r0, .L1793
+	ldr	r0, .L1853+40
 	ldr	r0, [r0]
 	cmp	r0, #1
-	bhi	.L1776
+	bhi	.L1793
 	rsb	r3, r3, r3, lsl #3
 	ubfx	r1, r3, #3, #16
-.L1776:
-	cbz	r1, .L1777
+.L1793:
+	cbz	r1, .L1794
 	subs	r1, r1, #1
 	uxth	r1, r1
-.L1777:
-	ldr	r0, .L1834+56
+.L1794:
+	ldr	r0, .L1853+52
 	bl	List_pop_index_node
-	ldrh	r3, [r7]
+	ldr	r3, .L1853+4
 	mov	r5, r0
-	uxth	r8, r0
-	cbnz	r3, .L1778
-	ldr	r1, .L1834+16
-	movw	r2, #3188
-	ldr	r0, .L1834+20
+	uxth	r10, r0
+	ldrh	r3, [r3]
+	cbnz	r3, .L1795
+	ldr	r1, .L1853+12
+	movw	r2, #3128
+	ldr	r0, .L1853+16
 	bl	printf
-	ldr	r1, .L1834+24
-	ldr	r0, .L1834+28
+	ldr	r1, .L1853+20
+	ldr	r0, .L1853+24
 	bl	printf
-.L1778:
+.L1795:
+	ldr	r3, .L1853+4
+	ldr	r2, .L1853+4
+	ldrh	r3, [r3]
+	subs	r3, r3, #1
+	strh	r3, [r2]	@ movhi
 	ldrh	r3, [r7]
+	cmp	r3, r10
+	bls	.L1789
+	uxth	r5, r5
+	lsls	r3, r5, #1
+	str	r3, [sp]
+	ldr	r3, .L1853+56
+	ldr	r3, [r3]
+	ldrh	r6, [r3, r5, lsl #1]
+	cmp	r6, #0
+	bne	.L1789
+	strh	r10, [r4]	@ movhi
 	mov	r0, r4
-	subs	r3, r3, #1
-	strh	r3, [r7]	@ movhi
-	strh	r8, [r4]	@ movhi
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1779
-	ldr	r3, .L1834+60
-	uxth	r5, r5
+	cmp	r3, #0
+	bne	.L1797
+	ldr	r3, .L1853+56
 	movw	r2, #65535
 	ldr	r3, [r3]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
-	ldrh	r2, [r6]
-	ldrh	r3, [r7]
+	ldr	r3, .L1853+4
+	ldrh	r2, [r8]
+	ldrh	r3, [r3]
 	add	r3, r3, r2
-	ldr	r2, .L1834+12
-	ldrh	r2, [r2]
+	ldrh	r2, [r7]
 	cmp	r3, r2
-	ble	.L1772
-	mov	r2, #3200
-	ldr	r1, .L1834+16
-	ldr	r0, .L1834+20
+	ble	.L1789
+	movw	r2, #3144
+	ldr	r1, .L1853+12
+	ldr	r0, .L1853+16
 	bl	printf
-	ldr	r1, .L1834+24
-	ldr	r0, .L1834+28
+	ldr	r1, .L1853+20
+	ldr	r0, .L1853+24
 	bl	printf
-	b	.L1772
-.L1809:
+	b	.L1789
+.L1827:
 	movs	r1, #0
-	b	.L1777
-.L1779:
-	ldrh	r2, [r6]
-	ldrh	r3, [r7]
+	b	.L1794
+.L1854:
+	.align	2
+.L1853:
+	.word	.LANCHOR77
+	.word	.LANCHOR89
+	.word	.LANCHOR40
+	.word	.LANCHOR203
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LANCHOR94
+	.word	.LANCHOR172
+	.word	.LANCHOR28
+	.word	.LANCHOR170
+	.word	.LANCHOR44
+	.word	.LANCHOR8
+	.word	.LANCHOR88
+	.word	.LANCHOR84
+	.word	.LANCHOR86
+.L1797:
+	ldr	r3, .L1855
+	ldrh	r2, [r8]
+	ldrh	r3, [r3]
 	add	r3, r3, r2
-	ldr	r2, .L1834+12
-	ldrh	r2, [r2]
+	ldrh	r2, [r7]
 	cmp	r3, r2
-	ble	.L1781
-	ldr	r1, .L1834+16
-	movw	r2, #3203
-	ldr	r0, .L1834+20
+	ble	.L1799
+	ldr	r1, .L1855+4
+	movw	r2, #3147
+	ldr	r0, .L1855+8
 	bl	printf
-	ldr	r1, .L1834+24
-	ldr	r0, .L1834+28
+	ldr	r1, .L1855+12
+	ldr	r0, .L1855+16
 	bl	printf
-.L1781:
-	ldr	r2, .L1834+64
-	movs	r6, #0
-	ldr	fp, .L1834+100
-	add	ip, r4, #16
-	mov	lr, r6
-	movw	r10, #65535
-	ldrh	r1, [r2]
+.L1799:
+	ldr	r3, .L1855+20
+	add	lr, r4, #16
+	ldr	r2, .L1855+24
+	mov	r8, #0
+	ldr	ip, [r3]
+	ldrh	r0, [r2]
 	movs	r2, #36
-	ldr	r0, [fp]
-	str	r2, [sp, #4]
-	mov	r3, r0
-	mla	r1, r2, r1, r0
-	str	r1, [sp]
-.L1782:
-	ldr	r2, [sp]
-	cmp	r2, r3
-	bne	.L1784
-	cbnz	r6, .L1785
-	ldr	r1, .L1834+16
-	movw	r2, #3215
-	ldr	r0, .L1834+20
+	mov	r3, ip
+	mla	r0, r2, r0, ip
+.L1800:
+	cmp	r0, r3
+	bne	.L1802
+	cbnz	r6, .L1803
+	ldr	r1, .L1855+4
+	movw	r2, #3159
+	ldr	r0, .L1855+8
 	bl	printf
-	ldr	r1, .L1834+24
-	ldr	r0, .L1834+28
+	ldr	r1, .L1855+12
+	ldr	r0, .L1855+16
 	bl	printf
-.L1785:
-	ldr	r3, .L1834+48
-	uxth	r5, r5
-	ldr	r10, .L1834+104
+.L1803:
+	ldr	r3, .L1855+28
+	ldr	r8, .L1855+80
 	ldr	r3, [r3]
-	cbz	r3, .L1786
-	ldr	r3, .L1834+68
+	cbz	r3, .L1804
+	ldr	r3, .L1855+32
 	cmp	r4, r3
-	bne	.L1786
-	ldr	r3, [r10]
+	bne	.L1804
+	ldr	r3, [r8]
 	ldrh	r3, [r3, r5, lsl #1]
 	cmp	r3, #40
 	itt	hi
 	movhi	r3, #0
 	strbhi	r3, [r4, #8]
-.L1786:
-	ldr	r3, .L1834+72
+.L1804:
+	ldr	r3, .L1855+36
 	ldrh	r3, [r3]
-	cmp	r3, r8
-	bne	.L1787
-	ldr	r1, .L1834+16
-	movw	r2, #3222
-	ldr	r0, .L1834+20
+	cmp	r3, r10
+	bne	.L1805
+	ldr	r1, .L1855+4
+	movw	r2, #3166
+	ldr	r0, .L1855+8
 	bl	printf
-	ldr	r1, .L1834+24
-	ldr	r0, .L1834+28
+	ldr	r1, .L1855+12
+	ldr	r0, .L1855+16
 	bl	printf
-.L1787:
-	ldrb	r1, [r4, #8]	@ zero_extendqisi2
-	ldr	r2, .L1834+76
-	ldr	r3, .L1834+80
-	cmp	r1, #0
-	bne	.L1788
-	ldr	r0, [r10]
-	ldrh	lr, [r0, r5, lsl #1]
-	cmp	lr, #0
-	beq	.L1789
-	ldr	r1, .L1834+84
-	ldrh	ip, [r1]
-	add	r1, lr, ip
-.L1832:
-	strh	r1, [r0, r5, lsl #1]	@ movhi
-	mov	r0, r8
-	ldr	r1, [r2]
-	str	r3, [sp, #4]
-	str	r2, [sp]
-	adds	r1, r1, #1
-	str	r1, [r2]
+.L1805:
+	ldrb	r2, [r4, #8]	@ zero_extendqisi2
+	ldr	r3, .L1855+40
+	ldr	fp, .L1855+84
+	cmp	r2, #0
+	bne	.L1806
+	ldr	r1, [r8]
+	ldrh	r2, [r1, r5, lsl #1]
+	cmp	r2, #0
+	beq	.L1807
+	ldr	r0, .L1855+44
+	ldrh	r0, [r0]
+	add	r2, r2, r0
+.L1850:
+	strh	r2, [r1, r5, lsl #1]	@ movhi
+	mov	r0, r10
+	ldr	r2, [r3]
 	movs	r1, #0
+	str	r3, [sp, #4]
+	adds	r2, r2, #1
+	str	r2, [r3]
 	bl	ftl_set_blk_mode
-	ldm	sp, {r2, r3}
-.L1791:
-	lsls	r1, r5, #1
-	ldr	r3, [r3]
-	ldr	r2, [r2]
-	str	r1, [sp]
-	ldr	r1, [r10]
-	ldrh	ip, [r1, r5, lsl #1]
-	ldr	r1, .L1834+88
-	ldr	r0, [r1]
-	cmp	ip, r0
+.L1851:
+	ldr	r2, [r8]
+	ldr	r3, [sp, #4]
+	ldrh	r0, [r2, r5, lsl #1]
+	ldr	r2, .L1855+48
+	ldr	r1, [r2]
+	cmp	r0, r1
+	ldrh	r1, [r7]
 	it	hi
-	strhi	ip, [r1]
-	ldr	r1, .L1834+84
-	ldrh	r0, [r1]
-	ldr	r1, .L1834+12
-	mla	r0, r2, r0, r3
-	ldrh	r1, [r1]
+	strhi	r0, [r2]
+	ldr	r2, .L1855+44
+	ldr	r0, [r3]
+	ldr	r3, [fp]
+	ldrh	r2, [r2]
+	ldr	r7, .L1855+52
+	mla	r0, r0, r2, r3
 	bl	__aeabi_uidiv
-	ldr	r3, .L1834+92
-	ldr	ip, .L1834+108
+	ldr	r3, .L1855+56
 	str	r0, [r3]
-	ldr	r3, .L1834+96
-	ldr	r0, [fp]
+	ldr	r3, .L1855+60
 	ldr	r2, [r3]
-	adds	r1, r0, #4
 	ldr	r3, [r2, #16]
 	adds	r3, r3, #1
 	str	r3, [r2, #16]
+	ldr	r3, .L1855+20
+	ldr	r0, [r3]
 	movs	r3, #36
+	adds	r1, r0, #4
 	mla	r3, r3, r6, r0
 	adds	r3, r3, #40
-.L1793:
+.L1811:
 	adds	r1, r1, #36
 	cmp	r3, r1
-	bne	.L1794
-	ldr	r3, .L1834+44
+	bne	.L1812
+	ldr	r3, .L1855+64
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1795
+	cbz	r3, .L1813
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	mov	r2, r6
 	cmp	r3, #1
@@ -12546,171 +12619,151 @@ allocate_data_superblock:
 	moveq	r1, #0
 	movne	r1, #1
 	bl	FlashEraseBlocks
-.L1795:
-	ldrb	r1, [r4, #8]	@ zero_extendqisi2
+.L1813:
+	ldr	r3, .L1855+20
+	movs	r7, #0
+	mov	r8, r7
+	mov	fp, #36
 	mov	r2, r6
-	ldr	r0, [fp]
-	mov	r10, #0
+	ldrb	r1, [r4, #8]	@ zero_extendqisi2
+	ldr	r0, [r3]
 	bl	FlashEraseBlocks
-	mov	r3, r10
-	movs	r1, #36
-.L1797:
-	uxth	r2, r10
-	cmp	r6, r2
-	bhi	.L1799
-	cbz	r3, .L1800
-	mov	r0, r8
+.L1815:
+	uxth	r3, r7
+	cmp	r6, r3
+	bhi	.L1817
+	cmp	r8, #0
+	beq	.L1818
+	mov	r0, r10
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L1800:
+.L1818:
 	ldrb	r2, [r4, #7]	@ zero_extendqisi2
-	ldr	r1, .L1834+60
 	cmp	r2, #0
-	bne	.L1801
-	ldr	r3, [r1]
+	bne	.L1819
+	ldr	r3, .L1855+68
 	movw	r2, #65535
+	ldr	r3, [r3]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
-	b	.L1772
-.L1835:
-	.align	2
-.L1834:
-	.word	.LANCHOR77
-	.word	.LANCHOR89
-	.word	.LANCHOR86
-	.word	.LANCHOR40
-	.word	.LANCHOR203
-	.word	.LC5
-	.word	.LC6
-	.word	.LC7
-	.word	.LANCHOR94
-	.word	.LANCHOR172
-	.word	.LANCHOR44
-	.word	.LANCHOR8
-	.word	.LANCHOR28
-	.word	.LANCHOR170
-	.word	.LANCHOR88
-	.word	.LANCHOR84
-	.word	.LANCHOR38
-	.word	.LANCHOR92
-	.word	.LANCHOR204
-	.word	.LANCHOR167
-	.word	.LANCHOR168
-	.word	.LANCHOR48
-	.word	.LANCHOR169
-	.word	.LANCHOR205
-	.word	.LANCHOR191
-	.word	.LANCHOR78
-	.word	.LANCHOR79
-	.word	-1024
-.L1784:
-	ldrh	r1, [ip], #2
-	str	lr, [r3, #8]
-	str	lr, [r3, #12]
-	cmp	r1, r10
-	beq	.L1783
-	ldr	r2, [sp, #4]
-	lsls	r1, r1, #10
-	mla	r2, r2, r6, r0
+	b	.L1789
+.L1802:
+	ldrh	r1, [lr], #2
+	movw	fp, #65535
+	str	r8, [r3, #8]
+	str	r8, [r3, #12]
+	cmp	r1, fp
+	beq	.L1801
+	mla	fp, r2, r6, ip
 	adds	r6, r6, #1
+	lsls	r1, r1, #10
 	uxth	r6, r6
-	str	r1, [r2, #4]
-.L1783:
+	str	r1, [fp, #4]
+.L1801:
 	adds	r3, r3, #36
-	b	.L1782
-.L1789:
-	movs	r1, #2
-	b	.L1832
-.L1788:
-	ldr	r0, [r10]
-	str	r2, [sp, #4]
-	str	r3, [sp]
-	ldrh	r1, [r0, r5, lsl #1]
-	adds	r1, r1, #1
-	strh	r1, [r0, r5, lsl #1]	@ movhi
-	mov	r0, r8
-	ldr	r1, [r3]
-	adds	r1, r1, #1
-	str	r1, [r3]
+	b	.L1800
+.L1807:
+	movs	r2, #2
+	b	.L1850
+.L1806:
+	ldr	r1, [r8]
+	mov	r0, r10
+	str	r3, [sp, #4]
+	ldrh	r2, [r1, r5, lsl #1]
+	adds	r2, r2, #1
+	strh	r2, [r1, r5, lsl #1]	@ movhi
+	ldr	r2, [fp]
+	adds	r2, r2, #1
+	str	r2, [fp]
 	bl	ftl_set_blk_mode.part.10
-	ldr	r2, [sp, #4]
-	ldr	r3, [sp]
-	b	.L1791
-.L1794:
+	b	.L1851
+.L1812:
 	ldr	r2, [r1, #-36]
-	and	r2, r2, ip
+	ands	r2, r2, r7
 	str	r2, [r1, #-36]
-	b	.L1793
-.L1799:
-	ldr	r0, .L1836
-	mul	r2, r1, r10
-	ldr	r0, [r0]
-	add	ip, r0, r2
-	ldr	r2, [r0, r2]
-	adds	r0, r2, #1
-	bne	.L1798
-	ldr	r0, [ip, #4]
-	adds	r3, r3, #1
-	str	r1, [sp, #12]
-	str	r2, [sp, #8]
+	b	.L1811
+.L1817:
+	ldr	r2, .L1855+20
+	mul	r3, fp, r7
+	ldr	r2, [r2]
+	adds	r1, r2, r3
+	ldr	r2, [r2, r3]
+	adds	r3, r2, #1
+	bne	.L1816
+	ldr	r0, [r1, #4]
+	add	r8, r8, #1
+	str	r2, [sp, #4]
 	ubfx	r0, r0, #10, #16
-	str	r3, [sp, #4]
 	bl	FtlBbmMapBadBlock
-	ldr	r2, [sp, #8]
-	add	r0, r4, r10, lsl #1
-	ldr	r1, [sp, #12]
-	ldr	r3, [sp, #4]
-	strh	r2, [r0, #16]	@ movhi
-	ldrb	r2, [r4, #7]	@ zero_extendqisi2
-	subs	r2, r2, #1
-	strb	r2, [r4, #7]
-.L1798:
-	add	r10, r10, #1
-	b	.L1797
-.L1801:
-	ldr	r3, .L1836+4
-	ldr	r0, .L1836+8
+	ldr	r2, [sp, #4]
+	add	r3, r4, r7, lsl #1
+	strh	r2, [r3, #16]	@ movhi
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	subs	r3, r3, #1
+	strb	r3, [r4, #7]
+.L1816:
+	adds	r7, r7, #1
+	b	.L1815
+.L1819:
+	ldr	r3, .L1855+72
+	ldr	r1, .L1855+76
 	ldrh	r3, [r3]
-	strh	r8, [r4]	@ movhi
+	strh	r10, [r4]	@ movhi
 	smulbb	r3, r3, r2
 	movs	r2, #0
 	strh	r2, [r4, #2]	@ movhi
 	strb	r2, [r4, #6]
-	ldr	r2, [r0]
+	ldr	r2, [r1]
 	uxth	r3, r3
 	strh	r3, [r4, #4]	@ movhi
 	str	r2, [r4, #12]
 	adds	r2, r2, #1
-	str	r2, [r0]
-	ldr	r2, [r1]
+	str	r2, [r1]
+	ldr	r2, .L1855+68
 	ldr	r1, [sp]
+	ldr	r2, [r2]
 	strh	r3, [r2, r1]	@ movhi
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L1802
+	cbz	r3, .L1820
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1773
-.L1802:
-	ldr	r1, .L1836+12
-	movw	r2, #3281
-	ldr	r0, .L1836+16
+	cbnz	r3, .L1790
+.L1820:
+	ldr	r1, .L1855+4
+	movw	r2, #3225
+	ldr	r0, .L1855+8
 	bl	printf
-	ldr	r1, .L1836+20
-	ldr	r0, .L1836+24
+	ldr	r1, .L1855+12
+	ldr	r0, .L1855+16
 	bl	printf
-.L1773:
+.L1790:
 	movs	r0, #0
-	add	sp, sp, #16
+	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1837:
+.L1856:
 	.align	2
-.L1836:
-	.word	.LANCHOR78
-	.word	.LANCHOR53
-	.word	.LANCHOR159
+.L1855:
+	.word	.LANCHOR89
 	.word	.LANCHOR203
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
+	.word	.LANCHOR78
+	.word	.LANCHOR38
+	.word	.LANCHOR28
+	.word	.LANCHOR92
+	.word	.LANCHOR204
+	.word	.LANCHOR167
+	.word	.LANCHOR48
+	.word	.LANCHOR169
+	.word	-1024
+	.word	.LANCHOR205
+	.word	.LANCHOR191
+	.word	.LANCHOR8
+	.word	.LANCHOR84
+	.word	.LANCHOR53
+	.word	.LANCHOR159
+	.word	.LANCHOR79
+	.word	.LANCHOR168
 	.size	allocate_data_superblock, .-allocate_data_superblock
 	.section	.text.FtlGcFreeBadSuperBlk,"ax",%progbits
 	.align	1
@@ -12725,43 +12778,43 @@ FtlGcFreeBadSuperBlk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, r0
-	ldr	r4, .L1850
+	ldr	r4, .L1869
 	ldrh	r3, [r4]
-	cbz	r3, .L1839
-	ldr	r8, .L1850+12
+	cbz	r3, .L1858
+	ldr	r8, .L1869+12
 	movs	r7, #0
-.L1840:
-	ldr	r3, .L1850+4
+.L1859:
+	ldr	r3, .L1869+4
 	ldrh	r2, [r3]
 	uxth	r3, r7
 	cmp	r2, r3
-	bhi	.L1846
+	bhi	.L1865
 	bl	FtlGcReFreshBadBlk
-.L1839:
+.L1858:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1846:
-	ldr	r2, .L1850+8
+.L1865:
+	ldr	r2, .L1869+8
 	uxth	r3, r7
 	mov	r1, r10
 	mov	fp, #0
 	ldrb	r0, [r2, r3]	@ zero_extendqisi2
 	bl	V2P_block
 	mov	r1, r0
-.L1841:
+.L1860:
 	ldrh	r3, [r4]
 	uxth	r5, fp
 	cmp	r3, r5
-	bhi	.L1845
+	bhi	.L1864
 	adds	r7, r7, #1
-	b	.L1840
-.L1845:
+	b	.L1859
+.L1864:
 	uxth	r6, fp
 	ldrh	r3, [r8, r6, lsl #1]
 	cmp	r3, r1
-	bne	.L1842
+	bne	.L1861
 	mov	r0, r1
 	str	r1, [sp, #4]
 	bl	FtlBbmMapBadBlock
@@ -12769,23 +12822,23 @@ FtlGcFreeBadSuperBlk:
 	ldrh	r2, [r4]
 	add	r3, r8, r6, lsl #1
 	ldr	r1, [sp, #4]
-.L1843:
+.L1862:
 	cmp	r5, r2
-	bcc	.L1844
+	bcc	.L1863
 	subs	r2, r2, #1
 	strh	r2, [r4]	@ movhi
-.L1842:
+.L1861:
 	add	fp, fp, #1
-	b	.L1841
-.L1844:
+	b	.L1860
+.L1863:
 	ldrh	r0, [r3, #2]!
 	adds	r5, r5, #1
 	uxth	r5, r5
 	strh	r0, [r3, #-2]	@ movhi
-	b	.L1843
-.L1851:
+	b	.L1862
+.L1870:
 	.align	2
-.L1850:
+.L1869:
 	.word	.LANCHOR117
 	.word	.LANCHOR38
 	.word	.LANCHOR47
@@ -12804,32 +12857,32 @@ update_vpc_list:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	mov	r4, r0
-	ldr	r3, .L1862
+	ldr	r3, .L1881
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	bne	.L1853
-	ldr	r2, .L1862+4
+	bne	.L1872
+	ldr	r2, .L1881+4
 	ldrh	r1, [r2]
 	cmp	r1, r0
-	bne	.L1854
+	bne	.L1873
 	movw	r3, #65535
 	strh	r3, [r2]	@ movhi
-.L1855:
-	ldr	r5, .L1862+8
+.L1874:
+	ldr	r5, .L1881+8
 	mov	r1, r4
-	ldr	r0, .L1862+12
+	ldr	r0, .L1881+12
 	bl	List_remove_node
 	ldrh	r3, [r5]
-	cbnz	r3, .L1857
-	ldr	r1, .L1862+16
-	mov	r2, #3392
-	ldr	r0, .L1862+20
+	cbnz	r3, .L1876
+	ldr	r1, .L1881+16
+	movw	r2, #3336
+	ldr	r0, .L1881+20
 	bl	printf
-	ldr	r1, .L1862+24
-	ldr	r0, .L1862+28
+	ldr	r1, .L1881+24
+	ldr	r0, .L1881+28
 	bl	printf
-.L1857:
+.L1876:
 	ldrh	r3, [r5]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -12837,47 +12890,47 @@ update_vpc_list:
 	bl	free_data_superblock
 	mov	r0, r4
 	bl	FtlGcFreeBadSuperBlk
-	ldr	r3, .L1862+32
+	ldr	r3, .L1881+32
 	ldrh	r2, [r5]
 	ldrh	r3, [r3]
 	add	r3, r3, r2
-	ldr	r2, .L1862+36
+	ldr	r2, .L1881+36
 	ldrh	r2, [r2]
 	cmp	r3, r2
-	ble	.L1861
-	ldr	r1, .L1862+16
-	movw	r2, #3395
-	ldr	r0, .L1862+20
+	ble	.L1880
+	ldr	r1, .L1881+16
+	movw	r2, #3339
+	ldr	r0, .L1881+20
 	bl	printf
-	ldr	r1, .L1862+24
-	ldr	r0, .L1862+28
+	ldr	r1, .L1881+24
+	ldr	r0, .L1881+28
 	bl	printf
-.L1861:
+.L1880:
 	movs	r3, #1
-	b	.L1852
-.L1854:
-	ldr	r2, .L1862+40
+	b	.L1871
+.L1873:
+	ldr	r2, .L1881+40
 	ldrh	r2, [r2]
 	cmp	r2, r0
-	beq	.L1852
-	ldr	r2, .L1862+44
+	beq	.L1871
+	ldr	r2, .L1881+44
 	ldrh	r2, [r2]
 	cmp	r2, r0
-	beq	.L1852
-	ldr	r2, .L1862+48
+	beq	.L1871
+	ldr	r2, .L1881+48
 	ldrh	r2, [r2]
 	cmp	r2, r0
-	bne	.L1855
-.L1852:
+	bne	.L1874
+.L1871:
 	mov	r0, r3
 	pop	{r3, r4, r5, pc}
-.L1853:
+.L1872:
 	bl	List_update_data_list
 	movs	r3, #0
-	b	.L1852
-.L1863:
+	b	.L1871
+.L1882:
 	.align	2
-.L1862:
+.L1881:
 	.word	.LANCHOR84
 	.word	.LANCHOR204
 	.word	.LANCHOR86
@@ -12907,47 +12960,47 @@ decrement_vpc_count:
 	push	{r4, r5, r6, lr}
 	cmp	r0, r3
 	mov	r4, r0
-	beq	.L1865
-	ldr	r5, .L1876
+	beq	.L1884
+	ldr	r5, .L1895
 	ldr	r3, [r5]
 	ldrh	r2, [r3, r0, lsl #1]
 	cmp	r2, #0
-	bne	.L1866
+	bne	.L1885
 	mov	r1, r0
-	ldr	r0, .L1876+4
+	ldr	r0, .L1895+4
 	bl	printf
 	ldr	r3, [r5]
 	ldrh	r3, [r3, r4, lsl #1]
-	cbnz	r3, .L1867
-	ldr	r1, .L1876+8
-	movw	r2, #3410
-	ldr	r0, .L1876+12
+	cbnz	r3, .L1886
+	ldr	r1, .L1895+8
+	movw	r2, #3354
+	ldr	r0, .L1895+12
 	bl	printf
-	ldr	r1, .L1876+16
-	ldr	r0, .L1876+20
+	ldr	r1, .L1895+16
+	ldr	r0, .L1895+20
 	bl	printf
-.L1867:
+.L1886:
 	ldr	r3, [r5]
 	movs	r2, #32
 	mov	r1, r4
-	ldr	r0, .L1876+24
+	ldr	r0, .L1895+24
 	strh	r2, [r3, r4, lsl #1]	@ movhi
 	bl	test_node_in_list
-	cbz	r0, .L1868
-	ldr	r6, .L1876+28
+	cbz	r0, .L1887
+	ldr	r6, .L1895+28
 	mov	r1, r4
-	ldr	r0, .L1876+24
+	ldr	r0, .L1895+24
 	bl	List_remove_node
 	ldrh	r3, [r6]
-	cbnz	r3, .L1869
-	ldr	r1, .L1876+8
-	movw	r2, #3414
-	ldr	r0, .L1876+12
+	cbnz	r3, .L1888
+	ldr	r1, .L1895+8
+	movw	r2, #3358
+	ldr	r0, .L1895+12
 	bl	printf
-	ldr	r1, .L1876+16
-	ldr	r0, .L1876+20
+	ldr	r1, .L1895+16
+	ldr	r0, .L1895+20
 	bl	printf
-.L1869:
+.L1888:
 	ldrh	r3, [r6]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -12955,33 +13008,33 @@ decrement_vpc_count:
 	bl	INSERT_DATA_LIST
 	ldr	r3, [r5]
 	mov	r1, r4
-	ldr	r0, .L1876+32
+	ldr	r0, .L1895+32
 	ldrh	r2, [r3, r4, lsl #1]
 	bl	printf
-.L1868:
+.L1887:
 	mov	r0, r4
 	bl	FtlGcRefreshBlock
-.L1872:
+.L1891:
 	movs	r5, #0
-	b	.L1864
-.L1866:
+	b	.L1883
+.L1885:
 	subs	r2, r2, #1
 	strh	r2, [r3, r0, lsl #1]	@ movhi
-.L1865:
-	ldr	r6, .L1876+36
+.L1884:
+	ldr	r6, .L1895+36
 	movw	r3, #65535
 	ldrh	r0, [r6]
 	cmp	r0, r3
-	bne	.L1871
+	bne	.L1890
 	strh	r4, [r6]	@ movhi
-	b	.L1872
-.L1871:
+	b	.L1891
+.L1890:
 	cmp	r4, r0
-	beq	.L1872
+	beq	.L1891
 	bl	update_vpc_list
-	ldr	r3, .L1876+40
+	ldr	r3, .L1895+40
 	adds	r5, r0, #0
-	ldr	r2, .L1876+44
+	ldr	r2, .L1895+44
 	it	ne
 	movne	r5, #1
 	strh	r4, [r6]	@ movhi
@@ -12989,28 +13042,28 @@ decrement_vpc_count:
 	ldr	r2, [r2]
 	subs	r3, r3, r2
 	asrs	r2, r3, #1
-	ldr	r3, .L1876+48
+	ldr	r3, .L1895+48
 	muls	r3, r2, r3
-	ldr	r2, .L1876
+	ldr	r2, .L1895
 	ldr	r2, [r2]
 	uxth	r1, r3
 	ldrh	r2, [r2, r1, lsl #1]
-	cbnz	r2, .L1864
+	cbnz	r2, .L1883
 	cmp	r4, r1
-	beq	.L1864
-	ldr	r1, .L1876+8
-	movw	r2, #3435
-	ldr	r0, .L1876+12
+	beq	.L1883
+	ldr	r1, .L1895+8
+	movw	r2, #3379
+	ldr	r0, .L1895+12
 	bl	printf
-	ldr	r1, .L1876+16
-	ldr	r0, .L1876+20
+	ldr	r1, .L1895+16
+	ldr	r0, .L1895+20
 	bl	printf
-.L1864:
+.L1883:
 	mov	r0, r5
 	pop	{r4, r5, r6, pc}
-.L1877:
+.L1896:
 	.align	2
-.L1876:
+.L1895:
 	.word	.LANCHOR84
 	.word	.LC36
 	.word	.LANCHOR207
@@ -13040,71 +13093,71 @@ FtlSlcSuperblockCheck:
 	push	{r4, r5, r6, lr}
 	mov	r4, r0
 	cmp	r3, #0
-	beq	.L1878
+	beq	.L1897
 	ldrh	r2, [r0]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1878
+	beq	.L1897
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
-	ldr	r5, .L1889
-	ldr	r6, .L1889+4
+	ldr	r5, .L1908
+	ldr	r6, .L1908+4
 	adds	r3, r3, #8
 	ldrh	r3, [r0, r3, lsl #1]
-.L1882:
+.L1901:
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L1884
+	beq	.L1903
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1885
+	bne	.L1904
 	ldrb	r1, [r5]	@ zero_extendqisi2
-	cbnz	r1, .L1885
+	cbnz	r1, .L1904
 	ldrh	r1, [r4, #2]
 	ldrh	r1, [r6, r1, lsl #1]
 	cmp	r1, r2
-	bne	.L1885
+	bne	.L1904
 	ldrh	r3, [r4, #4]
 	ldrh	r0, [r4]
 	subs	r3, r3, #1
 	strh	r3, [r4, #4]	@ movhi
 	bl	decrement_vpc_count
 	ldrh	r2, [r4, #4]
-	cbnz	r2, .L1884
+	cbnz	r2, .L1903
 	ldrh	r3, [r4, #2]
 	strb	r2, [r4, #6]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	pop	{r4, r5, r6, pc}
-.L1884:
+.L1903:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	ldr	r2, .L1889+8
+	ldr	r2, .L1908+8
 	adds	r3, r3, #1
 	ldrh	r2, [r2]
 	uxtb	r3, r3
 	strb	r3, [r4, #6]
 	cmp	r2, r3
-	bne	.L1883
+	bne	.L1902
 	ldrh	r3, [r4, #2]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [r4, #6]
-.L1883:
+.L1902:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r3, [r4, r3, lsl #1]
-	b	.L1882
-.L1885:
+	b	.L1901
+.L1904:
 	ldrb	r2, [r5]	@ zero_extendqisi2
-	cbz	r2, .L1878
+	cbz	r2, .L1897
 	cmp	r3, #1
-	bne	.L1878
-	ldr	r3, .L1889+12
+	bne	.L1897
+	ldr	r3, .L1908+12
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1878
-	ldr	r3, .L1889+16
+	bcc	.L1897
+	ldr	r3, .L1908+16
 	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
 	ldr	r2, [r3]
@@ -13112,16 +13165,16 @@ FtlSlcSuperblockCheck:
 	subs	r3, r3, r0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
 	movs	r3, #0
-	ldr	r2, .L1889+20
+	ldr	r2, .L1908+20
 	strh	r3, [r4, #4]	@ movhi
 	strb	r3, [r4, #6]
 	ldrh	r2, [r2]
 	strh	r2, [r4, #2]	@ movhi
-.L1878:
+.L1897:
 	pop	{r4, r5, r6, pc}
-.L1890:
+.L1909:
 	.align	2
-.L1889:
+.L1908:
 	.word	.LANCHOR8
 	.word	.LANCHOR120
 	.word	.LANCHOR38
@@ -13145,93 +13198,93 @@ get_new_active_ppa:
 	push	{r4, r5, r6, r7, r8, lr}
 	mov	r4, r0
 	cmp	r2, r3
-	bne	.L1892
-	ldr	r1, .L1913
-	movw	r2, #3332
-	ldr	r0, .L1913+4
+	bne	.L1911
+	ldr	r1, .L1932
+	movw	r2, #3276
+	ldr	r0, .L1932+4
 	bl	printf
-	ldr	r1, .L1913+8
-	ldr	r0, .L1913+12
+	ldr	r1, .L1932+8
+	ldr	r0, .L1932+12
 	bl	printf
-.L1892:
-	ldr	r5, .L1913+16
+.L1911:
+	ldr	r5, .L1932+16
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5]
 	cmp	r2, r3
-	bne	.L1893
-	ldr	r1, .L1913
-	movw	r2, #3333
-	ldr	r0, .L1913+4
+	bne	.L1912
+	ldr	r1, .L1932
+	movw	r2, #3277
+	ldr	r0, .L1932+4
 	bl	printf
-	ldr	r1, .L1913+8
-	ldr	r0, .L1913+12
+	ldr	r1, .L1932+8
+	ldr	r0, .L1932+12
 	bl	printf
-.L1893:
+.L1912:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1894
-	ldr	r1, .L1913
-	movw	r2, #3334
-	ldr	r0, .L1913+4
+	cbnz	r3, .L1913
+	ldr	r1, .L1932
+	movw	r2, #3278
+	ldr	r0, .L1932+4
 	bl	printf
-	ldr	r1, .L1913+8
-	ldr	r0, .L1913+12
+	ldr	r1, .L1932+8
+	ldr	r0, .L1932+12
 	bl	printf
-.L1894:
+.L1913:
 	movs	r3, #0
-	ldr	r7, .L1913+20
+	ldr	r7, .L1932+20
 	strb	r3, [r4, #10]
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	ldr	r6, .L1913+24
+	ldr	r6, .L1932+24
 	adds	r3, r3, #8
 	ldrh	r2, [r4, r3, lsl #1]
-.L1895:
+.L1914:
 	movw	r0, #65535
 	cmp	r2, r0
-	beq	.L1896
+	beq	.L1915
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	ldrh	r1, [r4, #2]
 	cmp	r3, #1
 	ldrh	r3, [r4, #4]
-	bne	.L1898
+	bne	.L1917
 	ldrb	ip, [r6]	@ zero_extendqisi2
 	cmp	ip, #0
-	bne	.L1898
-	ldr	ip, .L1913+28
+	bne	.L1917
+	ldr	ip, .L1932+28
 	ldrh	ip, [ip, r1, lsl #1]
 	cmp	ip, r0
-	bne	.L1898
+	bne	.L1917
 	subs	r3, r3, #1
 	ldrh	r0, [r4]
 	strh	r3, [r4, #4]	@ movhi
 	bl	decrement_vpc_count
-.L1896:
+.L1915:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	ldrh	r2, [r7]
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r2, r3
 	strb	r3, [r4, #6]
-	bne	.L1897
+	bne	.L1916
 	ldrh	r3, [r4, #2]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [r4, #6]
-.L1897:
+.L1916:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r2, [r4, r3, lsl #1]
-	b	.L1895
-.L1898:
-	ldr	r8, .L1913+24
+	b	.L1914
+.L1917:
+	ldr	r8, .L1932+24
 	orr	r6, r1, r2, lsl #10
 	subs	r3, r3, #1
 	strh	r3, [r4, #4]	@ movhi
-.L1899:
+.L1918:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	movw	r2, #65535
 	ldrh	r0, [r7]
-.L1901:
+.L1920:
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, r0
@@ -13243,31 +13296,31 @@ get_new_active_ppa:
 	add	r1, r3, #8
 	ldrh	r1, [r4, r1, lsl #1]
 	cmp	r1, r2
-	beq	.L1901
+	beq	.L1920
 	strb	r3, [r4, #6]
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1902
+	bne	.L1921
 	ldrb	r1, [r8]	@ zero_extendqisi2
 	ldrh	r3, [r4, #2]
-	cbnz	r1, .L1903
-	ldr	r1, .L1913+28
+	cbnz	r1, .L1922
+	ldr	r1, .L1932+28
 	ldrh	r3, [r1, r3, lsl #1]
 	cmp	r3, r2
-	bne	.L1902
+	bne	.L1921
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L1902
+	cbz	r3, .L1921
 	subs	r3, r3, #1
 	ldrh	r0, [r4]
 	strh	r3, [r4, #4]	@ movhi
 	bl	decrement_vpc_count
-	b	.L1899
-.L1903:
-	ldr	r2, .L1913+32
+	b	.L1918
+.L1922:
+	ldr	r2, .L1932+32
 	ldrh	r2, [r2]
 	cmp	r3, r2
-	bcc	.L1902
-	ldr	r3, .L1913+36
+	bcc	.L1921
+	ldr	r3, .L1932+36
 	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
 	ldr	r2, [r3]
@@ -13279,26 +13332,26 @@ get_new_active_ppa:
 	strh	r3, [r4, #4]	@ movhi
 	strb	r3, [r4, #6]
 	strh	r2, [r4, #2]	@ movhi
-.L1902:
+.L1921:
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5]
 	cmp	r2, r3
-	bne	.L1891
+	bne	.L1910
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L1891
-	ldr	r1, .L1913
-	movw	r2, #3378
-	ldr	r0, .L1913+4
+	cbz	r3, .L1910
+	ldr	r1, .L1932
+	movw	r2, #3322
+	ldr	r0, .L1932+4
 	bl	printf
-	ldr	r1, .L1913+8
-	ldr	r0, .L1913+12
+	ldr	r1, .L1932+8
+	ldr	r0, .L1932+12
 	bl	printf
-.L1891:
+.L1910:
 	mov	r0, r6
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1914:
+.L1933:
 	.align	2
-.L1913:
+.L1932:
 	.word	.LANCHOR208
 	.word	.LC5
 	.word	.LC6
@@ -13321,98 +13374,98 @@ get_new_active_ppa:
 FtlVpcTblFlush:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1935
+	ldr	r2, .L1954
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r1, [r3]
-	str	r3, [sp]
-	cmp	r1, #0
-	bne	.L1917
-	ldr	r3, .L1935+4
-	ldr	r7, .L1935+8
-	ldr	r8, .L1935+112
-	ldr	r4, .L1935+12
-	ldr	r6, [r7]
-	ldr	r0, [r8]
-	ldrh	r2, [r3]
-	str	r6, [r4, #12]
-	str	r0, [r4, #8]
+	ldr	r3, [r2]
+	str	r2, [sp, #4]
+	cmp	r3, #0
+	bne	.L1936
+	ldr	r4, .L1954+4
+	ldr	fp, .L1954+108
+	ldr	r8, .L1954+112
+	ldr	r5, .L1954+8
+	ldr	r0, [fp]
+	ldr	r6, [r8]
+	ldrh	r2, [r4]
+	str	r0, [r5, #8]
+	str	r6, [r5, #12]
 	strh	r2, [r6, #2]	@ movhi
 	movw	r2, #61604
-	ldr	r5, .L1935+16
+	ldr	r7, .L1954+12
 	strh	r2, [r6]	@ movhi
-	ldr	r2, [r3, #8]
-	ldrh	r3, [r3, #6]
-	str	r1, [r6, #8]
+	str	r3, [r6, #12]
+	ldr	ip, .L1954+116
+	ldr	r2, [r4, #8]
+	str	r3, [r6, #8]
+	ldr	r3, .L1954+16
 	str	r2, [r6, #4]
-	strh	r3, [r5, #8]	@ movhi
-	ldr	r3, .L1935+20
-	ldr	ip, .L1935+116
-	ldr	r2, .L1935+24
+	stm	r7, {r3, ip}
+	ldrh	r3, [r4, #6]
+	strh	r3, [r7, #8]	@ movhi
+	ldr	r3, .L1954+20
 	ldrh	r3, [r3]
-	str	r1, [r6, #12]
-	stm	r5, {r2, ip}
-	strb	r3, [r5, #10]
-	ldr	r3, .L1935+28
+	strb	r3, [r7, #10]
+	ldr	r3, .L1954+24
 	ldrh	r2, [r3]
 	ldrh	r1, [r3, #2]
-	strh	r2, [r5, #14]	@ movhi
+	strh	r2, [r7, #14]	@ movhi
 	ldrb	r2, [r3, #6]	@ zero_extendqisi2
 	ldrb	r3, [r3, #8]	@ zero_extendqisi2
-	strb	r3, [r5, #11]
+	strb	r3, [r7, #11]
 	orr	r2, r2, r1, lsl #6
-	ldr	r3, .L1935+32
-	strh	r2, [r5, #16]	@ movhi
+	ldr	r3, .L1954+28
+	strh	r2, [r7, #16]	@ movhi
 	ldrh	r2, [r3]
 	ldrh	r1, [r3, #2]
-	strh	r2, [r5, #18]	@ movhi
+	strh	r2, [r7, #18]	@ movhi
 	ldrb	r2, [r3, #6]	@ zero_extendqisi2
 	ldrb	r3, [r3, #8]	@ zero_extendqisi2
-	strb	r3, [r5, #12]
+	strb	r3, [r7, #12]
 	orr	r2, r2, r1, lsl #6
-	ldr	r3, .L1935+36
-	strh	r2, [r5, #20]	@ movhi
+	ldr	r3, .L1954+32
+	strh	r2, [r7, #20]	@ movhi
 	ldrh	r2, [r3]
-	strh	r2, [r5, #22]	@ movhi
+	strh	r2, [r7, #22]	@ movhi
 	ldrh	r1, [r3, #2]
 	ldrb	r2, [r3, #6]	@ zero_extendqisi2
 	ldrb	r3, [r3, #8]	@ zero_extendqisi2
-	strb	r3, [r5, #13]
+	strb	r3, [r7, #13]
 	orr	r2, r2, r1, lsl #6
-	ldr	r3, .L1935+40
+	ldr	r3, .L1954+36
 	movs	r1, #255
-	strh	r2, [r5, #24]	@ movhi
+	strh	r2, [r7, #24]	@ movhi
 	ldr	r3, [r3]
-	str	r3, [r5, #32]
-	ldr	r3, .L1935+44
+	str	r3, [r7, #32]
+	ldr	r3, .L1954+40
 	ldr	r3, [r3]
-	str	r3, [r5, #40]
-	ldr	r3, .L1935+48
+	str	r3, [r7, #40]
+	ldr	r3, .L1954+44
 	ldr	r3, [r3]
-	str	r3, [r5, #36]
-	ldr	r3, .L1935+52
+	str	r3, [r7, #36]
+	ldr	r3, .L1954+48
 	ldrh	r3, [r3]
-	strh	r3, [r5, #44]	@ movhi
-	ldr	r3, .L1935+56
+	strh	r3, [r7, #44]	@ movhi
+	ldr	r3, .L1954+52
 	ldrh	r3, [r3]
-	strh	r3, [r5, #46]	@ movhi
-	ldr	r3, .L1935+60
+	strh	r3, [r7, #46]	@ movhi
+	ldr	r3, .L1954+56
 	ldrh	r2, [r3]
 	bl	ftl_memset
-	mov	r1, r5
-	ldr	r5, .L1935+64
+	mov	r1, r7
+	ldr	r7, .L1954+60
 	movs	r2, #48
-	ldr	r0, [r4, #8]
+	ldr	r0, [r5, #8]
 	bl	ftl_memcpy
-	ldrh	r2, [r5]
-	ldr	r3, .L1935+68
-	ldr	r0, [r4, #8]
+	ldrh	r2, [r7]
+	ldr	r3, .L1954+64
+	ldr	r0, [r5, #8]
 	ldr	r1, [r3]
 	lsls	r2, r2, #1
 	adds	r0, r0, #48
 	bl	ftl_memcpy
-	ldrh	r0, [r5]
-	ldr	r3, [r4, #8]
-	ldr	r1, .L1935+72
+	ldrh	r0, [r7]
+	ldr	r3, [r5, #8]
+	ldr	r1, .L1954+68
 	lsrs	r2, r0, #3
 	adds	r0, r0, #24
 	lsls	r0, r0, #1
@@ -13421,135 +13474,124 @@ FtlVpcTblFlush:
 	bic	r0, r0, #3
 	add	r0, r0, r3
 	bl	ftl_memcpy
-	ldr	r3, .L1935+76
-	str	r7, [sp, #4]
+	ldr	r3, .L1954+72
 	ldrh	r3, [r3]
-	cbz	r3, .L1918
-	ldrh	r0, [r5]
-	ldr	r3, .L1935+80
-	ldr	r1, .L1935+84
+	cbz	r3, .L1937
+	ldrh	r0, [r7]
+	ldr	r3, .L1954+76
+	ldr	r1, .L1954+80
 	ldrh	r2, [r3]
 	lsrs	r3, r0, #3
 	ldr	r1, [r1]
 	add	r3, r3, r0, lsl #1
-	ldr	r0, [r4, #8]
+	ldr	r0, [r5, #8]
 	adds	r3, r3, #52
 	lsls	r2, r2, #2
 	ubfx	r3, r3, #2, #14
 	add	r0, r0, r3, lsl #2
 	bl	ftl_memcpy
-.L1918:
-	ldr	r5, .L1935+4
+.L1937:
 	movs	r7, #0
-	movw	fp, #65535
+	movw	r10, #65535
 	movs	r0, #0
 	bl	FtlUpdateVaildLpn
-	mov	r10, r5
-.L1919:
+.L1938:
+	ldr	r3, [fp]
+	ldrh	r1, [r4, #2]
+	ldrh	r2, [r4]
+	str	r3, [r5, #8]
 	ldr	r3, [r8]
-	ldrh	r2, [r5]
-	ldr	r0, .L1935+12
-	str	r3, [r4, #8]
-	ldr	r3, [sp, #4]
-	ldr	r3, [r3]
-	str	r3, [r4, #12]
-	ldrh	r3, [r5, #2]
-	orr	r3, r3, r2, lsl #10
-	str	r3, [r4, #4]
-	movs	r3, #1
-	mov	r2, r3
-	mov	r1, r3
-	bl	FlashProgPages
-	ldr	r3, .L1935+88
-	ldrh	r2, [r5, #2]
+	str	r3, [r5, #12]
+	orr	r3, r1, r2, lsl #10
+	str	r3, [r5, #4]
+	ldr	r3, .L1954+84
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
-	cmp	r2, r3
-	blt	.L1920
-	ldrh	r3, [r5]
-	ldrh	fp, [r5, #4]
-	strh	r3, [r5, #4]	@ movhi
+	cmp	r1, r3
+	blt	.L1939
 	movs	r3, #0
-	strh	r3, [r5, #2]	@ movhi
+	ldrh	r10, [r4, #4]
+	strh	r3, [r4, #2]	@ movhi
+	strh	r2, [r4, #4]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r2, .L1935+44
-	strh	r0, [r5]	@ movhi
-	ldr	r3, [r2]
-	adds	r1, r3, #1
-	str	r3, [r5, #8]
-	str	r1, [r2]
+	ldr	r3, .L1954+40
+	ldr	r1, .L1954+40
+	strh	r0, [r4]	@ movhi
+	ldr	r3, [r3]
+	adds	r2, r3, #1
+	str	r3, [r4, #8]
+	str	r2, [r1]
 	lsls	r2, r0, #10
-	str	r2, [r4, #4]
+	str	r2, [r5, #4]
 	str	r3, [r6, #4]
-	movs	r3, #1
 	strh	r0, [r6, #2]	@ movhi
+.L1939:
+	movs	r3, #1
+	ldr	r0, .L1954+8
 	mov	r2, r3
 	mov	r1, r3
-	ldr	r0, .L1935+12
 	bl	FlashProgPages
-.L1920:
-	ldrh	r3, [r10, #2]
-	ldr	r2, [r4]
+	ldrh	r3, [r4, #2]
+	ldr	r2, [r5]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	adds	r1, r2, #1
-	strh	r3, [r10, #2]	@ movhi
-	bne	.L1921
+	strh	r3, [r4, #2]	@ movhi
+	bne	.L1940
 	cmp	r3, #1
-	bne	.L1922
-	ldr	r1, .L1935+92
-	movw	r2, #1219
-	ldr	r0, .L1935+96
+	bne	.L1941
+	ldr	r1, .L1954+88
+	movw	r2, #1209
+	ldr	r0, .L1954+92
 	bl	printf
-	ldr	r1, .L1935+100
-	ldr	r0, .L1935+104
+	ldr	r1, .L1954+96
+	ldr	r0, .L1954+100
 	bl	printf
-.L1922:
-	ldrh	r3, [r10, #2]
+.L1941:
+	ldrh	r3, [r4, #2]
 	adds	r7, r7, #1
 	uxth	r7, r7
 	cmp	r3, #1
 	itttt	eq
-	ldreq	r3, .L1935+88
+	ldreq	r3, .L1954+84
 	ldrheq	r3, [r3]
 	addeq	r3, r3, #-1
-	strheq	r3, [r10, #2]	@ movhi
+	strheq	r3, [r4, #2]	@ movhi
 	cmp	r7, #3
-	bls	.L1919
+	bls	.L1938
 	mov	r2, r7
-	ldr	r1, [r4, #4]
-	ldr	r0, .L1935+108
+	ldr	r1, [r5, #4]
+	ldr	r0, .L1954+104
 	bl	printf
-	ldr	r2, [sp]
+	ldr	r2, [sp, #4]
 	movs	r3, #1
 	str	r3, [r2]
-.L1917:
+.L1936:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1921:
+.L1940:
 	cmp	r3, #1
-	beq	.L1919
+	beq	.L1938
 	cmp	r2, #256
-	beq	.L1919
+	beq	.L1938
 	movw	r3, #65535
-	cmp	fp, r3
-	beq	.L1917
+	cmp	r10, r3
+	beq	.L1936
 	movs	r1, #1
-	mov	r0, fp
+	mov	r0, r10
 	bl	FtlFreeSysBlkQueueIn
-	b	.L1917
-.L1936:
+	b	.L1936
+.L1955:
 	.align	2
-.L1935:
+.L1954:
 	.word	.LANCHOR77
 	.word	.LANCHOR209
-	.word	.LANCHOR188
 	.word	.LANCHOR202
 	.word	.LANCHOR81
-	.word	.LANCHOR45
 	.word	1179929683
+	.word	.LANCHOR45
 	.word	.LANCHOR92
 	.word	.LANCHOR93
 	.word	.LANCHOR94
@@ -13572,7 +13614,8 @@ FtlVpcTblFlush:
 	.word	.LC7
 	.word	.LC38
 	.word	.LANCHOR183
-	.word	1342177353
+	.word	.LANCHOR188
+	.word	1342177360
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
 	.section	.text.FtlSuperblockPowerLostFix,"ax",%progbits
 	.align	1
@@ -13585,31 +13628,31 @@ FtlVpcTblFlush:
 FtlSuperblockPowerLostFix:
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1952
+	ldr	r3, .L1971
 	push	{r4, r5, r6, r7, r8, r10, lr}
 	mov	r4, r0
 	sub	sp, sp, #44
 	ldr	r8, [r3]
 	cmp	r8, #0
-	bne	.L1937
-	ldr	r3, .L1952+4
+	bne	.L1956
+	ldr	r3, .L1971+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1948
+	beq	.L1967
 	ldrb	r3, [r0, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1948
+	bne	.L1967
 	ldrh	r6, [r0, #4]
 	mov	r8, r3
-.L1939:
+.L1958:
 	mov	r3, #-1
-	ldr	r2, .L1952+8
+	ldr	r2, .L1971+8
 	str	r3, [sp, #20]
 	movs	r7, #0
-	ldr	r3, .L1952+12
+	ldr	r3, .L1971+12
 	ldr	r5, [r2]
 	mvn	r2, #2
-	ldr	r10, .L1952+24
+	ldr	r10, .L1971+24
 	ldr	r3, [r3]
 	str	r5, [sp, #16]
 	str	r3, [sp, #12]
@@ -13625,38 +13668,38 @@ FtlSuperblockPowerLostFix:
 	add	r2, r2, #1269760
 	addw	r2, r2, #1507
 	str	r2, [r3, #4]
-.L1940:
+.L1959:
 	adds	r6, r6, #-1
-	bcc	.L1943
+	bcc	.L1962
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1941
-.L1943:
-	ldr	r3, .L1952+16
+	cbnz	r3, .L1960
+.L1962:
+	ldr	r3, .L1971+16
 	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
-	ldr	r3, .L1952+20
+	ldr	r3, .L1971+20
 	ldrh	r3, [r3]
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [r4, #6]
 	strh	r3, [r4, #4]	@ movhi
-.L1937:
+.L1956:
 	add	sp, sp, #44
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L1948:
+.L1967:
 	movs	r6, #12
-	b	.L1939
-.L1941:
+	b	.L1958
+.L1960:
 	mov	r0, r4
 	bl	get_new_active_ppa
 	str	r0, [sp, #8]
 	adds	r0, r0, #1
-	beq	.L1943
+	beq	.L1962
 	ldr	r3, [r10]
 	movs	r1, #1
 	add	r0, sp, #4
@@ -13671,10 +13714,10 @@ FtlSuperblockPowerLostFix:
 	bl	FlashProgPages
 	ldrh	r0, [r4]
 	bl	decrement_vpc_count
-	b	.L1940
-.L1953:
+	b	.L1959
+.L1972:
 	.align	2
-.L1952:
+.L1971:
 	.word	.LANCHOR77
 	.word	.LANCHOR8
 	.word	.LANCHOR188
@@ -13694,36 +13737,36 @@ FtlSuperblockPowerLostFix:
 FtlLoadFactoryBbt:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1964
+	ldr	r3, .L1983
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r6, #0
-	ldr	r5, .L1964+4
+	ldr	r5, .L1983+4
 	ldr	r3, [r3]
-	ldr	r7, .L1964+8
-	ldr	r10, .L1964+20
+	ldr	r7, .L1983+8
+	ldr	r10, .L1983+20
 	str	r3, [r5, #8]
-	ldr	r3, .L1964+12
+	ldr	r3, .L1983+12
 	ldr	r8, [r3]
 	str	r8, [r5, #12]
-.L1955:
-	ldr	r3, .L1964+16
+.L1974:
+	ldr	r3, .L1983+16
 	ldrh	r3, [r3]
 	cmp	r6, r3
-	bcc	.L1960
+	bcc	.L1979
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1960:
+.L1979:
 	ldrh	r4, [r10]
 	movw	r3, #65535
-	ldr	fp, .L1964+4
+	ldr	fp, .L1983+4
 	strh	r3, [r7, #2]!	@ movhi
 	subs	r4, r4, #1
 	uxth	r4, r4
-.L1956:
+.L1975:
 	ldrh	r3, [r10]
 	sub	r2, r3, #15
 	cmp	r2, r4
-	bgt	.L1958
+	bgt	.L1977
 	mla	r3, r6, r3, r4
 	movs	r2, #1
 	mov	r1, r2
@@ -13733,22 +13776,22 @@ FtlLoadFactoryBbt:
 	bl	FlashReadPages
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L1957
+	beq	.L1976
 	ldrh	r2, [r8]
 	movw	r3, #61664
 	cmp	r2, r3
-	bne	.L1957
+	bne	.L1976
 	strh	r4, [r7]	@ movhi
-.L1958:
+.L1977:
 	adds	r6, r6, #1
-	b	.L1955
-.L1957:
+	b	.L1974
+.L1976:
 	subs	r4, r4, #1
 	uxth	r4, r4
-	b	.L1956
-.L1965:
+	b	.L1975
+.L1984:
 	.align	2
-.L1964:
+.L1983:
 	.word	.LANCHOR183
 	.word	.LANCHOR202
 	.word	.LANCHOR75+10
@@ -13770,12 +13813,12 @@ FtlGetLastWrittenPage:
 	cmp	r1, #1
 	push	{r4, r5, r6, r7, r8, lr}
 	it	eq
-	ldreq	r3, .L1978
+	ldreq	r3, .L1997
 	sub	sp, sp, #104
 	lsl	r7, r0, #10
 	mov	r2, r1
 	it	ne
-	ldrne	r3, .L1978+4
+	ldrne	r3, .L1997+4
 	mov	r8, r1
 	movs	r6, #0
 	movs	r1, #1
@@ -13791,16 +13834,16 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	r3, [sp, #40]
 	adds	r3, r3, #1
-	bne	.L1969
-.L1970:
+	bne	.L1988
+.L1989:
 	cmp	r6, r5
-	ble	.L1973
-.L1969:
+	ble	.L1992
+.L1988:
 	mov	r0, r5
 	add	sp, sp, #104
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1973:
+.L1992:
 	adds	r3, r6, r5
 	mov	r2, r8
 	add	r3, r3, r3, lsr #31
@@ -13813,23 +13856,23 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	r3, [sp, #40]
 	adds	r3, r3, #1
-	bne	.L1971
+	bne	.L1990
 	ldr	r3, [sp, #44]
 	adds	r3, r3, #1
-	bne	.L1971
+	bne	.L1990
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
-	beq	.L1971
+	beq	.L1990
 	subs	r4, r4, #1
 	sxth	r5, r4
-	b	.L1970
-.L1971:
+	b	.L1989
+.L1990:
 	adds	r4, r4, #1
 	sxth	r6, r4
-	b	.L1970
-.L1979:
+	b	.L1989
+.L1998:
 	.align	2
-.L1978:
+.L1997:
 	.word	.LANCHOR54
 	.word	.LANCHOR53
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
@@ -13845,24 +13888,24 @@ FtlLoadBbt:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	ldr	r8, .L2009+48
-	ldr	r4, .L2009
+	ldr	r8, .L2028+48
+	ldr	r4, .L2028
 	ldr	r3, [r8]
-	ldr	r7, .L2009+4
+	ldr	r7, .L2028+4
 	mov	r10, r4
 	str	r3, [r4, #8]
-	ldr	r3, .L2009+8
+	ldr	r3, .L2028+8
 	ldr	r6, [r3]
 	str	r6, [r4, #12]
 	bl	FtlBbtMemInit
 	ldrh	r5, [r7]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L1981:
+.L2000:
 	ldrh	r3, [r7]
 	subs	r3, r3, #47
 	cmp	r3, r5
-	bgt	.L1984
+	bgt	.L2003
 	lsls	r3, r5, #10
 	movs	r2, #1
 	mov	r1, r2
@@ -13871,7 +13914,7 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	bne	.L1982
+	bne	.L2001
 	ldr	r3, [r4, #4]
 	movs	r2, #1
 	mov	r1, r2
@@ -13879,104 +13922,104 @@ FtlLoadBbt:
 	adds	r3, r3, #1
 	str	r3, [r4, #4]
 	bl	FlashReadPages
-.L1982:
+.L2001:
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L1983
+	beq	.L2002
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L1983
-	ldr	r3, .L2009+12
+	bne	.L2002
+	ldr	r3, .L2028+12
 	ldr	r2, [r6, #4]
 	strh	r5, [r3]	@ movhi
 	str	r2, [r3, #8]
 	ldrh	r2, [r6, #8]
 	strh	r2, [r3, #4]	@ movhi
-.L1984:
-	ldr	r5, .L2009+12
+.L2003:
+	ldr	r5, .L2028+12
 	movw	r2, #65535
 	ldrh	r3, [r5]
 	cmp	r3, r2
-	beq	.L1998
+	beq	.L2017
 	ldrh	r3, [r5, #4]
 	cmp	r3, r2
-	beq	.L1988
+	beq	.L2007
 	lsls	r3, r3, #10
 	movs	r2, #1
 	mov	r1, r2
-	ldr	r0, .L2009
+	ldr	r0, .L2028
 	str	r3, [r4, #4]
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L1988
+	beq	.L2007
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L1988
+	bne	.L2007
 	ldr	r3, [r6, #4]
 	ldr	r2, [r5, #8]
 	cmp	r3, r2
-	bls	.L1988
+	bls	.L2007
 	ldrh	r2, [r5, #4]
 	str	r3, [r5, #8]
 	ldrh	r3, [r6, #8]
 	strh	r2, [r5]	@ movhi
 	strh	r3, [r5, #4]	@ movhi
-.L1988:
-	ldr	r10, .L2009
+.L2007:
+	ldr	r10, .L2028
 	movs	r1, #1
 	ldrh	r0, [r5]
 	bl	FtlGetLastWrittenPage
 	sxth	r7, r0
 	adds	r0, r0, #1
 	strh	r0, [r5, #2]	@ movhi
-.L1990:
+.L2009:
 	cmp	r7, #0
-	bge	.L1993
-	ldr	r1, .L2009+16
-	mov	r2, #336
-	ldr	r0, .L2009+20
+	bge	.L2012
+	ldr	r1, .L2028+16
+	movw	r2, #335
+	ldr	r0, .L2028+20
 	bl	printf
-	ldr	r1, .L2009+24
-	ldr	r0, .L2009+28
+	ldr	r1, .L2028+24
+	ldr	r0, .L2028+28
 	bl	printf
-.L1992:
+.L2011:
 	ldrh	r3, [r6, #10]
 	ldrh	r0, [r6, #12]
 	strh	r3, [r5, #6]	@ movhi
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1995
-	ldr	r3, .L2009+32
+	beq	.L2014
+	ldr	r3, .L2028+32
 	ldr	r2, [r3]
 	cmp	r0, r2
-	beq	.L1995
-	ldr	r3, .L2009+36
+	beq	.L2014
+	ldr	r3, .L2028+36
 	ldrh	r3, [r3]
 	lsrs	r3, r3, #2
 	cmp	r2, r3
-	bcs	.L1995
+	bcs	.L2014
 	cmp	r0, r3
-	bcs	.L1995
+	bcs	.L2014
 	bl	FtlSysBlkNumInit
-.L1995:
-	ldr	r6, .L2009+40
+.L2014:
+	ldr	r6, .L2028+40
 	movs	r5, #0
-	ldr	r7, .L2009+44
-	ldr	r8, .L2009+52
-.L1996:
+	ldr	r7, .L2028+44
+	ldr	r8, .L2028+52
+.L2015:
 	ldrh	r3, [r7]
 	cmp	r5, r3
-	bcc	.L1997
+	bcc	.L2016
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L1983:
+.L2002:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L1981
-.L1993:
+	b	.L2000
+.L2012:
 	ldrh	r3, [r5]
 	movs	r2, #1
 	mov	r1, r2
@@ -13988,16 +14031,16 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L1991
+	beq	.L2010
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	beq	.L1992
-.L1991:
+	beq	.L2011
+.L2010:
 	subs	r7, r7, #1
 	sxth	r7, r7
-	b	.L1990
-.L1997:
+	b	.L2009
+.L2016:
 	ldrh	r2, [r8]
 	ldr	r1, [r4, #8]
 	ldr	r0, [r6, #4]!
@@ -14005,13 +14048,13 @@ FtlLoadBbt:
 	mla	r1, r5, r2, r1
 	adds	r5, r5, #1
 	bl	ftl_memcpy
-	b	.L1996
-.L1998:
+	b	.L2015
+.L2017:
 	mov	r0, #-1
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L2010:
+.L2029:
 	.align	2
-.L2009:
+.L2028:
 	.word	.LANCHOR202
 	.word	.LANCHOR51
 	.word	.LANCHOR188
@@ -14036,178 +14079,136 @@ FtlLoadBbt:
 	.fpu softvfp
 	.type	ftl_map_blk_gc, %function
 ftl_map_blk_gc:
-	@ args = 0, pretend = 0, frame = 16
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r4, r0
 	ldr	r3, [r0, #24]
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r0
 	ldr	r5, [r0, #12]
-	str	r3, [sp, #8]
+	str	r3, [sp]
 	bl	ftl_free_no_use_map_blk
-	ldrh	ip, [r4, #10]
+	ldrh	r3, [r4, #10]
 	ldrh	r2, [r4, #8]
-	ldrh	r1, [r4, #40]
-	sub	r3, ip, #4
-	ldr	r6, .L2032
-	cmp	r2, r3
-	bge	.L2012
-	movw	r3, #65535
-	cmp	r1, r3
-	beq	.L2014
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r6]
+	subs	r3, r3, #4
 	cmp	r2, r3
-	bcc	.L2015
-.L2012:
-	movw	r3, #65535
+	blt	.L2031
 	uxth	r0, r0
-	cmp	r1, r3
-	beq	.L2016
-	ldrh	r3, [r4, #2]
-	ldrh	r2, [r6]
-	cmp	r2, r3
-	bls	.L2017
-.L2016:
-	ldrh	r3, [r5, r0, lsl #1]
-	lsls	r2, r0, #1
-	str	r3, [sp, #4]
-	cbz	r3, .L2014
+	ldrh	r8, [r5, r0, lsl #1]
+	cmp	r8, #0
+	beq	.L2031
 	ldr	r3, [r4, #32]
-	cbnz	r3, .L2014
-	movs	r1, #1
-	str	r1, [r4, #32]
-	strh	r3, [r5, r2]	@ movhi
+	cbnz	r3, .L2031
+	movs	r2, #1
+	str	r2, [r4, #32]
+	strh	r3, [r5, r0, lsl #1]	@ movhi
 	ldrh	r3, [r4, #8]
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	ldrh	r3, [r6]
+	ldr	r3, .L2043
+	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L2022
+	bcc	.L2032
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L2022:
-	ldr	r5, .L2032+4
-	movs	r7, #0
-.L2023:
+.L2032:
+	ldr	r5, .L2043+4
+	movs	r6, #0
+.L2033:
 	ldrh	r3, [r4, #6]
-	uxth	fp, r7
-	cmp	r3, fp
-	bhi	.L2028
+	uxth	r10, r6
+	cmp	r3, r10
+	bhi	.L2039
 	movs	r1, #1
-	ldr	r0, [sp, #4]
+	mov	r0, r8
 	bl	FtlFreeSysBlkQueueIn
 	movs	r3, #0
 	str	r3, [r4, #32]
-.L2014:
+.L2031:
+	ldr	r3, .L2043
 	ldrh	r2, [r4, #2]
-	ldrh	r3, [r6]
+	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L2015
+	bcc	.L2037
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-	b	.L2015
-.L2020:
-	ldrh	r8, [r5, r2, lsl #1]
-	add	lr, r2, #1
-	cmp	r8, r1
-	beq	.L2018
-	mov	r2, lr
-.L2019:
-	uxth	r7, r2
-	cmp	r7, ip
-	bcc	.L2020
-	mov	r7, r0
-.L2018:
-	uxth	r2, r2
-	ldr	r0, .L2032+8
-	ldrh	r2, [r5, r2, lsl #1]
-	bl	printf
-	movw	r3, #65535
-	mov	r0, r7
-	strh	r3, [r4, #40]	@ movhi
-	b	.L2016
-.L2017:
-	movs	r2, #0
-	b	.L2019
-.L2028:
-	ldr	r3, [sp, #8]
-	uxth	r10, r7
-	add	r3, r3, r10, lsl #2
-	str	r3, [sp, #12]
-	ldr	r3, [sp, #8]
-	ldr	r2, [r3, r10, lsl #2]
-	ldr	r3, [sp, #4]
-	cmp	r3, r2, lsr #10
-	bne	.L2024
-	ldr	r3, .L2032+12
+	b	.L2037
+.L2039:
+	ldr	r3, [sp]
+	uxth	fp, r6
+	add	r3, r3, fp, lsl #2
+	str	r3, [sp, #4]
+	ldr	r3, [sp]
+	ldr	r2, [r3, fp, lsl #2]
+	cmp	r8, r2, lsr #10
+	bne	.L2034
+	ldr	r3, .L2043+8
 	str	r2, [r5, #4]
 	movs	r2, #1
-	ldr	r0, .L2032+4
+	ldr	r0, .L2043+4
 	ldr	r1, [r3]
 	str	r1, [r5, #8]
-	ldr	r1, .L2032+16
-	ldr	r8, [r1]
+	ldr	r1, .L2043+12
+	ldr	r7, [r1]
 	mov	r1, r2
-	str	r8, [r5, #12]
+	str	r7, [r5, #12]
 	bl	FlashReadPages
-	ldrh	r2, [r8, #8]
-	cmp	r2, fp
-	beq	.L2025
-	ldr	r1, .L2032+20
-	mov	r2, #672
-	ldr	r0, .L2032+24
+	ldrh	r2, [r7, #8]
+	cmp	r2, r10
+	beq	.L2035
+	ldr	r1, .L2043+16
+	movw	r2, #661
+	ldr	r0, .L2043+20
 	bl	printf
-	ldr	r1, .L2032+28
-	ldr	r0, .L2032+32
+	ldr	r1, .L2043+24
+	ldr	r0, .L2043+28
 	bl	printf
-.L2025:
+.L2035:
 	ldr	r2, [r5]
 	adds	r2, r2, #1
-	ldrh	r2, [r8, #8]
-	bne	.L2026
-.L2027:
-	ldr	r1, [sp, #12]
+	ldrh	r2, [r7, #8]
+	bne	.L2036
+.L2038:
+	ldr	r1, [sp, #4]
 	movs	r3, #0
-	ldr	r0, .L2032+36
+	ldr	r0, .L2043+32
 	str	r3, [r1]
 	ldr	r1, [r5, #4]
 	bl	printf
-	ldr	r3, .L2032+40
+	ldr	r3, .L2043+36
 	movs	r2, #1
 	str	r2, [r3]
-.L2015:
+.L2037:
 	movs	r0, #0
-	add	sp, sp, #16
+	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2026:
-	cmp	r2, fp
-	bne	.L2027
-	ldrh	r0, [r8]
+.L2036:
+	cmp	r2, r10
+	bne	.L2038
+	ldrh	r0, [r7]
 	ldrh	r1, [r4, #4]
 	cmp	r0, r1
-	bne	.L2027
+	bne	.L2038
 	ldr	r2, [r5, #8]
-	mov	r1, r10
+	mov	r1, fp
 	mov	r0, r4
 	bl	FtlMapWritePage
-.L2024:
-	adds	r7, r7, #1
-	b	.L2023
-.L2033:
+.L2034:
+	adds	r6, r6, #1
+	b	.L2033
+.L2044:
 	.align	2
-.L2032:
+.L2043:
 	.word	.LANCHOR54
 	.word	.LANCHOR202
-	.word	.LC39
 	.word	.LANCHOR184
 	.word	.LANCHOR188
 	.word	.LANCHOR212
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC40
+	.word	.LC39
 	.word	.LANCHOR77
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
 	.section	.text.Ftl_write_map_blk_to_last_page,"ax",%progbits
@@ -14221,26 +14222,26 @@ ftl_map_blk_gc:
 Ftl_write_map_blk_to_last_page:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2044
+	ldr	r3, .L2055
 	push	{r4, r5, r6, r7, r8, lr}
 	mov	r4, r0
 	ldr	r5, [r3]
-	cbnz	r5, .L2035
+	cbnz	r5, .L2046
 	ldrh	r3, [r0]
 	movw	r2, #65535
 	ldr	r6, [r0, #12]
 	cmp	r3, r2
-	bne	.L2036
+	bne	.L2047
 	ldrh	r3, [r0, #8]
-	cbz	r3, .L2037
-	ldr	r1, .L2044+4
-	mov	r2, #708
-	ldr	r0, .L2044+8
+	cbz	r3, .L2048
+	ldr	r1, .L2055+4
+	movw	r2, #697
+	ldr	r0, .L2055+8
 	bl	printf
-	ldr	r1, .L2044+12
-	ldr	r0, .L2044+16
+	ldr	r1, .L2055+12
+	ldr	r0, .L2055+16
 	bl	printf
-.L2037:
+.L2048:
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
@@ -14252,20 +14253,20 @@ Ftl_write_map_blk_to_last_page:
 	ldr	r3, [r4, #28]
 	adds	r3, r3, #1
 	str	r3, [r4, #28]
-.L2035:
+.L2046:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, pc}
-.L2036:
+.L2047:
 	ldrh	r6, [r6, r3, lsl #1]
 	movs	r1, #255
 	ldrh	r3, [r0, #2]
-	ldr	r2, .L2044+20
-	ldr	r8, .L2044+32
+	ldr	r2, .L2055+20
+	ldr	r8, .L2055+32
 	ldr	r7, [r0, #24]
 	orr	r3, r3, r6, lsl #10
 	ldr	r0, [r8]
 	str	r3, [r2, #4]
-	ldr	r3, .L2044+24
+	ldr	r3, .L2055+24
 	str	r0, [r2, #8]
 	ldr	r3, [r3]
 	str	r3, [r2, #12]
@@ -14276,7 +14277,7 @@ Ftl_write_map_blk_to_last_page:
 	ldrh	r2, [r4, #4]
 	strh	r6, [r3, #2]	@ movhi
 	strh	r2, [r3]	@ movhi
-	ldr	r3, .L2044+28
+	ldr	r3, .L2055+28
 	ldrh	r2, [r3]
 	lsls	r2, r2, #3
 	bl	ftl_memset
@@ -14284,37 +14285,37 @@ Ftl_write_map_blk_to_last_page:
 	mov	r3, r5
 	ldr	r1, [r8]
 	mov	r2, r5
-.L2038:
+.L2049:
 	uxth	r0, r3
 	cmp	ip, r0
-	bhi	.L2040
+	bhi	.L2051
 	movs	r2, #1
 	movs	r3, #0
 	mov	r1, r2
-	ldr	r0, .L2044+20
+	ldr	r0, .L2055+20
 	bl	FlashProgPages
 	ldrh	r3, [r4, #2]
 	mov	r0, r4
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	bl	ftl_map_blk_gc
-	b	.L2035
-.L2040:
+	b	.L2046
+.L2051:
 	ldr	r0, [r7, r3, lsl #2]
 	cmp	r6, r0, lsr #10
-	bne	.L2039
+	bne	.L2050
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r3, [r1, r2, lsl #3]
 	add	r5, r1, r2, lsl #3
 	ldr	r0, [r7, r3, lsl #2]
 	str	r0, [r5, #4]
-.L2039:
+.L2050:
 	adds	r3, r3, #1
-	b	.L2038
-.L2045:
+	b	.L2049
+.L2056:
 	.align	2
-.L2044:
+.L2055:
 	.word	.LANCHOR77
 	.word	.LANCHOR213
 	.word	.LC5
@@ -14334,16 +14335,17 @@ Ftl_write_map_blk_to_last_page:
 	.fpu softvfp
 	.type	FtlMapWritePage, %function
 FtlMapWritePage:
-	@ args = 0, pretend = 0, frame = 8
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-	ldr	r10, .L2069+36
+	ldr	r10, .L2079+40
 	mov	r8, r1
 	movs	r6, #0
-	str	r2, [sp]
-.L2047:
-	ldr	r2, .L2069
+	str	r2, [sp, #4]
+	mov	fp, r10
+.L2058:
+	ldr	r2, .L2079
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
@@ -14351,57 +14353,56 @@ FtlMapWritePage:
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	bge	.L2048
+	bge	.L2059
 	ldrh	r2, [r4]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L2049
-.L2048:
+	bne	.L2060
+.L2059:
 	mov	r0, r4
 	bl	Ftl_write_map_blk_to_last_page
-.L2049:
-	ldr	r3, .L2069+4
+.L2060:
+	ldr	r3, .L2079+4
 	ldr	r2, [r3]
-	str	r3, [sp, #4]
+	str	r3, [sp, #8]
 	cmp	r2, #0
-	bne	.L2064
+	bne	.L2075
 	ldrh	r2, [r4]
 	ldr	r3, [r4, #12]
 	ldrh	r3, [r3, r2, lsl #1]
-	cbnz	r3, .L2051
-	ldr	r1, .L2069+8
-	mov	r2, #768
-	ldr	r0, .L2069+12
+	cbnz	r3, .L2062
+	ldr	r1, .L2079+8
+	movw	r2, #757
+	ldr	r0, .L2079+12
 	bl	printf
-	ldr	r1, .L2069+16
-	ldr	r0, .L2069+20
+	ldr	r1, .L2079+16
+	ldr	r0, .L2079+20
 	bl	printf
-.L2051:
+.L2062:
 	ldrh	r2, [r4]
 	ldrh	r3, [r4, #10]
 	cmp	r2, r3
-	bcc	.L2052
-	ldr	r1, .L2069+8
-	movw	r2, #769
-	ldr	r0, .L2069+12
+	bcc	.L2063
+	ldr	r1, .L2079+8
+	movw	r2, #758
+	ldr	r0, .L2079+12
 	bl	printf
-	ldr	r1, .L2069+16
-	ldr	r0, .L2069+20
+	ldr	r1, .L2079+16
+	ldr	r0, .L2079+20
 	bl	printf
-.L2052:
+.L2063:
 	ldrh	r2, [r4]
 	movs	r1, #0
 	ldr	r3, [r4, #12]
-	ldr	r5, .L2069+24
+	ldr	r5, .L2079+24
 	ldrh	r7, [r3, r2, lsl #1]
 	movs	r2, #16
 	ldrh	r3, [r4, #2]
-	mov	fp, r5
 	orr	r3, r3, r7, lsl #10
 	str	r3, [r5, #4]
-	ldr	r3, [sp]
+	ldr	r3, [sp, #4]
 	str	r3, [r5, #8]
-	ldr	r3, .L2069+28
+	ldr	r3, .L2079+28
 	ldr	r0, [r3]
 	str	r0, [r5, #12]
 	bl	ftl_memset
@@ -14422,52 +14423,62 @@ FtlMapWritePage:
 	adds	r2, r2, #1
 	uxth	r2, r2
 	adds	r3, r1, #1
+	mov	r3, r5
 	strh	r2, [r4, #2]	@ movhi
-	bne	.L2053
+	bne	.L2064
 	ldr	r1, [r5, #4]
 	adds	r6, r6, #1
-	ldr	r0, .L2069+32
+	ldr	r0, .L2079+32
 	uxth	r6, r6
+	str	r5, [sp, #12]
 	bl	printf
 	ldrh	r2, [r4, #2]
+	ldr	r3, [sp, #12]
 	cmp	r2, #2
-	itttt	ls
-	ldrls	r3, .L2069+36
-	ldrhls	r2, [r3]
+	ittt	ls
+	ldrhls	r2, [fp]
 	addls	r2, r2, #-1
 	strhls	r2, [r4, #2]	@ movhi
 	cmp	r6, #3
-	bls	.L2047
+	bls	.L2058
 	mov	r2, r6
-	ldr	r1, [r5, #4]
-	ldr	r0, .L2069+40
+	ldr	r1, [r3, #4]
+	ldr	r0, .L2079+36
 	bl	printf
-	ldr	r2, [sp, #4]
+	ldr	r2, [sp, #8]
 	movs	r3, #1
 	str	r3, [r2]
-.L2064:
+.L2075:
 	movs	r0, #0
-	add	sp, sp, #8
+	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2053:
-	cbz	r1, .L2056
+.L2064:
+	cbz	r1, .L2067
 	cmp	r2, #1
 	strh	r7, [r4, #40]	@ movhi
-	beq	.L2047
-	cmp	r1, #256
+	bne	.L2068
+.L2069:
+	movs	r3, #0
+	str	r3, [r4, #36]
+	b	.L2058
 .L2068:
-	beq	.L2047
-	ldr	r2, [fp, #4]
+	cmp	r1, #256
+.L2078:
+	beq	.L2069
+	ldr	r2, [r4, #36]
+	cmp	r2, #0
+	bne	.L2069
+	ldr	r2, [r3, #4]
 	ldr	r3, [r4, #24]
 	str	r2, [r3, r8, lsl #2]
-	b	.L2064
-.L2056:
+	b	.L2075
+.L2067:
 	cmp	r2, #1
-	b	.L2068
-.L2070:
+	b	.L2078
+.L2080:
 	.align	2
-.L2069:
+.L2079:
 	.word	.LANCHOR165
 	.word	.LANCHOR77
 	.word	.LANCHOR214
@@ -14476,9 +14487,9 @@ FtlMapWritePage:
 	.word	.LC7
 	.word	.LANCHOR202
 	.word	.LANCHOR188
+	.word	.LC40
 	.word	.LC41
 	.word	.LANCHOR54
-	.word	.LC42
 	.size	FtlMapWritePage, .-FtlMapWritePage
 	.section	.text.flush_l2p_region,"ax",%progbits
 	.align	1
@@ -14493,9 +14504,9 @@ flush_l2p_region:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #12
-	ldr	r5, .L2072
+	ldr	r5, .L2082
 	muls	r4, r0, r4
-	ldr	r0, .L2072+4
+	ldr	r0, .L2082+4
 	ldr	r3, [r5]
 	adds	r2, r3, r4
 	ldrh	r1, [r3, r4]
@@ -14508,9 +14519,9 @@ flush_l2p_region:
 	bic	r3, r3, #-2147483648
 	str	r3, [r4, #4]
 	pop	{r3, r4, r5, pc}
-.L2073:
+.L2083:
 	.align	2
-.L2072:
+.L2082:
 	.word	.LANCHOR97
 	.word	.LANCHOR127
 	.size	flush_l2p_region, .-flush_l2p_region
@@ -14527,30 +14538,30 @@ l2p_flush:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
 	movs	r4, #0
-	ldr	r5, .L2078
-	ldr	r6, .L2078+4
-.L2075:
+	ldr	r5, .L2088
+	ldr	r6, .L2088+4
+.L2085:
 	ldrh	r3, [r5]
 	uxth	r0, r4
 	cmp	r3, r0
-	bhi	.L2077
+	bhi	.L2087
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L2077:
+.L2087:
 	ldr	r2, [r6]
 	uxth	r3, r4
 	movs	r1, #12
 	mla	r3, r1, r3, r2
 	ldr	r3, [r3, #4]
 	cmp	r3, #0
-	bge	.L2076
+	bge	.L2086
 	bl	flush_l2p_region
-.L2076:
+.L2086:
 	adds	r4, r4, #1
-	b	.L2075
-.L2079:
+	b	.L2085
+.L2089:
 	.align	2
-.L2078:
+.L2088:
 	.word	.LANCHOR68
 	.word	.LANCHOR97
 	.size	l2p_flush, .-l2p_flush
@@ -14565,7 +14576,7 @@ l2p_flush:
 FtlVendorPartWrite:
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2092
+	ldr	r3, .L2102
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #56
 	str	r2, [sp]
@@ -14574,26 +14585,26 @@ FtlVendorPartWrite:
 	mov	r5, r1
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L2088
-	ldr	r3, .L2092+4
+	bhi	.L2098
+	ldr	r3, .L2102+4
 	mov	r8, #0
 	ldrh	r6, [r3]
 	lsr	r6, r0, r6
 	lsl	fp, r6, #2
-.L2082:
-	cbnz	r5, .L2087
-.L2080:
+.L2092:
+	cbnz	r5, .L2097
+.L2090:
 	mov	r0, r8
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2087:
-	ldr	r3, .L2092+8
+.L2097:
+	ldr	r3, .L2102+8
 	mov	r0, r7
-	ldr	r10, .L2092+24
+	ldr	r10, .L2102+24
 	ldr	r3, [r3]
 	ldr	r2, [r3, fp]
-	ldr	r3, .L2092+12
+	ldr	r3, .L2102+12
 	str	r2, [sp, #12]
 	ldrh	r3, [r3]
 	mov	r1, r3
@@ -14607,9 +14618,9 @@ FtlVendorPartWrite:
 	cmp	r5, r4
 	it	cc
 	uxthcc	r4, r5
-	cbz	r2, .L2084
+	cbz	r2, .L2094
 	cmp	r4, r3
-	beq	.L2084
+	beq	.L2094
 	ldr	r3, [r10]
 	add	r0, sp, #20
 	str	r2, [sp, #24]
@@ -14619,7 +14630,7 @@ FtlVendorPartWrite:
 	movs	r3, #0
 	str	r3, [sp, #32]
 	bl	FlashReadPages
-.L2085:
+.L2095:
 	lsls	r3, r4, #9
 	ldr	r0, [r10]
 	subs	r5, r5, r4
@@ -14632,7 +14643,7 @@ FtlVendorPartWrite:
 	bl	ftl_memcpy
 	ldr	r2, [r10]
 	mov	r1, r6
-	ldr	r0, .L2092+16
+	ldr	r0, .L2102+16
 	adds	r6, r6, #1
 	bl	FtlMapWritePage
 	ldr	r3, [sp]
@@ -14643,20 +14654,20 @@ FtlVendorPartWrite:
 	ldr	r3, [sp, #8]
 	add	r2, r2, r3
 	str	r2, [sp]
-	b	.L2082
-.L2084:
-	ldr	r3, .L2092+20
+	b	.L2092
+.L2094:
+	ldr	r3, .L2102+20
 	movs	r1, #0
 	ldr	r0, [r10]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-	b	.L2085
-.L2088:
+	b	.L2095
+.L2098:
 	mov	r8, #-1
-	b	.L2080
-.L2093:
+	b	.L2090
+.L2103:
 	.align	2
-.L2092:
+.L2102:
 	.word	.LANCHOR50
 	.word	.LANCHOR57
 	.word	.LANCHOR194
@@ -14677,66 +14688,66 @@ Ftl_save_ext_data:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L2096
-	ldr	r3, .L2096+4
+	ldr	r2, .L2106
+	ldr	r3, .L2106+4
 	ldr	r1, [r2]
 	cmp	r1, r3
-	bne	.L2094
-	ldr	r3, .L2096+8
+	bne	.L2104
+	ldr	r3, .L2106+8
 	movs	r1, #1
 	movs	r0, #0
 	str	r3, [r2, #4]
-	ldr	r3, .L2096+12
+	ldr	r3, .L2106+12
 	ldr	r3, [r3]
 	str	r3, [r2, #88]
-	ldr	r3, .L2096+16
+	ldr	r3, .L2106+16
 	ldr	r3, [r3]
 	str	r3, [r2, #92]
-	ldr	r3, .L2096+20
+	ldr	r3, .L2106+20
 	ldr	r3, [r3]
 	str	r3, [r2, #8]
-	ldr	r3, .L2096+24
+	ldr	r3, .L2106+24
 	ldr	r3, [r3]
 	str	r3, [r2, #12]
-	ldr	r3, .L2096+28
+	ldr	r3, .L2106+28
 	ldr	r3, [r3]
 	str	r3, [r2, #16]
-	ldr	r3, .L2096+32
+	ldr	r3, .L2106+32
 	ldr	r3, [r3]
 	str	r3, [r2, #20]
-	ldr	r3, .L2096+36
+	ldr	r3, .L2106+36
 	ldr	r3, [r3]
 	str	r3, [r2, #28]
-	ldr	r3, .L2096+40
+	ldr	r3, .L2106+40
 	ldr	r3, [r3]
 	str	r3, [r2, #32]
-	ldr	r3, .L2096+44
+	ldr	r3, .L2106+44
 	ldr	r3, [r3]
 	str	r3, [r2, #36]
-	ldr	r3, .L2096+48
+	ldr	r3, .L2106+48
 	ldr	r3, [r3]
 	str	r3, [r2, #40]
-	ldr	r3, .L2096+52
+	ldr	r3, .L2106+52
 	ldr	r3, [r3]
 	str	r3, [r2, #44]
-	ldr	r3, .L2096+56
+	ldr	r3, .L2106+56
 	ldr	r3, [r3]
 	str	r3, [r2, #48]
-	ldr	r3, .L2096+60
+	ldr	r3, .L2106+60
 	ldr	r3, [r3]
 	str	r3, [r2, #60]
-	ldr	r3, .L2096+64
+	ldr	r3, .L2106+64
 	ldr	r3, [r3]
 	str	r3, [r2, #64]
 	b	FtlVendorPartWrite
-.L2094:
+.L2104:
 	bx	lr
-.L2097:
+.L2107:
 	.align	2
-.L2096:
+.L2106:
 	.word	.LANCHOR138
 	.word	1179929683
-	.word	1342177353
+	.word	1342177360
 	.word	.LANCHOR216
 	.word	.LANCHOR217
 	.word	.LANCHOR161
@@ -14764,40 +14775,40 @@ FtlEctTblFlush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L2105
+	ldr	r3, .L2115
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L2103
-	ldr	r3, .L2105+4
+	beq	.L2113
+	ldr	r3, .L2115+4
 	ldr	r3, [r3]
 	cmp	r3, #39
 	ite	hi
 	movhi	r3, #32
 	movls	r3, #4
-.L2099:
-	ldr	r1, .L2105+8
+.L2109:
+	ldr	r1, .L2115+8
 	ldrh	r2, [r1]
 	cmp	r2, #31
 	ittt	ls
 	addls	r2, r2, #1
 	movls	r3, #1
 	strhls	r2, [r1]	@ movhi
-	ldr	r2, .L2105+12
-	cbnz	r0, .L2101
+	ldr	r2, .L2115+12
+	cbnz	r0, .L2111
 	ldr	r1, [r2]
 	ldr	r0, [r1, #20]
 	ldr	r1, [r1, #16]
 	add	r3, r3, r0
 	cmp	r1, r3
-	bcc	.L2102
-.L2101:
+	bcc	.L2112
+.L2111:
 	ldr	r2, [r2]
 	movs	r0, #64
 	ldr	r3, [r2, #16]
 	str	r3, [r2, #20]
-	ldr	r3, .L2105+16
+	ldr	r3, .L2115+16
 	str	r3, [r2]
-	ldr	r3, .L2105+20
+	ldr	r3, .L2115+20
 	ldrh	r1, [r3]
 	lsls	r3, r1, #9
 	str	r3, [r2, #12]
@@ -14808,15 +14819,15 @@ FtlEctTblFlush:
 	str	r3, [r2, #4]
 	bl	FtlVendorPartWrite
 	bl	Ftl_save_ext_data
-.L2102:
+.L2112:
 	movs	r0, #0
 	pop	{r3, pc}
-.L2103:
+.L2113:
 	movs	r3, #32
-	b	.L2099
-.L2106:
+	b	.L2109
+.L2116:
 	.align	2
-.L2105:
+.L2115:
 	.word	.LANCHOR28
 	.word	.LANCHOR170
 	.word	.LANCHOR218
@@ -14835,108 +14846,108 @@ FtlEctTblFlush:
 allocate_new_data_superblock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2134
+	ldr	r3, .L2144
 	push	{r4, r5, r6, lr}
 	mov	r4, r0
 	ldrh	r5, [r0]
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	bcs	.L2108
-	ldr	r1, .L2134+4
-	movw	r2, #3289
-	ldr	r0, .L2134+8
+	bcs	.L2118
+	ldr	r1, .L2144+4
+	movw	r2, #3233
+	ldr	r0, .L2144+8
 	bl	printf
-	ldr	r1, .L2134+12
-	ldr	r0, .L2134+16
+	ldr	r1, .L2144+12
+	ldr	r0, .L2144+16
 	bl	printf
-.L2108:
-	ldr	r3, .L2134+20
+.L2118:
+	ldr	r3, .L2144+20
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L2109
+	bne	.L2119
 	movw	r3, #65535
 	cmp	r5, r3
-	beq	.L2110
-	ldr	r3, .L2134+24
+	beq	.L2120
+	ldr	r3, .L2144+24
 	mov	r0, r5
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r5, lsl #1]
-	cbz	r3, .L2111
+	cbz	r3, .L2121
 	bl	INSERT_DATA_LIST
-.L2110:
+.L2120:
 	movs	r3, #0
 	strb	r3, [r4, #8]
-	ldr	r3, .L2134+28
+	ldr	r3, .L2144+28
 	cmp	r4, r3
-	beq	.L2112
-	ldr	r3, .L2134+32
+	beq	.L2122
+	ldr	r3, .L2144+32
 	ldrh	r2, [r3]
 	cmp	r2, #1
-	beq	.L2112
-	ldr	r3, .L2134+36
+	beq	.L2122
+	ldr	r3, .L2144+36
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2113
-.L2112:
+	cbz	r3, .L2123
+.L2122:
 	movs	r3, #1
 	strb	r3, [r4, #8]
-.L2114:
-	ldr	r6, .L2134+40
+.L2124:
+	ldr	r6, .L2144+40
 	movw	r2, #65535
 	ldrh	r0, [r6]
 	cmp	r0, r2
-	beq	.L2119
+	beq	.L2129
 	cmp	r5, r0
-	bne	.L2120
-	ldr	r3, .L2134+24
+	bne	.L2130
+	ldr	r3, .L2144+24
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L2121
-.L2120:
+	cbz	r3, .L2131
+.L2130:
 	bl	update_vpc_list
-.L2121:
+.L2131:
 	movw	r3, #65535
 	strh	r3, [r6]	@ movhi
-.L2119:
+.L2129:
 	mov	r0, r4
 	bl	allocate_data_superblock
 	bl	l2p_flush
 	movs	r0, #0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L2109:
+.L2119:
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L2111:
+.L2121:
 	bl	INSERT_FREE_LIST
-	b	.L2110
-.L2113:
-	ldr	r3, .L2134+44
+	b	.L2120
+.L2123:
+	ldr	r3, .L2144+44
 	cmp	r4, r3
-	bne	.L2114
+	bne	.L2124
 	cmp	r2, #3
-	beq	.L2116
-	ldr	r2, .L2134+48
+	beq	.L2126
+	ldr	r2, .L2144+48
 	ldr	r2, [r2]
 	cmp	r2, #1
-	bne	.L2117
-.L2116:
+	bne	.L2127
+.L2126:
 	movs	r2, #1
 	strb	r2, [r3, #8]
-.L2117:
-	ldr	r2, .L2134+52
+.L2127:
+	ldr	r2, .L2144+52
 	ldr	r2, [r2]
 	cmp	r2, #0
-	beq	.L2114
-	ldr	r2, .L2134+56
+	beq	.L2124
+	ldr	r2, .L2144+56
 	ldr	r2, [r2]
 	cmp	r2, #39
 	itt	ls
 	movls	r2, #1
 	strbls	r2, [r3, #8]
-	b	.L2114
-.L2135:
+	b	.L2124
+.L2145:
 	.align	2
-.L2134:
+.L2144:
 	.word	.LANCHOR40
 	.word	.LANCHOR219
 	.word	.LC5
@@ -14964,7 +14975,7 @@ allocate_new_data_superblock:
 FtlVendorPartRead:
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2146
+	ldr	r3, .L2156
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, r2
 	adds	r2, r0, r1
@@ -14973,28 +14984,28 @@ FtlVendorPartRead:
 	mov	r6, r1
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L2145
-	ldr	r3, .L2146+4
+	bhi	.L2155
+	ldr	r3, .L2156+4
 	mov	r8, #0
-	ldr	fp, .L2146+28
+	ldr	fp, .L2156+28
 	ldrh	r5, [r3]
 	lsr	r5, r0, r5
 	lsls	r3, r5, #2
 	str	r3, [sp]
-.L2138:
-	cbnz	r6, .L2144
-.L2136:
+.L2148:
+	cbnz	r6, .L2154
+.L2146:
 	mov	r0, r8
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2144:
-	ldr	r3, .L2146+8
+.L2154:
+	ldr	r3, .L2156+8
 	mov	r0, r7
 	ldr	r2, [sp]
 	ldr	r3, [r3]
 	ldr	r3, [r3, r2]
-	ldr	r2, .L2146+12
+	ldr	r2, .L2156+12
 	str	r3, [sp, #8]
 	ldrh	r4, [r2]
 	mov	r1, r4
@@ -15009,7 +15020,7 @@ FtlVendorPartRead:
 	lsls	r2, r4, #9
 	str	r2, [sp, #8]
 	cmp	r3, #0
-	beq	.L2140
+	beq	.L2150
 	ldr	r2, [fp]
 	add	r0, sp, #20
 	str	r3, [sp, #24]
@@ -15023,28 +15034,28 @@ FtlVendorPartRead:
 	ldr	r2, [sp, #20]
 	ldr	r3, [sp, #12]
 	adds	r2, r2, #1
-	ldr	r2, .L2146+16
+	ldr	r2, .L2156+16
 	it	eq
 	moveq	r8, #-1
 	ldr	r2, [r2]
 	cmp	r2, #256
-	bne	.L2142
+	bne	.L2152
 	mov	r2, r3
 	mov	r1, r5
-	ldr	r0, .L2146+20
+	ldr	r0, .L2156+20
 	bl	printf
 	ldr	r2, [fp]
 	mov	r1, r5
-	ldr	r0, .L2146+24
+	ldr	r0, .L2156+24
 	bl	FtlMapWritePage
-.L2142:
+.L2152:
 	ldr	r1, [fp]
 	lsls	r2, r4, #9
 	ldr	r3, [sp, #4]
 	mov	r0, r10
 	add	r1, r1, r3, lsl #9
 	bl	ftl_memcpy
-.L2143:
+.L2153:
 	ldr	r3, [sp, #8]
 	adds	r5, r5, #1
 	subs	r6, r6, r4
@@ -15053,25 +15064,25 @@ FtlVendorPartRead:
 	ldr	r3, [sp]
 	adds	r3, r3, #4
 	str	r3, [sp]
-	b	.L2138
-.L2140:
+	b	.L2148
+.L2150:
 	lsls	r2, r4, #9
 	mov	r1, r3
 	mov	r0, r10
 	bl	ftl_memset
-	b	.L2143
-.L2145:
+	b	.L2153
+.L2155:
 	mov	r8, #-1
-	b	.L2136
-.L2147:
+	b	.L2146
+.L2157:
 	.align	2
-.L2146:
+.L2156:
 	.word	.LANCHOR50
 	.word	.LANCHOR57
 	.word	.LANCHOR194
 	.word	.LANCHOR56
 	.word	.LANCHOR202
-	.word	.LC43
+	.word	.LC42
 	.word	.LANCHOR215
 	.word	.LANCHOR185
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
@@ -15088,34 +15099,34 @@ FtlLoadEctTbl:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r0, #64
-	ldr	r4, .L2150
-	ldr	r5, .L2150+4
+	ldr	r4, .L2160
+	ldr	r5, .L2160+4
 	ldr	r2, [r4]
 	ldrh	r1, [r5]
 	bl	FtlVendorPartRead
 	ldr	r3, [r4]
 	ldr	r2, [r3]
-	ldr	r3, .L2150+8
+	ldr	r3, .L2160+8
 	cmp	r2, r3
-	beq	.L2149
-	ldr	r1, .L2150+12
-	ldr	r0, .L2150+16
+	beq	.L2159
+	ldr	r1, .L2160+12
+	ldr	r0, .L2160+16
 	bl	printf
 	ldrh	r2, [r5]
 	movs	r1, #0
 	ldr	r0, [r4]
 	lsls	r2, r2, #9
 	bl	ftl_memset
-.L2149:
+.L2159:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L2151:
+.L2161:
 	.align	2
-.L2150:
+.L2160:
 	.word	.LANCHOR191
 	.word	.LANCHOR190
 	.word	1112818501
-	.word	.LC44
+	.word	.LC43
 	.word	.LC7
 	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
 	.section	.text.Ftl_load_ext_data,"ax",%progbits
@@ -15131,92 +15142,92 @@ Ftl_load_ext_data:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r1, #1
-	ldr	r4, .L2156
+	ldr	r4, .L2166
 	movs	r0, #0
-	ldr	r5, .L2156+4
+	ldr	r5, .L2166+4
 	mov	r2, r4
 	bl	FtlVendorPartRead
 	ldr	r3, [r4]
 	cmp	r3, r5
-	beq	.L2153
+	beq	.L2163
 	mov	r2, #512
 	movs	r1, #0
 	mov	r0, r4
 	bl	ftl_memset
 	str	r5, [r4]
-.L2153:
+.L2163:
 	ldr	r3, [r4]
 	cmp	r3, r5
-	ldr	r5, .L2156+8
-	bne	.L2154
+	ldr	r5, .L2166+8
+	bne	.L2164
 	ldr	r2, [r4, #88]
-	ldr	r3, .L2156+12
+	ldr	r3, .L2166+12
 	str	r2, [r3]
 	ldr	r2, [r4, #92]
-	ldr	r3, .L2156+16
+	ldr	r3, .L2166+16
 	str	r2, [r3]
 	ldr	r2, [r4, #8]
-	ldr	r3, .L2156+20
+	ldr	r3, .L2166+20
 	str	r2, [r3]
 	ldr	r2, [r4, #12]
-	ldr	r3, .L2156+24
+	ldr	r3, .L2166+24
 	str	r2, [r3]
 	ldr	r2, [r4, #16]
-	ldr	r3, .L2156+28
+	ldr	r3, .L2166+28
 	str	r2, [r3]
 	ldr	r2, [r4, #20]
-	ldr	r3, .L2156+32
+	ldr	r3, .L2166+32
 	str	r2, [r3]
 	ldr	r3, [r4, #28]
 	ldr	r2, [r4, #32]
 	str	r3, [r5]
-	ldr	r3, .L2156+36
+	ldr	r3, .L2166+36
 	str	r2, [r3]
 	ldr	r2, [r4, #36]
-	ldr	r3, .L2156+40
+	ldr	r3, .L2166+40
 	str	r2, [r3]
 	ldr	r2, [r4, #40]
-	ldr	r3, .L2156+44
+	ldr	r3, .L2166+44
 	str	r2, [r3]
 	ldr	r2, [r4, #44]
-	ldr	r3, .L2156+48
+	ldr	r3, .L2166+48
 	str	r2, [r3]
 	ldr	r2, [r4, #48]
-	ldr	r3, .L2156+52
+	ldr	r3, .L2166+52
 	str	r2, [r3]
 	ldr	r2, [r4, #60]
-	ldr	r3, .L2156+56
+	ldr	r3, .L2166+56
 	str	r2, [r3]
-.L2154:
-	ldr	r3, .L2156+60
+.L2164:
+	ldr	r3, .L2166+60
 	movs	r2, #0
 	str	r2, [r3]
 	ldr	r2, [r4, #68]
-	ldr	r3, .L2156+64
+	ldr	r3, .L2166+64
 	cmp	r2, r3
-	bne	.L2155
-	ldr	r3, .L2156+68
+	bne	.L2165
+	ldr	r3, .L2166+68
 	movs	r2, #1
-	ldr	r1, .L2156+72
-	ldr	r0, .L2156+76
+	ldr	r1, .L2166+72
+	ldr	r0, .L2166+76
 	str	r2, [r3]
 	bl	printf
-.L2155:
-	ldr	r3, .L2156+80
-	ldr	r1, .L2156+84
+.L2165:
+	ldr	r3, .L2166+80
+	ldr	r1, .L2166+84
 	ldrh	r2, [r3]
-	ldr	r3, .L2156+88
+	ldr	r3, .L2166+88
 	ldrh	r1, [r1]
 	ldr	r0, [r3]
 	ldr	r3, [r5]
 	mla	r0, r0, r2, r3
 	bl	__aeabi_uidiv
-	ldr	r3, .L2156+92
+	ldr	r3, .L2166+92
 	str	r0, [r3]
 	pop	{r3, r4, r5, pc}
-.L2157:
+.L2167:
 	.align	2
-.L2156:
+.L2166:
 	.word	.LANCHOR138
 	.word	1179929683
 	.word	.LANCHOR168
@@ -15235,13 +15246,43 @@ Ftl_load_ext_data:
 	.word	.LANCHOR157
 	.word	305432421
 	.word	.LANCHOR28
-	.word	.LC45
+	.word	.LC44
 	.word	.LC7
 	.word	.LANCHOR48
 	.word	.LANCHOR40
 	.word	.LANCHOR167
 	.word	.LANCHOR205
 	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
+	.section	.text.ftl_vendor_read,"ax",%progbits
+	.align	1
+	.global	ftl_vendor_read
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_vendor_read, %function
+ftl_vendor_read:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	add	r0, r0, #256
+	b	FtlVendorPartRead
+	.size	ftl_vendor_read, .-ftl_vendor_read
+	.section	.text.ftl_sys_read,"ax",%progbits
+	.align	1
+	.global	ftl_sys_read
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_sys_read, %function
+ftl_sys_read:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	add	r0, r0, #512
+	b	FtlVendorPartRead
+	.size	ftl_sys_read, .-ftl_sys_read
 	.section	.text.FtlMapBlkWriteDumpData,"ax",%progbits
 	.align	1
 	.global	FtlMapBlkWriteDumpData
@@ -15257,34 +15298,34 @@ FtlMapBlkWriteDumpData:
 	mov	r4, r0
 	ldr	r3, [r0, #36]
 	cmp	r3, #0
-	beq	.L2158
+	beq	.L2170
 	movs	r3, #0
 	ldrh	r6, [r0, #6]
 	str	r3, [r0, #36]
-	ldr	r3, .L2172
+	ldr	r3, .L2184
 	ldr	r10, [r0, #24]
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L2158
-	ldr	r3, .L2172+4
-	ldr	r5, .L2172+8
+	bne	.L2170
+	ldr	r3, .L2184+4
+	ldr	r5, .L2184+8
 	ldr	r3, [r3]
 	mov	r7, r5
 	str	r3, [r5, #8]
-	ldr	r3, .L2172+12
+	ldr	r3, .L2184+12
 	ldr	r8, [r3]
 	ldrh	r3, [r0, #2]
 	str	r8, [r5, #12]
-	cbz	r3, .L2162
-	ldr	r2, .L2172+16
+	cbz	r3, .L2174
+	ldr	r2, .L2184+16
 	ldrh	r2, [r2]
 	subs	r2, r2, #1
 	cmp	r3, r2
-	bge	.L2162
+	bge	.L2174
 	ldrh	r2, [r0]
 	movw	r1, #65535
 	cmp	r2, r1
-	beq	.L2162
+	beq	.L2174
 	ldr	r1, [r0, #12]
 	subs	r3, r3, #1
 	mov	r0, r5
@@ -15296,44 +15337,44 @@ FtlMapBlkWriteDumpData:
 	bl	FlashReadPages
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L2162
+	beq	.L2174
 	ldr	r3, [r4, #24]
 	ldrh	r1, [r8, #8]
 	ldr	r2, [r3, r1, lsl #2]
 	ldr	r3, [r5, #4]
 	cmp	r2, r3
-	bne	.L2162
+	bne	.L2174
 	ldr	r2, [r5, #8]
-.L2171:
+.L2183:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
 	b	FtlMapWritePage
-.L2162:
+.L2174:
 	subs	r6, r6, #1
 	uxth	r6, r6
 	ldr	r3, [r10, r6, lsl #2]
 	str	r3, [r7, #4]
-	cbz	r3, .L2163
+	cbz	r3, .L2175
 	movs	r2, #1
-	ldr	r0, .L2172+8
+	ldr	r0, .L2184+8
 	mov	r1, r2
 	bl	FlashReadPages
-.L2164:
+.L2176:
 	ldr	r2, [r7, #8]
 	mov	r1, r6
-	b	.L2171
-.L2163:
-	ldr	r3, .L2172+20
+	b	.L2183
+.L2175:
+	ldr	r3, .L2184+20
 	movs	r1, #255
 	ldr	r0, [r7, #8]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-	b	.L2164
-.L2158:
+	b	.L2176
+.L2170:
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L2173:
+.L2185:
 	.align	2
-.L2172:
+.L2184:
 	.word	.LANCHOR77
 	.word	.LANCHOR184
 	.word	.LANCHOR202
@@ -15354,69 +15395,69 @@ FtlScanSysBlk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r5, .L2256
+	ldr	r5, .L2268
 	sub	sp, sp, #32
 	mov	r1, r4
-	ldr	r3, .L2256+4
+	ldr	r3, .L2268+4
 	ldr	r2, [r5]
-	ldr	r6, .L2256+8
+	ldr	r6, .L2268+8
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L2256+12
+	ldr	r3, .L2268+12
 	lsls	r2, r2, #2
 	strh	r4, [r6]	@ movhi
-	ldr	r7, .L2256+16
+	ldr	r7, .L2268+16
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldr	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L2256+20
+	ldr	r3, .L2268+20
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r7]
 	mov	r1, r4
-	ldr	r3, .L2256+24
+	ldr	r3, .L2268+24
 	lsls	r2, r2, #2
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r7]
 	mov	r1, r4
-	ldr	r3, .L2256+28
+	ldr	r3, .L2268+28
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	movs	r2, #12
 	movs	r1, #255
-	ldr	r0, .L2256+32
+	ldr	r0, .L2268+32
 	bl	ftl_memset
-	ldr	r3, .L2256+36
+	ldr	r3, .L2268+36
 	str	r6, [sp, #12]
 	str	r5, [sp, #16]
 	ldrh	r3, [r3]
 	str	r3, [sp, #4]
-.L2175:
-	ldr	r3, .L2256+40
+.L2187:
+	ldr	r3, .L2268+40
 	ldr	r2, [sp, #4]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bls	.L2217
-	ldr	r3, .L2256+44
+	bls	.L2229
+	ldr	r3, .L2268+44
 	movs	r5, #0
-	ldr	r1, .L2256+48
+	ldr	r1, .L2268+48
 	mov	fp, r5
 	movs	r7, #36
 	ldrh	r8, [r3]
-	ldr	r3, .L2256+52
+	ldr	r3, .L2268+52
 	ldr	r2, [r1]
-	ldr	r1, .L2256+56
+	ldr	r1, .L2268+56
 	ldr	r6, [r3]
-	ldr	r3, .L2256+60
+	ldr	r3, .L2268+60
 	str	r2, [sp, #8]
 	ldrh	r10, [r1]
 	ldr	r3, [r3]
-	ldr	r2, .L2256+64
-	b	.L2218
-.L2177:
+	ldr	r2, .L2268+64
+	b	.L2230
+.L2189:
 	ldrb	r0, [r2, r5]	@ zero_extendqisi2
 	ldr	r1, [sp, #4]
 	str	r3, [sp, #28]
@@ -15426,7 +15467,7 @@ FtlScanSysBlk:
 	bl	FtlBbmIsBadBlock
 	ldr	r2, [sp, #24]
 	ldr	r3, [sp, #28]
-	cbnz	r0, .L2176
+	cbnz	r0, .L2188
 	ldr	r1, [sp, #20]
 	mla	r0, r7, fp, r6
 	ldr	r4, [sp, #8]
@@ -15439,31 +15480,31 @@ FtlScanSysBlk:
 	str	r1, [r0, #12]
 	add	r1, fp, #1
 	uxth	fp, r1
-.L2176:
+.L2188:
 	adds	r5, r5, #1
-.L2218:
+.L2230:
 	uxth	r1, r5
 	cmp	r8, r1
-	bhi	.L2177
+	bhi	.L2189
 	cmp	fp, #0
-	bne	.L2178
-.L2216:
+	bne	.L2190
+.L2228:
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	str	r3, [sp, #4]
-	b	.L2175
-.L2178:
+	b	.L2187
+.L2190:
 	movs	r7, #0
 	movs	r2, #1
 	mov	r1, fp
 	mov	r0, r6
 	bl	FlashReadPages
-.L2179:
+.L2191:
 	uxth	r3, r7
 	cmp	fp, r3
-	bls	.L2216
-	ldr	r3, .L2256+52
+	bls	.L2228
+	ldr	r3, .L2268+52
 	mov	r8, #36
 	mul	r8, r8, r7
 	ldr	r3, [r3]
@@ -15473,10 +15514,10 @@ FtlScanSysBlk:
 	ldr	r6, [r2, #12]
 	adds	r3, r3, #1
 	ubfx	r5, r5, #10, #16
-	bne	.L2182
+	bne	.L2194
 	mov	r10, #16
-.L2184:
-	ldr	r3, .L2256+52
+.L2196:
+	ldr	r3, .L2268+52
 	movs	r2, #1
 	mov	r1, r2
 	ldr	r0, [r3]
@@ -15488,88 +15529,88 @@ FtlScanSysBlk:
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	ldr	r3, .L2256+52
+	ldr	r3, .L2268+52
 	ldr	r3, [r3]
-	bne	.L2181
+	bne	.L2193
 	mov	r2, #-1
 	str	r2, [r3, r8]
-	ldr	r3, .L2256+52
+	ldr	r3, .L2268+52
 	ldr	r3, [r3]
 	ldr	r3, [r3, r8]
 	cmp	r3, r2
-	beq	.L2183
-.L2182:
-	ldr	r3, .L2256+68
+	beq	.L2195
+.L2194:
+	ldr	r3, .L2268+68
 	ldr	r2, [r3]
 	ldr	r3, [r6, #4]
 	adds	r1, r2, #1
-	beq	.L2185
+	beq	.L2197
 	cmp	r2, r3
-	bhi	.L2186
-.L2185:
+	bhi	.L2198
+.L2197:
 	adds	r2, r3, #1
 	ittt	ne
-	ldrne	r1, .L2256+68
+	ldrne	r1, .L2268+68
 	addne	r2, r3, #1
 	strne	r2, [r1]
-.L2186:
+.L2198:
 	ldrh	r2, [r6]
 	movw	r1, #61604
 	cmp	r2, r1
-	beq	.L2188
-	bhi	.L2189
+	beq	.L2200
+	bhi	.L2201
 	movw	r3, #61574
 	cmp	r2, r3
-	beq	.L2190
-.L2187:
+	beq	.L2202
+.L2199:
 	adds	r7, r7, #1
-	b	.L2179
-.L2181:
+	b	.L2191
+.L2193:
 	ldr	r3, [r3, r8]
 	adds	r3, r3, #1
-	bne	.L2182
+	bne	.L2194
 	add	r10, r10, #-1
 	uxth	r10, r10
 	cmp	r10, #0
-	bne	.L2184
-.L2183:
-	ldr	r3, .L2256+72
+	bne	.L2196
+.L2195:
+	ldr	r3, .L2268+72
 	ldrb	r1, [r3]	@ zero_extendqisi2
-	cbnz	r1, .L2255
-.L2214:
+	cbnz	r1, .L2267
+.L2226:
 	mov	r0, r5
 	bl	FtlFreeSysBlkQueueIn
-	b	.L2187
-.L2189:
+	b	.L2199
+.L2201:
 	movw	r3, #61634
 	cmp	r2, r3
-	beq	.L2191
+	beq	.L2203
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L2187
-.L2255:
+	bne	.L2199
+.L2267:
 	movs	r1, #0
-	b	.L2214
-.L2191:
-	ldr	r3, .L2256+8
+	b	.L2226
+.L2203:
+	ldr	r3, .L2268+8
 	ldrh	r2, [r3]
-	ldr	r3, .L2256
+	ldr	r3, .L2268
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bls	.L2193
-	ldr	r1, .L2256+76
-	movw	r2, #1308
-	ldr	r0, .L2256+80
+	bls	.L2205
+	ldr	r1, .L2268+76
+	movw	r2, #1297
+	ldr	r0, .L2268+80
 	bl	printf
-	ldr	r1, .L2256+84
-	ldr	r0, .L2256+88
+	ldr	r1, .L2268+84
+	ldr	r0, .L2268+88
 	bl	printf
-.L2193:
+.L2205:
 	ldr	r3, [sp, #16]
 	ldr	r2, [sp, #12]
 	ldr	r1, [r3]
 	ldrh	r0, [r2]
-	ldr	r2, .L2256+12
+	ldr	r2, .L2268+12
 	uxth	r10, r1
 	ldr	ip, [r2]
 	add	r3, r10, #-1
@@ -15577,61 +15618,61 @@ FtlScanSysBlk:
 	add	r10, r10, #-1
 	sxth	r3, r3
 	sxth	r10, r10
-.L2194:
+.L2206:
 	cmp	r3, r10
-	bgt	.L2200
+	bgt	.L2212
 	cmp	r3, #0
-	bge	.L2233
-	b	.L2187
-.L2200:
+	bge	.L2245
+	b	.L2199
+.L2212:
 	ldr	r2, [ip, r3, lsl #2]
 	add	r8, ip, r3, lsl #2
 	ldr	r4, [r6, #4]
 	cmp	r4, r2
-	bls	.L2195
+	bls	.L2207
 	ldr	r2, [ip]
-	cbnz	r2, .L2196
+	cbnz	r2, .L2208
 	cmp	r1, r0
 	ittt	ne
-	ldrne	r2, .L2256+8
+	ldrne	r2, .L2268+8
 	addne	r0, r0, #1
 	strhne	r0, [r2]	@ movhi
-.L2196:
-	ldr	r2, .L2256+20
+.L2208:
+	ldr	r2, .L2268+20
 	uxth	r10, r3
 	ldr	r0, [r2]
 	movs	r2, #0
-.L2197:
+.L2209:
 	uxth	lr, r2
 	sxth	r1, r2
 	cmp	r10, lr
-	bhi	.L2198
+	bhi	.L2210
 	ldr	r2, [r6, #4]
 	cmp	r3, #0
 	str	r2, [r8]
 	strh	r5, [r0, r3, lsl #1]	@ movhi
-	blt	.L2187
-	ldr	r2, .L2256+8
+	blt	.L2199
+	ldr	r2, .L2268+8
 	ldrh	r0, [r2]
-	ldr	r2, .L2256
+	ldr	r2, .L2268
 	ldr	r2, [r2]
 	subs	r2, r2, r0
 	subs	r2, r2, #1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L2187
-.L2233:
-	ldr	r2, .L2256+8
+	bgt	.L2199
+.L2245:
+	ldr	r2, .L2268+8
 	adds	r0, r0, #1
 	strh	r0, [r2]	@ movhi
 	ldr	r2, [r6, #4]
 	str	r2, [ip, r3, lsl #2]
-	ldr	r2, .L2256+20
-.L2253:
+	ldr	r2, .L2268+20
+.L2265:
 	ldr	r2, [r2]
 	strh	r5, [r2, r3, lsl #1]	@ movhi
-	b	.L2187
-.L2198:
+	b	.L2199
+.L2210:
 	add	lr, ip, r1, lsl #2
 	adds	r2, r2, #1
 	ldr	r4, [lr, #4]
@@ -15639,14 +15680,14 @@ FtlScanSysBlk:
 	ldrh	lr, [lr, #2]
 	str	r4, [ip, r1, lsl #2]
 	strh	lr, [r0, r1, lsl #1]	@ movhi
-	b	.L2197
-.L2195:
+	b	.L2209
+.L2207:
 	subs	r3, r3, #1
 	sxth	r3, r3
-	b	.L2194
-.L2257:
+	b	.L2206
+.L2269:
 	.align	2
-.L2256:
+.L2268:
 	.word	.LANCHOR65
 	.word	.LANCHOR71
 	.word	.LANCHOR128
@@ -15670,75 +15711,75 @@ FtlScanSysBlk:
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-.L2190:
-	ldr	r8, .L2258+20
-	ldr	r10, .L2258+28
+.L2202:
+	ldr	r8, .L2270+20
+	ldr	r10, .L2270+28
 	ldrh	r2, [r8]
 	ldrh	r3, [r10]
 	cmp	r2, r3
-	bls	.L2203
-	ldr	r1, .L2258
-	movw	r2, #1355
-	ldr	r0, .L2258+4
+	bls	.L2215
+	ldr	r1, .L2270
+	mov	r2, #1344
+	ldr	r0, .L2270+4
 	bl	printf
-	ldr	r1, .L2258+8
-	ldr	r0, .L2258+12
+	ldr	r1, .L2270+8
+	ldr	r0, .L2270+12
 	bl	printf
-.L2203:
-	ldr	r2, .L2258+16
+.L2215:
+	ldr	r2, .L2270+16
 	ldrh	lr, [r10]
 	ldrh	ip, [r8]
 	ldr	r0, [r2]
 	add	r10, lr, #-1
 	sxth	r3, r10
 	sub	r10, r10, ip
-.L2204:
+.L2216:
 	cmp	r3, r10
-	ble	.L2209
+	ble	.L2221
 	ldr	r1, [r6, #4]
 	add	r8, r0, r3, lsl #2
 	ldr	r2, [r0, r3, lsl #2]
 	cmp	r1, r2
-	bls	.L2205
+	bls	.L2217
 	ldr	r2, [r0]
-	cbnz	r2, .L2206
+	cbnz	r2, .L2218
 	cmp	lr, ip
 	ittt	ne
-	ldrne	r2, .L2258+20
+	ldrne	r2, .L2270+20
 	addne	ip, ip, #1
 	strhne	ip, [r2]	@ movhi
-.L2206:
-	ldr	r2, .L2258+24
+.L2218:
+	ldr	r2, .L2270+24
 	uxth	r10, r3
 	ldr	ip, [r2]
 	movs	r2, #0
-.L2207:
+.L2219:
 	uxth	lr, r2
 	sxth	r1, r2
 	cmp	r10, lr
-	bhi	.L2208
+	bhi	.L2220
 	ldr	r2, [r6, #4]
 	str	r2, [r8]
 	strh	r5, [ip, r3, lsl #1]	@ movhi
-.L2209:
+.L2221:
 	cmp	r3, #0
-	blt	.L2187
-	ldr	r2, .L2258+28
-	ldr	ip, .L2258+20
+	blt	.L2199
+	ldr	r2, .L2270+28
+	ldr	ip, .L2270+20
 	ldrh	r2, [r2]
 	ldrh	r1, [ip]
 	subs	r2, r2, #1
 	subs	r2, r2, r1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L2187
+	bgt	.L2199
 	ldr	r2, [r6, #4]
 	adds	r1, r1, #1
 	strh	r1, [ip]	@ movhi
 	str	r2, [r0, r3, lsl #2]
-	ldr	r2, .L2258+24
-	b	.L2253
-.L2208:
+	ldr	r2, .L2270+24
+	b	.L2265
+.L2220:
 	add	lr, r0, r1, lsl #2
 	adds	r2, r2, #1
 	ldr	r4, [lr, #4]
@@ -15746,91 +15787,91 @@ FtlScanSysBlk:
 	ldrh	lr, [lr, #2]
 	str	r4, [r0, r1, lsl #2]
 	strh	lr, [ip, r1, lsl #1]	@ movhi
-	b	.L2207
-.L2205:
+	b	.L2219
+.L2217:
 	subs	r3, r3, #1
 	sxth	r3, r3
-	b	.L2204
-.L2188:
-	ldr	r8, .L2258+48
+	b	.L2216
+.L2200:
+	ldr	r8, .L2270+48
 	movw	r2, #65535
 	ldrh	r1, [r8]
 	cmp	r1, r2
-	bne	.L2211
-.L2254:
+	bne	.L2223
+.L2266:
 	strh	r5, [r8]	@ movhi
 	str	r3, [r8, #8]
-	b	.L2187
-.L2211:
+	b	.L2199
+.L2223:
 	ldrh	r0, [r8, #4]
 	cmp	r0, r2
-	beq	.L2212
+	beq	.L2224
 	movs	r1, #1
 	bl	FtlFreeSysBlkQueueIn
-.L2212:
+.L2224:
 	ldr	r3, [r6, #4]
 	ldr	r2, [r8, #8]
 	cmp	r2, r3
-	bcs	.L2213
+	bcs	.L2225
 	ldrh	r2, [r8]
 	strh	r2, [r8, #4]	@ movhi
-	b	.L2254
-.L2213:
+	b	.L2266
+.L2225:
 	strh	r5, [r8, #4]	@ movhi
-	b	.L2187
-.L2217:
-	ldr	r3, .L2258+32
+	b	.L2199
+.L2229:
+	ldr	r3, .L2270+32
 	ldr	r2, [r3]
 	ldrh	r3, [r2]
-	cbz	r3, .L2219
-.L2222:
-	ldr	r3, .L2258+24
+	cbz	r3, .L2231
+.L2234:
+	ldr	r3, .L2270+24
 	ldr	r4, [r3]
 	ldrh	r2, [r4]
 	cmp	r2, #0
-	beq	.L2220
-.L2221:
-	ldr	r3, .L2258+36
+	beq	.L2232
+.L2233:
+	ldr	r3, .L2270+36
 	ldrh	r2, [r3]
-	ldr	r3, .L2258+40
+	ldr	r3, .L2270+40
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bls	.L2252
-	ldr	r1, .L2258
-	movw	r2, #1489
-	ldr	r0, .L2258+4
+	bls	.L2264
+	ldr	r1, .L2270
+	movw	r2, #1478
+	ldr	r0, .L2270+4
 	bl	printf
-	ldr	r1, .L2258+8
-	ldr	r0, .L2258+12
+	ldr	r1, .L2270+8
+	ldr	r0, .L2270+12
 	bl	printf
-.L2252:
+.L2264:
 	movs	r0, #0
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2219:
-	ldr	r1, .L2258+36
+.L2231:
+	ldr	r1, .L2270+36
 	ldrh	r1, [r1]
 	cmp	r1, #0
-	beq	.L2222
-	ldr	r5, .L2258+40
+	beq	.L2234
+	ldr	r5, .L2270+40
 	ldr	r0, [r5]
-.L2223:
+.L2235:
 	sxth	r1, r3
 	cmp	r1, r0
-	bcs	.L2222
+	bcs	.L2234
 	ldrh	r4, [r2, r1, lsl #1]
 	adds	r3, r3, #1
 	cmp	r4, #0
-	beq	.L2223
-	ldr	r3, .L2258+44
+	beq	.L2235
+	ldr	r3, .L2270+44
 	movs	r6, #0
 	ldr	r0, [r3]
 	mov	r3, r1
-.L2224:
+.L2236:
 	ldr	r4, [r5]
 	cmp	r3, r4
-	bcs	.L2222
+	bcs	.L2234
 	ldrh	r7, [r2, r3, lsl #1]
 	subs	r4, r3, r1
 	strh	r7, [r2, r4, lsl #1]	@ movhi
@@ -15839,30 +15880,30 @@ FtlScanSysBlk:
 	strh	r6, [r2, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	sxth	r3, r3
-	b	.L2224
-.L2220:
-	ldr	r3, .L2258+20
+	b	.L2236
+.L2232:
+	ldr	r3, .L2270+20
 	ldrh	r3, [r3]
 	cmp	r3, #0
-	beq	.L2221
-	ldr	r5, .L2258+28
+	beq	.L2233
+	ldr	r5, .L2270+28
 	ldrh	r1, [r5]
-.L2229:
+.L2241:
 	sxth	r3, r2
 	cmp	r3, r1
 	mov	r6, r3
-	bge	.L2221
+	bge	.L2233
 	ldrh	r0, [r4, r3, lsl #1]
 	adds	r2, r2, #1
 	cmp	r0, #0
-	beq	.L2229
-	ldr	r2, .L2258+16
+	beq	.L2241
+	ldr	r2, .L2270+16
 	movs	r0, #0
 	ldr	r2, [r2]
-.L2230:
+.L2242:
 	ldrh	r1, [r5]
 	cmp	r3, r1
-	bge	.L2221
+	bge	.L2233
 	ldrh	r7, [r4, r3, lsl #1]
 	subs	r1, r3, r6
 	strh	r7, [r4, r1, lsl #1]	@ movhi
@@ -15871,10 +15912,10 @@ FtlScanSysBlk:
 	adds	r1, r3, #1
 	strh	r0, [r4, r3, lsl #1]	@ movhi
 	sxth	r3, r1
-	b	.L2230
-.L2259:
+	b	.L2242
+.L2271:
 	.align	2
-.L2258:
+.L2270:
 	.word	.LANCHOR220
 	.word	.LC5
 	.word	.LC6
@@ -15902,15 +15943,15 @@ FtlLoadSysInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r1, #0
-	ldr	r8, .L2285+156
-	ldr	r5, .L2285
+	ldr	r8, .L2297+156
+	ldr	r5, .L2297
 	ldr	r3, [r8]
-	ldr	r4, .L2285+4
-	ldr	r10, .L2285+160
+	ldr	r4, .L2297+4
+	ldr	r10, .L2297+160
 	ldrh	r2, [r5]
-	ldr	r7, .L2285+8
+	ldr	r7, .L2297+8
 	str	r3, [r4, #8]
-	ldr	r6, .L2285+12
+	ldr	r6, .L2297+12
 	ldr	r3, [r10]
 	lsls	r2, r2, #1
 	ldr	r0, [r7]
@@ -15920,49 +15961,49 @@ FtlLoadSysInfo:
 	movw	r3, #65535
 	str	r7, [sp]
 	cmp	r0, r3
-	bne	.L2261
-.L2270:
+	bne	.L2273
+.L2282:
 	mov	r0, #-1
-.L2260:
+.L2272:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2261:
+.L2273:
 	movs	r1, #1
 	mov	fp, r4
 	bl	FtlGetLastWrittenPage
-	ldr	r3, .L2285+16
+	ldr	r3, .L2297+16
 	sxth	r7, r0
 	adds	r0, r0, #1
 	strh	r0, [r6, #2]	@ movhi
-.L2263:
+.L2275:
 	cmp	r7, #0
-	bge	.L2266
-	ldr	r1, .L2285+20
-	movw	r2, #1549
-	ldr	r0, .L2285+24
+	bge	.L2278
+	ldr	r1, .L2297+20
+	movw	r2, #1538
+	ldr	r0, .L2297+24
 	bl	printf
-	ldr	r1, .L2285+28
-	ldr	r0, .L2285+32
+	ldr	r1, .L2297+28
+	ldr	r0, .L2297+32
 	bl	printf
-.L2265:
-	ldr	r2, .L2285+36
+.L2277:
+	ldr	r2, .L2297+36
 	ldrh	r3, [r5]
 	ldrh	r2, [r2]
 	adds	r3, r3, #24
 	cmp	r2, r3, lsl #1
-	bcs	.L2268
-	ldr	r1, .L2285+20
-	movw	r2, #1551
-	ldr	r0, .L2285+24
+	bcs	.L2280
+	ldr	r1, .L2297+20
+	movw	r2, #1540
+	ldr	r0, .L2297+24
 	bl	printf
-	ldr	r1, .L2285+28
-	ldr	r0, .L2285+32
+	ldr	r1, .L2297+28
+	ldr	r0, .L2297+32
 	bl	printf
-.L2268:
+.L2280:
 	movs	r2, #48
 	ldr	r1, [r4, #8]
-	ldr	r0, .L2285+40
+	ldr	r0, .L2297+40
 	bl	ftl_memcpy
 	ldrh	r2, [r5]
 	ldr	r3, [sp]
@@ -15979,14 +16020,14 @@ FtlLoadSysInfo:
 	adds	r2, r2, #4
 	bic	r1, r1, #3
 	add	r1, r1, r3
-	ldr	r3, .L2285+44
+	ldr	r3, .L2297+44
 	ldr	r0, [r3]
 	bl	ftl_memcpy
-	ldr	r3, .L2285+48
+	ldr	r3, .L2297+48
 	ldrh	r3, [r3]
-	cbz	r3, .L2269
+	cbz	r3, .L2281
 	ldrh	r1, [r5]
-	ldr	r3, .L2285+52
+	ldr	r3, .L2297+52
 	ldrh	r2, [r3]
 	lsrs	r3, r1, #3
 	add	r3, r3, r1, lsl #1
@@ -15995,65 +16036,65 @@ FtlLoadSysInfo:
 	lsls	r2, r2, #2
 	ubfx	r3, r3, #2, #14
 	add	r1, r1, r3, lsl #2
-	ldr	r3, .L2285+56
+	ldr	r3, .L2297+56
 	ldr	r0, [r3]
 	bl	ftl_memcpy
-.L2269:
-	ldr	r4, .L2285+40
-	ldr	r3, .L2285+16
+.L2281:
+	ldr	r4, .L2297+40
+	ldr	r3, .L2297+16
 	ldr	r2, [r4]
 	cmp	r2, r3
-	bne	.L2270
-	ldr	r3, .L2285+60
+	bne	.L2282
+	ldr	r3, .L2297+60
 	ldrb	r2, [r4, #10]	@ zero_extendqisi2
 	ldrh	r5, [r4, #8]
 	ldrh	r3, [r3]
 	strh	r5, [r6, #6]	@ movhi
 	cmp	r2, r3
-	bne	.L2270
-	ldr	r3, .L2285+64
-	ldr	r2, .L2285+68
+	bne	.L2282
+	ldr	r3, .L2297+64
+	ldr	r2, .L2297+68
 	str	r5, [r3]
-	ldr	r3, .L2285+72
+	ldr	r3, .L2297+72
 	ldrh	r3, [r3]
 	muls	r3, r5, r3
 	str	r3, [r2]
-	ldr	r2, .L2285+76
+	ldr	r2, .L2297+76
 	ldrh	r2, [r2]
 	muls	r3, r2, r3
-	ldr	r2, .L2285+80
+	ldr	r2, .L2297+80
 	str	r3, [r2]
-	ldr	r3, .L2285+84
+	ldr	r3, .L2297+84
 	ldr	r6, [r3]
-	ldr	r3, .L2285+88
+	ldr	r3, .L2297+88
 	ldrh	r0, [r3, #6]
-	ldr	r3, .L2285+92
+	ldr	r3, .L2297+92
 	subs	r0, r6, r0
 	ldrh	r1, [r3]
 	subs	r0, r0, r5
 	bl	__aeabi_uidiv
-	ldr	r3, .L2285+96
+	ldr	r3, .L2297+96
 	cmp	r5, r6
 	strh	r0, [r3]	@ movhi
-	bls	.L2271
-	ldr	r1, .L2285+20
-	movw	r2, #1578
-	ldr	r0, .L2285+24
+	bls	.L2283
+	ldr	r1, .L2297+20
+	movw	r2, #1567
+	ldr	r0, .L2297+24
 	bl	printf
-	ldr	r1, .L2285+28
-	ldr	r0, .L2285+32
+	ldr	r1, .L2297+28
+	ldr	r0, .L2297+32
 	bl	printf
-.L2271:
+.L2283:
 	ldrh	r2, [r4, #16]
-	ldr	r3, .L2285+100
+	ldr	r3, .L2297+100
 	ldrh	ip, [r4, #14]
-	ldr	r7, .L2285+104
+	ldr	r7, .L2297+104
 	lsrs	r1, r2, #6
 	and	r2, r2, #63
 	strb	r2, [r3, #6]
 	ldrb	r2, [r4, #11]	@ zero_extendqisi2
 	strh	r1, [r3, #2]	@ movhi
-	ldr	r1, .L2285+108
+	ldr	r1, .L2297+108
 	strb	r2, [r3, #8]
 	ldrh	r2, [r4, #18]
 	strh	ip, [r3]	@ movhi
@@ -16072,7 +16113,7 @@ FtlLoadSysInfo:
 	strh	r5, [r1, #2]	@ movhi
 	ldrh	r5, [r4, #22]
 	strb	r2, [r1, #8]
-	ldr	r2, .L2285+112
+	ldr	r2, .L2297+112
 	strh	r5, [r2]	@ movhi
 	ldrh	r5, [r4, #24]
 	lsrs	r6, r5, #6
@@ -16082,31 +16123,31 @@ FtlLoadSysInfo:
 	strh	r6, [r2, #2]	@ movhi
 	ldr	r6, [r4, #32]
 	strb	r5, [r2, #8]
-	ldr	r5, .L2285+116
+	ldr	r5, .L2297+116
 	str	r3, [r5]
-	ldr	r5, .L2285+120
+	ldr	r5, .L2297+120
 	str	r3, [r5]
-	ldr	r5, .L2285+124
+	ldr	r5, .L2297+124
 	str	r3, [r5]
-	ldr	r5, .L2285+128
+	ldr	r5, .L2297+128
 	str	r3, [r5]
-	ldr	r5, .L2285+132
+	ldr	r5, .L2297+132
 	str	r6, [r5]
 	mov	r6, r1
-	ldr	r5, .L2285+136
+	ldr	r5, .L2297+136
 	str	r3, [r5]
-	ldr	r5, .L2285+140
+	ldr	r5, .L2297+140
 	str	r3, [r5]
-	ldr	r5, .L2285+144
+	ldr	r5, .L2297+144
 	ldr	lr, [r4, #40]
 	str	r3, [r5]
-	ldr	r3, .L2285+148
+	ldr	r3, .L2297+148
 	ldr	r5, [r3]
 	cmp	lr, r5
 	mov	r5, r2
 	it	hi
 	strhi	lr, [r3]
-	ldr	r3, .L2285+152
+	ldr	r3, .L2297+152
 	ldr	r2, [r4, #36]
 	ldr	r1, [r3]
 	cmp	r2, r1
@@ -16114,34 +16155,34 @@ FtlLoadSysInfo:
 	strhi	r2, [r3]
 	movw	r3, #65535
 	cmp	ip, r3
-	beq	.L2274
-	ldr	r0, .L2285+100
+	beq	.L2286
+	ldr	r0, .L2297+100
 	bl	make_superblock
-.L2274:
+.L2286:
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2275
-	ldr	r0, .L2285+108
+	beq	.L2287
+	ldr	r0, .L2297+108
 	bl	make_superblock
-.L2275:
+.L2287:
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2276
-	ldr	r0, .L2285+112
+	beq	.L2288
+	ldr	r0, .L2297+112
 	bl	make_superblock
-.L2276:
+.L2288:
 	ldrh	r2, [r7]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2277
-	ldr	r0, .L2285+104
+	beq	.L2289
+	ldr	r0, .L2297+104
 	bl	make_superblock
-.L2277:
+.L2289:
 	movs	r0, #0
-	b	.L2260
-.L2266:
+	b	.L2272
+.L2278:
 	ldrh	r2, [r6]
 	mov	r0, fp
 	str	r3, [sp, #4]
@@ -16155,23 +16196,23 @@ FtlLoadSysInfo:
 	ldr	r2, [r4]
 	ldr	r3, [sp, #4]
 	adds	r2, r2, #1
-	beq	.L2264
+	beq	.L2276
 	ldr	r2, [r8]
 	ldr	r2, [r2]
 	cmp	r2, r3
-	bne	.L2264
+	bne	.L2276
 	ldr	r2, [r10]
 	ldrh	r1, [r2]
 	movw	r2, #61604
 	cmp	r1, r2
-	beq	.L2265
-.L2264:
+	beq	.L2277
+.L2276:
 	subs	r7, r7, #1
 	sxth	r7, r7
-	b	.L2263
-.L2286:
+	b	.L2275
+.L2298:
 	.align	2
-.L2285:
+.L2297:
 	.word	.LANCHOR40
 	.word	.LANCHOR202
 	.word	.LANCHOR84
@@ -16227,97 +16268,97 @@ FtlDumpBlockInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	ubfx	r0, r0, #10, #16
-	ldr	r4, .L2299
+	ldr	r4, .L2311
 	sub	sp, sp, #88
 	mov	r8, r1
 	ldrh	r3, [r4]
 	str	r3, [sp, #24]
 	bl	P2V_block_in_plane
-	ldr	r1, .L2299+4
+	ldr	r1, .L2311+4
 	mov	r6, r0
-	ldr	r0, .L2299+8
+	ldr	r0, .L2311+8
 	bl	printf
-	ldr	r3, .L2299+12
+	ldr	r3, .L2311+12
 	mov	r1, r6
-	ldr	r0, .L2299+16
+	ldr	r0, .L2311+16
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r6, lsl #1]
 	bl	printf
 	add	r0, sp, #88
 	strh	r6, [r0, #-48]!	@ movhi
 	bl	make_superblock
-	ldr	r3, .L2299+20
+	ldr	r3, .L2311+20
 	ldrb	r5, [r3]	@ zero_extendqisi2
-	cbz	r5, .L2288
+	cbz	r5, .L2300
 	cmp	r8, #0
-	bne	.L2297
+	bne	.L2309
 	mov	r0, r6
 	bl	ftl_get_blk_mode
 	cmp	r0, #1
 	mov	r5, r0
-	bne	.L2288
-	ldr	r3, .L2299+24
+	bne	.L2300
+	ldr	r3, .L2311+24
 	ldrh	r3, [r3]
 	str	r3, [sp, #24]
-.L2288:
+.L2300:
 	movs	r6, #0
 	ldrh	r3, [r4]
 	ldr	r2, [sp, #24]
 	mov	r1, r5
-	ldr	r0, .L2299+28
+	ldr	r0, .L2311+28
 	bl	printf
-.L2289:
-	ldr	r3, .L2299+32
+.L2301:
+	ldr	r3, .L2311+32
 	movs	r2, #0
 	add	ip, sp, #54
 	mov	r4, r2
 	movw	r10, #65535
 	mov	fp, #36
 	ldrh	lr, [r3]
-	ldr	r3, .L2299+36
+	ldr	r3, .L2311+36
 	ldr	r0, [r3]
-	ldr	r3, .L2299+40
+	ldr	r3, .L2311+40
 	ldr	r3, [r3]
 	str	r3, [sp, #28]
-	ldr	r3, .L2299+44
+	ldr	r3, .L2311+44
 	ldrh	r3, [r3]
 	str	r3, [sp, #32]
-	ldr	r3, .L2299+48
+	ldr	r3, .L2311+48
 	ldr	r3, [r3]
 	str	r3, [sp, #36]
-	ldr	r3, .L2299+52
+	ldr	r3, .L2311+52
 	ldrh	r8, [r3]
-.L2290:
+.L2302:
 	uxth	r3, r2
 	cmp	lr, r3
-	bhi	.L2292
-	ldr	fp, .L2299+56
+	bhi	.L2304
+	ldr	fp, .L2311+56
 	mov	r8, #0
 	mov	r10, #36
 	mov	r2, r5
 	mov	r1, r4
 	bl	FlashReadPages
-.L2293:
+.L2305:
 	uxth	r3, r8
 	cmp	r4, r3
-	bhi	.L2294
+	bhi	.L2306
 	adds	r6, r6, #1
 	ldr	r3, [sp, #24]
 	uxth	r6, r6
 	cmp	r3, r6
-	bne	.L2289
-.L2295:
+	bne	.L2301
+.L2307:
 	movs	r0, #0
 	add	sp, sp, #88
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2297:
+.L2309:
 	movs	r5, #0
-	b	.L2288
-.L2292:
+	b	.L2300
+.L2304:
 	ldrh	r3, [ip, #2]!
 	cmp	r3, r10
-	beq	.L2291
+	beq	.L2303
 	mla	r1, fp, r4, r0
 	ldr	r7, [sp, #28]
 	orr	r3, r6, r3, lsl #10
@@ -16334,11 +16375,11 @@ FtlDumpBlockInfo:
 	bic	r3, r3, #3
 	add	r3, r3, r7
 	str	r3, [r1, #12]
-.L2291:
+.L2303:
 	adds	r2, r2, #1
-	b	.L2290
-.L2294:
-	ldr	r3, .L2299+36
+	b	.L2302
+.L2306:
+	ldr	r3, .L2311+36
 	mul	r0, r10, r8
 	ldrh	r1, [sp, #40]
 	add	r8, r8, #1
@@ -16362,25 +16403,25 @@ FtlDumpBlockInfo:
 	ldr	r2, [ip, r0]
 	mov	r0, fp
 	bl	printf
-	b	.L2293
-.L2300:
+	b	.L2305
+.L2312:
 	.align	2
-.L2299:
+.L2311:
 	.word	.LANCHOR53
 	.word	.LANCHOR224
-	.word	.LC46
+	.word	.LC45
 	.word	.LANCHOR84
-	.word	.LC47
+	.word	.LC46
 	.word	.LANCHOR8
 	.word	.LANCHOR54
-	.word	.LC48
+	.word	.LC47
 	.word	.LANCHOR38
 	.word	.LANCHOR180
 	.word	.LANCHOR105
 	.word	.LANCHOR58
 	.word	.LANCHOR106
 	.word	.LANCHOR59
-	.word	.LC49
+	.word	.LC48
 	.size	FtlDumpBlockInfo, .-FtlDumpBlockInfo
 	.section	.text.FtlScanAllBlock,"ax",%progbits
 	.align	1
@@ -16395,86 +16436,86 @@ FtlScanAllBlock:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #88
-	ldr	r6, .L2311
-	ldr	r1, .L2311+4
-	ldr	r0, .L2311+8
+	ldr	r6, .L2323
+	ldr	r1, .L2323+4
+	ldr	r0, .L2323+8
 	bl	printf
 	movs	r3, #0
 	str	r3, [sp, #28]
-.L2302:
-	ldr	r3, .L2311+12
+.L2314:
+	ldr	r3, .L2323+12
 	ldrh	r0, [sp, #28]
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bhi	.L2310
+	bhi	.L2322
 	movs	r0, #0
 	add	sp, sp, #88
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2310:
+.L2322:
 	add	r4, sp, #88
 	add	r7, sp, #54
 	strh	r0, [r4, #-48]!	@ movhi
 	movw	r10, #65535
 	bl	ftl_get_blk_mode
-	ldr	r3, .L2311+16
+	ldr	r3, .L2323+16
 	mov	fp, #36
 	ldrh	r1, [sp, #28]
 	ldr	r2, [r3]
 	mov	r3, r0
-	ldr	r0, .L2311+20
+	ldr	r0, .L2323+20
 	ldrh	r2, [r2, r1, lsl #1]
 	bl	printf
 	mov	r0, r4
 	bl	make_superblock
-	ldr	r3, .L2311+24
+	ldr	r3, .L2323+24
 	movs	r2, #0
 	ldr	r0, [r6]
 	mov	r4, r2
 	ldrh	lr, [r3]
-	ldr	r3, .L2311+28
+	ldr	r3, .L2323+28
 	ldr	r3, [r3]
 	str	r3, [sp, #32]
-	ldr	r3, .L2311+32
+	ldr	r3, .L2323+32
 	ldrh	ip, [r3]
-	ldr	r3, .L2311+36
+	ldr	r3, .L2323+36
 	ldr	r3, [r3]
 	str	r3, [sp, #36]
-	ldr	r3, .L2311+40
+	ldr	r3, .L2323+40
 	ldrh	r8, [r3]
-.L2303:
+.L2315:
 	uxth	r3, r2
 	cmp	lr, r3
-	bhi	.L2305
-	ldr	r10, .L2311+44
+	bhi	.L2317
+	ldr	r10, .L2323+44
 	movs	r7, #0
 	mov	r8, #36
 	movs	r2, #0
 	mov	r1, r4
 	bl	FlashReadPages
-.L2306:
+.L2318:
 	uxth	r3, r7
 	cmp	r4, r3
-	bhi	.L2307
-	ldr	r10, .L2311+48
+	bhi	.L2319
+	ldr	r10, .L2323+48
 	movs	r7, #0
 	mov	r8, #36
 	movs	r2, #1
 	mov	r1, r4
 	ldr	r0, [r6]
 	bl	FlashReadPages
-.L2308:
+.L2320:
 	uxth	r3, r7
 	cmp	r4, r3
-	bhi	.L2309
+	bhi	.L2321
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
 	str	r3, [sp, #28]
-	b	.L2302
-.L2305:
+	b	.L2314
+.L2317:
 	ldrh	r3, [r7, #2]!
 	cmp	r3, r10
-	beq	.L2304
+	beq	.L2316
 	mla	r1, fp, r4, r0
 	ldr	r5, [sp, #32]
 	lsls	r3, r3, #10
@@ -16490,10 +16531,10 @@ FtlScanAllBlock:
 	bic	r3, r3, #3
 	add	r3, r3, r5
 	str	r3, [r1, #12]
-.L2304:
+.L2316:
 	adds	r2, r2, #1
-	b	.L2303
-.L2307:
+	b	.L2315
+.L2319:
 	mul	r2, r8, r7
 	ldr	r0, [r6]
 	ldrh	r1, [sp, #40]
@@ -16517,8 +16558,8 @@ FtlScanAllBlock:
 	mov	r0, r10
 	ldr	r3, [lr, #4]
 	bl	printf
-	b	.L2306
-.L2309:
+	b	.L2318
+.L2321:
 	mul	r2, r8, r7
 	ldr	r0, [r6]
 	ldrh	r1, [sp, #40]
@@ -16542,23 +16583,23 @@ FtlScanAllBlock:
 	mov	r0, r10
 	ldr	r3, [lr, #4]
 	bl	printf
-	b	.L2308
-.L2312:
+	b	.L2320
+.L2324:
 	.align	2
-.L2311:
+.L2323:
 	.word	.LANCHOR180
 	.word	.LANCHOR225
-	.word	.LC46
+	.word	.LC45
 	.word	.LANCHOR41
 	.word	.LANCHOR84
-	.word	.LC50
+	.word	.LC49
 	.word	.LANCHOR38
 	.word	.LANCHOR105
 	.word	.LANCHOR58
 	.word	.LANCHOR106
 	.word	.LANCHOR59
+	.word	.LC50
 	.word	.LC51
-	.word	.LC52
 	.size	FtlScanAllBlock, .-FtlScanAllBlock
 	.section	.text.FtlMapTblRecovery,"ax",%progbits
 	.align	1
@@ -16584,16 +16625,16 @@ FtlMapTblRecovery:
 	lsl	r2, fp, #2
 	ldr	r10, [r0, #12]
 	mov	r0, r8
-	ldr	r5, .L2338
+	ldr	r5, .L2352
 	str	r3, [sp, #4]
 	bl	ftl_memset
-	ldr	r3, .L2338+4
+	ldr	r3, .L2352+4
 	str	r6, [r4, #32]
 	str	r6, [r4, #28]
 	ldr	r2, [r3]
 	str	r3, [sp, #8]
 	str	r2, [r5, #8]
-	ldr	r2, .L2338+8
+	ldr	r2, .L2352+8
 	ldr	r7, [r2]
 	movw	r2, #65535
 	str	r7, [r5, #12]
@@ -16601,16 +16642,16 @@ FtlMapTblRecovery:
 	strh	r2, [r4, #2]	@ movhi
 	movs	r2, #1
 	str	r2, [r4, #36]
-.L2314:
+.L2326:
 	ldr	r2, [sp, #4]
 	sxth	r3, r6
 	cmp	r3, r2
-	bge	.L2332
+	bge	.L2343
 	ldr	r2, [sp, #4]
 	subs	r2, r2, #1
 	cmp	r3, r2
 	lsl	r2, r3, #1
-	bne	.L2315
+	bne	.L2327
 	ldrh	r0, [r10, r3, lsl #1]
 	movs	r1, #1
 	add	r5, r10, r2
@@ -16626,22 +16667,22 @@ FtlMapTblRecovery:
 	strh	r0, [r4, #2]	@ movhi
 	ldr	r3, [r2, r3, lsl #2]
 	str	r3, [r4, #28]
-	ldr	r3, .L2338
-.L2316:
+	ldr	r3, .L2352
+.L2328:
 	sxth	r2, r6
 	cmp	r2, r10
-	ble	.L2319
-.L2332:
+	ble	.L2330
+.L2343:
 	mov	r0, r4
 	bl	ftl_free_no_use_map_blk
-	ldr	r3, .L2338+12
+	ldr	r3, .L2352+12
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L2321
+	bne	.L2332
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L2321:
+.L2332:
 	mov	r0, r4
 	bl	ftl_map_blk_gc
 	mov	r0, r4
@@ -16650,9 +16691,9 @@ FtlMapTblRecovery:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2319:
+.L2330:
 	ldrh	r1, [r5]
-	ldr	r0, .L2338
+	ldr	r0, .L2352
 	str	r3, [sp, #4]
 	orr	r2, r2, r1, lsl #10
 	str	r2, [r3, #4]
@@ -16662,32 +16703,28 @@ FtlMapTblRecovery:
 	ldr	r3, [sp, #4]
 	ldr	r2, [r3]
 	adds	r2, r2, #1
-	beq	.L2317
+	beq	.L2329
 	ldrh	r2, [r7, #8]
 	cmp	fp, r2
-	bls	.L2318
-	ldrh	r0, [r7]
+	bls	.L2329
 	ldrh	r1, [r4, #4]
+	ldrh	r0, [r7]
 	cmp	r0, r1
-	bne	.L2318
-	ldr	r1, [r3, #4]
-	str	r1, [r8, r2, lsl #2]
-.L2318:
+	itt	eq
+	ldreq	r1, [r3, #4]
+	streq	r1, [r8, r2, lsl #2]
+.L2329:
 	adds	r6, r6, #1
-	b	.L2316
-.L2317:
-	ldrh	r2, [r5]
-	strh	r2, [r4, #40]	@ movhi
-	b	.L2318
-.L2315:
+	b	.L2328
+.L2327:
 	ldr	r1, [sp, #8]
 	add	r2, r10, r2
 	str	r2, [sp, #16]
-	ldr	r0, .L2338
+	ldr	r0, .L2352
 	ldr	r1, [r1]
 	str	r1, [r5, #8]
 	ldrh	r1, [r10, r3, lsl #1]
-	ldr	r3, .L2338+12
+	ldr	r3, .L2352+12
 	ldrh	r2, [r3]
 	str	r3, [sp, #20]
 	subs	r2, r2, #1
@@ -16698,27 +16735,27 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	r2, [r5]
 	adds	r2, r2, #1
-	beq	.L2334
+	beq	.L2345
 	ldrh	r1, [r7]
 	ldrh	r2, [r4, #4]
 	ldr	r3, [sp, #20]
 	cmp	r1, r2
-	bne	.L2334
+	bne	.L2345
 	ldrh	r1, [r7, #8]
 	movw	r2, #64245
 	cmp	r1, r2
-	beq	.L2323
-.L2334:
+	beq	.L2334
+.L2345:
 	movs	r3, #0
-.L2324:
-	ldr	r1, .L2338+12
+.L2335:
+	ldr	r1, .L2352+12
 	sxth	r2, r3
 	ldrh	r1, [r1]
 	cmp	r2, r1
-	bge	.L2330
+	bge	.L2341
 	str	r3, [sp, #20]
 	ldr	r3, [sp, #16]
-	ldr	r0, .L2338
+	ldr	r0, .L2352
 	ldrh	r1, [r3]
 	orr	r2, r2, r1, lsl #10
 	str	r2, [r5, #4]
@@ -16728,33 +16765,33 @@ FtlMapTblRecovery:
 	ldr	r2, [r5]
 	ldr	r3, [sp, #20]
 	adds	r2, r2, #1
-	beq	.L2328
+	beq	.L2339
 	ldrh	r2, [r7, #8]
 	cmp	fp, r2
-	bls	.L2328
+	bls	.L2339
 	ldrh	r1, [r4, #4]
 	ldrh	r0, [r7]
 	cmp	r0, r1
 	itt	eq
 	ldreq	r1, [r5, #4]
 	streq	r1, [r8, r2, lsl #2]
-.L2328:
+.L2339:
 	adds	r3, r3, #1
-	b	.L2324
-.L2323:
+	b	.L2335
+.L2334:
 	ldrh	r2, [r3]
 	movs	r1, #0
 	ldr	r3, [sp, #8]
 	subs	r2, r2, #1
 	ldr	ip, [r3]
-.L2325:
+.L2336:
 	sxth	r3, r1
 	cmp	r3, r2
-	blt	.L2327
-.L2330:
+	blt	.L2338
+.L2341:
 	adds	r6, r6, #1
-	b	.L2314
-.L2327:
+	b	.L2326
+.L2338:
 	lsls	r0, r3, #3
 	ldr	r3, [ip, r3, lsl #3]
 	adds	r1, r1, #1
@@ -16765,10 +16802,10 @@ FtlMapTblRecovery:
 	movhi	r3, lr
 	ldrhi	r0, [r0, #4]
 	strhi	r0, [r8, r3, lsl #2]
-	b	.L2325
-.L2339:
+	b	.L2336
+.L2353:
 	.align	2
-.L2338:
+.L2352:
 	.word	.LANCHOR202
 	.word	.LANCHOR183
 	.word	.LANCHOR188
@@ -16786,38 +16823,36 @@ FtlLoadVonderInfo:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L2341
-	ldr	r0, .L2341+4
+	ldr	r3, .L2355
+	ldr	r0, .L2355+4
 	ldrh	r3, [r3]
 	strh	r3, [r0, #10]	@ movhi
 	movw	r3, #61574
 	strh	r3, [r0, #4]	@ movhi
-	ldr	r3, .L2341+8
+	ldr	r3, .L2355+8
 	ldrh	r3, [r3]
 	strh	r3, [r0, #8]	@ movhi
-	ldr	r3, .L2341+12
+	ldr	r3, .L2355+12
 	ldrh	r3, [r3]
 	strh	r3, [r0, #6]	@ movhi
-	ldr	r3, .L2341+16
+	ldr	r3, .L2355+16
 	ldr	r3, [r3]
 	str	r3, [r0, #12]
-	ldr	r3, .L2341+20
+	ldr	r3, .L2355+20
 	ldr	r3, [r3]
 	str	r3, [r0, #16]
-	ldr	r3, .L2341+24
+	ldr	r3, .L2355+24
 	ldr	r3, [r3]
 	str	r3, [r0, #20]
-	ldr	r3, .L2341+28
+	ldr	r3, .L2355+28
 	ldr	r3, [r3]
 	str	r3, [r0, #24]
-	movw	r3, #65535
-	strh	r3, [r0, #40]	@ movhi
 	bl	FtlMapTblRecovery
 	movs	r0, #0
 	pop	{r3, pc}
-.L2342:
+.L2356:
 	.align	2
-.L2341:
+.L2355:
 	.word	.LANCHOR62
 	.word	.LANCHOR215
 	.word	.LANCHOR71
@@ -16840,13 +16875,13 @@ FtlLoadMapInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	FtlL2PDataInit
-	ldr	r0, .L2344
+	ldr	r0, .L2358
 	bl	FtlMapTblRecovery
 	movs	r0, #0
 	pop	{r3, pc}
-.L2345:
+.L2359:
 	.align	2
-.L2344:
+.L2358:
 	.word	.LANCHOR127
 	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
 	.section	.text.FtlGcScanTempBlk,"ax",%progbits
@@ -16860,7 +16895,7 @@ FtlLoadMapInfo:
 FtlGcScanTempBlk:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2373
+	ldr	r3, .L2387
 	movw	r2, #65535
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #24
@@ -16868,71 +16903,71 @@ FtlGcScanTempBlk:
 	ldrh	r4, [r3]
 	str	r3, [sp, #16]
 	cmp	r4, r2
-	beq	.L2364
-	cbnz	r4, .L2347
-.L2348:
+	beq	.L2378
+	cbnz	r4, .L2361
+.L2362:
 	bl	FtlGcPageVarInit
-	b	.L2349
-.L2364:
+	b	.L2363
+.L2378:
 	movs	r4, #0
-.L2347:
-	ldr	r3, .L2373+4
+.L2361:
+	ldr	r3, .L2387+4
 	ldrh	r3, [r3]
 	cmp	r3, r1
-	beq	.L2348
-.L2349:
-	ldr	fp, .L2373+44
+	beq	.L2362
+.L2363:
+	ldr	fp, .L2387+44
 	mov	r3, #-1
 	str	r3, [sp, #8]
-.L2361:
+.L2375:
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	movs	r0, #0
 	strb	r0, [r5, #8]
 	cmp	r2, r3
-	beq	.L2350
-.L2363:
-	ldr	r3, .L2373+8
+	beq	.L2364
+.L2377:
+	ldr	r3, .L2387+8
 	movw	ip, #65535
 	ldr	r0, [fp]
 	mov	lr, #36
 	ldrh	r8, [r3]
-	ldr	r3, .L2373+12
+	ldr	r3, .L2387+12
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L2373+16
+	ldr	r3, .L2387+16
 	ldrh	r10, [r3]
 	add	r3, r5, #16
 	str	r3, [sp, #4]
 	movs	r3, #0
 	mov	r6, r3
-.L2351:
+.L2365:
 	uxth	r2, r3
 	cmp	r8, r2
-	bhi	.L2353
+	bhi	.L2367
 	movs	r7, #0
 	mov	r10, #36
 	movs	r2, #0
 	mov	r1, r6
 	bl	FlashReadPages
-.L2354:
+.L2368:
 	uxth	r3, r7
 	cmp	r6, r3
-	bhi	.L2362
-	ldr	r3, .L2373+4
+	bhi	.L2376
+	ldr	r3, .L2387+4
 	adds	r4, r4, #1
 	uxth	r4, r4
 	ldrh	r3, [r3]
 	cmp	r3, r4
-	bhi	.L2363
+	bhi	.L2377
 	movs	r0, #0
-	b	.L2350
-.L2353:
+	b	.L2364
+.L2367:
 	ldr	r1, [sp, #4]
 	ldrh	r2, [r1], #2
 	cmp	r2, ip
 	str	r1, [sp, #4]
-	beq	.L2352
+	beq	.L2366
 	mla	r1, lr, r6, r0
 	orr	r2, r4, r2, lsl #10
 	str	r2, [r1, #4]
@@ -16946,10 +16981,10 @@ FtlGcScanTempBlk:
 	ldr	r2, [sp, #12]
 	add	r7, r7, r2
 	str	r7, [r1, #12]
-.L2352:
+.L2366:
 	adds	r3, r3, #1
-	b	.L2351
-.L2362:
+	b	.L2365
+.L2376:
 	mul	r8, r10, r7
 	ldr	r2, [fp]
 	str	r2, [sp, #20]
@@ -16962,18 +16997,18 @@ FtlGcScanTempBlk:
 	ldr	r2, [sp, #20]
 	ldr	r1, [sp, #4]
 	ldr	r2, [r2, r8]
-	cbnz	r2, .L2355
+	cbnz	r2, .L2369
 	ldr	r3, [sp, #12]
 	movw	ip, #65535
 	adds	r7, r7, #1
 	ldr	r3, [r3, #12]
 	ldrh	r2, [r3]
 	cmp	r2, ip
-	bne	.L2356
-	ldr	r3, .L2373+20
+	bne	.L2370
+	ldr	r3, .L2387+20
 	movs	r2, #1
 	str	r2, [r3]
-.L2350:
+.L2364:
 	ldr	r2, [sp, #16]
 	movw	r3, #65535
 	strb	r0, [r5, #6]
@@ -16987,41 +17022,41 @@ FtlGcScanTempBlk:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2356:
+.L2370:
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
 	bl	FtlGcUpdatePage
-	b	.L2354
-.L2355:
+	b	.L2368
+.L2369:
 	mov	r2, r1
-	ldr	r0, .L2373+24
+	ldr	r0, .L2387+24
 	ldrh	r1, [r5]
 	bl	printf
-	ldr	r3, .L2373+28
+	ldr	r3, .L2387+28
 	ldrh	r2, [r5]
 	ldr	r3, [r3]
-	cbnz	r3, .L2357
-	ldr	r3, .L2373+32
+	cbnz	r3, .L2371
+	ldr	r3, .L2387+32
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2358
-.L2357:
-	ldr	r3, .L2373+36
+	cbz	r3, .L2372
+.L2371:
+	ldr	r3, .L2387+36
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r2, lsl #1]
 	cmp	r3, #159
-	bls	.L2359
-.L2358:
+	bls	.L2373
+.L2372:
 	ldr	r3, [fp]
 	ldr	r3, [r3, r8]
 	adds	r3, r3, #1
-	bne	.L2360
-.L2359:
+	bne	.L2374
+.L2373:
 	ldr	r3, [fp]
 	add	r3, r3, r8
 	ldr	r3, [r3, #4]
 	str	r3, [sp, #8]
-.L2360:
-	ldr	r3, .L2373+40
+.L2374:
+	ldr	r3, .L2387+40
 	movs	r4, #0
 	ldr	r3, [r3]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
@@ -17030,17 +17065,17 @@ FtlGcScanTempBlk:
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
 	bl	FtlGcPageVarInit
-	b	.L2361
-.L2374:
+	b	.L2375
+.L2388:
 	.align	2
-.L2373:
+.L2387:
 	.word	.LANCHOR226
 	.word	.LANCHOR53
 	.word	.LANCHOR38
 	.word	.LANCHOR106
 	.word	.LANCHOR59
 	.word	.LANCHOR135
-	.word	.LC53
+	.word	.LC52
 	.word	.LANCHOR28
 	.word	.LANCHOR8
 	.word	.LANCHOR79
@@ -17060,18 +17095,18 @@ FlashReadFacBbtData:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	fp, r2
-	ldr	r2, .L2388
+	ldr	r2, .L2402
 	sub	sp, sp, #48
 	mov	r6, r1
 	mov	r4, r0
-	ldr	r7, .L2388+4
+	ldr	r7, .L2402+4
 	ldrh	r3, [r2, #14]
 	ldrh	r2, [r2, #12]
 	smulbb	r3, r3, r2
 	ldr	r2, [r7]
 	uxth	r3, r3
 	str	r2, [sp, #20]
-	ldr	r2, .L2388+8
+	ldr	r2, .L2402+8
 	subs	r5, r3, #1
 	mul	r10, r6, r3
 	uxth	r5, r5
@@ -17079,12 +17114,12 @@ FlashReadFacBbtData:
 	ldr	r1, [r2]
 	mov	r8, r2
 	str	r1, [sp, #24]
-.L2376:
+.L2390:
 	cmp	r3, r5
-	ble	.L2383
+	ble	.L2397
 	mov	r0, #-1
-	b	.L2375
-.L2383:
+	b	.L2389
+.L2397:
 	add	r2, r5, r10
 	add	r0, sp, #12
 	lsls	r2, r2, #10
@@ -17096,60 +17131,60 @@ FlashReadFacBbtData:
 	ldr	r2, [sp, #12]
 	ldr	r3, [sp, #4]
 	adds	r2, r2, #1
-	beq	.L2377
+	beq	.L2391
 	ldr	r2, [r8]
 	ldrh	r1, [r2]
 	movw	r2, #61664
 	cmp	r1, r2
-	bne	.L2377
-	cbz	r4, .L2384
-	cbz	r6, .L2379
-.L2382:
+	bne	.L2391
+	cbz	r4, .L2398
+	cbz	r6, .L2393
+.L2396:
 	mov	r2, fp
 	ldr	r1, [r7]
 	mov	r0, r4
 	bl	ftl_memcpy
 	movs	r3, #4
-	ldr	r0, .L2388+12
+	ldr	r0, .L2402+12
 	mov	r2, r3
 	mov	r1, r4
 	bl	rknand_print_hex
 	movs	r0, #0
-.L2375:
+.L2389:
 	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2379:
+.L2393:
 	ldr	r1, [r7]
 	mov	ip, #1
-	ldr	r5, .L2388+16
-.L2380:
+	ldr	r5, .L2402+16
+.L2394:
 	ldr	r0, [r5]
 	uxth	r3, r6
 	adds	r6, r6, #1
 	cmp	r3, r0
-	bcs	.L2382
+	bcs	.L2396
 	lsrs	r0, r3, #5
 	and	r3, r3, #31
 	lsl	r3, ip, r3
 	ldr	r2, [r1, r0, lsl #2]
 	orrs	r3, r3, r2
 	str	r3, [r1, r0, lsl #2]
-	b	.L2380
-.L2377:
+	b	.L2394
+.L2391:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L2376
-.L2384:
+	b	.L2390
+.L2398:
 	mov	r0, r4
-	b	.L2375
-.L2389:
+	b	.L2389
+.L2403:
 	.align	2
-.L2388:
+.L2402:
 	.word	.LANCHOR15
 	.word	.LANCHOR147
 	.word	.LANCHOR197
-	.word	.LC54
+	.word	.LC53
 	.word	.LANCHOR149
 	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
 	.section	.text.FlashGetBadBlockList,"ax",%progbits
@@ -17165,8 +17200,8 @@ FlashGetBadBlockList:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r5, r0
-	ldr	r3, .L2400
-	ldr	r6, .L2400+4
+	ldr	r3, .L2414
+	ldr	r6, .L2414+4
 	ldr	r3, [r3]
 	ldr	r0, [r6]
 	ldrb	r4, [r3, #13]	@ zero_extendqisi2
@@ -17177,25 +17212,25 @@ FlashGetBadBlockList:
 	asrs	r2, r2, #3
 	bl	FlashReadFacBbtData
 	adds	r0, r0, #1
-	bne	.L2391
-.L2395:
+	bne	.L2405
+.L2409:
 	movs	r3, #0
-.L2392:
+.L2406:
 	movw	r2, #65535
 	movs	r0, #0
 	strh	r2, [r5, r3, lsl #1]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.L2391:
+.L2405:
 	ldr	r7, [r6]
 	movs	r2, #0
 	lsr	ip, r4, #4
 	mov	r3, r2
 	subs	r4, r4, #1
 	mov	lr, #1
-.L2393:
+.L2407:
 	uxth	r1, r2
 	cmp	r1, r4
-	bge	.L2392
+	bge	.L2406
 	lsrs	r6, r1, #5
 	and	r0, r1, #31
 	lsl	r0, lr, r0
@@ -17207,11 +17242,11 @@ FlashGetBadBlockList:
 	strhne	r1, [r5, r3, lsl #1]	@ movhi
 	uxthne	r3, r0
 	cmp	r3, ip
-	bcc	.L2393
-	b	.L2395
-.L2401:
+	bcc	.L2407
+	b	.L2409
+.L2415:
 	.align	2
-.L2400:
+.L2414:
 	.word	.LANCHOR18
 	.word	.LANCHOR153
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
@@ -17226,66 +17261,66 @@ FlashGetBadBlockList:
 FtlMakeBbt:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2422
+	ldr	r3, .L2436
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	ldr	r7, [r3]
 	cmp	r7, #0
-	bne	.L2403
-	ldr	r8, .L2422+40
-	ldr	r4, .L2422+4
+	bne	.L2417
+	ldr	r8, .L2436+40
+	ldr	r4, .L2436+4
 	bl	FtlBbtMemInit
 	sub	r10, r8, #18
 	bl	FtlLoadFactoryBbt
-.L2404:
-	ldr	r3, .L2422+8
+.L2418:
+	ldr	r3, .L2436+8
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	bcc	.L2410
-	ldr	r5, .L2422+12
+	bcc	.L2424
+	ldr	r5, .L2436+12
 	movs	r4, #0
-.L2411:
+.L2425:
 	ldrh	r3, [r5]
 	uxth	r0, r4
 	adds	r4, r4, #1
 	cmp	r3, r0
-	bhi	.L2412
-	ldr	r4, .L2422+16
+	bhi	.L2426
+	ldr	r4, .L2436+16
 	movw	r6, #65535
 	ldrh	r5, [r4, #12]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L2413:
+.L2427:
 	ldrh	r3, [r4, #12]
 	subs	r3, r3, #47
 	cmp	r3, r5
-	bgt	.L2417
+	bgt	.L2431
 	mov	r0, r5
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L2414
+	beq	.L2428
 	mov	r0, r5
 	bl	FlashTestBlk
 	cmp	r0, #0
-	beq	.L2415
+	beq	.L2429
 	mov	r0, r5
 	bl	FtlBbmMapBadBlock
-.L2414:
+.L2428:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L2413
-.L2410:
-	ldr	r3, .L2422+20
+	b	.L2427
+.L2424:
+	ldr	r3, .L2436+20
 	movw	r1, #65535
 	ldrh	r2, [r10, #2]!
 	ldr	r0, [r3]
-	ldr	r3, .L2422+24
+	ldr	r3, .L2436+24
 	cmp	r2, r1
 	str	r0, [r4, #8]
 	ldr	fp, [r3]
 	str	r3, [sp, #4]
-	ldr	r3, .L2422+28
+	ldr	r3, .L2436+28
 	str	fp, [r4, #12]
-	beq	.L2405
+	beq	.L2419
 	ldrh	r6, [r3]
 	mov	r0, r4
 	str	r3, [sp]
@@ -17302,13 +17337,13 @@ FtlMakeBbt:
 	adds	r2, r2, #7
 	asrs	r2, r2, #3
 	bl	ftl_memcpy
-.L2406:
+.L2420:
 	uxth	r0, r6
 	adds	r7, r7, #1
 	add	r8, r8, #4
 	bl	FtlBbmMapBadBlock
-	b	.L2404
-.L2405:
+	b	.L2418
+.L2419:
 	mov	r1, r7
 	str	r3, [sp]
 	bl	FlashGetBadBlockList
@@ -17317,17 +17352,17 @@ FtlMakeBbt:
 	bl	FtlBbt2Bitmap
 	ldr	r3, [sp]
 	ldrh	r5, [r3]
-.L2408:
+.L2422:
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L2407:
+.L2421:
 	ldr	r3, [sp]
 	ldrh	r0, [r3]
 	smlabb	r0, r0, r7, r5
 	uxth	r0, r0
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L2408
+	beq	.L2422
 	ldr	r3, [sp, #4]
 	movs	r2, #16
 	movs	r1, #0
@@ -17347,7 +17382,7 @@ FtlMakeBbt:
 	mla	r6, r7, r6, r3
 	lsls	r3, r6, #10
 	str	r3, [r4, #4]
-	ldr	r3, .L2422+32
+	ldr	r3, .L2436+32
 	ldrh	r2, [r3]
 	lsls	r2, r2, #2
 	bl	ftl_memcpy
@@ -17362,23 +17397,23 @@ FtlMakeBbt:
 	bl	FlashProgPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	bne	.L2406
+	bne	.L2420
 	uxth	r0, r6
 	bl	FtlBbmMapBadBlock
-	b	.L2407
-.L2412:
+	b	.L2421
+.L2426:
 	bl	FtlBbmMapBadBlock
-	b	.L2411
-.L2415:
+	b	.L2425
+.L2429:
 	ldrh	r3, [r4]
 	cmp	r3, r6
-	bne	.L2416
+	bne	.L2430
 	strh	r5, [r4]	@ movhi
-	b	.L2414
-.L2416:
+	b	.L2428
+.L2430:
 	strh	r5, [r4, #4]	@ movhi
-.L2417:
-	ldr	r3, .L2422+36
+.L2431:
+	ldr	r3, .L2436+36
 	movs	r5, #0
 	str	r5, [r4, #8]
 	movs	r2, #2
@@ -17406,14 +17441,14 @@ FtlMakeBbt:
 	strh	r2, [r4]	@ movhi
 	strh	r3, [r4, #4]	@ movhi
 	bl	FtlBbmTblFlush
-.L2403:
+.L2417:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2423:
+.L2437:
 	.align	2
-.L2422:
+.L2436:
 	.word	.LANCHOR77
 	.word	.LANCHOR202
 	.word	.LANCHOR45
@@ -17438,210 +17473,208 @@ log2phys:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L2443
-	str	r1, [sp, #4]
-	ldrh	r5, [r3]
+	ldr	r3, .L2457
 	str	r2, [sp, #8]
-	adds	r3, r5, #7
-	movs	r5, #1
-	lsr	r8, r0, r3
-	lsls	r5, r5, r3
-	ldr	r3, .L2443+4
-	subs	r5, r5, #1
-	uxth	r7, r8
-	ands	r5, r5, r0
+	ldrh	r3, [r3]
+	str	r1, [sp, #4]
+	adds	r2, r3, #7
+	movs	r3, #1
+	lsls	r3, r3, r2
+	lsr	r7, r0, r2
+	subs	r3, r3, #1
+	uxth	r6, r7
+	ands	r3, r3, r0
+	uxth	fp, r3
+	ldr	r3, .L2457+4
 	ldr	r3, [r3]
-	uxth	r5, r5
 	cmp	r0, r3
-	bcc	.L2425
-	ldr	r1, .L2443+8
-	mov	r2, #888
-	ldr	r0, .L2443+12
+	bcc	.L2439
+	ldr	r1, .L2457+8
+	mov	r2, #880
+	ldr	r0, .L2457+12
 	bl	printf
-	ldr	r1, .L2443+16
-	ldr	r0, .L2443+20
+	ldr	r1, .L2457+16
+	ldr	r0, .L2457+20
 	bl	printf
-.L2425:
-	ldr	r6, .L2443+24
+.L2439:
+	ldr	r5, .L2457+24
 	movs	r4, #12
-	ldr	r3, .L2443+28
-	ldr	r1, [r6]
+	ldr	r3, .L2457+28
+	ldr	r1, [r5]
 	ldrh	r2, [r3]
 	movs	r3, #0
-.L2426:
+.L2440:
 	uxth	r10, r3
 	cmp	r10, r2
-	bcc	.L2431
+	bcc	.L2445
 	bl	select_l2p_ram_region
 	muls	r4, r0, r4
-	ldr	r3, [r6]
+	ldr	r3, [r5]
 	mov	r10, r0
 	ldrh	r1, [r3, r4]
 	adds	r2, r3, r4
 	movw	r3, #65535
 	cmp	r1, r3
-	beq	.L2432
+	beq	.L2446
 	ldr	r3, [r2, #4]
 	cmp	r3, #0
-	bge	.L2432
+	bge	.L2446
 	bl	flush_l2p_region
-.L2432:
-	ldr	r3, .L2443+32
-	ldrh	r2, [r3]
-	str	r3, [sp, #12]
-	cmp	r2, r7
-	bcs	.L2433
-	ldr	r1, .L2443+36
+.L2446:
+	ldr	r3, .L2457+32
+	ldrh	r3, [r3]
+	cmp	r3, r6
+	bcs	.L2447
+	ldr	r1, .L2457+36
 	movw	r2, #526
-	ldr	r0, .L2443+12
+	ldr	r0, .L2457+12
 	bl	printf
-	ldr	r1, .L2443+16
-	ldr	r0, .L2443+20
+	ldr	r1, .L2457+16
+	ldr	r0, .L2457+20
 	bl	printf
-.L2433:
-	ldr	r3, .L2443+40
-	uxth	r8, r8
+.L2447:
+	ldr	r3, .L2457+40
+	uxth	r7, r7
 	ldr	r3, [r3]
-	ldr	fp, [r3, r8, lsl #2]
-	cmp	fp, #0
-	bne	.L2434
-	ldr	r3, [r6]
+	ldr	r3, [r3, r7, lsl #2]
+	cmp	r3, #0
+	bne	.L2448
+	ldr	r2, [r5]
 	movs	r1, #255
-	ldr	r2, .L2443+44
-	add	r3, r3, r4
+	str	r3, [sp]
+	adds	r0, r2, r4
+	ldr	r2, .L2457+44
+	ldr	r0, [r0, #8]
 	ldrh	r2, [r2]
-	ldr	r0, [r3, #8]
 	bl	ftl_memset
-	ldr	r3, [r6]
-	adds	r2, r3, r4
-	strh	r7, [r3, r4]	@ movhi
-	str	fp, [r2, #4]
-	b	.L2427
-.L2431:
+	ldr	r2, [r5]
+	ldr	r3, [sp]
+	adds	r1, r2, r4
+	strh	r6, [r2, r4]	@ movhi
+	str	r3, [r1, #4]
+	b	.L2441
+.L2445:
 	adds	r3, r3, #1
 	mla	r0, r4, r3, r1
 	ldrh	r0, [r0, #-12]
-	cmp	r0, r7
-	bne	.L2426
-.L2427:
+	cmp	r0, r6
+	bne	.L2440
+.L2441:
 	ldr	r2, [sp, #8]
 	movs	r3, #12
-	ldr	r1, .L2443+24
-	cbnz	r2, .L2428
+	ldr	r1, .L2457+24
+	cbnz	r2, .L2442
 	ldr	r2, [r1]
 	mla	r3, r3, r10, r2
 	ldr	r2, [sp, #4]
 	ldr	r3, [r3, #8]
-	ldr	r3, [r3, r5, lsl #2]
+	ldr	r3, [r3, fp, lsl #2]
 	str	r3, [r2]
-.L2429:
+.L2443:
 	ldr	r2, [r1]
 	movs	r3, #12
 	mla	r10, r3, r10, r2
 	ldr	r3, [r10, #4]
 	adds	r2, r3, #1
-	beq	.L2440
+	beq	.L2454
 	adds	r3, r3, #1
 	str	r3, [r10, #4]
-.L2440:
+.L2454:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2428:
-	ldr	r2, [r6]
+.L2442:
+	ldr	r2, [r5]
 	mla	r3, r3, r10, r2
 	ldr	r2, [sp, #4]
 	ldr	r0, [r2]
 	ldr	r2, [r3, #8]
-	str	r0, [r2, r5, lsl #2]
+	str	r0, [r2, fp, lsl #2]
 	ldr	r2, [r3, #4]
 	orr	r2, r2, #-2147483648
 	str	r2, [r3, #4]
-	ldr	r3, .L2443+48
-	strh	r7, [r3]	@ movhi
-	b	.L2429
-.L2434:
-	ldr	r2, [r6]
-	ldr	r3, .L2443+52
+	ldr	r3, .L2457+48
+	strh	r6, [r3]	@ movhi
+	b	.L2443
+.L2448:
+	ldr	r2, [r5]
+	ldr	r8, .L2457+80
+	str	r3, [sp, #12]
 	add	r2, r2, r4
 	ldr	r2, [r2, #8]
-	mov	r0, r3
-	str	fp, [r3, #4]
-	str	r3, [sp]
-	str	r2, [r3, #8]
-	ldr	r2, .L2443+56
+	mov	r0, r8
+	str	r3, [r8, #4]
+	str	r2, [r8, #8]
+	ldr	r2, .L2457+52
 	ldr	r2, [r2]
-	str	r2, [r3, #12]
+	str	r2, [r8, #12]
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-	ldr	r3, [sp]
-	ldr	r2, [r3, #12]
-	ldr	r3, [r3]
-	str	r2, [sp]
-	cmp	r3, #256
-	bne	.L2435
-	mov	r2, fp
-	mov	r1, r8
-	ldr	r0, .L2443+60
-	bl	printf
-	ldr	r0, .L2443+64
-	lsr	r3, fp, #10
-	mov	r1, r8
-	strh	r3, [r0, #40]	@ movhi
-	ldr	r3, [r6]
-	add	r3, r3, r4
-	ldr	r2, [r3, #8]
-	bl	FtlMapWritePage
-.L2435:
-	ldr	r3, [sp]
-	ldrh	r3, [r3, #8]
-	cmp	r3, r7
-	beq	.L2436
-	mov	r2, fp
-	mov	r1, r8
-	ldr	r0, .L2443+68
+	ldr	r3, [r8, #12]
+	ldrh	r2, [r3, #8]
+	str	r3, [sp]
+	ldr	r3, [sp, #12]
+	cmp	r2, r6
+	beq	.L2449
+	mov	r2, r3
+	mov	r1, r7
+	ldr	r0, .L2457+56
 	bl	printf
-	ldr	r1, .L2443+52
 	movs	r3, #4
+	ldr	r1, [r8, #12]
 	mov	r2, r3
-	ldr	r0, .L2443+72
-	ldr	r1, [r1, #12]
+	ldr	r0, .L2457+60
 	bl	rknand_print_hex
-	ldr	r3, [sp, #12]
+	ldr	r3, .L2457+32
 	movs	r2, #4
-	ldr	r1, .L2443+40
-	ldr	r0, .L2443+76
+	ldr	r1, .L2457+40
+	ldr	r0, .L2457+64
 	ldrh	r3, [r3]
 	ldr	r1, [r1]
 	bl	rknand_print_hex
-	ldr	r3, .L2443+80
+	ldr	r3, .L2457+68
 	movs	r2, #1
 	str	r2, [r3]
-.L2436:
+.L2450:
 	ldr	r3, [sp]
 	ldrh	r3, [r3, #8]
-	cmp	r3, r7
-	beq	.L2437
-	ldr	r1, .L2443+36
-	movw	r2, #553
-	ldr	r0, .L2443+12
+	cmp	r3, r6
+	beq	.L2451
+	ldr	r1, .L2457+36
+	mov	r2, #552
+	ldr	r0, .L2457+12
 	bl	printf
-	ldr	r1, .L2443+16
-	ldr	r0, .L2443+20
+	ldr	r1, .L2457+16
+	ldr	r0, .L2457+20
 	bl	printf
-.L2437:
-	ldr	r3, .L2443+24
+.L2451:
+	ldr	r3, .L2457+24
 	movs	r1, #0
 	ldr	r3, [r3]
 	adds	r2, r3, r4
 	str	r1, [r2, #4]
-	strh	r7, [r3, r4]	@ movhi
-	b	.L2427
-.L2444:
+	strh	r6, [r3, r4]	@ movhi
+	b	.L2441
+.L2449:
+	ldr	r2, [r8]
+	cmp	r2, #256
+	bne	.L2450
+	mov	r2, r3
+	mov	r1, r7
+	ldr	r0, .L2457+72
+	bl	printf
+	ldr	r3, [r5]
+	mov	r1, r7
+	ldr	r0, .L2457+76
+	add	r3, r3, r4
+	ldr	r2, [r3, #8]
+	bl	FtlMapWritePage
+	b	.L2450
+.L2458:
 	.align	2
-.L2443:
+.L2457:
 	.word	.LANCHOR57
 	.word	.LANCHOR73
 	.word	.LANCHOR227
@@ -17655,14 +17688,14 @@ log2phys:
 	.word	.LANCHOR131
 	.word	.LANCHOR58
 	.word	.LANCHOR98
-	.word	.LANCHOR202
 	.word	.LANCHOR188
-	.word	.LC55
-	.word	.LANCHOR127
-	.word	.LC56
+	.word	.LC54
 	.word	.LC27
-	.word	.LC57
+	.word	.LC55
 	.word	.LANCHOR77
+	.word	.LC56
+	.word	.LANCHOR127
+	.word	.LANCHOR202
 	.size	log2phys, .-log2phys
 	.section	.text.FtlProgPages,"ax",%progbits
 	.align	1
@@ -17677,73 +17710,73 @@ FtlProgPages:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r3
-	ldr	r3, .L2465
+	ldr	r3, .L2479
 	mov	r5, r0
 	mov	r10, r1
 	ldr	r7, [r3]
 	mov	r8, r3
-	cbnz	r7, .L2445
-	ldr	r3, .L2465+4
+	cbnz	r7, .L2459
+	ldr	r3, .L2479+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2460
+	cbz	r3, .L2474
 	ldrb	r6, [r4, #8]	@ zero_extendqisi2
 	subs	r3, r6, #1
 	rsbs	r6, r3, #0
 	adcs	r6, r6, r3
-.L2447:
-	ldr	fp, .L2465+40
+.L2461:
+	ldr	fp, .L2479+40
 	mov	r2, r6
 	ldrb	r3, [r4, #9]	@ zero_extendqisi2
 	mov	r1, r10
 	mov	r0, r5
 	bl	FlashProgPages
-.L2448:
+.L2462:
 	cmp	r7, r10
-	bne	.L2458
-	ldr	r3, .L2465+8
+	bne	.L2472
+	ldr	r3, .L2479+8
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L2445
-	ldr	r1, .L2465+12
+	bcc	.L2459
+	ldr	r1, .L2479+12
 	mov	r2, #1600
-	ldr	r0, .L2465+16
+	ldr	r0, .L2479+16
 	bl	printf
-	ldr	r1, .L2465+20
-	ldr	r0, .L2465+24
+	ldr	r1, .L2479+20
+	ldr	r0, .L2479+24
 	bl	printf
-.L2445:
+.L2459:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2460:
+.L2474:
 	mov	r6, r7
-	b	.L2447
-.L2451:
+	b	.L2461
+.L2465:
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r4]
 	cmp	r3, r0
-	bne	.L2449
+	bne	.L2463
 	ldr	r1, [fp]
 	ldrh	r0, [r4, #4]
 	ldrh	r2, [r1, r3, lsl #1]
 	subs	r2, r2, r0
 	strh	r2, [r1, r3, lsl #1]	@ movhi
-	ldr	r3, .L2465+28
+	ldr	r3, .L2479+28
 	ldrh	r3, [r3]
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [r4, #6]
 	strh	r3, [r4, #4]	@ movhi
-.L2449:
+.L2463:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L2450
+	cbnz	r3, .L2464
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-.L2450:
-	ldr	r2, .L2465+32
+.L2464:
+	ldr	r2, .L2479+32
 	ldr	r3, [r2, #96]
 	adds	r3, r3, #1
 	str	r3, [r2, #96]
@@ -17761,27 +17794,27 @@ FtlProgPages:
 	bl	FlashProgPages
 	ldr	r3, [r8]
 	cmp	r3, #0
-	bne	.L2445
-.L2458:
+	bne	.L2459
+.L2472:
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L2451
-	ldr	r3, .L2465+8
+	beq	.L2465
+	ldr	r3, .L2479+8
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L2452
-	ldr	r1, .L2465+12
+	bcc	.L2466
+	ldr	r1, .L2479+12
 	movw	r2, #1583
-	ldr	r0, .L2465+16
+	ldr	r0, .L2479+16
 	bl	printf
-	ldr	r1, .L2465+20
-	ldr	r0, .L2465+24
+	ldr	r1, .L2479+20
+	ldr	r0, .L2479+24
 	bl	printf
-.L2452:
+.L2466:
 	ldr	r3, [r5, #4]
-	cbnz	r6, .L2453
-.L2464:
+	cbnz	r6, .L2467
+.L2478:
 	movs	r2, #1
 	add	r1, sp, #12
 	ldr	r0, [r5, #16]
@@ -17795,28 +17828,28 @@ FtlProgPages:
 	ldr	r2, [sp, #4]
 	mov	r3, r0
 	adds	r2, r2, #1
-	beq	.L2455
+	beq	.L2469
 	ldr	r2, [fp]
 	ldrh	r2, [r2, r0, lsl #1]
-	cbnz	r2, .L2456
+	cbnz	r2, .L2470
 	mov	r1, r0
 	str	r0, [sp, #4]
-	ldr	r0, .L2465+36
+	ldr	r0, .L2479+36
 	bl	printf
 	ldr	r3, [sp, #4]
-.L2456:
+.L2470:
 	mov	r0, r3
 	bl	decrement_vpc_count
-.L2455:
+.L2469:
 	adds	r7, r7, #1
 	adds	r5, r5, #36
-	b	.L2448
-.L2453:
+	b	.L2462
+.L2467:
 	orr	r3, r3, #-2147483648
-	b	.L2464
-.L2466:
+	b	.L2478
+.L2480:
 	.align	2
-.L2465:
+.L2479:
 	.word	.LANCHOR77
 	.word	.LANCHOR8
 	.word	.LANCHOR38
@@ -17826,7 +17859,7 @@ FtlProgPages:
 	.word	.LC7
 	.word	.LANCHOR53
 	.word	.LANCHOR138
-	.word	.LC58
+	.word	.LC57
 	.word	.LANCHOR84
 	.size	FtlProgPages, .-FtlProgPages
 	.section	.text.FtlCacheWriteBack,"ax",%progbits
@@ -17841,24 +17874,24 @@ FtlCacheWriteBack:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	ldr	r3, .L2472
+	ldr	r3, .L2486
 	ldr	r4, [r3]
-	cbnz	r4, .L2468
-	ldr	r5, .L2472+4
+	cbnz	r4, .L2482
+	ldr	r5, .L2486+4
 	ldr	r0, [r5]
-	cbz	r0, .L2468
-	ldr	r3, .L2472+8
+	cbz	r0, .L2482
+	ldr	r3, .L2486+8
 	mov	r2, r4
 	movs	r1, #1
 	ldr	r3, [r3]
 	bl	FtlProgPages
 	str	r4, [r5]
-.L2468:
+.L2482:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L2473:
+.L2487:
 	.align	2
-.L2472:
+.L2486:
 	.word	.LANCHOR77
 	.word	.LANCHOR132
 	.word	.LANCHOR230
@@ -17875,20 +17908,20 @@ FtlSysFlush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L2476
+	ldr	r3, .L2490
 	ldr	r3, [r3]
-	cbnz	r3, .L2475
+	cbnz	r3, .L2489
 	bl	FtlCacheWriteBack
 	bl	l2p_flush
 	movs	r0, #1
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L2475:
+.L2489:
 	movs	r0, #0
 	pop	{r3, pc}
-.L2477:
+.L2491:
 	.align	2
-.L2476:
+.L2490:
 	.word	.LANCHOR77
 	.size	FtlSysFlush, .-FtlSysFlush
 	.section	.text.FtlDeInit,"ax",%progbits
@@ -17903,17 +17936,17 @@ FtlDeInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L2480
+	ldr	r3, .L2494
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L2479
+	bne	.L2493
 	bl	FtlSysFlush
-.L2479:
+.L2493:
 	movs	r0, #0
 	pop	{r3, pc}
-.L2481:
+.L2495:
 	.align	2
-.L2480:
+.L2494:
 	.word	.LANCHOR231
 	.size	FtlDeInit, .-FtlDeInit
 	.section	.text.rk_ftl_de_init,"ax",%progbits
@@ -17944,28 +17977,28 @@ rk_ftl_de_init:
 ftl_discard:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2498
+	ldr	r3, .L2512
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r5, r2
 	adds	r2, r1, r2
 	mov	r6, r1
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L2491
+	bhi	.L2505
 	cmp	r5, #31
-	bhi	.L2485
-.L2486:
+	bhi	.L2499
+.L2500:
 	movs	r0, #0
-.L2483:
+.L2497:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L2485:
-	ldr	r3, .L2498+4
+.L2499:
+	ldr	r3, .L2512+4
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L2486
-	ldr	r8, .L2498+16
+	bne	.L2500
+	ldr	r8, .L2512+16
 	bl	FtlCacheWriteBack
 	mov	r0, r6
 	ldrh	r4, [r8]
@@ -17975,7 +18008,7 @@ ftl_discard:
 	mov	r7, r0
 	subs	r6, r6, r3
 	uxth	r6, r6
-	cbz	r6, .L2487
+	cbz	r6, .L2501
 	subs	r4, r4, r6
 	adds	r7, r7, #1
 	cmp	r4, r5
@@ -17983,32 +18016,32 @@ ftl_discard:
 	movcs	r4, r5
 	uxth	r4, r4
 	subs	r5, r5, r4
-.L2487:
-	ldr	r4, .L2498+8
+.L2501:
+	ldr	r4, .L2512+8
 	mov	r3, #-1
-	ldr	r6, .L2498+12
+	ldr	r6, .L2512+12
 	str	r3, [sp, #4]
-.L2488:
+.L2502:
 	ldrh	r3, [r8]
 	cmp	r5, r3
-	bcs	.L2490
-	ldr	r3, .L2498+8
+	bcs	.L2504
+	ldr	r3, .L2512+8
 	ldr	r2, [r3]
 	cmp	r2, #32
-	bls	.L2486
+	bls	.L2500
 	movs	r4, #0
 	str	r4, [r3]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L2486
-.L2490:
+	b	.L2500
+.L2504:
 	movs	r2, #0
 	mov	r1, sp
 	mov	r0, r7
 	bl	log2phys
 	ldr	r3, [sp]
 	adds	r3, r3, #1
-	beq	.L2489
+	beq	.L2503
 	ldr	r3, [r4]
 	movs	r2, #1
 	add	r1, sp, #4
@@ -18023,17 +18056,17 @@ ftl_discard:
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L2489:
+.L2503:
 	ldrh	r3, [r8]
 	adds	r7, r7, #1
 	subs	r5, r5, r3
-	b	.L2488
-.L2491:
+	b	.L2502
+.L2505:
 	mov	r0, #-1
-	b	.L2483
-.L2499:
+	b	.L2497
+.L2513:
 	.align	2
-.L2498:
+.L2512:
 	.word	.LANCHOR69
 	.word	.LANCHOR77
 	.word	.LANCHOR232
@@ -18053,60 +18086,60 @@ Ftlscanalldata:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r5, #0
-	ldr	r7, .L2514
+	ldr	r7, .L2528
 	sub	sp, sp, #32
 	movs	r1, #0
-	ldr	r8, .L2514+24
-	ldr	r0, .L2514+4
+	ldr	r8, .L2528+24
+	ldr	r0, .L2528+4
 	bl	printf
-.L2501:
+.L2515:
 	ldr	r3, [r7]
 	cmp	r5, r3
-	bcc	.L2507
+	bcc	.L2521
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L2507:
+.L2521:
 	movs	r2, #0
 	add	r1, sp, #28
 	mov	r0, r5
 	bl	log2phys
 	ubfx	r3, r5, #0, #11
-	cbnz	r3, .L2502
+	cbnz	r3, .L2516
 	ldr	r2, [sp, #28]
 	mov	r1, r5
 	mov	r0, r8
 	bl	printf
-.L2502:
+.L2516:
 	ldr	r3, [sp, #28]
 	adds	r2, r3, #1
-	beq	.L2504
-	ldr	r4, .L2514+8
+	beq	.L2518
+	ldr	r4, .L2528+8
 	movs	r2, #0
 	movs	r1, #1
 	str	r3, [r4, #4]
 	mov	r0, r4
-	ldr	r3, .L2514+12
+	ldr	r3, .L2528+12
 	str	r5, [r4, #16]
 	str	r2, [r4]
 	ldr	r3, [r3]
 	str	r3, [r4, #8]
-	ldr	r3, .L2514+16
+	ldr	r3, .L2528+16
 	ldr	r6, [r3]
 	str	r6, [r4, #12]
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	cmp	r3, #256
-	beq	.L2505
+	beq	.L2519
 	adds	r3, r3, #1
-	beq	.L2505
+	beq	.L2519
 	ldr	r3, [r6, #8]
 	cmp	r5, r3
-	beq	.L2504
-.L2505:
+	beq	.L2518
+.L2519:
 	ldr	r2, [r4, #8]
 	ldr	r3, [r4, #12]
-	ldr	r0, .L2514+20
+	ldr	r0, .L2528+20
 	ldr	r1, [r2, #4]
 	str	r1, [sp, #16]
 	mov	r1, r5
@@ -18121,19 +18154,19 @@ Ftlscanalldata:
 	ldr	r2, [r4, #4]
 	ldr	r3, [r3]
 	bl	printf
-.L2504:
+.L2518:
 	adds	r5, r5, #1
-	b	.L2501
-.L2515:
+	b	.L2515
+.L2529:
 	.align	2
-.L2514:
+.L2528:
 	.word	.LANCHOR73
-	.word	.LC59
+	.word	.LC58
 	.word	.LANCHOR202
 	.word	.LANCHOR183
 	.word	.LANCHOR188
-	.word	.LC61
 	.word	.LC60
+	.word	.LC59
 	.size	Ftlscanalldata, .-Ftlscanalldata
 	.section	.text.FtlReUsePrevPpa,"ax",%progbits
 	.align	1
@@ -18148,7 +18181,7 @@ FtlReUsePrevPpa:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r6, r0
-	ldr	r5, .L2526
+	ldr	r5, .L2540
 	ubfx	r0, r1, #10, #16
 	str	r1, [sp, #4]
 	bl	P2V_block_in_plane
@@ -18156,15 +18189,15 @@ FtlReUsePrevPpa:
 	mov	r7, r0
 	ldrh	r3, [r2, r0, lsl #1]
 	cmp	r3, #0
-	bne	.L2517
-	ldr	r2, .L2526+4
+	bne	.L2531
+	ldr	r2, .L2540+4
 	ldr	r4, [r2]
 	cmp	r4, #0
-	beq	.L2518
-	ldr	r2, .L2526+8
+	beq	.L2532
+	ldr	r2, .L2540+8
 	movw	lr, #65535
-	ldr	ip, .L2526+32
-	ldr	r0, .L2526+12
+	ldr	ip, .L2540+32
+	ldr	r0, .L2540+12
 	ldr	r2, [r2]
 	ldrh	r1, [r0]
 	mov	r8, r0
@@ -18173,25 +18206,25 @@ FtlReUsePrevPpa:
 	mul	r4, ip, r4
 	mov	ip, #6
 	uxth	r4, r4
-.L2519:
+.L2533:
 	uxth	r0, r3
 	cmp	r1, r0
-	bls	.L2518
+	bls	.L2532
 	cmp	r4, r7
-	bne	.L2520
+	bne	.L2534
 	mov	r1, r4
-	ldr	r0, .L2526+4
+	ldr	r0, .L2540+4
 	bl	List_remove_node
 	ldrh	r3, [r8]
-	cbnz	r3, .L2521
-	ldr	r1, .L2526+16
-	movw	r2, #2140
-	ldr	r0, .L2526+20
+	cbnz	r3, .L2535
+	ldr	r1, .L2540+16
+	movw	r2, #2070
+	ldr	r0, .L2540+20
 	bl	printf
-	ldr	r1, .L2526+24
-	ldr	r0, .L2526+28
+	ldr	r1, .L2540+24
+	ldr	r0, .L2540+28
 	bl	printf
-.L2521:
+.L2535:
 	ldrh	r3, [r8]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -18199,17 +18232,17 @@ FtlReUsePrevPpa:
 	bl	INSERT_DATA_LIST
 	ldr	r2, [r5]
 	ldrh	r3, [r2, r7, lsl #1]
-.L2517:
+.L2531:
 	adds	r3, r3, #1
 	strh	r3, [r2, r7, lsl #1]	@ movhi
-	b	.L2518
-.L2520:
+	b	.L2532
+.L2534:
 	mul	r4, ip, r4
 	adds	r3, r3, #1
 	ldrh	r4, [r2, r4]
 	cmp	r4, lr
-	bne	.L2519
-.L2518:
+	bne	.L2533
+.L2532:
 	movs	r2, #1
 	add	r1, sp, #4
 	mov	r0, r6
@@ -18217,9 +18250,9 @@ FtlReUsePrevPpa:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L2527:
+.L2541:
 	.align	2
-.L2526:
+.L2540:
 	.word	.LANCHOR84
 	.word	.LANCHOR88
 	.word	.LANCHOR82
@@ -18247,254 +18280,255 @@ FtlRecoverySuperblock:
 	mov	r10, r0
 	sub	sp, sp, #56
 	cmp	r3, r2
-	beq	.L2689
+	beq	.L2702
 	ldrh	r3, [r0, #2]
 	str	r3, [sp, #12]
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	ldr	r1, [sp, #12]
 	str	r3, [sp, #28]
-	ldr	r3, .L2698
+	ldr	r3, .L2711
 	ldrh	r3, [r3]
 	cmp	r3, r1
 	mov	r3, #0
-	bne	.L2531
+	bne	.L2545
 	strh	r3, [r0, #4]	@ movhi
-.L2696:
+.L2709:
 	strb	r3, [r10, #6]
-.L2689:
+.L2702:
 	movs	r0, #0
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2531:
+.L2545:
 	ldrh	r0, [r0, #16]
-.L2532:
+.L2546:
 	cmp	r0, r2
 	uxth	r5, r3
 	add	r3, r3, #1
-	beq	.L2533
+	beq	.L2547
 	ldrb	r1, [r10, #8]	@ zero_extendqisi2
 	cmp	r1, #1
-	bne	.L2534
+	bne	.L2548
 	bl	FtlGetLastWrittenPage
 	adds	r6, r0, #1
 	mov	r4, r0
-	beq	.L2535
-	ldr	r3, .L2698+4
+	beq	.L2549
+	ldr	r3, .L2711+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L2613
-	ldr	r3, .L2698+8
-	ldrh	r6, [r3, r0, lsl #1]
-.L2536:
-	ldr	r3, .L2698+12
-	movw	lr, #65535
-	mov	r8, #36
-	ldrh	fp, [r3]
-	ldr	r3, .L2698+16
+	bne	.L2626
+	ldr	r3, .L2711+8
+	ldrh	r5, [r3, r0, lsl #1]
+.L2550:
+	ldr	r3, .L2711+12
+	movw	r8, #65535
+	mov	fp, #36
+	ldrh	ip, [r3]
+	ldr	r3, .L2711+16
 	ldr	r0, [r3]
-	ldr	r3, .L2698+20
+	ldr	r3, .L2711+20
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
-	ldr	r3, .L2698+24
-	ldrh	ip, [r3]
+	ldr	r3, .L2711+24
+	ldrh	lr, [r3]
 	add	r3, r10, #16
 	str	r3, [sp, #20]
 	str	r3, [sp, #4]
 	movs	r3, #0
-	mov	r7, r3
-.L2537:
+	mov	r6, r3
+.L2551:
 	uxth	r2, r3
-	cmp	fp, r2
-	bhi	.L2541
+	cmp	ip, r2
+	bhi	.L2555
 	ldrb	r3, [r10, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L2614
-	ldr	r3, .L2698+4
+	bne	.L2627
+	ldr	r3, .L2711+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	adds	r3, r3, #0
 	it	ne
 	movne	r3, #1
-.L2690:
+.L2703:
 	str	r3, [sp, #36]
-	mov	r1, r7
+	mov	r1, r6
 	ldr	r2, [sp, #36]
-	movs	r5, #0
+	movs	r7, #0
 	bl	FlashReadPages
-	ldr	r3, .L2698+28
+	ldr	r3, .L2711+28
 	movw	fp, #65535
-	ldr	r8, .L2698+16
+	ldr	r8, .L2711+16
 	ldr	r3, [r3]
 	subs	r3, r3, #1
 	str	r3, [sp, #4]
-.L2543:
-	uxth	r3, r5
-	cmp	r7, r3
-	bhi	.L2548
-	bne	.L2546
+.L2557:
+	uxth	r3, r7
+	cmp	r6, r3
+	bhi	.L2562
+	bne	.L2560
 	adds	r4, r4, #1
 	uxth	r3, r4
 	str	r3, [sp, #8]
 	ldr	r3, [r8]
 	ldr	r0, [r3, #4]
-.L2691:
+.L2704:
 	ubfx	r0, r0, #10, #16
 	bl	P2V_plane
 	ldrb	r3, [r10, #8]	@ zero_extendqisi2
 	str	r0, [sp, #16]
 	cmp	r3, #1
-	bne	.L2550
-	ldr	r2, .L2698+4
+	bne	.L2564
+	ldr	r2, .L2711+4
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbnz	r2, .L2550
+	cbnz	r2, .L2564
 	ldr	r1, [sp, #8]
-	ldr	r2, .L2698+8
+	ldr	r2, .L2711+8
 	ldrh	r2, [r2, r1, lsl #1]
 	str	r2, [sp, #8]
-.L2550:
-	ldr	r2, .L2698
+.L2564:
+	ldr	r2, .L2711
 	ldr	r1, [sp, #8]
 	ldrh	r2, [r2]
 	cmp	r2, r1
-	bne	.L2551
+	bne	.L2565
 	ldrh	r2, [sp, #8]
 	strh	r2, [r10, #2]	@ movhi
 	movs	r2, #0
 	strb	r2, [r10, #6]
 	strh	r2, [r10, #4]	@ movhi
-.L2551:
+.L2565:
 	ldr	r2, [sp, #8]
 	ldr	r1, [sp, #12]
 	cmp	r2, r1
-	bne	.L2552
+	bne	.L2566
 	ldr	r2, [sp, #16]
 	ldr	r1, [sp, #28]
 	cmp	r2, r1
-	bne	.L2552
-.L2697:
+	bne	.L2566
+.L2710:
 	ldr	r1, [sp, #8]
 	mov	r0, r10
 	bl	ftl_sb_update_avl_pages
-	b	.L2689
-.L2533:
+	b	.L2702
+.L2547:
 	uxth	r1, r3
 	adds	r1, r1, #8
 	ldrh	r0, [r10, r1, lsl #1]
-	b	.L2532
-.L2534:
+	b	.L2546
+.L2548:
 	movs	r1, #0
 	bl	FtlGetLastWrittenPage
 	mov	r4, r0
 	adds	r0, r0, #1
-	beq	.L2535
-.L2613:
-	mov	r6, r4
-	b	.L2536
-.L2535:
+	beq	.L2549
+.L2626:
+	mov	r5, r4
+	b	.L2550
+.L2549:
 	ldr	r3, [sp, #12]
-	cbz	r3, .L2538
-	ldr	r1, .L2698+32
-	movw	r2, #2211
-	ldr	r0, .L2698+36
+	cbz	r3, .L2552
+	ldr	r1, .L2711+32
+	movw	r2, #2141
+	ldr	r0, .L2711+36
 	bl	printf
-	ldr	r1, .L2698+40
-	ldr	r0, .L2698+44
+	ldr	r1, .L2711+40
+	ldr	r0, .L2711+44
 	bl	printf
-.L2538:
+.L2552:
 	ldr	r3, [sp, #28]
-	cbz	r3, .L2539
+	cbz	r3, .L2553
 	cmp	r5, r3
-	beq	.L2539
-	ldr	r1, .L2698+32
-	movw	r2, #2212
-	ldr	r0, .L2698+36
+	beq	.L2553
+	ldr	r1, .L2711+32
+	movw	r2, #2142
+	ldr	r0, .L2711+36
 	bl	printf
-	ldr	r1, .L2698+40
-	ldr	r0, .L2698+44
+	ldr	r1, .L2711+40
+	ldr	r0, .L2711+44
 	bl	printf
-.L2539:
+.L2553:
 	movs	r3, #0
 	strh	r3, [r10, #2]	@ movhi
-	b	.L2696
-.L2541:
+	b	.L2709
+.L2555:
 	ldr	r1, [sp, #4]
 	ldrh	r2, [r1], #2
-	cmp	r2, lr
+	cmp	r2, r8
 	str	r1, [sp, #4]
-	beq	.L2540
-	mla	r1, r8, r7, r0
-	orr	r2, r6, r2, lsl #10
+	beq	.L2554
+	mla	r1, fp, r6, r0
+	orr	r2, r5, r2, lsl #10
 	str	r2, [r1, #4]
 	movs	r2, #0
 	str	r2, [r1, #8]
-	mul	r2, ip, r7
-	adds	r7, r7, #1
-	uxth	r7, r7
+	mul	r2, lr, r6
+	adds	r6, r6, #1
+	uxth	r6, r6
 	bic	r2, r2, #3
-	mov	r5, r2
+	mov	r7, r2
 	ldr	r2, [sp, #8]
-	add	r5, r5, r2
-	str	r5, [r1, #12]
-.L2540:
+	add	r7, r7, r2
+	str	r7, [r1, #12]
+.L2554:
 	adds	r3, r3, #1
-	b	.L2537
-.L2614:
+	b	.L2551
+.L2627:
 	movs	r3, #0
-	b	.L2690
-.L2548:
+	b	.L2703
+.L2562:
 	movs	r3, #36
 	ldr	r1, [r8]
-	muls	r3, r5, r3
+	muls	r3, r7, r3
 	adds	r2, r1, r3
 	ldr	r3, [r1, r3]
-	cbnz	r3, .L2544
+	cbnz	r3, .L2558
 	ldr	r2, [r2, #12]
 	ldr	r3, [r2, #4]
 	adds	r1, r3, #1
-	beq	.L2545
-	ldr	r1, .L2698+28
+	beq	.L2559
+	ldr	r1, .L2711+28
 	mov	r0, r3
 	ldr	r1, [r1]
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L2545
-	ldr	r1, .L2698+28
+	cbz	r0, .L2559
+	ldr	r1, .L2711+28
 	adds	r3, r3, #1
 	str	r3, [r1]
-.L2545:
+.L2559:
 	ldr	r3, [r2]
 	adds	r3, r3, #1
-	bne	.L2547
-.L2546:
+	bne	.L2561
+.L2560:
 	uxth	r3, r4
-	uxth	r5, r5
+	uxth	r7, r7
 	str	r3, [sp, #8]
 	movs	r2, #36
 	ldr	r3, [r8]
-	mla	r5, r2, r5, r3
-	ldr	r0, [r5, #4]
-	b	.L2691
-.L2544:
+	mla	r7, r2, r7, r3
+	ldr	r0, [r7, #4]
+	b	.L2704
+.L2558:
 	ldr	r1, [r2, #4]
-	uxth	fp, r6
-	ldr	r0, .L2698+48
+	uxth	fp, r5
+	ldr	r0, .L2711+48
 	bl	printf
 	ldrh	r2, [r10]
-	ldr	r3, .L2698+52
+	ldr	r3, .L2711+52
 	strh	r2, [r3]	@ movhi
-.L2547:
-	adds	r5, r5, #1
-	b	.L2543
-.L2552:
+.L2561:
+	adds	r7, r7, #1
+	b	.L2557
+.L2566:
 	movw	r2, #65535
 	cmp	fp, r2
-	bne	.L2553
+	bne	.L2567
 	cmp	r3, #0
-	bne	.L2554
-.L2553:
-	ldr	r3, .L2698+56
-	uxth	fp, r6
-	uxth	r6, r6
+	bne	.L2568
+.L2567:
+	ldr	r3, .L2711+56
+	uxth	fp, r5
+	uxth	r5, r5
 	mov	r7, #-1
+	mov	r6, r7
 	ldr	r2, [r3]
 	adds	r2, r2, #1
 	itt	eq
@@ -18504,69 +18538,68 @@ FtlRecoverySuperblock:
 	str	r3, [sp, #24]
 	ldr	r3, [sp, #12]
 	adds	r3, r3, #7
-	cmp	r6, r3
-	mov	r6, r7
+	cmp	r5, r3
 	itet	gt
 	subgt	r4, fp, #7
 	ldrle	r4, [sp, #12]
 	uxthgt	r4, r4
-.L2557:
+.L2571:
 	cmp	r4, fp
-	bhi	.L2572
-	ldr	r3, .L2698+12
+	bhi	.L2586
+	ldr	r3, .L2711+12
 	movw	lr, #65535
 	mov	ip, #36
 	ldrh	r8, [r3]
-	ldr	r3, .L2698+16
+	ldr	r3, .L2711+16
 	ldr	r0, [r3]
 	ldr	r3, [sp, #20]
 	str	r3, [sp, #32]
 	movs	r3, #0
 	mov	r5, r3
-	b	.L2573
-.L2559:
+	b	.L2587
+.L2573:
 	ldr	r1, [sp, #32]
 	ldrh	r2, [r1], #2
 	cmp	r2, lr
 	str	r1, [sp, #32]
-	beq	.L2558
+	beq	.L2572
 	mla	r1, ip, r5, r0
 	adds	r5, r5, #1
 	orr	r2, r4, r2, lsl #10
 	uxth	r5, r5
 	str	r2, [r1, #4]
-.L2558:
+.L2572:
 	adds	r3, r3, #1
-.L2573:
+.L2587:
 	uxth	r2, r3
 	cmp	r8, r2
-	bhi	.L2559
+	bhi	.L2573
 	mov	r1, r5
 	ldr	r2, [sp, #36]
 	bl	FlashReadPages
-	ldr	r2, .L2698+4
+	ldr	r2, .L2711+4
 	movs	r1, #36
-	ldr	r3, .L2698+56
+	ldr	r3, .L2711+56
 	movs	r0, #0
 	movw	ip, #65535
 	ldrb	lr, [r2]	@ zero_extendqisi2
-	ldr	r2, .L2698+16
+	ldr	r2, .L2711+16
 	ldr	r3, [r3]
 	ldr	r2, [r2]
 	mla	r5, r1, r5, r2
-.L2560:
-	cmp	r2, r5
-	bne	.L2570
-	cbz	r0, .L2571
-	ldr	r2, .L2698+56
+.L2574:
+	cmp	r5, r2
+	bne	.L2584
+	cbz	r0, .L2585
+	ldr	r2, .L2711+56
 	str	r3, [r2]
-.L2571:
+.L2585:
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L2557
-.L2699:
+	b	.L2571
+.L2712:
 	.align	2
-.L2698:
+.L2711:
 	.word	.LANCHOR53
 	.word	.LANCHOR8
 	.word	.LANCHOR16
@@ -18579,126 +18612,124 @@ FtlRecoverySuperblock:
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC62
+	.word	.LC61
 	.word	.LANCHOR235
 	.word	.LANCHOR136
-.L2570:
+.L2584:
 	ldr	r1, [r2]
-	cbnz	r1, .L2561
+	cbnz	r1, .L2575
 	ldr	r1, [r2, #12]
 	ldrh	r8, [r1]
 	cmp	r8, ip
-	beq	.L2617
+	beq	.L2630
 	ldr	r1, [r1, #4]
 	cmp	r1, #-1
-	beq	.L2617
+	beq	.L2630
 	adds	r0, r7, #1
-	bne	.L2619
-	ldr	r0, .L2700
+	bne	.L2632
+	ldr	r0, .L2713
 	ldrh	r0, [r0, r4, lsl #1]
 	cmp	r0, ip
-	bne	.L2563
+	bne	.L2577
 	cmp	lr, #0
-	beq	.L2619
-.L2563:
+	beq	.L2632
+.L2577:
 	ldr	r0, [sp, #4]
 	cmp	r0, r3
 	it	ne
 	movne	r7, r3
-.L2619:
+.L2632:
 	movs	r0, #1
-	b	.L2562
-.L2561:
-	cbz	r0, .L2564
-	ldr	r2, .L2700+4
+	b	.L2576
+.L2575:
+	cbz	r0, .L2578
+	ldr	r2, .L2713+4
 	str	r3, [r2]
-.L2564:
-	ldr	r3, .L2700+8
+.L2578:
+	ldr	r3, .L2713+8
 	ldrh	r2, [r10]
 	strh	r2, [r3]	@ movhi
 	ldrb	r3, [r10, #8]	@ zero_extendqisi2
-	cbnz	r3, .L2554
-	ldr	r3, .L2700
+	cbnz	r3, .L2568
+	ldr	r3, .L2713
 	ldrh	r2, [r3, r4, lsl #1]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L2566
+	bne	.L2580
 	adds	r1, r7, #1
-	ldr	r3, .L2700+4
-	beq	.L2567
+	ldr	r3, .L2713+4
+	beq	.L2581
 	str	r7, [r3]
-.L2554:
-	ldr	r3, .L2700+12
+.L2568:
+	ldr	fp, [sp, #12]
 	movs	r2, #1
-	ldr	r0, .L2700+16
-	ldr	r6, .L2700+20
+	ldr	r6, .L2713+12
+	ldr	r3, .L2713+16
 	strh	r2, [r3]	@ movhi
-	bl	FtlMapBlkWriteDumpData
-	ldr	fp, [sp, #12]
-.L2574:
-	ldr	r3, .L2700+24
+.L2588:
+	ldr	r3, .L2713+20
 	movw	ip, #65535
 	ldr	r0, [r6]
 	mov	lr, #36
 	ldr	r1, [sp, #20]
 	movs	r2, #0
 	ldrh	r5, [r3]
-	ldr	r3, .L2700+28
+	ldr	r3, .L2713+24
 	str	r2, [sp, #24]
 	ldrb	r7, [r3]	@ zero_extendqisi2
-.L2575:
+.L2589:
 	uxth	r3, r2
 	cmp	r3, r5
-	bcc	.L2578
+	bcc	.L2592
 	ldr	r2, [sp, #36]
 	ldr	r1, [sp, #24]
 	bl	FlashReadPages
 	movs	r3, #0
-.L2695:
+.L2708:
 	str	r3, [sp, #32]
 	ldr	r2, [sp, #24]
 	ldrh	r3, [sp, #32]
 	cmp	r2, r3
-	bhi	.L2607
+	bhi	.L2620
 	ldrb	r3, [r10, #8]	@ zero_extendqisi2
 	add	fp, fp, #1
 	uxth	fp, fp
 	cmp	r3, #1
-	bne	.L2608
-	ldr	r3, .L2700+28
+	bne	.L2621
+	ldr	r3, .L2713+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2608
-	ldr	r3, .L2700+32
+	cbz	r3, .L2621
+	ldr	r3, .L2713+28
 	ldrh	r3, [r3]
 	cmp	r3, fp
-	bne	.L2608
+	bne	.L2621
 	ldr	r3, [sp, #8]
 	cmp	r3, fp
-	beq	.L2583
-.L2608:
-	ldr	r3, .L2700+36
+	beq	.L2597
+.L2621:
+	ldr	r3, .L2713+32
 	ldrh	r3, [r3]
 	cmp	r3, fp
-	bne	.L2574
-	ldr	r2, .L2700+24
+	bne	.L2588
+	ldr	r2, .L2713+20
 	movw	r0, #65535
 	movs	r3, #0
 	strh	fp, [r10, #2]	@ movhi
 	strh	r3, [r10, #4]	@ movhi
 	ldrh	r2, [r2]
-.L2609:
+.L2622:
 	uxth	r1, r3
 	cmp	r1, r2
-	bcs	.L2689
+	bcs	.L2702
 	ldr	r1, [sp, #20]
 	ldrh	r4, [r1], #2
 	cmp	r4, r0
 	str	r1, [sp, #20]
 	add	r1, r3, #1
-	bne	.L2696
+	bne	.L2709
 	mov	r3, r1
-	b	.L2609
-.L2567:
+	b	.L2622
+.L2581:
 	ldr	r2, [sp, #4]
 	ldr	r1, [sp, #24]
 	cmp	r2, r1
@@ -18706,62 +18737,62 @@ FtlRecoverySuperblock:
 	ldreq	r2, [r3]
 	movne	r2, r1
 	addeq	r2, r2, #-1
-.L2692:
+.L2705:
 	str	r2, [r3]
-	b	.L2554
-.L2566:
+	b	.L2568
+.L2580:
 	ldr	r3, [sp, #4]
 	cmp	r6, r3
-	beq	.L2569
+	beq	.L2583
 	adds	r2, r6, #1
-	beq	.L2554
-	ldr	r3, .L2700+4
+	beq	.L2568
+	ldr	r3, .L2713+4
 	str	r6, [r3]
-	b	.L2554
-.L2569:
-	ldr	r2, .L2700+4
+	b	.L2568
+.L2583:
+	ldr	r2, .L2713+4
 	ldr	r1, [sp, #4]
 	ldr	r3, [r2]
 	cmp	r1, r3
-	beq	.L2554
+	beq	.L2568
 	subs	r3, r3, #1
 	str	r3, [r2]
-	b	.L2554
-.L2617:
+	b	.L2568
+.L2630:
 	mov	r1, r3
 	mov	r3, r6
-.L2562:
+.L2576:
 	mov	r6, r3
 	adds	r2, r2, #36
 	mov	r3, r1
-	b	.L2560
-.L2572:
+	b	.L2574
+.L2586:
 	mov	r2, #-1
-	ldr	r3, .L2700+4
-	b	.L2692
-.L2578:
+	ldr	r3, .L2713+4
+	b	.L2705
+.L2592:
 	ldrh	r3, [r1], #2
 	cmp	r3, ip
-	beq	.L2576
+	beq	.L2590
 	ldr	r4, [sp, #24]
 	orr	r3, fp, r3, lsl #10
 	mla	r4, lr, r4, r0
 	str	r3, [r4, #4]
 	ldrb	r8, [r10, #8]	@ zero_extendqisi2
 	cmp	r8, #1
-	bne	.L2577
-	cbz	r7, .L2577
+	bne	.L2591
+	cbz	r7, .L2591
 	orr	r3, r3, #-2147483648
 	str	r3, [r4, #4]
-.L2577:
+.L2591:
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	str	r3, [sp, #24]
-.L2576:
+.L2590:
 	adds	r2, r2, #1
-	b	.L2575
-.L2607:
+	b	.L2589
+.L2620:
 	ldr	r3, [sp, #32]
 	movs	r5, #36
 	ldr	r8, [r6]
@@ -18773,49 +18804,45 @@ FtlRecoverySuperblock:
 	bl	P2V_plane
 	ldr	r3, [sp, #12]
 	cmp	fp, r3
-	bcc	.L2580
-	bne	.L2581
+	bcc	.L2594
+	bne	.L2595
 	ldr	r3, [sp, #28]
 	cmp	r3, r0
-	bhi	.L2580
-.L2581:
+	bhi	.L2594
+.L2595:
 	ldr	r3, [sp, #8]
 	cmp	fp, r3
-	bne	.L2582
+	bne	.L2596
 	ldr	r3, [sp, #16]
 	cmp	r3, r0
-	beq	.L2583
-.L2582:
+	beq	.L2597
+.L2596:
 	ldr	r3, [r8, r5]
 	adds	r3, r3, #1
-	beq	.L2584
+	beq	.L2598
 	ldr	r3, [r7, #12]
 	movw	r2, #61589
 	ldrh	r1, [r3]
 	cmp	r1, r2
-	beq	.L2585
-.L2591:
+	beq	.L2599
 	ldrh	r0, [r10]
-.L2694:
+.L2706:
 	bl	decrement_vpc_count
-.L2580:
-	ldr	r3, [sp, #32]
-	adds	r3, r3, #1
-	b	.L2695
-.L2585:
+	b	.L2594
+.L2599:
 	ldr	r2, [r3, #4]
 	str	r2, [sp, #4]
 	adds	r2, r2, #1
-	beq	.L2586
-	ldr	r2, .L2700+40
+	beq	.L2600
+	ldr	r2, .L2713+36
 	ldr	r0, [sp, #4]
 	ldr	r1, [r2]
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L2586
+	cbz	r0, .L2600
 	ldr	r1, [sp, #4]
 	adds	r1, r1, #1
 	str	r1, [r2]
-.L2586:
+.L2600:
 	ldr	r4, [r3, #8]
 	add	r1, sp, #48
 	ldr	r3, [r3, #12]
@@ -18823,17 +18850,17 @@ FtlRecoverySuperblock:
 	mov	r0, r4
 	str	r3, [sp, #44]
 	bl	log2phys
-	ldr	r3, .L2700+4
+	ldr	r3, .L2713+4
 	ldr	r1, [r3]
 	adds	r3, r1, #1
-	beq	.L2587
+	beq	.L2601
 	ldr	r0, [sp, #4]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L2587
+	beq	.L2601
 	ldr	r3, [sp, #44]
 	adds	r7, r3, #1
-	beq	.L2588
+	beq	.L2602
 	ldr	r0, [r6]
 	movs	r2, #0
 	movs	r1, #1
@@ -18845,58 +18872,78 @@ FtlRecoverySuperblock:
 	ldr	r1, [r2, r5]
 	adds	r3, r2, r5
 	adds	r1, r1, #1
-	bne	.L2589
-.L2590:
+	bne	.L2603
+.L2604:
 	mov	r3, #-1
-	ldrh	r0, [r10]
 	str	r3, [sp, #44]
-	bl	decrement_vpc_count
-.L2598:
+.L2611:
 	ldr	r7, [sp, #44]
 	adds	r0, r7, #1
-	beq	.L2580
-.L2612:
+	beq	.L2594
+.L2625:
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L2700+44
+	ldr	r3, .L2713+40
 	mov	r4, r0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bhi	.L2603
-	ldr	r1, .L2700+48
-	movw	r2, #2494
-	ldr	r0, .L2700+52
+	bhi	.L2616
+	ldr	r1, .L2713+44
+	movw	r2, #2425
+	ldr	r0, .L2713+48
 	bl	printf
-	ldr	r1, .L2700+56
-	ldr	r0, .L2700+60
+	ldr	r1, .L2713+52
+	ldr	r0, .L2713+56
 	bl	printf
-.L2603:
-	ldr	r3, .L2700+64
+.L2616:
+	ldr	r3, .L2713+60
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
 	cmp	r3, #0
-	beq	.L2604
+	beq	.L2617
 	mov	r0, r4
-	b	.L2694
-.L2588:
+	b	.L2706
+.L2602:
 	ldr	r3, [sp, #52]
 	ldr	r2, [sp, #48]
 	cmp	r2, r3
-	bne	.L2591
+	bne	.L2594
 	movs	r2, #1
 	add	r1, sp, #44
 	mov	r0, r4
 	bl	log2phys
-	b	.L2591
-.L2701:
+.L2594:
+	ldr	r3, [sp, #32]
+	adds	r3, r3, #1
+	b	.L2708
+.L2603:
+	ldr	r1, [r7, #8]
+	cmp	r4, r1
+	bne	.L2604
+	ldr	r8, [r7, #4]
+	ldr	r0, .L2713+4
+	mov	r1, r8
+	ldr	r0, [r0]
+	bl	ftl_cmp_data_ver
+	cmp	r0, #0
+	beq	.L2604
+	ldr	r1, [sp, #48]
+	ldr	r0, [sp, #52]
+	cmp	r1, r0
+	bne	.L2606
+.L2609:
+	ldr	r1, [sp, #44]
+	mov	r0, r4
+	bl	FtlReUsePrevPpa
+	b	.L2604
+.L2714:
 	.align	2
-.L2700:
+.L2713:
 	.word	.LANCHOR120
 	.word	.LANCHOR136
 	.word	.LANCHOR235
-	.word	.LANCHOR236
-	.word	.LANCHOR127
 	.word	.LANCHOR180
+	.word	.LANCHOR236
 	.word	.LANCHOR38
 	.word	.LANCHOR8
 	.word	.LANCHOR54
@@ -18908,89 +18955,69 @@ FtlRecoverySuperblock:
 	.word	.LC6
 	.word	.LC7
 	.word	.LANCHOR84
-.L2589:
-	ldr	r1, [r7, #8]
-	cmp	r4, r1
-	bne	.L2590
-	ldr	r8, [r7, #4]
-	ldr	r0, .L2702
-	mov	r1, r8
-	ldr	r0, [r0]
-	bl	ftl_cmp_data_ver
-	cmp	r0, #0
-	beq	.L2590
-	ldr	r1, [sp, #48]
-	ldr	r0, [sp, #52]
-	cmp	r1, r0
-	bne	.L2593
-.L2596:
-	ldr	r1, [sp, #44]
-	mov	r0, r4
-	bl	FtlReUsePrevPpa
-	b	.L2590
-.L2593:
+.L2606:
 	ldr	r0, [sp, #44]
 	cmp	r1, r0
-	beq	.L2590
+	beq	.L2604
 	adds	r0, r1, #1
-	beq	.L2594
+	beq	.L2607
 	str	r1, [r3, #4]
 	movs	r2, #0
 	movs	r1, #1
 	mov	r0, r3
 	ldr	r7, [r3, #12]
 	bl	FlashReadPages
-.L2595:
+.L2608:
 	ldr	r3, [r6]
 	ldr	r3, [r3, r5]
 	adds	r3, r3, #1
-	beq	.L2596
+	beq	.L2609
 	ldr	r3, [r7, #4]
-	ldr	r2, .L2702
+	ldr	r2, .L2715
 	mov	r1, r3
 	ldr	r0, [r2]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L2596
+	beq	.L2609
 	mov	r1, r3
 	mov	r0, r8
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L2590
-	b	.L2596
-.L2594:
+	beq	.L2604
+	b	.L2609
+.L2607:
 	str	r1, [r2, r5]
-	b	.L2595
-.L2587:
+	b	.L2608
+.L2601:
 	ldr	r3, [sp, #52]
 	ldr	r2, [sp, #48]
 	cmp	r2, r3
-	beq	.L2598
+	beq	.L2611
 	movs	r2, #1
 	add	r1, sp, #52
 	mov	r0, r4
 	bl	log2phys
 	ldr	r7, [sp, #48]
 	adds	r5, r7, #1
-	beq	.L2598
+	beq	.L2611
 	ldr	r3, [sp, #44]
 	cmp	r7, r3
-	beq	.L2612
+	beq	.L2625
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L2702+4
+	ldr	r3, .L2715+4
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L2602
-	ldr	r3, .L2702+8
+	beq	.L2615
+	ldr	r3, .L2715+8
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L2602
-	ldr	r3, .L2702+12
+	beq	.L2615
+	ldr	r3, .L2715+12
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L2598
-.L2602:
+	bne	.L2611
+.L2615:
 	ldr	r0, [r6]
 	movs	r2, #0
 	movs	r1, #1
@@ -19000,73 +19027,73 @@ FtlRecoverySuperblock:
 	ldr	r3, [r6]
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L2598
+	beq	.L2611
 	ldr	r1, [r5, #4]
 	ldr	r0, [sp, #4]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	bne	.L2598
+	bne	.L2611
 	movs	r2, #1
 	add	r1, sp, #48
 	mov	r0, r4
 	bl	log2phys
-	b	.L2598
-.L2604:
+	b	.L2611
+.L2617:
 	mov	r1, r4
-	ldr	r0, .L2702+16
+	ldr	r0, .L2715+16
 	bl	printf
-	b	.L2580
-.L2584:
+	b	.L2594
+.L2598:
 	ldrh	r3, [r10]
 	mov	r1, r4
-	ldr	r2, .L2702+20
-	ldr	r0, .L2702+24
+	ldr	r2, .L2715+20
+	ldr	r0, .L2715+24
 	strh	r3, [r2]	@ movhi
 	ldr	r2, [sp, #4]
 	bl	printf
-	ldr	r2, .L2702+28
+	ldr	r2, .L2715+28
 	ldr	r3, [r2]
 	cmp	r3, #31
-	bhi	.L2605
+	bhi	.L2618
 	ldr	r0, [sp, #52]
-	ldr	r1, .L2702+32
+	ldr	r1, .L2715+32
 	str	r0, [r1, r3, lsl #2]
 	adds	r3, r3, #1
 	str	r3, [r2]
-.L2605:
+.L2618:
 	ldrh	r0, [r10]
 	bl	decrement_vpc_count
-	ldr	r3, .L2702
+	ldr	r3, .L2715
 	ldr	r2, [r3]
 	adds	r1, r2, #1
-	bne	.L2606
+	bne	.L2619
 	ldr	r2, [sp, #4]
-.L2693:
+.L2707:
 	str	r2, [r3]
-	b	.L2580
-.L2606:
+	b	.L2594
+.L2619:
 	ldr	r1, [sp, #4]
 	cmp	r1, r2
-	bcs	.L2580
+	bcs	.L2594
 	mov	r2, r1
-	b	.L2693
-.L2583:
+	b	.L2707
+.L2597:
 	ldrb	r3, [sp, #16]	@ zero_extendqisi2
 	ldr	r2, [sp, #16]
 	strb	r3, [r10, #6]
 	ldrh	r3, [sp, #8]
 	strh	r3, [r10, #2]	@ movhi
-	b	.L2697
-.L2703:
+	b	.L2710
+.L2716:
 	.align	2
-.L2702:
+.L2715:
 	.word	.LANCHOR136
 	.word	.LANCHOR92
 	.word	.LANCHOR93
 	.word	.LANCHOR94
-	.word	.LC63
+	.word	.LC62
 	.word	.LANCHOR235
-	.word	.LC64
+	.word	.LC63
 	.word	.LANCHOR237
 	.word	.LANCHOR238
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
@@ -19082,42 +19109,42 @@ FtlGcFreeTempBlock:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L2727
+	ldr	r3, .L2740
 	ldr	r3, [r3]
-	cbz	r3, .L2705
-.L2710:
+	cbz	r3, .L2718
+.L2723:
 	movs	r0, #0
-.L2704:
+.L2717:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2705:
-	ldr	r0, .L2727+4
+.L2718:
+	ldr	r0, .L2740+4
 	movw	r3, #65535
-	ldr	r5, .L2727+8
+	ldr	r5, .L2740+8
 	ldrh	r6, [r0]
 	mov	r4, r0
 	cmp	r6, r3
-	beq	.L2707
-	ldr	r3, .L2727+12
+	beq	.L2720
+	ldr	r3, .L2740+12
 	ldrh	r1, [r3]
 	bl	FtlGcScanTempBlk
 	str	r0, [sp, #12]
 	adds	r0, r0, #1
-	beq	.L2707
-	ldr	r3, .L2727+16
+	beq	.L2720
+	ldr	r3, .L2740+16
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r6, lsl #1]
 	cmp	r3, #4
-	bls	.L2708
+	bls	.L2721
 	subs	r3, r3, #5
 	movs	r0, #1
 	strh	r3, [r2, r6, lsl #1]	@ movhi
 	bl	FtlEctTblFlush
-.L2708:
+.L2721:
 	ldr	r3, [r5]
-	cbnz	r3, .L2709
-	ldr	r2, .L2727+20
+	cbnz	r3, .L2722
+	ldr	r2, .L2740+20
 	ldr	r0, [sp, #12]
 	ldr	r3, [r2, #96]
 	ubfx	r0, r0, #10, #16
@@ -19125,73 +19152,73 @@ FtlGcFreeTempBlock:
 	str	r3, [r2, #96]
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
-.L2709:
+.L2722:
 	movs	r3, #0
 	movs	r0, #1
 	str	r3, [r5]
-	b	.L2704
-.L2707:
+	b	.L2717
+.L2720:
 	ldrh	r2, [r4]
 	movs	r3, #0
 	str	r3, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2710
-	ldr	r6, .L2727+12
+	beq	.L2723
+	ldr	r6, .L2740+12
 	bl	FtlCacheWriteBack
 	ldrb	r0, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r6]
-	ldr	r5, .L2727+24
+	ldr	r5, .L2740+24
 	muls	r2, r0, r2
 	ldrh	r1, [r5]
 	cmp	r1, r2
-	beq	.L2711
-	ldr	r1, .L2727+28
+	beq	.L2724
+	ldr	r1, .L2740+28
 	movs	r2, #163
-	ldr	r0, .L2727+32
+	ldr	r0, .L2740+32
 	bl	printf
-	ldr	r1, .L2727+36
-	ldr	r0, .L2727+40
+	ldr	r1, .L2740+36
+	ldr	r0, .L2740+40
 	bl	printf
-.L2711:
+.L2724:
 	ldrh	r6, [r6]
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	ldr	r2, .L2727+44
+	ldr	r2, .L2740+44
 	ldrh	r0, [r4]
-	ldr	fp, .L2727+84
+	ldr	fp, .L2740+84
 	smulbb	r3, r3, r6
 	ldr	r1, [r2]
 	movs	r6, #0
 	str	r2, [sp, #4]
 	strh	r3, [r1, r0, lsl #1]	@ movhi
-	ldr	r1, .L2727+48
+	ldr	r1, .L2740+48
 	ldrh	r3, [r5]
 	ldr	r0, [r1]
 	add	r3, r3, r0
 	str	r3, [r1]
-.L2712:
+.L2725:
 	ldrh	r2, [r5]
 	uxth	r3, r6
 	cmp	r2, r3
-	bhi	.L2716
+	bhi	.L2729
 	movw	r0, #65535
 	bl	decrement_vpc_count
-	ldr	r3, .L2727+52
+	ldr	r3, .L2740+52
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2717
+	cbz	r3, .L2730
 	ldrh	r1, [r4]
-	ldr	r0, .L2727+56
+	ldr	r0, .L2740+56
 	bl	printf
-.L2717:
+.L2730:
 	ldr	r3, [sp, #4]
 	ldrh	r0, [r4]
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	beq	.L2718
+	beq	.L2731
 	bl	INSERT_DATA_LIST
-.L2719:
-	ldr	r3, .L2727+60
+.L2732:
+	ldr	r3, .L2740+60
 	movw	r6, #65535
 	strh	r6, [r4]	@ movhi
 	movs	r4, #0
@@ -19199,39 +19226,39 @@ FtlGcFreeTempBlock:
 	strh	r4, [r3]	@ movhi
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	ldr	r3, .L2727+64
+	ldr	r3, .L2740+64
+	strh	r6, [r3]	@ movhi
+	ldr	r3, .L2740+68
 	ldrh	r2, [r3]
-	ldr	r3, .L2727+68
+	ldr	r3, .L2740+72
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, asr #2
-	ble	.L2710
-	ldr	r3, .L2727+72
+	ble	.L2723
+	ldr	r3, .L2740+76
 	movs	r2, #20
 	mov	r0, r4
-	strh	r6, [r3]	@ movhi
-	ldr	r3, .L2727+76
 	strh	r2, [r3]	@ movhi
-	b	.L2704
-.L2716:
+	b	.L2717
+.L2729:
 	uxth	r3, r6
 	movs	r7, #12
 	ldr	r2, [fp]
 	muls	r7, r3, r7
-	ldr	r3, .L2727+80
+	ldr	r3, .L2740+80
 	ldr	r8, [r3]
 	add	r10, r8, r7
 	ldr	r1, [r10, #8]
 	cmp	r1, r2
-	bcc	.L2713
-	ldr	r1, .L2727+28
+	bcc	.L2726
+	ldr	r1, .L2740+28
 	movs	r2, #168
-	ldr	r0, .L2727+32
+	ldr	r0, .L2740+32
 	bl	printf
-	ldr	r1, .L2727+36
-	ldr	r0, .L2727+40
+	ldr	r1, .L2740+36
+	ldr	r0, .L2740+40
 	bl	printf
-.L2713:
+.L2726:
 	movs	r2, #0
 	add	r1, sp, #12
 	ldr	r0, [r10, #8]
@@ -19239,7 +19266,7 @@ FtlGcFreeTempBlock:
 	ldr	r2, [sp, #12]
 	ldr	r0, [r8, r7]
 	cmp	r0, r2
-	bne	.L2714
+	bne	.L2727
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	movs	r2, #1
@@ -19248,23 +19275,23 @@ FtlGcFreeTempBlock:
 	ldr	r0, [r10, #8]
 	bl	log2phys
 	mov	r0, r7
-.L2726:
+.L2739:
 	bl	decrement_vpc_count
-.L2715:
+.L2728:
 	adds	r6, r6, #1
-	b	.L2712
-.L2714:
+	b	.L2725
+.L2727:
 	ldr	r3, [r10, #4]
 	cmp	r2, r3
-	beq	.L2715
+	beq	.L2728
 	ldrh	r0, [r4]
-	b	.L2726
-.L2718:
+	b	.L2739
+.L2731:
 	bl	INSERT_FREE_LIST
-	b	.L2719
-.L2728:
+	b	.L2732
+.L2741:
 	.align	2
-.L2727:
+.L2740:
 	.word	.LANCHOR77
 	.word	.LANCHOR94
 	.word	.LANCHOR135
@@ -19279,11 +19306,11 @@ FtlGcFreeTempBlock:
 	.word	.LANCHOR84
 	.word	.LANCHOR161
 	.word	.LANCHOR8
-	.word	.LC65
+	.word	.LC64
 	.word	.LANCHOR110
+	.word	.LANCHOR204
 	.word	.LANCHOR89
 	.word	.LANCHOR223
-	.word	.LANCHOR204
 	.word	.LANCHOR176
 	.word	.LANCHOR112
 	.word	.LANCHOR73
@@ -19300,27 +19327,27 @@ FtlGcPageRecovery:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	ldr	r4, .L2731
-	ldr	r5, .L2731+4
+	ldr	r4, .L2744
+	ldr	r5, .L2744+4
 	ldrh	r1, [r4]
 	mov	r0, r5
 	bl	FtlGcScanTempBlk
 	ldrh	r2, [r5, #2]
 	ldrh	r3, [r4]
 	cmp	r2, r3
-	bcc	.L2729
-	ldr	r0, .L2731+8
+	bcc	.L2742
+	ldr	r0, .L2744+8
 	bl	FtlMapBlkWriteDumpData
 	movs	r0, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r3, .L2731+12
+	ldr	r3, .L2744+12
 	movs	r2, #0
 	str	r2, [r3]
-.L2729:
+.L2742:
 	pop	{r3, r4, r5, pc}
-.L2732:
+.L2745:
 	.align	2
-.L2731:
+.L2744:
 	.word	.LANCHOR53
 	.word	.LANCHOR94
 	.word	.LANCHOR127
@@ -19339,13 +19366,13 @@ FtlPowerLostRecovery:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #0
-	ldr	r5, .L2734
-	ldr	r3, .L2734+4
+	ldr	r5, .L2747
+	ldr	r3, .L2747+4
 	mov	r0, r5
 	str	r4, [r3]
 	bl	FtlRecoverySuperblock
 	mov	r0, r5
-	ldr	r5, .L2734+8
+	ldr	r5, .L2747+8
 	bl	FtlSlcSuperblockCheck
 	mov	r0, r5
 	bl	FtlRecoverySuperblock
@@ -19356,9 +19383,9 @@ FtlPowerLostRecovery:
 	bl	decrement_vpc_count
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L2735:
+.L2748:
 	.align	2
-.L2734:
+.L2747:
 	.word	.LANCHOR92
 	.word	.LANCHOR237
 	.word	.LANCHOR93
@@ -19376,30 +19403,30 @@ FtlSysBlkInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r3, #0
-	ldr	r4, .L2746
+	ldr	r4, .L2758
 	movw	r5, #65535
 	strh	r3, [r4]	@ movhi
-	ldr	r3, .L2746+4
+	ldr	r3, .L2758+4
 	strh	r5, [r3]	@ movhi
-	ldr	r3, .L2746+8
+	ldr	r3, .L2758+8
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlScanSysBlk
-	ldr	r3, .L2746+12
+	ldr	r3, .L2758+12
 	ldrh	r3, [r3]
 	cmp	r3, r5
 	mov	r5, r4
-	bne	.L2737
-.L2739:
+	bne	.L2750
+.L2752:
 	mov	r4, #-1
-.L2736:
+.L2749:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, pc}
-.L2737:
+.L2750:
 	bl	FtlLoadSysInfo
 	mov	r4, r0
 	cmp	r0, #0
-	bne	.L2739
+	bne	.L2752
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -19409,65 +19436,65 @@ FtlSysBlkInit:
 	bl	FtlPowerLostRecovery
 	movs	r0, #1
 	bl	FtlUpdateVaildLpn
-	ldr	r3, .L2746+16
+	ldr	r3, .L2758+16
 	movs	r0, #12
 	ldrh	r2, [r3]
-	ldr	r3, .L2746+20
+	ldr	r3, .L2758+20
 	ldr	r1, [r3]
 	mov	r3, r4
-.L2740:
+.L2753:
 	cmp	r3, r2
-	blt	.L2742
+	blt	.L2755
 	ldrh	r3, [r5]
 	cmp	r3, #0
-	beq	.L2736
-.L2741:
-	ldr	r3, .L2746+24
+	beq	.L2756
+.L2754:
+	ldr	r3, .L2758+24
 	ldr	r1, [r3]
-	ldr	r3, .L2746+28
+	ldr	r3, .L2758+28
 	ldrh	r0, [r3]
 	ldrh	r5, [r3, #4]
 	ldrh	r2, [r1, r0, lsl #1]
 	subs	r2, r2, r5
-	ldr	r5, .L2746+32
+	ldr	r5, .L2758+32
 	strh	r2, [r1, r0, lsl #1]	@ movhi
 	ldrh	r2, [r5]
 	strh	r2, [r3, #2]	@ movhi
 	movs	r2, #0
 	strh	r2, [r3, #4]	@ movhi
 	strb	r2, [r3, #6]
-	ldr	r3, .L2746+36
+	ldr	r3, .L2758+36
 	ldrh	r6, [r3]
 	ldrh	r7, [r3, #4]
 	ldrh	r0, [r1, r6, lsl #1]
 	subs	r0, r0, r7
 	strh	r0, [r1, r6, lsl #1]	@ movhi
-	ldrh	r1, [r5]
-	ldr	r0, .L2746+40
 	strb	r2, [r3, #6]
-	strh	r1, [r3, #2]	@ movhi
+	ldrh	r1, [r5]
 	strh	r2, [r3, #4]	@ movhi
-	bl	FtlMapBlkWriteDumpData
-	ldr	r0, .L2746+44
-	bl	FtlMapBlkWriteDumpData
-	ldr	r2, .L2746+48
+	ldr	r2, .L2758+40
+	strh	r1, [r3, #2]	@ movhi
 	ldrh	r3, [r2, #30]
 	adds	r3, r3, #1
 	strh	r3, [r2, #30]	@ movhi
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
+.L2757:
 	bl	FtlVpcTblFlush
-	b	.L2736
-.L2742:
+	b	.L2749
+.L2755:
 	mla	r6, r0, r3, r1
 	ldr	r6, [r6, #4]
 	cmp	r6, #0
-	blt	.L2741
+	blt	.L2754
 	adds	r3, r3, #1
-	b	.L2740
-.L2747:
+	b	.L2753
+.L2756:
+	bl	l2p_flush
+	b	.L2757
+.L2759:
 	.align	2
-.L2746:
+.L2758:
 	.word	.LANCHOR236
 	.word	.LANCHOR235
 	.word	.LANCHOR39
@@ -19478,8 +19505,6 @@ FtlSysBlkInit:
 	.word	.LANCHOR92
 	.word	.LANCHOR53
 	.word	.LANCHOR93
-	.word	.LANCHOR127
-	.word	.LANCHOR215
 	.word	.LANCHOR81
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.section	.text.FtlLowFormat,"ax",%progbits
@@ -19493,87 +19518,87 @@ FtlSysBlkInit:
 FtlLowFormat:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2779
+	ldr	r3, .L2791
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #24
 	ldr	r4, [r3]
 	cmp	r4, #0
-	bne	.L2750
-	ldr	r5, .L2779+4
+	bne	.L2762
+	ldr	r5, .L2791+4
 	mov	r1, r4
-	ldr	r3, .L2779+8
-	ldr	r6, .L2779+12
+	ldr	r3, .L2791+8
+	ldr	r6, .L2791+12
 	ldrh	r2, [r5]
 	ldr	r0, [r3]
 	lsls	r2, r2, #2
 	bl	ftl_memset
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L2779+16
-	ldr	r5, .L2779+20
+	ldr	r3, .L2791+16
+	ldr	r5, .L2791+20
 	lsls	r2, r2, #2
 	ldr	r0, [r3]
 	bl	ftl_memset
-	ldr	r3, .L2779+24
+	ldr	r3, .L2791+24
 	ldrh	r0, [r6]
 	str	r4, [r5]
 	str	r4, [r3]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	r0, .L2751
+	cbz	r0, .L2763
 	bl	FtlMakeBbt
-.L2751:
-	ldr	r3, .L2779+28
-	ldr	r2, .L2779+32
-	ldr	ip, .L2779+112
+.L2763:
+	ldr	r3, .L2791+28
+	ldr	r2, .L2791+32
+	ldr	ip, .L2791+112
 	ldrh	r1, [r3]
 	ldr	r4, [r2]
-	ldr	r2, .L2779+36
+	ldr	r2, .L2791+36
 	str	r3, [sp, #12]
 	lsls	r1, r1, #7
 	ldr	r7, [r2]
 	movs	r2, #0
-.L2752:
+.L2764:
 	uxth	r3, r2
 	adds	r2, r2, #1
 	cmp	r3, r1
-	blt	.L2753
-	ldr	r3, .L2779+40
+	blt	.L2765
+	ldr	r3, .L2791+40
 	movs	r7, #0
-	ldr	fp, .L2779+116
+	ldr	fp, .L2791+116
 	ldrh	r4, [r3]
 	mov	r8, r3
 	mov	r10, fp
-.L2754:
+.L2766:
 	ldrh	r3, [fp]
 	cmp	r3, r4
-	bhi	.L2755
-	ldr	r4, .L2779+44
+	bhi	.L2767
+	ldr	r4, .L2791+44
 	subs	r3, r7, #2
 	ldrh	r1, [r4]
 	cmp	r3, r1, lsl #1
-	bgt	.L2756
-.L2760:
+	bgt	.L2768
+.L2772:
 	movs	r7, #0
 	mov	r6, r7
-.L2757:
+.L2769:
 	ldrh	r3, [r8]
 	uxth	r0, r7
 	adds	r7, r7, #1
 	cmp	r3, r0
-	bhi	.L2761
+	bhi	.L2773
 	ldrh	r2, [r10]
-	ldr	r3, .L2779+48
+	ldr	r3, .L2791+48
 	ldrh	r4, [r4]
-	ldr	r7, .L2779+52
+	ldr	r7, .L2791+52
 	str	r2, [r3]
-	ldr	r3, .L2779+56
+	ldr	r3, .L2791+56
 	mov	r1, r4
 	ldr	r3, [r3]
 	mov	r0, r3
 	str	r3, [sp, #16]
 	bl	__aeabi_uidiv
-	ldr	r1, .L2779+60
+	ldr	r1, .L2791+60
 	ubfx	r3, r0, #5, #16
 	add	r2, r3, #36
 	mov	fp, r0
@@ -19584,7 +19609,7 @@ FtlLowFormat:
 	str	r3, [sp, #4]
 	str	r1, [sp, #8]
 	cmp	r6, r2
-	ble	.L2762
+	ble	.L2774
 	ldr	r3, [sp, #16]
 	mov	r1, r4
 	subs	r0, r3, r6
@@ -19594,12 +19619,12 @@ FtlLowFormat:
 	lsrs	r0, r0, #5
 	adds	r0, r0, #24
 	strh	r0, [r3]	@ movhi
-.L2762:
-	ldr	r3, .L2779+64
+.L2774:
+	ldr	r3, .L2791+64
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L2763
-	ldr	r2, .L2779+60
+	bne	.L2775
+	ldr	r2, .L2791+60
 	mov	r1, r4
 	mov	r0, r6
 	ldrh	r3, [r2]
@@ -19611,11 +19636,11 @@ FtlLowFormat:
 	uxtah	r0, r3, r0
 	add	r3, r3, r0, asr #2
 	strh	r3, [r2]	@ movhi
-.L2763:
-	ldr	r3, .L2779+68
+.L2775:
+	ldr	r3, .L2791+68
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2764
-	ldr	r2, .L2779+60
+	cbz	r3, .L2776
+	ldr	r2, .L2791+60
 	mov	r1, r4
 	mov	r0, r6
 	ldrh	r3, [r2]
@@ -19627,55 +19652,55 @@ FtlLowFormat:
 	uxtah	r0, r3, r0
 	add	r3, r3, r0, asr #2
 	strh	r3, [r2]	@ movhi
-.L2764:
-	ldr	r3, .L2779+72
+.L2776:
+	ldr	r3, .L2791+72
 	ldrh	r3, [r3]
-	cbz	r3, .L2766
-	ldr	r2, .L2779+60
+	cbz	r3, .L2778
+	ldr	r2, .L2791+60
 	ldrh	r1, [r2]
 	add	r1, r1, r3, lsr #1
 	strh	r1, [r2]	@ movhi
 	mul	r1, r4, r3
 	cmp	r6, r1
-	bge	.L2766
+	bge	.L2778
 	ldr	r1, [sp, #4]
 	adds	r3, r3, #32
 	str	fp, [r7]
 	add	r1, r1, r3
 	strh	r1, [r2]	@ movhi
-.L2766:
+.L2778:
 	ldr	r3, [sp, #8]
-	ldr	r6, .L2779+76
+	ldr	r6, .L2791+76
 	ldrh	r2, [r3]
 	ldr	r3, [r7]
 	subs	r3, r3, r2
 	muls	r4, r3, r4
-	ldr	r3, .L2779+80
+	ldr	r3, .L2791+80
 	ldrh	r3, [r3]
 	str	r4, [r6]
 	muls	r4, r3, r4
 	ldr	r3, [sp, #12]
 	ldrh	r3, [r3]
 	str	r4, [r7]
-	ldr	r7, .L2779+84
+	ldr	r7, .L2791+84
 	muls	r4, r3, r4
-	ldr	r3, .L2779+88
+	ldr	r3, .L2791+88
 	str	r4, [r3]
 	movw	r4, #65535
 	bl	FtlBbmTblFlush
 	ldrh	r2, [r10]
 	movs	r1, #0
-	ldr	r10, .L2779+120
+	ldr	r10, .L2791+120
 	lsls	r2, r2, #1
 	ldr	r0, [r10]
 	bl	ftl_memset
-	ldr	r2, .L2779+92
+	ldr	r2, .L2791+92
 	movs	r3, #0
 	strh	r3, [r7, #2]	@ movhi
 	movs	r1, #255
 	strb	r3, [r7, #6]
 	str	r3, [r2]
-	ldr	r2, .L2779+96
+	ldr	r2, .L2791+96
 	strh	r3, [r7]	@ movhi
 	strh	r3, [r2, #2]	@ movhi
 	strb	r3, [r2, #6]
@@ -19686,30 +19711,30 @@ FtlLowFormat:
 	mov	r8, r10
 	strb	r3, [r7, #8]
 	mov	r10, r7
-	ldr	r3, .L2779+100
+	ldr	r3, .L2791+100
 	lsrs	r2, r2, #3
 	ldr	r0, [r3]
 	bl	ftl_memset
-.L2768:
+.L2780:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r7, #7]	@ zero_extendqisi2
 	ldrh	r2, [r7]
 	cmp	r3, #0
-	bne	.L2769
+	bne	.L2781
 	ldr	r3, [r8]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r7]
 	adds	r3, r3, #1
 	strh	r3, [r7]	@ movhi
-	b	.L2768
-.L2753:
+	b	.L2780
+.L2765:
 	mvns	r0, r3
 	orr	r0, r3, r0, lsl #16
 	str	r0, [r4, r3, lsl #2]
 	str	ip, [r7, r3, lsl #2]
-	b	.L2752
-.L2755:
+	b	.L2764
+.L2767:
 	mov	r0, r4
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
@@ -19717,11 +19742,11 @@ FtlLowFormat:
 	add	r7, r7, r0
 	uxth	r7, r7
 	uxth	r4, r4
-	b	.L2754
-.L2756:
+	b	.L2766
+.L2768:
 	mov	r0, r7
 	bl	__aeabi_uidiv
-	ldr	r3, .L2779+104
+	ldr	r3, .L2791+104
 	ldr	r3, [r3]
 	add	r0, r0, r3
 	uxth	r0, r0
@@ -19729,26 +19754,26 @@ FtlLowFormat:
 	ldrh	r0, [r6]
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	r6, [r8]
-.L2758:
+.L2770:
 	ldrh	r3, [r10]
 	cmp	r3, r6
-	bls	.L2760
+	bls	.L2772
 	mov	r0, r6
 	movs	r1, #1
 	adds	r6, r6, #1
 	bl	FtlLowFormatEraseBlock
 	uxth	r6, r6
-	b	.L2758
-.L2761:
+	b	.L2770
+.L2773:
 	movs	r1, #0
 	bl	FtlLowFormatEraseBlock
 	add	r6, r6, r0
 	uxth	r6, r6
-	b	.L2757
-.L2769:
+	b	.L2769
+.L2781:
 	ldr	r3, [r5]
 	ldrh	r1, [r7, #4]
-	ldr	r4, .L2779+108
+	ldr	r4, .L2791+108
 	str	r3, [r7, #12]
 	adds	r3, r3, #1
 	str	r3, [r5]
@@ -19764,22 +19789,22 @@ FtlLowFormat:
 	strh	r3, [r4]	@ movhi
 	movs	r3, #1
 	strb	r3, [r4, #8]
-.L2770:
+.L2782:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r4]
 	cmp	r3, #0
-	bne	.L2771
+	bne	.L2783
 	ldr	r3, [r8]
 	strh	r7, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	b	.L2770
-.L2780:
+	b	.L2782
+.L2792:
 	.align	2
-.L2779:
+.L2791:
 	.word	.LANCHOR77
 	.word	.LANCHOR67
 	.word	.LANCHOR195
@@ -19811,7 +19836,7 @@ FtlLowFormat:
 	.word	168778952
 	.word	.LANCHOR41
 	.word	.LANCHOR84
-.L2771:
+.L2783:
 	ldr	r3, [r5]
 	ldrh	r1, [r4, #4]
 	str	r3, [r4, #12]
@@ -19820,10 +19845,10 @@ FtlLowFormat:
 	movw	r4, #65535
 	ldr	r3, [r8]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L2781
+	ldr	r3, .L2793
 	strh	r4, [r3]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L2781+4
+	ldr	r3, .L2793+4
 	movs	r2, #0
 	strh	r2, [r3, #2]	@ movhi
 	ldr	r2, [r6]
@@ -19836,18 +19861,18 @@ FtlLowFormat:
 	str	r2, [r5]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	r0, .L2750
-	ldr	r3, .L2781+8
+	cbnz	r0, .L2762
+	ldr	r3, .L2793+8
 	movs	r2, #1
 	str	r2, [r3]
-.L2750:
+.L2762:
 	movs	r0, #0
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2782:
+.L2794:
 	.align	2
-.L2781:
+.L2793:
 	.word	.LANCHOR94
 	.word	.LANCHOR209
 	.word	.LANCHOR231
@@ -19865,35 +19890,35 @@ Ftl_get_new_temp_ppa:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movw	r3, #65535
-	ldr	r4, .L2786
+	ldr	r4, .L2798
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	beq	.L2784
+	beq	.L2796
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L2785
-.L2784:
+	cbnz	r3, .L2797
+.L2796:
 	bl	FtlCacheWriteBack
 	movs	r0, #0
 	movs	r5, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r0, .L2786
+	ldr	r0, .L2798
 	strb	r5, [r4, #8]
 	bl	allocate_data_superblock
-	ldr	r3, .L2786+4
+	ldr	r3, .L2798+4
 	strh	r5, [r3]	@ movhi
-	ldr	r3, .L2786+8
+	ldr	r3, .L2798+8
 	strh	r5, [r3]	@ movhi
 	bl	l2p_flush
 	mov	r0, r5
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L2785:
-	ldr	r0, .L2786
+.L2797:
+	ldr	r0, .L2798
 	pop	{r3, r4, r5, lr}
 	b	get_new_active_ppa
-.L2787:
+.L2799:
 	.align	2
-.L2786:
+.L2798:
 	.word	.LANCHOR94
 	.word	.LANCHOR110
 	.word	.LANCHOR111
@@ -19910,26 +19935,26 @@ Ftl_gc_temp_data_write_back:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
-	ldr	r3, .L2803
+	ldr	r3, .L2815
 	ldr	r3, [r3]
-	cbz	r3, .L2789
-.L2792:
+	cbz	r3, .L2801
+.L2804:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L2789:
-	ldr	r3, .L2803+4
-	ldr	r5, .L2803+8
+.L2801:
+	ldr	r3, .L2815+4
+	ldr	r5, .L2815+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2791
+	cbz	r3, .L2803
 	ldr	r3, [r5]
 	lsls	r2, r3, #31
-	bpl	.L2791
-	ldr	r3, .L2803+12
+	bpl	.L2803
+	ldr	r3, .L2815+12
 	ldrh	r3, [r3, #4]
 	cmp	r3, #0
-	bne	.L2792
-.L2791:
-	ldr	r4, .L2803+16
+	bne	.L2804
+.L2803:
+	ldr	r4, .L2815+16
 	movs	r3, #0
 	movs	r6, #0
 	movs	r7, #36
@@ -19937,38 +19962,38 @@ Ftl_gc_temp_data_write_back:
 	ldr	r1, [r5]
 	ldr	r0, [r4]
 	bl	FlashProgPages
-.L2793:
+.L2805:
 	ldr	r1, [r5]
 	uxth	r3, r6
 	cmp	r3, r1
-	bcc	.L2795
+	bcc	.L2807
 	ldr	r0, [r4]
 	bl	FtlGcBufFree
 	movs	r3, #0
 	str	r3, [r5]
-	ldr	r3, .L2803+12
+	ldr	r3, .L2815+12
 	ldrh	r3, [r3, #4]
 	cmp	r3, #0
-	bne	.L2792
+	bne	.L2804
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
-	b	.L2802
-.L2795:
+	b	.L2814
+.L2807:
 	muls	r3, r7, r3
 	ldr	r2, [r4]
 	adds	r6, r6, #1
 	adds	r1, r2, r3
 	ldr	r2, [r2, r3]
 	adds	r3, r2, #1
-	bne	.L2794
-	ldr	r3, .L2803+12
+	bne	.L2806
+	ldr	r3, .L2815+12
 	movs	r5, #0
-	ldr	r0, .L2803+20
+	ldr	r0, .L2815+20
 	ldrh	r4, [r3]
 	ldr	r0, [r0]
 	strh	r5, [r0, r4, lsl #1]	@ movhi
 	strh	r2, [r3]	@ movhi
-	ldr	r2, .L2803+24
+	ldr	r2, .L2815+24
 	ldr	r0, [r1, #4]
 	ldr	r3, [r2, #96]
 	ubfx	r0, r0, #10, #16
@@ -19977,19 +20002,19 @@ Ftl_gc_temp_data_write_back:
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
 	bl	FtlGcPageVarInit
-.L2802:
+.L2814:
 	movs	r0, #1
 	pop	{r3, r4, r5, r6, r7, pc}
-.L2794:
+.L2806:
 	ldr	r3, [r1, #12]
 	ldr	r1, [r1, #4]
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
 	bl	FtlGcUpdatePage
-	b	.L2793
-.L2804:
+	b	.L2805
+.L2816:
 	.align	2
-.L2803:
+.L2815:
 	.word	.LANCHOR77
 	.word	.LANCHOR8
 	.word	.LANCHOR103
@@ -20009,34 +20034,34 @@ Ftl_gc_temp_data_write_back:
 rk_ftl_garbage_collect:
 	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2895
+	ldr	r3, .L2907
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #40
 	ldr	r2, [r3]
 	cmp	r2, #0
-	bne	.L2857
-	ldr	r3, .L2895+4
+	bne	.L2869
+	ldr	r3, .L2907+4
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L2857
-	ldr	r2, .L2895+8
+	bne	.L2869
+	ldr	r2, .L2907+8
 	ldrh	r2, [r2]
 	cmp	r2, #47
-	bls	.L2859
-	ldr	r5, .L2895+12
+	bls	.L2871
+	ldr	r5, .L2907+12
 	movw	r2, #65535
 	ldrh	ip, [r5]
 	cmp	ip, r2
-	beq	.L2807
-	ldr	r7, .L2895+16
+	beq	.L2819
+	ldr	r7, .L2907+16
 	ldrh	r3, [r7]
 	cmp	r3, r2
-	bne	.L2807
-	ldr	r1, .L2895+20
+	bne	.L2819
+	ldr	r1, .L2907+20
 	ldrh	r6, [r1]
 	cmp	r6, r3
-	beq	.L2807
-	ldr	r2, .L2895+24
+	beq	.L2819
+	ldr	r2, .L2907+24
 	ldrh	r4, [r2]
 	cmp	r4, r3
 	itttt	ne
@@ -20044,164 +20069,164 @@ rk_ftl_garbage_collect:
 	strhne	r6, [r5]	@ movhi
 	strhne	r4, [r1]	@ movhi
 	strhne	r3, [r2]	@ movhi
-.L2807:
+.L2819:
 	cmp	r0, #0
-	bne	.L2860
-	ldr	r3, .L2895+28
+	bne	.L2872
+	ldr	r3, .L2907+28
 	ldrh	r3, [r3]
 	cmp	r3, #24
-	bhi	.L2861
-	ldr	r2, .L2895+32
+	bhi	.L2873
+	ldr	r2, .L2907+32
 	cmp	r3, #16
 	ldrh	r4, [r2]
-	bls	.L2810
+	bls	.L2822
 	lsrs	r4, r4, #5
-.L2809:
-	ldr	r2, .L2895+36
+.L2821:
+	ldr	r2, .L2907+36
 	ldrh	r1, [r2]
 	cmp	r1, r3
 	mov	r1, r2
-	bcs	.L2813
-	ldr	r3, .L2895+40
+	bcs	.L2825
+	ldr	r3, .L2907+40
 	movw	r0, #65535
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L2814
-	ldr	r0, .L2895+16
+	bne	.L2826
+	ldr	r0, .L2907+16
 	ldrh	r0, [r0]
 	cmp	r0, r3
-	bne	.L2814
-	ldr	r3, .L2895+44
+	bne	.L2826
+	ldr	r3, .L2907+44
 	ldrh	r0, [r3]
-	cbnz	r0, .L2815
-	ldr	r3, .L2895+48
-	ldr	r4, .L2895+52
+	cbnz	r0, .L2827
+	ldr	r3, .L2907+48
+	ldr	r4, .L2907+52
 	ldr	r3, [r3]
 	ldr	r4, [r4]
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, lsr #2
-	bcs	.L2816
-.L2815:
-	ldr	r3, .L2895+56
+	bcs	.L2828
+.L2827:
+	ldr	r3, .L2907+56
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r1]	@ movhi
-.L2817:
-	ldr	r3, .L2895+60
+.L2829:
+	ldr	r3, .L2907+60
 	movs	r2, #0
 	str	r2, [r3]
-.L2805:
+.L2817:
 	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2810:
+.L2822:
 	cmp	r3, #12
-	bls	.L2811
+	bls	.L2823
 	lsrs	r4, r4, #4
-	b	.L2809
-.L2811:
+	b	.L2821
+.L2823:
 	cmp	r3, #8
-	bls	.L2809
+	bls	.L2821
 	lsrs	r4, r4, #2
-	b	.L2809
-.L2861:
+	b	.L2821
+.L2873:
 	movs	r4, #1
-	b	.L2809
-.L2816:
+	b	.L2821
+.L2828:
 	movs	r3, #18
 	strh	r3, [r2]	@ movhi
-	b	.L2817
-.L2814:
-	ldr	r3, .L2895+56
+	b	.L2829
+.L2826:
+	ldr	r3, .L2907+56
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r1]	@ movhi
-.L2813:
-	ldr	r3, .L2895+64
+.L2825:
+	ldr	r3, .L2907+64
 	ldrh	r3, [r3]
-	cbz	r3, .L2808
+	cbz	r3, .L2820
 	adds	r4, r4, #32
 	uxth	r4, r4
-.L2808:
-	ldr	r5, .L2895+68
+.L2820:
+	ldr	r5, .L2907+68
 	movw	r3, #65535
 	ldrh	r2, [r5]
 	cmp	r2, r3
-	bne	.L2820
-	ldr	r3, .L2895+16
+	bne	.L2832
+	ldr	r3, .L2907+16
 	ldrh	r1, [r3]
 	cmp	r1, r2
-	beq	.L2821
-	ldr	r0, .L2895+72
+	beq	.L2833
+	ldr	r0, .L2907+72
 	ldr	r0, [r0]
 	ldrh	r1, [r0, r1, lsl #1]
-	cbnz	r1, .L2822
+	cbnz	r1, .L2834
 	strh	r2, [r3]	@ movhi
-.L2822:
+.L2834:
 	ldrh	r2, [r3]
 	strh	r2, [r5]	@ movhi
 	movw	r2, #65535
 	strh	r2, [r3]	@ movhi
-.L2821:
+.L2833:
 	ldrh	r0, [r5]
 	movw	r6, #65535
 	movs	r3, #0
 	strb	r3, [r5, #8]
 	cmp	r0, r6
-	beq	.L2820
+	beq	.L2832
 	bl	IsBlkInGcList
-	cbz	r0, .L2824
+	cbz	r0, .L2836
 	strh	r6, [r5]	@ movhi
-.L2824:
-	ldr	r3, .L2895+76
+.L2836:
+	ldr	r3, .L2907+76
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2825
+	cbz	r3, .L2837
 	ldrh	r0, [r5]
 	bl	ftl_get_blk_mode
 	strb	r0, [r5, #8]
-.L2825:
+.L2837:
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2820
-	ldr	r0, .L2895+68
+	beq	.L2832
+	ldr	r0, .L2907+68
 	bl	make_superblock
-	ldr	r2, .L2895+80
+	ldr	r2, .L2907+80
 	movs	r3, #0
 	strh	r3, [r5, #2]	@ movhi
 	strb	r3, [r5, #6]
 	strh	r3, [r2]	@ movhi
-	ldr	r3, .L2895+72
+	ldr	r3, .L2907+72
 	ldrh	r2, [r5]
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r2, lsl #1]
-	ldr	r3, .L2895+84
+	ldr	r3, .L2907+84
 	strh	r2, [r3]	@ movhi
-.L2820:
-	ldr	r2, .L2895+88
+.L2832:
+	ldr	r2, .L2907+88
 	ldrh	r3, [r5]
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L2826
-	ldr	r2, .L2895+92
+	beq	.L2838
+	ldr	r2, .L2907+92
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L2826
-	ldr	r5, .L2895+68
+	beq	.L2838
+	ldr	r5, .L2907+68
 	mov	r6, r5
-.L2827:
+.L2839:
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L2828
-	ldr	r10, .L2895+100
+	bne	.L2840
+	ldr	r10, .L2907+100
 	movs	r2, #0
-	ldr	r3, .L2895+60
+	ldr	r3, .L2907+60
 	mov	r7, r10
 	str	r2, [r3]
-.L2829:
+.L2841:
 	ldrh	r8, [r10]
 	mov	r0, r8
 	bl	List_get_gc_head_node
@@ -20209,36 +20234,36 @@ rk_ftl_garbage_collect:
 	movw	r3, #65535
 	cmp	fp, r3
 	strh	fp, [r6]	@ movhi
-	bne	.L2830
+	bne	.L2842
 	movs	r3, #0
 	movs	r0, #8
 	strh	r3, [r10]	@ movhi
-	b	.L2805
-.L2860:
+	b	.L2817
+.L2872:
 	movs	r4, #1
-	b	.L2808
-.L2826:
+	b	.L2820
+.L2838:
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.L2893:
-	ldr	r3, .L2895+44
+.L2905:
+	ldr	r3, .L2907+44
 	ldrh	r0, [r3]
-	b	.L2805
-.L2830:
+	b	.L2817
+.L2842:
 	str	r0, [sp, #8]
 	mov	r0, fp
 	bl	IsBlkInGcList
 	add	r3, r8, #1
 	ldr	r2, [sp, #8]
-	cbz	r0, .L2831
+	cbz	r0, .L2843
 	strh	r3, [r10]	@ movhi
-	b	.L2829
-.L2831:
-	ldr	r1, .L2895+32
+	b	.L2841
+.L2843:
+	ldr	r1, .L2907+32
 	uxth	r3, r3
-	ldr	lr, .L2895+104
+	ldr	lr, .L2907+104
 	uxth	r2, r2
-	ldr	r8, .L2895+72
+	ldr	r8, .L2907+72
 	ldrh	r1, [r1]
 	ldrh	lr, [lr]
 	ldr	r0, [r8]
@@ -20246,39 +20271,39 @@ rk_ftl_garbage_collect:
 	mul	r1, lr, r1
 	ldrh	ip, [r0, r2, lsl #1]
 	cmp	ip, r1, asr #1
-	bgt	.L2833
+	bgt	.L2845
 	cmp	r3, #48
-	bls	.L2834
+	bls	.L2846
 	cmp	ip, #8
-	bls	.L2834
-	ldr	r3, .L2895+96
+	bls	.L2846
+	ldr	r3, .L2907+96
 	ldrh	r3, [r3]
 	cmp	r3, #35
-	bhi	.L2834
-.L2833:
+	bhi	.L2846
+.L2845:
 	movs	r3, #0
 	strh	r3, [r7]	@ movhi
-.L2834:
+.L2846:
 	ldrh	r3, [r0, r2, lsl #1]
 	cmp	r1, r3
-	bgt	.L2835
+	bgt	.L2847
 	movw	r3, #65535
 	strh	r3, [r6]	@ movhi
 	movs	r3, #0
 	strh	r3, [r7]	@ movhi
-	b	.L2893
-.L2835:
+	b	.L2905
+.L2847:
 	cmp	r3, #0
-	bne	.L2836
+	bne	.L2848
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	ldrh	r3, [r7]
 	adds	r3, r3, #1
 	strh	r3, [r7]	@ movhi
-	b	.L2829
-.L2896:
+	b	.L2841
+.L2908:
 	.align	2
-.L2895:
+.L2907:
 	.word	.LANCHOR77
 	.word	.LANCHOR171
 	.word	.LANCHOR86
@@ -20306,86 +20331,86 @@ rk_ftl_garbage_collect:
 	.word	.LANCHOR110
 	.word	.LANCHOR178
 	.word	.LANCHOR38
-.L2836:
+.L2848:
 	movs	r3, #0
 	strb	r3, [r6, #8]
-	ldr	r3, .L2897
+	ldr	r3, .L2909
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2837
+	cbz	r3, .L2849
 	mov	r0, fp
 	bl	ftl_get_blk_mode
 	strb	r0, [r6, #8]
-.L2837:
-	ldr	r3, .L2897+4
+.L2849:
+	ldr	r3, .L2909+4
 	ldrh	r3, [r3]
 	cmp	r3, fp
-	bne	.L2838
-	ldr	r1, .L2897+8
-	movw	r2, #851
-	ldr	r0, .L2897+12
+	bne	.L2850
+	ldr	r1, .L2909+8
+	movw	r2, #857
+	ldr	r0, .L2909+12
 	bl	printf
-	ldr	r1, .L2897+16
-	ldr	r0, .L2897+20
+	ldr	r1, .L2909+16
+	ldr	r0, .L2909+20
 	bl	printf
-.L2838:
-	ldr	r3, .L2897+24
+.L2850:
+	ldr	r3, .L2909+24
 	ldrh	r2, [r6]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L2839
-	ldr	r1, .L2897+8
-	mov	r2, #852
-	ldr	r0, .L2897+12
+	bne	.L2851
+	ldr	r1, .L2909+8
+	movw	r2, #858
+	ldr	r0, .L2909+12
 	bl	printf
-	ldr	r1, .L2897+16
-	ldr	r0, .L2897+20
+	ldr	r1, .L2909+16
+	ldr	r0, .L2909+20
 	bl	printf
-.L2839:
-	ldr	r3, .L2897+28
+.L2851:
+	ldr	r3, .L2909+28
 	ldrh	r2, [r6]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L2840
-	ldr	r1, .L2897+8
-	movw	r2, #853
-	ldr	r0, .L2897+12
+	bne	.L2852
+	ldr	r1, .L2909+8
+	movw	r2, #859
+	ldr	r0, .L2909+12
 	bl	printf
-	ldr	r1, .L2897+16
-	ldr	r0, .L2897+20
+	ldr	r1, .L2909+16
+	ldr	r0, .L2909+20
 	bl	printf
-.L2840:
+.L2852:
 	mov	r0, r5
 	bl	make_superblock
-	ldr	r2, .L2897+32
+	ldr	r2, .L2909+32
 	movs	r3, #0
 	ldrh	r1, [r6]
 	strh	r3, [r2]	@ movhi
 	ldr	r2, [r8]
 	ldrh	r1, [r2, r1, lsl #1]
-	ldr	r2, .L2897+36
+	ldr	r2, .L2909+36
 	strh	r3, [r6, #2]	@ movhi
 	strb	r3, [r6, #6]
 	strh	r1, [r2]	@ movhi
-.L2828:
-	ldr	r3, .L2897+40
+.L2840:
+	ldr	r3, .L2909+40
 	movs	r2, #1
 	str	r2, [r3]
-	ldr	r3, .L2897+44
+	ldr	r3, .L2909+44
 	ldrh	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L2897
+	ldr	r3, .L2909
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2841
+	cbz	r3, .L2853
 	ldrb	r3, [r6, #8]	@ zero_extendqisi2
 	cmp	r3, r2
 	ittt	eq
-	ldreq	r3, .L2897+48
+	ldreq	r3, .L2909+48
 	ldrheq	r3, [r3]
 	streq	r3, [sp, #12]
-.L2841:
+.L2853:
 	ldrh	r3, [r6, #2]
 	ldr	r1, [sp, #12]
-	ldr	fp, .L2897+84
+	ldr	fp, .L2909+84
 	adds	r2, r3, r4
 	cmp	r2, r1
 	itt	gt
@@ -20395,11 +20420,11 @@ rk_ftl_garbage_collect:
 	it	gt
 	uxthgt	r4, r4
 	str	r3, [sp, #20]
-.L2843:
+.L2855:
 	ldrh	r3, [sp, #20]
 	cmp	r4, r3
-	bls	.L2851
-	ldr	r3, .L2897+52
+	bls	.L2863
+	ldr	r3, .L2909+52
 	movw	r8, #65535
 	ldrh	lr, [r5, #2]
 	mov	r10, #36
@@ -20407,17 +20432,17 @@ rk_ftl_garbage_collect:
 	ldrh	r7, [r3]
 	ldr	r3, [sp, #20]
 	add	lr, lr, r3
-	ldr	r3, .L2897+56
+	ldr	r3, .L2909+56
 	str	r3, [sp, #16]
 	movs	r3, #0
 	str	r3, [sp, #8]
-	b	.L2852
-.L2845:
+	b	.L2864
+.L2857:
 	ldr	r1, [sp, #16]
 	ldrh	r2, [r1, #2]!
 	cmp	r2, r8
 	str	r1, [sp, #16]
-	beq	.L2844
+	beq	.L2856
 	ldr	r1, [sp, #8]
 	orr	r2, lr, r2, lsl #10
 	mla	ip, r10, r1, r0
@@ -20426,27 +20451,27 @@ rk_ftl_garbage_collect:
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r2, [sp, #8]
-.L2844:
+.L2856:
 	adds	r3, r3, #1
-.L2852:
+.L2864:
 	uxth	r2, r3
 	cmp	r2, r7
-	bcc	.L2845
+	bcc	.L2857
 	ldrb	r2, [r5, #8]	@ zero_extendqisi2
 	ldr	r1, [sp, #8]
 	bl	FlashReadPages
 	movs	r3, #0
-.L2892:
+.L2904:
 	str	r3, [sp, #16]
 	ldr	r2, [sp, #8]
 	ldrh	r3, [sp, #16]
 	cmp	r2, r3
-	bhi	.L2850
+	bhi	.L2862
 	ldr	r3, [sp, #20]
 	adds	r3, r3, #1
 	str	r3, [sp, #20]
-	b	.L2843
-.L2850:
+	b	.L2855
+.L2862:
 	ldr	r3, [sp, #16]
 	movs	r7, #36
 	muls	r7, r3, r7
@@ -20454,23 +20479,23 @@ rk_ftl_garbage_collect:
 	adds	r2, r3, r7
 	ldr	r3, [r3, r7]
 	adds	r3, r3, #1
-	beq	.L2847
+	beq	.L2859
 	ldr	r8, [r2, #12]
 	movw	r3, #61589
 	ldrh	r2, [r8]
 	cmp	r2, r3
-	bne	.L2847
+	bne	.L2859
 	ldr	r10, [r8, #8]
 	cmp	r10, #-1
-	bne	.L2848
-	ldr	r1, .L2897+8
-	mov	r2, #892
-	ldr	r0, .L2897+12
+	bne	.L2860
+	ldr	r1, .L2909+8
+	movw	r2, #898
+	ldr	r0, .L2909+12
 	bl	printf
-	ldr	r1, .L2897+16
-	ldr	r0, .L2897+20
+	ldr	r1, .L2909+16
+	ldr	r0, .L2909+20
 	bl	printf
-.L2848:
+.L2860:
 	movs	r2, #0
 	add	r1, sp, #36
 	mov	r0, r10
@@ -20481,10 +20506,10 @@ rk_ftl_garbage_collect:
 	ldr	r2, [r0, #4]
 	bic	r3, r3, #-2147483648
 	cmp	r3, r2
-	bne	.L2847
-	ldr	r2, .L2897+32
-	ldr	r1, .L2897+60
-	ldr	r10, .L2897+68
+	bne	.L2859
+	ldr	r2, .L2909+32
+	ldr	r1, .L2909+60
+	ldr	r10, .L2909+68
 	ldrh	r3, [r2]
 	str	r1, [sp, #28]
 	adds	r3, r3, #1
@@ -20506,7 +20531,7 @@ rk_ftl_garbage_collect:
 	ldr	r0, [fp]
 	mla	r2, r1, r3, r2
 	add	r0, r0, r7
-	ldr	r7, .L2897+28
+	ldr	r7, .L2909+28
 	ldr	r1, [r0, #8]
 	adds	r3, r3, #1
 	str	r1, [r2, #8]
@@ -20517,62 +20542,62 @@ rk_ftl_garbage_collect:
 	str	r2, [r8, #12]
 	ldrh	r2, [r7]
 	strh	r2, [r8, #2]	@ movhi
-	ldr	r2, .L2897+64
+	ldr	r2, .L2909+64
 	str	r3, [r10]
 	ldr	r2, [r2]
 	str	r2, [r8, #4]
 	bl	FtlGcBufAlloc
-	ldr	r3, .L2897
+	ldr	r3, .L2909
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L2849
+	cbnz	r3, .L2861
 	ldrb	r2, [r7, #7]	@ zero_extendqisi2
 	ldr	r3, [r10]
 	cmp	r2, r3
-	beq	.L2849
+	beq	.L2861
 	ldrh	r3, [r7, #4]
-	cbnz	r3, .L2847
-.L2849:
+	cbnz	r3, .L2859
+.L2861:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	r0, .L2847
-.L2894:
-	ldr	r3, .L2897+40
+	cbz	r0, .L2859
+.L2906:
+	ldr	r3, .L2909+40
 	movs	r2, #0
 	str	r2, [r3]
-	b	.L2893
-.L2847:
+	b	.L2905
+.L2859:
 	ldr	r3, [sp, #16]
 	adds	r3, r3, #1
-	b	.L2892
-.L2851:
+	b	.L2904
+.L2863:
 	ldrh	r3, [r5, #2]
 	add	r4, r4, r3
 	ldr	r3, [sp, #12]
 	uxth	r4, r4
 	cmp	r3, r4
 	strh	r4, [r5, #2]	@ movhi
-	bhi	.L2853
-	ldr	r3, .L2897+68
+	bhi	.L2865
+	ldr	r3, .L2909+68
 	ldr	r3, [r3]
-	cbz	r3, .L2854
+	cbz	r3, .L2866
 	bl	Ftl_gc_temp_data_write_back
 	cmp	r0, #0
-	bne	.L2894
-.L2854:
-	ldr	r3, .L2897+32
+	bne	.L2906
+.L2866:
+	ldr	r3, .L2909+32
 	ldrh	r4, [r3]
-	cbnz	r4, .L2855
-	ldr	r7, .L2897+72
+	cbnz	r4, .L2867
+	ldr	r7, .L2909+72
 	ldrh	r1, [r5]
 	ldr	r3, [r7]
 	ldrh	r3, [r3, r1, lsl #1]
-	cbz	r3, .L2855
-	ldr	r0, .L2897+36
+	cbz	r3, .L2867
+	ldr	r0, .L2909+36
 	ldrh	r2, [r5, #2]
 	ldrh	r0, [r0]
 	str	r3, [sp]
 	mov	r3, r4
 	str	r0, [sp, #4]
-	ldr	r0, .L2897+76
+	ldr	r0, .L2909+76
 	bl	printf
 	ldrh	r2, [r5]
 	ldr	r3, [r7]
@@ -20582,26 +20607,26 @@ rk_ftl_garbage_collect:
 	bl	FtlCacheWriteBack
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L2855:
+.L2867:
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.L2853:
-	ldr	r3, .L2897+80
+.L2865:
+	ldr	r3, .L2909+80
 	ldrh	r0, [r3]
 	cmp	r0, #2
-	bhi	.L2856
-	ldr	r3, .L2897+44
+	bhi	.L2868
+	ldr	r3, .L2909+44
 	ldrh	r4, [r3]
-	b	.L2827
-.L2856:
-	ldr	r3, .L2897+40
+	b	.L2839
+.L2868:
+	ldr	r3, .L2909+40
 	movs	r2, #0
 	adds	r0, r0, #1
 	str	r2, [r3]
-	b	.L2805
-.L2898:
+	b	.L2817
+.L2910:
 	.align	2
-.L2897:
+.L2909:
 	.word	.LANCHOR8
 	.word	.LANCHOR92
 	.word	.LANCHOR243
@@ -20621,15 +20646,15 @@ rk_ftl_garbage_collect:
 	.word	.LANCHOR160
 	.word	.LANCHOR103
 	.word	.LANCHOR84
-	.word	.LC66
+	.word	.LC65
 	.word	.LANCHOR89
 	.word	.LANCHOR107
-.L2857:
+.L2869:
 	movs	r0, #0
-	b	.L2805
-.L2859:
+	b	.L2817
+.L2871:
 	mov	r0, r3
-	b	.L2805
+	b	.L2817
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
 	.section	.text.FtlInit,"ax",%progbits
 	.align	1
@@ -20644,67 +20669,67 @@ FtlInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	mov	r3, #-1
-	ldr	r4, .L2908
+	ldr	r4, .L2920
 	mov	r5, r0
-	ldr	r2, .L2908+4
+	ldr	r2, .L2920+4
 	str	r3, [r4]
 	movs	r3, #0
-	ldr	r1, .L2908+8
+	ldr	r1, .L2920+8
 	str	r3, [r2]
-	ldr	r2, .L2908+12
-	ldr	r0, .L2908+16
+	ldr	r2, .L2920+12
+	ldr	r0, .L2920+16
 	str	r3, [r2]
 	bl	printf
 	mov	r0, r5
 	bl	FtlConstantsInit
 	bl	FtlMemInit
 	bl	FtlVariablesInit
-	ldr	r3, .L2908+20
+	ldr	r3, .L2920+20
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	r0, .L2900
-	ldr	r1, .L2908+24
-	ldr	r0, .L2908+28
-.L2907:
+	cbz	r0, .L2912
+	ldr	r1, .L2920+24
+	ldr	r0, .L2920+28
+.L2919:
 	bl	printf
-.L2901:
+.L2913:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L2900:
+.L2912:
 	bl	FtlSysBlkInit
-	cbz	r0, .L2902
-	ldr	r1, .L2908+24
-	ldr	r0, .L2908+32
-	b	.L2907
-.L2902:
+	cbz	r0, .L2914
+	ldr	r1, .L2920+24
+	ldr	r0, .L2920+32
+	b	.L2919
+.L2914:
 	movs	r1, #1
 	str	r1, [r4]
 	bl	rk_ftl_garbage_collect
-	ldr	r3, .L2908+36
+	ldr	r3, .L2920+36
 	ldrh	r3, [r3]
 	cmp	r3, #15
-	bhi	.L2901
+	bhi	.L2913
 	mov	r4, #1024
-.L2904:
+.L2916:
 	movs	r1, #1
 	mov	r0, r1
 	bl	rk_ftl_garbage_collect
 	subs	r4, r4, #1
-	bne	.L2904
-	b	.L2901
-.L2909:
+	bne	.L2916
+	b	.L2913
+.L2921:
 	.align	2
-.L2908:
+.L2920:
 	.word	.LANCHOR231
 	.word	.LANCHOR244
-	.word	.LC67
+	.word	.LC66
 	.word	.LANCHOR77
 	.word	.LC7
 	.word	.LANCHOR39
 	.word	.LANCHOR245
+	.word	.LC67
 	.word	.LC68
-	.word	.LC69
 	.word	.LANCHOR89
 	.size	FtlInit, .-FtlInit
 	.section	.text.rk_ftl_init,"ax",%progbits
@@ -20721,21 +20746,21 @@ rk_ftl_init:
 	push	{r4, lr}
 	bl	FlashInit
 	mov	r4, r0
-	cbnz	r0, .L2911
-	ldr	r0, .L2912
+	cbnz	r0, .L2923
+	ldr	r0, .L2924
 	bl	FtlInit
-.L2911:
+.L2923:
 	bl	idb_init
 	mov	r1, r4
-	ldr	r0, .L2912+4
+	ldr	r0, .L2924+4
 	bl	printf
 	mov	r0, r4
 	pop	{r4, pc}
-.L2913:
+.L2925:
 	.align	2
-.L2912:
+.L2924:
 	.word	.LANCHOR15
-	.word	.LC70
+	.word	.LC69
 	.size	rk_ftl_init, .-rk_ftl_init
 	.section	.text.ftl_fix_nand_power_lost_error,"ax",%progbits
 	.align	1
@@ -20748,71 +20773,71 @@ rk_ftl_init:
 ftl_fix_nand_power_lost_error:
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2928
+	ldr	r3, .L2940
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #56
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L2914
-	ldr	r7, .L2928+4
-	ldr	r6, .L2928+8
-	ldr	r10, .L2928+32
+	beq	.L2926
+	ldr	r7, .L2940+4
+	ldr	r6, .L2940+8
+	ldr	r10, .L2940+32
 	ldrh	r5, [r7]
 	ldr	r3, [r6]
-	ldr	r4, .L2928+12
+	ldr	r4, .L2940+12
 	mov	r1, r5
-	ldr	r0, .L2928+16
+	ldr	r0, .L2940+16
 	ldrh	r2, [r3, r5, lsl #1]
 	lsl	r8, r5, #1
 	bl	printf
 	ldrh	r0, [r10]
-	bl	FtlGcRefreshBlock
+	bl	FtlGcRefreshOpenBlock
 	ldrh	r0, [r4]
-	bl	FtlGcRefreshBlock
+	bl	FtlGcRefreshOpenBlock
 	mov	r0, r10
 	bl	allocate_new_data_superblock
 	mov	r0, r4
 	movw	r4, #4097
 	bl	allocate_new_data_superblock
 	str	r7, [sp, #4]
-.L2916:
+.L2928:
 	subs	r4, r4, #1
-	beq	.L2920
+	beq	.L2932
 	movs	r1, #1
 	mov	r0, r1
 	bl	rk_ftl_garbage_collect
 	ldr	r3, [r6]
 	ldrh	r3, [r3, r8]
 	cmp	r3, #0
-	bne	.L2916
-.L2920:
+	bne	.L2928
+.L2932:
 	ldr	r3, [r6]
 	mov	r1, r5
-	ldr	r0, .L2928+16
+	ldr	r0, .L2940+16
 	ldrh	r2, [r3, r5, lsl #1]
 	bl	printf
 	ldr	r3, [r6]
 	ldrh	r4, [r3, r5, lsl #1]
-	cbnz	r4, .L2918
+	cbnz	r4, .L2930
 	add	r0, sp, #56
-	ldr	r7, .L2928+20
+	ldr	r7, .L2940+20
 	strh	r5, [r0, #-48]!	@ movhi
 	movw	r10, #65535
 	bl	make_superblock
-	ldr	r3, .L2928+24
+	ldr	r3, .L2940+24
 	add	r0, sp, #22
 	ldr	r8, [r7]
 	mov	r2, r4
 	mov	fp, #36
 	mov	ip, r4
 	ldrh	lr, [r3]
-.L2921:
+.L2933:
 	uxth	r3, r2
 	cmp	lr, r3
-	bhi	.L2923
+	bhi	.L2935
 	ldr	r3, [r6]
 	mov	r1, r5
-	ldr	r0, .L2928+28
+	ldr	r0, .L2940+28
 	ldrh	r2, [r3, r5, lsl #1]
 	bl	printf
 	mov	r2, r4
@@ -20823,18 +20848,18 @@ ftl_fix_nand_power_lost_error:
 	movs	r1, #1
 	ldr	r0, [r7]
 	bl	FlashEraseBlocks
-.L2918:
+.L2930:
 	ldr	r2, [sp, #4]
 	movw	r3, #65535
 	strh	r3, [r2]	@ movhi
-.L2914:
+.L2926:
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2923:
+.L2935:
 	ldrh	r3, [r0, #2]!
 	cmp	r3, r10
-	beq	.L2922
+	beq	.L2934
 	mla	r1, fp, r4, r8
 	adds	r4, r4, #1
 	lsls	r3, r3, #10
@@ -20842,20 +20867,20 @@ ftl_fix_nand_power_lost_error:
 	str	r3, [r1, #4]
 	str	ip, [r1, #8]
 	str	ip, [r1, #12]
-.L2922:
+.L2934:
 	adds	r2, r2, #1
-	b	.L2921
-.L2929:
+	b	.L2933
+.L2941:
 	.align	2
-.L2928:
+.L2940:
 	.word	.LANCHOR8
 	.word	.LANCHOR235
 	.word	.LANCHOR84
 	.word	.LANCHOR93
-	.word	.LC71
+	.word	.LC70
 	.word	.LANCHOR78
 	.word	.LANCHOR38
-	.word	.LC72
+	.word	.LC71
 	.word	.LANCHOR92
 	.size	ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error
 	.section	.text.ftl_read,"ax",%progbits
@@ -20875,34 +20900,34 @@ ftl_read:
 	mov	r6, r1
 	mov	r7, r3
 	str	r2, [sp, #52]
-	bne	.L2931
+	bne	.L2943
 	mov	r2, r3
 	ldr	r1, [sp, #52]
 	add	r0, r6, #256
 	bl	FtlVendorPartRead
 	str	r0, [sp, #32]
-.L2930:
+.L2942:
 	ldr	r0, [sp, #32]
 	add	sp, sp, #88
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2931:
+.L2943:
 	ldr	r3, [sp, #52]
 	adds	r3, r1, r3
 	str	r3, [sp, #36]
-	ldr	r3, .L2969
+	ldr	r3, .L2981
 	ldr	r2, [sp, #36]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L2954
-	ldr	r3, .L2969+4
+	bhi	.L2966
+	ldr	r3, .L2981+4
 	ldr	r3, [r3]
 	adds	r4, r3, #1
-	beq	.L2955
+	beq	.L2967
 	bl	FtlCacheWriteBack
-	ldr	r3, .L2969+8
+	ldr	r3, .L2981+8
 	mov	r0, r6
-	ldr	r10, .L2969+52
+	ldr	r10, .L2981+52
 	ldrh	r4, [r3]
 	mov	r1, r4
 	bl	__aeabi_uidiv
@@ -20912,7 +20937,7 @@ ftl_read:
 	subs	r0, r3, #1
 	bl	__aeabi_uidiv
 	ldr	r3, [sp, #40]
-	ldr	r2, .L2969+12
+	ldr	r2, .L2981+12
 	ldr	r4, [sp, #40]
 	rsb	r3, r3, #1
 	str	r0, [sp, #44]
@@ -20927,44 +20952,44 @@ ftl_read:
 	str	r3, [sp, #24]
 	str	r3, [sp, #48]
 	str	r3, [sp, #32]
-.L2933:
+.L2945:
 	ldr	r3, [sp, #28]
-	cbnz	r3, .L2953
-	ldr	r3, .L2969+16
+	cbnz	r3, .L2965
+	ldr	r3, .L2981+16
 	ldrh	r3, [r3]
 	cmp	r3, #0
-	beq	.L2930
+	beq	.L2942
 	movs	r1, #1
 	ldr	r0, [sp, #28]
 	bl	rk_ftl_garbage_collect
-	b	.L2930
-.L2953:
+	b	.L2942
+.L2965:
 	movs	r2, #0
 	add	r1, sp, #84
 	mov	r0, r4
 	bl	log2phys
 	ldr	r3, [sp, #84]
 	adds	r0, r3, #1
-	bne	.L2934
-	ldr	fp, .L2969+8
+	bne	.L2946
+	ldr	fp, .L2981+8
 	mov	r8, #0
-.L2935:
+.L2947:
 	ldrh	r0, [fp]
 	cmp	r8, r0
-	bcc	.L2937
-.L2938:
+	bcc	.L2949
+.L2950:
 	ldr	r3, [sp, #28]
 	adds	r4, r4, #1
 	subs	r3, r3, #1
 	str	r3, [sp, #28]
-	beq	.L2942
-	ldr	r3, .L2969+20
+	beq	.L2954
+	ldr	r3, .L2981+20
 	ldrh	r3, [r3]
 	cmp	r5, r3, lsl #2
-	bne	.L2933
-.L2942:
+	bne	.L2945
+.L2954:
 	cmp	r5, #0
-	beq	.L2933
+	beq	.L2945
 	movs	r2, #0
 	mov	r1, r5
 	ldr	r0, [r10]
@@ -20979,7 +21004,7 @@ ftl_read:
 	ldr	r3, [sp, #48]
 	lsls	r3, r3, #9
 	str	r3, [sp, #64]
-.L2952:
+.L2964:
 	mov	r8, #36
 	ldr	r3, [r10]
 	mul	r8, r8, fp
@@ -20987,27 +21012,27 @@ ftl_read:
 	add	r3, r3, r8
 	ldr	r2, [r3, #16]
 	cmp	r1, r2
-	bne	.L2944
+	bne	.L2956
 	ldr	r1, [r3, #8]
-	ldr	r3, .L2969+24
+	ldr	r3, .L2981+24
 	ldr	r3, [r3]
 	cmp	r1, r3
-	bne	.L2945
+	bne	.L2957
 	ldr	r3, [sp, #60]
 	mov	r0, r7
 	ldr	r2, [sp, #64]
 	add	r1, r1, r3
-.L2968:
+.L2980:
 	bl	ftl_memcpy
-.L2945:
+.L2957:
 	ldr	r2, [r10]
 	add	r2, r2, r8
 	ldr	r3, [r2, #12]
 	ldr	lr, [r2, #16]
 	ldr	r0, [r3, #8]
 	cmp	lr, r0
-	beq	.L2946
-	ldr	ip, .L2969+32
+	beq	.L2958
+	ldr	ip, .L2981+32
 	ldr	r0, [ip, #72]
 	adds	r0, r0, #1
 	str	r0, [ip, #72]
@@ -21023,52 +21048,52 @@ ftl_read:
 	str	r0, [sp, #4]
 	ldr	r0, [r3, #4]
 	str	r0, [sp]
-	ldr	r0, .L2969+28
+	ldr	r0, .L2981+28
 	ldr	r3, [r3]
 	ldr	r2, [r2, #4]
 	bl	printf
-.L2946:
+.L2958:
 	ldr	r3, [r10]
 	add	r2, r3, r8
 	ldr	r3, [r3, r8]
 	adds	r1, r3, #1
-	bne	.L2947
-	ldr	r1, .L2969+32
+	bne	.L2959
+	ldr	r1, .L2981+32
 	str	r3, [sp, #32]
 	ldr	r2, [r1, #72]
 	adds	r2, r2, #1
 	str	r2, [r1, #72]
-.L2948:
+.L2960:
 	add	fp, fp, #1
 	cmp	r5, fp
-	bne	.L2952
+	bne	.L2964
 	movs	r5, #0
-	b	.L2933
-.L2937:
+	b	.L2945
+.L2949:
 	mla	r0, r0, r4, r8
 	cmp	r6, r0
-	bhi	.L2936
+	bhi	.L2948
 	ldr	r3, [sp, #36]
 	cmp	r3, r0
-	bls	.L2936
+	bls	.L2948
 	subs	r0, r0, r6
 	mov	r2, #512
 	movs	r1, #0
 	add	r0, r7, r0, lsl #9
 	bl	ftl_memset
-.L2936:
+.L2948:
 	add	r8, r8, #1
-	b	.L2935
-.L2934:
+	b	.L2947
+.L2946:
 	ldr	r2, [r10]
 	mov	r8, #36
 	mla	r8, r8, r5, r2
 	str	r3, [r8, #4]
 	ldr	r3, [sp, #40]
 	cmp	r4, r3
-	ldr	r3, .L2969+8
-	bne	.L2939
-	ldr	r2, .L2969+24
+	ldr	r3, .L2981+8
+	bne	.L2951
+	ldr	r2, .L2981+24
 	mov	r0, r6
 	ldrh	fp, [r3]
 	ldr	r2, [r2]
@@ -21083,11 +21108,11 @@ ftl_read:
 	movcs	r3, r2
 	cmp	fp, r3
 	str	r3, [sp, #48]
-	bne	.L2940
+	bne	.L2952
 	str	r7, [r8, #8]
-.L2940:
-	ldr	r3, .L2969+36
-	ldr	r2, .L2969+40
+.L2952:
+	ldr	r3, .L2981+36
+	ldr	r2, .L2981+40
 	str	r4, [r8, #16]
 	ldrh	r3, [r3]
 	ldr	r2, [r2]
@@ -21096,12 +21121,12 @@ ftl_read:
 	bic	r3, r3, #3
 	add	r3, r3, r2
 	str	r3, [r8, #12]
-	b	.L2938
-.L2939:
+	b	.L2950
+.L2951:
 	ldr	r2, [sp, #44]
 	cmp	r4, r2
-	bne	.L2941
-	ldr	r2, .L2969+44
+	bne	.L2953
+	ldr	r2, .L2981+44
 	ldr	r1, [sp, #36]
 	ldr	r2, [r2]
 	str	r2, [r8, #8]
@@ -21110,50 +21135,50 @@ ftl_read:
 	subs	r1, r1, r3
 	cmp	r2, r1
 	str	r1, [sp, #24]
-	bne	.L2940
-.L2967:
+	bne	.L2952
+.L2979:
 	subs	r3, r3, r6
 	add	r3, r7, r3, lsl #9
 	str	r3, [r8, #8]
-	b	.L2940
-.L2941:
+	b	.L2952
+.L2953:
 	ldrh	r3, [r3]
 	muls	r3, r4, r3
-	b	.L2967
-.L2944:
+	b	.L2979
+.L2956:
 	ldr	r1, [sp, #44]
 	cmp	r1, r2
-	bne	.L2945
+	bne	.L2957
 	ldr	r1, [r3, #8]
-	ldr	r3, .L2969+44
+	ldr	r3, .L2981+44
 	ldr	r3, [r3]
 	cmp	r1, r3
-	bne	.L2945
-	ldr	r3, .L2969+8
+	bne	.L2957
+	ldr	r3, .L2981+8
 	ldr	r2, [sp, #68]
 	ldrh	r0, [r3]
 	ldr	r3, [sp, #44]
 	muls	r0, r3, r0
 	subs	r0, r0, r6
 	add	r0, r7, r0, lsl #9
-	b	.L2968
-.L2947:
+	b	.L2980
+.L2959:
 	cmp	r3, #256
-	bne	.L2948
+	bne	.L2960
 	ldr	r0, [r2, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	mov	r8, r0
 	bl	FtlGcRefreshBlock
-	ldr	r2, .L2969+48
+	ldr	r2, .L2981+48
 	movw	r3, #2049
-.L2950:
+.L2962:
 	subs	r3, r3, #1
-	bne	.L2949
-.L2951:
+	bne	.L2961
+.L2963:
 	bl	FtlSysFlush
-	b	.L2948
-.L2949:
+	b	.L2960
+.L2961:
 	movs	r1, #1
 	str	r2, [sp, #76]
 	mov	r0, r1
@@ -21163,16 +21188,16 @@ ftl_read:
 	ldr	r3, [sp, #72]
 	ldrh	r1, [r2]
 	cmp	r1, r8
-	beq	.L2950
-	b	.L2951
-.L2954:
+	beq	.L2962
+	b	.L2963
+.L2966:
 	mov	r3, #-1
-.L2955:
+.L2967:
 	str	r3, [sp, #32]
-	b	.L2930
-.L2970:
+	b	.L2942
+.L2982:
 	.align	2
-.L2969:
+.L2981:
 	.word	.LANCHOR69
 	.word	.LANCHOR231
 	.word	.LANCHOR56
@@ -21180,7 +21205,7 @@ ftl_read:
 	.word	.LANCHOR117
 	.word	.LANCHOR38
 	.word	.LANCHOR186
-	.word	.LC61
+	.word	.LC60
 	.word	.LANCHOR138
 	.word	.LANCHOR59
 	.word	.LANCHOR189
@@ -21201,39 +21226,39 @@ FtlWrite:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, r3
-	ldr	r3, .L3019
+	ldr	r3, .L3031
 	sub	sp, sp, #80
 	mov	r6, r1
 	str	r2, [sp, #12]
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L3004
+	bne	.L3016
 	cmp	r0, #16
-	bne	.L2973
+	bne	.L2985
 	mov	r2, r10
 	ldr	r1, [sp, #12]
 	add	r0, r6, #256
 	bl	FtlVendorPartWrite
-.L2971:
+.L2983:
 	add	sp, sp, #80
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2973:
+.L2985:
 	ldr	r3, [sp, #12]
 	adds	r5, r1, r3
-	ldr	r3, .L3019+4
+	ldr	r3, .L3031+4
 	ldr	r3, [r3]
 	cmp	r5, r3
-	bhi	.L3005
-	ldr	r3, .L3019+8
+	bhi	.L3017
+	ldr	r3, .L3031+8
 	ldr	r0, [r3]
 	adds	r4, r0, #1
-	beq	.L2971
-	ldr	r3, .L3019+12
+	beq	.L2983
+	ldr	r3, .L3031+12
 	mov	r2, #2048
 	mov	r0, r6
 	str	r2, [r3]
-	ldr	r3, .L3019+16
+	ldr	r3, .L3031+16
 	ldrh	r4, [r3]
 	mov	r1, r4
 	bl	__aeabi_uidiv
@@ -21241,7 +21266,7 @@ FtlWrite:
 	mov	r8, r0
 	subs	r0, r5, #1
 	bl	__aeabi_uidiv
-	ldr	r2, .L3019+20
+	ldr	r2, .L3031+20
 	sub	r5, r0, r8
 	adds	r3, r5, #1
 	adds	r1, r5, #1
@@ -21250,29 +21275,29 @@ FtlWrite:
 	str	r0, [sp, #16]
 	add	r3, r3, r1
 	str	r3, [r2]
-	ldr	r3, .L3019+24
+	ldr	r3, .L3031+24
 	ldr	fp, [r3]
 	cmp	fp, #0
-	beq	.L2975
+	beq	.L2987
 	ldr	r3, [fp, #16]
 	cmp	r8, r3
-	beq	.L2976
+	beq	.L2988
 	bl	FtlCacheWriteBack
-.L2975:
-	ldr	r7, .L3019+28
+.L2987:
+	ldr	r7, .L3031+28
 	mov	r4, r8
-.L2977:
+.L2989:
 	ldr	r3, [sp, #4]
-	cbnz	r3, .L3003
+	cbnz	r3, .L3015
 	ldr	r3, [sp, #16]
 	ldr	r0, [sp, #4]
 	sub	r1, r3, r8
 	bl	rk_ftl_garbage_collect
-.L3004:
+.L3016:
 	movs	r0, #0
-	b	.L2971
-.L2976:
-	ldr	r2, .L3019+32
+	b	.L2983
+.L2988:
+	ldr	r2, .L3031+32
 	mov	r1, r4
 	mov	r0, r6
 	ldr	r3, [r2]
@@ -21292,7 +21317,7 @@ FtlWrite:
 	mov	r2, r7
 	bl	ftl_memcpy
 	cmp	r5, #0
-	beq	.L3004
+	beq	.L3016
 	ldr	r3, [sp, #12]
 	add	r6, r6, r4
 	add	r10, r10, r7
@@ -21301,27 +21326,27 @@ FtlWrite:
 	str	r3, [sp, #12]
 	bl	FtlCacheWriteBack
 	str	r5, [sp, #4]
-	b	.L2975
-.L3003:
-	ldr	r5, .L3019+36
+	b	.L2987
+.L3015:
+	ldr	r5, .L3031+36
 	ldrb	r2, [r7, #6]	@ zero_extendqisi2
 	ldrh	r3, [r5]
 	cmp	r2, r3
-	bcc	.L2978
-	ldr	r1, .L3019+40
+	bcc	.L2990
+	ldr	r1, .L3031+40
 	movw	r2, #1668
-	ldr	r0, .L3019+44
+	ldr	r0, .L3031+44
 	bl	printf
-	ldr	r1, .L3019+48
-	ldr	r0, .L3019+52
+	ldr	r1, .L3031+48
+	ldr	r0, .L3031+52
 	bl	printf
-.L2978:
+.L2990:
 	ldrh	r3, [r7, #4]
-	cbnz	r3, .L2979
+	cbnz	r3, .L2991
 	bl	FtlCacheWriteBack
 	mov	r0, r7
 	bl	allocate_new_data_superblock
-.L2979:
+.L2991:
 	ldrb	r3, [r7, #7]	@ zero_extendqisi2
 	ldrh	r2, [r7, #4]
 	lsls	r3, r3, #2
@@ -21336,24 +21361,24 @@ FtlWrite:
 	str	r3, [sp, #36]
 	ldrh	r3, [r5]
 	cmp	r2, r3
-	bcc	.L2980
-	ldr	r1, .L3019+40
+	bcc	.L2992
+	ldr	r1, .L3031+40
 	movw	r2, #1701
-	ldr	r0, .L3019+44
+	ldr	r0, .L3031+44
 	bl	printf
-	ldr	r1, .L3019+48
-	ldr	r0, .L3019+52
+	ldr	r1, .L3031+48
+	ldr	r0, .L3031+52
 	bl	printf
-.L2980:
+.L2992:
 	movs	r3, #0
-.L3018:
+.L3030:
 	str	r3, [sp, #8]
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #36]
 	cmp	r3, r2
-	bne	.L3001
-.L2982:
-	ldr	r0, .L3019+56
+	bne	.L3013
+.L2994:
+	ldr	r0, .L3031+56
 	mov	r3, r7
 	movs	r2, #0
 	ldr	r1, [sp, #8]
@@ -21362,24 +21387,24 @@ FtlWrite:
 	ldr	r3, [sp, #4]
 	ldr	r2, [sp, #8]
 	cmp	r3, r2
-	bcs	.L3002
-	ldr	r1, .L3019+40
+	bcs	.L3014
+	ldr	r1, .L3031+40
 	movw	r2, #1790
-	ldr	r0, .L3019+44
+	ldr	r0, .L3031+44
 	bl	printf
-	ldr	r1, .L3019+48
-	ldr	r0, .L3019+52
+	ldr	r1, .L3031+48
+	ldr	r0, .L3031+52
 	bl	printf
-.L3002:
+.L3014:
 	ldr	r3, [sp, #4]
 	ldr	r2, [sp, #8]
 	subs	r3, r3, r2
 	str	r3, [sp, #4]
-	b	.L2977
-.L3001:
+	b	.L2989
+.L3013:
 	ldrh	r3, [r7, #4]
 	cmp	r3, #0
-	beq	.L2982
+	beq	.L2994
 	movs	r2, #0
 	add	r1, sp, #40
 	mov	r0, r4
@@ -21388,9 +21413,9 @@ FtlWrite:
 	mov	r0, r7
 	bl	get_new_active_ppa
 	ldr	r3, [sp, #8]
-	ldr	r2, .L3019+60
+	ldr	r2, .L3031+60
 	muls	r5, r3, r5
-	ldr	r3, .L3019+56
+	ldr	r3, .L3031+56
 	ldrh	r2, [r2]
 	ldr	r1, [r3]
 	str	r3, [sp, #20]
@@ -21400,7 +21425,7 @@ FtlWrite:
 	str	r4, [r1, #16]
 	mul	r0, r2, r3
 	bic	r3, r0, #3
-	ldr	r0, .L3019+64
+	ldr	r0, .L3031+64
 	str	r3, [sp, #28]
 	ldr	r3, [r0]
 	ldr	r0, [sp, #28]
@@ -21411,12 +21436,12 @@ FtlWrite:
 	movs	r1, #0
 	bl	ftl_memset
 	cmp	r4, r8
-	ldr	r1, .L3019+16
-	beq	.L2983
+	ldr	r1, .L3031+16
+	beq	.L2995
 	ldr	r3, [sp, #16]
 	cmp	r3, r4
 	ldr	r3, [sp, #20]
-	bne	.L3014
+	bne	.L3026
 	ldr	r3, [sp, #12]
 	adds	r2, r6, r3
 	ldrh	r3, [r1]
@@ -21427,8 +21452,8 @@ FtlWrite:
 	str	r3, [sp, #20]
 	movs	r3, #0
 	str	r3, [sp, #24]
-	b	.L2986
-.L2983:
+	b	.L2998
+.L2995:
 	ldrh	r2, [r1]
 	mov	r0, r6
 	mov	r1, r2
@@ -21443,14 +21468,14 @@ FtlWrite:
 	it	cs
 	movcs	r3, r1
 	str	r3, [sp, #20]
-.L2986:
-	ldr	r3, .L3019+16
+.L2998:
+	ldr	r3, .L3031+16
 	ldr	r2, [sp, #20]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	ldr	r3, .L3019+56
+	ldr	r3, .L3031+56
 	ldr	r3, [r3]
-	bne	.L2987
+	bne	.L2999
 	cmp	r4, r8
 	add	r5, r5, r3
 	itett	ne
@@ -21461,25 +21486,25 @@ FtlWrite:
 	itt	ne
 	addne	r2, r10, r2, lsl #9
 	strne	r2, [r5, #8]
-.L2989:
-	ldr	r3, .L3019+36
+.L3001:
+	ldr	r3, .L3031+36
 	ldrb	r2, [r7, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L2998
-	ldr	r1, .L3019+40
+	bcc	.L3010
+	ldr	r1, .L3031+40
 	movw	r2, #1775
-	ldr	r0, .L3019+44
+	ldr	r0, .L3031+44
 	bl	printf
-	ldr	r1, .L3019+48
-	ldr	r0, .L3019+52
+	ldr	r1, .L3031+48
+	ldr	r0, .L3031+52
 	bl	printf
-.L2998:
+.L3010:
 	ldr	r2, [sp, #32]
 	movw	r3, #61589
 	ldr	r1, [sp, #28]
 	strh	r3, [r2, r1]	@ movhi
-	ldr	r2, .L3019+68
+	ldr	r2, .L3031+68
 	str	r4, [fp, #8]
 	adds	r4, r4, #1
 	ldr	r3, [r2]
@@ -21495,10 +21520,10 @@ FtlWrite:
 	strh	r3, [fp, #2]	@ movhi
 	ldr	r3, [sp, #8]
 	adds	r3, r3, #1
-	b	.L3018
-.L3020:
+	b	.L3030
+.L3032:
 	.align	2
-.L3019:
+.L3031:
 	.word	.LANCHOR77
 	.word	.LANCHOR69
 	.word	.LANCHOR231
@@ -21517,18 +21542,18 @@ FtlWrite:
 	.word	.LANCHOR59
 	.word	.LANCHOR189
 	.word	.LANCHOR160
-.L2987:
+.L2999:
 	cmp	r4, r8
 	add	r3, r3, r5
 	ite	eq
-	ldreq	r2, .L3021
-	ldrne	r2, .L3021+4
+	ldreq	r2, .L3033
+	ldrne	r2, .L3033+4
 	ldr	r2, [r2]
 	str	r2, [r3, #8]
 	ldr	r2, [sp, #40]
-	ldr	r3, .L3021+8
+	ldr	r3, .L3033+8
 	adds	r0, r2, #1
-	beq	.L2992
+	beq	.L3004
 	ldr	r3, [r3]
 	movs	r1, #1
 	str	r2, [sp, #48]
@@ -21543,60 +21568,60 @@ FtlWrite:
 	bl	FlashReadPages
 	ldr	r3, [sp, #44]
 	adds	r3, r3, #1
-	bne	.L2993
-	ldr	r2, .L3021+12
+	bne	.L3005
+	ldr	r2, .L3033+12
 	ldr	r3, [r2, #72]
 	adds	r3, r3, #1
 	str	r3, [r2, #72]
-.L2996:
+.L3008:
 	ldr	r2, [sp, #20]
 	cmp	r4, r8
-	ldr	r3, .L3021+8
+	ldr	r3, .L3033+8
 	lsl	r2, r2, #9
-	bne	.L2997
+	bne	.L3009
 	ldr	r3, [r3]
 	mov	r1, r10
 	add	r5, r5, r3
 	ldr	r3, [sp, #24]
 	ldr	r0, [r5, #8]
 	add	r0, r0, r3, lsl #9
-.L3016:
+.L3028:
 	bl	ftl_memcpy
-	b	.L2989
-.L2993:
+	b	.L3001
+.L3005:
 	ldr	r1, [fp, #8]
 	cmp	r4, r1
-	beq	.L2995
-	ldr	r2, .L3021+12
-	ldr	r0, .L3021+16
+	beq	.L3007
+	ldr	r2, .L3033+12
+	ldr	r0, .L3033+16
 	ldr	r3, [r2, #72]
 	adds	r3, r3, #1
 	str	r3, [r2, #72]
 	mov	r2, r4
 	bl	printf
-.L2995:
+.L3007:
 	ldr	r3, [fp, #8]
 	cmp	r4, r3
-	beq	.L2996
+	beq	.L3008
 	movw	r2, #1754
-	ldr	r1, .L3021+20
-	ldr	r0, .L3021+24
+	ldr	r1, .L3033+20
+	ldr	r0, .L3033+24
 	bl	printf
-	ldr	r1, .L3021+28
-	ldr	r0, .L3021+32
+	ldr	r1, .L3033+28
+	ldr	r0, .L3033+32
 	bl	printf
-	b	.L2996
-.L2992:
+	b	.L3008
+.L3004:
 	ldr	r3, [r3]
 	movs	r1, #0
-	ldr	r2, .L3021+36
+	ldr	r2, .L3033+36
 	add	r3, r3, r5
 	ldrh	r2, [r2]
 	ldr	r0, [r3, #8]
 	bl	ftl_memset
-	b	.L2996
-.L2997:
-	ldr	r1, .L3021+40
+	b	.L3008
+.L3009:
+	ldr	r1, .L3033+40
 	ldr	r3, [r3]
 	ldrh	r1, [r1]
 	add	r5, r5, r3
@@ -21604,8 +21629,8 @@ FtlWrite:
 	muls	r1, r4, r1
 	subs	r1, r1, r6
 	add	r1, r10, r1, lsl #9
-	b	.L3016
-.L3014:
+	b	.L3028
+.L3026:
 	ldr	r3, [r3]
 	add	r5, r5, r3
 	ldrh	r3, [r1]
@@ -21613,18 +21638,18 @@ FtlWrite:
 	subs	r3, r3, r6
 	add	r3, r10, r3, lsl #9
 	str	r3, [r5, #8]
-	b	.L2989
-.L3005:
+	b	.L3001
+.L3017:
 	mov	r0, #-1
-	b	.L2971
-.L3022:
+	b	.L2983
+.L3034:
 	.align	2
-.L3021:
+.L3033:
 	.word	.LANCHOR186
 	.word	.LANCHOR187
 	.word	.LANCHOR182
 	.word	.LANCHOR138
-	.word	.LC73
+	.word	.LC72
 	.word	.LANCHOR247
 	.word	.LC5
 	.word	.LC6
@@ -21632,6 +21657,42 @@ FtlWrite:
 	.word	.LANCHOR58
 	.word	.LANCHOR56
 	.size	FtlWrite, .-FtlWrite
+	.section	.text.ftl_vendor_write,"ax",%progbits
+	.align	1
+	.global	ftl_vendor_write
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_vendor_write, %function
+ftl_vendor_write:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r3, r2
+	mov	r2, r1
+	mov	r1, r0
+	movs	r0, #16
+	b	FtlWrite
+	.size	ftl_vendor_write, .-ftl_vendor_write
+	.section	.text.ftl_sys_write,"ax",%progbits
+	.align	1
+	.global	ftl_sys_write
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_sys_write, %function
+ftl_sys_write:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r3, r2
+	mov	r2, r1
+	add	r1, r0, #256
+	movs	r0, #16
+	b	FtlWrite
+	.size	ftl_sys_write, .-ftl_sys_write
 	.section	.text.StorageSysDataStore,"ax",%progbits
 	.align	1
 	.global	StorageSysDataStore
@@ -21684,11 +21745,11 @@ ftl_write:
 	mov	r4, r2
 	mov	r5, r3
 	mov	r6, r0
-	cbnz	r0, .L3026
+	cbnz	r0, .L3040
 	mov	r3, r2
 	mov	r2, r5
 	bl	idb_write_data
-.L3026:
+.L3040:
 	mov	r3, r5
 	mov	r2, r4
 	mov	r1, r7
@@ -21709,69 +21770,69 @@ FtlCheckVpc:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r6, .L3051
-	ldr	r5, .L3051+4
-	ldr	r1, .L3051+8
-	ldr	r0, .L3051+12
+	ldr	r6, .L3065
+	ldr	r5, .L3065+4
+	ldr	r1, .L3065+8
+	ldr	r0, .L3065+12
 	bl	printf
 	mov	r2, #8192
 	movs	r1, #0
-	ldr	r0, .L3051+4
+	ldr	r0, .L3065+4
 	bl	memset
-.L3028:
+.L3042:
 	ldr	r3, [r6]
 	cmp	r4, r3
-	bcc	.L3030
-	ldr	r7, .L3051+16
+	bcc	.L3044
+	ldr	r7, .L3065+16
 	movs	r4, #0
-	ldr	r5, .L3051+20
+	ldr	r5, .L3065+20
 	movs	r2, #2
-	ldr	r10, .L3051+4
+	ldr	r10, .L3065+4
 	mov	r6, r4
-	ldr	fp, .L3051+60
+	ldr	fp, .L3065+60
 	mov	r8, r7
 	ldrh	r3, [r7]
 	ldr	r1, [r5]
-	ldr	r0, .L3051+24
+	ldr	r0, .L3065+24
 	bl	rknand_print_hex
 	ldrh	r3, [r7]
 	movs	r2, #2
-	ldr	r1, .L3051+4
-	ldr	r0, .L3051+28
+	ldr	r1, .L3065+4
+	ldr	r0, .L3065+28
 	bl	rknand_print_hex
-.L3031:
+.L3045:
 	ldrh	r2, [r8]
 	uxth	r3, r4
 	cmp	r2, r3
-	bhi	.L3033
-	ldr	r3, .L3051+32
+	bhi	.L3047
+	ldr	r3, .L3065+32
 	ldr	r4, [r3]
-	cbz	r4, .L3034
-	ldr	r3, .L3051+36
+	cbz	r4, .L3048
+	ldr	r3, .L3065+36
 	mov	r8, #0
-	ldr	r7, .L3051+40
-	ldr	fp, .L3051+64
+	ldr	r7, .L3065+40
+	ldr	fp, .L3065+64
 	ldrh	r10, [r3]
 	ldr	r3, [r7]
 	subs	r4, r4, r3
-	ldr	r3, .L3051+44
+	ldr	r3, .L3065+44
 	asrs	r4, r4, #1
 	muls	r4, r3, r4
 	uxth	r4, r4
-.L3035:
+.L3049:
 	uxth	r3, r8
 	cmp	r10, r3
-	bls	.L3034
+	bls	.L3048
 	ldr	r3, [r5]
 	ldrh	r2, [r3, r4, lsl #1]
-	cbz	r2, .L3036
-	ldr	r3, .L3051+4
+	cbz	r2, .L3050
+	ldr	r3, .L3065+4
 	movs	r6, #1
 	mov	r1, r4
 	mov	r0, fp
 	ldrh	r3, [r3, r4, lsl #1]
 	bl	printf
-.L3036:
+.L3050:
 	movs	r3, #6
 	ldr	r2, [r7]
 	muls	r4, r3, r4
@@ -21779,43 +21840,43 @@ FtlCheckVpc:
 	add	r8, r8, #1
 	ldrh	r4, [r2, r4]
 	cmp	r4, r3
-	bne	.L3035
-.L3034:
-	cbz	r6, .L3027
-	ldr	r1, .L3051+8
-	mov	r2, #1680
-	ldr	r0, .L3051+48
+	bne	.L3049
+.L3048:
+	cbz	r6, .L3041
+	ldr	r1, .L3065+8
+	movw	r2, #1669
+	ldr	r0, .L3065+48
 	bl	printf
-	ldr	r1, .L3051+52
-	ldr	r0, .L3051+56
+	ldr	r1, .L3065+52
+	ldr	r0, .L3065+56
 	bl	printf
-.L3027:
+.L3041:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3030:
+.L3044:
 	movs	r2, #0
 	add	r1, sp, #4
 	mov	r0, r4
 	bl	log2phys
 	ldr	r0, [sp, #4]
 	adds	r3, r0, #1
-	beq	.L3029
+	beq	.L3043
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r5, r0, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r5, r0, lsl #1]	@ movhi
-.L3029:
+.L3043:
 	adds	r4, r4, #1
-	b	.L3028
-.L3033:
+	b	.L3042
+.L3047:
 	ldr	r3, [r5]
 	uxth	r7, r4
 	ldrh	r2, [r3, r7, lsl #1]
 	ldrh	r3, [r10, r7, lsl #1]
 	cmp	r2, r3
-	beq	.L3032
+	beq	.L3046
 	mov	r1, r7
 	mov	r0, fp
 	bl	printf
@@ -21823,25 +21884,25 @@ FtlCheckVpc:
 	movw	r2, #65535
 	ldrh	r3, [r3, r7, lsl #1]
 	cmp	r3, r2
-	beq	.L3032
+	beq	.L3046
 	ldrh	r2, [r10, r7, lsl #1]
 	cmp	r2, r3
 	it	hi
 	movhi	r6, #1
-.L3032:
+.L3046:
 	adds	r4, r4, #1
-	b	.L3031
-.L3052:
+	b	.L3045
+.L3066:
 	.align	2
-.L3051:
+.L3065:
 	.word	.LANCHOR73
 	.word	check_valid_page_count_table
 	.word	.LANCHOR248
-	.word	.LC46
+	.word	.LC45
 	.word	.LANCHOR40
 	.word	.LANCHOR84
+	.word	.LC73
 	.word	.LC74
-	.word	.LC75
 	.word	.LANCHOR88
 	.word	.LANCHOR89
 	.word	.LANCHOR82
@@ -21849,8 +21910,8 @@ FtlCheckVpc:
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
+	.word	.LC75
 	.word	.LC76
-	.word	.LC77
 	.size	FtlCheckVpc, .-FtlCheckVpc
 	.section	.text.FtlDumpSysBlock,"ax",%progbits
 	.align	1
@@ -21865,27 +21926,27 @@ FtlDumpSysBlock:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	lsl	r10, r0, #10
-	ldr	r5, .L3060
+	ldr	r5, .L3074
 	sub	sp, sp, #24
 	mov	r7, r0
 	movs	r6, #0
-	ldr	r4, .L3060+4
+	ldr	r4, .L3074+4
 	ldr	r3, [r5]
-	ldr	r8, .L3060+20
+	ldr	r8, .L3074+20
 	mov	fp, r4
 	str	r3, [r4, #8]
-	ldr	r3, .L3060+8
+	ldr	r3, .L3074+8
 	ldr	r3, [r3]
 	str	r3, [r4, #12]
-.L3054:
+.L3068:
 	ldrh	r2, [r8]
 	sxth	r3, r6
 	cmp	r3, r2
-	blt	.L3056
+	blt	.L3070
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3056:
+.L3070:
 	movs	r2, #1
 	orr	r3, r3, r10
 	mov	r1, r2
@@ -21895,7 +21956,7 @@ FtlDumpSysBlock:
 	ldr	r2, [r4, #8]
 	mov	r1, r7
 	ldr	r3, [r4, #12]
-	ldr	r0, .L3060+12
+	ldr	r0, .L3074+12
 	ldr	r2, [r2]
 	str	r2, [sp, #16]
 	ldr	r2, [r3, #12]
@@ -21911,23 +21972,23 @@ FtlDumpSysBlock:
 	ldr	r3, [r4, #12]
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L3055
+	beq	.L3069
 	mov	r3, #768
 	movs	r2, #4
 	ldr	r1, [r5]
-	ldr	r0, .L3060+16
+	ldr	r0, .L3074+16
 	bl	rknand_print_hex
-.L3055:
+.L3069:
 	adds	r6, r6, #1
-	b	.L3054
-.L3061:
+	b	.L3068
+.L3075:
 	.align	2
-.L3060:
+.L3074:
 	.word	.LANCHOR183
 	.word	.LANCHOR202
 	.word	.LANCHOR188
+	.word	.LC77
 	.word	.LC78
-	.word	.LC79
 	.word	.LANCHOR54
 	.size	FtlDumpSysBlock, .-FtlDumpSysBlock
 	.section	.text.dump_map_info,"ax",%progbits
@@ -21941,32 +22002,32 @@ FtlDumpSysBlock:
 dump_map_info:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L3076
+	ldr	r3, .L3090
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #40
-	ldr	r8, .L3076+72
+	ldr	r8, .L3090+72
 	ldrh	r5, [r3]
-.L3063:
-	ldr	r3, .L3076+4
+.L3077:
+	ldr	r3, .L3090+4
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	bhi	.L3070
-	ldr	r4, .L3076+8
+	bhi	.L3084
+	ldr	r4, .L3090+8
 	movs	r7, #0
-.L3071:
-	ldr	r3, .L3076+12
+.L3085:
+	ldr	r3, .L3090+12
 	sxth	r5, r7
 	ldrh	r3, [r3]
 	cmp	r5, r3
-	bge	.L3074
+	bge	.L3088
 	lsls	r5, r5, #1
 	movs	r6, #0
-	ldr	r8, .L3076+76
-	b	.L3075
-.L3065:
+	ldr	r8, .L3090+76
+	b	.L3089
+.L3079:
 	str	r3, [sp, #36]
 	mov	r1, r5
-	ldr	r3, .L3076+16
+	ldr	r3, .L3090+16
 	str	r2, [sp, #32]
 	ldrb	r0, [r3, r6]	@ zero_extendqisi2
 	bl	V2P_block
@@ -21974,7 +22035,7 @@ dump_map_info:
 	bl	FtlBbmIsBadBlock
 	ldr	r2, [sp, #32]
 	ldr	r3, [sp, #36]
-	cbnz	r0, .L3064
+	cbnz	r0, .L3078
 	ldr	r1, [sp, #28]
 	mla	r0, fp, r4, r7
 	lsls	r1, r1, #10
@@ -21987,29 +22048,29 @@ dump_map_info:
 	ldr	r1, [sp, #24]
 	add	r1, r1, ip
 	str	r1, [r0, #12]
-.L3064:
+.L3078:
 	adds	r6, r6, #1
-.L3072:
+.L3086:
 	uxth	r1, r6
 	cmp	r2, r1
-	bhi	.L3065
-	cbnz	r4, .L3066
-.L3069:
+	bhi	.L3079
+	cbnz	r4, .L3080
+.L3083:
 	adds	r5, r5, #1
 	uxth	r5, r5
-	b	.L3063
-.L3066:
-	ldr	r10, .L3076+80
+	b	.L3077
+.L3080:
+	ldr	r10, .L3090+80
 	mov	r0, r7
 	movs	r6, #0
 	movs	r7, #36
 	movs	r2, #1
 	mov	r1, r4
 	bl	FlashReadPages
-.L3067:
+.L3081:
 	uxth	r3, r6
 	cmp	r4, r3
-	bls	.L3069
+	bls	.L3083
 	ldr	r3, [r8]
 	mla	r3, r7, r6, r3
 	adds	r6, r6, #1
@@ -22030,24 +22091,24 @@ dump_map_info:
 	ldr	r3, [r1]
 	ubfx	r1, r2, #10, #16
 	bl	printf
-	b	.L3067
-.L3070:
-	ldr	r1, .L3076+20
+	b	.L3081
+.L3084:
+	ldr	r1, .L3090+20
 	movs	r6, #0
-	ldr	r3, .L3076+24
+	ldr	r3, .L3090+24
 	mov	r4, r6
 	ldr	r7, [r8]
 	mov	fp, #36
 	ldr	r1, [r1]
 	ldrh	r2, [r3]
-	ldr	r3, .L3076+28
+	ldr	r3, .L3090+28
 	str	r1, [sp, #24]
-	ldr	r1, .L3076+32
+	ldr	r1, .L3090+32
 	ldr	r3, [r3]
 	ldrh	r10, [r1]
-	b	.L3072
-.L3073:
-	ldr	r10, .L3076+44
+	b	.L3086
+.L3087:
+	ldr	r10, .L3090+44
 	mov	r0, r4
 	ldr	r2, [r10]
 	ldrh	r2, [r2, r5]
@@ -22063,7 +22124,7 @@ dump_map_info:
 	ldrh	r1, [r1, r5]
 	str	r0, [sp, #20]
 	ldr	r2, [r2]
-	ldr	r0, .L3076+36
+	ldr	r0, .L3090+36
 	str	r2, [sp, #16]
 	ldr	r2, [r3, #12]
 	str	r2, [sp, #12]
@@ -22075,41 +22136,41 @@ dump_map_info:
 	str	r3, [sp]
 	ldm	r4, {r2, r3}
 	bl	printf
-.L3075:
+.L3089:
 	ldrh	r2, [r8]
 	sxth	r3, r6
 	adds	r6, r6, #1
 	cmp	r3, r2
-	blt	.L3073
+	blt	.L3087
 	adds	r7, r7, #1
-	b	.L3071
-.L3074:
-	ldr	r3, .L3076+40
+	b	.L3085
+.L3088:
+	ldr	r3, .L3090+40
 	movs	r2, #2
-	ldr	r1, .L3076+44
-	ldr	r0, .L3076+48
+	ldr	r1, .L3090+44
+	ldr	r0, .L3090+48
 	ldr	r3, [r3]
 	ldr	r1, [r1]
 	bl	rknand_print_hex
-	ldr	r4, .L3076+52
+	ldr	r4, .L3090+52
 	movs	r2, #4
-	ldr	r1, .L3076+56
-	ldr	r0, .L3076+60
+	ldr	r1, .L3090+56
+	ldr	r0, .L3090+60
 	ldrh	r3, [r4]
 	ldr	r1, [r1]
 	bl	rknand_print_hex
-	ldr	r1, .L3076+64
+	ldr	r1, .L3090+64
 	movs	r2, #4
 	ldrh	r3, [r4]
-	ldr	r0, .L3076+68
+	ldr	r0, .L3090+68
 	ldr	r1, [r1]
 	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
 	b	rknand_print_hex
-.L3077:
+.L3091:
 	.align	2
-.L3076:
+.L3090:
 	.word	.LANCHOR40
 	.word	.LANCHOR41
 	.word	.LANCHOR202
@@ -22119,18 +22180,18 @@ dump_map_info:
 	.word	.LANCHOR38
 	.word	.LANCHOR105
 	.word	.LANCHOR59
-	.word	.LC49
+	.word	.LC48
 	.word	.LANCHOR65
 	.word	.LANCHOR129
-	.word	.LC81
+	.word	.LC80
 	.word	.LANCHOR67
 	.word	.LANCHOR131
-	.word	.LC82
+	.word	.LC81
 	.word	.LANCHOR195
-	.word	.LC83
+	.word	.LC82
 	.word	.LANCHOR180
 	.word	.LANCHOR54
-	.word	.LC80
+	.word	.LC79
 	.size	dump_map_info, .-dump_map_info
 	.global	FtlMallocOffset
 	.global	FtlMallocBuffer
@@ -26445,7 +26506,7 @@ refValueDefault:
 .LC32:
 	.ascii	"prog read d error: = %x %x %x\012\000"
 	.section	.rodata.FlashReadFacBbtData.str1.1,"aMS",%progbits,1
-.LC54:
+.LC53:
 	.ascii	"BBT:\000"
 	.section	.rodata.FlashReadIdbDataRaw.str1.1,"aMS",%progbits,1
 .LC14:
@@ -26475,29 +26536,29 @@ refValueDefault:
 .LC35:
 	.ascii	"FtlBbmTblFlush error = %x error count = %d\012\000"
 	.section	.rodata.FtlCheckVpc.str1.1,"aMS",%progbits,1
-.LC74:
+.LC73:
 	.ascii	"vpc1\000"
-.LC75:
+.LC74:
 	.ascii	"vpc2\000"
-.LC76:
+.LC75:
 	.ascii	"FtlCheckVpc2 %x = %x  %x\012\000"
-.LC77:
+.LC76:
 	.ascii	"free blk vpc error %x = %x  %x\012\000"
 	.section	.rodata.FtlDumpBlockInfo.str1.1,"aMS",%progbits,1
-.LC46:
+.LC45:
 	.ascii	"...%s enter...\012\000"
-.LC47:
+.LC46:
 	.ascii	"superBlkID = %x vpc=%x\012\000"
-.LC48:
+.LC47:
 	.ascii	"flashmode = %x pagenum = %x %x\012\000"
-.LC49:
+.LC48:
 	.ascii	"id = %x,%x addr= %x,spare= %x %x %x %x data=%x %x\012"
 	.ascii	"\000"
 	.section	.rodata.FtlDumpSysBlock.str1.1,"aMS",%progbits,1
-.LC78:
+.LC77:
 	.ascii	"id = %x,%x addr= %x,spare= %x %x %x %x data = %x\012"
 	.ascii	"\000"
-.LC79:
+.LC78:
 	.ascii	":\000"
 	.section	.rodata.FtlFreeSysBlkQueueOut.str1.1,"aMS",%progbits,1
 .LC3:
@@ -26506,64 +26567,64 @@ refValueDefault:
 	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\012"
 	.ascii	"\000"
 	.section	.rodata.FtlGcFreeTempBlock.str1.1,"aMS",%progbits,1
-.LC65:
+.LC64:
 	.ascii	"GC des block %x done\012\000"
 	.section	.rodata.FtlGcScanTempBlk.str1.1,"aMS",%progbits,1
-.LC53:
+.LC52:
 	.ascii	"FtlGcScanTempBlkError ID %x %x!!!!!!!\012\000"
 	.section	.rodata.FtlInit.str1.1,"aMS",%progbits,1
+.LC66:
+	.ascii	"FTL version: 5.0.50 20180905\000"
 .LC67:
-	.ascii	"FTL version: 5.0.49 20180810\000"
-.LC68:
 	.ascii	"...%s: no bad block mapping table, format device\012"
 	.ascii	"\000"
-.LC69:
+.LC68:
 	.ascii	"...%s FtlSysBlkInit error ,format device!\012\000"
 	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",%progbits,1
-.LC44:
+.LC43:
 	.ascii	"no ect\000"
 	.section	.rodata.FtlMapWritePage.str1.1,"aMS",%progbits,1
-.LC41:
+.LC40:
 	.ascii	"FtlMapWritePage error = %x\012\000"
-.LC42:
+.LC41:
 	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
 	.section	.rodata.FtlProgPages.str1.1,"aMS",%progbits,1
-.LC58:
+.LC57:
 	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
 	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",%progbits,1
-.LC62:
+.LC61:
 	.ascii	"RSB refresh addr %x\012\000"
-.LC63:
+.LC62:
 	.ascii	"spuer block %x vpn is 0\012 \000"
-.LC64:
+.LC63:
 	.ascii	"g_recovery_ppa %x ver %x\012 \000"
 	.section	.rodata.FtlScanAllBlock.str1.1,"aMS",%progbits,1
-.LC50:
+.LC49:
 	.ascii	"blk = %x vpc=%x mode = %x\012\000"
-.LC51:
+.LC50:
 	.ascii	"mlc id = %x,%x addr= %x,spare= %x %x %x %x data=%x "
 	.ascii	"%x\012\000"
-.LC52:
+.LC51:
 	.ascii	"slc id = %x,%x addr= %x,spare= %x %x %x %x data=%x "
 	.ascii	"%x\012\000"
 	.section	.rodata.FtlVendorPartRead.str1.1,"aMS",%progbits,1
-.LC43:
+.LC42:
 	.ascii	"FtlVendorPartRead refresh = %x phyAddr = %x\012\000"
 	.section	.rodata.FtlVpcTblFlush.str1.1,"aMS",%progbits,1
 .LC38:
 	.ascii	"FtlVpcTblFlush error = %x error count = %d\012\000"
 	.section	.rodata.FtlWrite.str1.1,"aMS",%progbits,1
-.LC73:
+.LC72:
 	.ascii	"FtlWrite: lpa error:%x %x\012\000"
 	.section	.rodata.Ftl_load_ext_data.str1.1,"aMS",%progbits,1
-.LC45:
+.LC44:
 	.ascii	"slc mode\000"
 	.section	.rodata.Ftlscanalldata.str1.1,"aMS",%progbits,1
-.LC59:
+.LC58:
 	.ascii	"Ftlscanalldata = %x\012\000"
-.LC60:
+.LC59:
 	.ascii	"scan lpa = %x ppa= %x\012\000"
-.LC61:
+.LC60:
 	.ascii	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\012"
 	.ascii	"\000"
 	.section	.rodata.HynixGetReadRetryDefault.str1.1,"aMS",%progbits,1
@@ -26581,203 +26642,203 @@ refValueDefault:
 	.section	.rodata.MicronReadRetrial.str1.1,"aMS",%progbits,1
 .LC13:
 	.ascii	"micron RR %d row=%x,count %d,status=%d\012\000"
-	.section	.rodata.__func__.10473,"a",%progbits
+	.section	.rodata.__func__.10408,"a",%progbits
 	.set	.LANCHOR245,. + 0
-	.type	__func__.10473, %object
-	.size	__func__.10473, 8
-__func__.10473:
+	.type	__func__.10408, %object
+	.size	__func__.10408, 8
+__func__.10408:
 	.ascii	"FtlInit\000"
-	.section	.rodata.__func__.10533,"a",%progbits
+	.section	.rodata.__func__.10468,"a",%progbits
 	.set	.LANCHOR229,. + 0
-	.type	__func__.10533, %object
-	.size	__func__.10533, 13
-__func__.10533:
+	.type	__func__.10468, %object
+	.size	__func__.10468, 13
+__func__.10468:
 	.ascii	"FtlProgPages\000"
-	.section	.rodata.__func__.10559,"a",%progbits
+	.section	.rodata.__func__.10494,"a",%progbits
 	.set	.LANCHOR247,. + 0
-	.type	__func__.10559, %object
-	.size	__func__.10559, 9
-__func__.10559:
+	.type	__func__.10494, %object
+	.size	__func__.10494, 9
+__func__.10494:
 	.ascii	"FtlWrite\000"
-	.section	.rodata.__func__.10622,"a",%progbits
+	.section	.rodata.__func__.10577,"a",%progbits
 	.set	.LANCHOR124,. + 0
-	.type	__func__.10622, %object
-	.size	__func__.10622, 14
-__func__.10622:
+	.type	__func__.10577, %object
+	.size	__func__.10577, 14
+__func__.10577:
 	.ascii	"FtlBbt2Bitmap\000"
-	.section	.rodata.__func__.10668,"a",%progbits
+	.section	.rodata.__func__.10623,"a",%progbits
 	.set	.LANCHOR211,. + 0
-	.type	__func__.10668, %object
-	.size	__func__.10668, 11
-__func__.10668:
+	.type	__func__.10623, %object
+	.size	__func__.10623, 11
+__func__.10623:
 	.ascii	"FtlLoadBbt\000"
-	.section	.rodata.__func__.10761,"a",%progbits
+	.section	.rodata.__func__.10716,"a",%progbits
 	.set	.LANCHOR90,. + 0
-	.type	__func__.10761, %object
-	.size	__func__.10761, 17
-__func__.10761:
+	.type	__func__.10716, %object
+	.size	__func__.10716, 17
+__func__.10716:
 	.ascii	"INSERT_FREE_LIST\000"
-	.section	.rodata.__func__.10765,"a",%progbits
+	.section	.rodata.__func__.10720,"a",%progbits
 	.set	.LANCHOR87,. + 0
-	.type	__func__.10765, %object
-	.size	__func__.10765, 17
-__func__.10765:
+	.type	__func__.10720, %object
+	.size	__func__.10720, 17
+__func__.10720:
 	.ascii	"INSERT_DATA_LIST\000"
-	.section	.rodata.__func__.10802,"a",%progbits
+	.section	.rodata.__func__.10757,"a",%progbits
 	.set	.LANCHOR91,. + 0
-	.type	__func__.10802, %object
-	.size	__func__.10802, 17
-__func__.10802:
+	.type	__func__.10757, %object
+	.size	__func__.10757, 17
+__func__.10757:
 	.ascii	"List_remove_node\000"
-	.section	.rodata.__func__.10832,"a",%progbits
+	.section	.rodata.__func__.10787,"a",%progbits
 	.set	.LANCHOR95,. + 0
-	.type	__func__.10832, %object
-	.size	__func__.10832, 22
-__func__.10832:
+	.type	__func__.10787, %object
+	.size	__func__.10787, 22
+__func__.10787:
 	.ascii	"List_update_data_list\000"
-	.section	.rodata.__func__.10839,"a",%progbits
+	.section	.rodata.__func__.10794,"a",%progbits
 	.set	.LANCHOR228,. + 0
-	.type	__func__.10839, %object
-	.size	__func__.10839, 20
-__func__.10839:
+	.type	__func__.10794, %object
+	.size	__func__.10794, 20
+__func__.10794:
 	.ascii	"ftl_load_l2p_region\000"
-	.section	.rodata.__func__.10870,"a",%progbits
+	.section	.rodata.__func__.10825,"a",%progbits
 	.set	.LANCHOR96,. + 0
-	.type	__func__.10870, %object
-	.size	__func__.10870, 26
-__func__.10870:
+	.type	__func__.10825, %object
+	.size	__func__.10825, 26
+__func__.10825:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.section	.rodata.__func__.10884,"a",%progbits
+	.section	.rodata.__func__.10835,"a",%progbits
 	.set	.LANCHOR212,. + 0
-	.type	__func__.10884, %object
-	.size	__func__.10884, 15
-__func__.10884:
+	.type	__func__.10835, %object
+	.size	__func__.10835, 15
+__func__.10835:
 	.ascii	"ftl_map_blk_gc\000"
-	.section	.rodata.__func__.10897,"a",%progbits
+	.section	.rodata.__func__.10848,"a",%progbits
 	.set	.LANCHOR213,. + 0
-	.type	__func__.10897, %object
-	.size	__func__.10897, 31
-__func__.10897:
+	.type	__func__.10848, %object
+	.size	__func__.10848, 31
+__func__.10848:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.section	.rodata.__func__.10910,"a",%progbits
+	.section	.rodata.__func__.10861,"a",%progbits
 	.set	.LANCHOR214,. + 0
-	.type	__func__.10910, %object
-	.size	__func__.10910, 16
-__func__.10910:
+	.type	__func__.10861, %object
+	.size	__func__.10861, 16
+__func__.10861:
 	.ascii	"FtlMapWritePage\000"
-	.section	.rodata.__func__.10930,"a",%progbits
+	.section	.rodata.__func__.10881,"a",%progbits
 	.set	.LANCHOR99,. + 0
-	.type	__func__.10930, %object
-	.size	__func__.10930, 22
-__func__.10930:
+	.type	__func__.10881, %object
+	.size	__func__.10881, 22
+__func__.10881:
 	.ascii	"select_l2p_ram_region\000"
-	.section	.rodata.__func__.10946,"a",%progbits
+	.section	.rodata.__func__.10897,"a",%progbits
 	.set	.LANCHOR227,. + 0
-	.type	__func__.10946, %object
-	.size	__func__.10946, 9
-__func__.10946:
+	.type	__func__.10897, %object
+	.size	__func__.10897, 9
+__func__.10897:
 	.ascii	"log2phys\000"
-	.section	.rodata.__func__.11008,"a",%progbits
+	.section	.rodata.__func__.10959,"a",%progbits
 	.set	.LANCHOR210,. + 0
-	.type	__func__.11008, %object
-	.size	__func__.11008, 15
-__func__.11008:
+	.type	__func__.10959, %object
+	.size	__func__.10959, 15
+__func__.10959:
 	.ascii	"FtlVpcTblFlush\000"
-	.section	.rodata.__func__.11027,"a",%progbits
+	.section	.rodata.__func__.10978,"a",%progbits
 	.set	.LANCHOR220,. + 0
-	.type	__func__.11027, %object
-	.size	__func__.11027, 14
-__func__.11027:
+	.type	__func__.10978, %object
+	.size	__func__.10978, 14
+__func__.10978:
 	.ascii	"FtlScanSysBlk\000"
-	.section	.rodata.__func__.11081,"a",%progbits
+	.section	.rodata.__func__.11032,"a",%progbits
 	.set	.LANCHOR221,. + 0
-	.type	__func__.11081, %object
-	.size	__func__.11081, 15
-__func__.11081:
+	.type	__func__.11032, %object
+	.size	__func__.11032, 15
+__func__.11032:
 	.ascii	"FtlLoadSysInfo\000"
-	.section	.rodata.__func__.11092,"a",%progbits
+	.section	.rodata.__func__.11043,"a",%progbits
 	.set	.LANCHOR248,. + 0
-	.type	__func__.11092, %object
-	.size	__func__.11092, 12
-__func__.11092:
+	.type	__func__.11043, %object
+	.size	__func__.11043, 12
+__func__.11043:
 	.ascii	"FtlCheckVpc\000"
-	.section	.rodata.__func__.11124,"a",%progbits
+	.section	.rodata.__func__.11075,"a",%progbits
 	.set	.LANCHOR224,. + 0
-	.type	__func__.11124, %object
-	.size	__func__.11124, 17
-__func__.11124:
+	.type	__func__.11075, %object
+	.size	__func__.11075, 17
+__func__.11075:
 	.ascii	"FtlDumpBlockInfo\000"
-	.section	.rodata.__func__.11143,"a",%progbits
+	.section	.rodata.__func__.11094,"a",%progbits
 	.set	.LANCHOR225,. + 0
-	.type	__func__.11143, %object
-	.size	__func__.11143, 16
-__func__.11143:
+	.type	__func__.11094, %object
+	.size	__func__.11094, 16
+__func__.11094:
 	.ascii	"FtlScanAllBlock\000"
-	.section	.rodata.__func__.11248,"a",%progbits
+	.section	.rodata.__func__.11199,"a",%progbits
 	.set	.LANCHOR233,. + 0
-	.type	__func__.11248, %object
-	.size	__func__.11248, 16
-__func__.11248:
+	.type	__func__.11199, %object
+	.size	__func__.11199, 16
+__func__.11199:
 	.ascii	"FtlReUsePrevPpa\000"
-	.section	.rodata.__func__.11281,"a",%progbits
+	.section	.rodata.__func__.11232,"a",%progbits
 	.set	.LANCHOR234,. + 0
-	.type	__func__.11281, %object
-	.size	__func__.11281, 22
-__func__.11281:
+	.type	__func__.11232, %object
+	.size	__func__.11232, 22
+__func__.11232:
 	.ascii	"FtlRecoverySuperblock\000"
-	.section	.rodata.__func__.11335,"a",%progbits
+	.section	.rodata.__func__.11286,"a",%progbits
 	.set	.LANCHOR102,. + 0
-	.type	__func__.11335, %object
-	.size	__func__.11335, 16
-__func__.11335:
+	.type	__func__.11286, %object
+	.size	__func__.11286, 16
+__func__.11286:
 	.ascii	"make_superblock\000"
-	.section	.rodata.__func__.11355,"a",%progbits
+	.section	.rodata.__func__.11306,"a",%progbits
 	.set	.LANCHOR140,. + 0
-	.type	__func__.11355, %object
-	.size	__func__.11355, 18
-__func__.11355:
+	.type	__func__.11306, %object
+	.size	__func__.11306, 18
+__func__.11306:
 	.ascii	"SupperBlkListInit\000"
-	.section	.rodata.__func__.11432,"a",%progbits
+	.section	.rodata.__func__.11383,"a",%progbits
 	.set	.LANCHOR203,. + 0
-	.type	__func__.11432, %object
-	.size	__func__.11432, 25
-__func__.11432:
+	.type	__func__.11383, %object
+	.size	__func__.11383, 25
+__func__.11383:
 	.ascii	"allocate_data_superblock\000"
-	.section	.rodata.__func__.11446,"a",%progbits
+	.section	.rodata.__func__.11397,"a",%progbits
 	.set	.LANCHOR219,. + 0
-	.type	__func__.11446, %object
-	.size	__func__.11446, 29
-__func__.11446:
+	.type	__func__.11397, %object
+	.size	__func__.11397, 29
+__func__.11397:
 	.ascii	"allocate_new_data_superblock\000"
-	.section	.rodata.__func__.11452,"a",%progbits
+	.section	.rodata.__func__.11403,"a",%progbits
 	.set	.LANCHOR208,. + 0
-	.type	__func__.11452, %object
-	.size	__func__.11452, 19
-__func__.11452:
+	.type	__func__.11403, %object
+	.size	__func__.11403, 19
+__func__.11403:
 	.ascii	"get_new_active_ppa\000"
-	.section	.rodata.__func__.11463,"a",%progbits
+	.section	.rodata.__func__.11414,"a",%progbits
 	.set	.LANCHOR206,. + 0
-	.type	__func__.11463, %object
-	.size	__func__.11463, 16
-__func__.11463:
+	.type	__func__.11414, %object
+	.size	__func__.11414, 16
+__func__.11414:
 	.ascii	"update_vpc_list\000"
-	.section	.rodata.__func__.11468,"a",%progbits
+	.section	.rodata.__func__.11419,"a",%progbits
 	.set	.LANCHOR207,. + 0
-	.type	__func__.11468, %object
-	.size	__func__.11468, 20
-__func__.11468:
+	.type	__func__.11419, %object
+	.size	__func__.11419, 20
+__func__.11419:
 	.ascii	"decrement_vpc_count\000"
-	.section	.rodata.__func__.11536,"a",%progbits
+	.section	.rodata.__func__.11487,"a",%progbits
 	.set	.LANCHOR239,. + 0
-	.type	__func__.11536, %object
-	.size	__func__.11536, 19
-__func__.11536:
+	.type	__func__.11487, %object
+	.size	__func__.11487, 19
+__func__.11487:
 	.ascii	"FtlGcFreeTempBlock\000"
-	.section	.rodata.__func__.11630,"a",%progbits
+	.section	.rodata.__func__.11581,"a",%progbits
 	.set	.LANCHOR243,. + 0
-	.type	__func__.11630, %object
-	.size	__func__.11630, 23
-__func__.11630:
+	.type	__func__.11581, %object
+	.size	__func__.11581, 23
+__func__.11581:
 	.ascii	"rk_ftl_garbage_collect\000"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",%progbits,1
 .LC36:
@@ -26785,27 +26846,25 @@ __func__.11630:
 .LC37:
 	.ascii	"decrement_vpc_count %x = %d in free list\012\000"
 	.section	.rodata.dump_map_info.str1.1,"aMS",%progbits,1
-.LC80:
+.LC79:
 	.ascii	"phyBlk = %x,addr= %x,spare= %x %x %x %x data=%x %x\012"
 	.ascii	"\000"
-.LC81:
+.LC80:
 	.ascii	"Mblk:\000"
-.LC82:
+.LC81:
 	.ascii	"L2P:\000"
-.LC83:
+.LC82:
 	.ascii	"L2PC:\000"
 	.section	.rodata.ftl_fix_nand_power_lost_error.str1.1,"aMS",%progbits,1
-.LC71:
+.LC70:
 	.ascii	"fix power lost blk = %x vpc=%x\012\000"
-.LC72:
+.LC71:
 	.ascii	"erase power lost blk = %x vpc=%x\012\000"
 	.section	.rodata.ftl_map_blk_alloc_new_blk.str1.1,"aMS",%progbits,1
 .LC8:
 	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d\012\000"
 	.section	.rodata.ftl_map_blk_gc.str1.1,"aMS",%progbits,1
 .LC39:
-	.ascii	"ftl_map_blk_gc blk info: %x %x %x\012\000"
-.LC40:
 	.ascii	"page map lost: %x %x\012\000"
 	.section	.rodata.idb_write_data.str1.1,"aMS",%progbits,1
 .LC15:
@@ -26815,17 +26874,17 @@ __func__.11630:
 .LC17:
 	.ascii	"write_idblock fail! %x\012\000"
 	.section	.rodata.log2phys.str1.1,"aMS",%progbits,1
-.LC55:
-	.ascii	"load_l2p_region refresh = %x phyAddr = %x\012\000"
-.LC56:
+.LC54:
 	.ascii	"region_id = %x phyAddr = %x\012\000"
-.LC57:
+.LC55:
 	.ascii	"map_ppn:\000"
+.LC56:
+	.ascii	"load_l2p_region refresh = %x phyAddr = %x\012\000"
 	.section	.rodata.rk_ftl_garbage_collect.str1.1,"aMS",%progbits,1
-.LC66:
+.LC65:
 	.ascii	"g_gc_superblock_free %x %x %x %x %x\012\000"
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",%progbits,1
-.LC70:
+.LC69:
 	.ascii	"FtlInit %x\012\000"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",%progbits,1
 .LC18:
diff --git a/drivers/rknand/rk_ftl_arm_v8.S b/drivers/rknand/rk_ftl_arm_v8.S
index 6afa53b285..d2d1e42d45 100644
--- a/drivers/rknand/rk_ftl_arm_v8.S
+++ b/drivers/rknand/rk_ftl_arm_v8.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2018-08-10
+ * date: 2018-09-05
  */
 	.arch armv8-a
 	.file	"rk_ftl_arm_v8.c"
@@ -3347,7 +3347,7 @@ ftl_map_blk_alloc_new_blk:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
 	bhi	.L491
-	mov	w2, 628
+	mov	w2, 629
 	adrp	x1, .LANCHOR96
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR96
@@ -3406,7 +3406,7 @@ select_l2p_ram_region:
 	bne	.L502
 	cmp	w19, w1
 	bcc	.L495
-	mov	w2, 863
+	mov	w2, 855
 	adrp	x1, .LANCHOR99
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR99
@@ -3602,7 +3602,7 @@ make_superblock:
 	ldrh	w0, [x0, #:lo12:.LANCHOR40]
 	cmp	w1, w0
 	bcc	.L525
-	mov	w2, 2613
+	mov	w2, 2544
 	adrp	x1, .LANCHOR102
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR102
@@ -4052,11 +4052,11 @@ FtlGcUpdatePage:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
-	.section	.text.FtlGcRefreshBlock,"ax",@progbits
+	.section	.text.FtlGcRefreshOpenBlock,"ax",@progbits
 	.align	2
-	.global	FtlGcRefreshBlock
-	.type	FtlGcRefreshBlock, %function
-FtlGcRefreshBlock:
+	.global	FtlGcRefreshOpenBlock
+	.type	FtlGcRefreshOpenBlock, %function
+FtlGcRefreshOpenBlock:
 	adrp	x8, .LANCHOR113
 	and	w0, w0, 65535
 	ldrh	w10, [x8, #:lo12:.LANCHOR113]
@@ -4096,14 +4096,55 @@ FtlGcRefreshBlock:
 	bne	.L598
 	strh	w0, [x2, #:lo12:.LANCHOR116]
 	b	.L598
-	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
-	.section	.text.FtlGcRefreshOpenBlock,"ax",@progbits
-	.align	2
-	.global	FtlGcRefreshOpenBlock
-	.type	FtlGcRefreshOpenBlock, %function
-FtlGcRefreshOpenBlock:
-	b	FtlGcRefreshBlock
 	.size	FtlGcRefreshOpenBlock, .-FtlGcRefreshOpenBlock
+	.section	.text.FtlGcRefreshBlock,"ax",@progbits
+	.align	2
+	.global	FtlGcRefreshBlock
+	.type	FtlGcRefreshBlock, %function
+FtlGcRefreshBlock:
+	adrp	x8, .LANCHOR113
+	and	w0, w0, 65535
+	ldrh	w10, [x8, #:lo12:.LANCHOR113]
+	cmp	w10, w0
+	beq	.L610
+	adrp	x6, .LANCHOR114
+	ldrh	w7, [x6, #:lo12:.LANCHOR114]
+	cmp	w0, w7
+	beq	.L610
+	adrp	x4, .LANCHOR115
+	ldrh	w5, [x4, #:lo12:.LANCHOR115]
+	cmp	w0, w5
+	beq	.L610
+	adrp	x2, .LANCHOR116
+	ldrh	w3, [x2, #:lo12:.LANCHOR116]
+	cmp	w0, w3
+	beq	.L610
+	mov	w1, 65535
+	cmp	w10, w1
+	bne	.L604
+	strh	w0, [x8, #:lo12:.LANCHOR113]
+.L610:
+	mov	w0, 0
+	ret
+.L604:
+	cmp	w7, w1
+	bne	.L605
+	strh	w0, [x6, #:lo12:.LANCHOR114]
+	b	.L610
+.L605:
+	cmp	w5, w1
+	bne	.L606
+	strh	w0, [x4, #:lo12:.LANCHOR115]
+	b	.L610
+.L606:
+	cmp	w3, w1
+	bne	.L611
+	strh	w0, [x2, #:lo12:.LANCHOR116]
+	b	.L610
+.L611:
+	mov	w0, -1
+	ret
+	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
 	.section	.text.FtlGcMarkBadPhyBlk,"ax",@progbits
 	.align	2
 	.global	FtlGcMarkBadPhyBlk
@@ -4118,39 +4159,39 @@ FtlGcMarkBadPhyBlk:
 	bl	FtlGcRefreshBlock
 	adrp	x0, .LANCHOR28
 	ldr	w0, [x0, #:lo12:.LANCHOR28]
-	cbz	w0, .L604
+	cbz	w0, .L613
 	adrp	x1, .LANCHOR79
 	ubfiz	x0, x11, 1, 16
 	ldr	x2, [x1, #:lo12:.LANCHOR79]
 	ldrh	w1, [x2, x0]
 	cmp	w1, 39
-	bls	.L604
+	bls	.L613
 	sub	w1, w1, #40
 	strh	w1, [x2, x0]
-.L604:
+.L613:
 	adrp	x1, .LANCHOR117
 	adrp	x3, .LANCHOR118
 	add	x3, x3, :lo12:.LANCHOR118
 	mov	x2, 0
 	ldrh	w0, [x1, #:lo12:.LANCHOR117]
-.L605:
+.L614:
 	cmp	w0, w2, uxth
-	bhi	.L607
+	bhi	.L616
 	cmp	w0, 15
-	bhi	.L606
+	bhi	.L615
 	add	w2, w0, 1
 	strh	w2, [x1, #:lo12:.LANCHOR117]
 	adrp	x1, .LANCHOR118
 	add	x1, x1, :lo12:.LANCHOR118
 	strh	w12, [x1, w0, sxtw 1]
-	b	.L606
-.L607:
+	b	.L615
+.L616:
 	add	x2, x2, 1
 	add	x4, x3, x2, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w12
-	bne	.L605
-.L606:
+	bne	.L614
+.L615:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
@@ -4162,20 +4203,20 @@ FtlGcMarkBadPhyBlk:
 FtlGcReFreshBadBlk:
 	adrp	x0, .LANCHOR117
 	ldrh	w0, [x0, #:lo12:.LANCHOR117]
-	cbz	w0, .L619
+	cbz	w0, .L628
 	adrp	x1, .LANCHOR113
 	ldrh	w2, [x1, #:lo12:.LANCHOR113]
 	mov	w1, 65535
 	cmp	w2, w1
-	bne	.L619
+	bne	.L628
 	stp	x29, x30, [sp, -16]!
 	adrp	x11, .LANCHOR119
 	add	x29, sp, 0
 	ldrh	w1, [x11, #:lo12:.LANCHOR119]
 	cmp	w1, w0
-	bcc	.L614
+	bcc	.L623
 	strh	wzr, [x11, #:lo12:.LANCHOR119]
-.L614:
+.L623:
 	ldrh	w1, [x11, #:lo12:.LANCHOR119]
 	adrp	x0, .LANCHOR118
 	add	x0, x0, :lo12:.LANCHOR118
@@ -4188,7 +4229,7 @@ FtlGcReFreshBadBlk:
 	strh	w0, [x11, #:lo12:.LANCHOR119]
 	mov	w0, 0
 	ret
-.L619:
+.L628:
 	mov	w0, 0
 	ret
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
@@ -4203,9 +4244,9 @@ flash_boot_enter_slc_mode:
 	mov	w1, 12336
 	movk	w1, 0x5638, lsl 16
 	cmp	w2, w1
-	bne	.L622
+	bne	.L631
 	b	flash_enter_slc_mode
-.L622:
+.L631:
 	ret
 	.size	flash_boot_enter_slc_mode, .-flash_boot_enter_slc_mode
 	.section	.text.flash_boot_exit_slc_mode,"ax",@progbits
@@ -4219,9 +4260,9 @@ flash_boot_exit_slc_mode:
 	mov	w1, 12336
 	movk	w1, 0x5638, lsl 16
 	cmp	w2, w1
-	bne	.L624
+	bne	.L633
 	b	flash_exit_slc_mode
-.L624:
+.L633:
 	ret
 	.size	flash_boot_exit_slc_mode, .-flash_boot_exit_slc_mode
 	.section	.text.FW_FlashBlockErase.constprop.41,"ax",@progbits
@@ -4264,16 +4305,16 @@ BuildFlashLsbPageTable:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w20, w1
-	cbnz	w0, .L630
+	cbnz	w0, .L639
 	adrp	x1, .LANCHOR16
 	add	x1, x1, :lo12:.LANCHOR16
 	mov	x0, 0
-.L631:
+.L640:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 256
-	bne	.L631
-.L637:
+	bne	.L640
+.L646:
 	adrp	x19, .LANCHOR120
 	add	x19, x19, :lo12:.LANCHOR120
 	mov	w1, 255
@@ -4284,41 +4325,41 @@ BuildFlashLsbPageTable:
 	and	w20, w20, 65535
 	add	x1, x1, :lo12:.LANCHOR16
 	mov	x0, 0
-.L632:
+.L641:
 	cmp	w20, w0, uxth
-	bhi	.L654
+	bhi	.L663
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L630:
+.L639:
 	cmp	w0, 1
-	bne	.L633
+	bne	.L642
 	adrp	x2, .LANCHOR16
 	add	x2, x2, :lo12:.LANCHOR16
 	mov	x1, 0
-.L636:
+.L645:
 	and	w0, w1, 65535
 	cmp	x1, 3
-	bls	.L634
+	bls	.L643
 	ubfiz	w3, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 2
 	sub	w0, w3, w0
 	and	w0, w0, 65535
-.L634:
+.L643:
 	strh	w0, [x2, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L636
-	b	.L637
-.L633:
+	bne	.L645
+	b	.L646
+.L642:
 	cmp	w0, 2
-	bne	.L638
+	bne	.L647
 	adrp	x2, .LANCHOR16
 	add	x2, x2, :lo12:.LANCHOR16
 	mov	w1, 65535
 	mov	x0, 0
-.L640:
+.L649:
 	cmp	x0, 2
 	and	w3, w0, 65535
 	csel	w3, w3, w1, cc
@@ -4327,32 +4368,32 @@ BuildFlashLsbPageTable:
 	add	x0, x0, 1
 	and	w1, w1, 65535
 	cmp	x0, 256
-	bne	.L640
-	b	.L637
-.L638:
+	bne	.L649
+	b	.L646
+.L647:
 	cmp	w0, 3
-	bne	.L641
+	bne	.L650
 	adrp	x2, .LANCHOR16
 	add	x2, x2, :lo12:.LANCHOR16
 	mov	x1, 0
-.L644:
+.L653:
 	and	w0, w1, 65535
 	cmp	x1, 5
-	bls	.L642
+	bls	.L651
 	ubfiz	w3, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 4
 	sub	w0, w3, w0
 	and	w0, w0, 65535
-.L642:
+.L651:
 	strh	w0, [x2, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L644
-	b	.L637
-.L641:
+	bne	.L653
+	b	.L646
+.L650:
 	cmp	w0, 4
-	bne	.L645
+	bne	.L654
 	adrp	x2, .LANCHOR16
 	add	x1, x2, :lo12:.LANCHOR16
 	add	x1, x1, 16
@@ -4371,7 +4412,7 @@ BuildFlashLsbPageTable:
 	strh	w2, [x1, -10]
 	strh	w0, [x1, -2]
 	mov	w0, 8
-.L647:
+.L656:
 	and	w3, w0, 1
 	ubfiz	w2, w0, 1, 15
 	add	w3, w3, 6
@@ -4380,57 +4421,57 @@ BuildFlashLsbPageTable:
 	strh	w2, [x1], 2
 	and	w0, w0, 65535
 	cmp	w0, 256
-	bne	.L647
-	b	.L637
-.L645:
+	bne	.L656
+	b	.L646
+.L654:
 	cmp	w0, 5
-	bne	.L648
+	bne	.L657
 	adrp	x1, .LANCHOR16
 	add	x1, x1, :lo12:.LANCHOR16
 	mov	x0, 0
-.L649:
+.L658:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 16
-	bne	.L649
+	bne	.L658
 	add	x1, x1, 32
-.L650:
+.L659:
 	strh	w0, [x1], 2
 	add	w0, w0, 2
 	and	w0, w0, 65535
 	cmp	w0, 496
-	bne	.L650
-	b	.L637
-.L648:
+	bne	.L659
+	b	.L646
+.L657:
 	cmp	w0, 6
-	bne	.L637
+	bne	.L646
 	adrp	x3, .LANCHOR16
 	add	x3, x3, :lo12:.LANCHOR16
 	mov	w1, 0
 	mov	x2, 0
 	mov	w4, 12
 	mov	w5, 10
-.L653:
+.L662:
 	and	w0, w2, 65535
 	cmp	x2, 5
-	bls	.L651
+	bls	.L660
 	tst	x0, 1
 	csel	w0, w4, w5, ne
 	sub	w0, w1, w0
 	and	w0, w0, 65535
-.L651:
+.L660:
 	strh	w0, [x3, x2, lsl 1]
 	add	w1, w1, 3
 	and	w1, w1, 65535
 	add	x2, x2, 1
 	cmp	w1, 768
-	bne	.L653
-	b	.L637
-.L654:
+	bne	.L662
+	b	.L646
+.L663:
 	ldrh	w2, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	strh	w2, [x19, w2, sxtw 1]
-	b	.L632
+	b	.L641
 	.size	BuildFlashLsbPageTable, .-BuildFlashLsbPageTable
 	.section	.text.FlashDieInfoInit,"ax",@progbits
 	.align	2
@@ -4451,9 +4492,9 @@ FlashDieInfoInit:
 	cmp	w0, 256
 	strb	wzr, [x20, #:lo12:.LANCHOR121]
 	str	x25, [sp, 64]
-	bls	.L670
+	bls	.L679
 	mov	w0, 512
-.L687:
+.L696:
 	adrp	x25, .LANCHOR26
 	add	x22, x25, :lo12:.LANCHOR26
 	str	w0, [x23, #:lo12:.LANCHOR3]
@@ -4480,27 +4521,27 @@ FlashDieInfoInit:
 	mov	x8, 0
 	add	x10, x7, 1
 	ldrb	w11, [x7]
-.L674:
+.L683:
 	mov	w2, w11
 	add	x1, x15, x8, lsl 3
 	mov	x0, x10
 	bl	FlashMemCmp8
-	cbnz	w0, .L673
+	cbnz	w0, .L682
 	ldrb	w1, [x14]
 	add	w0, w1, 1
 	strb	w0, [x14]
 	str	wzr, [x21, x1, lsl 2]
 	strb	w8, [x22, x1]
-.L673:
+.L682:
 	add	x8, x8, 1
 	cmp	x8, 4
-	bne	.L674
+	bne	.L683
 	ldrb	w0, [x19, #:lo12:.LANCHOR25]
 	strb	w0, [x20, #:lo12:.LANCHOR121]
 	ldrb	w0, [x7, 8]
 	cmp	w0, 2
-	beq	.L675
-.L679:
+	beq	.L684
+.L688:
 	ldrb	w0, [x19, #:lo12:.LANCHOR25]
 	ldrh	w1, [x7, 14]
 	ldp	x19, x20, [sp, 16]
@@ -4514,24 +4555,24 @@ FlashDieInfoInit:
 	ldp	x29, x30, [sp], 80
 	strh	w0, [x1, #:lo12:.LANCHOR122]
 	ret
-.L670:
+.L679:
 	cmp	w0, 128
-	bls	.L687
+	bls	.L696
 	mov	w0, 256
-	b	.L687
-.L675:
+	b	.L696
+.L684:
 	ldr	w20, [x23, #:lo12:.LANCHOR3]
 	add	x12, x12, :lo12:.LANCHOR22
 	add	x14, x19, :lo12:.LANCHOR25
 	add	x24, x24, :lo12:.LANCHOR17
 	add	x13, x25, :lo12:.LANCHOR26
 	mov	x15, 0
-.L678:
+.L687:
 	mov	w2, w11
 	add	x1, x12, x15, lsl 3
 	mov	x0, x10
 	bl	FlashMemCmp8
-	cbnz	w0, .L676
+	cbnz	w0, .L685
 	ldrb	w2, [x7, 13]
 	ldrh	w0, [x7, 14]
 	ldrb	w1, [x14]
@@ -4541,18 +4582,18 @@ FlashDieInfoInit:
 	sxtw	x2, w1
 	str	w0, [x24, x2, lsl 2]
 	ldrb	w3, [x7, 23]
-	cbz	w3, .L677
+	cbz	w3, .L686
 	lsl	w0, w0, 1
 	str	w0, [x24, x2, lsl 2]
-.L677:
+.L686:
 	add	w1, w1, 1
 	strb	w15, [x13, x2]
 	strb	w1, [x14]
-.L676:
+.L685:
 	add	x15, x15, 1
 	cmp	x15, 4
-	bne	.L678
-	b	.L679
+	bne	.L687
+	b	.L688
 	.size	FlashDieInfoInit, .-FlashDieInfoInit
 	.section	.text.ReadFlashInfo,"ax",@progbits
 	.align	2
@@ -4600,20 +4641,20 @@ ReadFlashInfo:
 	adrp	x0, .LANCHOR25
 	strb	wzr, [x19, 10]
 	ldrb	w3, [x0, #:lo12:.LANCHOR25]
-.L689:
+.L698:
 	cmp	w3, w1, uxtb
-	bhi	.L690
+	bhi	.L699
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L690:
+.L699:
 	ldrb	w0, [x1, x2]
 	add	x1, x1, 1
 	ldrb	w5, [x19, 10]
 	lsl	w0, w4, w0
 	orr	w0, w0, w5
 	strb	w0, [x19, 10]
-	b	.L689
+	b	.L698
 	.size	ReadFlashInfo, .-ReadFlashInfo
 	.section	.text.FtlBbt2Bitmap,"ax",@progbits
 	.align	2
@@ -4639,13 +4680,13 @@ FtlBbt2Bitmap:
 	mov	w1, 0
 	mov	x0, x20
 	bl	ftl_memset
-.L695:
+.L704:
 	ldrh	w0, [x21, x19]
 	cmp	w0, w24
-	beq	.L692
+	beq	.L701
 	ldrh	w1, [x22]
 	cmp	w1, w0
-	bhi	.L694
+	bhi	.L703
 	mov	w2, 79
 	mov	x1, x23
 	adrp	x0, .LC5
@@ -4656,7 +4697,7 @@ FtlBbt2Bitmap:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L694:
+.L703:
 	ldrh	w1, [x21, x19]
 	mov	w2, 1
 	add	x19, x19, 2
@@ -4668,8 +4709,8 @@ FtlBbt2Bitmap:
 	ldr	w1, [x20, x0]
 	orr	w1, w1, w2
 	str	w1, [x20, x0]
-	bne	.L695
-.L692:
+	bne	.L704
+.L701:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -4726,87 +4767,92 @@ ftl_free_no_use_map_blk:
 	stp	x21, x22, [sp, 32]
 	ldp	x21, x20, [x0, 32]
 	stp	x23, x24, [sp, 48]
-	stp	x25, x26, [sp, 64]
+	ldr	x22, [x0, 16]
 	lsl	w2, w2, 1
-	ldr	x23, [x0, 16]
 	mov	x0, x21
+	str	x25, [sp, 64]
 	bl	ftl_memset
 	mov	w0, 0
-.L703:
+.L712:
 	ldrh	w1, [x19, 6]
 	cmp	w1, w0
-	bhi	.L707
-	ldrh	w26, [x21]
-	adrp	x24, .LANCHOR54
-	add	x24, x24, :lo12:.LANCHOR54
-	mov	w25, 0
+	bhi	.L716
+	adrp	x0, .LANCHOR54
+	mov	w23, 0
 	mov	w20, 0
-.L708:
+	ldrh	w1, [x0, #:lo12:.LANCHOR54]
+	ldrh	w0, [x19]
+	strh	w1, [x21, x0, lsl 1]
+	ldrh	w24, [x21]
+.L717:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L712
-	mov	w0, w25
+	bhi	.L721
+	mov	w0, w23
+	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L707:
+.L716:
 	ubfiz	x1, x0, 2, 16
 	ldr	w2, [x20, x1]
 	mov	w1, 0
 	ubfx	x2, x2, 10, 16
-.L704:
+.L713:
 	ldrh	w3, [x19, 10]
 	cmp	w3, w1
-	bhi	.L706
+	bhi	.L715
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L703
-.L706:
+	b	.L712
+.L715:
 	ubfiz	x3, x1, 1, 16
-	ldrh	w4, [x23, x3]
+	ldrh	w4, [x22, x3]
 	cmp	w4, w2
-	bne	.L705
+	bne	.L714
+	cbz	w2, .L714
 	ldrh	w4, [x21, x3]
 	add	w4, w4, 1
 	strh	w4, [x21, x3]
-.L705:
+.L714:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L704
-.L712:
-	ldrh	w0, [x19]
-	uxtw	x22, w20
-	cmp	w0, w20
-	bne	.L709
-	ldrh	w0, [x24]
-	ldrh	w1, [x19, 2]
-	cmp	w1, w0
-	bcs	.L709
-	strh	w0, [x21, x22, lsl 1]
-.L709:
-	lsl	x22, x22, 1
-	ldrh	w0, [x21, x22]
-	cmp	w26, w0
-	bls	.L710
-	mov	w25, w20
-	mov	w26, w0
-.L710:
-	cbnz	w0, .L711
-	ldrh	w0, [x23, x22]
-	cbz	w0, .L711
+	b	.L713
+.L721:
+	ubfiz	x0, x20, 1, 16
+	ldrh	w1, [x21, x0]
+	cmp	w24, w1
+	bls	.L718
+	add	x25, x22, x0
+	ldrh	w0, [x22, x0]
+	cbnz	w0, .L719
+.L720:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L717
+.L718:
+	cbnz	w1, .L720
+	add	x25, x22, x0
+	ldrh	w0, [x22, x0]
+	cbz	w0, .L720
+.L722:
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-	strh	wzr, [x23, x22]
+	strh	wzr, [x25]
 	ldrh	w0, [x19, 8]
 	sub	w0, w0, #1
 	strh	w0, [x19, 8]
-.L711:
-	add	w20, w20, 1
-	and	w20, w20, 65535
-	b	.L708
+	b	.L720
+.L723:
+	mov	w24, 0
+	b	.L722
+.L719:
+	mov	w23, w20
+	cbz	w1, .L723
+	mov	w24, w1
+	b	.L720
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.section	.text.FtlL2PDataInit,"ax",@progbits
 	.align	2
@@ -4842,10 +4888,10 @@ FtlL2PDataInit:
 	mov	w2, -1
 	ldrh	w5, [x22, #:lo12:.LANCHOR58]
 	add	x3, x0, x3, lsl 4
-.L718:
+.L733:
 	add	x4, x1, x5
 	cmp	x0, x3
-	bne	.L719
+	bne	.L734
 	adrp	x1, .LANCHOR127
 	add	x0, x1, :lo12:.LANCHOR127
 	ldp	x21, x22, [sp, 32]
@@ -4860,7 +4906,6 @@ FtlL2PDataInit:
 	ldrh	w1, [x1, #:lo12:.LANCHOR128]
 	strh	w1, [x0, 8]
 	adrp	x1, .LANCHOR67
-	strh	w2, [x0, 60]
 	ldrh	w1, [x1, #:lo12:.LANCHOR67]
 	strh	w1, [x0, 6]
 	adrp	x1, .LANCHOR129
@@ -4877,7 +4922,7 @@ FtlL2PDataInit:
 	str	x1, [x0, 40]
 	ldp	x29, x30, [sp], 64
 	ret
-.L719:
+.L734:
 	and	x1, x1, -4
 	strh	w2, [x0]
 	add	x1, x6, x1
@@ -4885,7 +4930,7 @@ FtlL2PDataInit:
 	str	x1, [x0, 8]
 	add	x0, x0, 16
 	mov	x1, x4
-	b	.L718
+	b	.L733
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
 	.section	.text.FtlVariablesInit,"ax",@progbits
 	.align	2
@@ -4988,35 +5033,35 @@ SupperBlkListInit:
 	str	xzr, [x0, #:lo12:.LANCHOR85]
 	adrp	x0, .LANCHOR139
 	strh	wzr, [x0, #:lo12:.LANCHOR139]
-.L724:
+.L739:
 	ldrh	w0, [x25]
 	cmp	w19, w0
-	bge	.L731
+	bge	.L746
 	adrp	x0, .LANCHOR53
 	ldrh	w8, [x27, #:lo12:.LANCHOR38]
 	mov	w5, 0
 	mov	w6, 0
 	ldrh	w7, [x0, #:lo12:.LANCHOR53]
-	b	.L732
-.L726:
+	b	.L747
+.L741:
 	ldrb	w0, [x26, w6, sxtw]
 	mov	w1, w19
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L725
+	cbnz	w0, .L740
 	add	w5, w7, w5
 	sxth	w5, w5
-.L725:
+.L740:
 	add	w6, w6, 1
 	sxth	w6, w6
-.L732:
+.L747:
 	cmp	w6, w8
-	blt	.L726
-	cbz	w5, .L727
+	blt	.L741
+	cbz	w5, .L742
 	mov	w0, 32768
 	sdiv	w5, w0, w5
 	sxth	w5, w5
-.L728:
+.L743:
 	ldr	x1, [x24, #:lo12:.LANCHOR82]
 	mov	w0, 6
 	smaddl	x0, w19, w0, x1
@@ -5024,46 +5069,46 @@ SupperBlkListInit:
 	adrp	x0, .LANCHOR92
 	ldrh	w0, [x0, #:lo12:.LANCHOR92]
 	cmp	w19, w0
-	beq	.L729
+	beq	.L744
 	adrp	x0, .LANCHOR93
 	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w19, w0
-	beq	.L729
+	beq	.L744
 	adrp	x0, .LANCHOR94
 	ldrh	w0, [x0, #:lo12:.LANCHOR94]
 	cmp	w19, w0
-	beq	.L729
+	beq	.L744
 	adrp	x0, .LANCHOR84
 	ldr	x0, [x0, #:lo12:.LANCHOR84]
 	ldrh	w0, [x0, w19, sxtw 1]
-	cbnz	w0, .L730
+	cbnz	w0, .L745
 	add	w21, w21, 1
 	mov	w0, w19
 	and	w21, w21, 65535
 	bl	INSERT_FREE_LIST
-.L729:
+.L744:
 	add	w19, w19, 1
 	sxth	w19, w19
-	b	.L724
-.L727:
+	b	.L739
+.L742:
 	adrp	x0, .LANCHOR84
 	mov	w1, -1
 	ldr	x0, [x0, #:lo12:.LANCHOR84]
 	strh	w1, [x0, w19, sxtw 1]
-	b	.L728
-.L730:
+	b	.L743
+.L745:
 	add	w20, w20, 1
 	mov	w0, w19
 	and	w20, w20, 65535
 	bl	INSERT_DATA_LIST
-	b	.L729
-.L731:
+	b	.L744
+.L746:
 	strh	w20, [x23, #:lo12:.LANCHOR86]
 	add	w20, w20, w21
 	strh	w21, [x22, #:lo12:.LANCHOR89]
 	cmp	w0, w20
-	bge	.L733
-	mov	w2, 2683
+	bge	.L748
+	mov	w2, 2614
 	adrp	x1, .LANCHOR140
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR140
@@ -5074,7 +5119,7 @@ SupperBlkListInit:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L733:
+.L748:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -5168,7 +5213,7 @@ FlashLoadPhyInfoInRam:
 	add	x11, x11, :lo12:.LANCHOR22
 	stp	x19, x20, [sp, 16]
 	mov	x10, 0
-.L745:
+.L760:
 	ldrb	w2, [x8, -1]
 	mov	w12, w10
 	lsl	x20, x10, 5
@@ -5176,7 +5221,7 @@ FlashLoadPhyInfoInRam:
 	mov	x0, x8
 	bl	FlashMemCmp8
 	mov	w19, w0
-	cbnz	w0, .L743
+	cbnz	w0, .L758
 	add	x0, x7, :lo12:.LANCHOR142
 	ubfiz	x12, x12, 5, 32
 	add	x20, x0, x20
@@ -5185,17 +5230,17 @@ FlashLoadPhyInfoInRam:
 	add	x4, x1, :lo12:.LANCHOR143
 	ldrb	w3, [x0, 22]
 	mov	x0, 0
-.L744:
+.L759:
 	lsl	x5, x0, 5
 	mov	w2, w0
 	ldrb	w5, [x5, x4]
 	cmp	w5, w3
-	beq	.L747
+	beq	.L762
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L744
+	bne	.L759
 	mov	w2, w0
-.L747:
+.L762:
 	ubfiz	x0, x2, 5, 32
 	add	x1, x1, :lo12:.LANCHOR143
 	add	x1, x1, x0
@@ -5208,14 +5253,14 @@ FlashLoadPhyInfoInRam:
 	adrp	x0, .LANCHOR31
 	add	x0, x0, :lo12:.LANCHOR31
 	bl	ftl_memcpy
-	b	.L742
-.L743:
+	b	.L757
+.L758:
 	add	x10, x10, 1
 	add	x8, x8, 32
 	cmp	x10, 77
-	bne	.L745
+	bne	.L760
 	mov	w19, -1
-.L742:
+.L757:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -5227,15 +5272,15 @@ FlashLoadPhyInfoInRam:
 	.type	ftl_memcpy32, %function
 ftl_memcpy32:
 	mov	x3, 0
-.L752:
+.L767:
 	cmp	w2, w3
-	bhi	.L753
+	bhi	.L768
 	ret
-.L753:
+.L768:
 	ldr	w4, [x1, x3, lsl 2]
 	str	w4, [x0, x3, lsl 2]
 	add	x3, x3, 1
-	b	.L752
+	b	.L767
 	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.NandcCopy1KB,"ax",@progbits
 	.align	2
@@ -5254,15 +5299,15 @@ NandcCopy1KB:
 	ubfiz	x0, x19, 9, 8
 	mov	x20, x4
 	add	x0, x2, x0
-	bne	.L755
-	cbz	x3, .L756
+	bne	.L770
+	cbz	x3, .L771
 	tst	x3, 3
-	bne	.L757
+	bne	.L772
 	mov	w2, 256
 	mov	x1, x3
 	bl	ftl_memcpy32
-.L756:
-	cbz	x20, .L754
+.L771:
+	cbz	x20, .L769
 	ldrb	w0, [x20]
 	lsr	w19, w19, 1
 	ldrb	w1, [x20, 1]
@@ -5274,26 +5319,26 @@ NandcCopy1KB:
 	mov	w1, 12
 	mul	w19, w19, w1
 	str	w0, [x21, w19, sxtw 2]
-.L754:
+.L769:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L757:
+.L772:
 	mov	w2, 1024
 	mov	x1, x3
 	bl	ftl_memcpy
-	b	.L756
-.L755:
-	cbz	x3, .L760
+	b	.L771
+.L770:
+	cbz	x3, .L775
 	tst	x3, 3
-	bne	.L761
+	bne	.L776
 	mov	x1, x0
 	mov	w2, 256
 	mov	x0, x3
 	bl	ftl_memcpy32
-.L760:
-	cbz	x20, .L754
+.L775:
+	cbz	x20, .L769
 	lsr	w19, w19, 1
 	mov	w0, 12
 	mul	w19, w19, w0
@@ -5305,13 +5350,13 @@ NandcCopy1KB:
 	lsr	w0, w0, 24
 	strb	w1, [x20, 2]
 	strb	w0, [x20, 3]
-	b	.L754
-.L761:
+	b	.L769
+.L776:
 	mov	x1, x0
 	mov	w2, 1024
 	mov	x0, x3
 	bl	ftl_memcpy
-	b	.L760
+	b	.L775
 	.size	NandcCopy1KB, .-NandcCopy1KB
 	.section	.text.NandcXferData,"ax",@progbits
 	.align	2
@@ -5335,14 +5380,14 @@ NandcXferData:
 	and	w24, w2, 255
 	mov	x21, x4
 	ldr	x19, [x0, x1]
-	bne	.L774
-	cbnz	x4, .L775
+	bne	.L789
+	cbnz	x4, .L790
 	add	x21, x29, 128
 	mov	w2, 64
 	mov	w1, 255
 	add	x0, x29, 128
 	bl	ftl_memset
-.L775:
+.L790:
 	mov	x5, x21
 	mov	x4, x26
 	mov	w2, w24
@@ -5352,7 +5397,7 @@ NandcXferData:
 	bl	NandcXferStart
 	mov	w0, w25
 	bl	NandcXferComp
-	cbnz	w20, .L799
+	cbnz	w20, .L814
 	adrp	x0, .LANCHOR32
 	adrp	x4, .LANCHOR35
 	mov	x1, x0
@@ -5365,38 +5410,38 @@ NandcXferData:
 	add	x2, x21, x2, lsl 2
 	csel	w3, w3, w0, cc
 	mov	w0, 0
-.L778:
+.L793:
 	add	w5, w3, w0
 	cmp	x21, x2
-	bne	.L779
+	bne	.L794
 	adrp	x0, .LANCHOR34
 	ldr	w4, [x1, #:lo12:.LANCHOR32]
 	lsr	w24, w24, 2
 	mov	w2, 0
 	ldr	w3, [x0, #:lo12:.LANCHOR34]
 	mov	w22, 0
-.L780:
+.L795:
 	cmp	w2, w24
-	bcs	.L776
-	cbnz	w4, .L786
-.L776:
+	bcs	.L791
+	cbnz	w4, .L801
+.L791:
 	str	wzr, [x19, 16]
-.L787:
+.L802:
 	adrp	x0, .LANCHOR34
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	cmp	w0, 5
-	bls	.L773
-	cbnz	w20, .L773
+	bls	.L788
+	cbnz	w20, .L788
 	ldr	w0, [x19]
 	mov	w1, 8192
 	movk	w1, 0x2, lsl 16
 	and	w1, w0, w1
 	cmp	w1, 139264
-	bne	.L773
+	bne	.L788
 	orr	w0, w0, 131072
 	mov	w22, -1
 	str	w0, [x19]
-.L773:
+.L788:
 	mov	w0, w22
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -5405,7 +5450,7 @@ NandcXferData:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L779:
+.L794:
 	ldr	x6, [x4, 8]
 	and	x0, x0, 4294967292
 	add	x21, x21, 4
@@ -5418,18 +5463,18 @@ NandcXferData:
 	lsr	w0, w0, 24
 	strb	w0, [x21, -1]
 	mov	w0, w5
-	b	.L778
-.L786:
+	b	.L793
+.L801:
 	uxtw	x0, w2
 	add	x0, x0, 8
 	ldr	w0, [x19, x0, lsl 2]
 	str	w0, [x29, 120]
 	ldr	w0, [x29, 120]
-	tbnz	x0, 2, .L802
+	tbnz	x0, 2, .L817
 	ldr	w0, [x29, 120]
-	tbnz	x0, 15, .L802
+	tbnz	x0, 15, .L817
 	cmp	w3, 5
-	bls	.L782
+	bls	.L797
 	ldr	w1, [x29, 120]
 	ubfx	x6, x1, 3, 5
 	ldr	w1, [x29, 120]
@@ -5442,26 +5487,26 @@ NandcXferData:
 	orr	w0, w5, w0, lsl 5
 	cmp	w1, w0
 	ldr	w0, [x29, 120]
-	bls	.L783
+	bls	.L798
 	ubfx	x1, x0, 3, 5
 	ldr	w0, [x29, 120]
 	ubfx	x0, x0, 27, 1
-.L808:
+.L823:
 	orr	w0, w1, w0, lsl 5
-.L784:
+.L799:
 	cmp	w22, w0
 	csel	w22, w22, w0, cs
-.L781:
+.L796:
 	add	w2, w2, 1
-	b	.L780
-.L783:
+	b	.L795
+.L798:
 	ubfx	x1, x0, 16, 5
 	ldr	w0, [x29, 120]
 	ubfx	x0, x0, 29, 1
-	b	.L808
-.L782:
+	b	.L823
+.L797:
 	cmp	w3, 3
-	bls	.L803
+	bls	.L818
 	ldr	w1, [x29, 120]
 	ubfx	x6, x1, 3, 5
 	ldr	w1, [x29, 120]
@@ -5474,45 +5519,45 @@ NandcXferData:
 	orr	w0, w5, w0, lsl 5
 	cmp	w1, w0
 	ldr	w0, [x29, 120]
-	bls	.L785
+	bls	.L800
 	ubfx	x1, x0, 3, 5
 	ldr	w0, [x29, 120]
 	ubfx	x0, x0, 28, 1
-	b	.L808
-.L785:
+	b	.L823
+.L800:
 	ubfx	x1, x0, 16, 5
 	ldr	w0, [x29, 120]
 	ubfx	x0, x0, 30, 1
-	b	.L808
-.L803:
+	b	.L823
+.L818:
 	mov	w0, 0
-	b	.L784
-.L802:
+	b	.L799
+.L817:
 	mov	w22, -1
-	b	.L781
-.L799:
+	b	.L796
+.L814:
 	mov	w22, 0
-	b	.L776
-.L774:
+	b	.L791
+.L789:
 	cmp	w20, 1
-	bne	.L788
+	bne	.L803
 	cmp	x4, 0
 	mov	w23, 2
 	csel	w23, w23, wzr, ne
 	mov	w27, 0
 	lsl	w23, w23, 1
 	mov	w22, 0
-.L789:
+.L804:
 	cmp	w22, w24
-	bcc	.L791
+	bcc	.L806
 	mov	w22, 0
-	b	.L787
-.L791:
+	b	.L802
+.L806:
 	and	w28, w22, 3
-	cbz	x26, .L804
+	cbz	x26, .L819
 	lsl	w3, w22, 9
 	add	x3, x26, x3
-.L790:
+.L805:
 	add	x4, x21, x27, uxtw
 	mov	w2, w28
 	mov	w1, 1
@@ -5529,11 +5574,11 @@ NandcXferData:
 	add	w27, w27, w23
 	mov	w0, w25
 	bl	NandcXferComp
-	b	.L789
-.L804:
+	b	.L804
+.L819:
 	mov	x3, 0
-	b	.L790
-.L788:
+	b	.L805
+.L803:
 	mov	w0, w25
 	mov	x5, 0
 	mov	x4, 0
@@ -5549,16 +5594,16 @@ NandcXferData:
 	lsl	w0, w27, 1
 	mov	w22, 0
 	str	w0, [x29, 108]
-.L792:
+.L807:
 	cmp	w24, w23
-	bls	.L787
+	bls	.L802
 	mov	w0, w25
 	bl	NandcXferComp
 	ldr	w0, [x19, 32]
 	add	w27, w23, 2
 	str	w0, [x29, 120]
 	cmp	w24, w27
-	bls	.L793
+	bls	.L808
 	mov	x5, 0
 	mov	x4, 0
 	and	w3, w27, 3
@@ -5566,9 +5611,9 @@ NandcXferData:
 	mov	w1, 0
 	mov	w0, w25
 	bl	NandcXferStart
-.L793:
+.L808:
 	ldr	w0, [x29, 120]
-	tbnz	x0, 2, .L805
+	tbnz	x0, 2, .L820
 	ldr	w0, [x29, 120]
 	ubfx	x1, x0, 3, 5
 	ldr	w0, [x29, 120]
@@ -5576,12 +5621,12 @@ NandcXferData:
 	orr	w0, w1, w0, lsl 5
 	cmp	w22, w0
 	csel	w22, w22, w0, cs
-.L794:
+.L809:
 	and	w2, w23, 3
-	cbz	x26, .L806
+	cbz	x26, .L821
 	lsl	w3, w23, 9
 	add	x3, x26, x3
-.L795:
+.L810:
 	add	x4, x21, x28, uxtw
 	mov	x0, x19
 	mov	w1, 0
@@ -5589,13 +5634,13 @@ NandcXferData:
 	ldr	w0, [x29, 108]
 	mov	w23, w27
 	add	w28, w28, w0
-	b	.L792
-.L805:
+	b	.L807
+.L820:
 	mov	w22, -1
-	b	.L794
-.L806:
+	b	.L809
+.L821:
 	mov	x3, 0
-	b	.L795
+	b	.L810
 	.size	NandcXferData, .-NandcXferData
 	.section	.text.FlashReadRawPage,"ax",@progbits
 	.align	2
@@ -5613,7 +5658,7 @@ FlashReadRawPage:
 	mov	x22, x2
 	mov	x23, x3
 	ldrb	w20, [x1, #:lo12:.LANCHOR31+9]
-	bne	.L810
+	bne	.L825
 	adrp	x0, .LANCHOR2
 	adrp	x1, .LANCHOR3
 	ldrb	w0, [x0, #:lo12:.LANCHOR2]
@@ -5622,7 +5667,7 @@ FlashReadRawPage:
 	cmp	w0, w21
 	mov	w0, 4
 	csel	w20, w20, w0, ls
-.L810:
+.L825:
 	mov	w0, w19
 	bl	NandcWaitFlashReady
 	mov	w0, w19
@@ -5675,7 +5720,7 @@ FlashDdrTunningRead:
 	cmp	w0, 8
 	mov	w0, 12
 	csel	w22, w22, w0, cc
-	cbz	w4, .L826
+	cbz	w4, .L841
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
@@ -5694,10 +5739,10 @@ FlashDdrTunningRead:
 	ldrb	w0, [x19, #:lo12:.LANCHOR24]
 	bl	NandcSetMode
 	cmn	w21, #1
-	bne	.L815
-.L824:
+	bne	.L830
+.L839:
 	mov	w21, -1
-.L812:
+.L827:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -5706,7 +5751,7 @@ FlashDdrTunningRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L815:
+.L830:
 	mov	w1, w25
 	mov	w2, w21
 	adrp	x0, .LC9
@@ -5716,20 +5761,20 @@ FlashDdrTunningRead:
 	ldr	w0, [x1, #:lo12:.LANCHOR144]
 	add	w0, w0, 1
 	cmp	w0, 2047
-	bhi	.L817
+	bhi	.L832
 	str	w0, [x1, #:lo12:.LANCHOR144]
-	b	.L812
-.L817:
+	b	.L827
+.L832:
 	str	wzr, [x1, #:lo12:.LANCHOR144]
 	mov	x28, 0
 	mov	x23, 0
-.L814:
+.L829:
 	mov	w5, 0
 	mov	w20, 0
 	mov	w6, 0
 	mov	w19, 0
 	mov	w27, -1
-.L822:
+.L837:
 	stp	w5, w6, [x29, 100]
 	mov	w0, w22
 	bl	NandcSetDdrPara
@@ -5741,65 +5786,65 @@ FlashDdrTunningRead:
 	add	w1, w21, 1
 	cmp	w0, w1
 	ldp	w5, w6, [x29, 100]
-	bhi	.L818
+	bhi	.L833
 	cmp	w0, 2
-	bhi	.L828
+	bhi	.L843
 	add	w19, w19, 1
 	cmp	w19, 9
-	bls	.L828
+	bls	.L843
 	mov	w1, w20
 	mov	w21, w0
 	sub	w20, w22, w19
 	mov	w27, 0
-.L820:
+.L835:
 	cmp	w19, w6
 	csel	w20, w20, w1, hi
-.L821:
-	cbz	w20, .L823
+.L836:
+	cbz	w20, .L838
 	mov	w1, w20
 	adrp	x0, .LC10
 	add	x0, x0, :lo12:.LC10
 	bl	printf
 	mov	w0, w20
 	bl	NandcSetDdrPara
-.L823:
-	cbz	w27, .L812
+.L838:
+	cbz	w27, .L827
 	adrp	x0, .LC11
 	mov	w2, w25
 	mov	w1, w24
 	add	x0, x0, :lo12:.LC11
 	bl	printf
-	cbz	w26, .L824
+	cbz	w26, .L839
 	ldr	w1, [x29, 108]
 	lsr	w0, w1, 8
 	bl	NandcSetDdrPara
-	b	.L812
-.L826:
+	b	.L827
+.L841:
 	mov	w21, 1024
-	b	.L814
-.L818:
+	b	.L829
+.L833:
 	cmp	w19, w6
-	bls	.L829
+	bls	.L844
 	sub	w20, w5, w19
 	cmp	w19, 7
-	bhi	.L821
+	bhi	.L836
 	mov	w6, w19
-.L829:
+.L844:
 	mov	w19, 0
-	b	.L819
-.L828:
+	b	.L834
+.L843:
 	mov	w5, w22
 	mov	w21, w0
 	mov	w27, 0
 	mov	x28, 0
 	mov	x23, 0
-.L819:
+.L834:
 	add	w22, w22, 2
 	cmp	w22, 69
-	bls	.L822
+	bls	.L837
 	mov	w1, w20
 	mov	w20, w5
-	b	.L820
+	b	.L835
 	.size	FlashDdrTunningRead, .-FlashDdrTunningRead
 	.section	.text.FlashReadPage,"ax",@progbits
 	.align	2
@@ -5820,14 +5865,14 @@ FlashReadPage:
 	bl	FlashReadRawPage
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L839
+	bne	.L854
 	adrp	x24, .LANCHOR5
 	ldrb	w25, [x24, #:lo12:.LANCHOR5]
-	cbnz	w25, .L840
-.L842:
+	cbnz	w25, .L855
+.L857:
 	adrp	x0, .LANCHOR30
 	ldrb	w0, [x0, #:lo12:.LANCHOR30]
-	cbz	w0, .L839
+	cbz	w0, .L854
 	adrp	x0, .LANCHOR19
 	mov	w4, 1
 	mov	x3, x23
@@ -5839,16 +5884,16 @@ FlashReadPage:
 	bl	FlashDdrTunningRead
 	mov	w19, w0
 	cmn	w0, #1
-	beq	.L843
+	beq	.L858
 	adrp	x0, .LANCHOR33
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	cmp	w19, w0, lsr 1
-	bls	.L839
-.L843:
+	bls	.L854
+.L858:
 	lsr	w0, w24, 8
 	bl	NandcSetDdrPara
-	b	.L839
-.L840:
+	b	.L854
+.L855:
 	strb	wzr, [x24, #:lo12:.LANCHOR5]
 	mov	x3, x23
 	mov	x2, x22
@@ -5857,14 +5902,14 @@ FlashReadPage:
 	bl	FlashReadRawPage
 	strb	w25, [x24, #:lo12:.LANCHOR5]
 	cmn	w0, #1
-	beq	.L842
+	beq	.L857
 	mov	w19, w0
-.L839:
+.L854:
 	adrp	x24, .LANCHOR145
 	ldr	x4, [x24, #:lo12:.LANCHOR145]
-	cbz	x4, .L838
+	cbz	x4, .L853
 	cmn	w19, #1
-	bne	.L838
+	bne	.L853
 	mov	x3, x23
 	mov	x2, x22
 	mov	w1, w21
@@ -5878,10 +5923,10 @@ FlashReadPage:
 	add	x0, x0, :lo12:.LC12
 	bl	printf
 	cmn	w19, #1
-	bne	.L838
+	bne	.L853
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L838
+	cbz	w0, .L853
 	mov	w0, w20
 	bl	flash_enter_slc_mode
 	ldr	x4, [x24, #:lo12:.LANCHOR145]
@@ -5893,7 +5938,7 @@ FlashReadPage:
 	mov	w19, w0
 	mov	w0, w20
 	bl	flash_exit_slc_mode
-.L838:
+.L853:
 	mov	w0, w19
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -5932,27 +5977,27 @@ FlashDdrParaScan:
 	adrp	x20, .LANCHOR30
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	beq	.L859
+	beq	.L874
 	cmn	w22, #1
-	bne	.L860
-.L859:
+	bne	.L875
+.L874:
 	ldrb	w0, [x19, #:lo12:.LANCHOR24]
-	tbz	x0, 0, .L860
+	tbz	x0, 0, .L875
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
 	bl	NandcSetMode
 	strb	wzr, [x20, #:lo12:.LANCHOR30]
-.L861:
+.L876:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L860:
+.L875:
 	mov	w0, 1
 	strb	w0, [x20, #:lo12:.LANCHOR30]
-	b	.L861
+	b	.L876
 	.size	FlashDdrParaScan, .-FlashDdrParaScan
 	.section	.text.FlashLoadPhyInfo,"ax",@progbits
 	.align	2
@@ -5991,10 +6036,10 @@ FlashLoadPhyInfo:
 	str	wzr, [x24, #:lo12:.LANCHOR148]
 	mov	w0, 0
 	bl	flash_enter_slc_mode
-.L870:
+.L885:
 	add	w28, w19, 1
 	mov	x27, 0
-.L872:
+.L887:
 	add	x0, x29, 120
 	ldrb	w0, [x0, x27]
 	bl	FlashBchSel
@@ -6004,30 +6049,30 @@ FlashLoadPhyInfo:
 	mov	w0, 0
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	bne	.L871
+	bne	.L886
 	ldr	x2, [x22, #:lo12:.LANCHOR147]
 	mov	x3, 0
 	mov	w1, w28
 	mov	w0, 0
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	bne	.L871
+	bne	.L886
 	add	x27, x27, 1
 	cmp	x27, 4
-	bne	.L872
-.L873:
+	bne	.L887
+.L888:
 	ldr	w0, [x29, 108]
 	subs	w25, w25, #1
 	add	w19, w19, w0
-	bne	.L870
-	b	.L878
-.L874:
+	bne	.L885
+	b	.L893
+.L889:
 	mov	w1, 2036
 	add	x0, x6, 12
 	bl	JSHash
 	ldr	w1, [x6, 8]
 	cmp	w1, w0
-	bne	.L880
+	bne	.L895
 	add	x23, x20, :lo12:.LANCHOR31
 	add	x1, x6, 160
 	mov	w2, 32
@@ -6053,36 +6098,36 @@ FlashLoadPhyInfo:
 	adrp	x2, .LANCHOR149
 	udiv	w0, w19, w0
 	add	w3, w0, 1
-	cbz	w0, .L876
+	cbz	w0, .L891
 	str	w3, [x2, #:lo12:.LANCHOR149]
-.L877:
+.L892:
 	adrp	x0, .LANCHOR150
 	ldrh	w1, [x1, 14]
 	mov	w23, 0
 	strb	w1, [x0, #:lo12:.LANCHOR150]
-	b	.L873
-.L876:
+	b	.L888
+.L891:
 	mov	w0, 2
 	str	w0, [x2, #:lo12:.LANCHOR149]
-	b	.L877
-.L880:
+	b	.L892
+.L895:
 	mov	w23, -1
-	b	.L873
-.L871:
+	b	.L888
+.L886:
 	ldr	x6, [x21, #:lo12:.LANCHOR146]
 	mov	w1, 20036
 	movk	w1, 0x4e41, lsl 16
 	ldr	w0, [x6]
 	cmp	w0, w1
-	bne	.L873
-	cbnz	w23, .L874
+	bne	.L888
+	cbnz	w23, .L889
 	add	x20, x20, :lo12:.LANCHOR31
 	ldrh	w0, [x20, 10]
 	udiv	w19, w19, w0
 	adrp	x0, .LANCHOR149
 	add	w19, w19, 1
 	str	w19, [x0, #:lo12:.LANCHOR149]
-.L878:
+.L893:
 	mov	w0, 0
 	bl	flash_exit_slc_mode
 	mov	w0, w23
@@ -6127,34 +6172,34 @@ ToshibaReadRetrial:
 	and	w0, w0, 255
 	add	x19, x22, x19, lsl 8
 	cmp	w0, 1
-	bls	.L900
+	bls	.L915
 	adrp	x0, .LANCHOR30
 	ldrb	w0, [x0, #:lo12:.LANCHOR30]
-	cbz	w0, .L901
+	cbz	w0, .L916
 	mov	w23, 1
 	mov	w0, 0
 	bl	NandcSetDdrMode
-.L885:
+.L900:
 	add	x0, x22, x27, lsl 8
 	mov	w1, 92
 	str	w1, [x0, 2056]
 	mov	w1, 197
 	str	w1, [x0, 2056]
-.L884:
+.L899:
 	ldrsw	x0, [x29, 124]
 	mov	w20, 1
 	mov	w24, -1
 	add	x0, x0, 8
 	add	x0, x22, x0, lsl 8
 	str	x0, [x29, 104]
-.L886:
+.L901:
 	adrp	x0, .LANCHOR151
 	ldrb	w0, [x0, #:lo12:.LANCHOR151]
 	add	w0, w0, 1
 	cmp	w20, w0
-	bcc	.L895
+	bcc	.L910
 	mov	w28, w24
-.L894:
+.L909:
 	ldr	x0, [x29, 112]
 	mov	w1, 0
 	ldrb	w0, [x0, #:lo12:.LANCHOR11]
@@ -6162,9 +6207,9 @@ ToshibaReadRetrial:
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x19
-	bhi	.L896
+	bhi	.L911
 	bl	SandiskSetRRPara
-.L897:
+.L912:
 	ldrsw	x0, [x29, 124]
 	add	x0, x0, 8
 	add	x22, x22, x0, lsl 8
@@ -6174,17 +6219,17 @@ ToshibaReadRetrial:
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L898
+	bcc	.L913
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L898:
+.L913:
 	mov	w0, w21
 	bl	NandcWaitFlashReady
-	cbz	w23, .L883
+	cbz	w23, .L898
 	mov	w0, 4
 	bl	NandcSetDdrMode
-.L883:
+.L898:
 	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6193,13 +6238,13 @@ ToshibaReadRetrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L901:
+.L916:
 	mov	w23, 0
-	b	.L885
-.L900:
+	b	.L900
+.L915:
 	mov	w23, 0
-	b	.L884
-.L895:
+	b	.L899
+.L910:
 	ldr	x0, [x29, 112]
 	mov	w1, w20
 	ldrb	w0, [x0, #:lo12:.LANCHOR11]
@@ -6207,28 +6252,28 @@ ToshibaReadRetrial:
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x19
-	bhi	.L887
+	bhi	.L902
 	bl	SandiskSetRRPara
-.L888:
+.L903:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0, #:lo12:.LANCHOR11]
 	cmp	w0, 34
-	bne	.L889
+	bne	.L904
 	adrp	x0, .LANCHOR151
 	ldrb	w0, [x0, #:lo12:.LANCHOR151]
 	sub	w0, w0, #3
 	cmp	w20, w0
-	bne	.L889
+	bne	.L904
 	ldr	x1, [x29, 104]
 	mov	w0, 179
 	str	w0, [x1, 8]
-.L889:
+.L904:
 	add	x0, x22, x27, lsl 8
 	mov	w1, 38
 	str	w1, [x0, 2056]
 	mov	w1, 93
 	str	w1, [x0, 2056]
-	cbz	w23, .L890
+	cbz	w23, .L905
 	mov	w0, 4
 	bl	NandcSetDdrMode
 	ldr	w1, [x29, 120]
@@ -6239,35 +6284,35 @@ ToshibaReadRetrial:
 	mov	w28, w0
 	mov	w0, 0
 	bl	NandcSetDdrMode
-.L891:
+.L906:
 	cmn	w28, #1
-	beq	.L892
+	beq	.L907
 	adrp	x0, .LANCHOR33
 	cmn	w24, #1
 	csel	w24, w24, w28, ne
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L894
+	bcc	.L909
 	mov	x26, 0
 	mov	x25, 0
-.L892:
+.L907:
 	add	w20, w20, 1
-	b	.L886
-.L887:
+	b	.L901
+.L902:
 	bl	ToshibaSetRRPara
-	b	.L888
-.L890:
+	b	.L903
+.L905:
 	ldr	w1, [x29, 120]
 	mov	x3, x26
 	mov	x2, x25
 	mov	w0, w21
 	bl	FlashReadRawPage
 	mov	w28, w0
-	b	.L891
-.L896:
+	b	.L906
+.L911:
 	bl	ToshibaSetRRPara
-	b	.L897
+	b	.L912
 	.size	ToshibaReadRetrial, .-ToshibaReadRetrial
 	.section	.text.SamsungReadRetrial,"ax",@progbits
 	.align	2
@@ -6301,12 +6346,12 @@ SamsungReadRetrial:
 	ldrb	w20, [x2, 8]
 	add	x20, x20, 8
 	add	x20, x0, x20, lsl 8
-.L912:
+.L927:
 	ldrb	w0, [x26]
 	add	w0, w0, 1
 	cmp	w21, w0
-	bcc	.L916
-.L915:
+	bcc	.L931
+.L930:
 	mov	x0, x20
 	mov	w1, 0
 	bl	SamsungSetRRPara
@@ -6314,11 +6359,11 @@ SamsungReadRetrial:
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L911
+	bcc	.L926
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L911:
+.L926:
 	mov	w0, w19
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -6327,7 +6372,7 @@ SamsungReadRetrial:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L916:
+.L931:
 	mov	w1, w21
 	mov	x0, x20
 	bl	SamsungSetRRPara
@@ -6337,21 +6382,21 @@ SamsungReadRetrial:
 	mov	w0, w22
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	beq	.L913
+	beq	.L928
 	ldrb	w1, [x27]
 	cmn	w19, #1
 	csel	w19, w19, w0, ne
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L918
+	bcc	.L933
 	mov	x25, 0
 	mov	x24, 0
-.L913:
+.L928:
 	add	w21, w21, 1
-	b	.L912
-.L918:
+	b	.L927
+.L933:
 	mov	w19, w0
-	b	.L915
+	b	.L930
 	.size	SamsungReadRetrial, .-SamsungReadRetrial
 	.section	.text.MicronReadRetrial,"ax",@progbits
 	.align	2
@@ -6374,16 +6419,16 @@ MicronReadRetrial:
 	stp	x21, x22, [sp, 32]
 	stp	x27, x28, [sp, 80]
 	str	x0, [x29, 128]
-	cbnz	w1, .L926
+	cbnz	w1, .L941
 	add	w19, w19, w19, lsl 1
 	asr	w19, w19, 2
-.L927:
+.L942:
 	adrp	x21, .LANCHOR6
 	add	x21, x21, :lo12:.LANCHOR6
 	add	x21, x21, x20, sxtw 4
 	mov	w23, 0
 	mov	w28, 137
-.L937:
+.L952:
 	mov	w0, w20
 	bl	NandcWaitFlashReady
 	ldrb	w4, [x21, 8]
@@ -6393,11 +6438,11 @@ MicronReadRetrial:
 	mov	w22, 0
 	mov	w26, -1
 	add	x27, x8, x4, lsl 8
-.L928:
+.L943:
 	ldrb	w0, [x7]
 	cmp	w22, w0
-	bcc	.L932
-.L931:
+	bcc	.L947
+.L946:
 	add	x4, x8, x4, lsl 8
 	mov	w0, 239
 	str	x4, [x29, 120]
@@ -6411,14 +6456,14 @@ MicronReadRetrial:
 	str	wzr, [x4, 2048]
 	str	wzr, [x4, 2048]
 	str	wzr, [x4, 2048]
-	bcc	.L933
+	bcc	.L948
 	cmn	w26, #1
 	mov	w0, 256
 	csel	w26, w26, w0, eq
-.L933:
+.L948:
 	cmp	w26, 256
 	ccmn	w26, #1, 4, ne
-	bne	.L934
+	bne	.L949
 	ldr	w2, [x29, 140]
 	adrp	x0, .LC13
 	mov	w4, w26
@@ -6426,22 +6471,22 @@ MicronReadRetrial:
 	mov	w1, w22
 	add	x0, x0, :lo12:.LC13
 	bl	printf
-	cbnz	w23, .L935
+	cbnz	w23, .L950
 	ldr	x0, [x29, 128]
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L925
+	cbz	w0, .L940
 	cmn	w26, #1
-	bne	.L925
+	bne	.L940
 	mov	w1, 3
 	mov	w0, w20
 	mov	w23, 1
 	bl	micron_auto_read_calibration_config
-	b	.L937
-.L926:
+	b	.L952
+.L941:
 	mov	w0, 3
 	sdiv	w19, w19, w0
-	b	.L927
-.L932:
+	b	.L942
+.L947:
 	mov	w0, 239
 	str	w0, [x27, 2056]
 	str	w28, [x27, 2052]
@@ -6464,29 +6509,29 @@ MicronReadRetrial:
 	ldr	w10, [x29, 120]
 	ldp	x4, x7, [x29, 96]
 	ldr	x8, [x29, 112]
-	beq	.L929
+	beq	.L944
 	cmn	w26, #1
 	csel	w26, w26, w0, ne
 	cmp	w0, w19
-	bcc	.L939
+	bcc	.L954
 	mov	x25, 0
 	mov	x24, 0
-.L929:
+.L944:
 	mov	w22, w10
-	b	.L928
-.L939:
+	b	.L943
+.L954:
 	mov	w26, w0
 	mov	x25, 0
 	mov	x24, 0
-	b	.L931
-.L935:
+	b	.L946
+.L950:
 	mov	w0, w20
 	mov	w1, 0
 	bl	micron_auto_read_calibration_config
 	cmn	w26, #1
 	mov	w0, 256
 	csel	w26, w26, w0, eq
-.L925:
+.L940:
 	mov	w0, w26
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6495,13 +6540,13 @@ MicronReadRetrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L934:
-	cbz	w23, .L925
+.L949:
+	cbz	w23, .L940
 	mov	w1, 0
 	mov	w0, w20
 	mov	w26, 256
 	bl	micron_auto_read_calibration_config
-	b	.L925
+	b	.L940
 	.size	MicronReadRetrial, .-MicronReadRetrial
 	.section	.text.HynixReadRetrial,"ax",@progbits
 	.align	2
@@ -6529,9 +6574,9 @@ HynixReadRetrial:
 	ldrb	w20, [x0, 12]
 	ldrb	w1, [x1, 19]
 	cmp	w1, 7
-	bne	.L951
+	bne	.L966
 	ldrb	w20, [x0, 20]
-.L951:
+.L966:
 	mov	w0, w23
 	bl	NandcWaitFlashReady
 	add	x6, x19, :lo12:.LANCHOR20
@@ -6540,27 +6585,27 @@ HynixReadRetrial:
 	add	x5, x5, :lo12:.LANCHOR33
 	mov	w4, 0
 	mov	w21, -1
-.L952:
+.L967:
 	cmp	w4, w24
-	bcc	.L957
-.L956:
+	bcc	.L972
+.L971:
 	ldr	x0, [x22, #:lo12:.LANCHOR18]
 	add	x19, x19, :lo12:.LANCHOR20
 	add	x19, x19, x28
 	ldrb	w0, [x0, 19]
 	cmp	w0, 7
-	bne	.L958
+	bne	.L973
 	strb	w20, [x19, 20]
-.L959:
+.L974:
 	adrp	x0, .LANCHOR33
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w21, w0, lsr 2
-	bcc	.L950
+	bcc	.L965
 	cmn	w21, #1
 	mov	w0, 256
 	csel	w21, w21, w0, eq
-.L950:
+.L965:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6569,7 +6614,7 @@ HynixReadRetrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L957:
+.L972:
 	add	w20, w20, 1
 	ldrb	w1, [x6, 1]
 	and	w20, w20, 255
@@ -6591,24 +6636,24 @@ HynixReadRetrial:
 	ldr	w4, [x29, 108]
 	ldr	x5, [x29, 96]
 	ldp	x7, x6, [x29, 112]
-	beq	.L954
+	beq	.L969
 	ldrb	w1, [x5]
 	cmn	w21, #1
 	csel	w21, w21, w0, ne
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L961
+	bcc	.L976
 	mov	x27, 0
 	mov	x26, 0
-.L954:
+.L969:
 	add	w4, w4, 1
-	b	.L952
-.L961:
+	b	.L967
+.L976:
 	mov	w21, w0
-	b	.L956
-.L958:
+	b	.L971
+.L973:
 	strb	w20, [x19, 12]
-	b	.L959
+	b	.L974
 	.size	HynixReadRetrial, .-HynixReadRetrial
 	.section	.text.FlashProgPage,"ax",@progbits
 	.align	2
@@ -6626,19 +6671,19 @@ FlashProgPage:
 	ldrb	w21, [x1, #:lo12:.LANCHOR31+9]
 	ands	w19, w0, 255
 	mov	x23, x3
-	bne	.L969
+	bne	.L984
 	adrp	x0, .LANCHOR2
 	adrp	x1, .LANCHOR3
 	ldrb	w0, [x0, #:lo12:.LANCHOR2]
 	ldr	w1, [x1, #:lo12:.LANCHOR3]
 	mul	w0, w0, w1
 	cmp	w0, w20
-	bls	.L969
+	bls	.L984
 	adrp	x0, .LANCHOR1
 	ldrb	w0, [x0, #:lo12:.LANCHOR1]
-	cbnz	w0, .L970
+	cbnz	w0, .L985
 	sub	w21, w21, #2
-.L969:
+.L984:
 	mov	w0, w19
 	bl	NandcWaitFlashReady
 	mov	w0, w19
@@ -6669,9 +6714,9 @@ FlashProgPage:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L970:
+.L985:
 	mov	w21, 4
-	b	.L969
+	b	.L984
 	.size	FlashProgPage, .-FlashProgPage
 	.section	.text.FlashSavePhyInfo,"ax",@progbits
 	.align	2
@@ -6761,7 +6806,7 @@ FlashSavePhyInfo:
 	str	x0, [x19, #:lo12:.LANCHOR146]
 	mov	w0, 0
 	bl	flash_enter_slc_mode
-.L975:
+.L990:
 	ldr	w1, [x21]
 	mov	w2, 0
 	mov	w0, 0
@@ -6788,30 +6833,30 @@ FlashSavePhyInfo:
 	bl	FlashReadRawPage
 	cmn	w0, #1
 	add	w7, w20, 1
-	beq	.L973
+	beq	.L988
 	ldr	x6, [x19, #:lo12:.LANCHOR146]
 	ldr	w0, [x6]
 	cmp	w0, w25
-	bne	.L973
+	bne	.L988
 	mov	w1, 2036
 	add	x0, x6, 12
 	bl	JSHash
 	ldr	w1, [x6, 8]
 	cmp	w1, w0
-	bne	.L973
+	bne	.L988
 	ldr	w0, [x21]
 	cmp	w23, 1
 	str	w7, [x26]
 	mul	w20, w0, w20
 	adrp	x0, .LANCHOR148
 	str	w20, [x0, #:lo12:.LANCHOR148]
-	beq	.L976
+	beq	.L991
 	mov	w23, 1
-.L973:
+.L988:
 	mov	w20, w7
 	cmp	w7, 4
-	bne	.L975
-.L974:
+	bne	.L990
+.L989:
 	mov	w0, 0
 	bl	flash_exit_slc_mode
 	cmp	w23, 0
@@ -6822,9 +6867,9 @@ FlashSavePhyInfo:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L976:
+.L991:
 	mov	w23, 2
-	b	.L974
+	b	.L989
 	.size	FlashSavePhyInfo, .-FlashSavePhyInfo
 	.section	.text.FlashReadIdbDataRaw,"ax",@progbits
 	.align	2
@@ -6855,10 +6900,10 @@ FlashReadIdbDataRaw:
 	stp	x27, x28, [sp, 80]
 	str	x0, [x29, 120]
 	cmp	w2, w1
-	bne	.L983
+	bne	.L998
 	mov	w0, 0
 	bl	flash_enter_slc_mode
-.L983:
+.L998:
 	adrp	x24, .LANCHOR2
 	adrp	x22, .LANCHOR3
 	add	x27, x29, 136
@@ -6870,11 +6915,11 @@ FlashReadIdbDataRaw:
 	mov	w1, 0
 	mov	x0, x23
 	bl	ftl_memset
-.L984:
+.L999:
 	ldrb	w0, [x24, #:lo12:.LANCHOR2]
 	cmp	w19, w0
-	bcc	.L989
-.L988:
+	bcc	.L1004
+.L1003:
 	mov	w0, w26
 	bl	FlashBchSel
 	ldr	x0, [x29, 120]
@@ -6882,10 +6927,10 @@ FlashReadIdbDataRaw:
 	mov	w0, 12336
 	movk	w0, 0x5638, lsl 16
 	cmp	w1, w0
-	bne	.L982
+	bne	.L997
 	mov	w0, 0
 	bl	flash_exit_slc_mode
-.L982:
+.L997:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6894,10 +6939,10 @@ FlashReadIdbDataRaw:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L989:
+.L1004:
 	mov	x4, 0
 	adrp	x25, .LANCHOR147
-.L986:
+.L1001:
 	ldrb	w5, [x4, x27]
 	add	x21, x25, :lo12:.LANCHOR147
 	str	w5, [x29, 116]
@@ -6912,24 +6957,24 @@ FlashReadIdbDataRaw:
 	bl	FlashReadRawPage
 	cmn	w0, #1
 	ldr	w5, [x29, 116]
-	bne	.L985
+	bne	.L1000
 	ldr	x4, [x29, 104]
 	add	x4, x4, 1
 	cmp	x4, 4
-	bne	.L986
-.L987:
+	bne	.L1001
+.L1002:
 	add	w19, w19, 1
-	b	.L984
-.L992:
+	b	.L999
+.L1007:
 	mov	w20, 0
-	b	.L988
-.L985:
+	b	.L1003
+.L1000:
 	ldr	x0, [x21]
 	ldr	w1, [x0]
 	mov	w0, 35899
 	movk	w0, 0xfcdc, lsl 16
 	cmp	w1, w0
-	bne	.L987
+	bne	.L1002
 	mov	w1, w5
 	adrp	x0, .LC14
 	add	x0, x0, :lo12:.LC14
@@ -6944,11 +6989,11 @@ FlashReadIdbDataRaw:
 	adrp	x0, .LANCHOR149
 	ldr	w1, [x0, #:lo12:.LANCHOR149]
 	cmp	w19, w1
-	bcs	.L992
+	bcs	.L1007
 	str	w19, [x0, #:lo12:.LANCHOR149]
 	mov	w20, 0
 	bl	FlashSavePhyInfo
-	b	.L987
+	b	.L1002
 	.size	FlashReadIdbDataRaw, .-FlashReadIdbDataRaw
 	.section	.text.FlashPageProgMsbFFData,"ax",@progbits
 	.align	2
@@ -6969,44 +7014,44 @@ FlashPageProgMsbFFData:
 	stp	x23, x24, [sp, 48]
 	str	x25, [sp, 64]
 	ldrb	w0, [x0, 19]
-	cbz	w3, .L996
+	cbz	w3, .L1011
 	adrp	x2, .LANCHOR29
 	ldr	w3, [x2, #:lo12:.LANCHOR29]
 	mov	w2, 12336
 	movk	w2, 0x5638, lsl 16
 	cmp	w3, w2
-	beq	.L995
-.L996:
+	beq	.L1010
+.L1011:
 	sub	w0, w0, #5
 	and	w0, w0, 255
 	cmp	w0, 63
-	bhi	.L995
+	bhi	.L1010
 	mov	x2, 16391
 	movk	x2, 0x4000, lsl 16
 	movk	x2, 0x8000, lsl 48
 	lsr	x0, x2, x0
-	tbz	x0, 0, .L995
+	tbz	x0, 0, .L1010
 	adrp	x20, .LANCHOR120
 	mov	w24, w1
 	add	x20, x20, :lo12:.LANCHOR120
 	mov	w23, 65535
 	adrp	x25, .LANCHOR153
-.L998:
+.L1013:
 	ldr	x0, [x22, #:lo12:.LANCHOR18]
 	ldrh	w0, [x0, 10]
 	cmp	w0, w19
-	bhi	.L999
-.L995:
+	bhi	.L1014
+.L1010:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L999:
+.L1014:
 	ldrh	w0, [x20, w19, sxtw 1]
 	cmp	w0, w23
-	bne	.L995
+	bne	.L1010
 	ldr	x0, [x25, #:lo12:.LANCHOR153]
 	mov	w2, 32768
 	mov	w1, 255
@@ -7018,7 +7063,7 @@ FlashPageProgMsbFFData:
 	mov	w0, w21
 	and	w19, w19, 65535
 	bl	FlashProgPage
-	b	.L998
+	b	.L1013
 	.size	FlashPageProgMsbFFData, .-FlashPageProgMsbFFData
 	.section	.text.idb_write_data,"ax",@progbits
 	.align	2
@@ -7035,16 +7080,16 @@ idb_write_data:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	bls	.L1005
+	bls	.L1020
 	cmp	w1, 575
-	bhi	.L1006
+	bhi	.L1021
 	adrp	x0, .LANCHOR154
 	mov	x1, x2
 	mov	w2, 1
 	cmp	w4, 64
 	str	w2, [x0, #:lo12:.LANCHOR154]
 	adrp	x0, idb_buf
-	bhi	.L1007
+	bhi	.L1022
 	mov	w2, 64
 	sub	w4, w2, w4
 	sub	w2, w3, w4
@@ -7052,9 +7097,9 @@ idb_write_data:
 	lsl	w2, w2, 9
 	add	x1, x1, x4
 	add	x0, x0, :lo12:idb_buf
-.L1057:
+.L1072:
 	bl	ftl_memcpy
-.L1040:
+.L1055:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -7063,7 +7108,7 @@ idb_write_data:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 240
 	ret
-.L1007:
+.L1022:
 	mov	w2, 576
 	sub	w2, w2, w4
 	cmp	w3, w2
@@ -7073,15 +7118,15 @@ idb_write_data:
 	add	x0, x0, :lo12:idb_buf
 	lsl	w2, w2, 9
 	add	x0, x0, x4
-	b	.L1057
-.L1005:
+	b	.L1072
+.L1020:
 	cmp	w1, 575
-	bls	.L1040
-.L1006:
+	bls	.L1055
+.L1021:
 	adrp	x0, .LANCHOR154
 	str	x0, [x29, 112]
 	ldr	w1, [x0, #:lo12:.LANCHOR154]
-	cbz	w1, .L1040
+	cbz	w1, .L1055
 	adrp	x21, .LANCHOR18
 	adrp	x1, idb_buf+262140
 	adrp	x25, idb_buf
@@ -7098,9 +7143,9 @@ idb_write_data:
 	udiv	w0, w0, w20
 	str	w0, [x29, 172]
 	mov	w0, 0
-.L1011:
+.L1026:
 	ldr	w4, [x1]
-	cbnz	w4, .L1009
+	cbnz	w4, .L1024
 	ldr	w4, [x5, w0, uxtw 2]
 	add	w0, w0, 1
 	str	w4, [x1], -4
@@ -7108,8 +7153,8 @@ idb_write_data:
 	sub	w2, w2, #1
 	csel	w0, w0, wzr, cc
 	cmp	w2, 4096
-	bne	.L1011
-.L1009:
+	bne	.L1026
+.L1024:
 	add	x0, x25, :lo12:idb_buf
 	mov	w3, 512
 	mov	w23, 0
@@ -7126,19 +7171,19 @@ idb_write_data:
 	adrp	x0, .LANCHOR16
 	add	x0, x0, :lo12:.LANCHOR16
 	str	x0, [x29, 160]
-.L1012:
+.L1027:
 	cmp	w24, 15
-	bls	.L1030
-	cbnz	w23, .L1032
+	bls	.L1045
+	cbnz	w23, .L1047
 	adrp	x0, .LC17
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC17
 	bl	printf
-.L1032:
+.L1047:
 	ldr	x0, [x29, 112]
 	str	wzr, [x0, #:lo12:.LANCHOR154]
-	b	.L1040
-.L1030:
+	b	.L1055
+.L1045:
 	adrp	x27, gp_flash_check_buf
 	mov	x2, 512
 	mov	w1, 0
@@ -7153,21 +7198,21 @@ idb_write_data:
 	mul	w26, w22, w26
 	and	w26, w26, 65535
 	cmp	w26, 511
-	bhi	.L1013
+	bhi	.L1028
 	add	w0, w26, w19
 	bl	FW_FlashBlockErase.constprop.41
-.L1013:
+.L1028:
 	udiv	w4, w19, w26
 	adrp	x5, .LANCHOR8
 	add	x5, x5, :lo12:.LANCHOR8
 	mov	x28, 0
 	msub	w4, w4, w26, w19
 	sub	w26, w19, w4
-.L1014:
+.L1029:
 	add	x6, x25, :lo12:idb_buf
 	cmp	x28, 128
 	add	x6, x6, x28, lsl 11
-	bne	.L1018
+	bne	.L1033
 	ldr	x0, [x21, #:lo12:.LANCHOR18]
 	mov	w26, 0
 	ldr	x1, [x29, 136]
@@ -7185,9 +7230,9 @@ idb_write_data:
 	str	w0, [x29, 128]
 	mul	w0, w22, w28
 	ubfx	x0, x0, 2, 2
-.L1019:
+.L1034:
 	cmp	w26, 511
-	bhi	.L1026
+	bhi	.L1041
 	ldr	x3, [x29, 104]
 	mov	w1, 4
 	sub	w1, w1, w0
@@ -7198,14 +7243,14 @@ idb_write_data:
 	lsr	w2, w2, 2
 	ldrb	w3, [x3]
 	ldrh	w1, [x1, w2, sxtw 1]
-	cbz	w3, .L1020
+	cbz	w3, .L1035
 	adrp	x3, .LANCHOR29
 	mov	w4, 12336
 	movk	w4, 0x5638, lsl 16
 	ldr	w3, [x3, #:lo12:.LANCHOR29]
 	cmp	w3, w4
 	csel	w1, w1, w2, ne
-.L1020:
+.L1035:
 	ldr	w2, [x29, 128]
 	add	w0, w0, w2
 	madd	w3, w28, w1, w0
@@ -7221,11 +7266,11 @@ idb_write_data:
 	mul	w0, w0, w1
 	mul	w0, w0, w4
 	cmp	w3, w0
-	bcs	.L1021
+	bcs	.L1036
 	adrp	x0, .LANCHOR152
 	ldrb	w0, [x0, #:lo12:.LANCHOR152]
 	bl	FlashBchSel
-.L1021:
+.L1036:
 	mov	w0, 0
 	bl	flash_boot_enter_slc_mode
 	udiv	w1, w3, w4
@@ -7236,11 +7281,11 @@ idb_write_data:
 	bl	FlashReadPage
 	mov	w3, w0
 	cmn	w0, #1
-	bne	.L1022
+	bne	.L1037
 	adrp	x0, .LANCHOR152
 	ldrb	w0, [x0, #:lo12:.LANCHOR152]
 	cmp	w0, 40
-	beq	.L1022
+	beq	.L1037
 	mov	w0, 40
 	bl	FlashBchSel
 	ldr	w1, [x29, 168]
@@ -7249,26 +7294,26 @@ idb_write_data:
 	mov	w0, 0
 	bl	FlashReadPage
 	mov	w3, w0
-.L1022:
+.L1037:
 	mov	w0, 0
 	bl	flash_boot_exit_slc_mode
 	ldrb	w0, [x29, 124]
 	bl	FlashBchSel
 	cmn	w3, #1
-	bne	.L1023
-.L1026:
+	bne	.L1038
+.L1041:
 	ldr	x0, [x29, 136]
 	add	x1, x25, :lo12:idb_buf
 	mov	x22, 0
 	add	x26, x0, :lo12:gp_flash_check_buf
-.L1024:
+.L1039:
 	lsl	x0, x22, 2
 	mov	w27, w22
 	add	x28, x0, x1
 	ldr	w2, [x0, x26]
 	ldr	w0, [x0, x1]
 	cmp	w2, w0
-	beq	.L1027
+	beq	.L1042
 	mov	x2, 512
 	mov	w1, 0
 	mov	x0, x26
@@ -7284,48 +7329,48 @@ idb_write_data:
 	bl	FW_FlashBlockErase.constprop.41
 	ldr	w0, [x29, 172]
 	cmp	w0, 1
-	bls	.L1028
+	bls	.L1043
 	add	w0, w20, w19
 	bl	FW_FlashBlockErase.constprop.41
-.L1028:
+.L1043:
 	ldr	w0, [x29, 172]
 	add	w24, w24, w0
 	ldr	w0, [x29, 120]
 	add	w19, w19, w0
-	b	.L1012
-.L1018:
+	b	.L1027
+.L1033:
 	add	w1, w4, w28, lsl 2
 	lsr	w1, w1, 2
-	cbz	w1, .L1015
+	cbz	w1, .L1030
 	ldr	x0, [x29, 160]
 	add	w2, w1, 1
 	ldrb	w3, [x5]
 	ldrh	w0, [x0, w2, sxtw 1]
-	cbz	w3, .L1016
+	cbz	w3, .L1031
 	adrp	x3, .LANCHOR29
 	mov	w7, 12336
 	movk	w7, 0x5638, lsl 16
 	ldr	w3, [x3, #:lo12:.LANCHOR29]
 	cmp	w3, w7
 	csel	w0, w0, w2, ne
-.L1016:
+.L1031:
 	lsl	w0, w0, 2
 	sub	w0, w0, #4
 	str	w0, [x29, 176]
-.L1015:
+.L1030:
 	mov	w0, 61424
 	str	w0, [x29, 180]
 	ldr	x0, [x29, 160]
 	ldrh	w27, [x0, w1, sxtw 1]
 	ldrb	w0, [x5]
-	cbz	w0, .L1017
+	cbz	w0, .L1032
 	adrp	x0, .LANCHOR29
 	mov	w2, 12336
 	movk	w2, 0x5638, lsl 16
 	ldr	w0, [x0, #:lo12:.LANCHOR29]
 	cmp	w0, w2
 	csel	w27, w27, w1, ne
-.L1017:
+.L1032:
 	adrp	x0, .LANCHOR33
 	madd	w8, w22, w27, w26
 	str	x5, [x29, 128]
@@ -7356,8 +7401,8 @@ idb_write_data:
 	bl	FlashPageProgMsbFFData
 	ldr	w4, [x29, 168]
 	ldr	x5, [x29, 128]
-	b	.L1014
-.L1023:
+	b	.L1029
+.L1038:
 	ldr	x0, [x29, 144]
 	ubfiz	x0, x0, 9, 16
 	add	x27, x27, x0
@@ -7365,15 +7410,15 @@ idb_write_data:
 	add	w26, w0, w26
 	mov	w0, 0
 	and	w26, w26, 65535
-	b	.L1019
-.L1027:
+	b	.L1034
+.L1042:
 	add	x22, x22, 1
 	cmp	x22, 65536
-	bne	.L1024
+	bne	.L1039
 	add	w23, w23, 1
 	cmp	w23, 5
-	bls	.L1028
-	b	.L1032
+	bls	.L1043
+	b	.L1047
 	.size	idb_write_data, .-idb_write_data
 	.section	.text.ftl_memcmp,"ax",@progbits
 	.align	2
@@ -7437,10 +7482,10 @@ NandcInit:
 	ldr	w2, [x0, 352]
 	str	w2, [x4, #:lo12:.LANCHOR29]
 	cmp	w2, 2049
-	bne	.L1062
+	bne	.L1077
 	mov	w2, 8
 	str	w2, [x3, #:lo12:.LANCHOR34]
-.L1062:
+.L1077:
 	str	w1, [x0]
 	mov	w1, 4225
 	str	wzr, [x0, 336]
@@ -7757,36 +7802,36 @@ FtlMemInit:
 	mov	w3, w5
 	str	x0, [x2, 32]
 	mov	x0, 1
-.L1065:
+.L1080:
 	cmp	w0, w7
-	bcc	.L1066
+	bcc	.L1081
 	mov	w2, 8
 	sub	w2, w2, w0
 	add	x2, x2, 1
 	add	x1, x1, :lo12:.LANCHOR75
 	mov	x3, 0
-.L1067:
+.L1082:
 	add	x3, x3, 1
 	cmp	x2, x3
-	bne	.L1068
+	bne	.L1083
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1066:
+.L1081:
 	ldr	x4, [x2, 32]
 	add	w0, w0, 1
 	add	x4, x4, x3, uxtw 2
 	add	w3, w3, w5
 	str	x4, [x6], 8
-	b	.L1065
-.L1068:
+	b	.L1080
+.L1083:
 	add	x4, x0, x3
 	add	x4, x1, x4, lsl 3
 	str	xzr, [x4, 24]
-	b	.L1067
+	b	.L1082
 	.size	FtlMemInit, .-FtlMemInit
 	.section	.text.ftl_free,"ax",@progbits
 	.align	2
@@ -7874,9 +7919,9 @@ rknand_print_hex:
 	mov	x19, 0
 	mov	w20, 0
 	adrp	x27, .LC20
-.L1078:
+.L1093:
 	cmp	x25, x19
-	bne	.L1084
+	bne	.L1099
 	ldp	x19, x20, [sp, 16]
 	adrp	x1, .LC20
 	ldp	x21, x22, [sp, 32]
@@ -7888,38 +7933,38 @@ rknand_print_hex:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	printf
-.L1084:
-	cbnz	w20, .L1079
+.L1099:
+	cbnz	w20, .L1094
 	mov	w2, w19
 	mov	x1, x26
 	mov	x0, x23
 	bl	printf
-.L1079:
+.L1094:
 	cmp	w24, 4
-	bne	.L1080
+	bne	.L1095
 	ldr	w1, [x22, x19, lsl 2]
-.L1086:
+.L1101:
 	mov	x0, x21
 	add	w20, w20, 1
 	bl	printf
 	cmp	w20, 15
-	bls	.L1083
+	bls	.L1098
 	mov	w20, 0
 	add	x1, x27, :lo12:.LC20
 	adrp	x0, .LC7
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1083:
+.L1098:
 	add	x19, x19, 1
-	b	.L1078
-.L1080:
+	b	.L1093
+.L1095:
 	cmp	w24, 2
-	bne	.L1082
+	bne	.L1097
 	ldrsh	w1, [x22, x19, lsl 1]
-	b	.L1086
-.L1082:
+	b	.L1101
+.L1097:
 	ldrb	w1, [x22, x19]
-	b	.L1086
+	b	.L1101
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.HynixGetReadRetryDefault,"ax",@progbits
 	.align	2
@@ -7946,18 +7991,18 @@ HynixGetReadRetryDefault:
 	strb	w4, [x0, 5]
 	strb	w3, [x0, 6]
 	strb	w1, [x0, 7]
-	bne	.L1088
+	bne	.L1103
 	mov	w1, -89
 	strb	w1, [x0, 4]
 	adrp	x0, .LANCHOR196+17
 	mov	w1, -9
 	strb	w1, [x0, #:lo12:.LANCHOR196+17]
-.L1144:
+.L1159:
 	mov	w27, 7
-	b	.L1179
-.L1088:
+	b	.L1194
+.L1103:
 	cmp	w26, 3
-	bne	.L1090
+	bne	.L1105
 	mov	w1, -80
 	strb	w1, [x0, 4]
 	mov	w1, -79
@@ -7973,14 +8018,14 @@ HynixGetReadRetryDefault:
 	mov	w1, -74
 	strb	w1, [x0, 10]
 	mov	w1, -73
-.L1180:
+.L1195:
 	mov	w27, 8
 	mov	w28, w27
 	strb	w1, [x0, 11]
-.L1089:
+.L1104:
 	sub	w0, w26, #1
 	cmp	w0, 1
-	bhi	.L1094
+	bhi	.L1109
 	adrp	x26, .LANCHOR25
 	adrp	x0, .LANCHOR26
 	adrp	x25, .LANCHOR6
@@ -7988,11 +8033,11 @@ HynixGetReadRetryDefault:
 	add	x4, x0, :lo12:.LANCHOR26
 	add	x25, x25, :lo12:.LANCHOR6
 	mov	w24, 0
-.L1095:
+.L1110:
 	ldrb	w0, [x26]
 	cmp	w0, w24
-	bhi	.L1101
-.L1102:
+	bhi	.L1116
+.L1117:
 	add	x20, x20, :lo12:.LANCHOR20
 	ldp	x21, x22, [sp, 32]
 	strb	w28, [x20, 1]
@@ -8003,9 +8048,9 @@ HynixGetReadRetryDefault:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1090:
+.L1105:
 	cmp	w26, 4
-	bne	.L1091
+	bne	.L1106
 	mov	w5, -52
 	strb	w5, [x0, 4]
 	mov	w5, -65
@@ -8018,10 +8063,10 @@ HynixGetReadRetryDefault:
 	mov	w5, -51
 	strb	w3, [x0, 10]
 	strb	w5, [x0, 8]
-	b	.L1180
-.L1091:
+	b	.L1195
+.L1106:
 	cmp	w26, 5
-	bne	.L1092
+	bne	.L1107
 	mov	w1, 56
 	strb	w1, [x0, 4]
 	mov	w1, 57
@@ -8031,12 +8076,12 @@ HynixGetReadRetryDefault:
 	strb	w1, [x0, 6]
 	mov	w1, 59
 	strb	w1, [x0, 7]
-.L1179:
+.L1194:
 	mov	w28, 4
-	b	.L1089
-.L1092:
+	b	.L1104
+.L1107:
 	cmp	w26, 6
-	bne	.L1093
+	bne	.L1108
 	mov	w1, 14
 	strb	w1, [x0, 4]
 	mov	w1, 15
@@ -8046,10 +8091,10 @@ HynixGetReadRetryDefault:
 	strb	w1, [x0, 6]
 	mov	w1, 17
 	strb	w1, [x0, 7]
-	b	.L1179
-.L1093:
+	b	.L1194
+.L1108:
 	cmp	w26, 7
-	bne	.L1144
+	bne	.L1159
 	mov	w1, -80
 	strb	w1, [x0, 4]
 	mov	w1, -79
@@ -8072,8 +8117,8 @@ HynixGetReadRetryDefault:
 	mov	w28, 10
 	mov	w1, -43
 	strb	w1, [x0, 13]
-	b	.L1089
-.L1101:
+	b	.L1104
+.L1116:
 	ldrb	w1, [x4, w24, sxtw]
 	add	x0, x20, :lo12:.LANCHOR20
 	mov	x21, x0
@@ -8087,7 +8132,7 @@ HynixGetReadRetryDefault:
 	ldrb	w23, [x2, 8]
 	add	x23, x1, x23, lsl 8
 	mov	w1, 55
-.L1096:
+.L1111:
 	add	x0, x21, x22
 	str	w1, [x23, 2056]
 	str	x4, [x29, 128]
@@ -8102,15 +8147,15 @@ HynixGetReadRetryDefault:
 	cmp	w28, w22, uxtb
 	ldr	w1, [x29, 140]
 	ldr	x4, [x29, 128]
-	bhi	.L1096
+	bhi	.L1111
 	adrp	x2, .LANCHOR196
 	add	x2, x2, :lo12:.LANCHOR196
 	mov	x0, 0
-.L1099:
+.L1114:
 	add	x7, x19, x0
 	add	x6, x2, x0
 	mov	x1, 1
-.L1098:
+.L1113:
 	lsl	x3, x1, 2
 	lsl	x8, x1, 3
 	ldrb	w10, [x19, x0]
@@ -8119,10 +8164,10 @@ HynixGetReadRetryDefault:
 	ldrb	w3, [x6, x3]
 	add	w3, w3, w10
 	strb	w3, [x7, x8]
-	bne	.L1098
+	bne	.L1113
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L1099
+	bne	.L1114
 	add	w24, w24, 1
 	strb	wzr, [x19, 16]
 	strb	wzr, [x19, 24]
@@ -8132,11 +8177,11 @@ HynixGetReadRetryDefault:
 	strb	wzr, [x19, 48]
 	strb	wzr, [x19, 41]
 	strb	wzr, [x19, 49]
-	b	.L1095
-.L1094:
+	b	.L1110
+.L1109:
 	sub	w0, w26, #3
 	cmp	w0, 4
-	bhi	.L1102
+	bhi	.L1117
 	mul	w24, w27, w28
 	adrp	x25, .LANCHOR25
 	sub	w22, w28, #1
@@ -8153,11 +8198,11 @@ HynixGetReadRetryDefault:
 	str	x0, [x29, 120]
 	add	x0, x22, 1
 	str	x0, [x29, 112]
-.L1103:
+.L1118:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, w21
-	bls	.L1102
+	bls	.L1117
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w22, [x0, w21, sxtw]
@@ -8174,37 +8219,37 @@ HynixGetReadRetryDefault:
 	bl	NandcWaitFlashReady
 	add	x1, x20, :lo12:.LANCHOR20
 	cmp	w26, 7
-	beq	.L1104
+	beq	.L1119
 	ubfiz	x0, x22, 6, 8
 	add	x0, x0, 20
-.L1181:
+.L1196:
 	add	x3, x1, x0
 	mov	w0, 54
 	str	w0, [x19, 2056]
 	cmp	w26, 4
-	bne	.L1106
+	bne	.L1121
 	mov	w0, 255
 	str	w0, [x19, 2052]
 	mov	w0, 64
 	str	w0, [x19, 2048]
 	mov	w0, 204
-.L1182:
+.L1197:
 	str	w0, [x19, 2052]
 	mov	w0, 77
-	b	.L1183
-.L1104:
+	b	.L1198
+.L1119:
 	mov	x3, 28
 	mov	w0, 160
 	umaddl	x0, w0, w22, x3
-	b	.L1181
-.L1106:
+	b	.L1196
+.L1121:
 	cmp	w25, 1
-	bhi	.L1108
+	bhi	.L1123
 	add	x0, x20, :lo12:.LANCHOR20
 	ldrb	w0, [x0, 4]
 	str	w0, [x19, 2052]
 	mov	w0, 82
-.L1183:
+.L1198:
 	str	w0, [x19, 2048]
 	mov	w0, 22
 	str	w0, [x19, 2056]
@@ -8218,10 +8263,10 @@ HynixGetReadRetryDefault:
 	str	wzr, [x19, 2056]
 	str	wzr, [x19, 2052]
 	str	wzr, [x19, 2052]
-	bne	.L1109
+	bne	.L1124
 	mov	w0, 31
 	str	w0, [x19, 2052]
-.L1110:
+.L1125:
 	mov	w7, 2
 	str	w7, [x19, 2052]
 	str	wzr, [x19, 2052]
@@ -8233,120 +8278,120 @@ HynixGetReadRetryDefault:
 	bl	NandcWaitFlashReady
 	cmp	w25, 1
 	ldr	x3, [x29, 104]
-	bls	.L1145
+	bls	.L1160
 	ldr	w7, [x29, 136]
 	cmp	w26, 7
 	mov	w1, 32
 	csel	w1, w1, w7, eq
-.L1111:
+.L1126:
 	adrp	x8, .LANCHOR147
 	mov	x7, 0
 	ldr	x0, [x8, #:lo12:.LANCHOR147]
-.L1112:
+.L1127:
 	ldr	w10, [x19, 2048]
 	strb	w10, [x0, x7]
 	add	x7, x7, 1
 	cmp	w1, w7, uxtb
-	bhi	.L1112
+	bhi	.L1127
 	cmp	w26, 7
-	bne	.L1113
+	bne	.L1128
 	mov	w1, 0
-.L1115:
+.L1130:
 	ldrb	w7, [x0]
 	cmp	w7, 12
-	beq	.L1114
+	beq	.L1129
 	ldrb	w7, [x0, 1]
 	cmp	w7, 10
-	beq	.L1114
+	beq	.L1129
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 255
 	cmp	w1, 8
-	bne	.L1115
-.L1116:
+	bne	.L1130
+.L1131:
 	adrp	x0, .LC21
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC21
 	bl	printf
-.L1118:
-	b	.L1118
-.L1108:
+.L1133:
+	b	.L1133
+.L1123:
 	mov	w0, 174
 	str	w0, [x19, 2052]
 	str	wzr, [x19, 2048]
 	mov	w0, 176
-	b	.L1182
-.L1109:
+	b	.L1197
+.L1124:
 	str	wzr, [x19, 2052]
-	b	.L1110
-.L1145:
+	b	.L1125
+.L1160:
 	mov	w1, 16
-	b	.L1111
-.L1114:
+	b	.L1126
+.L1129:
 	cmp	w1, 6
-	bhi	.L1116
-.L1117:
+	bhi	.L1131
+.L1132:
 	ldr	x7, [x8, #:lo12:.LANCHOR147]
 	mov	x0, 0
-.L1122:
+.L1137:
 	ldr	w1, [x29, 128]
 	cmp	w1, w0
-	bgt	.L1123
+	bgt	.L1138
 	ldr	x1, [x8, #:lo12:.LANCHOR147]
 	mov	w10, 8
 	add	x8, x1, x24
-.L1125:
+.L1140:
 	mov	x0, 0
-.L1124:
+.L1139:
 	ldr	w11, [x8, x0, lsl 2]
 	mvn	w11, w11
 	str	w11, [x8, x0, lsl 2]
 	add	x0, x0, 1
 	cmp	w23, w0
-	bgt	.L1124
+	bgt	.L1139
 	ldr	w0, [x29, 140]
 	subs	w10, w10, #1
 	add	x8, x8, x0, uxtw 2
-	bne	.L1125
+	bne	.L1140
 	mov	x11, x1
 	mov	w12, 0
 	mov	w16, 1
-.L1131:
+.L1146:
 	mov	w8, 0
 	mov	w0, 0
-.L1130:
+.L1145:
 	mov	x15, x11
 	lsl	w10, w16, w0
 	mov	w14, 16
 	mov	w13, 0
-.L1128:
+.L1143:
 	ldr	w17, [x15]
 	add	x15, x15, x24
 	bics	wzr, w10, w17
 	cinc	w13, w13, eq
 	subs	w14, w14, #1
-	bne	.L1128
+	bne	.L1143
 	cmp	w13, 9
 	orr	w10, w8, w10
 	add	w0, w0, 1
 	csel	w8, w10, w8, cs
 	cmp	w0, 32
-	bne	.L1130
+	bne	.L1145
 	str	w8, [x11], 4
 	add	w12, w12, 1
 	cmp	w23, w12
-	bgt	.L1131
+	bgt	.L1146
 	mov	x0, 0
 	mov	w8, 0
-.L1134:
+.L1149:
 	ldr	w10, [x1, x0]
 	add	x0, x0, 4
 	cmp	w10, 0
 	cinc	w8, w8, eq
 	cmp	x0, 32
-	bne	.L1134
+	bne	.L1149
 	cmp	w8, 7
-	ble	.L1135
+	ble	.L1150
 	mov	w3, 1024
 	mov	w2, 1
 	adrp	x0, .LC22
@@ -8356,64 +8401,64 @@ HynixGetReadRetryDefault:
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC21
 	bl	printf
-.L1136:
-	b	.L1136
-.L1113:
+.L1151:
+	b	.L1151
+.L1128:
 	cmp	w26, 6
-	bne	.L1117
+	bne	.L1132
 	mov	x1, 0
-.L1119:
+.L1134:
 	ldrb	w7, [x0, x1]
 	cmp	w7, 12
-	beq	.L1117
+	beq	.L1132
 	add	x7, x0, x1
 	ldrb	w7, [x7, 8]
 	cmp	w7, 4
-	beq	.L1117
+	beq	.L1132
 	add	x1, x1, 1
 	cmp	x1, 8
-	bne	.L1119
+	bne	.L1134
 	adrp	x0, .LC21
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC21
 	bl	printf
-.L1121:
-	b	.L1121
-.L1123:
+.L1136:
+	b	.L1136
+.L1138:
 	ldr	w1, [x19, 2048]
 	strb	w1, [x7, x0]
 	add	x0, x0, 1
-	b	.L1122
-.L1135:
+	b	.L1137
+.L1150:
 	cmp	w26, 6
-	beq	.L1147
+	beq	.L1162
 	cmp	w26, 7
 	mov	x1, 8
 	mov	x0, 10
 	csel	x0, x0, x1, eq
-.L1137:
+.L1152:
 	mov	x1, x3
 	mov	w8, 0
-.L1138:
+.L1153:
 	mov	x3, 0
-.L1139:
+.L1154:
 	ldrb	w10, [x7, x3]
 	strb	w10, [x1, x3]
 	add	x3, x3, 1
 	cmp	w28, w3, uxtb
-	bhi	.L1139
+	bhi	.L1154
 	ldr	x2, [x29, 112]
 	add	w8, w8, 1
 	add	x1, x1, x0
 	cmp	w27, w8
 	add	x7, x7, x2
-	bgt	.L1138
+	bgt	.L1153
 	mov	w0, 255
 	str	w0, [x19, 2056]
 	mov	w0, w22
 	bl	NandcWaitFlashReady
 	cmp	w25, 1
-	bhi	.L1141
+	bhi	.L1156
 	mov	w0, 54
 	str	w0, [x19, 2056]
 	adrp	x0, .LANCHOR20+4
@@ -8425,19 +8470,19 @@ HynixGetReadRetryDefault:
 	str	w0, [x19, 2056]
 	mov	w0, w21
 	bl	FlashReadCmd
-.L1142:
+.L1157:
 	add	w21, w21, 1
 	mov	w0, w22
 	and	w21, w21, 255
 	bl	NandcWaitFlashReady
-	b	.L1103
-.L1147:
+	b	.L1118
+.L1162:
 	mov	x0, 4
-	b	.L1137
-.L1141:
+	b	.L1152
+.L1156:
 	mov	w0, 56
 	str	w0, [x19, 2056]
-	b	.L1142
+	b	.L1157
 	.size	HynixGetReadRetryDefault, .-HynixGetReadRetryDefault
 	.section	.text.FlashGetReadRetryDefault,"ax",@progbits
 	.align	2
@@ -8445,14 +8490,14 @@ HynixGetReadRetryDefault:
 	.type	FlashGetReadRetryDefault, %function
 FlashGetReadRetryDefault:
 	mov	w1, w0
-	cbz	w0, .L1184
+	cbz	w0, .L1199
 	sub	w2, w0, #1
 	cmp	w2, 6
-	bhi	.L1186
+	bhi	.L1201
 	b	HynixGetReadRetryDefault
-.L1186:
+.L1201:
 	cmp	w0, 49
-	bne	.L1187
+	bne	.L1202
 	adrp	x2, .LANCHOR20
 	add	x0, x2, :lo12:.LANCHOR20
 	strb	w1, [x2, #:lo12:.LANCHOR20]
@@ -8463,41 +8508,41 @@ FlashGetReadRetryDefault:
 	adrp	x1, .LANCHOR14
 	add	x1, x1, :lo12:.LANCHOR14
 	mov	w2, 64
-.L1196:
+.L1211:
 	add	x0, x0, 4
 	b	ftl_memcpy
-.L1187:
+.L1202:
 	sub	w0, w0, #65
 	cmp	w1, 33
 	ccmp	w0, 1, 0, ne
-	bhi	.L1188
+	bhi	.L1203
 	adrp	x2, .LANCHOR20
 	add	x0, x2, :lo12:.LANCHOR20
 	strb	w1, [x2, #:lo12:.LANCHOR20]
 	mov	w1, 4
-.L1197:
+.L1212:
 	strb	w1, [x0, 1]
 	mov	w1, 7
 	mov	w2, 45
 	strb	w1, [x0, 2]
 	adrp	x1, .LANCHOR10
 	add	x1, x1, :lo12:.LANCHOR10
-	b	.L1196
-.L1188:
+	b	.L1211
+.L1203:
 	cmp	w1, 34
 	mov	w0, 67
 	ccmp	w1, w0, 4, ne
-	bne	.L1189
+	bne	.L1204
 	adrp	x2, .LANCHOR20
 	add	x0, x2, :lo12:.LANCHOR20
 	strb	w1, [x2, #:lo12:.LANCHOR20]
 	mov	w1, 5
-	b	.L1197
-.L1189:
+	b	.L1212
+.L1204:
 	cmp	w1, 35
 	mov	w0, 68
 	ccmp	w1, w0, 4, ne
-	bne	.L1184
+	bne	.L1199
 	adrp	x2, .LANCHOR20
 	add	x0, x2, :lo12:.LANCHOR20
 	strb	w1, [x2, #:lo12:.LANCHOR20]
@@ -8508,8 +8553,8 @@ FlashGetReadRetryDefault:
 	strb	w1, [x0, 2]
 	adrp	x1, .LANCHOR9
 	add	x1, x1, :lo12:.LANCHOR9
-	b	.L1196
-.L1184:
+	b	.L1211
+.L1199:
 	ret
 	.size	FlashGetReadRetryDefault, .-FlashGetReadRetryDefault
 	.section	.text.FlashInit,"ax",@progbits
@@ -8575,7 +8620,7 @@ FlashInit:
 	mov	x27, x19
 	add	x0, x26, :lo12:.LC23
 	str	x0, [x29, 104]
-.L1203:
+.L1218:
 	and	w26, w28, 255
 	mov	w0, w26
 	bl	FlashReset
@@ -8610,7 +8655,7 @@ FlashInit:
 	sub	w0, w2, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bhi	.L1199
+	bhi	.L1214
 	ldrb	w7, [x19, 5]
 	add	w1, w28, 1
 	ldrb	w6, [x19, 4]
@@ -8619,35 +8664,35 @@ FlashInit:
 	ldrb	w3, [x19, 1]
 	ldr	x0, [x29, 104]
 	bl	printf
-.L1199:
-	cbnz	w28, .L1200
+.L1214:
+	cbnz	w28, .L1215
 	ldrb	w0, [x27]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bhi	.L1241
+	bhi	.L1256
 	ldrb	w0, [x27, 1]
 	cmp	w0, 255
-	beq	.L1241
-.L1200:
+	beq	.L1256
+.L1215:
 	ldrb	w0, [x19]
 	cmp	w0, 181
-	bne	.L1202
+	bne	.L1217
 	mov	w0, 44
 	strb	w0, [x19]
-.L1202:
+.L1217:
 	add	w28, w28, 1
 	add	x25, x25, 16
 	add	x19, x19, 8
 	cmp	w28, 4
-	bne	.L1203
+	bne	.L1218
 	ldrb	w0, [x20, #:lo12:.LANCHOR22]
 	cmp	w0, 173
-	beq	.L1204
+	beq	.L1219
 	adrp	x0, .LANCHOR155
 	ldr	w0, [x0, #:lo12:.LANCHOR155]
 	bl	NandcSetDdrMode
-.L1204:
+.L1219:
 	mov	w2, 852
 	adrp	x26, .LANCHOR20
 	mov	w1, 0
@@ -8662,18 +8707,18 @@ FlashInit:
 	ldrb	w2, [x0, 1]
 	strb	wzr, [x27, #:lo12:.LANCHOR5]
 	cmp	w2, 161
-	beq	.L1205
+	beq	.L1220
 	cmp	w2, 218
-	beq	.L1205
+	beq	.L1220
 	and	w1, w2, -33
 	cmp	w1, 209
-	beq	.L1205
+	beq	.L1220
 	cmp	w2, 220
-	bne	.L1206
+	bne	.L1221
 	ldrb	w0, [x0, 3]
 	cmp	w0, 149
-	bne	.L1206
-.L1205:
+	bne	.L1221
+.L1220:
 	mov	w0, 1
 	adrp	x25, .LANCHOR200
 	add	x1, x25, :lo12:.LANCHOR200
@@ -8686,31 +8731,31 @@ FlashInit:
 	strb	w0, [x1, 1]
 	strb	w2, [x1, 2]
 	cmp	w0, 152
-	bne	.L1207
+	bne	.L1222
 	ldrsb	w0, [x3, 4]
-	tbnz	w0, #31, .L1207
+	tbnz	w0, #31, .L1222
 	mov	w0, 24
 	strb	w0, [x24, #:lo12:.LANCHOR152]
-.L1207:
+.L1222:
 	adrp	x0, .LANCHOR29
 	mov	w1, 12336
 	movk	w1, 0x5638, lsl 16
 	ldr	w0, [x0, #:lo12:.LANCHOR29]
 	cmp	w0, 2049
 	ccmp	w0, w1, 4, ne
-	bne	.L1208
+	bne	.L1223
 	mov	w0, 16
 	strb	w0, [x24, #:lo12:.LANCHOR152]
-.L1208:
+.L1223:
 	cmp	w2, 218
-	bne	.L1209
+	bne	.L1224
 	add	x0, x25, :lo12:.LANCHOR200
 	mov	w1, 2048
 	strh	w1, [x0, 14]
 	mov	w1, -38
-.L1279:
+.L1294:
 	strb	w1, [x0, 2]
-.L1210:
+.L1225:
 	adrp	x1, .LANCHOR143
 	add	x1, x1, :lo12:.LANCHOR143
 	mov	w2, 32
@@ -8722,29 +8767,29 @@ FlashInit:
 	add	x1, x25, :lo12:.LANCHOR200
 	add	x0, x28, :lo12:.LANCHOR31
 	bl	ftl_memcpy
-.L1206:
+.L1221:
 	ldrb	w0, [x22, #:lo12:.LANCHOR1]
 	adrp	x25, .LANCHOR8
-	cbnz	w0, .L1212
+	cbnz	w0, .L1227
 	bl	FlashLoadPhyInfoInRam
-	cbnz	w0, .L1214
+	cbnz	w0, .L1229
 	ldr	x0, [x19, #:lo12:.LANCHOR18]
 	adrp	x24, .LANCHOR24
 	ldrb	w1, [x0, 17]
 	and	w0, w1, 7
 	strb	w0, [x24, #:lo12:.LANCHOR24]
-	tbnz	x1, 0, .L1214
+	tbnz	x1, 0, .L1229
 	mov	w1, 1
 	strb	w1, [x21, #:lo12:.LANCHOR30]
 	bl	FlashSetInterfaceMode
 	ldrb	w0, [x24, #:lo12:.LANCHOR24]
 	bl	NandcSetMode
-.L1214:
+.L1229:
 	ldr	x0, [x19, #:lo12:.LANCHOR18]
 	ldrb	w0, [x0, 26]
 	strb	w0, [x25, #:lo12:.LANCHOR8]
 	bl	FlashLoadPhyInfo
-	cbz	w0, .L1212
+	cbz	w0, .L1227
 	ldr	x0, [x19, #:lo12:.LANCHOR18]
 	ldrh	w1, [x0, 14]
 	adrp	x0, .LC24
@@ -8752,7 +8797,7 @@ FlashInit:
 	bl	printf
 	bl	FlashLoadPhyInfoInRam
 	cmn	w0, #1
-	beq	.L1198
+	beq	.L1213
 	bl	FlashDieInfoInit
 	ldr	x0, [x19, #:lo12:.LANCHOR18]
 	ldrb	w0, [x0, 19]
@@ -8763,28 +8808,28 @@ FlashInit:
 	ldrb	w2, [x0, 9]
 	add	w1, w1, 4095
 	cmp	w2, w1, lsr 12
-	blt	.L1217
+	blt	.L1232
 	ldrh	w1, [x0, 14]
 	add	w1, w1, 255
 	cmp	w2, w1, lsr 8
-	bge	.L1218
-.L1217:
+	bge	.L1233
+.L1232:
 	ldrh	w1, [x0, 14]
 	and	w1, w1, -256
 	strh	w1, [x0, 14]
-.L1218:
+.L1233:
 	adrp	x0, .LANCHOR24
 	ldrb	w0, [x0, #:lo12:.LANCHOR24]
 	tst	w0, 6
-	beq	.L1219
+	beq	.L1234
 	bl	FlashSavePhyInfo
 	adrp	x0, .LANCHOR148
 	ldr	w1, [x0, #:lo12:.LANCHOR148]
 	mov	w0, 0
 	bl	FlashDdrParaScan
-.L1219:
+.L1234:
 	bl	FlashSavePhyInfo
-.L1212:
+.L1227:
 	ldr	x2, [x19, #:lo12:.LANCHOR18]
 	adrp	x24, .LANCHOR24
 	ldrb	w0, [x2, 26]
@@ -8810,7 +8855,7 @@ FlashInit:
 	bl	FlashDieInfoInit
 	ldr	x0, [x19, #:lo12:.LANCHOR18]
 	ldrh	w1, [x0, 16]
-	tbz	x1, 6, .L1221
+	tbz	x1, 6, .L1236
 	adrp	x1, .LANCHOR11
 	ldrb	w0, [x0, 19]
 	adrp	x3, .LANCHOR13
@@ -8825,69 +8870,69 @@ FlashInit:
 	and	w4, w4, 255
 	cmp	w4, 6
 	mov	x4, x3
-	bhi	.L1222
+	bhi	.L1237
 	adrp	x2, HynixReadRetrial
 	add	x2, x2, :lo12:HynixReadRetrial
 	str	x2, [x27, #:lo12:.LANCHOR145]
 	sub	w2, w0, #5
 	and	w2, w2, 255
 	cmp	w2, 1
-	bhi	.L1223
+	bhi	.L1238
 	adrp	x2, .LANCHOR36
 	add	x1, x1, 20
 	mov	w3, 1
 	str	w3, [x2, #:lo12:.LANCHOR36]
-.L1224:
+.L1239:
 	mov	x2, 0
 	mov	w3, 0
-.L1226:
+.L1241:
 	ldrsb	w4, [x1, x2]
 	add	x2, x2, 1
 	cmp	w4, 0
 	cinc	w3, w3, eq
 	cmp	x2, 32
-	bne	.L1226
+	bne	.L1241
 	cmp	w3, 27
-	bls	.L1221
+	bls	.L1236
 	bl	FlashGetReadRetryDefault
 	bl	FlashSavePhyInfo
-.L1221:
+.L1236:
 	adrp	x0, .LANCHOR29
 	ldr	w1, [x0, #:lo12:.LANCHOR29]
 	mov	w0, 12336
 	movk	w0, 0x5638, lsl 16
 	cmp	w1, w0
-	bne	.L1235
+	bne	.L1250
 	ldrb	w0, [x25, #:lo12:.LANCHOR8]
-	cbz	w0, .L1235
+	cbz	w0, .L1250
 	ldr	x0, [x19, #:lo12:.LANCHOR18]
 	strb	wzr, [x0, 18]
-.L1235:
+.L1250:
 	ldrb	w0, [x20, #:lo12:.LANCHOR22]
 	cmp	w0, 44
-	bne	.L1236
+	bne	.L1251
 	ldrb	w0, [x21, #:lo12:.LANCHOR30]
-	cbz	w0, .L1236
+	cbz	w0, .L1251
 	strb	wzr, [x21, #:lo12:.LANCHOR30]
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
 	bl	NandcSetMode
-.L1236:
+.L1251:
 	mov	w0, 0
 	bl	flash_enter_slc_mode
 	ldrb	w0, [x24, #:lo12:.LANCHOR24]
 	tst	w0, 6
-	beq	.L1237
+	beq	.L1252
 	ldrb	w1, [x21, #:lo12:.LANCHOR30]
-	cbnz	w1, .L1238
-	tbnz	x0, 0, .L1237
-.L1238:
+	cbnz	w1, .L1253
+	tbnz	x0, 0, .L1252
+.L1253:
 	adrp	x0, .LANCHOR148
 	ldr	w1, [x0, #:lo12:.LANCHOR148]
 	mov	w0, 0
 	bl	FlashDdrParaScan
-.L1237:
+.L1252:
 	mov	w0, 0
 	bl	flash_exit_slc_mode
 	ldr	x0, [x19, #:lo12:.LANCHOR18]
@@ -8930,7 +8975,7 @@ FlashInit:
 	strh	w1, [x0, 22]
 	ldrb	w5, [x22, #:lo12:.LANCHOR1]
 	cmp	w5, 1
-	bne	.L1239
+	bne	.L1254
 	ubfiz	w1, w1, 1, 15
 	lsr	w4, w4, 1
 	ubfiz	w3, w3, 1, 15
@@ -8939,11 +8984,11 @@ FlashInit:
 	mov	w1, 8
 	strh	w3, [x0, 20]
 	strh	w1, [x0, 26]
-.L1239:
+.L1254:
 	ldrb	w0, [x2, 20]
 	bl	FlashBchSel
 	mov	w0, 0
-.L1198:
+.L1213:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -8951,90 +8996,90 @@ FlashInit:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1209:
+.L1224:
 	cmp	w2, 220
-	bne	.L1210
+	bne	.L1225
 	add	x0, x25, :lo12:.LANCHOR200
 	mov	w1, 4096
 	strh	w1, [x0, 14]
 	mov	w1, -36
-	b	.L1279
-.L1223:
+	b	.L1294
+.L1238:
 	add	x2, x1, 20
 	cmp	w0, 7
 	add	x1, x1, 28
 	csel	x1, x1, x2, eq
-	b	.L1224
-.L1222:
+	b	.L1239
+.L1237:
 	sub	w1, w0, #17
 	and	w1, w1, 255
 	cmp	w1, 2
-	bhi	.L1228
+	bhi	.L1243
 	adrp	x1, MicronReadRetrial
 	add	x1, x1, :lo12:MicronReadRetrial
 	str	x1, [x27, #:lo12:.LANCHOR145]
 	cmp	w0, 19
-	beq	.L1229
-.L1283:
+	beq	.L1244
+.L1298:
 	mov	w0, 7
-	b	.L1281
-.L1229:
+	b	.L1296
+.L1244:
 	mov	w0, 15
-.L1281:
+.L1296:
 	strb	w0, [x2, #:lo12:.LANCHOR151]
-	b	.L1221
-.L1228:
+	b	.L1236
+.L1243:
 	sub	w1, w0, #65
 	cmp	w0, 33
 	and	w1, w1, 255
 	ccmp	w1, 1, 0, ne
-	bhi	.L1230
+	bhi	.L1245
 	adrp	x0, ToshibaReadRetrial
 	add	x0, x0, :lo12:ToshibaReadRetrial
 	str	x0, [x27, #:lo12:.LANCHOR145]
 	mov	w0, 4
 	strb	w0, [x3, #:lo12:.LANCHOR13]
-	b	.L1283
-.L1230:
+	b	.L1298
+.L1245:
 	sub	w3, w0, #34
 	sub	w1, w0, #67
 	and	w3, w3, 255
 	and	w1, w1, 255
 	cmp	w3, 1
 	ccmp	w1, 1, 0, hi
-	bhi	.L1231
+	bhi	.L1246
 	adrp	x3, ToshibaReadRetrial
 	add	x3, x3, :lo12:ToshibaReadRetrial
 	str	x3, [x27, #:lo12:.LANCHOR145]
 	cmp	w0, 35
 	mov	w3, 68
 	ccmp	w0, w3, 4, ne
-	beq	.L1232
+	beq	.L1247
 	mov	w0, 7
-.L1280:
+.L1295:
 	strb	w0, [x2, #:lo12:.LANCHOR151]
 	cmp	w1, 1
-	bhi	.L1234
+	bhi	.L1249
 	mov	w0, 4
-.L1282:
+.L1297:
 	strb	w0, [x4, #:lo12:.LANCHOR13]
-	b	.L1221
-.L1232:
+	b	.L1236
+.L1247:
 	mov	w0, 17
-	b	.L1280
-.L1234:
+	b	.L1295
+.L1249:
 	mov	w0, 5
-	b	.L1282
-.L1231:
+	b	.L1297
+.L1246:
 	cmp	w0, 49
-	bne	.L1221
+	bne	.L1236
 	adrp	x0, SamsungReadRetrial
 	add	x0, x0, :lo12:SamsungReadRetrial
 	str	x0, [x27, #:lo12:.LANCHOR145]
-	b	.L1221
-.L1241:
+	b	.L1236
+.L1256:
 	mov	w0, -2
-	b	.L1198
+	b	.L1213
 	.size	FlashInit, .-FlashInit
 	.section	.text.FlashReadSlc2KPages,"ax",@progbits
 	.align	2
@@ -9059,9 +9104,9 @@ FlashReadSlc2KPages:
 	add	x23, x23, :lo12:.LANCHOR25
 	adrp	x26, .LANCHOR26
 	str	x27, [sp, 80]
-.L1285:
+.L1300:
 	cmp	x22, x19
-	bne	.L1297
+	bne	.L1312
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -9070,7 +9115,7 @@ FlashReadSlc2KPages:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1297:
+.L1312:
 	mov	w1, w25
 	mov	w4, w21
 	add	x3, x29, 104
@@ -9080,15 +9125,15 @@ FlashReadSlc2KPages:
 	ldrb	w1, [x23]
 	ldr	w0, [x29, 104]
 	cmp	w1, w0
-	bhi	.L1286
+	bhi	.L1301
 	mov	w0, -1
 	str	w0, [x19]
-.L1287:
+.L1302:
 	sub	w21, w21, #1
 	add	x19, x19, 56
 	and	w21, w21, 255
-	b	.L1285
-.L1286:
+	b	.L1300
+.L1301:
 	add	x1, x26, :lo12:.LANCHOR26
 	ldrb	w27, [x1, w0, uxtw]
 	mov	w0, w27
@@ -9133,51 +9178,51 @@ FlashReadSlc2KPages:
 	ldrb	w2, [x1, #:lo12:.LANCHOR33]
 	add	w1, w2, w2, lsl 1
 	cmp	w0, w1, lsr 2
-	bls	.L1290
+	bls	.L1305
 	cmn	w0, #1
 	mov	w1, 256
 	csel	w0, w0, w1, eq
-.L1290:
+.L1305:
 	cmp	w0, 256
 	ccmn	w0, #1, 4, ne
 	csel	w0, w0, wzr, eq
 	str	w0, [x19]
 	ldr	x0, [x19, 16]
-	cbz	x0, .L1293
+	cbz	x0, .L1308
 	ldr	w1, [x0, 12]
 	cmn	w1, #1
-	bne	.L1293
+	bne	.L1308
 	ldr	w1, [x0, 8]
 	cmn	w1, #1
-	bne	.L1293
+	bne	.L1308
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L1293
+	beq	.L1308
 	str	w1, [x19]
-.L1293:
+.L1308:
 	ldr	w3, [x19]
 	cmn	w3, #1
-	bne	.L1287
+	bne	.L1302
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC25
 	add	x0, x0, :lo12:.LC25
 	bl	printf
 	ldr	x1, [x19, 8]
-	cbz	x1, .L1295
+	cbz	x1, .L1310
 	adrp	x0, .LC26
 	mov	w3, 8
 	mov	w2, 4
 	add	x0, x0, :lo12:.LC26
 	bl	rknand_print_hex
-.L1295:
+.L1310:
 	ldr	x1, [x19, 16]
-	cbz	x1, .L1287
+	cbz	x1, .L1302
 	mov	w3, 4
 	adrp	x0, .LC27
 	mov	w2, w3
 	add	x0, x0, :lo12:.LC27
 	bl	rknand_print_hex
-	b	.L1287
+	b	.L1302
 	.size	FlashReadSlc2KPages, .-FlashReadSlc2KPages
 	.section	.text.FlashReadPages,"ax",@progbits
 	.align	2
@@ -9194,7 +9239,7 @@ FlashReadPages:
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	stp	w2, w1, [x29, 148]
-	cbnz	w3, .L1316
+	cbnz	w3, .L1331
 	mov	x25, x0
 	adrp	x0, .LANCHOR31+9
 	adrp	x27, .LANCHOR20
@@ -9210,15 +9255,15 @@ FlashReadPages:
 	str	x0, [x29, 104]
 	add	x0, x0, 4
 	str	x0, [x29, 96]
-.L1317:
+.L1332:
 	ldr	w0, [x29, 152]
 	cmp	w22, w0
-	bcc	.L1351
+	bcc	.L1366
 	mov	w0, 0
-	b	.L1315
-.L1316:
+	b	.L1330
+.L1331:
 	bl	FlashReadSlc2KPages
-.L1315:
+.L1330:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9226,7 +9271,7 @@ FlashReadPages:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1351:
+.L1366:
 	mov	w26, 56
 	add	x3, x29, 168
 	ldp	w1, w0, [x29, 148]
@@ -9242,13 +9287,13 @@ FlashReadPages:
 	ldr	w1, [x29, 168]
 	ldrb	w0, [x0, #:lo12:.LANCHOR25]
 	cmp	w0, w1
-	bhi	.L1319
+	bhi	.L1334
 	mov	w0, -1
 	str	w0, [x25, x26]
-.L1320:
+.L1335:
 	add	w22, w22, 1
-	b	.L1317
-.L1319:
+	b	.L1332
+.L1334:
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w19, [x0, w1, uxtw]
@@ -9265,65 +9310,65 @@ FlashReadPages:
 	sub	w0, w2, #1
 	and	w0, w0, 255
 	cmp	w0, 6
-	bhi	.L1322
+	bhi	.L1337
 	add	x0, x27, :lo12:.LANCHOR20
 	sxtw	x1, w19
 	add	x0, x0, x1
 	cmp	w2, 7
 	ldrb	w3, [x0, 12]
-	bne	.L1323
+	bne	.L1338
 	ldrb	w3, [x0, 20]
-.L1323:
+.L1338:
 	adrp	x0, .LANCHOR21
 	add	x0, x0, :lo12:.LANCHOR21
 	ldrb	w0, [x0, x1]
 	cmp	w0, w3
-	beq	.L1322
+	beq	.L1337
 	ldp	x2, x0, [x29, 96]
 	ldrb	w1, [x0, 1]
 	mov	w0, w19
 	bl	HynixSetRRPara
-.L1322:
+.L1337:
 	mov	w0, w19
 	bl	NandcFlashCs
 	ldr	w0, [x29, 148]
 	cmp	w0, 1
 	cset	w0, eq
 	orr	w24, w0, w24, lsr 31
-	cbz	w24, .L1324
+	cbz	w24, .L1339
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L1324
+	cbz	w0, .L1339
 	mov	w0, w19
 	bl	flash_enter_slc_mode
-.L1325:
+.L1340:
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
 	str	x0, [x29, 112]
 	ldr	x0, [x29, 128]
 	add	x0, x0, :lo12:.LANCHOR5
 	str	x0, [x29, 136]
-.L1331:
+.L1346:
 	ldr	w1, [x29, 172]
 	cmn	w1, #1
-	bne	.L1326
+	bne	.L1341
 	cmp	w19, 255
-	beq	.L1353
-.L1326:
-	cbz	w20, .L1328
+	beq	.L1368
+.L1341:
+	cbz	w20, .L1343
 	ldr	x0, [x29, 112]
 	ldr	w2, [x0]
 	mov	w0, w19
 	add	w2, w1, w2
 	bl	FlashReadDpCmd
-.L1329:
+.L1344:
 	mov	w0, w19
 	bl	NandcWaitFlashReady
-	cbz	w20, .L1327
+	cbz	w20, .L1342
 	ldr	w1, [x29, 172]
 	mov	w0, w19
 	bl	FlashReadDpDataOutCmd
-.L1327:
+.L1342:
 	ldrb	w2, [x29, 156]
 	mov	w1, 0
 	ldp	x3, x4, [x21, 8]
@@ -9332,26 +9377,26 @@ FlashReadPages:
 	mov	w28, w0
 	ldr	x0, [x29, 136]
 	ldrb	w0, [x0]
-	cbz	w0, .L1330
+	cbz	w0, .L1345
 	cmn	w28, #1
-	bne	.L1330
+	bne	.L1345
 	ldr	x0, [x29, 136]
 	mov	w20, 0
 	strb	wzr, [x0]
-	b	.L1331
-.L1324:
+	b	.L1346
+.L1339:
 	mov	w0, w19
 	bl	flash_exit_slc_mode
-	b	.L1325
-.L1328:
+	b	.L1340
+.L1343:
 	mov	w0, w19
 	bl	FlashReadCmd
-	b	.L1329
-.L1353:
+	b	.L1344
+.L1368:
 	mov	w20, 0
-	b	.L1327
-.L1330:
-	cbz	w20, .L1332
+	b	.L1342
+.L1345:
+	cbz	w20, .L1347
 	adrp	x0, .LANCHOR3
 	ldr	w1, [x29, 172]
 	ldr	w0, [x0, #:lo12:.LANCHOR3]
@@ -9370,27 +9415,27 @@ FlashReadPages:
 	cmn	w0, #1
 	mov	w23, w0
 	csel	w20, w20, wzr, ne
-.L1332:
+.L1347:
 	mov	w0, w19
 	bl	NandcFlashDeCs
 	ldr	x0, [x29, 128]
 	cmn	w28, #1
 	ldrb	w1, [x29, 144]
 	strb	w1, [x0, #:lo12:.LANCHOR5]
-	bne	.L1333
+	bne	.L1348
 	adrp	x0, .LANCHOR30
 	ldrb	w0, [x0, #:lo12:.LANCHOR30]
-	cbnz	w0, .L1334
-.L1338:
+	cbnz	w0, .L1349
+.L1353:
 	adrp	x20, .LANCHOR145
 	ldr	x4, [x20, #:lo12:.LANCHOR145]
-	cbnz	x4, .L1335
+	cbnz	x4, .L1350
 	ldr	w1, [x29, 172]
 	mov	w0, w19
 	ldp	x2, x3, [x21, 8]
 	bl	FlashReadRawPage
-	b	.L1390
-.L1334:
+	b	.L1405
+.L1349:
 	adrp	x0, .LANCHOR19
 	ldr	w1, [x29, 172]
 	ldp	x2, x3, [x21, 8]
@@ -9401,36 +9446,36 @@ FlashReadPages:
 	bl	FlashDdrTunningRead
 	mov	w28, w0
 	cmn	w0, #1
-	beq	.L1337
+	beq	.L1352
 	adrp	x0, .LANCHOR33
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	cmp	w28, w0, lsr 1
-	bls	.L1354
-.L1337:
+	bls	.L1369
+.L1352:
 	lsr	w0, w20, 8
 	bl	NandcSetDdrPara
 	cmn	w28, #1
-	beq	.L1338
-.L1354:
+	beq	.L1353
+.L1369:
 	mov	w20, 0
-.L1333:
+.L1348:
 	adrp	x0, .LANCHOR33
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bls	.L1339
+	bls	.L1354
 	adrp	x0, .LANCHOR145
 	ldr	x0, [x0, #:lo12:.LANCHOR145]
 	cmp	x0, 0
 	mov	w0, 256
 	csel	w28, w28, w0, ne
-.L1339:
+.L1354:
 	cmp	w28, 256
 	ccmn	w28, #1, 4, ne
 	csel	w3, w28, wzr, eq
 	str	w3, [x25, x26]
 	cmn	w3, #1
-	bne	.L1346
+	bne	.L1361
 	adrp	x0, .LANCHOR33
 	ldr	w1, [x21, 4]
 	ldrb	w2, [x0, #:lo12:.LANCHOR33]
@@ -9438,25 +9483,25 @@ FlashReadPages:
 	add	x0, x0, :lo12:.LC25
 	bl	printf
 	ldr	x1, [x21, 16]
-	cbz	x1, .L1346
+	cbz	x1, .L1361
 	mov	w3, 4
 	adrp	x0, .LC27
 	mov	w2, w3
 	add	x0, x0, :lo12:.LC27
 	bl	rknand_print_hex
-.L1346:
-	cbz	w20, .L1348
+.L1361:
+	cbz	w20, .L1363
 	adrp	x0, .LANCHOR33
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w23, w0, lsr 2
-	bls	.L1349
+	bls	.L1364
 	adrp	x0, .LANCHOR145
 	ldr	x0, [x0, #:lo12:.LANCHOR145]
 	cmp	x0, 0
 	mov	w0, 256
 	csel	w23, w23, w0, ne
-.L1349:
+.L1364:
 	add	w0, w22, 1
 	mov	w1, 56
 	cmp	w23, 256
@@ -9464,37 +9509,37 @@ FlashReadPages:
 	umull	x0, w0, w1
 	csel	w1, w23, wzr, eq
 	str	w1, [x25, x0]
-.L1348:
+.L1363:
 	add	w22, w22, w20
-	cbz	w24, .L1320
+	cbz	w24, .L1335
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L1320
+	cbz	w0, .L1335
 	mov	w0, w19
 	bl	flash_exit_slc_mode
-	b	.L1320
-.L1335:
+	b	.L1335
+.L1350:
 	ldr	w1, [x29, 172]
 	mov	w0, w19
 	ldp	x2, x3, [x21, 8]
 	blr	x4
 	mov	w28, w0
 	cmn	w0, #1
-	bne	.L1357
+	bne	.L1372
 	ldr	x0, [x29, 120]
 	ldr	x0, [x0, #:lo12:.LANCHOR18]
 	ldrb	w0, [x0, 19]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 6
-	bhi	.L1340
+	bhi	.L1355
 	add	x0, x27, :lo12:.LANCHOR20
 	mov	w3, 0
 	add	x2, x0, 4
 	ldrb	w1, [x0, 1]
 	mov	w0, w19
 	bl	HynixSetRRPara
-.L1340:
+.L1355:
 	ldp	x2, x3, [x21, 8]
 	mov	w0, w19
 	ldr	w1, [x29, 172]
@@ -9508,27 +9553,27 @@ FlashReadPages:
 	add	x0, x0, :lo12:.LC28
 	bl	printf
 	cmn	w28, #1
-	bne	.L1357
+	bne	.L1372
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L1357
+	cbz	w0, .L1372
 	mov	w0, w19
-	cbz	w24, .L1341
+	cbz	w24, .L1356
 	bl	flash_enter_slc_mode
-.L1342:
+.L1357:
 	ldr	x4, [x20, #:lo12:.LANCHOR145]
 	mov	w0, w19
 	ldr	w1, [x29, 172]
 	ldp	x2, x3, [x21, 8]
 	blr	x4
-.L1390:
+.L1405:
 	mov	w28, w0
-.L1357:
+.L1372:
 	mov	w20, 0
-	b	.L1339
-.L1341:
+	b	.L1354
+.L1356:
 	bl	flash_exit_slc_mode
-	b	.L1342
+	b	.L1357
 	.size	FlashReadPages, .-FlashReadPages
 	.section	.text.FlashProgSlc2KPages,"ax",@progbits
 	.align	2
@@ -9555,12 +9600,12 @@ FlashProgSlc2KPages:
 	mov	x20, x0
 	add	x28, x26, :lo12:.LANCHOR3
 	str	w3, [x29, 108]
-.L1392:
+.L1407:
 	cmp	x20, x23
-	bne	.L1398
+	bne	.L1413
 	ldr	w0, [x29, 108]
-	cbnz	w0, .L1399
-.L1418:
+	cbnz	w0, .L1414
+.L1433:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -9569,7 +9614,7 @@ FlashProgSlc2KPages:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1398:
+.L1413:
 	mov	w1, w24
 	mov	w4, w22
 	add	x3, x29, 116
@@ -9580,15 +9625,15 @@ FlashProgSlc2KPages:
 	ldr	w1, [x29, 116]
 	ldrb	w0, [x0, #:lo12:.LANCHOR25]
 	cmp	w0, w1
-	bhi	.L1393
+	bhi	.L1408
 	mov	w0, -1
 	str	w0, [x20]
-.L1394:
+.L1409:
 	sub	w22, w22, #1
 	add	x20, x20, 56
 	and	w22, w22, 255
-	b	.L1392
-.L1393:
+	b	.L1407
+.L1408:
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w19, [x0, w1, uxtw]
@@ -9641,30 +9686,30 @@ FlashProgSlc2KPages:
 	ldr	w1, [x29, 112]
 	mov	w0, w19
 	bl	FlashReadStatus
-	tbz	x0, 0, .L1397
+	tbz	x0, 0, .L1412
 	mov	w0, -1
 	str	w0, [x20]
-.L1397:
+.L1412:
 	mov	w0, w19
 	bl	NandcFlashDeCs
-	b	.L1394
-.L1405:
+	b	.L1409
+.L1420:
 	ldr	w0, [x27]
 	cmn	w0, #1
-	bne	.L1400
+	bne	.L1415
 	ldr	w1, [x27, 4]
 	adrp	x0, .LC29
 	add	x0, x0, :lo12:.LC29
 	bl	printf
-.L1401:
+.L1416:
 	sub	w21, w21, #1
 	add	x27, x27, 56
 	and	w21, w21, 255
-.L1419:
+.L1434:
 	cmp	x27, x20
-	bne	.L1405
-	b	.L1418
-.L1400:
+	bne	.L1420
+	b	.L1433
+.L1415:
 	adrp	x19, .LANCHOR199
 	mov	w4, w21
 	add	x3, x29, 116
@@ -9687,45 +9732,45 @@ FlashProgSlc2KPages:
 	bl	FlashReadPages
 	ldr	w25, [x29, 120]
 	cmn	w25, #1
-	bne	.L1402
+	bne	.L1417
 	ldr	w1, [x27, 4]
 	adrp	x0, .LC30
 	add	x0, x0, :lo12:.LC30
 	bl	printf
 	str	w25, [x27]
-.L1402:
+.L1417:
 	ldr	x0, [x27, 16]
-	cbz	x0, .L1403
+	cbz	x0, .L1418
 	ldr	w2, [x0]
 	ldr	x0, [x19, #:lo12:.LANCHOR199]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1403
+	beq	.L1418
 	ldr	w1, [x27, 4]
 	adrp	x0, .LC31
 	add	x0, x0, :lo12:.LC31
 	bl	printf
 	mov	w0, -1
 	str	w0, [x27]
-.L1403:
+.L1418:
 	ldr	x0, [x27, 8]
-	cbz	x0, .L1401
+	cbz	x0, .L1416
 	ldr	w2, [x0]
 	ldr	x0, [x23, #:lo12:.LANCHOR198]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1401
+	beq	.L1416
 	ldr	w1, [x27, 4]
 	adrp	x0, .LC32
 	add	x0, x0, :lo12:.LC32
 	bl	printf
 	mov	w0, -1
 	str	w0, [x27]
-	b	.L1401
-.L1399:
+	b	.L1416
+.L1414:
 	adrp	x22, .LANCHOR198
 	mov	x23, x22
-	b	.L1419
+	b	.L1434
 	.size	FlashProgSlc2KPages, .-FlashProgSlc2KPages
 	.section	.text.FlashProgPages,"ax",@progbits
 	.align	2
@@ -9745,7 +9790,7 @@ FlashProgPages:
 	stp	w3, w4, [x29, 100]
 	adrp	x4, .LANCHOR1
 	ldrb	w4, [x4, #:lo12:.LANCHOR1]
-	cbnz	w4, .L1422
+	cbnz	w4, .L1437
 	mov	x19, x0
 	adrp	x0, .LANCHOR31+9
 	adrp	x27, .LANCHOR23
@@ -9755,28 +9800,28 @@ FlashProgPages:
 	add	x28, x27, :lo12:.LANCHOR23
 	mov	w21, 0
 	str	w0, [x29, 108]
-.L1423:
+.L1438:
 	cmp	w21, w24
 	adrp	x26, .LANCHOR25
-	bcc	.L1436
+	bcc	.L1451
 	adrp	x21, .LANCHOR8
 	adrp	x23, .LANCHOR23
 	add	x25, x26, :lo12:.LANCHOR25
 	add	x21, x21, :lo12:.LANCHOR8
 	add	x23, x23, :lo12:.LANCHOR23
 	mov	x20, 0
-.L1437:
+.L1452:
 	ldrb	w0, [x25]
 	cmp	w0, w20
-	bhi	.L1439
+	bhi	.L1454
 	ldr	w0, [x29, 100]
-	cbnz	w0, .L1440
-.L1448:
+	cbnz	w0, .L1455
+.L1463:
 	mov	w0, 0
-	b	.L1421
-.L1422:
+	b	.L1436
+.L1437:
 	bl	FlashProgSlc2KPages
-.L1421:
+.L1436:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9784,7 +9829,7 @@ FlashProgPages:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1436:
+.L1451:
 	mov	w12, 56
 	mov	w1, w22
 	sub	w4, w24, w21
@@ -9798,13 +9843,13 @@ FlashProgPages:
 	ldrb	w1, [x26, #:lo12:.LANCHOR25]
 	ldr	w0, [x29, 116]
 	cmp	w1, w0
-	bhi	.L1425
+	bhi	.L1440
 	mov	w0, -1
 	str	w0, [x19, x12]
-.L1426:
+.L1441:
 	add	w21, w21, 1
-	b	.L1423
-.L1425:
+	b	.L1438
+.L1440:
 	adrp	x1, .LANCHOR27
 	add	x2, x27, :lo12:.LANCHOR23
 	mov	x3, 24
@@ -9814,20 +9859,20 @@ FlashProgPages:
 	csel	w23, w23, wzr, ne
 	madd	x1, x1, x3, x2
 	ldr	x1, [x1, 8]
-	cbz	x1, .L1428
+	cbz	x1, .L1443
 	bl	FlashWaitCmdDone
-.L1428:
+.L1443:
 	ldp	w2, w1, [x29, 112]
 	mov	x0, 24
 	madd	x0, x1, x0, x28
 	str	w2, [x0, 4]
 	stp	x25, xzr, [x0, 8]
-	cbz	w23, .L1429
+	cbz	w23, .L1444
 	add	w2, w21, 1
 	mov	w3, 56
 	umaddl	x2, w2, w3, x19
 	str	x2, [x0, 16]
-.L1429:
+.L1444:
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w20, [x0, x1]
@@ -9837,17 +9882,17 @@ FlashProgPages:
 	cmp	w0, 1
 	mov	w0, w20
 	strb	w20, [x28, x1]
-	bne	.L1430
+	bne	.L1445
 	bl	NandcWaitFlashReady
-.L1431:
+.L1446:
 	ldr	w0, [x29, 104]
 	sub	w0, w0, #1
 	cmp	w0, 6
-	bhi	.L1432
+	bhi	.L1447
 	adrp	x0, .LANCHOR21
 	add	x0, x0, :lo12:.LANCHOR21
 	ldrb	w0, [x0, w20, sxtw]
-	cbz	w0, .L1432
+	cbz	w0, .L1447
 	adrp	x0, .LANCHOR20
 	add	x0, x0, :lo12:.LANCHOR20
 	add	x2, x0, 4
@@ -9855,17 +9900,17 @@ FlashProgPages:
 	ldrb	w1, [x0, 1]
 	mov	w0, w20
 	bl	HynixSetRRPara
-.L1432:
+.L1447:
 	mov	w0, w20
 	bl	NandcFlashCs
 	cmp	w22, 1
-	bne	.L1433
+	bne	.L1448
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L1433
+	cbz	w0, .L1448
 	mov	w0, w20
 	bl	flash_enter_slc_mode
-.L1434:
+.L1449:
 	ldr	w1, [x29, 112]
 	mov	w0, w20
 	bl	FlashProgFirstCmd
@@ -9874,7 +9919,7 @@ FlashProgPages:
 	ldp	x3, x4, [x25, 8]
 	mov	w0, w20
 	bl	NandcXferData
-	cbz	w23, .L1435
+	cbz	w23, .L1450
 	ldr	w1, [x29, 112]
 	mov	w0, w20
 	bl	FlashProgDpFirstCmd
@@ -9902,15 +9947,15 @@ FlashProgPages:
 	ldp	x3, x4, [x0, 8]
 	mov	w0, w20
 	bl	NandcXferData
-.L1435:
+.L1450:
 	ldr	w1, [x29, 112]
 	mov	w0, w20
 	add	w21, w21, w23
 	bl	FlashProgSecondCmd
 	mov	w0, w20
 	bl	NandcFlashDeCs
-	b	.L1426
-.L1430:
+	b	.L1441
+.L1445:
 	bl	NandcFlashCs
 	ldr	w1, [x29, 116]
 	adrp	x0, .LANCHOR17
@@ -9923,47 +9968,47 @@ FlashProgPages:
 	bl	FlashWaitReadyEN
 	mov	w0, w20
 	bl	NandcFlashDeCs
-	b	.L1431
-.L1433:
+	b	.L1446
+.L1448:
 	mov	w0, w20
 	bl	flash_exit_slc_mode
-	b	.L1434
-.L1439:
+	b	.L1449
+.L1454:
 	mov	w0, w20
 	bl	FlashWaitCmdDone
 	cmp	w22, 1
-	bne	.L1438
+	bne	.L1453
 	ldrb	w0, [x21]
-	cbz	w0, .L1438
+	cbz	w0, .L1453
 	mov	x0, 24
 	mul	x0, x20, x0
 	ldrb	w0, [x0, x23]
 	bl	flash_exit_slc_mode
-.L1438:
+.L1453:
 	add	x20, x20, 1
-	b	.L1437
-.L1440:
+	b	.L1452
+.L1455:
 	mov	w0, 56
 	and	w20, w24, 255
 	adrp	x23, .LANCHOR198
 	mov	x25, x23
 	umaddl	x24, w24, w0, x19
-.L1441:
+.L1456:
 	cmp	x24, x19
-	beq	.L1448
+	beq	.L1463
 	ldr	w0, [x19]
 	cmn	w0, #1
-	bne	.L1442
+	bne	.L1457
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC29
 	add	x0, x0, :lo12:.LC29
 	bl	printf
-.L1443:
+.L1458:
 	sub	w20, w20, #1
 	add	x19, x19, 56
 	and	w20, w20, 255
-	b	.L1441
-.L1442:
+	b	.L1456
+.L1457:
 	adrp	x21, .LANCHOR199
 	mov	w4, w20
 	add	x3, x29, 116
@@ -9986,41 +10031,41 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	w26, [x29, 120]
 	cmn	w26, #1
-	bne	.L1444
+	bne	.L1459
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC30
 	add	x0, x0, :lo12:.LC30
 	bl	printf
 	str	w26, [x19]
-.L1444:
+.L1459:
 	ldr	x0, [x19, 16]
-	cbz	x0, .L1445
+	cbz	x0, .L1460
 	ldr	w2, [x0]
 	ldr	x0, [x21, #:lo12:.LANCHOR199]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1445
+	beq	.L1460
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC31
 	add	x0, x0, :lo12:.LC31
 	bl	printf
 	mov	w0, -1
 	str	w0, [x19]
-.L1445:
+.L1460:
 	ldr	x0, [x19, 8]
-	cbz	x0, .L1443
+	cbz	x0, .L1458
 	ldr	w2, [x0]
 	ldr	x0, [x25, #:lo12:.LANCHOR198]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1443
+	beq	.L1458
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC32
 	add	x0, x0, :lo12:.LC32
 	bl	printf
 	mov	w0, -1
 	str	w0, [x19]
-	b	.L1443
+	b	.L1458
 	.size	FlashProgPages, .-FlashProgPages
 	.section	.text.FlashTestBlk,"ax",@progbits
 	.align	2
@@ -10034,7 +10079,7 @@ FlashTestBlk:
 	adrp	x0, .LANCHOR149
 	ldr	w0, [x0, #:lo12:.LANCHOR149]
 	cmp	w19, w0
-	bcc	.L1476
+	bcc	.L1491
 	adrp	x20, .LANCHOR153
 	mov	w2, 32
 	mov	w1, 165
@@ -10065,14 +10110,14 @@ FlashTestBlk:
 	add	x0, x29, 40
 	csetm	w19, ne
 	bl	FlashEraseBlocks
-.L1474:
+.L1489:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 160
 	ret
-.L1476:
+.L1491:
 	mov	w19, 0
-	b	.L1474
+	b	.L1489
 	.size	FlashTestBlk, .-FlashTestBlk
 	.section	.text.FtlLowFormatEraseBlock,"ax",@progbits
 	.align	2
@@ -10089,7 +10134,7 @@ FtlLowFormatEraseBlock:
 	ldr	w0, [x0, #:lo12:.LANCHOR77]
 	stp	x23, x24, [sp, 48]
 	stp	x27, x28, [sp, 80]
-	cbnz	w0, .L1501
+	cbnz	w0, .L1516
 	adrp	x23, .LANCHOR27
 	and	w25, w1, 255
 	adrp	x20, .LANCHOR8
@@ -10115,10 +10160,10 @@ FtlLowFormatEraseBlock:
 	mov	w19, 0
 	str	x1, [x29, 128]
 	str	x0, [x29, 120]
-.L1480:
+.L1495:
 	cmp	w11, w5, uxth
-	bhi	.L1484
-	cbz	w24, .L1478
+	bhi	.L1499
+	cbz	w24, .L1493
 	cmp	w10, 0
 	mov	w2, w24
 	cset	w22, ne
@@ -10131,31 +10176,31 @@ FtlLowFormatEraseBlock:
 	strb	w0, [x23, #:lo12:.LANCHOR27]
 	mov	w0, 56
 	umull	x24, w24, w0
-.L1487:
+.L1502:
 	ldr	x0, [x21, #:lo12:.LANCHOR78]
 	add	x1, x0, x27
 	ldr	w0, [x0, x27]
 	cmn	w0, #1
-	bne	.L1486
+	bne	.L1501
 	ldr	w0, [x1, 4]
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.L1486:
+.L1501:
 	add	x27, x27, 56
 	cmp	x27, x24
-	bne	.L1487
-	cbnz	w25, .L1488
+	bne	.L1502
+	cbnz	w25, .L1503
 	and	w22, w22, 65535
 	mov	w28, 6
 	mov	w27, 1
-.L1489:
+.L1504:
 	adrp	x0, .LANCHOR47
 	mov	w24, 0
 	add	x0, x0, :lo12:.LANCHOR47
 	str	x0, [x29, 112]
-.L1497:
+.L1512:
 	ldr	x0, [x29, 128]
 	mov	x5, 0
 	ldr	x6, [x21, #:lo12:.LANCHOR78]
@@ -10168,10 +10213,10 @@ FtlLowFormatEraseBlock:
 	ldr	x10, [x0, #:lo12:.LANCHOR187]
 	ldr	x0, [x29, 120]
 	ldrh	w11, [x0, #:lo12:.LANCHOR59]
-.L1490:
+.L1505:
 	cmp	w7, w5, uxth
-	bhi	.L1493
-	cbz	w20, .L1478
+	bhi	.L1508
+	cbz	w20, .L1493
 	mov	w2, w22
 	mov	w1, w20
 	strb	wzr, [x23, #:lo12:.LANCHOR27]
@@ -10183,11 +10228,11 @@ FtlLowFormatEraseBlock:
 	strb	w0, [x23, #:lo12:.LANCHOR27]
 	mov	x2, 0
 	umull	x1, w20, w1
-.L1496:
+.L1511:
 	ldr	x0, [x21, #:lo12:.LANCHOR78]
 	add	x3, x0, x2
 	ldr	w0, [x0, x2]
-	cbz	w0, .L1495
+	cbz	w0, .L1510
 	ldr	w0, [x3, 4]
 	add	w19, w19, 1
 	stp	x2, x1, [x29, 96]
@@ -10195,39 +10240,39 @@ FtlLowFormatEraseBlock:
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
 	ldp	x2, x1, [x29, 96]
-.L1495:
+.L1510:
 	add	x2, x2, 56
 	cmp	x1, x2
-	bne	.L1496
+	bne	.L1511
 	add	w24, w24, w28
 	and	w24, w24, 65535
 	cmp	w27, w24
-	bhi	.L1497
+	bhi	.L1512
 	mov	x23, 0
-.L1499:
-	cbz	w25, .L1498
+.L1514:
+	cbz	w25, .L1513
 	ldr	x0, [x21, #:lo12:.LANCHOR78]
 	add	x1, x0, x23
 	ldr	w0, [x0, x23]
-	cbnz	w0, .L1498
+	cbnz	w0, .L1513
 	ldr	w0, [x1, 4]
 	mov	w1, 1
 	str	x2, [x29, 136]
 	lsr	w0, w0, 10
 	bl	FtlFreeSysBlkQueueIn
 	ldr	x2, [x29, 136]
-.L1498:
+.L1513:
 	add	x23, x23, 56
 	cmp	x23, x2
-	bne	.L1499
+	bne	.L1514
 	cmp	w26, 63
 	ccmp	w25, 0, 0, hi
-	beq	.L1478
+	beq	.L1493
 	ldr	x0, [x21, #:lo12:.LANCHOR78]
 	mov	w2, w20
 	mov	w1, w22
 	bl	FlashEraseBlocks
-.L1478:
+.L1493:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10236,7 +10281,7 @@ FtlLowFormatEraseBlock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1484:
+.L1499:
 	mul	x0, x5, x8
 	mov	w1, w26
 	str	wzr, [x6, x0]
@@ -10244,13 +10289,13 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	and	w15, w0, 65535
 	mov	w22, w15
-	cbz	w25, .L1481
+	cbz	w25, .L1496
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L1482
-.L1481:
+	cbnz	w0, .L1497
+.L1496:
 	mov	w0, w22
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L1483
+	cbnz	w0, .L1498
 	umaddl	x1, w24, w14, x6
 	lsl	w15, w15, 10
 	mul	w0, w24, w13
@@ -10260,26 +10305,26 @@ FtlLowFormatEraseBlock:
 	str	w15, [x1, 4]
 	add	x0, x12, x0, sxtw 2
 	stp	xzr, x0, [x1, 8]
-.L1482:
+.L1497:
 	add	x5, x5, 1
-	b	.L1480
-.L1483:
+	b	.L1495
+.L1498:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1482
-.L1488:
+	b	.L1497
+.L1503:
 	adrp	x0, .LANCHOR54
 	ldrh	w27, [x0, #:lo12:.LANCHOR54]
 	ldrb	w0, [x20, #:lo12:.LANCHOR8]
-	cbnz	w0, .L1502
+	cbnz	w0, .L1517
 	lsr	w28, w27, 2
 	mov	w22, 1
-	b	.L1489
-.L1502:
+	b	.L1504
+.L1517:
 	mov	w22, 1
 	mov	w28, w22
-	b	.L1489
-.L1493:
+	b	.L1504
+.L1508:
 	mov	x0, 56
 	mov	w1, w26
 	mul	x0, x5, x0
@@ -10289,13 +10334,13 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	and	w13, w0, 65535
 	mov	w14, w13
-	cbz	w25, .L1491
+	cbz	w25, .L1506
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L1492
-.L1491:
+	cbnz	w0, .L1507
+.L1506:
 	mov	w0, w14
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L1492
+	cbnz	w0, .L1507
 	umaddl	x1, w20, w12, x6
 	add	w13, w24, w13, lsl 10
 	mul	w0, w20, w11
@@ -10305,12 +10350,12 @@ FtlLowFormatEraseBlock:
 	str	w13, [x1, 4]
 	add	x0, x10, x0, sxtw 2
 	stp	x8, x0, [x1, 8]
-.L1492:
+.L1507:
 	add	x5, x5, 1
-	b	.L1490
-.L1501:
+	b	.L1505
+.L1516:
 	mov	w19, 0
-	b	.L1478
+	b	.L1493
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
 	.section	.text.FtlBbmTblFlush,"ax",@progbits
 	.align	2
@@ -10326,16 +10371,16 @@ FtlBbmTblFlush:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w0, .L1525
+	cbnz	w0, .L1540
 	adrp	x24, .LANCHOR188
 	adrp	x23, .LANCHOR183
-	adrp	x19, .LANCHOR202
-	add	x20, x19, :lo12:.LANCHOR202
+	adrp	x20, .LANCHOR202
+	add	x19, x20, :lo12:.LANCHOR202
 	ldr	x1, [x24, #:lo12:.LANCHOR188]
 	adrp	x21, .LANCHOR75
 	ldr	x0, [x23, #:lo12:.LANCHOR183]
 	add	x26, x21, :lo12:.LANCHOR75
-	stp	x0, x1, [x20, 8]
+	stp	x0, x1, [x19, 8]
 	adrp	x1, .LANCHOR58
 	adrp	x27, .LANCHOR45
 	adrp	x28, .LANCHOR123
@@ -10346,17 +10391,17 @@ FtlBbmTblFlush:
 	add	x28, x28, :lo12:.LANCHOR123
 	mov	w1, 0
 	bl	ftl_memset
-.L1526:
+.L1541:
 	ldrh	w0, [x27]
 	cmp	w25, w0
-	blt	.L1527
-	add	x19, x19, :lo12:.LANCHOR202
-	add	x20, x21, :lo12:.LANCHOR75
+	blt	.L1542
+	add	x20, x20, :lo12:.LANCHOR202
+	add	x19, x21, :lo12:.LANCHOR75
 	mov	w2, 16
 	mov	w1, 255
 	adrp	x25, .LC33
 	adrp	x27, .LANCHOR54
-	ldr	x28, [x19, 16]
+	ldr	x28, [x20, 16]
 	add	x25, x25, :lo12:.LC33
 	add	x27, x27, :lo12:.LANCHOR54
 	mov	w26, 0
@@ -10364,88 +10409,83 @@ FtlBbmTblFlush:
 	bl	ftl_memset
 	mov	w0, -3887
 	strh	w0, [x28]
-	ldr	w0, [x20, 8]
+	ldr	w0, [x19, 8]
 	str	w0, [x28, 4]
 	ldrh	w0, [x21, #:lo12:.LANCHOR75]
 	mov	w21, 0
 	strh	w0, [x28, 2]
-	ldrh	w0, [x20, 4]
+	ldrh	w0, [x19, 4]
 	strh	w0, [x28, 8]
-	ldrh	w0, [x20, 6]
+	ldrh	w0, [x19, 6]
 	strh	w0, [x28, 10]
 	adrp	x0, .LANCHOR37
 	ldr	w0, [x0, #:lo12:.LANCHOR37]
 	strh	w0, [x28, 12]
-.L1528:
+.L1543:
+	ldrh	w1, [x19]
 	ldrh	w4, [x28, 10]
-	ldrh	w1, [x20]
-	ldrh	w2, [x20, 2]
-	ldrh	w3, [x20, 4]
+	ldrh	w2, [x19, 2]
+	ldrh	w3, [x19, 4]
 	ldr	x0, [x23, #:lo12:.LANCHOR183]
-	str	x0, [x19, 8]
+	str	x0, [x20, 8]
 	ldr	x0, [x24, #:lo12:.LANCHOR188]
-	str	x0, [x19, 16]
+	str	x0, [x20, 16]
 	orr	w0, w2, w1, lsl 10
-	str	wzr, [x19]
-	str	w0, [x19, 4]
+	str	wzr, [x20]
+	str	w0, [x20, 4]
 	mov	x0, x25
 	bl	printf
-	mov	w3, 1
-	mov	x0, x19
-	mov	w1, w3
-	mov	w2, w3
-	bl	FlashProgPages
 	ldrh	w0, [x27]
-	ldrh	w1, [x20, 2]
+	ldrh	w1, [x19, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L1529
-	ldr	w0, [x20, 8]
+	blt	.L1544
+	ldr	w0, [x19, 8]
 	mov	w2, 1
-	ldrh	w1, [x20, 4]
+	ldrh	w1, [x19, 4]
 	add	w0, w0, 1
-	str	w0, [x20, 8]
+	str	w0, [x19, 8]
 	str	w0, [x28, 4]
-	ldrh	w0, [x20]
+	ldrh	w0, [x19]
 	strh	w0, [x28, 8]
-	strh	w0, [x20, 4]
+	strh	w0, [x19, 4]
 	adrp	x0, .LANCHOR78
-	strh	w1, [x20]
+	strh	w1, [x19]
 	lsl	w1, w1, 10
 	ldr	x0, [x0, #:lo12:.LANCHOR78]
-	str	w1, [x19, 4]
-	strh	wzr, [x20, 2]
+	str	w1, [x20, 4]
+	strh	wzr, [x19, 2]
 	str	w1, [x0, 4]
 	mov	w1, w2
 	bl	FlashEraseBlocks
+.L1544:
 	mov	w3, 1
-	mov	x0, x19
+	mov	x0, x20
 	mov	w2, w3
 	mov	w1, w3
 	bl	FlashProgPages
-.L1529:
-	ldrh	w0, [x20, 2]
+	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
-	strh	w0, [x20, 2]
-	ldr	w0, [x19]
+	strh	w0, [x19, 2]
+	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L1530
-	ldr	w1, [x19, 4]
+	bne	.L1545
+	ldr	w1, [x20, 4]
 	add	w21, w21, 1
 	adrp	x0, .LC34
 	and	w21, w21, 65535
 	add	x0, x0, :lo12:.LC34
 	bl	printf
 	cmp	w21, 3
-	bls	.L1528
-	ldr	w1, [x19, 4]
+	bls	.L1543
+	ldr	w1, [x20, 4]
 	mov	w2, w21
 	adrp	x0, .LC35
 	add	x0, x0, :lo12:.LC35
 	bl	printf
 	mov	w0, 1
 	str	w0, [x22, #:lo12:.LANCHOR77]
-.L1525:
+.L1540:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10454,20 +10494,20 @@ FtlBbmTblFlush:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1527:
+.L1542:
 	ldrh	w2, [x28]
 	ldr	x1, [x26], 8
-	ldr	x0, [x20, 8]
+	ldr	x0, [x19, 8]
 	mul	w3, w2, w25
 	lsl	w2, w2, 2
 	add	w25, w25, 1
 	add	x0, x0, x3, sxtw 2
 	bl	ftl_memcpy
-	b	.L1526
-.L1530:
-	cbnz	w26, .L1525
+	b	.L1541
+.L1545:
+	cbnz	w26, .L1540
 	mov	w26, 1
-	b	.L1528
+	b	.L1543
 	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
 	.section	.text.allocate_data_superblock,"ax",@progbits
 	.align	2
@@ -10476,7 +10516,7 @@ FtlBbmTblFlush:
 allocate_data_superblock:
 	adrp	x1, .LANCHOR77
 	ldr	w1, [x1, #:lo12:.LANCHOR77]
-	cbnz	w1, .L1598
+	cbnz	w1, .L1614
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
@@ -10490,17 +10530,17 @@ allocate_data_superblock:
 	add	x23, x0, :lo12:.LANCHOR89
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
-.L1589:
+.L1605:
 	ldr	x1, [x29, 120]
 	adrp	x0, .LANCHOR89
-	adrp	x25, .LANCHOR40
+	adrp	x24, .LANCHOR40
 	ldrh	w0, [x0, #:lo12:.LANCHOR89]
 	ldrh	w1, [x1]
 	add	w0, w0, w1
-	ldrh	w1, [x25, #:lo12:.LANCHOR40]
+	ldrh	w1, [x24, #:lo12:.LANCHOR40]
 	cmp	w0, w1
-	ble	.L1538
-	mov	w2, 3168
+	ble	.L1553
+	mov	w2, 3108
 	adrp	x1, .LANCHOR203
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR203
@@ -10511,11 +10551,11 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1538:
+.L1553:
 	adrp	x0, .LANCHOR94
 	add	x0, x0, :lo12:.LANCHOR94
 	cmp	x19, x0
-	bne	.L1539
+	bne	.L1554
 	adrp	x1, .LANCHOR172
 	ldrh	w2, [x23]
 	ldr	w3, [x1, #:lo12:.LANCHOR172]
@@ -10526,54 +10566,54 @@ allocate_data_superblock:
 	adrp	x4, .LANCHOR28
 	and	w1, w1, 65535
 	ldr	w4, [x4, #:lo12:.LANCHOR28]
-	cbz	w4, .L1540
+	cbz	w4, .L1555
 	adrp	x4, .LANCHOR170
 	ldr	w4, [x4, #:lo12:.LANCHOR170]
 	cmp	w4, 39
-	bhi	.L1540
+	bhi	.L1555
 	cmp	w4, 2
-	bls	.L1573
-	tbz	x2, 0, .L1569
-	cbz	w3, .L1573
-.L1569:
+	bls	.L1589
+	tbz	x2, 0, .L1585
+	cbz	w3, .L1589
+.L1585:
 	mov	w1, w0
-	b	.L1540
-.L1539:
+	b	.L1555
+.L1554:
 	ldrb	w0, [x19, 8]
 	cmp	w0, 1
-	bne	.L1573
+	bne	.L1589
 	adrp	x0, .LANCHOR44
 	ldrh	w0, [x0, #:lo12:.LANCHOR44]
 	cmp	w0, 1
-	beq	.L1573
+	beq	.L1589
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbnz	w0, .L1573
+	cbnz	w0, .L1589
 	adrp	x2, .LANCHOR28
 	ldrh	w0, [x23]
 	ldr	w2, [x2, #:lo12:.LANCHOR28]
 	lsr	w1, w0, 3
-	cbz	w2, .L1540
+	cbz	w2, .L1555
 	adrp	x2, .LANCHOR170
 	ldr	w2, [x2, #:lo12:.LANCHOR170]
 	cmp	w2, 1
-	bhi	.L1540
+	bhi	.L1555
 	mov	w1, 7
 	mul	w1, w0, w1
 	lsr	w1, w1, 3
-.L1540:
-	cbz	w1, .L1541
+.L1555:
+	cbz	w1, .L1556
 	sub	w1, w1, #1
 	and	w1, w1, 65535
-.L1541:
+.L1556:
 	ldrb	w2, [x19, 8]
 	adrp	x0, .LANCHOR88
 	add	x0, x0, :lo12:.LANCHOR88
 	bl	List_pop_index_node
-	and	w21, w0, 65535
+	and	w22, w0, 65535
 	ldrh	w0, [x23]
-	cbnz	w0, .L1542
-	mov	w2, 3188
+	cbnz	w0, .L1557
+	mov	w2, 3128
 	adrp	x1, .LANCHOR203
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR203
@@ -10584,27 +10624,33 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1542:
+.L1557:
 	ldrh	w0, [x23]
 	sub	w0, w0, #1
 	strh	w0, [x23]
-	strh	w21, [x19]
+	ldrh	w0, [x24, #:lo12:.LANCHOR40]
+	cmp	w0, w22
+	bls	.L1605
+	adrp	x25, .LANCHOR84
+	ubfiz	x21, x22, 1, 16
+	ldr	x0, [x25, #:lo12:.LANCHOR84]
+	ldrh	w20, [x0, x21]
+	cbnz	w20, .L1605
+	strh	w22, [x19]
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L1543
-	adrp	x0, .LANCHOR84
-	ubfiz	x21, x21, 1, 16
+	cbnz	w0, .L1559
+	ldr	x0, [x25, #:lo12:.LANCHOR84]
 	mov	w1, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR84]
 	strh	w1, [x0, x21]
 	ldrh	w1, [x27, #:lo12:.LANCHOR86]
 	ldrh	w0, [x23]
 	add	w0, w0, w1
-	ldrh	w1, [x25, #:lo12:.LANCHOR40]
+	ldrh	w1, [x24, #:lo12:.LANCHOR40]
 	cmp	w0, w1
-	ble	.L1589
-	mov	w2, 3200
+	ble	.L1605
+	mov	w2, 3144
 	adrp	x1, .LANCHOR203
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR203
@@ -10615,18 +10661,18 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-	b	.L1589
-.L1573:
+	b	.L1605
+.L1589:
 	mov	w1, 0
-	b	.L1541
-.L1543:
+	b	.L1556
+.L1559:
 	ldrh	w1, [x27, #:lo12:.LANCHOR86]
 	ldrh	w0, [x23]
 	add	w0, w0, w1
-	ldrh	w1, [x25, #:lo12:.LANCHOR40]
+	ldrh	w1, [x24, #:lo12:.LANCHOR40]
 	cmp	w0, w1
-	ble	.L1545
-	mov	w2, 3203
+	ble	.L1561
+	mov	w2, 3147
 	adrp	x1, .LANCHOR203
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR203
@@ -10637,25 +10683,24 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1545:
+.L1561:
 	adrp	x1, .LANCHOR38
-	adrp	x24, .LANCHOR78
+	adrp	x25, .LANCHOR78
 	mov	w2, 56
 	mov	x3, 8
 	ldrh	w1, [x1, #:lo12:.LANCHOR38]
 	add	x26, x19, 16
-	ldr	x4, [x24, #:lo12:.LANCHOR78]
+	ldr	x4, [x25, #:lo12:.LANCHOR78]
 	mov	x5, x26
-	mov	w20, 0
 	mov	w6, 65535
 	add	x0, x4, 8
 	umaddl	x1, w2, w1, x3
 	add	x1, x4, x1
-.L1546:
+.L1562:
 	cmp	x1, x0
-	bne	.L1548
-	cbnz	w20, .L1549
-	mov	w2, 3215
+	bne	.L1564
+	cbnz	w20, .L1565
+	mov	w2, 3159
 	adrp	x1, .LANCHOR203
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR203
@@ -10666,27 +10711,26 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1549:
+.L1565:
 	adrp	x0, .LANCHOR28
-	uxtw	x22, w21
 	adrp	x28, .LANCHOR79
 	ldr	w0, [x0, #:lo12:.LANCHOR28]
-	cbz	w0, .L1550
+	cbz	w0, .L1566
 	adrp	x0, .LANCHOR92
 	add	x0, x0, :lo12:.LANCHOR92
 	cmp	x19, x0
-	bne	.L1550
+	bne	.L1566
 	ldr	x0, [x28, #:lo12:.LANCHOR79]
-	ldrh	w0, [x0, x22, lsl 1]
+	ldrh	w0, [x0, x21]
 	cmp	w0, 40
-	bls	.L1550
+	bls	.L1566
 	strb	wzr, [x19, 8]
-.L1550:
+.L1566:
 	adrp	x0, .LANCHOR204
 	ldrh	w0, [x0, #:lo12:.LANCHOR204]
-	cmp	w0, w21
-	bne	.L1551
-	mov	w2, 3222
+	cmp	w0, w22
+	bne	.L1567
+	mov	w2, 3166
 	adrp	x1, .LANCHOR203
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR203
@@ -10697,42 +10741,40 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1551:
+.L1567:
 	ldrb	w0, [x19, 8]
 	adrp	x6, .LANCHOR48
 	adrp	x5, .LANCHOR167
 	adrp	x4, .LANCHOR168
-	cbnz	w0, .L1552
-	ldr	x2, [x28, #:lo12:.LANCHOR79]
-	lsl	x1, x22, 1
-	ldrh	w0, [x2, x1]
-	cbz	w0, .L1553
-	ldrh	w7, [x6, #:lo12:.LANCHOR48]
-	add	w0, w0, w7
-.L1601:
-	strh	w0, [x2, x1]
+	ldr	x1, [x28, #:lo12:.LANCHOR79]
+	cbnz	w0, .L1568
+	ldrh	w0, [x1, x21]
+	cbz	w0, .L1569
+	ldrh	w2, [x6, #:lo12:.LANCHOR48]
+	add	w0, w0, w2
+.L1617:
+	strh	w0, [x1, x21]
 	mov	w1, 0
 	ldr	w0, [x5, #:lo12:.LANCHOR167]
 	add	w0, w0, 1
 	str	w0, [x5, #:lo12:.LANCHOR167]
-	mov	w0, w21
+	mov	w0, w22
 	bl	ftl_set_blk_mode
-.L1555:
+.L1571:
 	ldr	x0, [x28, #:lo12:.LANCHOR79]
-	lsl	x22, x22, 1
-	ldrh	w1, [x0, x22]
+	ldrh	w1, [x0, x21]
 	adrp	x0, .LANCHOR169
 	ldr	w2, [x0, #:lo12:.LANCHOR169]
 	cmp	w1, w2
-	bls	.L1556
+	bls	.L1572
 	str	w1, [x0, #:lo12:.LANCHOR169]
-.L1556:
+.L1572:
 	ldr	w2, [x5, #:lo12:.LANCHOR167]
 	mov	x3, 4
 	ldr	w1, [x4, #:lo12:.LANCHOR168]
 	ldrh	w0, [x6, #:lo12:.LANCHOR48]
 	madd	w0, w0, w2, w1
-	ldrh	w1, [x25, #:lo12:.LANCHOR40]
+	ldrh	w1, [x24, #:lo12:.LANCHOR40]
 	udiv	w0, w0, w1
 	adrp	x1, .LANCHOR205
 	str	w0, [x1, #:lo12:.LANCHOR205]
@@ -10742,91 +10784,89 @@ allocate_data_superblock:
 	add	w0, w0, 1
 	str	w0, [x1, 16]
 	mov	w1, 56
-	ldr	x0, [x24, #:lo12:.LANCHOR78]
+	ldr	x0, [x25, #:lo12:.LANCHOR78]
 	nop // between mem op and mult-accumulate
 	umaddl	x1, w1, w20, x3
 	add	x2, x0, 4
 	add	x1, x0, x1
-.L1557:
+.L1573:
 	cmp	x1, x2
-	bne	.L1558
+	bne	.L1574
 	adrp	x1, .LANCHOR8
 	ldrb	w1, [x1, #:lo12:.LANCHOR8]
-	cbz	w1, .L1559
+	cbz	w1, .L1575
 	ldrb	w1, [x19, 8]
 	mov	w2, w20
 	cmp	w1, 1
-	bne	.L1560
+	bne	.L1576
 	mov	w1, 0
-.L1602:
+.L1618:
 	bl	FlashEraseBlocks
-.L1559:
+.L1575:
 	ldrb	w1, [x19, 8]
 	mov	w2, w20
-	ldr	x0, [x24, #:lo12:.LANCHOR78]
-	mov	x25, 0
+	ldr	x0, [x25, #:lo12:.LANCHOR78]
+	mov	x24, 0
 	bl	FlashEraseBlocks
 	mov	w1, 0
 	mov	x3, 56
-.L1561:
-	cmp	w20, w25, uxth
-	bhi	.L1563
-	cbz	w1, .L1564
-	mov	w0, w21
+.L1577:
+	cmp	w20, w24, uxth
+	bhi	.L1579
+	cbz	w1, .L1580
+	mov	w0, w22
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L1564:
+.L1580:
 	ldrb	w0, [x19, 7]
-	adrp	x2, .LANCHOR84
-	cbnz	w0, .L1565
-	ldr	x0, [x2, #:lo12:.LANCHOR84]
+	cbnz	w0, .L1581
+	adrp	x0, .LANCHOR84
 	mov	w1, -1
-	strh	w1, [x0, x22]
-	b	.L1589
-.L1548:
+	ldr	x0, [x0, #:lo12:.LANCHOR84]
+	strh	w1, [x0, x21]
+	b	.L1605
+.L1564:
 	ldrh	w3, [x5]
 	stp	xzr, xzr, [x0]
 	cmp	w3, w6
-	beq	.L1547
+	beq	.L1563
 	umaddl	x7, w20, w2, x4
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	lsl	w3, w3, 10
 	str	w3, [x7, 4]
-.L1547:
+.L1563:
 	add	x0, x0, 56
 	add	x5, x5, 2
-	b	.L1546
-.L1553:
+	b	.L1562
+.L1569:
 	mov	w0, 2
-	b	.L1601
-.L1552:
-	ldr	x2, [x28, #:lo12:.LANCHOR79]
-	lsl	x0, x22, 1
-	ldrh	w1, [x2, x0]
-	add	w1, w1, 1
-	strh	w1, [x2, x0]
+	b	.L1617
+.L1568:
+	ldrh	w0, [x1, x21]
+	add	w0, w0, 1
+	strh	w0, [x1, x21]
 	ldr	w0, [x4, #:lo12:.LANCHOR168]
 	add	w0, w0, 1
 	str	w0, [x4, #:lo12:.LANCHOR168]
-	mov	w0, w21
+	mov	w0, w22
 	bl	ftl_set_blk_mode.part.10
-	b	.L1555
-.L1558:
+	b	.L1571
+.L1574:
 	ldr	w3, [x2]
 	and	w3, w3, -1024
 	str	w3, [x2], 56
-	b	.L1557
-.L1560:
+	b	.L1573
+.L1576:
 	mov	w1, 1
-	b	.L1602
-.L1563:
-	mul	x0, x25, x3
-	ldr	x2, [x24, #:lo12:.LANCHOR78]
+	b	.L1618
+.L1579:
+	mul	x0, x24, x3
+	ldr	x2, [x25, #:lo12:.LANCHOR78]
 	add	x4, x2, x0
 	ldr	w2, [x2, x0]
 	cmn	w2, #1
-	bne	.L1562
+	bne	.L1578
 	add	w1, w1, 1
 	ldr	w0, [x4, 4]
 	str	x3, [x29, 104]
@@ -10839,32 +10879,33 @@ allocate_data_superblock:
 	ldrb	w0, [x19, 7]
 	sub	w0, w0, #1
 	strb	w0, [x19, 7]
-.L1562:
-	add	x25, x25, 1
+.L1578:
+	add	x24, x24, 1
 	add	x26, x26, 2
-	b	.L1561
-.L1565:
+	b	.L1577
+.L1581:
 	adrp	x1, .LANCHOR53
-	adrp	x3, .LANCHOR159
-	strb	wzr, [x19, 6]
-	ldrh	w1, [x1, #:lo12:.LANCHOR53]
+	adrp	x2, .LANCHOR159
 	strh	wzr, [x19, 2]
-	strh	w21, [x19]
+	ldrh	w1, [x1, #:lo12:.LANCHOR53]
+	strh	w22, [x19]
+	strb	wzr, [x19, 6]
 	mul	w0, w0, w1
-	ldr	w1, [x3, #:lo12:.LANCHOR159]
+	ldr	w1, [x2, #:lo12:.LANCHOR159]
 	str	w1, [x19, 12]
 	add	w1, w1, 1
-	str	w1, [x3, #:lo12:.LANCHOR159]
-	ldr	x1, [x2, #:lo12:.LANCHOR84]
+	str	w1, [x2, #:lo12:.LANCHOR159]
+	adrp	x1, .LANCHOR84
 	and	w0, w0, 65535
 	strh	w0, [x19, 4]
-	strh	w0, [x1, x22]
+	ldr	x1, [x1, #:lo12:.LANCHOR84]
+	strh	w0, [x1, x21]
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1566
+	cbz	w0, .L1582
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L1537
-.L1566:
-	mov	w2, 3281
+	cbnz	w0, .L1552
+.L1582:
+	mov	w2, 3225
 	adrp	x1, .LANCHOR203
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR203
@@ -10875,7 +10916,7 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1537:
+.L1552:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -10884,7 +10925,7 @@ allocate_data_superblock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1598:
+.L1614:
 	mov	w0, 0
 	ret
 	.size	allocate_data_superblock, .-allocate_data_superblock
@@ -10903,17 +10944,17 @@ FtlGcFreeBadSuperBlk:
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	str	x27, [sp, 80]
-	cbz	w0, .L1604
+	cbz	w0, .L1620
 	adrp	x23, .LANCHOR118
 	add	x24, x23, :lo12:.LANCHOR118
 	mov	w19, 0
-.L1605:
+.L1621:
 	adrp	x0, .LANCHOR38
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w0, w19
-	bhi	.L1611
+	bhi	.L1627
 	bl	FtlGcReFreshBadBlk
-.L1604:
+.L1620:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -10922,7 +10963,7 @@ FtlGcFreeBadSuperBlk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1611:
+.L1627:
 	adrp	x0, .LANCHOR47
 	add	x0, x0, :lo12:.LANCHOR47
 	mov	w1, w25
@@ -10931,19 +10972,19 @@ FtlGcFreeBadSuperBlk:
 	ldrb	w0, [x0, w19, sxtw]
 	bl	V2P_block
 	and	w26, w0, 65535
-.L1606:
+.L1622:
 	ldrh	w0, [x22]
 	cmp	w0, w20
-	bhi	.L1610
+	bhi	.L1626
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1605
-.L1610:
+	b	.L1621
+.L1626:
 	add	x0, x23, :lo12:.LANCHOR118
 	add	w27, w20, 1
 	ldrh	w0, [x0, w20, sxtw 1]
 	cmp	w0, w26
-	bne	.L1607
+	bne	.L1623
 	mov	w0, w26
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
@@ -10951,22 +10992,22 @@ FtlGcFreeBadSuperBlk:
 	sxtw	x3, w27
 	and	x4, x20, 65535
 	mov	x0, 0
-.L1608:
+.L1624:
 	add	w2, w20, w0
 	cmp	w1, w2, uxth
-	bhi	.L1609
+	bhi	.L1625
 	sub	w1, w1, #1
 	strh	w1, [x22]
-.L1607:
+.L1623:
 	and	w20, w27, 65535
-	b	.L1606
-.L1609:
+	b	.L1622
+.L1625:
 	add	x2, x3, x0
 	ldrh	w5, [x24, x2, lsl 1]
 	add	x2, x4, x0
 	add	x0, x0, 1
 	strh	w5, [x24, x2, lsl 1]
-	b	.L1608
+	b	.L1624
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
 	.section	.text.update_vpc_list,"ax",@progbits
 	.align	2
@@ -10981,22 +11022,22 @@ update_vpc_list:
 	ldr	x1, [x1, #:lo12:.LANCHOR84]
 	ubfiz	x0, x19, 1, 16
 	ldrh	w0, [x1, x0]
-	cbnz	w0, .L1617
+	cbnz	w0, .L1633
 	adrp	x0, .LANCHOR204
 	ldrh	w1, [x0, #:lo12:.LANCHOR204]
 	cmp	w1, w19
-	bne	.L1618
+	bne	.L1634
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR204]
-.L1619:
+.L1635:
 	adrp	x20, .LANCHOR86
 	mov	w1, w19
 	adrp	x0, .LANCHOR83
 	add	x0, x0, :lo12:.LANCHOR83
 	bl	List_remove_node
 	ldrh	w0, [x20, #:lo12:.LANCHOR86]
-	cbnz	w0, .L1621
-	mov	w2, 3392
+	cbnz	w0, .L1637
+	mov	w2, 3336
 	adrp	x1, .LANCHOR206
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR206
@@ -11007,7 +11048,7 @@ update_vpc_list:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1621:
+.L1637:
 	ldrh	w0, [x20, #:lo12:.LANCHOR86]
 	sub	w0, w0, #1
 	strh	w0, [x20, #:lo12:.LANCHOR86]
@@ -11022,8 +11063,8 @@ update_vpc_list:
 	adrp	x1, .LANCHOR40
 	ldrh	w1, [x1, #:lo12:.LANCHOR40]
 	cmp	w0, w1
-	ble	.L1625
-	mov	w2, 3395
+	ble	.L1641
+	mov	w2, 3339
 	adrp	x1, .LANCHOR206
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR206
@@ -11034,32 +11075,32 @@ update_vpc_list:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1625:
+.L1641:
 	mov	w0, 1
-	b	.L1616
-.L1618:
+	b	.L1632
+.L1634:
 	adrp	x0, .LANCHOR92
 	ldrh	w0, [x0, #:lo12:.LANCHOR92]
 	cmp	w0, w19
-	beq	.L1624
+	beq	.L1640
 	adrp	x0, .LANCHOR93
 	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w0, w19
-	beq	.L1624
+	beq	.L1640
 	adrp	x0, .LANCHOR94
 	ldrh	w0, [x0, #:lo12:.LANCHOR94]
 	cmp	w0, w19
-	bne	.L1619
-.L1624:
+	bne	.L1635
+.L1640:
 	mov	w0, 0
-.L1616:
+.L1632:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1617:
+.L1633:
 	mov	w0, w19
 	bl	List_update_data_list
-	b	.L1624
+	b	.L1640
 	.size	update_vpc_list, .-update_vpc_list
 	.section	.text.decrement_vpc_count,"ax",@progbits
 	.align	2
@@ -11073,12 +11114,12 @@ decrement_vpc_count:
 	stp	x21, x22, [sp, 32]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1628
+	beq	.L1644
 	adrp	x20, .LANCHOR84
 	ubfiz	x21, x19, 1, 16
 	ldr	x1, [x20, #:lo12:.LANCHOR84]
 	ldrh	w0, [x1, x21]
-	cbnz	w0, .L1629
+	cbnz	w0, .L1645
 	mov	w2, 0
 	mov	w1, w19
 	adrp	x0, .LC36
@@ -11086,8 +11127,8 @@ decrement_vpc_count:
 	bl	printf
 	ldr	x0, [x20, #:lo12:.LANCHOR84]
 	ldrh	w0, [x0, x21]
-	cbnz	w0, .L1630
-	mov	w2, 3410
+	cbnz	w0, .L1646
+	mov	w2, 3354
 	adrp	x1, .LANCHOR207
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR207
@@ -11098,7 +11139,7 @@ decrement_vpc_count:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1630:
+.L1646:
 	ldr	x0, [x20, #:lo12:.LANCHOR84]
 	adrp	x6, .LANCHOR88
 	add	x6, x6, :lo12:.LANCHOR88
@@ -11107,14 +11148,14 @@ decrement_vpc_count:
 	mov	w1, w19
 	mov	x0, x6
 	bl	test_node_in_list
-	cbz	w0, .L1631
+	cbz	w0, .L1647
 	adrp	x22, .LANCHOR89
 	mov	w1, w19
 	mov	x0, x6
 	bl	List_remove_node
 	ldrh	w0, [x22, #:lo12:.LANCHOR89]
-	cbnz	w0, .L1632
-	mov	w2, 3414
+	cbnz	w0, .L1648
+	mov	w2, 3358
 	adrp	x1, .LANCHOR207
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR207
@@ -11125,7 +11166,7 @@ decrement_vpc_count:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1632:
+.L1648:
 	ldrh	w0, [x22, #:lo12:.LANCHOR89]
 	sub	w0, w0, #1
 	strh	w0, [x22, #:lo12:.LANCHOR89]
@@ -11137,26 +11178,26 @@ decrement_vpc_count:
 	adrp	x0, .LC37
 	add	x0, x0, :lo12:.LC37
 	bl	printf
-.L1631:
+.L1647:
 	mov	w0, w19
 	bl	FtlGcRefreshBlock
-.L1635:
+.L1651:
 	mov	w20, 0
-	b	.L1627
-.L1629:
+	b	.L1643
+.L1645:
 	sub	w0, w0, #1
 	strh	w0, [x1, x21]
-.L1628:
+.L1644:
 	adrp	x21, .LANCHOR133
 	mov	w1, 65535
 	ldrh	w0, [x21, #:lo12:.LANCHOR133]
 	cmp	w0, w1
-	bne	.L1634
+	bne	.L1650
 	strh	w19, [x21, #:lo12:.LANCHOR133]
-	b	.L1635
-.L1634:
+	b	.L1651
+.L1650:
 	cmp	w19, w0
-	beq	.L1635
+	beq	.L1651
 	bl	update_vpc_list
 	cmp	w0, 0
 	adrp	x1, .LANCHOR82
@@ -11174,10 +11215,10 @@ decrement_vpc_count:
 	ldr	x1, [x1, #:lo12:.LANCHOR84]
 	and	x2, x0, 65535
 	ldrh	w1, [x1, x2, lsl 1]
-	cbnz	w1, .L1627
+	cbnz	w1, .L1643
 	cmp	w19, w0, uxth
-	beq	.L1627
-	mov	w2, 3435
+	beq	.L1643
+	mov	w2, 3379
 	adrp	x1, .LANCHOR207
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR207
@@ -11188,7 +11229,7 @@ decrement_vpc_count:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1627:
+.L1643:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11201,7 +11242,7 @@ decrement_vpc_count:
 	.type	FtlSlcSuperblockCheck, %function
 FtlSlcSuperblockCheck:
 	ldrh	w1, [x0, 4]
-	cbz	w1, .L1652
+	cbz	w1, .L1668
 	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
@@ -11210,7 +11251,7 @@ FtlSlcSuperblockCheck:
 	stp	x21, x22, [sp, 32]
 	str	x23, [sp, 48]
 	cmp	w1, w20
-	beq	.L1640
+	beq	.L1656
 	mov	x19, x0
 	ldrb	w0, [x0, 6]
 	adrp	x22, .LANCHOR8
@@ -11219,37 +11260,37 @@ FtlSlcSuperblockCheck:
 	add	x23, x22, :lo12:.LANCHOR8
 	add	x21, x21, :lo12:.LANCHOR120
 	ldrh	w0, [x19, x0, lsl 1]
-.L1644:
+.L1660:
 	cmp	w0, w20
-	beq	.L1646
+	beq	.L1662
 	ldrb	w0, [x19, 8]
 	cmp	w0, 1
-	bne	.L1647
+	bne	.L1663
 	ldrb	w1, [x23]
-	cbnz	w1, .L1647
+	cbnz	w1, .L1663
 	ldrh	w1, [x19, 2]
 	ldrh	w1, [x21, x1, lsl 1]
 	cmp	w1, w20
-	bne	.L1647
+	bne	.L1663
 	ldrh	w0, [x19, 4]
 	sub	w0, w0, #1
 	strh	w0, [x19, 4]
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1646
+	cbnz	w0, .L1662
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
-.L1655:
+.L1671:
 	strh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
-.L1640:
+.L1656:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1646:
+.L1662:
 	ldrb	w0, [x19, 6]
 	adrp	x1, .LANCHOR38
 	add	w0, w0, 1
@@ -11257,26 +11298,26 @@ FtlSlcSuperblockCheck:
 	and	w0, w0, 255
 	strb	w0, [x19, 6]
 	cmp	w1, w0
-	bne	.L1645
+	bne	.L1661
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L1645:
+.L1661:
 	ldrb	w0, [x19, 6]
 	add	x0, x0, 8
 	ldrh	w0, [x19, x0, lsl 1]
-	b	.L1644
-.L1647:
+	b	.L1660
+.L1663:
 	ldrb	w1, [x22, #:lo12:.LANCHOR8]
-	cbz	w1, .L1640
+	cbz	w1, .L1656
 	cmp	w0, 1
-	bne	.L1640
+	bne	.L1656
 	adrp	x0, .LANCHOR54
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x0, #:lo12:.LANCHOR54]
 	cmp	w1, w0
-	bcc	.L1640
+	bcc	.L1656
 	ldrh	w0, [x19]
 	adrp	x1, .LANCHOR84
 	ldrh	w3, [x19, 4]
@@ -11288,8 +11329,8 @@ FtlSlcSuperblockCheck:
 	adrp	x0, .LANCHOR53
 	strh	wzr, [x19, 4]
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
-	b	.L1655
-.L1652:
+	b	.L1671
+.L1668:
 	ret
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
 	.section	.text.get_new_active_ppa,"ax",@progbits
@@ -11307,8 +11348,8 @@ get_new_active_ppa:
 	stp	x23, x24, [sp, 48]
 	cmp	w1, w0
 	str	x25, [sp, 64]
-	bne	.L1657
-	mov	w2, 3332
+	bne	.L1673
+	mov	w2, 3276
 	adrp	x1, .LANCHOR208
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR208
@@ -11319,13 +11360,13 @@ get_new_active_ppa:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1657:
+.L1673:
 	adrp	x20, .LANCHOR53
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L1658
-	mov	w2, 3333
+	bne	.L1674
+	mov	w2, 3277
 	adrp	x1, .LANCHOR208
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR208
@@ -11336,10 +11377,10 @@ get_new_active_ppa:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1658:
+.L1674:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1659
-	mov	w2, 3334
+	cbnz	w0, .L1675
+	mov	w2, 3278
 	adrp	x1, .LANCHOR208
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR208
@@ -11350,7 +11391,7 @@ get_new_active_ppa:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1659:
+.L1675:
 	ldrb	w0, [x19, 6]
 	adrp	x21, .LANCHOR38
 	strb	wzr, [x19, 10]
@@ -11361,42 +11402,42 @@ get_new_active_ppa:
 	add	x24, x24, :lo12:.LANCHOR120
 	add	x25, x21, :lo12:.LANCHOR38
 	ldrh	w22, [x19, x0, lsl 1]
-.L1660:
+.L1676:
 	mov	w2, 65535
 	cmp	w22, w2
-	beq	.L1661
+	beq	.L1677
 	ldrb	w0, [x19, 8]
 	ldrh	w1, [x19, 4]
 	cmp	w0, 1
 	ldrh	w0, [x19, 2]
-	bne	.L1663
+	bne	.L1679
 	ldrb	w3, [x23]
-	cbnz	w3, .L1663
+	cbnz	w3, .L1679
 	ldrh	w3, [x24, w0, sxtw 1]
 	cmp	w3, w2
-	bne	.L1663
+	bne	.L1679
 	ldrh	w0, [x19]
 	sub	w1, w1, #1
 	strh	w1, [x19, 4]
 	bl	decrement_vpc_count
-.L1661:
+.L1677:
 	ldrb	w0, [x19, 6]
 	ldrh	w1, [x25]
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x19, 6]
 	cmp	w1, w0
-	bne	.L1662
+	bne	.L1678
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L1662:
+.L1678:
 	ldrb	w0, [x19, 6]
 	add	x0, x0, 8
 	ldrh	w22, [x19, x0, lsl 1]
-	b	.L1660
-.L1663:
+	b	.L1676
+.L1679:
 	adrp	x23, .LANCHOR8
 	adrp	x24, .LANCHOR120
 	orr	w22, w0, w22, lsl 10
@@ -11404,46 +11445,46 @@ get_new_active_ppa:
 	add	x24, x24, :lo12:.LANCHOR120
 	sub	w1, w1, #1
 	strh	w1, [x19, 4]
-.L1664:
+.L1680:
 	ldrb	w0, [x19, 6]
 	mov	w1, 65535
 	ldrh	w3, [x21, #:lo12:.LANCHOR38]
-.L1666:
+.L1682:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	cmp	w0, w3
-	bne	.L1665
+	bne	.L1681
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
 	mov	w0, 0
-.L1665:
+.L1681:
 	add	x2, x19, x0, sxtw 1
 	ldrh	w2, [x2, 16]
 	cmp	w2, w1
-	beq	.L1666
+	beq	.L1682
 	strb	w0, [x19, 6]
 	ldrb	w0, [x19, 8]
 	cmp	w0, 1
-	bne	.L1667
+	bne	.L1683
 	ldrb	w2, [x23]
 	ldrh	w0, [x19, 2]
-	cbnz	w2, .L1668
+	cbnz	w2, .L1684
 	ldrh	w0, [x24, w0, sxtw 1]
 	cmp	w0, w1
-	bne	.L1667
+	bne	.L1683
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1667
+	cbz	w0, .L1683
 	sub	w0, w0, #1
 	strh	w0, [x19, 4]
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-	b	.L1664
-.L1668:
+	b	.L1680
+.L1684:
 	adrp	x1, .LANCHOR54
 	ldrh	w1, [x1, #:lo12:.LANCHOR54]
 	cmp	w0, w1
-	bcc	.L1667
+	bcc	.L1683
 	ldrh	w0, [x19]
 	adrp	x1, .LANCHOR84
 	ldrh	w3, [x19, 4]
@@ -11456,14 +11497,14 @@ get_new_active_ppa:
 	ldrh	w0, [x20, #:lo12:.LANCHOR53]
 	strh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
-.L1667:
+.L1683:
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L1656
+	bne	.L1672
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1656
-	mov	w2, 3378
+	cbz	w0, .L1672
+	mov	w2, 3322
 	adrp	x1, .LANCHOR208
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR208
@@ -11474,7 +11515,7 @@ get_new_active_ppa:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1656:
+.L1672:
 	mov	w0, w22
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -11491,23 +11532,23 @@ FtlVpcTblFlush:
 	stp	x29, x30, [sp, -112]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR77
+	adrp	x24, .LANCHOR77
 	stp	x19, x20, [sp, 16]
-	ldr	w0, [x23, #:lo12:.LANCHOR77]
+	ldr	w0, [x24, #:lo12:.LANCHOR77]
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	str	x23, [x29, 104]
-	cbnz	w0, .L1681
-	adrp	x25, .LANCHOR188
+	str	x24, [x29, 104]
+	cbnz	w0, .L1697
+	adrp	x26, .LANCHOR188
 	adrp	x28, .LANCHOR202
-	adrp	x27, .LANCHOR209
+	adrp	x23, .LANCHOR209
 	add	x21, x28, :lo12:.LANCHOR202
-	ldr	x20, [x25, #:lo12:.LANCHOR188]
-	adrp	x24, .LANCHOR183
-	ldrh	w2, [x27, #:lo12:.LANCHOR209]
-	add	x1, x27, :lo12:.LANCHOR209
-	ldr	x0, [x24, #:lo12:.LANCHOR183]
+	ldr	x20, [x26, #:lo12:.LANCHOR188]
+	adrp	x25, .LANCHOR183
+	ldrh	w2, [x23, #:lo12:.LANCHOR209]
+	add	x1, x23, :lo12:.LANCHOR209
+	ldr	x0, [x25, #:lo12:.LANCHOR183]
 	mov	w3, 19539
 	stp	x0, x20, [x21, 8]
 	movk	w3, 0x4654, lsl 16
@@ -11516,14 +11557,14 @@ FtlVpcTblFlush:
 	strh	w2, [x20]
 	adrp	x22, .LANCHOR159
 	ldr	w2, [x1, 8]
-	adrp	x26, .LANCHOR40
+	adrp	x27, .LANCHOR40
 	ldrh	w1, [x1, 6]
 	stp	w2, wzr, [x20, 4]
 	adrp	x2, .LANCHOR81
 	add	x19, x2, :lo12:.LANCHOR81
 	str	wzr, [x20, 12]
 	str	w3, [x2, #:lo12:.LANCHOR81]
-	mov	w2, 73
+	mov	w2, 80
 	movk	w2, 0x5000, lsl 16
 	strh	w1, [x19, 8]
 	adrp	x1, .LANCHOR45
@@ -11584,13 +11625,13 @@ FtlVpcTblFlush:
 	mov	x19, x28
 	bl	ftl_memcpy
 	adrp	x1, .LANCHOR84
-	ldrh	w2, [x26, #:lo12:.LANCHOR40]
+	ldrh	w2, [x27, #:lo12:.LANCHOR40]
 	ldr	x0, [x21, 8]
 	ldr	x1, [x1, #:lo12:.LANCHOR84]
 	lsl	w2, w2, 1
 	add	x0, x0, 48
 	bl	ftl_memcpy
-	ldrh	w0, [x26, #:lo12:.LANCHOR40]
+	ldrh	w0, [x27, #:lo12:.LANCHOR40]
 	adrp	x1, .LANCHOR0
 	ldr	x3, [x21, 8]
 	ldr	x1, [x1, #:lo12:.LANCHOR0]
@@ -11603,8 +11644,8 @@ FtlVpcTblFlush:
 	bl	ftl_memcpy
 	adrp	x0, .LANCHOR70
 	ldrh	w0, [x0, #:lo12:.LANCHOR70]
-	cbz	w0, .L1682
-	ldrh	w0, [x26, #:lo12:.LANCHOR40]
+	cbz	w0, .L1698
+	ldrh	w0, [x27, #:lo12:.LANCHOR40]
 	adrp	x1, .LANCHOR67
 	ldr	x3, [x21, 8]
 	ldrh	w2, [x1, #:lo12:.LANCHOR67]
@@ -11617,65 +11658,58 @@ FtlVpcTblFlush:
 	and	x0, x0, 65532
 	add	x0, x3, x0
 	bl	ftl_memcpy
-.L1682:
-	mov	w0, 0
+.L1698:
 	add	x28, x19, :lo12:.LANCHOR202
+	mov	w0, 0
+	add	x24, x23, :lo12:.LANCHOR209
 	bl	FtlUpdateVaildLpn
-	add	x23, x27, :lo12:.LANCHOR209
+	adrp	x23, .LANCHOR54
 	mov	w21, 0
-	adrp	x27, .LANCHOR54
-	mov	w26, 65535
-	add	x0, x27, :lo12:.LANCHOR54
-	str	x0, [x29, 96]
-.L1683:
-	ldr	x0, [x24, #:lo12:.LANCHOR183]
-	mov	w3, 1
+	add	x23, x23, :lo12:.LANCHOR54
+	mov	w27, 65535
+	str	x23, [x29, 96]
+.L1699:
+	ldrh	w2, [x24, 2]
+	ldrh	w1, [x24]
+	ldr	x0, [x25, #:lo12:.LANCHOR183]
 	str	x0, [x28, 8]
-	mov	w2, w3
-	ldr	x0, [x25, #:lo12:.LANCHOR188]
-	ldrh	w1, [x23, 2]
+	ldr	x0, [x26, #:lo12:.LANCHOR188]
 	str	x0, [x28, 16]
-	ldrh	w0, [x23]
-	orr	w0, w1, w0, lsl 10
-	mov	w1, w3
+	orr	w0, w2, w1, lsl 10
 	str	w0, [x28, 4]
-	mov	x0, x28
-	bl	FlashProgPages
-	ldrh	w0, [x27, #:lo12:.LANCHOR54]
-	ldrh	w1, [x23, 2]
-	sub	w0, w0, #1
-	cmp	w1, w0
-	blt	.L1684
 	ldrh	w0, [x23]
-	ldrh	w26, [x23, 4]
-	strh	wzr, [x23, 2]
-	strh	w0, [x23, 4]
+	sub	w0, w0, #1
+	cmp	w2, w0
+	blt	.L1700
+	ldrh	w27, [x24, 4]
+	strh	wzr, [x24, 2]
+	strh	w1, [x24, 4]
 	bl	FtlFreeSysBlkQueueOut
-	strh	w0, [x23]
 	ldr	w1, [x22, #:lo12:.LANCHOR159]
-	mov	w3, 1
-	str	w1, [x23, 8]
+	str	w1, [x24, 8]
 	add	w2, w1, 1
 	str	w2, [x22, #:lo12:.LANCHOR159]
 	ubfiz	w2, w0, 10, 16
 	str	w2, [x28, 4]
+	strh	w0, [x24]
 	strh	w0, [x20, 2]
-	mov	w2, w3
 	str	w1, [x20, 4]
+.L1700:
+	mov	w3, 1
 	mov	x0, x28
 	mov	w1, w3
+	mov	w2, w3
 	bl	FlashProgPages
-.L1684:
-	ldrh	w0, [x23, 2]
+	ldrh	w0, [x24, 2]
 	ldr	w1, [x28]
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	strh	w0, [x23, 2]
+	strh	w0, [x24, 2]
 	cmn	w1, #1
-	bne	.L1685
+	bne	.L1701
 	cmp	w0, 1
-	bne	.L1686
-	mov	w2, 1219
+	bne	.L1702
+	mov	w2, 1209
 	adrp	x1, .LANCHOR210
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR210
@@ -11686,19 +11720,19 @@ FtlVpcTblFlush:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1686:
-	ldrh	w0, [x23, 2]
+.L1702:
+	ldrh	w0, [x24, 2]
 	cmp	w0, 1
-	bne	.L1687
+	bne	.L1703
 	ldr	x0, [x29, 96]
 	ldrh	w0, [x0]
 	sub	w0, w0, #1
-	strh	w0, [x23, 2]
-.L1687:
+	strh	w0, [x24, 2]
+.L1703:
 	add	w21, w21, 1
 	and	w21, w21, 65535
 	cmp	w21, 3
-	bls	.L1683
+	bls	.L1699
 	add	x19, x19, :lo12:.LANCHOR202
 	mov	w2, w21
 	adrp	x0, .LC38
@@ -11708,7 +11742,7 @@ FtlVpcTblFlush:
 	ldr	x1, [x29, 104]
 	mov	w0, 1
 	str	w0, [x1, #:lo12:.LANCHOR77]
-.L1681:
+.L1697:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -11717,18 +11751,18 @@ FtlVpcTblFlush:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1685:
+.L1701:
 	cmp	w0, 1
-	beq	.L1683
+	beq	.L1699
 	cmp	w1, 256
-	beq	.L1683
+	beq	.L1699
 	mov	w0, 65535
-	cmp	w26, w0
-	beq	.L1681
+	cmp	w27, w0
+	beq	.L1697
 	mov	w1, 1
-	mov	w0, w26
+	mov	w0, w27
 	bl	FtlFreeSysBlkQueueIn
-	b	.L1681
+	b	.L1697
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
 	.section	.text.FtlSuperblockPowerLostFix,"ax",@progbits
 	.align	2
@@ -11742,16 +11776,16 @@ FtlSuperblockPowerLostFix:
 	ldr	w23, [x1, #:lo12:.LANCHOR77]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	cbnz	w23, .L1700
+	cbnz	w23, .L1716
 	adrp	x1, .LANCHOR8
 	ldrb	w1, [x1, #:lo12:.LANCHOR8]
-	cbz	w1, .L1711
+	cbz	w1, .L1727
 	ldrb	w1, [x0, 8]
 	cmp	w1, 1
-	bne	.L1711
+	bne	.L1727
 	ldrh	w21, [x0, 4]
 	mov	w23, w1
-.L1702:
+.L1718:
 	adrp	x1, .LANCHOR188
 	mov	x19, x0
 	mov	w0, -1
@@ -11775,13 +11809,13 @@ FtlSuperblockPowerLostFix:
 	mov	w1, 22136
 	movk	w1, 0x1234, lsl 16
 	str	w1, [x0, 4]
-.L1703:
+.L1719:
 	sub	w21, w21, #1
 	cmn	w21, #1
-	beq	.L1706
+	beq	.L1722
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1704
-.L1706:
+	cbnz	w0, .L1720
+.L1722:
 	ldrh	w0, [x19]
 	adrp	x1, .LANCHOR84
 	ldrh	w3, [x19, 4]
@@ -11795,21 +11829,21 @@ FtlSuperblockPowerLostFix:
 	strh	wzr, [x19, 4]
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	strh	w0, [x19, 2]
-.L1700:
+.L1716:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1711:
+.L1727:
 	mov	w21, 12
-	b	.L1702
-.L1704:
+	b	.L1718
+.L1720:
 	mov	x0, x19
 	bl	get_new_active_ppa
 	str	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L1706
+	beq	.L1722
 	ldr	w0, [x22]
 	mov	w3, 0
 	str	w0, [x20, 4]
@@ -11823,7 +11857,7 @@ FtlSuperblockPowerLostFix:
 	bl	FlashProgPages
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-	b	.L1703
+	b	.L1719
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
 	.section	.text.FtlLoadFactoryBbt,"ax",@progbits
 	.align	2
@@ -11855,10 +11889,10 @@ FtlLoadFactoryBbt:
 	mov	w21, 0
 	mov	w27, -1
 	str	x25, [x1, 16]
-.L1717:
+.L1733:
 	ldrh	w0, [x23]
 	cmp	w21, w0
-	bcc	.L1722
+	bcc	.L1738
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -11867,18 +11901,18 @@ FtlLoadFactoryBbt:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1722:
+.L1738:
 	ldrh	w19, [x26, #:lo12:.LANCHOR51]
 	add	x24, x22, :lo12:.LANCHOR202
 	strh	w27, [x20]
 	mov	w3, 61664
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L1718:
+.L1734:
 	ldrh	w0, [x28]
 	sub	w1, w0, #15
 	cmp	w1, w19
-	bgt	.L1720
+	bgt	.L1736
 	madd	w0, w0, w21, w19
 	mov	w2, 1
 	str	w3, [x29, 108]
@@ -11890,19 +11924,19 @@ FtlLoadFactoryBbt:
 	ldr	w0, [x24]
 	ldr	w3, [x29, 108]
 	cmn	w0, #1
-	beq	.L1719
+	beq	.L1735
 	ldrh	w0, [x25]
 	cmp	w0, w3
-	bne	.L1719
+	bne	.L1735
 	strh	w19, [x20]
-.L1720:
+.L1736:
 	add	w21, w21, 1
 	add	x20, x20, 2
-	b	.L1717
-.L1719:
+	b	.L1733
+.L1735:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L1718
+	b	.L1734
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
 	.section	.text.FtlGetLastWrittenPage,"ax",@progbits
 	.align	2
@@ -11916,10 +11950,10 @@ FtlGetLastWrittenPage:
 	mov	w23, w1
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	bne	.L1728
+	bne	.L1744
 	adrp	x1, .LANCHOR54
 	ldrh	w19, [x1, #:lo12:.LANCHOR54]
-.L1729:
+.L1745:
 	sub	w19, w19, #1
 	lsl	w21, w0, 10
 	sxth	w19, w19
@@ -11933,24 +11967,24 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 128]
 	cmn	w0, #1
-	bne	.L1730
+	bne	.L1746
 	mov	w22, 0
 	mov	w24, 2
-.L1731:
+.L1747:
 	cmp	w22, w19
-	ble	.L1734
-.L1730:
+	ble	.L1750
+.L1746:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 192
 	ret
-.L1728:
+.L1744:
 	adrp	x1, .LANCHOR53
 	ldrh	w19, [x1, #:lo12:.LANCHOR53]
-	b	.L1729
-.L1734:
+	b	.L1745
+.L1750:
 	add	w20, w22, w19
 	mov	w2, w23
 	mov	w1, 1
@@ -11962,20 +11996,20 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 128]
 	cmn	w0, #1
-	bne	.L1732
+	bne	.L1748
 	ldr	w0, [x29, 132]
 	cmn	w0, #1
-	bne	.L1732
+	bne	.L1748
 	ldr	w0, [x29, 72]
 	cmn	w0, #1
-	beq	.L1732
+	beq	.L1748
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L1731
-.L1732:
+	b	.L1747
+.L1748:
 	add	w20, w20, 1
 	sxth	w22, w20
-	b	.L1731
+	b	.L1747
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
 	.section	.text.FtlLoadBbt,"ax",@progbits
 	.align	2
@@ -12003,11 +12037,11 @@ FtlLoadBbt:
 	add	x24, x24, :lo12:.LANCHOR51
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L1740:
+.L1756:
 	ldrh	w0, [x24]
 	sub	w0, w0, #47
 	cmp	w0, w19
-	bgt	.L1743
+	bgt	.L1759
 	lsl	w0, w19, 10
 	mov	w2, 1
 	str	w0, [x20, 4]
@@ -12016,7 +12050,7 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L1741
+	bne	.L1757
 	ldr	w0, [x20, 4]
 	mov	w2, 1
 	mov	w1, w2
@@ -12024,13 +12058,13 @@ FtlLoadBbt:
 	str	w0, [x20, 4]
 	mov	x0, x20
 	bl	FlashReadPages
-.L1741:
+.L1757:
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L1742
+	beq	.L1758
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	bne	.L1742
+	bne	.L1758
 	adrp	x1, .LANCHOR75
 	add	x0, x1, :lo12:.LANCHOR75
 	strh	w19, [x1, #:lo12:.LANCHOR75]
@@ -12038,16 +12072,16 @@ FtlLoadBbt:
 	str	w1, [x0, 8]
 	ldrh	w1, [x21, 8]
 	strh	w1, [x0, 4]
-.L1743:
+.L1759:
 	adrp	x19, .LANCHOR75
 	mov	w0, 65535
 	add	x20, x19, :lo12:.LANCHOR75
 	ldrh	w1, [x19, #:lo12:.LANCHOR75]
 	cmp	w1, w0
-	beq	.L1757
+	beq	.L1773
 	ldrh	w1, [x20, 4]
 	cmp	w1, w0
-	beq	.L1747
+	beq	.L1763
 	add	x0, x22, :lo12:.LANCHOR202
 	lsl	w1, w1, 10
 	mov	w2, 1
@@ -12056,21 +12090,21 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x22, #:lo12:.LANCHOR202]
 	cmn	w0, #1
-	beq	.L1747
+	beq	.L1763
 	ldrh	w1, [x21]
 	mov	w0, 61649
 	cmp	w1, w0
-	bne	.L1747
+	bne	.L1763
 	ldr	w1, [x20, 8]
 	ldr	w0, [x21, 4]
 	cmp	w0, w1
-	bls	.L1747
+	bls	.L1763
 	ldrh	w1, [x20, 4]
 	str	w0, [x20, 8]
 	ldrh	w0, [x21, 8]
 	strh	w1, [x19, #:lo12:.LANCHOR75]
 	strh	w0, [x20, 4]
-.L1747:
+.L1763:
 	ldrh	w0, [x19, #:lo12:.LANCHOR75]
 	add	x24, x19, :lo12:.LANCHOR75
 	mov	w1, 1
@@ -12080,9 +12114,9 @@ FtlLoadBbt:
 	add	w0, w0, 1
 	strh	w0, [x24, 2]
 	add	x24, x22, :lo12:.LANCHOR202
-.L1749:
-	tbz	w20, #31, .L1752
-	mov	w2, 336
+.L1765:
+	tbz	w20, #31, .L1768
+	mov	w2, 335
 	adrp	x1, .LANCHOR211
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR211
@@ -12093,27 +12127,27 @@ FtlLoadBbt:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1751:
+.L1767:
 	add	x0, x19, :lo12:.LANCHOR75
 	ldrh	w1, [x21, 10]
 	strh	w1, [x0, 6]
 	mov	w1, 65535
 	ldrh	w0, [x21, 12]
 	cmp	w0, w1
-	beq	.L1754
+	beq	.L1770
 	adrp	x1, .LANCHOR37
 	ldr	w2, [x1, #:lo12:.LANCHOR37]
 	cmp	w0, w2
-	beq	.L1754
+	beq	.L1770
 	adrp	x1, .LANCHOR41
 	ldrh	w1, [x1, #:lo12:.LANCHOR41]
 	lsr	w1, w1, 2
 	cmp	w2, w1
-	bcs	.L1754
+	bcs	.L1770
 	cmp	w0, w1
-	bcs	.L1754
+	bcs	.L1770
 	bl	FtlSysBlkNumInit
-.L1754:
+.L1770:
 	add	x19, x19, :lo12:.LANCHOR75
 	adrp	x21, .LANCHOR45
 	adrp	x23, .LANCHOR123
@@ -12122,23 +12156,23 @@ FtlLoadBbt:
 	add	x23, x23, :lo12:.LANCHOR123
 	add	x22, x22, :lo12:.LANCHOR202
 	mov	w20, 0
-.L1755:
+.L1771:
 	ldrh	w0, [x21]
 	cmp	w20, w0
-	bcc	.L1756
+	bcc	.L1772
 	mov	w0, 0
-.L1739:
+.L1755:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1742:
+.L1758:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L1740
-.L1752:
+	b	.L1756
+.L1768:
 	ldrh	w0, [x19, #:lo12:.LANCHOR75]
 	mov	w2, 1
 	mov	w1, w2
@@ -12150,15 +12184,15 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x24]
 	cmn	w0, #1
-	beq	.L1750
+	beq	.L1766
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	beq	.L1751
-.L1750:
+	beq	.L1767
+.L1766:
 	sub	w20, w20, #1
 	sxth	w20, w20
-	b	.L1749
-.L1756:
+	b	.L1765
+.L1772:
 	ldrh	w2, [x23]
 	ldr	x0, [x22, 8]
 	mul	w1, w2, w20
@@ -12167,10 +12201,10 @@ FtlLoadBbt:
 	add	x1, x0, x1, lsl 2
 	ldr	x0, [x19], 8
 	bl	ftl_memcpy
-	b	.L1755
-.L1757:
+	b	.L1771
+.L1773:
 	mov	w0, -1
-	b	.L1739
+	b	.L1755
 	.size	FtlLoadBbt, .-FtlLoadBbt
 	.section	.text.ftl_map_blk_gc,"ax",@progbits
 	.align	2
@@ -12181,42 +12215,24 @@ ftl_map_blk_gc:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
+	stp	x25, x26, [sp, 64]
+	adrp	x25, .LANCHOR54
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR54
 	stp	x23, x24, [sp, 48]
-	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	ldr	x20, [x0, 16]
-	ldr	x23, [x0, 40]
+	ldr	x26, [x0, 40]
 	bl	ftl_free_no_use_map_blk
-	ldrh	w4, [x19, 10]
+	ldrh	w1, [x19, 10]
 	ldrh	w2, [x19, 8]
-	sub	w1, w4, #4
+	sub	w1, w1, #4
 	cmp	w2, w1
-	ldrh	w1, [x19, 60]
-	bge	.L1770
-	mov	w2, 65535
-	cmp	w1, w2
-	beq	.L1772
-	ldrh	w3, [x19, 2]
-	ldrh	w2, [x21, #:lo12:.LANCHOR54]
-	cmp	w3, w2
-	bcc	.L1773
-.L1770:
-	mov	w2, 65535
-	and	w0, w0, 65535
-	cmp	w1, w2
-	beq	.L1774
-	ldrh	w3, [x19, 2]
-	ldrh	w2, [x21, #:lo12:.LANCHOR54]
-	cmp	w2, w3
-	bls	.L1775
-.L1774:
-	ubfiz	x0, x0, 1, 32
-	ldrh	w22, [x20, x0]
-	cbz	w22, .L1772
+	blt	.L1786
+	ubfiz	x0, x0, 1, 16
+	ldrh	w21, [x20, x0]
+	cbz	w21, .L1786
 	ldr	w1, [x19, 52]
-	cbnz	w1, .L1772
+	cbnz	w1, .L1786
 	mov	w1, 1
 	str	w1, [x19, 52]
 	strh	wzr, [x20, x0]
@@ -12224,67 +12240,43 @@ ftl_map_blk_gc:
 	ldrh	w1, [x19, 2]
 	sub	w0, w0, #1
 	strh	w0, [x19, 8]
-	ldrh	w0, [x21, #:lo12:.LANCHOR54]
+	ldrh	w0, [x25, #:lo12:.LANCHOR54]
 	cmp	w1, w0
-	bcc	.L1780
+	bcc	.L1787
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L1780:
-	adrp	x24, .LANCHOR202
-	adrp	x26, .LANCHOR212
-	mov	x25, x24
-	add	x27, x24, :lo12:.LANCHOR202
-	add	x26, x26, :lo12:.LANCHOR212
+.L1787:
+	adrp	x22, .LANCHOR202
+	adrp	x24, .LANCHOR212
+	mov	x23, x22
+	add	x27, x22, :lo12:.LANCHOR202
+	add	x24, x24, :lo12:.LANCHOR212
 	mov	w20, 0
-.L1781:
+.L1788:
 	ldrh	w0, [x19, 6]
 	cmp	w0, w20
-	bhi	.L1786
+	bhi	.L1794
 	mov	w1, 1
-	mov	w0, w22
+	mov	w0, w21
 	bl	FtlFreeSysBlkQueueIn
 	str	wzr, [x19, 52]
-.L1772:
+.L1786:
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x21, #:lo12:.LANCHOR54]
+	ldrh	w0, [x25, #:lo12:.LANCHOR54]
 	cmp	w1, w0
-	bcc	.L1773
+	bcc	.L1792
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-	b	.L1773
-.L1778:
-	ldrh	w6, [x20, x2, lsl 1]
-	add	x5, x2, 1
-	cmp	w6, w1
-	beq	.L1776
-	mov	x2, x5
-.L1777:
-	and	w22, w2, 65535
-	cmp	w22, w4
-	bcc	.L1778
-	mov	w22, w0
-.L1776:
-	and	x2, x2, 65535
-	adrp	x0, .LC39
-	add	x0, x0, :lo12:.LC39
-	ldrh	w2, [x20, x2, lsl 1]
-	bl	printf
-	mov	w0, -1
-	strh	w0, [x19, 60]
-	mov	w0, w22
-	b	.L1774
-.L1775:
-	mov	x2, 0
-	b	.L1777
-.L1786:
+	b	.L1792
+.L1794:
 	ubfiz	x0, x20, 2, 16
-	add	x1, x23, x0
+	add	x1, x26, x0
 	str	x1, [x29, 104]
-	ldr	w1, [x23, x0]
-	cmp	w22, w1, lsr 10
-	bne	.L1782
+	ldr	w1, [x26, x0]
+	cmp	w21, w1, lsr 10
+	bne	.L1789
 	adrp	x2, .LANCHOR184
-	add	x0, x24, :lo12:.LANCHOR202
+	add	x0, x22, :lo12:.LANCHOR202
 	ldr	x2, [x2, #:lo12:.LANCHOR184]
 	str	x2, [x0, 8]
 	adrp	x2, .LANCHOR188
@@ -12296,9 +12288,9 @@ ftl_map_blk_gc:
 	bl	FlashReadPages
 	ldrh	w0, [x28, 8]
 	cmp	w0, w20
-	beq	.L1783
-	mov	w2, 672
-	mov	x1, x26
+	beq	.L1790
+	mov	w2, 661
+	mov	x1, x24
 	adrp	x0, .LC5
 	add	x0, x0, :lo12:.LC5
 	bl	printf
@@ -12307,23 +12299,23 @@ ftl_map_blk_gc:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1783:
+.L1790:
 	ldr	w0, [x27]
 	ldrh	w2, [x28, 8]
 	cmn	w0, #1
-	bne	.L1784
-.L1785:
+	bne	.L1791
+.L1793:
 	ldr	x0, [x29, 104]
-	add	x25, x25, :lo12:.LANCHOR202
+	add	x23, x23, :lo12:.LANCHOR202
 	str	wzr, [x0]
-	adrp	x0, .LC40
-	add	x0, x0, :lo12:.LC40
-	ldr	w1, [x25, 4]
+	adrp	x0, .LC39
+	add	x0, x0, :lo12:.LC39
+	ldr	w1, [x23, 4]
 	bl	printf
 	adrp	x0, .LANCHOR77
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR77]
-.L1773:
+.L1792:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -12332,21 +12324,21 @@ ftl_map_blk_gc:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1784:
+.L1791:
 	cmp	w2, w20
-	bne	.L1785
+	bne	.L1793
 	ldrh	w1, [x28]
 	ldrh	w0, [x19, 4]
 	cmp	w1, w0
-	bne	.L1785
+	bne	.L1793
 	ldr	x2, [x27, 8]
 	mov	w1, w20
 	mov	x0, x19
 	bl	FtlMapWritePage
-.L1782:
+.L1789:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L1781
+	b	.L1788
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
 	.section	.text.Ftl_write_map_blk_to_last_page,"ax",@progbits
 	.align	2
@@ -12355,7 +12347,7 @@ ftl_map_blk_gc:
 Ftl_write_map_blk_to_last_page:
 	adrp	x1, .LANCHOR77
 	ldr	w1, [x1, #:lo12:.LANCHOR77]
-	cbnz	w1, .L1802
+	cbnz	w1, .L1810
 	stp	x29, x30, [sp, -64]!
 	mov	w1, 65535
 	add	x29, sp, 0
@@ -12366,10 +12358,10 @@ Ftl_write_map_blk_to_last_page:
 	ldr	x20, [x19, 16]
 	str	x23, [sp, 48]
 	cmp	w0, w1
-	bne	.L1793
+	bne	.L1801
 	ldrh	w0, [x19, 8]
-	cbz	w0, .L1794
-	mov	w2, 708
+	cbz	w0, .L1802
+	mov	w2, 697
 	adrp	x1, .LANCHOR213
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR213
@@ -12380,7 +12372,7 @@ Ftl_write_map_blk_to_last_page:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1794:
+.L1802:
 	ldrh	w0, [x19, 8]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
@@ -12391,14 +12383,14 @@ Ftl_write_map_blk_to_last_page:
 	add	w0, w0, 1
 	strh	wzr, [x19]
 	str	w0, [x19, 48]
-.L1792:
+.L1800:
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1793:
+.L1801:
 	ubfiz	x0, x0, 1, 16
 	adrp	x1, .LANCHOR188
 	adrp	x23, .LANCHOR183
@@ -12429,9 +12421,9 @@ Ftl_write_map_blk_to_last_page:
 	mov	x1, 0
 	ldr	x3, [x23, #:lo12:.LANCHOR183]
 	mov	w2, 0
-.L1795:
+.L1803:
 	cmp	w4, w1, uxth
-	bhi	.L1797
+	bhi	.L1805
 	mov	w2, 1
 	mov	w3, 0
 	mov	w1, w2
@@ -12442,11 +12434,11 @@ Ftl_write_map_blk_to_last_page:
 	strh	w0, [x19, 2]
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-	b	.L1792
-.L1797:
+	b	.L1800
+.L1805:
 	ldr	w0, [x22, x1, lsl 2]
 	cmp	w21, w0, lsr 10
-	bne	.L1796
+	bne	.L1804
 	add	w2, w2, 1
 	and	w2, w2, 65535
 	ubfiz	x0, x2, 1, 16
@@ -12454,10 +12446,10 @@ Ftl_write_map_blk_to_last_page:
 	add	x0, x0, 1
 	ldr	w5, [x22, x1, lsl 2]
 	str	w5, [x3, x0, lsl 2]
-.L1796:
+.L1804:
 	add	x1, x1, 1
-	b	.L1795
-.L1802:
+	b	.L1803
+.L1810:
 	mov	w0, 0
 	ret
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
@@ -12483,7 +12475,7 @@ FtlMapWritePage:
 	mov	w21, 0
 	add	x0, x24, :lo12:.LANCHOR54
 	stp	x0, x2, [x29, 96]
-.L1806:
+.L1814:
 	ldr	w0, [x22]
 	ldrh	w1, [x19, 2]
 	add	w0, w0, 1
@@ -12491,22 +12483,22 @@ FtlMapWritePage:
 	ldrh	w0, [x24, #:lo12:.LANCHOR54]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	bge	.L1807
+	bge	.L1815
 	ldrh	w1, [x19]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1808
-.L1807:
+	bne	.L1816
+.L1815:
 	mov	x0, x19
 	bl	Ftl_write_map_blk_to_last_page
-.L1808:
+.L1816:
 	ldr	w0, [x27]
-	cbnz	w0, .L1820
+	cbnz	w0, .L1829
 	ldrh	w1, [x19]
 	ldr	x0, [x19, 16]
 	ldrh	w0, [x0, x1, lsl 1]
-	cbnz	w0, .L1810
-	mov	w2, 768
+	cbnz	w0, .L1818
+	mov	w2, 757
 	adrp	x1, .LANCHOR214
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR214
@@ -12517,12 +12509,12 @@ FtlMapWritePage:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1810:
+.L1818:
 	ldrh	w1, [x19]
 	ldrh	w0, [x19, 10]
 	cmp	w1, w0
-	bcc	.L1811
-	mov	w2, 769
+	bcc	.L1819
+	mov	w2, 758
 	adrp	x1, .LANCHOR214
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR214
@@ -12533,7 +12525,7 @@ FtlMapWritePage:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1811:
+.L1819:
 	ldrh	w1, [x19]
 	adrp	x20, .LANCHOR202
 	ldr	x0, [x19, 16]
@@ -12568,32 +12560,32 @@ FtlMapWritePage:
 	and	w0, w0, 65535
 	strh	w0, [x19, 2]
 	cmn	w1, #1
-	bne	.L1812
+	bne	.L1820
 	ldr	w1, [x28, 4]
-	adrp	x0, .LC41
-	add	x0, x0, :lo12:.LC41
+	adrp	x0, .LC40
+	add	x0, x0, :lo12:.LC40
 	add	w21, w21, 1
 	and	w21, w21, 65535
 	bl	printf
 	ldrh	w0, [x19, 2]
 	cmp	w0, 2
-	bhi	.L1813
+	bhi	.L1821
 	ldr	x0, [x29, 96]
 	ldrh	w0, [x0]
 	sub	w0, w0, #1
 	strh	w0, [x19, 2]
-.L1813:
+.L1821:
 	cmp	w21, 3
-	bls	.L1806
+	bls	.L1814
 	add	x20, x20, :lo12:.LANCHOR202
 	mov	w2, w21
-	adrp	x0, .LC42
-	add	x0, x0, :lo12:.LC42
+	adrp	x0, .LC41
+	add	x0, x0, :lo12:.LC41
 	ldr	w1, [x20, 4]
 	bl	printf
 	mov	w0, 1
 	str	w0, [x25, #:lo12:.LANCHOR77]
-.L1820:
+.L1829:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -12602,22 +12594,28 @@ FtlMapWritePage:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1812:
-	cbz	w1, .L1815
+.L1820:
+	cbz	w1, .L1823
 	strh	w26, [x19, 60]
 	cmp	w0, 1
-	beq	.L1806
+	bne	.L1824
+.L1825:
+	str	wzr, [x19, 56]
+	b	.L1814
+.L1824:
 	cmp	w1, 256
-.L1828:
-	beq	.L1806
+.L1835:
+	beq	.L1825
+	ldr	w0, [x19, 56]
+	cbnz	w0, .L1825
 	add	x20, x20, :lo12:.LANCHOR202
 	ldr	x0, [x19, 40]
 	ldr	w1, [x20, 4]
 	str	w1, [x0, w23, uxtw 2]
-	b	.L1820
-.L1815:
+	b	.L1829
+.L1823:
 	cmp	w0, 1
-	b	.L1828
+	b	.L1835
 	.size	FtlMapWritePage, .-FtlMapWritePage
 	.section	.text.flush_l2p_region,"ax",@progbits
 	.align	2
@@ -12659,27 +12657,27 @@ l2p_flush:
 	str	x21, [sp, 32]
 	mov	w19, 0
 	adrp	x21, .LANCHOR97
-.L1832:
+.L1839:
 	ldrh	w0, [x20]
 	cmp	w0, w19
-	bhi	.L1834
+	bhi	.L1841
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1834:
+.L1841:
 	ldr	x1, [x21, #:lo12:.LANCHOR97]
 	ubfiz	x0, x19, 4, 16
 	add	x0, x1, x0
 	ldr	w0, [x0, 4]
-	tbz	w0, #31, .L1833
+	tbz	w0, #31, .L1840
 	mov	w0, w19
 	bl	flush_l2p_region
-.L1833:
+.L1840:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1832
+	b	.L1839
 	.size	l2p_flush, .-l2p_flush
 	.section	.text.FtlVendorPartWrite,"ax",@progbits
 	.align	2
@@ -12699,7 +12697,7 @@ FtlVendorPartWrite:
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	cmp	w1, w0
-	bhi	.L1844
+	bhi	.L1851
 	adrp	x0, .LANCHOR57
 	adrp	x26, .LANCHOR56
 	adrp	x27, .LANCHOR58
@@ -12709,9 +12707,9 @@ FtlVendorPartWrite:
 	add	x27, x27, :lo12:.LANCHOR58
 	mov	w24, 0
 	lsr	w21, w22, w21
-.L1838:
-	cbnz	w20, .L1843
-.L1836:
+.L1845:
+	cbnz	w20, .L1850
+.L1843:
 	mov	w0, w24
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -12720,7 +12718,7 @@ FtlVendorPartWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1843:
+.L1850:
 	ldrh	w1, [x26]
 	adrp	x0, .LANCHOR194
 	adrp	x28, .LANCHOR185
@@ -12733,9 +12731,9 @@ FtlVendorPartWrite:
 	and	w19, w19, 65535
 	cmp	w20, w19
 	csel	w19, w0, w19, cc
-	cbz	w2, .L1840
+	cbz	w2, .L1847
 	cmp	w19, w1
-	beq	.L1840
+	beq	.L1847
 	ldr	x0, [x28, #:lo12:.LANCHOR185]
 	str	w2, [x29, 124]
 	mov	w2, 1
@@ -12743,7 +12741,7 @@ FtlVendorPartWrite:
 	mov	w1, w2
 	add	x0, x29, 120
 	bl	FlashReadPages
-.L1841:
+.L1848:
 	lsl	w3, w19, 9
 	ldr	x0, [x28, #:lo12:.LANCHOR185]
 	lsl	w23, w23, 7
@@ -12764,16 +12762,16 @@ FtlVendorPartWrite:
 	ldr	w3, [x29, 108]
 	csinv	w24, w24, wzr, ne
 	add	x25, x25, x3, sxtw
-	b	.L1838
-.L1840:
+	b	.L1845
+.L1847:
 	ldrh	w2, [x27]
 	mov	w1, 0
 	ldr	x0, [x28, #:lo12:.LANCHOR185]
 	bl	ftl_memset
-	b	.L1841
-.L1844:
+	b	.L1848
+.L1851:
 	mov	w24, -1
-	b	.L1836
+	b	.L1843
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.section	.text.Ftl_save_ext_data,"ax",@progbits
 	.align	2
@@ -12786,8 +12784,8 @@ Ftl_save_ext_data:
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1849
-	mov	w0, 73
+	bne	.L1856
+	mov	w0, 80
 	mov	w1, 1
 	movk	w0, 0x5000, lsl 16
 	str	w0, [x2, 4]
@@ -12835,7 +12833,7 @@ Ftl_save_ext_data:
 	str	w0, [x2, 64]
 	mov	w0, 0
 	b	FtlVendorPartWrite
-.L1849:
+.L1856:
 	ret
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
 	.section	.text.FtlEctTblFlush,"ax",@progbits
@@ -12845,31 +12843,31 @@ Ftl_save_ext_data:
 FtlEctTblFlush:
 	adrp	x1, .LANCHOR28
 	ldr	w1, [x1, #:lo12:.LANCHOR28]
-	cbz	w1, .L1856
+	cbz	w1, .L1863
 	adrp	x1, .LANCHOR170
 	mov	w2, 4
 	ldr	w1, [x1, #:lo12:.LANCHOR170]
 	cmp	w1, 39
 	mov	w1, 32
 	csel	w1, w1, w2, hi
-.L1852:
+.L1859:
 	adrp	x3, .LANCHOR218
 	ldrh	w2, [x3, #:lo12:.LANCHOR218]
 	cmp	w2, 31
-	bhi	.L1853
+	bhi	.L1860
 	add	w2, w2, 1
 	mov	w1, 1
 	strh	w2, [x3, #:lo12:.LANCHOR218]
-.L1853:
+.L1860:
 	adrp	x2, .LANCHOR191
-	cbnz	w0, .L1854
+	cbnz	w0, .L1861
 	ldr	x0, [x2, #:lo12:.LANCHOR191]
 	ldr	w3, [x0, 20]
 	ldr	w0, [x0, 16]
 	add	w1, w1, w3
 	cmp	w0, w1
-	bcc	.L1859
-.L1854:
+	bcc	.L1866
+.L1861:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	ldr	x2, [x2, #:lo12:.LANCHOR191]
@@ -12892,10 +12890,10 @@ FtlEctTblFlush:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1856:
+.L1863:
 	mov	w1, 32
-	b	.L1852
-.L1859:
+	b	.L1859
+.L1866:
 	mov	w0, 0
 	ret
 	.size	FtlEctTblFlush, .-FtlEctTblFlush
@@ -12913,8 +12911,8 @@ allocate_new_data_superblock:
 	str	x21, [sp, 32]
 	ldrh	w0, [x0, #:lo12:.LANCHOR40]
 	cmp	w0, w20
-	bcs	.L1862
-	mov	w2, 3289
+	bcs	.L1869
+	mov	w2, 3233
 	adrp	x1, .LANCHOR219
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR219
@@ -12925,99 +12923,99 @@ allocate_new_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1862:
+.L1869:
 	adrp	x0, .LANCHOR77
 	ldr	w0, [x0, #:lo12:.LANCHOR77]
-	cbnz	w0, .L1863
+	cbnz	w0, .L1870
 	mov	w0, 65535
 	cmp	w20, w0
-	beq	.L1864
+	beq	.L1871
 	adrp	x1, .LANCHOR84
 	ubfiz	x0, x20, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR84]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1865
+	cbz	w0, .L1872
 	mov	w0, w20
 	bl	INSERT_DATA_LIST
-.L1864:
+.L1871:
 	strb	wzr, [x19, 8]
 	adrp	x0, .LANCHOR93
 	add	x0, x0, :lo12:.LANCHOR93
 	cmp	x19, x0
-	beq	.L1866
+	beq	.L1873
 	adrp	x0, .LANCHOR44
 	ldrh	w1, [x0, #:lo12:.LANCHOR44]
 	cmp	w1, 1
-	beq	.L1866
+	beq	.L1873
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L1867
-.L1866:
+	cbz	w0, .L1874
+.L1873:
 	mov	w0, 1
 	strb	w0, [x19, 8]
-.L1868:
+.L1875:
 	adrp	x1, .LANCHOR133
 	mov	w2, 65535
 	mov	x21, x1
 	ldrh	w0, [x1, #:lo12:.LANCHOR133]
 	cmp	w0, w2
-	beq	.L1873
+	beq	.L1880
 	cmp	w20, w0
-	bne	.L1874
+	bne	.L1881
 	adrp	x2, .LANCHOR84
 	ubfiz	x1, x0, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR84]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1875
-.L1874:
+	cbz	w1, .L1882
+.L1881:
 	bl	update_vpc_list
-.L1875:
+.L1882:
 	mov	w0, -1
 	strh	w0, [x21, #:lo12:.LANCHOR133]
-.L1873:
+.L1880:
 	mov	x0, x19
 	bl	allocate_data_superblock
 	bl	l2p_flush
 	mov	w0, 0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1863:
+.L1870:
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1865:
+.L1872:
 	mov	w0, w20
 	bl	INSERT_FREE_LIST
-	b	.L1864
-.L1867:
+	b	.L1871
+.L1874:
 	adrp	x0, .LANCHOR92
 	add	x2, x0, :lo12:.LANCHOR92
 	cmp	x19, x2
-	bne	.L1868
+	bne	.L1875
 	cmp	w1, 3
-	beq	.L1870
+	beq	.L1877
 	adrp	x1, .LANCHOR158
 	ldr	w1, [x1, #:lo12:.LANCHOR158]
 	cmp	w1, 1
-	bne	.L1871
-.L1870:
+	bne	.L1878
+.L1877:
 	add	x1, x0, :lo12:.LANCHOR92
 	mov	w2, 1
 	strb	w2, [x1, 8]
-.L1871:
+.L1878:
 	adrp	x1, .LANCHOR28
 	ldr	w1, [x1, #:lo12:.LANCHOR28]
-	cbz	w1, .L1868
+	cbz	w1, .L1875
 	adrp	x1, .LANCHOR170
 	ldr	w1, [x1, #:lo12:.LANCHOR170]
 	cmp	w1, 39
-	bhi	.L1868
+	bhi	.L1875
 	add	x0, x0, :lo12:.LANCHOR92
 	mov	w1, 1
 	strb	w1, [x0, 8]
-	b	.L1868
+	b	.L1875
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
 	.section	.text.FtlVendorPartRead,"ax",@progbits
 	.align	2
@@ -13037,7 +13035,7 @@ FtlVendorPartRead:
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	cmp	w1, w0
-	bhi	.L1898
+	bhi	.L1905
 	adrp	x0, .LANCHOR57
 	adrp	x26, .LANCHOR185
 	mov	x25, x2
@@ -13048,9 +13046,9 @@ FtlVendorPartRead:
 	add	x0, x0, :lo12:.LANCHOR56
 	str	x0, [x29, 104]
 	lsr	w20, w22, w20
-.L1891:
-	cbnz	w21, .L1897
-.L1889:
+.L1898:
+	cbnz	w21, .L1904
+.L1896:
 	mov	w0, w24
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -13059,7 +13057,7 @@ FtlVendorPartRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1897:
+.L1904:
 	adrp	x0, .LANCHOR194
 	ldr	x0, [x0, #:lo12:.LANCHOR194]
 	ldr	w3, [x0, w20, uxtw 2]
@@ -13073,7 +13071,7 @@ FtlVendorPartRead:
 	cmp	w21, w19
 	csel	w19, w0, w19, cc
 	lsl	w27, w19, 9
-	cbz	w3, .L1893
+	cbz	w3, .L1900
 	ldr	x0, [x26, #:lo12:.LANCHOR185]
 	mov	w2, 1
 	str	w3, [x29, 100]
@@ -13089,39 +13087,39 @@ FtlVendorPartRead:
 	csinv	w24, w24, wzr, ne
 	ldr	w0, [x0, #:lo12:.LANCHOR202]
 	cmp	w0, 256
-	bne	.L1895
+	bne	.L1902
 	mov	w2, w3
 	mov	w1, w20
-	adrp	x0, .LC43
-	add	x0, x0, :lo12:.LC43
+	adrp	x0, .LC42
+	add	x0, x0, :lo12:.LC42
 	bl	printf
 	ldr	x2, [x26, #:lo12:.LANCHOR185]
 	adrp	x0, .LANCHOR215
 	mov	w1, w20
 	add	x0, x0, :lo12:.LANCHOR215
 	bl	FtlMapWritePage
-.L1895:
+.L1902:
 	ldr	x1, [x28, #:lo12:.LANCHOR185]
 	lsl	w23, w23, 7
 	mov	w2, w27
 	mov	x0, x25
 	add	x1, x1, x23, sxtw 2
 	bl	ftl_memcpy
-.L1896:
+.L1903:
 	add	w20, w20, 1
 	sub	w21, w21, w19
 	add	w22, w22, w19
 	add	x25, x25, x27, sxtw
-	b	.L1891
-.L1893:
+	b	.L1898
+.L1900:
 	mov	w2, w27
 	mov	w1, 0
 	mov	x0, x25
 	bl	ftl_memset
-	b	.L1896
-.L1898:
+	b	.L1903
+.L1905:
 	mov	w24, -1
-	b	.L1889
+	b	.L1896
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
 	.section	.text.FtlLoadEctTbl,"ax",@progbits
 	.align	2
@@ -13142,10 +13140,10 @@ FtlLoadEctTbl:
 	mov	w0, 17221
 	movk	w0, 0x4254, lsl 16
 	cmp	w1, w0
-	beq	.L1901
-	adrp	x1, .LC44
+	beq	.L1908
+	adrp	x1, .LC43
 	adrp	x0, .LC7
-	add	x1, x1, :lo12:.LC44
+	add	x1, x1, :lo12:.LC43
 	add	x0, x0, :lo12:.LC7
 	bl	printf
 	ldr	x0, [x19, #:lo12:.LANCHOR191]
@@ -13153,7 +13151,7 @@ FtlLoadEctTbl:
 	ldrh	w2, [x20, #:lo12:.LANCHOR190]
 	lsl	w2, w2, 9
 	bl	ftl_memset
-.L1901:
+.L1908:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -13178,18 +13176,18 @@ Ftl_load_ext_data:
 	mov	w20, 19539
 	movk	w20, 0x4654, lsl 16
 	cmp	w0, w20
-	beq	.L1904
+	beq	.L1911
 	mov	w2, 512
 	mov	w1, 0
 	mov	x0, x21
 	bl	ftl_memset
 	str	w20, [x19, #:lo12:.LANCHOR138]
-.L1904:
+.L1911:
 	ldr	w1, [x19, #:lo12:.LANCHOR138]
 	add	x0, x19, :lo12:.LANCHOR138
 	cmp	w1, w20
 	adrp	x20, .LANCHOR168
-	bne	.L1905
+	bne	.L1912
 	adrp	x1, .LANCHOR216
 	ldr	w2, [x0, 88]
 	str	w2, [x1, #:lo12:.LANCHOR216]
@@ -13227,7 +13225,7 @@ Ftl_load_ext_data:
 	ldr	w1, [x0, 60]
 	adrp	x0, .LANCHOR158
 	str	w1, [x0, #:lo12:.LANCHOR158]
-.L1905:
+.L1912:
 	add	x19, x19, :lo12:.LANCHOR138
 	adrp	x0, .LANCHOR157
 	str	wzr, [x0, #:lo12:.LANCHOR157]
@@ -13235,16 +13233,16 @@ Ftl_load_ext_data:
 	ldr	w1, [x19, 68]
 	movk	w0, 0x1234, lsl 16
 	cmp	w1, w0
-	bne	.L1906
+	bne	.L1913
 	adrp	x0, .LANCHOR28
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR28]
-	adrp	x1, .LC45
+	adrp	x1, .LC44
 	adrp	x0, .LC7
-	add	x1, x1, :lo12:.LC45
+	add	x1, x1, :lo12:.LC44
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1906:
+.L1913:
 	adrp	x1, .LANCHOR167
 	adrp	x0, .LANCHOR48
 	ldr	x21, [sp, 32]
@@ -13261,13 +13259,29 @@ Ftl_load_ext_data:
 	str	w0, [x1, #:lo12:.LANCHOR205]
 	ret
 	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
+	.section	.text.ftl_vendor_read,"ax",@progbits
+	.align	2
+	.global	ftl_vendor_read
+	.type	ftl_vendor_read, %function
+ftl_vendor_read:
+	add	w0, w0, 256
+	b	FtlVendorPartRead
+	.size	ftl_vendor_read, .-ftl_vendor_read
+	.section	.text.ftl_sys_read,"ax",@progbits
+	.align	2
+	.global	ftl_sys_read
+	.type	ftl_sys_read, %function
+ftl_sys_read:
+	add	w0, w0, 512
+	b	FtlVendorPartRead
+	.size	ftl_sys_read, .-ftl_sys_read
 	.section	.text.FtlMapBlkWriteDumpData,"ax",@progbits
 	.align	2
 	.global	FtlMapBlkWriteDumpData
 	.type	FtlMapBlkWriteDumpData, %function
 FtlMapBlkWriteDumpData:
 	ldr	w1, [x0, 56]
-	cbz	w1, .L1922
+	cbz	w1, .L1931
 	stp	x29, x30, [sp, -80]!
 	adrp	x1, .LANCHOR77
 	add	x29, sp, 0
@@ -13279,7 +13293,7 @@ FtlMapBlkWriteDumpData:
 	str	x25, [sp, 64]
 	str	wzr, [x0, 56]
 	ldr	x25, [x0, 40]
-	cbnz	w1, .L1908
+	cbnz	w1, .L1917
 	mov	x19, x0
 	adrp	x0, .LANCHOR184
 	adrp	x23, .LANCHOR202
@@ -13291,16 +13305,16 @@ FtlMapBlkWriteDumpData:
 	ldr	x24, [x0, #:lo12:.LANCHOR188]
 	ldrh	w0, [x19, 2]
 	str	x24, [x21, 16]
-	cbz	w0, .L1912
+	cbz	w0, .L1921
 	adrp	x1, .LANCHOR54
 	ldrh	w1, [x1, #:lo12:.LANCHOR54]
 	sub	w1, w1, #1
 	cmp	w0, w1
-	bge	.L1912
+	bge	.L1921
 	ldrh	w1, [x19]
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L1912
+	beq	.L1921
 	ldr	x2, [x19, 16]
 	ubfiz	x1, x1, 1, 16
 	sub	w0, w0, #1
@@ -13313,16 +13327,16 @@ FtlMapBlkWriteDumpData:
 	bl	FlashReadPages
 	ldr	w0, [x23, #:lo12:.LANCHOR202]
 	cmn	w0, #1
-	beq	.L1912
+	beq	.L1921
 	ldrh	w1, [x24, 8]
 	ldr	x2, [x19, 40]
 	ubfiz	x0, x1, 2, 16
 	ldr	w2, [x2, x0]
 	ldr	w0, [x21, 4]
 	cmp	w2, w0
-	bne	.L1912
+	bne	.L1921
 	ldr	x2, [x21, 8]
-.L1925:
+.L1934:
 	mov	x0, x19
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -13330,37 +13344,37 @@ FtlMapBlkWriteDumpData:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	b	FtlMapWritePage
-.L1912:
+.L1921:
 	sub	w20, w20, #1
 	and	w20, w20, 65535
 	ubfiz	x0, x20, 2, 16
 	ldr	w1, [x25, x0]
 	add	x0, x22, :lo12:.LANCHOR202
 	str	w1, [x0, 4]
-	cbz	w1, .L1913
+	cbz	w1, .L1922
 	mov	w2, 1
 	mov	w1, w2
 	bl	FlashReadPages
-.L1914:
+.L1923:
 	add	x22, x22, :lo12:.LANCHOR202
 	mov	w1, w20
 	ldr	x2, [x22, 8]
-	b	.L1925
-.L1913:
+	b	.L1934
+.L1922:
 	adrp	x1, .LANCHOR58
 	ldr	x0, [x0, 8]
 	ldrh	w2, [x1, #:lo12:.LANCHOR58]
 	mov	w1, 255
 	bl	ftl_memset
-	b	.L1914
-.L1908:
+	b	.L1923
+.L1917:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1922:
+.L1931:
 	ret
 	.size	FtlMapBlkWriteDumpData, .-FtlMapBlkWriteDumpData
 	.section	.text.FtlScanSysBlk,"ax",@progbits
@@ -13421,12 +13435,12 @@ FtlScanSysBlk:
 	adrp	x0, .LANCHOR159
 	add	x0, x0, :lo12:.LANCHOR159
 	str	x0, [x29, 112]
-.L1927:
+.L1936:
 	ldr	x0, [x29, 120]
 	ldr	w1, [x29, 172]
 	ldrh	w0, [x0]
 	cmp	w0, w1
-	bls	.L1968
+	bls	.L1977
 	adrp	x0, .LANCHOR38
 	adrp	x25, .LANCHOR180
 	adrp	x6, .LANCHOR47
@@ -13442,14 +13456,14 @@ FtlScanSysBlk:
 	ldr	x11, [x0, #:lo12:.LANCHOR106]
 	adrp	x0, .LANCHOR59
 	ldrh	w10, [x0, #:lo12:.LANCHOR59]
-	b	.L1969
-.L1929:
+	b	.L1978
+.L1938:
 	ldrh	w1, [x29, 172]
 	ldrb	w0, [x6, x5]
 	bl	V2P_block
 	and	w4, w0, 65535
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L1928
+	cbnz	w0, .L1937
 	umaddl	x1, w22, w8, x7
 	lsl	w4, w4, 10
 	mul	w0, w22, w10
@@ -13459,19 +13473,19 @@ FtlScanSysBlk:
 	str	w4, [x1, 4]
 	add	x0, x11, x0, sxtw 2
 	stp	x12, x0, [x1, 8]
-.L1928:
+.L1937:
 	add	x5, x5, 1
-.L1969:
+.L1978:
 	cmp	w13, w5, uxth
-	bhi	.L1929
-	cbnz	w22, .L1930
-.L1967:
+	bhi	.L1938
+	cbnz	w22, .L1939
+.L1976:
 	ldr	w0, [x29, 172]
 	add	w26, w0, 1
 	and	w0, w26, 65535
 	str	w0, [x29, 172]
-	b	.L1927
-.L1930:
+	b	.L1936
+.L1939:
 	mov	w1, w22
 	mov	w2, 1
 	mov	x0, x7
@@ -13483,7 +13497,7 @@ FtlScanSysBlk:
 	adrp	x0, .LANCHOR220
 	add	x0, x0, :lo12:.LANCHOR220
 	str	x0, [x29, 136]
-.L1966:
+.L1975:
 	ldr	x0, [x25, #:lo12:.LANCHOR180]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
@@ -13491,10 +13505,10 @@ FtlScanSysBlk:
 	cmn	w0, #1
 	ldr	x27, [x1, 16]
 	ubfx	x26, x3, 10, 16
-	bne	.L1933
+	bne	.L1942
 	mov	w5, 16
 	mov	w7, 65535
-.L1935:
+.L1944:
 	ldr	x0, [x25, #:lo12:.LANCHOR180]
 	add	x6, x25, :lo12:.LANCHOR180
 	mov	w2, 1
@@ -13512,71 +13526,71 @@ FtlScanSysBlk:
 	ldr	w5, [x29, 168]
 	cmp	w0, w7
 	ldr	x6, [x29, 104]
-	bne	.L1932
+	bne	.L1941
 	ldr	x0, [x6]
 	mov	w1, -1
 	str	w1, [x0, x22]
 	ldr	x0, [x6]
 	ldr	w0, [x0, x22]
 	cmp	w0, w1
-	beq	.L2005
-.L1933:
+	beq	.L2014
+.L1942:
 	adrp	x0, .LANCHOR159
 	ldr	w1, [x0, #:lo12:.LANCHOR159]
 	ldr	w0, [x27, 4]
 	cmn	w1, #1
-	beq	.L1936
+	beq	.L1945
 	cmp	w1, w0
-	bhi	.L1937
-.L1936:
+	bhi	.L1946
+.L1945:
 	cmn	w0, #1
-	beq	.L1937
+	beq	.L1946
 	ldr	x2, [x29, 112]
 	add	w1, w0, 1
 	str	w1, [x2]
-.L1937:
+.L1946:
 	ldrh	w1, [x27]
 	mov	w2, 61604
 	cmp	w1, w2
-	beq	.L1939
-	bhi	.L1940
+	beq	.L1948
+	bhi	.L1949
 	mov	w0, 61574
 	cmp	w1, w0
-	beq	.L1941
-.L1938:
+	beq	.L1950
+.L1947:
 	ldr	x0, [x29, 128]
 	add	x22, x22, 56
 	cmp	x0, x22
-	bne	.L1966
-	b	.L1967
-.L1932:
+	bne	.L1975
+	b	.L1976
+.L1941:
 	ldr	x0, [x25, #:lo12:.LANCHOR180]
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	bne	.L1933
+	bne	.L1942
 	sub	w5, w5, #1
 	ands	w5, w5, 65535
-	bne	.L1935
-.L2005:
+	bne	.L1944
+.L2014:
 	mov	w1, 0
 	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-	b	.L1938
-.L1940:
+	b	.L1947
+.L1949:
 	mov	w0, 61634
 	cmp	w1, w0
-	beq	.L1942
+	beq	.L1951
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L2005
-	b	.L1938
-.L1942:
+	beq	.L2014
+	b	.L1947
+.L1951:
 	ldrh	w1, [x20, #:lo12:.LANCHOR128]
 	ldr	w0, [x21, #:lo12:.LANCHOR65]
 	cmp	w1, w0
-	bls	.L1944
+	bls	.L1953
 	ldr	x1, [x29, 136]
-	mov	w2, 1308
+	mov	w2, 1297
 	adrp	x0, .LC5
 	add	x0, x0, :lo12:.LC5
 	bl	printf
@@ -13585,7 +13599,7 @@ FtlScanSysBlk:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1944:
+.L1953:
 	ldr	w6, [x21, #:lo12:.LANCHOR65]
 	ldr	x3, [x29, 152]
 	ldrh	w1, [x20, #:lo12:.LANCHOR128]
@@ -13596,53 +13610,53 @@ FtlScanSysBlk:
 	sub	w2, w2, #1
 	ldr	x5, [x3, #:lo12:.LANCHOR130]
 	sxth	w2, w2
-.L1945:
+.L1954:
 	cmp	w0, w2
-	bgt	.L1951
-	tbz	w0, #31, .L1986
-	b	.L1938
-.L1951:
+	bgt	.L1960
+	tbz	w0, #31, .L1995
+	b	.L1947
+.L1960:
 	sxtw	x8, w0
 	ldr	w11, [x27, 4]
 	lsl	x7, x8, 2
 	add	x10, x5, x7
 	ldr	w7, [x5, x7]
 	cmp	w11, w7
-	bls	.L1946
+	bls	.L1955
 	ldr	w2, [x5]
-	cbnz	w2, .L1947
+	cbnz	w2, .L1956
 	cmp	w6, w1
-	beq	.L1947
+	beq	.L1956
 	add	w1, w1, 1
 	strh	w1, [x20, #:lo12:.LANCHOR128]
-.L1947:
+.L1956:
 	ldr	x1, [x29, 160]
 	ldr	x6, [x1, #:lo12:.LANCHOR129]
 	mov	w1, 0
-.L1948:
+.L1957:
 	cmp	w1, w0
-	bne	.L1949
+	bne	.L1958
 	ldr	w1, [x27, 4]
 	str	w1, [x10]
 	strh	w26, [x6, x8, lsl 1]
-	tbnz	w0, #31, .L1938
+	tbnz	w0, #31, .L1947
 	ldrh	w1, [x20, #:lo12:.LANCHOR128]
 	ldr	w2, [x21, #:lo12:.LANCHOR65]
 	sub	w2, w2, w1
 	sub	w2, w2, #1
 	cmp	w0, w2, sxth
-	bgt	.L1938
-.L1986:
+	bgt	.L1947
+.L1995:
 	add	w1, w1, 1
 	strh	w1, [x20, #:lo12:.LANCHOR128]
 	ldr	w1, [x27, 4]
 	str	w1, [x5, x0, lsl 2]
 	ldr	x1, [x29, 160]
 	ldr	x1, [x1, #:lo12:.LANCHOR129]
-.L2004:
+.L2013:
 	strh	w26, [x1, x0, lsl 1]
-	b	.L1938
-.L1949:
+	b	.L1947
+.L1958:
 	sxtw	x2, w1
 	add	w1, w1, 1
 	lsl	x7, x2, 2
@@ -13654,18 +13668,18 @@ FtlScanSysBlk:
 	add	x7, x6, x2
 	ldrh	w7, [x7, 2]
 	strh	w7, [x6, x2]
-	b	.L1948
-.L1946:
+	b	.L1957
+.L1955:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L1945
-.L1941:
+	b	.L1954
+.L1950:
 	ldrh	w1, [x23, #:lo12:.LANCHOR71]
 	ldrh	w0, [x19, #:lo12:.LANCHOR62]
 	cmp	w1, w0
-	bls	.L1954
+	bls	.L1963
 	ldr	x1, [x29, 136]
-	mov	w2, 1355
+	mov	w2, 1344
 	adrp	x0, .LC5
 	add	x0, x0, :lo12:.LC5
 	bl	printf
@@ -13674,7 +13688,7 @@ FtlScanSysBlk:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1954:
+.L1963:
 	ldrh	w6, [x19, #:lo12:.LANCHOR62]
 	ldrh	w2, [x23, #:lo12:.LANCHOR71]
 	sub	w1, w6, #1
@@ -13682,46 +13696,46 @@ FtlScanSysBlk:
 	sub	w5, w1, w2
 	ldr	x1, [x29, 144]
 	ldr	x1, [x1, #:lo12:.LANCHOR193]
-.L1955:
+.L1964:
 	cmp	w0, w5
-	ble	.L1960
+	ble	.L1969
 	sxtw	x7, w0
 	ldr	w11, [x27, 4]
 	lsl	x8, x7, 2
 	add	x10, x1, x8
 	ldr	w8, [x1, x8]
 	cmp	w11, w8
-	bls	.L1956
+	bls	.L1965
 	ldr	w5, [x1]
-	cbnz	w5, .L1957
+	cbnz	w5, .L1966
 	cmp	w6, w2
-	beq	.L1957
+	beq	.L1966
 	add	w2, w2, 1
 	strh	w2, [x23, #:lo12:.LANCHOR71]
-.L1957:
+.L1966:
 	ldr	x6, [x28, #:lo12:.LANCHOR72]
 	mov	w2, 0
-.L1958:
+.L1967:
 	cmp	w2, w0
-	bne	.L1959
+	bne	.L1968
 	ldr	w2, [x27, 4]
 	str	w2, [x10]
 	strh	w26, [x6, x7, lsl 1]
-.L1960:
-	tbnz	w0, #31, .L1938
+.L1969:
+	tbnz	w0, #31, .L1947
 	ldrh	w2, [x19, #:lo12:.LANCHOR62]
 	ldrh	w5, [x23, #:lo12:.LANCHOR71]
 	sub	w2, w2, #1
 	sub	w2, w2, w5
 	cmp	w0, w2, sxth
-	bgt	.L1938
+	bgt	.L1947
 	add	w5, w5, 1
 	ldr	w2, [x27, 4]
 	strh	w5, [x23, #:lo12:.LANCHOR71]
 	str	w2, [x1, x0, lsl 2]
 	ldr	x1, [x28, #:lo12:.LANCHOR72]
-	b	.L2004
-.L1959:
+	b	.L2013
+.L1968:
 	sxtw	x5, w2
 	add	w2, w2, 1
 	lsl	x8, x5, 2
@@ -13733,55 +13747,55 @@ FtlScanSysBlk:
 	add	x8, x6, x5
 	ldrh	w8, [x8, 2]
 	strh	w8, [x6, x5]
-	b	.L1958
-.L1956:
+	b	.L1967
+.L1965:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L1955
-.L1939:
+	b	.L1964
+.L1948:
 	ldrh	w5, [x24, #:lo12:.LANCHOR209]
 	mov	w1, 65535
 	add	x2, x24, :lo12:.LANCHOR209
 	cmp	w5, w1
-	bne	.L1962
+	bne	.L1971
 	strh	w26, [x24, #:lo12:.LANCHOR209]
 	str	w0, [x2, 8]
-	b	.L1938
-.L1962:
+	b	.L1947
+.L1971:
 	ldrh	w0, [x2, 4]
 	cmp	w0, w1
-	beq	.L1963
+	beq	.L1972
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.L1963:
+.L1972:
 	add	x0, x24, :lo12:.LANCHOR209
 	ldr	w1, [x27, 4]
 	ldr	w2, [x0, 8]
 	cmp	w2, w1
-	bcs	.L1964
+	bcs	.L1973
 	ldrh	w2, [x24, #:lo12:.LANCHOR209]
 	strh	w2, [x0, 4]
 	strh	w26, [x24, #:lo12:.LANCHOR209]
 	str	w1, [x0, 8]
-	b	.L1938
-.L1964:
+	b	.L1947
+.L1973:
 	strh	w26, [x0, 4]
-	b	.L1938
-.L1968:
+	b	.L1947
+.L1977:
 	ldr	x0, [x29, 160]
 	ldr	x2, [x0, #:lo12:.LANCHOR129]
 	ldrh	w0, [x2]
-	cbz	w0, .L1970
-.L1973:
+	cbz	w0, .L1979
+.L1982:
 	ldr	x1, [x28, #:lo12:.LANCHOR72]
 	ldrh	w0, [x1]
-	cbz	w0, .L1971
-.L1972:
+	cbz	w0, .L1980
+.L1981:
 	ldrh	w1, [x20, #:lo12:.LANCHOR128]
 	ldr	w0, [x21, #:lo12:.LANCHOR65]
 	cmp	w1, w0
-	bls	.L2002
-	mov	w2, 1489
+	bls	.L2011
+	mov	w2, 1478
 	adrp	x1, .LANCHOR220
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR220
@@ -13792,7 +13806,7 @@ FtlScanSysBlk:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2002:
+.L2011:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -13801,24 +13815,24 @@ FtlScanSysBlk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1970:
+.L1979:
 	ldrh	w0, [x20, #:lo12:.LANCHOR128]
-	cbz	w0, .L1973
+	cbz	w0, .L1982
 	ldr	w1, [x21, #:lo12:.LANCHOR65]
 	mov	w0, 0
-.L1974:
+.L1983:
 	cmp	w0, w1
-	bcs	.L1973
+	bcs	.L1982
 	ldrh	w3, [x2, w0, sxtw 1]
-	cbz	w3, .L1975
+	cbz	w3, .L1984
 	ldr	x1, [x29, 152]
 	add	x7, x21, :lo12:.LANCHOR65
 	ldr	x4, [x1, #:lo12:.LANCHOR130]
 	mov	w1, w0
-.L1976:
+.L1985:
 	ldr	w3, [x7]
 	cmp	w1, w3
-	bcs	.L1973
+	bcs	.L1982
 	sxtw	x6, w1
 	sub	w3, w1, w0
 	lsl	x5, x6, 1
@@ -13830,29 +13844,29 @@ FtlScanSysBlk:
 	strh	w8, [x2, x3, lsl 1]
 	str	w6, [x4, x3, lsl 2]
 	strh	wzr, [x2, x5]
-	b	.L1976
-.L1975:
+	b	.L1985
+.L1984:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L1974
-.L1971:
+	b	.L1983
+.L1980:
 	ldrh	w0, [x23, #:lo12:.LANCHOR71]
-	cbz	w0, .L1972
+	cbz	w0, .L1981
 	ldrh	w2, [x19, #:lo12:.LANCHOR62]
 	mov	w0, 0
-.L1981:
+.L1990:
 	mov	w6, w0
 	cmp	w0, w2
-	bge	.L1972
+	bge	.L1981
 	ldrh	w3, [x1, w0, sxtw 1]
-	cbz	w3, .L1982
+	cbz	w3, .L1991
 	ldr	x2, [x29, 144]
 	add	x19, x19, :lo12:.LANCHOR62
 	ldr	x3, [x2, #:lo12:.LANCHOR193]
-.L1983:
+.L1992:
 	ldrh	w2, [x19]
 	cmp	w0, w2
-	bge	.L1972
+	bge	.L1981
 	sxtw	x5, w0
 	sub	w2, w0, w6
 	lsl	x4, x5, 1
@@ -13864,11 +13878,11 @@ FtlScanSysBlk:
 	strh	w7, [x1, x2, lsl 1]
 	str	w5, [x3, x2, lsl 2]
 	strh	wzr, [x1, x4]
-	b	.L1983
-.L1982:
+	b	.L1992
+.L1991:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L1981
+	b	.L1990
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
 	.section	.text.FtlLoadSysInfo,"ax",@progbits
 	.align	2
@@ -13901,10 +13915,10 @@ FtlLoadSysInfo:
 	ldrh	w0, [x21, #:lo12:.LANCHOR209]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L2007
-.L2016:
+	bne	.L2016
+.L2025:
 	mov	w0, -1
-.L2006:
+.L2015:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -13912,7 +13926,7 @@ FtlLoadSysInfo:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2007:
+.L2016:
 	add	x27, x21, :lo12:.LANCHOR209
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
@@ -13922,9 +13936,9 @@ FtlLoadSysInfo:
 	strh	w0, [x27, 2]
 	mov	w27, 19539
 	movk	w27, 0x4654, lsl 16
-.L2009:
-	tbz	w23, #31, .L2012
-	mov	w2, 1549
+.L2018:
+	tbz	w23, #31, .L2021
+	mov	w2, 1538
 	adrp	x1, .LANCHOR221
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR221
@@ -13935,14 +13949,14 @@ FtlLoadSysInfo:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2011:
+.L2020:
 	adrp	x1, .LANCHOR58
 	ldrh	w0, [x22, #:lo12:.LANCHOR40]
 	ldrh	w1, [x1, #:lo12:.LANCHOR58]
 	add	x0, x0, 24
 	cmp	x1, x0, lsl 1
-	bcs	.L2014
-	mov	w2, 1551
+	bcs	.L2023
+	mov	w2, 1540
 	adrp	x1, .LANCHOR221
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR221
@@ -13953,7 +13967,7 @@ FtlLoadSysInfo:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2014:
+.L2023:
 	add	x19, x19, :lo12:.LANCHOR202
 	mov	w2, 48
 	adrp	x20, .LANCHOR81
@@ -13979,7 +13993,7 @@ FtlLoadSysInfo:
 	bl	ftl_memcpy
 	adrp	x0, .LANCHOR70
 	ldrh	w0, [x0, #:lo12:.LANCHOR70]
-	cbz	w0, .L2015
+	cbz	w0, .L2024
 	ldrh	w1, [x22, #:lo12:.LANCHOR40]
 	adrp	x0, .LANCHOR67
 	ldrh	w2, [x0, #:lo12:.LANCHOR67]
@@ -13993,13 +14007,13 @@ FtlLoadSysInfo:
 	adrp	x0, .LANCHOR195
 	ldr	x0, [x0, #:lo12:.LANCHOR195]
 	bl	ftl_memcpy
-.L2015:
+.L2024:
 	ldr	w2, [x20, #:lo12:.LANCHOR81]
 	mov	w1, 19539
 	movk	w1, 0x4654, lsl 16
 	add	x0, x20, :lo12:.LANCHOR81
 	cmp	w2, w1
-	bne	.L2016
+	bne	.L2025
 	add	x21, x21, :lo12:.LANCHOR209
 	ldrh	w1, [x0, 8]
 	ldrb	w2, [x0, 10]
@@ -14007,7 +14021,7 @@ FtlLoadSysInfo:
 	strh	w1, [x21, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR45]
 	cmp	w2, w0
-	bne	.L2016
+	bne	.L2025
 	adrp	x0, .LANCHOR222
 	adrp	x2, .LANCHOR73
 	adrp	x3, .LANCHOR38
@@ -14032,8 +14046,8 @@ FtlLoadSysInfo:
 	udiv	w0, w0, w3
 	adrp	x3, .LANCHOR223
 	strh	w0, [x3, #:lo12:.LANCHOR223]
-	bls	.L2017
-	mov	w2, 1578
+	bls	.L2026
+	mov	w2, 1567
 	adrp	x1, .LANCHOR221
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR221
@@ -14044,7 +14058,7 @@ FtlLoadSysInfo:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2017:
+.L2026:
 	add	x1, x20, :lo12:.LANCHOR81
 	adrp	x0, .LANCHOR92
 	add	x3, x0, :lo12:.LANCHOR92
@@ -14109,47 +14123,47 @@ FtlLoadSysInfo:
 	adrp	x1, .LANCHOR159
 	ldr	w5, [x1, #:lo12:.LANCHOR159]
 	cmp	w3, w5
-	bls	.L2018
+	bls	.L2027
 	str	w3, [x1, #:lo12:.LANCHOR159]
-.L2018:
+.L2027:
 	add	x20, x20, :lo12:.LANCHOR81
 	adrp	x1, .LANCHOR160
 	ldr	w3, [x1, #:lo12:.LANCHOR160]
 	ldr	w2, [x20, 36]
 	cmp	w2, w3
-	bls	.L2019
+	bls	.L2028
 	str	w2, [x1, #:lo12:.LANCHOR160]
-.L2019:
+.L2028:
 	mov	w1, 65535
 	cmp	w6, w1
-	beq	.L2020
+	beq	.L2029
 	add	x0, x0, :lo12:.LANCHOR92
 	bl	make_superblock
-.L2020:
+.L2029:
 	ldrh	w2, [x21, #:lo12:.LANCHOR93]
 	mov	w1, 65535
 	add	x0, x21, :lo12:.LANCHOR93
 	cmp	w2, w1
-	beq	.L2021
+	beq	.L2030
 	bl	make_superblock
-.L2021:
+.L2030:
 	ldrh	w2, [x22, #:lo12:.LANCHOR94]
 	mov	w1, 65535
 	add	x0, x22, :lo12:.LANCHOR94
 	cmp	w2, w1
-	beq	.L2022
+	beq	.L2031
 	bl	make_superblock
-.L2022:
+.L2031:
 	ldrh	w2, [x19, #:lo12:.LANCHOR204]
 	mov	w1, 65535
 	add	x0, x19, :lo12:.LANCHOR204
 	cmp	w2, w1
-	beq	.L2023
+	beq	.L2032
 	bl	make_superblock
-.L2023:
+.L2032:
 	mov	w0, 0
-	b	.L2006
-.L2012:
+	b	.L2015
+.L2021:
 	ldrh	w0, [x21, #:lo12:.LANCHOR209]
 	mov	w2, 1
 	mov	w1, w2
@@ -14161,19 +14175,19 @@ FtlLoadSysInfo:
 	bl	FlashReadPages
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L2010
+	beq	.L2019
 	ldr	x0, [x24, #:lo12:.LANCHOR183]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L2010
+	bne	.L2019
 	ldr	x0, [x26, #:lo12:.LANCHOR188]
 	ldrh	w0, [x0]
 	cmp	w0, w28
-	beq	.L2011
-.L2010:
+	beq	.L2020
+.L2019:
 	sub	w23, w23, #1
 	sxth	w23, w23
-	b	.L2009
+	b	.L2018
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
 	.section	.text.FtlDumpBlockInfo,"ax",@progbits
 	.align	2
@@ -14196,44 +14210,44 @@ FtlDumpBlockInfo:
 	ldrh	w25, [x19, #:lo12:.LANCHOR53]
 	and	w21, w0, 65535
 	adrp	x1, .LANCHOR224
-	adrp	x0, .LC46
+	adrp	x0, .LC45
 	add	x1, x1, :lo12:.LANCHOR224
-	add	x0, x0, :lo12:.LC46
+	add	x0, x0, :lo12:.LC45
 	bl	printf
 	adrp	x1, .LANCHOR84
 	ubfiz	x0, x21, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR84]
 	ldrh	w2, [x1, x0]
 	mov	w1, w21
-	adrp	x0, .LC47
-	add	x0, x0, :lo12:.LC47
+	adrp	x0, .LC46
+	add	x0, x0, :lo12:.LC46
 	bl	printf
 	strh	w21, [x23, -48]!
 	mov	x0, x23
 	bl	make_superblock
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L2042
-	cbnz	w22, .L2042
+	cbz	w0, .L2051
+	cbnz	w22, .L2051
 	mov	w0, w21
 	bl	ftl_get_blk_mode
 	mov	w21, w0
 	cmp	w0, 1
-	bne	.L2033
+	bne	.L2042
 	adrp	x0, .LANCHOR54
 	ldrh	w25, [x0, #:lo12:.LANCHOR54]
-.L2033:
+.L2042:
 	ldrh	w3, [x19, #:lo12:.LANCHOR53]
-	adrp	x26, .LC49
-	add	x26, x26, :lo12:.LC49
+	adrp	x26, .LC48
+	add	x26, x26, :lo12:.LC48
 	mov	w20, 0
 	mov	w27, 56
 	mov	w2, w25
 	mov	w1, w21
-	adrp	x0, .LC48
-	add	x0, x0, :lo12:.LC48
+	adrp	x0, .LC47
+	add	x0, x0, :lo12:.LC47
 	bl	printf
-.L2034:
+.L2043:
 	adrp	x1, .LANCHOR105
 	adrp	x0, .LANCHOR38
 	adrp	x24, .LANCHOR180
@@ -14250,22 +14264,22 @@ FtlDumpBlockInfo:
 	adrp	x1, .LANCHOR59
 	ldrh	w10, [x1, #:lo12:.LANCHOR59]
 	mov	w1, 0
-.L2035:
+.L2044:
 	cmp	w1, w5
-	bne	.L2037
+	bne	.L2046
 	mov	w1, w19
 	umull	x19, w19, w27
 	mov	x22, 0
 	mov	w2, w21
 	bl	FlashReadPages
-.L2038:
+.L2047:
 	cmp	x22, x19
-	bne	.L2039
+	bne	.L2048
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	cmp	w25, w20
-	bne	.L2034
-.L2040:
+	bne	.L2043
+.L2049:
 	ldp	x19, x20, [sp, 32]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 48]
@@ -14275,13 +14289,13 @@ FtlDumpBlockInfo:
 	ldr	x27, [sp, 96]
 	add	sp, sp, 160
 	ret
-.L2042:
+.L2051:
 	mov	w21, 0
-	b	.L2033
-.L2037:
+	b	.L2042
+.L2046:
 	ldrh	w2, [x3]
 	cmp	w2, w11
-	beq	.L2036
+	beq	.L2045
 	umaddl	x4, w19, w27, x0
 	orr	w2, w20, w2, lsl 10
 	str	w2, [x4, 4]
@@ -14295,12 +14309,12 @@ FtlDumpBlockInfo:
 	asr	w2, w2, 2
 	add	x2, x8, x2, sxtw 2
 	str	x2, [x4, 16]
-.L2036:
+.L2045:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	and	w1, w1, 65535
-	b	.L2035
-.L2039:
+	b	.L2044
+.L2048:
 	ldr	x8, [x24, #:lo12:.LANCHOR180]
 	ldrh	w1, [x29, 96]
 	add	x2, x8, x22
@@ -14316,7 +14330,7 @@ FtlDumpBlockInfo:
 	ldr	w2, [x8, x22]
 	add	x22, x22, 56
 	bl	printf
-	b	.L2038
+	b	.L2047
 	.size	FtlDumpBlockInfo, .-FtlDumpBlockInfo
 	.section	.text.FtlScanAllBlock,"ax",@progbits
 	.align	2
@@ -14325,25 +14339,25 @@ FtlDumpBlockInfo:
 FtlScanAllBlock:
 	sub	sp, sp, #144
 	adrp	x1, .LANCHOR225
-	adrp	x0, .LC46
+	adrp	x0, .LC45
 	add	x1, x1, :lo12:.LANCHOR225
-	add	x0, x0, :lo12:.LC46
+	add	x0, x0, :lo12:.LC45
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x23, x24, [sp, 64]
 	adrp	x23, .LANCHOR41
 	stp	x19, x20, [sp, 32]
-	adrp	x24, .LC51
+	adrp	x24, .LC50
 	stp	x21, x22, [sp, 48]
 	mov	w20, 0
 	add	x23, x23, :lo12:.LANCHOR41
-	add	x24, x24, :lo12:.LC51
+	add	x24, x24, :lo12:.LC50
 	str	x25, [sp, 80]
 	bl	printf
-.L2046:
+.L2055:
 	ldrh	w0, [x23]
 	cmp	w0, w20
-	bhi	.L2054
+	bhi	.L2063
 	ldp	x19, x20, [sp, 32]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 48]
@@ -14352,15 +14366,15 @@ FtlScanAllBlock:
 	ldr	x25, [sp, 80]
 	add	sp, sp, 144
 	ret
-.L2054:
+.L2063:
 	strh	w20, [x29, 80]
 	mov	w0, w20
 	bl	ftl_get_blk_mode
 	mov	w3, w0
 	adrp	x2, .LANCHOR84
 	ubfiz	x1, x20, 1, 16
-	adrp	x0, .LC50
-	add	x0, x0, :lo12:.LC50
+	adrp	x0, .LC49
+	add	x0, x0, :lo12:.LC49
 	ldr	x2, [x2, #:lo12:.LANCHOR84]
 	adrp	x22, .LANCHOR180
 	mov	w19, 0
@@ -14384,35 +14398,35 @@ FtlScanAllBlock:
 	adrp	x1, .LANCHOR59
 	ldrh	w10, [x1, #:lo12:.LANCHOR59]
 	mov	w1, 0
-.L2047:
+.L2056:
 	cmp	w1, w5
-	bne	.L2049
+	bne	.L2058
 	mov	w25, 56
 	mov	x21, 0
 	mov	w2, 0
 	mov	w1, w19
 	umull	x25, w19, w25
 	bl	FlashReadPages
-.L2050:
+.L2059:
 	cmp	x21, x25
-	bne	.L2051
+	bne	.L2060
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
-	adrp	x25, .LC52
-	add	x25, x25, :lo12:.LC52
+	adrp	x25, .LC51
+	add	x25, x25, :lo12:.LC51
 	mov	w1, w19
 	mov	x19, 0
 	mov	w2, 1
 	bl	FlashReadPages
-.L2052:
+.L2061:
 	cmp	x21, x19
-	bne	.L2053
+	bne	.L2062
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2046
-.L2049:
+	b	.L2055
+.L2058:
 	ldrh	w2, [x3]
 	cmp	w2, w11
-	beq	.L2048
+	beq	.L2057
 	umaddl	x4, w19, w12, x0
 	lsl	w2, w2, 10
 	str	w2, [x4, 4]
@@ -14426,12 +14440,12 @@ FtlScanAllBlock:
 	asr	w2, w2, 2
 	add	x2, x8, x2, sxtw 2
 	str	x2, [x4, 16]
-.L2048:
+.L2057:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	and	w1, w1, 65535
-	b	.L2047
-.L2051:
+	b	.L2056
+.L2060:
 	ldr	x8, [x22, #:lo12:.LANCHOR180]
 	ldrh	w1, [x29, 80]
 	add	x2, x8, x21
@@ -14447,8 +14461,8 @@ FtlScanAllBlock:
 	ldr	w2, [x8, x21]
 	add	x21, x21, 56
 	bl	printf
-	b	.L2050
-.L2053:
+	b	.L2059
+.L2062:
 	ldr	x8, [x22, #:lo12:.LANCHOR180]
 	ldrh	w1, [x29, 80]
 	add	x2, x8, x19
@@ -14464,7 +14478,7 @@ FtlScanAllBlock:
 	ldr	w2, [x8, x19]
 	add	x19, x19, 56
 	bl	printf
-	b	.L2052
+	b	.L2061
 	.size	FtlScanAllBlock, .-FtlScanAllBlock
 	.section	.text.FtlMapTblRecovery,"ax",@progbits
 	.align	2
@@ -14514,14 +14528,14 @@ FtlMapTblRecovery:
 	str	w0, [x29, 136]
 	add	x0, x24, :lo12:.LANCHOR54
 	str	x0, [x29, 112]
-.L2057:
+.L2066:
 	ldr	w0, [x29, 140]
 	cmp	w27, w0
-	bge	.L2075
+	bge	.L2083
 	ldr	w0, [x29, 136]
 	sxtw	x28, w27
 	cmp	w27, w0
-	bne	.L2058
+	bne	.L2067
 	lsl	x0, x28, 1
 	mov	w1, 1
 	add	x24, x22, x0
@@ -14537,20 +14551,20 @@ FtlMapTblRecovery:
 	str	w0, [x19, 48]
 	ldr	x0, [x29, 120]
 	add	x20, x0, :lo12:.LANCHOR202
-.L2059:
+.L2068:
 	cmp	w22, w26
-	ble	.L2062
-.L2075:
+	ble	.L2070
+.L2083:
 	mov	x0, x19
 	bl	ftl_free_no_use_map_blk
 	adrp	x0, .LANCHOR54
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x0, #:lo12:.LANCHOR54]
 	cmp	w1, w0
-	bne	.L2064
+	bne	.L2072
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L2064:
+.L2072:
 	mov	x0, x19
 	bl	ftl_map_blk_gc
 	mov	x0, x19
@@ -14563,7 +14577,7 @@ FtlMapTblRecovery:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L2062:
+.L2070:
 	ldrh	w0, [x24]
 	mov	w2, 1
 	mov	w1, w2
@@ -14573,26 +14587,22 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L2060
+	beq	.L2069
 	ldrh	w0, [x25, 8]
 	cmp	w23, w0
-	bls	.L2061
+	bls	.L2069
 	ldrh	w2, [x25]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
-	bne	.L2061
+	bne	.L2069
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x20, 4]
 	str	w1, [x21, x0]
-.L2061:
+.L2069:
 	add	w22, w22, 1
 	sxth	w22, w22
-	b	.L2059
-.L2060:
-	ldrh	w0, [x24]
-	strh	w0, [x19, 60]
-	b	.L2061
-.L2058:
+	b	.L2068
+.L2067:
 	ldr	x0, [x26, #:lo12:.LANCHOR183]
 	mov	w2, 1
 	str	x0, [x20, 8]
@@ -14608,22 +14618,22 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L2077
+	beq	.L2085
 	ldrh	w1, [x25]
 	ldrh	w0, [x19, 4]
 	cmp	w1, w0
-	bne	.L2077
+	bne	.L2085
 	ldrh	w1, [x25, 8]
 	mov	w0, 64245
 	cmp	w1, w0
-	beq	.L2066
-.L2077:
+	beq	.L2074
+.L2085:
 	mov	w5, 0
-.L2067:
+.L2075:
 	ldr	x0, [x29, 112]
 	ldrh	w0, [x0]
 	cmp	w5, w0
-	bge	.L2073
+	bge	.L2081
 	ldrh	w0, [x28]
 	mov	w2, 1
 	str	w5, [x29, 108]
@@ -14635,48 +14645,48 @@ FtlMapTblRecovery:
 	ldr	w0, [x20]
 	ldr	w5, [x29, 108]
 	cmn	w0, #1
-	beq	.L2071
+	beq	.L2079
 	ldrh	w0, [x25, 8]
 	cmp	w23, w0
-	bls	.L2071
+	bls	.L2079
 	ldrh	w2, [x25]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
-	bne	.L2071
+	bne	.L2079
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x20, 4]
 	str	w1, [x21, x0]
-.L2071:
+.L2079:
 	add	w5, w5, 1
 	sxth	w5, w5
-	b	.L2067
-.L2066:
+	b	.L2075
+.L2074:
 	ldrh	w5, [x24, #:lo12:.LANCHOR54]
 	mov	w0, 0
 	ldr	x10, [x26, #:lo12:.LANCHOR183]
 	sub	w5, w5, #1
-.L2068:
+.L2076:
 	cmp	w0, w5
-	blt	.L2070
-.L2073:
+	blt	.L2078
+.L2081:
 	add	w4, w27, 1
 	sxth	w27, w4
-	b	.L2057
-.L2070:
+	b	.L2066
+.L2078:
 	lsl	w2, w0, 1
 	sxtw	x2, w2
 	lsl	x1, x2, 2
 	ldrh	w1, [x10, x1]
 	cmp	w23, w1
-	bls	.L2069
+	bls	.L2077
 	add	x2, x2, 1
 	ubfiz	x1, x1, 2, 16
 	ldr	w2, [x10, x2, lsl 2]
 	str	w2, [x21, x1]
-.L2069:
+.L2077:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L2068
+	b	.L2076
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
 	.section	.text.FtlLoadVonderInfo,"ax",@progbits
 	.align	2
@@ -14710,8 +14720,6 @@ FtlLoadVonderInfo:
 	adrp	x1, .LANCHOR194
 	ldr	x1, [x1, #:lo12:.LANCHOR194]
 	str	x1, [x0, 40]
-	mov	w1, -1
-	strh	w1, [x0, 60]
 	bl	FtlMapTblRecovery
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
@@ -14749,30 +14757,30 @@ FtlGcScanTempBlk:
 	stp	x25, x26, [sp, 64]
 	cmp	w19, w0
 	stp	x27, x28, [sp, 80]
-	beq	.L2104
-	cbnz	w19, .L2087
-.L2088:
+	beq	.L2115
+	cbnz	w19, .L2098
+.L2099:
 	bl	FtlGcPageVarInit
-	b	.L2089
-.L2104:
+	b	.L2100
+.L2115:
 	mov	w19, 0
-.L2087:
+.L2098:
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w1
-	beq	.L2088
-.L2089:
+	beq	.L2099
+.L2100:
 	adrp	x25, .LANCHOR59
 	add	x25, x25, :lo12:.LANCHOR59
 	mov	w26, -1
 	mov	w24, 65535
-.L2101:
+.L2112:
 	ldrh	w0, [x20]
 	strb	wzr, [x20, 8]
 	cmp	w0, w24
-	beq	.L2105
+	beq	.L2116
 	mov	w27, 56
-.L2103:
+.L2114:
 	adrp	x1, .LANCHOR106
 	adrp	x22, .LANCHOR180
 	ldrh	w6, [x25]
@@ -14784,30 +14792,30 @@ FtlGcScanTempBlk:
 	ldrh	w1, [x1, #:lo12:.LANCHOR38]
 	add	x1, x1, 8
 	add	x1, x20, x1, lsl 1
-.L2091:
+.L2102:
 	cmp	x3, x1
-	bne	.L2093
+	bne	.L2104
 	mov	w1, w21
 	umull	x21, w21, w27
 	mov	x28, 0
 	mov	w2, 0
 	bl	FlashReadPages
-.L2094:
+.L2105:
 	cmp	x28, x21
-	bne	.L2102
+	bne	.L2113
 	adrp	x0, .LANCHOR53
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w19
-	bhi	.L2103
-.L2105:
+	bhi	.L2114
+.L2116:
 	mov	w2, 0
-	b	.L2090
-.L2093:
+	b	.L2101
+.L2104:
 	ldrh	w2, [x3]
 	cmp	w2, w24
-	beq	.L2092
+	beq	.L2103
 	umaddl	x4, w21, w27, x0
 	orr	w2, w19, w2, lsl 10
 	str	w2, [x4, 4]
@@ -14818,10 +14826,10 @@ FtlGcScanTempBlk:
 	asr	w2, w2, 2
 	add	x2, x5, x2, sxtw 2
 	str	x2, [x4, 16]
-.L2092:
+.L2103:
 	add	x3, x3, 2
-	b	.L2091
-.L2102:
+	b	.L2102
+.L2113:
 	ldr	x6, [x22, #:lo12:.LANCHOR180]
 	add	x5, x6, x28
 	ldr	w4, [x5, 4]
@@ -14829,16 +14837,16 @@ FtlGcScanTempBlk:
 	bl	P2V_plane
 	and	w2, w0, 65535
 	ldr	w0, [x6, x28]
-	cbnz	w0, .L2095
+	cbnz	w0, .L2106
 	ldr	x0, [x5, 16]
 	add	x28, x28, 56
 	ldrh	w1, [x0]
 	cmp	w1, w24
-	bne	.L2096
+	bne	.L2107
 	adrp	x0, .LANCHOR135
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR135]
-.L2090:
+.L2101:
 	strb	w2, [x20, 6]
 	mov	w0, -1
 	strh	w19, [x20, 2]
@@ -14854,41 +14862,41 @@ FtlGcScanTempBlk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2096:
+.L2107:
 	ldp	w2, w0, [x0, 8]
 	mov	w1, w4
 	bl	FtlGcUpdatePage
-	b	.L2094
-.L2095:
+	b	.L2105
+.L2106:
 	ldrh	w1, [x20]
 	mov	w2, w4
-	adrp	x0, .LC53
-	add	x0, x0, :lo12:.LC53
+	adrp	x0, .LC52
+	add	x0, x0, :lo12:.LC52
 	bl	printf
 	adrp	x0, .LANCHOR28
 	ldr	w1, [x0, #:lo12:.LANCHOR28]
 	ldrh	w0, [x20]
-	cbnz	w1, .L2097
+	cbnz	w1, .L2108
 	adrp	x1, .LANCHOR8
 	ldrb	w1, [x1, #:lo12:.LANCHOR8]
-	cbz	w1, .L2098
-.L2097:
+	cbz	w1, .L2109
+.L2108:
 	adrp	x2, .LANCHOR79
 	ubfiz	x1, x0, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR79]
 	ldrh	w1, [x2, x1]
 	cmp	w1, 159
-	bls	.L2099
-.L2098:
+	bls	.L2110
+.L2109:
 	ldr	x1, [x22, #:lo12:.LANCHOR180]
 	ldr	w1, [x1, x28]
 	cmn	w1, #1
-	bne	.L2100
-.L2099:
+	bne	.L2111
+.L2110:
 	ldr	x1, [x22, #:lo12:.LANCHOR180]
 	add	x28, x1, x28
 	ldr	w26, [x28, 4]
-.L2100:
+.L2111:
 	adrp	x1, .LANCHOR84
 	ubfiz	x0, x0, 1, 16
 	mov	w19, 0
@@ -14899,7 +14907,7 @@ FtlGcScanTempBlk:
 	mov	w0, -1
 	strh	w0, [x20]
 	bl	FtlGcPageVarInit
-	b	.L2101
+	b	.L2112
 	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
 	.section	.text.FlashReadFacBbtData,"ax",@progbits
 	.align	2
@@ -14934,11 +14942,11 @@ FlashReadFacBbtData:
 	mul	w26, w0, w25
 	mov	x22, x1
 	str	x2, [x29, 120]
-.L2115:
+.L2126:
 	cmp	w19, w20
-	ble	.L2122
+	ble	.L2133
 	mov	w0, -1
-.L2114:
+.L2125:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -14946,7 +14954,7 @@ FlashReadFacBbtData:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L2122:
+.L2133:
 	add	w0, w20, w26
 	mov	w2, 1
 	lsl	w0, w0, 10
@@ -14956,37 +14964,37 @@ FlashReadFacBbtData:
 	bl	FlashReadPages
 	ldr	w0, [x29, 104]
 	cmn	w0, #1
-	beq	.L2116
+	beq	.L2127
 	ldr	x0, [x22, #:lo12:.LANCHOR197]
 	ldrh	w0, [x0]
 	cmp	w0, w27
-	bne	.L2116
-	cbz	x23, .L2123
-	cbz	w25, .L2118
-.L2121:
+	bne	.L2127
+	cbz	x23, .L2134
+	cbz	w25, .L2129
+.L2132:
 	ldr	x1, [x21, #:lo12:.LANCHOR147]
 	mov	w2, w24
 	mov	x0, x23
 	bl	ftl_memcpy
 	mov	w3, 4
-	adrp	x0, .LC54
+	adrp	x0, .LC53
 	mov	w2, w3
 	mov	x1, x23
-	add	x0, x0, :lo12:.LC54
+	add	x0, x0, :lo12:.LC53
 	bl	rknand_print_hex
-.L2123:
+.L2134:
 	mov	w0, 0
-	b	.L2114
-.L2118:
+	b	.L2125
+.L2129:
 	ldr	x5, [x21, #:lo12:.LANCHOR147]
 	adrp	x2, .LANCHOR149
 	add	x2, x2, :lo12:.LANCHOR149
 	mov	w0, 0
 	mov	w6, 1
-.L2119:
+.L2130:
 	ldr	w1, [x2]
 	cmp	w0, w1
-	bcs	.L2121
+	bcs	.L2132
 	ubfx	x1, x0, 5, 11
 	and	w3, w0, 31
 	lsl	x1, x1, 2
@@ -14996,11 +15004,11 @@ FlashReadFacBbtData:
 	ldr	w3, [x5, x1]
 	orr	w3, w3, w4
 	str	w3, [x5, x1]
-	b	.L2119
-.L2116:
+	b	.L2130
+.L2127:
 	sub	w20, w20, #1
 	and	w20, w20, 65535
-	b	.L2115
+	b	.L2126
 	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
 	.section	.text.FlashGetBadBlockList,"ax",@progbits
 	.align	2
@@ -15024,10 +15032,10 @@ FlashGetBadBlockList:
 	lsr	w2, w2, 3
 	bl	FlashReadFacBbtData
 	cmn	w0, #1
-	bne	.L2129
-.L2133:
+	bne	.L2140
+.L2144:
 	mov	w0, 0
-.L2130:
+.L2141:
 	ubfiz	x0, x0, 1, 16
 	mov	w1, -1
 	ldr	x21, [sp, 32]
@@ -15036,32 +15044,32 @@ FlashGetBadBlockList:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L2129:
+.L2140:
 	ldr	x4, [x21, #:lo12:.LANCHOR153]
 	lsr	w5, w19, 4
 	sub	w19, w19, #1
 	mov	w1, 0
 	mov	w0, 0
 	mov	w6, 1
-.L2131:
+.L2142:
 	cmp	w1, w19
-	bge	.L2130
+	bge	.L2141
 	ubfx	x3, x1, 5, 11
 	and	w2, w1, 31
 	lsl	w2, w6, w2
 	ldr	w3, [x4, x3, lsl 2]
 	tst	w2, w3
-	beq	.L2132
+	beq	.L2143
 	add	w2, w0, 1
 	ubfiz	x0, x0, 1, 16
 	strh	w1, [x20, x0]
 	and	w0, w2, 65535
-.L2132:
+.L2143:
 	cmp	w0, w5
-	bcs	.L2133
+	bcs	.L2144
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L2131
+	b	.L2142
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
 	.section	.text.FtlMakeBbt,"ax",@progbits
 	.align	2
@@ -15077,7 +15085,7 @@ FtlMakeBbt:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w21, .L2140
+	cbnz	w21, .L2151
 	bl	FtlBbtMemInit
 	adrp	x20, .LANCHOR75
 	add	x22, x20, :lo12:.LANCHOR75
@@ -15089,42 +15097,42 @@ FtlMakeBbt:
 	adrp	x0, .LANCHOR45
 	add	x0, x0, :lo12:.LANCHOR45
 	str	x0, [x29, 120]
-.L2141:
+.L2152:
 	ldr	x0, [x29, 120]
 	ldrh	w0, [x0]
 	cmp	w21, w0
-	bcc	.L2147
+	bcc	.L2158
 	adrp	x21, .LANCHOR60
 	add	x21, x21, :lo12:.LANCHOR60
 	mov	w19, 0
-.L2148:
+.L2159:
 	ldrh	w0, [x21]
 	cmp	w0, w19
-	bhi	.L2149
+	bhi	.L2160
 	add	x21, x20, :lo12:.LANCHOR75
 	mov	w22, 65535
 	ldrh	w19, [x21, 12]
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L2150:
+.L2161:
 	ldrh	w0, [x21, 12]
 	sub	w0, w0, #47
 	cmp	w0, w19
-	bgt	.L2154
+	bgt	.L2165
 	mov	w0, w19
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L2151
+	beq	.L2162
 	mov	w0, w19
 	bl	FlashTestBlk
-	cbz	w0, .L2152
+	cbz	w0, .L2163
 	mov	w0, w19
 	bl	FtlBbmMapBadBlock
-.L2151:
+.L2162:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L2150
-.L2147:
+	b	.L2161
+.L2158:
 	adrp	x2, .LANCHOR188
 	adrp	x0, .LANCHOR183
 	add	x19, x28, :lo12:.LANCHOR202
@@ -15136,7 +15144,7 @@ FtlMakeBbt:
 	stp	x0, x26, [x19, 8]
 	adrp	x23, .LANCHOR51
 	str	x2, [x29, 112]
-	beq	.L2142
+	beq	.L2153
 	ldrh	w4, [x23, #:lo12:.LANCHOR51]
 	mov	w2, 1
 	madd	w27, w4, w21, w1
@@ -15151,14 +15159,14 @@ FtlMakeBbt:
 	add	w2, w2, 7
 	lsr	w2, w2, 3
 	bl	ftl_memcpy
-.L2143:
+.L2154:
 	mov	w0, w27
 	add	w21, w21, 1
 	bl	FtlBbmMapBadBlock
 	add	x24, x24, 8
 	add	x22, x22, 2
-	b	.L2141
-.L2142:
+	b	.L2152
+.L2153:
 	mov	w1, w21
 	bl	FlashGetBadBlockList
 	ldr	x0, [x19, 8]
@@ -15171,12 +15179,12 @@ FtlMakeBbt:
 	sub	w19, w19, #1
 	str	x0, [x29, 104]
 	and	w19, w19, 65535
-.L2144:
+.L2155:
 	ldrh	w0, [x23]
 	madd	w0, w21, w0, w19
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L2145
+	beq	.L2156
 	ldr	x0, [x29, 112]
 	mov	w2, 16
 	strh	w19, [x22]
@@ -15209,29 +15217,29 @@ FtlMakeBbt:
 	bl	FlashProgPages
 	ldr	w0, [x25]
 	cmn	w0, #1
-	bne	.L2143
+	bne	.L2154
 	mov	w0, w27
 	bl	FtlBbmMapBadBlock
-	b	.L2144
-.L2145:
+	b	.L2155
+.L2156:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L2144
-.L2149:
+	b	.L2155
+.L2160:
 	mov	w0, w19
 	add	w19, w19, 1
 	bl	FtlBbmMapBadBlock
 	and	w19, w19, 65535
-	b	.L2148
-.L2152:
+	b	.L2159
+.L2163:
 	ldrh	w0, [x21]
 	cmp	w0, w22
-	bne	.L2153
+	bne	.L2164
 	strh	w19, [x21]
-	b	.L2151
-.L2153:
+	b	.L2162
+.L2164:
 	strh	w19, [x21, 4]
-.L2154:
+.L2165:
 	adrp	x0, .LANCHOR78
 	add	x19, x20, :lo12:.LANCHOR75
 	ldrh	w1, [x20, #:lo12:.LANCHOR75]
@@ -15260,7 +15268,7 @@ FtlMakeBbt:
 	strh	w0, [x19, 4]
 	strh	w1, [x20, #:lo12:.LANCHOR75]
 	bl	FtlBbmTblFlush
-.L2140:
+.L2151:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -15277,29 +15285,28 @@ FtlMakeBbt:
 log2phys:
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
-	stp	x25, x26, [sp, 64]
-	mov	x26, x1
+	stp	x23, x24, [sp, 48]
+	mov	x23, x1
 	adrp	x1, .LANCHOR57
-	stp	x21, x22, [sp, 32]
-	str	w2, [x29, 120]
-	ldrh	w1, [x1, #:lo12:.LANCHOR57]
 	stp	x19, x20, [sp, 16]
-	add	w2, w1, 7
-	mov	x1, 1
-	stp	x23, x24, [sp, 48]
-	lsl	x1, x1, x2
-	sub	w1, w1, #1
-	and	w1, w1, w0
+	stp	x21, x22, [sp, 32]
+	ldrh	w20, [x1, #:lo12:.LANCHOR57]
+	stp	x25, x26, [sp, 64]
+	add	w1, w20, 7
+	mov	x20, 1
 	stp	x27, x28, [sp, 80]
-	and	w1, w1, 65535
-	str	w1, [x29, 124]
+	lsl	x20, x20, x1
+	sub	w20, w20, #1
+	and	w20, w20, w0
+	lsr	w22, w0, w1
+	and	w1, w20, 65535
+	stp	w2, w1, [x29, 120]
 	adrp	x1, .LANCHOR73
-	lsr	w25, w0, w2
-	and	w22, w25, 65535
+	and	w21, w22, 65535
 	ldr	w1, [x1, #:lo12:.LANCHOR73]
 	cmp	w0, w1
-	bcc	.L2161
-	mov	w2, 888
+	bcc	.L2172
+	mov	w2, 880
 	adrp	x1, .LANCHOR227
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR227
@@ -15310,33 +15317,33 @@ log2phys:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2161:
+.L2172:
 	adrp	x19, .LANCHOR97
 	adrp	x0, .LANCHOR68
 	ldr	x2, [x19, #:lo12:.LANCHOR97]
 	ldrh	w1, [x0, #:lo12:.LANCHOR68]
 	mov	x0, 0
-.L2162:
-	and	x20, x0, 65535
-	cmp	w20, w1
-	bcc	.L2167
+.L2173:
+	and	x25, x0, 65535
+	cmp	w25, w1
+	bcc	.L2178
 	bl	select_l2p_ram_region
-	and	x20, x0, 65535
+	and	x25, x0, 65535
 	ldr	x1, [x19, #:lo12:.LANCHOR97]
-	ubfiz	x21, x20, 4, 16
-	add	x2, x1, x21
-	ldrh	w3, [x1, x21]
+	ubfiz	x26, x25, 4, 16
+	add	x2, x1, x26
+	ldrh	w3, [x1, x26]
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L2168
+	beq	.L2179
 	ldr	w1, [x2, 4]
-	tbz	w1, #31, .L2168
+	tbz	w1, #31, .L2179
 	bl	flush_l2p_region
-.L2168:
-	adrp	x24, .LANCHOR67
-	ldrh	w0, [x24, #:lo12:.LANCHOR67]
-	cmp	w0, w22
-	bcs	.L2169
+.L2179:
+	adrp	x28, .LANCHOR67
+	ldrh	w0, [x28, #:lo12:.LANCHOR67]
+	cmp	w0, w21
+	bcs	.L2180
 	mov	w2, 526
 	adrp	x1, .LANCHOR228
 	adrp	x0, .LC5
@@ -15348,48 +15355,47 @@ log2phys:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2169:
-	adrp	x1, .LANCHOR131
-	ubfiz	x0, x22, 2, 16
-	str	x1, [x29, 112]
-	ldr	x2, [x1, #:lo12:.LANCHOR131]
-	ldr	w28, [x2, x0]
-	cbnz	w28, .L2170
+.L2180:
+	adrp	x24, .LANCHOR131
+	ubfiz	x0, x21, 2, 16
+	ldr	x1, [x24, #:lo12:.LANCHOR131]
+	ldr	w3, [x1, x0]
+	cbnz	w3, .L2181
 	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	adrp	x1, .LANCHOR58
-	add	x0, x0, x21
+	add	x0, x0, x26
 	ldrh	w2, [x1, #:lo12:.LANCHOR58]
 	mov	w1, 255
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
 	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	add	x1, x0, x21
-	strh	w22, [x0, x21]
+	add	x1, x0, x26
+	strh	w21, [x0, x26]
 	str	wzr, [x1, 4]
-	b	.L2163
-.L2167:
+	b	.L2174
+.L2178:
 	add	x0, x0, 1
 	add	x3, x2, x0, lsl 4
 	ldrh	w3, [x3, -16]
-	cmp	w3, w22
-	bne	.L2162
-.L2163:
-	ldp	w0, w1, [x29, 120]
-	cbnz	w0, .L2164
+	cmp	w3, w21
+	bne	.L2173
+.L2174:
+	ldp	w0, w20, [x29, 120]
+	cbnz	w0, .L2175
 	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	add	x0, x0, x20, lsl 4
+	add	x0, x0, x25, lsl 4
 	ldr	x0, [x0, 8]
-	ldr	w0, [x0, x1, lsl 2]
-	str	w0, [x26]
-.L2165:
+	ldr	w0, [x0, x20, lsl 2]
+	str	w0, [x23]
+.L2176:
 	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	add	x20, x0, x20, lsl 4
-	ldr	w0, [x20, 4]
+	add	x25, x0, x25, lsl 4
+	ldr	w0, [x25, 4]
 	cmn	w0, #1
-	beq	.L2175
+	beq	.L2186
 	add	w0, w0, 1
-	str	w0, [x20, 4]
-.L2175:
+	str	w0, [x25, 4]
+.L2186:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -15398,85 +15404,66 @@ log2phys:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2164:
+.L2175:
 	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	ldr	w3, [x26]
-	add	x0, x0, x20, lsl 4
-	ldr	x2, [x0, 8]
-	str	w3, [x2, x1, lsl 2]
+	ldr	w2, [x23]
+	add	x0, x0, x25, lsl 4
+	ldr	x1, [x0, 8]
+	str	w2, [x1, x20, lsl 2]
 	ldr	w1, [x0, 4]
 	orr	w1, w1, -2147483648
 	str	w1, [x0, 4]
 	adrp	x0, .LANCHOR98
-	strh	w22, [x0, #:lo12:.LANCHOR98]
-	b	.L2165
-.L2170:
+	strh	w21, [x0, #:lo12:.LANCHOR98]
+	b	.L2176
+.L2181:
 	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	adrp	x23, .LANCHOR202
-	add	x27, x23, :lo12:.LANCHOR202
+	adrp	x5, .LANCHOR202
+	add	x20, x5, :lo12:.LANCHOR202
 	mov	w2, 1
-	add	x0, x0, x21
+	add	x0, x0, x26
+	str	x5, [x29, 104]
+	str	w3, [x29, 116]
 	mov	w1, w2
-	str	w28, [x27, 4]
+	str	w3, [x20, 4]
 	ldr	x0, [x0, 8]
-	str	x0, [x27, 8]
+	str	x0, [x20, 8]
 	adrp	x0, .LANCHOR188
 	ldr	x0, [x0, #:lo12:.LANCHOR188]
-	str	x0, [x27, 16]
-	mov	x0, x27
+	str	x0, [x20, 16]
+	mov	x0, x20
 	bl	FlashReadPages
-	ldr	x27, [x27, 16]
-	ldr	w0, [x23, #:lo12:.LANCHOR202]
-	cmp	w0, 256
-	bne	.L2171
-	and	w4, w25, 65535
-	mov	w2, w28
-	mov	w1, w4
-	str	w4, [x29, 108]
+	ldr	x27, [x20, 16]
+	ldr	w3, [x29, 116]
+	ldr	x5, [x29, 104]
+	ldrh	w0, [x27, 8]
+	cmp	w0, w21
+	beq	.L2182
+	mov	w2, w3
+	and	w1, w22, 65535
+	adrp	x0, .LC54
+	add	x0, x0, :lo12:.LC54
+	bl	printf
+	ldr	x1, [x20, 16]
+	mov	w3, 4
+	adrp	x0, .LC27
+	mov	w2, w3
+	add	x0, x0, :lo12:.LC27
+	bl	rknand_print_hex
+	ldr	x1, [x24, #:lo12:.LANCHOR131]
+	mov	w2, 4
+	ldrh	w3, [x28, #:lo12:.LANCHOR67]
 	adrp	x0, .LC55
 	add	x0, x0, :lo12:.LC55
-	bl	printf
-	adrp	x0, .LANCHOR127
-	add	x0, x0, :lo12:.LANCHOR127
-	lsr	w1, w28, 10
-	ldr	w4, [x29, 108]
-	strh	w1, [x0, 60]
-	ldr	x1, [x19, #:lo12:.LANCHOR97]
-	add	x1, x1, x21
-	ldr	x2, [x1, 8]
-	mov	w1, w4
-	bl	FtlMapWritePage
-.L2171:
-	ldrh	w0, [x27, 8]
-	cmp	w0, w22
-	beq	.L2172
-	add	x23, x23, :lo12:.LANCHOR202
-	mov	w2, w28
-	and	w1, w25, 65535
-	adrp	x0, .LC56
-	add	x0, x0, :lo12:.LC56
-	bl	printf
-	ldr	x1, [x23, 16]
-	mov	w3, 4
-	adrp	x0, .LC27
-	mov	w2, w3
-	add	x0, x0, :lo12:.LC27
-	bl	rknand_print_hex
-	ldr	x0, [x29, 112]
-	mov	w2, 4
-	ldrh	w3, [x24, #:lo12:.LANCHOR67]
-	ldr	x1, [x0, #:lo12:.LANCHOR131]
-	adrp	x0, .LC57
-	add	x0, x0, :lo12:.LC57
 	bl	rknand_print_hex
 	adrp	x0, .LANCHOR77
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR77]
-.L2172:
+.L2183:
 	ldrh	w0, [x27, 8]
-	cmp	w0, w22
-	beq	.L2173
-	mov	w2, 553
+	cmp	w0, w21
+	beq	.L2184
+	mov	w2, 552
 	adrp	x1, .LANCHOR228
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR228
@@ -15487,12 +15474,30 @@ log2phys:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2173:
+.L2184:
 	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	add	x1, x0, x21
+	add	x1, x0, x26
 	str	wzr, [x1, 4]
-	strh	w22, [x0, x21]
-	b	.L2163
+	strh	w21, [x0, x26]
+	b	.L2174
+.L2182:
+	ldr	w0, [x5, #:lo12:.LANCHOR202]
+	cmp	w0, 256
+	bne	.L2183
+	and	w22, w22, 65535
+	mov	w2, w3
+	mov	w1, w22
+	adrp	x0, .LC56
+	add	x0, x0, :lo12:.LC56
+	bl	printf
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	mov	w1, w22
+	add	x0, x0, x26
+	ldr	x2, [x0, 8]
+	adrp	x0, .LANCHOR127
+	add	x0, x0, :lo12:.LANCHOR127
+	bl	FtlMapWritePage
+	b	.L2183
 	.size	log2phys, .-log2phys
 	.section	.text.FtlProgPages,"ax",@progbits
 	.align	2
@@ -15507,14 +15512,14 @@ FtlProgPages:
 	ldr	w2, [x23, #:lo12:.LANCHOR77]
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
-	cbnz	w2, .L2180
+	cbnz	w2, .L2191
 	adrp	x2, .LANCHOR8
 	ldrb	w2, [x2, #:lo12:.LANCHOR8]
-	cbz	w2, .L2195
+	cbz	w2, .L2206
 	ldrb	w2, [x3, 8]
 	cmp	w2, 1
 	cset	w22, eq
-.L2182:
+.L2193:
 	mov	x20, x3
 	ldrb	w3, [x3, 9]
 	mov	w21, w1
@@ -15527,21 +15532,21 @@ FtlProgPages:
 	add	x24, x24, :lo12:.LANCHOR138
 	mov	w1, 56
 	umaddl	x21, w21, w1, x19
-.L2183:
+.L2194:
 	cmp	x19, x21
-	beq	.L2192
+	beq	.L2203
 	adrp	x26, .LANCHOR84
-	b	.L2193
-.L2195:
+	b	.L2204
+.L2206:
 	mov	w22, 0
-	b	.L2182
-.L2186:
+	b	.L2193
+.L2197:
 	ldr	w0, [x19, 4]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	ldrh	w1, [x20]
 	cmp	w1, w0, uxth
-	bne	.L2184
+	bne	.L2195
 	ldr	x2, [x26, #:lo12:.LANCHOR84]
 	ubfiz	x1, x1, 1, 16
 	ldrh	w3, [x20, 4]
@@ -15552,12 +15557,12 @@ FtlProgPages:
 	ldrh	w0, [x25]
 	strh	w0, [x20, 2]
 	strh	wzr, [x20, 4]
-.L2184:
+.L2195:
 	ldrh	w0, [x20, 4]
-	cbnz	w0, .L2185
+	cbnz	w0, .L2196
 	mov	x0, x20
 	bl	allocate_new_data_superblock
-.L2185:
+.L2196:
 	ldr	w0, [x24, 96]
 	add	w0, w0, 1
 	str	w0, [x24, 96]
@@ -15574,16 +15579,16 @@ FtlProgPages:
 	mov	x0, x19
 	bl	FlashProgPages
 	ldr	w0, [x23, #:lo12:.LANCHOR77]
-	cbnz	w0, .L2180
-.L2193:
+	cbnz	w0, .L2191
+.L2204:
 	ldr	w0, [x19]
 	cmn	w0, #1
-	beq	.L2186
+	beq	.L2197
 	adrp	x0, .LANCHOR38
 	ldrb	w1, [x20, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w1, w0
-	bcc	.L2187
+	bcc	.L2198
 	mov	w2, 1583
 	adrp	x1, .LANCHOR229
 	adrp	x0, .LC5
@@ -15595,10 +15600,10 @@ FtlProgPages:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2187:
+.L2198:
 	ldr	w0, [x19, 4]
-	cbnz	w22, .L2188
-.L2200:
+	cbnz	w22, .L2199
+.L2211:
 	str	w0, [x29, 92]
 	add	x1, x29, 92
 	ldr	w0, [x19, 24]
@@ -15611,31 +15616,31 @@ FtlProgPages:
 	and	w1, w0, 65535
 	mov	w26, w1
 	cmn	w3, #1
-	beq	.L2190
+	beq	.L2201
 	adrp	x2, .LANCHOR84
 	ubfiz	x0, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR84]
 	ldrh	w0, [x2, x0]
-	cbnz	w0, .L2191
-	adrp	x0, .LC58
+	cbnz	w0, .L2202
+	adrp	x0, .LC57
 	mov	w2, 0
-	add	x0, x0, :lo12:.LC58
+	add	x0, x0, :lo12:.LC57
 	bl	printf
-.L2191:
+.L2202:
 	mov	w0, w26
 	bl	decrement_vpc_count
-.L2190:
+.L2201:
 	add	x19, x19, 56
-	b	.L2183
-.L2188:
+	b	.L2194
+.L2199:
 	orr	w0, w0, -2147483648
-	b	.L2200
-.L2192:
+	b	.L2211
+.L2203:
 	adrp	x0, .LANCHOR38
 	ldrb	w1, [x20, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w1, w0
-	bcc	.L2180
+	bcc	.L2191
 	mov	w2, 1600
 	adrp	x1, .LANCHOR229
 	adrp	x0, .LC5
@@ -15647,7 +15652,7 @@ FtlProgPages:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2180:
+.L2191:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -15662,25 +15667,25 @@ FtlProgPages:
 FtlCacheWriteBack:
 	adrp	x0, .LANCHOR77
 	ldr	w0, [x0, #:lo12:.LANCHOR77]
-	cbnz	w0, .L2207
+	cbnz	w0, .L2218
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	adrp	x19, .LANCHOR132
 	ldr	x0, [x19, #:lo12:.LANCHOR132]
-	cbz	x0, .L2202
+	cbz	x0, .L2213
 	adrp	x1, .LANCHOR230
 	mov	w2, 0
 	ldr	x3, [x1, #:lo12:.LANCHOR230]
 	mov	w1, 1
 	bl	FtlProgPages
 	str	xzr, [x19, #:lo12:.LANCHOR132]
-.L2202:
+.L2213:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2207:
+.L2218:
 	mov	w0, 0
 	ret
 	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
@@ -15691,7 +15696,7 @@ FtlCacheWriteBack:
 FtlSysFlush:
 	adrp	x0, .LANCHOR77
 	ldr	w0, [x0, #:lo12:.LANCHOR77]
-	cbnz	w0, .L2213
+	cbnz	w0, .L2224
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	FtlCacheWriteBack
@@ -15702,7 +15707,7 @@ FtlSysFlush:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L2213:
+.L2224:
 	mov	w0, 0
 	ret
 	.size	FtlSysFlush, .-FtlSysFlush
@@ -15714,14 +15719,14 @@ FtlDeInit:
 	adrp	x0, .LANCHOR231
 	ldr	w0, [x0, #:lo12:.LANCHOR231]
 	cmp	w0, 1
-	bne	.L2219
+	bne	.L2230
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	FtlSysFlush
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L2219:
+.L2230:
 	mov	w0, 0
 	ret
 	.size	FtlDeInit, .-FtlDeInit
@@ -15752,61 +15757,61 @@ ftl_discard:
 	stp	x21, x22, [sp, 32]
 	str	x23, [sp, 48]
 	cmp	w1, w0
-	bhi	.L2232
+	bhi	.L2243
 	mov	w19, w2
 	cmp	w2, 31
-	bhi	.L2226
-.L2240:
+	bhi	.L2237
+.L2251:
 	mov	w0, 0
-.L2224:
+.L2235:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2226:
+.L2237:
 	adrp	x0, .LANCHOR77
 	ldr	w0, [x0, #:lo12:.LANCHOR77]
-	cbnz	w0, .L2240
+	cbnz	w0, .L2251
 	adrp	x22, .LANCHOR56
 	bl	FtlCacheWriteBack
 	ldrh	w0, [x22, #:lo12:.LANCHOR56]
 	udiv	w21, w20, w0
 	msub	w20, w0, w21, w20
 	ands	w20, w20, 65535
-	beq	.L2228
+	beq	.L2239
 	sub	w0, w0, w20
 	add	w21, w21, 1
 	cmp	w0, w19
 	csel	w0, w0, w19, ls
 	sub	w19, w19, w0, uxth
-.L2228:
+.L2239:
 	adrp	x20, .LANCHOR232
 	adrp	x23, .LANCHOR163
 	add	x20, x20, :lo12:.LANCHOR232
 	add	x23, x23, :lo12:.LANCHOR163
 	mov	w0, -1
 	str	w0, [x29, 76]
-.L2229:
+.L2240:
 	ldrh	w0, [x22, #:lo12:.LANCHOR56]
 	cmp	w19, w0
-	bcs	.L2231
+	bcs	.L2242
 	adrp	x0, .LANCHOR232
 	ldr	w1, [x0, #:lo12:.LANCHOR232]
 	cmp	w1, 32
-	bls	.L2240
+	bls	.L2251
 	str	wzr, [x0, #:lo12:.LANCHOR232]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L2240
-.L2231:
+	b	.L2251
+.L2242:
 	mov	w2, 0
 	add	x1, x29, 72
 	mov	w0, w21
 	bl	log2phys
 	ldr	w0, [x29, 72]
 	cmn	w0, #1
-	beq	.L2230
+	beq	.L2241
 	ldr	w0, [x20]
 	mov	w2, 1
 	add	x1, x29, 76
@@ -15821,14 +15826,14 @@ ftl_discard:
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L2230:
+.L2241:
 	ldrh	w0, [x22, #:lo12:.LANCHOR56]
 	add	w21, w21, 1
 	sub	w19, w19, w0
-	b	.L2229
-.L2232:
+	b	.L2240
+.L2243:
 	mov	w0, -1
-	b	.L2224
+	b	.L2235
 	.size	ftl_discard, .-ftl_discard
 	.section	.text.Ftlscanalldata,"ax",@progbits
 	.align	2
@@ -15836,9 +15841,9 @@ ftl_discard:
 	.type	Ftlscanalldata, %function
 Ftlscanalldata:
 	sub	sp, sp, #96
-	adrp	x0, .LC59
+	adrp	x0, .LC58
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC59
+	add	x0, x0, :lo12:.LC58
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x19, x20, [sp, 32]
@@ -15850,32 +15855,32 @@ Ftlscanalldata:
 	add	x21, x21, :lo12:.LANCHOR73
 	str	x23, [sp, 64]
 	bl	printf
-.L2242:
+.L2253:
 	ldr	w0, [x21]
 	cmp	w19, w0
-	bcc	.L2248
+	bcc	.L2259
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x29, x30, [sp, 16]
 	ldr	x23, [sp, 64]
 	add	sp, sp, 96
 	ret
-.L2248:
+.L2259:
 	mov	w2, 0
 	add	x1, x29, 76
 	mov	w0, w19
 	bl	log2phys
 	tst	x19, 2047
-	bne	.L2243
+	bne	.L2254
 	ldr	w2, [x29, 76]
-	adrp	x0, .LC60
+	adrp	x0, .LC59
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC60
+	add	x0, x0, :lo12:.LC59
 	bl	printf
-.L2243:
+.L2254:
 	ldr	w1, [x29, 76]
 	cmn	w1, #1
-	beq	.L2245
+	beq	.L2256
 	add	x0, x20, :lo12:.LANCHOR202
 	str	wzr, [x20, #:lo12:.LANCHOR202]
 	mov	w2, 0
@@ -15892,25 +15897,25 @@ Ftlscanalldata:
 	ldr	w0, [x20, #:lo12:.LANCHOR202]
 	cmp	w0, 256
 	ccmn	w0, #1, 4, ne
-	beq	.L2246
+	beq	.L2257
 	ldr	w0, [x23, 8]
 	cmp	w19, w0
-	beq	.L2245
-.L2246:
+	beq	.L2256
+.L2257:
 	ldp	x1, x0, [x22, 8]
 	ldr	w2, [x1, 4]
 	str	w2, [sp]
 	ldr	w2, [x22, 4]
 	ldp	w3, w4, [x0]
 	ldp	w5, w6, [x0, 8]
-	adrp	x0, .LC61
+	adrp	x0, .LC60
 	ldr	w7, [x1]
-	add	x0, x0, :lo12:.LC61
+	add	x0, x0, :lo12:.LC60
 	mov	w1, w19
 	bl	printf
-.L2245:
+.L2256:
 	add	w19, w19, 1
-	b	.L2242
+	b	.L2253
 	.size	Ftlscanalldata, .-Ftlscanalldata
 	.section	.text.FtlReUsePrevPpa,"ax",@progbits
 	.align	2
@@ -15931,10 +15936,10 @@ FtlReUsePrevPpa:
 	and	w3, w0, 65535
 	ubfiz	x20, x3, 1, 16
 	ldrh	w1, [x2, x20]
-	cbnz	w1, .L2251
+	cbnz	w1, .L2262
 	adrp	x0, .LANCHOR88
 	ldr	x19, [x0, #:lo12:.LANCHOR88]
-	cbz	x19, .L2252
+	cbz	x19, .L2263
 	adrp	x2, .LANCHOR82
 	mov	x5, -6148914691236517206
 	movk	x5, 0xaaab, lsl 0
@@ -15947,17 +15952,17 @@ FtlReUsePrevPpa:
 	mul	x19, x19, x5
 	mov	w5, 6
 	and	w19, w19, 65535
-.L2253:
+.L2264:
 	cmp	w1, w4
-	beq	.L2252
+	beq	.L2263
 	cmp	w19, w3
-	bne	.L2254
+	bne	.L2265
 	mov	w1, w19
 	add	x0, x0, :lo12:.LANCHOR88
 	bl	List_remove_node
 	ldrh	w0, [x23, #:lo12:.LANCHOR89]
-	cbnz	w0, .L2255
-	mov	w2, 2140
+	cbnz	w0, .L2266
+	mov	w2, 2070
 	adrp	x1, .LANCHOR233
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR233
@@ -15968,7 +15973,7 @@ FtlReUsePrevPpa:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2255:
+.L2266:
 	ldrh	w0, [x23, #:lo12:.LANCHOR89]
 	sub	w0, w0, #1
 	strh	w0, [x23, #:lo12:.LANCHOR89]
@@ -15978,7 +15983,7 @@ FtlReUsePrevPpa:
 	ldrh	w0, [x1, x20]
 	add	w0, w0, 1
 	strh	w0, [x1, x20]
-.L2252:
+.L2263:
 	add	x1, x29, 76
 	mov	w2, 1
 	mov	w0, w21
@@ -15988,18 +15993,18 @@ FtlReUsePrevPpa:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2254:
+.L2265:
 	umull	x19, w19, w5
 	ldrh	w19, [x2, x19]
 	cmp	w19, w6
-	beq	.L2252
+	beq	.L2263
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L2253
-.L2251:
+	b	.L2264
+.L2262:
 	add	w1, w1, 1
 	strh	w1, [x2, x20]
-	b	.L2252
+	b	.L2263
 	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
 	.section	.text.FtlRecoverySuperblock,"ax",@progbits
 	.align	2
@@ -16017,7 +16022,7 @@ FtlRecoverySuperblock:
 	stp	x25, x26, [sp, 64]
 	cmp	w0, w1
 	stp	x27, x28, [sp, 80]
-	beq	.L2420
+	beq	.L2430
 	ldrb	w0, [x19, 6]
 	str	w0, [x29, 180]
 	adrp	x0, .LANCHOR53
@@ -16025,11 +16030,11 @@ FtlRecoverySuperblock:
 	str	x0, [x29, 144]
 	ldrh	w2, [x0, #:lo12:.LANCHOR53]
 	cmp	w2, w26
-	bne	.L2264
+	bne	.L2275
 	strh	wzr, [x19, 4]
-.L2427:
+.L2437:
 	strb	wzr, [x19, 6]
-.L2420:
+.L2430:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -16038,26 +16043,26 @@ FtlRecoverySuperblock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 208
 	ret
-.L2264:
+.L2275:
 	ldrh	w0, [x19, 16]
 	mov	w21, 0
-.L2265:
+.L2276:
 	cmp	w0, w1
-	beq	.L2266
+	beq	.L2277
 	ldrb	w1, [x19, 8]
 	cmp	w1, 1
-	bne	.L2267
+	bne	.L2278
 	bl	FtlGetLastWrittenPage
 	mov	w20, w0
 	cmn	w0, #1
-	beq	.L2268
+	beq	.L2279
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbnz	w0, .L2345
+	cbnz	w0, .L2355
 	adrp	x0, .LANCHOR16
 	add	x0, x0, :lo12:.LANCHOR16
 	ldrh	w23, [x0, w20, sxtw 1]
-.L2269:
+.L2280:
 	adrp	x1, .LANCHOR106
 	adrp	x2, .LANCHOR38
 	adrp	x22, .LANCHOR180
@@ -16075,23 +16080,23 @@ FtlRecoverySuperblock:
 	str	x2, [x29, 160]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.L2270:
+.L2281:
 	cmp	x1, x4
-	bne	.L2274
+	bne	.L2285
 	ldrb	w1, [x19, 8]
 	cmp	w1, 1
-	bne	.L2346
+	bne	.L2356
 	adrp	x1, .LANCHOR8
 	ldrb	w1, [x1, #:lo12:.LANCHOR8]
 	cmp	w1, 0
 	cset	w1, ne
 	str	w1, [x29, 176]
-.L2275:
+.L2286:
 	ldr	w2, [x29, 176]
 	mov	w1, w27
-	adrp	x24, .LC62
+	adrp	x24, .LC61
 	adrp	x25, .LANCHOR235
-	add	x24, x24, :lo12:.LC62
+	add	x24, x24, :lo12:.LC61
 	add	x25, x25, :lo12:.LANCHOR235
 	mov	x28, 0
 	bl	FlashReadPages
@@ -16100,68 +16105,68 @@ FtlRecoverySuperblock:
 	str	x0, [x29, 168]
 	ldr	w21, [x0, #:lo12:.LANCHOR160]
 	sub	w21, w21, #1
-.L2276:
+.L2287:
 	and	w0, w28, 65535
 	cmp	w27, w0
-	bhi	.L2281
-	bne	.L2279
+	bhi	.L2292
+	bne	.L2290
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	ldr	w0, [x0, 4]
-.L2422:
+.L2432:
 	lsr	w0, w0, 10
 	bl	P2V_plane
 	ldrb	w1, [x19, 8]
 	and	w27, w0, 65535
 	cmp	w1, 1
-	bne	.L2283
+	bne	.L2294
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbnz	w0, .L2283
+	cbnz	w0, .L2294
 	adrp	x0, .LANCHOR16
 	add	x0, x0, :lo12:.LANCHOR16
 	ldrh	w20, [x0, w20, sxtw 1]
-.L2283:
+.L2294:
 	ldr	x0, [x29, 144]
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w20
-	bne	.L2284
+	bne	.L2295
 	strh	w20, [x19, 2]
 	strb	wzr, [x19, 6]
 	strh	wzr, [x19, 4]
-.L2284:
+.L2295:
 	ldr	w0, [x29, 180]
 	cmp	w20, w26
 	cset	w2, eq
 	cmp	w27, w0
 	cset	w0, eq
 	tst	w2, w0
-	beq	.L2285
-.L2428:
+	beq	.L2296
+.L2438:
 	mov	w2, w27
 	mov	w1, w20
 	mov	x0, x19
 	bl	ftl_sb_update_avl_pages
-	b	.L2420
-.L2266:
+	b	.L2430
+.L2277:
 	add	w21, w21, 1
 	and	w21, w21, 65535
 	add	x0, x19, x21, sxtw 1
 	ldrh	w0, [x0, 16]
-	b	.L2265
-.L2267:
+	b	.L2276
+.L2278:
 	mov	w1, 0
 	bl	FtlGetLastWrittenPage
 	mov	w20, w0
 	cmn	w0, #1
-	beq	.L2268
-.L2345:
+	beq	.L2279
+.L2355:
 	mov	w23, w20
-	b	.L2269
-.L2268:
-	cbz	w26, .L2271
-	mov	w2, 2211
+	b	.L2280
+.L2279:
+	cbz	w26, .L2282
+	mov	w2, 2141
 	adrp	x1, .LANCHOR234
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR234
@@ -16172,12 +16177,12 @@ FtlRecoverySuperblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2271:
+.L2282:
 	ldr	w0, [x29, 180]
 	cmp	w0, 0
 	ccmp	w21, w0, 4, ne
-	beq	.L2272
-	mov	w2, 2212
+	beq	.L2283
+	mov	w2, 2142
 	adrp	x1, .LANCHOR234
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR234
@@ -16188,13 +16193,13 @@ FtlRecoverySuperblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2272:
+.L2283:
 	strh	wzr, [x19, 2]
-	b	.L2427
-.L2274:
+	b	.L2437
+.L2285:
 	ldrh	w2, [x4]
 	cmp	w2, w8
-	beq	.L2273
+	beq	.L2284
 	umaddl	x5, w27, w10, x0
 	orr	w2, w23, w2, lsl 10
 	add	w3, w27, 1
@@ -16205,81 +16210,81 @@ FtlRecoverySuperblock:
 	asr	w2, w2, 2
 	add	x2, x6, x2, sxtw 2
 	str	x2, [x5, 16]
-.L2273:
+.L2284:
 	add	x4, x4, 2
-	b	.L2270
-.L2346:
+	b	.L2281
+.L2356:
 	str	wzr, [x29, 176]
-	b	.L2275
-.L2281:
+	b	.L2286
+.L2292:
 	mov	x0, 56
 	ldr	x2, [x22, #:lo12:.LANCHOR180]
 	mul	x0, x28, x0
 	add	x1, x2, x0
 	ldr	w0, [x2, x0]
-	cbnz	w0, .L2277
+	cbnz	w0, .L2288
 	ldr	x6, [x1, 16]
 	ldr	w4, [x6, 4]
 	cmn	w4, #1
-	beq	.L2278
+	beq	.L2289
 	ldr	x0, [x29, 168]
 	ldr	w1, [x0, #:lo12:.LANCHOR160]
 	mov	w0, w4
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2278
+	cbz	w0, .L2289
 	ldr	x0, [x29, 168]
 	add	w4, w4, 1
 	str	w4, [x0, #:lo12:.LANCHOR160]
-.L2278:
+.L2289:
 	ldr	w0, [x6]
 	cmn	w0, #1
-	bne	.L2280
-.L2279:
+	bne	.L2291
+.L2290:
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	and	x28, x28, 65535
 	mov	x1, 56
 	and	w20, w20, 65535
 	madd	x28, x28, x1, x0
 	ldr	w0, [x28, 4]
-	b	.L2422
-.L2277:
+	b	.L2432
+.L2288:
 	ldr	w1, [x1, 4]
 	mov	x0, x24
 	bl	printf
 	ldrh	w0, [x19]
 	and	w5, w23, 65535
 	strh	w0, [x25]
-.L2280:
+.L2291:
 	add	x28, x28, 1
-	b	.L2276
-.L2285:
+	b	.L2287
+.L2296:
 	mov	w0, 65535
 	cmp	w5, w0
-	bne	.L2286
-	cbnz	w1, .L2287
-.L2286:
+	bne	.L2297
+	cbnz	w1, .L2298
+.L2297:
 	adrp	x24, .LANCHOR136
 	and	w6, w23, 65535
 	ldr	w0, [x24, #:lo12:.LANCHOR136]
 	cmn	w0, #1
-	bne	.L2288
+	bne	.L2299
 	str	w21, [x24, #:lo12:.LANCHOR136]
-.L2288:
+.L2299:
 	add	w0, w26, 7
 	ldr	w7, [x24, #:lo12:.LANCHOR136]
 	cmp	w0, w23, uxth
-	bge	.L2347
+	bge	.L2357
 	sub	w23, w6, #7
 	and	w23, w23, 65535
-.L2289:
+.L2300:
 	mov	w3, -1
 	adrp	x5, .LANCHOR120
 	mov	w28, w3
 	add	x5, x5, :lo12:.LANCHOR120
 	mov	w4, 65535
-.L2290:
+.L2301:
 	cmp	w23, w6
-	bhi	.L2305
+	bhi	.L2316
 	ldr	x1, [x29, 160]
 	mov	w25, 0
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
@@ -16288,24 +16293,24 @@ FtlRecoverySuperblock:
 	ldrh	w1, [x1, #:lo12:.LANCHOR38]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-	b	.L2306
-.L2347:
+	b	.L2317
+.L2357:
 	mov	w23, w26
-	b	.L2289
-.L2292:
+	b	.L2300
+.L2303:
 	ldrh	w8, [x2]
 	cmp	w8, w4
-	beq	.L2291
+	beq	.L2302
 	umaddl	x11, w25, w10, x0
 	add	w25, w25, 1
 	and	w25, w25, 65535
 	orr	w8, w23, w8, lsl 10
 	str	w8, [x11, 4]
-.L2291:
+.L2302:
 	add	x2, x2, 2
-.L2306:
+.L2317:
 	cmp	x2, x1
-	bne	.L2292
+	bne	.L2303
 	ldr	w2, [x29, 176]
 	mov	w1, w25
 	str	x5, [x29, 112]
@@ -16329,70 +16334,67 @@ FtlRecoverySuperblock:
 	umaddl	x25, w25, w2, x1
 	ldr	x5, [x29, 112]
 	mov	w2, 0
-.L2293:
+.L2304:
 	cmp	x25, x1
-	bne	.L2303
-	cbz	w2, .L2304
+	bne	.L2314
+	cbz	w2, .L2315
 	str	w0, [x24, #:lo12:.LANCHOR136]
-.L2304:
+.L2315:
 	add	w23, w23, 1
 	and	w23, w23, 65535
-	b	.L2290
-.L2303:
+	b	.L2301
+.L2314:
 	ldr	w8, [x1]
-	cbnz	w8, .L2294
+	cbnz	w8, .L2305
 	ldr	x8, [x1, 16]
 	ldrh	w13, [x8]
 	cmp	w13, w4
-	beq	.L2349
+	beq	.L2359
 	ldr	w8, [x8, 4]
 	cmn	w8, #1
-	beq	.L2349
+	beq	.L2359
 	cmn	w3, #1
-	bne	.L2351
+	bne	.L2361
 	ldrh	w2, [x5, x12, lsl 1]
 	cmp	w2, w4
-	bne	.L2296
-	cbz	w10, .L2351
-.L2296:
+	bne	.L2307
+	cbz	w10, .L2361
+.L2307:
 	cmp	w21, w0
 	mov	w2, w11
 	csel	w3, w3, w0, eq
-.L2295:
+.L2306:
 	mov	w28, w0
 	add	x1, x1, 56
 	mov	w0, w8
-	b	.L2293
-.L2294:
-	cbz	w2, .L2297
+	b	.L2304
+.L2305:
+	cbz	w2, .L2308
 	str	w0, [x24, #:lo12:.LANCHOR136]
-.L2297:
+.L2308:
 	adrp	x0, .LANCHOR235
 	ldrh	w1, [x19]
 	strh	w1, [x0, #:lo12:.LANCHOR235]
 	ldrb	w0, [x19, 8]
-	cbnz	w0, .L2287
+	cbnz	w0, .L2298
 	adrp	x0, .LANCHOR120
 	add	x0, x0, :lo12:.LANCHOR120
 	ldrh	w1, [x0, w23, sxtw 1]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2299
+	bne	.L2310
 	cmn	w3, #1
-	beq	.L2300
+	beq	.L2311
 	str	w3, [x24, #:lo12:.LANCHOR136]
-.L2287:
-	mov	w1, 1
+.L2298:
 	adrp	x0, .LANCHOR236
 	mov	w23, w26
+	mov	w1, 1
 	adrp	x28, .LANCHOR136
 	strh	w1, [x0, #:lo12:.LANCHOR236]
-	adrp	x0, .LANCHOR127
-	add	x0, x0, :lo12:.LANCHOR127
-	bl	FtlMapBlkWriteDumpData
 	add	x0, x28, :lo12:.LANCHOR136
 	str	x0, [x29, 112]
-.L2307:
+.L2318:
 	ldr	x2, [x29, 160]
 	adrp	x1, .LANCHOR8
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
@@ -16404,9 +16406,9 @@ FtlRecoverySuperblock:
 	str	x1, [x29, 128]
 	add	x2, x2, 8
 	add	x2, x19, x2, lsl 1
-.L2308:
+.L2319:
 	cmp	x2, x3
-	bne	.L2311
+	bne	.L2322
 	ldr	w2, [x29, 176]
 	mov	w1, w24
 	mov	x25, 0
@@ -16417,100 +16419,100 @@ FtlRecoverySuperblock:
 	adrp	x0, .LANCHOR235
 	add	x0, x0, :lo12:.LANCHOR235
 	str	x0, [x29, 120]
-.L2312:
+.L2323:
 	ldr	x0, [x29, 136]
 	cmp	x25, x0
-	bne	.L2338
+	bne	.L2348
 	ldrb	w0, [x19, 8]
 	add	w23, w23, 1
 	and	w23, w23, 65535
 	cmp	w0, 1
-	bne	.L2339
+	bne	.L2349
 	ldr	x0, [x29, 128]
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L2339
+	cbz	w0, .L2349
 	adrp	x0, .LANCHOR54
 	ldrh	w0, [x0, #:lo12:.LANCHOR54]
 	cmp	w0, w23
-	bne	.L2339
+	bne	.L2349
 	cmp	w20, w23
-	beq	.L2314
-.L2339:
+	beq	.L2325
+.L2349:
 	ldr	x0, [x29, 144]
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w23
-	bne	.L2307
+	bne	.L2318
 	ldr	x0, [x29, 160]
 	mov	w2, 65535
 	strh	w23, [x19, 2]
 	strh	wzr, [x19, 4]
 	ldrh	w1, [x0, #:lo12:.LANCHOR38]
 	mov	w0, 0
-.L2340:
+.L2350:
 	cmp	w0, w1
-	beq	.L2420
+	beq	.L2430
 	ldr	x4, [x29, 184]
 	ldrh	w3, [x4], 2
 	str	x4, [x29, 184]
 	cmp	w3, w2
-	beq	.L2341
+	beq	.L2351
 	strb	w0, [x19, 6]
-	b	.L2420
-.L2300:
+	b	.L2430
+.L2311:
 	cmp	w21, w7
-	beq	.L2301
+	beq	.L2312
 	str	w7, [x24, #:lo12:.LANCHOR136]
-	b	.L2287
-.L2301:
+	b	.L2298
+.L2312:
 	ldr	w0, [x24, #:lo12:.LANCHOR136]
-.L2429:
+.L2439:
 	sub	w0, w0, #1
-.L2423:
+.L2433:
 	str	w0, [x24, #:lo12:.LANCHOR136]
-	b	.L2287
-.L2299:
+	b	.L2298
+.L2310:
 	cmp	w28, w21
-	beq	.L2302
+	beq	.L2313
 	cmn	w28, #1
-	beq	.L2287
+	beq	.L2298
 	str	w28, [x24, #:lo12:.LANCHOR136]
-	b	.L2287
-.L2302:
+	b	.L2298
+.L2313:
 	ldr	w0, [x24, #:lo12:.LANCHOR136]
 	cmp	w21, w0
-	bne	.L2429
-	b	.L2287
-.L2349:
+	bne	.L2439
+	b	.L2298
+.L2359:
 	mov	w8, w0
 	mov	w0, w28
-	b	.L2295
-.L2351:
+	b	.L2306
+.L2361:
 	mov	w2, 1
-	b	.L2295
-.L2305:
+	b	.L2306
+.L2316:
 	mov	w0, -1
-	b	.L2423
-.L2311:
+	b	.L2433
+.L2322:
 	ldrh	w1, [x3]
 	cmp	w1, w6
-	beq	.L2309
+	beq	.L2320
 	mov	w4, 56
 	orr	w1, w23, w1, lsl 10
 	umaddl	x4, w24, w4, x0
 	str	w1, [x4, 4]
 	ldrb	w7, [x19, 8]
 	cmp	w7, 1
-	bne	.L2310
-	cbz	w5, .L2310
+	bne	.L2321
+	cbz	w5, .L2321
 	orr	w1, w1, -2147483648
 	str	w1, [x4, 4]
-.L2310:
+.L2321:
 	add	w24, w24, 1
 	and	w24, w24, 65535
-.L2309:
+.L2320:
 	add	x3, x3, 2
-	b	.L2308
-.L2338:
+	b	.L2319
+.L2348:
 	ldr	x4, [x22, #:lo12:.LANCHOR180]
 	add	x4, x4, x25
 	ldr	w5, [x4, 4]
@@ -16519,41 +16521,38 @@ FtlRecoverySuperblock:
 	bl	P2V_plane
 	and	w0, w0, 65535
 	cmp	w23, w26
-	bcc	.L2313
+	bcc	.L2324
 	ldr	w1, [x29, 180]
 	ccmp	w1, w0, 0, eq
-	bhi	.L2313
+	bhi	.L2324
 	cmp	w23, w20
 	ccmp	w27, w0, 0, eq
-	beq	.L2314
+	beq	.L2325
 	ldr	w0, [x4]
 	cmn	w0, #1
-	beq	.L2315
+	beq	.L2326
 	ldr	x3, [x4, 16]
 	mov	w0, 61589
 	ldrh	w1, [x3]
 	cmp	w1, w0
-	beq	.L2316
-.L2322:
+	beq	.L2327
 	ldrh	w0, [x19]
-.L2426:
+.L2435:
 	bl	decrement_vpc_count
-.L2313:
-	add	x25, x25, 56
-	b	.L2312
-.L2316:
+	b	.L2324
+.L2327:
 	ldr	w21, [x3, 4]
 	cmn	w21, #1
-	beq	.L2317
+	beq	.L2328
 	ldr	x0, [x29, 168]
 	ldr	w1, [x0, #:lo12:.LANCHOR160]
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2317
+	cbz	w0, .L2328
 	ldr	x1, [x29, 168]
 	add	w0, w21, 1
 	str	w0, [x1, #:lo12:.LANCHOR160]
-.L2317:
+.L2328:
 	ldp	w24, w0, [x3, 8]
 	add	x1, x29, 200
 	str	w0, [x29, 196]
@@ -16562,13 +16561,13 @@ FtlRecoverySuperblock:
 	bl	log2phys
 	ldr	w1, [x28, #:lo12:.LANCHOR136]
 	cmn	w1, #1
-	beq	.L2318
+	beq	.L2329
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2318
+	cbz	w0, .L2329
 	ldr	w1, [x29, 196]
 	cmn	w1, #1
-	beq	.L2319
+	beq	.L2330
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	mov	w2, 0
 	add	x0, x0, x25
@@ -16582,17 +16581,15 @@ FtlRecoverySuperblock:
 	add	x4, x0, x25
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	bne	.L2320
-.L2321:
+	bne	.L2331
+.L2332:
 	mov	w0, -1
 	str	w0, [x29, 196]
-	ldrh	w0, [x19]
-	bl	decrement_vpc_count
-.L2329:
+.L2339:
 	ldr	w3, [x29, 196]
 	cmn	w3, #1
-	beq	.L2313
-.L2344:
+	beq	.L2324
+.L2354:
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
 	and	w24, w0, 65535
@@ -16600,8 +16597,8 @@ FtlRecoverySuperblock:
 	mov	w3, w24
 	ldrh	w0, [x0, #:lo12:.LANCHOR40]
 	cmp	w0, w24
-	bhi	.L2334
-	mov	w2, 2494
+	bhi	.L2344
+	mov	w2, 2425
 	adrp	x1, .LANCHOR234
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR234
@@ -16614,48 +16611,50 @@ FtlRecoverySuperblock:
 	add	x0, x0, :lo12:.LC7
 	bl	printf
 	ldr	w3, [x29, 152]
-.L2334:
+.L2344:
 	adrp	x1, .LANCHOR84
 	ubfiz	x0, x24, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR84]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L2335
+	cbz	w0, .L2345
 	mov	w0, w3
-	b	.L2426
-.L2319:
+	b	.L2435
+.L2330:
 	ldp	w1, w0, [x29, 200]
 	cmp	w1, w0
-	bne	.L2322
+	bne	.L2324
 	mov	w2, 1
 	add	x1, x29, 196
 	mov	w0, w24
 	bl	log2phys
-	b	.L2322
-.L2320:
+.L2324:
+	add	x25, x25, 56
+	b	.L2323
+.L2331:
 	ldr	w0, [x3, 8]
 	cmp	w24, w0
-	bne	.L2321
+	bne	.L2332
 	ldr	w0, [x3, 4]
 	str	w0, [x29, 152]
 	str	x3, [x29, 104]
 	uxtw	x1, w0
 	ldr	w0, [x28, #:lo12:.LANCHOR136]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2321
+	cbz	w0, .L2332
 	ldp	w0, w1, [x29, 200]
 	ldr	x3, [x29, 104]
 	cmp	w0, w1
 	ldr	w1, [x29, 196]
-	bne	.L2324
-.L2424:
+	bne	.L2334
+.L2434:
 	mov	w0, w24
 	bl	FtlReUsePrevPpa
-	b	.L2321
-.L2324:
+	b	.L2332
+.L2334:
 	cmp	w0, w1
-	beq	.L2321
+	beq	.L2332
 	cmn	w0, #1
-	beq	.L2325
+	beq	.L2335
 	ldr	x3, [x4, 16]
 	mov	w2, 0
 	str	w0, [x4, 4]
@@ -16664,57 +16663,57 @@ FtlRecoverySuperblock:
 	mov	x0, x4
 	bl	FlashReadPages
 	ldr	x3, [x29, 104]
-.L2326:
+.L2336:
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	beq	.L2327
+	beq	.L2337
 	ldr	x0, [x29, 112]
 	ldr	w3, [x3, 4]
 	mov	w1, w3
 	ldr	w0, [x0]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2327
+	cbz	w0, .L2337
 	ldr	w0, [x29, 152]
 	mov	w1, w3
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2321
-.L2327:
+	cbz	w0, .L2332
+.L2337:
 	ldr	w1, [x29, 196]
-	b	.L2424
-.L2325:
+	b	.L2434
+.L2335:
 	str	w0, [x4]
-	b	.L2326
-.L2318:
+	b	.L2336
+.L2329:
 	ldp	w1, w0, [x29, 200]
 	cmp	w1, w0
-	beq	.L2329
+	beq	.L2339
 	mov	w2, 1
 	add	x1, x29, 204
 	mov	w0, w24
 	bl	log2phys
 	ldr	w3, [x29, 200]
 	cmn	w3, #1
-	beq	.L2329
+	beq	.L2339
 	ldr	w0, [x29, 196]
 	cmp	w3, w0
-	beq	.L2344
+	beq	.L2354
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
 	adrp	x1, .LANCHOR92
 	and	w0, w0, 65535
 	ldrh	w1, [x1, #:lo12:.LANCHOR92]
 	cmp	w1, w0
-	beq	.L2333
+	beq	.L2343
 	adrp	x1, .LANCHOR93
 	ldrh	w1, [x1, #:lo12:.LANCHOR93]
 	cmp	w1, w0
-	beq	.L2333
+	beq	.L2343
 	adrp	x1, .LANCHOR94
 	ldrh	w1, [x1, #:lo12:.LANCHOR94]
 	cmp	w1, w0
-	bne	.L2329
-.L2333:
+	bne	.L2339
+.L2343:
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	mov	w2, 0
 	mov	w1, 1
@@ -16725,63 +16724,63 @@ FtlRecoverySuperblock:
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L2329
+	beq	.L2339
 	ldr	x4, [x29, 152]
 	mov	w0, w21
 	ldr	w1, [x4, 4]
 	bl	ftl_cmp_data_ver
-	cbnz	w0, .L2329
+	cbnz	w0, .L2339
 	mov	w2, 1
 	add	x1, x29, 200
 	mov	w0, w24
 	bl	log2phys
-	b	.L2329
-.L2335:
+	b	.L2339
+.L2345:
 	mov	w1, w24
-	adrp	x0, .LC63
-	add	x0, x0, :lo12:.LC63
+	adrp	x0, .LC62
+	add	x0, x0, :lo12:.LC62
 	bl	printf
-	b	.L2313
-.L2315:
+	b	.L2324
+.L2326:
 	ldr	x1, [x29, 120]
 	mov	w2, w21
 	ldrh	w0, [x19]
 	strh	w0, [x1]
 	mov	w1, w5
-	adrp	x0, .LC64
-	add	x0, x0, :lo12:.LC64
+	adrp	x0, .LC63
+	add	x0, x0, :lo12:.LC63
 	bl	printf
 	adrp	x2, .LANCHOR237
 	ldr	w0, [x2, #:lo12:.LANCHOR237]
 	cmp	w0, 31
-	bhi	.L2336
+	bhi	.L2346
 	adrp	x1, .LANCHOR238
 	add	x1, x1, :lo12:.LANCHOR238
 	ldr	w3, [x29, 204]
 	str	w3, [x1, w0, uxtw 2]
 	add	w0, w0, 1
 	str	w0, [x2, #:lo12:.LANCHOR237]
-.L2336:
+.L2346:
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
 	ldr	w0, [x28, #:lo12:.LANCHOR136]
 	cmn	w0, #1
-	bne	.L2337
-.L2425:
+	bne	.L2347
+.L2436:
 	str	w21, [x28, #:lo12:.LANCHOR136]
-	b	.L2313
-.L2337:
+	b	.L2324
+.L2347:
 	cmp	w21, w0
-	bcs	.L2313
-	b	.L2425
-.L2341:
+	bcs	.L2324
+	b	.L2436
+.L2351:
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L2340
-.L2314:
+	b	.L2350
+.L2325:
 	strb	w27, [x19, 6]
 	strh	w20, [x19, 2]
-	b	.L2428
+	b	.L2438
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
 	.section	.text.FtlGcFreeTempBlock,"ax",@progbits
 	.align	2
@@ -16790,10 +16789,10 @@ FtlRecoverySuperblock:
 FtlGcFreeTempBlock:
 	adrp	x0, .LANCHOR77
 	ldr	w0, [x0, #:lo12:.LANCHOR77]
-	cbz	w0, .L2431
+	cbz	w0, .L2441
 	mov	w0, 0
 	ret
-.L2431:
+.L2441:
 	stp	x29, x30, [sp, -112]!
 	mov	w1, 65535
 	add	x29, sp, 0
@@ -16807,26 +16806,26 @@ FtlGcFreeTempBlock:
 	stp	x25, x26, [sp, 64]
 	cmp	w20, w1
 	str	x27, [sp, 80]
-	beq	.L2433
+	beq	.L2443
 	adrp	x1, .LANCHOR53
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	bl	FtlGcScanTempBlk
 	str	w0, [x29, 108]
 	cmn	w0, #1
-	beq	.L2433
+	beq	.L2443
 	adrp	x0, .LANCHOR79
 	ubfiz	x20, x20, 1, 16
 	ldr	x1, [x0, #:lo12:.LANCHOR79]
 	ldrh	w0, [x1, x20]
 	cmp	w0, 4
-	bls	.L2434
+	bls	.L2444
 	sub	w0, w0, #5
 	strh	w0, [x1, x20]
 	mov	w0, 1
 	bl	FtlEctTblFlush
-.L2434:
+.L2444:
 	ldr	w0, [x21, #:lo12:.LANCHOR135]
-	cbnz	w0, .L2435
+	cbnz	w0, .L2445
 	adrp	x0, .LANCHOR138
 	add	x0, x0, :lo12:.LANCHOR138
 	ldr	w1, [x0, 96]
@@ -16836,10 +16835,10 @@ FtlGcFreeTempBlock:
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
-.L2435:
+.L2445:
 	str	wzr, [x21, #:lo12:.LANCHOR135]
 	mov	w0, 1
-.L2430:
+.L2440:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -16847,13 +16846,13 @@ FtlGcFreeTempBlock:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2433:
+.L2443:
 	str	wzr, [x21, #:lo12:.LANCHOR135]
 	mov	w0, 65535
 	ldrh	w1, [x19, #:lo12:.LANCHOR94]
 	add	x21, x19, :lo12:.LANCHOR94
 	cmp	w1, w0
-	beq	.L2456
+	beq	.L2466
 	bl	FtlCacheWriteBack
 	adrp	x20, .LANCHOR111
 	adrp	x0, .LANCHOR53
@@ -16863,7 +16862,7 @@ FtlGcFreeTempBlock:
 	ldrh	w3, [x0, #:lo12:.LANCHOR53]
 	mul	w1, w1, w3
 	cmp	w2, w1
-	beq	.L2437
+	beq	.L2447
 	mov	w2, 163
 	adrp	x1, .LANCHOR239
 	adrp	x0, .LC5
@@ -16875,7 +16874,7 @@ FtlGcFreeTempBlock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2437:
+.L2447:
 	add	x0, x19, :lo12:.LANCHOR94
 	adrp	x23, .LANCHOR84
 	ldrh	w3, [x21, #:lo12:.LANCHOR53]
@@ -16894,27 +16893,27 @@ FtlGcFreeTempBlock:
 	ldr	w2, [x1, #:lo12:.LANCHOR161]
 	add	w0, w0, w2
 	str	w0, [x1, #:lo12:.LANCHOR161]
-.L2438:
+.L2448:
 	ldrh	w0, [x20, #:lo12:.LANCHOR111]
 	cmp	w0, w21
-	bhi	.L2442
+	bhi	.L2452
 	mov	w0, -1
 	bl	decrement_vpc_count
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L2443
+	cbz	w0, .L2453
 	ldrh	w1, [x19, #:lo12:.LANCHOR94]
-	adrp	x0, .LC65
-	add	x0, x0, :lo12:.LC65
+	adrp	x0, .LC64
+	add	x0, x0, :lo12:.LC64
 	bl	printf
-.L2443:
+.L2453:
 	ldrh	w0, [x19, #:lo12:.LANCHOR94]
 	ldr	x2, [x23, #:lo12:.LANCHOR84]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L2444
+	cbz	w1, .L2454
 	bl	INSERT_DATA_LIST
-.L2445:
+.L2455:
 	adrp	x0, .LANCHOR109
 	mov	w21, -1
 	strh	wzr, [x20, #:lo12:.LANCHOR111]
@@ -16922,22 +16921,22 @@ FtlGcFreeTempBlock:
 	strh	wzr, [x0, #:lo12:.LANCHOR109]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
+	adrp	x0, .LANCHOR204
+	strh	w21, [x0, #:lo12:.LANCHOR204]
 	adrp	x0, .LANCHOR89
 	ldrh	w1, [x0, #:lo12:.LANCHOR89]
 	adrp	x0, .LANCHOR223
 	ldrh	w0, [x0, #:lo12:.LANCHOR223]
 	add	w0, w0, w0, lsl 1
 	cmp	w1, w0, lsr 2
-	ble	.L2456
-	adrp	x0, .LANCHOR204
-	mov	w1, 20
-	strh	w21, [x0, #:lo12:.LANCHOR204]
+	ble	.L2466
 	adrp	x0, .LANCHOR176
+	mov	w1, 20
 	strh	w1, [x0, #:lo12:.LANCHOR176]
-.L2456:
+.L2466:
 	mov	w0, 0
-	b	.L2430
-.L2442:
+	b	.L2440
+.L2452:
 	adrp	x0, .LANCHOR112
 	mov	w24, 12
 	ldr	x27, [x0, #:lo12:.LANCHOR112]
@@ -16946,7 +16945,7 @@ FtlGcFreeTempBlock:
 	add	x22, x27, x24
 	ldr	w1, [x22, 8]
 	cmp	w1, w0
-	bcc	.L2439
+	bcc	.L2449
 	mov	w2, 168
 	mov	x1, x26
 	adrp	x0, .LC5
@@ -16957,7 +16956,7 @@ FtlGcFreeTempBlock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2439:
+.L2449:
 	ldr	w0, [x22, 8]
 	add	x1, x29, 108
 	mov	w2, 0
@@ -16965,7 +16964,7 @@ FtlGcFreeTempBlock:
 	ldr	w0, [x27, x24]
 	ldr	w1, [x29, 108]
 	cmp	w0, w1
-	bne	.L2440
+	bne	.L2450
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	mov	w24, w0
@@ -16974,21 +16973,21 @@ FtlGcFreeTempBlock:
 	add	x1, x22, 4
 	bl	log2phys
 	mov	w0, w24
-.L2455:
+.L2465:
 	bl	decrement_vpc_count
-.L2441:
+.L2451:
 	add	w21, w21, 1
 	and	w21, w21, 65535
-	b	.L2438
-.L2440:
+	b	.L2448
+.L2450:
 	ldr	w0, [x22, 4]
 	cmp	w1, w0
-	beq	.L2441
+	beq	.L2451
 	ldrh	w0, [x19, #:lo12:.LANCHOR94]
-	b	.L2455
-.L2444:
+	b	.L2465
+.L2454:
 	bl	INSERT_FREE_LIST
-	b	.L2445
+	b	.L2455
 	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
 	.section	.text.FtlGcPageRecovery,"ax",@progbits
 	.align	2
@@ -17007,7 +17006,7 @@ FtlGcPageRecovery:
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bcc	.L2457
+	bcc	.L2467
 	adrp	x0, .LANCHOR127
 	add	x0, x0, :lo12:.LANCHOR127
 	bl	FtlMapBlkWriteDumpData
@@ -17015,7 +17014,7 @@ FtlGcPageRecovery:
 	bl	FtlGcFreeTempBlock
 	adrp	x0, .LANCHOR135
 	str	wzr, [x0, #:lo12:.LANCHOR135]
-.L2457:
+.L2467:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -17062,27 +17061,27 @@ FtlSysBlkInit:
 	strh	w1, [x0, #:lo12:.LANCHOR235]
 	adrp	x0, .LANCHOR39
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR236
+	adrp	x20, .LANCHOR236
 	ldrh	w0, [x0, #:lo12:.LANCHOR39]
-	strh	wzr, [x19, #:lo12:.LANCHOR236]
+	strh	wzr, [x20, #:lo12:.LANCHOR236]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlScanSysBlk
 	adrp	x0, .LANCHOR209
 	ldrh	w1, [x0, #:lo12:.LANCHOR209]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2463
-.L2465:
-	mov	w20, -1
-.L2462:
-	mov	w0, w20
+	bne	.L2473
+.L2475:
+	mov	w19, -1
+.L2472:
+	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2463:
+.L2473:
 	bl	FtlLoadSysInfo
-	mov	w20, w0
-	cbnz	w0, .L2465
+	mov	w19, w0
+	cbnz	w0, .L2475
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -17100,16 +17099,17 @@ FtlSysBlkInit:
 	add	x2, x3, x2, uxtw 4
 	add	x1, x0, 4
 	add	x0, x0, x2
-.L2466:
+.L2476:
 	cmp	x1, x0
-	bne	.L2468
-	ldrh	w0, [x19, #:lo12:.LANCHOR236]
-	cbnz	w0, .L2467
-	b	.L2462
-.L2468:
+	bne	.L2478
+	ldrh	w0, [x20, #:lo12:.LANCHOR236]
+	cbnz	w0, .L2477
+	bl	l2p_flush
+	b	.L2481
+.L2478:
 	ldr	w2, [x1], 16
-	tbz	w2, #31, .L2466
-.L2467:
+	tbz	w2, #31, .L2476
+.L2477:
 	adrp	x0, .LANCHOR84
 	adrp	x1, .LANCHOR92
 	ldr	x2, [x0, #:lo12:.LANCHOR84]
@@ -17137,12 +17137,6 @@ FtlSysBlkInit:
 	ldrh	w1, [x4, #:lo12:.LANCHOR53]
 	strh	w1, [x0, 2]
 	strh	wzr, [x0, 4]
-	adrp	x0, .LANCHOR127
-	add	x0, x0, :lo12:.LANCHOR127
-	bl	FtlMapBlkWriteDumpData
-	adrp	x0, .LANCHOR215
-	add	x0, x0, :lo12:.LANCHOR215
-	bl	FtlMapBlkWriteDumpData
 	adrp	x0, .LANCHOR81
 	add	x0, x0, :lo12:.LANCHOR81
 	ldrh	w1, [x0, 30]
@@ -17150,8 +17144,9 @@ FtlSysBlkInit:
 	strh	w1, [x0, 30]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
+.L2481:
 	bl	FtlVpcTblFlush
-	b	.L2462
+	b	.L2472
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.section	.text.FtlLowFormat,"ax",@progbits
 	.align	2
@@ -17160,7 +17155,7 @@ FtlSysBlkInit:
 FtlLowFormat:
 	adrp	x0, .LANCHOR77
 	ldr	w0, [x0, #:lo12:.LANCHOR77]
-	cbnz	w0, .L2505
+	cbnz	w0, .L2514
 	stp	x29, x30, [sp, -80]!
 	adrp	x0, .LANCHOR195
 	mov	w1, 0
@@ -17188,9 +17183,9 @@ FtlLowFormat:
 	ldrh	w0, [x25, #:lo12:.LANCHOR39]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	w0, .L2476
+	cbz	w0, .L2485
 	bl	FtlMakeBbt
-.L2476:
+.L2485:
 	adrp	x22, .LANCHOR56
 	adrp	x0, .LANCHOR186
 	mov	w6, 23752
@@ -17201,31 +17196,31 @@ FtlLowFormat:
 	lsl	w1, w1, 7
 	ldr	x5, [x0, #:lo12:.LANCHOR187]
 	mov	w0, 0
-.L2477:
+.L2486:
 	cmp	w0, w1
-	blt	.L2478
+	blt	.L2487
 	adrp	x21, .LANCHOR40
 	adrp	x19, .LANCHOR41
 	add	x26, x19, :lo12:.LANCHOR41
 	mov	w23, 0
 	ldrh	w24, [x21, #:lo12:.LANCHOR40]
-.L2479:
+.L2488:
 	ldrh	w0, [x26]
 	cmp	w0, w24
-	bhi	.L2480
+	bhi	.L2489
 	adrp	x24, .LANCHOR38
 	sub	w1, w23, #2
 	ldrh	w0, [x24, #:lo12:.LANCHOR38]
 	cmp	w1, w0, lsl 1
-	bgt	.L2481
-.L2485:
+	bgt	.L2490
+.L2494:
 	add	x26, x21, :lo12:.LANCHOR40
 	mov	w23, 0
 	mov	w25, 0
-.L2482:
+.L2491:
 	ldrh	w0, [x26]
 	cmp	w0, w25
-	bhi	.L2486
+	bhi	.L2495
 	adrp	x0, .LANCHOR74
 	ldrh	w1, [x19, #:lo12:.LANCHOR41]
 	ldrh	w3, [x24, #:lo12:.LANCHOR38]
@@ -17242,47 +17237,47 @@ FtlLowFormat:
 	mov	w4, 24
 	mul	w4, w3, w4
 	cmp	w23, w4
-	ble	.L2487
+	ble	.L2496
 	sub	w2, w2, w23
 	udiv	w2, w2, w3
 	str	w2, [x0, #:lo12:.LANCHOR73]
 	lsr	w2, w2, 5
 	add	w2, w2, 24
 	strh	w2, [x1, #:lo12:.LANCHOR223]
-.L2487:
+.L2496:
 	adrp	x2, .LANCHOR28
 	ldr	w2, [x2, #:lo12:.LANCHOR28]
 	cmp	w2, 1
-	bne	.L2488
+	bne	.L2497
 	udiv	w4, w23, w3
 	ldrh	w2, [x1, #:lo12:.LANCHOR223]
 	add	w4, w4, w2
 	add	w4, w2, w4, asr 2
 	strh	w4, [x1, #:lo12:.LANCHOR223]
-.L2488:
+.L2497:
 	adrp	x2, .LANCHOR8
 	ldrb	w2, [x2, #:lo12:.LANCHOR8]
-	cbz	w2, .L2489
+	cbz	w2, .L2498
 	udiv	w4, w23, w3
 	ldrh	w2, [x1, #:lo12:.LANCHOR223]
 	add	w4, w4, w2
 	add	w4, w2, w4, asr 2
 	strh	w4, [x1, #:lo12:.LANCHOR223]
-.L2489:
+.L2498:
 	adrp	x2, .LANCHOR49
 	ldrh	w2, [x2, #:lo12:.LANCHOR49]
-	cbz	w2, .L2491
+	cbz	w2, .L2500
 	ldrh	w4, [x1, #:lo12:.LANCHOR223]
 	add	w4, w4, w2, lsr 1
 	strh	w4, [x1, #:lo12:.LANCHOR223]
 	mul	w4, w2, w3
 	cmp	w23, w4
-	bge	.L2491
+	bge	.L2500
 	add	w2, w2, 32
 	str	w6, [x0, #:lo12:.LANCHOR73]
 	add	w2, w5, w2
 	strh	w2, [x1, #:lo12:.LANCHOR223]
-.L2491:
+.L2500:
 	ldrh	w2, [x1, #:lo12:.LANCHOR223]
 	adrp	x25, .LANCHOR222
 	ldr	w1, [x0, #:lo12:.LANCHOR73]
@@ -17326,20 +17321,20 @@ FtlLowFormat:
 	ldr	x0, [x0, #:lo12:.LANCHOR0]
 	strb	wzr, [x19, 6]
 	bl	ftl_memset
-.L2493:
+.L2502:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L2494
+	cbnz	w1, .L2503
 	ldr	x1, [x24, #:lo12:.LANCHOR84]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L2493
-.L2478:
+	b	.L2502
+.L2487:
 	ubfiz	x3, x0, 2, 16
 	mvn	w2, w0
 	orr	w2, w0, w2, lsl 16
@@ -17347,8 +17342,8 @@ FtlLowFormat:
 	and	w0, w0, 65535
 	str	w2, [x4, x3]
 	str	w6, [x5, x3]
-	b	.L2477
-.L2480:
+	b	.L2486
+.L2489:
 	mov	w0, w24
 	mov	w1, 1
 	add	w24, w24, 1
@@ -17356,8 +17351,8 @@ FtlLowFormat:
 	add	w23, w23, w0
 	and	w24, w24, 65535
 	and	w23, w23, 65535
-	b	.L2479
-.L2481:
+	b	.L2488
+.L2490:
 	udiv	w0, w23, w0
 	adrp	x1, .LANCHOR66
 	ldr	w23, [x1, #:lo12:.LANCHOR66]
@@ -17367,17 +17362,17 @@ FtlLowFormat:
 	add	x25, x19, :lo12:.LANCHOR41
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	w23, [x21, #:lo12:.LANCHOR40]
-.L2483:
+.L2492:
 	ldrh	w0, [x25]
 	cmp	w0, w23
-	bls	.L2485
+	bls	.L2494
 	mov	w0, w23
 	add	w23, w23, 1
 	mov	w1, 1
 	and	w23, w23, 65535
 	bl	FtlLowFormatEraseBlock
-	b	.L2483
-.L2486:
+	b	.L2492
+.L2495:
 	mov	w0, w25
 	mov	w1, 0
 	add	w25, w25, 1
@@ -17385,8 +17380,8 @@ FtlLowFormat:
 	add	w23, w23, w0
 	and	w25, w25, 65535
 	and	w23, w23, 65535
-	b	.L2482
-.L2494:
+	b	.L2491
+.L2503:
 	ldr	w1, [x20, #:lo12:.LANCHOR159]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
@@ -17406,20 +17401,20 @@ FtlLowFormat:
 	mov	w1, 1
 	strb	wzr, [x0, 6]
 	strb	w1, [x0, 8]
-.L2495:
+.L2504:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L2496
+	cbnz	w1, .L2505
 	ldr	x1, [x24, #:lo12:.LANCHOR84]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L2495
-.L2496:
+	b	.L2504
+.L2505:
 	ldr	w1, [x20, #:lo12:.LANCHOR159]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
@@ -17445,11 +17440,11 @@ FtlLowFormat:
 	str	w0, [x20, #:lo12:.LANCHOR159]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	w0, .L2475
+	cbnz	w0, .L2484
 	adrp	x0, .LANCHOR231
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR231]
-.L2475:
+.L2484:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -17457,7 +17452,7 @@ FtlLowFormat:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2505:
+.L2514:
 	mov	w0, 0
 	ret
 	.size	FtlLowFormat, .-FtlLowFormat
@@ -17474,11 +17469,11 @@ Ftl_get_new_temp_ppa:
 	mov	x19, x0
 	ldrh	w3, [x0, #:lo12:.LANCHOR94]
 	cmp	w3, w2
-	beq	.L2509
+	beq	.L2518
 	add	x1, x0, :lo12:.LANCHOR94
 	ldrh	w0, [x1, 4]
-	cbnz	w0, .L2510
-.L2509:
+	cbnz	w0, .L2519
+.L2518:
 	bl	FtlCacheWriteBack
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
@@ -17493,7 +17488,7 @@ Ftl_get_new_temp_ppa:
 	mov	w0, 0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L2510:
+.L2519:
 	add	x0, x19, :lo12:.LANCHOR94
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -17506,29 +17501,29 @@ Ftl_get_new_temp_ppa:
 Ftl_gc_temp_data_write_back:
 	adrp	x0, .LANCHOR77
 	ldr	w0, [x0, #:lo12:.LANCHOR77]
-	cbz	w0, .L2513
+	cbz	w0, .L2522
 	mov	w0, 0
 	ret
-.L2516:
+.L2525:
 	mov	w0, 0
-.L2512:
+.L2521:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2513:
+.L2522:
 	stp	x29, x30, [sp, -32]!
 	adrp	x0, .LANCHOR8
 	add	x29, sp, 0
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR103
-	cbz	w0, .L2515
+	cbz	w0, .L2524
 	ldr	w0, [x19, #:lo12:.LANCHOR103]
-	tbz	x0, 0, .L2515
+	tbz	x0, 0, .L2524
 	adrp	x0, .LANCHOR94+4
 	ldrh	w0, [x0, #:lo12:.LANCHOR94+4]
-	cbnz	w0, .L2516
-.L2515:
+	cbnz	w0, .L2525
+.L2524:
 	adrp	x20, .LANCHOR181
 	ldr	w1, [x19, #:lo12:.LANCHOR103]
 	mov	w3, 0
@@ -17538,26 +17533,26 @@ Ftl_gc_temp_data_write_back:
 	bl	FlashProgPages
 	mov	w11, 0
 	mov	w12, 56
-.L2517:
+.L2526:
 	ldr	w1, [x19]
 	cmp	w11, w1
-	bcc	.L2519
+	bcc	.L2528
 	ldr	x0, [x20, #:lo12:.LANCHOR181]
 	bl	FtlGcBufFree
 	str	wzr, [x19]
 	adrp	x0, .LANCHOR94+4
 	ldrh	w0, [x0, #:lo12:.LANCHOR94+4]
-	cbnz	w0, .L2516
+	cbnz	w0, .L2525
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
-	b	.L2529
-.L2519:
+	b	.L2538
+.L2528:
 	umull	x0, w11, w12
 	ldr	x2, [x20, #:lo12:.LANCHOR181]
 	add	x1, x2, x0
 	ldr	w2, [x2, x0]
 	cmn	w2, #1
-	bne	.L2518
+	bne	.L2527
 	adrp	x0, .LANCHOR94
 	adrp	x3, .LANCHOR84
 	ldrh	w4, [x0, #:lo12:.LANCHOR94]
@@ -17574,17 +17569,17 @@ Ftl_gc_temp_data_write_back:
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
 	bl	FtlGcPageVarInit
-.L2529:
+.L2538:
 	mov	w0, 1
-	b	.L2512
-.L2518:
+	b	.L2521
+.L2527:
 	ldr	x0, [x1, 16]
 	ldr	w1, [x1, 4]
 	ldp	w2, w0, [x0, 8]
 	bl	FtlGcUpdatePage
 	add	w11, w11, 1
 	and	w11, w11, 65535
-	b	.L2517
+	b	.L2526
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
 	.section	.text.rk_ftl_garbage_collect,"ax",@progbits
 	.align	2
@@ -17593,7 +17588,7 @@ Ftl_gc_temp_data_write_back:
 rk_ftl_garbage_collect:
 	adrp	x1, .LANCHOR77
 	ldr	w1, [x1, #:lo12:.LANCHOR77]
-	cbnz	w1, .L2582
+	cbnz	w1, .L2591
 	stp	x29, x30, [sp, -192]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
@@ -17603,79 +17598,79 @@ rk_ftl_garbage_collect:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w1, .L2584
+	cbnz	w1, .L2593
 	adrp	x1, .LANCHOR86
 	ldrh	w1, [x1, #:lo12:.LANCHOR86]
 	cmp	w1, 47
-	bls	.L2584
+	bls	.L2593
 	adrp	x5, .LANCHOR114
 	mov	w2, 65535
 	ldrh	w8, [x5, #:lo12:.LANCHOR114]
 	cmp	w8, w2
-	beq	.L2532
+	beq	.L2541
 	adrp	x7, .LANCHOR113
 	ldrh	w1, [x7, #:lo12:.LANCHOR113]
 	cmp	w1, w2
-	bne	.L2532
+	bne	.L2541
 	adrp	x3, .LANCHOR115
 	ldrh	w6, [x3, #:lo12:.LANCHOR115]
 	cmp	w6, w1
-	beq	.L2532
+	beq	.L2541
 	adrp	x2, .LANCHOR116
 	ldrh	w4, [x2, #:lo12:.LANCHOR116]
 	cmp	w4, w1
-	beq	.L2532
+	beq	.L2541
 	mov	w1, -1
 	strh	w8, [x7, #:lo12:.LANCHOR113]
 	strh	w6, [x5, #:lo12:.LANCHOR114]
 	strh	w4, [x3, #:lo12:.LANCHOR115]
 	strh	w1, [x2, #:lo12:.LANCHOR116]
-.L2532:
-	cbnz	w0, .L2585
+.L2541:
+	cbnz	w0, .L2594
 	adrp	x0, .LANCHOR89
 	ldrh	w0, [x0, #:lo12:.LANCHOR89]
 	cmp	w0, 24
-	bhi	.L2586
+	bhi	.L2595
 	adrp	x1, .LANCHOR53
 	cmp	w0, 16
 	ldrh	w20, [x1, #:lo12:.LANCHOR53]
-	bls	.L2535
+	bls	.L2544
 	lsr	w20, w20, 5
-.L2534:
+.L2543:
 	adrp	x2, .LANCHOR176
 	mov	x3, x2
 	ldrh	w1, [x2, #:lo12:.LANCHOR176]
 	cmp	w1, w0
-	bcs	.L2538
+	bcs	.L2547
 	adrp	x0, .LANCHOR94
 	mov	w1, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR94]
 	cmp	w0, w1
-	bne	.L2539
+	bne	.L2548
 	adrp	x1, .LANCHOR113
 	ldrh	w1, [x1, #:lo12:.LANCHOR113]
 	cmp	w1, w0
-	bne	.L2539
+	bne	.L2548
 	adrp	x0, .LANCHOR240
 	ldrh	w0, [x0, #:lo12:.LANCHOR240]
-	cbnz	w0, .L2540
+	cbnz	w0, .L2549
 	adrp	x1, .LANCHOR73
 	adrp	x4, .LANCHOR101
 	ldr	w1, [x1, #:lo12:.LANCHOR73]
 	ldr	w4, [x4, #:lo12:.LANCHOR101]
 	add	w1, w1, w1, lsl 1
 	cmp	w4, w1, lsr 2
-	bcs	.L2541
-.L2540:
+	bcs	.L2550
+.L2549:
 	adrp	x1, .LANCHOR223
 	ldrh	w1, [x1, #:lo12:.LANCHOR223]
 	add	w1, w1, w1, lsl 1
 	asr	w1, w1, 2
 	strh	w1, [x3, #:lo12:.LANCHOR176]
-.L2542:
+.L2551:
 	adrp	x1, .LANCHOR172
 	str	wzr, [x1, #:lo12:.LANCHOR172]
-.L2530:
+.L2539:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -17683,82 +17678,82 @@ rk_ftl_garbage_collect:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L2535:
+.L2544:
 	cmp	w0, 12
-	bls	.L2536
+	bls	.L2545
 	lsr	w20, w20, 4
-	b	.L2534
-.L2536:
+	b	.L2543
+.L2545:
 	cmp	w0, 8
-	bls	.L2534
+	bls	.L2543
 	lsr	w20, w20, 2
-	b	.L2534
-.L2586:
+	b	.L2543
+.L2595:
 	mov	w20, 1
-	b	.L2534
-.L2541:
+	b	.L2543
+.L2550:
 	mov	w1, 18
 	strh	w1, [x2, #:lo12:.LANCHOR176]
-	b	.L2542
-.L2539:
+	b	.L2551
+.L2548:
 	adrp	x0, .LANCHOR223
 	ldrh	w0, [x0, #:lo12:.LANCHOR223]
 	add	w0, w0, w0, lsl 1
 	asr	w0, w0, 2
 	strh	w0, [x3, #:lo12:.LANCHOR176]
-.L2538:
+.L2547:
 	adrp	x0, .LANCHOR117
 	ldrh	w0, [x0, #:lo12:.LANCHOR117]
-	cbz	w0, .L2533
+	cbz	w0, .L2542
 	add	w20, w20, 32
 	and	w20, w20, 65535
-.L2533:
+.L2542:
 	adrp	x19, .LANCHOR204
 	mov	w0, 65535
 	ldrh	w2, [x19, #:lo12:.LANCHOR204]
 	cmp	w2, w0
-	bne	.L2545
+	bne	.L2554
 	adrp	x0, .LANCHOR113
 	ldrh	w1, [x0, #:lo12:.LANCHOR113]
 	cmp	w1, w2
-	beq	.L2546
+	beq	.L2555
 	adrp	x2, .LANCHOR84
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR84]
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L2547
+	cbnz	w1, .L2556
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR113]
-.L2547:
+.L2556:
 	ldrh	w1, [x0, #:lo12:.LANCHOR113]
 	strh	w1, [x19, #:lo12:.LANCHOR204]
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR113]
-.L2546:
+.L2555:
 	add	x0, x19, :lo12:.LANCHOR204
 	mov	w1, 65535
 	strb	wzr, [x0, 8]
 	ldrh	w0, [x19, #:lo12:.LANCHOR204]
 	cmp	w0, w1
-	beq	.L2545
+	beq	.L2554
 	bl	IsBlkInGcList
-	cbz	w0, .L2549
+	cbz	w0, .L2558
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR204]
-.L2549:
+.L2558:
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L2550
+	cbz	w0, .L2559
 	ldrh	w0, [x19, #:lo12:.LANCHOR204]
 	add	x3, x19, :lo12:.LANCHOR204
 	bl	ftl_get_blk_mode
 	strb	w0, [x3, 8]
-.L2550:
+.L2559:
 	ldrh	w1, [x19, #:lo12:.LANCHOR204]
 	mov	w0, 65535
 	add	x22, x19, :lo12:.LANCHOR204
 	cmp	w1, w0
-	beq	.L2545
+	beq	.L2554
 	mov	x0, x22
 	bl	make_superblock
 	adrp	x0, .LANCHOR241
@@ -17771,31 +17766,31 @@ rk_ftl_garbage_collect:
 	ldrh	w1, [x0, x1, lsl 1]
 	adrp	x0, .LANCHOR242
 	strh	w1, [x0, #:lo12:.LANCHOR242]
-.L2545:
+.L2554:
 	adrp	x0, .LANCHOR92
 	ldrh	w1, [x19, #:lo12:.LANCHOR204]
 	str	x0, [x29, 144]
 	ldrh	w2, [x0, #:lo12:.LANCHOR92]
 	cmp	w2, w1
-	beq	.L2551
+	beq	.L2560
 	adrp	x0, .LANCHOR93
 	str	x0, [x29, 136]
 	ldrh	w2, [x0, #:lo12:.LANCHOR93]
 	cmp	w2, w1
-	beq	.L2551
+	beq	.L2560
 	adrp	x23, .LANCHOR178
 	add	x0, x23, :lo12:.LANCHOR178
 	str	x0, [x29, 168]
-.L2552:
+.L2561:
 	ldrh	w1, [x19, #:lo12:.LANCHOR204]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2553
+	bne	.L2562
 	adrp	x0, .LANCHOR172
 	adrp	x22, .LANCHOR53
 	add	x22, x22, :lo12:.LANCHOR53
 	str	wzr, [x0, #:lo12:.LANCHOR172]
-.L2554:
+.L2563:
 	ldrh	w5, [x23, #:lo12:.LANCHOR178]
 	add	x7, x23, :lo12:.LANCHOR178
 	mov	w0, w5
@@ -17804,28 +17799,28 @@ rk_ftl_garbage_collect:
 	strh	w6, [x19, #:lo12:.LANCHOR204]
 	mov	w0, 65535
 	cmp	w6, w0
-	bne	.L2555
+	bne	.L2564
 	strh	wzr, [x7]
 	mov	w0, 8
-	b	.L2530
-.L2585:
+	b	.L2539
+.L2594:
 	mov	w20, 1
-	b	.L2533
-.L2551:
+	b	.L2542
+.L2560:
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR204]
-.L2621:
+.L2630:
 	adrp	x0, .LANCHOR240
 	ldrh	w0, [x0, #:lo12:.LANCHOR240]
-	b	.L2530
-.L2555:
+	b	.L2539
+.L2564:
 	mov	w0, w6
 	bl	IsBlkInGcList
 	add	w5, w5, 1
-	cbz	w0, .L2556
+	cbz	w0, .L2565
 	strh	w5, [x23, #:lo12:.LANCHOR178]
-	b	.L2554
-.L2556:
+	b	.L2563
+.L2565:
 	adrp	x24, .LANCHOR84
 	adrp	x4, .LANCHOR38
 	ldrh	w0, [x22]
@@ -17837,29 +17832,29 @@ rk_ftl_garbage_collect:
 	ldrh	w3, [x2, x1]
 	mul	w0, w0, w4
 	cmp	w3, w0, asr 1
-	bgt	.L2558
+	bgt	.L2567
 	cmp	w5, 48
-	bls	.L2559
+	bls	.L2568
 	cmp	w3, 8
-	bls	.L2559
+	bls	.L2568
 	adrp	x3, .LANCHOR109
 	ldrh	w3, [x3, #:lo12:.LANCHOR109]
 	cmp	w3, 35
-	bhi	.L2559
-.L2558:
+	bhi	.L2568
+.L2567:
 	ldr	x3, [x29, 168]
 	strh	wzr, [x3]
-.L2559:
+.L2568:
 	ldrh	w1, [x2, x1]
 	cmp	w0, w1
-	bgt	.L2560
+	bgt	.L2569
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR204]
 	adrp	x0, .LANCHOR178
 	strh	wzr, [x0, #:lo12:.LANCHOR178]
-	b	.L2621
-.L2560:
-	cbnz	w1, .L2561
+	b	.L2630
+.L2569:
+	cbnz	w1, .L2570
 	mov	w0, -1
 	bl	decrement_vpc_count
 	ldr	x0, [x29, 168]
@@ -17867,22 +17862,22 @@ rk_ftl_garbage_collect:
 	ldrh	w0, [x0]
 	add	w0, w0, 1
 	strh	w0, [x1]
-	b	.L2554
-.L2561:
+	b	.L2563
+.L2570:
 	adrp	x0, .LANCHOR8
 	add	x3, x19, :lo12:.LANCHOR204
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
 	strb	wzr, [x3, 8]
-	cbz	w0, .L2562
+	cbz	w0, .L2571
 	mov	w0, w6
 	bl	ftl_get_blk_mode
 	strb	w0, [x3, 8]
-.L2562:
+.L2571:
 	ldr	x0, [x29, 144]
 	ldrh	w0, [x0, #:lo12:.LANCHOR92]
 	cmp	w0, w6
-	bne	.L2563
-	mov	w2, 851
+	bne	.L2572
+	mov	w2, 857
 	adrp	x1, .LANCHOR243
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR243
@@ -17893,13 +17888,13 @@ rk_ftl_garbage_collect:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2563:
+.L2572:
 	ldr	x0, [x29, 136]
 	ldrh	w1, [x19, #:lo12:.LANCHOR204]
 	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w1, w0
-	bne	.L2564
-	mov	w2, 852
+	bne	.L2573
+	mov	w2, 858
 	adrp	x1, .LANCHOR243
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR243
@@ -17910,13 +17905,13 @@ rk_ftl_garbage_collect:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2564:
+.L2573:
 	adrp	x0, .LANCHOR94
 	ldrh	w1, [x19, #:lo12:.LANCHOR204]
 	ldrh	w0, [x0, #:lo12:.LANCHOR94]
 	cmp	w1, w0
-	bne	.L2565
-	mov	w2, 853
+	bne	.L2574
+	mov	w2, 859
 	adrp	x1, .LANCHOR243
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR243
@@ -17927,7 +17922,7 @@ rk_ftl_garbage_collect:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2565:
+.L2574:
 	add	x22, x19, :lo12:.LANCHOR204
 	mov	x0, x22
 	bl	make_superblock
@@ -17940,7 +17935,7 @@ rk_ftl_garbage_collect:
 	strh	wzr, [x22, 2]
 	strh	w1, [x0, #:lo12:.LANCHOR242]
 	strb	wzr, [x22, 6]
-.L2553:
+.L2562:
 	mov	w0, 1
 	str	w0, [x21, #:lo12:.LANCHOR171]
 	adrp	x0, .LANCHOR8
@@ -17948,29 +17943,29 @@ rk_ftl_garbage_collect:
 	stp	x0, x1, [x29, 120]
 	ldrb	w2, [x0, #:lo12:.LANCHOR8]
 	ldrh	w26, [x1, #:lo12:.LANCHOR53]
-	cbz	w2, .L2566
+	cbz	w2, .L2575
 	add	x0, x19, :lo12:.LANCHOR204
 	ldrb	w0, [x0, 8]
 	cmp	w0, 1
-	bne	.L2566
+	bne	.L2575
 	adrp	x0, .LANCHOR54
 	ldrh	w26, [x0, #:lo12:.LANCHOR54]
-.L2566:
+.L2575:
 	add	x0, x19, :lo12:.LANCHOR204
 	ldrh	w0, [x0, 2]
 	add	w1, w0, w20
 	cmp	w1, w26
-	ble	.L2567
+	ble	.L2576
 	sub	w20, w26, w0
 	and	w20, w20, 65535
-.L2567:
+.L2576:
 	adrp	x0, .LANCHOR241
 	mov	w27, 0
 	add	x0, x0, :lo12:.LANCHOR241
 	str	x0, [x29, 160]
-.L2568:
+.L2577:
 	cmp	w20, w27, uxth
-	bls	.L2576
+	bls	.L2585
 	add	x1, x19, :lo12:.LANCHOR204
 	adrp	x0, .LANCHOR38
 	adrp	x24, .LANCHOR107
@@ -17983,23 +17978,23 @@ rk_ftl_garbage_collect:
 	mov	w6, 65535
 	add	w4, w4, w27
 	mov	w5, 56
-	b	.L2577
-.L2570:
+	b	.L2586
+.L2579:
 	ldrh	w3, [x1]
 	cmp	w3, w6
-	beq	.L2569
+	beq	.L2578
 	umaddl	x8, w22, w5, x0
 	add	w22, w22, 1
 	and	w22, w22, 65535
 	orr	w3, w4, w3, lsl 10
 	str	w3, [x8, 4]
-.L2569:
+.L2578:
 	add	w2, w2, 1
 	add	x1, x1, 2
 	and	w2, w2, 65535
-.L2577:
+.L2586:
 	cmp	w2, w7
-	bne	.L2570
+	bne	.L2579
 	add	x1, x19, :lo12:.LANCHOR204
 	adrp	x25, .LANCHOR103
 	add	x25, x25, :lo12:.LANCHOR103
@@ -18010,27 +18005,27 @@ rk_ftl_garbage_collect:
 	umull	x0, w22, w0
 	mov	x22, 0
 	str	x0, [x29, 152]
-.L2571:
+.L2580:
 	ldr	x0, [x29, 152]
 	cmp	x22, x0
-	bne	.L2575
+	bne	.L2584
 	add	w27, w27, 1
-	b	.L2568
-.L2575:
+	b	.L2577
+.L2584:
 	ldr	x0, [x24, #:lo12:.LANCHOR107]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	beq	.L2572
+	beq	.L2581
 	ldr	x28, [x1, 16]
 	mov	w0, 61589
 	ldrh	w1, [x28]
 	cmp	w1, w0
-	bne	.L2572
+	bne	.L2581
 	ldr	w4, [x28, 8]
 	cmn	w4, #1
-	bne	.L2573
-	mov	w2, 892
+	bne	.L2582
+	mov	w2, 898
 	str	w4, [x29, 112]
 	adrp	x1, .LANCHOR243
 	adrp	x0, .LC5
@@ -18043,7 +18038,7 @@ rk_ftl_garbage_collect:
 	add	x0, x0, :lo12:.LC7
 	bl	printf
 	ldr	w4, [x29, 112]
-.L2573:
+.L2582:
 	mov	w2, 0
 	add	x1, x29, 188
 	mov	w0, w4
@@ -18054,7 +18049,7 @@ rk_ftl_garbage_collect:
 	and	w1, w1, 2147483647
 	ldr	w2, [x0, 4]
 	cmp	w1, w2
-	bne	.L2572
+	bne	.L2581
 	ldr	x1, [x29, 160]
 	adrp	x4, .LANCHOR181
 	ldr	x2, [x29, 160]
@@ -18100,52 +18095,52 @@ rk_ftl_garbage_collect:
 	bl	FtlGcBufAlloc
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbnz	w0, .L2574
+	cbnz	w0, .L2583
 	ldrb	w1, [x12, 7]
 	ldr	w0, [x25]
 	cmp	w1, w0
-	beq	.L2574
+	beq	.L2583
 	ldrh	w0, [x12, 4]
-	cbnz	w0, .L2572
-.L2574:
+	cbnz	w0, .L2581
+.L2583:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	w0, .L2572
-.L2622:
+	cbz	w0, .L2581
+.L2631:
 	str	wzr, [x21, #:lo12:.LANCHOR171]
-	b	.L2621
-.L2572:
+	b	.L2630
+.L2581:
 	add	x22, x22, 56
-	b	.L2571
-.L2576:
+	b	.L2580
+.L2585:
 	add	x1, x19, :lo12:.LANCHOR204
 	ldrh	w0, [x1, 2]
 	add	w20, w20, w0
 	and	w20, w20, 65535
 	strh	w20, [x1, 2]
 	cmp	w26, w20
-	bhi	.L2578
+	bhi	.L2587
 	adrp	x0, .LANCHOR103
 	ldr	w0, [x0, #:lo12:.LANCHOR103]
-	cbz	w0, .L2579
+	cbz	w0, .L2588
 	bl	Ftl_gc_temp_data_write_back
-	cbnz	w0, .L2622
-.L2579:
+	cbnz	w0, .L2631
+.L2588:
 	adrp	x0, .LANCHOR241
 	ldrh	w0, [x0, #:lo12:.LANCHOR241]
-	cbnz	w0, .L2580
+	cbnz	w0, .L2589
 	ldrh	w1, [x19, #:lo12:.LANCHOR204]
 	adrp	x20, .LANCHOR84
 	add	x0, x19, :lo12:.LANCHOR204
 	ldr	x3, [x20, #:lo12:.LANCHOR84]
 	ubfiz	x2, x1, 1, 16
 	ldrh	w4, [x3, x2]
-	cbz	w4, .L2580
+	cbz	w4, .L2589
 	adrp	x2, .LANCHOR242
 	mov	w3, 0
 	ldrh	w5, [x2, #:lo12:.LANCHOR242]
 	ldrh	w2, [x0, 2]
-	adrp	x0, .LC66
-	add	x0, x0, :lo12:.LC66
+	adrp	x0, .LC65
+	add	x0, x0, :lo12:.LC65
 	bl	printf
 	ldrh	w1, [x19, #:lo12:.LANCHOR204]
 	ldr	x0, [x20, #:lo12:.LANCHOR84]
@@ -18155,27 +18150,27 @@ rk_ftl_garbage_collect:
 	bl	FtlCacheWriteBack
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L2580:
+.L2589:
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR204]
-.L2578:
+.L2587:
 	adrp	x0, .LANCHOR89
 	ldrh	w0, [x0, #:lo12:.LANCHOR89]
 	cmp	w0, 2
-	bhi	.L2581
+	bhi	.L2590
 	ldr	x0, [x29, 128]
 	ldrh	w20, [x0, #:lo12:.LANCHOR53]
-	b	.L2552
-.L2581:
+	b	.L2561
+.L2590:
 	str	wzr, [x21, #:lo12:.LANCHOR171]
 	add	w0, w0, 1
-	b	.L2530
-.L2582:
+	b	.L2539
+.L2591:
 	mov	w0, 0
 	ret
-.L2584:
+.L2593:
 	mov	w0, 0
-	b	.L2530
+	b	.L2539
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
 	.section	.text.FtlInit,"ax",@progbits
 	.align	2
@@ -18183,8 +18178,8 @@ rk_ftl_garbage_collect:
 	.type	FtlInit, %function
 FtlInit:
 	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LC67
-	add	x1, x1, :lo12:.LC67
+	adrp	x1, .LC66
+	add	x1, x1, :lo12:.LC66
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR231
@@ -18206,42 +18201,42 @@ FtlInit:
 	ldrh	w0, [x0, #:lo12:.LANCHOR39]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	w0, .L2624
+	cbz	w0, .L2633
 	adrp	x1, .LANCHOR245
-	adrp	x0, .LC68
+	adrp	x0, .LC67
 	add	x1, x1, :lo12:.LANCHOR245
-	add	x0, x0, :lo12:.LC68
-.L2632:
+	add	x0, x0, :lo12:.LC67
+.L2641:
 	bl	printf
-.L2625:
+.L2634:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2624:
+.L2633:
 	bl	FtlSysBlkInit
-	cbz	w0, .L2626
+	cbz	w0, .L2635
 	adrp	x1, .LANCHOR245
-	adrp	x0, .LC69
+	adrp	x0, .LC68
 	add	x1, x1, :lo12:.LANCHOR245
-	add	x0, x0, :lo12:.LC69
-	b	.L2632
-.L2626:
+	add	x0, x0, :lo12:.LC68
+	b	.L2641
+.L2635:
 	mov	w1, 1
 	str	w1, [x19, #:lo12:.LANCHOR231]
 	bl	rk_ftl_garbage_collect
 	adrp	x0, .LANCHOR89
 	ldrh	w0, [x0, #:lo12:.LANCHOR89]
 	cmp	w0, 15
-	bhi	.L2625
+	bhi	.L2634
 	mov	w19, 1024
-.L2628:
+.L2637:
 	mov	w1, 1
 	mov	w0, w1
 	bl	rk_ftl_garbage_collect
 	subs	w19, w19, #1
-	bne	.L2628
-	b	.L2625
+	bne	.L2637
+	b	.L2634
 	.size	FtlInit, .-FtlInit
 	.section	.text.rk_ftl_init,"ax",@progbits
 	.align	2
@@ -18253,15 +18248,15 @@ rk_ftl_init:
 	str	x19, [sp, 16]
 	bl	FlashInit
 	mov	w19, w0
-	cbnz	w0, .L2634
+	cbnz	w0, .L2643
 	adrp	x0, .LANCHOR15
 	add	x0, x0, :lo12:.LANCHOR15
 	bl	FtlInit
-.L2634:
+.L2643:
 	bl	idb_init
 	mov	w1, w19
-	adrp	x0, .LC70
-	add	x0, x0, :lo12:.LC70
+	adrp	x0, .LC69
+	add	x0, x0, :lo12:.LC69
 	bl	printf
 	mov	w0, w19
 	ldr	x19, [sp, 16]
@@ -18275,7 +18270,7 @@ rk_ftl_init:
 ftl_fix_nand_power_lost_error:
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L2651
+	cbz	w0, .L2660
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
 	str	x25, [sp, 64]
@@ -18288,41 +18283,41 @@ ftl_fix_nand_power_lost_error:
 	mov	w1, w23
 	stp	x19, x20, [sp, 16]
 	ubfiz	x24, x23, 1, 16
-	adrp	x19, .LC71
+	adrp	x19, .LC70
 	ldrh	w2, [x0, x24]
-	add	x0, x19, :lo12:.LC71
+	add	x0, x19, :lo12:.LC70
 	bl	printf
 	adrp	x0, .LANCHOR92
 	add	x11, x0, :lo12:.LANCHOR92
 	ldrh	w0, [x0, #:lo12:.LANCHOR92]
-	bl	FtlGcRefreshBlock
+	bl	FtlGcRefreshOpenBlock
 	adrp	x0, .LANCHOR93
 	add	x20, x0, :lo12:.LANCHOR93
 	ldrh	w0, [x0, #:lo12:.LANCHOR93]
-	bl	FtlGcRefreshBlock
+	bl	FtlGcRefreshOpenBlock
 	mov	x0, x11
 	bl	allocate_new_data_superblock
 	mov	x0, x20
 	mov	w20, 4097
 	bl	allocate_new_data_superblock
-.L2638:
+.L2647:
 	subs	w20, w20, #1
-	beq	.L2642
+	beq	.L2651
 	mov	w1, 1
 	mov	w0, w1
 	bl	rk_ftl_garbage_collect
 	ldr	x0, [x21, #:lo12:.LANCHOR84]
 	ldrh	w0, [x0, x24]
-	cbnz	w0, .L2638
-.L2642:
+	cbnz	w0, .L2647
+.L2651:
 	ldr	x0, [x21, #:lo12:.LANCHOR84]
 	mov	w1, w23
 	ldrh	w2, [x0, x24]
-	add	x0, x19, :lo12:.LC71
+	add	x0, x19, :lo12:.LC70
 	bl	printf
 	ldr	x0, [x21, #:lo12:.LANCHOR84]
 	ldrh	w19, [x0, x24]
-	cbnz	w19, .L2640
+	cbnz	w19, .L2649
 	add	x20, x29, 128
 	adrp	x22, .LANCHOR78
 	strh	w23, [x20, -48]!
@@ -18335,14 +18330,14 @@ ftl_fix_nand_power_lost_error:
 	ldrh	w3, [x0, #:lo12:.LANCHOR38]
 	mov	w6, 56
 	mov	w0, 0
-.L2643:
+.L2652:
 	cmp	w0, w3
-	bne	.L2645
+	bne	.L2654
 	ldr	x0, [x21, #:lo12:.LANCHOR84]
 	mov	w1, w23
 	ldrh	w2, [x0, x24]
-	adrp	x0, .LC72
-	add	x0, x0, :lo12:.LC72
+	adrp	x0, .LC71
+	add	x0, x0, :lo12:.LC71
 	bl	printf
 	ldr	x0, [x22, #:lo12:.LANCHOR78]
 	mov	w2, w19
@@ -18352,7 +18347,7 @@ ftl_fix_nand_power_lost_error:
 	mov	w2, w19
 	mov	w1, 1
 	bl	FlashEraseBlocks
-.L2640:
+.L2649:
 	mov	w0, -1
 	strh	w0, [x25, #:lo12:.LANCHOR235]
 	ldp	x19, x20, [sp, 16]
@@ -18361,22 +18356,22 @@ ftl_fix_nand_power_lost_error:
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2645:
+.L2654:
 	ldrh	w1, [x20]
 	cmp	w1, w5
-	beq	.L2644
+	beq	.L2653
 	umaddl	x2, w19, w6, x4
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	lsl	w1, w1, 10
 	stp	xzr, xzr, [x2, 8]
 	str	w1, [x2, 4]
-.L2644:
+.L2653:
 	add	w0, w0, 1
 	add	x20, x20, 2
 	and	w0, w0, 65535
-	b	.L2643
-.L2651:
+	b	.L2652
+.L2660:
 	ret
 	.size	ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error
 	.section	.text.ftl_read,"ax",@progbits
@@ -18397,13 +18392,13 @@ ftl_read:
 	mov	w27, w2
 	stp	x21, x22, [sp, 48]
 	stp	x25, x26, [sp, 80]
-	bne	.L2655
+	bne	.L2664
 	mov	x2, x3
 	mov	w1, w27
 	add	w0, w19, 256
 	bl	FtlVendorPartRead
 	mov	w21, w0
-.L2654:
+.L2663:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
@@ -18413,18 +18408,18 @@ ftl_read:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 208
 	ret
-.L2655:
+.L2664:
 	add	w0, w1, w2
 	str	w0, [x29, 148]
 	adrp	x0, .LANCHOR69
 	add	w1, w1, w2
 	ldr	w0, [x0, #:lo12:.LANCHOR69]
 	cmp	w1, w0
-	bhi	.L2678
+	bhi	.L2687
 	adrp	x0, .LANCHOR231
 	ldr	w21, [x0, #:lo12:.LANCHOR231]
 	cmn	w21, #1
-	beq	.L2654
+	beq	.L2663
 	adrp	x22, .LANCHOR56
 	bl	FtlCacheWriteBack
 	adrp	x25, .LANCHOR138
@@ -18450,42 +18445,42 @@ ftl_read:
 	ldr	w2, [x29, 172]
 	add	w0, w0, w2
 	str	w0, [x1, #:lo12:.LANCHOR166]
-.L2657:
+.L2666:
 	ldr	w0, [x29, 172]
-	cbnz	w0, .L2677
+	cbnz	w0, .L2686
 	adrp	x0, .LANCHOR117
 	ldrh	w0, [x0, #:lo12:.LANCHOR117]
-	cbz	w0, .L2654
+	cbz	w0, .L2663
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-	b	.L2654
-.L2677:
+	b	.L2663
+.L2686:
 	add	x1, x29, 188
 	mov	w2, 0
 	mov	w0, w20
 	bl	log2phys
 	ldr	w1, [x29, 188]
 	cmn	w1, #1
-	bne	.L2658
+	bne	.L2667
 	add	x3, x22, :lo12:.LANCHOR56
 	mov	w28, 0
-.L2659:
+.L2668:
 	ldrh	w0, [x3]
 	cmp	w28, w0
-	bcc	.L2661
-.L2662:
+	bcc	.L2670
+.L2671:
 	ldr	w0, [x29, 172]
 	add	w20, w20, 1
 	subs	w0, w0, #1
 	str	w0, [x29, 172]
-	beq	.L2666
+	beq	.L2675
 	adrp	x0, .LANCHOR38
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w24, w0, lsl 2
-	bne	.L2657
-.L2666:
-	cbz	w24, .L2657
+	bne	.L2666
+.L2675:
+	cbz	w24, .L2666
 	ldr	x0, [x26, #:lo12:.LANCHOR180]
 	mov	w1, w24
 	mov	w2, 0
@@ -18504,35 +18499,35 @@ ftl_read:
 	umull	x0, w24, w0
 	mov	x24, 0
 	str	x0, [x29, 120]
-	adrp	x0, .LC61
-	add	x0, x0, :lo12:.LC61
+	adrp	x0, .LC60
+	add	x0, x0, :lo12:.LC60
 	str	x0, [x29, 112]
-.L2676:
+.L2685:
 	ldr	x0, [x26, #:lo12:.LANCHOR180]
 	ldr	w2, [x29, 168]
 	add	x0, x0, x24
 	ldr	w1, [x0, 24]
 	cmp	w2, w1
-	bne	.L2668
+	bne	.L2677
 	ldr	x1, [x0, 8]
 	adrp	x0, .LANCHOR186
 	ldr	x0, [x0, #:lo12:.LANCHOR186]
 	cmp	x1, x0
-	bne	.L2669
+	bne	.L2678
 	ldr	x0, [x29, 136]
 	ldr	w2, [x29, 144]
 	add	x1, x1, x0
 	mov	x0, x23
-.L2693:
+.L2702:
 	bl	ftl_memcpy
-.L2669:
+.L2678:
 	ldr	x0, [x26, #:lo12:.LANCHOR180]
 	add	x0, x0, x24
 	ldr	x2, [x0, 16]
 	ldr	w1, [x0, 24]
 	ldr	w3, [x2, 8]
 	cmp	w1, w3
-	beq	.L2670
+	beq	.L2679
 	ldr	w3, [x25, 72]
 	add	w3, w3, 1
 	str	w3, [x25, 72]
@@ -18546,30 +18541,30 @@ ftl_read:
 	ldr	w2, [x0, 4]
 	ldr	x0, [x29, 112]
 	bl	printf
-.L2670:
+.L2679:
 	ldr	x0, [x26, #:lo12:.LANCHOR180]
 	add	x1, x0, x24
 	ldr	w0, [x0, x24]
 	cmn	w0, #1
-	bne	.L2671
+	bne	.L2680
 	ldr	w1, [x25, 72]
 	mov	w21, w0
 	add	w1, w1, 1
 	str	w1, [x25, 72]
-.L2672:
+.L2681:
 	ldr	x0, [x29, 120]
 	add	x24, x24, 56
 	cmp	x0, x24
-	bne	.L2676
+	bne	.L2685
 	mov	w24, 0
-	b	.L2657
-.L2661:
+	b	.L2666
+.L2670:
 	madd	w0, w20, w0, w28
 	cmp	w19, w0
-	bhi	.L2660
+	bhi	.L2669
 	ldr	w1, [x29, 148]
 	cmp	w1, w0
-	bls	.L2660
+	bls	.L2669
 	sub	w0, w0, w19
 	str	x3, [x29, 136]
 	lsl	w0, w0, 9
@@ -18578,17 +18573,17 @@ ftl_read:
 	add	x0, x23, x0
 	bl	ftl_memset
 	ldr	x3, [x29, 136]
-.L2660:
+.L2669:
 	add	w28, w28, 1
-	b	.L2659
-.L2658:
+	b	.L2668
+.L2667:
 	ldr	x0, [x26, #:lo12:.LANCHOR180]
 	mov	w2, 56
 	umaddl	x0, w24, w2, x0
 	str	w1, [x0, 4]
 	ldr	w1, [x29, 168]
 	cmp	w20, w1
-	bne	.L2663
+	bne	.L2672
 	adrp	x1, .LANCHOR186
 	ldr	x1, [x1, #:lo12:.LANCHOR186]
 	str	x1, [x0, 8]
@@ -18601,9 +18596,9 @@ ftl_read:
 	csel	w2, w27, w2, ls
 	str	w2, [x29, 160]
 	cmp	w1, w2
-	bne	.L2664
+	bne	.L2673
 	str	x23, [x0, 8]
-.L2664:
+.L2673:
 	adrp	x1, .LANCHOR59
 	adrp	x2, .LANCHOR189
 	str	w20, [x0, 24]
@@ -18614,11 +18609,11 @@ ftl_read:
 	and	x1, x1, 4294967292
 	add	x1, x2, x1
 	str	x1, [x0, 16]
-	b	.L2662
-.L2663:
+	b	.L2671
+.L2672:
 	ldr	w1, [x29, 164]
 	cmp	w20, w1
-	bne	.L2665
+	bne	.L2674
 	ldrh	w2, [x22, #:lo12:.LANCHOR56]
 	adrp	x1, .LANCHOR187
 	ldr	w3, [x29, 148]
@@ -18628,35 +18623,35 @@ ftl_read:
 	sub	w3, w3, w1
 	str	w3, [x29, 156]
 	cmp	w2, w3
-	bne	.L2664
-.L2692:
+	bne	.L2673
+.L2701:
 	sub	w1, w1, w19
 	lsl	w1, w1, 9
 	add	x1, x23, x1
 	str	x1, [x0, 8]
-	b	.L2664
-.L2665:
+	b	.L2673
+.L2674:
 	ldrh	w1, [x22, #:lo12:.LANCHOR56]
 	mul	w1, w1, w20
-	b	.L2692
-.L2668:
+	b	.L2701
+.L2677:
 	ldr	w2, [x29, 164]
 	cmp	w2, w1
-	bne	.L2669
+	bne	.L2678
 	ldr	x1, [x0, 8]
 	ldr	x0, [x28, #:lo12:.LANCHOR187]
 	cmp	x1, x0
-	bne	.L2669
+	bne	.L2678
 	ldrh	w0, [x22, #:lo12:.LANCHOR56]
 	mul	w0, w0, w2
 	ldr	w2, [x29, 132]
 	sub	w0, w0, w19
 	lsl	w0, w0, 9
 	add	x0, x23, x0
-	b	.L2693
-.L2671:
+	b	.L2702
+.L2680:
 	cmp	w0, 256
-	bne	.L2672
+	bne	.L2681
 	ldr	w0, [x1, 4]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
@@ -18665,13 +18660,13 @@ ftl_read:
 	bl	FtlGcRefreshBlock
 	mov	w2, 2049
 	adrp	x3, .LANCHOR204
-.L2674:
+.L2683:
 	subs	w2, w2, #1
-	bne	.L2673
-.L2675:
+	bne	.L2682
+.L2684:
 	bl	FtlSysFlush
-	b	.L2672
-.L2673:
+	b	.L2681
+.L2682:
 	mov	w1, 1
 	str	x3, [x29, 96]
 	mov	w0, w1
@@ -18682,11 +18677,11 @@ ftl_read:
 	ldr	w2, [x29, 108]
 	ldrh	w0, [x3, #:lo12:.LANCHOR204]
 	cmp	w0, w1
-	beq	.L2674
-	b	.L2675
-.L2678:
+	beq	.L2683
+	b	.L2684
+.L2687:
 	mov	w21, -1
-	b	.L2654
+	b	.L2663
 	.size	ftl_read, .-ftl_read
 	.section	.text.FtlWrite,"ax",@progbits
 	.align	2
@@ -18703,17 +18698,17 @@ FtlWrite:
 	ldr	w1, [x1, #:lo12:.LANCHOR77]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w1, .L2726
+	cbnz	w1, .L2735
 	and	w0, w0, 255
 	mov	w23, w2
 	mov	x24, x3
 	cmp	w0, 16
-	bne	.L2696
+	bne	.L2705
 	mov	x2, x3
 	mov	w1, w23
 	add	w0, w21, 256
 	bl	FtlVendorPartWrite
-.L2694:
+.L2703:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -18721,16 +18716,16 @@ FtlWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 240
 	ret
-.L2696:
+.L2705:
 	adrp	x0, .LANCHOR69
 	add	w2, w21, w2
 	ldr	w0, [x0, #:lo12:.LANCHOR69]
 	cmp	w2, w0
-	bhi	.L2727
+	bhi	.L2736
 	adrp	x0, .LANCHOR231
 	ldr	w0, [x0, #:lo12:.LANCHOR231]
 	cmn	w0, #1
-	beq	.L2694
+	beq	.L2703
 	adrp	x0, .LANCHOR246
 	adrp	x26, .LANCHOR56
 	mov	w1, 2048
@@ -18749,25 +18744,25 @@ FtlWrite:
 	str	w0, [x2, #:lo12:.LANCHOR162]
 	adrp	x0, .LANCHOR132
 	ldr	x2, [x0, #:lo12:.LANCHOR132]
-	cbz	x2, .L2698
+	cbz	x2, .L2707
 	ldr	w0, [x2, 24]
 	cmp	w20, w0
-	beq	.L2699
+	beq	.L2708
 	bl	FtlCacheWriteBack
-.L2698:
+.L2707:
 	adrp	x0, .LANCHOR92
 	mov	w19, w20
 	add	x22, x0, :lo12:.LANCHOR92
-.L2700:
-	cbnz	w25, .L2725
+.L2709:
+	cbnz	w25, .L2734
 	ldr	w0, [x29, 152]
 	sub	w1, w0, w20
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-.L2726:
+.L2735:
 	mov	w0, 0
-	b	.L2694
-.L2699:
+	b	.L2703
+.L2708:
 	adrp	x3, .LANCHOR164
 	ldr	w0, [x3, #:lo12:.LANCHOR164]
 	add	w0, w0, 1
@@ -18783,15 +18778,15 @@ FtlWrite:
 	mov	x1, x24
 	mov	w2, w22
 	bl	ftl_memcpy
-	cbz	w27, .L2726
+	cbz	w27, .L2735
 	sub	w23, w23, w19
 	add	w21, w21, w19
 	add	x24, x24, x22
 	add	w20, w20, 1
 	bl	FtlCacheWriteBack
 	mov	w25, w27
-	b	.L2698
-.L2725:
+	b	.L2707
+.L2734:
 	adrp	x0, .LANCHOR92
 	add	x0, x0, :lo12:.LANCHOR92
 	adrp	x1, .LANCHOR38
@@ -18799,7 +18794,7 @@ FtlWrite:
 	ldrb	w2, [x0, 6]
 	ldrh	w0, [x1, #:lo12:.LANCHOR38]
 	cmp	w2, w0
-	bcc	.L2701
+	bcc	.L2710
 	mov	w2, 1668
 	adrp	x1, .LANCHOR247
 	adrp	x0, .LC5
@@ -18811,13 +18806,13 @@ FtlWrite:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2701:
+.L2710:
 	ldrh	w0, [x22, 4]
-	cbnz	w0, .L2702
+	cbnz	w0, .L2711
 	bl	FtlCacheWriteBack
 	mov	x0, x22
 	bl	allocate_new_data_superblock
-.L2702:
+.L2711:
 	ldrb	w0, [x22, 7]
 	ldrh	w1, [x22, 4]
 	lsl	w0, w0, 2
@@ -18830,7 +18825,7 @@ FtlWrite:
 	ldr	x0, [x29, 120]
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w1, w0
-	bcc	.L2703
+	bcc	.L2712
 	mov	w2, 1701
 	adrp	x1, .LANCHOR247
 	adrp	x0, .LC5
@@ -18842,7 +18837,7 @@ FtlWrite:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2703:
+.L2712:
 	adrp	x0, .LANCHOR59
 	add	x0, x0, :lo12:.LANCHOR59
 	str	xzr, [x29, 168]
@@ -18850,21 +18845,21 @@ FtlWrite:
 	adrp	x0, .LANCHOR58
 	add	x0, x0, :lo12:.LANCHOR58
 	str	x0, [x29, 104]
-.L2704:
+.L2713:
 	ldr	w1, [x29, 144]
 	adrp	x28, .LANCHOR182
 	ldr	w27, [x29, 168]
 	cmp	w27, w1
-	bcc	.L2723
+	bcc	.L2732
 	mov	x27, x1
-.L2705:
+.L2714:
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
 	mov	x3, x22
 	mov	w2, 0
 	mov	w1, w27
 	bl	FtlProgPages
 	cmp	w25, w27
-	bcs	.L2724
+	bcs	.L2733
 	mov	w2, 1790
 	adrp	x1, .LANCHOR247
 	adrp	x0, .LC5
@@ -18876,12 +18871,12 @@ FtlWrite:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2724:
+.L2733:
 	sub	w25, w25, w27
-	b	.L2700
-.L2723:
+	b	.L2709
+.L2732:
 	ldrh	w0, [x22, 4]
-	cbz	w0, .L2705
+	cbz	w0, .L2714
 	add	x1, x29, 180
 	mov	w2, 0
 	mov	w0, w19
@@ -18912,9 +18907,9 @@ FtlWrite:
 	ldr	w0, [x29, 152]
 	cmp	w19, w20
 	ccmp	w0, w19, 4, ne
-	bne	.L2706
+	bne	.L2715
 	cmp	w19, w20
-	bne	.L2707
+	bne	.L2716
 	ldr	x0, [x29, 160]
 	ldrh	w2, [x0, #:lo12:.LANCHOR56]
 	udiv	w0, w21, w2
@@ -18924,23 +18919,23 @@ FtlWrite:
 	cmp	w2, w23
 	csel	w0, w2, w23, ls
 	str	w0, [x29, 156]
-.L2708:
+.L2717:
 	ldr	x0, [x29, 160]
 	ldr	w1, [x29, 156]
 	ldrh	w0, [x0, #:lo12:.LANCHOR56]
 	cmp	w0, w1
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
-	bne	.L2709
+	bne	.L2718
 	add	x3, x0, x26
 	cmp	w19, w20
-	bne	.L2710
+	bne	.L2719
 	str	x24, [x3, 8]
-.L2711:
+.L2720:
 	ldr	x0, [x29, 120]
 	ldrb	w1, [x22, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w1, w0
-	bcc	.L2720
+	bcc	.L2729
 	mov	w2, 1775
 	adrp	x1, .LANCHOR247
 	adrp	x0, .LC5
@@ -18952,7 +18947,7 @@ FtlWrite:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2720:
+.L2729:
 	ldp	x1, x2, [x29, 128]
 	mov	w0, -3947
 	strh	w0, [x1, x2]
@@ -18971,8 +18966,8 @@ FtlWrite:
 	ldr	x0, [x29, 168]
 	add	x0, x0, 1
 	str	x0, [x29, 168]
-	b	.L2704
-.L2707:
+	b	.L2713
+.L2716:
 	ldr	x0, [x29, 160]
 	add	w2, w21, w23
 	str	wzr, [x29, 148]
@@ -18980,27 +18975,27 @@ FtlWrite:
 	msub	w2, w19, w0, w2
 	and	w0, w2, 65535
 	str	w0, [x29, 156]
-	b	.L2708
-.L2710:
+	b	.L2717
+.L2719:
 	ldr	w0, [x29, 156]
-.L2738:
+.L2747:
 	mul	w0, w0, w19
 	sub	w0, w0, w21
 	lsl	w0, w0, 9
 	add	x0, x24, x0
 	str	x0, [x3, 8]
-	b	.L2711
-.L2709:
+	b	.L2720
+.L2718:
 	add	x0, x0, x26
 	cmp	w19, w20
-	bne	.L2712
+	bne	.L2721
 	adrp	x1, .LANCHOR186
 	ldr	x1, [x1, #:lo12:.LANCHOR186]
-.L2737:
+.L2746:
 	str	x1, [x0, 8]
 	ldr	w0, [x29, 180]
 	cmn	w0, #1
-	beq	.L2714
+	beq	.L2723
 	str	w0, [x29, 188]
 	mov	w2, 0
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
@@ -19013,17 +19008,17 @@ FtlWrite:
 	bl	FlashReadPages
 	ldr	w0, [x29, 184]
 	cmn	w0, #1
-	bne	.L2715
+	bne	.L2724
 	adrp	x0, .LANCHOR138
 	add	x0, x0, :lo12:.LANCHOR138
 	ldr	w1, [x0, 72]
 	add	w1, w1, 1
 	str	w1, [x0, 72]
-.L2718:
+.L2727:
 	ldr	w0, [x29, 156]
 	cmp	w19, w20
 	lsl	w2, w0, 9
-	bne	.L2719
+	bne	.L2728
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
 	mov	x1, x24
 	add	x3, x0, x26
@@ -19031,30 +19026,30 @@ FtlWrite:
 	ldr	x3, [x3, 8]
 	lsl	w0, w0, 9
 	add	x0, x3, x0
-.L2739:
+.L2748:
 	bl	ftl_memcpy
-	b	.L2711
-.L2712:
+	b	.L2720
+.L2721:
 	adrp	x1, .LANCHOR187
 	ldr	x1, [x1, #:lo12:.LANCHOR187]
-	b	.L2737
-.L2715:
+	b	.L2746
+.L2724:
 	ldr	w1, [x27, 8]
 	cmp	w19, w1
-	beq	.L2717
+	beq	.L2726
 	adrp	x0, .LANCHOR138
 	add	x0, x0, :lo12:.LANCHOR138
 	ldr	w2, [x0, 72]
 	add	w2, w2, 1
 	str	w2, [x0, 72]
-	adrp	x0, .LC73
+	adrp	x0, .LC72
 	mov	w2, w19
-	add	x0, x0, :lo12:.LC73
+	add	x0, x0, :lo12:.LC72
 	bl	printf
-.L2717:
+.L2726:
 	ldr	w0, [x27, 8]
 	cmp	w19, w0
-	beq	.L2718
+	beq	.L2727
 	mov	w2, 1754
 	adrp	x1, .LANCHOR247
 	adrp	x0, .LC5
@@ -19066,8 +19061,8 @@ FtlWrite:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-	b	.L2718
-.L2714:
+	b	.L2727
+.L2723:
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
 	ldr	x1, [x29, 104]
 	add	x0, x0, x26
@@ -19075,8 +19070,8 @@ FtlWrite:
 	mov	w1, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	b	.L2718
-.L2719:
+	b	.L2727
+.L2728:
 	ldr	x0, [x29, 160]
 	ldrh	w1, [x0, #:lo12:.LANCHOR56]
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
@@ -19086,17 +19081,39 @@ FtlWrite:
 	ldr	x0, [x3, 8]
 	lsl	w1, w1, 9
 	add	x1, x24, x1
-	b	.L2739
-.L2706:
+	b	.L2748
+.L2715:
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
 	add	x3, x0, x26
 	ldr	x0, [x29, 160]
 	ldrh	w0, [x0, #:lo12:.LANCHOR56]
-	b	.L2738
-.L2727:
+	b	.L2747
+.L2736:
 	mov	w0, -1
-	b	.L2694
+	b	.L2703
 	.size	FtlWrite, .-FtlWrite
+	.section	.text.ftl_vendor_write,"ax",@progbits
+	.align	2
+	.global	ftl_vendor_write
+	.type	ftl_vendor_write, %function
+ftl_vendor_write:
+	mov	x3, x2
+	mov	w2, w1
+	mov	w1, w0
+	mov	w0, 16
+	b	FtlWrite
+	.size	ftl_vendor_write, .-ftl_vendor_write
+	.section	.text.ftl_sys_write,"ax",@progbits
+	.align	2
+	.global	ftl_sys_write
+	.type	ftl_sys_write, %function
+ftl_sys_write:
+	mov	x3, x2
+	mov	w2, w1
+	add	w1, w0, 256
+	mov	w0, 16
+	b	FtlWrite
+	.size	ftl_sys_write, .-ftl_sys_write
 	.section	.text.StorageSysDataStore,"ax",@progbits
 	.align	2
 	.global	StorageSysDataStore
@@ -19132,12 +19149,12 @@ ftl_write:
 	mov	x20, x3
 	mov	w22, w1
 	ands	w21, w0, 255
-	bne	.L2743
+	bne	.L2754
 	mov	w3, w2
 	mov	w0, 0
 	mov	x2, x20
 	bl	idb_write_data
-.L2743:
+.L2754:
 	mov	x3, x20
 	mov	w2, w19
 	mov	w1, w22
@@ -19153,8 +19170,8 @@ ftl_write:
 	.type	FtlCheckVpc, %function
 FtlCheckVpc:
 	stp	x29, x30, [sp, -128]!
-	adrp	x0, .LC46
-	add	x0, x0, :lo12:.LC46
+	adrp	x0, .LC45
+	add	x0, x0, :lo12:.LC45
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	adrp	x23, .LANCHOR73
@@ -19173,42 +19190,42 @@ FtlCheckVpc:
 	mov	w1, 0
 	mov	x0, x19
 	bl	memset
-.L2746:
+.L2757:
 	ldr	w0, [x23]
 	cmp	w21, w0
-	bcc	.L2748
+	bcc	.L2759
 	adrp	x24, .LANCHOR40
 	adrp	x23, .LANCHOR84
 	mov	w2, 2
-	adrp	x0, .LC74
+	adrp	x0, .LC73
 	ldrh	w3, [x24, #:lo12:.LANCHOR40]
-	add	x0, x0, :lo12:.LC74
+	add	x0, x0, :lo12:.LC73
 	ldr	x1, [x23, #:lo12:.LANCHOR84]
 	add	x21, x20, :lo12:check_valid_page_count_table
-	adrp	x26, .LC76
-	add	x26, x26, :lo12:.LC76
+	adrp	x26, .LC75
+	add	x26, x26, :lo12:.LC75
 	mov	w25, 0
 	mov	w19, 0
 	bl	rknand_print_hex
 	ldrh	w3, [x24, #:lo12:.LANCHOR40]
 	mov	w2, 2
 	mov	x1, x21
-	adrp	x0, .LC75
+	adrp	x0, .LC74
 	add	x24, x24, :lo12:.LANCHOR40
-	add	x0, x0, :lo12:.LC75
+	add	x0, x0, :lo12:.LC74
 	bl	rknand_print_hex
 	mov	w4, 65535
-.L2749:
+.L2760:
 	ldrh	w0, [x24]
 	cmp	w0, w19
-	bhi	.L2751
+	bhi	.L2762
 	adrp	x0, .LANCHOR88
 	ldr	x19, [x0, #:lo12:.LANCHOR88]
-	cbz	x19, .L2752
+	cbz	x19, .L2763
 	adrp	x0, .LANCHOR89
-	adrp	x26, .LC77
+	adrp	x26, .LC76
 	add	x20, x20, :lo12:check_valid_page_count_table
-	add	x26, x26, :lo12:.LC77
+	add	x26, x26, :lo12:.LC76
 	ldrh	w27, [x0, #:lo12:.LANCHOR89]
 	adrp	x0, .LANCHOR82
 	mov	x24, x0
@@ -19222,12 +19239,12 @@ FtlCheckVpc:
 	movk	x1, 0xaaab, lsl 0
 	mul	x19, x19, x1
 	and	w19, w19, 65535
-.L2753:
+.L2764:
 	cmp	w21, w27
-	bne	.L2755
-.L2752:
-	cbz	w25, .L2745
-	mov	w2, 1680
+	bne	.L2766
+.L2763:
+	cbz	w25, .L2756
+	mov	w2, 1669
 	add	x1, x22, :lo12:.LANCHOR248
 	adrp	x0, .LC5
 	add	x0, x0, :lo12:.LC5
@@ -19237,7 +19254,7 @@ FtlCheckVpc:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2745:
+.L2756:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -19245,31 +19262,31 @@ FtlCheckVpc:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2748:
+.L2759:
 	mov	w2, 0
 	add	x1, x29, 124
 	mov	w0, w21
 	bl	log2phys
 	ldr	w0, [x29, 124]
 	cmn	w0, #1
-	beq	.L2747
+	beq	.L2758
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	and	x0, x0, 65535
 	ldrh	w1, [x19, x0, lsl 1]
 	add	w1, w1, 1
 	strh	w1, [x19, x0, lsl 1]
-.L2747:
+.L2758:
 	add	w21, w21, 1
-	b	.L2746
-.L2751:
+	b	.L2757
+.L2762:
 	ldr	x0, [x23, #:lo12:.LANCHOR84]
 	ubfiz	x28, x19, 1, 16
 	sxtw	x27, w19
 	ldrh	w2, [x0, x28]
 	ldrh	w3, [x21, x27, lsl 1]
 	cmp	w2, w3
-	beq	.L2750
+	beq	.L2761
 	str	w4, [x29, 108]
 	mov	w1, w19
 	mov	x0, x26
@@ -19278,19 +19295,19 @@ FtlCheckVpc:
 	ldr	w4, [x29, 108]
 	ldrh	w0, [x0, x28]
 	cmp	w0, w4
-	beq	.L2750
+	beq	.L2761
 	ldrh	w1, [x21, x27, lsl 1]
 	cmp	w1, w0
 	csinc	w25, w25, wzr, ls
-.L2750:
+.L2761:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L2749
-.L2755:
+	b	.L2760
+.L2766:
 	ldr	x1, [x23, #:lo12:.LANCHOR84]
 	ubfiz	x0, x19, 1, 16
 	ldrh	w2, [x1, x0]
-	cbz	w2, .L2754
+	cbz	w2, .L2765
 	ldrh	w3, [x20, w19, sxtw 1]
 	mov	w1, w19
 	str	w4, [x29, 108]
@@ -19298,15 +19315,15 @@ FtlCheckVpc:
 	mov	w25, 1
 	bl	printf
 	ldr	w4, [x29, 108]
-.L2754:
+.L2765:
 	umull	x19, w19, w28
 	ldr	x0, [x24, #:lo12:.LANCHOR82]
 	ldrh	w19, [x0, x19]
 	cmp	w19, w4
-	beq	.L2752
+	beq	.L2763
 	add	w21, w21, 1
 	and	w21, w21, 65535
-	b	.L2753
+	b	.L2764
 	.size	FtlCheckVpc, .-FtlCheckVpc
 	.section	.text.FtlDumpSysBlock,"ax",@progbits
 	.align	2
@@ -19327,22 +19344,22 @@ FtlDumpSysBlock:
 	stp	x23, x24, [sp, 64]
 	lsl	w26, w25, 10
 	stp	x19, x20, [sp, 32]
-	adrp	x23, .LC78
+	adrp	x23, .LC77
 	str	x27, [sp, 96]
-	adrp	x24, .LC79
+	adrp	x24, .LC78
 	str	x2, [x1, 8]
 	adrp	x2, .LANCHOR188
 	add	x22, x22, :lo12:.LANCHOR54
-	add	x23, x23, :lo12:.LC78
+	add	x23, x23, :lo12:.LC77
 	ldr	x2, [x2, #:lo12:.LANCHOR188]
-	add	x24, x24, :lo12:.LC79
+	add	x24, x24, :lo12:.LC78
 	mov	x27, x0
 	mov	w19, 0
 	str	x2, [x1, 16]
-.L2771:
+.L2782:
 	ldrh	w0, [x22]
 	cmp	w19, w0
-	blt	.L2773
+	blt	.L2784
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -19351,7 +19368,7 @@ FtlDumpSysBlock:
 	ldr	x27, [sp, 96]
 	add	sp, sp, 112
 	ret
-.L2773:
+.L2784:
 	add	x20, x21, :lo12:.LANCHOR202
 	orr	w0, w19, w26
 	mov	w2, 1
@@ -19372,16 +19389,16 @@ FtlDumpSysBlock:
 	ldr	x0, [x20, 16]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L2772
+	beq	.L2783
 	ldr	x1, [x27, #:lo12:.LANCHOR183]
 	mov	w3, 768
 	mov	w2, 4
 	mov	x0, x24
 	bl	rknand_print_hex
-.L2772:
+.L2783:
 	add	w19, w19, 1
 	sxth	w19, w19
-	b	.L2771
+	b	.L2782
 	.size	FtlDumpSysBlock, .-FtlDumpSysBlock
 	.section	.text.dump_map_info,"ax",@progbits
 	.align	2
@@ -19402,33 +19419,33 @@ dump_map_info:
 	add	x22, x22, :lo12:.LANCHOR41
 	stp	x25, x26, [sp, 80]
 	adrp	x24, .LANCHOR38
-.L2779:
+.L2790:
 	ldrh	w0, [x22]
 	cmp	w0, w20
-	bhi	.L2785
+	bhi	.L2796
 	adrp	x25, .LANCHOR128
 	adrp	x19, .LANCHOR202
 	add	x25, x25, :lo12:.LANCHOR128
 	add	x19, x19, :lo12:.LANCHOR202
 	mov	w26, 0
-.L2786:
+.L2797:
 	ldrh	w0, [x25]
 	cmp	w26, w0
-	bge	.L2789
+	bge	.L2800
 	adrp	x21, .LANCHOR54
-	adrp	x0, .LC49
+	adrp	x0, .LC48
 	sbfiz	x23, x26, 1, 32
 	mov	w20, 0
 	add	x21, x21, :lo12:.LANCHOR54
-	add	x24, x0, :lo12:.LC49
-	b	.L2790
-.L2781:
+	add	x24, x0, :lo12:.LC48
+	b	.L2801
+.L2792:
 	ldrb	w0, [x23, x5]
 	mov	w1, w20
 	bl	V2P_block
 	and	w4, w0, 65535
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L2780
+	cbnz	w0, .L2791
 	umaddl	x1, w19, w7, x6
 	lsl	w4, w4, 10
 	mul	w0, w19, w8
@@ -19438,27 +19455,27 @@ dump_map_info:
 	str	w4, [x1, 4]
 	add	x0, x10, x0, sxtw 2
 	stp	x11, x0, [x1, 8]
-.L2780:
+.L2791:
 	add	x5, x5, 1
-.L2787:
+.L2798:
 	cmp	w12, w5, uxth
-	bhi	.L2781
-	cbnz	w19, .L2782
-.L2784:
+	bhi	.L2792
+	cbnz	w19, .L2793
+.L2795:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2779
-.L2782:
+	b	.L2790
+.L2793:
 	mov	w1, w19
 	mov	w2, 1
 	mov	x0, x6
 	bl	FlashReadPages
 	mov	w0, 56
-	adrp	x26, .LC80
-	add	x26, x26, :lo12:.LC80
+	adrp	x26, .LC79
+	add	x26, x26, :lo12:.LC79
 	mov	x25, 0
 	umull	x19, w19, w0
-.L2783:
+.L2794:
 	ldr	x0, [x21, #:lo12:.LANCHOR180]
 	add	x0, x0, x25
 	add	x25, x25, 56
@@ -19474,9 +19491,9 @@ dump_map_info:
 	ubfx	x1, x2, 10, 16
 	bl	printf
 	cmp	x25, x19
-	bne	.L2783
-	b	.L2784
-.L2785:
+	bne	.L2794
+	b	.L2795
+.L2796:
 	adrp	x0, .LANCHOR105
 	adrp	x21, .LANCHOR180
 	ldrh	w12, [x24, #:lo12:.LANCHOR38]
@@ -19489,8 +19506,8 @@ dump_map_info:
 	adrp	x0, .LANCHOR59
 	mov	w7, 56
 	ldrh	w8, [x0, #:lo12:.LANCHOR59]
-	b	.L2787
-.L2788:
+	b	.L2798
+.L2799:
 	adrp	x22, .LANCHOR129
 	mov	w2, 1
 	mov	w1, w2
@@ -19514,38 +19531,38 @@ dump_map_info:
 	mov	x0, x24
 	ldp	w2, w3, [x19]
 	bl	printf
-.L2790:
+.L2801:
 	ldrh	w0, [x21]
 	cmp	w20, w0
-	blt	.L2788
+	blt	.L2799
 	add	w0, w26, 1
 	sxth	w26, w0
-	b	.L2786
-.L2789:
+	b	.L2797
+.L2800:
 	adrp	x0, .LANCHOR65
 	mov	w2, 2
 	adrp	x19, .LANCHOR67
 	ldr	w3, [x0, #:lo12:.LANCHOR65]
 	adrp	x0, .LANCHOR129
 	ldr	x1, [x0, #:lo12:.LANCHOR129]
-	adrp	x0, .LC81
-	add	x0, x0, :lo12:.LC81
+	adrp	x0, .LC80
+	add	x0, x0, :lo12:.LC80
 	bl	rknand_print_hex
 	adrp	x0, .LANCHOR131
 	ldrh	w3, [x19, #:lo12:.LANCHOR67]
 	mov	w2, 4
 	ldr	x1, [x0, #:lo12:.LANCHOR131]
-	adrp	x0, .LC82
-	add	x0, x0, :lo12:.LC82
+	adrp	x0, .LC81
+	add	x0, x0, :lo12:.LC81
 	bl	rknand_print_hex
 	adrp	x0, .LANCHOR195
 	ldrh	w3, [x19, #:lo12:.LANCHOR67]
 	ldp	x21, x22, [sp, 48]
 	mov	w2, 4
 	ldr	x1, [x0, #:lo12:.LANCHOR195]
-	adrp	x0, .LC83
+	adrp	x0, .LC82
 	ldp	x19, x20, [sp, 32]
-	add	x0, x0, :lo12:.LC83
+	add	x0, x0, :lo12:.LC82
 	ldp	x23, x24, [sp, 64]
 	ldp	x25, x26, [sp, 80]
 	ldp	x29, x30, [sp, 16]
@@ -23875,7 +23892,7 @@ refValueDefault:
 .LC32:
 	.string	"prog read d error: = %x %x %x\n"
 	.section	.rodata.FlashReadFacBbtData.str1.1,"aMS",@progbits,1
-.LC54:
+.LC53:
 	.string	"BBT:"
 	.section	.rodata.FlashReadIdbDataRaw.str1.1,"aMS",@progbits,1
 .LC14:
@@ -23904,27 +23921,27 @@ refValueDefault:
 .LC35:
 	.string	"FtlBbmTblFlush error = %x error count = %d\n"
 	.section	.rodata.FtlCheckVpc.str1.1,"aMS",@progbits,1
-.LC74:
+.LC73:
 	.string	"vpc1"
-.LC75:
+.LC74:
 	.string	"vpc2"
-.LC76:
+.LC75:
 	.string	"FtlCheckVpc2 %x = %x  %x\n"
-.LC77:
+.LC76:
 	.string	"free blk vpc error %x = %x  %x\n"
 	.section	.rodata.FtlDumpBlockInfo.str1.1,"aMS",@progbits,1
-.LC46:
+.LC45:
 	.string	"...%s enter...\n"
-.LC47:
+.LC46:
 	.string	"superBlkID = %x vpc=%x\n"
-.LC48:
+.LC47:
 	.string	"flashmode = %x pagenum = %x %x\n"
-.LC49:
+.LC48:
 	.string	"id = %x,%x addr= %x,spare= %x %x %x %x data=%x %x\n"
 	.section	.rodata.FtlDumpSysBlock.str1.1,"aMS",@progbits,1
-.LC78:
+.LC77:
 	.string	"id = %x,%x addr= %x,spare= %x %x %x %x data = %x\n"
-.LC79:
+.LC78:
 	.string	":"
 	.section	.rodata.FtlFreeSysBlkQueueOut.str1.1,"aMS",@progbits,1
 .LC3:
@@ -23932,61 +23949,61 @@ refValueDefault:
 .LC4:
 	.string	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\n"
 	.section	.rodata.FtlGcFreeTempBlock.str1.1,"aMS",@progbits,1
-.LC65:
+.LC64:
 	.string	"GC des block %x done\n"
 	.section	.rodata.FtlGcScanTempBlk.str1.1,"aMS",@progbits,1
-.LC53:
+.LC52:
 	.string	"FtlGcScanTempBlkError ID %x %x!!!!!!!\n"
 	.section	.rodata.FtlInit.str1.1,"aMS",@progbits,1
+.LC66:
+	.string	"FTL version: 5.0.50 20180905"
 .LC67:
-	.string	"FTL version: 5.0.49 20180810"
-.LC68:
 	.string	"...%s: no bad block mapping table, format device\n"
-.LC69:
+.LC68:
 	.string	"...%s FtlSysBlkInit error ,format device!\n"
 	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",@progbits,1
-.LC44:
+.LC43:
 	.string	"no ect"
 	.section	.rodata.FtlMapWritePage.str1.1,"aMS",@progbits,1
-.LC41:
+.LC40:
 	.string	"FtlMapWritePage error = %x\n"
-.LC42:
+.LC41:
 	.string	"FtlMapWritePage error = %x error count = %d\n"
 	.section	.rodata.FtlProgPages.str1.1,"aMS",@progbits,1
-.LC58:
+.LC57:
 	.string	"Ftlwrite decrement_vpc_count %x = %d\n"
 	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",@progbits,1
-.LC62:
+.LC61:
 	.string	"RSB refresh addr %x\n"
-.LC63:
+.LC62:
 	.string	"spuer block %x vpn is 0\n "
-.LC64:
+.LC63:
 	.string	"g_recovery_ppa %x ver %x\n "
 	.section	.rodata.FtlScanAllBlock.str1.1,"aMS",@progbits,1
-.LC50:
+.LC49:
 	.string	"blk = %x vpc=%x mode = %x\n"
-.LC51:
+.LC50:
 	.string	"mlc id = %x,%x addr= %x,spare= %x %x %x %x data=%x %x\n"
-.LC52:
+.LC51:
 	.string	"slc id = %x,%x addr= %x,spare= %x %x %x %x data=%x %x\n"
 	.section	.rodata.FtlVendorPartRead.str1.1,"aMS",@progbits,1
-.LC43:
+.LC42:
 	.string	"FtlVendorPartRead refresh = %x phyAddr = %x\n"
 	.section	.rodata.FtlVpcTblFlush.str1.1,"aMS",@progbits,1
 .LC38:
 	.string	"FtlVpcTblFlush error = %x error count = %d\n"
 	.section	.rodata.FtlWrite.str1.1,"aMS",@progbits,1
-.LC73:
+.LC72:
 	.string	"FtlWrite: lpa error:%x %x\n"
 	.section	.rodata.Ftl_load_ext_data.str1.1,"aMS",@progbits,1
-.LC45:
+.LC44:
 	.string	"slc mode"
 	.section	.rodata.Ftlscanalldata.str1.1,"aMS",@progbits,1
-.LC59:
+.LC58:
 	.string	"Ftlscanalldata = %x\n"
-.LC60:
+.LC59:
 	.string	"scan lpa = %x ppa= %x\n"
-.LC61:
+.LC60:
 	.string	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\n"
 	.section	.rodata.HynixGetReadRetryDefault.str1.1,"aMS",@progbits,1
 .LC21:
@@ -24003,263 +24020,261 @@ refValueDefault:
 	.section	.rodata.MicronReadRetrial.str1.1,"aMS",@progbits,1
 .LC13:
 	.string	"micron RR %d row=%x,count %d,status=%d\n"
-	.section	.rodata.__func__.10009,"a",@progbits
-	.align	3
-	.set	.LANCHOR248,. + 0
-	.type	__func__.10009, %object
-	.size	__func__.10009, 12
-__func__.10009:
-	.string	"FtlCheckVpc"
-	.section	.rodata.__func__.10041,"a",@progbits
-	.align	3
-	.set	.LANCHOR224,. + 0
-	.type	__func__.10041, %object
-	.size	__func__.10041, 17
-__func__.10041:
-	.string	"FtlDumpBlockInfo"
-	.section	.rodata.__func__.10060,"a",@progbits
+	.section	.rodata.__func__.10011,"a",@progbits
 	.align	3
 	.set	.LANCHOR225,. + 0
-	.type	__func__.10060, %object
-	.size	__func__.10060, 16
-__func__.10060:
+	.type	__func__.10011, %object
+	.size	__func__.10011, 16
+__func__.10011:
 	.string	"FtlScanAllBlock"
-	.section	.rodata.__func__.10165,"a",@progbits
+	.section	.rodata.__func__.10116,"a",@progbits
 	.align	3
 	.set	.LANCHOR233,. + 0
-	.type	__func__.10165, %object
-	.size	__func__.10165, 16
-__func__.10165:
+	.type	__func__.10116, %object
+	.size	__func__.10116, 16
+__func__.10116:
 	.string	"FtlReUsePrevPpa"
-	.section	.rodata.__func__.10198,"a",@progbits
+	.section	.rodata.__func__.10149,"a",@progbits
 	.align	3
 	.set	.LANCHOR234,. + 0
-	.type	__func__.10198, %object
-	.size	__func__.10198, 22
-__func__.10198:
+	.type	__func__.10149, %object
+	.size	__func__.10149, 22
+__func__.10149:
 	.string	"FtlRecoverySuperblock"
-	.section	.rodata.__func__.10252,"a",@progbits
+	.section	.rodata.__func__.10203,"a",@progbits
 	.align	3
 	.set	.LANCHOR102,. + 0
-	.type	__func__.10252, %object
-	.size	__func__.10252, 16
-__func__.10252:
+	.type	__func__.10203, %object
+	.size	__func__.10203, 16
+__func__.10203:
 	.string	"make_superblock"
-	.section	.rodata.__func__.10272,"a",@progbits
+	.section	.rodata.__func__.10223,"a",@progbits
 	.align	3
 	.set	.LANCHOR140,. + 0
-	.type	__func__.10272, %object
-	.size	__func__.10272, 18
-__func__.10272:
+	.type	__func__.10223, %object
+	.size	__func__.10223, 18
+__func__.10223:
 	.string	"SupperBlkListInit"
-	.section	.rodata.__func__.10349,"a",@progbits
+	.section	.rodata.__func__.10300,"a",@progbits
 	.align	3
 	.set	.LANCHOR203,. + 0
-	.type	__func__.10349, %object
-	.size	__func__.10349, 25
-__func__.10349:
+	.type	__func__.10300, %object
+	.size	__func__.10300, 25
+__func__.10300:
 	.string	"allocate_data_superblock"
-	.section	.rodata.__func__.10363,"a",@progbits
+	.section	.rodata.__func__.10314,"a",@progbits
 	.align	3
 	.set	.LANCHOR219,. + 0
-	.type	__func__.10363, %object
-	.size	__func__.10363, 29
-__func__.10363:
+	.type	__func__.10314, %object
+	.size	__func__.10314, 29
+__func__.10314:
 	.string	"allocate_new_data_superblock"
-	.section	.rodata.__func__.10369,"a",@progbits
+	.section	.rodata.__func__.10320,"a",@progbits
 	.align	3
 	.set	.LANCHOR208,. + 0
-	.type	__func__.10369, %object
-	.size	__func__.10369, 19
-__func__.10369:
+	.type	__func__.10320, %object
+	.size	__func__.10320, 19
+__func__.10320:
 	.string	"get_new_active_ppa"
-	.section	.rodata.__func__.10380,"a",@progbits
+	.section	.rodata.__func__.10331,"a",@progbits
 	.align	3
 	.set	.LANCHOR206,. + 0
-	.type	__func__.10380, %object
-	.size	__func__.10380, 16
-__func__.10380:
+	.type	__func__.10331, %object
+	.size	__func__.10331, 16
+__func__.10331:
 	.string	"update_vpc_list"
-	.section	.rodata.__func__.10385,"a",@progbits
+	.section	.rodata.__func__.10336,"a",@progbits
 	.align	3
 	.set	.LANCHOR207,. + 0
-	.type	__func__.10385, %object
-	.size	__func__.10385, 20
-__func__.10385:
+	.type	__func__.10336, %object
+	.size	__func__.10336, 20
+__func__.10336:
 	.string	"decrement_vpc_count"
-	.section	.rodata.__func__.10453,"a",@progbits
+	.section	.rodata.__func__.10404,"a",@progbits
 	.align	3
 	.set	.LANCHOR239,. + 0
-	.type	__func__.10453, %object
-	.size	__func__.10453, 19
-__func__.10453:
+	.type	__func__.10404, %object
+	.size	__func__.10404, 19
+__func__.10404:
 	.string	"FtlGcFreeTempBlock"
-	.section	.rodata.__func__.10547,"a",@progbits
+	.section	.rodata.__func__.10498,"a",@progbits
 	.align	3
 	.set	.LANCHOR243,. + 0
-	.type	__func__.10547, %object
-	.size	__func__.10547, 23
-__func__.10547:
+	.type	__func__.10498, %object
+	.size	__func__.10498, 23
+__func__.10498:
 	.string	"rk_ftl_garbage_collect"
-	.section	.rodata.__func__.9390,"a",@progbits
+	.section	.rodata.__func__.9325,"a",@progbits
 	.align	3
 	.set	.LANCHOR245,. + 0
-	.type	__func__.9390, %object
-	.size	__func__.9390, 8
-__func__.9390:
+	.type	__func__.9325, %object
+	.size	__func__.9325, 8
+__func__.9325:
 	.string	"FtlInit"
-	.section	.rodata.__func__.9450,"a",@progbits
+	.section	.rodata.__func__.9385,"a",@progbits
 	.align	3
 	.set	.LANCHOR229,. + 0
-	.type	__func__.9450, %object
-	.size	__func__.9450, 13
-__func__.9450:
+	.type	__func__.9385, %object
+	.size	__func__.9385, 13
+__func__.9385:
 	.string	"FtlProgPages"
-	.section	.rodata.__func__.9476,"a",@progbits
+	.section	.rodata.__func__.9411,"a",@progbits
 	.align	3
 	.set	.LANCHOR247,. + 0
-	.type	__func__.9476, %object
-	.size	__func__.9476, 9
-__func__.9476:
+	.type	__func__.9411, %object
+	.size	__func__.9411, 9
+__func__.9411:
 	.string	"FtlWrite"
-	.section	.rodata.__func__.9539,"a",@progbits
+	.section	.rodata.__func__.9494,"a",@progbits
 	.align	3
 	.set	.LANCHOR124,. + 0
-	.type	__func__.9539, %object
-	.size	__func__.9539, 14
-__func__.9539:
+	.type	__func__.9494, %object
+	.size	__func__.9494, 14
+__func__.9494:
 	.string	"FtlBbt2Bitmap"
-	.section	.rodata.__func__.9585,"a",@progbits
+	.section	.rodata.__func__.9540,"a",@progbits
 	.align	3
 	.set	.LANCHOR211,. + 0
-	.type	__func__.9585, %object
-	.size	__func__.9585, 11
-__func__.9585:
+	.type	__func__.9540, %object
+	.size	__func__.9540, 11
+__func__.9540:
 	.string	"FtlLoadBbt"
-	.section	.rodata.__func__.9678,"a",@progbits
+	.section	.rodata.__func__.9633,"a",@progbits
 	.align	3
 	.set	.LANCHOR90,. + 0
-	.type	__func__.9678, %object
-	.size	__func__.9678, 17
-__func__.9678:
+	.type	__func__.9633, %object
+	.size	__func__.9633, 17
+__func__.9633:
 	.string	"INSERT_FREE_LIST"
-	.section	.rodata.__func__.9682,"a",@progbits
+	.section	.rodata.__func__.9637,"a",@progbits
 	.align	3
 	.set	.LANCHOR87,. + 0
-	.type	__func__.9682, %object
-	.size	__func__.9682, 17
-__func__.9682:
+	.type	__func__.9637, %object
+	.size	__func__.9637, 17
+__func__.9637:
 	.string	"INSERT_DATA_LIST"
-	.section	.rodata.__func__.9719,"a",@progbits
+	.section	.rodata.__func__.9674,"a",@progbits
 	.align	3
 	.set	.LANCHOR91,. + 0
-	.type	__func__.9719, %object
-	.size	__func__.9719, 17
-__func__.9719:
+	.type	__func__.9674, %object
+	.size	__func__.9674, 17
+__func__.9674:
 	.string	"List_remove_node"
-	.section	.rodata.__func__.9749,"a",@progbits
+	.section	.rodata.__func__.9704,"a",@progbits
 	.align	3
 	.set	.LANCHOR95,. + 0
-	.type	__func__.9749, %object
-	.size	__func__.9749, 22
-__func__.9749:
+	.type	__func__.9704, %object
+	.size	__func__.9704, 22
+__func__.9704:
 	.string	"List_update_data_list"
-	.section	.rodata.__func__.9756,"a",@progbits
+	.section	.rodata.__func__.9711,"a",@progbits
 	.align	3
 	.set	.LANCHOR228,. + 0
-	.type	__func__.9756, %object
-	.size	__func__.9756, 20
-__func__.9756:
+	.type	__func__.9711, %object
+	.size	__func__.9711, 20
+__func__.9711:
 	.string	"ftl_load_l2p_region"
-	.section	.rodata.__func__.9787,"a",@progbits
+	.section	.rodata.__func__.9742,"a",@progbits
 	.align	3
 	.set	.LANCHOR96,. + 0
-	.type	__func__.9787, %object
-	.size	__func__.9787, 26
-__func__.9787:
+	.type	__func__.9742, %object
+	.size	__func__.9742, 26
+__func__.9742:
 	.string	"ftl_map_blk_alloc_new_blk"
-	.section	.rodata.__func__.9801,"a",@progbits
+	.section	.rodata.__func__.9752,"a",@progbits
 	.align	3
 	.set	.LANCHOR212,. + 0
-	.type	__func__.9801, %object
-	.size	__func__.9801, 15
-__func__.9801:
+	.type	__func__.9752, %object
+	.size	__func__.9752, 15
+__func__.9752:
 	.string	"ftl_map_blk_gc"
-	.section	.rodata.__func__.9814,"a",@progbits
+	.section	.rodata.__func__.9765,"a",@progbits
 	.align	3
 	.set	.LANCHOR213,. + 0
-	.type	__func__.9814, %object
-	.size	__func__.9814, 31
-__func__.9814:
+	.type	__func__.9765, %object
+	.size	__func__.9765, 31
+__func__.9765:
 	.string	"Ftl_write_map_blk_to_last_page"
-	.section	.rodata.__func__.9827,"a",@progbits
+	.section	.rodata.__func__.9778,"a",@progbits
 	.align	3
 	.set	.LANCHOR214,. + 0
-	.type	__func__.9827, %object
-	.size	__func__.9827, 16
-__func__.9827:
+	.type	__func__.9778, %object
+	.size	__func__.9778, 16
+__func__.9778:
 	.string	"FtlMapWritePage"
-	.section	.rodata.__func__.9847,"a",@progbits
+	.section	.rodata.__func__.9798,"a",@progbits
 	.align	3
 	.set	.LANCHOR99,. + 0
-	.type	__func__.9847, %object
-	.size	__func__.9847, 22
-__func__.9847:
+	.type	__func__.9798, %object
+	.size	__func__.9798, 22
+__func__.9798:
 	.string	"select_l2p_ram_region"
-	.section	.rodata.__func__.9863,"a",@progbits
+	.section	.rodata.__func__.9814,"a",@progbits
 	.align	3
 	.set	.LANCHOR227,. + 0
-	.type	__func__.9863, %object
-	.size	__func__.9863, 9
-__func__.9863:
+	.type	__func__.9814, %object
+	.size	__func__.9814, 9
+__func__.9814:
 	.string	"log2phys"
-	.section	.rodata.__func__.9925,"a",@progbits
+	.section	.rodata.__func__.9876,"a",@progbits
 	.align	3
 	.set	.LANCHOR210,. + 0
-	.type	__func__.9925, %object
-	.size	__func__.9925, 15
-__func__.9925:
+	.type	__func__.9876, %object
+	.size	__func__.9876, 15
+__func__.9876:
 	.string	"FtlVpcTblFlush"
-	.section	.rodata.__func__.9944,"a",@progbits
+	.section	.rodata.__func__.9895,"a",@progbits
 	.align	3
 	.set	.LANCHOR220,. + 0
-	.type	__func__.9944, %object
-	.size	__func__.9944, 14
-__func__.9944:
+	.type	__func__.9895, %object
+	.size	__func__.9895, 14
+__func__.9895:
 	.string	"FtlScanSysBlk"
-	.section	.rodata.__func__.9998,"a",@progbits
+	.section	.rodata.__func__.9949,"a",@progbits
 	.align	3
 	.set	.LANCHOR221,. + 0
-	.type	__func__.9998, %object
-	.size	__func__.9998, 15
-__func__.9998:
+	.type	__func__.9949, %object
+	.size	__func__.9949, 15
+__func__.9949:
 	.string	"FtlLoadSysInfo"
+	.section	.rodata.__func__.9960,"a",@progbits
+	.align	3
+	.set	.LANCHOR248,. + 0
+	.type	__func__.9960, %object
+	.size	__func__.9960, 12
+__func__.9960:
+	.string	"FtlCheckVpc"
+	.section	.rodata.__func__.9992,"a",@progbits
+	.align	3
+	.set	.LANCHOR224,. + 0
+	.type	__func__.9992, %object
+	.size	__func__.9992, 17
+__func__.9992:
+	.string	"FtlDumpBlockInfo"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",@progbits,1
 .LC36:
 	.string	"decrement_vpc_count %x = %d\n"
 .LC37:
 	.string	"decrement_vpc_count %x = %d in free list\n"
 	.section	.rodata.dump_map_info.str1.1,"aMS",@progbits,1
-.LC80:
+.LC79:
 	.string	"phyBlk = %x,addr= %x,spare= %x %x %x %x data=%x %x\n"
-.LC81:
+.LC80:
 	.string	"Mblk:"
-.LC82:
+.LC81:
 	.string	"L2P:"
-.LC83:
+.LC82:
 	.string	"L2PC:"
 	.section	.rodata.ftl_fix_nand_power_lost_error.str1.1,"aMS",@progbits,1
-.LC71:
+.LC70:
 	.string	"fix power lost blk = %x vpc=%x\n"
-.LC72:
+.LC71:
 	.string	"erase power lost blk = %x vpc=%x\n"
 	.section	.rodata.ftl_map_blk_alloc_new_blk.str1.1,"aMS",@progbits,1
 .LC8:
 	.string	"FtlFreeSysBlkQueueOut = %x, free count = %d\n"
 	.section	.rodata.ftl_map_blk_gc.str1.1,"aMS",@progbits,1
 .LC39:
-	.string	"ftl_map_blk_gc blk info: %x %x %x\n"
-.LC40:
 	.string	"page map lost: %x %x\n"
 	.section	.rodata.idb_write_data.str1.1,"aMS",@progbits,1
 .LC15:
@@ -24269,17 +24284,17 @@ __func__.9998:
 .LC17:
 	.string	"write_idblock fail! %x\n"
 	.section	.rodata.log2phys.str1.1,"aMS",@progbits,1
-.LC55:
-	.string	"load_l2p_region refresh = %x phyAddr = %x\n"
-.LC56:
+.LC54:
 	.string	"region_id = %x phyAddr = %x\n"
-.LC57:
+.LC55:
 	.string	"map_ppn:"
+.LC56:
+	.string	"load_l2p_region refresh = %x phyAddr = %x\n"
 	.section	.rodata.rk_ftl_garbage_collect.str1.1,"aMS",@progbits,1
-.LC66:
+.LC65:
 	.string	"g_gc_superblock_free %x %x %x %x %x\n"
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",@progbits,1
-.LC70:
+.LC69:
 	.string	"FtlInit %x\n"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
 .LC18:

commit 1e4c51caed644d3feb892772b21787ccb97f8488
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Tue Oct 9 17:42:39 2018 +0800

    drm/rockchip: update drm uboot driver version to v1.0.1
    
    Change-Id: I186b6ee6887047baff111538b5b2fe78b9285fc8
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 452d16cdb5..d8799ae909 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -34,12 +34,13 @@
 #include <dm/of_access.h>
 #include <dm/ofnode.h>
 
-#define DRIVER_VERSION	"v1.0.0"
+#define DRIVER_VERSION	"v1.0.1"
 
 /***********************************************************************
  *  Rockchip UBOOT DRM driver version
  *
  *  v1.0.0	: add basic version for rockchip drm driver(hjc)
+ *  v1.0.1	: add much dsi update(hjc)
  *
  **********************************************************************/
 

commit 1ae6d6e5c841cc3093e92b65c74791b2e3380c4f
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Wed Oct 10 09:03:18 2018 +0800

    clk: rockchip: rk1808: fix up the dclk_raw/lite set rate error
    
    Change-Id: I0b8c7d0e15501c7ecc3c5acb0e0844e722ad18ab
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk1808.h b/arch/arm/include/asm/arch-rockchip/cru_rk1808.h
index 33fb895eb3..cf67ed18fb 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk1808.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk1808.h
@@ -122,9 +122,9 @@ enum {
 	HCLK_VOP_DIV_CON_MASK		= 0x1f << HCLK_VOP_DIV_CON_SHIFT,
 
 	/* CRU_CLK_SEL5_CON */
-	DCLK_VOPRAW_SEL_VOPRAW		= 1,
-	DCLK_VOPRAW_SEL_VOPRAW_FRAC	= 2,
-	DCLK_VOPRAW_SEL_XIN24M		= 3,
+	DCLK_VOPRAW_SEL_VOPRAW		= 0,
+	DCLK_VOPRAW_SEL_VOPRAW_FRAC	= 1,
+	DCLK_VOPRAW_SEL_XIN24M		= 2,
 	DCLK_VOPRAW_SEL_SHIFT		= 14,
 	DCLK_VOPRAW_SEL_MASK		= 3 << DCLK_VOPRAW_SEL_SHIFT,
 	DCLK_VOPRAW_PLL_SEL_CPLL	= 0,
@@ -133,12 +133,12 @@ enum {
 	DCLK_VOPRAW_PLL_SEL_SHIFT	= 10,
 	DCLK_VOPRAW_PLL_SEL_MASK	= 3 << DCLK_VOPRAW_PLL_SEL_SHIFT,
 	DCLK_VOPRAW_DIV_CON_SHIFT	= 0,
-	DCLK_VOPRAW_DIV_CON_MASK	= 0xf << DCLK_VOPRAW_DIV_CON_SHIFT,
+	DCLK_VOPRAW_DIV_CON_MASK	= 0xff << DCLK_VOPRAW_DIV_CON_SHIFT,
 
 	/* CRU_CLK_SEL7_CON */
-	DCLK_VOPLITE_SEL_VOPRAW		= 1,
-	DCLK_VOPLITE_SEL_VOPRAW_FRAC	= 2,
-	DCLK_VOPLITE_SEL_XIN24M		= 3,
+	DCLK_VOPLITE_SEL_VOPRAW		= 0,
+	DCLK_VOPLITE_SEL_VOPRAW_FRAC	= 1,
+	DCLK_VOPLITE_SEL_XIN24M		= 2,
 	DCLK_VOPLITE_SEL_SHIFT		= 14,
 	DCLK_VOPLITE_SEL_MASK		= 3 << DCLK_VOPLITE_SEL_SHIFT,
 	DCLK_VOPLITE_PLL_SEL_CPLL	= 0,
@@ -147,7 +147,7 @@ enum {
 	DCLK_VOPLITE_PLL_SEL_SHIFT	= 10,
 	DCLK_VOPLITE_PLL_SEL_MASK	= 3 << DCLK_VOPLITE_PLL_SEL_SHIFT,
 	DCLK_VOPLITE_DIV_CON_SHIFT	= 0,
-	DCLK_VOPLITE_DIV_CON_MASK	= 0xf << DCLK_VOPLITE_DIV_CON_SHIFT,
+	DCLK_VOPLITE_DIV_CON_MASK	= 0xff << DCLK_VOPLITE_DIV_CON_SHIFT,
 
 	/* CRU_CLK_SEL19_CON */
 	CLK_PERI_PLL_SEL_GPLL		= 0,
diff --git a/drivers/clk/rockchip/clk_rk1808.c b/drivers/clk/rockchip/clk_rk1808.c
index 4763dcae04..67f05c37c4 100644
--- a/drivers/clk/rockchip/clk_rk1808.c
+++ b/drivers/clk/rockchip/clk_rk1808.c
@@ -84,7 +84,7 @@ static struct rockchip_pll_clock rk1808_pll_clks[] = {
 		    RK1808_MODE_CON, 4, 10, 0, rk1808_pll_rates),
 	[GPLL] = PLL(pll_rk3036, PLL_GPLL, RK1808_PLL_CON(24),
 		     RK1808_MODE_CON, 6, 10, 0, rk1808_pll_rates),
-	[NPLL] = PLL(pll_rk3036, PLL_NPLL, RK1808_PLL_CON(24),
+	[NPLL] = PLL(pll_rk3036, PLL_NPLL, RK1808_PLL_CON(32),
 		     RK1808_MODE_CON, 8, 10, 0, rk1808_pll_rates),
 	[PPLL] = PLL(pll_rk3036, PLL_PPLL, RK1808_PMU_PLL_CON(0),
 		     RK1808_PMU_MODE_CON, 0, 10, 0, rk1808_pll_rates),
@@ -517,8 +517,6 @@ static ulong rk1808_vop_set_clk(struct rk1808_clk_priv *priv,
 		 * vopb dclk source from npll, and equals to
 		 */
 		src_clk_div = DIV_ROUND_UP(RK1808_VOP_PLL_LIMIT_FREQ, hz);
-		rockchip_pll_set_rate(&rk1808_pll_clks[NPLL],
-				      priv->cru, NPLL, src_clk_div * hz);
 		rk_clrsetreg(&cru->clksel_con[5],
 			     DCLK_VOPRAW_SEL_MASK |
 			     DCLK_VOPRAW_PLL_SEL_MASK |
@@ -528,6 +526,9 @@ static ulong rk1808_vop_set_clk(struct rk1808_clk_priv *priv,
 			     DCLK_VOPRAW_PLL_SEL_NPLL <<
 			     DCLK_VOPRAW_PLL_SEL_SHIFT |
 			     (src_clk_div - 1) << DCLK_VOPRAW_DIV_CON_SHIFT);
+		rockchip_pll_set_rate(&rk1808_pll_clks[NPLL],
+				      priv->cru, NPLL, src_clk_div * hz);
+
 		break;
 	case DCLK_VOPLITE:
 		/*
@@ -546,9 +547,10 @@ static ulong rk1808_vop_set_clk(struct rk1808_clk_priv *priv,
 		rk_clrsetreg(&cru->clksel_con[7],
 			     DCLK_VOPLITE_SEL_MASK | DCLK_VOPLITE_PLL_SEL_MASK |
 			     DCLK_VOPLITE_DIV_CON_MASK,
-			     DCLK_VOPLITE_SEL_VOPRAW << DCLK_VOPLITE_SEL_SHIFT |
-			     parent << DCLK_VOPLITE_PLL_SEL_SHIFT |
-			     (src_clk_div - 1) << DCLK_VOPLITE_DIV_CON_SHIFT);
+			     (DCLK_VOPLITE_SEL_VOPRAW <<
+			     DCLK_VOPLITE_SEL_SHIFT) |
+			     (parent << DCLK_VOPLITE_PLL_SEL_SHIFT) |
+			     ((src_clk_div - 1) << DCLK_VOPLITE_DIV_CON_SHIFT));
 		break;
 	default:
 		printf("do not support this vop freq\n");
@@ -1076,6 +1078,8 @@ static int rk1808_clk_probe(struct udevice *dev)
 					      priv->cru, CPLL);
 	priv->gpll_hz = rockchip_pll_get_rate(&rk1808_pll_clks[GPLL],
 					      priv->cru, GPLL);
+	priv->npll_hz = rockchip_pll_get_rate(&rk1808_pll_clks[NPLL],
+					      priv->cru, NPLL);
 
 	/* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
 	ret = clk_set_defaults(dev);

commit 25098c06f428f9a711f1525b520552d5d7373944
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Sat Sep 29 17:58:50 2018 +0800

    drivers: rkflash: add new spi nand flash support
    
    1.FS35ND01G-S1,FS35ND02G-S2
    
    Change-Id: I4cd7f4b55902c48b25d26f42d6952aca3d468ba6
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/sfc_nand.c b/drivers/rkflash/sfc_nand.c
index 72eeebe705..f9c3d91054 100644
--- a/drivers/rkflash/sfc_nand.c
+++ b/drivers/rkflash/sfc_nand.c
@@ -36,23 +36,27 @@ static struct nand_info spi_nand_tbl[] = {
 	/* IS37SML01G1 */
 	{0xC821, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x00, 18, 1, 0xB0, 0XFF, 8, 12, &sfc_nand_ecc_status_sp1},
 	/* W25N01GV */
-	{0xEFAA, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xFF, 0XFF, 4, 20, &sfc_nand_ecc_status_sp1},
+	{0xEFAA, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xFF, 0XFF, 4, 20, &sfc_nand_ecc_status_sp1},
 	/* HYF2GQ4UAACAE */
-	{0xC952, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 14, 0xB0, 0, 4, 36, NULL},
+	{0xC952, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 14, 0xB0, 0, 4, 36, NULL},
 	/* HYF2GQ4UAACAE */
-	{0xC952, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 14, 0xB0, 0, 4, 36, NULL},
+	{0xC952, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 14, 0xB0, 0, 4, 36, NULL},
 	/* HYF2GQ4UDACAE */
-	{0xC922, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 4, 0xB0, 0, 4, 20, NULL},
+	{0xC922, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 4, 0xB0, 0, 4, 20, NULL},
 	/* HYF2GQ4UHCCAE */
-	{0xC95A, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 14, 0xB0, 0, 4, 36, NULL},
+	{0xC95A, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 14, 0xB0, 0, 4, 36, NULL},
 	/* HYF1GQ4UDACAE */
-	{0xC921, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 4, 0xB0, 0, 4, 20, NULL},
+	{0xC921, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 4, 0xB0, 0, 4, 20, NULL},
 	/* F50L1G41LB */
-	{0xC801, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xB0, 0xFF, 20, 36, NULL},
+	{0xC801, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xFF, 0xFF, 20, 36, NULL},
 	/* XT26G02A */
-	{0x0be2, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 1, 0xB0, 0x0, 8, 12, &sfc_nand_ecc_status_sp3},
+	{0x0be2, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 1, 0xB0, 0x0, 8, 12, &sfc_nand_ecc_status_sp4},
 	/* XT26G01A */
-	{0x0be1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xB0, 0x0, 8, 12, &sfc_nand_ecc_status_sp3},
+	{0x0be1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xB0, 0x0, 8, 12, &sfc_nand_ecc_status_sp4},
+	/* FS35ND01G-S1 */
+	{0xCDB1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 4, 0xB0, 0x0, 16, 20, &sfc_nand_ecc_status_sp5},
+	/* FS35ND02G-S2 */
+	{0xCDA2, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x03, 0x02, 0xD8, 0x00, 19, 4, 0xFF, 0xFF, 16, 20, &sfc_nand_ecc_status_sp5},
 };
 
 static u8 id_byte[8];
@@ -271,6 +275,84 @@ u32 sfc_nand_ecc_status_sp3(void)
 	return ret;
 }
 
+/*
+ * ecc spectial type4:
+ * [0x0000], No bit errors were detected;
+ * [0x0001, 0x0111], Bit errors were detected and corrected. Not
+ *	reach Flipping Bits;
+ * [0x1000], Multiple bit errors were detected and
+ *	not corrected.
+ * [0x1100], Bit error count equals the bit flip
+ *	detectionthreshold
+ * else, reserved
+ */
+u32 sfc_nand_ecc_status_sp4(void)
+{
+	int ret;
+	u32 i;
+	u8 ecc;
+	u8 status;
+	u32 timeout = 1000 * 1000;
+
+	for (i = 0; i < timeout; i++) {
+		ret = sfc_nand_read_feature(0xC0, &status);
+		if (ret != SFC_OK)
+			return SFC_NAND_ECC_ERROR;
+		if (!(status & (1 << 0)))
+			break;
+		sfc_delay(1);
+	}
+
+	ecc = (status >> 2) & 0x0f;
+	if (ecc < 7)
+		ret = SFC_NAND_ECC_OK;
+	else if (ecc == 7 || ecc == 12)
+		ret = SFC_NAND_ECC_REFRESH;
+	else
+		ret = SFC_NAND_ECC_ERROR;
+
+	return ret;
+}
+
+/*
+ * ecc spectial type5:
+ * [0x0], No bit errors were detected;
+ * [0x001, 0x011], Bit errors were detected and corrected. Not
+ *	reach Flipping Bits;
+ * [0x100], Bit error count equals the bit flip
+ *	detectionthreshold
+ * [0x101, 0x110], Reserved;
+ * [0x111], Multiple bit errors were detected and
+ *	not corrected.
+ */
+u32 sfc_nand_ecc_status_sp5(void)
+{
+	int ret;
+	u32 i;
+	u8 ecc;
+	u8 status;
+	u32 timeout = 1000 * 1000;
+
+	for (i = 0; i < timeout; i++) {
+		ret = sfc_nand_read_feature(0xC0, &status);
+		if (ret != SFC_OK)
+			return SFC_NAND_ECC_ERROR;
+		if (!(status & (1 << 0)))
+			break;
+		sfc_delay(1);
+	}
+
+	ecc = (status >> 4) & 0x07;
+	if (ecc < 4)
+		ret = SFC_NAND_ECC_OK;
+	else if (ecc == 4)
+		ret = SFC_NAND_ECC_REFRESH;
+	else
+		ret = SFC_NAND_ECC_ERROR;
+
+	return ret;
+}
+
 static u32 sfc_nand_erase_block(u8 cs, u32 addr)
 {
 	int ret;
@@ -306,8 +388,8 @@ static u32 sfc_nand_prog_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
 
 	sfc_nand_write_en();
 	if (sfc_nand_dev.prog_lines == DATA_LINES_X4 &&
-	    p_nand_info->QE_address == 0xFF &&
-	    sfc_get_version() != SFC_VER_3)
+	    p_nand_info->feature & FEA_SOFT_QOP_BIT &&
+	    sfc_get_version() < SFC_VER_3)
 		sfc_nand_rw_preset();
 
 	sfcmd.d32 = 0;
@@ -357,8 +439,8 @@ static u32 sfc_nand_read_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
 		ecc_result = sfc_nand_ecc_status();
 
 	if (sfc_nand_dev.read_lines == DATA_LINES_X4 &&
-	    p_nand_info->QE_address == 0xFF &&
-	    sfc_get_version() != SFC_VER_3)
+	    p_nand_info->feature & FEA_SOFT_QOP_BIT &&
+	    sfc_get_version() < SFC_VER_3)
 		sfc_nand_rw_preset();
 
 	sfcmd.d32 = 0;
diff --git a/drivers/rkflash/sfc_nand.h b/drivers/rkflash/sfc_nand.h
index 7b0b8318b1..82641acc2f 100644
--- a/drivers/rkflash/sfc_nand.h
+++ b/drivers/rkflash/sfc_nand.h
@@ -24,6 +24,7 @@
 #define FEA_4BIT_PROG           BIT(3)
 #define FEA_4BYTE_ADDR          BIT(4)
 #define FEA_4BYTE_ADDR_MODE	BIT(5)
+#define FEA_SOFT_QOP_BIT	BIT(6)
 
 #define MID_WINBOND             0xEF
 #define MID_GIGADEV             0xC8
@@ -125,5 +126,7 @@ void sfc_nand_deinit(void);
 int sfc_nand_read_id(u8 *buf);
 u32 sfc_nand_ecc_status_sp1(void);
 u32 sfc_nand_ecc_status_sp3(void);
+u32 sfc_nand_ecc_status_sp4(void);
+u32 sfc_nand_ecc_status_sp5(void);
 
 #endif

commit 27ffef75bfdb3c941c4371e81cd9d52bc11b7901
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Sat Sep 29 17:29:33 2018 +0800

    drivers: rkflash: fix firmware-lost-error in power lost case
    
    1.Fix recovery vpn mistaken subtraction
    2.Improve cache flush strategy
    3.Avoid currunt map_block being gc
    4.Make ftl buffer align
    5.Rm unuse file ftl_flash_plat.c
    6.Update ftl version to 5.0.48
    7.support NANDC ver 9
    
    Change-Id: Iccfa6b8301ea9d19f913a0b1447b2334ea748f8d
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/nandc.c b/drivers/rkflash/nandc.c
index 36452367ce..f8efb695bd 100644
--- a/drivers/rkflash/nandc.c
+++ b/drivers/rkflash/nandc.c
@@ -18,6 +18,7 @@
 #define	    NANDC_MASTER_EN
 
 void __iomem *nandc_base;
+static u8 g_nandc_ver;
 
 static u32 g_nandc_ecc_bits;
 #ifdef NANDC_MASTER_EN
@@ -32,9 +33,21 @@ void nandc_init(void __iomem *nandc_addr)
 	nandc_base = nandc_addr;
 
 	ctl_reg.d32 = 0;
-	ctl_reg.V6.wp = 1;
-	nandc_writel(ctl_reg.d32, NANDC_FMCTL);
-	nandc_writel(0, NANDC_RANDMZ_CFG);
+	g_nandc_ver = 6;
+	if (nandc_readl(NANDC_V9_NANDC_VER) == RK3326_NANDC_VER)
+		g_nandc_ver = 9;
+	if (g_nandc_ver == 9) {
+		ctl_reg.V9.wp = 1;
+		ctl_reg.V9.sif_read_delay = 2;
+		nandc_writel(ctl_reg.d32, NANDC_V9_FMCTL);
+		nandc_writel(0, NANDC_V9_RANDMZ_CFG);
+		nandc_writel(0x1041, NANDC_V9_FMWAIT);
+	} else {
+		ctl_reg.V6.wp = 1;
+		nandc_writel(ctl_reg.d32, NANDC_FMCTL);
+		nandc_writel(0, NANDC_RANDMZ_CFG);
+		nandc_writel(0x1061, NANDC_FMWAIT);
+	}
 	nandc_time_cfg(40);
 
 #ifdef NANDC_MASTER_EN
@@ -98,148 +111,255 @@ void nandc_randmz_sel(u8 chip_sel, u32 randmz_seed)
 
 void nandc_time_cfg(u32 ns)
 {
-	if (ns < 36)
-		nandc_writel(0x1061, NANDC_FMWAIT);
-	else if (ns >= 100)
-		nandc_writel(0x2082, NANDC_FMWAIT);
-	else
-		nandc_writel(0x1081, NANDC_FMWAIT);
+	if (g_nandc_ver == 9) {
+		if (ns < 36)
+			nandc_writel(0x1041, NANDC_V9_FMWAIT);
+		else if (ns >= 100)
+			nandc_writel(0x2082, NANDC_V9_FMWAIT);
+		else
+			nandc_writel(0x1061, NANDC_V9_FMWAIT);
+	} else {
+		if (ns < 36)
+			nandc_writel(0x1061, NANDC_FMWAIT);
+		else if (ns >= 100)
+			nandc_writel(0x2082, NANDC_FMWAIT);
+		else
+			nandc_writel(0x1081, NANDC_FMWAIT);
+	}
 }
 
 void nandc_bch_sel(u8 bits)
 {
 	union BCH_CTL_T tmp;
 	union FL_CTL_T fl_reg;
+	u8 bch_config;
 
 	fl_reg.d32 = 0;
 	fl_reg.V6.rst = 1;
-	nandc_writel(fl_reg.d32, NANDC_FLCTL);
 	g_nandc_ecc_bits = bits;
-	tmp.d32 = 0;
-	tmp.V6.addr = 0x10;
-	tmp.V6.bch_mode1 = 0;
-	if (bits == 16) {
-		tmp.V6.bch_mode = 0;
-	} else if (bits == 24) {
-		tmp.V6.bch_mode = 1;
+	if (g_nandc_ver == 9) {
+		nandc_writel(fl_reg.d32, NANDC_V9_FLCTL);
+		if (bits == 70)
+			bch_config = 0;
+		else if (bits == 60)
+			bch_config = 3;
+		else if (bits == 40)
+			bch_config = 2;
+		else
+			bch_config = 1;
+		tmp.d32 = 0;
+		tmp.V9.bchmode = bch_config;
+		tmp.V9.bchrst = 1;
+		nandc_writel(tmp.d32, NANDC_V9_BCHCTL);
 	} else {
-		tmp.V6.bch_mode1 = 1;
-		tmp.V6.bch_mode = 1;
-		if (bits == 40)
+		nandc_writel(fl_reg.d32, NANDC_FLCTL);
+		tmp.d32 = 0;
+		tmp.V6.addr = 0x10;
+		tmp.V6.bch_mode1 = 0;
+		if (bits == 16) {
 			tmp.V6.bch_mode = 0;
+		} else if (bits == 24) {
+			tmp.V6.bch_mode = 1;
+		} else {
+			tmp.V6.bch_mode1 = 1;
+			tmp.V6.bch_mode = 1;
+			if (bits == 40)
+				tmp.V6.bch_mode = 0;
+		}
+		tmp.V6.rst = 1;
+		nandc_writel(tmp.d32, NANDC_BCHCTL);
 	}
-	tmp.V6.rst = 1;
-	nandc_writel(tmp.d32, NANDC_BCHCTL);
 }
 
-static void nandc_xfer_start(u8 chip_sel,
-			     u8 dir,
-			     u8 sector_count,
-			     u8 st_buf,
-			     u32 *p_data,
-			     u32 *p_spare)
+/*
+ *Nandc xfer data transmission
+ *1. set bch register except nandc version equals 9
+ *2. set internal transfer control register
+ *3. set bus transfer
+ *	a. target memory data address
+ *	b. ahb setting
+ *4. configure register orderly and start transmission
+ */
+static void nandc_xfer_start(u8 dir, u8 n_sec, u32 *data, u32 *spare)
 {
 	union BCH_CTL_T bch_reg;
 	union FL_CTL_T fl_reg;
-	u8 bus_mode = (p_spare || p_data);
 	u32 i;
 	union MTRANS_CFG_T master_reg;
-	u16 *p_spare_tmp = (u16 *)p_spare;
-	u64 vir_addr;
+	u16 *p_spare_tmp = (u16 *)spare;
+	unsigned long vir_addr;
 
 	fl_reg.d32 = 0;
-	bch_reg.d32 = nandc_readl(NANDC_BCHCTL);
-	bch_reg.V6.addr = 0x10;
-	bch_reg.V6.power_down = 0;
-	bch_reg.V6.region = chip_sel;
-
-	fl_reg.V6.rdn = dir;
-	fl_reg.V6.dma = 1;
-	fl_reg.V6.tr_count = 1;
-	fl_reg.V6.async_tog_mix = 1;
-	fl_reg.V6.cor_en = 1;
-	fl_reg.V6.st_addr = st_buf / 2;
-
-	master_reg.d32 = nandc_readl(NANDC_MTRANS_CFG);
-	master_reg.V6.bus_mode = 0;
-	#ifdef NANDC_MASTER_EN
-	if (bus_mode != 0 && dir != 0) {
-		u32 spare_sz = 64;
-
-		for (i = 0; i < sector_count / 2; i++) {
-			if (p_spare) {
-				master.spare_buf[i * spare_sz / 4] =
-				(p_spare_tmp[0]) | ((u32)p_spare_tmp[1] << 16);
-				p_spare_tmp += 2;
-			} else{
-				master.spare_buf[i * spare_sz / 4] =
-				0xffffffff;
+	if (g_nandc_ver == 9) {
+		fl_reg.V9.flash_rdn = dir;
+		fl_reg.V9.bypass = 1;
+		fl_reg.V9.tr_count = 1;
+		fl_reg.V9.async_tog_mix = 1;
+		fl_reg.V9.cor_able = 1;
+		fl_reg.V9.st_addr = 0;
+		fl_reg.V9.page_num = (n_sec + 1) / 2;
+		/* dma start transfer data do care flash rdy */
+		fl_reg.V9.flash_st_mod = 1;
+
+		if (dir != 0) {
+			for (i = 0; i < n_sec / 2; i++) {
+				if (spare) {
+					master.spare_buf[i] =
+						(p_spare_tmp[0]) |
+						((u32)p_spare_tmp[1] << 16);
+					p_spare_tmp += 2;
+				} else {
+					master.spare_buf[i] = 0xffffffff;
+				}
 			}
+		} else {
+			master.spare_buf[0] = 1;
 		}
-	}
-	fl_reg.V6.page_num = (sector_count + 1) / 2;
-	master.page_vir = (u32 *)((p_data == (u32 *)NULL) ?
-				  master.page_buf :
-				  (u32 *)p_data);
-	master.spare_vir = (u32 *)master.spare_buf;
-
-	master.page_phy = (u32)((unsigned long)master.page_vir);
-	master.spare_phy = (u32)((unsigned long)master.spare_vir);
-	vir_addr = ((unsigned long)master.page_phy);
-	flush_dcache_range(vir_addr & (~0x3FuL),
-			   ((vir_addr + 63) & (~0x3FuL)) +
-				fl_reg.V6.page_num * 1024);
-	vir_addr = ((unsigned long)master.spare_phy);
-	flush_dcache_range(vir_addr & (~0x3FuL),
-			   ((vir_addr + 63) & (~0x3FuL)) +
-				fl_reg.V6.page_num * 128);
-	master.mapped = 1;
-	nandc_writel(master.page_phy, NANDC_MTRANS_SADDR0);
-	nandc_writel(master.spare_phy, NANDC_MTRANS_SADDR1);
-	master_reg.d32 = 0;
-	master_reg.V6.incr_num = 16;
-	master_reg.V6.burst = 7;
-	if ((((unsigned long)p_data) & 0x03) == 0)
+		master.page_vir = (u32 *)((data == (u32 *)NULL) ?
+					  master.page_buf :
+					  (u32 *)data);
+		master.spare_vir = (u32 *)master.spare_buf;
+
+		master.page_phy = (u32)((unsigned long)master.page_vir);
+		master.spare_phy = (u32)((unsigned long)master.spare_vir);
+		vir_addr = ((unsigned long)master.page_phy);
+		flush_dcache_range(vir_addr & (~0x3FuL),
+				   ((vir_addr + 63) & (~0x3FuL)) +
+					fl_reg.V6.page_num * 1024);
+		vir_addr = ((unsigned long)master.spare_phy);
+		flush_dcache_range(vir_addr & (~0x3FuL),
+				   ((vir_addr + 63) & (~0x3FuL)) +
+					fl_reg.V6.page_num * 128);
+		master.mapped = 1;
+		nandc_writel(master.page_phy, NANDC_V9_MTRANS_SADDR0);
+		nandc_writel(master.spare_phy, NANDC_V9_MTRANS_SADDR1);
+
+		master_reg.d32 =  nandc_readl(NANDC_V9_MTRANS_CFG);
+		master_reg.V9.incr_num = 16;
+		master_reg.V9.burst = 7;
+		master_reg.V9.hsize = 2;
+		master_reg.V9.bus_mode = 1;
+		master_reg.V9.ahb_wr = !dir;
+		master_reg.V9.ahb_wr_st = 1;
+		master_reg.V9.redundance_size = 0;
+
+		nandc_writel(master_reg.d32, NANDC_V9_MTRANS_CFG);
+		nandc_writel(fl_reg.d32, NANDC_V9_FLCTL);
+		fl_reg.V9.flash_st = 1;
+		nandc_writel(fl_reg.d32, NANDC_V9_FLCTL);
+	} else {
+		bch_reg.d32 = nandc_readl(NANDC_BCHCTL);
+		bch_reg.V6.addr = 0x10;
+		bch_reg.V6.power_down = 0;
+		bch_reg.V6.region = 0;
+
+		fl_reg.V6.rdn = dir;
+		fl_reg.V6.dma = 1;
+		fl_reg.V6.tr_count = 1;
+		fl_reg.V6.async_tog_mix = 1;
+		fl_reg.V6.cor_en = 1;
+		fl_reg.V6.st_addr = 0;
+
+		master_reg.d32 = nandc_readl(NANDC_MTRANS_CFG);
+		master_reg.V6.bus_mode = 0;
+		if (dir != 0) {
+			u32 spare_sz = 64;
+
+			for (i = 0; i < n_sec / 2; i++) {
+				if (spare) {
+					master.spare_buf[i * spare_sz / 4] =
+					(p_spare_tmp[0]) |
+					((u32)p_spare_tmp[1] << 16);
+					p_spare_tmp += 2;
+				} else {
+					master.spare_buf[i * spare_sz / 4] =
+					0xffffffff;
+				}
+			}
+		}
+		fl_reg.V6.page_num = (n_sec + 1) / 2;
+		master.page_vir = (u32 *)((data == (u32 *)NULL) ?
+					  master.page_buf :
+					  (u32 *)data);
+		master.spare_vir = (u32 *)master.spare_buf;
+
+		master.page_phy = (u32)((unsigned long)master.page_vir);
+		master.spare_phy = (u32)((unsigned long)master.spare_vir);
+		vir_addr = ((unsigned long)master.page_phy);
+		flush_dcache_range(vir_addr & (~0x3FuL),
+				   ((vir_addr + 63) & (~0x3FuL)) +
+					fl_reg.V6.page_num * 1024);
+		vir_addr = ((unsigned long)master.spare_phy);
+		flush_dcache_range(vir_addr & (~0x3FuL),
+				   ((vir_addr + 63) & (~0x3FuL)) +
+					fl_reg.V6.page_num * 128);
+		master.mapped = 1;
+		nandc_writel(master.page_phy, NANDC_MTRANS_SADDR0);
+		nandc_writel(master.spare_phy, NANDC_MTRANS_SADDR1);
+		master_reg.d32 = 0;
+		master_reg.V6.incr_num = 16;
+		master_reg.V6.burst = 7;
 		master_reg.V6.hsize = 2;
-	master_reg.V6.bus_mode = 1;
-	master_reg.V6.ahb_wr = !dir;
-	master_reg.V6.ahb_wr_st = 1;
-	#endif
-
-	nandc_writel(master_reg.d32, NANDC_MTRANS_CFG);
-	nandc_writel(bch_reg.d32, NANDC_BCHCTL);
-	nandc_writel(fl_reg.d32, NANDC_FLCTL);
-	fl_reg.V6.start = 1;
-	nandc_writel(fl_reg.d32, NANDC_FLCTL);
+		master_reg.V6.bus_mode = 1;
+		master_reg.V6.ahb_wr = !dir;
+		master_reg.V6.ahb_wr_st = 1;
+
+		nandc_writel(master_reg.d32, NANDC_MTRANS_CFG);
+		nandc_writel(bch_reg.d32, NANDC_BCHCTL);
+		nandc_writel(fl_reg.d32, NANDC_FLCTL);
+		fl_reg.V6.start = 1;
+		nandc_writel(fl_reg.d32, NANDC_FLCTL);
+	}
 }
 
-static void nandc_xfer_comp(u8 chip_sel)
+/*
+ * Wait for the end of data transmission
+ */
+static void nandc_xfer_done(void)
 {
 	union FL_CTL_T fl_reg;
 	union MTRANS_CFG_T master_reg;
 
-	master_reg.d32 = nandc_readl(NANDC_MTRANS_CFG);
-	if (master_reg.V6.bus_mode != 0) {
+	if (g_nandc_ver == 9) {
 		union MTRANS_STAT_T stat_reg;
 
+		master_reg.d32 = nandc_readl(NANDC_V9_MTRANS_CFG);
+		if (master_reg.V9.ahb_wr != 0) {
+			do {
+				fl_reg.d32 = nandc_readl(NANDC_V9_FLCTL);
+				stat_reg.d32 = nandc_readl(NANDC_V9_MTRANS_STAT);
+			} while (stat_reg.V9.mtrans_cnt < fl_reg.V9.page_num ||
+				 fl_reg.V9.tr_rdy == 0);
+		} else {
+			do {
+				fl_reg.d32 = nandc_readl(NANDC_V9_FLCTL);
+			} while (fl_reg.V9.tr_rdy == 0);
+		}
+	} else {
+		master_reg.d32 = nandc_readl(NANDC_MTRANS_CFG);
+		if (master_reg.V6.bus_mode != 0) {
+			union MTRANS_STAT_T stat_reg;
+
 		if (master_reg.V6.ahb_wr != 0) {
 			do {
 				fl_reg.d32 = nandc_readl(NANDC_FLCTL);
 				stat_reg.d32 = nandc_readl(NANDC_MTRANS_STAT);
-			} while (stat_reg.V6.mtrans_cnt < fl_reg.V6.page_num);
+			} while (stat_reg.V6.mtrans_cnt < fl_reg.V6.page_num ||
+				 fl_reg.V6.tr_rdy == 0);
 		} else {
 			do {
 				fl_reg.d32 = nandc_readl(NANDC_FLCTL);
 			} while (fl_reg.V6.tr_rdy == 0);
+			}
+		} else {
+			do {
+				fl_reg.d32 = nandc_readl(NANDC_FLCTL);
+			} while ((fl_reg.V6.tr_rdy == 0));
 		}
-	} else {
-		do {
-			fl_reg.d32 = nandc_readl(NANDC_FLCTL);
-		} while ((fl_reg.V6.tr_rdy == 0));
 	}
 }
 
-u32 nandc_xfer_data(u8 chip_sel, u8 dir, u8 sector_count,
+u32 nandc_xfer_data(u8 chip_sel, u8 dir, u8 n_sec,
 		    u32 *p_data, u32 *p_spare)
 {
 	u32 status = NAND_STS_OK;
@@ -251,39 +371,63 @@ u32 nandc_xfer_data(u8 chip_sel, u8 dir, u8 sector_count,
 		p_spare = (u32 *)spare;
 		memset(spare, 0xFF, sizeof(spare));
 	}
-	nandc_xfer_start(chip_sel, dir, sector_count, 0, p_data, p_spare);
-	nandc_xfer_comp(chip_sel);
+	nandc_xfer_start(dir, n_sec, p_data, p_spare);
+	nandc_xfer_done();
 	if (dir == NANDC_READ) {
-		if (p_spare) {
-			u32 spare_sz = 64;
-			u32 temp_data;
-			u8 *p_spare_temp = (u8 *)p_spare;
-
-			for (i = 0; i < sector_count / 2; i++) {
-				temp_data = master.spare_buf[i * spare_sz / 4];
-				*p_spare_temp++ = (u8)temp_data;
-				*p_spare_temp++ = (u8)(temp_data >> 8);
-				*p_spare_temp++ = (u8)(temp_data >> 16);
-				*p_spare_temp++ = (u8)(temp_data >> 24);
+		if (g_nandc_ver == 9) {
+			for (i = 0; i < n_sec / 4; i++) {
+				bch_st_reg.d32 = nandc_readl(NANDC_V9_BCHST(i));
+				if (n_sec > 2) {
+					if (bch_st_reg.V9.fail0 || bch_st_reg.V9.fail1) {
+						status = NAND_STS_ECC_ERR;
+					} else {
+						u32 tmp = max((u32)bch_st_reg.V9.err_bits0,
+							      (u32)bch_st_reg.V9.err_bits1);
+						status = max(tmp, status);
+					}
+				} else {
+					if (bch_st_reg.V9.fail0)
+						status = NAND_STS_ECC_ERR;
+					else
+						status = bch_st_reg.V9.err_bits0;
+				}
 			}
-		}
-		for (i = 0; i < sector_count / 4 ; i++) {
-			bch_st_reg.d32 = nandc_readl(NANDC_BCHST(i));
-			if (bch_st_reg.V6.fail0 || bch_st_reg.V6.fail1) {
-				status = NAND_STS_ECC_ERR;
-			} else {
-				u32 tmp = 0;
-
-				tmp =
-				max(bch_st_reg.V6.err_bits0 |
-				    ((u32)bch_st_reg.V6.err_bits0_5 << 5),
-				    bch_st_reg.V6.err_bits1 |
-				    ((u32)bch_st_reg.V6.err_bits1_5 << 5));
-				status = max(tmp, status);
+			if (p_spare) {
+				for (i = 0; i < n_sec / 2; i++)
+					p_spare[i] = master.spare_buf[i];
+			}
+		} else {
+			for (i = 0; i < n_sec / 4 ; i++) {
+				bch_st_reg.d32 = nandc_readl(NANDC_BCHST(i));
+				if (bch_st_reg.V6.fail0 || bch_st_reg.V6.fail1) {
+					status = NAND_STS_ECC_ERR;
+				} else {
+					u32 tmp = 0;
+
+					tmp =
+					max(bch_st_reg.V6.err_bits0 |
+					    ((u32)bch_st_reg.V6.err_bits0_5 << 5),
+					    bch_st_reg.V6.err_bits1 |
+					    ((u32)bch_st_reg.V6.err_bits1_5 << 5));
+					status = max(tmp, status);
+				}
+			}
+			if (p_spare) {
+				u32 spare_sz = 64;
+				u32 temp_data;
+				u8 *p_spare_temp = (u8 *)p_spare;
+
+				for (i = 0; i < n_sec / 2; i++) {
+					temp_data = master.spare_buf[i * spare_sz / 4];
+					*p_spare_temp++ = (u8)temp_data;
+					*p_spare_temp++ = (u8)(temp_data >> 8);
+					*p_spare_temp++ = (u8)(temp_data >> 16);
+					*p_spare_temp++ = (u8)(temp_data >> 24);
+				}
 			}
+			nandc_writel(0, NANDC_MTRANS_CFG);
 		}
 	}
-	nandc_writel(0, NANDC_MTRANS_CFG);
 	return status;
 }
 
diff --git a/drivers/rkflash/nandc.h b/drivers/rkflash/nandc.h
index 689f50f5cc..7043329691 100644
--- a/drivers/rkflash/nandc.h
+++ b/drivers/rkflash/nandc.h
@@ -14,6 +14,7 @@
 
 #define NANDC_READ	0
 #define NANDC_WRITE	1
+#define RK3326_NANDC_VER	0x56393030
 
 /* INT ID */
 enum NANDC_IRQ_NUM_T {
@@ -24,6 +25,13 @@ enum NANDC_IRQ_NUM_T {
 	NC_IRQ_LLP
 };
 
+enum ENUM_NANDC_BCH_CFG {
+	NC_BCH_70 = 0,
+	NC_BCH_24,
+	NC_BCH_40,
+	NC_BCH_60,
+};
+
 union FM_CTL_T {
 	u32 d32;
 	struct {
@@ -42,6 +50,22 @@ union FM_CTL_T {
 		unsigned read_delay : 3;	/* bits[24:26] */
 		unsigned reserved27_31 : 5;	/* bits[27:31] */
 	} V6;
+	struct	{
+		unsigned cs : 8;
+		unsigned wp : 1;
+		unsigned frdy : 1;
+		unsigned fifo_empth_flash : 1;
+		unsigned reserved11_12 : 2;
+		unsigned tm : 1;
+		unsigned syn_clken : 1;
+		unsigned syn_mode : 1;
+		unsigned flash_abort_en : 1;
+		/*share with flash_abort_stat*/
+		unsigned flash_abort_clear : 1;
+		unsigned sif_read_delay : 3;
+		unsigned io_mux : 3;
+		unsigned reserved24_31 : 8;
+	} V9;
 };
 
 union FM_WAIT_T {
@@ -56,6 +80,17 @@ union FM_WAIT_T {
 		unsigned fmw_dly_en : 1;
 		unsigned reserved31_31 : 1;
 	} V6;
+	struct {
+		unsigned rwcs : 5;
+		unsigned rwpw : 6;
+		unsigned hard_rdy : 1;
+		unsigned csrw : 6;
+		unsigned wait_frdy_dly : 5;
+		unsigned reserved23_23 : 1;
+		unsigned fmw_dly : 6;
+		unsigned fmw_dly_en : 1;
+		unsigned reserved31_31 : 1;
+	} V9;
 };
 
 union FL_CTL_T {
@@ -82,6 +117,29 @@ union FL_CTL_T {
 		unsigned async_tog_mix : 1;
 		unsigned reserved30_31 : 2;
 	} V6;
+	struct {
+		unsigned flash_rst : 1;
+		unsigned flash_rdn : 1;
+		unsigned flash_st : 1;
+		unsigned bypass : 1;
+		unsigned st_addr : 1;
+		unsigned tr_count : 2;
+		unsigned flash_st_mod : 1;
+		unsigned not_tran_data : 1;
+		unsigned tran_seed : 1;
+		unsigned cor_able : 1;
+		unsigned lba_en : 1;
+		unsigned lba_spare_sel : 1;
+		unsigned reserved13_18 : 6;
+		unsigned bchst_trans : 1;
+		unsigned tr_rdy : 1;
+		unsigned page_size : 1;
+		unsigned page_num : 6;
+		unsigned low_power : 1;
+		unsigned async_tog_mix : 1;
+		unsigned bypass_fifo_mode : 1;
+		unsigned reserved31_31 : 1;
+	} V9;
 };
 
 union BCH_CTL_T {
@@ -100,6 +158,17 @@ union BCH_CTL_T {
 		unsigned thres : 8;
 		unsigned reserved27_31 : 5;
 	} V6;
+	struct {
+		unsigned bchrst : 1;
+		unsigned wcnt_clear : 1;
+		unsigned reserved2 : 1;
+		unsigned bchepd : 1;
+		unsigned reserved4_15 : 12;
+		unsigned bchpage : 1;
+		unsigned bchthre : 8;
+		unsigned bchmode : 3;
+		unsigned reserved28_31 : 4;
+	} V9;
 };
 
 union BCH_ST_T {
@@ -123,6 +192,21 @@ union BCH_ST_T {
 		unsigned err_bits_low1_5 : 1;
 		unsigned reserved31_31 : 1;
 	} V6;
+	struct {
+		unsigned errf0 : 1;
+		unsigned done0 : 1;
+		unsigned fail0 : 1;
+		unsigned err_bits0 : 7;
+		unsigned all_f_flag0 : 1;
+		unsigned reserved11_15 : 5;
+		unsigned errf1 : 1;
+		unsigned done1 : 1;
+		unsigned fail1 : 1;
+		unsigned err_bits1 : 7;
+		unsigned all_f_flag1 : 1;
+		unsigned reserved27_30 : 4;
+		unsigned bch_ready_flag: 1;
+	} V9;
 };
 
 union MTRANS_CFG_T {
@@ -138,6 +222,18 @@ union MTRANS_CFG_T {
 		unsigned ahb_rst : 1;
 		unsigned reserved16_31 : 16;
 	} V6;
+	struct {
+		unsigned ahb_wr_st : 1;
+		unsigned ahb_wr : 1;
+		unsigned bus_mode : 1;
+		unsigned hsize : 3;
+		unsigned burst : 3;
+		unsigned incr_num : 5;
+		unsigned fl_pwd : 1;
+		unsigned ahb_rst : 1;
+		unsigned redundance_size : 11;
+		unsigned reserved27_31 : 5;
+	} V9;
 };
 
 union MTRANS_STAT_T {
@@ -147,6 +243,11 @@ union MTRANS_STAT_T {
 		unsigned mtrans_cnt : 5;
 		unsigned reserved21_31 : 11;
 	} V6;
+	struct {
+		unsigned bus_err : 16;
+		unsigned mtrans_cnt : 6;
+		unsigned reserved22_31 : 10;
+	} V9;
 };
 
 /* NANDC Registers */
@@ -182,6 +283,29 @@ union MTRANS_STAT_T {
 #define NANDC_CHIP_ADDR(id)	(0x800 + (id) * 0x100 + 0x4)
 #define NANDC_CHIP_CMD(id)	(0x800 + (id) * 0x100 + 0x8)
 
+#define NANDC_V9_FMCTL		0x0
+#define NANDC_V9_FMWAIT		0x4
+#define NANDC_V9_FLCTL		0x10
+#define NANDC_V9_BCHCTL		0x20
+#define NANDC_V9_MTRANS_CFG	0x30
+#define NANDC_V9_MTRANS_SADDR0	0x34
+#define NANDC_V9_MTRANS_SADDR1	0x38
+#define NANDC_V9_MTRANS_STAT	0x40
+#define NANDC_V9_MTRANS_STAT2	0x44
+#define NANDC_V9_NANDC_VER	0x80
+
+#define NANDC_V9_INTEN		0x120
+#define NANDC_V9_INTCLR		0x124
+#define NANDC_V9_INTST		0x128
+#define NANDC_V9_SPARE0		0x200
+#define NANDC_V9_SPARE1		0x204
+#define NANDC_V9_RANDMZ_CFG	0x208
+#define NANDC_V9_BCHST(i)	(0x150 + (i) * 4)
+
+#define NANDC_V9_CHIP_DATA(id)	(0x800 + (id) * 0x100)
+#define NANDC_V9_CHIP_ADDR(id)	(0x800 + (id) * 0x100 + 0x4)
+#define NANDC_V9_CHIP_CMD(id)	(0x800 + (id) * 0x100 + 0x8)
+
 struct MASTER_INFO_T {
 	u32  *page_buf;		/* [DATA_LEN]; */
 	u32  *spare_buf;	/* [DATA_LEN / (1024/128)]; */
diff --git a/drivers/rkflash/rk_sftl_arm_v7.S b/drivers/rkflash/rk_sftl_arm_v7.S
index 749f0077e0..a051330c1d 100644
--- a/drivers/rkflash/rk_sftl_arm_v7.S
+++ b/drivers/rkflash/rk_sftl_arm_v7.S
@@ -1,8 +1,8 @@
 /*
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
- * SPDX-License-Identifier:	GPL-2.0
- * date: 2018-08-02
+ * SPDX-License-Identifier:    GPL-2.0
+ * date: 2018-09-29
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -991,7 +991,7 @@ INSERT_DATA_LIST:
 	ldrh	r2, [r2]
 	cmp	r2, r3
 	bcs	.L111
-	movs	r2, #221
+	movs	r2, #214
 	ldr	r1, .L113+8
 	ldr	r0, .L113+12
 	pop	{r3, lr}
@@ -1107,7 +1107,7 @@ INSERT_FREE_LIST:
 	ldrh	r2, [r2]
 	cmp	r2, r3
 	bcs	.L124
-	movs	r2, #214
+	movs	r2, #207
 	ldr	r1, .L126+8
 	ldr	r0, .L126+12
 	pop	{r3, lr}
@@ -1147,7 +1147,7 @@ List_remove_node:
 	ldr	r3, [r0]
 	cmp	r4, r3
 	beq	.L129
-	movw	r2, #379
+	mov	r2, #372
 	ldr	r1, .L134+4
 	ldr	r0, .L134+8
 	bl	printf
@@ -1357,7 +1357,7 @@ List_update_data_list:
 	ldrh	r2, [fp, r6]
 	cmp	r2, r3
 	bne	.L159
-	mov	r2, #470
+	movw	r2, #463
 	ldr	r1, .L165+24
 	ldr	r0, .L165+28
 	bl	printf
@@ -1391,7 +1391,7 @@ List_update_data_list:
 	bl	List_remove_node
 	ldrh	r3, [r5]
 	cbnz	r3, .L162
-	movw	r2, #481
+	mov	r2, #474
 	ldr	r1, .L165+24
 	ldr	r0, .L165+28
 	bl	printf
@@ -1468,7 +1468,7 @@ select_l2p_ram_region:
 	bcc	.L176
 	cmp	r4, r2
 	bcc	.L169
-	mov	r2, #784
+	movw	r2, #787
 	ldr	r1, .L177+12
 	ldr	r0, .L177+16
 	bl	printf
@@ -1755,7 +1755,7 @@ make_superblock:
 	ldrh	r3, [r3]
 	cmp	r2, r3
 	bcc	.L216
-	movw	r2, #2097
+	movw	r2, #2110
 	ldr	r1, .L220+4
 	ldr	r0, .L220+8
 	bl	printf
@@ -1775,11 +1775,10 @@ make_superblock:
 	ldr	r2, .L220+16
 	movs	r0, #0
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	strb	r0, [r4, #9]
 	ldrh	r2, [r2]
 	smulbb	r3, r3, r2
 	strh	r3, [r4, #4]	@ movhi
-	movs	r3, #1
-	strb	r3, [r4, #9]
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
 .L219:
 	ldrh	r1, [r4]
@@ -1973,314 +1972,333 @@ FtlPrintInfo2buf:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r1, #64
+	ldr	r2, .L257
 	mov	r8, r0
-	ldr	r1, .L257
-	bl	sprintf
+	bl	snprintf
 	ldr	r3, .L257+4
 	add	r5, r8, r0
-	ldr	r1, .L257+8
+	ldr	r2, .L257+8
+	movs	r1, #64
 	mov	r0, r5
-	ldr	r4, .L257+12
-	ldr	r2, [r3]
-	bl	sprintf
+	ldr	r6, .L257+12
+	ldr	r3, [r3]
+	bl	snprintf
 	add	r5, r5, r0
-	ldr	r1, .L257+16
+	ldr	r2, .L257+16
+	movs	r1, #64
 	mov	r0, r5
-	ldr	r10, .L257+352
-	bl	sprintf
+	bl	snprintf
 	ldr	r3, .L257+20
 	add	r5, r5, r0
-	ldr	r1, .L257+24
+	ldr	r2, .L257+24
+	movs	r1, #64
 	mov	r0, r5
-	ldr	r6, .L257+28
-	ldr	r2, [r3]
-	bl	sprintf
+	ldr	r4, .L257+28
+	ldr	r3, [r3]
+	bl	snprintf
 	ldr	r3, .L257+32
 	add	r5, r5, r0
-	ldr	r1, .L257+36
+	ldr	r2, .L257+36
+	movs	r1, #64
 	mov	r0, r5
 	ldr	r7, .L257+40
-	ldr	r2, [r3]
-	bl	sprintf
+	ldr	r3, [r3]
+	bl	snprintf
 	ldr	r3, .L257+44
 	add	r5, r5, r0
-	ldr	r1, .L257+48
+	ldr	r2, .L257+48
+	movs	r1, #64
 	mov	r0, r5
-	ldr	fp, .L257+356
-	ldr	r2, [r3]
-	bl	sprintf
+	ldr	r10, .L257+328
+	ldr	r3, [r3]
+	bl	snprintf
 	ldr	r3, .L257+52
 	add	r5, r5, r0
-	ldr	r1, .L257+56
+	ldr	r2, .L257+56
+	movs	r1, #64
 	mov	r0, r5
-	ldr	r2, [r3]
-	bl	sprintf
+	ldr	r3, [r3]
+	bl	snprintf
 	ldr	r3, .L257+60
 	add	r5, r5, r0
-	ldr	r1, .L257+64
+	ldr	r2, .L257+64
+	movs	r1, #64
 	mov	r0, r5
-	ldr	r2, [r3]
-	bl	sprintf
+	ldr	r3, [r3]
+	bl	snprintf
 	ldr	r3, .L257+68
 	add	r5, r5, r0
-	ldr	r1, .L257+72
+	ldr	r2, .L257+72
+	movs	r1, #64
 	mov	r0, r5
-	ldr	r2, [r3]
-	bl	sprintf
+	ldr	r3, [r3]
+	bl	snprintf
 	ldr	r3, .L257+76
 	add	r5, r5, r0
-	ldr	r1, .L257+80
+	ldr	r2, .L257+80
+	movs	r1, #64
 	mov	r0, r5
-	ldr	r2, [r3]
-	bl	sprintf
+	ldr	r3, [r3]
+	bl	snprintf
 	ldr	r3, .L257+84
 	add	r5, r5, r0
-	ldr	r1, .L257+88
+	ldr	r2, .L257+88
+	movs	r1, #64
 	mov	r0, r5
-	ldr	r2, [r3]
-	bl	sprintf
+	ldr	r3, [r3]
+	bl	snprintf
 	ldr	r3, .L257+92
 	add	r5, r5, r0
-	ldr	r1, .L257+96
+	ldr	r2, .L257+96
+	movs	r1, #64
 	mov	r0, r5
-	ldr	r2, [r3]
-	lsrs	r2, r2, #11
-	bl	sprintf
+	ldr	r3, [r3]
+	lsrs	r3, r3, #11
+	bl	snprintf
 	ldr	r3, .L257+100
 	add	r5, r5, r0
-	ldr	r1, .L257+104
+	ldr	r2, .L257+104
+	movs	r1, #64
 	mov	r0, r5
-	ldr	r2, [r3]
-	lsrs	r2, r2, #11
-	bl	sprintf
+	ldr	r3, [r3]
+	lsrs	r3, r3, #11
+	bl	snprintf
 	ldr	r3, .L257+108
 	add	r5, r5, r0
-	ldr	r1, .L257+112
+	ldr	r2, .L257+112
+	movs	r1, #64
 	mov	r0, r5
-	ldr	r2, [r3]
-	bl	sprintf
+	ldr	r3, [r3]
+	bl	snprintf
 	ldr	r3, .L257+116
 	add	r5, r5, r0
-	ldr	r1, .L257+120
+	ldr	r2, .L257+120
+	movs	r1, #64
 	mov	r0, r5
-	ldr	r2, [r3]
-	bl	sprintf
+	ldr	r3, [r3]
+	bl	snprintf
 	add	r5, r5, r0
-	ldrh	r2, [r4, #6]
-	ldr	r1, .L257+124
+	ldrh	r3, [r6, #6]
+	ldr	r2, .L257+124
+	movs	r1, #64
 	mov	r0, r5
-	bl	sprintf
+	bl	snprintf
 	add	r5, r5, r0
-	ldrh	r2, [r10]
-	ldr	r1, .L257+128
+	ldrh	r3, [r4]
+	ldr	r2, .L257+128
+	movs	r1, #64
 	mov	r0, r5
-	bl	sprintf
+	bl	snprintf
 	ldr	r3, .L257+132
 	add	r5, r5, r0
-	ldr	r1, .L257+136
+	ldr	r2, .L257+136
+	movs	r1, #64
 	mov	r0, r5
-	ldr	r2, [r3]
-	bl	sprintf
+	ldr	r3, [r3]
+	bl	snprintf
 	ldr	r3, .L257+140
 	add	r5, r5, r0
-	ldr	r1, .L257+144
+	ldr	r2, .L257+144
+	movs	r1, #64
 	mov	r0, r5
-	ldr	r2, [r3]
-	bl	sprintf
+	ldr	r3, [r3]
+	bl	snprintf
 	ldr	r3, .L257+148
 	add	r5, r5, r0
-	ldr	r1, .L257+152
+	ldr	r2, .L257+152
+	movs	r1, #64
 	mov	r0, r5
-	ldr	r2, [r3]
-	bl	sprintf
+	ldr	r3, [r3]
+	bl	snprintf
 	ldr	r3, .L257+156
 	add	r5, r5, r0
-	ldr	r1, .L257+160
+	ldr	r2, .L257+160
+	movs	r1, #64
 	mov	r0, r5
-	ldr	r2, [r3]
-	bl	sprintf
+	ldr	r3, [r3]
+	bl	snprintf
 	ldr	r3, .L257+164
 	add	r5, r5, r0
-	ldr	r1, .L257+168
+	ldr	r2, .L257+168
+	movs	r1, #64
 	mov	r0, r5
-	ldr	r2, [r3]
-	bl	sprintf
+	ldr	r3, [r3]
+	bl	snprintf
 	ldr	r3, .L257+172
 	add	r5, r5, r0
-	ldr	r1, .L257+176
+	ldr	r2, .L257+176
+	movs	r1, #64
 	mov	r0, r5
-	ldr	r2, [r3]
-	bl	sprintf
+	ldr	r3, [r3]
+	bl	snprintf
 	add	r5, r5, r0
-	ldrh	r2, [r6, #30]
-	ldr	r1, .L257+180
+	ldrh	r3, [r7, #30]
+	ldr	r2, .L257+180
+	movs	r1, #64
 	mov	r0, r5
-	bl	sprintf
+	bl	snprintf
 	add	r5, r5, r0
-	ldrh	r2, [r6, #28]
-	ldr	r1, .L257+184
+	ldrh	r3, [r7, #28]
+	ldr	r2, .L257+184
+	movs	r1, #64
 	mov	r0, r5
-	bl	sprintf
-	ldr	r3, .L257+188
+	ldr	r7, .L257+188
+	bl	snprintf
+	ldr	r3, .L257+192
 	add	r5, r5, r0
-	ldr	r1, .L257+192
+	ldr	r2, .L257+196
+	movs	r1, #64
 	mov	r0, r5
-	ldr	r6, .L257+196
-	ldr	r2, [r3]
-	bl	sprintf
+	ldr	r3, [r3]
+	bl	snprintf
 	ldr	r3, .L257+200
 	add	r5, r5, r0
-	ldr	r1, .L257+204
+	ldr	r2, .L257+204
+	movs	r1, #64
 	mov	r0, r5
-	ldr	r2, [r3]
-	bl	sprintf
+	ldr	r3, [r3]
+	bl	snprintf
 	ldr	r3, .L257+208
 	add	r5, r5, r0
-	ldr	r1, .L257+212
+	ldr	r2, .L257+212
+	movs	r1, #64
 	mov	r0, r5
-	ldr	r2, [r3]
-	bl	sprintf
+	ldr	r3, [r3]
+	bl	snprintf
 	ldr	r3, .L257+216
 	add	r5, r5, r0
-	ldr	r1, .L257+220
+	ldr	r2, .L257+220
+	movs	r1, #64
 	mov	r0, r5
-	ldrh	r2, [r3, #6]
-	bl	sprintf
+	ldrh	r3, [r3, #6]
+	bl	snprintf
 	ldr	r3, .L257+224
 	add	r5, r5, r0
-	ldr	r1, .L257+228
+	ldr	r2, .L257+228
+	movs	r1, #64
 	mov	r0, r5
-	ldrh	r2, [r3]
-	bl	sprintf
+	ldrh	r3, [r3]
+	bl	snprintf
 	ldr	r3, .L257+232
 	add	r5, r5, r0
-	ldr	r1, .L257+236
+	ldr	r2, .L257+236
+	movs	r1, #64
 	mov	r0, r5
-	ldrh	r2, [r3]
-	bl	sprintf
+	ldrh	r3, [r3]
+	bl	snprintf
 	ldr	r3, .L257+240
 	add	r5, r5, r0
-	ldr	r1, .L257+244
+	ldr	r2, .L257+244
+	movs	r1, #64
 	mov	r0, r5
-	ldr	r2, [r3]
-	bl	sprintf
+	ldr	r3, [r3]
+	bl	snprintf
 	ldr	r3, .L257+248
 	add	r5, r5, r0
-	ldr	r1, .L257+252
-	mov	r0, r5
-	ldrh	r2, [r3]
-	bl	sprintf
-	ldrh	r2, [r4]
-	add	r5, r5, r0
-	ldr	r4, .L257+256
-	mov	r0, r5
-	ldr	r1, .L257+260
-	bl	sprintf
-	add	r5, r5, r0
-	ldrh	r2, [r4, #2]
-	ldr	r1, .L257+264
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-	ldr	r1, .L257+268
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrh	r2, [r4]
-	ldr	r1, .L257+272
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrb	r2, [r4, #8]	@ zero_extendqisi2
-	ldr	r1, .L257+276
+	ldr	r2, .L257+252
+	movs	r1, #64
 	mov	r0, r5
-	bl	sprintf
+	ldrh	r3, [r3]
+	bl	snprintf
 	add	r5, r5, r0
-	ldrh	r2, [r4, #4]
-	ldr	r1, .L257+280
+	ldrh	r3, [r6]
+	ldr	r2, .L257+256
+	movs	r1, #64
 	mov	r0, r5
-	bl	sprintf
-	ldr	r3, [r6]
+	ldr	r6, .L257+260
+	bl	snprintf
 	add	r5, r5, r0
-	ldrh	r2, [r4]
+	ldrh	r3, [r7, #2]
+	ldr	r2, .L257+264
+	movs	r1, #64
 	mov	r0, r5
-	ldr	r4, .L257+284
-	ldr	r1, .L257+288
-	ldrh	r2, [r3, r2, lsl #1]
-	bl	sprintf
+	bl	snprintf
 	add	r5, r5, r0
-	ldrh	r2, [r4, #2]
-	ldr	r1, .L257+292
+	ldrb	r3, [r7, #6]	@ zero_extendqisi2
+	ldr	r2, .L257+268
+	movs	r1, #64
 	mov	r0, r5
-	bl	sprintf
+	bl	snprintf
 	add	r5, r5, r0
-	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-	ldr	r1, .L257+296
+	ldrh	r3, [r7]
+	ldr	r2, .L257+272
+	movs	r1, #64
 	mov	r0, r5
-	bl	sprintf
+	bl	snprintf
 	add	r5, r5, r0
-	ldrh	r2, [r4]
-	ldr	r1, .L257+300
+	ldrb	r3, [r7, #8]	@ zero_extendqisi2
+	ldr	r2, .L257+276
+	movs	r1, #64
 	mov	r0, r5
-	bl	sprintf
+	bl	snprintf
 	add	r5, r5, r0
-	ldrb	r2, [r4, #8]	@ zero_extendqisi2
-	ldr	r1, .L257+304
+	ldrh	r3, [r7, #4]
+	ldr	r2, .L257+280
+	movs	r1, #64
 	mov	r0, r5
-	bl	sprintf
+	bl	snprintf
+	ldrh	r2, [r7]
 	add	r5, r5, r0
-	ldrh	r2, [r4, #4]
-	ldr	r1, .L257+308
-	mov	r0, r5
-	bl	sprintf
 	ldr	r3, [r6]
-	add	r5, r5, r0
-	ldrh	r2, [r4]
+	movs	r1, #64
+	ldr	r7, .L257+284
 	mov	r0, r5
-	ldr	r4, .L257+312
-	ldr	r1, .L257+316
-	ldrh	r2, [r3, r2, lsl #1]
-	bl	sprintf
+	ldrh	r3, [r3, r2, lsl #1]
+	ldr	r2, .L257+288
+	bl	snprintf
 	add	r5, r5, r0
-	ldrh	r2, [r4, #2]
-	ldr	r1, .L257+320
+	ldrh	r3, [r7, #2]
+	ldr	r2, .L257+292
+	movs	r1, #64
 	mov	r0, r5
-	bl	sprintf
+	bl	snprintf
 	add	r5, r5, r0
-	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-	ldr	r1, .L257+324
+	ldrb	r3, [r7, #6]	@ zero_extendqisi2
+	ldr	r2, .L257+296
+	movs	r1, #64
 	mov	r0, r5
-	bl	sprintf
+	bl	snprintf
 	add	r5, r5, r0
-	ldrh	r2, [r4]
-	ldr	r1, .L257+328
+	ldrh	r3, [r7]
+	ldr	r2, .L257+300
+	movs	r1, #64
 	mov	r0, r5
-	bl	sprintf
+	bl	snprintf
 	add	r5, r5, r0
-	ldrb	r2, [r4, #8]	@ zero_extendqisi2
-	ldr	r1, .L257+332
+	ldrb	r3, [r7, #8]	@ zero_extendqisi2
+	ldr	r2, .L257+304
+	movs	r1, #64
 	mov	r0, r5
-	bl	sprintf
+	bl	snprintf
 	add	r5, r5, r0
-	ldrh	r2, [r4, #4]
-	ldr	r1, .L257+336
+	ldrh	r3, [r7, #4]
+	ldr	r2, .L257+308
+	movs	r1, #64
 	mov	r0, r5
-	bl	sprintf
+	bl	snprintf
+	ldrh	r2, [r7]
 	add	r5, r5, r0
-	ldrh	r2, [r7, #2]
-	ldr	r1, .L257+340
+	ldr	r3, [r6]
+	movs	r1, #64
+	ldr	r7, .L257+312
 	mov	r0, r5
-	bl	sprintf
+	ldrh	r3, [r3, r2, lsl #1]
+	ldr	r2, .L257+316
+	bl	snprintf
 	add	r5, r5, r0
-	ldrb	r2, [r7, #6]	@ zero_extendqisi2
-	ldr	r1, .L257+344
+	ldrh	r3, [r7, #2]
+	ldr	r2, .L257+320
+	movs	r1, #64
 	mov	r0, r5
-	bl	sprintf
+	bl	snprintf
 	add	r5, r5, r0
-	ldrh	r2, [r7]
-	ldr	r1, .L257+348
+	ldrb	r3, [r7, #6]	@ zero_extendqisi2
+	ldr	r2, .L257+324
+	movs	r1, #64
 	mov	r0, r5
+	bl	snprintf
+	add	r5, r5, r0
 	b	.L258
 .L259:
 	.align	2
@@ -2292,10 +2310,10 @@ FtlPrintInfo2buf:
 	.word	.LC4
 	.word	.LANCHOR61
 	.word	.LC5
-	.word	.LANCHOR39
+	.word	.LANCHOR48
 	.word	.LANCHOR59
 	.word	.LC6
-	.word	.LANCHOR80
+	.word	.LANCHOR39
 	.word	.LANCHOR62
 	.word	.LC7
 	.word	.LANCHOR63
@@ -2332,9 +2350,9 @@ FtlPrintInfo2buf:
 	.word	.LC24
 	.word	.LC25
 	.word	.LC26
+	.word	.LANCHOR51
 	.word	.LANCHOR34
 	.word	.LC27
-	.word	.LANCHOR42
 	.word	.LANCHOR31
 	.word	.LC28
 	.word	.LANCHOR2
@@ -2349,8 +2367,8 @@ FtlPrintInfo2buf:
 	.word	.LC33
 	.word	.LANCHOR79
 	.word	.LC34
-	.word	.LANCHOR51
 	.word	.LC35
+	.word	.LANCHOR42
 	.word	.LC36
 	.word	.LC37
 	.word	.LC38
@@ -2367,83 +2385,123 @@ FtlPrintInfo2buf:
 	.word	.LC47
 	.word	.LC48
 	.word	.LC49
-	.word	.LC50
-	.word	.LC51
-	.word	.LC52
-	.word	.LC53
-	.word	.LC54
-	.word	.LC55
-	.word	.LANCHOR48
 	.word	.LANCHOR81
 .L258:
-	bl	sprintf
+	ldrh	r3, [r7]
+	ldr	r2, .L260
+	movs	r1, #64
+	mov	r0, r5
+	bl	snprintf
+	add	r5, r5, r0
+	ldrb	r3, [r7, #8]	@ zero_extendqisi2
+	ldr	r2, .L260+4
+	movs	r1, #64
+	mov	r0, r5
+	bl	snprintf
+	ldrh	r3, [r7, #4]
+	add	r5, r5, r0
+	ldr	r7, .L260+8
+	movs	r1, #64
+	ldr	r2, .L260+12
+	mov	r0, r5
+	bl	snprintf
+	add	r5, r5, r0
+	ldrh	r3, [r7, #2]
+	ldr	r2, .L260+16
+	movs	r1, #64
+	mov	r0, r5
+	bl	snprintf
 	add	r5, r5, r0
-	ldrb	r2, [r7, #8]	@ zero_extendqisi2
-	ldr	r1, .L260
+	ldrb	r3, [r7, #6]	@ zero_extendqisi2
+	ldr	r2, .L260+20
+	movs	r1, #64
 	mov	r0, r5
-	bl	sprintf
+	bl	snprintf
 	add	r5, r5, r0
-	ldrh	r2, [r7, #4]
-	ldr	r1, .L260+4
+	ldrh	r3, [r7]
+	ldr	r2, .L260+24
+	movs	r1, #64
+	mov	r0, r5
+	bl	snprintf
+	add	r5, r5, r0
+	ldrb	r3, [r7, #8]	@ zero_extendqisi2
+	ldr	r2, .L260+28
+	movs	r1, #64
+	mov	r0, r5
+	bl	snprintf
+	add	r5, r5, r0
+	ldrh	r3, [r7, #4]
+	ldr	r2, .L260+32
+	movs	r1, #64
 	mov	r0, r5
-	bl	sprintf
-	ldr	r3, [fp, #76]
+	bl	snprintf
+	ldr	r3, [r10, #76]
 	add	r5, r5, r0
-	ldr	r1, .L260+8
+	ldr	r2, .L260+36
+	movs	r1, #64
 	mov	r0, r5
+	str	r3, [sp, #4]
+	ldr	r3, [r10, #84]
 	str	r3, [sp]
-	ldr	r3, [fp, #84]
-	ldr	r2, [fp, #80]
-	bl	sprintf
-	adds	r4, r5, r0
-	ldr	r2, [fp, #72]
-	ldr	r1, .L260+12
-	mov	r0, r4
-	bl	sprintf
-	add	r4, r4, r0
-	ldr	r2, [fp, #96]
-	ldr	r1, .L260+16
-	mov	r0, r4
-	bl	sprintf
-	ldr	r3, .L260+20
-	add	r4, r4, r0
-	ldr	r1, .L260+24
-	mov	r0, r4
-	ldrh	r2, [r3]
-	bl	sprintf
-	ldr	r3, .L260+28
-	add	r4, r4, r0
-	ldr	r1, .L260+32
-	mov	r0, r4
-	ldrh	r2, [r3]
-	bl	sprintf
-	ldr	r3, .L260+36
-	add	r4, r4, r0
-	ldr	r1, .L260+40
-	mov	r0, r4
-	ldr	r2, [r3]
-	bl	sprintf
-	ldr	r3, .L260+44
-	add	r4, r4, r0
-	ldr	r1, .L260+48
-	mov	r0, r4
-	ldrh	r2, [r3]
-	bl	sprintf
-	add	r4, r4, r0
+	ldr	r3, [r10, #80]
+	bl	snprintf
+	add	r5, r5, r0
+	ldr	r3, [r10, #72]
+	ldr	r2, .L260+40
+	movs	r1, #64
+	mov	r0, r5
+	bl	snprintf
+	add	r5, r5, r0
+	ldr	r3, [r10, #96]
+	ldr	r2, .L260+44
+	movs	r1, #64
+	mov	r0, r5
+	bl	snprintf
+	ldr	r3, .L260+48
+	add	r5, r5, r0
+	ldr	r2, .L260+52
+	movs	r1, #64
+	mov	r0, r5
+	ldrh	r3, [r3]
+	bl	snprintf
+	ldr	r3, .L260+56
+	add	r5, r5, r0
+	ldr	r2, .L260+60
+	movs	r1, #64
+	mov	r0, r5
+	ldrh	r3, [r3]
+	bl	snprintf
+	ldr	r3, .L260+64
+	add	r5, r5, r0
+	ldr	r2, .L260+68
+	movs	r1, #64
+	mov	r0, r5
+	ldr	r3, [r3]
+	bl	snprintf
+	ldr	r3, .L260+72
+	add	r5, r5, r0
+	ldr	r2, .L260+76
+	movs	r1, #64
+	mov	r0, r5
+	ldrh	r3, [r3]
+	bl	snprintf
+	add	r5, r5, r0
 	bl	GetFreeBlockMinEraseCount
-	ldr	r1, .L260+52
-	mov	r2, r0
-	mov	r0, r4
-	bl	sprintf
-	add	r4, r4, r0
-	ldrh	r0, [r10]
+	ldr	r2, .L260+80
+	mov	r3, r0
+	movs	r1, #64
+	mov	r0, r5
+	bl	snprintf
+	add	r5, r5, r0
+	ldrh	r0, [r4]
 	bl	GetFreeBlockMaxEraseCount
-	ldr	r1, .L260+56
-	mov	r2, r0
-	mov	r0, r4
-	bl	sprintf
-	ldr	r3, .L260+60
-	add	r4, r4, r0
+	ldr	r2, .L260+84
+	mov	r3, r0
+	movs	r1, #64
+	mov	r0, r5
+	bl	snprintf
+	ldr	r3, .L260+88
+	adds	r4, r5, r0
 	ldr	r3, [r3]
 	cmp	r3, #1
 	beq	.L246
@@ -2459,52 +2517,54 @@ FtlPrintInfo2buf:
 	beq	.L248
 	ldr	r2, [r6]
 	mov	r0, r4
-	ldr	r1, .L260+64
-	ldrh	r2, [r2, r3, lsl #1]
-	bl	sprintf
+	movs	r1, #64
+	ldrh	r3, [r2, r3, lsl #1]
+	ldr	r2, .L260+92
+	bl	snprintf
 	add	r4, r4, r0
 .L248:
 	movs	r0, #0
-	ldr	r5, .L260+68
-	ldr	fp, .L260+84
+	ldr	r5, .L260+96
+	ldr	fp, .L260+112
 	movs	r7, #0
 	bl	List_get_gc_head_node
-	uxth	r3, r0
+	uxth	r0, r0
 .L250:
-	movw	r2, #65535
-	cmp	r3, r2
+	movw	r3, #65535
+	cmp	r0, r3
 	beq	.L249
-	ldr	r2, [fp]
+	ldr	r3, [fp]
 	mov	r10, #6
-	mul	r10, r10, r3
+	mul	r10, r10, r0
+	ldr	r2, .L260+100
+	movs	r1, #64
+	ldrh	r3, [r3, r0, lsl #1]
+	str	r3, [sp, #12]
+	ldr	r3, [r5]
+	add	r3, r3, r10
+	ldrh	r3, [r3, #4]
+	str	r3, [sp, #8]
+	ldr	r3, [r6]
+	ldrh	r3, [r3, r0, lsl #1]
+	stm	sp, {r0, r3}
+	mov	r3, r7
 	mov	r0, r4
-	ldr	r1, .L260+72
-	ldrh	r2, [r2, r3, lsl #1]
-	str	r2, [sp, #8]
-	ldr	r2, [r5]
-	add	r2, r2, r10
-	ldrh	r2, [r2, #4]
-	str	r2, [sp, #4]
-	ldr	r2, [r6]
-	ldrh	r2, [r2, r3, lsl #1]
-	str	r2, [sp]
-	mov	r2, r7
-	bl	sprintf
 	adds	r7, r7, #1
+	bl	snprintf
 	ldr	r3, [r5]
 	cmp	r7, #16
 	add	r4, r4, r0
-	ldrh	r3, [r3, r10]
+	ldrh	r0, [r3, r10]
 	bne	.L250
 .L249:
-	ldr	r3, .L260+76
+	ldr	r3, .L260+104
 	movs	r7, #0
 	ldr	r2, [r5]
-	ldr	r10, .L260+84
+	ldr	r10, .L260+112
 	ldr	r3, [r3]
-	ldr	fp, .L260+88
+	ldr	fp, .L260+116
 	subs	r3, r3, r2
-	ldr	r2, .L260+80
+	ldr	r2, .L260+108
 	asrs	r3, r3, #1
 	muls	r3, r2, r3
 	uxth	r3, r3
@@ -2516,16 +2576,18 @@ FtlPrintInfo2buf:
 	movs	r6, #6
 	muls	r6, r3, r6
 	mov	r0, r4
-	mov	r1, fp
+	movs	r1, #64
 	ldrh	r2, [r2, r3, lsl #1]
-	str	r2, [sp, #4]
+	str	r2, [sp, #8]
 	ldr	r2, [r5]
 	add	r2, r2, r6
 	ldrh	r2, [r2, #4]
-	str	r2, [sp]
-	mov	r2, r7
+	str	r3, [sp]
+	mov	r3, r7
 	adds	r7, r7, #1
-	bl	sprintf
+	str	r2, [sp, #4]
+	mov	r2, fp
+	bl	snprintf
 	cmp	r7, #4
 	add	r4, r4, r0
 	beq	.L251
@@ -2535,6 +2597,13 @@ FtlPrintInfo2buf:
 .L261:
 	.align	2
 .L260:
+	.word	.LC50
+	.word	.LC51
+	.word	.LANCHOR80
+	.word	.LC52
+	.word	.LC53
+	.word	.LC54
+	.word	.LC55
 	.word	.LC56
 	.word	.LC57
 	.word	.LC58
@@ -2570,11 +2639,15 @@ FtlPrintInfo2buf:
 rknand_proc_ftlread:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+	cmp	r0, #2048
 	push	{r3, r4, r5, lr}
-	mov	r5, r0
-	ldr	r2, .L263
-	ldr	r1, .L263+4
-	bl	sprintf
+	mov	r5, r1
+	blt	.L264
+	ldr	r3, .L265
+	movs	r1, #64
+	ldr	r2, .L265+4
+	mov	r0, r5
+	bl	snprintf
 	adds	r4, r5, r0
 	mov	r0, r4
 	bl	FtlPrintInfo2buf
@@ -2582,8 +2655,11 @@ rknand_proc_ftlread:
 	subs	r0, r0, r5
 	pop	{r3, r4, r5, pc}
 .L264:
+	movs	r0, #0
+	pop	{r3, r4, r5, pc}
+.L266:
 	.align	2
-.L263:
+.L265:
 	.word	.LC70
 	.word	.LC71
 	.size	rknand_proc_ftlread, .-rknand_proc_ftlread
@@ -2600,85 +2676,85 @@ GetSwlReplaceBlock:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #24
-	ldr	r3, .L293
-	ldr	r6, .L293+4
+	ldr	r3, .L295
+	ldr	r6, .L295+4
 	ldr	r5, [r3]
 	mov	r10, r3
 	ldr	r1, [r6]
 	cmp	r1, r5
-	bcs	.L266
-	ldr	r2, .L293+8
+	bcs	.L268
+	ldr	r2, .L295+8
 	movs	r3, #0
-	ldr	r4, .L293+12
+	ldr	r4, .L295+12
 	mov	r0, r3
 	ldrh	r1, [r2]
-	ldr	r2, .L293+16
+	ldr	r2, .L295+16
 	str	r3, [r4]
 	ldr	r7, [r2]
 	mov	r2, r3
-.L267:
+.L269:
 	cmp	r2, r1
-	bcc	.L268
-	cbz	r3, .L269
+	bcc	.L270
+	cbz	r3, .L271
 	str	r0, [r4]
-.L269:
+.L271:
 	ldr	r7, [r4]
 	mov	r0, r7
 	bl	__aeabi_uidiv
-	ldr	r3, .L293+20
+	ldr	r3, .L295+20
 	str	r0, [r6]
 	ldr	r0, [r3]
-	ldr	r3, .L293+24
+	ldr	r3, .L295+24
 	subs	r0, r7, r0
 	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
 	str	r0, [r4]
-.L270:
+.L272:
 	ldr	r6, [r6]
 	add	r3, r5, #256
 	cmp	r3, r6
-	bls	.L275
-	ldr	r2, .L293+28
+	bls	.L277
+	ldr	r2, .L295+28
 	add	r3, r5, #768
 	ldr	r2, [r2]
 	cmp	r3, r2
-	bls	.L275
-.L277:
+	bls	.L277
+.L279:
 	movw	r4, #65535
-.L276:
+.L278:
 	mov	r0, r4
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L268:
+.L270:
 	ldrh	r3, [r7, r2, lsl #1]
 	adds	r2, r2, #1
 	add	r0, r0, r3
 	movs	r3, #1
-	b	.L267
-.L266:
-	ldr	r2, .L293+28
+	b	.L269
+.L268:
+	ldr	r2, .L295+28
 	ldr	r3, [r2]
 	cmp	r1, r3
-	bls	.L270
+	bls	.L272
 	adds	r3, r3, #1
-	ldr	r0, .L293+8
+	ldr	r0, .L295+8
 	str	r3, [r2]
 	movs	r2, #0
-	ldr	r3, .L293+16
+	ldr	r3, .L295+16
 	ldr	r3, [r3]
 	subs	r3, r3, #2
-.L272:
+.L274:
 	ldrh	r1, [r0]
 	cmp	r2, r1
-	bcs	.L270
+	bcs	.L272
 	ldrh	r1, [r3, #2]
 	adds	r2, r2, #1
 	adds	r1, r1, #1
 	strh	r1, [r3, #2]!	@ movhi
-	b	.L272
-.L275:
-	ldr	r3, .L293+32
+	b	.L274
+.L277:
+	ldr	r3, .L295+32
 	ldrh	r0, [r3]
 	add	r0, r0, r0, lsl #1
 	ubfx	r0, r0, #2, #16
@@ -2686,56 +2762,56 @@ GetSwlReplaceBlock:
 	add	r3, r5, #64
 	mov	r2, r0
 	cmp	r0, r3
-	bcc	.L277
-	ldr	r3, .L293+36
+	bcc	.L279
+	ldr	r3, .L295+36
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L277
-	ldr	r1, .L293+8
+	beq	.L279
+	ldr	r1, .L295+8
 	movs	r0, #0
 	mov	fp, #6
 	ldrh	r1, [r1]
 	str	r1, [sp, #20]
-	ldr	r1, .L293+40
+	ldr	r1, .L295+40
 	ldr	r8, [r1]
-	ldr	r1, .L293+16
+	ldr	r1, .L295+16
 	ldr	r7, [r1]
 	movw	r1, #65535
 	mov	ip, r1
-.L278:
+.L280:
 	ldrh	lr, [r3]
 	movw	r4, #65535
 	cmp	lr, r4
-	bne	.L281
+	bne	.L283
 	mov	r4, ip
-.L280:
+.L282:
 	movw	r3, #65535
 	cmp	r4, r3
-	beq	.L277
+	beq	.L279
 	ldrh	r7, [r7, r4, lsl #1]
 	lsl	r8, r4, #1
 	cmp	r5, r7
-	bcs	.L282
+	bcs	.L284
 	bl	GetFreeBlockMinEraseCount
 	cmp	r5, r0
 	it	cc
 	strcc	r1, [r10]
-.L282:
+.L284:
 	cmp	r6, r7
-	bls	.L277
+	bls	.L279
 	add	r3, r7, #128
 	cmp	r2, r3
-	ble	.L277
+	ble	.L279
 	add	r3, r7, #256
-	ldr	r0, .L293+28
+	ldr	r0, .L295+28
 	cmp	r6, r3
-	bhi	.L283
+	bhi	.L285
 	ldr	r1, [r0]
 	add	r3, r7, #768
 	cmp	r3, r1
-	bcs	.L277
-.L283:
-	ldr	r3, .L293+44
+	bcs	.L279
+.L285:
+	ldr	r3, .L295+44
 	mov	r1, r4
 	str	r2, [sp, #8]
 	mov	r2, r6
@@ -2744,38 +2820,38 @@ GetSwlReplaceBlock:
 	ldrh	r3, [r3, r8]
 	str	r3, [sp]
 	ldr	r3, [r0]
-	ldr	r0, .L293+48
+	ldr	r0, .L295+48
 	bl	printf
-	ldr	r3, .L293+52
+	ldr	r3, .L295+52
 	movs	r2, #1
 	str	r2, [r3]
-	b	.L276
-.L281:
+	b	.L278
+.L283:
 	adds	r0, r0, #1
 	ldr	r4, [sp, #20]
 	uxth	r0, r0
 	cmp	r0, r4
-	bhi	.L277
+	bhi	.L279
 	ldrh	r4, [r3, #4]
-	cbz	r4, .L279
-	ldr	r4, .L293+56
+	cbz	r4, .L281
+	ldr	r4, .L295+56
 	sub	r3, r3, r8
 	asrs	r3, r3, #1
 	muls	r3, r4, r3
 	uxth	r4, r3
 	ldrh	r3, [r7, r4, lsl #1]
 	cmp	r5, r3
-	bcs	.L280
+	bcs	.L282
 	cmp	r1, r3
 	itt	hi
 	movhi	r1, r3
 	movhi	ip, r4
-.L279:
+.L281:
 	mla	r3, fp, lr, r8
-	b	.L278
-.L294:
+	b	.L280
+.L296:
 	.align	2
-.L293:
+.L295:
 	.word	.LANCHOR77
 	.word	.LANCHOR74
 	.word	.LANCHOR5
@@ -2806,18 +2882,18 @@ free_data_superblock:
 	movw	r2, #65535
 	push	{r3, lr}
 	cmp	r0, r2
-	beq	.L296
-	ldr	r2, .L297
+	beq	.L298
+	ldr	r2, .L299
 	movs	r1, #0
 	ldr	r2, [r2]
 	strh	r1, [r2, r0, lsl #1]	@ movhi
 	bl	INSERT_FREE_LIST
-.L296:
+.L298:
 	movs	r0, #0
 	pop	{r3, pc}
-.L298:
+.L300:
 	.align	2
-.L297:
+.L299:
 	.word	.LANCHOR42
 	.size	free_data_superblock, .-free_data_superblock
 	.section	.text.get_new_active_ppa,"ax",%progbits
@@ -2836,42 +2912,42 @@ get_new_active_ppa:
 	movw	r3, #65535
 	mov	r4, r0
 	cmp	r2, r3
-	bne	.L300
-	movw	r2, #2710
-	ldr	r1, .L313
-	ldr	r0, .L313+4
+	bne	.L302
+	movw	r2, #2740
+	ldr	r1, .L315
+	ldr	r0, .L315+4
 	bl	printf
-.L300:
-	ldr	r5, .L313+8
+.L302:
+	ldr	r5, .L315+8
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5]
 	cmp	r2, r3
-	bne	.L301
-	movw	r2, #2711
-	ldr	r1, .L313
-	ldr	r0, .L313+4
+	bne	.L303
+	movw	r2, #2741
+	ldr	r1, .L315
+	ldr	r0, .L315+4
 	bl	printf
-.L301:
+.L303:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L302
-	movw	r2, #2712
-	ldr	r1, .L313
-	ldr	r0, .L313+4
+	cbnz	r3, .L304
+	movw	r2, #2742
+	ldr	r1, .L315
+	ldr	r0, .L315+4
 	bl	printf
-.L302:
+.L304:
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	movs	r3, #0
 	strb	r3, [r4, #10]
 	movw	r6, #65535
 	adds	r2, r2, #8
 	ldrh	r0, [r4, r2, lsl #1]
-	ldr	r2, .L313+12
+	ldr	r2, .L315+12
 	ldrh	r1, [r2]
 	mov	r2, r3
-.L303:
+.L305:
 	cmp	r0, r6
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	beq	.L305
+	beq	.L307
 	ldrh	r2, [r4, #4]
 	ldrh	r6, [r4, #2]
 	subs	r2, r2, #1
@@ -2879,7 +2955,7 @@ get_new_active_ppa:
 	orr	r6, r6, r0, lsl #10
 	movw	r0, #65535
 	strh	r2, [r4, #4]	@ movhi
-.L307:
+.L309:
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r1, r3
@@ -2891,21 +2967,21 @@ get_new_active_ppa:
 	add	r7, r3, #8
 	ldrh	r7, [r4, r7, lsl #1]
 	cmp	r7, r0
-	beq	.L307
+	beq	.L309
 	strb	r3, [r4, #6]
 	ldrh	r1, [r4, #2]
 	ldrh	r3, [r5]
 	cmp	r1, r3
-	bne	.L299
-	cbz	r2, .L299
-	movw	r2, #2733
-	ldr	r1, .L313
-	ldr	r0, .L313+4
+	bne	.L301
+	cbz	r2, .L301
+	movw	r2, #2763
+	ldr	r1, .L315
+	ldr	r0, .L315+4
 	bl	printf
-.L299:
+.L301:
 	mov	r0, r6
 	pop	{r3, r4, r5, r6, r7, pc}
-.L305:
+.L307:
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, r1
@@ -2918,10 +2994,10 @@ get_new_active_ppa:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r0, [r4, r3, lsl #1]
-	b	.L303
-.L314:
+	b	.L305
+.L316:
 	.align	2
-.L313:
+.L315:
 	.word	.LANCHOR88
 	.word	.LC1
 	.word	.LANCHOR19
@@ -2940,54 +3016,54 @@ FtlGcBufInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #0
-	ldr	r1, .L320
+	ldr	r1, .L322
 	mov	fp, #1
-	ldr	r2, .L320+4
+	ldr	r2, .L322+4
 	ldr	r5, [r1]
-	ldr	r1, .L320+8
+	ldr	r1, .L322+8
 	str	r3, [r2]
-	ldr	r2, .L320+12
+	ldr	r2, .L322+12
 	mov	r0, r5
 	ldr	r1, [r1]
 	ldrh	r2, [r2]
 	str	r1, [sp, #4]
-	ldr	r1, .L320+16
+	ldr	r1, .L322+16
 	ldrh	r1, [r1]
 	str	r1, [sp]
-	ldr	r1, .L320+20
+	ldr	r1, .L322+20
 	ldr	r10, [r1]
-	ldr	r1, .L320+24
+	ldr	r1, .L322+24
 	ldrh	r7, [r1]
-	ldr	r1, .L320+28
+	ldr	r1, .L322+28
 	ldr	r4, [r1]
 	movs	r1, #12
 	mla	r1, r2, r1, r1
 	adds	r4, r4, #8
 	add	r8, r5, r1
 	mov	r1, r3
-.L316:
+.L318:
 	adds	r0, r0, #12
 	ldr	r6, [sp]
 	cmp	r0, r8
 	add	ip, r3, r7
 	add	r4, r4, #20
 	add	lr, r1, r6
-	bne	.L317
-	ldr	r3, .L320+32
+	bne	.L319
+	ldr	r3, .L322+32
 	mov	lr, #12
 	mov	r8, #0
 	ldr	r0, [r3]
-	ldr	r3, .L320+8
+	ldr	r3, .L322+8
 	ldr	r4, [r3]
-	ldr	r3, .L320+20
+	ldr	r3, .L322+20
 	ldr	ip, [r3]
-.L318:
+.L320:
 	cmp	r2, r0
-	bcc	.L319
+	bcc	.L321
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L317:
+.L319:
 	bic	r1, r1, #3
 	bic	r3, r3, #3
 	mov	r6, r1
@@ -3001,8 +3077,8 @@ FtlGcBufInit:
 	str	r3, [r4, #-16]
 	mov	r3, ip
 	str	r6, [r4, #-20]
-	b	.L316
-.L319:
+	b	.L318
+.L321:
 	ldr	r3, [sp]
 	mul	r10, lr, r2
 	muls	r3, r2, r3
@@ -3017,10 +3093,10 @@ FtlGcBufInit:
 	bic	r3, r3, #3
 	add	r3, r3, ip
 	str	r3, [r1, #4]
-	b	.L318
-.L321:
+	b	.L320
+.L323:
 	.align	2
-.L320:
+.L322:
 	.word	.LANCHOR90
 	.word	.LANCHOR89
 	.word	.LANCHOR91
@@ -3042,41 +3118,41 @@ FtlGcBufInit:
 FtlGcBufFree:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L329
+	ldr	r3, .L331
 	mov	ip, #12
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
 	mov	fp, #20
 	mov	lr, r4
 	ldr	r7, [r3]
-	ldr	r3, .L329+4
+	ldr	r3, .L331+4
 	ldr	r5, [r3]
-.L323:
+.L325:
 	uxth	r3, r4
 	cmp	r1, r3
-	bls	.L322
+	bls	.L324
 	mla	r8, fp, r3, r0
 	movs	r2, #0
-.L324:
+.L326:
 	uxth	r3, r2
 	cmp	r7, r3
-	bls	.L325
+	bls	.L327
 	mul	r3, ip, r3
 	ldr	r6, [r8, #8]
 	adds	r2, r2, #1
 	add	r10, r5, r3
 	ldr	r3, [r5, r3]
 	cmp	r3, r6
-	bne	.L324
+	bne	.L326
 	str	lr, [r10, #8]
-.L325:
+.L327:
 	adds	r4, r4, #1
-	b	.L323
-.L322:
+	b	.L325
+.L324:
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L330:
+.L332:
 	.align	2
-.L329:
+.L331:
 	.word	.LANCHOR94
 	.word	.LANCHOR90
 	.size	FtlGcBufFree, .-FtlGcBufFree
@@ -3091,43 +3167,43 @@ FtlGcBufFree:
 FtlGcBufAlloc:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L338
+	ldr	r3, .L340
 	movs	r2, #0
 	push	{r4, r5, r6, r7, r8, r10, lr}
 	mov	ip, #12
 	movs	r7, #1
 	mov	lr, #20
 	ldr	r4, [r3]
-	ldr	r3, .L338+4
+	ldr	r3, .L340+4
 	ldr	r5, [r3]
-.L332:
+.L334:
 	uxth	r8, r2
 	cmp	r1, r8
-	bhi	.L336
+	bhi	.L338
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L336:
+.L338:
 	mov	r10, #0
-.L333:
+.L335:
 	uxth	r3, r10
 	cmp	r4, r3
-	bls	.L334
+	bls	.L336
 	mla	r3, ip, r3, r5
 	add	r10, r10, #1
 	ldr	r6, [r3, #8]
 	cmp	r6, #0
-	bne	.L333
+	bne	.L335
 	mla	r8, lr, r8, r0
 	str	r7, [r3, #8]
 	ldr	r6, [r3]
 	ldr	r3, [r3, #4]
 	str	r6, [r8, #8]
 	str	r3, [r8, #12]
-.L334:
+.L336:
 	adds	r2, r2, #1
-	b	.L332
-.L339:
+	b	.L334
+.L341:
 	.align	2
-.L338:
+.L340:
 	.word	.LANCHOR94
 	.word	.LANCHOR90
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
@@ -3143,25 +3219,25 @@ IsBlkInGcList:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L345
-	ldr	r2, .L345+4
+	ldr	r3, .L347
+	ldr	r2, .L347+4
 	ldr	r3, [r3]
 	ldrh	r2, [r2]
 	add	r2, r3, r2, lsl #1
-.L341:
+.L343:
 	cmp	r3, r2
-	bne	.L343
+	bne	.L345
 	movs	r0, #0
 	bx	lr
-.L343:
+.L345:
 	ldrh	r1, [r3], #2
 	cmp	r1, r0
-	bne	.L341
+	bne	.L343
 	movs	r0, #1
 	bx	lr
-.L346:
+.L348:
 	.align	2
-.L345:
+.L347:
 	.word	.LANCHOR95
 	.word	.LANCHOR96
 	.size	IsBlkInGcList, .-IsBlkInGcList
@@ -3178,35 +3254,35 @@ FtlGcUpdatePage:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r5, r0
-	ldr	r4, .L351
+	ldr	r4, .L353
 	ubfx	r0, r0, #10, #16
 	mov	r6, r1
 	mov	r7, r2
 	bl	P2V_block_in_plane
-	ldr	r3, .L351+4
+	ldr	r3, .L353+4
 	ldrh	r1, [r4]
 	ldr	r2, [r3]
 	movs	r3, #0
-.L348:
+.L350:
 	uxth	ip, r3
 	cmp	ip, r1
-	bcc	.L350
-	bne	.L349
+	bcc	.L352
+	bne	.L351
 	strh	r0, [r2, ip, lsl #1]	@ movhi
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	b	.L349
-.L350:
+	b	.L351
+.L352:
 	adds	r3, r3, #1
 	add	ip, r2, r3, lsl #1
 	ldrh	ip, [ip, #-2]
 	cmp	ip, r0
-	bne	.L348
-.L349:
-	ldr	r2, .L351+8
+	bne	.L350
+.L351:
+	ldr	r2, .L353+8
 	movs	r0, #12
-	ldr	r1, .L351+12
+	ldr	r1, .L353+12
 	ldrh	r3, [r2]
 	ldr	r1, [r1]
 	muls	r0, r3, r0
@@ -3217,9 +3293,9 @@ FtlGcUpdatePage:
 	str	r5, [r1, r0]
 	strh	r3, [r2]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.L352:
+.L354:
 	.align	2
-.L351:
+.L353:
 	.word	.LANCHOR96
 	.word	.LANCHOR95
 	.word	.LANCHOR97
@@ -3239,31 +3315,31 @@ FtlGcRefreshBlock:
 	push	{r3, r4, r5, lr}
 	mov	r1, r0
 	mov	r4, r0
-	ldr	r0, .L356
+	ldr	r0, .L358
 	bl	printf
-	ldr	r0, .L356+4
+	ldr	r0, .L358+4
 	ldrh	r5, [r0]
 	cmp	r4, r5
-	beq	.L354
-	ldr	r3, .L356+8
+	beq	.L356
+	ldr	r3, .L358+8
 	ldrh	r1, [r3]
 	cmp	r4, r1
-	beq	.L354
+	beq	.L356
 	movw	r2, #65535
 	cmp	r5, r2
-	bne	.L355
+	bne	.L357
 	strh	r4, [r0]	@ movhi
-.L354:
+.L356:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L355:
+.L357:
 	cmp	r1, r2
 	it	eq
 	strheq	r4, [r3]	@ movhi
-	b	.L354
-.L357:
+	b	.L356
+.L359:
 	.align	2
-.L356:
+.L358:
 	.word	.LC73
 	.word	.LANCHOR99
 	.word	.LANCHOR100
@@ -3281,41 +3357,41 @@ FtlGcMarkBadPhyBlk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
 	mov	r5, r0
-	ldr	r4, .L362
+	ldr	r4, .L364
 	bl	P2V_block_in_plane
 	mov	r2, r5
 	mov	r6, r0
 	ldrh	r1, [r4]
-	ldr	r0, .L362+4
+	ldr	r0, .L364+4
 	bl	printf
 	mov	r0, r6
 	bl	FtlGcRefreshBlock
 	ldrh	r3, [r4]
 	movs	r2, #0
-	ldr	r0, .L362+8
-.L359:
+	ldr	r0, .L364+8
+.L361:
 	uxth	r1, r2
 	cmp	r3, r1
-	bhi	.L361
+	bhi	.L363
 	cmp	r3, #15
 	itttt	ls
 	addls	r2, r3, #1
 	strhls	r2, [r4]	@ movhi
-	ldrls	r2, .L362+8
+	ldrls	r2, .L364+8
 	strhls	r5, [r2, r3, lsl #1]	@ movhi
-	b	.L360
-.L361:
+	b	.L362
+.L363:
 	adds	r2, r2, #1
 	add	r1, r0, r2, lsl #1
 	ldrh	r1, [r1, #-2]
 	cmp	r1, r5
-	bne	.L359
-.L360:
+	bne	.L361
+.L362:
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L363:
+.L365:
 	.align	2
-.L362:
+.L364:
 	.word	.LANCHOR101
 	.word	.LC74
 	.word	.LANCHOR102
@@ -3331,22 +3407,22 @@ FtlGcMarkBadPhyBlk:
 FtlGcReFreshBadBlk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L370
+	ldr	r3, .L372
 	push	{r4, lr}
 	ldrh	r3, [r3]
-	cbz	r3, .L365
-	ldr	r2, .L370+4
+	cbz	r3, .L367
+	ldr	r2, .L372+4
 	ldrh	r1, [r2]
 	movw	r2, #65535
 	cmp	r1, r2
-	bne	.L365
-	ldr	r4, .L370+8
+	bne	.L367
+	ldr	r4, .L372+8
 	ldrh	r2, [r4]
 	cmp	r2, r3
 	itt	cs
 	movcs	r3, #0
 	strhcs	r3, [r4]	@ movhi
-	ldr	r3, .L370+12
+	ldr	r3, .L372+12
 	ldrh	r2, [r4]
 	ldrh	r0, [r3, r2, lsl #1]
 	bl	P2V_block_in_plane
@@ -3354,12 +3430,12 @@ FtlGcReFreshBadBlk:
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-.L365:
+.L367:
 	movs	r0, #0
 	pop	{r4, pc}
-.L371:
+.L373:
 	.align	2
-.L370:
+.L372:
 	.word	.LANCHOR101
 	.word	.LANCHOR99
 	.word	.LANCHOR103
@@ -3413,1107 +3489,481 @@ rknand_print_hex:
 	mov	r10, r3
 	mov	r5, r6
 	mov	r4, r6
-.L375:
+.L377:
 	cmp	r4, r10
-	bcc	.L381
-	ldr	r0, .L384
+	bcc	.L383
+	ldr	r0, .L386
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
 	b	printf
-.L381:
-	cbnz	r5, .L376
+.L383:
+	cbnz	r5, .L378
 	mov	r2, r6
 	mov	r1, fp
-	ldr	r0, .L384+4
+	ldr	r0, .L386+4
 	bl	printf
-.L376:
+.L378:
 	cmp	r8, #4
-	bne	.L377
+	bne	.L379
 	ldr	r1, [r7, r4, lsl #2]
-.L383:
-	ldr	r0, .L384+8
-.L382:
+.L385:
+	ldr	r0, .L386+8
+.L384:
 	adds	r5, r5, #1
 	bl	printf
 	cmp	r5, #15
-	bls	.L380
+	bls	.L382
 	movs	r5, #0
-	ldr	r0, .L384
+	ldr	r0, .L386
 	bl	printf
-.L380:
+.L382:
 	adds	r4, r4, #1
 	add	r6, r6, r8
-	b	.L375
-.L377:
-	cmp	r8, #2
-	bne	.L379
-	ldrsh	r1, [r7, r4, lsl #1]
-	b	.L383
+	b	.L377
 .L379:
+	cmp	r8, #2
+	bne	.L381
+	ldrh	r1, [r7, r4, lsl #1]
+	b	.L385
+.L381:
 	ldrb	r1, [r7, r4]	@ zero_extendqisi2
-	ldr	r0, .L384+12
-	b	.L382
-.L385:
+	ldr	r0, .L386+12
+	b	.L384
+.L387:
 	.align	2
-.L384:
+.L386:
 	.word	.LC78
 	.word	.LC75
 	.word	.LC76
 	.word	.LC77
 	.size	rknand_print_hex, .-rknand_print_hex
-	.section	.text.FlashReadPages,"ax",%progbits
+	.section	.text.FlashEraseBlocks,"ax",%progbits
 	.align	1
-	.global	FlashReadPages
+	.global	FlashEraseBlocks
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashReadPages, %function
-FlashReadPages:
+	.type	FlashEraseBlocks, %function
+FlashEraseBlocks:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r8, r1
-	ldr	r3, .L404
 	mov	r4, r0
-	movs	r5, #0
-	ldr	fp, .L404+12
-	ldrh	r2, [r3, #12]
-	mov	r10, r3
-	str	r2, [sp, #4]
-.L387:
-	cmp	r5, r8
-	bne	.L394
+	ldr	r6, .L404
+	add	r8, r0, #4
+	movs	r7, #0
+	ldr	fp, .L404+20
+	ldrh	r10, [r6, #12]
+	str	r2, [sp]
+	lsl	r3, r10, #3
+	str	r3, [sp, #4]
+.L389:
+	ldr	r3, [sp]
+	cmp	r7, r3
+	beq	.L403
+	add	r2, sp, #8
+	add	r1, sp, #12
+	ldr	r0, [r8]
+	bl	l2p_addr_tran.isra.0
+	ldr	r5, [sp, #8]
+	cbnz	r5, .L390
+	ldr	r2, [sp, #12]
+	ldr	r3, [sp, #4]
+	cmp	r3, r2
+	bls	.L390
+	ldr	r6, .L404+4
+	ldr	r7, .L404+8
+.L391:
+	ldr	r3, [sp]
+	adds	r4, r4, #20
+	cmp	r5, r3
+	bne	.L392
+.L403:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L394:
-	ldr	r3, [r4, #8]
-	cbz	r3, .L388
-	ldr	r3, [r4, #12]
-	cbnz	r3, .L389
-.L388:
-	movs	r2, #96
-	ldr	r1, .L404+4
-	mov	r0, fp
+.L392:
+	mov	r3, #-1
+	ldr	r2, [sp, #12]
+	str	r3, [r4, #-20]
+	mov	r1, r6
+	mov	r0, r7
+	adds	r5, r5, #1
 	bl	printf
-.L389:
-	ldr	r6, .L404+8
-	add	r2, sp, #8
-	add	r1, sp, #12
-	ldr	r0, [r4, #4]
-	bl	l2p_addr_tran.isra.0
-	ldr	r3, [r4, #12]
-	ldr	r2, [r4, #8]
+	movs	r3, #16
+	movs	r2, #4
+	ldr	r1, [r4, #-12]
+	ldr	r0, .L404+12
+	bl	rknand_print_hex
+	movs	r3, #4
+	ldr	r1, [r4, #-8]
+	mov	r2, r3
+	ldr	r0, .L404+16
+	bl	rknand_print_hex
+	b	.L391
+.L390:
+	ldr	r2, [fp, #4]
+	uxtb	r0, r5
 	ldr	r1, [sp, #12]
-	ldrb	r0, [sp, #8]	@ zero_extendqisi2
-	ldr	r7, [r6, #12]
-	blx	r7
-	ldrh	r3, [r10, #14]
-	str	r0, [r4]
-	cmp	r3, #4
-	bne	.L391
-	ldr	r0, [sp, #4]
-	ldr	r3, [r4, #12]
-	ldr	r2, [r4, #8]
+	blx	r2
+	cbnz	r0, .L393
+	str	r0, [r8, #-4]
+.L394:
+	ldrh	r2, [r6, #14]
+	cmp	r2, #4
+	bne	.L396
 	ldr	r1, [sp, #12]
-	ldr	r6, [r6, #12]
-	adds	r3, r3, #8
-	add	r2, r2, #2048
-	add	r1, r1, r0
+	ldr	r2, [fp, #4]
 	ldrb	r0, [sp, #8]	@ zero_extendqisi2
-	blx	r6
-	adds	r0, r0, #1
-	beq	.L392
-	ldr	r3, [r4, #12]
-	ldr	r2, [r3, #12]
-	adds	r2, r2, #1
-	bne	.L391
-	ldr	r2, [r3, #8]
-	adds	r2, r2, #1
-	bne	.L391
-	ldr	r3, [r3]
-	adds	r3, r3, #1
-	beq	.L391
-.L392:
-	mov	r3, #-1
-	str	r3, [r4]
-.L391:
-	adds	r5, r5, #1
-	adds	r4, r4, #20
-	b	.L387
+	add	r1, r1, r10
+	blx	r2
+	cbz	r0, .L396
+	mov	r2, #-1
+	str	r2, [r8, #-4]
+.L396:
+	adds	r7, r7, #1
+	add	r8, r8, #20
+	b	.L389
+.L393:
+	mov	r2, #-1
+	str	r2, [r8, #-4]
+	b	.L394
 .L405:
 	.align	2
 .L404:
 	.word	.LANCHOR0
 	.word	.LANCHOR104
+	.word	.LC79
+	.word	.LC80
+	.word	.LC81
 	.word	.LANCHOR105
-	.word	.LC1
-	.size	FlashReadPages, .-FlashReadPages
-	.section	.text.FtlLoadFactoryBbt,"ax",%progbits
+	.size	FlashEraseBlocks, .-FlashEraseBlocks
+	.section	.text.FtlFreeSysBlkQueueIn,"ax",%progbits
 	.align	1
-	.global	FtlLoadFactoryBbt
+	.global	FtlFreeSysBlkQueueIn
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlLoadFactoryBbt, %function
-FtlLoadFactoryBbt:
+	.type	FtlFreeSysBlkQueueIn, %function
+FtlFreeSysBlkQueueIn:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L416
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r6, #0
-	ldr	r5, .L416+4
-	ldr	r3, [r3]
-	ldr	r7, .L416+8
-	ldr	r10, .L416+20
-	str	r3, [r5, #8]
-	ldr	r3, .L416+12
-	ldr	r8, [r3]
-	str	r8, [r5, #12]
-.L407:
-	ldr	r3, .L416+16
-	ldrh	r3, [r3]
-	cmp	r6, r3
-	bcc	.L412
-	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L412:
-	ldrh	r4, [r10]
-	movw	r3, #65535
-	ldr	fp, .L416+4
-	strh	r3, [r7, #2]!	@ movhi
-	subs	r4, r4, #1
-	uxth	r4, r4
-.L408:
-	ldrh	r3, [r10]
-	sub	r2, r3, #15
-	cmp	r2, r4
-	bgt	.L410
-	mla	r3, r6, r3, r4
+	subs	r3, r0, #1
+	movw	r2, #65533
+	uxth	r3, r3
+	push	{r4, r5, r6, lr}
+	mov	r5, r0
+	cmp	r3, r2
+	bhi	.L406
+	ldr	r4, .L415
+	ldrh	r3, [r4, #6]
+	cmp	r3, #1024
+	beq	.L406
+	cbz	r1, .L408
+	bl	P2V_block_in_plane
+	ldr	r3, .L415+4
+	mov	r6, r0
 	movs	r2, #1
 	mov	r1, r2
-	mov	r0, fp
-	lsls	r3, r3, #10
-	str	r3, [r5, #4]
-	bl	FlashReadPages
-	ldr	r3, [r5]
+	ldr	r0, [r3]
+	lsls	r3, r5, #10
+	str	r3, [r0, #4]
+	bl	FlashEraseBlocks
+	ldr	r3, .L415+8
+	ldr	r2, [r3]
+	ldrh	r3, [r2, r6, lsl #1]
 	adds	r3, r3, #1
-	beq	.L409
-	ldrh	r2, [r8]
-	movw	r3, #61664
-	cmp	r2, r3
-	bne	.L409
-	strh	r4, [r7]	@ movhi
-.L410:
-	adds	r6, r6, #1
-	b	.L407
-.L409:
-	subs	r4, r4, #1
-	uxth	r4, r4
-	b	.L408
-.L417:
-	.align	2
-.L416:
-	.word	.LANCHOR107
-	.word	.LANCHOR106
-	.word	.LANCHOR37+10
-	.word	.LANCHOR108
-	.word	.LANCHOR10
-	.word	.LANCHOR17
-	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
-	.section	.text.FtlGetLastWrittenPage,"ax",%progbits
+	strh	r3, [r2, r6, lsl #1]	@ movhi
+	ldr	r2, .L415+12
+	ldr	r3, [r2]
+	adds	r3, r3, #1
+	str	r3, [r2]
+.L408:
+	ldrh	r3, [r4, #6]
+	adds	r3, r3, #1
+	strh	r3, [r4, #6]	@ movhi
+	ldrh	r3, [r4, #4]
+	adds	r2, r3, #4
+	adds	r3, r3, #1
+	ubfx	r3, r3, #0, #10
+	strh	r5, [r4, r2, lsl #1]	@ movhi
+	strh	r3, [r4, #4]	@ movhi
+.L406:
+	pop	{r4, r5, r6, pc}
+.L416:
+	.align	2
+.L415:
+	.word	.LANCHOR38
+	.word	.LANCHOR106
+	.word	.LANCHOR43
+	.word	.LANCHOR75
+	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
+	.section	.text.FtlFreeSysBlkQueueOut,"ax",%progbits
 	.align	1
-	.global	FtlGetLastWrittenPage
+	.global	FtlFreeSysBlkQueueOut
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlGetLastWrittenPage, %function
-FtlGetLastWrittenPage:
-	@ args = 0, pretend = 0, frame = 88
+	.type	FtlFreeSysBlkQueueOut, %function
+FtlFreeSysBlkQueueOut:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	cmp	r1, #1
-	push	{r4, r5, r6, r7, r8, lr}
-	it	eq
-	ldreq	r3, .L427
-	sub	sp, sp, #88
-	lsl	r7, r0, #10
-	mov	r2, r1
-	it	ne
-	ldrne	r3, .L427+4
-	mov	r6, r1
-	add	r0, sp, #4
-	movs	r1, #1
-	ldrh	r5, [r3]
-	ldr	r3, .L427+8
-	subs	r5, r5, #1
-	sxth	r5, r5
-	str	r3, [sp, #12]
-	add	r3, sp, #24
-	str	r3, [sp, #16]
-	orr	r3, r5, r7
-	str	r3, [sp, #8]
-	bl	FlashReadPages
-	ldr	r3, [sp, #24]
+	push	{r3, r4, r5, lr}
+	ldr	r4, .L422
+	ldrh	r2, [r4, #6]
+	cbz	r2, .L421
+	ldrh	r3, [r4, #2]
+	subs	r2, r2, #1
+	strh	r2, [r4, #6]	@ movhi
+	movs	r2, #1
+	adds	r1, r3, #4
 	adds	r3, r3, #1
-	bne	.L421
-	mov	r8, #0
-.L422:
-	cmp	r8, r5
-	ble	.L425
+	ubfx	r3, r3, #0, #10
+	ldrh	r5, [r4, r1, lsl #1]
+	strh	r3, [r4, #2]	@ movhi
+	mov	r1, r2
+	ldr	r3, .L422+4
+	ldr	r0, [r3]
+	lsls	r3, r5, #10
+	str	r3, [r0, #4]
+	bl	FlashEraseBlocks
+	ldr	r2, .L422+8
+	ldr	r3, [r2]
+	adds	r3, r3, #1
+	str	r3, [r2]
+.L418:
+	subs	r3, r5, #1
+	movw	r2, #65533
+	uxth	r3, r3
+	cmp	r3, r2
+	bls	.L419
+	ldrh	r2, [r4, #6]
+	mov	r1, r5
+	ldr	r0, .L422+12
+	bl	printf
+.L420:
+	b	.L420
 .L421:
+	movw	r5, #65535
+	b	.L418
+.L419:
 	mov	r0, r5
-	add	sp, sp, #88
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, pc}
-.L425:
-	add	r3, r8, r5
-	mov	r2, r6
-	add	r3, r3, r3, lsr #31
-	movs	r1, #1
-	add	r0, sp, #4
-	asrs	r4, r3, #1
-	sxth	r3, r4
-	orrs	r3, r3, r7
-	str	r3, [sp, #8]
-	bl	FlashReadPages
-	ldr	r3, [sp, #24]
-	adds	r3, r3, #1
-	bne	.L423
-	ldr	r3, [sp, #28]
-	adds	r3, r3, #1
-	bne	.L423
-	subs	r4, r4, #1
-	sxth	r5, r4
-	b	.L422
+	pop	{r3, r4, r5, pc}
 .L423:
-	adds	r4, r4, #1
-	sxth	r8, r4
-	b	.L422
-.L428:
 	.align	2
-.L427:
-	.word	.LANCHOR20
-	.word	.LANCHOR19
-	.word	ftl_temp_buf
-	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
-	.section	.text.FlashProgPages,"ax",%progbits
+.L422:
+	.word	.LANCHOR38
+	.word	.LANCHOR106
+	.word	.LANCHOR75
+	.word	.LC82
+	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
+	.section	.text.ftl_map_blk_alloc_new_blk,"ax",%progbits
 	.align	1
-	.global	FlashProgPages
+	.global	ftl_map_blk_alloc_new_blk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashProgPages, %function
-FlashProgPages:
-	@ args = 0, pretend = 0, frame = 40
+	.type	ftl_map_blk_alloc_new_blk, %function
+ftl_map_blk_alloc_new_blk:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #40
-	str	r3, [sp]
-	mov	r10, r1
-	mov	r7, r2
+	ldrh	r1, [r0, #10]
+	ldr	r2, [r0, #12]
+	push	{r3, r4, r5, r6, r7, lr}
 	mov	r4, r0
-	ldr	r3, .L459
-	mov	r5, r0
-	movs	r6, #0
-	ldrh	r8, [r3, #12]
-	str	r3, [sp, #4]
-.L430:
-	cmp	r6, r10
-	bne	.L438
-	ldr	r3, [sp]
-	cmp	r3, #0
-	bne	.L445
-.L458:
-	movs	r0, #0
-	add	sp, sp, #40
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L438:
-	ldr	r3, [r5, #8]
-	cbz	r3, .L431
-	ldr	r3, [r5, #12]
-	cbnz	r3, .L432
-.L431:
-	movs	r2, #126
-	ldr	r1, .L459+4
-	ldr	r0, .L459+8
-	bl	printf
-.L432:
-	add	r2, sp, #12
-	add	r1, sp, #16
-	ldr	r0, [r5, #4]
-	bl	l2p_addr_tran.isra.0
-	ldr	r3, .L459+12
-	ldr	r2, [r5, #8]
-	ldr	r1, [sp, #16]
-	ldr	fp, [r3, #8]
-	ldrb	r0, [sp, #12]	@ zero_extendqisi2
-	ldr	r3, [r5, #12]
-	blx	fp
-	cbnz	r0, .L433
-	str	r0, [r5]
-.L434:
-	ldr	r3, [sp, #4]
-	ldrh	r3, [r3, #14]
-	cmp	r3, #4
-	bne	.L436
-	ldr	r1, .L459+12
-	ldr	r3, [r5, #12]
-	ldr	r2, [r5, #8]
-	ldr	fp, [r1, #8]
-	ldr	r1, [sp, #16]
-	adds	r3, r3, #8
-	add	r2, r2, #2048
-	ldrb	r0, [sp, #12]	@ zero_extendqisi2
-	add	r1, r1, r8
-	blx	fp
-	cbz	r0, .L436
-	mov	r3, #-1
-	str	r3, [r5]
-.L436:
-	adds	r6, r6, #1
-	adds	r5, r5, #20
-	b	.L430
-.L433:
-	mov	r3, #-1
-	str	r3, [r5]
-	b	.L434
-.L443:
 	movs	r3, #0
-	mov	r2, r7
-	str	r3, [r8]
-	movs	r1, #1
-	str	r3, [r10]
-	add	r0, sp, #20
-	ldr	r3, [r4, #4]
-	str	r8, [sp, #28]
-	str	r10, [sp, #32]
-	str	r3, [sp, #24]
-	bl	FlashReadPages
-	ldr	fp, [sp, #20]
-	cmp	fp, #-1
-	bne	.L440
-	ldr	r1, [r4, #4]
-	ldr	r0, .L459+16
-	bl	printf
-	str	fp, [r4]
-.L440:
-	ldr	r3, [r4, #12]
-	cbz	r3, .L441
-	ldr	r2, [r3]
-	ldr	r3, [r10]
-	cmp	r2, r3
-	beq	.L441
-	ldr	r1, [r4, #4]
-	ldr	r0, .L459+20
+.L425:
+	uxth	r5, r3
+	cmp	r5, r1
+	bcs	.L428
+	mov	r7, r2
+	adds	r3, r3, #1
+	ldrh	r6, [r7]
+	adds	r2, r2, #2
+	cmp	r6, #0
+	bne	.L425
+	bl	FtlFreeSysBlkQueueOut
+	subs	r3, r0, #1
+	movw	r2, #65533
+	uxth	r3, r3
+	mov	r1, r0
+	strh	r0, [r7]	@ movhi
+	cmp	r3, r2
+	bls	.L426
+	ldr	r3, .L432
+	ldr	r0, .L432+4
+	ldrh	r2, [r3, #6]
 	bl	printf
-	mov	r3, #-1
-	str	r3, [r4]
-.L441:
-	ldr	r3, [r4, #8]
-	cbz	r3, .L442
-	ldr	r2, [r3]
-	ldr	r3, [r8]
-	cmp	r2, r3
-	beq	.L442
-	ldr	r1, [r4, #4]
-	ldr	r0, .L459+24
+.L427:
+	b	.L427
+.L426:
+	ldr	r3, [r4, #28]
+	strh	r6, [r4, #2]	@ movhi
+	strh	r5, [r4]	@ movhi
+	adds	r3, r3, #1
+	str	r3, [r4, #28]
+	ldrh	r3, [r4, #8]
+	adds	r3, r3, #1
+	strh	r3, [r4, #8]	@ movhi
+.L428:
+	ldrh	r3, [r4, #10]
+	cmp	r3, r5
+	bhi	.L430
+	movw	r2, #578
+	ldr	r1, .L432+8
+	ldr	r0, .L432+12
 	bl	printf
-	mov	r3, #-1
-	str	r3, [r4]
-.L442:
-	adds	r5, r5, #1
-	adds	r4, r4, #20
-.L439:
-	cmp	r6, r5
-	bne	.L443
-	b	.L458
-.L445:
-	movs	r5, #0
-	ldr	r8, .L459+28
-	ldr	r10, .L459+32
-	b	.L439
-.L460:
+.L430:
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, pc}
+.L433:
 	.align	2
-.L459:
-	.word	.LANCHOR0
-	.word	.LANCHOR109
+.L432:
+	.word	.LANCHOR38
+	.word	.LC83
+	.word	.LANCHOR107
 	.word	.LC1
-	.word	.LANCHOR105
-	.word	.LC79
-	.word	.LC80
-	.word	.LC81
-	.word	check_buf
-	.word	.LANCHOR110
-	.size	FlashProgPages, .-FlashProgPages
-	.section	.text.FlashEraseBlocks,"ax",%progbits
+	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
+	.section	.text.ftl_memset,"ax",%progbits
 	.align	1
-	.global	FlashEraseBlocks
+	.global	ftl_memset
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashEraseBlocks, %function
-FlashEraseBlocks:
-	@ args = 0, pretend = 0, frame = 8
+	.type	ftl_memset, %function
+ftl_memset:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
-	mov	r7, r2
-	ldr	r5, .L472
-	adds	r4, r0, #4
-	movs	r6, #0
-	ldr	r10, .L472+4
-	ldrh	r8, [r5, #12]
-.L462:
-	cmp	r6, r7
-	bne	.L468
-	movs	r0, #0
-	add	sp, sp, #12
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L468:
-	add	r1, sp, #4
-	mov	r2, sp
-	ldr	r0, [r4]
-	bl	l2p_addr_tran.isra.0
-	ldr	r3, [r10, #4]
-	ldr	r1, [sp, #4]
-	ldrb	r0, [sp]	@ zero_extendqisi2
-	blx	r3
-	cbnz	r0, .L463
-	str	r0, [r4, #-4]
-.L464:
-	ldrh	r3, [r5, #14]
-	cmp	r3, #4
-	bne	.L466
-	ldr	r1, [sp, #4]
-	ldr	r3, [r10, #4]
-	ldrb	r0, [sp]	@ zero_extendqisi2
-	add	r1, r1, r8
-	blx	r3
-	cbz	r0, .L466
-	mov	r3, #-1
-	str	r3, [r4, #-4]
-.L466:
-	adds	r6, r6, #1
-	adds	r4, r4, #20
-	b	.L462
-.L463:
-	mov	r3, #-1
-	str	r3, [r4, #-4]
-	b	.L464
-.L473:
-	.align	2
-.L472:
-	.word	.LANCHOR0
-	.word	.LANCHOR105
-	.size	FlashEraseBlocks, .-FlashEraseBlocks
-	.section	.text.FtlFreeSysBlkQueueIn,"ax",%progbits
-	.align	1
-	.global	FtlFreeSysBlkQueueIn
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlFreeSysBlkQueueIn, %function
-FtlFreeSysBlkQueueIn:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	subs	r3, r0, #1
-	movw	r2, #65533
-	uxth	r3, r3
-	push	{r4, r5, r6, lr}
-	mov	r5, r0
-	cmp	r3, r2
-	bhi	.L474
-	ldr	r4, .L483
-	ldrh	r3, [r4, #6]
-	cmp	r3, #1024
-	beq	.L474
-	cbz	r1, .L476
-	bl	P2V_block_in_plane
-	ldr	r3, .L483+4
-	mov	r6, r0
-	movs	r2, #1
-	mov	r1, r2
-	ldr	r0, [r3]
-	lsls	r3, r5, #10
-	str	r3, [r0, #4]
-	bl	FlashEraseBlocks
-	ldr	r3, .L483+8
-	ldr	r2, [r3]
-	ldrh	r3, [r2, r6, lsl #1]
-	adds	r3, r3, #1
-	strh	r3, [r2, r6, lsl #1]	@ movhi
-	ldr	r2, .L483+12
-	ldr	r3, [r2]
-	adds	r3, r3, #1
-	str	r3, [r2]
-.L476:
-	ldrh	r3, [r4, #6]
-	adds	r3, r3, #1
-	strh	r3, [r4, #6]	@ movhi
-	ldrh	r3, [r4, #4]
-	adds	r2, r3, #4
-	adds	r3, r3, #1
-	ubfx	r3, r3, #0, #10
-	strh	r5, [r4, r2, lsl #1]	@ movhi
-	strh	r3, [r4, #4]	@ movhi
-.L474:
-	pop	{r4, r5, r6, pc}
-.L484:
-	.align	2
-.L483:
-	.word	.LANCHOR38
-	.word	.LANCHOR111
-	.word	.LANCHOR43
-	.word	.LANCHOR75
-	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
-	.section	.text.FtlLowFormatEraseBlock,"ax",%progbits
+	@ link register save eliminated.
+	b	memset
+	.size	ftl_memset, .-ftl_memset
+	.section	.text.FtlMemInit,"ax",%progbits
 	.align	1
-	.global	FtlLowFormatEraseBlock
+	.global	FtlMemInit
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlLowFormatEraseBlock, %function
-FtlLowFormatEraseBlock:
-	@ args = 0, pretend = 0, frame = 32
+	.type	FtlMemInit, %function
+FtlMemInit:
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L528
+	ldr	r3, .L536
+	movs	r1, #0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #32
-	ldr	r6, .L528+4
-	mov	fp, #0
-	mov	r5, fp
-	mov	r4, fp
+	sub	sp, sp, #24
+	ldr	r2, .L536+4
+	mov	r10, #12
+	str	r1, [r3]
+	ldr	r3, .L536+8
+	ldr	r4, .L536+12
+	ldr	r8, .L536+292
+	str	r1, [r3]
+	ldr	r3, .L536+16
+	ldrh	r0, [r4]
+	str	r1, [sp, #12]
+	str	r1, [r3]
+	ldr	r3, .L536+20
+	lsls	r0, r0, #1
+	ldr	r6, .L536+24
+	ldr	fp, .L536+296
+	str	r1, [r3]
+	ldr	r3, .L536+28
+	ldr	r7, .L536+32
+	str	r1, [r3]
+	ldr	r3, .L536+36
+	str	r1, [r3]
+	ldr	r3, .L536+40
+	str	r1, [r3]
+	ldr	r3, .L536+44
+	str	r1, [r3]
+	ldr	r3, .L536+48
+	str	r1, [r3]
+	ldr	r3, .L536+52
+	str	r1, [r3]
+	ldr	r3, .L536+56
+	str	r1, [r3]
+	ldr	r3, .L536+60
+	str	r1, [r3]
+	ldr	r3, .L536+64
+	str	r1, [r3]
+	ldr	r3, .L536+68
+	str	r1, [r3]
+	ldr	r3, .L536+72
+	str	r1, [r3]
+	movw	r3, #65535
+	str	r3, [r2]
+	ldr	r2, .L536+76
+	str	r1, [r2]
+	ldr	r2, .L536+80
+	str	r1, [r2]
+	ldr	r2, .L536+84
+	str	r1, [r2]
+	ldr	r2, .L536+88
+	strh	r3, [r2]	@ movhi
+	ldr	r2, .L536+92
+	strh	r3, [r2]	@ movhi
+	movs	r2, #32
+	ldr	r3, .L536+96
+	strh	r2, [r3]	@ movhi
+	movs	r2, #128
+	ldr	r3, .L536+100
+	strh	r2, [r3]	@ movhi
+	ldr	r3, .L536+104
+	strh	r1, [r3]	@ movhi
+	ldr	r3, .L536+108
+	strh	r1, [r3]	@ movhi
+	ldr	r3, .L536+112
+	strh	r1, [r3]	@ movhi
+	bl	ftl_malloc
+	str	r0, [r8]
+	ldrh	r0, [r4]
+	movs	r4, #20
+	mul	r0, r10, r0
+	bl	ftl_malloc
+	ldr	r3, .L536+116
+	str	r0, [r3]
+	ldrh	r3, [r6]
+	muls	r4, r3, r4
+	lsls	r5, r4, #2
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L536+120
 	str	r0, [r3]
-	mov	r10, #20
-	ldr	r3, .L528+8
-	ldr	r8, [r6]
-	str	r0, [sp, #4]
-	ldrh	r3, [r3]
-	str	r1, [sp]
-	str	r3, [sp, #8]
-	ldr	r3, .L528+12
-	ldr	r3, [r3]
-	str	r3, [sp, #12]
-	ldr	r3, .L528+16
-	ldr	r3, [r3]
-	str	r3, [sp, #16]
-	ldr	r3, .L528+20
-	ldrh	r3, [r3]
-	str	r3, [sp, #20]
-.L486:
-	ldr	r3, [sp, #8]
-	uxth	r2, fp
-	cmp	r3, r2
-	bhi	.L490
-	cmp	r5, #0
-	beq	.L485
-	mov	r0, r8
-	movs	r7, #0
-	mov	r8, #20
-	mov	r2, r5
-	movs	r1, #0
-	bl	FlashEraseBlocks
-.L493:
-	uxth	r3, r7
-	cmp	r5, r3
-	bhi	.L495
-	ldr	r3, [sp]
-	cmp	r3, #0
-	beq	.L511
-	ldr	r3, .L528+24
-	mov	r8, #1
-	ldrh	r10, [r3]
-	lsr	r3, r10, #2
-	str	r3, [sp, #12]
-.L496:
-	movs	r6, #0
-.L505:
-	ldr	r3, .L528+8
-	mov	fp, #0
-	mov	r5, fp
-	ldrh	r3, [r3]
-	str	r3, [sp, #16]
-	ldr	r3, .L528+4
-	ldr	r3, [r3]
-	str	r3, [sp, #8]
-	ldr	r3, .L528+28
-	ldr	r3, [r3]
-	str	r3, [sp, #20]
-	ldr	r3, .L528+12
-	ldr	r3, [r3]
-	str	r3, [sp, #24]
-	ldr	r3, .L528+20
-	ldrh	r3, [r3]
-	str	r3, [sp, #28]
-.L497:
-	ldr	r3, [sp, #16]
-	uxth	r2, fp
-	cmp	r3, r2
-	bhi	.L500
-	cbz	r5, .L485
-	ldr	fp, .L528+4
-	movs	r3, #1
-	mov	r2, r8
-	mov	r1, r5
-	ldr	r0, [sp, #8]
-	movs	r7, #0
-	bl	FlashProgPages
-	movs	r3, #20
-.L502:
-	uxth	r2, r7
-	cmp	r5, r2
-	bhi	.L504
-	ldr	r3, [sp, #12]
-	add	r6, r6, r3
-	uxth	r6, r6
-	cmp	r10, r6
-	bhi	.L505
-	ldr	r7, .L528+4
-	movs	r6, #0
-	mov	r10, #20
-.L506:
-	uxth	r3, r6
-	cmp	r5, r3
-	bhi	.L508
-	ldr	r3, [sp, #4]
-	cmp	r3, #63
-	bls	.L509
-	ldr	r3, [sp]
-	cbz	r3, .L485
-.L509:
-	ldr	r3, .L528+4
-	mov	r2, r5
-	mov	r1, r8
-	ldr	r0, [r3]
-	bl	FlashEraseBlocks
-.L485:
 	mov	r0, r4
-	add	sp, sp, #32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L490:
-	mul	r2, r10, fp
-	movs	r3, #0
-	ldr	r1, [sp, #4]
-	str	r3, [r8, r2]
-	ldr	r3, .L528+32
-	ldrb	r0, [r3, fp]	@ zero_extendqisi2
-	bl	V2P_block
-	ldr	r3, [sp]
-	mov	r7, r0
-	cbz	r3, .L487
-	bl	IsBlkInVendorPart
-	cbnz	r0, .L488
-.L487:
-	mov	r0, r7
-	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L489
-	mla	r1, r10, r5, r8
-	ldr	r3, [sp, #12]
-	lsls	r7, r7, #10
-	str	r3, [r1, #8]
-	ldr	r3, [sp, #20]
-	str	r7, [r1, #4]
-	mul	r2, r3, r5
-	ldr	r3, [sp, #16]
-	adds	r5, r5, #1
-	uxth	r5, r5
-	bic	r2, r2, #3
-	add	r2, r2, r3
-	str	r2, [r1, #12]
-.L488:
-	add	fp, fp, #1
-	b	.L486
-.L489:
-	adds	r4, r4, #1
-	uxth	r4, r4
-	b	.L488
-.L495:
-	mul	r3, r8, r7
-	ldr	r2, [r6]
-	adds	r1, r2, r3
-	ldr	r3, [r2, r3]
-	adds	r3, r3, #1
-	bne	.L494
-	ldr	r0, [r1, #4]
-	adds	r4, r4, #1
-	uxth	r4, r4
-	ubfx	r0, r0, #10, #16
-	bl	FtlBbmMapBadBlock
-.L494:
-	adds	r7, r7, #1
-	b	.L493
-.L511:
-	movs	r3, #6
-	ldr	r8, [sp]
-	str	r3, [sp, #12]
-	mov	r10, #1
-	b	.L496
-.L500:
-	movs	r3, #20
-	mul	r2, r3, fp
-	ldr	r3, [sp, #8]
-	mov	r1, r3
-	movs	r3, #0
-	str	r3, [r1, r2]
-	ldr	r3, .L528+32
-	ldr	r1, [sp, #4]
-	ldrb	r0, [r3, fp]	@ zero_extendqisi2
-	bl	V2P_block
-	ldr	r3, [sp]
-	mov	r7, r0
-	cbz	r3, .L498
-	bl	IsBlkInVendorPart
-	cbnz	r0, .L499
-.L498:
-	mov	r0, r7
-	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L499
-	ldr	r3, [sp, #8]
-	movs	r2, #20
-	add	r7, r6, r7, lsl #10
-	mla	r1, r2, r5, r3
-	ldr	r3, [sp, #20]
-	str	r3, [r1, #8]
-	ldr	r3, [sp, #28]
-	str	r7, [r1, #4]
-	mul	r2, r3, r5
-	ldr	r3, [sp, #24]
-	adds	r5, r5, #1
-	uxth	r5, r5
-	bic	r2, r2, #3
-	add	r2, r2, r3
-	str	r2, [r1, #12]
-.L499:
-	add	fp, fp, #1
-	b	.L497
-.L504:
-	mul	r2, r3, r7
-	ldr	r1, [fp]
-	adds	r0, r1, r2
-	ldr	r2, [r1, r2]
-	cbz	r2, .L503
-	ldr	r0, [r0, #4]
-	adds	r4, r4, #1
-	str	r3, [sp, #8]
-	uxth	r4, r4
-	ubfx	r0, r0, #10, #16
-	bl	FtlBbmMapBadBlock
-	ldr	r3, [sp, #8]
-.L503:
-	adds	r7, r7, #1
-	b	.L502
-.L508:
-	ldr	r3, [sp]
-	cbz	r3, .L507
-	mul	r3, r10, r6
-	ldr	r2, [r7]
-	adds	r1, r2, r3
-	ldr	r3, [r2, r3]
-	cbnz	r3, .L507
-	ldr	r0, [r1, #4]
-	movs	r1, #1
-	ubfx	r0, r0, #10, #16
-	bl	FtlFreeSysBlkQueueIn
-.L507:
-	adds	r6, r6, #1
-	b	.L506
-.L529:
-	.align	2
-.L528:
-	.word	.LANCHOR112
-	.word	.LANCHOR111
-	.word	.LANCHOR3
-	.word	.LANCHOR113
-	.word	.LANCHOR114
-	.word	.LANCHOR24
-	.word	.LANCHOR20
-	.word	.LANCHOR115
-	.word	.LANCHOR13
-	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
-	.section	.text.FtlFreeSysBlkQueueOut,"ax",%progbits
-	.align	1
-	.global	FtlFreeSysBlkQueueOut
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlFreeSysBlkQueueOut, %function
-FtlFreeSysBlkQueueOut:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	ldr	r4, .L537
-	ldr	r6, .L537+4
-.L531:
-	ldrh	r1, [r4, #6]
-	cbz	r1, .L532
-	ldrh	r3, [r4, #2]
-	subs	r1, r1, #1
-	strh	r1, [r4, #6]	@ movhi
-	adds	r2, r3, #4
-	adds	r3, r3, #1
-	ldrh	r5, [r4, r2, lsl #1]
-	ubfx	r3, r3, #0, #10
-	strh	r3, [r4, #2]	@ movhi
-	mov	r0, r5
-	bl	P2V_block_in_plane
-	mov	r7, r0
-	ldr	r0, [r6]
-	lsls	r3, r5, #10
-	movs	r2, #1
-	mov	r1, r2
-	str	r3, [r0, #4]
-	bl	FlashEraseBlocks
-	ldr	r3, .L537+8
-	ldr	r2, [r3]
-	ldrh	r3, [r2, r7, lsl #1]
-	adds	r3, r3, #1
-	strh	r3, [r2, r7, lsl #1]	@ movhi
-	ldr	r2, .L537+12
-	ldr	r3, [r2]
-	adds	r3, r3, #1
-	str	r3, [r2]
-	subs	r3, r5, #1
-	uxth	r3, r3
-	movw	r2, #65533
-	cmp	r3, r2
-	bhi	.L533
-	mov	r0, r5
-	pop	{r3, r4, r5, r6, r7, pc}
-.L532:
-	ldr	r0, .L537+16
-	bl	printf
-.L535:
-	b	.L535
-.L533:
-	ldrh	r2, [r4, #6]
-	mov	r1, r5
-	ldr	r0, .L537+20
-	bl	printf
-	b	.L531
-.L538:
-	.align	2
-.L537:
-	.word	.LANCHOR38
-	.word	.LANCHOR111
-	.word	.LANCHOR43
-	.word	.LANCHOR75
-	.word	.LC82
-	.word	.LC83
-	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
-	.section	.text.ftl_map_blk_alloc_new_blk,"ax",%progbits
-	.align	1
-	.global	ftl_map_blk_alloc_new_blk
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_map_blk_alloc_new_blk, %function
-ftl_map_blk_alloc_new_blk:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldrh	r1, [r0, #10]
-	ldr	r2, [r0, #12]
-	push	{r3, r4, r5, r6, r7, lr}
-	mov	r4, r0
-	movs	r3, #0
-.L540:
-	uxth	r5, r3
-	cmp	r5, r1
-	bcs	.L543
-	mov	r7, r2
-	adds	r3, r3, #1
-	ldrh	r6, [r7]
-	adds	r2, r2, #2
-	cmp	r6, #0
-	bne	.L540
-	bl	FtlFreeSysBlkQueueOut
-	subs	r3, r0, #1
-	movw	r2, #65533
-	uxth	r3, r3
-	mov	r1, r0
-	strh	r0, [r7]	@ movhi
-	cmp	r3, r2
-	bls	.L541
-	ldr	r3, .L547
-	ldr	r0, .L547+4
-	ldrh	r2, [r3, #6]
-	bl	printf
-.L542:
-	b	.L542
-.L541:
-	ldr	r3, [r4, #28]
-	strh	r6, [r4, #2]	@ movhi
-	strh	r5, [r4]	@ movhi
-	adds	r3, r3, #1
-	str	r3, [r4, #28]
-	ldrh	r3, [r4, #8]
-	adds	r3, r3, #1
-	strh	r3, [r4, #8]	@ movhi
-.L543:
-	ldrh	r3, [r4, #10]
-	cmp	r3, r5
-	bhi	.L545
-	movw	r2, #581
-	ldr	r1, .L547+8
-	ldr	r0, .L547+12
-	bl	printf
-.L545:
-	movs	r0, #0
-	pop	{r3, r4, r5, r6, r7, pc}
-.L548:
-	.align	2
-.L547:
-	.word	.LANCHOR38
-	.word	.LC84
-	.word	.LANCHOR116
-	.word	.LC1
-	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
-	.section	.text.ftl_memset,"ax",%progbits
-	.align	1
-	.global	ftl_memset
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_memset, %function
-ftl_memset:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	memset
-	.size	ftl_memset, .-ftl_memset
-	.section	.text.FtlMemInit,"ax",%progbits
-	.align	1
-	.global	FtlMemInit
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlMemInit, %function
-FtlMemInit:
-	@ args = 0, pretend = 0, frame = 16
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r1, #0
-	ldr	r3, .L651
-	mov	r8, #12
-	ldr	r2, .L651+4
-	str	r1, [r3]
-	ldr	r3, .L651+8
-	ldr	r4, .L651+12
-	str	r1, [sp, #4]
-	str	r1, [r3]
-	ldr	r3, .L651+16
-	ldrh	r0, [r4]
-	ldr	fp, .L651+288
-	str	r1, [r3]
-	ldr	r3, .L651+20
-	lsls	r0, r0, #1
-	ldr	r10, .L651+292
-	ldr	r5, .L651+24
-	str	r1, [r3]
-	ldr	r3, .L651+28
-	ldr	r7, .L651+32
-	str	r1, [r3]
-	ldr	r3, .L651+36
-	str	r1, [r3]
-	ldr	r3, .L651+40
-	str	r1, [r3]
-	ldr	r3, .L651+44
-	str	r1, [r3]
-	ldr	r3, .L651+48
-	str	r1, [r3]
-	ldr	r3, .L651+52
-	str	r1, [r3]
-	ldr	r3, .L651+56
-	str	r1, [r3]
-	ldr	r3, .L651+60
-	str	r1, [r3]
-	ldr	r3, .L651+64
-	str	r1, [r3]
-	ldr	r3, .L651+68
-	str	r1, [r3]
-	ldr	r3, .L651+72
-	str	r1, [r3]
-	movw	r3, #65535
-	str	r3, [r2]
-	ldr	r2, .L651+76
-	str	r1, [r2]
-	ldr	r2, .L651+80
-	str	r1, [r2]
-	ldr	r2, .L651+84
-	str	r1, [r2]
-	ldr	r2, .L651+88
-	strh	r3, [r2]	@ movhi
-	ldr	r2, .L651+92
-	strh	r3, [r2]	@ movhi
-	movs	r2, #32
-	ldr	r3, .L651+96
-	strh	r2, [r3]	@ movhi
-	movs	r2, #128
-	ldr	r3, .L651+100
-	strh	r2, [r3]	@ movhi
-	ldr	r3, .L651+104
-	strh	r1, [r3]	@ movhi
-	ldr	r3, .L651+108
-	strh	r1, [r3]	@ movhi
-	ldr	r3, .L651+112
-	strh	r1, [r3]	@ movhi
-	bl	ftl_malloc
-	ldr	r3, .L651+116
-	str	r0, [r3]
-	ldrh	r0, [r4]
-	movs	r4, #20
-	mul	r0, r8, r0
 	bl	ftl_malloc
-	ldrh	r2, [fp]
-	ldr	r3, .L651+120
-	muls	r4, r2, r4
+	ldr	r3, .L536+124
 	str	r0, [r3]
-	lsls	r6, r4, #2
-	mov	r0, r6
+	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L651+124
-	str	r0, [r3]
+	str	r0, [fp]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L651+128
+	ldr	r3, .L536+128
+	ldr	r5, .L536+132
 	str	r0, [r3]
-	mov	r0, r6
-	bl	ftl_malloc
-	ldr	r3, .L651+132
-	ldr	r6, .L651+136
-	str	r0, [r3]
-	mov	r0, r4
-	bl	ftl_malloc
-	str	r0, [r10]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L651+140
-	ldrh	r2, [fp]
+	ldr	r3, .L536+136
 	str	r0, [r3]
-	ldr	r3, .L651+144
-	lsls	r2, r2, #1
+	ldrh	r0, [r6]
+	ldr	r3, .L536+140
+	lsls	r0, r0, #1
 	ldrh	r4, [r3]
-	adds	r2, r2, #1
-	str	r2, [r5]
+	adds	r0, r0, #1
+	str	r0, [r5]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L651+148
+	ldr	r3, .L536+144
 	str	r0, [r3]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L651+152
+	ldr	r3, .L536+148
 	str	r0, [r3]
 	mov	r0, r4
 	bl	ftl_malloc
@@ -4521,179 +3971,177 @@ FtlMemInit:
 	ldr	r0, [r5]
 	muls	r0, r4, r0
 	bl	ftl_malloc
-	str	r0, [r6]
+	ldr	r3, .L536+152
+	str	r0, [r3]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r2, .L651+156
-	str	r0, [r2]
+	ldr	r3, .L536+156
+	str	r0, [r3]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r2, .L651+160
-	ldr	r4, .L651+164
-	str	r0, [r2]
-	ldr	r0, [r5]
-	mul	r0, r8, r0
-	bl	ftl_malloc
-	ldr	r2, .L651+168
-	ldrh	r3, [fp]
-	str	r0, [r2]
-	ldrh	r2, [r4]
-	mul	fp, r3, r2
-	mov	r0, fp
-	bl	ftl_malloc
-	ldr	r2, .L651+172
-	str	r0, [r2]
-	lsl	r0, fp, #2
-	bl	ftl_malloc
-	ldr	r3, .L651+176
+	ldr	r3, .L536+160
 	str	r0, [r3]
-	ldrh	r3, [r4]
 	ldr	r0, [r5]
-	ldr	r4, .L651+180
-	ldr	r5, .L651+184
-	muls	r0, r3, r0
-	bl	ftl_malloc
-	ldr	r3, .L651+188
-	str	r0, [r3]
-	ldrh	r0, [r4]
-	lsls	r0, r0, #1
-	uxth	r0, r0
-	strh	r0, [r5]	@ movhi
+	mul	r0, r10, r0
 	bl	ftl_malloc
-	ldr	r3, .L651+192
+	ldr	r3, .L536+164
 	str	r0, [r3]
-	ldrh	r3, [r5]
-	ldr	r0, .L651+196
-	addw	r3, r3, #547
-	lsrs	r3, r3, #9
-	and	r0, r0, r3, lsl #9
-	strh	r3, [r5]	@ movhi
+	mov	r0, r4
 	bl	ftl_malloc
-	ldrh	fp, [r4]
-	ldr	r3, .L651+200
-	str	r0, [r3]
-	lsl	fp, fp, #1
-	ldr	r3, .L651+204
-	adds	r0, r0, #32
+	ldr	r3, .L536+168
 	str	r0, [r3]
-	mov	r0, fp
+	mov	r0, r4
+	ldr	r4, .L536+172
 	bl	ftl_malloc
-	ldr	r3, .L651+208
-	str	r0, [r3]
-	mov	r0, fp
+	str	r0, [r4]
+	ldr	r0, .L536+176
+	ldr	r4, .L536+180
+	ldrh	r0, [r0]
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	str	r0, [r4]
+	ldr	r4, .L536+184
+	ldrh	r2, [r6]
+	ldr	r6, .L536+152
+	ldrh	r0, [r4]
+	muls	r2, r0, r2
+	mov	r0, r2
+	str	r2, [sp, #4]
 	bl	ftl_malloc
-	ldr	fp, .L651+296
-	ldr	r3, .L651+212
+	ldr	r2, [sp, #4]
+	ldr	r3, .L536+188
 	str	r0, [r3]
-	ldr	r3, [fp]
+	lsls	r0, r2, #2
+	bl	ftl_malloc
+	ldr	r2, .L536+192
+	str	r0, [r2]
+	ldrh	r2, [r4]
+	ldr	r0, [r5]
+	ldr	r4, .L536+196
+	ldr	r5, .L536+200
+	muls	r0, r2, r0
+	bl	ftl_malloc
+	ldr	r3, .L536+204
+	str	r0, [r3]
+	ldrh	r0, [r4]
+	lsls	r0, r0, #1
+	uxth	r0, r0
+	strh	r0, [r5]	@ movhi
+	bl	ftl_malloc
+	ldr	r2, .L536+208
+	str	r0, [r2]
+	ldrh	r2, [r5]
+	ldr	r0, .L536+212
+	addw	r2, r2, #547
+	lsrs	r2, r2, #9
+	and	r0, r0, r2, lsl #9
+	strh	r2, [r5]	@ movhi
+	bl	ftl_malloc
+	ldr	r3, .L536+216
+	str	r0, [r3]
+	adds	r0, r0, #32
+	ldr	r3, .L536+220
+	str	r0, [r3]
+	ldrh	r3, [r4]
 	lsls	r5, r3, #1
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r2, .L651+216
+	ldr	r2, .L536+224
 	str	r0, [r2]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L651+220
-	ldr	r5, .L651+224
+	ldr	r3, .L536+228
 	str	r0, [r3]
+	ldr	r3, .L536+232
+	ldr	r2, [r3]
+	str	r3, [sp, #8]
+	lsls	r5, r2, #1
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r2, .L536+236
+	str	r0, [r2]
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r2, .L536+240
+	ldr	r5, .L536+244
+	str	r0, [r2]
 	ldrh	r0, [r4]
 	lsrs	r0, r0, #3
 	adds	r0, r0, #4
 	bl	ftl_malloc
-	ldr	r3, .L651+228
-	str	r0, [r3]
+	ldr	r2, .L536+248
+	str	r0, [r2]
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r2, .L651+232
+	ldr	r2, .L536+252
 	str	r0, [r2]
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r2, .L651+236
+	ldr	r2, .L536+256
 	str	r0, [r2]
 	ldrh	r0, [r5]
-	ldr	r5, .L651+120
+	ldr	r5, .L536+116
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L651+240
-	str	r0, [r3]
-	ldr	r3, .L651+244
-	ldrh	r0, [r3]
-	str	r3, [sp]
+	ldr	r2, .L536+260
+	str	r0, [r2]
+	ldr	r2, .L536+264
+	ldrh	r0, [r2]
+	str	r2, [sp, #4]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, [sp]
-	ldr	r2, .L651+248
-	ldr	r1, [sp, #4]
-	str	r0, [r2]
-	ldrh	r2, [r3]
+	ldr	r2, [sp, #4]
+	ldr	ip, .L536+300
+	ldr	r1, [sp, #12]
+	ldrh	r2, [r2]
+	str	r0, [ip]
 	lsls	r2, r2, #2
 	bl	ftl_memset
-	ldr	r3, .L651+252
-	ldrh	r0, [r3]
+	ldr	r2, .L536+268
+	ldrh	r0, [r2]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L651+256
-	str	r0, [r3]
-	ldr	r0, [fp]
-	ldr	fp, .L651+300
+	ldr	r2, .L536+272
+	ldr	r3, [sp, #8]
+	str	r0, [r2]
+	ldr	r0, [r3]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L651+260
+	ldr	r3, .L536+276
 	str	r0, [r3]
-	ldrh	r0, [fp]
-	mul	r0, r8, r0
-	ldr	r8, .L651+304
+	ldr	r3, .L536+280
+	ldrh	r0, [r3]
+	str	r3, [sp, #4]
+	mul	r0, r10, r0
+	ldr	r10, .L536+304
 	bl	ftl_malloc
-	ldr	r2, .L651+144
-	ldr	r3, .L651+264
-	str	r0, [r3]
+	ldr	r2, .L536+284
+	ldr	r3, [sp, #4]
+	str	r0, [r2]
+	ldr	r2, .L536+140
+	ldrh	r3, [r3]
 	ldrh	r0, [r2]
-	ldrh	r3, [fp]
-	ldr	fp, .L651+132
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L651+268
+	ldr	r3, .L536+288
 	str	r0, [r3]
 	movs	r0, #6
 	ldrh	r3, [r4]
-	ldr	r4, .L651+272
-	muls	r0, r3, r0
-	bl	ftl_malloc
-	ldr	r3, .L651+276
-	str	r0, [r3]
-	ldr	r3, .L651+280
-	ldrh	r0, [r3]
-	ldrh	r3, [r8]
-	adds	r0, r0, #31
-	asrs	r0, r0, #5
-	strh	r0, [r4]	@ movhi
-	muls	r0, r3, r0
-	lsls	r0, r0, #2
-	bl	ftl_malloc
-	ldr	r2, .L651+284
-	str	r5, [sp, #4]
-	ldr	r5, .L651+124
-	mov	r1, r2
-	ldrh	r3, [r8]
-	str	r0, [r1, #28]!
-	ldrh	r0, [r4]
-	ldr	r8, .L651+140
-	ldr	lr, .L651+148
-	b	.L652
-.L653:
+	b	.L537
+.L538:
 	.align	2
-.L651:
+.L536:
 	.word	.LANCHOR70
-	.word	.LANCHOR118
+	.word	.LANCHOR109
 	.word	.LANCHOR71
 	.word	.LANCHOR21
 	.word	.LANCHOR67
 	.word	.LANCHOR64
-	.word	.LANCHOR94
+	.word	.LANCHOR3
 	.word	.LANCHOR63
-	.word	.LANCHOR124
+	.word	.LANCHOR117
 	.word	.LANCHOR65
 	.word	.LANCHOR66
 	.word	.LANCHOR62
@@ -4702,11 +4150,11 @@ FtlMemInit:
 	.word	.LANCHOR75
 	.word	.LANCHOR76
 	.word	.LANCHOR77
-	.word	.LANCHOR117
+	.word	.LANCHOR108
 	.word	.LANCHOR87
-	.word	.LANCHOR119
+	.word	.LANCHOR110
 	.word	.LANCHOR84
-	.word	.LANCHOR112
+	.word	.LANCHOR111
 	.word	.LANCHOR99
 	.word	.LANCHOR100
 	.word	.LANCHOR82
@@ -4714,22 +4162,26 @@ FtlMemInit:
 	.word	.LANCHOR85
 	.word	.LANCHOR101
 	.word	.LANCHOR103
-	.word	.LANCHOR95
 	.word	.LANCHOR98
-	.word	.LANCHOR120
-	.word	.LANCHOR121
-	.word	.LANCHOR122
-	.word	.LANCHOR91
+	.word	.LANCHOR112
+	.word	.LANCHOR113
+	.word	.LANCHOR106
+	.word	.LANCHOR94
 	.word	.LANCHOR93
 	.word	.LANCHOR23
-	.word	.LANCHOR107
-	.word	.LANCHOR123
 	.word	.LANCHOR115
-	.word	.LANCHOR113
-	.word	.LANCHOR24
+	.word	.LANCHOR116
+	.word	.LANCHOR91
+	.word	.LANCHOR118
+	.word	.LANCHOR119
 	.word	.LANCHOR90
-	.word	.LANCHOR108
-	.word	.LANCHOR114
+	.word	.LANCHOR120
+	.word	.LANCHOR121
+	.word	.LANCHOR12
+	.word	.LANCHOR122
+	.word	.LANCHOR24
+	.word	.LANCHOR123
+	.word	.LANCHOR124
 	.word	.LANCHOR6
 	.word	.LANCHOR125
 	.word	.LANCHOR92
@@ -4739,6 +4191,7 @@ FtlMemInit:
 	.word	.LANCHOR43
 	.word	.LANCHOR128
 	.word	.LANCHOR42
+	.word	.LANCHOR30
 	.word	.LANCHOR129
 	.word	.LANCHOR130
 	.word	.LANCHOR27
@@ -4747,1919 +4200,3141 @@ FtlMemInit:
 	.word	.LANCHOR131
 	.word	.LANCHOR132
 	.word	.LANCHOR28
-	.word	.LANCHOR133
 	.word	.LANCHOR32
 	.word	.LANCHOR134
 	.word	.LANCHOR135
+	.word	.LANCHOR33
 	.word	.LANCHOR55
 	.word	.LANCHOR136
-	.word	.LANCHOR137
-	.word	.LANCHOR40
-	.word	.LANCHOR17
-	.word	.LANCHOR37
-	.word	.LANCHOR3
-	.word	.LANCHOR111
-	.word	.LANCHOR30
-	.word	.LANCHOR33
+	.word	.LANCHOR95
+	.word	.LANCHOR114
+	.word	.LANCHOR133
 	.word	.LANCHOR10
-.L652:
-	ldr	ip, .L654+100
+.L537:
+	ldr	r4, .L539
+	muls	r0, r3, r0
+	bl	ftl_malloc
+	ldr	r3, .L539+4
+	str	r0, [r3]
+	ldr	r3, .L539+8
+	ldrh	r0, [r3]
+	ldrh	r3, [r10]
+	adds	r0, r0, #31
+	asrs	r0, r0, #5
+	strh	r0, [r4]	@ movhi
+	muls	r0, r3, r0
 	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r2, .L539+12
 	str	r5, [sp, #8]
-	ldr	r5, .L654
-	str	r3, [sp]
+	ldr	r5, .L539+16
+	mov	r1, r2
+	ldrh	r3, [r10]
+	str	r0, [r1, #28]!
+	ldrh	r0, [r4]
+	str	r5, [sp, #12]
+	ldr	r5, .L539+20
+	ldr	r10, .L539+116
+	lsls	r0, r0, #2
+	ldr	lr, .L539+120
+	ldr	ip, .L539+124
+	str	r5, [sp, #16]
 	mov	r4, r0
+	ldr	r5, .L539+24
+	str	r3, [sp, #4]
 	movs	r3, #1
-	str	r5, [sp, #12]
-.L551:
-	ldr	r5, [sp]
+	str	r5, [sp, #20]
+.L436:
+	ldr	r5, [sp, #4]
 	cmp	r3, r5
-	bcc	.L552
+	bcc	.L437
 	add	r3, r2, r3, lsl #2
-	ldr	r1, .L654+4
+	ldr	r1, .L539+28
 	movs	r0, #0
 	adds	r3, r3, #24
-.L553:
+.L438:
 	cmp	r1, r3
-	bne	.L554
-	ldr	r3, .L654+8
+	bne	.L439
+	ldr	r3, .L539+32
 	ldr	r3, [r3]
-	cbnz	r3, .L555
-.L557:
-	ldr	r1, .L654+12
-	ldr	r0, .L654+16
+	cbnz	r3, .L440
+.L442:
+	ldr	r1, .L539+36
+	ldr	r0, .L539+40
 	bl	printf
 	mov	r0, #-1
-.L550:
-	add	sp, sp, #16
+.L435:
+	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L552:
+.L437:
 	ldr	r5, [r2, #28]
 	adds	r3, r3, #1
 	add	r5, r5, r4
 	add	r4, r4, r0
 	str	r5, [r1, #4]!
-	b	.L551
-.L554:
+	b	.L436
+.L439:
 	str	r0, [r3, #4]!
-	b	.L553
-.L555:
-	ldr	r3, .L654+20
+	b	.L438
+.L440:
+	ldr	r3, .L539+44
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L557
-	ldr	r3, .L654+24
+	beq	.L442
+	ldr	r3, .L539+48
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L557
-	ldr	r3, .L654+28
+	beq	.L442
+	ldr	r3, .L539+52
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L557
-	ldr	r3, .L654+32
+	beq	.L442
+	ldr	r3, .L539+56
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L557
-	ldr	r3, .L654+36
+	beq	.L442
+	ldr	r3, .L539+60
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L557
-	ldr	r3, .L654+40
+	beq	.L442
+	ldr	r3, .L539+4
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L557
+	beq	.L442
 	ldr	r3, [r2, #28]
 	cmp	r3, #0
-	beq	.L557
-	ldr	r3, .L654+44
+	beq	.L442
+	ldr	r3, .L539+64
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L557
-	ldr	r3, .L654+48
-	ldr	r3, [r3]
+	beq	.L442
+	ldr	r3, [r8]
 	cmp	r3, #0
-	beq	.L557
-	ldr	r3, [sp, #4]
+	beq	.L442
+	ldr	r3, [sp, #8]
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L557
-	ldr	r3, [sp, #8]
+	beq	.L442
+	ldr	r3, [sp, #12]
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L557
+	beq	.L442
 	ldr	r3, [fp]
 	cmp	r3, #0
-	beq	.L557
+	beq	.L442
 	ldr	r3, [r10]
 	cmp	r3, #0
-	beq	.L557
-	ldr	r3, [r8]
+	beq	.L442
+	ldr	r3, [sp, #20]
+	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L557
-	ldr	r3, [sp, #12]
+	beq	.L442
+	ldr	r3, [sp, #16]
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L557
+	beq	.L442
 	ldr	r3, [lr]
 	cmp	r3, #0
-	beq	.L557
+	beq	.L442
 	ldr	r3, [ip]
 	cmp	r3, #0
-	beq	.L557
+	beq	.L442
 	ldr	r3, [r7]
 	cmp	r3, #0
-	beq	.L557
+	beq	.L442
 	ldr	r3, [r6]
 	cmp	r3, #0
-	beq	.L557
-	ldr	r3, .L654+52
+	beq	.L442
+	ldr	r3, .L539+68
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L557
-	ldr	r3, .L654+56
+	beq	.L442
+	ldr	r3, .L539+72
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L557
-	ldr	r3, .L654+60
+	beq	.L442
+	ldr	r3, .L539+76
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L557
-	ldr	r3, .L654+64
+	beq	.L442
+	ldr	r3, .L539+80
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L557
-	ldr	r3, .L654+68
+	beq	.L442
+	ldr	r3, .L539+84
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L557
-	ldr	r3, .L654+72
+	beq	.L442
+	ldr	r3, .L539+88
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L557
-	ldr	r3, .L654+76
+	beq	.L442
+	ldr	r3, .L539+92
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L557
-	ldr	r3, .L654+80
+	beq	.L442
+	ldr	r3, .L539+96
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L557
-	ldr	r3, .L654+84
+	beq	.L442
+	ldr	r3, .L539+100
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L557
-	ldr	r3, .L654+88
+	beq	.L442
+	ldr	r3, .L539+104
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L557
-	ldr	r3, .L654+92
+	beq	.L442
+	ldr	r3, .L539+108
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L557
-	ldr	r3, .L654+96
+	beq	.L442
+	ldr	r3, .L539+112
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L557
+	beq	.L442
+	movs	r0, #0
+	b	.L435
+.L540:
+	.align	2
+.L539:
+	.word	.LANCHOR137
+	.word	.LANCHOR40
+	.word	.LANCHOR17
+	.word	.LANCHOR37
+	.word	.LANCHOR112
+	.word	.LANCHOR113
+	.word	.LANCHOR93
+	.word	.LANCHOR37+56
+	.word	.LANCHOR129
+	.word	.LANCHOR138
+	.word	.LC84
+	.word	.LANCHOR130
+	.word	.LANCHOR134
+	.word	.LANCHOR135
+	.word	.LANCHOR55
+	.word	.LANCHOR136
+	.word	.LANCHOR42
+	.word	.LANCHOR118
+	.word	.LANCHOR119
+	.word	.LANCHOR90
+	.word	.LANCHOR123
+	.word	.LANCHOR124
+	.word	.LANCHOR92
+	.word	.LANCHOR43
+	.word	.LANCHOR126
+	.word	.LANCHOR36
+	.word	.LANCHOR131
+	.word	.LANCHOR132
+	.word	.LANCHOR133
+	.word	.LANCHOR106
+	.word	.LANCHOR115
+	.word	.LANCHOR116
+	.size	FtlMemInit, .-FtlMemInit
+	.section	.text.FtlBbt2Bitmap,"ax",%progbits
+	.align	1
+	.global	FtlBbt2Bitmap
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlBbt2Bitmap, %function
+FtlBbt2Bitmap:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L547
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r5, r0
+	ldr	r7, .L547+4
+	mov	r6, r1
+	subs	r4, r5, #2
+	addw	r5, r5, #1022
+	ldrh	r2, [r3]
+	movs	r1, #0
+	ldr	r8, .L547+12
+	mov	r0, r6
+	lsls	r2, r2, #2
+	bl	ftl_memset
+.L544:
+	ldrh	r3, [r4, #2]
+	movw	r2, #65535
+	cmp	r3, r2
+	beq	.L541
+	ldrh	r2, [r7]
+	cmp	r2, r3
+	bhi	.L543
+	movs	r2, #74
+	mov	r1, r8
+	ldr	r0, .L547+8
+	bl	printf
+.L543:
+	ldrh	r3, [r4, #2]!
+	movs	r2, #1
+	cmp	r5, r4
+	lsr	r1, r3, #5
+	and	r3, r3, #31
+	lsl	r3, r2, r3
+	ldr	r2, [r6, r1, lsl #2]
+	orr	r2, r2, r3
+	str	r2, [r6, r1, lsl #2]
+	bne	.L544
+.L541:
+	pop	{r4, r5, r6, r7, r8, pc}
+.L548:
+	.align	2
+.L547:
+	.word	.LANCHOR137
+	.word	.LANCHOR17
+	.word	.LC1
+	.word	.LANCHOR139
+	.size	FtlBbt2Bitmap, .-FtlBbt2Bitmap
+	.section	.text.FtlBbtMemInit,"ax",%progbits
+	.align	1
+	.global	FtlBbtMemInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlBbtMemInit, %function
+FtlBbtMemInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r0, .L550
+	movw	r3, #65535
+	movs	r2, #16
+	movs	r1, #255
+	strh	r3, [r0]	@ movhi
+	movs	r3, #0
+	strh	r3, [r0, #6]	@ movhi
+	adds	r0, r0, #12
+	b	ftl_memset
+.L551:
+	.align	2
+.L550:
+	.word	.LANCHOR37
+	.size	FtlBbtMemInit, .-FtlBbtMemInit
+	.section	.text.FtlFreeSysBlkQueueInit,"ax",%progbits
+	.align	1
+	.global	FtlFreeSysBlkQueueInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlFreeSysBlkQueueInit, %function
+FtlFreeSysBlkQueueInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L553
+	mov	r2, #2048
+	push	{r4, lr}
+	movs	r4, #0
+	mov	r1, r4
+	strh	r4, [r3, #2]	@ movhi
+	strh	r4, [r3, #4]	@ movhi
+	strh	r4, [r3, #6]	@ movhi
+	strh	r0, [r3], #8	@ movhi
+	mov	r0, r3
+	bl	ftl_memset
+	mov	r0, r4
+	pop	{r4, pc}
+.L554:
+	.align	2
+.L553:
+	.word	.LANCHOR38
+	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
+	.section	.text.ftl_free_no_use_map_blk,"ax",%progbits
+	.align	1
+	.global	ftl_free_no_use_map_blk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_free_no_use_map_blk, %function
+ftl_free_no_use_map_blk:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldrh	r2, [r0, #10]
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r0
+	ldr	r5, [r0, #20]
+	movs	r1, #0
+	ldr	r7, [r0, #12]
+	lsls	r2, r2, #1
+	ldr	r6, [r0, #24]
+	mov	r0, r5
+	bl	ftl_memset
+	movs	r3, #0
+.L556:
+	ldrh	r1, [r4, #6]
+	uxth	r2, r3
+	cmp	r1, r2
+	bhi	.L560
+	ldr	r3, .L575
+	movs	r6, #0
+	mov	r10, r6
+	ldrh	r2, [r3]
+	ldrh	r3, [r4]
+	strh	r2, [r5, r3, lsl #1]	@ movhi
+	mov	r2, r6
+	ldrh	fp, [r5]
+.L561:
+	ldrh	r3, [r4, #10]
+	uxth	ip, r6
+	cmp	r3, ip
+	bhi	.L565
+	mov	r0, r10
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L560:
+	uxth	r2, r3
+	ldr	r1, [r6, r2, lsl #2]
+	movs	r2, #0
+	ubfx	r1, r1, #10, #16
+.L557:
+	ldrh	ip, [r4, #10]
+	uxth	r0, r2
+	cmp	ip, r0
+	bhi	.L559
+	adds	r3, r3, #1
+	b	.L556
+.L559:
+	uxth	r0, r2
+	ldrh	ip, [r7, r0, lsl #1]
+	cmp	ip, r1
+	bne	.L558
+	cbz	r1, .L558
+	ldrh	ip, [r5, r0, lsl #1]
+	add	ip, ip, #1
+	strh	ip, [r5, r0, lsl #1]	@ movhi
+.L558:
+	adds	r2, r2, #1
+	b	.L557
+.L565:
+	uxth	r1, r6
+	ldrh	r3, [r5, r1, lsl #1]
+	lsl	r8, r1, #1
+	cmp	fp, r3
+	bls	.L562
+	ldrh	r0, [r7, r1, lsl #1]
+	add	r8, r8, r7
+	cbnz	r0, .L563
+.L564:
+	adds	r6, r6, #1
+	b	.L561
+.L562:
+	cmp	r3, #0
+	bne	.L564
+	ldrh	r0, [r7, r1, lsl #1]
+	add	r8, r8, r7
+	cmp	r0, #0
+	beq	.L564
+.L566:
+	movs	r1, #1
+	str	r2, [sp, #4]
+	bl	FtlFreeSysBlkQueueIn
+	ldr	r2, [sp, #4]
+	strh	r2, [r8]	@ movhi
+	ldrh	r3, [r4, #8]
+	subs	r3, r3, #1
+	strh	r3, [r4, #8]	@ movhi
+	b	.L564
+.L563:
+	mov	r10, ip
+	mov	fp, r3
+	cmp	r3, #0
+	beq	.L566
+	b	.L564
+.L576:
+	.align	2
+.L575:
+	.word	.LANCHOR20
+	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
+	.section	.text.FtlL2PDataInit,"ax",%progbits
+	.align	1
+	.global	FtlL2PDataInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlL2PDataInit, %function
+FtlL2PDataInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, lr}
+	movs	r1, #0
+	ldr	r5, .L580
+	ldr	r4, .L580+4
+	ldr	r2, [r5]
+	ldr	r7, .L580+8
+	ldr	r6, .L580+12
+	ldr	r0, [r4]
+	lsls	r2, r2, #1
+	ldr	r8, .L580+44
+	bl	ftl_memset
+	ldrh	r3, [r7]
+	movs	r1, #255
+	ldrh	r2, [r6]
+	ldr	r0, [r8]
+	muls	r2, r3, r2
+	bl	ftl_memset
+	ldr	r3, .L580+16
+	movw	r0, #65535
+	ldrh	r1, [r6]
+	ldr	ip, [r8]
+	ldr	r2, [r3]
+	movs	r3, #12
+	ldrh	r7, [r7]
+	mla	r3, r1, r3, r3
+	adds	r1, r2, r3
+	movs	r3, #0
+	mov	lr, r3
+.L578:
+	adds	r2, r2, #12
+	adds	r6, r3, r7
+	cmp	r2, r1
+	bne	.L579
+	ldr	r3, .L580+20
+	ldr	r2, [r5]
+	strh	r0, [r3, #2]	@ movhi
+	strh	r2, [r3, #10]	@ movhi
+	movw	r2, #61634
+	strh	r2, [r3, #4]	@ movhi
+	ldr	r2, .L580+24
+	strh	r0, [r3]	@ movhi
+	ldrh	r2, [r2]
+	strh	r2, [r3, #8]	@ movhi
+	ldr	r2, .L580+28
+	ldrh	r2, [r2]
+	strh	r2, [r3, #6]	@ movhi
+	ldr	r2, .L580+32
+	ldr	r2, [r2]
+	str	r2, [r3, #12]
+	ldr	r2, .L580+36
+	ldr	r2, [r2]
+	str	r2, [r3, #16]
+	ldr	r2, [r4]
+	str	r2, [r3, #20]
+	ldr	r2, .L580+40
+	ldr	r2, [r2]
+	str	r2, [r3, #24]
+	pop	{r4, r5, r6, r7, r8, pc}
+.L579:
+	bic	r3, r3, #3
+	str	lr, [r2, #-8]
+	add	r3, r3, ip
+	strh	r0, [r2, #-12]	@ movhi
+	str	r3, [r2, #-4]
+	mov	r3, r6
+	b	.L578
+.L581:
+	.align	2
+.L580:
+	.word	.LANCHOR30
+	.word	.LANCHOR130
+	.word	.LANCHOR23
+	.word	.LANCHOR33
+	.word	.LANCHOR55
+	.word	.LANCHOR140
+	.word	.LANCHOR141
+	.word	.LANCHOR32
+	.word	.LANCHOR129
+	.word	.LANCHOR135
+	.word	.LANCHOR134
+	.word	.LANCHOR136
+	.size	FtlL2PDataInit, .-FtlL2PDataInit
+	.section	.text.FtlVariablesInit,"ax",%progbits
+	.align	1
+	.global	FtlVariablesInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlVariablesInit, %function
+FtlVariablesInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	movw	r2, #65535
+	ldr	r3, .L583
+	movs	r4, #0
+	mov	r1, r4
+	ldr	r5, .L583+4
+	strh	r2, [r3]	@ movhi
+	mov	r2, #-1
+	ldr	r3, .L583+8
+	str	r4, [r3]
+	ldr	r3, .L583+12
+	str	r4, [r3]
+	ldr	r3, .L583+16
+	str	r2, [r3]
+	ldr	r3, .L583+20
+	strh	r4, [r3]	@ movhi
+	ldr	r3, .L583+24
+	ldrh	r2, [r3]
+	ldr	r3, .L583+28
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldrh	r2, [r5]
+	mov	r1, r4
+	ldr	r3, .L583+32
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldrh	r2, [r5]
+	mov	r1, r4
+	ldr	r3, .L583+36
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+	mov	r1, r4
+	movs	r2, #48
+	ldr	r0, .L583+40
+	bl	ftl_memset
+	mov	r2, #512
+	mov	r1, r4
+	ldr	r0, .L583+44
+	bl	ftl_memset
+	bl	FtlGcBufInit
+	bl	FtlL2PDataInit
+	mov	r0, r4
+	pop	{r3, r4, r5, pc}
+.L584:
+	.align	2
+.L583:
+	.word	.LANCHOR142
+	.word	.LANCHOR6
+	.word	.LANCHOR143
+	.word	.LANCHOR144
+	.word	.LANCHOR145
+	.word	.LANCHOR35
+	.word	.LANCHOR27
+	.word	.LANCHOR36
+	.word	.LANCHOR43
+	.word	.LANCHOR126
+	.word	.LANCHOR39
+	.word	.LANCHOR81
+	.size	FtlVariablesInit, .-FtlVariablesInit
+	.section	.text.SupperBlkListInit,"ax",%progbits
+	.align	1
+	.global	SupperBlkListInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	SupperBlkListInit, %function
+SupperBlkListInit:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r2, #6
+	ldr	r3, .L596
+	movs	r1, #0
+	movs	r4, #0
+	ldr	r6, .L596+4
+	mov	r8, r4
+	ldrh	r3, [r3]
+	mov	r5, r4
+	ldr	r0, [r6]
+	mov	r10, r6
+	muls	r2, r3, r2
+	bl	ftl_memset
+	ldr	r3, .L596+8
+	ldr	r2, .L596+12
+	str	r4, [r3]
+	ldr	r3, .L596+16
+	strh	r4, [r2]	@ movhi
+	str	r2, [sp, #4]
+	str	r4, [r3]
+	ldr	r3, .L596+20
+	str	r4, [r3]
+	ldr	r3, .L596+24
+	mov	fp, r3
+	strh	r4, [r3]	@ movhi
+.L586:
+	ldr	r3, .L596+28
+	uxth	r7, r4
+	ldrh	r3, [r3]
+	cmp	r7, r3
+	bcs	.L593
+	ldr	r3, .L596+32
+	ldrh	r2, [r3]
+	ldr	r3, .L596+36
+	ldrh	r3, [r3]
+	str	r3, [sp]
+	movs	r3, #0
+	mov	r6, r3
+	b	.L594
+.L588:
+	str	r2, [sp, #12]
+	mov	r1, r7
+	ldr	r2, .L596+40
+	str	r3, [sp, #8]
+	ldrb	r0, [r2, r3]	@ zero_extendqisi2
+	bl	V2P_block
+	bl	FtlBbmIsBadBlock
+	ldr	r3, [sp, #8]
+	ldr	r2, [sp, #12]
+	cbnz	r0, .L587
+	ldr	r1, [sp]
+	add	r6, r6, r1
+	uxth	r6, r6
+.L587:
+	adds	r3, r3, #1
+.L594:
+	uxth	r1, r3
+	cmp	r2, r1
+	bhi	.L588
+	uxth	r3, r4
+	cbz	r6, .L589
+	mov	r1, r6
+	str	r3, [sp]
+	mov	r0, #32768
+	bl	__aeabi_idiv
+	ldr	r3, [sp]
+	uxth	r6, r0
+.L590:
+	ldr	r1, [r10]
+	movs	r2, #6
+	mla	r2, r2, r3, r1
+	strh	r6, [r2, #4]	@ movhi
+	ldr	r2, .L596+44
+	ldrh	r2, [r2]
+	cmp	r2, r7
+	beq	.L591
+	ldr	r2, .L596+48
+	ldrh	r2, [r2]
+	cmp	r2, r7
+	beq	.L591
+	ldr	r2, .L596+52
+	ldrh	r2, [r2]
+	cmp	r2, r7
+	beq	.L591
+	ldr	r2, .L596+56
+	ldr	r2, [r2]
+	ldrh	r3, [r2, r3, lsl #1]
+	cbnz	r3, .L592
+	add	r8, r8, #1
+	mov	r0, r7
+	uxth	r8, r8
+	bl	INSERT_FREE_LIST
+.L591:
+	adds	r4, r4, #1
+	b	.L586
+.L589:
+	ldr	r2, .L596+56
+	movw	r1, #65535
+	ldr	r2, [r2]
+	strh	r1, [r2, r3, lsl #1]	@ movhi
+	b	.L590
+.L592:
+	adds	r5, r5, #1
+	mov	r0, r7
+	uxth	r5, r5
+	bl	INSERT_DATA_LIST
+	b	.L591
+.L593:
+	ldr	r2, [sp, #4]
+	strh	r8, [fp]	@ movhi
+	strh	r5, [r2]	@ movhi
+	add	r5, r5, r8
+	cmp	r5, r3
+	ble	.L595
+	movw	r2, #2170
+	ldr	r1, .L596+60
+	ldr	r0, .L596+64
+	bl	printf
+.L595:
 	movs	r0, #0
-	b	.L550
-.L655:
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L597:
 	.align	2
-.L654:
-	.word	.LANCHOR121
-	.word	.LANCHOR37+56
-	.word	.LANCHOR129
-	.word	.LANCHOR138
-	.word	.LC85
-	.word	.LANCHOR130
-	.word	.LANCHOR134
-	.word	.LANCHOR135
-	.word	.LANCHOR55
-	.word	.LANCHOR136
+.L596:
+	.word	.LANCHOR6
 	.word	.LANCHOR40
+	.word	.LANCHOR47
+	.word	.LANCHOR45
+	.word	.LANCHOR41
+	.word	.LANCHOR44
+	.word	.LANCHOR48
+	.word	.LANCHOR5
+	.word	.LANCHOR3
+	.word	.LANCHOR19
+	.word	.LANCHOR13
+	.word	.LANCHOR51
+	.word	.LANCHOR52
+	.word	.LANCHOR53
 	.word	.LANCHOR42
+	.word	.LANCHOR146
+	.word	.LC1
+	.size	SupperBlkListInit, .-SupperBlkListInit
+	.section	.text.FtlGcPageVarInit,"ax",%progbits
+	.align	1
+	.global	FtlGcPageVarInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcPageVarInit, %function
+FtlGcPageVarInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r2, .L599
+	movs	r3, #0
+	push	{r4, lr}
+	movs	r1, #255
+	ldr	r4, .L599+4
+	strh	r3, [r2]	@ movhi
+	ldr	r2, .L599+8
+	strh	r3, [r2]	@ movhi
+	ldrh	r2, [r4]
+	ldr	r3, .L599+12
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldrh	r3, [r4]
+	movs	r2, #12
+	movs	r1, #255
+	muls	r2, r3, r2
+	ldr	r3, .L599+16
+	ldr	r0, [r3]
+	bl	ftl_memset
+	pop	{r4, lr}
+	b	FtlGcBufInit
+.L600:
+	.align	2
+.L599:
+	.word	.LANCHOR96
+	.word	.LANCHOR21
+	.word	.LANCHOR97
 	.word	.LANCHOR95
-	.word	.LANCHOR115
-	.word	.LANCHOR113
-	.word	.LANCHOR90
-	.word	.LANCHOR108
-	.word	.LANCHOR114
-	.word	.LANCHOR92
-	.word	.LANCHOR43
-	.word	.LANCHOR126
-	.word	.LANCHOR36
-	.word	.LANCHOR131
-	.word	.LANCHOR132
-	.word	.LANCHOR133
-	.word	.LANCHOR123
-	.size	FtlMemInit, .-FtlMemInit
-	.section	.text.FtlBbt2Bitmap,"ax",%progbits
+	.word	.LANCHOR98
+	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
+	.section	.text.FlashGetBadBlockList,"ax",%progbits
 	.align	1
-	.global	FtlBbt2Bitmap
+	.global	FlashGetBadBlockList
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlBbt2Bitmap, %function
-FtlBbt2Bitmap:
+	.type	FlashGetBadBlockList, %function
+FlashGetBadBlockList:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L662
-	push	{r4, r5, r6, r7, r8, lr}
-	mov	r5, r0
-	ldr	r7, .L662+4
-	mov	r6, r1
-	subs	r4, r5, #2
-	addw	r5, r5, #1022
-	ldrh	r2, [r3]
-	movs	r1, #0
-	ldr	r8, .L662+12
-	mov	r0, r6
-	lsls	r2, r2, #2
+	push	{r3, r4, r5, lr}
+	mov	r2, #256
+	mov	r5, r1
+	movs	r1, #255
+	mov	r4, r0
 	bl	ftl_memset
-.L659:
-	ldrh	r3, [r4, #2]
-	movw	r2, #65535
-	cmp	r3, r2
-	beq	.L656
-	ldrh	r2, [r7]
-	cmp	r2, r3
-	bhi	.L658
-	movs	r2, #74
-	mov	r1, r8
-	ldr	r0, .L662+8
-	bl	printf
-.L658:
-	ldrh	r3, [r4, #2]!
-	movs	r2, #1
-	cmp	r5, r4
-	lsr	r1, r3, #5
-	and	r3, r3, #31
-	lsl	r3, r2, r3
-	ldr	r2, [r6, r1, lsl #2]
-	orr	r2, r2, r3
-	str	r2, [r6, r1, lsl #2]
-	bne	.L659
-.L656:
-	pop	{r4, r5, r6, r7, r8, pc}
-.L663:
+	ldr	r3, .L608
+	mov	r1, r5
+	mov	r0, r4
+	ldr	r3, [r3]
+	blx	r3
+	uxth	r0, r0
+	cmp	r0, #50
+	bls	.L602
+	mov	r2, #256
+	movs	r1, #255
+	mov	r0, r4
+	bl	ftl_memset
+	movs	r0, #0
+.L602:
+	ldr	r3, .L608+4
+	ldrh	r3, [r3, #14]
+	cmp	r3, #4
+	bne	.L607
+	add	r1, r4, r0, lsl #1
+	mov	r3, r4
+.L604:
+	cmp	r3, r1
+	bne	.L605
+.L607:
+	pop	{r3, r4, r5, pc}
+.L605:
+	ldrh	r2, [r3]
+	lsrs	r2, r2, #1
+	strh	r2, [r3], #2	@ movhi
+	b	.L604
+.L609:
 	.align	2
-.L662:
-	.word	.LANCHOR137
-	.word	.LANCHOR17
-	.word	.LC1
-	.word	.LANCHOR139
-	.size	FtlBbt2Bitmap, .-FtlBbt2Bitmap
-	.section	.text.FtlBbtMemInit,"ax",%progbits
+.L608:
+	.word	.LANCHOR105
+	.word	.LANCHOR0
+	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
+	.section	.text.ftl_memcpy,"ax",%progbits
 	.align	1
-	.global	FtlBbtMemInit
+	.global	ftl_memcpy
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlBbtMemInit, %function
-FtlBbtMemInit:
+	.type	ftl_memcpy, %function
+ftl_memcpy:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r0, .L665
-	movw	r3, #65535
-	movs	r2, #16
-	movs	r1, #255
-	strh	r3, [r0]	@ movhi
-	movs	r3, #0
-	strh	r3, [r0, #6]	@ movhi
-	adds	r0, r0, #12
-	b	ftl_memset
-.L666:
+	b	memcpy
+	.size	ftl_memcpy, .-ftl_memcpy
+	.section	.text.FlashReadPages,"ax",%progbits
+	.align	1
+	.global	FlashReadPages
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashReadPages, %function
+FlashReadPages:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	fp, r1
+	ldr	r3, .L638
+	mov	r4, r0
+	mov	r10, #0
+	ldrh	r2, [r3, #12]
+	str	r3, [sp, #4]
+	str	r2, [sp]
+.L612:
+	cmp	r10, fp
+	bne	.L622
+	movs	r0, #0
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L622:
+	ldr	r3, [r4, #8]
+	cbz	r3, .L613
+	ldr	r3, [r4, #12]
+	cbnz	r3, .L614
+.L613:
+	movs	r2, #90
+	ldr	r1, .L638+4
+	ldr	r0, .L638+8
+	bl	printf
+.L614:
+	add	r2, sp, #8
+	add	r1, sp, #12
+	ldr	r0, [r4, #4]
+	bl	l2p_addr_tran.isra.0
+	ldr	r5, [r4, #8]
+	ldr	r8, .L638+20
+	ldr	r7, .L638+12
+	tst	r5, #63
+	ldr	r3, [r4, #12]
+	it	ne
+	ldrne	r5, [r8]
+	ldr	r1, [sp, #12]
+	ldrb	r0, [sp, #8]	@ zero_extendqisi2
+	mov	r2, r5
+	ldr	r6, [r7, #12]
+	blx	r6
+	ldr	r3, [sp, #4]
+	str	r0, [r4]
+	ldrh	r3, [r3, #14]
+	cmp	r3, #4
+	bne	.L617
+	ldr	r0, [sp]
+	add	r2, r5, #2048
+	ldr	r3, [r4, #12]
+	ldr	r1, [sp, #12]
+	ldr	r7, [r7, #12]
+	adds	r3, r3, #8
+	add	r1, r1, r0
+	ldrb	r0, [sp, #8]	@ zero_extendqisi2
+	blx	r7
+	adds	r3, r0, #1
+	beq	.L618
+	ldr	r3, [r4, #12]
+	ldr	r2, [r3, #12]
+	adds	r2, r2, #1
+	bne	.L619
+	ldr	r2, [r3, #8]
+	adds	r2, r2, #1
+	bne	.L619
+	ldr	r3, [r3]
+	adds	r3, r3, #1
+	beq	.L619
+.L618:
+	mov	r3, #-1
+	str	r3, [r4]
+.L619:
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	beq	.L617
+	cmp	r0, #256
+	it	eq
+	streq	r0, [r4]
+.L617:
+	ldr	r3, [r8]
+	cmp	r5, r3
+	bne	.L621
+	ldr	r0, [r4, #8]
+	cmp	r5, r0
+	beq	.L621
+	ldr	r3, .L638+16
+	mov	r1, r5
+	ldrh	r2, [r3]
+	lsls	r2, r2, #9
+	bl	ftl_memcpy
+.L621:
+	add	r10, r10, #1
+	adds	r4, r4, #20
+	b	.L612
+.L639:
 	.align	2
-.L665:
-	.word	.LANCHOR37
-	.size	FtlBbtMemInit, .-FtlBbtMemInit
-	.section	.text.FtlFreeSysBlkQueueInit,"ax",%progbits
+.L638:
+	.word	.LANCHOR0
+	.word	.LANCHOR147
+	.word	.LC1
+	.word	.LANCHOR105
+	.word	.LANCHOR12
+	.word	.LANCHOR120
+	.size	FlashReadPages, .-FlashReadPages
+	.section	.text.FtlLoadFactoryBbt,"ax",%progbits
 	.align	1
-	.global	FtlFreeSysBlkQueueInit
+	.global	FtlLoadFactoryBbt
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlFreeSysBlkQueueInit, %function
-FtlFreeSysBlkQueueInit:
+	.type	FtlLoadFactoryBbt, %function
+FtlLoadFactoryBbt:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L668
-	mov	r2, #2048
-	push	{r4, lr}
-	movs	r4, #0
-	mov	r1, r4
-	strh	r4, [r3, #2]	@ movhi
-	strh	r4, [r3, #4]	@ movhi
-	strh	r4, [r3, #6]	@ movhi
-	strh	r0, [r3], #8	@ movhi
-	mov	r0, r3
-	bl	ftl_memset
-	mov	r0, r4
-	pop	{r4, pc}
-.L669:
-	.align	2
-.L668:
-	.word	.LANCHOR38
-	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
-	.section	.text.load_l2p_region,"ax",%progbits
-	.align	1
-	.global	load_l2p_region
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	load_l2p_region, %function
-load_l2p_region:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L676
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r5, r0
-	mov	r10, r1
-	ldrh	r2, [r3]
-	str	r3, [sp, #4]
-	cmp	r2, r0
-	bcs	.L671
-	mov	r2, #492
-	ldr	r1, .L676+4
-	ldr	r0, .L676+8
-	bl	printf
-.L671:
-	ldr	fp, .L676+40
-	movs	r4, #12
-	ldr	r7, .L676+12
-	ldr	r3, [fp]
-	ldr	r8, [r3, r5, lsl #2]
-	cmp	r8, #0
-	bne	.L672
-	mul	r4, r4, r10
-	ldr	r2, [r7]
-	movs	r1, #255
-	adds	r0, r2, r4
-	ldr	r2, .L676+16
-	ldr	r0, [r0, #8]
-	ldrh	r2, [r2]
-	bl	ftl_memset
-	ldr	r2, [r7]
-	adds	r1, r2, r4
-	strh	r5, [r2, r4]	@ movhi
-	str	r8, [r1, #4]
-.L673:
+	ldr	r3, .L650
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r6, #0
+	ldr	r5, .L650+4
+	ldr	r3, [r3]
+	ldr	r7, .L650+8
+	ldr	r10, .L650+20
+	str	r3, [r5, #8]
+	ldr	r3, .L650+12
+	ldr	r8, [r3]
+	str	r8, [r5, #12]
+.L641:
+	ldr	r3, .L650+16
+	ldrh	r3, [r3]
+	cmp	r6, r3
+	bcc	.L646
 	movs	r0, #0
-	add	sp, sp, #8
-	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L672:
-	mul	r4, r4, r10
-	ldr	r2, [r7]
-	ldr	r6, .L676+20
-	add	r2, r2, r4
-	mov	r0, r6
-	ldr	r2, [r2, #8]
-	str	r8, [r6, #4]
-	str	r2, [r6, #8]
-	ldr	r2, .L676+24
-	ldr	r2, [r2]
-	str	r2, [r6, #12]
+.L646:
+	ldrh	r4, [r10]
+	movw	r3, #65535
+	ldr	fp, .L650+4
+	strh	r3, [r7, #2]!	@ movhi
+	subs	r4, r4, #1
+	uxth	r4, r4
+.L642:
+	ldrh	r3, [r10]
+	sub	r2, r3, #15
+	cmp	r2, r4
+	bgt	.L644
+	mla	r3, r6, r3, r4
 	movs	r2, #1
 	mov	r1, r2
+	mov	r0, fp
+	lsls	r3, r3, #10
+	str	r3, [r5, #4]
 	bl	FlashReadPages
-	ldr	r10, [r6, #12]
-	ldrh	r2, [r10, #8]
-	cmp	r2, r5
-	beq	.L674
-	mov	r2, r8
-	mov	r1, r5
-	ldr	r0, .L676+28
-	bl	printf
-	movs	r3, #4
-	ldr	r1, [r6, #12]
-	mov	r2, r3
-	ldr	r0, .L676+32
-	bl	rknand_print_hex
-	ldr	r3, [sp, #4]
-	movs	r2, #4
-	ldr	r1, [fp]
-	ldr	r0, .L676+36
-	ldrh	r3, [r3]
-	bl	rknand_print_hex
-.L674:
-	ldrh	r3, [r10, #8]
-	cmp	r3, r5
-	beq	.L675
-	movw	r2, #513
-	ldr	r1, .L676+4
-	ldr	r0, .L676+8
-	bl	printf
-.L675:
-	ldr	r3, [r7]
-	movs	r1, #0
-	adds	r2, r3, r4
-	str	r1, [r2, #4]
-	strh	r5, [r3, r4]	@ movhi
-	b	.L673
-.L677:
+	ldr	r3, [r5]
+	adds	r3, r3, #1
+	beq	.L643
+	ldrh	r2, [r8]
+	movw	r3, #61664
+	cmp	r2, r3
+	bne	.L643
+	strh	r4, [r7]	@ movhi
+.L644:
+	adds	r6, r6, #1
+	b	.L641
+.L643:
+	subs	r4, r4, #1
+	uxth	r4, r4
+	b	.L642
+.L651:
 	.align	2
-.L676:
-	.word	.LANCHOR32
-	.word	.LANCHOR140
-	.word	.LC1
-	.word	.LANCHOR55
-	.word	.LANCHOR23
-	.word	.LANCHOR106
-	.word	.LANCHOR108
-	.word	.LC86
-	.word	.LC87
-	.word	.LC88
-	.word	.LANCHOR134
-	.size	load_l2p_region, .-load_l2p_region
-	.section	.text.ftl_free_no_use_map_blk,"ax",%progbits
+.L650:
+	.word	.LANCHOR115
+	.word	.LANCHOR148
+	.word	.LANCHOR37+10
+	.word	.LANCHOR123
+	.word	.LANCHOR10
+	.word	.LANCHOR17
+	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
+	.section	.text.FtlGetLastWrittenPage,"ax",%progbits
 	.align	1
-	.global	ftl_free_no_use_map_blk
+	.global	FtlGetLastWrittenPage
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_free_no_use_map_blk, %function
-ftl_free_no_use_map_blk:
-	@ args = 0, pretend = 0, frame = 8
+	.type	FtlGetLastWrittenPage, %function
+FtlGetLastWrittenPage:
+	@ args = 0, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldrh	r2, [r0, #10]
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r4, r0
-	ldr	r5, [r0, #20]
-	movs	r1, #0
-	ldr	r10, [r0, #12]
-	lsls	r2, r2, #1
-	ldr	r6, [r0, #24]
+	cmp	r1, #1
+	push	{r4, r5, r6, r7, r8, lr}
+	it	eq
+	ldreq	r3, .L664
+	sub	sp, sp, #88
+	lsl	r7, r0, #10
+	mov	r2, r1
+	it	ne
+	ldrne	r3, .L664+4
+	mov	r6, r1
+	add	r0, sp, #4
+	movs	r1, #1
+	ldrh	r5, [r3]
+	ldr	r3, .L664+8
+	subs	r5, r5, #1
+	ldr	r3, [r3]
+	sxth	r5, r5
+	str	r3, [sp, #12]
+	add	r3, sp, #24
+	str	r3, [sp, #16]
+	orr	r3, r5, r7
+	str	r3, [sp, #8]
+	bl	FlashReadPages
+	ldr	r3, [sp, #24]
+	adds	r3, r3, #1
+	bne	.L655
+	mov	r8, #0
+.L656:
+	cmp	r8, r5
+	ble	.L659
+.L655:
 	mov	r0, r5
-	bl	ftl_memset
-	movs	r3, #0
-.L679:
-	ldrh	r1, [r4, #6]
-	uxth	r2, r3
-	cmp	r1, r2
-	bhi	.L683
-	ldrh	r3, [r5]
-	movs	r6, #0
-	ldr	r2, .L692
-	mov	fp, r6
-.L684:
-	ldrh	r0, [r4, #10]
-	uxth	r1, r6
-	cmp	r0, r1
-	bhi	.L688
-	mov	r0, fp
-	add	sp, sp, #8
+	add	sp, sp, #88
 	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L683:
-	uxth	r2, r3
-	ldr	r1, [r6, r2, lsl #2]
-	movs	r2, #0
-	ubfx	r1, r1, #10, #16
-.L680:
-	ldrh	r7, [r4, #10]
-	uxth	r0, r2
-	cmp	r7, r0
-	bhi	.L682
-	adds	r3, r3, #1
-	b	.L679
-.L682:
-	uxth	r0, r2
-	adds	r2, r2, #1
-	ldrh	r7, [r10, r0, lsl #1]
-	cmp	r7, r1
-	ittt	eq
-	ldrheq	r7, [r5, r0, lsl #1]
-	addeq	r7, r7, #1
-	strheq	r7, [r5, r0, lsl #1]	@ movhi
-	b	.L680
-.L688:
-	ldrh	r0, [r4]
-	uxth	r7, r6
-	cmp	r0, r1
-	bne	.L685
-	ldrh	r0, [r2]
-	ldrh	ip, [r4, #2]
-	cmp	ip, r0
-	it	cc
-	strhcc	r0, [r5, r7, lsl #1]	@ movhi
-.L685:
-	ldrh	r8, [r5, r7, lsl #1]
-	cmp	r3, r8
-	itt	hi
-	movhi	fp, r1
-	movhi	r3, r8
-	cmp	r8, #0
-	bne	.L687
-	ldrh	r0, [r10, r7, lsl #1]
-	cbz	r0, .L687
+	pop	{r4, r5, r6, r7, r8, pc}
+.L659:
+	add	r3, r8, r5
+	mov	r2, r6
+	add	r3, r3, r3, lsr #31
 	movs	r1, #1
-	str	r2, [sp, #4]
-	str	r3, [sp]
-	bl	FtlFreeSysBlkQueueIn
-	strh	r8, [r10, r7, lsl #1]	@ movhi
-	ldr	r2, [sp, #4]
-	ldrh	r1, [r4, #8]
-	ldr	r3, [sp]
-	subs	r1, r1, #1
-	strh	r1, [r4, #8]	@ movhi
-.L687:
-	adds	r6, r6, #1
-	b	.L684
-.L693:
+	add	r0, sp, #4
+	asrs	r4, r3, #1
+	sxth	r3, r4
+	orrs	r3, r3, r7
+	str	r3, [sp, #8]
+	bl	FlashReadPages
+	ldr	r3, [sp, #24]
+	adds	r3, r3, #1
+	bne	.L657
+	ldr	r3, [sp, #28]
+	adds	r3, r3, #1
+	bne	.L657
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #1
+	beq	.L657
+	subs	r4, r4, #1
+	sxth	r5, r4
+	b	.L656
+.L657:
+	adds	r4, r4, #1
+	sxth	r8, r4
+	b	.L656
+.L665:
 	.align	2
-.L692:
+.L664:
 	.word	.LANCHOR20
-	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
-	.section	.text.Ftl_write_map_blk_to_last_page,"ax",%progbits
+	.word	.LANCHOR19
+	.word	.LANCHOR121
+	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
+	.section	.text.FtlScanSysBlk,"ax",%progbits
 	.align	1
-	.global	Ftl_write_map_blk_to_last_page
+	.global	FtlScanSysBlk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	Ftl_write_map_blk_to_last_page, %function
-Ftl_write_map_blk_to_last_page:
-	@ args = 0, pretend = 0, frame = 0
+	.type	FtlScanSysBlk, %function
+FtlScanSysBlk:
+	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	movw	r2, #65535
-	ldrh	r3, [r0]
-	mov	r4, r0
-	ldr	r5, [r0, #12]
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #0
+	ldr	r5, .L747
+	sub	sp, sp, #32
+	mov	r1, r4
+	ldr	r3, .L747+4
+	ldr	r2, [r5]
+	ldr	r6, .L747+8
+	strh	r4, [r3]	@ movhi
+	ldr	r3, .L747+12
+	lsls	r2, r2, #2
+	strh	r4, [r6]	@ movhi
+	ldr	r7, .L747+16
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldr	r2, [r5]
+	mov	r1, r4
+	ldr	r3, .L747+20
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldrh	r2, [r7]
+	mov	r1, r4
+	ldr	r3, .L747+24
+	lsls	r2, r2, #2
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldrh	r2, [r7]
+	mov	r1, r4
+	ldr	r3, .L747+28
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+	movs	r2, #12
+	movs	r1, #255
+	ldr	r0, .L747+32
+	bl	ftl_memset
+	ldr	r3, .L747+36
+	str	r6, [sp, #12]
+	str	r5, [sp, #16]
+	ldrh	r3, [r3]
+	str	r3, [sp, #4]
+.L667:
+	ldr	r3, .L747+40
+	ldr	r2, [sp, #4]
+	ldrh	r3, [r3]
 	cmp	r3, r2
-	bne	.L695
-	ldrh	r3, [r0, #8]
-	cbz	r3, .L696
-	movw	r2, #641
-	ldr	r1, .L704
-	ldr	r0, .L704+4
-	bl	printf
-.L696:
-	ldrh	r3, [r4, #8]
-	adds	r3, r3, #1
-	strh	r3, [r4, #8]	@ movhi
-	bl	FtlFreeSysBlkQueueOut
-	movs	r3, #0
-	strh	r0, [r5]	@ movhi
-	strh	r3, [r4, #2]	@ movhi
-	strh	r3, [r4]	@ movhi
-	ldr	r3, [r4, #28]
+	bls	.L708
+	ldr	r3, .L747+44
+	movs	r5, #0
+	ldr	r1, .L747+48
+	mov	fp, r5
+	movs	r7, #20
+	ldrh	r8, [r3]
+	ldr	r3, .L747+52
+	ldr	r2, [r1]
+	ldr	r1, .L747+56
+	ldr	r6, [r3]
+	ldr	r3, .L747+60
+	str	r2, [sp, #8]
+	ldrh	r10, [r1]
+	ldr	r3, [r3]
+	ldr	r2, .L747+64
+	b	.L709
+.L669:
+	ldrb	r0, [r2, r5]	@ zero_extendqisi2
+	ldr	r1, [sp, #4]
+	str	r3, [sp, #28]
+	str	r2, [sp, #24]
+	bl	V2P_block
+	str	r0, [sp, #20]
+	bl	FtlBbmIsBadBlock
+	ldr	r2, [sp, #24]
+	ldr	r3, [sp, #28]
+	cbnz	r0, .L668
+	ldr	r1, [sp, #20]
+	mla	r0, r7, fp, r6
+	ldr	r4, [sp, #8]
+	lsls	r1, r1, #10
+	str	r3, [r0, #8]
+	str	r1, [r0, #4]
+	mul	r1, r10, fp
+	bic	r1, r1, #3
+	add	r1, r1, r4
+	str	r1, [r0, #12]
+	add	r1, fp, #1
+	uxth	fp, r1
+.L668:
+	adds	r5, r5, #1
+.L709:
+	uxth	r1, r5
+	cmp	r8, r1
+	bhi	.L669
+	cmp	fp, #0
+	bne	.L670
+.L707:
+	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
-	str	r3, [r4, #28]
-.L697:
-	movs	r0, #0
-	pop	{r3, r4, r5, r6, r7, pc}
-.L695:
-	ldrh	r5, [r5, r3, lsl #1]
-	movs	r1, #255
-	ldrh	r3, [r0, #2]
-	ldr	r2, .L704+8
-	ldr	r7, .L704+12
-	ldr	r6, [r0, #24]
-	orr	r3, r3, r5, lsl #10
-	ldr	r0, [r7]
-	str	r3, [r2, #4]
-	ldr	r3, .L704+16
-	str	r0, [r2, #8]
+	uxth	r3, r3
+	str	r3, [sp, #4]
+	b	.L667
+.L670:
+	movs	r7, #0
+	movs	r2, #1
+	mov	r1, fp
+	mov	r0, r6
+	bl	FlashReadPages
+.L671:
+	uxth	r3, r7
+	cmp	fp, r3
+	bls	.L707
+	ldr	r3, .L747+52
+	mov	r8, #20
+	mul	r8, r8, r7
 	ldr	r3, [r3]
-	str	r3, [r2, #12]
-	ldr	r2, [r4, #28]
-	str	r2, [r3, #4]
-	movw	r2, #64245
-	strh	r2, [r3, #8]	@ movhi
-	ldrh	r2, [r4, #4]
-	strh	r5, [r3, #2]	@ movhi
-	strh	r2, [r3]	@ movhi
-	ldr	r3, .L704+20
-	ldrh	r2, [r3]
-	lsls	r2, r2, #3
-	bl	ftl_memset
-	ldrh	ip, [r4, #6]
-	movs	r3, #0
-	ldr	r1, [r7]
-	mov	r2, r3
-.L698:
-	uxth	r0, r3
-	cmp	ip, r0
-	bhi	.L700
+	add	r2, r3, r8
+	ldr	r3, [r3, r8]
+	ldr	r5, [r2, #4]
+	ldr	r6, [r2, #12]
+	adds	r3, r3, #1
+	ubfx	r5, r5, #10, #16
+	bne	.L674
+	mov	r10, #16
+.L676:
+	ldr	r3, .L747+52
 	movs	r2, #1
-	movs	r3, #0
 	mov	r1, r2
-	ldr	r0, .L704+8
-	bl	FlashProgPages
-	ldrh	r3, [r4, #2]
-	mov	r0, r4
-	adds	r3, r3, #1
-	strh	r3, [r4, #2]	@ movhi
-	bl	ftl_map_blk_gc
-	b	.L697
-.L700:
-	ldr	r0, [r6, r3, lsl #2]
-	cmp	r5, r0, lsr #10
-	bne	.L699
-	adds	r2, r2, #1
-	uxth	r2, r2
-	str	r3, [r1, r2, lsl #3]
-	add	r7, r1, r2, lsl #3
-	ldr	r0, [r6, r3, lsl #2]
-	str	r0, [r7, #4]
-.L699:
+	ldr	r0, [r3]
+	add	r0, r0, r8
+	ldr	r3, [r0, #4]
 	adds	r3, r3, #1
-	b	.L698
-.L705:
-	.align	2
-.L704:
-	.word	.LANCHOR141
-	.word	.LC1
-	.word	.LANCHOR106
-	.word	.LANCHOR107
-	.word	.LANCHOR108
-	.word	.LANCHOR20
-	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
-	.section	.text.FtlMapWritePage,"ax",%progbits
-	.align	1
-	.global	FtlMapWritePage
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlMapWritePage, %function
-FtlMapWritePage:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r4, r0
-	ldr	r8, .L725+28
-	mov	r7, r1
-	movs	r6, #0
-	str	r2, [sp, #4]
-	mov	fp, r8
-.L707:
-	ldr	r2, .L725
-	ldr	r3, [r2]
+	str	r3, [r0, #4]
+	bl	FlashReadPages
+	ldrh	r2, [r6]
+	movw	r3, #65535
+	cmp	r2, r3
+	ldr	r3, .L747+52
+	ldr	r3, [r3]
+	bne	.L673
+	mov	r2, #-1
+	str	r2, [r3, r8]
+	ldr	r3, .L747+52
+	ldr	r3, [r3]
+	ldr	r3, [r3, r8]
+	cmp	r3, r2
+	bne	.L674
+.L675:
+	movs	r1, #1
+	b	.L746
+.L673:
+	ldr	r3, [r3, r8]
 	adds	r3, r3, #1
-	str	r3, [r2]
-	ldrh	r3, [r8]
-	ldrh	r2, [r4, #2]
-	subs	r3, r3, #1
+	bne	.L674
+	add	r10, r10, #-1
+	uxth	r10, r10
+	cmp	r10, #0
+	bne	.L676
+	b	.L675
+.L674:
+	ldr	r3, .L747+68
+	ldr	r2, [r3]
+	ldr	r3, [r6, #4]
+	adds	r1, r2, #1
+	beq	.L677
+	cmp	r2, r3
+	bhi	.L678
+.L677:
+	adds	r2, r3, #1
+	ittt	ne
+	ldrne	r1, .L747+68
+	addne	r2, r3, #1
+	strne	r2, [r1]
+.L678:
+	ldrh	r2, [r6]
+	movw	r1, #61604
+	cmp	r2, r1
+	beq	.L680
+	bhi	.L681
+	movw	r3, #61574
 	cmp	r2, r3
-	bge	.L708
-	ldrh	r2, [r4]
-	movw	r3, #65535
+	beq	.L682
+.L679:
+	adds	r7, r7, #1
+	b	.L671
+.L681:
+	movw	r3, #61634
 	cmp	r2, r3
-	bne	.L709
-.L708:
-	mov	r0, r4
-	bl	Ftl_write_map_blk_to_last_page
-.L709:
-	ldrh	r2, [r4]
-	ldr	r3, [r4, #12]
-	ldrh	r3, [r3, r2, lsl #1]
-	cbnz	r3, .L710
-	movw	r2, #699
-	ldr	r1, .L725+4
-	ldr	r0, .L725+8
-	bl	printf
-.L710:
-	ldrh	r2, [r4]
-	ldrh	r3, [r4, #10]
+	beq	.L683
+	movw	r3, #65535
 	cmp	r2, r3
-	bcc	.L711
-	mov	r2, #700
-	ldr	r1, .L725+4
-	ldr	r0, .L725+8
-	bl	printf
-.L711:
-	ldrh	r2, [r4]
+	bne	.L679
 	movs	r1, #0
-	ldr	r3, [r4, #12]
-	ldr	r5, .L725+12
-	ldrh	r10, [r3, r2, lsl #1]
-	ldrh	r2, [r4, #2]
-	ldr	r3, [sp, #4]
-	orr	r2, r2, r10, lsl #10
-	str	r3, [r5, #8]
-	str	r2, [r5, #4]
-	ldr	r2, .L725+16
-	ldr	r0, [r2]
-	movs	r2, #16
-	str	r0, [r5, #12]
-	bl	ftl_memset
-	ldr	r2, [r5, #12]
-	movs	r3, #1
-	ldr	r1, [r4, #28]
+.L746:
 	mov	r0, r5
-	strh	r7, [r2, #8]	@ movhi
-	str	r1, [r2, #4]
-	ldrh	r1, [r4, #4]
-	strh	r10, [r2, #2]	@ movhi
-	strh	r1, [r2]	@ movhi
-	mov	r2, r3
-	mov	r1, r3
-	bl	FlashProgPages
-	ldrh	r2, [r4, #2]
-	ldr	r3, [r5]
-	adds	r2, r2, #1
-	uxth	r2, r2
-	adds	r3, r3, #1
-	strh	r2, [r4, #2]	@ movhi
-	bne	.L712
-	ldr	r1, [r5, #4]
-	adds	r6, r6, #1
-	ldr	r0, .L725+20
-	uxth	r6, r6
-	bl	printf
-	ldrh	r2, [r4, #2]
-	cmp	r2, #2
-	ittt	ls
-	ldrhls	r2, [fp]
-	addls	r2, r2, #-1
-	strhls	r2, [r4, #2]	@ movhi
-	cmp	r6, #3
-	bls	.L714
-	mov	r2, r6
-	ldr	r1, [r5, #4]
-	ldr	r0, .L725+24
+	bl	FtlFreeSysBlkQueueIn
+	b	.L679
+.L683:
+	ldr	r3, .L747+8
+	ldrh	r2, [r3]
+	ldr	r3, .L747
+	ldr	r3, [r3]
+	cmp	r2, r3
+	bls	.L685
+	movw	r2, #1222
+	ldr	r1, .L747+72
+	ldr	r0, .L747+76
 	bl	printf
-.L715:
-	b	.L715
-.L714:
-	ldr	r3, [r4, #32]
+.L685:
+	ldr	r3, [sp, #16]
+	ldr	r2, [sp, #12]
+	ldr	r1, [r3]
+	ldrh	r0, [r2]
+	ldr	r2, .L747+12
+	uxth	r10, r1
+	ldr	ip, [r2]
+	add	r3, r10, #-1
+	sub	r10, r10, r0
+	add	r10, r10, #-1
+	sxth	r3, r3
+	sxth	r10, r10
+.L686:
+	cmp	r3, r10
+	bgt	.L692
+	cmp	r3, #0
+	bge	.L724
+	b	.L679
+.L692:
+	ldr	r2, [ip, r3, lsl #2]
+	add	r8, ip, r3, lsl #2
+	ldr	r4, [r6, #4]
+	cmp	r4, r2
+	bls	.L687
+	ldr	r2, [ip]
+	cbnz	r2, .L688
+	cmp	r1, r0
+	ittt	ne
+	ldrne	r2, .L747+8
+	addne	r0, r0, #1
+	strhne	r0, [r2]	@ movhi
+.L688:
+	ldr	r2, .L747+20
+	uxth	r10, r3
+	ldr	r0, [r2]
+	movs	r2, #0
+.L689:
+	uxth	lr, r2
+	sxth	r1, r2
+	cmp	r10, lr
+	bhi	.L690
+	ldr	r2, [r6, #4]
 	cmp	r3, #0
-	beq	.L707
+	str	r2, [r8]
+	strh	r5, [r0, r3, lsl #1]	@ movhi
+	blt	.L679
+	ldr	r2, .L747+8
+	ldrh	r0, [r2]
+	ldr	r2, .L747
+	ldr	r2, [r2]
+	subs	r2, r2, r0
+	subs	r2, r2, #1
+	sxth	r2, r2
+	cmp	r3, r2
+	bgt	.L679
 .L724:
-	b	.L724
-.L712:
-	cmp	r2, #1
-	beq	.L707
-	ldr	r2, [r5, #4]
-	movs	r0, #0
-	ldr	r3, [r4, #24]
-	str	r2, [r3, r7, lsl #2]
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L726:
+	ldr	r2, .L747+8
+	adds	r0, r0, #1
+	strh	r0, [r2]	@ movhi
+	ldr	r2, [r6, #4]
+	str	r2, [ip, r3, lsl #2]
+	ldr	r2, .L747+20
+.L744:
+	ldr	r2, [r2]
+	strh	r5, [r2, r3, lsl #1]	@ movhi
+	b	.L679
+.L690:
+	add	lr, ip, r1, lsl #2
+	adds	r2, r2, #1
+	ldr	r4, [lr, #4]
+	add	lr, r0, r1, lsl #1
+	ldrh	lr, [lr, #2]
+	str	r4, [ip, r1, lsl #2]
+	strh	lr, [r0, r1, lsl #1]	@ movhi
+	b	.L689
+.L687:
+	subs	r3, r3, #1
+	sxth	r3, r3
+	b	.L686
+.L748:
 	.align	2
-.L725:
-	.word	.LANCHOR66
-	.word	.LANCHOR142
+.L747:
+	.word	.LANCHOR30
+	.word	.LANCHOR35
+	.word	.LANCHOR141
+	.word	.LANCHOR135
+	.word	.LANCHOR27
+	.word	.LANCHOR129
+	.word	.LANCHOR132
+	.word	.LANCHOR36
+	.word	.LANCHOR79
+	.word	.LANCHOR5
+	.word	.LANCHOR6
+	.word	.LANCHOR3
+	.word	.LANCHOR92
+	.word	.LANCHOR112
+	.word	.LANCHOR24
+	.word	.LANCHOR91
+	.word	.LANCHOR13
+	.word	.LANCHOR70
+	.word	.LANCHOR149
 	.word	.LC1
-	.word	.LANCHOR106
-	.word	.LANCHOR108
-	.word	.LC89
-	.word	.LC90
-	.word	.LANCHOR20
-	.size	FtlMapWritePage, .-FtlMapWritePage
-	.section	.text.ftl_map_blk_gc,"ax",%progbits
-	.align	1
-	.global	ftl_map_blk_gc
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_map_blk_gc, %function
-ftl_map_blk_gc:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, [r0, #24]
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r4, r0
-	ldr	r5, [r0, #12]
-	str	r3, [sp]
-	bl	ftl_free_no_use_map_blk
-	ldrh	r3, [r4, #10]
-	ldrh	r2, [r4, #8]
-	subs	r3, r3, #4
-	cmp	r2, r3
-	blt	.L728
-	uxth	r0, r0
-	ldrh	r7, [r5, r0, lsl #1]
-	cbz	r7, .L728
-	ldr	r3, [r4, #32]
-	cbnz	r3, .L728
-	movs	r2, #1
-	str	r2, [r4, #32]
-	strh	r3, [r5, r0, lsl #1]	@ movhi
-	ldrh	r3, [r4, #8]
-	ldrh	r2, [r4, #2]
-	subs	r3, r3, #1
-	strh	r3, [r4, #8]	@ movhi
-	ldr	r3, .L739
-	ldrh	r3, [r3]
+.L682:
+	ldr	r8, .L749+12
+	ldr	r10, .L749+20
+	ldrh	r2, [r8]
+	ldrh	r3, [r10]
 	cmp	r2, r3
-	bcc	.L729
-	mov	r0, r4
-	bl	ftl_map_blk_alloc_new_blk
-.L729:
-	ldr	r5, .L739+4
-	movs	r6, #0
-	ldr	fp, .L739+20
-.L730:
-	ldrh	r3, [r4, #6]
-	uxth	r10, r6
+	bls	.L695
+	movw	r2, #1263
+	ldr	r1, .L749
+	ldr	r0, .L749+4
+	bl	printf
+.L695:
+	ldr	r2, .L749+8
+	ldrh	lr, [r10]
+	ldrh	ip, [r8]
+	ldr	r0, [r2]
+	add	r10, lr, #-1
+	sxth	r3, r10
+	sub	r10, r10, ip
+.L696:
 	cmp	r3, r10
-	bhi	.L734
+	ble	.L701
+	ldr	r1, [r6, #4]
+	add	r8, r0, r3, lsl #2
+	ldr	r2, [r0, r3, lsl #2]
+	cmp	r1, r2
+	bls	.L697
+	ldr	r2, [r0]
+	cbnz	r2, .L698
+	cmp	lr, ip
+	ittt	ne
+	ldrne	r2, .L749+12
+	addne	ip, ip, #1
+	strhne	ip, [r2]	@ movhi
+.L698:
+	ldr	r2, .L749+16
+	uxth	r10, r3
+	ldr	ip, [r2]
+	movs	r2, #0
+.L699:
+	uxth	lr, r2
+	sxth	r1, r2
+	cmp	r10, lr
+	bhi	.L700
+	ldr	r2, [r6, #4]
+	str	r2, [r8]
+	strh	r5, [ip, r3, lsl #1]	@ movhi
+.L701:
+	cmp	r3, #0
+	blt	.L679
+	ldr	r2, .L749+20
+	ldr	ip, .L749+12
+	ldrh	r2, [r2]
+	ldrh	r1, [ip]
+	subs	r2, r2, #1
+	subs	r2, r2, r1
+	sxth	r2, r2
+	cmp	r3, r2
+	bgt	.L679
+	ldr	r2, [r6, #4]
+	adds	r1, r1, #1
+	strh	r1, [ip]	@ movhi
+	str	r2, [r0, r3, lsl #2]
+	ldr	r2, .L749+16
+	b	.L744
+.L700:
+	add	lr, r0, r1, lsl #2
+	adds	r2, r2, #1
+	ldr	r4, [lr, #4]
+	add	lr, ip, r1, lsl #1
+	ldrh	lr, [lr, #2]
+	str	r4, [r0, r1, lsl #2]
+	strh	lr, [ip, r1, lsl #1]	@ movhi
+	b	.L699
+.L697:
+	subs	r3, r3, #1
+	sxth	r3, r3
+	b	.L696
+.L680:
+	ldr	r8, .L749+40
+	movw	r2, #65535
+	ldrh	r1, [r8]
+	cmp	r1, r2
+	bne	.L703
+.L745:
+	strh	r5, [r8]	@ movhi
+	str	r3, [r8, #8]
+	b	.L679
+.L703:
+	ldrh	r0, [r8, #4]
+	cmp	r0, r2
+	beq	.L704
 	movs	r1, #1
-	mov	r0, r7
 	bl	FtlFreeSysBlkQueueIn
-	movs	r3, #0
-	str	r3, [r4, #32]
-.L728:
-	ldr	r3, .L739
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r3]
+.L704:
+	ldr	r3, [r6, #4]
+	ldr	r2, [r8, #8]
 	cmp	r2, r3
-	bcc	.L735
-	mov	r0, r4
-	bl	ftl_map_blk_alloc_new_blk
-.L735:
+	bcs	.L705
+	ldrh	r2, [r8]
+	strh	r2, [r8, #4]	@ movhi
+	b	.L745
+.L705:
+	strh	r5, [r8, #4]	@ movhi
+	b	.L679
+.L708:
+	ldr	r3, .L749+24
+	ldr	r2, [r3]
+	ldrh	r3, [r2]
+	cbz	r3, .L710
+.L713:
+	ldr	r3, .L749+16
+	ldr	r4, [r3]
+	ldrh	r2, [r4]
+	cmp	r2, #0
+	beq	.L711
+.L712:
+	ldr	r3, .L749+28
+	ldrh	r2, [r3]
+	ldr	r3, .L749+32
+	ldr	r3, [r3]
+	cmp	r2, r3
+	bls	.L743
+	movw	r2, #1388
+	ldr	r1, .L749
+	ldr	r0, .L749+4
+	bl	printf
+.L743:
 	movs	r0, #0
-	add	sp, sp, #8
+	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L734:
-	ldr	r3, [sp]
-	uxth	r8, r6
-	ldr	r2, [r3, r8, lsl #2]
-	cmp	r7, r2, lsr #10
-	bne	.L731
-	ldr	r3, [fp]
-	str	r2, [r5, #4]
-	movs	r2, #1
-	mov	r1, r2
-	ldr	r0, .L739+4
-	str	r3, [r5, #8]
-	ldr	r3, .L739+8
-	ldr	r3, [r3]
-	str	r3, [r5, #12]
-	str	r3, [sp, #4]
-	bl	FlashReadPages
-	ldr	r3, [sp, #4]
-	ldrh	r3, [r3, #8]
-	cmp	r3, r10
-	beq	.L732
-	movw	r2, #613
-	ldr	r1, .L739+12
-	ldr	r0, .L739+16
-	bl	printf
-.L732:
-	ldr	r3, [r5]
+.L710:
+	ldr	r1, .L749+28
+	ldrh	r1, [r1]
+	cmp	r1, #0
+	beq	.L713
+	ldr	r5, .L749+32
+	ldr	r0, [r5]
+.L714:
+	sxth	r1, r3
+	cmp	r1, r0
+	bcs	.L713
+	ldrh	r4, [r2, r1, lsl #1]
 	adds	r3, r3, #1
-	bne	.L733
-	ldr	r2, [sp]
-	movs	r3, #0
-	str	r3, [r2, r8, lsl #2]
-.L731:
-	adds	r6, r6, #1
-	b	.L730
-.L733:
-	ldr	r2, [r5, #8]
-	mov	r1, r8
-	mov	r0, r4
-	bl	FtlMapWritePage
-	b	.L731
-.L740:
+	cmp	r4, #0
+	beq	.L714
+	ldr	r3, .L749+36
+	movs	r6, #0
+	ldr	r0, [r3]
+	mov	r3, r1
+.L715:
+	ldr	r4, [r5]
+	cmp	r3, r4
+	bcs	.L713
+	ldrh	r7, [r2, r3, lsl #1]
+	subs	r4, r3, r1
+	strh	r7, [r2, r4, lsl #1]	@ movhi
+	ldr	r7, [r0, r3, lsl #2]
+	str	r7, [r0, r4, lsl #2]
+	strh	r6, [r2, r3, lsl #1]	@ movhi
+	adds	r3, r3, #1
+	sxth	r3, r3
+	b	.L715
+.L711:
+	ldr	r3, .L749+12
+	ldrh	r3, [r3]
+	cmp	r3, #0
+	beq	.L712
+	ldr	r5, .L749+20
+	ldrh	r1, [r5]
+.L720:
+	sxth	r3, r2
+	cmp	r3, r1
+	mov	r6, r3
+	bge	.L712
+	ldrh	r0, [r4, r3, lsl #1]
+	adds	r2, r2, #1
+	cmp	r0, #0
+	beq	.L720
+	ldr	r2, .L749+8
+	movs	r0, #0
+	ldr	r2, [r2]
+.L721:
+	ldrh	r1, [r5]
+	cmp	r3, r1
+	bge	.L712
+	ldrh	r7, [r4, r3, lsl #1]
+	subs	r1, r3, r6
+	strh	r7, [r4, r1, lsl #1]	@ movhi
+	ldr	r7, [r2, r3, lsl #2]
+	str	r7, [r2, r1, lsl #2]
+	adds	r1, r3, #1
+	strh	r0, [r4, r3, lsl #1]	@ movhi
+	sxth	r3, r1
+	b	.L721
+.L750:
 	.align	2
-.L739:
-	.word	.LANCHOR20
-	.word	.LANCHOR106
-	.word	.LANCHOR108
-	.word	.LANCHOR143
+.L749:
+	.word	.LANCHOR149
 	.word	.LC1
-	.word	.LANCHOR123
-	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
-	.section	.text.flush_l2p_region,"ax",%progbits
+	.word	.LANCHOR132
+	.word	.LANCHOR35
+	.word	.LANCHOR36
+	.word	.LANCHOR27
+	.word	.LANCHOR129
+	.word	.LANCHOR141
+	.word	.LANCHOR30
+	.word	.LANCHOR135
+	.word	.LANCHOR79
+	.size	FtlScanSysBlk, .-FtlScanSysBlk
+	.section	.text.FtlLoadBbt,"ax",%progbits
 	.align	1
-	.global	flush_l2p_region
+	.global	FtlLoadBbt
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flush_l2p_region, %function
-flush_l2p_region:
+	.type	FtlLoadBbt, %function
+FtlLoadBbt:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	movs	r4, #12
-	ldr	r5, .L742
-	muls	r4, r0, r4
-	ldr	r0, .L742+4
-	ldr	r3, [r5]
-	adds	r2, r3, r4
-	ldrh	r1, [r3, r4]
-	ldr	r2, [r2, #8]
-	bl	FtlMapWritePage
-	ldr	r3, [r5]
-	movs	r0, #0
-	add	r4, r4, r3
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	ldr	r8, .L780+40
+	ldr	r4, .L780
+	ldr	r3, [r8]
+	ldr	r7, .L780+4
+	mov	r10, r4
+	str	r3, [r4, #8]
+	ldr	r3, .L780+8
+	ldr	r6, [r3]
+	str	r6, [r4, #12]
+	bl	FtlBbtMemInit
+	ldrh	r5, [r7]
+	subs	r5, r5, #1
+	uxth	r5, r5
+.L752:
+	ldrh	r3, [r7]
+	subs	r3, r3, #15
+	cmp	r3, r5
+	bgt	.L755
+	lsls	r3, r5, #10
+	movs	r2, #1
+	mov	r1, r2
+	mov	r0, r10
+	str	r3, [r4, #4]
+	bl	FlashReadPages
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	bne	.L753
 	ldr	r3, [r4, #4]
-	bic	r3, r3, #-2147483648
+	movs	r2, #1
+	mov	r1, r2
+	mov	r0, r10
+	adds	r3, r3, #1
 	str	r3, [r4, #4]
-	pop	{r3, r4, r5, pc}
-.L743:
-	.align	2
-.L742:
-	.word	.LANCHOR55
-	.word	.LANCHOR144
-	.size	flush_l2p_region, .-flush_l2p_region
-	.section	.text.log2phys,"ax",%progbits
-	.align	1
-	.global	log2phys
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	log2phys, %function
-log2phys:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L758
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r7, r1
-	mov	r10, r2
-	ldrh	r4, [r3]
-	adds	r3, r4, #7
-	movs	r4, #1
-	lsr	r8, r0, r3
-	lsls	r4, r4, r3
-	ldr	r3, .L758+4
-	subs	r4, r4, #1
-	uxth	r8, r8
-	ands	r4, r4, r0
-	ldr	r3, [r3]
-	uxth	r4, r4
-	cmp	r0, r3
-	bcc	.L745
-	mov	r2, #808
-	ldr	r1, .L758+8
-	ldr	r0, .L758+12
-	bl	printf
-.L745:
-	ldr	r6, .L758+16
-	mov	fp, #12
-	ldr	r3, .L758+20
-	ldr	r1, [r6]
-	ldrh	r2, [r3]
-	movs	r3, #0
-.L746:
-	uxth	r5, r3
-	cmp	r5, r2
-	bcc	.L751
-	bl	select_l2p_ram_region
-	mul	fp, fp, r0
-	ldr	r3, [r6]
-	mov	r5, r0
-	ldrh	r1, [r3, fp]
-	add	r2, r3, fp
-	movw	r3, #65535
-	cmp	r1, r3
-	beq	.L752
-	ldr	r3, [r2, #4]
-	cmp	r3, #0
-	bge	.L752
-	bl	flush_l2p_region
-.L752:
-	mov	r1, r5
-	mov	r0, r8
-	bl	load_l2p_region
-	b	.L747
-.L751:
+	bl	FlashReadPages
+.L753:
+	ldr	r3, [r4]
 	adds	r3, r3, #1
-	mla	r0, fp, r3, r1
-	ldrh	r0, [r0, #-12]
-	cmp	r0, r8
-	bne	.L746
-.L747:
-	ldr	r2, [r6]
-	movs	r3, #12
-	mla	r3, r3, r5, r2
-	cmp	r10, #0
-	bne	.L748
-	ldr	r3, [r3, #8]
-	ldr	r3, [r3, r4, lsl #2]
-	str	r3, [r7]
-.L749:
-	ldr	r2, [r6]
-	movs	r3, #12
-	mla	r5, r3, r5, r2
-	ldr	r3, [r5, #4]
-	adds	r2, r3, #1
-	beq	.L755
+	beq	.L754
+	ldrh	r2, [r6]
+	movw	r3, #61649
+	cmp	r2, r3
+	bne	.L754
+	ldr	r3, .L780+12
+	ldr	r2, [r6, #4]
+	strh	r5, [r3]	@ movhi
+	str	r2, [r3, #8]
+	ldrh	r2, [r6, #8]
+	strh	r2, [r3, #4]	@ movhi
+.L755:
+	ldr	r5, .L780+12
+	movw	r2, #65535
+	ldrh	r3, [r5]
+	cmp	r3, r2
+	beq	.L769
+	ldrh	r3, [r5, #4]
+	cmp	r3, r2
+	beq	.L759
+	lsls	r3, r3, #10
+	movs	r2, #1
+	mov	r1, r2
+	ldr	r0, .L780
+	str	r3, [r4, #4]
+	bl	FlashReadPages
+	ldr	r3, [r4]
 	adds	r3, r3, #1
-	str	r3, [r5, #4]
-.L755:
-	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L748:
-	ldr	r1, [r7]
-	ldr	r2, [r3, #8]
-	str	r1, [r2, r4, lsl #2]
-	ldr	r2, [r3, #4]
-	orr	r2, r2, #-2147483648
-	str	r2, [r3, #4]
-	ldr	r3, .L758+24
-	strh	r8, [r3]	@ movhi
-	b	.L749
+	beq	.L759
+	ldrh	r2, [r6]
+	movw	r3, #61649
+	cmp	r2, r3
+	bne	.L759
+	ldr	r3, [r6, #4]
+	ldr	r2, [r5, #8]
+	cmp	r3, r2
+	bls	.L759
+	ldrh	r2, [r5, #4]
+	str	r3, [r5, #8]
+	ldrh	r3, [r6, #8]
+	strh	r2, [r5]	@ movhi
+	strh	r3, [r5, #4]	@ movhi
 .L759:
+	ldr	r10, .L780
+	movs	r1, #1
+	ldrh	r0, [r5]
+	bl	FtlGetLastWrittenPage
+	sxth	r7, r0
+	adds	r0, r0, #1
+	strh	r0, [r5, #2]	@ movhi
+.L761:
+	cmp	r7, #0
+	bge	.L764
+	movs	r2, #253
+	ldr	r1, .L780+16
+	ldr	r0, .L780+20
+	bl	printf
+.L763:
+	ldrh	r3, [r6, #10]
+	ldrh	r0, [r6, #12]
+	strh	r3, [r5, #6]	@ movhi
+	movw	r3, #65535
+	cmp	r0, r3
+	beq	.L766
+	ldr	r3, .L780+24
+	ldr	r2, [r3]
+	cmp	r0, r2
+	beq	.L766
+	ldr	r3, .L780+28
+	ldrh	r3, [r3]
+	lsrs	r3, r3, #2
+	cmp	r2, r3
+	bcs	.L766
+	cmp	r0, r3
+	bcs	.L766
+	bl	FtlSysBlkNumInit
+.L766:
+	ldr	r6, .L780+32
+	movs	r5, #0
+	ldr	r7, .L780+36
+	ldr	r8, .L780+44
+.L767:
+	ldrh	r3, [r7]
+	cmp	r5, r3
+	bcc	.L768
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L754:
+	subs	r5, r5, #1
+	uxth	r5, r5
+	b	.L752
+.L764:
+	ldrh	r3, [r5]
+	movs	r2, #1
+	mov	r1, r2
+	mov	r0, r10
+	orr	r3, r7, r3, lsl #10
+	str	r3, [r4, #4]
+	ldr	r3, [r8]
+	str	r3, [r4, #8]
+	bl	FlashReadPages
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	beq	.L762
+	ldrh	r2, [r6]
+	movw	r3, #61649
+	cmp	r2, r3
+	beq	.L763
+.L762:
+	subs	r7, r7, #1
+	sxth	r7, r7
+	b	.L761
+.L768:
+	ldrh	r2, [r8]
+	ldr	r1, [r4, #8]
+	ldr	r0, [r6, #4]!
+	lsls	r2, r2, #2
+	mla	r1, r5, r2, r1
+	adds	r5, r5, #1
+	bl	ftl_memcpy
+	b	.L767
+.L769:
+	mov	r0, #-1
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L781:
 	.align	2
-.L758:
-	.word	.LANCHOR22
-	.word	.LANCHOR61
-	.word	.LANCHOR145
+.L780:
+	.word	.LANCHOR148
+	.word	.LANCHOR17
+	.word	.LANCHOR123
+	.word	.LANCHOR37
+	.word	.LANCHOR150
 	.word	.LC1
-	.word	.LANCHOR55
-	.word	.LANCHOR33
-	.word	.LANCHOR56
-	.size	log2phys, .-log2phys
-	.section	.text.FtlReUsePrevPpa,"ax",%progbits
+	.word	.LANCHOR2
+	.word	.LANCHOR6
+	.word	.LANCHOR37+24
+	.word	.LANCHOR10
+	.word	.LANCHOR115
+	.word	.LANCHOR137
+	.size	FtlLoadBbt, .-FtlLoadBbt
+	.section	.text.FtlLoadSysInfo,"ax",%progbits
 	.align	1
-	.global	FtlReUsePrevPpa
+	.global	FtlLoadSysInfo
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlReUsePrevPpa, %function
-FtlReUsePrevPpa:
+	.type	FtlLoadSysInfo, %function
+FtlLoadSysInfo:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	mov	r6, r0
-	ldr	r5, .L770
-	ubfx	r0, r1, #10, #16
-	str	r1, [sp, #4]
-	bl	P2V_block_in_plane
-	ldr	r2, [r5]
-	mov	r7, r0
-	ldrh	r3, [r2, r0, lsl #1]
-	cbnz	r3, .L761
-	ldr	r2, .L770+4
-	ldr	r4, [r2]
-	cmp	r4, #0
-	beq	.L762
-	ldr	r2, .L770+8
-	movw	lr, #65535
-	ldr	ip, .L770+24
-	ldr	r0, .L770+12
-	ldr	r2, [r2]
-	ldrh	r1, [r0]
-	mov	r8, r0
-	subs	r4, r4, r2
-	asrs	r4, r4, #1
-	mul	r4, ip, r4
-	mov	ip, #6
-	uxth	r4, r4
-.L763:
-	uxth	r0, r3
-	cmp	r1, r0
-	bls	.L762
-	cmp	r4, r7
-	bne	.L764
-	mov	r1, r4
-	ldr	r0, .L770+4
-	bl	List_remove_node
-	ldrh	r3, [r8]
-	cbnz	r3, .L765
-	mov	r2, #1688
-	ldr	r1, .L770+16
-	ldr	r0, .L770+20
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r1, #0
+	ldr	r8, .L803+136
+	ldr	r5, .L803
+	ldr	r3, [r8]
+	ldr	r4, .L803+4
+	ldr	r10, .L803+140
+	ldrh	r2, [r5]
+	ldr	r7, .L803+8
+	str	r3, [r4, #8]
+	ldr	r6, .L803+12
+	ldr	r3, [r10]
+	lsls	r2, r2, #1
+	ldr	r0, [r7]
+	str	r3, [r4, #12]
+	bl	ftl_memset
+	ldrh	r0, [r6]
+	movw	r3, #65535
+	str	r7, [sp]
+	cmp	r0, r3
+	bne	.L783
+.L791:
+	mov	r0, #-1
+.L782:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L783:
+	movs	r1, #1
+	mov	fp, r4
+	bl	FtlGetLastWrittenPage
+	ldr	r3, .L803+16
+	sxth	r7, r0
+	adds	r0, r0, #1
+	strh	r0, [r6, #2]	@ movhi
+.L785:
+	cmp	r7, #0
+	bge	.L788
+	mov	r2, #1448
+	ldr	r1, .L803+20
+	ldr	r0, .L803+24
 	bl	printf
-.L765:
-	ldrh	r3, [r8]
-	mov	r0, r4
-	subs	r3, r3, #1
-	strh	r3, [r8]	@ movhi
-	bl	INSERT_DATA_LIST
-	ldr	r2, [r5]
-	ldrh	r3, [r2, r7, lsl #1]
-.L761:
-	adds	r3, r3, #1
-	strh	r3, [r2, r7, lsl #1]	@ movhi
-	b	.L762
-.L764:
-	mul	r4, ip, r4
-	adds	r3, r3, #1
-	ldrh	r4, [r2, r4]
-	cmp	r4, lr
-	bne	.L763
-.L762:
+.L787:
+	ldr	r2, .L803+28
+	ldrh	r3, [r5]
+	ldrh	r2, [r2]
+	adds	r3, r3, #24
+	cmp	r2, r3, lsl #1
+	bcs	.L790
+	movw	r2, #1450
+	ldr	r1, .L803+20
+	ldr	r0, .L803+24
+	bl	printf
+.L790:
+	ldr	r7, .L803+32
+	movs	r2, #48
+	ldr	r1, [r4, #8]
+	mov	r0, r7
+	bl	ftl_memcpy
+	ldrh	r2, [r5]
+	ldr	r1, [r4, #8]
+	ldr	r3, [sp]
+	lsls	r2, r2, #1
+	adds	r1, r1, #48
+	ldr	r0, [r3]
+	bl	ftl_memcpy
+	ldrh	r1, [r5]
+	ldr	r3, [r4, #8]
+	mov	r4, r7
+	lsrs	r2, r1, #3
+	adds	r1, r1, #24
+	lsls	r1, r1, #1
+	adds	r2, r2, #4
+	bic	r1, r1, #3
+	add	r1, r1, r3
+	ldr	r3, .L803+36
+	ldr	r0, [r3]
+	bl	ftl_memcpy
+	ldr	r2, [r7]
+	ldr	r3, .L803+16
+	cmp	r2, r3
+	bne	.L791
+	ldr	r3, .L803+40
+	ldrb	r2, [r7, #10]	@ zero_extendqisi2
+	ldrh	r5, [r7, #8]
+	ldrh	r3, [r3]
+	strh	r5, [r6, #6]	@ movhi
+	cmp	r2, r3
+	bne	.L791
+	ldr	r3, .L803+44
+	ldr	r2, .L803+48
+	str	r5, [r3]
+	ldr	r3, .L803+52
+	ldrh	r3, [r3]
+	muls	r3, r5, r3
+	str	r3, [r2]
+	ldr	r2, .L803+56
+	ldrh	r2, [r2]
+	muls	r3, r2, r3
+	ldr	r2, .L803+60
+	str	r3, [r2]
+	ldr	r3, .L803+64
+	ldr	r6, [r3]
+	ldr	r3, .L803+68
+	ldrh	r0, [r3, #6]
+	ldr	r3, .L803+72
+	subs	r0, r6, r0
+	ldrh	r1, [r3]
+	subs	r0, r0, r5
+	bl	__aeabi_uidiv
+	ldr	r3, .L803+76
+	cmp	r5, r6
+	strh	r0, [r3]	@ movhi
+	bls	.L792
+	mov	r2, #1472
+	ldr	r1, .L803+20
+	ldr	r0, .L803+24
+	bl	printf
+.L792:
+	ldrh	r2, [r4, #16]
+	ldr	r3, .L803+80
+	ldrh	ip, [r4, #14]
+	ldr	r7, .L803+84
+	lsrs	r1, r2, #6
+	and	r2, r2, #63
+	strb	r2, [r3, #6]
+	ldrb	r2, [r4, #11]	@ zero_extendqisi2
+	strh	r1, [r3, #2]	@ movhi
+	ldr	r1, .L803+88
+	strb	r2, [r3, #8]
+	ldrh	r2, [r4, #18]
+	strh	ip, [r3]	@ movhi
+	movw	r3, #65535
+	strh	r3, [r7]	@ movhi
+	movs	r3, #0
+	strh	r2, [r1]	@ movhi
+	ldrh	r2, [r4, #20]
+	strh	r3, [r7, #2]	@ movhi
+	strb	r3, [r7, #6]
+	strb	r3, [r7, #8]
+	lsrs	r5, r2, #6
+	and	r2, r2, #63
+	strb	r2, [r1, #6]
+	ldrb	r2, [r4, #12]	@ zero_extendqisi2
+	strh	r5, [r1, #2]	@ movhi
+	ldrh	r5, [r4, #22]
+	strb	r2, [r1, #8]
+	ldr	r2, .L803+92
+	strh	r5, [r2]	@ movhi
+	ldrh	r5, [r4, #24]
+	lsrs	r6, r5, #6
+	and	r5, r5, #63
+	strb	r5, [r2, #6]
+	ldrb	r5, [r4, #13]	@ zero_extendqisi2
+	strh	r6, [r2, #2]	@ movhi
+	ldr	r6, [r4, #32]
+	strb	r5, [r2, #8]
+	ldr	r5, .L803+96
+	str	r3, [r5]
+	ldr	r5, .L803+100
+	str	r3, [r5]
+	ldr	r5, .L803+104
+	str	r3, [r5]
+	ldr	r5, .L803+108
+	str	r3, [r5]
+	ldr	r5, .L803+112
+	str	r6, [r5]
+	mov	r6, r1
+	ldr	r5, .L803+116
+	str	r3, [r5]
+	ldr	r5, .L803+120
+	str	r3, [r5]
+	ldr	r5, .L803+124
+	ldr	lr, [r4, #40]
+	str	r3, [r5]
+	ldr	r3, .L803+128
+	ldr	r5, [r3]
+	cmp	lr, r5
+	mov	r5, r2
+	it	hi
+	strhi	lr, [r3]
+	ldr	r3, .L803+132
+	ldr	r2, [r4, #36]
+	ldr	r1, [r3]
+	cmp	r2, r1
+	it	hi
+	strhi	r2, [r3]
+	movw	r3, #65535
+	cmp	ip, r3
+	beq	.L795
+	ldr	r0, .L803+80
+	bl	make_superblock
+.L795:
+	ldrh	r2, [r6]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L796
+	ldr	r0, .L803+88
+	bl	make_superblock
+.L796:
+	ldrh	r2, [r5]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L797
+	ldr	r0, .L803+92
+	bl	make_superblock
+.L797:
+	ldrh	r2, [r7]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L798
+	ldr	r0, .L803+84
+	bl	make_superblock
+.L798:
+	movs	r0, #0
+	b	.L782
+.L788:
+	ldrh	r2, [r6]
+	mov	r0, fp
+	str	r3, [sp, #4]
+	orr	r2, r7, r2, lsl #10
+	str	r2, [r4, #4]
+	ldr	r2, [r8]
+	str	r2, [r4, #8]
 	movs	r2, #1
-	add	r1, sp, #4
-	mov	r0, r6
-	bl	log2phys
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, pc}
-.L771:
+	mov	r1, r2
+	bl	FlashReadPages
+	ldr	r2, [r4]
+	ldr	r3, [sp, #4]
+	adds	r2, r2, #1
+	beq	.L786
+	ldr	r2, [r8]
+	ldr	r2, [r2]
+	cmp	r2, r3
+	bne	.L786
+	ldr	r2, [r10]
+	ldrh	r1, [r2]
+	movw	r2, #61604
+	cmp	r1, r2
+	beq	.L787
+.L786:
+	subs	r7, r7, #1
+	sxth	r7, r7
+	b	.L785
+.L804:
 	.align	2
-.L770:
+.L803:
+	.word	.LANCHOR5
+	.word	.LANCHOR148
 	.word	.LANCHOR42
-	.word	.LANCHOR47
-	.word	.LANCHOR40
-	.word	.LANCHOR48
-	.word	.LANCHOR146
+	.word	.LANCHOR79
+	.word	1179929683
+	.word	.LANCHOR151
 	.word	.LC1
-	.word	-1431655765
-	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
-	.section	.text.ftl_scan_all_data,"ax",%progbits
+	.word	.LANCHOR23
+	.word	.LANCHOR39
+	.word	.LANCHOR1
+	.word	.LANCHOR10
+	.word	.LANCHOR152
+	.word	.LANCHOR61
+	.word	.LANCHOR19
+	.word	.LANCHOR12
+	.word	.LANCHOR34
+	.word	.LANCHOR7
+	.word	.LANCHOR37
+	.word	.LANCHOR3
+	.word	.LANCHOR78
+	.word	.LANCHOR51
+	.word	.LANCHOR80
+	.word	.LANCHOR52
+	.word	.LANCHOR53
+	.word	.LANCHOR67
+	.word	.LANCHOR64
+	.word	.LANCHOR62
+	.word	.LANCHOR66
+	.word	.LANCHOR72
+	.word	.LANCHOR73
+	.word	.LANCHOR76
+	.word	.LANCHOR65
+	.word	.LANCHOR70
+	.word	.LANCHOR71
+	.word	.LANCHOR115
+	.word	.LANCHOR123
+	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
+	.section	.text.FlashProgPages,"ax",%progbits
 	.align	1
-	.global	ftl_scan_all_data
+	.global	FlashProgPages
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_scan_all_data, %function
-ftl_scan_all_data:
-	@ args = 0, pretend = 0, frame = 8
+	.type	FlashProgPages, %function
+FlashProgPages:
+	@ args = 0, pretend = 0, frame = 48
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, lr}
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #48
+	str	r3, [sp, #12]
+	mov	r10, r1
+	mov	r4, r0
+	mov	r5, r0
+	ldr	r3, .L843
+	mov	r8, #0
+	ldr	fp, .L843+48
+	str	r2, [sp, #8]
+	ldrh	r3, [r3, #12]
+	str	r3, [sp]
+	lsls	r3, r3, #3
+	str	r3, [sp, #4]
+.L806:
+	cmp	r8, r10
+	bne	.L818
+	ldr	r3, [sp, #12]
+	cmp	r3, #0
+	beq	.L836
+	ldr	r6, .L843+4
 	movs	r5, #0
-	ldr	r7, .L786
-	sub	sp, sp, #32
+.L820:
+	cmp	r8, r5
+	beq	.L836
+	ldr	r7, .L843+8
 	movs	r1, #0
-	ldr	r8, .L786+24
-	ldr	r0, .L786+4
-	bl	printf
-.L773:
+	ldr	r2, [r6]
+	add	r0, sp, #28
 	ldr	r3, [r7]
-	cmp	r5, r3
-	bcc	.L779
-	add	sp, sp, #32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, pc}
-.L779:
-	movs	r2, #0
-	add	r1, sp, #28
-	mov	r0, r5
-	bl	log2phys
-	ubfx	r3, r5, #0, #11
-	cbnz	r3, .L774
-	ldr	r2, [sp, #28]
-	mov	r1, r5
-	mov	r0, r8
-	bl	printf
-.L774:
-	ldr	r3, [sp, #28]
-	adds	r2, r3, #1
-	beq	.L776
-	ldr	r4, .L786+8
-	movs	r2, #0
+	str	r1, [r2]
+	str	r1, [r3]
+	ldr	r1, [r4, #4]
+	str	r2, [sp, #36]
+	ldr	r2, [sp, #8]
+	str	r1, [sp, #32]
 	movs	r1, #1
-	str	r3, [r4, #4]
-	mov	r0, r4
-	ldr	r3, .L786+12
-	str	r5, [r4, #16]
-	str	r2, [r4]
-	ldr	r3, [r3]
-	str	r3, [r4, #8]
-	ldr	r3, .L786+16
-	ldr	r6, [r3]
-	str	r6, [r4, #12]
+	str	r3, [sp, #40]
 	bl	FlashReadPages
-	ldr	r3, [r4]
-	cmp	r3, #256
-	beq	.L777
-	adds	r3, r3, #1
-	beq	.L777
-	ldr	r3, [r6, #8]
-	cmp	r5, r3
-	beq	.L776
-.L777:
-	ldr	r2, [r4, #8]
+	ldr	r10, [sp, #28]
+	cmp	r10, #-1
+	bne	.L821
+	ldr	r1, [r4, #4]
+	ldr	r0, .L843+12
+	bl	printf
+	str	r10, [r4]
+.L821:
 	ldr	r3, [r4, #12]
-	ldr	r0, .L786+20
-	ldr	r1, [r2, #4]
-	str	r1, [sp, #16]
-	mov	r1, r5
-	ldr	r2, [r2]
-	str	r2, [sp, #12]
-	ldr	r2, [r3, #12]
-	str	r2, [sp, #8]
-	ldr	r2, [r3, #8]
-	str	r2, [sp, #4]
-	ldr	r2, [r3, #4]
-	str	r2, [sp]
-	ldr	r2, [r4, #4]
+	cbz	r3, .L822
+	ldr	r2, [r3]
+	ldr	r3, [r7]
+	ldr	r3, [r3]
+	cmp	r2, r3
+	beq	.L822
+	ldr	r1, [r4, #4]
+	ldr	r0, .L843+16
+	bl	printf
+	mov	r3, #-1
+	str	r3, [r4]
+.L822:
+	ldr	r3, [r4, #8]
+	cbz	r3, .L823
+	ldr	r2, [r3]
+	ldr	r3, [r6]
 	ldr	r3, [r3]
+	cmp	r2, r3
+	beq	.L823
+	ldr	r1, [r4, #4]
+	ldr	r0, .L843+20
 	bl	printf
-.L776:
+	mov	r3, #-1
+	str	r3, [r4]
+.L823:
 	adds	r5, r5, #1
-	b	.L773
-.L787:
+	adds	r4, r4, #20
+	b	.L820
+.L818:
+	ldr	r3, [r5, #8]
+	cbz	r3, .L807
+	ldr	r3, [r5, #12]
+	cbnz	r3, .L808
+.L807:
+	movs	r2, #130
+	ldr	r1, .L843+24
+	ldr	r0, .L843+28
+	bl	printf
+.L808:
+	add	r2, sp, #20
+	add	r1, sp, #24
+	ldr	r0, [r5, #4]
+	bl	l2p_addr_tran.isra.0
+	ldr	r6, [sp, #20]
+	cbnz	r6, .L809
+	ldr	r3, [sp, #24]
+	ldr	r2, [sp, #4]
+	cmp	r2, r3
+	bls	.L809
+	ldr	r5, .L843+24
+	ldr	r7, .L843+32
+	b	.L842
+.L811:
+	mov	r3, #-1
+	ldr	r2, [r4, #-16]
+	str	r3, [r4, #-20]
+	mov	r1, r5
+	mov	r0, r7
+	adds	r6, r6, #1
+	bl	printf
+	movs	r3, #16
+	movs	r2, #4
+	ldr	r1, [r4, #-12]
+	ldr	r0, .L843+36
+	bl	rknand_print_hex
+	movs	r3, #4
+	ldr	r1, [r4, #-8]
+	mov	r2, r3
+	ldr	r0, .L843+40
+	bl	rknand_print_hex
+.L842:
+	cmp	r6, r10
+	add	r4, r4, #20
+	bne	.L811
+.L836:
+	movs	r0, #0
+	add	sp, sp, #48
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L809:
+	ldr	r1, [r5, #8]
+	lsls	r3, r1, #26
+	beq	.L825
+	ldr	r3, .L843+4
+	ldr	r6, [r3]
+	cmp	r1, r6
+	beq	.L812
+	ldr	r3, .L843+44
+	mov	r0, r6
+	ldrh	r2, [r3]
+	lsls	r2, r2, #9
+	bl	ftl_memcpy
+.L812:
+	ldr	r3, [r5, #12]
+	mov	r2, r6
+	ldr	r1, [sp, #24]
+	ldrb	r0, [sp, #20]	@ zero_extendqisi2
+	ldr	r7, [fp, #8]
+	blx	r7
+	cbnz	r0, .L813
+	str	r0, [r5]
+.L814:
+	ldr	r3, .L843
+	ldrh	r3, [r3, #14]
+	cmp	r3, #4
+	bne	.L816
+	ldr	r0, [sp]
+	add	r2, r6, #2048
+	ldr	r3, [r5, #12]
+	ldr	r1, [sp, #24]
+	ldr	r6, [fp, #8]
+	adds	r3, r3, #8
+	add	r1, r1, r0
+	ldrb	r0, [sp, #20]	@ zero_extendqisi2
+	blx	r6
+	cbz	r0, .L816
+	mov	r3, #-1
+	str	r3, [r5]
+.L816:
+	add	r8, r8, #1
+	adds	r5, r5, #20
+	b	.L806
+.L825:
+	mov	r6, r1
+	b	.L812
+.L813:
+	mov	r3, #-1
+	str	r3, [r5]
+	b	.L814
+.L844:
 	.align	2
-.L786:
-	.word	.LANCHOR61
-	.word	.LC91
-	.word	.LANCHOR106
-	.word	.LANCHOR107
-	.word	.LANCHOR108
-	.word	.LC93
-	.word	.LC92
-	.size	ftl_scan_all_data, .-ftl_scan_all_data
-	.section	.text.FtlReadRefresh,"ax",%progbits
+.L843:
+	.word	.LANCHOR0
+	.word	.LANCHOR120
+	.word	.LANCHOR122
+	.word	.LC85
+	.word	.LC86
+	.word	.LC87
+	.word	.LANCHOR153
+	.word	.LC1
+	.word	.LC79
+	.word	.LC80
+	.word	.LC81
+	.word	.LANCHOR12
+	.word	.LANCHOR105
+	.size	FlashProgPages, .-FlashProgPages
+	.section	.text.FtlLowFormatEraseBlock,"ax",%progbits
 	.align	1
-	.global	FtlReadRefresh
+	.global	FtlLowFormatEraseBlock
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlReadRefresh, %function
-FtlReadRefresh:
-	@ args = 0, pretend = 0, frame = 88
+	.type	FtlLowFormatEraseBlock, %function
+FtlLowFormatEraseBlock:
+	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L801
-	push	{r4, r5, r6, lr}
-	sub	sp, sp, #88
-	mov	r4, r3
-	ldr	r0, [r3, #80]
-	cmp	r0, #0
-	beq	.L789
-	ldr	r6, .L801+4
-	ldr	r0, [r3, #84]
-	ldr	r1, [r6]
-	cmp	r0, r1
-	bcs	.L790
-	mov	r5, #2048
-.L795:
-	ldr	r0, [r4, #84]
-	ldr	r3, [r6]
-	cmp	r0, r3
-	bcs	.L792
-	movs	r2, #0
-	mov	r1, sp
-	bl	log2phys
-	ldr	r2, [sp]
-	ldr	r3, [r4, #84]
-	adds	r1, r2, #1
-	add	r3, r3, #1
-	str	r3, [r4, #84]
-	beq	.L793
-	str	r3, [sp, #20]
-	add	r0, sp, #88
-	ldr	r3, .L801+8
-	movs	r1, #1
-	str	r2, [sp, #8]
-	movs	r2, #0
-	str	r2, [r0, #-84]!
+	ldr	r3, .L888
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #32
+	ldr	r7, .L888+4
+	mov	r8, #0
+	mov	r6, r1
+	mov	r5, r8
+	str	r0, [r3]
+	mov	r4, r8
+	ldr	r3, .L888+8
+	mov	fp, #20
+	ldr	r10, [r7]
+	str	r0, [sp, #4]
+	ldrh	r3, [r3]
 	str	r3, [sp, #12]
-	add	r3, sp, #24
+	ldr	r3, .L888+12
+	ldr	r3, [r3]
 	str	r3, [sp, #16]
-	bl	FlashReadPages
-	ldr	r3, [sp, #4]
-	cmp	r3, #256
-	bne	.L792
-	ldr	r0, [sp]
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-	bl	FtlGcRefreshBlock
-.L792:
-	mov	r0, #-1
-.L788:
-	add	sp, sp, #88
-	@ sp needed
-	pop	{r4, r5, r6, pc}
-.L793:
-	subs	r5, r5, #1
-	bne	.L795
-	b	.L792
-.L790:
-	ldr	r2, .L801+12
-	movs	r0, #0
-	str	r0, [r3, #80]
-	str	r0, [r3, #84]
-	ldr	r2, [r2]
-	str	r2, [r3, #76]
-	b	.L788
-.L789:
-	ldr	r1, [r3, #76]
-	ldr	r3, .L801+12
-	ldr	r5, [r3]
-	add	r3, r5, #1048576
-	cmp	r1, r3
-	bhi	.L798
-	ldr	r3, .L801+16
-	ldr	r2, [r3]
-	mov	r3, #33554432
-	lsrs	r2, r2, #10
-	asrs	r3, r3, r2
-	add	r3, r3, r1
+	ldr	r3, .L888+16
+	ldr	r3, [r3]
+	str	r3, [sp, #20]
+	ldr	r3, .L888+20
+	ldrh	r3, [r3]
+	str	r3, [sp, #24]
+.L846:
+	ldr	r3, [sp, #12]
+	uxth	r2, r8
+	cmp	r3, r2
+	bhi	.L850
+	cmp	r5, #0
+	beq	.L845
+	mov	r0, r10
+	mov	r8, #0
+	mov	r10, #20
+	mov	r2, r5
+	movs	r1, #0
+	bl	FlashEraseBlocks
+.L853:
+	uxth	r3, r8
 	cmp	r5, r3
-	bhi	.L798
-	ldr	r3, .L801+20
-	ldrb	r3, [r3, #28]	@ zero_extendqisi2
-	cmp	r3, #0
-	bne	.L788
-.L798:
+	bhi	.L855
+	cmp	r6, #0
+	beq	.L871
+	ldr	r3, .L888+24
+	mov	r10, #1
+	ldrh	r3, [r3]
+	str	r3, [sp, #8]
+.L856:
+	movs	r7, #0
+.L865:
+	ldr	r3, .L888+8
+	mov	r8, #0
+	mov	r5, r8
+	ldrh	r3, [r3]
+	str	r3, [sp, #16]
+	ldr	r3, .L888+4
+	ldr	fp, [r3]
+	ldr	r3, .L888+28
+	ldr	r3, [r3]
+	str	r3, [sp, #20]
+	ldr	r3, .L888+12
+	ldr	r3, [r3]
+	str	r3, [sp, #24]
+	ldr	r3, .L888+20
+	ldrh	r3, [r3]
+	str	r3, [sp, #28]
+.L857:
+	ldr	r3, [sp, #16]
+	uxth	r2, r8
+	cmp	r3, r2
+	bhi	.L860
+	cbz	r5, .L845
+	mov	r0, fp
+	ldr	fp, .L888+4
 	movs	r3, #1
-	movs	r0, #0
-	str	r3, [r4, #80]
-	str	r0, [r4, #84]
-	str	r5, [r4, #76]
-	b	.L788
-.L802:
+	mov	r2, r10
+	mov	r1, r5
+	mov	r8, #0
+	bl	FlashProgPages
+	movs	r3, #20
+.L862:
+	uxth	r2, r8
+	cmp	r5, r2
+	bhi	.L864
+	adds	r7, r7, #1
+	ldr	r2, [sp, #8]
+	uxth	r3, r7
+	cmp	r2, r3
+	bhi	.L865
+	ldr	r8, .L888+4
+	movs	r7, #0
+	mov	fp, #20
+.L866:
+	uxth	r3, r7
+	cmp	r5, r3
+	bhi	.L868
+	ldr	r3, [sp, #4]
+	cmp	r3, #63
+	bls	.L869
+	cbz	r6, .L845
+.L869:
+	ldr	r3, .L888+4
+	mov	r2, r5
+	mov	r1, r10
+	ldr	r0, [r3]
+	bl	FlashEraseBlocks
+.L845:
+	mov	r0, r4
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L850:
+	mul	r2, fp, r8
+	movs	r3, #0
+	ldr	r1, [sp, #4]
+	str	r3, [r10, r2]
+	ldr	r3, .L888+32
+	ldrb	r0, [r3, r8]	@ zero_extendqisi2
+	bl	V2P_block
+	str	r0, [sp, #8]
+	cbz	r6, .L847
+	bl	IsBlkInVendorPart
+	cbnz	r0, .L848
+.L847:
+	ldr	r0, [sp, #8]
+	bl	FtlBbmIsBadBlock
+	cbnz	r0, .L849
+	ldr	r3, [sp, #8]
+	mla	r1, fp, r5, r10
+	lsls	r2, r3, #10
+	ldr	r3, [sp, #16]
+	str	r2, [r1, #4]
+	str	r3, [r1, #8]
+	ldr	r3, [sp, #24]
+	mul	r2, r3, r5
+	ldr	r3, [sp, #20]
+	adds	r5, r5, #1
+	uxth	r5, r5
+	bic	r2, r2, #3
+	add	r2, r2, r3
+	str	r2, [r1, #12]
+.L848:
+	add	r8, r8, #1
+	b	.L846
+.L849:
+	adds	r4, r4, #1
+	uxth	r4, r4
+	b	.L848
+.L855:
+	mul	r3, r10, r8
+	ldr	r2, [r7]
+	adds	r1, r2, r3
+	ldr	r3, [r2, r3]
+	adds	r3, r3, #1
+	bne	.L854
+	ldr	r0, [r1, #4]
+	adds	r4, r4, #1
+	uxth	r4, r4
+	ubfx	r0, r0, #10, #16
+	bl	FtlBbmMapBadBlock
+.L854:
+	add	r8, r8, #1
+	b	.L853
+.L871:
+	movs	r3, #2
+	mov	r10, r6
+	str	r3, [sp, #8]
+	b	.L856
+.L860:
+	movs	r3, #20
+	ldr	r1, [sp, #4]
+	mul	r2, r3, r8
+	movs	r3, #0
+	str	r3, [fp, r2]
+	ldr	r3, .L888+32
+	ldrb	r0, [r3, r8]	@ zero_extendqisi2
+	bl	V2P_block
+	str	r0, [sp, #12]
+	cbz	r6, .L858
+	bl	IsBlkInVendorPart
+	cbnz	r0, .L859
+.L858:
+	ldr	r0, [sp, #12]
+	bl	FtlBbmIsBadBlock
+	cbnz	r0, .L859
+	movs	r3, #20
+	mla	r1, r3, r5, fp
+	ldr	r3, [sp, #12]
+	add	r2, r7, r3, lsl #10
+	ldr	r3, [sp, #20]
+	str	r2, [r1, #4]
+	str	r3, [r1, #8]
+	ldr	r3, [sp, #28]
+	mul	r2, r3, r5
+	ldr	r3, [sp, #24]
+	adds	r5, r5, #1
+	uxth	r5, r5
+	bic	r2, r2, #3
+	add	r2, r2, r3
+	str	r2, [r1, #12]
+.L859:
+	add	r8, r8, #1
+	b	.L857
+.L864:
+	mul	r2, r3, r8
+	ldr	r1, [fp]
+	adds	r0, r1, r2
+	ldr	r2, [r1, r2]
+	cbz	r2, .L863
+	ldr	r0, [r0, #4]
+	adds	r4, r4, #1
+	str	r3, [sp, #12]
+	uxth	r4, r4
+	ubfx	r0, r0, #10, #16
+	bl	FtlBbmMapBadBlock
+	ldr	r3, [sp, #12]
+.L863:
+	add	r8, r8, #1
+	b	.L862
+.L868:
+	cbz	r6, .L867
+	mul	r3, fp, r7
+	ldr	r2, [r8]
+	adds	r1, r2, r3
+	ldr	r3, [r2, r3]
+	cbnz	r3, .L867
+	ldr	r0, [r1, #4]
+	movs	r1, #1
+	ubfx	r0, r0, #10, #16
+	bl	FtlFreeSysBlkQueueIn
+.L867:
+	adds	r7, r7, #1
+	b	.L866
+.L889:
 	.align	2
-.L801:
-	.word	.LANCHOR81
-	.word	.LANCHOR61
-	.word	ftl_temp_buf
-	.word	.LANCHOR62
-	.word	.LANCHOR76
-	.word	.LANCHOR39
-	.size	FtlReadRefresh, .-FtlReadRefresh
-	.section	.text.FtlMapBlkWriteDump_data,"ax",%progbits
+.L888:
+	.word	.LANCHOR111
+	.word	.LANCHOR106
+	.word	.LANCHOR3
+	.word	.LANCHOR119
+	.word	.LANCHOR124
+	.word	.LANCHOR24
+	.word	.LANCHOR20
+	.word	.LANCHOR118
+	.word	.LANCHOR13
+	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
+	.section	.text.Ftl_write_map_blk_to_last_page,"ax",%progbits
 	.align	1
-	.global	FtlMapBlkWriteDump_data
+	.global	Ftl_write_map_blk_to_last_page
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlMapBlkWriteDump_data, %function
-FtlMapBlkWriteDump_data:
+	.type	Ftl_write_map_blk_to_last_page, %function
+Ftl_write_map_blk_to_last_page:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, [r0, #36]
-	push	{r4, r5, r6, lr}
-	mov	r6, r0
-	cbz	r3, .L803
-	ldrh	r5, [r0, #6]
+	push	{r3, r4, r5, r6, r7, lr}
+	movw	r2, #65535
+	ldrh	r3, [r0]
+	mov	r4, r0
+	ldr	r5, [r0, #12]
+	cmp	r3, r2
+	bne	.L891
+	ldrh	r3, [r0, #8]
+	cbz	r3, .L892
+	movw	r2, #641
+	ldr	r1, .L900
+	ldr	r0, .L900+4
+	bl	printf
+.L892:
+	ldrh	r3, [r4, #8]
+	adds	r3, r3, #1
+	strh	r3, [r4, #8]	@ movhi
+	bl	FtlFreeSysBlkQueueOut
 	movs	r3, #0
-	ldr	r2, [r0, #24]
-	str	r3, [r0, #36]
-	subs	r5, r5, #1
-	ldr	r3, .L807
-	ldr	r1, .L807+4
-	uxth	r5, r5
-	ldr	r4, .L807+8
-	ldr	r2, [r2, r5, lsl #2]
-	ldr	r0, [r3]
-	ldr	r1, [r1]
-	str	r2, [r4, #4]
-	str	r0, [r4, #8]
-	str	r1, [r4, #12]
-	cbz	r2, .L805
-	movs	r2, #1
-	mov	r0, r4
-	mov	r1, r2
-	bl	FlashReadPages
-.L806:
-	ldr	r2, [r4, #8]
-	mov	r1, r5
-	mov	r0, r6
-	pop	{r4, r5, r6, lr}
-	b	FtlMapWritePage
-.L805:
-	ldr	r3, .L807+12
+	strh	r0, [r5]	@ movhi
+	strh	r3, [r4, #2]	@ movhi
+	strh	r3, [r4]	@ movhi
+	ldr	r3, [r4, #28]
+	adds	r3, r3, #1
+	str	r3, [r4, #28]
+.L893:
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, pc}
+.L891:
+	ldrh	r5, [r5, r3, lsl #1]
 	movs	r1, #255
+	ldrh	r3, [r0, #2]
+	ldr	r2, .L900+8
+	ldr	r7, .L900+12
+	ldr	r6, [r0, #24]
+	orr	r3, r3, r5, lsl #10
+	ldr	r0, [r7]
+	str	r3, [r2, #4]
+	ldr	r3, .L900+16
+	str	r0, [r2, #8]
+	ldr	r3, [r3]
+	str	r3, [r2, #12]
+	ldr	r2, [r4, #28]
+	str	r2, [r3, #4]
+	movw	r2, #64245
+	strh	r2, [r3, #8]	@ movhi
+	ldrh	r2, [r4, #4]
+	strh	r5, [r3, #2]	@ movhi
+	strh	r2, [r3]	@ movhi
+	ldr	r3, .L900+20
 	ldrh	r2, [r3]
+	lsls	r2, r2, #3
 	bl	ftl_memset
-	b	.L806
-.L803:
-	pop	{r4, r5, r6, pc}
-.L808:
+	ldrh	ip, [r4, #6]
+	movs	r3, #0
+	ldr	r1, [r7]
+	mov	r2, r3
+.L894:
+	uxth	r0, r3
+	cmp	ip, r0
+	bhi	.L896
+	movs	r2, #1
+	movs	r3, #0
+	mov	r1, r2
+	ldr	r0, .L900+8
+	bl	FlashProgPages
+	ldrh	r3, [r4, #2]
+	mov	r0, r4
+	adds	r3, r3, #1
+	strh	r3, [r4, #2]	@ movhi
+	bl	ftl_map_blk_gc
+	b	.L893
+.L896:
+	ldr	r0, [r6, r3, lsl #2]
+	cmp	r5, r0, lsr #10
+	bne	.L895
+	adds	r2, r2, #1
+	uxth	r2, r2
+	str	r3, [r1, r2, lsl #3]
+	add	r7, r1, r2, lsl #3
+	ldr	r0, [r6, r3, lsl #2]
+	str	r0, [r7, #4]
+.L895:
+	adds	r3, r3, #1
+	b	.L894
+.L901:
 	.align	2
-.L807:
+.L900:
+	.word	.LANCHOR154
+	.word	.LC1
+	.word	.LANCHOR148
+	.word	.LANCHOR115
+	.word	.LANCHOR123
+	.word	.LANCHOR20
+	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
+	.section	.text.FtlMapWritePage,"ax",%progbits
+	.align	1
+	.global	FtlMapWritePage
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlMapWritePage, %function
+FtlMapWritePage:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r0
+	ldr	r8, .L926+28
+	mov	r7, r1
+	movs	r6, #0
+	str	r2, [sp, #4]
+	mov	fp, r8
+.L903:
+	ldr	r2, .L926
+	ldr	r3, [r2]
+	adds	r3, r3, #1
+	str	r3, [r2]
+	ldrh	r3, [r8]
+	ldrh	r2, [r4, #2]
+	subs	r3, r3, #1
+	cmp	r2, r3
+	bge	.L904
+	ldrh	r2, [r4]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L905
+.L904:
+	mov	r0, r4
+	bl	Ftl_write_map_blk_to_last_page
+.L905:
+	ldrh	r2, [r4]
+	ldr	r3, [r4, #12]
+	ldrh	r3, [r3, r2, lsl #1]
+	cbnz	r3, .L906
+	movw	r2, #699
+	ldr	r1, .L926+4
+	ldr	r0, .L926+8
+	bl	printf
+.L906:
+	ldrh	r2, [r4]
+	ldrh	r3, [r4, #10]
+	cmp	r2, r3
+	bcc	.L907
+	mov	r2, #700
+	ldr	r1, .L926+4
+	ldr	r0, .L926+8
+	bl	printf
+.L907:
+	ldrh	r2, [r4]
+	movs	r1, #0
+	ldr	r3, [r4, #12]
+	ldr	r5, .L926+12
+	ldrh	r10, [r3, r2, lsl #1]
+	ldrh	r2, [r4, #2]
+	ldr	r3, [sp, #4]
+	orr	r2, r2, r10, lsl #10
+	str	r3, [r5, #8]
+	str	r2, [r5, #4]
+	ldr	r2, .L926+16
+	ldr	r0, [r2]
+	movs	r2, #16
+	str	r0, [r5, #12]
+	bl	ftl_memset
+	ldr	r2, [r5, #12]
+	movs	r3, #1
+	ldr	r1, [r4, #28]
+	mov	r0, r5
+	strh	r7, [r2, #8]	@ movhi
+	str	r1, [r2, #4]
+	ldrh	r1, [r4, #4]
+	strh	r10, [r2, #2]	@ movhi
+	strh	r1, [r2]	@ movhi
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+	ldrh	r2, [r4, #2]
+	ldr	r1, [r5]
+	adds	r2, r2, #1
+	uxth	r2, r2
+	adds	r3, r1, #1
+	strh	r2, [r4, #2]	@ movhi
+	bne	.L908
+	ldr	r1, [r5, #4]
+	adds	r6, r6, #1
+	ldr	r0, .L926+20
+	uxth	r6, r6
+	bl	printf
+	ldrh	r2, [r4, #2]
+	cmp	r2, #2
+	ittt	ls
+	ldrhls	r2, [fp]
+	addls	r2, r2, #-1
+	strhls	r2, [r4, #2]	@ movhi
+	cmp	r6, #3
+	bls	.L910
+	mov	r2, r6
+	ldr	r1, [r5, #4]
+	ldr	r0, .L926+24
+	bl	printf
+.L911:
+	b	.L911
+.L910:
+	ldr	r3, [r4, #32]
+	cmp	r3, #0
+	beq	.L903
+.L925:
+	b	.L925
+.L908:
+	cmp	r2, #1
+	beq	.L914
+	cmp	r1, #256
+	beq	.L914
+	ldr	r0, [r4, #36]
+	cbz	r0, .L915
+.L914:
+	movs	r3, #0
+	str	r3, [r4, #36]
+	b	.L903
+.L915:
+	ldr	r2, [r5, #4]
+	ldr	r3, [r4, #24]
+	str	r2, [r3, r7, lsl #2]
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L927:
+	.align	2
+.L926:
+	.word	.LANCHOR66
+	.word	.LANCHOR155
+	.word	.LC1
+	.word	.LANCHOR148
 	.word	.LANCHOR123
-	.word	.LANCHOR108
-	.word	.LANCHOR106
-	.word	.LANCHOR23
-	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
-	.section	.text.FtlScanSysBlk,"ax",%progbits
+	.word	.LC88
+	.word	.LC89
+	.word	.LANCHOR20
+	.size	FtlMapWritePage, .-FtlMapWritePage
+	.section	.text.load_l2p_region,"ax",%progbits
 	.align	1
-	.global	FtlScanSysBlk
+	.global	load_l2p_region
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlScanSysBlk, %function
-FtlScanSysBlk:
-	@ args = 0, pretend = 0, frame = 32
+	.type	load_l2p_region, %function
+load_l2p_region:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r4, #0
-	ldr	r5, .L889
-	sub	sp, sp, #32
-	mov	r1, r4
-	ldr	r3, .L889+4
-	ldr	r2, [r5]
-	ldr	r6, .L889+8
-	strh	r4, [r3]	@ movhi
-	ldr	r3, .L889+12
-	lsls	r2, r2, #2
-	strh	r4, [r6]	@ movhi
-	ldr	r7, .L889+16
-	ldr	r0, [r3]
-	bl	ftl_memset
-	ldr	r2, [r5]
-	mov	r1, r4
-	ldr	r3, .L889+20
-	lsls	r2, r2, #1
-	ldr	r0, [r3]
-	bl	ftl_memset
-	ldrh	r2, [r7]
-	mov	r1, r4
-	ldr	r3, .L889+24
-	lsls	r2, r2, #2
-	ldr	r0, [r3]
-	bl	ftl_memset
-	ldrh	r2, [r7]
-	mov	r1, r4
-	ldr	r3, .L889+28
-	lsls	r2, r2, #1
-	ldr	r0, [r3]
-	bl	ftl_memset
-	movs	r2, #12
+	ldr	r3, .L935
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r5, r0
+	mov	r10, r1
+	ldrh	r2, [r3]
+	str	r3, [sp, #4]
+	cmp	r2, r0
+	bcs	.L929
+	movw	r2, #485
+	ldr	r1, .L935+4
+	ldr	r0, .L935+8
+	bl	printf
+.L929:
+	ldr	fp, .L935+48
+	movs	r4, #12
+	ldr	r7, .L935+12
+	ldr	r3, [fp]
+	ldr	r8, [r3, r5, lsl #2]
+	cmp	r8, #0
+	bne	.L930
+	mul	r4, r4, r10
+	ldr	r2, [r7]
 	movs	r1, #255
-	ldr	r0, .L889+32
+	adds	r0, r2, r4
+	ldr	r2, .L935+16
+	ldr	r0, [r0, #8]
+	ldrh	r2, [r2]
 	bl	ftl_memset
-	ldr	r3, .L889+36
-	str	r6, [sp, #12]
-	str	r5, [sp, #16]
-	ldrh	r3, [r3]
-	str	r3, [sp, #4]
-.L810:
-	ldr	r3, .L889+40
-	ldr	r2, [sp, #4]
-	ldrh	r3, [r3]
-	cmp	r3, r2
-	bls	.L851
-	ldr	r3, .L889+44
-	movs	r5, #0
-	ldr	r1, .L889+48
-	mov	fp, r5
-	movs	r7, #20
-	ldrh	r8, [r3]
-	ldr	r3, .L889+52
-	ldr	r2, [r1]
-	ldr	r1, .L889+56
-	ldr	r6, [r3]
-	ldr	r3, .L889+60
-	str	r2, [sp, #8]
-	ldrh	r10, [r1]
-	ldr	r3, [r3]
-	ldr	r2, .L889+64
-	b	.L852
-.L812:
-	ldrb	r0, [r2, r5]	@ zero_extendqisi2
-	ldr	r1, [sp, #4]
-	str	r3, [sp, #28]
-	str	r2, [sp, #24]
-	bl	V2P_block
-	str	r0, [sp, #20]
-	bl	FtlBbmIsBadBlock
-	ldr	r2, [sp, #24]
-	ldr	r3, [sp, #28]
-	cbnz	r0, .L811
-	ldr	r1, [sp, #20]
-	mla	r0, r7, fp, r6
-	ldr	r4, [sp, #8]
-	lsls	r1, r1, #10
-	str	r3, [r0, #8]
-	str	r1, [r0, #4]
-	mul	r1, r10, fp
-	bic	r1, r1, #3
-	add	r1, r1, r4
-	str	r1, [r0, #12]
-	add	r1, fp, #1
-	uxth	fp, r1
-.L811:
-	adds	r5, r5, #1
-.L852:
-	uxth	r1, r5
-	cmp	r8, r1
-	bhi	.L812
-	cmp	fp, #0
-	bne	.L813
-.L850:
-	ldr	r3, [sp, #4]
-	adds	r3, r3, #1
-	uxth	r3, r3
-	str	r3, [sp, #4]
-	b	.L810
-.L813:
-	movs	r7, #0
-	movs	r2, #1
-	mov	r1, fp
+	ldr	r2, [r7]
+	adds	r1, r2, r4
+	strh	r5, [r2, r4]	@ movhi
+	str	r8, [r1, #4]
+.L931:
+	movs	r0, #0
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L930:
+	mul	r4, r4, r10
+	ldr	r2, [r7]
+	ldr	r6, .L935+20
+	add	r2, r2, r4
 	mov	r0, r6
-	bl	FlashReadPages
-.L814:
-	uxth	r3, r7
-	cmp	fp, r3
-	bls	.L850
-	ldr	r3, .L889+52
-	mov	r8, #20
-	mul	r8, r8, r7
-	ldr	r3, [r3]
-	add	r2, r3, r8
-	ldr	r3, [r3, r8]
-	ldr	r5, [r2, #4]
-	ldr	r6, [r2, #12]
-	adds	r3, r3, #1
-	ubfx	r5, r5, #10, #16
-	bne	.L817
-	mov	r10, #16
-.L819:
-	ldr	r3, .L889+52
+	ldr	r2, [r2, #8]
+	str	r8, [r6, #4]
+	str	r2, [r6, #8]
+	ldr	r2, .L935+24
+	ldr	r2, [r2]
+	str	r2, [r6, #12]
 	movs	r2, #1
 	mov	r1, r2
-	ldr	r0, [r3]
-	add	r0, r0, r8
-	ldr	r3, [r0, #4]
-	adds	r3, r3, #1
-	str	r3, [r0, #4]
 	bl	FlashReadPages
-	ldrh	r2, [r6]
-	movw	r3, #65535
-	cmp	r2, r3
-	ldr	r3, .L889+52
-	ldr	r3, [r3]
-	bne	.L816
-	mov	r2, #-1
-	str	r2, [r3, r8]
-	ldr	r3, .L889+52
-	ldr	r3, [r3]
-	ldr	r3, [r3, r8]
-	cmp	r3, r2
-	bne	.L817
-.L818:
-	movs	r1, #0
-	mov	r0, r5
-	bl	FtlFreeSysBlkQueueIn
-	b	.L822
-.L816:
-	ldr	r3, [r3, r8]
-	adds	r3, r3, #1
-	bne	.L817
-	add	r10, r10, #-1
-	uxth	r10, r10
-	cmp	r10, #0
-	bne	.L819
-	b	.L818
-.L817:
-	ldr	r3, .L889+68
-	ldr	r2, [r3]
-	ldr	r3, [r6, #4]
-	adds	r1, r2, #1
-	beq	.L820
-	cmp	r2, r3
-	bhi	.L821
-.L820:
-	adds	r2, r3, #1
-	ittt	ne
-	ldrne	r1, .L889+68
-	addne	r2, r3, #1
-	strne	r2, [r1]
-.L821:
-	ldrh	r2, [r6]
-	movw	r1, #61604
-	cmp	r2, r1
-	beq	.L823
-	bhi	.L824
-	movw	r3, #61574
-	cmp	r2, r3
-	beq	.L825
-.L822:
-	adds	r7, r7, #1
-	b	.L814
-.L824:
-	movw	r3, #61634
-	cmp	r2, r3
-	beq	.L826
-	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L818
-	b	.L822
-.L826:
-	ldr	r3, .L889+8
-	ldrh	r2, [r3]
-	ldr	r3, .L889
-	ldr	r3, [r3]
-	cmp	r2, r3
-	bls	.L828
-	movw	r2, #1211
-	ldr	r1, .L889+72
-	ldr	r0, .L889+76
-	bl	printf
-.L828:
-	ldr	r3, [sp, #16]
-	ldr	r2, [sp, #12]
-	ldr	r1, [r3]
-	ldrh	r0, [r2]
-	ldr	r2, .L889+12
-	uxth	r10, r1
-	ldr	ip, [r2]
-	add	r3, r10, #-1
-	sub	r10, r10, r0
-	add	r10, r10, #-1
-	sxth	r3, r3
-	sxth	r10, r10
-.L829:
-	cmp	r3, r10
-	bgt	.L835
-	cmp	r3, #0
-	bge	.L867
-	b	.L822
-.L835:
-	ldr	r2, [ip, r3, lsl #2]
-	add	r8, ip, r3, lsl #2
-	ldr	r4, [r6, #4]
-	cmp	r4, r2
-	bls	.L830
-	ldr	r2, [ip]
-	cbnz	r2, .L831
-	cmp	r1, r0
-	ittt	ne
-	ldrne	r2, .L889+8
-	addne	r0, r0, #1
-	strhne	r0, [r2]	@ movhi
-.L831:
-	ldr	r2, .L889+20
-	uxth	r10, r3
-	ldr	r0, [r2]
-	movs	r2, #0
-.L832:
-	uxth	lr, r2
-	sxth	r1, r2
-	cmp	r10, lr
-	bhi	.L833
-	ldr	r2, [r6, #4]
-	cmp	r3, #0
-	str	r2, [r8]
-	strh	r5, [r0, r3, lsl #1]	@ movhi
-	blt	.L822
-	ldr	r2, .L889+8
-	ldrh	r0, [r2]
-	ldr	r2, .L889
-	ldr	r2, [r2]
-	subs	r2, r2, r0
-	subs	r2, r2, #1
-	sxth	r2, r2
-	cmp	r3, r2
-	bgt	.L822
-.L867:
-	ldr	r2, .L889+8
-	adds	r0, r0, #1
-	strh	r0, [r2]	@ movhi
-	ldr	r2, [r6, #4]
-	str	r2, [ip, r3, lsl #2]
-	ldr	r2, .L889+20
-.L887:
-	ldr	r2, [r2]
-	strh	r5, [r2, r3, lsl #1]	@ movhi
-	b	.L822
-.L833:
-	add	lr, ip, r1, lsl #2
-	adds	r2, r2, #1
-	ldr	r4, [lr, #4]
-	add	lr, r0, r1, lsl #1
-	ldrh	lr, [lr, #2]
-	str	r4, [ip, r1, lsl #2]
-	strh	lr, [r0, r1, lsl #1]	@ movhi
-	b	.L832
-.L830:
-	subs	r3, r3, #1
-	sxth	r3, r3
-	b	.L829
-.L890:
+	ldr	r10, [r6, #12]
+	ldrh	r2, [r10, #8]
+	cmp	r2, r5
+	beq	.L932
+	mov	r2, r8
+	mov	r1, r5
+	ldr	r0, .L935+28
+	bl	printf
+	movs	r3, #4
+	ldr	r1, [r6, #12]
+	mov	r2, r3
+	ldr	r0, .L935+32
+	bl	rknand_print_hex
+	ldr	r3, [sp, #4]
+	movs	r2, #4
+	ldr	r1, [fp]
+	ldr	r0, .L935+36
+	ldrh	r3, [r3]
+	bl	rknand_print_hex
+.L933:
+	ldrh	r3, [r10, #8]
+	cmp	r3, r5
+	beq	.L934
+	mov	r2, #508
+	ldr	r1, .L935+4
+	ldr	r0, .L935+8
+	bl	printf
+.L934:
+	ldr	r3, [r7]
+	movs	r1, #0
+	adds	r2, r3, r4
+	str	r1, [r2, #4]
+	strh	r5, [r3, r4]	@ movhi
+	b	.L931
+.L932:
+	ldr	r2, [r6]
+	cmp	r2, #256
+	bne	.L933
+	mov	r2, r8
+	mov	r1, r5
+	ldr	r0, .L935+40
+	bl	printf
+	ldr	r3, [r7]
+	mov	r1, r5
+	ldr	r0, .L935+44
+	add	r3, r3, r4
+	ldr	r2, [r3, #8]
+	bl	FtlMapWritePage
+	b	.L933
+.L936:
 	.align	2
-.L889:
-	.word	.LANCHOR30
-	.word	.LANCHOR35
-	.word	.LANCHOR147
-	.word	.LANCHOR135
-	.word	.LANCHOR27
-	.word	.LANCHOR129
-	.word	.LANCHOR132
-	.word	.LANCHOR36
-	.word	.LANCHOR79
-	.word	.LANCHOR5
-	.word	.LANCHOR6
-	.word	.LANCHOR3
-	.word	.LANCHOR92
-	.word	.LANCHOR120
-	.word	.LANCHOR24
-	.word	.LANCHOR91
-	.word	.LANCHOR13
-	.word	.LANCHOR70
-	.word	.LANCHOR148
+.L935:
+	.word	.LANCHOR32
+	.word	.LANCHOR156
 	.word	.LC1
-.L825:
-	ldr	r8, .L891+12
-	ldr	r10, .L891+20
-	ldrh	r2, [r8]
-	ldrh	r3, [r10]
+	.word	.LANCHOR55
+	.word	.LANCHOR23
+	.word	.LANCHOR148
+	.word	.LANCHOR123
+	.word	.LC90
+	.word	.LC91
+	.word	.LC92
+	.word	.LC93
+	.word	.LANCHOR140
+	.word	.LANCHOR134
+	.size	load_l2p_region, .-load_l2p_region
+	.section	.text.ftl_map_blk_gc,"ax",%progbits
+	.align	1
+	.global	ftl_map_blk_gc
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_map_blk_gc, %function
+ftl_map_blk_gc:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, [r0, #24]
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r0
+	ldr	r5, [r0, #12]
+	str	r3, [sp]
+	bl	ftl_free_no_use_map_blk
+	ldrh	r3, [r4, #10]
+	ldrh	r2, [r4, #8]
+	subs	r3, r3, #5
 	cmp	r2, r3
-	bls	.L838
-	movw	r2, #1252
-	ldr	r1, .L891
-	ldr	r0, .L891+4
-	bl	printf
-.L838:
-	ldr	r2, .L891+8
-	ldrh	lr, [r10]
-	ldrh	ip, [r8]
-	ldr	r0, [r2]
-	add	r10, lr, #-1
-	sxth	r3, r10
-	sub	r10, r10, ip
-.L839:
-	cmp	r3, r10
-	ble	.L844
-	ldr	r1, [r6, #4]
-	add	r8, r0, r3, lsl #2
-	ldr	r2, [r0, r3, lsl #2]
-	cmp	r1, r2
-	bls	.L840
-	ldr	r2, [r0]
-	cbnz	r2, .L841
-	cmp	lr, ip
-	ittt	ne
-	ldrne	r2, .L891+12
-	addne	ip, ip, #1
-	strhne	ip, [r2]	@ movhi
-.L841:
-	ldr	r2, .L891+16
-	uxth	r10, r3
-	ldr	ip, [r2]
-	movs	r2, #0
-.L842:
-	uxth	lr, r2
-	sxth	r1, r2
-	cmp	r10, lr
-	bhi	.L843
-	ldr	r2, [r6, #4]
-	str	r2, [r8]
-	strh	r5, [ip, r3, lsl #1]	@ movhi
-.L844:
-	cmp	r3, #0
-	blt	.L822
-	ldr	r2, .L891+20
-	ldr	ip, .L891+12
-	ldrh	r2, [r2]
-	ldrh	r1, [ip]
-	subs	r2, r2, #1
-	subs	r2, r2, r1
-	sxth	r2, r2
-	cmp	r3, r2
-	bgt	.L822
-	ldr	r2, [r6, #4]
-	adds	r1, r1, #1
-	strh	r1, [ip]	@ movhi
-	str	r2, [r0, r3, lsl #2]
-	ldr	r2, .L891+16
-	b	.L887
-.L843:
-	add	lr, r0, r1, lsl #2
-	adds	r2, r2, #1
-	ldr	r4, [lr, #4]
-	add	lr, ip, r1, lsl #1
-	ldrh	lr, [lr, #2]
-	str	r4, [r0, r1, lsl #2]
-	strh	lr, [ip, r1, lsl #1]	@ movhi
-	b	.L842
-.L840:
+	blt	.L938
+	uxth	r0, r0
+	ldrh	r8, [r5, r0, lsl #1]
+	cmp	r8, #0
+	beq	.L938
+	ldr	r3, [r4, #32]
+	cbnz	r3, .L938
+	movs	r2, #1
+	str	r2, [r4, #32]
+	strh	r3, [r5, r0, lsl #1]	@ movhi
+	ldrh	r3, [r4, #8]
+	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
-	sxth	r3, r3
-	b	.L839
-.L823:
-	ldr	r8, .L891+40
-	movw	r2, #65535
-	ldrh	r1, [r8]
-	cmp	r1, r2
-	bne	.L846
-.L888:
-	strh	r5, [r8]	@ movhi
-	str	r3, [r8, #8]
-	b	.L822
-.L846:
-	ldrh	r0, [r8, #4]
-	cmp	r0, r2
-	beq	.L847
+	strh	r3, [r4, #8]	@ movhi
+	ldr	r3, .L953
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L939
+	mov	r0, r4
+	bl	ftl_map_blk_alloc_new_blk
+.L939:
+	ldr	r5, .L953+4
+	movs	r6, #0
+.L940:
+	ldrh	r3, [r4, #6]
+	uxth	r10, r6
+	cmp	r3, r10
+	bhi	.L947
 	movs	r1, #1
+	mov	r0, r8
 	bl	FtlFreeSysBlkQueueIn
-.L847:
-	ldr	r3, [r6, #4]
-	ldr	r2, [r8, #8]
-	cmp	r2, r3
-	bcs	.L848
-	ldrh	r2, [r8]
-	strh	r2, [r8, #4]	@ movhi
-	b	.L888
-.L848:
-	strh	r5, [r8, #4]	@ movhi
-	b	.L822
-.L851:
-	ldr	r3, .L891+24
-	ldr	r2, [r3]
-	ldrh	r3, [r2]
-	cbz	r3, .L853
-.L856:
-	ldr	r3, .L891+16
-	ldr	r4, [r3]
-	ldrh	r2, [r4]
-	cmp	r2, #0
-	beq	.L854
-.L855:
-	ldr	r3, .L891+28
-	ldrh	r2, [r3]
-	ldr	r3, .L891+32
-	ldr	r3, [r3]
+	movs	r3, #0
+	str	r3, [r4, #32]
+.L938:
+	ldr	r3, .L953
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3]
 	cmp	r2, r3
-	bls	.L886
-	movw	r2, #1377
-	ldr	r1, .L891
-	ldr	r0, .L891+4
-	bl	printf
-.L886:
+	bcc	.L948
+	mov	r0, r4
+	bl	ftl_map_blk_alloc_new_blk
+.L948:
 	movs	r0, #0
-	add	sp, sp, #32
+	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L853:
-	ldr	r1, .L891+28
-	ldrh	r1, [r1]
-	cmp	r1, #0
-	beq	.L856
-	ldr	r5, .L891+32
-	ldr	r0, [r5]
-.L857:
-	sxth	r1, r3
-	cmp	r1, r0
-	bcs	.L856
-	ldrh	r4, [r2, r1, lsl #1]
-	adds	r3, r3, #1
-	cmp	r4, #0
-	beq	.L857
-	ldr	r3, .L891+36
-	movs	r6, #0
-	ldr	r0, [r3]
-	mov	r3, r1
-.L858:
-	ldr	r4, [r5]
-	cmp	r3, r4
-	bcs	.L856
-	ldrh	r7, [r2, r3, lsl #1]
-	subs	r4, r3, r1
-	strh	r7, [r2, r4, lsl #1]	@ movhi
-	ldr	r7, [r0, r3, lsl #2]
-	str	r7, [r0, r4, lsl #2]
-	strh	r6, [r2, r3, lsl #1]	@ movhi
-	adds	r3, r3, #1
-	sxth	r3, r3
-	b	.L858
-.L854:
-	ldr	r3, .L891+12
-	ldrh	r3, [r3]
-	cmp	r3, #0
-	beq	.L855
-	ldr	r5, .L891+20
-	ldrh	r1, [r5]
-.L863:
-	sxth	r3, r2
-	cmp	r3, r1
-	mov	r6, r3
-	bge	.L855
-	ldrh	r0, [r4, r3, lsl #1]
-	adds	r2, r2, #1
-	cmp	r0, #0
-	beq	.L863
-	ldr	r2, .L891+8
-	movs	r0, #0
-	ldr	r2, [r2]
-.L864:
-	ldrh	r1, [r5]
-	cmp	r3, r1
-	bge	.L855
-	ldrh	r7, [r4, r3, lsl #1]
-	subs	r1, r3, r6
-	strh	r7, [r4, r1, lsl #1]	@ movhi
-	ldr	r7, [r2, r3, lsl #2]
-	str	r7, [r2, r1, lsl #2]
-	adds	r1, r3, #1
-	strh	r0, [r4, r3, lsl #1]	@ movhi
-	sxth	r3, r1
-	b	.L864
-.L892:
+.L947:
+	ldr	r3, [sp]
+	uxth	fp, r6
+	add	r3, r3, fp, lsl #2
+	str	r3, [sp, #4]
+	ldr	r3, [sp]
+	ldr	r2, [r3, fp, lsl #2]
+	cmp	r8, r2, lsr #10
+	bne	.L941
+	ldr	r3, .L953+8
+	str	r2, [r5, #4]
+	movs	r2, #1
+	ldr	r0, .L953+4
+	ldr	r1, [r3]
+	str	r1, [r5, #8]
+	ldr	r1, .L953+12
+	ldr	r7, [r1]
+	mov	r1, r2
+	str	r7, [r5, #12]
+	bl	FlashReadPages
+	ldrh	r2, [r7, #8]
+	cmp	r2, r10
+	beq	.L942
+	movw	r2, #611
+	ldr	r1, .L953+16
+	ldr	r0, .L953+20
+	bl	printf
+.L942:
+	ldr	r2, [r5]
+	adds	r2, r2, #1
+	bne	.L943
+.L945:
+	ldr	r2, [sp, #4]
+	movs	r3, #0
+	str	r3, [r2]
+.L944:
+	b	.L944
+.L943:
+	ldrh	r2, [r7, #8]
+	cmp	r2, r10
+	bne	.L945
+	ldrh	r1, [r7]
+	ldrh	r2, [r4, #4]
+	cmp	r1, r2
+	bne	.L945
+	ldr	r2, [r5, #8]
+	mov	r1, fp
+	mov	r0, r4
+	bl	FtlMapWritePage
+.L941:
+	adds	r6, r6, #1
+	b	.L940
+.L954:
 	.align	2
-.L891:
+.L953:
+	.word	.LANCHOR20
 	.word	.LANCHOR148
+	.word	.LANCHOR116
+	.word	.LANCHOR123
+	.word	.LANCHOR157
 	.word	.LC1
-	.word	.LANCHOR132
-	.word	.LANCHOR35
-	.word	.LANCHOR36
-	.word	.LANCHOR27
-	.word	.LANCHOR129
-	.word	.LANCHOR147
-	.word	.LANCHOR30
-	.word	.LANCHOR135
-	.word	.LANCHOR79
-	.size	FtlScanSysBlk, .-FtlScanSysBlk
+	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
 	.section	.text.FtlMapTblRecovery,"ax",%progbits
 	.align	1
 	.global	FtlMapTblRecovery
@@ -6684,16 +7359,16 @@ FtlMapTblRecovery:
 	lsl	r2, fp, #2
 	ldr	r10, [r0, #12]
 	mov	r0, r8
-	ldr	r5, .L920
+	ldr	r5, .L982
 	str	r3, [sp, #4]
 	bl	ftl_memset
-	ldr	r3, .L920+4
+	ldr	r3, .L982+4
 	str	r6, [r4, #32]
 	str	r6, [r4, #28]
 	ldr	r2, [r3]
 	str	r3, [sp, #8]
 	str	r2, [r5, #8]
-	ldr	r2, .L920+8
+	ldr	r2, .L982+8
 	ldr	r7, [r2]
 	movw	r2, #65535
 	str	r7, [r5, #12]
@@ -6701,16 +7376,16 @@ FtlMapTblRecovery:
 	strh	r2, [r4, #2]	@ movhi
 	movs	r2, #1
 	str	r2, [r4, #36]
-.L894:
+.L956:
 	ldr	r2, [sp, #4]
 	sxth	r3, r6
 	cmp	r3, r2
-	bge	.L911
+	bge	.L973
 	ldr	r2, [sp, #4]
 	subs	r2, r2, #1
 	cmp	r3, r2
 	lsl	r2, r3, #1
-	bne	.L895
+	bne	.L957
 	ldrh	r0, [r10, r3, lsl #1]
 	movs	r1, #1
 	add	r5, r10, r2
@@ -6726,22 +7401,22 @@ FtlMapTblRecovery:
 	strh	r0, [r4, #2]	@ movhi
 	ldr	r3, [r2, r3, lsl #2]
 	str	r3, [r4, #28]
-	ldr	r3, .L920
-.L896:
+	ldr	r3, .L982
+.L958:
 	sxth	r2, r6
 	cmp	r2, r10
-	ble	.L898
-.L911:
+	ble	.L960
+.L973:
 	mov	r0, r4
 	bl	ftl_free_no_use_map_blk
-	ldr	r3, .L920+12
+	ldr	r3, .L982+12
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L900
+	bne	.L962
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L900:
+.L962:
 	mov	r0, r4
 	bl	ftl_map_blk_gc
 	mov	r0, r4
@@ -6750,9 +7425,9 @@ FtlMapTblRecovery:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L898:
+.L960:
 	ldrh	r1, [r5]
-	ldr	r0, .L920
+	ldr	r0, .L982
 	str	r3, [sp, #4]
 	orr	r2, r2, r1, lsl #10
 	str	r2, [r3, #4]
@@ -6762,28 +7437,28 @@ FtlMapTblRecovery:
 	ldr	r3, [sp, #4]
 	ldr	r2, [r3]
 	adds	r2, r2, #1
-	beq	.L897
+	beq	.L959
 	ldrh	r2, [r7, #8]
 	cmp	fp, r2
-	bls	.L897
+	bls	.L959
 	ldrh	r1, [r4, #4]
 	ldrh	r0, [r7]
 	cmp	r0, r1
 	itt	eq
 	ldreq	r1, [r3, #4]
 	streq	r1, [r8, r2, lsl #2]
-.L897:
+.L959:
 	adds	r6, r6, #1
-	b	.L896
-.L895:
+	b	.L958
+.L957:
 	ldr	r1, [sp, #8]
 	add	r2, r10, r2
 	str	r2, [sp, #16]
-	ldr	r0, .L920
+	ldr	r0, .L982
 	ldr	r1, [r1]
 	str	r1, [r5, #8]
 	ldrh	r1, [r10, r3, lsl #1]
-	ldr	r3, .L920+12
+	ldr	r3, .L982+12
 	ldrh	r2, [r3]
 	str	r3, [sp, #20]
 	subs	r2, r2, #1
@@ -6794,27 +7469,27 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	r2, [r5]
 	adds	r2, r2, #1
-	beq	.L913
+	beq	.L975
 	ldrh	r1, [r7]
 	ldrh	r2, [r4, #4]
 	ldr	r3, [sp, #20]
 	cmp	r1, r2
-	bne	.L913
+	bne	.L975
 	ldrh	r1, [r7, #8]
 	movw	r2, #64245
 	cmp	r1, r2
-	beq	.L902
-.L913:
+	beq	.L964
+.L975:
 	movs	r3, #0
-.L903:
-	ldr	r1, .L920+12
+.L965:
+	ldr	r1, .L982+12
 	sxth	r2, r3
 	ldrh	r1, [r1]
 	cmp	r2, r1
-	bge	.L909
+	bge	.L971
 	str	r3, [sp, #20]
 	ldr	r3, [sp, #16]
-	ldr	r0, .L920
+	ldr	r0, .L982
 	ldrh	r1, [r3]
 	orr	r2, r2, r1, lsl #10
 	str	r2, [r5, #4]
@@ -6824,3042 +7499,2770 @@ FtlMapTblRecovery:
 	ldr	r2, [r5]
 	ldr	r3, [sp, #20]
 	adds	r2, r2, #1
-	beq	.L907
+	beq	.L969
 	ldrh	r2, [r7, #8]
 	cmp	fp, r2
-	bls	.L907
+	bls	.L969
 	ldrh	r1, [r4, #4]
 	ldrh	r0, [r7]
 	cmp	r0, r1
 	itt	eq
 	ldreq	r1, [r5, #4]
 	streq	r1, [r8, r2, lsl #2]
-.L907:
+.L969:
 	adds	r3, r3, #1
-	b	.L903
-.L902:
+	b	.L965
+.L964:
 	ldrh	r2, [r3]
 	movs	r1, #0
 	ldr	r3, [sp, #8]
 	subs	r2, r2, #1
 	ldr	ip, [r3]
-.L904:
+.L966:
 	sxth	r3, r1
 	cmp	r3, r2
-	blt	.L906
-.L909:
+	blt	.L968
+.L971:
 	adds	r6, r6, #1
-	b	.L894
-.L906:
+	b	.L956
+.L968:
 	lsls	r0, r3, #3
 	ldr	r3, [ip, r3, lsl #3]
 	adds	r1, r1, #1
 	uxth	lr, r3
 	cmp	fp, lr
-	itttt	hi
-	addhi	r0, r0, ip
-	movhi	r3, lr
-	ldrhi	r0, [r0, #4]
-	strhi	r0, [r8, r3, lsl #2]
-	b	.L904
-.L921:
-	.align	2
-.L920:
-	.word	.LANCHOR106
-	.word	.LANCHOR107
-	.word	.LANCHOR108
-	.word	.LANCHOR20
-	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
-	.section	.text.FtlLoadVonderInfo,"ax",%progbits
-	.align	1
-	.global	FtlLoadVonderInfo
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlLoadVonderInfo, %function
-FtlLoadVonderInfo:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	ldr	r3, .L923
-	ldr	r0, .L923+4
-	ldrh	r3, [r3]
-	strh	r3, [r0, #10]	@ movhi
-	movw	r3, #61574
-	strh	r3, [r0, #4]	@ movhi
-	ldr	r3, .L923+8
-	ldrh	r3, [r3]
-	strh	r3, [r0, #8]	@ movhi
-	ldr	r3, .L923+12
-	ldrh	r3, [r3]
-	strh	r3, [r0, #6]	@ movhi
-	ldr	r3, .L923+16
-	ldr	r3, [r3]
-	str	r3, [r0, #12]
-	ldr	r3, .L923+20
-	ldr	r3, [r3]
-	str	r3, [r0, #16]
-	ldr	r3, .L923+24
-	ldr	r3, [r3]
-	str	r3, [r0, #20]
-	ldr	r3, .L923+28
-	ldr	r3, [r3]
-	str	r3, [r0, #24]
-	bl	FtlMapTblRecovery
-	movs	r0, #0
-	pop	{r3, pc}
-.L924:
-	.align	2
-.L923:
-	.word	.LANCHOR27
-	.word	.LANCHOR149
-	.word	.LANCHOR35
-	.word	.LANCHOR28
-	.word	.LANCHOR36
-	.word	.LANCHOR132
-	.word	.LANCHOR131
-	.word	.LANCHOR133
-	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
-	.section	.text.FtlL2PDataInit,"ax",%progbits
-	.align	1
-	.global	FtlL2PDataInit
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlL2PDataInit, %function
-FtlL2PDataInit:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, lr}
-	movs	r1, #0
-	ldr	r5, .L928
-	ldr	r4, .L928+4
-	ldr	r2, [r5]
-	ldr	r7, .L928+8
-	ldr	r6, .L928+12
-	ldr	r0, [r4]
-	lsls	r2, r2, #1
-	ldr	r8, .L928+44
-	bl	ftl_memset
-	ldrh	r3, [r7]
-	movs	r1, #255
-	ldrh	r2, [r6]
-	ldr	r0, [r8]
-	muls	r2, r3, r2
-	bl	ftl_memset
-	ldr	r3, .L928+16
-	movw	r0, #65535
-	ldrh	r1, [r6]
-	ldr	ip, [r8]
-	ldr	r2, [r3]
-	movs	r3, #12
-	ldrh	r7, [r7]
-	mla	r3, r1, r3, r3
-	adds	r1, r2, r3
-	movs	r3, #0
-	mov	lr, r3
-.L926:
-	adds	r2, r2, #12
-	adds	r6, r3, r7
-	cmp	r2, r1
-	bne	.L927
-	ldr	r3, .L928+20
-	ldr	r2, [r5]
-	strh	r0, [r3, #2]	@ movhi
-	strh	r2, [r3, #10]	@ movhi
-	movw	r2, #61634
-	strh	r2, [r3, #4]	@ movhi
-	ldr	r2, .L928+24
-	strh	r0, [r3]	@ movhi
-	ldrh	r2, [r2]
-	strh	r2, [r3, #8]	@ movhi
-	ldr	r2, .L928+28
-	ldrh	r2, [r2]
-	strh	r2, [r3, #6]	@ movhi
-	ldr	r2, .L928+32
-	ldr	r2, [r2]
-	str	r2, [r3, #12]
-	ldr	r2, .L928+36
-	ldr	r2, [r2]
-	str	r2, [r3, #16]
-	ldr	r2, [r4]
-	str	r2, [r3, #20]
-	ldr	r2, .L928+40
-	ldr	r2, [r2]
-	str	r2, [r3, #24]
-	pop	{r4, r5, r6, r7, r8, pc}
-.L927:
-	bic	r3, r3, #3
-	str	lr, [r2, #-8]
-	add	r3, r3, ip
-	strh	r0, [r2, #-12]	@ movhi
-	str	r3, [r2, #-4]
-	mov	r3, r6
-	b	.L926
-.L929:
-	.align	2
-.L928:
-	.word	.LANCHOR30
-	.word	.LANCHOR130
-	.word	.LANCHOR23
-	.word	.LANCHOR33
-	.word	.LANCHOR55
-	.word	.LANCHOR144
-	.word	.LANCHOR147
-	.word	.LANCHOR32
-	.word	.LANCHOR129
-	.word	.LANCHOR135
-	.word	.LANCHOR134
-	.word	.LANCHOR136
-	.size	FtlL2PDataInit, .-FtlL2PDataInit
-	.section	.text.FtlLoadMapInfo,"ax",%progbits
-	.align	1
-	.global	FtlLoadMapInfo
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlLoadMapInfo, %function
-FtlLoadMapInfo:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	bl	FtlL2PDataInit
-	ldr	r0, .L931
-	bl	FtlMapTblRecovery
-	movs	r0, #0
-	pop	{r3, pc}
-.L932:
-	.align	2
-.L931:
-	.word	.LANCHOR144
-	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
-	.section	.text.FtlVariablesInit,"ax",%progbits
-	.align	1
-	.global	FtlVariablesInit
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlVariablesInit, %function
-FtlVariablesInit:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	movw	r2, #65535
-	ldr	r3, .L934
-	movs	r4, #0
-	mov	r1, r4
-	ldr	r5, .L934+4
-	strh	r2, [r3]	@ movhi
-	mov	r2, #-1
-	ldr	r3, .L934+8
-	str	r4, [r3]
-	ldr	r3, .L934+12
-	str	r4, [r3]
-	ldr	r3, .L934+16
-	str	r2, [r3]
-	ldr	r3, .L934+20
-	strh	r4, [r3]	@ movhi
-	ldr	r3, .L934+24
-	ldrh	r2, [r3]
-	ldr	r3, .L934+28
-	lsls	r2, r2, #1
-	ldr	r0, [r3]
-	bl	ftl_memset
-	ldrh	r2, [r5]
-	mov	r1, r4
-	ldr	r3, .L934+32
-	lsls	r2, r2, #1
-	ldr	r0, [r3]
-	bl	ftl_memset
-	ldrh	r2, [r5]
-	mov	r1, r4
-	ldr	r3, .L934+36
-	lsls	r2, r2, #1
-	ldr	r0, [r3]
-	bl	ftl_memset
-	mov	r1, r4
-	movs	r2, #48
-	ldr	r0, .L934+40
-	bl	ftl_memset
-	mov	r2, #512
-	mov	r1, r4
-	ldr	r0, .L934+44
-	bl	ftl_memset
-	bl	FtlGcBufInit
-	bl	FtlL2PDataInit
-	mov	r0, r4
-	pop	{r3, r4, r5, pc}
-.L935:
+	itttt	hi
+	addhi	r0, r0, ip
+	movhi	r3, lr
+	ldrhi	r0, [r0, #4]
+	strhi	r0, [r8, r3, lsl #2]
+	b	.L966
+.L983:
 	.align	2
-.L934:
-	.word	.LANCHOR150
-	.word	.LANCHOR6
-	.word	.LANCHOR151
-	.word	.LANCHOR152
-	.word	.LANCHOR153
-	.word	.LANCHOR35
-	.word	.LANCHOR27
-	.word	.LANCHOR36
-	.word	.LANCHOR43
-	.word	.LANCHOR126
-	.word	.LANCHOR39
-	.word	.LANCHOR81
-	.size	FtlVariablesInit, .-FtlVariablesInit
-	.section	.text.SupperBlkListInit,"ax",%progbits
+.L982:
+	.word	.LANCHOR148
+	.word	.LANCHOR115
+	.word	.LANCHOR123
+	.word	.LANCHOR20
+	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
+	.section	.text.FtlLoadVonderInfo,"ax",%progbits
 	.align	1
-	.global	SupperBlkListInit
+	.global	FtlLoadVonderInfo
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	SupperBlkListInit, %function
-SupperBlkListInit:
-	@ args = 0, pretend = 0, frame = 16
+	.type	FtlLoadVonderInfo, %function
+FtlLoadVonderInfo:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r2, #6
-	ldr	r3, .L947
-	movs	r1, #0
-	movs	r4, #0
-	ldr	r5, .L947+4
-	mov	r8, r4
-	ldrh	r3, [r3]
-	mov	r6, r4
-	ldr	r0, [r5]
-	mov	r10, r5
-	muls	r2, r3, r2
-	bl	ftl_memset
-	ldr	r3, .L947+8
-	ldr	r2, .L947+12
-	str	r4, [r3]
-	ldr	r3, .L947+16
-	strh	r4, [r2]	@ movhi
-	str	r2, [sp, #4]
-	str	r4, [r3]
-	ldr	r3, .L947+20
-	str	r4, [r3]
-	ldr	r3, .L947+24
-	mov	fp, r3
-	strh	r4, [r3]	@ movhi
-.L937:
-	ldr	r3, .L947+28
-	uxth	r7, r4
-	ldrh	r3, [r3]
-	cmp	r7, r3
-	bcs	.L943
-	ldr	r3, .L947+32
-	ldrh	r2, [r3]
-	ldr	r3, .L947+36
-	ldrh	r3, [r3]
-	str	r3, [sp]
-	movs	r3, #0
-	mov	r5, r3
-	b	.L944
-.L939:
-	str	r2, [sp, #12]
-	mov	r1, r7
-	ldr	r2, .L947+40
-	str	r3, [sp, #8]
-	ldrb	r0, [r2, r3]	@ zero_extendqisi2
-	bl	V2P_block
-	bl	FtlBbmIsBadBlock
-	ldr	r3, [sp, #8]
-	ldr	r2, [sp, #12]
-	cbnz	r0, .L938
-	ldr	r1, [sp]
-	add	r5, r5, r1
-	uxth	r5, r5
-.L938:
-	adds	r3, r3, #1
-.L944:
-	uxth	r1, r3
-	cmp	r2, r1
-	bhi	.L939
-	cbz	r5, .L946
-	mov	r1, r5
-	mov	r0, #32768
-	bl	__aeabi_idiv
-.L940:
-	ldr	r1, [r10]
-	uxth	r2, r4
-	movs	r3, #6
-	mla	r3, r3, r2, r1
-	strh	r0, [r3, #4]	@ movhi
-	ldr	r3, .L947+44
+	push	{r3, lr}
+	ldr	r3, .L985
+	ldr	r0, .L985+4
 	ldrh	r3, [r3]
-	cmp	r3, r7
-	beq	.L941
-	ldr	r3, .L947+48
+	strh	r3, [r0, #10]	@ movhi
+	movw	r3, #61574
+	strh	r3, [r0, #4]	@ movhi
+	ldr	r3, .L985+8
 	ldrh	r3, [r3]
-	cmp	r3, r7
-	beq	.L941
-	ldr	r3, .L947+52
+	strh	r3, [r0, #8]	@ movhi
+	ldr	r3, .L985+12
 	ldrh	r3, [r3]
-	cmp	r3, r7
-	beq	.L941
-	ldr	r3, .L947+56
+	strh	r3, [r0, #6]	@ movhi
+	ldr	r3, .L985+16
 	ldr	r3, [r3]
-	ldrh	r3, [r3, r2, lsl #1]
-	cbnz	r3, .L942
-	add	r8, r8, #1
-	mov	r0, r7
-	uxth	r8, r8
-	bl	INSERT_FREE_LIST
-.L941:
-	adds	r4, r4, #1
-	b	.L937
-.L946:
-	mov	r0, r5
-	b	.L940
-.L942:
-	adds	r6, r6, #1
-	mov	r0, r7
-	uxth	r6, r6
-	bl	INSERT_DATA_LIST
-	b	.L941
-.L943:
-	ldr	r2, [sp, #4]
-	strh	r8, [fp]	@ movhi
-	strh	r6, [r2]	@ movhi
-	add	r6, r6, r8
-	cmp	r6, r3
-	ble	.L945
-	movw	r2, #2154
-	ldr	r1, .L947+60
-	ldr	r0, .L947+64
-	bl	printf
-.L945:
+	str	r3, [r0, #12]
+	ldr	r3, .L985+20
+	ldr	r3, [r3]
+	str	r3, [r0, #16]
+	ldr	r3, .L985+24
+	ldr	r3, [r3]
+	str	r3, [r0, #20]
+	ldr	r3, .L985+28
+	ldr	r3, [r3]
+	str	r3, [r0, #24]
+	bl	FtlMapTblRecovery
 	movs	r0, #0
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L948:
-	.align	2
-.L947:
-	.word	.LANCHOR6
-	.word	.LANCHOR40
-	.word	.LANCHOR47
-	.word	.LANCHOR45
-	.word	.LANCHOR41
-	.word	.LANCHOR44
-	.word	.LANCHOR48
-	.word	.LANCHOR5
-	.word	.LANCHOR3
-	.word	.LANCHOR19
-	.word	.LANCHOR13
-	.word	.LANCHOR51
-	.word	.LANCHOR52
-	.word	.LANCHOR53
-	.word	.LANCHOR42
-	.word	.LANCHOR154
-	.word	.LC1
-	.size	SupperBlkListInit, .-SupperBlkListInit
-	.section	.text.ftl_check_vpc,"ax",%progbits
-	.align	1
-	.global	ftl_check_vpc
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_check_vpc, %function
-ftl_check_vpc:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r4, #0
-	ldr	r6, .L973
-	ldr	r5, .L973+4
-	ldr	r1, .L973+8
-	ldr	r0, .L973+12
-	bl	printf
-	mov	r2, #8192
-	movs	r1, #0
-	ldr	r0, .L973+4
-	bl	ftl_memset
-.L950:
-	ldr	r3, [r6]
-	cmp	r4, r3
-	bcc	.L952
-	ldr	r10, .L973+48
-	movs	r4, #0
-	ldr	r7, .L973+16
-	mov	r6, r4
-.L953:
-	ldrh	r2, [r10]
-	uxth	r3, r4
-	cmp	r2, r3
-	bhi	.L955
-	ldr	r3, .L973+20
-	ldr	r4, [r3]
-	cbz	r4, .L956
-	ldr	r3, .L973+24
-	mov	r8, #0
-	ldr	r5, .L973+28
-	ldr	r10, .L973+16
-	ldrh	r7, [r3]
-	ldr	r3, [r5]
-	ldr	fp, .L973+4
-	subs	r4, r4, r3
-	ldr	r3, .L973+32
-	asrs	r4, r4, #1
-	muls	r4, r3, r4
-	uxth	r4, r4
-.L957:
-	uxth	r3, r8
-	cmp	r7, r3
-	bls	.L956
-	ldr	r3, [r10]
-	ldrh	r2, [r3, r4, lsl #1]
-	cbz	r2, .L958
-	movs	r6, #1
-	ldrh	r3, [fp, r4, lsl #1]
-	mov	r1, r4
-	ldr	r0, .L973+36
-	bl	printf
-.L958:
-	movs	r3, #6
-	ldr	r2, [r5]
-	muls	r4, r3, r4
-	movw	r3, #65535
-	add	r8, r8, #1
-	ldrh	r4, [r2, r4]
-	cmp	r4, r3
-	bne	.L957
-.L956:
-	cbz	r6, .L949
-	movw	r2, #2321
-	ldr	r1, .L973+8
-	ldr	r0, .L973+40
-	bl	printf
-.L949:
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L952:
-	movs	r2, #0
-	add	r1, sp, #4
-	mov	r0, r4
-	bl	log2phys
-	ldr	r0, [sp, #4]
-	adds	r3, r0, #1
-	beq	.L951
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-	ldrh	r3, [r5, r0, lsl #1]
-	adds	r3, r3, #1
-	strh	r3, [r5, r0, lsl #1]	@ movhi
-.L951:
-	adds	r4, r4, #1
-	b	.L950
-.L955:
-	ldr	r3, [r7]
-	uxth	r5, r4
-	ldr	r8, .L973+4
-	ldrh	r2, [r3, r5, lsl #1]
-	ldrh	r3, [r8, r5, lsl #1]
-	cmp	r2, r3
-	beq	.L954
-	mov	r1, r5
-	ldr	r0, .L973+44
-	bl	printf
-	ldr	r3, [r7]
-	movw	r2, #65535
-	ldrh	r3, [r3, r5, lsl #1]
-	cmp	r3, r2
-	beq	.L954
-	ldrh	r2, [r8, r5, lsl #1]
-	cmp	r2, r3
-	it	hi
-	movhi	r6, #1
-.L954:
-	adds	r4, r4, #1
-	b	.L953
-.L974:
+	pop	{r3, pc}
+.L986:
 	.align	2
-.L973:
-	.word	.LANCHOR61
-	.word	check_vpc_table
-	.word	.LANCHOR155
-	.word	.LC94
-	.word	.LANCHOR42
-	.word	.LANCHOR47
-	.word	.LANCHOR48
-	.word	.LANCHOR40
-	.word	-1431655765
-	.word	.LC96
-	.word	.LC1
-	.word	.LC95
-	.word	.LANCHOR5
-	.size	ftl_check_vpc, .-ftl_check_vpc
-	.section	.text.FtlGcPageVarInit,"ax",%progbits
+.L985:
+	.word	.LANCHOR27
+	.word	.LANCHOR158
+	.word	.LANCHOR35
+	.word	.LANCHOR28
+	.word	.LANCHOR36
+	.word	.LANCHOR132
+	.word	.LANCHOR131
+	.word	.LANCHOR133
+	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
+	.section	.text.FtlLoadMapInfo,"ax",%progbits
 	.align	1
-	.global	FtlGcPageVarInit
+	.global	FtlLoadMapInfo
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlGcPageVarInit, %function
-FtlGcPageVarInit:
+	.type	FtlLoadMapInfo, %function
+FtlLoadMapInfo:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L976
-	movs	r3, #0
-	push	{r4, lr}
-	movs	r1, #255
-	ldr	r4, .L976+4
-	strh	r3, [r2]	@ movhi
-	ldr	r2, .L976+8
-	strh	r3, [r2]	@ movhi
-	ldrh	r2, [r4]
-	ldr	r3, .L976+12
-	lsls	r2, r2, #1
-	ldr	r0, [r3]
-	bl	ftl_memset
-	ldrh	r3, [r4]
-	movs	r2, #12
-	movs	r1, #255
-	muls	r2, r3, r2
-	ldr	r3, .L976+16
-	ldr	r0, [r3]
-	bl	ftl_memset
-	pop	{r4, lr}
-	b	FtlGcBufInit
-.L977:
+	push	{r3, lr}
+	bl	FtlL2PDataInit
+	ldr	r0, .L988
+	bl	FtlMapTblRecovery
+	movs	r0, #0
+	pop	{r3, pc}
+.L989:
 	.align	2
-.L976:
-	.word	.LANCHOR96
-	.word	.LANCHOR21
-	.word	.LANCHOR97
-	.word	.LANCHOR95
-	.word	.LANCHOR98
-	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
-	.section	.text.FtlGcScanTempBlk,"ax",%progbits
+.L988:
+	.word	.LANCHOR140
+	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
+	.section	.text.flush_l2p_region,"ax",%progbits
 	.align	1
-	.global	FtlGcScanTempBlk
+	.global	flush_l2p_region
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlGcScanTempBlk, %function
-FtlGcScanTempBlk:
-	@ args = 0, pretend = 0, frame = 24
+	.type	flush_l2p_region, %function
+flush_l2p_region:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1001
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #24
-	mov	r5, r0
-	str	r1, [sp, #8]
-	ldrh	r4, [r3]
-	movw	r3, #65535
-	cmp	r4, r3
-	beq	.L995
-	cbnz	r4, .L979
-.L980:
-	bl	FtlGcPageVarInit
-	b	.L981
-.L995:
-	movs	r4, #0
-.L979:
-	ldr	r3, .L1001+4
-	ldr	r2, [sp, #8]
-	ldrh	r3, [r3]
-	cmp	r3, r2
-	beq	.L980
-.L981:
-	movs	r7, #0
-.L989:
-	ldrh	r2, [r5]
-	movw	r3, #65535
+	push	{r3, r4, r5, lr}
+	movs	r4, #12
+	ldr	r5, .L991
+	muls	r4, r0, r4
+	ldr	r0, .L991+4
+	ldr	r3, [r5]
+	adds	r2, r3, r4
+	ldrh	r1, [r3, r4]
+	ldr	r2, [r2, #8]
+	bl	FtlMapWritePage
+	ldr	r3, [r5]
 	movs	r0, #0
-	strb	r0, [r5, #8]
-	cmp	r2, r3
-	beq	.L982
+	add	r4, r4, r3
+	ldr	r3, [r4, #4]
+	bic	r3, r3, #-2147483648
+	str	r3, [r4, #4]
+	pop	{r3, r4, r5, pc}
 .L992:
-	ldr	r3, .L1001+8
-	movs	r2, #0
-	add	ip, r5, #16
-	mov	r6, r2
-	movw	lr, #65535
-	mov	r8, #20
-	ldrh	fp, [r3]
-	ldr	r3, .L1001+12
-	ldr	r3, [r3]
-	str	r3, [sp, #4]
-	ldr	r3, .L1001+16
-	ldr	r3, [r3]
-	str	r3, [sp, #12]
-	ldr	r3, .L1001+20
-	ldrh	r3, [r3]
-	str	r3, [sp, #16]
-	ldr	r3, .L1001+24
-	ldr	r3, [r3]
-	str	r3, [sp, #20]
-	ldr	r3, .L1001+28
-	ldrh	r10, [r3]
-.L983:
-	uxth	r3, r2
-	cmp	fp, r3
-	bhi	.L985
-	mov	r8, #0
-	mov	fp, #20
-	movs	r2, #0
-	mov	r1, r6
-	ldr	r0, [sp, #4]
-	bl	FlashReadPages
-.L986:
-	uxth	r3, r8
-	cmp	r6, r3
-	bhi	.L990
-	ldr	r3, [sp, #8]
-	adds	r7, r7, #1
-	adds	r4, r4, #1
-	ldr	r2, .L1001+4
-	uxth	r4, r4
-	cmp	r3, r7
-	bls	.L991
-.L993:
-	ldrh	r3, [r2]
-	cmp	r3, r4
-	bhi	.L992
-	movs	r0, #0
-	b	.L982
-.L985:
-	ldrh	r3, [ip], #2
-	cmp	r3, lr
-	beq	.L984
-	ldr	r1, [sp, #4]
-	orr	r3, r4, r3, lsl #10
-	ldr	r0, [sp, #12]
-	mla	r1, r8, r6, r1
-	str	r3, [r1, #4]
-	ldr	r3, [sp, #16]
-	muls	r3, r6, r3
-	bic	r3, r3, #3
-	add	r3, r3, r0
-	ldr	r0, [sp, #20]
-	str	r3, [r1, #8]
-	mul	r3, r10, r6
-	adds	r6, r6, #1
-	uxth	r6, r6
-	bic	r3, r3, #3
-	add	r3, r3, r0
-	str	r3, [r1, #12]
-.L984:
-	adds	r2, r2, #1
-	b	.L983
-.L990:
-	ldr	r3, .L1001+12
-	mul	r10, fp, r8
-	ldr	r2, [r3]
-	add	r3, r2, r10
-	str	r2, [sp, #16]
-	ldr	r1, [r3, #4]
-	str	r3, [sp, #12]
-	ubfx	r0, r1, #10, #16
-	str	r1, [sp, #4]
-	bl	P2V_plane
-	ldr	r2, [sp, #16]
-	ldr	r2, [r2, r10]
-	cbnz	r2, .L987
-	ldr	r3, [sp, #12]
-	movw	r2, #65535
-	add	r8, r8, #1
-	ldr	r1, [sp, #4]
-	ldr	r3, [r3, #12]
-	ldrh	ip, [r3]
-	cmp	ip, r2
-	bne	.L988
-	ldr	r3, .L1001+32
-	movs	r2, #1
-	str	r2, [r3]
-.L982:
-	ldr	r3, .L1001
-	movw	r2, #65535
-	strb	r0, [r5, #6]
-	mov	r1, r4
-	strh	r4, [r5, #2]	@ movhi
-	strh	r2, [r3]	@ movhi
-	mov	r2, r0
-	mov	r0, r5
-	bl	ftl_sb_update_avl_pages
-	b	.L994
-.L988:
-	ldr	r2, [r3, #8]
-	ldr	r0, [r3, #12]
-	bl	FtlGcUpdatePage
-	b	.L986
-.L987:
-	ldr	r3, .L1001+36
-	movs	r4, #0
-	ldrh	r2, [r5]
-	ldr	r3, [r3]
-	strh	r4, [r3, r2, lsl #1]	@ movhi
-	ldrh	r0, [r5]
-	bl	INSERT_FREE_LIST
-	movw	r3, #65535
-	strh	r3, [r5]	@ movhi
-	bl	FtlGcPageVarInit
-	b	.L989
-.L991:
-	ldr	r1, .L1001
-	movw	r0, #65535
-	ldrh	r3, [r1]
-	cmp	r3, r0
-	beq	.L993
-	add	r3, r3, r7
-	strh	r3, [r1]	@ movhi
-	ldrh	r3, [r2]
-	cmp	r3, r4
-	bls	.L993
-.L994:
-	mov	r0, #-1
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1002:
 	.align	2
-.L1001:
-	.word	.LANCHOR156
-	.word	.LANCHOR19
-	.word	.LANCHOR3
-	.word	.LANCHOR120
-	.word	.LANCHOR91
-	.word	.LANCHOR23
-	.word	.LANCHOR92
-	.word	.LANCHOR24
-	.word	.LANCHOR152
-	.word	.LANCHOR42
-	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
-	.section	.text.FlashTestBlk,"ax",%progbits
+.L991:
+	.word	.LANCHOR55
+	.word	.LANCHOR140
+	.size	flush_l2p_region, .-flush_l2p_region
+	.section	.text.log2phys,"ax",%progbits
 	.align	1
-	.global	FlashTestBlk
+	.global	log2phys
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashTestBlk, %function
-FlashTestBlk:
-	@ args = 0, pretend = 0, frame = 88
+	.type	log2phys, %function
+log2phys:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	cmp	r0, #11
-	push	{r4, r5, lr}
-	mov	r4, r0
-	sub	sp, sp, #92
-	bls	.L1005
-	ldr	r5, .L1006
-	add	r0, sp, #24
-	movs	r2, #32
-	movs	r1, #165
-	str	r0, [sp, #16]
-	lsls	r4, r4, #10
-	str	r5, [sp, #12]
-	bl	ftl_memset
-	movs	r2, #8
-	movs	r1, #90
-	mov	r0, r5
-	bl	ftl_memset
-	movs	r2, #1
-	add	r0, sp, #4
-	mov	r1, r2
-	str	r4, [sp, #8]
-	bl	FlashEraseBlocks
-	movs	r3, #1
-	add	r0, sp, #4
-	mov	r2, r3
-	mov	r1, r3
-	bl	FlashProgPages
-	ldr	r4, [sp, #4]
-	movs	r2, #1
-	movs	r1, #0
-	add	r0, sp, #4
-	adds	r4, r4, #0
-	it	ne
-	movne	r4, #1
-	negs	r4, r4
-	bl	FlashEraseBlocks
-.L1003:
-	mov	r0, r4
-	add	sp, sp, #92
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r7, r2
+	ldr	r4, .L1006
+	mov	r10, r0
+	mov	r5, r1
+	ldr	r3, .L1006+4
+	ldr	r2, [r4]
+	ldrh	fp, [r3]
+	cmp	r0, r2
+	bcc	.L994
+	movw	r2, #811
+	ldr	r1, .L1006+8
+	ldr	r0, .L1006+12
+	bl	printf
+.L994:
+	ldr	r3, [r4]
+	cmp	r10, r3
+	bcs	.L995
+	ldr	r3, .L1006+16
+	add	fp, fp, #7
+	lsr	r6, r10, fp
+	movs	r2, #0
+	ldrh	r1, [r3]
+	uxth	r6, r6
+	ldr	r3, .L1006+20
+	ldr	r0, [r3]
+	mov	r8, r3
+	movs	r3, #12
+.L996:
+	uxth	r4, r2
+	cmp	r4, r1
+	bcc	.L1001
+	str	r3, [sp, #4]
+	bl	select_l2p_ram_region
+	ldr	r3, [sp, #4]
+	mov	r4, r0
+	ldr	r2, [r8]
+	muls	r3, r0, r3
+	adds	r1, r2, r3
+	ldrh	r2, [r2, r3]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L1002
+	ldr	r3, [r1, #4]
+	cmp	r3, #0
+	bge	.L1002
+	bl	flush_l2p_region
+.L1002:
+	mov	r1, r4
+	mov	r0, r6
+	bl	load_l2p_region
+	b	.L998
+.L995:
+	mov	r0, #-1
+	cbnz	r7, .L993
+	str	r0, [r5]
+.L993:
+	add	sp, sp, #8
 	@ sp needed
-	pop	{r4, r5, pc}
-.L1005:
-	movs	r4, #0
-	b	.L1003
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1001:
+	adds	r2, r2, #1
+	mla	ip, r3, r2, r0
+	ldrh	ip, [ip, #-12]
+	cmp	ip, r6
+	bne	.L996
+.L998:
+	movs	r0, #1
+	ldr	r2, [r8]
+	lsl	r0, r0, fp
+	movs	r3, #12
+	subs	r0, r0, #1
+	and	r0, r0, r10
+	uxth	r0, r0
+	mla	r3, r3, r4, r2
+	cbnz	r7, .L999
+	ldr	r3, [r3, #8]
+	ldr	r3, [r3, r0, lsl #2]
+	str	r3, [r5]
+.L1000:
+	ldr	r2, [r8]
+	movs	r3, #12
+	mla	r4, r3, r4, r2
+	ldr	r3, [r4, #4]
+	adds	r2, r3, #1
+	beq	.L1004
+	adds	r3, r3, #1
+	str	r3, [r4, #4]
+.L1004:
+	movs	r0, #0
+	b	.L993
+.L999:
+	ldr	r1, [r5]
+	ldr	r2, [r3, #8]
+	str	r1, [r2, r0, lsl #2]
+	ldr	r2, [r3, #4]
+	orr	r2, r2, #-2147483648
+	str	r2, [r3, #4]
+	ldr	r3, .L1006+24
+	strh	r6, [r3]	@ movhi
+	b	.L1000
 .L1007:
 	.align	2
 .L1006:
-	.word	ftl_temp_buf
-	.size	FlashTestBlk, .-FlashTestBlk
-	.section	.text.FlashGetBadBlockList,"ax",%progbits
+	.word	.LANCHOR61
+	.word	.LANCHOR22
+	.word	.LANCHOR159
+	.word	.LC1
+	.word	.LANCHOR33
+	.word	.LANCHOR55
+	.word	.LANCHOR56
+	.size	log2phys, .-log2phys
+	.section	.text.FtlReUsePrevPpa,"ax",%progbits
 	.align	1
-	.global	FlashGetBadBlockList
+	.global	FtlReUsePrevPpa
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashGetBadBlockList, %function
-FlashGetBadBlockList:
-	@ args = 0, pretend = 0, frame = 0
+	.type	FtlReUsePrevPpa, %function
+FtlReUsePrevPpa:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	mov	r2, #256
-	mov	r5, r1
-	movs	r1, #255
-	mov	r4, r0
-	bl	ftl_memset
-	ldr	r3, .L1015
-	mov	r1, r5
-	mov	r0, r4
-	ldr	r3, [r3]
-	blx	r3
-	uxth	r0, r0
-	cmp	r0, #50
-	bls	.L1009
-	mov	r2, #256
-	movs	r1, #255
-	mov	r0, r4
-	bl	ftl_memset
-	movs	r0, #0
-.L1009:
-	ldr	r3, .L1015+4
-	ldrh	r3, [r3, #14]
-	cmp	r3, #4
-	bne	.L1014
-	add	r1, r4, r0, lsl #1
-	mov	r3, r4
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	mov	r6, r0
+	ldr	r5, .L1018
+	ubfx	r0, r1, #10, #16
+	str	r1, [sp, #4]
+	bl	P2V_block_in_plane
+	ldr	r2, [r5]
+	mov	r7, r0
+	ldrh	r3, [r2, r0, lsl #1]
+	cbnz	r3, .L1009
+	ldr	r2, .L1018+4
+	ldr	r4, [r2]
+	cmp	r4, #0
+	beq	.L1010
+	ldr	r2, .L1018+8
+	movw	lr, #65535
+	ldr	ip, .L1018+24
+	ldr	r0, .L1018+12
+	ldr	r2, [r2]
+	ldrh	r1, [r0]
+	mov	r8, r0
+	subs	r4, r4, r2
+	asrs	r4, r4, #1
+	mul	r4, ip, r4
+	mov	ip, #6
+	uxth	r4, r4
 .L1011:
-	cmp	r3, r1
+	uxth	r0, r3
+	cmp	r1, r0
+	bls	.L1010
+	cmp	r4, r7
 	bne	.L1012
-.L1014:
-	pop	{r3, r4, r5, pc}
+	mov	r1, r4
+	ldr	r0, .L1018+4
+	bl	List_remove_node
+	ldrh	r3, [r8]
+	cbnz	r3, .L1013
+	movw	r2, #1699
+	ldr	r1, .L1018+16
+	ldr	r0, .L1018+20
+	bl	printf
+.L1013:
+	ldrh	r3, [r8]
+	mov	r0, r4
+	subs	r3, r3, #1
+	strh	r3, [r8]	@ movhi
+	bl	INSERT_DATA_LIST
+	ldr	r2, [r5]
+	ldrh	r3, [r2, r7, lsl #1]
+.L1009:
+	adds	r3, r3, #1
+	strh	r3, [r2, r7, lsl #1]	@ movhi
+	b	.L1010
 .L1012:
-	ldrh	r2, [r3]
-	lsrs	r2, r2, #1
-	strh	r2, [r3], #2	@ movhi
-	b	.L1011
-.L1016:
+	mul	r4, ip, r4
+	adds	r3, r3, #1
+	ldrh	r4, [r2, r4]
+	cmp	r4, lr
+	bne	.L1011
+.L1010:
+	movs	r2, #1
+	add	r1, sp, #4
+	mov	r0, r6
+	bl	log2phys
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1019:
 	.align	2
-.L1015:
-	.word	.LANCHOR105
-	.word	.LANCHOR0
-	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
-	.section	.text.ftl_memcpy,"ax",%progbits
+.L1018:
+	.word	.LANCHOR42
+	.word	.LANCHOR47
+	.word	.LANCHOR40
+	.word	.LANCHOR48
+	.word	.LANCHOR160
+	.word	.LC1
+	.word	-1431655765
+	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
+	.section	.text.ftl_check_vpc,"ax",%progbits
 	.align	1
-	.global	ftl_memcpy
+	.global	ftl_check_vpc
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_memcpy, %function
-ftl_memcpy:
-	@ args = 0, pretend = 0, frame = 0
+	.type	ftl_check_vpc, %function
+ftl_check_vpc:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	memcpy
-	.size	ftl_memcpy, .-ftl_memcpy
-	.section	.text.FtlBbmTblFlush,"ax",%progbits
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #0
+	ldr	r6, .L1044
+	ldr	r5, .L1044+4
+	ldr	r1, .L1044+8
+	ldr	r0, .L1044+12
+	bl	printf
+	mov	r2, #8192
+	movs	r1, #0
+	ldr	r0, .L1044+4
+	bl	ftl_memset
+.L1021:
+	ldr	r3, [r6]
+	cmp	r4, r3
+	bcc	.L1023
+	ldr	r10, .L1044+48
+	movs	r4, #0
+	ldr	r7, .L1044+16
+	mov	r6, r4
+.L1024:
+	ldrh	r2, [r10]
+	uxth	r3, r4
+	cmp	r2, r3
+	bhi	.L1026
+	ldr	r3, .L1044+20
+	ldr	r4, [r3]
+	cbz	r4, .L1027
+	ldr	r3, .L1044+24
+	mov	r8, #0
+	ldr	r5, .L1044+28
+	ldr	r10, .L1044+16
+	ldrh	r7, [r3]
+	ldr	r3, [r5]
+	ldr	fp, .L1044+4
+	subs	r4, r4, r3
+	ldr	r3, .L1044+32
+	asrs	r4, r4, #1
+	muls	r4, r3, r4
+	uxth	r4, r4
+.L1028:
+	uxth	r3, r8
+	cmp	r7, r3
+	bls	.L1027
+	ldr	r3, [r10]
+	ldrh	r2, [r3, r4, lsl #1]
+	cbz	r2, .L1029
+	movs	r6, #1
+	ldrh	r3, [fp, r4, lsl #1]
+	mov	r1, r4
+	ldr	r0, .L1044+36
+	bl	printf
+.L1029:
+	movs	r3, #6
+	ldr	r2, [r5]
+	muls	r4, r3, r4
+	movw	r3, #65535
+	add	r8, r8, #1
+	ldrh	r4, [r2, r4]
+	cmp	r4, r3
+	bne	.L1028
+.L1027:
+	cbz	r6, .L1020
+	movw	r2, #2343
+	ldr	r1, .L1044+8
+	ldr	r0, .L1044+40
+	bl	printf
+.L1020:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1023:
+	movs	r2, #0
+	add	r1, sp, #4
+	mov	r0, r4
+	bl	log2phys
+	ldr	r0, [sp, #4]
+	adds	r3, r0, #1
+	beq	.L1022
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	ldrh	r3, [r5, r0, lsl #1]
+	adds	r3, r3, #1
+	strh	r3, [r5, r0, lsl #1]	@ movhi
+.L1022:
+	adds	r4, r4, #1
+	b	.L1021
+.L1026:
+	ldr	r3, [r7]
+	uxth	r5, r4
+	ldr	r8, .L1044+4
+	ldrh	r2, [r3, r5, lsl #1]
+	ldrh	r3, [r8, r5, lsl #1]
+	cmp	r2, r3
+	beq	.L1025
+	mov	r1, r5
+	ldr	r0, .L1044+44
+	bl	printf
+	ldr	r3, [r7]
+	movw	r2, #65535
+	ldrh	r3, [r3, r5, lsl #1]
+	cmp	r3, r2
+	beq	.L1025
+	ldrh	r2, [r8, r5, lsl #1]
+	cmp	r2, r3
+	it	hi
+	movhi	r6, #1
+.L1025:
+	adds	r4, r4, #1
+	b	.L1024
+.L1045:
+	.align	2
+.L1044:
+	.word	.LANCHOR61
+	.word	check_vpc_table
+	.word	.LANCHOR161
+	.word	.LC94
+	.word	.LANCHOR42
+	.word	.LANCHOR47
+	.word	.LANCHOR48
+	.word	.LANCHOR40
+	.word	-1431655765
+	.word	.LC96
+	.word	.LC1
+	.word	.LC95
+	.word	.LANCHOR5
+	.size	ftl_check_vpc, .-ftl_check_vpc
+	.section	.text.ftl_scan_all_data,"ax",%progbits
 	.align	1
-	.global	FtlBbmTblFlush
+	.global	ftl_scan_all_data
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlBbmTblFlush, %function
-FtlBbmTblFlush:
+	.type	ftl_scan_all_data, %function
+ftl_scan_all_data:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r4, #0
-	ldr	r7, .L1027
+	push	{r4, r5, r6, r7, r8, lr}
+	movs	r5, #0
+	ldr	r7, .L1060
+	sub	sp, sp, #32
 	movs	r1, #0
-	ldr	r5, .L1027+4
+	ldr	r8, .L1060+24
+	ldr	r0, .L1060+4
+	bl	printf
+.L1047:
 	ldr	r3, [r7]
-	mov	fp, r7
-	ldr	r8, .L1027+48
-	ldr	r6, .L1027+8
-	str	r3, [r5, #12]
-	ldr	r7, .L1027+12
-	ldr	r3, .L1027+16
-	ldr	r10, .L1027+52
-	ldr	r0, [r8]
-	ldrh	r2, [r3]
-	str	r0, [r5, #8]
-	bl	ftl_memset
-.L1019:
-	ldrh	r3, [r7]
-	cmp	r4, r3
-	blt	.L1020
-	ldr	r6, [r5, #12]
-	movs	r2, #16
-	ldr	r4, .L1027+20
-	movs	r1, #255
-	movs	r7, #0
-	mov	r0, r6
-	bl	ftl_memset
-	movw	r3, #61649
-	mov	r10, r4
-	strh	r3, [r6]	@ movhi
-	ldr	r3, [r4, #8]
-	str	r7, [sp, #12]
-	str	r3, [r6, #4]
-	ldrh	r3, [r4]
-	strh	r3, [r6, #2]	@ movhi
-	ldrh	r3, [r4, #4]
-	strh	r3, [r6, #8]	@ movhi
-	ldrh	r3, [r4, #6]
-	strh	r3, [r6, #10]	@ movhi
-	ldr	r3, .L1027+24
-	ldr	r3, [r3]
-	strh	r3, [r6, #12]	@ movhi
-.L1021:
-	ldr	r3, [r8]
-	ldrh	r1, [r4]
-	ldrh	r2, [r4, #2]
-	str	r3, [r5, #8]
-	ldr	r3, [fp]
-	ldrh	r0, [r6, #10]
-	str	r3, [r5, #12]
-	movs	r3, #0
-	str	r3, [r5]
-	orr	r3, r2, r1, lsl #10
-	str	r3, [r5, #4]
-	ldrh	r3, [r4, #4]
-	str	r0, [sp]
-	ldr	r0, .L1027+28
+	cmp	r5, r3
+	bcc	.L1053
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1053:
+	movs	r2, #0
+	add	r1, sp, #28
+	mov	r0, r5
+	bl	log2phys
+	ubfx	r3, r5, #0, #11
+	cbnz	r3, .L1048
+	ldr	r2, [sp, #28]
+	mov	r1, r5
+	mov	r0, r8
 	bl	printf
-	movs	r3, #1
-	ldr	r0, .L1027+4
-	mov	r2, r3
-	mov	r1, r3
-	bl	FlashProgPages
-	ldr	r3, .L1027+32
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r3]
-	subs	r3, r3, #1
-	cmp	r2, r3
-	blt	.L1022
-	ldr	r3, [r4, #8]
-	mov	r1, #0	@ movhi
-	ldrh	r2, [r4]
-	strh	r1, [r4, #2]	@ movhi
-	adds	r3, r3, #1
+.L1048:
+	ldr	r3, [sp, #28]
+	adds	r2, r3, #1
+	beq	.L1050
+	ldr	r4, .L1060+8
+	movs	r2, #0
+	movs	r1, #1
+	str	r3, [r4, #4]
+	mov	r0, r4
+	ldr	r3, .L1060+12
+	str	r5, [r4, #16]
+	str	r2, [r4]
+	ldr	r3, [r3]
 	str	r3, [r4, #8]
-	str	r3, [r6, #4]
-	strh	r2, [r6, #8]	@ movhi
-	ldrh	r3, [r4, #4]
-	strh	r2, [r4, #4]	@ movhi
-	ldr	r2, .L1027+36
-	strh	r3, [r4]	@ movhi
-	lsls	r3, r3, #10
-	ldr	r0, [r2]
-	movs	r2, #1
-	str	r3, [r5, #4]
-	mov	r1, r2
-	str	r3, [r0, #4]
-	bl	FlashEraseBlocks
-	movs	r3, #1
-	ldr	r0, .L1027+4
-	mov	r2, r3
-	mov	r1, r3
-	bl	FlashProgPages
-.L1022:
-	ldrh	r3, [r10, #2]
-	adds	r3, r3, #1
-	strh	r3, [r10, #2]	@ movhi
-	ldr	r3, [r5]
+	ldr	r3, .L1060+16
+	ldr	r6, [r3]
+	str	r6, [r4, #12]
+	bl	FlashReadPages
+	ldr	r3, [r4]
+	cmp	r3, #256
+	beq	.L1051
 	adds	r3, r3, #1
-	bne	.L1023
-	adds	r7, r7, #1
-	ldr	r1, [r5, #4]
-	uxth	r7, r7
-	ldr	r0, .L1027+40
-	bl	printf
-	cmp	r7, #3
-	bls	.L1021
-	mov	r2, r7
-	ldr	r1, [r5, #4]
-	ldr	r0, .L1027+44
+	beq	.L1051
+	ldr	r3, [r6, #8]
+	cmp	r5, r3
+	beq	.L1050
+.L1051:
+	ldr	r2, [r4, #8]
+	ldr	r3, [r4, #12]
+	ldr	r0, .L1060+20
+	ldr	r1, [r2, #4]
+	str	r1, [sp, #16]
+	mov	r1, r5
+	ldr	r2, [r2]
+	str	r2, [sp, #12]
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	ldr	r2, [r3, #8]
+	str	r2, [sp, #4]
+	ldr	r2, [r3, #4]
+	str	r2, [sp]
+	ldr	r2, [r4, #4]
+	ldr	r3, [r3]
 	bl	printf
-.L1025:
-	b	.L1025
-.L1020:
-	ldrh	r2, [r10]
-	ldr	r3, [r5, #8]
-	ldr	r1, [r6, #4]!
-	mul	r0, r2, r4
-	lsls	r2, r2, #2
-	adds	r4, r4, #1
-	add	r0, r3, r0, lsl #2
-	bl	ftl_memcpy
-	b	.L1019
-.L1026:
-	movs	r3, #1
-	str	r3, [sp, #12]
-	b	.L1021
-.L1023:
-	ldr	r3, [sp, #12]
-	cmp	r3, #0
-	beq	.L1026
-	movs	r0, #0
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1028:
+.L1050:
+	adds	r5, r5, #1
+	b	.L1047
+.L1061:
 	.align	2
-.L1027:
-	.word	.LANCHOR108
-	.word	.LANCHOR106
-	.word	.LANCHOR37+24
-	.word	.LANCHOR10
-	.word	.LANCHOR23
-	.word	.LANCHOR37
-	.word	.LANCHOR2
+.L1060:
+	.word	.LANCHOR61
 	.word	.LC97
-	.word	.LANCHOR20
-	.word	.LANCHOR111
-	.word	.LC98
+	.word	.LANCHOR148
+	.word	.LANCHOR115
+	.word	.LANCHOR123
 	.word	.LC99
-	.word	.LANCHOR107
-	.word	.LANCHOR137
-	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
-	.section	.text.allocate_data_superblock,"ax",%progbits
+	.word	.LC98
+	.size	ftl_scan_all_data, .-ftl_scan_all_data
+	.section	.text.FtlGcScanTempBlk,"ax",%progbits
 	.align	1
-	.global	allocate_data_superblock
+	.global	FtlGcScanTempBlk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	allocate_data_superblock, %function
-allocate_data_superblock:
-	@ args = 0, pretend = 0, frame = 16
+	.type	FtlGcScanTempBlk, %function
+FtlGcScanTempBlk:
+	@ args = 0, pretend = 0, frame = 48
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r3, .L1092
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #48
 	mov	r4, r0
-	ldr	r8, .L1067
-.L1030:
-	ldr	r3, .L1067
-	ldr	r6, .L1067+4
-	ldr	fp, .L1067+76
-	ldrh	r3, [r3]
-	ldrh	r2, [r6]
-	add	r3, r3, r2
-	ldrh	r2, [fp]
-	cmp	r3, r2
-	ble	.L1031
-	movw	r2, #2588
-	ldr	r1, .L1067+8
-	ldr	r0, .L1067+12
-	bl	printf
-.L1031:
-	ldr	r3, .L1067+16
-	cmp	r4, r3
-	bne	.L1056
-	ldr	r2, .L1067+20
-	ldrh	r3, [r8]
-	ldr	r2, [r2]
-	lsrs	r1, r3, #1
-	muls	r2, r3, r2
-	adds	r1, r1, #1
-	add	r1, r1, r2, lsr #2
-	uxth	r1, r1
-	cbz	r1, .L1032
-	subs	r1, r1, #1
-	uxth	r1, r1
-.L1032:
-	ldr	r0, .L1067+24
-	bl	List_pop_index_node
-	ldrh	r3, [r8]
-	mov	r5, r0
-	uxth	r7, r0
-	cbnz	r3, .L1033
-	movw	r2, #2597
-	ldr	r1, .L1067+8
-	ldr	r0, .L1067+12
-	bl	printf
-.L1033:
-	ldrh	r3, [r8]
-	mov	r0, r4
-	subs	r3, r3, #1
-	strh	r3, [r8]	@ movhi
-	strh	r7, [r4]	@ movhi
-	bl	make_superblock
-	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1034
-	ldr	r3, .L1067+28
-	uxth	r5, r5
-	movw	r2, #65535
-	mov	r0, r7
-	ldr	r3, [r3]
-	strh	r2, [r3, r5, lsl #1]	@ movhi
-	bl	INSERT_DATA_LIST
-	ldrh	r2, [r6]
-	ldrh	r3, [r8]
-	add	r3, r3, r2
-	ldrh	r2, [fp]
-	cmp	r3, r2
-	ble	.L1030
-	mov	r2, #2608
-	ldr	r1, .L1067+8
-	ldr	r0, .L1067+12
-	bl	printf
-	b	.L1030
-.L1056:
-	movs	r1, #0
-	b	.L1032
-.L1034:
-	ldrh	r2, [r6]
-	ldrh	r3, [r8]
-	add	r3, r3, r2
-	ldrh	r2, [fp]
+	str	r1, [sp, #8]
+	ldrh	r5, [r3]
+	movw	r3, #65535
+	cmp	r5, r3
+	beq	.L1086
+	cbnz	r5, .L1063
+.L1064:
+	bl	FtlGcPageVarInit
+	b	.L1065
+.L1086:
+	movs	r5, #0
+.L1063:
+	ldr	r3, .L1092+4
+	ldr	r2, [sp, #8]
+	ldrh	r3, [r3]
 	cmp	r3, r2
-	ble	.L1036
-	movw	r2, #2611
-	ldr	r1, .L1067+8
-	ldr	r0, .L1067+12
-	bl	printf
-.L1036:
-	ldr	r3, .L1067+32
-	movs	r6, #0
-	ldr	r2, .L1067+36
-	add	ip, r4, #16
-	mov	lr, r6
-	movw	r10, #65535
-	ldr	r0, [r3]
-	ldrh	r1, [r2]
-	movs	r2, #20
-	str	r2, [sp, #4]
-	mov	r3, r0
-	mla	r1, r2, r1, r0
-	str	r1, [sp]
-.L1037:
-	ldr	r2, [sp]
+	beq	.L1064
+.L1065:
+	ldr	fp, .L1092+48
+	movs	r3, #0
+	str	r3, [sp]
+.L1066:
+	ldrh	r2, [r4]
+	movs	r3, #0
+	strb	r3, [r4, #8]
+	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1039
-	cbnz	r6, .L1040
-	movw	r2, #2622
-	ldr	r1, .L1067+8
-	ldr	r0, .L1067+12
-	bl	printf
-.L1040:
-	ldr	r3, .L1067+40
+	beq	.L1067
+.L1083:
+	ldr	r3, .L1092+8
+	movs	r2, #0
+	ldr	r0, [fp]
+	mov	r7, r2
+	movw	lr, #65535
+	mov	r8, #20
+	ldrh	r10, [r3]
+	ldr	r3, .L1092+12
+	ldr	r3, [r3]
+	str	r3, [sp, #12]
+	ldr	r3, .L1092+16
 	ldrh	r3, [r3]
-	cmp	r3, r7
-	bne	.L1041
-	mov	r2, #2624
-	ldr	r1, .L1067+8
-	ldr	r0, .L1067+12
-	bl	printf
-.L1041:
-	ldrb	r1, [r4, #8]	@ zero_extendqisi2
-	uxth	r5, r5
-	ldr	r2, .L1067+44
-	ldr	r3, .L1067+48
-	ldr	r10, .L1067+80
-	cmp	r1, #0
-	bne	.L1042
-	ldr	r0, [r2]
-	ldrh	lr, [r0, r5, lsl #1]
-	cmp	lr, #0
-	beq	.L1043
-	ldr	r1, .L1067+52
-	ldrh	ip, [r1]
-	add	r1, lr, ip
-.L1066:
-	strh	r1, [r0, r5, lsl #1]	@ movhi
-	mov	r0, r7
-	ldr	r1, [r3]
-	str	r2, [sp, #4]
-	str	r3, [sp]
-	adds	r1, r1, #1
-	str	r1, [r3]
-	movs	r1, #0
-	bl	ftl_set_blk_mode
+	str	r3, [sp, #16]
+	ldr	r3, .L1092+20
+	ldr	r3, [r3]
+	str	r3, [sp, #20]
+	ldr	r3, .L1092+24
+	ldrh	ip, [r3]
+	add	r3, r4, #16
+	str	r3, [sp, #4]
+.L1068:
+	uxth	r3, r2
+	cmp	r10, r3
+	bhi	.L1070
+	mov	r10, #0
+	movs	r2, #0
+	mov	r1, r7
+	bl	FlashReadPages
+.L1071:
+	uxth	r3, r10
+	cmp	r7, r3
+	bhi	.L1081
 	ldr	r3, [sp]
-	ldr	r2, [sp, #4]
-.L1045:
-	ldr	r2, [r2]
-	lsls	r1, r5, #1
-	str	r1, [sp]
-	ldrh	r0, [r2, r5, lsl #1]
-	ldr	r2, .L1067+56
-	ldr	r1, [r2]
-	cmp	r0, r1
-	ldrh	r1, [fp]
-	it	hi
-	strhi	r0, [r2]
-	ldr	r2, .L1067+52
-	ldr	r0, [r3]
-	ldr	r3, [r10]
-	ldrh	r2, [r2]
-	mla	r0, r0, r2, r3
-	bl	__aeabi_uidiv
-	ldr	r3, .L1067+60
-	ldr	ip, .L1067+84
-	str	r0, [r3]
-	ldr	r3, .L1067+64
-	ldr	r2, [r3]
-	ldr	r3, [r2, #16]
+	adds	r5, r5, #1
+	uxth	r5, r5
 	adds	r3, r3, #1
-	str	r3, [r2, #16]
-	movs	r2, #20
-	ldr	r3, .L1067+32
-	ldr	r0, [r3]
-	adds	r3, r0, #4
-	mla	r2, r2, r6, r0
-	adds	r2, r2, #24
-.L1047:
-	adds	r3, r3, #20
-	cmp	r2, r3
-	bne	.L1048
-	ldrb	r1, [r4, #8]	@ zero_extendqisi2
-	mov	r2, r6
-	mov	r10, #0
-	bl	FlashEraseBlocks
-	mov	r3, r10
-	movs	r1, #20
-.L1049:
-	uxth	r2, r10
-	cmp	r6, r2
-	bhi	.L1051
-	cbz	r3, .L1052
-	mov	r0, r7
-	bl	update_multiplier_value
-	bl	FtlBbmTblFlush
-.L1052:
-	ldrb	r2, [r4, #7]	@ zero_extendqisi2
-	ldr	r1, .L1067+28
-	cmp	r2, #0
-	bne	.L1053
-	ldr	r3, [r1]
+	str	r3, [sp]
+	ldr	r2, [sp]
+	ldr	r3, [sp, #8]
+	cmp	r3, r2
+	ldr	r2, .L1092+4
+	bls	.L1082
+.L1084:
+	ldrh	r3, [r2]
+	cmp	r3, r5
+	bhi	.L1083
+.L1067:
+	ldr	r3, .L1092
 	movw	r2, #65535
-	mov	r0, r7
-	strh	r2, [r3, r5, lsl #1]	@ movhi
-	bl	INSERT_DATA_LIST
-	b	.L1030
-.L1039:
-	ldrh	r1, [ip], #2
-	str	lr, [r3, #8]
-	str	lr, [r3, #12]
-	cmp	r1, r10
-	beq	.L1038
-	ldr	r2, [sp, #4]
-	lsls	r1, r1, #10
-	mla	r2, r2, r6, r0
-	adds	r6, r6, #1
-	uxth	r6, r6
-	str	r1, [r2, #4]
-.L1038:
-	adds	r3, r3, #20
-	b	.L1037
-.L1043:
-	movs	r1, #2
-	b	.L1066
-.L1042:
-	ldr	r0, [r2]
-	str	r3, [sp, #4]
-	str	r2, [sp]
-	ldrh	r1, [r0, r5, lsl #1]
-	adds	r1, r1, #1
-	strh	r1, [r0, r5, lsl #1]	@ movhi
-	mov	r0, r7
-	ldr	r1, [r10]
-	adds	r1, r1, #1
-	str	r1, [r10]
-	bl	ftl_set_blk_mode.part.6
-	ldm	sp, {r2, r3}
-	b	.L1045
-.L1048:
-	ldr	r1, [r3, #-20]
-	and	r1, r1, ip
-	str	r1, [r3, #-20]
-	b	.L1047
-.L1051:
-	ldr	r0, .L1067+32
-	mul	r2, r1, r10
-	ldr	r0, [r0]
-	add	ip, r0, r2
-	ldr	r2, [r0, r2]
-	adds	r0, r2, #1
-	bne	.L1050
-	ldr	r0, [ip, #4]
-	adds	r3, r3, #1
-	str	r1, [sp, #12]
-	str	r2, [sp, #8]
-	ubfx	r0, r0, #10, #16
-	str	r3, [sp, #4]
-	bl	FtlBbmMapBadBlock
-	ldr	r2, [sp, #8]
-	add	r0, r4, r10, lsl #1
-	ldr	r1, [sp, #12]
-	ldr	r3, [sp, #4]
-	strh	r2, [r0, #16]	@ movhi
-	ldrb	r2, [r4, #7]	@ zero_extendqisi2
-	subs	r2, r2, #1
-	strb	r2, [r4, #7]
-.L1050:
-	add	r10, r10, #1
-	b	.L1049
-.L1053:
-	ldr	r3, .L1067+68
-	ldr	r0, .L1067+72
-	ldrh	r3, [r3]
-	strh	r7, [r4]	@ movhi
-	smulbb	r3, r3, r2
+	strh	r5, [r4, #2]	@ movhi
+	mov	r1, r5
+	mov	r0, r4
+	strh	r2, [r3]	@ movhi
 	movs	r2, #0
-	strh	r2, [r4, #2]	@ movhi
 	strb	r2, [r4, #6]
-	ldr	r2, [r0]
-	uxth	r3, r3
-	strh	r3, [r4, #4]	@ movhi
-	str	r2, [r4, #12]
+	bl	ftl_sb_update_avl_pages
+	b	.L1085
+.L1070:
+	ldr	r1, [sp, #4]
+	ldrh	r3, [r1], #2
+	cmp	r3, lr
+	str	r1, [sp, #4]
+	beq	.L1069
+	mla	r1, r8, r7, r0
+	ldr	r6, [sp, #12]
+	orr	r3, r5, r3, lsl #10
+	str	r3, [r1, #4]
+	ldr	r3, [sp, #16]
+	muls	r3, r7, r3
+	bic	r3, r3, #3
+	add	r3, r3, r6
+	ldr	r6, [sp, #20]
+	str	r3, [r1, #8]
+	mul	r3, ip, r7
+	adds	r7, r7, #1
+	uxth	r7, r7
+	bic	r3, r3, #3
+	add	r3, r3, r6
+	str	r3, [r1, #12]
+.L1069:
 	adds	r2, r2, #1
-	str	r2, [r0]
-	ldr	r2, [r1]
-	ldr	r1, [sp]
-	strh	r3, [r2, r1]	@ movhi
-	ldrh	r3, [r4, #4]
-	cbz	r3, .L1054
-	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1055
-.L1054:
-	movw	r2, #2677
-	ldr	r1, .L1067+8
-	ldr	r0, .L1067+12
+	b	.L1068
+.L1081:
+	movs	r3, #20
+	ldr	r1, [fp]
+	mul	r3, r3, r10
+	adds	r2, r1, r3
+	ldr	r6, [r1, r3]
+	ldr	r0, [r2, #4]
+	str	r0, [sp, #4]
+	cmp	r6, #0
+	bne	.L1072
+	ldr	r8, [r2, #12]
+	movw	r1, #65535
+	ldrh	r2, [r8]
+	cmp	r2, r1
+	bne	.L1073
+	ldr	r3, .L1092+28
+	ldrh	r1, [r4]
+	str	r2, [sp, #4]
+	ldr	r3, [r3]
+	strh	r6, [r3, r1, lsl #1]	@ movhi
+	ldrh	r0, [r4]
+	bl	INSERT_FREE_LIST
+	ldr	r2, [sp, #4]
+	strh	r2, [r4]	@ movhi
+.L1091:
+	bl	FtlGcPageVarInit
+	movs	r5, #0
+	b	.L1066
+.L1073:
+	mov	r2, r6
+	add	r1, sp, #24
+	ldr	r0, [r8, #8]
+	str	r3, [sp, #12]
+	bl	log2phys
+	ldr	r2, [r8, #12]
+	ldr	r1, [sp, #24]
+	ldr	r3, [sp, #12]
+	cmp	r2, r1
+	beq	.L1075
+.L1079:
+	ldr	r2, [r8, #8]
+	add	r10, r10, #1
+	ldr	r1, [sp, #4]
+	ldr	r0, [r8, #12]
+	bl	FtlGcUpdatePage
+	b	.L1071
+.L1075:
+	str	r3, [sp, #12]
+	movs	r1, #1
+	ldr	r3, .L1092+32
+	add	r0, sp, #28
+	str	r2, [sp, #32]
+	ldr	r2, [r3]
+	str	r2, [sp, #36]
+	ldr	r2, .L1092+36
+	ldr	r2, [r2]
+	str	r2, [sp, #40]
+	mov	r2, r6
+	bl	FlashReadPages
+	ldr	r2, .L1092+40
+	ldr	r1, [fp]
+	ldr	r3, [sp, #12]
+	ldrh	r2, [r2]
+	ldr	r0, [sp, #36]
+	add	ip, r3, r1
+	lsls	r2, r2, #7
+.L1076:
+	cmp	r6, r2
+	beq	.L1079
+	ldr	r1, [ip, #8]
+	ldr	r3, [r0, r6, lsl #2]
+	ldr	r1, [r1, r6, lsl #2]
+	cmp	r1, r3
+	beq	.L1077
+	ldr	r2, [sp, #32]
+	ldrh	r1, [r4]
+	ldr	r0, .L1092+44
 	bl	printf
-.L1055:
-	movs	r0, #0
-	add	sp, sp, #16
+.L1072:
+	ldr	r3, .L1092+28
+	movs	r1, #0
+	ldrh	r2, [r4]
+	ldr	r3, [r3]
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	ldrh	r0, [r4]
+	bl	INSERT_FREE_LIST
+	movw	r3, #65535
+	strh	r3, [r4]	@ movhi
+	b	.L1091
+.L1077:
+	adds	r6, r6, #1
+	b	.L1076
+.L1082:
+	ldr	r1, .L1092
+	movw	r0, #65535
+	ldrh	r3, [r1]
+	cmp	r3, r0
+	beq	.L1084
+	ldr	r0, [sp]
+	add	r3, r3, r0
+	strh	r3, [r1]	@ movhi
+	ldrh	r3, [r2]
+	cmp	r3, r5
+	bls	.L1084
+.L1085:
+	mov	r0, #-1
+	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1068:
+.L1093:
 	.align	2
-.L1067:
-	.word	.LANCHOR48
-	.word	.LANCHOR45
-	.word	.LANCHOR157
-	.word	.LC1
-	.word	.LANCHOR53
-	.word	.LANCHOR87
-	.word	.LANCHOR47
-	.word	.LANCHOR42
-	.word	.LANCHOR111
-	.word	.LANCHOR3
-	.word	.LANCHOR80
-	.word	.LANCHOR43
-	.word	.LANCHOR72
-	.word	.LANCHOR14
-	.word	.LANCHOR76
-	.word	.LANCHOR74
-	.word	.LANCHOR127
+.L1092:
+	.word	.LANCHOR162
 	.word	.LANCHOR19
-	.word	.LANCHOR70
-	.word	.LANCHOR5
-	.word	.LANCHOR73
-	.word	-1024
-	.size	allocate_data_superblock, .-allocate_data_superblock
-	.section	.text.FtlGcFreeBadSuperBlk,"ax",%progbits
+	.word	.LANCHOR3
+	.word	.LANCHOR91
+	.word	.LANCHOR23
+	.word	.LANCHOR92
+	.word	.LANCHOR24
+	.word	.LANCHOR42
+	.word	.LANCHOR119
+	.word	.LANCHOR124
+	.word	.LANCHOR12
+	.word	.LC100
+	.word	.LANCHOR112
+	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
+	.section	.text.FtlReadRefresh,"ax",%progbits
 	.align	1
-	.global	FtlGcFreeBadSuperBlk
+	.global	FtlReadRefresh
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlGcFreeBadSuperBlk, %function
-FtlGcFreeBadSuperBlk:
-	@ args = 0, pretend = 0, frame = 8
+	.type	FtlReadRefresh, %function
+FtlReadRefresh:
+	@ args = 0, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r10, r0
-	ldr	r4, .L1081
-	ldrh	r3, [r4]
-	cbz	r3, .L1070
-	ldr	r8, .L1081+16
-	movs	r6, #0
-.L1071:
-	ldr	r3, .L1081+4
-	ldrh	r2, [r3]
-	uxth	r3, r6
-	cmp	r2, r3
-	bhi	.L1077
-	bl	FtlGcReFreshBadBlk
-.L1070:
-	movs	r0, #0
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1077:
-	ldr	r2, .L1081+8
-	uxth	r3, r6
-	mov	r1, r10
-	movs	r7, #0
-	ldrb	r0, [r2, r3]	@ zero_extendqisi2
-	bl	V2P_block
-	ldr	r2, .L1081+12
-	mov	fp, r0
-.L1072:
-	ldrh	r3, [r4]
-	uxth	r5, r7
-	cmp	r3, r5
-	bhi	.L1076
-	adds	r6, r6, #1
-	b	.L1071
-.L1076:
-	uxth	r3, r7
-	ldrh	r1, [r8, r3, lsl #1]
-	cmp	r1, fp
-	bne	.L1073
-	mov	r1, fp
-	mov	r0, r2
-	str	r3, [sp, #4]
-	str	r2, [sp]
-	bl	printf
-	mov	r0, fp
-	bl	FtlBbmMapBadBlock
-	bl	FtlBbmTblFlush
-	ldr	r3, [sp, #4]
-	ldrh	r1, [r4]
+	ldr	r3, .L1107
+	push	{r4, r5, r6, lr}
+	sub	sp, sp, #88
+	mov	r4, r3
+	ldr	r0, [r3, #80]
+	cmp	r0, #0
+	beq	.L1095
+	ldr	r6, .L1107+4
+	ldr	r0, [r3, #84]
+	ldr	r1, [r6]
+	cmp	r0, r1
+	bcs	.L1096
+	mov	r5, #2048
+.L1101:
+	ldr	r0, [r4, #84]
+	ldr	r3, [r6]
+	cmp	r0, r3
+	bcs	.L1098
+	movs	r2, #0
+	mov	r1, sp
+	bl	log2phys
 	ldr	r2, [sp]
-	add	r3, r8, r3, lsl #1
-.L1074:
-	cmp	r5, r1
-	bcc	.L1075
-	subs	r1, r1, #1
-	strh	r1, [r4]	@ movhi
-.L1073:
-	adds	r7, r7, #1
-	b	.L1072
-.L1075:
-	ldrh	r0, [r3, #2]!
-	adds	r5, r5, #1
-	uxth	r5, r5
-	strh	r0, [r3, #-2]	@ movhi
-	b	.L1074
-.L1082:
+	ldr	r3, [r4, #84]
+	adds	r1, r2, #1
+	add	r3, r3, #1
+	str	r3, [r4, #84]
+	beq	.L1099
+	str	r3, [sp, #20]
+	add	r0, sp, #88
+	ldr	r3, .L1107+8
+	movs	r1, #1
+	str	r2, [sp, #8]
+	movs	r2, #0
+	str	r2, [r0, #-84]!
+	ldr	r3, [r3]
+	str	r3, [sp, #12]
+	add	r3, sp, #24
+	str	r3, [sp, #16]
+	bl	FlashReadPages
+	ldr	r3, [sp, #4]
+	cmp	r3, #256
+	bne	.L1098
+	ldr	r0, [sp]
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	bl	FtlGcRefreshBlock
+.L1098:
+	mov	r0, #-1
+.L1094:
+	add	sp, sp, #88
+	@ sp needed
+	pop	{r4, r5, r6, pc}
+.L1099:
+	subs	r5, r5, #1
+	bne	.L1101
+	b	.L1098
+.L1096:
+	ldr	r2, .L1107+12
+	movs	r0, #0
+	str	r0, [r3, #80]
+	str	r0, [r3, #84]
+	ldr	r2, [r2]
+	str	r2, [r3, #76]
+	b	.L1094
+.L1095:
+	ldr	r1, [r3, #76]
+	ldr	r3, .L1107+12
+	ldr	r5, [r3]
+	add	r3, r5, #1048576
+	cmp	r1, r3
+	bhi	.L1104
+	ldr	r3, .L1107+16
+	ldr	r2, [r3]
+	mov	r3, #33554432
+	lsrs	r2, r2, #10
+	asrs	r3, r3, r2
+	add	r3, r3, r1
+	cmp	r5, r3
+	bhi	.L1104
+	ldr	r3, .L1107+20
+	ldrb	r3, [r3, #28]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L1094
+.L1104:
+	movs	r3, #1
+	movs	r0, #0
+	str	r3, [r4, #80]
+	str	r0, [r4, #84]
+	str	r5, [r4, #76]
+	b	.L1094
+.L1108:
 	.align	2
-.L1081:
-	.word	.LANCHOR101
-	.word	.LANCHOR3
-	.word	.LANCHOR13
-	.word	.LC100
-	.word	.LANCHOR102
-	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
-	.section	.text.update_vpc_list,"ax",%progbits
+.L1107:
+	.word	.LANCHOR81
+	.word	.LANCHOR61
+	.word	.LANCHOR121
+	.word	.LANCHOR62
+	.word	.LANCHOR76
+	.word	.LANCHOR39
+	.size	FtlReadRefresh, .-FtlReadRefresh
+	.section	.text.FtlMapBlkWriteDump_data,"ax",%progbits
 	.align	1
-	.global	update_vpc_list
+	.global	FtlMapBlkWriteDump_data
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	update_vpc_list, %function
-update_vpc_list:
+	.type	FtlMapBlkWriteDump_data, %function
+FtlMapBlkWriteDump_data:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	mov	r4, r0
-	ldr	r3, .L1093
-	ldr	r3, [r3]
-	ldrh	r3, [r3, r0, lsl #1]
-	cmp	r3, #0
-	bne	.L1084
-	ldr	r2, .L1093+4
-	ldrh	r1, [r2]
-	cmp	r1, r0
-	bne	.L1085
-	movw	r3, #65535
-	strh	r3, [r2]	@ movhi
-.L1086:
-	ldr	r5, .L1093+8
-	mov	r1, r4
-	ldr	r0, .L1093+12
-	bl	List_remove_node
-	ldrh	r3, [r5]
-	cbnz	r3, .L1088
-	movw	r2, #2747
-	ldr	r1, .L1093+16
-	ldr	r0, .L1093+20
-	bl	printf
-.L1088:
-	ldrh	r3, [r5]
-	mov	r0, r4
-	subs	r3, r3, #1
-	strh	r3, [r5]	@ movhi
-	bl	free_data_superblock
-	mov	r0, r4
-	bl	FtlGcFreeBadSuperBlk
-	ldr	r3, .L1093+24
-	ldrh	r2, [r5]
-	ldrh	r3, [r3]
-	add	r3, r3, r2
-	ldr	r2, .L1093+28
-	ldrh	r2, [r2]
-	cmp	r3, r2
-	ble	.L1092
-	movw	r2, #2750
-	ldr	r1, .L1093+16
-	ldr	r0, .L1093+20
-	bl	printf
-.L1092:
-	movs	r3, #1
-	b	.L1083
-.L1085:
-	ldr	r2, .L1093+32
-	ldrh	r2, [r2]
-	cmp	r2, r0
-	beq	.L1083
-	ldr	r2, .L1093+36
-	ldrh	r2, [r2]
-	cmp	r2, r0
-	beq	.L1083
-	ldr	r2, .L1093+40
-	ldrh	r2, [r2]
-	cmp	r2, r0
-	bne	.L1086
-.L1083:
-	mov	r0, r3
-	pop	{r3, r4, r5, pc}
-.L1084:
-	bl	List_update_data_list
+	ldr	r3, [r0, #36]
+	push	{r4, r5, r6, lr}
+	mov	r6, r0
+	cbz	r3, .L1109
+	ldrh	r5, [r0, #6]
 	movs	r3, #0
-	b	.L1083
-.L1094:
+	ldr	r2, [r0, #24]
+	str	r3, [r0, #36]
+	subs	r5, r5, #1
+	ldr	r3, .L1113
+	ldr	r1, .L1113+4
+	uxth	r5, r5
+	ldr	r4, .L1113+8
+	ldr	r2, [r2, r5, lsl #2]
+	ldr	r0, [r3]
+	ldr	r1, [r1]
+	str	r2, [r4, #4]
+	str	r0, [r4, #8]
+	str	r1, [r4, #12]
+	cbz	r2, .L1111
+	movs	r2, #1
+	mov	r0, r4
+	mov	r1, r2
+	bl	FlashReadPages
+.L1112:
+	ldr	r2, [r4, #8]
+	mov	r1, r5
+	mov	r0, r6
+	pop	{r4, r5, r6, lr}
+	b	FtlMapWritePage
+.L1111:
+	ldr	r3, .L1113+12
+	movs	r1, #255
+	ldrh	r2, [r3]
+	bl	ftl_memset
+	b	.L1112
+.L1109:
+	pop	{r4, r5, r6, pc}
+.L1114:
 	.align	2
-.L1093:
-	.word	.LANCHOR42
-	.word	.LANCHOR80
-	.word	.LANCHOR45
-	.word	.LANCHOR41
-	.word	.LANCHOR158
-	.word	.LC1
-	.word	.LANCHOR48
-	.word	.LANCHOR5
-	.word	.LANCHOR51
-	.word	.LANCHOR52
-	.word	.LANCHOR53
-	.size	update_vpc_list, .-update_vpc_list
-	.section	.text.decrement_vpc_count,"ax",%progbits
+.L1113:
+	.word	.LANCHOR116
+	.word	.LANCHOR123
+	.word	.LANCHOR148
+	.word	.LANCHOR23
+	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
+	.section	.text.FlashTestBlk,"ax",%progbits
 	.align	1
-	.global	decrement_vpc_count
+	.global	FlashTestBlk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	decrement_vpc_count, %function
-decrement_vpc_count:
-	@ args = 0, pretend = 0, frame = 0
+	.type	FlashTestBlk, %function
+FlashTestBlk:
+	@ args = 0, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
-	movw	r3, #65535
-	push	{r4, r5, r6, lr}
-	cmp	r0, r3
+	cmp	r0, #11
+	push	{r4, r5, lr}
 	mov	r4, r0
-	beq	.L1096
-	ldr	r5, .L1104
-	ldr	r3, [r5]
-	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L1097
-	mov	r1, r0
-	ldr	r0, .L1104+4
-	bl	printf
+	sub	sp, sp, #92
+	bls	.L1117
+	ldr	r5, .L1118
+	add	r0, sp, #24
+	movs	r2, #32
+	movs	r1, #165
+	str	r0, [sp, #16]
+	lsls	r4, r4, #10
 	ldr	r3, [r5]
-	ldrh	r5, [r3, r4, lsl #1]
-	cbz	r5, .L1098
-.L1102:
-	movs	r5, #0
-.L1095:
-	mov	r0, r5
-	pop	{r4, r5, r6, pc}
-.L1098:
-	movw	r2, #2765
-.L1103:
-	ldr	r1, .L1104+8
-	ldr	r0, .L1104+12
-	bl	printf
-	b	.L1095
-.L1097:
-	subs	r2, r2, #1
-	strh	r2, [r3, r0, lsl #1]	@ movhi
-.L1096:
-	ldr	r6, .L1104+16
-	movw	r3, #65535
-	ldrh	r0, [r6]
-	cmp	r0, r3
-	bne	.L1100
-	strh	r4, [r6]	@ movhi
-	b	.L1102
-.L1100:
-	cmp	r4, r0
-	beq	.L1102
-	bl	update_vpc_list
-	ldr	r3, .L1104+20
-	adds	r5, r0, #0
-	ldr	r2, .L1104+24
+	str	r3, [sp, #12]
+	bl	ftl_memset
+	movs	r2, #8
+	movs	r1, #90
+	ldr	r0, [r5]
+	bl	ftl_memset
+	movs	r2, #1
+	add	r0, sp, #4
+	mov	r1, r2
+	str	r4, [sp, #8]
+	bl	FlashEraseBlocks
+	movs	r3, #1
+	add	r0, sp, #4
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+	ldr	r4, [sp, #4]
+	movs	r2, #1
+	movs	r1, #0
+	add	r0, sp, #4
+	adds	r4, r4, #0
 	it	ne
-	movne	r5, #1
-	strh	r4, [r6]	@ movhi
-	ldr	r3, [r3]
-	ldr	r2, [r2]
-	subs	r3, r3, r2
-	asrs	r2, r3, #1
-	ldr	r3, .L1104+28
-	muls	r3, r2, r3
-	ldr	r2, .L1104
-	ldr	r2, [r2]
-	uxth	r1, r3
-	ldrh	r2, [r2, r1, lsl #1]
-	cmp	r2, #0
-	bne	.L1095
-	cmp	r4, r1
-	beq	.L1095
-	movw	r2, #2781
-	b	.L1103
-.L1105:
+	movne	r4, #1
+	negs	r4, r4
+	bl	FlashEraseBlocks
+.L1115:
+	mov	r0, r4
+	add	sp, sp, #92
+	@ sp needed
+	pop	{r4, r5, pc}
+.L1117:
+	movs	r4, #0
+	b	.L1115
+.L1119:
 	.align	2
-.L1104:
-	.word	.LANCHOR42
-	.word	.LC101
-	.word	.LANCHOR159
-	.word	.LC1
-	.word	.LANCHOR150
-	.word	.LANCHOR41
-	.word	.LANCHOR40
-	.word	-1431655765
-	.size	decrement_vpc_count, .-decrement_vpc_count
-	.section	.text.FtlWriteDump_data,"ax",%progbits
+.L1118:
+	.word	.LANCHOR121
+	.size	FlashTestBlk, .-FlashTestBlk
+	.section	.text.FtlBbmTblFlush,"ax",%progbits
 	.align	1
-	.global	FtlWriteDump_data
+	.global	FtlBbmTblFlush
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlWriteDump_data, %function
-FtlWriteDump_data:
-	@ args = 0, pretend = 0, frame = 24
+	.type	FtlBbmTblFlush, %function
+FtlBbmTblFlush:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #24
-	ldr	r4, .L1125
-	ldrh	r2, [r4, #4]
-	cmp	r2, #0
-	beq	.L1107
-	ldrb	r3, [r4, #8]	@ zero_extendqisi2
-	cmp	r3, #0
-	bne	.L1107
-	ldr	r3, .L1125+4
-	ldrb	r1, [r4, #7]	@ zero_extendqisi2
-	ldrh	r3, [r3]
-	muls	r3, r1, r3
-	cmp	r2, r3
-	beq	.L1107
-	ldrb	r7, [r4, #10]	@ zero_extendqisi2
-	cbnz	r7, .L1106
-	ldr	r3, .L1125+8
-	mov	r2, r7
-	mov	r1, sp
-	ldr	r6, [r3]
-	ldr	r3, .L1125+12
-	subs	r6, r6, #1
-	mov	r0, r6
-	ldrh	r8, [r3]
-	bl	log2phys
-	ldr	r2, .L1125+16
-	ldr	r3, [sp]
-	str	r6, [sp, #20]
-	ldr	r0, [r2]
-	ldr	r2, .L1125+20
-	str	r3, [sp, #8]
-	adds	r3, r3, #1
-	str	r0, [sp, #12]
-	ldr	r5, [r2]
-	str	r5, [sp, #16]
-	str	r7, [r5, #4]
-	beq	.L1109
-	mov	r2, r7
-	movs	r1, #1
-	add	r0, sp, #4
-	bl	FlashReadPages
-.L1110:
-	ldr	fp, .L1125
-	lsl	r8, r8, #2
-	ldr	r10, .L1125+28
-	movs	r7, #0
-	movw	r3, #61589
-	strh	r3, [r5]	@ movhi
-.L1111:
-	cmp	r8, r7
-	bne	.L1115
-.L1112:
-	movs	r3, #1
-.L1124:
-	strb	r3, [r4, #10]
-.L1106:
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1109:
-	ldr	r3, .L1125+24
-	movs	r1, #255
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #0
+	ldr	r7, .L1129
+	movs	r1, #0
+	ldr	r5, .L1129+4
+	ldr	r3, [r7]
+	mov	fp, r7
+	ldr	r8, .L1129+48
+	ldr	r6, .L1129+8
+	str	r3, [r5, #12]
+	ldr	r7, .L1129+12
+	ldr	r3, .L1129+16
+	ldr	r10, .L1129+52
+	ldr	r0, [r8]
 	ldrh	r2, [r3]
+	str	r0, [r5, #8]
 	bl	ftl_memset
-	b	.L1110
-.L1115:
+.L1121:
+	ldrh	r3, [r7]
+	cmp	r4, r3
+	blt	.L1122
+	ldr	r6, [r5, #12]
+	movs	r2, #16
+	ldr	r4, .L1129+20
+	movs	r1, #255
+	movs	r7, #0
+	mov	r0, r6
+	bl	ftl_memset
+	movw	r3, #61649
+	mov	r10, r4
+	strh	r3, [r6]	@ movhi
+	ldr	r3, [r4, #8]
+	str	r7, [sp, #12]
+	str	r3, [r6, #4]
+	ldrh	r3, [r4]
+	strh	r3, [r6, #2]	@ movhi
 	ldrh	r3, [r4, #4]
-	cmp	r3, #0
-	beq	.L1112
-	ldr	r3, [sp, #8]
-	mov	r0, fp
-	str	r6, [r5, #8]
-	adds	r7, r7, #1
+	strh	r3, [r6, #8]	@ movhi
+	ldrh	r3, [r4, #6]
+	strh	r3, [r6, #10]	@ movhi
+	ldr	r3, .L1129+24
+	ldr	r3, [r3]
+	strh	r3, [r6, #12]	@ movhi
+.L1123:
+	ldr	r3, [r8]
+	ldrh	r2, [r4, #2]
+	ldrh	r1, [r4]
+	str	r3, [r5, #8]
+	ldr	r3, [fp]
+	ldrh	r0, [r6, #10]
 	str	r3, [r5, #12]
-	ldrh	r3, [r4]
-	strh	r3, [r5, #2]	@ movhi
-	bl	get_new_active_ppa
-	ldr	r3, [r10]
-	movs	r1, #1
-	str	r0, [sp, #8]
-	add	r0, sp, #4
+	movs	r3, #0
+	str	r3, [r5]
+	orr	r3, r2, r1, lsl #10
+	str	r3, [r5, #4]
+	ldrh	r3, [r4, #4]
+	str	r0, [sp]
+	ldr	r0, .L1129+28
+	bl	printf
+	ldr	r3, .L1129+32
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3]
+	subs	r3, r3, #1
+	cmp	r2, r3
+	blt	.L1124
+	ldr	r3, [r4, #8]
+	mov	r1, #0	@ movhi
+	ldrh	r2, [r4]
+	strh	r1, [r4, #2]	@ movhi
+	adds	r3, r3, #1
+	str	r3, [r4, #8]
+	str	r3, [r6, #4]
+	strh	r2, [r6, #8]	@ movhi
+	ldrh	r3, [r4, #4]
+	strh	r2, [r4, #4]	@ movhi
+	ldr	r2, .L1129+36
+	strh	r3, [r4]	@ movhi
+	lsls	r3, r3, #10
+	ldr	r0, [r2]
+	movs	r2, #1
 	str	r3, [r5, #4]
-	adds	r3, r3, #1
-	adds	r2, r3, #1
-	it	eq
-	moveq	r3, #0
-	str	r3, [r10]
-	movs	r3, #0
+	mov	r1, r2
+	str	r3, [r0, #4]
+	bl	FlashEraseBlocks
+.L1124:
+	movs	r3, #1
+	ldr	r0, .L1129+4
 	mov	r2, r3
+	mov	r1, r3
 	bl	FlashProgPages
-	ldrh	r0, [r4]
-	bl	decrement_vpc_count
-	b	.L1111
-.L1107:
-	movs	r3, #0
-	b	.L1124
-.L1126:
-	.align	2
-.L1125:
-	.word	.LANCHOR51
-	.word	.LANCHOR19
-	.word	.LANCHOR61
-	.word	.LANCHOR3
-	.word	.LANCHOR107
-	.word	.LANCHOR108
-	.word	.LANCHOR23
-	.word	.LANCHOR71
-	.size	FtlWriteDump_data, .-FtlWriteDump_data
-	.section	.text.l2p_flush,"ax",%progbits
-	.align	1
-	.global	l2p_flush
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	l2p_flush, %function
-l2p_flush:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, lr}
-	movs	r4, #0
-	ldr	r5, .L1131
-	ldr	r6, .L1131+4
-	bl	FtlWriteDump_data
+	ldrh	r3, [r10, #2]
+	adds	r3, r3, #1
+	strh	r3, [r10, #2]	@ movhi
+	ldr	r3, [r5]
+	adds	r3, r3, #1
+	bne	.L1125
+	adds	r7, r7, #1
+	ldr	r1, [r5, #4]
+	uxth	r7, r7
+	ldr	r0, .L1129+40
+	bl	printf
+	cmp	r7, #3
+	bls	.L1123
+	mov	r2, r7
+	ldr	r1, [r5, #4]
+	ldr	r0, .L1129+44
+	bl	printf
+.L1127:
+	b	.L1127
+.L1122:
+	ldrh	r2, [r10]
+	ldr	r3, [r5, #8]
+	ldr	r1, [r6, #4]!
+	mul	r0, r2, r4
+	lsls	r2, r2, #2
+	adds	r4, r4, #1
+	add	r0, r3, r0, lsl #2
+	bl	ftl_memcpy
+	b	.L1121
 .L1128:
-	ldrh	r3, [r5]
-	uxth	r0, r4
-	cmp	r3, r0
-	bhi	.L1130
+	movs	r3, #1
+	str	r3, [sp, #12]
+	b	.L1123
+.L1125:
+	ldr	r3, [sp, #12]
+	cmp	r3, #0
+	beq	.L1128
 	movs	r0, #0
-	pop	{r4, r5, r6, pc}
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
 .L1130:
-	ldr	r2, [r6]
-	uxth	r3, r4
-	movs	r1, #12
-	mla	r3, r1, r3, r2
-	ldr	r3, [r3, #4]
-	cmp	r3, #0
-	bge	.L1129
-	bl	flush_l2p_region
-.L1129:
-	adds	r4, r4, #1
-	b	.L1128
-.L1132:
 	.align	2
-.L1131:
-	.word	.LANCHOR33
-	.word	.LANCHOR55
-	.size	l2p_flush, .-l2p_flush
-	.section	.text.FtlRecoverySuperblock,"ax",%progbits
+.L1129:
+	.word	.LANCHOR123
+	.word	.LANCHOR148
+	.word	.LANCHOR37+24
+	.word	.LANCHOR10
+	.word	.LANCHOR23
+	.word	.LANCHOR37
+	.word	.LANCHOR2
+	.word	.LC101
+	.word	.LANCHOR20
+	.word	.LANCHOR106
+	.word	.LC102
+	.word	.LC103
+	.word	.LANCHOR115
+	.word	.LANCHOR137
+	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
+	.section	.text.allocate_data_superblock,"ax",%progbits
 	.align	1
-	.global	FtlRecoverySuperblock
+	.global	allocate_data_superblock
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlRecoverySuperblock, %function
-FtlRecoverySuperblock:
-	@ args = 0, pretend = 0, frame = 48
+	.type	allocate_data_superblock, %function
+allocate_data_superblock:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldrh	r3, [r0]
-	movw	r2, #65535
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r8, r0
-	sub	sp, sp, #48
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r0
+.L1132:
+	ldr	r3, .L1171
+	ldr	r8, .L1171+68
+	ldrh	r3, [r3]
+	ldr	r10, .L1171+72
+	ldrh	r2, [r8]
+	add	r3, r3, r2
+	ldrh	r2, [r10]
 	cmp	r3, r2
-	beq	.L1262
-	ldrh	r3, [r0, #2]
-	str	r3, [sp, #4]
-	ldrb	r3, [r0, #6]	@ zero_extendqisi2
-	ldr	r1, [sp, #4]
-	str	r3, [sp, #20]
-	ldr	r3, .L1270
+	ble	.L1133
+	movw	r2, #2615
+	ldr	r1, .L1171+4
+	ldr	r0, .L1171+8
+	bl	printf
+.L1133:
+	ldr	r3, .L1171+12
+	cmp	r4, r3
+	bne	.L1159
+	ldr	r3, .L1171
+	ldr	r2, .L1171+16
+	ldrh	r3, [r3]
+	ldr	r2, [r2]
+	lsrs	r1, r3, #1
+	muls	r2, r3, r2
+	adds	r1, r1, #1
+	add	r1, r1, r2, lsr #2
+	uxth	r1, r1
+	cbz	r1, .L1134
+	subs	r1, r1, #1
+	uxth	r1, r1
+.L1134:
+	ldr	r0, .L1171+20
+	bl	List_pop_index_node
+	ldr	r3, .L1171
+	mov	r5, r0
+	uxth	r7, r0
+	ldrh	r3, [r3]
+	cbnz	r3, .L1135
+	mov	r2, #2624
+	ldr	r1, .L1171+4
+	ldr	r0, .L1171+8
+	bl	printf
+.L1135:
+	ldr	r3, .L1171
+	ldr	r2, .L1171
 	ldrh	r3, [r3]
-	cmp	r3, r1
-	mov	r3, #0
-	bne	.L1136
-	strh	r3, [r0, #4]	@ movhi
-.L1268:
-	strb	r3, [r8, #6]
-.L1262:
-	movs	r0, #0
-	add	sp, sp, #48
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1136:
-	ldrh	r0, [r0, #16]
-.L1137:
-	cmp	r0, r2
-	uxth	r5, r3
-	add	r3, r3, #1
-	beq	.L1138
-	movs	r1, #1
-	bl	FtlGetLastWrittenPage
-	mov	r4, r0
-	adds	r0, r0, #1
-	beq	.L1139
-	ldr	r3, .L1270+4
-	movs	r2, #0
-	mov	r5, r2
-	movw	fp, #65535
-	mov	r10, #20
-	ldrh	ip, [r3]
-	ldr	r3, .L1270+8
-	ldr	r0, [r3]
-	ldr	r3, .L1270+12
-	ldr	r3, [r3]
-	str	r3, [sp, #8]
-	ldr	r3, .L1270+16
-	ldrh	r7, [r3]
-	ldr	r3, .L1270+20
-	ldr	r3, [r3]
-	str	r3, [sp, #12]
-	ldr	r3, .L1270+24
-	ldrh	lr, [r3]
-	add	r3, r8, #16
-	str	r3, [sp, #16]
-	str	r3, [sp]
-.L1140:
-	uxth	r3, r2
-	cmp	ip, r3
-	bhi	.L1144
-	movs	r2, #0
-	mov	r1, r5
-	bl	FlashReadPages
-	ldr	r2, .L1270+28
-	uxth	r1, r4
-	movw	fp, #65535
-	str	r1, [sp, #12]
-	ldr	r3, [r2]
 	subs	r3, r3, #1
+	strh	r3, [r2]	@ movhi
+	ldrh	r3, [r10]
+	cmp	r3, r7
+	bls	.L1132
+	uxth	r5, r5
+	lsls	r3, r5, #1
 	str	r3, [sp]
-	ldr	r3, .L1270+8
-	ldr	r10, [r3]
-	movs	r3, #0
-	mov	r7, r10
-.L1145:
-	uxth	r1, r3
-	cmp	r5, r1
-	bhi	.L1150
-	bne	.L1148
-	adds	r3, r4, #1
-	uxth	r3, r3
-	str	r3, [sp, #8]
-.L1263:
-	ldr	r0, [r10, #4]
-	ubfx	r0, r0, #10, #16
-	bl	P2V_plane
-	ldr	r3, .L1270
-	mov	r10, r0
-	ldr	r2, [sp, #8]
+	ldr	r3, .L1171+24
+	ldr	r3, [r3]
+	ldrh	r6, [r3, r5, lsl #1]
+	cmp	r6, #0
+	bne	.L1132
+	strh	r7, [r4]	@ movhi
+	mov	r0, r4
+	bl	make_superblock
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	cbnz	r3, .L1137
+	ldr	r3, .L1171+24
+	movw	r2, #65535
+	mov	r0, r7
+	ldr	r3, [r3]
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	bl	INSERT_DATA_LIST
+	ldr	r3, .L1171
+	ldrh	r2, [r8]
 	ldrh	r3, [r3]
+	add	r3, r3, r2
+	ldrh	r2, [r10]
 	cmp	r3, r2
-	bne	.L1152
-	ldrh	r3, [sp, #8]
-	strh	r3, [r8, #2]	@ movhi
-	movs	r3, #0
-	strb	r3, [r8, #6]
-	strh	r3, [r8, #4]	@ movhi
-.L1152:
-	ldr	r3, [sp, #8]
-	ldr	r2, [sp, #4]
+	ble	.L1132
+	movw	r2, #2638
+	ldr	r1, .L1171+4
+	ldr	r0, .L1171+8
+	bl	printf
+	b	.L1132
+.L1159:
+	movs	r1, #0
+	b	.L1134
+.L1137:
+	ldr	r3, .L1171
+	ldrh	r2, [r8]
+	ldrh	r3, [r3]
+	add	r3, r3, r2
+	ldrh	r2, [r10]
 	cmp	r3, r2
-	bne	.L1153
-	ldr	r3, [sp, #20]
-	cmp	r10, r3
-	bne	.L1153
-	ldr	r1, [sp, #8]
-	mov	r2, r10
-.L1269:
-	mov	r0, r8
-	bl	ftl_sb_update_avl_pages
-	b	.L1262
-.L1138:
-	uxth	r1, r3
-	adds	r1, r1, #8
-	ldrh	r0, [r8, r1, lsl #1]
-	b	.L1137
+	ble	.L1139
+	movw	r2, #2641
+	ldr	r1, .L1171+4
+	ldr	r0, .L1171+8
+	bl	printf
 .L1139:
-	ldr	r3, [sp, #4]
-	cbz	r3, .L1141
-	movw	r2, #1755
-	ldr	r1, .L1270+32
-	ldr	r0, .L1270+36
+	ldr	r3, .L1171+28
+	add	lr, r4, #16
+	ldr	r2, .L1171+32
+	mov	r8, #0
+	ldr	ip, [r3]
+	ldrh	r0, [r2]
+	movs	r2, #20
+	mov	r3, ip
+	mla	r0, r2, r0, ip
+.L1140:
+	cmp	r0, r3
+	bne	.L1142
+	cbnz	r6, .L1143
+	movw	r2, #2652
+	ldr	r1, .L1171+4
+	ldr	r0, .L1171+8
 	bl	printf
-.L1141:
-	ldr	r3, [sp, #20]
-	cbz	r3, .L1142
-	cmp	r5, r3
-	beq	.L1142
-	movw	r2, #1756
-	ldr	r1, .L1270+32
-	ldr	r0, .L1270+36
+.L1143:
+	ldr	r3, .L1171+36
+	ldrh	r3, [r3]
+	cmp	r3, r7
+	bne	.L1144
+	movw	r2, #2654
+	ldr	r1, .L1171+4
+	ldr	r0, .L1171+8
 	bl	printf
-.L1142:
-	movs	r3, #0
-	strh	r3, [r8, #2]	@ movhi
-	b	.L1268
 .L1144:
-	ldr	r1, [sp]
-	ldrh	r3, [r1], #2
-	cmp	r3, fp
-	str	r1, [sp]
-	beq	.L1143
-	mla	r1, r10, r5, r0
-	ldr	r6, [sp, #8]
-	orr	r3, r4, r3, lsl #10
-	str	r3, [r1, #4]
-	mul	r3, r7, r5
-	bic	r3, r3, #3
-	add	r3, r3, r6
-	ldr	r6, [sp, #12]
-	str	r3, [r1, #8]
-	mul	r3, lr, r5
-	adds	r5, r5, #1
-	uxth	r5, r5
-	bic	r3, r3, #3
-	add	r3, r3, r6
-	str	r3, [r1, #12]
-.L1143:
-	adds	r2, r2, #1
-	b	.L1140
-.L1150:
-	ldr	r1, [r7]
-	cbnz	r1, .L1146
-	ldr	r1, [r7, #12]
-	ldr	r6, [r1, #4]
-	str	r1, [sp, #8]
-	adds	r1, r6, #1
-	beq	.L1147
-	ldr	r1, [r2]
-	mov	r0, r6
-	bl	ftl_cmp_data_ver
-	cbz	r0, .L1147
-	adds	r6, r6, #1
-	str	r6, [r2]
-.L1147:
-	ldr	r1, [sp, #8]
-	ldr	r1, [r1]
-	adds	r1, r1, #1
-	bne	.L1149
-.L1148:
-	uxth	r2, r4
-	uxth	r3, r3
-	str	r2, [sp, #8]
-	movs	r2, #20
-	mla	r10, r2, r3, r10
-	b	.L1263
-.L1146:
-	ldr	fp, [sp, #12]
-.L1149:
-	adds	r3, r3, #1
-	adds	r7, r7, #20
-	b	.L1145
-.L1153:
-	movw	r3, #65535
-	cmp	fp, r3
-	bne	.L1154
-	ldrb	r3, [r8, #8]	@ zero_extendqisi2
-	cmp	r3, #0
-	bne	.L1155
-.L1154:
-	ldr	r3, .L1270+40
-	uxth	r6, r4
-	uxth	r4, r4
-	ldr	r7, .L1270+8
-	ldr	r2, [r3]
+	ldrb	r2, [r4, #8]	@ zero_extendqisi2
+	ldr	r3, .L1171+40
+	ldr	fp, .L1171+76
+	ldr	r8, .L1171+80
+	ldr	r1, [r3]
+	cmp	r2, #0
+	bne	.L1145
+	ldrh	r2, [r1, r5, lsl #1]
+	cmp	r2, #0
+	beq	.L1146
+	ldr	r0, .L1171+44
+	ldrh	r0, [r0]
+	add	r2, r2, r0
+.L1169:
+	strh	r2, [r1, r5, lsl #1]	@ movhi
+	mov	r0, r7
+	ldr	r2, [fp]
+	movs	r1, #0
+	str	r3, [sp, #4]
 	adds	r2, r2, #1
-	itt	eq
-	ldreq	r2, [sp]
-	streq	r2, [r3]
+	str	r2, [fp]
+	bl	ftl_set_blk_mode
+.L1170:
 	ldr	r3, [sp, #4]
-	adds	r3, r3, #7
-	cmp	r4, r3
-	itet	gt
-	subgt	r4, r6, #7
-	ldrle	r4, [sp, #4]
-	uxthgt	r4, r4
-.L1158:
-	cmp	r4, r6
-	bhi	.L1168
-	ldr	r3, .L1270+4
-	movw	lr, #65535
-	ldr	r0, [r7]
-	mov	ip, #20
-	ldrh	fp, [r3]
-	ldr	r3, [sp, #16]
-	str	r3, [sp, #12]
-	movs	r3, #0
-	mov	r5, r3
-	b	.L1169
-.L1160:
-	ldr	r1, [sp, #12]
-	ldrh	r2, [r1], #2
-	cmp	r2, lr
-	str	r1, [sp, #12]
-	beq	.L1159
-	mla	r1, ip, r5, r0
-	adds	r5, r5, #1
-	orr	r2, r4, r2, lsl #10
-	uxth	r5, r5
-	str	r2, [r1, #4]
-.L1159:
-	adds	r3, r3, #1
-.L1169:
-	uxth	r2, r3
-	cmp	fp, r2
-	bhi	.L1160
-	mov	r1, r5
-	movs	r2, #0
-	bl	FlashReadPages
-	ldr	r3, .L1270+40
-	movs	r1, #20
-	movs	r0, #0
-	movw	ip, #65535
+	ldr	r0, [fp]
+	ldr	r3, [r3]
+	ldrh	r1, [r3, r5, lsl #1]
+	ldr	r3, .L1171+48
 	ldr	r2, [r3]
-	ldr	r3, [r7]
-	mla	r5, r1, r5, r3
-.L1161:
-	cmp	r3, r5
-	bne	.L1166
-	cbz	r0, .L1167
-	ldr	r3, .L1270+40
-	str	r2, [r3]
-.L1167:
-	adds	r4, r4, #1
-	uxth	r4, r4
-	b	.L1158
-.L1271:
-	.align	2
-.L1270:
-	.word	.LANCHOR19
-	.word	.LANCHOR3
-	.word	.LANCHOR120
-	.word	.LANCHOR91
-	.word	.LANCHOR23
-	.word	.LANCHOR92
-	.word	.LANCHOR24
-	.word	.LANCHOR71
-	.word	.LANCHOR160
-	.word	.LC1
-	.word	.LANCHOR153
-.L1166:
-	ldr	r1, [r3]
-	cmp	r1, #0
-	beq	.L1162
-	cbz	r0, .L1155
-.L1264:
-	ldr	r3, .L1272
-	str	r2, [r3]
-.L1155:
-	ldr	r3, .L1272+4
-	movs	r2, #1
-	ldr	r0, .L1272+8
-	ldr	r6, .L1272+12
-	strh	r2, [r3]	@ movhi
-	bl	FtlMapBlkWriteDump_data
-	ldr	fp, [sp, #4]
-.L1170:
-	ldr	r3, .L1272+16
-	movw	lr, #65535
-	ldr	r0, [r6]
-	movs	r7, #20
-	ldr	r1, [sp, #16]
-	ldrh	r4, [r3]
-	movs	r3, #0
-	str	r3, [sp, #12]
-.L1171:
-	uxth	r2, r3
-	cmp	r2, r4
-	bcc	.L1173
-	movs	r2, #0
-	ldr	r1, [sp, #12]
-	bl	FlashReadPages
-	movs	r3, #0
-.L1267:
-	str	r3, [sp, #24]
-	ldr	r2, [sp, #12]
-	ldrh	r3, [sp, #24]
-	cmp	r2, r3
-	bhi	.L1202
-	ldr	r3, .L1272+20
-	add	fp, fp, #1
-	uxth	fp, fp
-	ldrh	r3, [r3]
-	cmp	r3, fp
-	bne	.L1170
-	ldr	r2, .L1272+16
-	movw	r0, #65535
-	movs	r3, #0
-	strh	fp, [r8, #2]	@ movhi
-	strh	r3, [r8, #4]	@ movhi
-	ldrh	r2, [r2]
-.L1203:
-	uxth	r1, r3
 	cmp	r1, r2
-	bcs	.L1262
-	ldr	r1, [sp, #16]
-	ldrh	r4, [r1], #2
-	cmp	r4, r0
-	str	r1, [sp, #16]
-	add	r1, r3, #1
-	bne	.L1268
-	mov	r3, r1
-	b	.L1203
-.L1162:
-	ldr	r1, [r3, #12]
-	ldrh	lr, [r1]
-	cmp	lr, ip
-	beq	.L1165
-	ldr	r1, [r1, #4]
-	cmp	r1, #-1
-	itt	ne
-	movne	r2, r1
-	movne	r0, #1
-.L1165:
+	it	hi
+	strhi	r1, [r3]
+	ldr	r3, .L1171+44
+	ldrh	r1, [r10]
+	ldrh	r2, [r3]
+	ldr	r3, [r8]
+	mla	r0, r0, r2, r3
+	bl	__aeabi_uidiv
+	ldr	r3, .L1171+52
+	ldr	ip, .L1171+84
+	str	r0, [r3]
+	ldr	r3, .L1171+56
+	ldr	r2, [r3]
+	ldr	r3, [r2, #16]
+	adds	r3, r3, #1
+	str	r3, [r2, #16]
+	movs	r2, #20
+	ldr	r3, .L1171+28
+	ldr	r0, [r3]
+	adds	r3, r0, #4
+	mla	r2, r2, r6, r0
+	adds	r2, r2, #24
+.L1150:
 	adds	r3, r3, #20
-	b	.L1161
-.L1168:
-	mov	r2, #-1
-	b	.L1264
-.L1173:
-	ldrh	r2, [r1], #2
-	cmp	r2, lr
-	beq	.L1172
-	ldr	r5, [sp, #12]
-	orr	r2, fp, r2, lsl #10
-	mla	ip, r7, r5, r0
-	str	r2, [ip, #4]
-	mov	r2, r5
+	cmp	r2, r3
+	bne	.L1151
+	mov	r2, r6
+	ldrb	r1, [r4, #8]	@ zero_extendqisi2
+	mov	r8, #0
+	bl	FlashEraseBlocks
+	mov	r10, r8
+	movs	r3, #20
+.L1152:
+	uxth	r2, r8
+	cmp	r6, r2
+	bhi	.L1154
+	cmp	r10, #0
+	beq	.L1155
+	mov	r0, r7
+	bl	update_multiplier_value
+	bl	FtlBbmTblFlush
+.L1155:
+	ldrb	r2, [r4, #7]	@ zero_extendqisi2
+	cmp	r2, #0
+	bne	.L1156
+	ldr	r3, .L1171+24
+	movw	r2, #65535
+	ldr	r3, [r3]
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	b	.L1132
+.L1142:
+	ldrh	r1, [lr], #2
+	movw	fp, #65535
+	str	r8, [r3, #8]
+	str	r8, [r3, #12]
+	cmp	r1, fp
+	beq	.L1141
+	mla	fp, r2, r6, ip
+	adds	r6, r6, #1
+	lsls	r1, r1, #10
+	uxth	r6, r6
+	str	r1, [fp, #4]
+.L1141:
+	adds	r3, r3, #20
+	b	.L1140
+.L1146:
+	movs	r2, #2
+	b	.L1169
+.L1145:
+	ldrh	r2, [r1, r5, lsl #1]
+	mov	r0, r7
+	str	r3, [sp, #4]
+	adds	r2, r2, #1
+	strh	r2, [r1, r5, lsl #1]	@ movhi
+	ldr	r2, [r8]
 	adds	r2, r2, #1
-	uxth	r2, r2
-	str	r2, [sp, #12]
-.L1172:
-	adds	r3, r3, #1
-	b	.L1171
-.L1202:
-	ldr	r3, [sp, #24]
-	movs	r5, #20
-	muls	r5, r3, r5
-	ldr	r3, [r6]
-	str	r3, [sp, #28]
-	adds	r7, r3, r5
-	ldr	r4, [r7, #4]
-	ubfx	r0, r4, #10, #16
-	str	r4, [sp, #44]
-	bl	P2V_plane
+	str	r2, [r8]
+	bl	ftl_set_blk_mode.part.6
+	b	.L1170
+.L1151:
+	ldr	r1, [r3, #-20]
+	and	r1, r1, ip
+	str	r1, [r3, #-20]
+	b	.L1150
+.L1154:
+	ldr	r1, .L1171+28
+	mul	r2, r3, r8
+	ldr	r1, [r1]
+	ldr	fp, [r1, r2]
+	adds	r0, r1, r2
+	cmp	fp, #-1
+	bne	.L1153
+	ldr	r0, [r0, #4]
+	add	r10, r10, #1
+	str	r3, [sp, #4]
+	ubfx	r0, r0, #10, #16
+	bl	FtlBbmMapBadBlock
+	add	r2, r4, r8, lsl #1
 	ldr	r3, [sp, #4]
-	cmp	fp, r3
-	bcc	.L1175
-	ldr	r3, [sp, #28]
-	bne	.L1176
-	ldr	r2, [sp, #20]
-	cmp	r2, r0
-	bhi	.L1175
+	strh	fp, [r2, #16]	@ movhi
+	ldrb	r2, [r4, #7]	@ zero_extendqisi2
+	subs	r2, r2, #1
+	strb	r2, [r4, #7]
+.L1153:
+	add	r8, r8, #1
+	b	.L1152
+.L1156:
+	ldr	r3, .L1171+60
+	ldr	r1, .L1171+64
+	ldrh	r3, [r3]
+	strh	r7, [r4]	@ movhi
+	smulbb	r3, r3, r2
+	movs	r2, #0
+	strh	r2, [r4, #2]	@ movhi
+	strb	r2, [r4, #6]
+	ldr	r2, [r1]
+	uxth	r3, r3
+	strh	r3, [r4, #4]	@ movhi
+	str	r2, [r4, #12]
+	adds	r2, r2, #1
+	str	r2, [r1]
+	ldr	r2, .L1171+24
+	ldr	r1, [sp]
+	ldr	r2, [r2]
+	strh	r3, [r2, r1]	@ movhi
+	ldrh	r3, [r4, #4]
+	cbz	r3, .L1157
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	cbnz	r3, .L1158
+.L1157:
+	movw	r2, #2707
+	ldr	r1, .L1171+4
+	ldr	r0, .L1171+8
+	bl	printf
+.L1158:
+	movs	r0, #0
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1172:
+	.align	2
+.L1171:
+	.word	.LANCHOR48
+	.word	.LANCHOR163
+	.word	.LC1
+	.word	.LANCHOR53
+	.word	.LANCHOR87
+	.word	.LANCHOR47
+	.word	.LANCHOR42
+	.word	.LANCHOR106
+	.word	.LANCHOR3
+	.word	.LANCHOR80
+	.word	.LANCHOR43
+	.word	.LANCHOR14
+	.word	.LANCHOR76
+	.word	.LANCHOR74
+	.word	.LANCHOR127
+	.word	.LANCHOR19
+	.word	.LANCHOR70
+	.word	.LANCHOR45
+	.word	.LANCHOR5
+	.word	.LANCHOR72
+	.word	.LANCHOR73
+	.word	-1024
+	.size	allocate_data_superblock, .-allocate_data_superblock
+	.section	.text.FtlGcFreeBadSuperBlk,"ax",%progbits
+	.align	1
+	.global	FtlGcFreeBadSuperBlk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcFreeBadSuperBlk, %function
+FtlGcFreeBadSuperBlk:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r10, r0
+	ldr	r4, .L1185
+	ldrh	r3, [r4]
+	cbz	r3, .L1174
+	ldr	r8, .L1185+16
+	movs	r6, #0
+.L1175:
+	ldr	r3, .L1185+4
+	ldrh	r2, [r3]
+	uxth	r3, r6
+	cmp	r2, r3
+	bhi	.L1181
+	bl	FtlGcReFreshBadBlk
+.L1174:
+	movs	r0, #0
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1181:
+	ldr	r2, .L1185+8
+	uxth	r3, r6
+	mov	r1, r10
+	movs	r7, #0
+	ldrb	r0, [r2, r3]	@ zero_extendqisi2
+	bl	V2P_block
+	ldr	r2, .L1185+12
+	mov	fp, r0
 .L1176:
-	ldr	r2, [sp, #8]
-	cmp	fp, r2
+	ldrh	r3, [r4]
+	uxth	r5, r7
+	cmp	r3, r5
+	bhi	.L1180
+	adds	r6, r6, #1
+	b	.L1175
+.L1180:
+	uxth	r3, r7
+	ldrh	r1, [r8, r3, lsl #1]
+	cmp	r1, fp
 	bne	.L1177
-	cmp	r10, r0
-	beq	.L1178
+	mov	r1, fp
+	mov	r0, r2
+	str	r3, [sp, #4]
+	str	r2, [sp]
+	bl	printf
+	mov	r0, fp
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	ldr	r3, [sp, #4]
+	ldrh	r1, [r4]
+	ldr	r2, [sp]
+	add	r3, r8, r3, lsl #1
+.L1178:
+	cmp	r5, r1
+	bcc	.L1179
+	subs	r1, r1, #1
+	strh	r1, [r4]	@ movhi
 .L1177:
-	ldr	r3, [r3, r5]
-	adds	r3, r3, #1
-	beq	.L1179
-	ldr	r3, [r7, #12]
-	movw	r2, #61589
-	ldrh	r1, [r3]
-	cmp	r1, r2
-	beq	.L1180
+	adds	r7, r7, #1
+	b	.L1176
+.L1179:
+	ldrh	r0, [r3, #2]!
+	adds	r5, r5, #1
+	uxth	r5, r5
+	strh	r0, [r3, #-2]	@ movhi
+	b	.L1178
 .L1186:
-	ldrh	r0, [r8]
-.L1266:
-	bl	decrement_vpc_count
-.L1175:
-	ldr	r3, [sp, #24]
-	adds	r3, r3, #1
-	b	.L1267
-.L1180:
-	ldr	r2, [r3, #4]
-	str	r2, [sp]
-	adds	r2, r2, #1
-	beq	.L1181
-	ldr	r2, .L1272+24
-	ldr	r0, [sp]
-	ldr	r1, [r2]
-	bl	ftl_cmp_data_ver
-	cbz	r0, .L1181
-	ldr	r1, [sp]
-	adds	r1, r1, #1
-	str	r1, [r2]
-.L1181:
-	ldr	r4, [r3, #8]
-	add	r1, sp, #40
-	ldr	r3, [r3, #12]
-	movs	r2, #0
-	mov	r0, r4
-	str	r3, [sp, #36]
-	bl	log2phys
-	ldr	r3, .L1272
-	ldr	r1, [r3]
-	adds	r3, r1, #1
-	beq	.L1182
-	ldr	r0, [sp]
-	bl	ftl_cmp_data_ver
-	cmp	r0, #0
-	beq	.L1182
-	ldr	r3, [sp, #36]
-	adds	r7, r3, #1
-	beq	.L1183
-	ldr	r0, [r6]
-	movs	r2, #0
-	movs	r1, #1
-	add	r0, r0, r5
-	str	r3, [r0, #4]
-	ldr	r7, [r0, #12]
-	bl	FlashReadPages
-	ldr	r2, [r6]
-	ldr	r1, [r2, r5]
-	adds	r3, r2, r5
-	adds	r1, r1, #1
-	bne	.L1184
+	.align	2
 .L1185:
-	mov	r3, #-1
-	ldrh	r0, [r8]
-	str	r3, [sp, #36]
-	bl	decrement_vpc_count
-.L1193:
-	ldr	r7, [sp, #36]
-	adds	r0, r7, #1
-	beq	.L1175
-.L1206:
-	ubfx	r0, r7, #10, #16
-	bl	P2V_block_in_plane
-	ldr	r3, .L1272+28
+	.word	.LANCHOR101
+	.word	.LANCHOR3
+	.word	.LANCHOR13
+	.word	.LC104
+	.word	.LANCHOR102
+	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
+	.section	.text.update_vpc_list,"ax",%progbits
+	.align	1
+	.global	update_vpc_list
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	update_vpc_list, %function
+update_vpc_list:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
 	mov	r4, r0
-	ldrh	r3, [r3]
-	cmp	r3, r0
-	bhi	.L1198
-	movw	r2, #2006
-	ldr	r1, .L1272+32
-	ldr	r0, .L1272+36
-	bl	printf
-.L1198:
-	ldr	r3, .L1272+40
+	ldr	r3, .L1197
 	ldr	r3, [r3]
-	ldrh	r3, [r3, r4, lsl #1]
-	cmp	r3, #0
-	beq	.L1199
-	mov	r0, r4
-	b	.L1266
-.L1183:
-	ldr	r3, [sp, #44]
-	ldr	r2, [sp, #40]
-	cmp	r2, r3
-	bne	.L1186
-	movs	r2, #1
-	add	r1, sp, #36
-	mov	r0, r4
-	bl	log2phys
-	b	.L1186
-.L1184:
-	ldr	r1, [r7, #8]
-	cmp	r4, r1
-	bne	.L1185
-	ldr	r0, .L1272
-	ldr	r1, [r7, #4]
-	ldr	r0, [r0]
-	str	r1, [sp, #28]
-	bl	ftl_cmp_data_ver
-	cmp	r0, #0
-	beq	.L1185
-	ldr	r1, [sp, #40]
-	ldr	r0, [sp, #44]
-	cmp	r1, r0
+	ldrh	r3, [r3, r0, lsl #1]
+	cmp	r3, #0
 	bne	.L1188
-.L1191:
-	ldr	r1, [sp, #36]
-	mov	r0, r4
-	bl	FtlReUsePrevPpa
-	b	.L1185
-.L1188:
-	ldr	r0, [sp, #36]
+	ldr	r2, .L1197+4
+	ldrh	r1, [r2]
 	cmp	r1, r0
-	beq	.L1185
-	adds	r0, r1, #1
-	beq	.L1189
-	str	r1, [r3, #4]
-	movs	r2, #0
-	movs	r1, #1
-	mov	r0, r3
-	ldr	r7, [r3, #12]
-	bl	FlashReadPages
+	bne	.L1189
+	movw	r3, #65535
+	strh	r3, [r2]	@ movhi
 .L1190:
-	ldr	r3, [r6]
-	ldr	r3, [r3, r5]
-	adds	r3, r3, #1
-	beq	.L1191
-	ldr	r3, [r7, #4]
-	ldr	r2, .L1272
-	mov	r1, r3
-	ldr	r0, [r2]
-	bl	ftl_cmp_data_ver
-	cmp	r0, #0
-	beq	.L1191
-	mov	r1, r3
-	ldr	r0, [sp, #28]
-	bl	ftl_cmp_data_ver
-	cmp	r0, #0
-	beq	.L1185
-	b	.L1191
-.L1189:
-	str	r1, [r2, r5]
-	b	.L1190
-.L1273:
-	.align	2
-.L1272:
-	.word	.LANCHOR153
-	.word	.LANCHOR161
-	.word	.LANCHOR144
-	.word	.LANCHOR120
-	.word	.LANCHOR3
-	.word	.LANCHOR19
-	.word	.LANCHOR71
-	.word	.LANCHOR5
-	.word	.LANCHOR160
-	.word	.LC1
-	.word	.LANCHOR42
-.L1182:
-	ldr	r3, [sp, #44]
-	ldr	r2, [sp, #40]
-	cmp	r2, r3
-	beq	.L1193
-	movs	r2, #1
-	add	r1, sp, #44
+	ldr	r5, .L1197+8
+	mov	r1, r4
+	ldr	r0, .L1197+12
+	bl	List_remove_node
+	ldrh	r3, [r5]
+	cbnz	r3, .L1192
+	movw	r2, #2777
+	ldr	r1, .L1197+16
+	ldr	r0, .L1197+20
+	bl	printf
+.L1192:
+	ldrh	r3, [r5]
 	mov	r0, r4
-	bl	log2phys
-	ldr	r7, [sp, #40]
-	adds	r5, r7, #1
-	beq	.L1193
-	ldr	r3, [sp, #36]
-	cmp	r7, r3
-	beq	.L1206
-	ubfx	r0, r7, #10, #16
-	bl	P2V_block_in_plane
-	ldr	r3, .L1274
-	ldrh	r3, [r3]
-	cmp	r3, r0
-	beq	.L1197
-	ldr	r3, .L1274+4
-	ldrh	r3, [r3]
-	cmp	r3, r0
-	beq	.L1197
-	ldr	r3, .L1274+8
-	ldrh	r3, [r3]
-	cmp	r3, r0
-	bne	.L1193
-.L1197:
-	ldr	r0, [r6]
-	movs	r2, #0
-	movs	r1, #1
-	str	r7, [r0, #4]
-	ldr	r5, [r0, #12]
-	bl	FlashReadPages
-	ldr	r3, [r6]
-	ldr	r3, [r3]
-	adds	r3, r3, #1
-	beq	.L1193
-	ldr	r1, [r5, #4]
-	ldr	r0, [sp]
-	bl	ftl_cmp_data_ver
-	cmp	r0, #0
-	bne	.L1193
-	movs	r2, #1
-	add	r1, sp, #40
+	subs	r3, r3, #1
+	strh	r3, [r5]	@ movhi
+	bl	free_data_superblock
 	mov	r0, r4
-	bl	log2phys
-	b	.L1193
-.L1199:
-	mov	r1, r4
-	ldr	r0, .L1274+12
+	bl	FtlGcFreeBadSuperBlk
+	ldr	r3, .L1197+24
+	ldrh	r2, [r5]
+	ldrh	r3, [r3]
+	add	r3, r3, r2
+	ldr	r2, .L1197+28
+	ldrh	r2, [r2]
+	cmp	r3, r2
+	ble	.L1196
+	movw	r2, #2780
+	ldr	r1, .L1197+16
+	ldr	r0, .L1197+20
 	bl	printf
-	b	.L1175
-.L1179:
-	ldr	r3, .L1274+16
-	ldr	r3, [r3]
-	cmp	r3, #31
-	bhi	.L1200
-	ldr	r2, .L1274+20
-	str	r4, [r2, r3, lsl #2]
-	adds	r3, r3, #1
-	ldr	r2, .L1274+16
-	str	r3, [r2]
-.L1200:
-	ldrh	r0, [r8]
-	bl	decrement_vpc_count
-	ldr	r3, .L1274+24
-	ldr	r2, [r3]
-	adds	r1, r2, #1
-	bne	.L1201
-	ldr	r2, [sp]
-.L1265:
-	str	r2, [r3]
-	b	.L1175
-.L1201:
-	ldr	r1, [sp]
-	cmp	r1, r2
-	bcs	.L1175
-	mov	r2, r1
-	b	.L1265
-.L1178:
-	strb	r10, [r8, #6]
-	mov	r2, r10
-	strh	fp, [r8, #2]	@ movhi
-	mov	r1, fp
-	b	.L1269
-.L1275:
+.L1196:
+	movs	r3, #1
+	b	.L1187
+.L1189:
+	ldr	r2, .L1197+32
+	ldrh	r2, [r2]
+	cmp	r2, r0
+	beq	.L1187
+	ldr	r2, .L1197+36
+	ldrh	r2, [r2]
+	cmp	r2, r0
+	beq	.L1187
+	ldr	r2, .L1197+40
+	ldrh	r2, [r2]
+	cmp	r2, r0
+	bne	.L1190
+.L1187:
+	mov	r0, r3
+	pop	{r3, r4, r5, pc}
+.L1188:
+	bl	List_update_data_list
+	movs	r3, #0
+	b	.L1187
+.L1198:
 	.align	2
-.L1274:
+.L1197:
+	.word	.LANCHOR42
+	.word	.LANCHOR80
+	.word	.LANCHOR45
+	.word	.LANCHOR41
+	.word	.LANCHOR164
+	.word	.LC1
+	.word	.LANCHOR48
+	.word	.LANCHOR5
 	.word	.LANCHOR51
 	.word	.LANCHOR52
 	.word	.LANCHOR53
-	.word	.LC102
-	.word	.LANCHOR162
-	.word	.LANCHOR163
-	.word	.LANCHOR153
-	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
-	.section	.text.FtlSuperblockPowerLostFix,"ax",%progbits
+	.size	update_vpc_list, .-update_vpc_list
+	.section	.text.decrement_vpc_count,"ax",%progbits
 	.align	1
-	.global	FtlSuperblockPowerLostFix
+	.global	decrement_vpc_count
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlSuperblockPowerLostFix, %function
-FtlSuperblockPowerLostFix:
-	@ args = 0, pretend = 0, frame = 24
+	.type	decrement_vpc_count, %function
+decrement_vpc_count:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, lr}
-	mov	r3, #-1
-	sub	sp, sp, #24
-	ldr	r2, .L1287
-	movs	r6, #0
+	movw	r3, #65535
+	push	{r4, r5, r6, lr}
+	cmp	r0, r3
+	mov	r4, r0
+	beq	.L1200
+	ldr	r5, .L1208
+	ldr	r3, [r5]
+	ldrh	r2, [r3, r0, lsl #1]
+	cbnz	r2, .L1201
+	mov	r1, r0
+	ldr	r0, .L1208+4
+	bl	printf
+	ldr	r3, [r5]
+	ldrh	r5, [r3, r4, lsl #1]
+	cbz	r5, .L1202
+.L1206:
+	movs	r5, #0
+.L1199:
+	mov	r0, r5
+	pop	{r4, r5, r6, pc}
+.L1202:
+	movw	r2, #2795
+.L1207:
+	ldr	r1, .L1208+8
+	ldr	r0, .L1208+12
+	bl	printf
+	b	.L1199
+.L1201:
+	subs	r2, r2, #1
+	strh	r2, [r3, r0, lsl #1]	@ movhi
+.L1200:
+	ldr	r6, .L1208+16
+	movw	r3, #65535
+	ldrh	r0, [r6]
+	cmp	r0, r3
+	bne	.L1204
+	strh	r4, [r6]	@ movhi
+	b	.L1206
+.L1204:
+	cmp	r4, r0
+	beq	.L1206
+	bl	update_vpc_list
+	ldr	r3, .L1208+20
+	adds	r5, r0, #0
+	ldr	r2, .L1208+24
+	it	ne
+	movne	r5, #1
+	strh	r4, [r6]	@ movhi
+	ldr	r3, [r3]
+	ldr	r2, [r2]
+	subs	r3, r3, r2
+	asrs	r2, r3, #1
+	ldr	r3, .L1208+28
+	muls	r3, r2, r3
+	ldr	r2, .L1208
+	ldr	r2, [r2]
+	uxth	r1, r3
+	ldrh	r2, [r2, r1, lsl #1]
+	cmp	r2, #0
+	bne	.L1199
+	cmp	r4, r1
+	beq	.L1199
+	movw	r2, #2811
+	b	.L1207
+.L1209:
+	.align	2
+.L1208:
+	.word	.LANCHOR42
+	.word	.LC105
+	.word	.LANCHOR165
+	.word	.LC1
+	.word	.LANCHOR142
+	.word	.LANCHOR41
+	.word	.LANCHOR40
+	.word	-1431655765
+	.size	decrement_vpc_count, .-decrement_vpc_count
+	.section	.text.FtlRecoverySuperblock,"ax",%progbits
+	.align	1
+	.global	FtlRecoverySuperblock
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlRecoverySuperblock, %function
+FtlRecoverySuperblock:
+	@ args = 0, pretend = 0, frame = 48
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldrh	r3, [r0]
+	movw	r2, #65535
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r8, r0
+	sub	sp, sp, #48
+	cmp	r3, r2
+	beq	.L1338
+	ldrh	r3, [r0, #2]
+	str	r3, [sp, #4]
+	ldrb	r3, [r0, #6]	@ zero_extendqisi2
+	ldr	r1, [sp, #4]
+	str	r3, [sp, #20]
+	ldr	r3, .L1346
+	ldrh	r3, [r3]
+	cmp	r3, r1
+	mov	r3, #0
+	bne	.L1213
+	strh	r3, [r0, #4]	@ movhi
+.L1344:
+	strb	r3, [r8, #6]
+.L1338:
+	movs	r0, #0
+	add	sp, sp, #48
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1213:
+	ldrh	r0, [r0, #16]
+.L1214:
+	cmp	r0, r2
+	uxth	r5, r3
+	add	r3, r3, #1
+	beq	.L1215
+	movs	r1, #1
+	bl	FtlGetLastWrittenPage
 	mov	r4, r0
-	str	r3, [sp, #20]
-	movs	r7, #7
-	ldr	r3, .L1287+4
-	ldr	r5, [r2]
-	mvn	r2, #2
-	ldr	r8, .L1287+16
+	adds	r0, r0, #1
+	beq	.L1216
+	ldr	r3, .L1346+4
+	movs	r2, #0
+	mov	r5, r2
+	movw	fp, #65535
+	mov	r10, #20
+	ldrh	ip, [r3]
+	ldr	r3, .L1346+8
+	ldr	r0, [r3]
+	ldr	r3, .L1346+12
+	ldr	r3, [r3]
+	str	r3, [sp, #8]
+	ldr	r3, .L1346+16
+	ldrh	r7, [r3]
+	ldr	r3, .L1346+20
 	ldr	r3, [r3]
-	str	r5, [sp, #16]
 	str	r3, [sp, #12]
-	str	r2, [r5, #8]
-	mvn	r2, #1
-	str	r2, [r5, #12]
-	ldrh	r2, [r0]
-	strh	r6, [r5]	@ movhi
-	strh	r2, [r5, #2]	@ movhi
-	movw	r2, #61589
-	str	r2, [r3]
-	add	r2, r2, #304087040
-	add	r2, r2, #1269760
-	addw	r2, r2, #1507
-	str	r2, [r3, #4]
-.L1277:
-	subs	r7, r7, #1
-	beq	.L1279
-	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1278
-.L1279:
-	ldr	r3, .L1287+8
-	ldrh	r1, [r4]
-	ldrh	r0, [r4, #4]
-	ldr	r2, [r3]
-	ldrh	r3, [r2, r1, lsl #1]
-	subs	r3, r3, r0
-	strh	r3, [r2, r1, lsl #1]	@ movhi
-	ldr	r3, .L1287+12
+	ldr	r3, .L1346+24
+	ldrh	lr, [r3]
+	add	r3, r8, #16
+	str	r3, [sp, #16]
+	str	r3, [sp]
+.L1217:
+	uxth	r3, r2
+	cmp	ip, r3
+	bhi	.L1221
+	movs	r2, #0
+	mov	r1, r5
+	bl	FlashReadPages
+	ldr	r2, .L1346+28
+	uxth	r1, r4
+	movw	fp, #65535
+	str	r1, [sp, #12]
+	ldr	r3, [r2]
+	subs	r3, r3, #1
+	str	r3, [sp]
+	ldr	r3, .L1346+8
+	ldr	r10, [r3]
+	movs	r3, #0
+	mov	r7, r10
+.L1222:
+	uxth	r1, r3
+	cmp	r5, r1
+	bhi	.L1227
+	bne	.L1225
+	adds	r3, r4, #1
+	uxth	r3, r3
+	str	r3, [sp, #8]
+.L1339:
+	ldr	r0, [r10, #4]
+	ubfx	r0, r0, #10, #16
+	bl	P2V_plane
+	ldr	r3, .L1346
+	mov	r10, r0
+	ldr	r2, [sp, #8]
 	ldrh	r3, [r3]
-	strh	r3, [r4, #2]	@ movhi
+	cmp	r3, r2
+	bne	.L1229
+	ldrh	r3, [sp, #8]
+	strh	r3, [r8, #2]	@ movhi
 	movs	r3, #0
-	strb	r3, [r4, #6]
-	strh	r3, [r4, #4]	@ movhi
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, pc}
-.L1278:
-	mov	r0, r4
-	bl	get_new_active_ppa
-	str	r0, [sp, #8]
-	adds	r0, r0, #1
-	beq	.L1279
-	ldr	r3, [r8]
-	movs	r1, #1
-	add	r0, sp, #4
-	str	r3, [r5, #4]
+	strb	r3, [r8, #6]
+	strh	r3, [r8, #4]	@ movhi
+.L1229:
+	ldr	r3, [sp, #8]
+	ldr	r2, [sp, #4]
+	cmp	r3, r2
+	bne	.L1230
+	ldr	r3, [sp, #20]
+	cmp	r10, r3
+	bne	.L1230
+	ldr	r1, [sp, #8]
+	mov	r2, r10
+.L1345:
+	mov	r0, r8
+	bl	ftl_sb_update_avl_pages
+	b	.L1338
+.L1215:
+	uxth	r1, r3
+	adds	r1, r1, #8
+	ldrh	r0, [r8, r1, lsl #1]
+	b	.L1214
+.L1216:
+	ldr	r3, [sp, #4]
+	cbz	r3, .L1218
+	movw	r2, #1766
+	ldr	r1, .L1346+32
+	ldr	r0, .L1346+36
+	bl	printf
+.L1218:
+	ldr	r3, [sp, #20]
+	cbz	r3, .L1219
+	cmp	r5, r3
+	beq	.L1219
+	movw	r2, #1767
+	ldr	r1, .L1346+32
+	ldr	r0, .L1346+36
+	bl	printf
+.L1219:
+	movs	r3, #0
+	strh	r3, [r8, #2]	@ movhi
+	b	.L1344
+.L1221:
+	ldr	r1, [sp]
+	ldrh	r3, [r1], #2
+	cmp	r3, fp
+	str	r1, [sp]
+	beq	.L1220
+	mla	r1, r10, r5, r0
+	ldr	r6, [sp, #8]
+	orr	r3, r4, r3, lsl #10
+	str	r3, [r1, #4]
+	mul	r3, r7, r5
+	bic	r3, r3, #3
+	add	r3, r3, r6
+	ldr	r6, [sp, #12]
+	str	r3, [r1, #8]
+	mul	r3, lr, r5
+	adds	r5, r5, #1
+	uxth	r5, r5
+	bic	r3, r3, #3
+	add	r3, r3, r6
+	str	r3, [r1, #12]
+.L1220:
+	adds	r2, r2, #1
+	b	.L1217
+.L1227:
+	ldr	r1, [r7]
+	cbnz	r1, .L1223
+	ldr	r1, [r7, #12]
+	ldr	r6, [r1, #4]
+	str	r1, [sp, #8]
+	adds	r1, r6, #1
+	beq	.L1224
+	ldr	r1, [r2]
+	mov	r0, r6
+	bl	ftl_cmp_data_ver
+	cbz	r0, .L1224
+	adds	r6, r6, #1
+	str	r6, [r2]
+.L1224:
+	ldr	r1, [sp, #8]
+	ldr	r1, [r1]
+	adds	r1, r1, #1
+	bne	.L1226
+.L1225:
+	uxth	r2, r4
+	uxth	r3, r3
+	str	r2, [sp, #8]
+	movs	r2, #20
+	mla	r10, r2, r3, r10
+	b	.L1339
+.L1223:
+	ldr	fp, [sp, #12]
+.L1226:
 	adds	r3, r3, #1
-	adds	r2, r3, #1
-	it	eq
-	moveq	r3, r6
-	str	r3, [r8]
+	adds	r7, r7, #20
+	b	.L1222
+.L1230:
+	movw	r3, #65535
+	cmp	fp, r3
+	bne	.L1231
+	ldrb	r3, [r8, #8]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L1232
+.L1231:
+	ldr	r3, .L1346+40
+	uxth	r6, r4
+	uxth	r4, r4
+	ldr	r7, .L1346+8
+	ldr	r2, [r3]
+	adds	r2, r2, #1
+	itt	eq
+	ldreq	r2, [sp]
+	streq	r2, [r3]
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #7
+	cmp	r4, r3
+	itet	gt
+	subgt	r4, r6, #7
+	ldrle	r4, [sp, #4]
+	uxthgt	r4, r4
+.L1235:
+	cmp	r4, r6
+	bhi	.L1245
+	ldr	r3, .L1346+4
+	movw	lr, #65535
+	ldr	r0, [r7]
+	mov	ip, #20
+	ldrh	fp, [r3]
+	ldr	r3, [sp, #16]
+	str	r3, [sp, #12]
 	movs	r3, #0
-	mov	r2, r3
-	bl	FlashProgPages
-	ldrh	r0, [r4]
-	bl	decrement_vpc_count
-	b	.L1277
-.L1288:
+	mov	r5, r3
+	b	.L1246
+.L1237:
+	ldr	r1, [sp, #12]
+	ldrh	r2, [r1], #2
+	cmp	r2, lr
+	str	r1, [sp, #12]
+	beq	.L1236
+	mla	r1, ip, r5, r0
+	adds	r5, r5, #1
+	orr	r2, r4, r2, lsl #10
+	uxth	r5, r5
+	str	r2, [r1, #4]
+.L1236:
+	adds	r3, r3, #1
+.L1246:
+	uxth	r2, r3
+	cmp	fp, r2
+	bhi	.L1237
+	mov	r1, r5
+	movs	r2, #0
+	bl	FlashReadPages
+	ldr	r3, .L1346+40
+	movs	r1, #20
+	movs	r0, #0
+	movw	ip, #65535
+	ldr	r2, [r3]
+	ldr	r3, [r7]
+	mla	r5, r1, r5, r3
+.L1238:
+	cmp	r5, r3
+	bne	.L1243
+	cbz	r0, .L1244
+	ldr	r3, .L1346+40
+	str	r2, [r3]
+.L1244:
+	adds	r4, r4, #1
+	uxth	r4, r4
+	b	.L1235
+.L1347:
 	.align	2
-.L1287:
-	.word	.LANCHOR108
-	.word	.LANCHOR107
-	.word	.LANCHOR42
+.L1346:
 	.word	.LANCHOR19
+	.word	.LANCHOR3
+	.word	.LANCHOR112
+	.word	.LANCHOR91
+	.word	.LANCHOR23
+	.word	.LANCHOR92
+	.word	.LANCHOR24
 	.word	.LANCHOR71
-	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
-	.section	.text.FtlLoadBbt,"ax",%progbits
-	.align	1
-	.global	FtlLoadBbt
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlLoadBbt, %function
-FtlLoadBbt:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	ldr	r8, .L1318+40
-	ldr	r4, .L1318
-	ldr	r3, [r8]
-	ldr	r7, .L1318+4
-	mov	r10, r4
-	str	r3, [r4, #8]
-	ldr	r3, .L1318+8
-	ldr	r6, [r3]
-	str	r6, [r4, #12]
-	bl	FtlBbtMemInit
-	ldrh	r5, [r7]
-	subs	r5, r5, #1
-	uxth	r5, r5
-.L1290:
-	ldrh	r3, [r7]
-	subs	r3, r3, #15
-	cmp	r3, r5
-	bgt	.L1293
-	lsls	r3, r5, #10
+	.word	.LANCHOR166
+	.word	.LC1
+	.word	.LANCHOR145
+.L1243:
+	ldr	r1, [r3]
+	cmp	r1, #0
+	beq	.L1239
+	cbz	r0, .L1232
+.L1340:
+	ldr	r3, .L1348
+	str	r2, [r3]
+.L1232:
+	ldr	fp, [sp, #4]
 	movs	r2, #1
-	mov	r1, r2
-	mov	r0, r10
-	str	r3, [r4, #4]
+	ldr	r6, .L1348+4
+	ldr	r3, .L1348+8
+	strh	r2, [r3]	@ movhi
+.L1247:
+	ldr	r3, .L1348+12
+	movw	lr, #65535
+	ldr	r0, [r6]
+	movs	r7, #20
+	ldr	r1, [sp, #16]
+	ldrh	r4, [r3]
+	movs	r3, #0
+	str	r3, [sp, #12]
+.L1248:
+	uxth	r2, r3
+	cmp	r4, r2
+	bhi	.L1250
+	movs	r2, #0
+	ldr	r1, [sp, #12]
 	bl	FlashReadPages
-	ldr	r3, [r4]
+	movs	r3, #0
+.L1343:
+	str	r3, [sp, #24]
+	ldr	r2, [sp, #12]
+	ldrh	r3, [sp, #24]
+	cmp	r2, r3
+	bhi	.L1278
+	ldr	r3, .L1348+16
+	add	fp, fp, #1
+	uxth	fp, fp
+	ldrh	r3, [r3]
+	cmp	r3, fp
+	bne	.L1247
+	ldr	r2, .L1348+12
+	movw	r0, #65535
+	movs	r3, #0
+	strh	fp, [r8, #2]	@ movhi
+	strh	r3, [r8, #4]	@ movhi
+	ldrh	r2, [r2]
+.L1279:
+	uxth	r1, r3
+	cmp	r1, r2
+	bcs	.L1338
+	ldr	r1, [sp, #16]
+	ldrh	r4, [r1], #2
+	cmp	r4, r0
+	str	r1, [sp, #16]
+	add	r1, r3, #1
+	bne	.L1344
+	mov	r3, r1
+	b	.L1279
+.L1239:
+	ldr	r1, [r3, #12]
+	ldrh	lr, [r1]
+	cmp	lr, ip
+	beq	.L1242
+	ldr	r1, [r1, #4]
+	cmp	r1, #-1
+	itt	ne
+	movne	r2, r1
+	movne	r0, #1
+.L1242:
+	adds	r3, r3, #20
+	b	.L1238
+.L1245:
+	mov	r2, #-1
+	b	.L1340
+.L1250:
+	ldrh	r2, [r1], #2
+	cmp	r2, lr
+	beq	.L1249
+	ldr	r5, [sp, #12]
+	orr	r2, fp, r2, lsl #10
+	mla	ip, r7, r5, r0
+	str	r2, [ip, #4]
+	mov	r2, r5
+	adds	r2, r2, #1
+	uxth	r2, r2
+	str	r2, [sp, #12]
+.L1249:
 	adds	r3, r3, #1
-	bne	.L1291
-	ldr	r3, [r4, #4]
-	movs	r2, #1
-	mov	r1, r2
-	mov	r0, r10
+	b	.L1248
+.L1278:
+	ldr	r3, [sp, #24]
+	movs	r5, #20
+	muls	r5, r3, r5
+	ldr	r3, [r6]
+	str	r3, [sp, #28]
+	adds	r7, r3, r5
+	ldr	r4, [r7, #4]
+	ubfx	r0, r4, #10, #16
+	str	r4, [sp, #44]
+	bl	P2V_plane
+	ldr	r3, [sp, #4]
+	cmp	fp, r3
+	bcc	.L1252
+	ldr	r3, [sp, #28]
+	bne	.L1253
+	ldr	r2, [sp, #20]
+	cmp	r2, r0
+	bhi	.L1252
+.L1253:
+	ldr	r2, [sp, #8]
+	cmp	fp, r2
+	bne	.L1254
+	cmp	r10, r0
+	beq	.L1255
+.L1254:
+	ldr	r3, [r3, r5]
 	adds	r3, r3, #1
-	str	r3, [r4, #4]
+	beq	.L1256
+	ldr	r3, [r7, #12]
+	movw	r2, #61589
+	ldrh	r1, [r3]
+	cmp	r1, r2
+	beq	.L1257
+	ldrh	r0, [r8]
+.L1341:
+	bl	decrement_vpc_count
+	b	.L1252
+.L1257:
+	ldr	r2, [r3, #4]
+	str	r2, [sp]
+	adds	r2, r2, #1
+	beq	.L1258
+	ldr	r2, .L1348+20
+	ldr	r0, [sp]
+	ldr	r1, [r2]
+	bl	ftl_cmp_data_ver
+	cbz	r0, .L1258
+	ldr	r1, [sp]
+	adds	r1, r1, #1
+	str	r1, [r2]
+.L1258:
+	ldr	r4, [r3, #8]
+	add	r1, sp, #40
+	ldr	r3, [r3, #12]
+	movs	r2, #0
+	mov	r0, r4
+	str	r3, [sp, #36]
+	bl	log2phys
+	ldr	r3, .L1348
+	ldr	r1, [r3]
+	adds	r3, r1, #1
+	beq	.L1259
+	ldr	r0, [sp]
+	bl	ftl_cmp_data_ver
+	cmp	r0, #0
+	beq	.L1259
+	ldr	r3, [sp, #36]
+	adds	r7, r3, #1
+	beq	.L1260
+	ldr	r0, [r6]
+	movs	r2, #0
+	movs	r1, #1
+	add	r0, r0, r5
+	str	r3, [r0, #4]
+	ldr	r7, [r0, #12]
 	bl	FlashReadPages
-.L1291:
-	ldr	r3, [r4]
-	adds	r3, r3, #1
-	beq	.L1292
-	ldrh	r2, [r6]
-	movw	r3, #61649
+	ldr	r2, [r6]
+	ldr	r1, [r2, r5]
+	adds	r3, r2, r5
+	adds	r1, r1, #1
+	bne	.L1261
+.L1262:
+	mov	r3, #-1
+	str	r3, [sp, #36]
+.L1269:
+	ldr	r7, [sp, #36]
+	adds	r0, r7, #1
+	beq	.L1252
+.L1282:
+	ubfx	r0, r7, #10, #16
+	bl	P2V_block_in_plane
+	ldr	r3, .L1348+24
+	mov	r4, r0
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bhi	.L1274
+	movw	r2, #2019
+	ldr	r1, .L1348+28
+	ldr	r0, .L1348+32
+	bl	printf
+.L1274:
+	ldr	r3, .L1348+36
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r4, lsl #1]
+	cmp	r3, #0
+	beq	.L1275
+	mov	r0, r4
+	b	.L1341
+.L1260:
+	ldr	r3, [sp, #44]
+	ldr	r2, [sp, #40]
 	cmp	r2, r3
-	bne	.L1292
-	ldr	r3, .L1318+12
-	ldr	r2, [r6, #4]
-	strh	r5, [r3]	@ movhi
-	str	r2, [r3, #8]
-	ldrh	r2, [r6, #8]
-	strh	r2, [r3, #4]	@ movhi
-.L1293:
-	ldr	r5, .L1318+12
-	movw	r2, #65535
-	ldrh	r3, [r5]
-	cmp	r3, r2
-	beq	.L1307
-	ldrh	r3, [r5, #4]
-	cmp	r3, r2
-	beq	.L1297
-	lsls	r3, r3, #10
+	bne	.L1252
 	movs	r2, #1
-	mov	r1, r2
-	ldr	r0, .L1318
-	str	r3, [r4, #4]
-	bl	FlashReadPages
-	ldr	r3, [r4]
+	add	r1, sp, #36
+	mov	r0, r4
+	bl	log2phys
+.L1252:
+	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	beq	.L1297
-	ldrh	r2, [r6]
-	movw	r3, #61649
-	cmp	r2, r3
-	bne	.L1297
-	ldr	r3, [r6, #4]
-	ldr	r2, [r5, #8]
-	cmp	r3, r2
-	bls	.L1297
-	ldrh	r2, [r5, #4]
-	str	r3, [r5, #8]
-	ldrh	r3, [r6, #8]
-	strh	r2, [r5]	@ movhi
-	strh	r3, [r5, #4]	@ movhi
-.L1297:
-	ldr	r10, .L1318
+	b	.L1343
+.L1261:
+	ldr	r1, [r7, #8]
+	cmp	r4, r1
+	bne	.L1262
+	ldr	r0, .L1348
+	ldr	r1, [r7, #4]
+	ldr	r0, [r0]
+	str	r1, [sp, #28]
+	bl	ftl_cmp_data_ver
+	cmp	r0, #0
+	beq	.L1262
+	ldr	r1, [sp, #40]
+	ldr	r0, [sp, #44]
+	cmp	r1, r0
+	bne	.L1264
+.L1267:
+	ldr	r1, [sp, #36]
+	mov	r0, r4
+	bl	FtlReUsePrevPpa
+	b	.L1262
+.L1264:
+	ldr	r0, [sp, #36]
+	cmp	r1, r0
+	beq	.L1262
+	adds	r0, r1, #1
+	beq	.L1265
+	str	r1, [r3, #4]
+	movs	r2, #0
 	movs	r1, #1
-	ldrh	r0, [r5]
-	bl	FtlGetLastWrittenPage
-	sxth	r7, r0
-	adds	r0, r0, #1
-	strh	r0, [r5, #2]	@ movhi
-.L1299:
-	cmp	r7, #0
-	bge	.L1302
-	movs	r2, #254
-	ldr	r1, .L1318+16
-	ldr	r0, .L1318+20
-	bl	printf
-.L1301:
-	ldrh	r3, [r6, #10]
-	ldrh	r0, [r6, #12]
-	strh	r3, [r5, #6]	@ movhi
-	movw	r3, #65535
-	cmp	r0, r3
-	beq	.L1304
-	ldr	r3, .L1318+24
-	ldr	r2, [r3]
-	cmp	r0, r2
-	beq	.L1304
-	ldr	r3, .L1318+28
-	ldrh	r3, [r3]
-	lsrs	r3, r3, #2
+	mov	r0, r3
+	ldr	r7, [r3, #12]
+	bl	FlashReadPages
+.L1266:
+	ldr	r3, [r6]
+	ldr	r3, [r3, r5]
+	adds	r3, r3, #1
+	beq	.L1267
+	ldr	r3, [r7, #4]
+	ldr	r2, .L1348
+	mov	r1, r3
+	ldr	r0, [r2]
+	bl	ftl_cmp_data_ver
+	cmp	r0, #0
+	beq	.L1267
+	mov	r1, r3
+	ldr	r0, [sp, #28]
+	bl	ftl_cmp_data_ver
+	cmp	r0, #0
+	beq	.L1262
+	b	.L1267
+.L1265:
+	str	r1, [r2, r5]
+	b	.L1266
+.L1259:
+	ldr	r3, [sp, #44]
+	ldr	r2, [sp, #40]
 	cmp	r2, r3
-	bcs	.L1304
-	cmp	r0, r3
-	bcs	.L1304
-	bl	FtlSysBlkNumInit
-.L1304:
-	ldr	r6, .L1318+32
-	movs	r5, #0
-	ldr	r7, .L1318+36
-	ldr	r8, .L1318+44
-.L1305:
-	ldrh	r3, [r7]
-	cmp	r5, r3
-	bcc	.L1306
-	movs	r0, #0
-	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L1292:
-	subs	r5, r5, #1
-	uxth	r5, r5
-	b	.L1290
-.L1302:
-	ldrh	r3, [r5]
+	beq	.L1269
 	movs	r2, #1
-	mov	r1, r2
-	mov	r0, r10
-	orr	r3, r7, r3, lsl #10
-	str	r3, [r4, #4]
-	ldr	r3, [r8]
-	str	r3, [r4, #8]
+	add	r1, sp, #44
+	mov	r0, r4
+	bl	log2phys
+	ldr	r7, [sp, #40]
+	adds	r5, r7, #1
+	beq	.L1269
+	ldr	r3, [sp, #36]
+	cmp	r7, r3
+	beq	.L1282
+	ubfx	r0, r7, #10, #16
+	bl	P2V_block_in_plane
+	ldr	r3, .L1348+40
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	beq	.L1273
+	ldr	r3, .L1348+44
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	beq	.L1273
+	ldr	r3, .L1348+48
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bne	.L1269
+.L1273:
+	ldr	r0, [r6]
+	movs	r2, #0
+	movs	r1, #1
+	str	r7, [r0, #4]
+	ldr	r5, [r0, #12]
 	bl	FlashReadPages
-	ldr	r3, [r4]
+	ldr	r3, [r6]
+	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L1300
-	ldrh	r2, [r6]
-	movw	r3, #61649
-	cmp	r2, r3
-	beq	.L1301
-.L1300:
-	subs	r7, r7, #1
-	sxth	r7, r7
-	b	.L1299
-.L1306:
-	ldrh	r2, [r8]
-	ldr	r1, [r4, #8]
-	ldr	r0, [r6, #4]!
-	lsls	r2, r2, #2
-	mla	r1, r5, r2, r1
-	adds	r5, r5, #1
-	bl	ftl_memcpy
-	b	.L1305
-.L1307:
-	mov	r0, #-1
-	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L1319:
+	beq	.L1269
+	ldr	r1, [r5, #4]
+	ldr	r0, [sp]
+	bl	ftl_cmp_data_ver
+	cmp	r0, #0
+	bne	.L1269
+	movs	r2, #1
+	add	r1, sp, #40
+	mov	r0, r4
+	bl	log2phys
+	b	.L1269
+.L1349:
 	.align	2
-.L1318:
-	.word	.LANCHOR106
-	.word	.LANCHOR17
-	.word	.LANCHOR108
-	.word	.LANCHOR37
-	.word	.LANCHOR164
+.L1348:
+	.word	.LANCHOR145
+	.word	.LANCHOR112
+	.word	.LANCHOR167
+	.word	.LANCHOR3
+	.word	.LANCHOR19
+	.word	.LANCHOR71
+	.word	.LANCHOR5
+	.word	.LANCHOR166
 	.word	.LC1
-	.word	.LANCHOR2
-	.word	.LANCHOR6
-	.word	.LANCHOR37+24
-	.word	.LANCHOR10
-	.word	.LANCHOR107
-	.word	.LANCHOR137
-	.size	FtlLoadBbt, .-FtlLoadBbt
-	.section	.text.FtlMakeBbt,"ax",%progbits
+	.word	.LANCHOR42
+	.word	.LANCHOR51
+	.word	.LANCHOR52
+	.word	.LANCHOR53
+.L1275:
+	mov	r1, r4
+	ldr	r0, .L1350
+	bl	printf
+	b	.L1252
+.L1256:
+	ldr	r3, .L1350+4
+	ldr	r3, [r3]
+	cmp	r3, #31
+	bhi	.L1276
+	ldr	r2, .L1350+8
+	str	r4, [r2, r3, lsl #2]
+	adds	r3, r3, #1
+	ldr	r2, .L1350+4
+	str	r3, [r2]
+.L1276:
+	ldrh	r0, [r8]
+	bl	decrement_vpc_count
+	ldr	r3, .L1350+12
+	ldr	r2, [r3]
+	adds	r1, r2, #1
+	bne	.L1277
+	ldr	r2, [sp]
+.L1342:
+	str	r2, [r3]
+	b	.L1252
+.L1277:
+	ldr	r1, [sp]
+	cmp	r1, r2
+	bcs	.L1252
+	mov	r2, r1
+	b	.L1342
+.L1255:
+	strb	r10, [r8, #6]
+	mov	r2, r10
+	strh	fp, [r8, #2]	@ movhi
+	mov	r1, fp
+	b	.L1345
+.L1351:
+	.align	2
+.L1350:
+	.word	.LC106
+	.word	.LANCHOR168
+	.word	.LANCHOR169
+	.word	.LANCHOR145
+	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
+	.section	.text.FtlWriteDump_data,"ax",%progbits
 	.align	1
-	.global	FtlMakeBbt
+	.global	FtlWriteDump_data
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlMakeBbt, %function
-FtlMakeBbt:
-	@ args = 0, pretend = 0, frame = 8
+	.type	FtlWriteDump_data, %function
+FtlWriteDump_data:
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r6, #0
-	ldr	r7, .L1339
-	bl	FtlBbtMemInit
-	sub	r8, r7, #18
-	bl	FtlLoadFactoryBbt
-.L1321:
-	ldr	r3, .L1339+4
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #24
+	ldr	r4, .L1371
+	ldrh	r2, [r4, #4]
+	cmp	r2, #0
+	beq	.L1353
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L1353
+	ldr	r3, .L1371+4
+	ldrb	r1, [r4, #7]	@ zero_extendqisi2
 	ldrh	r3, [r3]
-	cmp	r6, r3
-	bcc	.L1327
-	ldr	r5, .L1339+8
-	movs	r4, #0
-.L1328:
-	ldrh	r3, [r5]
-	uxth	r0, r4
-	adds	r4, r4, #1
-	cmp	r3, r0
-	bhi	.L1329
-	ldr	r4, .L1339+12
-	movw	r6, #65535
-	ldrh	r5, [r4, #12]
-	subs	r5, r5, #1
-	uxth	r5, r5
-.L1330:
-	ldrh	r3, [r4, #12]
-	subs	r3, r3, #47
-	cmp	r3, r5
-	bgt	.L1334
-	mov	r0, r5
-	bl	FtlBbmIsBadBlock
-	cmp	r0, #1
-	beq	.L1331
-	mov	r0, r5
-	bl	FlashTestBlk
-	cmp	r0, #0
-	beq	.L1332
-	mov	r0, r5
-	bl	FtlBbmMapBadBlock
-.L1331:
-	subs	r5, r5, #1
-	uxth	r5, r5
-	b	.L1330
-.L1327:
-	ldr	r3, .L1339+16
-	ldr	r5, .L1339+20
-	ldrh	r2, [r8, #2]!
-	ldr	r4, .L1339+24
-	ldr	r0, [r3]
-	movw	r3, #65535
-	ldr	r10, [r5]
+	muls	r3, r1, r3
 	cmp	r2, r3
-	mov	fp, r4
-	ldr	r3, .L1339+28
-	str	r0, [r4, #8]
-	str	r10, [r4, #12]
-	beq	.L1322
-	ldrh	r5, [r3]
-	mov	r0, r4
-	str	r3, [sp]
-	mla	r5, r6, r5, r2
-	lsls	r2, r5, #10
-	str	r2, [r4, #4]
-	movs	r2, #1
-	mov	r1, r2
-	bl	FlashReadPages
-	ldr	r3, [sp]
-	ldr	r1, [r4, #8]
-	ldr	r0, [r7]
-	ldrh	r2, [r3]
-	adds	r2, r2, #7
-	asrs	r2, r2, #3
-	bl	ftl_memcpy
-.L1323:
-	uxth	r0, r5
-	adds	r6, r6, #1
-	adds	r7, r7, #4
-	bl	FtlBbmMapBadBlock
-	b	.L1321
-.L1322:
-	mov	r1, r6
-	str	r3, [sp]
-	bl	FlashGetBadBlockList
-	ldr	r0, [r4, #8]
-	ldr	r1, [r7]
-	bl	FtlBbt2Bitmap
-	ldr	r3, [sp]
-	str	r5, [sp, #4]
-	ldrh	r4, [r3]
-	subs	r4, r4, #1
-	uxth	r4, r4
-.L1324:
+	beq	.L1353
+	ldrb	r7, [r4, #10]	@ zero_extendqisi2
+	cbnz	r7, .L1352
+	ldr	r3, .L1371+8
+	mov	r2, r7
+	mov	r1, sp
+	ldr	r6, [r3]
+	ldr	r3, .L1371+12
+	subs	r6, r6, #1
+	mov	r0, r6
+	ldrh	r8, [r3]
+	bl	log2phys
+	ldr	r2, .L1371+16
 	ldr	r3, [sp]
-	ldrh	r0, [r3]
-	smlabb	r0, r0, r6, r4
-	uxth	r0, r0
-	bl	FtlBbmIsBadBlock
-	cmp	r0, #1
-	beq	.L1325
-	ldr	r3, [sp, #4]
-	movs	r2, #16
-	movs	r1, #0
-	strh	r4, [r8]	@ movhi
-	ldr	r0, [r3]
-	bl	ftl_memset
-	ldr	r3, .L1339+16
-	mov	r2, #4096
-	movs	r1, #0
-	ldr	r0, [r3]
-	bl	ftl_memset
-	ldr	r2, [sp]
-	movw	r3, #61664
-	strh	r3, [r10]	@ movhi
-	movs	r3, #0
-	str	r3, [r10, #4]
-	ldrh	r5, [r2]
-	ldrh	r3, [r8]
-	ldr	r1, [r7]
-	ldr	r0, [fp, #8]
-	strh	r3, [r10, #2]	@ movhi
-	mla	r5, r6, r5, r3
-	lsls	r3, r5, #10
-	str	r3, [fp, #4]
-	ldr	r3, .L1339+32
-	ldrh	r2, [r3]
-	lsls	r2, r2, #2
-	bl	ftl_memcpy
-	movs	r2, #1
-	ldr	r0, .L1339+24
-	mov	r1, r2
-	bl	FlashEraseBlocks
-	movs	r3, #1
-	ldr	r0, .L1339+24
-	mov	r2, r3
-	mov	r1, r3
-	bl	FlashProgPages
-	ldr	r3, [fp]
+	str	r6, [sp, #20]
+	ldr	r0, [r2]
+	ldr	r2, .L1371+20
+	str	r3, [sp, #8]
 	adds	r3, r3, #1
-	bne	.L1323
-	uxth	r0, r5
-	bl	FtlBbmMapBadBlock
-	b	.L1324
-.L1325:
-	subs	r4, r4, #1
-	uxth	r4, r4
-	b	.L1324
-.L1329:
-	bl	FtlBbmMapBadBlock
-	b	.L1328
-.L1332:
+	str	r0, [sp, #12]
+	ldr	r5, [r2]
+	str	r5, [sp, #16]
+	str	r7, [r5, #4]
+	beq	.L1355
+	mov	r2, r7
+	movs	r1, #1
+	add	r0, sp, #4
+	bl	FlashReadPages
+.L1356:
+	ldr	fp, .L1371
+	lsl	r8, r8, #2
+	ldr	r10, .L1371+28
+	movs	r7, #0
+	movw	r3, #61589
+	strh	r3, [r5]	@ movhi
+.L1357:
+	cmp	r8, r7
+	bne	.L1361
+.L1358:
+	movs	r3, #1
+.L1370:
+	strb	r3, [r4, #10]
+.L1352:
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1355:
+	ldr	r3, .L1371+24
+	movs	r1, #255
+	ldrh	r2, [r3]
+	bl	ftl_memset
+	b	.L1356
+.L1361:
+	ldrh	r3, [r4, #4]
+	cmp	r3, #0
+	beq	.L1358
+	ldr	r3, [sp, #8]
+	mov	r0, fp
+	str	r6, [r5, #8]
+	adds	r7, r7, #1
+	str	r3, [r5, #12]
 	ldrh	r3, [r4]
-	cmp	r3, r6
-	bne	.L1333
-	strh	r5, [r4]	@ movhi
-	b	.L1331
-.L1333:
-	strh	r5, [r4, #4]	@ movhi
-.L1334:
-	ldr	r3, .L1339+36
-	movs	r5, #0
-	str	r5, [r4, #8]
+	strh	r3, [r5, #2]	@ movhi
+	bl	get_new_active_ppa
+	ldr	r3, [r10]
 	movs	r1, #1
-	movs	r2, #2
-	strh	r5, [r4, #2]	@ movhi
-	ldr	r0, [r3]
-	ldrh	r3, [r4]
-	lsls	r3, r3, #10
-	str	r3, [r0, #4]
-	ldrh	r3, [r4, #4]
-	lsls	r3, r3, #10
-	str	r3, [r0, #24]
-	bl	FlashEraseBlocks
+	str	r0, [sp, #8]
+	add	r0, sp, #4
+	str	r3, [r5, #4]
+	adds	r3, r3, #1
+	adds	r2, r3, #1
+	it	eq
+	moveq	r3, #0
+	str	r3, [r10]
+	movs	r3, #0
+	mov	r2, r3
+	bl	FlashProgPages
 	ldrh	r0, [r4]
-	bl	FtlBbmMapBadBlock
+	bl	decrement_vpc_count
+	b	.L1357
+.L1353:
+	movs	r3, #0
+	b	.L1370
+.L1372:
+	.align	2
+.L1371:
+	.word	.LANCHOR51
+	.word	.LANCHOR19
+	.word	.LANCHOR61
+	.word	.LANCHOR3
+	.word	.LANCHOR115
+	.word	.LANCHOR123
+	.word	.LANCHOR23
+	.word	.LANCHOR71
+	.size	FtlWriteDump_data, .-FtlWriteDump_data
+	.section	.text.l2p_flush,"ax",%progbits
+	.align	1
+	.global	l2p_flush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	l2p_flush, %function
+l2p_flush:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	movs	r4, #0
+	ldr	r5, .L1377
+	ldr	r6, .L1377+4
+	bl	FtlWriteDump_data
+.L1374:
+	ldrh	r3, [r5]
+	uxth	r0, r4
+	cmp	r3, r0
+	bhi	.L1376
+	movs	r0, #0
+	pop	{r4, r5, r6, pc}
+.L1376:
+	ldr	r2, [r6]
+	uxth	r3, r4
+	movs	r1, #12
+	mla	r3, r1, r3, r2
+	ldr	r3, [r3, #4]
+	cmp	r3, #0
+	bge	.L1375
+	bl	flush_l2p_region
+.L1375:
+	adds	r4, r4, #1
+	b	.L1374
+.L1378:
+	.align	2
+.L1377:
+	.word	.LANCHOR33
+	.word	.LANCHOR55
+	.size	l2p_flush, .-l2p_flush
+	.section	.text.FtlSuperblockPowerLostFix,"ax",%progbits
+	.align	1
+	.global	FtlSuperblockPowerLostFix
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlSuperblockPowerLostFix, %function
+FtlSuperblockPowerLostFix:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r3, #-1
+	sub	sp, sp, #24
+	ldr	r2, .L1392
+	movs	r6, #0
+	mov	r4, r0
+	str	r3, [sp, #20]
+	ldr	r3, .L1392+4
+	ldr	r5, [r2]
+	mvn	r2, #2
+	ldr	r8, .L1392+16
+	ldr	r3, [r3]
+	str	r5, [sp, #16]
+	str	r3, [sp, #12]
+	str	r2, [r5, #8]
+	mvn	r2, #1
+	str	r2, [r5, #12]
+	ldrh	r2, [r0]
+	strh	r6, [r5]	@ movhi
+	strh	r2, [r5, #2]	@ movhi
+	movw	r2, #61589
+	str	r2, [r3]
+	add	r2, r2, #304087040
+	add	r2, r2, #1269760
+	addw	r2, r2, #1507
+	str	r2, [r3, #4]
+	ldrh	r3, [r0, #4]
+	tst	r3, #1
+	ite	eq
+	moveq	r7, #6
+	movne	r7, #7
+.L1385:
+	ldrh	r3, [r4, #4]
+	cbnz	r3, .L1381
+.L1382:
+	ldr	r3, .L1392+8
+	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
-	bl	FtlBbmMapBadBlock
-	bl	FtlBbmTblFlush
-	ldr	r3, [r4, #8]
-	ldrh	r2, [r4, #4]
-	strh	r5, [r4, #2]	@ movhi
-	adds	r3, r3, #1
-	str	r3, [r4, #8]
-	ldrh	r3, [r4]
-	strh	r2, [r4]	@ movhi
+	ldr	r2, [r3]
+	ldrh	r3, [r2, r1, lsl #1]
+	subs	r3, r3, r0
+	strh	r3, [r2, r1, lsl #1]	@ movhi
+	ldr	r3, .L1392+12
+	ldrh	r3, [r3]
+	strh	r3, [r4, #2]	@ movhi
+	movs	r3, #0
+	strb	r3, [r4, #6]
 	strh	r3, [r4, #4]	@ movhi
-	bl	FtlBbmTblFlush
-	mov	r0, r5
-	add	sp, sp, #8
+	add	sp, sp, #24
 	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1340:
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1381:
+	mov	r0, r4
+	bl	get_new_active_ppa
+	str	r0, [sp, #8]
+	adds	r0, r0, #1
+	beq	.L1382
+	ldr	r3, [r8]
+	movs	r1, #1
+	add	r0, sp, #4
+	str	r3, [r5, #4]
+	adds	r3, r3, #1
+	adds	r2, r3, #1
+	it	eq
+	moveq	r3, r6
+	str	r3, [r8]
+	movs	r3, #0
+	mov	r2, r3
+	bl	FlashProgPages
+	ldrh	r0, [r4]
+	bl	decrement_vpc_count
+	subs	r7, r7, #1
+	bne	.L1385
+	b	.L1382
+.L1393:
 	.align	2
-.L1339:
-	.word	.LANCHOR37+28
-	.word	.LANCHOR10
-	.word	.LANCHOR25
-	.word	.LANCHOR37
-	.word	.LANCHOR107
-	.word	.LANCHOR108
-	.word	.LANCHOR106
-	.word	.LANCHOR17
-	.word	.LANCHOR137
-	.word	.LANCHOR111
-	.size	FtlMakeBbt, .-FtlMakeBbt
+.L1392:
+	.word	.LANCHOR123
+	.word	.LANCHOR115
+	.word	.LANCHOR42
+	.word	.LANCHOR19
+	.word	.LANCHOR71
+	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
 	.section	.text.FtlVendorPartWrite,"ax",%progbits
 	.align	1
 	.global	FtlVendorPartWrite
@@ -9871,7 +10274,7 @@ FtlMakeBbt:
 FtlVendorPartWrite:
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1353
+	ldr	r3, .L1406
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #104
 	str	r2, [sp]
@@ -9880,26 +10283,26 @@ FtlVendorPartWrite:
 	mov	r5, r1
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1349
-	ldr	r3, .L1353+4
+	bhi	.L1402
+	ldr	r3, .L1406+4
 	mov	r8, #0
 	ldrh	r6, [r3]
 	lsr	r6, r0, r6
 	lsl	fp, r6, #2
-.L1343:
-	cbnz	r5, .L1348
-.L1341:
+.L1396:
+	cbnz	r5, .L1401
+.L1394:
 	mov	r0, r8
 	add	sp, sp, #104
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1348:
-	ldr	r3, .L1353+8
+.L1401:
+	ldr	r3, .L1406+8
 	mov	r0, r7
-	ldr	r10, .L1353+24
+	ldr	r10, .L1406+24
 	ldr	r3, [r3]
 	ldr	r2, [r3, fp]
-	ldr	r3, .L1353+12
+	ldr	r3, .L1406+12
 	str	r2, [sp, #12]
 	ldrh	r3, [r3]
 	mov	r1, r3
@@ -9913,9 +10316,9 @@ FtlVendorPartWrite:
 	cmp	r5, r4
 	it	cc
 	uxthcc	r4, r5
-	cbz	r2, .L1345
+	cbz	r2, .L1398
 	cmp	r4, r3
-	beq	.L1345
+	beq	.L1398
 	ldr	r3, [r10]
 	add	r0, sp, #20
 	str	r2, [sp, #24]
@@ -9925,7 +10328,7 @@ FtlVendorPartWrite:
 	add	r3, sp, #40
 	str	r3, [sp, #32]
 	bl	FlashReadPages
-.L1346:
+.L1399:
 	lsls	r3, r4, #9
 	ldr	r0, [r10]
 	subs	r5, r5, r4
@@ -9938,7 +10341,7 @@ FtlVendorPartWrite:
 	bl	ftl_memcpy
 	ldr	r2, [r10]
 	mov	r1, r6
-	ldr	r0, .L1353+16
+	ldr	r0, .L1406+16
 	adds	r6, r6, #1
 	bl	FtlMapWritePage
 	ldr	r3, [sp]
@@ -9949,27 +10352,27 @@ FtlVendorPartWrite:
 	ldr	r3, [sp, #8]
 	add	r2, r2, r3
 	str	r2, [sp]
-	b	.L1343
-.L1345:
-	ldr	r3, .L1353+20
+	b	.L1396
+.L1398:
+	ldr	r3, .L1406+20
 	movs	r1, #0
 	ldr	r0, [r10]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-	b	.L1346
-.L1349:
+	b	.L1399
+.L1402:
 	mov	r8, #-1
-	b	.L1341
-.L1354:
+	b	.L1394
+.L1407:
 	.align	2
-.L1353:
+.L1406:
 	.word	.LANCHOR16
 	.word	.LANCHOR22
 	.word	.LANCHOR133
 	.word	.LANCHOR12
-	.word	.LANCHOR149
+	.word	.LANCHOR158
 	.word	.LANCHOR23
-	.word	.LANCHOR124
+	.word	.LANCHOR117
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.section	.text.Ftl_save_ext_data,"ax",%progbits
 	.align	1
@@ -9983,60 +10386,60 @@ Ftl_save_ext_data:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L1357
-	ldr	r3, .L1357+4
+	ldr	r2, .L1410
+	ldr	r3, .L1410+4
 	ldr	r1, [r2]
 	cmp	r1, r3
-	bne	.L1355
-	ldr	r3, .L1357+8
+	bne	.L1408
+	ldr	r3, .L1410+8
 	movs	r1, #1
 	movs	r0, #0
 	str	r3, [r2, #4]
-	ldr	r3, .L1357+12
+	ldr	r3, .L1410+12
 	ldr	r3, [r3]
 	str	r3, [r2, #88]
-	ldr	r3, .L1357+16
+	ldr	r3, .L1410+16
 	ldr	r3, [r3]
 	str	r3, [r2, #92]
-	ldr	r3, .L1357+20
+	ldr	r3, .L1410+20
 	ldr	r3, [r3]
 	str	r3, [r2, #8]
-	ldr	r3, .L1357+24
+	ldr	r3, .L1410+24
 	ldr	r3, [r3]
 	str	r3, [r2, #12]
-	ldr	r3, .L1357+28
+	ldr	r3, .L1410+28
 	ldr	r3, [r3]
 	str	r3, [r2, #16]
-	ldr	r3, .L1357+32
+	ldr	r3, .L1410+32
 	ldr	r3, [r3]
 	str	r3, [r2, #20]
-	ldr	r3, .L1357+36
+	ldr	r3, .L1410+36
 	ldr	r3, [r3]
 	str	r3, [r2, #28]
-	ldr	r3, .L1357+40
+	ldr	r3, .L1410+40
 	ldr	r3, [r3]
 	str	r3, [r2, #32]
-	ldr	r3, .L1357+44
+	ldr	r3, .L1410+44
 	ldr	r3, [r3]
 	str	r3, [r2, #36]
-	ldr	r3, .L1357+48
+	ldr	r3, .L1410+48
 	ldr	r3, [r3]
 	str	r3, [r2, #40]
-	ldr	r3, .L1357+52
+	ldr	r3, .L1410+52
 	ldr	r3, [r3]
 	str	r3, [r2, #44]
-	ldr	r3, .L1357+56
+	ldr	r3, .L1410+56
 	ldr	r3, [r3]
 	str	r3, [r2, #48]
 	b	FtlVendorPartWrite
-.L1355:
+.L1408:
 	bx	lr
-.L1358:
+.L1411:
 	.align	2
-.L1357:
+.L1410:
 	.word	.LANCHOR81
 	.word	1179929683
-	.word	1342177348
+	.word	1342177352
 	.word	.LANCHOR68
 	.word	.LANCHOR69
 	.word	.LANCHOR67
@@ -10061,7 +10464,7 @@ Ftl_save_ext_data:
 FtlEctTblFlush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L1364
+	ldr	r2, .L1417
 	push	{r3, lr}
 	ldrh	r3, [r2]
 	cmp	r3, #31
@@ -10070,22 +10473,22 @@ FtlEctTblFlush:
 	movhi	r3, #32
 	strhls	r3, [r2]	@ movhi
 	movls	r3, #1
-	ldr	r2, .L1364+4
-	cbnz	r0, .L1361
+	ldr	r2, .L1417+4
+	cbnz	r0, .L1414
 	ldr	r1, [r2]
 	ldr	r0, [r1, #20]
 	ldr	r1, [r1, #16]
 	add	r3, r3, r0
 	cmp	r1, r3
-	bcc	.L1362
-.L1361:
+	bcc	.L1415
+.L1414:
 	ldr	r2, [r2]
 	movs	r0, #64
 	ldr	r3, [r2, #16]
 	str	r3, [r2, #20]
-	ldr	r3, .L1364+8
+	ldr	r3, .L1417+8
 	str	r3, [r2]
-	ldr	r3, .L1364+12
+	ldr	r3, .L1417+12
 	ldrh	r1, [r3]
 	lsls	r3, r1, #9
 	str	r3, [r2, #12]
@@ -10096,13 +10499,13 @@ FtlEctTblFlush:
 	str	r3, [r2, #4]
 	bl	FtlVendorPartWrite
 	bl	Ftl_save_ext_data
-.L1362:
+.L1415:
 	movs	r0, #0
 	pop	{r3, pc}
-.L1365:
+.L1418:
 	.align	2
-.L1364:
-	.word	.LANCHOR165
+.L1417:
+	.word	.LANCHOR170
 	.word	.LANCHOR127
 	.word	1112818501
 	.word	.LANCHOR125
@@ -10133,94 +10536,116 @@ sftl_vendor_write:
 FtlVendorPartRead:
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1376
+	ldr	r3, .L1430
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r8, r2
+	mov	r10, r2
 	adds	r2, r0, r1
 	sub	sp, sp, #104
-	mov	r6, r0
-	mov	r5, r1
+	mov	r7, r0
+	mov	r6, r1
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1375
-	ldr	r3, .L1376+4
-	movs	r7, #0
-	ldr	fp, .L1376+16
-	ldrh	r3, [r3]
-	lsr	r3, r0, r3
-	lsls	r3, r3, #2
-	str	r3, [sp, #4]
-.L1369:
-	cbnz	r5, .L1374
-.L1367:
-	mov	r0, r7
+	bhi	.L1429
+	ldr	r3, .L1430+4
+	mov	r8, #0
+	ldr	fp, .L1430+28
+	ldrh	r5, [r3]
+	lsr	r5, r0, r5
+	lsls	r3, r5, #2
+	str	r3, [sp]
+.L1422:
+	cbnz	r6, .L1428
+.L1420:
+	mov	r0, r8
 	add	sp, sp, #104
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1374:
-	ldr	r3, .L1376+8
-	mov	r0, r6
-	ldr	r2, [sp, #4]
+.L1428:
+	ldr	r3, .L1430+8
+	mov	r0, r7
+	ldr	r2, [sp]
 	ldr	r3, [r3]
 	ldr	r3, [r3, r2]
-	ldr	r2, .L1376+12
-	str	r3, [sp, #12]
+	ldr	r2, .L1430+12
+	str	r3, [sp, #8]
 	ldrh	r4, [r2]
 	mov	r1, r4
 	bl	__aeabi_uidivmod
 	subs	r4, r4, r1
-	ldr	r3, [sp, #12]
+	ldr	r3, [sp, #8]
 	uxth	r4, r4
-	str	r1, [sp, #8]
-	cmp	r5, r4
+	str	r1, [sp, #4]
+	cmp	r6, r4
 	it	cc
-	uxthcc	r4, r5
-	lsl	r10, r4, #9
-	cbz	r3, .L1371
+	uxthcc	r4, r6
+	lsls	r2, r4, #9
+	str	r2, [sp, #8]
+	cmp	r3, #0
+	beq	.L1424
+	ldr	r2, [fp]
+	add	r0, sp, #20
 	str	r3, [sp, #24]
+	str	r3, [sp, #12]
+	str	r2, [sp, #28]
+	add	r2, sp, #40
+	str	r2, [sp, #32]
 	movs	r2, #1
-	ldr	r3, [fp]
 	mov	r1, r2
-	add	r0, sp, #20
-	str	r3, [sp, #28]
-	add	r3, sp, #40
-	str	r3, [sp, #32]
 	bl	FlashReadPages
-	ldr	r3, [sp, #20]
-	mov	r2, r10
-	ldr	r1, [fp]
-	mov	r0, r8
-	adds	r3, r3, #1
-	ldr	r3, [sp, #8]
+	ldr	r2, [sp, #20]
+	ldr	r3, [sp, #12]
+	adds	r2, r2, #1
+	ldr	r2, .L1430+16
 	it	eq
-	moveq	r7, #-1
+	moveq	r8, #-1
+	ldr	r2, [r2]
+	cmp	r2, #256
+	bne	.L1426
+	mov	r2, r3
+	mov	r1, r5
+	ldr	r0, .L1430+20
+	bl	printf
+	ldr	r2, [fp]
+	mov	r1, r5
+	ldr	r0, .L1430+24
+	bl	FtlMapWritePage
+.L1426:
+	ldr	r1, [fp]
+	lsls	r2, r4, #9
+	ldr	r3, [sp, #4]
+	mov	r0, r10
 	add	r1, r1, r3, lsl #9
 	bl	ftl_memcpy
-.L1373:
-	ldr	r3, [sp, #4]
-	subs	r5, r5, r4
-	add	r6, r6, r4
-	add	r8, r8, r10
+.L1427:
+	ldr	r3, [sp, #8]
+	adds	r5, r5, #1
+	subs	r6, r6, r4
+	add	r7, r7, r4
+	add	r10, r10, r3
+	ldr	r3, [sp]
 	adds	r3, r3, #4
-	str	r3, [sp, #4]
-	b	.L1369
-.L1371:
-	mov	r2, r10
+	str	r3, [sp]
+	b	.L1422
+.L1424:
+	lsls	r2, r4, #9
 	mov	r1, r3
-	mov	r0, r8
+	mov	r0, r10
 	bl	ftl_memset
-	b	.L1373
-.L1375:
-	mov	r7, #-1
-	b	.L1367
-.L1377:
+	b	.L1427
+.L1429:
+	mov	r8, #-1
+	b	.L1420
+.L1431:
 	.align	2
-.L1376:
+.L1430:
 	.word	.LANCHOR16
 	.word	.LANCHOR22
 	.word	.LANCHOR133
 	.word	.LANCHOR12
-	.word	.LANCHOR124
+	.word	.LANCHOR148
+	.word	.LC107
+	.word	.LANCHOR158
+	.word	.LANCHOR117
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
 	.section	.text.FtlLoadEctTbl,"ax",%progbits
 	.align	1
@@ -10235,34 +10660,34 @@ FtlLoadEctTbl:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r0, #64
-	ldr	r4, .L1380
-	ldr	r5, .L1380+4
+	ldr	r4, .L1434
+	ldr	r5, .L1434+4
 	ldr	r2, [r4]
 	ldrh	r1, [r5]
 	bl	FtlVendorPartRead
 	ldr	r3, [r4]
 	ldr	r2, [r3]
-	ldr	r3, .L1380+8
+	ldr	r3, .L1434+8
 	cmp	r2, r3
-	beq	.L1379
-	ldr	r1, .L1380+12
-	ldr	r0, .L1380+16
+	beq	.L1433
+	ldr	r1, .L1434+12
+	ldr	r0, .L1434+16
 	bl	printf
 	ldrh	r2, [r5]
 	movs	r1, #0
 	ldr	r0, [r4]
 	lsls	r2, r2, #9
 	bl	ftl_memset
-.L1379:
+.L1433:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L1381:
+.L1435:
 	.align	2
-.L1380:
+.L1434:
 	.word	.LANCHOR127
 	.word	.LANCHOR125
 	.word	1112818501
-	.word	.LC103
+	.word	.LC108
 	.word	.LC71
 	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
 	.section	.text.Ftl_load_ext_data,"ax",%progbits
@@ -10278,75 +10703,75 @@ Ftl_load_ext_data:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r1, #1
-	ldr	r4, .L1385
+	ldr	r4, .L1439
 	movs	r0, #0
-	ldr	r5, .L1385+4
+	ldr	r5, .L1439+4
 	mov	r2, r4
 	bl	FtlVendorPartRead
 	ldr	r3, [r4]
 	cmp	r3, r5
-	beq	.L1383
+	beq	.L1437
 	mov	r2, #512
 	movs	r1, #0
 	mov	r0, r4
 	bl	ftl_memset
 	str	r5, [r4]
-.L1383:
+.L1437:
 	ldr	r3, [r4]
 	cmp	r3, r5
-	ldr	r3, .L1385+8
-	bne	.L1384
+	ldr	r3, .L1439+8
+	bne	.L1438
 	ldr	r1, [r4, #88]
-	ldr	r2, .L1385+12
+	ldr	r2, .L1439+12
 	str	r1, [r2]
 	ldr	r1, [r4, #92]
-	ldr	r2, .L1385+16
+	ldr	r2, .L1439+16
 	str	r1, [r2]
 	ldr	r1, [r4, #8]
-	ldr	r2, .L1385+20
+	ldr	r2, .L1439+20
 	str	r1, [r2]
 	ldr	r1, [r4, #12]
-	ldr	r2, .L1385+24
+	ldr	r2, .L1439+24
 	str	r1, [r2]
 	ldr	r1, [r4, #16]
-	ldr	r2, .L1385+28
+	ldr	r2, .L1439+28
 	str	r1, [r2]
 	ldr	r1, [r4, #20]
-	ldr	r2, .L1385+32
+	ldr	r2, .L1439+32
 	str	r1, [r2]
 	ldr	r2, [r4, #28]
 	ldr	r1, [r4, #32]
 	str	r2, [r3]
-	ldr	r2, .L1385+36
+	ldr	r2, .L1439+36
 	str	r1, [r2]
 	ldr	r1, [r4, #36]
-	ldr	r2, .L1385+40
+	ldr	r2, .L1439+40
 	str	r1, [r2]
 	ldr	r1, [r4, #40]
-	ldr	r2, .L1385+44
+	ldr	r2, .L1439+44
 	str	r1, [r2]
 	ldr	r1, [r4, #44]
-	ldr	r2, .L1385+48
+	ldr	r2, .L1439+48
 	str	r1, [r2]
 	ldr	r1, [r4, #48]
-	ldr	r2, .L1385+52
+	ldr	r2, .L1439+52
 	str	r1, [r2]
-.L1384:
-	ldr	r1, .L1385+56
-	ldr	r2, .L1385+60
+.L1438:
+	ldr	r1, .L1439+56
+	ldr	r2, .L1439+60
 	ldr	r3, [r3]
 	ldr	r0, [r1]
 	ldrh	r2, [r2]
-	ldr	r1, .L1385+64
+	ldr	r1, .L1439+64
 	mla	r0, r0, r2, r3
 	ldrh	r1, [r1]
 	bl	__aeabi_uidiv
-	ldr	r3, .L1385+68
+	ldr	r3, .L1439+68
 	str	r0, [r3]
 	pop	{r3, r4, r5, pc}
-.L1386:
+.L1440:
 	.align	2
-.L1385:
+.L1439:
 	.word	.LANCHOR81
 	.word	1179929683
 	.word	.LANCHOR73
@@ -10393,213 +10818,207 @@ FtlVpcTblFlush:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r6, #0
-	ldr	r3, .L1400
-	movw	fp, #65535
-	ldr	r8, .L1400+80
-	ldr	r10, .L1400+84
-	ldrh	r2, [r3]
-	ldr	r0, [r8]
+	mov	fp, #0
+	ldr	r3, .L1457
+	ldr	r4, .L1457+4
+	ldr	r10, .L1457+76
+	ldr	r0, [r3]
+	ldr	r5, .L1457+8
 	ldr	r7, [r10]
-	ldr	r5, .L1400+4
-	ldr	r4, .L1400+8
-	ldr	r1, .L1400+12
+	ldrh	r2, [r4]
 	str	r0, [r5, #8]
 	str	r7, [r5, #12]
 	strh	r2, [r7, #2]	@ movhi
 	movw	r2, #61604
 	strh	r2, [r7]	@ movhi
-	ldr	r2, [r3, #8]
-	str	r6, [r7, #8]
-	str	r6, [r7, #12]
+	ldr	r2, [r4, #8]
+	ldr	r6, .L1457+12
+	ldr	ip, .L1457+80
 	str	r2, [r7, #4]
-	ldr	r2, .L1400+16
+	ldr	r2, .L1457+16
+	str	fp, [r7, #8]
+	str	fp, [r7, #12]
+	stm	r6, {r2, ip}
+	ldrh	r2, [r4, #6]
 	str	r3, [sp, #4]
-	stm	r4, {r1, r2}
-	ldrh	r2, [r3, #6]
-	strh	r2, [r4, #8]	@ movhi
-	ldr	r2, .L1400+20
+	ldr	r8, .L1457+84
+	strh	r2, [r6, #8]	@ movhi
+	ldr	r2, .L1457+20
 	ldrh	r2, [r2]
-	strb	r2, [r4, #10]
-	ldr	r2, .L1400+24
+	strb	r2, [r6, #10]
+	ldr	r2, .L1457+24
 	ldrh	r1, [r2]
 	ldrh	ip, [r2, #2]
-	strh	r1, [r4, #14]	@ movhi
+	strh	r1, [r6, #14]	@ movhi
 	ldrb	r1, [r2, #6]	@ zero_extendqisi2
 	ldrb	r2, [r2, #8]	@ zero_extendqisi2
-	strb	r2, [r4, #11]
+	strb	r2, [r6, #11]
 	orr	r1, r1, ip, lsl #6
-	ldr	r2, .L1400+28
-	strh	r1, [r4, #16]	@ movhi
+	ldr	r2, .L1457+28
+	strh	r1, [r6, #16]	@ movhi
 	ldrh	r1, [r2]
 	ldrh	ip, [r2, #2]
-	strh	r1, [r4, #18]	@ movhi
+	strh	r1, [r6, #18]	@ movhi
 	ldrb	r1, [r2, #6]	@ zero_extendqisi2
 	ldrb	r2, [r2, #8]	@ zero_extendqisi2
 	orr	r1, r1, ip, lsl #6
-	strh	r1, [r4, #20]	@ movhi
-	strb	r2, [r4, #12]
-	ldr	r2, .L1400+32
+	strh	r1, [r6, #20]	@ movhi
+	strb	r2, [r6, #12]
+	ldr	r2, .L1457+32
 	ldrh	r1, [r2]
 	ldrh	ip, [r2, #2]
-	strh	r1, [r4, #22]	@ movhi
+	strh	r1, [r6, #22]	@ movhi
 	ldrb	r1, [r2, #6]	@ zero_extendqisi2
 	ldrb	r2, [r2, #8]	@ zero_extendqisi2
-	strb	r2, [r4, #13]
+	strb	r2, [r6, #13]
 	orr	r1, r1, ip, lsl #6
-	ldr	r2, .L1400+36
-	strh	r1, [r4, #24]	@ movhi
+	ldr	r2, .L1457+36
+	strh	r1, [r6, #24]	@ movhi
 	movs	r1, #255
 	ldr	r2, [r2]
-	str	r2, [r4, #32]
-	ldr	r2, .L1400+40
-	ldr	r2, [r2]
-	str	r2, [r4, #40]
-	ldr	r2, .L1400+44
+	str	r2, [r6, #32]
+	ldr	r2, [r8]
+	str	r2, [r6, #40]
+	ldr	r2, .L1457+40
 	ldr	r2, [r2]
-	str	r2, [r4, #36]
-	ldr	r2, .L1400+48
+	str	r2, [r6, #36]
+	ldr	r2, .L1457+44
 	ldrh	r2, [r2]
 	bl	ftl_memset
-	mov	r1, r4
-	ldr	r4, .L1400+52
+	mov	r1, r6
+	ldr	r6, .L1457+48
 	movs	r2, #48
 	ldr	r0, [r5, #8]
 	bl	ftl_memcpy
-	ldrh	r2, [r4]
+	ldrh	r2, [r6]
 	ldr	r0, [r5, #8]
-	ldr	r1, .L1400+56
+	ldr	r1, .L1457+52
 	lsls	r2, r2, #1
 	adds	r0, r0, #48
 	ldr	r1, [r1]
 	bl	ftl_memcpy
-	ldrh	r0, [r4]
-	ldr	r1, .L1400+60
-	ldr	r4, [r5, #8]
+	ldrh	r0, [r6]
+	ldr	r1, .L1457+56
+	ldr	r6, [r5, #8]
 	lsrs	r2, r0, #3
 	adds	r0, r0, #24
 	lsls	r0, r0, #1
 	ldr	r1, [r1]
 	adds	r2, r2, #4
 	bic	r0, r0, #3
-	add	r0, r0, r4
+	add	r0, r0, r6
+	mov	r6, fp
 	bl	ftl_memcpy
-	mov	r0, r6
+	mov	r0, fp
+	movw	fp, #65535
 	bl	FtlUpdateVaildLpn
+.L1443:
 	ldr	r3, [sp, #4]
-	mov	r4, r3
-.L1389:
-	ldr	r3, [r8]
+	ldrh	r1, [r4, #2]
 	ldrh	r2, [r4]
-	ldr	r0, .L1400+4
+	ldr	r3, [r3]
 	str	r3, [r5, #8]
 	ldr	r3, [r10]
 	str	r3, [r5, #12]
-	ldrh	r3, [r4, #2]
-	orr	r3, r3, r2, lsl #10
+	orr	r3, r1, r2, lsl #10
 	str	r3, [r5, #4]
-	movs	r3, #1
-	mov	r2, r3
-	mov	r1, r3
-	bl	FlashProgPages
-	ldr	r3, .L1400+64
-	ldrh	r2, [r4, #2]
+	ldr	r3, .L1457+60
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
-	cmp	r2, r3
-	blt	.L1390
-	ldrh	r3, [r4]
-	ldrh	fp, [r4, #4]
-	strh	r3, [r4, #4]	@ movhi
+	cmp	r1, r3
+	blt	.L1444
 	movs	r3, #0
+	ldrh	fp, [r4, #4]
 	strh	r3, [r4, #2]	@ movhi
+	strh	r2, [r4, #4]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r2, .L1400+40
+	ldr	r3, [r8]
 	strh	r0, [r4]	@ movhi
-	ldr	r3, [r2]
-	adds	r1, r3, #1
+	adds	r2, r3, #1
 	str	r3, [r4, #8]
-	str	r1, [r2]
+	str	r2, [r8]
 	lsls	r2, r0, #10
 	str	r2, [r5, #4]
 	str	r3, [r7, #4]
-	movs	r3, #1
 	strh	r0, [r7, #2]	@ movhi
+.L1444:
+	movs	r3, #1
+	ldr	r0, .L1457+8
 	mov	r2, r3
 	mov	r1, r3
-	ldr	r0, .L1400+4
 	bl	FlashProgPages
-.L1390:
 	ldrh	r3, [r4, #2]
 	ldr	r2, [r5]
 	adds	r3, r3, #1
 	uxth	r3, r3
-	adds	r2, r2, #1
+	adds	r1, r2, #1
 	strh	r3, [r4, #2]	@ movhi
-	bne	.L1391
+	bne	.L1445
 	cmp	r3, #1
-	bne	.L1392
-	movw	r2, #1124
-	ldr	r1, .L1400+68
-	ldr	r0, .L1400+72
+	bne	.L1446
+	movw	r2, #1135
+	ldr	r1, .L1457+64
+	ldr	r0, .L1457+68
 	bl	printf
-.L1392:
+.L1446:
 	ldrh	r3, [r4, #2]
 	adds	r6, r6, #1
 	uxth	r6, r6
 	cmp	r3, #1
 	itttt	eq
-	ldreq	r3, .L1400+64
+	ldreq	r3, .L1457+60
 	ldrheq	r3, [r3]
 	addeq	r3, r3, #-1
 	strheq	r3, [r4, #2]	@ movhi
 	cmp	r6, #3
-	bls	.L1389
+	bls	.L1443
 	mov	r2, r6
 	ldr	r1, [r5, #4]
-	ldr	r0, .L1400+76
+	ldr	r0, .L1457+72
 	bl	printf
-.L1395:
-	b	.L1395
-.L1391:
+.L1449:
+	b	.L1449
+.L1445:
 	cmp	r3, #1
-	beq	.L1389
+	beq	.L1443
+	cmp	r2, #256
+	beq	.L1443
 	movw	r3, #65535
 	cmp	fp, r3
-	beq	.L1396
+	beq	.L1450
 	movs	r1, #1
 	mov	r0, fp
 	bl	FtlFreeSysBlkQueueIn
-.L1396:
+.L1450:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1401:
+.L1458:
 	.align	2
-.L1400:
+.L1457:
+	.word	.LANCHOR115
 	.word	.LANCHOR79
-	.word	.LANCHOR106
+	.word	.LANCHOR148
 	.word	.LANCHOR39
 	.word	1179929683
-	.word	1342177348
 	.word	.LANCHOR10
 	.word	.LANCHOR51
 	.word	.LANCHOR52
 	.word	.LANCHOR53
 	.word	.LANCHOR72
-	.word	.LANCHOR70
 	.word	.LANCHOR71
 	.word	.LANCHOR23
 	.word	.LANCHOR5
 	.word	.LANCHOR42
 	.word	.LANCHOR1
 	.word	.LANCHOR20
-	.word	.LANCHOR166
+	.word	.LANCHOR171
 	.word	.LC1
-	.word	.LC104
-	.word	.LANCHOR107
-	.word	.LANCHOR108
+	.word	.LC109
+	.word	.LANCHOR123
+	.word	1342177352
+	.word	.LANCHOR70
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
 	.section	.text.FtlSysFlush,"ax",%progbits
 	.align	1
@@ -10632,17 +11051,17 @@ sftl_deinit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L1405
+	ldr	r3, .L1462
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L1404
+	bne	.L1461
 	bl	FtlSysFlush
-.L1404:
+.L1461:
 	movs	r0, #0
 	pop	{r3, pc}
-.L1406:
+.L1463:
 	.align	2
-.L1405:
+.L1462:
 	.word	.LANCHOR86
 	.size	sftl_deinit, .-sftl_deinit
 	.section	.text.FtlDiscard,"ax",%progbits
@@ -10656,24 +11075,24 @@ sftl_deinit:
 FtlDiscard:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1422
+	ldr	r3, .L1479
 	adds	r2, r0, r1
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r7, r0
 	mov	r5, r1
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1415
+	bhi	.L1472
 	cmp	r1, #31
-	bhi	.L1409
-.L1414:
+	bhi	.L1466
+.L1471:
 	movs	r0, #0
-.L1407:
+.L1464:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1409:
-	ldr	r8, .L1422+12
+.L1466:
+	ldr	r8, .L1479+12
 	ldrh	r4, [r8]
 	mov	r1, r4
 	bl	__aeabi_uidiv
@@ -10681,7 +11100,7 @@ FtlDiscard:
 	mov	r6, r0
 	subs	r7, r7, r3
 	uxth	r7, r7
-	cbz	r7, .L1410
+	cbz	r7, .L1467
 	subs	r4, r4, r7
 	adds	r6, r6, #1
 	cmp	r4, r5
@@ -10689,32 +11108,32 @@ FtlDiscard:
 	movcs	r4, r5
 	uxth	r4, r4
 	subs	r5, r5, r4
-.L1410:
-	ldr	r4, .L1422+4
+.L1467:
+	ldr	r4, .L1479+4
 	mov	r3, #-1
-	ldr	r7, .L1422+8
+	ldr	r7, .L1479+8
 	str	r3, [sp, #4]
-.L1411:
+.L1468:
 	ldrh	r3, [r8]
 	cmp	r5, r3
-	bcs	.L1413
-	ldr	r3, .L1422+4
+	bcs	.L1470
+	ldr	r3, .L1479+4
 	ldr	r2, [r3]
 	cmp	r2, #32
-	bls	.L1414
+	bls	.L1471
 	movs	r4, #0
 	str	r4, [r3]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L1414
-.L1413:
+	b	.L1471
+.L1470:
 	movs	r2, #0
 	mov	r1, sp
 	mov	r0, r6
 	bl	log2phys
 	ldr	r3, [sp]
 	adds	r3, r3, #1
-	beq	.L1412
+	beq	.L1469
 	ldr	r3, [r4]
 	movs	r2, #1
 	add	r1, sp, #4
@@ -10729,19 +11148,19 @@ FtlDiscard:
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L1412:
+.L1469:
 	ldrh	r3, [r8]
 	adds	r6, r6, #1
 	subs	r5, r5, r3
-	b	.L1411
-.L1415:
+	b	.L1468
+.L1472:
 	mov	r0, #-1
-	b	.L1407
-.L1423:
+	b	.L1464
+.L1480:
 	.align	2
-.L1422:
+.L1479:
 	.word	.LANCHOR34
-	.word	.LANCHOR167
+	.word	.LANCHOR172
 	.word	.LANCHOR63
 	.word	.LANCHOR12
 	.size	FtlDiscard, .-FtlDiscard
@@ -10757,96 +11176,103 @@ FtlVpcCheckAndModify:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
-	movs	r5, #0
-	ldr	r1, .L1436
-	ldr	r0, .L1436+4
+	movs	r4, #0
+	ldr	r1, .L1494
+	ldr	r0, .L1494+4
 	bl	printf
-	ldr	r3, .L1436+8
+	ldr	r3, .L1494+8
 	movs	r1, #0
-	ldr	r4, .L1436+12
-	ldr	r6, .L1436+16
+	ldr	r5, .L1494+12
+	ldr	r6, .L1494+16
 	ldrh	r2, [r3]
-	ldr	r0, [r4]
+	ldr	r0, [r5]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-.L1425:
+.L1482:
 	ldr	r3, [r6]
-	cmp	r5, r3
-	bcc	.L1427
-	ldr	r10, .L1436+36
+	cmp	r4, r3
+	bcc	.L1484
+	ldr	r10, .L1494+36
 	movs	r7, #0
-	ldr	r8, .L1436+40
-.L1428:
+	ldr	r8, .L1494+40
+.L1485:
 	ldrh	r3, [r10]
-	uxth	r5, r7
-	cmp	r3, r5
-	bhi	.L1432
+	uxth	r6, r7
+	cmp	r3, r6
+	bhi	.L1490
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L1427:
+.L1484:
 	movs	r2, #0
 	add	r1, sp, #4
-	mov	r0, r5
+	mov	r0, r4
 	bl	log2phys
 	ldr	r0, [sp, #4]
 	adds	r3, r0, #1
-	beq	.L1426
+	beq	.L1483
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r2, [r4]
+	ldr	r2, [r5]
 	ldrh	r3, [r2, r0, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r0, lsl #1]	@ movhi
-.L1426:
-	adds	r5, r5, #1
-	b	.L1425
-.L1432:
+.L1483:
+	adds	r4, r4, #1
+	b	.L1482
+.L1490:
 	ldr	r3, [r8]
-	uxth	r6, r7
-	ldrh	r2, [r3, r6, lsl #1]
-	ldr	r3, [r4]
-	ldrh	r3, [r3, r6, lsl #1]
+	uxth	r4, r7
+	ldrh	r2, [r3, r4, lsl #1]
+	ldr	r3, [r5]
+	ldrh	r3, [r3, r4, lsl #1]
 	cmp	r2, r3
-	beq	.L1430
+	beq	.L1487
 	movw	r1, #65535
 	cmp	r2, r1
-	beq	.L1430
-	mov	r1, r6
-	ldr	r0, .L1436+20
+	beq	.L1487
+	mov	r1, r4
+	ldr	r0, .L1494+20
 	bl	printf
-	ldr	r3, .L1436+24
+	ldr	r3, .L1494+24
 	ldrh	r3, [r3]
-	cmp	r3, r5
-	beq	.L1430
-	ldr	r3, .L1436+28
+	cmp	r3, r6
+	beq	.L1487
+	ldr	r3, .L1494+28
 	ldrh	r3, [r3]
-	cmp	r3, r5
-	beq	.L1430
-	ldr	r3, .L1436+32
+	cmp	r3, r6
+	beq	.L1487
+	ldr	r3, .L1494+32
 	ldrh	r3, [r3]
-	cmp	r3, r5
-	beq	.L1430
-	ldr	r3, [r4]
-	mov	r0, r5
-	ldrh	r2, [r3, r6, lsl #1]
+	cmp	r3, r6
+	beq	.L1487
 	ldr	r3, [r8]
-	strh	r2, [r3, r6, lsl #1]	@ movhi
-	bl	update_vpc_list
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
-.L1430:
+	ldrh	r2, [r3, r4, lsl #1]
+	cbnz	r2, .L1489
+	ldr	r2, [r5]
+	ldrh	r2, [r2, r4, lsl #1]
+	strh	r2, [r3, r4, lsl #1]	@ movhi
+.L1487:
 	adds	r7, r7, #1
-	b	.L1428
-.L1437:
+	b	.L1485
+.L1489:
+	ldr	r2, [r5]
+	mov	r0, r6
+	ldrh	r2, [r2, r4, lsl #1]
+	strh	r2, [r3, r4, lsl #1]	@ movhi
+	bl	update_vpc_list
+	b	.L1487
+.L1495:
 	.align	2
-.L1436:
-	.word	.LANCHOR168
+.L1494:
+	.word	.LANCHOR173
 	.word	.LC94
 	.word	.LANCHOR6
 	.word	.LANCHOR128
 	.word	.LANCHOR61
-	.word	.LC105
+	.word	.LC110
 	.word	.LANCHOR51
 	.word	.LANCHOR53
 	.word	.LANCHOR52
@@ -10864,47 +11290,47 @@ FtlVpcCheckAndModify:
 allocate_new_data_superblock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1448
+	ldr	r3, .L1506
 	push	{r4, r5, r6, lr}
 	mov	r6, r0
 	ldrh	r4, [r0]
 	ldrh	r3, [r3]
 	cmp	r3, r4
-	bcs	.L1439
-	movw	r2, #2684
-	ldr	r1, .L1448+4
-	ldr	r0, .L1448+8
+	bcs	.L1497
+	movw	r2, #2714
+	ldr	r1, .L1506+4
+	ldr	r0, .L1506+8
 	bl	printf
-.L1439:
+.L1497:
 	movw	r3, #65535
 	cmp	r4, r3
-	beq	.L1440
-	ldr	r3, .L1448+12
+	beq	.L1498
+	ldr	r3, .L1506+12
 	mov	r0, r4
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
-	cbz	r3, .L1441
+	cbz	r3, .L1499
 	bl	INSERT_DATA_LIST
-.L1440:
-	ldr	r5, .L1448+16
+.L1498:
+	ldr	r5, .L1506+16
 	movw	r2, #65535
 	movs	r3, #1
 	strb	r3, [r6, #8]
 	ldrh	r0, [r5]
 	cmp	r0, r2
-	beq	.L1442
+	beq	.L1500
 	cmp	r4, r0
-	bne	.L1443
-	ldr	r3, .L1448+12
+	bne	.L1501
+	ldr	r3, .L1506+12
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L1444
-.L1443:
+	cbz	r3, .L1502
+.L1501:
 	bl	update_vpc_list
-.L1444:
+.L1502:
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.L1442:
+.L1500:
 	mov	r0, r6
 	bl	allocate_data_superblock
 	bl	l2p_flush
@@ -10913,17 +11339,17 @@ allocate_new_data_superblock:
 	bl	FtlVpcTblFlush
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L1441:
+.L1499:
 	bl	INSERT_FREE_LIST
-	b	.L1440
-.L1449:
+	b	.L1498
+.L1507:
 	.align	2
-.L1448:
+.L1506:
 	.word	.LANCHOR5
-	.word	.LANCHOR169
+	.word	.LANCHOR174
 	.word	.LC1
 	.word	.LANCHOR42
-	.word	.LANCHOR150
+	.word	.LANCHOR142
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
 	.section	.text.FtlProgPages,"ax",%progbits
 	.align	1
@@ -10938,25 +11364,25 @@ FtlProgPages:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r6, #0
-	ldr	r8, .L1464+24
+	ldr	r8, .L1522+24
 	mov	r4, r3
 	movs	r2, #0
 	mov	r5, r0
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
 	mov	r10, r1
 	bl	FlashProgPages
-.L1451:
+.L1509:
 	cmp	r6, r10
-	beq	.L1458
-	ldr	r7, .L1464
-	b	.L1459
-.L1454:
+	beq	.L1516
+	ldr	r7, .L1522
+	b	.L1517
+.L1512:
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r4]
 	cmp	r3, r0
-	bne	.L1452
+	bne	.L1510
 	ldr	r1, [r8]
 	ldrh	r0, [r4, #4]
 	ldrh	r2, [r1, r3, lsl #1]
@@ -10967,13 +11393,13 @@ FtlProgPages:
 	movs	r3, #0
 	strb	r3, [r4, #6]
 	strh	r3, [r4, #4]	@ movhi
-.L1452:
+.L1510:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1453
+	cbnz	r3, .L1511
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-.L1453:
-	ldr	r2, .L1464+4
+.L1511:
+	ldr	r2, .L1522+4
 	ldr	r3, [r2, #96]
 	adds	r3, r3, #1
 	str	r3, [r2, #96]
@@ -10989,20 +11415,20 @@ FtlProgPages:
 	ldrb	r3, [r4, #9]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	FlashProgPages
-.L1459:
+.L1517:
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L1454
-	ldr	r3, .L1464+8
+	beq	.L1512
+	ldr	r3, .L1522+8
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1455
-	movw	r2, #933
-	ldr	r1, .L1464+12
-	ldr	r0, .L1464+16
+	bcc	.L1513
+	movw	r2, #955
+	ldr	r1, .L1522+12
+	ldr	r0, .L1522+16
 	bl	printf
-.L1455:
+.L1513:
 	ldr	r3, [r5, #4]
 	add	r1, sp, #8
 	movs	r2, #1
@@ -11015,43 +11441,43 @@ FtlProgPages:
 	bl	P2V_block_in_plane
 	cmp	fp, #-1
 	mov	r7, r0
-	beq	.L1456
+	beq	.L1514
 	ldr	r3, [r8]
 	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L1457
+	cbnz	r2, .L1515
 	mov	r1, r0
-	ldr	r0, .L1464+20
+	ldr	r0, .L1522+20
 	bl	printf
-.L1457:
+.L1515:
 	mov	r0, r7
 	bl	decrement_vpc_count
-.L1456:
+.L1514:
 	adds	r6, r6, #1
 	adds	r5, r5, #20
-	b	.L1451
-.L1458:
-	ldr	r3, .L1464+8
+	b	.L1509
+.L1516:
+	ldr	r3, .L1522+8
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1450
-	mov	r2, #948
-	ldr	r1, .L1464+12
-	ldr	r0, .L1464+16
+	bcc	.L1508
+	movw	r2, #970
+	ldr	r1, .L1522+12
+	ldr	r0, .L1522+16
 	bl	printf
-.L1450:
+.L1508:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1465:
+.L1523:
 	.align	2
-.L1464:
+.L1522:
 	.word	.LANCHOR19
 	.word	.LANCHOR81
 	.word	.LANCHOR3
-	.word	.LANCHOR170
+	.word	.LANCHOR175
 	.word	.LC1
-	.word	.LC106
+	.word	.LC111
 	.word	.LANCHOR42
 	.size	FtlProgPages, .-FtlProgPages
 	.section	.text.FtlGcFreeTempBlock,"ax",%progbits
@@ -11067,54 +11493,54 @@ FtlGcFreeTempBlock:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movw	r2, #65535
-	ldr	r4, .L1492
-	ldr	r6, .L1492+4
+	ldr	r4, .L1550
+	ldr	r6, .L1550+4
 	ldrh	r5, [r4]
 	ldrh	r1, [r6]
 	cmp	r5, r2
-	bne	.L1467
-.L1477:
-	ldr	r3, .L1492+8
+	bne	.L1525
+.L1535:
+	ldr	r3, .L1550+8
 	movs	r2, #0
 	str	r2, [r3]
 	movw	r3, #65535
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	bne	.L1490
-.L1468:
+	bne	.L1548
+.L1526:
 	movs	r0, #0
-.L1466:
+.L1524:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1467:
-	cbz	r0, .L1470
-	ldr	r3, .L1492+12
+.L1525:
+	cbz	r0, .L1528
+	ldr	r3, .L1550+12
 	ldrh	r0, [r3]
 	cmp	r0, r2
-	beq	.L1471
-.L1472:
+	beq	.L1529
+.L1530:
 	movs	r1, #2
-.L1470:
-	ldr	r0, .L1492
+.L1528:
+	ldr	r0, .L1550
 	bl	FtlGcScanTempBlk
 	str	r0, [sp, #12]
 	adds	r0, r0, #1
-	beq	.L1473
-	ldr	r3, .L1492+16
+	beq	.L1531
+	ldr	r3, .L1550+16
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r5, lsl #1]
 	cmp	r3, #4
-	bls	.L1474
+	bls	.L1532
 	subs	r3, r3, #5
 	movs	r0, #1
 	strh	r3, [r2, r5, lsl #1]	@ movhi
 	bl	FtlEctTblFlush
-.L1474:
-	ldr	r4, .L1492+8
+.L1532:
+	ldr	r4, .L1550+8
 	ldr	r2, [r4]
-	cbnz	r2, .L1475
-	ldr	r2, .L1492+20
+	cbnz	r2, .L1533
+	ldr	r2, .L1550+20
 	ldr	r0, [sp, #12]
 	ldr	r3, [r2, #96]
 	ubfx	r0, r0, #10, #16
@@ -11122,60 +11548,60 @@ FtlGcFreeTempBlock:
 	str	r3, [r2, #96]
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
-.L1475:
+.L1533:
 	movs	r3, #0
 	str	r3, [r4]
-.L1486:
+.L1544:
 	movs	r0, #1
-	b	.L1466
-.L1471:
+	b	.L1524
+.L1529:
 	movs	r2, #0
 	strh	r2, [r3]	@ movhi
-	ldr	r3, .L1492+24
+	ldr	r3, .L1550+24
 	ldrh	r3, [r3]
 	cmp	r3, #17
-	bhi	.L1472
-	b	.L1470
-.L1473:
-	ldr	r3, .L1492+12
+	bhi	.L1530
+	b	.L1528
+.L1531:
+	ldr	r3, .L1550+12
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1486
-	b	.L1477
-.L1490:
+	bne	.L1544
+	b	.L1535
+.L1548:
 	ldrb	r1, [r4, #7]	@ zero_extendqisi2
 	ldrh	r3, [r6]
-	ldr	r5, .L1492+28
+	ldr	r5, .L1550+28
 	muls	r3, r1, r3
 	ldrh	r2, [r5]
 	cmp	r2, r3
-	beq	.L1478
+	beq	.L1536
 	movs	r2, #162
-	ldr	r1, .L1492+32
-	ldr	r0, .L1492+36
+	ldr	r1, .L1550+32
+	ldr	r0, .L1550+36
 	bl	printf
-.L1478:
+.L1536:
 	ldrh	r6, [r6]
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	ldr	r2, .L1492+40
+	ldr	r2, .L1550+40
 	ldrh	r0, [r4]
-	ldr	fp, .L1492+68
+	ldr	fp, .L1550+68
 	smulbb	r3, r3, r6
 	ldr	r1, [r2]
 	movs	r6, #0
 	str	r2, [sp, #4]
 	strh	r3, [r1, r0, lsl #1]	@ movhi
-	ldr	r1, .L1492+44
+	ldr	r1, .L1550+44
 	ldrh	r3, [r5]
 	ldr	r0, [r1]
 	add	r3, r3, r0
 	str	r3, [r1]
-.L1479:
+.L1537:
 	ldrh	r2, [r5]
 	uxth	r3, r6
 	cmp	r2, r3
-	bhi	.L1483
+	bhi	.L1541
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	ldr	r3, [sp, #4]
@@ -11183,10 +11609,10 @@ FtlGcFreeTempBlock:
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	beq	.L1484
+	beq	.L1542
 	bl	INSERT_DATA_LIST
-.L1485:
-	ldr	r3, .L1492+48
+.L1543:
+	ldr	r3, .L1550+48
 	movw	r6, #65535
 	strh	r6, [r4]	@ movhi
 	movs	r4, #0
@@ -11194,35 +11620,35 @@ FtlGcFreeTempBlock:
 	strh	r4, [r3]	@ movhi
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	ldr	r3, .L1492+24
+	ldr	r3, .L1550+52
+	strh	r6, [r3]	@ movhi
+	ldr	r3, .L1550+24
 	ldrh	r2, [r3]
-	ldr	r3, .L1492+52
+	ldr	r3, .L1550+56
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, asr #2
-	ble	.L1468
-	ldr	r3, .L1492+56
+	ble	.L1526
+	ldr	r3, .L1550+60
 	movs	r2, #20
-	strh	r6, [r3]	@ movhi
-	ldr	r3, .L1492+60
 	strh	r2, [r3]	@ movhi
-	b	.L1468
-.L1483:
+	b	.L1526
+.L1541:
 	uxth	r3, r6
 	movs	r7, #12
 	ldr	r2, [fp]
 	muls	r7, r3, r7
-	ldr	r3, .L1492+64
+	ldr	r3, .L1550+64
 	ldr	r8, [r3]
 	add	r10, r8, r7
 	ldr	r1, [r10, #8]
 	cmp	r1, r2
-	bcc	.L1480
+	bcc	.L1538
 	movs	r2, #168
-	ldr	r1, .L1492+32
-	ldr	r0, .L1492+36
+	ldr	r1, .L1550+32
+	ldr	r0, .L1550+36
 	bl	printf
-.L1480:
+.L1538:
 	movs	r2, #0
 	add	r1, sp, #12
 	ldr	r0, [r10, #8]
@@ -11230,7 +11656,7 @@ FtlGcFreeTempBlock:
 	ldr	r2, [sp, #12]
 	ldr	r0, [r8, r7]
 	cmp	r0, r2
-	bne	.L1481
+	bne	.L1539
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	movs	r2, #1
@@ -11239,38 +11665,38 @@ FtlGcFreeTempBlock:
 	ldr	r0, [r10, #8]
 	bl	log2phys
 	mov	r0, r7
-.L1491:
+.L1549:
 	bl	decrement_vpc_count
-.L1482:
+.L1540:
 	adds	r6, r6, #1
-	b	.L1479
-.L1481:
+	b	.L1537
+.L1539:
 	ldr	r3, [r10, #4]
 	cmp	r2, r3
-	beq	.L1482
+	beq	.L1540
 	ldrh	r0, [r4]
-	b	.L1491
-.L1484:
+	b	.L1549
+.L1542:
 	bl	INSERT_FREE_LIST
-	b	.L1485
-.L1493:
+	b	.L1543
+.L1551:
 	.align	2
-.L1492:
+.L1550:
 	.word	.LANCHOR53
 	.word	.LANCHOR19
-	.word	.LANCHOR152
-	.word	.LANCHOR156
+	.word	.LANCHOR144
+	.word	.LANCHOR162
 	.word	.LANCHOR43
 	.word	.LANCHOR81
 	.word	.LANCHOR48
 	.word	.LANCHOR97
-	.word	.LANCHOR171
+	.word	.LANCHOR176
 	.word	.LC1
 	.word	.LANCHOR42
 	.word	.LANCHOR67
 	.word	.LANCHOR96
-	.word	.LANCHOR78
 	.word	.LANCHOR80
+	.word	.LANCHOR78
 	.word	.LANCHOR82
 	.word	.LANCHOR98
 	.word	.LANCHOR61
@@ -11287,31 +11713,31 @@ FtlGcPageRecovery:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	ldr	r4, .L1496
-	ldr	r5, .L1496+4
+	ldr	r4, .L1554
+	ldr	r5, .L1554+4
 	ldrh	r1, [r4]
 	mov	r0, r5
 	bl	FtlGcScanTempBlk
 	ldrh	r2, [r5, #2]
 	ldrh	r3, [r4]
 	cmp	r2, r3
-	bcc	.L1494
-	ldr	r0, .L1496+8
+	bcc	.L1552
+	ldr	r0, .L1554+8
 	bl	FtlMapBlkWriteDump_data
 	movs	r0, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r3, .L1496+12
+	ldr	r3, .L1554+12
 	movs	r2, #0
 	str	r2, [r3]
-.L1494:
+.L1552:
 	pop	{r3, r4, r5, pc}
-.L1497:
+.L1555:
 	.align	2
-.L1496:
+.L1554:
 	.word	.LANCHOR19
 	.word	.LANCHOR53
+	.word	.LANCHOR140
 	.word	.LANCHOR144
-	.word	.LANCHOR152
 	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
 	.section	.text.FtlPowerLostRecovery,"ax",%progbits
 	.align	1
@@ -11326,13 +11752,13 @@ FtlPowerLostRecovery:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #0
-	ldr	r5, .L1499
-	ldr	r3, .L1499+4
+	ldr	r5, .L1557
+	ldr	r3, .L1557+4
 	mov	r0, r5
 	str	r4, [r3]
 	bl	FtlRecoverySuperblock
 	mov	r0, r5
-	ldr	r5, .L1499+8
+	ldr	r5, .L1557+8
 	bl	FtlSlcSuperblockCheck
 	mov	r0, r5
 	bl	FtlRecoverySuperblock
@@ -11343,11 +11769,11 @@ FtlPowerLostRecovery:
 	bl	decrement_vpc_count
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L1500:
+.L1558:
 	.align	2
-.L1499:
+.L1557:
 	.word	.LANCHOR51
-	.word	.LANCHOR162
+	.word	.LANCHOR168
 	.word	.LANCHOR52
 	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
 	.section	.text.Ftl_gc_temp_data_write_back,"ax",%progbits
@@ -11363,45 +11789,45 @@ Ftl_gc_temp_data_write_back:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r3, #0
-	ldr	r4, .L1508
+	ldr	r4, .L1566
 	movs	r6, #0
 	movs	r7, #20
 	mov	r2, r3
-	ldr	r5, .L1508+4
+	ldr	r5, .L1566+4
 	ldr	r1, [r4]
 	ldr	r0, [r5]
 	bl	FlashProgPages
-.L1502:
+.L1560:
 	ldr	r1, [r4]
 	uxth	r3, r6
 	cmp	r1, r3
-	bhi	.L1505
+	bhi	.L1563
 	ldr	r0, [r5]
 	bl	FtlGcBufFree
-	ldr	r3, .L1508+8
+	ldr	r3, .L1566+8
 	movs	r0, #0
 	str	r0, [r4]
 	ldrh	r3, [r3, #4]
-	cbnz	r3, .L1501
+	cbnz	r3, .L1559
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
-	b	.L1507
-.L1505:
+	b	.L1565
+.L1563:
 	muls	r3, r7, r3
 	ldr	r2, [r5]
 	adds	r6, r6, #1
 	adds	r1, r2, r3
 	ldr	r2, [r2, r3]
 	adds	r3, r2, #1
-	bne	.L1503
-	ldr	r3, .L1508+8
+	bne	.L1561
+	ldr	r3, .L1566+8
 	movs	r5, #0
-	ldr	r0, .L1508+12
+	ldr	r0, .L1566+12
 	ldrh	r4, [r3]
 	ldr	r0, [r0]
 	strh	r5, [r0, r4, lsl #1]	@ movhi
 	strh	r2, [r3]	@ movhi
-	ldr	r2, .L1508+16
+	ldr	r2, .L1566+16
 	ldr	r0, [r1, #4]
 	ldr	r3, [r2, #96]
 	ubfx	r0, r0, #10, #16
@@ -11410,22 +11836,22 @@ Ftl_gc_temp_data_write_back:
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
 	bl	FtlGcPageVarInit
-.L1507:
+.L1565:
 	movs	r0, #1
-.L1501:
+.L1559:
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1503:
+.L1561:
 	ldr	r3, [r1, #12]
 	ldr	r1, [r1, #4]
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
 	bl	FtlGcUpdatePage
-	b	.L1502
-.L1509:
+	b	.L1560
+.L1567:
 	.align	2
-.L1508:
+.L1566:
 	.word	.LANCHOR89
-	.word	.LANCHOR121
+	.word	.LANCHOR113
 	.word	.LANCHOR53
 	.word	.LANCHOR42
 	.word	.LANCHOR81
@@ -11443,38 +11869,180 @@ Ftl_get_new_temp_ppa:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movw	r3, #65535
-	ldr	r4, .L1513
+	ldr	r4, .L1571
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	beq	.L1511
+	beq	.L1569
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1512
-.L1511:
+	cbnz	r3, .L1570
+.L1569:
 	movs	r0, #0
 	movs	r5, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r0, .L1513
+	ldr	r0, .L1571
 	strb	r5, [r4, #8]
 	bl	allocate_data_superblock
-	ldr	r3, .L1513+4
+	ldr	r3, .L1571+4
 	strh	r5, [r3]	@ movhi
-	ldr	r3, .L1513+8
+	ldr	r3, .L1571+8
 	strh	r5, [r3]	@ movhi
 	bl	l2p_flush
 	mov	r0, r5
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1512:
-	ldr	r0, .L1513
+.L1570:
+	ldr	r0, .L1571
 	pop	{r3, r4, r5, lr}
 	b	get_new_active_ppa
-.L1514:
+.L1572:
 	.align	2
-.L1513:
+.L1571:
 	.word	.LANCHOR53
 	.word	.LANCHOR96
 	.word	.LANCHOR97
 	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
+	.section	.text.FtlSysBlkInit,"ax",%progbits
+	.align	1
+	.global	FtlSysBlkInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlSysBlkInit, %function
+FtlSysBlkInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	movs	r3, #0
+	ldr	r6, .L1588
+	strh	r3, [r6]	@ movhi
+	ldr	r3, .L1588+4
+	ldrh	r0, [r3]
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlScanSysBlk
+	ldr	r3, .L1588+8
+	ldrh	r2, [r3]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L1574
+.L1576:
+	mov	r7, #-1
+.L1573:
+	mov	r0, r7
+	pop	{r3, r4, r5, r6, r7, pc}
+.L1574:
+	bl	FtlLoadSysInfo
+	mov	r7, r0
+	cmp	r0, #0
+	bne	.L1576
+	bl	FtlLoadMapInfo
+	bl	FtlLoadVonderInfo
+	bl	Ftl_load_ext_data
+	bl	FtlLoadEctTbl
+	bl	FtlFreeSysBLkSort
+	bl	SupperBlkListInit
+	bl	FtlPowerLostRecovery
+	movs	r0, #1
+	bl	FtlUpdateVaildLpn
+	ldr	r3, .L1588+12
+	movs	r0, #12
+	ldrh	r1, [r3]
+	ldr	r3, .L1588+16
+	ldr	r2, [r3]
+	mov	r3, r7
+.L1577:
+	cmp	r3, r1
+	bge	.L1582
+	mla	r4, r0, r3, r2
+	ldr	r4, [r4, #4]
+	cmp	r4, #0
+	bge	.L1578
+.L1582:
+	ldr	r5, .L1588+20
+	cmp	r3, r1
+	ldr	r4, .L1588+24
+	ldrh	r2, [r5, #28]
+	add	r2, r2, #1
+	strh	r2, [r5, #28]	@ movhi
+	bge	.L1587
+.L1579:
+	ldr	r6, .L1588+28
+	ldr	r0, .L1588+24
+	bl	FtlSuperblockPowerLostFix
+	mov	r0, r6
+	bl	FtlSuperblockPowerLostFix
+	ldr	r3, .L1588+32
+	ldrh	r1, [r4]
+	ldrh	r0, [r4, #4]
+	ldr	r2, [r3]
+	ldrh	r3, [r2, r1, lsl #1]
+	subs	r3, r3, r0
+	ldr	r0, .L1588+36
+	strh	r3, [r2, r1, lsl #1]	@ movhi
+	ldrh	ip, [r6]
+	ldrh	r3, [r0]
+	ldrh	lr, [r6, #4]
+	strh	r3, [r4, #2]	@ movhi
+	movs	r3, #0
+	strb	r3, [r4, #6]
+	strh	r3, [r4, #4]	@ movhi
+	ldrh	r1, [r2, ip, lsl #1]
+	sub	r1, r1, lr
+	strh	r1, [r2, ip, lsl #1]	@ movhi
+	strb	r3, [r6, #6]
+	strh	r3, [r6, #4]	@ movhi
+	ldrh	r3, [r5, #30]
+	ldrh	r2, [r0]
+	adds	r3, r3, #1
+	strh	r2, [r6, #2]	@ movhi
+	strh	r3, [r5, #30]	@ movhi
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	bl	FtlVpcTblFlush
+	b	.L1583
+.L1578:
+	adds	r3, r3, #1
+	b	.L1577
+.L1587:
+	ldrh	r3, [r6]
+	cmp	r3, #0
+	bne	.L1579
+.L1583:
+	bl	FtlVpcCheckAndModify
+	ldrh	r0, [r4]
+	movw	r3, #65535
+	cmp	r0, r3
+	beq	.L1573
+	ldrh	r3, [r4, #4]
+	cmp	r3, #0
+	bne	.L1573
+	ldr	r4, .L1588+28
+	ldrh	r3, [r4, #4]
+	cmp	r3, #0
+	bne	.L1573
+	bl	FtlGcRefreshBlock
+	ldrh	r0, [r4]
+	bl	FtlGcRefreshBlock
+	bl	FtlVpcTblFlush
+	ldr	r0, .L1588+24
+	bl	allocate_new_data_superblock
+	mov	r0, r4
+	bl	allocate_new_data_superblock
+	b	.L1573
+.L1589:
+	.align	2
+.L1588:
+	.word	.LANCHOR167
+	.word	.LANCHOR4
+	.word	.LANCHOR79
+	.word	.LANCHOR33
+	.word	.LANCHOR55
+	.word	.LANCHOR39
+	.word	.LANCHOR51
+	.word	.LANCHOR52
+	.word	.LANCHOR42
+	.word	.LANCHOR19
+	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.section	.text.rk_ftl_garbage_collect,"ax",%progbits
 	.align	1
 	.global	rk_ftl_garbage_collect
@@ -11486,334 +12054,310 @@ Ftl_get_new_temp_ppa:
 rk_ftl_garbage_collect:
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1633
+	ldr	r3, .L1713
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r7, r0
 	sub	sp, sp, #48
+	str	r0, [sp, #8]
 	ldr	r0, [r3]
 	cmp	r0, #0
-	bne	.L1590
-	ldr	r3, .L1633+4
+	bne	.L1667
+	ldr	r3, .L1713+4
 	ldrh	r3, [r3]
 	cmp	r3, #47
-	bls	.L1515
-	ldr	r3, .L1633+8
+	bls	.L1590
+	ldr	r3, .L1713+8
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1517
-.L1520:
-	ldr	r3, .L1633+12
+	bne	.L1592
+.L1595:
+	ldr	r3, .L1713+12
 	movw	r4, #65535
 	ldrh	r0, [r3]
 	cmp	r0, r4
-	bne	.L1518
-.L1519:
-	ldr	r2, .L1633+16
+	bne	.L1593
+.L1594:
+	bl	FtlReadRefresh
+	ldr	r2, .L1713+16
 	movw	r5, #65535
-	ldr	r6, .L1633+20
+	ldr	r6, .L1713+20
+	ldr	r1, [sp, #8]
 	ldr	r3, [r2]
 	ldrh	r0, [r6]
 	adds	r3, r3, #1
-	add	r3, r3, r7, lsl #7
+	add	r3, r3, r1, lsl #7
 	cmp	r0, r5
 	str	r3, [r2]
-	bne	.L1521
-	ldr	r1, .L1633+24
+	bne	.L1596
+	ldr	r1, .L1713+24
 	ldrh	r1, [r1]
 	cmp	r1, r0
-	bne	.L1522
-	ldr	r0, .L1633+28
-	ldrh	r10, [r0]
-	cmp	r10, r1
-	bne	.L1523
-	ldr	r1, .L1633+32
-	ldrh	r0, [r1]
-	mov	r8, r1
-	cmp	r0, #24
+	bne	.L1597
+	ldr	r0, .L1713+28
+	ldrh	r8, [r0]
+	cmp	r8, r1
+	bne	.L1598
+	ldr	r7, .L1713+32
+	ldrh	r1, [r7]
+	cmp	r1, #24
 	ite	cc
 	movcc	r1, #5120
 	movcs	r1, #1024
 	cmp	r3, r1
-	bls	.L1523
-	ldr	r3, .L1633+36
+	bls	.L1598
+	ldr	r3, .L1713+36
 	movs	r4, #0
 	str	r4, [r2]
 	strh	r4, [r3]	@ movhi
 	bl	GetSwlReplaceBlock
-	cmp	r0, r10
+	cmp	r0, r8
 	mov	r5, r0
-	bne	.L1594
-	ldr	r10, .L1633+96
-	ldrh	r2, [r8]
-	ldrh	r3, [r10]
+	bne	.L1671
+	ldr	r8, .L1713+96
+	ldrh	r2, [r7]
+	ldrh	r3, [r8]
 	cmp	r2, r3
-	bcs	.L1526
+	bcs	.L1601
 	movs	r0, #64
 	bl	List_get_gc_head_node
 	uxth	r3, r0
 	cmp	r3, r5
-	beq	.L1528
+	beq	.L1603
 	mov	r0, r3
-	ldr	r3, .L1633+40
+	ldr	r3, .L1713+40
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #7
-	bhi	.L1529
+	bhi	.L1604
 	mov	r0, r4
 	bl	List_get_gc_head_node
 	uxth	r4, r0
 	movs	r3, #128
-	strh	r3, [r10]	@ movhi
+	strh	r3, [r8]	@ movhi
 	cmp	r4, r5
-	bne	.L1525
-.L1528:
+	bne	.L1600
+.L1603:
 	bl	FtlGcReFreshBadBlk
-	cmp	r7, #0
-	bne	.L1531
+	ldr	r3, [sp, #8]
+	cmp	r3, #0
+	bne	.L1606
 	movw	r3, #65535
 	cmp	r5, r3
-	bne	.L1531
-.L1588:
-	ldr	r3, .L1633+32
+	bne	.L1606
+.L1665:
+	ldr	r3, .L1713+32
 	ldrh	r3, [r3]
 	cmp	r3, #24
-	bhi	.L1595
-	ldr	r2, .L1633+44
+	bhi	.L1672
+	ldr	r2, .L1713+44
 	cmp	r3, #16
 	ldrh	r4, [r2]
-	bls	.L1533
+	bls	.L1608
 	lsrs	r4, r4, #5
-.L1532:
-	ldr	r2, .L1633+48
-	ldrh	r1, [r2]
-	cmp	r1, r3
-	mov	r1, r2
-	bcs	.L1536
-	ldr	r3, .L1633+24
+.L1607:
+	ldr	r1, .L1713+48
+	ldrh	r2, [r1]
+	cmp	r2, r3
+	mov	r2, r1
+	bcs	.L1611
+	ldr	r3, .L1713+24
 	movw	r0, #65535
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L1537
-	ldr	r0, .L1633+28
+	bne	.L1612
+	ldr	r0, .L1713+28
 	ldrh	r0, [r0]
 	cmp	r0, r3
-	bne	.L1537
-	ldr	r3, .L1633+36
+	bne	.L1612
+	ldr	r3, .L1713+36
 	ldrh	r0, [r3]
-	cbnz	r0, .L1538
-	ldr	r3, .L1633+52
-	ldr	r4, .L1633+56
+	cbnz	r0, .L1613
+	ldr	r3, .L1713+52
+	ldr	r4, .L1713+56
 	ldr	r3, [r3]
 	ldr	r4, [r4]
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, lsr #2
-	bcs	.L1539
-.L1538:
-	ldr	r3, .L1633+60
+	bcs	.L1614
+.L1613:
+	ldr	r3, .L1713+60
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
-	strh	r3, [r1]	@ movhi
-.L1540:
-	ldr	r3, .L1633+64
+	strh	r3, [r2]	@ movhi
+.L1615:
+	ldr	r3, .L1713+64
 	movs	r2, #0
 	str	r2, [r3]
-.L1515:
+.L1590:
 	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1517:
-	ldr	r2, .L1633+24
+.L1592:
+	ldr	r2, .L1713+24
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L1520
+	beq	.L1595
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
 	cmp	r0, #0
-	beq	.L1520
+	beq	.L1595
 	movs	r0, #1
-	b	.L1515
-.L1518:
-	ldr	r1, .L1633+28
+	b	.L1590
+.L1593:
+	ldr	r1, .L1713+28
 	ldrh	r2, [r1]
 	cmp	r2, r4
 	itt	eq
 	strheq	r0, [r1]	@ movhi
 	strheq	r2, [r3]	@ movhi
-	b	.L1519
-.L1529:
+	b	.L1594
+.L1604:
 	movs	r3, #64
-.L1627:
-	strh	r3, [r10]	@ movhi
-	b	.L1528
-.L1526:
+.L1707:
+	strh	r3, [r8]	@ movhi
+	b	.L1603
+.L1601:
 	movs	r3, #80
-	b	.L1627
-.L1594:
+	b	.L1707
+.L1671:
 	mov	r4, r0
-.L1525:
-	ldr	r3, .L1633+40
+.L1600:
+	ldr	r3, .L1713+40
 	mov	r5, r4
-	ldr	r1, .L1633+48
-	ldrh	r2, [r8]
+	ldr	r1, .L1713+48
+	ldrh	r2, [r7]
 	ldr	r3, [r3]
 	ldrh	r1, [r1]
-	ldr	r0, .L1633+68
+	ldr	r0, .L1713+68
 	ldrh	r3, [r3, r4, lsl #1]
 	str	r1, [sp, #4]
-	ldr	r1, .L1633+72
+	ldr	r1, .L1713+72
 	ldr	r1, [r1]
 	ldrh	r1, [r1, r4, lsl #1]
 	str	r1, [sp]
 	mov	r1, r4
 	bl	printf
-	b	.L1528
-.L1533:
+	b	.L1603
+.L1608:
 	cmp	r3, #12
-	bls	.L1534
+	bls	.L1609
 	lsrs	r4, r4, #4
-	b	.L1532
-.L1534:
+	b	.L1607
+.L1609:
 	cmp	r3, #8
-	bls	.L1532
+	bls	.L1607
 	lsrs	r4, r4, #2
-	b	.L1532
-.L1595:
+	b	.L1607
+.L1672:
 	movs	r4, #1
-	b	.L1532
-.L1539:
+	b	.L1607
+.L1614:
 	movs	r3, #18
-	strh	r3, [r2]	@ movhi
-	b	.L1540
-.L1537:
-	ldr	r3, .L1633+60
+	strh	r3, [r1]	@ movhi
+	b	.L1615
+.L1612:
+	ldr	r3, .L1713+60
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
-	strh	r3, [r1]	@ movhi
-.L1536:
-	ldr	r3, .L1633+76
+	strh	r3, [r2]	@ movhi
+.L1611:
+	ldr	r3, .L1713+76
 	ldrh	r3, [r3]
-	cbz	r3, .L1596
+	cbz	r3, .L1673
 	adds	r4, r4, #32
 	uxth	r4, r4
-.L1596:
+.L1673:
 	movw	r5, #65535
-.L1542:
+.L1617:
 	ldrh	r3, [r6]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1551
+	bne	.L1626
 	cmp	r5, r3
-	beq	.L1552
+	beq	.L1627
 	strh	r5, [r6]	@ movhi
-.L1553:
+.L1628:
 	ldrh	r0, [r6]
 	movw	r7, #65535
 	movs	r3, #0
 	strb	r3, [r6, #8]
 	cmp	r0, r7
-	beq	.L1551
+	beq	.L1626
 	bl	IsBlkInGcList
-	cbz	r0, .L1556
+	cbz	r0, .L1631
 	strh	r7, [r6]	@ movhi
-.L1556:
+.L1631:
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1551
-	ldr	r0, .L1633+20
+	beq	.L1626
+	ldr	r0, .L1713+20
 	bl	make_superblock
-	ldr	r2, .L1633+80
+	ldr	r2, .L1713+80
 	movs	r3, #0
 	strh	r3, [r6, #2]	@ movhi
 	strb	r3, [r6, #6]
 	strh	r3, [r2]	@ movhi
-	ldr	r3, .L1633+40
+	ldr	r3, .L1713+40
 	ldrh	r2, [r6]
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r2, lsl #1]
-	ldr	r3, .L1633+84
+	ldr	r3, .L1713+84
 	strh	r2, [r3]	@ movhi
-.L1551:
-	ldr	r2, .L1633+88
+.L1626:
+	ldr	r2, .L1713+88
 	ldrh	r3, [r6]
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L1557
-	ldr	r2, .L1633+92
+	beq	.L1632
+	ldr	r2, .L1713+92
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L1557
-	ldr	r6, .L1633+20
-	mov	fp, r6
-.L1558:
-	ldrh	r2, [r6]
+	bne	.L1633
+.L1632:
+	movw	r3, #65535
+	strh	r3, [r6]	@ movhi
+.L1633:
+	ldr	fp, .L1713+20
+	mov	r6, fp
+.L1663:
+	ldrh	r2, [fp]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1559
-	ldr	r8, .L1633+100
+	bne	.L1634
+	ldr	r10, .L1713+100
 	movs	r2, #0
-	ldr	r3, .L1633+64
+	ldr	r3, .L1713+64
+	mov	r8, r10
 	str	r2, [r3]
-.L1560:
-	ldrh	r7, [r8]
+.L1635:
+	ldrh	r7, [r10]
 	mov	r0, r7
 	bl	List_get_gc_head_node
 	uxth	r3, r0
 	movw	r1, #65535
 	cmp	r3, r1
-	strh	r3, [fp]	@ movhi
-	bne	.L1561
+	strh	r3, [r6]	@ movhi
+	bne	.L1636
 	movs	r3, #0
 	movs	r0, #8
-	strh	r3, [r8]	@ movhi
-	b	.L1515
-.L1543:
-	ldr	r3, .L1633+64
-	movs	r2, #0
-	ldr	r1, .L1633+48
-	ldr	r4, .L1633+32
-	str	r2, [r3]
-	ldrh	r3, [r1]
-	mov	r2, r1
-	ldrh	r8, [r4]
-	ldr	r5, .L1633+36
-	cmp	r3, r8
-	bcs	.L1544
-	ldrh	r3, [r5]
-	cbnz	r3, .L1545
-	ldr	r3, .L1633+52
-	ldr	r0, .L1633+56
-	ldr	r3, [r3]
-	ldr	r0, [r0]
-	add	r3, r3, r3, lsl #1
-	cmp	r0, r3, lsr #2
-	bcs	.L1546
-.L1545:
-	ldr	r3, .L1633+60
-	ldrh	r3, [r3]
-	add	r3, r3, r3, lsl #1
-	asrs	r3, r3, #2
-	strh	r3, [r2]	@ movhi
-.L1630:
-	bl	FtlReadRefresh
-	ldrh	r0, [r5]
-	b	.L1515
-.L1634:
+	strh	r3, [r10]	@ movhi
+	b	.L1590
+.L1714:
 	.align	2
-.L1633:
-	.word	.LANCHOR117
+.L1713:
+	.word	.LANCHOR108
 	.word	.LANCHOR45
-	.word	.LANCHOR156
+	.word	.LANCHOR162
 	.word	.LANCHOR100
 	.word	.LANCHOR84
 	.word	.LANCHOR80
 	.word	.LANCHOR53
 	.word	.LANCHOR99
 	.word	.LANCHOR48
-	.word	.LANCHOR172
+	.word	.LANCHOR177
 	.word	.LANCHOR42
 	.word	.LANCHOR19
 	.word	.LANCHOR82
@@ -11821,75 +12365,109 @@ rk_ftl_garbage_collect:
 	.word	.LANCHOR59
 	.word	.LANCHOR78
 	.word	.LANCHOR87
-	.word	.LC107
+	.word	.LC112
 	.word	.LANCHOR43
 	.word	.LANCHOR101
-	.word	.LANCHOR173
-	.word	.LANCHOR174
+	.word	.LANCHOR178
+	.word	.LANCHOR179
 	.word	.LANCHOR51
 	.word	.LANCHOR52
 	.word	.LANCHOR83
 	.word	.LANCHOR85
-.L1546:
+.L1618:
+	ldr	r3, .L1715
+	movs	r2, #0
+	ldr	r5, .L1715+4
+	ldr	r4, .L1715+8
+	str	r2, [r3]
+	ldrh	r2, [r5]
+	ldrh	r3, [r4]
+	ldr	r7, .L1715+12
+	cmp	r2, r3
+	bls	.L1619
+	ldrh	r3, [r7]
+	cbnz	r3, .L1620
+	ldr	r3, .L1715+16
+	ldr	r2, .L1715+20
+	ldr	r3, [r3]
+	ldr	r2, [r2]
+	add	r3, r3, r3, lsl #1
+	cmp	r2, r3, lsr #2
+	bcs	.L1621
+.L1620:
+	ldr	r3, .L1715+24
+	ldrh	r3, [r3]
+	add	r3, r3, r3, lsl #1
+	asrs	r3, r3, #2
+.L1708:
+	strh	r3, [r4]	@ movhi
+	bl	FtlReadRefresh
+	movs	r0, #0
+	bl	List_get_gc_head_node
+	ldr	r3, .L1715+28
+	uxth	r0, r0
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r0, lsl #1]
+	cmp	r3, #4
+	bls	.L1619
+.L1711:
+	ldrh	r0, [r7]
+	b	.L1590
+.L1621:
 	movs	r3, #18
-	strh	r3, [r1]	@ movhi
-	b	.L1630
-.L1544:
-	ldrh	r0, [r5]
+	b	.L1708
+.L1619:
+	ldrh	r0, [r7]
 	cmp	r0, #0
-	bne	.L1548
-	ldr	r3, .L1635
-	ldrh	r7, [r3]
-	add	r2, r7, r7, lsl #1
+	bne	.L1623
+	ldr	r3, .L1715+24
+	ldrh	r8, [r3]
+	add	r2, r8, r8, lsl #1
 	asrs	r2, r2, #2
-	strh	r2, [r1]	@ movhi
+	strh	r2, [r4]	@ movhi
 	bl	List_get_gc_head_node
-	ldr	r3, .L1635+4
+	ldr	r3, .L1715+28
 	uxth	r0, r0
-	ldr	r2, .L1635+8
+	ldr	r2, .L1715+32
 	ldr	r3, [r3]
 	ldrh	r2, [r2]
 	ldrh	r1, [r3, r0, lsl #1]
-	ldr	r3, .L1635+12
+	ldr	r3, .L1715+36
 	ldrh	r3, [r3]
 	muls	r2, r3, r2
 	cmp	r1, r2, asr #1
-	ble	.L1549
-	subs	r3, r7, #1
-	cmp	r8, r3
-	bge	.L1630
-.L1549:
+	ble	.L1624
+	ldrh	r2, [r5]
+	add	r3, r8, #-1
+	cmp	r2, r3
+	blt	.L1624
+	bl	FtlReadRefresh
+	b	.L1711
+.L1624:
 	cmp	r1, #0
-	bne	.L1548
+	bne	.L1623
 	movw	r0, #65535
 	bl	decrement_vpc_count
-	ldrh	r0, [r4]
+	ldrh	r0, [r5]
 	adds	r0, r0, #1
-	b	.L1515
-.L1552:
-	ldr	r3, .L1635+16
+	b	.L1590
+.L1627:
+	ldr	r3, .L1715+40
 	ldrh	r2, [r3]
 	cmp	r2, r5
-	beq	.L1553
-	ldr	r1, .L1635+4
+	beq	.L1628
+	ldr	r1, .L1715+28
 	ldr	r1, [r1]
 	ldrh	r2, [r1, r2, lsl #1]
-	cbnz	r2, .L1554
+	cbnz	r2, .L1629
 	strh	r5, [r3]	@ movhi
-.L1554:
+.L1629:
 	ldrh	r2, [r3]
 	strh	r2, [r6]	@ movhi
 	movw	r2, #65535
 	strh	r2, [r3]	@ movhi
-	b	.L1553
-.L1557:
-	movw	r3, #65535
-	strh	r3, [r6]	@ movhi
-.L1631:
-	ldr	r3, .L1635+20
-	ldrh	r0, [r3]
-	b	.L1515
-.L1561:
+	b	.L1628
+.L1636:
 	str	r0, [sp, #16]
 	mov	r0, r3
 	str	r3, [sp, #12]
@@ -11897,111 +12475,133 @@ rk_ftl_garbage_collect:
 	bl	IsBlkInGcList
 	ldr	r3, [sp, #12]
 	ldr	r2, [sp, #16]
-	cbz	r0, .L1562
-	strh	r7, [r8]	@ movhi
-	b	.L1560
-.L1562:
+	cbz	r0, .L1637
+	strh	r7, [r10]	@ movhi
+	b	.L1635
+.L1637:
+	ldr	lr, .L1715+28
 	uxth	r0, r2
-	ldr	r2, .L1635+24
-	ldr	r10, .L1635+4
 	uxth	r7, r7
-	ldrh	lr, [r2]
-	ldr	r2, .L1635+8
-	ldr	r1, [r10]
-	strh	r7, [r8]	@ movhi
+	ldr	r2, [lr]
+	strh	r7, [r10]	@ movhi
+	str	lr, [sp, #16]
+	ldrh	ip, [r2, r0, lsl #1]
+	str	r2, [sp, #12]
+	ldr	r2, .L1715+44
+	ldrh	r2, [r2]
+	mov	r1, r2
+	ldr	r2, .L1715+32
 	ldrh	r2, [r2]
-	ldrh	ip, [r1, r0, lsl #1]
-	mul	lr, r2, lr
-	cmp	ip, lr, asr #1
-	bgt	.L1564
+	muls	r2, r1, r2
+	cmp	ip, r2, asr #1
+	bgt	.L1639
 	cmp	r7, #48
-	bls	.L1565
+	bls	.L1640
 	cmp	ip, #8
-	bls	.L1565
-	ldr	r7, .L1635+28
+	bls	.L1640
+	ldr	r7, .L1715+48
 	ldrh	r7, [r7]
 	cmp	r7, #35
-	bhi	.L1565
-.L1564:
-	ldr	r2, .L1635+32
+	bhi	.L1640
+.L1639:
 	movs	r7, #0
-	strh	r7, [r2]	@ movhi
-.L1565:
+	strh	r7, [r8]	@ movhi
+.L1640:
+	ldr	r1, [sp, #12]
 	ldrh	r1, [r1, r0, lsl #1]
-	cmp	lr, r1
-	bgt	.L1566
+	cmp	r2, r1
+	bgt	.L1641
 	movw	r2, #65535
 	cmp	r5, r2
-	bne	.L1566
-	ldr	r2, .L1635+32
+	bne	.L1641
+	ldrh	r2, [r8]
+	cmp	r2, #3
+	bhi	.L1641
 	movs	r3, #0
-	strh	r5, [fp]	@ movhi
-	strh	r3, [r2]	@ movhi
-	b	.L1631
-.L1566:
-	cbnz	r1, .L1567
+	strh	r5, [r6]	@ movhi
+	strh	r3, [r8]	@ movhi
+.L1712:
+	ldr	r3, .L1715+12
+	ldrh	r0, [r3]
+	b	.L1590
+.L1641:
+	cbnz	r1, .L1642
 	movw	r0, #65535
 	bl	decrement_vpc_count
-	ldr	r3, .L1635+32
-	ldr	r2, .L1635+32
-	ldrh	r3, [r3]
+	ldrh	r3, [r8]
 	adds	r3, r3, #1
-	strh	r3, [r2]	@ movhi
-	b	.L1560
-.L1567:
+	strh	r3, [r8]	@ movhi
+	b	.L1635
+.L1642:
 	movs	r2, #0
-	strb	r2, [fp, #8]
-	ldr	r2, .L1635+36
+	strb	r2, [r6, #8]
+	ldr	r2, .L1715+52
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bne	.L1568
-	movw	r2, #658
-	ldr	r1, .L1635+40
-	ldr	r0, .L1635+44
+	bne	.L1643
+	mov	r2, #700
+	ldr	r1, .L1715+56
+	ldr	r0, .L1715+60
 	bl	printf
-.L1568:
-	ldr	r3, .L1635+48
-	ldrh	r2, [fp]
+.L1643:
+	ldr	r3, .L1715+64
+	ldrh	r2, [r6]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1569
-	movw	r2, #659
-	ldr	r1, .L1635+40
-	ldr	r0, .L1635+44
+	bne	.L1644
+	movw	r2, #701
+	ldr	r1, .L1715+56
+	ldr	r0, .L1715+60
 	bl	printf
-.L1569:
-	ldr	r3, .L1635+52
-	ldrh	r2, [fp]
+.L1644:
+	ldr	r3, .L1715+68
+	ldrh	r2, [r6]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1570
-	mov	r2, #660
-	ldr	r1, .L1635+40
-	ldr	r0, .L1635+44
+	bne	.L1645
+	movw	r2, #702
+	ldr	r1, .L1715+56
+	ldr	r0, .L1715+60
 	bl	printf
-.L1570:
-	mov	r0, r6
+.L1645:
+	mov	r0, fp
 	bl	make_superblock
-	ldr	r2, .L1635+56
+	ldr	r2, .L1715+72
 	movs	r3, #0
-	ldrh	r1, [fp]
+	ldrh	r1, [r6]
 	strh	r3, [r2]	@ movhi
-	ldr	r2, [r10]
+	ldr	r2, [sp, #16]
+	ldr	r2, [r2]
 	ldrh	r1, [r2, r1, lsl #1]
-	ldr	r2, .L1635+60
-	strh	r3, [fp, #2]	@ movhi
-	strb	r3, [fp, #6]
+	ldr	r2, .L1715+76
+	strh	r3, [r6, #2]	@ movhi
+	strb	r3, [r6, #6]
 	strh	r1, [r2]	@ movhi
-.L1559:
-	bl	FtlReadRefresh
-	ldr	r3, .L1635+64
+.L1634:
+	ldr	r3, .L1715+80
 	movs	r2, #1
 	str	r2, [r3]
-	ldr	r3, .L1635+24
+	ldr	r3, .L1715+44
 	ldrh	r3, [r3]
-	str	r3, [sp, #28]
-	ldrh	r3, [fp, #2]
-	ldr	r1, [sp, #28]
+	str	r3, [sp, #20]
+	ldr	r3, [sp, #8]
+	cbz	r3, .L1646
+	ldr	r3, .L1715+32
+	ldr	r2, [sp, #20]
+	ldrh	r1, [r6]
+	ldrh	r3, [r3]
+	muls	r3, r2, r3
+	ldr	r2, .L1715+28
+	ldr	r2, [r2]
+	ldrh	r2, [r2, r1, lsl #1]
+	subs	r3, r3, r2
+	it	mi
+	addmi	r3, r3, #3
+	add	r4, r4, r3, asr #2
+	uxth	r4, r4
+.L1646:
+	ldrh	r3, [r6, #2]
+	ldr	r1, [sp, #20]
 	adds	r2, r3, r4
 	cmp	r2, r1
 	itt	gt
@@ -12010,121 +12610,128 @@ rk_ftl_garbage_collect:
 	mov	r3, #0
 	it	gt
 	uxthgt	r4, r4
-.L1629:
-	str	r3, [sp, #24]
-	ldrh	r3, [sp, #24]
+.L1710:
+	str	r3, [sp, #28]
+	ldrh	r3, [sp, #28]
 	cmp	r4, r3
-	bls	.L1580
-	ldr	r3, .L1635+8
-	movw	r10, #65535
-	ldrh	r8, [r6, #2]
-	ldr	r1, .L1635+68
-	ldrh	ip, [r3]
-	ldr	r3, .L1635+72
+	bls	.L1657
+	ldr	r3, .L1715+32
+	movw	lr, #65535
+	ldrh	r1, [fp, #2]
+	mov	ip, #20
+	ldr	r7, .L1715+84
+	ldrh	r8, [r3]
+	ldr	r3, .L1715+88
 	ldr	r0, [r3]
-	ldr	r3, [sp, #24]
-	add	r8, r8, r3
+	ldr	r3, [sp, #28]
+	adds	r3, r1, r3
+	str	r3, [sp, #16]
 	movs	r3, #0
 	str	r3, [sp, #12]
-	b	.L1581
-.L1574:
-	ldrh	r2, [r1, #2]!
-	cmp	r2, r10
-	beq	.L1573
-	ldr	r7, [sp, #12]
-	mov	lr, #20
-	orr	r2, r8, r2, lsl #10
-	mla	lr, lr, r7, r0
-	str	r2, [lr, #4]
-	mov	r2, r7
+	b	.L1658
+.L1651:
+	ldrh	r2, [r7, #2]!
+	cmp	r2, lr
+	beq	.L1650
+	ldr	r1, [sp, #12]
+	mla	r10, ip, r1, r0
+	ldr	r1, [sp, #16]
+	orr	r2, r1, r2, lsl #10
+	str	r2, [r10, #4]
+	ldr	r2, [sp, #12]
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r2, [sp, #12]
-.L1573:
+.L1650:
 	adds	r3, r3, #1
-.L1581:
+.L1658:
 	uxth	r2, r3
-	cmp	ip, r2
-	bhi	.L1574
-	ldrb	r2, [r6, #8]	@ zero_extendqisi2
+	cmp	r8, r2
+	bhi	.L1651
+	ldrb	r2, [fp, #8]	@ zero_extendqisi2
 	ldr	r1, [sp, #12]
 	bl	FlashReadPages
 	movs	r3, #0
-.L1628:
-	str	r3, [sp, #20]
+.L1709:
+	str	r3, [sp, #24]
 	ldr	r2, [sp, #12]
-	ldrh	r3, [sp, #20]
+	ldrh	r3, [sp, #24]
 	cmp	r2, r3
-	bhi	.L1579
-	ldr	r3, [sp, #24]
+	bhi	.L1656
+	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
-	b	.L1629
-.L1636:
+	b	.L1710
+.L1716:
 	.align	2
-.L1635:
+.L1715:
+	.word	.LANCHOR87
+	.word	.LANCHOR48
+	.word	.LANCHOR82
+	.word	.LANCHOR177
+	.word	.LANCHOR61
+	.word	.LANCHOR59
 	.word	.LANCHOR78
 	.word	.LANCHOR42
 	.word	.LANCHOR3
 	.word	.LANCHOR20
 	.word	.LANCHOR99
-	.word	.LANCHOR172
 	.word	.LANCHOR19
 	.word	.LANCHOR96
-	.word	.LANCHOR85
 	.word	.LANCHOR51
-	.word	.LANCHOR175
+	.word	.LANCHOR180
 	.word	.LC1
 	.word	.LANCHOR52
 	.word	.LANCHOR53
-	.word	.LANCHOR173
-	.word	.LANCHOR174
-	.word	.LANCHOR117
+	.word	.LANCHOR178
+	.word	.LANCHOR179
+	.word	.LANCHOR108
 	.word	.LANCHOR80+14
 	.word	.LANCHOR93
-.L1579:
-	ldr	r3, [sp, #20]
+.L1656:
+	ldr	r3, [sp, #24]
 	movs	r7, #20
 	muls	r7, r3, r7
-	ldr	r3, .L1637
+	ldr	r3, .L1717
 	ldr	r3, [r3]
 	adds	r2, r3, r7
 	ldr	r3, [r3, r7]
 	adds	r3, r3, #1
-	beq	.L1576
+	beq	.L1653
 	ldr	r3, [r2, #12]
 	ldrh	r2, [r3]
 	str	r3, [sp, #16]
 	movw	r3, #61589
 	cmp	r2, r3
-	bne	.L1576
+	bne	.L1653
 	ldr	r3, [sp, #16]
 	ldr	r8, [r3, #8]
 	cmp	r8, #-1
-	bne	.L1577
-	mov	r2, #696
-	ldr	r1, .L1637+4
-	ldr	r0, .L1637+8
+	bne	.L1654
+	mov	r2, #736
+	ldr	r1, .L1717+4
+	ldr	r0, .L1717+8
 	bl	printf
-.L1577:
+.L1654:
 	movs	r2, #0
 	add	r1, sp, #44
 	mov	r0, r8
 	bl	log2phys
-	ldr	r3, .L1637
+	ldr	r3, .L1717
 	ldr	r1, [r3]
 	ldr	r3, [sp, #44]
 	add	r1, r1, r7
 	ldr	r2, [r1, #4]
 	cmp	r2, r3
-	bne	.L1576
-	ldr	r2, .L1637+12
+	bne	.L1653
+	ldr	r3, .L1717+12
 	mov	r10, #20
-	ldr	r8, .L1637+36
+	ldr	r2, .L1717+12
+	ldr	r8, .L1717+32
+	ldrh	r3, [r3]
 	ldr	r1, [r1, #16]
-	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L1637+16
+	ldr	r2, .L1717+16
 	ldr	r3, [r8]
 	ldr	r0, [r2]
 	str	r2, [sp, #36]
@@ -12139,11 +12746,11 @@ rk_ftl_garbage_collect:
 	ldr	r2, [r2]
 	ldr	r3, [r8]
 	mla	r10, r10, r3, r2
-	ldr	r2, .L1637
+	ldr	r2, .L1717
 	adds	r3, r3, #1
 	ldr	r0, [r2]
 	add	r0, r0, r7
-	ldr	r7, .L1637+20
+	ldr	r7, .L1717+20
 	ldr	r2, [r0, #8]
 	str	r2, [r10, #8]
 	ldr	r2, [r0, #12]
@@ -12152,7 +12759,7 @@ rk_ftl_garbage_collect:
 	str	r2, [r1, #12]
 	ldrh	r2, [r7]
 	strh	r2, [r1, #2]	@ movhi
-	ldr	r2, .L1637+24
+	ldr	r2, .L1717+24
 	str	r3, [r8]
 	ldr	r2, [r2]
 	str	r2, [r1, #4]
@@ -12161,133 +12768,184 @@ rk_ftl_garbage_collect:
 	ldrb	r2, [r7, #7]	@ zero_extendqisi2
 	ldr	r3, [r8]
 	cmp	r2, r3
-	beq	.L1578
+	beq	.L1655
 	ldrh	r3, [r7, #4]
-	cbnz	r3, .L1576
-.L1578:
+	cbnz	r3, .L1653
+.L1655:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	r0, .L1576
-.L1632:
-	ldr	r3, .L1637+28
+	cbz	r0, .L1653
+	ldr	r3, .L1717+28
 	movs	r2, #0
 	str	r2, [r3]
-	b	.L1631
-.L1576:
-	ldr	r3, [sp, #20]
+	b	.L1712
+.L1653:
+	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	b	.L1628
-.L1580:
-	ldrh	r3, [r6, #2]
+	b	.L1709
+.L1657:
+	ldrh	r3, [fp, #2]
 	add	r4, r4, r3
-	ldr	r3, [sp, #28]
+	ldr	r3, [sp, #20]
 	uxth	r4, r4
 	cmp	r3, r4
-	strh	r4, [r6, #2]	@ movhi
-	bls	.L1582
-	ldr	r3, .L1637+12
-	ldrh	r2, [r3]
-	ldr	r3, .L1637+32
-	ldrh	r3, [r3]
-	cmp	r2, r3
-	bne	.L1583
-.L1582:
-	ldr	r3, .L1637+36
+	strh	r4, [fp, #2]	@ movhi
+	ldr	r4, .L1717+28
+	bhi	.L1659
+	ldr	r3, .L1717+32
 	ldr	r3, [r3]
-	cbz	r3, .L1584
+	cbz	r3, .L1660
 	bl	Ftl_gc_temp_data_write_back
-	cmp	r0, #0
-	bne	.L1632
-.L1584:
-	ldr	r3, .L1637+12
+	cbz	r0, .L1660
+	movs	r3, #0
+	str	r3, [r4]
+	b	.L1712
+.L1660:
+	ldr	r3, .L1717+12
 	ldrh	r1, [r3]
-	cbnz	r1, .L1585
-	ldr	r3, .L1637+40
-	ldrh	r2, [r6]
+	cbnz	r1, .L1661
+	ldr	r3, .L1717+36
+	ldrh	r2, [fp]
 	ldr	r3, [r3]
 	ldrh	r0, [r3, r2, lsl #1]
-	cbz	r0, .L1585
+	cbz	r0, .L1661
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldrh	r0, [r6]
+	ldrh	r0, [fp]
 	bl	update_vpc_list
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1585:
+.L1661:
 	movw	r3, #65535
-	strh	r3, [r6]	@ movhi
-.L1583:
-	ldr	r3, .L1637+44
+	strh	r3, [fp]	@ movhi
+.L1659:
+	movs	r3, #0
+	str	r3, [r4]
+	ldr	r3, .L1717+40
 	ldrh	r3, [r3]
 	cmp	r3, #2
-	bhi	.L1586
-	ldr	r3, .L1637+48
+	bhi	.L1662
+	ldr	r3, .L1717+44
 	ldrh	r4, [r3]
-	b	.L1558
-.L1586:
-	ldr	r2, .L1637+28
-	movs	r1, #0
-	str	r1, [r2]
-	ldr	r2, .L1637+52
+	b	.L1663
+.L1662:
+	ldr	r2, .L1717+48
 	ldrh	r0, [r2]
 	cmp	r0, #0
-	bne	.L1515
+	bne	.L1590
 	adds	r0, r3, #1
-	b	.L1515
-.L1590:
+	b	.L1590
+.L1667:
 	movs	r0, #0
-	b	.L1515
-.L1521:
-	cmp	r7, #0
-	beq	.L1588
-.L1531:
-	ldr	r3, .L1637+20
+	b	.L1590
+.L1596:
+	ldr	r3, [sp, #8]
+	cmp	r3, #0
+	beq	.L1665
+.L1606:
+	ldr	r3, .L1717+20
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1599
-.L1589:
-	ldr	r3, .L1637+56
+	bne	.L1676
+.L1666:
+	ldr	r3, .L1717+52
 	movw	r2, #65535
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bne	.L1599
+	bne	.L1676
 	cmp	r5, r3
-	bne	.L1599
+	bne	.L1676
 	ldrh	r3, [r6]
 	cmp	r3, r5
-	beq	.L1543
-.L1548:
+	beq	.L1618
+.L1623:
 	movw	r5, #65535
-.L1599:
+.L1676:
 	movs	r4, #1
-	b	.L1542
-.L1523:
-	cmp	r7, #0
-	beq	.L1588
+	b	.L1617
+.L1598:
+	ldr	r3, [sp, #8]
+	cmp	r3, #0
+	beq	.L1665
 	movw	r5, #65535
-	b	.L1589
-.L1522:
-	cmp	r7, #0
-	bne	.L1548
-	b	.L1588
-.L1638:
+	b	.L1666
+.L1597:
+	ldr	r3, [sp, #8]
+	cmp	r3, #0
+	bne	.L1623
+	b	.L1665
+.L1718:
 	.align	2
-.L1637:
+.L1717:
 	.word	.LANCHOR93
-	.word	.LANCHOR175
+	.word	.LANCHOR180
 	.word	.LC1
-	.word	.LANCHOR173
-	.word	.LANCHOR121
+	.word	.LANCHOR178
+	.word	.LANCHOR113
 	.word	.LANCHOR53
 	.word	.LANCHOR71
-	.word	.LANCHOR117
-	.word	.LANCHOR174
+	.word	.LANCHOR108
 	.word	.LANCHOR89
 	.word	.LANCHOR42
 	.word	.LANCHOR48
 	.word	.LANCHOR19
-	.word	.LANCHOR172
+	.word	.LANCHOR177
 	.word	.LANCHOR99
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
+	.section	.text.sftl_init,"ax",%progbits
+	.align	1
+	.global	sftl_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sftl_init, %function
+sftl_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, lr}
+	mov	r3, #-1
+	ldr	r4, .L1725
+	ldr	r1, .L1725+4
+	ldr	r0, .L1725+8
+	str	r3, [r4]
+	bl	printf
+	ldr	r0, .L1725+12
+	bl	FtlConstantsInit
+	bl	FtlMemInit
+	bl	FtlVariablesInit
+	ldr	r3, .L1725+16
+	ldrh	r0, [r3]
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlLoadBbt
+	cbnz	r0, .L1723
+	bl	FtlSysBlkInit
+	cbnz	r0, .L1723
+	movs	r3, #1
+	str	r3, [r4]
+	ldr	r3, .L1725+20
+	ldrh	r3, [r3]
+	cmp	r3, #15
+	bhi	.L1723
+	movw	r4, #8129
+.L1722:
+	movs	r1, #1
+	movs	r0, #0
+	bl	rk_ftl_garbage_collect
+	subs	r4, r4, #1
+	bne	.L1722
+.L1723:
+	movs	r0, #0
+	pop	{r4, pc}
+.L1726:
+	.align	2
+.L1725:
+	.word	.LANCHOR86
+	.word	.LC70
+	.word	.LC71
+	.word	.LANCHOR0
+	.word	.LANCHOR4
+	.word	.LANCHOR48
+	.size	sftl_init, .-sftl_init
 	.section	.text.sftl_gc,"ax",%progbits
 	.align	1
 	.global	sftl_gc
@@ -12320,32 +12978,32 @@ FtlRead:
 	sub	sp, sp, #56
 	mov	r6, r1
 	mov	r8, r3
-	str	r2, [sp, #32]
-	bne	.L1641
+	str	r2, [sp, #24]
+	bne	.L1729
 	mov	r2, r3
-	ldr	r1, [sp, #32]
+	ldr	r1, [sp, #24]
 	add	r0, r6, #256
 	bl	FtlVendorPartRead
 	str	r0, [sp, #4]
-.L1640:
+.L1728:
 	ldr	r0, [sp, #4]
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1641:
-	ldr	r3, [sp, #32]
+.L1729:
+	ldr	r3, [sp, #24]
 	adds	r3, r1, r3
 	str	r3, [sp, #12]
-	ldr	r3, .L1672
+	ldr	r3, .L1761
 	ldr	r2, [sp, #12]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1661
-	ldr	r3, .L1672+4
+	bhi	.L1750
+	ldr	r3, .L1761+4
 	ldr	r3, [r3]
-	adds	r0, r3, #1
-	beq	.L1662
-	ldr	r3, .L1672+8
+	adds	r4, r3, #1
+	beq	.L1751
+	ldr	r3, .L1761+8
 	mov	r0, r6
 	movs	r7, #0
 	mov	r5, r7
@@ -12358,62 +13016,67 @@ FtlRead:
 	subs	r0, r3, #1
 	bl	__aeabi_uidiv
 	ldr	r3, [sp, #16]
-	ldr	r2, .L1672+12
-	ldr	r4, [sp, #16]
+	ldr	r2, .L1761+12
+	ldr	r1, [sp, #24]
 	rsb	r3, r3, #1
-	str	r0, [sp, #20]
+	ldr	r4, [sp, #16]
 	add	r3, r3, r0
-	str	r7, [sp, #28]
+	str	r0, [sp, #20]
 	str	r3, [sp, #8]
-	ldr	r1, [sp, #8]
 	ldr	r3, [r2]
-	str	r7, [sp, #24]
+	str	r7, [sp, #32]
+	str	r7, [sp, #28]
+	add	r3, r3, r1
+	ldr	r1, [sp, #8]
+	str	r3, [r2]
+	ldr	r2, .L1761+16
 	str	r7, [sp, #4]
+	ldr	r3, [r2]
 	add	r3, r3, r1
 	str	r3, [r2]
-.L1643:
+.L1731:
 	ldr	r3, [sp, #8]
-	cbnz	r3, .L1659
-	ldr	r3, .L1672+16
+	cbnz	r3, .L1748
+	ldr	r3, .L1761+20
 	ldrh	r3, [r3]
-	cbnz	r3, .L1660
-	ldr	r3, .L1672+20
+	cbnz	r3, .L1749
+	ldr	r3, .L1761+24
 	ldrh	r3, [r3]
 	cmp	r3, #31
-	bhi	.L1640
-.L1660:
+	bhi	.L1728
+.L1749:
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
-	b	.L1640
-.L1659:
-	add	r1, sp, #52
+	b	.L1728
+.L1748:
 	movs	r2, #0
+	add	r1, sp, #52
 	mov	r0, r4
 	bl	log2phys
 	ldr	r3, [sp, #52]
-	adds	r1, r3, #1
-	bne	.L1644
-	ldr	fp, .L1672+8
+	adds	r0, r3, #1
+	bne	.L1732
+	ldr	fp, .L1761+8
 	mov	r10, #0
-.L1645:
+.L1733:
 	ldrh	r0, [fp]
 	cmp	r10, r0
-	bcc	.L1647
-.L1648:
+	bcc	.L1735
+.L1736:
 	ldr	r3, [sp, #8]
 	adds	r4, r4, #1
 	subs	r3, r3, #1
 	str	r3, [sp, #8]
-	beq	.L1652
-	ldr	r3, .L1672+24
+	beq	.L1740
+	ldr	r3, .L1761+28
 	ldrh	r3, [r3]
 	cmp	r5, r3, lsl #2
-	bne	.L1643
-.L1652:
+	bne	.L1731
+.L1740:
 	cmp	r5, #0
-	beq	.L1643
-	ldr	r3, .L1672+28
+	beq	.L1731
+	ldr	r3, .L1761+32
 	movs	r2, #0
 	mov	r1, r5
 	mov	r10, #0
@@ -12421,96 +13084,105 @@ FtlRead:
 	bl	FlashReadPages
 	lsls	r3, r7, #9
 	str	r3, [sp, #44]
-	ldr	r3, [sp, #24]
+	ldr	r3, [sp, #28]
 	lsls	r3, r3, #9
 	str	r3, [sp, #36]
-	ldr	r3, [sp, #28]
+	ldr	r3, [sp, #32]
 	lsls	r3, r3, #9
 	str	r3, [sp, #40]
-.L1658:
+.L1747:
 	movs	r3, #20
 	mul	fp, r3, r10
-	ldr	r3, .L1672+28
+	ldr	r3, .L1761+32
 	ldr	r2, [r3]
 	ldr	r3, [sp, #16]
 	add	r2, r2, fp
 	ldr	r1, [r2, #16]
 	cmp	r3, r1
-	bne	.L1654
+	bne	.L1742
 	ldr	r1, [r2, #8]
-	ldr	r2, .L1672+32
+	ldr	r2, .L1761+36
 	ldr	r2, [r2]
 	cmp	r1, r2
-	bne	.L1655
+	bne	.L1743
 	ldr	r3, [sp, #36]
 	mov	r0, r8
 	ldr	r2, [sp, #40]
 	add	r1, r1, r3
-.L1671:
+.L1760:
 	bl	ftl_memcpy
-.L1655:
-	ldr	r3, .L1672+28
-	ldr	r2, [r3]
-	ldr	r3, [r2, fp]
-	add	r1, r2, fp
-	adds	r2, r3, #1
-	bne	.L1656
-	ldr	r1, .L1672+36
+.L1743:
+	ldr	r3, .L1761+32
+	ldr	r3, [r3]
+	add	r2, r3, fp
+	ldr	r3, [r3, fp]
+	ldr	r0, [r2, #12]
+	ldr	r1, [r2, #16]
+	ldr	r0, [r0, #8]
+	cmp	r1, r0
+	itttt	ne
+	ldrne	r0, .L1761+40
+	ldrne	r1, [r0, #72]
+	addne	r1, r1, #1
+	strne	r1, [r0, #72]
+	adds	r1, r3, #1
+	bne	.L1745
+	ldr	r1, .L1761+40
 	str	r3, [sp, #4]
 	ldr	r2, [r1, #72]
 	adds	r2, r2, #1
 	str	r2, [r1, #72]
-.L1657:
+.L1746:
 	add	r10, r10, #1
 	cmp	r5, r10
-	bne	.L1658
+	bne	.L1747
 	movs	r5, #0
-	b	.L1643
-.L1647:
+	b	.L1731
+.L1735:
 	mla	r0, r0, r4, r10
 	cmp	r6, r0
-	bhi	.L1646
+	bhi	.L1734
 	ldr	r3, [sp, #12]
 	cmp	r3, r0
-	bls	.L1646
+	bls	.L1734
 	subs	r0, r0, r6
 	mov	r2, #512
 	movs	r1, #0
 	add	r0, r8, r0, lsl #9
 	bl	ftl_memset
-.L1646:
+.L1734:
 	add	r10, r10, #1
-	b	.L1645
-.L1644:
-	ldr	r2, .L1672+28
+	b	.L1733
+.L1732:
+	ldr	r2, .L1761+32
 	mov	r10, #20
 	ldr	r2, [r2]
 	mla	r10, r10, r5, r2
 	str	r3, [r10, #4]
 	ldr	r3, [sp, #16]
 	cmp	r4, r3
-	ldr	r3, .L1672+8
-	bne	.L1649
-	ldr	r2, .L1672+32
+	ldr	r3, .L1761+8
+	bne	.L1737
+	ldr	r2, .L1761+36
 	mov	r0, r6
 	ldrh	fp, [r3]
 	ldr	r2, [r2]
 	mov	r1, fp
 	str	r2, [r10, #8]
 	bl	__aeabi_uidivmod
-	ldr	r2, [sp, #32]
+	ldr	r2, [sp, #24]
 	sub	r3, fp, r1
-	str	r1, [sp, #24]
+	str	r1, [sp, #28]
 	cmp	r3, r2
 	it	cs
 	movcs	r3, r2
 	cmp	fp, r3
-	str	r3, [sp, #28]
-	bne	.L1650
+	str	r3, [sp, #32]
+	bne	.L1738
 	str	r8, [r10, #8]
-.L1650:
-	ldr	r3, .L1672+40
-	ldr	r2, .L1672+44
+.L1738:
+	ldr	r3, .L1761+44
+	ldr	r2, .L1761+48
 	str	r4, [r10, #16]
 	ldrh	r3, [r3]
 	ldr	r2, [r2]
@@ -12519,12 +13191,12 @@ FtlRead:
 	bic	r3, r3, #3
 	add	r3, r3, r2
 	str	r3, [r10, #12]
-	b	.L1648
-.L1649:
+	b	.L1736
+.L1737:
 	ldr	r2, [sp, #20]
 	cmp	r4, r2
-	bne	.L1651
-	ldr	r2, .L1672+48
+	bne	.L1739
+	ldr	r2, .L1761+52
 	ldr	r1, [sp, #12]
 	ldr	r2, [r2]
 	str	r2, [r10, #8]
@@ -12532,62 +13204,63 @@ FtlRead:
 	mul	r3, r2, r4
 	subs	r7, r1, r3
 	cmp	r2, r7
-	bne	.L1650
-.L1670:
+	bne	.L1738
+.L1759:
 	subs	r3, r3, r6
 	add	r3, r8, r3, lsl #9
 	str	r3, [r10, #8]
-	b	.L1650
-.L1651:
+	b	.L1738
+.L1739:
 	ldrh	r3, [r3]
 	muls	r3, r4, r3
-	b	.L1670
-.L1654:
+	b	.L1759
+.L1742:
 	ldr	r3, [sp, #20]
 	cmp	r3, r1
-	bne	.L1655
-	ldr	r3, .L1672+48
+	bne	.L1743
+	ldr	r3, .L1761+52
 	ldr	r1, [r2, #8]
 	ldr	r2, [r3]
 	cmp	r1, r2
-	bne	.L1655
-	ldr	r2, .L1672+8
+	bne	.L1743
+	ldr	r2, .L1761+8
 	ldr	r3, [sp, #20]
 	ldrh	r0, [r2]
 	ldr	r2, [sp, #44]
 	muls	r0, r3, r0
 	subs	r0, r0, r6
 	add	r0, r8, r0, lsl #9
-	b	.L1671
-.L1656:
+	b	.L1760
+.L1745:
 	cmp	r3, #256
-	bne	.L1657
-	ldr	r0, [r1, #4]
+	bne	.L1746
+	ldr	r0, [r2, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-	b	.L1657
-.L1661:
+	b	.L1746
+.L1750:
 	mov	r3, #-1
-.L1662:
+.L1751:
 	str	r3, [sp, #4]
-	b	.L1640
-.L1673:
+	b	.L1728
+.L1762:
 	.align	2
-.L1672:
+.L1761:
 	.word	.LANCHOR34
 	.word	.LANCHOR86
 	.word	.LANCHOR12
+	.word	.LANCHOR69
 	.word	.LANCHOR62
 	.word	.LANCHOR101
 	.word	.LANCHOR48
 	.word	.LANCHOR3
-	.word	.LANCHOR120
-	.word	.LANCHOR115
+	.word	.LANCHOR112
+	.word	.LANCHOR118
 	.word	.LANCHOR81
 	.word	.LANCHOR24
-	.word	.LANCHOR114
-	.word	.LANCHOR113
+	.word	.LANCHOR124
+	.word	.LANCHOR119
 	.size	FtlRead, .-FtlRead
 	.section	.text.sftl_read,"ax",%progbits
 	.align	1
@@ -12624,141 +13297,146 @@ FtlWrite:
 	str	r1, [sp, #4]
 	str	r2, [sp, #20]
 	str	r3, [sp, #16]
-	bne	.L1676
+	bne	.L1765
 	mov	r2, r3
 	ldr	r3, [sp, #4]
 	ldr	r1, [sp, #20]
 	add	r0, r3, #256
 	bl	FtlVendorPartWrite
-.L1675:
+.L1764:
 	add	sp, sp, #72
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1676:
+.L1765:
 	ldr	r3, [sp, #4]
 	ldr	r2, [sp, #20]
 	adds	r4, r3, r2
-	ldr	r3, .L1726
+	ldr	r3, .L1816
 	ldr	r3, [r3]
 	cmp	r4, r3
-	bhi	.L1712
-	ldr	r3, .L1726+4
+	bhi	.L1802
+	ldr	r3, .L1816+4
 	ldr	r0, [r3]
 	adds	r5, r0, #1
-	beq	.L1675
-	ldr	r3, .L1726+8
+	beq	.L1764
+	ldr	r3, .L1816+8
 	mov	r2, #2048
 	ldr	r0, [sp, #4]
 	str	r2, [r3]
-	ldr	r3, .L1726+12
+	ldr	r3, .L1816+12
 	ldrh	r5, [r3]
 	mov	r1, r5
 	bl	__aeabi_uidiv
 	mov	r1, r5
 	str	r0, [sp, #12]
 	subs	r0, r4, #1
-	ldr	r5, .L1726+16
+	ldr	r5, .L1816+16
 	bl	__aeabi_uidiv
 	ldr	r2, [sp, #12]
+	ldr	r1, [sp, #20]
 	str	r0, [sp, #28]
 	subs	r3, r0, r2
-	ldr	r2, .L1726+20
+	ldr	r2, .L1816+20
 	str	r3, [sp, #32]
 	adds	r3, r3, #1
 	str	r3, [sp, #8]
+	ldr	r3, [r2]
+	add	r3, r3, r1
 	ldr	r1, [sp, #8]
+	str	r3, [r2]
+	ldr	r2, .L1816+24
 	ldr	r3, [r2]
 	add	r3, r3, r1
 	str	r3, [r2]
-	ldr	r3, .L1726+24
+	ldr	r3, .L1816+28
 	ldr	r3, [r3]
-	cbz	r3, .L1678
+	cbz	r3, .L1767
 	ldrh	r2, [r5, #4]
-	ldr	r3, .L1726+28
+	ldr	r3, .L1816+32
 	cmp	r2, #0
 	it	eq
 	moveq	r5, r3
-.L1678:
+.L1767:
 	ldr	r6, [sp, #12]
-.L1679:
+.L1768:
 	ldr	r3, [sp, #8]
-	cbnz	r3, .L1708
-	ldr	r4, .L1726+32
+	cbnz	r3, .L1797
+	ldr	r5, .L1816+36
 	mov	r0, r3
 	ldr	r1, [sp, #32]
 	bl	rk_ftl_garbage_collect
-	ldrh	r2, [r4]
-	cmp	r2, #15
-	bls	.L1709
-.L1711:
+	ldrh	r2, [r5]
+	cmp	r2, #5
+	bls	.L1798
+.L1800:
 	movs	r0, #0
-	b	.L1675
-.L1708:
-	ldr	r3, .L1726+36
+	b	.L1764
+.L1797:
+	ldr	r3, .L1816+40
 	ldrb	r2, [r5, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1680
-	mov	r2, #988
-	ldr	r1, .L1726+40
-	ldr	r0, .L1726+44
+	bcc	.L1769
+	movw	r2, #1011
+	ldr	r1, .L1816+44
+	ldr	r0, .L1816+48
 	bl	printf
-.L1680:
+.L1769:
 	ldrh	r2, [r5, #4]
-	cbnz	r2, .L1681
-	ldr	r3, .L1726+16
-	ldr	r4, .L1726+24
+	cbnz	r2, .L1770
+	ldr	r3, .L1816+16
+	ldr	r4, .L1816+28
 	cmp	r5, r3
-	bne	.L1682
-	ldr	r0, .L1726+28
+	bne	.L1771
+	ldr	r0, .L1816+32
 	ldrh	r5, [r0, #4]
-	cbnz	r5, .L1683
+	cbnz	r5, .L1772
 	bl	allocate_new_data_superblock
 	str	r5, [r4]
-.L1683:
-	ldr	r0, .L1726+16
+.L1772:
+	ldr	r0, .L1816+16
 	bl	allocate_new_data_superblock
-	ldr	r5, .L1726+16
+	ldr	r5, .L1816+16
 	ldr	r2, [r4]
-	ldr	r3, .L1726+28
+	ldr	r3, .L1816+32
 	cmp	r2, #0
 	it	ne
 	movne	r5, r3
-.L1684:
+.L1773:
 	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1681
+	cbnz	r3, .L1770
 	mov	r0, r5
 	bl	allocate_new_data_superblock
-.L1681:
-	ldrb	r2, [r5, #7]	@ zero_extendqisi2
-	ldrh	r3, [r5, #4]
-	ldr	r1, [sp, #8]
-	lsls	r2, r2, #2
-	cmp	r3, r1
+.L1770:
+	ldrh	r2, [r5, #4]
+	ldr	r3, [sp, #8]
+	cmp	r2, r3
 	it	cs
-	movcs	r3, r1
+	movcs	r2, r3
+	ldrb	r3, [r5, #7]	@ zero_extendqisi2
+	lsls	r3, r3, #2
 	cmp	r2, r3
 	it	cs
 	movcs	r2, r3
-	ldr	r3, .L1726+36
+	ldr	r3, .L1816+40
 	str	r2, [sp, #44]
 	ldrb	r2, [r5, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1685
-	movw	r2, #1021
-	ldr	r1, .L1726+40
-	ldr	r0, .L1726+44
+	bcc	.L1774
+	movw	r2, #1044
+	ldr	r1, .L1816+44
+	ldr	r0, .L1816+48
 	bl	printf
-.L1685:
-	ldr	r8, .L1726+48
+.L1774:
+	ldr	r8, .L1816+52
 	mov	fp, #0
-.L1686:
+.L1775:
 	ldr	r3, [sp, #44]
 	cmp	fp, r3
-	bne	.L1706
-.L1687:
-	ldr	r0, .L1726+48
+	bne	.L1795
+.L1776:
+	ldr	r0, .L1816+52
 	mov	r3, r5
 	movs	r2, #0
 	mov	r1, fp
@@ -12766,30 +13444,30 @@ FtlWrite:
 	bl	FtlProgPages
 	ldr	r3, [sp, #8]
 	cmp	fp, r3
-	bls	.L1707
-	movw	r2, #1098
-	ldr	r1, .L1726+40
-	ldr	r0, .L1726+44
+	bls	.L1796
+	movw	r2, #1121
+	ldr	r1, .L1816+44
+	ldr	r0, .L1816+48
 	bl	printf
-.L1707:
+.L1796:
 	ldr	r3, [sp, #8]
 	sub	r3, r3, fp
 	str	r3, [sp, #8]
-	b	.L1679
-.L1682:
+	b	.L1768
+.L1771:
 	str	r2, [r4]
 	ldrh	r2, [r3, #4]
-	cbnz	r2, .L1717
+	cbnz	r2, .L1807
 	mov	r0, r5
 	bl	allocate_new_data_superblock
-	b	.L1684
-.L1717:
+	b	.L1773
+.L1807:
 	mov	r5, r3
-	b	.L1681
-.L1706:
+	b	.L1770
+.L1795:
 	ldrh	r2, [r5, #4]
 	cmp	r2, #0
-	beq	.L1687
+	beq	.L1776
 	movs	r2, #0
 	add	r1, sp, #48
 	mov	r0, r6
@@ -12798,7 +13476,7 @@ FtlWrite:
 	mov	r0, r5
 	mul	r7, r7, fp
 	bl	get_new_active_ppa
-	ldr	r3, .L1726+52
+	ldr	r3, .L1816+56
 	ldr	r1, [r8]
 	ldrh	r2, [r3]
 	add	r1, r1, r7
@@ -12806,7 +13484,7 @@ FtlWrite:
 	str	r6, [r1, #16]
 	mul	r0, r2, fp
 	bic	r3, r0, #3
-	ldr	r0, .L1726+56
+	ldr	r0, .L1816+60
 	str	r3, [sp, #36]
 	ldr	r3, [r0]
 	ldr	r0, [sp, #36]
@@ -12817,12 +13495,12 @@ FtlWrite:
 	movs	r1, #0
 	bl	ftl_memset
 	ldr	r3, [sp, #12]
-	ldr	r2, .L1726+12
+	ldr	r2, .L1816+12
 	cmp	r6, r3
-	beq	.L1688
+	beq	.L1777
 	ldr	r3, [sp, #28]
 	cmp	r6, r3
-	bne	.L1721
+	bne	.L1812
 	ldrh	r2, [r2]
 	ldr	r3, [sp, #4]
 	ldr	r1, [sp, #20]
@@ -12832,8 +13510,8 @@ FtlWrite:
 	subs	r4, r4, r2
 	str	r3, [sp, #24]
 	uxth	r4, r4
-	b	.L1691
-.L1688:
+	b	.L1780
+.L1777:
 	ldrh	r4, [r2]
 	ldr	r0, [sp, #4]
 	mov	r1, r4
@@ -12844,13 +13522,13 @@ FtlWrite:
 	cmp	r4, r3
 	it	cs
 	movcs	r4, r3
-.L1691:
-	ldr	r2, .L1726+12
+.L1780:
+	ldr	r2, .L1816+12
 	ldr	r3, [sp, #12]
 	ldrh	r2, [r2]
 	cmp	r4, r2
 	ldr	r2, [r8]
-	bne	.L1692
+	bne	.L1781
 	cmp	r6, r3
 	add	r7, r7, r2
 	ittet	ne
@@ -12863,23 +13541,23 @@ FtlWrite:
 	streq	r3, [r7, #8]
 	addne	r4, r3, r4, lsl #9
 	strne	r4, [r7, #8]
-.L1694:
-	ldr	r3, .L1726+36
+.L1783:
+	ldr	r3, .L1816+40
 	ldrb	r1, [r5, #6]	@ zero_extendqisi2
 	ldrh	r2, [r3]
 	cmp	r1, r2
-	bcc	.L1703
-	movw	r2, #1089
-	ldr	r1, .L1726+40
-	ldr	r0, .L1726+44
+	bcc	.L1792
+	mov	r2, #1112
+	ldr	r1, .L1816+44
+	ldr	r0, .L1816+48
 	bl	printf
-.L1703:
+.L1792:
 	ldr	r3, [sp, #40]
 	movw	r2, #61589
 	ldr	r1, [sp, #36]
 	add	fp, fp, #1
 	strh	r2, [r3, r1]	@ movhi
-	ldr	r1, .L1726+60
+	ldr	r1, .L1816+64
 	str	r6, [r10, #8]
 	adds	r6, r6, #1
 	ldr	r2, [r1]
@@ -12893,37 +13571,38 @@ FtlWrite:
 	str	r2, [r10, #12]
 	ldrh	r2, [r5]
 	strh	r2, [r10, #2]	@ movhi
-	b	.L1686
-.L1727:
+	b	.L1775
+.L1817:
 	.align	2
-.L1726:
+.L1816:
 	.word	.LANCHOR34
 	.word	.LANCHOR86
-	.word	.LANCHOR176
+	.word	.LANCHOR181
 	.word	.LANCHOR12
 	.word	.LANCHOR51
+	.word	.LANCHOR68
 	.word	.LANCHOR64
-	.word	.LANCHOR177
+	.word	.LANCHOR182
 	.word	.LANCHOR52
 	.word	.LANCHOR48
 	.word	.LANCHOR3
-	.word	.LANCHOR178
+	.word	.LANCHOR183
 	.word	.LC1
-	.word	.LANCHOR122
-	.word	.LANCHOR24
 	.word	.LANCHOR114
+	.word	.LANCHOR24
+	.word	.LANCHOR124
 	.word	.LANCHOR71
-.L1692:
+.L1781:
 	cmp	r6, r3
 	add	r2, r2, r7
 	ite	eq
-	ldreq	r1, .L1728
-	ldrne	r1, .L1728+4
+	ldreq	r1, .L1818
+	ldrne	r1, .L1818+4
 	ldr	r1, [r1]
 	str	r1, [r2, #8]
 	ldr	r2, [sp, #48]
 	adds	r1, r2, #1
-	beq	.L1697
+	beq	.L1786
 	str	r2, [sp, #56]
 	add	r0, sp, #52
 	ldr	r2, [r8]
@@ -12938,56 +13617,56 @@ FtlWrite:
 	bl	FlashReadPages
 	ldr	r2, [sp, #52]
 	adds	r2, r2, #1
-	bne	.L1698
-	ldr	r1, .L1728+8
+	bne	.L1787
+	ldr	r1, .L1818+8
 	ldr	r2, [r1, #72]
 	adds	r2, r2, #1
 	str	r2, [r1, #72]
-.L1701:
+.L1790:
 	ldr	r3, [sp, #12]
 	lsls	r2, r4, #9
 	cmp	r6, r3
-	bne	.L1702
+	bne	.L1791
 	ldr	r1, [r8]
 	ldr	r3, [sp, #24]
 	add	r7, r7, r1
 	ldr	r1, [sp, #16]
 	ldr	r0, [r7, #8]
 	add	r0, r0, r3, lsl #9
-.L1724:
+.L1814:
 	bl	ftl_memcpy
-	b	.L1694
-.L1698:
+	b	.L1783
+.L1787:
 	ldr	r1, [r10, #8]
 	cmp	r6, r1
-	beq	.L1700
-	ldr	r0, .L1728+8
+	beq	.L1789
+	ldr	r0, .L1818+8
 	ldr	r2, [r0, #72]
 	adds	r2, r2, #1
 	str	r2, [r0, #72]
 	mov	r2, r6
-	ldr	r0, .L1728+12
+	ldr	r0, .L1818+12
 	bl	printf
-.L1700:
+.L1789:
 	ldr	r2, [r10, #8]
 	cmp	r6, r2
-	beq	.L1701
-	movw	r2, #1074
-	ldr	r1, .L1728+16
-	ldr	r0, .L1728+20
+	beq	.L1790
+	movw	r2, #1097
+	ldr	r1, .L1818+16
+	ldr	r0, .L1818+20
 	bl	printf
-	b	.L1701
-.L1697:
+	b	.L1790
+.L1786:
 	ldr	r2, [r8]
 	movs	r1, #0
 	adds	r0, r2, r7
-	ldr	r2, .L1728+24
+	ldr	r2, .L1818+24
 	ldr	r0, [r0, #8]
 	ldrh	r2, [r2]
 	bl	ftl_memset
-	b	.L1701
-.L1702:
-	ldr	r1, .L1728+28
+	b	.L1790
+.L1791:
+	ldr	r1, .L1818+28
 	ldr	r3, [sp, #4]
 	ldr	r0, [r8]
 	ldrh	r1, [r1]
@@ -12997,8 +13676,8 @@ FtlWrite:
 	subs	r1, r1, r3
 	ldr	r3, [sp, #16]
 	add	r1, r3, r1, lsl #9
-	b	.L1724
-.L1721:
+	b	.L1814
+.L1812:
 	ldrh	r2, [r2]
 	ldr	r3, [sp, #4]
 	ldr	r1, [r8]
@@ -13008,49 +13687,52 @@ FtlWrite:
 	ldr	r3, [sp, #16]
 	add	r2, r3, r2, lsl #9
 	str	r2, [r7, #8]
-	b	.L1694
-.L1709:
-	ldr	r5, .L1728+32
-	ldr	r6, .L1728+36
-.L1722:
-	ldrh	r3, [r5]
+	b	.L1783
+.L1798:
+	ldr	r6, .L1818+32
+	mov	r4, #256
+	ldr	r7, .L1818+36
+.L1801:
+	ldrh	r3, [r6]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1710
-	ldrh	r2, [r6]
+	bne	.L1799
+	ldrh	r2, [r7]
 	cmp	r2, r3
-	bne	.L1710
+	bne	.L1799
 	movs	r0, #0
 	bl	List_get_gc_head_node
 	uxth	r0, r0
 	bl	FtlGcRefreshBlock
-.L1710:
-	ldr	r2, .L1728+40
+.L1799:
+	ldr	r2, .L1818+40
 	movs	r3, #128
 	movs	r1, #1
 	mov	r0, r1
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L1728+44
+	ldr	r2, .L1818+44
 	strh	r3, [r2]	@ movhi
 	bl	rk_ftl_garbage_collect
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
-	ldrh	r3, [r4]
-	cmp	r3, #8
-	bls	.L1722
-	b	.L1711
-.L1712:
+	ldrh	r3, [r5]
+	cmp	r3, #2
+	bhi	.L1800
+	subs	r4, r4, #1
+	bne	.L1801
+	b	.L1800
+.L1802:
 	mov	r0, #-1
-	b	.L1675
-.L1729:
-	.align	2
-.L1728:
-	.word	.LANCHOR115
-	.word	.LANCHOR113
+	b	.L1764
+.L1819:
+	.align	2
+.L1818:
+	.word	.LANCHOR118
+	.word	.LANCHOR119
 	.word	.LANCHOR81
-	.word	.LC108
-	.word	.LANCHOR178
+	.word	.LC113
+	.word	.LANCHOR183
 	.word	.LC1
 	.word	.LANCHOR23
 	.word	.LANCHOR12
@@ -13069,743 +13751,570 @@ FtlWrite:
 	.fpu softvfp
 	.type	sftl_write, %function
 sftl_write:
-	@ args = 0, pretend = 0, frame = 112
+	@ args = 0, pretend = 0, frame = 128
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	adds	r4, r0, r1
 	subs	r5, r4, #1
-	sub	sp, sp, #120
+	sub	sp, sp, #136
 	cmp	r5, #63
-	str	r0, [sp, #8]
-	str	r1, [sp, #16]
-	str	r2, [sp, #36]
-	ldr	r6, .L1762
-	bls	.L1731
+	mov	fp, r0
+	str	r1, [sp, #24]
+	str	r2, [sp, #44]
+	bls	.L1821
 	cmp	r0, #576
-	bls	.L1732
-.L1731:
-	ldr	r3, [r6]
-	cmp	r3, #0
-	beq	.L1733
-	ldr	r2, .L1762+4
-	mov	r0, #512
-	ldrh	r3, [r2, #14]
-	str	r3, [sp, #20]
-	ldrh	r3, [r2, #10]
-	ldrb	r1, [sp, #20]	@ zero_extendqisi2
-	smulbb	r3, r3, r1
-	uxth	r3, r3
-	mov	r1, r3
-	str	r3, [sp, #24]
-	bl	__aeabi_uidiv
-	ldr	r2, .L1762+8
+	bls	.L1822
+.L1821:
+	ldr	r3, .L1863
+	ldr	r3, [r3]
+	cbz	r3, .L1823
+	ldr	r3, .L1863+4
+	ldr	r10, [r3]
+	ldr	r3, .L1863+8
+	ldr	r2, [r10]
+	cmp	r2, r3
+	beq	.L1824
+.L1841:
+	ldr	r3, .L1863
+	movs	r2, #0
+	str	r2, [r3]
+	ldr	r3, .L1863+4
+	ldr	r0, [r3]
+	bl	free
+	ldr	r3, .L1863+12
+	ldr	r0, [r3]
+	bl	free
+.L1823:
+	ldr	r3, [sp, #44]
+	mov	r1, fp
+	ldr	r2, [sp, #24]
+	movs	r0, #0
+	bl	FtlWrite
+	add	sp, sp, #136
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1824:
+	ldr	r3, .L1863+16
+	add	r0, r10, #262144
+	movw	r2, #65535
+	ldrh	r4, [r3, #14]
+	ldrh	r5, [r3, #10]
 	movs	r3, #0
-	ldr	r1, .L1762+12
-	str	r0, [sp, #12]
-	sub	r4, r2, #262144
-.L1737:
-	ldr	r0, [r2, #-4]
-	cmp	r0, #0
-	beq	.L1734
-.L1738:
+.L1828:
+	ldr	r1, [r0, #-4]
+	cbnz	r1, .L1825
+	ldr	r1, [r10, r3, lsl #2]
+	adds	r3, r3, #1
+	cmp	r3, #4096
+	add	r2, r2, #-1
+	it	hi
+	movhi	r3, #0
+	cmp	r2, #4096
+	str	r1, [r0, #-4]!
+	bne	.L1828
+	mov	r3, #512
+	str	r3, [sp, #12]
+	b	.L1827
+.L1825:
+	add	r3, r2, #127
+	ldr	r0, .L1863+20
+	lsrs	r3, r3, #7
+	str	r3, [sp, #12]
+	bl	printf
+.L1827:
+	uxtb	r4, r4
+	mov	r8, #0
+	smulbb	r5, r4, r5
+	uxth	r3, r5
+	ldr	r5, .L1863+24
+	str	r3, [sp, #16]
+	subs	r0, r3, #1
+	mov	r1, r3
 	ldr	r3, [sp, #12]
-	movs	r4, #0
-	ldr	r2, [sp, #24]
-	ldr	r6, .L1762+16
-	str	r4, [sp, #28]
+	add	r0, r0, r3
+	bl	__aeabi_uidiv
+	ldr	r2, [sp, #16]
+	mov	r3, r0
+	str	r0, [sp, #20]
+	str	r0, [sp, #40]
+	str	r8, [sp, #32]
 	muls	r3, r2, r3
-	str	r3, [sp, #48]
+	str	r3, [sp, #28]
 	ldr	r3, [sp, #12]
-	str	r3, [sp, #32]
-.L1735:
+	lsls	r3, r3, #7
+	str	r3, [sp, #56]
+	b	.L1840
+.L1848:
+	str	r3, [sp, #40]
+.L1840:
+	ldr	r3, .L1863+12
 	mov	r2, #512
 	movs	r1, #0
-	ldr	r0, .L1762+20
+	ldr	r0, [r3]
 	bl	memset
-	ldr	r3, .L1762+4
-	mov	r0, r4
+	ldr	r3, .L1863+16
+	mov	r0, r8
 	ldrh	r7, [r3, #14]
 	mov	r1, r7
-	uxtb	r8, r7
-	uxth	r3, r8
-	str	r3, [sp, #40]
-	ldr	r3, .L1762+4
-	ldrh	r5, [r3, #10]
-	ldrh	r3, [sp, #40]
-	smulbb	r5, r5, r3
+	uxtb	r6, r7
+	uxth	r3, r6
+	str	r3, [sp, #36]
+	ldr	r3, .L1863+16
+	ldrh	r4, [r3, #10]
+	ldrh	r3, [sp, #36]
+	smulbb	r4, r4, r3
 	bl	__aeabi_uidiv
-	uxth	r5, r5
+	ldr	r3, [r5, #4]
 	mov	r1, r0
-	ldr	r3, [r6, #4]
 	movs	r0, #0
+	uxth	r4, r4
 	blx	r3
-	cmp	r5, #512
-	bcs	.L1739
+	ldr	r3, [sp, #28]
+	cmp	r3, r4
+	bls	.L1829
 	mov	r1, r7
-	adds	r0, r5, r4
+	add	r0, r4, r8
 	bl	__aeabi_uidiv
-	ldr	r3, [r6, #4]
+	ldr	r3, [r5, #4]
 	mov	r1, r0
 	movs	r0, #0
 	blx	r3
-.L1739:
-	mov	r1, r5
-	mov	r0, r4
+.L1829:
+	mov	r1, r4
+	mov	r0, r8
+	movs	r4, #0
 	bl	__aeabi_uidivmod
-	movs	r5, #0
-	mov	r10, r1
-	subs	r3, r4, r1
-	str	r3, [sp, #44]
-.L1740:
-	cmp	r5, #512
-	bcc	.L1741
-	ldr	r3, .L1762+4
-	mov	r0, r4
-	movs	r5, #0
-	ldrb	r8, [r3, #14]	@ zero_extendqisi2
-	uxth	r3, r8
-	str	r3, [sp, #40]
-	ldr	r3, .L1762+4
+	sub	r3, r8, r1
+	str	r1, [sp, #48]
+	str	r3, [sp, #52]
+.L1830:
+	ldr	r3, [sp, #28]
+	cmp	r3, r4
+	bhi	.L1831
+	ldr	r3, .L1863+12
+	mov	r0, r8
+	movs	r4, #0
+	ldr	r3, [r3]
+	str	r3, [sp, #52]
+	ldr	r3, .L1863+16
+	ldrb	r7, [r3, #14]	@ zero_extendqisi2
+	uxth	r3, r7
+	str	r3, [sp, #48]
+	ldr	r3, .L1863+16
 	ldrh	r1, [r3, #10]
-	ldrh	r3, [sp, #40]
+	ldrh	r3, [sp, #48]
 	smulbb	r1, r1, r3
 	uxth	r1, r1
 	bl	__aeabi_uidivmod
-	mov	fp, r1
-	subs	r3, r4, r1
-	uxth	r0, fp
-	mov	r1, r8
-	str	r3, [sp, #44]
+	str	r1, [sp, #36]
+	sub	r3, r8, r1
+	ldrh	r0, [sp, #36]
+	mov	r1, r7
+	str	r3, [sp, #60]
 	bl	__aeabi_idivmod
-	uxth	r7, r1
-.L1742:
-	cmp	r5, #512
-	bcs	.L1746
-	ldr	r3, [sp, #40]
-	mov	r1, r8
-	add	r0, fp, r5
-	sub	r10, r3, r7
-	ldr	r3, .L1762+20
-	uxth	r10, r10
-	add	r2, r3, r5, lsl #9
-	str	r2, [sp, #52]
+	uxth	r6, r1
+.L1832:
+	ldr	r3, [sp, #12]
+	cmp	r4, r3
+	bcs	.L1836
+	ldr	r3, [sp, #48]
+	mov	r1, r7
+	subs	r3, r3, r6
+	uxth	r3, r3
+	str	r3, [sp, #64]
+	ldr	r3, [sp, #52]
+	add	r2, r3, r4, lsl #9
+	ldr	r3, [sp, #36]
+	str	r2, [sp, #68]
+	adds	r0, r3, r4
 	bl	__aeabi_uidiv
-	ldr	r3, [sp, #44]
+	ldr	r3, [sp, #60]
 	uxth	r0, r0
-	mov	r1, r8
-	add	r7, r7, r3
-	mla	r0, r8, r0, r7
+	mov	r1, r7
+	add	r6, r6, r3
+	mla	r0, r7, r0, r6
 	bl	__aeabi_uidiv
-	ldr	r7, [r6, #12]
+	ldr	r6, [r5, #12]
 	mov	r1, r0
-	add	r3, sp, #56
-	ldr	r2, [sp, #52]
+	add	r3, sp, #72
+	ldr	r2, [sp, #68]
 	movs	r0, #0
-	blx	r7
+	blx	r6
 	adds	r0, r0, #1
-	bne	.L1743
-.L1746:
-	ldr	r3, .L1762+24
-	movs	r5, #0
-.L1744:
-	ldr	r2, .L1762+20
-	mov	r7, r3
-	adds	r3, r3, #4
-	ldr	r1, [r2, r5, lsl #2]
-	ldr	r2, [r7]
-	cmp	r1, r2
-	beq	.L1747
+	bne	.L1833
+.L1836:
+	ldr	r3, .L1863+12
+	mov	r1, r10
+	movs	r4, #0
+	ldr	r0, [r3]
+.L1834:
+	mov	r7, r1
+	ldr	r2, [r0, r4, lsl #2]
+	ldr	r3, [r7]
+	lsls	r6, r4, #2
+	adds	r1, r1, #4
+	cmp	r2, r3
+	beq	.L1837
 	mov	r2, #512
 	movs	r1, #0
-	ldr	r0, .L1762+20
 	bl	memset
-	ldr	r2, .L1762+20
-	mov	r1, r4
-	str	r5, [sp]
+	ldr	r3, .L1863+12
+	mov	r1, r8
+	ldr	r0, .L1863+28
+	ldr	r2, [r3]
+	str	r4, [sp]
 	ldr	r3, [r7]
-	ldr	r2, [r2, r5, lsl #2]
-	ldr	r0, .L1762+28
+	ldr	r2, [r2, r6]
 	bl	printf
-	ldr	r1, [sp, #20]
-	mov	r0, r4
-	bl	__aeabi_uidiv
-	ldr	r3, [r6, #4]
-	mov	r1, r0
+	ldr	r3, [r5, #4]
+	mov	r1, r8
 	movs	r0, #0
 	blx	r3
-	ldr	r3, [sp, #12]
+	ldr	r3, [sp, #20]
 	cmp	r3, #1
-	bls	.L1748
-	ldr	r3, [sp, #24]
-	ldr	r1, [sp, #20]
-	adds	r0, r3, r4
-	bl	__aeabi_uidiv
-	ldr	r3, [r6, #4]
-	mov	r1, r0
+	bls	.L1847
+	ldr	r2, [sp, #16]
 	movs	r0, #0
+	ldr	r3, [r5, #4]
+	add	r1, r2, r8
 	blx	r3
-.L1748:
-	ldr	r2, [sp, #32]
-	ldr	r3, [sp, #12]
+.L1847:
+	ldr	r2, [sp, #40]
+	ldr	r3, [sp, #20]
 	add	r3, r3, r2
-	ldr	r2, [sp, #48]
-	add	r4, r4, r2
-	ldr	r2, [sp, #32]
+	ldr	r2, [sp, #28]
+	add	r8, r8, r2
+	ldr	r2, [sp, #40]
 	cmp	r2, #15
-	bls	.L1754
-.L1753:
-	ldr	r3, .L1762
-	movs	r2, #0
-	str	r2, [r3]
-.L1733:
-	ldr	r3, [sp, #36]
-	movs	r0, #0
-	ldr	r2, [sp, #16]
-	ldr	r1, [sp, #8]
-	bl	FtlWrite
-	add	sp, sp, #120
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1734:
-	ldr	r0, [r4, r3, lsl #2]
-	adds	r3, r3, #1
-	cmp	r3, #4096
-	it	hi
-	movhi	r3, #0
-	str	r0, [r2, #-4]!
-	cmp	r1, r2
-	bne	.L1737
-	b	.L1738
-.L1754:
-	str	r3, [sp, #32]
-	b	.L1735
-.L1741:
-	mov	r1, r8
-	add	r0, r10, r5
+	bls	.L1848
+	b	.L1841
+.L1831:
+	ldr	r3, [sp, #48]
+	mov	r1, r6
+	adds	r0, r3, r4
 	bl	__aeabi_uidiv
-	uxth	fp, r0
-	mov	r1, r8
-	ldr	r0, [sp, #44]
-	mul	r3, r8, fp
-	str	r3, [sp, #56]
+	uxth	r3, r0
+	add	r2, r10, r4, lsl #9
+	ldr	r0, [sp, #52]
+	mov	r7, r3
+	muls	r3, r6, r3
+	mov	r1, r6
+	str	r2, [sp, #60]
+	str	r3, [sp, #72]
 	movw	r3, #61424
-	str	r3, [sp, #60]
-	ldr	r3, .L1762+24
-	add	r2, r3, r5, lsl #9
-	str	r2, [sp, #52]
+	str	r3, [sp, #76]
 	bl	__aeabi_uidiv
-	add	r3, sp, #56
-	add	r1, r0, fp
-	ldr	r2, [sp, #52]
+	add	r3, sp, #72
+	adds	r1, r0, r7
+	ldr	r2, [sp, #60]
 	movs	r0, #0
-	ldr	r7, [r6, #8]
+	ldr	r7, [r5, #8]
 	blx	r7
-	ldr	r3, [sp, #40]
-	add	r5, r5, r3
-	uxth	r5, r5
-	b	.L1740
-.L1743:
-	add	r5, r5, r10
-	movs	r7, #0
-	uxth	r5, r5
-	b	.L1742
-.L1747:
-	adds	r5, r5, #1
-	cmp	r5, #65536
-	bne	.L1744
-	ldr	r3, [sp, #28]
+	ldr	r3, [sp, #36]
+	add	r4, r4, r3
+	uxth	r4, r4
+	b	.L1830
+.L1833:
+	ldr	r3, [sp, #64]
+	movs	r6, #0
+	add	r3, r3, r4
+	uxth	r4, r3
+	b	.L1832
+.L1837:
+	ldr	r3, [sp, #56]
+	adds	r4, r4, #1
+	cmp	r4, r3
+	bne	.L1834
+	ldr	r3, [sp, #32]
 	adds	r3, r3, #1
 	cmp	r3, #5
-	str	r3, [sp, #28]
-	bls	.L1748
-	b	.L1753
-.L1732:
-	ldr	r3, [sp, #8]
-	ldr	r0, .L1762+24
-	cmp	r3, #63
-	bhi	.L1750
-	rsb	r1, r3, #64
-	ldr	r3, [sp, #16]
+	str	r3, [sp, #32]
+	bls	.L1847
+	b	.L1841
+.L1822:
+	cmp	r0, #64
+	ldr	r6, .L1863+4
+	bne	.L1842
+	mov	r0, #262144
+	bl	ftl_malloc
+	str	r0, [r6]
+	mov	r0, #262144
+	bl	ftl_malloc
+	ldr	r3, .L1863+12
+	str	r0, [r3]
+	ldr	r3, [r6]
+	cbz	r3, .L1843
+	cbz	r0, .L1843
+	ldr	r2, .L1863
+	movs	r1, #1
+	mov	r0, r3
+	str	r1, [r2]
+	mov	r2, #262144
+	movs	r1, #0
+	bl	ftl_memset
+.L1842:
+	cmp	fp, #63
+	ldr	r0, [r6]
+	bhi	.L1844
+	ldr	r3, [sp, #24]
+	rsb	r1, fp, #64
 	subs	r2, r3, r1
-	ldr	r3, [sp, #36]
-	add	r1, r3, r1, lsl #9
-.L1751:
-	movs	r3, #1
+	ldr	r3, [sp, #44]
+	add	r1, r3, r1, lsl #9
+.L1845:
 	cmp	r5, #576
-	str	r3, [r6]
 	ittt	hi
 	subhi	r2, r2, r4
 	mvnhi	r3, #446
 	addhi	r2, r2, r3
 	lsls	r2, r2, #9
-	bl	memcpy
-	b	.L1733
-.L1750:
-	ldr	r2, [sp, #8]
-	ldr	r3, .L1762+32
-	ldr	r1, [sp, #36]
-	add	r3, r3, r2
-	ldr	r2, [sp, #16]
-	add	r0, r0, r3, lsl #9
-	b	.L1751
-.L1763:
-	.align	2
-.L1762:
-	.word	.LANCHOR179
+	bl	ftl_memcpy
+	b	.L1823
+.L1864:
+	.align	2
+.L1863:
+	.word	.LANCHOR184
+	.word	.LANCHOR185
+	.word	-52655045
+	.word	.LANCHOR186
 	.word	.LANCHOR0
-	.word	idb_buf+262144
-	.word	idb_buf+16388
+	.word	.LC114
 	.word	.LANCHOR105
-	.word	gp_flash_check_buf
-	.word	idb_buf
-	.word	.LC109
-	.word	8388544
-	.size	sftl_write, .-sftl_write
-	.section	.text.FtlLoadSysInfo,"ax",%progbits
-	.align	1
-	.global	FtlLoadSysInfo
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlLoadSysInfo, %function
-FtlLoadSysInfo:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r1, #0
-	ldr	r8, .L1785+136
-	ldr	r5, .L1785
-	ldr	r3, [r8]
-	ldr	r4, .L1785+4
-	ldr	r10, .L1785+140
-	ldrh	r2, [r5]
-	ldr	r7, .L1785+8
-	str	r3, [r4, #8]
-	ldr	r6, .L1785+12
-	ldr	r3, [r10]
-	lsls	r2, r2, #1
-	ldr	r0, [r7]
-	str	r3, [r4, #12]
-	bl	ftl_memset
-	ldrh	r0, [r6]
-	movw	r3, #65535
-	str	r7, [sp]
-	cmp	r0, r3
-	bne	.L1765
-.L1773:
-	mov	r0, #-1
-.L1764:
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1765:
-	movs	r1, #1
-	mov	fp, r4
-	bl	FtlGetLastWrittenPage
-	ldr	r3, .L1785+16
-	sxth	r7, r0
-	adds	r0, r0, #1
-	strh	r0, [r6, #2]	@ movhi
-.L1767:
-	cmp	r7, #0
-	bge	.L1770
-	movw	r2, #1437
-	ldr	r1, .L1785+20
-	ldr	r0, .L1785+24
-	bl	printf
-.L1769:
-	ldr	r2, .L1785+28
-	ldrh	r3, [r5]
-	ldrh	r2, [r2]
-	adds	r3, r3, #24
-	cmp	r2, r3, lsl #1
-	bcs	.L1772
-	movw	r2, #1439
-	ldr	r1, .L1785+20
-	ldr	r0, .L1785+24
-	bl	printf
-.L1772:
-	ldr	r7, .L1785+32
-	movs	r2, #48
-	ldr	r1, [r4, #8]
-	mov	r0, r7
-	bl	ftl_memcpy
-	ldrh	r2, [r5]
-	ldr	r1, [r4, #8]
-	ldr	r3, [sp]
-	lsls	r2, r2, #1
-	adds	r1, r1, #48
-	ldr	r0, [r3]
-	bl	ftl_memcpy
-	ldrh	r1, [r5]
-	ldr	r3, [r4, #8]
-	mov	r4, r7
-	lsrs	r2, r1, #3
-	adds	r1, r1, #24
-	lsls	r1, r1, #1
-	adds	r2, r2, #4
-	bic	r1, r1, #3
-	add	r1, r1, r3
-	ldr	r3, .L1785+36
-	ldr	r0, [r3]
-	bl	ftl_memcpy
-	ldr	r2, [r7]
-	ldr	r3, .L1785+16
-	cmp	r2, r3
-	bne	.L1773
-	ldr	r3, .L1785+40
-	ldrb	r2, [r7, #10]	@ zero_extendqisi2
-	ldrh	r5, [r7, #8]
-	ldrh	r3, [r3]
-	strh	r5, [r6, #6]	@ movhi
-	cmp	r2, r3
-	bne	.L1773
-	ldr	r3, .L1785+44
-	ldr	r2, .L1785+48
-	str	r5, [r3]
-	ldr	r3, .L1785+52
-	ldrh	r3, [r3]
-	muls	r3, r5, r3
-	str	r3, [r2]
-	ldr	r2, .L1785+56
-	ldrh	r2, [r2]
-	muls	r3, r2, r3
-	ldr	r2, .L1785+60
-	str	r3, [r2]
-	ldr	r3, .L1785+64
-	ldr	r6, [r3]
-	ldr	r3, .L1785+68
-	ldrh	r0, [r3, #6]
-	ldr	r3, .L1785+72
-	subs	r0, r6, r0
-	ldrh	r1, [r3]
-	subs	r0, r0, r5
-	bl	__aeabi_uidiv
-	ldr	r3, .L1785+76
-	cmp	r5, r6
-	strh	r0, [r3]	@ movhi
-	bls	.L1774
-	movw	r2, #1461
-	ldr	r1, .L1785+20
-	ldr	r0, .L1785+24
+	.word	.LC115
+.L1843:
+	ldr	r1, .L1865
+	ldr	r0, .L1865+4
 	bl	printf
-.L1774:
-	ldrh	r2, [r4, #16]
-	ldr	r3, .L1785+80
-	ldrh	ip, [r4, #14]
-	ldr	r7, .L1785+84
-	lsrs	r1, r2, #6
-	and	r2, r2, #63
-	strb	r2, [r3, #6]
-	ldrb	r2, [r4, #11]	@ zero_extendqisi2
-	strh	r1, [r3, #2]	@ movhi
-	ldr	r1, .L1785+88
-	strb	r2, [r3, #8]
-	ldrh	r2, [r4, #18]
-	strh	ip, [r3]	@ movhi
-	movw	r3, #65535
-	strh	r3, [r7]	@ movhi
-	movs	r3, #0
-	strh	r2, [r1]	@ movhi
-	ldrh	r2, [r4, #20]
-	strh	r3, [r7, #2]	@ movhi
-	strb	r3, [r7, #6]
-	strb	r3, [r7, #8]
-	lsrs	r5, r2, #6
-	and	r2, r2, #63
-	strb	r2, [r1, #6]
-	ldrb	r2, [r4, #12]	@ zero_extendqisi2
-	strh	r5, [r1, #2]	@ movhi
-	ldrh	r5, [r4, #22]
-	strb	r2, [r1, #8]
-	ldr	r2, .L1785+92
-	strh	r5, [r2]	@ movhi
-	ldrh	r5, [r4, #24]
-	lsrs	r6, r5, #6
-	and	r5, r5, #63
-	strb	r5, [r2, #6]
-	ldrb	r5, [r4, #13]	@ zero_extendqisi2
-	strh	r6, [r2, #2]	@ movhi
-	ldr	r6, [r4, #32]
-	strb	r5, [r2, #8]
-	ldr	r5, .L1785+96
-	str	r3, [r5]
-	ldr	r5, .L1785+100
-	str	r3, [r5]
-	ldr	r5, .L1785+104
-	str	r3, [r5]
-	ldr	r5, .L1785+108
-	str	r3, [r5]
-	ldr	r5, .L1785+112
-	str	r6, [r5]
-	mov	r6, r1
-	ldr	r5, .L1785+116
-	str	r3, [r5]
-	ldr	r5, .L1785+120
-	str	r3, [r5]
-	ldr	r5, .L1785+124
-	ldr	lr, [r4, #40]
-	str	r3, [r5]
-	ldr	r3, .L1785+128
-	ldr	r5, [r3]
-	cmp	lr, r5
-	mov	r5, r2
-	it	hi
-	strhi	lr, [r3]
-	ldr	r3, .L1785+132
-	ldr	r2, [r4, #36]
-	ldr	r1, [r3]
-	cmp	r2, r1
-	it	hi
-	strhi	r2, [r3]
-	movw	r3, #65535
-	cmp	ip, r3
-	beq	.L1777
-	ldr	r0, .L1785+80
-	bl	make_superblock
-.L1777:
-	ldrh	r2, [r6]
-	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L1778
-	ldr	r0, .L1785+88
-	bl	make_superblock
-.L1778:
-	ldrh	r2, [r5]
-	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L1779
-	ldr	r0, .L1785+92
-	bl	make_superblock
-.L1779:
-	ldrh	r2, [r7]
-	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L1780
-	ldr	r0, .L1785+84
-	bl	make_superblock
-.L1780:
-	movs	r0, #0
-	b	.L1764
-.L1770:
-	ldrh	r2, [r6]
-	mov	r0, fp
-	str	r3, [sp, #4]
-	orr	r2, r7, r2, lsl #10
-	str	r2, [r4, #4]
-	ldr	r2, [r8]
-	str	r2, [r4, #8]
-	movs	r2, #1
-	mov	r1, r2
-	bl	FlashReadPages
-	ldr	r2, [r4]
-	ldr	r3, [sp, #4]
-	adds	r2, r2, #1
-	beq	.L1768
-	ldr	r2, [r8]
-	ldr	r2, [r2]
-	cmp	r2, r3
-	bne	.L1768
-	ldr	r2, [r10]
-	ldrh	r1, [r2]
-	movw	r2, #61604
-	cmp	r1, r2
-	beq	.L1769
-.L1768:
-	subs	r7, r7, #1
-	sxth	r7, r7
-	b	.L1767
-.L1786:
+	b	.L1842
+.L1844:
+	ldr	r3, .L1865+8
+	ldr	r1, [sp, #44]
+	ldr	r2, [sp, #24]
+	add	r3, r3, fp
+	add	r0, r0, r3, lsl #9
+	b	.L1845
+.L1866:
 	.align	2
-.L1785:
-	.word	.LANCHOR5
-	.word	.LANCHOR106
-	.word	.LANCHOR42
-	.word	.LANCHOR79
-	.word	1179929683
-	.word	.LANCHOR180
-	.word	.LC1
-	.word	.LANCHOR23
-	.word	.LANCHOR39
-	.word	.LANCHOR1
-	.word	.LANCHOR10
-	.word	.LANCHOR181
-	.word	.LANCHOR61
-	.word	.LANCHOR19
-	.word	.LANCHOR12
-	.word	.LANCHOR34
-	.word	.LANCHOR7
-	.word	.LANCHOR37
-	.word	.LANCHOR3
-	.word	.LANCHOR78
-	.word	.LANCHOR51
-	.word	.LANCHOR80
-	.word	.LANCHOR52
-	.word	.LANCHOR53
-	.word	.LANCHOR67
-	.word	.LANCHOR64
-	.word	.LANCHOR62
-	.word	.LANCHOR66
-	.word	.LANCHOR72
-	.word	.LANCHOR73
-	.word	.LANCHOR76
-	.word	.LANCHOR65
-	.word	.LANCHOR70
-	.word	.LANCHOR71
-	.word	.LANCHOR107
-	.word	.LANCHOR108
-	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
-	.section	.text.FtlSysBlkInit,"ax",%progbits
+.L1865:
+	.word	.LANCHOR187
+	.word	.LC116
+	.word	8388544
+	.size	sftl_write, .-sftl_write
+	.section	.text.FtlMakeBbt,"ax",%progbits
 	.align	1
-	.global	FtlSysBlkInit
+	.global	FtlMakeBbt
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlSysBlkInit, %function
-FtlSysBlkInit:
-	@ args = 0, pretend = 0, frame = 0
+	.type	FtlMakeBbt, %function
+FtlMakeBbt:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	movs	r3, #0
-	ldr	r6, .L1802
-	strh	r3, [r6]	@ movhi
-	ldr	r3, .L1802+4
-	ldrh	r0, [r3]
-	bl	FtlFreeSysBlkQueueInit
-	bl	FtlScanSysBlk
-	ldr	r3, .L1802+8
-	ldrh	r2, [r3]
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r6, #0
+	ldr	r7, .L1886
+	bl	FtlBbtMemInit
+	sub	r8, r7, #18
+	bl	FtlLoadFactoryBbt
+.L1868:
+	ldr	r3, .L1886+4
+	ldrh	r3, [r3]
+	cmp	r6, r3
+	bcc	.L1874
+	ldr	r5, .L1886+8
+	movs	r4, #0
+.L1875:
+	ldrh	r3, [r5]
+	uxth	r0, r4
+	adds	r4, r4, #1
+	cmp	r3, r0
+	bhi	.L1876
+	ldr	r4, .L1886+12
+	movw	r6, #65535
+	ldrh	r5, [r4, #12]
+	subs	r5, r5, #1
+	uxth	r5, r5
+.L1877:
+	ldrh	r3, [r4, #12]
+	subs	r3, r3, #47
+	cmp	r3, r5
+	bgt	.L1881
+	mov	r0, r5
+	bl	FtlBbmIsBadBlock
+	cmp	r0, #1
+	beq	.L1878
+	mov	r0, r5
+	bl	FlashTestBlk
+	cmp	r0, #0
+	beq	.L1879
+	mov	r0, r5
+	bl	FtlBbmMapBadBlock
+.L1878:
+	subs	r5, r5, #1
+	uxth	r5, r5
+	b	.L1877
+.L1874:
+	ldr	r3, .L1886+16
+	ldr	r5, .L1886+20
+	ldrh	r2, [r8, #2]!
+	ldr	r4, .L1886+24
+	ldr	r0, [r3]
 	movw	r3, #65535
+	ldr	r10, [r5]
 	cmp	r2, r3
-	bne	.L1788
-.L1790:
-	mov	r7, #-1
-.L1787:
-	mov	r0, r7
-	pop	{r3, r4, r5, r6, r7, pc}
-.L1788:
-	bl	FtlLoadSysInfo
-	mov	r7, r0
-	cmp	r0, #0
-	bne	.L1790
-	bl	FtlLoadMapInfo
-	bl	FtlLoadVonderInfo
-	bl	Ftl_load_ext_data
-	bl	FtlLoadEctTbl
-	bl	FtlFreeSysBLkSort
-	bl	SupperBlkListInit
-	bl	FtlPowerLostRecovery
-	movs	r0, #1
-	bl	FtlUpdateVaildLpn
-	ldr	r3, .L1802+12
-	movs	r0, #12
-	ldrh	r1, [r3]
-	ldr	r3, .L1802+16
-	ldr	r2, [r3]
-	mov	r3, r7
-.L1791:
-	cmp	r3, r1
-	bge	.L1796
-	mla	r4, r0, r3, r2
-	ldr	r4, [r4, #4]
-	cmp	r4, #0
-	bge	.L1792
-.L1796:
-	ldr	r4, .L1802+20
-	cmp	r3, r1
-	ldr	r5, .L1802+24
-	ldrh	r2, [r4, #28]
-	add	r2, r2, #1
-	strh	r2, [r4, #28]	@ movhi
-	bge	.L1800
-.L1793:
-	ldr	r6, .L1802+28
-	ldr	r0, .L1802+24
-	bl	FtlSuperblockPowerLostFix
-	mov	r0, r6
-	bl	FtlSuperblockPowerLostFix
-	ldr	r3, .L1802+32
-	ldrh	r1, [r5]
-	ldrh	r0, [r5, #4]
-	ldr	r2, [r3]
-	ldrh	r3, [r2, r1, lsl #1]
-	subs	r3, r3, r0
-	ldr	r0, .L1802+36
-	strh	r3, [r2, r1, lsl #1]	@ movhi
-	ldrh	ip, [r6]
-	ldrh	r3, [r0]
-	ldrh	lr, [r6, #4]
-	strh	r3, [r5, #2]	@ movhi
+	mov	fp, r4
+	ldr	r3, .L1886+28
+	str	r0, [r4, #8]
+	str	r10, [r4, #12]
+	beq	.L1869
+	ldrh	r5, [r3]
+	mov	r0, r4
+	str	r3, [sp]
+	mla	r5, r6, r5, r2
+	lsls	r2, r5, #10
+	str	r2, [r4, #4]
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+	ldr	r3, [sp]
+	ldr	r1, [r4, #8]
+	ldr	r0, [r7]
+	ldrh	r2, [r3]
+	adds	r2, r2, #7
+	asrs	r2, r2, #3
+	bl	ftl_memcpy
+.L1870:
+	uxth	r0, r5
+	adds	r6, r6, #1
+	adds	r7, r7, #4
+	bl	FtlBbmMapBadBlock
+	b	.L1868
+.L1869:
+	mov	r1, r6
+	str	r3, [sp]
+	bl	FlashGetBadBlockList
+	ldr	r0, [r4, #8]
+	ldr	r1, [r7]
+	bl	FtlBbt2Bitmap
+	ldr	r3, [sp]
+	str	r5, [sp, #4]
+	ldrh	r4, [r3]
+	subs	r4, r4, #1
+	uxth	r4, r4
+.L1871:
+	ldr	r3, [sp]
+	ldrh	r0, [r3]
+	smlabb	r0, r0, r6, r4
+	uxth	r0, r0
+	bl	FtlBbmIsBadBlock
+	cmp	r0, #1
+	beq	.L1872
+	ldr	r3, [sp, #4]
+	movs	r2, #16
+	movs	r1, #0
+	strh	r4, [r8]	@ movhi
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldr	r3, .L1886+16
+	mov	r2, #4096
+	movs	r1, #0
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldr	r2, [sp]
+	movw	r3, #61664
+	strh	r3, [r10]	@ movhi
 	movs	r3, #0
-	strb	r3, [r5, #6]
-	strh	r3, [r5, #4]	@ movhi
-	ldrh	r1, [r2, ip, lsl #1]
-	sub	r1, r1, lr
-	strh	r1, [r2, ip, lsl #1]	@ movhi
-	ldrh	r2, [r0]
-	ldr	r0, .L1802+40
-	strb	r3, [r6, #6]
-	strh	r2, [r6, #2]	@ movhi
-	strh	r3, [r6, #4]	@ movhi
-	bl	FtlMapBlkWriteDump_data
-	ldr	r0, .L1802+44
-	bl	FtlMapBlkWriteDump_data
-	ldrh	r3, [r4, #30]
+	str	r3, [r10, #4]
+	ldrh	r5, [r2]
+	ldrh	r3, [r8]
+	ldr	r1, [r7]
+	ldr	r0, [fp, #8]
+	strh	r3, [r10, #2]	@ movhi
+	mla	r5, r6, r5, r3
+	lsls	r3, r5, #10
+	str	r3, [fp, #4]
+	ldr	r3, .L1886+32
+	ldrh	r2, [r3]
+	lsls	r2, r2, #2
+	bl	ftl_memcpy
+	movs	r2, #1
+	ldr	r0, .L1886+24
+	mov	r1, r2
+	bl	FlashEraseBlocks
+	movs	r3, #1
+	ldr	r0, .L1886+24
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+	ldr	r3, [fp]
 	adds	r3, r3, #1
-	strh	r3, [r4, #30]	@ movhi
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
-.L1801:
-	bl	FtlVpcTblFlush
-	ldrh	r0, [r5]
-	movw	r3, #65535
-	cmp	r0, r3
-	beq	.L1799
-	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1799
-	ldr	r5, .L1802+28
-	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1799
-	bl	FtlGcRefreshBlock
-	ldrh	r0, [r5]
-	bl	FtlGcRefreshBlock
-	ldr	r0, .L1802+24
-	bl	allocate_new_data_superblock
-	mov	r0, r5
-	bl	allocate_new_data_superblock
-.L1799:
-	ldrh	r3, [r4, #28]
-	lsls	r3, r3, #27
-	bne	.L1787
-	bl	FtlVpcCheckAndModify
-	b	.L1787
-.L1792:
+	bne	.L1870
+	uxth	r0, r5
+	bl	FtlBbmMapBadBlock
+	b	.L1871
+.L1872:
+	subs	r4, r4, #1
+	uxth	r4, r4
+	b	.L1871
+.L1876:
+	bl	FtlBbmMapBadBlock
+	b	.L1875
+.L1879:
+	ldrh	r3, [r4]
+	cmp	r3, r6
+	bne	.L1880
+	strh	r5, [r4]	@ movhi
+	b	.L1878
+.L1880:
+	strh	r5, [r4, #4]	@ movhi
+.L1881:
+	ldr	r3, .L1886+36
+	movs	r5, #0
+	str	r5, [r4, #8]
+	movs	r1, #1
+	movs	r2, #2
+	strh	r5, [r4, #2]	@ movhi
+	ldr	r0, [r3]
+	ldrh	r3, [r4]
+	lsls	r3, r3, #10
+	str	r3, [r0, #4]
+	ldrh	r3, [r4, #4]
+	lsls	r3, r3, #10
+	str	r3, [r0, #24]
+	bl	FlashEraseBlocks
+	ldrh	r0, [r4]
+	bl	FtlBbmMapBadBlock
+	ldrh	r0, [r4, #4]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	ldr	r3, [r4, #8]
+	ldrh	r2, [r4, #4]
+	strh	r5, [r4, #2]	@ movhi
 	adds	r3, r3, #1
-	b	.L1791
-.L1800:
-	ldrh	r3, [r6]
-	cmp	r3, #0
-	bne	.L1793
-	bl	l2p_flush
-	b	.L1801
-.L1803:
+	str	r3, [r4, #8]
+	ldrh	r3, [r4]
+	strh	r2, [r4]	@ movhi
+	strh	r3, [r4, #4]	@ movhi
+	bl	FtlBbmTblFlush
+	mov	r0, r5
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1887:
 	.align	2
-.L1802:
-	.word	.LANCHOR161
-	.word	.LANCHOR4
-	.word	.LANCHOR79
-	.word	.LANCHOR33
-	.word	.LANCHOR55
-	.word	.LANCHOR39
-	.word	.LANCHOR51
-	.word	.LANCHOR52
-	.word	.LANCHOR42
-	.word	.LANCHOR19
-	.word	.LANCHOR144
-	.word	.LANCHOR149
-	.size	FtlSysBlkInit, .-FtlSysBlkInit
+.L1886:
+	.word	.LANCHOR37+28
+	.word	.LANCHOR10
+	.word	.LANCHOR25
+	.word	.LANCHOR37
+	.word	.LANCHOR115
+	.word	.LANCHOR123
+	.word	.LANCHOR148
+	.word	.LANCHOR17
+	.word	.LANCHOR137
+	.word	.LANCHOR106
+	.size	FtlMakeBbt, .-FtlMakeBbt
 	.section	.text.ftl_low_format,"ax",%progbits
 	.align	1
 	.global	ftl_low_format
@@ -13819,62 +14328,62 @@ ftl_low_format:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #0
-	ldr	r6, .L1828
-	ldr	r2, .L1828+4
-	ldr	r5, .L1828+8
+	ldr	r6, .L1912
+	ldr	r2, .L1912+4
+	ldr	r5, .L1912+8
 	ldrh	r0, [r6]
 	str	r3, [r2]
 	str	r3, [r5]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	r0, .L1805
+	cbz	r0, .L1889
 	bl	FtlMakeBbt
-.L1805:
-	ldr	r3, .L1828+12
-	ldr	r2, .L1828+16
-	ldr	ip, .L1828+100
+.L1889:
+	ldr	r3, .L1912+12
+	ldr	r2, .L1912+16
+	ldr	ip, .L1912+100
 	ldrh	r1, [r3]
 	ldr	r4, [r2]
-	ldr	r2, .L1828+20
+	ldr	r2, .L1912+20
 	str	r3, [sp, #4]
 	lsls	r1, r1, #7
 	ldr	r7, [r2]
 	movs	r2, #0
-.L1806:
+.L1890:
 	uxth	r3, r2
 	adds	r2, r2, #1
 	cmp	r3, r1
-	blt	.L1807
-	ldr	r3, .L1828+24
+	blt	.L1891
+	ldr	r3, .L1912+24
 	movs	r7, #0
-	ldr	r10, .L1828+104
+	ldr	r10, .L1912+104
 	ldrh	r4, [r3]
 	mov	r8, r3
 	mov	fp, r10
-.L1808:
+.L1892:
 	ldrh	r3, [r10]
 	cmp	r3, r4
-	bhi	.L1809
-	ldr	r4, .L1828+28
+	bhi	.L1893
+	ldr	r4, .L1912+28
 	subs	r3, r7, #2
 	ldrh	r1, [r4]
 	cmp	r3, r1, lsl #1
-	bgt	.L1810
-.L1814:
+	bgt	.L1894
+.L1898:
 	movs	r6, #0
 	mov	r7, r6
-.L1811:
+.L1895:
 	ldrh	r3, [r8]
 	uxth	r0, r6
 	adds	r6, r6, #1
 	cmp	r3, r0
-	bhi	.L1815
+	bhi	.L1899
 	ldrh	r2, [fp]
-	ldr	r3, .L1828+32
+	ldr	r3, .L1912+32
 	ldrh	r4, [r4]
-	ldr	r6, .L1828+36
+	ldr	r6, .L1912+36
 	str	r2, [r3]
-	ldr	r3, .L1828+40
+	ldr	r3, .L1912+40
 	mov	r1, r4
 	ldr	r2, [r3]
 	mov	r0, r2
@@ -13884,13 +14393,13 @@ ftl_low_format:
 	mov	r3, r0
 	str	r0, [r6]
 	add	r1, r10, #36
-	ldr	r0, .L1828+44
+	ldr	r0, .L1912+44
 	strh	r1, [r0]	@ movhi
 	movs	r1, #24
 	muls	r1, r4, r1
 	str	r0, [sp]
 	cmp	r7, r1
-	ble	.L1816
+	ble	.L1900
 	ldr	r2, [sp, #12]
 	mov	r1, r4
 	str	r3, [sp, #8]
@@ -13902,11 +14411,11 @@ ftl_low_format:
 	adds	r0, r0, #24
 	strh	r0, [r3]	@ movhi
 	ldr	r3, [sp, #8]
-.L1816:
-	ldr	r2, .L1828+48
+.L1900:
+	ldr	r2, .L1912+48
 	ldrh	r2, [r2]
-	cbz	r2, .L1818
-	ldr	r1, .L1828+44
+	cbz	r2, .L1902
+	ldr	r1, .L1912+44
 	ldrh	r0, [r1]
 	add	r0, r0, r2, lsr #1
 	strh	r0, [r1]	@ movhi
@@ -13917,24 +14426,24 @@ ftl_low_format:
 	strlt	r3, [r6]
 	addlt	r2, r2, r10
 	strhlt	r2, [r1]	@ movhi
-.L1818:
+.L1902:
 	ldr	r3, [sp]
-	ldr	r7, .L1828+52
-	ldr	r10, .L1828+108
+	ldr	r7, .L1912+52
+	ldr	r10, .L1912+108
 	ldrh	r2, [r3]
 	ldr	r3, [r6]
 	subs	r3, r3, r2
 	muls	r4, r3, r4
-	ldr	r3, .L1828+56
+	ldr	r3, .L1912+56
 	ldrh	r3, [r3]
 	str	r4, [r7]
 	muls	r4, r3, r4
 	ldr	r3, [sp, #4]
 	ldrh	r3, [r3]
 	str	r4, [r6]
-	ldr	r6, .L1828+60
+	ldr	r6, .L1912+60
 	muls	r4, r3, r4
-	ldr	r3, .L1828+64
+	ldr	r3, .L1912+64
 	str	r4, [r3]
 	movw	r4, #65535
 	bl	FtlBbmTblFlush
@@ -13943,13 +14452,13 @@ ftl_low_format:
 	ldr	r0, [r10]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-	ldr	r2, .L1828+68
+	ldr	r2, .L1912+68
 	movs	r3, #0
 	strh	r3, [r6, #2]	@ movhi
 	movs	r1, #255
 	strb	r3, [r6, #6]
 	str	r3, [r2]
-	ldr	r2, .L1828+72
+	ldr	r2, .L1912+72
 	strh	r3, [r6]	@ movhi
 	strh	r3, [r2, #2]	@ movhi
 	strb	r3, [r2, #6]
@@ -13960,30 +14469,30 @@ ftl_low_format:
 	mov	r8, r10
 	strb	r3, [r6, #8]
 	mov	r10, r6
-	ldr	r3, .L1828+76
+	ldr	r3, .L1912+76
 	lsrs	r2, r2, #3
 	ldr	r0, [r3]
 	bl	ftl_memset
-.L1820:
+.L1904:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r6, #7]	@ zero_extendqisi2
 	ldrh	r2, [r6]
 	cmp	r3, #0
-	bne	.L1821
+	bne	.L1905
 	ldr	r3, [r8]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r6]
 	adds	r3, r3, #1
 	strh	r3, [r6]	@ movhi
-	b	.L1820
-.L1807:
+	b	.L1904
+.L1891:
 	mvns	r0, r3
 	orr	r0, r3, r0, lsl #16
 	str	r0, [r4, r3, lsl #2]
 	str	ip, [r7, r3, lsl #2]
-	b	.L1806
-.L1809:
+	b	.L1890
+.L1893:
 	mov	r0, r4
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
@@ -13991,11 +14500,11 @@ ftl_low_format:
 	add	r7, r7, r0
 	uxth	r7, r7
 	uxth	r4, r4
-	b	.L1808
-.L1810:
+	b	.L1892
+.L1894:
 	mov	r0, r7
 	bl	__aeabi_uidiv
-	ldr	r3, .L1828+80
+	ldr	r3, .L1912+80
 	ldr	r3, [r3]
 	add	r0, r0, r3
 	uxth	r0, r0
@@ -14003,26 +14512,26 @@ ftl_low_format:
 	ldrh	r0, [r6]
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	r6, [r8]
-.L1812:
+.L1896:
 	ldrh	r3, [fp]
 	cmp	r3, r6
-	bls	.L1814
+	bls	.L1898
 	mov	r0, r6
 	movs	r1, #1
 	adds	r6, r6, #1
 	bl	FtlLowFormatEraseBlock
 	uxth	r6, r6
-	b	.L1812
-.L1815:
+	b	.L1896
+.L1899:
 	movs	r1, #0
 	bl	FtlLowFormatEraseBlock
 	add	r7, r7, r0
 	uxth	r7, r7
-	b	.L1811
-.L1821:
+	b	.L1895
+.L1905:
 	ldr	r3, [r5]
 	ldrh	r1, [r6, #4]
-	ldr	r4, .L1828+84
+	ldr	r4, .L1912+84
 	str	r3, [r6, #12]
 	adds	r3, r3, #1
 	str	r3, [r5]
@@ -14038,19 +14547,19 @@ ftl_low_format:
 	strh	r3, [r4]	@ movhi
 	movs	r3, #1
 	strb	r3, [r4, #8]
-.L1822:
+.L1906:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r4]
-	cbnz	r3, .L1823
+	cbnz	r3, .L1907
 	ldr	r3, [r8]
 	strh	r6, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	b	.L1822
-.L1823:
+	b	.L1906
+.L1907:
 	ldr	r3, [r5]
 	ldrh	r1, [r4, #4]
 	str	r3, [r4, #12]
@@ -14059,10 +14568,10 @@ ftl_low_format:
 	movw	r4, #65535
 	ldr	r3, [r8]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L1828+88
+	ldr	r3, .L1912+88
 	strh	r4, [r3]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L1828+92
+	ldr	r3, .L1912+92
 	movs	r2, #0
 	strh	r2, [r3, #2]	@ movhi
 	ldr	r2, [r7]
@@ -14075,32 +14584,32 @@ ftl_low_format:
 	str	r2, [r5]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	r0, .L1824
-	ldr	r3, .L1828+96
+	cbnz	r0, .L1908
+	ldr	r3, .L1912+96
 	movs	r2, #1
 	str	r2, [r3]
-.L1824:
+.L1908:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1829:
+.L1913:
 	.align	2
-.L1828:
+.L1912:
 	.word	.LANCHOR4
 	.word	.LANCHOR71
 	.word	.LANCHOR70
 	.word	.LANCHOR12
-	.word	.LANCHOR115
-	.word	.LANCHOR113
+	.word	.LANCHOR118
+	.word	.LANCHOR119
 	.word	.LANCHOR5
 	.word	.LANCHOR3
-	.word	.LANCHOR112
+	.word	.LANCHOR111
 	.word	.LANCHOR61
 	.word	.LANCHOR7
 	.word	.LANCHOR78
 	.word	.LANCHOR15
-	.word	.LANCHOR181
+	.word	.LANCHOR152
 	.word	.LANCHOR19
 	.word	.LANCHOR51
 	.word	.LANCHOR34
@@ -14116,61 +14625,6 @@ ftl_low_format:
 	.word	.LANCHOR6
 	.word	.LANCHOR42
 	.size	ftl_low_format, .-ftl_low_format
-	.section	.text.sftl_init,"ax",%progbits
-	.align	1
-	.global	sftl_init
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	sftl_init, %function
-sftl_init:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, lr}
-	mov	r3, #-1
-	ldr	r4, .L1836
-	ldr	r1, .L1836+4
-	ldr	r0, .L1836+8
-	str	r3, [r4]
-	bl	printf
-	ldr	r0, .L1836+12
-	bl	FtlConstantsInit
-	bl	FtlMemInit
-	bl	FtlVariablesInit
-	ldr	r3, .L1836+16
-	ldrh	r0, [r3]
-	bl	FtlFreeSysBlkQueueInit
-	bl	FtlLoadBbt
-	cbnz	r0, .L1834
-	bl	FtlSysBlkInit
-	cbnz	r0, .L1834
-	movs	r3, #1
-	str	r3, [r4]
-	ldr	r3, .L1836+20
-	ldrh	r3, [r3]
-	cmp	r3, #15
-	bhi	.L1834
-	movw	r4, #8129
-.L1833:
-	movs	r1, #1
-	movs	r0, #0
-	bl	rk_ftl_garbage_collect
-	subs	r4, r4, #1
-	bne	.L1833
-.L1834:
-	movs	r0, #0
-	pop	{r4, pc}
-.L1837:
-	.align	2
-.L1836:
-	.word	.LANCHOR86
-	.word	.LC70
-	.word	.LC71
-	.word	.LANCHOR0
-	.word	.LANCHOR4
-	.word	.LANCHOR48
-	.size	sftl_init, .-sftl_init
 	.section	.text.ftl_memcmp,"ax",%progbits
 	.align	1
 	.global	ftl_memcmp
@@ -14185,7 +14639,6 @@ ftl_memcmp:
 	@ link register save eliminated.
 	b	memcmp
 	.size	ftl_memcmp, .-ftl_memcmp
-	.global	ftl_temp_buf
 	.global	g_nand_ops
 	.global	g_nand_phy_info
 	.global	gc_ink_free_return_value
@@ -14200,6 +14653,9 @@ ftl_memcmp:
 	.global	g_recovery_ppa_tbl
 	.global	g_recovery_page_min_ver
 	.global	g_recovery_page_num
+	.global	sftl_nand_check_spare_buf
+	.global	sftl_temp_buf
+	.global	sftl_nand_check_buf
 	.global	g_cur_erase_blk
 	.global	g_gc_skip_write_count
 	.global	g_gc_head_data_block_count
@@ -14577,19 +15033,6 @@ c_gc_page_buf_num:
 	.size	c_mlc_erase_count_value, 2
 c_mlc_erase_count_value:
 	.space	2
-	.section	.bss.check_buf,"aw",%nobits
-	.align	2
-	.type	check_buf, %object
-	.size	check_buf, 4096
-check_buf:
-	.space	4096
-	.section	.bss.check_spare_buf,"aw",%nobits
-	.align	2
-	.set	.LANCHOR110,. + 0
-	.type	check_spare_buf, %object
-	.size	check_spare_buf, 512
-check_spare_buf:
-	.space	512
 	.section	.bss.check_vpc_table,"aw",%nobits
 	.align	1
 	.type	check_vpc_table, %object
@@ -14598,17 +15041,11 @@ check_vpc_table:
 	.space	16384
 	.section	.bss.ftl_gc_temp_power_lost_recovery_flag,"aw",%nobits
 	.align	2
-	.set	.LANCHOR152,. + 0
+	.set	.LANCHOR144,. + 0
 	.type	ftl_gc_temp_power_lost_recovery_flag, %object
 	.size	ftl_gc_temp_power_lost_recovery_flag, 4
 ftl_gc_temp_power_lost_recovery_flag:
 	.space	4
-	.section	.bss.ftl_temp_buf,"aw",%nobits
-	.align	2
-	.type	ftl_temp_buf, %object
-	.size	ftl_temp_buf, 4096
-ftl_temp_buf:
-	.space	4096
 	.section	.bss.gBbtInfo,"aw",%nobits
 	.align	2
 	.set	.LANCHOR37,. + 0
@@ -14618,7 +15055,7 @@ gBbtInfo:
 	.space	60
 	.section	.bss.gL2pMapInfo,"aw",%nobits
 	.align	2
-	.set	.LANCHOR144,. + 0
+	.set	.LANCHOR140,. + 0
 	.type	gL2pMapInfo, %object
 	.size	gL2pMapInfo, 40
 gL2pMapInfo:
@@ -14639,7 +15076,7 @@ gSysInfo:
 	.space	12
 	.section	.bss.gVendorBlkInfo,"aw",%nobits
 	.align	2
-	.set	.LANCHOR149,. + 0
+	.set	.LANCHOR158,. + 0
 	.type	gVendorBlkInfo, %object
 	.size	gVendorBlkInfo, 40
 gVendorBlkInfo:
@@ -14667,7 +15104,7 @@ g_MaxLbaSector:
 	.space	4
 	.section	.bss.g_MaxLbn,"aw",%nobits
 	.align	2
-	.set	.LANCHOR181,. + 0
+	.set	.LANCHOR152,. + 0
 	.type	g_MaxLbn, %object
 	.size	g_MaxLbn, 4
 g_MaxLbn:
@@ -14702,7 +15139,7 @@ g_buffer_superblock:
 	.space	48
 	.section	.bss.g_cur_erase_blk,"aw",%nobits
 	.align	2
-	.set	.LANCHOR112,. + 0
+	.set	.LANCHOR111,. + 0
 	.type	g_cur_erase_blk, %object
 	.size	g_cur_erase_blk, 4
 g_cur_erase_blk:
@@ -14716,14 +15153,14 @@ g_ect_tbl_info_size:
 	.space	2
 	.section	.bss.g_ect_tbl_power_up_flush,"aw",%nobits
 	.align	1
-	.set	.LANCHOR165,. + 0
+	.set	.LANCHOR170,. + 0
 	.type	g_ect_tbl_power_up_flush, %object
 	.size	g_ect_tbl_power_up_flush, 2
 g_ect_tbl_power_up_flush:
 	.space	2
 	.section	.bss.g_ftl_nand_free_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR176,. + 0
+	.set	.LANCHOR181,. + 0
 	.type	g_ftl_nand_free_count, %object
 	.size	g_ftl_nand_free_count, 4
 g_ftl_nand_free_count:
@@ -14765,14 +15202,14 @@ g_gc_blk_num:
 	.space	2
 	.section	.bss.g_gc_cur_blk_max_valid_pages,"aw",%nobits
 	.align	1
-	.set	.LANCHOR174,. + 0
+	.set	.LANCHOR179,. + 0
 	.type	g_gc_cur_blk_max_valid_pages, %object
 	.size	g_gc_cur_blk_max_valid_pages, 2
 g_gc_cur_blk_max_valid_pages:
 	.space	2
 	.section	.bss.g_gc_cur_blk_valid_pages,"aw",%nobits
 	.align	1
-	.set	.LANCHOR173,. + 0
+	.set	.LANCHOR178,. + 0
 	.type	g_gc_cur_blk_valid_pages, %object
 	.size	g_gc_cur_blk_valid_pages, 2
 g_gc_cur_blk_valid_pages:
@@ -14786,14 +15223,14 @@ g_gc_free_blk_threshold:
 	.space	2
 	.section	.bss.g_gc_head_data_block,"aw",%nobits
 	.align	2
-	.set	.LANCHOR118,. + 0
+	.set	.LANCHOR109,. + 0
 	.type	g_gc_head_data_block, %object
 	.size	g_gc_head_data_block, 4
 g_gc_head_data_block:
 	.space	4
 	.section	.bss.g_gc_head_data_block_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR119,. + 0
+	.set	.LANCHOR110,. + 0
 	.type	g_gc_head_data_block_count, %object
 	.size	g_gc_head_data_block_count, 4
 g_gc_head_data_block_count:
@@ -14856,7 +15293,7 @@ g_gc_temp_superblock:
 	.space	48
 	.section	.bss.g_in_gc_progress,"aw",%nobits
 	.align	2
-	.set	.LANCHOR117,. + 0
+	.set	.LANCHOR108,. + 0
 	.type	g_in_gc_progress, %object
 	.size	g_in_gc_progress, 4
 g_in_gc_progress:
@@ -14919,28 +15356,28 @@ g_num_free_superblocks:
 	.space	2
 	.section	.bss.g_power_lost_recovery_flag,"aw",%nobits
 	.align	1
-	.set	.LANCHOR161,. + 0
+	.set	.LANCHOR167,. + 0
 	.type	g_power_lost_recovery_flag, %object
 	.size	g_power_lost_recovery_flag, 2
 g_power_lost_recovery_flag:
 	.space	2
 	.section	.bss.g_recovery_page_min_ver,"aw",%nobits
 	.align	2
-	.set	.LANCHOR153,. + 0
+	.set	.LANCHOR145,. + 0
 	.type	g_recovery_page_min_ver, %object
 	.size	g_recovery_page_min_ver, 4
 g_recovery_page_min_ver:
 	.space	4
 	.section	.bss.g_recovery_page_num,"aw",%nobits
 	.align	2
-	.set	.LANCHOR162,. + 0
+	.set	.LANCHOR168,. + 0
 	.type	g_recovery_page_num, %object
 	.size	g_recovery_page_num, 4
 g_recovery_page_num:
 	.space	4
 	.section	.bss.g_recovery_ppa_tbl,"aw",%nobits
 	.align	2
-	.set	.LANCHOR163,. + 0
+	.set	.LANCHOR169,. + 0
 	.type	g_recovery_ppa_tbl, %object
 	.size	g_recovery_ppa_tbl, 128
 g_recovery_ppa_tbl:
@@ -14961,7 +15398,7 @@ g_sys_save_data:
 	.space	48
 	.section	.bss.g_tmp_data_superblock_id,"aw",%nobits
 	.align	1
-	.set	.LANCHOR150,. + 0
+	.set	.LANCHOR142,. + 0
 	.type	g_tmp_data_superblock_id, %object
 	.size	g_tmp_data_superblock_id, 2
 g_tmp_data_superblock_id:
@@ -15003,7 +15440,7 @@ g_totle_l2p_write_count:
 	.space	4
 	.section	.bss.g_totle_map_block,"aw",%nobits
 	.align	1
-	.set	.LANCHOR147,. + 0
+	.set	.LANCHOR141,. + 0
 	.type	g_totle_map_block, %object
 	.size	g_totle_map_block, 2
 g_totle_map_block:
@@ -15038,7 +15475,7 @@ g_totle_slc_erase_count:
 	.space	4
 	.section	.bss.g_totle_swl_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR151,. + 0
+	.set	.LANCHOR143,. + 0
 	.type	g_totle_swl_count, %object
 	.size	g_totle_swl_count, 4
 g_totle_swl_count:
@@ -15073,14 +15510,14 @@ g_totle_write_sector:
 	.space	4
 	.section	.bss.gc_discard_updated,"aw",%nobits
 	.align	2
-	.set	.LANCHOR167,. + 0
+	.set	.LANCHOR172,. + 0
 	.type	gc_discard_updated, %object
 	.size	gc_discard_updated, 4
 gc_discard_updated:
 	.space	4
 	.section	.bss.gc_ink_free_return_value,"aw",%nobits
 	.align	1
-	.set	.LANCHOR172,. + 0
+	.set	.LANCHOR177,. + 0
 	.type	gc_ink_free_return_value, %object
 	.size	gc_ink_free_return_value, 2
 gc_ink_free_return_value:
@@ -15094,10 +15531,11 @@ gp_ect_tbl_info:
 	.space	4
 	.section	.bss.gp_flash_check_buf,"aw",%nobits
 	.align	2
+	.set	.LANCHOR186,. + 0
 	.type	gp_flash_check_buf, %object
-	.size	gp_flash_check_buf, 262144
+	.size	gp_flash_check_buf, 4
 gp_flash_check_buf:
-	.space	262144
+	.space	4
 	.section	.bss.gp_gc_page_buf_info,"aw",%nobits
 	.align	2
 	.set	.LANCHOR90,. + 0
@@ -15113,13 +15551,14 @@ gp_last_act_superblock:
 	.space	4
 	.section	.bss.idb_buf,"aw",%nobits
 	.align	2
+	.set	.LANCHOR185,. + 0
 	.type	idb_buf, %object
-	.size	idb_buf, 262144
+	.size	idb_buf, 4
 idb_buf:
-	.space	262144
+	.space	4
 	.section	.bss.idb_need_write_back,"aw",%nobits
 	.align	2
-	.set	.LANCHOR179,. + 0
+	.set	.LANCHOR184,. + 0
 	.type	idb_need_write_back, %object
 	.size	idb_need_write_back, 4
 idb_need_write_back:
@@ -15196,21 +15635,21 @@ p_gc_spare_buf:
 	.space	4
 	.section	.bss.p_io_data_buf_0,"aw",%nobits
 	.align	2
-	.set	.LANCHOR115,. + 0
+	.set	.LANCHOR118,. + 0
 	.type	p_io_data_buf_0, %object
 	.size	p_io_data_buf_0, 4
 p_io_data_buf_0:
 	.space	4
 	.section	.bss.p_io_data_buf_1,"aw",%nobits
 	.align	2
-	.set	.LANCHOR113,. + 0
+	.set	.LANCHOR119,. + 0
 	.type	p_io_data_buf_1, %object
 	.size	p_io_data_buf_1, 4
 p_io_data_buf_1:
 	.space	4
 	.section	.bss.p_io_spare_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR114,. + 0
+	.set	.LANCHOR124,. + 0
 	.type	p_io_spare_buf, %object
 	.size	p_io_spare_buf, 4
 p_io_spare_buf:
@@ -15272,21 +15711,21 @@ p_swl_mul_table:
 	.space	4
 	.section	.bss.p_sys_data_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR107,. + 0
+	.set	.LANCHOR115,. + 0
 	.type	p_sys_data_buf, %object
 	.size	p_sys_data_buf, 4
 p_sys_data_buf:
 	.space	4
 	.section	.bss.p_sys_data_buf_1,"aw",%nobits
 	.align	2
-	.set	.LANCHOR123,. + 0
+	.set	.LANCHOR116,. + 0
 	.type	p_sys_data_buf_1, %object
 	.size	p_sys_data_buf_1, 4
 p_sys_data_buf_1:
 	.space	4
 	.section	.bss.p_sys_spare_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR108,. + 0
+	.set	.LANCHOR123,. + 0
 	.type	p_sys_spare_buf, %object
 	.size	p_sys_spare_buf, 4
 p_sys_spare_buf:
@@ -15328,7 +15767,7 @@ p_vendor_block_ver_table:
 	.space	4
 	.section	.bss.p_vendor_data_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR124,. + 0
+	.set	.LANCHOR117,. + 0
 	.type	p_vendor_data_buf, %object
 	.size	p_vendor_data_buf, 4
 p_vendor_data_buf:
@@ -15342,7 +15781,7 @@ p_vendor_region_ppn_table:
 	.space	4
 	.section	.bss.req_erase,"aw",%nobits
 	.align	2
-	.set	.LANCHOR111,. + 0
+	.set	.LANCHOR106,. + 0
 	.type	req_erase, %object
 	.size	req_erase, 4
 req_erase:
@@ -15356,35 +15795,56 @@ req_gc:
 	.space	4
 	.section	.bss.req_gc_dst,"aw",%nobits
 	.align	2
-	.set	.LANCHOR121,. + 0
+	.set	.LANCHOR113,. + 0
 	.type	req_gc_dst, %object
 	.size	req_gc_dst, 4
 req_gc_dst:
 	.space	4
 	.section	.bss.req_prgm,"aw",%nobits
 	.align	2
-	.set	.LANCHOR122,. + 0
+	.set	.LANCHOR114,. + 0
 	.type	req_prgm, %object
 	.size	req_prgm, 4
 req_prgm:
 	.space	4
 	.section	.bss.req_read,"aw",%nobits
 	.align	2
-	.set	.LANCHOR120,. + 0
+	.set	.LANCHOR112,. + 0
 	.type	req_read, %object
 	.size	req_read, 4
 req_read:
 	.space	4
 	.section	.bss.req_sys,"aw",%nobits
 	.align	2
-	.set	.LANCHOR106,. + 0
+	.set	.LANCHOR148,. + 0
 	.type	req_sys, %object
 	.size	req_sys, 20
 req_sys:
 	.space	20
+	.section	.bss.sftl_nand_check_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR120,. + 0
+	.type	sftl_nand_check_buf, %object
+	.size	sftl_nand_check_buf, 4
+sftl_nand_check_buf:
+	.space	4
+	.section	.bss.sftl_nand_check_spare_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR122,. + 0
+	.type	sftl_nand_check_spare_buf, %object
+	.size	sftl_nand_check_spare_buf, 4
+sftl_nand_check_spare_buf:
+	.space	4
+	.section	.bss.sftl_temp_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR121,. + 0
+	.type	sftl_temp_buf, %object
+	.size	sftl_temp_buf, 4
+sftl_temp_buf:
+	.space	4
 	.section	.data.ftl_gc_temp_block_bops_scan_page_addr,"aw",%progbits
 	.align	1
-	.set	.LANCHOR156,. + 0
+	.set	.LANCHOR162,. + 0
 	.type	ftl_gc_temp_block_bops_scan_page_addr, %object
 	.size	ftl_gc_temp_block_bops_scan_page_addr, 2
 ftl_gc_temp_block_bops_scan_page_addr:
@@ -15398,37 +15858,42 @@ gFtlInitStatus:
 	.word	-1
 	.section	.data.power_up_flag,"aw",%progbits
 	.align	2
-	.set	.LANCHOR177,. + 0
+	.set	.LANCHOR182,. + 0
 	.type	power_up_flag, %object
 	.size	power_up_flag, 4
 power_up_flag:
 	.word	1
-	.section	.rodata.FlashProgPages.str1.1,"aMS",%progbits,1
+	.section	.rodata.FlashEraseBlocks.str1.1,"aMS",%progbits,1
 .LC79:
-	.ascii	"prog read error: = %x\012\000"
+	.ascii	"%s: addr: %x is in id block!!!!!!!!!!\012\000"
 .LC80:
-	.ascii	"prog read s error: = %x %x %x\012\000"
+	.ascii	"not free: w: d:\000"
 .LC81:
+	.ascii	"not free: w: s:\000"
+	.section	.rodata.FlashProgPages.str1.1,"aMS",%progbits,1
+.LC85:
+	.ascii	"prog read error: = %x\012\000"
+.LC86:
+	.ascii	"prog read s error: = %x %x %x\012\000"
+.LC87:
 	.ascii	"prog read d error: = %x %x %x\012\000"
 	.section	.rodata.FtlBbmMapBadBlock.str1.1,"aMS",%progbits,1
 .LC0:
 	.ascii	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\012"
 	.ascii	"\000"
 	.section	.rodata.FtlBbmTblFlush.str1.1,"aMS",%progbits,1
-.LC97:
+.LC101:
 	.ascii	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\012\000"
-.LC98:
+.LC102:
 	.ascii	"FtlBbmTblFlush error:%x\012\000"
-.LC99:
+.LC103:
 	.ascii	"FtlBbmTblFlush error = %x error count = %d\012\000"
 	.section	.rodata.FtlFreeSysBlkQueueOut.str1.1,"aMS",%progbits,1
 .LC82:
-	.ascii	"FtlFreeSysBlkQueueOut free count = %d\012\000"
-.LC83:
 	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\012"
 	.ascii	"\000"
 	.section	.rodata.FtlGcFreeBadSuperBlk.str1.1,"aMS",%progbits,1
-.LC100:
+.LC104:
 	.ascii	"FtlGcFreeBadSuperBlk 0x%x\012\000"
 	.section	.rodata.FtlGcMarkBadPhyBlk.str1.1,"aMS",%progbits,1
 .LC74:
@@ -15436,16 +15901,19 @@ power_up_flag:
 	.section	.rodata.FtlGcRefreshBlock.str1.1,"aMS",%progbits,1
 .LC73:
 	.ascii	"FtlGcRefreshBlock  0x%x\012\000"
+	.section	.rodata.FtlGcScanTempBlk.str1.1,"aMS",%progbits,1
+.LC100:
+	.ascii	"FtlGcScanTempBlk Error ID %x %x!!!!!!! \012\000"
 	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",%progbits,1
-.LC103:
+.LC108:
 	.ascii	"no ect\000"
 	.section	.rodata.FtlMapWritePage.str1.1,"aMS",%progbits,1
-.LC89:
+.LC88:
 	.ascii	"FtlMapWritePage error = %x \012\000"
-.LC90:
+.LC89:
 	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
 	.section	.rodata.FtlMemInit.str1.1,"aMS",%progbits,1
-.LC85:
+.LC84:
 	.ascii	"%s error allocating memory. return -1\012\000"
 	.section	.rodata.FtlPrintInfo2buf.str1.1,"aMS",%progbits,1
 .LC2:
@@ -15585,19 +16053,22 @@ power_up_flag:
 .LC69:
 	.ascii	"free %d. [0x%x] 0x%x  0x%x\012\000"
 	.section	.rodata.FtlProgPages.str1.1,"aMS",%progbits,1
-.LC106:
+.LC111:
 	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
 	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",%progbits,1
-.LC102:
+.LC106:
 	.ascii	"spuer block %x vpn is 0\012 \000"
+	.section	.rodata.FtlVendorPartRead.str1.1,"aMS",%progbits,1
+.LC107:
+	.ascii	"FtlVendorPartRead refresh = %x phyAddr = %x\012\000"
 	.section	.rodata.FtlVpcCheckAndModify.str1.1,"aMS",%progbits,1
-.LC105:
+.LC110:
 	.ascii	"FtlCheckVpc %x = %x  %x\012\000"
 	.section	.rodata.FtlVpcTblFlush.str1.1,"aMS",%progbits,1
-.LC104:
+.LC109:
 	.ascii	"FtlVpcTblFlush error = %x error count = %d\012\000"
 	.section	.rodata.FtlWrite.str1.1,"aMS",%progbits,1
-.LC108:
+.LC113:
 	.ascii	"FtlWrite: lpa error:%x %x\012\000"
 	.section	.rodata.GetSwlReplaceBlock.str1.1,"aMS",%progbits,1
 .LC72:
@@ -15606,212 +16077,224 @@ power_up_flag:
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",%progbits,1
 .LC1:
 	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
-	.section	.rodata.__func__.10016,"a",%progbits
-	.set	.LANCHOR171,. + 0
-	.type	__func__.10016, %object
-	.size	__func__.10016, 19
-__func__.10016:
+	.section	.rodata.__func__.10026,"a",%progbits
+	.set	.LANCHOR176,. + 0
+	.type	__func__.10026, %object
+	.size	__func__.10026, 19
+__func__.10026:
 	.ascii	"FtlGcFreeTempBlock\000"
-	.section	.rodata.__func__.10122,"a",%progbits
-	.set	.LANCHOR175,. + 0
-	.type	__func__.10122, %object
-	.size	__func__.10122, 23
-__func__.10122:
+	.section	.rodata.__func__.10137,"a",%progbits
+	.set	.LANCHOR180,. + 0
+	.type	__func__.10137, %object
+	.size	__func__.10137, 23
+__func__.10137:
 	.ascii	"rk_ftl_garbage_collect\000"
-	.section	.rodata.__func__.10389,"a",%progbits
-	.set	.LANCHOR104,. + 0
-	.type	__func__.10389, %object
-	.size	__func__.10389, 15
-__func__.10389:
+	.section	.rodata.__func__.10399,"a",%progbits
+	.set	.LANCHOR147,. + 0
+	.type	__func__.10399, %object
+	.size	__func__.10399, 15
+__func__.10399:
 	.ascii	"FlashReadPages\000"
-	.section	.rodata.__func__.10406,"a",%progbits
-	.set	.LANCHOR109,. + 0
-	.type	__func__.10406, %object
-	.size	__func__.10406, 15
-__func__.10406:
+	.section	.rodata.__func__.10417,"a",%progbits
+	.set	.LANCHOR153,. + 0
+	.type	__func__.10417, %object
+	.size	__func__.10417, 15
+__func__.10417:
 	.ascii	"FlashProgPages\000"
-	.section	.rodata.__func__.8796,"a",%progbits
+	.section	.rodata.__func__.10440,"a",%progbits
+	.set	.LANCHOR104,. + 0
+	.type	__func__.10440, %object
+	.size	__func__.10440, 17
+__func__.10440:
+	.ascii	"FlashEraseBlocks\000"
+	.section	.rodata.__func__.8806,"a",%progbits
 	.set	.LANCHOR138,. + 0
-	.type	__func__.8796, %object
-	.size	__func__.8796, 11
-__func__.8796:
+	.type	__func__.8806, %object
+	.size	__func__.8806, 11
+__func__.8806:
 	.ascii	"FtlMemInit\000"
-	.section	.rodata.__func__.8920,"a",%progbits
-	.set	.LANCHOR170,. + 0
-	.type	__func__.8920, %object
-	.size	__func__.8920, 13
-__func__.8920:
+	.section	.rodata.__func__.8930,"a",%progbits
+	.set	.LANCHOR175,. + 0
+	.type	__func__.8930, %object
+	.size	__func__.8930, 13
+__func__.8930:
 	.ascii	"FtlProgPages\000"
-	.section	.rodata.__func__.8948,"a",%progbits
-	.set	.LANCHOR178,. + 0
-	.type	__func__.8948, %object
-	.size	__func__.8948, 9
-__func__.8948:
+	.section	.rodata.__func__.8958,"a",%progbits
+	.set	.LANCHOR183,. + 0
+	.type	__func__.8958, %object
+	.size	__func__.8958, 9
+__func__.8958:
 	.ascii	"FtlWrite\000"
-	.section	.rodata.__func__.9094,"a",%progbits
+	.section	.rodata.__func__.9064,"a",%progbits
+	.set	.LANCHOR187,. + 0
+	.type	__func__.9064, %object
+	.size	__func__.9064, 14
+__func__.9064:
+	.ascii	"FtlWriteToIDB\000"
+	.section	.rodata.__func__.9105,"a",%progbits
 	.set	.LANCHOR139,. + 0
-	.type	__func__.9094, %object
-	.size	__func__.9094, 14
-__func__.9094:
+	.type	__func__.9105, %object
+	.size	__func__.9105, 14
+__func__.9105:
 	.ascii	"FtlBbt2Bitmap\000"
-	.section	.rodata.__func__.9137,"a",%progbits
-	.set	.LANCHOR164,. + 0
-	.type	__func__.9137, %object
-	.size	__func__.9137, 11
-__func__.9137:
+	.section	.rodata.__func__.9148,"a",%progbits
+	.set	.LANCHOR150,. + 0
+	.type	__func__.9148, %object
+	.size	__func__.9148, 11
+__func__.9148:
 	.ascii	"FtlLoadBbt\000"
-	.section	.rodata.__func__.9254,"a",%progbits
+	.section	.rodata.__func__.9263,"a",%progbits
 	.set	.LANCHOR49,. + 0
-	.type	__func__.9254, %object
-	.size	__func__.9254, 17
-__func__.9254:
+	.type	__func__.9263, %object
+	.size	__func__.9263, 17
+__func__.9263:
 	.ascii	"INSERT_FREE_LIST\000"
-	.section	.rodata.__func__.9259,"a",%progbits
+	.section	.rodata.__func__.9268,"a",%progbits
 	.set	.LANCHOR46,. + 0
-	.type	__func__.9259, %object
-	.size	__func__.9259, 17
-__func__.9259:
+	.type	__func__.9268, %object
+	.size	__func__.9268, 17
+__func__.9268:
 	.ascii	"INSERT_DATA_LIST\000"
-	.section	.rodata.__func__.9290,"a",%progbits
+	.section	.rodata.__func__.9299,"a",%progbits
 	.set	.LANCHOR50,. + 0
-	.type	__func__.9290, %object
-	.size	__func__.9290, 17
-__func__.9290:
+	.type	__func__.9299, %object
+	.size	__func__.9299, 17
+__func__.9299:
 	.ascii	"List_remove_node\000"
-	.section	.rodata.__func__.9322,"a",%progbits
-	.set	.LANCHOR54,. + 0
-	.type	__func__.9322, %object
-	.size	__func__.9322, 22
-__func__.9322:
-	.ascii	"List_update_data_list\000"
 	.section	.rodata.__func__.9331,"a",%progbits
-	.set	.LANCHOR140,. + 0
+	.set	.LANCHOR54,. + 0
 	.type	__func__.9331, %object
-	.size	__func__.9331, 16
+	.size	__func__.9331, 22
 __func__.9331:
+	.ascii	"List_update_data_list\000"
+	.section	.rodata.__func__.9340,"a",%progbits
+	.set	.LANCHOR156,. + 0
+	.type	__func__.9340, %object
+	.size	__func__.9340, 16
+__func__.9340:
 	.ascii	"load_l2p_region\000"
-	.section	.rodata.__func__.9364,"a",%progbits
-	.set	.LANCHOR116,. + 0
-	.type	__func__.9364, %object
-	.size	__func__.9364, 26
-__func__.9364:
+	.section	.rodata.__func__.9373,"a",%progbits
+	.set	.LANCHOR107,. + 0
+	.type	__func__.9373, %object
+	.size	__func__.9373, 26
+__func__.9373:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.section	.rodata.__func__.9375,"a",%progbits
-	.set	.LANCHOR143,. + 0
-	.type	__func__.9375, %object
-	.size	__func__.9375, 15
-__func__.9375:
+	.section	.rodata.__func__.9384,"a",%progbits
+	.set	.LANCHOR157,. + 0
+	.type	__func__.9384, %object
+	.size	__func__.9384, 15
+__func__.9384:
 	.ascii	"ftl_map_blk_gc\000"
-	.section	.rodata.__func__.9389,"a",%progbits
-	.set	.LANCHOR141,. + 0
-	.type	__func__.9389, %object
-	.size	__func__.9389, 31
-__func__.9389:
+	.section	.rodata.__func__.9399,"a",%progbits
+	.set	.LANCHOR154,. + 0
+	.type	__func__.9399, %object
+	.size	__func__.9399, 31
+__func__.9399:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.section	.rodata.__func__.9403,"a",%progbits
-	.set	.LANCHOR142,. + 0
-	.type	__func__.9403, %object
-	.size	__func__.9403, 16
-__func__.9403:
+	.section	.rodata.__func__.9413,"a",%progbits
+	.set	.LANCHOR155,. + 0
+	.type	__func__.9413, %object
+	.size	__func__.9413, 16
+__func__.9413:
 	.ascii	"FtlMapWritePage\000"
-	.section	.rodata.__func__.9428,"a",%progbits
+	.section	.rodata.__func__.9438,"a",%progbits
 	.set	.LANCHOR57,. + 0
-	.type	__func__.9428, %object
-	.size	__func__.9428, 22
-__func__.9428:
+	.type	__func__.9438, %object
+	.size	__func__.9438, 22
+__func__.9438:
 	.ascii	"select_l2p_ram_region\000"
-	.section	.rodata.__func__.9445,"a",%progbits
-	.set	.LANCHOR145,. + 0
-	.type	__func__.9445, %object
-	.size	__func__.9445, 9
-__func__.9445:
+	.section	.rodata.__func__.9455,"a",%progbits
+	.set	.LANCHOR159,. + 0
+	.type	__func__.9455, %object
+	.size	__func__.9455, 9
+__func__.9455:
 	.ascii	"log2phys\000"
-	.section	.rodata.__func__.9518,"a",%progbits
-	.set	.LANCHOR166,. + 0
-	.type	__func__.9518, %object
-	.size	__func__.9518, 15
-__func__.9518:
+	.section	.rodata.__func__.9528,"a",%progbits
+	.set	.LANCHOR171,. + 0
+	.type	__func__.9528, %object
+	.size	__func__.9528, 15
+__func__.9528:
 	.ascii	"FtlVpcTblFlush\000"
-	.section	.rodata.__func__.9540,"a",%progbits
-	.set	.LANCHOR148,. + 0
-	.type	__func__.9540, %object
-	.size	__func__.9540, 14
-__func__.9540:
+	.section	.rodata.__func__.9550,"a",%progbits
+	.set	.LANCHOR149,. + 0
+	.type	__func__.9550, %object
+	.size	__func__.9550, 14
+__func__.9550:
 	.ascii	"FtlScanSysBlk\000"
-	.section	.rodata.__func__.9597,"a",%progbits
-	.set	.LANCHOR180,. + 0
-	.type	__func__.9597, %object
-	.size	__func__.9597, 15
-__func__.9597:
+	.section	.rodata.__func__.9607,"a",%progbits
+	.set	.LANCHOR151,. + 0
+	.type	__func__.9607, %object
+	.size	__func__.9607, 15
+__func__.9607:
 	.ascii	"FtlLoadSysInfo\000"
-	.section	.rodata.__func__.9660,"a",%progbits
-	.set	.LANCHOR146,. + 0
-	.type	__func__.9660, %object
-	.size	__func__.9660, 16
-__func__.9660:
-	.ascii	"FtlReUsePrevPpa\000"
-	.section	.rodata.__func__.9694,"a",%progbits
+	.section	.rodata.__func__.9670,"a",%progbits
 	.set	.LANCHOR160,. + 0
-	.type	__func__.9694, %object
-	.size	__func__.9694, 22
-__func__.9694:
+	.type	__func__.9670, %object
+	.size	__func__.9670, 16
+__func__.9670:
+	.ascii	"FtlReUsePrevPpa\000"
+	.section	.rodata.__func__.9704,"a",%progbits
+	.set	.LANCHOR166,. + 0
+	.type	__func__.9704, %object
+	.size	__func__.9704, 22
+__func__.9704:
 	.ascii	"FtlRecoverySuperblock\000"
-	.section	.rodata.__func__.9751,"a",%progbits
+	.section	.rodata.__func__.9761,"a",%progbits
 	.set	.LANCHOR60,. + 0
-	.type	__func__.9751, %object
-	.size	__func__.9751, 16
-__func__.9751:
+	.type	__func__.9761, %object
+	.size	__func__.9761, 16
+__func__.9761:
 	.ascii	"make_superblock\000"
-	.section	.rodata.__func__.9772,"a",%progbits
-	.set	.LANCHOR154,. + 0
-	.type	__func__.9772, %object
-	.size	__func__.9772, 18
-__func__.9772:
+	.section	.rodata.__func__.9782,"a",%progbits
+	.set	.LANCHOR146,. + 0
+	.type	__func__.9782, %object
+	.size	__func__.9782, 18
+__func__.9782:
 	.ascii	"SupperBlkListInit\000"
-	.section	.rodata.__func__.9797,"a",%progbits
-	.set	.LANCHOR168,. + 0
-	.type	__func__.9797, %object
-	.size	__func__.9797, 21
-__func__.9797:
+	.section	.rodata.__func__.9807,"a",%progbits
+	.set	.LANCHOR173,. + 0
+	.type	__func__.9807, %object
+	.size	__func__.9807, 21
+__func__.9807:
 	.ascii	"FtlVpcCheckAndModify\000"
-	.section	.rodata.__func__.9813,"a",%progbits
-	.set	.LANCHOR155,. + 0
-	.type	__func__.9813, %object
-	.size	__func__.9813, 14
-__func__.9813:
+	.section	.rodata.__func__.9823,"a",%progbits
+	.set	.LANCHOR161,. + 0
+	.type	__func__.9823, %object
+	.size	__func__.9823, 14
+__func__.9823:
 	.ascii	"ftl_check_vpc\000"
-	.section	.rodata.__func__.9898,"a",%progbits
-	.set	.LANCHOR157,. + 0
-	.type	__func__.9898, %object
-	.size	__func__.9898, 25
-__func__.9898:
+	.section	.rodata.__func__.9908,"a",%progbits
+	.set	.LANCHOR163,. + 0
+	.type	__func__.9908, %object
+	.size	__func__.9908, 25
+__func__.9908:
 	.ascii	"allocate_data_superblock\000"
-	.section	.rodata.__func__.9919,"a",%progbits
-	.set	.LANCHOR169,. + 0
-	.type	__func__.9919, %object
-	.size	__func__.9919, 29
-__func__.9919:
+	.section	.rodata.__func__.9929,"a",%progbits
+	.set	.LANCHOR174,. + 0
+	.type	__func__.9929, %object
+	.size	__func__.9929, 29
+__func__.9929:
 	.ascii	"allocate_new_data_superblock\000"
-	.section	.rodata.__func__.9926,"a",%progbits
+	.section	.rodata.__func__.9936,"a",%progbits
 	.set	.LANCHOR88,. + 0
-	.type	__func__.9926, %object
-	.size	__func__.9926, 19
-__func__.9926:
+	.type	__func__.9936, %object
+	.size	__func__.9936, 19
+__func__.9936:
 	.ascii	"get_new_active_ppa\000"
-	.section	.rodata.__func__.9939,"a",%progbits
-	.set	.LANCHOR158,. + 0
-	.type	__func__.9939, %object
-	.size	__func__.9939, 16
-__func__.9939:
+	.section	.rodata.__func__.9949,"a",%progbits
+	.set	.LANCHOR164,. + 0
+	.type	__func__.9949, %object
+	.size	__func__.9949, 16
+__func__.9949:
 	.ascii	"update_vpc_list\000"
-	.section	.rodata.__func__.9946,"a",%progbits
-	.set	.LANCHOR159,. + 0
-	.type	__func__.9946, %object
-	.size	__func__.9946, 20
-__func__.9946:
+	.section	.rodata.__func__.9956,"a",%progbits
+	.set	.LANCHOR165,. + 0
+	.type	__func__.9956, %object
+	.size	__func__.9956, 20
+__func__.9956:
 	.ascii	"decrement_vpc_count\000"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",%progbits,1
-.LC101:
+.LC105:
 	.ascii	"decrement_vpc_count %x = %d\012\000"
 	.section	.rodata.ftl_check_vpc.str1.1,"aMS",%progbits,1
 .LC94:
@@ -15821,25 +16304,27 @@ __func__.9946:
 .LC96:
 	.ascii	"free blk vpc error %x = %x  %x\012\000"
 	.section	.rodata.ftl_map_blk_alloc_new_blk.str1.1,"aMS",%progbits,1
-.LC84:
+.LC83:
 	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d\012\000"
 	.section	.rodata.ftl_scan_all_data.str1.1,"aMS",%progbits,1
-.LC91:
+.LC97:
 	.ascii	"ftl_scan_all_data = %x\012\000"
-.LC92:
+.LC98:
 	.ascii	"scan lpa = %x ppa= %x\012\000"
-.LC93:
+.LC99:
 	.ascii	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\012"
 	.ascii	"\000"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",%progbits,1
-.LC86:
+.LC90:
 	.ascii	"region_id = %x phyAddr = %x\012\000"
-.LC87:
+.LC91:
 	.ascii	"spare:\000"
-.LC88:
+.LC92:
 	.ascii	"map_ppn:\000"
+.LC93:
+	.ascii	"load_l2p_region refresh = %x phyAddr = %x\012\000"
 	.section	.rodata.rk_ftl_garbage_collect.str1.1,"aMS",%progbits,1
-.LC107:
+.LC112:
 	.ascii	"SWL %x, FSB = %x vpc= %x,ec=%x th=%x\012\000"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",%progbits,1
 .LC75:
@@ -15852,10 +16337,14 @@ __func__.9946:
 	.ascii	"\012\000"
 	.section	.rodata.rknand_proc_ftlread.str1.1,"aMS",%progbits,1
 .LC70:
-	.ascii	"SFTL version: 5.0.44 20180713\000"
+	.ascii	"SFTL version: 5.0.48 20180930\000"
 .LC71:
 	.ascii	"%s\012\000"
 	.section	.rodata.sftl_write.str1.1,"aMS",%progbits,1
-.LC109:
+.LC114:
+	.ascii	"write_idblock fix data %x %x %x\012\000"
+.LC115:
 	.ascii	"write_idblock fail! %x %x %x %x\012\000"
+.LC116:
+	.ascii	"%s idb buffer alloc fail\012\000"
 	.hidden	free
diff --git a/drivers/rkflash/rk_sftl_arm_v8.S b/drivers/rkflash/rk_sftl_arm_v8.S
index 4211de05f7..83c74a38c1 100644
--- a/drivers/rkflash/rk_sftl_arm_v8.S
+++ b/drivers/rkflash/rk_sftl_arm_v8.S
@@ -1,8 +1,8 @@
 /*
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
- * SPDX-License-Identifier:	GPL-2.0
- * date: 2018-08-02
+ * SPDX-License-Identifier:    GPL-2.0
+ * date: 2018-09-30
  */
 	.arch armv8-a+nosimd
 	.file	"rk_sftl.c"
@@ -698,7 +698,7 @@ INSERT_DATA_LIST:
 	cmp	w1, w0
 	bcs	.L85
 	ldp	x29, x30, [sp], 16
-	mov	w2, 221
+	mov	w2, 214
 	adrp	x1, .LANCHOR46
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR46
@@ -795,7 +795,7 @@ INSERT_FREE_LIST:
 	cmp	w1, w0
 	bcs	.L95
 	ldp	x29, x30, [sp], 16
-	mov	w2, 214
+	mov	w2, 207
 	adrp	x1, .LANCHOR49
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR49
@@ -831,7 +831,7 @@ List_remove_node:
 	beq	.L99
 	adrp	x1, .LANCHOR50
 	adrp	x0, .LC1
-	mov	w2, 379
+	mov	w2, 372
 	add	x1, x1, :lo12:.LANCHOR50
 	add	x0, x0, :lo12:.LC1
 	bl	printf
@@ -1022,7 +1022,7 @@ List_update_data_list:
 	bne	.L128
 	adrp	x1, .LANCHOR54
 	adrp	x0, .LC1
-	mov	w2, 470
+	mov	w2, 463
 	add	x1, x1, :lo12:.LANCHOR54
 	add	x0, x0, :lo12:.LC1
 	bl	printf
@@ -1059,7 +1059,7 @@ List_update_data_list:
 	cbnz	w0, .L131
 	adrp	x1, .LANCHOR54
 	adrp	x0, .LC1
-	mov	w2, 481
+	mov	w2, 474
 	add	x1, x1, :lo12:.LANCHOR54
 	add	x0, x0, :lo12:.LC1
 	bl	printf
@@ -1115,7 +1115,7 @@ select_l2p_ram_region:
 	bne	.L144
 	cmp	w19, w1
 	bcc	.L137
-	mov	w2, 784
+	mov	w2, 787
 	adrp	x1, .LANCHOR57
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR57
@@ -1345,7 +1345,7 @@ make_superblock:
 	bcc	.L173
 	adrp	x1, .LANCHOR60
 	adrp	x0, .LC1
-	mov	w2, 2097
+	mov	w2, 2110
 	add	x1, x1, :lo12:.LANCHOR60
 	add	x0, x0, :lo12:.LC1
 	bl	printf
@@ -1364,11 +1364,10 @@ make_superblock:
 	bhi	.L176
 	adrp	x1, .LANCHOR19
 	ldrb	w0, [x19, 7]
+	strb	wzr, [x19, 9]
 	ldrh	w1, [x1, #:lo12:.LANCHOR19]
 	mul	w0, w0, w1
 	strh	w0, [x19, 4]
-	mov	w0, 1
-	strb	w0, [x19, 9]
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -1530,8 +1529,9 @@ GetFreeBlockMaxEraseCount:
 	.type	FtlPrintInfo2buf, %function
 FtlPrintInfo2buf:
 	stp	x29, x30, [sp, -96]!
-	adrp	x1, .LC2
-	add	x1, x1, :lo12:.LC2
+	mov	x1, 64
+	adrp	x2, .LC2
+	add	x2, x2, :lo12:.LC2
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR37
@@ -1542,444 +1542,508 @@ FtlPrintInfo2buf:
 	stp	x25, x26, [sp, 64]
 	adrp	x22, .LANCHOR39
 	str	x27, [sp, 80]
-	bl	sprintf
+	bl	snprintf
 	add	x20, x21, x0, sxtw
 	adrp	x0, .LANCHOR26
-	adrp	x1, .LC3
-	add	x1, x1, :lo12:.LC3
-	ldr	w2, [x0, #:lo12:.LANCHOR26]
+	mov	x1, 64
+	adrp	x2, .LC3
+	ldr	w3, [x0, #:lo12:.LANCHOR26]
+	add	x2, x2, :lo12:.LC3
 	mov	x0, x20
 	add	x22, x22, :lo12:.LANCHOR39
 	adrp	x24, .LANCHOR51
-	adrp	x25, .LANCHOR80
-	bl	sprintf
+	adrp	x25, .LANCHOR81
+	add	x25, x25, :lo12:.LANCHOR81
+	bl	snprintf
 	add	x20, x20, x0, sxtw
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC4
-	add	x1, x1, :lo12:.LC4
-	bl	sprintf
+	adrp	x2, .LC4
+	add	x2, x2, :lo12:.LC4
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR61
-	adrp	x1, .LC5
-	add	x1, x1, :lo12:.LC5
-	ldr	w2, [x0, #:lo12:.LANCHOR61]
+	mov	x1, 64
+	adrp	x2, .LC5
+	add	x2, x2, :lo12:.LC5
+	ldr	w3, [x0, #:lo12:.LANCHOR61]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR59
-	adrp	x1, .LC6
-	add	x1, x1, :lo12:.LC6
-	ldr	w2, [x0, #:lo12:.LANCHOR59]
+	mov	x1, 64
+	adrp	x2, .LC6
+	add	x2, x2, :lo12:.LC6
+	ldr	w3, [x0, #:lo12:.LANCHOR59]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR62
-	adrp	x1, .LC7
-	add	x1, x1, :lo12:.LC7
-	ldr	w2, [x0, #:lo12:.LANCHOR62]
+	mov	x1, 64
+	adrp	x2, .LC7
+	add	x2, x2, :lo12:.LC7
+	ldr	w3, [x0, #:lo12:.LANCHOR62]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR63
-	adrp	x1, .LC8
-	add	x1, x1, :lo12:.LC8
-	ldr	w2, [x0, #:lo12:.LANCHOR63]
+	mov	x1, 64
+	adrp	x2, .LC8
+	add	x2, x2, :lo12:.LC8
+	ldr	w3, [x0, #:lo12:.LANCHOR63]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR64
-	adrp	x1, .LC9
-	add	x1, x1, :lo12:.LC9
-	ldr	w2, [x0, #:lo12:.LANCHOR64]
+	mov	x1, 64
+	adrp	x2, .LC9
+	add	x2, x2, :lo12:.LC9
+	ldr	w3, [x0, #:lo12:.LANCHOR64]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR65
-	adrp	x1, .LC10
-	add	x1, x1, :lo12:.LC10
-	ldr	w2, [x0, #:lo12:.LANCHOR65]
+	mov	x1, 64
+	adrp	x2, .LC10
+	add	x2, x2, :lo12:.LC10
+	ldr	w3, [x0, #:lo12:.LANCHOR65]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR66
-	adrp	x1, .LC11
-	add	x1, x1, :lo12:.LC11
-	ldr	w2, [x0, #:lo12:.LANCHOR66]
+	mov	x1, 64
+	adrp	x2, .LC11
+	add	x2, x2, :lo12:.LC11
+	ldr	w3, [x0, #:lo12:.LANCHOR66]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR67
-	adrp	x1, .LC12
-	add	x1, x1, :lo12:.LC12
-	ldr	w2, [x0, #:lo12:.LANCHOR67]
+	mov	x1, 64
+	adrp	x2, .LC12
+	add	x2, x2, :lo12:.LC12
+	ldr	w3, [x0, #:lo12:.LANCHOR67]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR68
-	adrp	x1, .LC13
-	add	x1, x1, :lo12:.LC13
-	ldr	w2, [x0, #:lo12:.LANCHOR68]
+	mov	x1, 64
+	adrp	x2, .LC13
+	add	x2, x2, :lo12:.LC13
+	ldr	w3, [x0, #:lo12:.LANCHOR68]
 	mov	x0, x20
-	lsr	w2, w2, 11
-	bl	sprintf
+	lsr	w3, w3, 11
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR69
-	adrp	x1, .LC14
-	add	x1, x1, :lo12:.LC14
-	ldr	w2, [x0, #:lo12:.LANCHOR69]
+	mov	x1, 64
+	adrp	x2, .LC14
+	ldr	w3, [x0, #:lo12:.LANCHOR69]
+	add	x2, x2, :lo12:.LC14
 	mov	x0, x20
-	lsr	w2, w2, 11
-	bl	sprintf
+	lsr	w3, w3, 11
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR70
-	adrp	x1, .LC15
-	add	x1, x1, :lo12:.LC15
-	ldr	w2, [x0, #:lo12:.LANCHOR70]
+	mov	x1, 64
+	adrp	x2, .LC15
+	ldr	w3, [x0, #:lo12:.LANCHOR70]
+	add	x2, x2, :lo12:.LC15
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR71
-	adrp	x1, .LC16
-	add	x1, x1, :lo12:.LC16
-	ldr	w2, [x0, #:lo12:.LANCHOR71]
+	mov	x1, 64
+	adrp	x2, .LC16
+	add	x2, x2, :lo12:.LC16
+	ldr	w3, [x0, #:lo12:.LANCHOR71]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	add	x0, x19, :lo12:.LANCHOR37
-	adrp	x1, .LC17
-	add	x1, x1, :lo12:.LC17
-	ldrh	w2, [x0, 6]
+	mov	x1, 64
+	adrp	x2, .LC17
+	add	x2, x2, :lo12:.LC17
+	ldrh	w3, [x0, 6]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x23, #:lo12:.LANCHOR48]
+	ldrh	w3, [x23, #:lo12:.LANCHOR48]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC18
-	add	x1, x1, :lo12:.LC18
-	bl	sprintf
+	adrp	x2, .LC18
+	add	x2, x2, :lo12:.LC18
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR72
-	adrp	x1, .LC19
-	add	x1, x1, :lo12:.LC19
-	ldr	w2, [x0, #:lo12:.LANCHOR72]
+	mov	x1, 64
+	adrp	x2, .LC19
+	add	x2, x2, :lo12:.LC19
+	ldr	w3, [x0, #:lo12:.LANCHOR72]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR73
-	adrp	x1, .LC20
-	add	x1, x1, :lo12:.LC20
-	ldr	w2, [x0, #:lo12:.LANCHOR73]
+	mov	x1, 64
+	adrp	x2, .LC20
+	add	x2, x2, :lo12:.LC20
+	ldr	w3, [x0, #:lo12:.LANCHOR73]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR74
-	adrp	x1, .LC21
-	add	x1, x1, :lo12:.LC21
-	ldr	w2, [x0, #:lo12:.LANCHOR74]
+	mov	x1, 64
+	adrp	x2, .LC21
+	add	x2, x2, :lo12:.LC21
+	ldr	w3, [x0, #:lo12:.LANCHOR74]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR75
-	adrp	x1, .LC22
-	add	x1, x1, :lo12:.LC22
-	ldr	w2, [x0, #:lo12:.LANCHOR75]
+	mov	x1, 64
+	adrp	x2, .LC22
+	add	x2, x2, :lo12:.LC22
+	ldr	w3, [x0, #:lo12:.LANCHOR75]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR76
-	adrp	x1, .LC23
-	add	x1, x1, :lo12:.LC23
-	ldr	w2, [x0, #:lo12:.LANCHOR76]
+	mov	x1, 64
+	adrp	x2, .LC23
+	add	x2, x2, :lo12:.LC23
+	ldr	w3, [x0, #:lo12:.LANCHOR76]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR77
-	adrp	x1, .LC24
-	add	x1, x1, :lo12:.LC24
-	ldr	w2, [x0, #:lo12:.LANCHOR77]
+	mov	x1, 64
+	adrp	x2, .LC24
+	add	x2, x2, :lo12:.LC24
+	ldr	w3, [x0, #:lo12:.LANCHOR77]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x22, 30]
+	ldrh	w3, [x22, 30]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC25
-	add	x1, x1, :lo12:.LC25
-	bl	sprintf
+	adrp	x2, .LC25
+	add	x2, x2, :lo12:.LC25
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x22, 28]
+	ldrh	w3, [x22, 28]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC26
-	add	x1, x1, :lo12:.LC26
+	adrp	x2, .LC26
+	add	x2, x2, :lo12:.LC26
 	adrp	x22, .LANCHOR42
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR34
-	adrp	x1, .LC27
-	add	x1, x1, :lo12:.LC27
-	ldr	w2, [x0, #:lo12:.LANCHOR34]
+	mov	x1, 64
+	adrp	x2, .LC27
+	add	x2, x2, :lo12:.LC27
+	ldr	w3, [x0, #:lo12:.LANCHOR34]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR31
-	adrp	x1, .LC28
-	add	x1, x1, :lo12:.LC28
-	ldr	w2, [x0, #:lo12:.LANCHOR31]
+	mov	x1, 64
+	adrp	x2, .LC28
+	add	x2, x2, :lo12:.LC28
+	ldr	w3, [x0, #:lo12:.LANCHOR31]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR2
-	adrp	x1, .LC29
-	add	x1, x1, :lo12:.LC29
-	ldr	w2, [x0, #:lo12:.LANCHOR2]
+	mov	x1, 64
+	adrp	x2, .LC29
+	add	x2, x2, :lo12:.LC29
+	ldr	w3, [x0, #:lo12:.LANCHOR2]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR38+6
-	adrp	x1, .LC30
-	add	x1, x1, :lo12:.LC30
-	ldrh	w2, [x0, #:lo12:.LANCHOR38+6]
+	mov	x1, 64
+	adrp	x2, .LC30
+	add	x2, x2, :lo12:.LC30
+	ldrh	w3, [x0, #:lo12:.LANCHOR38+6]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR5
-	adrp	x1, .LC31
-	add	x1, x1, :lo12:.LC31
-	ldrh	w2, [x0, #:lo12:.LANCHOR5]
+	mov	x1, 64
+	adrp	x2, .LC31
+	add	x2, x2, :lo12:.LC31
+	ldrh	w3, [x0, #:lo12:.LANCHOR5]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR78
-	adrp	x1, .LC32
-	add	x1, x1, :lo12:.LC32
-	ldrh	w2, [x0, #:lo12:.LANCHOR78]
+	mov	x1, 64
+	adrp	x2, .LC32
+	add	x2, x2, :lo12:.LC32
+	ldrh	w3, [x0, #:lo12:.LANCHOR78]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR7
-	adrp	x1, .LC33
-	add	x1, x1, :lo12:.LC33
-	ldr	w2, [x0, #:lo12:.LANCHOR7]
+	mov	x1, 64
+	adrp	x2, .LC33
+	add	x2, x2, :lo12:.LC33
+	ldr	w3, [x0, #:lo12:.LANCHOR7]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR79
-	adrp	x1, .LC34
-	add	x1, x1, :lo12:.LC34
-	ldrh	w2, [x0, #:lo12:.LANCHOR79]
+	mov	x1, 64
+	adrp	x2, .LC34
+	add	x2, x2, :lo12:.LC34
+	ldrh	w3, [x0, #:lo12:.LANCHOR79]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x19, #:lo12:.LANCHOR37]
+	ldrh	w3, [x19, #:lo12:.LANCHOR37]
 	add	x19, x24, :lo12:.LANCHOR51
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC35
-	add	x1, x1, :lo12:.LC35
-	bl	sprintf
+	adrp	x2, .LC35
+	add	x2, x2, :lo12:.LC35
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x19, 2]
+	ldrh	w3, [x19, 2]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC36
-	add	x1, x1, :lo12:.LC36
-	bl	sprintf
+	adrp	x2, .LC36
+	add	x2, x2, :lo12:.LC36
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrb	w2, [x19, 6]
+	ldrb	w3, [x19, 6]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC37
-	add	x1, x1, :lo12:.LC37
-	bl	sprintf
+	adrp	x2, .LC37
+	add	x2, x2, :lo12:.LC37
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x24, #:lo12:.LANCHOR51]
+	ldrh	w3, [x24, #:lo12:.LANCHOR51]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC38
-	add	x1, x1, :lo12:.LC38
-	bl	sprintf
+	adrp	x2, .LC38
+	add	x2, x2, :lo12:.LC38
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrb	w2, [x19, 8]
+	ldrb	w3, [x19, 8]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC39
-	add	x1, x1, :lo12:.LC39
-	bl	sprintf
+	adrp	x2, .LC39
+	add	x2, x2, :lo12:.LC39
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x19, 4]
+	ldrh	w3, [x19, 4]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC40
-	add	x1, x1, :lo12:.LC40
-	bl	sprintf
+	adrp	x2, .LC40
+	add	x2, x2, :lo12:.LC40
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	ldrh	w1, [x24, #:lo12:.LANCHOR51]
 	adrp	x24, .LANCHOR52
 	ldr	x0, [x22, #:lo12:.LANCHOR42]
 	add	x19, x24, :lo12:.LANCHOR52
-	ldrh	w2, [x0, x1, lsl 1]
+	adrp	x2, .LC41
+	add	x2, x2, :lo12:.LC41
+	ldrh	w3, [x0, x1, lsl 1]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC41
-	add	x1, x1, :lo12:.LC41
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x19, 2]
+	ldrh	w3, [x19, 2]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC42
-	add	x1, x1, :lo12:.LC42
-	bl	sprintf
+	adrp	x2, .LC42
+	add	x2, x2, :lo12:.LC42
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrb	w2, [x19, 6]
+	ldrb	w3, [x19, 6]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC43
-	add	x1, x1, :lo12:.LC43
-	bl	sprintf
+	adrp	x2, .LC43
+	add	x2, x2, :lo12:.LC43
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x24, #:lo12:.LANCHOR52]
+	ldrh	w3, [x24, #:lo12:.LANCHOR52]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC44
-	add	x1, x1, :lo12:.LC44
-	bl	sprintf
+	adrp	x2, .LC44
+	add	x2, x2, :lo12:.LC44
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrb	w2, [x19, 8]
+	ldrb	w3, [x19, 8]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC45
-	add	x1, x1, :lo12:.LC45
-	bl	sprintf
+	adrp	x2, .LC45
+	add	x2, x2, :lo12:.LC45
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x19, 4]
+	ldrh	w3, [x19, 4]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC46
-	add	x1, x1, :lo12:.LC46
-	bl	sprintf
+	adrp	x2, .LC46
+	add	x2, x2, :lo12:.LC46
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	ldrh	w1, [x24, #:lo12:.LANCHOR52]
 	adrp	x24, .LANCHOR53
 	ldr	x0, [x22, #:lo12:.LANCHOR42]
 	add	x19, x24, :lo12:.LANCHOR53
-	ldrh	w2, [x0, x1, lsl 1]
+	adrp	x2, .LC47
+	add	x2, x2, :lo12:.LC47
+	ldrh	w3, [x0, x1, lsl 1]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC47
-	add	x1, x1, :lo12:.LC47
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x19, 2]
+	ldrh	w3, [x19, 2]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC48
-	add	x1, x1, :lo12:.LC48
-	bl	sprintf
+	adrp	x2, .LC48
+	add	x2, x2, :lo12:.LC48
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrb	w2, [x19, 6]
+	ldrb	w3, [x19, 6]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC49
-	add	x1, x1, :lo12:.LC49
-	bl	sprintf
+	adrp	x2, .LC49
+	add	x2, x2, :lo12:.LC49
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x24, #:lo12:.LANCHOR53]
+	ldrh	w3, [x24, #:lo12:.LANCHOR53]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC50
-	add	x1, x1, :lo12:.LC50
-	adrp	x24, .LANCHOR81
-	add	x24, x24, :lo12:.LANCHOR81
-	bl	sprintf
+	adrp	x2, .LC50
+	add	x2, x2, :lo12:.LC50
+	adrp	x24, .LANCHOR80
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrb	w2, [x19, 8]
+	ldrb	w3, [x19, 8]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC51
-	add	x1, x1, :lo12:.LC51
-	bl	sprintf
+	adrp	x2, .LC51
+	add	x2, x2, :lo12:.LC51
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x19, 4]
-	add	x19, x25, :lo12:.LANCHOR80
+	ldrh	w3, [x19, 4]
+	add	x19, x24, :lo12:.LANCHOR80
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC52
-	add	x1, x1, :lo12:.LC52
-	bl	sprintf
+	adrp	x2, .LC52
+	add	x2, x2, :lo12:.LC52
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x19, 2]
+	ldrh	w3, [x19, 2]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC53
-	add	x1, x1, :lo12:.LC53
-	bl	sprintf
+	adrp	x2, .LC53
+	add	x2, x2, :lo12:.LC53
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrb	w2, [x19, 6]
+	ldrb	w3, [x19, 6]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC54
-	add	x1, x1, :lo12:.LC54
-	bl	sprintf
+	adrp	x2, .LC54
+	add	x2, x2, :lo12:.LC54
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x25, #:lo12:.LANCHOR80]
+	ldrh	w3, [x24, #:lo12:.LANCHOR80]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC55
-	add	x1, x1, :lo12:.LC55
-	bl	sprintf
+	adrp	x2, .LC55
+	add	x2, x2, :lo12:.LC55
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrb	w2, [x19, 8]
+	ldrb	w3, [x19, 8]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC56
-	add	x1, x1, :lo12:.LC56
-	bl	sprintf
+	adrp	x2, .LC56
+	add	x2, x2, :lo12:.LC56
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x19, 4]
+	ldrh	w3, [x19, 4]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC57
-	add	x1, x1, :lo12:.LC57
-	bl	sprintf
+	adrp	x2, .LC57
+	add	x2, x2, :lo12:.LC57
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldp	w4, w2, [x24, 76]
-	adrp	x1, .LC58
-	ldr	w3, [x24, 84]
-	add	x1, x1, :lo12:.LC58
+	ldp	w5, w3, [x25, 76]
+	mov	x1, 64
+	ldr	w4, [x25, 84]
+	adrp	x2, .LC58
 	mov	x0, x20
-	bl	sprintf
+	add	x2, x2, :lo12:.LC58
+	bl	snprintf
 	add	x19, x20, x0, sxtw
-	ldr	w2, [x24, 72]
+	ldr	w3, [x25, 72]
+	mov	x1, 64
 	mov	x0, x19
-	adrp	x1, .LC59
-	add	x1, x1, :lo12:.LC59
-	bl	sprintf
+	adrp	x2, .LC59
+	add	x2, x2, :lo12:.LC59
+	bl	snprintf
 	add	x19, x19, x0, sxtw
-	ldr	w2, [x24, 96]
+	ldr	w3, [x25, 96]
+	mov	x1, 64
 	mov	x0, x19
-	adrp	x1, .LC60
-	add	x1, x1, :lo12:.LC60
-	bl	sprintf
+	adrp	x2, .LC60
+	add	x2, x2, :lo12:.LC60
+	bl	snprintf
 	add	x19, x19, x0, sxtw
 	adrp	x0, .LANCHOR82
-	adrp	x1, .LC61
-	add	x1, x1, :lo12:.LC61
-	ldrh	w2, [x0, #:lo12:.LANCHOR82]
+	mov	x1, 64
+	adrp	x2, .LC61
+	add	x2, x2, :lo12:.LC61
+	ldrh	w3, [x0, #:lo12:.LANCHOR82]
 	mov	x0, x19
-	bl	sprintf
+	bl	snprintf
 	add	x19, x19, x0, sxtw
 	adrp	x0, .LANCHOR83
-	adrp	x1, .LC62
-	add	x1, x1, :lo12:.LC62
-	ldrh	w2, [x0, #:lo12:.LANCHOR83]
+	mov	x1, 64
+	adrp	x2, .LC62
+	add	x2, x2, :lo12:.LC62
+	ldrh	w3, [x0, #:lo12:.LANCHOR83]
 	mov	x0, x19
-	bl	sprintf
+	bl	snprintf
 	add	x19, x19, x0, sxtw
 	adrp	x0, .LANCHOR84
-	adrp	x1, .LC63
-	add	x1, x1, :lo12:.LC63
-	ldr	w2, [x0, #:lo12:.LANCHOR84]
+	mov	x1, 64
+	adrp	x2, .LC63
+	add	x2, x2, :lo12:.LC63
+	ldr	w3, [x0, #:lo12:.LANCHOR84]
 	mov	x0, x19
-	bl	sprintf
+	bl	snprintf
 	add	x19, x19, x0, sxtw
 	adrp	x0, .LANCHOR85
-	adrp	x1, .LC64
-	add	x1, x1, :lo12:.LC64
-	ldrh	w2, [x0, #:lo12:.LANCHOR85]
+	adrp	x2, .LC64
+	add	x2, x2, :lo12:.LC64
+	mov	x1, 64
+	ldrh	w3, [x0, #:lo12:.LANCHOR85]
 	mov	x0, x19
-	bl	sprintf
+	bl	snprintf
 	add	x19, x19, x0, sxtw
 	bl	GetFreeBlockMinEraseCount
-	and	w2, w0, 65535
-	adrp	x1, .LC65
+	and	w3, w0, 65535
+	mov	x1, 64
 	mov	x0, x19
-	add	x1, x1, :lo12:.LC65
-	bl	sprintf
+	adrp	x2, .LC65
+	add	x2, x2, :lo12:.LC65
+	bl	snprintf
 	add	x19, x19, x0, sxtw
 	ldrh	w0, [x23, #:lo12:.LANCHOR48]
 	bl	GetFreeBlockMaxEraseCount
-	and	w2, w0, 65535
-	adrp	x1, .LC66
+	and	w3, w0, 65535
+	adrp	x2, .LC66
 	mov	x0, x19
-	add	x1, x1, :lo12:.LC66
-	bl	sprintf
+	add	x2, x2, :lo12:.LC66
+	mov	x1, 64
+	bl	snprintf
 	add	x19, x19, x0, sxtw
 	adrp	x0, .LANCHOR86
 	ldr	w0, [x0, #:lo12:.LANCHOR86]
@@ -1995,87 +2059,90 @@ FtlPrintInfo2buf:
 	ldp	x29, x30, [sp], 96
 	ret
 .L203:
-	ldrh	w0, [x25, #:lo12:.LANCHOR80]
+	ldrh	w0, [x24, #:lo12:.LANCHOR80]
 	mov	w1, 65535
 	cmp	w0, w1
 	beq	.L205
 	ldr	x1, [x22, #:lo12:.LANCHOR42]
 	ubfiz	x0, x0, 1, 16
-	ldrh	w2, [x1, x0]
+	adrp	x2, .LC67
+	add	x2, x2, :lo12:.LC67
+	ldrh	w3, [x1, x0]
 	mov	x0, x19
-	adrp	x1, .LC67
-	add	x1, x1, :lo12:.LC67
-	bl	sprintf
+	mov	x1, 64
+	bl	snprintf
 	add	x19, x19, x0, sxtw
 .L205:
 	mov	w0, 0
 	adrp	x24, .LC68
 	bl	List_get_gc_head_node
 	add	x24, x24, :lo12:.LC68
-	and	w3, w0, 65535
+	and	w4, w0, 65535
 	mov	w23, 0
 	mov	w27, 65535
 	adrp	x20, .LANCHOR40
 	mov	w26, 6
 .L207:
-	cmp	w3, w27
+	cmp	w4, w27
 	beq	.L206
 	adrp	x0, .LANCHOR43
-	umull	x25, w3, w26
+	umull	x25, w4, w26
 	ldr	x2, [x22, #:lo12:.LANCHOR42]
-	ubfiz	x1, x3, 1, 16
-	ldr	x4, [x0, #:lo12:.LANCHOR43]
+	ubfiz	x1, x4, 1, 16
+	ldr	x3, [x0, #:lo12:.LANCHOR43]
 	ldr	x0, [x20, #:lo12:.LANCHOR40]
 	add	x0, x0, x25
-	ldrh	w6, [x4, x1]
-	ldrh	w4, [x2, x1]
-	mov	w2, w23
-	ldrh	w5, [x0, 4]
-	mov	x1, x24
+	ldrh	w5, [x2, x1]
+	ldrh	w7, [x3, x1]
+	mov	x2, x24
+	mov	w3, w23
+	mov	x1, 64
+	ldrh	w6, [x0, 4]
 	mov	x0, x19
 	add	w23, w23, 1
-	bl	sprintf
+	bl	snprintf
 	add	x19, x19, x0, sxtw
 	ldr	x0, [x20, #:lo12:.LANCHOR40]
 	cmp	w23, 16
-	ldrh	w3, [x0, x25]
+	ldrh	w4, [x0, x25]
 	bne	.L207
 .L206:
 	adrp	x0, .LANCHOR47
 	adrp	x23, .LC69
 	add	x23, x23, :lo12:.LC69
 	mov	w22, 0
-	ldr	x3, [x0, #:lo12:.LANCHOR47]
+	ldr	x4, [x0, #:lo12:.LANCHOR47]
 	mov	w25, 65535
 	ldr	x0, [x20, #:lo12:.LANCHOR40]
 	mov	w26, 6
 	adrp	x27, .LANCHOR43
-	sub	x3, x3, x0
+	sub	x4, x4, x0
 	mov	x0, -6148914691236517206
-	asr	x3, x3, 1
+	asr	x4, x4, 1
 	movk	x0, 0xaaab, lsl 0
-	mul	x3, x3, x0
-	and	w3, w3, 65535
+	mul	x4, x4, x0
+	and	w4, w4, 65535
 .L209:
-	cmp	w3, w25
+	cmp	w4, w25
 	beq	.L208
-	umull	x24, w3, w26
+	umull	x24, w4, w26
 	ldr	x0, [x20, #:lo12:.LANCHOR40]
 	ldr	x2, [x27, #:lo12:.LANCHOR43]
-	ubfiz	x1, x3, 1, 16
+	ubfiz	x1, x4, 1, 16
 	add	x0, x0, x24
-	ldrh	w5, [x2, x1]
-	mov	w2, w22
-	ldrh	w4, [x0, 4]
-	mov	x1, x23
-	mov	x0, x19
+	mov	w3, w22
 	add	w22, w22, 1
-	bl	sprintf
+	ldrh	w6, [x2, x1]
+	mov	x2, x23
+	ldrh	w5, [x0, 4]
+	mov	x1, 64
+	mov	x0, x19
+	bl	snprintf
 	add	x19, x19, x0, sxtw
 	cmp	w22, 4
 	beq	.L208
 	ldr	x0, [x20, #:lo12:.LANCHOR40]
-	ldrh	w3, [x0, x24]
+	ldrh	w4, [x0, x24]
 	b	.L209
 	.size	FtlPrintInfo2buf, .-FtlPrintInfo2buf
 	.section	.text.rknand_proc_ftlread,"ax",@progbits
@@ -2083,15 +2150,19 @@ FtlPrintInfo2buf:
 	.global	rknand_proc_ftlread
 	.type	rknand_proc_ftlread, %function
 rknand_proc_ftlread:
+	cmp	w0, 2047
+	ble	.L217
 	stp	x29, x30, [sp, -32]!
-	adrp	x2, .LC70
-	adrp	x1, .LC71
-	add	x2, x2, :lo12:.LC70
+	adrp	x3, .LC70
+	adrp	x2, .LC71
+	add	x3, x3, :lo12:.LC70
 	add	x29, sp, 0
-	add	x1, x1, :lo12:.LC71
+	add	x2, x2, :lo12:.LC71
 	stp	x19, x20, [sp, 16]
-	mov	x20, x0
-	bl	sprintf
+	mov	x20, x1
+	mov	x1, 64
+	mov	x0, x20
+	bl	snprintf
 	add	x19, x20, x0, sxtw
 	mov	x0, x19
 	bl	FtlPrintInfo2buf
@@ -2100,6 +2171,9 @@ rknand_proc_ftlread:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
+.L217:
+	mov	w0, 0
+	ret
 	.size	rknand_proc_ftlread, .-rknand_proc_ftlread
 	.section	.text.GetSwlReplaceBlock,"ax",@progbits
 	.align	2
@@ -2114,7 +2188,7 @@ GetSwlReplaceBlock:
 	ldr	w3, [x2, #:lo12:.LANCHOR74]
 	ldr	w7, [x8, #:lo12:.LANCHOR77]
 	cmp	w3, w7
-	bcs	.L218
+	bcs	.L223
 	adrp	x1, .LANCHOR5
 	adrp	x0, .LANCHOR72
 	mov	w5, 0
@@ -2124,12 +2198,12 @@ GetSwlReplaceBlock:
 	str	wzr, [x0, #:lo12:.LANCHOR72]
 	ldr	x6, [x1, #:lo12:.LANCHOR43]
 	mov	x1, 0
-.L219:
+.L224:
 	cmp	w3, w1
-	bhi	.L220
-	cbz	w5, .L221
+	bhi	.L225
+	cbz	w5, .L226
 	str	w4, [x0, #:lo12:.LANCHOR72]
-.L221:
+.L226:
 	ldr	w1, [x0, #:lo12:.LANCHOR72]
 	udiv	w3, w1, w3
 	str	w3, [x2, #:lo12:.LANCHOR74]
@@ -2140,34 +2214,34 @@ GetSwlReplaceBlock:
 	ldrh	w3, [x3, #:lo12:.LANCHOR14]
 	udiv	w1, w1, w3
 	str	w1, [x0, #:lo12:.LANCHOR72]
-.L222:
+.L227:
 	ldr	w10, [x2, #:lo12:.LANCHOR74]
 	add	w0, w7, 256
 	cmp	w0, w10
-	bls	.L227
+	bls	.L232
 	adrp	x1, .LANCHOR76
 	add	w0, w7, 768
 	ldr	w1, [x1, #:lo12:.LANCHOR76]
 	cmp	w0, w1
-	bls	.L227
-.L229:
+	bls	.L232
+.L234:
 	mov	w19, 65535
-.L228:
+.L233:
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L220:
+.L225:
 	ldrh	w5, [x6, x1, lsl 1]
 	add	x1, x1, 1
 	add	w4, w4, w5
 	mov	w5, 1
-	b	.L219
-.L218:
+	b	.L224
+.L223:
 	adrp	x1, .LANCHOR76
 	ldr	w0, [x1, #:lo12:.LANCHOR76]
 	cmp	w3, w0
-	bls	.L222
+	bls	.L227
 	add	w0, w0, 1
 	str	w0, [x1, #:lo12:.LANCHOR76]
 	adrp	x0, .LANCHOR43
@@ -2175,17 +2249,17 @@ GetSwlReplaceBlock:
 	add	x1, x1, :lo12:.LANCHOR5
 	ldr	x4, [x0, #:lo12:.LANCHOR43]
 	mov	w0, 0
-.L224:
+.L229:
 	ldrh	w3, [x1]
 	cmp	w0, w3
-	bcs	.L222
+	bcs	.L227
 	ubfiz	x5, x0, 1, 32
 	add	w0, w0, 1
 	ldrh	w3, [x4, x5]
 	add	w3, w3, 1
 	strh	w3, [x4, x5]
-	b	.L224
-.L227:
+	b	.L229
+.L232:
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	add	w0, w0, w0, lsl 1
@@ -2194,10 +2268,10 @@ GetSwlReplaceBlock:
 	and	w6, w0, 65535
 	add	w0, w7, 64
 	cmp	w6, w0
-	bcc	.L229
+	bcc	.L234
 	adrp	x0, .LANCHOR41
 	ldr	x0, [x0, #:lo12:.LANCHOR41]
-	cbz	x0, .L229
+	cbz	x0, .L234
 	adrp	x1, .LANCHOR5
 	mov	w3, 65535
 	mov	x14, -6148914691236517206
@@ -2211,38 +2285,38 @@ GetSwlReplaceBlock:
 	mov	w15, 6
 	ldr	x4, [x1, #:lo12:.LANCHOR43]
 	mov	w1, 0
-.L230:
+.L235:
 	ldrh	w5, [x0]
 	cmp	w5, w12
-	bne	.L233
+	bne	.L238
 	mov	w19, w2
-.L232:
+.L237:
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L229
+	beq	.L234
 	ubfiz	x2, x19, 1, 32
 	ldrh	w5, [x4, x2]
 	cmp	w7, w5
-	bcs	.L234
+	bcs	.L239
 	bl	GetFreeBlockMinEraseCount
 	cmp	w7, w0, uxth
-	bcs	.L234
+	bcs	.L239
 	str	w3, [x8, #:lo12:.LANCHOR77]
-.L234:
+.L239:
 	cmp	w10, w5
-	bls	.L229
+	bls	.L234
 	add	w0, w5, 128
 	cmp	w6, w0
-	ble	.L229
+	ble	.L234
 	add	w0, w5, 256
 	adrp	x1, .LANCHOR76
 	cmp	w10, w0
-	bhi	.L235
+	bhi	.L240
 	ldr	w3, [x1, #:lo12:.LANCHOR76]
 	add	w0, w5, 768
 	cmp	w0, w3
-	bcs	.L229
-.L235:
+	bcs	.L234
+.L240:
 	adrp	x0, .LANCHOR42
 	ldr	w3, [x1, #:lo12:.LANCHOR76]
 	mov	w1, w19
@@ -2255,14 +2329,14 @@ GetSwlReplaceBlock:
 	adrp	x0, .LANCHOR87
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR87]
-	b	.L228
-.L233:
+	b	.L233
+.L238:
 	add	w1, w1, 1
 	and	w1, w1, 65535
 	cmp	w1, w13
-	bhi	.L229
+	bhi	.L234
 	ldrh	w16, [x0, 4]
-	cbz	w16, .L231
+	cbz	w16, .L236
 	sub	x0, x0, x11
 	asr	x0, x0, 1
 	mul	x0, x0, x14
@@ -2270,14 +2344,14 @@ GetSwlReplaceBlock:
 	and	x0, x0, 65535
 	ldrh	w0, [x4, x0, lsl 1]
 	cmp	w7, w0
-	bcs	.L232
+	bcs	.L237
 	cmp	w3, w0
-	bls	.L231
+	bls	.L236
 	mov	w3, w0
 	mov	w2, w19
-.L231:
+.L236:
 	umaddl	x0, w5, w15, x11
-	b	.L230
+	b	.L235
 	.size	GetSwlReplaceBlock, .-GetSwlReplaceBlock
 	.section	.text.free_data_superblock,"ax",@progbits
 	.align	2
@@ -2287,7 +2361,7 @@ free_data_superblock:
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L249
+	beq	.L254
 	stp	x29, x30, [sp, -16]!
 	adrp	x2, .LANCHOR42
 	ubfiz	x1, x0, 1, 16
@@ -2298,7 +2372,7 @@ free_data_superblock:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L249:
+.L254:
 	mov	w0, 0
 	ret
 	.size	free_data_superblock, .-free_data_superblock
@@ -2315,35 +2389,35 @@ get_new_active_ppa:
 	mov	w0, 65535
 	str	x21, [sp, 32]
 	cmp	w1, w0
-	bne	.L253
+	bne	.L258
 	adrp	x1, .LANCHOR88
 	adrp	x0, .LC1
-	mov	w2, 2710
+	mov	w2, 2740
 	add	x1, x1, :lo12:.LANCHOR88
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L253:
+.L258:
 	adrp	x20, .LANCHOR19
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR19]
 	cmp	w1, w0
-	bne	.L254
+	bne	.L259
 	adrp	x1, .LANCHOR88
 	adrp	x0, .LC1
-	mov	w2, 2711
+	mov	w2, 2741
 	add	x1, x1, :lo12:.LANCHOR88
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L254:
+.L259:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L255
+	cbnz	w0, .L260
 	adrp	x1, .LANCHOR88
 	adrp	x0, .LC1
-	mov	w2, 2712
+	mov	w2, 2742
 	add	x1, x1, :lo12:.LANCHOR88
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L255:
+.L260:
 	ldrb	w0, [x19, 6]
 	adrp	x1, .LANCHOR3
 	strb	wzr, [x19, 10]
@@ -2351,9 +2425,9 @@ get_new_active_ppa:
 	ldrh	w2, [x1, #:lo12:.LANCHOR3]
 	mov	w1, 65535
 	ldrh	w0, [x19, x0, lsl 1]
-.L256:
+.L261:
 	cmp	w0, w1
-	beq	.L258
+	beq	.L263
 	ldrh	w21, [x19, 2]
 	mov	w3, 65535
 	ldrh	w1, [x19, 4]
@@ -2362,54 +2436,54 @@ get_new_active_ppa:
 	sub	w1, w1, #1
 	and	w1, w1, 65535
 	strh	w1, [x19, 4]
-.L260:
+.L265:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	cmp	w2, w0
-	bne	.L259
+	bne	.L264
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
 	mov	w0, 0
-.L259:
+.L264:
 	add	x4, x19, x0, sxtw 1
 	ldrh	w4, [x4, 16]
 	cmp	w4, w3
-	beq	.L260
+	beq	.L265
 	strb	w0, [x19, 6]
 	ldrh	w2, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR19]
 	cmp	w2, w0
-	bne	.L252
-	cbz	w1, .L252
+	bne	.L257
+	cbz	w1, .L257
 	adrp	x1, .LANCHOR88
 	adrp	x0, .LC1
-	mov	w2, 2733
+	mov	w2, 2763
 	add	x1, x1, :lo12:.LANCHOR88
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L252:
+.L257:
 	mov	w0, w21
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L258:
+.L263:
 	ldrb	w0, [x19, 6]
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x19, 6]
 	cmp	w0, w2
-	bne	.L257
+	bne	.L262
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L257:
+.L262:
 	ldrb	w0, [x19, 6]
 	add	x0, x0, 8
 	ldrh	w0, [x19, x0, lsl 1]
-	b	.L256
+	b	.L261
 	.size	get_new_active_ppa, .-get_new_active_ppa
 	.section	.text.FtlGcBufInit,"ax",@progbits
 	.align	2
@@ -2440,21 +2514,21 @@ FtlGcBufInit:
 	add	x4, x4, 8
 	mov	w1, 0
 	mov	w16, 1
-.L268:
+.L273:
 	add	w13, w2, w10
 	add	w12, w1, w11
 	cmp	x3, x8
-	bne	.L269
+	bne	.L274
 	adrp	x1, .LANCHOR94
 	ldr	x7, [x7, #:lo12:.LANCHOR91]
 	ldr	x6, [x6, #:lo12:.LANCHOR92]
 	mov	w8, 24
 	ldr	w4, [x1, #:lo12:.LANCHOR94]
-.L270:
+.L275:
 	cmp	w0, w4
-	bcc	.L271
+	bcc	.L276
 	ret
-.L269:
+.L274:
 	asr	w2, w2, 2
 	asr	w1, w1, 2
 	add	x2, x14, x2, sxtw 2
@@ -2466,8 +2540,8 @@ FtlGcBufInit:
 	add	x4, x4, 32
 	mov	w1, w12
 	mov	w2, w13
-	b	.L268
-.L271:
+	b	.L273
+.L276:
 	umull	x3, w0, w8
 	mul	w1, w10, w0
 	add	x2, x5, x3
@@ -2481,7 +2555,7 @@ FtlGcBufInit:
 	asr	w1, w1, 2
 	add	x1, x6, x1, sxtw 2
 	str	x1, [x2, 8]
-	b	.L270
+	b	.L275
 	.size	FtlGcBufInit, .-FtlGcBufInit
 	.section	.text.FtlGcBufFree,"ax",@progbits
 	.align	2
@@ -2494,31 +2568,31 @@ FtlGcBufFree:
 	ldr	w7, [x2, #:lo12:.LANCHOR94]
 	adrp	x2, .LANCHOR90
 	ldr	x5, [x2, #:lo12:.LANCHOR90]
-.L273:
+.L278:
 	cmp	w3, w1
-	bcs	.L272
+	bcs	.L277
 	ubfiz	x4, x3, 5, 16
 	mov	w2, 0
 	add	x4, x0, x4
-	b	.L278
-.L274:
+	b	.L283
+.L279:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-.L278:
+.L283:
 	cmp	w2, w7
-	bcs	.L275
+	bcs	.L280
 	umull	x6, w2, w8
 	add	x10, x5, x6
 	ldr	x11, [x5, x6]
 	ldr	x6, [x4, 8]
 	cmp	x11, x6
-	bne	.L274
+	bne	.L279
 	str	wzr, [x10, 16]
-.L275:
+.L280:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L273
-.L272:
+	b	.L278
+.L277:
 	ret
 	.size	FtlGcBufFree, .-FtlGcBufFree
 	.section	.text.FtlGcBufAlloc,"ax",@progbits
@@ -2533,31 +2607,31 @@ FtlGcBufAlloc:
 	ldr	w5, [x2, #:lo12:.LANCHOR94]
 	adrp	x2, .LANCHOR90
 	ldr	x6, [x2, #:lo12:.LANCHOR90]
-.L280:
+.L285:
 	cmp	w3, w1
-	bcs	.L279
+	bcs	.L284
 	mov	w2, 0
-	b	.L285
-.L281:
+	b	.L290
+.L286:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-.L285:
+.L290:
 	cmp	w2, w5
-	bcs	.L282
+	bcs	.L287
 	umaddl	x4, w2, w7, x6
 	ldr	w10, [x4, 16]
-	cbnz	w10, .L281
+	cbnz	w10, .L286
 	ubfiz	x2, x3, 5, 16
 	ldr	x10, [x4]
 	add	x2, x0, x2
 	str	w8, [x4, 16]
 	ldr	x4, [x4, 8]
 	stp	x10, x4, [x2, 8]
-.L282:
+.L287:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L280
-.L279:
+	b	.L285
+.L284:
 	ret
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
 	.section	.text.IsBlkInGcList,"ax",@progbits
@@ -2571,17 +2645,17 @@ IsBlkInGcList:
 	adrp	x1, .LANCHOR96
 	ldr	x3, [x1, #:lo12:.LANCHOR96]
 	mov	x1, 0
-.L287:
+.L292:
 	cmp	w2, w1, uxth
-	bhi	.L289
+	bhi	.L294
 	mov	w0, 0
 	ret
-.L289:
+.L294:
 	add	x1, x1, 1
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w0
-	bne	.L287
+	bne	.L292
 	mov	w0, 1
 	ret
 	.size	IsBlkInGcList, .-IsBlkInGcList
@@ -2603,24 +2677,24 @@ FtlGcUpdatePage:
 	mov	x3, 0
 	ldrh	w1, [x4, #:lo12:.LANCHOR95]
 	ldr	x5, [x2, #:lo12:.LANCHOR96]
-.L292:
+.L297:
 	and	w2, w3, 65535
 	cmp	w2, w1
-	bcc	.L294
-	bne	.L293
+	bcc	.L299
+	bne	.L298
 	and	x3, x3, 65535
 	strh	w0, [x5, x3, lsl 1]
 	ldrh	w0, [x4, #:lo12:.LANCHOR95]
 	add	w0, w0, 1
 	strh	w0, [x4, #:lo12:.LANCHOR95]
-	b	.L293
-.L294:
+	b	.L298
+.L299:
 	add	x3, x3, 1
 	add	x2, x5, x3, lsl 1
 	ldrh	w2, [x2, -2]
 	cmp	w2, w7
-	bne	.L292
-.L293:
+	bne	.L297
+.L298:
 	adrp	x4, .LANCHOR97
 	adrp	x1, .LANCHOR98
 	mov	w3, 12
@@ -2651,25 +2725,25 @@ FtlGcRefreshBlock:
 	adrp	x3, .LANCHOR99
 	ldrh	w4, [x3, #:lo12:.LANCHOR99]
 	cmp	w19, w4
-	beq	.L297
+	beq	.L302
 	adrp	x0, .LANCHOR100
 	ldrh	w2, [x0, #:lo12:.LANCHOR100]
 	cmp	w19, w2
-	beq	.L297
+	beq	.L302
 	mov	w1, 65535
 	cmp	w4, w1
-	bne	.L298
+	bne	.L303
 	strh	w19, [x3, #:lo12:.LANCHOR99]
-.L297:
+.L302:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L298:
+.L303:
 	cmp	w2, w1
-	bne	.L297
+	bne	.L302
 	strh	w19, [x0, #:lo12:.LANCHOR100]
-	b	.L297
+	b	.L302
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
 	.section	.text.FtlGcMarkBadPhyBlk,"ax",@progbits
 	.align	2
@@ -2696,24 +2770,24 @@ FtlGcMarkBadPhyBlk:
 	adrp	x2, .LANCHOR102
 	add	x2, x2, :lo12:.LANCHOR102
 	mov	x1, 0
-.L301:
+.L306:
 	cmp	w0, w1, uxth
-	bhi	.L303
+	bhi	.L308
 	cmp	w0, 15
-	bhi	.L302
+	bhi	.L307
 	add	w1, w0, 1
 	strh	w1, [x19, #:lo12:.LANCHOR101]
 	adrp	x1, .LANCHOR102
 	add	x1, x1, :lo12:.LANCHOR102
 	strh	w20, [x1, w0, sxtw 1]
-	b	.L302
-.L303:
+	b	.L307
+.L308:
 	add	x1, x1, 1
 	add	x3, x2, x1, lsl 1
 	ldrh	w3, [x3, -2]
 	cmp	w3, w20
-	bne	.L301
-.L302:
+	bne	.L306
+.L307:
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
@@ -2727,21 +2801,21 @@ FtlGcMarkBadPhyBlk:
 FtlGcReFreshBadBlk:
 	adrp	x0, .LANCHOR101
 	ldrh	w0, [x0, #:lo12:.LANCHOR101]
-	cbz	w0, .L312
+	cbz	w0, .L317
 	adrp	x1, .LANCHOR99
 	ldrh	w2, [x1, #:lo12:.LANCHOR99]
 	mov	w1, 65535
 	cmp	w2, w1
-	bne	.L312
+	bne	.L317
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	adrp	x19, .LANCHOR103
 	ldrh	w1, [x19, #:lo12:.LANCHOR103]
 	cmp	w1, w0
-	bcc	.L307
+	bcc	.L312
 	strh	wzr, [x19, #:lo12:.LANCHOR103]
-.L307:
+.L312:
 	ldrh	w1, [x19, #:lo12:.LANCHOR103]
 	adrp	x0, .LANCHOR102
 	add	x0, x0, :lo12:.LANCHOR102
@@ -2755,7 +2829,7 @@ FtlGcReFreshBadBlk:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L312:
+.L317:
 	mov	w0, 0
 	ret
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
@@ -2799,9 +2873,9 @@ rknand_print_hex:
 	mov	x19, 0
 	mov	w20, 0
 	adrp	x26, .LC76
-.L318:
+.L323:
 	cmp	w27, w19
-	bhi	.L324
+	bhi	.L329
 	ldp	x19, x20, [sp, 16]
 	adrp	x0, .LC78
 	ldp	x21, x22, [sp, 32]
@@ -2811,490 +2885,150 @@ rknand_print_hex:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	printf
-.L324:
-	cbnz	w20, .L319
+.L329:
+	cbnz	w20, .L324
 	mov	w2, w21
 	mov	x1, x28
 	mov	x0, x24
 	bl	printf
-.L319:
+.L324:
 	cmp	w23, 4
-	bne	.L320
+	bne	.L325
 	ldr	w1, [x22, x19, lsl 2]
-.L327:
+.L332:
 	add	x0, x26, :lo12:.LC76
-.L326:
+.L331:
 	bl	printf
 	add	w20, w20, 1
 	cmp	w20, 15
-	bls	.L323
+	bls	.L328
 	mov	w20, 0
 	adrp	x0, .LC78
 	add	x0, x0, :lo12:.LC78
 	bl	printf
-.L323:
+.L328:
 	add	x19, x19, 1
 	add	w21, w21, w23
-	b	.L318
-.L320:
+	b	.L323
+.L325:
 	cmp	w23, 2
-	bne	.L322
-	ldrsh	w1, [x22, x19, lsl 1]
-	b	.L327
-.L322:
+	bne	.L327
+	ldrh	w1, [x22, x19, lsl 1]
+	b	.L332
+.L327:
 	ldrb	w1, [x22, x19]
 	mov	x0, x25
-	b	.L326
+	b	.L331
 	.size	rknand_print_hex, .-rknand_print_hex
-	.section	.text.FlashReadPages,"ax",@progbits
+	.section	.text.FlashEraseBlocks,"ax",@progbits
 	.align	2
-	.global	FlashReadPages
-	.type	FlashReadPages, %function
-FlashReadPages:
-	stp	x29, x30, [sp, -96]!
-	adrp	x2, .LANCHOR0
-	add	x3, x2, :lo12:.LANCHOR0
-	ubfiz	x1, x1, 5, 32
+	.global	FlashEraseBlocks
+	.type	FlashEraseBlocks, %function
+FlashEraseBlocks:
+	stp	x29, x30, [sp, -112]!
 	add	x29, sp, 0
-	str	x25, [sp, 64]
-	ldrh	w25, [x3, 12]
-	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR104
-	stp	x23, x24, [sp, 48]
-	adrp	x22, .LC1
 	stp	x19, x20, [sp, 16]
-	add	x24, x0, x1
-	mov	x19, x0
-	mov	x23, x2
-	add	x21, x21, :lo12:.LANCHOR104
-	add	x22, x22, :lo12:.LC1
-.L329:
-	cmp	x19, x24
-	bne	.L336
+	mov	x20, x0
+	adrp	x0, .LANCHOR0
+	add	x1, x0, :lo12:.LANCHOR0
+	stp	x23, x24, [sp, 48]
+	add	x19, x20, 4
+	stp	x21, x22, [sp, 32]
+	ubfiz	x21, x2, 5, 32
+	ldrh	w24, [x1, 12]
+	add	x23, x21, 4
+	stp	x25, x26, [sp, 64]
+	add	x23, x20, x23
+	adrp	x25, .LANCHOR105
+	str	x27, [sp, 80]
+	lsl	w26, w24, 3
+	mov	x22, x0
+	add	x27, x25, :lo12:.LANCHOR105
+.L334:
+	cmp	x19, x23
+	beq	.L348
+	ldr	w0, [x19]
+	add	x2, x29, 104
+	add	x1, x29, 108
+	bl	l2p_addr_tran.isra.0
+	ldr	w0, [x29, 104]
+	cbnz	w0, .L335
+	ldr	w1, [x29, 108]
+	cmp	w26, w1
+	bls	.L335
+	mov	x19, x20
+	add	x21, x20, x21
+	adrp	x22, .LC79
+	adrp	x20, .LANCHOR104
+	add	x22, x22, :lo12:.LC79
+	add	x20, x20, :lo12:.LANCHOR104
+	mov	w23, -1
+.L336:
+	cmp	x19, x21
+	bne	.L337
+.L348:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldr	x25, [sp, 64]
-	ldp	x29, x30, [sp], 96
+	ldp	x25, x26, [sp, 64]
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 112
 	ret
-.L336:
-	ldr	x0, [x19, 8]
-	cbz	x0, .L330
-	ldr	x0, [x19, 16]
-	cbnz	x0, .L331
-.L330:
-	mov	w2, 96
-	mov	x1, x21
+.L337:
+	ldr	w2, [x29, 108]
+	mov	x1, x20
+	str	w23, [x19]
 	mov	x0, x22
+	add	x19, x19, 32
 	bl	printf
-.L331:
-	ldr	w0, [x19, 4]
-	adrp	x20, .LANCHOR105
-	add	x20, x20, :lo12:.LANCHOR105
-	add	x2, x29, 88
-	add	x1, x29, 92
-	bl	l2p_addr_tran.isra.0
-	ldrb	w0, [x29, 88]
-	ldr	w1, [x29, 92]
-	ldp	x2, x3, [x19, 8]
-	ldr	x4, [x20, 24]
-	blr	x4
-	str	w0, [x19]
-	add	x0, x23, :lo12:.LANCHOR0
+	ldr	x1, [x19, -24]
+	mov	w3, 16
+	mov	w2, 4
+	adrp	x0, .LC80
+	add	x0, x0, :lo12:.LC80
+	bl	rknand_print_hex
+	ldr	x1, [x19, -16]
+	mov	w3, 4
+	adrp	x0, .LC81
+	mov	w2, w3
+	add	x0, x0, :lo12:.LC81
+	bl	rknand_print_hex
+	b	.L336
+.L335:
+	add	x1, x25, :lo12:.LANCHOR105
+	ldr	x2, [x1, 8]
+	ldr	w1, [x29, 108]
+	blr	x2
+	cbnz	w0, .L338
+	str	wzr, [x19, -4]
+.L339:
+	add	x0, x22, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
-	bne	.L333
-	ldrb	w0, [x29, 88]
-	ldr	x4, [x20, 24]
-	ldp	x2, x3, [x19, 8]
-	ldr	w1, [x29, 92]
-	add	x3, x3, 8
-	add	x2, x2, 2048
-	add	w1, w25, w1
-	blr	x4
-	cmn	w0, #1
-	beq	.L334
-	ldr	x0, [x19, 16]
-	ldr	w1, [x0, 12]
-	cmn	w1, #1
-	bne	.L333
-	ldr	w1, [x0, 8]
-	cmn	w1, #1
-	bne	.L333
-	ldr	w0, [x0]
-	cmn	w0, #1
-	beq	.L333
-.L334:
+	bne	.L341
+	ldrb	w0, [x29, 104]
+	ldr	x2, [x27, 8]
+	ldr	w1, [x29, 108]
+	add	w1, w24, w1
+	blr	x2
+	cbz	w0, .L341
 	mov	w0, -1
-	str	w0, [x19]
-.L333:
+	str	w0, [x19, -4]
+.L341:
 	add	x19, x19, 32
-	b	.L329
-	.size	FlashReadPages, .-FlashReadPages
-	.section	.text.FtlLoadFactoryBbt,"ax",@progbits
+	b	.L334
+.L338:
+	mov	w0, -1
+	str	w0, [x19, -4]
+	b	.L339
+	.size	FlashEraseBlocks, .-FlashEraseBlocks
+	.section	.text.FtlFreeSysBlkQueueIn,"ax",@progbits
 	.align	2
-	.global	FtlLoadFactoryBbt
-	.type	FtlLoadFactoryBbt, %function
-FtlLoadFactoryBbt:
-	stp	x29, x30, [sp, -112]!
-	adrp	x2, .LANCHOR107
-	adrp	x0, .LANCHOR106
-	add	x1, x0, :lo12:.LANCHOR106
-	add	x29, sp, 0
-	ldr	x2, [x2, #:lo12:.LANCHOR107]
-	stp	x21, x22, [sp, 32]
-	mov	x22, x0
-	stp	x25, x26, [sp, 64]
-	adrp	x26, .LANCHOR17
-	stp	x27, x28, [sp, 80]
-	add	x28, x26, :lo12:.LANCHOR17
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR37
-	stp	x23, x24, [sp, 48]
-	add	x20, x20, :lo12:.LANCHOR37
-	str	x2, [x1, 8]
-	adrp	x2, .LANCHOR108
-	adrp	x23, .LANCHOR10
-	add	x20, x20, 12
-	ldr	x25, [x2, #:lo12:.LANCHOR108]
-	add	x23, x23, :lo12:.LANCHOR10
-	mov	w21, 0
-	mov	w27, -1
-	str	x25, [x1, 16]
-.L348:
-	ldrh	w0, [x23]
-	cmp	w21, w0
-	bcc	.L353
-	ldp	x19, x20, [sp, 16]
-	mov	w0, 0
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 112
-	ret
-.L353:
-	ldrh	w19, [x26, #:lo12:.LANCHOR17]
-	add	x24, x22, :lo12:.LANCHOR106
-	strh	w27, [x20]
-	mov	w3, 61664
-	sub	w19, w19, #1
-	and	w19, w19, 65535
-.L349:
-	ldrh	w0, [x28]
-	sub	w1, w0, #15
-	cmp	w1, w19
-	bgt	.L351
-	madd	w0, w0, w21, w19
-	mov	w2, 1
-	str	w3, [x29, 108]
-	mov	w1, w2
-	lsl	w0, w0, 10
-	str	w0, [x24, 4]
-	mov	x0, x24
-	bl	FlashReadPages
-	ldr	w0, [x24]
-	ldr	w3, [x29, 108]
-	cmn	w0, #1
-	beq	.L350
-	ldrh	w0, [x25]
-	cmp	w0, w3
-	bne	.L350
-	strh	w19, [x20]
-.L351:
-	add	w21, w21, 1
-	add	x20, x20, 2
-	b	.L348
-.L350:
-	sub	w19, w19, #1
-	and	w19, w19, 65535
-	b	.L349
-	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
-	.section	.text.FtlGetLastWrittenPage,"ax",@progbits
-	.align	2
-	.global	FtlGetLastWrittenPage
-	.type	FtlGetLastWrittenPage, %function
-FtlGetLastWrittenPage:
-	stp	x29, x30, [sp, -160]!
-	cmp	w1, 1
-	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	mov	w23, w1
-	stp	x19, x20, [sp, 16]
-	stp	x21, x22, [sp, 32]
-	bne	.L359
-	adrp	x1, .LANCHOR20
-	ldrh	w19, [x1, #:lo12:.LANCHOR20]
-.L360:
-	sub	w19, w19, #1
-	adrp	x1, ftl_temp_buf
-	sxth	w19, w19
-	add	x1, x1, :lo12:ftl_temp_buf
-	lsl	w21, w0, 10
-	str	x1, [x29, 72]
-	orr	w0, w19, w21
-	add	x1, x29, 96
-	str	w0, [x29, 68]
-	mov	w2, w23
-	str	x1, [x29, 80]
-	add	x0, x29, 64
-	mov	w1, 1
-	bl	FlashReadPages
-	ldr	w0, [x29, 96]
-	cmn	w0, #1
-	bne	.L361
-	mov	w22, 0
-	mov	w24, 2
-.L362:
-	cmp	w22, w19
-	ble	.L365
-.L361:
-	mov	w0, w19
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 160
-	ret
-.L359:
-	adrp	x1, .LANCHOR19
-	ldrh	w19, [x1, #:lo12:.LANCHOR19]
-	b	.L360
-.L365:
-	add	w20, w22, w19
-	mov	w2, w23
-	mov	w1, 1
-	sdiv	w20, w20, w24
-	sxth	w0, w20
-	orr	w0, w0, w21
-	str	w0, [x29, 68]
-	add	x0, x29, 64
-	bl	FlashReadPages
-	ldr	w0, [x29, 96]
-	cmn	w0, #1
-	bne	.L363
-	ldr	w0, [x29, 100]
-	cmn	w0, #1
-	bne	.L363
-	sub	w19, w20, #1
-	sxth	w19, w19
-	b	.L362
-.L363:
-	add	w20, w20, 1
-	sxth	w22, w20
-	b	.L362
-	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
-	.section	.text.FlashProgPages,"ax",@progbits
-	.align	2
-	.global	FlashProgPages
-	.type	FlashProgPages, %function
-FlashProgPages:
-	stp	x29, x30, [sp, -144]!
-	ubfiz	x1, x1, 5, 32
-	add	x29, sp, 0
-	stp	x25, x26, [sp, 64]
-	mov	w25, w2
-	mov	w26, w3
-	adrp	x2, .LANCHOR0
-	add	x3, x2, :lo12:.LANCHOR0
-	stp	x27, x28, [sp, 80]
-	stp	x19, x20, [sp, 16]
-	mov	x20, x0
-	stp	x21, x22, [sp, 32]
-	mov	x19, x0
-	ldrh	w27, [x3, 12]
-	adrp	x21, .LANCHOR109
-	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR105
-	add	x24, x0, x1
-	mov	x23, x2
-	add	x21, x21, :lo12:.LANCHOR109
-	add	x28, x22, :lo12:.LANCHOR105
-.L368:
-	cmp	x19, x24
-	bne	.L376
-	cbnz	w26, .L377
-.L395:
-	ldp	x19, x20, [sp, 16]
-	mov	w0, 0
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 144
-	ret
-.L376:
-	ldr	x0, [x19, 8]
-	cbz	x0, .L369
-	ldr	x0, [x19, 16]
-	cbnz	x0, .L370
-.L369:
-	adrp	x0, .LC1
-	mov	w2, 126
-	mov	x1, x21
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L370:
-	ldr	w0, [x19, 4]
-	add	x2, x29, 104
-	add	x1, x29, 108
-	bl	l2p_addr_tran.isra.0
-	add	x0, x22, :lo12:.LANCHOR105
-	ldr	w1, [x29, 108]
-	ldp	x2, x3, [x19, 8]
-	ldr	x4, [x0, 16]
-	ldrb	w0, [x29, 104]
-	blr	x4
-	cbnz	w0, .L371
-	str	wzr, [x19]
-.L372:
-	add	x0, x23, :lo12:.LANCHOR0
-	ldrh	w0, [x0, 14]
-	cmp	w0, 4
-	bne	.L374
-	ldrb	w0, [x29, 104]
-	ldr	x4, [x28, 16]
-	ldp	x2, x3, [x19, 8]
-	ldr	w1, [x29, 108]
-	add	x3, x3, 8
-	add	x2, x2, 2048
-	add	w1, w27, w1
-	blr	x4
-	cbz	w0, .L374
-	mov	w0, -1
-	str	w0, [x19]
-.L374:
-	add	x19, x19, 32
-	b	.L368
-.L371:
-	mov	w0, -1
-	str	w0, [x19]
-	b	.L372
-.L381:
-	str	wzr, [x22]
-	mov	w2, w25
-	str	wzr, [x24]
-	mov	w1, 1
-	stp	x22, x24, [x29, 120]
-	ldr	w0, [x20, 4]
-	str	w0, [x29, 116]
-	add	x0, x29, 112
-	bl	FlashReadPages
-	ldr	w26, [x29, 112]
-	cmn	w26, #1
-	bne	.L378
-	ldr	w1, [x20, 4]
-	adrp	x0, .LC79
-	add	x0, x0, :lo12:.LC79
-	bl	printf
-	str	w26, [x20]
-.L378:
-	ldr	x0, [x20, 16]
-	cbz	x0, .L379
-	ldr	w3, [x23, #:lo12:.LANCHOR110]
-	ldr	w2, [x0]
-	cmp	w2, w3
-	beq	.L379
-	ldr	w1, [x20, 4]
-	adrp	x0, .LC80
-	add	x0, x0, :lo12:.LC80
-	bl	printf
-	mov	w0, -1
-	str	w0, [x20]
-.L379:
-	ldr	x0, [x20, 8]
-	cbz	x0, .L380
-	ldr	w3, [x21, #:lo12:check_buf]
-	ldr	w2, [x0]
-	cmp	w2, w3
-	beq	.L380
-	ldr	w1, [x20, 4]
-	adrp	x0, .LC81
-	add	x0, x0, :lo12:.LC81
-	bl	printf
-	mov	w0, -1
-	str	w0, [x20]
-.L380:
-	add	x20, x20, 32
-.L396:
-	cmp	x20, x19
-	bne	.L381
-	b	.L395
-.L377:
-	adrp	x21, check_buf
-	adrp	x23, .LANCHOR110
-	add	x22, x21, :lo12:check_buf
-	add	x24, x23, :lo12:.LANCHOR110
-	b	.L396
-	.size	FlashProgPages, .-FlashProgPages
-	.section	.text.FlashEraseBlocks,"ax",@progbits
-	.align	2
-	.global	FlashEraseBlocks
-	.type	FlashEraseBlocks, %function
-FlashEraseBlocks:
-	stp	x29, x30, [sp, -80]!
-	adrp	x1, .LANCHOR0
-	add	x3, x1, :lo12:.LANCHOR0
-	ubfiz	x2, x2, 5, 32
-	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	add	x2, x2, 4
-	ldrh	w23, [x3, 12]
-	stp	x19, x20, [sp, 16]
-	add	x19, x0, 4
-	stp	x21, x22, [sp, 32]
-	mov	x20, x1
-	adrp	x21, .LANCHOR105
-	add	x22, x0, x2
-	add	x24, x21, :lo12:.LANCHOR105
-.L399:
-	cmp	x19, x22
-	bne	.L405
-	ldp	x19, x20, [sp, 16]
-	mov	w0, 0
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 80
-	ret
-.L405:
-	ldr	w0, [x19]
-	add	x2, x29, 72
-	add	x1, x29, 76
-	bl	l2p_addr_tran.isra.0
-	add	x0, x21, :lo12:.LANCHOR105
-	ldr	w1, [x29, 76]
-	ldr	x2, [x0, 8]
-	ldrb	w0, [x29, 72]
-	blr	x2
-	cbnz	w0, .L400
-	str	wzr, [x19, -4]
-.L401:
-	add	x0, x20, :lo12:.LANCHOR0
-	ldrh	w0, [x0, 14]
-	cmp	w0, 4
-	bne	.L403
-	ldrb	w0, [x29, 72]
-	ldr	x2, [x24, 8]
-	ldr	w1, [x29, 76]
-	add	w1, w23, w1
-	blr	x2
-	cbz	w0, .L403
-	mov	w0, -1
-	str	w0, [x19, -4]
-.L403:
-	add	x19, x19, 32
-	b	.L399
-.L400:
-	mov	w0, -1
-	str	w0, [x19, -4]
-	b	.L401
-	.size	FlashEraseBlocks, .-FlashEraseBlocks
-	.section	.text.FtlFreeSysBlkQueueIn,"ax",@progbits
-	.align	2
-	.global	FtlFreeSysBlkQueueIn
-	.type	FtlFreeSysBlkQueueIn, %function
-FtlFreeSysBlkQueueIn:
-	stp	x29, x30, [sp, -48]!
+	.global	FtlFreeSysBlkQueueIn
+	.type	FtlFreeSysBlkQueueIn, %function
+FtlFreeSysBlkQueueIn:
+	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 65535
@@ -3302,22 +3036,22 @@ FtlFreeSysBlkQueueIn:
 	sub	w2, w20, #1
 	mov	w0, 65533
 	cmp	w0, w2, uxth
-	bcc	.L410
+	bcc	.L350
 	adrp	x0, .LANCHOR38
 	add	x2, x0, :lo12:.LANCHOR38
 	mov	x19, x0
 	ldrh	w2, [x2, 6]
 	cmp	w2, 1024
-	beq	.L410
+	beq	.L350
 	and	w1, w1, 65535
-	cbz	w1, .L412
+	cbz	w1, .L352
 	mov	w0, w20
 	bl	P2V_block_in_plane
 	and	w21, w0, 65535
-	adrp	x0, .LANCHOR111
+	adrp	x0, .LANCHOR106
 	lsl	w1, w20, 10
 	mov	w2, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR111]
+	ldr	x0, [x0, #:lo12:.LANCHOR106]
 	str	w1, [x0, 4]
 	mov	w1, w2
 	bl	FlashEraseBlocks
@@ -3331,7 +3065,7 @@ FtlFreeSysBlkQueueIn:
 	ldr	w0, [x1, #:lo12:.LANCHOR75]
 	add	w0, w0, 1
 	str	w0, [x1, #:lo12:.LANCHOR75]
-.L412:
+.L352:
 	add	x0, x19, :lo12:.LANCHOR38
 	ldrh	w1, [x0, 6]
 	add	w1, w1, 1
@@ -3342,291 +3076,65 @@ FtlFreeSysBlkQueueIn:
 	and	w1, w1, 1023
 	strh	w1, [x0, 4]
 	strh	w20, [x2, 8]
-.L410:
+.L350:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
 	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
-	.section	.text.FtlLowFormatEraseBlock,"ax",@progbits
+	.section	.text.FtlFreeSysBlkQueueOut,"ax",@progbits
 	.align	2
-	.global	FtlLowFormatEraseBlock
-	.type	FtlLowFormatEraseBlock, %function
-FtlLowFormatEraseBlock:
-	stp	x29, x30, [sp, -144]!
-	adrp	x7, .LANCHOR13
-	add	x7, x7, :lo12:.LANCHOR13
-	mov	x5, 0
+	.global	FtlFreeSysBlkQueueOut
+	.type	FtlFreeSysBlkQueueOut, %function
+FtlFreeSysBlkQueueOut:
+	adrp	x0, .LANCHOR38
+	add	x1, x0, :lo12:.LANCHOR38
+	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	and	w24, w0, 65535
-	adrp	x0, .LANCHOR112
+	ldrh	w2, [x1, 6]
 	stp	x19, x20, [sp, 16]
-	stp	x21, x22, [sp, 32]
-	and	w23, w1, 255
-	str	w24, [x0, #:lo12:.LANCHOR112]
-	adrp	x0, .LANCHOR114
-	adrp	x1, .LANCHOR113
-	adrp	x20, .LANCHOR3
-	adrp	x21, .LANCHOR111
-	ldr	x11, [x0, #:lo12:.LANCHOR114]
-	adrp	x0, .LANCHOR24
-	ldrh	w8, [x20, #:lo12:.LANCHOR3]
-	ldr	x6, [x21, #:lo12:.LANCHOR111]
-	mov	w22, 0
-	ldr	x10, [x1, #:lo12:.LANCHOR113]
-	mov	w19, 0
-	ldrh	w12, [x0, #:lo12:.LANCHOR24]
-	stp	x25, x26, [sp, 64]
-	stp	x27, x28, [sp, 80]
-	stp	x0, x1, [x29, 120]
-.L421:
-	cmp	w8, w5, uxth
-	bhi	.L425
-	cbz	w22, .L420
-	mov	w2, w22
-	ubfiz	x22, x22, 5, 16
-	mov	x25, 0
-	mov	w1, 0
-	mov	x0, x6
-	bl	FlashEraseBlocks
-.L429:
-	ldr	x0, [x21, #:lo12:.LANCHOR111]
-	add	x1, x0, x25
-	ldr	w0, [x0, x25]
-	cmn	w0, #1
-	bne	.L428
-	ldr	w0, [x1, 4]
-	add	w19, w19, 1
-	and	w19, w19, 65535
-	lsr	w0, w0, 10
-	bl	FtlBbmMapBadBlock
-.L428:
-	add	x25, x25, 32
-	cmp	x25, x22
-	bne	.L429
-	cbz	w23, .L442
-	adrp	x0, .LANCHOR20
-	mov	w25, 1
-	ldrh	w26, [x0, #:lo12:.LANCHOR20]
-	lsr	w28, w26, 2
-.L430:
-	add	x0, x20, :lo12:.LANCHOR3
-	adrp	x27, .LANCHOR13
-	str	x0, [x29, 136]
-	mov	w22, 0
-	add	x0, x27, :lo12:.LANCHOR13
-	str	x0, [x29, 112]
-.L438:
-	ldr	x0, [x29, 136]
-	mov	x5, 0
-	ldr	x6, [x21, #:lo12:.LANCHOR111]
-	mov	w20, 0
-	ldrh	w7, [x0]
-	adrp	x0, .LANCHOR115
-	ldr	x8, [x0, #:lo12:.LANCHOR115]
-	ldr	x0, [x29, 128]
-	ldr	x10, [x0, #:lo12:.LANCHOR113]
-	ldr	x0, [x29, 120]
-	ldrh	w11, [x0, #:lo12:.LANCHOR24]
-.L431:
-	cmp	w7, w5, uxth
-	bhi	.L434
-	cbz	w20, .L420
-	mov	w1, w20
-	mov	w3, 1
-	mov	w2, w25
-	mov	x0, x6
-	bl	FlashProgPages
-	mov	x27, 0
-	ubfiz	x1, x20, 5, 16
-.L437:
-	ldr	x0, [x21, #:lo12:.LANCHOR111]
-	add	x3, x0, x27
-	ldr	w0, [x0, x27]
-	cbz	w0, .L436
-	ldr	w0, [x3, 4]
-	add	w19, w19, 1
-	str	x1, [x29, 104]
-	and	w19, w19, 65535
-	lsr	w0, w0, 10
-	bl	FtlBbmMapBadBlock
-	ldr	x1, [x29, 104]
-.L436:
-	add	x27, x27, 32
-	cmp	x1, x27
-	bne	.L437
-	add	w22, w22, w28
-	and	w22, w22, 65535
-	cmp	w26, w22
-	bhi	.L438
-	mov	x22, 0
-.L440:
-	cbz	w23, .L439
-	ldr	x0, [x21, #:lo12:.LANCHOR111]
-	add	x1, x0, x22
-	ldr	w0, [x0, x22]
-	cbnz	w0, .L439
-	ldr	w0, [x1, 4]
-	mov	w1, 1
-	lsr	w0, w0, 10
-	bl	FtlFreeSysBlkQueueIn
-.L439:
-	add	x22, x22, 32
-	cmp	x22, x27
-	bne	.L440
-	cmp	w24, 63
-	ccmp	w23, 0, 0, hi
-	beq	.L420
-	ldr	x0, [x21, #:lo12:.LANCHOR111]
-	mov	w2, w20
-	mov	w1, w25
-	bl	FlashEraseBlocks
-.L420:
-	mov	w0, w19
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 144
-	ret
-.L425:
-	lsl	x0, x5, 5
-	mov	w1, w24
-	str	wzr, [x6, x0]
-	ldrb	w0, [x7, x5]
-	bl	V2P_block
-	and	w13, w0, 65535
-	mov	w14, w13
-	cbz	w23, .L422
-	bl	IsBlkInVendorPart
-	cbnz	w0, .L423
-.L422:
-	mov	w0, w14
-	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L424
-	ubfiz	x0, x22, 5, 16
-	mul	w1, w22, w12
-	add	x0, x6, x0
-	add	w22, w22, 1
-	and	w22, w22, 65535
-	lsl	w13, w13, 10
-	asr	w1, w1, 2
-	add	x1, x11, x1, sxtw 2
-	str	w13, [x0, 4]
-	stp	x10, x1, [x0, 8]
-.L423:
-	add	x5, x5, 1
-	b	.L421
-.L424:
-	add	w19, w19, 1
-	and	w19, w19, 65535
-	b	.L423
-.L442:
-	mov	w25, 0
-	mov	w28, 6
-	mov	w26, 1
-	b	.L430
-.L434:
-	lsl	x0, x5, 5
-	mov	w1, w24
-	str	wzr, [x6, x0]
-	ldr	x0, [x29, 112]
-	ldrb	w0, [x0, x5]
-	bl	V2P_block
-	and	w12, w0, 65535
-	mov	w13, w12
-	cbz	w23, .L432
-	bl	IsBlkInVendorPart
-	cbnz	w0, .L433
-.L432:
-	mov	w0, w13
-	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L433
-	ubfiz	x0, x20, 5, 16
-	mul	w1, w20, w11
-	add	x0, x6, x0
-	add	w20, w20, 1
-	and	w20, w20, 65535
-	add	w12, w22, w12, lsl 10
-	asr	w1, w1, 2
-	add	x1, x10, x1, sxtw 2
-	str	w12, [x0, 4]
-	stp	x8, x1, [x0, 8]
-.L433:
-	add	x5, x5, 1
-	b	.L431
-	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
-	.section	.text.FtlFreeSysBlkQueueOut,"ax",@progbits
-	.align	2
-	.global	FtlFreeSysBlkQueueOut
-	.type	FtlFreeSysBlkQueueOut, %function
-FtlFreeSysBlkQueueOut:
-	stp	x29, x30, [sp, -64]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR38
-	stp	x21, x22, [sp, 32]
-	add	x19, x19, :lo12:.LANCHOR38
-	adrp	x21, .LANCHOR75
-	str	x23, [sp, 48]
-	add	x21, x21, :lo12:.LANCHOR75
-	adrp	x23, .LC83
-	add	x23, x23, :lo12:.LC83
-.L464:
-	ldrh	w1, [x19, 6]
-	cbz	w1, .L465
-	ldrh	w0, [x19, 2]
-	sub	w1, w1, #1
-	strh	w1, [x19, 6]
-	add	x2, x19, x0, sxtw 1
+	mov	x19, x0
+	cbz	w2, .L364
+	ldrh	w0, [x1, 2]
+	sub	w2, w2, #1
+	strh	w2, [x1, 6]
+	mov	w2, 1
+	add	x3, x1, x0, sxtw 1
 	add	w0, w0, 1
 	and	w0, w0, 1023
-	strh	w0, [x19, 2]
-	ldrh	w20, [x2, 8]
-	mov	w0, w20
-	bl	P2V_block_in_plane
-	and	w22, w0, 65535
-	adrp	x0, .LANCHOR111
+	strh	w0, [x1, 2]
+	adrp	x0, .LANCHOR106
+	ldrh	w20, [x3, 8]
+	ldr	x0, [x0, #:lo12:.LANCHOR106]
 	lsl	w1, w20, 10
-	mov	w2, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR111]
 	str	w1, [x0, 4]
 	mov	w1, w2
 	bl	FlashEraseBlocks
-	adrp	x1, .LANCHOR43
-	ubfiz	x0, x22, 1, 16
-	ldr	x2, [x1, #:lo12:.LANCHOR43]
-	ldrh	w1, [x2, x0]
-	add	w1, w1, 1
-	strh	w1, [x2, x0]
-	ldr	w0, [x21]
-	sub	w1, w20, #1
+	adrp	x1, .LANCHOR75
+	ldr	w0, [x1, #:lo12:.LANCHOR75]
 	add	w0, w0, 1
-	str	w0, [x21]
-	mov	w0, 65533
-	cmp	w0, w1, uxth
-	bcc	.L466
-	mov	w0, w20
-	ldr	x23, [sp, 48]
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 64
-	ret
-.L465:
+	str	w0, [x1, #:lo12:.LANCHOR75]
+.L361:
+	sub	w0, w20, #1
+	mov	w1, 65533
+	cmp	w1, w0, uxth
+	bcs	.L362
+	add	x0, x19, :lo12:.LANCHOR38
+	mov	w1, w20
+	ldrh	w2, [x0, 6]
 	adrp	x0, .LC82
-	mov	w1, 0
 	add	x0, x0, :lo12:.LC82
 	bl	printf
-.L468:
-	b	.L468
-.L466:
-	ldrh	w2, [x19, 6]
-	mov	w1, w20
-	mov	x0, x23
-	bl	printf
-	b	.L464
+.L363:
+	b	.L363
+.L364:
+	mov	w20, 65535
+	b	.L361
+.L362:
+	mov	w0, w20
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
 	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
 	.section	.text.ftl_map_blk_alloc_new_blk,"ax",@progbits
 	.align	2
@@ -3641,27 +3149,27 @@ ftl_map_blk_alloc_new_blk:
 	mov	w20, 0
 	ldr	x0, [x0, 16]
 	str	x21, [sp, 32]
-.L472:
+.L367:
 	cmp	w20, w1
-	beq	.L476
+	beq	.L371
 	mov	x21, x0
 	ldrh	w2, [x0], 2
-	cbnz	w2, .L473
+	cbnz	w2, .L368
 	bl	FtlFreeSysBlkQueueOut
 	and	w1, w0, 65535
 	strh	w0, [x21]
 	sub	w2, w1, #1
 	mov	w0, 65533
 	cmp	w0, w2, uxth
-	bcs	.L474
+	bcs	.L369
 	adrp	x0, .LANCHOR38+6
 	ldrh	w2, [x0, #:lo12:.LANCHOR38+6]
-	adrp	x0, .LC84
-	add	x0, x0, :lo12:.LC84
+	adrp	x0, .LC83
+	add	x0, x0, :lo12:.LC83
 	bl	printf
-.L475:
-	b	.L475
-.L474:
+.L370:
+	b	.L370
+.L369:
 	ldr	w0, [x19, 48]
 	strh	wzr, [x19, 2]
 	add	w0, w0, 1
@@ -3670,26 +3178,26 @@ ftl_map_blk_alloc_new_blk:
 	strh	w20, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
-.L476:
+.L371:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L478
-	adrp	x1, .LANCHOR116
+	bhi	.L373
+	adrp	x1, .LANCHOR107
 	adrp	x0, .LC1
-	mov	w2, 581
-	add	x1, x1, :lo12:.LANCHOR116
+	mov	w2, 578
+	add	x1, x1, :lo12:.LANCHOR107
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L478:
+.L373:
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L473:
+.L368:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L472
+	b	.L367
 	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
 	.section	.text.ftl_memset,"ax",@progbits
 	.align	2
@@ -3723,11 +3231,11 @@ FtlMemInit:
 	str	wzr, [x0, #:lo12:.LANCHOR64]
 	adrp	x0, .LANCHOR63
 	stp	x25, x26, [sp, 64]
-	adrp	x24, .LANCHOR108
+	adrp	x24, .LANCHOR118
 	str	wzr, [x0, #:lo12:.LANCHOR63]
 	adrp	x0, .LANCHOR65
 	stp	x27, x28, [sp, 80]
-	adrp	x23, .LANCHOR114
+	adrp	x23, .LANCHOR124
 	str	wzr, [x0, #:lo12:.LANCHOR65]
 	adrp	x0, .LANCHOR66
 	adrp	x25, .LANCHOR42
@@ -3746,19 +3254,19 @@ FtlMemInit:
 	str	wzr, [x0, #:lo12:.LANCHOR76]
 	adrp	x0, .LANCHOR77
 	str	wzr, [x0, #:lo12:.LANCHOR77]
-	adrp	x0, .LANCHOR117
-	str	wzr, [x0, #:lo12:.LANCHOR117]
+	adrp	x0, .LANCHOR108
+	str	wzr, [x0, #:lo12:.LANCHOR108]
 	adrp	x0, .LANCHOR87
 	str	wzr, [x0, #:lo12:.LANCHOR87]
-	adrp	x0, .LANCHOR118
-	str	w1, [x0, #:lo12:.LANCHOR118]
-	adrp	x0, .LANCHOR119
+	adrp	x0, .LANCHOR109
+	str	w1, [x0, #:lo12:.LANCHOR109]
+	adrp	x0, .LANCHOR110
 	adrp	x1, .LANCHOR99
-	str	wzr, [x0, #:lo12:.LANCHOR119]
+	str	wzr, [x0, #:lo12:.LANCHOR110]
 	adrp	x0, .LANCHOR84
 	str	wzr, [x0, #:lo12:.LANCHOR84]
-	adrp	x0, .LANCHOR112
-	str	wzr, [x0, #:lo12:.LANCHOR112]
+	adrp	x0, .LANCHOR111
+	str	wzr, [x0, #:lo12:.LANCHOR111]
 	mov	w0, -1
 	strh	w0, [x1, #:lo12:.LANCHOR99]
 	adrp	x1, .LANCHOR100
@@ -3785,31 +3293,31 @@ FtlMemInit:
 	mul	w0, w1, w0
 	bl	ftl_malloc
 	ldrh	w19, [x22, #:lo12:.LANCHOR3]
-	adrp	x3, .LANCHOR98
-	str	x3, [x29, 104]
+	adrp	x5, .LANCHOR98
+	str	x5, [x29, 104]
 	lsl	w20, w19, 5
 	lsl	w19, w19, 7
-	str	x0, [x3, #:lo12:.LANCHOR98]
+	str	x0, [x5, #:lo12:.LANCHOR98]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x15, .LANCHOR120
+	adrp	x15, .LANCHOR112
 	str	x15, [x29, 112]
-	str	x0, [x15, #:lo12:.LANCHOR120]
+	str	x0, [x15, #:lo12:.LANCHOR112]
 	mov	w0, w20
 	bl	ftl_malloc
-	adrp	x11, .LANCHOR121
+	adrp	x11, .LANCHOR113
 	str	x11, [x29, 120]
-	str	x0, [x11, #:lo12:.LANCHOR121]
+	str	x0, [x11, #:lo12:.LANCHOR113]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x14, .LANCHOR122
+	adrp	x14, .LANCHOR114
 	str	x14, [x29, 128]
-	str	x0, [x14, #:lo12:.LANCHOR122]
+	str	x0, [x14, #:lo12:.LANCHOR114]
 	mov	w0, w20
 	bl	ftl_malloc
-	adrp	x13, .LANCHOR111
+	adrp	x13, .LANCHOR106
 	str	x13, [x29, 136]
-	str	x0, [x13, #:lo12:.LANCHOR111]
+	str	x0, [x13, #:lo12:.LANCHOR106]
 	mov	w0, w20
 	bl	ftl_malloc
 	adrp	x20, .LANCHOR94
@@ -3823,19 +3331,19 @@ FtlMemInit:
 	str	w0, [x20, #:lo12:.LANCHOR94]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x10, .LANCHOR107
+	adrp	x10, .LANCHOR115
 	str	x10, [x29, 152]
-	str	x0, [x10, #:lo12:.LANCHOR107]
+	str	x0, [x10, #:lo12:.LANCHOR115]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x8, .LANCHOR123
+	adrp	x8, .LANCHOR116
 	str	x8, [x29, 160]
-	str	x0, [x8, #:lo12:.LANCHOR123]
+	str	x0, [x8, #:lo12:.LANCHOR116]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x7, .LANCHOR124
+	adrp	x7, .LANCHOR117
 	str	x7, [x29, 168]
-	str	x0, [x7, #:lo12:.LANCHOR124]
+	str	x0, [x7, #:lo12:.LANCHOR117]
 	ldr	w0, [x20, #:lo12:.LANCHOR94]
 	mul	w0, w19, w0
 	bl	ftl_malloc
@@ -3844,31 +3352,45 @@ FtlMemInit:
 	str	x0, [x6, #:lo12:.LANCHOR91]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x5, .LANCHOR115
-	str	x5, [x29, 184]
-	str	x0, [x5, #:lo12:.LANCHOR115]
+	str	x0, [x24, #:lo12:.LANCHOR118]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x19, .LANCHOR24
-	adrp	x4, .LANCHOR113
+	adrp	x4, .LANCHOR119
 	ldr	w2, [x20, #:lo12:.LANCHOR94]
-	str	x4, [x29, 192]
-	str	x0, [x4, #:lo12:.LANCHOR113]
+	str	x4, [x29, 184]
+	str	x0, [x4, #:lo12:.LANCHOR119]
 	mov	w0, 24
 	mul	w0, w2, w0
 	bl	ftl_malloc
+	adrp	x3, .LANCHOR90
+	str	x3, [x29, 192]
+	str	x0, [x3, #:lo12:.LANCHOR90]
+	mov	w0, w19
+	bl	ftl_malloc
+	adrp	x2, .LANCHOR120
+	str	x0, [x2, #:lo12:.LANCHOR120]
+	mov	w0, w19
+	bl	ftl_malloc
+	adrp	x19, .LANCHOR24
+	adrp	x2, .LANCHOR121
+	str	x0, [x2, #:lo12:.LANCHOR121]
+	adrp	x0, .LANCHOR12
+	ldrh	w0, [x0, #:lo12:.LANCHOR12]
+	lsl	w0, w0, 2
+	bl	ftl_malloc
+	adrp	x2, .LANCHOR122
 	ldrh	w28, [x19, #:lo12:.LANCHOR24]
-	adrp	x1, .LANCHOR90
-	str	x0, [x1, #:lo12:.LANCHOR90]
+	str	x0, [x2, #:lo12:.LANCHOR122]
 	ldrh	w0, [x22, #:lo12:.LANCHOR3]
 	adrp	x22, .LANCHOR92
 	mul	w28, w28, w0
 	mov	w0, w28
 	bl	ftl_malloc
-	str	x0, [x24, #:lo12:.LANCHOR108]
+	adrp	x1, .LANCHOR123
+	str	x0, [x1, #:lo12:.LANCHOR123]
 	lsl	w0, w28, 2
 	bl	ftl_malloc
-	str	x0, [x23, #:lo12:.LANCHOR114]
+	str	x0, [x23, #:lo12:.LANCHOR124]
 	ldrh	w1, [x19, #:lo12:.LANCHOR24]
 	adrp	x28, .LANCHOR125
 	ldr	w0, [x20, #:lo12:.LANCHOR94]
@@ -3987,46 +3509,47 @@ FtlMemInit:
 	mul	w0, w1, w0
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	ldp	x3, x15, [x29, 104]
+	ldp	x5, x15, [x29, 104]
 	adrp	x1, .LANCHOR37
 	ldrh	w20, [x20, #:lo12:.LANCHOR137]
 	add	x2, x1, :lo12:.LANCHOR37
 	ldp	x11, x14, [x29, 120]
 	mov	w30, w20
 	ldp	x13, x12, [x29, 136]
-	mov	x16, x3
+	mov	x16, x5
 	ldp	x10, x8, [x29, 152]
-	str	x0, [x2, 32]
+	mov	x5, x24
 	ldp	x7, x6, [x29, 168]
+	str	x0, [x2, 32]
+	ldp	x4, x3, [x29, 184]
 	adrp	x17, .LANCHOR96
-	ldp	x5, x4, [x29, 184]
-	adrp	x3, .LANCHOR90
 	ldrh	w28, [x21, #:lo12:.LANCHOR10]
 	add	x21, x2, 40
+	adrp	x24, .LANCHOR123
 	mov	x0, 1
 	str	x19, [x29, 200]
-.L482:
+.L377:
 	cmp	w0, w28
-	bcc	.L483
+	bcc	.L378
 	mov	w2, 8
 	sub	w2, w2, w0
 	add	x2, x2, 1
 	add	x1, x1, :lo12:.LANCHOR37
 	mov	x19, 0
-.L484:
+.L379:
 	add	x19, x19, 1
 	cmp	x19, x2
-	bne	.L485
+	bne	.L380
 	ldr	x0, [x27, #:lo12:.LANCHOR129]
-	cbnz	x0, .L486
-.L488:
+	cbnz	x0, .L381
+.L383:
 	adrp	x1, .LANCHOR138
-	adrp	x0, .LC85
+	adrp	x0, .LC84
 	add	x1, x1, :lo12:.LANCHOR138
-	add	x0, x0, :lo12:.LC85
+	add	x0, x0, :lo12:.LC84
 	bl	printf
 	mov	w0, -1
-.L481:
+.L376:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -4034,95 +3557,95 @@ FtlMemInit:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 208
 	ret
-.L483:
+.L378:
 	ldr	x19, [x2, 32]
 	add	w0, w0, 1
 	add	x19, x19, x30, uxtw 2
 	add	w30, w30, w20
 	str	x19, [x21], 8
-	b	.L482
-.L485:
+	b	.L377
+.L380:
 	add	x20, x0, x19
 	add	x20, x1, x20, lsl 3
 	str	xzr, [x20, 24]
-	b	.L484
-.L486:
+	b	.L379
+.L381:
 	ldr	x0, [x26, #:lo12:.LANCHOR130]
-	cbz	x0, .L488
+	cbz	x0, .L383
 	adrp	x0, .LANCHOR134
 	ldr	x0, [x0, #:lo12:.LANCHOR134]
-	cbz	x0, .L488
+	cbz	x0, .L383
 	adrp	x0, .LANCHOR135
 	ldr	x0, [x0, #:lo12:.LANCHOR135]
-	cbz	x0, .L488
+	cbz	x0, .L383
 	adrp	x0, .LANCHOR55
 	ldr	x0, [x0, #:lo12:.LANCHOR55]
-	cbz	x0, .L488
+	cbz	x0, .L383
 	adrp	x0, .LANCHOR136
 	ldr	x0, [x0, #:lo12:.LANCHOR136]
-	cbz	x0, .L488
+	cbz	x0, .L383
 	adrp	x0, .LANCHOR40
 	ldr	x0, [x0, #:lo12:.LANCHOR40]
-	cbz	x0, .L488
+	cbz	x0, .L383
 	adrp	x0, .LANCHOR37+32
 	ldr	x0, [x0, #:lo12:.LANCHOR37+32]
-	cbz	x0, .L488
+	cbz	x0, .L383
 	ldr	x0, [x25, #:lo12:.LANCHOR42]
-	cbz	x0, .L488
+	cbz	x0, .L383
 	ldr	x0, [x17, #:lo12:.LANCHOR96]
-	cbz	x0, .L488
+	cbz	x0, .L383
 	ldr	x0, [x16, #:lo12:.LANCHOR98]
-	cbz	x0, .L488
-	ldr	x0, [x15, #:lo12:.LANCHOR120]
-	cbz	x0, .L488
-	ldr	x0, [x14, #:lo12:.LANCHOR122]
-	cbz	x0, .L488
-	ldr	x0, [x13, #:lo12:.LANCHOR111]
-	cbz	x0, .L488
+	cbz	x0, .L383
+	ldr	x0, [x15, #:lo12:.LANCHOR112]
+	cbz	x0, .L383
+	ldr	x0, [x14, #:lo12:.LANCHOR114]
+	cbz	x0, .L383
+	ldr	x0, [x13, #:lo12:.LANCHOR106]
+	cbz	x0, .L383
 	ldr	x0, [x12, #:lo12:.LANCHOR93]
-	cbz	x0, .L488
-	ldr	x0, [x11, #:lo12:.LANCHOR121]
-	cbz	x0, .L488
-	ldr	x0, [x10, #:lo12:.LANCHOR107]
-	cbz	x0, .L488
-	ldr	x0, [x8, #:lo12:.LANCHOR123]
-	cbz	x0, .L488
-	ldr	x0, [x7, #:lo12:.LANCHOR124]
-	cbz	x0, .L488
+	cbz	x0, .L383
+	ldr	x0, [x11, #:lo12:.LANCHOR113]
+	cbz	x0, .L383
+	ldr	x0, [x10, #:lo12:.LANCHOR115]
+	cbz	x0, .L383
+	ldr	x0, [x8, #:lo12:.LANCHOR116]
+	cbz	x0, .L383
+	ldr	x0, [x7, #:lo12:.LANCHOR117]
+	cbz	x0, .L383
 	ldr	x0, [x6, #:lo12:.LANCHOR91]
-	cbz	x0, .L488
-	ldr	x0, [x5, #:lo12:.LANCHOR115]
-	cbz	x0, .L488
-	ldr	x0, [x4, #:lo12:.LANCHOR113]
-	cbz	x0, .L488
+	cbz	x0, .L383
+	ldr	x0, [x5, #:lo12:.LANCHOR118]
+	cbz	x0, .L383
+	ldr	x0, [x4, #:lo12:.LANCHOR119]
+	cbz	x0, .L383
 	ldr	x0, [x3, #:lo12:.LANCHOR90]
-	cbz	x0, .L488
-	ldr	x0, [x24, #:lo12:.LANCHOR108]
-	cbz	x0, .L488
-	ldr	x0, [x23, #:lo12:.LANCHOR114]
-	cbz	x0, .L488
+	cbz	x0, .L383
+	ldr	x0, [x24, #:lo12:.LANCHOR123]
+	cbz	x0, .L383
+	ldr	x0, [x23, #:lo12:.LANCHOR124]
+	cbz	x0, .L383
 	ldr	x0, [x22, #:lo12:.LANCHOR92]
-	cbz	x0, .L488
+	cbz	x0, .L383
 	ldr	x0, [x29, 200]
 	ldr	x0, [x0, #:lo12:.LANCHOR43]
-	cbz	x0, .L488
+	cbz	x0, .L383
 	adrp	x0, .LANCHOR126
 	ldr	x0, [x0, #:lo12:.LANCHOR126]
-	cbz	x0, .L488
+	cbz	x0, .L383
 	adrp	x0, .LANCHOR36
 	ldr	x0, [x0, #:lo12:.LANCHOR36]
-	cbz	x0, .L488
+	cbz	x0, .L383
 	adrp	x0, .LANCHOR131
 	ldr	x0, [x0, #:lo12:.LANCHOR131]
-	cbz	x0, .L488
+	cbz	x0, .L383
 	adrp	x0, .LANCHOR132
 	ldr	x0, [x0, #:lo12:.LANCHOR132]
-	cbz	x0, .L488
+	cbz	x0, .L383
 	adrp	x0, .LANCHOR133
 	ldr	x0, [x0, #:lo12:.LANCHOR133]
-	cbz	x0, .L488
+	cbz	x0, .L383
 	mov	w0, 0
-	b	.L481
+	b	.L376
 	.size	FtlMemInit, .-FtlMemInit
 	.section	.text.FtlBbt2Bitmap,"ax",@progbits
 	.align	2
@@ -4148,19 +3671,19 @@ FtlBbt2Bitmap:
 	mov	w1, 0
 	mov	x0, x20
 	bl	ftl_memset
-.L586:
+.L481:
 	ldrh	w0, [x22, x19]
 	cmp	w0, w24
-	beq	.L583
+	beq	.L478
 	ldrh	w1, [x21]
 	cmp	w1, w0
-	bhi	.L585
+	bhi	.L480
 	adrp	x0, .LC1
 	mov	w2, 74
 	mov	x1, x23
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L585:
+.L480:
 	ldrh	w2, [x22, x19]
 	mov	w1, 1
 	add	x19, x19, 2
@@ -4171,8 +3694,8 @@ FtlBbt2Bitmap:
 	ldr	w1, [x20, x0]
 	orr	w1, w1, w2
 	str	w1, [x20, x0]
-	bne	.L586
-.L583:
+	bne	.L481
+.L478:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -4215,998 +3738,724 @@ FtlFreeSysBlkQueueInit:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
-	.section	.text.load_l2p_region,"ax",@progbits
+	.section	.text.ftl_free_no_use_map_blk,"ax",@progbits
 	.align	2
-	.global	load_l2p_region
-	.type	load_l2p_region, %function
-load_l2p_region:
+	.global	ftl_free_no_use_map_blk
+	.type	ftl_free_no_use_map_blk, %function
+ftl_free_no_use_map_blk:
 	stp	x29, x30, [sp, -80]!
+	mov	w1, 0
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR32
 	stp	x19, x20, [sp, 16]
-	and	x19, x1, 65535
+	mov	x19, x0
+	ldrh	w2, [x0, 10]
 	stp	x21, x22, [sp, 32]
-	and	w21, w0, 65535
-	stp	x25, x26, [sp, 64]
-	ldrh	w0, [x23, #:lo12:.LANCHOR32]
-	cmp	w0, w21
-	bcs	.L594
-	adrp	x1, .LANCHOR140
-	adrp	x0, .LC1
-	mov	w2, 492
-	add	x1, x1, :lo12:.LANCHOR140
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L594:
-	adrp	x26, .LANCHOR134
-	ubfiz	x0, x21, 2, 16
-	adrp	x22, .LANCHOR55
-	ldr	x1, [x26, #:lo12:.LANCHOR134]
-	ldr	w24, [x1, x0]
-	cbnz	w24, .L595
-	ldr	x0, [x22, #:lo12:.LANCHOR55]
-	lsl	x19, x19, 4
-	adrp	x1, .LANCHOR23
-	add	x0, x0, x19
-	ldrh	w2, [x1, #:lo12:.LANCHOR23]
-	mov	w1, 255
-	ldr	x0, [x0, 8]
-	bl	ftl_memset
-	ldr	x0, [x22, #:lo12:.LANCHOR55]
-	add	x1, x0, x19
-	strh	w21, [x0, x19]
-	str	wzr, [x1, 4]
-.L596:
-	mov	w0, 0
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
-	ret
-.L595:
-	ldr	x0, [x22, #:lo12:.LANCHOR55]
-	lsl	x19, x19, 4
-	adrp	x20, .LANCHOR106
-	add	x20, x20, :lo12:.LANCHOR106
-	add	x0, x0, x19
-	mov	w2, 1
-	mov	w1, w2
-	str	w24, [x20, 4]
-	ldr	x0, [x0, 8]
-	str	x0, [x20, 8]
-	adrp	x0, .LANCHOR108
-	ldr	x0, [x0, #:lo12:.LANCHOR108]
-	str	x0, [x20, 16]
-	mov	x0, x20
-	bl	FlashReadPages
-	ldr	x25, [x20, 16]
-	ldrh	w0, [x25, 8]
-	cmp	w0, w21
-	beq	.L597
-	mov	w2, w24
-	mov	w1, w21
-	adrp	x0, .LC86
-	add	x0, x0, :lo12:.LC86
-	bl	printf
-	ldr	x1, [x20, 16]
-	mov	w3, 4
-	adrp	x0, .LC87
-	mov	w2, w3
-	add	x0, x0, :lo12:.LC87
-	bl	rknand_print_hex
-	ldrh	w3, [x23, #:lo12:.LANCHOR32]
-	adrp	x0, .LC88
-	ldr	x1, [x26, #:lo12:.LANCHOR134]
-	mov	w2, 4
-	add	x0, x0, :lo12:.LC88
-	bl	rknand_print_hex
-.L597:
-	ldrh	w0, [x25, 8]
-	cmp	w0, w21
-	beq	.L598
-	adrp	x1, .LANCHOR140
-	adrp	x0, .LC1
-	mov	w2, 513
-	add	x1, x1, :lo12:.LANCHOR140
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L598:
-	ldr	x0, [x22, #:lo12:.LANCHOR55]
-	add	x1, x0, x19
-	str	wzr, [x1, 4]
-	strh	w21, [x0, x19]
-	b	.L596
-	.size	load_l2p_region, .-load_l2p_region
-	.section	.text.ftl_free_no_use_map_blk,"ax",@progbits
-	.align	2
-	.global	ftl_free_no_use_map_blk
-	.type	ftl_free_no_use_map_blk, %function
-ftl_free_no_use_map_blk:
-	stp	x29, x30, [sp, -80]!
-	mov	w1, 0
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	x19, x0
-	ldrh	w2, [x0, 10]
-	stp	x21, x22, [sp, 32]
-	ldp	x21, x20, [x0, 32]
-	stp	x23, x24, [sp, 48]
-	stp	x25, x26, [sp, 64]
-	lsl	w2, w2, 1
-	ldr	x23, [x0, 16]
-	mov	x0, x21
+	ldp	x21, x20, [x0, 32]
+	stp	x23, x24, [sp, 48]
+	ldr	x22, [x0, 16]
+	lsl	w2, w2, 1
+	mov	x0, x21
+	str	x25, [sp, 64]
 	bl	ftl_memset
 	mov	w0, 0
-.L601:
+.L489:
 	ldrh	w1, [x19, 6]
 	cmp	w1, w0
-	bhi	.L605
-	ldrh	w26, [x21]
-	adrp	x24, .LANCHOR20
-	add	x24, x24, :lo12:.LANCHOR20
-	mov	w25, 0
+	bhi	.L493
+	adrp	x0, .LANCHOR20
+	mov	w23, 0
 	mov	w20, 0
-.L606:
+	ldrh	w1, [x0, #:lo12:.LANCHOR20]
+	ldrh	w0, [x19]
+	strh	w1, [x21, x0, lsl 1]
+	ldrh	w24, [x21]
+.L494:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L610
-	mov	w0, w25
+	bhi	.L498
+	mov	w0, w23
+	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L605:
+.L493:
 	ubfiz	x1, x0, 2, 16
 	ldr	w2, [x20, x1]
 	mov	w1, 0
 	ubfx	x2, x2, 10, 16
-.L602:
+.L490:
 	ldrh	w3, [x19, 10]
 	cmp	w3, w1
-	bhi	.L604
+	bhi	.L492
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L601
-.L604:
+	b	.L489
+.L492:
 	ubfiz	x3, x1, 1, 16
-	ldrh	w4, [x23, x3]
+	ldrh	w4, [x22, x3]
 	cmp	w4, w2
-	bne	.L603
+	bne	.L491
+	cbz	w2, .L491
 	ldrh	w4, [x21, x3]
 	add	w4, w4, 1
 	strh	w4, [x21, x3]
-.L603:
+.L491:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L602
-.L610:
-	ldrh	w0, [x19]
-	uxtw	x22, w20
-	cmp	w0, w20
-	bne	.L607
-	ldrh	w0, [x24]
-	ldrh	w1, [x19, 2]
-	cmp	w1, w0
-	bcs	.L607
-	strh	w0, [x21, x22, lsl 1]
-.L607:
-	lsl	x22, x22, 1
-	ldrh	w0, [x21, x22]
-	cmp	w26, w0
-	bls	.L608
-	mov	w25, w20
-	mov	w26, w0
-.L608:
-	cbnz	w0, .L609
-	ldrh	w0, [x23, x22]
-	cbz	w0, .L609
+	b	.L490
+.L498:
+	ubfiz	x0, x20, 1, 16
+	ldrh	w1, [x21, x0]
+	cmp	w24, w1
+	bls	.L495
+	add	x25, x22, x0
+	ldrh	w0, [x22, x0]
+	cbnz	w0, .L496
+.L497:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L494
+.L495:
+	cbnz	w1, .L497
+	add	x25, x22, x0
+	ldrh	w0, [x22, x0]
+	cbz	w0, .L497
+.L499:
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-	strh	wzr, [x23, x22]
+	strh	wzr, [x25]
 	ldrh	w0, [x19, 8]
 	sub	w0, w0, #1
 	strh	w0, [x19, 8]
-.L609:
-	add	w20, w20, 1
-	and	w20, w20, 65535
-	b	.L606
+	b	.L497
+.L500:
+	mov	w24, 0
+	b	.L499
+.L496:
+	mov	w23, w20
+	cbz	w1, .L500
+	mov	w24, w1
+	b	.L497
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
-	.section	.text.Ftl_write_map_blk_to_last_page,"ax",@progbits
+	.section	.text.FtlL2PDataInit,"ax",@progbits
 	.align	2
-	.global	Ftl_write_map_blk_to_last_page
-	.type	Ftl_write_map_blk_to_last_page, %function
-Ftl_write_map_blk_to_last_page:
+	.global	FtlL2PDataInit
+	.type	FtlL2PDataInit, %function
+FtlL2PDataInit:
 	stp	x29, x30, [sp, -64]!
-	mov	w1, 65535
+	mov	w1, 0
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	mov	x19, x0
-	ldr	x20, [x0, 16]
+	adrp	x19, .LANCHOR130
+	adrp	x20, .LANCHOR30
 	stp	x21, x22, [sp, 32]
-	ldrh	w0, [x0]
+	ldr	x0, [x19, #:lo12:.LANCHOR130]
+	adrp	x22, .LANCHOR23
+	ldr	w2, [x20, #:lo12:.LANCHOR30]
+	adrp	x21, .LANCHOR33
 	str	x23, [sp, 48]
-	cmp	w0, w1
-	bne	.L616
-	ldrh	w0, [x19, 8]
-	cbz	w0, .L617
+	adrp	x23, .LANCHOR136
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	ldrh	w0, [x21, #:lo12:.LANCHOR33]
+	mov	w1, 255
+	ldrh	w2, [x22, #:lo12:.LANCHOR23]
+	mul	w2, w2, w0
+	ldr	x0, [x23, #:lo12:.LANCHOR136]
+	bl	ftl_memset
+	adrp	x0, .LANCHOR55
+	ldrh	w3, [x21, #:lo12:.LANCHOR33]
+	ldr	x6, [x23, #:lo12:.LANCHOR136]
+	mov	x1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR55]
+	mov	w2, -1
+	ldrh	w5, [x22, #:lo12:.LANCHOR23]
+	add	x3, x0, x3, lsl 4
+.L510:
+	add	x4, x1, x5
+	cmp	x0, x3
+	bne	.L511
+	adrp	x1, .LANCHOR140
+	add	x0, x1, :lo12:.LANCHOR140
+	ldp	x21, x22, [sp, 32]
+	strh	w2, [x1, #:lo12:.LANCHOR140]
+	ldr	w1, [x20, #:lo12:.LANCHOR30]
+	strh	w1, [x0, 10]
+	mov	w1, -3902
+	strh	w1, [x0, 4]
 	adrp	x1, .LANCHOR141
-	adrp	x0, .LC1
-	mov	w2, 641
-	add	x1, x1, :lo12:.LANCHOR141
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L617:
-	ldrh	w0, [x19, 8]
-	add	w0, w0, 1
-	strh	w0, [x19, 8]
-	bl	FtlFreeSysBlkQueueOut
-	strh	w0, [x20]
-	ldr	w0, [x19, 48]
-	strh	wzr, [x19, 2]
-	add	w0, w0, 1
-	strh	wzr, [x19]
-	str	w0, [x19, 48]
-.L618:
-	mov	w0, 0
 	ldr	x23, [sp, 48]
+	strh	w2, [x0, 2]
+	ldrh	w1, [x1, #:lo12:.LANCHOR141]
+	strh	w1, [x0, 8]
+	adrp	x1, .LANCHOR32
+	ldrh	w1, [x1, #:lo12:.LANCHOR32]
+	strh	w1, [x0, 6]
+	adrp	x1, .LANCHOR129
+	ldr	x1, [x1, #:lo12:.LANCHOR129]
+	str	x1, [x0, 16]
+	adrp	x1, .LANCHOR135
+	ldr	x1, [x1, #:lo12:.LANCHOR135]
+	str	x1, [x0, 24]
+	ldr	x1, [x19, #:lo12:.LANCHOR130]
 	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
+	str	x1, [x0, 32]
+	adrp	x1, .LANCHOR134
+	ldr	x1, [x1, #:lo12:.LANCHOR134]
+	str	x1, [x0, 40]
 	ldp	x29, x30, [sp], 64
 	ret
-.L616:
-	ubfiz	x0, x0, 1, 16
-	adrp	x1, .LANCHOR108
-	adrp	x23, .LANCHOR107
-	ldr	x22, [x19, 40]
-	ldr	x1, [x1, #:lo12:.LANCHOR108]
-	ldrh	w21, [x20, x0]
-	adrp	x20, .LANCHOR106
-	ldrh	w0, [x19, 2]
-	add	x2, x20, :lo12:.LANCHOR106
-	orr	w0, w0, w21, lsl 10
-	str	w0, [x2, 4]
-	ldr	x0, [x23, #:lo12:.LANCHOR107]
-	str	x1, [x2, 16]
-	str	x0, [x2, 8]
-	ldr	w2, [x19, 48]
-	str	w2, [x1, 4]
-	mov	w2, -1291
-	strh	w2, [x1, 8]
-	ldrh	w2, [x19, 4]
-	strh	w2, [x1]
-	strh	w21, [x1, 2]
-	adrp	x1, .LANCHOR20
-	ldrh	w2, [x1, #:lo12:.LANCHOR20]
-	mov	w1, 255
-	lsl	w2, w2, 3
-	bl	ftl_memset
-	ldrh	w4, [x19, 6]
-	mov	x1, 0
-	ldr	x3, [x23, #:lo12:.LANCHOR107]
-	mov	w2, 0
-.L619:
-	cmp	w4, w1, uxth
-	bhi	.L621
-	mov	w2, 1
-	mov	w3, 0
-	mov	w1, w2
-	add	x0, x20, :lo12:.LANCHOR106
-	bl	FlashProgPages
-	ldrh	w0, [x19, 2]
-	add	w0, w0, 1
-	strh	w0, [x19, 2]
-	mov	x0, x19
-	bl	ftl_map_blk_gc
-	b	.L618
-.L621:
-	ldr	w0, [x22, x1, lsl 2]
-	cmp	w21, w0, lsr 10
-	bne	.L620
-	add	w2, w2, 1
-	and	w2, w2, 65535
-	ubfiz	x0, x2, 1, 16
-	str	w1, [x3, x0, lsl 2]
-	add	x0, x0, 1
-	ldr	w5, [x22, x1, lsl 2]
-	str	w5, [x3, x0, lsl 2]
-.L620:
-	add	x1, x1, 1
-	b	.L619
-	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
-	.section	.text.FtlMapWritePage,"ax",@progbits
+.L511:
+	and	x1, x1, -4
+	strh	w2, [x0]
+	add	x1, x6, x1
+	str	wzr, [x0, 4]
+	str	x1, [x0, 8]
+	add	x0, x0, 16
+	mov	x1, x4
+	b	.L510
+	.size	FtlL2PDataInit, .-FtlL2PDataInit
+	.section	.text.FtlVariablesInit,"ax",@progbits
 	.align	2
-	.global	FtlMapWritePage
-	.type	FtlMapWritePage, %function
-FtlMapWritePage:
-	stp	x29, x30, [sp, -112]!
+	.global	FtlVariablesInit
+	.type	FtlVariablesInit, %function
+FtlVariablesInit:
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR142
+	mov	w1, -1
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR66
-	stp	x25, x26, [sp, 64]
-	adrp	x24, .LANCHOR142
-	stp	x27, x28, [sp, 80]
-	adrp	x26, .LANCHOR20
-	stp	x19, x20, [sp, 16]
-	mov	w25, w1
-	mov	x19, x0
-	mov	x27, x2
-	add	x23, x23, :lo12:.LANCHOR66
-	add	x24, x24, :lo12:.LANCHOR142
-	add	x28, x26, :lo12:.LANCHOR20
-	stp	x21, x22, [sp, 32]
-	mov	w22, 0
-.L627:
-	ldr	w0, [x23]
-	ldrh	w1, [x19, 2]
-	add	w0, w0, 1
-	str	w0, [x23]
-	ldrh	w0, [x26, #:lo12:.LANCHOR20]
-	sub	w0, w0, #1
-	cmp	w1, w0
-	bge	.L628
-	ldrh	w1, [x19]
-	mov	w0, 65535
-	cmp	w1, w0
-	bne	.L629
-.L628:
-	mov	x0, x19
-	bl	Ftl_write_map_blk_to_last_page
-.L629:
-	ldrh	w1, [x19]
-	ldr	x0, [x19, 16]
-	ldrh	w0, [x0, x1, lsl 1]
-	cbnz	w0, .L630
-	adrp	x0, .LC1
-	mov	w2, 699
-	mov	x1, x24
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L630:
-	ldrh	w1, [x19]
-	ldrh	w0, [x19, 10]
-	cmp	w1, w0
-	bcc	.L631
-	adrp	x0, .LC1
-	mov	w2, 700
-	mov	x1, x24
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L631:
-	ldrh	w1, [x19]
-	adrp	x21, .LANCHOR106
-	ldr	x0, [x19, 16]
-	add	x20, x21, :lo12:.LANCHOR106
-	mov	w2, 16
-	ldrh	w3, [x0, x1, lsl 1]
+	strh	w1, [x0, #:lo12:.LANCHOR142]
+	adrp	x0, .LANCHOR143
+	mov	w1, -1
+	str	x19, [sp, 16]
+	str	wzr, [x0, #:lo12:.LANCHOR143]
+	adrp	x0, .LANCHOR144
+	adrp	x19, .LANCHOR6
+	str	wzr, [x0, #:lo12:.LANCHOR144]
+	adrp	x0, .LANCHOR145
+	str	w1, [x0, #:lo12:.LANCHOR145]
+	adrp	x0, .LANCHOR35
 	mov	w1, 0
-	ldrh	w0, [x19, 2]
-	str	w3, [x29, 108]
-	str	x27, [x20, 8]
-	orr	w0, w0, w3, lsl 10
-	str	w0, [x20, 4]
-	adrp	x0, .LANCHOR108
-	ldr	x0, [x0, #:lo12:.LANCHOR108]
-	str	x0, [x20, 16]
+	strh	wzr, [x0, #:lo12:.LANCHOR35]
+	adrp	x0, .LANCHOR27
+	ldrh	w2, [x0, #:lo12:.LANCHOR27]
+	adrp	x0, .LANCHOR36
+	ldr	x0, [x0, #:lo12:.LANCHOR36]
+	lsl	w2, w2, 1
 	bl	ftl_memset
-	ldr	x0, [x20, 16]
-	ldr	w1, [x19, 48]
-	ldr	w3, [x29, 108]
-	str	w1, [x0, 4]
-	ldrh	w1, [x19, 4]
-	strh	w1, [x0]
-	strh	w3, [x0, 2]
-	mov	w3, 1
-	strh	w25, [x0, 8]
-	mov	w1, w3
-	mov	w2, w3
-	mov	x0, x20
-	bl	FlashProgPages
-	ldrh	w0, [x19, 2]
-	ldr	w1, [x21, #:lo12:.LANCHOR106]
-	add	w0, w0, 1
-	and	w0, w0, 65535
-	strh	w0, [x19, 2]
-	cmn	w1, #1
-	bne	.L632
-	ldr	w1, [x20, 4]
-	adrp	x0, .LC89
-	add	x0, x0, :lo12:.LC89
-	add	w22, w22, 1
-	and	w22, w22, 65535
-	bl	printf
-	ldrh	w0, [x19, 2]
-	cmp	w0, 2
-	bhi	.L633
-	ldrh	w0, [x28]
-	sub	w0, w0, #1
-	strh	w0, [x19, 2]
-.L633:
-	cmp	w22, 3
-	bls	.L634
-	add	x21, x21, :lo12:.LANCHOR106
-	adrp	x0, .LC90
-	mov	w2, w22
-	add	x0, x0, :lo12:.LC90
-	ldr	w1, [x21, 4]
-	bl	printf
-.L635:
-	b	.L635
-.L634:
-	ldr	w0, [x19, 52]
-	cbz	w0, .L627
-.L644:
-	b	.L644
-.L632:
-	cmp	w0, 1
-	beq	.L627
-	ldr	x0, [x19, 40]
-	ldr	w1, [x20, 4]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x27, x28, [sp, 80]
-	str	w1, [x0, w25, uxtw 2]
-	ldp	x19, x20, [sp, 16]
+	adrp	x0, .LANCHOR43
+	ldrh	w2, [x19, #:lo12:.LANCHOR6]
+	mov	w1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR43]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	adrp	x0, .LANCHOR126
+	ldrh	w2, [x19, #:lo12:.LANCHOR6]
+	mov	w1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR126]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	mov	w2, 48
+	mov	w1, 0
+	adrp	x0, .LANCHOR39
+	add	x0, x0, :lo12:.LANCHOR39
+	bl	ftl_memset
+	mov	w2, 512
+	mov	w1, 0
+	adrp	x0, .LANCHOR81
+	add	x0, x0, :lo12:.LANCHOR81
+	bl	ftl_memset
+	bl	FtlGcBufInit
+	bl	FtlL2PDataInit
+	ldr	x19, [sp, 16]
 	mov	w0, 0
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 112
+	ldp	x29, x30, [sp], 32
 	ret
-	.size	FtlMapWritePage, .-FtlMapWritePage
-	.section	.text.ftl_map_blk_gc,"ax",@progbits
+	.size	FtlVariablesInit, .-FtlVariablesInit
+	.section	.text.SupperBlkListInit,"ax",@progbits
 	.align	2
-	.global	ftl_map_blk_gc
-	.type	ftl_map_blk_gc, %function
-ftl_map_blk_gc:
+	.global	SupperBlkListInit
+	.type	SupperBlkListInit, %function
+SupperBlkListInit:
 	stp	x29, x30, [sp, -96]!
+	adrp	x0, .LANCHOR6
+	mov	w1, 0
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	x19, x0
+	ldrh	w2, [x0, #:lo12:.LANCHOR6]
+	mov	w0, 6
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR20
+	adrp	x24, .LANCHOR40
+	stp	x19, x20, [sp, 16]
+	adrp	x23, .LANCHOR45
 	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR48
+	mul	w2, w2, w0
+	ldr	x0, [x24, #:lo12:.LANCHOR40]
 	stp	x25, x26, [sp, 64]
-	stp	x27, x28, [sp, 80]
-	ldr	x20, [x0, 16]
-	ldr	x24, [x0, 40]
-	bl	ftl_free_no_use_map_blk
-	ldrh	w1, [x19, 10]
-	ldrh	w2, [x19, 8]
-	sub	w1, w1, #4
-	cmp	w2, w1
-	blt	.L647
-	ubfiz	x0, x0, 1, 16
-	ldrh	w21, [x20, x0]
-	cbz	w21, .L647
-	ldr	w1, [x19, 52]
-	cbnz	w1, .L647
-	mov	w1, 1
-	str	w1, [x19, 52]
-	strh	wzr, [x20, x0]
-	ldrh	w0, [x19, 8]
-	ldrh	w1, [x19, 2]
-	sub	w0, w0, #1
-	strh	w0, [x19, 8]
-	ldrh	w0, [x23, #:lo12:.LANCHOR20]
-	cmp	w1, w0
-	bcc	.L648
-	mov	x0, x19
-	bl	ftl_map_blk_alloc_new_blk
-.L648:
-	adrp	x25, .LANCHOR106
-	adrp	x22, .LANCHOR143
-	add	x26, x25, :lo12:.LANCHOR106
-	add	x22, x22, :lo12:.LANCHOR143
+	adrp	x25, .LANCHOR5
+	str	x27, [sp, 80]
+	adrp	x26, .LANCHOR13
+	add	x25, x25, :lo12:.LANCHOR5
+	add	x26, x26, :lo12:.LANCHOR13
+	bl	ftl_memset
+	mov	w21, 0
+	adrp	x0, .LANCHOR47
 	mov	w20, 0
-.L649:
-	ldrh	w0, [x19, 6]
-	cmp	w0, w20
-	bhi	.L653
-	mov	w1, 1
-	mov	w0, w21
-	bl	FtlFreeSysBlkQueueIn
-	str	wzr, [x19, 52]
-.L647:
-	ldrh	w1, [x19, 2]
-	ldrh	w0, [x23, #:lo12:.LANCHOR20]
-	cmp	w1, w0
-	bcc	.L654
-	mov	x0, x19
-	bl	ftl_map_blk_alloc_new_blk
-.L654:
-	mov	w0, 0
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 96
-	ret
-.L653:
-	ubfiz	x27, x20, 2, 16
-	ldr	w1, [x24, x27]
-	cmp	w21, w1, lsr 10
-	bne	.L650
-	adrp	x2, .LANCHOR123
-	add	x0, x25, :lo12:.LANCHOR106
-	ldr	x2, [x2, #:lo12:.LANCHOR123]
-	str	x2, [x0, 8]
-	adrp	x2, .LANCHOR108
-	str	w1, [x0, 4]
-	ldr	x28, [x2, #:lo12:.LANCHOR108]
-	mov	w2, 1
-	str	x28, [x0, 16]
-	mov	w1, w2
-	bl	FlashReadPages
-	ldrh	w0, [x28, 8]
-	cmp	w0, w20
-	beq	.L651
-	adrp	x0, .LC1
-	mov	w2, 613
-	mov	x1, x22
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L651:
-	ldr	w0, [x26]
-	cmn	w0, #1
-	bne	.L652
-	str	wzr, [x24, x27]
-.L650:
-	add	w20, w20, 1
-	and	w20, w20, 65535
-	b	.L649
-.L652:
-	ldr	x2, [x26, 8]
-	mov	w1, w20
-	mov	x0, x19
-	bl	FtlMapWritePage
-	b	.L650
-	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
-	.section	.text.flush_l2p_region,"ax",@progbits
-	.align	2
-	.global	flush_l2p_region
-	.type	flush_l2p_region, %function
-flush_l2p_region:
-	stp	x29, x30, [sp, -32]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR55
-	ubfiz	x19, x0, 4, 16
-	ldr	x0, [x20, #:lo12:.LANCHOR55]
-	add	x1, x0, x19
-	ldr	x2, [x1, 8]
-	ldrh	w1, [x0, x19]
-	adrp	x0, .LANCHOR144
-	add	x0, x0, :lo12:.LANCHOR144
-	bl	FtlMapWritePage
-	ldr	x0, [x20, #:lo12:.LANCHOR55]
-	add	x0, x0, x19
-	ldp	x19, x20, [sp, 16]
-	ldr	w1, [x0, 4]
-	and	w1, w1, 2147483647
-	str	w1, [x0, 4]
-	mov	w0, 0
-	ldp	x29, x30, [sp], 32
-	ret
-	.size	flush_l2p_region, .-flush_l2p_region
-	.section	.text.log2phys,"ax",@progbits
-	.align	2
-	.global	log2phys
-	.type	log2phys, %function
-log2phys:
-	stp	x29, x30, [sp, -80]!
-	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	mov	x23, x1
-	adrp	x1, .LANCHOR22
-	stp	x19, x20, [sp, 16]
-	stp	x21, x22, [sp, 32]
-	mov	w24, w2
-	ldrh	w19, [x1, #:lo12:.LANCHOR22]
-	str	x25, [sp, 64]
-	add	w1, w19, 7
-	mov	x19, 1
-	lsr	w22, w0, w1
-	and	w22, w22, 65535
-	lsl	x19, x19, x1
-	adrp	x1, .LANCHOR61
-	sub	w19, w19, #1
-	ldr	w1, [x1, #:lo12:.LANCHOR61]
-	and	w19, w19, w0
-	and	x19, x19, 65535
-	cmp	w0, w1
-	bcc	.L662
-	adrp	x1, .LANCHOR145
+	mov	w19, 0
+	strh	wzr, [x23, #:lo12:.LANCHOR45]
+	str	xzr, [x0, #:lo12:.LANCHOR47]
+	adrp	x0, .LANCHOR41
+	strh	wzr, [x22, #:lo12:.LANCHOR48]
+	adrp	x27, .LANCHOR3
+	str	xzr, [x0, #:lo12:.LANCHOR41]
+	adrp	x0, .LANCHOR44
+	str	xzr, [x0, #:lo12:.LANCHOR44]
+.L516:
+	ldrh	w0, [x25]
+	cmp	w19, w0
+	bcs	.L523
+	adrp	x0, .LANCHOR19
+	ldrh	w8, [x27, #:lo12:.LANCHOR3]
+	mov	x6, 0
+	mov	w5, 0
+	ldrh	w7, [x0, #:lo12:.LANCHOR19]
+	b	.L524
+.L518:
+	ldrb	w0, [x26, x6]
+	mov	w1, w19
+	bl	V2P_block
+	bl	FtlBbmIsBadBlock
+	cbnz	w0, .L517
+	add	w5, w5, w7
+	and	w5, w5, 65535
+.L517:
+	add	x6, x6, 1
+.L524:
+	cmp	w8, w6, uxth
+	bhi	.L518
+	cbz	w5, .L519
+	mov	w0, 32768
+	sdiv	w5, w0, w5
+.L520:
+	ldr	x1, [x24, #:lo12:.LANCHOR40]
+	mov	w0, 6
+	umaddl	x0, w19, w0, x1
+	strh	w5, [x0, 4]
+	adrp	x0, .LANCHOR51
+	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+	cmp	w0, w19
+	beq	.L521
+	adrp	x0, .LANCHOR52
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
+	cmp	w0, w19
+	beq	.L521
+	adrp	x0, .LANCHOR53
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+	cmp	w0, w19
+	beq	.L521
+	adrp	x1, .LANCHOR42
+	ubfiz	x0, x19, 1, 16
+	ldr	x1, [x1, #:lo12:.LANCHOR42]
+	ldrh	w0, [x1, x0]
+	cbnz	w0, .L522
+	add	w21, w21, 1
+	mov	w0, w19
+	and	w21, w21, 65535
+	bl	INSERT_FREE_LIST
+.L521:
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L516
+.L519:
+	adrp	x1, .LANCHOR42
+	ubfiz	x0, x19, 1, 16
+	mov	w2, -1
+	ldr	x1, [x1, #:lo12:.LANCHOR42]
+	strh	w2, [x1, x0]
+	b	.L520
+.L522:
+	add	w20, w20, 1
+	mov	w0, w19
+	and	w20, w20, 65535
+	bl	INSERT_DATA_LIST
+	b	.L521
+.L523:
+	strh	w20, [x23, #:lo12:.LANCHOR45]
+	add	w20, w20, w21
+	strh	w21, [x22, #:lo12:.LANCHOR48]
+	cmp	w20, w0
+	ble	.L525
+	adrp	x1, .LANCHOR146
 	adrp	x0, .LC1
-	mov	w2, 808
-	add	x1, x1, :lo12:.LANCHOR145
+	mov	w2, 2170
+	add	x1, x1, :lo12:.LANCHOR146
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L662:
-	adrp	x21, .LANCHOR55
-	adrp	x0, .LANCHOR33
-	ldr	x2, [x21, #:lo12:.LANCHOR55]
-	ldrh	w1, [x0, #:lo12:.LANCHOR33]
-	mov	x0, 0
-.L663:
-	and	x20, x0, 65535
-	cmp	w20, w1
-	bcc	.L668
-	bl	select_l2p_ram_region
-	and	x20, x0, 65535
-	ldr	x2, [x21, #:lo12:.LANCHOR55]
-	ubfiz	x1, x20, 4, 16
-	mov	w25, w0
-	add	x3, x2, x1
-	ldrh	w2, [x2, x1]
-	mov	w1, 65535
-	cmp	w2, w1
-	beq	.L669
-	ldr	w1, [x3, 4]
-	tbz	w1, #31, .L669
-	bl	flush_l2p_region
-.L669:
-	mov	w1, w25
-	mov	w0, w22
-	bl	load_l2p_region
-	b	.L664
-.L668:
-	add	x0, x0, 1
-	add	x3, x2, x0, lsl 4
-	ldrh	w3, [x3, -16]
-	cmp	w3, w22
-	bne	.L663
-.L664:
-	ldr	x0, [x21, #:lo12:.LANCHOR55]
-	add	x0, x0, x20, lsl 4
-	cbnz	w24, .L665
-	ldr	x0, [x0, 8]
-	ldr	w0, [x0, x19, lsl 2]
-	str	w0, [x23]
-.L666:
-	ldr	x0, [x21, #:lo12:.LANCHOR55]
-	add	x20, x0, x20, lsl 4
-	ldr	w0, [x20, 4]
-	cmn	w0, #1
-	beq	.L671
-	add	w0, w0, 1
-	str	w0, [x20, 4]
-.L671:
+.L525:
 	mov	w0, 0
-	ldr	x25, [sp, 64]
+	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 80
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
 	ret
-.L665:
-	ldr	x1, [x0, 8]
-	ldr	w2, [x23]
-	str	w2, [x1, x19, lsl 2]
-	ldr	w1, [x0, 4]
-	orr	w1, w1, -2147483648
-	str	w1, [x0, 4]
-	adrp	x0, .LANCHOR56
-	strh	w22, [x0, #:lo12:.LANCHOR56]
-	b	.L666
-	.size	log2phys, .-log2phys
-	.section	.text.FtlReUsePrevPpa,"ax",@progbits
+	.size	SupperBlkListInit, .-SupperBlkListInit
+	.section	.text.FtlGcPageVarInit,"ax",@progbits
 	.align	2
-	.global	FtlReUsePrevPpa
-	.type	FtlReUsePrevPpa, %function
-FtlReUsePrevPpa:
-	stp	x29, x30, [sp, -80]!
+	.global	FtlGcPageVarInit
+	.type	FtlGcPageVarInit, %function
+FtlGcPageVarInit:
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR95
+	mov	w1, 255
+	add	x29, sp, 0
+	strh	wzr, [x0, #:lo12:.LANCHOR95]
+	adrp	x0, .LANCHOR97
+	str	x19, [sp, 16]
+	adrp	x19, .LANCHOR21
+	strh	wzr, [x0, #:lo12:.LANCHOR97]
+	adrp	x0, .LANCHOR96
+	ldrh	w2, [x19, #:lo12:.LANCHOR21]
+	ldr	x0, [x0, #:lo12:.LANCHOR96]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	ldrh	w2, [x19, #:lo12:.LANCHOR21]
+	mov	w0, 12
+	mov	w1, 255
+	mul	w2, w2, w0
+	adrp	x0, .LANCHOR98
+	ldr	x0, [x0, #:lo12:.LANCHOR98]
+	bl	ftl_memset
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	b	FtlGcBufInit
+	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
+	.section	.text.FlashGetBadBlockList,"ax",@progbits
+	.align	2
+	.global	FlashGetBadBlockList
+	.type	FlashGetBadBlockList, %function
+FlashGetBadBlockList:
+	stp	x29, x30, [sp, -32]!
+	mov	w2, 256
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR42
 	stp	x19, x20, [sp, 16]
-	mov	w21, w0
-	str	w1, [x29, 76]
-	lsr	w0, w1, 10
-	str	x23, [sp, 48]
-	bl	P2V_block_in_plane
-	ldr	x2, [x22, #:lo12:.LANCHOR42]
-	and	w3, w0, 65535
-	ubfiz	x20, x3, 1, 16
-	ldrh	w1, [x2, x20]
-	cbnz	w1, .L677
-	adrp	x0, .LANCHOR47
-	ldr	x19, [x0, #:lo12:.LANCHOR47]
-	cbz	x19, .L678
-	adrp	x2, .LANCHOR40
-	mov	x5, -6148914691236517206
-	movk	x5, 0xaaab, lsl 0
-	adrp	x23, .LANCHOR48
-	ldr	x2, [x2, #:lo12:.LANCHOR40]
-	mov	w6, 65535
-	ldrh	w4, [x23, #:lo12:.LANCHOR48]
-	sub	x19, x19, x2
-	asr	x19, x19, 1
-	mul	x19, x19, x5
-	mov	w5, 6
-	and	w19, w19, 65535
-.L679:
-	cmp	w1, w4
-	beq	.L678
-	cmp	w19, w3
-	bne	.L680
-	mov	w1, w19
-	add	x0, x0, :lo12:.LANCHOR47
-	bl	List_remove_node
-	ldrh	w0, [x23, #:lo12:.LANCHOR48]
-	cbnz	w0, .L681
-	adrp	x1, .LANCHOR146
-	adrp	x0, .LC1
-	mov	w2, 1688
-	add	x1, x1, :lo12:.LANCHOR146
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L681:
-	ldrh	w0, [x23, #:lo12:.LANCHOR48]
-	sub	w0, w0, #1
-	strh	w0, [x23, #:lo12:.LANCHOR48]
-	mov	w0, w19
-	bl	INSERT_DATA_LIST
-	ldr	x1, [x22, #:lo12:.LANCHOR42]
-	ldrh	w0, [x1, x20]
-	add	w0, w0, 1
-	strh	w0, [x1, x20]
-.L678:
-	add	x1, x29, 76
-	mov	w2, 1
-	mov	w0, w21
-	bl	log2phys
+	mov	x19, x0
+	mov	w20, w1
+	mov	w1, 255
+	bl	ftl_memset
+	adrp	x0, .LANCHOR105
+	mov	w1, w20
+	ldr	x2, [x0, #:lo12:.LANCHOR105]
+	mov	x0, x19
+	blr	x2
+	and	w0, w0, 65535
+	cmp	w0, 50
+	bls	.L530
+	mov	w2, 256
+	mov	w1, 255
+	mov	x0, x19
+	bl	ftl_memset
+	mov	w0, 0
+.L530:
+	adrp	x1, .LANCHOR0+14
+	ldrh	w1, [x1, #:lo12:.LANCHOR0+14]
+	cmp	w1, 4
+	bne	.L534
+	mov	x1, 0
+.L532:
+	cmp	w0, w1, uxth
+	bhi	.L533
+.L534:
 	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldr	x23, [sp, 48]
-	ldp	x29, x30, [sp], 80
+	ldp	x29, x30, [sp], 32
 	ret
-.L680:
-	umull	x19, w19, w5
-	ldrh	w19, [x2, x19]
-	cmp	w19, w6
-	beq	.L678
-	add	w1, w1, 1
-	and	w1, w1, 65535
-	b	.L679
-.L677:
-	add	w1, w1, 1
-	strh	w1, [x2, x20]
-	b	.L678
-	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
-	.section	.text.ftl_scan_all_data,"ax",@progbits
+.L533:
+	ldrh	w2, [x19, x1, lsl 1]
+	lsr	w2, w2, 1
+	strh	w2, [x19, x1, lsl 1]
+	add	x1, x1, 1
+	b	.L532
+	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
+	.section	.text.ftl_memcpy,"ax",@progbits
 	.align	2
-	.global	ftl_scan_all_data
-	.type	ftl_scan_all_data, %function
-ftl_scan_all_data:
-	sub	sp, sp, #96
-	adrp	x0, .LC91
-	mov	w1, 0
-	add	x0, x0, :lo12:.LC91
-	stp	x29, x30, [sp, 16]
-	add	x29, sp, 16
-	stp	x19, x20, [sp, 32]
-	adrp	x20, .LANCHOR106
-	stp	x21, x22, [sp, 48]
-	mov	w19, 0
-	adrp	x21, .LANCHOR61
-	add	x22, x20, :lo12:.LANCHOR106
-	add	x21, x21, :lo12:.LANCHOR61
-	str	x23, [sp, 64]
-	bl	printf
-.L688:
-	ldr	w0, [x21]
-	cmp	w19, w0
-	bcc	.L694
-	ldp	x19, x20, [sp, 32]
-	ldp	x21, x22, [sp, 48]
-	ldp	x29, x30, [sp, 16]
-	ldr	x23, [sp, 64]
-	add	sp, sp, 96
-	ret
-.L694:
-	mov	w2, 0
-	add	x1, x29, 76
-	mov	w0, w19
-	bl	log2phys
-	tst	x19, 2047
-	bne	.L689
-	ldr	w2, [x29, 76]
-	adrp	x0, .LC92
-	mov	w1, w19
-	add	x0, x0, :lo12:.LC92
-	bl	printf
-.L689:
-	ldr	w1, [x29, 76]
-	cmn	w1, #1
-	beq	.L691
-	add	x0, x20, :lo12:.LANCHOR106
-	str	wzr, [x20, #:lo12:.LANCHOR106]
-	mov	w2, 0
-	str	w1, [x0, 4]
-	adrp	x1, .LANCHOR107
-	str	w19, [x0, 24]
-	ldr	x1, [x1, #:lo12:.LANCHOR107]
-	str	x1, [x0, 8]
-	adrp	x1, .LANCHOR108
-	ldr	x23, [x1, #:lo12:.LANCHOR108]
-	mov	w1, 1
-	str	x23, [x0, 16]
-	bl	FlashReadPages
-	ldr	w0, [x20, #:lo12:.LANCHOR106]
-	cmp	w0, 256
-	ccmn	w0, #1, 4, ne
-	beq	.L692
-	ldr	w0, [x23, 8]
-	cmp	w19, w0
-	beq	.L691
-.L692:
-	ldp	x1, x0, [x22, 8]
-	ldr	w2, [x1, 4]
-	str	w2, [sp]
-	ldr	w2, [x22, 4]
-	ldp	w3, w4, [x0]
-	ldp	w5, w6, [x0, 8]
-	adrp	x0, .LC93
-	ldr	w7, [x1]
-	add	x0, x0, :lo12:.LC93
-	mov	w1, w19
-	bl	printf
-.L691:
-	add	w19, w19, 1
-	b	.L688
-	.size	ftl_scan_all_data, .-ftl_scan_all_data
-	.section	.text.FtlReadRefresh,"ax",@progbits
+	.global	ftl_memcpy
+	.type	ftl_memcpy, %function
+ftl_memcpy:
+	uxtw	x2, w2
+	b	memcpy
+	.size	ftl_memcpy, .-ftl_memcpy
+	.section	.text.FlashReadPages,"ax",@progbits
 	.align	2
-	.global	FtlReadRefresh
-	.type	FtlReadRefresh, %function
-FtlReadRefresh:
-	adrp	x1, .LANCHOR81
-	add	x0, x1, :lo12:.LANCHOR81
-	ldr	w2, [x0, 80]
-	cbz	w2, .L697
-	adrp	x1, .LANCHOR61
-	ldr	w3, [x0, 84]
-	ldr	w2, [x1, #:lo12:.LANCHOR61]
-	cmp	w3, w2
-	bcs	.L698
-	stp	x29, x30, [sp, -160]!
+	.global	FlashReadPages
+	.type	FlashReadPages, %function
+FlashReadPages:
+	stp	x29, x30, [sp, -112]!
+	ubfiz	x1, x1, 5, 32
 	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR0
+	add	x2, x21, :lo12:.LANCHOR0
+	str	x27, [sp, 80]
+	stp	x23, x24, [sp, 48]
+	adrp	x24, .LANCHOR147
 	stp	x19, x20, [sp, 16]
+	add	x23, x0, x1
+	ldrh	w27, [x2, 12]
 	mov	x19, x0
-	add	x20, x1, :lo12:.LANCHOR61
-	str	x21, [sp, 32]
-	mov	w21, 2048
-.L703:
-	ldr	w0, [x19, 84]
-	ldr	w1, [x20]
-	cmp	w0, w1
-	bcs	.L700
-	add	x1, x29, 60
-	mov	w2, 0
-	bl	log2phys
-	ldr	w0, [x19, 84]
-	ldr	w1, [x29, 60]
-	add	w0, w0, 1
-	str	w0, [x19, 84]
-	cmn	w1, #1
-	beq	.L701
-	str	w0, [x29, 88]
-	adrp	x0, ftl_temp_buf
-	add	x0, x0, :lo12:ftl_temp_buf
-	str	x0, [x29, 72]
-	add	x0, x29, 96
-	str	x0, [x29, 80]
-	add	x0, x29, 160
-	str	w1, [x29, 68]
-	mov	w2, 0
-	mov	w1, 1
-	str	wzr, [x0, -96]!
-	bl	FlashReadPages
-	ldr	w0, [x29, 64]
-	cmp	w0, 256
-	bne	.L700
-	ldr	w0, [x29, 60]
-	lsr	w0, w0, 10
-	bl	P2V_block_in_plane
-	bl	FtlGcRefreshBlock
-.L700:
+	stp	x25, x26, [sp, 64]
+	add	x24, x24, :lo12:.LANCHOR147
+	adrp	x25, .LC1
+	add	x25, x25, :lo12:.LC1
+.L538:
+	cmp	x23, x19
+	bne	.L548
 	ldp	x19, x20, [sp, 16]
-	mov	w0, -1
-	ldr	x21, [sp, 32]
-	ldp	x29, x30, [sp], 160
-	ret
-.L701:
-	subs	w21, w21, #1
-	bne	.L703
-	b	.L700
-.L698:
-	adrp	x1, .LANCHOR62
-	str	wzr, [x0, 84]
-	ldr	w1, [x1, #:lo12:.LANCHOR62]
-	stp	w1, wzr, [x0, 76]
-.L707:
 	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 112
 	ret
-.L697:
-	ldr	w4, [x0, 76]
-	adrp	x0, .LANCHOR62
-	ldr	w2, [x0, #:lo12:.LANCHOR62]
-	add	w0, w2, 1048576
-	cmp	w4, w0
-	bhi	.L706
-	adrp	x0, .LANCHOR76
-	ldr	w0, [x0, #:lo12:.LANCHOR76]
-	lsr	w3, w0, 10
-	mov	w0, 33554432
-	asr	w0, w0, w3
-	add	w0, w0, w4
-	cmp	w2, w0
-	bhi	.L706
-	adrp	x0, .LANCHOR39+28
-	ldrb	w0, [x0, #:lo12:.LANCHOR39+28]
-	cbnz	w0, .L707
-.L706:
-	add	x0, x1, :lo12:.LANCHOR81
-	mov	w1, 1
-	str	wzr, [x0, 84]
-	stp	w2, w1, [x0, 76]
-	b	.L707
-	.size	FtlReadRefresh, .-FtlReadRefresh
-	.section	.text.FtlMapBlkWriteDump_data,"ax",@progbits
+.L548:
+	ldr	x0, [x19, 8]
+	cbz	x0, .L539
+	ldr	x0, [x19, 16]
+	cbnz	x0, .L540
+.L539:
+	mov	w2, 90
+	mov	x1, x24
+	mov	x0, x25
+	bl	printf
+.L540:
+	ldr	w0, [x19, 4]
+	add	x2, x29, 104
+	add	x1, x29, 108
+	adrp	x26, .LANCHOR120
+	bl	l2p_addr_tran.isra.0
+	ldr	x20, [x19, 8]
+	tst	x20, 63
+	beq	.L541
+	ldr	x20, [x26, #:lo12:.LANCHOR120]
+.L541:
+	adrp	x22, .LANCHOR105
+	add	x22, x22, :lo12:.LANCHOR105
+	ldrb	w0, [x29, 104]
+	mov	x2, x20
+	ldr	w1, [x29, 108]
+	ldr	x3, [x19, 16]
+	ldr	x4, [x22, 24]
+	blr	x4
+	str	w0, [x19]
+	add	x0, x21, :lo12:.LANCHOR0
+	ldrh	w0, [x0, 14]
+	cmp	w0, 4
+	bne	.L543
+	ldrb	w0, [x29, 104]
+	add	x2, x20, 2048
+	ldr	x4, [x22, 24]
+	ldr	w1, [x29, 108]
+	ldr	x3, [x19, 16]
+	add	w1, w27, w1
+	add	x3, x3, 8
+	blr	x4
+	cmn	w0, #1
+	beq	.L544
+	ldr	x1, [x19, 16]
+	ldr	w2, [x1, 12]
+	cmn	w2, #1
+	bne	.L545
+	ldr	w2, [x1, 8]
+	cmn	w2, #1
+	bne	.L545
+	ldr	w1, [x1]
+	cmn	w1, #1
+	beq	.L545
+.L544:
+	mov	w1, -1
+	str	w1, [x19]
+.L545:
+	ldr	w1, [x19]
+	cmn	w1, #1
+	beq	.L543
+	cmp	w0, 256
+	bne	.L543
+	str	w0, [x19]
+.L543:
+	ldr	x0, [x26, #:lo12:.LANCHOR120]
+	cmp	x20, x0
+	bne	.L547
+	ldr	x0, [x19, 8]
+	cmp	x20, x0
+	beq	.L547
+	adrp	x1, .LANCHOR12
+	ldrh	w2, [x1, #:lo12:.LANCHOR12]
+	mov	x1, x20
+	lsl	w2, w2, 9
+	bl	ftl_memcpy
+.L547:
+	add	x19, x19, 32
+	b	.L538
+	.size	FlashReadPages, .-FlashReadPages
+	.section	.text.FtlLoadFactoryBbt,"ax",@progbits
 	.align	2
-	.global	FtlMapBlkWriteDump_data
-	.type	FtlMapBlkWriteDump_data, %function
-FtlMapBlkWriteDump_data:
-	ldr	w1, [x0, 56]
-	cbz	w1, .L713
-	stp	x29, x30, [sp, -48]!
-	adrp	x1, .LANCHOR106
-	adrp	x2, .LANCHOR108
+	.global	FtlLoadFactoryBbt
+	.type	FtlLoadFactoryBbt, %function
+FtlLoadFactoryBbt:
+	stp	x29, x30, [sp, -112]!
+	adrp	x2, .LANCHOR115
+	adrp	x0, .LANCHOR148
+	add	x1, x0, :lo12:.LANCHOR148
 	add	x29, sp, 0
+	ldr	x2, [x2, #:lo12:.LANCHOR115]
+	stp	x21, x22, [sp, 32]
+	mov	x22, x0
+	stp	x25, x26, [sp, 64]
+	adrp	x26, .LANCHOR17
+	stp	x27, x28, [sp, 80]
+	add	x28, x26, :lo12:.LANCHOR17
 	stp	x19, x20, [sp, 16]
-	mov	x19, x0
-	ldrh	w20, [x0, 6]
-	adrp	x0, .LANCHOR123
-	ldr	x2, [x2, #:lo12:.LANCHOR108]
-	ldr	x3, [x0, #:lo12:.LANCHOR123]
-	add	x0, x1, :lo12:.LANCHOR106
-	sub	w20, w20, #1
-	ldr	x4, [x19, 40]
-	and	w20, w20, 65535
-	str	x21, [sp, 32]
-	stp	x3, x2, [x0, 8]
-	ubfiz	x2, x20, 2, 16
-	str	wzr, [x19, 56]
-	mov	x21, x1
-	ldr	w2, [x4, x2]
-	str	w2, [x0, 4]
-	cbz	w2, .L715
-	mov	w2, 1
-	mov	w1, w2
-	bl	FlashReadPages
-.L716:
-	add	x1, x21, :lo12:.LANCHOR106
-	mov	x0, x19
-	ldr	x21, [sp, 32]
-	ldr	x2, [x1, 8]
-	mov	w1, w20
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
-	b	FtlMapWritePage
-.L715:
-	adrp	x0, .LANCHOR23
-	mov	w1, 255
-	ldrh	w2, [x0, #:lo12:.LANCHOR23]
-	mov	x0, x3
-	bl	ftl_memset
-	b	.L716
-.L713:
-	ret
-	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
-	.section	.text.FtlScanSysBlk,"ax",@progbits
+	adrp	x20, .LANCHOR37
+	stp	x23, x24, [sp, 48]
+	add	x20, x20, :lo12:.LANCHOR37
+	str	x2, [x1, 8]
+	adrp	x2, .LANCHOR123
+	adrp	x23, .LANCHOR10
+	add	x20, x20, 12
+	ldr	x25, [x2, #:lo12:.LANCHOR123]
+	add	x23, x23, :lo12:.LANCHOR10
+	mov	w21, 0
+	mov	w27, -1
+	str	x25, [x1, 16]
+.L566:
+	ldrh	w0, [x23]
+	cmp	w21, w0
+	bcc	.L571
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L571:
+	ldrh	w19, [x26, #:lo12:.LANCHOR17]
+	add	x24, x22, :lo12:.LANCHOR148
+	strh	w27, [x20]
+	mov	w3, 61664
+	sub	w19, w19, #1
+	and	w19, w19, 65535
+.L567:
+	ldrh	w0, [x28]
+	sub	w1, w0, #15
+	cmp	w1, w19
+	bgt	.L569
+	madd	w0, w0, w21, w19
+	mov	w2, 1
+	str	w3, [x29, 108]
+	mov	w1, w2
+	lsl	w0, w0, 10
+	str	w0, [x24, 4]
+	mov	x0, x24
+	bl	FlashReadPages
+	ldr	w0, [x24]
+	ldr	w3, [x29, 108]
+	cmn	w0, #1
+	beq	.L568
+	ldrh	w0, [x25]
+	cmp	w0, w3
+	bne	.L568
+	strh	w19, [x20]
+.L569:
+	add	w21, w21, 1
+	add	x20, x20, 2
+	b	.L566
+.L568:
+	sub	w19, w19, #1
+	and	w19, w19, 65535
+	b	.L567
+	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
+	.section	.text.FtlGetLastWrittenPage,"ax",@progbits
+	.align	2
+	.global	FtlGetLastWrittenPage
+	.type	FtlGetLastWrittenPage, %function
+FtlGetLastWrittenPage:
+	stp	x29, x30, [sp, -160]!
+	cmp	w1, 1
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	mov	w23, w1
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	bne	.L577
+	adrp	x1, .LANCHOR20
+	ldrh	w19, [x1, #:lo12:.LANCHOR20]
+.L578:
+	adrp	x1, .LANCHOR121
+	sub	w19, w19, #1
+	sxth	w19, w19
+	lsl	w21, w0, 10
+	ldr	x1, [x1, #:lo12:.LANCHOR121]
+	orr	w0, w19, w21
+	str	x1, [x29, 72]
+	add	x1, x29, 96
+	str	w0, [x29, 68]
+	mov	w2, w23
+	str	x1, [x29, 80]
+	add	x0, x29, 64
+	mov	w1, 1
+	bl	FlashReadPages
+	ldr	w0, [x29, 96]
+	cmn	w0, #1
+	bne	.L579
+	mov	w22, 0
+	mov	w24, 2
+.L580:
+	cmp	w22, w19
+	ble	.L583
+.L579:
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 160
+	ret
+.L577:
+	adrp	x1, .LANCHOR19
+	ldrh	w19, [x1, #:lo12:.LANCHOR19]
+	b	.L578
+.L583:
+	add	w20, w22, w19
+	mov	w2, w23
+	mov	w1, 1
+	sdiv	w20, w20, w24
+	sxth	w0, w20
+	orr	w0, w0, w21
+	str	w0, [x29, 68]
+	add	x0, x29, 64
+	bl	FlashReadPages
+	ldr	w0, [x29, 96]
+	cmn	w0, #1
+	bne	.L581
+	ldr	w0, [x29, 100]
+	cmn	w0, #1
+	bne	.L581
+	ldr	w0, [x29, 64]
+	cmn	w0, #1
+	beq	.L581
+	sub	w19, w20, #1
+	sxth	w19, w19
+	b	.L580
+.L581:
+	add	w20, w20, 1
+	sxth	w22, w20
+	b	.L580
+	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
+	.section	.text.FtlScanSysBlk,"ax",@progbits
 	.align	2
 	.global	FtlScanSysBlk
 	.type	FtlScanSysBlk, %function
@@ -5222,13 +4471,13 @@ FtlScanSysBlk:
 	adrp	x22, .LANCHOR132
 	ldr	w2, [x21, #:lo12:.LANCHOR30]
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR147
+	adrp	x20, .LANCHOR141
 	stp	x23, x24, [sp, 48]
 	adrp	x23, .LANCHOR35
 	stp	x27, x28, [sp, 80]
 	adrp	x27, .LANCHOR129
 	lsl	w2, w2, 2
-	strh	wzr, [x20, #:lo12:.LANCHOR147]
+	strh	wzr, [x20, #:lo12:.LANCHOR141]
 	strh	wzr, [x23, #:lo12:.LANCHOR35]
 	bl	ftl_memset
 	ldr	x0, [x27, #:lo12:.LANCHOR129]
@@ -5264,19 +4513,19 @@ FtlScanSysBlk:
 	adrp	x0, .LANCHOR70
 	add	x0, x0, :lo12:.LANCHOR70
 	str	x0, [x29, 112]
-.L721:
+.L589:
 	ldr	x0, [x29, 120]
 	ldr	w1, [x29, 172]
 	ldrh	w0, [x0]
 	cmp	w0, w1
-	bls	.L761
+	bls	.L629
 	adrp	x0, .LANCHOR3
-	adrp	x25, .LANCHOR120
+	adrp	x25, .LANCHOR112
 	adrp	x6, .LANCHOR13
 	mov	x5, 0
 	ldrh	w12, [x0, #:lo12:.LANCHOR3]
 	adrp	x0, .LANCHOR91
-	ldr	x7, [x25, #:lo12:.LANCHOR120]
+	ldr	x7, [x25, #:lo12:.LANCHOR112]
 	mov	w22, 0
 	ldr	x11, [x0, #:lo12:.LANCHOR91]
 	adrp	x0, .LANCHOR92
@@ -5284,14 +4533,14 @@ FtlScanSysBlk:
 	ldr	x10, [x0, #:lo12:.LANCHOR92]
 	adrp	x0, .LANCHOR24
 	ldrh	w8, [x0, #:lo12:.LANCHOR24]
-	b	.L762
-.L723:
+	b	.L630
+.L591:
 	ldrh	w1, [x29, 172]
 	ldrb	w0, [x6, x5]
 	bl	V2P_block
 	and	w4, w0, 65535
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L722
+	cbnz	w0, .L590
 	ubfiz	x0, x22, 5, 16
 	mul	w1, w22, w8
 	add	x0, x7, x0
@@ -5302,19 +4551,19 @@ FtlScanSysBlk:
 	add	x1, x10, x1, sxtw 2
 	str	w4, [x0, 4]
 	stp	x11, x1, [x0, 8]
-.L722:
+.L590:
 	add	x5, x5, 1
-.L762:
+.L630:
 	cmp	w12, w5, uxth
-	bhi	.L723
-	cbnz	w22, .L724
-.L760:
+	bhi	.L591
+	cbnz	w22, .L592
+.L628:
 	ldr	w0, [x29, 172]
 	add	w26, w0, 1
 	and	w0, w26, 65535
 	str	w0, [x29, 172]
-	b	.L721
-.L724:
+	b	.L589
+.L592:
 	mov	w1, w22
 	mov	w2, 1
 	mov	x0, x7
@@ -5322,23 +4571,23 @@ FtlScanSysBlk:
 	ubfiz	x0, x22, 5, 16
 	mov	x22, 0
 	str	x0, [x29, 128]
-	adrp	x0, .LANCHOR148
-	add	x0, x0, :lo12:.LANCHOR148
+	adrp	x0, .LANCHOR149
+	add	x0, x0, :lo12:.LANCHOR149
 	str	x0, [x29, 136]
-.L759:
-	ldr	x0, [x25, #:lo12:.LANCHOR120]
+.L627:
+	ldr	x0, [x25, #:lo12:.LANCHOR112]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
 	ldr	w3, [x1, 4]
 	cmn	w0, #1
 	ldr	x27, [x1, 16]
 	ubfx	x26, x3, 10, 16
-	bne	.L727
+	bne	.L595
 	mov	w5, 16
 	mov	w7, 65535
-.L729:
-	ldr	x0, [x25, #:lo12:.LANCHOR120]
-	add	x6, x25, :lo12:.LANCHOR120
+.L597:
+	ldr	x0, [x25, #:lo12:.LANCHOR112]
+	add	x6, x25, :lo12:.LANCHOR112
 	mov	w2, 1
 	str	w7, [x29, 100]
 	add	x0, x0, x22
@@ -5354,79 +4603,81 @@ FtlScanSysBlk:
 	ldr	w5, [x29, 168]
 	cmp	w0, w7
 	ldr	x6, [x29, 104]
-	bne	.L726
+	bne	.L594
 	ldr	x0, [x6]
 	mov	w1, -1
 	str	w1, [x0, x22]
 	ldr	x0, [x6]
 	ldr	w0, [x0, x22]
 	cmp	w0, w1
-	bne	.L727
-.L728:
-	mov	w1, 0
-	mov	w0, w26
-	bl	FtlFreeSysBlkQueueIn
-	b	.L732
-.L726:
-	ldr	x0, [x25, #:lo12:.LANCHOR120]
+	bne	.L595
+.L596:
+	mov	w1, 1
+	b	.L666
+.L594:
+	ldr	x0, [x25, #:lo12:.LANCHOR112]
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	bne	.L727
+	bne	.L595
 	sub	w5, w5, #1
 	ands	w5, w5, 65535
-	bne	.L729
-	b	.L728
-.L727:
+	bne	.L597
+	b	.L596
+.L595:
 	adrp	x0, .LANCHOR70
 	ldr	w1, [x0, #:lo12:.LANCHOR70]
 	ldr	w0, [x27, 4]
 	cmn	w1, #1
-	beq	.L730
+	beq	.L598
 	cmp	w1, w0
-	bhi	.L731
-.L730:
+	bhi	.L599
+.L598:
 	cmn	w0, #1
-	beq	.L731
+	beq	.L599
 	ldr	x2, [x29, 112]
 	add	w1, w0, 1
 	str	w1, [x2]
-.L731:
+.L599:
 	ldrh	w1, [x27]
 	mov	w2, 61604
 	cmp	w1, w2
-	beq	.L733
-	bhi	.L734
+	beq	.L601
+	bhi	.L602
 	mov	w0, 61574
 	cmp	w1, w0
-	beq	.L735
-.L732:
+	beq	.L603
+.L600:
 	ldr	x0, [x29, 128]
 	add	x22, x22, 32
 	cmp	x0, x22
-	bne	.L759
-	b	.L760
-.L734:
+	bne	.L627
+	b	.L628
+.L602:
 	mov	w0, 61634
 	cmp	w1, w0
-	beq	.L736
+	beq	.L604
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L728
-	b	.L732
-.L736:
-	ldrh	w1, [x20, #:lo12:.LANCHOR147]
+	bne	.L600
+	mov	w1, 0
+.L666:
+	mov	w0, w26
+	bl	FtlFreeSysBlkQueueIn
+	b	.L600
+.L604:
+	ldrh	w1, [x20, #:lo12:.LANCHOR141]
 	ldr	w0, [x21, #:lo12:.LANCHOR30]
 	cmp	w1, w0
-	bls	.L738
+	bls	.L606
 	ldr	x1, [x29, 136]
 	adrp	x0, .LC1
-	mov	w2, 1211
+	mov	w2, 1222
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L738:
+.L606:
 	ldr	w6, [x21, #:lo12:.LANCHOR30]
 	ldr	x3, [x29, 152]
-	ldrh	w1, [x20, #:lo12:.LANCHOR147]
+	ldrh	w1, [x20, #:lo12:.LANCHOR141]
 	and	w2, w6, 65535
 	sub	w0, w2, #1
 	sub	w2, w2, w1
@@ -5434,53 +4685,53 @@ FtlScanSysBlk:
 	sub	w2, w2, #1
 	ldr	x5, [x3, #:lo12:.LANCHOR135]
 	sxth	w2, w2
-.L739:
+.L607:
 	cmp	w0, w2
-	bgt	.L745
-	tbz	w0, #31, .L779
-	b	.L732
-.L745:
+	bgt	.L613
+	tbz	w0, #31, .L647
+	b	.L600
+.L613:
 	sxtw	x8, w0
 	ldr	w11, [x27, 4]
 	lsl	x7, x8, 2
 	add	x10, x5, x7
 	ldr	w7, [x5, x7]
 	cmp	w11, w7
-	bls	.L740
+	bls	.L608
 	ldr	w2, [x5]
-	cbnz	w2, .L741
+	cbnz	w2, .L609
 	cmp	w6, w1
-	beq	.L741
+	beq	.L609
 	add	w1, w1, 1
-	strh	w1, [x20, #:lo12:.LANCHOR147]
-.L741:
+	strh	w1, [x20, #:lo12:.LANCHOR141]
+.L609:
 	ldr	x1, [x29, 160]
 	ldr	x6, [x1, #:lo12:.LANCHOR129]
 	mov	w1, 0
-.L742:
+.L610:
 	cmp	w1, w0
-	bne	.L743
+	bne	.L611
 	ldr	w1, [x27, 4]
 	str	w1, [x10]
 	strh	w26, [x6, x8, lsl 1]
-	tbnz	w0, #31, .L732
-	ldrh	w1, [x20, #:lo12:.LANCHOR147]
+	tbnz	w0, #31, .L600
+	ldrh	w1, [x20, #:lo12:.LANCHOR141]
 	ldr	w2, [x21, #:lo12:.LANCHOR30]
 	sub	w2, w2, w1
 	sub	w2, w2, #1
 	cmp	w0, w2, sxth
-	bgt	.L732
-.L779:
+	bgt	.L600
+.L647:
 	add	w1, w1, 1
-	strh	w1, [x20, #:lo12:.LANCHOR147]
+	strh	w1, [x20, #:lo12:.LANCHOR141]
 	ldr	w1, [x27, 4]
 	str	w1, [x5, x0, lsl 2]
 	ldr	x1, [x29, 160]
 	ldr	x1, [x1, #:lo12:.LANCHOR129]
-.L797:
+.L665:
 	strh	w26, [x1, x0, lsl 1]
-	b	.L732
-.L743:
+	b	.L600
+.L611:
 	sxtw	x2, w1
 	add	w1, w1, 1
 	lsl	x7, x2, 2
@@ -5492,22 +4743,22 @@ FtlScanSysBlk:
 	add	x7, x6, x2
 	ldrh	w7, [x7, 2]
 	strh	w7, [x6, x2]
-	b	.L742
-.L740:
+	b	.L610
+.L608:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L739
-.L735:
+	b	.L607
+.L603:
 	ldrh	w1, [x23, #:lo12:.LANCHOR35]
 	ldrh	w0, [x19, #:lo12:.LANCHOR27]
 	cmp	w1, w0
-	bls	.L748
+	bls	.L616
 	ldr	x1, [x29, 136]
 	adrp	x0, .LC1
-	mov	w2, 1252
+	mov	w2, 1263
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L748:
+.L616:
 	ldrh	w6, [x19, #:lo12:.LANCHOR27]
 	ldrh	w2, [x23, #:lo12:.LANCHOR35]
 	sub	w1, w6, #1
@@ -5515,46 +4766,46 @@ FtlScanSysBlk:
 	sub	w5, w1, w2
 	ldr	x1, [x29, 144]
 	ldr	x1, [x1, #:lo12:.LANCHOR132]
-.L749:
+.L617:
 	cmp	w0, w5
-	ble	.L754
+	ble	.L622
 	sxtw	x7, w0
 	ldr	w11, [x27, 4]
 	lsl	x8, x7, 2
 	add	x10, x1, x8
 	ldr	w8, [x1, x8]
 	cmp	w11, w8
-	bls	.L750
+	bls	.L618
 	ldr	w5, [x1]
-	cbnz	w5, .L751
+	cbnz	w5, .L619
 	cmp	w6, w2
-	beq	.L751
+	beq	.L619
 	add	w2, w2, 1
 	strh	w2, [x23, #:lo12:.LANCHOR35]
-.L751:
+.L619:
 	ldr	x6, [x28, #:lo12:.LANCHOR36]
 	mov	w2, 0
-.L752:
+.L620:
 	cmp	w2, w0
-	bne	.L753
+	bne	.L621
 	ldr	w2, [x27, 4]
 	str	w2, [x10]
 	strh	w26, [x6, x7, lsl 1]
-.L754:
-	tbnz	w0, #31, .L732
+.L622:
+	tbnz	w0, #31, .L600
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	ldrh	w5, [x23, #:lo12:.LANCHOR35]
 	sub	w2, w2, #1
 	sub	w2, w2, w5
 	cmp	w0, w2, sxth
-	bgt	.L732
+	bgt	.L600
 	add	w5, w5, 1
 	ldr	w2, [x27, 4]
 	strh	w5, [x23, #:lo12:.LANCHOR35]
 	str	w2, [x1, x0, lsl 2]
 	ldr	x1, [x28, #:lo12:.LANCHOR36]
-	b	.L797
-.L753:
+	b	.L665
+.L621:
 	sxtw	x5, w2
 	add	w2, w2, 1
 	lsl	x8, x5, 2
@@ -5566,61 +4817,61 @@ FtlScanSysBlk:
 	add	x8, x6, x5
 	ldrh	w8, [x8, 2]
 	strh	w8, [x6, x5]
-	b	.L752
-.L750:
+	b	.L620
+.L618:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L749
-.L733:
+	b	.L617
+.L601:
 	ldrh	w5, [x24, #:lo12:.LANCHOR79]
 	mov	w1, 65535
 	add	x2, x24, :lo12:.LANCHOR79
 	cmp	w5, w1
-	bne	.L756
+	bne	.L624
 	strh	w26, [x24, #:lo12:.LANCHOR79]
 	str	w0, [x2, 8]
-	b	.L732
-.L756:
+	b	.L600
+.L624:
 	ldrh	w0, [x2, 4]
 	cmp	w0, w1
-	beq	.L757
+	beq	.L625
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.L757:
+.L625:
 	add	x0, x24, :lo12:.LANCHOR79
 	ldr	w1, [x27, 4]
 	ldr	w2, [x0, 8]
 	cmp	w2, w1
-	bcs	.L758
+	bcs	.L626
 	ldrh	w2, [x24, #:lo12:.LANCHOR79]
 	strh	w2, [x0, 4]
 	strh	w26, [x24, #:lo12:.LANCHOR79]
 	str	w1, [x0, 8]
-	b	.L732
-.L758:
+	b	.L600
+.L626:
 	strh	w26, [x0, 4]
-	b	.L732
-.L761:
+	b	.L600
+.L629:
 	ldr	x0, [x29, 160]
 	ldr	x2, [x0, #:lo12:.LANCHOR129]
 	ldrh	w0, [x2]
-	cbz	w0, .L763
-.L766:
+	cbz	w0, .L631
+.L634:
 	ldr	x1, [x28, #:lo12:.LANCHOR36]
 	ldrh	w0, [x1]
-	cbz	w0, .L764
-.L765:
-	ldrh	w1, [x20, #:lo12:.LANCHOR147]
+	cbz	w0, .L632
+.L633:
+	ldrh	w1, [x20, #:lo12:.LANCHOR141]
 	ldr	w0, [x21, #:lo12:.LANCHOR30]
 	cmp	w1, w0
-	bls	.L795
-	adrp	x1, .LANCHOR148
+	bls	.L663
+	adrp	x1, .LANCHOR149
 	adrp	x0, .LC1
-	mov	w2, 1377
-	add	x1, x1, :lo12:.LANCHOR148
+	mov	w2, 1388
+	add	x1, x1, :lo12:.LANCHOR149
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L795:
+.L663:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -5629,24 +4880,24 @@ FtlScanSysBlk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L763:
-	ldrh	w0, [x20, #:lo12:.LANCHOR147]
-	cbz	w0, .L766
+.L631:
+	ldrh	w0, [x20, #:lo12:.LANCHOR141]
+	cbz	w0, .L634
 	ldr	w1, [x21, #:lo12:.LANCHOR30]
 	mov	w0, 0
-.L767:
+.L635:
 	cmp	w0, w1
-	bcs	.L766
+	bcs	.L634
 	ldrh	w3, [x2, w0, sxtw 1]
-	cbz	w3, .L768
+	cbz	w3, .L636
 	ldr	x1, [x29, 152]
 	add	x7, x21, :lo12:.LANCHOR30
 	ldr	x4, [x1, #:lo12:.LANCHOR135]
 	mov	w1, w0
-.L769:
+.L637:
 	ldr	w3, [x7]
 	cmp	w1, w3
-	bcs	.L766
+	bcs	.L634
 	sxtw	x6, w1
 	sub	w3, w1, w0
 	lsl	x5, x6, 1
@@ -5658,29 +4909,29 @@ FtlScanSysBlk:
 	strh	w8, [x2, x3, lsl 1]
 	str	w6, [x4, x3, lsl 2]
 	strh	wzr, [x2, x5]
-	b	.L769
-.L768:
+	b	.L637
+.L636:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L767
-.L764:
+	b	.L635
+.L632:
 	ldrh	w0, [x23, #:lo12:.LANCHOR35]
-	cbz	w0, .L765
+	cbz	w0, .L633
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	mov	w0, 0
-.L774:
+.L642:
 	mov	w6, w0
 	cmp	w0, w2
-	bge	.L765
+	bge	.L633
 	ldrh	w3, [x1, w0, sxtw 1]
-	cbz	w3, .L775
+	cbz	w3, .L643
 	ldr	x2, [x29, 144]
 	add	x19, x19, :lo12:.LANCHOR27
 	ldr	x3, [x2, #:lo12:.LANCHOR132]
-.L776:
+.L644:
 	ldrh	w2, [x19]
 	cmp	w0, w2
-	bge	.L765
+	bge	.L633
 	sxtw	x5, w0
 	sub	w2, w0, w6
 	lsl	x4, x5, 1
@@ -5692,1462 +4943,1168 @@ FtlScanSysBlk:
 	strh	w7, [x1, x2, lsl 1]
 	str	w5, [x3, x2, lsl 2]
 	strh	wzr, [x1, x4]
-	b	.L776
-.L775:
+	b	.L644
+.L643:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L774
+	b	.L642
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
-	.section	.text.FtlMapTblRecovery,"ax",@progbits
+	.section	.text.FtlLoadBbt,"ax",@progbits
 	.align	2
-	.global	FtlMapTblRecovery
-	.type	FtlMapTblRecovery, %function
-FtlMapTblRecovery:
-	stp	x29, x30, [sp, -144]!
-	mov	w1, 0
+	.global	FtlLoadBbt
+	.type	FtlLoadBbt, %function
+FtlLoadBbt:
+	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	x19, x0
 	stp	x23, x24, [sp, 48]
-	adrp	x20, .LANCHOR106
-	ldrh	w23, [x0, 6]
-	adrp	x24, .LANCHOR20
+	adrp	x23, .LANCHOR115
+	stp	x19, x20, [sp, 16]
+	adrp	x24, .LANCHOR17
 	stp	x21, x22, [sp, 32]
-	ldr	x21, [x0, 40]
-	ldr	x22, [x0, 16]
-	lsl	w2, w23, 2
-	ldr	x0, [x0, 24]
-	str	x0, [x29, 128]
-	ldrh	w0, [x19, 8]
-	stp	x25, x26, [sp, 64]
-	stp	x27, x28, [sp, 80]
-	mov	w27, 0
-	str	w0, [x29, 140]
-	mov	x0, x21
-	bl	ftl_memset
-	str	x20, [x29, 120]
-	adrp	x7, .LANCHOR107
-	add	x3, x20, :lo12:.LANCHOR106
-	mov	x26, x7
-	mov	x20, x3
-	ldr	x0, [x7, #:lo12:.LANCHOR107]
-	str	x0, [x3, 8]
-	adrp	x0, .LANCHOR108
-	stp	wzr, wzr, [x19, 48]
-	ldr	x25, [x0, #:lo12:.LANCHOR108]
-	mov	w0, -1
-	str	x25, [x3, 16]
-	strh	w0, [x19]
-	strh	w0, [x19, 2]
-	mov	w0, 1
-	str	w0, [x19, 56]
-	ldr	w0, [x29, 140]
-	sub	w0, w0, #1
-	str	w0, [x29, 136]
-	add	x0, x24, :lo12:.LANCHOR20
-	str	x0, [x29, 112]
-.L799:
-	ldr	w0, [x29, 140]
-	cmp	w27, w0
-	bge	.L816
-	ldr	w0, [x29, 136]
-	sxtw	x28, w27
-	cmp	w27, w0
-	bne	.L800
-	lsl	x0, x28, 1
-	mov	w1, 1
-	add	x24, x22, x0
-	ldrh	w0, [x22, x0]
-	mov	w22, 0
-	bl	FtlGetLastWrittenPage
-	sxth	w26, w0
-	add	w0, w0, 1
-	strh	w0, [x19, 2]
-	ldr	x0, [x29, 128]
-	strh	w27, [x19]
-	ldr	w0, [x0, x28, lsl 2]
-	str	w0, [x19, 48]
-	ldr	x0, [x29, 120]
-	add	x20, x0, :lo12:.LANCHOR106
-.L801:
-	cmp	w22, w26
-	ble	.L803
-.L816:
-	mov	x0, x19
-	bl	ftl_free_no_use_map_blk
-	adrp	x0, .LANCHOR20
-	ldrh	w1, [x19, 2]
-	ldrh	w0, [x0, #:lo12:.LANCHOR20]
-	cmp	w1, w0
-	bne	.L805
-	mov	x0, x19
-	bl	ftl_map_blk_alloc_new_blk
-.L805:
-	mov	x0, x19
-	bl	ftl_map_blk_gc
-	mov	x0, x19
-	bl	ftl_map_blk_gc
-	mov	w0, 0
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 144
-	ret
-.L803:
+	adrp	x22, .LANCHOR148
+	add	x20, x22, :lo12:.LANCHOR148
+	ldr	x0, [x23, #:lo12:.LANCHOR115]
+	str	x25, [sp, 64]
+	mov	w25, 61649
+	str	x0, [x20, 8]
+	adrp	x0, .LANCHOR123
+	ldr	x21, [x0, #:lo12:.LANCHOR123]
+	str	x21, [x20, 16]
+	bl	FtlBbtMemInit
+	ldrh	w19, [x24, #:lo12:.LANCHOR17]
+	add	x24, x24, :lo12:.LANCHOR17
+	sub	w19, w19, #1
+	and	w19, w19, 65535
+.L668:
 	ldrh	w0, [x24]
+	sub	w0, w0, #15
+	cmp	w0, w19
+	bgt	.L671
+	lsl	w0, w19, 10
 	mov	w2, 1
-	mov	w1, w2
-	orr	w0, w22, w0, lsl 10
 	str	w0, [x20, 4]
+	mov	w1, w2
 	mov	x0, x20
 	bl	FlashReadPages
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L802
-	ldrh	w0, [x25, 8]
-	cmp	w23, w0
-	bls	.L802
-	ldrh	w2, [x25]
-	ldrh	w1, [x19, 4]
-	cmp	w2, w1
-	bne	.L802
-	ubfiz	x0, x0, 2, 16
-	ldr	w1, [x20, 4]
-	str	w1, [x21, x0]
-.L802:
-	add	w22, w22, 1
-	sxth	w22, w22
-	b	.L801
-.L800:
-	ldr	x0, [x26, #:lo12:.LANCHOR107]
+	bne	.L669
+	ldr	w0, [x20, 4]
 	mov	w2, 1
-	str	x0, [x20, 8]
-	lsl	x0, x28, 1
-	ldrh	w1, [x24, #:lo12:.LANCHOR20]
-	add	x28, x22, x0
-	ldrh	w0, [x22, x0]
-	sub	w1, w1, #1
-	orr	w0, w1, w0, lsl 10
 	mov	w1, w2
+	add	w0, w0, 1
 	str	w0, [x20, 4]
 	mov	x0, x20
 	bl	FlashReadPages
+.L669:
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L818
-	ldrh	w1, [x25]
-	ldrh	w0, [x19, 4]
+	beq	.L670
+	ldrh	w0, [x21]
+	cmp	w0, w25
+	bne	.L670
+	adrp	x1, .LANCHOR37
+	add	x0, x1, :lo12:.LANCHOR37
+	strh	w19, [x1, #:lo12:.LANCHOR37]
+	ldr	w1, [x21, 4]
+	str	w1, [x0, 8]
+	ldrh	w1, [x21, 8]
+	strh	w1, [x0, 4]
+.L671:
+	adrp	x19, .LANCHOR37
+	mov	w0, 65535
+	add	x20, x19, :lo12:.LANCHOR37
+	ldrh	w1, [x19, #:lo12:.LANCHOR37]
 	cmp	w1, w0
-	bne	.L818
-	ldrh	w1, [x25, 8]
-	mov	w0, 64245
+	beq	.L685
+	ldrh	w1, [x20, 4]
 	cmp	w1, w0
-	beq	.L807
-.L818:
-	mov	w5, 0
-.L808:
-	ldr	x0, [x29, 112]
-	ldrh	w0, [x0]
-	cmp	w5, w0
-	bge	.L814
-	ldrh	w0, [x28]
+	beq	.L675
+	add	x0, x22, :lo12:.LANCHOR148
+	lsl	w1, w1, 10
 	mov	w2, 1
-	str	w5, [x29, 108]
+	str	w1, [x0, 4]
 	mov	w1, w2
-	orr	w0, w5, w0, lsl 10
-	str	w0, [x20, 4]
-	mov	x0, x20
 	bl	FlashReadPages
-	ldr	w0, [x20]
-	ldr	w5, [x29, 108]
+	ldr	w0, [x22, #:lo12:.LANCHOR148]
 	cmn	w0, #1
-	beq	.L812
-	ldrh	w0, [x25, 8]
-	cmp	w23, w0
-	bls	.L812
-	ldrh	w2, [x25]
-	ldrh	w1, [x19, 4]
-	cmp	w2, w1
-	bne	.L812
-	ubfiz	x0, x0, 2, 16
-	ldr	w1, [x20, 4]
-	str	w1, [x21, x0]
-.L812:
-	add	w5, w5, 1
-	sxth	w5, w5
-	b	.L808
-.L807:
-	ldrh	w5, [x24, #:lo12:.LANCHOR20]
-	mov	w0, 0
-	ldr	x10, [x26, #:lo12:.LANCHOR107]
-	sub	w5, w5, #1
-.L809:
-	cmp	w0, w5
-	blt	.L811
-.L814:
-	add	w4, w27, 1
-	sxth	w27, w4
-	b	.L799
-.L811:
-	lsl	w2, w0, 1
-	sxtw	x2, w2
-	lsl	x1, x2, 2
-	ldrh	w1, [x10, x1]
-	cmp	w23, w1
-	bls	.L810
-	add	x2, x2, 1
-	ubfiz	x1, x1, 2, 16
-	ldr	w2, [x10, x2, lsl 2]
-	str	w2, [x21, x1]
-.L810:
+	beq	.L675
+	ldrh	w1, [x21]
+	mov	w0, 61649
+	cmp	w1, w0
+	bne	.L675
+	ldr	w1, [x20, 8]
+	ldr	w0, [x21, 4]
+	cmp	w0, w1
+	bls	.L675
+	ldrh	w1, [x20, 4]
+	str	w0, [x20, 8]
+	ldrh	w0, [x21, 8]
+	strh	w1, [x19, #:lo12:.LANCHOR37]
+	strh	w0, [x20, 4]
+.L675:
+	ldrh	w0, [x19, #:lo12:.LANCHOR37]
+	add	x24, x19, :lo12:.LANCHOR37
+	mov	w1, 1
+	mov	w25, 61649
+	bl	FtlGetLastWrittenPage
+	sxth	w20, w0
 	add	w0, w0, 1
-	sxth	w0, w0
-	b	.L809
-	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
-	.section	.text.FtlLoadVonderInfo,"ax",@progbits
-	.align	2
-	.global	FtlLoadVonderInfo
-	.type	FtlLoadVonderInfo, %function
-FtlLoadVonderInfo:
-	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR27
-	adrp	x0, .LANCHOR149
-	add	x0, x0, :lo12:.LANCHOR149
-	add	x29, sp, 0
-	ldrh	w1, [x1, #:lo12:.LANCHOR27]
-	strh	w1, [x0, 10]
-	mov	w1, -3962
-	strh	w1, [x0, 4]
-	adrp	x1, .LANCHOR35
-	ldrh	w1, [x1, #:lo12:.LANCHOR35]
-	strh	w1, [x0, 8]
-	adrp	x1, .LANCHOR28
-	ldrh	w1, [x1, #:lo12:.LANCHOR28]
+	strh	w0, [x24, 2]
+	add	x24, x22, :lo12:.LANCHOR148
+.L677:
+	tbz	w20, #31, .L680
+	adrp	x1, .LANCHOR150
+	adrp	x0, .LC1
+	mov	w2, 253
+	add	x1, x1, :lo12:.LANCHOR150
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L679:
+	add	x0, x19, :lo12:.LANCHOR37
+	ldrh	w1, [x21, 10]
 	strh	w1, [x0, 6]
-	adrp	x1, .LANCHOR36
-	ldr	x1, [x1, #:lo12:.LANCHOR36]
-	str	x1, [x0, 16]
-	adrp	x1, .LANCHOR132
-	ldr	x1, [x1, #:lo12:.LANCHOR132]
-	str	x1, [x0, 24]
-	adrp	x1, .LANCHOR131
-	ldr	x1, [x1, #:lo12:.LANCHOR131]
-	str	x1, [x0, 32]
-	adrp	x1, .LANCHOR133
-	ldr	x1, [x1, #:lo12:.LANCHOR133]
-	str	x1, [x0, 40]
-	bl	FtlMapTblRecovery
+	mov	w1, 65535
+	ldrh	w0, [x21, 12]
+	cmp	w0, w1
+	beq	.L682
+	adrp	x1, .LANCHOR2
+	ldr	w2, [x1, #:lo12:.LANCHOR2]
+	cmp	w0, w2
+	beq	.L682
+	adrp	x1, .LANCHOR6
+	ldrh	w1, [x1, #:lo12:.LANCHOR6]
+	lsr	w1, w1, 2
+	cmp	w2, w1
+	bcs	.L682
+	cmp	w0, w1
+	bcs	.L682
+	bl	FtlSysBlkNumInit
+.L682:
+	add	x19, x19, :lo12:.LANCHOR37
+	adrp	x21, .LANCHOR10
+	adrp	x23, .LANCHOR137
+	add	x19, x19, 32
+	add	x21, x21, :lo12:.LANCHOR10
+	add	x23, x23, :lo12:.LANCHOR137
+	add	x22, x22, :lo12:.LANCHOR148
+	mov	w20, 0
+.L683:
+	ldrh	w0, [x21]
+	cmp	w20, w0
+	bcc	.L684
 	mov	w0, 0
-	ldp	x29, x30, [sp], 16
+.L667:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 80
 	ret
-	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
-	.section	.text.FtlL2PDataInit,"ax",@progbits
+.L670:
+	sub	w19, w19, #1
+	and	w19, w19, 65535
+	b	.L668
+.L680:
+	ldrh	w0, [x19, #:lo12:.LANCHOR37]
+	mov	w2, 1
+	mov	w1, w2
+	orr	w0, w20, w0, lsl 10
+	str	w0, [x24, 4]
+	ldr	x0, [x23, #:lo12:.LANCHOR115]
+	str	x0, [x24, 8]
+	mov	x0, x24
+	bl	FlashReadPages
+	ldr	w0, [x24]
+	cmn	w0, #1
+	beq	.L678
+	ldrh	w0, [x21]
+	cmp	w0, w25
+	beq	.L679
+.L678:
+	sub	w20, w20, #1
+	sxth	w20, w20
+	b	.L677
+.L684:
+	ldrh	w2, [x23]
+	ldr	x0, [x22, 8]
+	mul	w1, w2, w20
+	lsl	w2, w2, 2
+	add	w20, w20, 1
+	add	x1, x0, x1, lsl 2
+	ldr	x0, [x19], 8
+	bl	ftl_memcpy
+	b	.L683
+.L685:
+	mov	w0, -1
+	b	.L667
+	.size	FtlLoadBbt, .-FtlLoadBbt
+	.section	.text.FtlLoadSysInfo,"ax",@progbits
 	.align	2
-	.global	FtlL2PDataInit
-	.type	FtlL2PDataInit, %function
-FtlL2PDataInit:
-	stp	x29, x30, [sp, -64]!
+	.global	FtlLoadSysInfo
+	.type	FtlLoadSysInfo, %function
+FtlLoadSysInfo:
+	stp	x29, x30, [sp, -96]!
 	mov	w1, 0
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR130
-	adrp	x20, .LANCHOR30
+	adrp	x19, .LANCHOR148
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR115
 	stp	x21, x22, [sp, 32]
-	ldr	x0, [x19, #:lo12:.LANCHOR130]
-	adrp	x22, .LANCHOR23
-	ldr	w2, [x20, #:lo12:.LANCHOR30]
-	adrp	x21, .LANCHOR33
-	str	x23, [sp, 48]
-	adrp	x23, .LANCHOR136
-	lsl	w2, w2, 1
-	bl	ftl_memset
-	ldrh	w0, [x21, #:lo12:.LANCHOR33]
-	mov	w1, 255
-	ldrh	w2, [x22, #:lo12:.LANCHOR23]
-	mul	w2, w2, w0
-	ldr	x0, [x23, #:lo12:.LANCHOR136]
-	bl	ftl_memset
-	adrp	x0, .LANCHOR55
-	ldrh	w3, [x21, #:lo12:.LANCHOR33]
-	ldr	x6, [x23, #:lo12:.LANCHOR136]
-	mov	x1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR55]
-	mov	w2, -1
-	ldrh	w5, [x22, #:lo12:.LANCHOR23]
-	add	x3, x0, x3, lsl 4
-.L829:
-	add	x4, x1, x5
-	cmp	x0, x3
-	bne	.L830
-	adrp	x1, .LANCHOR144
-	add	x0, x1, :lo12:.LANCHOR144
-	ldp	x21, x22, [sp, 32]
-	strh	w2, [x1, #:lo12:.LANCHOR144]
-	ldr	w1, [x20, #:lo12:.LANCHOR30]
-	strh	w1, [x0, 10]
-	mov	w1, -3902
-	strh	w1, [x0, 4]
-	adrp	x1, .LANCHOR147
-	ldr	x23, [sp, 48]
-	strh	w2, [x0, 2]
-	ldrh	w1, [x1, #:lo12:.LANCHOR147]
-	strh	w1, [x0, 8]
-	adrp	x1, .LANCHOR32
-	ldrh	w1, [x1, #:lo12:.LANCHOR32]
-	strh	w1, [x0, 6]
-	adrp	x1, .LANCHOR129
-	ldr	x1, [x1, #:lo12:.LANCHOR129]
-	str	x1, [x0, 16]
-	adrp	x1, .LANCHOR135
-	ldr	x1, [x1, #:lo12:.LANCHOR135]
-	str	x1, [x0, 24]
-	ldr	x1, [x19, #:lo12:.LANCHOR130]
-	ldp	x19, x20, [sp, 16]
-	str	x1, [x0, 32]
-	adrp	x1, .LANCHOR134
-	ldr	x1, [x1, #:lo12:.LANCHOR134]
-	str	x1, [x0, 40]
-	ldp	x29, x30, [sp], 64
-	ret
-.L830:
-	and	x1, x1, -4
-	strh	w2, [x0]
-	add	x1, x6, x1
-	str	wzr, [x0, 4]
-	str	x1, [x0, 8]
-	add	x0, x0, 16
-	mov	x1, x4
-	b	.L829
-	.size	FtlL2PDataInit, .-FtlL2PDataInit
-	.section	.text.FtlLoadMapInfo,"ax",@progbits
-	.align	2
-	.global	FtlLoadMapInfo
-	.type	FtlLoadMapInfo, %function
-FtlLoadMapInfo:
-	stp	x29, x30, [sp, -16]!
-	add	x29, sp, 0
-	bl	FtlL2PDataInit
-	adrp	x0, .LANCHOR144
-	add	x0, x0, :lo12:.LANCHOR144
-	bl	FtlMapTblRecovery
-	mov	w0, 0
-	ldp	x29, x30, [sp], 16
-	ret
-	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
-	.section	.text.FtlVariablesInit,"ax",@progbits
-	.align	2
-	.global	FtlVariablesInit
-	.type	FtlVariablesInit, %function
-FtlVariablesInit:
-	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR150
-	mov	w1, -1
-	add	x29, sp, 0
-	strh	w1, [x0, #:lo12:.LANCHOR150]
-	adrp	x0, .LANCHOR151
-	mov	w1, -1
-	str	x19, [sp, 16]
-	str	wzr, [x0, #:lo12:.LANCHOR151]
-	adrp	x0, .LANCHOR152
-	adrp	x19, .LANCHOR6
-	str	wzr, [x0, #:lo12:.LANCHOR152]
-	adrp	x0, .LANCHOR153
-	str	w1, [x0, #:lo12:.LANCHOR153]
-	adrp	x0, .LANCHOR35
-	mov	w1, 0
-	strh	wzr, [x0, #:lo12:.LANCHOR35]
-	adrp	x0, .LANCHOR27
-	ldrh	w2, [x0, #:lo12:.LANCHOR27]
-	adrp	x0, .LANCHOR36
-	ldr	x0, [x0, #:lo12:.LANCHOR36]
-	lsl	w2, w2, 1
-	bl	ftl_memset
-	adrp	x0, .LANCHOR43
-	ldrh	w2, [x19, #:lo12:.LANCHOR6]
-	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR43]
-	lsl	w2, w2, 1
-	bl	ftl_memset
-	adrp	x0, .LANCHOR126
-	ldrh	w2, [x19, #:lo12:.LANCHOR6]
-	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR126]
-	lsl	w2, w2, 1
-	bl	ftl_memset
-	mov	w2, 48
-	mov	w1, 0
-	adrp	x0, .LANCHOR39
-	add	x0, x0, :lo12:.LANCHOR39
-	bl	ftl_memset
-	mov	w2, 512
-	mov	w1, 0
-	adrp	x0, .LANCHOR81
-	add	x0, x0, :lo12:.LANCHOR81
-	bl	ftl_memset
-	bl	FtlGcBufInit
-	bl	FtlL2PDataInit
-	ldr	x19, [sp, 16]
-	mov	w0, 0
-	ldp	x29, x30, [sp], 32
-	ret
-	.size	FtlVariablesInit, .-FtlVariablesInit
-	.section	.text.SupperBlkListInit,"ax",@progbits
-	.align	2
-	.global	SupperBlkListInit
-	.type	SupperBlkListInit, %function
-SupperBlkListInit:
-	stp	x29, x30, [sp, -96]!
-	adrp	x0, .LANCHOR6
-	mov	w1, 0
-	add	x29, sp, 0
-	ldrh	w2, [x0, #:lo12:.LANCHOR6]
-	mov	w0, 6
-	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR40
-	stp	x19, x20, [sp, 16]
-	adrp	x23, .LANCHOR45
-	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR48
-	mul	w2, w2, w0
-	ldr	x0, [x24, #:lo12:.LANCHOR40]
+	add	x21, x19, :lo12:.LANCHOR148
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR5
-	str	x27, [sp, 80]
-	adrp	x26, .LANCHOR13
-	add	x25, x25, :lo12:.LANCHOR5
-	add	x26, x26, :lo12:.LANCHOR13
+	adrp	x26, .LANCHOR123
+	stp	x27, x28, [sp, 80]
+	adrp	x25, .LANCHOR42
+	ldr	x0, [x23, #:lo12:.LANCHOR115]
+	adrp	x24, .LANCHOR5
+	str	x0, [x21, 8]
+	adrp	x20, .LANCHOR79
+	ldr	x0, [x26, #:lo12:.LANCHOR123]
+	str	x0, [x21, 16]
+	ldr	x0, [x25, #:lo12:.LANCHOR42]
+	ldrh	w2, [x24, #:lo12:.LANCHOR5]
+	lsl	w2, w2, 1
 	bl	ftl_memset
-	mov	w21, 0
-	adrp	x0, .LANCHOR47
-	mov	w20, 0
-	mov	w19, 0
-	strh	wzr, [x23, #:lo12:.LANCHOR45]
-	str	xzr, [x0, #:lo12:.LANCHOR47]
-	adrp	x0, .LANCHOR41
-	strh	wzr, [x22, #:lo12:.LANCHOR48]
-	adrp	x27, .LANCHOR3
-	str	xzr, [x0, #:lo12:.LANCHOR41]
-	adrp	x0, .LANCHOR44
-	str	xzr, [x0, #:lo12:.LANCHOR44]
-.L837:
-	ldrh	w0, [x25]
-	cmp	w19, w0
-	bcs	.L843
-	adrp	x0, .LANCHOR19
-	ldrh	w8, [x27, #:lo12:.LANCHOR3]
-	mov	x6, 0
-	mov	w5, 0
-	ldrh	w7, [x0, #:lo12:.LANCHOR19]
-	b	.L844
-.L839:
-	ldrb	w0, [x26, x6]
-	mov	w1, w19
-	bl	V2P_block
-	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L838
-	add	w5, w5, w7
-	and	w5, w5, 65535
-.L838:
-	add	x6, x6, 1
-.L844:
-	cmp	w8, w6, uxth
-	bhi	.L839
-	cbz	w5, .L846
-	mov	w0, 32768
-	sdiv	w5, w0, w5
-.L840:
-	ldr	x1, [x24, #:lo12:.LANCHOR40]
-	mov	w0, 6
-	umaddl	x0, w19, w0, x1
-	strh	w5, [x0, 4]
-	adrp	x0, .LANCHOR51
-	ldrh	w0, [x0, #:lo12:.LANCHOR51]
-	cmp	w0, w19
-	beq	.L841
-	adrp	x0, .LANCHOR52
-	ldrh	w0, [x0, #:lo12:.LANCHOR52]
-	cmp	w0, w19
-	beq	.L841
-	adrp	x0, .LANCHOR53
-	ldrh	w0, [x0, #:lo12:.LANCHOR53]
-	cmp	w0, w19
-	beq	.L841
-	adrp	x1, .LANCHOR42
-	ubfiz	x0, x19, 1, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR42]
-	ldrh	w0, [x1, x0]
-	cbnz	w0, .L842
-	add	w21, w21, 1
-	mov	w0, w19
-	and	w21, w21, 65535
-	bl	INSERT_FREE_LIST
-.L841:
-	add	w19, w19, 1
-	and	w19, w19, 65535
-	b	.L837
-.L846:
-	mov	w5, 0
-	b	.L840
-.L842:
-	add	w20, w20, 1
-	mov	w0, w19
-	and	w20, w20, 65535
-	bl	INSERT_DATA_LIST
-	b	.L841
-.L843:
-	strh	w20, [x23, #:lo12:.LANCHOR45]
-	add	w20, w20, w21
-	strh	w21, [x22, #:lo12:.LANCHOR48]
-	cmp	w20, w0
-	ble	.L845
-	adrp	x1, .LANCHOR154
-	adrp	x0, .LC1
-	mov	w2, 2154
-	add	x1, x1, :lo12:.LANCHOR154
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L845:
-	mov	w0, 0
-	ldr	x27, [sp, 80]
+	ldrh	w0, [x20, #:lo12:.LANCHOR79]
+	mov	w1, 65535
+	cmp	w0, w1
+	bne	.L698
+.L706:
+	mov	w0, -1
+.L697:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-	.size	SupperBlkListInit, .-SupperBlkListInit
-	.section	.text.ftl_check_vpc,"ax",@progbits
-	.align	2
-	.global	ftl_check_vpc
-	.type	ftl_check_vpc, %function
-ftl_check_vpc:
-	stp	x29, x30, [sp, -112]!
-	adrp	x0, .LC94
-	add	x0, x0, :lo12:.LC94
-	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR61
-	add	x23, x23, :lo12:.LANCHOR61
-	stp	x21, x22, [sp, 32]
-	mov	w22, 0
-	stp	x19, x20, [sp, 16]
-	stp	x25, x26, [sp, 64]
-	adrp	x21, .LANCHOR155
-	stp	x27, x28, [sp, 80]
-	add	x1, x21, :lo12:.LANCHOR155
-	adrp	x20, check_vpc_table
-	bl	printf
-	add	x19, x20, :lo12:check_vpc_table
-	mov	w2, 8192
-	mov	w1, 0
-	mov	x0, x19
-	bl	ftl_memset
-.L849:
-	ldr	w0, [x23]
-	cmp	w22, w0
-	bcc	.L851
-	adrp	x22, .LANCHOR5
-	adrp	x24, .LC95
-	add	x22, x22, :lo12:.LANCHOR5
-	add	x26, x20, :lo12:check_vpc_table
-	add	x24, x24, :lo12:.LC95
-	mov	w23, 0
-	mov	w19, 0
-	adrp	x25, .LANCHOR42
-.L852:
-	ldrh	w0, [x22]
-	cmp	w0, w19
-	bhi	.L854
-	adrp	x0, .LANCHOR47
-	ldr	x19, [x0, #:lo12:.LANCHOR47]
-	cbz	x19, .L855
-	adrp	x0, .LANCHOR48
-	adrp	x25, .LC96
-	add	x20, x20, :lo12:check_vpc_table
-	add	x25, x25, :lo12:.LC96
-	ldrh	w26, [x0, #:lo12:.LANCHOR48]
-	adrp	x0, .LANCHOR40
-	mov	x24, x0
-	mov	w22, 0
-	ldr	x1, [x0, #:lo12:.LANCHOR40]
-	adrp	x27, .LANCHOR42
-	mov	w28, 6
-	sub	x19, x19, x1
-	mov	x1, -6148914691236517206
-	asr	x19, x19, 1
-	movk	x1, 0xaaab, lsl 0
-	mul	x19, x19, x1
-	and	w19, w19, 65535
-.L856:
-	cmp	w22, w26
-	bne	.L858
-.L855:
-	cbz	w23, .L848
+.L698:
+	add	x27, x20, :lo12:.LANCHOR79
+	mov	w1, 1
+	bl	FtlGetLastWrittenPage
+	sxth	w22, w0
+	add	w0, w0, 1
+	mov	w28, 61604
+	strh	w0, [x27, 2]
+	mov	w27, 19539
+	movk	w27, 0x4654, lsl 16
+.L700:
+	tbz	w22, #31, .L703
+	adrp	x1, .LANCHOR151
 	adrp	x0, .LC1
-	mov	w2, 2321
-	add	x1, x21, :lo12:.LANCHOR155
+	mov	w2, 1448
+	add	x1, x1, :lo12:.LANCHOR151
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L848:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 112
-	ret
-.L851:
-	mov	w2, 0
-	add	x1, x29, 108
-	mov	w0, w22
-	bl	log2phys
-	ldr	w0, [x29, 108]
-	cmn	w0, #1
-	beq	.L850
-	lsr	w0, w0, 10
-	bl	P2V_block_in_plane
-	and	x0, x0, 65535
-	ldrh	w1, [x19, x0, lsl 1]
-	add	w1, w1, 1
-	strh	w1, [x19, x0, lsl 1]
-.L850:
-	add	w22, w22, 1
-	b	.L849
-.L854:
-	ldr	x0, [x25, #:lo12:.LANCHOR42]
-	ubfiz	x28, x19, 1, 16
-	sxtw	x27, w19
-	ldrh	w2, [x0, x28]
-	ldrh	w3, [x26, x27, lsl 1]
-	cmp	w2, w3
-	beq	.L853
-	mov	w1, w19
-	mov	x0, x24
+.L702:
+	adrp	x1, .LANCHOR23
+	ldrh	w0, [x24, #:lo12:.LANCHOR5]
+	ldrh	w1, [x1, #:lo12:.LANCHOR23]
+	add	x0, x0, 24
+	cmp	x1, x0, lsl 1
+	bcs	.L705
+	adrp	x1, .LANCHOR151
+	adrp	x0, .LC1
+	mov	w2, 1450
+	add	x1, x1, :lo12:.LANCHOR151
+	add	x0, x0, :lo12:.LC1
 	bl	printf
+.L705:
+	add	x22, x19, :lo12:.LANCHOR148
+	adrp	x19, .LANCHOR39
+	add	x21, x19, :lo12:.LANCHOR39
+	mov	w2, 48
+	mov	x0, x21
+	ldr	x1, [x22, 8]
+	bl	ftl_memcpy
 	ldr	x0, [x25, #:lo12:.LANCHOR42]
-	mov	w1, 65535
-	ldrh	w0, [x0, x28]
-	cmp	w0, w1
-	beq	.L853
-	ldrh	w1, [x26, x27, lsl 1]
-	cmp	w1, w0
-	csinc	w23, w23, wzr, ls
-.L853:
-	add	w19, w19, 1
-	and	w19, w19, 65535
-	b	.L852
-.L858:
-	ldr	x1, [x27, #:lo12:.LANCHOR42]
-	ubfiz	x0, x19, 1, 16
-	ldrh	w2, [x1, x0]
-	cbz	w2, .L857
-	ldrh	w3, [x20, w19, sxtw 1]
-	mov	w23, 1
-	mov	w1, w19
-	mov	x0, x25
-	bl	printf
-.L857:
-	ldr	x0, [x24, #:lo12:.LANCHOR40]
-	umull	x19, w19, w28
-	ldrh	w19, [x0, x19]
-	mov	w0, 65535
-	cmp	w19, w0
-	beq	.L855
-	add	w22, w22, 1
-	and	w22, w22, 65535
-	b	.L856
-	.size	ftl_check_vpc, .-ftl_check_vpc
-	.section	.text.FtlGcPageVarInit,"ax",@progbits
-	.align	2
-	.global	FtlGcPageVarInit
-	.type	FtlGcPageVarInit, %function
-FtlGcPageVarInit:
-	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR95
-	mov	w1, 255
-	add	x29, sp, 0
-	strh	wzr, [x0, #:lo12:.LANCHOR95]
-	adrp	x0, .LANCHOR97
-	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR21
-	strh	wzr, [x0, #:lo12:.LANCHOR97]
-	adrp	x0, .LANCHOR96
-	ldrh	w2, [x19, #:lo12:.LANCHOR21]
-	ldr	x0, [x0, #:lo12:.LANCHOR96]
+	ldrh	w2, [x24, #:lo12:.LANCHOR5]
+	ldr	x1, [x22, 8]
 	lsl	w2, w2, 1
-	bl	ftl_memset
-	ldrh	w2, [x19, #:lo12:.LANCHOR21]
-	mov	w0, 12
-	mov	w1, 255
-	mul	w2, w2, w0
-	adrp	x0, .LANCHOR98
-	ldr	x0, [x0, #:lo12:.LANCHOR98]
-	bl	ftl_memset
-	ldr	x19, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	b	FtlGcBufInit
-	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
-	.section	.text.FtlGcScanTempBlk,"ax",@progbits
-	.align	2
-	.global	FtlGcScanTempBlk
-	.type	FtlGcScanTempBlk, %function
-FtlGcScanTempBlk:
-	stp	x29, x30, [sp, -112]!
-	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR156
-	stp	x19, x20, [sp, 16]
-	mov	x20, x0
-	stp	x27, x28, [sp, 80]
-	mov	w0, 65535
-	ldrh	w19, [x21, #:lo12:.LANCHOR156]
-	mov	w28, w1
-	stp	x23, x24, [sp, 48]
-	stp	x25, x26, [sp, 64]
-	cmp	w19, w0
-	beq	.L892
-	cbnz	w19, .L876
-.L877:
-	bl	FtlGcPageVarInit
-	b	.L878
-.L892:
-	mov	w19, 0
-.L876:
-	adrp	x0, .LANCHOR19
-	ldrh	w0, [x0, #:lo12:.LANCHOR19]
-	cmp	w0, w28
-	beq	.L877
-.L878:
-	adrp	x27, .LANCHOR23
-	add	x27, x27, :lo12:.LANCHOR23
-	mov	w22, 0
-	mov	w23, 65535
-.L886:
-	ldrh	w0, [x20]
-	strb	wzr, [x20, 8]
-	cmp	w0, w23
-	beq	.L893
-	adrp	x25, .LANCHOR24
-	adrp	x26, .LANCHOR3
-	add	x25, x25, :lo12:.LANCHOR24
-	add	x26, x26, :lo12:.LANCHOR3
-.L889:
-	adrp	x1, .LANCHOR91
-	adrp	x24, .LANCHOR120
-	ldrh	w7, [x27]
-	add	x5, x20, 16
-	ldr	x6, [x1, #:lo12:.LANCHOR91]
-	adrp	x1, .LANCHOR92
-	ldr	x0, [x24, #:lo12:.LANCHOR120]
-	mov	w3, 0
-	ldr	x8, [x1, #:lo12:.LANCHOR92]
-	ldrh	w1, [x26]
-	ldrh	w10, [x25]
-	add	x1, x1, 8
-	add	x1, x20, x1, lsl 1
-.L880:
-	cmp	x1, x5
-	bne	.L882
-	mov	w1, w3
-	str	w3, [x29, 108]
-	mov	w2, 0
-	bl	FlashReadPages
-	ldr	w3, [x29, 108]
-	mov	x11, 0
-	ubfiz	x12, x3, 5, 16
-.L883:
-	cmp	x11, x12
-	bne	.L887
-	add	w19, w19, 1
-	add	w22, w22, 1
-	and	w19, w19, 65535
-	cmp	w28, w22
-	adrp	x1, .LANCHOR19
-	bls	.L888
-.L890:
-	ldrh	w0, [x1, #:lo12:.LANCHOR19]
-	cmp	w0, w19
-	bhi	.L889
-.L893:
-	mov	w2, 0
-	b	.L879
-.L882:
-	ldrh	w4, [x5]
-	cmp	w4, w23
-	beq	.L881
-	ubfiz	x2, x3, 5, 16
-	orr	w4, w19, w4, lsl 10
-	add	x2, x0, x2
-	str	w4, [x2, 4]
-	mul	w4, w3, w7
-	asr	w4, w4, 2
-	add	x4, x6, x4, sxtw 2
-	str	x4, [x2, 8]
-	mul	w4, w3, w10
-	add	w3, w3, 1
-	and	w3, w3, 65535
-	asr	w4, w4, 2
-	add	x4, x8, x4, sxtw 2
-	str	x4, [x2, 16]
-.L881:
-	add	x5, x5, 2
-	b	.L880
-.L887:
-	ldr	x6, [x24, #:lo12:.LANCHOR120]
-	add	x5, x6, x11
-	ldr	w4, [x5, 4]
-	lsr	w0, w4, 10
-	bl	P2V_plane
-	and	w2, w0, 65535
-	ldr	w0, [x6, x11]
-	cbnz	w0, .L884
-	ldr	x0, [x5, 16]
-	add	x11, x11, 32
-	ldrh	w1, [x0]
-	cmp	w1, w23
-	bne	.L885
+	add	x1, x1, 48
+	bl	ftl_memcpy
+	ldrh	w1, [x24, #:lo12:.LANCHOR5]
+	ldr	x0, [x22, 8]
+	lsr	w2, w1, 3
+	ubfiz	x1, x1, 1, 16
+	add	x1, x1, 48
+	add	w2, w2, 4
+	and	x1, x1, -4
+	add	x1, x0, x1
+	adrp	x0, .LANCHOR1
+	ldr	x0, [x0, #:lo12:.LANCHOR1]
+	bl	ftl_memcpy
+	ldr	w1, [x19, #:lo12:.LANCHOR39]
+	mov	w0, 19539
+	movk	w0, 0x4654, lsl 16
+	cmp	w1, w0
+	bne	.L706
+	add	x20, x20, :lo12:.LANCHOR79
+	adrp	x0, .LANCHOR10
+	ldrh	w1, [x21, 8]
+	ldrb	w2, [x21, 10]
+	ldrh	w0, [x0, #:lo12:.LANCHOR10]
+	strh	w1, [x20, 6]
+	cmp	w2, w0
+	bne	.L706
 	adrp	x0, .LANCHOR152
-	mov	w1, 1
+	adrp	x2, .LANCHOR61
+	adrp	x3, .LANCHOR3
 	str	w1, [x0, #:lo12:.LANCHOR152]
-.L879:
-	strh	w19, [x20, 2]
-	mov	w0, -1
-	strb	w2, [x20, 6]
-	mov	w1, w19
-	strh	w0, [x21, #:lo12:.LANCHOR156]
-	mov	x0, x20
-	bl	ftl_sb_update_avl_pages
-	b	.L891
-.L885:
-	ldp	w2, w0, [x0, 8]
-	mov	w1, w4
-	bl	FtlGcUpdatePage
-	b	.L883
-.L884:
-	adrp	x0, .LANCHOR42
-	ldrh	w1, [x20]
-	mov	w19, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR42]
-	strh	wzr, [x0, x1, lsl 1]
-	ldrh	w0, [x20]
-	bl	INSERT_FREE_LIST
+	adrp	x0, .LANCHOR19
+	ldrh	w3, [x3, #:lo12:.LANCHOR3]
+	ldrh	w0, [x0, #:lo12:.LANCHOR19]
+	mul	w0, w0, w1
+	str	w0, [x2, #:lo12:.LANCHOR61]
+	adrp	x2, .LANCHOR12
+	ldrh	w2, [x2, #:lo12:.LANCHOR12]
+	mul	w0, w2, w0
+	adrp	x2, .LANCHOR34
+	str	w0, [x2, #:lo12:.LANCHOR34]
+	adrp	x0, .LANCHOR7
+	ldr	w2, [x0, #:lo12:.LANCHOR7]
+	adrp	x0, .LANCHOR37+6
+	ldrh	w0, [x0, #:lo12:.LANCHOR37+6]
+	cmp	w1, w2
+	sub	w0, w2, w0
+	sub	w0, w0, w1
+	udiv	w0, w0, w3
+	adrp	x3, .LANCHOR78
+	strh	w0, [x3, #:lo12:.LANCHOR78]
+	bls	.L707
+	adrp	x1, .LANCHOR151
+	adrp	x0, .LC1
+	mov	w2, 1472
+	add	x1, x1, :lo12:.LANCHOR151
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L707:
+	add	x1, x19, :lo12:.LANCHOR39
+	adrp	x0, .LANCHOR51
+	add	x3, x0, :lo12:.LANCHOR51
+	adrp	x20, .LANCHOR80
+	ldrh	w2, [x1, 16]
+	ldrh	w6, [x1, 14]
+	strh	w6, [x0, #:lo12:.LANCHOR51]
+	lsr	w4, w2, 6
+	and	w2, w2, 63
+	strb	w2, [x3, 6]
+	ldrb	w2, [x1, 11]
+	strb	w2, [x3, 8]
+	add	x2, x20, :lo12:.LANCHOR80
+	strh	w4, [x3, 2]
+	mov	w3, -1
+	strh	w3, [x20, #:lo12:.LANCHOR80]
+	strh	wzr, [x2, 2]
+	strb	wzr, [x2, 6]
+	strb	wzr, [x2, 8]
+	adrp	x2, .LANCHOR52
+	ldrh	w3, [x1, 18]
+	add	x4, x2, :lo12:.LANCHOR52
+	strh	w3, [x2, #:lo12:.LANCHOR52]
+	mov	x21, x2
+	ldrh	w3, [x1, 20]
+	lsr	w5, w3, 6
+	and	w3, w3, 63
+	strb	w3, [x4, 6]
+	ldrb	w3, [x1, 12]
+	strh	w5, [x4, 2]
+	strb	w3, [x4, 8]
+	adrp	x4, .LANCHOR53
+	ldrh	w3, [x1, 22]
+	add	x5, x4, :lo12:.LANCHOR53
+	strh	w3, [x4, #:lo12:.LANCHOR53]
+	mov	x22, x4
+	ldrh	w3, [x1, 24]
+	lsr	w7, w3, 6
+	and	w3, w3, 63
+	strb	w3, [x5, 6]
+	ldrb	w3, [x1, 13]
+	strb	w3, [x5, 8]
+	adrp	x3, .LANCHOR67
+	strh	w7, [x5, 2]
+	ldr	w5, [x1, 32]
+	str	wzr, [x3, #:lo12:.LANCHOR67]
+	adrp	x3, .LANCHOR64
+	str	wzr, [x3, #:lo12:.LANCHOR64]
+	adrp	x3, .LANCHOR62
+	str	wzr, [x3, #:lo12:.LANCHOR62]
+	adrp	x3, .LANCHOR66
+	str	wzr, [x3, #:lo12:.LANCHOR66]
+	adrp	x3, .LANCHOR72
+	str	w5, [x3, #:lo12:.LANCHOR72]
+	adrp	x3, .LANCHOR73
+	str	wzr, [x3, #:lo12:.LANCHOR73]
+	adrp	x3, .LANCHOR76
+	str	wzr, [x3, #:lo12:.LANCHOR76]
+	adrp	x3, .LANCHOR65
+	str	wzr, [x3, #:lo12:.LANCHOR65]
+	ldr	w3, [x1, 40]
+	adrp	x1, .LANCHOR70
+	ldr	w5, [x1, #:lo12:.LANCHOR70]
+	cmp	w3, w5
+	bls	.L708
+	str	w3, [x1, #:lo12:.LANCHOR70]
+.L708:
+	add	x19, x19, :lo12:.LANCHOR39
+	adrp	x1, .LANCHOR71
+	ldr	w3, [x1, #:lo12:.LANCHOR71]
+	ldr	w2, [x19, 36]
+	cmp	w2, w3
+	bls	.L709
+	str	w2, [x1, #:lo12:.LANCHOR71]
+.L709:
+	mov	w1, 65535
+	cmp	w6, w1
+	beq	.L710
+	add	x0, x0, :lo12:.LANCHOR51
+	bl	make_superblock
+.L710:
+	ldrh	w2, [x21, #:lo12:.LANCHOR52]
+	mov	w1, 65535
+	add	x0, x21, :lo12:.LANCHOR52
+	cmp	w2, w1
+	beq	.L711
+	bl	make_superblock
+.L711:
+	ldrh	w2, [x22, #:lo12:.LANCHOR53]
+	mov	w1, 65535
+	add	x0, x22, :lo12:.LANCHOR53
+	cmp	w2, w1
+	beq	.L712
+	bl	make_superblock
+.L712:
+	ldrh	w2, [x20, #:lo12:.LANCHOR80]
+	mov	w1, 65535
+	add	x0, x20, :lo12:.LANCHOR80
+	cmp	w2, w1
+	beq	.L713
+	bl	make_superblock
+.L713:
+	mov	w0, 0
+	b	.L697
+.L703:
+	ldrh	w0, [x20, #:lo12:.LANCHOR79]
+	mov	w2, 1
+	mov	w1, w2
+	orr	w0, w22, w0, lsl 10
+	str	w0, [x21, 4]
+	ldr	x0, [x23, #:lo12:.LANCHOR115]
+	str	x0, [x21, 8]
+	mov	x0, x21
+	bl	FlashReadPages
+	ldr	w0, [x21]
+	cmn	w0, #1
+	beq	.L701
+	ldr	x0, [x23, #:lo12:.LANCHOR115]
+	ldr	w0, [x0]
+	cmp	w0, w27
+	bne	.L701
+	ldr	x0, [x26, #:lo12:.LANCHOR123]
+	ldrh	w0, [x0]
+	cmp	w0, w28
+	beq	.L702
+.L701:
+	sub	w22, w22, #1
+	sxth	w22, w22
+	b	.L700
+	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
+	.section	.text.FlashProgPages,"ax",@progbits
+	.align	2
+	.global	FlashProgPages
+	.type	FlashProgPages, %function
+FlashProgPages:
+	stp	x29, x30, [sp, -160]!
+	ubfiz	x1, x1, 5, 32
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR0
+	stp	x23, x24, [sp, 48]
+	adrp	x22, .LANCHOR153
+	stp	w3, w2, [x29, 104]
+	add	x2, x21, :lo12:.LANCHOR0
+	stp	x19, x20, [sp, 16]
+	adrp	x24, .LANCHOR105
+	stp	x27, x28, [sp, 80]
+	mov	x19, x0
+	ldrh	w23, [x2, 12]
+	add	x20, x0, x1
+	stp	x25, x26, [sp, 64]
+	add	x22, x22, :lo12:.LANCHOR153
+	mov	x25, x0
+	add	x28, x24, :lo12:.LANCHOR105
+	lsl	w27, w23, 3
+.L720:
+	cmp	x25, x20
+	bne	.L732
+	ldr	w0, [x29, 104]
+	cbz	w0, .L745
+	adrp	x21, .LANCHOR120
+	adrp	x22, .LANCHOR122
+	mov	x23, x21
+	mov	x24, x22
+.L734:
+	cmp	x19, x20
+	beq	.L745
+	ldr	x1, [x21, #:lo12:.LANCHOR120]
+	ldr	x0, [x22, #:lo12:.LANCHOR122]
+	str	wzr, [x1]
+	str	wzr, [x0]
+	stp	x1, x0, [x29, 136]
+	mov	w1, 1
+	ldr	w2, [x19, 4]
+	add	x0, x29, 128
+	str	w2, [x29, 132]
+	ldr	w2, [x29, 108]
+	bl	FlashReadPages
+	ldr	w26, [x29, 128]
+	cmn	w26, #1
+	bne	.L735
+	ldr	w1, [x19, 4]
+	adrp	x0, .LC85
+	add	x0, x0, :lo12:.LC85
+	bl	printf
+	str	w26, [x19]
+.L735:
+	ldr	x0, [x19, 16]
+	cbz	x0, .L736
+	ldr	w2, [x0]
+	ldr	x0, [x24, #:lo12:.LANCHOR122]
+	ldr	w3, [x0]
+	cmp	w2, w3
+	beq	.L736
+	ldr	w1, [x19, 4]
+	adrp	x0, .LC86
+	add	x0, x0, :lo12:.LC86
+	bl	printf
 	mov	w0, -1
-	strh	w0, [x20]
-	bl	FtlGcPageVarInit
-	b	.L886
-.L888:
-	ldrh	w0, [x21, #:lo12:.LANCHOR156]
-	cmp	w0, w23
-	beq	.L890
-	add	w0, w0, w22
-	strh	w0, [x21, #:lo12:.LANCHOR156]
-	ldrh	w0, [x1, #:lo12:.LANCHOR19]
-	cmp	w0, w19
-	bls	.L890
-.L891:
-	ldp	x19, x20, [sp, 16]
+	str	w0, [x19]
+.L736:
+	ldr	x0, [x19, 8]
+	cbz	x0, .L737
+	ldr	w2, [x0]
+	ldr	x0, [x23, #:lo12:.LANCHOR120]
+	ldr	w3, [x0]
+	cmp	w2, w3
+	beq	.L737
+	ldr	w1, [x19, 4]
+	adrp	x0, .LC87
+	add	x0, x0, :lo12:.LC87
+	bl	printf
 	mov	w0, -1
+	str	w0, [x19]
+.L737:
+	add	x19, x19, 32
+	b	.L734
+.L732:
+	ldr	x0, [x25, 8]
+	cbz	x0, .L721
+	ldr	x0, [x25, 16]
+	cbnz	x0, .L722
+.L721:
+	adrp	x0, .LC1
+	mov	w2, 130
+	mov	x1, x22
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L722:
+	ldr	w0, [x25, 4]
+	add	x2, x29, 120
+	add	x1, x29, 124
+	bl	l2p_addr_tran.isra.0
+	ldr	w0, [x29, 120]
+	cbnz	w0, .L723
+	ldr	w0, [x29, 124]
+	cmp	w27, w0
+	bls	.L723
+	adrp	x21, .LANCHOR153
+	adrp	x22, .LC79
+	mov	w23, -1
+	add	x21, x21, :lo12:.LANCHOR153
+	add	x22, x22, :lo12:.LC79
+	b	.L756
+.L725:
+	ldr	w2, [x19, 4]
+	mov	x1, x21
+	str	w23, [x19]
+	mov	x0, x22
+	add	x19, x19, 32
+	bl	printf
+	ldr	x1, [x19, -24]
+	mov	w3, 16
+	mov	w2, 4
+	adrp	x0, .LC80
+	add	x0, x0, :lo12:.LC80
+	bl	rknand_print_hex
+	ldr	x1, [x19, -16]
+	mov	w3, 4
+	adrp	x0, .LC81
+	mov	w2, w3
+	add	x0, x0, :lo12:.LC81
+	bl	rknand_print_hex
+.L756:
+	cmp	x19, x20
+	bne	.L725
+.L745:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 112
+	ldp	x29, x30, [sp], 160
 	ret
-	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
-	.section	.text.FlashTestBlk,"ax",@progbits
+.L723:
+	ldr	x1, [x25, 8]
+	tst	x1, 63
+	beq	.L739
+	adrp	x0, .LANCHOR120
+	ldr	x26, [x0, #:lo12:.LANCHOR120]
+	cmp	x1, x26
+	beq	.L726
+	adrp	x0, .LANCHOR12
+	ldrh	w2, [x0, #:lo12:.LANCHOR12]
+	mov	x0, x26
+	lsl	w2, w2, 9
+	bl	ftl_memcpy
+.L726:
+	add	x0, x24, :lo12:.LANCHOR105
+	ldr	w1, [x29, 124]
+	ldr	x3, [x25, 16]
+	mov	x2, x26
+	ldr	x6, [x0, 16]
+	ldrb	w0, [x29, 120]
+	blr	x6
+	cbnz	w0, .L727
+	str	wzr, [x25]
+.L728:
+	add	x0, x21, :lo12:.LANCHOR0
+	ldrh	w0, [x0, 14]
+	cmp	w0, 4
+	bne	.L730
+	ldrb	w0, [x29, 120]
+	add	x2, x26, 2048
+	ldr	x6, [x28, 16]
+	ldr	w1, [x29, 124]
+	ldr	x3, [x25, 16]
+	add	w1, w23, w1
+	add	x3, x3, 8
+	blr	x6
+	cbz	w0, .L730
+	mov	w0, -1
+	str	w0, [x25]
+.L730:
+	add	x25, x25, 32
+	b	.L720
+.L739:
+	mov	x26, x1
+	b	.L726
+.L727:
+	mov	w0, -1
+	str	w0, [x25]
+	b	.L728
+	.size	FlashProgPages, .-FlashProgPages
+	.section	.text.FtlLowFormatEraseBlock,"ax",@progbits
 	.align	2
-	.global	FlashTestBlk
-	.type	FlashTestBlk, %function
-FlashTestBlk:
+	.global	FtlLowFormatEraseBlock
+	.type	FtlLowFormatEraseBlock, %function
+FtlLowFormatEraseBlock:
 	stp	x29, x30, [sp, -128]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	and	w19, w0, 65535
-	cmp	w19, 11
-	bls	.L901
-	add	x0, x29, 64
-	mov	w2, 32
-	mov	w1, 165
-	adrp	x20, ftl_temp_buf
-	add	x20, x20, :lo12:ftl_temp_buf
-	stp	x20, x0, [x29, 40]
-	bl	ftl_memset
-	lsl	w19, w19, 10
-	mov	w2, 8
-	mov	w1, 90
-	mov	x0, x20
-	bl	ftl_memset
-	mov	w2, 1
-	str	w19, [x29, 36]
-	mov	w1, w2
-	add	x0, x29, 32
-	bl	FlashEraseBlocks
-	mov	w3, 1
-	add	x0, x29, 32
-	mov	w2, w3
-	mov	w1, w3
-	bl	FlashProgPages
-	ldr	w0, [x29, 32]
-	mov	w2, 1
-	mov	w1, 0
-	cmp	w0, 0
-	add	x0, x29, 32
-	csetm	w19, ne
-	bl	FlashEraseBlocks
-.L899:
-	mov	w0, w19
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 128
-	ret
-.L901:
-	mov	w19, 0
-	b	.L899
-	.size	FlashTestBlk, .-FlashTestBlk
-	.section	.text.FlashGetBadBlockList,"ax",@progbits
-	.align	2
-	.global	FlashGetBadBlockList
-	.type	FlashGetBadBlockList, %function
-FlashGetBadBlockList:
-	stp	x29, x30, [sp, -32]!
-	mov	w2, 256
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	x19, x0
-	mov	w20, w1
-	mov	w1, 255
-	bl	ftl_memset
-	adrp	x0, .LANCHOR105
-	mov	w1, w20
-	ldr	x2, [x0, #:lo12:.LANCHOR105]
-	mov	x0, x19
-	blr	x2
-	and	w0, w0, 65535
-	cmp	w0, 50
-	bls	.L904
-	mov	w2, 256
-	mov	w1, 255
-	mov	x0, x19
-	bl	ftl_memset
-	mov	w0, 0
-.L904:
-	adrp	x1, .LANCHOR0+14
-	ldrh	w1, [x1, #:lo12:.LANCHOR0+14]
-	cmp	w1, 4
-	bne	.L908
-	mov	x1, 0
-.L906:
-	cmp	w0, w1, uxth
-	bhi	.L907
-.L908:
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	ret
-.L907:
-	ldrh	w2, [x19, x1, lsl 1]
-	lsr	w2, w2, 1
-	strh	w2, [x19, x1, lsl 1]
-	add	x1, x1, 1
-	b	.L906
-	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
-	.section	.text.ftl_memcpy,"ax",@progbits
-	.align	2
-	.global	ftl_memcpy
-	.type	ftl_memcpy, %function
-ftl_memcpy:
-	uxtw	x2, w2
-	b	memcpy
-	.size	ftl_memcpy, .-ftl_memcpy
-	.section	.text.FtlBbmTblFlush,"ax",@progbits
-	.align	2
-	.global	FtlBbmTblFlush
-	.type	FtlBbmTblFlush, %function
-FtlBbmTblFlush:
-	stp	x29, x30, [sp, -96]!
+	adrp	x7, .LANCHOR13
+	add	x7, x7, :lo12:.LANCHOR13
+	mov	x5, 0
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR108
+	and	w23, w0, 65535
+	adrp	x0, .LANCHOR111
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR106
 	stp	x21, x22, [sp, 32]
-	add	x20, x19, :lo12:.LANCHOR106
-	adrp	x22, .LANCHOR107
-	ldr	x1, [x23, #:lo12:.LANCHOR108]
+	adrp	x20, .LANCHOR3
 	stp	x25, x26, [sp, 64]
-	adrp	x21, .LANCHOR37
-	str	x27, [sp, 80]
-	add	x25, x21, :lo12:.LANCHOR37
-	ldr	x0, [x22, #:lo12:.LANCHOR107]
-	adrp	x26, .LANCHOR10
-	stp	x0, x1, [x20, 8]
-	adrp	x1, .LANCHOR23
-	adrp	x27, .LANCHOR137
-	add	x25, x25, 32
-	ldrh	w2, [x1, #:lo12:.LANCHOR23]
+	and	w22, w1, 255
+	str	w23, [x0, #:lo12:.LANCHOR111]
+	adrp	x21, .LANCHOR106
+	adrp	x0, .LANCHOR119
+	adrp	x1, .LANCHOR124
+	adrp	x25, .LANCHOR24
+	ldrh	w8, [x20, #:lo12:.LANCHOR3]
+	ldr	x6, [x21, #:lo12:.LANCHOR106]
 	mov	w24, 0
-	add	x26, x26, :lo12:.LANCHOR10
-	add	x27, x27, :lo12:.LANCHOR137
+	ldr	x10, [x0, #:lo12:.LANCHOR119]
+	mov	w19, 0
+	ldr	x11, [x1, #:lo12:.LANCHOR124]
+	ldrh	w12, [x25, #:lo12:.LANCHOR24]
+	stp	x27, x28, [sp, 80]
+	str	x0, [x29, 112]
+.L759:
+	cmp	w8, w5, uxth
+	bhi	.L763
+	cbz	w24, .L758
+	mov	w2, w24
+	ubfiz	x24, x24, 5, 16
+	mov	x26, 0
 	mov	w1, 0
-	bl	ftl_memset
-.L912:
-	ldrh	w0, [x26]
-	cmp	w24, w0
-	blt	.L913
-	add	x19, x19, :lo12:.LANCHOR106
-	add	x20, x21, :lo12:.LANCHOR37
-	mov	w2, 16
-	mov	w1, 255
-	adrp	x24, .LC97
-	adrp	x26, .LANCHOR20
-	ldr	x27, [x19, 16]
-	add	x24, x24, :lo12:.LC97
-	add	x26, x26, :lo12:.LANCHOR20
-	mov	w25, 0
-	mov	x0, x27
-	bl	ftl_memset
-	mov	w0, -3887
-	strh	w0, [x27]
-	ldr	w0, [x20, 8]
-	str	w0, [x27, 4]
-	ldrh	w0, [x21, #:lo12:.LANCHOR37]
-	mov	w21, 0
-	strh	w0, [x27, 2]
-	ldrh	w0, [x20, 4]
-	strh	w0, [x27, 8]
-	ldrh	w0, [x20, 6]
-	strh	w0, [x27, 10]
-	adrp	x0, .LANCHOR2
-	ldr	w0, [x0, #:lo12:.LANCHOR2]
-	strh	w0, [x27, 12]
-.L914:
-	ldrh	w4, [x27, 10]
-	ldrh	w1, [x20]
-	ldrh	w2, [x20, 2]
-	ldrh	w3, [x20, 4]
-	ldr	x0, [x22, #:lo12:.LANCHOR107]
-	str	x0, [x19, 8]
-	ldr	x0, [x23, #:lo12:.LANCHOR108]
-	str	x0, [x19, 16]
-	orr	w0, w2, w1, lsl 10
-	str	wzr, [x19]
-	str	w0, [x19, 4]
-	mov	x0, x24
-	bl	printf
-	mov	w3, 1
-	mov	x0, x19
-	mov	w1, w3
-	mov	w2, w3
-	bl	FlashProgPages
-	ldrh	w0, [x26]
-	ldrh	w1, [x20, 2]
-	sub	w0, w0, #1
-	cmp	w1, w0
-	blt	.L915
-	ldr	w0, [x20, 8]
-	mov	w2, 1
-	ldrh	w1, [x20, 4]
-	add	w0, w0, 1
-	str	w0, [x20, 8]
-	str	w0, [x27, 4]
-	ldrh	w0, [x20]
-	strh	w0, [x27, 8]
-	strh	w0, [x20, 4]
-	adrp	x0, .LANCHOR111
-	strh	w1, [x20]
-	lsl	w1, w1, 10
-	ldr	x0, [x0, #:lo12:.LANCHOR111]
-	str	w1, [x19, 4]
-	strh	wzr, [x20, 2]
-	str	w1, [x0, 4]
-	mov	w1, w2
+	mov	x0, x6
 	bl	FlashEraseBlocks
+.L767:
+	ldr	x0, [x21, #:lo12:.LANCHOR106]
+	add	x1, x0, x26
+	ldr	w0, [x0, x26]
+	cmn	w0, #1
+	bne	.L766
+	ldr	w0, [x1, 4]
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	lsr	w0, w0, 10
+	bl	FtlBbmMapBadBlock
+.L766:
+	add	x26, x26, 32
+	cmp	x26, x24
+	bne	.L767
+	cbz	w22, .L780
+	adrp	x0, .LANCHOR20
+	mov	w26, 1
+	ldrh	w28, [x0, #:lo12:.LANCHOR20]
+.L768:
+	add	x0, x20, :lo12:.LANCHOR3
+	adrp	x27, .LANCHOR13
+	str	x0, [x29, 120]
+	mov	w24, 0
+	add	x0, x27, :lo12:.LANCHOR13
+	str	x0, [x29, 104]
+.L776:
+	ldr	x0, [x29, 120]
+	mov	x5, 0
+	ldr	x6, [x21, #:lo12:.LANCHOR106]
+	mov	w20, 0
+	ldrh	w11, [x25, #:lo12:.LANCHOR24]
+	ldrh	w7, [x0]
+	adrp	x0, .LANCHOR118
+	ldr	x8, [x0, #:lo12:.LANCHOR118]
+	ldr	x0, [x29, 112]
+	ldr	x10, [x0, #:lo12:.LANCHOR119]
+.L769:
+	cmp	w7, w5, uxth
+	bhi	.L772
+	cbz	w20, .L758
+	mov	w1, w20
 	mov	w3, 1
-	mov	x0, x19
-	mov	w2, w3
-	mov	w1, w3
+	mov	w2, w26
+	mov	x0, x6
 	bl	FlashProgPages
-.L915:
-	ldrh	w0, [x20, 2]
-	add	w0, w0, 1
-	strh	w0, [x20, 2]
-	ldr	w0, [x19]
-	cmn	w0, #1
-	bne	.L916
-	ldr	w1, [x19, 4]
-	add	w21, w21, 1
-	adrp	x0, .LC98
-	and	w21, w21, 65535
-	add	x0, x0, :lo12:.LC98
-	bl	printf
-	cmp	w21, 3
-	bls	.L914
-	ldr	w1, [x19, 4]
-	adrp	x0, .LC99
-	mov	w2, w21
-	add	x0, x0, :lo12:.LC99
-	bl	printf
-.L918:
-	b	.L918
-.L913:
-	ldrh	w2, [x27]
-	ldr	x1, [x25], 8
-	ldr	x0, [x20, 8]
-	mul	w3, w24, w2
-	lsl	w2, w2, 2
+	mov	x27, 0
+	ubfiz	x1, x20, 5, 16
+.L775:
+	ldr	x0, [x21, #:lo12:.LANCHOR106]
+	add	x3, x0, x27
+	ldr	w0, [x0, x27]
+	cbz	w0, .L774
+	ldr	w0, [x3, 4]
+	add	w19, w19, 1
+	str	x1, [x29, 96]
+	and	w19, w19, 65535
+	lsr	w0, w0, 10
+	bl	FtlBbmMapBadBlock
+	ldr	x1, [x29, 96]
+.L774:
+	add	x27, x27, 32
+	cmp	x1, x27
+	bne	.L775
 	add	w24, w24, 1
-	add	x0, x0, x3, sxtw 2
-	bl	ftl_memcpy
-	b	.L912
-.L919:
-	mov	w25, 1
-	b	.L914
-.L916:
-	cbz	w25, .L919
-	mov	w0, 0
-	ldr	x27, [sp, 80]
+	cmp	w28, w24, uxth
+	bhi	.L776
+	mov	x24, 0
+.L778:
+	cbz	w22, .L777
+	ldr	x0, [x21, #:lo12:.LANCHOR106]
+	add	x1, x0, x24
+	ldr	w0, [x0, x24]
+	cbnz	w0, .L777
+	ldr	w0, [x1, 4]
+	mov	w1, 1
+	lsr	w0, w0, 10
+	bl	FtlFreeSysBlkQueueIn
+.L777:
+	add	x24, x24, 32
+	cmp	x24, x27
+	bne	.L778
+	cmp	w23, 63
+	ccmp	w22, 0, 0, hi
+	beq	.L758
+	ldr	x0, [x21, #:lo12:.LANCHOR106]
+	mov	w2, w20
+	mov	w1, w26
+	bl	FlashEraseBlocks
+.L758:
+	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 96
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
 	ret
-	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
-	.section	.text.allocate_data_superblock,"ax",@progbits
-	.align	2
-	.global	allocate_data_superblock
-	.type	allocate_data_superblock, %function
-allocate_data_superblock:
-	stp	x29, x30, [sp, -112]!
+.L763:
+	lsl	x0, x5, 5
+	mov	w1, w23
+	str	wzr, [x6, x0]
+	ldrb	w0, [x7, x5]
+	bl	V2P_block
+	and	w13, w0, 65535
+	mov	w14, w13
+	cbz	w22, .L760
+	bl	IsBlkInVendorPart
+	cbnz	w0, .L761
+.L760:
+	mov	w0, w14
+	bl	FtlBbmIsBadBlock
+	cbnz	w0, .L762
+	ubfiz	x0, x24, 5, 16
+	mul	w1, w24, w12
+	add	x0, x6, x0
+	add	w24, w24, 1
+	and	w24, w24, 65535
+	lsl	w13, w13, 10
+	asr	w1, w1, 2
+	add	x1, x11, x1, sxtw 2
+	str	w13, [x0, 4]
+	stp	x10, x1, [x0, 8]
+.L761:
+	add	x5, x5, 1
+	b	.L759
+.L762:
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L761
+.L780:
+	mov	w26, 0
+	mov	w28, 2
+	b	.L768
+.L772:
+	lsl	x0, x5, 5
+	mov	w1, w23
+	str	wzr, [x6, x0]
+	ldr	x0, [x29, 104]
+	ldrb	w0, [x0, x5]
+	bl	V2P_block
+	and	w12, w0, 65535
+	mov	w13, w12
+	cbz	w22, .L770
+	bl	IsBlkInVendorPart
+	cbnz	w0, .L771
+.L770:
+	mov	w0, w13
+	bl	FtlBbmIsBadBlock
+	cbnz	w0, .L771
+	ubfiz	x0, x20, 5, 16
+	mul	w1, w20, w11
+	add	x0, x6, x0
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	add	w12, w24, w12, lsl 10
+	asr	w1, w1, 2
+	add	x1, x10, x1, sxtw 2
+	str	w12, [x0, 4]
+	stp	x8, x1, [x0, 8]
+.L771:
+	add	x5, x5, 1
+	b	.L769
+	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
+	.section	.text.Ftl_write_map_blk_to_last_page,"ax",@progbits
+	.align	2
+	.global	Ftl_write_map_blk_to_last_page
+	.type	Ftl_write_map_blk_to_last_page, %function
+Ftl_write_map_blk_to_last_page:
+	stp	x29, x30, [sp, -64]!
+	mov	w1, 65535
 	add	x29, sp, 0
-	stp	x27, x28, [sp, 80]
-	adrp	x28, .LANCHOR48
-	stp	x23, x24, [sp, 48]
-	add	x23, x28, :lo12:.LANCHOR48
 	stp	x19, x20, [sp, 16]
-	adrp	x27, .LANCHOR45
 	mov	x19, x0
+	ldr	x20, [x0, 16]
 	stp	x21, x22, [sp, 32]
-	add	x0, x27, :lo12:.LANCHOR45
-	stp	x25, x26, [sp, 64]
-	str	x0, [x29, 104]
-.L922:
-	ldr	x1, [x29, 104]
-	adrp	x24, .LANCHOR5
-	ldrh	w0, [x28, #:lo12:.LANCHOR48]
-	ldrh	w1, [x1]
-	add	w0, w0, w1
-	ldrh	w1, [x24, #:lo12:.LANCHOR5]
+	ldrh	w0, [x0]
+	str	x23, [sp, 48]
 	cmp	w0, w1
-	ble	.L923
-	adrp	x1, .LANCHOR157
+	bne	.L802
+	ldrh	w0, [x19, 8]
+	cbz	w0, .L803
+	adrp	x1, .LANCHOR154
 	adrp	x0, .LC1
-	mov	w2, 2588
-	add	x1, x1, :lo12:.LANCHOR157
+	mov	w2, 641
+	add	x1, x1, :lo12:.LANCHOR154
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L923:
-	adrp	x0, .LANCHOR53
-	add	x0, x0, :lo12:.LANCHOR53
-	cmp	x19, x0
-	bne	.L948
-	adrp	x1, .LANCHOR87
-	ldrh	w0, [x23]
-	ldr	w1, [x1, #:lo12:.LANCHOR87]
-	mul	w1, w0, w1
-	lsr	w0, w0, 1
+.L803:
+	ldrh	w0, [x19, 8]
 	add	w0, w0, 1
-	add	w1, w0, w1, lsr 2
-	ands	w1, w1, 65535
-	beq	.L924
-	sub	w1, w1, #1
-	and	w1, w1, 65535
-.L924:
-	adrp	x0, .LANCHOR47
-	add	x0, x0, :lo12:.LANCHOR47
-	bl	List_pop_index_node
-	and	w20, w0, 65535
-	ldrh	w0, [x23]
-	cbnz	w0, .L925
-	adrp	x1, .LANCHOR157
-	adrp	x0, .LC1
-	mov	w2, 2597
-	add	x1, x1, :lo12:.LANCHOR157
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L925:
-	ldrh	w0, [x23]
+	strh	w0, [x19, 8]
+	bl	FtlFreeSysBlkQueueOut
+	strh	w0, [x20]
+	ldr	w0, [x19, 48]
+	strh	wzr, [x19, 2]
+	add	w0, w0, 1
+	strh	wzr, [x19]
+	str	w0, [x19, 48]
+.L804:
+	mov	w0, 0
+	ldr	x23, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+.L802:
+	ubfiz	x0, x0, 1, 16
+	adrp	x1, .LANCHOR123
+	adrp	x23, .LANCHOR115
+	ldr	x22, [x19, 40]
+	ldr	x1, [x1, #:lo12:.LANCHOR123]
+	ldrh	w21, [x20, x0]
+	adrp	x20, .LANCHOR148
+	ldrh	w0, [x19, 2]
+	add	x2, x20, :lo12:.LANCHOR148
+	orr	w0, w0, w21, lsl 10
+	str	w0, [x2, 4]
+	ldr	x0, [x23, #:lo12:.LANCHOR115]
+	str	x1, [x2, 16]
+	str	x0, [x2, 8]
+	ldr	w2, [x19, 48]
+	str	w2, [x1, 4]
+	mov	w2, -1291
+	strh	w2, [x1, 8]
+	ldrh	w2, [x19, 4]
+	strh	w2, [x1]
+	strh	w21, [x1, 2]
+	adrp	x1, .LANCHOR20
+	ldrh	w2, [x1, #:lo12:.LANCHOR20]
+	mov	w1, 255
+	lsl	w2, w2, 3
+	bl	ftl_memset
+	ldrh	w4, [x19, 6]
+	mov	x1, 0
+	ldr	x3, [x23, #:lo12:.LANCHOR115]
+	mov	w2, 0
+.L805:
+	cmp	w4, w1, uxth
+	bhi	.L807
+	mov	w2, 1
+	mov	w3, 0
+	mov	w1, w2
+	add	x0, x20, :lo12:.LANCHOR148
+	bl	FlashProgPages
+	ldrh	w0, [x19, 2]
+	add	w0, w0, 1
+	strh	w0, [x19, 2]
+	mov	x0, x19
+	bl	ftl_map_blk_gc
+	b	.L804
+.L807:
+	ldr	w0, [x22, x1, lsl 2]
+	cmp	w21, w0, lsr 10
+	bne	.L806
+	add	w2, w2, 1
+	and	w2, w2, 65535
+	ubfiz	x0, x2, 1, 16
+	str	w1, [x3, x0, lsl 2]
+	add	x0, x0, 1
+	ldr	w5, [x22, x1, lsl 2]
+	str	w5, [x3, x0, lsl 2]
+.L806:
+	add	x1, x1, 1
+	b	.L805
+	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
+	.section	.text.FtlMapWritePage,"ax",@progbits
+	.align	2
+	.global	FtlMapWritePage
+	.type	FtlMapWritePage, %function
+FtlMapWritePage:
+	stp	x29, x30, [sp, -112]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR66
+	stp	x25, x26, [sp, 64]
+	adrp	x24, .LANCHOR155
+	stp	x27, x28, [sp, 80]
+	adrp	x26, .LANCHOR20
+	stp	x19, x20, [sp, 16]
+	mov	w25, w1
+	mov	x19, x0
+	mov	x27, x2
+	add	x23, x23, :lo12:.LANCHOR66
+	add	x24, x24, :lo12:.LANCHOR155
+	add	x28, x26, :lo12:.LANCHOR20
+	stp	x21, x22, [sp, 32]
+	mov	w22, 0
+.L813:
+	ldr	w0, [x23]
+	ldrh	w1, [x19, 2]
+	add	w0, w0, 1
+	str	w0, [x23]
+	ldrh	w0, [x26, #:lo12:.LANCHOR20]
 	sub	w0, w0, #1
-	strh	w0, [x23]
-	strh	w20, [x19]
+	cmp	w1, w0
+	bge	.L814
+	ldrh	w1, [x19]
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L815
+.L814:
 	mov	x0, x19
-	bl	make_superblock
-	ldrb	w0, [x19, 7]
-	cbnz	w0, .L926
-	adrp	x1, .LANCHOR42
-	ubfiz	x0, x20, 1, 16
-	mov	w2, -1
-	ldr	x1, [x1, #:lo12:.LANCHOR42]
-	strh	w2, [x1, x0]
-	mov	w0, w20
-	bl	INSERT_DATA_LIST
-	ldrh	w1, [x27, #:lo12:.LANCHOR45]
-	ldrh	w0, [x23]
-	add	w0, w0, w1
-	ldrh	w1, [x24, #:lo12:.LANCHOR5]
-	cmp	w0, w1
-	ble	.L922
-	mov	w2, 2608
-	adrp	x1, .LANCHOR157
-	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR157
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-	b	.L922
-.L948:
-	mov	w1, 0
-	b	.L924
-.L926:
-	ldrh	w1, [x27, #:lo12:.LANCHOR45]
-	ldrh	w0, [x23]
-	add	w0, w0, w1
-	ldrh	w1, [x24, #:lo12:.LANCHOR5]
-	cmp	w0, w1
-	ble	.L928
-	adrp	x1, .LANCHOR157
+	bl	Ftl_write_map_blk_to_last_page
+.L815:
+	ldrh	w1, [x19]
+	ldr	x0, [x19, 16]
+	ldrh	w0, [x0, x1, lsl 1]
+	cbnz	w0, .L816
 	adrp	x0, .LC1
-	mov	w2, 2611
-	add	x1, x1, :lo12:.LANCHOR157
+	mov	w2, 699
+	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L928:
-	adrp	x0, .LANCHOR3
-	adrp	x25, .LANCHOR111
-	add	x26, x19, 16
-	mov	w21, 0
-	ldrh	w0, [x0, #:lo12:.LANCHOR3]
-	mov	x4, x26
-	ldr	x3, [x25, #:lo12:.LANCHOR111]
-	mov	w6, 65535
-	ubfiz	x0, x0, 5, 16
-	add	x1, x3, 8
-	add	x0, x0, 8
-	add	x0, x3, x0
-.L929:
-	cmp	x0, x1
-	bne	.L931
-	cbnz	w21, .L932
-	adrp	x1, .LANCHOR157
+.L816:
+	ldrh	w1, [x19]
+	ldrh	w0, [x19, 10]
+	cmp	w1, w0
+	bcc	.L817
 	adrp	x0, .LC1
-	mov	w2, 2622
-	add	x1, x1, :lo12:.LANCHOR157
+	mov	w2, 700
+	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L932:
-	adrp	x0, .LANCHOR80
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
-	cmp	w0, w20
-	bne	.L933
-	adrp	x1, .LANCHOR157
-	adrp	x0, .LC1
-	mov	w2, 2624
-	add	x1, x1, :lo12:.LANCHOR157
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L933:
-	ldrb	w0, [x19, 8]
-	uxtw	x22, w20
-	adrp	x6, .LANCHOR43
-	adrp	x7, .LANCHOR14
-	adrp	x5, .LANCHOR72
-	adrp	x4, .LANCHOR73
-	cbnz	w0, .L934
-	ldr	x2, [x6, #:lo12:.LANCHOR43]
-	lsl	x1, x22, 1
-	ldrh	w0, [x2, x1]
-	cbz	w0, .L935
-	ldrh	w3, [x7, #:lo12:.LANCHOR14]
-	add	w0, w0, w3
-.L959:
-	strh	w0, [x2, x1]
-	mov	w1, 0
-	ldr	w0, [x5, #:lo12:.LANCHOR72]
-	add	w0, w0, 1
-	str	w0, [x5, #:lo12:.LANCHOR72]
-	mov	w0, w20
-	bl	ftl_set_blk_mode
-.L937:
-	ldr	x0, [x6, #:lo12:.LANCHOR43]
-	lsl	x22, x22, 1
-	ldrh	w1, [x0, x22]
-	adrp	x0, .LANCHOR76
-	ldr	w2, [x0, #:lo12:.LANCHOR76]
-	cmp	w1, w2
-	bls	.L938
-	str	w1, [x0, #:lo12:.LANCHOR76]
-.L938:
-	ldr	w2, [x5, #:lo12:.LANCHOR72]
-	ldr	w1, [x4, #:lo12:.LANCHOR73]
-	ldrh	w0, [x7, #:lo12:.LANCHOR14]
-	madd	w0, w0, w2, w1
-	ldrh	w1, [x24, #:lo12:.LANCHOR5]
-	udiv	w0, w0, w1
-	adrp	x1, .LANCHOR74
-	str	w0, [x1, #:lo12:.LANCHOR74]
-	adrp	x0, .LANCHOR127
-	ldr	x1, [x0, #:lo12:.LANCHOR127]
-	ldr	w0, [x1, 16]
-	add	w0, w0, 1
-	str	w0, [x1, 16]
-	ldr	x0, [x25, #:lo12:.LANCHOR111]
-	ubfiz	x1, x21, 5, 16
-	add	x1, x1, 4
-	add	x2, x0, 4
-	add	x1, x0, x1
-.L939:
-	cmp	x1, x2
-	bne	.L940
-	ldrb	w1, [x19, 8]
-	mov	w2, w21
-	mov	x24, 0
-	bl	FlashEraseBlocks
+.L817:
+	ldrh	w1, [x19]
+	adrp	x21, .LANCHOR148
+	ldr	x0, [x19, 16]
+	add	x20, x21, :lo12:.LANCHOR148
+	mov	w2, 16
+	ldrh	w3, [x0, x1, lsl 1]
 	mov	w1, 0
-.L941:
-	cmp	w21, w24, uxth
-	bhi	.L943
-	cbz	w1, .L944
-	mov	w0, w20
-	bl	update_multiplier_value
-	bl	FtlBbmTblFlush
-.L944:
-	ldrb	w0, [x19, 7]
-	adrp	x2, .LANCHOR42
-	cbnz	w0, .L945
-	ldr	x0, [x2, #:lo12:.LANCHOR42]
-	mov	w1, -1
-	strh	w1, [x0, x22]
-	mov	w0, w20
-	bl	INSERT_DATA_LIST
-	b	.L922
-.L931:
-	ldrh	w2, [x4]
-	stp	xzr, xzr, [x1]
-	cmp	w2, w6
-	beq	.L930
-	ubfiz	x5, x21, 5, 16
-	add	w21, w21, 1
-	add	x5, x3, x5
-	and	w21, w21, 65535
-	lsl	w2, w2, 10
-	str	w2, [x5, 4]
-.L930:
-	add	x1, x1, 32
-	add	x4, x4, 2
-	b	.L929
-.L935:
-	mov	w0, 2
-	b	.L959
-.L934:
-	ldr	x2, [x6, #:lo12:.LANCHOR43]
-	lsl	x0, x22, 1
-	ldrh	w1, [x2, x0]
-	add	w1, w1, 1
-	strh	w1, [x2, x0]
-	ldr	w0, [x4, #:lo12:.LANCHOR73]
+	ldrh	w0, [x19, 2]
+	str	w3, [x29, 108]
+	str	x27, [x20, 8]
+	orr	w0, w0, w3, lsl 10
+	str	w0, [x20, 4]
+	adrp	x0, .LANCHOR123
+	ldr	x0, [x0, #:lo12:.LANCHOR123]
+	str	x0, [x20, 16]
+	bl	ftl_memset
+	ldr	x0, [x20, 16]
+	ldr	w1, [x19, 48]
+	ldr	w3, [x29, 108]
+	str	w1, [x0, 4]
+	ldrh	w1, [x19, 4]
+	strh	w1, [x0]
+	strh	w3, [x0, 2]
+	mov	w3, 1
+	strh	w25, [x0, 8]
+	mov	w1, w3
+	mov	w2, w3
+	mov	x0, x20
+	bl	FlashProgPages
+	ldrh	w0, [x19, 2]
+	ldr	w1, [x21, #:lo12:.LANCHOR148]
 	add	w0, w0, 1
-	str	w0, [x4, #:lo12:.LANCHOR73]
-	mov	w0, w20
-	bl	ftl_set_blk_mode.part.6
-	b	.L937
-.L940:
-	ldr	w3, [x2]
-	and	w3, w3, -1024
-	str	w3, [x2], 32
-	b	.L939
-.L943:
-	ldr	x2, [x25, #:lo12:.LANCHOR111]
-	lsl	x0, x24, 5
-	add	x3, x2, x0
-	ldr	w2, [x2, x0]
-	cmn	w2, #1
-	bne	.L942
-	add	w1, w1, 1
-	ldr	w0, [x3, 4]
-	stp	w2, w1, [x29, 96]
-	lsr	w0, w0, 10
-	bl	FtlBbmMapBadBlock
-	ldp	w2, w1, [x29, 96]
-	strh	w2, [x26]
-	ldrb	w0, [x19, 7]
-	sub	w0, w0, #1
-	strb	w0, [x19, 7]
-.L942:
-	add	x24, x24, 1
-	add	x26, x26, 2
-	b	.L941
-.L945:
-	adrp	x1, .LANCHOR19
-	adrp	x3, .LANCHOR70
-	strb	wzr, [x19, 6]
-	ldrh	w1, [x1, #:lo12:.LANCHOR19]
-	strh	wzr, [x19, 2]
-	strh	w20, [x19]
-	mul	w0, w0, w1
-	ldr	w1, [x3, #:lo12:.LANCHOR70]
-	str	w1, [x19, 12]
-	add	w1, w1, 1
-	str	w1, [x3, #:lo12:.LANCHOR70]
-	ldr	x1, [x2, #:lo12:.LANCHOR42]
 	and	w0, w0, 65535
-	strh	w0, [x19, 4]
-	strh	w0, [x1, x22]
-	ldrh	w0, [x19, 4]
-	cbz	w0, .L946
-	ldrb	w0, [x19, 7]
-	cbnz	w0, .L947
-.L946:
-	adrp	x1, .LANCHOR157
-	adrp	x0, .LC1
-	mov	w2, 2677
-	add	x1, x1, :lo12:.LANCHOR157
-	add	x0, x0, :lo12:.LC1
+	strh	w0, [x19, 2]
+	cmn	w1, #1
+	bne	.L818
+	ldr	w1, [x20, 4]
+	adrp	x0, .LC88
+	add	x0, x0, :lo12:.LC88
+	add	w22, w22, 1
+	and	w22, w22, 65535
 	bl	printf
-.L947:
-	ldp	x19, x20, [sp, 16]
-	mov	w0, 0
+	ldrh	w0, [x19, 2]
+	cmp	w0, 2
+	bhi	.L819
+	ldrh	w0, [x28]
+	sub	w0, w0, #1
+	strh	w0, [x19, 2]
+.L819:
+	cmp	w22, 3
+	bls	.L820
+	add	x21, x21, :lo12:.LANCHOR148
+	adrp	x0, .LC89
+	mov	w2, w22
+	add	x0, x0, :lo12:.LC89
+	ldr	w1, [x21, 4]
+	bl	printf
+.L821:
+	b	.L821
+.L820:
+	ldr	w0, [x19, 52]
+	cbz	w0, .L813
+.L835:
+	b	.L835
+.L818:
+	cmp	w0, 1
+	beq	.L824
+	cmp	w1, 256
+	beq	.L824
+	ldr	w0, [x19, 56]
+	cbz	w0, .L825
+.L824:
+	str	wzr, [x19, 56]
+	b	.L813
+.L825:
+	ldr	x0, [x19, 40]
+	ldr	w1, [x20, 4]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
+	str	w1, [x0, w25, uxtw 2]
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 112
 	ret
-	.size	allocate_data_superblock, .-allocate_data_superblock
-	.section	.text.FtlGcFreeBadSuperBlk,"ax",@progbits
+	.size	FtlMapWritePage, .-FtlMapWritePage
+	.section	.text.load_l2p_region,"ax",@progbits
 	.align	2
-	.global	FtlGcFreeBadSuperBlk
-	.type	FtlGcFreeBadSuperBlk, %function
-FtlGcFreeBadSuperBlk:
+	.global	load_l2p_region
+	.type	load_l2p_region, %function
+load_l2p_region:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x24, .LANCHOR32
+	stp	x19, x20, [sp, 16]
+	and	w20, w0, 65535
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR101
+	and	x19, x1, 65535
+	ldrh	w0, [x24, #:lo12:.LANCHOR32]
 	stp	x25, x26, [sp, 64]
-	and	w25, w0, 65535
-	ldrh	w0, [x21, #:lo12:.LANCHOR101]
-	stp	x19, x20, [sp, 16]
-	stp	x23, x24, [sp, 48]
 	str	x27, [sp, 80]
-	cbz	w0, .L961
-	adrp	x23, .LANCHOR102
-	add	x24, x23, :lo12:.LANCHOR102
-	mov	w19, 0
-.L962:
-	adrp	x0, .LANCHOR3
-	ldrh	w0, [x0, #:lo12:.LANCHOR3]
-	cmp	w0, w19
-	bhi	.L968
-	bl	FtlGcReFreshBadBlk
-.L961:
+	cmp	w0, w20
+	bcs	.L838
+	adrp	x1, .LANCHOR156
+	adrp	x0, .LC1
+	mov	w2, 485
+	add	x1, x1, :lo12:.LANCHOR156
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L838:
+	adrp	x27, .LANCHOR134
+	ubfiz	x0, x20, 2, 16
+	adrp	x22, .LANCHOR55
+	ldr	x1, [x27, #:lo12:.LANCHOR134]
+	ldr	w23, [x1, x0]
+	cbnz	w23, .L839
+	ldr	x0, [x22, #:lo12:.LANCHOR55]
+	lsl	x19, x19, 4
+	adrp	x1, .LANCHOR23
+	add	x0, x0, x19
+	ldrh	w2, [x1, #:lo12:.LANCHOR23]
+	mov	w1, 255
+	ldr	x0, [x0, 8]
+	bl	ftl_memset
+	ldr	x0, [x22, #:lo12:.LANCHOR55]
+	add	x1, x0, x19
+	strh	w20, [x0, x19]
+	str	wzr, [x1, 4]
+.L840:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -7156,1464 +6113,2851 @@ FtlGcFreeBadSuperBlk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L968:
-	adrp	x0, .LANCHOR13
-	add	x0, x0, :lo12:.LANCHOR13
-	mov	w1, w25
-	add	x22, x21, :lo12:.LANCHOR101
-	mov	w20, 0
-	ldrb	w0, [x0, w19, sxtw]
-	bl	V2P_block
-	and	w26, w0, 65535
-.L963:
-	ldrh	w0, [x22]
+.L839:
+	ldr	x0, [x22, #:lo12:.LANCHOR55]
+	lsl	x19, x19, 4
+	adrp	x26, .LANCHOR148
+	add	x21, x26, :lo12:.LANCHOR148
+	add	x0, x0, x19
+	mov	w2, 1
+	mov	w1, w2
+	str	w23, [x21, 4]
+	ldr	x0, [x0, 8]
+	str	x0, [x21, 8]
+	adrp	x0, .LANCHOR123
+	ldr	x0, [x0, #:lo12:.LANCHOR123]
+	str	x0, [x21, 16]
+	mov	x0, x21
+	bl	FlashReadPages
+	ldr	x25, [x21, 16]
+	ldrh	w0, [x25, 8]
 	cmp	w0, w20
-	bhi	.L967
-	add	w19, w19, 1
-	and	w19, w19, 65535
-	b	.L962
-.L967:
-	add	x0, x23, :lo12:.LANCHOR102
-	add	w27, w20, 1
-	ldrh	w0, [x0, w20, sxtw 1]
-	cmp	w0, w26
-	bne	.L964
-	mov	w1, w26
-	adrp	x0, .LC100
-	add	x0, x0, :lo12:.LC100
+	beq	.L841
+	mov	w2, w23
+	mov	w1, w20
+	adrp	x0, .LC90
+	add	x0, x0, :lo12:.LC90
 	bl	printf
-	mov	w0, w26
-	bl	FtlBbmMapBadBlock
-	bl	FtlBbmTblFlush
-	ldrh	w1, [x22]
-	sxtw	x3, w27
-	and	x4, x20, 65535
-	mov	x0, 0
-.L965:
-	add	w2, w20, w0
-	cmp	w1, w2, uxth
-	bhi	.L966
-	sub	w1, w1, #1
-	strh	w1, [x22]
-.L964:
-	and	w20, w27, 65535
-	b	.L963
-.L966:
-	add	x2, x3, x0
-	ldrh	w5, [x24, x2, lsl 1]
-	add	x2, x4, x0
-	add	x0, x0, 1
-	strh	w5, [x24, x2, lsl 1]
-	b	.L965
-	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
-	.section	.text.update_vpc_list,"ax",@progbits
-	.align	2
-	.global	update_vpc_list
-	.type	update_vpc_list, %function
-update_vpc_list:
-	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LANCHOR42
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	and	w19, w0, 65535
-	ldr	x1, [x1, #:lo12:.LANCHOR42]
-	ubfiz	x0, x19, 1, 16
-	ldrh	w0, [x1, x0]
-	cbnz	w0, .L974
-	adrp	x0, .LANCHOR80
-	ldrh	w1, [x0, #:lo12:.LANCHOR80]
-	cmp	w1, w19
-	bne	.L975
-	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR80]
-.L976:
-	adrp	x20, .LANCHOR45
-	mov	w1, w19
-	adrp	x0, .LANCHOR41
-	add	x0, x0, :lo12:.LANCHOR41
-	bl	List_remove_node
-	ldrh	w0, [x20, #:lo12:.LANCHOR45]
-	cbnz	w0, .L978
-	adrp	x1, .LANCHOR158
+	ldr	x1, [x21, 16]
+	mov	w3, 4
+	adrp	x0, .LC91
+	mov	w2, w3
+	add	x0, x0, :lo12:.LC91
+	bl	rknand_print_hex
+	ldrh	w3, [x24, #:lo12:.LANCHOR32]
+	adrp	x0, .LC92
+	ldr	x1, [x27, #:lo12:.LANCHOR134]
+	mov	w2, 4
+	add	x0, x0, :lo12:.LC92
+	bl	rknand_print_hex
+.L842:
+	ldrh	w0, [x25, 8]
+	cmp	w0, w20
+	beq	.L843
+	adrp	x1, .LANCHOR156
 	adrp	x0, .LC1
-	mov	w2, 2747
-	add	x1, x1, :lo12:.LANCHOR158
+	mov	w2, 508
+	add	x1, x1, :lo12:.LANCHOR156
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L978:
-	ldrh	w0, [x20, #:lo12:.LANCHOR45]
-	sub	w0, w0, #1
-	strh	w0, [x20, #:lo12:.LANCHOR45]
-	mov	w0, w19
-	bl	free_data_superblock
-	mov	w0, w19
-	bl	FtlGcFreeBadSuperBlk
-	adrp	x0, .LANCHOR48
-	ldrh	w1, [x20, #:lo12:.LANCHOR45]
-	ldrh	w0, [x0, #:lo12:.LANCHOR48]
-	add	w0, w0, w1
-	adrp	x1, .LANCHOR5
-	ldrh	w1, [x1, #:lo12:.LANCHOR5]
-	cmp	w0, w1
-	ble	.L982
-	adrp	x1, .LANCHOR158
-	adrp	x0, .LC1
-	mov	w2, 2750
-	add	x1, x1, :lo12:.LANCHOR158
-	add	x0, x0, :lo12:.LC1
+.L843:
+	ldr	x0, [x22, #:lo12:.LANCHOR55]
+	add	x1, x0, x19
+	str	wzr, [x1, 4]
+	strh	w20, [x0, x19]
+	b	.L840
+.L841:
+	ldr	w0, [x26, #:lo12:.LANCHOR148]
+	cmp	w0, 256
+	bne	.L842
+	mov	w2, w23
+	mov	w1, w20
+	adrp	x0, .LC93
+	add	x0, x0, :lo12:.LC93
 	bl	printf
-.L982:
-	mov	w0, 1
-	b	.L973
-.L975:
-	adrp	x0, .LANCHOR51
-	ldrh	w0, [x0, #:lo12:.LANCHOR51]
-	cmp	w0, w19
-	beq	.L981
-	adrp	x0, .LANCHOR52
-	ldrh	w0, [x0, #:lo12:.LANCHOR52]
-	cmp	w0, w19
-	beq	.L981
-	adrp	x0, .LANCHOR53
-	ldrh	w0, [x0, #:lo12:.LANCHOR53]
-	cmp	w0, w19
-	bne	.L976
-.L981:
-	mov	w0, 0
-.L973:
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	ret
-.L974:
-	mov	w0, w19
-	bl	List_update_data_list
-	b	.L981
-	.size	update_vpc_list, .-update_vpc_list
-	.section	.text.decrement_vpc_count,"ax",@progbits
+	ldr	x0, [x22, #:lo12:.LANCHOR55]
+	mov	w1, w20
+	add	x0, x0, x19
+	ldr	x2, [x0, 8]
+	adrp	x0, .LANCHOR140
+	add	x0, x0, :lo12:.LANCHOR140
+	bl	FtlMapWritePage
+	b	.L842
+	.size	load_l2p_region, .-load_l2p_region
+	.section	.text.ftl_map_blk_gc,"ax",@progbits
 	.align	2
-	.global	decrement_vpc_count
-	.type	decrement_vpc_count, %function
-decrement_vpc_count:
-	stp	x29, x30, [sp, -48]!
+	.global	ftl_map_blk_gc
+	.type	ftl_map_blk_gc, %function
+ftl_map_blk_gc:
+	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	and	w19, w0, 65535
-	str	x21, [sp, 32]
-	mov	w0, 65535
-	cmp	w19, w0
-	beq	.L985
-	adrp	x21, .LANCHOR42
-	ubfiz	x20, x19, 1, 16
-	ldr	x1, [x21, #:lo12:.LANCHOR42]
-	ldrh	w0, [x1, x20]
-	cbnz	w0, .L986
-	mov	w2, 0
-	mov	w1, w19
-	adrp	x0, .LC101
-	add	x0, x0, :lo12:.LC101
-	bl	printf
-	ldr	x0, [x21, #:lo12:.LANCHOR42]
-	ldrh	w0, [x0, x20]
-	cbz	w0, .L987
-.L992:
+	mov	x19, x0
+	stp	x23, x24, [sp, 48]
+	adrp	x24, .LANCHOR20
+	stp	x25, x26, [sp, 64]
+	stp	x21, x22, [sp, 32]
+	stp	x27, x28, [sp, 80]
+	ldr	x20, [x0, 16]
+	ldr	x25, [x0, 40]
+	bl	ftl_free_no_use_map_blk
+	ldrh	w1, [x19, 10]
+	ldrh	w2, [x19, 8]
+	sub	w1, w1, #5
+	cmp	w2, w1
+	blt	.L846
+	ubfiz	x0, x0, 1, 16
+	ldrh	w22, [x20, x0]
+	cbz	w22, .L846
+	ldr	w1, [x19, 52]
+	cbnz	w1, .L846
+	mov	w1, 1
+	str	w1, [x19, 52]
+	strh	wzr, [x20, x0]
+	ldrh	w0, [x19, 8]
+	ldrh	w1, [x19, 2]
+	sub	w0, w0, #1
+	strh	w0, [x19, 8]
+	ldrh	w0, [x24, #:lo12:.LANCHOR20]
+	cmp	w1, w0
+	bcc	.L847
+	mov	x0, x19
+	bl	ftl_map_blk_alloc_new_blk
+.L847:
+	adrp	x26, .LANCHOR148
+	adrp	x23, .LANCHOR157
+	add	x27, x26, :lo12:.LANCHOR148
+	add	x23, x23, :lo12:.LANCHOR157
 	mov	w20, 0
-.L984:
-	mov	w0, w20
-	ldr	x21, [sp, 32]
+.L848:
+	ldrh	w0, [x19, 6]
+	cmp	w0, w20
+	bhi	.L855
+	mov	w1, 1
+	mov	w0, w22
+	bl	FtlFreeSysBlkQueueIn
+	str	wzr, [x19, 52]
+.L846:
+	ldrh	w1, [x19, 2]
+	ldrh	w0, [x24, #:lo12:.LANCHOR20]
+	cmp	w1, w0
+	bcc	.L856
+	mov	x0, x19
+	bl	ftl_map_blk_alloc_new_blk
+.L856:
+	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
 	ret
-.L987:
-	mov	w2, 2765
-	adrp	x1, .LANCHOR159
-	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR159
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-	b	.L992
-.L986:
-	sub	w0, w0, #1
-	strh	w0, [x1, x20]
-.L985:
-	adrp	x21, .LANCHOR150
-	mov	w1, 65535
-	ldrh	w0, [x21, #:lo12:.LANCHOR150]
-	cmp	w0, w1
-	bne	.L989
-	strh	w19, [x21, #:lo12:.LANCHOR150]
-	b	.L992
-.L989:
-	cmp	w19, w0
-	beq	.L992
-	bl	update_vpc_list
-	cmp	w0, 0
-	adrp	x1, .LANCHOR40
-	adrp	x0, .LANCHOR41
-	strh	w19, [x21, #:lo12:.LANCHOR150]
-	cset	w20, ne
-	ldr	x1, [x1, #:lo12:.LANCHOR40]
-	ldr	x0, [x0, #:lo12:.LANCHOR41]
-	sub	x0, x0, x1
-	mov	x1, -6148914691236517206
-	asr	x0, x0, 1
-	movk	x1, 0xaaab, lsl 0
-	mul	x0, x0, x1
-	adrp	x1, .LANCHOR42
-	ldr	x1, [x1, #:lo12:.LANCHOR42]
-	and	x2, x0, 65535
-	ldrh	w1, [x1, x2, lsl 1]
-	cbnz	w1, .L984
-	cmp	w19, w0, uxth
-	beq	.L984
-	mov	w2, 2781
-	adrp	x1, .LANCHOR159
+.L855:
+	ubfiz	x0, x20, 2, 16
+	add	x28, x25, x0
+	ldr	w1, [x25, x0]
+	cmp	w22, w1, lsr 10
+	bne	.L849
+	adrp	x2, .LANCHOR116
+	add	x0, x26, :lo12:.LANCHOR148
+	ldr	x2, [x2, #:lo12:.LANCHOR116]
+	str	x2, [x0, 8]
+	adrp	x2, .LANCHOR123
+	str	w1, [x0, 4]
+	ldr	x21, [x2, #:lo12:.LANCHOR123]
+	mov	w2, 1
+	str	x21, [x0, 16]
+	mov	w1, w2
+	bl	FlashReadPages
+	ldrh	w0, [x21, 8]
+	cmp	w0, w20
+	beq	.L850
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR159
+	mov	w2, 611
+	mov	x1, x23
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	b	.L984
-	.size	decrement_vpc_count, .-decrement_vpc_count
-	.section	.text.FtlWriteDump_data,"ax",@progbits
+.L850:
+	ldr	w0, [x27]
+	cmn	w0, #1
+	bne	.L851
+.L853:
+	str	wzr, [x28]
+.L852:
+	b	.L852
+.L851:
+	ldrh	w0, [x21, 8]
+	cmp	w0, w20
+	bne	.L853
+	ldrh	w1, [x21]
+	ldrh	w0, [x19, 4]
+	cmp	w1, w0
+	bne	.L853
+	ldr	x2, [x27, 8]
+	mov	w1, w20
+	mov	x0, x19
+	bl	FtlMapWritePage
+.L849:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L848
+	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
+	.section	.text.FtlMapTblRecovery,"ax",@progbits
 	.align	2
-	.global	FtlWriteDump_data
-	.type	FtlWriteDump_data, %function
-FtlWriteDump_data:
-	stp	x29, x30, [sp, -128]!
+	.global	FtlMapTblRecovery
+	.type	FtlMapTblRecovery, %function
+FtlMapTblRecovery:
+	stp	x29, x30, [sp, -144]!
+	mov	w1, 0
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR51
-	add	x0, x19, :lo12:.LANCHOR51
-	stp	x21, x22, [sp, 32]
+	mov	x19, x0
 	stp	x23, x24, [sp, 48]
-	ldrh	w2, [x0, 4]
-	str	x25, [sp, 64]
-	cbz	w2, .L994
-	ldrb	w1, [x0, 8]
-	cbnz	w1, .L994
-	adrp	x3, .LANCHOR19
-	ldrb	w1, [x0, 7]
-	ldrh	w3, [x3, #:lo12:.LANCHOR19]
-	mul	w1, w1, w3
-	cmp	w2, w1
-	beq	.L994
-	ldrb	w0, [x0, 10]
-	cbnz	w0, .L993
-	adrp	x0, .LANCHOR61
-	mov	w2, 0
-	add	x1, x29, 92
-	ldr	w21, [x0, #:lo12:.LANCHOR61]
-	adrp	x0, .LANCHOR3
-	sub	w21, w21, #1
-	ldrh	w25, [x0, #:lo12:.LANCHOR3]
-	mov	w0, w21
-	bl	log2phys
-	adrp	x2, .LANCHOR108
-	adrp	x0, .LANCHOR107
-	ldr	w1, [x29, 92]
-	ldr	x20, [x2, #:lo12:.LANCHOR108]
-	ldr	x0, [x0, #:lo12:.LANCHOR107]
-	cmn	w1, #1
-	str	w1, [x29, 100]
-	stp	x0, x20, [x29, 104]
-	str	w21, [x29, 120]
-	str	wzr, [x20, 4]
-	beq	.L996
-	mov	w2, 0
-	mov	w1, 1
-	add	x0, x29, 96
-	bl	FlashReadPages
-.L997:
-	adrp	x23, .LANCHOR71
-	lsl	w25, w25, 2
-	add	x22, x19, :lo12:.LANCHOR51
-	add	x23, x23, :lo12:.LANCHOR71
-	mov	w0, -3947
-	mov	w24, 0
-	strh	w0, [x20]
-.L998:
-	cmp	w25, w24
-	bne	.L1002
-.L999:
-	add	x19, x19, :lo12:.LANCHOR51
-	mov	w0, 1
-	strb	w0, [x19, 10]
-.L993:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldr	x25, [sp, 64]
-	ldp	x29, x30, [sp], 128
-	ret
-.L996:
-	adrp	x1, .LANCHOR23
-	ldrh	w2, [x1, #:lo12:.LANCHOR23]
-	mov	w1, 255
-	bl	ftl_memset
-	b	.L997
-.L1002:
-	ldrh	w0, [x22, 4]
-	cbz	w0, .L999
-	ldr	w0, [x29, 100]
-	add	w24, w24, 1
-	stp	w21, w0, [x20, 8]
-	ldrh	w0, [x22]
-	strh	w0, [x20, 2]
-	mov	x0, x22
-	bl	get_new_active_ppa
-	str	w0, [x29, 100]
-	ldr	w0, [x23]
-	mov	w3, 0
-	str	w0, [x20, 4]
-	mov	w2, 0
-	add	w0, w0, 1
-	mov	w1, 1
-	cmn	w0, #1
-	csel	w0, w0, wzr, ne
-	str	w0, [x23]
-	add	x0, x29, 96
-	bl	FlashProgPages
-	ldrh	w0, [x22]
-	bl	decrement_vpc_count
-	b	.L998
-.L994:
-	add	x19, x19, :lo12:.LANCHOR51
-	strb	wzr, [x19, 10]
-	b	.L993
-	.size	FtlWriteDump_data, .-FtlWriteDump_data
-	.section	.text.l2p_flush,"ax",@progbits
-	.align	2
-	.global	l2p_flush
-	.type	l2p_flush, %function
-l2p_flush:
-	stp	x29, x30, [sp, -48]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR33
-	add	x20, x20, :lo12:.LANCHOR33
-	str	x21, [sp, 32]
-	mov	w19, 0
-	adrp	x21, .LANCHOR55
-	bl	FtlWriteDump_data
-.L1012:
-	ldrh	w0, [x20]
-	cmp	w0, w19
-	bhi	.L1014
-	mov	w0, 0
-	ldr	x21, [sp, 32]
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
-	ret
-.L1014:
-	ldr	x1, [x21, #:lo12:.LANCHOR55]
-	ubfiz	x0, x19, 4, 16
-	add	x0, x1, x0
-	ldr	w0, [x0, 4]
-	tbz	w0, #31, .L1013
-	mov	w0, w19
-	bl	flush_l2p_region
-.L1013:
-	add	w19, w19, 1
-	and	w19, w19, 65535
-	b	.L1012
-	.size	l2p_flush, .-l2p_flush
-	.section	.text.FtlRecoverySuperblock,"ax",@progbits
-	.align	2
-	.global	FtlRecoverySuperblock
-	.type	FtlRecoverySuperblock, %function
-FtlRecoverySuperblock:
-	stp	x29, x30, [sp, -192]!
-	mov	w1, 65535
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	x19, x0
+	adrp	x20, .LANCHOR148
+	ldrh	w23, [x0, 6]
+	adrp	x24, .LANCHOR20
 	stp	x21, x22, [sp, 32]
-	ldrh	w0, [x0]
-	stp	x23, x24, [sp, 48]
+	ldr	x21, [x0, 40]
+	ldr	x22, [x0, 16]
+	lsl	w2, w23, 2
+	ldr	x0, [x0, 24]
+	str	x0, [x29, 128]
+	ldrh	w0, [x19, 8]
 	stp	x25, x26, [sp, 64]
-	cmp	w0, w1
 	stp	x27, x28, [sp, 80]
-	beq	.L1140
-	ldrb	w0, [x19, 6]
-	str	w0, [x29, 164]
-	adrp	x0, .LANCHOR19
-	ldrh	w26, [x19, 2]
-	str	x0, [x29, 128]
-	ldrh	w2, [x0, #:lo12:.LANCHOR19]
-	cmp	w2, w26
-	bne	.L1019
-	strh	wzr, [x19, 4]
-.L1146:
-	strb	wzr, [x19, 6]
-.L1140:
-	ldp	x19, x20, [sp, 16]
+	mov	w27, 0
+	str	w0, [x29, 140]
+	mov	x0, x21
+	bl	ftl_memset
+	str	x20, [x29, 120]
+	adrp	x7, .LANCHOR115
+	add	x3, x20, :lo12:.LANCHOR148
+	mov	x26, x7
+	mov	x20, x3
+	ldr	x0, [x7, #:lo12:.LANCHOR115]
+	str	x0, [x3, 8]
+	adrp	x0, .LANCHOR123
+	stp	wzr, wzr, [x19, 48]
+	ldr	x25, [x0, #:lo12:.LANCHOR123]
+	mov	w0, -1
+	str	x25, [x3, 16]
+	strh	w0, [x19]
+	strh	w0, [x19, 2]
+	mov	w0, 1
+	str	w0, [x19, 56]
+	ldr	w0, [x29, 140]
+	sub	w0, w0, #1
+	str	w0, [x29, 136]
+	add	x0, x24, :lo12:.LANCHOR20
+	str	x0, [x29, 112]
+.L863:
+	ldr	w0, [x29, 140]
+	cmp	w27, w0
+	bge	.L880
+	ldr	w0, [x29, 136]
+	sxtw	x28, w27
+	cmp	w27, w0
+	bne	.L864
+	lsl	x0, x28, 1
+	mov	w1, 1
+	add	x24, x22, x0
+	ldrh	w0, [x22, x0]
+	mov	w22, 0
+	bl	FtlGetLastWrittenPage
+	sxth	w26, w0
+	add	w0, w0, 1
+	strh	w0, [x19, 2]
+	ldr	x0, [x29, 128]
+	strh	w27, [x19]
+	ldr	w0, [x0, x28, lsl 2]
+	str	w0, [x19, 48]
+	ldr	x0, [x29, 120]
+	add	x20, x0, :lo12:.LANCHOR148
+.L865:
+	cmp	w22, w26
+	ble	.L867
+.L880:
+	mov	x0, x19
+	bl	ftl_free_no_use_map_blk
+	adrp	x0, .LANCHOR20
+	ldrh	w1, [x19, 2]
+	ldrh	w0, [x0, #:lo12:.LANCHOR20]
+	cmp	w1, w0
+	bne	.L869
+	mov	x0, x19
+	bl	ftl_map_blk_alloc_new_blk
+.L869:
+	mov	x0, x19
+	bl	ftl_map_blk_gc
+	mov	x0, x19
+	bl	ftl_map_blk_gc
 	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 192
+	ldp	x29, x30, [sp], 144
 	ret
-.L1019:
-	ldrh	w0, [x19, 16]
-	mov	w20, 0
-.L1020:
-	cmp	w0, w1
-	beq	.L1021
-	mov	w1, 1
-	bl	FtlGetLastWrittenPage
-	mov	w23, w0
+.L867:
+	ldrh	w0, [x24]
+	mov	w2, 1
+	mov	w1, w2
+	orr	w0, w22, w0, lsl 10
+	str	w0, [x20, 4]
+	mov	x0, x20
+	bl	FlashReadPages
+	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L1022
-	adrp	x1, .LANCHOR91
-	adrp	x2, .LANCHOR3
-	adrp	x20, .LANCHOR120
-	add	x4, x19, 16
-	ldr	x5, [x1, #:lo12:.LANCHOR91]
-	adrp	x1, .LANCHOR23
-	ldr	x0, [x20, #:lo12:.LANCHOR120]
-	mov	w22, 0
-	ldrh	w6, [x1, #:lo12:.LANCHOR23]
-	adrp	x1, .LANCHOR92
-	mov	w10, 65535
-	str	x2, [x29, 152]
-	ldr	x7, [x1, #:lo12:.LANCHOR92]
-	adrp	x1, .LANCHOR24
-	ldrh	w8, [x1, #:lo12:.LANCHOR24]
-	add	x1, x19, 16
-	str	x1, [x29, 168]
-	ldrh	w1, [x2, #:lo12:.LANCHOR3]
-	add	x1, x1, 8
-	add	x1, x19, x1, lsl 1
-.L1023:
-	cmp	x4, x1
-	bne	.L1027
-	mov	w2, 0
-	mov	w1, w22
+	beq	.L866
+	ldrh	w0, [x25, 8]
+	cmp	w23, w0
+	bls	.L866
+	ldrh	w2, [x25]
+	ldrh	w1, [x19, 4]
+	cmp	w2, w1
+	bne	.L866
+	ubfiz	x0, x0, 2, 16
+	ldr	w1, [x20, 4]
+	str	w1, [x21, x0]
+.L866:
+	add	w22, w22, 1
+	sxth	w22, w22
+	b	.L865
+.L864:
+	ldr	x0, [x26, #:lo12:.LANCHOR115]
+	mov	w2, 1
+	str	x0, [x20, 8]
+	lsl	x0, x28, 1
+	ldrh	w1, [x24, #:lo12:.LANCHOR20]
+	add	x28, x22, x0
+	ldrh	w0, [x22, x0]
+	sub	w1, w1, #1
+	orr	w0, w1, w0, lsl 10
+	mov	w1, w2
+	str	w0, [x20, 4]
+	mov	x0, x20
 	bl	FlashReadPages
-	adrp	x0, .LANCHOR71
-	ldr	x4, [x20, #:lo12:.LANCHOR120]
-	and	w10, w23, 65535
-	add	x7, x0, :lo12:.LANCHOR71
-	ldr	w21, [x0, #:lo12:.LANCHOR71]
-	mov	x11, x4
-	mov	w6, 65535
-	mov	w3, 0
-	sub	w21, w21, #1
-	str	x0, [x29, 144]
-.L1028:
-	cmp	w22, w3
-	bne	.L1033
-	add	w22, w23, 1
-	ldr	w0, [x4, 4]
-	and	w22, w22, 65535
-.L1142:
-	lsr	w0, w0, 10
-	bl	P2V_plane
-	and	w27, w0, 65535
-	ldr	x0, [x29, 128]
-	ldrh	w0, [x0, #:lo12:.LANCHOR19]
-	cmp	w0, w22
-	bne	.L1035
-	strh	w22, [x19, 2]
-	strb	wzr, [x19, 6]
-	strh	wzr, [x19, 4]
-.L1035:
-	ldr	w0, [x29, 164]
-	cmp	w22, w26
-	cset	w1, eq
-	cmp	w27, w0
-	cset	w0, eq
-	tst	w1, w0
-	beq	.L1036
-.L1147:
-	mov	w2, w27
-	mov	w1, w22
-	mov	x0, x19
-	bl	ftl_sb_update_avl_pages
-	b	.L1140
-.L1021:
-	add	w20, w20, 1
-	and	w20, w20, 65535
-	add	x0, x19, x20, sxtw 1
-	ldrh	w0, [x0, 16]
-	b	.L1020
-.L1022:
-	cbz	w26, .L1024
-	adrp	x1, .LANCHOR160
+	ldr	w0, [x20]
+	cmn	w0, #1
+	beq	.L882
+	ldrh	w1, [x25]
+	ldrh	w0, [x19, 4]
+	cmp	w1, w0
+	bne	.L882
+	ldrh	w1, [x25, 8]
+	mov	w0, 64245
+	cmp	w1, w0
+	beq	.L871
+.L882:
+	mov	w5, 0
+.L872:
+	ldr	x0, [x29, 112]
+	ldrh	w0, [x0]
+	cmp	w5, w0
+	bge	.L878
+	ldrh	w0, [x28]
+	mov	w2, 1
+	str	w5, [x29, 108]
+	mov	w1, w2
+	orr	w0, w5, w0, lsl 10
+	str	w0, [x20, 4]
+	mov	x0, x20
+	bl	FlashReadPages
+	ldr	w0, [x20]
+	ldr	w5, [x29, 108]
+	cmn	w0, #1
+	beq	.L876
+	ldrh	w0, [x25, 8]
+	cmp	w23, w0
+	bls	.L876
+	ldrh	w2, [x25]
+	ldrh	w1, [x19, 4]
+	cmp	w2, w1
+	bne	.L876
+	ubfiz	x0, x0, 2, 16
+	ldr	w1, [x20, 4]
+	str	w1, [x21, x0]
+.L876:
+	add	w5, w5, 1
+	sxth	w5, w5
+	b	.L872
+.L871:
+	ldrh	w5, [x24, #:lo12:.LANCHOR20]
+	mov	w0, 0
+	ldr	x10, [x26, #:lo12:.LANCHOR115]
+	sub	w5, w5, #1
+.L873:
+	cmp	w0, w5
+	blt	.L875
+.L878:
+	add	w4, w27, 1
+	sxth	w27, w4
+	b	.L863
+.L875:
+	lsl	w2, w0, 1
+	sxtw	x2, w2
+	lsl	x1, x2, 2
+	ldrh	w1, [x10, x1]
+	cmp	w23, w1
+	bls	.L874
+	add	x2, x2, 1
+	ubfiz	x1, x1, 2, 16
+	ldr	w2, [x10, x2, lsl 2]
+	str	w2, [x21, x1]
+.L874:
+	add	w0, w0, 1
+	sxth	w0, w0
+	b	.L873
+	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
+	.section	.text.FtlLoadVonderInfo,"ax",@progbits
+	.align	2
+	.global	FtlLoadVonderInfo
+	.type	FtlLoadVonderInfo, %function
+FtlLoadVonderInfo:
+	stp	x29, x30, [sp, -16]!
+	adrp	x1, .LANCHOR27
+	adrp	x0, .LANCHOR158
+	add	x0, x0, :lo12:.LANCHOR158
+	add	x29, sp, 0
+	ldrh	w1, [x1, #:lo12:.LANCHOR27]
+	strh	w1, [x0, 10]
+	mov	w1, -3962
+	strh	w1, [x0, 4]
+	adrp	x1, .LANCHOR35
+	ldrh	w1, [x1, #:lo12:.LANCHOR35]
+	strh	w1, [x0, 8]
+	adrp	x1, .LANCHOR28
+	ldrh	w1, [x1, #:lo12:.LANCHOR28]
+	strh	w1, [x0, 6]
+	adrp	x1, .LANCHOR36
+	ldr	x1, [x1, #:lo12:.LANCHOR36]
+	str	x1, [x0, 16]
+	adrp	x1, .LANCHOR132
+	ldr	x1, [x1, #:lo12:.LANCHOR132]
+	str	x1, [x0, 24]
+	adrp	x1, .LANCHOR131
+	ldr	x1, [x1, #:lo12:.LANCHOR131]
+	str	x1, [x0, 32]
+	adrp	x1, .LANCHOR133
+	ldr	x1, [x1, #:lo12:.LANCHOR133]
+	str	x1, [x0, 40]
+	bl	FtlMapTblRecovery
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
+	.section	.text.FtlLoadMapInfo,"ax",@progbits
+	.align	2
+	.global	FtlLoadMapInfo
+	.type	FtlLoadMapInfo, %function
+FtlLoadMapInfo:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	bl	FtlL2PDataInit
+	adrp	x0, .LANCHOR140
+	add	x0, x0, :lo12:.LANCHOR140
+	bl	FtlMapTblRecovery
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
+	.section	.text.flush_l2p_region,"ax",@progbits
+	.align	2
+	.global	flush_l2p_region
+	.type	flush_l2p_region, %function
+flush_l2p_region:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR55
+	ubfiz	x19, x0, 4, 16
+	ldr	x0, [x20, #:lo12:.LANCHOR55]
+	add	x1, x0, x19
+	ldr	x2, [x1, 8]
+	ldrh	w1, [x0, x19]
+	adrp	x0, .LANCHOR140
+	add	x0, x0, :lo12:.LANCHOR140
+	bl	FtlMapWritePage
+	ldr	x0, [x20, #:lo12:.LANCHOR55]
+	add	x0, x0, x19
+	ldp	x19, x20, [sp, 16]
+	ldr	w1, [x0, 4]
+	and	w1, w1, 2147483647
+	str	w1, [x0, 4]
+	mov	w0, 0
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	flush_l2p_region, .-flush_l2p_region
+	.section	.text.log2phys,"ax",@progbits
+	.align	2
+	.global	log2phys
+	.type	log2phys, %function
+log2phys:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x25, x26, [sp, 64]
+	mov	w25, w0
+	adrp	x0, .LANCHOR22
+	stp	x23, x24, [sp, 48]
+	stp	x19, x20, [sp, 16]
+	mov	x20, x1
+	ldrh	w24, [x0, #:lo12:.LANCHOR22]
+	adrp	x0, .LANCHOR61
+	stp	x21, x22, [sp, 32]
+	mov	x19, x0
+	ldr	w1, [x0, #:lo12:.LANCHOR61]
+	mov	w21, w2
+	cmp	w25, w1
+	bcc	.L897
+	adrp	x1, .LANCHOR159
 	adrp	x0, .LC1
-	mov	w2, 1755
-	add	x1, x1, :lo12:.LANCHOR160
+	mov	w2, 811
+	add	x1, x1, :lo12:.LANCHOR159
 	add	x0, x0, :lo12:.LC1
 	bl	printf
+.L897:
+	ldr	w0, [x19, #:lo12:.LANCHOR61]
+	cmp	w25, w0
+	bcs	.L898
+	adrp	x23, .LANCHOR55
+	add	w24, w24, 7
+	adrp	x0, .LANCHOR33
+	ldr	x2, [x23, #:lo12:.LANCHOR55]
+	lsr	w22, w25, w24
+	and	w22, w22, 65535
+	ldrh	w1, [x0, #:lo12:.LANCHOR33]
+	mov	x0, 0
+.L899:
+	and	x19, x0, 65535
+	cmp	w19, w1
+	bcc	.L904
+	bl	select_l2p_ram_region
+	and	x19, x0, 65535
+	ldr	x2, [x23, #:lo12:.LANCHOR55]
+	ubfiz	x1, x19, 4, 16
+	mov	w26, w0
+	add	x3, x2, x1
+	ldrh	w2, [x2, x1]
+	mov	w1, 65535
+	cmp	w2, w1
+	beq	.L905
+	ldr	w1, [x3, 4]
+	tbz	w1, #31, .L905
+	bl	flush_l2p_region
+.L905:
+	mov	w1, w26
+	mov	w0, w22
+	bl	load_l2p_region
+	b	.L901
+.L898:
+	mov	w0, -1
+	cbnz	w21, .L896
+	str	w0, [x20]
+.L896:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L904:
+	add	x0, x0, 1
+	add	x3, x2, x0, lsl 4
+	ldrh	w3, [x3, -16]
+	cmp	w3, w22
+	bne	.L899
+.L901:
+	mov	x0, 1
+	ldr	x1, [x23, #:lo12:.LANCHOR55]
+	lsl	x0, x0, x24
+	sub	w0, w0, #1
+	and	w0, w0, w25
+	and	x0, x0, 65535
+	add	x1, x1, x19, lsl 4
+	cbnz	w21, .L902
+	ldr	x1, [x1, 8]
+	ldr	w0, [x1, x0, lsl 2]
+	str	w0, [x20]
+.L903:
+	ldr	x0, [x23, #:lo12:.LANCHOR55]
+	add	x19, x0, x19, lsl 4
+	ldr	w0, [x19, 4]
+	cmn	w0, #1
+	beq	.L907
+	add	w0, w0, 1
+	str	w0, [x19, 4]
+.L907:
+	mov	w0, 0
+	b	.L896
+.L902:
+	ldr	x2, [x1, 8]
+	ldr	w3, [x20]
+	str	w3, [x2, x0, lsl 2]
+	ldr	w0, [x1, 4]
+	orr	w0, w0, -2147483648
+	str	w0, [x1, 4]
+	adrp	x0, .LANCHOR56
+	strh	w22, [x0, #:lo12:.LANCHOR56]
+	b	.L903
+	.size	log2phys, .-log2phys
+	.section	.text.FtlReUsePrevPpa,"ax",@progbits
+	.align	2
+	.global	FtlReUsePrevPpa
+	.type	FtlReUsePrevPpa, %function
+FtlReUsePrevPpa:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR42
+	stp	x19, x20, [sp, 16]
+	mov	w21, w0
+	str	w1, [x29, 76]
+	lsr	w0, w1, 10
+	str	x23, [sp, 48]
+	bl	P2V_block_in_plane
+	ldr	x2, [x22, #:lo12:.LANCHOR42]
+	and	w3, w0, 65535
+	ubfiz	x20, x3, 1, 16
+	ldrh	w1, [x2, x20]
+	cbnz	w1, .L911
+	adrp	x0, .LANCHOR47
+	ldr	x19, [x0, #:lo12:.LANCHOR47]
+	cbz	x19, .L912
+	adrp	x2, .LANCHOR40
+	mov	x5, -6148914691236517206
+	movk	x5, 0xaaab, lsl 0
+	adrp	x23, .LANCHOR48
+	ldr	x2, [x2, #:lo12:.LANCHOR40]
+	mov	w6, 65535
+	ldrh	w4, [x23, #:lo12:.LANCHOR48]
+	sub	x19, x19, x2
+	asr	x19, x19, 1
+	mul	x19, x19, x5
+	mov	w5, 6
+	and	w19, w19, 65535
+.L913:
+	cmp	w1, w4
+	beq	.L912
+	cmp	w19, w3
+	bne	.L914
+	mov	w1, w19
+	add	x0, x0, :lo12:.LANCHOR47
+	bl	List_remove_node
+	ldrh	w0, [x23, #:lo12:.LANCHOR48]
+	cbnz	w0, .L915
+	adrp	x1, .LANCHOR160
+	adrp	x0, .LC1
+	mov	w2, 1699
+	add	x1, x1, :lo12:.LANCHOR160
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L915:
+	ldrh	w0, [x23, #:lo12:.LANCHOR48]
+	sub	w0, w0, #1
+	strh	w0, [x23, #:lo12:.LANCHOR48]
+	mov	w0, w19
+	bl	INSERT_DATA_LIST
+	ldr	x1, [x22, #:lo12:.LANCHOR42]
+	ldrh	w0, [x1, x20]
+	add	w0, w0, 1
+	strh	w0, [x1, x20]
+.L912:
+	add	x1, x29, 76
+	mov	w2, 1
+	mov	w0, w21
+	bl	log2phys
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	ret
+.L914:
+	umull	x19, w19, w5
+	ldrh	w19, [x2, x19]
+	cmp	w19, w6
+	beq	.L912
+	add	w1, w1, 1
+	and	w1, w1, 65535
+	b	.L913
+.L911:
+	add	w1, w1, 1
+	strh	w1, [x2, x20]
+	b	.L912
+	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
+	.section	.text.ftl_check_vpc,"ax",@progbits
+	.align	2
+	.global	ftl_check_vpc
+	.type	ftl_check_vpc, %function
+ftl_check_vpc:
+	stp	x29, x30, [sp, -112]!
+	adrp	x0, .LC94
+	add	x0, x0, :lo12:.LC94
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR61
+	add	x23, x23, :lo12:.LANCHOR61
+	stp	x21, x22, [sp, 32]
+	mov	w22, 0
+	stp	x19, x20, [sp, 16]
+	stp	x25, x26, [sp, 64]
+	adrp	x21, .LANCHOR161
+	stp	x27, x28, [sp, 80]
+	add	x1, x21, :lo12:.LANCHOR161
+	adrp	x20, check_vpc_table
+	bl	printf
+	add	x19, x20, :lo12:check_vpc_table
+	mov	w2, 8192
+	mov	w1, 0
+	mov	x0, x19
+	bl	ftl_memset
+.L922:
+	ldr	w0, [x23]
+	cmp	w22, w0
+	bcc	.L924
+	adrp	x22, .LANCHOR5
+	adrp	x24, .LC95
+	add	x22, x22, :lo12:.LANCHOR5
+	add	x26, x20, :lo12:check_vpc_table
+	add	x24, x24, :lo12:.LC95
+	mov	w23, 0
+	mov	w19, 0
+	adrp	x25, .LANCHOR42
+.L925:
+	ldrh	w0, [x22]
+	cmp	w0, w19
+	bhi	.L927
+	adrp	x0, .LANCHOR47
+	ldr	x19, [x0, #:lo12:.LANCHOR47]
+	cbz	x19, .L928
+	adrp	x0, .LANCHOR48
+	adrp	x25, .LC96
+	add	x20, x20, :lo12:check_vpc_table
+	add	x25, x25, :lo12:.LC96
+	ldrh	w26, [x0, #:lo12:.LANCHOR48]
+	adrp	x0, .LANCHOR40
+	mov	x24, x0
+	mov	w22, 0
+	ldr	x1, [x0, #:lo12:.LANCHOR40]
+	adrp	x27, .LANCHOR42
+	mov	w28, 6
+	sub	x19, x19, x1
+	mov	x1, -6148914691236517206
+	asr	x19, x19, 1
+	movk	x1, 0xaaab, lsl 0
+	mul	x19, x19, x1
+	and	w19, w19, 65535
+.L929:
+	cmp	w22, w26
+	bne	.L931
+.L928:
+	cbz	w23, .L921
+	adrp	x0, .LC1
+	mov	w2, 2343
+	add	x1, x21, :lo12:.LANCHOR161
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L921:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L924:
+	mov	w2, 0
+	add	x1, x29, 108
+	mov	w0, w22
+	bl	log2phys
+	ldr	w0, [x29, 108]
+	cmn	w0, #1
+	beq	.L923
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+	and	x0, x0, 65535
+	ldrh	w1, [x19, x0, lsl 1]
+	add	w1, w1, 1
+	strh	w1, [x19, x0, lsl 1]
+.L923:
+	add	w22, w22, 1
+	b	.L922
+.L927:
+	ldr	x0, [x25, #:lo12:.LANCHOR42]
+	ubfiz	x28, x19, 1, 16
+	sxtw	x27, w19
+	ldrh	w2, [x0, x28]
+	ldrh	w3, [x26, x27, lsl 1]
+	cmp	w2, w3
+	beq	.L926
+	mov	w1, w19
+	mov	x0, x24
+	bl	printf
+	ldr	x0, [x25, #:lo12:.LANCHOR42]
+	mov	w1, 65535
+	ldrh	w0, [x0, x28]
+	cmp	w0, w1
+	beq	.L926
+	ldrh	w1, [x26, x27, lsl 1]
+	cmp	w1, w0
+	csinc	w23, w23, wzr, ls
+.L926:
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L925
+.L931:
+	ldr	x1, [x27, #:lo12:.LANCHOR42]
+	ubfiz	x0, x19, 1, 16
+	ldrh	w2, [x1, x0]
+	cbz	w2, .L930
+	ldrh	w3, [x20, w19, sxtw 1]
+	mov	w23, 1
+	mov	w1, w19
+	mov	x0, x25
+	bl	printf
+.L930:
+	ldr	x0, [x24, #:lo12:.LANCHOR40]
+	umull	x19, w19, w28
+	ldrh	w19, [x0, x19]
+	mov	w0, 65535
+	cmp	w19, w0
+	beq	.L928
+	add	w22, w22, 1
+	and	w22, w22, 65535
+	b	.L929
+	.size	ftl_check_vpc, .-ftl_check_vpc
+	.section	.text.ftl_scan_all_data,"ax",@progbits
+	.align	2
+	.global	ftl_scan_all_data
+	.type	ftl_scan_all_data, %function
+ftl_scan_all_data:
+	sub	sp, sp, #96
+	adrp	x0, .LC97
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC97
+	stp	x29, x30, [sp, 16]
+	add	x29, sp, 16
+	stp	x19, x20, [sp, 32]
+	adrp	x20, .LANCHOR148
+	stp	x21, x22, [sp, 48]
+	mov	w19, 0
+	adrp	x21, .LANCHOR61
+	add	x22, x20, :lo12:.LANCHOR148
+	add	x21, x21, :lo12:.LANCHOR61
+	str	x23, [sp, 64]
+	bl	printf
+.L947:
+	ldr	w0, [x21]
+	cmp	w19, w0
+	bcc	.L953
+	ldp	x19, x20, [sp, 32]
+	ldp	x21, x22, [sp, 48]
+	ldp	x29, x30, [sp, 16]
+	ldr	x23, [sp, 64]
+	add	sp, sp, 96
+	ret
+.L953:
+	mov	w2, 0
+	add	x1, x29, 76
+	mov	w0, w19
+	bl	log2phys
+	tst	x19, 2047
+	bne	.L948
+	ldr	w2, [x29, 76]
+	adrp	x0, .LC98
+	mov	w1, w19
+	add	x0, x0, :lo12:.LC98
+	bl	printf
+.L948:
+	ldr	w1, [x29, 76]
+	cmn	w1, #1
+	beq	.L950
+	add	x0, x20, :lo12:.LANCHOR148
+	str	wzr, [x20, #:lo12:.LANCHOR148]
+	mov	w2, 0
+	str	w1, [x0, 4]
+	adrp	x1, .LANCHOR115
+	str	w19, [x0, 24]
+	ldr	x1, [x1, #:lo12:.LANCHOR115]
+	str	x1, [x0, 8]
+	adrp	x1, .LANCHOR123
+	ldr	x23, [x1, #:lo12:.LANCHOR123]
+	mov	w1, 1
+	str	x23, [x0, 16]
+	bl	FlashReadPages
+	ldr	w0, [x20, #:lo12:.LANCHOR148]
+	cmp	w0, 256
+	ccmn	w0, #1, 4, ne
+	beq	.L951
+	ldr	w0, [x23, 8]
+	cmp	w19, w0
+	beq	.L950
+.L951:
+	ldp	x1, x0, [x22, 8]
+	ldr	w2, [x1, 4]
+	str	w2, [sp]
+	ldr	w2, [x22, 4]
+	ldp	w3, w4, [x0]
+	ldp	w5, w6, [x0, 8]
+	adrp	x0, .LC99
+	ldr	w7, [x1]
+	add	x0, x0, :lo12:.LC99
+	mov	w1, w19
+	bl	printf
+.L950:
+	add	w19, w19, 1
+	b	.L947
+	.size	ftl_scan_all_data, .-ftl_scan_all_data
+	.section	.text.FtlGcScanTempBlk,"ax",@progbits
+	.align	2
+	.global	FtlGcScanTempBlk
+	.type	FtlGcScanTempBlk, %function
+FtlGcScanTempBlk:
+	stp	x29, x30, [sp, -176]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR162
+	stp	x27, x28, [sp, 80]
+	mov	w27, w1
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	ldrh	w28, [x21, #:lo12:.LANCHOR162]
+	mov	w0, 65535
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	cmp	w28, w0
+	beq	.L978
+	cbnz	w28, .L956
+.L957:
+	bl	FtlGcPageVarInit
+	b	.L958
+.L978:
+	mov	w28, 0
+.L956:
+	adrp	x0, .LANCHOR19
+	ldrh	w0, [x0, #:lo12:.LANCHOR19]
+	cmp	w0, w27
+	beq	.L957
+.L958:
+	mov	w24, 0
+.L959:
+	ldrh	w0, [x19]
+	mov	w22, 65535
+	strb	wzr, [x19, 8]
+	cmp	w0, w22
+	beq	.L960
+	adrp	x25, .LANCHOR23
+	add	x0, x25, :lo12:.LANCHOR23
+	str	x0, [x29, 104]
+.L975:
+	adrp	x1, .LANCHOR91
+	adrp	x23, .LANCHOR112
+	add	x5, x19, 16
+	mov	w20, 0
+	ldr	x6, [x1, #:lo12:.LANCHOR91]
+	ldr	x1, [x29, 104]
+	ldr	x0, [x23, #:lo12:.LANCHOR112]
+	ldrh	w7, [x1]
+	adrp	x1, .LANCHOR92
+	ldr	x8, [x1, #:lo12:.LANCHOR92]
+	adrp	x1, .LANCHOR24
+	ldrh	w10, [x1, #:lo12:.LANCHOR24]
+	adrp	x1, .LANCHOR3
+	ldrh	w1, [x1, #:lo12:.LANCHOR3]
+	add	x1, x1, 8
+	add	x1, x19, x1, lsl 1
+.L961:
+	cmp	x1, x5
+	bne	.L963
+	mov	w1, w20
+	mov	w2, 0
+	adrp	x26, .LANCHOR12
+	bl	FlashReadPages
+	add	x26, x26, :lo12:.LANCHOR12
+	ubfiz	x0, x20, 5, 16
+	mov	x20, 0
+	str	x0, [x29, 112]
+.L964:
+	ldr	x0, [x29, 112]
+	cmp	x20, x0
+	bne	.L973
+	add	w3, w28, 1
+	add	w24, w24, 1
+	and	w28, w3, 65535
+	cmp	w27, w24
+	adrp	x1, .LANCHOR19
+	bls	.L974
+.L976:
+	ldrh	w0, [x1, #:lo12:.LANCHOR19]
+	cmp	w0, w28
+	bhi	.L975
+.L960:
+	strh	w28, [x19, 2]
+	mov	w0, -1
+	strb	wzr, [x19, 6]
+	mov	w2, 0
+	strh	w0, [x21, #:lo12:.LANCHOR162]
+	mov	w1, w28
+	mov	x0, x19
+	bl	ftl_sb_update_avl_pages
+	b	.L977
+.L963:
+	ldrh	w4, [x5]
+	cmp	w4, w22
+	beq	.L962
+	ubfiz	x2, x20, 5, 16
+	orr	w4, w28, w4, lsl 10
+	add	x2, x0, x2
+	str	w4, [x2, 4]
+	mul	w4, w20, w7
+	asr	w4, w4, 2
+	add	x4, x6, x4, sxtw 2
+	str	x4, [x2, 8]
+	mul	w4, w20, w10
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	asr	w4, w4, 2
+	add	x4, x8, x4, sxtw 2
+	str	x4, [x2, 16]
+.L962:
+	add	x5, x5, 2
+	b	.L961
+.L973:
+	ldr	x1, [x23, #:lo12:.LANCHOR112]
+	add	x0, x1, x20
+	ldr	w1, [x1, x20]
+	ldr	w2, [x0, 4]
+	str	w2, [x29, 124]
+	cbnz	w1, .L965
+	ldr	x25, [x0, 16]
+	ldrh	w0, [x25]
+	cmp	w0, w22
+	bne	.L966
+.L965:
+	adrp	x0, .LANCHOR42
+	ldrh	w1, [x19]
+	mov	w28, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR42]
+	strh	wzr, [x0, x1, lsl 1]
+	ldrh	w0, [x19]
+	bl	INSERT_FREE_LIST
+	mov	w0, -1
+	strh	w0, [x19]
+	bl	FtlGcPageVarInit
+	b	.L959
+.L966:
+	ldr	w0, [x25, 8]
+	add	x1, x29, 140
+	mov	w2, 0
+	bl	log2phys
+	ldr	w0, [x25, 12]
+	ldr	w1, [x29, 140]
+	cmp	w0, w1
+	beq	.L968
+.L971:
+	ldp	w2, w0, [x25, 8]
+	add	x20, x20, 32
+	ldr	w1, [x29, 124]
+	bl	FtlGcUpdatePage
+	b	.L964
+.L968:
+	str	w0, [x29, 148]
+	adrp	x0, .LANCHOR119
+	mov	w2, 0
+	mov	w1, 1
+	ldr	x0, [x0, #:lo12:.LANCHOR119]
+	str	x0, [x29, 152]
+	adrp	x0, .LANCHOR124
+	ldr	x0, [x0, #:lo12:.LANCHOR124]
+	str	x0, [x29, 160]
+	add	x0, x29, 144
+	bl	FlashReadPages
+	ldrh	w1, [x26]
+	mov	x0, 0
+	ldr	x2, [x23, #:lo12:.LANCHOR112]
+	ldr	x6, [x29, 152]
+	add	x2, x2, x20
+	ubfiz	x1, x1, 9, 16
+.L969:
+	cmp	x0, x1
+	beq	.L971
+	ldr	x7, [x2, 8]
+	ldr	w8, [x7, x0]
+	add	x0, x0, 4
+	add	x7, x6, x0
+	ldr	w7, [x7, -4]
+	cmp	w8, w7
+	beq	.L969
+	ldrh	w1, [x19]
+	adrp	x0, .LC100
+	ldr	w2, [x29, 148]
+	add	x0, x0, :lo12:.LC100
+	bl	printf
+	b	.L965
+.L974:
+	ldrh	w0, [x21, #:lo12:.LANCHOR162]
+	cmp	w0, w22
+	beq	.L976
+	add	w0, w0, w24
+	strh	w0, [x21, #:lo12:.LANCHOR162]
+	ldrh	w0, [x1, #:lo12:.LANCHOR19]
+	cmp	w0, w28
+	bls	.L976
+.L977:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, -1
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 176
+	ret
+	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
+	.section	.text.FtlReadRefresh,"ax",@progbits
+	.align	2
+	.global	FtlReadRefresh
+	.type	FtlReadRefresh, %function
+FtlReadRefresh:
+	adrp	x1, .LANCHOR81
+	add	x0, x1, :lo12:.LANCHOR81
+	ldr	w2, [x0, 80]
+	cbz	w2, .L986
+	adrp	x1, .LANCHOR61
+	ldr	w3, [x0, 84]
+	ldr	w2, [x1, #:lo12:.LANCHOR61]
+	cmp	w3, w2
+	bcs	.L987
+	stp	x29, x30, [sp, -160]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	add	x20, x1, :lo12:.LANCHOR61
+	str	x21, [sp, 32]
+	mov	w21, 2048
+.L992:
+	ldr	w0, [x19, 84]
+	ldr	w1, [x20]
+	cmp	w0, w1
+	bcs	.L989
+	add	x1, x29, 60
+	mov	w2, 0
+	bl	log2phys
+	ldr	w0, [x19, 84]
+	ldr	w1, [x29, 60]
+	add	w0, w0, 1
+	str	w0, [x19, 84]
+	cmn	w1, #1
+	beq	.L990
+	str	w0, [x29, 88]
+	adrp	x0, .LANCHOR121
+	str	w1, [x29, 68]
+	mov	w2, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR121]
+	mov	w1, 1
+	str	x0, [x29, 72]
+	add	x0, x29, 96
+	str	x0, [x29, 80]
+	add	x0, x29, 160
+	str	wzr, [x0, -96]!
+	bl	FlashReadPages
+	ldr	w0, [x29, 64]
+	cmp	w0, 256
+	bne	.L989
+	ldr	w0, [x29, 60]
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+	bl	FtlGcRefreshBlock
+.L989:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, -1
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 160
+	ret
+.L990:
+	subs	w21, w21, #1
+	bne	.L992
+	b	.L989
+.L987:
+	adrp	x1, .LANCHOR62
+	str	wzr, [x0, 84]
+	ldr	w1, [x1, #:lo12:.LANCHOR62]
+	stp	w1, wzr, [x0, 76]
+.L996:
+	mov	w0, 0
+	ret
+.L986:
+	ldr	w4, [x0, 76]
+	adrp	x0, .LANCHOR62
+	ldr	w2, [x0, #:lo12:.LANCHOR62]
+	add	w0, w2, 1048576
+	cmp	w4, w0
+	bhi	.L995
+	adrp	x0, .LANCHOR76
+	ldr	w0, [x0, #:lo12:.LANCHOR76]
+	lsr	w3, w0, 10
+	mov	w0, 33554432
+	asr	w0, w0, w3
+	add	w0, w0, w4
+	cmp	w2, w0
+	bhi	.L995
+	adrp	x0, .LANCHOR39+28
+	ldrb	w0, [x0, #:lo12:.LANCHOR39+28]
+	cbnz	w0, .L996
+.L995:
+	add	x0, x1, :lo12:.LANCHOR81
+	mov	w1, 1
+	str	wzr, [x0, 84]
+	stp	w2, w1, [x0, 76]
+	b	.L996
+	.size	FtlReadRefresh, .-FtlReadRefresh
+	.section	.text.FtlMapBlkWriteDump_data,"ax",@progbits
+	.align	2
+	.global	FtlMapBlkWriteDump_data
+	.type	FtlMapBlkWriteDump_data, %function
+FtlMapBlkWriteDump_data:
+	ldr	w1, [x0, 56]
+	cbz	w1, .L1002
+	stp	x29, x30, [sp, -48]!
+	adrp	x1, .LANCHOR148
+	adrp	x2, .LANCHOR123
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	ldrh	w20, [x0, 6]
+	adrp	x0, .LANCHOR116
+	ldr	x2, [x2, #:lo12:.LANCHOR123]
+	ldr	x3, [x0, #:lo12:.LANCHOR116]
+	add	x0, x1, :lo12:.LANCHOR148
+	sub	w20, w20, #1
+	ldr	x4, [x19, 40]
+	and	w20, w20, 65535
+	str	x21, [sp, 32]
+	stp	x3, x2, [x0, 8]
+	ubfiz	x2, x20, 2, 16
+	str	wzr, [x19, 56]
+	mov	x21, x1
+	ldr	w2, [x4, x2]
+	str	w2, [x0, 4]
+	cbz	w2, .L1004
+	mov	w2, 1
+	mov	w1, w2
+	bl	FlashReadPages
+.L1005:
+	add	x1, x21, :lo12:.LANCHOR148
+	mov	x0, x19
+	ldr	x21, [sp, 32]
+	ldr	x2, [x1, 8]
+	mov	w1, w20
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	b	FtlMapWritePage
+.L1004:
+	adrp	x0, .LANCHOR23
+	mov	w1, 255
+	ldrh	w2, [x0, #:lo12:.LANCHOR23]
+	mov	x0, x3
+	bl	ftl_memset
+	b	.L1005
+.L1002:
+	ret
+	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
+	.section	.text.FlashTestBlk,"ax",@progbits
+	.align	2
+	.global	FlashTestBlk
+	.type	FlashTestBlk, %function
+FlashTestBlk:
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w19, w0, 65535
+	cmp	w19, 11
+	bls	.L1011
+	adrp	x20, .LANCHOR121
+	mov	w2, 32
+	mov	w1, 165
+	lsl	w19, w19, 10
+	ldr	x0, [x20, #:lo12:.LANCHOR121]
+	str	x0, [x29, 40]
+	add	x0, x29, 64
+	str	x0, [x29, 48]
+	bl	ftl_memset
+	ldr	x0, [x20, #:lo12:.LANCHOR121]
+	mov	w2, 8
+	mov	w1, 90
+	bl	ftl_memset
+	str	w19, [x29, 36]
+	mov	w2, 1
+	add	x0, x29, 32
+	mov	w1, w2
+	bl	FlashEraseBlocks
+	mov	w3, 1
+	add	x0, x29, 32
+	mov	w2, w3
+	mov	w1, w3
+	bl	FlashProgPages
+	ldr	w0, [x29, 32]
+	mov	w2, 1
+	mov	w1, 0
+	cmp	w0, 0
+	add	x0, x29, 32
+	csetm	w19, ne
+	bl	FlashEraseBlocks
+.L1009:
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 128
+	ret
+.L1011:
+	mov	w19, 0
+	b	.L1009
+	.size	FlashTestBlk, .-FlashTestBlk
+	.section	.text.FtlBbmTblFlush,"ax",@progbits
+	.align	2
+	.global	FtlBbmTblFlush
+	.type	FtlBbmTblFlush, %function
+FtlBbmTblFlush:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR123
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR148
+	stp	x21, x22, [sp, 32]
+	add	x19, x20, :lo12:.LANCHOR148
+	adrp	x22, .LANCHOR115
+	ldr	x1, [x23, #:lo12:.LANCHOR123]
+	stp	x25, x26, [sp, 64]
+	adrp	x21, .LANCHOR37
+	str	x27, [sp, 80]
+	add	x25, x21, :lo12:.LANCHOR37
+	ldr	x0, [x22, #:lo12:.LANCHOR115]
+	adrp	x26, .LANCHOR10
+	stp	x0, x1, [x19, 8]
+	adrp	x1, .LANCHOR23
+	adrp	x27, .LANCHOR137
+	add	x25, x25, 32
+	ldrh	w2, [x1, #:lo12:.LANCHOR23]
+	mov	w24, 0
+	add	x26, x26, :lo12:.LANCHOR10
+	add	x27, x27, :lo12:.LANCHOR137
+	mov	w1, 0
+	bl	ftl_memset
+.L1014:
+	ldrh	w0, [x26]
+	cmp	w24, w0
+	blt	.L1015
+	add	x20, x20, :lo12:.LANCHOR148
+	add	x19, x21, :lo12:.LANCHOR37
+	mov	w2, 16
+	mov	w1, 255
+	adrp	x24, .LC101
+	adrp	x26, .LANCHOR20
+	ldr	x27, [x20, 16]
+	add	x24, x24, :lo12:.LC101
+	add	x26, x26, :lo12:.LANCHOR20
+	mov	w25, 0
+	mov	x0, x27
+	bl	ftl_memset
+	mov	w0, -3887
+	strh	w0, [x27]
+	ldr	w0, [x19, 8]
+	str	w0, [x27, 4]
+	ldrh	w0, [x21, #:lo12:.LANCHOR37]
+	mov	w21, 0
+	strh	w0, [x27, 2]
+	ldrh	w0, [x19, 4]
+	strh	w0, [x27, 8]
+	ldrh	w0, [x19, 6]
+	strh	w0, [x27, 10]
+	adrp	x0, .LANCHOR2
+	ldr	w0, [x0, #:lo12:.LANCHOR2]
+	strh	w0, [x27, 12]
+.L1016:
+	ldrh	w1, [x19]
+	ldrh	w4, [x27, 10]
+	ldrh	w2, [x19, 2]
+	ldrh	w3, [x19, 4]
+	ldr	x0, [x22, #:lo12:.LANCHOR115]
+	str	x0, [x20, 8]
+	ldr	x0, [x23, #:lo12:.LANCHOR123]
+	str	x0, [x20, 16]
+	orr	w0, w2, w1, lsl 10
+	str	wzr, [x20]
+	str	w0, [x20, 4]
+	mov	x0, x24
+	bl	printf
+	ldrh	w0, [x26]
+	ldrh	w1, [x19, 2]
+	sub	w0, w0, #1
+	cmp	w1, w0
+	blt	.L1017
+	ldr	w0, [x19, 8]
+	mov	w2, 1
+	ldrh	w1, [x19, 4]
+	add	w0, w0, 1
+	str	w0, [x19, 8]
+	str	w0, [x27, 4]
+	ldrh	w0, [x19]
+	strh	w0, [x27, 8]
+	strh	w0, [x19, 4]
+	adrp	x0, .LANCHOR106
+	strh	w1, [x19]
+	lsl	w1, w1, 10
+	ldr	x0, [x0, #:lo12:.LANCHOR106]
+	str	w1, [x20, 4]
+	strh	wzr, [x19, 2]
+	str	w1, [x0, 4]
+	mov	w1, w2
+	bl	FlashEraseBlocks
+.L1017:
+	mov	w3, 1
+	mov	x0, x20
+	mov	w2, w3
+	mov	w1, w3
+	bl	FlashProgPages
+	ldrh	w0, [x19, 2]
+	add	w0, w0, 1
+	strh	w0, [x19, 2]
+	ldr	w0, [x20]
+	cmn	w0, #1
+	bne	.L1018
+	ldr	w1, [x20, 4]
+	add	w21, w21, 1
+	adrp	x0, .LC102
+	and	w21, w21, 65535
+	add	x0, x0, :lo12:.LC102
+	bl	printf
+	cmp	w21, 3
+	bls	.L1016
+	ldr	w1, [x20, 4]
+	adrp	x0, .LC103
+	mov	w2, w21
+	add	x0, x0, :lo12:.LC103
+	bl	printf
+.L1020:
+	b	.L1020
+.L1015:
+	ldrh	w2, [x27]
+	ldr	x1, [x25], 8
+	ldr	x0, [x19, 8]
+	mul	w3, w24, w2
+	lsl	w2, w2, 2
+	add	w24, w24, 1
+	add	x0, x0, x3, sxtw 2
+	bl	ftl_memcpy
+	b	.L1014
+.L1021:
+	mov	w25, 1
+	b	.L1016
+.L1018:
+	cbz	w25, .L1021
+	mov	w0, 0
+	ldr	x27, [sp, 80]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	ret
+	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
+	.section	.text.allocate_data_superblock,"ax",@progbits
+	.align	2
+	.global	allocate_data_superblock
+	.type	allocate_data_superblock, %function
+allocate_data_superblock:
+	stp	x29, x30, [sp, -112]!
+	add	x29, sp, 0
+	stp	x27, x28, [sp, 80]
+	adrp	x28, .LANCHOR48
+	stp	x23, x24, [sp, 48]
+	add	x24, x28, :lo12:.LANCHOR48
+	stp	x19, x20, [sp, 16]
+	adrp	x27, .LANCHOR45
+	mov	x19, x0
+	stp	x21, x22, [sp, 32]
+	add	x0, x27, :lo12:.LANCHOR45
+	stp	x25, x26, [sp, 64]
+	str	x0, [x29, 104]
 .L1024:
-	ldr	w0, [x29, 164]
-	cmp	w0, 0
-	ccmp	w20, w0, 4, ne
-	beq	.L1025
-	adrp	x1, .LANCHOR160
+	ldr	x1, [x29, 104]
+	adrp	x23, .LANCHOR5
+	ldrh	w0, [x28, #:lo12:.LANCHOR48]
+	ldrh	w1, [x1]
+	add	w0, w0, w1
+	ldrh	w1, [x23, #:lo12:.LANCHOR5]
+	cmp	w0, w1
+	ble	.L1025
+	adrp	x1, .LANCHOR163
 	adrp	x0, .LC1
-	mov	w2, 1756
-	add	x1, x1, :lo12:.LANCHOR160
+	mov	w2, 2615
+	add	x1, x1, :lo12:.LANCHOR163
 	add	x0, x0, :lo12:.LC1
 	bl	printf
 .L1025:
-	strh	wzr, [x19, 2]
-	b	.L1146
-.L1027:
-	ldrh	w3, [x4]
-	cmp	w3, w10
+	adrp	x0, .LANCHOR53
+	add	x0, x0, :lo12:.LANCHOR53
+	cmp	x19, x0
+	bne	.L1051
+	adrp	x1, .LANCHOR87
+	ldrh	w0, [x24]
+	ldr	w1, [x1, #:lo12:.LANCHOR87]
+	mul	w1, w0, w1
+	lsr	w0, w0, 1
+	add	w0, w0, 1
+	add	w1, w0, w1, lsr 2
+	ands	w1, w1, 65535
 	beq	.L1026
-	ubfiz	x2, x22, 5, 16
-	orr	w3, w23, w3, lsl 10
-	add	x2, x0, x2
-	str	w3, [x2, 4]
-	mul	w3, w22, w6
-	asr	w3, w3, 2
-	add	x3, x5, x3, sxtw 2
-	str	x3, [x2, 8]
-	mul	w3, w22, w8
-	add	w22, w22, 1
-	and	w22, w22, 65535
-	asr	w3, w3, 2
-	add	x3, x7, x3, sxtw 2
-	str	x3, [x2, 16]
+	sub	w1, w1, #1
+	and	w1, w1, 65535
 .L1026:
-	add	x4, x4, 2
-	b	.L1023
-.L1033:
-	ldr	w0, [x11]
+	adrp	x0, .LANCHOR47
+	add	x0, x0, :lo12:.LANCHOR47
+	bl	List_pop_index_node
+	and	w22, w0, 65535
+	ldrh	w0, [x24]
+	cbnz	w0, .L1027
+	adrp	x1, .LANCHOR163
+	adrp	x0, .LC1
+	mov	w2, 2624
+	add	x1, x1, :lo12:.LANCHOR163
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L1027:
+	ldrh	w0, [x24]
+	sub	w0, w0, #1
+	strh	w0, [x24]
+	ldrh	w0, [x23, #:lo12:.LANCHOR5]
+	cmp	w0, w22
+	bls	.L1024
+	adrp	x25, .LANCHOR42
+	ubfiz	x20, x22, 1, 16
+	ldr	x0, [x25, #:lo12:.LANCHOR42]
+	ldrh	w21, [x0, x20]
+	cbnz	w21, .L1024
+	strh	w22, [x19]
+	mov	x0, x19
+	bl	make_superblock
+	ldrb	w0, [x19, 7]
 	cbnz	w0, .L1029
-	ldr	x8, [x11, 16]
-	ldr	w5, [x8, 4]
-	cmn	w5, #1
-	beq	.L1030
-	ldr	w1, [x7]
-	mov	w0, w5
-	bl	ftl_cmp_data_ver
-	cbz	w0, .L1030
-	add	w5, w5, 1
-	str	w5, [x7]
-.L1030:
-	ldr	w0, [x8]
-	cmn	w0, #1
-	bne	.L1032
-	ubfiz	x3, x3, 5, 16
-	and	w22, w23, 65535
-	add	x3, x4, x3
-	ldr	w0, [x3, 4]
-	b	.L1142
+	ldr	x0, [x25, #:lo12:.LANCHOR42]
+	mov	w1, -1
+	strh	w1, [x0, x20]
+	mov	w0, w22
+	bl	INSERT_DATA_LIST
+	ldrh	w1, [x27, #:lo12:.LANCHOR45]
+	ldrh	w0, [x24]
+	add	w0, w0, w1
+	ldrh	w1, [x23, #:lo12:.LANCHOR5]
+	cmp	w0, w1
+	ble	.L1024
+	mov	w2, 2638
+	adrp	x1, .LANCHOR163
+	adrp	x0, .LC1
+	add	x1, x1, :lo12:.LANCHOR163
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+	b	.L1024
+.L1051:
+	mov	w1, 0
+	b	.L1026
 .L1029:
-	mov	w6, w10
+	ldrh	w1, [x27, #:lo12:.LANCHOR45]
+	ldrh	w0, [x24]
+	add	w0, w0, w1
+	ldrh	w1, [x23, #:lo12:.LANCHOR5]
+	cmp	w0, w1
+	ble	.L1031
+	adrp	x1, .LANCHOR163
+	adrp	x0, .LC1
+	mov	w2, 2641
+	add	x1, x1, :lo12:.LANCHOR163
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L1031:
+	adrp	x0, .LANCHOR3
+	adrp	x25, .LANCHOR106
+	add	x26, x19, 16
+	mov	w6, 65535
+	ldrh	w0, [x0, #:lo12:.LANCHOR3]
+	mov	x4, x26
+	ldr	x3, [x25, #:lo12:.LANCHOR106]
+	ubfiz	x0, x0, 5, 16
+	add	x1, x3, 8
+	add	x0, x0, 8
+	add	x0, x3, x0
 .L1032:
-	add	w3, w3, 1
-	add	x11, x11, 32
-	and	w3, w3, 65535
-	b	.L1028
+	cmp	x0, x1
+	bne	.L1034
+	cbnz	w21, .L1035
+	adrp	x1, .LANCHOR163
+	adrp	x0, .LC1
+	mov	w2, 2652
+	add	x1, x1, :lo12:.LANCHOR163
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L1035:
+	adrp	x0, .LANCHOR80
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	cmp	w0, w22
+	bne	.L1036
+	adrp	x1, .LANCHOR163
+	adrp	x0, .LC1
+	mov	w2, 2654
+	add	x1, x1, :lo12:.LANCHOR163
+	add	x0, x0, :lo12:.LC1
+	bl	printf
 .L1036:
-	mov	w0, 65535
-	cmp	w6, w0
-	bne	.L1037
 	ldrb	w0, [x19, 8]
-	cbnz	w0, .L1038
-.L1037:
-	adrp	x25, .LANCHOR153
-	and	w28, w23, 65535
-	ldr	w0, [x25, #:lo12:.LANCHOR153]
-	cmn	w0, #1
-	bne	.L1039
-	str	w21, [x25, #:lo12:.LANCHOR153]
-.L1039:
-	add	w0, w26, 7
-	cmp	w0, w23, uxth
-	bge	.L1089
-	sub	w24, w28, #7
-	and	w24, w24, 65535
+	adrp	x6, .LANCHOR43
+	adrp	x7, .LANCHOR14
+	adrp	x5, .LANCHOR72
+	adrp	x4, .LANCHOR73
+	ldr	x1, [x6, #:lo12:.LANCHOR43]
+	cbnz	w0, .L1037
+	ldrh	w0, [x1, x20]
+	cbz	w0, .L1038
+	ldrh	w2, [x7, #:lo12:.LANCHOR14]
+	add	w0, w0, w2
+.L1062:
+	strh	w0, [x1, x20]
+	mov	w1, 0
+	ldr	w0, [x5, #:lo12:.LANCHOR72]
+	add	w0, w0, 1
+	str	w0, [x5, #:lo12:.LANCHOR72]
+	mov	w0, w22
+	bl	ftl_set_blk_mode
 .L1040:
-	ldr	x0, [x29, 152]
-	mov	w3, 65535
-	mov	w5, 1
-	add	x4, x0, :lo12:.LANCHOR3
+	ldr	x0, [x6, #:lo12:.LANCHOR43]
+	ldrh	w1, [x0, x20]
+	adrp	x0, .LANCHOR76
+	ldr	w2, [x0, #:lo12:.LANCHOR76]
+	cmp	w1, w2
+	bls	.L1041
+	str	w1, [x0, #:lo12:.LANCHOR76]
 .L1041:
-	cmp	w24, w28
-	bhi	.L1051
-	ldrh	w1, [x4]
-	mov	w23, 0
-	ldr	x0, [x20, #:lo12:.LANCHOR120]
-	add	x1, x1, 8
-	ldr	x2, [x29, 168]
-	add	x1, x19, x1, lsl 1
-	b	.L1052
-.L1089:
-	mov	w24, w26
-	b	.L1040
-.L1043:
-	ldrh	w6, [x2]
-	cmp	w6, w3
-	beq	.L1042
-	ubfiz	x7, x23, 5, 16
-	add	w23, w23, 1
-	add	x7, x0, x7
-	and	w23, w23, 65535
-	orr	w6, w24, w6, lsl 10
-	str	w6, [x7, 4]
+	ldr	w2, [x5, #:lo12:.LANCHOR72]
+	ldr	w1, [x4, #:lo12:.LANCHOR73]
+	ldrh	w0, [x7, #:lo12:.LANCHOR14]
+	madd	w0, w0, w2, w1
+	ldrh	w1, [x23, #:lo12:.LANCHOR5]
+	udiv	w0, w0, w1
+	adrp	x1, .LANCHOR74
+	str	w0, [x1, #:lo12:.LANCHOR74]
+	adrp	x0, .LANCHOR127
+	ldr	x1, [x0, #:lo12:.LANCHOR127]
+	ldr	w0, [x1, 16]
+	add	w0, w0, 1
+	str	w0, [x1, 16]
+	ldr	x0, [x25, #:lo12:.LANCHOR106]
+	ubfiz	x1, x21, 5, 16
+	add	x1, x1, 4
+	add	x2, x0, 4
+	add	x1, x0, x1
 .L1042:
-	add	x2, x2, 2
-.L1052:
-	cmp	x2, x1
+	cmp	x1, x2
 	bne	.L1043
-	mov	w1, w23
-	mov	w2, 0
-	str	w5, [x29, 112]
-	ubfiz	x23, x23, 5, 16
-	str	w3, [x29, 120]
-	add	x23, x23, 16
-	str	x4, [x29, 136]
-	bl	FlashReadPages
-	ldr	x2, [x20, #:lo12:.LANCHOR120]
-	ldr	w1, [x25, #:lo12:.LANCHOR153]
-	ldr	w5, [x29, 112]
-	add	x0, x2, 16
-	ldr	w3, [x29, 120]
-	add	x23, x2, x23
-	ldr	x4, [x29, 136]
-	mov	w2, 0
+	ldrb	w1, [x19, 8]
+	mov	w2, w21
+	mov	x23, 0
+	bl	FlashEraseBlocks
+	mov	w1, 0
 .L1044:
-	cmp	x23, x0
-	bne	.L1049
-	cbz	w2, .L1050
-	str	w1, [x25, #:lo12:.LANCHOR153]
-.L1050:
-	add	w24, w24, 1
-	and	w24, w24, 65535
-	b	.L1041
-.L1049:
-	ldr	w6, [x0, -16]
-	cbz	w6, .L1045
-	cbz	w2, .L1038
-	str	w1, [x25, #:lo12:.LANCHOR153]
+	cmp	w21, w23, uxth
+	bhi	.L1046
+	cbz	w1, .L1047
+	mov	w0, w22
+	bl	update_multiplier_value
+	bl	FtlBbmTblFlush
+.L1047:
+	ldrb	w0, [x19, 7]
+	cbnz	w0, .L1048
+	adrp	x0, .LANCHOR42
+	mov	w1, -1
+	ldr	x0, [x0, #:lo12:.LANCHOR42]
+	strh	w1, [x0, x20]
+	b	.L1024
+.L1034:
+	ldrh	w2, [x4]
+	stp	xzr, xzr, [x1]
+	cmp	w2, w6
+	beq	.L1033
+	ubfiz	x5, x21, 5, 16
+	add	w21, w21, 1
+	add	x5, x3, x5
+	and	w21, w21, 65535
+	lsl	w2, w2, 10
+	str	w2, [x5, 4]
+.L1033:
+	add	x1, x1, 32
+	add	x4, x4, 2
+	b	.L1032
 .L1038:
-	mov	w1, 1
-	adrp	x0, .LANCHOR161
-	mov	w23, w26
-	adrp	x28, .LANCHOR153
-	strh	w1, [x0, #:lo12:.LANCHOR161]
-	adrp	x0, .LANCHOR144
-	add	x0, x0, :lo12:.LANCHOR144
-	bl	FtlMapBlkWriteDump_data
-	add	x0, x28, :lo12:.LANCHOR153
-	str	x0, [x29, 104]
-.L1053:
-	ldr	x1, [x29, 152]
-	mov	w24, 0
-	ldr	x0, [x20, #:lo12:.LANCHOR120]
-	mov	w5, 65535
-	ldr	x2, [x29, 168]
-	ldrh	w1, [x1, #:lo12:.LANCHOR3]
-	add	x1, x1, 8
-	add	x1, x19, x1, lsl 1
-.L1054:
-	cmp	x1, x2
-	bne	.L1056
-	mov	w2, 0
-	mov	w1, w24
-	bl	FlashReadPages
-	mov	x25, 0
-	ubfiz	x0, x24, 5, 16
-	str	x0, [x29, 112]
-	adrp	x0, .LANCHOR162
-	add	x0, x0, :lo12:.LANCHOR162
-	str	x0, [x29, 120]
-.L1057:
-	ldr	x0, [x29, 112]
-	cmp	x25, x0
-	bne	.L1083
-	ldr	x0, [x29, 128]
-	add	w23, w23, 1
-	and	w23, w23, 65535
-	ldrh	w0, [x0, #:lo12:.LANCHOR19]
-	cmp	w0, w23
-	bne	.L1053
-	ldr	x0, [x29, 152]
-	mov	w2, 65535
-	strh	w23, [x19, 2]
-	strh	wzr, [x19, 4]
-	ldrh	w1, [x0, #:lo12:.LANCHOR3]
-	mov	w0, 0
-.L1084:
-	cmp	w0, w1
-	beq	.L1140
-	ldr	x4, [x29, 168]
-	ldrh	w3, [x4], 2
-	str	x4, [x29, 168]
-	cmp	w3, w2
-	beq	.L1085
-	strb	w0, [x19, 6]
-	b	.L1140
+	mov	w0, 2
+	b	.L1062
+.L1037:
+	ldrh	w0, [x1, x20]
+	add	w0, w0, 1
+	strh	w0, [x1, x20]
+	ldr	w0, [x4, #:lo12:.LANCHOR73]
+	add	w0, w0, 1
+	str	w0, [x4, #:lo12:.LANCHOR73]
+	mov	w0, w22
+	bl	ftl_set_blk_mode.part.6
+	b	.L1040
+.L1043:
+	ldr	w3, [x2]
+	and	w3, w3, -1024
+	str	w3, [x2], 32
+	b	.L1042
+.L1046:
+	ldr	x2, [x25, #:lo12:.LANCHOR106]
+	lsl	x0, x23, 5
+	add	x3, x2, x0
+	ldr	w2, [x2, x0]
+	cmn	w2, #1
+	bne	.L1045
+	add	w1, w1, 1
+	ldr	w0, [x3, 4]
+	stp	w2, w1, [x29, 96]
+	lsr	w0, w0, 10
+	bl	FtlBbmMapBadBlock
+	ldp	w2, w1, [x29, 96]
+	strh	w2, [x26]
+	ldrb	w0, [x19, 7]
+	sub	w0, w0, #1
+	strb	w0, [x19, 7]
 .L1045:
-	ldr	x6, [x0]
-	ldrh	w7, [x6]
-	cmp	w7, w3
-	beq	.L1048
-	ldr	w6, [x6, 4]
-	cmn	w6, #1
-	csel	w1, w1, w6, eq
-	csel	w2, w2, w5, eq
-.L1048:
-	add	x0, x0, 32
+	add	x23, x23, 1
+	add	x26, x26, 2
 	b	.L1044
-.L1051:
-	mov	w0, -1
-	str	w0, [x25, #:lo12:.LANCHOR153]
-	b	.L1038
-.L1056:
-	ldrh	w3, [x2]
-	cmp	w3, w5
-	beq	.L1055
-	ubfiz	x4, x24, 5, 16
-	add	w24, w24, 1
-	add	x4, x0, x4
-	and	w24, w24, 65535
-	orr	w3, w23, w3, lsl 10
-	str	w3, [x4, 4]
-.L1055:
-	add	x2, x2, 2
-	b	.L1054
-.L1083:
-	ldr	x4, [x20, #:lo12:.LANCHOR120]
-	add	x4, x4, x25
-	ldr	w5, [x4, 4]
-	str	w5, [x29, 188]
-	lsr	w0, w5, 10
-	bl	P2V_plane
+.L1048:
+	adrp	x1, .LANCHOR19
+	adrp	x2, .LANCHOR70
+	strh	wzr, [x19, 2]
+	ldrh	w1, [x1, #:lo12:.LANCHOR19]
+	strh	w22, [x19]
+	strb	wzr, [x19, 6]
+	mul	w0, w0, w1
+	ldr	w1, [x2, #:lo12:.LANCHOR70]
+	str	w1, [x19, 12]
+	add	w1, w1, 1
+	str	w1, [x2, #:lo12:.LANCHOR70]
+	adrp	x1, .LANCHOR42
 	and	w0, w0, 65535
-	cmp	w23, w26
-	bcc	.L1058
-	ldr	w1, [x29, 164]
-	ccmp	w1, w0, 0, eq
-	bhi	.L1058
-	cmp	w23, w22
-	ccmp	w27, w0, 0, eq
-	beq	.L1059
-	ldr	w0, [x4]
-	cmn	w0, #1
-	beq	.L1060
-	ldr	x3, [x4, 16]
-	mov	w0, 61589
-	ldrh	w1, [x3]
-	cmp	w1, w0
-	beq	.L1061
-.L1067:
-	ldrh	w0, [x19]
-.L1145:
-	bl	decrement_vpc_count
-.L1058:
-	add	x25, x25, 32
-	b	.L1057
-.L1061:
-	ldr	w21, [x3, 4]
-	cmn	w21, #1
-	beq	.L1062
-	ldr	x0, [x29, 144]
-	ldr	w1, [x0, #:lo12:.LANCHOR71]
-	mov	w0, w21
-	bl	ftl_cmp_data_ver
-	cbz	w0, .L1062
-	ldr	x1, [x29, 144]
-	add	w0, w21, 1
-	str	w0, [x1, #:lo12:.LANCHOR71]
-.L1062:
-	ldp	w24, w0, [x3, 8]
-	add	x1, x29, 184
-	str	w0, [x29, 180]
-	mov	w2, 0
-	mov	w0, w24
-	bl	log2phys
-	ldr	w1, [x28, #:lo12:.LANCHOR153]
-	cmn	w1, #1
-	beq	.L1063
-	mov	w0, w21
-	bl	ftl_cmp_data_ver
-	cbz	w0, .L1063
-	ldr	w1, [x29, 180]
-	cmn	w1, #1
-	beq	.L1064
-	ldr	x0, [x20, #:lo12:.LANCHOR120]
-	mov	w2, 0
-	add	x0, x0, x25
-	ldr	x3, [x0, 16]
-	str	w1, [x0, 4]
-	mov	w1, 1
-	str	x3, [x29, 136]
-	bl	FlashReadPages
-	ldr	x0, [x20, #:lo12:.LANCHOR120]
-	ldr	x3, [x29, 136]
-	add	x4, x0, x25
-	ldr	w0, [x0, x25]
-	cmn	w0, #1
-	bne	.L1065
-.L1066:
-	mov	w0, -1
-	str	w0, [x29, 180]
-	ldrh	w0, [x19]
-	bl	decrement_vpc_count
-.L1074:
-	ldr	w3, [x29, 180]
-	cmn	w3, #1
-	beq	.L1058
-.L1088:
-	lsr	w0, w3, 10
-	bl	P2V_block_in_plane
-	and	w24, w0, 65535
-	adrp	x0, .LANCHOR5
-	mov	w3, w24
-	ldrh	w0, [x0, #:lo12:.LANCHOR5]
-	cmp	w0, w24
-	bhi	.L1079
-	mov	w2, 2006
-	adrp	x1, .LANCHOR160
+	strh	w0, [x19, 4]
+	ldr	x1, [x1, #:lo12:.LANCHOR42]
+	strh	w0, [x1, x20]
+	ldrh	w0, [x19, 4]
+	cbz	w0, .L1049
+	ldrb	w0, [x19, 7]
+	cbnz	w0, .L1050
+.L1049:
+	adrp	x1, .LANCHOR163
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR160
+	mov	w2, 2707
+	add	x1, x1, :lo12:.LANCHOR163
 	add	x0, x0, :lo12:.LC1
-	str	w24, [x29, 136]
 	bl	printf
-	ldr	w3, [x29, 136]
-.L1079:
+.L1050:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+	.size	allocate_data_superblock, .-allocate_data_superblock
+	.section	.text.FtlGcFreeBadSuperBlk,"ax",@progbits
+	.align	2
+	.global	FtlGcFreeBadSuperBlk
+	.type	FtlGcFreeBadSuperBlk, %function
+FtlGcFreeBadSuperBlk:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR101
+	stp	x25, x26, [sp, 64]
+	and	w25, w0, 65535
+	ldrh	w0, [x21, #:lo12:.LANCHOR101]
+	stp	x19, x20, [sp, 16]
+	stp	x23, x24, [sp, 48]
+	str	x27, [sp, 80]
+	cbz	w0, .L1064
+	adrp	x23, .LANCHOR102
+	add	x24, x23, :lo12:.LANCHOR102
+	mov	w19, 0
+.L1065:
+	adrp	x0, .LANCHOR3
+	ldrh	w0, [x0, #:lo12:.LANCHOR3]
+	cmp	w0, w19
+	bhi	.L1071
+	bl	FtlGcReFreshBadBlk
+.L1064:
+	mov	w0, 0
+	ldr	x27, [sp, 80]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	ret
+.L1071:
+	adrp	x0, .LANCHOR13
+	add	x0, x0, :lo12:.LANCHOR13
+	mov	w1, w25
+	add	x22, x21, :lo12:.LANCHOR101
+	mov	w20, 0
+	ldrb	w0, [x0, w19, sxtw]
+	bl	V2P_block
+	and	w26, w0, 65535
+.L1066:
+	ldrh	w0, [x22]
+	cmp	w0, w20
+	bhi	.L1070
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L1065
+.L1070:
+	add	x0, x23, :lo12:.LANCHOR102
+	add	w27, w20, 1
+	ldrh	w0, [x0, w20, sxtw 1]
+	cmp	w0, w26
+	bne	.L1067
+	mov	w1, w26
+	adrp	x0, .LC104
+	add	x0, x0, :lo12:.LC104
+	bl	printf
+	mov	w0, w26
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	ldrh	w1, [x22]
+	sxtw	x3, w27
+	and	x4, x20, 65535
+	mov	x0, 0
+.L1068:
+	add	w2, w20, w0
+	cmp	w1, w2, uxth
+	bhi	.L1069
+	sub	w1, w1, #1
+	strh	w1, [x22]
+.L1067:
+	and	w20, w27, 65535
+	b	.L1066
+.L1069:
+	add	x2, x3, x0
+	ldrh	w5, [x24, x2, lsl 1]
+	add	x2, x4, x0
+	add	x0, x0, 1
+	strh	w5, [x24, x2, lsl 1]
+	b	.L1068
+	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
+	.section	.text.update_vpc_list,"ax",@progbits
+	.align	2
+	.global	update_vpc_list
+	.type	update_vpc_list, %function
+update_vpc_list:
+	stp	x29, x30, [sp, -32]!
 	adrp	x1, .LANCHOR42
-	ubfiz	x0, x24, 1, 16
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w19, w0, 65535
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
+	ubfiz	x0, x19, 1, 16
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1080
-	mov	w0, w3
-	b	.L1145
-.L1064:
-	ldp	w1, w0, [x29, 184]
-	cmp	w1, w0
-	bne	.L1067
-	mov	w2, 1
-	add	x1, x29, 180
-	mov	w0, w24
-	bl	log2phys
-	b	.L1067
-.L1065:
-	ldr	w0, [x3, 8]
-	cmp	w24, w0
-	bne	.L1066
-	ldr	w0, [x3, 4]
-	str	w0, [x29, 136]
-	str	x3, [x29, 96]
-	uxtw	x1, w0
-	ldr	w0, [x28, #:lo12:.LANCHOR153]
-	bl	ftl_cmp_data_ver
-	cbz	w0, .L1066
-	ldp	w0, w1, [x29, 184]
-	ldr	x3, [x29, 96]
-	cmp	w0, w1
-	ldr	w1, [x29, 180]
-	bne	.L1069
-.L1143:
-	mov	w0, w24
-	bl	FtlReUsePrevPpa
-	b	.L1066
-.L1069:
-	cmp	w0, w1
-	beq	.L1066
-	cmn	w0, #1
-	beq	.L1070
-	ldr	x3, [x4, 16]
-	mov	w2, 0
-	str	w0, [x4, 4]
-	mov	w1, 1
-	str	x3, [x29, 96]
-	mov	x0, x4
-	bl	FlashReadPages
-	ldr	x3, [x29, 96]
-.L1071:
-	ldr	x0, [x20, #:lo12:.LANCHOR120]
-	ldr	w0, [x0, x25]
-	cmn	w0, #1
-	beq	.L1072
-	ldr	x0, [x29, 104]
-	ldr	w3, [x3, 4]
-	mov	w1, w3
-	ldr	w0, [x0]
-	bl	ftl_cmp_data_ver
-	cbz	w0, .L1072
-	ldr	w0, [x29, 136]
-	mov	w1, w3
-	bl	ftl_cmp_data_ver
-	cbz	w0, .L1066
-.L1072:
-	ldr	w1, [x29, 180]
-	b	.L1143
-.L1070:
-	str	w0, [x4]
-	b	.L1071
-.L1063:
-	ldp	w1, w0, [x29, 184]
-	cmp	w1, w0
-	beq	.L1074
-	mov	w2, 1
-	add	x1, x29, 188
-	mov	w0, w24
-	bl	log2phys
-	ldr	w3, [x29, 184]
-	cmn	w3, #1
-	beq	.L1074
-	ldr	w0, [x29, 180]
-	cmp	w3, w0
-	beq	.L1088
-	lsr	w0, w3, 10
-	bl	P2V_block_in_plane
-	adrp	x1, .LANCHOR51
-	and	w0, w0, 65535
-	ldrh	w1, [x1, #:lo12:.LANCHOR51]
-	cmp	w1, w0
-	beq	.L1078
-	adrp	x1, .LANCHOR52
-	ldrh	w1, [x1, #:lo12:.LANCHOR52]
-	cmp	w1, w0
-	beq	.L1078
-	adrp	x1, .LANCHOR53
-	ldrh	w1, [x1, #:lo12:.LANCHOR53]
-	cmp	w1, w0
-	bne	.L1074
-.L1078:
-	ldr	x0, [x20, #:lo12:.LANCHOR120]
-	mov	w2, 0
-	mov	w1, 1
-	ldr	x4, [x0, 16]
-	str	w3, [x0, 4]
-	str	x4, [x29, 136]
-	bl	FlashReadPages
-	ldr	x0, [x20, #:lo12:.LANCHOR120]
-	ldr	w0, [x0]
-	cmn	w0, #1
-	beq	.L1074
-	ldr	x4, [x29, 136]
-	mov	w0, w21
-	ldr	w1, [x4, 4]
-	bl	ftl_cmp_data_ver
-	cbnz	w0, .L1074
-	mov	w2, 1
-	add	x1, x29, 184
-	mov	w0, w24
-	bl	log2phys
-	b	.L1074
-.L1080:
-	mov	w1, w24
-	adrp	x0, .LC102
-	add	x0, x0, :lo12:.LC102
+	cbnz	w0, .L1077
+	adrp	x0, .LANCHOR80
+	ldrh	w1, [x0, #:lo12:.LANCHOR80]
+	cmp	w1, w19
+	bne	.L1078
+	mov	w1, -1
+	strh	w1, [x0, #:lo12:.LANCHOR80]
+.L1079:
+	adrp	x20, .LANCHOR45
+	mov	w1, w19
+	adrp	x0, .LANCHOR41
+	add	x0, x0, :lo12:.LANCHOR41
+	bl	List_remove_node
+	ldrh	w0, [x20, #:lo12:.LANCHOR45]
+	cbnz	w0, .L1081
+	adrp	x1, .LANCHOR164
+	adrp	x0, .LC1
+	mov	w2, 2777
+	add	x1, x1, :lo12:.LANCHOR164
+	add	x0, x0, :lo12:.LC1
 	bl	printf
-	b	.L1058
-.L1060:
-	ldr	x0, [x29, 120]
-	ldr	w0, [x0]
-	cmp	w0, 31
-	bhi	.L1081
-	adrp	x1, .LANCHOR163
-	add	x1, x1, :lo12:.LANCHOR163
-	str	w5, [x1, w0, uxtw 2]
-	add	w0, w0, 1
-	ldr	x1, [x29, 120]
-	str	w0, [x1]
 .L1081:
-	ldrh	w0, [x19]
-	bl	decrement_vpc_count
-	ldr	w0, [x28, #:lo12:.LANCHOR153]
-	cmn	w0, #1
-	bne	.L1082
-.L1144:
-	str	w21, [x28, #:lo12:.LANCHOR153]
-	b	.L1058
-.L1082:
-	cmp	w21, w0
-	bcs	.L1058
-	b	.L1144
+	ldrh	w0, [x20, #:lo12:.LANCHOR45]
+	sub	w0, w0, #1
+	strh	w0, [x20, #:lo12:.LANCHOR45]
+	mov	w0, w19
+	bl	free_data_superblock
+	mov	w0, w19
+	bl	FtlGcFreeBadSuperBlk
+	adrp	x0, .LANCHOR48
+	ldrh	w1, [x20, #:lo12:.LANCHOR45]
+	ldrh	w0, [x0, #:lo12:.LANCHOR48]
+	add	w0, w0, w1
+	adrp	x1, .LANCHOR5
+	ldrh	w1, [x1, #:lo12:.LANCHOR5]
+	cmp	w0, w1
+	ble	.L1085
+	adrp	x1, .LANCHOR164
+	adrp	x0, .LC1
+	mov	w2, 2780
+	add	x1, x1, :lo12:.LANCHOR164
+	add	x0, x0, :lo12:.LC1
+	bl	printf
 .L1085:
-	add	w0, w0, 1
-	and	w0, w0, 65535
+	mov	w0, 1
+	b	.L1076
+.L1078:
+	adrp	x0, .LANCHOR51
+	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+	cmp	w0, w19
+	beq	.L1084
+	adrp	x0, .LANCHOR52
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
+	cmp	w0, w19
+	beq	.L1084
+	adrp	x0, .LANCHOR53
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+	cmp	w0, w19
+	bne	.L1079
+.L1084:
+	mov	w0, 0
+.L1076:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L1077:
+	mov	w0, w19
+	bl	List_update_data_list
 	b	.L1084
-.L1059:
-	strb	w27, [x19, 6]
-	strh	w22, [x19, 2]
-	b	.L1147
-	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
-	.section	.text.FtlSuperblockPowerLostFix,"ax",@progbits
+	.size	update_vpc_list, .-update_vpc_list
+	.section	.text.decrement_vpc_count,"ax",@progbits
 	.align	2
-	.global	FtlSuperblockPowerLostFix
-	.type	FtlSuperblockPowerLostFix, %function
-FtlSuperblockPowerLostFix:
-	stp	x29, x30, [sp, -80]!
-	adrp	x1, .LANCHOR108
+	.global	decrement_vpc_count
+	.type	decrement_vpc_count, %function
+decrement_vpc_count:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w19, w0, 65535
+	str	x21, [sp, 32]
+	mov	w0, 65535
+	cmp	w19, w0
+	beq	.L1088
+	adrp	x21, .LANCHOR42
+	ubfiz	x20, x19, 1, 16
+	ldr	x1, [x21, #:lo12:.LANCHOR42]
+	ldrh	w0, [x1, x20]
+	cbnz	w0, .L1089
+	mov	w2, 0
+	mov	w1, w19
+	adrp	x0, .LC105
+	add	x0, x0, :lo12:.LC105
+	bl	printf
+	ldr	x0, [x21, #:lo12:.LANCHOR42]
+	ldrh	w0, [x0, x20]
+	cbz	w0, .L1090
+.L1095:
+	mov	w20, 0
+.L1087:
+	mov	w0, w20
+	ldr	x21, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+.L1090:
+	mov	w2, 2795
+	adrp	x1, .LANCHOR165
+	adrp	x0, .LC1
+	add	x1, x1, :lo12:.LANCHOR165
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+	b	.L1095
+.L1089:
+	sub	w0, w0, #1
+	strh	w0, [x1, x20]
+.L1088:
+	adrp	x21, .LANCHOR142
+	mov	w1, 65535
+	ldrh	w0, [x21, #:lo12:.LANCHOR142]
+	cmp	w0, w1
+	bne	.L1092
+	strh	w19, [x21, #:lo12:.LANCHOR142]
+	b	.L1095
+.L1092:
+	cmp	w19, w0
+	beq	.L1095
+	bl	update_vpc_list
+	cmp	w0, 0
+	adrp	x1, .LANCHOR40
+	adrp	x0, .LANCHOR41
+	strh	w19, [x21, #:lo12:.LANCHOR142]
+	cset	w20, ne
+	ldr	x1, [x1, #:lo12:.LANCHOR40]
+	ldr	x0, [x0, #:lo12:.LANCHOR41]
+	sub	x0, x0, x1
+	mov	x1, -6148914691236517206
+	asr	x0, x0, 1
+	movk	x1, 0xaaab, lsl 0
+	mul	x0, x0, x1
+	adrp	x1, .LANCHOR42
+	ldr	x1, [x1, #:lo12:.LANCHOR42]
+	and	x2, x0, 65535
+	ldrh	w1, [x1, x2, lsl 1]
+	cbnz	w1, .L1087
+	cmp	w19, w0, uxth
+	beq	.L1087
+	mov	w2, 2811
+	adrp	x1, .LANCHOR165
+	adrp	x0, .LC1
+	add	x1, x1, :lo12:.LANCHOR165
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+	b	.L1087
+	.size	decrement_vpc_count, .-decrement_vpc_count
+	.section	.text.FtlRecoverySuperblock,"ax",@progbits
+	.align	2
+	.global	FtlRecoverySuperblock
+	.type	FtlRecoverySuperblock, %function
+FtlRecoverySuperblock:
+	stp	x29, x30, [sp, -192]!
+	mov	w1, 65535
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	mov	w0, -1
-	ldr	x20, [x1, #:lo12:.LANCHOR108]
-	str	w0, [x29, 72]
-	adrp	x0, .LANCHOR107
 	stp	x21, x22, [sp, 32]
-	mov	w1, -3
-	ldr	x0, [x0, #:lo12:.LANCHOR107]
-	adrp	x21, .LANCHOR71
-	str	x20, [x29, 64]
-	add	x21, x21, :lo12:.LANCHOR71
-	str	x0, [x29, 56]
-	mov	w22, 7
-	str	w1, [x20, 8]
-	mov	w1, -2
-	str	w1, [x20, 12]
-	ldrh	w1, [x19]
-	strh	w1, [x20, 2]
-	strh	wzr, [x20]
-	mov	w1, 61589
-	str	w1, [x0]
-	mov	w1, 22136
-	movk	w1, 0x1234, lsl 16
-	str	w1, [x0, 4]
-.L1149:
-	subs	w22, w22, #1
-	beq	.L1151
-	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1150
-.L1151:
-	ldrh	w0, [x19]
-	adrp	x1, .LANCHOR42
-	ldrh	w3, [x19, 4]
-	ldr	x2, [x1, #:lo12:.LANCHOR42]
-	lsl	x0, x0, 1
-	ldrh	w1, [x2, x0]
-	sub	w1, w1, w3
-	strh	w1, [x2, x0]
+	ldrh	w0, [x0]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	cmp	w0, w1
+	stp	x27, x28, [sp, 80]
+	beq	.L1219
+	ldrb	w0, [x19, 6]
+	str	w0, [x29, 164]
 	adrp	x0, .LANCHOR19
-	strb	wzr, [x19, 6]
+	ldrh	w26, [x19, 2]
+	str	x0, [x29, 128]
+	ldrh	w2, [x0, #:lo12:.LANCHOR19]
+	cmp	w2, w26
+	bne	.L1099
 	strh	wzr, [x19, 4]
-	ldrh	w0, [x0, #:lo12:.LANCHOR19]
-	strh	w0, [x19, 2]
-	ldp	x21, x22, [sp, 32]
+.L1225:
+	strb	wzr, [x19, 6]
+.L1219:
 	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 80
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 192
 	ret
-.L1150:
-	mov	x0, x19
-	bl	get_new_active_ppa
-	str	w0, [x29, 52]
+.L1099:
+	ldrh	w0, [x19, 16]
+	mov	w20, 0
+.L1100:
+	cmp	w0, w1
+	beq	.L1101
+	mov	w1, 1
+	bl	FtlGetLastWrittenPage
+	mov	w23, w0
 	cmn	w0, #1
-	beq	.L1151
-	ldr	w0, [x21]
-	mov	w3, 0
-	str	w0, [x20, 4]
+	beq	.L1102
+	adrp	x1, .LANCHOR91
+	adrp	x2, .LANCHOR3
+	adrp	x20, .LANCHOR112
+	add	x4, x19, 16
+	ldr	x5, [x1, #:lo12:.LANCHOR91]
+	adrp	x1, .LANCHOR23
+	ldr	x0, [x20, #:lo12:.LANCHOR112]
+	mov	w22, 0
+	ldrh	w6, [x1, #:lo12:.LANCHOR23]
+	adrp	x1, .LANCHOR92
+	mov	w10, 65535
+	str	x2, [x29, 152]
+	ldr	x7, [x1, #:lo12:.LANCHOR92]
+	adrp	x1, .LANCHOR24
+	ldrh	w8, [x1, #:lo12:.LANCHOR24]
+	add	x1, x19, 16
+	str	x1, [x29, 168]
+	ldrh	w1, [x2, #:lo12:.LANCHOR3]
+	add	x1, x1, 8
+	add	x1, x19, x1, lsl 1
+.L1103:
+	cmp	x4, x1
+	bne	.L1107
 	mov	w2, 0
-	add	w0, w0, 1
-	mov	w1, 1
+	mov	w1, w22
+	bl	FlashReadPages
+	adrp	x0, .LANCHOR71
+	ldr	x4, [x20, #:lo12:.LANCHOR112]
+	and	w10, w23, 65535
+	add	x7, x0, :lo12:.LANCHOR71
+	ldr	w21, [x0, #:lo12:.LANCHOR71]
+	mov	x11, x4
+	mov	w6, 65535
+	mov	w3, 0
+	sub	w21, w21, #1
+	str	x0, [x29, 144]
+.L1108:
+	cmp	w22, w3
+	bne	.L1113
+	add	w22, w23, 1
+	ldr	w0, [x4, 4]
+	and	w22, w22, 65535
+.L1221:
+	lsr	w0, w0, 10
+	bl	P2V_plane
+	and	w27, w0, 65535
+	ldr	x0, [x29, 128]
+	ldrh	w0, [x0, #:lo12:.LANCHOR19]
+	cmp	w0, w22
+	bne	.L1115
+	strh	w22, [x19, 2]
+	strb	wzr, [x19, 6]
+	strh	wzr, [x19, 4]
+.L1115:
+	ldr	w0, [x29, 164]
+	cmp	w22, w26
+	cset	w1, eq
+	cmp	w27, w0
+	cset	w0, eq
+	tst	w1, w0
+	beq	.L1116
+.L1226:
+	mov	w2, w27
+	mov	w1, w22
+	mov	x0, x19
+	bl	ftl_sb_update_avl_pages
+	b	.L1219
+.L1101:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	add	x0, x19, x20, sxtw 1
+	ldrh	w0, [x0, 16]
+	b	.L1100
+.L1102:
+	cbz	w26, .L1104
+	adrp	x1, .LANCHOR166
+	adrp	x0, .LC1
+	mov	w2, 1766
+	add	x1, x1, :lo12:.LANCHOR166
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L1104:
+	ldr	w0, [x29, 164]
+	cmp	w0, 0
+	ccmp	w20, w0, 4, ne
+	beq	.L1105
+	adrp	x1, .LANCHOR166
+	adrp	x0, .LC1
+	mov	w2, 1767
+	add	x1, x1, :lo12:.LANCHOR166
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L1105:
+	strh	wzr, [x19, 2]
+	b	.L1225
+.L1107:
+	ldrh	w3, [x4]
+	cmp	w3, w10
+	beq	.L1106
+	ubfiz	x2, x22, 5, 16
+	orr	w3, w23, w3, lsl 10
+	add	x2, x0, x2
+	str	w3, [x2, 4]
+	mul	w3, w22, w6
+	asr	w3, w3, 2
+	add	x3, x5, x3, sxtw 2
+	str	x3, [x2, 8]
+	mul	w3, w22, w8
+	add	w22, w22, 1
+	and	w22, w22, 65535
+	asr	w3, w3, 2
+	add	x3, x7, x3, sxtw 2
+	str	x3, [x2, 16]
+.L1106:
+	add	x4, x4, 2
+	b	.L1103
+.L1113:
+	ldr	w0, [x11]
+	cbnz	w0, .L1109
+	ldr	x8, [x11, 16]
+	ldr	w5, [x8, 4]
+	cmn	w5, #1
+	beq	.L1110
+	ldr	w1, [x7]
+	mov	w0, w5
+	bl	ftl_cmp_data_ver
+	cbz	w0, .L1110
+	add	w5, w5, 1
+	str	w5, [x7]
+.L1110:
+	ldr	w0, [x8]
 	cmn	w0, #1
-	csel	w0, w0, wzr, ne
-	str	w0, [x21]
-	add	x0, x29, 48
-	bl	FlashProgPages
-	ldrh	w0, [x19]
-	bl	decrement_vpc_count
-	b	.L1149
-	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
-	.section	.text.FtlLoadBbt,"ax",@progbits
-	.align	2
-	.global	FtlLoadBbt
-	.type	FtlLoadBbt, %function
-FtlLoadBbt:
-	stp	x29, x30, [sp, -80]!
-	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR107
-	stp	x19, x20, [sp, 16]
-	adrp	x24, .LANCHOR17
-	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR106
-	add	x20, x22, :lo12:.LANCHOR106
-	ldr	x0, [x23, #:lo12:.LANCHOR107]
-	str	x25, [sp, 64]
-	mov	w25, 61649
-	str	x0, [x20, 8]
-	adrp	x0, .LANCHOR108
-	ldr	x21, [x0, #:lo12:.LANCHOR108]
-	str	x21, [x20, 16]
-	bl	FtlBbtMemInit
-	ldrh	w19, [x24, #:lo12:.LANCHOR17]
-	add	x24, x24, :lo12:.LANCHOR17
-	sub	w19, w19, #1
-	and	w19, w19, 65535
-.L1161:
-	ldrh	w0, [x24]
-	sub	w0, w0, #15
-	cmp	w0, w19
-	bgt	.L1164
-	lsl	w0, w19, 10
-	mov	w2, 1
-	str	w0, [x20, 4]
-	mov	w1, w2
-	mov	x0, x20
+	bne	.L1112
+	ubfiz	x3, x3, 5, 16
+	and	w22, w23, 65535
+	add	x3, x4, x3
+	ldr	w0, [x3, 4]
+	b	.L1221
+.L1109:
+	mov	w6, w10
+.L1112:
+	add	w3, w3, 1
+	add	x11, x11, 32
+	and	w3, w3, 65535
+	b	.L1108
+.L1116:
+	mov	w0, 65535
+	cmp	w6, w0
+	bne	.L1117
+	ldrb	w0, [x19, 8]
+	cbnz	w0, .L1118
+.L1117:
+	adrp	x25, .LANCHOR145
+	and	w28, w23, 65535
+	ldr	w0, [x25, #:lo12:.LANCHOR145]
+	cmn	w0, #1
+	bne	.L1119
+	str	w21, [x25, #:lo12:.LANCHOR145]
+.L1119:
+	add	w0, w26, 7
+	cmp	w0, w23, uxth
+	bge	.L1168
+	sub	w24, w28, #7
+	and	w24, w24, 65535
+.L1120:
+	ldr	x0, [x29, 152]
+	mov	w3, 65535
+	mov	w5, 1
+	add	x4, x0, :lo12:.LANCHOR3
+.L1121:
+	cmp	w24, w28
+	bhi	.L1131
+	ldrh	w1, [x4]
+	mov	w23, 0
+	ldr	x0, [x20, #:lo12:.LANCHOR112]
+	add	x1, x1, 8
+	ldr	x2, [x29, 168]
+	add	x1, x19, x1, lsl 1
+	b	.L1132
+.L1168:
+	mov	w24, w26
+	b	.L1120
+.L1123:
+	ldrh	w6, [x2]
+	cmp	w6, w3
+	beq	.L1122
+	ubfiz	x7, x23, 5, 16
+	add	w23, w23, 1
+	add	x7, x0, x7
+	and	w23, w23, 65535
+	orr	w6, w24, w6, lsl 10
+	str	w6, [x7, 4]
+.L1122:
+	add	x2, x2, 2
+.L1132:
+	cmp	x2, x1
+	bne	.L1123
+	mov	w1, w23
+	mov	w2, 0
+	str	w5, [x29, 112]
+	ubfiz	x23, x23, 5, 16
+	str	w3, [x29, 120]
+	add	x23, x23, 16
+	str	x4, [x29, 136]
+	bl	FlashReadPages
+	ldr	x2, [x20, #:lo12:.LANCHOR112]
+	ldr	w1, [x25, #:lo12:.LANCHOR145]
+	ldr	w5, [x29, 112]
+	add	x0, x2, 16
+	ldr	w3, [x29, 120]
+	add	x23, x2, x23
+	ldr	x4, [x29, 136]
+	mov	w2, 0
+.L1124:
+	cmp	x23, x0
+	bne	.L1129
+	cbz	w2, .L1130
+	str	w1, [x25, #:lo12:.LANCHOR145]
+.L1130:
+	add	w24, w24, 1
+	and	w24, w24, 65535
+	b	.L1121
+.L1129:
+	ldr	w6, [x0, -16]
+	cbz	w6, .L1125
+	cbz	w2, .L1118
+	str	w1, [x25, #:lo12:.LANCHOR145]
+.L1118:
+	adrp	x0, .LANCHOR167
+	mov	w23, w26
+	mov	w1, 1
+	adrp	x28, .LANCHOR145
+	strh	w1, [x0, #:lo12:.LANCHOR167]
+	add	x0, x28, :lo12:.LANCHOR145
+	str	x0, [x29, 104]
+.L1133:
+	ldr	x1, [x29, 152]
+	mov	w24, 0
+	ldr	x0, [x20, #:lo12:.LANCHOR112]
+	mov	w5, 65535
+	ldr	x2, [x29, 168]
+	ldrh	w1, [x1, #:lo12:.LANCHOR3]
+	add	x1, x1, 8
+	add	x1, x19, x1, lsl 1
+.L1134:
+	cmp	x1, x2
+	bne	.L1136
+	mov	w2, 0
+	mov	w1, w24
 	bl	FlashReadPages
-	ldr	w0, [x20]
-	cmn	w0, #1
+	mov	x25, 0
+	ubfiz	x0, x24, 5, 16
+	str	x0, [x29, 112]
+	adrp	x0, .LANCHOR168
+	add	x0, x0, :lo12:.LANCHOR168
+	str	x0, [x29, 120]
+.L1137:
+	ldr	x0, [x29, 112]
+	cmp	x25, x0
 	bne	.L1162
-	ldr	w0, [x20, 4]
-	mov	w2, 1
-	mov	w1, w2
-	add	w0, w0, 1
-	str	w0, [x20, 4]
-	mov	x0, x20
-	bl	FlashReadPages
+	ldr	x0, [x29, 128]
+	add	w23, w23, 1
+	and	w23, w23, 65535
+	ldrh	w0, [x0, #:lo12:.LANCHOR19]
+	cmp	w0, w23
+	bne	.L1133
+	ldr	x0, [x29, 152]
+	mov	w2, 65535
+	strh	w23, [x19, 2]
+	strh	wzr, [x19, 4]
+	ldrh	w1, [x0, #:lo12:.LANCHOR3]
+	mov	w0, 0
+.L1163:
+	cmp	w0, w1
+	beq	.L1219
+	ldr	x4, [x29, 168]
+	ldrh	w3, [x4], 2
+	str	x4, [x29, 168]
+	cmp	w3, w2
+	beq	.L1164
+	strb	w0, [x19, 6]
+	b	.L1219
+.L1125:
+	ldr	x6, [x0]
+	ldrh	w7, [x6]
+	cmp	w7, w3
+	beq	.L1128
+	ldr	w6, [x6, 4]
+	cmn	w6, #1
+	csel	w1, w1, w6, eq
+	csel	w2, w2, w5, eq
+.L1128:
+	add	x0, x0, 32
+	b	.L1124
+.L1131:
+	mov	w0, -1
+	str	w0, [x25, #:lo12:.LANCHOR145]
+	b	.L1118
+.L1136:
+	ldrh	w3, [x2]
+	cmp	w3, w5
+	beq	.L1135
+	ubfiz	x4, x24, 5, 16
+	add	w24, w24, 1
+	add	x4, x0, x4
+	and	w24, w24, 65535
+	orr	w3, w23, w3, lsl 10
+	str	w3, [x4, 4]
+.L1135:
+	add	x2, x2, 2
+	b	.L1134
 .L1162:
-	ldr	w0, [x20]
+	ldr	x4, [x20, #:lo12:.LANCHOR112]
+	add	x4, x4, x25
+	ldr	w5, [x4, 4]
+	str	w5, [x29, 188]
+	lsr	w0, w5, 10
+	bl	P2V_plane
+	and	w0, w0, 65535
+	cmp	w23, w26
+	bcc	.L1138
+	ldr	w1, [x29, 164]
+	ccmp	w1, w0, 0, eq
+	bhi	.L1138
+	cmp	w23, w22
+	ccmp	w27, w0, 0, eq
+	beq	.L1139
+	ldr	w0, [x4]
 	cmn	w0, #1
-	beq	.L1163
-	ldrh	w0, [x21]
-	cmp	w0, w25
-	bne	.L1163
-	adrp	x1, .LANCHOR37
-	add	x0, x1, :lo12:.LANCHOR37
-	strh	w19, [x1, #:lo12:.LANCHOR37]
-	ldr	w1, [x21, 4]
-	str	w1, [x0, 8]
-	ldrh	w1, [x21, 8]
-	strh	w1, [x0, 4]
-.L1164:
-	adrp	x19, .LANCHOR37
-	mov	w0, 65535
-	add	x20, x19, :lo12:.LANCHOR37
-	ldrh	w1, [x19, #:lo12:.LANCHOR37]
-	cmp	w1, w0
-	beq	.L1178
-	ldrh	w1, [x20, 4]
+	beq	.L1140
+	ldr	x3, [x4, 16]
+	mov	w0, 61589
+	ldrh	w1, [x3]
 	cmp	w1, w0
-	beq	.L1168
-	add	x0, x22, :lo12:.LANCHOR106
-	lsl	w1, w1, 10
-	mov	w2, 1
+	beq	.L1141
+	ldrh	w0, [x19]
+.L1223:
+	bl	decrement_vpc_count
+	b	.L1138
+.L1141:
+	ldr	w21, [x3, 4]
+	cmn	w21, #1
+	beq	.L1142
+	ldr	x0, [x29, 144]
+	ldr	w1, [x0, #:lo12:.LANCHOR71]
+	mov	w0, w21
+	bl	ftl_cmp_data_ver
+	cbz	w0, .L1142
+	ldr	x1, [x29, 144]
+	add	w0, w21, 1
+	str	w0, [x1, #:lo12:.LANCHOR71]
+.L1142:
+	ldp	w24, w0, [x3, 8]
+	add	x1, x29, 184
+	str	w0, [x29, 180]
+	mov	w2, 0
+	mov	w0, w24
+	bl	log2phys
+	ldr	w1, [x28, #:lo12:.LANCHOR145]
+	cmn	w1, #1
+	beq	.L1143
+	mov	w0, w21
+	bl	ftl_cmp_data_ver
+	cbz	w0, .L1143
+	ldr	w1, [x29, 180]
+	cmn	w1, #1
+	beq	.L1144
+	ldr	x0, [x20, #:lo12:.LANCHOR112]
+	mov	w2, 0
+	add	x0, x0, x25
+	ldr	x3, [x0, 16]
 	str	w1, [x0, 4]
-	mov	w1, w2
+	mov	w1, 1
+	str	x3, [x29, 136]
 	bl	FlashReadPages
-	ldr	w0, [x22, #:lo12:.LANCHOR106]
+	ldr	x0, [x20, #:lo12:.LANCHOR112]
+	ldr	x3, [x29, 136]
+	add	x4, x0, x25
+	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	beq	.L1168
-	ldrh	w1, [x21]
-	mov	w0, 61649
-	cmp	w1, w0
-	bne	.L1168
-	ldr	w1, [x20, 8]
-	ldr	w0, [x21, 4]
-	cmp	w0, w1
-	bls	.L1168
-	ldrh	w1, [x20, 4]
-	str	w0, [x20, 8]
-	ldrh	w0, [x21, 8]
-	strh	w1, [x19, #:lo12:.LANCHOR37]
-	strh	w0, [x20, 4]
-.L1168:
-	ldrh	w0, [x19, #:lo12:.LANCHOR37]
-	add	x24, x19, :lo12:.LANCHOR37
-	mov	w1, 1
-	mov	w25, 61649
-	bl	FtlGetLastWrittenPage
-	sxth	w20, w0
-	add	w0, w0, 1
-	strh	w0, [x24, 2]
-	add	x24, x22, :lo12:.LANCHOR106
-.L1170:
-	tbz	w20, #31, .L1173
-	adrp	x1, .LANCHOR164
+	bne	.L1145
+.L1146:
+	mov	w0, -1
+	str	w0, [x29, 180]
+.L1153:
+	ldr	w3, [x29, 180]
+	cmn	w3, #1
+	beq	.L1138
+.L1167:
+	lsr	w0, w3, 10
+	bl	P2V_block_in_plane
+	and	w24, w0, 65535
+	adrp	x0, .LANCHOR5
+	mov	w3, w24
+	ldrh	w0, [x0, #:lo12:.LANCHOR5]
+	cmp	w0, w24
+	bhi	.L1158
+	mov	w2, 2019
+	adrp	x1, .LANCHOR166
 	adrp	x0, .LC1
-	mov	w2, 254
-	add	x1, x1, :lo12:.LANCHOR164
+	add	x1, x1, :lo12:.LANCHOR166
 	add	x0, x0, :lo12:.LC1
+	str	w24, [x29, 136]
 	bl	printf
-.L1172:
-	add	x0, x19, :lo12:.LANCHOR37
-	ldrh	w1, [x21, 10]
-	strh	w1, [x0, 6]
-	mov	w1, 65535
-	ldrh	w0, [x21, 12]
+	ldr	w3, [x29, 136]
+.L1158:
+	adrp	x1, .LANCHOR42
+	ubfiz	x0, x24, 1, 16
+	ldr	x1, [x1, #:lo12:.LANCHOR42]
+	ldrh	w0, [x1, x0]
+	cbz	w0, .L1159
+	mov	w0, w3
+	b	.L1223
+.L1144:
+	ldp	w1, w0, [x29, 184]
+	cmp	w1, w0
+	bne	.L1138
+	mov	w2, 1
+	add	x1, x29, 180
+	mov	w0, w24
+	bl	log2phys
+.L1138:
+	add	x25, x25, 32
+	b	.L1137
+.L1145:
+	ldr	w0, [x3, 8]
+	cmp	w24, w0
+	bne	.L1146
+	ldr	w0, [x3, 4]
+	str	w0, [x29, 136]
+	str	x3, [x29, 96]
+	uxtw	x1, w0
+	ldr	w0, [x28, #:lo12:.LANCHOR145]
+	bl	ftl_cmp_data_ver
+	cbz	w0, .L1146
+	ldp	w0, w1, [x29, 184]
+	ldr	x3, [x29, 96]
 	cmp	w0, w1
-	beq	.L1175
-	adrp	x1, .LANCHOR2
-	ldr	w2, [x1, #:lo12:.LANCHOR2]
-	cmp	w0, w2
-	beq	.L1175
-	adrp	x1, .LANCHOR6
-	ldrh	w1, [x1, #:lo12:.LANCHOR6]
-	lsr	w1, w1, 2
-	cmp	w2, w1
-	bcs	.L1175
+	ldr	w1, [x29, 180]
+	bne	.L1148
+.L1222:
+	mov	w0, w24
+	bl	FtlReUsePrevPpa
+	b	.L1146
+.L1148:
 	cmp	w0, w1
-	bcs	.L1175
-	bl	FtlSysBlkNumInit
-.L1175:
-	add	x19, x19, :lo12:.LANCHOR37
-	adrp	x21, .LANCHOR10
-	adrp	x23, .LANCHOR137
-	add	x19, x19, 32
-	add	x21, x21, :lo12:.LANCHOR10
-	add	x23, x23, :lo12:.LANCHOR137
-	add	x22, x22, :lo12:.LANCHOR106
-	mov	w20, 0
-.L1176:
-	ldrh	w0, [x21]
-	cmp	w20, w0
-	bcc	.L1177
-	mov	w0, 0
-.L1160:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldr	x25, [sp, 64]
-	ldp	x29, x30, [sp], 80
-	ret
-.L1163:
-	sub	w19, w19, #1
-	and	w19, w19, 65535
-	b	.L1161
-.L1173:
-	ldrh	w0, [x19, #:lo12:.LANCHOR37]
+	beq	.L1146
+	cmn	w0, #1
+	beq	.L1149
+	ldr	x3, [x4, 16]
+	mov	w2, 0
+	str	w0, [x4, 4]
+	mov	w1, 1
+	str	x3, [x29, 96]
+	mov	x0, x4
+	bl	FlashReadPages
+	ldr	x3, [x29, 96]
+.L1150:
+	ldr	x0, [x20, #:lo12:.LANCHOR112]
+	ldr	w0, [x0, x25]
+	cmn	w0, #1
+	beq	.L1151
+	ldr	x0, [x29, 104]
+	ldr	w3, [x3, 4]
+	mov	w1, w3
+	ldr	w0, [x0]
+	bl	ftl_cmp_data_ver
+	cbz	w0, .L1151
+	ldr	w0, [x29, 136]
+	mov	w1, w3
+	bl	ftl_cmp_data_ver
+	cbz	w0, .L1146
+.L1151:
+	ldr	w1, [x29, 180]
+	b	.L1222
+.L1149:
+	str	w0, [x4]
+	b	.L1150
+.L1143:
+	ldp	w1, w0, [x29, 184]
+	cmp	w1, w0
+	beq	.L1153
 	mov	w2, 1
-	mov	w1, w2
-	orr	w0, w20, w0, lsl 10
-	str	w0, [x24, 4]
-	ldr	x0, [x23, #:lo12:.LANCHOR107]
-	str	x0, [x24, 8]
-	mov	x0, x24
+	add	x1, x29, 188
+	mov	w0, w24
+	bl	log2phys
+	ldr	w3, [x29, 184]
+	cmn	w3, #1
+	beq	.L1153
+	ldr	w0, [x29, 180]
+	cmp	w3, w0
+	beq	.L1167
+	lsr	w0, w3, 10
+	bl	P2V_block_in_plane
+	adrp	x1, .LANCHOR51
+	and	w0, w0, 65535
+	ldrh	w1, [x1, #:lo12:.LANCHOR51]
+	cmp	w1, w0
+	beq	.L1157
+	adrp	x1, .LANCHOR52
+	ldrh	w1, [x1, #:lo12:.LANCHOR52]
+	cmp	w1, w0
+	beq	.L1157
+	adrp	x1, .LANCHOR53
+	ldrh	w1, [x1, #:lo12:.LANCHOR53]
+	cmp	w1, w0
+	bne	.L1153
+.L1157:
+	ldr	x0, [x20, #:lo12:.LANCHOR112]
+	mov	w2, 0
+	mov	w1, 1
+	ldr	x4, [x0, 16]
+	str	w3, [x0, 4]
+	str	x4, [x29, 136]
 	bl	FlashReadPages
-	ldr	w0, [x24]
+	ldr	x0, [x20, #:lo12:.LANCHOR112]
+	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L1171
-	ldrh	w0, [x21]
-	cmp	w0, w25
-	beq	.L1172
-.L1171:
-	sub	w20, w20, #1
-	sxth	w20, w20
-	b	.L1170
-.L1177:
-	ldrh	w2, [x23]
-	ldr	x0, [x22, 8]
-	mul	w1, w2, w20
-	lsl	w2, w2, 2
-	add	w20, w20, 1
-	add	x1, x0, x1, lsl 2
-	ldr	x0, [x19], 8
-	bl	ftl_memcpy
-	b	.L1176
-.L1178:
-	mov	w0, -1
-	b	.L1160
-	.size	FtlLoadBbt, .-FtlLoadBbt
-	.section	.text.FtlMakeBbt,"ax",@progbits
+	beq	.L1153
+	ldr	x4, [x29, 136]
+	mov	w0, w21
+	ldr	w1, [x4, 4]
+	bl	ftl_cmp_data_ver
+	cbnz	w0, .L1153
+	mov	w2, 1
+	add	x1, x29, 184
+	mov	w0, w24
+	bl	log2phys
+	b	.L1153
+.L1159:
+	mov	w1, w24
+	adrp	x0, .LC106
+	add	x0, x0, :lo12:.LC106
+	bl	printf
+	b	.L1138
+.L1140:
+	ldr	x0, [x29, 120]
+	ldr	w0, [x0]
+	cmp	w0, 31
+	bhi	.L1160
+	adrp	x1, .LANCHOR169
+	add	x1, x1, :lo12:.LANCHOR169
+	str	w5, [x1, w0, uxtw 2]
+	add	w0, w0, 1
+	ldr	x1, [x29, 120]
+	str	w0, [x1]
+.L1160:
+	ldrh	w0, [x19]
+	bl	decrement_vpc_count
+	ldr	w0, [x28, #:lo12:.LANCHOR145]
+	cmn	w0, #1
+	bne	.L1161
+.L1224:
+	str	w21, [x28, #:lo12:.LANCHOR145]
+	b	.L1138
+.L1161:
+	cmp	w21, w0
+	bcs	.L1138
+	b	.L1224
+.L1164:
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	b	.L1163
+.L1139:
+	strb	w27, [x19, 6]
+	strh	w22, [x19, 2]
+	b	.L1226
+	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
+	.section	.text.FtlWriteDump_data,"ax",@progbits
 	.align	2
-	.global	FtlMakeBbt
-	.type	FtlMakeBbt, %function
-FtlMakeBbt:
+	.global	FtlWriteDump_data
+	.type	FtlWriteDump_data, %function
+FtlWriteDump_data:
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	mov	w22, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR37
+	adrp	x19, .LANCHOR51
+	add	x0, x19, :lo12:.LANCHOR51
+	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	add	x21, x20, :lo12:.LANCHOR37
-	stp	x25, x26, [sp, 64]
-	add	x24, x21, 32
-	stp	x27, x28, [sp, 80]
-	bl	FtlBbtMemInit
-	bl	FtlLoadFactoryBbt
-	adrp	x28, .LANCHOR106
-	add	x21, x21, 12
-	add	x25, x28, :lo12:.LANCHOR106
-	adrp	x0, .LANCHOR10
-	add	x0, x0, :lo12:.LANCHOR10
-	str	x0, [x29, 120]
-.L1191:
-	ldr	x0, [x29, 120]
-	ldrh	w0, [x0]
-	cmp	w22, w0
-	bcc	.L1197
-	adrp	x21, .LANCHOR25
-	add	x21, x21, :lo12:.LANCHOR25
-	mov	w19, 0
-.L1198:
-	ldrh	w0, [x21]
-	cmp	w0, w19
-	bhi	.L1199
-	add	x21, x20, :lo12:.LANCHOR37
-	mov	w22, 65535
-	ldrh	w19, [x21, 12]
-	sub	w19, w19, #1
-	and	w19, w19, 65535
-.L1200:
-	ldrh	w0, [x21, 12]
-	sub	w0, w0, #47
-	cmp	w0, w19
-	bgt	.L1204
-	mov	w0, w19
-	bl	FtlBbmIsBadBlock
-	cmp	w0, 1
-	beq	.L1201
-	mov	w0, w19
-	bl	FlashTestBlk
-	cbz	w0, .L1202
-	mov	w0, w19
-	bl	FtlBbmMapBadBlock
-.L1201:
-	sub	w19, w19, #1
-	and	w19, w19, 65535
-	b	.L1200
-.L1197:
-	adrp	x2, .LANCHOR108
-	adrp	x0, .LANCHOR107
-	add	x19, x28, :lo12:.LANCHOR106
-	ldrh	w1, [x21]
-	ldr	x0, [x0, #:lo12:.LANCHOR107]
-	mov	w3, 65535
-	ldr	x26, [x2, #:lo12:.LANCHOR108]
-	cmp	w1, w3
-	stp	x0, x26, [x19, 8]
-	adrp	x23, .LANCHOR17
-	str	x2, [x29, 112]
-	beq	.L1192
-	ldrh	w4, [x23, #:lo12:.LANCHOR17]
-	mov	w2, 1
-	madd	w27, w4, w22, w1
-	mov	w1, w2
-	lsl	w0, w27, 10
-	str	w0, [x19, 4]
-	mov	x0, x19
+	ldrh	w2, [x0, 4]
+	str	x25, [sp, 64]
+	cbz	w2, .L1228
+	ldrb	w1, [x0, 8]
+	cbnz	w1, .L1228
+	adrp	x3, .LANCHOR19
+	ldrb	w1, [x0, 7]
+	ldrh	w3, [x3, #:lo12:.LANCHOR19]
+	mul	w1, w1, w3
+	cmp	w2, w1
+	beq	.L1228
+	ldrb	w0, [x0, 10]
+	cbnz	w0, .L1227
+	adrp	x0, .LANCHOR61
+	mov	w2, 0
+	add	x1, x29, 92
+	ldr	w21, [x0, #:lo12:.LANCHOR61]
+	adrp	x0, .LANCHOR3
+	sub	w21, w21, #1
+	ldrh	w25, [x0, #:lo12:.LANCHOR3]
+	mov	w0, w21
+	bl	log2phys
+	adrp	x2, .LANCHOR123
+	adrp	x0, .LANCHOR115
+	ldr	w1, [x29, 92]
+	ldr	x20, [x2, #:lo12:.LANCHOR123]
+	ldr	x0, [x0, #:lo12:.LANCHOR115]
+	cmn	w1, #1
+	str	w1, [x29, 100]
+	stp	x0, x20, [x29, 104]
+	str	w21, [x29, 120]
+	str	wzr, [x20, 4]
+	beq	.L1230
+	mov	w2, 0
+	mov	w1, 1
+	add	x0, x29, 96
 	bl	FlashReadPages
-	ldr	x1, [x19, 8]
-	ldr	x0, [x24]
-	ldrh	w2, [x23, #:lo12:.LANCHOR17]
-	add	w2, w2, 7
-	lsr	w2, w2, 3
-	bl	ftl_memcpy
-.L1193:
-	mov	w0, w27
-	add	w22, w22, 1
-	bl	FtlBbmMapBadBlock
-	add	x24, x24, 8
-	add	x21, x21, 2
-	b	.L1191
-.L1192:
-	mov	w1, w22
-	bl	FlashGetBadBlockList
-	ldr	x0, [x19, 8]
-	ldr	x1, [x24]
-	bl	FtlBbt2Bitmap
-	ldrh	w19, [x23, #:lo12:.LANCHOR17]
-	add	x23, x23, :lo12:.LANCHOR17
-	adrp	x0, .LANCHOR137
-	sub	w19, w19, #1
-	add	x0, x0, :lo12:.LANCHOR137
-	and	w19, w19, 65535
-	str	x0, [x29, 104]
-.L1194:
-	ldrh	w0, [x23]
-	madd	w0, w22, w0, w19
-	bl	FtlBbmIsBadBlock
-	cmp	w0, 1
-	beq	.L1195
-	ldr	x0, [x29, 112]
-	mov	w2, 16
-	strh	w19, [x21]
-	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR108]
-	bl	ftl_memset
-	adrp	x0, .LANCHOR107
-	mov	w2, 4096
-	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR107]
-	bl	ftl_memset
-	mov	w0, -3872
-	strh	w0, [x26]
-	ldrh	w4, [x23]
-	ldrh	w0, [x21]
-	strh	w0, [x26, 2]
-	ldr	x1, [x24]
-	str	wzr, [x26, 4]
-	madd	w27, w4, w22, w0
-	lsl	w0, w27, 10
-	str	w0, [x25, 4]
-	ldr	x0, [x29, 104]
-	ldrh	w2, [x0]
-	ldr	x0, [x25, 8]
-	lsl	w2, w2, 2
-	bl	ftl_memcpy
-	mov	w2, 1
-	mov	x0, x25
-	mov	w1, w2
-	bl	FlashEraseBlocks
-	mov	w3, 1
-	mov	x0, x25
-	mov	w2, w3
-	mov	w1, w3
-	bl	FlashProgPages
-	ldr	w0, [x25]
+.L1231:
+	adrp	x23, .LANCHOR71
+	lsl	w25, w25, 2
+	add	x22, x19, :lo12:.LANCHOR51
+	add	x23, x23, :lo12:.LANCHOR71
+	mov	w0, -3947
+	mov	w24, 0
+	strh	w0, [x20]
+.L1232:
+	cmp	w25, w24
+	bne	.L1236
+.L1233:
+	add	x19, x19, :lo12:.LANCHOR51
+	mov	w0, 1
+	strb	w0, [x19, 10]
+.L1227:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 128
+	ret
+.L1230:
+	adrp	x1, .LANCHOR23
+	ldrh	w2, [x1, #:lo12:.LANCHOR23]
+	mov	w1, 255
+	bl	ftl_memset
+	b	.L1231
+.L1236:
+	ldrh	w0, [x22, 4]
+	cbz	w0, .L1233
+	ldr	w0, [x29, 100]
+	add	w24, w24, 1
+	stp	w21, w0, [x20, 8]
+	ldrh	w0, [x22]
+	strh	w0, [x20, 2]
+	mov	x0, x22
+	bl	get_new_active_ppa
+	str	w0, [x29, 100]
+	ldr	w0, [x23]
+	mov	w3, 0
+	str	w0, [x20, 4]
+	mov	w2, 0
+	add	w0, w0, 1
+	mov	w1, 1
 	cmn	w0, #1
-	bne	.L1193
-	mov	w0, w27
-	bl	FtlBbmMapBadBlock
-	b	.L1194
-.L1195:
-	sub	w19, w19, #1
-	and	w19, w19, 65535
-	b	.L1194
-.L1199:
+	csel	w0, w0, wzr, ne
+	str	w0, [x23]
+	add	x0, x29, 96
+	bl	FlashProgPages
+	ldrh	w0, [x22]
+	bl	decrement_vpc_count
+	b	.L1232
+.L1228:
+	add	x19, x19, :lo12:.LANCHOR51
+	strb	wzr, [x19, 10]
+	b	.L1227
+	.size	FtlWriteDump_data, .-FtlWriteDump_data
+	.section	.text.l2p_flush,"ax",@progbits
+	.align	2
+	.global	l2p_flush
+	.type	l2p_flush, %function
+l2p_flush:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR33
+	add	x20, x20, :lo12:.LANCHOR33
+	str	x21, [sp, 32]
+	mov	w19, 0
+	adrp	x21, .LANCHOR55
+	bl	FtlWriteDump_data
+.L1246:
+	ldrh	w0, [x20]
+	cmp	w0, w19
+	bhi	.L1248
+	mov	w0, 0
+	ldr	x21, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+.L1248:
+	ldr	x1, [x21, #:lo12:.LANCHOR55]
+	ubfiz	x0, x19, 4, 16
+	add	x0, x1, x0
+	ldr	w0, [x0, 4]
+	tbz	w0, #31, .L1247
 	mov	w0, w19
+	bl	flush_l2p_region
+.L1247:
 	add	w19, w19, 1
-	bl	FtlBbmMapBadBlock
 	and	w19, w19, 65535
-	b	.L1198
-.L1202:
-	ldrh	w0, [x21]
-	cmp	w0, w22
-	bne	.L1203
-	strh	w19, [x21]
-	b	.L1201
-.L1203:
-	strh	w19, [x21, 4]
-.L1204:
-	adrp	x0, .LANCHOR111
-	add	x19, x20, :lo12:.LANCHOR37
-	ldrh	w1, [x20, #:lo12:.LANCHOR37]
-	mov	w2, 2
-	ldr	x0, [x0, #:lo12:.LANCHOR111]
-	str	wzr, [x19, 8]
-	lsl	w1, w1, 10
-	strh	wzr, [x19, 2]
+	b	.L1246
+	.size	l2p_flush, .-l2p_flush
+	.section	.text.FtlSuperblockPowerLostFix,"ax",@progbits
+	.align	2
+	.global	FtlSuperblockPowerLostFix
+	.type	FtlSuperblockPowerLostFix, %function
+FtlSuperblockPowerLostFix:
+	stp	x29, x30, [sp, -80]!
+	adrp	x1, .LANCHOR123
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	mov	w0, -1
+	stp	x21, x22, [sp, 32]
+	str	w0, [x29, 72]
+	adrp	x0, .LANCHOR115
+	ldr	x21, [x1, #:lo12:.LANCHOR123]
+	mov	w1, -3
+	ldr	x0, [x0, #:lo12:.LANCHOR115]
+	adrp	x22, .LANCHOR71
+	str	x21, [x29, 64]
+	add	x22, x22, :lo12:.LANCHOR71
+	str	x0, [x29, 56]
+	ldrh	w20, [x19, 4]
+	str	w1, [x21, 8]
+	mov	w1, -2
+	str	w1, [x21, 12]
+	and	w20, w20, 1
+	ldrh	w1, [x19]
+	add	w20, w20, 6
+	strh	w1, [x21, 2]
+	strh	wzr, [x21]
+	mov	w1, 61589
+	str	w1, [x0]
+	mov	w1, 22136
+	movk	w1, 0x1234, lsl 16
 	str	w1, [x0, 4]
-	ldrh	w1, [x19, 4]
-	lsl	w1, w1, 10
-	str	w1, [x0, 36]
-	mov	w1, 1
-	bl	FlashEraseBlocks
-	ldrh	w0, [x20, #:lo12:.LANCHOR37]
-	bl	FtlBbmMapBadBlock
+.L1256:
 	ldrh	w0, [x19, 4]
-	bl	FtlBbmMapBadBlock
-	bl	FtlBbmTblFlush
-	strh	wzr, [x19, 2]
-	ldr	w0, [x19, 8]
-	ldrh	w1, [x19, 4]
-	add	w0, w0, 1
-	str	w0, [x19, 8]
-	ldrh	w0, [x20, #:lo12:.LANCHOR37]
-	strh	w0, [x19, 4]
-	strh	w1, [x20, #:lo12:.LANCHOR37]
-	bl	FtlBbmTblFlush
-	mov	w0, 0
-	ldp	x19, x20, [sp, 16]
+	cbnz	w0, .L1252
+.L1253:
+	ldrh	w0, [x19]
+	adrp	x1, .LANCHOR42
+	ldrh	w3, [x19, 4]
+	ldr	x2, [x1, #:lo12:.LANCHOR42]
+	lsl	x0, x0, 1
+	ldrh	w1, [x2, x0]
+	sub	w1, w1, w3
+	strh	w1, [x2, x0]
+	adrp	x0, .LANCHOR19
+	strb	wzr, [x19, 6]
+	strh	wzr, [x19, 4]
+	ldrh	w0, [x0, #:lo12:.LANCHOR19]
+	strh	w0, [x19, 2]
 	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 128
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 80
 	ret
-	.size	FtlMakeBbt, .-FtlMakeBbt
+.L1252:
+	mov	x0, x19
+	bl	get_new_active_ppa
+	str	w0, [x29, 52]
+	cmn	w0, #1
+	beq	.L1253
+	ldr	w0, [x22]
+	mov	w3, 0
+	str	w0, [x21, 4]
+	mov	w2, 0
+	add	w0, w0, 1
+	mov	w1, 1
+	cmn	w0, #1
+	csel	w0, w0, wzr, ne
+	str	w0, [x22]
+	add	x0, x29, 48
+	bl	FlashProgPages
+	ldrh	w0, [x19]
+	bl	decrement_vpc_count
+	subs	w20, w20, #1
+	bne	.L1256
+	b	.L1253
+	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
 	.section	.text.FtlVendorPartWrite,"ax",@progbits
 	.align	2
 	.global	FtlVendorPartWrite
@@ -8632,7 +8976,7 @@ FtlVendorPartWrite:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w1, w0
-	bhi	.L1218
+	bhi	.L1272
 	adrp	x0, .LANCHOR22
 	adrp	x25, .LANCHOR12
 	adrp	x26, .LANCHOR23
@@ -8642,9 +8986,9 @@ FtlVendorPartWrite:
 	add	x26, x26, :lo12:.LANCHOR23
 	mov	w23, 0
 	lsr	w21, w28, w21
-.L1212:
-	cbnz	w20, .L1217
-.L1210:
+.L1266:
+	cbnz	w20, .L1271
+.L1264:
 	mov	w0, w23
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -8653,10 +8997,10 @@ FtlVendorPartWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 208
 	ret
-.L1217:
+.L1271:
 	ldrh	w1, [x25]
 	adrp	x0, .LANCHOR133
-	adrp	x27, .LANCHOR124
+	adrp	x27, .LANCHOR117
 	ldr	x0, [x0, #:lo12:.LANCHOR133]
 	udiv	w22, w28, w1
 	ldr	w2, [x0, w21, uxtw 2]
@@ -8666,10 +9010,10 @@ FtlVendorPartWrite:
 	and	w19, w19, 65535
 	cmp	w20, w19
 	csel	w19, w0, w19, cc
-	cbz	w2, .L1214
+	cbz	w2, .L1268
 	cmp	w19, w1
-	beq	.L1214
-	ldr	x0, [x27, #:lo12:.LANCHOR124]
+	beq	.L1268
+	ldr	x0, [x27, #:lo12:.LANCHOR117]
 	str	x0, [x29, 120]
 	add	x0, x29, 144
 	str	w2, [x29, 116]
@@ -8678,19 +9022,19 @@ FtlVendorPartWrite:
 	mov	w1, w2
 	add	x0, x29, 112
 	bl	FlashReadPages
-.L1215:
+.L1269:
 	lsl	w4, w19, 9
-	ldr	x0, [x27, #:lo12:.LANCHOR124]
+	ldr	x0, [x27, #:lo12:.LANCHOR117]
 	lsl	w22, w22, 7
 	mov	w2, w4
 	mov	x1, x24
 	str	w4, [x29, 108]
 	add	x0, x0, x22, sxtw 2
 	bl	ftl_memcpy
-	ldr	x2, [x27, #:lo12:.LANCHOR124]
+	ldr	x2, [x27, #:lo12:.LANCHOR117]
 	mov	w1, w21
-	adrp	x0, .LANCHOR149
-	add	x0, x0, :lo12:.LANCHOR149
+	adrp	x0, .LANCHOR158
+	add	x0, x0, :lo12:.LANCHOR158
 	sub	w20, w20, w19
 	add	w28, w28, w19
 	add	w21, w21, 1
@@ -8699,16 +9043,16 @@ FtlVendorPartWrite:
 	ldr	w4, [x29, 108]
 	csinv	w23, w23, wzr, ne
 	add	x24, x24, x4, sxtw
-	b	.L1212
-.L1214:
+	b	.L1266
+.L1268:
 	ldrh	w2, [x26]
 	mov	w1, 0
-	ldr	x0, [x27, #:lo12:.LANCHOR124]
+	ldr	x0, [x27, #:lo12:.LANCHOR117]
 	bl	ftl_memset
-	b	.L1215
-.L1218:
+	b	.L1269
+.L1272:
 	mov	w23, -1
-	b	.L1210
+	b	.L1264
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.section	.text.Ftl_save_ext_data,"ax",@progbits
 	.align	2
@@ -8721,8 +9065,8 @@ Ftl_save_ext_data:
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1223
-	mov	w0, 68
+	bne	.L1277
+	mov	w0, 72
 	mov	w1, 1
 	movk	w0, 0x5000, lsl 16
 	str	w0, [x2, 4]
@@ -8764,7 +9108,7 @@ Ftl_save_ext_data:
 	str	w0, [x2, 48]
 	mov	w0, 0
 	b	FtlVendorPartWrite
-.L1223:
+.L1277:
 	ret
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
 	.section	.text.FtlEctTblFlush,"ax",@progbits
@@ -8772,23 +9116,23 @@ Ftl_save_ext_data:
 	.global	FtlEctTblFlush
 	.type	FtlEctTblFlush, %function
 FtlEctTblFlush:
-	adrp	x2, .LANCHOR165
-	ldrh	w1, [x2, #:lo12:.LANCHOR165]
+	adrp	x2, .LANCHOR170
+	ldrh	w1, [x2, #:lo12:.LANCHOR170]
 	cmp	w1, 31
-	bhi	.L1229
+	bhi	.L1283
 	add	w1, w1, 1
-	strh	w1, [x2, #:lo12:.LANCHOR165]
+	strh	w1, [x2, #:lo12:.LANCHOR170]
 	mov	w1, 1
-.L1226:
+.L1280:
 	adrp	x2, .LANCHOR127
-	cbnz	w0, .L1227
+	cbnz	w0, .L1281
 	ldr	x0, [x2, #:lo12:.LANCHOR127]
 	ldr	w3, [x0, 20]
 	ldr	w0, [x0, 16]
 	add	w1, w1, w3
 	cmp	w0, w1
-	bcc	.L1231
-.L1227:
+	bcc	.L1285
+.L1281:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	ldr	x2, [x2, #:lo12:.LANCHOR127]
@@ -8811,10 +9155,10 @@ FtlEctTblFlush:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1229:
+.L1283:
 	mov	w1, 32
-	b	.L1226
-.L1231:
+	b	.L1280
+.L1285:
 	mov	w0, 0
 	ret
 	.size	FtlEctTblFlush, .-FtlEctTblFlush
@@ -8833,30 +9177,31 @@ sftl_vendor_write:
 FtlVendorPartRead:
 	stp	x29, x30, [sp, -208]!
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	w20, w1
 	stp	x21, x22, [sp, 32]
+	mov	w22, w0
+	mov	w21, w1
 	add	w1, w0, w1
-	mov	w21, w0
 	adrp	x0, .LANCHOR16
+	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	ldrh	w0, [x0, #:lo12:.LANCHOR16]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	cmp	w1, w0
-	bhi	.L1242
+	bhi	.L1297
 	adrp	x0, .LANCHOR22
-	adrp	x24, .LANCHOR12
-	mov	x23, x2
-	add	x24, x24, :lo12:.LANCHOR12
-	ldrh	w3, [x0, #:lo12:.LANCHOR22]
-	mov	w22, 0
-	adrp	x25, .LANCHOR133
-	lsr	w26, w21, w3
-.L1236:
-	cbnz	w20, .L1241
-.L1234:
-	mov	w0, w22
+	mov	x25, x2
+	mov	w24, 0
+	adrp	x27, .LANCHOR133
+	ldrh	w20, [x0, #:lo12:.LANCHOR22]
+	adrp	x0, .LANCHOR12
+	add	x0, x0, :lo12:.LANCHOR12
+	str	x0, [x29, 104]
+	lsr	w20, w22, w20
+.L1290:
+	cbnz	w21, .L1296
+.L1288:
+	mov	w0, w24
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -8864,55 +9209,74 @@ FtlVendorPartRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 208
 	ret
-.L1241:
-	ldrh	w19, [x24]
-	ldr	x0, [x25, #:lo12:.LANCHOR133]
-	udiv	w27, w21, w19
-	ldr	w1, [x0, w26, uxtw 2]
-	and	w0, w20, 65535
-	msub	w27, w27, w19, w21
-	sub	w19, w19, w27
+.L1296:
+	ldr	x0, [x27, #:lo12:.LANCHOR133]
+	ldr	w4, [x0, w20, uxtw 2]
+	ldr	x0, [x29, 104]
+	ldrh	w19, [x0]
+	and	w0, w21, 65535
+	udiv	w23, w22, w19
+	msub	w23, w23, w19, w22
+	sub	w19, w19, w23
 	and	w19, w19, 65535
-	cmp	w20, w19
+	cmp	w21, w19
 	csel	w19, w0, w19, cc
-	lsl	w28, w19, 9
-	cbz	w1, .L1238
-	adrp	x4, .LANCHOR124
+	lsl	w26, w19, 9
+	cbz	w4, .L1292
+	adrp	x28, .LANCHOR117
 	mov	w2, 1
-	str	x4, [x29, 104]
-	lsl	w27, w27, 7
-	ldr	x0, [x4, #:lo12:.LANCHOR124]
+	str	w4, [x29, 96]
+	mov	w1, w2
+	ldr	x0, [x28, #:lo12:.LANCHOR117]
 	str	x0, [x29, 120]
 	add	x0, x29, 144
-	str	w1, [x29, 116]
-	mov	w1, w2
+	str	w4, [x29, 116]
 	str	x0, [x29, 128]
 	add	x0, x29, 112
 	bl	FlashReadPages
-	ldr	x4, [x29, 104]
-	mov	w2, w28
 	ldr	w0, [x29, 112]
+	mov	x5, x28
+	ldr	w4, [x29, 96]
 	cmn	w0, #1
-	mov	x0, x23
-	ldr	x1, [x4, #:lo12:.LANCHOR124]
-	csinv	w22, w22, wzr, ne
-	add	x1, x1, x27, sxtw 2
+	adrp	x0, .LANCHOR148
+	csinv	w24, w24, wzr, ne
+	ldr	w0, [x0, #:lo12:.LANCHOR148]
+	cmp	w0, 256
+	bne	.L1294
+	mov	w2, w4
+	mov	w1, w20
+	adrp	x0, .LC107
+	str	x28, [x29, 96]
+	add	x0, x0, :lo12:.LC107
+	bl	printf
+	ldr	x2, [x28, #:lo12:.LANCHOR117]
+	mov	w1, w20
+	adrp	x0, .LANCHOR158
+	add	x0, x0, :lo12:.LANCHOR158
+	bl	FtlMapWritePage
+	ldr	x5, [x29, 96]
+.L1294:
+	ldr	x1, [x5, #:lo12:.LANCHOR117]
+	lsl	w23, w23, 7
+	mov	w2, w26
+	mov	x0, x25
+	add	x1, x1, x23, sxtw 2
 	bl	ftl_memcpy
-.L1240:
-	add	w26, w26, 1
-	sub	w20, w20, w19
-	add	w21, w21, w19
-	add	x23, x23, x28, sxtw
-	b	.L1236
-.L1238:
-	mov	w2, w28
+.L1295:
+	add	w20, w20, 1
+	sub	w21, w21, w19
+	add	w22, w22, w19
+	add	x25, x25, x26, sxtw
+	b	.L1290
+.L1292:
+	mov	w2, w26
 	mov	w1, 0
-	mov	x0, x23
+	mov	x0, x25
 	bl	ftl_memset
-	b	.L1240
-.L1242:
-	mov	w22, -1
-	b	.L1234
+	b	.L1295
+.L1297:
+	mov	w24, -1
+	b	.L1288
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
 	.section	.text.FtlLoadEctTbl,"ax",@progbits
 	.align	2
@@ -8933,10 +9297,10 @@ FtlLoadEctTbl:
 	mov	w0, 17221
 	movk	w0, 0x4254, lsl 16
 	cmp	w1, w0
-	beq	.L1245
-	adrp	x1, .LC103
+	beq	.L1300
+	adrp	x1, .LC108
 	adrp	x0, .LC71
-	add	x1, x1, :lo12:.LC103
+	add	x1, x1, :lo12:.LC108
 	add	x0, x0, :lo12:.LC71
 	bl	printf
 	ldr	x0, [x19, #:lo12:.LANCHOR127]
@@ -8944,7 +9308,7 @@ FtlLoadEctTbl:
 	ldrh	w2, [x20, #:lo12:.LANCHOR125]
 	lsl	w2, w2, 9
 	bl	ftl_memset
-.L1245:
+.L1300:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -8969,18 +9333,18 @@ Ftl_load_ext_data:
 	mov	w20, 19539
 	movk	w20, 0x4654, lsl 16
 	cmp	w0, w20
-	beq	.L1248
+	beq	.L1303
 	mov	w2, 512
 	mov	w1, 0
 	mov	x0, x21
 	bl	ftl_memset
 	str	w20, [x19, #:lo12:.LANCHOR81]
-.L1248:
+.L1303:
 	ldr	w1, [x19, #:lo12:.LANCHOR81]
 	add	x0, x19, :lo12:.LANCHOR81
 	cmp	w1, w20
 	adrp	x1, .LANCHOR73
-	bne	.L1249
+	bne	.L1304
 	adrp	x2, .LANCHOR68
 	ldr	w3, [x0, 88]
 	str	w3, [x2, #:lo12:.LANCHOR68]
@@ -9015,7 +9379,7 @@ Ftl_load_ext_data:
 	ldr	w2, [x0, 48]
 	adrp	x0, .LANCHOR77
 	str	w2, [x0, #:lo12:.LANCHOR77]
-.L1249:
+.L1304:
 	adrp	x0, .LANCHOR14
 	adrp	x2, .LANCHOR72
 	ldr	w1, [x1, #:lo12:.LANCHOR73]
@@ -9050,195 +9414,191 @@ FtlVpcTblFlush:
 	mov	w2, 19539
 	add	x29, sp, 0
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR108
+	adrp	x25, .LANCHOR123
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR106
+	adrp	x22, .LANCHOR148
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR107
+	adrp	x24, .LANCHOR115
 	stp	x27, x28, [sp, 80]
-	add	x28, x22, :lo12:.LANCHOR106
-	ldr	x21, [x25, #:lo12:.LANCHOR108]
+	add	x28, x22, :lo12:.LANCHOR148
+	ldr	x27, [x25, #:lo12:.LANCHOR123]
 	movk	w2, 0x4654, lsl 16
 	stp	x19, x20, [sp, 16]
-	add	x19, x1, :lo12:.LANCHOR79
-	ldr	x0, [x24, #:lo12:.LANCHOR107]
+	add	x20, x1, :lo12:.LANCHOR79
+	ldr	x0, [x24, #:lo12:.LANCHOR115]
 	adrp	x23, .LANCHOR70
 	ldrh	w1, [x1, #:lo12:.LANCHOR79]
-	adrp	x27, .LANCHOR20
-	stp	x0, x21, [x28, 8]
+	mov	w21, 0
+	stp	x0, x27, [x28, 8]
 	mov	w26, 65535
-	strh	w1, [x21, 2]
+	strh	w1, [x27, 2]
 	mov	w1, -3932
-	strh	w1, [x21]
-	ldr	w1, [x19, 8]
-	stp	w1, wzr, [x21, 4]
+	strh	w1, [x27]
+	ldr	w1, [x20, 8]
+	stp	w1, wzr, [x27, 4]
 	adrp	x1, .LANCHOR39
-	add	x20, x1, :lo12:.LANCHOR39
-	str	wzr, [x21, 12]
+	add	x19, x1, :lo12:.LANCHOR39
+	str	wzr, [x27, 12]
 	str	w2, [x1, #:lo12:.LANCHOR39]
-	mov	w1, 68
+	mov	w1, 72
 	movk	w1, 0x5000, lsl 16
-	str	w1, [x20, 4]
-	ldrh	w1, [x19, 6]
+	str	w1, [x19, 4]
+	ldrh	w1, [x20, 6]
 	adrp	x2, .LANCHOR51
-	strh	w1, [x20, 8]
+	strh	w1, [x19, 8]
 	adrp	x1, .LANCHOR10
 	ldrh	w1, [x1, #:lo12:.LANCHOR10]
-	strb	w1, [x20, 10]
+	strb	w1, [x19, 10]
 	add	x1, x2, :lo12:.LANCHOR51
 	ldrh	w2, [x2, #:lo12:.LANCHOR51]
-	strh	w2, [x20, 14]
+	strh	w2, [x19, 14]
 	ldrh	w2, [x1, 2]
 	ldrb	w3, [x1, 6]
 	ldrb	w1, [x1, 8]
-	strb	w1, [x20, 11]
+	strb	w1, [x19, 11]
 	orr	w2, w3, w2, lsl 6
-	strh	w2, [x20, 16]
+	strh	w2, [x19, 16]
 	adrp	x2, .LANCHOR52
 	add	x1, x2, :lo12:.LANCHOR52
 	ldrh	w2, [x2, #:lo12:.LANCHOR52]
 	ldrb	w3, [x1, 6]
-	strh	w2, [x20, 18]
+	strh	w2, [x19, 18]
 	ldrh	w2, [x1, 2]
 	ldrb	w1, [x1, 8]
-	strb	w1, [x20, 12]
+	strb	w1, [x19, 12]
 	orr	w2, w3, w2, lsl 6
-	strh	w2, [x20, 20]
+	strh	w2, [x19, 20]
 	adrp	x2, .LANCHOR53
 	add	x1, x2, :lo12:.LANCHOR53
 	ldrh	w2, [x2, #:lo12:.LANCHOR53]
 	ldrb	w3, [x1, 6]
-	strh	w2, [x20, 22]
+	strh	w2, [x19, 22]
 	ldrh	w2, [x1, 2]
 	ldrb	w1, [x1, 8]
-	strb	w1, [x20, 13]
+	strb	w1, [x19, 13]
 	adrp	x1, .LANCHOR72
 	orr	w2, w3, w2, lsl 6
-	strh	w2, [x20, 24]
+	strh	w2, [x19, 24]
 	ldr	w1, [x1, #:lo12:.LANCHOR72]
-	str	w1, [x20, 32]
+	str	w1, [x19, 32]
 	ldr	w1, [x23, #:lo12:.LANCHOR70]
-	str	w1, [x20, 40]
+	str	w1, [x19, 40]
 	adrp	x1, .LANCHOR71
 	ldr	w1, [x1, #:lo12:.LANCHOR71]
-	str	w1, [x20, 36]
+	str	w1, [x19, 36]
 	adrp	x1, .LANCHOR23
 	ldrh	w2, [x1, #:lo12:.LANCHOR23]
 	mov	w1, 255
 	bl	ftl_memset
 	ldr	x0, [x28, 8]
-	mov	x1, x20
+	mov	x1, x19
 	mov	w2, 48
-	adrp	x20, .LANCHOR5
+	adrp	x19, .LANCHOR5
 	bl	ftl_memcpy
 	adrp	x1, .LANCHOR42
-	ldrh	w2, [x20, #:lo12:.LANCHOR5]
+	ldrh	w2, [x19, #:lo12:.LANCHOR5]
 	ldr	x0, [x28, 8]
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	lsl	w2, w2, 1
 	add	x0, x0, 48
 	bl	ftl_memcpy
-	ldrh	w0, [x20, #:lo12:.LANCHOR5]
+	ldrh	w1, [x19, #:lo12:.LANCHOR5]
+	mov	x19, x20
+	ldr	x0, [x28, 8]
+	adrp	x20, .LANCHOR20
+	add	x20, x20, :lo12:.LANCHOR20
+	lsr	w2, w1, 3
+	ubfiz	x3, x1, 1, 16
 	adrp	x1, .LANCHOR1
-	ldr	x3, [x28, 8]
-	mov	w20, 0
-	ldr	x1, [x1, #:lo12:.LANCHOR1]
-	lsr	w2, w0, 3
-	ubfiz	x0, x0, 1, 16
+	add	x3, x3, 48
+	and	x3, x3, -4
 	add	w2, w2, 4
-	add	x0, x0, 48
-	and	x0, x0, -4
-	add	x0, x3, x0
+	ldr	x1, [x1, #:lo12:.LANCHOR1]
+	add	x0, x0, x3
 	bl	ftl_memcpy
 	mov	w0, 0
 	bl	FtlUpdateVaildLpn
-	add	x0, x27, :lo12:.LANCHOR20
-	str	x0, [x29, 104]
-.L1253:
-	ldr	x0, [x24, #:lo12:.LANCHOR107]
-	mov	w3, 1
+	str	x20, [x29, 104]
+.L1308:
+	ldrh	w2, [x19, 2]
+	ldrh	w1, [x19]
+	ldr	x0, [x24, #:lo12:.LANCHOR115]
 	str	x0, [x28, 8]
-	mov	w2, w3
-	ldr	x0, [x25, #:lo12:.LANCHOR108]
-	ldrh	w1, [x19, 2]
+	ldr	x0, [x25, #:lo12:.LANCHOR123]
 	str	x0, [x28, 16]
-	ldrh	w0, [x19]
-	orr	w0, w1, w0, lsl 10
-	mov	w1, w3
+	orr	w0, w2, w1, lsl 10
 	str	w0, [x28, 4]
-	mov	x0, x28
-	bl	FlashProgPages
-	ldrh	w0, [x27, #:lo12:.LANCHOR20]
-	ldrh	w1, [x19, 2]
+	ldrh	w0, [x20]
 	sub	w0, w0, #1
-	cmp	w1, w0
-	blt	.L1254
-	ldrh	w0, [x19]
+	cmp	w2, w0
+	blt	.L1309
 	ldrh	w26, [x19, 4]
 	strh	wzr, [x19, 2]
-	strh	w0, [x19, 4]
+	strh	w1, [x19, 4]
 	bl	FtlFreeSysBlkQueueOut
-	strh	w0, [x19]
 	ldr	w1, [x23, #:lo12:.LANCHOR70]
-	mov	w3, 1
 	str	w1, [x19, 8]
 	add	w2, w1, 1
 	str	w2, [x23, #:lo12:.LANCHOR70]
 	ubfiz	w2, w0, 10, 16
 	str	w2, [x28, 4]
-	strh	w0, [x21, 2]
-	mov	w2, w3
-	str	w1, [x21, 4]
+	strh	w0, [x19]
+	strh	w0, [x27, 2]
+	str	w1, [x27, 4]
+.L1309:
+	mov	w3, 1
 	mov	x0, x28
 	mov	w1, w3
+	mov	w2, w3
 	bl	FlashProgPages
-.L1254:
 	ldrh	w0, [x19, 2]
 	ldr	w1, [x28]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	strh	w0, [x19, 2]
 	cmn	w1, #1
-	bne	.L1255
+	bne	.L1310
 	cmp	w0, 1
-	bne	.L1256
-	adrp	x1, .LANCHOR166
+	bne	.L1311
+	adrp	x1, .LANCHOR171
 	adrp	x0, .LC1
-	mov	w2, 1124
-	add	x1, x1, :lo12:.LANCHOR166
+	mov	w2, 1135
+	add	x1, x1, :lo12:.LANCHOR171
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1256:
+.L1311:
 	ldrh	w0, [x19, 2]
 	cmp	w0, 1
-	bne	.L1257
+	bne	.L1312
 	ldr	x0, [x29, 104]
 	ldrh	w0, [x0]
 	sub	w0, w0, #1
 	strh	w0, [x19, 2]
-.L1257:
-	add	w20, w20, 1
-	and	w20, w20, 65535
-	cmp	w20, 3
-	bls	.L1253
-	add	x22, x22, :lo12:.LANCHOR106
-	adrp	x0, .LC104
-	mov	w2, w20
-	add	x0, x0, :lo12:.LC104
+.L1312:
+	add	w21, w21, 1
+	and	w21, w21, 65535
+	cmp	w21, 3
+	bls	.L1308
+	add	x22, x22, :lo12:.LANCHOR148
+	adrp	x0, .LC109
+	mov	w2, w21
+	add	x0, x0, :lo12:.LC109
 	ldr	w1, [x22, 4]
 	bl	printf
-.L1259:
-	b	.L1259
-.L1255:
+.L1314:
+	b	.L1314
+.L1310:
 	cmp	w0, 1
-	beq	.L1253
+	beq	.L1308
+	cmp	w1, 256
+	beq	.L1308
 	mov	w0, 65535
 	cmp	w26, w0
-	beq	.L1260
+	beq	.L1315
 	mov	w1, 1
 	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-.L1260:
+.L1315:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -9271,14 +9631,14 @@ sftl_deinit:
 	adrp	x0, .LANCHOR86
 	ldr	w0, [x0, #:lo12:.LANCHOR86]
 	cmp	w0, 1
-	bne	.L1270
+	bne	.L1328
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	FtlSysFlush
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1270:
+.L1328:
 	mov	w0, 0
 	ret
 	.size	sftl_deinit, .-sftl_deinit
@@ -9297,56 +9657,56 @@ FtlDiscard:
 	str	x23, [sp, 48]
 	ldr	w1, [x1, #:lo12:.LANCHOR34]
 	cmp	w2, w1
-	bhi	.L1281
+	bhi	.L1339
 	cmp	w19, 31
-	bhi	.L1275
-.L1289:
+	bhi	.L1333
+.L1347:
 	mov	w0, 0
-.L1273:
+.L1331:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1275:
+.L1333:
 	adrp	x21, .LANCHOR12
 	ldrh	w1, [x21, #:lo12:.LANCHOR12]
 	udiv	w20, w0, w1
 	msub	w0, w1, w20, w0
 	ands	w0, w0, 65535
-	beq	.L1276
+	beq	.L1334
 	sub	w1, w1, w0
 	add	w20, w20, 1
 	cmp	w1, w19
 	csel	w1, w1, w19, ls
 	sub	w19, w19, w1, uxth
-.L1276:
-	adrp	x22, .LANCHOR167
+.L1334:
+	adrp	x22, .LANCHOR172
 	adrp	x23, .LANCHOR63
-	add	x22, x22, :lo12:.LANCHOR167
+	add	x22, x22, :lo12:.LANCHOR172
 	add	x23, x23, :lo12:.LANCHOR63
 	mov	w0, -1
 	str	w0, [x29, 76]
-.L1277:
+.L1335:
 	ldrh	w0, [x21, #:lo12:.LANCHOR12]
 	cmp	w19, w0
-	bcs	.L1279
-	adrp	x0, .LANCHOR167
-	ldr	w1, [x0, #:lo12:.LANCHOR167]
+	bcs	.L1337
+	adrp	x0, .LANCHOR172
+	ldr	w1, [x0, #:lo12:.LANCHOR172]
 	cmp	w1, 32
-	bls	.L1289
-	str	wzr, [x0, #:lo12:.LANCHOR167]
+	bls	.L1347
+	str	wzr, [x0, #:lo12:.LANCHOR172]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L1289
-.L1279:
+	b	.L1347
+.L1337:
 	mov	w2, 0
 	add	x1, x29, 72
 	mov	w0, w20
 	bl	log2phys
 	ldr	w0, [x29, 72]
 	cmn	w0, #1
-	beq	.L1278
+	beq	.L1336
 	ldr	w0, [x22]
 	mov	w2, 1
 	add	x1, x29, 76
@@ -9361,14 +9721,14 @@ FtlDiscard:
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L1278:
+.L1336:
 	ldrh	w0, [x21, #:lo12:.LANCHOR12]
 	add	w20, w20, 1
 	sub	w19, w19, w0
-	b	.L1277
-.L1281:
+	b	.L1335
+.L1339:
 	mov	w0, -1
-	b	.L1273
+	b	.L1331
 	.size	FtlDiscard, .-FtlDiscard
 	.section	.text.FtlVpcCheckAndModify,"ax",@progbits
 	.align	2
@@ -9376,102 +9736,109 @@ FtlDiscard:
 	.type	FtlVpcCheckAndModify, %function
 FtlVpcCheckAndModify:
 	stp	x29, x30, [sp, -96]!
-	adrp	x1, .LANCHOR168
+	adrp	x1, .LANCHOR173
 	adrp	x0, .LC94
-	add	x1, x1, :lo12:.LANCHOR168
+	add	x1, x1, :lo12:.LANCHOR173
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	add	x0, x0, :lo12:.LC94
-	stp	x21, x22, [sp, 32]
-	adrp	x20, .LANCHOR128
 	stp	x23, x24, [sp, 48]
-	adrp	x21, .LANCHOR61
+	adrp	x24, .LANCHOR128
+	stp	x21, x22, [sp, 32]
+	adrp	x20, .LANCHOR61
 	str	x25, [sp, 64]
 	bl	printf
 	adrp	x0, .LANCHOR6
 	mov	w19, 0
-	add	x21, x21, :lo12:.LANCHOR61
+	add	x20, x20, :lo12:.LANCHOR61
 	mov	w1, 0
 	ldrh	w2, [x0, #:lo12:.LANCHOR6]
-	ldr	x0, [x20, #:lo12:.LANCHOR128]
+	ldr	x0, [x24, #:lo12:.LANCHOR128]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.L1291:
-	ldr	w0, [x21]
+.L1349:
+	ldr	w0, [x20]
 	cmp	w19, w0
-	bcc	.L1293
-	adrp	x22, .LANCHOR5
-	adrp	x23, .LC105
-	add	x22, x22, :lo12:.LANCHOR5
-	add	x23, x23, :lo12:.LC105
+	bcc	.L1351
+	adrp	x21, .LANCHOR5
+	adrp	x22, .LC110
+	add	x21, x21, :lo12:.LANCHOR5
+	add	x22, x22, :lo12:.LC110
 	mov	w19, 0
 	adrp	x25, .LANCHOR42
-	mov	w24, 65535
-.L1294:
-	ldrh	w0, [x22]
+	mov	w23, 65535
+.L1352:
+	ldrh	w0, [x21]
 	cmp	w0, w19
-	bhi	.L1298
+	bhi	.L1357
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1293:
+.L1351:
 	mov	w2, 0
 	add	x1, x29, 92
 	mov	w0, w19
 	bl	log2phys
 	ldr	w0, [x29, 92]
 	cmn	w0, #1
-	beq	.L1292
+	beq	.L1350
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-	ldr	x2, [x20, #:lo12:.LANCHOR128]
+	ldr	x2, [x24, #:lo12:.LANCHOR128]
 	ubfiz	x0, x0, 1, 16
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-.L1292:
+.L1350:
 	add	w19, w19, 1
-	b	.L1291
-.L1298:
+	b	.L1349
+.L1357:
 	ldr	x0, [x25, #:lo12:.LANCHOR42]
-	ubfiz	x21, x19, 1, 16
-	ldrh	w2, [x0, x21]
-	ldr	x0, [x20, #:lo12:.LANCHOR128]
-	ldrh	w3, [x0, x21]
+	ubfiz	x20, x19, 1, 16
+	ldrh	w2, [x0, x20]
+	ldr	x0, [x24, #:lo12:.LANCHOR128]
+	ldrh	w3, [x0, x20]
 	cmp	w2, w3
-	beq	.L1296
-	cmp	w2, w24
-	beq	.L1296
+	beq	.L1354
+	cmp	w2, w23
+	beq	.L1354
 	mov	w1, w19
-	mov	x0, x23
+	mov	x0, x22
 	bl	printf
 	adrp	x0, .LANCHOR51
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w19
-	beq	.L1296
+	beq	.L1354
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w19
-	beq	.L1296
+	beq	.L1354
 	adrp	x0, .LANCHOR52
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
-	beq	.L1296
-	ldr	x0, [x20, #:lo12:.LANCHOR128]
-	ldrh	w1, [x0, x21]
+	beq	.L1354
 	ldr	x0, [x25, #:lo12:.LANCHOR42]
-	strh	w1, [x0, x21]
-	mov	w0, w19
-	bl	update_vpc_list
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
-.L1296:
+	ldrh	w1, [x0, x20]
+	cbnz	w1, .L1356
+	ldr	x1, [x24, #:lo12:.LANCHOR128]
+	ldrh	w1, [x1, x20]
+	strh	w1, [x0, x20]
+.L1354:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1294
+	b	.L1352
+.L1356:
+	ldr	x1, [x24, #:lo12:.LANCHOR128]
+	ldrh	w1, [x1, x20]
+	strh	w1, [x0, x20]
+	mov	w0, w19
+	bl	update_vpc_list
+	b	.L1354
 	.size	FtlVpcCheckAndModify, .-FtlVpcCheckAndModify
 	.section	.text.allocate_new_data_superblock,"ax",@progbits
 	.align	2
@@ -9487,46 +9854,46 @@ allocate_new_data_superblock:
 	adrp	x0, .LANCHOR5
 	ldrh	w0, [x0, #:lo12:.LANCHOR5]
 	cmp	w0, w19
-	bcs	.L1304
-	adrp	x1, .LANCHOR169
+	bcs	.L1363
+	adrp	x1, .LANCHOR174
 	adrp	x0, .LC1
-	mov	w2, 2684
-	add	x1, x1, :lo12:.LANCHOR169
+	mov	w2, 2714
+	add	x1, x1, :lo12:.LANCHOR174
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1304:
+.L1363:
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1305
+	beq	.L1364
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x19, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1306
+	cbz	w0, .L1365
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-.L1305:
-	adrp	x1, .LANCHOR150
+.L1364:
+	adrp	x1, .LANCHOR142
 	mov	w0, 1
 	strb	w0, [x21, 8]
 	mov	w2, 65535
-	ldrh	w0, [x1, #:lo12:.LANCHOR150]
+	ldrh	w0, [x1, #:lo12:.LANCHOR142]
 	mov	x20, x1
 	cmp	w0, w2
-	beq	.L1307
+	beq	.L1366
 	cmp	w19, w0
-	bne	.L1308
+	bne	.L1367
 	adrp	x2, .LANCHOR42
 	ubfiz	x1, x0, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR42]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1309
-.L1308:
+	cbz	w1, .L1368
+.L1367:
 	bl	update_vpc_list
-.L1309:
+.L1368:
 	mov	w0, -1
-	strh	w0, [x20, #:lo12:.LANCHOR150]
-.L1307:
+	strh	w0, [x20, #:lo12:.LANCHOR142]
+.L1366:
 	mov	x0, x21
 	bl	allocate_data_superblock
 	bl	l2p_flush
@@ -9538,10 +9905,10 @@ allocate_new_data_superblock:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1306:
+.L1365:
 	mov	w0, w19
 	bl	INSERT_FREE_LIST
-	b	.L1305
+	b	.L1364
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
 	.section	.text.FtlProgPages,"ax",@progbits
 	.align	2
@@ -9567,19 +9934,19 @@ FtlProgPages:
 	add	x24, x24, :lo12:.LANCHOR19
 	add	x23, x23, :lo12:.LANCHOR81
 	bl	FlashProgPages
-.L1315:
+.L1374:
 	cmp	x20, x21
-	beq	.L1322
+	beq	.L1381
 	sub	x22, x20, #4
 	adrp	x25, .LANCHOR42
-	b	.L1323
-.L1318:
+	b	.L1382
+.L1377:
 	ldr	w0, [x20]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	ldrh	w1, [x19]
 	cmp	w1, w0, uxth
-	bne	.L1316
+	bne	.L1375
 	ldr	x2, [x25, #:lo12:.LANCHOR42]
 	ubfiz	x1, x1, 1, 16
 	ldrh	w3, [x19, 4]
@@ -9590,12 +9957,12 @@ FtlProgPages:
 	ldrh	w0, [x24]
 	strh	w0, [x19, 2]
 	strh	wzr, [x19, 4]
-.L1316:
+.L1375:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1317
+	cbnz	w0, .L1376
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.L1317:
+.L1376:
 	ldr	w0, [x23, 96]
 	add	w0, w0, 1
 	str	w0, [x23, 96]
@@ -9611,22 +9978,22 @@ FtlProgPages:
 	ldrb	w3, [x19, 9]
 	mov	x0, x22
 	bl	FlashProgPages
-.L1323:
+.L1382:
 	ldr	w0, [x20, -4]
 	cmn	w0, #1
-	beq	.L1318
+	beq	.L1377
 	adrp	x0, .LANCHOR3
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1319
-	adrp	x1, .LANCHOR170
+	bcc	.L1378
+	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
-	mov	w2, 933
-	add	x1, x1, :lo12:.LANCHOR170
+	mov	w2, 955
+	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1319:
+.L1378:
 	add	x1, x29, 96
 	ldr	w0, [x22, 4]
 	mov	w2, 1
@@ -9640,35 +10007,35 @@ FtlProgPages:
 	and	w1, w0, 65535
 	mov	w22, w1
 	cmn	w3, #1
-	beq	.L1320
+	beq	.L1379
 	adrp	x2, .LANCHOR42
 	ubfiz	x0, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR42]
 	ldrh	w0, [x2, x0]
-	cbnz	w0, .L1321
-	adrp	x0, .LC106
+	cbnz	w0, .L1380
+	adrp	x0, .LC111
 	mov	w2, 0
-	add	x0, x0, :lo12:.LC106
+	add	x0, x0, :lo12:.LC111
 	bl	printf
-.L1321:
+.L1380:
 	mov	w0, w22
 	bl	decrement_vpc_count
-.L1320:
+.L1379:
 	add	x20, x20, 32
-	b	.L1315
-.L1322:
+	b	.L1374
+.L1381:
 	adrp	x0, .LANCHOR3
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1314
-	adrp	x1, .LANCHOR170
+	bcc	.L1373
+	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
-	mov	w2, 948
-	add	x1, x1, :lo12:.LANCHOR170
+	mov	w2, 970
+	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1314:
+.L1373:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9694,18 +10061,18 @@ FtlGcFreeTempBlock:
 	cmp	w20, w2
 	str	x27, [sp, 80]
 	ldrh	w1, [x21, #:lo12:.LANCHOR19]
-	bne	.L1330
-.L1340:
-	adrp	x0, .LANCHOR152
+	bne	.L1389
+.L1399:
+	adrp	x0, .LANCHOR144
 	ldrh	w2, [x19, #:lo12:.LANCHOR53]
 	mov	w1, 65535
-	str	wzr, [x0, #:lo12:.LANCHOR152]
+	str	wzr, [x0, #:lo12:.LANCHOR144]
 	cmp	w2, w1
 	add	x0, x19, :lo12:.LANCHOR53
-	bne	.L1353
-.L1356:
+	bne	.L1412
+.L1415:
 	mov	w0, 0
-.L1329:
+.L1388:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9713,35 +10080,35 @@ FtlGcFreeTempBlock:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1330:
-	cbz	w0, .L1333
-	adrp	x0, .LANCHOR156
-	ldrh	w3, [x0, #:lo12:.LANCHOR156]
+.L1389:
+	cbz	w0, .L1392
+	adrp	x0, .LANCHOR162
+	ldrh	w3, [x0, #:lo12:.LANCHOR162]
 	cmp	w3, w2
-	beq	.L1334
-.L1335:
+	beq	.L1393
+.L1394:
 	mov	w1, 2
-.L1333:
+.L1392:
 	add	x0, x19, :lo12:.LANCHOR53
 	bl	FtlGcScanTempBlk
 	str	w0, [x29, 108]
 	cmn	w0, #1
-	beq	.L1336
+	beq	.L1395
 	adrp	x0, .LANCHOR43
 	ubfiz	x20, x20, 1, 16
 	ldr	x1, [x0, #:lo12:.LANCHOR43]
 	ldrh	w0, [x1, x20]
 	cmp	w0, 4
-	bls	.L1337
+	bls	.L1396
 	sub	w0, w0, #5
 	strh	w0, [x1, x20]
 	mov	w0, 1
 	bl	FtlEctTblFlush
-.L1337:
-	adrp	x0, .LANCHOR152
+.L1396:
+	adrp	x0, .LANCHOR144
 	mov	x19, x0
-	ldr	w1, [x0, #:lo12:.LANCHOR152]
-	cbnz	w1, .L1338
+	ldr	w1, [x0, #:lo12:.LANCHOR144]
+	cbnz	w1, .L1397
 	adrp	x0, .LANCHOR81
 	add	x0, x0, :lo12:.LANCHOR81
 	ldr	w1, [x0, 96]
@@ -9751,50 +10118,50 @@ FtlGcFreeTempBlock:
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
-.L1338:
-	str	wzr, [x19, #:lo12:.LANCHOR152]
-.L1349:
+.L1397:
+	str	wzr, [x19, #:lo12:.LANCHOR144]
+.L1408:
 	mov	w0, 1
-	b	.L1329
-.L1334:
-	strh	wzr, [x0, #:lo12:.LANCHOR156]
+	b	.L1388
+.L1393:
+	strh	wzr, [x0, #:lo12:.LANCHOR162]
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 17
-	bhi	.L1335
-	b	.L1333
-.L1336:
-	adrp	x0, .LANCHOR156
-	ldrh	w1, [x0, #:lo12:.LANCHOR156]
+	bhi	.L1394
+	b	.L1392
+.L1395:
+	adrp	x0, .LANCHOR162
+	ldrh	w1, [x0, #:lo12:.LANCHOR162]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1349
-	b	.L1340
-.L1353:
+	bne	.L1408
+	b	.L1399
+.L1412:
 	ldrb	w0, [x0, 7]
 	adrp	x20, .LANCHOR97
 	ldrh	w2, [x21, #:lo12:.LANCHOR19]
 	ldrh	w1, [x20, #:lo12:.LANCHOR97]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L1341
-	adrp	x1, .LANCHOR171
+	beq	.L1400
+	adrp	x1, .LANCHOR176
 	adrp	x0, .LC1
 	mov	w2, 162
-	add	x1, x1, :lo12:.LANCHOR171
+	add	x1, x1, :lo12:.LANCHOR176
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1341:
+.L1400:
 	add	x0, x19, :lo12:.LANCHOR53
 	adrp	x23, .LANCHOR42
 	ldrh	w3, [x21, #:lo12:.LANCHOR19]
 	adrp	x25, .LANCHOR61
 	ldrh	w2, [x19, #:lo12:.LANCHOR53]
-	adrp	x26, .LANCHOR171
+	adrp	x26, .LANCHOR176
 	ldrb	w0, [x0, 7]
 	add	x25, x25, :lo12:.LANCHOR61
 	ldr	x1, [x23, #:lo12:.LANCHOR42]
-	add	x26, x26, :lo12:.LANCHOR171
+	add	x26, x26, :lo12:.LANCHOR176
 	mov	w21, 0
 	mul	w0, w0, w3
 	strh	w0, [x1, x2, lsl 1]
@@ -9803,19 +10170,19 @@ FtlGcFreeTempBlock:
 	ldr	w2, [x1, #:lo12:.LANCHOR67]
 	add	w0, w0, w2
 	str	w0, [x1, #:lo12:.LANCHOR67]
-.L1342:
+.L1401:
 	ldrh	w0, [x20, #:lo12:.LANCHOR97]
 	cmp	w0, w21
-	bhi	.L1346
+	bhi	.L1405
 	mov	w0, -1
 	bl	decrement_vpc_count
 	ldrh	w0, [x19, #:lo12:.LANCHOR53]
 	ldr	x2, [x23, #:lo12:.LANCHOR42]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1347
+	cbz	w1, .L1406
 	bl	INSERT_DATA_LIST
-.L1348:
+.L1407:
 	adrp	x0, .LANCHOR95
 	mov	w21, -1
 	strh	wzr, [x20, #:lo12:.LANCHOR97]
@@ -9823,20 +10190,20 @@ FtlGcFreeTempBlock:
 	strh	wzr, [x0, #:lo12:.LANCHOR95]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
+	adrp	x0, .LANCHOR80
+	strh	w21, [x0, #:lo12:.LANCHOR80]
 	adrp	x0, .LANCHOR48
 	ldrh	w1, [x0, #:lo12:.LANCHOR48]
 	adrp	x0, .LANCHOR78
 	ldrh	w0, [x0, #:lo12:.LANCHOR78]
 	add	w0, w0, w0, lsl 1
 	cmp	w1, w0, lsr 2
-	ble	.L1356
-	adrp	x0, .LANCHOR80
-	mov	w1, 20
-	strh	w21, [x0, #:lo12:.LANCHOR80]
+	ble	.L1415
 	adrp	x0, .LANCHOR82
+	mov	w1, 20
 	strh	w1, [x0, #:lo12:.LANCHOR82]
-	b	.L1356
-.L1346:
+	b	.L1415
+.L1405:
 	adrp	x0, .LANCHOR98
 	mov	w24, 12
 	ldr	x27, [x0, #:lo12:.LANCHOR98]
@@ -9845,13 +10212,13 @@ FtlGcFreeTempBlock:
 	add	x22, x27, x24
 	ldr	w1, [x22, 8]
 	cmp	w1, w0
-	bcc	.L1343
+	bcc	.L1402
 	adrp	x0, .LC1
 	mov	w2, 168
 	mov	x1, x26
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1343:
+.L1402:
 	ldr	w0, [x22, 8]
 	add	x1, x29, 108
 	mov	w2, 0
@@ -9859,7 +10226,7 @@ FtlGcFreeTempBlock:
 	ldr	w0, [x27, x24]
 	ldr	w1, [x29, 108]
 	cmp	w0, w1
-	bne	.L1344
+	bne	.L1403
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	mov	w24, w0
@@ -9868,21 +10235,21 @@ FtlGcFreeTempBlock:
 	add	x1, x22, 4
 	bl	log2phys
 	mov	w0, w24
-.L1355:
+.L1414:
 	bl	decrement_vpc_count
-.L1345:
+.L1404:
 	add	w21, w21, 1
 	and	w21, w21, 65535
-	b	.L1342
-.L1344:
+	b	.L1401
+.L1403:
 	ldr	w0, [x22, 4]
 	cmp	w1, w0
-	beq	.L1345
+	beq	.L1404
 	ldrh	w0, [x19, #:lo12:.LANCHOR53]
-	b	.L1355
-.L1347:
+	b	.L1414
+.L1406:
 	bl	INSERT_FREE_LIST
-	b	.L1348
+	b	.L1407
 	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
 	.section	.text.FtlGcPageRecovery,"ax",@progbits
 	.align	2
@@ -9901,15 +10268,15 @@ FtlGcPageRecovery:
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR19]
 	cmp	w1, w0
-	bcc	.L1357
-	adrp	x0, .LANCHOR144
-	add	x0, x0, :lo12:.LANCHOR144
+	bcc	.L1416
+	adrp	x0, .LANCHOR140
+	add	x0, x0, :lo12:.LANCHOR140
 	bl	FtlMapBlkWriteDump_data
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
-	adrp	x0, .LANCHOR152
-	str	wzr, [x0, #:lo12:.LANCHOR152]
-.L1357:
+	adrp	x0, .LANCHOR144
+	str	wzr, [x0, #:lo12:.LANCHOR144]
+.L1416:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -9920,12 +10287,12 @@ FtlGcPageRecovery:
 	.type	FtlPowerLostRecovery, %function
 FtlPowerLostRecovery:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR162
+	adrp	x0, .LANCHOR168
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	adrp	x19, .LANCHOR51
 	add	x19, x19, :lo12:.LANCHOR51
-	str	wzr, [x0, #:lo12:.LANCHOR162]
+	str	wzr, [x0, #:lo12:.LANCHOR168]
 	mov	x0, x19
 	bl	FtlRecoverySuperblock
 	mov	x0, x19
@@ -9955,32 +10322,32 @@ Ftl_gc_temp_data_write_back:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR89
-	adrp	x20, .LANCHOR121
+	adrp	x20, .LANCHOR113
 	ldr	w1, [x19, #:lo12:.LANCHOR89]
 	add	x19, x19, :lo12:.LANCHOR89
-	ldr	x0, [x20, #:lo12:.LANCHOR121]
+	ldr	x0, [x20, #:lo12:.LANCHOR113]
 	bl	FlashProgPages
 	mov	w11, 0
-.L1363:
+.L1422:
 	ldr	w1, [x19]
 	cmp	w11, w1
-	bcc	.L1366
-	ldr	x0, [x20, #:lo12:.LANCHOR121]
+	bcc	.L1425
+	ldr	x0, [x20, #:lo12:.LANCHOR113]
 	bl	FtlGcBufFree
 	str	wzr, [x19]
 	adrp	x0, .LANCHOR53+4
 	ldrh	w0, [x0, #:lo12:.LANCHOR53+4]
-	cbnz	w0, .L1367
+	cbnz	w0, .L1426
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
-	b	.L1369
-.L1366:
-	ldr	x2, [x20, #:lo12:.LANCHOR121]
+	b	.L1428
+.L1425:
+	ldr	x2, [x20, #:lo12:.LANCHOR113]
 	ubfiz	x0, x11, 5, 16
 	add	x1, x2, x0
 	ldr	w2, [x2, x0]
 	cmn	w2, #1
-	bne	.L1364
+	bne	.L1423
 	adrp	x0, .LANCHOR53
 	adrp	x3, .LANCHOR42
 	ldrh	w4, [x0, #:lo12:.LANCHOR53]
@@ -9997,23 +10364,23 @@ Ftl_gc_temp_data_write_back:
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
 	bl	FtlGcPageVarInit
-.L1369:
+.L1428:
 	mov	w0, 1
-.L1362:
+.L1421:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1364:
+.L1423:
 	ldr	x0, [x1, 16]
 	ldr	w1, [x1, 4]
 	ldp	w2, w0, [x0, 8]
 	bl	FtlGcUpdatePage
 	add	w11, w11, 1
 	and	w11, w11, 65535
-	b	.L1363
-.L1367:
+	b	.L1422
+.L1426:
 	mov	w0, 0
-	b	.L1362
+	b	.L1421
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
 	.section	.text.Ftl_get_new_temp_ppa,"ax",@progbits
 	.align	2
@@ -10028,11 +10395,11 @@ Ftl_get_new_temp_ppa:
 	mov	x19, x0
 	ldrh	w3, [x0, #:lo12:.LANCHOR53]
 	cmp	w3, w2
-	beq	.L1371
+	beq	.L1430
 	add	x1, x0, :lo12:.LANCHOR53
 	ldrh	w0, [x1, 4]
-	cbnz	w0, .L1372
-.L1371:
+	cbnz	w0, .L1431
+.L1430:
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
 	add	x0, x19, :lo12:.LANCHOR53
@@ -10046,377 +10413,523 @@ Ftl_get_new_temp_ppa:
 	mov	w0, 0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1372:
+.L1431:
 	add	x0, x19, :lo12:.LANCHOR53
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	get_new_active_ppa
 	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
+	.section	.text.FtlSysBlkInit,"ax",@progbits
+	.align	2
+	.global	FtlSysBlkInit
+	.type	FtlSysBlkInit, %function
+FtlSysBlkInit:
+	stp	x29, x30, [sp, -64]!
+	adrp	x0, .LANCHOR4
+	add	x29, sp, 0
+	ldrh	w0, [x0, #:lo12:.LANCHOR4]
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR167
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	strh	wzr, [x20, #:lo12:.LANCHOR167]
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlScanSysBlk
+	adrp	x0, .LANCHOR79
+	ldrh	w1, [x0, #:lo12:.LANCHOR79]
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L1434
+.L1436:
+	mov	w23, -1
+.L1433:
+	mov	w0, w23
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	ret
+.L1434:
+	bl	FtlLoadSysInfo
+	mov	w23, w0
+	cbnz	w0, .L1436
+	bl	FtlLoadMapInfo
+	bl	FtlLoadVonderInfo
+	bl	Ftl_load_ext_data
+	bl	FtlLoadEctTbl
+	bl	FtlFreeSysBLkSort
+	bl	SupperBlkListInit
+	bl	FtlPowerLostRecovery
+	mov	w0, 1
+	bl	FtlUpdateVaildLpn
+	adrp	x0, .LANCHOR33
+	mov	w1, 0
+	ldrh	w3, [x0, #:lo12:.LANCHOR33]
+	adrp	x0, .LANCHOR55
+	ldr	x0, [x0, #:lo12:.LANCHOR55]
+	add	x0, x0, 4
+.L1437:
+	cmp	w1, w3
+	bge	.L1442
+	ldr	w2, [x0], 16
+	tbz	w2, #31, .L1438
+.L1442:
+	adrp	x0, .LANCHOR39
+	add	x4, x0, :lo12:.LANCHOR39
+	cmp	w1, w3
+	mov	x19, x0
+	adrp	x22, .LANCHOR51
+	ldrh	w2, [x4, 28]
+	add	w2, w2, 1
+	strh	w2, [x4, 28]
+	bge	.L1447
+.L1439:
+	add	x21, x22, :lo12:.LANCHOR51
+	adrp	x24, .LANCHOR52
+	mov	x0, x21
+	add	x20, x24, :lo12:.LANCHOR52
+	bl	FtlSuperblockPowerLostFix
+	mov	x0, x20
+	bl	FtlSuperblockPowerLostFix
+	adrp	x0, .LANCHOR42
+	ldrh	w3, [x21, 4]
+	ldr	x1, [x0, #:lo12:.LANCHOR42]
+	ldrh	w0, [x22, #:lo12:.LANCHOR51]
+	lsl	x0, x0, 1
+	ldrh	w2, [x1, x0]
+	sub	w2, w2, w3
+	adrp	x3, .LANCHOR19
+	strh	w2, [x1, x0]
+	strb	wzr, [x21, 6]
+	ldrh	w0, [x3, #:lo12:.LANCHOR19]
+	strh	w0, [x21, 2]
+	ldrh	w0, [x24, #:lo12:.LANCHOR52]
+	strh	wzr, [x21, 4]
+	ldrh	w4, [x20, 4]
+	lsl	x0, x0, 1
+	ldrh	w2, [x1, x0]
+	sub	w2, w2, w4
+	strh	w2, [x1, x0]
+	strb	wzr, [x20, 6]
+	ldrh	w0, [x3, #:lo12:.LANCHOR19]
+	strh	w0, [x20, 2]
+	add	x0, x19, :lo12:.LANCHOR39
+	strh	wzr, [x20, 4]
+	ldrh	w1, [x0, 30]
+	add	w1, w1, 1
+	strh	w1, [x0, 30]
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	bl	FtlVpcTblFlush
+	b	.L1443
+.L1438:
+	add	w1, w1, 1
+	b	.L1437
+.L1447:
+	ldrh	w0, [x20, #:lo12:.LANCHOR167]
+	cbnz	w0, .L1439
+.L1443:
+	bl	FtlVpcCheckAndModify
+	add	x20, x22, :lo12:.LANCHOR51
+	ldrh	w0, [x22, #:lo12:.LANCHOR51]
+	mov	w1, 65535
+	cmp	w0, w1
+	beq	.L1433
+	ldrh	w1, [x20, 4]
+	cbnz	w1, .L1433
+	adrp	x21, .LANCHOR52
+	add	x19, x21, :lo12:.LANCHOR52
+	ldrh	w1, [x19, 4]
+	cbnz	w1, .L1433
+	bl	FtlGcRefreshBlock
+	ldrh	w0, [x21, #:lo12:.LANCHOR52]
+	bl	FtlGcRefreshBlock
+	bl	FtlVpcTblFlush
+	mov	x0, x20
+	bl	allocate_new_data_superblock
+	mov	x0, x19
+	bl	allocate_new_data_superblock
+	b	.L1433
+	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.section	.text.rk_ftl_garbage_collect,"ax",@progbits
 	.align	2
 	.global	rk_ftl_garbage_collect
 	.type	rk_ftl_garbage_collect, %function
 rk_ftl_garbage_collect:
-	stp	x29, x30, [sp, -192]!
+	stp	x29, x30, [sp, -176]!
+	adrp	x1, .LANCHOR108
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR117
+	ldr	w2, [x1, #:lo12:.LANCHOR108]
 	stp	x19, x20, [sp, 16]
-	ldr	w1, [x22, #:lo12:.LANCHOR117]
+	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w1, .L1446
+	str	x1, [x29, 144]
+	cbnz	w2, .L1522
 	adrp	x1, .LANCHOR45
 	ldrh	w1, [x1, #:lo12:.LANCHOR45]
 	cmp	w1, 47
-	bls	.L1446
-	mov	w24, w0
-	adrp	x0, .LANCHOR156
-	ldrh	w1, [x0, #:lo12:.LANCHOR156]
+	bls	.L1522
+	str	w0, [x29, 152]
+	adrp	x0, .LANCHOR162
+	ldrh	w1, [x0, #:lo12:.LANCHOR162]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1376
-.L1379:
+	bne	.L1451
+.L1454:
 	adrp	x0, .LANCHOR100
 	mov	w3, 65535
 	ldrh	w2, [x0, #:lo12:.LANCHOR100]
 	cmp	w2, w3
-	bne	.L1377
-.L1378:
-	adrp	x2, .LANCHOR84
+	bne	.L1452
+.L1453:
+	bl	FtlReadRefresh
 	adrp	x19, .LANCHOR80
-	mov	w20, 65535
-	ldr	w1, [x2, #:lo12:.LANCHOR84]
-	ldrh	w0, [x19, #:lo12:.LANCHOR80]
-	add	w1, w1, 1
-	add	w1, w1, w24, lsl 7
-	str	w1, [x2, #:lo12:.LANCHOR84]
-	cmp	w0, w20
-	bne	.L1380
+	adrp	x2, .LANCHOR84
+	ldr	w1, [x29, 152]
+	mov	w21, 65535
+	ldr	w0, [x2, #:lo12:.LANCHOR84]
+	add	w0, w0, 1
+	add	w0, w0, w1, lsl 7
+	ldrh	w1, [x19, #:lo12:.LANCHOR80]
+	str	w0, [x2, #:lo12:.LANCHOR84]
+	cmp	w1, w21
+	bne	.L1455
 	adrp	x3, .LANCHOR53
-	ldrh	w20, [x3, #:lo12:.LANCHOR53]
-	cmp	w20, w0
-	bne	.L1449
-	adrp	x0, .LANCHOR99
-	ldrh	w21, [x0, #:lo12:.LANCHOR99]
-	cmp	w21, w20
-	bne	.L1380
-	adrp	x23, .LANCHOR48
+	ldrh	w21, [x3, #:lo12:.LANCHOR53]
+	cmp	w21, w1
+	bne	.L1525
+	adrp	x1, .LANCHOR99
+	ldrh	w20, [x1, #:lo12:.LANCHOR99]
+	cmp	w20, w21
+	bne	.L1455
+	adrp	x22, .LANCHOR48
 	mov	w3, 1024
-	ldrh	w0, [x23, #:lo12:.LANCHOR48]
-	cmp	w0, 24
-	mov	w0, 5120
-	csel	w0, w0, w3, cc
-	cmp	w1, w0
-	bls	.L1452
-	adrp	x0, .LANCHOR172
+	ldrh	w1, [x22, #:lo12:.LANCHOR48]
+	cmp	w1, 24
+	mov	w1, 5120
+	csel	w1, w1, w3, cc
+	cmp	w0, w1
+	bls	.L1528
+	adrp	x0, .LANCHOR177
 	str	wzr, [x2, #:lo12:.LANCHOR84]
-	strh	wzr, [x0, #:lo12:.LANCHOR172]
+	strh	wzr, [x0, #:lo12:.LANCHOR177]
 	bl	GetSwlReplaceBlock
-	and	w20, w0, 65535
-	cmp	w20, w21
-	bne	.L1453
+	and	w21, w0, 65535
+	cmp	w21, w20
+	bne	.L1529
 	adrp	x5, .LANCHOR83
-	ldrh	w1, [x23, #:lo12:.LANCHOR48]
+	ldrh	w1, [x22, #:lo12:.LANCHOR48]
 	ldrh	w0, [x5, #:lo12:.LANCHOR83]
 	cmp	w1, w0
-	bcs	.L1383
+	bcs	.L1458
 	mov	w0, 64
 	bl	List_get_gc_head_node
 	and	w0, w0, 65535
-	cmp	w0, w20
-	beq	.L1385
+	cmp	w0, w21
+	beq	.L1460
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x0, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x0]
 	cmp	w0, 7
-	bhi	.L1386
+	bhi	.L1461
 	mov	w0, 0
 	bl	List_get_gc_head_node
-	and	w21, w0, 65535
+	and	w20, w0, 65535
 	mov	w0, 128
 	strh	w0, [x5, #:lo12:.LANCHOR83]
-	cmp	w21, w20
-	bne	.L1382
-.L1385:
+	cmp	w20, w21
+	bne	.L1457
+.L1460:
 	bl	FtlGcReFreshBadBlk
-.L1380:
-	cmp	w24, 0
+.L1455:
+	ldr	w1, [x29, 152]
 	mov	w0, 65535
-	ccmp	w20, w0, 0, eq
-	bne	.L1388
+	cmp	w1, 0
+	ccmp	w21, w0, 0, eq
+	bne	.L1463
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 24
-	bhi	.L1454
+	bhi	.L1530
 	adrp	x1, .LANCHOR19
 	cmp	w0, 16
-	ldrh	w21, [x1, #:lo12:.LANCHOR19]
-	bls	.L1390
-	lsr	w21, w21, 5
-.L1389:
+	ldrh	w20, [x1, #:lo12:.LANCHOR19]
+	bls	.L1465
+	lsr	w20, w20, 5
+.L1464:
 	adrp	x2, .LANCHOR82
 	mov	x3, x2
 	ldrh	w1, [x2, #:lo12:.LANCHOR82]
 	cmp	w1, w0
-	bcs	.L1393
+	bcs	.L1468
 	adrp	x0, .LANCHOR53
 	mov	w1, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w1
-	bne	.L1394
+	bne	.L1469
 	adrp	x1, .LANCHOR99
 	ldrh	w1, [x1, #:lo12:.LANCHOR99]
 	cmp	w1, w0
-	bne	.L1394
-	adrp	x0, .LANCHOR172
-	ldrh	w0, [x0, #:lo12:.LANCHOR172]
-	cbnz	w0, .L1395
+	bne	.L1469
+	adrp	x0, .LANCHOR177
+	ldrh	w0, [x0, #:lo12:.LANCHOR177]
+	cbnz	w0, .L1470
 	adrp	x1, .LANCHOR61
 	adrp	x4, .LANCHOR59
 	ldr	w1, [x1, #:lo12:.LANCHOR61]
 	ldr	w4, [x4, #:lo12:.LANCHOR59]
 	add	w1, w1, w1, lsl 1
 	cmp	w4, w1, lsr 2
-	bcs	.L1396
-.L1395:
+	bcs	.L1471
+.L1470:
 	adrp	x1, .LANCHOR78
 	ldrh	w1, [x1, #:lo12:.LANCHOR78]
 	add	w1, w1, w1, lsl 1
 	asr	w1, w1, 2
 	strh	w1, [x3, #:lo12:.LANCHOR82]
-.L1397:
+.L1472:
 	adrp	x1, .LANCHOR87
 	str	wzr, [x1, #:lo12:.LANCHOR87]
-.L1374:
+.L1449:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 192
+	ldp	x29, x30, [sp], 176
 	ret
-.L1376:
+.L1451:
 	adrp	x1, .LANCHOR53
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	beq	.L1379
+	beq	.L1454
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
-	cbz	w0, .L1379
+	cbz	w0, .L1454
 	mov	w0, 1
-	b	.L1374
-.L1377:
+	b	.L1449
+.L1452:
 	adrp	x1, .LANCHOR99
 	ldrh	w4, [x1, #:lo12:.LANCHOR99]
 	cmp	w4, w3
-	bne	.L1378
+	bne	.L1453
 	strh	w2, [x1, #:lo12:.LANCHOR99]
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR100]
-	b	.L1378
-.L1386:
+	b	.L1453
+.L1461:
 	mov	w0, 64
-.L1478:
+.L1557:
 	strh	w0, [x5, #:lo12:.LANCHOR83]
-	b	.L1385
-.L1383:
+	b	.L1460
+.L1458:
 	mov	w0, 80
-	b	.L1478
-.L1453:
-	mov	w21, w20
-.L1382:
+	b	.L1557
+.L1529:
+	mov	w20, w21
+.L1457:
 	adrp	x1, .LANCHOR43
-	ubfiz	x0, x21, 1, 32
+	ubfiz	x0, x20, 1, 32
 	adrp	x3, .LANCHOR82
-	mov	w20, w21
+	mov	w21, w20
 	ldr	x2, [x1, #:lo12:.LANCHOR43]
 	adrp	x1, .LANCHOR42
 	ldrh	w5, [x3, #:lo12:.LANCHOR82]
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w4, [x2, x0]
-	ldrh	w2, [x23, #:lo12:.LANCHOR48]
+	ldrh	w2, [x22, #:lo12:.LANCHOR48]
 	ldrh	w3, [x1, x0]
-	mov	w1, w21
-	adrp	x0, .LC107
-	add	x0, x0, :lo12:.LC107
+	mov	w1, w20
+	adrp	x0, .LC112
+	add	x0, x0, :lo12:.LC112
 	bl	printf
-	b	.L1385
-.L1449:
-	mov	w20, w0
-	b	.L1380
-.L1452:
-	mov	w20, w21
-	b	.L1380
-.L1390:
+	b	.L1460
+.L1525:
+	mov	w21, w1
+	b	.L1455
+.L1528:
+	mov	w21, w20
+	b	.L1455
+.L1465:
 	cmp	w0, 12
-	bls	.L1391
-	lsr	w21, w21, 4
-	b	.L1389
-.L1391:
+	bls	.L1466
+	lsr	w20, w20, 4
+	b	.L1464
+.L1466:
 	cmp	w0, 8
-	bls	.L1389
-	lsr	w21, w21, 2
-	b	.L1389
-.L1454:
-	mov	w21, 1
-	b	.L1389
-.L1396:
+	bls	.L1464
+	lsr	w20, w20, 2
+	b	.L1464
+.L1530:
+	mov	w20, 1
+	b	.L1464
+.L1471:
 	mov	w1, 18
 	strh	w1, [x2, #:lo12:.LANCHOR82]
-	b	.L1397
-.L1394:
+	b	.L1472
+.L1469:
 	adrp	x0, .LANCHOR78
 	ldrh	w0, [x0, #:lo12:.LANCHOR78]
 	add	w0, w0, w0, lsl 1
 	asr	w0, w0, 2
 	strh	w0, [x3, #:lo12:.LANCHOR82]
-.L1393:
+.L1468:
 	adrp	x0, .LANCHOR101
 	ldrh	w0, [x0, #:lo12:.LANCHOR101]
-	cbz	w0, .L1455
-	add	w21, w21, 32
-	and	w21, w21, 65535
-.L1455:
-	mov	w20, 65535
-.L1399:
+	cbz	w0, .L1531
+	add	w20, w20, 32
+	and	w20, w20, 65535
+.L1531:
+	mov	w21, 65535
+.L1474:
 	ldrh	w0, [x19, #:lo12:.LANCHOR80]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L1408
-	cmp	w20, w0
-	beq	.L1409
-	strh	w20, [x19, #:lo12:.LANCHOR80]
-.L1410:
+	bne	.L1483
+	cmp	w21, w0
+	beq	.L1484
+	strh	w21, [x19, #:lo12:.LANCHOR80]
+.L1485:
 	add	x0, x19, :lo12:.LANCHOR80
 	mov	w1, 65535
 	strb	wzr, [x0, 8]
 	ldrh	w0, [x19, #:lo12:.LANCHOR80]
 	cmp	w0, w1
-	beq	.L1408
+	beq	.L1483
 	bl	IsBlkInGcList
-	cbz	w0, .L1413
+	cbz	w0, .L1488
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR80]
-.L1413:
+.L1488:
 	ldrh	w1, [x19, #:lo12:.LANCHOR80]
 	mov	w0, 65535
-	add	x23, x19, :lo12:.LANCHOR80
+	add	x22, x19, :lo12:.LANCHOR80
 	cmp	w1, w0
-	beq	.L1408
-	mov	x0, x23
+	beq	.L1483
+	mov	x0, x22
 	bl	make_superblock
-	adrp	x0, .LANCHOR173
+	adrp	x0, .LANCHOR178
 	ldrh	w1, [x19, #:lo12:.LANCHOR80]
-	strh	wzr, [x23, 2]
-	strh	wzr, [x0, #:lo12:.LANCHOR173]
+	strh	wzr, [x22, 2]
+	strh	wzr, [x0, #:lo12:.LANCHOR178]
 	adrp	x0, .LANCHOR42
-	strb	wzr, [x23, 6]
+	strb	wzr, [x22, 6]
 	ldr	x0, [x0, #:lo12:.LANCHOR42]
 	ldrh	w1, [x0, x1, lsl 1]
-	adrp	x0, .LANCHOR174
-	strh	w1, [x0, #:lo12:.LANCHOR174]
-.L1408:
-	adrp	x0, .LANCHOR51
-	ldrh	w1, [x19, #:lo12:.LANCHOR80]
-	str	x0, [x29, 136]
-	ldrh	w2, [x0, #:lo12:.LANCHOR51]
-	cmp	w2, w1
-	beq	.L1414
-	adrp	x0, .LANCHOR52
-	str	x0, [x29, 128]
-	ldrh	w2, [x0, #:lo12:.LANCHOR52]
-	cmp	w2, w1
-	beq	.L1414
-	adrp	x24, .LANCHOR85
-	add	x0, x24, :lo12:.LANCHOR85
-	str	x0, [x29, 160]
-.L1415:
+	adrp	x0, .LANCHOR179
+	strh	w1, [x0, #:lo12:.LANCHOR179]
+.L1483:
+	adrp	x1, .LANCHOR51
+	ldrh	w0, [x19, #:lo12:.LANCHOR80]
+	str	x1, [x29, 120]
+	ldrh	w2, [x1, #:lo12:.LANCHOR51]
+	cmp	w2, w0
+	beq	.L1489
+	adrp	x1, .LANCHOR52
+	ldrh	w1, [x1, #:lo12:.LANCHOR52]
+	cmp	w1, w0
+	bne	.L1490
+.L1489:
+	mov	w0, -1
+	strh	w0, [x19, #:lo12:.LANCHOR80]
+.L1490:
+	adrp	x25, .LANCHOR85
+	add	x26, x25, :lo12:.LANCHOR85
+.L1519:
 	ldrh	w1, [x19, #:lo12:.LANCHOR80]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1416
+	bne	.L1491
 	adrp	x0, .LANCHOR87
-	adrp	x25, .LANCHOR19
-	add	x25, x25, :lo12:.LANCHOR19
+	adrp	x22, .LANCHOR19
+	add	x22, x22, :lo12:.LANCHOR19
 	str	wzr, [x0, #:lo12:.LANCHOR87]
-.L1417:
-	ldrh	w5, [x24, #:lo12:.LANCHOR85]
-	add	x7, x24, :lo12:.LANCHOR85
+.L1492:
+	ldrh	w5, [x25, #:lo12:.LANCHOR85]
+	add	x7, x25, :lo12:.LANCHOR85
 	mov	w0, w5
 	bl	List_get_gc_head_node
 	and	w6, w0, 65535
 	strh	w6, [x19, #:lo12:.LANCHOR80]
 	mov	w0, 65535
 	cmp	w6, w0
-	bne	.L1418
+	bne	.L1493
 	strh	wzr, [x7]
 	mov	w0, 8
-	b	.L1374
-.L1388:
+	b	.L1449
+.L1463:
 	adrp	x1, .LANCHOR53
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L1458
+	bne	.L1534
 	adrp	x0, .LANCHOR99
 	ldrh	w0, [x0, #:lo12:.LANCHOR99]
 	cmp	w0, w1
-	bne	.L1458
-	cmp	w20, w0
-	bne	.L1458
+	bne	.L1534
+	cmp	w21, w0
+	bne	.L1534
 	ldrh	w0, [x19, #:lo12:.LANCHOR80]
-	cmp	w0, w20
-	beq	.L1400
-.L1458:
-	mov	w21, 1
-	b	.L1399
-.L1400:
+	cmp	w0, w21
+	beq	.L1475
+.L1534:
+	mov	w20, 1
+	b	.L1474
+.L1475:
 	adrp	x0, .LANCHOR87
-	adrp	x21, .LANCHOR48
-	adrp	x23, .LANCHOR172
+	adrp	x22, .LANCHOR48
+	adrp	x20, .LANCHOR82
+	adrp	x23, .LANCHOR177
 	str	wzr, [x0, #:lo12:.LANCHOR87]
-	adrp	x0, .LANCHOR82
-	ldrh	w6, [x21, #:lo12:.LANCHOR48]
-	mov	x2, x0
-	ldrh	w1, [x0, #:lo12:.LANCHOR82]
-	cmp	w1, w6
-	ldrh	w1, [x23, #:lo12:.LANCHOR172]
-	bcs	.L1401
-	cbnz	w1, .L1402
-	adrp	x1, .LANCHOR61
-	adrp	x3, .LANCHOR59
-	ldr	w1, [x1, #:lo12:.LANCHOR61]
-	ldr	w3, [x3, #:lo12:.LANCHOR59]
-	add	w1, w1, w1, lsl 1
-	cmp	w3, w1, lsr 2
-	bcs	.L1403
-.L1402:
+	ldrh	w1, [x22, #:lo12:.LANCHOR48]
+	ldrh	w0, [x20, #:lo12:.LANCHOR82]
+	cmp	w1, w0
+	bls	.L1476
+	ldrh	w0, [x23, #:lo12:.LANCHOR177]
+	cbnz	w0, .L1477
+	adrp	x0, .LANCHOR61
+	adrp	x1, .LANCHOR59
+	ldr	w0, [x0, #:lo12:.LANCHOR61]
+	ldr	w1, [x1, #:lo12:.LANCHOR59]
+	add	w0, w0, w0, lsl 1
+	cmp	w1, w0, lsr 2
+	bcs	.L1478
+.L1477:
 	adrp	x0, .LANCHOR78
 	ldrh	w0, [x0, #:lo12:.LANCHOR78]
 	add	w0, w0, w0, lsl 1
 	asr	w0, w0, 2
-	strh	w0, [x2, #:lo12:.LANCHOR82]
-.L1479:
+.L1558:
+	strh	w0, [x20, #:lo12:.LANCHOR82]
 	bl	FtlReadRefresh
-	ldrh	w0, [x23, #:lo12:.LANCHOR172]
-	b	.L1374
-.L1403:
-	mov	w1, 18
-	strh	w1, [x0, #:lo12:.LANCHOR82]
-	b	.L1479
-.L1401:
-	cbnz	w1, .L1458
-	adrp	x1, .LANCHOR78
-	ldrh	w5, [x1, #:lo12:.LANCHOR78]
-	add	w1, w5, w5, lsl 1
-	asr	w1, w1, 2
-	strh	w1, [x0, #:lo12:.LANCHOR82]
 	mov	w0, 0
 	bl	List_get_gc_head_node
+	adrp	x1, .LANCHOR42
 	ubfiz	x0, x0, 1, 16
+	ldr	x1, [x1, #:lo12:.LANCHOR42]
+	ldrh	w0, [x1, x0]
+	cmp	w0, 4
+	bls	.L1476
+.L1559:
+	ldrh	w0, [x23, #:lo12:.LANCHOR177]
+	b	.L1449
+.L1478:
+	mov	w0, 18
+	b	.L1558
+.L1476:
+	ldrh	w0, [x23, #:lo12:.LANCHOR177]
+	cbnz	w0, .L1534
+	adrp	x0, .LANCHOR78
+	ldrh	w5, [x0, #:lo12:.LANCHOR78]
+	add	w0, w5, w5, lsl 1
+	asr	w0, w0, 2
+	strh	w0, [x20, #:lo12:.LANCHOR82]
+	mov	w0, 0
+	bl	List_get_gc_head_node
 	adrp	x1, .LANCHOR42
+	ubfiz	x0, x0, 1, 16
 	adrp	x2, .LANCHOR3
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w2, [x2, #:lo12:.LANCHOR3]
@@ -10425,357 +10938,412 @@ rk_ftl_garbage_collect:
 	ldrh	w0, [x0, #:lo12:.LANCHOR20]
 	mul	w0, w0, w2
 	cmp	w1, w0, asr 1
-	ble	.L1406
+	ble	.L1481
+	ldrh	w0, [x22, #:lo12:.LANCHOR48]
 	sub	w5, w5, #1
-	cmp	w6, w5
-	bge	.L1479
-.L1406:
-	cbnz	w1, .L1458
+	cmp	w0, w5
+	blt	.L1481
+	bl	FtlReadRefresh
+	b	.L1559
+.L1481:
+	cbnz	w1, .L1534
 	mov	w0, -1
 	bl	decrement_vpc_count
-	ldrh	w0, [x21, #:lo12:.LANCHOR48]
+	ldrh	w0, [x22, #:lo12:.LANCHOR48]
 	add	w0, w0, 1
-	b	.L1374
-.L1409:
+	b	.L1449
+.L1484:
 	adrp	x0, .LANCHOR99
 	ldrh	w1, [x0, #:lo12:.LANCHOR99]
-	cmp	w1, w20
-	beq	.L1410
+	cmp	w1, w21
+	beq	.L1485
 	adrp	x2, .LANCHOR42
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR42]
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L1411
+	cbnz	w1, .L1486
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR99]
-.L1411:
+.L1486:
 	ldrh	w1, [x0, #:lo12:.LANCHOR99]
 	strh	w1, [x19, #:lo12:.LANCHOR80]
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR99]
-	b	.L1410
-.L1414:
-	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR80]
-.L1480:
-	adrp	x0, .LANCHOR172
-	ldrh	w0, [x0, #:lo12:.LANCHOR172]
-	b	.L1374
-.L1418:
+	b	.L1485
+.L1493:
 	mov	w0, w6
 	bl	IsBlkInGcList
 	add	w5, w5, 1
-	cbz	w0, .L1419
-	strh	w5, [x24, #:lo12:.LANCHOR85]
-	b	.L1417
-.L1419:
+	cbz	w0, .L1494
+	strh	w5, [x25, #:lo12:.LANCHOR85]
+	b	.L1492
+.L1494:
 	adrp	x23, .LANCHOR42
 	adrp	x4, .LANCHOR3
-	ldrh	w0, [x25]
+	ldrh	w0, [x22]
 	ubfiz	x1, x6, 1, 16
 	ldr	x2, [x23, #:lo12:.LANCHOR42]
 	and	w5, w5, 65535
 	ldrh	w4, [x4, #:lo12:.LANCHOR3]
-	strh	w5, [x24, #:lo12:.LANCHOR85]
+	strh	w5, [x25, #:lo12:.LANCHOR85]
 	ldrh	w3, [x2, x1]
 	mul	w0, w0, w4
 	cmp	w3, w0, asr 1
-	bgt	.L1421
+	bgt	.L1496
 	cmp	w5, 48
-	bls	.L1422
+	bls	.L1497
 	cmp	w3, 8
-	bls	.L1422
+	bls	.L1497
 	adrp	x3, .LANCHOR95
 	ldrh	w3, [x3, #:lo12:.LANCHOR95]
 	cmp	w3, 35
-	bhi	.L1422
-.L1421:
-	ldr	x3, [x29, 160]
-	strh	wzr, [x3]
-.L1422:
+	bhi	.L1497
+.L1496:
+	strh	wzr, [x26]
+.L1497:
 	ldrh	w1, [x2, x1]
 	cmp	w0, w1
-	bgt	.L1423
+	bgt	.L1498
 	mov	w0, 65535
-	cmp	w20, w0
-	bne	.L1423
+	cmp	w21, w0
+	bne	.L1498
+	ldrh	w0, [x26]
+	cmp	w0, 3
+	bhi	.L1498
 	mov	w0, -1
+	strh	wzr, [x26]
 	strh	w0, [x19, #:lo12:.LANCHOR80]
-	adrp	x0, .LANCHOR85
-	strh	wzr, [x0, #:lo12:.LANCHOR85]
-	b	.L1480
-.L1423:
-	cbnz	w1, .L1424
+.L1560:
+	adrp	x0, .LANCHOR177
+	ldrh	w0, [x0, #:lo12:.LANCHOR177]
+	b	.L1449
+.L1498:
+	cbnz	w1, .L1499
 	mov	w0, -1
 	bl	decrement_vpc_count
-	ldr	x0, [x29, 160]
-	ldr	x1, [x29, 160]
-	ldrh	w0, [x0]
+	ldrh	w0, [x26]
 	add	w0, w0, 1
-	strh	w0, [x1]
-	b	.L1417
-.L1424:
+	strh	w0, [x26]
+	b	.L1492
+.L1499:
 	add	x0, x19, :lo12:.LANCHOR80
 	strb	wzr, [x0, 8]
-	ldr	x0, [x29, 136]
+	ldr	x0, [x29, 120]
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w6
-	bne	.L1425
-	adrp	x1, .LANCHOR175
+	bne	.L1500
+	adrp	x1, .LANCHOR180
 	adrp	x0, .LC1
-	mov	w2, 658
-	add	x1, x1, :lo12:.LANCHOR175
+	mov	w2, 700
+	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1425:
-	ldr	x0, [x29, 128]
+.L1500:
+	adrp	x0, .LANCHOR52
 	ldrh	w1, [x19, #:lo12:.LANCHOR80]
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bne	.L1426
-	adrp	x1, .LANCHOR175
+	bne	.L1501
+	adrp	x1, .LANCHOR180
 	adrp	x0, .LC1
-	mov	w2, 659
-	add	x1, x1, :lo12:.LANCHOR175
+	mov	w2, 701
+	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1426:
+.L1501:
 	adrp	x0, .LANCHOR53
 	ldrh	w1, [x19, #:lo12:.LANCHOR80]
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L1427
-	adrp	x1, .LANCHOR175
+	bne	.L1502
+	adrp	x1, .LANCHOR180
 	adrp	x0, .LC1
-	mov	w2, 660
-	add	x1, x1, :lo12:.LANCHOR175
+	mov	w2, 702
+	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1427:
-	add	x25, x19, :lo12:.LANCHOR80
-	mov	x0, x25
+.L1502:
+	add	x22, x19, :lo12:.LANCHOR80
+	mov	x0, x22
 	bl	make_superblock
-	adrp	x0, .LANCHOR173
+	adrp	x0, .LANCHOR178
 	ldrh	w1, [x19, #:lo12:.LANCHOR80]
-	strh	wzr, [x0, #:lo12:.LANCHOR173]
+	strh	wzr, [x0, #:lo12:.LANCHOR178]
 	ldr	x0, [x23, #:lo12:.LANCHOR42]
 	ldrh	w1, [x0, x1, lsl 1]
-	adrp	x0, .LANCHOR174
-	strh	wzr, [x25, 2]
-	strh	w1, [x0, #:lo12:.LANCHOR174]
-	strb	wzr, [x25, 6]
-.L1416:
-	bl	FtlReadRefresh
-	adrp	x1, .LANCHOR19
+	adrp	x0, .LANCHOR179
+	strh	wzr, [x22, 2]
+	strh	w1, [x0, #:lo12:.LANCHOR179]
+	strb	wzr, [x22, 6]
+.L1491:
+	ldr	x1, [x29, 144]
 	mov	w0, 1
-	str	w0, [x22, #:lo12:.LANCHOR117]
-	ldrh	w0, [x1, #:lo12:.LANCHOR19]
-	str	w0, [x29, 172]
+	str	w0, [x1, #:lo12:.LANCHOR108]
+	adrp	x0, .LANCHOR19
+	str	x0, [x29, 112]
+	ldrh	w1, [x0, #:lo12:.LANCHOR19]
+	ldr	w0, [x29, 152]
+	str	w1, [x29, 156]
+	cbz	w0, .L1503
+	adrp	x0, .LANCHOR3
+	ldrh	w2, [x19, #:lo12:.LANCHOR80]
+	ldrh	w0, [x0, #:lo12:.LANCHOR3]
+	mul	w0, w0, w1
+	adrp	x1, .LANCHOR42
+	ldr	x1, [x1, #:lo12:.LANCHOR42]
+	ldrh	w1, [x1, x2, lsl 1]
+	sub	w0, w0, w1
+	mov	w1, 4
+	sdiv	w0, w0, w1
+	add	w20, w20, w0
+	and	w20, w20, 65535
+.L1503:
 	add	x0, x19, :lo12:.LANCHOR80
-	str	x1, [x29, 120]
-	ldr	w3, [x29, 172]
+	ldr	w2, [x29, 156]
 	ldrh	w0, [x0, 2]
-	add	w2, w0, w21
-	cmp	w2, w3
-	ble	.L1428
-	sub	w21, w3, w0
-	and	w21, w21, 65535
-.L1428:
-	adrp	x0, .LANCHOR173
-	mov	w27, 0
-	add	x0, x0, :lo12:.LANCHOR173
-	str	x0, [x29, 152]
-.L1429:
-	cmp	w21, w27, uxth
-	bls	.L1437
+	add	w1, w0, w20
+	cmp	w1, w2
+	ble	.L1504
+	sub	w20, w2, w0
+	and	w20, w20, 65535
+.L1504:
+	adrp	x0, .LANCHOR178
+	mov	w28, 0
+	add	x0, x0, :lo12:.LANCHOR178
+	str	x0, [x29, 136]
+.L1505:
+	cmp	w20, w28, uxth
+	bls	.L1513
 	add	x1, x19, :lo12:.LANCHOR80
 	adrp	x0, .LANCHOR3
-	adrp	x25, .LANCHOR93
+	adrp	x23, .LANCHOR93
 	add	x1, x1, 16
 	ldrh	w7, [x0, #:lo12:.LANCHOR3]
-	mov	w23, 0
+	mov	w22, 0
 	ldrh	w4, [x1, -14]
 	mov	w2, 0
-	ldr	x0, [x25, #:lo12:.LANCHOR93]
+	ldr	x0, [x23, #:lo12:.LANCHOR93]
 	mov	w6, 65535
-	add	w4, w4, w27
-	b	.L1438
-.L1431:
+	add	w4, w4, w28
+	b	.L1514
+.L1507:
 	ldrh	w3, [x1]
 	cmp	w3, w6
-	beq	.L1430
-	ubfiz	x5, x23, 5, 16
-	add	w23, w23, 1
+	beq	.L1506
+	ubfiz	x5, x22, 5, 16
+	add	w22, w22, 1
 	add	x5, x0, x5
-	and	w23, w23, 65535
+	and	w22, w22, 65535
 	orr	w3, w4, w3, lsl 10
 	str	w3, [x5, 4]
-.L1430:
+.L1506:
 	add	w2, w2, 1
 	add	x1, x1, 2
 	and	w2, w2, 65535
-.L1438:
+.L1514:
 	cmp	w2, w7
-	bne	.L1431
+	bne	.L1507
 	add	x1, x19, :lo12:.LANCHOR80
-	adrp	x26, .LANCHOR89
-	add	x26, x26, :lo12:.LANCHOR89
+	adrp	x24, .LANCHOR89
+	add	x24, x24, :lo12:.LANCHOR89
 	ldrb	w2, [x1, 8]
-	mov	w1, w23
+	mov	w1, w22
 	bl	FlashReadPages
-	ubfiz	x0, x23, 5, 16
-	mov	x23, 0
-	str	x0, [x29, 144]
-.L1432:
-	ldr	x0, [x29, 144]
-	cmp	x0, x23
-	bne	.L1436
-	add	w27, w27, 1
-	b	.L1429
-.L1436:
-	ldr	x0, [x25, #:lo12:.LANCHOR93]
-	add	x1, x0, x23
-	ldr	w0, [x0, x23]
+	ubfiz	x0, x22, 5, 16
+	mov	x22, 0
+	str	x0, [x29, 128]
+.L1508:
+	ldr	x0, [x29, 128]
+	cmp	x0, x22
+	bne	.L1512
+	add	w28, w28, 1
+	b	.L1505
+.L1512:
+	ldr	x0, [x23, #:lo12:.LANCHOR93]
+	add	x1, x0, x22
+	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	beq	.L1433
-	ldr	x28, [x1, 16]
+	beq	.L1509
+	ldr	x27, [x1, 16]
 	mov	w0, 61589
-	ldrh	w1, [x28]
+	ldrh	w1, [x27]
 	cmp	w1, w0
-	bne	.L1433
-	ldr	w4, [x28, 8]
+	bne	.L1509
+	ldr	w4, [x27, 8]
 	cmn	w4, #1
-	bne	.L1434
-	str	w4, [x29, 112]
-	mov	w2, 696
-	adrp	x1, .LANCHOR175
+	bne	.L1510
+	str	w4, [x29, 104]
+	mov	w2, 736
+	adrp	x1, .LANCHOR180
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR175
+	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	ldr	w4, [x29, 112]
-.L1434:
+	ldr	w4, [x29, 104]
+.L1510:
 	mov	w2, 0
-	add	x1, x29, 188
+	add	x1, x29, 172
 	mov	w0, w4
 	bl	log2phys
-	ldr	x0, [x25, #:lo12:.LANCHOR93]
-	ldr	w1, [x29, 188]
-	add	x0, x0, x23
+	ldr	x0, [x23, #:lo12:.LANCHOR93]
+	ldr	w1, [x29, 172]
+	add	x0, x0, x22
 	ldr	w2, [x0, 4]
 	cmp	w2, w1
-	bne	.L1433
-	ldr	x1, [x29, 152]
-	adrp	x4, .LANCHOR121
-	ldr	x2, [x29, 152]
+	bne	.L1509
+	ldr	x1, [x29, 136]
+	adrp	x4, .LANCHOR113
+	ldr	x2, [x29, 136]
 	ldr	w0, [x0, 24]
 	ldrh	w1, [x1]
 	add	w1, w1, 1
 	strh	w1, [x2]
-	ldr	x2, [x4, #:lo12:.LANCHOR121]
-	ldr	w1, [x26]
+	ldr	x2, [x4, #:lo12:.LANCHOR113]
+	ldr	w1, [x24]
 	add	x1, x2, x1, lsl 5
-	stp	x4, x1, [x29, 104]
+	stp	x4, x1, [x29, 96]
 	str	w0, [x1, 24]
 	bl	Ftl_get_new_temp_ppa
-	ldp	x4, x1, [x29, 104]
-	ldr	x2, [x4, #:lo12:.LANCHOR121]
+	ldp	x4, x1, [x29, 96]
+	ldr	x2, [x4, #:lo12:.LANCHOR113]
 	str	w0, [x1, 4]
-	ldr	w1, [x26]
+	ldr	w1, [x24]
 	ubfiz	x0, x1, 5, 32
 	add	w1, w1, 1
 	add	x2, x2, x0
-	ldr	x0, [x25, #:lo12:.LANCHOR93]
-	add	x0, x0, x23
+	ldr	x0, [x23, #:lo12:.LANCHOR93]
+	add	x0, x0, x22
 	ldr	x4, [x0, 8]
 	str	x4, [x2, 8]
 	ldr	x4, [x0, 16]
 	str	x4, [x2, 16]
-	ldr	w2, [x29, 188]
-	str	w2, [x28, 12]
+	ldr	w2, [x29, 172]
+	str	w2, [x27, 12]
 	adrp	x2, .LANCHOR53
 	add	x11, x2, :lo12:.LANCHOR53
 	ldrh	w2, [x2, #:lo12:.LANCHOR53]
-	strh	w2, [x28, 2]
+	strh	w2, [x27, 2]
 	adrp	x2, .LANCHOR71
-	str	w1, [x26]
+	str	w1, [x24]
 	mov	w1, 1
 	ldr	w2, [x2, #:lo12:.LANCHOR71]
-	str	w2, [x28, 4]
+	str	w2, [x27, 4]
 	bl	FtlGcBufAlloc
 	ldrb	w1, [x11, 7]
-	ldr	w0, [x26]
+	ldr	w0, [x24]
 	cmp	w1, w0
-	beq	.L1435
+	beq	.L1511
 	ldrh	w0, [x11, 4]
-	cbnz	w0, .L1433
-.L1435:
+	cbnz	w0, .L1509
+.L1511:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	w0, .L1433
-.L1481:
-	str	wzr, [x22, #:lo12:.LANCHOR117]
-	b	.L1480
-.L1433:
-	add	x23, x23, 32
-	b	.L1432
-.L1437:
+	cbz	w0, .L1509
+.L1561:
+	ldr	x0, [x29, 144]
+	str	wzr, [x0, #:lo12:.LANCHOR108]
+	b	.L1560
+.L1509:
+	add	x22, x22, 32
+	b	.L1508
+.L1513:
 	add	x1, x19, :lo12:.LANCHOR80
 	ldrh	w0, [x1, 2]
-	add	w21, w21, w0
-	ldr	w0, [x29, 172]
-	and	w21, w21, 65535
-	strh	w21, [x1, 2]
-	cmp	w0, w21
-	bls	.L1439
-	adrp	x0, .LANCHOR173
-	ldrh	w1, [x0, #:lo12:.LANCHOR173]
-	adrp	x0, .LANCHOR174
-	ldrh	w0, [x0, #:lo12:.LANCHOR174]
-	cmp	w1, w0
-	bne	.L1440
-.L1439:
+	add	w20, w20, w0
+	ldr	w0, [x29, 156]
+	and	w20, w20, 65535
+	strh	w20, [x1, 2]
+	cmp	w0, w20
+	bhi	.L1515
 	adrp	x0, .LANCHOR89
 	ldr	w0, [x0, #:lo12:.LANCHOR89]
-	cbz	w0, .L1441
+	cbz	w0, .L1516
 	bl	Ftl_gc_temp_data_write_back
-	cbnz	w0, .L1481
-.L1441:
-	adrp	x0, .LANCHOR173
-	ldrh	w0, [x0, #:lo12:.LANCHOR173]
-	cbnz	w0, .L1442
+	cbnz	w0, .L1561
+.L1516:
+	adrp	x0, .LANCHOR178
+	ldrh	w0, [x0, #:lo12:.LANCHOR178]
+	cbnz	w0, .L1517
 	ldrh	w0, [x19, #:lo12:.LANCHOR80]
 	adrp	x1, .LANCHOR42
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	lsl	x0, x0, 1
 	ldrh	w2, [x1, x0]
-	cbz	w2, .L1442
+	cbz	w2, .L1517
 	strh	wzr, [x1, x0]
 	ldrh	w0, [x19, #:lo12:.LANCHOR80]
 	bl	update_vpc_list
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1442:
+.L1517:
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR80]
-.L1440:
+.L1515:
+	ldr	x0, [x29, 144]
+	str	wzr, [x0, #:lo12:.LANCHOR108]
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 2
-	bhi	.L1443
-	ldr	x0, [x29, 120]
-	ldrh	w21, [x0, #:lo12:.LANCHOR19]
-	b	.L1415
-.L1443:
-	adrp	x1, .LANCHOR172
-	str	wzr, [x22, #:lo12:.LANCHOR117]
-	ldrh	w1, [x1, #:lo12:.LANCHOR172]
+	bhi	.L1518
+	ldr	x0, [x29, 112]
+	ldrh	w20, [x0, #:lo12:.LANCHOR19]
+	b	.L1519
+.L1518:
+	adrp	x1, .LANCHOR177
+	ldrh	w1, [x1, #:lo12:.LANCHOR177]
 	cmp	w1, 0
 	csinc	w0, w1, w0, ne
-	b	.L1374
-.L1446:
+	b	.L1449
+.L1522:
 	mov	w0, 0
-	b	.L1374
+	b	.L1449
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
+	.section	.text.sftl_init,"ax",@progbits
+	.align	2
+	.global	sftl_init
+	.type	sftl_init, %function
+sftl_init:
+	stp	x29, x30, [sp, -32]!
+	adrp	x1, .LC70
+	add	x1, x1, :lo12:.LC70
+	mov	w0, -1
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	adrp	x19, .LANCHOR86
+	str	w0, [x19, #:lo12:.LANCHOR86]
+	adrp	x0, .LC71
+	add	x0, x0, :lo12:.LC71
+	bl	printf
+	adrp	x0, .LANCHOR0
+	add	x0, x0, :lo12:.LANCHOR0
+	bl	FtlConstantsInit
+	bl	FtlMemInit
+	bl	FtlVariablesInit
+	adrp	x0, .LANCHOR4
+	ldrh	w0, [x0, #:lo12:.LANCHOR4]
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlLoadBbt
+	cbnz	w0, .L1566
+	bl	FtlSysBlkInit
+	cbnz	w0, .L1566
+	mov	w0, 1
+	str	w0, [x19, #:lo12:.LANCHOR86]
+	adrp	x0, .LANCHOR48
+	ldrh	w0, [x0, #:lo12:.LANCHOR48]
+	cmp	w0, 15
+	bhi	.L1566
+	mov	w19, 8129
+.L1565:
+	mov	w1, 1
+	mov	w0, 0
+	bl	rk_ftl_garbage_collect
+	subs	w19, w19, #1
+	bne	.L1565
+.L1566:
+	mov	w0, 0
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	sftl_init, .-sftl_init
 	.section	.text.sftl_gc,"ax",@progbits
 	.align	2
 	.global	sftl_gc
@@ -10798,17 +11366,17 @@ FtlRead:
 	mov	w19, w1
 	stp	x23, x24, [sp, 48]
 	mov	x23, x3
-	stp	x27, x28, [sp, 80]
-	mov	w27, w2
-	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
-	bne	.L1484
+	mov	w26, w2
+	stp	x21, x22, [sp, 32]
+	stp	x27, x28, [sp, 80]
+	bne	.L1571
 	mov	x2, x3
-	mov	w1, w27
+	mov	w1, w26
 	add	w0, w19, 256
 	bl	FtlVendorPartRead
 	mov	w21, w0
-.L1483:
+.L1570:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10817,237 +11385,252 @@ FtlRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1484:
+.L1571:
 	add	w0, w1, w2
-	str	w0, [x29, 140]
+	str	w0, [x29, 136]
 	adrp	x0, .LANCHOR34
 	add	w1, w1, w2
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	cmp	w1, w0
-	bhi	.L1504
+	bhi	.L1592
 	adrp	x0, .LANCHOR86
 	ldr	w21, [x0, #:lo12:.LANCHOR86]
 	cmn	w21, #1
-	beq	.L1483
+	beq	.L1570
 	adrp	x22, .LANCHOR12
-	sub	w24, w1, #1
-	adrp	x1, .LANCHOR62
-	mov	w25, 0
+	adrp	x25, .LANCHOR81
+	add	x25, x25, :lo12:.LANCHOR81
+	mov	w27, 0
 	ldrh	w0, [x22, #:lo12:.LANCHOR12]
 	mov	w21, 0
-	adrp	x28, .LANCHOR120
-	stp	wzr, wzr, [x29, 144]
-	udiv	w26, w19, w0
+	adrp	x28, .LANCHOR112
+	stp	wzr, wzr, [x29, 140]
+	udiv	w1, w19, w0
+	stp	wzr, w1, [x29, 148]
+	add	w1, w19, w2
+	sub	w24, w1, #1
+	adrp	x1, .LANCHOR69
+	ldr	w20, [x29, 152]
 	udiv	w24, w24, w0
-	mov	w20, w26
-	sub	w0, w24, w26
+	ldr	w0, [x29, 152]
+	sub	w0, w24, w0
 	add	w0, w0, 1
-	stp	wzr, w0, [x29, 152]
-	ldr	w0, [x1, #:lo12:.LANCHOR62]
+	str	w0, [x29, 156]
+	ldr	w0, [x1, #:lo12:.LANCHOR69]
+	add	w0, w0, w2
+	str	w0, [x1, #:lo12:.LANCHOR69]
+	adrp	x1, .LANCHOR62
 	ldr	w2, [x29, 156]
+	ldr	w0, [x1, #:lo12:.LANCHOR62]
 	add	w0, w0, w2
 	str	w0, [x1, #:lo12:.LANCHOR62]
-	adrp	x0, .LANCHOR81
-	add	x0, x0, :lo12:.LANCHOR81
-	str	x0, [x29, 128]
-.L1486:
+.L1573:
 	ldr	w0, [x29, 156]
-	cbnz	w0, .L1502
+	cbnz	w0, .L1590
 	adrp	x0, .LANCHOR101
 	ldrh	w0, [x0, #:lo12:.LANCHOR101]
-	cbnz	w0, .L1503
+	cbnz	w0, .L1591
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 31
-	bhi	.L1483
-.L1503:
+	bhi	.L1570
+.L1591:
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-	b	.L1483
-.L1502:
+	b	.L1570
+.L1590:
 	add	x1, x29, 172
 	mov	w2, 0
 	mov	w0, w20
 	bl	log2phys
 	ldr	w1, [x29, 172]
 	cmn	w1, #1
-	bne	.L1487
+	bne	.L1574
 	add	x5, x22, :lo12:.LANCHOR12
 	mov	w4, 0
-.L1488:
+.L1575:
 	ldrh	w0, [x5]
 	cmp	w4, w0
-	bcc	.L1490
-.L1491:
+	bcc	.L1577
+.L1578:
 	ldr	w0, [x29, 156]
 	add	w20, w20, 1
 	subs	w0, w0, #1
 	str	w0, [x29, 156]
-	beq	.L1495
+	beq	.L1582
 	adrp	x0, .LANCHOR3
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
-	cmp	w25, w0, lsl 2
-	bne	.L1486
-.L1495:
-	cbz	w25, .L1486
-	ldr	x0, [x28, #:lo12:.LANCHOR120]
-	mov	w1, w25
+	cmp	w27, w0, lsl 2
+	bne	.L1573
+.L1582:
+	cbz	w27, .L1573
+	ldr	x0, [x28, #:lo12:.LANCHOR112]
+	mov	w1, w27
 	mov	w2, 0
 	bl	FlashReadPages
-	ldr	w0, [x29, 144]
-	lsl	w0, w0, 9
-	str	w0, [x29, 136]
-	ldr	w0, [x29, 152]
+	ldr	w0, [x29, 140]
 	lsl	w0, w0, 9
-	str	x0, [x29, 120]
+	str	w0, [x29, 116]
 	ldr	w0, [x29, 148]
 	lsl	w0, w0, 9
-	str	w0, [x29, 112]
-	ubfiz	x0, x25, 5, 32
-	mov	x25, 0
+	str	x0, [x29, 128]
+	ldr	w0, [x29, 144]
+	lsl	w0, w0, 9
+	str	w0, [x29, 120]
+	ubfiz	x0, x27, 5, 32
+	mov	x27, 0
 	str	x0, [x29, 104]
 	add	x0, x22, :lo12:.LANCHOR12
 	str	x0, [x29, 96]
-.L1501:
-	ldr	x0, [x28, #:lo12:.LANCHOR120]
-	add	x0, x0, x25
+.L1589:
+	ldr	x0, [x28, #:lo12:.LANCHOR112]
+	ldr	w2, [x29, 152]
+	add	x0, x0, x27
 	ldr	w1, [x0, 24]
-	cmp	w26, w1
-	bne	.L1497
+	cmp	w2, w1
+	bne	.L1584
 	ldr	x1, [x0, 8]
-	adrp	x0, .LANCHOR115
-	ldr	x0, [x0, #:lo12:.LANCHOR115]
+	adrp	x0, .LANCHOR118
+	ldr	x0, [x0, #:lo12:.LANCHOR118]
 	cmp	x1, x0
-	bne	.L1498
-	ldr	x0, [x29, 120]
-	ldr	w2, [x29, 112]
+	bne	.L1585
+	ldr	x0, [x29, 128]
+	ldr	w2, [x29, 120]
 	add	x1, x1, x0
 	mov	x0, x23
-.L1515:
+.L1603:
 	bl	ftl_memcpy
-.L1498:
-	ldr	x0, [x28, #:lo12:.LANCHOR120]
-	add	x1, x0, x25
-	ldr	w0, [x0, x25]
-	cmn	w0, #1
-	bne	.L1499
-	ldr	x1, [x29, 128]
-	mov	w21, w0
-	ldr	x2, [x29, 128]
-	ldr	w1, [x1, 72]
+.L1585:
+	ldr	x0, [x28, #:lo12:.LANCHOR112]
+	add	x0, x0, x27
+	ldr	x1, [x0, 16]
+	ldr	w2, [x0, 24]
+	ldr	w1, [x1, 8]
+	cmp	w2, w1
+	beq	.L1586
+	ldr	w1, [x25, 72]
 	add	w1, w1, 1
-	str	w1, [x2, 72]
-.L1500:
+	str	w1, [x25, 72]
+.L1586:
+	ldr	w1, [x0]
+	cmn	w1, #1
+	bne	.L1587
+	ldr	w0, [x25, 72]
+	mov	w21, w1
+	add	w0, w0, 1
+	str	w0, [x25, 72]
+.L1588:
 	ldr	x0, [x29, 104]
-	add	x25, x25, 32
-	cmp	x0, x25
-	bne	.L1501
-	mov	w25, 0
-	b	.L1486
-.L1490:
+	add	x27, x27, 32
+	cmp	x0, x27
+	bne	.L1589
+	mov	w27, 0
+	b	.L1573
+.L1577:
 	madd	w0, w20, w0, w4
 	cmp	w19, w0
-	bhi	.L1489
-	ldr	w1, [x29, 140]
+	bhi	.L1576
+	ldr	w1, [x29, 136]
 	cmp	w1, w0
-	bls	.L1489
+	bls	.L1576
 	sub	w0, w0, w19
-	str	x5, [x29, 112]
+	str	x5, [x29, 120]
 	lsl	w0, w0, 9
-	str	w4, [x29, 120]
+	str	w4, [x29, 128]
 	mov	w2, 512
 	mov	w1, 0
 	add	x0, x23, x0
 	bl	ftl_memset
-	ldr	w4, [x29, 120]
-	ldr	x5, [x29, 112]
-.L1489:
+	ldr	w4, [x29, 128]
+	ldr	x5, [x29, 120]
+.L1576:
 	add	w4, w4, 1
-	b	.L1488
-.L1487:
-	ldr	x2, [x28, #:lo12:.LANCHOR120]
-	ubfiz	x0, x25, 5, 32
-	cmp	w20, w26
+	b	.L1575
+.L1574:
+	ldr	x2, [x28, #:lo12:.LANCHOR112]
+	ubfiz	x0, x27, 5, 32
 	add	x0, x2, x0
 	str	w1, [x0, 4]
-	bne	.L1492
-	adrp	x1, .LANCHOR115
-	ldr	x1, [x1, #:lo12:.LANCHOR115]
+	ldr	w1, [x29, 152]
+	cmp	w20, w1
+	bne	.L1579
+	adrp	x1, .LANCHOR118
+	ldr	x1, [x1, #:lo12:.LANCHOR118]
 	str	x1, [x0, 8]
 	ldrh	w1, [x22, #:lo12:.LANCHOR12]
 	udiv	w2, w19, w1
 	msub	w2, w2, w1, w19
-	str	w2, [x29, 152]
-	sub	w2, w1, w2
-	cmp	w27, w2
-	csel	w2, w27, w2, ls
 	str	w2, [x29, 148]
+	sub	w2, w1, w2
+	cmp	w26, w2
+	csel	w2, w26, w2, ls
+	str	w2, [x29, 144]
 	cmp	w1, w2
-	bne	.L1493
+	bne	.L1580
 	str	x23, [x0, 8]
-.L1493:
+.L1580:
 	adrp	x1, .LANCHOR24
-	adrp	x2, .LANCHOR114
+	adrp	x2, .LANCHOR124
 	str	w20, [x0, 24]
 	ldrh	w1, [x1, #:lo12:.LANCHOR24]
-	ldr	x2, [x2, #:lo12:.LANCHOR114]
-	mul	w1, w1, w25
-	add	w25, w25, 1
+	ldr	x2, [x2, #:lo12:.LANCHOR124]
+	mul	w1, w1, w27
+	add	w27, w27, 1
 	and	x1, x1, 4294967292
 	add	x1, x2, x1
 	str	x1, [x0, 16]
-	b	.L1491
-.L1492:
+	b	.L1578
+.L1579:
 	cmp	w20, w24
-	bne	.L1494
+	bne	.L1581
 	ldrh	w2, [x22, #:lo12:.LANCHOR12]
-	adrp	x1, .LANCHOR113
-	ldr	w3, [x29, 140]
-	ldr	x1, [x1, #:lo12:.LANCHOR113]
+	adrp	x1, .LANCHOR119
+	ldr	w3, [x29, 136]
+	ldr	x1, [x1, #:lo12:.LANCHOR119]
 	str	x1, [x0, 8]
 	mul	w1, w20, w2
 	sub	w3, w3, w1
-	str	w3, [x29, 144]
+	str	w3, [x29, 140]
 	cmp	w2, w3
-	bne	.L1493
-.L1514:
+	bne	.L1580
+.L1602:
 	sub	w1, w1, w19
 	lsl	w1, w1, 9
 	add	x1, x23, x1
 	str	x1, [x0, 8]
-	b	.L1493
-.L1494:
+	b	.L1580
+.L1581:
 	ldrh	w1, [x22, #:lo12:.LANCHOR12]
 	mul	w1, w1, w20
-	b	.L1514
-.L1497:
+	b	.L1602
+.L1584:
 	cmp	w24, w1
-	bne	.L1498
+	bne	.L1585
 	ldr	x1, [x0, 8]
-	adrp	x0, .LANCHOR113
-	ldr	x0, [x0, #:lo12:.LANCHOR113]
+	adrp	x0, .LANCHOR119
+	ldr	x0, [x0, #:lo12:.LANCHOR119]
 	cmp	x1, x0
-	bne	.L1498
+	bne	.L1585
 	ldr	x0, [x29, 96]
-	ldr	w2, [x29, 136]
+	ldr	w2, [x29, 116]
 	ldrh	w0, [x0]
 	mul	w0, w0, w24
 	sub	w0, w0, w19
 	lsl	w0, w0, 9
 	add	x0, x23, x0
-	b	.L1515
-.L1499:
-	cmp	w0, 256
-	bne	.L1500
-	ldr	w0, [x1, 4]
+	b	.L1603
+.L1587:
+	cmp	w1, 256
+	bne	.L1588
+	ldr	w0, [x0, 4]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-	b	.L1500
-.L1504:
+	b	.L1588
+.L1592:
 	mov	w21, -1
-	b	.L1483
+	b	.L1570
 	.size	FtlRead, .-FtlRead
 	.section	.text.sftl_read,"ax",@progbits
 	.align	2
@@ -11076,13 +11659,13 @@ FtlWrite:
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	stp	x27, x28, [sp, 80]
-	str	w2, [x29, 176]
-	bne	.L1518
+	str	w2, [x29, 180]
+	bne	.L1606
 	add	w0, w1, 256
-	ldr	w1, [x29, 176]
+	ldr	w1, [x29, 180]
 	mov	x2, x3
 	bl	FtlVendorPartWrite
-.L1517:
+.L1605:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -11090,127 +11673,132 @@ FtlWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 240
 	ret
-.L1518:
-	ldr	w0, [x29, 176]
+.L1606:
+	ldr	w0, [x29, 180]
 	add	w0, w1, w0
 	str	w0, [x29, 168]
 	adrp	x0, .LANCHOR34
 	ldr	w1, [x29, 168]
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	cmp	w1, w0
-	bhi	.L1553
+	bhi	.L1642
 	adrp	x0, .LANCHOR86
 	ldr	w0, [x0, #:lo12:.LANCHOR86]
 	cmn	w0, #1
-	beq	.L1517
-	adrp	x0, .LANCHOR176
+	beq	.L1605
+	adrp	x0, .LANCHOR181
 	mov	w1, 2048
 	adrp	x22, .LANCHOR12
-	str	w1, [x0, #:lo12:.LANCHOR176]
+	ldr	w2, [x29, 180]
+	str	w1, [x0, #:lo12:.LANCHOR181]
 	ldr	w1, [x29, 168]
 	ldrh	w0, [x22, #:lo12:.LANCHOR12]
 	sub	w1, w1, #1
 	udiv	w25, w21, w0
 	udiv	w0, w1, w0
-	adrp	x1, .LANCHOR64
+	adrp	x1, .LANCHOR68
 	str	w0, [x29, 156]
 	sub	w0, w0, w25
 	add	w24, w0, 1
 	str	w0, [x29, 152]
+	ldr	w0, [x1, #:lo12:.LANCHOR68]
+	add	w0, w0, w2
+	str	w0, [x1, #:lo12:.LANCHOR68]
+	adrp	x1, .LANCHOR64
 	ldr	w0, [x1, #:lo12:.LANCHOR64]
 	add	w0, w0, w24
 	str	w0, [x1, #:lo12:.LANCHOR64]
-	adrp	x0, .LANCHOR177
+	adrp	x0, .LANCHOR182
 	str	x0, [x29, 160]
-	ldr	w1, [x0, #:lo12:.LANCHOR177]
+	ldr	w1, [x0, #:lo12:.LANCHOR182]
 	adrp	x0, .LANCHOR51
 	add	x19, x0, :lo12:.LANCHOR51
-	cbz	w1, .L1520
+	cbz	w1, .L1608
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1520
+	cbnz	w0, .L1608
 	adrp	x19, .LANCHOR52
 	add	x19, x19, :lo12:.LANCHOR52
-.L1520:
+.L1608:
 	mov	w20, w25
 	adrp	x0, .LANCHOR52
 	add	x0, x0, :lo12:.LANCHOR52
 	str	x0, [x29, 96]
-.L1521:
-	cbnz	w24, .L1549
+.L1609:
+	cbnz	w24, .L1637
 	ldr	w1, [x29, 152]
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
 	adrp	x0, .LANCHOR48
 	mov	x22, x0
 	ldrh	w1, [x0, #:lo12:.LANCHOR48]
-	cmp	w1, 15
-	bls	.L1550
-.L1552:
+	cmp	w1, 5
+	bls	.L1638
+.L1640:
 	mov	w0, 0
-	b	.L1517
-.L1549:
+	b	.L1605
+.L1637:
 	adrp	x0, .LANCHOR3
 	ldrb	w2, [x19, 6]
 	str	x0, [x29, 120]
 	ldrh	w1, [x0, #:lo12:.LANCHOR3]
 	cmp	w2, w1
-	bcc	.L1522
-	adrp	x1, .LANCHOR178
+	bcc	.L1610
+	adrp	x1, .LANCHOR183
 	adrp	x0, .LC1
-	mov	w2, 988
-	add	x1, x1, :lo12:.LANCHOR178
+	mov	w2, 1011
+	add	x1, x1, :lo12:.LANCHOR183
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1522:
+.L1610:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1523
+	cbnz	w0, .L1611
 	adrp	x0, .LANCHOR51
 	add	x0, x0, :lo12:.LANCHOR51
 	cmp	x19, x0
-	bne	.L1524
+	bne	.L1612
 	adrp	x0, .LANCHOR52
 	add	x0, x0, :lo12:.LANCHOR52
 	ldrh	w1, [x0, 4]
-	cbnz	w1, .L1525
+	cbnz	w1, .L1613
 	bl	allocate_new_data_superblock
 	ldr	x0, [x29, 160]
-	str	wzr, [x0, #:lo12:.LANCHOR177]
-.L1525:
+	str	wzr, [x0, #:lo12:.LANCHOR182]
+.L1613:
 	adrp	x0, .LANCHOR51
 	add	x19, x0, :lo12:.LANCHOR51
 	mov	x0, x19
 	bl	allocate_new_data_superblock
 	ldr	x0, [x29, 160]
-	ldr	w0, [x0, #:lo12:.LANCHOR177]
+	ldr	w0, [x0, #:lo12:.LANCHOR182]
 	cmp	w0, 0
 	ldr	x0, [x29, 96]
 	csel	x19, x0, x19, ne
-.L1526:
+.L1614:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1523
+	cbnz	w0, .L1611
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.L1523:
+.L1611:
 	ldrh	w0, [x19, 4]
 	ldrb	w1, [x19, 7]
 	cmp	w0, w24
 	csel	w0, w0, w24, ls
 	lsl	w1, w1, 2
-	cmp	w1, w0
-	csel	w0, w1, w0, ls
+	cmp	w0, w1
+	csel	w0, w0, w1, ls
 	str	w0, [x29, 148]
 	ldr	x0, [x29, 120]
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1527
-	adrp	x1, .LANCHOR178
+	bcc	.L1615
+	adrp	x1, .LANCHOR183
 	adrp	x0, .LC1
-	mov	w2, 1021
-	add	x1, x1, :lo12:.LANCHOR178
+	mov	w2, 1044
+	add	x1, x1, :lo12:.LANCHOR183
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1527:
+.L1615:
 	adrp	x0, .LANCHOR24
 	add	x0, x0, :lo12:.LANCHOR24
 	str	xzr, [x29, 184]
@@ -11218,44 +11806,44 @@ FtlWrite:
 	adrp	x0, .LANCHOR23
 	add	x0, x0, :lo12:.LANCHOR23
 	str	x0, [x29, 104]
-.L1528:
+.L1616:
 	ldr	w1, [x29, 148]
-	adrp	x28, .LANCHOR122
+	adrp	x27, .LANCHOR114
 	ldr	w23, [x29, 184]
 	cmp	w23, w1
-	bcc	.L1547
+	bcc	.L1635
 	mov	x23, x1
-.L1529:
-	ldr	x0, [x28, #:lo12:.LANCHOR122]
+.L1617:
+	ldr	x0, [x27, #:lo12:.LANCHOR114]
 	mov	x3, x19
 	mov	w2, 0
 	mov	w1, w23
 	bl	FtlProgPages
 	cmp	w24, w23
-	bcs	.L1548
-	adrp	x1, .LANCHOR178
+	bcs	.L1636
+	adrp	x1, .LANCHOR183
 	adrp	x0, .LC1
-	mov	w2, 1098
-	add	x1, x1, :lo12:.LANCHOR178
+	mov	w2, 1121
+	add	x1, x1, :lo12:.LANCHOR183
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1548:
+.L1636:
 	sub	w24, w24, w23
-	b	.L1521
-.L1524:
+	b	.L1609
+.L1612:
 	ldr	x1, [x29, 160]
-	str	wzr, [x1, #:lo12:.LANCHOR177]
+	str	wzr, [x1, #:lo12:.LANCHOR182]
 	ldrh	w1, [x0, 4]
-	cbnz	w1, .L1558
+	cbnz	w1, .L1647
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-	b	.L1526
-.L1558:
+	b	.L1614
+.L1647:
 	mov	x19, x0
-	b	.L1523
-.L1547:
+	b	.L1611
+.L1635:
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1529
+	cbz	w0, .L1617
 	add	x1, x29, 204
 	mov	w2, 0
 	mov	w0, w20
@@ -11263,9 +11851,9 @@ FtlWrite:
 	mov	x0, x19
 	bl	get_new_active_ppa
 	ldr	x1, [x29, 184]
-	lsl	x27, x1, 5
-	ldr	x1, [x28, #:lo12:.LANCHOR122]
-	add	x1, x1, x27
+	lsl	x28, x1, 5
+	ldr	x1, [x27, #:lo12:.LANCHOR114]
+	add	x1, x1, x28
 	str	w0, [x1, 4]
 	ldr	x0, [x29, 112]
 	str	w20, [x1, 24]
@@ -11273,9 +11861,9 @@ FtlWrite:
 	mul	w23, w23, w2
 	and	x0, x23, 4294967292
 	str	x0, [x29, 136]
-	adrp	x0, .LANCHOR114
+	adrp	x0, .LANCHOR124
 	ldr	x3, [x29, 136]
-	ldr	x0, [x0, #:lo12:.LANCHOR114]
+	ldr	x0, [x0, #:lo12:.LANCHOR124]
 	str	x0, [x29, 128]
 	add	x23, x0, x3
 	str	x23, [x1, 16]
@@ -11285,41 +11873,41 @@ FtlWrite:
 	ldr	w0, [x29, 156]
 	cmp	w20, w25
 	ccmp	w20, w0, 4, ne
-	bne	.L1530
+	bne	.L1618
 	cmp	w20, w25
-	bne	.L1531
+	bne	.L1619
 	ldrh	w2, [x22, #:lo12:.LANCHOR12]
 	udiv	w0, w21, w2
 	msub	w0, w0, w2, w21
 	str	w0, [x29, 172]
 	sub	w2, w2, w0
-	ldr	w0, [x29, 176]
+	ldr	w0, [x29, 180]
 	cmp	w2, w0
 	csel	w0, w2, w0, ls
-	str	w0, [x29, 180]
-.L1532:
+	str	w0, [x29, 176]
+.L1620:
 	ldrh	w0, [x22, #:lo12:.LANCHOR12]
-	ldr	w1, [x29, 180]
+	ldr	w1, [x29, 176]
 	cmp	w1, w0
-	ldr	x0, [x28, #:lo12:.LANCHOR122]
-	bne	.L1533
-	add	x3, x0, x27
+	ldr	x0, [x27, #:lo12:.LANCHOR114]
+	bne	.L1621
+	add	x3, x0, x28
 	cmp	w20, w25
-	bne	.L1534
+	bne	.L1622
 	str	x26, [x3, 8]
-.L1535:
+.L1623:
 	ldr	x0, [x29, 120]
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1544
-	adrp	x1, .LANCHOR178
+	bcc	.L1632
+	adrp	x1, .LANCHOR183
 	adrp	x0, .LC1
-	mov	w2, 1089
-	add	x1, x1, :lo12:.LANCHOR178
+	mov	w2, 1112
+	add	x1, x1, :lo12:.LANCHOR183
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1544:
+.L1632:
 	ldp	x1, x2, [x29, 128]
 	mov	w0, -3947
 	strh	w0, [x1, x2]
@@ -11338,40 +11926,39 @@ FtlWrite:
 	ldr	x0, [x29, 184]
 	add	x0, x0, 1
 	str	x0, [x29, 184]
-	b	.L1528
-.L1531:
+	b	.L1616
+.L1619:
 	ldr	w0, [x29, 168]
 	ldrh	w2, [x22, #:lo12:.LANCHOR12]
-	str	wzr, [x29, 172]
 	msub	w2, w20, w2, w0
 	and	w0, w2, 65535
-	str	w0, [x29, 180]
-	b	.L1532
-.L1534:
-	ldr	w0, [x29, 180]
-.L1565:
+	stp	wzr, w0, [x29, 172]
+	b	.L1620
+.L1622:
+	ldr	w0, [x29, 176]
+.L1654:
 	mul	w0, w0, w20
 	sub	w0, w0, w21
 	lsl	w0, w0, 9
 	add	x0, x26, x0
 	str	x0, [x3, 8]
-	b	.L1535
-.L1533:
-	add	x0, x0, x27
+	b	.L1623
+.L1621:
+	add	x0, x0, x28
 	cmp	w20, w25
-	bne	.L1536
-	adrp	x1, .LANCHOR115
-	ldr	x1, [x1, #:lo12:.LANCHOR115]
-.L1564:
+	bne	.L1624
+	adrp	x1, .LANCHOR118
+	ldr	x1, [x1, #:lo12:.LANCHOR118]
+.L1653:
 	str	x1, [x0, 8]
 	ldr	w0, [x29, 204]
 	cmn	w0, #1
-	beq	.L1538
+	beq	.L1626
 	str	w0, [x29, 212]
 	mov	w2, 0
-	ldr	x0, [x28, #:lo12:.LANCHOR122]
+	ldr	x0, [x27, #:lo12:.LANCHOR114]
 	str	w20, [x29, 232]
-	add	x0, x0, x27
+	add	x0, x0, x28
 	ldp	x1, x0, [x0, 8]
 	stp	x1, x0, [x29, 216]
 	mov	w1, 1
@@ -11379,218 +11966,343 @@ FtlWrite:
 	bl	FlashReadPages
 	ldr	w0, [x29, 208]
 	cmn	w0, #1
-	bne	.L1539
+	bne	.L1627
 	adrp	x0, .LANCHOR81
 	add	x0, x0, :lo12:.LANCHOR81
 	ldr	w1, [x0, 72]
 	add	w1, w1, 1
 	str	w1, [x0, 72]
-.L1542:
-	ldr	w0, [x29, 180]
+.L1630:
+	ldr	w0, [x29, 176]
 	cmp	w20, w25
 	lsl	w2, w0, 9
-	bne	.L1543
-	ldr	x0, [x28, #:lo12:.LANCHOR122]
+	bne	.L1631
+	ldr	x0, [x27, #:lo12:.LANCHOR114]
 	mov	x1, x26
-	add	x3, x0, x27
+	add	x3, x0, x28
 	ldr	w0, [x29, 172]
 	ldr	x3, [x3, 8]
 	lsl	w0, w0, 9
 	add	x0, x3, x0
-.L1566:
+.L1655:
 	bl	ftl_memcpy
-	b	.L1535
-.L1536:
-	adrp	x1, .LANCHOR113
-	ldr	x1, [x1, #:lo12:.LANCHOR113]
-	b	.L1564
-.L1539:
+	b	.L1623
+.L1624:
+	adrp	x1, .LANCHOR119
+	ldr	x1, [x1, #:lo12:.LANCHOR119]
+	b	.L1653
+.L1627:
 	ldr	w1, [x23, 8]
 	cmp	w20, w1
-	beq	.L1541
+	beq	.L1629
 	adrp	x0, .LANCHOR81
 	add	x0, x0, :lo12:.LANCHOR81
 	ldr	w2, [x0, 72]
 	add	w2, w2, 1
 	str	w2, [x0, 72]
-	adrp	x0, .LC108
+	adrp	x0, .LC113
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC108
+	add	x0, x0, :lo12:.LC113
 	bl	printf
-.L1541:
+.L1629:
 	ldr	w0, [x23, 8]
 	cmp	w20, w0
-	beq	.L1542
-	mov	w2, 1074
-	adrp	x1, .LANCHOR178
+	beq	.L1630
+	mov	w2, 1097
+	adrp	x1, .LANCHOR183
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR178
+	add	x1, x1, :lo12:.LANCHOR183
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	b	.L1542
-.L1538:
-	ldr	x0, [x28, #:lo12:.LANCHOR122]
+	b	.L1630
+.L1626:
+	ldr	x0, [x27, #:lo12:.LANCHOR114]
 	ldr	x1, [x29, 104]
-	add	x0, x0, x27
+	add	x0, x0, x28
 	ldrh	w2, [x1]
 	mov	w1, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	b	.L1542
-.L1543:
+	b	.L1630
+.L1631:
 	ldrh	w1, [x22, #:lo12:.LANCHOR12]
-	ldr	x0, [x28, #:lo12:.LANCHOR122]
-	add	x3, x0, x27
+	ldr	x0, [x27, #:lo12:.LANCHOR114]
+	add	x3, x0, x28
 	mul	w1, w1, w20
 	sub	w1, w1, w21
 	ldr	x0, [x3, 8]
 	lsl	w1, w1, 9
 	add	x1, x26, x1
-	b	.L1566
-.L1530:
-	ldr	x0, [x28, #:lo12:.LANCHOR122]
-	add	x3, x0, x27
+	b	.L1655
+.L1618:
+	ldr	x0, [x27, #:lo12:.LANCHOR114]
+	add	x3, x0, x28
 	ldrh	w0, [x22, #:lo12:.LANCHOR12]
-	b	.L1565
-.L1550:
-	adrp	x21, .LANCHOR99
+	b	.L1654
+.L1638:
+	adrp	x23, .LANCHOR99
 	adrp	x20, .LANCHOR83
-	adrp	x19, .LANCHOR82
-	add	x21, x21, :lo12:.LANCHOR99
+	adrp	x21, .LANCHOR82
+	add	x23, x23, :lo12:.LANCHOR99
 	add	x20, x20, :lo12:.LANCHOR83
-	add	x19, x19, :lo12:.LANCHOR82
-.L1562:
+	add	x21, x21, :lo12:.LANCHOR82
+	mov	w19, 256
+.L1641:
 	adrp	x0, .LANCHOR80
 	mov	w1, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w0, w1
-	bne	.L1551
-	ldrh	w1, [x21]
+	bne	.L1639
+	ldrh	w1, [x23]
 	cmp	w1, w0
-	bne	.L1551
+	bne	.L1639
 	mov	w0, 0
 	bl	List_get_gc_head_node
 	bl	FtlGcRefreshBlock
-.L1551:
+.L1639:
 	mov	w0, 128
 	mov	w1, 1
 	strh	w0, [x20]
-	strh	w0, [x19]
+	strh	w0, [x21]
 	mov	w0, w1
 	bl	rk_ftl_garbage_collect
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
 	ldrh	w0, [x22, #:lo12:.LANCHOR48]
-	cmp	w0, 8
-	bls	.L1562
-	b	.L1552
-.L1553:
+	cmp	w0, 2
+	bhi	.L1640
+	subs	w19, w19, #1
+	bne	.L1641
+	b	.L1640
+.L1642:
 	mov	w0, -1
-	b	.L1517
+	b	.L1605
 	.size	FtlWrite, .-FtlWrite
 	.section	.text.sftl_write,"ax",@progbits
 	.align	2
 	.global	sftl_write
 	.type	sftl_write, %function
 sftl_write:
-	stp	x29, x30, [sp, -240]!
-	add	w4, w0, w1
-	sub	w5, w4, #1
+	stp	x29, x30, [sp, -272]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	cmp	w5, 63
+	add	w19, w0, w1
 	stp	x21, x22, [sp, 32]
-	mov	w20, w0
-	stp	x23, x24, [sp, 48]
-	mov	w22, w1
+	sub	w20, w19, #1
 	stp	x25, x26, [sp, 64]
-	mov	x24, x2
+	mov	w22, w0
+	stp	x23, x24, [sp, 48]
+	mov	w25, w1
 	stp	x27, x28, [sp, 80]
-	adrp	x25, .LANCHOR179
-	bls	.L1568
+	cmp	w20, 63
+	str	x2, [x29, 184]
+	bls	.L1657
 	cmp	w0, 576
-	bls	.L1569
-.L1568:
-	ldr	w0, [x25, #:lo12:.LANCHOR179]
-	cbz	w0, .L1570
-	adrp	x2, .LANCHOR0
-	add	x1, x2, :lo12:.LANCHOR0
-	mov	w21, 512
-	adrp	x3, idb_buf
-	mov	x4, -49148
-	stp	x3, x2, [x29, 144]
-	ldrh	w0, [x1, 14]
-	add	x2, x3, :lo12:idb_buf
-	ldrh	w1, [x1, 10]
-	mov	x7, 262140
-	str	w0, [x29, 172]
-	and	w0, w0, 255
-	mov	w5, 4097
-	movk	x4, 0xfffc, lsl 16
-	mul	w0, w0, w1
-	mov	x1, 0
-	and	w0, w0, 65535
-	str	w0, [x29, 168]
-	udiv	w21, w21, w0
+	bls	.L1658
+.L1657:
+	adrp	x0, .LANCHOR184
+	str	x0, [x29, 152]
+	ldr	w1, [x0, #:lo12:.LANCHOR184]
+	cbz	w1, .L1659
+	adrp	x0, .LANCHOR185
+	str	x0, [x29, 144]
+	mov	w1, 35899
+	ldr	x24, [x0, #:lo12:.LANCHOR185]
+	movk	w1, 0xfcdc, lsl 16
+	ldr	w2, [x24]
+	cmp	w2, w1
+	beq	.L1660
+.L1677:
+	ldr	x0, [x29, 152]
+	str	wzr, [x0, #:lo12:.LANCHOR184]
+	ldr	x0, [x29, 144]
+	ldr	x0, [x0, #:lo12:.LANCHOR185]
+	bl	free
+	adrp	x0, .LANCHOR186
+	ldr	x0, [x0, #:lo12:.LANCHOR186]
+	bl	free
+.L1659:
+	ldr	x3, [x29, 184]
+	mov	w2, w25
+	mov	w1, w22
 	mov	w0, 0
-.L1574:
-	add	x3, x1, x7
-	ldr	w6, [x3, x2]
-	cbz	w6, .L1571
-.L1575:
-	ldr	w0, [x29, 168]
+	bl	FtlWrite
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 272
+	ret
+.L1660:
+	adrp	x1, .LANCHOR0
+	add	x0, x1, :lo12:.LANCHOR0
+	mov	w2, 65535
+	mov	w4, 4097
+	str	x1, [x29, 168]
+	ldrh	w19, [x0, 14]
+	ldrh	w20, [x0, 10]
+	mov	x0, 262140
+	add	x3, x24, x0
+	mov	w0, 0
+.L1664:
+	ldr	w1, [x3]
+	cbnz	w1, .L1661
+	ldr	w1, [x24, w0, uxtw 2]
+	add	w0, w0, 1
+	str	w1, [x3], -4
+	cmp	w0, w4
+	sub	w2, w2, #1
+	csel	w0, w0, wzr, cc
+	cmp	w2, 4096
+	bne	.L1664
+	mov	w23, 512
+	b	.L1663
+.L1661:
+	add	w23, w2, 127
+	adrp	x0, .LC114
+	lsr	w23, w23, 7
+	add	x0, x0, :lo12:.LC114
+	mov	w3, w23
+	bl	printf
+.L1663:
+	and	w19, w19, 255
+	adrp	x26, .LANCHOR105
+	mul	w20, w20, w19
 	mov	w19, 0
-	mov	w26, 0
-	mul	w0, w0, w21
-	stp	w0, wzr, [x29, 160]
-	adrp	x0, .LANCHOR105
-	add	x23, x0, :lo12:.LANCHOR105
-.L1572:
-	adrp	x5, gp_flash_check_buf
+	and	w20, w20, 65535
+	sub	w21, w20, #1
+	add	w21, w21, w23
+	udiv	w21, w21, w20
+	mul	w0, w20, w21
+	stp	w21, wzr, [x29, 196]
+	str	w0, [x29, 204]
+	lsl	w0, w23, 7
+	str	w0, [x29, 192]
+	add	x0, x26, :lo12:.LANCHOR105
+	str	x0, [x29, 136]
+	b	.L1676
+.L1667:
+	add	w0, w5, w4
+	ldr	x3, [x29, 136]
+	ubfiz	x2, x4, 9, 16
+	stp	w5, w7, [x29, 112]
+	str	w4, [x29, 120]
+	add	x2, x24, x2
+	udiv	w0, w0, w27
+	str	w6, [x29, 128]
+	ldr	x8, [x3, 16]
+	add	x3, x29, 208
+	and	w0, w0, 65535
+	mul	w1, w0, w27
+	stp	w1, w7, [x29, 208]
+	udiv	w1, w6, w27
+	add	w1, w1, w0
+	mov	w0, 0
+	blr	x8
+	ldr	w4, [x29, 120]
+	ldr	w0, [x29, 160]
+	ldp	w5, w7, [x29, 112]
+	add	w4, w0, w4
+	ldr	w6, [x29, 128]
+	and	w4, w4, 65535
+	b	.L1666
+.L1669:
+	add	w27, w8, w27
+	mov	w0, 0
+	and	w27, w27, 65535
+	b	.L1668
+.L1674:
+	mov	x27, x2
+	ldr	w4, [x0, x1, lsl 2]
+	lsl	x5, x1, 2
+	add	x2, x2, 4
+	add	x1, x1, 1
+	ldr	w3, [x27]
+	cmp	w4, w3
+	beq	.L1670
 	mov	x2, 512
 	mov	w1, 0
-	add	x0, x5, :lo12:gp_flash_check_buf
-	str	x5, [x29, 136]
+	str	x5, [x29, 160]
 	bl	memset
-	ldr	x0, [x29, 152]
+	ldr	x0, [x29, 176]
+	mov	w4, w28
+	ldr	x5, [x29, 160]
+	mov	w1, w19
+	ldr	w3, [x27]
+	add	x27, x26, :lo12:.LANCHOR105
+	ldr	x0, [x0, #:lo12:.LANCHOR186]
+	ldr	w2, [x0, x5]
+	adrp	x0, .LC115
+	add	x0, x0, :lo12:.LC115
+	bl	printf
+	ldr	x2, [x27, 8]
+	mov	w1, w19
+	mov	w0, 0
+	blr	x2
+	cmp	w21, 1
+	bls	.L1683
+	ldr	x2, [x27, 8]
+	add	w1, w20, w19
+	mov	w0, 0
+	blr	x2
+.L1683:
+	ldr	w1, [x29, 204]
+	ldr	w0, [x29, 196]
+	add	w19, w19, w1
+	ldr	w1, [x29, 196]
+	add	w0, w21, w0
+	cmp	w1, 15
+	bhi	.L1677
+	str	w0, [x29, 196]
+.L1676:
+	adrp	x5, .LANCHOR186
+	mov	x2, 512
+	mov	w1, 0
+	str	x5, [x29, 176]
+	ldr	x0, [x5, #:lo12:.LANCHOR186]
+	bl	memset
+	ldr	x0, [x29, 168]
+	add	x4, x26, :lo12:.LANCHOR105
+	str	x4, [x29, 120]
 	add	x0, x0, :lo12:.LANCHOR0
+	ldr	x6, [x4, 8]
 	ldrh	w3, [x0, 14]
 	ldrh	w2, [x0, 10]
-	adrp	x0, .LANCHOR105
-	and	w27, w3, 255
-	add	x4, x0, :lo12:.LANCHOR105
-	str	w3, [x29, 120]
 	mov	w0, 0
+	and	w27, w3, 255
+	str	w3, [x29, 128]
+	str	w27, [x29, 160]
 	udiv	w1, w19, w3
-	str	x4, [x29, 112]
 	mul	w2, w27, w2
-	ldr	x6, [x4, 8]
-	str	w27, [x29, 128]
 	and	w28, w2, 65535
 	blr	x6
-	cmp	w28, 511
-	ldr	w3, [x29, 120]
-	ldr	x4, [x29, 112]
-	bhi	.L1576
+	ldr	w0, [x29, 204]
+	ldr	w3, [x29, 128]
+	cmp	w0, w28
+	ldr	x4, [x29, 120]
+	bls	.L1665
 	add	w1, w28, w19
 	ldr	x4, [x4, 8]
 	mov	w0, 0
 	udiv	w1, w1, w3
 	blr	x4
-.L1576:
+.L1665:
 	udiv	w5, w19, w28
-	ldr	x0, [x29, 144]
 	mov	w4, 0
 	mov	w7, 61424
-	add	x8, x0, :lo12:idb_buf
 	msub	w5, w5, w28, w19
 	sub	w6, w19, w5
-.L1577:
-	cmp	w4, 511
-	bls	.L1578
-	ldr	x0, [x29, 152]
+.L1666:
+	ldr	w0, [x29, 204]
+	cmp	w0, w4
+	bhi	.L1667
+	ldr	x0, [x29, 176]
+	add	x10, x26, :lo12:.LANCHOR105
 	mov	w27, 0
+	ldr	x6, [x0, #:lo12:.LANCHOR186]
+	ldr	x0, [x29, 168]
 	add	x0, x0, :lo12:.LANCHOR0
 	ldrh	w4, [x0, 14]
 	ldrh	w5, [x0, 10]
@@ -11601,596 +12313,317 @@ sftl_write:
 	udiv	w5, w19, w0
 	msub	w5, w5, w0, w19
 	and	w1, w5, 65535
-	sub	w6, w19, w5
+	sub	w7, w19, w5
 	sdiv	w0, w1, w28
 	msub	w0, w0, w28, w1
-	ldr	x1, [x29, 136]
 	and	w0, w0, 65535
-	add	x8, x1, :lo12:gp_flash_check_buf
-.L1579:
-	cmp	w27, 511
-	bhi	.L1583
+.L1668:
+	cmp	w27, w23
+	bcs	.L1672
 	add	w1, w5, w27
-	sub	w7, w4, w0
-	add	w0, w0, w6
-	ldr	x10, [x23, 24]
-	and	w7, w7, 65535
+	sub	w8, w4, w0
+	add	w0, w0, w7
+	ldr	x11, [x10, 24]
+	and	w8, w8, 65535
 	ubfiz	x2, x27, 9, 16
 	udiv	w1, w1, w28
-	add	x2, x8, x2
-	stp	w4, w7, [x29, 104]
-	add	x3, x29, 176
-	str	w5, [x29, 112]
-	str	w6, [x29, 120]
+	add	x2, x6, x2
+	stp	w4, w8, [x29, 108]
+	add	x3, x29, 208
+	stp	w5, w7, [x29, 116]
+	str	x10, [x29, 128]
 	and	w1, w1, 65535
-	str	x8, [x29, 128]
+	str	x6, [x29, 160]
 	madd	w1, w1, w28, w0
 	mov	w0, 0
 	udiv	w1, w1, w28
-	blr	x10
+	blr	x11
 	cmn	w0, #1
-	ldp	w4, w7, [x29, 104]
-	ldr	w5, [x29, 112]
-	ldr	w6, [x29, 120]
-	ldr	x8, [x29, 128]
-	bne	.L1580
-.L1583:
-	ldr	x0, [x29, 144]
-	mov	x27, 0
-	add	x1, x0, :lo12:idb_buf
-	ldr	x0, [x29, 136]
-	add	x28, x0, :lo12:gp_flash_check_buf
-.L1581:
-	lsl	x0, x27, 2
-	add	x3, x0, x1
-	ldr	w2, [x0, x28]
-	ldr	w0, [x0, x1]
-	cmp	w2, w0
-	beq	.L1584
-	mov	x2, 512
-	mov	w1, 0
-	str	x3, [x29, 128]
-	mov	x0, x28
-	str	w27, [x29, 136]
-	bl	memset
-	ldr	w5, [x29, 136]
-	mov	w4, w27
-	ldr	x3, [x29, 128]
-	mov	w1, w19
-	adrp	x0, .LC109
-	add	x0, x0, :lo12:.LC109
-	ldr	w2, [x28, w5, uxtw 2]
-	ldr	w3, [x3]
-	bl	printf
-	ldr	w0, [x29, 172]
-	ldr	x2, [x23, 8]
-	udiv	w1, w19, w0
-	mov	w0, 0
-	blr	x2
-	cmp	w21, 1
-	bls	.L1585
-	ldr	w0, [x29, 168]
-	ldr	x2, [x23, 8]
-	add	w1, w0, w19
-	ldr	w0, [x29, 172]
-	udiv	w1, w1, w0
-	mov	w0, 0
-	blr	x2
-.L1585:
-	ldr	w0, [x29, 160]
-	add	w26, w26, w21
-	cmp	w26, 15
-	add	w19, w19, w0
-	bls	.L1572
-.L1590:
-	str	wzr, [x25, #:lo12:.LANCHOR179]
-.L1570:
-	mov	x3, x24
-	mov	w2, w22
-	mov	w1, w20
-	mov	w0, 0
-	bl	FtlWrite
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 240
-	ret
-.L1571:
-	ldr	w6, [x2, w0, uxtw 2]
-	add	w0, w0, 1
-	str	w6, [x3, x2]
-	cmp	w0, w5
-	sub	x1, x1, #4
-	csel	w0, w0, wzr, cc
-	cmp	x1, x4
-	bne	.L1574
-	b	.L1575
-.L1578:
-	add	w0, w5, w4
-	ldr	x10, [x23, 16]
-	ubfiz	x2, x4, 9, 16
-	stp	w5, w7, [x29, 100]
-	add	x2, x8, x2
-	stp	w4, w6, [x29, 108]
-	udiv	w0, w0, w27
-	str	x8, [x29, 120]
-	add	x3, x29, 176
-	and	w0, w0, 65535
-	mul	w1, w0, w27
-	stp	w1, w7, [x29, 176]
-	udiv	w1, w6, w27
-	add	w1, w1, w0
-	mov	w0, 0
-	blr	x10
-	ldp	w4, w6, [x29, 108]
-	ldr	w0, [x29, 128]
-	ldp	w5, w7, [x29, 100]
-	add	w4, w0, w4
-	and	w4, w4, 65535
-	ldr	x8, [x29, 120]
-	b	.L1577
-.L1580:
-	add	w27, w7, w27
-	mov	w0, 0
-	and	w27, w27, 65535
-	b	.L1579
-.L1584:
-	add	x27, x27, 1
-	cmp	x27, 65536
-	bne	.L1581
-	ldr	w0, [x29, 164]
+	ldp	w4, w8, [x29, 108]
+	ldp	w5, w7, [x29, 116]
+	ldr	x10, [x29, 128]
+	ldr	x6, [x29, 160]
+	bne	.L1669
+.L1672:
+	ldr	x0, [x29, 176]
+	mov	x2, x24
+	mov	x1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR186]
+.L1670:
+	ldr	w3, [x29, 192]
+	mov	w28, w1
+	cmp	w1, w3
+	bcc	.L1674
+	ldr	w0, [x29, 200]
 	add	w0, w0, 1
-	str	w0, [x29, 164]
+	str	w0, [x29, 200]
 	cmp	w0, 5
-	bls	.L1585
-	b	.L1590
-.L1569:
-	cmp	w0, 63
-	adrp	x3, idb_buf
-	bhi	.L1587
+	bls	.L1683
+	b	.L1677
+.L1658:
+	cmp	w0, 64
+	adrp	x21, .LANCHOR185
+	bne	.L1678
+	mov	w0, 262144
+	bl	ftl_malloc
+	str	x0, [x21, #:lo12:.LANCHOR185]
+	mov	w0, 262144
+	bl	ftl_malloc
+	mov	x1, x0
+	adrp	x0, .LANCHOR186
+	str	x1, [x0, #:lo12:.LANCHOR186]
+	ldr	x0, [x21, #:lo12:.LANCHOR185]
+	cbz	x0, .L1679
+	cbz	x1, .L1679
+	adrp	x1, .LANCHOR184
+	mov	w2, 1
+	str	w2, [x1, #:lo12:.LANCHOR184]
+	mov	w2, 262144
+	mov	w1, 0
+	bl	ftl_memset
+.L1678:
+	ldr	x0, [x21, #:lo12:.LANCHOR185]
+	cmp	w22, 63
+	bhi	.L1680
 	mov	w1, 64
-	sub	w1, w1, w0
-	sub	w2, w22, w1
+	ldr	x3, [x29, 184]
+	sub	w1, w1, w22
+	sub	w2, w25, w1
 	ubfiz	x1, x1, 9, 25
-	add	x1, x24, x1
-	add	x0, x3, :lo12:idb_buf
-.L1588:
-	mov	w3, 1
-	str	w3, [x25, #:lo12:.LANCHOR179]
-	cmp	w5, 576
-	bls	.L1589
-	sub	w2, w2, w4
+	add	x1, x3, x1
+.L1681:
+	cmp	w20, 576
+	bls	.L1682
+	sub	w2, w2, w19
 	sub	w2, w2, #447
-.L1589:
+.L1682:
 	lsl	w2, w2, 9
-	bl	memcpy
-	b	.L1570
-.L1587:
-	lsl	w0, w0, 7
-	add	x3, x3, :lo12:idb_buf
-	sub	w0, w0, #8192
-	mov	x1, x2
-	add	x0, x3, x0, lsl 2
-	mov	w2, w22
-	b	.L1588
+	bl	ftl_memcpy
+	b	.L1659
+.L1679:
+	adrp	x1, .LANCHOR187
+	adrp	x0, .LC116
+	add	x1, x1, :lo12:.LANCHOR187
+	add	x0, x0, :lo12:.LC116
+	bl	printf
+	b	.L1678
+.L1680:
+	lsl	w1, w22, 7
+	mov	w2, w25
+	sub	w1, w1, #8192
+	add	x0, x0, x1, lsl 2
+	ldr	x1, [x29, 184]
+	b	.L1681
 	.size	sftl_write, .-sftl_write
-	.section	.text.FtlLoadSysInfo,"ax",@progbits
+	.section	.text.FtlMakeBbt,"ax",@progbits
 	.align	2
-	.global	FtlLoadSysInfo
-	.type	FtlLoadSysInfo, %function
-FtlLoadSysInfo:
-	stp	x29, x30, [sp, -96]!
-	mov	w1, 0
+	.global	FtlMakeBbt
+	.type	FtlMakeBbt, %function
+FtlMakeBbt:
+	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	mov	w22, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR106
+	adrp	x20, .LANCHOR37
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR107
-	stp	x21, x22, [sp, 32]
-	add	x21, x19, :lo12:.LANCHOR106
+	add	x21, x20, :lo12:.LANCHOR37
 	stp	x25, x26, [sp, 64]
-	adrp	x26, .LANCHOR108
+	add	x24, x21, 32
 	stp	x27, x28, [sp, 80]
-	adrp	x25, .LANCHOR42
-	ldr	x0, [x23, #:lo12:.LANCHOR107]
-	adrp	x24, .LANCHOR5
-	str	x0, [x21, 8]
-	adrp	x20, .LANCHOR79
-	ldr	x0, [x26, #:lo12:.LANCHOR108]
-	str	x0, [x21, 16]
-	ldr	x0, [x25, #:lo12:.LANCHOR42]
-	ldrh	w2, [x24, #:lo12:.LANCHOR5]
-	lsl	w2, w2, 1
-	bl	ftl_memset
-	ldrh	w0, [x20, #:lo12:.LANCHOR79]
-	mov	w1, 65535
-	cmp	w0, w1
-	bne	.L1601
-.L1609:
-	mov	w0, -1
-.L1600:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 96
-	ret
-.L1601:
-	add	x27, x20, :lo12:.LANCHOR79
-	mov	w1, 1
-	bl	FtlGetLastWrittenPage
-	sxth	w22, w0
-	add	w0, w0, 1
-	mov	w28, 61604
-	strh	w0, [x27, 2]
-	mov	w27, 19539
-	movk	w27, 0x4654, lsl 16
-.L1603:
-	tbz	w22, #31, .L1606
-	adrp	x1, .LANCHOR180
-	adrp	x0, .LC1
-	mov	w2, 1437
-	add	x1, x1, :lo12:.LANCHOR180
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L1605:
-	adrp	x1, .LANCHOR23
-	ldrh	w0, [x24, #:lo12:.LANCHOR5]
-	ldrh	w1, [x1, #:lo12:.LANCHOR23]
-	add	x0, x0, 24
-	cmp	x1, x0, lsl 1
-	bcs	.L1608
-	adrp	x1, .LANCHOR180
-	adrp	x0, .LC1
-	mov	w2, 1439
-	add	x1, x1, :lo12:.LANCHOR180
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L1608:
-	add	x22, x19, :lo12:.LANCHOR106
-	adrp	x19, .LANCHOR39
-	add	x21, x19, :lo12:.LANCHOR39
-	mov	w2, 48
-	mov	x0, x21
-	ldr	x1, [x22, 8]
-	bl	ftl_memcpy
-	ldr	x0, [x25, #:lo12:.LANCHOR42]
-	ldrh	w2, [x24, #:lo12:.LANCHOR5]
-	ldr	x1, [x22, 8]
-	lsl	w2, w2, 1
-	add	x1, x1, 48
-	bl	ftl_memcpy
-	ldrh	w1, [x24, #:lo12:.LANCHOR5]
-	ldr	x0, [x22, 8]
-	lsr	w2, w1, 3
-	ubfiz	x1, x1, 1, 16
-	add	x1, x1, 48
-	add	w2, w2, 4
-	and	x1, x1, -4
-	add	x1, x0, x1
-	adrp	x0, .LANCHOR1
-	ldr	x0, [x0, #:lo12:.LANCHOR1]
-	bl	ftl_memcpy
-	ldr	w1, [x19, #:lo12:.LANCHOR39]
-	mov	w0, 19539
-	movk	w0, 0x4654, lsl 16
-	cmp	w1, w0
-	bne	.L1609
-	add	x20, x20, :lo12:.LANCHOR79
+	bl	FtlBbtMemInit
+	bl	FtlLoadFactoryBbt
+	adrp	x28, .LANCHOR148
+	add	x21, x21, 12
+	add	x25, x28, :lo12:.LANCHOR148
 	adrp	x0, .LANCHOR10
-	ldrh	w1, [x21, 8]
-	ldrb	w2, [x21, 10]
-	ldrh	w0, [x0, #:lo12:.LANCHOR10]
-	strh	w1, [x20, 6]
-	cmp	w2, w0
-	bne	.L1609
-	adrp	x0, .LANCHOR181
-	adrp	x2, .LANCHOR61
-	adrp	x3, .LANCHOR3
-	str	w1, [x0, #:lo12:.LANCHOR181]
-	adrp	x0, .LANCHOR19
-	ldrh	w3, [x3, #:lo12:.LANCHOR3]
-	ldrh	w0, [x0, #:lo12:.LANCHOR19]
-	mul	w0, w0, w1
-	str	w0, [x2, #:lo12:.LANCHOR61]
-	adrp	x2, .LANCHOR12
-	ldrh	w2, [x2, #:lo12:.LANCHOR12]
-	mul	w0, w2, w0
-	adrp	x2, .LANCHOR34
-	str	w0, [x2, #:lo12:.LANCHOR34]
-	adrp	x0, .LANCHOR7
-	ldr	w2, [x0, #:lo12:.LANCHOR7]
-	adrp	x0, .LANCHOR37+6
-	ldrh	w0, [x0, #:lo12:.LANCHOR37+6]
-	cmp	w1, w2
-	sub	w0, w2, w0
-	sub	w0, w0, w1
-	udiv	w0, w0, w3
-	adrp	x3, .LANCHOR78
-	strh	w0, [x3, #:lo12:.LANCHOR78]
-	bls	.L1610
-	adrp	x1, .LANCHOR180
-	adrp	x0, .LC1
-	mov	w2, 1461
-	add	x1, x1, :lo12:.LANCHOR180
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L1610:
-	add	x1, x19, :lo12:.LANCHOR39
-	adrp	x0, .LANCHOR51
-	add	x3, x0, :lo12:.LANCHOR51
-	adrp	x20, .LANCHOR80
-	ldrh	w2, [x1, 16]
-	ldrh	w6, [x1, 14]
-	strh	w6, [x0, #:lo12:.LANCHOR51]
-	lsr	w4, w2, 6
-	and	w2, w2, 63
-	strb	w2, [x3, 6]
-	ldrb	w2, [x1, 11]
-	strb	w2, [x3, 8]
-	add	x2, x20, :lo12:.LANCHOR80
-	strh	w4, [x3, 2]
-	mov	w3, -1
-	strh	w3, [x20, #:lo12:.LANCHOR80]
-	strh	wzr, [x2, 2]
-	strb	wzr, [x2, 6]
-	strb	wzr, [x2, 8]
-	adrp	x2, .LANCHOR52
-	ldrh	w3, [x1, 18]
-	add	x4, x2, :lo12:.LANCHOR52
-	strh	w3, [x2, #:lo12:.LANCHOR52]
-	mov	x21, x2
-	ldrh	w3, [x1, 20]
-	lsr	w5, w3, 6
-	and	w3, w3, 63
-	strb	w3, [x4, 6]
-	ldrb	w3, [x1, 12]
-	strh	w5, [x4, 2]
-	strb	w3, [x4, 8]
-	adrp	x4, .LANCHOR53
-	ldrh	w3, [x1, 22]
-	add	x5, x4, :lo12:.LANCHOR53
-	strh	w3, [x4, #:lo12:.LANCHOR53]
-	mov	x22, x4
-	ldrh	w3, [x1, 24]
-	lsr	w7, w3, 6
-	and	w3, w3, 63
-	strb	w3, [x5, 6]
-	ldrb	w3, [x1, 13]
-	strb	w3, [x5, 8]
-	adrp	x3, .LANCHOR67
-	strh	w7, [x5, 2]
-	ldr	w5, [x1, 32]
-	str	wzr, [x3, #:lo12:.LANCHOR67]
-	adrp	x3, .LANCHOR64
-	str	wzr, [x3, #:lo12:.LANCHOR64]
-	adrp	x3, .LANCHOR62
-	str	wzr, [x3, #:lo12:.LANCHOR62]
-	adrp	x3, .LANCHOR66
-	str	wzr, [x3, #:lo12:.LANCHOR66]
-	adrp	x3, .LANCHOR72
-	str	w5, [x3, #:lo12:.LANCHOR72]
-	adrp	x3, .LANCHOR73
-	str	wzr, [x3, #:lo12:.LANCHOR73]
-	adrp	x3, .LANCHOR76
-	str	wzr, [x3, #:lo12:.LANCHOR76]
-	adrp	x3, .LANCHOR65
-	str	wzr, [x3, #:lo12:.LANCHOR65]
-	ldr	w3, [x1, 40]
-	adrp	x1, .LANCHOR70
-	ldr	w5, [x1, #:lo12:.LANCHOR70]
-	cmp	w3, w5
-	bls	.L1611
-	str	w3, [x1, #:lo12:.LANCHOR70]
-.L1611:
-	add	x19, x19, :lo12:.LANCHOR39
-	adrp	x1, .LANCHOR71
-	ldr	w3, [x1, #:lo12:.LANCHOR71]
-	ldr	w2, [x19, 36]
-	cmp	w2, w3
-	bls	.L1612
-	str	w2, [x1, #:lo12:.LANCHOR71]
-.L1612:
-	mov	w1, 65535
-	cmp	w6, w1
-	beq	.L1613
-	add	x0, x0, :lo12:.LANCHOR51
-	bl	make_superblock
-.L1613:
-	ldrh	w2, [x21, #:lo12:.LANCHOR52]
-	mov	w1, 65535
-	add	x0, x21, :lo12:.LANCHOR52
-	cmp	w2, w1
-	beq	.L1614
-	bl	make_superblock
-.L1614:
-	ldrh	w2, [x22, #:lo12:.LANCHOR53]
-	mov	w1, 65535
-	add	x0, x22, :lo12:.LANCHOR53
-	cmp	w2, w1
-	beq	.L1615
-	bl	make_superblock
-.L1615:
-	ldrh	w2, [x20, #:lo12:.LANCHOR80]
-	mov	w1, 65535
-	add	x0, x20, :lo12:.LANCHOR80
-	cmp	w2, w1
-	beq	.L1616
-	bl	make_superblock
-.L1616:
-	mov	w0, 0
-	b	.L1600
-.L1606:
-	ldrh	w0, [x20, #:lo12:.LANCHOR79]
+	add	x0, x0, :lo12:.LANCHOR10
+	str	x0, [x29, 120]
+.L1701:
+	ldr	x0, [x29, 120]
+	ldrh	w0, [x0]
+	cmp	w22, w0
+	bcc	.L1707
+	adrp	x21, .LANCHOR25
+	add	x21, x21, :lo12:.LANCHOR25
+	mov	w19, 0
+.L1708:
+	ldrh	w0, [x21]
+	cmp	w0, w19
+	bhi	.L1709
+	add	x21, x20, :lo12:.LANCHOR37
+	mov	w22, 65535
+	ldrh	w19, [x21, 12]
+	sub	w19, w19, #1
+	and	w19, w19, 65535
+.L1710:
+	ldrh	w0, [x21, 12]
+	sub	w0, w0, #47
+	cmp	w0, w19
+	bgt	.L1714
+	mov	w0, w19
+	bl	FtlBbmIsBadBlock
+	cmp	w0, 1
+	beq	.L1711
+	mov	w0, w19
+	bl	FlashTestBlk
+	cbz	w0, .L1712
+	mov	w0, w19
+	bl	FtlBbmMapBadBlock
+.L1711:
+	sub	w19, w19, #1
+	and	w19, w19, 65535
+	b	.L1710
+.L1707:
+	adrp	x2, .LANCHOR123
+	adrp	x0, .LANCHOR115
+	add	x19, x28, :lo12:.LANCHOR148
+	ldrh	w1, [x21]
+	ldr	x0, [x0, #:lo12:.LANCHOR115]
+	mov	w3, 65535
+	ldr	x26, [x2, #:lo12:.LANCHOR123]
+	cmp	w1, w3
+	stp	x0, x26, [x19, 8]
+	adrp	x23, .LANCHOR17
+	str	x2, [x29, 112]
+	beq	.L1702
+	ldrh	w4, [x23, #:lo12:.LANCHOR17]
 	mov	w2, 1
+	madd	w27, w4, w22, w1
 	mov	w1, w2
-	orr	w0, w22, w0, lsl 10
-	str	w0, [x21, 4]
-	ldr	x0, [x23, #:lo12:.LANCHOR107]
-	str	x0, [x21, 8]
-	mov	x0, x21
+	lsl	w0, w27, 10
+	str	w0, [x19, 4]
+	mov	x0, x19
 	bl	FlashReadPages
-	ldr	w0, [x21]
+	ldr	x1, [x19, 8]
+	ldr	x0, [x24]
+	ldrh	w2, [x23, #:lo12:.LANCHOR17]
+	add	w2, w2, 7
+	lsr	w2, w2, 3
+	bl	ftl_memcpy
+.L1703:
+	mov	w0, w27
+	add	w22, w22, 1
+	bl	FtlBbmMapBadBlock
+	add	x24, x24, 8
+	add	x21, x21, 2
+	b	.L1701
+.L1702:
+	mov	w1, w22
+	bl	FlashGetBadBlockList
+	ldr	x0, [x19, 8]
+	ldr	x1, [x24]
+	bl	FtlBbt2Bitmap
+	ldrh	w19, [x23, #:lo12:.LANCHOR17]
+	add	x23, x23, :lo12:.LANCHOR17
+	adrp	x0, .LANCHOR137
+	sub	w19, w19, #1
+	add	x0, x0, :lo12:.LANCHOR137
+	and	w19, w19, 65535
+	str	x0, [x29, 104]
+.L1704:
+	ldrh	w0, [x23]
+	madd	w0, w22, w0, w19
+	bl	FtlBbmIsBadBlock
+	cmp	w0, 1
+	beq	.L1705
+	ldr	x0, [x29, 112]
+	mov	w2, 16
+	strh	w19, [x21]
+	mov	w1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR123]
+	bl	ftl_memset
+	adrp	x0, .LANCHOR115
+	mov	w2, 4096
+	mov	w1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR115]
+	bl	ftl_memset
+	mov	w0, -3872
+	strh	w0, [x26]
+	ldrh	w4, [x23]
+	ldrh	w0, [x21]
+	strh	w0, [x26, 2]
+	ldr	x1, [x24]
+	str	wzr, [x26, 4]
+	madd	w27, w4, w22, w0
+	lsl	w0, w27, 10
+	str	w0, [x25, 4]
+	ldr	x0, [x29, 104]
+	ldrh	w2, [x0]
+	ldr	x0, [x25, 8]
+	lsl	w2, w2, 2
+	bl	ftl_memcpy
+	mov	w2, 1
+	mov	x0, x25
+	mov	w1, w2
+	bl	FlashEraseBlocks
+	mov	w3, 1
+	mov	x0, x25
+	mov	w2, w3
+	mov	w1, w3
+	bl	FlashProgPages
+	ldr	w0, [x25]
 	cmn	w0, #1
-	beq	.L1604
-	ldr	x0, [x23, #:lo12:.LANCHOR107]
-	ldr	w0, [x0]
-	cmp	w0, w27
-	bne	.L1604
-	ldr	x0, [x26, #:lo12:.LANCHOR108]
-	ldrh	w0, [x0]
-	cmp	w0, w28
-	beq	.L1605
-.L1604:
-	sub	w22, w22, #1
-	sxth	w22, w22
-	b	.L1603
-	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
-	.section	.text.FtlSysBlkInit,"ax",@progbits
-	.align	2
-	.global	FtlSysBlkInit
-	.type	FtlSysBlkInit, %function
-FtlSysBlkInit:
-	stp	x29, x30, [sp, -64]!
-	adrp	x0, .LANCHOR4
-	add	x29, sp, 0
-	ldrh	w0, [x0, #:lo12:.LANCHOR4]
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR161
-	stp	x21, x22, [sp, 32]
-	stp	x23, x24, [sp, 48]
-	strh	wzr, [x20, #:lo12:.LANCHOR161]
-	bl	FtlFreeSysBlkQueueInit
-	bl	FtlScanSysBlk
-	adrp	x0, .LANCHOR79
-	ldrh	w1, [x0, #:lo12:.LANCHOR79]
-	mov	w0, 65535
-	cmp	w1, w0
-	bne	.L1623
-.L1625:
-	mov	w23, -1
-.L1622:
-	mov	w0, w23
+	bne	.L1703
+	mov	w0, w27
+	bl	FtlBbmMapBadBlock
+	b	.L1704
+.L1705:
+	sub	w19, w19, #1
+	and	w19, w19, 65535
+	b	.L1704
+.L1709:
+	mov	w0, w19
+	add	w19, w19, 1
+	bl	FtlBbmMapBadBlock
+	and	w19, w19, 65535
+	b	.L1708
+.L1712:
+	ldrh	w0, [x21]
+	cmp	w0, w22
+	bne	.L1713
+	strh	w19, [x21]
+	b	.L1711
+.L1713:
+	strh	w19, [x21, 4]
+.L1714:
+	adrp	x0, .LANCHOR106
+	add	x19, x20, :lo12:.LANCHOR37
+	ldrh	w1, [x20, #:lo12:.LANCHOR37]
+	mov	w2, 2
+	ldr	x0, [x0, #:lo12:.LANCHOR106]
+	str	wzr, [x19, 8]
+	lsl	w1, w1, 10
+	strh	wzr, [x19, 2]
+	str	w1, [x0, 4]
+	ldrh	w1, [x19, 4]
+	lsl	w1, w1, 10
+	str	w1, [x0, 36]
+	mov	w1, 1
+	bl	FlashEraseBlocks
+	ldrh	w0, [x20, #:lo12:.LANCHOR37]
+	bl	FtlBbmMapBadBlock
+	ldrh	w0, [x19, 4]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	strh	wzr, [x19, 2]
+	ldr	w0, [x19, 8]
+	ldrh	w1, [x19, 4]
+	add	w0, w0, 1
+	str	w0, [x19, 8]
+	ldrh	w0, [x20, #:lo12:.LANCHOR37]
+	strh	w0, [x19, 4]
+	strh	w1, [x20, #:lo12:.LANCHOR37]
+	bl	FtlBbmTblFlush
+	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 64
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
 	ret
-.L1623:
-	bl	FtlLoadSysInfo
-	mov	w23, w0
-	cbnz	w0, .L1625
-	bl	FtlLoadMapInfo
-	bl	FtlLoadVonderInfo
-	bl	Ftl_load_ext_data
-	bl	FtlLoadEctTbl
-	bl	FtlFreeSysBLkSort
-	bl	SupperBlkListInit
-	bl	FtlPowerLostRecovery
-	mov	w0, 1
-	bl	FtlUpdateVaildLpn
-	adrp	x0, .LANCHOR33
-	ldrh	w2, [x0, #:lo12:.LANCHOR33]
-	adrp	x0, .LANCHOR55
-	ldr	x1, [x0, #:lo12:.LANCHOR55]
-	mov	w0, 0
-	add	x1, x1, 4
-.L1626:
-	cmp	w0, w2
-	bge	.L1631
-	ldr	w3, [x1], 16
-	tbz	w3, #31, .L1627
-.L1631:
-	adrp	x19, .LANCHOR39
-	add	x3, x19, :lo12:.LANCHOR39
-	cmp	w0, w2
-	adrp	x22, .LANCHOR51
-	ldrh	w1, [x3, 28]
-	add	w1, w1, 1
-	strh	w1, [x3, 28]
-	bge	.L1635
-.L1628:
-	add	x21, x22, :lo12:.LANCHOR51
-	adrp	x24, .LANCHOR52
-	mov	x0, x21
-	add	x20, x24, :lo12:.LANCHOR52
-	bl	FtlSuperblockPowerLostFix
-	mov	x0, x20
-	bl	FtlSuperblockPowerLostFix
-	adrp	x0, .LANCHOR42
-	ldrh	w3, [x21, 4]
-	ldr	x1, [x0, #:lo12:.LANCHOR42]
-	ldrh	w0, [x22, #:lo12:.LANCHOR51]
-	lsl	x0, x0, 1
-	ldrh	w2, [x1, x0]
-	sub	w2, w2, w3
-	adrp	x3, .LANCHOR19
-	strh	w2, [x1, x0]
-	strb	wzr, [x21, 6]
-	ldrh	w0, [x3, #:lo12:.LANCHOR19]
-	strh	w0, [x21, 2]
-	ldrh	w0, [x24, #:lo12:.LANCHOR52]
-	strh	wzr, [x21, 4]
-	ldrh	w4, [x20, 4]
-	lsl	x0, x0, 1
-	ldrh	w2, [x1, x0]
-	sub	w2, w2, w4
-	strh	w2, [x1, x0]
-	strb	wzr, [x20, 6]
-	ldrh	w0, [x3, #:lo12:.LANCHOR19]
-	strh	w0, [x20, 2]
-	strh	wzr, [x20, 4]
-	adrp	x0, .LANCHOR144
-	add	x0, x0, :lo12:.LANCHOR144
-	bl	FtlMapBlkWriteDump_data
-	adrp	x0, .LANCHOR149
-	add	x0, x0, :lo12:.LANCHOR149
-	bl	FtlMapBlkWriteDump_data
-	add	x1, x19, :lo12:.LANCHOR39
-	ldrh	w0, [x1, 30]
-	add	w0, w0, 1
-	strh	w0, [x1, 30]
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
-.L1637:
-	bl	FtlVpcTblFlush
-	add	x21, x22, :lo12:.LANCHOR51
-	ldrh	w0, [x22, #:lo12:.LANCHOR51]
-	mov	w1, 65535
-	cmp	w0, w1
-	beq	.L1634
-	ldrh	w1, [x21, 4]
-	cbnz	w1, .L1634
-	adrp	x22, .LANCHOR52
-	add	x20, x22, :lo12:.LANCHOR52
-	ldrh	w1, [x20, 4]
-	cbnz	w1, .L1634
-	bl	FtlGcRefreshBlock
-	ldrh	w0, [x22, #:lo12:.LANCHOR52]
-	bl	FtlGcRefreshBlock
-	mov	x0, x21
-	bl	allocate_new_data_superblock
-	mov	x0, x20
-	bl	allocate_new_data_superblock
-.L1634:
-	add	x19, x19, :lo12:.LANCHOR39
-	ldrh	w0, [x19, 28]
-	tst	x0, 31
-	bne	.L1622
-	bl	FtlVpcCheckAndModify
-	b	.L1622
-.L1627:
-	add	w0, w0, 1
-	b	.L1626
-.L1635:
-	ldrh	w0, [x20, #:lo12:.LANCHOR161]
-	cbnz	w0, .L1628
-	bl	l2p_flush
-	b	.L1637
-	.size	FtlSysBlkInit, .-FtlSysBlkInit
+	.size	FtlMakeBbt, .-FtlMakeBbt
 	.section	.text.ftl_low_format,"ax",@progbits
 	.align	2
 	.global	ftl_low_format
@@ -12210,49 +12643,49 @@ ftl_low_format:
 	str	wzr, [x20, #:lo12:.LANCHOR70]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	w0, .L1639
+	cbz	w0, .L1721
 	bl	FtlMakeBbt
-.L1639:
+.L1721:
 	adrp	x23, .LANCHOR12
-	adrp	x0, .LANCHOR115
+	adrp	x0, .LANCHOR118
 	mov	w6, 23752
 	ldrh	w1, [x23, #:lo12:.LANCHOR12]
 	movk	w6, 0xa0f, lsl 16
-	ldr	x4, [x0, #:lo12:.LANCHOR115]
-	adrp	x0, .LANCHOR113
+	ldr	x4, [x0, #:lo12:.LANCHOR118]
+	adrp	x0, .LANCHOR119
 	lsl	w1, w1, 7
-	ldr	x5, [x0, #:lo12:.LANCHOR113]
+	ldr	x5, [x0, #:lo12:.LANCHOR119]
 	mov	w0, 0
-.L1640:
+.L1722:
 	cmp	w0, w1
-	blt	.L1641
+	blt	.L1723
 	adrp	x21, .LANCHOR5
 	adrp	x22, .LANCHOR6
 	add	x26, x22, :lo12:.LANCHOR6
 	mov	w19, 0
 	ldrh	w25, [x21, #:lo12:.LANCHOR5]
-.L1642:
+.L1724:
 	ldrh	w0, [x26]
 	cmp	w0, w25
-	bhi	.L1643
+	bhi	.L1725
 	adrp	x25, .LANCHOR3
 	sub	w1, w19, #2
 	ldrh	w0, [x25, #:lo12:.LANCHOR3]
 	cmp	w1, w0, lsl 1
-	bgt	.L1644
-.L1648:
+	bgt	.L1726
+.L1730:
 	add	x26, x21, :lo12:.LANCHOR5
 	mov	w19, 0
 	mov	w24, 0
-.L1645:
+.L1727:
 	ldrh	w0, [x26]
 	cmp	w0, w24
-	bhi	.L1649
-	adrp	x0, .LANCHOR112
+	bhi	.L1731
+	adrp	x0, .LANCHOR111
 	ldrh	w1, [x22, #:lo12:.LANCHOR6]
 	ldrh	w4, [x25, #:lo12:.LANCHOR3]
 	adrp	x2, .LANCHOR78
-	str	w1, [x0, #:lo12:.LANCHOR112]
+	str	w1, [x0, #:lo12:.LANCHOR111]
 	adrp	x0, .LANCHOR7
 	adrp	x3, .LANCHOR61
 	ldr	w1, [x0, #:lo12:.LANCHOR7]
@@ -12264,37 +12697,37 @@ ftl_low_format:
 	mov	w6, 24
 	mul	w6, w4, w6
 	cmp	w19, w6
-	ble	.L1650
+	ble	.L1732
 	sub	w1, w1, w19
 	udiv	w1, w1, w4
 	str	w1, [x3, #:lo12:.LANCHOR61]
 	lsr	w1, w1, 5
 	add	w1, w1, 24
 	strh	w1, [x2, #:lo12:.LANCHOR78]
-.L1650:
+.L1732:
 	adrp	x1, .LANCHOR15
 	ldrh	w1, [x1, #:lo12:.LANCHOR15]
-	cbz	w1, .L1652
+	cbz	w1, .L1734
 	ldrh	w6, [x2, #:lo12:.LANCHOR78]
 	add	w6, w6, w1, lsr 1
 	strh	w6, [x2, #:lo12:.LANCHOR78]
 	mul	w6, w1, w4
 	cmp	w19, w6
-	bge	.L1652
+	bge	.L1734
 	add	w1, w1, 32
 	str	w5, [x3, #:lo12:.LANCHOR61]
 	add	w1, w0, w1
 	strh	w1, [x2, #:lo12:.LANCHOR78]
-.L1652:
+.L1734:
 	ldrh	w1, [x2, #:lo12:.LANCHOR78]
-	adrp	x25, .LANCHOR181
+	adrp	x25, .LANCHOR152
 	ldr	w0, [x3, #:lo12:.LANCHOR61]
 	adrp	x24, .LANCHOR42
 	sub	w0, w0, w1
 	adrp	x1, .LANCHOR19
 	ldrh	w1, [x1, #:lo12:.LANCHOR19]
 	mul	w0, w0, w4
-	str	w0, [x25, #:lo12:.LANCHOR181]
+	str	w0, [x25, #:lo12:.LANCHOR152]
 	mul	w0, w1, w0
 	ldrh	w1, [x23, #:lo12:.LANCHOR12]
 	str	w0, [x3, #:lo12:.LANCHOR61]
@@ -12329,20 +12762,20 @@ ftl_low_format:
 	ldr	x0, [x0, #:lo12:.LANCHOR1]
 	strb	wzr, [x19, 6]
 	bl	ftl_memset
-.L1654:
+.L1736:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1655
+	cbnz	w1, .L1737
 	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L1654
-.L1641:
+	b	.L1736
+.L1723:
 	ubfiz	x3, x0, 2, 16
 	mvn	w2, w0
 	orr	w2, w0, w2, lsl 16
@@ -12350,8 +12783,8 @@ ftl_low_format:
 	and	w0, w0, 65535
 	str	w2, [x4, x3]
 	str	w6, [x5, x3]
-	b	.L1640
-.L1643:
+	b	.L1722
+.L1725:
 	mov	w0, w25
 	mov	w1, 1
 	add	w25, w25, 1
@@ -12359,8 +12792,8 @@ ftl_low_format:
 	add	w19, w19, w0
 	and	w25, w25, 65535
 	and	w19, w19, 65535
-	b	.L1642
-.L1644:
+	b	.L1724
+.L1726:
 	udiv	w0, w19, w0
 	adrp	x1, .LANCHOR31
 	ldr	w19, [x1, #:lo12:.LANCHOR31]
@@ -12370,17 +12803,17 @@ ftl_low_format:
 	add	x24, x22, :lo12:.LANCHOR6
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	w19, [x21, #:lo12:.LANCHOR5]
-.L1646:
+.L1728:
 	ldrh	w0, [x24]
 	cmp	w0, w19
-	bls	.L1648
+	bls	.L1730
 	mov	w0, w19
 	add	w19, w19, 1
 	mov	w1, 1
 	and	w19, w19, 65535
 	bl	FtlLowFormatEraseBlock
-	b	.L1646
-.L1649:
+	b	.L1728
+.L1731:
 	mov	w0, w24
 	mov	w1, 0
 	add	w24, w24, 1
@@ -12388,8 +12821,8 @@ ftl_low_format:
 	add	w19, w19, w0
 	and	w24, w24, 65535
 	and	w19, w19, 65535
-	b	.L1645
-.L1655:
+	b	.L1727
+.L1737:
 	ldr	w1, [x20, #:lo12:.LANCHOR70]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
@@ -12409,20 +12842,20 @@ ftl_low_format:
 	mov	w1, 1
 	strb	wzr, [x0, 6]
 	strb	w1, [x0, 8]
-.L1656:
+.L1738:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1657
+	cbnz	w1, .L1739
 	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L1656
-.L1657:
+	b	.L1738
+.L1739:
 	ldr	w1, [x20, #:lo12:.LANCHOR70]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
@@ -12438,7 +12871,7 @@ ftl_low_format:
 	adrp	x2, .LANCHOR79
 	add	x1, x2, :lo12:.LANCHOR79
 	strh	w0, [x2, #:lo12:.LANCHOR79]
-	ldr	w0, [x25, #:lo12:.LANCHOR181]
+	ldr	w0, [x25, #:lo12:.LANCHOR152]
 	strh	w0, [x1, 6]
 	ldr	w0, [x20, #:lo12:.LANCHOR70]
 	str	w0, [x1, 8]
@@ -12448,11 +12881,11 @@ ftl_low_format:
 	str	w0, [x20, #:lo12:.LANCHOR70]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	w0, .L1658
+	cbnz	w0, .L1740
 	adrp	x0, .LANCHOR86
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR86]
-.L1658:
+.L1740:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -12461,53 +12894,6 @@ ftl_low_format:
 	ldp	x29, x30, [sp], 80
 	ret
 	.size	ftl_low_format, .-ftl_low_format
-	.section	.text.sftl_init,"ax",@progbits
-	.align	2
-	.global	sftl_init
-	.type	sftl_init, %function
-sftl_init:
-	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LC70
-	add	x1, x1, :lo12:.LC70
-	mov	w0, -1
-	add	x29, sp, 0
-	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR86
-	str	w0, [x19, #:lo12:.LANCHOR86]
-	adrp	x0, .LC71
-	add	x0, x0, :lo12:.LC71
-	bl	printf
-	adrp	x0, .LANCHOR0
-	add	x0, x0, :lo12:.LANCHOR0
-	bl	FtlConstantsInit
-	bl	FtlMemInit
-	bl	FtlVariablesInit
-	adrp	x0, .LANCHOR4
-	ldrh	w0, [x0, #:lo12:.LANCHOR4]
-	bl	FtlFreeSysBlkQueueInit
-	bl	FtlLoadBbt
-	cbnz	w0, .L1667
-	bl	FtlSysBlkInit
-	cbnz	w0, .L1667
-	mov	w0, 1
-	str	w0, [x19, #:lo12:.LANCHOR86]
-	adrp	x0, .LANCHOR48
-	ldrh	w0, [x0, #:lo12:.LANCHOR48]
-	cmp	w0, 15
-	bhi	.L1667
-	mov	w19, 8129
-.L1666:
-	mov	w1, 1
-	mov	w0, 0
-	bl	rk_ftl_garbage_collect
-	subs	w19, w19, #1
-	bne	.L1666
-.L1667:
-	mov	w0, 0
-	ldr	x19, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	ret
-	.size	sftl_init, .-sftl_init
 	.section	.text.ftl_memcmp,"ax",@progbits
 	.align	2
 	.global	ftl_memcmp
@@ -12516,7 +12902,6 @@ ftl_memcmp:
 	uxtw	x2, w2
 	b	memcmp
 	.size	ftl_memcmp, .-ftl_memcmp
-	.global	ftl_temp_buf
 	.global	g_nand_ops
 	.global	g_nand_phy_info
 	.global	gc_ink_free_return_value
@@ -12531,6 +12916,9 @@ ftl_memcmp:
 	.global	g_recovery_ppa_tbl
 	.global	g_recovery_page_min_ver
 	.global	g_recovery_page_num
+	.global	sftl_nand_check_spare_buf
+	.global	sftl_temp_buf
+	.global	sftl_nand_check_buf
 	.global	g_cur_erase_blk
 	.global	g_gc_skip_write_count
 	.global	g_gc_head_data_block_count
@@ -12908,19 +13296,6 @@ c_gc_page_buf_num:
 	.size	c_mlc_erase_count_value, 2
 c_mlc_erase_count_value:
 	.zero	2
-	.section	.bss.check_buf,"aw",@nobits
-	.align	3
-	.type	check_buf, %object
-	.size	check_buf, 4096
-check_buf:
-	.zero	4096
-	.section	.bss.check_spare_buf,"aw",@nobits
-	.align	3
-	.set	.LANCHOR110,. + 0
-	.type	check_spare_buf, %object
-	.size	check_spare_buf, 512
-check_spare_buf:
-	.zero	512
 	.section	.bss.check_vpc_table,"aw",@nobits
 	.align	3
 	.type	check_vpc_table, %object
@@ -12929,17 +13304,11 @@ check_vpc_table:
 	.zero	16384
 	.section	.bss.ftl_gc_temp_power_lost_recovery_flag,"aw",@nobits
 	.align	2
-	.set	.LANCHOR152,. + 0
+	.set	.LANCHOR144,. + 0
 	.type	ftl_gc_temp_power_lost_recovery_flag, %object
 	.size	ftl_gc_temp_power_lost_recovery_flag, 4
 ftl_gc_temp_power_lost_recovery_flag:
 	.zero	4
-	.section	.bss.ftl_temp_buf,"aw",@nobits
-	.align	3
-	.type	ftl_temp_buf, %object
-	.size	ftl_temp_buf, 4096
-ftl_temp_buf:
-	.zero	4096
 	.section	.bss.gBbtInfo,"aw",@nobits
 	.align	3
 	.set	.LANCHOR37,. + 0
@@ -12949,7 +13318,7 @@ gBbtInfo:
 	.zero	96
 	.section	.bss.gL2pMapInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR144,. + 0
+	.set	.LANCHOR140,. + 0
 	.type	gL2pMapInfo, %object
 	.size	gL2pMapInfo, 64
 gL2pMapInfo:
@@ -12970,7 +13339,7 @@ gSysInfo:
 	.zero	12
 	.section	.bss.gVendorBlkInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR149,. + 0
+	.set	.LANCHOR158,. + 0
 	.type	gVendorBlkInfo, %object
 	.size	gVendorBlkInfo, 64
 gVendorBlkInfo:
@@ -12998,7 +13367,7 @@ g_MaxLbaSector:
 	.zero	4
 	.section	.bss.g_MaxLbn,"aw",@nobits
 	.align	2
-	.set	.LANCHOR181,. + 0
+	.set	.LANCHOR152,. + 0
 	.type	g_MaxLbn, %object
 	.size	g_MaxLbn, 4
 g_MaxLbn:
@@ -13033,7 +13402,7 @@ g_buffer_superblock:
 	.zero	48
 	.section	.bss.g_cur_erase_blk,"aw",@nobits
 	.align	2
-	.set	.LANCHOR112,. + 0
+	.set	.LANCHOR111,. + 0
 	.type	g_cur_erase_blk, %object
 	.size	g_cur_erase_blk, 4
 g_cur_erase_blk:
@@ -13047,14 +13416,14 @@ g_ect_tbl_info_size:
 	.zero	2
 	.section	.bss.g_ect_tbl_power_up_flush,"aw",@nobits
 	.align	1
-	.set	.LANCHOR165,. + 0
+	.set	.LANCHOR170,. + 0
 	.type	g_ect_tbl_power_up_flush, %object
 	.size	g_ect_tbl_power_up_flush, 2
 g_ect_tbl_power_up_flush:
 	.zero	2
 	.section	.bss.g_ftl_nand_free_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR176,. + 0
+	.set	.LANCHOR181,. + 0
 	.type	g_ftl_nand_free_count, %object
 	.size	g_ftl_nand_free_count, 4
 g_ftl_nand_free_count:
@@ -13096,14 +13465,14 @@ g_gc_blk_num:
 	.zero	2
 	.section	.bss.g_gc_cur_blk_max_valid_pages,"aw",@nobits
 	.align	1
-	.set	.LANCHOR174,. + 0
+	.set	.LANCHOR179,. + 0
 	.type	g_gc_cur_blk_max_valid_pages, %object
 	.size	g_gc_cur_blk_max_valid_pages, 2
 g_gc_cur_blk_max_valid_pages:
 	.zero	2
 	.section	.bss.g_gc_cur_blk_valid_pages,"aw",@nobits
 	.align	1
-	.set	.LANCHOR173,. + 0
+	.set	.LANCHOR178,. + 0
 	.type	g_gc_cur_blk_valid_pages, %object
 	.size	g_gc_cur_blk_valid_pages, 2
 g_gc_cur_blk_valid_pages:
@@ -13117,14 +13486,14 @@ g_gc_free_blk_threshold:
 	.zero	2
 	.section	.bss.g_gc_head_data_block,"aw",@nobits
 	.align	2
-	.set	.LANCHOR118,. + 0
+	.set	.LANCHOR109,. + 0
 	.type	g_gc_head_data_block, %object
 	.size	g_gc_head_data_block, 4
 g_gc_head_data_block:
 	.zero	4
 	.section	.bss.g_gc_head_data_block_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR119,. + 0
+	.set	.LANCHOR110,. + 0
 	.type	g_gc_head_data_block_count, %object
 	.size	g_gc_head_data_block_count, 4
 g_gc_head_data_block_count:
@@ -13187,7 +13556,7 @@ g_gc_temp_superblock:
 	.zero	48
 	.section	.bss.g_in_gc_progress,"aw",@nobits
 	.align	2
-	.set	.LANCHOR117,. + 0
+	.set	.LANCHOR108,. + 0
 	.type	g_in_gc_progress, %object
 	.size	g_in_gc_progress, 4
 g_in_gc_progress:
@@ -13250,28 +13619,28 @@ g_num_free_superblocks:
 	.zero	2
 	.section	.bss.g_power_lost_recovery_flag,"aw",@nobits
 	.align	1
-	.set	.LANCHOR161,. + 0
+	.set	.LANCHOR167,. + 0
 	.type	g_power_lost_recovery_flag, %object
 	.size	g_power_lost_recovery_flag, 2
 g_power_lost_recovery_flag:
 	.zero	2
 	.section	.bss.g_recovery_page_min_ver,"aw",@nobits
 	.align	2
-	.set	.LANCHOR153,. + 0
+	.set	.LANCHOR145,. + 0
 	.type	g_recovery_page_min_ver, %object
 	.size	g_recovery_page_min_ver, 4
 g_recovery_page_min_ver:
 	.zero	4
 	.section	.bss.g_recovery_page_num,"aw",@nobits
 	.align	2
-	.set	.LANCHOR162,. + 0
+	.set	.LANCHOR168,. + 0
 	.type	g_recovery_page_num, %object
 	.size	g_recovery_page_num, 4
 g_recovery_page_num:
 	.zero	4
 	.section	.bss.g_recovery_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR163,. + 0
+	.set	.LANCHOR169,. + 0
 	.type	g_recovery_ppa_tbl, %object
 	.size	g_recovery_ppa_tbl, 128
 g_recovery_ppa_tbl:
@@ -13292,7 +13661,7 @@ g_sys_save_data:
 	.zero	48
 	.section	.bss.g_tmp_data_superblock_id,"aw",@nobits
 	.align	1
-	.set	.LANCHOR150,. + 0
+	.set	.LANCHOR142,. + 0
 	.type	g_tmp_data_superblock_id, %object
 	.size	g_tmp_data_superblock_id, 2
 g_tmp_data_superblock_id:
@@ -13334,7 +13703,7 @@ g_totle_l2p_write_count:
 	.zero	4
 	.section	.bss.g_totle_map_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR147,. + 0
+	.set	.LANCHOR141,. + 0
 	.type	g_totle_map_block, %object
 	.size	g_totle_map_block, 2
 g_totle_map_block:
@@ -13369,7 +13738,7 @@ g_totle_slc_erase_count:
 	.zero	4
 	.section	.bss.g_totle_swl_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR151,. + 0
+	.set	.LANCHOR143,. + 0
 	.type	g_totle_swl_count, %object
 	.size	g_totle_swl_count, 4
 g_totle_swl_count:
@@ -13404,14 +13773,14 @@ g_totle_write_sector:
 	.zero	4
 	.section	.bss.gc_discard_updated,"aw",@nobits
 	.align	2
-	.set	.LANCHOR167,. + 0
+	.set	.LANCHOR172,. + 0
 	.type	gc_discard_updated, %object
 	.size	gc_discard_updated, 4
 gc_discard_updated:
 	.zero	4
 	.section	.bss.gc_ink_free_return_value,"aw",@nobits
 	.align	1
-	.set	.LANCHOR172,. + 0
+	.set	.LANCHOR177,. + 0
 	.type	gc_ink_free_return_value, %object
 	.size	gc_ink_free_return_value, 2
 gc_ink_free_return_value:
@@ -13425,10 +13794,11 @@ gp_ect_tbl_info:
 	.zero	8
 	.section	.bss.gp_flash_check_buf,"aw",@nobits
 	.align	3
+	.set	.LANCHOR186,. + 0
 	.type	gp_flash_check_buf, %object
-	.size	gp_flash_check_buf, 262144
+	.size	gp_flash_check_buf, 8
 gp_flash_check_buf:
-	.zero	262144
+	.zero	8
 	.section	.bss.gp_gc_page_buf_info,"aw",@nobits
 	.align	3
 	.set	.LANCHOR90,. + 0
@@ -13444,13 +13814,14 @@ gp_last_act_superblock:
 	.zero	8
 	.section	.bss.idb_buf,"aw",@nobits
 	.align	3
+	.set	.LANCHOR185,. + 0
 	.type	idb_buf, %object
-	.size	idb_buf, 262144
+	.size	idb_buf, 8
 idb_buf:
-	.zero	262144
+	.zero	8
 	.section	.bss.idb_need_write_back,"aw",@nobits
 	.align	2
-	.set	.LANCHOR179,. + 0
+	.set	.LANCHOR184,. + 0
 	.type	idb_need_write_back, %object
 	.size	idb_need_write_back, 4
 idb_need_write_back:
@@ -13527,21 +13898,21 @@ p_gc_spare_buf:
 	.zero	8
 	.section	.bss.p_io_data_buf_0,"aw",@nobits
 	.align	3
-	.set	.LANCHOR115,. + 0
+	.set	.LANCHOR118,. + 0
 	.type	p_io_data_buf_0, %object
 	.size	p_io_data_buf_0, 8
 p_io_data_buf_0:
 	.zero	8
 	.section	.bss.p_io_data_buf_1,"aw",@nobits
 	.align	3
-	.set	.LANCHOR113,. + 0
+	.set	.LANCHOR119,. + 0
 	.type	p_io_data_buf_1, %object
 	.size	p_io_data_buf_1, 8
 p_io_data_buf_1:
 	.zero	8
 	.section	.bss.p_io_spare_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR114,. + 0
+	.set	.LANCHOR124,. + 0
 	.type	p_io_spare_buf, %object
 	.size	p_io_spare_buf, 8
 p_io_spare_buf:
@@ -13604,21 +13975,21 @@ p_swl_mul_table:
 	.zero	8
 	.section	.bss.p_sys_data_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR107,. + 0
+	.set	.LANCHOR115,. + 0
 	.type	p_sys_data_buf, %object
 	.size	p_sys_data_buf, 8
 p_sys_data_buf:
 	.zero	8
 	.section	.bss.p_sys_data_buf_1,"aw",@nobits
 	.align	3
-	.set	.LANCHOR123,. + 0
+	.set	.LANCHOR116,. + 0
 	.type	p_sys_data_buf_1, %object
 	.size	p_sys_data_buf_1, 8
 p_sys_data_buf_1:
 	.zero	8
 	.section	.bss.p_sys_spare_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR108,. + 0
+	.set	.LANCHOR123,. + 0
 	.type	p_sys_spare_buf, %object
 	.size	p_sys_spare_buf, 8
 p_sys_spare_buf:
@@ -13660,7 +14031,7 @@ p_vendor_block_ver_table:
 	.zero	8
 	.section	.bss.p_vendor_data_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR124,. + 0
+	.set	.LANCHOR117,. + 0
 	.type	p_vendor_data_buf, %object
 	.size	p_vendor_data_buf, 8
 p_vendor_data_buf:
@@ -13674,7 +14045,7 @@ p_vendor_region_ppn_table:
 	.zero	8
 	.section	.bss.req_erase,"aw",@nobits
 	.align	3
-	.set	.LANCHOR111,. + 0
+	.set	.LANCHOR106,. + 0
 	.type	req_erase, %object
 	.size	req_erase, 8
 req_erase:
@@ -13688,35 +14059,56 @@ req_gc:
 	.zero	8
 	.section	.bss.req_gc_dst,"aw",@nobits
 	.align	3
-	.set	.LANCHOR121,. + 0
+	.set	.LANCHOR113,. + 0
 	.type	req_gc_dst, %object
 	.size	req_gc_dst, 8
 req_gc_dst:
 	.zero	8
 	.section	.bss.req_prgm,"aw",@nobits
 	.align	3
-	.set	.LANCHOR122,. + 0
+	.set	.LANCHOR114,. + 0
 	.type	req_prgm, %object
 	.size	req_prgm, 8
 req_prgm:
 	.zero	8
 	.section	.bss.req_read,"aw",@nobits
 	.align	3
-	.set	.LANCHOR120,. + 0
+	.set	.LANCHOR112,. + 0
 	.type	req_read, %object
 	.size	req_read, 8
 req_read:
 	.zero	8
 	.section	.bss.req_sys,"aw",@nobits
 	.align	3
-	.set	.LANCHOR106,. + 0
+	.set	.LANCHOR148,. + 0
 	.type	req_sys, %object
 	.size	req_sys, 32
 req_sys:
 	.zero	32
+	.section	.bss.sftl_nand_check_buf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR120,. + 0
+	.type	sftl_nand_check_buf, %object
+	.size	sftl_nand_check_buf, 8
+sftl_nand_check_buf:
+	.zero	8
+	.section	.bss.sftl_nand_check_spare_buf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR122,. + 0
+	.type	sftl_nand_check_spare_buf, %object
+	.size	sftl_nand_check_spare_buf, 8
+sftl_nand_check_spare_buf:
+	.zero	8
+	.section	.bss.sftl_temp_buf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR121,. + 0
+	.type	sftl_temp_buf, %object
+	.size	sftl_temp_buf, 8
+sftl_temp_buf:
+	.zero	8
 	.section	.data.ftl_gc_temp_block_bops_scan_page_addr,"aw",@progbits
 	.align	1
-	.set	.LANCHOR156,. + 0
+	.set	.LANCHOR162,. + 0
 	.type	ftl_gc_temp_block_bops_scan_page_addr, %object
 	.size	ftl_gc_temp_block_bops_scan_page_addr, 2
 ftl_gc_temp_block_bops_scan_page_addr:
@@ -13730,35 +14122,40 @@ gFtlInitStatus:
 	.word	-1
 	.section	.data.power_up_flag,"aw",@progbits
 	.align	2
-	.set	.LANCHOR177,. + 0
+	.set	.LANCHOR182,. + 0
 	.type	power_up_flag, %object
 	.size	power_up_flag, 4
 power_up_flag:
 	.word	1
-	.section	.rodata.FlashProgPages.str1.1,"aMS",@progbits,1
+	.section	.rodata.FlashEraseBlocks.str1.1,"aMS",@progbits,1
 .LC79:
-	.string	"prog read error: = %x\n"
+	.string	"%s: addr: %x is in id block!!!!!!!!!!\n"
 .LC80:
-	.string	"prog read s error: = %x %x %x\n"
+	.string	"not free: w: d:"
 .LC81:
+	.string	"not free: w: s:"
+	.section	.rodata.FlashProgPages.str1.1,"aMS",@progbits,1
+.LC85:
+	.string	"prog read error: = %x\n"
+.LC86:
+	.string	"prog read s error: = %x %x %x\n"
+.LC87:
 	.string	"prog read d error: = %x %x %x\n"
 	.section	.rodata.FtlBbmMapBadBlock.str1.1,"aMS",@progbits,1
 .LC0:
 	.string	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\n"
 	.section	.rodata.FtlBbmTblFlush.str1.1,"aMS",@progbits,1
-.LC97:
+.LC101:
 	.string	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\n"
-.LC98:
+.LC102:
 	.string	"FtlBbmTblFlush error:%x\n"
-.LC99:
+.LC103:
 	.string	"FtlBbmTblFlush error = %x error count = %d\n"
 	.section	.rodata.FtlFreeSysBlkQueueOut.str1.1,"aMS",@progbits,1
 .LC82:
-	.string	"FtlFreeSysBlkQueueOut free count = %d\n"
-.LC83:
 	.string	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\n"
 	.section	.rodata.FtlGcFreeBadSuperBlk.str1.1,"aMS",@progbits,1
-.LC100:
+.LC104:
 	.string	"FtlGcFreeBadSuperBlk 0x%x\n"
 	.section	.rodata.FtlGcMarkBadPhyBlk.str1.1,"aMS",@progbits,1
 .LC74:
@@ -13766,16 +14163,19 @@ power_up_flag:
 	.section	.rodata.FtlGcRefreshBlock.str1.1,"aMS",@progbits,1
 .LC73:
 	.string	"FtlGcRefreshBlock  0x%x\n"
+	.section	.rodata.FtlGcScanTempBlk.str1.1,"aMS",@progbits,1
+.LC100:
+	.string	"FtlGcScanTempBlk Error ID %x %x!!!!!!! \n"
 	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",@progbits,1
-.LC103:
+.LC108:
 	.string	"no ect"
 	.section	.rodata.FtlMapWritePage.str1.1,"aMS",@progbits,1
-.LC89:
+.LC88:
 	.string	"FtlMapWritePage error = %x \n"
-.LC90:
+.LC89:
 	.string	"FtlMapWritePage error = %x error count = %d\n"
 	.section	.rodata.FtlMemInit.str1.1,"aMS",@progbits,1
-.LC85:
+.LC84:
 	.string	"%s error allocating memory. return -1\n"
 	.section	.rodata.FtlPrintInfo2buf.str1.1,"aMS",@progbits,1
 .LC2:
@@ -13915,19 +14315,22 @@ power_up_flag:
 .LC69:
 	.string	"free %d. [0x%x] 0x%x  0x%x\n"
 	.section	.rodata.FtlProgPages.str1.1,"aMS",@progbits,1
-.LC106:
+.LC111:
 	.string	"Ftlwrite decrement_vpc_count %x = %d\n"
 	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",@progbits,1
-.LC102:
+.LC106:
 	.string	"spuer block %x vpn is 0\n "
+	.section	.rodata.FtlVendorPartRead.str1.1,"aMS",@progbits,1
+.LC107:
+	.string	"FtlVendorPartRead refresh = %x phyAddr = %x\n"
 	.section	.rodata.FtlVpcCheckAndModify.str1.1,"aMS",@progbits,1
-.LC105:
+.LC110:
 	.string	"FtlCheckVpc %x = %x  %x\n"
 	.section	.rodata.FtlVpcTblFlush.str1.1,"aMS",@progbits,1
-.LC104:
+.LC109:
 	.string	"FtlVpcTblFlush error = %x error count = %d\n"
 	.section	.rodata.FtlWrite.str1.1,"aMS",@progbits,1
-.LC108:
+.LC113:
 	.string	"FtlWrite: lpa error:%x %x\n"
 	.section	.rodata.GetSwlReplaceBlock.str1.1,"aMS",@progbits,1
 .LC72:
@@ -13935,246 +14338,260 @@ power_up_flag:
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",@progbits,1
 .LC1:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
-	.section	.rodata.__func__.6109,"a",@progbits
+	.section	.rodata.__func__.6119,"a",@progbits
 	.align	3
 	.set	.LANCHOR138,. + 0
-	.type	__func__.6109, %object
-	.size	__func__.6109, 11
-__func__.6109:
+	.type	__func__.6119, %object
+	.size	__func__.6119, 11
+__func__.6119:
 	.string	"FtlMemInit"
-	.section	.rodata.__func__.6233,"a",@progbits
+	.section	.rodata.__func__.6243,"a",@progbits
 	.align	3
-	.set	.LANCHOR170,. + 0
-	.type	__func__.6233, %object
-	.size	__func__.6233, 13
-__func__.6233:
+	.set	.LANCHOR175,. + 0
+	.type	__func__.6243, %object
+	.size	__func__.6243, 13
+__func__.6243:
 	.string	"FtlProgPages"
-	.section	.rodata.__func__.6261,"a",@progbits
+	.section	.rodata.__func__.6271,"a",@progbits
 	.align	3
-	.set	.LANCHOR178,. + 0
-	.type	__func__.6261, %object
-	.size	__func__.6261, 9
-__func__.6261:
+	.set	.LANCHOR183,. + 0
+	.type	__func__.6271, %object
+	.size	__func__.6271, 9
+__func__.6271:
 	.string	"FtlWrite"
-	.section	.rodata.__func__.6407,"a",@progbits
+	.section	.rodata.__func__.6377,"a",@progbits
+	.align	3
+	.set	.LANCHOR187,. + 0
+	.type	__func__.6377, %object
+	.size	__func__.6377, 14
+__func__.6377:
+	.string	"FtlWriteToIDB"
+	.section	.rodata.__func__.6418,"a",@progbits
 	.align	3
 	.set	.LANCHOR139,. + 0
-	.type	__func__.6407, %object
-	.size	__func__.6407, 14
-__func__.6407:
+	.type	__func__.6418, %object
+	.size	__func__.6418, 14
+__func__.6418:
 	.string	"FtlBbt2Bitmap"
-	.section	.rodata.__func__.6450,"a",@progbits
+	.section	.rodata.__func__.6461,"a",@progbits
 	.align	3
-	.set	.LANCHOR164,. + 0
-	.type	__func__.6450, %object
-	.size	__func__.6450, 11
-__func__.6450:
+	.set	.LANCHOR150,. + 0
+	.type	__func__.6461, %object
+	.size	__func__.6461, 11
+__func__.6461:
 	.string	"FtlLoadBbt"
-	.section	.rodata.__func__.6567,"a",@progbits
+	.section	.rodata.__func__.6576,"a",@progbits
 	.align	3
 	.set	.LANCHOR49,. + 0
-	.type	__func__.6567, %object
-	.size	__func__.6567, 17
-__func__.6567:
+	.type	__func__.6576, %object
+	.size	__func__.6576, 17
+__func__.6576:
 	.string	"INSERT_FREE_LIST"
-	.section	.rodata.__func__.6572,"a",@progbits
+	.section	.rodata.__func__.6581,"a",@progbits
 	.align	3
 	.set	.LANCHOR46,. + 0
-	.type	__func__.6572, %object
-	.size	__func__.6572, 17
-__func__.6572:
+	.type	__func__.6581, %object
+	.size	__func__.6581, 17
+__func__.6581:
 	.string	"INSERT_DATA_LIST"
-	.section	.rodata.__func__.6603,"a",@progbits
+	.section	.rodata.__func__.6612,"a",@progbits
 	.align	3
 	.set	.LANCHOR50,. + 0
-	.type	__func__.6603, %object
-	.size	__func__.6603, 17
-__func__.6603:
+	.type	__func__.6612, %object
+	.size	__func__.6612, 17
+__func__.6612:
 	.string	"List_remove_node"
-	.section	.rodata.__func__.6635,"a",@progbits
-	.align	3
-	.set	.LANCHOR54,. + 0
-	.type	__func__.6635, %object
-	.size	__func__.6635, 22
-__func__.6635:
-	.string	"List_update_data_list"
 	.section	.rodata.__func__.6644,"a",@progbits
 	.align	3
-	.set	.LANCHOR140,. + 0
+	.set	.LANCHOR54,. + 0
 	.type	__func__.6644, %object
-	.size	__func__.6644, 16
+	.size	__func__.6644, 22
 __func__.6644:
+	.string	"List_update_data_list"
+	.section	.rodata.__func__.6653,"a",@progbits
+	.align	3
+	.set	.LANCHOR156,. + 0
+	.type	__func__.6653, %object
+	.size	__func__.6653, 16
+__func__.6653:
 	.string	"load_l2p_region"
-	.section	.rodata.__func__.6677,"a",@progbits
+	.section	.rodata.__func__.6686,"a",@progbits
 	.align	3
-	.set	.LANCHOR116,. + 0
-	.type	__func__.6677, %object
-	.size	__func__.6677, 26
-__func__.6677:
+	.set	.LANCHOR107,. + 0
+	.type	__func__.6686, %object
+	.size	__func__.6686, 26
+__func__.6686:
 	.string	"ftl_map_blk_alloc_new_blk"
-	.section	.rodata.__func__.6688,"a",@progbits
+	.section	.rodata.__func__.6697,"a",@progbits
 	.align	3
-	.set	.LANCHOR143,. + 0
-	.type	__func__.6688, %object
-	.size	__func__.6688, 15
-__func__.6688:
+	.set	.LANCHOR157,. + 0
+	.type	__func__.6697, %object
+	.size	__func__.6697, 15
+__func__.6697:
 	.string	"ftl_map_blk_gc"
-	.section	.rodata.__func__.6702,"a",@progbits
+	.section	.rodata.__func__.6712,"a",@progbits
 	.align	3
-	.set	.LANCHOR141,. + 0
-	.type	__func__.6702, %object
-	.size	__func__.6702, 31
-__func__.6702:
+	.set	.LANCHOR154,. + 0
+	.type	__func__.6712, %object
+	.size	__func__.6712, 31
+__func__.6712:
 	.string	"Ftl_write_map_blk_to_last_page"
-	.section	.rodata.__func__.6716,"a",@progbits
+	.section	.rodata.__func__.6726,"a",@progbits
 	.align	3
-	.set	.LANCHOR142,. + 0
-	.type	__func__.6716, %object
-	.size	__func__.6716, 16
-__func__.6716:
+	.set	.LANCHOR155,. + 0
+	.type	__func__.6726, %object
+	.size	__func__.6726, 16
+__func__.6726:
 	.string	"FtlMapWritePage"
-	.section	.rodata.__func__.6741,"a",@progbits
+	.section	.rodata.__func__.6751,"a",@progbits
 	.align	3
 	.set	.LANCHOR57,. + 0
-	.type	__func__.6741, %object
-	.size	__func__.6741, 22
-__func__.6741:
+	.type	__func__.6751, %object
+	.size	__func__.6751, 22
+__func__.6751:
 	.string	"select_l2p_ram_region"
-	.section	.rodata.__func__.6758,"a",@progbits
+	.section	.rodata.__func__.6768,"a",@progbits
 	.align	3
-	.set	.LANCHOR145,. + 0
-	.type	__func__.6758, %object
-	.size	__func__.6758, 9
-__func__.6758:
+	.set	.LANCHOR159,. + 0
+	.type	__func__.6768, %object
+	.size	__func__.6768, 9
+__func__.6768:
 	.string	"log2phys"
-	.section	.rodata.__func__.6831,"a",@progbits
+	.section	.rodata.__func__.6841,"a",@progbits
 	.align	3
-	.set	.LANCHOR166,. + 0
-	.type	__func__.6831, %object
-	.size	__func__.6831, 15
-__func__.6831:
+	.set	.LANCHOR171,. + 0
+	.type	__func__.6841, %object
+	.size	__func__.6841, 15
+__func__.6841:
 	.string	"FtlVpcTblFlush"
-	.section	.rodata.__func__.6853,"a",@progbits
+	.section	.rodata.__func__.6863,"a",@progbits
 	.align	3
-	.set	.LANCHOR148,. + 0
-	.type	__func__.6853, %object
-	.size	__func__.6853, 14
-__func__.6853:
+	.set	.LANCHOR149,. + 0
+	.type	__func__.6863, %object
+	.size	__func__.6863, 14
+__func__.6863:
 	.string	"FtlScanSysBlk"
-	.section	.rodata.__func__.6910,"a",@progbits
+	.section	.rodata.__func__.6920,"a",@progbits
 	.align	3
-	.set	.LANCHOR180,. + 0
-	.type	__func__.6910, %object
-	.size	__func__.6910, 15
-__func__.6910:
+	.set	.LANCHOR151,. + 0
+	.type	__func__.6920, %object
+	.size	__func__.6920, 15
+__func__.6920:
 	.string	"FtlLoadSysInfo"
-	.section	.rodata.__func__.6973,"a",@progbits
+	.section	.rodata.__func__.6983,"a",@progbits
 	.align	3
-	.set	.LANCHOR146,. + 0
-	.type	__func__.6973, %object
-	.size	__func__.6973, 16
-__func__.6973:
+	.set	.LANCHOR160,. + 0
+	.type	__func__.6983, %object
+	.size	__func__.6983, 16
+__func__.6983:
 	.string	"FtlReUsePrevPpa"
-	.section	.rodata.__func__.7007,"a",@progbits
+	.section	.rodata.__func__.7017,"a",@progbits
 	.align	3
-	.set	.LANCHOR160,. + 0
-	.type	__func__.7007, %object
-	.size	__func__.7007, 22
-__func__.7007:
+	.set	.LANCHOR166,. + 0
+	.type	__func__.7017, %object
+	.size	__func__.7017, 22
+__func__.7017:
 	.string	"FtlRecoverySuperblock"
-	.section	.rodata.__func__.7064,"a",@progbits
+	.section	.rodata.__func__.7074,"a",@progbits
 	.align	3
 	.set	.LANCHOR60,. + 0
-	.type	__func__.7064, %object
-	.size	__func__.7064, 16
-__func__.7064:
+	.type	__func__.7074, %object
+	.size	__func__.7074, 16
+__func__.7074:
 	.string	"make_superblock"
-	.section	.rodata.__func__.7085,"a",@progbits
+	.section	.rodata.__func__.7095,"a",@progbits
 	.align	3
-	.set	.LANCHOR154,. + 0
-	.type	__func__.7085, %object
-	.size	__func__.7085, 18
-__func__.7085:
+	.set	.LANCHOR146,. + 0
+	.type	__func__.7095, %object
+	.size	__func__.7095, 18
+__func__.7095:
 	.string	"SupperBlkListInit"
-	.section	.rodata.__func__.7110,"a",@progbits
+	.section	.rodata.__func__.7120,"a",@progbits
 	.align	3
-	.set	.LANCHOR168,. + 0
-	.type	__func__.7110, %object
-	.size	__func__.7110, 21
-__func__.7110:
+	.set	.LANCHOR173,. + 0
+	.type	__func__.7120, %object
+	.size	__func__.7120, 21
+__func__.7120:
 	.string	"FtlVpcCheckAndModify"
-	.section	.rodata.__func__.7126,"a",@progbits
+	.section	.rodata.__func__.7136,"a",@progbits
 	.align	3
-	.set	.LANCHOR155,. + 0
-	.type	__func__.7126, %object
-	.size	__func__.7126, 14
-__func__.7126:
+	.set	.LANCHOR161,. + 0
+	.type	__func__.7136, %object
+	.size	__func__.7136, 14
+__func__.7136:
 	.string	"ftl_check_vpc"
-	.section	.rodata.__func__.7211,"a",@progbits
+	.section	.rodata.__func__.7221,"a",@progbits
 	.align	3
-	.set	.LANCHOR157,. + 0
-	.type	__func__.7211, %object
-	.size	__func__.7211, 25
-__func__.7211:
+	.set	.LANCHOR163,. + 0
+	.type	__func__.7221, %object
+	.size	__func__.7221, 25
+__func__.7221:
 	.string	"allocate_data_superblock"
-	.section	.rodata.__func__.7232,"a",@progbits
+	.section	.rodata.__func__.7242,"a",@progbits
 	.align	3
-	.set	.LANCHOR169,. + 0
-	.type	__func__.7232, %object
-	.size	__func__.7232, 29
-__func__.7232:
+	.set	.LANCHOR174,. + 0
+	.type	__func__.7242, %object
+	.size	__func__.7242, 29
+__func__.7242:
 	.string	"allocate_new_data_superblock"
-	.section	.rodata.__func__.7239,"a",@progbits
+	.section	.rodata.__func__.7249,"a",@progbits
 	.align	3
 	.set	.LANCHOR88,. + 0
-	.type	__func__.7239, %object
-	.size	__func__.7239, 19
-__func__.7239:
+	.type	__func__.7249, %object
+	.size	__func__.7249, 19
+__func__.7249:
 	.string	"get_new_active_ppa"
-	.section	.rodata.__func__.7252,"a",@progbits
+	.section	.rodata.__func__.7262,"a",@progbits
 	.align	3
-	.set	.LANCHOR158,. + 0
-	.type	__func__.7252, %object
-	.size	__func__.7252, 16
-__func__.7252:
+	.set	.LANCHOR164,. + 0
+	.type	__func__.7262, %object
+	.size	__func__.7262, 16
+__func__.7262:
 	.string	"update_vpc_list"
-	.section	.rodata.__func__.7259,"a",@progbits
+	.section	.rodata.__func__.7269,"a",@progbits
 	.align	3
-	.set	.LANCHOR159,. + 0
-	.type	__func__.7259, %object
-	.size	__func__.7259, 20
-__func__.7259:
+	.set	.LANCHOR165,. + 0
+	.type	__func__.7269, %object
+	.size	__func__.7269, 20
+__func__.7269:
 	.string	"decrement_vpc_count"
-	.section	.rodata.__func__.7329,"a",@progbits
+	.section	.rodata.__func__.7339,"a",@progbits
 	.align	3
-	.set	.LANCHOR171,. + 0
-	.type	__func__.7329, %object
-	.size	__func__.7329, 19
-__func__.7329:
+	.set	.LANCHOR176,. + 0
+	.type	__func__.7339, %object
+	.size	__func__.7339, 19
+__func__.7339:
 	.string	"FtlGcFreeTempBlock"
-	.section	.rodata.__func__.7435,"a",@progbits
+	.section	.rodata.__func__.7450,"a",@progbits
 	.align	3
-	.set	.LANCHOR175,. + 0
-	.type	__func__.7435, %object
-	.size	__func__.7435, 23
-__func__.7435:
+	.set	.LANCHOR180,. + 0
+	.type	__func__.7450, %object
+	.size	__func__.7450, 23
+__func__.7450:
 	.string	"rk_ftl_garbage_collect"
-	.section	.rodata.__func__.7702,"a",@progbits
+	.section	.rodata.__func__.7712,"a",@progbits
 	.align	3
-	.set	.LANCHOR104,. + 0
-	.type	__func__.7702, %object
-	.size	__func__.7702, 15
-__func__.7702:
+	.set	.LANCHOR147,. + 0
+	.type	__func__.7712, %object
+	.size	__func__.7712, 15
+__func__.7712:
 	.string	"FlashReadPages"
-	.section	.rodata.__func__.7719,"a",@progbits
+	.section	.rodata.__func__.7730,"a",@progbits
 	.align	3
-	.set	.LANCHOR109,. + 0
-	.type	__func__.7719, %object
-	.size	__func__.7719, 15
-__func__.7719:
+	.set	.LANCHOR153,. + 0
+	.type	__func__.7730, %object
+	.size	__func__.7730, 15
+__func__.7730:
 	.string	"FlashProgPages"
+	.section	.rodata.__func__.7753,"a",@progbits
+	.align	3
+	.set	.LANCHOR104,. + 0
+	.type	__func__.7753, %object
+	.size	__func__.7753, 17
+__func__.7753:
+	.string	"FlashEraseBlocks"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",@progbits,1
-.LC101:
+.LC105:
 	.string	"decrement_vpc_count %x = %d\n"
 	.section	.rodata.ftl_check_vpc.str1.1,"aMS",@progbits,1
 .LC94:
@@ -14184,24 +14601,26 @@ __func__.7719:
 .LC96:
 	.string	"free blk vpc error %x = %x  %x\n"
 	.section	.rodata.ftl_map_blk_alloc_new_blk.str1.1,"aMS",@progbits,1
-.LC84:
+.LC83:
 	.string	"FtlFreeSysBlkQueueOut = %x, free count = %d\n"
 	.section	.rodata.ftl_scan_all_data.str1.1,"aMS",@progbits,1
-.LC91:
+.LC97:
 	.string	"ftl_scan_all_data = %x\n"
-.LC92:
+.LC98:
 	.string	"scan lpa = %x ppa= %x\n"
-.LC93:
+.LC99:
 	.string	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\n"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",@progbits,1
-.LC86:
+.LC90:
 	.string	"region_id = %x phyAddr = %x\n"
-.LC87:
+.LC91:
 	.string	"spare:"
-.LC88:
+.LC92:
 	.string	"map_ppn:"
+.LC93:
+	.string	"load_l2p_region refresh = %x phyAddr = %x\n"
 	.section	.rodata.rk_ftl_garbage_collect.str1.1,"aMS",@progbits,1
-.LC107:
+.LC112:
 	.string	"SWL %x, FSB = %x vpc= %x,ec=%x th=%x\n"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
 .LC75:
@@ -14214,10 +14633,14 @@ __func__.7719:
 	.string	"\n"
 	.section	.rodata.rknand_proc_ftlread.str1.1,"aMS",@progbits,1
 .LC70:
-	.string	"SFTL version: 5.0.44 20180713"
+	.string	"SFTL version: 5.0.48 20180930"
 .LC71:
 	.string	"%s\n"
 	.section	.rodata.sftl_write.str1.1,"aMS",@progbits,1
-.LC109:
+.LC114:
+	.string	"write_idblock fix data %x %x %x\n"
+.LC115:
 	.string	"write_idblock fail! %x %x %x %x\n"
+.LC116:
+	.string	"%s idb buffer alloc fail\n"
 	.hidden	free

commit babab61fd115004f40be8806e4dba594c07613f9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 8 14:30:52 2018 +0800

    rockchip: rk1808: define CONFIG_SYS_MMC_ENV_DEV as 0
    
    Change-Id: I34584893af47880d73b4016923af44a5fb6b7b1d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/evb_rk1808.h b/include/configs/evb_rk1808.h
index e2eb28768a..95731169ec 100644
--- a/include/configs/evb_rk1808.h
+++ b/include/configs/evb_rk1808.h
@@ -13,6 +13,8 @@
 			"stdout=serial,vidconsole\0" \
 			"stderr=serial,vidconsole\0"
 
+#define CONFIG_SYS_MMC_ENV_DEV		0
+
 #ifndef CONFIG_SPL_BUILD
 #undef CONFIG_BOOTCOMMAND
 #define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND

commit 2e544f944cd34ff30016786e5cb0d8c5a0c4fd3d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 8 14:37:36 2018 +0800

    configs: rk1808: enable env relative commands
    
    these commands are necessary if env is not in nowhere,
    
    Fixes: f88d7e9
    (configs: rk1808: cut down unused modules)
    
    Change-Id: Iab6d247bfc895ff74e9de2c7e1d852d8e5e4b644
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk1808_defconfig b/configs/rk1808_defconfig
index 65dac1e786..c033b50164 100644
--- a/configs/rk1808_defconfig
+++ b/configs/rk1808_defconfig
@@ -20,10 +20,6 @@ CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_XIMG is not set
-# CONFIG_CMD_EXPORTENV is not set
-# CONFIG_CMD_IMPORTENV is not set
-# CONFIG_CMD_SAVEENV is not set
-# CONFIG_CMD_ENV_EXISTS is not set
 # CONFIG_CMD_LZMADEC is not set
 # CONFIG_CMD_UNZIP is not set
 # CONFIG_CMD_FLASH is not set

commit 39965620e81ccfb2848305331c45b947bf23e1ea
Author: Ye Gaoyang <gaoyang.ye@rock-chips.com>
Date:   Wed Sep 26 09:17:18 2018 +0800

    Add: Allow logo in 16bit or 32bit color BMP
    
    Change-Id: Ife719d3d567df4c98d40ddfe67c6952fa2929fec
    Signed-off-by: Ye Gaoyang <gaoyang.ye@rock-chips.com>

diff --git a/drivers/video/drm/bmp_helper.c b/drivers/video/drm/bmp_helper.c
old mode 100755
new mode 100644
index a95fe88147..523506f278
--- a/drivers/video/drm/bmp_helper.c
+++ b/drivers/video/drm/bmp_helper.c
@@ -4,6 +4,8 @@
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
+#include <command.h>
+#include <log.h>
 #include <config.h>
 #include <common.h>
 #include <malloc.h>
@@ -141,9 +143,30 @@ static void decode_rle8_bitmap(void *psrc, void *pdst, uint16_t *cmap,
 	}
 }
 
+static void dump_bmp_dib_head(void *bmp_addr)
+{
+	struct bmp_image *bmp = bmp_addr;
+
+	debug("########## BMP DIB_HEAD ##########\n"
+	      "Width  : %u\n"
+	      "Height : %u\n"
+	      "Bpp    : %u\n"
+	      "Compression method : %u\n"
+	      "Image size : %u\n"
+	      "Colors in palette  : %u\n"
+	      "##################################\n",
+		bmp->header.width,
+		bmp->header.height,
+		bmp->header.bit_count,
+		bmp->header.compression,
+		bmp->header.image_size,
+		bmp->header.colors_used);
+}
+
 int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp)
 {
-	int stride, padded_width, bpp, i, width, height;
+	int i, j;
+	int stride, padded_width, bpp, width, height;
 	struct bmp_image *bmp = bmp_addr;
 	uint8_t *src = bmp_addr;
 	uint8_t *dst = pdst;
@@ -153,9 +176,10 @@ int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp)
 
 	if (!bmp || !(bmp->header.signature[0] == 'B' &&
 	    bmp->header.signature[1] == 'M')) {
-		printf("cat not find bmp file\n");
+		printf("Error: Invalid bmp file.\n");
 		return -1;
 	}
+	dump_bmp_dib_head(bmp);
 	width = get_unaligned_le32(&bmp->header.width);
 	height = get_unaligned_le32(&bmp->header.height);
 	bpp = get_unaligned_le16(&bmp->header.bit_count);
@@ -172,8 +196,8 @@ int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp)
 	switch (bpp) {
 	case 8:
 		if (dst_bpp != 16) {
-			printf("can't support covert bmap to bit[%d]\n",
-			       dst_bpp);
+			printf("Error: Target pixel's bpp is not 16bit.\n");
+
 			return -1;
 		}
 		cmap = malloc(sizeof(cmap) * 256);
@@ -193,7 +217,6 @@ int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp)
 			decode_rle8_bitmap(src, dst, cmap, width, height,
 					   bpp, 0, 0, flip);
 		} else {
-			int j;
 			stride = width * 2;
 
 			if (flip)
@@ -211,9 +234,35 @@ int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp)
 		}
 		free(cmap);
 		break;
+	case 16:
+		if (get_unaligned_le32(&bmp->header.compression)) {
+			printf("Error: Failed to decompression bmp file.\n");
+
+			return -1;
+		}
+		stride = ALIGN(width * bpp / 8, 4);
+		if (flip)
+			src += stride * (height - 1);
+		for (i = 0; i < height; i++) {
+			for (j = 0; j < width; j++) {
+				ushort color = (src[1] << 8) | src[0];
+
+				color = (((color & 0x7c00) << 1) |
+					((color & 0x03e0) << 1) |
+					(color & 0x001f));
+				*(uint16_t *)dst = color;
+				src += 2;
+				dst += 2;
+			}
+			src += (padded_width - width);
+			if (flip)
+				src -= stride * 2;
+		}
+		break;
 	case 24:
 		if (get_unaligned_le32(&bmp->header.compression)) {
-			printf("can't not support compression for 24bit bmap");
+			printf("Error: Failed to decompression bmp file.\n");
+
 			return -1;
 		}
 		stride = ALIGN(width * 3, 4);
@@ -228,10 +277,26 @@ int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp)
 				src -= stride * 2;
 		}
 		break;
-	case 16:
 	case 32:
+		if (get_unaligned_le32(&bmp->header.compression)) {
+			printf("Error: Failed to decompression bmp file.\n");
+
+			return -1;
+		}
+		stride = ALIGN(width * 4, 4);
+		if (flip)
+			src += stride * (height - 1);
+
+		for (i = 0; i < height; i++) {
+			memcpy(dst, src, 4 * width);
+			dst += stride;
+			src += stride;
+			if (flip)
+				src -= stride * 2;
+		}
+		break;
 	default:
-		printf("unsupport bit=%d now\n", bpp);
+		printf("Error: Can't decode this bmp file with bit=%d\n", bpp);
 		return -1;
 	}
 
diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 85c92e2e01..452d16cdb5 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -4,6 +4,7 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
+#include <asm/io.h>
 #include <asm/unaligned.h>
 #include <config.h>
 #include <common.h>
@@ -28,6 +29,7 @@
 #include "rockchip_connector.h"
 #include "rockchip_phy.h"
 #include "rockchip_panel.h"
+#include "rockchip_vop.h"
 #include <dm.h>
 #include <dm/of_access.h>
 #include <dm/ofnode.h>
@@ -163,9 +165,40 @@ static unsigned long get_display_size(void)
 	return memory_end - memory_start;
 }
 
-static bool can_direct_logo(int bpp)
+/**
+ * vop_support_ymirror - ensure whethere vop support the feature of ymirror.
+ * @logo:	the pointer to the logo information.
+ *
+ */
+static bool vop_support_ymirror(struct logo_info *logo)
 {
-	return bpp == 24 || bpp == 32;
+	bool ret;
+	struct display_state *state;
+	struct vop_data *vop_data;
+
+	ret = false;
+	state = container_of(logo, struct display_state, logo);
+	if (state->crtc_state.crtc->data) {
+		vop_data = (struct vop_data *)state->crtc_state.crtc->data;
+		printf("VOP hardware version v%d.%d, ",
+		       VOP_MAJOR(vop_data->version),
+		       VOP_MINOR(vop_data->version));
+		/*
+		 * if the version of VOP is higher than v3.0,
+		 * which means that the VOP support ymirror,
+		 * so it isn't need to mirror image by ourself.
+		 */
+		if (vop_data->version >= VOP_VERSION(3, 0)) {
+			printf("Support mirror mode.\n");
+			ret = true;
+		} else {
+			printf("Not support mirror mode.\n");
+		}
+	} else {
+		printf("Error: CRTC drivers is not ready.\n");
+	}
+
+	return ret;
 }
 
 
@@ -323,7 +356,7 @@ static int connector_panel_init(struct display_state *state)
 
 	dsp_lut_node = dev_read_subnode(dev, "dsp-lut");
 	if (!ofnode_valid(dsp_lut_node)) {
-		debug("%s can not find dsp-lut node\n", __func__);
+		printf("%s can not find dsp-lut node\n", __func__);
 		return 0;
 	}
 
@@ -931,7 +964,6 @@ static int display_logo(struct display_state *state)
 		printf("can't support bmp bits[%d]\n", logo->bpp);
 		return -EINVAL;
 	}
-	crtc_state->rb_swap = logo->bpp != 32;
 	hdisplay = conn_state->mode.hdisplay;
 	vdisplay = conn_state->mode.vdisplay;
 	crtc_state->src_w = logo->width;
@@ -1117,20 +1149,17 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 	logo->bpp = get_unaligned_le16(&header->bit_count);
 	logo->width = get_unaligned_le32(&header->width);
 	logo->height = get_unaligned_le32(&header->height);
-	size = get_unaligned_le32(&header->file_size);
-	if (!can_direct_logo(logo->bpp)) {
-		if (size > MEMORY_POOL_SIZE) {
-			printf("failed to use boot buf as temp bmp buffer\n");
-			ret = -ENOMEM;
-			goto free_header;
-		}
-		pdst = get_display_buffer(size);
 
-	} else {
-		pdst = get_display_buffer(size);
-		dst = pdst;
+	size = get_unaligned_le32(&header->file_size);
+	if (size > MEMORY_POOL_SIZE) {
+		printf("failed to use boot buf as temp bmp buffer\n");
+		ret = -ENOMEM;
+		goto free_header;
 	}
 
+	pdst = get_display_buffer(size);
+	dst = pdst;
+
 	len = rockchip_read_resource_file(pdst, bmp_name, 0, size);
 	if (len != size) {
 		printf("failed to load bmp %s\n", bmp_name);
@@ -1138,7 +1167,7 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 		goto free_header;
 	}
 
-	if (!can_direct_logo(logo->bpp)) {
+	if (!vop_support_ymirror(logo)) {
 		int dst_size;
 		/*
 		 * TODO: force use 16bpp if bpp less than 16;
@@ -1151,6 +1180,7 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 			ret = -ENOMEM;
 			goto free_header;
 		}
+		memset(dst, 0, dst_size);
 		if (bmpdecoder(pdst, dst, logo->bpp)) {
 			printf("failed to decode bmp %s\n", bmp_name);
 			ret = -EINVAL;

commit 565ab70da67d3e38321f738b0d5b04991c9742f3
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Sep 26 16:06:29 2018 +0800

    video/drm: dsi: Add mipi_dsi_set_maximum_return_packet_size and mipi_dsi_dcs_get_power_mode helper
    
    Change-Id: Ia4d517ae4afcd61c429428fb4b0e4bb184800fff
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_mipi_dsi.c b/drivers/video/drm/rockchip_mipi_dsi.c
index 7fb5967de4..649f74281a 100644
--- a/drivers/video/drm/rockchip_mipi_dsi.c
+++ b/drivers/video/drm/rockchip_mipi_dsi.c
@@ -218,6 +218,44 @@ ssize_t mipi_dsi_turn_on_peripheral(struct display_state *state)
 	return connector->funcs->transfer(state, &msg);
 }
 
+int mipi_dsi_dcs_get_power_mode(struct display_state *state, u8 *mode)
+{
+	ssize_t err;
+
+	err = mipi_dsi_dcs_read(state, MIPI_DCS_GET_POWER_MODE, mode,
+				sizeof(*mode));
+	if (err <= 0) {
+		if (err == 0)
+			err = -ENODATA;
+
+		return err;
+	}
+
+	return 0;
+}
+
+int mipi_dsi_set_maximum_return_packet_size(struct display_state *state,
+					    u16 value)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	const struct rockchip_connector *connector = conn_state->connector;
+	u8 tx[2] = { value & 0xff, value >> 8 };
+	struct mipi_dsi_msg msg = {
+		.channel = 0,
+		.type = MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE,
+		.tx_len = sizeof(tx),
+		.tx_buf = tx,
+	};
+
+	if (!connector)
+		return -ENODEV;
+
+	if (!connector->funcs || !connector->funcs->transfer)
+		return -ENOSYS;
+
+	return connector->funcs->transfer(state, &msg);
+}
+
 static bool mipi_dsi_packet_format_is_short(u8 type)
 {
 	switch (type) {
diff --git a/drivers/video/drm/rockchip_mipi_dsi.h b/drivers/video/drm/rockchip_mipi_dsi.h
index 0e1bb5af27..b3919a86a8 100644
--- a/drivers/video/drm/rockchip_mipi_dsi.h
+++ b/drivers/video/drm/rockchip_mipi_dsi.h
@@ -7,6 +7,8 @@
 #ifndef __ROCKCHIP_MIPI_DSI_H__
 #define __ROCKCHIP_MIPI_DSI_H__
 
+#include <mipi_display.h>
+
 #define MSEC_PER_SEC	1000L
 #define USEC_PER_MSEC	1000L
 #define NSEC_PER_USEC	1000L
@@ -35,54 +37,6 @@
 	(cond) ? 0 : -ETIMEDOUT; \
 })
 
-/* MIPI DSI Processor-to-Peripheral transaction types */
-enum {
-	MIPI_DSI_V_SYNC_START				= 0x01,
-	MIPI_DSI_V_SYNC_END				= 0x11,
-	MIPI_DSI_H_SYNC_START				= 0x21,
-	MIPI_DSI_H_SYNC_END				= 0x31,
-
-	MIPI_DSI_COLOR_MODE_OFF				= 0x02,
-	MIPI_DSI_COLOR_MODE_ON				= 0x12,
-	MIPI_DSI_SHUTDOWN_PERIPHERAL			= 0x22,
-	MIPI_DSI_TURN_ON_PERIPHERAL			= 0x32,
-
-	MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM		= 0x03,
-	MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM		= 0x13,
-	MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM		= 0x23,
-
-	MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM		= 0x04,
-	MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM		= 0x14,
-	MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM		= 0x24,
-
-	MIPI_DSI_DCS_SHORT_WRITE			= 0x05,
-	MIPI_DSI_DCS_SHORT_WRITE_PARAM			= 0x15,
-
-	MIPI_DSI_DCS_READ				= 0x06,
-
-	MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE		= 0x37,
-
-	MIPI_DSI_END_OF_TRANSMISSION			= 0x08,
-
-	MIPI_DSI_NULL_PACKET				= 0x09,
-	MIPI_DSI_BLANKING_PACKET			= 0x19,
-	MIPI_DSI_GENERIC_LONG_WRITE			= 0x29,
-	MIPI_DSI_DCS_LONG_WRITE				= 0x39,
-
-	MIPI_DSI_LOOSELY_PACKED_PIXEL_STREAM_YCBCR20	= 0x0c,
-	MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR24		= 0x1c,
-	MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16		= 0x2c,
-
-	MIPI_DSI_PACKED_PIXEL_STREAM_30			= 0x0d,
-	MIPI_DSI_PACKED_PIXEL_STREAM_36			= 0x1d,
-	MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR12		= 0x3d,
-
-	MIPI_DSI_PACKED_PIXEL_STREAM_16			= 0x0e,
-	MIPI_DSI_PACKED_PIXEL_STREAM_18			= 0x1e,
-	MIPI_DSI_PIXEL_STREAM_3BYTE_18			= 0x2e,
-	MIPI_DSI_PACKED_PIXEL_STREAM_24			= 0x3e,
-};
-
 /* request ACK from peripheral */
 #define MIPI_DSI_MSG_REQ_ACK	BIT(0)
 /* use Low Power Mode to transmit message */
@@ -242,4 +196,7 @@ ssize_t mipi_dsi_generic_read(struct display_state *state, const void *params,
 			      size_t num_params, void *data, size_t size);
 ssize_t mipi_dsi_shutdown_peripheral(struct display_state *state);
 ssize_t mipi_dsi_turn_on_peripheral(struct display_state *state);
+int mipi_dsi_set_maximum_return_packet_size(struct display_state *state,
+					    u16 value);
+int mipi_dsi_dcs_get_pixel_format(struct display_state *state, u8 *format);
 #endif /* __ROCKCHIP_MIPI_DSI__ */

commit 38f6fe906d5519a8210b9047fafacafb973b72c7
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Sep 26 15:51:35 2018 +0800

    video/drm: dsi: support EoTp feature
    
    rk/kernel:develop-4.4:fca44d3e4ec0eea3a48bb51f218543616ef7cdb2
    
    Change-Id: Ie8b141963151fb269edb372cd06657476ed19a6d
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index 10c6c8d2cd..7a33dab5bd 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -63,11 +63,11 @@
 #define DSI_DBI_CMDSIZE			0x28
 
 #define DSI_PCKHDL_CFG			0x2c
-#define EN_CRC_RX			BIT(4)
-#define EN_ECC_RX			BIT(3)
-#define EN_BTA				BIT(2)
-#define EN_EOTP_RX			BIT(1)
-#define EN_EOTP_TX			BIT(0)
+#define CRC_RX_EN			BIT(4)
+#define ECC_RX_EN			BIT(3)
+#define BTA_EN				BIT(2)
+#define EOTP_RX_EN			BIT(1)
+#define EOTP_TX_EN			BIT(0)
 
 #define DSI_MODE_CFG			0x34
 #define ENABLE_VIDEO_MODE		0
@@ -906,7 +906,12 @@ static void dw_mipi_dsi_dpi_config(struct dw_mipi_dsi *dsi,
 
 static void dw_mipi_dsi_packet_handler_config(struct dw_mipi_dsi *dsi)
 {
-	dsi_write(dsi, DSI_PCKHDL_CFG, EN_CRC_RX | EN_ECC_RX | EN_BTA);
+	u32 val = CRC_RX_EN | ECC_RX_EN | BTA_EN | EOTP_TX_EN;
+
+	if (dsi->mode_flags & MIPI_DSI_MODE_EOT_PACKET)
+		val &= ~EOTP_TX_EN;
+
+	dsi_write(dsi, DSI_PCKHDL_CFG, val);
 }
 
 static void dw_mipi_dsi_video_packet_config(struct dw_mipi_dsi *dsi,

commit 6fe39b66dfafa528fdbe57242ea7ac6d7736e49a
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Sep 26 15:48:22 2018 +0800

    video/drm: dsi: Remove link skew for dual channel mode
    
    android/rk/u-boot:rkdevelop:daf3276d77cc5aa02d260028ef7c905fff0d593d
    
    Change-Id: Ib08953a3ab2be00a8a22c61d54a2f4bc96153448
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index b1080a0c35..10c6c8d2cd 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -915,7 +915,7 @@ static void dw_mipi_dsi_video_packet_config(struct dw_mipi_dsi *dsi,
 	int pkt_size;
 
 	if (dsi->slave || dsi->master)
-		pkt_size = VID_PKT_SIZE(mode->hdisplay / 2 + 4);
+		pkt_size = VID_PKT_SIZE(mode->hdisplay / 2);
 	else
 		pkt_size = VID_PKT_SIZE(mode->hdisplay);
 

commit 8bc2665b12dae581cee0f62a1abf349a98aefa90
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Sep 26 15:47:18 2018 +0800

    video/drm: dsi: fix 3126c screen shows black bars on the side
    
    android/rk/u-boot:rkdevelop:b5403c01a46fc9f909d7409cf00a1688ae4b0764
    
    Change-Id: I39016d2f68c43c2878d666a010ffe94c2ff40cb0
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index 885800cd97..b1080a0c35 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -265,16 +265,6 @@ enum {
 	BIASEXTR_127_7,
 };
 
-enum soc_type {
-	PX30,
-	RK3128,
-	RK3288,
-	RK3366,
-	RK3368,
-	RK3399,
-	RV1108,
-};
-
 #define GRF_REG_FIELD(reg, lsb, msb)	((reg << 16) | (lsb << 8) | (msb))
 
 enum grf_reg_fields {
@@ -297,7 +287,6 @@ struct dw_mipi_dsi_plat_data {
 	const u32 *dsi0_grf_reg_fields;
 	const u32 *dsi1_grf_reg_fields;
 	unsigned long max_bit_rate_per_lane;
-	enum soc_type soc_type;
 };
 
 struct mipi_dphy {
@@ -908,9 +897,6 @@ static void dw_mipi_dsi_dpi_config(struct dw_mipi_dsi *dsi,
 	if (mode->flags & DRM_MODE_FLAG_NHSYNC)
 		val |= HSYNC_ACTIVE_LOW;
 
-	if (dsi->pdata->soc_type == RK3128)
-		val ^= VSYNC_ACTIVE_LOW;
-
 	dsi_write(dsi, DSI_DPI_VCID, DPI_VID(dsi->channel));
 	dsi_write(dsi, DSI_DPI_COLOR_CODING, color);
 	dsi_write(dsi, DSI_DPI_CFG_POL, val);
@@ -1269,7 +1255,6 @@ static const u32 px30_dsi_grf_reg_fields[MAX_FIELDS] = {
 static const struct dw_mipi_dsi_plat_data px30_mipi_dsi_plat_data = {
 	.dsi0_grf_reg_fields = px30_dsi_grf_reg_fields,
 	.max_bit_rate_per_lane = 1000000000UL,
-	.soc_type = PX30,
 };
 
 static const struct rockchip_connector px30_mipi_dsi_driver_data = {
@@ -1288,7 +1273,6 @@ static const u32 rk3128_dsi_grf_reg_fields[MAX_FIELDS] = {
 static const struct dw_mipi_dsi_plat_data rk3128_mipi_dsi_plat_data = {
 	.dsi0_grf_reg_fields = rk3128_dsi_grf_reg_fields,
 	.max_bit_rate_per_lane = 1000000000UL,
-	.soc_type = RK3128,
 };
 
 static const struct rockchip_connector rk3128_mipi_dsi_driver_data = {
@@ -1326,7 +1310,6 @@ static const struct dw_mipi_dsi_plat_data rk3288_mipi_dsi_plat_data = {
 	.dsi0_grf_reg_fields = rk3288_dsi0_grf_reg_fields,
 	.dsi1_grf_reg_fields = rk3288_dsi1_grf_reg_fields,
 	.max_bit_rate_per_lane = 1500000000UL,
-	.soc_type = RK3288,
 };
 
 static const struct rockchip_connector rk3288_mipi_dsi_driver_data = {
@@ -1347,7 +1330,6 @@ static const u32 rk3366_dsi_grf_reg_fields[MAX_FIELDS] = {
 static const struct dw_mipi_dsi_plat_data rk3366_mipi_dsi_plat_data = {
 	.dsi0_grf_reg_fields = rk3366_dsi_grf_reg_fields,
 	.max_bit_rate_per_lane = 1000000000UL,
-	.soc_type = RK3366,
 };
 
 static const struct rockchip_connector rk3366_mipi_dsi_driver_data = {
@@ -1367,7 +1349,6 @@ static const u32 rk3368_dsi_grf_reg_fields[MAX_FIELDS] = {
 static const struct dw_mipi_dsi_plat_data rk3368_mipi_dsi_plat_data = {
 	.dsi0_grf_reg_fields = rk3368_dsi_grf_reg_fields,
 	.max_bit_rate_per_lane = 1000000000UL,
-	.soc_type = RK3368,
 };
 
 static const struct rockchip_connector rk3368_mipi_dsi_driver_data = {
@@ -1404,7 +1385,6 @@ static const struct dw_mipi_dsi_plat_data rk3399_mipi_dsi_plat_data = {
 	.dsi0_grf_reg_fields = rk3399_dsi0_grf_reg_fields,
 	.dsi1_grf_reg_fields = rk3399_dsi1_grf_reg_fields,
 	.max_bit_rate_per_lane = 1500000000UL,
-	.soc_type = RK3399,
 };
 
 static const struct rockchip_connector rk3399_mipi_dsi_driver_data = {
@@ -1424,7 +1404,6 @@ static const u32 rv1108_dsi_grf_reg_fields[MAX_FIELDS] = {
 static const struct dw_mipi_dsi_plat_data rv1108_mipi_dsi_plat_data = {
 	.dsi0_grf_reg_fields = rv1108_dsi_grf_reg_fields,
 	.max_bit_rate_per_lane = 1000000000UL,
-	.soc_type = RV1108,
 };
 
 static const struct rockchip_connector rv1108_mipi_dsi_driver_data = {

commit 8d45754cae973d6484b3b9c64a6a783eae3c9603
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Sep 26 15:44:14 2018 +0800

    video/drm: dsi: Add Turn On/Shutdown Peripheral command support
    
    android/rk/u-boot:rkdevelop:d3c5fcc01d20a1b4230bda3a16023d0ecbc9b442
    
    Change-Id: I3dfb222a1a9c52f17f5ab63fbdfdd58fe51e3385
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index 01f4dbef90..885800cd97 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -75,11 +75,14 @@
 
 #define DSI_VID_MODE_CFG		0x38
 #define VPG_EN				BIT(16)
+#define LP_CMD_EN			BIT(15)
 #define FRAME_BTA_ACK			BIT(14)
 #define LP_HFP_EN			BIT(13)
 #define LP_HBP_EN			BIT(12)
-#define ENABLE_LOW_POWER		(0xf << 8)
-#define ENABLE_LOW_POWER_MASK		(0xf << 8)
+#define LP_VACT_EN			BIT(11)
+#define LP_VFP_EN			BIT(10)
+#define LP_VBP_EN			BIT(9)
+#define LP_VSA_EN			BIT(8)
 #define VID_MODE_TYPE_BURST_SYNC_PULSES	0x0
 #define VID_MODE_TYPE_BURST_SYNC_EVENTS	0x1
 #define VID_MODE_TYPE_BURST		0x2
@@ -401,6 +404,16 @@ static void grf_field_write(struct dw_mipi_dsi *dsi, enum grf_reg_fields index,
 	rk_clrsetreg(dsi->grf + reg, GENMASK(msb, lsb), val << lsb);
 }
 
+static inline void dpishutdn_assert(struct dw_mipi_dsi *dsi)
+{
+	grf_field_write(dsi, DPISHUTDN, 1);
+}
+
+static inline void dpishutdn_deassert(struct dw_mipi_dsi *dsi)
+{
+	grf_field_write(dsi, DPISHUTDN, 0);
+}
+
 static int genif_wait_w_pld_fifo_not_full(struct dw_mipi_dsi *dsi)
 {
 	u32 sts;
@@ -680,6 +693,24 @@ static int dw_mipi_dsi_read_from_fifo(struct dw_mipi_dsi *dsi,
 	return 0;
 }
 
+static int dw_mipi_dsi_turn_on_peripheral(struct dw_mipi_dsi *dsi)
+{
+	dpishutdn_assert(dsi);
+	udelay(20);
+	dpishutdn_deassert(dsi);
+
+	return 0;
+}
+
+static int dw_mipi_dsi_shutdown_peripheral(struct dw_mipi_dsi *dsi)
+{
+	dpishutdn_deassert(dsi);
+	udelay(20);
+	dpishutdn_assert(dsi);
+
+	return 0;
+}
+
 static ssize_t dw_mipi_dsi_transfer(struct dw_mipi_dsi *dsi,
 				    const struct mipi_dsi_msg *msg)
 {
@@ -687,6 +718,28 @@ static ssize_t dw_mipi_dsi_transfer(struct dw_mipi_dsi *dsi,
 	int ret;
 	int val;
 
+	switch (msg->type) {
+	case MIPI_DSI_SHUTDOWN_PERIPHERAL:
+		return dw_mipi_dsi_shutdown_peripheral(dsi);
+	case MIPI_DSI_TURN_ON_PERIPHERAL:
+		return dw_mipi_dsi_turn_on_peripheral(dsi);
+	case MIPI_DSI_DCS_SHORT_WRITE:
+	case MIPI_DSI_DCS_SHORT_WRITE_PARAM:
+	case MIPI_DSI_DCS_LONG_WRITE:
+	case MIPI_DSI_DCS_READ:
+	case MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE:
+	case MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM:
+	case MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM:
+	case MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM:
+	case MIPI_DSI_GENERIC_LONG_WRITE:
+	case MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM:
+	case MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM:
+	case MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM:
+		break;
+	default:
+		return -EINVAL;
+	}
+
 	/* create a packet to the DSI protocol */
 	ret = mipi_dsi_create_packet(&packet, msg);
 	if (ret) {
@@ -765,9 +818,14 @@ static ssize_t dw_mipi_dsi_connector_transfer(struct display_state *state,
 
 static void dw_mipi_dsi_video_mode_config(struct dw_mipi_dsi *dsi)
 {
-	u32 val;
+	u32 val = LP_VACT_EN | LP_VFP_EN | LP_VBP_EN | LP_VSA_EN |
+		  LP_HFP_EN | LP_HBP_EN | LP_CMD_EN;
+
+	if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_HFP)
+		val &= ~LP_HFP_EN;
 
-	val = LP_HFP_EN | ENABLE_LOW_POWER;
+	if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_HBP)
+		val &= ~LP_HBP_EN;
 
 	if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST)
 		val |= VID_MODE_TYPE_BURST;
diff --git a/drivers/video/drm/rockchip_mipi_dsi.c b/drivers/video/drm/rockchip_mipi_dsi.c
index e2bba46a34..7fb5967de4 100644
--- a/drivers/video/drm/rockchip_mipi_dsi.c
+++ b/drivers/video/drm/rockchip_mipi_dsi.c
@@ -176,6 +176,48 @@ ssize_t mipi_dsi_dcs_read(struct display_state *state, u8 cmd, void *data,
 	return connector->funcs->transfer(state, &msg);
 }
 
+ssize_t mipi_dsi_shutdown_peripheral(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	const struct rockchip_connector *connector = conn_state->connector;
+	struct mipi_dsi_msg msg = {
+		.channel = 0,
+		.type = MIPI_DSI_SHUTDOWN_PERIPHERAL,
+		.tx_buf = (u8 [2]) { 0, 0 },
+		.tx_len = 2,
+		.flags = MIPI_DSI_MSG_USE_LPM,
+	};
+
+	if (!connector)
+		return -ENODEV;
+
+	if (!connector->funcs || !connector->funcs->transfer)
+		return -ENOSYS;
+
+	return connector->funcs->transfer(state, &msg);
+}
+
+ssize_t mipi_dsi_turn_on_peripheral(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	const struct rockchip_connector *connector = conn_state->connector;
+	struct mipi_dsi_msg msg = {
+		.channel = 0,
+		.type = MIPI_DSI_TURN_ON_PERIPHERAL,
+		.tx_buf = (u8 [2]) { 0, 0 },
+		.tx_len = 2,
+		.flags = MIPI_DSI_MSG_USE_LPM,
+	};
+
+	if (!connector)
+		return -ENODEV;
+
+	if (!connector->funcs || !connector->funcs->transfer)
+		return -ENOSYS;
+
+	return connector->funcs->transfer(state, &msg);
+}
+
 static bool mipi_dsi_packet_format_is_short(u8 type)
 {
 	switch (type) {
diff --git a/drivers/video/drm/rockchip_mipi_dsi.h b/drivers/video/drm/rockchip_mipi_dsi.h
index 44a66618fe..0e1bb5af27 100644
--- a/drivers/video/drm/rockchip_mipi_dsi.h
+++ b/drivers/video/drm/rockchip_mipi_dsi.h
@@ -240,4 +240,6 @@ ssize_t mipi_dsi_dcs_read(struct display_state *state, u8 cmd, void *data,
 			  size_t len);
 ssize_t mipi_dsi_generic_read(struct display_state *state, const void *params,
 			      size_t num_params, void *data, size_t size);
+ssize_t mipi_dsi_shutdown_peripheral(struct display_state *state);
+ssize_t mipi_dsi_turn_on_peripheral(struct display_state *state);
 #endif /* __ROCKCHIP_MIPI_DSI__ */

commit 107a4a2199d8d56e121317cf595384477e23745e
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Sep 26 15:31:33 2018 +0800

    video/drm: dsi: support transmit data in high speed
    
    android/rk/u-boot:rkdevelop:00e6449089cd9822bb9d7848bde32ce06dd7221d
    
    Change-Id: Iee4ab6e18a12240f12232f54a4b6bbd8cdfe614c
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index a09fda16c3..01f4dbef90 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -619,9 +619,9 @@ static int dw_mipi_dsi_get_lane_bps(struct dw_mipi_dsi *dsi)
 	return 0;
 }
 
-static void dw_mipi_dsi_set_transfer_mode(struct dw_mipi_dsi *dsi, int flags)
+static void dw_mipi_dsi_set_transfer_mode(struct dw_mipi_dsi *dsi)
 {
-	if (flags & MIPI_DSI_MSG_USE_LPM) {
+	if (dsi->mode_flags & MIPI_DSI_MODE_LPM) {
 		dsi_write(dsi, DSI_CMD_MODE_CFG, CMD_MODE_ALL_LP);
 		dsi_update_bits(dsi, DSI_LPCLK_CTRL, PHY_TXREQUESTCLKHS, 0);
 	} else {
@@ -694,7 +694,7 @@ static ssize_t dw_mipi_dsi_transfer(struct dw_mipi_dsi *dsi,
 		return ret;
 	}
 
-	dw_mipi_dsi_set_transfer_mode(dsi, msg->flags);
+	dw_mipi_dsi_set_transfer_mode(dsi);
 
 	/* Send payload */
 	while (DIV_ROUND_UP(packet.payload_length, 4)) {

commit e6277b64d5ac844daa457122940957cddbc7d578
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Sep 26 15:29:42 2018 +0800

    video/drm: dsi: fix vendor specific prefix
    
    android/rk/u-boot:rkdevelop:c7f74cf00c70be54432a355413c021d246e4576c
    
    Change-Id: I42f44af382e4f556c13dacb8e7820499e50f6bbb
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index f97062ddf9..a09fda16c3 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -401,7 +401,7 @@ static void grf_field_write(struct dw_mipi_dsi *dsi, enum grf_reg_fields index,
 	rk_clrsetreg(dsi->grf + reg, GENMASK(msb, lsb), val << lsb);
 }
 
-static int rockchip_wait_w_pld_fifo_not_full(struct dw_mipi_dsi *dsi)
+static int genif_wait_w_pld_fifo_not_full(struct dw_mipi_dsi *dsi)
 {
 	u32 sts;
 	int ret;
@@ -417,7 +417,7 @@ static int rockchip_wait_w_pld_fifo_not_full(struct dw_mipi_dsi *dsi)
 	return 0;
 }
 
-static int rockchip_wait_cmd_fifo_not_full(struct dw_mipi_dsi *dsi)
+static int genif_wait_cmd_fifo_not_full(struct dw_mipi_dsi *dsi)
 {
 	u32 sts;
 	int ret;
@@ -433,7 +433,7 @@ static int rockchip_wait_cmd_fifo_not_full(struct dw_mipi_dsi *dsi)
 	return 0;
 }
 
-static int rockchip_wait_write_fifo_empty(struct dw_mipi_dsi *dsi)
+static int genif_wait_write_fifo_empty(struct dw_mipi_dsi *dsi)
 {
 	u32 sts;
 	u32 mask;
@@ -472,9 +472,38 @@ static void dw_mipi_dsi_phy_write(struct dw_mipi_dsi *dsi, u8 test_code,
 	dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_TESTCLK | PHY_UNTESTCLR);
 }
 
+static int mipi_dphy_power_on(struct dw_mipi_dsi *dsi)
+{
+	u32 val;
+	int ret;
+
+	dsi_write(dsi, DSI_PHY_RSTZ, PHY_ENFORCEPLL | PHY_ENABLECLK |
+		  PHY_UNRSTZ | PHY_UNSHUTDOWNZ);
+	mdelay(2);
+
+	ret = readl_poll_timeout(dsi->base + DSI_PHY_STATUS,
+				 val, val & LOCK, 1000, PHY_STATUS_TIMEOUT_US);
+	if (ret < 0) {
+		dev_err(dsi->dev, "PHY is not locked\n");
+		return ret;
+	}
+
+	ret = readl_poll_timeout(dsi->base + DSI_PHY_STATUS,
+				 val, val & STOP_STATE_CLK_LANE, 1000,
+				 PHY_STATUS_TIMEOUT_US);
+	if (ret < 0) {
+		dev_err(dsi->dev, "lane module is not in stop state\n");
+		return ret;
+	}
+
+	udelay(10);
+
+	return 0;
+}
+
 static int dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi)
 {
-	int ret, testdin, vco, val;
+	int testdin, vco, val;
 
 	vco = (dsi->lane_mbps < 200) ? 0 : (dsi->lane_mbps + 100) / 200;
 
@@ -485,19 +514,14 @@ static int dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi)
 		return testdin;
 	}
 
-	dsi_write(dsi, DSI_PWR_UP, POWERUP);
-
 	dw_mipi_dsi_phy_write(dsi, 0x10, BYPASS_VCO_RANGE |
 					 VCO_RANGE_CON_SEL(vco) |
 					 VCO_IN_CAP_CON_LOW |
 					 REF_BIAS_CUR_SEL);
-
 	dw_mipi_dsi_phy_write(dsi, 0x11, CP_CURRENT_3MA);
 	dw_mipi_dsi_phy_write(dsi, 0x12, CP_PROGRAM_EN | LPF_PROGRAM_EN |
 					 LPF_RESISTORS_20_KOHM);
-
 	dw_mipi_dsi_phy_write(dsi, 0x44, HSFREQRANGE_SEL(testdin));
-
 	dw_mipi_dsi_phy_write(dsi, 0x17, INPUT_DIVIDER(dsi->dphy.input_div));
 	val = LOOP_DIV_LOW_SEL(dsi->dphy.feedback_div) | LOW_PROGRAM_EN;
 	dw_mipi_dsi_phy_write(dsi, 0x18, val);
@@ -505,45 +529,25 @@ static int dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi)
 	val = LOOP_DIV_HIGH_SEL(dsi->dphy.feedback_div) | HIGH_PROGRAM_EN;
 	dw_mipi_dsi_phy_write(dsi, 0x18, val);
 	dw_mipi_dsi_phy_write(dsi, 0x19, PLL_LOOP_DIV_EN | PLL_INPUT_DIV_EN);
-
 	dw_mipi_dsi_phy_write(dsi, 0x20, POWER_CONTROL | INTERNAL_REG_CURRENT |
 					 BIAS_BLOCK_ON | BANDGAP_ON);
-
 	dw_mipi_dsi_phy_write(dsi, 0x21, TER_RESISTOR_LOW | TER_CAL_DONE |
 					 SETRD_MAX | TER_RESISTORS_ON);
 	dw_mipi_dsi_phy_write(dsi, 0x21, TER_RESISTOR_HIGH | LEVEL_SHIFTERS_ON |
 					 SETRD_MAX | POWER_MANAGE |
 					 TER_RESISTORS_ON);
-
 	dw_mipi_dsi_phy_write(dsi, 0x22, LOW_PROGRAM_EN |
 					 BIASEXTR_SEL(BIASEXTR_127_7));
 	dw_mipi_dsi_phy_write(dsi, 0x22, HIGH_PROGRAM_EN |
 					 BANDGAP_SEL(BANDGAP_96_10));
-
 	dw_mipi_dsi_phy_write(dsi, 0x70, TLP_PROGRAM_EN | 0xf);
 	dw_mipi_dsi_phy_write(dsi, 0x71, THS_PRE_PROGRAM_EN | 0x2d);
 	dw_mipi_dsi_phy_write(dsi, 0x72, THS_ZERO_PROGRAM_EN | 0xa);
 
-	dsi_write(dsi, DSI_PHY_RSTZ, PHY_ENFORCEPLL | PHY_ENABLECLK |
-				     PHY_UNRSTZ | PHY_UNSHUTDOWNZ);
-
-	ret = readl_poll_timeout(dsi->base + DSI_PHY_STATUS,
-				 val, val & LOCK, 1000, PHY_STATUS_TIMEOUT_US);
-	if (ret < 0) {
-		printf("failed to wait for phy lock state %p\n", dsi->base);
-		return ret;
-	}
-
-	ret = readl_poll_timeout(dsi->base + DSI_PHY_STATUS,
-				 val, val & STOP_STATE_CLK_LANE, 1000,
-				 PHY_STATUS_TIMEOUT_US);
-	if (ret < 0)
-		printf("failed to wait for phy clk lane stop state\n");
-
-	return ret;
+	return 0;
 }
 
-static unsigned long rockchip_dsi_calc_bandwidth(struct dw_mipi_dsi *dsi)
+static unsigned long dw_mipi_dsi_calc_bandwidth(struct dw_mipi_dsi *dsi)
 {
 	int bpp;
 	unsigned long mpclk, tmp;
@@ -591,7 +595,7 @@ static int dw_mipi_dsi_get_lane_bps(struct dw_mipi_dsi *dsi)
 	if (dsi->master)
 		return 0;
 
-	target_mbps = rockchip_dsi_calc_bandwidth(dsi);
+	target_mbps = dw_mipi_dsi_calc_bandwidth(dsi);
 
 	/* ref clk : 24MHz*/
 	pllref = 24;
@@ -611,16 +615,11 @@ static int dw_mipi_dsi_get_lane_bps(struct dw_mipi_dsi *dsi)
 	dsi->lane_mbps = pllref / n * m;
 	dsi->dphy.input_div = n;
 	dsi->dphy.feedback_div = m;
-	if (dsi->slave) {
-		dsi->slave->lane_mbps = dsi->lane_mbps;
-		dsi->slave->dphy.input_div = n;
-		dsi->slave->dphy.feedback_div = m;
-	}
 
 	return 0;
 }
 
-static void rockchip_set_transfer_mode(struct dw_mipi_dsi *dsi, int flags)
+static void dw_mipi_dsi_set_transfer_mode(struct dw_mipi_dsi *dsi, int flags)
 {
 	if (flags & MIPI_DSI_MSG_USE_LPM) {
 		dsi_write(dsi, DSI_CMD_MODE_CFG, CMD_MODE_ALL_LP);
@@ -681,8 +680,8 @@ static int dw_mipi_dsi_read_from_fifo(struct dw_mipi_dsi *dsi,
 	return 0;
 }
 
-static ssize_t rockchip_dsi_send_packet(struct dw_mipi_dsi *dsi,
-					const struct mipi_dsi_msg *msg)
+static ssize_t dw_mipi_dsi_transfer(struct dw_mipi_dsi *dsi,
+				    const struct mipi_dsi_msg *msg)
 {
 	struct mipi_dsi_packet packet;
 	int ret;
@@ -695,7 +694,7 @@ static ssize_t rockchip_dsi_send_packet(struct dw_mipi_dsi *dsi,
 		return ret;
 	}
 
-	rockchip_set_transfer_mode(dsi, msg->flags);
+	dw_mipi_dsi_set_transfer_mode(dsi, msg->flags);
 
 	/* Send payload */
 	while (DIV_ROUND_UP(packet.payload_length, 4)) {
@@ -708,7 +707,7 @@ static ssize_t rockchip_dsi_send_packet(struct dw_mipi_dsi *dsi,
 		 * making it possible to use FIFO sizes smaller than
 		 * the amount of data of the longest packet to be written.
 		 */
-		ret = rockchip_wait_w_pld_fifo_not_full(dsi);
+		ret = genif_wait_w_pld_fifo_not_full(dsi);
 		if (ret)
 			return ret;
 
@@ -726,7 +725,7 @@ static ssize_t rockchip_dsi_send_packet(struct dw_mipi_dsi *dsi,
 		}
 	}
 
-	ret = rockchip_wait_cmd_fifo_not_full(dsi);
+	ret = genif_wait_cmd_fifo_not_full(dsi);
 	if (ret)
 		return ret;
 
@@ -734,7 +733,7 @@ static ssize_t rockchip_dsi_send_packet(struct dw_mipi_dsi *dsi,
 	val = get_unaligned_le32(packet.header);
 	dsi_write(dsi, DSI_GEN_HDR, val);
 
-	ret = rockchip_wait_write_fifo_empty(dsi);
+	ret = genif_wait_write_fifo_empty(dsi);
 	if (ret)
 		return ret;
 
@@ -745,7 +744,7 @@ static ssize_t rockchip_dsi_send_packet(struct dw_mipi_dsi *dsi,
 	}
 
 	if (dsi->slave) {
-		ret = rockchip_dsi_send_packet(dsi->slave, msg);
+		ret = dw_mipi_dsi_transfer(dsi->slave, msg);
 		if (ret) {
 			printf("failed to send command through dsi slave, ret = %d\n", ret);
 			return ret;
@@ -755,13 +754,13 @@ static ssize_t rockchip_dsi_send_packet(struct dw_mipi_dsi *dsi,
 	return msg->rx_len ? msg->rx_len : msg->tx_len;
 }
 
-static ssize_t rockchip_dw_mipi_dsi_transfer(struct display_state *state,
-					     const struct mipi_dsi_msg *msg)
+static ssize_t dw_mipi_dsi_connector_transfer(struct display_state *state,
+					      const struct mipi_dsi_msg *msg)
 {
 	struct connector_state *conn_state = &state->conn_state;
 	struct dw_mipi_dsi *dsi = conn_state->private;
 
-	return rockchip_dsi_send_packet(dsi, msg);
+	return dw_mipi_dsi_transfer(dsi, msg);
 }
 
 static void dw_mipi_dsi_video_mode_config(struct dw_mipi_dsi *dsi)
@@ -793,16 +792,20 @@ static void dw_mipi_dsi_set_mode(struct dw_mipi_dsi *dsi,
 	}
 }
 
+static void dw_mipi_dsi_enable(struct dw_mipi_dsi *dsi)
+{
+	dw_mipi_dsi_set_mode(dsi, DSI_VIDEO_MODE);
+
+	if (dsi->slave)
+		dw_mipi_dsi_enable(dsi->slave);
+}
+
 static void dw_mipi_dsi_disable(struct dw_mipi_dsi *dsi)
 {
 	dw_mipi_dsi_set_mode(dsi, DSI_COMMAND_MODE);
-
-	/* host */
 	dsi_write(dsi, DSI_LPCLK_CTRL, 0);
 	dsi_write(dsi, DSI_PWR_UP, RESET);
-
-	/* phy */
-	dsi_write(dsi, DSI_PHY_RSTZ, PHY_RSTZ);
+	dsi_write(dsi, DSI_PHY_RSTZ, 0);
 
 	if (dsi->slave)
 		dw_mipi_dsi_disable(dsi->slave);
@@ -955,7 +958,7 @@ static void dw_mipi_dsi_clear_err(struct dw_mipi_dsi *dsi)
 	dsi_write(dsi, DSI_INT_MSK1, 0);
 }
 
-static int rockchip_dsi_dual_channel_probe(struct dw_mipi_dsi *master)
+static int dw_mipi_dsi_dual_channel_probe(struct dw_mipi_dsi *master)
 {
 	int phandle;
 	struct device_node *np;
@@ -1000,7 +1003,7 @@ static int rockchip_dsi_dual_channel_probe(struct dw_mipi_dsi *master)
 	return 0;
 }
 
-static int rockchip_dw_mipi_dsi_init(struct display_state *state)
+static int dw_mipi_dsi_connector_init(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
 	const struct rockchip_connector *connector = conn_state->connector;
@@ -1056,7 +1059,7 @@ static int rockchip_dw_mipi_dsi_init(struct display_state *state)
 	FDT_GET_INT(dsi->mode_flags, "dsi,flags");
 	FDT_GET_INT(dsi->channel, "reg");
 
-	ret = rockchip_dsi_dual_channel_probe(dsi);
+	ret = dw_mipi_dsi_dual_channel_probe(dsi);
 	if (ret)
 		return ret;
 
@@ -1067,26 +1070,12 @@ static int rockchip_dw_mipi_dsi_init(struct display_state *state)
 	return 0;
 }
 
-static void rockchip_dw_mipi_dsi_deinit(struct display_state *state)
+static void dw_mipi_dsi_pre_init(struct dw_mipi_dsi *dsi)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	struct dw_mipi_dsi *dsi = conn_state->private;
-
-	if (dsi->slave)
-		free(dsi->slave);
-	free(dsi);
-}
-
-static void rockchip_dw_dsi_pre_init(struct display_state *state,
-				     struct dw_mipi_dsi *dsi)
-{
-	struct connector_state *conn_state = &state->conn_state;
 	unsigned long bw, rate;
 
-	dsi->mode = &conn_state->mode;
-
 	if (dsi->dphy.phy) {
-		bw = rockchip_dsi_calc_bandwidth(dsi);
+		bw = dw_mipi_dsi_calc_bandwidth(dsi);
 		rate = rockchip_phy_set_pll(dsi->dphy.phy, bw * USEC_PER_SEC);
 		dsi->lane_mbps = rate / USEC_PER_SEC;
 		rockchip_phy_power_on(dsi->dphy.phy);
@@ -1094,14 +1083,18 @@ static void rockchip_dw_dsi_pre_init(struct display_state *state,
 		dw_mipi_dsi_get_lane_bps(dsi);
 	}
 
+	if (dsi->slave) {
+		dsi->slave->mode = dsi->mode;
+		dsi->slave->lane_mbps = dsi->lane_mbps;
+		dsi->slave->dphy.input_div = dsi->dphy.input_div;
+		dsi->slave->dphy.feedback_div = dsi->dphy.feedback_div;
+	}
+
 	printf("final DSI-Link bandwidth: %u Mbps x %d\n",
 	       dsi->lane_mbps, dsi->lanes);
-
-	if (dsi->slave)
-		rockchip_dw_dsi_pre_init(state, dsi->slave);
 }
 
-static void rockchip_dw_dsi_host_init(struct dw_mipi_dsi *dsi)
+static void dw_mipi_dsi_host_init(struct dw_mipi_dsi *dsi)
 {
 	dw_mipi_dsi_init(dsi);
 	dw_mipi_dsi_dpi_config(dsi, dsi->mode);
@@ -1142,6 +1135,9 @@ static void mipi_dphy_init(struct dw_mipi_dsi *dsi)
 	grf_field_write(dsi, FORCERXMODE, 0);
 	udelay(1);
 
+	if (!dsi->dphy.phy)
+		dw_mipi_dsi_phy_init(dsi);
+
 	/* Enable Data Lane Module */
 	grf_field_write(dsi, ENABLE_N, map[dsi->lanes - 1]);
 
@@ -1149,67 +1145,58 @@ static void mipi_dphy_init(struct dw_mipi_dsi *dsi)
 	grf_field_write(dsi, ENABLECLK, 1);
 }
 
-static void rockchip_dw_dsi_controller_init(struct dw_mipi_dsi *dsi)
+static void dw_mipi_dsi_pre_enable(struct dw_mipi_dsi *dsi)
 {
-	rockchip_dw_dsi_host_init(dsi);
-
-	mdelay(10);
+	dw_mipi_dsi_host_init(dsi);
 	mipi_dphy_init(dsi);
-	dw_mipi_dsi_phy_init(dsi);
+	mipi_dphy_power_on(dsi);
+	dsi_write(dsi, DSI_PWR_UP, POWERUP);
 
 	if (dsi->slave)
-		rockchip_dw_dsi_controller_init(dsi->slave);
+		dw_mipi_dsi_pre_enable(dsi->slave);
 }
 
-static int rockchip_dw_mipi_dsi_prepare(struct display_state *state)
+static int dw_mipi_dsi_connector_prepare(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
 	struct crtc_state *crtc_state = &state->crtc_state;
 	struct dw_mipi_dsi *dsi = conn_state->private;
 
-	dw_mipi_dsi_vop_routing(dsi, crtc_state->crtc_id);
-
-	rockchip_dw_dsi_pre_init(state, dsi);
+	dsi->mode = &conn_state->mode;
 
-	rockchip_dw_dsi_controller_init(dsi);
+	dw_mipi_dsi_vop_routing(dsi, crtc_state->crtc_id);
+	dw_mipi_dsi_pre_init(dsi);
+	dw_mipi_dsi_pre_enable(dsi);
 
 	return 0;
 }
 
-static int rockchip_dw_mipi_dsi_enable(struct display_state *state)
+static int dw_mipi_dsi_connector_enable(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
 	struct dw_mipi_dsi *dsi = conn_state->private;
 
-	dw_mipi_dsi_set_mode(dsi, DSI_VIDEO_MODE);
-	if (dsi->slave)
-		dw_mipi_dsi_set_mode(dsi->slave, DSI_VIDEO_MODE);
+	dw_mipi_dsi_enable(dsi);
 
 	return 0;
 }
 
-static int rockchip_dw_mipi_dsi_disable(struct display_state *state)
+static int dw_mipi_dsi_connector_disable(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
 	struct dw_mipi_dsi *dsi = conn_state->private;
 
-	/*
-	 * This is necessary to make sure the peripheral will be driven
-	 * normally when the display is enabled again later.
-	 */
-	mdelay(120);
-
 	dw_mipi_dsi_disable(dsi);
+
 	return 0;
 }
 
-static const struct rockchip_connector_funcs rockchip_dw_mipi_dsi_funcs = {
-	.init = rockchip_dw_mipi_dsi_init,
-	.deinit = rockchip_dw_mipi_dsi_deinit,
-	.prepare = rockchip_dw_mipi_dsi_prepare,
-	.enable = rockchip_dw_mipi_dsi_enable,
-	.disable = rockchip_dw_mipi_dsi_disable,
-	.transfer = rockchip_dw_mipi_dsi_transfer,
+static const struct rockchip_connector_funcs dw_mipi_dsi_connector_funcs = {
+	.init = dw_mipi_dsi_connector_init,
+	.prepare = dw_mipi_dsi_connector_prepare,
+	.enable = dw_mipi_dsi_connector_enable,
+	.disable = dw_mipi_dsi_connector_disable,
+	.transfer = dw_mipi_dsi_connector_transfer,
 };
 
 static const u32 px30_dsi_grf_reg_fields[MAX_FIELDS] = {
@@ -1221,15 +1208,15 @@ static const u32 px30_dsi_grf_reg_fields[MAX_FIELDS] = {
 	[VOPSEL]		= GRF_REG_FIELD(0x0438,  0,  0),
 };
 
-static const struct dw_mipi_dsi_plat_data px30_mipi_dsi_drv_data = {
+static const struct dw_mipi_dsi_plat_data px30_mipi_dsi_plat_data = {
 	.dsi0_grf_reg_fields = px30_dsi_grf_reg_fields,
 	.max_bit_rate_per_lane = 1000000000UL,
 	.soc_type = PX30,
 };
 
-static const struct rockchip_connector px30_mipi_dsi_data = {
-	 .funcs = &rockchip_dw_mipi_dsi_funcs,
-	 .data = &px30_mipi_dsi_drv_data,
+static const struct rockchip_connector px30_mipi_dsi_driver_data = {
+	 .funcs = &dw_mipi_dsi_connector_funcs,
+	 .data = &px30_mipi_dsi_plat_data,
 };
 
 static const u32 rk3128_dsi_grf_reg_fields[MAX_FIELDS] = {
@@ -1240,15 +1227,15 @@ static const u32 rk3128_dsi_grf_reg_fields[MAX_FIELDS] = {
 	[DPISHUTDN]		= GRF_REG_FIELD(0x0150,  4,  4),
 };
 
-static const struct dw_mipi_dsi_plat_data rk3128_mipi_dsi_drv_data = {
+static const struct dw_mipi_dsi_plat_data rk3128_mipi_dsi_plat_data = {
 	.dsi0_grf_reg_fields = rk3128_dsi_grf_reg_fields,
 	.max_bit_rate_per_lane = 1000000000UL,
 	.soc_type = RK3128,
 };
 
-static const struct rockchip_connector rk3128_mipi_dsi_data = {
-	 .funcs = &rockchip_dw_mipi_dsi_funcs,
-	 .data = &rk3128_mipi_dsi_drv_data,
+static const struct rockchip_connector rk3128_mipi_dsi_driver_data = {
+	 .funcs = &dw_mipi_dsi_connector_funcs,
+	 .data = &rk3128_mipi_dsi_plat_data,
 };
 
 static const u32 rk3288_dsi0_grf_reg_fields[MAX_FIELDS] = {
@@ -1277,16 +1264,16 @@ static const u32 rk3288_dsi1_grf_reg_fields[MAX_FIELDS] = {
 	[DPIUPDATECFG]		= GRF_REG_FIELD(0x03a8,  1,  1),
 };
 
-static const struct dw_mipi_dsi_plat_data rk3288_mipi_dsi_drv_data = {
+static const struct dw_mipi_dsi_plat_data rk3288_mipi_dsi_plat_data = {
 	.dsi0_grf_reg_fields = rk3288_dsi0_grf_reg_fields,
 	.dsi1_grf_reg_fields = rk3288_dsi1_grf_reg_fields,
 	.max_bit_rate_per_lane = 1500000000UL,
 	.soc_type = RK3288,
 };
 
-static const struct rockchip_connector rk3288_mipi_dsi_data = {
-	 .funcs = &rockchip_dw_mipi_dsi_funcs,
-	 .data = &rk3288_mipi_dsi_drv_data,
+static const struct rockchip_connector rk3288_mipi_dsi_driver_data = {
+	 .funcs = &dw_mipi_dsi_connector_funcs,
+	 .data = &rk3288_mipi_dsi_plat_data,
 };
 
 static const u32 rk3366_dsi_grf_reg_fields[MAX_FIELDS] = {
@@ -1299,15 +1286,15 @@ static const u32 rk3366_dsi_grf_reg_fields[MAX_FIELDS] = {
 	[TURNDISABLE]		= GRF_REG_FIELD(0x0414,  5,  5),
 };
 
-static const struct dw_mipi_dsi_plat_data rk3366_mipi_dsi_drv_data = {
+static const struct dw_mipi_dsi_plat_data rk3366_mipi_dsi_plat_data = {
 	.dsi0_grf_reg_fields = rk3366_dsi_grf_reg_fields,
 	.max_bit_rate_per_lane = 1000000000UL,
 	.soc_type = RK3366,
 };
 
-static const struct rockchip_connector rk3366_mipi_dsi_data = {
-	 .funcs = &rockchip_dw_mipi_dsi_funcs,
-	 .data = &rk3366_mipi_dsi_drv_data,
+static const struct rockchip_connector rk3366_mipi_dsi_driver_data = {
+	 .funcs = &dw_mipi_dsi_connector_funcs,
+	 .data = &rk3366_mipi_dsi_plat_data,
 };
 
 static const u32 rk3368_dsi_grf_reg_fields[MAX_FIELDS] = {
@@ -1319,15 +1306,15 @@ static const u32 rk3368_dsi_grf_reg_fields[MAX_FIELDS] = {
 	[TURNDISABLE]		= GRF_REG_FIELD(0x041c,  5,  5),
 };
 
-static const struct dw_mipi_dsi_plat_data rk3368_mipi_dsi_drv_data = {
+static const struct dw_mipi_dsi_plat_data rk3368_mipi_dsi_plat_data = {
 	.dsi0_grf_reg_fields = rk3368_dsi_grf_reg_fields,
 	.max_bit_rate_per_lane = 1000000000UL,
 	.soc_type = RK3368,
 };
 
-static const struct rockchip_connector rk3368_mipi_dsi_data = {
-	 .funcs = &rockchip_dw_mipi_dsi_funcs,
-	 .data = &rk3368_mipi_dsi_drv_data,
+static const struct rockchip_connector rk3368_mipi_dsi_driver_data = {
+	 .funcs = &dw_mipi_dsi_connector_funcs,
+	 .data = &rk3368_mipi_dsi_plat_data,
 };
 
 static const u32 rk3399_dsi0_grf_reg_fields[MAX_FIELDS] = {
@@ -1355,16 +1342,16 @@ static const u32 rk3399_dsi1_grf_reg_fields[MAX_FIELDS] = {
 	[TURNREQUEST]		= GRF_REG_FIELD(0x6260,  0,  3),
 };
 
-static const struct dw_mipi_dsi_plat_data rk3399_mipi_dsi_drv_data = {
+static const struct dw_mipi_dsi_plat_data rk3399_mipi_dsi_plat_data = {
 	.dsi0_grf_reg_fields = rk3399_dsi0_grf_reg_fields,
 	.dsi1_grf_reg_fields = rk3399_dsi1_grf_reg_fields,
 	.max_bit_rate_per_lane = 1500000000UL,
 	.soc_type = RK3399,
 };
 
-static const struct rockchip_connector rk3399_mipi_dsi_data = {
-	 .funcs = &rockchip_dw_mipi_dsi_funcs,
-	 .data = &rk3399_mipi_dsi_drv_data,
+static const struct rockchip_connector rk3399_mipi_dsi_driver_data = {
+	 .funcs = &dw_mipi_dsi_connector_funcs,
+	 .data = &rk3399_mipi_dsi_plat_data,
 };
 
 static const u32 rv1108_dsi_grf_reg_fields[MAX_FIELDS] = {
@@ -1376,51 +1363,58 @@ static const u32 rv1108_dsi_grf_reg_fields[MAX_FIELDS] = {
 	[TURNDISABLE]		= GRF_REG_FIELD(0x0414,  4,  4),
 };
 
-static const struct dw_mipi_dsi_plat_data rv1108_mipi_dsi_drv_data = {
+static const struct dw_mipi_dsi_plat_data rv1108_mipi_dsi_plat_data = {
 	.dsi0_grf_reg_fields = rv1108_dsi_grf_reg_fields,
 	.max_bit_rate_per_lane = 1000000000UL,
 	.soc_type = RV1108,
 };
 
-static const struct rockchip_connector rv1108_mipi_dsi_data = {
-	 .funcs = &rockchip_dw_mipi_dsi_funcs,
-	 .data = &rv1108_mipi_dsi_drv_data,
+static const struct rockchip_connector rv1108_mipi_dsi_driver_data = {
+	 .funcs = &dw_mipi_dsi_connector_funcs,
+	 .data = &rv1108_mipi_dsi_plat_data,
 };
 
-static const struct udevice_id rockchip_mipi_dsi_ids[] = {
+static const struct udevice_id dw_mipi_dsi_ids[] = {
 	{
 		.compatible = "rockchip,px30-mipi-dsi",
-		.data = (ulong)&px30_mipi_dsi_data,
+		.data = (ulong)&px30_mipi_dsi_driver_data,
 	},
 	{
 		.compatible = "rockchip,rk3128-mipi-dsi",
-		.data = (ulong)&rk3128_mipi_dsi_data,
+		.data = (ulong)&rk3128_mipi_dsi_driver_data,
 	},
 	{
 		.compatible = "rockchip,rk3288-mipi-dsi",
-		.data = (ulong)&rk3288_mipi_dsi_data,
+		.data = (ulong)&rk3288_mipi_dsi_driver_data,
 	},
 	{
 		.compatible = "rockchip,rk3366-mipi-dsi",
-		.data = (ulong)&rk3366_mipi_dsi_data,
+		.data = (ulong)&rk3366_mipi_dsi_driver_data,
 	},
 	{
 		.compatible = "rockchip,rk3368-mipi-dsi",
-		.data = (ulong)&rk3368_mipi_dsi_data,
+		.data = (ulong)&rk3368_mipi_dsi_driver_data,
 	},
 	{
 		.compatible = "rockchip,rk3399-mipi-dsi",
-		.data = (ulong)&rk3399_mipi_dsi_data,
+		.data = (ulong)&rk3399_mipi_dsi_driver_data,
 	},
 	{
 		.compatible = "rockchip,rv1108-mipi-dsi",
-		.data = (ulong)&rv1108_mipi_dsi_data,
+		.data = (ulong)&rv1108_mipi_dsi_driver_data,
 	},
 	{}
 };
 
-U_BOOT_DRIVER(rockchip_mipi_dsi) = {
-	.name = "rockchip_mipi_dsi",
+static int dw_mipi_dsi_probe(struct udevice *dev)
+{
+	return 0;
+}
+
+U_BOOT_DRIVER(dw_mipi_dsi) = {
+	.name = "dw_mipi_dsi",
 	.id = UCLASS_DISPLAY,
-	.of_match = rockchip_mipi_dsi_ids,
+	.of_match = dw_mipi_dsi_ids,
+	.probe = dw_mipi_dsi_probe,
+	.priv_auto_alloc_size = sizeof(struct dw_mipi_dsi),
 };

commit 15081c50589d283729be0591b79f327d95270cc0
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Sep 26 14:21:09 2018 +0800

    video/drm: Refactor phy code
    
    Change-Id: Id56d83b954eacf47228278562fb5d94409020517
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/dw_hdmi.c b/drivers/video/drm/dw_hdmi.c
index 152f0377b2..c95614367f 100644
--- a/drivers/video/drm/dw_hdmi.c
+++ b/drivers/video/drm/dw_hdmi.c
@@ -2463,11 +2463,12 @@ int inno_dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data)
 		bus_width = color_depth;
 	else
 		bus_width = 8;
-	rockchip_phy_set_bus_width(state, bus_width);
-	rockchip_phy_set_pll(state, conn_state->mode.crtc_clock * 1000);
+	rockchip_phy_set_bus_width(conn_state->phy, bus_width);
+	rockchip_phy_set_pll(conn_state->phy,
+			     conn_state->mode.crtc_clock * 1000);
 	if (hdmi->edid_data.display_info.hdmi.scdc.supported)
 		rockchip_dw_hdmi_scdc_set_tmds_rate(hdmi);
-	rockchip_phy_power_on(state);
+	rockchip_phy_power_on(conn_state->phy);
 
 	return 0;
 }
@@ -2497,6 +2498,7 @@ inno_dw_hdmi_phy_read_hpd(struct dw_hdmi *hdmi, void *data)
 void inno_dw_hdmi_mode_valid(struct dw_hdmi *hdmi, void *data)
 {
 	struct display_state *state = (struct display_state *)data;
+	struct connector_state *conn_state = &state->conn_state;
 	struct hdmi_edid_data *edid_data = &hdmi->edid_data;
 	unsigned long rate;
 	int i, ret;
@@ -2511,7 +2513,7 @@ void inno_dw_hdmi_mode_valid(struct dw_hdmi *hdmi, void *data)
 			rate = mode_buf[i].clock * 1000;
 
 		/* Check whether mode is out of phy cfg range. */
-		ret = rockchip_phy_round_rate(state, rate);
+		ret = rockchip_phy_round_rate(conn_state->phy, rate);
 
 		if (ret < 0)
 			edid_data->mode_buf[i].invalid = true;
diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index 103c3ad9b8..f97062ddf9 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -299,7 +299,7 @@ struct dw_mipi_dsi_plat_data {
 
 struct mipi_dphy {
 	/* Non-SNPS PHY */
-	const struct rockchip_phy *phy;
+	struct rockchip_phy *phy;
 
 	u16 input_div;
 	u16 feedback_div;
@@ -1032,6 +1032,8 @@ static int rockchip_dw_mipi_dsi_init(struct display_state *state)
 	dsi->id = id;
 	dsi->blob = state->blob;
 	dsi->node = mipi_node;
+	dsi->dphy.phy = conn_state->phy;
+
 	conn_state->private = dsi;
 	conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
 	conn_state->color_space = V4L2_COLORSPACE_DEFAULT;
@@ -1083,11 +1085,11 @@ static void rockchip_dw_dsi_pre_init(struct display_state *state,
 
 	dsi->mode = &conn_state->mode;
 
-	if (conn_state->phy) {
+	if (dsi->dphy.phy) {
 		bw = rockchip_dsi_calc_bandwidth(dsi);
-		rate = rockchip_phy_set_pll(state, bw * USEC_PER_SEC);
+		rate = rockchip_phy_set_pll(dsi->dphy.phy, bw * USEC_PER_SEC);
 		dsi->lane_mbps = rate / USEC_PER_SEC;
-		rockchip_phy_power_on(state);
+		rockchip_phy_power_on(dsi->dphy.phy);
 	} else {
 		dw_mipi_dsi_get_lane_bps(dsi);
 	}
diff --git a/drivers/video/drm/rockchip-inno-hdmi-phy.c b/drivers/video/drm/rockchip-inno-hdmi-phy.c
index 99d1c922ab..783280083d 100644
--- a/drivers/video/drm/rockchip-inno-hdmi-phy.c
+++ b/drivers/video/drm/rockchip-inno-hdmi-phy.c
@@ -157,7 +157,7 @@ struct phy_config {
 };
 
 struct inno_hdmi_phy {
-	const void *blob;
+	struct udevice *dev;
 	ofnode node;
 	void *regs;
 
@@ -397,10 +397,9 @@ static u8 rk_get_cpu_version(void)
 	return val;
 }
 
-static int inno_hdmi_phy_power_on(struct display_state *state)
+static int inno_hdmi_phy_power_on(struct rockchip_phy *phy)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	struct inno_hdmi_phy *inno = conn_state->phy_private;
+	struct inno_hdmi_phy *inno = dev_get_priv(phy->dev);
 	const struct post_pll_config *cfg = post_pll_cfg_table;
 	const struct phy_config *phy_cfg = inno->plat_data->phy_cfg_table;
 	u32 tmdsclock = inno_hdmi_phy_get_tmdsclk(inno, inno->pixclock);
@@ -444,10 +443,9 @@ static int inno_hdmi_phy_power_on(struct display_state *state)
 		return -EINVAL;
 }
 
-static int inno_hdmi_phy_power_off(struct display_state *state)
+static int inno_hdmi_phy_power_off(struct rockchip_phy *phy)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	struct inno_hdmi_phy *inno = conn_state->phy_private;
+	struct inno_hdmi_phy *inno = dev_get_priv(phy->dev);
 
 	if (inno->plat_data->ops->power_off)
 		inno->plat_data->ops->power_off(inno);
@@ -456,10 +454,8 @@ static int inno_hdmi_phy_power_off(struct display_state *state)
 	return 0;
 }
 
-static int inno_hdmi_phy_clk_is_prepared(struct display_state *state)
+static int inno_hdmi_phy_clk_is_prepared(struct inno_hdmi_phy *inno)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	struct inno_hdmi_phy *inno = conn_state->phy_private;
 	u8 status;
 
 	if (inno->plat_data->dev_type == INNO_HDMI_PHY_RK3228)
@@ -470,11 +466,8 @@ static int inno_hdmi_phy_clk_is_prepared(struct display_state *state)
 	return status ? 0 : 1;
 }
 
-static int inno_hdmi_phy_clk_prepare(struct display_state *state)
+static int inno_hdmi_phy_clk_prepare(struct inno_hdmi_phy *inno)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	struct inno_hdmi_phy *inno = conn_state->phy_private;
-
 	if (inno->plat_data->dev_type == INNO_HDMI_PHY_RK3228)
 		inno_update_bits(inno, 0xe0, PRE_PLL_POWER_MASK,
 				 PRE_PLL_POWER_UP);
@@ -484,11 +477,9 @@ static int inno_hdmi_phy_clk_prepare(struct display_state *state)
 	return 0;
 }
 
-static int inno_hdmi_phy_clk_set_rate(struct display_state *state,
+static int inno_hdmi_phy_clk_set_rate(struct inno_hdmi_phy *inno,
 				      unsigned long rate)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	struct inno_hdmi_phy *inno = conn_state->phy_private;
 	const struct pre_pll_config *cfg = pre_pll_cfg_table;
 	u32 tmdsclock = inno_hdmi_phy_get_tmdsclk(inno, rate);
 
@@ -937,30 +928,21 @@ static const struct rockchip_inno_data inno_hdmi_phy_of_match[] = {
 	{}
 };
 
-static int inno_hdmi_phy_init(struct display_state *state)
+static int inno_hdmi_phy_init(struct rockchip_phy *phy)
 {
-	const void *blob = state->blob;
-	struct connector_state *conn_state = &state->conn_state;
-	struct udevice *dev = conn_state->phy_dev;
-	ofnode phy_node = conn_state->phy_node;
-	struct inno_hdmi_phy *inno;
+	struct udevice *dev = phy->dev;
+	struct inno_hdmi_phy *inno = dev_get_priv(phy->dev);
 	int i, val, phy_table_size, ret;
 	const char *name;
 	u32 *phy_config;
 
-	inno = malloc(sizeof(*inno));
-	if (!inno)
-		return -ENOMEM;
-
-	inno->blob = blob;
-	inno->node = phy_node;
+	inno->node = dev->node;
 
 	inno->regs = dev_read_addr_ptr(dev);
 	if (!inno->regs) {
 		printf("%s: failed to get phy address\n", __func__);
 		return -ENOMEM;
 	}
-	conn_state->phy_private = inno;
 
 	name = dev_read_string(dev, "compatible");
 	for (i = 0; i < ARRAY_SIZE(inno_hdmi_phy_of_match); i++) {
@@ -1018,31 +1000,33 @@ static int inno_hdmi_phy_init(struct display_state *state)
 	return 0;
 }
 
-static unsigned long inno_hdmi_phy_set_pll(struct display_state *state,
+static unsigned long inno_hdmi_phy_set_pll(struct rockchip_phy *phy,
 					   unsigned long rate)
 {
-	inno_hdmi_phy_clk_prepare(state);
-	inno_hdmi_phy_clk_is_prepared(state);
-	inno_hdmi_phy_clk_set_rate(state, rate);
+	struct inno_hdmi_phy *inno = dev_get_priv(phy->dev);
+
+	inno_hdmi_phy_clk_prepare(inno);
+	inno_hdmi_phy_clk_is_prepared(inno);
+	inno_hdmi_phy_clk_set_rate(inno, rate);
 	return 0;
 }
 
-static void
-inno_hdmi_phy_set_bus_width(struct display_state *state, u32 bus_width)
+static int
+inno_hdmi_phy_set_bus_width(struct rockchip_phy *phy, u32 bus_width)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	struct inno_hdmi_phy *inno = conn_state->phy_private;
+	struct inno_hdmi_phy *inno = dev_get_priv(phy->dev);
 
 	inno->bus_width = bus_width;
+
+	return 0;
 }
 
 static long
-inno_hdmi_phy_clk_round_rate(struct display_state *state, unsigned long rate)
+inno_hdmi_phy_clk_round_rate(struct rockchip_phy *phy, unsigned long rate)
 {
+	struct inno_hdmi_phy *inno = dev_get_priv(phy->dev);
 	int i;
 	const struct pre_pll_config *cfg = pre_pll_cfg_table;
-	struct connector_state *conn_state = &state->conn_state;
-	struct inno_hdmi_phy *inno = conn_state->phy_private;
 	u32 tmdsclock = inno_hdmi_phy_get_tmdsclk(inno, rate);
 
 	for (; cfg->pixclock != ~0UL; cfg++)
@@ -1085,3 +1069,39 @@ const struct rockchip_phy_funcs inno_hdmi_phy_funcs = {
 	.set_bus_width = inno_hdmi_phy_set_bus_width,
 	.round_rate = inno_hdmi_phy_clk_round_rate,
 };
+
+static struct rockchip_phy inno_hdmi_phy_driver_data = {
+	 .funcs = &inno_hdmi_phy_funcs,
+};
+
+static const struct udevice_id inno_hdmi_phy_ids[] = {
+	{
+	 .compatible = "rockchip,rk3328-hdmi-phy",
+	 .data = (ulong)&inno_hdmi_phy_driver_data,
+	},
+	{
+	 .compatible = "rockchip,rk3228-hdmi-phy",
+	 .data = (ulong)&inno_hdmi_phy_driver_data,
+	},
+	{}
+};
+
+static int inno_hdmi_phy_probe(struct udevice *dev)
+{
+	struct inno_hdmi_phy *inno = dev_get_priv(dev);
+	struct rockchip_phy *phy =
+		(struct rockchip_phy *)dev_get_driver_data(dev);
+
+	inno->dev = dev;
+	phy->dev = dev;
+
+	return 0;
+}
+
+U_BOOT_DRIVER(inno_hdmi_phy) = {
+	.name = "inno_hdmi_phy",
+	.id = UCLASS_PHY,
+	.of_match = inno_hdmi_phy_ids,
+	.probe = inno_hdmi_phy_probe,
+	.priv_auto_alloc_size = sizeof(struct inno_hdmi_phy),
+};
diff --git a/drivers/video/drm/rockchip-inno-mipi-dphy.c b/drivers/video/drm/rockchip-inno-mipi-dphy.c
index 78ea041ef7..267770387e 100644
--- a/drivers/video/drm/rockchip-inno-mipi-dphy.c
+++ b/drivers/video/drm/rockchip-inno-mipi-dphy.c
@@ -12,6 +12,10 @@
 #include <asm/io.h>
 #include <linux/list.h>
 #include <div64.h>
+#include <dm/device.h>
+#include <dm/read.h>
+#include <dm/uclass.h>
+#include <dm/uclass-id.h>
 
 #include "rockchip_display.h"
 #include "rockchip_crtc.h"
@@ -127,13 +131,10 @@ struct inno_mipi_dphy_timing {
 };
 
 struct inno_mipi_dphy {
-	const void *blob;
-	ofnode node;
+	struct udevice *dev;
 	void __iomem *regs;
-
 	unsigned int lane_mbps;
 	int lanes;
-	int bpp;
 };
 
 static const u32 lane_reg_offset[] = {
@@ -488,10 +489,9 @@ static inline void inno_mipi_dphy_bgpd_disable(struct inno_mipi_dphy *inno)
 	inno_update_bits(inno, INNO_PHY_LVDS_CTRL, LVDS_BGPD, LVDS_BGPD);
 }
 
-static int inno_mipi_dphy_power_on(struct display_state *state)
+static int inno_mipi_dphy_power_on(struct rockchip_phy *phy)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	struct inno_mipi_dphy *inno = conn_state->phy_private;
+	struct inno_mipi_dphy *inno = dev_get_priv(phy->dev);
 
 	inno_mipi_dphy_bgpd_enable(inno);
 	inno_mipi_dphy_da_pwrok_enable(inno);
@@ -509,10 +509,9 @@ static inline void inno_mipi_dphy_lane_disable(struct inno_mipi_dphy *inno)
 	inno_update_bits(inno, INNO_PHY_LANE_CTRL, 0x7c, 0x00);
 }
 
-static int inno_mipi_dphy_power_off(struct display_state *state)
+static int inno_mipi_dphy_power_off(struct rockchip_phy *phy)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	struct inno_mipi_dphy *inno = conn_state->phy_private;
+	struct inno_mipi_dphy *inno = dev_get_priv(phy->dev);
 
 	inno_mipi_dphy_lane_disable(inno);
 	inno_mipi_dphy_pll_ldo_disable(inno);
@@ -522,11 +521,10 @@ static int inno_mipi_dphy_power_off(struct display_state *state)
 	return 0;
 }
 
-static unsigned long inno_mipi_dphy_set_pll(struct display_state *state,
+static unsigned long inno_mipi_dphy_set_pll(struct rockchip_phy *phy,
 					    unsigned long rate)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	struct inno_mipi_dphy *inno = conn_state->phy_private;
+	struct inno_mipi_dphy *inno = dev_get_priv(phy->dev);
 	unsigned long fin, fout;
 	u16 fbdiv = 0;
 	u8 prediv = 0;
@@ -551,55 +549,82 @@ static unsigned long inno_mipi_dphy_set_pll(struct display_state *state,
 	return fout;
 }
 
-static int inno_mipi_dphy_parse_dt(ofnode panel_node, struct inno_mipi_dphy *inno)
+static int inno_mipi_dphy_parse_dt(struct inno_mipi_dphy *inno)
 {
-	int format;
-
-	inno->lanes = ofnode_read_s32_default(panel_node, "dsi,lanes", -1);
-	if (inno->lanes < 0)
-		inno->lanes = 4;
+	struct udevice *dev = inno->dev;
 
-	format = ofnode_read_s32_default(panel_node, "dsi,format", -1);
-	inno->bpp = mipi_dsi_pixel_format_to_bpp(format);
-	if (inno->bpp < 0)
-		inno->bpp = 24;
+	inno->lanes = ofnode_read_u32_default(dev->node, "inno,lanes", 4);
 
 	return 0;
 }
 
-static int inno_mipi_dphy_init(struct display_state *state)
+static int inno_mipi_dphy_init(struct rockchip_phy *phy)
 {
-	const void *blob = state->blob;
-	struct connector_state *conn_state = &state->conn_state;
-	struct panel_state *panel_state = &state->panel_state;
-	ofnode node = conn_state->phy_node;
-	ofnode panel_node = panel_state->node;
-	struct inno_mipi_dphy *inno;
+	struct inno_mipi_dphy *inno = dev_get_priv(phy->dev);
 	int ret;
 
-	inno = malloc(sizeof(*inno));
-	if (!inno)
-		return -ENOMEM;
-
-	inno->blob = blob;
-	inno->node = node;
-
-	ret = inno_mipi_dphy_parse_dt(panel_node, inno);
+	ret = inno_mipi_dphy_parse_dt(inno);
 	if (ret) {
 		printf("%s: failed to parse DT\n", __func__);
 		return ret;
 	}
 
-	inno->regs = (void __iomem *)ofnode_get_addr(node);
-
-	conn_state->phy_private = inno;
+	inno->regs = dev_read_addr_ptr(inno->dev);
 
 	return 0;
 }
 
-const struct rockchip_phy_funcs inno_mipi_dphy_funcs = {
+static const struct rockchip_phy_funcs inno_mipi_dphy_funcs = {
 	.init = inno_mipi_dphy_init,
 	.power_on = inno_mipi_dphy_power_on,
 	.power_off = inno_mipi_dphy_power_off,
 	.set_pll = inno_mipi_dphy_set_pll,
 };
+
+static struct rockchip_phy inno_mipi_dphy_driver_data = {
+	 .funcs = &inno_mipi_dphy_funcs,
+};
+
+static const struct udevice_id inno_mipi_dphy_ids[] = {
+	{
+		.compatible = "rockchip,px30-mipi-dphy",
+		.data = (ulong)&inno_mipi_dphy_driver_data,
+	},
+	{
+		.compatible = "rockchip,rk3128-mipi-dphy",
+		.data = (ulong)&inno_mipi_dphy_driver_data,
+	},
+	{
+		.compatible = "rockchip,rk3366-mipi-dphy",
+		.data = (ulong)&inno_mipi_dphy_driver_data,
+	},
+	{
+		.compatible = "rockchip,rk3368-mipi-dphy",
+		.data = (ulong)&inno_mipi_dphy_driver_data,
+	},
+	{
+		.compatible = "rockchip,rv1108-mipi-dphy",
+		.data = (ulong)&inno_mipi_dphy_driver_data,
+	},
+	{}
+};
+
+static int inno_mipi_dphy_probe(struct udevice *dev)
+{
+	struct inno_mipi_dphy *inno = dev_get_priv(dev);
+	struct rockchip_phy *phy =
+		(struct rockchip_phy *)dev_get_driver_data(dev);
+
+	inno->dev = dev;
+	phy->dev = dev;
+
+	return 0;
+}
+
+U_BOOT_DRIVER(inno_mipi_dphy) = {
+	.name = "inno_mipi_dphy",
+	.id = UCLASS_PHY,
+	.of_match = inno_mipi_dphy_ids,
+	.probe = inno_mipi_dphy_probe,
+	.priv_auto_alloc_size = sizeof(struct inno_mipi_dphy),
+};
diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index dff5c6c7c9..85c92e2e01 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -61,7 +61,6 @@ enum public_use_phy {
 
 /* save public phy data */
 struct public_phy_data {
-	void *private_date;
 	const struct rockchip_phy *phy_drv;
 	int phy_node;
 	int public_phy_type;
@@ -91,18 +90,18 @@ static int get_public_phy(struct display_state *state,
 			  struct public_phy_data *data)
 {
 	struct connector_state *conn_state = &state->conn_state;
-	const struct rockchip_phy *phy;
+	struct rockchip_phy *phy;
 	struct udevice *dev;
 	int ret = 0;
 
 	switch (data->public_phy_type) {
 	case INNO_HDMI_PHY:
 #if defined(CONFIG_ROCKCHIP_RK3328)
-		ret = uclass_find_device_by_name(UCLASS_PHY,
-						 "hdmiphy@ff430000", &dev);
+		ret = uclass_get_device_by_name(UCLASS_PHY,
+						"hdmiphy@ff430000", &dev);
 #elif defined(CONFIG_ROCKCHIP_RK322X)
-		ret = uclass_find_device_by_name(UCLASS_PHY,
-						 "hdmi-phy@12030000", &dev);
+		ret = uclass_get_device_by_name(UCLASS_PHY,
+						"hdmi-phy@12030000", &dev);
 #else
 		ret = -EINVAL;
 #endif
@@ -111,7 +110,7 @@ static int get_public_phy(struct display_state *state,
 			return 0;
 		}
 
-		phy = (const struct rockchip_phy *)dev_get_driver_data(dev);
+		phy = (struct rockchip_phy *)dev_get_driver_data(dev);
 		if (!phy) {
 			printf("failed to get phy driver\n");
 			return 0;
@@ -119,16 +118,16 @@ static int get_public_phy(struct display_state *state,
 
 		conn_state->phy_dev = dev;
 		conn_state->phy_node = dev->node;
-		if (!phy->funcs || !phy->funcs->init ||
-		    phy->funcs->init(state)) {
+
+		ret = rockchip_phy_init(phy);
+		if (ret) {
 			printf("failed to init phy driver\n");
-			return -EINVAL;
+			return ret;
 		}
 		conn_state->phy = phy;
 
 		printf("inno hdmi phy init success, save it\n");
 		data->phy_node = ofnode_to_offset(conn_state->phy_node);
-		data->private_date = conn_state->phy_private;
 		data->phy_drv = conn_state->phy;
 		data->phy_init = true;
 		return 0;
@@ -232,7 +231,7 @@ static int connector_phy_init(struct display_state *state,
 			      struct public_phy_data *data)
 {
 	struct connector_state *conn_state = &state->conn_state;
-	const struct rockchip_phy *phy;
+	struct rockchip_phy *phy;
 	struct udevice *dev;
 	int ret, type;
 
@@ -253,8 +252,7 @@ static int connector_phy_init(struct display_state *state,
 
 		/* if this phy has been initialized, get it directly */
 		conn_state->phy_node = offset_to_ofnode(data->phy_node);
-		conn_state->phy_private = data->private_date;
-		conn_state->phy = data->phy_drv;
+		conn_state->phy = (struct rockchip_phy *)data->phy_drv;
 		return 0;
 	}
 
@@ -269,7 +267,7 @@ static int connector_phy_init(struct display_state *state,
 		return 0;
 	}
 
-	phy = (const struct rockchip_phy *)dev_get_driver_data(dev);
+	phy = (struct rockchip_phy *)dev_get_driver_data(dev);
 	if (!phy) {
 		printf("failed to find phy driver\n");
 		return 0;
@@ -278,12 +276,14 @@ static int connector_phy_init(struct display_state *state,
 	conn_state->phy_dev = dev;
 	conn_state->phy_node = dev->node;
 
-	if (!phy->funcs || !phy->funcs->init ||
-	    phy->funcs->init(state)) {
+	ret = rockchip_phy_init(phy);
+	if (ret) {
 		printf("failed to init phy driver\n");
-		return -EINVAL;
+		return ret;
 	}
+
 	conn_state->phy = phy;
+
 	return 0;
 }
 
diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index ce8f45169c..d30eb50c4b 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -106,12 +106,11 @@ struct connector_state {
 	struct udevice *dev;
 	const struct rockchip_connector *connector;
 	struct udevice *phy_dev;
-	const struct rockchip_phy *phy;
+	struct rockchip_phy *phy;
 	ofnode node;
 	ofnode phy_node;
 
 	void *private;
-	void *phy_private;
 
 	struct drm_display_mode mode;
 	struct overscan overscan;
diff --git a/drivers/video/drm/rockchip_drm_tve.c b/drivers/video/drm/rockchip_drm_tve.c
index 79fd98fa11..91748be98b 100644
--- a/drivers/video/drm/rockchip_drm_tve.c
+++ b/drivers/video/drm/rockchip_drm_tve.c
@@ -403,7 +403,7 @@ static int rockchip_drm_tve_enable(struct display_state *state)
 
 #ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY
 	/* set inno hdmi phy clk. */
-	rockchip_phy_set_pll(state, 27000000);
+	rockchip_phy_set_pll(conn_state->phy, 27000000);
 #endif
 	if (mode->vdisplay == 576)
 		tve_type = TVOUT_CVBS_PAL;
diff --git a/drivers/video/drm/rockchip_phy.c b/drivers/video/drm/rockchip_phy.c
index 960d561c70..9609f8c2ac 100644
--- a/drivers/video/drm/rockchip_phy.c
+++ b/drivers/video/drm/rockchip_phy.c
@@ -4,149 +4,72 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
-#include <config.h>
 #include <common.h>
-#include <dm/device.h>
-#include <errno.h>
-#include <asm/unaligned.h>
-#include <linux/list.h>
-
-#include "rockchip_display.h"
-#include "rockchip_crtc.h"
-#include "rockchip_connector.h"
 #include "rockchip_phy.h"
 
-#ifdef CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI
-static const struct rockchip_phy rockchip_inno_mipi_dphy_data = {
-	 .funcs = &inno_mipi_dphy_funcs,
-};
-#endif
-
-#ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY
-static const struct rockchip_phy rockchip_inno_hdmi_phy_data = {
-	 .funcs = &inno_hdmi_phy_funcs,
-};
-#endif
-
-static const struct udevice_id rockchip_phy_ids[] = {
-#ifdef CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI
-	{
-		.compatible = "rockchip,px30-mipi-dphy",
-		.data = (ulong)&rockchip_inno_mipi_dphy_data,
-	},
-	{
-		.compatible = "rockchip,rk3128-mipi-dphy",
-		.data = (ulong)&rockchip_inno_mipi_dphy_data,
-	},
-	{
-		.compatible = "rockchip,rk3366-mipi-dphy",
-		.data = (ulong)&rockchip_inno_mipi_dphy_data,
-	},
-	{
-		.compatible = "rockchip,rk3368-mipi-dphy",
-		.data = (ulong)&rockchip_inno_mipi_dphy_data,
-	},
-	{
-		.compatible = "rockchip,rv1108-mipi-dphy",
-		.data = (ulong)&rockchip_inno_mipi_dphy_data,
-	},
-#endif
-#ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY
-	{
-	 .compatible = "rockchip,rk3328-hdmi-phy",
-	 .data = (ulong)&rockchip_inno_hdmi_phy_data,
-	},
-	{
-	 .compatible = "rockchip,rk3228-hdmi-phy",
-	 .data = (ulong)&rockchip_inno_hdmi_phy_data,
-	},
-
-#endif
-	{}
-};
-
-static int rockchip_phy_probe(struct udevice *dev)
+int rockchip_phy_init(struct rockchip_phy *phy)
 {
-	return 0;
-}
+	if (!phy)
+		return -ENODEV;
+
+	if (phy->funcs || phy->funcs->init)
+		return phy->funcs->init(phy);
 
-static int rockchip_phy_bind(struct udevice *dev)
-{
 	return 0;
 }
 
-U_BOOT_DRIVER(rockchip_phy) = {
-	.name = "rockchip_phy",
-	.id = UCLASS_PHY,
-	.of_match = rockchip_phy_ids,
-	.bind	= rockchip_phy_bind,
-	.probe	= rockchip_phy_probe,
-};
-
-int rockchip_phy_power_on(struct display_state *state)
+int rockchip_phy_power_on(struct rockchip_phy *phy)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	const struct rockchip_phy *phy = conn_state->phy;
-
-	if (!phy || !phy->funcs || !phy->funcs->power_on) {
-		printf("%s: failed to find phy power on funcs\n", __func__);
+	if (!phy)
 		return -ENODEV;
-	}
 
-	return phy->funcs->power_on(state);
+	if (phy->funcs || phy->funcs->power_on)
+		return phy->funcs->power_on(phy);
+
+	return 0;
 }
 
-int rockchip_phy_power_off(struct display_state *state)
+int rockchip_phy_power_off(struct rockchip_phy *phy)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	const struct rockchip_phy *phy = conn_state->phy;
-
-	if (!phy || !phy->funcs || !phy->funcs->power_off) {
-		printf("%s: failed to find phy power_off funcs\n", __func__);
+	if (!phy)
 		return -ENODEV;
-	}
 
-	return phy->funcs->power_off(state);
+	if (phy->funcs && phy->funcs->power_off)
+		return phy->funcs->power_off(phy);
+
+	return 0;
 }
 
-unsigned long rockchip_phy_set_pll(struct display_state *state,
+unsigned long rockchip_phy_set_pll(struct rockchip_phy *phy,
 				   unsigned long rate)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	const struct rockchip_phy *phy = conn_state->phy;
-
-	if (!phy || !phy->funcs || !phy->funcs->set_pll) {
-		printf("%s: failed to find phy set_pll funcs\n", __func__);
+	if (!phy)
 		return -ENODEV;
-	}
 
-	return phy->funcs->set_pll(state, rate);
+	if (phy->funcs && phy->funcs->set_pll)
+		return phy->funcs->set_pll(phy, rate);
+
+	return 0;
 }
 
-void rockchip_phy_set_bus_width(struct display_state *state, u32 bus_width)
+int rockchip_phy_set_bus_width(struct rockchip_phy *phy, u32 bus_width)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	const struct rockchip_phy *phy =
-		(struct rockchip_phy *)conn_state->phy;
+	if (!phy)
+		return -ENODEV;
 
-	if (!phy || !phy->funcs || !phy->funcs->set_bus_width) {
-		debug("%s: failed to find phy set_bus_width funcs\n", __func__);
-		return;
-	}
+	if (phy->funcs && phy->funcs->set_bus_width)
+		return phy->funcs->set_bus_width(phy, bus_width);
 
-	return phy->funcs->set_bus_width(state, bus_width);
+	return 0;
 }
 
-long rockchip_phy_round_rate(struct display_state *state, unsigned long rate)
+long rockchip_phy_round_rate(struct rockchip_phy *phy, unsigned long rate)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	const struct rockchip_phy *phy =
-		(struct rockchip_phy *)conn_state->phy;
-
-	if (!phy || !phy->funcs || !phy->funcs->round_rate) {
-		debug("%s: failed to find phy round_rate funcs\n", __func__);
+	if (!phy)
 		return -ENODEV;
-	}
 
-	return phy->funcs->round_rate(state, rate);
+	if (phy->funcs && phy->funcs->round_rate)
+		return phy->funcs->round_rate(phy, rate);
+
+	return 0;
 }
diff --git a/drivers/video/drm/rockchip_phy.h b/drivers/video/drm/rockchip_phy.h
index 4fed5a0cc9..ae0f9d49f4 100644
--- a/drivers/video/drm/rockchip_phy.h
+++ b/drivers/video/drm/rockchip_phy.h
@@ -7,34 +7,29 @@
 #ifndef _ROCKCHIP_PHY_H_
 #define _ROCKCHIP_PHY_H_
 
+struct rockchip_phy;
+
 struct rockchip_phy_funcs {
-	int (*init)(struct display_state *state);
-	int (*power_on)(struct display_state *state);
-	int (*power_off)(struct display_state *state);
-	unsigned long (*set_pll)(struct display_state *state,
-				 unsigned long rate);
-	void (*set_bus_width)(struct display_state *state, u32 bus_width);
-	long (*round_rate)(struct display_state *state, unsigned long rate);
+	int (*init)(struct rockchip_phy *phy);
+	int (*power_on)(struct rockchip_phy *phy);
+	int (*power_off)(struct rockchip_phy *phy);
+	unsigned long (*set_pll)(struct rockchip_phy *phy, unsigned long rate);
+	int (*set_bus_width)(struct rockchip_phy *phy, u32 bus_width);
+	long (*round_rate)(struct rockchip_phy *phy, unsigned long rate);
 };
 
 struct rockchip_phy {
+	struct udevice *dev;
 	const struct rockchip_phy_funcs *funcs;
 	const void *data;
 };
 
-const struct rockchip_phy *
-rockchip_get_phy(const void *blob, int phy_node);
-int rockchip_phy_power_off(struct display_state *state);
-int rockchip_phy_power_on(struct display_state *state);
-unsigned long rockchip_phy_set_pll(struct display_state *state,
+int rockchip_phy_init(struct rockchip_phy *phy);
+int rockchip_phy_power_off(struct rockchip_phy *phy);
+int rockchip_phy_power_on(struct rockchip_phy *phy);
+unsigned long rockchip_phy_set_pll(struct rockchip_phy *phy,
 				   unsigned long rate);
-void rockchip_phy_set_bus_width(struct display_state *state, u32 bus_width);
-long rockchip_phy_round_rate(struct display_state *state, unsigned long rate);
+int rockchip_phy_set_bus_width(struct rockchip_phy *phy, u32 bus_width);
+long rockchip_phy_round_rate(struct rockchip_phy *phy, unsigned long rate);
 
-#ifdef CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI
-extern const struct rockchip_phy_funcs inno_mipi_dphy_funcs;
-#endif
-#ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY
-extern const struct rockchip_phy_funcs inno_hdmi_phy_funcs;
-#endif
 #endif

commit 4e78a5d4d8d397aa44fc855b7d764aef682fa69d
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Tue Aug 14 14:29:21 2018 +0800

    drivers: rknand: zftl: support spectek L84C/L84D/L05B NAND FLASH
    
    1. support spectek L84C/L84D/L05B NAND FLASH
    2. add vendor read and write api
    3. set ftl version v1.14
    
    Change-Id: I483a451acdbdc3b3bfde79dd0ea8689a2b7351ee
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/drivers/rknand/rk_zftl_arm_v8.S b/drivers/rknand/rk_zftl_arm_v8.S
index ff7c3447d4..125ba6d30c 100644
--- a/drivers/rknand/rk_zftl_arm_v8.S
+++ b/drivers/rknand/rk_zftl_arm_v8.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2018-07-18
+ * date: 2018-09-08
  */
 	.arch armv8-a
 	.file	"rk_zftl_arm_v8.S"
@@ -1146,7 +1146,7 @@ flash_wait_device_ready_raw:
 	bhi	.L254
 	adrp	x1, .LANCHOR28
 	adrp	x0, .LC0
-	mov	w2, 602
+	mov	w2, 606
 	add	x1, x1, :lo12:.LANCHOR28
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -1562,7 +1562,7 @@ flash_start_page_read:
 	bhi	.L337
 	adrp	x1, .LANCHOR36
 	adrp	x0, .LC0
-	mov	w2, 744
+	mov	w2, 748
 	add	x1, x1, :lo12:.LANCHOR36
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -1637,7 +1637,7 @@ flash_erase_duplane_block:
 	bhi	.L346
 	adrp	x1, .LANCHOR37
 	adrp	x0, .LC0
-	mov	w2, 513
+	mov	w2, 517
 	add	x1, x1, :lo12:.LANCHOR37
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -1732,37 +1732,38 @@ flash_erase_duplane_block:
 flash_erase_block_en:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	and	w19, w0, 255
+	stp	x23, x24, [sp, 48]
+	and	w23, w0, 255
 	adrp	x0, .LANCHOR18
 	stp	x21, x22, [sp, 32]
-	str	x25, [sp, 64]
+	stp	x25, x26, [sp, 64]
 	mov	w21, w2
 	ldrb	w0, [x0, #:lo12:.LANCHOR18]
+	and	w26, w1, 255
+	stp	x19, x20, [sp, 16]
 	and	w22, w2, 2097151
-	stp	x23, x24, [sp, 48]
-	and	w25, w1, 255
-	cmp	w0, w19
+	cmp	w0, w23
 	bhi	.L361
 	adrp	x1, .LANCHOR39
 	adrp	x0, .LC0
-	mov	w2, 558
+	mov	w2, 562
 	add	x1, x1, :lo12:.LANCHOR39
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 .L361:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
-	ldrb	w20, [x0, w19, sxtw]
+	ldrb	w20, [x0, w23, sxtw]
 	adrp	x0, .LANCHOR13
-	ldr	x24, [x0, #:lo12:.LANCHOR13]
+	ldr	x25, [x0, #:lo12:.LANCHOR13]
 	adrp	x0, .LANCHOR14
 	and	x19, x20, 255
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	add	x23, x19, 8
-	add	x23, x24, x23, lsl 8
+	add	x24, x19, 8
+	add	x24, x25, x24, lsl 8
 	tbz	x0, 4, .L362
 	adrp	x0, .LC33
+	mov	w3, w26
 	mov	w2, w21
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC33
@@ -1772,10 +1773,10 @@ flash_erase_block_en:
 	mov	w0, w20
 	bl	nandc_cs
 	mov	w0, w20
-	cbnz	w25, .L363
+	cbnz	w26, .L363
 	bl	zftl_flash_enter_slc_mode
 .L364:
-	add	x0, x24, x19, lsl 8
+	add	x0, x25, x19, lsl 8
 	mov	w1, 96
 	str	w1, [x0, 2056]
 	and	w1, w21, 255
@@ -1787,7 +1788,7 @@ flash_erase_block_en:
 	mov	w1, 208
 	str	w1, [x0, 2056]
 	bl	nandc_wait_flash_ready
-	mov	x0, x23
+	mov	x0, x24
 	bl	flash_read_status
 	mov	w19, w0
 	bl	nandc_de_cs.constprop.29
@@ -1795,18 +1796,19 @@ flash_erase_block_en:
 	ands	w19, w19, w0
 	beq	.L365
 	adrp	x0, .LANCHOR2
-	mov	w2, w19
-	ldrh	w1, [x0, #:lo12:.LANCHOR2]
+	mov	w3, w19
+	mov	w1, w23
+	ldrh	w2, [x0, #:lo12:.LANCHOR2]
 	adrp	x0, .LC34
 	add	x0, x0, :lo12:.LC34
-	udiv	w1, w21, w1
+	udiv	w2, w21, w2
 	bl	printf
 .L365:
 	mov	w0, w19
-	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
 .L363:
@@ -1895,7 +1897,7 @@ flash_start_plane_read:
 	bhi	.L381
 	adrp	x1, .LANCHOR40
 	adrp	x0, .LC0
-	mov	w2, 839
+	mov	w2, 843
 	add	x1, x1, :lo12:.LANCHOR40
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -5671,21 +5673,27 @@ ftl_vpn_decrement:
 	cmp	w19, w0
 	beq	.L1006
 	adrp	x0, .LANCHOR9
-	ubfiz	x1, x19, 1, 16
-	ldr	x2, [x0, #:lo12:.LANCHOR9]
-	ldrh	w0, [x2, x1]
+	uxtw	x1, w19
+	lsl	x2, x1, 1
+	ldr	x3, [x0, #:lo12:.LANCHOR9]
+	ldrh	w0, [x3, x2]
 	cbnz	w0, .L1007
-	adrp	x0, .LC59
+	adrp	x0, .LANCHOR7
 	mov	w2, 0
-	mov	w1, w19
+	ldr	x0, [x0, #:lo12:.LANCHOR7]
+	add	x1, x0, x1, lsl 2
+	adrp	x0, .LC59
 	add	x0, x0, :lo12:.LC59
+	ldrb	w3, [x1, 2]
+	mov	w1, w19
+	ubfx	x3, x3, 5, 3
 	bl	printf
 .L1012:
 	mov	w0, 0
 	b	.L1005
 .L1007:
 	sub	w0, w0, #1
-	strh	w0, [x2, x1]
+	strh	w0, [x3, x2]
 .L1006:
 	adrp	x20, .LANCHOR63
 	ldrh	w0, [x20, #:lo12:.LANCHOR63]
@@ -7022,34 +7030,30 @@ zftl_read_flash_info:
 	adrp	x1, .LANCHOR34
 	add	x1, x1, :lo12:.LANCHOR34
 	adrp	x0, .LANCHOR2
+	adrp	x3, .LANCHOR58
+	strb	wzr, [x19, 10]
 	mov	w4, 1
-	ldrb	w3, [x1, 9]
+	ldrb	w2, [x1, 9]
 	ldrh	w0, [x0, #:lo12:.LANCHOR2]
-	mul	w0, w3, w0
-	and	w2, w0, 65535
-	strb	w2, [x19, 4]
-	ubfx	x0, x2, 8, 8
+	mul	w0, w2, w0
+	strb	w0, [x19, 4]
+	ubfx	x0, x0, 8, 8
 	strb	w0, [x19, 5]
 	adrp	x0, .LANCHOR43
 	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	strb	w0, [x19, 7]
-	ldrb	w0, [x1, 13]
-	mul	w0, w0, w2
-	ldrh	w2, [x1, 14]
-	strb	wzr, [x19, 10]
-	mul	w0, w0, w2
-	ldrb	w2, [x1, 8]
-	strb	w3, [x19, 6]
-	mul	w0, w0, w2
-	strb	w0, [x19]
-	ubfx	x2, x0, 8, 8
-	strb	w2, [x19, 1]
-	ubfx	x2, x0, 16, 8
-	lsr	w0, w0, 24
-	strb	w2, [x19, 2]
-	adrp	x2, .LANCHOR29
+	add	x0, x3, :lo12:.LANCHOR58
+	ldrb	w3, [x3, #:lo12:.LANCHOR58]
+	strb	w3, [x19]
+	ldrb	w3, [x0, 1]
+	strb	w3, [x19, 1]
+	ldrb	w3, [x0, 2]
+	ldrb	w0, [x0, 3]
+	strb	w3, [x19, 2]
 	strb	w0, [x19, 3]
 	mov	w0, 32
+	strb	w2, [x19, 6]
+	adrp	x2, .LANCHOR29
 	strb	w0, [x19, 8]
 	add	x2, x2, :lo12:.LANCHOR29
 	ldrb	w0, [x1, 7]
@@ -9824,9 +9828,9 @@ micron_read_retrial:
 	ldr	x0, [x29, 96]
 	ldr	w0, [x0]
 	tbz	x0, 12, .L1641
+	mov	w4, w7
 	str	w7, [x29, 112]
-	mov	w4, w28
-	mov	w3, w21
+	mov	w3, w28
 	mov	w2, w22
 	mov	w1, w21
 	adrp	x0, .LC103
@@ -10368,75 +10372,78 @@ hynix_read_retrial:
 	.type	flash_ddr_tuning_read, %function
 flash_ddr_tuning_read:
 	stp	x29, x30, [sp, -144]!
-	and	w0, w0, 255
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	mov	w20, w1
+	and	w20, w0, 255
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LC109
+	mov	w22, w1
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR43
+	mov	x23, x2
 	stp	x25, x26, [sp, 64]
-	add	x21, x21, :lo12:.LC109
+	mov	x24, x3
 	stp	x27, x28, [sp, 80]
-	mov	x26, x3
-	str	w4, [x29, 120]
-	add	x22, x22, :lo12:.LANCHOR43
-	str	x2, [x29, 128]
-	mov	w28, 0
-	str	w0, [x29, 136]
+	adrp	x25, .LANCHOR43
+	str	w4, [x29, 136]
 	bl	nandc_get_ddr_para
-	mov	w23, 0
-	str	w0, [x29, 124]
-	mov	w24, 0
+	add	x25, x25, :lo12:.LANCHOR43
+	str	w0, [x29, 132]
 	adrp	x0, .LANCHOR14
-	mov	w27, 1024
 	add	x0, x0, :lo12:.LANCHOR14
-	mov	w25, 6
-	mov	w19, -1
+	mov	w28, 0
+	str	x0, [x29, 120]
+	mov	w26, 0
+	adrp	x0, .LC109
+	mov	w27, 0
+	add	x0, x0, :lo12:.LC109
+	mov	w19, 1024
+	mov	w21, -1
+	mov	w7, 6
 	str	wzr, [x29, 140]
 	str	x0, [x29, 112]
 .L1766:
-	mov	w0, w25
+	mov	w0, w7
+	str	w7, [x29, 128]
 	bl	nandc_set_ddr_para
-	ldr	w4, [x29, 120]
-	mov	x3, x26
-	ldrb	w0, [x29, 136]
-	mov	w1, w20
-	ldr	x2, [x29, 128]
+	ldr	w4, [x29, 136]
+	mov	x3, x24
+	mov	x2, x23
+	mov	w1, w22
+	mov	w0, w20
 	bl	flash_read_page
 	mov	w4, w0
-	ldr	x0, [x29, 112]
+	ldr	x0, [x29, 120]
+	ldr	w7, [x29, 128]
 	ldr	w0, [x0]
 	tbz	x0, 4, .L1761
+	ldr	x0, [x29, 112]
 	mov	w3, w4
+	mov	w1, w7
 	str	w4, [x29, 108]
-	mov	w2, w20
-	mov	w1, w25
-	mov	x0, x21
+	str	w7, [x29, 128]
+	mov	w2, w22
 	bl	printf
 	ldr	w4, [x29, 108]
+	ldr	w7, [x29, 128]
 .L1761:
-	add	w0, w27, 1
+	add	w0, w19, 1
 	cmp	w4, w0
 	bhi	.L1762
 	adrp	x0, .LANCHOR151
-	ldr	x0, [x0, #:lo12:.LANCHOR151]
-	str	x0, [x29, 128]
+	ldr	x23, [x0, #:lo12:.LANCHOR151]
 	adrp	x0, .LANCHOR153
-	ldr	x26, [x0, #:lo12:.LANCHOR153]
-	ldrb	w0, [x22]
+	ldr	x24, [x0, #:lo12:.LANCHOR153]
+	ldrb	w0, [x25]
 	cmp	w4, w0, lsr 2
-	bcs	.L1771
-	add	w24, w24, 1
-	cmp	w24, 7
-	bls	.L1771
-	sub	w28, w25, w24
-	mov	w27, w4
-	mov	w19, 0
+	bcs	.L1772
+	add	w27, w27, 1
+	cmp	w27, 7
+	bls	.L1772
+	sub	w28, w7, w27
+	mov	w19, w4
+	mov	w21, 0
 .L1764:
 	ldr	w0, [x29, 140]
-	cmp	w24, w23
+	cmp	w27, w26
 	csel	w28, w28, w0, cs
 .L1765:
 	cbz	w28, .L1767
@@ -10444,24 +10451,60 @@ flash_ddr_tuning_read:
 	mov	w1, 3
 	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	udiv	w0, w0, w1
-	cmp	w0, w27
+	cmp	w0, w19
 	bls	.L1767
 	mov	w1, w28
 	adrp	x0, .LC110
 	add	x0, x0, :lo12:.LC110
 	bl	printf
 	mov	w0, w28
-.L1781:
+.L1783:
 	bl	nandc_set_ddr_para
-	cbz	w19, .L1760
-	ldr	w1, [x29, 136]
+	cbz	w21, .L1760
+	mov	w2, w22
+	mov	w1, w20
 	adrp	x0, .LC111
-	mov	w2, w20
 	add	x0, x0, :lo12:.LC111
-	mov	w27, w19
 	bl	printf
+	mov	w0, w20
+	bl	flash_reset
+	mov	w0, 1
+	bl	flash_set_interface_mode
+	mov	w0, 1
+	bl	nandc_set_if_mode
+	adrp	x0, .LANCHOR35
+	add	x0, x0, :lo12:.LANCHOR35
+	mov	w1, 2
+	strb	w1, [x0, w20, sxtw]
+	mov	w0, w20
+	bl	zftl_flash_enter_slc_mode
+	ldr	w4, [x29, 136]
+	mov	x3, x24
+	mov	x2, x23
+	mov	w1, w22
+	mov	w0, w20
+	bl	flash_read_page
+	mov	w19, w0
+	mov	w3, w0
+	mov	w2, w22
+	mov	w1, w20
+	adrp	x0, .LC112
+	add	x0, x0, :lo12:.LC112
+	bl	printf
+	adrp	x0, .LANCHOR43
+	ldrb	w0, [x0, #:lo12:.LANCHOR43]
+	cmp	w19, w0
+	bhi	.L1774
+	adrp	x1, .LANCHOR155
+	ldr	w0, [x1, #:lo12:.LANCHOR155]
+	add	w0, w0, 1
+	str	w0, [x1, #:lo12:.LANCHOR155]
+	cmp	w0, 100
+	bls	.L1770
+	adrp	x0, .LANCHOR20
+	strb	wzr, [x0, #:lo12:.LANCHOR20]
 .L1760:
-	mov	w0, w27
+	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -10470,28 +10513,37 @@ flash_ddr_tuning_read:
 	ldp	x29, x30, [sp], 144
 	ret
 .L1762:
-	cmp	w24, w23
-	bls	.L1772
-	sub	w0, w28, w24
+	cmp	w27, w26
+	bls	.L1773
+	sub	w0, w28, w27
 	str	w0, [x29, 140]
-	cmp	w24, 7
+	cmp	w27, 7
 	bhi	.L1765
-	mov	w23, w24
-.L1772:
-	mov	w24, 0
+	mov	w26, w27
+.L1773:
+	mov	w27, 0
 	b	.L1763
-.L1771:
-	mov	w28, w25
-	mov	w27, w4
-	mov	w19, 0
+.L1772:
+	mov	w28, w7
+	mov	w19, w4
+	mov	w21, 0
 .L1763:
-	add	w25, w25, 2
-	cmp	w25, 50
+	add	w7, w7, 2
+	cmp	w7, 50
 	bne	.L1766
 	b	.L1764
 .L1767:
-	ldrb	w0, [x29, 124]
-	b	.L1781
+	ldrb	w0, [x29, 132]
+	b	.L1783
+.L1774:
+	mov	w19, w21
+.L1770:
+	adrp	x20, .LANCHOR42
+	ldrb	w0, [x20, #:lo12:.LANCHOR42]
+	bl	flash_set_interface_mode
+	ldrb	w0, [x20, #:lo12:.LANCHOR42]
+	bl	nandc_set_if_mode
+	b	.L1760
 	.size	flash_ddr_tuning_read, .-flash_ddr_tuning_read
 	.section	.text.flash_read_page_en,"ax",@progbits
 	.align	2
@@ -10515,47 +10567,47 @@ flash_read_page_en:
 	ubfx	x26, x19, 24, 2
 	mov	x25, x0
 	cmp	w1, w21
-	bhi	.L1783
-	adrp	x1, .LANCHOR155
+	bhi	.L1785
+	adrp	x1, .LANCHOR156
 	adrp	x0, .LC0
-	mov	w2, 380
-	add	x1, x1, :lo12:.LANCHOR155
+	mov	w2, 382
+	add	x1, x1, :lo12:.LANCHOR156
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1783:
+.L1785:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w20, [x0, w21, sxtw]
 	ldrb	w0, [x25, #:lo12:.LANCHOR18]
 	cmp	w0, w21
-	bcs	.L1784
+	bcs	.L1786
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 6, .L1784
-	adrp	x0, .LC112
+	tbz	x0, 6, .L1786
+	adrp	x0, .LC113
 	mov	w3, w19
 	mov	w2, w21
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC112
+	add	x0, x0, :lo12:.LC113
 	bl	printf
-.L1784:
-	cbnz	w26, .L1785
+.L1786:
+	cbnz	w26, .L1787
 	adrp	x0, .LANCHOR0
 	adrp	x1, .LANCHOR1
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L1786
+	cbz	w0, .L1788
 	ldrb	w0, [x1, #:lo12:.LANCHOR1]
-	cbz	w0, .L1785
-.L1786:
+	cbz	w0, .L1787
+.L1788:
 	adrp	x0, .LANCHOR2
 	ldrb	w1, [x1, #:lo12:.LANCHOR1]
 	ldrh	w2, [x0, #:lo12:.LANCHOR2]
 	udiv	w0, w19, w2
 	mul	w0, w0, w2
 	sub	w19, w19, w0
-	cbz	w1, .L1787
+	cbz	w1, .L1789
 	add	w19, w0, w19, lsl 1
-.L1785:
+.L1787:
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -10564,26 +10616,26 @@ flash_read_page_en:
 	bl	flash_read_page
 	mov	w21, w0
 	cmn	w0, #1
-	bne	.L1782
+	bne	.L1784
 	adrp	x25, .LANCHOR45
 	mov	x26, x25
 	ldrb	w27, [x25, #:lo12:.LANCHOR45]
-	cbnz	w27, .L1789
-.L1792:
-	adrp	x0, .LANCHOR156
-	ldr	x5, [x0, #:lo12:.LANCHOR156]
-	cbnz	x5, .L1790
-.L1791:
+	cbnz	w27, .L1791
+.L1794:
+	adrp	x0, .LANCHOR157
+	ldr	x5, [x0, #:lo12:.LANCHOR157]
+	cbnz	x5, .L1792
+.L1793:
 	ldrb	w4, [x26, #:lo12:.LANCHOR45]
 	mov	w3, -1
 	mov	w2, w19
 	mov	w1, 0
-	adrp	x0, .LC113
-	add	x0, x0, :lo12:.LC113
+	adrp	x0, .LC114
+	add	x0, x0, :lo12:.LC114
 	bl	printf
 	adrp	x0, .LANCHOR20
 	ldrb	w0, [x0, #:lo12:.LANCHOR20]
-	cbz	w0, .L1782
+	cbz	w0, .L1784
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -10596,13 +10648,13 @@ flash_read_page_en:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	b	flash_ddr_tuning_read
-.L1787:
+.L1789:
 	adrp	x1, .LANCHOR3
 	add	x1, x1, :lo12:.LANCHOR3
 	ldrh	w19, [x1, w19, uxtw 1]
 	add	w19, w19, w0
-	b	.L1785
-.L1789:
+	b	.L1787
+.L1791:
 	strb	wzr, [x25, #:lo12:.LANCHOR45]
 	mov	w4, w24
 	mov	x3, x23
@@ -10612,10 +10664,10 @@ flash_read_page_en:
 	bl	flash_read_page
 	strb	w27, [x25, #:lo12:.LANCHOR45]
 	cmn	w0, #1
-	beq	.L1792
-.L1810:
+	beq	.L1794
+.L1812:
 	mov	w21, w0
-.L1782:
+.L1784:
 	mov	w0, w21
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -10624,7 +10676,7 @@ flash_read_page_en:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1790:
+.L1792:
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -10632,8 +10684,8 @@ flash_read_page_en:
 	mov	w0, w20
 	blr	x5
 	cmn	w0, #1
-	beq	.L1791
-	b	.L1810
+	beq	.L1793
+	b	.L1812
 	.size	flash_read_page_en, .-flash_read_page_en
 	.section	.text.flash_get_last_written_page,"ax",@progbits
 	.align	2
@@ -10663,23 +10715,23 @@ flash_get_last_written_page:
 	add	w1, w19, w26
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L1812
+	bne	.L1814
 	mov	w27, 0
 	mov	w28, 2
-.L1813:
+.L1815:
 	cmp	w27, w19
-	ble	.L1816
-.L1812:
+	ble	.L1818
+.L1814:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1817
+	tbz	x0, 12, .L1819
 	ldr	w3, [x22]
-	adrp	x0, .LC114
+	adrp	x0, .LC115
 	mov	w2, w19
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC114
+	add	x0, x0, :lo12:.LC115
 	bl	printf
-.L1817:
+.L1819:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10688,7 +10740,7 @@ flash_get_last_written_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1816:
+.L1818:
 	add	w20, w27, w19
 	mov	w4, w25
 	mov	x3, x22
@@ -10698,14 +10750,14 @@ flash_get_last_written_page:
 	add	w1, w26, w20, sxth
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L1814
+	bne	.L1816
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L1813
-.L1814:
+	b	.L1815
+.L1816:
 	add	w20, w20, 1
 	sxth	w27, w20
-	b	.L1813
+	b	.L1815
 	.size	flash_get_last_written_page, .-flash_get_last_written_page
 	.section	.text.flash_get_last_written_page_ext,"ax",@progbits
 	.align	2
@@ -10742,46 +10794,46 @@ flash_info_blk_init:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	tbz	x0, 12, .L1824
+	tbz	x0, 12, .L1826
 	ldr	x4, [x20, #:lo12:.LANCHOR26]
-	adrp	x2, .LANCHOR157
-	adrp	x0, .LC115
+	adrp	x2, .LANCHOR158
+	adrp	x0, .LC116
 	mov	w3, 2048
-	add	x2, x2, :lo12:.LANCHOR157
+	add	x2, x2, :lo12:.LANCHOR158
 	mov	w1, 49
-	add	x0, x0, :lo12:.LC115
+	add	x0, x0, :lo12:.LC116
 	bl	printf
-.L1824:
-	adrp	x21, .LANCHOR158
+.L1826:
+	adrp	x21, .LANCHOR159
 	adrp	x23, .LANCHOR2
 	mov	w24, 21321
 	add	x26, x23, :lo12:.LANCHOR2
 	mov	x22, x21
 	mov	w19, 4
 	movk	w24, 0x5359, lsl 16
-.L1827:
+.L1829:
 	ldrh	w1, [x26]
 	mov	w4, 4
-	ldr	x3, [x21, #:lo12:.LANCHOR158]
+	ldr	x3, [x21, #:lo12:.LANCHOR159]
 	mov	w0, 0
 	ldr	x2, [x20, #:lo12:.LANCHOR26]
-	add	x27, x21, :lo12:.LANCHOR158
+	add	x27, x21, :lo12:.LANCHOR159
 	add	x25, x20, :lo12:.LANCHOR26
 	mul	w1, w1, w19
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L1825
+	beq	.L1827
 	ldr	x2, [x20, #:lo12:.LANCHOR26]
 	ldr	w0, [x2]
 	cmp	w0, w24
-	beq	.L1826
-.L1825:
+	beq	.L1828
+.L1827:
 	add	w19, w19, 1
 	cmp	w19, 16
-	bne	.L1827
-.L1851:
+	bne	.L1829
+.L1853:
 	mov	w0, -1
-.L1823:
+.L1825:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -10789,16 +10841,16 @@ flash_info_blk_init:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1835:
+.L1837:
 	ldr	x0, [x25]
 	ldr	w1, [x0]
 	cmp	w1, w24
-	bne	.L1836
+	bne	.L1838
 	ldr	w19, [x0, 4]
-.L1829:
-	add	x24, x21, :lo12:.LANCHOR159
+.L1831:
+	add	x24, x21, :lo12:.LANCHOR160
 	ldrh	w0, [x23, #:lo12:.LANCHOR2]
-	ldr	x3, [x22, #:lo12:.LANCHOR158]
+	ldr	x3, [x22, #:lo12:.LANCHOR159]
 	mov	w4, 4
 	ldr	x2, [x20, #:lo12:.LANCHOR26]
 	ldrb	w1, [x24, 1]
@@ -10806,85 +10858,85 @@ flash_info_blk_init:
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L1830
+	beq	.L1832
 	ldr	x0, [x20, #:lo12:.LANCHOR26]
 	mov	w1, 21321
 	movk	w1, 0x5359, lsl 16
 	ldr	w2, [x0]
 	cmp	w2, w1
-	bne	.L1830
+	bne	.L1832
 	ldr	w1, [x0, 4]
 	cmp	w19, w1
-	bcs	.L1830
+	bcs	.L1832
 	ldrb	w1, [x0, 37]
 	ldrb	w0, [x0, 36]
-	strb	w1, [x21, #:lo12:.LANCHOR159]
+	strb	w1, [x21, #:lo12:.LANCHOR160]
 	strb	w0, [x24, 1]
-.L1830:
-	ldrb	w1, [x21, #:lo12:.LANCHOR159]
-	add	x24, x21, :lo12:.LANCHOR159
-	ldr	x3, [x22, #:lo12:.LANCHOR158]
+.L1832:
+	ldrb	w1, [x21, #:lo12:.LANCHOR160]
+	add	x24, x21, :lo12:.LANCHOR160
+	ldr	x3, [x22, #:lo12:.LANCHOR159]
 	mov	w4, 4
 	ldr	x2, [x20, #:lo12:.LANCHOR26]
 	mov	w0, 0
 	bl	flash_get_last_written_page
 	sxth	w19, w0
 	add	w0, w0, 1
-	ldrb	w21, [x21, #:lo12:.LANCHOR159]
+	ldrb	w21, [x21, #:lo12:.LANCHOR160]
 	strh	w0, [x24, 2]
 	ldrh	w0, [x23, #:lo12:.LANCHOR2]
 	mov	w23, 21321
 	movk	w23, 0x5359, lsl 16
 	madd	w21, w21, w0, w19
-.L1831:
-	tbz	w19, #31, .L1833
+.L1833:
+	tbz	w19, #31, .L1835
 	cmn	w19, #1
-	bne	.L1834
+	bne	.L1836
 	ldr	x0, [x20, #:lo12:.LANCHOR26]
 	ldr	w1, [x0]
-	adrp	x0, .LC116
-	add	x0, x0, :lo12:.LC116
+	adrp	x0, .LC117
+	add	x0, x0, :lo12:.LC117
 	bl	printf
-	b	.L1851
-.L1833:
-	ldr	x3, [x22, #:lo12:.LANCHOR158]
+	b	.L1853
+.L1835:
+	ldr	x3, [x22, #:lo12:.LANCHOR159]
 	mov	w4, 4
 	ldr	x2, [x20, #:lo12:.LANCHOR26]
 	mov	w1, w21
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L1832
+	beq	.L1834
 	ldr	x0, [x20, #:lo12:.LANCHOR26]
 	ldr	w0, [x0]
 	cmp	w0, w23
-	bne	.L1832
-.L1834:
+	bne	.L1834
+.L1836:
 	mov	w0, 0
-	b	.L1823
-.L1832:
+	b	.L1825
+.L1834:
 	sub	w19, w19, #1
 	sub	w21, w21, #1
 	sxth	w19, w19
-	b	.L1831
-.L1826:
-	adrp	x21, .LANCHOR159
-	add	x1, x21, :lo12:.LANCHOR159
+	b	.L1833
+.L1828:
+	adrp	x21, .LANCHOR160
+	add	x1, x21, :lo12:.LANCHOR160
 	ldrb	w3, [x2, 37]
 	mov	w4, 4
 	ldrb	w0, [x2, 36]
 	strb	w3, [x1, 1]
 	ldrh	w1, [x26]
 	ldr	x3, [x27]
-	strb	w0, [x21, #:lo12:.LANCHOR159]
+	strb	w0, [x21, #:lo12:.LANCHOR160]
 	mul	w1, w1, w0
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	bne	.L1835
-.L1836:
+	bne	.L1837
+.L1838:
 	mov	w19, 0
-	b	.L1829
+	b	.L1831
 	.size	flash_info_blk_init, .-flash_info_blk_init
 	.section	.text.flash_ddr_para_scan,"ax",@progbits
 	.align	2
@@ -10904,34 +10956,34 @@ flash_ddr_para_scan:
 	mov	w23, w1
 	str	x25, [sp, 64]
 	strb	w21, [x19, #:lo12:.LANCHOR20]
-	adrp	x24, .LANCHOR161
+	adrp	x24, .LANCHOR162
 	bl	flash_set_interface_mode
-	adrp	x25, .LANCHOR160
+	adrp	x25, .LANCHOR161
 	ldrb	w0, [x20, #:lo12:.LANCHOR42]
 	bl	nandc_set_if_mode
-	ldr	x3, [x25, #:lo12:.LANCHOR160]
+	ldr	x3, [x25, #:lo12:.LANCHOR161]
 	mov	w4, 4
-	ldr	x2, [x24, #:lo12:.LANCHOR161]
+	ldr	x2, [x24, #:lo12:.LANCHOR162]
 	mov	w1, w23
 	mov	w0, w22
 	bl	flash_ddr_tuning_read
-	ldr	x3, [x25, #:lo12:.LANCHOR160]
+	ldr	x3, [x25, #:lo12:.LANCHOR161]
 	mov	w4, 4
-	ldr	x2, [x24, #:lo12:.LANCHOR161]
+	ldr	x2, [x24, #:lo12:.LANCHOR162]
 	mov	w1, w23
 	mov	w0, w22
 	bl	flash_read_page
 	cmn	w0, #1
 	mov	x0, x19
-	bne	.L1853
+	bne	.L1855
 	ldrb	w1, [x20, #:lo12:.LANCHOR42]
-	tbz	x1, 0, .L1853
+	tbz	x1, 0, .L1855
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, w21
 	bl	nandc_set_if_mode
 	strb	wzr, [x19, #:lo12:.LANCHOR20]
-.L1854:
+.L1856:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -10939,10 +10991,10 @@ flash_ddr_para_scan:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1853:
+.L1855:
 	mov	w1, 1
 	strb	w1, [x0, #:lo12:.LANCHOR20]
-	b	.L1854
+	b	.L1856
 	.size	flash_ddr_para_scan, .-flash_ddr_para_scan
 	.section	.text.flash_complete_plane_page_read,"ax",@progbits
 	.align	2
@@ -10962,14 +11014,14 @@ flash_complete_plane_page_read:
 	ldrb	w0, [x0, #:lo12:.LANCHOR18]
 	mov	x22, x2
 	cmp	w0, w23
-	bhi	.L1860
-	adrp	x1, .LANCHOR162
+	bhi	.L1862
+	adrp	x1, .LANCHOR163
 	adrp	x0, .LC0
-	mov	w2, 785
-	add	x1, x1, :lo12:.LANCHOR162
+	mov	w2, 789
+	add	x1, x1, :lo12:.LANCHOR163
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1860:
+.L1862:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w6, [x0, w23, sxtw]
@@ -10977,11 +11029,11 @@ flash_complete_plane_page_read:
 	ldr	x4, [x0, #:lo12:.LANCHOR13]
 	mov	w0, w6
 	bl	nandc_cs
-	cbnz	w20, .L1861
+	cbnz	w20, .L1863
 	mov	w0, w19
 	bl	slc_phy_page_address_calc
 	mov	w19, w0
-.L1861:
+.L1863:
 	adrp	x0, .LANCHOR19+16
 	and	x1, x6, 255
 	and	w3, w19, 255
@@ -10990,28 +11042,28 @@ flash_complete_plane_page_read:
 	adrp	x5, .LANCHOR16
 	cmp	w0, 1
 	lsr	w0, w19, 16
-	bne	.L1862
+	bne	.L1864
 	add	x1, x4, x1, lsl 8
 	mov	w4, 6
-.L1873:
+.L1875:
 	str	w4, [x1, 2056]
 	str	wzr, [x1, 2052]
 	str	wzr, [x1, 2052]
 	str	w3, [x1, 2052]
 	str	w2, [x1, 2052]
 	str	w0, [x1, 2052]
-.L1871:
+.L1873:
 	mov	w0, 224
 	str	w0, [x1, 2056]
 	ldr	x0, [x5, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1865
-	cbz	w20, .L1865
+	bne	.L1867
+	cbz	w20, .L1867
 	add	w19, w19, w19, lsl 1
 	sub	w20, w20, #1
 	add	w0, w19, w20
-.L1872:
+.L1874:
 	bl	nandc_set_seed
 	adrp	x0, .LANCHOR34+9
 	mov	x4, x22
@@ -11028,15 +11080,15 @@ flash_complete_plane_page_read:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1862:
+.L1864:
 	ldr	x7, [x5, #:lo12:.LANCHOR16]
 	add	x1, x4, x1, lsl 8
 	ldrb	w7, [x7, 12]
 	cmp	w7, 3
-	bne	.L1864
+	bne	.L1866
 	mov	w4, 5
-	b	.L1873
-.L1864:
+	b	.L1875
+.L1866:
 	str	wzr, [x1, 2056]
 	str	wzr, [x1, 2052]
 	str	wzr, [x1, 2052]
@@ -11047,10 +11099,10 @@ flash_complete_plane_page_read:
 	str	w0, [x1, 2056]
 	str	wzr, [x1, 2052]
 	str	wzr, [x1, 2052]
-	b	.L1871
-.L1865:
+	b	.L1873
+.L1867:
 	mov	w0, w19
-	b	.L1872
+	b	.L1874
 	.size	flash_complete_plane_page_read, .-flash_complete_plane_page_read
 	.section	.text.flash_complete_page_read,"ax",@progbits
 	.align	2
@@ -11073,14 +11125,14 @@ flash_complete_page_read:
 	mov	x25, x2
 	ubfx	x21, x23, 24, 2
 	cmp	w0, w20
-	bhi	.L1875
-	adrp	x1, .LANCHOR163
+	bhi	.L1877
+	adrp	x1, .LANCHOR164
 	adrp	x0, .LC0
-	mov	w2, 907
-	add	x1, x1, :lo12:.LANCHOR163
+	mov	w2, 911
+	add	x1, x1, :lo12:.LANCHOR164
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1875:
+.L1877:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w22, [x0, w20, sxtw]
@@ -11088,11 +11140,11 @@ flash_complete_page_read:
 	ldr	x4, [x0, #:lo12:.LANCHOR13]
 	mov	w0, w22
 	bl	nandc_cs
-	cbnz	w21, .L1876
+	cbnz	w21, .L1878
 	mov	w0, w19
 	bl	slc_phy_page_address_calc
 	mov	w19, w0
-.L1876:
+.L1878:
 	ubfiz	x0, x22, 8, 8
 	mov	w1, 5
 	add	x0, x4, x0
@@ -11111,12 +11163,12 @@ flash_complete_page_read:
 	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1877
-	cbz	w21, .L1877
+	bne	.L1879
+	cbz	w21, .L1879
 	sub	w0, w21, #1
 	add	w1, w19, w19, lsl 1
 	add	w0, w0, w1
-.L1904:
+.L1906:
 	adrp	x20, .LANCHOR34
 	add	x28, x20, :lo12:.LANCHOR34
 	bl	nandc_set_seed
@@ -11127,10 +11179,10 @@ flash_complete_page_read:
 	mov	w0, w22
 	bl	nandc_xfer
 	cmn	w0, #1
-	bne	.L1879
+	bne	.L1881
 	adrp	x26, .LANCHOR45
 	ldrb	w27, [x26, #:lo12:.LANCHOR45]
-	cbz	w27, .L1880
+	cbz	w27, .L1882
 	ldrb	w4, [x28, 9]
 	mov	x3, x25
 	strb	wzr, [x26, #:lo12:.LANCHOR45]
@@ -11139,16 +11191,16 @@ flash_complete_page_read:
 	mov	w0, w22
 	bl	flash_read_page
 	strb	w27, [x26, #:lo12:.LANCHOR45]
-	cbnz	w21, .L1881
-.L1886:
+	cbnz	w21, .L1883
+.L1888:
 	adrp	x1, .LANCHOR0
 	ldrb	w1, [x1, #:lo12:.LANCHOR0]
-	cbz	w1, .L1881
+	cbz	w1, .L1883
 	adrp	x1, .LANCHOR43
 	ldrb	w1, [x1, #:lo12:.LANCHOR43]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	blt	.L1881
+	blt	.L1883
 	add	x20, x20, :lo12:.LANCHOR34
 	ldrb	w1, [x20, 19]
 	sub	w1, w1, #4
@@ -11156,7 +11208,7 @@ flash_complete_page_read:
 	cmp	w1, 3
 	mov	w1, 256
 	csel	w0, w0, w1, hi
-.L1874:
+.L1876:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -11164,31 +11216,31 @@ flash_complete_page_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1877:
+.L1879:
 	mov	w0, w19
-	b	.L1904
-.L1881:
+	b	.L1906
+.L1883:
 	cmn	w0, #1
-	bne	.L1874
+	bne	.L1876
+.L1889:
+	adrp	x0, .LANCHOR157
+	ldr	x5, [x0, #:lo12:.LANCHOR157]
+	cbnz	x5, .L1885
 .L1887:
-	adrp	x0, .LANCHOR156
-	ldr	x5, [x0, #:lo12:.LANCHOR156]
-	cbnz	x5, .L1883
-.L1885:
 	adrp	x0, .LANCHOR45
 	mov	w3, -1
 	mov	w2, w23
 	mov	w1, 0
 	ldrb	w4, [x0, #:lo12:.LANCHOR45]
-	adrp	x0, .LC117
-	add	x0, x0, :lo12:.LC117
+	adrp	x0, .LC118
+	add	x0, x0, :lo12:.LC118
 	bl	printf
 	adrp	x0, .LANCHOR20
 	ldrb	w0, [x0, #:lo12:.LANCHOR20]
-	cbnz	w0, .L1884
+	cbnz	w0, .L1886
 	mov	w0, -1
-	b	.L1874
-.L1883:
+	b	.L1876
+.L1885:
 	add	x0, x20, :lo12:.LANCHOR34
 	mov	x3, x25
 	mov	x2, x24
@@ -11197,9 +11249,9 @@ flash_complete_page_read:
 	mov	w0, w22
 	blr	x5
 	cmn	w0, #1
-	beq	.L1885
-	b	.L1874
-.L1884:
+	beq	.L1887
+	b	.L1876
+.L1886:
 	add	x20, x20, :lo12:.LANCHOR34
 	orr	w1, w19, w21, lsl 24
 	mov	x3, x25
@@ -11213,12 +11265,12 @@ flash_complete_page_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	flash_ddr_tuning_read
-.L1879:
-	cbz	w21, .L1886
-	b	.L1874
-.L1880:
-	cbnz	w21, .L1887
-	b	.L1886
+.L1881:
+	cbz	w21, .L1888
+	b	.L1876
+.L1882:
+	cbnz	w21, .L1889
+	b	.L1888
 	.size	flash_complete_page_read, .-flash_complete_page_read
 	.section	.text.queue_wait_first_req_completed,"ax",@progbits
 	.align	2
@@ -11234,11 +11286,11 @@ queue_wait_first_req_completed:
 	cmp	w0, 255
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	bne	.L1906
-.L1935:
+	bne	.L1908
+.L1937:
 	mov	w21, 0
-	b	.L1905
-.L1906:
+	b	.L1907
+.L1908:
 	adrp	x19, .LANCHOR49
 	sxtw	x20, w0
 	add	x1, x19, :lo12:.LANCHOR49
@@ -11247,44 +11299,44 @@ queue_wait_first_req_completed:
 	ldr	w24, [x1, 40]
 	sub	w3, w2, #1
 	cmp	w3, 9
-	bhi	.L1935
-	adrp	x1, .L1909
-	add	x1, x1, :lo12:.L1909
+	bhi	.L1937
+	adrp	x1, .L1911
+	add	x1, x1, :lo12:.L1911
 	ldrh	w1, [x1,w3,uxtw #1]
-	adr	x3, .Lrtx1909
+	adr	x3, .Lrtx1911
 	add	x1, x3, w1, sxth #2
 	br	x1
-.Lrtx1909:
+.Lrtx1911:
 	.section	.rodata.queue_wait_first_req_completed,"a",@progbits
 	.align	0
 	.align	2
-.L1909:
-	.2byte	(.L1908 - .Lrtx1909) / 4
-	.2byte	(.L1910 - .Lrtx1909) / 4
-	.2byte	(.L1911 - .Lrtx1909) / 4
-	.2byte	(.L1911 - .Lrtx1909) / 4
-	.2byte	(.L1911 - .Lrtx1909) / 4
-	.2byte	(.L1912 - .Lrtx1909) / 4
-	.2byte	(.L1913 - .Lrtx1909) / 4
-	.2byte	(.L1914 - .Lrtx1909) / 4
-	.2byte	(.L1911 - .Lrtx1909) / 4
-	.2byte	(.L1914 - .Lrtx1909) / 4
+.L1911:
+	.2byte	(.L1910 - .Lrtx1911) / 4
+	.2byte	(.L1912 - .Lrtx1911) / 4
+	.2byte	(.L1913 - .Lrtx1911) / 4
+	.2byte	(.L1913 - .Lrtx1911) / 4
+	.2byte	(.L1913 - .Lrtx1911) / 4
+	.2byte	(.L1914 - .Lrtx1911) / 4
+	.2byte	(.L1915 - .Lrtx1911) / 4
+	.2byte	(.L1916 - .Lrtx1911) / 4
+	.2byte	(.L1913 - .Lrtx1911) / 4
+	.2byte	(.L1916 - .Lrtx1911) / 4
 	.section	.text.queue_wait_first_req_completed
-.L1908:
+.L1910:
 	mov	w1, 64
 	mov	w0, w24
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1935
+	tbz	x0, 6, .L1937
 	add	x0, x19, :lo12:.LANCHOR49
 	add	x0, x0, x20, lsl 6
 	ldp	x1, x2, [x0, 8]
-	cbz	x2, .L1916
+	cbz	x2, .L1918
 	ldrb	w3, [x0, 56]
 	adrp	x0, .LANCHOR121
 	ldrb	w0, [x0, #:lo12:.LANCHOR121]
 	cmp	w3, w0
 	csel	x1, x1, x2, ne
-.L1916:
+.L1918:
 	add	x19, x19, :lo12:.LANCHOR49
 	mov	w0, w24
 	add	x20, x19, x20, lsl 6
@@ -11296,12 +11348,12 @@ queue_wait_first_req_completed:
 	ldrb	w0, [x20, 2]
 	orr	w0, w0, 8
 	strb	w0, [x20, 2]
-	b	.L1935
-.L1910:
+	b	.L1937
+.L1912:
 	mov	w1, 64
 	mov	w0, w24
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1935
+	tbz	x0, 6, .L1937
 	add	x0, x19, :lo12:.LANCHOR49
 	lsl	x2, x20, 6
 	add	x1, x0, x2
@@ -11309,23 +11361,23 @@ queue_wait_first_req_completed:
 	add	x0, x0, x21, lsl 6
 	ldr	x24, [x0, 8]
 	ldp	x26, x0, [x1, 8]
-	cbz	x0, .L1917
+	cbz	x0, .L1919
 	ldrb	w2, [x1, 56]
 	adrp	x1, .LANCHOR121
 	ldrb	w1, [x1, #:lo12:.LANCHOR121]
 	cmp	w2, w1
 	csel	x26, x26, x0, ne
-.L1917:
+.L1919:
 	add	x0, x19, :lo12:.LANCHOR49
 	add	x0, x0, x21, lsl 6
 	ldr	x1, [x0, 16]
-	cbz	x1, .L1918
+	cbz	x1, .L1920
 	ldrb	w2, [x0, 56]
 	adrp	x0, .LANCHOR121
 	ldrb	w0, [x0, #:lo12:.LANCHOR121]
 	cmp	w2, w0
 	csel	x24, x24, x1, ne
-.L1918:
+.L1920:
 	add	x22, x19, :lo12:.LANCHOR49
 	mov	x1, x26
 	add	x27, x22, x20, lsl 6
@@ -11340,15 +11392,15 @@ queue_wait_first_req_completed:
 	bl	flash_complete_plane_page_read
 	mov	w25, w0
 	cmn	w23, #1
-	beq	.L1919
+	beq	.L1921
 	ldr	w0, [x27, 36]
 	cmn	w0, #1
-	beq	.L1920
+	beq	.L1922
 	ldr	x1, [x27, 24]
 	ldr	w1, [x1, 4]
 	cmp	w0, w1
-	beq	.L1920
-.L1919:
+	beq	.L1922
+.L1921:
 	add	x22, x19, :lo12:.LANCHOR49
 	adrp	x2, .LANCHOR121
 	add	x22, x22, x20, lsl 6
@@ -11362,36 +11414,36 @@ queue_wait_first_req_completed:
 	mov	w23, w0
 	ldr	w2, [x22, 36]
 	cmn	w2, #1
-	beq	.L1921
+	beq	.L1923
 	ldr	x0, [x22, 24]
 	ldr	w4, [x0, 4]
 	cmp	w2, w4
-	beq	.L1921
+	beq	.L1923
 	adrp	x1, .LANCHOR14
 	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 6, .L1921
+	tbz	x1, 6, .L1923
 	ldr	w3, [x0]
-	adrp	x0, .LC118
+	adrp	x0, .LC119
 	ldr	w1, [x22, 40]
-	add	x0, x0, :lo12:.LC118
+	add	x0, x0, :lo12:.LC119
 	bl	printf
-.L1921:
+.L1923:
 	add	x0, x19, :lo12:.LANCHOR49
 	add	x0, x0, x20, lsl 6
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L1920
+	beq	.L1922
 	ldr	x0, [x0, 24]
 	ldr	w0, [x0, 4]
 	cmp	w1, w0
-	beq	.L1920
-	adrp	x1, .LANCHOR164
+	beq	.L1922
+	adrp	x1, .LANCHOR165
 	adrp	x0, .LC0
 	mov	w2, 338
-	add	x1, x1, :lo12:.LANCHOR164
+	add	x1, x1, :lo12:.LANCHOR165
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1920:
+.L1922:
 	add	x0, x19, :lo12:.LANCHOR49
 	mov	w1, 12
 	add	x20, x0, x20, lsl 6
@@ -11401,16 +11453,16 @@ queue_wait_first_req_completed:
 	str	w23, [x20, 52]
 	orr	w1, w1, 8
 	strb	w1, [x20, 2]
-	beq	.L1922
+	beq	.L1924
 	add	x0, x0, x21, lsl 6
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L1924
+	beq	.L1926
 	ldr	x0, [x0, 24]
 	ldr	w0, [x0, 4]
 	cmp	w1, w0
-	beq	.L1924
-.L1922:
+	beq	.L1926
+.L1924:
 	add	x20, x19, :lo12:.LANCHOR49
 	adrp	x2, .LANCHOR121
 	add	x20, x20, x21, lsl 6
@@ -11423,36 +11475,36 @@ queue_wait_first_req_completed:
 	bl	flash_read_page_en
 	ldr	w2, [x20, 36]
 	cmn	w2, #1
-	beq	.L1926
+	beq	.L1928
 	ldr	x0, [x20, 24]
 	ldr	w4, [x0, 4]
 	cmp	w2, w4
-	beq	.L1926
+	beq	.L1928
 	adrp	x1, .LANCHOR14
 	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 6, .L1926
+	tbz	x1, 6, .L1928
 	ldr	w3, [x0]
-	adrp	x0, .LC118
+	adrp	x0, .LC119
 	ldr	w1, [x20, 40]
-	add	x0, x0, :lo12:.LC118
+	add	x0, x0, :lo12:.LC119
 	bl	printf
-.L1926:
+.L1928:
 	add	x0, x19, :lo12:.LANCHOR49
 	add	x0, x0, x21, lsl 6
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L1924
+	beq	.L1926
 	ldr	x0, [x0, 24]
 	ldr	w0, [x0, 4]
 	cmp	w1, w0
-	beq	.L1924
-	adrp	x1, .LANCHOR164
+	beq	.L1926
+	adrp	x1, .LANCHOR165
 	adrp	x0, .LC0
 	mov	w2, 353
-	add	x1, x1, :lo12:.LANCHOR164
+	add	x1, x1, :lo12:.LANCHOR165
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1924:
+.L1926:
 	add	x19, x19, :lo12:.LANCHOR49
 	mov	w0, 12
 	add	x21, x19, x21, lsl 6
@@ -11461,32 +11513,32 @@ queue_wait_first_req_completed:
 	str	w23, [x21, 52]
 	orr	w0, w0, 8
 	strb	w0, [x21, 2]
-	b	.L1935
-.L1911:
+	b	.L1937
+.L1913:
 	mov	w1, 64
 	mov	w0, w24
 	bl	flash_wait_device_ready
 	mov	w21, w0
-	tbz	x21, 6, .L1935
+	tbz	x21, 6, .L1937
 	add	x19, x19, :lo12:.LANCHOR49
 	mov	w0, 5
 	add	x20, x19, x20, lsl 6
 	tst	w21, w0
-	beq	.L1934
+	beq	.L1936
 	ldrb	w1, [x20, 1]
 	mov	w0, 11
 	ldr	w3, [x20, 40]
 	mov	w4, 11
 	strb	w0, [x20, 58]
 	mov	w2, w21
-	adrp	x0, .LC119
-	add	x0, x0, :lo12:.LC119
+	adrp	x0, .LC120
+	add	x0, x0, :lo12:.LC120
 	bl	printf
-.L1995:
+.L1997:
 	mov	w0, -1
 	str	w0, [x20, 52]
-	b	.L1905
-.L1914:
+	b	.L1907
+.L1916:
 	cmp	w2, 10
 	add	x21, x19, :lo12:.LANCHOR49
 	ubfiz	x0, x0, 6, 8
@@ -11496,46 +11548,46 @@ queue_wait_first_req_completed:
 	csel	w2, w2, w1, eq
 	ubfx	x3, x24, 21, 3
 	mov	x22, x21
-.L1929:
+.L1931:
 	ldrb	w1, [x0]
 	cmp	w1, 255
-	bne	.L1933
+	bne	.L1935
 	mov	w21, -1
-	b	.L1905
-.L1933:
+	b	.L1907
+.L1935:
 	sxtw	x23, w1
 	ubfiz	x0, x1, 6, 8
 	add	x1, x22, x23, lsl 6
 	add	x0, x22, x0
 	ldrb	w4, [x1, 58]
 	cmp	w4, w2
-	bne	.L1929
+	bne	.L1931
 	ldr	w1, [x1, 40]
 	ubfx	x1, x1, 21, 3
 	cmp	w3, w1
-	bne	.L1929
+	bne	.L1931
 	mov	w0, w24
 	mov	w1, 64
 	bl	flash_wait_device_ready
 	mov	w24, w0
 	and	w21, w0, 64
-	tbz	x24, 6, .L1931
+	tbz	x24, 6, .L1933
 	add	x22, x22, x20, lsl 6
 	ands	w21, w0, 15
-	beq	.L1932
+	beq	.L1934
 	ldrb	w1, [x22, 1]
 	mov	w2, w0
 	ldr	w3, [x22, 40]
 	mov	w4, 11
-	adrp	x0, .LC120
-	add	x0, x0, :lo12:.LC120
+	adrp	x0, .LC121
+	add	x0, x0, :lo12:.LC121
 	mov	w21, w24
 	bl	printf
 	mov	w0, 11
 	strb	w0, [x22, 58]
 	mov	w0, -1
 	str	w0, [x22, 52]
-.L1931:
+.L1933:
 	add	x1, x19, :lo12:.LANCHOR49
 	add	x20, x1, x20, lsl 6
 	add	x1, x1, x23, lsl 6
@@ -11543,7 +11595,7 @@ queue_wait_first_req_completed:
 	strb	w0, [x1, 58]
 	ldr	w0, [x20, 52]
 	str	w0, [x1, 52]
-.L1905:
+.L1907:
 	mov	w0, w21
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -11552,40 +11604,40 @@ queue_wait_first_req_completed:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1932:
+.L1934:
 	mov	w0, 12
 	str	wzr, [x22, 52]
 	strb	w0, [x22, 58]
-	b	.L1931
-.L1912:
+	b	.L1933
+.L1914:
 	mov	w1, 32
 	mov	w0, w24
 	bl	flash_wait_device_ready
 	mov	w21, w0
-	tbz	x21, 5, .L1935
+	tbz	x21, 5, .L1937
 	add	x19, x19, :lo12:.LANCHOR49
 	tst	x21, 15
 	add	x20, x19, x20, lsl 6
-	beq	.L1934
+	beq	.L1936
 	mov	w0, 11
 	strb	w0, [x20, 58]
-	b	.L1995
-.L1934:
+	b	.L1997
+.L1936:
 	mov	w0, 12
 	str	wzr, [x20, 52]
 	strb	w0, [x20, 58]
-	b	.L1935
-.L1913:
+	b	.L1937
+.L1915:
 	mov	w1, 64
 	mov	w0, w24
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1935
+	tbz	x0, 6, .L1937
 	add	x19, x19, :lo12:.LANCHOR49
 	add	x19, x19, x20, lsl 6
 	str	w0, [x19, 52]
 	mov	w0, 6
 	strb	w0, [x19, 58]
-	b	.L1935
+	b	.L1937
 	.size	queue_wait_first_req_completed, .-queue_wait_first_req_completed
 	.section	.text.sblk_wait_write_queue_completed,"ax",@progbits
 	.align	2
@@ -11597,17 +11649,17 @@ sblk_wait_write_queue_completed:
 	str	x19, [sp, 16]
 	adrp	x19, .LANCHOR53
 	add	x19, x19, :lo12:.LANCHOR53
-.L1997:
+.L1999:
 	ldrb	w0, [x19]
 	cmp	w0, 255
-	bne	.L1998
+	bne	.L2000
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1998:
+.L2000:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L1997
+	b	.L1999
 	.size	sblk_wait_write_queue_completed, .-sblk_wait_write_queue_completed
 	.section	.text.ftl_read_page,"ax",@progbits
 	.align	2
@@ -11675,19 +11727,19 @@ sblk_read_page:
 	mov	x19, x0
 	stp	x25, x26, [sp, 64]
 	mov	x23, x0
-	adrp	x26, .LANCHOR165
+	adrp	x26, .LANCHOR166
 	mov	w20, w22
-	add	x26, x26, :lo12:.LANCHOR165
+	add	x26, x26, :lo12:.LANCHOR166
 	add	x21, x21, :lo12:.LANCHOR49
 	stp	x27, x28, [sp, 80]
 	adrp	x27, .LANCHOR105
-.L2005:
-	cbnz	w20, .L2015
-.L2028:
+.L2007:
+	cbnz	w20, .L2017
+.L2030:
 	adrp	x19, .LANCHOR49
 	add	x19, x19, :lo12:.LANCHOR49
-.L2016:
-	cbnz	w22, .L2018
+.L2018:
+	cbnz	w22, .L2020
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -11696,51 +11748,51 @@ sblk_read_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2015:
+.L2017:
 	ldrb	w24, [x19]
 	ldr	w25, [x19, 40]
-.L2006:
+.L2008:
 	mov	w1, 0
 	mov	w0, w25
 	bl	queue_lun_state
-	cbnz	w0, .L2007
+	cbnz	w0, .L2009
 	cmp	w20, 1
-	beq	.L2012
+	beq	.L2014
 	ldrb	w0, [x26]
-	cbnz	w0, .L2009
-.L2012:
+	cbnz	w0, .L2011
+.L2014:
 	mov	x0, x19
 	bl	queue_read_cmd
-	b	.L2010
-.L2007:
+	b	.L2012
+.L2009:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2006
-.L2009:
+	b	.L2008
+.L2011:
 	ldrb	w0, [x19]
 	ubfx	x4, x25, 21, 3
 	cmp	w0, 255
-	bne	.L2011
+	bne	.L2013
 	str	w4, [x29, 124]
 	mov	w2, 624
-	adrp	x1, .LANCHOR166
+	adrp	x1, .LANCHOR167
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR166
+	add	x1, x1, :lo12:.LANCHOR167
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	ldr	w4, [x29, 124]
-.L2011:
+.L2013:
 	ldrb	w28, [x19]
 	sbfiz	x2, x28, 6, 32
 	add	x3, x21, x2
 	ldr	w1, [x3, 40]
 	ubfx	x0, x1, 21, 3
 	cmp	w4, w0
-	bne	.L2012
+	bne	.L2014
 	ldrh	w0, [x27, #:lo12:.LANCHOR105]
 	add	w25, w0, w25
 	cmp	w1, w25
-	bne	.L2012
+	bne	.L2014
 	ldr	w0, [x19, 40]
 	adrp	x25, .LANCHOR53
 	ldrb	w24, [x21, x2]
@@ -11766,26 +11818,26 @@ sblk_read_page:
 	add	x1, x21, x1
 	strb	w4, [x21, x2]
 	bl	buf_add_tail
-.L2010:
+.L2012:
 	subs	w20, w20, #1
-	beq	.L2028
+	beq	.L2030
 	ubfiz	x19, x24, 6, 8
 	add	x19, x21, x19
-	b	.L2005
-.L2018:
+	b	.L2007
+.L2020:
 	ldrb	w0, [x23, 58]
 	cmp	w0, 12
-	bne	.L2017
+	bne	.L2019
 	ldrb	w0, [x23]
 	sub	w22, w22, #1
 	cmp	w0, 255
-	beq	.L2017
+	beq	.L2019
 	ubfiz	x23, x0, 6, 8
 	add	x23, x19, x23
-.L2017:
+.L2019:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2016
+	b	.L2018
 	.size	sblk_read_page, .-sblk_read_page
 	.section	.text.flash_prog_page,"ax",@progbits
 	.align	2
@@ -11812,22 +11864,22 @@ flash_prog_page:
 	add	x23, x25, x23, lsl 8
 	and	w24, w1, 2097151
 	ubfx	x28, x21, 24, 2
-	tbz	x0, 4, .L2031
-	adrp	x0, .LC121
+	tbz	x0, 4, .L2033
+	adrp	x0, .LC122
 	mov	w3, w4
 	mov	w2, w28
-	add	x0, x0, :lo12:.LC121
+	add	x0, x0, :lo12:.LC122
 	bl	printf
-.L2031:
+.L2033:
 	bl	nandc_wait_flash_ready
 	mov	w0, w20
 	bl	hynix_reconfig_rr_para
 	mov	w0, w20
 	bl	nandc_cs
 	mov	w0, w20
-	cbnz	w28, .L2032
+	cbnz	w28, .L2034
 	bl	zftl_flash_enter_slc_mode
-.L2033:
+.L2035:
 	add	x19, x25, x19, lsl 8
 	mov	w0, 128
 	str	w0, [x19, 2056]
@@ -11856,15 +11908,15 @@ flash_prog_page:
 	mov	w2, w0
 	bl	nandc_de_cs.constprop.29
 	and	w19, w2, 4
-	tbz	x2, 2, .L2030
+	tbz	x2, 2, .L2032
 	ldr	w0, [x22, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2030
-	adrp	x0, .LC122
+	tbz	x0, 12, .L2032
+	adrp	x0, .LC123
 	mov	w2, w19
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC122
+	add	x0, x0, :lo12:.LC123
 	bl	printf
-.L2030:
+.L2032:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11873,9 +11925,9 @@ flash_prog_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2032:
+.L2034:
 	bl	zftl_flash_exit_slc_mode
-	b	.L2033
+	b	.L2035
 	.size	flash_prog_page, .-flash_prog_page
 	.section	.text.flash_test_blk,"ax",@progbits
 	.align	2
@@ -11906,10 +11958,10 @@ flash_test_blk:
 	mov	w1, w19
 	bl	flash_erase_block
 	cmn	w0, #1
-	bne	.L2046
-.L2048:
+	bne	.L2048
+.L2050:
 	mov	w21, -1
-.L2047:
+.L2049:
 	mov	w1, w19
 	mov	w0, w20
 	bl	flash_erase_block
@@ -11919,7 +11971,7 @@ flash_test_blk:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2046:
+.L2048:
 	adrp	x23, .LANCHOR34
 	add	x23, x23, :lo12:.LANCHOR34
 	ldr	x3, [x21, #:lo12:.LANCHOR153]
@@ -11929,7 +11981,7 @@ flash_test_blk:
 	ldrb	w4, [x23, 9]
 	bl	flash_prog_page
 	cmn	w0, #1
-	beq	.L2048
+	beq	.L2050
 	ldrb	w4, [x23, 9]
 	mov	w1, w19
 	ldr	x3, [x21, #:lo12:.LANCHOR153]
@@ -11937,20 +11989,20 @@ flash_test_blk:
 	ldr	x2, [x22, #:lo12:.LANCHOR151]
 	bl	flash_read_page
 	cmn	w0, #1
-	beq	.L2048
+	beq	.L2050
 	ldr	x0, [x22, #:lo12:.LANCHOR151]
 	ldr	w1, [x0]
 	mov	w0, 42405
 	movk	w0, 0xa5a5, lsl 16
 	cmp	w1, w0
-	bne	.L2048
+	bne	.L2050
 	ldr	x0, [x21, #:lo12:.LANCHOR153]
 	ldr	w1, [x0]
 	mov	w0, 23130
 	movk	w0, 0x5a5a, lsl 16
 	cmp	w1, w0
 	csetm	w21, ne
-	b	.L2047
+	b	.L2049
 	.size	flash_test_blk, .-flash_test_blk
 	.section	.text.id_block_prog_msb_ff_data,"ax",@progbits
 	.align	2
@@ -11961,45 +12013,45 @@ id_block_prog_msb_ff_data:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	and	w22, w0, 255
-	adrp	x0, .LANCHOR167
+	adrp	x0, .LANCHOR168
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
-	ldrb	w0, [x0, #:lo12:.LANCHOR167]
+	ldrb	w0, [x0, #:lo12:.LANCHOR168]
 	str	x25, [sp, 64]
-	cbnz	w0, .L2056
+	cbnz	w0, .L2058
 	adrp	x20, .LANCHOR34
 	add	x20, x20, :lo12:.LANCHOR34
 	ldrb	w0, [x20, 19]
 	sub	w0, w0, #5
 	and	w3, w0, 255
 	cmp	w3, 63
-	bhi	.L2056
+	bhi	.L2058
 	and	w19, w2, 65535
 	mov	x2, 16391
 	movk	x2, 0x4000, lsl 16
 	movk	x2, 0x8000, lsl 48
 	lsr	x0, x2, x3
-	tbz	x0, 0, .L2056
+	tbz	x0, 0, .L2058
 	adrp	x21, .LANCHOR133
 	mov	w23, w1
 	add	x21, x21, :lo12:.LANCHOR133
 	mov	w25, 65535
 	adrp	x24, .LANCHOR151
-.L2058:
+.L2060:
 	ldrh	w0, [x20, 10]
 	cmp	w0, w19
-	bhi	.L2059
-.L2056:
+	bhi	.L2061
+.L2058:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2059:
+.L2061:
 	ldrh	w0, [x21, w19, sxtw 1]
 	cmp	w0, w25
-	bne	.L2056
+	bne	.L2058
 	ldr	x0, [x24, #:lo12:.LANCHOR151]
 	mov	w2, 16384
 	mov	w1, 255
@@ -12012,7 +12064,7 @@ id_block_prog_msb_ff_data:
 	mov	w0, w22
 	and	w19, w19, 65535
 	bl	flash_prog_page
-	b	.L2058
+	b	.L2060
 	.size	id_block_prog_msb_ff_data, .-id_block_prog_msb_ff_data
 	.section	.text.idb_write_data,"ax",@progbits
 	.align	2
@@ -12029,16 +12081,16 @@ idb_write_data:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	bls	.L2062
+	bls	.L2064
 	cmp	w1, 575
-	bhi	.L2063
-	adrp	x0, .LANCHOR168
+	bhi	.L2065
+	adrp	x0, .LANCHOR169
 	mov	x1, x2
 	mov	w2, 1
 	cmp	w4, 64
-	str	w2, [x0, #:lo12:.LANCHOR168]
+	str	w2, [x0, #:lo12:.LANCHOR169]
 	adrp	x0, idb_buf
-	bhi	.L2064
+	bhi	.L2066
 	mov	w2, 64
 	sub	w4, w2, w4
 	sub	w2, w3, w4
@@ -12046,9 +12098,9 @@ idb_write_data:
 	lsl	w2, w2, 9
 	add	x1, x1, x4
 	add	x0, x0, :lo12:idb_buf
-.L2140:
+.L2142:
 	bl	ftl_memcpy
-.L2119:
+.L2121:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -12057,7 +12109,7 @@ idb_write_data:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 256
 	ret
-.L2064:
+.L2066:
 	mov	w2, 576
 	sub	w2, w2, w4
 	cmp	w3, w2
@@ -12067,58 +12119,64 @@ idb_write_data:
 	add	x0, x0, :lo12:idb_buf
 	lsl	w2, w2, 9
 	add	x0, x0, x4
-	b	.L2140
-.L2062:
+	b	.L2142
+.L2064:
 	cmp	w1, 575
-	bls	.L2119
-.L2063:
-	adrp	x0, .LANCHOR168
-	ldr	w0, [x0, #:lo12:.LANCHOR168]
-	cbz	w0, .L2119
+	bls	.L2121
+.L2065:
+	adrp	x0, .LANCHOR169
+	ldr	w0, [x0, #:lo12:.LANCHOR169]
+	cbz	w0, .L2121
+	adrp	x0, idb_buf
+	mov	w1, 35899
+	movk	w1, 0xfcdc, lsl 16
+	ldr	w2, [x0, #:lo12:idb_buf]
+	cmp	w2, w1
+	bne	.L2069
 	adrp	x3, .LANCHOR34
 	add	x1, x3, :lo12:.LANCHOR34
 	str	x3, [x29, 176]
-	adrp	x3, idb_buf
-	add	x6, x3, :lo12:idb_buf
+	add	x6, x0, :lo12:idb_buf
+	adrp	x3, idb_buf+262140
+	add	x3, x3, :lo12:idb_buf+262140
+	ldrh	w2, [x1, 10]
+	ldrb	w4, [x1, 12]
+	ldrb	w20, [x1, 9]
+	lsl	w2, w2, 2
+	ldrh	w19, [x1, 26]
+	mov	w1, 0
+	sdiv	w27, w2, w4
+	mov	w2, 512
 	mov	w4, 4097
-	ldrh	w0, [x1, 10]
-	ldrb	w2, [x1, 9]
-	ldrb	w1, [x1, 12]
-	mul	w2, w0, w2
-	lsl	w0, w0, 2
-	and	w2, w2, 65535
-	str	w2, [x29, 132]
-	sdiv	w27, w0, w1
-	mov	w0, 512
-	adrp	x1, idb_buf+262140
-	add	x1, x1, :lo12:idb_buf+262140
-	mov	w2, 65535
 	cmp	w27, 512
-	csel	w27, w27, w0, lt
-	mov	w0, 0
-.L2069:
-	ldr	w5, [x1]
-	cbnz	w5, .L2067
-	ldr	w5, [x6, w0, uxtw 2]
-	add	w0, w0, 1
-	str	w5, [x1], -4
-	cmp	w0, w4
+	csel	w27, w27, w2, lt
+	mov	w2, 65535
+.L2073:
+	ldr	w5, [x3]
+	cbnz	w5, .L2071
+	ldr	w5, [x6, w1, uxtw 2]
+	add	w1, w1, 1
+	str	w5, [x3], -4
+	cmp	w1, w4
 	sub	w2, w2, #1
-	csel	w0, w0, wzr, cc
+	csel	w1, w1, wzr, cc
 	cmp	w2, 4096
-	bne	.L2069
-.L2067:
-	add	x0, x3, :lo12:idb_buf
+	bne	.L2073
+.L2071:
+	add	x0, x0, :lo12:idb_buf
+	mul	w19, w19, w20
 	mov	w3, w27
 	ldr	w1, [x0, w2, uxtw 2]
-	adrp	x0, .LC123
-	add	x0, x0, :lo12:.LC123
+	adrp	x0, .LC124
+	add	x0, x0, :lo12:.LC124
 	bl	printf
 	stp	wzr, wzr, [x29, 168]
+	and	w0, w19, 65535
+	str	w0, [x29, 132]
 	adrp	x0, gp_flash_check_buf
 	add	x0, x0, :lo12:gp_flash_check_buf
 	str	x0, [x29, 184]
-.L2103:
+.L2107:
 	adrp	x0, gp_flash_check_buf
 	add	x20, x0, :lo12:gp_flash_check_buf
 	mov	w1, 0
@@ -12131,7 +12189,7 @@ idb_write_data:
 	add	x0, x0, x1, uxtw
 	ldrb	w0, [x0, 32]
 	cmp	w0, 255
-	beq	.L2070
+	beq	.L2074
 	ldr	w1, [x29, 132]
 	adrp	x19, .LANCHOR45
 	mul	w26, w0, w1
@@ -12142,7 +12200,7 @@ idb_write_data:
 	strb	wzr, [x19, #:lo12:.LANCHOR45]
 	mov	w0, 0
 	ldrb	w21, [x25, 9]
-	ldrh	w23, [x25, 10]
+	ldrh	w23, [x25, 26]
 	udiv	w1, w26, w21
 	mul	w23, w21, w23
 	and	w22, w23, 65535
@@ -12151,11 +12209,11 @@ idb_write_data:
 	msub	w23, w23, w22, w26
 	sub	w24, w26, w23
 	cmp	w26, w24
-	bne	.L2109
+	bne	.L2111
 	adrp	x0, .LANCHOR27
 	ldrb	w0, [x0, #:lo12:.LANCHOR27]
 	cmp	w0, 9
-	bne	.L2109
+	bne	.L2111
 	mov	w2, 1024
 	mov	w1, 0
 	mov	x0, x20
@@ -12191,19 +12249,19 @@ idb_write_data:
 	str	w0, [x1, 8]
 	sub	w0, w27, #4
 	str	w0, [x29, 164]
-.L2071:
+.L2075:
 	adrp	x22, idb_buf
-	adrp	x28, .LANCHOR167
+	adrp	x28, .LANCHOR168
 	add	x22, x22, :lo12:idb_buf
-	add	x0, x28, :lo12:.LANCHOR167
+	add	x0, x28, :lo12:.LANCHOR168
 	adrp	x25, .LANCHOR3
 	str	x0, [x29, 152]
 	mov	w20, 0
 	add	x0, x25, :lo12:.LANCHOR3
 	str	x0, [x29, 144]
-.L2073:
+.L2077:
 	cmp	w27, w20
-	bhi	.L2084
+	bhi	.L2088
 	ldr	x0, [x29, 176]
 	add	x25, x19, :lo12:.LANCHOR45
 	strb	wzr, [x19, #:lo12:.LANCHOR45]
@@ -12212,7 +12270,7 @@ idb_write_data:
 	mov	w22, 0
 	str	wzr, [x29, 144]
 	ldrb	w1, [x0, 9]
-	ldrh	w28, [x0, 10]
+	ldrh	w28, [x0, 26]
 	uxtw	x0, w1
 	mul	w28, w0, w28
 	and	w28, w28, 65535
@@ -12229,10 +12287,10 @@ idb_write_data:
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
 	str	x0, [x29, 104]
-.L2085:
+.L2089:
 	ldr	w0, [x29, 160]
 	cmp	w22, w0
-	bcc	.L2099
+	bcc	.L2103
 	adrp	x0, .LANCHOR45
 	ldrb	w1, [x29, 128]
 	adrp	x3, idb_buf
@@ -12241,21 +12299,21 @@ idb_write_data:
 	mov	x1, 0
 	ldr	w0, [x29, 164]
 	lsl	w0, w0, 7
-.L2100:
+.L2104:
 	mov	w19, w1
 	cmp	w1, w0
-	bcc	.L2101
+	bcc	.L2105
 	ldr	w0, [x29, 168]
 	add	w0, w0, 1
 	str	w0, [x29, 168]
 	cmp	w0, 5
-	bls	.L2070
-	b	.L2105
-.L2109:
+	bls	.L2074
+	b	.L2069
+.L2111:
 	mov	x6, 0
 	str	w27, [x29, 164]
-	b	.L2071
-.L2084:
+	b	.L2075
+.L2088:
 	ldr	x2, [x29, 152]
 	add	w5, w23, w20
 	lsr	w5, w5, 2
@@ -12263,30 +12321,30 @@ idb_write_data:
 	add	w1, w5, 1
 	ldrb	w2, [x2]
 	ldrh	w0, [x0, w1, sxtw 1]
-	cbz	w2, .L2075
+	cbz	w2, .L2079
 	adrp	x0, .LANCHOR1
 	ldrb	w3, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w1, 1
 	cmp	w3, 0
 	csel	w0, w0, w1, ne
-.L2075:
+.L2079:
 	adrp	x1, .LANCHOR27
 	ldrb	w1, [x1, #:lo12:.LANCHOR27]
 	cmp	w1, 9
-	bne	.L2077
-.L2138:
+	bne	.L2081
+.L2140:
 	str	w0, [x29, 192]
 	mov	w0, 61424
 	str	w0, [x29, 196]
 	ldr	x0, [x29, 144]
 	ldrh	w0, [x0, w5, sxtw 1]
-	cbnz	w2, .L2079
+	cbnz	w2, .L2083
 	mov	w5, w0
-.L2080:
+.L2084:
 	mul	w1, w21, w5
 	adrp	x2, .LANCHOR43
 	adrp	x0, .LANCHOR17
-	cbnz	x6, .L2081
+	cbnz	x6, .L2085
 	ldr	x3, [x29, 176]
 	add	w1, w1, w24
 	ldrb	w7, [x2, #:lo12:.LANCHOR43]
@@ -12306,31 +12364,31 @@ idb_write_data:
 	ldr	w7, [x29, 160]
 	mov	w0, w7
 	bl	nandc_bch_sel
-	ldrb	w0, [x28, #:lo12:.LANCHOR167]
+	ldrb	w0, [x28, #:lo12:.LANCHOR168]
 	ldr	w5, [x29, 140]
-	cbnz	w0, .L2082
+	cbnz	w0, .L2086
 	udiv	w1, w24, w21
 	add	w2, w5, 1
 	bl	id_block_prog_msb_ff_data
-.L2082:
+.L2086:
 	add	x22, x22, 2048
-.L2083:
+.L2087:
 	add	w20, w20, 4
 	mov	x6, 0
 	and	w20, w20, 65535
-	b	.L2073
-.L2077:
+	b	.L2077
+.L2081:
 	sub	w0, w0, #1
 	lsl	w0, w0, 2
-	b	.L2138
-.L2079:
+	b	.L2140
+.L2083:
 	adrp	x0, .LANCHOR1
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w5, 1
 	cmp	w1, 0
 	csel	w5, w0, w5, ne
-	b	.L2080
-.L2081:
+	b	.L2084
+.L2085:
 	ldr	x3, [x29, 176]
 	add	w1, w1, w24
 	ldrb	w7, [x2, #:lo12:.LANCHOR43]
@@ -12349,21 +12407,21 @@ idb_write_data:
 	ldr	w7, [x29, 160]
 	mov	w0, w7
 	bl	nandc_bch_sel
-	b	.L2083
-.L2099:
+	b	.L2087
+.L2103:
 	add	w19, w28, w22
 	ldr	w0, [x29, 152]
-	adrp	x1, .LANCHOR167
+	adrp	x1, .LANCHOR168
 	sub	w24, w21, w0
 	ldr	x0, [x29, 104]
 	udiv	w19, w19, w21
-	ldrb	w1, [x1, #:lo12:.LANCHOR167]
+	ldrb	w1, [x1, #:lo12:.LANCHOR168]
 	and	w24, w24, 65535
 	and	w19, w19, 65535
 	ldrh	w0, [x0, w19, sxtw 1]
-	cbnz	w1, .L2086
+	cbnz	w1, .L2090
 	mov	w19, w0
-.L2087:
+.L2091:
 	adrp	x0, .LANCHOR17
 	ldr	w1, [x29, 136]
 	ldrb	w23, [x0, #:lo12:.LANCHOR17]
@@ -12383,7 +12441,7 @@ idb_write_data:
 	adrp	x0, .LANCHOR20
 	add	x0, x0, :lo12:.LANCHOR20
 	str	x0, [x29, 112]
-.L2088:
+.L2092:
 	mov	w4, w21
 	add	x3, x29, 192
 	mov	x2, x20
@@ -12392,32 +12450,32 @@ idb_write_data:
 	bl	flash_read_page
 	mov	w5, w0
 	cmn	w0, #1
-	bne	.L2089
+	bne	.L2093
 	ldrb	w6, [x25]
-	cbnz	w6, .L2090
-.L2093:
-	adrp	x0, .LANCHOR156
-	ldr	x6, [x0, #:lo12:.LANCHOR156]
-	cbnz	x6, .L2091
-.L2092:
+	cbnz	w6, .L2094
+.L2097:
+	adrp	x0, .LANCHOR157
+	ldr	x6, [x0, #:lo12:.LANCHOR157]
+	cbnz	x6, .L2095
+.L2096:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
-	cbz	w0, .L2089
+	cbz	w0, .L2093
 	mov	w4, w21
 	add	x3, x29, 192
 	mov	x2, x20
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_ddr_tuning_read
-	b	.L2139
-.L2086:
+	b	.L2141
+.L2090:
 	adrp	x0, .LANCHOR1
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w19, 1
 	cmp	w1, 0
 	csel	w19, w0, w19, ne
-	b	.L2087
-.L2090:
+	b	.L2091
+.L2094:
 	str	w6, [x29, 100]
 	mov	w4, w21
 	str	w5, [x29, 120]
@@ -12431,21 +12489,21 @@ idb_write_data:
 	ldr	w6, [x29, 100]
 	strb	w6, [x25]
 	ldr	w5, [x29, 120]
-	beq	.L2093
-.L2139:
+	beq	.L2097
+.L2141:
 	mov	w5, w0
-.L2089:
+.L2093:
 	cmn	w5, #1
 	cset	w3, eq
 	cmp	w23, 16
 	cset	w0, ne
 	tst	w3, w0
-	beq	.L2095
+	beq	.L2099
 	mov	w0, 16
 	mov	w23, 16
 	bl	nandc_bch_sel
-	b	.L2088
-.L2091:
+	b	.L2092
+.L2095:
 	str	w5, [x29, 120]
 	mov	w4, w21
 	add	x3, x29, 192
@@ -12455,9 +12513,9 @@ idb_write_data:
 	blr	x6
 	cmn	w0, #1
 	ldr	w5, [x29, 120]
-	beq	.L2092
-	b	.L2139
-.L2095:
+	beq	.L2096
+	b	.L2141
+.L2099:
 	ldr	w0, [x29, 124]
 	bl	nandc_bch_sel
 	cmp	w3, 0
@@ -12467,62 +12525,62 @@ idb_write_data:
 	ldr	w0, [x29, 136]
 	cmp	w22, 0
 	ccmp	w26, w0, 0, eq
-	bne	.L2097
+	bne	.L2101
 	ldr	w0, [x29, 144]
-	cbnz	w0, .L2097
+	cbnz	w0, .L2101
 	ldr	w1, [x20]
 	mov	w0, 18766
 	movk	w0, 0x464e, lsl 16
 	cmp	w1, w0
-	bne	.L2097
+	bne	.L2101
 	ldr	w0, [x29, 160]
 	ldrb	w21, [x20, 17]
 	add	w0, w0, w24
 	str	w0, [x29, 160]
-.L2098:
+.L2102:
 	add	w22, w24, w22
 	and	w22, w22, 65535
-	b	.L2085
-.L2097:
+	b	.L2089
+.L2101:
 	ubfiz	x0, x24, 9, 16
 	str	wzr, [x29, 152]
 	add	x20, x20, x0
-	b	.L2098
-.L2101:
+	b	.L2102
+.L2105:
 	ldr	x4, [x29, 184]
 	lsl	x2, x1, 2
 	add	x1, x1, 1
 	ldr	w4, [x2, x4]
 	ldr	w2, [x3, x2]
 	cmp	w4, w2
-	beq	.L2100
+	beq	.L2104
 	ldr	x0, [x29, 184]
 	mov	w2, 512
 	mov	w1, 0
 	bl	ftl_memset
 	mov	w1, w19
-	adrp	x0, .LC124
-	add	x0, x0, :lo12:.LC124
+	adrp	x0, .LC125
+	add	x0, x0, :lo12:.LC125
 	bl	printf
 	mov	w1, w26
 	mov	w0, 0
 	bl	flash_erase_block
-.L2070:
+.L2074:
 	ldr	w0, [x29, 172]
 	add	w0, w0, 1
 	str	w0, [x29, 172]
 	cmp	w0, 4
-	bne	.L2103
+	bne	.L2107
 	ldr	w0, [x29, 168]
-	cbnz	w0, .L2105
-	adrp	x0, .LC125
+	cbnz	w0, .L2069
+	adrp	x0, .LC126
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC125
+	add	x0, x0, :lo12:.LC126
 	bl	printf
-.L2105:
-	adrp	x0, .LANCHOR168
-	str	wzr, [x0, #:lo12:.LANCHOR168]
-	b	.L2119
+.L2069:
+	adrp	x0, .LANCHOR169
+	str	wzr, [x0, #:lo12:.LANCHOR169]
+	b	.L2121
 	.size	idb_write_data, .-idb_write_data
 	.section	.text.flash_start_tlc_page_prog,"ax",@progbits
 	.align	2
@@ -12545,14 +12603,14 @@ flash_start_tlc_page_prog:
 	mov	x23, x5
 	mov	x24, x6
 	cmp	w0, w19
-	bhi	.L2142
-	adrp	x1, .LANCHOR169
+	bhi	.L2144
+	adrp	x1, .LANCHOR170
 	adrp	x0, .LC0
-	mov	w2, 651
-	add	x1, x1, :lo12:.LANCHOR169
+	mov	w2, 655
+	add	x1, x1, :lo12:.LANCHOR170
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2142:
+.L2144:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w4, [x0, w19, sxtw]
@@ -12560,12 +12618,12 @@ flash_start_tlc_page_prog:
 	ldr	x19, [x0, #:lo12:.LANCHOR13]
 	mov	w0, w4
 	bl	nandc_cs
-	cbz	w25, .L2143
+	cbz	w25, .L2145
 	sxtw	x0, w4
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 8
 	str	w25, [x0, 8]
-.L2143:
+.L2145:
 	ubfiz	x4, x4, 8, 8
 	mov	w0, 128
 	add	x19, x19, x4
@@ -12665,21 +12723,21 @@ sblk_tlc_prog_one_page:
 	mov	x19, x0
 	ldr	x0, [x0]
 	ldr	w20, [x0, 40]
-.L2151:
+.L2153:
 	mov	w1, 1
 	mov	w0, w20
 	bl	queue_lun_state
-	cbnz	w0, .L2152
+	cbnz	w0, .L2154
 	mov	x0, x19
 	bl	queue_tlc_prog_cmd
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2152:
+.L2154:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2151
+	b	.L2153
 	.size	sblk_tlc_prog_one_page, .-sblk_tlc_prog_one_page
 	.section	.text.sblk_xlc_prog_pages,"ax",@progbits
 	.align	2
@@ -12696,13 +12754,13 @@ sblk_xlc_prog_pages:
 	stp	x23, x24, [sp, 48]
 	mov	w24, w2
 	ldr	w20, [x0, 40]
-.L2155:
+.L2157:
 	mov	w1, 1
 	mov	w0, w20
 	bl	queue_lun_state
-	cbnz	w0, .L2156
+	cbnz	w0, .L2158
 	cmp	w24, 2
-	bne	.L2157
+	bne	.L2159
 	ldr	x0, [x19]
 	mov	w2, 17
 	ldr	x1, [x22]
@@ -12782,21 +12840,21 @@ sblk_xlc_prog_pages:
 	adrp	x0, .LANCHOR53
 	add	x0, x0, :lo12:.LANCHOR53
 	bl	buf_add_tail
-.L2158:
+.L2160:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2156:
+.L2158:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2155
-.L2157:
+	b	.L2157
+.L2159:
 	mov	x0, x19
 	bl	queue_tlc_prog_cmd
-	b	.L2158
+	b	.L2160
 	.size	sblk_xlc_prog_pages, .-sblk_xlc_prog_pages
 	.section	.text.flash_start_page_prog,"ax",@progbits
 	.align	2
@@ -12819,40 +12877,40 @@ flash_start_page_prog:
 	ubfx	x27, x1, 21, 3
 	ubfx	x22, x1, 24, 2
 	cmp	w0, w27
-	bhi	.L2161
-	adrp	x1, .LANCHOR170
+	bhi	.L2163
+	adrp	x1, .LANCHOR171
 	adrp	x0, .LC0
-	mov	w2, 702
-	add	x1, x1, :lo12:.LANCHOR170
+	mov	w2, 706
+	add	x1, x1, :lo12:.LANCHOR171
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2161:
+.L2163:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w21, [x0, w27, sxtw]
 	adrp	x0, .LANCHOR13
 	ldr	x19, [x0, #:lo12:.LANCHOR13]
 	bl	nandc_rdy_status
-	cbnz	w0, .L2162
+	cbnz	w0, .L2164
 	ldrb	w0, [x23, #:lo12:.LANCHOR18]
 	cmp	w0, 1
-	bne	.L2163
+	bne	.L2165
 	bl	nandc_wait_flash_ready
-.L2162:
+.L2164:
 	mov	w0, w21
 	bl	hynix_reconfig_rr_para
 	mov	w0, w21
 	bl	nandc_cs
-	cbnz	w22, .L2164
+	cbnz	w22, .L2166
 	mov	w0, w20
 	bl	slc_phy_page_address_calc
 	mov	w20, w0
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L2165
+	cbz	w0, .L2167
 	mov	w0, w21
 	bl	zftl_flash_enter_slc_mode
-.L2165:
+.L2167:
 	ubfiz	x21, x21, 8, 8
 	mov	w0, 128
 	add	x19, x19, x21
@@ -12882,16 +12940,16 @@ flash_start_page_prog:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 96
 	b	nandc_de_cs.constprop.29
-.L2163:
+.L2165:
 	mov	w2, 64
 	mov	w1, w20
 	mov	w0, w27
 	bl	flash_wait_device_ready_raw
-	b	.L2162
-.L2164:
+	b	.L2164
+.L2166:
 	mov	w0, w21
 	bl	zftl_flash_exit_slc_mode
-	b	.L2165
+	b	.L2167
 	.size	flash_start_page_prog, .-flash_start_page_prog
 	.section	.text.queue_prog_cmd,"ax",@progbits
 	.align	2
@@ -12910,23 +12968,23 @@ queue_prog_cmd:
 	ldr	w3, [x19, 40]
 	ldrb	w1, [x0, #:lo12:.LANCHOR53]
 	cmp	w1, 255
-	beq	.L2171
+	beq	.L2173
 	adrp	x2, .LANCHOR49
 	add	x2, x2, :lo12:.LANCHOR49
 	ubfx	x3, x3, 21, 3
 	mov	x6, x2
-.L2173:
+.L2175:
 	add	x4, x2, x1, lsl 6
 	ldr	w5, [x4, 40]
 	ubfx	x5, x5, 21, 3
 	cmp	w3, w5
-	bne	.L2172
+	bne	.L2174
 	ldrb	w5, [x4, 58]
 	cmp	w5, 6
-	bne	.L2172
+	bne	.L2174
 	mov	w1, 3
 	strb	w1, [x4, 58]
-.L2171:
+.L2173:
 	mov	w1, 3
 	strb	w1, [x19, 58]
 	mov	w1, 1
@@ -12938,12 +12996,12 @@ queue_prog_cmd:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	buf_add_tail
-.L2172:
+.L2174:
 	lsl	x1, x1, 6
 	ldrb	w1, [x6, x1]
 	cmp	w1, 255
-	bne	.L2173
-	b	.L2171
+	bne	.L2175
+	b	.L2173
 	.size	queue_prog_cmd, .-queue_prog_cmd
 	.section	.text.sblk_prog_page,"ax",@progbits
 	.align	2
@@ -12960,25 +13018,25 @@ sblk_prog_page:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	cbz	w0, .L2180
+	cbz	w0, .L2182
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2180
+	tbz	x0, 8, .L2182
 	ldr	w1, [x19, 40]
-	adrp	x0, .LC126
+	adrp	x0, .LC127
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC126
+	add	x0, x0, :lo12:.LC127
 	bl	printf
-.L2180:
+.L2182:
 	adrp	x25, .LANCHOR38
 	adrp	x23, .LANCHOR49
 	add	x25, x25, :lo12:.LANCHOR38
 	add	x23, x23, :lo12:.LANCHOR49
 	mov	w21, 0
 	mov	w24, 1
-.L2181:
-	cbnz	w20, .L2192
-.L2205:
+.L2183:
+	cbnz	w20, .L2194
+.L2207:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -12987,49 +13045,49 @@ sblk_prog_page:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2192:
+.L2194:
 	ldrb	w26, [x19]
 	ldr	w22, [x19, 40]
-.L2182:
+.L2184:
 	mov	w1, 1
 	mov	w0, w22
 	bl	queue_lun_state
-	cbnz	w0, .L2183
+	cbnz	w0, .L2185
 	cmp	w20, 1
-	beq	.L2184
+	beq	.L2186
 	ldrb	w0, [x25]
-	cbnz	w0, .L2185
-.L2184:
+	cbnz	w0, .L2187
+.L2186:
 	mov	x0, x19
 	bl	queue_prog_cmd
-.L2186:
+.L2188:
 	subs	w20, w20, #1
-	beq	.L2205
+	beq	.L2207
 	ubfiz	x19, x26, 6, 8
 	add	x19, x23, x19
-	b	.L2181
-.L2183:
+	b	.L2183
+.L2185:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2182
-.L2185:
+	b	.L2184
+.L2187:
 	ldrb	w0, [x19]
 	ubfx	x27, x22, 21, 3
 	cmp	w0, 255
-	bne	.L2187
-	adrp	x1, .LANCHOR171
+	bne	.L2189
+	adrp	x1, .LANCHOR172
 	adrp	x0, .LC0
 	mov	w2, 546
-	add	x1, x1, :lo12:.LANCHOR171
+	add	x1, x1, :lo12:.LANCHOR172
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2187:
+.L2189:
 	ldrb	w0, [x19]
 	add	x0, x23, x0, lsl 6
 	ldr	w5, [x0, 40]
 	ubfx	x0, x5, 21, 3
 	cmp	w27, w0
-	bne	.L2188
+	bne	.L2190
 	adrp	x0, .LANCHOR99
 	ldrh	w2, [x0, #:lo12:.LANCHOR99]
 	adrp	x0, .LANCHOR98
@@ -13052,9 +13110,9 @@ sblk_prog_page:
 	cmp	w4, w0
 	and	w1, w1, w5
 	ccmp	w22, w1, 0, ne
-	bne	.L2188
+	bne	.L2190
 	cmp	w21, w3
-	beq	.L2188
+	beq	.L2190
 	ldr	w1, [x19, 40]
 	mov	w0, 17
 	ldr	x2, [x19, 8]
@@ -13070,12 +13128,12 @@ sblk_prog_page:
 	adrp	x0, .LANCHOR53
 	add	x0, x0, :lo12:.LANCHOR53
 	bl	buf_add_tail
-	b	.L2186
-.L2188:
+	b	.L2188
+.L2190:
 	mov	x0, x19
 	mov	w21, 0
 	bl	queue_prog_cmd
-	b	.L2186
+	b	.L2188
 	.size	sblk_prog_page, .-sblk_prog_page
 	.section	.text.ftl_flush,"ax",@progbits
 	.align	2
@@ -13088,17 +13146,17 @@ ftl_flush:
 	ldrb	w1, [x0, #:lo12:.LANCHOR119]
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	adrp	x20, .LANCHOR172
-	cbz	w1, .L2208
-	ldrb	w2, [x20, #:lo12:.LANCHOR172]
+	adrp	x20, .LANCHOR173
+	cbz	w1, .L2210
+	ldrb	w2, [x20, #:lo12:.LANCHOR173]
 	adrp	x0, .LANCHOR49
 	add	x0, x0, :lo12:.LANCHOR49
 	add	x0, x0, x2, lsl 6
 	bl	sblk_prog_page
-.L2208:
+.L2210:
 	mov	w0, -1
 	strb	wzr, [x19, #:lo12:.LANCHOR119]
-	strb	w0, [x20, #:lo12:.LANCHOR172]
+	strb	w0, [x20, #:lo12:.LANCHOR173]
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	ldp	x19, x20, [sp, 16]
@@ -13113,126 +13171,138 @@ ftl_flush:
 flash_prog_page_en:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	and	w22, w0, 255
+	stp	x23, x24, [sp, 48]
+	and	w24, w0, 255
 	adrp	x0, .LANCHOR18
 	stp	x19, x20, [sp, 16]
-	stp	x23, x24, [sp, 48]
+	stp	x21, x22, [sp, 32]
 	mov	w20, w1
 	stp	x25, x26, [sp, 64]
-	mov	x24, x2
+	mov	x23, x2
 	ldrb	w0, [x0, #:lo12:.LANCHOR18]
-	mov	x23, x3
+	mov	x22, x3
 	mov	w25, w4
 	and	w21, w5, 255
 	ubfx	x19, x20, 24, 2
-	cmp	w0, w22
-	bhi	.L2214
-	adrp	x1, .LANCHOR173
+	cmp	w0, w24
+	bhi	.L2216
+	adrp	x1, .LANCHOR174
 	adrp	x0, .LC0
-	mov	w2, 476
-	add	x1, x1, :lo12:.LANCHOR173
+	mov	w2, 478
+	add	x1, x1, :lo12:.LANCHOR174
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2214:
+.L2216:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
-	ldrb	w26, [x0, w22, sxtw]
-	cbnz	w19, .L2224
+	ldrb	w26, [x0, w24, sxtw]
+	cbnz	w19, .L2226
 	adrp	x0, .LANCHOR0
 	ldrb	w1, [x0, #:lo12:.LANCHOR0]
 	adrp	x0, .LANCHOR1
-	cbz	w1, .L2216
+	cbz	w1, .L2218
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
-	cbz	w1, .L2224
-.L2216:
+	cbz	w1, .L2226
+.L2218:
 	adrp	x1, .LANCHOR2
 	ldrb	w0, [x0, #:lo12:.LANCHOR1]
 	ldrh	w1, [x1, #:lo12:.LANCHOR2]
 	udiv	w19, w20, w1
 	mul	w19, w19, w1
 	sub	w1, w20, w19
-	cbz	w0, .L2217
+	cbz	w0, .L2219
 	add	w19, w19, w1, lsl 1
-.L2215:
+.L2217:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 4, .L2218
-	adrp	x0, .LC127
+	tbz	x0, 4, .L2220
+	adrp	x0, .LC128
 	mov	w2, w20
 	mov	w1, w26
-	add	x0, x0, :lo12:.LC127
+	add	x0, x0, :lo12:.LC128
 	bl	printf
-.L2218:
+.L2220:
 	mov	w1, w19
 	mov	w4, w25
-	mov	x3, x23
-	mov	x2, x24
+	mov	x3, x22
+	mov	x2, x23
 	mov	w0, w26
 	bl	flash_prog_page
 	mov	w19, w0
-	cbz	w21, .L2219
-	adrp	x26, .LANCHOR160
-	adrp	x21, .LANCHOR161
+	cbz	w21, .L2221
+	adrp	x26, .LANCHOR161
+	adrp	x21, .LANCHOR162
 	mov	w4, w25
 	mov	w1, w20
-	ldr	x3, [x26, #:lo12:.LANCHOR160]
-	mov	w0, w22
-	ldr	x2, [x21, #:lo12:.LANCHOR161]
+	ldr	x3, [x26, #:lo12:.LANCHOR161]
+	mov	w0, w24
+	ldr	x2, [x21, #:lo12:.LANCHOR162]
 	bl	flash_read_page_en
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2220
-	ldr	x0, [x21, #:lo12:.LANCHOR161]
-	ldr	w1, [x24]
+	beq	.L2222
+	ldr	x0, [x21, #:lo12:.LANCHOR162]
+	ldr	w1, [x23]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	bne	.L2220
-	ldr	x0, [x26, #:lo12:.LANCHOR160]
-	ldr	w1, [x23]
+	bne	.L2222
+	ldr	x0, [x26, #:lo12:.LANCHOR161]
+	ldr	w1, [x22]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	beq	.L2219
-.L2220:
-	ldr	x1, [x26, #:lo12:.LANCHOR160]
+	beq	.L2221
+.L2222:
 	mov	w3, 4
-	adrp	x0, .LC128
+	mov	x1, x23
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC128
-	bl	rknand_print_hex
-	ldr	x1, [x21, #:lo12:.LANCHOR161]
-	mov	w3, 4
 	adrp	x0, .LC129
-	mov	w2, w3
 	add	x0, x0, :lo12:.LC129
 	bl	rknand_print_hex
-.L2221:
-	mov	w1, w20
+	mov	w3, 4
+	mov	x1, x22
+	mov	w2, w3
 	adrp	x0, .LC130
 	add	x0, x0, :lo12:.LC130
+	bl	rknand_print_hex
+	ldr	x1, [x26, #:lo12:.LANCHOR161]
+	mov	w3, 4
+	adrp	x0, .LC131
+	mov	w2, w3
+	add	x0, x0, :lo12:.LC131
+	bl	rknand_print_hex
+	ldr	x1, [x21, #:lo12:.LANCHOR162]
+	mov	w3, 4
+	adrp	x0, .LC132
+	mov	w2, w3
+	add	x0, x0, :lo12:.LC132
+	bl	rknand_print_hex
+.L2223:
+	mov	w1, w20
+	adrp	x0, .LC133
+	add	x0, x0, :lo12:.LC133
 	bl	printf
-	mov	w2, 502
-	adrp	x1, .LANCHOR173
+	mov	w2, 506
+	adrp	x1, .LANCHOR174
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR173
+	add	x1, x1, :lo12:.LANCHOR174
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	mov	w0, -1
-	b	.L2222
-.L2217:
+	b	.L2224
+.L2219:
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
 	ldrh	w0, [x0, w1, uxtw 1]
 	add	w19, w0, w19
-	b	.L2215
-.L2224:
+	b	.L2217
+.L2226:
 	mov	w19, w20
-	b	.L2215
-.L2219:
+	b	.L2217
+.L2221:
 	mov	w0, w19
 	cmn	w19, #1
-	beq	.L2221
-.L2222:
+	beq	.L2223
+.L2224:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -13250,7 +13320,7 @@ ftl_test_block:
 	stp	x23, x24, [sp, 48]
 	adrp	x24, ftl_tmp_buffer
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR174
+	adrp	x25, .LANCHOR175
 	stp	x21, x22, [sp, 32]
 	adrp	x26, .LANCHOR106
 	and	w21, w0, 65535
@@ -13263,45 +13333,45 @@ ftl_test_block:
 	str	x0, [x29, 112]
 	str	wzr, [x24, #:lo12:ftl_tmp_buffer]
 	add	x0, x27, :lo12:.LANCHOR98
-	str	wzr, [x25, #:lo12:.LANCHOR174]
+	str	wzr, [x25, #:lo12:.LANCHOR175]
 	str	x0, [x29, 96]
-.L2236:
+.L2238:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
 	cmp	w0, w20
-	bls	.L2246
+	bls	.L2248
 	add	x0, x27, :lo12:.LANCHOR98
 	mov	w22, 0
 	str	x0, [x29, 120]
 	adrp	x0, .LANCHOR14
 	add	x0, x0, :lo12:.LANCHOR14
 	str	x0, [x29, 104]
-	b	.L2247
-.L2245:
+	b	.L2249
+.L2247:
 	ldr	x0, [x29, 104]
 	ldr	w0, [x0]
-	tbz	x0, 12, .L2237
-	adrp	x0, .LC131
+	tbz	x0, 12, .L2239
+	adrp	x0, .LC134
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC131
+	add	x0, x0, :lo12:.LC134
 	bl	printf
-.L2237:
+.L2239:
 	ldr	x0, [x29, 96]
 	ldrb	w19, [x0]
 	madd	w19, w21, w19, w22
 	and	w19, w19, 65535
-	cbnz	w20, .L2238
+	cbnz	w20, .L2240
 	adrp	x0, .LANCHOR26
 	ldr	x0, [x0, #:lo12:.LANCHOR26]
 	ldrb	w0, [x0, 47]
 	cmp	w0, w19
-	bcs	.L2239
-.L2238:
+	bcs	.L2241
+.L2240:
 	and	w28, w20, 255
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_check_bad_block
-	cbnz	w0, .L2239
+	cbnz	w0, .L2241
 	adrp	x0, .LANCHOR105
 	mov	w1, w23
 	ldrh	w7, [x0, #:lo12:.LANCHOR105]
@@ -13309,54 +13379,54 @@ ftl_test_block:
 	mul	w26, w7, w19
 	mov	w2, w26
 	bl	flash_erase_block_en
-	cbz	w0, .L2240
+	cbz	w0, .L2242
 	adrp	x0, .LANCHOR68
 	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w0, 2
-	bne	.L2262
+	bne	.L2264
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L2262
+	cbz	w0, .L2264
 	mov	w2, w26
 	mov	w1, 1
 	mov	w0, w28
 	bl	flash_erase_block_en
-	cbnz	w0, .L2262
-.L2244:
+	cbnz	w0, .L2264
+.L2246:
 	adrp	x0, .LANCHOR68
 	mov	w23, 1
 	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	add	w26, w26, w0, lsl 24
-.L2243:
+.L2245:
 	adrp	x0, .LANCHOR121
 	mov	w5, 1
-	add	x3, x25, :lo12:.LANCHOR174
+	add	x3, x25, :lo12:.LANCHOR175
 	add	x2, x24, :lo12:ftl_tmp_buffer
 	ldrb	w4, [x0, #:lo12:.LANCHOR121]
 	mov	w1, w26
 	mov	w0, w28
 	bl	flash_prog_page_en
-	cbz	w0, .L2239
-.L2262:
+	cbz	w0, .L2241
+.L2264:
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_mask_bad_block
-.L2239:
+.L2241:
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L2247:
+.L2249:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, w22
-	bhi	.L2245
+	bhi	.L2247
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2236
-.L2240:
-	cbz	w23, .L2243
-	b	.L2244
-.L2246:
-	cbz	w23, .L2248
+	b	.L2238
+.L2242:
+	cbz	w23, .L2245
+	b	.L2246
+.L2248:
+	cbz	w23, .L2250
 	adrp	x0, .LANCHOR7
 	mov	w1, 2
 	ldr	x0, [x0, #:lo12:.LANCHOR7]
@@ -13364,7 +13434,7 @@ ftl_test_block:
 	ldrb	w0, [x21, 2]
 	bfi	w0, w1, 3, 2
 	strb	w0, [x21, 2]
-.L2248:
+.L2250:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -13399,18 +13469,18 @@ ftl_prog_page:
 	bl	flash_prog_page_en
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L2263
+	bne	.L2265
 	mov	w2, 2150
-	adrp	x1, .LANCHOR175
+	adrp	x1, .LANCHOR176
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR175
+	add	x1, x1, :lo12:.LANCHOR176
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	adrp	x0, .LC130
+	adrp	x0, .LC133
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC130
+	add	x0, x0, :lo12:.LC133
 	bl	printf
-.L2263:
+.L2265:
 	mov	w0, w19
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -13429,24 +13499,24 @@ ftl_info_flush:
 	stp	x21, x22, [sp, 32]
 	adrp	x21, .LANCHOR121
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR177
+	adrp	x22, .LANCHOR178
 	stp	x25, x26, [sp, 64]
 	adrp	x23, .LANCHOR105
 	stp	x27, x28, [sp, 80]
 	mov	x26, x23
 	ldrb	w2, [x21, #:lo12:.LANCHOR121]
-	add	x25, x22, :lo12:.LANCHOR177
+	add	x25, x22, :lo12:.LANCHOR178
 	add	x28, x23, :lo12:.LANCHOR105
 	mov	w24, 0
 	stp	x19, x20, [sp, 16]
 	mov	w27, w0
-	adrp	x20, .LANCHOR176
+	adrp	x20, .LANCHOR177
 	lsl	w2, w2, 1
-	add	x0, x20, :lo12:.LANCHOR176
+	add	x0, x20, :lo12:.LANCHOR177
 	bl	ftl_memset
-.L2267:
-	add	x0, x22, :lo12:.LANCHOR177
-	ldrb	w6, [x22, #:lo12:.LANCHOR177]
+.L2269:
+	add	x0, x22, :lo12:.LANCHOR178
+	ldrb	w6, [x22, #:lo12:.LANCHOR178]
 	ldrh	w19, [x23, #:lo12:.LANCHOR105]
 	ldrh	w4, [x0, 2]
 	adrp	x0, .LANCHOR97
@@ -13454,41 +13524,41 @@ ftl_info_flush:
 	ldr	w3, [x0, 4]
 	add	w3, w3, 1
 	str	w3, [x0, 4]
-	add	x0, x20, :lo12:.LANCHOR176
-	str	w27, [x20, #:lo12:.LANCHOR176]
+	add	x0, x20, :lo12:.LANCHOR177
+	str	w27, [x20, #:lo12:.LANCHOR177]
 	str	w3, [x0, 4]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2268
+	tbz	x0, 12, .L2270
 	mov	w2, w4
 	mov	w1, w6
 	str	w4, [x29, 96]
-	adrp	x0, .LC132
+	adrp	x0, .LC135
 	str	w6, [x29, 104]
-	add	x0, x0, :lo12:.LC132
+	add	x0, x0, :lo12:.LC135
 	bl	printf
 	ldr	w4, [x29, 96]
 	ldr	w6, [x29, 104]
-.L2268:
+.L2270:
 	adrp	x1, .LANCHOR80
 	ldrh	w0, [x25, 2]
 	ldrh	w1, [x1, #:lo12:.LANCHOR80]
 	cmp	w1, w0
-	bhi	.L2269
-	adrp	x19, .LANCHOR178
+	bhi	.L2271
+	adrp	x19, .LANCHOR179
 	adrp	x3, .LC0
-	add	x19, x19, :lo12:.LANCHOR178
+	add	x19, x19, :lo12:.LANCHOR179
 	add	x3, x3, :lo12:.LC0
-.L2276:
+.L2278:
 	ldrb	w0, [x25, 1]
 	adrp	x4, .LANCHOR26
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x25, 1]
 	cmp	w0, 7
-	bls	.L2270
+	bls	.L2272
 	mov	x0, 0
-.L2275:
+.L2277:
 	ldr	x2, [x4, #:lo12:.LANCHOR26]
 	add	w1, w0, 8
 	and	w24, w0, 65535
@@ -13497,24 +13567,24 @@ ftl_info_flush:
 	add	w1, w2, 127
 	and	w1, w1, 255
 	cmp	w1, 125
-	bhi	.L2271
+	bhi	.L2273
 	mov	x0, x3
 	stp	x4, x3, [x29, 96]
 	mov	w2, 742
 	mov	x1, x19
 	bl	printf
 	ldp	x4, x3, [x29, 96]
-.L2274:
+.L2276:
 	strb	w24, [x25, 1]
 	mov	w24, 1
-.L2270:
+.L2272:
 	ldr	x0, [x4, #:lo12:.LANCHOR26]
 	ldrb	w1, [x25, 1]
 	add	x0, x0, x1
 	ldrb	w0, [x0, 40]
 	strb	w0, [x25]
 	cmp	w0, 255
-	beq	.L2276
+	beq	.L2278
 	ldrh	w19, [x28]
 	mul	w19, w19, w0
 	mov	w0, 0
@@ -13522,7 +13592,7 @@ ftl_info_flush:
 	bl	flash_erase_block
 	ldrb	w4, [x21, #:lo12:.LANCHOR121]
 	mov	w1, w19
-	add	x3, x20, :lo12:.LANCHOR176
+	add	x3, x20, :lo12:.LANCHOR177
 	adrp	x2, ftl_info_data_buffer
 	mov	w0, 0
 	add	x2, x2, :lo12:ftl_info_data_buffer
@@ -13530,53 +13600,53 @@ ftl_info_flush:
 	bl	ftl_prog_page
 	mov	w0, 1
 	strh	w0, [x25, 2]
-.L2277:
+.L2279:
 	ldrb	w4, [x21, #:lo12:.LANCHOR121]
 	mov	w1, w19
-	add	x3, x20, :lo12:.LANCHOR176
+	add	x3, x20, :lo12:.LANCHOR177
 	adrp	x2, ftl_info_data_buffer
 	mov	w0, 0
 	add	x2, x2, :lo12:ftl_info_data_buffer
 	bl	ftl_prog_page
 	cmn	w0, #1
 	ldrh	w1, [x25, 2]
-	adrp	x0, .LANCHOR179
+	adrp	x0, .LANCHOR180
 	add	w1, w1, 1
 	strh	w1, [x25, 2]
-	beq	.L2278
-	ldrb	w1, [x0, #:lo12:.LANCHOR179]
-	cbz	w1, .L2279
-.L2278:
-	strb	wzr, [x0, #:lo12:.LANCHOR179]
-	b	.L2267
-.L2271:
+	beq	.L2280
+	ldrb	w1, [x0, #:lo12:.LANCHOR180]
+	cbz	w1, .L2281
+.L2280:
+	strb	wzr, [x0, #:lo12:.LANCHOR180]
+	b	.L2269
+.L2273:
 	cmp	w2, 255
-	bne	.L2274
+	bne	.L2276
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L2275
+	bne	.L2277
 	mov	w24, w0
-	b	.L2274
-.L2269:
+	b	.L2276
+.L2271:
 	madd	w19, w19, w6, w4
-	cbnz	w0, .L2277
+	cbnz	w0, .L2279
 	mov	w1, w19
 	bl	flash_erase_block
-	b	.L2277
-.L2279:
-	cbnz	w24, .L2280
-.L2288:
-	adrp	x0, .LANCHOR177
-	ldrb	w0, [x0, #:lo12:.LANCHOR177]
+	b	.L2279
+.L2281:
+	cbnz	w24, .L2282
+.L2290:
+	adrp	x0, .LANCHOR178
+	ldrb	w0, [x0, #:lo12:.LANCHOR178]
 	cmp	w0, 255
-	bne	.L2282
-	adrp	x1, .LANCHOR178
+	bne	.L2284
+	adrp	x1, .LANCHOR179
 	adrp	x0, .LC0
 	mov	w2, 778
-	add	x1, x1, :lo12:.LANCHOR178
+	add	x1, x1, :lo12:.LANCHOR179
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2282:
+.L2284:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -13585,17 +13655,17 @@ ftl_info_flush:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2280:
+.L2282:
 	ldrb	w19, [x25, 1]
-	adrp	x20, .LANCHOR178
+	adrp	x20, .LANCHOR179
 	adrp	x21, .LC0
-	add	x20, x20, :lo12:.LANCHOR178
+	add	x20, x20, :lo12:.LANCHOR179
 	add	w19, w19, 1
 	add	x21, x21, :lo12:.LC0
 	adrp	x22, .LANCHOR26
-.L2283:
+.L2285:
 	cmp	w19, 7
-	bhi	.L2288
+	bhi	.L2290
 	ldr	x1, [x22, #:lo12:.LANCHOR26]
 	add	w0, w19, 8
 	add	x0, x1, x0, sxtw
@@ -13603,24 +13673,24 @@ ftl_info_flush:
 	add	w0, w23, 127
 	and	w0, w0, 255
 	cmp	w0, 125
-	bhi	.L2284
+	bhi	.L2286
 	mov	w2, 771
 	mov	x1, x20
 	mov	x0, x21
 	bl	printf
-.L2285:
+.L2287:
 	ldrh	w1, [x26, #:lo12:.LANCHOR105]
 	mov	w0, 0
 	mul	w1, w1, w23
 	bl	flash_erase_block
-	b	.L2286
-.L2284:
-	cmp	w23, 255
-	bne	.L2285
+	b	.L2288
 .L2286:
+	cmp	w23, 255
+	bne	.L2287
+.L2288:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L2283
+	b	.L2285
 	.size	ftl_info_flush, .-ftl_info_flush
 	.section	.text.ftl_info_blk_init,"ax",@progbits
 	.align	2
@@ -13628,17 +13698,17 @@ ftl_info_flush:
 	.type	ftl_info_blk_init, %function
 ftl_info_blk_init:
 	stp	x29, x30, [sp, -128]!
-	adrp	x0, .LANCHOR180
-	adrp	x1, .LANCHOR179
+	adrp	x0, .LANCHOR181
+	adrp	x1, .LANCHOR180
 	mov	w2, 16384
 	add	x29, sp, 0
-	strb	wzr, [x0, #:lo12:.LANCHOR180]
+	strb	wzr, [x0, #:lo12:.LANCHOR181]
 	mov	w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR179]
-	adrp	x1, .LANCHOR181
+	strb	w0, [x1, #:lo12:.LANCHOR180]
+	adrp	x1, .LANCHOR182
 	stp	x19, x20, [sp, 16]
 	adrp	x20, ftl_info_data_buffer
-	strb	w0, [x1, #:lo12:.LANCHOR181]
+	strb	w0, [x1, #:lo12:.LANCHOR182]
 	adrp	x1, .LANCHOR7
 	add	x0, x20, :lo12:ftl_info_data_buffer
 	stp	x21, x22, [sp, 32]
@@ -13647,7 +13717,7 @@ ftl_info_blk_init:
 	adrp	x22, .LANCHOR97
 	stp	x25, x26, [sp, 64]
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
-	adrp	x21, .LANCHOR177
+	adrp	x21, .LANCHOR178
 	stp	x23, x24, [sp, 48]
 	adrp	x23, .LANCHOR26
 	stp	x27, x28, [sp, 80]
@@ -13663,7 +13733,7 @@ ftl_info_blk_init:
 	bl	ftl_memset
 	adrp	x25, .LANCHOR121
 	ldr	x1, [x23, #:lo12:.LANCHOR26]
-	add	x0, x21, :lo12:.LANCHOR177
+	add	x0, x21, :lo12:.LANCHOR178
 	mov	w27, 21574
 	add	x26, x26, :lo12:.LANCHOR105
 	add	x25, x25, :lo12:.LANCHOR121
@@ -13671,9 +13741,9 @@ ftl_info_blk_init:
 	strb	wzr, [x0, 1]
 	movk	w27, 0x494c, lsl 16
 	ldrb	w1, [x1, 40]
-	strb	w1, [x21, #:lo12:.LANCHOR177]
+	strb	w1, [x21, #:lo12:.LANCHOR178]
 	strh	wzr, [x0, 2]
-.L2304:
+.L2306:
 	ldr	x1, [x23, #:lo12:.LANCHOR26]
 	add	w0, w19, 8
 	sxth	w24, w19
@@ -13681,26 +13751,26 @@ ftl_info_blk_init:
 	add	x0, x1, x0, sxtw
 	ldrb	w0, [x0, 32]
 	cmp	w0, 255
-	bne	.L2303
-.L2308:
+	bne	.L2305
+.L2310:
 	sub	x19, x19, #1
 	cmn	x19, #1
-	bne	.L2304
+	bne	.L2306
 	mov	w24, 0
-.L2305:
+.L2307:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2309
+	tbz	x0, 12, .L2311
 	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	mov	w2, 4800
 	mov	w1, w19
 	ldr	w3, [x0]
-	adrp	x0, .LC134
-	add	x0, x0, :lo12:.LC134
+	adrp	x0, .LC137
+	add	x0, x0, :lo12:.LC137
 	bl	printf
-.L2309:
+.L2311:
 	cmn	w19, #1
-	bne	.L2310
+	bne	.L2312
 	mov	w1, 0
 	mov	w2, 16384
 	add	x0, x20, :lo12:ftl_info_data_buffer
@@ -13709,11 +13779,11 @@ ftl_info_blk_init:
 	mov	w1, 21574
 	movk	w1, 0x494c, lsl 16
 	str	w1, [x0]
-	mov	w1, 17
+	mov	w1, 20
 	movk	w1, 0x6, lsl 16
 	str	w1, [x0, 12]
 	mov	w0, w19
-.L2302:
+.L2304:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -13721,12 +13791,12 @@ ftl_info_blk_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2303:
+.L2305:
 	ldrh	w6, [x26]
 	add	x8, x20, :lo12:ftl_info_data_buffer
 	ldrb	w4, [x25]
-	adrp	x7, .LANCHOR176
-	add	x7, x7, :lo12:.LANCHOR176
+	adrp	x7, .LANCHOR177
+	add	x7, x7, :lo12:.LANCHOR177
 	mov	x2, x8
 	mov	x3, x7
 	stp	x7, x8, [x29, 104]
@@ -13739,7 +13809,7 @@ ftl_info_blk_init:
 	cmn	w0, #1
 	ldr	w6, [x29, 124]
 	ldp	x7, x8, [x29, 104]
-	bne	.L2306
+	bne	.L2308
 	ldrb	w4, [x25]
 	mov	x3, x7
 	mov	x2, x8
@@ -13747,30 +13817,30 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_read_page
 	mov	w5, w0
-.L2306:
+.L2308:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2307
+	tbz	x0, 12, .L2309
 	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	mov	w2, w5
 	str	w5, [x29, 124]
 	mov	w3, 672
 	mov	w1, w28
 	ldr	w4, [x0]
-	adrp	x0, .LC133
-	add	x0, x0, :lo12:.LC133
+	adrp	x0, .LC136
+	add	x0, x0, :lo12:.LC136
 	bl	printf
 	ldr	w5, [x29, 124]
-.L2307:
+.L2309:
 	cmn	w5, #1
-	beq	.L2308
+	beq	.L2310
 	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L2308
+	bne	.L2310
 	mov	w19, w24
-	b	.L2305
-.L2310:
+	b	.L2307
+.L2312:
 	ldr	x1, [x23, #:lo12:.LANCHOR26]
 	add	w0, w24, 8
 	add	x20, x20, :lo12:ftl_info_data_buffer
@@ -13782,11 +13852,11 @@ ftl_info_blk_init:
 	add	x26, x26, :lo12:.LANCHOR121
 	movk	w27, 0x494c, lsl 16
 	ldrb	w1, [x0, 32]
-	add	x0, x21, :lo12:.LANCHOR177
-	strb	w1, [x21, #:lo12:.LANCHOR177]
+	add	x0, x21, :lo12:.LANCHOR178
+	strb	w1, [x21, #:lo12:.LANCHOR178]
 	strb	w24, [x0, 1]
-	adrp	x24, .LANCHOR176
-	add	x24, x24, :lo12:.LANCHOR176
+	adrp	x24, .LANCHOR177
+	add	x24, x24, :lo12:.LANCHOR177
 	mov	w0, 0
 	mov	x3, x24
 	bl	flash_get_last_written_page
@@ -13794,11 +13864,11 @@ ftl_info_blk_init:
 	add	w0, w0, 1
 	and	w19, w0, 65535
 	adrp	x0, .LANCHOR105
-	ldrb	w25, [x21, #:lo12:.LANCHOR177]
+	ldrb	w25, [x21, #:lo12:.LANCHOR178]
 	ldrh	w0, [x0, #:lo12:.LANCHOR105]
 	madd	w25, w25, w0, w23
-.L2312:
-	tbnz	w23, #31, .L2315
+.L2314:
+	tbnz	w23, #31, .L2317
 	ldrb	w4, [x26]
 	mov	x3, x24
 	mov	x2, x20
@@ -13806,13 +13876,13 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_read_page
 	cmn	w0, #1
-	beq	.L2313
+	beq	.L2315
 	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L2313
-.L2315:
-	add	x21, x21, :lo12:.LANCHOR177
+	bne	.L2315
+.L2317:
+	add	x21, x21, :lo12:.LANCHOR178
 	strh	w19, [x21, 2]
 	bl	ftl_tmp_into_update
 	ldr	x1, [x22, #:lo12:.LANCHOR97]
@@ -13824,12 +13894,12 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_info_flush
 	mov	w0, 0
-	b	.L2302
-.L2313:
+	b	.L2304
+.L2315:
 	sub	w23, w23, #1
 	sub	w25, w25, #1
 	sxth	w23, w23
-	b	.L2312
+	b	.L2314
 	.size	ftl_info_blk_init, .-ftl_info_blk_init
 	.section	.text.ftl_ext_info_flush,"ax",@progbits
 	.align	2
@@ -13846,21 +13916,21 @@ ftl_ext_info_flush:
 	ldr	w1, [x0, 520]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbz	w1, .L2331
+	cbz	w1, .L2333
 	str	wzr, [x0, 520]
-.L2331:
+.L2333:
 	adrp	x20, .LANCHOR80
-	adrp	x22, .LANCHOR182
+	adrp	x22, .LANCHOR183
 	adrp	x21, .LANCHOR99
 	add	x20, x20, :lo12:.LANCHOR80
-	add	x22, x22, :lo12:.LANCHOR182
+	add	x22, x22, :lo12:.LANCHOR183
 	add	x21, x21, :lo12:.LANCHOR99
 	mov	w0, 0
 	bl	ftl_total_vpn_update
-.L2332:
+.L2334:
 	adrp	x23, .LANCHOR97
 	mov	x24, x23
-.L2335:
+.L2337:
 	ldr	x0, [x23, #:lo12:.LANCHOR97]
 	ldr	w1, [x0, 56]
 	add	w1, w1, 1
@@ -13868,26 +13938,26 @@ ftl_ext_info_flush:
 	ldrh	w1, [x0, 140]
 	ldrh	w0, [x20]
 	cmp	w1, w0
-	bcc	.L2333
+	bcc	.L2335
 	bl	ftl_ext_alloc_new_blk
-.L2333:
+.L2335:
 	ldr	x0, [x24, #:lo12:.LANCHOR97]
 	ldrh	w1, [x0, 130]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2334
+	bne	.L2336
 	adrp	x0, .LC0
 	mov	w2, 1746
 	mov	x1, x22
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2334:
+.L2336:
 	ldr	x1, [x24, #:lo12:.LANCHOR97]
 	mov	w19, 21
 	ldrh	w0, [x21]
 	adrp	x26, .LANCHOR121
-	adrp	x27, .LANCHOR176
-	add	x25, x27, :lo12:.LANCHOR176
+	adrp	x27, .LANCHOR177
+	add	x25, x27, :lo12:.LANCHOR177
 	sub	w0, w19, w0
 	mov	w19, 1
 	ldrh	w2, [x1, 130]
@@ -13909,7 +13979,7 @@ ftl_ext_info_flush:
 	mov	w1, w19
 	ldrb	w4, [x26, #:lo12:.LANCHOR121]
 	mov	x3, x25
-	str	wzr, [x27, #:lo12:.LANCHOR176]
+	str	wzr, [x27, #:lo12:.LANCHOR177]
 	adrp	x2, ftl_ext_info_data_buffer
 	add	x2, x2, :lo12:ftl_ext_info_data_buffer
 	ldr	w0, [x0, 56]
@@ -13922,16 +13992,16 @@ ftl_ext_info_flush:
 	and	w1, w1, 65535
 	strh	w1, [x2, 140]
 	cmp	w1, 1
-	beq	.L2335
+	beq	.L2337
 	cmn	w0, #1
-	adrp	x0, .LANCHOR181
-	beq	.L2336
-	ldrb	w1, [x0, #:lo12:.LANCHOR181]
-	cbz	w1, .L2337
-.L2336:
-	strb	wzr, [x0, #:lo12:.LANCHOR181]
-	b	.L2332
-.L2337:
+	adrp	x0, .LANCHOR182
+	beq	.L2338
+	ldrb	w1, [x0, #:lo12:.LANCHOR182]
+	cbz	w1, .L2339
+.L2338:
+	strb	wzr, [x0, #:lo12:.LANCHOR182]
+	b	.L2334
+.L2339:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -13958,11 +14028,11 @@ ftl_ext_info_init:
 	stp	x21, x22, [sp, 32]
 	stp	x27, x28, [sp, 80]
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR176
+	adrp	x24, .LANCHOR177
 	ldrh	w1, [x0, 130]
 	adrp	x0, .LANCHOR99
 	stp	x25, x26, [sp, 64]
-	add	x3, x24, :lo12:.LANCHOR176
+	add	x3, x24, :lo12:.LANCHOR177
 	ldrh	w0, [x0, #:lo12:.LANCHOR99]
 	adrp	x25, ftl_ext_info_data_buffer
 	add	x2, x25, :lo12:ftl_ext_info_data_buffer
@@ -13979,18 +14049,18 @@ ftl_ext_info_init:
 	sxth	w22, w0
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2348
+	tbz	x0, 12, .L2350
 	ldr	x0, [x20, #:lo12:.LANCHOR97]
-	adrp	x1, .LANCHOR183
+	adrp	x1, .LANCHOR184
 	and	w4, w21, 65535
 	mov	w3, w22
 	mov	w2, 1790
-	add	x1, x1, :lo12:.LANCHOR183
+	add	x1, x1, :lo12:.LANCHOR184
 	ldrh	w5, [x0, 130]
-	adrp	x0, .LC135
-	add	x0, x0, :lo12:.LC135
+	adrp	x0, .LC138
+	add	x0, x0, :lo12:.LC138
 	bl	printf
-.L2348:
+.L2350:
 	adrp	x26, .LANCHOR121
 	adrp	x28, .LANCHOR105
 	mov	w5, 20038
@@ -13998,14 +14068,14 @@ ftl_ext_info_init:
 	add	x28, x28, :lo12:.LANCHOR105
 	mov	w23, 0
 	movk	w5, 0x4549, lsl 16
-.L2349:
+.L2351:
 	and	w21, w22, 65535
 	sub	w0, w21, w23
-	tbnz	x0, 15, .L2354
+	tbnz	x0, 15, .L2356
 	ldrh	w0, [x28]
 	sub	w1, w22, w23
 	ldrb	w4, [x26]
-	add	x3, x24, :lo12:.LANCHOR176
+	add	x3, x24, :lo12:.LANCHOR177
 	str	w5, [x29, 108]
 	add	x2, x25, :lo12:ftl_ext_info_data_buffer
 	madd	w1, w0, w19, w1
@@ -14014,22 +14084,22 @@ ftl_ext_info_init:
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
 	ldr	w5, [x29, 108]
-	beq	.L2350
+	beq	.L2352
 	adrp	x0, .LANCHOR10
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x0]
 	cmp	w0, w5
-	bne	.L2350
-.L2354:
+	bne	.L2352
+.L2356:
 	bl	zftl_sblk_list_init
 	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	ldrh	w1, [x0, 140]
 	cmp	w1, w22
-	bgt	.L2352
+	bgt	.L2354
 	add	w21, w21, 1
 	strh	w21, [x0, 140]
 	bl	ftl_ext_info_flush
-.L2352:
+.L2354:
 	adrp	x0, .LANCHOR10
 	mov	w1, -1
 	ldp	x19, x20, [sp, 16]
@@ -14050,9 +14120,9 @@ ftl_ext_info_init:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 112
 	ret
-.L2350:
+.L2352:
 	add	w23, w23, 1
-	b	.L2349
+	b	.L2351
 	.size	ftl_ext_info_init, .-ftl_ext_info_init
 	.section	.text.ftl_low_format_data_init,"ax",@progbits
 	.align	2
@@ -14085,14 +14155,14 @@ ftl_low_format_data_init:
 	mov	w0, 65533
 	sub	w1, w20, #1
 	cmp	w0, w1, uxth
-	bcs	.L2363
-	adrp	x1, .LANCHOR184
+	bcs	.L2365
+	adrp	x1, .LANCHOR185
 	adrp	x0, .LC0
 	mov	w2, 1973
-	add	x1, x1, :lo12:.LANCHOR184
+	add	x1, x1, :lo12:.LANCHOR185
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2363:
+.L2365:
 	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	w2, 256
 	mov	w1, 255
@@ -14116,8 +14186,8 @@ ftl_low_format_data_init:
 	strh	w1, [x0, 694]
 	mov	w1, 1
 	strh	w1, [x0, 688]
-	adrp	x1, .LANCHOR185
-	ldrh	w1, [x1, #:lo12:.LANCHOR185]
+	adrp	x1, .LANCHOR186
+	ldrh	w1, [x1, #:lo12:.LANCHOR186]
 	strh	w1, [x0, 698]
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	mov	w1, 20038
@@ -14184,13 +14254,13 @@ ftl_low_format_data_init:
 ftl_low_format:
 	stp	x29, x30, [sp, -80]!
 	mov	w1, 0
-	adrp	x0, .LC136
-	add	x0, x0, :lo12:.LC136
+	adrp	x0, .LC139
+	add	x0, x0, :lo12:.LC139
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR186
+	adrp	x20, .LANCHOR187
 	stp	x21, x22, [sp, 32]
-	add	x20, x20, :lo12:.LANCHOR186
+	add	x20, x20, :lo12:.LANCHOR187
 	stp	x25, x26, [sp, 64]
 	adrp	x22, .LANCHOR26
 	mov	x25, x22
@@ -14198,30 +14268,30 @@ ftl_low_format:
 	mov	w19, 8
 	adrp	x23, .LC0
 	bl	printf
-.L2368:
+.L2370:
 	ldr	x0, [x22, #:lo12:.LANCHOR26]
 	add	x0, x0, x19, sxtw
 	ldrb	w21, [x0, 32]
 	add	w0, w21, 127
 	and	w0, w0, 255
 	cmp	w0, 125
-	bhi	.L2366
+	bhi	.L2368
 	mov	w2, 2027
 	mov	x1, x20
 	add	x0, x23, :lo12:.LC0
 	bl	printf
-.L2366:
+.L2368:
 	cmp	w21, 255
-	beq	.L2367
+	beq	.L2369
 	adrp	x0, .LANCHOR105
 	ldrh	w1, [x0, #:lo12:.LANCHOR105]
 	mov	w0, 0
 	mul	w1, w1, w21
 	bl	flash_erase_block
-.L2367:
+.L2369:
 	add	w19, w19, 1
 	cmp	w19, 16
-	bne	.L2368
+	bne	.L2370
 	bl	sblk_init
 	adrp	x22, .LANCHOR7
 	bl	ftl_info_blk_init
@@ -14235,9 +14305,9 @@ ftl_low_format:
 	mov	w3, 1
 	ldrh	w2, [x19, #:lo12:.LANCHOR6]
 	add	x2, x0, x2, lsl 2
-.L2369:
+.L2371:
 	cmp	x0, x2
-	bne	.L2370
+	bne	.L2372
 	adrp	x21, .LANCHOR97
 	mov	w1, 21574
 	adrp	x24, .LANCHOR59
@@ -14248,11 +14318,11 @@ ftl_low_format:
 	mov	w26, 1
 	strh	wzr, [x0, 148]
 	str	w1, [x0]
-.L2371:
+.L2373:
 	ldrh	w0, [x19, #:lo12:.LANCHOR6]
 	adrp	x23, .LANCHOR98
 	cmp	w0, w20
-	bhi	.L2379
+	bhi	.L2381
 	ldr	x0, [x25, #:lo12:.LANCHOR26]
 	mov	w4, 3
 	ldrb	w2, [x23, #:lo12:.LANCHOR98]
@@ -14271,7 +14341,7 @@ ftl_low_format:
 	add	x0, x0, 4
 	add	w20, w5, 1
 	add	x0, x1, x0
-.L2382:
+.L2384:
 	cmp	w2, 4
 	add	x1, x1, 4
 	csel	w7, w10, w4, eq
@@ -14280,7 +14350,7 @@ ftl_low_format:
 	orr	w7, w7, -32
 	strb	w7, [x1, -2]
 	cmp	x1, x0
-	bne	.L2382
+	bne	.L2384
 	mul	w5, w5, w8
 	mov	w4, 16
 	add	w0, w3, w8
@@ -14292,14 +14362,14 @@ ftl_low_format:
 	add	w4, w20, w4
 	and	w4, w4, 65535
 	strh	w4, [x6, 134]
-	tbz	x0, 12, .L2383
-	adrp	x0, .LC137
+	tbz	x0, 12, .L2385
+	adrp	x0, .LC140
 	mov	w3, w20
 	mov	w2, 128
 	mov	w1, 2073
-	add	x0, x0, :lo12:.LC137
+	add	x0, x0, :lo12:.LC140
 	bl	printf
-.L2383:
+.L2385:
 	ldr	x0, [x21, #:lo12:.LANCHOR97]
 	mov	w2, 128
 	mov	w1, 255
@@ -14322,9 +14392,9 @@ ftl_low_format:
 	lsl	w4, w4, w0
 	and	w1, w1, 65535
 	and	w4, w4, 65535
-.L2384:
+.L2386:
 	cmp	w20, w12
-	bcc	.L2390
+	bcc	.L2392
 	ldrh	w0, [x19, #:lo12:.LANCHOR6]
 	strh	w3, [x2, 112]
 	sub	w0, w0, w12
@@ -14340,14 +14410,14 @@ ftl_low_format:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2370:
+.L2372:
 	ldrb	w1, [x0, 2]
 	add	x0, x0, 4
 	and	w1, w1, 31
 	bfi	w1, w3, 3, 2
 	strb	w1, [x0, -2]
-	b	.L2369
-.L2379:
+	b	.L2371
+.L2381:
 	strh	w20, [x24]
 	mov	w0, w20
 	bl	ftl_test_block
@@ -14361,16 +14431,16 @@ ftl_low_format:
 	mov	w8, 0
 	mul	w12, w20, w11
 	add	x6, x6, x20, uxth 2
-.L2372:
+.L2374:
 	cmp	w8, w14
-	bcs	.L2376
+	bcs	.L2378
 	add	w15, w11, w7
-	b	.L2377
-.L2375:
+	b	.L2379
+.L2377:
 	add	w1, w7, w12
 	mov	w0, w8
 	bl	flash_check_bad_block
-	cbz	w0, .L2373
+	cbz	w0, .L2375
 	ldrb	w1, [x6, 3]
 	lsl	w0, w26, w7
 	orr	w0, w0, w1
@@ -14378,29 +14448,29 @@ ftl_low_format:
 	ldrh	w0, [x13, 148]
 	add	w0, w0, 1
 	strh	w0, [x13, 148]
-.L2374:
+.L2376:
 	add	w7, w7, 1
-.L2377:
+.L2379:
 	cmp	w7, w15
-	bne	.L2375
+	bne	.L2377
 	add	w8, w8, 1
 	sub	w12, w12, w11
 	and	w8, w8, 65535
-	b	.L2372
-.L2373:
+	b	.L2374
+.L2375:
 	add	w10, w10, 1
 	and	w10, w10, 65535
-	b	.L2374
-.L2376:
-	cbnz	w10, .L2378
+	b	.L2376
+.L2378:
+	cbnz	w10, .L2380
 	ldrb	w0, [x6, 2]
 	orr	w0, w0, -32
 	strb	w0, [x6, 2]
-.L2378:
+.L2380:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2371
-.L2390:
+	b	.L2373
+.L2392:
 	add	x10, x14, x20, uxth 2
 	mov	w6, 0
 	mov	w8, 0
@@ -14408,48 +14478,48 @@ ftl_low_format:
 	ldrb	w0, [x10, 2]
 	orr	w0, w0, -32
 	strb	w0, [x10, 2]
-.L2385:
+.L2387:
 	cmp	w5, w15
-	bcc	.L2392
+	bcc	.L2394
 	add	w20, w20, 1
 	add	w1, w16, w1
 	and	w20, w20, 65535
 	and	w1, w1, 65535
-	b	.L2384
-.L2388:
+	b	.L2386
+.L2390:
 	ldrb	w11, [x10, 3]
 	add	w17, w8, w7
 	asr	w11, w11, w17
-	tbnz	x11, 0, .L2386
+	tbnz	x11, 0, .L2388
 	cmp	w13, 1
-	bls	.L2391
+	bls	.L2393
 	and	w0, w0, 1
 	add	w0, w1, w0
 	and	w0, w0, 65535
-.L2387:
+.L2389:
 	add	x11, x2, x3, sxtw 1
 	add	w3, w3, 1
 	and	w3, w3, 65535
 	add	w0, w0, w6
 	strh	w0, [x11, 160]
-.L2386:
+.L2388:
 	add	x7, x7, 1
-.L2389:
+.L2391:
 	and	w0, w7, 65535
 	cmp	w0, w16
-	bcc	.L2388
+	bcc	.L2390
 	add	w5, w5, 1
 	add	w6, w6, w4
 	and	w5, w5, 65535
 	add	w8, w8, w13
 	and	w6, w6, 65535
-	b	.L2385
-.L2391:
-	mov	w0, w1
 	b	.L2387
-.L2392:
-	mov	x7, 0
+.L2393:
+	mov	w0, w1
 	b	.L2389
+.L2394:
+	mov	x7, 0
+	b	.L2391
 	.size	ftl_low_format, .-ftl_low_format
 	.section	.text.ftl_re_low_format,"ax",@progbits
 	.align	2
@@ -14458,8 +14528,8 @@ ftl_low_format:
 ftl_re_low_format:
 	stp	x29, x30, [sp, -16]!
 	mov	w1, 1
-	adrp	x0, .LC138
-	add	x0, x0, :lo12:.LC138
+	adrp	x0, .LC141
+	add	x0, x0, :lo12:.LC141
 	add	x29, sp, 0
 	bl	printf
 	bl	sblk_init
@@ -14476,9 +14546,9 @@ ftl_re_low_format:
 	ldr	x2, [x2, #:lo12:.LANCHOR7]
 	ldrh	w1, [x0, 134]
 	add	x2, x2, x1, uxth 2
-.L2403:
+.L2405:
 	cmp	w1, w7
-	bcc	.L2407
+	bcc	.L2409
 	strh	w5, [x0, 114]
 	strh	w4, [x0, 118]
 	strh	w3, [x0, 116]
@@ -14489,29 +14559,29 @@ ftl_re_low_format:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L2407:
+.L2409:
 	ldrb	w6, [x2, 2]
 	and	w8, w6, 31
 	strb	w8, [x2, 2]
 	ands	w6, w6, 24
-	bne	.L2404
+	bne	.L2406
 	add	w5, w5, 1
 	and	w5, w5, 65535
-.L2405:
+.L2407:
 	add	w1, w1, 1
 	add	x2, x2, 4
 	and	w1, w1, 65535
-	b	.L2403
-.L2404:
+	b	.L2405
+.L2406:
 	cmp	w6, 16
-	bne	.L2406
+	bne	.L2408
 	add	w4, w4, 1
 	and	w4, w4, 65535
-	b	.L2405
-.L2406:
+	b	.L2407
+.L2408:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L2405
+	b	.L2407
 	.size	ftl_re_low_format, .-ftl_re_low_format
 	.section	.text.ftl_prog_ppa_page,"ax",@progbits
 	.align	2
@@ -14533,7 +14603,7 @@ ftl_prog_ppa_page:
 ftl_write_last_log_page:
 	ldrh	w1, [x0, 6]
 	cmp	w1, 1
-	bne	.L2412
+	bne	.L2414
 	stp	x29, x30, [sp, -48]!
 	adrp	x1, .LANCHOR111
 	add	x29, sp, 0
@@ -14545,15 +14615,15 @@ ftl_write_last_log_page:
 	bl	ftl_get_new_free_page
 	mov	w21, w0
 	cmn	w0, #1
-	beq	.L2413
+	beq	.L2415
 	ldrh	w0, [x19]
 	add	x20, x20, x22, uxth 2
 	bl	ftl_vpn_decrement
-	adrp	x0, .LANCHOR174
+	adrp	x0, .LANCHOR175
 	mov	w1, 15555
-	add	x6, x0, :lo12:.LANCHOR174
+	add	x6, x0, :lo12:.LANCHOR175
 	movk	w1, 0xf55f, lsl 16
-	str	w1, [x0, #:lo12:.LANCHOR174]
+	str	w1, [x0, #:lo12:.LANCHOR175]
 	adrp	x0, .LANCHOR80
 	ldrh	w1, [x0, #:lo12:.LANCHOR80]
 	adrp	x0, .LANCHOR73
@@ -14570,13 +14640,13 @@ ftl_write_last_log_page:
 	mov	w0, w21
 	str	wzr, [x6, 12]
 	bl	ftl_prog_ppa_page
-.L2413:
+.L2415:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L2412:
+.L2414:
 	mov	w0, -1
 	ret
 	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
@@ -14596,41 +14666,41 @@ ftl_open_sblk_recovery:
 	mov	x25, x1
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
-	tbz	x0, 12, .L2419
+	tbz	x0, 12, .L2421
 	ldrh	w1, [x28, 2]
-	adrp	x0, .LC139
-	add	x0, x0, :lo12:.LC139
+	adrp	x0, .LC142
+	add	x0, x0, :lo12:.LC142
 	bl	printf
-.L2419:
+.L2421:
 	ldr	w0, [x22, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2420
+	tbz	x0, 12, .L2422
 	ldrb	w1, [x28, 5]
-	adrp	x0, .LC140
-	add	x0, x0, :lo12:.LC140
+	adrp	x0, .LC143
+	add	x0, x0, :lo12:.LC143
 	bl	printf
-.L2420:
+.L2422:
 	ldr	w0, [x22, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2421
+	tbz	x0, 12, .L2423
 	ldrh	w1, [x28]
-	adrp	x0, .LC141
-	add	x0, x0, :lo12:.LC141
+	adrp	x0, .LC144
+	add	x0, x0, :lo12:.LC144
 	bl	printf
-.L2421:
+.L2423:
 	ldr	w0, [x22, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2422
+	tbz	x0, 12, .L2424
 	ldrh	w2, [x28, 18]
-	adrp	x0, .LC142
+	adrp	x0, .LC145
 	ldrh	w1, [x28, 16]
-	add	x0, x0, :lo12:.LC142
+	add	x0, x0, :lo12:.LC145
 	bl	printf
-.L2422:
+.L2424:
 	ldrh	w0, [x28, 10]
 	strh	w0, [x28, 14]
 	adrp	x0, .LANCHOR6
 	ldrh	w1, [x28]
 	ldrh	w0, [x0, #:lo12:.LANCHOR6]
 	cmp	w1, w0
-	bcs	.L2418
+	bcs	.L2420
 	mov	w0, 1
 	bl	buf_alloc
 	ldrb	w20, [x28, 5]
@@ -14641,11 +14711,11 @@ ftl_open_sblk_recovery:
 	add	x0, x26, :lo12:.LANCHOR121
 	adrp	x23, .LANCHOR80
 	str	x0, [x29, 128]
-.L2425:
+.L2427:
 	ldrh	w0, [x23, #:lo12:.LANCHOR80]
 	cmp	w0, w21
-	bhi	.L2438
-.L2428:
+	bhi	.L2440
+.L2430:
 	ldrh	w0, [x28, 10]
 	ldrh	w1, [x28, 6]
 	ldrh	w2, [x23, #:lo12:.LANCHOR80]
@@ -14655,22 +14725,22 @@ ftl_open_sblk_recovery:
 	strb	w20, [x28, 5]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L2439
-	adrp	x1, .LANCHOR187
+	beq	.L2441
+	adrp	x1, .LANCHOR188
 	adrp	x0, .LC0
 	mov	w2, 1472
-	add	x1, x1, :lo12:.LANCHOR187
+	add	x1, x1, :lo12:.LANCHOR188
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2439:
+.L2441:
 	adrp	x21, .LANCHOR111
 	ldrh	w3, [x28, 10]
 	mov	w0, 0
 	mov	w1, 0
 	ldr	x5, [x21, #:lo12:.LANCHOR111]
-.L2440:
+.L2442:
 	cmp	w1, w3
-	bcc	.L2442
+	bcc	.L2444
 	ldrb	w20, [x28, 9]
 	adrp	x24, .LANCHOR9
 	ldrh	w1, [x23, #:lo12:.LANCHOR80]
@@ -14678,32 +14748,32 @@ ftl_open_sblk_recovery:
 	ldr	w0, [x22, #:lo12:.LANCHOR14]
 	sub	w20, w20, w3
 	and	w20, w20, 65535
-	tbz	x0, 12, .L2443
+	tbz	x0, 12, .L2445
 	ldrh	w1, [x28]
 	ldr	x2, [x24, #:lo12:.LANCHOR9]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w3, [x2, x0]
-	adrp	x0, .LC143
+	adrp	x0, .LC146
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC143
+	add	x0, x0, :lo12:.LC146
 	bl	printf
-.L2443:
+.L2445:
 	ldr	x0, [x24, #:lo12:.LANCHOR9]
 	adrp	x25, .LANCHOR121
 	ldrh	w1, [x28]
 	adrp	x24, .LANCHOR73
-	adrp	x26, .LC144
+	adrp	x26, .LC147
 	add	x24, x24, :lo12:.LANCHOR73
 	add	x25, x25, :lo12:.LANCHOR121
-	add	x26, x26, :lo12:.LC144
+	add	x26, x26, :lo12:.LC147
 	strh	w20, [x0, x1, lsl 1]
 	mov	w20, 0
 	mov	x0, x19
 	bl	buf_free
-.L2444:
+.L2446:
 	ldrb	w0, [x24]
 	cmp	w20, w0, lsl 1
-	bcc	.L2447
+	bcc	.L2449
 	ldrh	w1, [x28, 12]
 	ldrh	w0, [x23, #:lo12:.LANCHOR80]
 	ldrb	w2, [x28, 9]
@@ -14713,17 +14783,17 @@ ftl_open_sblk_recovery:
 	ldr	x1, [x21, #:lo12:.LANCHOR111]
 	ldr	w0, [x1, x0]
 	cmn	w0, #1
-	beq	.L2448
-	adrp	x1, .LANCHOR187
+	beq	.L2450
+	adrp	x1, .LANCHOR188
 	adrp	x0, .LC0
 	mov	w2, 1502
-	add	x1, x1, :lo12:.LANCHOR187
+	add	x1, x1, :lo12:.LANCHOR188
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2448:
+.L2450:
 	ldrh	w0, [x28, 6]
 	cmp	w0, 1
-	bne	.L2418
+	bne	.L2420
 	ldp	x19, x20, [sp, 16]
 	mov	x0, x28
 	ldp	x21, x22, [sp, 32]
@@ -14732,25 +14802,25 @@ ftl_open_sblk_recovery:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	b	ftl_write_last_log_page
-.L2438:
+.L2440:
 	ldrb	w20, [x28, 5]
 	adrp	x24, .LANCHOR105
 	add	x0, x24, :lo12:.LANCHOR105
 	str	x0, [x29, 136]
-.L2426:
+.L2428:
 	ldrb	w0, [x28, 9]
 	cmp	w0, w20
-	bhi	.L2437
+	bhi	.L2439
 	add	w21, w21, 1
 	strb	wzr, [x28, 5]
 	and	w21, w21, 65535
-	b	.L2425
-.L2437:
+	b	.L2427
+.L2439:
 	add	x0, x28, x20, sxtw 1
 	mov	w1, 65535
 	ldrh	w0, [x0, 16]
 	cmp	w0, w1
-	beq	.L2427
+	beq	.L2429
 	ldr	x1, [x29, 136]
 	ldrb	w3, [x26, #:lo12:.LANCHOR121]
 	ldr	x2, [x19, 24]
@@ -14760,36 +14830,36 @@ ftl_open_sblk_recovery:
 	bl	ftl_read_ppa_page
 	mov	w24, w0
 	cmp	w0, 512
-	beq	.L2428
+	beq	.L2430
 	cmn	w0, #1
-	beq	.L2429
+	beq	.L2431
 	ldr	x0, [x19, 24]
 	ldr	w1, [x0]
 	cmn	w1, #1
-	bne	.L2429
+	bne	.L2431
 	ldr	w0, [x0, 4]
 	cmn	w0, #1
-	bne	.L2429
+	bne	.L2431
 	ldr	x0, [x19, 8]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L2428
-.L2429:
-	adrp	x0, .LANCHOR180
+	beq	.L2430
+.L2431:
+	adrp	x0, .LANCHOR181
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR180]
+	strb	w1, [x0, #:lo12:.LANCHOR181]
 	ldrb	w0, [x28, 9]
 	ldrh	w1, [x28, 10]
 	madd	w0, w0, w21, w20
 	cmp	w1, w0
-	beq	.L2430
-	adrp	x1, .LANCHOR187
+	beq	.L2432
+	adrp	x1, .LANCHOR188
 	adrp	x0, .LC0
 	mov	w2, 1395
-	add	x1, x1, :lo12:.LANCHOR187
+	add	x1, x1, :lo12:.LANCHOR188
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2430:
+.L2432:
 	ldrh	w0, [x28, 10]
 	ldrh	w1, [x28, 6]
 	ldrb	w2, [x28, 9]
@@ -14797,28 +14867,28 @@ ftl_open_sblk_recovery:
 	ldrh	w0, [x23, #:lo12:.LANCHOR80]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L2431
-	adrp	x1, .LANCHOR187
+	beq	.L2433
+	adrp	x1, .LANCHOR188
 	adrp	x0, .LC0
 	mov	w2, 1396
-	add	x1, x1, :lo12:.LANCHOR187
+	add	x1, x1, :lo12:.LANCHOR188
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2431:
+.L2433:
 	cmn	w24, #1
-	beq	.L2433
+	beq	.L2435
 	ldr	x0, [x19, 24]
 	ldr	w0, [x0, 4]
 	cmn	w0, #1
-	beq	.L2433
+	beq	.L2435
 	bl	lpa_hash_get_ppa
-	cbz	x25, .L2435
+	cbz	x25, .L2437
 	ldr	x3, [x19, 24]
 	ldr	w1, [x3, 8]
 	cmp	w0, w1
-	beq	.L2435
+	beq	.L2437
 	cmn	w0, #1
-	beq	.L2435
+	beq	.L2437
 	adrp	x6, .LANCHOR99
 	mov	w5, 21
 	mov	w27, 1
@@ -14833,11 +14903,11 @@ ftl_open_sblk_recovery:
 	udiv	w1, w1, w2
 	ldrh	w2, [x25]
 	cmp	w2, w1, uxth
-	bne	.L2435
+	bne	.L2437
 	ldr	x1, [x29, 128]
-	adrp	x8, .LANCHOR176
+	adrp	x8, .LANCHOR177
 	ldr	w10, [x3]
-	add	x2, x8, :lo12:.LANCHOR176
+	add	x2, x8, :lo12:.LANCHOR177
 	stp	w5, w10, [x29, 112]
 	str	x8, [x29, 120]
 	ldrb	w3, [x1]
@@ -14846,13 +14916,13 @@ ftl_open_sblk_recovery:
 	bl	ftl_read_ppa_page
 	ldr	x8, [x29, 120]
 	ldr	w10, [x29, 116]
-	ldr	w0, [x8, #:lo12:.LANCHOR176]
+	ldr	w0, [x8, #:lo12:.LANCHOR177]
 	cmp	w10, w0
-	bhi	.L2435
+	bhi	.L2437
 	ldr	x0, [x19, 24]
 	ldr	w0, [x0, 8]
 	cmn	w0, #1
-	beq	.L2433
+	beq	.L2435
 	ldp	x7, x6, [x29, 96]
 	ldr	w5, [x29, 112]
 	ldrh	w1, [x6, #:lo12:.LANCHOR99]
@@ -14864,7 +14934,7 @@ ftl_open_sblk_recovery:
 	ldrb	w0, [x7, #:lo12:.LANCHOR98]
 	udiv	w0, w27, w0
 	bl	ftl_vpn_decrement
-.L2433:
+.L2435:
 	ldrh	w0, [x28, 6]
 	mov	w27, 1
 	sub	w0, w0, #1
@@ -14872,37 +14942,37 @@ ftl_open_sblk_recovery:
 	ldrh	w0, [x28, 10]
 	add	w0, w0, 1
 	strh	w0, [x28, 10]
-.L2427:
+.L2429:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2426
-.L2442:
+	b	.L2428
+.L2444:
 	ldrh	w2, [x28, 12]
 	add	w2, w2, w1
 	ldr	w2, [x5, x2, lsl 2]
 	cmn	w2, #1
-	beq	.L2441
+	beq	.L2443
 	add	w20, w0, 1
 	and	w0, w20, 65535
-.L2441:
+.L2443:
 	add	w1, w1, 1
-	b	.L2440
-.L2447:
-	cbz	w27, .L2445
+	b	.L2442
+.L2449:
+	cbz	w27, .L2447
 	ldrh	w0, [x28, 6]
 	cmp	w0, 1
-	bls	.L2445
+	bls	.L2447
 	mov	x0, x28
 	bl	ftl_get_new_free_page
 	mov	w4, w0
 	ldr	w0, [x22, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2446
+	tbz	x0, 12, .L2448
 	mov	w1, w4
 	str	w4, [x29, 136]
 	mov	x0, x26
 	bl	printf
 	ldr	w4, [x29, 136]
-.L2446:
+.L2448:
 	adrp	x0, .LANCHOR97
 	ldr	x2, [x19, 24]
 	ldr	x1, [x19, 8]
@@ -14918,37 +14988,37 @@ ftl_open_sblk_recovery:
 	bl	ftl_prog_ppa_page
 	ldrh	w0, [x28]
 	bl	ftl_vpn_decrement
-.L2445:
+.L2447:
 	add	w20, w20, 1
-	b	.L2444
-.L2435:
+	b	.L2446
+.L2437:
 	ldr	x3, [x19, 24]
 	adrp	x0, .LANCHOR118
 	ldr	w0, [x0, #:lo12:.LANCHOR118]
 	ldr	w1, [x3, 4]
 	cmp	w1, w0
-	bcs	.L2433
+	bcs	.L2435
 	ldrb	w0, [x28, 9]
 	ldrh	w1, [x23, #:lo12:.LANCHOR80]
 	ldrh	w2, [x28, 10]
 	mul	w0, w0, w1
 	sub	w0, w0, #1
 	cmp	w2, w0
-	bge	.L2433
+	bge	.L2435
 	adrp	x0, .LANCHOR97
 	ldr	w1, [x3]
 	ldr	x0, [x0, #:lo12:.LANCHOR97]
 	ldr	w5, [x0, 8]
 	cmp	w1, w5
-	bls	.L2436
+	bls	.L2438
 	str	w1, [x0, 8]
-.L2436:
+.L2438:
 	ldrh	w0, [x28, 12]
 	add	w2, w2, w0
 	ldp	w0, w1, [x3, 4]
 	bl	lpa_hash_update_ppa
-	b	.L2433
-.L2418:
+	b	.L2435
+.L2420:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -14978,7 +15048,7 @@ pm_write_page:
 	add	x22, x22, :lo12:.LANCHOR105
 	mov	w24, 65535
 	str	x27, [sp, 80]
-.L2498:
+.L2500:
 	ldr	x0, [x23, #:lo12:.LANCHOR97]
 	ldr	w1, [x0, 48]
 	ldrh	w2, [x0, 696]
@@ -14986,37 +15056,37 @@ pm_write_page:
 	str	w1, [x0, 48]
 	ldrh	w1, [x21]
 	cmp	w2, w1
-	bcs	.L2499
+	bcs	.L2501
 	ldrh	w0, [x0, 692]
 	cmp	w0, w24
-	bne	.L2500
-.L2499:
+	bne	.L2502
+.L2501:
 	bl	pm_alloc_new_blk
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2500:
+.L2502:
 	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	ldrh	w0, [x0, 692]
 	cmp	w0, w24
-	bne	.L2501
-	adrp	x1, .LANCHOR188
+	bne	.L2503
+	adrp	x1, .LANCHOR189
 	adrp	x0, .LC0
 	mov	w2, 230
-	add	x1, x1, :lo12:.LANCHOR188
+	add	x1, x1, :lo12:.LANCHOR189
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2501:
+.L2503:
 	ldr	x0, [x20, #:lo12:.LANCHOR97]
-	adrp	x27, .LANCHOR189
+	adrp	x27, .LANCHOR190
 	ldrh	w1, [x22]
 	mov	w2, 64
 	ldrh	w26, [x0, 692]
 	ldrh	w0, [x0, 696]
 	madd	w26, w26, w1, w0
-	ldr	x0, [x27, #:lo12:.LANCHOR189]
+	ldr	x0, [x27, #:lo12:.LANCHOR190]
 	mov	w1, 0
 	bl	ftl_memset
-	ldr	x3, [x27, #:lo12:.LANCHOR189]
+	ldr	x3, [x27, #:lo12:.LANCHOR190]
 	mov	x2, x25
 	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	str	w19, [x3]
@@ -15033,28 +15103,28 @@ pm_write_page:
 	and	w1, w1, 65535
 	strh	w1, [x2, 696]
 	cmp	w1, 1
-	adrp	x1, .LANCHOR190
-	beq	.L2502
-	ldrb	w3, [x1, #:lo12:.LANCHOR190]
-	cbz	w3, .L2503
-.L2502:
-	strb	wzr, [x1, #:lo12:.LANCHOR190]
-	b	.L2498
-.L2503:
+	adrp	x1, .LANCHOR191
+	beq	.L2504
+	ldrb	w3, [x1, #:lo12:.LANCHOR191]
+	cbz	w3, .L2505
+.L2504:
+	strb	wzr, [x1, #:lo12:.LANCHOR191]
+	b	.L2500
+.L2505:
 	cmn	w0, #1
-	bne	.L2505
+	bne	.L2507
 	mov	w1, w26
-	adrp	x0, .LC145
-	add	x0, x0, :lo12:.LC145
+	adrp	x0, .LC148
+	add	x0, x0, :lo12:.LC148
 	bl	printf
-	b	.L2498
-.L2505:
+	b	.L2500
+.L2507:
 	ldrh	w0, [x2, 698]
 	cmp	w19, w0
-	bcs	.L2506
+	bcs	.L2508
 	add	x19, x2, x19, uxtw 2
 	str	w26, [x19, 704]
-.L2506:
+.L2508:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -15078,33 +15148,33 @@ flash_info_flush:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2512
-	adrp	x2, .LANCHOR191
+	tbz	x0, 12, .L2514
+	adrp	x2, .LANCHOR192
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR191
-	mov	w1, 251
+	add	x2, x2, :lo12:.LANCHOR192
+	mov	w1, 250
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2512:
-	adrp	x23, .LANCHOR158
+.L2514:
+	adrp	x23, .LANCHOR159
 	adrp	x20, .LANCHOR26
 	mov	w2, 64
 	mov	w1, 0
-	ldr	x0, [x23, #:lo12:.LANCHOR158]
-	adrp	x21, .LANCHOR159
+	ldr	x0, [x23, #:lo12:.LANCHOR159]
+	adrp	x21, .LANCHOR160
 	adrp	x22, .LANCHOR2
-	adrp	x24, .LC147
+	adrp	x24, .LC150
 	adrp	x25, .LANCHOR135
 	add	x22, x22, :lo12:.LANCHOR2
-	add	x24, x24, :lo12:.LC147
+	add	x24, x24, :lo12:.LC150
 	add	x25, x25, :lo12:.LANCHOR135
 	bl	ftl_memset
-	add	x27, x21, :lo12:.LANCHOR159
+	add	x27, x21, :lo12:.LANCHOR160
 	ldr	x1, [x20, #:lo12:.LANCHOR26]
 	mov	w3, 16
 	mov	w2, 4
-	adrp	x0, .LC146
-	add	x0, x0, :lo12:.LC146
+	adrp	x0, .LC149
+	add	x0, x0, :lo12:.LC149
 	mov	w26, 0
 	bl	rknand_print_hex
 	ldr	x6, [x20, #:lo12:.LANCHOR26]
@@ -15112,9 +15182,9 @@ flash_info_flush:
 	ldr	w1, [x6, 8]
 	bl	js_hash
 	str	w0, [x6, 12]
-.L2513:
-	add	x28, x21, :lo12:.LANCHOR159
-	ldrb	w4, [x21, #:lo12:.LANCHOR159]
+.L2515:
+	add	x28, x21, :lo12:.LANCHOR160
+	ldrb	w4, [x21, #:lo12:.LANCHOR160]
 	ldrh	w19, [x22]
 	mov	x0, x24
 	mov	w1, w4
@@ -15127,7 +15197,7 @@ flash_info_flush:
 	sub	w0, w0, #1
 	cmp	w1, w0
 	ldp	w3, w4, [x29, 104]
-	blt	.L2514
+	blt	.L2516
 	ldr	x6, [x20, #:lo12:.LANCHOR26]
 	ldrb	w7, [x28, 1]
 	strh	wzr, [x28, 2]
@@ -15135,32 +15205,32 @@ flash_info_flush:
 	ldrh	w1, [x6, 16]
 	add	w0, w0, 1
 	str	w0, [x6, 4]
-	ldrb	w0, [x21, #:lo12:.LANCHOR159]
+	ldrb	w0, [x21, #:lo12:.LANCHOR160]
 	add	w1, w1, 1
 	strb	w0, [x28, 1]
 	mov	x0, x6
-	strb	w7, [x21, #:lo12:.LANCHOR159]
+	strb	w7, [x21, #:lo12:.LANCHOR160]
 	strh	w1, [x0, 16]!
 	ldr	w1, [x6, 8]
 	bl	js_hash
 	ldrh	w19, [x22]
 	str	w0, [x6, 12]
 	mul	w19, w19, w7
-.L2523:
+.L2525:
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_erase_block
-	b	.L2515
-.L2518:
+	b	.L2517
+.L2520:
 	mov	w26, 1
-	b	.L2513
-.L2514:
+	b	.L2515
+.L2516:
 	madd	w19, w19, w4, w3
-	cbz	w1, .L2523
-.L2515:
+	cbz	w1, .L2525
+.L2517:
 	ldr	x2, [x20, #:lo12:.LANCHOR26]
 	mov	w1, w19
-	ldr	x3, [x23, #:lo12:.LANCHOR158]
+	ldr	x3, [x23, #:lo12:.LANCHOR159]
 	mov	w5, 1
 	mov	w4, 4
 	ldr	w0, [x2, 4]
@@ -15174,14 +15244,14 @@ flash_info_flush:
 	ldrh	w1, [x27, 2]
 	add	w1, w1, 1
 	strh	w1, [x27, 2]
-	bne	.L2516
+	bne	.L2518
 	mov	w1, w19
-	adrp	x0, .LC148
-	add	x0, x0, :lo12:.LC148
+	adrp	x0, .LC151
+	add	x0, x0, :lo12:.LC151
 	bl	printf
-	b	.L2513
-.L2516:
-	cbz	w26, .L2518
+	b	.L2515
+.L2518:
+	cbz	w26, .L2520
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -15205,23 +15275,25 @@ nand_flash_init:
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	tbz	x0, 12, .L2525
-	adrp	x2, .LANCHOR192
+	tbz	x0, 12, .L2527
+	adrp	x2, .LANCHOR193
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR192
-	mov	w1, 2220
+	add	x2, x2, :lo12:.LANCHOR193
+	mov	w1, 2239
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2525:
-	mov	x0, x19
+.L2527:
+	adrp	x0, .LANCHOR155
 	adrp	x23, .LANCHOR16
+	adrp	x22, .LANCHOR41
+	add	x24, x22, :lo12:.LANCHOR41
+	str	wzr, [x0, #:lo12:.LANCHOR155]
+	mov	x0, x19
 	bl	nandc_init
 	adrp	x19, .LANCHOR34
-	adrp	x22, .LANCHOR41
 	add	x0, x19, :lo12:.LANCHOR34
-	add	x24, x22, :lo12:.LANCHOR41
-	str	x0, [x23, #:lo12:.LANCHOR16]
 	mov	x25, x24
+	str	x0, [x23, #:lo12:.LANCHOR16]
 	adrp	x0, .LANCHOR18
 	mov	w1, 1
 	mov	w20, 0
@@ -15237,19 +15309,19 @@ nand_flash_init:
 	adrp	x0, .LANCHOR136
 	add	x0, x0, :lo12:.LANCHOR136
 	bl	ftl_memset
-.L2531:
+.L2533:
 	mov	x1, x24
 	mov	w0, w20
 	bl	flash_read_id
-	cbnz	w20, .L2526
+	cbnz	w20, .L2528
 	ldrb	w0, [x25]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bls	.L2527
-.L2529:
+	bls	.L2529
+.L2531:
 	mov	w19, -2
-.L2524:
+.L2526:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -15257,56 +15329,56 @@ nand_flash_init:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2527:
+.L2529:
 	ldrb	w0, [x25, 1]
 	cmp	w0, 255
-	beq	.L2529
-.L2526:
+	beq	.L2531
+.L2528:
 	ldrb	w0, [x24]
 	cmp	w0, 181
-	bne	.L2530
+	bne	.L2532
 	strb	w26, [x24]
-.L2530:
+.L2532:
 	add	w20, w20, 1
 	add	x24, x24, 8
 	and	w20, w20, 255
 	cmp	w20, 4
-	bne	.L2531
-	adrp	x0, .LANCHOR193
-	add	x8, x0, :lo12:.LANCHOR193
+	bne	.L2533
+	adrp	x0, .LANCHOR194
+	add	x8, x0, :lo12:.LANCHOR194
 	add	x8, x8, 1
 	mov	x7, x0
 	add	x12, x22, :lo12:.LANCHOR41
 	mov	x10, 0
-.L2534:
+.L2536:
 	ldrb	w2, [x8, -1]
 	mov	w11, w10
 	lsl	x24, x10, 5
 	mov	x1, x12
 	mov	x0, x8
 	bl	flash_mem_cmp8
-	cbnz	w0, .L2532
-	add	x0, x7, :lo12:.LANCHOR193
+	cbnz	w0, .L2534
+	add	x0, x7, :lo12:.LANCHOR194
 	ubfiz	x11, x11, 5, 32
 	add	x24, x0, x24
 	add	x0, x0, x11
-	adrp	x1, .LANCHOR194
-	add	x4, x1, :lo12:.LANCHOR194
+	adrp	x1, .LANCHOR195
+	add	x4, x1, :lo12:.LANCHOR195
 	ldrb	w3, [x0, 22]
 	mov	x0, 0
-.L2533:
+.L2535:
 	lsl	x5, x0, 5
 	mov	w2, w0
 	ldrb	w5, [x5, x4]
 	cmp	w5, w3
-	beq	.L2535
+	beq	.L2537
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L2533
+	bne	.L2535
 	mov	w2, w0
-.L2535:
+.L2537:
 	ubfiz	x0, x2, 5, 32
-	add	x1, x1, :lo12:.LANCHOR194
+	add	x1, x1, :lo12:.LANCHOR195
 	add	x1, x1, x0
 	mov	w2, 32
 	adrp	x0, .LANCHOR19
@@ -15320,41 +15392,41 @@ nand_flash_init:
 	bl	ftl_memcpy
 	ldrb	w0, [x24, #:lo12:.LANCHOR27]
 	cmp	w0, 8
-	bhi	.L2536
+	bhi	.L2538
 	ldrb	w1, [x20, 20]
 	cmp	w1, 60
-	bls	.L2537
+	bls	.L2539
 	mov	w1, 60
 	strb	w1, [x20, 20]
-.L2537:
+.L2539:
 	cmp	w0, 8
-	bne	.L2536
+	bne	.L2538
 	ldrb	w0, [x22, #:lo12:.LANCHOR41]
 	mov	w1, 137
 	cmp	w0, 44
 	ccmp	w0, w1, 4, ne
-	bne	.L2536
+	bne	.L2538
 	add	x0, x19, :lo12:.LANCHOR34
 	ldrb	w1, [x0, 28]
 	cmp	w1, 3
-	bne	.L2536
+	bne	.L2538
 	strb	wzr, [x0, 28]
-.L2536:
+.L2538:
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2538
-	adrp	x2, .LANCHOR192
+	tbz	x0, 12, .L2540
+	adrp	x2, .LANCHOR193
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR192
-	mov	w1, 2244
+	add	x2, x2, :lo12:.LANCHOR193
+	mov	w1, 2264
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2538:
+.L2540:
 	mov	w0, 16384
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR161
+	adrp	x1, .LANCHOR162
 	adrp	x22, .LANCHOR26
 	add	x20, x19, :lo12:.LANCHOR34
-	str	x0, [x1, #:lo12:.LANCHOR161]
+	str	x0, [x1, #:lo12:.LANCHOR162]
 	mov	w0, 16384
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR151
@@ -15364,33 +15436,33 @@ nand_flash_init:
 	str	x0, [x22, #:lo12:.LANCHOR26]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR160
-	str	x0, [x1, #:lo12:.LANCHOR160]
+	adrp	x1, .LANCHOR161
+	str	x0, [x1, #:lo12:.LANCHOR161]
 	mov	w0, 64
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR153
 	str	x0, [x1, #:lo12:.LANCHOR153]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR158
-	str	x0, [x1, #:lo12:.LANCHOR158]
-	adrp	x0, .LANCHOR195
-	strb	wzr, [x0, #:lo12:.LANCHOR195]
+	adrp	x1, .LANCHOR159
+	str	x0, [x1, #:lo12:.LANCHOR159]
+	adrp	x0, .LANCHOR196
+	strb	wzr, [x0, #:lo12:.LANCHOR196]
 	bl	flash_die_info_init
 	ldrb	w0, [x20, 18]
 	bl	flash_lsb_page_tbl_build
 	ldrb	w0, [x20, 20]
-	adrp	x20, .LANCHOR156
+	adrp	x20, .LANCHOR157
 	bl	nandc_bch_sel
-	str	xzr, [x20, #:lo12:.LANCHOR156]
+	str	xzr, [x20, #:lo12:.LANCHOR157]
 	ldr	x1, [x23, #:lo12:.LANCHOR16]
 	adrp	x23, .LANCHOR42
 	ldrh	w0, [x1, 16]
 	ubfx	x2, x0, 8, 3
 	strb	w2, [x23, #:lo12:.LANCHOR42]
-	adrp	x2, .LANCHOR165
+	adrp	x2, .LANCHOR166
 	ubfx	x3, x0, 3, 1
-	strb	w3, [x2, #:lo12:.LANCHOR165]
+	strb	w3, [x2, #:lo12:.LANCHOR166]
 	adrp	x2, .LANCHOR38
 	ubfx	x3, x0, 4, 1
 	strb	w3, [x2, #:lo12:.LANCHOR38]
@@ -15411,178 +15483,172 @@ nand_flash_init:
 	strb	w2, [x1, #:lo12:.LANCHOR17]
 	ldrb	w2, [x24, #:lo12:.LANCHOR27]
 	cmp	w2, 9
-	bne	.L2539
+	bne	.L2541
 	mov	w2, 70
 	strb	w2, [x1, #:lo12:.LANCHOR17]
-.L2539:
+.L2541:
 	add	x19, x19, :lo12:.LANCHOR34
-	adrp	x1, .LANCHOR167
+	adrp	x1, .LANCHOR168
 	adrp	x25, .LANCHOR23
-	strb	w0, [x1, #:lo12:.LANCHOR167]
+	strb	w0, [x1, #:lo12:.LANCHOR168]
 	ldrh	w1, [x19, 16]
 	ldrb	w0, [x19, 19]
 	strb	w0, [x25, #:lo12:.LANCHOR23]
-	tbz	x1, 6, .L2541
+	tbz	x1, 6, .L2542
 	sub	w1, w0, #17
 	and	w1, w1, 255
 	cmp	w1, 2
-	bhi	.L2542
-	adrp	x1, micron_read_retrial
-	add	x1, x1, :lo12:micron_read_retrial
-	str	x1, [x20, #:lo12:.LANCHOR156]
-	cmp	w0, 19
+	bhi	.L2543
+	adrp	x0, micron_read_retrial
+	mov	w1, 15
+	add	x0, x0, :lo12:micron_read_retrial
+	str	x0, [x20, #:lo12:.LANCHOR157]
+.L2593:
 	adrp	x0, .LANCHOR154
-	beq	.L2543
-	mov	w1, 7
-.L2590:
 	strb	w1, [x0, #:lo12:.LANCHOR154]
-	b	.L2541
-.L2532:
+	b	.L2542
+.L2534:
 	add	x10, x10, 1
 	add	x8, x8, 32
-	cmp	x10, 32
-	bne	.L2534
-	b	.L2529
+	cmp	x10, 36
+	bne	.L2536
+	b	.L2531
 .L2543:
-	mov	w1, 15
-	b	.L2590
-.L2542:
 	sub	w1, w0, #65
 	cmp	w0, 33
 	and	w1, w1, 255
 	ccmp	w1, 1, 0, ne
-	bhi	.L2545
+	bhi	.L2544
 	adrp	x0, toshiba_read_retrial
 	add	x0, x0, :lo12:toshiba_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR156]
+	str	x0, [x20, #:lo12:.LANCHOR157]
 	adrp	x0, .LANCHOR25
 	mov	w1, 4
 	strb	w1, [x0, #:lo12:.LANCHOR25]
 .L2592:
 	mov	w1, 7
-	adrp	x0, .LANCHOR154
-	b	.L2590
-.L2545:
+	b	.L2593
+.L2544:
 	sub	w2, w0, #34
 	sub	w1, w0, #67
 	and	w2, w2, 255
 	and	w1, w1, 255
 	cmp	w2, 1
 	ccmp	w1, 1, 0, hi
-	bhi	.L2546
+	bhi	.L2545
 	adrp	x2, toshiba_read_retrial
 	add	x2, x2, :lo12:toshiba_read_retrial
-	str	x2, [x20, #:lo12:.LANCHOR156]
+	str	x2, [x20, #:lo12:.LANCHOR157]
 	cmp	w0, 35
 	mov	w2, 68
 	ccmp	w0, w2, 4, ne
 	adrp	x0, .LANCHOR154
-	beq	.L2547
+	beq	.L2546
 	mov	w2, 7
-.L2589:
+.L2591:
 	strb	w2, [x0, #:lo12:.LANCHOR154]
 	cmp	w1, 1
 	adrp	x0, .LANCHOR25
-	bhi	.L2549
+	bhi	.L2548
 	mov	w1, 4
-.L2591:
+.L2594:
 	strb	w1, [x0, #:lo12:.LANCHOR25]
-.L2541:
+.L2542:
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2550
-	adrp	x2, .LANCHOR192
+	tbz	x0, 12, .L2549
+	adrp	x2, .LANCHOR193
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR192
-	mov	w1, 2292
+	add	x2, x2, :lo12:.LANCHOR193
+	mov	w1, 2312
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2550:
+.L2549:
 	adrp	x24, .LANCHOR20
 	ldrb	w0, [x23, #:lo12:.LANCHOR42]
 	strb	wzr, [x24, #:lo12:.LANCHOR20]
-	tbz	x0, 0, .L2551
+	tbz	x0, 0, .L2550
 	mov	w0, 4
 	bl	nandc_set_if_mode
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
-.L2593:
+.L2595:
 	bl	nandc_set_if_mode
 	bl	flash_info_blk_init
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L2553
+	bne	.L2552
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2554
-	adrp	x2, .LANCHOR192
+	tbz	x0, 12, .L2553
+	adrp	x2, .LANCHOR193
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR192
-	mov	w1, 2313
+	add	x2, x2, :lo12:.LANCHOR193
+	mov	w1, 2347
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2554:
+.L2553:
 	ldr	x0, [x22, #:lo12:.LANCHOR26]
 	mov	w1, 17
 	strb	w1, [x0, 32]
-	b	.L2524
-.L2547:
+	b	.L2526
+.L2546:
 	mov	w2, 17
-	b	.L2589
-.L2549:
-	mov	w1, 5
 	b	.L2591
-.L2546:
-	sub	w0, w0, #36
+.L2548:
+	mov	w1, 5
+	b	.L2594
+.L2545:
+	sub	w0, w0, #36
 	and	w0, w0, 255
 	cmp	w0, 1
-	bhi	.L2541
+	bhi	.L2542
 	adrp	x0, toshiba_3d_read_retrial
 	add	x0, x0, :lo12:toshiba_3d_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR156]
+	str	x0, [x20, #:lo12:.LANCHOR157]
 	b	.L2592
-.L2551:
+.L2550:
 	mov	w0, 4
-	b	.L2593
-.L2553:
+	b	.L2595
+.L2552:
 	ldrb	w0, [x25, #:lo12:.LANCHOR23]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 6
-	bhi	.L2555
+	bhi	.L2554
 	adrp	x0, hynix_read_retrial
 	add	x0, x0, :lo12:hynix_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR156]
-.L2555:
+	str	x0, [x20, #:lo12:.LANCHOR157]
+.L2554:
 	ldrb	w0, [x23, #:lo12:.LANCHOR42]
-	tbz	x0, 2, .L2557
+	tbz	x0, 2, .L2556
 	ldr	x0, [x22, #:lo12:.LANCHOR26]
 	ldrb	w0, [x0, 19]
-	cbz	w0, .L2557
-	adrp	x0, .LANCHOR159
-	ldrb	w1, [x0, #:lo12:.LANCHOR159]
+	cbz	w0, .L2556
+	adrp	x0, .LANCHOR160
+	ldrb	w1, [x0, #:lo12:.LANCHOR160]
 	adrp	x0, .LANCHOR2
 	ldrh	w0, [x0, #:lo12:.LANCHOR2]
 	mul	w1, w1, w0
 	mov	w0, 0
 	bl	flash_ddr_para_scan
 	ldrb	w0, [x24, #:lo12:.LANCHOR20]
-	cbnz	w0, .L2557
+	cbnz	w0, .L2556
 	ldr	x0, [x22, #:lo12:.LANCHOR26]
 	strb	wzr, [x0, 19]
 	bl	flash_info_flush
-.L2557:
+.L2556:
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2559
-	adrp	x2, .LANCHOR192
+	tbz	x0, 12, .L2558
+	adrp	x2, .LANCHOR193
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR192
-	mov	w1, 2370
+	add	x2, x2, :lo12:.LANCHOR193
+	mov	w1, 2404
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2559:
+.L2558:
 	bl	nand_flash_print_info
 	mov	w19, 0
-	b	.L2524
+	b	.L2526
 	.size	nand_flash_init, .-nand_flash_init
 	.section	.text.ftl_sysblk_dump,"ax",@progbits
 	.align	2
@@ -15610,20 +15676,20 @@ ftl_sysblk_dump:
 	add	x27, x27, :lo12:.LANCHOR105
 	add	x28, x28, :lo12:.LANCHOR121
 	mov	w19, 0
-.L2595:
+.L2597:
 	ldrh	w0, [x26]
 	cmp	w0, w19
-	bhi	.L2597
+	bhi	.L2599
 	mov	x0, x25
 	bl	buf_free
-	cbz	w20, .L2598
-	adrp	x1, .LANCHOR196
+	cbz	w20, .L2600
+	adrp	x1, .LANCHOR197
 	adrp	x0, .LC0
 	mov	w2, 1338
-	add	x1, x1, :lo12:.LANCHOR196
+	add	x1, x1, :lo12:.LANCHOR197
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2598:
+.L2600:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
@@ -15633,7 +15699,7 @@ ftl_sysblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 144
 	ret
-.L2597:
+.L2599:
 	ldrh	w21, [x27]
 	ldrb	w3, [x28]
 	ldr	x1, [x25, 8]
@@ -15662,19 +15728,19 @@ ftl_sysblk_dump:
 	mov	w1, w23
 	ldp	w5, w6, [x0]
 	ldr	w7, [x0, 8]
-	adrp	x0, .LC149
-	add	x0, x0, :lo12:.LC149
+	adrp	x0, .LC152
+	add	x0, x0, :lo12:.LC152
 	bl	printf
 	mov	w3, 32
 	mov	w2, 4
 	add	x1, x24, 704
-	adrp	x0, .LC150
-	add	x0, x0, :lo12:.LC150
+	adrp	x0, .LC153
+	add	x0, x0, :lo12:.LC153
 	bl	rknand_print_hex
 	cmp	w22, 512
 	ccmn	w22, #1, 4, ne
 	csinc	w20, w20, wzr, ne
-	b	.L2595
+	b	.L2597
 	.size	ftl_sysblk_dump, .-ftl_sysblk_dump
 	.section	.text.dump_ftl_info,"ax",@progbits
 	.align	2
@@ -15685,32 +15751,32 @@ dump_ftl_info:
 	adrp	x0, .LANCHOR51
 	add	x29, sp, 0
 	ldrb	w1, [x0, #:lo12:.LANCHOR51]
-	adrp	x0, .LC151
+	adrp	x0, .LC154
 	stp	x19, x20, [sp, 16]
-	add	x0, x0, :lo12:.LC151
+	add	x0, x0, :lo12:.LC154
 	stp	x21, x22, [sp, 32]
 	adrp	x22, .LANCHOR97
 	adrp	x19, .LANCHOR10
 	adrp	x20, .LANCHOR80
 	bl	printf
 	adrp	x21, .LANCHOR6
-	adrp	x0, .LANCHOR177
-	add	x1, x0, :lo12:.LANCHOR177
+	adrp	x0, .LANCHOR178
+	add	x1, x0, :lo12:.LANCHOR178
 	ldrh	w3, [x1, 2]
 	ldrb	w2, [x1, 1]
-	ldrb	w1, [x0, #:lo12:.LANCHOR177]
-	adrp	x0, .LC152
-	add	x0, x0, :lo12:.LC152
+	ldrb	w1, [x0, #:lo12:.LANCHOR178]
+	adrp	x0, .LC155
+	add	x0, x0, :lo12:.LC155
 	bl	printf
 	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	ldrh	w2, [x0, 140]
 	ldrh	w1, [x0, 130]
-	adrp	x0, .LC153
-	add	x0, x0, :lo12:.LC153
+	adrp	x0, .LC156
+	add	x0, x0, :lo12:.LC156
 	bl	printf
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
-	adrp	x0, .LC154
-	add	x0, x0, :lo12:.LC154
+	adrp	x0, .LC157
+	add	x0, x0, :lo12:.LC157
 	ldrh	w5, [x1, 26]
 	ldrh	w4, [x1, 22]
 	ldrb	w3, [x1, 21]
@@ -15718,8 +15784,8 @@ dump_ftl_info:
 	ldrh	w1, [x1, 16]
 	bl	printf
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
-	adrp	x0, .LC155
-	add	x0, x0, :lo12:.LC155
+	adrp	x0, .LC158
+	add	x0, x0, :lo12:.LC158
 	ldrh	w5, [x1, 58]
 	ldrh	w4, [x1, 54]
 	ldrb	w3, [x1, 53]
@@ -15728,8 +15794,8 @@ dump_ftl_info:
 	bl	printf
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
 	adrp	x19, .LANCHOR73
-	adrp	x0, .LC156
-	add	x0, x0, :lo12:.LC156
+	adrp	x0, .LC159
+	add	x0, x0, :lo12:.LC159
 	ldrh	w5, [x1, 90]
 	ldrh	w4, [x1, 86]
 	ldrb	w3, [x1, 85]
@@ -15742,21 +15808,21 @@ dump_ftl_info:
 	mul	w3, w3, w0
 	adrp	x0, .LANCHOR111
 	ldr	x1, [x0, #:lo12:.LANCHOR111]
-	adrp	x0, .LC157
+	adrp	x0, .LC160
 	lsl	w3, w3, 1
-	add	x0, x0, :lo12:.LC157
+	add	x0, x0, :lo12:.LC160
 	bl	rknand_print_hex
 	adrp	x0, .LANCHOR9
 	ldrh	w3, [x21, #:lo12:.LANCHOR6]
 	mov	w2, 2
 	ldr	x1, [x0, #:lo12:.LANCHOR9]
-	adrp	x0, .LC158
-	add	x0, x0, :lo12:.LC158
+	adrp	x0, .LC161
+	add	x0, x0, :lo12:.LC161
 	bl	rknand_print_hex
 	ldr	x1, [x22, #:lo12:.LANCHOR97]
 	mov	w2, 4
-	adrp	x0, .LC150
-	add	x0, x0, :lo12:.LC150
+	adrp	x0, .LC153
+	add	x0, x0, :lo12:.LC153
 	add	x1, x1, 704
 	ldrh	w3, [x1, -6]
 	bl	rknand_print_hex
@@ -15764,15 +15830,15 @@ dump_ftl_info:
 	ldrh	w3, [x21, #:lo12:.LANCHOR6]
 	mov	w2, 4
 	ldr	x1, [x0, #:lo12:.LANCHOR7]
-	adrp	x0, .LC159
-	add	x0, x0, :lo12:.LC159
+	adrp	x0, .LC162
+	add	x0, x0, :lo12:.LC162
 	bl	rknand_print_hex
 	mov	w3, 256
 	mov	w2, 2
 	adrp	x1, .LANCHOR110
-	adrp	x0, .LC160
+	adrp	x0, .LC163
 	add	x1, x1, :lo12:.LANCHOR110
-	add	x0, x0, :lo12:.LC160
+	add	x0, x0, :lo12:.LC163
 	bl	rknand_print_hex
 	ldrb	w0, [x19, #:lo12:.LANCHOR73]
 	mov	w2, 2
@@ -15784,8 +15850,8 @@ dump_ftl_info:
 	ldp	x29, x30, [sp], 48
 	lsl	w3, w3, 1
 	ldr	x1, [x0, #:lo12:.LANCHOR112]
-	adrp	x0, .LC161
-	add	x0, x0, :lo12:.LC161
+	adrp	x0, .LC164
+	add	x0, x0, :lo12:.LC164
 	b	rknand_print_hex
 	.size	dump_ftl_info, .-dump_ftl_info
 	.section	.text.pm_ppa_update_check,"ax",@progbits
@@ -15812,20 +15878,20 @@ pm_ppa_update_check:
 	ubfx	x3, x3, 5, 3
 	cmp	w3, 1
 	ccmp	w3, 7, 4, ne
-	bne	.L2609
+	bne	.L2611
 	stp	x29, x30, [sp, -16]!
 	mov	w3, w2
 	mov	w2, w1
 	mov	x1, x0
 	add	x29, sp, 0
-	adrp	x0, .LC162
-	add	x0, x0, :lo12:.LC162
+	adrp	x0, .LC165
+	add	x0, x0, :lo12:.LC165
 	bl	printf
 	bl	dump_ftl_info
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
-.L2609:
+.L2611:
 	mov	w0, 0
 	ret
 	.size	pm_ppa_update_check, .-pm_ppa_update_check
@@ -15841,42 +15907,42 @@ load_l2p_region:
 	and	w19, w0, 65535
 	stp	x23, x24, [sp, 48]
 	cmp	w20, 31
-	bls	.L2615
-	adrp	x1, .LANCHOR197
+	bls	.L2617
+	adrp	x1, .LANCHOR198
 	adrp	x0, .LC0
 	mov	w2, 31
-	add	x1, x1, :lo12:.LANCHOR197
+	add	x1, x1, :lo12:.LANCHOR198
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2615:
+.L2617:
 	adrp	x22, .LANCHOR97
 	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	ldrh	w2, [x0, 698]
 	cmp	w2, w19
-	bcs	.L2616
+	bcs	.L2618
 	mov	w1, w19
-	adrp	x0, .LC163
-	add	x0, x0, :lo12:.LC163
+	adrp	x0, .LC166
+	add	x0, x0, :lo12:.LC166
 	bl	printf
-	adrp	x0, .LANCHOR198
+	adrp	x0, .LANCHOR199
 	mov	w1, 255
-	ldrh	w2, [x0, #:lo12:.LANCHOR198]
+	ldrh	w2, [x0, #:lo12:.LANCHOR199]
 	mov	x0, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
 	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	ldrh	w0, [x0, 698]
 	cmp	w0, w19
-	bcs	.L2618
+	bcs	.L2620
 	mov	w2, 35
-.L2623:
-	adrp	x1, .LANCHOR197
+.L2625:
+	adrp	x1, .LANCHOR198
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR197
+	add	x1, x1, :lo12:.LANCHOR198
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L2618
-.L2616:
+	b	.L2620
+.L2618:
 	add	x0, x0, x19, sxtw 2
 	sbfiz	x20, x20, 4, 32
 	ldr	w21, [x0, 704]
@@ -15885,69 +15951,69 @@ load_l2p_region:
 	add	x23, x0, x20
 	strh	w19, [x0, x20]
 	strh	wzr, [x23, 2]
-	cbnz	w21, .L2619
+	cbnz	w21, .L2621
 	mov	w2, 0
 	mov	w1, w19
-	adrp	x0, .LC164
-	add	x0, x0, :lo12:.LC164
+	adrp	x0, .LC167
+	add	x0, x0, :lo12:.LC167
 	bl	printf
-	adrp	x0, .LANCHOR198
+	adrp	x0, .LANCHOR199
 	mov	w1, 255
-	ldrh	w2, [x0, #:lo12:.LANCHOR198]
+	ldrh	w2, [x0, #:lo12:.LANCHOR199]
 	ldr	x0, [x23, 8]
 	bl	ftl_memset
-.L2618:
+.L2620:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2619:
-	adrp	x20, .LANCHOR189
+.L2621:
+	adrp	x20, .LANCHOR190
 	adrp	x24, .LANCHOR121
 	ldr	x1, [x23, 8]
 	mov	w0, w21
-	ldr	x2, [x20, #:lo12:.LANCHOR189]
+	ldr	x2, [x20, #:lo12:.LANCHOR190]
 	ldrb	w3, [x24, #:lo12:.LANCHOR121]
 	bl	ftl_read_ppa_page
-	ldr	x1, [x20, #:lo12:.LANCHOR189]
+	ldr	x1, [x20, #:lo12:.LANCHOR190]
 	ldr	w2, [x1]
 	cmp	w2, w19
-	beq	.L2620
+	beq	.L2622
 	mov	w4, w21
 	mov	w3, w0
 	mov	w1, w19
-	adrp	x0, .LC165
-	add	x0, x0, :lo12:.LC165
+	adrp	x0, .LC168
+	add	x0, x0, :lo12:.LC168
 	bl	printf
 	ldr	x1, [x22, #:lo12:.LANCHOR97]
 	mov	w2, 4
-	adrp	x0, .LC166
-	add	x0, x0, :lo12:.LC166
+	adrp	x0, .LC169
+	add	x0, x0, :lo12:.LC169
 	add	x1, x1, 704
 	ldrh	w3, [x1, -6]
 	bl	rknand_print_hex
 	ldr	x1, [x23, 8]
 	mov	w2, 4
 	ldrb	w3, [x24, #:lo12:.LANCHOR121]
-	adrp	x0, .LC167
-	add	x0, x0, :lo12:.LC167
+	adrp	x0, .LC170
+	add	x0, x0, :lo12:.LC170
 	lsl	w3, w3, 7
 	bl	rknand_print_hex
-	ldr	x1, [x20, #:lo12:.LANCHOR189]
-	adrp	x0, .LC168
+	ldr	x1, [x20, #:lo12:.LANCHOR190]
+	adrp	x0, .LC171
 	mov	w3, 16
 	mov	w2, 4
-	add	x0, x0, :lo12:.LC168
+	add	x0, x0, :lo12:.LC171
 	bl	rknand_print_hex
-.L2620:
-	ldr	x0, [x20, #:lo12:.LANCHOR189]
+.L2622:
+	ldr	x0, [x20, #:lo12:.LANCHOR190]
 	ldr	w0, [x0]
 	cmp	w19, w0
-	beq	.L2618
+	beq	.L2620
 	mov	w2, 59
-	b	.L2623
+	b	.L2625
 	.size	load_l2p_region, .-load_l2p_region
 	.section	.text.pm_gc,"ax",@progbits
 	.align	2
@@ -15967,21 +16033,21 @@ pm_gc:
 	str	x25, [sp, 64]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L2626
+	blt	.L2628
 	bl	pm_free_sblk
 	ldr	x2, [x20, #:lo12:.LANCHOR97]
 	ldrh	w1, [x19, #:lo12:.LANCHOR141]
 	sub	w1, w1, #1
 	ldrh	w3, [x2, 688]
 	cmp	w3, w1
-	blt	.L2626
+	blt	.L2628
 	add	x0, x2, x0, uxth 1
 	ldrh	w21, [x0, 416]
 	mov	w0, 65535
 	cmp	w21, w0
-	bne	.L2628
-	adrp	x1, .LANCHOR199
-	add	x1, x1, :lo12:.LANCHOR199
+	bne	.L2630
+	adrp	x1, .LANCHOR200
+	add	x1, x1, :lo12:.LANCHOR200
 	mov	w2, 131
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
@@ -15990,7 +16056,7 @@ pm_gc:
 	ldr	x1, [x20, #:lo12:.LANCHOR97]
 	add	x0, x1, x0, uxth 1
 	ldrh	w21, [x0, 416]
-.L2628:
+.L2630:
 	bl	pm_select_ram_region
 	and	x24, x0, 65535
 	adrp	x1, .LANCHOR130
@@ -16002,28 +16068,28 @@ pm_gc:
 	ldrh	w0, [x2, x0]
 	mov	w2, 65535
 	cmp	w0, w2
-	beq	.L2629
+	beq	.L2631
 	ldr	x1, [x19, 8]
-	cbz	x1, .L2629
+	cbz	x1, .L2631
 	ldrsh	w2, [x19, 2]
-	tbz	w2, #31, .L2629
+	tbz	w2, #31, .L2631
 	bl	pm_write_page
 	ldrh	w0, [x19, 2]
 	and	w0, w0, 32767
 	strh	w0, [x19, 2]
-.L2629:
+.L2631:
 	add	x1, x23, :lo12:.LANCHOR130
 	adrp	x25, .LANCHOR99
 	add	x24, x1, x24, lsl 4
 	add	x25, x25, :lo12:.LANCHOR99
 	mov	w19, 0
-.L2630:
+.L2632:
 	ldr	x1, [x20, #:lo12:.LANCHOR97]
 	ldrh	w0, [x1, 698]
 	cmp	w0, w19
-	bhi	.L2632
+	bhi	.L2634
 	bl	pm_free_sblk
-.L2626:
+.L2628:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -16031,7 +16097,7 @@ pm_gc:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2632:
+.L2634:
 	add	x1, x1, x19, sxtw 2
 	ldrh	w3, [x25]
 	mov	w0, 21
@@ -16046,7 +16112,7 @@ pm_gc:
 	ldrb	w1, [x1, #:lo12:.LANCHOR98]
 	udiv	w0, w0, w1
 	cmp	w21, w0, uxth
-	bne	.L2631
+	bne	.L2633
 	mov	w1, w22
 	mov	w0, w19
 	bl	load_l2p_region
@@ -16055,10 +16121,10 @@ pm_gc:
 	bl	pm_write_page
 	mov	w0, -1
 	strh	w0, [x24]
-.L2631:
+.L2633:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L2630
+	b	.L2632
 	.size	pm_gc, .-pm_gc
 	.section	.text.pm_flush_id,"ax",@progbits
 	.align	2
@@ -16080,10 +16146,10 @@ pm_flush_id:
 	strh	w0, [x19, 2]
 	adrp	x19, .LANCHOR128
 	ldr	w0, [x19, #:lo12:.LANCHOR128]
-	cbz	w0, .L2638
+	cbz	w0, .L2640
 	bl	pm_gc
 	str	wzr, [x19, #:lo12:.LANCHOR128]
-.L2638:
+.L2640:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -16101,17 +16167,17 @@ pm_flush:
 	add	x19, x19, :lo12:.LANCHOR130
 	mov	w20, 0
 	add	x19, x19, 2
-.L2645:
+.L2647:
 	ldrsh	w0, [x19]
-	tbz	w0, #31, .L2644
+	tbz	w0, #31, .L2646
 	mov	w0, w20
 	bl	pm_flush_id
-.L2644:
+.L2646:
 	add	w20, w20, 1
 	add	x19, x19, 16
 	and	w20, w20, 65535
 	cmp	w20, 32
-	bne	.L2645
+	bne	.L2647
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -16165,35 +16231,35 @@ pm_init:
 	stp	x21, x22, [sp, 32]
 	adrp	x20, .LANCHOR130
 	str	wzr, [x0, #:lo12:.LANCHOR128]
-	adrp	x0, .LANCHOR190
+	adrp	x0, .LANCHOR191
 	stp	x25, x26, [sp, 64]
 	add	x19, x20, :lo12:.LANCHOR130
-	strb	w1, [x0, #:lo12:.LANCHOR190]
+	strb	w1, [x0, #:lo12:.LANCHOR191]
 	mov	w0, 64
 	stp	x27, x28, [sp, 80]
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR189
+	adrp	x1, .LANCHOR190
 	adrp	x22, .LANCHOR121
 	add	x23, x19, 512
 	mov	x21, x1
 	add	x22, x22, :lo12:.LANCHOR121
-	str	x0, [x1, #:lo12:.LANCHOR189]
+	str	x0, [x1, #:lo12:.LANCHOR190]
 	mov	w25, -1
-.L2655:
+.L2657:
 	strh	w25, [x19]
 	strh	wzr, [x19, 2]
-	cbz	w24, .L2654
+	cbz	w24, .L2656
 	ldrb	w0, [x22]
 	lsl	w0, w0, 9
 	bl	ftl_malloc
 	str	x0, [x19, 8]
-.L2654:
+.L2656:
 	add	x19, x19, 16
 	cmp	x19, x23
-	bne	.L2655
+	bne	.L2657
 	add	x0, x20, :lo12:.LANCHOR130
 	adrp	x19, .LANCHOR97
-	ldr	x24, [x21, #:lo12:.LANCHOR189]
+	ldr	x24, [x21, #:lo12:.LANCHOR190]
 	mov	w4, 4
 	ldr	x25, [x0, 8]
 	mov	x3, x24
@@ -16207,11 +16273,11 @@ pm_init:
 	mov	w23, w26
 	ldrh	w2, [x0, 696]
 	cmp	w2, w26
-	bgt	.L2656
+	bgt	.L2658
 	ldrh	w1, [x0, 692]
 	mov	w3, w26
-	adrp	x0, .LC169
-	add	x0, x0, :lo12:.LC169
+	adrp	x0, .LC172
+	add	x0, x0, :lo12:.LC172
 	adrp	x27, .LANCHOR105
 	adrp	x28, .LANCHOR121
 	add	x27, x27, :lo12:.LANCHOR105
@@ -16219,14 +16285,14 @@ pm_init:
 	bl	printf
 	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	ldrsh	w21, [x0, 696]
-.L2657:
+.L2659:
 	cmp	w21, w26
-	ble	.L2659
-	adrp	x0, .LANCHOR180
+	ble	.L2661
+	adrp	x0, .LANCHOR181
 	mov	w1, 1
 	add	x20, x20, :lo12:.LANCHOR130
 	add	w23, w23, 1
-	strb	w1, [x0, #:lo12:.LANCHOR180]
+	strb	w1, [x0, #:lo12:.LANCHOR181]
 	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	strh	w23, [x0, 696]
 	bl	pm_free_sblk
@@ -16236,7 +16302,7 @@ pm_init:
 	ldr	x1, [x20, 8]
 	mov	w0, -1
 	bl	pm_write_page
-.L2656:
+.L2658:
 	bl	pm_free_sblk
 	bl	pm_gc
 	mov	w0, 0
@@ -16247,7 +16313,7 @@ pm_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2659:
+.L2661:
 	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	x3, x24
 	ldrh	w1, [x27]
@@ -16266,25 +16332,25 @@ pm_init:
 	ldrh	w3, [x0, 694]
 	add	w1, w1, 1
 	str	w1, [x0, 48]
-	adrp	x0, .LC170
-	add	x0, x0, :lo12:.LC170
+	adrp	x0, .LC173
+	add	x0, x0, :lo12:.LC173
 	ldr	w1, [x24]
 	bl	printf
 	ldr	w4, [x29, 108]
 	cmp	w4, 512
 	ccmn	w4, #1, 4, ne
-	beq	.L2658
+	beq	.L2660
 	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	ldr	w0, [x24]
 	ldrh	w2, [x1, 698]
 	cmp	w0, w2
-	bcs	.L2658
+	bcs	.L2660
 	add	x0, x1, x0, uxtw 2
 	str	w22, [x0, 704]
-.L2658:
+.L2660:
 	add	w21, w21, 1
 	sxth	w21, w21
-	b	.L2657
+	b	.L2659
 	.size	pm_init, .-pm_init
 	.section	.text.pm_log2phys,"ax",@progbits
 	.align	2
@@ -16309,51 +16375,51 @@ pm_log2phys:
 	cmp	w0, w2
 	and	w25, w21, 65535
 	msub	w20, w25, w20, w0
-	bcc	.L2669
+	bcc	.L2671
 	mov	w1, w0
-	adrp	x0, .LC171
-	add	x0, x0, :lo12:.LC171
+	adrp	x0, .LC174
+	add	x0, x0, :lo12:.LC174
 	bl	printf
 	mov	w0, -1
-.L2668:
+.L2670:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2669:
+.L2671:
 	adrp	x24, .LANCHOR130
 	add	x0, x24, :lo12:.LANCHOR130
 	and	x20, x20, 65535
 	add	x0, x0, 8
 	mov	x19, 0
-.L2675:
+.L2677:
 	ldr	x1, [x0]
-	cbz	x1, .L2671
+	cbz	x1, .L2673
 	ldrh	w1, [x0, -8]
 	cmp	w1, w25
-	bne	.L2671
-.L2672:
-	cbnz	w23, .L2673
+	bne	.L2673
+.L2674:
+	cbnz	w23, .L2675
 	add	x0, x24, :lo12:.LANCHOR130
 	add	x0, x0, x19, lsl 4
 	ldr	x0, [x0, 8]
 	ldr	w0, [x0, x20, lsl 2]
 	str	w0, [x22]
-.L2674:
+.L2676:
 	add	x24, x24, :lo12:.LANCHOR130
 	add	x19, x24, x19, lsl 4
 	ldrh	w0, [x19, 2]
 	mvn	x1, x0
 	tst	x1, 32767
-	beq	.L2677
+	beq	.L2679
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L2677:
+.L2679:
 	mov	w0, 0
-	b	.L2668
-.L2673:
+	b	.L2670
+.L2675:
 	add	x0, x24, :lo12:.LANCHOR130
 	ldr	w2, [x22]
 	add	x0, x0, x19, lsl 4
@@ -16364,13 +16430,13 @@ pm_log2phys:
 	strh	w1, [x0, 2]
 	adrp	x0, .LANCHOR131
 	strb	w21, [x0, #:lo12:.LANCHOR131]
-	b	.L2674
-.L2671:
+	b	.L2676
+.L2673:
 	add	w19, w19, 1
 	add	x0, x0, 16
 	and	x19, x19, 65535
 	cmp	w19, 32
-	bne	.L2675
+	bne	.L2677
 	bl	pm_select_ram_region
 	and	x19, x0, 65535
 	sbfiz	x1, x19, 4, 32
@@ -16380,17 +16446,17 @@ pm_log2phys:
 	ldrh	w2, [x2, x1]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L2676
+	beq	.L2678
 	ldrsh	w1, [x3, 2]
-	tbz	w1, #31, .L2676
+	tbz	w1, #31, .L2678
 	bl	pm_flush_id
-.L2676:
-	adrp	x0, .LANCHOR200
+.L2678:
+	adrp	x0, .LANCHOR201
 	mov	w1, w26
-	strb	w19, [x0, #:lo12:.LANCHOR200]
+	strb	w19, [x0, #:lo12:.LANCHOR201]
 	mov	w0, w25
 	bl	load_l2p_region
-	b	.L2672
+	b	.L2674
 	.size	pm_log2phys, .-pm_log2phys
 	.section	.text.gc_recovery,"ax",@progbits
 	.align	2
@@ -16418,7 +16484,7 @@ gc_recovery:
 	mov	w0, 65535
 	cmp	w1, w0
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
-	beq	.L2684
+	beq	.L2686
 	mov	w1, -1
 	strh	w1, [x0, 130]
 	mov	w0, 1
@@ -16438,29 +16504,29 @@ gc_recovery:
 	ldrb	w0, [x2, #:lo12:.LANCHOR68]
 	str	w1, [x29, 200]
 	cmp	w0, 3
-	bne	.L2685
+	bne	.L2687
 	adrp	x0, .LANCHOR80
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	sub	w0, w0, #1
 	add	w0, w0, w1
 	orr	w0, w0, 50331648
-.L2729:
+.L2731:
 	str	w0, [x26, 40]
-.L2686:
+.L2688:
 	mov	w1, 1
 	mov	x0, x26
 	bl	sblk_read_page
 	ldr	w0, [x26, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2687
+	beq	.L2689
 	ldr	x0, [x26, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L2688
-.L2687:
+	beq	.L2690
+.L2689:
 	mov	x0, x26
 	bl	buf_free
 	ldr	x1, [x26, 24]
@@ -16473,13 +16539,13 @@ gc_recovery:
 	str	w2, [sp]
 	ldp	w3, w4, [x0]
 	ldp	w5, w6, [x0, 8]
-	adrp	x0, .LC172
+	adrp	x0, .LC175
 	ldr	w7, [x1]
-	add	x0, x0, :lo12:.LC172
+	add	x0, x0, :lo12:.LC175
 	ldr	w1, [x26, 40]
 	ldr	w2, [x26, 52]
 	bl	printf
-.L2733:
+.L2735:
 	adrp	x0, .LANCHOR9
 	ldrh	w1, [x20, 80]
 	mov	w22, 0
@@ -16488,11 +16554,11 @@ gc_recovery:
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	ldrh	w1, [x20, 80]
 	strh	w1, [x0, 130]
-.L2689:
+.L2691:
 	ldrh	w1, [x20, 80]
 	mov	w2, w22
-	adrp	x0, .LC174
-	add	x0, x0, :lo12:.LC174
+	adrp	x0, .LC177
+	add	x0, x0, :lo12:.LC177
 	bl	printf
 	mov	w0, -1
 	strh	w0, [x20, 80]
@@ -16502,9 +16568,9 @@ gc_recovery:
 	mov	w1, 65535
 	ldrh	w0, [x0, 130]
 	cmp	w0, w1
-	beq	.L2716
+	beq	.L2718
 	bl	ftl_free_sblk
-.L2716:
+.L2718:
 	adrp	x0, .LANCHOR97
 	ldr	x1, [x0, #:lo12:.LANCHOR97]
 	mov	w0, -1
@@ -16513,7 +16579,7 @@ gc_recovery:
 	strh	w0, [x1, 130]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2683:
+.L2685:
 	ldp	x19, x20, [sp, 48]
 	ldp	x21, x22, [sp, 64]
 	ldp	x23, x24, [sp, 80]
@@ -16522,16 +16588,16 @@ gc_recovery:
 	ldp	x29, x30, [sp, 32]
 	add	sp, sp, 240
 	ret
-.L2685:
+.L2687:
 	cmp	w0, 2
-	bne	.L2686
+	bne	.L2688
 	adrp	x0, .LANCHOR80
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	add	w0, w1, w0, lsl 1
 	sub	w0, w0, #1
 	orr	w0, w0, 33554432
-	b	.L2729
-.L2688:
+	b	.L2731
+.L2690:
 	adrp	x28, .LANCHOR72
 	adrp	x22, .LANCHOR73
 	adrp	x27, .LANCHOR147
@@ -16557,29 +16623,29 @@ gc_recovery:
 	ldr	x0, [x29, 168]
 	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w0, 2
-	beq	.L2690
-.L2730:
+	beq	.L2692
+.L2732:
 	str	w0, [x29, 184]
-	adrp	x25, .LC173
+	adrp	x25, .LC176
 	ldr	x0, [x29, 152]
 	mov	w23, 0
 	mov	w22, 0
 	add	x0, x0, :lo12:.LANCHOR105
 	str	x0, [x29, 128]
-	add	x0, x25, :lo12:.LC173
+	add	x0, x25, :lo12:.LC176
 	str	x0, [x29, 120]
-.L2692:
+.L2694:
 	sub	w0, w23, #1
 	str	w0, [x29, 188]
 	cmp	w23, w14
-	beq	.L2701
+	beq	.L2703
 	mov	x19, 0
-	b	.L2702
-.L2690:
+	b	.L2704
+.L2692:
 	lsl	w14, w14, 1
 	mov	w0, 1
-	b	.L2730
-.L2698:
+	b	.L2732
+.L2700:
 	ldr	x1, [x29, 128]
 	ldr	x0, [x29, 160]
 	ldrh	w1, [x1]
@@ -16589,10 +16655,10 @@ gc_recovery:
 	str	w0, [x29, 200]
 	ldrb	w1, [x1]
 	cmp	w1, 3
-	bne	.L2693
+	bne	.L2695
 	add	w0, w23, w0
 	orr	w0, w0, w25, lsl 24
-.L2731:
+.L2733:
 	str	w0, [x26, 40]
 	mov	w1, 1
 	str	w14, [x29, 112]
@@ -16604,13 +16670,13 @@ gc_recovery:
 	ldr	x0, [x26, 24]
 	ldr	w6, [x0, 4]
 	cmp	w3, w6
-	bne	.L2696
+	bne	.L2698
 	ldr	x1, [x24, #:lo12:.LANCHOR148]
 	ldr	w2, [x1, x28]
 	ldr	w1, [x0, 8]
 	cmp	w2, w1
-	beq	.L2697
-.L2696:
+	beq	.L2699
+.L2698:
 	ldr	x1, [x24, #:lo12:.LANCHOR148]
 	ldr	w2, [x0, 12]
 	str	w2, [sp]
@@ -16626,35 +16692,35 @@ gc_recovery:
 	ldr	w14, [x29, 112]
 	ldr	w0, [x0, x28]
 	cmn	w0, #1
-	beq	.L2697
+	beq	.L2699
 	mov	x0, x26
 	bl	buf_free
-	b	.L2733
-.L2693:
+	b	.L2735
+.L2695:
 	cmp	w1, 2
-	bne	.L2695
+	bne	.L2697
 	ldr	w1, [x29, 188]
 	add	w0, w0, w1
 	add	w0, w0, w25
 	orr	w0, w0, 33554432
-	b	.L2731
-.L2695:
-	add	w0, w23, w0
-	b	.L2731
+	b	.L2733
 .L2697:
+	add	w0, w23, w0
+	b	.L2733
+.L2699:
 	add	w22, w22, 1
 	add	w25, w25, 1
 	add	x28, x28, 4
-.L2700:
+.L2702:
 	ldr	w0, [x29, 184]
 	cmp	w0, w25
-	bcs	.L2698
+	bcs	.L2700
 	add	x19, x19, 1
-.L2702:
+.L2704:
 	ldr	x0, [x29, 176]
 	ldrb	w0, [x0, 9]
 	cmp	w0, w19
-	ble	.L2699
+	ble	.L2701
 	add	x0, x20, x19, lsl 1
 	str	x0, [x29, 160]
 	ldr	x0, [x29, 168]
@@ -16662,11 +16728,11 @@ gc_recovery:
 	mov	w25, 1
 	add	x0, x0, :lo12:.LANCHOR68
 	str	x0, [x29, 136]
-	b	.L2700
-.L2699:
-	add	w23, w23, 1
-	b	.L2692
+	b	.L2702
 .L2701:
+	add	w23, w23, 1
+	b	.L2694
+.L2703:
 	mov	x0, x26
 	bl	buf_free
 	ldr	x3, [x29, 144]
@@ -16685,20 +16751,20 @@ gc_recovery:
 	adrp	x0, .LANCHOR99
 	add	x0, x0, :lo12:.LANCHOR99
 	str	x0, [x29, 112]
-.L2703:
+.L2705:
 	sub	w0, w28, #1
 	str	w0, [x29, 136]
 	cmp	w23, w28
-	beq	.L2714
+	beq	.L2716
 	mov	x26, 0
-	b	.L2715
-.L2711:
+	b	.L2717
+.L2713:
 	ldr	w0, [x29, 188]
 	ldr	x1, [x27, #:lo12:.LANCHOR147]
 	sbfiz	x0, x0, 2, 32
 	ldr	w5, [x1, x0]
 	cmn	w5, #1
-	beq	.L2704
+	beq	.L2706
 	ldr	x1, [x24, #:lo12:.LANCHOR148]
 	str	w5, [x29, 108]
 	ldr	w0, [x1, x0]
@@ -16708,14 +16774,14 @@ gc_recovery:
 	str	w0, [x29, 204]
 	cmn	w0, #1
 	ldr	w5, [x29, 108]
-	bne	.L2705
+	bne	.L2707
 	mov	w0, w5
 	str	w5, [x29, 108]
 	mov	w2, 0
 	add	x1, x29, 204
 	bl	pm_log2phys
 	ldr	w5, [x29, 108]
-.L2705:
+.L2707:
 	ldr	x0, [x29, 128]
 	ldr	x1, [x29, 152]
 	ldrh	w0, [x0, 96]
@@ -16724,10 +16790,10 @@ gc_recovery:
 	ldr	x1, [x29, 168]
 	ldrb	w1, [x1, #:lo12:.LANCHOR68]
 	cmp	w1, 3
-	bne	.L2706
+	bne	.L2708
 	add	w0, w28, w0
 	orr	w0, w0, w25, lsl 24
-.L2732:
+.L2734:
 	str	w0, [x29, 200]
 	mov	w19, 21
 	ldr	x0, [x29, 112]
@@ -16745,14 +16811,14 @@ gc_recovery:
 	ldr	w0, [x29, 204]
 	cmp	w1, w0
 	and	x19, x19, 65535
-	bne	.L2709
+	bne	.L2711
 	add	x1, x29, 200
 	mov	w0, w5
 	bl	pm_log2phys
 	add	w22, w22, 1
 	mov	w0, w19
 	bl	ftl_vpn_decrement
-.L2710:
+.L2712:
 	ldr	w0, [x29, 188]
 	add	w0, w0, 1
 	str	w0, [x29, 188]
@@ -16761,68 +16827,68 @@ gc_recovery:
 	add	x0, x0, x19, lsl 2
 	ldrb	w0, [x0, 2]
 	tst	w0, 224
-	bne	.L2704
+	bne	.L2706
 	ldr	x0, [x29, 144]
 	lsl	x19, x19, 1
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x0, x19]
-	cbz	w1, .L2704
+	cbz	w1, .L2706
 	strh	wzr, [x0, x19]
-.L2704:
+.L2706:
 	add	w25, w25, 1
-.L2713:
+.L2715:
 	ldr	w0, [x29, 184]
 	cmp	w0, w25
-	bcs	.L2711
+	bcs	.L2713
 	add	x26, x26, 1
-.L2715:
+.L2717:
 	ldr	x0, [x29, 176]
 	ldrb	w0, [x0, 9]
 	cmp	w0, w26
-	ble	.L2712
+	ble	.L2714
 	add	x0, x20, x26, lsl 1
 	mov	w25, 1
 	str	x0, [x29, 128]
 	adrp	x0, .LANCHOR98
 	add	x0, x0, :lo12:.LANCHOR98
 	str	x0, [x29, 120]
-	b	.L2713
-.L2706:
+	b	.L2715
+.L2708:
 	cmp	w1, 2
-	bne	.L2708
+	bne	.L2710
 	ldr	w1, [x29, 136]
 	add	w0, w0, w1
 	add	w0, w0, w25
 	orr	w0, w0, 33554432
-	b	.L2732
-.L2708:
+	b	.L2734
+.L2710:
 	add	w0, w28, w0
-	b	.L2732
-.L2709:
+	b	.L2734
+.L2711:
 	ldr	w1, [x29, 200]
 	cmp	w0, w1
 	cinc	w22, w22, eq
-	b	.L2710
-.L2712:
-	add	w28, w28, 1
-	b	.L2703
+	b	.L2712
 .L2714:
+	add	w28, w28, 1
+	b	.L2705
+.L2716:
 	ldr	x0, [x29, 144]
 	ldrh	w1, [x20, 80]
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	strh	w22, [x0, x1, lsl 1]
 	ldrh	w0, [x20, 80]
 	bl	zftl_insert_data_list
-	b	.L2689
-.L2684:
+	b	.L2691
+.L2686:
 	ldrh	w0, [x0, 130]
 	cmp	w0, w1
-	beq	.L2683
+	beq	.L2685
 	adrp	x19, .LANCHOR97
 	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	ldrh	w1, [x1, 126]
 	cmp	w1, w0
-	bne	.L2718
+	bne	.L2720
 	bl	pm_flush
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	ldrh	w0, [x0, 130]
@@ -16832,11 +16898,11 @@ gc_recovery:
 	strh	w1, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2718:
+.L2720:
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	mov	w1, -1
 	strh	w1, [x0, 130]
-	b	.L2683
+	b	.L2685
 	.size	gc_recovery, .-gc_recovery
 	.section	.text.zftl_init,"ax",@progbits
 	.align	2
@@ -16858,21 +16924,21 @@ zftl_init:
 	strb	w0, [x1, #:lo12:.LANCHOR124]
 	adrp	x1, .LANCHOR125
 	stp	x23, x24, [sp, 48]
-	adrp	x20, .LANCHOR198
+	adrp	x20, .LANCHOR199
 	strb	wzr, [x1, #:lo12:.LANCHOR125]
-	adrp	x1, .LANCHOR172
+	adrp	x1, .LANCHOR173
 	stp	x25, x26, [sp, 64]
 	adrp	x23, .LANCHOR6
-	strb	w0, [x1, #:lo12:.LANCHOR172]
+	strb	w0, [x1, #:lo12:.LANCHOR173]
 	adrp	x0, .LANCHOR119
 	mov	w1, -1
 	stp	x27, x28, [sp, 80]
 	strb	wzr, [x0, #:lo12:.LANCHOR119]
-	adrp	x0, .LANCHOR201
-	str	w1, [x0, #:lo12:.LANCHOR201]
-	adrp	x1, .LC175
+	adrp	x0, .LANCHOR202
+	str	w1, [x0, #:lo12:.LANCHOR202]
+	adrp	x1, .LC178
 	adrp	x0, .LC91
-	add	x1, x1, :lo12:.LC175
+	add	x1, x1, :lo12:.LC178
 	add	x0, x0, :lo12:.LC91
 	bl	printf
 	adrp	x1, .LANCHOR34
@@ -16903,14 +16969,14 @@ zftl_init:
 	strh	w8, [x22, #:lo12:.LANCHOR80]
 	mul	w6, w6, w3
 	strh	w4, [x1, #:lo12:.LANCHOR105]
-	strh	w10, [x20, #:lo12:.LANCHOR198]
+	strh	w10, [x20, #:lo12:.LANCHOR199]
 	mov	w3, 1
 	and	w6, w6, 255
 	mov	w1, 0
 	strb	w6, [x21, #:lo12:.LANCHOR73]
-.L2735:
+.L2737:
 	cmp	w4, w3
-	bcs	.L2736
+	bcs	.L2738
 	mul	w2, w0, w2
 	adrp	x3, .LANCHOR99
 	sub	w1, w1, #1
@@ -16919,9 +16985,9 @@ zftl_init:
 	mov	w1, 1
 	mul	w3, w2, w7
 	lsr	w11, w3, 21
-.L2737:
+.L2739:
 	cmp	w11, w1
-	bcs	.L2738
+	bcs	.L2740
 	mov	w1, 57344
 	sub	w4, w4, #1
 	movk	w1, 0x1c, lsl 16
@@ -16929,9 +16995,9 @@ zftl_init:
 	adrp	x28, .LANCHOR118
 	sub	w11, w10, #1
 	mul	w1, w6, w1
-	adrp	x24, .LANCHOR185
+	adrp	x24, .LANCHOR186
 	mul	w8, w8, w6
-	adrp	x27, .LANCHOR203
+	adrp	x27, .LANCHOR204
 	mul	w2, w2, w6
 	adrp	x26, .LANCHOR141
 	lsl	w1, w1, w4
@@ -16939,10 +17005,10 @@ zftl_init:
 	sub	w2, w2, #1
 	adrp	x25, .LANCHOR84
 	str	w1, [x4, #:lo12:.LANCHOR58]
-	adrp	x4, .LANCHOR202
-	str	w3, [x4, #:lo12:.LANCHOR202]
+	adrp	x4, .LANCHOR203
+	str	w3, [x4, #:lo12:.LANCHOR203]
 	add	w3, w1, 24576
-	str	w3, [x27, #:lo12:.LANCHOR203]
+	str	w3, [x27, #:lo12:.LANCHOR204]
 	udiv	w0, w3, w0
 	udiv	w3, w3, w2
 	adrp	x2, .LANCHOR101
@@ -16950,7 +17016,7 @@ zftl_init:
 	add	w0, w11, w0, lsl 2
 	add	w3, w3, 8
 	udiv	w0, w0, w10
-	strh	w0, [x24, #:lo12:.LANCHOR185]
+	strh	w0, [x24, #:lo12:.LANCHOR186]
 	ubfiz	w0, w0, 4, 16
 	sdiv	w0, w0, w8
 	adrp	x8, .LANCHOR88
@@ -16963,10 +17029,10 @@ zftl_init:
 	lsr	w0, w7, 4
 	strh	w0, [x25, #:lo12:.LANCHOR84]
 	cmp	w0, 79
-	bhi	.L2739
+	bhi	.L2741
 	mov	w0, 80
 	strh	w0, [x25, #:lo12:.LANCHOR84]
-.L2739:
+.L2741:
 	adrp	x7, .LANCHOR102
 	mov	w0, 2000
 	adrp	x3, .LANCHOR100
@@ -16983,11 +17049,11 @@ zftl_init:
 	mov	w8, 32
 	cmp	w5, 2
 	strh	w8, [x0, #:lo12:.LANCHOR8]
-	beq	.L2740
+	beq	.L2742
 	adrp	x5, .LANCHOR70
 	ldrb	w5, [x5, #:lo12:.LANCHOR70]
-	cbz	w5, .L2741
-.L2740:
+	cbz	w5, .L2743
+.L2742:
 	mov	w5, 150
 	strh	w5, [x3, #:lo12:.LANCHOR100]
 	mov	w3, 64
@@ -16996,80 +17062,80 @@ zftl_init:
 	strh	w2, [x0, #:lo12:.LANCHOR8]
 	adrp	x2, .LANCHOR0
 	ldrb	w2, [x2, #:lo12:.LANCHOR0]
-	cbnz	w2, .L2741
+	cbnz	w2, .L2743
 	mov	w2, 4
 	strh	w2, [x0, #:lo12:.LANCHOR8]
 	mov	w0, 600
 	strh	w0, [x7, #:lo12:.LANCHOR102]
 	mov	w0, 128
 	strh	w0, [x6, #:lo12:.LANCHOR140]
-.L2741:
+.L2743:
 	adrp	x19, .LANCHOR14
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2743
+	tbz	x0, 12, .L2745
 	str	x4, [x29, 96]
-	adrp	x0, .LC176
-	add	x0, x0, :lo12:.LC176
+	adrp	x0, .LC179
+	add	x0, x0, :lo12:.LC179
 	bl	printf
 	ldr	x4, [x29, 96]
-.L2743:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2744
-	ldr	w1, [x4, #:lo12:.LANCHOR202]
-	adrp	x0, .LC177
-	add	x0, x0, :lo12:.LC177
-	bl	printf
-.L2744:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2745
-	ldr	w1, [x28, #:lo12:.LANCHOR118]
-	adrp	x0, .LC178
-	add	x0, x0, :lo12:.LC178
-	bl	printf
 .L2745:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	tbz	x0, 12, .L2746
-	ldr	w1, [x27, #:lo12:.LANCHOR203]
-	adrp	x0, .LC179
-	add	x0, x0, :lo12:.LC179
+	ldr	w1, [x4, #:lo12:.LANCHOR203]
+	adrp	x0, .LC180
+	add	x0, x0, :lo12:.LC180
 	bl	printf
 .L2746:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	tbz	x0, 12, .L2747
-	ldrh	w1, [x24, #:lo12:.LANCHOR185]
-	adrp	x0, .LC180
-	add	x0, x0, :lo12:.LC180
+	ldr	w1, [x28, #:lo12:.LANCHOR118]
+	adrp	x0, .LC181
+	add	x0, x0, :lo12:.LC181
 	bl	printf
 .L2747:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	tbz	x0, 12, .L2748
-	ldrh	w1, [x20, #:lo12:.LANCHOR198]
-	adrp	x0, .LC181
-	add	x0, x0, :lo12:.LC181
+	ldr	w1, [x27, #:lo12:.LANCHOR204]
+	adrp	x0, .LC182
+	add	x0, x0, :lo12:.LC182
 	bl	printf
 .L2748:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	tbz	x0, 12, .L2749
-	ldrh	w1, [x26, #:lo12:.LANCHOR141]
-	adrp	x0, .LC182
-	add	x0, x0, :lo12:.LC182
+	ldrh	w1, [x24, #:lo12:.LANCHOR186]
+	adrp	x0, .LC183
+	add	x0, x0, :lo12:.LC183
 	bl	printf
 .L2749:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	tbz	x0, 12, .L2750
-	ldrh	w1, [x25, #:lo12:.LANCHOR84]
-	adrp	x0, .LC183
-	add	x0, x0, :lo12:.LC183
+	ldrh	w1, [x20, #:lo12:.LANCHOR199]
+	adrp	x0, .LC184
+	add	x0, x0, :lo12:.LC184
 	bl	printf
 .L2750:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	tbz	x0, 12, .L2751
+	ldrh	w1, [x26, #:lo12:.LANCHOR141]
+	adrp	x0, .LC185
+	add	x0, x0, :lo12:.LC185
+	bl	printf
+.L2751:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2752
+	ldrh	w1, [x25, #:lo12:.LANCHOR84]
+	adrp	x0, .LC186
+	add	x0, x0, :lo12:.LC186
+	bl	printf
+.L2752:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2753
 	ldr	x0, [x29, 104]
 	ldrh	w1, [x0, #:lo12:.LANCHOR88]
-	adrp	x0, .LC184
-	add	x0, x0, :lo12:.LC184
+	adrp	x0, .LC187
+	add	x0, x0, :lo12:.LC187
 	bl	printf
-.L2751:
+.L2753:
 	bl	buf_init
 	adrp	x25, .LANCHOR10
 	ldrh	w1, [x23, #:lo12:.LANCHOR6]
@@ -17101,15 +17167,15 @@ zftl_init:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	add	x1, x2, x1, sxtw 2
 	str	x1, [x25, #:lo12:.LANCHOR10]
-	tbz	x0, 12, .L2752
-	adrp	x0, .LC185
-	add	x0, x0, :lo12:.LC185
+	tbz	x0, 12, .L2754
+	adrp	x0, .LC188
+	add	x0, x0, :lo12:.LC188
 	bl	printf
-.L2752:
+.L2754:
 	ldrh	w0, [x22, #:lo12:.LANCHOR80]
 	ldrb	w21, [x21, #:lo12:.LANCHOR73]
 	ldrh	w1, [x23, #:lo12:.LANCHOR6]
-	ldrh	w22, [x24, #:lo12:.LANCHOR185]
+	ldrh	w22, [x24, #:lo12:.LANCHOR186]
 	mul	w21, w0, w21
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	add	w21, w1, w21, lsl 2
@@ -17118,37 +17184,37 @@ zftl_init:
 	add	w22, w1, w22, lsl 2
 	add	w21, w21, 632
 	add	w22, w22, 704
-	tbz	x0, 12, .L2753
-	ldrh	w3, [x20, #:lo12:.LANCHOR198]
-	adrp	x0, .LC186
+	tbz	x0, 12, .L2755
+	ldrh	w3, [x20, #:lo12:.LANCHOR199]
+	adrp	x0, .LC189
 	mov	w2, w22
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC186
+	add	x0, x0, :lo12:.LC189
 	bl	printf
-.L2753:
-	ldrh	w0, [x20, #:lo12:.LANCHOR198]
+.L2755:
+	ldrh	w0, [x20, #:lo12:.LANCHOR199]
 	cmp	w21, w0
-	bhi	.L2754
+	bhi	.L2756
 	cmp	w22, w0
-	bls	.L2755
-.L2754:
-.L2798:
-	b	.L2798
-.L2736:
+	bls	.L2757
+.L2756:
+.L2800:
+	b	.L2800
+.L2738:
 	add	w1, w1, 1
 	lsl	w3, w3, 1
 	and	w1, w1, 65535
-	b	.L2735
-.L2738:
+	b	.L2737
+.L2740:
 	add	w4, w4, 1
 	lsl	w1, w1, 1
 	and	w4, w4, 65535
-	b	.L2737
-.L2755:
+	b	.L2739
+.L2757:
 	bl	sblk_init
 	bl	ftl_info_blk_init
 	cmn	w0, #1
-	beq	.L2734
+	beq	.L2736
 	bl	ftl_ext_info_init
 	adrp	x19, .LANCHOR97
 	mov	w0, 1
@@ -17179,20 +17245,20 @@ zftl_init:
 	bl	pm_flush
 	mov	w0, 1
 	bl	ftl_total_vpn_update
-	adrp	x0, .LANCHOR180
-	ldrb	w0, [x0, #:lo12:.LANCHOR180]
-	cbz	w0, .L2757
+	adrp	x0, .LANCHOR181
+	ldrb	w0, [x0, #:lo12:.LANCHOR181]
+	cbz	w0, .L2759
 	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	ldr	w0, [x1, 68]
 	add	w0, w0, 1
 	str	w0, [x1, 68]
-.L2757:
+.L2759:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
 	bl	print_ftl_debug_info
 	mov	w0, 0
-.L2734:
+.L2736:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -17210,14 +17276,14 @@ rk_ftl_init:
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	bl	nand_flash_init
-	cbnz	w0, .L2802
+	cbnz	w0, .L2804
 	bl	zftl_init
-.L2802:
+.L2804:
 	mov	w19, w0
 	bl	idb_init
 	mov	w1, w19
-	adrp	x0, .LC187
-	add	x0, x0, :lo12:.LC187
+	adrp	x0, .LC190
+	add	x0, x0, :lo12:.LC190
 	bl	printf
 	mov	w0, w19
 	ldr	x19, [sp, 16]
@@ -17246,12 +17312,12 @@ gc_update_l2p_map_new:
 	ldrb	w1, [x1, 9]
 	mul	w26, w26, w1
 	ldr	w1, [x24, #:lo12:.LANCHOR14]
-	tbz	x1, 8, .L2805
+	tbz	x1, 8, .L2807
 	ldrh	w1, [x21, 80]
-	adrp	x0, .LC188
-	add	x0, x0, :lo12:.LC188
+	adrp	x0, .LC191
+	add	x0, x0, :lo12:.LC191
 	bl	printf
-.L2805:
+.L2807:
 	adrp	x23, .LANCHOR9
 	ldrh	w1, [x21, 80]
 	sub	w2, w26, #1
@@ -17262,12 +17328,12 @@ gc_update_l2p_map_new:
 	adrp	x0, .LANCHOR121
 	add	x0, x0, :lo12:.LANCHOR121
 	str	x0, [x29, 104]
-.L2806:
+.L2808:
 	mov	w28, w22
 	cmp	w26, w22
-	bhi	.L2816
+	bhi	.L2818
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2817
+	tbz	x0, 8, .L2819
 	ldr	x0, [x29, 128]
 	mov	w3, w25
 	ldr	x1, [x23, #:lo12:.LANCHOR9]
@@ -17275,22 +17341,22 @@ gc_update_l2p_map_new:
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldrh	w2, [x1, x2, lsl 1]
 	ldrh	w1, [x0, 80]
-	adrp	x0, .LC191
-	add	x0, x0, :lo12:.LC191
+	adrp	x0, .LC194
+	add	x0, x0, :lo12:.LC194
 	bl	printf
-.L2817:
+.L2819:
 	ldrh	w1, [x21, 80]
 	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, x1, lsl 1]
 	cmp	w25, w0
-	beq	.L2818
-	adrp	x1, .LANCHOR204
+	beq	.L2820
+	adrp	x1, .LANCHOR205
 	adrp	x0, .LC0
 	mov	w2, 489
-	add	x1, x1, :lo12:.LANCHOR204
+	add	x1, x1, :lo12:.LANCHOR205
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2818:
+.L2820:
 	ldrh	w1, [x21, 80]
 	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	strh	w25, [x0, x1, lsl 1]
@@ -17303,13 +17369,13 @@ gc_update_l2p_map_new:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L2816:
+.L2818:
 	adrp	x27, .LANCHOR147
 	lsl	x19, x22, 2
 	ldr	x0, [x27, #:lo12:.LANCHOR147]
 	ldr	w2, [x0, x19]
 	cmn	w2, #1
-	beq	.L2807
+	beq	.L2809
 	adrp	x0, .LANCHOR121
 	ldrb	w20, [x0, #:lo12:.LANCHOR121]
 	lsl	w20, w20, 7
@@ -17317,42 +17383,42 @@ gc_update_l2p_map_new:
 	and	w0, w20, 65535
 	str	w0, [x29, 156]
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2808
+	tbz	x0, 8, .L2810
 	ldr	w1, [x29, 156]
-	adrp	x0, .LC189
+	adrp	x0, .LC192
 	mov	w3, w22
-	add	x0, x0, :lo12:.LC189
+	add	x0, x0, :lo12:.LC192
 	bl	printf
-.L2808:
+.L2810:
 	sub	w28, w26, w28
 	add	x28, x28, x22
 	lsl	x0, x28, 2
 	str	x0, [x29, 144]
-	adrp	x0, .LC190
-	add	x0, x0, :lo12:.LC190
+	adrp	x0, .LC193
+	add	x0, x0, :lo12:.LC193
 	str	x0, [x29, 120]
 	adrp	x0, .LANCHOR99
 	add	x0, x0, :lo12:.LANCHOR99
 	str	x0, [x29, 112]
-.L2809:
+.L2811:
 	ldr	x0, [x29, 144]
 	cmp	x0, x19
-	bne	.L2815
-.L2807:
+	bne	.L2817
+.L2809:
 	add	x22, x22, 1
-	b	.L2806
-.L2815:
+	b	.L2808
+.L2817:
 	ldr	x0, [x27, #:lo12:.LANCHOR147]
 	ldr	w20, [x0, x19]
 	cmn	w20, #1
-	beq	.L2810
+	beq	.L2812
 	ldr	x0, [x29, 104]
 	ldr	w1, [x29, 156]
 	ldrb	w0, [x0]
 	lsl	w0, w0, 7
 	udiv	w0, w20, w0
 	cmp	w1, w0, uxth
-	bne	.L2810
+	bne	.L2812
 	adrp	x0, .LANCHOR148
 	ldr	x0, [x0, #:lo12:.LANCHOR148]
 	ldr	w28, [x0, x19]
@@ -17360,15 +17426,15 @@ gc_update_l2p_map_new:
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 172]
 	cmn	w0, #1
-	bne	.L2811
+	bne	.L2813
 	mov	w2, 0
 	add	x1, x29, 172
 	mov	w0, w20
 	bl	pm_log2phys
-.L2811:
+.L2813:
 	ldr	w3, [x29, 172]
 	cmp	w28, w3
-	bne	.L2812
+	bne	.L2814
 	adrp	x0, .LANCHOR149
 	mov	w2, 1
 	add	x1, x29, 168
@@ -17390,177 +17456,170 @@ gc_update_l2p_map_new:
 	adrp	x0, .LANCHOR98
 	ldrb	w0, [x0, #:lo12:.LANCHOR98]
 	udiv	w0, w28, w0
-.L2838:
+.L2840:
 	bl	ftl_vpn_decrement
 	ldr	x0, [x27, #:lo12:.LANCHOR147]
 	mov	w1, -1
 	str	w1, [x0, x19]
-.L2810:
-	add	x19, x19, 4
-	b	.L2809
 .L2812:
+	add	x19, x19, 4
+	b	.L2811
+.L2814:
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2814
+	tbz	x0, 8, .L2816
 	ldr	x0, [x29, 120]
 	mov	w2, w28
 	mov	w1, w20
 	bl	printf
-.L2814:
+.L2816:
 	ldr	x0, [x29, 136]
 	ldrh	w0, [x0]
-	b	.L2838
+	b	.L2840
 	.size	gc_update_l2p_map_new, .-gc_update_l2p_map_new
 	.section	.text.gc_scan_src_blk_one_page,"ax",@progbits
 	.align	2
 	.global	gc_scan_src_blk_one_page
 	.type	gc_scan_src_blk_one_page, %function
 gc_scan_src_blk_one_page:
-	stp	x29, x30, [sp, -96]!
-	mov	w5, 0
-	mov	w6, 0
-	mov	w7, 65535
+	stp	x29, x30, [sp, -112]!
+	mov	w3, 0
+	mov	w4, 0
+	mov	w5, 65535
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR62
 	add	x1, x19, :lo12:.LANCHOR62
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	str	x25, [sp, 64]
+	adrp	x20, .LANCHOR73
+	stp	x25, x26, [sp, 64]
+	str	x27, [sp, 80]
+	ldrb	w6, [x20, #:lo12:.LANCHOR73]
 	ldrb	w0, [x1, 4]
 	add	x2, x1, x0, sxtw 1
-	ldrh	w3, [x2, 40]
-	adrp	x2, .LANCHOR73
-	ldrb	w4, [x2, #:lo12:.LANCHOR73]
+	ldrh	w21, [x2, 40]
 	ldrh	w2, [x1, 2]
-.L2840:
-	cmp	w3, w7
-	beq	.L2842
-	cbz	w6, .L2843
+.L2842:
+	cmp	w21, w5
+	beq	.L2844
+	cbz	w4, .L2845
 	add	x1, x19, :lo12:.LANCHOR62
-	strb	w0, [x1, 4]
-.L2843:
-	cbz	w5, .L2844
-	add	x0, x19, :lo12:.LANCHOR62
-	strh	w2, [x0, 2]
-.L2844:
-	adrp	x0, .LANCHOR105
-	ldrh	w22, [x0, #:lo12:.LANCHOR105]
-	adrp	x0, .LANCHOR68
-	mov	x23, x0
-	ldrb	w1, [x0, #:lo12:.LANCHOR68]
-	mul	w22, w22, w3
-	cmp	w1, 2
-	bne	.L2845
-	add	x0, x19, :lo12:.LANCHOR62
-	ldrb	w1, [x0, 6]
-	cbnz	w1, .L2845
-	ldrh	w0, [x0, 2]
-	add	w22, w22, w0, lsl 1
-.L2846:
+	strh	w2, [x1, 2]
+.L2845:
+	cbz	w3, .L2846
 	add	x1, x19, :lo12:.LANCHOR62
-	ldrb	w0, [x1, 4]
-	add	w0, w0, 1
-	and	w0, w0, 255
 	strb	w0, [x1, 4]
-	cmp	w4, w0
-	bne	.L2847
-	ldrh	w0, [x1, 2]
-	strb	wzr, [x1, 4]
-	add	w0, w0, 1
-	strh	w0, [x1, 2]
-.L2847:
+.L2846:
 	mov	w0, 1
-	add	x19, x19, :lo12:.LANCHOR62
+	adrp	x22, .LANCHOR105
 	bl	buf_alloc
+	adrp	x23, .LANCHOR68
+	mov	x24, x0
+	add	x22, x22, :lo12:.LANCHOR105
 	add	x23, x23, :lo12:.LANCHOR68
-	mov	x21, x0
-	mov	w20, 0
-	adrp	x24, .LANCHOR65
-.L2857:
-	ldrb	w0, [x19, 6]
-	cmp	w0, 3
-	bne	.L2848
-	cbz	w20, .L2849
-.L2848:
-	cmp	w0, w20
-	bgt	.L2850
-.L2858:
-	mov	x0, x21
+	mov	w26, 1
+.L2847:
+	add	x25, x19, :lo12:.LANCHOR62
+	ldrb	w1, [x25, 6]
+	cmp	w26, w1
+	ble	.L2855
+	mov	x0, x24
 	bl	buf_free
+	ldrb	w0, [x25, 4]
+	ldrb	w1, [x20, #:lo12:.LANCHOR73]
+	add	w0, w0, 1
+	and	w0, w0, 255
+	strb	w0, [x25, 4]
+	cmp	w1, w0
+	bne	.L2841
+	ldrh	w0, [x25, 2]
+	strb	wzr, [x25, 4]
+	add	w0, w0, 1
+	strh	w0, [x25, 2]
+.L2841:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldr	x25, [sp, 64]
-	ldp	x29, x30, [sp], 96
+	ldp	x25, x26, [sp, 64]
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 112
 	ret
-.L2842:
+.L2844:
 	add	w0, w0, 1
 	and	w0, w0, 255
-	cmp	w0, w4
-	bne	.L2841
+	cmp	w0, w6
+	bne	.L2843
 	add	w2, w2, 1
-	mov	w5, 1
-	and	w2, w2, 65535
 	mov	w0, 0
-.L2841:
+	and	w2, w2, 65535
+	mov	w4, 1
+.L2843:
 	add	x3, x1, x0, sxtw 1
-	mov	w6, 1
-	ldrh	w3, [x3, 40]
-	b	.L2840
-.L2845:
-	add	x0, x19, :lo12:.LANCHOR62
-	ldrh	w0, [x0, 2]
-	add	w22, w0, w22
-	b	.L2846
-.L2850:
-	ldrb	w1, [x23]
-	cmp	w1, 2
-	bne	.L2851
-	cbnz	w0, .L2851
-	add	w0, w20, w22
-	orr	w0, w0, 33554432
-.L2871:
-	str	w0, [x21, 40]
+	ldrh	w21, [x3, 40]
+	mov	w3, 1
+	b	.L2842
+.L2855:
+	ldrh	w0, [x22]
+	cmp	w1, 3
+	mul	w2, w0, w21
+	ldrh	w0, [x25, 2]
+	bne	.L2848
+	add	w0, w0, w2
+	orr	w0, w0, w26, lsl 24
+.L2864:
+	str	w0, [x24, 40]
 	mov	w1, 1
-	mov	x0, x21
+	mov	x0, x24
+	ldr	w25, [x24, 40]
 	bl	sblk_read_page
-	ldr	w0, [x21, 52]
+	ldr	w0, [x24, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2854
-	ldr	x0, [x21, 24]
-	ldr	w25, [x0, 4]
-	mov	w0, w25
+	beq	.L2852
+	ldr	x0, [x24, 24]
+	ldr	w27, [x0, 4]
+	mov	w0, w27
 	bl	lpa_hash_get_ppa
-	str	w0, [x29, 92]
+	str	w0, [x29, 108]
 	cmn	w0, #1
-	bne	.L2855
+	bne	.L2853
 	mov	w2, 0
-	add	x1, x29, 92
-	mov	w0, w25
+	add	x1, x29, 108
+	mov	w0, w27
 	bl	pm_log2phys
-.L2855:
-	ldr	w0, [x29, 92]
-	cmp	w22, w0
-	bne	.L2854
-	ldrh	w0, [x19, 24]
-	ldr	x2, [x24, #:lo12:.LANCHOR65]
-	ubfiz	x1, x0, 2, 16
+.L2853:
+	ldr	w1, [x24, 40]
+	ldr	w0, [x29, 108]
+	cmp	w1, w0
+	bne	.L2852
+	add	x1, x19, :lo12:.LANCHOR62
+	adrp	x3, .LANCHOR65
+	ldr	x3, [x3, #:lo12:.LANCHOR65]
+	ldrh	w0, [x1, 24]
+	ubfiz	x2, x0, 2, 16
 	add	w0, w0, 1
-	str	w22, [x2, x1]
-	strh	w0, [x19, 24]
-.L2854:
-	ldrh	w0, [x19, 26]
+	str	w25, [x3, x2]
+	strh	w0, [x1, 24]
+.L2852:
+	add	x1, x19, :lo12:.LANCHOR62
+	add	w26, w26, 1
+	ldrh	w0, [x1, 26]
 	add	w0, w0, 1
-	strh	w0, [x19, 26]
-.L2849:
-	add	w20, w20, 1
-	cmp	w20, 4
-	bne	.L2857
-	b	.L2858
-.L2851:
-	orr	w0, w22, w20, lsl 24
-	b	.L2871
+	strh	w0, [x1, 26]
+	b	.L2847
+.L2848:
+	cmp	w1, 2
+	bne	.L2850
+	lsl	w0, w0, 1
+	sub	w1, w0, #1
+	add	w0, w26, w2
+	add	w0, w1, w0
+	ldrb	w1, [x23]
+	orr	w0, w0, w1, lsl 24
+	b	.L2864
+.L2850:
+	add	w0, w0, w2
+	b	.L2864
 	.size	gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page
 	.section	.text.gc_scan_src_blk,"ax",@progbits
 	.align	2
@@ -17577,42 +17636,42 @@ gc_scan_src_blk:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w1, w0
-	bne	.L2873
-	adrp	x1, .LANCHOR205
+	bne	.L2866
+	adrp	x1, .LANCHOR206
 	adrp	x0, .LC0
-	mov	w2, 926
-	add	x1, x1, :lo12:.LANCHOR205
+	mov	w2, 919
+	add	x1, x1, :lo12:.LANCHOR206
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2873:
+.L2866:
 	ldrh	w1, [x19, #:lo12:.LANCHOR62]
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L2893
+	beq	.L2886
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2875
+	tbz	x0, 8, .L2868
 	adrp	x2, .LANCHOR9
 	ubfiz	x0, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC192
-	add	x0, x0, :lo12:.LC192
+	adrp	x0, .LC195
+	add	x0, x0, :lo12:.LC195
 	bl	printf
-.L2875:
+.L2868:
 	ldrh	w0, [x19, #:lo12:.LANCHOR62]
 	add	x14, x19, :lo12:.LANCHOR62
 	add	x1, x14, 40
 	bl	ftl_get_blk_list_in_sblk
 	and	w1, w0, 255
 	strb	w1, [x14, 5]
-	cbnz	w1, .L2876
+	cbnz	w1, .L2869
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR62]
-.L2893:
+.L2886:
 	mov	w0, 0
-	b	.L2872
-.L2876:
+	b	.L2865
+.L2869:
 	adrp	x4, .LANCHOR7
 	ldrh	w3, [x19, #:lo12:.LANCHOR62]
 	mov	x22, x4
@@ -17622,59 +17681,59 @@ gc_scan_src_blk:
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 32
-	beq	.L2877
+	beq	.L2870
 	cmp	w1, 224
-	beq	.L2877
-	cbz	w1, .L2878
+	beq	.L2870
+	cbz	w1, .L2871
 	adrp	x1, .LANCHOR10
 	ldr	x1, [x1, #:lo12:.LANCHOR10]
 	ldrh	w3, [x1, 16]
 	cmp	w3, w2
-	beq	.L2877
+	beq	.L2870
 	ldrh	w3, [x1, 48]
 	cmp	w3, w2
-	beq	.L2877
+	beq	.L2870
 	ldrh	w1, [x1, 80]
 	cmp	w1, w2
-	bne	.L2907
-.L2877:
+	bne	.L2900
+.L2870:
 	add	x0, x19, :lo12:.LANCHOR62
 	mov	w1, -1
 	strh	w1, [x19, #:lo12:.LANCHOR62]
 	strh	wzr, [x0, 24]
-	b	.L2893
-.L2878:
+	b	.L2886
+.L2871:
 	adrp	x0, .LANCHOR9
 	mov	x20, x0
 	ldr	x1, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x1, x3, lsl 1]
-	cbz	w1, .L2880
-	adrp	x1, .LANCHOR205
+	cbz	w1, .L2873
+	adrp	x1, .LANCHOR206
 	adrp	x0, .LC0
-	mov	w2, 946
-	add	x1, x1, :lo12:.LANCHOR205
+	mov	w2, 939
+	add	x1, x1, :lo12:.LANCHOR206
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2880:
+.L2873:
 	ldrh	w1, [x19, #:lo12:.LANCHOR62]
 	ldr	x0, [x20, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x1, lsl 1]
-	b	.L2877
-.L2907:
+	b	.L2870
+.L2900:
 	and	w0, w0, 255
 	sub	w0, w0, #1
 	add	x0, x14, x0, sxtw 1
 	ldrh	w21, [x0, 40]
 	mov	w0, 65535
 	cmp	w21, w0
-	bne	.L2881
-	adrp	x1, .LANCHOR205
+	bne	.L2874
+	adrp	x1, .LANCHOR206
 	adrp	x0, .LC0
-	mov	w2, 954
-	add	x1, x1, :lo12:.LANCHOR205
+	mov	w2, 947
+	add	x1, x1, :lo12:.LANCHOR206
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2881:
+.L2874:
 	adrp	x1, .LANCHOR105
 	ldr	x3, [x22, #:lo12:.LANCHOR7]
 	adrp	x2, .LANCHOR80
@@ -17690,14 +17749,14 @@ gc_scan_src_blk:
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 160
-	bne	.L2894
+	bne	.L2887
 	adrp	x1, .LANCHOR68
 	ldrb	w21, [x1, #:lo12:.LANCHOR68]
 	cmp	w21, 2
 	orr	w20, w20, w21, lsl 24
-	beq	.L2883
+	beq	.L2876
 	and	w21, w21, 65535
-.L2882:
+.L2875:
 	add	x22, x19, :lo12:.LANCHOR62
 	orr	w20, w0, w20
 	mov	w0, 1
@@ -17705,6 +17764,7 @@ gc_scan_src_blk:
 	strh	wzr, [x22, 2]
 	strb	wzr, [x22, 4]
 	strh	wzr, [x22, 26]
+	strh	wzr, [x22, 28]
 	bl	buf_alloc
 	str	w20, [x0, 40]
 	mov	x25, x0
@@ -17723,41 +17783,41 @@ gc_scan_src_blk:
 	ldr	w0, [x25, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L2884
-.L2909:
+	bne	.L2877
+.L2902:
 	mov	x0, x25
 	bl	buf_free
 	mov	w0, -1
-.L2872:
+.L2865:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2883:
+.L2876:
 	ldrh	w0, [x23, #:lo12:.LANCHOR72]
 	sub	w0, w0, #1
 	and	w0, w0, 65535
-	b	.L2882
-.L2894:
+	b	.L2875
+.L2887:
 	mov	w21, 1
-	b	.L2882
-.L2884:
+	b	.L2875
+.L2877:
 	ldr	x0, [x25, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L2885
-	mov	w2, 986
-	adrp	x1, .LANCHOR205
+	beq	.L2878
+	mov	w2, 980
+	adrp	x1, .LANCHOR206
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR205
+	add	x1, x1, :lo12:.LANCHOR206
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L2909
-.L2885:
+	b	.L2902
+.L2878:
 	ldrb	w0, [x23, #:lo12:.LANCHOR73]
 	adrp	x22, .LANCHOR99
 	ldrh	w1, [x24, #:lo12:.LANCHOR80]
@@ -17769,9 +17829,9 @@ gc_scan_src_blk:
 	mul	w0, w0, w1
 	mul	w21, w21, w0
 	and	w21, w21, 65535
-.L2886:
+.L2879:
 	cmp	w21, w26
-	bgt	.L2891
+	bgt	.L2884
 	mov	x0, x25
 	bl	buf_free
 	adrp	x0, .LANCHOR9
@@ -17783,11 +17843,11 @@ gc_scan_src_blk:
 	ldrh	w3, [x3, 24]
 	ldrh	w2, [x4, x2]
 	cmp	w2, w3
-	beq	.L2892
-	adrp	x0, .LC193
-	add	x0, x0, :lo12:.LC193
+	beq	.L2885
+	adrp	x0, .LC196
+	add	x0, x0, :lo12:.LC196
 	bl	printf
-.L2892:
+.L2885:
 	add	x0, x19, :lo12:.LANCHOR62
 	ldrh	w2, [x19, #:lo12:.LANCHOR62]
 	ldr	x1, [x20, #:lo12:.LANCHOR9]
@@ -17795,20 +17855,20 @@ gc_scan_src_blk:
 	strh	w3, [x1, x2, lsl 1]
 	strh	wzr, [x0, 28]
 	ldrh	w0, [x0, 24]
-	b	.L2872
-.L2891:
+	b	.L2865
+.L2884:
 	ldr	w0, [x24, x26, lsl 2]
 	cmn	w0, #1
-	beq	.L2888
+	beq	.L2881
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 92]
 	cmn	w0, #1
-	bne	.L2889
+	bne	.L2882
 	ldr	w0, [x24, x26, lsl 2]
 	mov	w2, 0
 	add	x1, x29, 92
 	bl	pm_log2phys
-.L2889:
+.L2882:
 	ldrh	w1, [x22]
 	mov	w0, 21
 	ldr	w3, [x29, 92]
@@ -17823,16 +17883,16 @@ gc_scan_src_blk:
 	udiv	w0, w0, w1
 	add	x1, x19, :lo12:.LANCHOR62
 	cmp	w0, w2
-	bne	.L2888
+	bne	.L2881
 	ldrh	w0, [x1, 24]
 	ldr	x4, [x20, #:lo12:.LANCHOR65]
 	ubfiz	x2, x0, 2, 16
 	add	w0, w0, 1
 	str	w3, [x4, x2]
 	strh	w0, [x1, 24]
-.L2888:
+.L2881:
 	add	x26, x26, 1
-	b	.L2886
+	b	.L2879
 	.size	gc_scan_src_blk, .-gc_scan_src_blk
 	.section	.text.gc_scan_static_data,"ax",@progbits
 	.align	2
@@ -17848,13 +17908,13 @@ gc_scan_static_data:
 	ldr	w1, [x0, 544]
 	str	x23, [sp, 48]
 	cmn	w1, #1
-	beq	.L2911
-	adrp	x21, .LANCHOR206
+	beq	.L2904
+	adrp	x21, .LANCHOR207
 	adrp	x22, .LC0
-	add	x21, x21, :lo12:.LANCHOR206
+	add	x21, x21, :lo12:.LANCHOR207
 	add	x22, x22, :lo12:.LC0
 	mov	w20, 11
-.L2919:
+.L2912:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w2, 0
 	add	x1, x29, 76
@@ -17862,7 +17922,7 @@ gc_scan_static_data:
 	bl	pm_log2phys
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L2912
+	beq	.L2905
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 76]
@@ -17872,7 +17932,7 @@ gc_scan_static_data:
 	bl	sblk_read_page
 	ldr	w0, [x23, 52]
 	cmp	w0, 256
-	bne	.L2913
+	bne	.L2906
 	adrp	x0, .LANCHOR99
 	ldr	w2, [x29, 76]
 	mov	w1, 1
@@ -17888,21 +17948,21 @@ gc_scan_static_data:
 	mov	w2, 0
 	udiv	w0, w0, w3
 	bl	gc_add_sblk
-.L2913:
+.L2906:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldr	x1, [x23, 24]
 	ldr	w0, [x0, 544]
 	ldr	w1, [x1, 4]
 	cmp	w1, w0
-	beq	.L2914
-	mov	w2, 1425
+	beq	.L2907
+	mov	w2, 1419
 	mov	x1, x21
 	mov	x0, x22
 	bl	printf
-.L2914:
+.L2907:
 	mov	x0, x23
 	bl	buf_free
-.L2912:
+.L2905:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	adrp	x2, .LANCHOR118
 	ldr	w2, [x2, #:lo12:.LANCHOR118]
@@ -17910,7 +17970,7 @@ gc_scan_static_data:
 	add	w1, w1, 1
 	str	w1, [x0, 544]
 	cmp	w1, w2
-	bcc	.L2915
+	bcc	.L2908
 	mov	w1, -1
 	str	w1, [x0, 544]
 	ldr	w1, [x0, 548]
@@ -17921,42 +17981,42 @@ gc_scan_static_data:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2910:
+.L2903:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2915:
+.L2908:
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	bne	.L2910
+	bne	.L2903
 	sub	w20, w20, #1
 	ands	w20, w20, 65535
-	bne	.L2919
-	b	.L2910
-.L2911:
+	bne	.L2912
+	b	.L2903
+.L2904:
 	ldr	w1, [x0, 536]
 	adrp	x3, .LANCHOR97
 	ldr	w2, [x0, 12]
 	add	w1, w1, 12959744
 	add	w1, w1, 256
 	cmp	w2, w1
-	bhi	.L2921
+	bhi	.L2914
 	ldr	x4, [x3, #:lo12:.LANCHOR97]
 	ldr	w1, [x0, 540]
 	add	w1, w1, 98304
 	ldr	w4, [x4, 44]
 	add	w1, w1, 1696
 	cmp	w4, w1
-	bls	.L2910
-.L2921:
+	bls	.L2903
+.L2914:
 	ldr	x1, [x3, #:lo12:.LANCHOR97]
 	ldr	w1, [x1, 44]
 	str	w1, [x0, 540]
 	str	w2, [x0, 536]
 	str	wzr, [x0, 544]
-	b	.L2910
+	b	.L2903
 	.size	gc_scan_static_data, .-gc_scan_static_data
 	.section	.text.ftl_sblk_dump,"ax",@progbits
 	.align	2
@@ -17982,29 +18042,29 @@ ftl_sblk_dump:
 	ldrb	w2, [x1, 2]
 	mov	w1, w21
 	ldrh	w4, [x0, x23]
-	adrp	x0, .LC194
+	adrp	x0, .LC197
 	ubfx	x5, x5, 11, 8
-	add	x0, x0, :lo12:.LC194
+	add	x0, x0, :lo12:.LC197
 	ubfx	x3, x2, 3, 2
 	and	w4, w4, 2047
 	ubfx	x2, x2, 5, 3
 	bl	printf
 	mov	w0, 65535
 	cmp	w21, w0
-	beq	.L2948
+	beq	.L2941
 	adrp	x0, .LANCHOR6
 	ldrh	w0, [x0, #:lo12:.LANCHOR6]
 	cmp	w0, w21
-	bls	.L2948
+	bls	.L2941
 	ldr	x0, [x24, #:lo12:.LANCHOR7]
 	add	x0, x0, x23
 	ldrb	w0, [x0, 2]
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L2949
+	bne	.L2942
 	adrp	x0, .LANCHOR68
 	ldrb	w25, [x0, #:lo12:.LANCHOR68]
-.L2929:
+.L2922:
 	add	x28, x29, 224
 	adrp	x19, .LANCHOR80
 	mov	w0, w21
@@ -18020,11 +18080,11 @@ ftl_sblk_dump:
 	strb	wzr, [x29, 197]
 	mov	w3, w25
 	strh	wzr, [x29, 194]
-	adrp	x0, .LC195
+	adrp	x0, .LC198
 	mul	w1, w1, w2
 	strh	wzr, [x29, 202]
 	strh	w1, [x29, 198]
-	add	x0, x0, :lo12:.LC195
+	add	x0, x0, :lo12:.LC198
 	ldr	x1, [x24, #:lo12:.LANCHOR7]
 	add	x1, x1, x23
 	ldrb	w2, [x1, 2]
@@ -18039,36 +18099,36 @@ ftl_sblk_dump:
 	adrp	x0, .LANCHOR105
 	add	x0, x0, :lo12:.LANCHOR105
 	str	x0, [x29, 112]
-.L2930:
+.L2923:
 	ldr	x0, [x29, 136]
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w0, w20
-	bls	.L2945
+	bls	.L2938
 	lsl	w0, w20, 1
 	str	wzr, [x29, 172]
 	sub	w0, w0, #1
 	str	w0, [x29, 160]
-	adrp	x0, .LC149
-	add	x0, x0, :lo12:.LC149
+	adrp	x0, .LC152
+	add	x0, x0, :lo12:.LC152
 	str	x0, [x29, 120]
-	b	.L2946
-.L2949:
-	mov	w25, 1
-	b	.L2929
+	b	.L2939
 .L2942:
+	mov	w25, 1
+	b	.L2922
+.L2935:
 	ldr	x0, [x29, 128]
 	ldrh	w10, [x28, x0]
 	mov	w0, 65535
 	cmp	w10, w0
-	beq	.L2931
+	beq	.L2924
 	ldr	x0, [x29, 112]
 	cmp	w25, 3
 	ldrh	w19, [x0]
 	mul	w19, w19, w10
-	bne	.L2932
+	bne	.L2925
 	add	w19, w20, w19
 	orr	w19, w19, w22, lsl 24
-.L2933:
+.L2926:
 	str	w19, [x26, 40]
 	mov	w1, 1
 	str	w10, [x29, 104]
@@ -18110,22 +18170,22 @@ ftl_sblk_dump:
 	and	w0, w0, 224
 	cmp	w0, 224
 	ccmp	w0, w1, 4, ne
-	beq	.L2931
+	beq	.L2924
 	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L2936
+	bne	.L2929
 	ldr	x0, [x26, 24]
 	mov	w2, 0
 	add	x1, x29, 188
 	ldr	w0, [x0, 4]
 	bl	pm_log2phys
-.L2936:
+.L2929:
 	ldr	w0, [x29, 188]
 	cmp	w19, w0
-	bne	.L2937
+	bne	.L2930
 	ldr	w0, [x29, 168]
 	mov	w1, w19
 	add	w0, w0, 1
@@ -18133,81 +18193,81 @@ ftl_sblk_dump:
 	ldr	x0, [x26, 24]
 	ldr	w3, [x29, 168]
 	ldr	w2, [x0, 4]
-	adrp	x0, .LC196
-	add	x0, x0, :lo12:.LC196
+	adrp	x0, .LC199
+	add	x0, x0, :lo12:.LC199
 	bl	printf
-.L2937:
+.L2930:
 	ldr	x0, [x29, 152]
-	cbz	x0, .L2939
+	cbz	x0, .L2932
 	ubfiz	x19, x27, 2, 32
 	ldr	w2, [x0, x19]
 	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	cmp	w0, w2
-	beq	.L2940
+	beq	.L2933
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2940
-	adrp	x0, .LC197
+	tbz	x0, 12, .L2933
+	adrp	x0, .LC200
 	mov	w1, w27
-	add	x0, x0, :lo12:.LC197
+	add	x0, x0, :lo12:.LC200
 	bl	printf
-.L2940:
+.L2933:
 	ldr	x1, [x26, 24]
 	ldr	x0, [x29, 152]
 	ldr	w1, [x1, 4]
 	ldr	w0, [x0, x19]
 	cmp	w1, w0
-	beq	.L2939
+	beq	.L2932
 	cmn	w0, #1
-	beq	.L2939
-	adrp	x1, .LANCHOR207
+	beq	.L2932
+	adrp	x1, .LANCHOR208
 	adrp	x0, .LC0
 	mov	w2, 1299
-	add	x1, x1, :lo12:.LANCHOR207
+	add	x1, x1, :lo12:.LANCHOR208
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2939:
+.L2932:
 	add	w27, w27, 1
-.L2931:
+.L2924:
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L2944:
+.L2937:
 	cmp	w25, w22
-	bcs	.L2942
+	bcs	.L2935
 	ldr	w0, [x29, 172]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	str	w0, [x29, 172]
-.L2946:
+.L2939:
 	ldrb	w0, [x29, 201]
 	ldr	w1, [x29, 172]
 	cmp	w0, w1
-	bls	.L2943
+	bls	.L2936
 	ldrsw	x0, [x29, 172]
 	mov	w22, 1
 	add	x0, x0, 8
 	lsl	x0, x0, 1
 	str	x0, [x29, 128]
-	b	.L2944
-.L2932:
+	b	.L2937
+.L2925:
 	cmp	w25, 2
-	bne	.L2934
+	bne	.L2927
 	ldr	w0, [x29, 160]
 	add	w19, w19, w0
 	adrp	x0, .LANCHOR68
 	add	w19, w19, w22
 	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	orr	w19, w19, w0, lsl 24
-	b	.L2933
-.L2934:
+	b	.L2926
+.L2927:
 	add	w19, w20, w19
-	b	.L2933
-.L2943:
+	b	.L2926
+.L2936:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2930
-.L2945:
+	b	.L2923
+.L2938:
 	mov	x0, x26
 	bl	buf_free
 	adrp	x0, .LANCHOR9
@@ -18216,11 +18276,11 @@ ftl_sblk_dump:
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w2, [x0, x1, lsl 1]
 	mov	w1, w21
-	adrp	x0, .LC198
-	add	x0, x0, :lo12:.LC198
+	adrp	x0, .LC201
+	add	x0, x0, :lo12:.LC201
 	bl	printf
 	ldr	w0, [x29, 164]
-.L2927:
+.L2920:
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
 	ldp	x23, x24, [sp, 96]
@@ -18229,9 +18289,9 @@ ftl_sblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 272
 	ret
-.L2948:
+.L2941:
 	mov	w0, 0
-	b	.L2927
+	b	.L2920
 	.size	ftl_sblk_dump, .-ftl_sblk_dump
 	.section	.text.zftl_read,"ax",@progbits
 	.align	2
@@ -18251,22 +18311,22 @@ zftl_read:
 	stp	x23, x24, [sp, 48]
 	mov	x22, x3
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2960
+	tbz	x0, 12, .L2953
 	mov	w3, w2
-	adrp	x0, .LC199
+	adrp	x0, .LC202
 	mov	w2, w1
-	add	x0, x0, :lo12:.LC199
+	add	x0, x0, :lo12:.LC202
 	mov	w1, w20
 	bl	printf
-.L2960:
-	cbnz	w20, .L2961
+.L2953:
+	cbnz	w20, .L2954
 	adrp	x0, .LANCHOR58
 	mov	w20, 24576
 	ldr	w0, [x0, #:lo12:.LANCHOR58]
-.L2962:
+.L2955:
 	add	w1, w19, w26
 	cmp	w0, w1
-	bcc	.L2990
+	bcc	.L2983
 	adrp	x1, .LANCHOR97
 	add	w20, w20, w19
 	add	w3, w26, w20
@@ -18288,10 +18348,10 @@ zftl_read:
 	sub	w25, w2, w27
 	str	w2, [x29, 156]
 	add	w25, w25, 1
-.L2964:
-	cbnz	w25, .L2988
+.L2957:
+	cbnz	w25, .L2981
 	ldr	w0, [x29, 164]
-.L2959:
+.L2952:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -18299,22 +18359,22 @@ zftl_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L2961:
+.L2954:
 	cmp	w20, 3
-	bhi	.L2990
+	bhi	.L2983
 	lsl	w20, w20, 13
 	mov	w0, 8192
-	b	.L2962
-.L2988:
+	b	.L2955
+.L2981:
 	ldr	x0, [x29, 168]
 	cmp	w21, w27
 	ldrb	w1, [x0, #:lo12:.LANCHOR121]
 	ldr	w0, [x29, 156]
 	and	w19, w1, 65535
 	ccmp	w21, w0, 4, ne
-	bne	.L2991
+	bne	.L2984
 	cmp	w21, w27
-	bne	.L2966
+	bne	.L2959
 	udiv	w24, w20, w1
 	and	w0, w26, 65535
 	msub	w1, w24, w1, w20
@@ -18323,17 +18383,17 @@ zftl_read:
 	and	w19, w19, 65535
 	cmp	w26, w19
 	csel	w19, w0, w19, cc
-.L2965:
+.L2958:
 	adrp	x23, .LANCHOR49
 	add	x1, x23, :lo12:.LANCHOR49
 	add	x1, x1, 2
 	mov	w0, 0
-.L2969:
+.L2962:
 	ldr	w2, [x1, 34]
 	cmp	w21, w2
-	bne	.L2967
+	bne	.L2960
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L2967
+	tbz	x2, 3, .L2960
 	add	x1, x23, :lo12:.LANCHOR49
 	ubfiz	x0, x0, 6, 32
 	add	x0, x1, x0
@@ -18345,87 +18405,87 @@ zftl_read:
 	add	x22, x22, x19
 	add	x1, x1, x24
 	bl	ftl_memcpy
-.L2968:
+.L2961:
 	add	w21, w21, 1
 	sub	w25, w25, #1
-.L2975:
+.L2968:
 	adrp	x0, .LANCHOR51
 	ldrb	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, 2
-	bls	.L2976
-	cbnz	w25, .L2964
-.L2976:
+	bls	.L2969
+	cbnz	w25, .L2957
+.L2969:
 	adrp	x0, .LANCHOR125
 	ldrb	w1, [x0, #:lo12:.LANCHOR125]
-	cbz	w1, .L2964
+	cbz	w1, .L2957
 	adrp	x24, .LANCHOR124
 	add	x0, x23, :lo12:.LANCHOR49
 	ldrb	w2, [x24, #:lo12:.LANCHOR124]
 	add	x0, x0, x2, lsl 6
 	bl	sblk_read_page
-	adrp	x0, .LANCHOR208
-	add	x0, x0, :lo12:.LANCHOR208
+	adrp	x0, .LANCHOR209
+	add	x0, x0, :lo12:.LANCHOR209
 	str	x0, [x29, 136]
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	str	x0, [x29, 128]
-.L2978:
+.L2971:
 	ldrb	w0, [x28]
-	cbnz	w0, .L2987
+	cbnz	w0, .L2980
 	mov	w0, -1
 	strb	wzr, [x28]
 	strb	w0, [x24, #:lo12:.LANCHOR124]
-	b	.L2964
-.L2966:
+	b	.L2957
+.L2959:
 	ldr	w0, [x29, 160]
 	msub	w19, w1, w21, w0
 	and	w19, w19, 255
-.L2991:
+.L2984:
 	mov	w24, 0
-	b	.L2965
-.L2967:
+	b	.L2958
+.L2960:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 32
-	bne	.L2969
+	bne	.L2962
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L2970
+	bne	.L2963
 	mov	w2, 0
 	add	x1, x29, 188
 	mov	w0, w21
 	bl	pm_log2phys
-.L2970:
+.L2963:
 	ldr	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L2971
+	bne	.L2964
 	ldr	x0, [x29, 168]
 	mov	w19, 0
 	add	x24, x0, :lo12:.LANCHOR121
-.L2972:
+.L2965:
 	ldrb	w0, [x24]
 	cmp	w19, w0
-	bcs	.L2968
+	bcs	.L2961
 	madd	w0, w21, w0, w19
 	cmp	w20, w0
-	bhi	.L2973
+	bhi	.L2966
 	ldr	w1, [x29, 160]
 	cmp	w1, w0
-	bls	.L2973
+	bls	.L2966
 	mov	x0, x22
 	add	x22, x22, 512
 	mov	w2, 512
 	mov	w1, 0
 	bl	ftl_memset
-.L2973:
+.L2966:
 	add	w19, w19, 1
-	b	.L2972
-.L2971:
+	b	.L2965
+.L2964:
 	mov	w0, 0
 	bl	buf_alloc
-	cbz	x0, .L2975
+	cbz	x0, .L2968
 	ldr	x2, [x29, 120]
 	ldr	x3, [x2, #:lo12:.LANCHOR97]
 	ldr	w2, [x3, 40]
@@ -18440,15 +18500,15 @@ zftl_read:
 	stp	w21, w2, [x0, 36]
 	str	w2, [x0, 44]
 	bl	zftl_add_read_buf
-	b	.L2968
-.L2987:
+	b	.L2961
+.L2980:
 	ldrb	w0, [x24, #:lo12:.LANCHOR124]
 	cmp	w0, 255
-	bne	.L2979
+	bne	.L2972
 	ldp	x0, x1, [x29, 128]
 	mov	w2, 1065
 	bl	printf
-.L2979:
+.L2972:
 	ldrb	w19, [x24, #:lo12:.LANCHOR124]
 	add	x0, x23, :lo12:.LANCHOR49
 	ubfiz	x1, x19, 6, 8
@@ -18460,21 +18520,21 @@ zftl_read:
 	strb	w0, [x24, #:lo12:.LANCHOR124]
 	ldr	w8, [x1, 52]
 	cmn	w8, #1
-	bne	.L2980
+	bne	.L2973
 	adrp	x0, .LANCHOR10
 	str	w8, [x29, 164]
 	ldr	x1, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x1, 552]
 	add	w0, w0, 1
 	str	w0, [x1, 552]
-.L2981:
+.L2974:
 	add	x10, x23, :lo12:.LANCHOR49
 	add	x10, x10, x19, lsl 6
 	ldr	x0, [x10, 24]
 	ldr	w2, [x10, 36]
 	ldr	w1, [x0, 4]
 	cmp	w1, w2
-	beq	.L2982
+	beq	.L2975
 	adrp	x1, .LANCHOR10
 	str	w8, [x29, 152]
 	str	x10, [x29, 112]
@@ -18485,9 +18545,9 @@ zftl_read:
 	ldrb	w1, [x10, 1]
 	ldp	w4, w5, [x0]
 	ldp	w6, w7, [x0, 8]
-	adrp	x0, .LC201
+	adrp	x0, .LC204
 	ldr	w3, [x10, 40]
-	add	x0, x0, :lo12:.LC201
+	add	x0, x0, :lo12:.LC204
 	bl	printf
 	ldr	x10, [x29, 112]
 	adrp	x0, .LANCHOR99
@@ -18506,28 +18566,28 @@ zftl_read:
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
 	ldr	w8, [x29, 152]
-.L2982:
+.L2975:
 	add	x0, x23, :lo12:.LANCHOR49
 	add	x0, x0, x19, lsl 6
 	ldr	x1, [x0, 24]
 	ldr	w0, [x0, 36]
 	ldr	w1, [x1, 4]
 	cmp	w1, w0
-	bne	.L2983
+	bne	.L2976
 	cmn	w8, #1
-	bne	.L2984
-.L2983:
+	bne	.L2977
+.L2976:
 	ldp	x0, x1, [x29, 128]
 	mov	w2, 1086
 	bl	printf
-.L2984:
+.L2977:
 	add	x0, x23, :lo12:.LANCHOR49
 	add	x19, x0, x19, lsl 6
 	ldr	x0, [x29, 168]
 	ldrb	w2, [x19, 56]
 	ldrb	w0, [x0, #:lo12:.LANCHOR121]
 	cmp	w0, w2
-	bls	.L2985
+	bls	.L2978
 	ldrb	w0, [x19, 57]
 	lsl	w2, w2, 9
 	ldr	x1, [x19, 8]
@@ -18535,7 +18595,7 @@ zftl_read:
 	add	x1, x1, x0
 	ldr	x0, [x19, 16]
 	bl	ftl_memcpy
-.L2986:
+.L2979:
 	ldr	x1, [x29, 144]
 	adrp	x0, .LANCHOR127
 	add	x0, x0, :lo12:.LANCHOR127
@@ -18545,10 +18605,10 @@ zftl_read:
 	ldrb	w0, [x28]
 	sub	w0, w0, #1
 	strb	w0, [x28]
-	b	.L2978
-.L2980:
+	b	.L2971
+.L2973:
 	cmp	w8, 256
-	bne	.L2981
+	bne	.L2974
 	adrp	x0, .LANCHOR99
 	mov	w4, 21
 	ldp	w2, w3, [x1, 36]
@@ -18563,8 +18623,8 @@ zftl_read:
 	adrp	x0, .LANCHOR98
 	ldrb	w0, [x0, #:lo12:.LANCHOR98]
 	udiv	w4, w4, w0
-	adrp	x0, .LC200
-	add	x0, x0, :lo12:.LC200
+	adrp	x0, .LC203
+	add	x0, x0, :lo12:.LC203
 	stp	w8, w4, [x29, 108]
 	and	w1, w4, 65535
 	bl	printf
@@ -18575,27 +18635,27 @@ zftl_read:
 	mov	w1, w5
 	bl	gc_add_sblk
 	ldr	w8, [x29, 108]
-	b	.L2981
-.L2985:
+	b	.L2974
+.L2978:
 	ldrb	w0, [x19, 2]
 	and	w0, w0, -9
 	strb	w0, [x19, 2]
-	b	.L2986
-.L2990:
+	b	.L2979
+.L2983:
 	mov	w0, -1
-	b	.L2959
+	b	.L2952
 	.size	zftl_read, .-zftl_read
-	.section	.text.zftl_vendor_read,"ax",@progbits
+	.section	.text.ftl_vendor_read,"ax",@progbits
 	.align	2
-	.global	zftl_vendor_read
-	.type	zftl_vendor_read, %function
-zftl_vendor_read:
+	.global	ftl_vendor_read
+	.type	ftl_vendor_read, %function
+ftl_vendor_read:
 	mov	x3, x2
 	mov	w2, w1
 	add	w1, w0, 512
 	mov	w0, 2
 	b	zftl_read
-	.size	zftl_vendor_read, .-zftl_vendor_read
+	.size	ftl_vendor_read, .-ftl_vendor_read
 	.section	.text.zftl_sys_read,"ax",@progbits
 	.align	2
 	.global	zftl_sys_read
@@ -18666,46 +18726,46 @@ gc_check_data_one_wl:
 	ldr	x0, [x22, 8]
 	stp	x27, x28, [sp, 96]
 	ldr	x21, [x20, #:lo12:.LANCHOR10]
-	cbnz	x0, .L3013
+	cbnz	x0, .L3006
 	mov	w0, 1
 	bl	buf_alloc
 	str	x0, [x22, 8]
-.L3013:
+.L3006:
 	add	x0, x19, :lo12:.LANCHOR62
 	ldr	x22, [x0, 8]
-	cbnz	x22, .L3014
-	adrp	x1, .LANCHOR209
+	cbnz	x22, .L3007
+	adrp	x1, .LANCHOR210
 	adrp	x0, .LC0
 	mov	w2, 367
-	add	x1, x1, :lo12:.LANCHOR209
+	add	x1, x1, :lo12:.LANCHOR210
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3014:
+.L3007:
 	adrp	x2, .LANCHOR105
 	add	x28, x21, 96
 	add	x27, x21, 80
 	add	x2, x2, :lo12:.LANCHOR105
 	mov	w26, 0
-.L3015:
+.L3008:
 	ldrb	w0, [x27, 9]
 	cmp	w26, w0
-	bge	.L3024
+	bge	.L3017
 	adrp	x25, .LANCHOR68
 	mov	w24, 1
 	add	x23, x19, :lo12:.LANCHOR62
 	add	x25, x25, :lo12:.LANCHOR68
-	b	.L3025
-.L3023:
+	b	.L3018
+.L3016:
 	ldrh	w0, [x28]
 	ldrh	w1, [x2]
 	ldrb	w3, [x25]
 	cmp	w3, 3
 	mul	w1, w0, w1
 	ldrh	w0, [x23, 16]
-	bne	.L3016
+	bne	.L3009
 	add	w0, w0, w1
 	orr	w0, w0, w24, lsl 24
-.L3037:
+.L3030:
 	str	w0, [x22, 40]
 	mov	w1, 1
 	str	x2, [x29, 104]
@@ -18715,7 +18775,7 @@ gc_check_data_one_wl:
 	adrp	x1, .LANCHOR147
 	ldr	x2, [x29, 104]
 	cmn	w0, #1
-	beq	.L3019
+	beq	.L3012
 	ldrh	w0, [x23, 22]
 	ldr	x4, [x1, #:lo12:.LANCHOR147]
 	ldr	x3, [x22, 24]
@@ -18723,28 +18783,28 @@ gc_check_data_one_wl:
 	ldr	w5, [x4, x0]
 	ldr	w4, [x3, 4]
 	cmp	w5, w4
-	bne	.L3019
+	bne	.L3012
 	adrp	x4, .LANCHOR148
 	ldr	x4, [x4, #:lo12:.LANCHOR148]
 	ldr	w4, [x4, x0]
 	ldr	w0, [x3, 8]
 	cmp	w4, w0
-	beq	.L3020
-.L3019:
+	beq	.L3013
+.L3012:
 	add	x4, x1, :lo12:.LANCHOR147
 	ldrh	w0, [x23, 22]
 	ldr	x1, [x1, #:lo12:.LANCHOR147]
 	ldr	w0, [x1, x0, lsl 2]
 	cmn	w0, #1
-	beq	.L3020
+	beq	.L3013
 	adrp	x19, .LANCHOR72
 	ldrb	w3, [x27, 9]
 	str	x4, [x29, 104]
 	mov	w2, 4
 	ldrh	w0, [x19, #:lo12:.LANCHOR72]
 	mul	w3, w3, w0
-	adrp	x0, .LC202
-	add	x0, x0, :lo12:.LC202
+	adrp	x0, .LC205
+	add	x0, x0, :lo12:.LC205
 	bl	rknand_print_hex
 	ldrh	w0, [x19, #:lo12:.LANCHOR72]
 	adrp	x19, .LANCHOR148
@@ -18752,13 +18812,13 @@ gc_check_data_one_wl:
 	mov	w2, 4
 	ldr	x1, [x19, #:lo12:.LANCHOR148]
 	mul	w3, w3, w0
-	adrp	x0, .LC203
-	add	x0, x0, :lo12:.LC203
+	adrp	x0, .LC206
+	add	x0, x0, :lo12:.LC206
 	bl	rknand_print_hex
 	adrp	x0, .LANCHOR14
 	ldr	x4, [x29, 104]
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L3021
+	tbz	x0, 10, .L3014
 	ldr	x1, [x22, 24]
 	ldrh	w0, [x23, 22]
 	ldr	x2, [x4]
@@ -18769,13 +18829,13 @@ gc_check_data_one_wl:
 	ldr	w4, [x3, x0]
 	ldp	w5, w6, [x1]
 	ldr	w3, [x2, x0]
-	adrp	x0, .LC204
+	adrp	x0, .LC207
 	ldr	w7, [x1, 8]
-	add	x0, x0, :lo12:.LC204
+	add	x0, x0, :lo12:.LC207
 	ldr	w1, [x22, 40]
 	ldr	w2, [x22, 52]
 	bl	printf
-.L3021:
+.L3014:
 	ldr	x0, [x20, #:lo12:.LANCHOR10]
 	mov	x1, 0
 	ldrh	w0, [x0, 80]
@@ -18785,7 +18845,7 @@ gc_check_data_one_wl:
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x1, lsl 1]
 	mov	w0, -1
-.L3012:
+.L3005:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -18794,43 +18854,43 @@ gc_check_data_one_wl:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 128
 	ret
-.L3016:
+.L3009:
 	cmp	w3, 2
-	bne	.L3018
+	bne	.L3011
 	sub	w0, w0, #1
 	add	w1, w24, w1
 	add	w0, w0, w1
 	orr	w0, w0, 33554432
-	b	.L3037
-.L3018:
+	b	.L3030
+.L3011:
 	add	w0, w0, w1
-	b	.L3037
-.L3020:
+	b	.L3030
+.L3013:
 	ldrh	w0, [x23, 22]
 	add	w24, w24, 1
 	add	w0, w0, 1
 	strh	w0, [x23, 22]
-.L3025:
+.L3018:
 	ldrh	w0, [x23, 20]
 	cmp	w24, w0
-	ble	.L3023
+	ble	.L3016
 	add	w26, w26, 1
 	add	x28, x28, 2
-	b	.L3015
-.L3024:
+	b	.L3008
+.L3017:
 	add	x19, x19, :lo12:.LANCHOR62
 	ldrh	w0, [x19, 16]
 	add	w1, w0, 1
 	strh	w1, [x19, 16]
 	adrp	x1, .LANCHOR104
 	ldrb	w1, [x1, #:lo12:.LANCHOR104]
-	cbz	w1, .L3026
+	cbz	w1, .L3019
 	add	w0, w0, 2
 	strh	w0, [x19, 16]
-.L3026:
-.L3022:
+.L3019:
+.L3015:
 	mov	w0, 0
-	b	.L3012
+	b	.L3005
 	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
 	.section	.text.ftl_update_l2p_map,"ax",@progbits
 	.align	2
@@ -18857,35 +18917,35 @@ ftl_update_l2p_map:
 	add	x1, x19, x23, sxtw 2
 	ldr	w1, [x1, -4]
 	cmn	w1, #1
-	beq	.L3039
-	adrp	x1, .LANCHOR210
+	beq	.L3032
+	adrp	x1, .LANCHOR211
 	adrp	x0, .LC0
 	mov	w2, 1575
-	add	x1, x1, :lo12:.LANCHOR210
+	add	x1, x1, :lo12:.LANCHOR211
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3039:
+.L3032:
 	adrp	x27, .LANCHOR121
 	mov	x24, 0
 	add	x0, x27, :lo12:.LANCHOR121
 	mov	w21, 0
 	str	x0, [x29, 96]
-.L3040:
+.L3033:
 	cmp	w24, w23
-	blt	.L3046
+	blt	.L3039
 	adrp	x0, .LANCHOR14
 	adrp	x19, .LANCHOR9
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3047
+	tbz	x0, 12, .L3040
 	ldrh	w1, [x22]
 	ldr	x2, [x19, #:lo12:.LANCHOR9]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w3, [x2, x0]
-	adrp	x0, .LC208
+	adrp	x0, .LC211
 	mov	w2, w21
-	add	x0, x0, :lo12:.LC208
+	add	x0, x0, :lo12:.LC211
 	bl	printf
-.L3047:
+.L3040:
 	ldrh	w1, [x22]
 	ldr	x0, [x19, #:lo12:.LANCHOR9]
 	ldp	x23, x24, [sp, 48]
@@ -18896,38 +18956,38 @@ ftl_update_l2p_map:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L3046:
+.L3039:
 	ldr	w2, [x19, x24, lsl 2]
 	cmn	w2, #1
-	beq	.L3041
+	beq	.L3034
 	ldrb	w20, [x27, #:lo12:.LANCHOR121]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	lsl	w20, w20, 7
 	udiv	w20, w2, w20
 	and	w20, w20, 65535
-	tbz	x0, 12, .L3042
-	adrp	x0, .LC205
+	tbz	x0, 12, .L3035
+	adrp	x0, .LC208
 	mov	w3, w24
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC205
+	add	x0, x0, :lo12:.LC208
 	bl	printf
-.L3042:
+.L3035:
 	adrp	x25, .LANCHOR105
-	adrp	x26, .LC206
+	adrp	x26, .LC209
 	mov	x28, x24
 	add	x25, x25, :lo12:.LANCHOR105
-	add	x26, x26, :lo12:.LC206
-.L3045:
+	add	x26, x26, :lo12:.LC209
+.L3038:
 	ldr	w1, [x19, x28, lsl 2]
 	cmn	w1, #1
-	beq	.L3043
+	beq	.L3036
 	ldr	x0, [x29, 96]
 	ldrb	w2, [x0]
 	lsl	w2, w2, 7
 	udiv	w1, w1, w2
 	cmp	w20, w1, uxth
-	bne	.L3043
+	bne	.L3036
 	ldrb	w0, [x22, 9]
 	sdiv	w1, w28, w0
 	msub	w0, w1, w0, w28
@@ -18939,15 +18999,15 @@ ftl_update_l2p_map:
 	str	w2, [x29, 124]
 	ldr	w1, [x19, x28, lsl 2]
 	bl	pm_ppa_update_check
-	cbz	w0, .L3044
+	cbz	w0, .L3037
 	ldr	x0, [x29, 104]
 	mov	w3, w23
 	mov	w2, 4
 	ldr	x1, [x0, #:lo12:.LANCHOR111]
-	adrp	x0, .LC207
-	add	x0, x0, :lo12:.LC207
+	adrp	x0, .LC210
+	add	x0, x0, :lo12:.LC210
 	bl	rknand_print_hex
-.L3044:
+.L3037:
 	ldr	w0, [x19, x28, lsl 2]
 	add	w21, w21, 1
 	mov	w2, 1
@@ -18956,13 +19016,13 @@ ftl_update_l2p_map:
 	bl	pm_log2phys
 	mov	w0, -1
 	str	w0, [x19, x28, lsl 2]
-.L3043:
+.L3036:
 	add	x28, x28, 1
 	cmp	w23, w28
-	bgt	.L3045
-.L3041:
+	bgt	.L3038
+.L3034:
 	add	x24, x24, 1
-	b	.L3040
+	b	.L3033
 	.size	ftl_update_l2p_map, .-ftl_update_l2p_map
 	.section	.text.ftl_alloc_new_data_sblk,"ax",@progbits
 	.align	2
@@ -18978,9 +19038,9 @@ ftl_alloc_new_data_sblk:
 	ldrh	w0, [x19]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3069
+	beq	.L3062
 	bl	zftl_insert_data_list
-.L3069:
+.L3062:
 	adrp	x0, .LANCHOR10
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	add	x0, x0, 16
@@ -19012,10 +19072,10 @@ ftl_write_commit:
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-.L3074:
+.L3067:
 	adrp	x2, .LANCHOR57
 	ldrb	w1, [x2, #:lo12:.LANCHOR57]
-	cbz	w1, .L3076
+	cbz	w1, .L3069
 	adrp	x3, .LANCHOR56
 	adrp	x0, .LANCHOR49
 	add	x0, x0, :lo12:.LANCHOR49
@@ -19034,24 +19094,24 @@ ftl_write_commit:
 	mov	x19, x0
 	ldr	w1, [x0, #:lo12:.LANCHOR118]
 	cmp	w2, w1
-	bcc	.L3078
-	adrp	x1, .LANCHOR211
+	bcc	.L3071
+	adrp	x1, .LANCHOR212
 	adrp	x0, .LC0
 	mov	w2, 496
-	add	x1, x1, :lo12:.LANCHOR211
+	add	x1, x1, :lo12:.LANCHOR212
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3078:
+.L3071:
 	ldr	x0, [x29, 112]
 	ldr	w1, [x19, #:lo12:.LANCHOR118]
 	add	x0, x23, x0, lsl 6
 	ldr	w22, [x0, 36]
 	cmp	w22, w1
-	bcc	.L3079
+	bcc	.L3072
 	ldr	x0, [x29, 120]
 	bl	buf_free
 	mov	w0, -1
-.L3073:
+.L3066:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -19059,7 +19119,7 @@ ftl_write_commit:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L3079:
+.L3072:
 	ldrb	w21, [x0, 57]
 	ldrb	w20, [x0, 56]
 	ldr	x26, [x0, 8]
@@ -19067,17 +19127,17 @@ ftl_write_commit:
 	adrp	x0, .LANCHOR119
 	str	x0, [x29, 104]
 	ldrb	w1, [x0, #:lo12:.LANCHOR119]
-	cbz	w1, .L3081
-	adrp	x0, .LANCHOR172
-	ldrb	w1, [x0, #:lo12:.LANCHOR172]
+	cbz	w1, .L3074
+	adrp	x0, .LANCHOR173
+	ldrb	w1, [x0, #:lo12:.LANCHOR173]
 	add	x1, x23, x1, lsl 6
-.L3082:
+.L3075:
 	ldrb	w0, [x1]
 	cmp	w0, 255
-	bne	.L3083
+	bne	.L3076
 	ldr	w0, [x1, 36]
 	cmp	w22, w0
-	bne	.L3081
+	bne	.L3074
 	ldr	x0, [x1, 8]
 	ubfiz	x21, x21, 9, 8
 	lsl	w2, w20, 9
@@ -19086,33 +19146,33 @@ ftl_write_commit:
 	bl	ftl_memcpy
 	ldr	x0, [x29, 120]
 	bl	buf_free
-	b	.L3074
-.L3083:
+	b	.L3067
+.L3076:
 	ubfiz	x1, x0, 6, 8
 	add	x1, x23, x1
-	b	.L3082
-.L3081:
+	b	.L3075
+.L3074:
 	mov	w0, w22
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 140]
 	cmn	w0, #1
-	bne	.L3085
+	bne	.L3078
 	mov	w2, 0
 	add	x1, x29, 140
 	mov	w0, w22
 	bl	pm_log2phys
-.L3085:
+.L3078:
 	adrp	x25, .LANCHOR10
 	add	x1, x23, 2
 	mov	w0, 0
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 16
-.L3088:
+.L3081:
 	ldr	w2, [x1, 34]
 	cmp	w22, w2
-	bne	.L3086
+	bne	.L3079
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L3086
+	tbz	x2, 3, .L3079
 	ubfiz	x0, x0, 6, 32
 	and	w2, w2, -9
 	add	x0, x23, x0
@@ -19120,50 +19180,50 @@ ftl_write_commit:
 	ldr	x24, [x0, 8]
 	ldr	w0, [x0, 40]
 	str	w0, [x29, 140]
-.L3087:
+.L3080:
 	adrp	x0, .LANCHOR121
 	str	x0, [x29, 96]
 	ldrb	w1, [x0, #:lo12:.LANCHOR121]
 	cmp	w20, w1
-	bcs	.L3112
+	bcs	.L3105
 	add	w20, w21, w20
-	cbz	x24, .L3090
-	cbz	w21, .L3091
+	cbz	x24, .L3083
+	cbz	w21, .L3084
 	lsl	w2, w21, 9
 	mov	x1, x24
 	mov	x0, x26
 	bl	ftl_memcpy
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 48
-.L3091:
+.L3084:
 	ldr	x0, [x29, 96]
 	ldrb	w2, [x0, #:lo12:.LANCHOR121]
 	cmp	w20, w2
-	bcc	.L3092
+	bcc	.L3085
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 16
-.L3112:
+.L3105:
 	mov	w24, 0
-	b	.L3089
-.L3086:
+	b	.L3082
+.L3079:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 32
-	bne	.L3088
+	bne	.L3081
 	mov	x24, 0
-	b	.L3087
-.L3092:
+	b	.L3080
+.L3085:
 	ubfiz	x0, x20, 9, 9
 	sub	w2, w2, w20
 	add	x1, x24, x0
 	lsl	w2, w2, 9
 	add	x0, x26, x0
 	bl	ftl_memcpy
-	b	.L3112
-.L3090:
+	b	.L3105
+.L3083:
 	ldr	w0, [x29, 140]
 	cmn	w0, #1
-	beq	.L3093
+	beq	.L3086
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 140]
@@ -19176,11 +19236,11 @@ ftl_write_commit:
 	ldr	w0, [x0, 4]
 	add	w24, w24, 1
 	cmp	w22, w0
-	bne	.L3094
+	bne	.L3087
 	ldr	w0, [x27, 52]
 	cmn	w0, #1
-	bne	.L3095
-.L3094:
+	bne	.L3088
+.L3087:
 	ldr	x1, [x25, #:lo12:.LANCHOR10]
 	mov	w3, w22
 	ldr	w4, [x27, 52]
@@ -19188,53 +19248,53 @@ ftl_write_commit:
 	ldr	w0, [x1, 552]
 	add	w0, w0, 1
 	str	w0, [x1, 552]
-	adrp	x0, .LC209
-	add	x0, x0, :lo12:.LC209
+	adrp	x0, .LC212
+	add	x0, x0, :lo12:.LC212
 	ldrb	w1, [x27, 1]
 	bl	printf
 	ldr	x1, [x27, 24]
 	mov	w3, 4
-	adrp	x0, .LC168
+	adrp	x0, .LC171
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC168
+	add	x0, x0, :lo12:.LC171
 	bl	rknand_print_hex
-.L3095:
+.L3088:
 	ldr	x0, [x27, 24]
 	ldr	w0, [x0, 4]
 	cmp	w22, w0
-	bne	.L3096
+	bne	.L3089
 	ldr	w0, [x27, 52]
 	cmn	w0, #1
-	bne	.L3097
-.L3096:
-	adrp	x1, .LANCHOR211
+	bne	.L3090
+.L3089:
+	adrp	x1, .LANCHOR212
 	adrp	x0, .LC0
 	mov	w2, 567
-	add	x1, x1, :lo12:.LANCHOR211
+	add	x1, x1, :lo12:.LANCHOR212
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3097:
-	cbz	w21, .L3098
+.L3090:
+	cbz	w21, .L3091
 	ldr	w0, [x29, 140]
 	lsl	w2, w21, 9
 	cmn	w0, #1
-	beq	.L3099
+	beq	.L3092
 	ldr	x1, [x27, 8]
 	mov	x0, x26
 	bl	ftl_memcpy
-.L3100:
+.L3093:
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 48
-.L3098:
+.L3091:
 	ldr	x0, [x29, 96]
 	ldrb	w2, [x0, #:lo12:.LANCHOR121]
 	cmp	w20, w2
-	bcc	.L3101
-	bls	.L3102
+	bcc	.L3094
+	bls	.L3095
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 16
-.L3102:
-	cbz	x27, .L3089
+.L3095:
+	cbz	x27, .L3082
 	ldrb	w0, [x27, 2]
 	mov	x1, x27
 	and	w0, w0, -9
@@ -19244,17 +19304,17 @@ ftl_write_commit:
 	bl	buf_remove_buf
 	mov	x0, x27
 	bl	buf_free
-.L3089:
+.L3082:
 	ldrh	w0, [x19, 6]
-	cbnz	w0, .L3104
+	cbnz	w0, .L3097
 	bl	ftl_flush
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L3104:
+.L3097:
 	mov	x0, x19
 	bl	ftl_get_new_free_page
 	ldr	x1, [x29, 112]
-	adrp	x20, .LANCHOR172
+	adrp	x20, .LANCHOR173
 	lsl	x2, x1, 6
 	add	x1, x23, x2
 	ldr	w3, [x1, 32]
@@ -19275,33 +19335,33 @@ ftl_write_commit:
 	sub	w0, w0, #1
 	strh	w0, [x1, 48]
 	ldr	x1, [x29, 120]
-	add	x0, x20, :lo12:.LANCHOR172
+	add	x0, x20, :lo12:.LANCHOR173
 	bl	buf_add_tail
 	ldr	x0, [x29, 104]
 	ldrb	w2, [x0, #:lo12:.LANCHOR119]
 	add	w2, w2, 1
 	and	w2, w2, 255
 	strb	w2, [x0, #:lo12:.LANCHOR119]
-	adrp	x0, .LANCHOR212
+	adrp	x0, .LANCHOR213
 	cmp	w2, 2
-	str	wzr, [x0, #:lo12:.LANCHOR212]
+	str	wzr, [x0, #:lo12:.LANCHOR213]
 	ldrh	w0, [x19, 6]
-	bhi	.L3105
+	bhi	.L3098
 	cmp	w0, 1
-	bne	.L3077
-.L3105:
+	bne	.L3070
+.L3098:
 	ldrb	w1, [x19, 5]
 	cmp	w1, 0
 	mov	w1, 0
 	cset	w4, ne
 	cmp	w0, 1
-	ldrb	w0, [x20, #:lo12:.LANCHOR172]
+	ldrb	w0, [x20, #:lo12:.LANCHOR173]
 	csinc	w4, w2, w4, eq
 	mov	w3, w0
-.L3109:
+.L3102:
 	cmp	w1, w4
-	bne	.L3110
-	strb	w3, [x20, #:lo12:.LANCHOR172]
+	bne	.L3103
+	strb	w3, [x20, #:lo12:.LANCHOR173]
 	and	w1, w1, 255
 	ldr	x3, [x29, 104]
 	sub	w2, w2, w1
@@ -19311,58 +19371,58 @@ ftl_write_commit:
 	bl	sblk_prog_page
 	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bne	.L3077
+	bne	.L3070
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	mov	x0, x19
 	bl	ftl_write_last_log_page
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L3077:
+.L3070:
 	adrp	x0, .LANCHOR57
 	ldrb	w0, [x0, #:lo12:.LANCHOR57]
-	cbnz	w0, .L3074
-.L3076:
+	cbnz	w0, .L3067
+.L3069:
 	bl	ftl_write_completed
 	mov	w0, 0
-	b	.L3073
-.L3101:
+	b	.L3066
+.L3094:
 	ldr	w0, [x29, 140]
 	sub	w2, w2, w20
 	lsl	w2, w2, 9
 	cmn	w0, #1
 	ubfiz	x0, x20, 7, 9
-	beq	.L3103
+	beq	.L3096
 	ldr	x1, [x27, 8]
 	lsl	x0, x0, 2
 	add	x1, x1, x0
 	add	x0, x26, x0
 	bl	ftl_memcpy
-	b	.L3102
-.L3103:
+	b	.L3095
+.L3096:
 	mov	w1, 0
 	add	x0, x26, x0, lsl 2
 	bl	ftl_memset
-	b	.L3102
-.L3110:
+	b	.L3095
+.L3103:
 	ubfiz	x3, x3, 6, 8
 	add	w1, w1, 1
 	ldrb	w3, [x23, x3]
-	b	.L3109
-.L3111:
+	b	.L3102
+.L3104:
 	lsl	w2, w21, 9
 	mov	x27, 0
 	mov	w24, 0
-.L3099:
+.L3092:
 	mov	w1, 0
 	mov	x0, x26
 	bl	ftl_memset
-	b	.L3100
-.L3093:
-	cbnz	w21, .L3111
+	b	.L3093
+.L3086:
+	cbnz	w21, .L3104
 	mov	w24, 0
 	mov	x27, 0
-	b	.L3098
+	b	.L3091
 	.size	ftl_write_commit, .-ftl_write_commit
 	.section	.text.gc_do_copy_back,"ax",@progbits
 	.align	2
@@ -19379,10 +19439,10 @@ gc_do_copy_back:
 	stp	x23, x24, [sp, 64]
 	stp	x25, x26, [sp, 80]
 	stp	x27, x28, [sp, 96]
-	cbnz	w0, .L3135
+	cbnz	w0, .L3128
 	bl	buf_alloc
 	mov	x19, x0
-	cbz	x0, .L3134
+	cbz	x0, .L3127
 	adrp	x20, .LANCHOR62
 	add	x3, x20, :lo12:.LANCHOR62
 	ldrh	w2, [x3, 26]
@@ -19398,52 +19458,52 @@ gc_do_copy_back:
 	ldr	w0, [x19, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3137
-	adrp	x1, .LANCHOR213
+	bne	.L3130
+	adrp	x1, .LANCHOR214
 	adrp	x0, .LC0
 	mov	w2, 601
-	add	x1, x1, :lo12:.LANCHOR213
+	add	x1, x1, :lo12:.LANCHOR214
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3137:
+.L3130:
 	ldr	x0, [x19, 24]
 	ldr	w21, [x0, 4]
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 160]
 	cmn	w0, #1
-	bne	.L3138
+	bne	.L3131
 	mov	w2, 0
 	add	x1, x29, 160
 	mov	w0, w21
 	bl	pm_log2phys
-.L3138:
+.L3131:
 	ldr	w23, [x29, 160]
 	cmp	w22, w23
-	bne	.L3139
+	bne	.L3132
 	adrp	x0, .LANCHOR49
 	add	x0, x0, :lo12:.LANCHOR49
 	add	x1, x0, 2
 	add	x0, x0, 2050
-.L3142:
+.L3135:
 	ldr	w2, [x1, 34]
 	cmp	w21, w2
-	bne	.L3140
+	bne	.L3133
 	ldrb	w2, [x1]
-	tbz	x2, 1, .L3140
+	tbz	x2, 1, .L3133
 	mov	x0, x19
 	bl	buf_free
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3134
+	tbz	x0, 8, .L3127
 	add	x20, x20, :lo12:.LANCHOR62
-	adrp	x0, .LC210
+	adrp	x0, .LC213
 	mov	w2, w22
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC210
+	add	x0, x0, :lo12:.LC213
 	ldrh	w3, [x20, 26]
 	bl	printf
-.L3134:
+.L3127:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -19452,10 +19512,10 @@ gc_do_copy_back:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 224
 	ret
-.L3140:
+.L3133:
 	add	x1, x1, 64
 	cmp	x0, x1
-	bne	.L3142
+	bne	.L3135
 	adrp	x0, .LANCHOR121
 	mov	w1, 10
 	strb	wzr, [x19, 57]
@@ -19470,19 +19530,19 @@ gc_do_copy_back:
 	str	w0, [x19, 32]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3143
+	tbz	x0, 8, .L3136
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	add	x1, x20, :lo12:.LANCHOR62
 	mov	w3, w0
 	mov	w4, w22
-	adrp	x0, .LC211
+	adrp	x0, .LC214
 	mov	w2, w23
-	add	x0, x0, :lo12:.LC211
+	add	x0, x0, :lo12:.LC214
 	ldrh	w5, [x1, 26]
 	mov	w1, w21
 	bl	printf
-.L3143:
+.L3136:
 	mov	x0, x19
 	bl	ftl_gc_write_buf
 	bl	ftl_write_commit
@@ -19495,27 +19555,27 @@ gc_do_copy_back:
 	ldrh	w0, [x20, 28]
 	add	w0, w0, 1
 	strh	w0, [x20, 28]
-	b	.L3134
-.L3139:
+	b	.L3127
+.L3132:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3144
+	tbz	x0, 8, .L3137
 	add	x20, x20, :lo12:.LANCHOR62
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	mov	w3, w0
 	mov	w4, w22
-	adrp	x0, .LC211
+	adrp	x0, .LC214
 	ldrh	w5, [x20, 26]
 	mov	w2, w23
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC211
+	add	x0, x0, :lo12:.LC214
 	bl	printf
-.L3144:
+.L3137:
 	mov	x0, x19
 	bl	buf_free
-	b	.L3134
-.L3135:
+	b	.L3127
+.L3128:
 	adrp	x1, .LANCHOR10
 	adrp	x0, .LANCHOR68
 	stp	x0, x1, [x29, 128]
@@ -19524,10 +19584,10 @@ gc_do_copy_back:
 	ldrb	w25, [x0, #:lo12:.LANCHOR68]
 	add	x22, x22, 80
 	cmp	w25, 3
-	bne	.L3145
+	bne	.L3138
 	adrp	x0, .LANCHOR70
 	ldrb	w0, [x0, #:lo12:.LANCHOR70]
-	cbz	w0, .L3146
+	cbz	w0, .L3139
 	add	x0, x24, :lo12:.LANCHOR62
 	ldrb	w19, [x22, 9]
 	ldrh	w20, [x0, 314]
@@ -19536,7 +19596,7 @@ gc_do_copy_back:
 	sdiv	w21, w20, w21
 	madd	w19, w21, w19, w20
 	and	w19, w19, 65535
-.L3147:
+.L3140:
 	adrp	x1, .LANCHOR72
 	ldrb	w0, [x22, 9]
 	add	x4, x24, :lo12:.LANCHOR62
@@ -19548,18 +19608,18 @@ gc_do_copy_back:
 	adrp	x0, .LANCHOR148
 	ldr	x7, [x0, #:lo12:.LANCHOR148]
 	sub	w3, w3, #1
-.L3150:
+.L3143:
 	cmp	w2, w8
-	blt	.L3152
-.L3179:
+	blt	.L3145
+.L3172:
 	mov	w23, 1
-	b	.L3148
-.L3146:
+	b	.L3141
+.L3139:
 	add	x0, x24, :lo12:.LANCHOR62
 	ldrb	w20, [x22, 9]
 	ldrh	w1, [x0, 314]
-	adrp	x0, .LANCHOR214
-	add	x0, x0, :lo12:.LANCHOR214
+	adrp	x0, .LANCHOR215
+	add	x0, x0, :lo12:.LANCHOR215
 	sdiv	w19, w1, w20
 	ldrh	w23, [x0, w19, sxtw 1]
 	msub	w19, w19, w20, w1
@@ -19570,12 +19630,12 @@ gc_do_copy_back:
 	madd	w20, w21, w20, w19
 	add	w20, w20, w20, lsl 1
 	and	w20, w20, 65535
-	beq	.L3147
-.L3148:
+	beq	.L3140
+.L3141:
 	adrp	x0, .LANCHOR14
 	str	x0, [x29, 112]
 	ldr	w1, [x0, #:lo12:.LANCHOR14]
-	tbz	x1, 8, .L3153
+	tbz	x1, 8, .L3146
 	adrp	x0, .LANCHOR148
 	ubfiz	x1, x20, 2, 16
 	mov	w6, w20
@@ -19583,18 +19643,18 @@ gc_do_copy_back:
 	ldr	x2, [x0, #:lo12:.LANCHOR148]
 	add	x0, x24, :lo12:.LANCHOR62
 	ldrh	w4, [x0, 314]
-	adrp	x0, .LC212
+	adrp	x0, .LC215
 	ldr	w5, [x2, x1]
-	add	x0, x0, :lo12:.LC212
+	add	x0, x0, :lo12:.LC215
 	mov	w2, w23
 	mov	w1, w21
 	bl	printf
-.L3153:
+.L3146:
 	adrp	x0, .LANCHOR49
 	str	wzr, [x29, 152]
 	add	x0, x0, :lo12:.LANCHOR49
 	str	x0, [x29, 120]
-.L3154:
+.L3147:
 	ldrb	w2, [x22, 9]
 	ldr	w0, [x29, 152]
 	ldrh	w26, [x29, 152]
@@ -19602,27 +19662,27 @@ gc_do_copy_back:
 	str	w0, [x29, 156]
 	mul	w1, w25, w2
 	cmp	w0, w1
-	blt	.L3166
+	blt	.L3159
 	ldr	x0, [x29, 128]
 	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w0, 3
 	add	x0, x29, 160
-	beq	.L3167
+	beq	.L3160
 	sub	w3, w1, #1
 	mov	w2, 0
-.L3168:
+.L3161:
 	cmp	w2, w3
-	blt	.L3174
+	blt	.L3167
 	ldr	x0, [x0, w3, sxtw 3]
 	mov	w2, -1
 	strb	w2, [x0]
 	ldr	x0, [x29, 160]
 	bl	sblk_prog_page
-	b	.L3173
-.L3145:
+	b	.L3166
+.L3138:
 	adrp	x0, .LANCHOR104
 	ldrb	w0, [x0, #:lo12:.LANCHOR104]
-	cbnz	w0, .L3149
+	cbnz	w0, .L3142
 	add	x0, x24, :lo12:.LANCHOR62
 	ldrb	w19, [x22, 9]
 	mov	w25, 1
@@ -19630,8 +19690,8 @@ gc_do_copy_back:
 	sdiv	w21, w20, w19
 	msub	w19, w21, w19, w20
 	and	w19, w19, 65535
-	b	.L3147
-.L3149:
+	b	.L3140
+.L3142:
 	add	x0, x24, :lo12:.LANCHOR62
 	ldrb	w19, [x22, 9]
 	mov	w25, 2
@@ -19639,28 +19699,28 @@ gc_do_copy_back:
 	sdiv	w21, w20, w19
 	msub	w19, w21, w19, w20
 	and	w19, w19, 65535
-	b	.L3147
-.L3152:
+	b	.L3140
+.L3145:
 	add	w5, w20, w2
 	cmp	w5, w3
-	beq	.L3179
+	beq	.L3172
 	sbfiz	x5, x5, 2, 32
 	ldr	w0, [x7, x5]
 	cmn	w0, #1
-	bne	.L3151
+	bne	.L3144
 	ldrh	w6, [x4, 26]
 	cmp	w6, w10
-	bcs	.L3134
+	bcs	.L3127
 	mov	w0, w6
 	bl	gc_get_src_ppa_from_index
 	add	w6, w6, 1
 	strh	w6, [x4, 26]
 	str	w0, [x7, x5]
-.L3151:
+.L3144:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-	b	.L3150
-.L3166:
+	b	.L3143
+.L3159:
 	ldr	w0, [x29, 156]
 	add	w0, w20, w0
 	str	w0, [x29, 144]
@@ -19669,11 +19729,11 @@ gc_do_copy_back:
 	ldr	x0, [x0, #:lo12:.LANCHOR69]
 	ldrb	w0, [x0, x27]
 	cmp	w0, 255
-	bne	.L3155
+	bne	.L3148
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbnz	x0, .L3156
+	cbnz	x0, .L3149
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	bl	gc_write_completed
@@ -19681,8 +19741,8 @@ gc_do_copy_back:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbz	x0, .L3134
-.L3156:
+	cbz	x0, .L3127
+.L3149:
 	adrp	x0, .LANCHOR69
 	ldrb	w1, [x28, 1]
 	adrp	x5, .LANCHOR72
@@ -19702,7 +19762,7 @@ gc_do_copy_back:
 	mul	w0, w0, w7
 	sub	w0, w0, #1
 	cmp	w1, w0
-	bne	.L3157
+	bne	.L3150
 	adrp	x0, .LANCHOR147
 	adrp	x4, .LANCHOR73
 	stp	x6, x5, [x29, 96]
@@ -19748,7 +19808,7 @@ gc_do_copy_back:
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x0, 132]
 	str	w0, [x6, 8]
-.L3155:
+.L3148:
 	adrp	x0, .LANCHOR69
 	ldr	w5, [x29, 156]
 	add	x1, x29, 160
@@ -19767,7 +19827,7 @@ gc_do_copy_back:
 	strb	w23, [x3, 61]
 	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w0, 3
-	bne	.L3161
+	bne	.L3154
 	udiv	w0, w26, w0
 	adrp	x6, .LANCHOR105
 	ldrh	w6, [x6, #:lo12:.LANCHOR105]
@@ -19785,10 +19845,10 @@ gc_do_copy_back:
 	ldr	x3, [x5, #:lo12:.LANCHOR149]
 	orr	w0, w1, w0, lsl 24
 	str	w0, [x3, x6, lsl 2]
-.L3162:
+.L3155:
 	ldr	x0, [x29, 112]
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3165
+	tbz	x0, 8, .L3158
 	ldr	x0, [x29, 120]
 	ldrb	w4, [x4, x27]
 	ldr	w1, [x29, 156]
@@ -19802,19 +19862,19 @@ gc_do_copy_back:
 	str	w0, [sp, 8]
 	mov	w0, 3
 	udiv	w26, w26, w0
-	adrp	x0, .LC213
-	add	x0, x0, :lo12:.LC213
+	adrp	x0, .LC216
+	add	x0, x0, :lo12:.LC216
 	add	w26, w26, w19
 	str	w26, [sp]
 	ldr	w5, [x2, 40]
 	mov	w2, w23
 	bl	printf
-.L3165:
+.L3158:
 	ldr	w0, [x29, 152]
 	add	w0, w0, 1
 	str	w0, [x29, 152]
-	b	.L3154
-.L3157:
+	b	.L3147
+.L3150:
 	lsl	x0, x27, 2
 	str	x0, [x29, 144]
 	ldr	x0, [x6, #:lo12:.LANCHOR148]
@@ -19827,7 +19887,7 @@ gc_do_copy_back:
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3159
+	bne	.L3152
 	adrp	x0, .LANCHOR99
 	ldr	w1, [x28, 40]
 	ldrh	w4, [x0, #:lo12:.LANCHOR99]
@@ -19846,30 +19906,30 @@ gc_do_copy_back:
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3159
+	bne	.L3152
 	ldr	x0, [x28, 24]
 	mov	w1, -1
 	str	w1, [x0, 4]
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmp	w0, w1, 4, ne
-	bne	.L3159
-	adrp	x1, .LANCHOR213
+	bne	.L3152
+	adrp	x1, .LANCHOR214
 	adrp	x0, .LC0
 	mov	w2, 716
-	add	x1, x1, :lo12:.LANCHOR213
+	add	x1, x1, :lo12:.LANCHOR214
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3159:
+.L3152:
 	ldr	x0, [x28, 24]
 	adrp	x1, .LANCHOR118
 	ldr	w1, [x1, #:lo12:.LANCHOR118]
 	ldr	w2, [x0, 4]
 	cmp	w2, w1
-	bcc	.L3160
+	bcc	.L3153
 	mov	w1, -1
 	str	w1, [x0, 4]
-.L3160:
+.L3153:
 	adrp	x1, .LANCHOR147
 	lsl	x3, x27, 2
 	ldr	w2, [x0, 4]
@@ -19877,32 +19937,32 @@ gc_do_copy_back:
 	str	w2, [x1, x3]
 	ldr	w1, [x28, 40]
 	str	w1, [x0, 8]
-	b	.L3155
-.L3161:
+	b	.L3148
+.L3154:
 	cmp	w0, 2
-	bne	.L3163
+	bne	.L3156
 	adrp	x0, .LANCHOR104
 	adrp	x1, .LANCHOR105
 	ldrb	w0, [x0, #:lo12:.LANCHOR104]
-	cbnz	w0, .L3164
+	cbnz	w0, .L3157
 	ldr	w0, [x29, 156]
 	ldrh	w1, [x1, #:lo12:.LANCHOR105]
 	add	w0, w19, w0
 	add	x0, x22, x0, sxtw 1
 	ldrh	w0, [x0, 16]
 	madd	w0, w0, w1, w21
-.L3222:
+.L3215:
 	orr	w0, w0, 33554432
 	str	w0, [x3, 40]
-.L3163:
+.L3156:
 	ldr	x0, [x29, 120]
 	add	x0, x0, x2, lsl 6
 	ldrh	w1, [x0, 48]
 	ldr	w3, [x0, 40]
 	ldr	x0, [x5, #:lo12:.LANCHOR149]
 	str	w3, [x0, x1, lsl 2]
-	b	.L3162
-.L3164:
+	b	.L3155
+.L3157:
 	add	w0, w19, w26, lsr 1
 	ldrh	w1, [x1, #:lo12:.LANCHOR105]
 	add	x0, x22, x0, sxtw 1
@@ -19910,32 +19970,32 @@ gc_do_copy_back:
 	madd	w0, w0, w1, w21
 	and	w1, w26, 1
 	add	w0, w0, w1
-	b	.L3222
-.L3167:
+	b	.L3215
+.L3160:
 	adrp	x1, .LANCHOR70
 	ldrb	w3, [x1, #:lo12:.LANCHOR70]
 	ldr	x1, [x29, 160]
-	cbz	w3, .L3169
-.L3172:
+	cbz	w3, .L3162
+.L3165:
 	strb	wzr, [x1, 60]
-	b	.L3170
-.L3169:
+	b	.L3163
+.L3162:
 	cmp	w23, 1
-	bne	.L3171
+	bne	.L3164
 	mov	w3, 9
-.L3221:
+.L3214:
 	strb	w3, [x1, 60]
-.L3170:
+.L3163:
 	add	x1, x0, 24
 	bl	sblk_xlc_prog_pages
-.L3173:
+.L3166:
 	adrp	x1, .LANCHOR70
 	ldrb	w3, [x22, 9]
 	ldrb	w1, [x1, #:lo12:.LANCHOR70]
 	and	w0, w3, 65535
-	cbz	w1, .L3175
+	cbz	w1, .L3168
 	add	w0, w0, w0, lsl 1
-.L3176:
+.L3169:
 	adrp	x1, .LANCHOR97
 	add	x24, x24, :lo12:.LANCHOR62
 	ldr	x1, [x1, #:lo12:.LANCHOR97]
@@ -19950,34 +20010,34 @@ gc_do_copy_back:
 	ldrh	w1, [x1, #:lo12:.LANCHOR72]
 	mul	w1, w1, w3
 	cmp	w0, w1
-	blt	.L3177
+	blt	.L3170
 	ldr	x0, [x29, 136]
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	strh	wzr, [x0, 86]
-.L3177:
+.L3170:
 	bl	gc_write_completed
-	b	.L3134
-.L3171:
+	b	.L3127
+.L3164:
 	cmp	w23, 2
-	bne	.L3172
+	bne	.L3165
 	mov	w3, 13
-	b	.L3221
-.L3174:
+	b	.L3214
+.L3167:
 	ldr	x4, [x0, w2, sxtw 3]
 	add	w2, w2, 1
 	ldr	x5, [x0, w2, sxtw 3]
 	and	w2, w2, 65535
 	ldrb	w5, [x5, 1]
 	strb	w5, [x4]
-	b	.L3168
-.L3175:
+	b	.L3161
+.L3168:
 	adrp	x1, .LANCHOR104
 	ldrb	w2, [x1, #:lo12:.LANCHOR104]
 	mov	w1, w0
 	ubfiz	w0, w0, 1, 15
 	cmp	w2, 0
 	csel	w0, w0, w1, ne
-	b	.L3176
+	b	.L3169
 	.size	gc_do_copy_back, .-gc_do_copy_back
 	.section	.text.zftl_do_gc,"ax",@progbits
 	.align	2
@@ -20002,35 +20062,35 @@ zftl_do_gc:
 	stp	x27, x28, [sp, 96]
 	ldr	x24, [x23, #:lo12:.LANCHOR10]
 	cmp	w1, 6
-	bhi	.L3330
+	bhi	.L3323
 	mov	w26, w0
 	and	w21, w21, 65535
-	adrp	x0, .L3226
-	add	x0, x0, :lo12:.L3226
+	adrp	x0, .L3219
+	add	x0, x0, :lo12:.L3219
 	ldrh	w0, [x0,w1,uxtw #1]
-	adr	x1, .Lrtx3226
+	adr	x1, .Lrtx3219
 	add	x0, x1, w0, sxth #2
 	br	x0
-.Lrtx3226:
+.Lrtx3219:
 	.section	.rodata.zftl_do_gc,"a",@progbits
 	.align	0
 	.align	2
-.L3226:
-	.2byte	(.L3225 - .Lrtx3226) / 4
-	.2byte	(.L3227 - .Lrtx3226) / 4
-	.2byte	(.L3228 - .Lrtx3226) / 4
-	.2byte	(.L3229 - .Lrtx3226) / 4
-	.2byte	(.L3230 - .Lrtx3226) / 4
-	.2byte	(.L3231 - .Lrtx3226) / 4
-	.2byte	(.L3232 - .Lrtx3226) / 4
+.L3219:
+	.2byte	(.L3218 - .Lrtx3219) / 4
+	.2byte	(.L3220 - .Lrtx3219) / 4
+	.2byte	(.L3221 - .Lrtx3219) / 4
+	.2byte	(.L3222 - .Lrtx3219) / 4
+	.2byte	(.L3223 - .Lrtx3219) / 4
+	.2byte	(.L3224 - .Lrtx3219) / 4
+	.2byte	(.L3225 - .Lrtx3219) / 4
 	.section	.text.zftl_do_gc
-.L3231:
+.L3224:
 	adrp	x20, .LANCHOR62
 	add	x24, x20, :lo12:.LANCHOR62
 	mov	w22, 0
-.L3233:
+.L3226:
 	bl	gc_check_data_one_wl
-	cbz	w0, .L3326
+	cbz	w0, .L3319
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	add	x20, x20, :lo12:.LANCHOR62
 	strh	wzr, [x20, 56]
@@ -20047,8 +20107,8 @@ zftl_do_gc:
 	bl	buf_free
 	strb	wzr, [x19, #:lo12:.LANCHOR145]
 	str	xzr, [x20, 8]
-	b	.L3394
-.L3225:
+	b	.L3387
+.L3218:
 	adrp	x0, .LANCHOR92
 	adrp	x28, .LANCHOR85
 	adrp	x27, .LANCHOR83
@@ -20062,16 +20122,16 @@ zftl_do_gc:
 	mov	w0, 65535
 	and	w25, w25, 65535
 	cmp	w1, w0
-	beq	.L3234
-	cbnz	w26, .L3235
+	beq	.L3227
+	cbnz	w26, .L3228
 	adrp	x0, .LANCHOR74
 	ldrh	w0, [x0, #:lo12:.LANCHOR74]
 	cmp	w21, w0, lsl 1
-	blt	.L3235
-.L3330:
+	blt	.L3228
+.L3323:
 	mov	w20, 16
-	b	.L3223
-.L3235:
+	b	.L3216
+.L3228:
 	adrp	x5, .LANCHOR82
 	mov	w1, 5
 	adrp	x26, .LANCHOR71
@@ -20083,7 +20143,7 @@ zftl_do_gc:
 	and	w3, w0, 65535
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L3236
+	beq	.L3229
 	adrp	x4, .LANCHOR9
 	ubfiz	x3, x3, 1, 16
 	adrp	x1, .LANCHOR146
@@ -20096,120 +20156,120 @@ zftl_do_gc:
 	adrp	x4, .LANCHOR80
 	ldrh	w4, [x4, #:lo12:.LANCHOR80]
 	cmp	w4, w3
-	bcs	.L3237
+	bcs	.L3230
 	adrp	x1, .LANCHOR6
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	cmp	w2, w1, lsr 4
-	bls	.L3236
+	bls	.L3229
 	adrp	x1, .LANCHOR86
 	ldrh	w1, [x1, #:lo12:.LANCHOR86]
 	cmp	w1, w3
-	bls	.L3236
-.L3237:
+	bls	.L3229
+.L3230:
 	ldrb	w2, [x26, #:lo12:.LANCHOR71]
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L3238
+	cbz	w0, .L3231
 	mov	w0, 1
 	str	wzr, [x20, #:lo12:.LANCHOR146]
 	strb	w0, [x19, #:lo12:.LANCHOR145]
-	b	.L3330
-.L3236:
+	b	.L3323
+.L3229:
 	strh	wzr, [x5, #:lo12:.LANCHOR82]
-.L3238:
+.L3231:
 	cmp	w22, 15
-	bls	.L3332
+	bls	.L3325
 	adrp	x0, .LANCHOR87
 	ldrh	w1, [x0, #:lo12:.LANCHOR87]
 	adrp	x0, .LANCHOR88
 	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w1, w0
-	bhi	.L3332
+	bhi	.L3325
 	cmp	w25, 0
 	cset	w20, eq
 	add	w20, w20, 1
-.L3239:
+.L3232:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3240
+	tbz	x0, 8, .L3233
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	mov	w4, w22
 	ldrb	w2, [x26, #:lo12:.LANCHOR71]
 	mov	w3, w21
-	mov	w1, 1856
+	mov	w1, 1850
 	ldrh	w7, [x0, 122]
 	ldrh	w6, [x0, 120]
 	ldrh	w5, [x0, 124]
 	ldrh	w0, [x24, 80]
 	str	w0, [sp]
-	adrp	x0, .LC214
-	add	x0, x0, :lo12:.LC214
+	adrp	x0, .LC217
+	add	x0, x0, :lo12:.LC217
 	bl	printf
-.L3240:
+.L3233:
 	ldrb	w0, [x26, #:lo12:.LANCHOR71]
 	mov	w2, 1
 	mov	w1, w20
 	bl	gc_search_src_blk
 	cmp	w0, 0
-	ble	.L3241
-.L3242:
+	ble	.L3234
+.L3235:
 	mov	w0, 1
-.L3396:
+.L3389:
 	strb	w0, [x19, #:lo12:.LANCHOR145]
-	b	.L3330
-.L3332:
+	b	.L3323
+.L3325:
 	mov	w20, 2
-	b	.L3239
-.L3241:
+	b	.L3232
+.L3234:
 	ldrb	w0, [x26, #:lo12:.LANCHOR71]
 	mov	w2, 1
 	mov	w1, 3
 	bl	gc_search_src_blk
 	cmp	w0, 0
-	bgt	.L3242
-	b	.L3330
-.L3234:
+	bgt	.L3235
+	b	.L3323
+.L3227:
 	cmp	w26, 1
-	bne	.L3244
+	bne	.L3237
 	bl	gc_scan_static_data
 	adrp	x24, .LANCHOR71
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	ldrh	w0, [x0, 122]
-	cbz	w0, .L3245
-.L3246:
+	cbz	w0, .L3238
+.L3239:
 	mov	w0, 1
 	strb	w0, [x24, #:lo12:.LANCHOR71]
-	b	.L3396
-.L3245:
+	b	.L3389
+.L3238:
 	bl	gc_static_wearleveling
 	mov	w20, w0
-	cbnz	w0, .L3246
-	cbnz	w22, .L3247
-.L3251:
+	cbnz	w0, .L3239
+	cbnz	w22, .L3240
+.L3244:
 	mov	w20, 16
-.L3248:
+.L3241:
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	adrp	x3, .LANCHOR71
 	mov	w1, 1
 	mov	x23, x3
 	strb	w1, [x3, #:lo12:.LANCHOR71]
 	ldrh	w5, [x0, 124]
-	cbz	w5, .L3256
+	cbz	w5, .L3249
 	strb	w1, [x19, #:lo12:.LANCHOR145]
 	adrp	x1, .LANCHOR14
 	strb	wzr, [x3, #:lo12:.LANCHOR71]
 	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 8, .L3223
+	tbz	x1, 8, .L3216
 	ldrh	w7, [x0, 122]
 	mov	w4, w22
 	ldrh	w6, [x0, 120]
 	mov	w3, w21
-	adrp	x0, .LC215
+	adrp	x0, .LC218
 	mov	w2, 0
-	mov	w1, 1954
-	add	x0, x0, :lo12:.LC215
+	mov	w1, 1948
+	add	x0, x0, :lo12:.LC218
 	bl	printf
-.L3223:
+.L3216:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
@@ -20219,25 +20279,25 @@ zftl_do_gc:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 128
 	ret
-.L3247:
+.L3240:
 	cmp	w21, w25
 	adrp	x1, .LANCHOR87
 	adrp	x2, .LANCHOR84
-	bcs	.L3249
+	bcs	.L3242
 	ldrh	w0, [x2, #:lo12:.LANCHOR84]
 	cmp	w21, w0, lsl 1
-	blt	.L3250
-.L3249:
+	blt	.L3243
+.L3242:
 	ldrh	w2, [x2, #:lo12:.LANCHOR84]
 	add	w0, w21, w25
 	cmp	w0, w2, lsl 1
-	blt	.L3250
+	blt	.L3243
 	adrp	x0, .LANCHOR88
 	ldrh	w2, [x1, #:lo12:.LANCHOR87]
 	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w2, w0
-	bcc	.L3251
-.L3250:
+	bcc	.L3244
+.L3243:
 	adrp	x5, .LANCHOR146
 	adrp	x2, .LANCHOR6
 	mov	w6, 1
@@ -20247,17 +20307,17 @@ zftl_do_gc:
 	add	w0, w0, 1
 	str	w0, [x5, #:lo12:.LANCHOR146]
 	cmp	w0, w2, lsr 5
-	bls	.L3252
+	bls	.L3245
 	ldrh	w0, [x1, #:lo12:.LANCHOR87]
 	cmp	w0, w22
-	bls	.L3252
+	bls	.L3245
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3251
+	beq	.L3244
 	adrp	x1, .LANCHOR9
 	ubfiz	x0, x0, 1, 16
 	adrp	x2, .LANCHOR73
@@ -20268,82 +20328,82 @@ zftl_do_gc:
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	bgt	.L3251
+	bgt	.L3244
 	mov	w0, w6
 	str	wzr, [x5, #:lo12:.LANCHOR146]
 	mov	w2, 4
 	mov	w1, 2
-.L3384:
+.L3377:
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-	cbz	w0, .L3251
-	b	.L3242
-.L3252:
+	cbz	w0, .L3244
+	b	.L3235
+.L3245:
 	adrp	x0, .LANCHOR88
 	ldrh	w1, [x1, #:lo12:.LANCHOR87]
 	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w1, w0
-	bcc	.L3254
+	bcc	.L3247
 	mov	w2, 1
 	mov	w1, 2
 	mov	w0, w2
-	b	.L3384
-.L3254:
+	b	.L3377
+.L3247:
 	ldrh	w0, [x28, #:lo12:.LANCHOR85]
-	cbnz	w0, .L3255
+	cbnz	w0, .L3248
 	ldrh	w0, [x27, #:lo12:.LANCHOR83]
 	cmp	w0, 8
-	bls	.L3248
-.L3255:
+	bls	.L3241
+.L3248:
 	mov	w1, 1
 	mov	w2, 4
 	mov	w0, w1
-	b	.L3384
-.L3244:
+	b	.L3377
+.L3237:
 	adrp	x0, .LANCHOR74
 	ldrh	w0, [x0, #:lo12:.LANCHOR74]
 	cmp	w0, w21
-	bcc	.L3330
-	b	.L3251
-.L3256:
+	bcc	.L3323
+	b	.L3244
+.L3249:
 	adrp	x2, .LANCHOR74
 	mov	x24, x2
 	ldrh	w4, [x2, #:lo12:.LANCHOR74]
 	cmp	w21, w4
-	bcs	.L3257
-	cbz	w22, .L3258
+	bcs	.L3250
+	cbz	w22, .L3251
 	cmp	w22, 16
-	bls	.L3259
+	bls	.L3252
 	adrp	x0, .LANCHOR87
 	ldrh	w2, [x0, #:lo12:.LANCHOR87]
 	adrp	x0, .LANCHOR88
 	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w2, w0
-	bhi	.L3259
+	bhi	.L3252
 	str	x3, [x29, 104]
 	mov	w2, 4
 	mov	w0, w1
 	bl	gc_search_src_blk
 	ldr	x3, [x29, 104]
 	tst	w0, 65535
-	bne	.L3260
+	bne	.L3253
 	ldrb	w0, [x3, #:lo12:.LANCHOR71]
 	mov	w2, 4
 	mov	w1, 3
-.L3386:
+.L3379:
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-.L3261:
-	cbnz	w0, .L3263
-	b	.L3223
-.L3260:
+.L3254:
+	cbnz	w0, .L3256
+	b	.L3216
+.L3253:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	and	w3, w0, 65535
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L3263
+	beq	.L3256
 	adrp	x4, .LANCHOR9
 	ubfiz	x3, x3, 1, 16
 	adrp	x1, .LANCHOR146
@@ -20356,16 +20416,16 @@ zftl_do_gc:
 	adrp	x4, .LANCHOR80
 	ldrh	w4, [x4, #:lo12:.LANCHOR80]
 	cmp	w4, w3
-	bcs	.L3264
+	bcs	.L3257
 	adrp	x1, .LANCHOR6
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	cmp	w2, w1, lsr 4
-	bls	.L3263
+	bls	.L3256
 	adrp	x1, .LANCHOR86
 	ldrh	w1, [x1, #:lo12:.LANCHOR86]
 	cmp	w1, w3
-	bls	.L3263
-.L3264:
+	bls	.L3256
+.L3257:
 	ldrb	w2, [x23, #:lo12:.LANCHOR71]
 	mov	w1, 0
 	bl	gc_add_sblk
@@ -20373,67 +20433,67 @@ zftl_do_gc:
 	adrp	x0, .LANCHOR116
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR116]
-.L3263:
+.L3256:
 	mov	w0, 1
 	strb	w0, [x19, #:lo12:.LANCHOR145]
-	b	.L3223
-.L3259:
+	b	.L3216
+.L3252:
 	mov	w2, 1
 	mov	w0, w2
 	mov	w1, 2
-.L3393:
+.L3386:
 	bl	gc_search_src_blk
 	tst	w0, 65535
-	bne	.L3263
+	bne	.L3256
 	mov	w2, 2
-.L3389:
+.L3382:
 	mov	w1, 3
 	ldrb	w0, [x23, #:lo12:.LANCHOR71]
-	b	.L3386
-.L3258:
+	b	.L3379
+.L3251:
 	adrp	x1, .LANCHOR14
 	strb	wzr, [x3, #:lo12:.LANCHOR71]
 	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 8, .L3266
+	tbz	x1, 8, .L3259
 	ldrh	w7, [x0, 122]
 	mov	w5, 0
 	ldrh	w6, [x0, 120]
 	mov	w4, 0
-	adrp	x0, .LC215
+	adrp	x0, .LC218
 	mov	w3, w21
 	mov	w2, 0
-	mov	w1, 1984
-	add	x0, x0, :lo12:.LC215
+	mov	w1, 1978
+	add	x0, x0, :lo12:.LC218
 	bl	printf
-.L3266:
+.L3259:
 	cmp	w21, 16
-	bls	.L3267
+	bls	.L3260
 	mov	w2, 4
-	b	.L3389
-.L3267:
+	b	.L3382
+.L3260:
 	mov	w2, 1
 	ldrb	w0, [x23, #:lo12:.LANCHOR71]
 	mov	w1, w2
-	b	.L3393
-.L3257:
+	b	.L3386
+.L3250:
 	cmp	w26, 1
-	bne	.L3223
+	bne	.L3216
 	cmp	w21, w4, lsl 1
-	bge	.L3268
+	bge	.L3261
 	cmp	w25, w22, lsr 1
-	bcs	.L3269
+	bcs	.L3262
 	adrp	x0, .LANCHOR87
 	ldrh	w1, [x0, #:lo12:.LANCHOR87]
 	adrp	x0, .LANCHOR88
 	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w1, w0
-	bcs	.L3269
+	bcs	.L3262
 	adrp	x0, .LANCHOR84
 	ldrh	w0, [x0, #:lo12:.LANCHOR84]
 	lsr	w0, w0, 2
 	strh	w0, [x2, #:lo12:.LANCHOR74]
-	b	.L3223
-.L3269:
+	b	.L3216
+.L3262:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
@@ -20441,21 +20501,21 @@ zftl_do_gc:
 	mov	w1, 65535
 	mov	w3, w26
 	cmp	w26, w1
-	bne	.L3270
-.L3275:
+	bne	.L3263
+.L3268:
 	cmp	w22, 1
-	bhi	.L3271
-.L3272:
+	bhi	.L3264
+.L3265:
 	cmp	w21, w25
 	adrp	x21, .LANCHOR84
-	bcs	.L3279
+	bcs	.L3272
 	strb	wzr, [x23, #:lo12:.LANCHOR71]
 	mov	w0, 4
 	bl	zftl_get_gc_node.part.9
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3279
+	beq	.L3272
 	adrp	x1, .LANCHOR9
 	ubfiz	x0, x0, 1, 16
 	adrp	x2, .LANCHOR73
@@ -20466,13 +20526,13 @@ zftl_do_gc:
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	mul	w0, w0, w2
 	cmp	w1, w0, lsr 1
-	ble	.L3281
-.L3279:
+	ble	.L3274
+.L3272:
 	ldrh	w0, [x21, #:lo12:.LANCHOR84]
 	lsr	w0, w0, 2
 	strh	w0, [x24, #:lo12:.LANCHOR74]
-	b	.L3223
-.L3270:
+	b	.L3216
+.L3263:
 	adrp	x2, .LANCHOR146
 	adrp	x4, .LANCHOR6
 	uxtw	x26, w26
@@ -20482,14 +20542,14 @@ zftl_do_gc:
 	str	w1, [x2, #:lo12:.LANCHOR146]
 	cmp	w1, w4, lsr 4
 	adrp	x4, .LANCHOR9
-	bls	.L3273
+	bls	.L3266
 	ldr	x1, [x4, #:lo12:.LANCHOR9]
 	str	wzr, [x2, #:lo12:.LANCHOR146]
 	ldrh	w2, [x1, x26, lsl 1]
 	adrp	x1, .LANCHOR86
 	ldrh	w1, [x1, #:lo12:.LANCHOR86]
 	cmp	w2, w1
-	bcs	.L3273
+	bcs	.L3266
 	str	x4, [x29, 96]
 	mov	w2, 1
 	str	w3, [x29, 104]
@@ -20497,167 +20557,167 @@ zftl_do_gc:
 	bl	gc_add_sblk
 	ldr	w3, [x29, 104]
 	ldr	x4, [x29, 96]
-	cbnz	w0, .L3263
-.L3273:
+	cbnz	w0, .L3256
+.L3266:
 	ldr	x0, [x4, #:lo12:.LANCHOR9]
 	ldrh	w1, [x0, x26, lsl 1]
 	adrp	x0, .LANCHOR80
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w1, w0, lsr 1
-	bhi	.L3274
+	bhi	.L3267
 	mov	w2, 0
 	mov	w1, 1
 	mov	w0, w3
 	bl	gc_add_sblk
-	b	.L3263
-.L3274:
+	b	.L3256
+.L3267:
 	ldrh	w2, [x27, #:lo12:.LANCHOR83]
 	ldrh	w0, [x28, #:lo12:.LANCHOR85]
 	add	w0, w0, w2
 	adrp	x2, .LANCHOR84
 	ldrh	w2, [x2, #:lo12:.LANCHOR84]
 	cmp	w0, w2, lsl 1
-	ble	.L3275
+	ble	.L3268
 	adrp	x0, .LANCHOR86
 	ldrh	w0, [x0, #:lo12:.LANCHOR86]
 	cmp	w0, w1
-	bcc	.L3272
-	b	.L3275
-.L3271:
+	bcc	.L3265
+	b	.L3268
+.L3264:
 	mov	w1, 1
 	strb	w1, [x23, #:lo12:.LANCHOR71]
 	cmp	w22, 16
-	bls	.L3276
+	bls	.L3269
 	adrp	x0, .LANCHOR87
 	ldrh	w2, [x0, #:lo12:.LANCHOR87]
 	adrp	x0, .LANCHOR88
 	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w2, w0
-	bhi	.L3276
+	bhi	.L3269
 	mov	w2, 4
 	mov	w0, w1
 	bl	gc_search_src_blk
 	ands	w0, w0, 65535
-	bne	.L3277
+	bne	.L3270
 	mov	w2, 4
-.L3385:
+.L3378:
 	ldrb	w0, [x23, #:lo12:.LANCHOR71]
 	mov	w1, 3
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-.L3277:
+.L3270:
 	adrp	x1, .LANCHOR84
 	cmp	w21, w25, lsr 1
 	ldrh	w1, [x1, #:lo12:.LANCHOR84]
-	bls	.L3387
+	bls	.L3380
 	lsr	w1, w1, 2
-.L3388:
+.L3381:
 	strh	w1, [x24, #:lo12:.LANCHOR74]
-	b	.L3261
-.L3276:
+	b	.L3254
+.L3269:
 	mov	w2, 1
 	mov	w1, 2
 	mov	w0, w2
 	bl	gc_search_src_blk
 	ands	w0, w0, 65535
-	bne	.L3277
+	bne	.L3270
 	mov	w2, 2
-	b	.L3385
-.L3281:
+	b	.L3378
+.L3274:
 	mov	w1, 3
 	mov	w2, 4
 	mov	w0, 0
 	bl	gc_search_src_blk
 	ldrh	w1, [x21, #:lo12:.LANCHOR84]
 	and	w0, w0, 65535
-.L3387:
+.L3380:
 	lsr	w1, w1, 1
-	b	.L3388
-.L3268:
+	b	.L3381
+.L3261:
 	adrp	x0, .LANCHOR84
 	mov	w20, 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR84]
 	lsr	w0, w0, 2
 	strh	w0, [x2, #:lo12:.LANCHOR74]
-	b	.L3223
-.L3227:
+	b	.L3216
+.L3220:
 	adrp	x7, .LANCHOR62
 	mov	w0, 65535
 	ldrh	w1, [x7, #:lo12:.LANCHOR62]
 	cmp	w1, w0
-	bne	.L3282
+	bne	.L3275
 	bl	gc_get_src_blk
 	strh	w0, [x7, #:lo12:.LANCHOR62]
-.L3282:
+.L3275:
 	ldrh	w3, [x7, #:lo12:.LANCHOR62]
 	mov	w0, 65535
 	add	x1, x7, :lo12:.LANCHOR62
 	cmp	w3, w0
-	beq	.L3395
+	beq	.L3388
 	adrp	x0, .LANCHOR7
 	ldrh	w5, [x1, 56]
 	uxtw	x4, w3
 	ldr	x2, [x0, #:lo12:.LANCHOR7]
 	add	x2, x2, x4, lsl 2
-	cbz	w5, .L3284
+	cbz	w5, .L3277
 	add	x1, x1, 58
 	mov	w0, 0
-.L3286:
+.L3279:
 	ldrh	w6, [x1], 2
 	cmp	w6, w3
-	bne	.L3285
-.L3290:
+	bne	.L3278
+.L3283:
 	adrp	x0, .LANCHOR62
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR62]
-	b	.L3330
-.L3285:
+	b	.L3323
+.L3278:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w5, w0
-	bne	.L3286
-.L3284:
+	bne	.L3279
+.L3277:
 	ldrb	w0, [x2, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L3287
+	beq	.L3280
 	tst	w0, 192
-	bne	.L3288
-.L3287:
+	bne	.L3281
+.L3280:
 	adrp	x0, .LANCHOR9
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, x4, lsl 1]
-	cbz	w0, .L3290
-	mov	w2, 2217
-	adrp	x1, .LANCHOR215
+	cbz	w0, .L3283
+	mov	w2, 2211
+	adrp	x1, .LANCHOR216
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR215
+	add	x1, x1, :lo12:.LANCHOR216
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3290
-.L3288:
+	b	.L3283
+.L3281:
 	mov	w0, 2
-	b	.L3396
-.L3228:
+	b	.L3389
+.L3221:
 	bl	gc_scan_src_blk
 	cmn	w0, #1
-	bne	.L3291
+	bne	.L3284
 	mov	w0, 3
-	b	.L3396
-.L3291:
+	b	.L3389
+.L3284:
 	adrp	x20, .LANCHOR62
 	mov	w2, 65535
 	add	x0, x20, :lo12:.LANCHOR62
 	ldrh	w1, [x20, #:lo12:.LANCHOR62]
 	cmp	w1, w2
-	beq	.L3242
+	beq	.L3235
 	ldrh	w2, [x0, 24]
-	cbz	w2, .L3292
+	cbz	w2, .L3285
 	mov	w1, 4
 	strh	wzr, [x0, 26]
 	strb	w1, [x19, #:lo12:.LANCHOR145]
-	b	.L3330
-.L3292:
+	b	.L3323
+.L3285:
 	mov	w0, 1
 	strb	w0, [x19, #:lo12:.LANCHOR145]
 	adrp	x0, .LANCHOR9
@@ -20665,14 +20725,14 @@ zftl_do_gc:
 	mov	x19, x0
 	ldr	x2, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L3293
-	adrp	x1, .LANCHOR215
+	cbz	w1, .L3286
+	adrp	x1, .LANCHOR216
 	adrp	x0, .LC0
-	mov	w2, 2245
-	add	x1, x1, :lo12:.LANCHOR215
+	mov	w2, 2239
+	add	x1, x1, :lo12:.LANCHOR216
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3293:
+.L3286:
 	ldrh	w0, [x20, #:lo12:.LANCHOR62]
 	add	x21, x20, :lo12:.LANCHOR62
 	bl	ftl_free_sblk
@@ -20683,70 +20743,70 @@ zftl_do_gc:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w0, 8
-	bhi	.L3294
+	bhi	.L3287
 	strh	w0, [x21, 30]
-	b	.L3290
-.L3294:
+	b	.L3283
+.L3287:
 	strh	wzr, [x21, 30]
 	bl	ftl_flush
 	bl	pm_flush
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L3290
-.L3229:
+	b	.L3283
+.L3222:
 	adrp	x20, .LANCHOR62
 	adrp	x23, .LANCHOR80
 	add	x22, x20, :lo12:.LANCHOR62
 	add	x23, x23, :lo12:.LANCHOR80
-.L3365:
+.L3358:
 	bl	gc_scan_src_blk_one_page
 	ldrh	w1, [x22, 2]
 	ldrh	w0, [x23]
 	cmp	w1, w0
-	bcs	.L3296
+	bcs	.L3289
 	cmp	w21, 7
-	bls	.L3365
-	b	.L3330
-.L3296:
+	bls	.L3358
+	b	.L3323
+.L3289:
 	ldrh	w3, [x22, 24]
 	adrp	x0, .LANCHOR14
-	cbz	w3, .L3297
+	cbz	w3, .L3290
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	mov	w1, 4
 	strh	wzr, [x22, 26]
 	strb	w1, [x19, #:lo12:.LANCHOR145]
 	adrp	x19, .LANCHOR9
-	tbz	x0, 8, .L3298
+	tbz	x0, 8, .L3291
 	ldrh	w1, [x22]
 	ldr	x2, [x19, #:lo12:.LANCHOR9]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC216
-	add	x0, x0, :lo12:.LC216
+	adrp	x0, .LC219
+	add	x0, x0, :lo12:.LC219
 	bl	printf
-.L3298:
+.L3291:
 	ldrh	w2, [x20, #:lo12:.LANCHOR62]
 	add	x0, x20, :lo12:.LANCHOR62
 	ldr	x1, [x19, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, 24]
 	ldrh	w1, [x1, x2, lsl 1]
 	cmp	w1, w0
-	beq	.L3299
-	adrp	x1, .LANCHOR215
+	beq	.L3292
+	adrp	x1, .LANCHOR216
 	adrp	x0, .LC0
-	mov	w2, 2279
-	add	x1, x1, :lo12:.LANCHOR215
+	mov	w2, 2273
+	add	x1, x1, :lo12:.LANCHOR216
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3299:
+.L3292:
 	add	x0, x20, :lo12:.LANCHOR62
 	ldrh	w1, [x20, #:lo12:.LANCHOR62]
 	ldrh	w2, [x0, 24]
 	ldr	x0, [x19, #:lo12:.LANCHOR9]
 	strh	w2, [x0, x1, lsl 1]
-	b	.L3330
-.L3297:
+	b	.L3323
+.L3290:
 	adrp	x2, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	ldrh	w1, [x22]
@@ -20754,27 +20814,27 @@ zftl_do_gc:
 	mov	w2, 1
 	strb	w2, [x19, #:lo12:.LANCHOR145]
 	add	x21, x21, x1, uxth 2
-	tbz	x0, 8, .L3300
+	tbz	x0, 8, .L3293
 	ldrb	w2, [x21, 2]
-	adrp	x0, .LC217
-	add	x0, x0, :lo12:.LC217
+	adrp	x0, .LC220
+	add	x0, x0, :lo12:.LC220
 	ubfx	x2, x2, 5, 3
 	bl	printf
-.L3300:
+.L3293:
 	ldrb	w0, [x21, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L3301
+	beq	.L3294
 	tst	w0, 192
-	bne	.L3302
-.L3301:
-	adrp	x1, .LANCHOR215
+	bne	.L3295
+.L3294:
+	adrp	x1, .LANCHOR216
 	adrp	x0, .LC0
-	mov	w2, 2289
-	add	x1, x1, :lo12:.LANCHOR215
+	mov	w2, 2283
+	add	x1, x1, :lo12:.LANCHOR216
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3302:
+.L3295:
 	ldrh	w0, [x20, #:lo12:.LANCHOR62]
 	add	x19, x20, :lo12:.LANCHOR62
 	bl	ftl_free_sblk
@@ -20784,56 +20844,56 @@ zftl_do_gc:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w0, 8
-	bhi	.L3303
+	bhi	.L3296
 	strh	w0, [x19, 30]
-	b	.L3330
-.L3303:
+	b	.L3323
+.L3296:
 	strh	wzr, [x19, 30]
-.L3394:
+.L3387:
 	bl	flt_sys_flush
-	b	.L3330
-.L3230:
+	b	.L3323
+.L3223:
 	ldrh	w1, [x24, 80]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L3304
+	bne	.L3297
 	adrp	x0, .LANCHOR71
 	ldrb	w22, [x0, #:lo12:.LANCHOR71]
 	cmp	w22, 1
-	bne	.L3304
+	bne	.L3297
 	bl	ftl_flush
 	adrp	x0, .LANCHOR62
 	add	x1, x0, :lo12:.LANCHOR62
 	mov	x20, x0
 	ldrh	w1, [x1, 318]
-	cbz	w1, .L3305
+	cbz	w1, .L3298
 	mov	w0, w22
 	mov	w1, 5
-.L3391:
+.L3384:
 	bl	zftl_gc_get_free_sblk
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L3307
+	beq	.L3300
 	adrp	x0, .LANCHOR7
 	ldr	x21, [x0, #:lo12:.LANCHOR7]
 	add	x21, x21, x19, uxth 2
 	ldrb	w0, [x21, 2]
 	tst	w0, 224
-	beq	.L3308
-	adrp	x1, .LANCHOR215
+	beq	.L3301
+	adrp	x1, .LANCHOR216
 	adrp	x0, .LC0
-	mov	w2, 2318
-	add	x1, x1, :lo12:.LANCHOR215
+	mov	w2, 2312
+	add	x1, x1, :lo12:.LANCHOR216
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3308:
+.L3301:
 	ldrb	w0, [x21, 2]
 	mov	w1, 5
 	bfi	w0, w1, 5, 3
 	orr	w0, w0, 16
 	strb	w0, [x21, 2]
-.L3329:
+.L3322:
 	mov	w1, 1
 	mov	w0, w19
 	bl	ftl_erase_sblk
@@ -20896,12 +20956,12 @@ zftl_do_gc:
 	strh	wzr, [x0, 320]
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L3330
-.L3305:
+	b	.L3323
+.L3298:
 	mov	w1, 5
 	mov	w0, 0
-	b	.L3391
-.L3304:
+	b	.L3384
+.L3297:
 	cmp	w26, 1
 	mov	w22, 4
 	csinc	w22, w22, wzr, eq
@@ -20914,24 +20974,24 @@ zftl_do_gc:
 	add	x25, x25, :lo12:.LANCHOR71
 	add	x20, x21, :lo12:.LANCHOR62
 	add	x26, x24, 80
-.L3311:
+.L3304:
 	sub	w22, w22, #1
 	and	w22, w22, 255
 	cmp	w22, 255
-	beq	.L3330
+	beq	.L3323
 	bl	gc_do_copy_back
 	ldrb	w0, [x25]
-	cbnz	w0, .L3312
+	cbnz	w0, .L3305
 	adrp	x0, .LANCHOR51
 	ldrb	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, 3
-	bhi	.L3313
+	bhi	.L3306
 	bl	ftl_write_commit
-.L3313:
+.L3306:
 	ldrh	w1, [x20, 26]
 	ldrh	w0, [x20, 24]
 	cmp	w1, w0
-	bcc	.L3311
+	bcc	.L3304
 	mov	w0, 1
 	strb	w0, [x19, #:lo12:.LANCHOR145]
 	bl	ftl_write_commit
@@ -20941,37 +21001,37 @@ zftl_do_gc:
 	mov	x19, x0
 	ldr	x1, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x1, x2, lsl 1]
-	cbz	w1, .L3315
-	adrp	x1, .LANCHOR215
+	cbz	w1, .L3308
+	adrp	x1, .LANCHOR216
 	adrp	x0, .LC0
-	mov	w2, 2393
-	add	x1, x1, :lo12:.LANCHOR215
+	mov	w2, 2387
+	add	x1, x1, :lo12:.LANCHOR216
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3315:
+.L3308:
 	ldrh	w0, [x21, #:lo12:.LANCHOR62]
 	ldr	x2, [x19, #:lo12:.LANCHOR9]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L3316
+	cbnz	w1, .L3309
 	bl	ftl_free_sblk
-	b	.L3290
-.L3316:
+	b	.L3283
+.L3309:
 	mov	w2, 1
 	mov	w1, 0
 	bl	gc_add_sblk
-	b	.L3290
-.L3312:
+	b	.L3283
+.L3305:
 	ldrh	w0, [x20, 320]
-	cbz	w0, .L3317
+	cbz	w0, .L3310
 	strh	wzr, [x20, 320]
 	bl	sblk_wait_write_queue_completed
 	bl	gc_write_completed
 	ldr	w0, [x20, 324]
 	cmn	w0, #1
-	beq	.L3318
+	beq	.L3311
 	bl	ftl_mask_bad_block
-.L3318:
+.L3311:
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	add	x20, x21, :lo12:.LANCHOR62
 	strh	wzr, [x20, 56]
@@ -20986,28 +21046,28 @@ zftl_do_gc:
 	strh	w0, [x2, 126]
 	strh	w0, [x1, 130]
 	ldr	x0, [x20, 8]
-	cbz	x0, .L3319
+	cbz	x0, .L3312
 	bl	buf_free
-.L3319:
+.L3312:
 	add	x21, x21, :lo12:.LANCHOR62
 	str	xzr, [x21, 8]
 	bl	flt_sys_flush
-	mov	w2, 2431
+	mov	w2, 2425
 	strb	wzr, [x19, #:lo12:.LANCHOR145]
-	adrp	x1, .LANCHOR215
+	adrp	x1, .LANCHOR216
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR215
+	add	x1, x1, :lo12:.LANCHOR216
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3330
-.L3317:
+	b	.L3323
+.L3310:
 	ldrh	w0, [x26, 6]
 	ldrh	w1, [x20, 26]
 	cmp	w0, 1
 	ldrh	w0, [x20, 24]
-	bls	.L3320
+	bls	.L3313
 	cmp	w1, w0
-	bcc	.L3311
+	bcc	.L3304
 	mov	w0, 1
 	strb	w0, [x19, #:lo12:.LANCHOR145]
 	ldrh	w0, [x20, 56]
@@ -21018,12 +21078,12 @@ zftl_do_gc:
 	strh	w1, [x0, 58]
 	mov	w0, -1
 	strh	w0, [x20]
-	b	.L3330
-.L3320:
+	b	.L3323
+.L3313:
 	mov	w2, 5
 	strb	w2, [x19, #:lo12:.LANCHOR145]
 	cmp	w1, w0
-	bcc	.L3321
+	bcc	.L3314
 	ldrh	w0, [x20, 56]
 	add	w1, w0, 1
 	strh	w1, [x20, 56]
@@ -21032,7 +21092,7 @@ zftl_do_gc:
 	strh	w1, [x0, 58]
 	mov	w0, -1
 	strh	w0, [x20]
-.L3321:
+.L3314:
 	bl	ftl_flush
 	bl	sblk_wait_write_queue_completed
 	bl	gc_write_completed
@@ -21050,40 +21110,40 @@ zftl_do_gc:
 	strh	w1, [x0, 18]
 	cmp	w2, 2
 	strh	w2, [x0, 20]
-	bne	.L3323
+	bne	.L3316
 	ubfiz	w1, w1, 1, 15
 	strh	w1, [x0, 18]
 	adrp	x1, .LANCHOR104
 	ldrb	w1, [x1, #:lo12:.LANCHOR104]
-	cbnz	w1, .L3323
+	cbnz	w1, .L3316
 	mov	w1, 1
 	strh	w1, [x0, 20]
-.L3323:
+.L3316:
 	add	x21, x21, :lo12:.LANCHOR62
 	strh	wzr, [x21, 22]
-	b	.L3330
-.L3326:
+	b	.L3323
+.L3319:
 	ldrh	w1, [x24, 16]
 	ldrh	w0, [x24, 18]
 	cmp	w1, w0
-	bcc	.L3327
+	bcc	.L3320
 	mov	w0, 6
 	strb	w0, [x19, #:lo12:.LANCHOR145]
 	ldr	x0, [x24, 8]
 	bl	buf_free
 	str	xzr, [x24, 8]
-	b	.L3330
-.L3327:
+	b	.L3323
+.L3320:
 	cmp	w21, 15
-	bls	.L3233
+	bls	.L3226
 	cmp	w26, 1
-	bne	.L3330
+	bne	.L3323
 	add	w22, w22, 1
 	and	w22, w22, 255
 	cmp	w22, 4
-	bls	.L3233
-	b	.L3330
-.L3232:
+	bls	.L3226
+	b	.L3323
+.L3225:
 	bl	gc_update_l2p_map_new
 	mov	w20, -1
 	bl	gc_free_src_blk
@@ -21096,17 +21156,17 @@ zftl_do_gc:
 	strh	w20, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L3395:
+.L3388:
 	strb	wzr, [x19, #:lo12:.LANCHOR145]
-	b	.L3330
-.L3307:
-	mov	w2, 2324
-	adrp	x1, .LANCHOR215
+	b	.L3323
+.L3300:
+	mov	w2, 2318
+	adrp	x1, .LANCHOR216
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR215
+	add	x1, x1, :lo12:.LANCHOR216
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3329
+	b	.L3322
 	.size	zftl_do_gc, .-zftl_do_gc
 	.section	.text.zftl_write,"ax",@progbits
 	.align	2
@@ -21126,22 +21186,22 @@ zftl_write:
 	stp	x21, x22, [sp, 32]
 	mov	x24, x3
 	stp	x25, x26, [sp, 64]
-	tbz	x0, 12, .L3398
+	tbz	x0, 12, .L3391
 	mov	w3, w2
-	adrp	x0, .LC218
+	adrp	x0, .LC221
 	mov	w2, w1
-	add	x0, x0, :lo12:.LC218
+	add	x0, x0, :lo12:.LC221
 	mov	w1, w27
 	bl	printf
-.L3398:
-	cbnz	w27, .L3399
+.L3391:
+	cbnz	w27, .L3392
 	adrp	x0, .LANCHOR58
 	mov	w27, 24576
 	ldr	w0, [x0, #:lo12:.LANCHOR58]
-.L3400:
+.L3393:
 	add	w1, w19, w20
 	cmp	w0, w1
-	bcc	.L3414
+	bcc	.L3407
 	adrp	x23, .LANCHOR121
 	add	w27, w27, w19
 	sub	w19, w20, #1
@@ -21156,8 +21216,8 @@ zftl_write:
 	mov	w26, w22
 	sub	w21, w19, w22
 	add	w21, w21, 1
-.L3402:
-	cbnz	w21, .L3410
+.L3395:
+	cbnz	w21, .L3403
 	adrp	x20, .LANCHOR90
 	adrp	x19, .LANCHOR94
 	add	x20, x20, :lo12:.LANCHOR90
@@ -21167,14 +21227,14 @@ zftl_write:
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
-.L3411:
+.L3404:
 	ldrh	w0, [x20]
 	ldrh	w1, [x19]
 	add	w0, w0, w1
 	cmp	w0, 7
-	ble	.L3412
+	ble	.L3405
 	mov	w0, 0
-.L3397:
+.L3390:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -21182,28 +21242,28 @@ zftl_write:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L3399:
+.L3392:
 	cmp	w27, 3
-	bhi	.L3414
+	bhi	.L3407
 	lsl	w27, w27, 13
 	mov	w0, 8192
-	b	.L3400
-.L3410:
+	b	.L3393
+.L3403:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbnz	x0, .L3403
+	cbnz	x0, .L3396
 	bl	ftl_write_commit
-	b	.L3402
-.L3403:
+	b	.L3395
+.L3396:
 	ldrb	w3, [x23]
 	cmp	w26, w22
 	strb	wzr, [x0, 57]
 	ccmp	w26, w19, 4, ne
 	strb	w3, [x0, 56]
-	bne	.L3406
+	bne	.L3399
 	cmp	w26, w22
-	bne	.L3407
+	bne	.L3400
 	udiv	w0, w27, w3
 	msub	w0, w0, w3, w27
 	and	w0, w0, 255
@@ -21212,9 +21272,9 @@ zftl_write:
 	and	w3, w3, 255
 	cmp	w20, w3
 	csel	w3, w20, w3, cc
-.L3419:
+.L3412:
 	strb	w3, [x28, 56]
-.L3406:
+.L3399:
 	ldr	x3, [x28, 8]
 	mov	x1, x24
 	ldrb	w0, [x28, 57]
@@ -21236,31 +21296,31 @@ zftl_write:
 	ldrb	w0, [x28, 56]
 	ubfiz	x0, x0, 9, 8
 	add	x24, x24, x0
-	b	.L3402
-.L3407:
+	b	.L3395
+.L3400:
 	ldr	w0, [x29, 108]
 	msub	w3, w3, w26, w0
-	b	.L3419
-.L3412:
+	b	.L3412
+.L3405:
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
-	b	.L3411
-.L3414:
+	b	.L3404
+.L3407:
 	mov	w0, -1
-	b	.L3397
+	b	.L3390
 	.size	zftl_write, .-zftl_write
-	.section	.text.zftl_vendor_write,"ax",@progbits
+	.section	.text.ftl_vendor_write,"ax",@progbits
 	.align	2
-	.global	zftl_vendor_write
-	.type	zftl_vendor_write, %function
-zftl_vendor_write:
+	.global	ftl_vendor_write
+	.type	ftl_vendor_write, %function
+ftl_vendor_write:
 	mov	x3, x2
 	mov	w2, w1
 	add	w1, w0, 512
 	mov	w0, 2
 	b	zftl_write
-	.size	zftl_vendor_write, .-zftl_vendor_write
+	.size	ftl_vendor_write, .-ftl_vendor_write
 	.section	.text.zftl_sys_write,"ax",@progbits
 	.align	2
 	.global	zftl_sys_write
@@ -21307,12 +21367,12 @@ ftl_write:
 	mov	x20, x3
 	mov	w22, w1
 	ands	w21, w0, 255
-	bne	.L3425
+	bne	.L3418
 	mov	w3, w2
 	mov	w0, 0
 	mov	x2, x20
 	bl	idb_write_data
-.L3425:
+.L3418:
 	mov	x3, x20
 	mov	w2, w19
 	mov	w1, w22
@@ -21339,23 +21399,23 @@ zftl_discard:
 	cmp	w2, w1
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	bcc	.L3448
-	adrp	x24, .LANCHOR216
+	bcc	.L3441
+	adrp	x24, .LANCHOR217
 	add	w22, w0, 24576
 	adrp	x0, .LANCHOR14
 	str	x0, [x29, 104]
-	ldr	w1, [x24, #:lo12:.LANCHOR216]
+	ldr	w1, [x24, #:lo12:.LANCHOR217]
 	ldr	w2, [x0, #:lo12:.LANCHOR14]
 	add	w1, w19, w1
-	str	w1, [x24, #:lo12:.LANCHOR216]
-	tbz	x2, 12, .L3429
-	adrp	x0, .LC219
+	str	w1, [x24, #:lo12:.LANCHOR217]
+	tbz	x2, 12, .L3422
+	adrp	x0, .LC222
 	mov	w4, 0
 	mov	w3, w19
 	mov	w2, w22
-	add	x0, x0, :lo12:.LC219
+	add	x0, x0, :lo12:.LC222
 	bl	printf
-.L3429:
+.L3422:
 	adrp	x23, .LANCHOR97
 	adrp	x26, .LANCHOR121
 	ldr	x0, [x23, #:lo12:.LANCHOR97]
@@ -21367,7 +21427,7 @@ zftl_discard:
 	ldrb	w21, [x26, #:lo12:.LANCHOR121]
 	udiv	w20, w22, w21
 	msub	w25, w20, w21, w22
-	cbz	w25, .L3430
+	cbz	w25, .L3423
 	sub	w21, w21, w25
 	mov	w0, w20
 	cmp	w21, w19
@@ -21375,20 +21435,20 @@ zftl_discard:
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	bne	.L3431
+	bne	.L3424
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
-.L3431:
+.L3424:
 	ldr	w0, [x29, 120]
 	and	w28, w21, 65535
 	cmn	w0, #1
-	beq	.L3433
+	beq	.L3426
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x3, x0
-	cbz	x0, .L3433
+	cbz	x0, .L3426
 	strb	w25, [x0, 57]
 	ubfiz	x25, x25, 9, 25
 	strb	w21, [x0, 56]
@@ -21407,53 +21467,53 @@ zftl_discard:
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3433:
+.L3426:
 	add	w20, w20, 1
 	sub	w19, w19, w28
-.L3430:
-	cbz	w19, .L3435
+.L3423:
+	cbz	w19, .L3428
 	bl	ftl_flush
-.L3435:
+.L3428:
 	adrp	x25, .LANCHOR99
 	add	x21, x26, :lo12:.LANCHOR121
 	add	x25, x25, :lo12:.LANCHOR99
 	mov	w0, -1
 	str	w0, [x29, 124]
-.L3436:
+.L3429:
 	ldrb	w0, [x21]
 	cmp	w19, w0
-	bcs	.L3441
-	cbz	w19, .L3443
+	bcs	.L3434
+	cbz	w19, .L3436
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	bne	.L3444
+	bne	.L3437
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
-.L3444:
+.L3437:
 	ldr	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3443
+	beq	.L3436
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x21, x0
-	cbz	x0, .L3443
+	cbz	x0, .L3436
 	strb	wzr, [x0, 57]
 	strb	w19, [x0, 56]
 	stp	w27, w20, [x21, 32]
 	ldrb	w0, [x26, #:lo12:.LANCHOR121]
 	cmp	w19, w0
-	bcc	.L3446
-	adrp	x1, .LANCHOR217
+	bcc	.L3439
+	adrp	x1, .LANCHOR218
 	adrp	x0, .LC0
 	mov	w2, 1236
-	add	x1, x1, :lo12:.LANCHOR217
+	add	x1, x1, :lo12:.LANCHOR218
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3446:
+.L3439:
 	ldr	x0, [x21, 8]
 	lsl	w2, w19, 9
 	mov	w1, 0
@@ -21465,38 +21525,38 @@ zftl_discard:
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3443:
-	ldr	w1, [x24, #:lo12:.LANCHOR216]
+.L3436:
+	ldr	w1, [x24, #:lo12:.LANCHOR217]
 	cmp	w1, 8192
-	bls	.L3449
+	bls	.L3442
 	ldr	x0, [x29, 104]
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3447
-	adrp	x0, .LC219
+	tbz	x0, 12, .L3440
+	adrp	x0, .LC222
 	mov	w4, 0
 	mov	w3, w19
 	mov	w2, w22
-	add	x0, x0, :lo12:.LC219
+	add	x0, x0, :lo12:.LC222
 	bl	printf
-.L3447:
-	str	wzr, [x24, #:lo12:.LANCHOR216]
+.L3440:
+	str	wzr, [x24, #:lo12:.LANCHOR217]
 	bl	flt_sys_flush
 	adrp	x0, .LANCHOR116
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR116]
-.L3449:
+.L3442:
 	mov	w0, 0
-	b	.L3427
-.L3441:
+	b	.L3420
+.L3434:
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3437
+	beq	.L3430
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbz	x0, .L3439
+	cbz	x0, .L3432
 	ldrb	w2, [x21]
 	mov	w1, 0
 	strb	w2, [x0, 56]
@@ -21508,24 +21568,24 @@ zftl_discard:
 	mov	x0, x28
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-.L3475:
+.L3468:
 	ldr	x1, [x23, #:lo12:.LANCHOR97]
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3439:
+.L3432:
 	ldrb	w0, [x21]
 	add	w20, w20, 1
 	sub	w19, w19, w0
-	b	.L3436
-.L3437:
+	b	.L3429
+.L3430:
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
 	ldr	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3439
+	beq	.L3432
 	add	x1, x29, 124
 	mov	w2, 1
 	mov	w0, w20
@@ -21543,10 +21603,10 @@ zftl_discard:
 	ldrb	w1, [x1, #:lo12:.LANCHOR98]
 	udiv	w0, w0, w1
 	bl	ftl_vpn_decrement
-	b	.L3475
-.L3448:
+	b	.L3468
+.L3441:
 	mov	w0, -1
-.L3427:
+.L3420:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -21748,7 +21808,7 @@ _c_ftl_block_align_addr:
 	.zero	2
 	.section	.bss._c_ftl_byte_pre_page,"aw",@nobits
 	.align	1
-	.set	.LANCHOR198,. + 0
+	.set	.LANCHOR199,. + 0
 	.type	_c_ftl_byte_pre_page, %object
 	.size	_c_ftl_byte_pre_page, 2
 _c_ftl_byte_pre_page:
@@ -21799,7 +21859,7 @@ _c_ftl_planes_per_die:
 	.zero	1
 	.section	.bss._c_ftl_pm_page_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR185,. + 0
+	.set	.LANCHOR186,. + 0
 	.type	_c_ftl_pm_page_num, %object
 	.size	_c_ftl_pm_page_num, 2
 _c_ftl_pm_page_num:
@@ -21854,7 +21914,7 @@ _c_swl_xlc_gc_th:
 	.zero	2
 	.section	.bss._c_totle_data_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR203,. + 0
+	.set	.LANCHOR204,. + 0
 	.type	_c_totle_data_density, %object
 	.size	_c_totle_data_density, 4
 _c_totle_data_density:
@@ -21868,7 +21928,7 @@ _c_totle_log_page:
 	.zero	4
 	.section	.bss._c_totle_phy_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR202,. + 0
+	.set	.LANCHOR203,. + 0
 	.type	_c_totle_phy_density, %object
 	.size	_c_totle_phy_density, 4
 _c_totle_phy_density:
@@ -21922,7 +21982,7 @@ _min_slc_super_block:
 	.zero	2
 	.section	.bss.discard_sector_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR216,. + 0
+	.set	.LANCHOR217,. + 0
 	.type	discard_sector_count, %object
 	.size	discard_sector_count, 4
 discard_sector_count:
@@ -21934,9 +21994,16 @@ discard_sector_count:
 	.size	fill_spare_size, 2
 fill_spare_size:
 	.zero	2
+	.section	.bss.flash_ddr_tuning_sdr_read_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR155,. + 0
+	.type	flash_ddr_tuning_sdr_read_count, %object
+	.size	flash_ddr_tuning_sdr_read_count, 4
+flash_ddr_tuning_sdr_read_count:
+	.zero	4
 	.section	.bss.flash_read_retry,"aw",@nobits
 	.align	3
-	.set	.LANCHOR156,. + 0
+	.set	.LANCHOR157,. + 0
 	.type	flash_read_retry, %object
 	.size	flash_read_retry, 8
 flash_read_retry:
@@ -21975,14 +22042,14 @@ free_xlc_sblk:
 ftl_ext_info_data_buffer:
 	.zero	16384
 	.section	.bss.ftl_ext_info_first_write,"aw",@nobits
-	.set	.LANCHOR181,. + 0
+	.set	.LANCHOR182,. + 0
 	.type	ftl_ext_info_first_write, %object
 	.size	ftl_ext_info_first_write, 1
 ftl_ext_info_first_write:
 	.zero	1
 	.section	.bss.ftl_flush_jiffies,"aw",@nobits
 	.align	2
-	.set	.LANCHOR212,. + 0
+	.set	.LANCHOR213,. + 0
 	.type	ftl_flush_jiffies, %object
 	.size	ftl_flush_jiffies, 4
 ftl_flush_jiffies:
@@ -21995,7 +22062,7 @@ ftl_info_data_buffer:
 	.zero	16384
 	.section	.bss.ftl_info_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR176,. + 0
+	.set	.LANCHOR177,. + 0
 	.type	ftl_info_spare, %object
 	.size	ftl_info_spare, 256
 ftl_info_spare:
@@ -22008,7 +22075,7 @@ ftl_info_spare:
 ftl_low_format_cur_blk:
 	.zero	2
 	.section	.bss.ftl_power_lost_flag,"aw",@nobits
-	.set	.LANCHOR180,. + 0
+	.set	.LANCHOR181,. + 0
 	.type	ftl_power_lost_flag, %object
 	.size	ftl_power_lost_flag, 1
 ftl_power_lost_flag:
@@ -22049,7 +22116,7 @@ ftl_sblk_vpn:
 ftl_sblk_vpn_update_id:
 	.zero	2
 	.section	.bss.ftl_sys_info_first_write,"aw",@nobits
-	.set	.LANCHOR179,. + 0
+	.set	.LANCHOR180,. + 0
 	.type	ftl_sys_info_first_write, %object
 	.size	ftl_sys_info_first_write, 1
 ftl_sys_info_first_write:
@@ -22062,7 +22129,7 @@ ftl_tmp_buffer:
 	.zero	16384
 	.section	.bss.ftl_tmp_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR174,. + 0
+	.set	.LANCHOR175,. + 0
 	.type	ftl_tmp_spare, %object
 	.size	ftl_tmp_spare, 256
 ftl_tmp_spare:
@@ -22116,7 +22183,7 @@ g_flash_3d_tlc_flag:
 	.zero	1
 	.section	.bss.g_flash_blk_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR159,. + 0
+	.set	.LANCHOR160,. + 0
 	.type	g_flash_blk_info, %object
 	.size	g_flash_blk_info, 4
 g_flash_blk_info:
@@ -22141,20 +22208,20 @@ g_flash_interface_mode:
 g_flash_multi_page_prog_en:
 	.zero	1
 	.section	.bss.g_flash_multi_page_read_en,"aw",@nobits
-	.set	.LANCHOR165,. + 0
+	.set	.LANCHOR166,. + 0
 	.type	g_flash_multi_page_read_en, %object
 	.size	g_flash_multi_page_read_en, 1
 g_flash_multi_page_read_en:
 	.zero	1
 	.section	.bss.g_flash_page_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR161,. + 0
+	.set	.LANCHOR162,. + 0
 	.type	g_flash_page_buffer, %object
 	.size	g_flash_page_buffer, 8
 g_flash_page_buffer:
 	.zero	8
 	.section	.bss.g_flash_reversd_blks,"aw",@nobits
-	.set	.LANCHOR195,. + 0
+	.set	.LANCHOR196,. + 0
 	.type	g_flash_reversd_blks, %object
 	.size	g_flash_reversd_blks, 1
 g_flash_reversd_blks:
@@ -22167,14 +22234,14 @@ g_flash_slc_mode:
 	.zero	1
 	.section	.bss.g_flash_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR160,. + 0
+	.set	.LANCHOR161,. + 0
 	.type	g_flash_spare_buffer, %object
 	.size	g_flash_spare_buffer, 8
 g_flash_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_sys_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR158,. + 0
+	.set	.LANCHOR159,. + 0
 	.type	g_flash_sys_spare_buffer, %object
 	.size	g_flash_sys_spare_buffer, 8
 g_flash_sys_spare_buffer:
@@ -22201,7 +22268,7 @@ g_flash_toggle_mode_en:
 	.zero	1
 	.section	.bss.g_ftl_info_blk,"aw",@nobits
 	.align	6
-	.set	.LANCHOR177,. + 0
+	.set	.LANCHOR178,. + 0
 	.type	g_ftl_info_blk, %object
 	.size	g_ftl_info_blk, 4
 g_ftl_info_blk:
@@ -22220,7 +22287,7 @@ g_gc_info:
 g_idb_ecc_bits:
 	.zero	1
 	.section	.bss.g_idb_slc_mode_enable,"aw",@nobits
-	.set	.LANCHOR167,. + 0
+	.set	.LANCHOR168,. + 0
 	.type	g_idb_slc_mode_enable, %object
 	.size	g_idb_slc_mode_enable, 1
 g_idb_slc_mode_enable:
@@ -22291,7 +22358,7 @@ g_nandc_ver:
 	.zero	1
 	.section	.bss.g_pm_spare,"aw",@nobits
 	.align	3
-	.set	.LANCHOR189,. + 0
+	.set	.LANCHOR190,. + 0
 	.type	g_pm_spare, %object
 	.size	g_pm_spare, 8
 g_pm_spare:
@@ -22549,7 +22616,7 @@ idb_buf:
 	.zero	262144
 	.section	.bss.idb_need_write_back,"aw",@nobits
 	.align	2
-	.set	.LANCHOR168,. + 0
+	.set	.LANCHOR169,. + 0
 	.type	idb_need_write_back, %object
 	.size	idb_need_write_back, 4
 idb_need_write_back:
@@ -22599,7 +22666,7 @@ p_free_buf_head:
 p_read_ahead_ext_buf:
 	.zero	8
 	.section	.bss.pm_first_write,"aw",@nobits
-	.set	.LANCHOR190,. + 0
+	.set	.LANCHOR191,. + 0
 	.type	pm_first_write, %object
 	.size	pm_first_write, 1
 pm_first_write:
@@ -22612,7 +22679,7 @@ pm_first_write:
 pm_gc_enable:
 	.zero	4
 	.section	.bss.pm_last_load_ram_id,"aw",@nobits
-	.set	.LANCHOR200,. + 0
+	.set	.LANCHOR201,. + 0
 	.type	pm_last_load_ram_id, %object
 	.size	pm_last_load_ram_id, 1
 pm_last_load_ram_id:
@@ -22632,7 +22699,7 @@ pm_ram_info:
 	.zero	512
 	.section	.bss.read_ahead_lpa,"aw",@nobits
 	.align	2
-	.set	.LANCHOR201,. + 0
+	.set	.LANCHOR202,. + 0
 	.type	read_ahead_lpa, %object
 	.size	read_ahead_lpa, 4
 read_ahead_lpa:
@@ -22706,7 +22773,7 @@ write_buf_head:
 write_commit_count:
 	.zero	1
 	.section	.bss.write_commit_head,"aw",@nobits
-	.set	.LANCHOR172,. + 0
+	.set	.LANCHOR173,. + 0
 	.type	write_commit_head, %object
 	.size	write_commit_head, 1
 write_commit_head:
@@ -22795,7 +22862,7 @@ hy_f26_ref_value:
 	.byte	-37
 	.section	.data.nand_opt_para,"aw",@progbits
 	.align	3
-	.set	.LANCHOR194,. + 0
+	.set	.LANCHOR195,. + 0
 	.type	nand_opt_para, %object
 	.size	nand_opt_para, 128
 nand_opt_para:
@@ -23243,7 +23310,7 @@ sd15_tlc_rr:
 	.byte	0
 	.section	.data.tlc_prog_order,"aw",@progbits
 	.align	3
-	.set	.LANCHOR214,. + 0
+	.set	.LANCHOR215,. + 0
 	.type	tlc_prog_order, %object
 	.size	tlc_prog_order, 768
 tlc_prog_order:
@@ -23640,9 +23707,9 @@ zftl_debug:
 	.word	17476
 	.section	.data.zftl_nand_flash_para_tbl,"aw",@progbits
 	.align	3
-	.set	.LANCHOR193,. + 0
+	.set	.LANCHOR194,. + 0
 	.type	zftl_nand_flash_para_tbl, %object
-	.size	zftl_nand_flash_para_tbl, 1024
+	.size	zftl_nand_flash_para_tbl, 1152
 zftl_nand_flash_para_tbl:
 	.byte	6
 	.byte	-104
@@ -24116,7 +24183,7 @@ zftl_nand_flash_para_tbl:
 	.byte	4
 	.byte	0
 	.hword	512
-	.byte	2
+	.byte	1
 	.byte	-38
 	.byte	-33
 	.byte	0
@@ -24318,6 +24385,34 @@ zftl_nand_flash_para_tbl:
 	.byte	0
 	.byte	5
 	.byte	44
+	.byte	100
+	.byte	100
+	.byte	60
+	.byte	-91
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	32
+	.hword	512
+	.byte	2
+	.byte	1
+	.hword	1044
+	.hword	471
+	.byte	3
+	.byte	17
+	.byte	40
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.hword	512
+	.byte	3
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	5
+	.byte	44
 	.byte	-124
 	.byte	68
 	.byte	50
@@ -24344,6 +24439,62 @@ zftl_nand_flash_para_tbl:
 	.byte	-38
 	.byte	-33
 	.byte	0
+	.byte	5
+	.byte	44
+	.byte	-124
+	.byte	-60
+	.byte	52
+	.byte	-86
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	32
+	.hword	512
+	.byte	2
+	.byte	1
+	.hword	2184
+	.hword	9671
+	.byte	5
+	.byte	19
+	.byte	60
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	4
+	.byte	0
+	.hword	512
+	.byte	2
+	.byte	-38
+	.byte	-33
+	.byte	0
+	.byte	5
+	.byte	44
+	.byte	-124
+	.byte	68
+	.byte	52
+	.byte	-86
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	32
+	.hword	512
+	.byte	2
+	.byte	1
+	.hword	2184
+	.hword	9671
+	.byte	5
+	.byte	19
+	.byte	70
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	4
+	.byte	0
+	.hword	512
+	.byte	2
+	.byte	-38
+	.byte	-33
+	.byte	0
 	.byte	6
 	.byte	-83
 	.byte	-34
@@ -24484,6 +24635,34 @@ zftl_nand_flash_para_tbl:
 	.byte	-65
 	.byte	-66
 	.byte	0
+	.byte	6
+	.byte	-83
+	.byte	-41
+	.byte	20
+	.byte	-98
+	.byte	52
+	.byte	74
+	.byte	2
+	.byte	1
+	.byte	16
+	.hword	256
+	.byte	2
+	.byte	2
+	.hword	1056
+	.hword	473
+	.byte	2
+	.byte	5
+	.byte	40
+	.byte	32
+	.byte	4
+	.byte	1
+	.byte	3
+	.byte	0
+	.hword	256
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
 	.byte	5
 	.byte	-119
 	.byte	100
@@ -24498,7 +24677,7 @@ zftl_nand_flash_para_tbl:
 	.byte	2
 	.byte	1
 	.hword	1024
-	.hword	1479
+	.hword	455
 	.byte	3
 	.byte	17
 	.byte	40
@@ -24526,7 +24705,7 @@ zftl_nand_flash_para_tbl:
 	.byte	2
 	.byte	2
 	.hword	1024
-	.hword	1479
+	.hword	455
 	.byte	3
 	.byte	17
 	.byte	40
@@ -24556,7 +24735,7 @@ __func__.10085:
 	.string	"_list_update_data_list"
 	.section	.rodata.__func__.10193,"a",@progbits
 	.align	3
-	.set	.LANCHOR178,. + 0
+	.set	.LANCHOR179,. + 0
 	.type	__func__.10193, %object
 	.size	__func__.10193, 15
 __func__.10193:
@@ -24584,21 +24763,21 @@ __func__.10276:
 	.string	"ftl_free_sys_blk"
 	.section	.rodata.__func__.10311,"a",@progbits
 	.align	3
-	.set	.LANCHOR207,. + 0
+	.set	.LANCHOR208,. + 0
 	.type	__func__.10311, %object
 	.size	__func__.10311, 14
 __func__.10311:
 	.string	"ftl_sblk_dump"
 	.section	.rodata.__func__.10335,"a",@progbits
 	.align	3
-	.set	.LANCHOR196,. + 0
+	.set	.LANCHOR197,. + 0
 	.type	__func__.10335, %object
 	.size	__func__.10335, 16
 __func__.10335:
 	.string	"ftl_sysblk_dump"
 	.section	.rodata.__func__.10354,"a",@progbits
 	.align	3
-	.set	.LANCHOR187,. + 0
+	.set	.LANCHOR188,. + 0
 	.type	__func__.10354, %object
 	.size	__func__.10354, 23
 __func__.10354:
@@ -24612,7 +24791,7 @@ __func__.10380:
 	.string	"ftl_get_ppa_from_index"
 	.section	.rodata.__func__.10401,"a",@progbits
 	.align	3
-	.set	.LANCHOR210,. + 0
+	.set	.LANCHOR211,. + 0
 	.type	__func__.10401, %object
 	.size	__func__.10401, 19
 __func__.10401:
@@ -24633,63 +24812,63 @@ __func__.10430:
 	.string	"ftl_ext_alloc_new_blk"
 	.section	.rodata.__func__.10455,"a",@progbits
 	.align	3
-	.set	.LANCHOR182,. + 0
+	.set	.LANCHOR183,. + 0
 	.type	__func__.10455, %object
 	.size	__func__.10455, 19
 __func__.10455:
 	.string	"ftl_ext_info_flush"
 	.section	.rodata.__func__.10467,"a",@progbits
 	.align	3
-	.set	.LANCHOR183,. + 0
+	.set	.LANCHOR184,. + 0
 	.type	__func__.10467, %object
 	.size	__func__.10467, 18
 __func__.10467:
 	.string	"ftl_ext_info_init"
 	.section	.rodata.__func__.10504,"a",@progbits
 	.align	3
-	.set	.LANCHOR184,. + 0
+	.set	.LANCHOR185,. + 0
 	.type	__func__.10504, %object
 	.size	__func__.10504, 25
 __func__.10504:
 	.string	"ftl_low_format_data_init"
 	.section	.rodata.__func__.10519,"a",@progbits
 	.align	3
-	.set	.LANCHOR186,. + 0
+	.set	.LANCHOR187,. + 0
 	.type	__func__.10519, %object
 	.size	__func__.10519, 15
 __func__.10519:
 	.string	"ftl_low_format"
 	.section	.rodata.__func__.10567,"a",@progbits
 	.align	3
-	.set	.LANCHOR175,. + 0
+	.set	.LANCHOR176,. + 0
 	.type	__func__.10567, %object
 	.size	__func__.10567, 14
 __func__.10567:
 	.string	"ftl_prog_page"
 	.section	.rodata.__func__.10684,"a",@progbits
 	.align	3
-	.set	.LANCHOR164,. + 0
+	.set	.LANCHOR165,. + 0
 	.type	__func__.10684, %object
 	.size	__func__.10684, 31
 __func__.10684:
 	.string	"queue_wait_first_req_completed"
 	.section	.rodata.__func__.10737,"a",@progbits
 	.align	3
-	.set	.LANCHOR171,. + 0
+	.set	.LANCHOR172,. + 0
 	.type	__func__.10737, %object
 	.size	__func__.10737, 15
 __func__.10737:
 	.string	"sblk_prog_page"
 	.section	.rodata.__func__.10764,"a",@progbits
 	.align	3
-	.set	.LANCHOR166,. + 0
+	.set	.LANCHOR167,. + 0
 	.type	__func__.10764, %object
 	.size	__func__.10764, 15
 __func__.10764:
 	.string	"sblk_read_page"
 	.section	.rodata.__func__.10803,"a",@progbits
 	.align	3
-	.set	.LANCHOR197,. + 0
+	.set	.LANCHOR198,. + 0
 	.type	__func__.10803, %object
 	.size	__func__.10803, 16
 __func__.10803:
@@ -24703,7 +24882,7 @@ __func__.10817:
 	.string	"pm_free_sblk"
 	.section	.rodata.__func__.10837,"a",@progbits
 	.align	3
-	.set	.LANCHOR199,. + 0
+	.set	.LANCHOR200,. + 0
 	.type	__func__.10837, %object
 	.size	__func__.10837, 6
 __func__.10837:
@@ -24717,7 +24896,7 @@ __func__.10853:
 	.string	"pm_alloc_new_blk"
 	.section	.rodata.__func__.10863,"a",@progbits
 	.align	3
-	.set	.LANCHOR188,. + 0
+	.set	.LANCHOR189,. + 0
 	.type	__func__.10863, %object
 	.size	__func__.10863, 14
 __func__.10863:
@@ -24731,14 +24910,14 @@ __func__.10881:
 	.string	"pm_select_ram_region"
 	.section	.rodata.__func__.8530,"a",@progbits
 	.align	3
-	.set	.LANCHOR155,. + 0
+	.set	.LANCHOR156,. + 0
 	.type	__func__.8530, %object
 	.size	__func__.8530, 19
 __func__.8530:
 	.string	"flash_read_page_en"
 	.section	.rodata.__func__.8559,"a",@progbits
 	.align	3
-	.set	.LANCHOR173,. + 0
+	.set	.LANCHOR174,. + 0
 	.type	__func__.8559, %object
 	.size	__func__.8559, 19
 __func__.8559:
@@ -24766,14 +24945,14 @@ __func__.8599:
 	.string	"flash_wait_device_ready_raw"
 	.section	.rodata.__func__.8623,"a",@progbits
 	.align	3
-	.set	.LANCHOR169,. + 0
+	.set	.LANCHOR170,. + 0
 	.type	__func__.8623, %object
 	.size	__func__.8623, 26
 __func__.8623:
 	.string	"flash_start_tlc_page_prog"
 	.section	.rodata.__func__.8641,"a",@progbits
 	.align	3
-	.set	.LANCHOR170,. + 0
+	.set	.LANCHOR171,. + 0
 	.type	__func__.8641, %object
 	.size	__func__.8641, 22
 __func__.8641:
@@ -24787,7 +24966,7 @@ __func__.8652:
 	.string	"flash_start_page_read"
 	.section	.rodata.__func__.8665,"a",@progbits
 	.align	3
-	.set	.LANCHOR162,. + 0
+	.set	.LANCHOR163,. + 0
 	.type	__func__.8665, %object
 	.size	__func__.8665, 31
 __func__.8665:
@@ -24801,7 +24980,7 @@ __func__.8677:
 	.string	"flash_start_plane_read"
 	.section	.rodata.__func__.8690,"a",@progbits
 	.align	3
-	.set	.LANCHOR163,. + 0
+	.set	.LANCHOR164,. + 0
 	.type	__func__.8690, %object
 	.size	__func__.8690, 25
 __func__.8690:
@@ -24820,163 +24999,163 @@ __func__.9001:
 	.size	__func__.9011, 22
 __func__.9011:
 	.string	"nand_flash_print_info"
-	.section	.rodata.__func__.9055,"a",@progbits
+	.section	.rodata.__func__.9056,"a",@progbits
 	.align	3
-	.set	.LANCHOR192,. + 0
-	.type	__func__.9055, %object
-	.size	__func__.9055, 16
-__func__.9055:
+	.set	.LANCHOR193,. + 0
+	.type	__func__.9056, %object
+	.size	__func__.9056, 16
+__func__.9056:
 	.string	"nand_flash_init"
-	.section	.rodata.__func__.9078,"a",@progbits
+	.section	.rodata.__func__.9079,"a",@progbits
 	.align	3
 	.set	.LANCHOR144,. + 0
-	.type	__func__.9078, %object
-	.size	__func__.9078, 11
-__func__.9078:
+	.type	__func__.9079, %object
+	.size	__func__.9079, 11
+__func__.9079:
 	.string	"nandc_init"
-	.section	.rodata.__func__.9238,"a",@progbits
+	.section	.rodata.__func__.9239,"a",@progbits
 	.align	3
 	.set	.LANCHOR52,. + 0
-	.type	__func__.9238, %object
-	.size	__func__.9238, 13
-__func__.9238:
+	.type	__func__.9239, %object
+	.size	__func__.9239, 13
+__func__.9239:
 	.string	"buf_add_tail"
-	.section	.rodata.__func__.9251,"a",@progbits
+	.section	.rodata.__func__.9252,"a",@progbits
 	.align	3
 	.set	.LANCHOR54,. + 0
-	.type	__func__.9251, %object
-	.size	__func__.9251, 10
-__func__.9251:
+	.type	__func__.9252, %object
+	.size	__func__.9252, 10
+__func__.9252:
 	.string	"buf_alloc"
-	.section	.rodata.__func__.9265,"a",@progbits
+	.section	.rodata.__func__.9266,"a",@progbits
 	.align	3
 	.set	.LANCHOR55,. + 0
-	.type	__func__.9265, %object
-	.size	__func__.9265, 16
-__func__.9265:
+	.type	__func__.9266, %object
+	.size	__func__.9266, 16
+__func__.9266:
 	.string	"buf_remove_free"
-	.section	.rodata.__func__.9277,"a",@progbits
+	.section	.rodata.__func__.9278,"a",@progbits
 	.align	3
-	.set	.LANCHOR157,. + 0
-	.type	__func__.9277, %object
-	.size	__func__.9277, 20
-__func__.9277:
+	.set	.LANCHOR158,. + 0
+	.type	__func__.9278, %object
+	.size	__func__.9278, 20
+__func__.9278:
 	.string	"flash_info_blk_init"
-	.section	.rodata.__func__.9288,"a",@progbits
+	.section	.rodata.__func__.9289,"a",@progbits
 	.align	3
 	.set	.LANCHOR143,. + 0
-	.type	__func__.9288, %object
-	.size	__func__.9288, 21
-__func__.9288:
+	.type	__func__.9289, %object
+	.size	__func__.9289, 21
+__func__.9289:
 	.string	"flash_info_data_init"
-	.section	.rodata.__func__.9310,"a",@progbits
+	.section	.rodata.__func__.9311,"a",@progbits
 	.align	3
-	.set	.LANCHOR191,. + 0
-	.type	__func__.9310, %object
-	.size	__func__.9310, 17
-__func__.9310:
+	.set	.LANCHOR192,. + 0
+	.type	__func__.9311, %object
+	.size	__func__.9311, 17
+__func__.9311:
 	.string	"flash_info_flush"
-	.section	.rodata.__func__.9386,"a",@progbits
+	.section	.rodata.__func__.9387,"a",@progbits
 	.align	3
 	.set	.LANCHOR138,. + 0
-	.type	__func__.9386, %object
-	.size	__func__.9386, 17
-__func__.9386:
+	.type	__func__.9387, %object
+	.size	__func__.9387, 17
+__func__.9387:
 	.string	"lpa_rebuild_hash"
-	.section	.rodata.__func__.9433,"a",@progbits
+	.section	.rodata.__func__.9434,"a",@progbits
 	.align	3
-	.set	.LANCHOR211,. + 0
-	.type	__func__.9433, %object
-	.size	__func__.9433, 17
-__func__.9433:
+	.set	.LANCHOR212,. + 0
+	.type	__func__.9434, %object
+	.size	__func__.9434, 17
+__func__.9434:
 	.string	"ftl_write_commit"
-	.section	.rodata.__func__.9451,"a",@progbits
+	.section	.rodata.__func__.9452,"a",@progbits
 	.align	3
 	.set	.LANCHOR120,. + 0
-	.type	__func__.9451, %object
-	.size	__func__.9451, 14
-__func__.9451:
+	.type	__func__.9452, %object
+	.size	__func__.9452, 14
+__func__.9452:
 	.string	"ftl_write_buf"
-	.section	.rodata.__func__.9495,"a",@progbits
+	.section	.rodata.__func__.9496,"a",@progbits
 	.align	3
 	.set	.LANCHOR123,. + 0
-	.type	__func__.9495, %object
-	.size	__func__.9495, 18
-__func__.9495:
+	.type	__func__.9496, %object
+	.size	__func__.9496, 18
+__func__.9496:
 	.string	"zftl_add_read_buf"
-	.section	.rodata.__func__.9528,"a",@progbits
+	.section	.rodata.__func__.9529,"a",@progbits
 	.align	3
-	.set	.LANCHOR208,. + 0
-	.type	__func__.9528, %object
-	.size	__func__.9528, 10
-__func__.9528:
+	.set	.LANCHOR209,. + 0
+	.type	__func__.9529, %object
+	.size	__func__.9529, 10
+__func__.9529:
 	.string	"zftl_read"
-	.section	.rodata.__func__.9559,"a",@progbits
+	.section	.rodata.__func__.9560,"a",@progbits
 	.align	3
-	.set	.LANCHOR217,. + 0
-	.type	__func__.9559, %object
-	.size	__func__.9559, 13
-__func__.9559:
+	.set	.LANCHOR218,. + 0
+	.type	__func__.9560, %object
+	.size	__func__.9560, 13
+__func__.9560:
 	.string	"_ftl_discard"
-	.section	.rodata.__func__.9678,"a",@progbits
+	.section	.rodata.__func__.9679,"a",@progbits
 	.align	3
 	.set	.LANCHOR60,. + 0
-	.type	__func__.9678, %object
-	.size	__func__.9678, 12
-__func__.9678:
+	.type	__func__.9679, %object
+	.size	__func__.9679, 12
+__func__.9679:
 	.string	"gc_add_sblk"
-	.section	.rodata.__func__.9699,"a",@progbits
+	.section	.rodata.__func__.9700,"a",@progbits
 	.align	3
-	.set	.LANCHOR209,. + 0
-	.type	__func__.9699, %object
-	.size	__func__.9699, 21
-__func__.9699:
+	.set	.LANCHOR210,. + 0
+	.type	__func__.9700, %object
+	.size	__func__.9700, 21
+__func__.9700:
 	.string	"gc_check_data_one_wl"
-	.section	.rodata.__func__.9733,"a",@progbits
+	.section	.rodata.__func__.9734,"a",@progbits
 	.align	3
-	.set	.LANCHOR204,. + 0
-	.type	__func__.9733, %object
-	.size	__func__.9733, 22
-__func__.9733:
+	.set	.LANCHOR205,. + 0
+	.type	__func__.9734, %object
+	.size	__func__.9734, 22
+__func__.9734:
 	.string	"gc_update_l2p_map_new"
-	.section	.rodata.__func__.9746,"a",@progbits
+	.section	.rodata.__func__.9747,"a",@progbits
 	.align	3
 	.set	.LANCHOR67,. + 0
-	.type	__func__.9746, %object
-	.size	__func__.9746, 19
-__func__.9746:
+	.type	__func__.9747, %object
+	.size	__func__.9747, 19
+__func__.9747:
 	.string	"gc_write_completed"
-	.section	.rodata.__func__.9775,"a",@progbits
+	.section	.rodata.__func__.9776,"a",@progbits
 	.align	3
-	.set	.LANCHOR213,. + 0
-	.type	__func__.9775, %object
-	.size	__func__.9775, 16
-__func__.9775:
+	.set	.LANCHOR214,. + 0
+	.type	__func__.9776, %object
+	.size	__func__.9776, 16
+__func__.9776:
 	.string	"gc_do_copy_back"
-	.section	.rodata.__func__.9797,"a",@progbits
+	.section	.rodata.__func__.9798,"a",@progbits
 	.align	3
 	.set	.LANCHOR103,. + 0
-	.type	__func__.9797, %object
-	.size	__func__.9797, 16
-__func__.9797:
+	.type	__func__.9798, %object
+	.size	__func__.9798, 16
+__func__.9798:
 	.string	"gc_free_src_blk"
 	.section	.rodata.__func__.9842,"a",@progbits
 	.align	3
-	.set	.LANCHOR205,. + 0
+	.set	.LANCHOR206,. + 0
 	.type	__func__.9842, %object
 	.size	__func__.9842, 16
 __func__.9842:
 	.string	"gc_scan_src_blk"
 	.section	.rodata.__func__.9900,"a",@progbits
 	.align	3
-	.set	.LANCHOR206,. + 0
+	.set	.LANCHOR207,. + 0
 	.type	__func__.9900, %object
 	.size	__func__.9900, 20
 __func__.9900:
 	.string	"gc_scan_static_data"
 	.section	.rodata.__func__.9967,"a",@progbits
 	.align	3
-	.set	.LANCHOR215,. + 0
+	.set	.LANCHOR216,. + 0
 	.type	__func__.9967, %object
 	.size	__func__.9967, 11
 __func__.9967:
@@ -24985,27 +25164,27 @@ __func__.9967:
 .LC0:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
 	.section	.rodata.dump_ftl_info.str1.1,"aMS",@progbits,1
-.LC151:
+.LC154:
 	.string	"free_buf_count: %d\n"
-.LC152:
+.LC155:
 	.string	"g_ftl_info_blk blk:0x%x, index:0x%x, page:0x%x\n"
-.LC153:
+.LC156:
 	.string	"ftl_ext_info_blk blk:0x%x, page:0x%x\n"
-.LC154:
+.LC157:
 	.string	"ac_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC155:
+.LC158:
 	.string	"tmp_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC156:
+.LC159:
 	.string	"gc_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC157:
+.LC160:
 	.string	"lpa:"
-.LC158:
+.LC161:
 	.string	"vpn:"
-.LC159:
+.LC162:
 	.string	"sblk:"
-.LC160:
+.LC163:
 	.string	"lpa_hash:"
-.LC161:
+.LC164:
 	.string	"lpa_hash_index:"
 	.section	.rodata.dump_sblk_queue.str1.1,"aMS",@progbits,1
 .LC68:
@@ -25013,7 +25192,7 @@ __func__.9967:
 .LC69:
 	.string	"buf id= %d state = %d ppa = %x\n"
 	.section	.rodata.flash_complete_page_read.str1.1,"aMS",@progbits,1
-.LC117:
+.LC118:
 	.string	"flash_complete_page_read %x %x error_ecc %d %d\n"
 	.section	.rodata.flash_ddr_tuning_read.str1.1,"aMS",@progbits,1
 .LC109:
@@ -25022,53 +25201,59 @@ __func__.9967:
 	.string	"sync para %d\n"
 .LC111:
 	.string	"DDR mode Read error %x %x\n"
+.LC112:
+	.string	"SDR mode Read %x %x ecc:%x\n"
 	.section	.rodata.flash_erase_all.str1.1,"aMS",@progbits,1
 .LC35:
 	.string	"erase done: %x\n"
 	.section	.rodata.flash_erase_block_en.str1.1,"aMS",@progbits,1
 .LC33:
-	.string	"flash_erase_block %x %x\n"
+	.string	"flash_erase_block %x %x %x\n"
 .LC34:
-	.string	"flash_erase_block block = %x status = %x\n"
+	.string	"flash_erase_block %d block = %x status = %x\n"
 	.section	.rodata.flash_erase_duplane_block.str1.1,"aMS",@progbits,1
 .LC31:
 	.string	"flash_erase_duplane_block %x %x %x\n"
 .LC32:
 	.string	"flash_erase_duplane_block pageadd = %x status = %x\n"
 	.section	.rodata.flash_get_last_written_page.str1.1,"aMS",@progbits,1
-.LC114:
+.LC115:
 	.string	"flash_get_last_written_page: %x %x %x\n"
 	.section	.rodata.flash_info_blk_init.str1.1,"aMS",@progbits,1
-.LC115:
-	.string	"...%d @ %s %d %p\n"
 .LC116:
+	.string	"...%d @ %s %d %p\n"
+.LC117:
 	.string	"no sys info %x\n"
 	.section	.rodata.flash_info_data_init.str1.1,"aMS",@progbits,1
 .LC84:
 	.string	"...%d @ %s\n"
 	.section	.rodata.flash_info_flush.str1.1,"aMS",@progbits,1
-.LC146:
+.LC149:
 	.string	"finfo:"
-.LC147:
+.LC150:
 	.string	"flash_info_flush id = %x, page = %x\n"
-.LC148:
+.LC151:
 	.string	"sys_info_flush error:%x\n"
 	.section	.rodata.flash_mask_bad_block.str1.1,"aMS",@progbits,1
 .LC40:
 	.string	"flash_mask_bad_block %d %d\n"
 	.section	.rodata.flash_prog_page.str1.1,"aMS",@progbits,1
-.LC121:
-	.string	"flash_prog_page %x %x %x\n"
 .LC122:
+	.string	"flash_prog_page %x %x %x\n"
+.LC123:
 	.string	"flash_prog_page page_addr = %x status = %x\n"
 	.section	.rodata.flash_prog_page_en.str1.1,"aMS",@progbits,1
-.LC127:
-	.string	"flash_prog_page_en:%x %x\n"
 .LC128:
-	.string	"spare"
+	.string	"flash_prog_page_en:%x %x\n"
 .LC129:
-	.string	"data"
+	.string	"w d:"
 .LC130:
+	.string	"w s:"
+.LC131:
+	.string	"spare"
+.LC132:
+	.string	"data"
+.LC133:
 	.string	"write error: %x\n"
 	.section	.rodata.flash_read_id.str1.1,"aMS",@progbits,1
 .LC38:
@@ -25077,9 +25262,9 @@ __func__.9967:
 .LC102:
 	.string	"flash_read_page %x %x %x\n"
 	.section	.rodata.flash_read_page_en.str1.1,"aMS",@progbits,1
-.LC112:
-	.string	"flash_read_page_en %x %x %x\n"
 .LC113:
+	.string	"flash_read_page_en %x %x %x\n"
+.LC114:
 	.string	"flash_read_page_en %x %x error_ecc %d %d\n"
 	.section	.rodata.flash_set_interface_mode.str1.1,"aMS",@progbits,1
 .LC36:
@@ -25090,7 +25275,7 @@ __func__.9967:
 .LC67:
 	.string	"alloc sblk %x %d\n"
 	.section	.rodata.ftl_ext_info_init.str1.1,"aMS",@progbits,1
-.LC135:
+.LC138:
 	.string	"%s %d %d %x %x\n"
 	.section	.rodata.ftl_free_sblk.str1.1,"aMS",@progbits,1
 .LC55:
@@ -25098,70 +25283,70 @@ __func__.9967:
 .LC56:
 	.string	"swl_slc_free_mini_ec_blk sblk %x\n"
 	.section	.rodata.ftl_info_blk_init.str1.1,"aMS",@progbits,1
-.LC133:
+.LC136:
 	.string	"%d %x @%d %x\n"
-.LC134:
+.LC137:
 	.string	"ftl_info_blk_init %d %d %x\n"
 	.section	.rodata.ftl_info_flush.str1.1,"aMS",@progbits,1
-.LC132:
+.LC135:
 	.string	"g_ftl_info_blk blk = %x, page = %x version = %d\n"
 	.section	.rodata.ftl_low_format.str1.1,"aMS",@progbits,1
-.LC136:
+.LC139:
 	.string	"ftl_low_format %d\n"
-.LC137:
+.LC140:
 	.string	"low format %d %d %d %d\n"
 	.section	.rodata.ftl_mask_bad_block.str1.1,"aMS",@progbits,1
 .LC60:
 	.string	"mask bad block:cs %x block: %x\n"
 	.section	.rodata.ftl_open_sblk_recovery.str1.1,"aMS",@progbits,1
-.LC139:
+.LC142:
 	.string	"saved_active_page  = %x\n"
-.LC140:
+.LC143:
 	.string	"saved_active_plane = %x\n"
-.LC141:
+.LC144:
 	.string	"sblk = %x\n"
-.LC142:
+.LC145:
 	.string	"phy_blk = %x %x\n"
-.LC143:
+.LC146:
 	.string	"sblk = %x, vpn0 = %d, vpn1 = %d\n"
-.LC144:
+.LC147:
 	.string	"dump write = %x\n"
 	.section	.rodata.ftl_re_low_format.str1.1,"aMS",@progbits,1
-.LC138:
+.LC141:
 	.string	"re low format %d\n"
 	.section	.rodata.ftl_sblk_dump.str1.1,"aMS",@progbits,1
-.LC194:
+.LC197:
 	.string	"ftl_sblk_dump = %x %d %d %d %d\n"
-.LC195:
+.LC198:
 	.string	"ftl_sblk_dump = %x %x %x %x\n"
-.LC196:
+.LC199:
 	.string	"page_addr = %x, lpa=%x vpn = %d\n"
-.LC197:
+.LC200:
 	.string	"index= %x, lpa=%x\n"
-.LC198:
+.LC201:
 	.string	"block = %x, vpn=%x check vpn = %d\n"
 	.section	.rodata.ftl_sysblk_dump.str1.1,"aMS",@progbits,1
-.LC149:
+.LC152:
 	.string	"blk= %x, page=%x, ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
-.LC150:
+.LC153:
 	.string	"l2p:"
 	.section	.rodata.ftl_test_block.str1.1,"aMS",@progbits,1
-.LC131:
+.LC134:
 	.string	"low format %d\n"
 	.section	.rodata.ftl_update_l2p_map.str1.1,"aMS",@progbits,1
-.LC205:
+.LC208:
 	.string	"ftl_update_l2p_map: %x %x %x\n"
-.LC206:
+.LC209:
 	.string	"ftl_update_l2p_map"
-.LC207:
+.LC210:
 	.string	"lpa_tbl:"
-.LC208:
+.LC211:
 	.string	"sblk %x vpn: %d %d\n"
 	.section	.rodata.ftl_vpn_decrement.str1.1,"aMS",@progbits,1
 .LC59:
-	.string	"ftl_vpn_decrement %x = %d\n"
+	.string	"ftl_vpn_decrement %x = %d, %d\n"
 	.section	.rodata.ftl_write_commit.str1.1,"aMS",@progbits,1
-.LC209:
+.LC212:
 	.string	"%d read error: ppa:%x, lpa:%x, status:%x\n"
 	.section	.rodata.ftl_write_completed.str1.1,"aMS",@progbits,1
 .LC66:
@@ -25172,20 +25357,20 @@ __func__.9967:
 .LC42:
 	.string	"gc_add_sblk = %d, %d, %d,last update:%d, %d\n"
 	.section	.rodata.gc_check_data_one_wl.str1.1,"aMS",@progbits,1
-.LC202:
+.LC205:
 	.string	"gc_lpa:"
-.LC203:
+.LC206:
 	.string	"gc_ppa:"
-.LC204:
+.LC207:
 	.string	"err: ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
 	.section	.rodata.gc_do_copy_back.str1.1,"aMS",@progbits,1
-.LC210:
+.LC213:
 	.string	"gc page in buf: lpa %x ppa = %x pageindex= %x\n"
-.LC211:
+.LC214:
 	.string	"gc_do_copy_back: lpa %x des_ppa = %x %x gc_ppa= %x page_index= %d\n"
-.LC212:
+.LC215:
 	.string	"gc_do_copy_back: %x %x %x %x gc_ppa:%x %x\n"
-.LC213:
+.LC216:
 	.string	"%d prog_step: %x %x buf id= %x ppa = %x hash=%x id = %x plane = %x lpa=%x\n"
 	.section	.rodata.gc_free_src_blk.str1.1,"aMS",@progbits,1
 .LC57:
@@ -25196,16 +25381,16 @@ __func__.9967:
 .LC45:
 	.string	"%d gc_free_temp_buf buf id= %x\n"
 	.section	.rodata.gc_recovery.str1.1,"aMS",@progbits,1
-.LC172:
+.LC175:
 	.string	"ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
-.LC173:
+.LC176:
 	.string	"ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
-.LC174:
+.LC177:
 	.string	"gc_recovery: %x vpn = %x\n"
 	.section	.rodata.gc_scan_src_blk.str1.1,"aMS",@progbits,1
-.LC192:
+.LC195:
 	.string	"gc_scan_src_blk = %x, vpn = %d\n"
-.LC193:
+.LC196:
 	.string	"gc_scan_src_blk = %x, s vpn0 = %d, c vpn1 = %d\n"
 	.section	.rodata.gc_search_src_blk.str1.1,"aMS",@progbits,1
 .LC47:
@@ -25232,13 +25417,13 @@ __func__.9967:
 .LC81:
 	.string	"swl add slc gc  = %x, %d, %d, %d, %d, %d\n"
 	.section	.rodata.gc_update_l2p_map_new.str1.1,"aMS",@progbits,1
-.LC188:
+.LC191:
 	.string	"gc_update_l2p_map_new sblk %x\n"
-.LC189:
+.LC192:
 	.string	"gc_update_l2p_map_new: %x %x %x\n"
-.LC190:
+.LC193:
 	.string	"lpa: %x %x %x\n"
-.LC191:
+.LC194:
 	.string	"gc_update_l2p_map_new: %x vpn = %x vpn1 = %x done\n"
 	.section	.rodata.gc_write_completed.str1.1,"aMS",@progbits,1
 .LC43:
@@ -25254,31 +25439,31 @@ __func__.9967:
 .LC108:
 	.string	"hynix RR %d row=%x, count %d, status=%d\n"
 	.section	.rodata.idb_write_data.str1.1,"aMS",@progbits,1
-.LC123:
-	.string	"1 write_idblock fix data %x %x %x\n"
 .LC124:
-	.string	"write_idblock check fail! %x\n"
+	.string	"1 write_idblock fix data %x %x %x\n"
 .LC125:
+	.string	"write_idblock check fail! %x\n"
+.LC126:
 	.string	"write_idblock fail! %x\n"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",@progbits,1
-.LC163:
+.LC166:
 	.string	"region_id = %d, pm_max_region = %d\n"
-.LC164:
+.LC167:
 	.string	"load_l2p_region no ppa = %x , %x, all setting 0xff....\n"
-.LC165:
+.LC168:
 	.string	"load_l2p_region = %x,%x,%x, %x\n"
-.LC166:
+.LC169:
 	.string	"pm_ppa:"
-.LC167:
+.LC170:
 	.string	"data:"
-.LC168:
+.LC171:
 	.string	"spare:"
 	.section	.rodata.lpa_rebuild_hash.str1.1,"aMS",@progbits,1
 .LC72:
 	.string	"%s %d %d\n"
 	.section	.rodata.micron_read_retrial.str1.1,"aMS",@progbits,1
 .LC103:
-	.string	"micron %d row=%x,count %d,status=%d\n"
+	.string	"micron %d row=%x,last status %d,status = %d\n"
 .LC104:
 	.string	"micron RR %d row=%x,count %d,status=%d\n"
 	.section	.rodata.nand_flash_print_info.str1.1,"aMS",@progbits,1
@@ -25376,18 +25561,18 @@ __func__.9967:
 .LC83:
 	.string	"ftl_free_no_use_map_blk %x %x %x %d\n"
 	.section	.rodata.pm_init.str1.1,"aMS",@progbits,1
-.LC169:
+.LC172:
 	.string	"pm_init posr %x %x %x\n"
-.LC170:
+.LC173:
 	.string	"pm_init recovery %x %x %x\n"
 	.section	.rodata.pm_log2phys.str1.1,"aMS",@progbits,1
-.LC171:
+.LC174:
 	.string	"pm_log2phys  lpn = %d, max lpn = %d\n"
 	.section	.rodata.pm_ppa_update_check.str1.1,"aMS",@progbits,1
-.LC162:
+.LC165:
 	.string	"%s w error lpn = %x, max ppa = %d\n"
 	.section	.rodata.pm_write_page.str1.1,"aMS",@progbits,1
-.LC145:
+.LC148:
 	.string	"pm_write_page write error: %x\n"
 	.section	.rodata.print_ftl_debug_info.str1.1,"aMS",@progbits,1
 .LC61:
@@ -25409,11 +25594,11 @@ __func__.9967:
 .LC54:
 	.string	"%d: node:%x %x %x %x, %d %d %d %d %d\n"
 	.section	.rodata.queue_wait_first_req_completed.str1.1,"aMS",@progbits,1
-.LC118:
-	.string	"read: %x %x %x %x\n"
 .LC119:
-	.string	"0set buf %d,status = %x, ppa = %x lun state = %d\n"
+	.string	"read: %x %x %x %x\n"
 .LC120:
+	.string	"0set buf %d,status = %x, ppa = %x lun state = %d\n"
+.LC121:
 	.string	"1set buf %d,status = %x, ppa = %x lun state = %d\n"
 	.section	.rodata.random_seed,"a",@progbits
 	.align	3
@@ -25550,7 +25735,7 @@ random_seed:
 	.hword	17598
 	.hword	28087
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",@progbits,1
-.LC187:
+.LC190:
 	.string	"zftl_init %x\n"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
 .LC88:
@@ -25565,7 +25750,7 @@ random_seed:
 .LC39:
 	.string	"bad block test:%x %x\n"
 	.section	.rodata.sblk_prog_page.str1.1,"aMS",@progbits,1
-.LC126:
+.LC127:
 	.string	"sblk_prog_page ppa = %x, count = %d\n"
 	.section	.rodata.toshiba_15ref_value,"a",@progbits
 	.align	3
@@ -26163,16 +26348,16 @@ toshiba_ref_value:
 	.byte	12
 	.byte	112
 	.section	.rodata.zftl_discard.str1.1,"aMS",@progbits,1
-.LC219:
+.LC222:
 	.string	"ftl_discard:(%x, %x, %x, %x)\n"
 	.section	.rodata.zftl_do_gc.str1.1,"aMS",@progbits,1
-.LC214:
+.LC217:
 	.string	"gc %d: %d %d %d %d %d %d %d\n"
-.LC215:
+.LC218:
 	.string	"gc %d: %d %d %d %d %d %d\n"
-.LC216:
+.LC219:
 	.string	"GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\n"
-.LC217:
+.LC220:
 	.string	"gc free %x, %d\n"
 	.section	.rodata.zftl_gc_get_free_sblk.str1.1,"aMS",@progbits,1
 .LC49:
@@ -26185,41 +26370,41 @@ toshiba_ref_value:
 .LC52:
 	.string	"swl_slc_free_mini_ec_blk alloc sblk %x\n"
 	.section	.rodata.zftl_init.str1.1,"aMS",@progbits,1
-.LC175:
-	.string	"FTL version: 6.0.11 20180718"
-.LC176:
+.LC178:
+	.string	"FTL version: 6.0.14 20180908"
+.LC179:
 	.string	"_c_user_data_density := %d\n"
-.LC177:
+.LC180:
 	.string	"_c_totle_phy_density := %d\n"
-.LC178:
+.LC181:
 	.string	"_c_totle_log_page := %d\n"
-.LC179:
+.LC182:
 	.string	"_c_totle_data_density := %d\n"
-.LC180:
+.LC183:
 	.string	"_c_ftl_pm_page_num := %d\n"
-.LC181:
+.LC184:
 	.string	"_c_ftl_byte_pre_page := %d\n"
-.LC182:
+.LC185:
 	.string	"_c_max_pm_sblk := %d\n"
-.LC183:
+.LC186:
 	.string	"_min_slc_super_block := %d\n"
-.LC184:
+.LC187:
 	.string	"_max_xlc_super_block := %d\n"
-.LC185:
+.LC188:
 	.string	"gp_ftl_ext_info %p %p %p\n"
-.LC186:
+.LC189:
 	.string	"flash info size: %d %d %d\n"
 	.section	.rodata.zftl_read.str1.1,"aMS",@progbits,1
-.LC199:
+.LC202:
 	.string	"ftl_read %x %x %x\n"
-.LC200:
+.LC203:
 	.string	"ftl_read refresh =%x, lpa = %x, ppa= %x\n"
-.LC201:
+.LC204:
 	.string	"id=%d, lpa = %x, ppa = %x spare = %x %x %x %x\n"
 	.section	.rodata.zftl_sblk_list_init.str1.1,"aMS",@progbits,1
 .LC82:
 	.string	"free blk vpn error: %x %x\n"
 	.section	.rodata.zftl_write.str1.1,"aMS",@progbits,1
-.LC218:
+.LC221:
 	.string	"ftlwrite %x %x %x\n"
 	.hidden	free

commit eff8995ad7e97cc6b31597394274aa3e3dbe8dba
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Sep 26 09:35:15 2018 +0800

    video/drm: dsi: support non-continuous clock behavior
    
    android/rk/u-boot:rkdevelop:1e3808f13bac9cca1dc67e0db14d5c34dab94067
    
    Change-Id: Ibe35ec4d3de4f3bd4fba95cb5480d96c1950597c
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index 0032520d91..103c3ad9b8 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -372,6 +372,17 @@ static inline u32 dsi_read(struct dw_mipi_dsi *dsi, u32 reg)
 	return readl(dsi->base + reg);
 }
 
+static inline void dsi_update_bits(struct dw_mipi_dsi *dsi,
+				   u32 reg, u32 mask, u32 val)
+{
+	u32 orig, tmp;
+
+	orig = dsi_read(dsi, reg);
+	tmp = orig & ~mask;
+	tmp |= val & mask;
+	dsi_write(dsi, reg, tmp);
+}
+
 static void grf_field_write(struct dw_mipi_dsi *dsi, enum grf_reg_fields index,
 			    unsigned int val)
 {
@@ -613,10 +624,11 @@ static void rockchip_set_transfer_mode(struct dw_mipi_dsi *dsi, int flags)
 {
 	if (flags & MIPI_DSI_MSG_USE_LPM) {
 		dsi_write(dsi, DSI_CMD_MODE_CFG, CMD_MODE_ALL_LP);
-		dsi_write(dsi, DSI_LPCLK_CTRL, 0);
+		dsi_update_bits(dsi, DSI_LPCLK_CTRL, PHY_TXREQUESTCLKHS, 0);
 	} else {
 		dsi_write(dsi, DSI_CMD_MODE_CFG, 0);
-		dsi_write(dsi, DSI_LPCLK_CTRL, PHY_TXREQUESTCLKHS);
+		dsi_update_bits(dsi, DSI_LPCLK_CTRL,
+				PHY_TXREQUESTCLKHS, PHY_TXREQUESTCLKHS);
 	}
 }
 

commit 5b620ada08931fa9d2878a8e03c3e3ca18451563
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Sep 26 17:05:57 2018 +0800

    video/drm: panel: fix return value check of mipi_dsi_dcs_write/mipi_dsi_generic_write
    
    Change-Id: Ib80b478b5873ef2abb40b5069364aaf621299f64
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_panel.c b/drivers/video/drm/rockchip_panel.c
index 10cd29384c..ebf599635d 100644
--- a/drivers/video/drm/rockchip_panel.c
+++ b/drivers/video/drm/rockchip_panel.c
@@ -239,7 +239,7 @@ static int rockchip_panel_send_dsi_cmds(struct display_state *state,
 			return -EINVAL;
 		}
 
-		if (ret) {
+		if (ret < 0) {
 			printf("failed to write cmd%d: %d\n", i, ret);
 			return ret;
 		}

commit 43a0418788666721052f2d72a302155986a4da26
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Sep 26 09:22:01 2018 +0800

    video/drm: dsi: support read command
    
    android/rk/u-boot:rkdevelop:e7fabfb74b7c08fc30fd5cbd2538c85b40897a9a
    
    Change-Id: Ib2d1d8523cda02f51d01df0bb4d6ef8cfb53c2b3
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index 04784d5d79..0032520d91 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -620,6 +620,55 @@ static void rockchip_set_transfer_mode(struct dw_mipi_dsi *dsi, int flags)
 	}
 }
 
+static int dw_mipi_dsi_read_from_fifo(struct dw_mipi_dsi *dsi,
+				      const struct mipi_dsi_msg *msg)
+{
+	u8 *payload = msg->rx_buf;
+	u16 length;
+	u32 val;
+	int ret;
+
+	ret = readl_poll_timeout(dsi->base + DSI_CMD_PKT_STATUS,
+				 val, !(val & GEN_RD_CMD_BUSY), 50, 5000);
+	if (ret) {
+		printf("entire response isn't stored in the FIFO\n");
+		return ret;
+	}
+
+	/* Receive payload */
+	for (length = msg->rx_len; length; length -= 4) {
+		ret = readl_poll_timeout(dsi->base + DSI_CMD_PKT_STATUS,
+					 val, !(val & GEN_PLD_R_EMPTY),
+					 50, 5000);
+		if (ret) {
+			printf("Read payload FIFO is empty\n");
+			return ret;
+		}
+
+		val = dsi_read(dsi, DSI_GEN_PLD_DATA);
+
+		switch (length) {
+		case 3:
+			payload[2] = (val >> 16) & 0xff;
+			/* Fall through */
+		case 2:
+			payload[1] = (val >> 8) & 0xff;
+			/* Fall through */
+		case 1:
+			payload[0] = val & 0xff;
+			return 0;
+		}
+
+		payload[0] = (val >>  0) & 0xff;
+		payload[1] = (val >>  8) & 0xff;
+		payload[2] = (val >> 16) & 0xff;
+		payload[3] = (val >> 24) & 0xff;
+		payload += 4;
+	}
+
+	return 0;
+}
+
 static ssize_t rockchip_dsi_send_packet(struct dw_mipi_dsi *dsi,
 					const struct mipi_dsi_msg *msg)
 {
@@ -636,7 +685,7 @@ static ssize_t rockchip_dsi_send_packet(struct dw_mipi_dsi *dsi,
 
 	rockchip_set_transfer_mode(dsi, msg->flags);
 
-	/* Send payload,  */
+	/* Send payload */
 	while (DIV_ROUND_UP(packet.payload_length, 4)) {
 		/*
 		 * Alternatively, you can always keep the FIFO
@@ -677,6 +726,12 @@ static ssize_t rockchip_dsi_send_packet(struct dw_mipi_dsi *dsi,
 	if (ret)
 		return ret;
 
+	if (msg->rx_len) {
+		ret = dw_mipi_dsi_read_from_fifo(dsi, msg);
+		if (ret < 0)
+			return ret;
+	}
+
 	if (dsi->slave) {
 		ret = rockchip_dsi_send_packet(dsi->slave, msg);
 		if (ret) {
@@ -684,7 +739,8 @@ static ssize_t rockchip_dsi_send_packet(struct dw_mipi_dsi *dsi,
 			return ret;
 		}
 	}
-	return 0;
+
+	return msg->rx_len ? msg->rx_len : msg->tx_len;
 }
 
 static ssize_t rockchip_dw_mipi_dsi_transfer(struct display_state *state,

commit fdb51f0a384d063d996e2f576f2578450945239f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Oct 7 15:57:03 2018 +0800

    rockchip: query recovery partition existence before enter recovery mode
    
    if there is not recovery partition, just boot on.
    
    Change-Id: Ib2a4fa9be6ab26e927680eef1bbae93a7fddd7df
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index 8a20a3a31e..59b8beb26e 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -112,6 +112,22 @@ void rockchip_dnl_mode_check(void)
 			set_back_to_bootrom_dnl_flag();
 			do_reset(NULL, 0, 0, NULL);
 		} else {
+#ifdef CONFIG_RKIMG_BOOTLOADER
+			/* If there is no recovery partition, just boot on */
+			struct blk_desc *dev_desc;
+			disk_partition_t part_info;
+
+			dev_desc = rockchip_get_bootdev();
+			if (!dev_desc) {
+				printf("%s: dev_desc is NULL!\n", __func__);
+				return;
+			}
+			if (part_get_info_by_name(dev_desc, PART_RECOVERY,
+						  &part_info)) {
+				debug("%s: no recovery partition\n", __func__);
+				return;
+			}
+#endif
 			printf("recovery key pressed, entering recovery mode!\n");
 			env_set("reboot_mode", "recovery");
 		}

commit f88d7e9780061da726ed1780e49ecd464bb03688
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Sep 28 15:27:15 2018 +0800

    configs: rk1808: cut down unused modules
    
    Change-Id: I90749f153f61af25c784d4176745b8db677b0eab
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk1808_defconfig b/configs/rk1808_defconfig
index e5fb298bbd..65dac1e786 100644
--- a/configs/rk1808_defconfig
+++ b/configs/rk1808_defconfig
@@ -8,7 +8,6 @@ CONFIG_TARGET_EVB_RK1808=y
 CONFIG_DEFAULT_DEVICE_TREE="rk1808-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
-CONFIG_ANDROID_BOOT_IMAGE=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_BOOTDELAY=0
@@ -17,15 +16,30 @@ CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_FASTBOOT_BUF_ADDR=0x00800800
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_EXPORTENV is not set
+# CONFIG_CMD_IMPORTENV is not set
+# CONFIG_CMD_SAVEENV is not set
+# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_LZMADEC is not set
+# CONFIG_CMD_UNZIP is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
 CONFIG_CMD_GPT=y
-CONFIG_CMD_LOAD_ANDROID=y
+# CONFIG_CMD_LOADB is not set
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_MISC is not set
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
 CONFIG_RKPARM_PARTITION=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
@@ -71,3 +85,5 @@ CONFIG_G_DNL_MANUFACTURER="Rockchip"
 CONFIG_G_DNL_VENDOR_NUM=0x2207
 CONFIG_G_DNL_PRODUCT_NUM=0x330d
 CONFIG_LZ4=y
+# CONFIG_EFI_LOADER is not set
+CONFIG_TEST_ROCKCHIP=y

commit bcf5a32a7cea8605423b0ecb34aca509b4701fb5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Oct 7 13:11:26 2018 +0800

    lib: gzip: lower the message when parse header
    
    Change-Id: Iedd2cbefac99fb17256770dc334741b9e760c449
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/lib/gunzip.c b/lib/gunzip.c
index adb86c7550..3a5df68de6 100644
--- a/lib/gunzip.c
+++ b/lib/gunzip.c
@@ -50,7 +50,7 @@ int gzip_parse_header(const unsigned char *src, unsigned long len)
 	i = 10;
 	flags = src[3];
 	if (src[2] != DEFLATED || (flags & RESERVED) != 0) {
-		puts ("Error: Bad gzipped data\n");
+		debug("Error: Bad gzipped data\n");
 		return (-1);
 	}
 	if ((flags & EXTRA_FIELD) != 0)

commit d6ceaafd1a113ad77916608ec7c45e6f4f7f2730
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Oct 7 14:49:59 2018 +0800

    rockchip: px30: add fdt_high/initrd_high to avoid relocation
    
    Change-Id: Ib6dd7b98ea5b44cecd0f52e570643c486940e83c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index cb26415285..abec304cba 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -49,6 +49,8 @@
 #define CONFIG_ROCKUSB_G_DNL_PID        0x330d
 
 #define ENV_MEM_LAYOUT_SETTINGS \
+	"fdt_high=0xffffffffffffffff\0" \
+	"initrd_high=0xffffffffffffffff\0" \
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x01f00000\0" \

commit 15349ff5d02923ba1f6358cb0c778f9f6cec0cab
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Oct 7 13:04:08 2018 +0800

    rockchip: rk1808: add fdt_high/initrd_high to avoid relocation
    
    Change-Id: Icc418811d2ffa73c710391a7850dd6e292eddc6e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk1808_common.h b/include/configs/rk1808_common.h
index b7a25f4bbc..276db39af0 100644
--- a/include/configs/rk1808_common.h
+++ b/include/configs/rk1808_common.h
@@ -36,6 +36,8 @@
 #define CONFIG_ROCKUSB_G_DNL_PID	0x330d
 
 #define ENV_MEM_LAYOUT_SETTINGS \
+	"fdt_high=0xffffffffffffffff\0" \
+	"initrd_high=0xffffffffffffffff\0" \
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x01f00000\0" \

commit 1dfe3932bf8ddec130b80fedc2d73f2ae08621a4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Oct 7 12:55:51 2018 +0800

    rockchip: rk1808: support decomp lz4 kernel image
    
    Change-Id: Ia8867efe104fd59974b83c10770aece61f4643d7
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk1808_defconfig b/configs/rk1808_defconfig
index eaa285a3e0..e5fb298bbd 100644
--- a/configs/rk1808_defconfig
+++ b/configs/rk1808_defconfig
@@ -70,3 +70,4 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Rockchip"
 CONFIG_G_DNL_VENDOR_NUM=0x2207
 CONFIG_G_DNL_PRODUCT_NUM=0x330d
+CONFIG_LZ4=y
diff --git a/include/configs/rk1808_common.h b/include/configs/rk1808_common.h
index af189ae03e..b7a25f4bbc 100644
--- a/include/configs/rk1808_common.h
+++ b/include/configs/rk1808_common.h
@@ -40,6 +40,7 @@
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x01f00000\0" \
 	"kernel_addr_r=0x02080000\0" \
+	"kernel_addr_c=0x04080000\0" \
 	"ramdisk_addr_r=0x0a200000\0"
 
 #include <config_distro_bootcmd.h>

commit 70641c3416f4ad6cab3ae95bf31c2f9cb2170cfd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Oct 7 11:40:42 2018 +0800

    dm: i2c: print i2c speed
    
    i2c speed is an important factor for boot time, it's good
    for developers to notice this.
    
    Change-Id: I46472e8ec89f3328cf6f20b72351deb512dfdaa1
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/i2c/i2c-uclass.c b/drivers/i2c/i2c-uclass.c
index 1397f34dda..206a4f6d1b 100644
--- a/drivers/i2c/i2c-uclass.c
+++ b/drivers/i2c/i2c-uclass.c
@@ -491,7 +491,7 @@ static int i2c_post_probe(struct udevice *dev)
 	struct dm_i2c_bus *i2c = dev_get_uclass_priv(dev);
 
 	i2c->speed_hz = dev_read_u32_default(dev, "clock-frequency", 100000);
-
+	printf("I2c speed: %dHz\n", i2c->speed_hz);
 	return dm_i2c_set_bus_speed(dev, i2c->speed_hz);
 #else
 	return 0;

commit 992f4e77226545930c08c876ae3030c36a2fab3b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Oct 7 11:35:31 2018 +0800

    power: charge animation: enable regulator-mem-state
    
    Change-Id: I31a687ca5a53c57d5b49fb23ec5951b34b1e25f1
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 854e961798..8e556ec242 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -161,6 +161,8 @@ static int system_suspend_enter(struct charge_animation_pdata *pdata)
 {
 	if (pdata->system_suspend && IS_ENABLED(CONFIG_ARM_SMCCC)) {
 		printf("\nSystem suspend: ");
+		putc('0');
+		regulators_enable_state_mem(false);
 		putc('1');
 		local_irq_disable();
 		putc('2');

commit 0ae9790ca7754378cd92b002ada33c9f3cd9fce9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Oct 7 11:28:50 2018 +0800

    dm: regulator: drop regulator-state-mem initial from autoset
    
    init regulator-state-mem wastes time a lot and is only needed when
    system suspend is called, so provide regulators_enable_state_mem()
    the driver that implements system suspend.
    
    Change-Id: I2499df7caa9224879eed057d9269e8dcdce11c51
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/regulator-uclass.c b/drivers/power/regulator/regulator-uclass.c
index 7182bcc90b..5b1f574e86 100644
--- a/drivers/power/regulator/regulator-uclass.c
+++ b/drivers/power/regulator/regulator-uclass.c
@@ -244,6 +244,20 @@ int device_get_supply_regulator(struct udevice *dev, const char *supply_name,
 					    supply_name, devp);
 }
 
+static int regulator_init_suspend(struct udevice *dev)
+{
+	struct dm_regulator_uclass_platdata *uc_pdata;
+	int ret;
+
+	uc_pdata = dev_get_uclass_platdata(dev);
+
+	ret = regulator_set_suspend_enable(dev, uc_pdata->suspend_on);
+	if (!ret && uc_pdata->suspend_on)
+		return regulator_set_suspend_value(dev, uc_pdata->suspend_uV);
+
+	return 0;
+}
+
 int regulator_autoset(struct udevice *dev)
 {
 	struct dm_regulator_uclass_platdata *uc_pdata;
@@ -254,16 +268,6 @@ int regulator_autoset(struct udevice *dev)
 	if (uc_pdata->ramp_delay != -ENODATA)
 		regulator_set_ramp_delay(dev, uc_pdata->ramp_delay);
 
-	/*
-	 * Suspend configure is not necessary and should not influence normal
-	 * configure, so that we set "ret=0" even failed here.
-	 */
-	ret = regulator_set_suspend_enable(dev, uc_pdata->suspend_on);
-	if (!ret && uc_pdata->suspend_on)
-		regulator_set_suspend_value(dev, uc_pdata->suspend_uV);
-	else
-		ret = 0;
-
 	if (!uc_pdata->always_on && !uc_pdata->boot_on)
 		return -EMEDIUMTYPE;
 
@@ -464,6 +468,31 @@ static int regulator_pre_probe(struct udevice *dev)
 	return 0;
 }
 
+int regulators_enable_state_mem(bool verbose)
+{
+	struct udevice *dev;
+	struct uclass *uc;
+	int ret;
+
+	ret = uclass_get(UCLASS_REGULATOR, &uc);
+	if (ret)
+		return ret;
+	for (uclass_first_device(UCLASS_REGULATOR, &dev);
+	     dev;
+	     uclass_next_device(&dev)) {
+		ret = regulator_init_suspend(dev);
+
+		if (ret == -EMEDIUMTYPE)
+			ret = 0;
+		if (verbose)
+			regulator_show(dev, ret);
+		if (ret == -ENOSYS)
+			ret = 0;
+	}
+
+	return ret;
+}
+
 int regulators_enable_boot_on(bool verbose)
 {
 	struct udevice *dev;
@@ -477,6 +506,7 @@ int regulators_enable_boot_on(bool verbose)
 	     dev;
 	     uclass_next_device(&dev)) {
 		ret = regulator_autoset(dev);
+
 		if (ret == -EMEDIUMTYPE)
 			ret = 0;
 		if (verbose)
diff --git a/include/power/regulator.h b/include/power/regulator.h
index 8e5f7c855d..a6a942bb90 100644
--- a/include/power/regulator.h
+++ b/include/power/regulator.h
@@ -394,23 +394,11 @@ int regulator_set_mode(struct udevice *dev, int mode_id);
 int regulators_enable_boot_on(bool verbose);
 
 /**
- * regulator_autoset: setup the voltage/current on a regulator
+ * regulators_enable_state_mem() - enable regulators state mem configure
  *
- * The setup depends on constraints found in device's uclass's platform data
- * (struct dm_regulator_uclass_platdata):
- *
- * - Enable - will set - if any of: 'always_on' or 'boot_on' is set to true,
- *   or if both are unset, then the function returns
- * - Voltage value - will set - if '.min_uV' and '.max_uV' values are equal
- * - Current limit - will set - if '.min_uA' and '.max_uA' values are equal
- *
- * The function returns on the first-encountered error.
- *
- * @platname - expected string for dm_regulator_uclass_platdata .name field
- * @devp     - returned pointer to the regulator device - if non-NULL passed
- * @return: 0 on success or negative value of errno.
+ * This sets regulator-state-mem state for all regulators ;
  */
-int regulator_autoset(struct udevice *dev);
+int regulators_enable_state_mem(bool verbose);
 
 /**
  * regulator_autoset_by_name: setup the regulator given by its uclass's

commit 7bd9afa1c69dea06eeedb349273f15d330e20b15
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Oct 7 10:51:58 2018 +0800

    rockchip: add rk1808 chip info support
    
    Change-Id: I368ea86665da002b2bfe67b1dda9d93e51b8d1d8
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/chip_info.c b/arch/arm/mach-rockchip/chip_info.c
index 15baad390e..ad9c49c711 100644
--- a/arch/arm/mach-rockchip/chip_info.c
+++ b/arch/arm/mach-rockchip/chip_info.c
@@ -88,6 +88,8 @@ int rockchip_rockusb_get_chip_info(unsigned int chip_info[])
 		chip_info[0] = 0x33323248;
 #elif defined(CONFIG_ROCKCHIP_RK3399)
 		chip_info[0] = 0x33333043;
+#elif defined(CONFIG_ROCKCHIP_RK1808)
+		chip_info[0] = 0x31383041;
 #endif
 	}
 

commit fc99e0440b4b6d4c96074ec9ae1d634871b72d5f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Oct 7 10:08:59 2018 +0800

    make.sh: support parse address with reloc offset
    
    Usage:
            ./make.sh [reloc_addr]-[reloc_offset]
    
    Example:
            ./make.sh 7fe8fb88-7f88d000(same as: ./make.sh 602b88)
    
    Change-Id: I08bb733702d18ddea89127e8d8f2db71faabe95c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index ff106db8ab..2851949c09 100755
--- a/make.sh
+++ b/make.sh
@@ -75,26 +75,27 @@ help()
 	echo "Example:"
 	echo
 	echo "1. Build board:"
-	echo "	./make.sh evb-rk3399            ---- build for evb-rk3399_defconfig"
-	echo "	./make.sh evb-rk3399 O=rockdev  ---- build for evb-rk3399_defconfig with output dir "./rockdev""
-	echo "	./make.sh firefly-rk3288        ---- build for firefly-rk3288_defconfig"
-	echo "	./make.sh                       ---- build with exist .config"
+	echo "	./make.sh evb-rk3399               --- build for evb-rk3399_defconfig"
+	echo "	./make.sh evb-rk3399 O=rockdev     --- build for evb-rk3399_defconfig with output dir "./rockdev""
+	echo "	./make.sh firefly-rk3288           --- build for firefly-rk3288_defconfig"
+	echo "	./make.sh                          --- build with exist .config"
 	echo
-	echo "	After build, images of uboot, loader and trust are all generated."
+	echo "	After build, Images of uboot, loader and trust are all generated."
 	echo
 	echo "2. Pack helper:"
-	echo "	./make.sh trust         --- pack trust.img"
-	echo "	./make.sh uboot         --- pack uboot.img"
-	echo "	./make.sh loader        --- pack loader bin"
-	echo "	./make.sh loader-all	--- pack loader bin (all supported loaders)"
+	echo "	./make.sh trust                    --- pack trust.img"
+	echo "	./make.sh uboot                    --- pack uboot.img"
+	echo "	./make.sh loader                   --- pack loader bin"
+	echo "	./make.sh loader-all	           --- pack loader bin (all supported loaders)"
 	echo
 	echo "3. Debug helper:"
-	echo "	./make.sh elf           --- dump elf file with -D(default)"
-	echo "	./make.sh elf-S         --- dump elf file with -S"
-	echo "	./make.sh elf-d         --- dump elf file with -d"
-	echo "	./make.sh <addr>        --- dump function symbol and code position of address"
-	echo "	./make.sh map           --- cat u-boot.map"
-	echo "	./make.sh sym           --- cat u-boot.sym"
+	echo "	./make.sh elf                      --- dump elf file with -D(default)"
+	echo "	./make.sh elf-S                    --- dump elf file with -S"
+	echo "	./make.sh elf-d                    --- dump elf file with -d"
+	echo "	./make.sh <no reloc_addr>          --- dump function symbol and code position of address(no relocated)"
+	echo "	./make.sh <reloc_addr-reloc_off>   --- dump function symbol and code position of address(relocated)"
+	echo "	./make.sh map                      --- cat u-boot.map"
+	echo "	./make.sh sym                      --- cat u-boot.sym"
 }
 
 prepare()
@@ -154,7 +155,7 @@ prepare()
 
 		*)
 		#Func address is valid ?
-		if [ -z $(echo ${FUNCADDR} | sed 's/[0-9,a-f,A-F,x,X]//g') ]; then
+		if [ -z $(echo ${FUNCADDR} | sed 's/[0-9,a-f,A-F,x,X,-]//g') ]; then
 			return
 		elif [ ! -f configs/${BOARD}_defconfig ]; then
 			echo
@@ -316,12 +317,27 @@ sub_commands()
 
 		*)
 		# Search function and code position of address
-		if [ -z $(echo ${FUNCADDR} | sed 's/[0-9,a-f,A-F,x,X]//g') ] && [ ${FUNCADDR} ]; then
+		RELOC_OFF=${FUNCADDR#*-}
+		FUNCADDR=${FUNCADDR%-*}
+		if [ -z $(echo ${FUNCADDR} | sed 's/[0-9,a-f,A-F,x,X,-]//g') ] && [ ${FUNCADDR} ]; then
 			# With prefix: '0x' or '0X'
 			if [ `echo ${FUNCADDR} | sed -n "/0[x,X]/p" | wc -l` -ne 0 ]; then
 				FUNCADDR=`echo $FUNCADDR | awk '{ print strtonum($0) }'`
 				FUNCADDR=`echo "obase=16;${FUNCADDR}"|bc |tr '[A-Z]' '[a-z]'`
 			fi
+			if [ `echo ${RELOC_OFF} | sed -n "/0[x,X]/p" | wc -l` -ne 0 ] && [ ${RELOC_OFF} ]; then
+				RELOC_OFF=`echo $RELOC_OFF | awk '{ print strtonum($0) }'`
+				RELOC_OFF=`echo "obase=16;${RELOC_OFF}"|bc |tr '[A-Z]' '[a-z]'`
+			fi
+
+			# If reloc address is assigned, do sub
+			if [ "${FUNCADDR}" != "${RELOC_OFF}" ]; then
+				# Hex -> Dec -> SUB -> Hex
+				FUNCADDR=`echo $((16#${FUNCADDR}))`
+				RELOC_OFF=`echo $((16#${RELOC_OFF}))`
+				FUNCADDR=$((FUNCADDR-RELOC_OFF))
+				FUNCADDR=$(echo "obase=16;${FUNCADDR}"|bc |tr '[A-Z]' '[a-z]')
+			fi
 
 			echo
 			sed -n "/${FUNCADDR}/p" ${OUTDIR}/u-boot.sym

commit 1b6c85a0dfb512f9ae507b8b64e9cab8a740cd7b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Sep 30 12:55:05 2018 +0800

    make.sh: add debug-N sub commands
    
    this command is mainly for debugging.
    
    Usage:
            ./make.sh debug-N
    
    Example:
            ./make.sh debug    ------ for debug help
            ./make.sh debug-1  ------ enable case1 debug
            ......
    
    Change-Id: I1a0b063863cbdfc2be6bcc33da9c08f6d7536b3e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 0cdde4f527..ff106db8ab 100755
--- a/make.sh
+++ b/make.sh
@@ -109,7 +109,7 @@ prepare()
 	else
 		case $BOARD in
 			# Parse from exit .config
-			''|elf*|loader*|trust|uboot|map|sym)
+			''|elf*|loader*|debug*|trust|uboot|map|sym)
 			count=`find -name .config | wc -l`
 			dir=`find -name .config`
 			# Good, find only one .config
@@ -149,7 +149,7 @@ prepare()
 		;;
 
 		#Subcmd
-		''|elf*|loader*|trust|uboot|map|sym)
+		''|elf*|loader*|debug*|trust|uboot|map|sym)
 		;;
 
 		*)
@@ -235,6 +235,60 @@ sub_commands()
 		fi
 		;;
 
+		debug)
+		if [ "${cmd}" = 'debug' -a "${opt}" = 'debug' ]; then
+			echo
+			echo "The commands will modify .config and files, and can't auto restore changes!"
+			echo "debug-N, the N:"
+			echo "    1. lib/initcall.c debug() -> printf()"
+			echo "    2. common/board_r.c and common/board_f.c debug() -> printf()"
+			echo "    3. global #define DEBUG"
+			echo "    4. enable CONFIG_ROCKCHIP_DEBUGGER"
+			echo "    5. enable CONFIG_ROCKCHIP_CRC"
+			echo "    6. enable CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP"
+			echo "    7. enable CONFIG_ROCKCHIP_CRASH_DUMP"
+			echo "    8. set CONFIG_BOOTDELAY=5"
+			echo
+			echo "Enabled: "
+			grep '^CONFIG_ROCKCHIP_DEBUGGER=y' ${OUTDIR}/.config > /dev/null \
+			&& echo "    CONFIG_ROCKCHIP_DEBUGGER"
+			grep '^CONFIG_ROCKCHIP_CRC=y' ${OUTDIR}/.config > /dev/null \
+			&& echo "    CONFIG_ROCKCHIP_CRC"
+			grep '^CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP=y' ${OUTDIR}/.config > /dev/null \
+			&& echo "    CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP"
+			grep '^CONFIG_ROCKCHIP_CRASH_DUMP=y' ${OUTDIR}/.config > /dev/null \
+			&& echo "    CONFIG_ROCKCHIP_CRASH_DUMP"
+
+		elif [ "${opt}" = '1' ]; then
+			sed -i 's/\<debug\>/printf/g' lib/initcall.c
+			echo "DEBUG [1]: lib/initcall.c debug() -> printf()"
+		elif [ "${opt}" = '2' ]; then
+			sed -i 's/\<debug\>/printf/g' ./common/board_f.c
+			sed -i 's/\<debug\>/printf/g' ./common/board_r.c
+			echo "DEBUG [2]: common/board_r.c and common/board_f.c debug() -> printf()"
+		elif [ "${opt}" = '3' ]; then
+			sed -i '$i \#define DEBUG\' include/configs/rockchip-common.h
+			echo "DEBUG [3]: global #define DEBUG"
+		elif [ "${opt}" = '4' ]; then
+			sed -i 's/\# CONFIG_ROCKCHIP_DEBUGGER is not set/CONFIG_ROCKCHIP_DEBUGGER=y/g' ${OUTDIR}/.config
+			echo "DEBUG [4]: CONFIG_ROCKCHIP_DEBUGGER is enabled"
+		elif [ "${opt}" = '5' ]; then
+			sed -i 's/\# CONFIG_ROCKCHIP_CRC is not set/CONFIG_ROCKCHIP_CRC=y/g' ${OUTDIR}/.config
+			echo "DEBUG [5]: CONFIG_ROCKCHIP_CRC is enabled"
+		elif [ "${opt}" = '6' ]; then
+			sed -i 's/\# CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP is not set/CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP=y/g' ${OUTDIR}/.config
+			echo "DEBUG [6]: CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP is enabled"
+		elif [ "${opt}" = '7' ]; then
+			sed -i 's/\# CONFIG_ROCKCHIP_CRASH_DUMP is not set/CONFIG_ROCKCHIP_CRASH_DUMP=y/g' ${OUTDIR}/.config
+			echo "DEBUG [7]: CONFIG_ROCKCHIP_CRASH_DUMP is enabled"
+		elif [ "${opt}" = '8' ]; then
+			sed -i 's/^CONFIG_BOOTDELAY=0/CONFIG_BOOTDELAY=5/g' ${OUTDIR}/.config
+			echo "DEBUG [8]: CONFIG_BOOTDELAY is 5s"
+		fi
+		echo
+		exit 0
+		;;
+
 		map)
 		cat ${OUTDIR}/u-boot.map | less
 		exit 0

commit 5af94f7887ab4057e9feb37243f843b811a5c0cf
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Sep 29 15:55:33 2018 +0800

    android: get fdt by suitable ways
    
    We may have special operations for fdt(optional):
    - apply fdt overlay;
    - select fdt by adc or gpio;
    
    We can't read default rk-kernel.dtb and pass it to kernel,
    call rockchip_read_dtb_file() to get dtb.
    
    Change-Id: I3aba002b0cfe324cc7c3852bf8b9561575590fd4
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 4ecf549961..8f08462820 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -630,8 +630,7 @@ int rockchip_read_dtb_file(void *fdt_addr)
 	if (ret < 0)
 		return ret;
 
-#if defined(CONFIG_CMD_DTIMG) && \
-    defined(CONFIG_OF_LIBFDT_OVERLAY) && defined(CONFIG_USING_KERNEL_DTB)
+#if defined(CONFIG_CMD_DTIMG) && defined(CONFIG_OF_LIBFDT_OVERLAY)
 	android_fdt_overlay_apply((void *)fdt_addr);
 #endif
 
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 05a9b39af5..c24f9e8b85 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -933,16 +933,6 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	ret = android_image_get_fdt((void *)load_address, &fdt_addr);
 	if (!ret)
 		env_set_hex("fdt_addr", fdt_addr);
-
-/*
- * Actually if CONFIG_USING_KERNEL_DTB is enbled, we have already read kernel
- * dtb and apply overlay in init_kernel_dtb(), so that we don't need to apply
- * again, we would pass the current fdt to kernel.
- */
-#if defined(CONFIG_CMD_DTIMG) && \
-    defined(CONFIG_OF_LIBFDT_OVERLAY) && !defined(CONFIG_USING_KERNEL_DTB)
-	android_fdt_overlay_apply((void *)fdt_addr);
-#endif
 #endif
 	android_bootloader_boot_kernel(load_address);
 
diff --git a/common/image-android.c b/common/image-android.c
index c15efb23d3..7148e3580c 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -190,27 +190,55 @@ int android_image_get_fdt(const struct andr_img_hdr *hdr,
 		*rd_data = 0;
 		return -1;
 	}
-
-	printf("FDT load addr 0x%08x size %u KiB\n",
-	       hdr->second_addr, DIV_ROUND_UP(hdr->second_size, 1024));
 /*
- * Actually we have read kernel dtb in init_kernel_dtb() and do overlay
- * when CONFIG_USING_KERNEL_DTB is enbled, and we also didn't update it at all.
- * So that we pass current fdt blob to kernel, otherwise we have to do overlay
- * again which wastes time.
+ * If kernel dtb is enabled, we have read kernel dtb in
+ * init_kernel_dtb() -> rockchip_read_dtb_file() and may have been
+ * done(optional) selection:
+ *
+ * 1. apply fdt overlay;
+ * 2. select fdt by adc or gpio;
+ *
+ * After that, we didn't update dtb at all untill run here, it's fine to
+ * pass current fdt to kernel.
  */
-#if defined(CONFIG_OF_LIBFDT_OVERLAY) && defined(CONFIG_USING_KERNEL_DTB)
+#if defined(CONFIG_USING_KERNEL_DTB)
 	*rd_data = (ulong)gd->fdt_blob;
+
+/*
+ * If kernel dtb is disabled and support rockchip image, we need to call
+ * rockchip_read_dtb_file() to get dtb with some optional selection.
+ */
+#elif defined(CONFIG_RKIMG_BOOTLOADER)
+	ulong fdt_addr = 0;
+	int ret;
+
+	/* Get resource addr and fdt addr */
+	fdt_addr = env_get_ulong("fdt_addr_r", 16, 0);
+	if (!fdt_addr) {
+		printf("No Found FDT Load Address.\n");
+		return -1;
+	}
+
+	ret = rockchip_read_dtb_file((void *)fdt_addr);
+	if (ret < 0) {
+		printf("%s: failed to read dtb file, ret=%d\n", __func__, ret);
+		return ret;
+	}
+
+	*rd_data = fdt_addr;
+
+/*
+ * If kernel dtb is disabled and not support rockchip image,
+ * get dtb from second position.
+ */
 #else
 	*rd_data = (unsigned long)hdr;
 	*rd_data += hdr->page_size;
 	*rd_data += ALIGN(hdr->kernel_size, hdr->page_size);
 	*rd_data += ALIGN(hdr->ramdisk_size, hdr->page_size);
-#ifdef CONFIG_RKIMG_BOOTLOADER
-	*rd_data += (rockchip_get_resource_file((void *)*rd_data,
-		     ANDROID_ARG_FDT_FILENAME))
-			* 512;
-#endif
+
+	printf("FDT load addr 0x%08x size %u KiB\n",
+	       hdr->second_addr, DIV_ROUND_UP(hdr->second_size, 1024));
 #endif
 
 	return 0;

commit dad148955913e9e16bee05201f447a7ee2fb6b2e
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Sat Oct 6 20:23:19 2018 +0800

    clk: rockchip: rk1808: support pclk_pmu freq setting
    
    set pclk_pmu freq before ppll freq setting.
    
    Change-Id: Ieab142dd9e41d98d9798be08a0f01f941d3ad9a4
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk1808.h b/arch/arm/include/asm/arch-rockchip/cru_rk1808.h
index 38ff81f8b6..33fb895eb3 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk1808.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk1808.h
@@ -12,6 +12,7 @@
 #define KHz		1000
 #define OSC_HZ		(24 * MHz)
 #define APLL_HZ		(600 * MHz)
+#define PCLK_PMU_HZ	(100 * MHz)
 
 /* PX30 pll id */
 enum rk1808_pll_id {
@@ -266,5 +267,9 @@ enum {
 	CLK_I2C0_DIV_CON_SHIFT		= 8,
 	CLK_I2C0_PLL_SEL_MASK		= 1 << CLK_I2C0_PLL_SEL_SHIFT,
 	CLK_I2C0_DIV_CON_MASK		= 0x3f << CLK_I2C0_DIV_CON_SHIFT,
+
+	/* PMUCRU_CLK_SEL0_CON */
+	PCLK_PMU_DIV_CON_SHIFT		= 0,
+	PCLK_PMU_DIV_CON_MASK		= 0x1f << PCLK_PMU_DIV_CON_SHIFT,
 };
 #endif
diff --git a/drivers/clk/rockchip/clk_rk1808.c b/drivers/clk/rockchip/clk_rk1808.c
index ecb08a04bf..4763dcae04 100644
--- a/drivers/clk/rockchip/clk_rk1808.c
+++ b/drivers/clk/rockchip/clk_rk1808.c
@@ -689,6 +689,22 @@ static ulong rk1808_peri_set_clk(struct rk1808_clk_priv *priv,
 	return rk1808_peri_get_clk(priv, clk_id);
 }
 
+static ulong rk1808_pclk_pmu_set_clk(struct rk1808_clk_priv *priv,
+				     ulong clk_id, ulong parent_hz, ulong hz)
+{
+	struct rk1808_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(parent_hz, hz);
+	assert(src_clk_div - 1 < 31);
+
+	rk_clrsetreg(&cru->pmu_clksel_con[0],
+		     PCLK_PMU_DIV_CON_MASK,
+		     (src_clk_div - 1) << PCLK_PMU_DIV_CON_SHIFT);
+
+	return parent_hz / src_clk_div;
+}
+
 static ulong rk1808_armclk_set_clk(struct rk1808_clk_priv *priv, ulong hz)
 {
 	struct rk1808_cru *cru = priv->cru;
@@ -821,10 +837,14 @@ static ulong rk1808_clk_set_rate(struct clk *clk, ulong rate)
 	switch (clk->id) {
 	case PLL_APLL:
 	case PLL_DPLL:
-	case PLL_PPLL:
 		ret = rockchip_pll_set_rate(&rk1808_pll_clks[clk->id - 1],
 					    priv->cru, clk->id - 1, rate);
 		break;
+	case PLL_PPLL:
+		ret = rk1808_pclk_pmu_set_clk(priv, clk->id, rate, PCLK_PMU_HZ);
+		ret = rockchip_pll_set_rate(&rk1808_pll_clks[PPLL],
+					    priv->cru, PPLL, rate);
+		break;
 	case PLL_CPLL:
 		ret = rockchip_pll_set_rate(&rk1808_pll_clks[CPLL],
 					    priv->cru, CPLL, rate);

commit b31aa7beb9bbd417b3d5048992d6adc461642894
Author: William Wu <william.wu@rock-chips.com>
Date:   Sat Oct 6 19:00:57 2018 +0800

    phy: phy-rockchip-inno-usb2: add support for rk1808
    
    Change-Id: Ia9cf71aa0d8cc8ce3b612cbc6a55acee4df514cd
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index 010c745be7..2206681f35 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -556,6 +556,59 @@ static struct phy_ops rockchip_usb2phy_ops = {
 	.of_xlate = rockchip_usb2phy_of_xlate,
 };
 
+static const struct rockchip_usb2phy_cfg rk1808_phy_cfgs[] = {
+	{
+		.reg = 0x100,
+		.num_ports	= 2,
+		.clkout_ctl	= { 0x108, 4, 4, 1, 0 },
+		.port_cfgs	= {
+			[USB2PHY_PORT_OTG] = {
+				.phy_sus	= { 0x0100, 8, 0, 0, 0x1d1 },
+				.bvalid_det_en	= { 0x0110, 2, 2, 0, 1 },
+				.bvalid_det_st	= { 0x0114, 2, 2, 0, 1 },
+				.bvalid_det_clr = { 0x0118, 2, 2, 0, 1 },
+				.iddig_output	= { 0x0100, 10, 10, 0, 1 },
+				.iddig_en	= { 0x0100, 9, 9, 0, 1 },
+				.idfall_det_en	= { 0x0110, 5, 5, 0, 1 },
+				.idfall_det_st	= { 0x0114, 5, 5, 0, 1 },
+				.idfall_det_clr = { 0x0118, 5, 5, 0, 1 },
+				.idrise_det_en	= { 0x0110, 4, 4, 0, 1 },
+				.idrise_det_st	= { 0x0114, 4, 4, 0, 1 },
+				.idrise_det_clr = { 0x0118, 4, 4, 0, 1 },
+				.ls_det_en	= { 0x0110, 0, 0, 0, 1 },
+				.ls_det_st	= { 0x0114, 0, 0, 0, 1 },
+				.ls_det_clr	= { 0x0118, 0, 0, 0, 1 },
+				.utmi_avalid	= { 0x0120, 10, 10, 0, 1 },
+				.utmi_bvalid	= { 0x0120, 9, 9, 0, 1 },
+				.utmi_iddig	= { 0x0120, 6, 6, 0, 1 },
+				.utmi_ls	= { 0x0120, 5, 4, 0, 1 },
+				.vbus_det_en	= { 0x001c, 15, 15, 1, 0 },
+			},
+			[USB2PHY_PORT_HOST] = {
+				.phy_sus	= { 0x104, 8, 0, 0, 0x1d1 },
+				.ls_det_en	= { 0x110, 1, 1, 0, 1 },
+				.ls_det_st	= { 0x114, 1, 1, 0, 1 },
+				.ls_det_clr	= { 0x118, 1, 1, 0, 1 },
+				.utmi_ls	= { 0x120, 17, 16, 0, 1 },
+				.utmi_hstdet	= { 0x120, 19, 19, 0, 1 }
+			}
+		},
+		.chg_det = {
+			.opmode		= { 0x0100, 3, 0, 5, 1 },
+			.cp_det		= { 0x0120, 24, 24, 0, 1 },
+			.dcp_det	= { 0x0120, 23, 23, 0, 1 },
+			.dp_det		= { 0x0120, 25, 25, 0, 1 },
+			.idm_sink_en	= { 0x0108, 8, 8, 0, 1 },
+			.idp_sink_en	= { 0x0108, 7, 7, 0, 1 },
+			.idp_src_en	= { 0x0108, 9, 9, 0, 1 },
+			.rdm_pdwn_en	= { 0x0108, 10, 10, 0, 1 },
+			.vdm_src_en	= { 0x0108, 12, 12, 0, 1 },
+			.vdp_src_en	= { 0x0108, 11, 11, 0, 1 },
+		},
+	},
+	{ /* sentinel */ }
+};
+
 static const struct rockchip_usb2phy_cfg rk312x_phy_cfgs[] = {
 	{
 		.reg = 0x17c,
@@ -811,6 +864,7 @@ static const struct rockchip_usb2phy_cfg rv1108_phy_cfgs[] = {
 };
 
 static const struct udevice_id rockchip_usb2phy_ids[] = {
+	{ .compatible = "rockchip,rk1808-usb2phy", .data = (ulong)&rk1808_phy_cfgs },
 	{ .compatible = "rockchip,rk3128-usb2phy", .data = (ulong)&rk312x_phy_cfgs },
 	{ .compatible = "rockchip,rk322x-usb2phy", .data = (ulong)&rk322x_phy_cfgs },
 	{ .compatible = "rockchip,rk3308-usb2phy", .data = (ulong)&rk3328_phy_cfgs },

commit dd620b6350d40eae52002964a989120a897cac62
Author: William Wu <william.wu@rock-chips.com>
Date:   Sat Oct 6 17:52:40 2018 +0800

    rockchip: rk1808: add usb configs
    
    Change-Id: I793c306d3dc0c070b885423a74e5ae02fb307149
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/configs/rk1808_defconfig b/configs/rk1808_defconfig
index 313c93ad8e..eaa285a3e0 100644
--- a/configs/rk1808_defconfig
+++ b/configs/rk1808_defconfig
@@ -14,12 +14,17 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_FASTBOOT_BUF_ADDR=0x00800800
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
 CONFIG_CMD_LOAD_ANDROID=y
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_RKPARM_PARTITION=y
 CONFIG_OF_LIVE=y
@@ -34,6 +39,7 @@ CONFIG_ADC_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
 CONFIG_DM_PMIC=y
@@ -51,3 +57,16 @@ CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x330d
diff --git a/include/configs/rk1808_common.h b/include/configs/rk1808_common.h
index 5e41b20ef0..af189ae03e 100644
--- a/include/configs/rk1808_common.h
+++ b/include/configs/rk1808_common.h
@@ -32,8 +32,8 @@
 
 #ifndef CONFIG_SPL_BUILD
 /* usb mass storage */
-/* #define CONFIG_USB_FUNCTION_MASS_STORAGE */
-/* #define CONFIG_ROCKUSB_G_DNL_PID        0x330d */
+#define CONFIG_USB_FUNCTION_MASS_STORAGE
+#define CONFIG_ROCKUSB_G_DNL_PID	0x330d
 
 #define ENV_MEM_LAYOUT_SETTINGS \
 	"scriptaddr=0x00500000\0" \

commit 706cec90612bdd2ec6ae91736fdd447744e06620
Author: William Wu <william.wu@rock-chips.com>
Date:   Sat Oct 6 17:54:15 2018 +0800

    rockchip: rk1808: add dwc3 board init
    
    Change-Id: I52953d7d1b84b4841d494c68bb79074b394811ca
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/board/rockchip/evb_rk1808/evb_rk1808.c b/board/rockchip/evb_rk1808/evb_rk1808.c
index 3a69da06e1..1a8054f7af 100644
--- a/board/rockchip/evb_rk1808/evb_rk1808.c
+++ b/board/rockchip/evb_rk1808/evb_rk1808.c
@@ -5,5 +5,29 @@
  */
 
 #include <common.h>
+#include <dwc3-uboot.h>
+#include <usb.h>
 
 DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_USB_DWC3
+static struct dwc3_device dwc3_device_data = {
+	.maximum_speed = USB_SPEED_HIGH,
+	.base = 0xfd000000,
+	.dr_mode = USB_DR_MODE_PERIPHERAL,
+	.index = 0,
+	.dis_u2_susphy_quirk = 1,
+	.usb2_phyif_utmi_width = 16,
+};
+
+int usb_gadget_handle_interrupts(void)
+{
+	dwc3_uboot_handle_interrupt(0);
+	return 0;
+}
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+	return dwc3_uboot_init(&dwc3_device_data);
+}
+#endif

commit a12af6273a52ef6e201e1b684ac51d760d7ca27d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Oct 6 20:37:30 2018 +0800

    rockchip: dts: rk1808: add adc recovery key support
    
    Change-Id: Ia5b0a49675baba2c4e27b785c1c80dc8f6dc6eeb
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk1808-evb.dts b/arch/arm/dts/rk1808-evb.dts
index 116a64e5c2..11f750512f 100644
--- a/arch/arm/dts/rk1808-evb.dts
+++ b/arch/arm/dts/rk1808-evb.dts
@@ -24,6 +24,21 @@
 		clock-frequency = <24000000>;
 		clock-output-names = "xin24m";
 	};
+
+	adc-keys {
+		u-boot,dm-pre-reloc;
+		compatible = "adc-keys";
+		io-channels = <&saradc 2>;
+		io-channel-names = "buttons";
+		keyup-threshold-microvolt = <1800000>;
+
+		vol-up-key {
+			u-boot,dm-pre-reloc;
+			linux,code = <KEY_VOLUMEUP>;
+			label = "volume up";
+			press-threshold-microvolt = <10000>;
+		};
+	};
 };
 
 &emmc {
diff --git a/arch/arm/dts/rk1808-u-boot.dtsi b/arch/arm/dts/rk1808-u-boot.dtsi
index a52e9d45f3..068f9c75c8 100644
--- a/arch/arm/dts/rk1808-u-boot.dtsi
+++ b/arch/arm/dts/rk1808-u-boot.dtsi
@@ -34,3 +34,8 @@
 &uart2 {
 	u-boot,dm-pre-reloc;
 };
+
+&saradc {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
\ No newline at end of file
diff --git a/arch/arm/dts/rk1808.dtsi b/arch/arm/dts/rk1808.dtsi
index 551058fc4b..8ede0da498 100644
--- a/arch/arm/dts/rk1808.dtsi
+++ b/arch/arm/dts/rk1808.dtsi
@@ -1013,6 +1013,18 @@
 		status = "disabled";
 	};
 
+	saradc: saradc@ff3c0000 {
+		compatible = "rockchip,rk1808-saradc", "rockchip,rk3399-saradc";
+		reg = <0x0 0xff3c0000 0x0 0x100>;
+		interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
+		#io-channel-cells = <1>;
+		clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
+		clock-names = "saradc", "apb_pclk";
+		resets = <&cru SRST_SARADC_P>;
+		reset-names = "saradc-apb";
+		status = "disabled";
+	};
+
 	sdmmc: dwmmc@ffcf0000 {
 		compatible = "rockchip,rk1808-dw-mshc", "rockchip,rk3288-dw-mshc";
 		reg = <0x0 0xffcf0000 0x0 0x4000>;

commit 48898c50116ec39dde58a8c12d42c7dfc6165e3d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Sep 29 08:37:16 2018 +0800

    rockchip: resource: print fdt from which partition
    
    it's mainly for debug.
    
    Change-Id: I4627c8a3f636ac226bcb2d7ac7d0b60a1019b038
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index bb93c758c1..4ecf549961 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -164,6 +164,7 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 	int resource_found = 0;
 	struct blk_desc *dev_desc;
 	disk_partition_t part_info;
+	char *boot_partname = PART_BOOT;
 
 /*
  * Primary detect AOSP format image, try to get resource image from
@@ -172,7 +173,6 @@ static int init_resource_list(struct resource_img_hdr *hdr)
  */
 #ifdef CONFIG_ANDROID_BOOT_IMAGE
 	struct andr_img_hdr *andr_hdr;
-	char *boot_partname = PART_BOOT;
 #endif
 
 	if (hdr) {
@@ -255,7 +255,8 @@ next:
 	if (!resource_found) {
 		debug("%s: Load resource from resource part\n", __func__);
 		/* Read resource from Rockchip Resource partition */
-		ret = part_get_info_by_name(dev_desc, PART_RESOURCE, &part_info);
+		boot_partname = PART_RESOURCE;
+		ret = part_get_info_by_name(dev_desc, boot_partname, &part_info);
 		if (ret < 0) {
 			printf("%s: failed to get resource part, ret=%d\n",
 			       __func__, ret);
@@ -298,6 +299,7 @@ next:
 		add_file_to_list(entry, offset);
 	}
 
+	printf("Load FDT from %s part\n", boot_partname);
 err:
 	free(content);
 out:

commit 16e939f9051e6f0146dc30e4556ac0a81d7adff6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Sep 28 16:21:32 2018 +0800

    rockchip: dtsi: rk1808: sync from kernel
    
    base on commit dabd2ea:
    (arm64: dts: rockchip: fix mapping address for rk1808 pmugrf)
    
    Change-Id: I6536c03fc2c90ddf1dd8eeb626b7d03f33fdbcc9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk1808.dtsi b/arch/arm/dts/rk1808.dtsi
index ec59306083..551058fc4b 100644
--- a/arch/arm/dts/rk1808.dtsi
+++ b/arch/arm/dts/rk1808.dtsi
@@ -5,6 +5,7 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/power/rk1808-power.h>
 
 / {
 	compatible = "rockchip,rk1808";
@@ -20,7 +21,14 @@
 		i2c3 = &i2c3;
 		i2c4 = &i2c4;
 		i2c5 = &i2c5;
+		serial0 = &uart0;
+		serial1 = &uart1;
 		serial2 = &uart2;
+		serial3 = &uart3;
+		serial4 = &uart4;
+		serial5 = &uart5;
+		serial6 = &uart6;
+		serial7 = &uart7;
 		spi0 = &spi0;
 		spi1 = &spi1;
 		spi2 = &spi2;
@@ -52,6 +60,10 @@
 		interrupt-affinity = <&cpu0>, <&cpu1>;
 	};
 
+	dmc: dmc {
+		compatible = "rockchip,rk1808-dmc";
+	};
+
 	gmac_clkin: external-gmac-clock {
 		compatible = "fixed-clock";
 		clock-frequency = <125000000>;
@@ -82,18 +94,172 @@
 		#clock-cells = <0>;
 	};
 
+	usbdrd3: usb {
+		compatible = "rockchip,rk1808-dwc3";
+		clocks = <&cru SCLK_USB3_OTG0_REF>, <&cru ACLK_USB3OTG>,
+			 <&cru SCLK_USB3_OTG0_SUSPEND>;
+		clock-names = "ref_clk", "bus_clk",
+			      "suspend_clk";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+		status = "disabled";
+
+		usbdrd_dwc3: dwc3@fd000000 {
+			compatible = "snps,dwc3";
+			reg = <0x0 0xfd000000 0x0 0x200000>;
+			interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+			dr_mode = "otg";
+			phys = <&u2phy_otg>;
+			phy-names = "usb2-phy";
+			phy_type = "utmi_wide";
+			snps,dis_enblslpm_quirk;
+			snps,dis-u2-freeclk-exists-quirk;
+			snps,dis_u2_susphy_quirk;
+			snps,dis-del-phy-power-chg-quirk;
+			snps,tx-ipgap-linecheck-dis-quirk;
+			status = "disabled";
+		};
+	};
+
 	grf: syscon@fe000000 {
 		compatible = "rockchip,rk1808-grf", "syscon", "simple-mfd";
 		reg = <0x0 0xfe000000 0x0 0x1000>;
 		#address-cells = <1>;
 		#size-cells = <1>;
+
+		io_domains: io-domains {
+			compatible = "rockchip,rk1808-io-voltage-domain";
+			status = "disabled";
+		};
+
+		rgb: rgb {
+			compatible = "rockchip,rk1808-rgb";
+			status = "disabled";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+
+					rgb_in_vop_lite: endpoint {
+						remote-endpoint = <&vop_lite_out_rgb>;
+					};
+				};
+			};
+		};
+	};
+
+	usb2phy_grf: syscon@fe010000 {
+		compatible = "rockchip,rk1808-usb2phy-grf", "syscon",
+			     "simple-mfd";
+		reg = <0x0 0xfe010000 0x0 0x8000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		u2phy: usb2-phy@100 {
+			compatible = "rockchip,rk1808-usb2phy";
+			reg = <0x100 0x10>;
+			clocks = <&cru SCLK_USBPHY_REF>;
+			clock-names = "phyclk";
+			#clock-cells = <0>;
+			assigned-clocks = <&cru USB480M>;
+			assigned-clock-parents = <&u2phy>;
+			clock-output-names = "usb480m_phy";
+			status = "disabled";
+
+			u2phy_host: host-port {
+				#phy-cells = <0>;
+				interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+				interrupt-names = "linestate";
+				status = "disabled";
+			};
+
+			u2phy_otg: otg-port {
+				#phy-cells = <0>;
+				interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>,
+					     <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>,
+					     <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
+				interrupt-names = "otg-bvalid", "otg-id",
+						  "linestate";
+				status = "disabled";
+			};
+		};
 	};
 
-	pmugrf: syscon@fe410000 {
+	pmugrf: syscon@fe020000 {
 		compatible = "rockchip,rk1808-pmugrf", "syscon", "simple-mfd";
-		reg = <0x0 0xfe410000 0x0 0x1000>;
+		reg = <0x0 0xfe020000 0x0 0x1000>;
 		#address-cells = <1>;
 		#size-cells = <1>;
+
+		pmu_io_domains: io-domains {
+			compatible = "rockchip,rk1808-pmu-io-voltage-domain";
+			status = "disabled";
+		};
+	};
+
+	qos_npu: qos@fe850000 {
+		compatible = "syscon";
+		reg = <0x0 0xfe850000 0x0 0x20>;
+	};
+
+	qos_pcie: qos@fe880000 {
+		compatible = "syscon";
+		reg = <0x0 0xfe880000 0x0 0x20>;
+	};
+
+	qos_isp: qos@fe8a0000 {
+		compatible = "syscon";
+		reg = <0x0 0xfe8a0000 0x0 0x20>;
+	};
+
+	qos_rga_rd: qos@fe8a0080 {
+		compatible = "syscon";
+		reg = <0x0 0xfe8a0080 0x0 0x20>;
+	};
+
+	qos_rga_wr: qos@fe8a0100 {
+		compatible = "syscon";
+		reg = <0x0 0xfe8a0100 0x0 0x20>;
+	};
+
+	qos_vip: qos@fe8a0180 {
+		compatible = "syscon";
+		reg = <0x0 0xfe8a0180 0x0 0x20>;
+	};
+
+	qos_vop_dma: qos@fe8b0000 {
+		compatible = "syscon";
+		reg = <0x0 0xfe8b0000 0x0 0x20>;
+	};
+
+	qos_vop_lite: qos@fe8b0080 {
+		compatible = "syscon";
+		reg = <0x0 0xfe8b0080 0x0 0x20>;
+	};
+
+	qos_vpu: qos@fe8cc000 {
+		compatible = "syscon";
+		reg = <0x0 0xfe8c000 0x0 0x20>;
+	};
+
+	sram: sram@fec00000 {
+		compatible = "mmio-sram";
+		reg = <0x0 0xfec00000 0x0 0x200000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0x0 0xfec00000 0x200000>;
+		/* reserved for ddr dvfs and system suspend/resume */
+		ddr-sram@0 {
+			reg = <0x0 0x8000>;
+		};
+		/* reserved for vad audio buffer */
+		vad_sram: vad-sram@1c0000 {
+			reg = <0x1c0000 0x40000>;
+		};
 	};
 
 	gic: interrupt-controller@ff100000 {
@@ -117,10 +283,6 @@
 		};
 	};
 
-	dmc: dmc {
-		compatible = "rockchip,rk1808-dmc";
-	};
-
 	cru: clock-controller@ff350000 {
 		compatible = "rockchip,rk1808-cru";
 		reg = <0x0 0xff350000 0x0 0x5000>;
@@ -142,6 +304,20 @@
 			<100000000>;
 	};
 
+	mipi_dphy: mipi-dphy@ff370000 {
+		compatible = "rockchip,rk1808-mipi-dphy";
+		reg = <0x0 0xff370000 0x0 0x500>;
+		clocks = <&cru SCLK_MIPIDSIPHY_REF>, <&cru PCLK_MIPIDSIPHY>;
+		clock-names = "ref", "pclk";
+		clock-output-names = "mipi_dphy_pll";
+		#clock-cells = <0>;
+		resets = <&cru SRST_MIPIDSIPHY_P>;
+		reset-names = "apb";
+		#phy-cells = <0>;
+		rockchip,grf = <&grf>;
+		status = "disabled";
+	};
+
 	tsadc: tsadc@ff3a0000 {
 		compatible = "rockchip,rk1808-tsadc";
 		reg = <0x0 0xff3a0000 0x0 0x100>;
@@ -246,6 +422,70 @@
 		status = "disabled";
 	};
 
+	pmu: power-management@ff3e0000 {
+		compatible = "rockchip,rk1808-pmu", "syscon", "simple-mfd";
+		reg = <0x0 0xff3e0000 0x0 0x1000>;
+
+		power: power-controller {
+			compatible = "rockchip,rk1808-power-controller";
+			#power-domain-cells = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+
+			/* These power domains are grouped by VD_NPU */
+			pd_npu@RK1808_VD_NPU {
+				reg = <RK1808_VD_NPU>;
+				clocks = <&cru SCLK_NPU>,
+					 <&cru ACLK_NPU>,
+					 <&cru HCLK_NPU>;
+				pm_qos = <&qos_npu>;
+			};
+
+			/* These power domains are grouped by VD_LOGIC */
+			pd_pcie@RK1808_PD_PCIE {
+				reg = <RK1808_PD_PCIE>;
+				clocks = <&cru HSCLK_PCIE>,
+					 <&cru LSCLK_PCIE>,
+					 <&cru ACLK_PCIE>,
+					 <&cru ACLK_PCIE_MST>,
+					 <&cru ACLK_PCIE_SLV>,
+					 <&cru PCLK_PCIE>,
+					 <&cru SCLK_PCIE_AUX>;
+				pm_qos = <&qos_pcie>;
+			};
+			pd_vpu@RK1808_PD_VPU {
+				reg = <RK1808_PD_VPU>;
+				clocks = <&cru ACLK_VPU>,
+					 <&cru HCLK_VPU>;
+				pm_qos = <&qos_vpu>;
+			};
+			pd_vio@RK1808_PD_VIO {
+				reg = <RK1808_PD_VIO>;
+				clocks = <&cru HSCLK_VIO>,
+					 <&cru LSCLK_VIO>,
+					 <&cru ACLK_VOPRAW>,
+					 <&cru HCLK_VOPRAW>,
+					 <&cru ACLK_VOPLITE>,
+					 <&cru HCLK_VOPLITE>,
+					 <&cru PCLK_DSI_TX>,
+					 <&cru PCLK_CSI_TX>,
+					 <&cru ACLK_RGA>,
+					 <&cru HCLK_RGA>,
+					 <&cru ACLK_ISP>,
+					 <&cru HCLK_ISP>,
+					 <&cru ACLK_CIF>,
+					 <&cru HCLK_CIF>,
+					 <&cru PCLK_CSI2HOST>,
+					 <&cru DCLK_VOPRAW>,
+					 <&cru DCLK_VOPLITE>;
+				pm_qos = <&qos_rga_rd>, <&qos_rga_wr>,
+					 <&qos_isp>, <&qos_vip>,
+					 <&qos_vop_dma>, <&qos_vop_lite>;
+			};
+		};
+	};
+
 	i2c0: i2c@ff410000 {
 		compatible = "rockchip,rk3399-i2c";
 		reg = <0x0 0xff410000 0x0 0x1000>;
@@ -259,21 +499,29 @@
 		status = "disabled";
 	};
 
-	amba {
-		compatible = "simple-bus";
-		#address-cells = <2>;
-		#size-cells = <2>;
-		ranges;
+	dmac: dmac@ff4e0000 {
+		compatible = "arm,pl330", "arm,primecell";
+		reg = <0x0 0xff4e0000 0x0 0x4000>;
+		interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_DMAC>;
+		clock-names = "apb_pclk";
+		#dma-cells = <1>;
+		peripherals-req-type-burst;
+	};
 
-		dmac: dmac@ff4e0000 {
-			compatible = "arm,pl330", "arm,primecell";
-			reg = <0x0 0xff4e0000 0x0 0x4000>;
-			interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
-			//clocks = <&cru ACLK_DMAC>;
-			//clock-names = "apb_pclk";
-			#dma-cells = <1>;
-			peripherals-req-type-burst;
-		};
+	uart0: serial@ff430000 {
+		compatible = "rockchip,rk1808-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xff430000 0x0 0x100>;
+		interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART0_PMU>, <&cru PCLK_UART0_PMU>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac 0>, <&dmac 1>;
+		dma-names = "tx", "rx";
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
+		status = "disabled";
 	};
 
 	i2c1: i2c@ff500000 {
@@ -373,6 +621,66 @@
 		status = "disabled";
 	};
 
+	uart1: serial@ff540000 {
+		compatible = "rockchip,rk1808-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xff540000 0x0 0x100>;
+		interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac 2>, <&dmac 3>;
+		dma-names = "tx", "rx";
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart1m0_xfer &uart1_cts &uart1_rts>;
+		status = "disabled";
+	};
+
+	uart2: serial@ff550000 {
+		compatible = "rockchip,rk1808-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xff550000 0x0 0x100>;
+		interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac 4>, <&dmac 5>;
+		dma-names = "tx", "rx";
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart2m0_xfer>;
+		status = "disabled";
+	};
+
+	uart3: serial@ff560000 {
+		compatible = "rockchip,rk1808-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xff560000 0x0 0x100>;
+		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac 6>, <&dmac 7>;
+		dma-names = "tx", "rx";
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart3m0_xfer &uart3_ctsm0 &uart3_rtsm0>;
+		status = "disabled";
+	};
+
+	uart4: serial@ff570000 {
+		compatible = "rockchip,rk1808-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xff570000 0x0 0x100>;
+		interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac 8>, <&dmac 9>;
+		dma-names = "tx", "rx";
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart4_xfer &uart4_cts &uart4_rts>;
+		status = "disabled";
+	};
+
 	spi2: spi@ff580000 {
 		compatible = "rockchip,rk1808-spi", "rockchip,rk3066-spi";
 		reg = <0x0 0xff580000 0x0 0x1000>;
@@ -389,12 +697,123 @@
 		status = "disabled";
 	};
 
-	uart2: serial@ff550000 {
+	uart5: serial@ff5a0000 {
 		compatible = "rockchip,rk1808-uart", "snps,dw-apb-uart";
-		reg = <0x0 0xff550000 0x0 0x100>;
-		interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+		reg = <0x0 0xff5a0000 0x0 0x100>;
+		interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART5>, <&cru PCLK_UART5>;
+		clock-names = "baudclk", "apb_pclk";
 		reg-shift = <2>;
 		reg-io-width = <4>;
+		dmas = <&dmac 25>, <&dmac 26>;
+		dma-names = "tx", "rx";
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart5_xfer>;
+		status = "disabled";
+	};
+
+	uart6: serial@ff5b0000 {
+		compatible = "rockchip,rk1808-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xff5b0000 0x0 0x100>;
+		interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART6>, <&cru PCLK_UART6>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac 27>, <&dmac 28>;
+		dma-names = "tx", "rx";
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart6_xfer>;
+		status = "disabled";
+	};
+
+	uart7: serial@ff5c0000 {
+		compatible = "rockchip,rk1808-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xff5c0000 0x0 0x100>;
+		interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART7>, <&cru PCLK_UART7>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac 29>, <&dmac 30>;
+		dma-names = "tx", "rx";
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart7_xfer>;
+		status = "disabled";
+	};
+
+	vop_lite: vop@ffb00000 {
+		compatible = "rockchip,rk1808-vop-lit";
+		reg = <0x0 0xffb00000 0x0 0x200>;
+		reg-names = "regs";
+		interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_VOPLITE>, <&cru DCLK_VOPLITE>,
+			 <&cru HCLK_VOPLITE>;
+		clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
+		power-domains = <&power RK1808_PD_VIO>;
+		iommus = <&vopl_mmu>;
+		status = "disabled";
+
+		vop_lite_out: port {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			vop_lite_out_dsi: endpoint@0 {
+				reg = <0>;
+				remote-endpoint = <&dsi_in_vop_lite>;
+			};
+
+			vop_lite_out_rgb: endpoint@1 {
+				reg = <1>;
+				remote-endpoint = <&rgb_in_vop_lite>;
+			};
+		};
+	};
+
+	vopl_mmu: iommu@ffb00f00 {
+		compatible = "rockchip,iommu";
+		reg = <0x0 0xffb00f00 0x0 0x100>;
+		interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "vopl_mmu";
+		clocks = <&cru ACLK_VOPLITE>, <&cru HCLK_VOPLITE>;
+		clock-names = "aclk", "hclk";
+		power-domains = <&power RK1808_PD_VIO>;
+		#iommu-cells = <0>;
+		status = "disabled";
+	};
+
+	vop_raw: vop@ffb40000 {
+		compatible = "rockchip,rk1808-vop-raw";
+		reg = <0x0 0xffb40000 0x0 0x500>;
+		reg-names = "regs";
+		interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_VOPRAW>, <&cru DCLK_VOPRAW>,
+			 <&cru HCLK_VOPRAW>;
+		clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
+		power-domains = <&power RK1808_PD_VIO>;
+		iommus = <&vopr_mmu>;
+		status = "disabled";
+
+		vop_raw_out: port {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			vop_raw_out_csi: endpoint@0 {
+				reg = <0>;
+				remote-endpoint = <&csi_in_vop_raw>;
+			};
+		};
+	};
+
+	vopr_mmu: iommu@ffb40f00 {
+		compatible = "rockchip,iommu";
+		reg = <0x0 0xffb40f00 0x0 0x100>;
+		interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "vopr_mmu";
+		clocks = <&cru ACLK_VOPRAW>, <&cru HCLK_VOPRAW>;
+		clock-names = "aclk", "hclk";
+		power-domains = <&power RK1808_PD_VIO>;
+		#iommu-cells = <0>;
 		status = "disabled";
 	};
 
@@ -442,6 +861,158 @@
 		status = "disabled";
 	};
 
+	i2s0: i2s@ff7e0000 {
+		compatible = "rockchip,rk1808-i2s-tdm";
+		reg = <0x0 0xff7e0000 0x0 0x1000>;
+		interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_I2S0_8CH_TX>, <&cru SCLK_I2S0_8CH_RX>, <&cru HCLK_I2S0_8CH>;
+		clock-names = "mclk_tx", "mclk_rx", "hclk";
+		dmas = <&dmac 16>, <&dmac 17>;
+		dma-names = "tx", "rx";
+		resets = <&cru SRST_I2S0_TX>, <&cru SRST_I2S0_RX>;
+		reset-names = "tx-m", "rx-m";
+		rockchip,cru = <&cru>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2s0_8ch_sclktx
+			     &i2s0_8ch_sclkrx
+			     &i2s0_8ch_lrcktx
+			     &i2s0_8ch_lrckrx
+			     &i2s0_8ch_sdi0
+			     &i2s0_8ch_sdi1
+			     &i2s0_8ch_sdi2
+			     &i2s0_8ch_sdi3
+			     &i2s0_8ch_sdo0
+			     &i2s0_8ch_sdo1
+			     &i2s0_8ch_sdo2
+			     &i2s0_8ch_sdo3
+			     &i2s0_8ch_mclk>;
+		status = "disabled";
+	};
+
+	i2s1: i2s@ff7f0000 {
+		compatible = "rockchip,rk1808-i2s", "rockchip,rk3066-i2s";
+		reg = <0x0 0xff7f0000 0x0 0x1000>;
+		interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_I2S1_2CH>, <&cru HCLK_I2S1_2CH>;
+		clock-names = "i2s_clk", "i2s_hclk";
+		dmas = <&dmac 18>, <&dmac 19>;
+		dma-names = "tx", "rx";
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2s1_2ch_sclk
+			     &i2s1_2ch_lrck
+			     &i2s1_2ch_sdi
+			     &i2s1_2ch_sdo>;
+		status = "disabled";
+	};
+
+	pdm: pdm@ff800000 {
+		compatible = "rockchip,rk1808-pdm", "rockchip,pdm";
+		reg = <0x0 0xff800000 0x0 0x1000>;
+		clocks = <&cru SCLK_PDM>, <&cru HCLK_PDM>;
+		clock-names = "pdm_clk", "pdm_hclk";
+		dmas = <&dmac 24>;
+		dma-names = "rx";
+		resets = <&cru SRST_PDM>;
+		reset-names = "pdm-m";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pdm_clk
+			     &pdm_clk1
+			     &pdm_sdi0
+			     &pdm_sdi1
+			     &pdm_sdi2
+			     &pdm_sdi3>;
+		status = "disabled";
+	};
+
+	vad: vad@ff810000 {
+		compatible = "rockchip,rk1808-vad";
+		reg = <0x0 0xff810000 0x0 0x10000>;
+		reg-names = "vad";
+		clocks = <&cru HCLK_VAD>;
+		clock-names = "hclk";
+		interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
+		rockchip,audio-sram = <&vad_sram>;
+		rockchip,audio-src = <0>;
+		rockchip,det-channel = <0>;
+		rockchip,mode = <1>;
+		status = "disabled";
+	};
+
+	csi_tx: csi@ffb20000 {
+		compatible = "rockchip,rk1808-mipi-csi";
+		reg = <0x0 0xffb20000 0x0 0x500>;
+		reg-names = "csi_regs";
+		interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru PCLK_CSI_TX>, <&mipi_dphy>;
+		clock-names = "pclk", "hs_clk";
+		resets = <&cru SRST_CSITX_P>;
+		reset-names = "apb";
+		phys = <&mipi_dphy>;
+		phy-names = "mipi_dphy";
+		power-domains = <&power RK1808_PD_VIO>;
+		rockchip,grf = <&grf>;
+		status = "disabled";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port {
+				csi_in_vop_raw: endpoint {
+					remote-endpoint = <&vop_raw_out_csi>;
+				};
+			};
+		};
+	};
+
+	dsi: dsi@ffb30000 {
+		compatible = "rockchip,rk1808-mipi-dsi";
+		reg = <0x0 0xffb30000 0x0 0x500>;
+		interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru PCLK_DSI_TX>, <&mipi_dphy>;
+		clock-names = "pclk", "hs_clk";
+		resets = <&cru SRST_MIPIDSI_HOST_P>;
+		reset-names = "apb";
+		phys = <&mipi_dphy>;
+		phy-names = "mipi_dphy";
+		power-domains = <&power RK1808_PD_VIO>;
+		rockchip,grf = <&grf>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+
+		ports {
+			port {
+				dsi_in_vop_lite: endpoint {
+					remote-endpoint = <&vop_lite_out_dsi>;
+				};
+			};
+		};
+	};
+
+	sdio: dwmmc@ffc60000 {
+		compatible = "rockchip,rk1808-dw-mshc", "rockchip,rk3288-dw-mshc";
+		reg = <0x0 0xffc60000 0x0 0x4000>;
+		clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
+			 <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
+		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
+		max-frequency = <150000000>;
+		fifo-depth = <0x100>;
+		interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&sdmmc1_clk &sdmmc1_cmd &sdmmc1_bus4>;
+		status = "disabled";
+	};
+
+	npu: npu@ffbc0000 {
+		compatible = "rockchip,npu";
+		reg = <0x0 0xffbc0000 0x0 0x1000>;
+		clocks =  <&cru SCLK_NPU>, <&cru HCLK_NPU>;
+		clock-names = "sclk_npu", "hclk_npu";
+		interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
+		status = "disabled";
+	};
+
 	sdmmc: dwmmc@ffcf0000 {
 		compatible = "rockchip,rk1808-dw-mshc", "rockchip,rk3288-dw-mshc";
 		reg = <0x0 0xffcf0000 0x0 0x4000>;
@@ -468,6 +1039,30 @@
 		status = "disabled";
 	};
 
+	usb_host0_ehci: usb@ffd80000 {
+		compatible = "generic-ehci";
+		reg = <0x0 0xffd80000 0x0 0x10000>;
+		interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_HOST>, <&cru HCLK_HOST_ARB>,
+			 <&u2phy>;
+		clock-names = "usbhost", "arbiter", "utmi";
+		phys = <&u2phy_host>;
+		phy-names = "usb";
+		status = "disabled";
+	};
+
+	usb_host0_ohci: usb@ffd90000 {
+		compatible = "generic-ohci";
+		reg = <0x0 0xffd90000 0x0 0x10000>;
+		interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_HOST>, <&cru HCLK_HOST_ARB>,
+			 <&u2phy>;
+		clock-names = "usbhost", "arbiter", "utmi";
+		phys = <&u2phy_host>;
+		phy-names = "usb";
+		status = "disabled";
+	};
+
 	gmac: ethernet@ffdd0000 {
 		compatible = "rockchip,rk1808-gmac";
 		reg = <0x0 0xffdd0000 0x0 0x10000>;
@@ -642,13 +1237,13 @@
 			emmc_clk: emmc-clk {
 				rockchip,pins =
 					/* emmc_clkout */
-					<1 9 1 &pcfg_pull_none>;
+					<1 RK_PB1 1 &pcfg_pull_none>;
 			};
 
 			emmc_rstnout: emmc-rstnout {
 				rockchip,pins =
 					/* emmc_rstn */
-					<1 11 1 &pcfg_pull_none>;
+					<1 RK_PB3 1 &pcfg_pull_none>;
 			};
 
 			emmc_bus8: emmc-bus8 {
@@ -880,6 +1475,120 @@
 			};
 		};
 
+		lcdc {
+			lcdc_rgb_dclk_pin: lcdc-rgb-dclk-pin {
+				rockchip,pins =
+					/* lcdc_clkm0 */
+					<2 RK_PC6 3 &pcfg_pull_none>;
+			};
+
+			lcdc_rgb_den_pin: lcdc-rgb-den-pin {
+				rockchip,pins =
+					/* lcdc_denm0 */
+					<2 RK_PC7 3 &pcfg_pull_none>;
+			};
+
+			lcdc_rgb_m0_hsync_pin: lcdc-rgb-m0-hsync-pin {
+				rockchip,pins =
+					/* lcdc_hsyncm0 */
+					<2 RK_PB2 3 &pcfg_pull_none>;
+			};
+
+			lcdc_rgb_m0_vsync_pin: lcdc-rgb-m0-vsync-pin {
+				rockchip,pins =
+					/* lcdc_vsyncm0 */
+					<2 RK_PB3 3 &pcfg_pull_none>;
+			};
+
+			lcdc_rgb_m1_hsync_pin: lcdc-rgb-m1-hsync-pin {
+				rockchip,pins =
+					/* lcdc_hsyncm1 */
+					<3 RK_PB2 3 &pcfg_pull_none>;
+			};
+
+			lcdc_rgb_m1_vsync_pin: lcdc-rgb-m1-vsync-pin {
+				rockchip,pins =
+					/* lcdc_vsyncm1 */
+					<3 RK_PB3 3 &pcfg_pull_none>;
+			};
+
+			lcdc_rgb666_data_pins: lcdc-rgb666-data-pins {
+				rockchip,pins =
+					/* lcdc_d0m0 */
+					<2 RK_PA2 3 &pcfg_pull_none>,
+					/* lcdc_d1m0 */
+					<2 RK_PA3 3 &pcfg_pull_none>,
+					/* lcdc_d2m0 */
+					<2 RK_PC2 3 &pcfg_pull_none>,
+					/* lcdc_d3m0 */
+					<2 RK_PC3 3 &pcfg_pull_none>,
+					/* lcdc_d4m0 */
+					<2 RK_PC4 3 &pcfg_pull_none>,
+					/* lcdc_d5m0 */
+					<2 RK_PC5 3 &pcfg_pull_none>,
+					/* lcdc_d6m0 */
+					<2 RK_PA0 3 &pcfg_pull_none>,
+					/* lcdc_d7m0 */
+					<2 RK_PA1 3 &pcfg_pull_none>,
+					/* lcdc_d8 */
+					<3 RK_PC2 1 &pcfg_pull_none>,
+					/* lcdc_d9 */
+					<3 RK_PC3 1 &pcfg_pull_none>,
+					/* lcdc_d10 */
+					<3 RK_PC4 1 &pcfg_pull_none>,
+					/* lcdc_d11 */
+					<3 RK_PC5 1 &pcfg_pull_none>,
+					/* lcdc_d12 */
+					<3 RK_PC6 1 &pcfg_pull_none>,
+					/* lcdc_d13 */
+					<3 RK_PC7 1 &pcfg_pull_none>,
+					/* lcdc_d14 */
+					<3 RK_PD0 1 &pcfg_pull_none>,
+					/* lcdc_d15 */
+					<3 RK_PD1 1 &pcfg_pull_none>,
+					/* lcdc_d16 */
+					<3 RK_PD2 1 &pcfg_pull_none>,
+					/* lcdc_d17 */
+					<3 RK_PD3 1 &pcfg_pull_none>;
+			};
+
+			lcdc_rgb565_data_pins: lcdc-rgb565-data-pins {
+				rockchip,pins =
+					/* lcdc_d0m0 */
+					<2 RK_PA2 3 &pcfg_pull_none>,
+					/* lcdc_d1m0 */
+					<2 RK_PA3 3 &pcfg_pull_none>,
+					/* lcdc_d2m0 */
+					<2 RK_PC2 3 &pcfg_pull_none>,
+					/* lcdc_d3m0 */
+					<2 RK_PC3 3 &pcfg_pull_none>,
+					/* lcdc_d4m0 */
+					<2 RK_PC4 3 &pcfg_pull_none>,
+					/* lcdc_d5m0 */
+					<2 RK_PC5 3 &pcfg_pull_none>,
+					/* lcdc_d6m0 */
+					<2 RK_PA0 3 &pcfg_pull_none>,
+					/* lcdc_d7m0 */
+					<2 RK_PA1 3 &pcfg_pull_none>,
+					/* lcdc_d8 */
+					<3 RK_PC2 1 &pcfg_pull_none>,
+					/* lcdc_d9 */
+					<3 RK_PC3 1 &pcfg_pull_none>,
+					/* lcdc_d10 */
+					<3 RK_PC4 1 &pcfg_pull_none>,
+					/* lcdc_d11 */
+					<3 RK_PC5 1 &pcfg_pull_none>,
+					/* lcdc_d12 */
+					<3 RK_PC6 1 &pcfg_pull_none>,
+					/* lcdc_d13 */
+					<3 RK_PC7 1 &pcfg_pull_none>,
+					/* lcdc_d14 */
+					<3 RK_PD0 1 &pcfg_pull_none>,
+					/* lcdc_d15 */
+					<3 RK_PD1 1 &pcfg_pull_none>;
+			};
+		};
+
 		pciusb {
 			pciusb_pins: pciusb-pins {
 				rockchip,pins =
@@ -1060,7 +1769,7 @@
 
 			sdmmc1_clk: sdmmc1-clk {
 				rockchip,pins =
-					<4 RK_PB1 1 &pcfg_pull_none>;
+					<4 RK_PA7 1 &pcfg_pull_none>;
 			};
 		};
 
@@ -1186,27 +1895,27 @@
 
 			spi1m1_clk_hs: spi1m1-clk-hs {
 				rockchip,pins =
-					<3 RK_PC7 3 &pcfg_pull_none>;
+					<3 RK_PC7 3 &pcfg_pull_up_8ma>;
 			};
 
 			spi1m1_mosi_hs: spi1m1-mosi-hs {
 				rockchip,pins =
-					<3 RK_PD0 3 &pcfg_pull_none>;
+					<3 RK_PD0 3 &pcfg_pull_up_8ma>;
 			};
 
 			spi1m1_csn0_hs: spi1m1-csn0-hs {
 				rockchip,pins =
-					<3 RK_PD1 3 &pcfg_pull_none>;
+					<3 RK_PD1 3 &pcfg_pull_up_8ma>;
 			};
 
 			spi1m1_miso_hs: spi1m1-miso-hs {
 				rockchip,pins =
-					<3 RK_PD2 3 &pcfg_pull_none>;
+					<3 RK_PD2 3 &pcfg_pull_up_8ma>;
 			};
 
 			spi1m1_csn1_hs: spi1m1-csn1-hs {
 				rockchip,pins =
-					<3 RK_PD3 3 &pcfg_pull_none>;
+					<3 RK_PD3 3 &pcfg_pull_up_8ma>;
 			};
 		};
 
@@ -1275,26 +1984,74 @@
 
 			spi2m1_miso_hs: spi2m1-miso-hs {
 				rockchip,pins =
-					<2 RK_PA4 3 &pcfg_pull_none>;
+					<2 RK_PA4 3 &pcfg_pull_up_8ma>;
 			};
 
 			spi2m1_clk_hs: spi2m1-clk-hs {
 				rockchip,pins =
-					<2 RK_PA5 3 &pcfg_pull_none>;
+					<2 RK_PA5 3 &pcfg_pull_up_8ma>;
 			};
 
 			spi2m1_mosi_hs: spi2m1-mosi-hs {
 				rockchip,pins =
-					<2 RK_PA6 3 &pcfg_pull_none>;
+					<2 RK_PA6 3 &pcfg_pull_up_8ma>;
 			};
 
 			spi2m1_csn_hs: spi2m1-csn-hs {
 				rockchip,pins =
-					<2 RK_PA7 3 &pcfg_pull_none>;
+					<2 RK_PA7 3 &pcfg_pull_up_8ma>;
 			};
 		};
 
-		uart2m0 {
+		uart0 {
+			uart0_xfer: uart0-xfer {
+				rockchip,pins =
+					/* uart0_rx */
+					<0 RK_PB3 1 &pcfg_pull_none>,
+					/* uart0_tx */
+					<0 RK_PB2 1 &pcfg_pull_none>;
+			};
+
+			uart0_cts: uart0-cts {
+				rockchip,pins =
+					<0 RK_PB4 1 &pcfg_pull_none>;
+			};
+
+			uart0_rts: uart0-rts {
+				rockchip,pins =
+					<0 RK_PB5 1 &pcfg_pull_none>;
+			};
+		};
+
+		uart1 {
+			uart1m0_xfer: uart1m0-xfer {
+				rockchip,pins =
+					/* uart1_rxm0 */
+					<4 RK_PB0 2 &pcfg_pull_none>,
+					/* uart1_txm0 */
+					<4 RK_PB1 2 &pcfg_pull_none>;
+			};
+
+			uart1m1_xfer: uart1m1-xfer {
+				rockchip,pins =
+					/* uart1_rxm1 */
+					<1 RK_PB4 3 &pcfg_pull_none>,
+					/* uart1_txm1 */
+					<1 RK_PB5 3 &pcfg_pull_none>;
+			};
+
+			uart1_cts: uart1-cts {
+				rockchip,pins =
+					<4 RK_PB2 2 &pcfg_pull_none>;
+			};
+
+			uart1_rts: uart1-rts {
+				rockchip,pins =
+					<4 RK_PB3 2 &pcfg_pull_none>;
+			};
+		};
+
+		uart2 {
 			uart2m0_xfer: uart2m0-xfer {
 				rockchip,pins =
 					/* uart2_rxm0 */
@@ -1302,9 +2059,7 @@
 					/* uart2_txm0 */
 					<4 RK_PA2 2 &pcfg_pull_none>;
 			};
-		};
 
-		uart2m1 {
 			uart2m1_xfer: uart2m1-xfer {
 				rockchip,pins =
 					/* uart2_rxm1 */
@@ -1312,9 +2067,7 @@
 					/* uart2_txm1 */
 					<2 RK_PD0 2 &pcfg_pull_none>;
 			};
-		};
 
-		uart2m2 {
 			uart2m2_xfer: uart2m2-xfer {
 				rockchip,pins =
 					/* uart2_rxm2 */
@@ -1323,6 +2076,77 @@
 					<3 RK_PA3 2 &pcfg_pull_none>;
 			};
 		};
+
+		uart3 {
+			uart3m0_xfer: uart3m0-xfer {
+				rockchip,pins =
+					/* uart3_rxm0 */
+					<0 RK_PC5 2 &pcfg_pull_none>,
+					/* uart3_txm0 */
+					<0 RK_PC4 2 &pcfg_pull_none>;
+			};
+
+			uart3_ctsm0: uart3-ctsm0 {
+				rockchip,pins =
+					<0 RK_PC7 2 &pcfg_pull_none>;
+			};
+
+			uart3_rtsm0: uart3-rtsm0 {
+				rockchip,pins =
+					<0 RK_PD0 2 &pcfg_pull_none>;
+			};
+		};
+
+		uart4 {
+			uart4_xfer: uart4-xfer {
+				rockchip,pins =
+					/* uart4_rx */
+					<4 RK_PB4 1 &pcfg_pull_none>,
+					/* uart4_tx */
+					<4 RK_PB5 1 &pcfg_pull_none>;
+			};
+
+			uart4_cts: uart4-cts {
+				rockchip,pins =
+					<4 RK_PB6 1 &pcfg_pull_none>;
+			};
+
+			uart4_rts: uart4-rts {
+				rockchip,pins =
+					<4 RK_PB7 1 &pcfg_pull_none>;
+			};
+		};
+
+		uart5 {
+			uart5_xfer: uart5-xfer {
+				rockchip,pins =
+					/* uart5_rx */
+					<3 RK_PC3 1 &pcfg_pull_none>,
+					/* uart5_tx */
+					<3 RK_PC2 1 &pcfg_pull_none>;
+			};
+		};
+
+		uart6 {
+			uart6_xfer: uart6-xfer {
+				rockchip,pins =
+					/* uart6_rx */
+					<3 RK_PC5 1 &pcfg_pull_none>,
+					/* uart6_tx */
+					<3 RK_PC4 1 &pcfg_pull_none>;
+			};
+		};
+
+		uart7 {
+			uart7_xfer: uart7-xfer {
+				rockchip,pins =
+					/* uart7_rx */
+					<3 RK_PC7 1 &pcfg_pull_none>,
+					/* uart7_tx */
+					<3 RK_PC6 1 &pcfg_pull_none>;
+			};
+		};
+
 		tsadc {
 			tsadc_otp_gpio: tsadc-otp-gpio {
 				rockchip,pins =
diff --git a/include/dt-bindings/clock/rk1808-cru.h b/include/dt-bindings/clock/rk1808-cru.h
index 79938f7388..91a71dd0a1 100644
--- a/include/dt-bindings/clock/rk1808-cru.h
+++ b/include/dt-bindings/clock/rk1808-cru.h
@@ -137,8 +137,10 @@
 #define HSCLK_BUS_PRE		171
 #define ACLK_CRYPTO		172
 #define ACLK_DCF		173
+#define ACLK_DMAC		174
 
 /* hclk gates */
+#define HCLK_NPU		199
 #define HCLK_VPU		200
 #define LSCLK_VIO		201
 #define HCLK_VOPRAW		202
@@ -159,9 +161,10 @@
 #define HCLK_VAD		216
 #define HCLK_PDM		217
 #define HCLK_I2S0_8CH		218
-#define HCLK_I2S1_8CH		219
+#define HCLK_I2S1_2CH		219
 #define MSCLK_CORE_NIU		220
 #define HSCLK_IMEM		221
+#define HCLK_HOST_ARB		222
 
 /* pclk gates */
 #define PCLK_DDR		250
@@ -208,7 +211,8 @@
 #define PCLK_GPIO0_PMU		292
 #define PCLK_UART0_PMU		293
 #define PCLK_I2C0_PMU		294
-#define PCLK_PMU_PRE		295
+#define PCLK_USB3PHY_PIPE	295
+#define PCLK_PMU_PRE		296
 
 #define CLK_NR_CLKS		(PCLK_PMU_PRE + 1)
 
diff --git a/include/dt-bindings/power/rk1808-power.h b/include/dt-bindings/power/rk1808-power.h
new file mode 100644
index 0000000000..32342c1e7d
--- /dev/null
+++ b/include/dt-bindings/power/rk1808-power.h
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __DT_BINDINGS_POWER_RK1808_POWER_H__
+#define __DT_BINDINGS_POWER_RK1808_POWER_H__
+
+/* VD_CORE */
+#define RK1808_PD_A35_0		0
+#define RK1808_PD_A35_1		1
+#define RK1808_PD_SCU		2
+#define RK1808_VD_CORE          3
+
+/* VD_NPU */
+#define RK1808_VD_NPU           4
+
+/* VD_LOGIC */
+#define RK1808_PD_DDR           5
+#define RK1808_PD_PCIE		6
+#define RK1808_PD_VPU		7
+#define RK1808_PD_VIO		8
+
+#endif

commit aa8c29873310a700f4ce82e56acf578b4fb49184
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Wed Sep 12 09:49:28 2018 +0800

    clk: rockchip: mmc: add mmc set and get phase
    
    add mmc set and get phase for rk3128\rk3328\rk3368
    
    Change-Id: Ic8d7764391165f28c54721c4af218f8623b2f3a7
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c
index 312f9d26d2..e4064b8363 100644
--- a/drivers/clk/rockchip/clk_rk3128.c
+++ b/drivers/clk/rockchip/clk_rk3128.c
@@ -588,9 +588,140 @@ static ulong rk3128_clk_set_rate(struct clk *clk, ulong rate)
 	return ret;
 }
 
+#define ROCKCHIP_MMC_DELAY_SEL		BIT(10)
+#define ROCKCHIP_MMC_DEGREE_MASK	0x3
+#define ROCKCHIP_MMC_DELAYNUM_OFFSET	2
+#define ROCKCHIP_MMC_DELAYNUM_MASK	(0xff << ROCKCHIP_MMC_DELAYNUM_OFFSET)
+
+#define PSECS_PER_SEC 1000000000000LL
+/*
+ * Each fine delay is between 44ps-77ps. Assume each fine delay is 60ps to
+ * simplify calculations. So 45degs could be anywhere between 33deg and 57.8deg.
+ */
+#define ROCKCHIP_MMC_DELAY_ELEMENT_PSEC 60
+
+int rk3128_mmc_get_phase(struct clk *clk)
+{
+	struct rk3128_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3128_cru *cru = priv->cru;
+	u32 raw_value, delay_num;
+	u16 degrees = 0;
+	ulong rate;
+
+	rate = rk3128_clk_get_rate(clk);
+
+	if (rate < 0)
+		return rate;
+
+	if (clk->id == SCLK_EMMC_SAMPLE)
+		raw_value = readl(&cru->cru_emmc_con[1]);
+	else if (clk->id == SCLK_SDMMC_SAMPLE)
+		raw_value = readl(&cru->cru_sdmmc_con[1]);
+	else
+		raw_value = readl(&cru->cru_sdio_con[1]);
+
+	raw_value >>= 1;
+	degrees = (raw_value & ROCKCHIP_MMC_DEGREE_MASK) * 90;
+
+	if (raw_value & ROCKCHIP_MMC_DELAY_SEL) {
+		/* degrees/delaynum * 10000 */
+		unsigned long factor = (ROCKCHIP_MMC_DELAY_ELEMENT_PSEC / 10) *
+					36 * (rate / 1000000);
+
+		delay_num = (raw_value & ROCKCHIP_MMC_DELAYNUM_MASK);
+		delay_num >>= ROCKCHIP_MMC_DELAYNUM_OFFSET;
+		degrees += DIV_ROUND_CLOSEST(delay_num * factor, 10000);
+	}
+
+	return degrees % 360;
+}
+
+int rk3128_mmc_set_phase(struct clk *clk, u32 degrees)
+{
+	struct rk3128_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3128_cru *cru = priv->cru;
+	u8 nineties, remainder, delay_num;
+	u32 raw_value, delay;
+	ulong rate;
+
+	rate = rk3128_clk_get_rate(clk);
+
+	if (rate < 0)
+		return rate;
+
+	nineties = degrees / 90;
+	remainder = (degrees % 90);
+
+	/*
+	 * Convert to delay; do a little extra work to make sure we
+	 * don't overflow 32-bit / 64-bit numbers.
+	 */
+	delay = 10000000; /* PSECS_PER_SEC / 10000 / 10 */
+	delay *= remainder;
+	delay = DIV_ROUND_CLOSEST(delay, (rate / 1000) * 36 *
+				(ROCKCHIP_MMC_DELAY_ELEMENT_PSEC / 10));
+
+	delay_num = (u8)min_t(u32, delay, 255);
+
+	raw_value = delay_num ? ROCKCHIP_MMC_DELAY_SEL : 0;
+	raw_value |= delay_num << ROCKCHIP_MMC_DELAYNUM_OFFSET;
+	raw_value |= nineties;
+
+	raw_value <<= 1;
+	if (clk->id == SCLK_EMMC_SAMPLE)
+		writel(raw_value | 0xffff0000, &cru->cru_emmc_con[1]);
+	else if (clk->id == SCLK_SDMMC_SAMPLE)
+		writel(raw_value | 0xffff0000, &cru->cru_sdmmc_con[1]);
+	else
+		writel(raw_value | 0xffff0000, &cru->cru_sdio_con[1]);
+
+	debug("mmc set_phase(%d) delay_nums=%u reg=%#x actual_degrees=%d\n",
+	      degrees, delay_num, raw_value, rk3128_mmc_get_phase(clk));
+
+	return 0;
+}
+
+static int rk3128_clk_get_phase(struct clk *clk)
+{
+	int ret;
+
+	debug("%s %ld\n", __func__, clk->id);
+	switch (clk->id) {
+	case SCLK_EMMC_SAMPLE:
+	case SCLK_SDMMC_SAMPLE:
+	case SCLK_SDIO_SAMPLE:
+		ret = rk3128_mmc_get_phase(clk);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+}
+
+static int rk3128_clk_set_phase(struct clk *clk, int degrees)
+{
+	int ret;
+
+	debug("%s %ld\n", __func__, clk->id);
+	switch (clk->id) {
+	case SCLK_EMMC_SAMPLE:
+	case SCLK_SDMMC_SAMPLE:
+	case SCLK_SDIO_SAMPLE:
+		ret = rk3128_mmc_set_phase(clk, degrees);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+}
+
 static struct clk_ops rk3128_clk_ops = {
 	.get_rate	= rk3128_clk_get_rate,
 	.set_rate	= rk3128_clk_set_rate,
+	.get_phase	= rk3128_clk_get_phase,
+	.set_phase	= rk3128_clk_set_phase,
 };
 
 static int rk3128_clk_ofdata_to_platdata(struct udevice *dev)
diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c
index 8c27f99b43..fec75dbd5d 100644
--- a/drivers/clk/rockchip/clk_rk3328.c
+++ b/drivers/clk/rockchip/clk_rk3328.c
@@ -965,10 +965,141 @@ static int rk3328_clk_set_parent(struct clk *clk, struct clk *parent)
 	return -ENOENT;
 }
 
+#define ROCKCHIP_MMC_DELAY_SEL		BIT(10)
+#define ROCKCHIP_MMC_DEGREE_MASK	0x3
+#define ROCKCHIP_MMC_DELAYNUM_OFFSET	2
+#define ROCKCHIP_MMC_DELAYNUM_MASK	(0xff << ROCKCHIP_MMC_DELAYNUM_OFFSET)
+
+#define PSECS_PER_SEC 1000000000000LL
+/*
+ * Each fine delay is between 44ps-77ps. Assume each fine delay is 60ps to
+ * simplify calculations. So 45degs could be anywhere between 33deg and 57.8deg.
+ */
+#define ROCKCHIP_MMC_DELAY_ELEMENT_PSEC 60
+
+int rk3328_mmc_get_phase(struct clk *clk)
+{
+	struct rk3328_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3328_cru *cru = priv->cru;
+	u32 raw_value, delay_num;
+	u16 degrees = 0;
+	ulong rate;
+
+	rate = rk3328_clk_get_rate(clk);
+
+	if (rate < 0)
+		return rate;
+
+	if (clk->id == SCLK_EMMC_SAMPLE)
+		raw_value = readl(&cru->emmc_con[1]);
+	else if (clk->id == SCLK_SDMMC_SAMPLE)
+		raw_value = readl(&cru->sdmmc_con[1]);
+	else
+		raw_value = readl(&cru->sdio_con[1]);
+
+	raw_value >>= 1;
+	degrees = (raw_value & ROCKCHIP_MMC_DEGREE_MASK) * 90;
+
+	if (raw_value & ROCKCHIP_MMC_DELAY_SEL) {
+		/* degrees/delaynum * 10000 */
+		unsigned long factor = (ROCKCHIP_MMC_DELAY_ELEMENT_PSEC / 10) *
+					36 * (rate / 1000000);
+
+		delay_num = (raw_value & ROCKCHIP_MMC_DELAYNUM_MASK);
+		delay_num >>= ROCKCHIP_MMC_DELAYNUM_OFFSET;
+		degrees += DIV_ROUND_CLOSEST(delay_num * factor, 10000);
+	}
+
+	return degrees % 360;
+}
+
+int rk3328_mmc_set_phase(struct clk *clk, u32 degrees)
+{
+	struct rk3328_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3328_cru *cru = priv->cru;
+	u8 nineties, remainder, delay_num;
+	u32 raw_value, delay;
+	ulong rate;
+
+	rate = rk3328_clk_get_rate(clk);
+
+	if (rate < 0)
+		return rate;
+
+	nineties = degrees / 90;
+	remainder = (degrees % 90);
+
+	/*
+	 * Convert to delay; do a little extra work to make sure we
+	 * don't overflow 32-bit / 64-bit numbers.
+	 */
+	delay = 10000000; /* PSECS_PER_SEC / 10000 / 10 */
+	delay *= remainder;
+	delay = DIV_ROUND_CLOSEST(delay, (rate / 1000) * 36 *
+				(ROCKCHIP_MMC_DELAY_ELEMENT_PSEC / 10));
+
+	delay_num = (u8)min_t(u32, delay, 255);
+
+	raw_value = delay_num ? ROCKCHIP_MMC_DELAY_SEL : 0;
+	raw_value |= delay_num << ROCKCHIP_MMC_DELAYNUM_OFFSET;
+	raw_value |= nineties;
+
+	raw_value <<= 1;
+	if (clk->id == SCLK_EMMC_SAMPLE)
+		writel(raw_value | 0xffff0000, &cru->emmc_con[1]);
+	else if (clk->id == SCLK_SDMMC_SAMPLE)
+		writel(raw_value | 0xffff0000, &cru->sdmmc_con[1]);
+	else
+		writel(raw_value | 0xffff0000, &cru->sdio_con[1]);
+
+	debug("mmc set_phase(%d) delay_nums=%u reg=%#x actual_degrees=%d\n",
+	      degrees, delay_num, raw_value, rk3328_mmc_get_phase(clk));
+
+	return 0;
+}
+
+static int rk3328_clk_get_phase(struct clk *clk)
+{
+	int ret;
+
+	debug("%s %ld\n", __func__, clk->id);
+	switch (clk->id) {
+	case SCLK_EMMC_SAMPLE:
+	case SCLK_SDMMC_SAMPLE:
+	case SCLK_SDIO_SAMPLE:
+		ret = rk3328_mmc_get_phase(clk);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+}
+
+static int rk3328_clk_set_phase(struct clk *clk, int degrees)
+{
+	int ret;
+
+	debug("%s %ld\n", __func__, clk->id);
+	switch (clk->id) {
+	case SCLK_EMMC_SAMPLE:
+	case SCLK_SDMMC_SAMPLE:
+	case SCLK_SDIO_SAMPLE:
+		ret = rk3328_mmc_set_phase(clk, degrees);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+}
+
 static struct clk_ops rk3328_clk_ops = {
 	.get_rate = rk3328_clk_get_rate,
 	.set_rate = rk3328_clk_set_rate,
 	.set_parent = rk3328_clk_set_parent,
+	.get_phase = rk3328_clk_get_phase,
+	.set_phase = rk3328_clk_set_phase,
 };
 
 static void rkclk_init(struct rk3328_clk_priv *priv)
diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c
index 9446c9f8b1..99cd7a6796 100644
--- a/drivers/clk/rockchip/clk_rk3368.c
+++ b/drivers/clk/rockchip/clk_rk3368.c
@@ -1020,9 +1020,140 @@ static int __maybe_unused rk3368_clk_set_parent(struct clk *clk, struct clk *par
 	return -ENOENT;
 }
 
+#define ROCKCHIP_MMC_DELAY_SEL		BIT(10)
+#define ROCKCHIP_MMC_DEGREE_MASK	0x3
+#define ROCKCHIP_MMC_DELAYNUM_OFFSET	2
+#define ROCKCHIP_MMC_DELAYNUM_MASK	(0xff << ROCKCHIP_MMC_DELAYNUM_OFFSET)
+
+#define PSECS_PER_SEC 1000000000000LL
+/*
+ * Each fine delay is between 44ps-77ps. Assume each fine delay is 60ps to
+ * simplify calculations. So 45degs could be anywhere between 33deg and 57.8deg.
+ */
+#define ROCKCHIP_MMC_DELAY_ELEMENT_PSEC 60
+
+int rk3368_mmc_get_phase(struct clk *clk)
+{
+	struct rk3368_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3368_cru *cru = priv->cru;
+	u32 raw_value, delay_num;
+	u16 degrees = 0;
+	ulong rate;
+
+	rate = rk3368_clk_get_rate(clk);
+
+	if (rate < 0)
+		return rate;
+
+	if (clk->id == SCLK_EMMC_SAMPLE)
+		raw_value = readl(&cru->emmc_con[1]);
+	else if (clk->id == SCLK_SDMMC_SAMPLE)
+		raw_value = readl(&cru->sdmmc_con[1]);
+	else
+		raw_value = readl(&cru->sdio0_con[1]);
+
+	raw_value >>= 1;
+	degrees = (raw_value & ROCKCHIP_MMC_DEGREE_MASK) * 90;
+
+	if (raw_value & ROCKCHIP_MMC_DELAY_SEL) {
+		/* degrees/delaynum * 10000 */
+		unsigned long factor = (ROCKCHIP_MMC_DELAY_ELEMENT_PSEC / 10) *
+					36 * (rate / 1000000);
+
+		delay_num = (raw_value & ROCKCHIP_MMC_DELAYNUM_MASK);
+		delay_num >>= ROCKCHIP_MMC_DELAYNUM_OFFSET;
+		degrees += DIV_ROUND_CLOSEST(delay_num * factor, 10000);
+	}
+
+	return degrees % 360;
+}
+
+int rk3368_mmc_set_phase(struct clk *clk, u32 degrees)
+{
+	struct rk3368_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3368_cru *cru = priv->cru;
+	u8 nineties, remainder, delay_num;
+	u32 raw_value, delay;
+	ulong rate;
+
+	rate = rk3368_clk_get_rate(clk);
+
+	if (rate < 0)
+		return rate;
+
+	nineties = degrees / 90;
+	remainder = (degrees % 90);
+
+	/*
+	 * Convert to delay; do a little extra work to make sure we
+	 * don't overflow 32-bit / 64-bit numbers.
+	 */
+	delay = 10000000; /* PSECS_PER_SEC / 10000 / 10 */
+	delay *= remainder;
+	delay = DIV_ROUND_CLOSEST(delay, (rate / 1000) * 36 *
+				(ROCKCHIP_MMC_DELAY_ELEMENT_PSEC / 10));
+
+	delay_num = (u8)min_t(u32, delay, 255);
+
+	raw_value = delay_num ? ROCKCHIP_MMC_DELAY_SEL : 0;
+	raw_value |= delay_num << ROCKCHIP_MMC_DELAYNUM_OFFSET;
+	raw_value |= nineties;
+
+	raw_value <<= 1;
+	if (clk->id == SCLK_EMMC_SAMPLE)
+		writel(raw_value | 0xffff0000, &cru->emmc_con[1]);
+	else if (clk->id == SCLK_SDMMC_SAMPLE)
+		writel(raw_value | 0xffff0000, &cru->sdmmc_con[1]);
+	else
+		writel(raw_value | 0xffff0000, &cru->sdio0_con[1]);
+
+	debug("mmc set_phase(%d) delay_nums=%u reg=%#x actual_degrees=%d\n",
+	      degrees, delay_num, raw_value, rk3368_mmc_get_phase(clk));
+
+	return 0;
+}
+
+static int rk3368_clk_get_phase(struct clk *clk)
+{
+	int ret;
+
+	debug("%s %ld\n", __func__, clk->id);
+	switch (clk->id) {
+	case SCLK_EMMC_SAMPLE:
+	case SCLK_SDMMC_SAMPLE:
+	case SCLK_SDIO0_SAMPLE:
+		ret = rk3368_mmc_get_phase(clk);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+}
+
+static int rk3368_clk_set_phase(struct clk *clk, int degrees)
+{
+	int ret;
+
+	debug("%s %ld\n", __func__, clk->id);
+	switch (clk->id) {
+	case SCLK_EMMC_SAMPLE:
+	case SCLK_SDMMC_SAMPLE:
+	case SCLK_SDIO0_SAMPLE:
+		ret = rk3368_mmc_set_phase(clk, degrees);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+}
+
 static struct clk_ops rk3368_clk_ops = {
 	.get_rate = rk3368_clk_get_rate,
 	.set_rate = rk3368_clk_set_rate,
+	.get_phase = rk3368_clk_get_phase,
+	.set_phase = rk3368_clk_set_phase,
 #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
 	.set_parent = rk3368_clk_set_parent,
 #endif

commit 77745e86fd1a1512f6cebcb5e58b8501730d2f4e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Sep 28 14:43:08 2018 +0800

    rockchip: dts: rk1808: add "u-boot,dm-pre-reloc" for dmc node
    
    Change-Id: I0c552e05f0359520715edb24a777d05dcb7bdc76
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk1808-u-boot.dtsi b/arch/arm/dts/rk1808-u-boot.dtsi
index ba09a1dc12..a52e9d45f3 100644
--- a/arch/arm/dts/rk1808-u-boot.dtsi
+++ b/arch/arm/dts/rk1808-u-boot.dtsi
@@ -10,6 +10,10 @@
 	};
 };
 
+&dmc {
+	u-boot,dm-pre-reloc;
+};
+
 &cru {
 	u-boot,dm-pre-reloc;
 };

commit 23ba6841ccdaeb51290dc49d4e32f175bd3baa34
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Sep 26 18:30:20 2018 +0800

    tools: rockchip: support hostprogs for pack tools
    
    - include: boot_merge/trust_merge/loaderimage/resource_tool/checksum;
    - porting from rkdevelop and base on commit 8fd1d8f
      (resource: get resource primary from boot partition);
    - clean generated binary file when execute clean command;
    
    Change-Id: I41c1893c2da0a0f25c2d39dbbd933f89fbb04948
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 6e6866c509..0cdde4f527 100755
--- a/make.sh
+++ b/make.sh
@@ -34,14 +34,16 @@ TOOLCHAIN_ARM32=../prebuilts/gcc/linux-x86/arm/gcc-linaro-6.3.1-2017.05-x86_64_a
 TOOLCHAIN_ARM64=../prebuilts/gcc/linux-x86/aarch64/gcc-linaro-6.3.1-2017.05-x86_64_aarch64-linux-gnu/bin
 
 ########################################### User not touch #############################################
+BIN_PATH_FIXUP="--replace tools/rk_tools/ ./"
+RKTOOLS=./tools
+
 # Declare global INI file searching index name for every chip, update in select_chip_info()
 RKCHIP=
 RKCHIP_LABEL=
 RKCHIP_LOADER=
 RKCHIP_TRUST=
 
-# Declare global rkbin RKTOOLS and rkbin repository path, updated in prepare()
-RKTOOLS=
+# Declare rkbin repository path, updated in prepare()
 RKBIN=
 
 # Declare global toolchain path for CROSS_COMPILE, updated in select_toolchain()
@@ -170,11 +172,10 @@ prepare()
 		;;
 	esac
 
-	# Initialize RKBIN and RKTOOLS
+	# Initialize RKBIN
 	if [ -d ${RKBIN_TOOLS} ]; then
 		absolute_path=$(cd `dirname ${RKBIN_TOOLS}`; pwd)
 		RKBIN=${absolute_path}
-		RKTOOLS=${absolute_path}/tools
 	else
 		echo
 		echo "Can't find '../rkbin/' repository, please download it before pack image!"
@@ -415,12 +416,12 @@ pack_loader_image()
 		for ini in $files
 		do
 			if [ -f "$ini" ]; then
-				${RKTOOLS}/boot_merger --replace tools/rk_tools/ ./ $ini
+				${RKTOOLS}/boot_merger ${BIN_PATH_FIXUP} $ini
 				echo "pack loader okay! Input: $ini"
 			fi
 		done
 	else
-		${RKTOOLS}/boot_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL.ini
+		${RKTOOLS}/boot_merger ${BIN_PATH_FIXUP} ${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL.ini
 		echo "pack loader okay! Input: ${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL.ini"
 	fi
 
@@ -439,7 +440,7 @@ pack_trust_image()
 		fi
 
 		cd ${RKBIN}
-		${RKTOOLS}/trust_merger ${PLATFORM_SHA} ${PLATFORM_RSA} ${PLATFORM_TRUST_IMG_SIZE} --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST.ini
+		${RKTOOLS}/trust_merger ${PLATFORM_SHA} ${PLATFORM_RSA} ${PLATFORM_TRUST_IMG_SIZE} ${BIN_PATH_FIXUP} ${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST.ini
 
 		cd - && mv ${RKBIN}/trust.img ./trust.img
 		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST.ini"
diff --git a/tools/.gitignore b/tools/.gitignore
index 6a487d2202..abc6c2dc86 100644
--- a/tools/.gitignore
+++ b/tools/.gitignore
@@ -28,3 +28,8 @@
 /sunxi-spl-image-builder
 /ubsha1
 /xway-swap-bytes
+/trust_merger
+/boot_merger
+/loaderimage
+/checksum
+/resource_tool
diff --git a/tools/Makefile b/tools/Makefile
index 89827564e6..73701a814b 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -57,6 +57,21 @@ mkenvimage-objs := mkenvimage.o os_support.o lib/crc32.o
 hostprogs-y += dumpimage mkimage
 hostprogs-$(CONFIG_FIT_SIGNATURE) += fit_info fit_check_sign
 
+# Rockchip pack tools
+ifdef CONFIG_ARCH_ROCKCHIP
+hostprogs-y += boot_merger
+hostprogs-y += trust_merger
+hostprogs-y += loaderimage
+hostprogs-y += resource_tool
+hostprogs-y += checksum
+
+boot_merger-objs := rockchip/boot_merger.o rockchip/sha2.o lib/sha256.o
+trust_merger-objs := rockchip/trust_merger.o rockchip/sha2.o lib/sha256.o
+loaderimage-objs := rockchip/loaderimage.o rockchip/sha.o lib/sha256.o rockchip/crc32_rk.o
+resource_tool-objs := rockchip/resource_tool.o
+checksum-objs := rockchip/checksum.o rockchip/crc32_rk.o
+endif
+
 FIT_SIG_OBJS-$(CONFIG_FIT_SIGNATURE) := common/image-sig.o
 
 # The following files are synced with upstream DTC.
diff --git a/tools/rockchip/boot_merger.c b/tools/rockchip/boot_merger.c
new file mode 100644
index 0000000000..fd8916e2ba
--- /dev/null
+++ b/tools/rockchip/boot_merger.c
@@ -0,0 +1,1061 @@
+/*
+ * (C) Copyright 2008-2015 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#include "boot_merger.h"
+#include <time.h>
+#include <sys/stat.h>
+#include <version.h>
+
+/* #define USE_P_RC4 */
+
+bool gDebug =
+#ifdef DEBUG
+        true;
+#else
+        false;
+#endif /* DEBUG */
+
+#define ENTRY_ALIGN (2048)
+options gOpts;
+char gLegacyPath[MAX_LINE_LEN] = { 0 };
+char gNewPath[MAX_LINE_LEN] = { 0 };
+char gSubfix[MAX_LINE_LEN] = OUT_SUBFIX;
+char gEat[MAX_LINE_LEN];
+char *gConfigPath;
+uint8_t *gBuf;
+
+static uint32_t g_merge_max_size = MAX_MERGE_SIZE;
+
+uint32_t gTable_Crc32[256] = {
+	0x00000000, 0x04c10db7, 0x09821b6e, 0x0d4316d9, 0x130436dc, 0x17c53b6b,
+	0x1a862db2, 0x1e472005, 0x26086db8, 0x22c9600f, 0x2f8a76d6, 0x2b4b7b61,
+	0x350c5b64, 0x31cd56d3, 0x3c8e400a, 0x384f4dbd, 0x4c10db70, 0x48d1d6c7,
+	0x4592c01e, 0x4153cda9, 0x5f14edac, 0x5bd5e01b, 0x5696f6c2, 0x5257fb75,
+	0x6a18b6c8, 0x6ed9bb7f, 0x639aada6, 0x675ba011, 0x791c8014, 0x7ddd8da3,
+	0x709e9b7a, 0x745f96cd, 0x9821b6e0, 0x9ce0bb57, 0x91a3ad8e, 0x9562a039,
+	0x8b25803c, 0x8fe48d8b, 0x82a79b52, 0x866696e5, 0xbe29db58, 0xbae8d6ef,
+	0xb7abc036, 0xb36acd81, 0xad2ded84, 0xa9ece033, 0xa4aff6ea, 0xa06efb5d,
+	0xd4316d90, 0xd0f06027, 0xddb376fe, 0xd9727b49, 0xc7355b4c, 0xc3f456fb,
+	0xceb74022, 0xca764d95, 0xf2390028, 0xf6f80d9f, 0xfbbb1b46, 0xff7a16f1,
+	0xe13d36f4, 0xe5fc3b43, 0xe8bf2d9a, 0xec7e202d, 0x34826077, 0x30436dc0,
+	0x3d007b19, 0x39c176ae, 0x278656ab, 0x23475b1c, 0x2e044dc5, 0x2ac54072,
+	0x128a0dcf, 0x164b0078, 0x1b0816a1, 0x1fc91b16, 0x018e3b13, 0x054f36a4,
+	0x080c207d, 0x0ccd2dca, 0x7892bb07, 0x7c53b6b0, 0x7110a069, 0x75d1adde,
+	0x6b968ddb, 0x6f57806c, 0x621496b5, 0x66d59b02, 0x5e9ad6bf, 0x5a5bdb08,
+	0x5718cdd1, 0x53d9c066, 0x4d9ee063, 0x495fedd4, 0x441cfb0d, 0x40ddf6ba,
+	0xaca3d697, 0xa862db20, 0xa521cdf9, 0xa1e0c04e, 0xbfa7e04b, 0xbb66edfc,
+	0xb625fb25, 0xb2e4f692, 0x8aabbb2f, 0x8e6ab698, 0x8329a041, 0x87e8adf6,
+	0x99af8df3, 0x9d6e8044, 0x902d969d, 0x94ec9b2a, 0xe0b30de7, 0xe4720050,
+	0xe9311689, 0xedf01b3e, 0xf3b73b3b, 0xf776368c, 0xfa352055, 0xfef42de2,
+	0xc6bb605f, 0xc27a6de8, 0xcf397b31, 0xcbf87686, 0xd5bf5683, 0xd17e5b34,
+	0xdc3d4ded, 0xd8fc405a, 0x6904c0ee, 0x6dc5cd59, 0x6086db80, 0x6447d637,
+	0x7a00f632, 0x7ec1fb85, 0x7382ed5c, 0x7743e0eb, 0x4f0cad56, 0x4bcda0e1,
+	0x468eb638, 0x424fbb8f, 0x5c089b8a, 0x58c9963d, 0x558a80e4, 0x514b8d53,
+	0x25141b9e, 0x21d51629, 0x2c9600f0, 0x28570d47, 0x36102d42, 0x32d120f5,
+	0x3f92362c, 0x3b533b9b, 0x031c7626, 0x07dd7b91, 0x0a9e6d48, 0x0e5f60ff,
+	0x101840fa, 0x14d94d4d, 0x199a5b94, 0x1d5b5623, 0xf125760e, 0xf5e47bb9,
+	0xf8a76d60, 0xfc6660d7, 0xe22140d2, 0xe6e04d65, 0xeba35bbc, 0xef62560b,
+	0xd72d1bb6, 0xd3ec1601, 0xdeaf00d8, 0xda6e0d6f, 0xc4292d6a, 0xc0e820dd,
+	0xcdab3604, 0xc96a3bb3, 0xbd35ad7e, 0xb9f4a0c9, 0xb4b7b610, 0xb076bba7,
+	0xae319ba2, 0xaaf09615, 0xa7b380cc, 0xa3728d7b, 0x9b3dc0c6, 0x9ffccd71,
+	0x92bfdba8, 0x967ed61f, 0x8839f61a, 0x8cf8fbad, 0x81bbed74, 0x857ae0c3,
+	0x5d86a099, 0x5947ad2e, 0x5404bbf7, 0x50c5b640, 0x4e829645, 0x4a439bf2,
+	0x47008d2b, 0x43c1809c, 0x7b8ecd21, 0x7f4fc096, 0x720cd64f, 0x76cddbf8,
+	0x688afbfd, 0x6c4bf64a, 0x6108e093, 0x65c9ed24, 0x11967be9, 0x1557765e,
+	0x18146087, 0x1cd56d30, 0x02924d35, 0x06534082, 0x0b10565b, 0x0fd15bec,
+	0x379e1651, 0x335f1be6, 0x3e1c0d3f, 0x3add0088, 0x249a208d, 0x205b2d3a,
+	0x2d183be3, 0x29d93654, 0xc5a71679, 0xc1661bce, 0xcc250d17, 0xc8e400a0,
+	0xd6a320a5, 0xd2622d12, 0xdf213bcb, 0xdbe0367c, 0xe3af7bc1, 0xe76e7676,
+	0xea2d60af, 0xeeec6d18, 0xf0ab4d1d, 0xf46a40aa, 0xf9295673, 0xfde85bc4,
+	0x89b7cd09, 0x8d76c0be, 0x8035d667, 0x84f4dbd0, 0x9ab3fbd5, 0x9e72f662,
+	0x9331e0bb, 0x97f0ed0c, 0xafbfa0b1, 0xab7ead06, 0xa63dbbdf, 0xa2fcb668,
+	0xbcbb966d, 0xb87a9bda, 0xb5398d03, 0xb1f880b4,
+};
+
+uint32_t CRC_32(uint8_t *pData, uint32_t ulSize)
+{
+	uint32_t i;
+	uint32_t nAccum = 0;
+	for (i = 0; i < ulSize; i++) {
+		nAccum = (nAccum << 8) ^ gTable_Crc32[(nAccum >> 24) ^ (*pData++)];
+	}
+	return nAccum;
+}
+
+void P_RC4(uint8_t *buf, uint32_t len)
+{
+	uint8_t S[256], K[256], temp;
+	uint32_t i, j, t, x;
+	uint8_t key[16] = { 124, 78, 3, 4, 85, 5, 9, 7, 45, 44, 123, 56, 23, 13, 23,
+	                    17
+	                  };
+
+	j = 0;
+	for (i = 0; i < 256; i++) {
+		S[i] = (uint8_t) i;
+		j &= 0x0f;
+		K[i] = key[j];
+		j++;
+	}
+
+	j = 0;
+	for (i = 0; i < 256; i++) {
+		j = (j + S[i] + K[i]) % 256;
+		temp = S[i];
+		S[i] = S[j];
+		S[j] = temp;
+	}
+
+	i = j = 0;
+	for (x = 0; x < len; x++) {
+		i = (i + 1) % 256;
+		j = (j + S[i]) % 256;
+		temp = S[i];
+		S[i] = S[j];
+		S[j] = temp;
+		t = (S[i] + (S[j] % 256)) % 256;
+		buf[x] = buf[x] ^ S[t];
+	}
+}
+
+static inline void fixPath(char *path)
+{
+	int i, len = strlen(path);
+	char tmp[MAX_LINE_LEN];
+	char *start, *end;
+
+	for (i = 0; i < len; i++) {
+		if (path[i] == '\\')
+			path[i] = '/';
+		else if (path[i] == '\r' || path[i] == '\n')
+			path[i] = '\0';
+	}
+
+	if (strlen(gLegacyPath) && strlen(gNewPath)) {
+		start = strstr(path, gLegacyPath);
+		if (start) {
+			end = start + strlen(gLegacyPath);
+			/* Backup, so tmp can be src for strcat() */
+			strcpy(tmp, end);
+			/* Terminate, so path can be dest for strcat() */
+			*start = '\0';
+			strcat(path, tmp);
+		}
+	}
+}
+
+static bool parseChip(FILE *file)
+{
+	if (SCANF_EAT(file) != 0) {
+		return false;
+	}
+	if (fscanf(file, OPT_NAME "=%s", gOpts.chip) != 1) {
+		return false;
+	}
+	LOGD("chip:%s\n", gOpts.chip);
+	return true;
+}
+
+static bool parseVersion(FILE *file)
+{
+	if (SCANF_EAT(file) != 0) {
+		return false;
+	}
+	if (fscanf(file, OPT_MAJOR "=%d", &gOpts.major) != 1)
+		return false;
+	if (SCANF_EAT(file) != 0) {
+		return false;
+	}
+	if (fscanf(file, OPT_MINOR "=%d", &gOpts.minor) != 1)
+		return false;
+	LOGD("major:%d, minor:%d\n", gOpts.major, gOpts.minor);
+	return true;
+}
+
+static bool parse471(FILE *file)
+{
+	int i, index, pos;
+	char buf[MAX_LINE_LEN];
+
+	if (SCANF_EAT(file) != 0) {
+		return false;
+	}
+	if (fscanf(file, OPT_NUM "=%d", &gOpts.code471Num) != 1)
+		return false;
+	LOGD("num:%d\n", gOpts.code471Num);
+	if (!gOpts.code471Num)
+		return true;
+	if (gOpts.code471Num < 0)
+		return false;
+	gOpts.code471Path = (line_t *)malloc(sizeof(line_t) * gOpts.code471Num);
+	for (i = 0; i < gOpts.code471Num; i++) {
+		if (SCANF_EAT(file) != 0) {
+			return false;
+		}
+		if (fscanf(file, OPT_PATH "%d=%[^\r^\n]", &index, buf) != 2)
+			return false;
+		index--;
+		fixPath(buf);
+		strcpy((char *)gOpts.code471Path[index], buf);
+		LOGD("path%i:%s\n", index, gOpts.code471Path[index]);
+	}
+	pos = ftell(file);
+	if (SCANF_EAT(file) != 0) {
+		return false;
+	}
+	if (fscanf(file, OPT_SLEEP "=%d", &gOpts.code471Sleep) != 1)
+		fseek(file, pos, SEEK_SET);
+	LOGD("sleep:%d\n", gOpts.code471Sleep);
+	return true;
+}
+
+static bool parse472(FILE *file)
+{
+	int i, index, pos;
+	char buf[MAX_LINE_LEN];
+
+	if (SCANF_EAT(file) != 0) {
+		return false;
+	}
+	if (fscanf(file, OPT_NUM "=%d", &gOpts.code472Num) != 1)
+		return false;
+	LOGD("num:%d\n", gOpts.code472Num);
+	if (!gOpts.code472Num)
+		return true;
+	if (gOpts.code472Num < 0)
+		return false;
+	gOpts.code472Path = (line_t *)malloc(sizeof(line_t) * gOpts.code472Num);
+	for (i = 0; i < gOpts.code472Num; i++) {
+		if (SCANF_EAT(file) != 0) {
+			return false;
+		}
+		if (fscanf(file, OPT_PATH "%d=%[^\r^\n]", &index, buf) != 2)
+			return false;
+		fixPath(buf);
+		index--;
+		strcpy((char *)gOpts.code472Path[index], buf);
+		LOGD("path%i:%s\n", index, gOpts.code472Path[index]);
+	}
+	pos = ftell(file);
+	if (SCANF_EAT(file) != 0) {
+		return false;
+	}
+	if (fscanf(file, OPT_SLEEP "=%d", &gOpts.code472Sleep) != 1)
+		fseek(file, pos, SEEK_SET);
+	LOGD("sleep:%d\n", gOpts.code472Sleep);
+	return true;
+}
+
+static bool parseLoader(FILE *file)
+{
+	int i, j, index, pos;
+	char buf[MAX_LINE_LEN];
+	char buf2[MAX_LINE_LEN];
+
+	if (SCANF_EAT(file) != 0) {
+		return false;
+	}
+	pos = ftell(file);
+	if (fscanf(file, OPT_NUM "=%d", &gOpts.loaderNum) != 1) {
+		fseek(file, pos, SEEK_SET);
+		if (fscanf(file, OPT_LOADER_NUM "=%d", &gOpts.loaderNum) != 1) {
+			return false;
+		}
+	}
+	LOGD("num:%d\n", gOpts.loaderNum);
+	if (!gOpts.loaderNum)
+		return false;
+	if (gOpts.loaderNum < 0)
+		return false;
+	gOpts.loader = (name_entry *)malloc(sizeof(name_entry) * gOpts.loaderNum);
+	for (i = 0; i < gOpts.loaderNum; i++) {
+		if (SCANF_EAT(file) != 0) {
+			return false;
+		}
+		if (fscanf(file, OPT_LOADER_NAME "%d=%s", &index, buf) != 2)
+			return false;
+		index--;
+		strcpy(gOpts.loader[index].name, buf);
+		LOGD("name%d:%s\n", index, gOpts.loader[index].name);
+	}
+	for (i = 0; i < gOpts.loaderNum; i++) {
+		if (SCANF_EAT(file) != 0) {
+			return false;
+		}
+		if (fscanf(file, "%[^=]=%[^\r^\n]", buf, buf2) != 2)
+			return false;
+		for (j = 0; j < gOpts.loaderNum; j++) {
+			if (!strcmp(gOpts.loader[j].name, buf)) {
+				fixPath(buf2);
+				strcpy(gOpts.loader[j].path, buf2);
+				LOGD("%s=%s\n", gOpts.loader[j].name, gOpts.loader[j].path);
+				break;
+			}
+		}
+		if (j >= gOpts.loaderNum) {
+			return false;
+		}
+	}
+	return true;
+}
+
+static bool parseOut(FILE *file)
+{
+	if (SCANF_EAT(file) != 0) {
+		return false;
+	}
+	if (fscanf(file, OPT_OUT_PATH "=%[^\r^\n]", gOpts.outPath) != 1)
+		return false;
+	fixPath(gOpts.outPath);
+	printf("out:%s\n", gOpts.outPath);
+	return true;
+}
+
+void printOpts(FILE *out)
+{
+	uint32_t i;
+	fprintf(out, SEC_CHIP "\n" OPT_NAME "=%s\n", gOpts.chip);
+	fprintf(out, SEC_VERSION "\n" OPT_MAJOR "=%d\n" OPT_MINOR "=%d\n",
+	        gOpts.major, gOpts.minor);
+
+	fprintf(out, SEC_471 "\n" OPT_NUM "=%d\n", gOpts.code471Num);
+	for (i = 0; i < gOpts.code471Num; i++) {
+		fprintf(out, OPT_PATH "%d=%s\n", i + 1, gOpts.code471Path[i]);
+	}
+	if (gOpts.code471Sleep > 0)
+		fprintf(out, OPT_SLEEP "=%d\n", gOpts.code471Sleep);
+
+	fprintf(out, SEC_472 "\n" OPT_NUM "=%d\n", gOpts.code472Num);
+	for (i = 0; i < gOpts.code472Num; i++) {
+		fprintf(out, OPT_PATH "%d=%s\n", i + 1, gOpts.code472Path[i]);
+	}
+	if (gOpts.code472Sleep > 0)
+		fprintf(out, OPT_SLEEP "=%d\n", gOpts.code472Sleep);
+
+	fprintf(out, SEC_LOADER "\n" OPT_NUM "=%d\n", gOpts.loaderNum);
+	for (i = 0; i < gOpts.loaderNum; i++) {
+		fprintf(out, OPT_LOADER_NAME "%d=%s\n", i + 1, gOpts.loader[i].name);
+	}
+	for (i = 0; i < gOpts.loaderNum; i++) {
+		fprintf(out, "%s=%s\n", gOpts.loader[i].name, gOpts.loader[i].path);
+	}
+
+	fprintf(out, SEC_OUT "\n" OPT_OUT_PATH "=%s\n", gOpts.outPath);
+}
+
+static bool parseOpts_from_file(void)
+{
+	bool ret = false;
+	bool chipOk = false;
+	bool versionOk = false;
+	bool code471Ok = true;
+	bool code472Ok = true;
+	bool loaderOk = false;
+	bool outOk = false;
+	char buf[MAX_LINE_LEN];
+
+	char *configPath = (gConfigPath == NULL) ? DEF_CONFIG_FILE : gConfigPath;
+	FILE *file;
+	file = fopen(configPath, "r");
+	if (!file) {
+		fprintf(stderr, "config(%s) not found!\n", configPath);
+		if (configPath == (char *)DEF_CONFIG_FILE) {
+			file = fopen(DEF_CONFIG_FILE, "w");
+			if (file) {
+				fprintf(stderr, "create defconfig\n");
+				printOpts(file);
+			}
+		}
+		goto end;
+	}
+
+	LOGD("start parse\n");
+
+	if (SCANF_EAT(file) != 0) {
+		goto end;
+	}
+	while (fscanf(file, "%s", buf) == 1) {
+		if (!strcmp(buf, SEC_CHIP)) {
+			chipOk = parseChip(file);
+			if (!chipOk) {
+				LOGE("parseChip failed!\n");
+				goto end;
+			}
+		} else if (!strcmp(buf, SEC_VERSION)) {
+			versionOk = parseVersion(file);
+			if (!versionOk) {
+				LOGE("parseVersion failed!\n");
+				goto end;
+			}
+		} else if (!strcmp(buf, SEC_471)) {
+			code471Ok = parse471(file);
+			if (!code471Ok) {
+				LOGE("parse471 failed!\n");
+				goto end;
+			}
+		} else if (!strcmp(buf, SEC_472)) {
+			code472Ok = parse472(file);
+			if (!code472Ok) {
+				LOGE("parse472 failed!\n");
+				goto end;
+			}
+		} else if (!strcmp(buf, SEC_LOADER)) {
+			loaderOk = parseLoader(file);
+			if (!loaderOk) {
+				LOGE("parseLoader failed!\n");
+				goto end;
+			}
+		} else if (!strcmp(buf, SEC_OUT)) {
+			outOk = parseOut(file);
+			if (!outOk) {
+				LOGE("parseOut failed!\n");
+				goto end;
+			}
+		} else if (buf[0] == '#') {
+			continue;
+		} else {
+			LOGE("unknown sec: %s!\n", buf);
+			goto end;
+		}
+		if (SCANF_EAT(file) != 0) {
+			goto end;
+		}
+	}
+
+	if (chipOk && versionOk && code471Ok && code472Ok && loaderOk && outOk)
+		ret = true;
+end:
+	if (file)
+		fclose(file);
+	return ret;
+}
+
+static bool parseOpts_from_cmdline(int argc, char **argv)
+{
+	int i;
+	int tag = 0;
+	int v0, v1, v2, v3;
+
+	for (i = 2; i < argc; i++) {
+		if (!strcmp(OPT_471, argv[i])) {
+			i++;
+			snprintf(gOpts.code471Path[0], sizeof(gOpts.code471Path[0]), "%s",
+			         argv[i]);
+			tag |= 1;
+		} else if (!strcmp(OPT_472, argv[i])) {
+			i++;
+			snprintf(gOpts.code472Path[0], sizeof(gOpts.code472Path[0]), "%s",
+			         argv[i]);
+			tag |= 2;
+		} else if (!strcmp(OPT_DATA, argv[i])) {
+			i++;
+			snprintf(gOpts.loader[0].path, sizeof(gOpts.loader[0].path), "%s",
+			         argv[i]);
+			tag |= 4;
+		} else if (!strcmp(OPT_BOOT, argv[i])) {
+			i++;
+			snprintf(gOpts.loader[1].path, sizeof(gOpts.loader[1].path), "%s",
+			         argv[i]);
+			tag |= 8;
+		} else if (!strcmp(OPT_OUT, argv[i])) {
+			i++;
+			snprintf(gOpts.outPath, sizeof(gOpts.outPath), "%s", argv[i]);
+			tag |= 0x10;
+		} else if (!strcmp(OPT_CHIP, argv[i])) {
+			i++;
+			snprintf(gOpts.chip, sizeof(gOpts.chip), "%s", argv[i]);
+			tag |= 0x20;
+		} else if (!strcmp(OPT_VERSION, argv[i])) {
+		}
+	}
+
+	sscanf(gOpts.loader[0].path, "%*[^v]v%d.%d.bin", &v0, &v1);
+	sscanf(gOpts.loader[1].path, "%*[^v]v%d.%d.bin", &v2, &v3);
+	gOpts.major = v2;
+	gOpts.minor = v3;
+	snprintf(gOpts.outPath, sizeof(gOpts.outPath),
+	         "%s_loader_v%d.%02d.%d%02d.bin", gOpts.chip, v0, v1, v2, v3);
+	return ((tag & 0x0f) == 0x0f) ? true : false;
+}
+
+bool initOpts(int argc, char **argv)
+{
+	bool ret;
+
+	/* set default opts */
+	gOpts.major = DEF_MAJOR;
+	gOpts.minor = DEF_MINOR;
+	strcpy(gOpts.chip, DEF_CHIP);
+	gOpts.code471Sleep = DEF_CODE471_SLEEP;
+	gOpts.code472Sleep = DEF_CODE472_SLEEP;
+	gOpts.code471Num = DEF_CODE471_NUM;
+	gOpts.code471Path = (line_t *)malloc(sizeof(line_t) * gOpts.code471Num);
+	strcpy((char *)gOpts.code471Path[0], DEF_CODE471_PATH);
+	gOpts.code472Num = DEF_CODE472_NUM;
+	gOpts.code472Path = (line_t *)malloc(sizeof(line_t) * gOpts.code472Num);
+	strcpy((char *)gOpts.code472Path[0], DEF_CODE472_PATH);
+	gOpts.loaderNum = DEF_LOADER_NUM;
+	gOpts.loader = (name_entry *)malloc(sizeof(name_entry) * gOpts.loaderNum);
+	strcpy(gOpts.loader[0].name, DEF_LOADER0);
+	strcpy(gOpts.loader[0].path, DEF_LOADER0_PATH);
+	strcpy(gOpts.loader[1].name, DEF_LOADER1);
+	strcpy(gOpts.loader[1].path, DEF_LOADER1_PATH);
+	strcpy(gOpts.outPath, DEF_OUT_PATH);
+
+	if (argc > 10)
+		ret = parseOpts_from_cmdline(argc, argv);
+	else
+		ret = parseOpts_from_file();
+
+	return ret;
+}
+
+/************merge code****************/
+
+static inline uint32_t getBCD(unsigned short value)
+{
+	uint8_t tmp[2] = { 0 };
+	int i;
+	uint32_t ret;
+	if (value > 0xFFFF) {
+		return 0;
+	}
+	for (i = 0; i < 2; i++) {
+		tmp[i] = (((value / 10) % 10) << 4) | (value % 10);
+		value /= 100;
+	}
+	ret = ((uint16_t)(tmp[1] << 8)) | tmp[0];
+
+	LOGD("ret:%x\n", ret);
+	return ret & 0xFF;
+}
+
+static inline void str2wide(const char *str, uint16_t *wide, int len)
+{
+	int i;
+	for (i = 0; i < len; i++) {
+		wide[i] = (uint16_t) str[i];
+	}
+	wide[len] = 0;
+}
+
+static inline void getName(char *path, uint16_t *dst)
+{
+	char *end;
+	char *start;
+	int len;
+	if (!path || !dst)
+		return;
+	start = strrchr(path, '/');
+	if (!start)
+		start = path;
+	else
+		start++;
+	end = strrchr(path, '.');
+	if (!end)
+		end = path + strlen(path);
+	len = end - start;
+	if (len >= MAX_NAME_LEN)
+		len = MAX_NAME_LEN - 1;
+	str2wide(start, dst, len);
+
+	if (gDebug) {
+		char name[MAX_NAME_LEN];
+		memset(name, 0, sizeof(name));
+		memcpy(name, start, len);
+		LOGD("path:%s, name:%s\n", path, name);
+	}
+}
+
+static inline bool getFileSize(const char *path, uint32_t *size)
+{
+	struct stat st;
+	if (stat(path, &st) < 0)
+		return false;
+	*size = st.st_size;
+	LOGD("path:%s, size:%d\n", path, *size);
+	return true;
+}
+
+static inline rk_time getTime(void)
+{
+	rk_time rkTime;
+
+	struct tm *tm;
+	time_t tt = time(NULL);
+	tm = localtime(&tt);
+	rkTime.year = tm->tm_year + 1900;
+	rkTime.month = tm->tm_mon + 1;
+	rkTime.day = tm->tm_mday;
+	rkTime.hour = tm->tm_hour;
+	rkTime.minute = tm->tm_min;
+	rkTime.second = tm->tm_sec;
+	LOGD("%d-%d-%d %02d:%02d:%02d\n", rkTime.year, rkTime.month, rkTime.day,
+	     rkTime.hour, rkTime.minute, rkTime.second);
+	return rkTime;
+}
+
+static bool writeFile(FILE *outFile, const char *path, bool fix)
+{
+	bool ret = false;
+	uint32_t size = 0, fixSize = 0;
+	uint8_t *buf;
+
+	FILE *inFile = fopen(path, "rb");
+	if (!inFile)
+		goto end;
+
+	if (!getFileSize(path, &size))
+		goto end;
+	if (fix) {
+		fixSize = ((size - 1) / SMALL_PACKET + 1) * SMALL_PACKET;
+		uint32_t tmp = fixSize % ENTRY_ALIGN;
+		tmp = tmp ? (ENTRY_ALIGN - tmp) : 0;
+		fixSize += tmp;
+		memset(gBuf, 0, fixSize);
+	} else {
+		memset(gBuf, 0, size + ENTRY_ALIGN);
+	}
+	if (!fread(gBuf, size, 1, inFile))
+		goto end;
+
+	if (fix) {
+
+		buf = gBuf;
+		size = fixSize;
+		while (1) {
+			P_RC4(buf, fixSize < SMALL_PACKET ? fixSize : SMALL_PACKET);
+			buf += SMALL_PACKET;
+			if (fixSize <= SMALL_PACKET)
+				break;
+			fixSize -= SMALL_PACKET;
+		}
+	} else {
+		uint32_t tmp = size % ENTRY_ALIGN;
+		tmp = tmp ? (ENTRY_ALIGN - tmp) : 0;
+		size += tmp;
+		P_RC4(gBuf, size);
+	}
+
+	if (!fwrite(gBuf, size, 1, outFile))
+		goto end;
+	ret = true;
+end:
+	if (inFile)
+		fclose(inFile);
+	if (!ret)
+		LOGE("write entry(%s) failed\n", path);
+	return ret;
+}
+
+static bool saveEntry(FILE *outFile, char *path, rk_entry_type type,
+                      uint16_t delay, uint32_t *offset, char *fixName,
+                      bool fix)
+{
+	LOGD("write:%s\n", path);
+	uint32_t size;
+	rk_boot_entry entry;
+	memset(&entry, 0, sizeof(rk_boot_entry));
+
+	LOGD("write:%s\n", path);
+
+	getName(fixName ? fixName : path, entry.name);
+	entry.size = sizeof(rk_boot_entry);
+	entry.type = type;
+	entry.dataOffset = *offset;
+	if (!getFileSize(path, &size)) {
+		LOGE("save entry(%s) failed:\n\tcannot get file size.\n", path);
+		return false;
+	}
+	if (fix)
+		size = ((size - 1) / SMALL_PACKET + 1) * SMALL_PACKET;
+	uint32_t tmp = size % ENTRY_ALIGN;
+	size += tmp ? (ENTRY_ALIGN - tmp) : 0;
+	LOGD("align size:%d\n", size);
+	entry.dataSize = size;
+	entry.dataDelay = delay;
+	*offset += size;
+	fwrite(&entry, sizeof(rk_boot_entry), 1, outFile);
+	return true;
+}
+
+static inline uint32_t convertChipType(const char *chip)
+{
+	char buffer[5];
+	memset(buffer, 0, sizeof(buffer));
+	snprintf(buffer, sizeof(buffer), "%s", chip);
+	return buffer[0] << 24 | buffer[1] << 16 | buffer[2] << 8 | buffer[3];
+}
+
+static inline uint32_t getChipType(const char *chip)
+{
+	LOGD("chip:%s\n", chip);
+	int chipType = RKNONE_DEVICE;
+	if (!chip) {
+		goto end;
+	}
+	if (!strcmp(chip, CHIP_RK28)) {
+		chipType = RK28_DEVICE;
+	} else if (!strcmp(chip, CHIP_RK28)) {
+		chipType = RK28_DEVICE;
+	} else if (!strcmp(chip, CHIP_RK281X)) {
+		chipType = RK281X_DEVICE;
+	} else if (!strcmp(chip, CHIP_RKPANDA)) {
+		chipType = RKPANDA_DEVICE;
+	} else if (!strcmp(chip, CHIP_RK27)) {
+		chipType = RK27_DEVICE;
+	} else if (!strcmp(chip, CHIP_RKNANO)) {
+		chipType = RKNANO_DEVICE;
+	} else if (!strcmp(chip, CHIP_RKSMART)) {
+		chipType = RKSMART_DEVICE;
+	} else if (!strcmp(chip, CHIP_RKCROWN)) {
+		chipType = RKCROWN_DEVICE;
+	} else if (!strcmp(chip, CHIP_RKCAYMAN)) {
+		chipType = RKCAYMAN_DEVICE;
+	} else if (!strcmp(chip, CHIP_RK29)) {
+		chipType = RK29_DEVICE;
+	} else if (!strcmp(chip, CHIP_RK292X)) {
+		chipType = RK292X_DEVICE;
+	} else if (!strcmp(chip, CHIP_RK30)) {
+		chipType = RK30_DEVICE;
+	} else if (!strcmp(chip, CHIP_RK30B)) {
+		chipType = RK30B_DEVICE;
+	} else if (!strcmp(chip, CHIP_RK31)) {
+		chipType = RK31_DEVICE;
+	} else if (!strcmp(chip, CHIP_RK32)) {
+		chipType = RK32_DEVICE;
+	} else {
+		chipType = convertChipType(chip + 2);
+	}
+
+end:
+	LOGD("type:0x%x\n", chipType);
+	if (chipType == RKNONE_DEVICE) {
+		LOGE("chip type not support!\n");
+	}
+	return chipType;
+}
+
+static inline void getBoothdr(rk_boot_header *hdr)
+{
+	memset(hdr, 0, sizeof(rk_boot_header));
+	hdr->tag = TAG;
+	hdr->size = sizeof(rk_boot_header);
+	hdr->version = (getBCD(gOpts.major) << 8) | getBCD(gOpts.minor);
+	hdr->mergerVersion = MERGER_VERSION;
+	hdr->releaseTime = getTime();
+	hdr->chipType = getChipType(gOpts.chip);
+
+	hdr->code471Num = gOpts.code471Num;
+	hdr->code471Offset = sizeof(rk_boot_header);
+	hdr->code471Size = sizeof(rk_boot_entry);
+
+	hdr->code472Num = gOpts.code472Num;
+	hdr->code472Offset = hdr->code471Offset + gOpts.code471Num * hdr->code471Size;
+	hdr->code472Size = sizeof(rk_boot_entry);
+
+	hdr->loaderNum = gOpts.loaderNum;
+	hdr->loaderOffset = hdr->code472Offset + gOpts.code472Num * hdr->code472Size;
+	hdr->loaderSize = sizeof(rk_boot_entry);
+#ifndef USE_P_RC4
+	hdr->rc4Flag = 1;
+#endif
+}
+
+static inline uint32_t getCrc(const char *path)
+{
+	uint32_t size = 0;
+	uint32_t crc = 0;
+	FILE *file = fopen(path, "rb");
+	getFileSize(path, &size);
+	if (!file)
+		goto end;
+	if (!fread(gBuf, size, 1, file))
+		goto end;
+	crc = CRC_32(gBuf, size);
+	LOGD("crc:0x%08x\n", crc);
+end:
+	if (file)
+		fclose(file);
+	return crc;
+}
+
+static bool mergeBoot(int argc, char **argv)
+{
+	uint32_t dataOffset;
+	bool ret = false;
+	int i;
+	FILE *outFile;
+	uint32_t crc;
+	rk_boot_header hdr;
+
+	if (!initOpts(argc, argv))
+		return false;
+	{
+		char *subfix = strstr(gOpts.outPath, OUT_SUBFIX);
+		char version[MAX_LINE_LEN];
+		snprintf(version, sizeof(version), "%s", gSubfix);
+		if (subfix && !strcmp(subfix, OUT_SUBFIX)) {
+			subfix[0] = '\0';
+		}
+		strcat(gOpts.outPath, version);
+		printf("fix opt:%s\n", gOpts.outPath);
+	}
+
+	if (gDebug) {
+		printf("---------------\nUSING CONFIG:\n");
+		printOpts(stdout);
+		printf("---------------\n\n");
+	}
+
+	outFile = fopen(gOpts.outPath, "wb+");
+	if (!outFile) {
+		LOGE("open out file(%s) failed\n", gOpts.outPath);
+		goto end;
+	}
+
+	getBoothdr(&hdr);
+	LOGD("write hdr\n");
+	fwrite(&hdr, 1, sizeof(rk_boot_header), outFile);
+
+	dataOffset = sizeof(rk_boot_header) +
+	             (gOpts.code471Num + gOpts.code472Num + gOpts.loaderNum) *
+	             sizeof(rk_boot_entry);
+
+	LOGD("write code 471 entry\n");
+	for (i = 0; i < gOpts.code471Num; i++) {
+		if (!saveEntry(outFile, (char *)gOpts.code471Path[i], ENTRY_471,
+		               gOpts.code471Sleep, &dataOffset, NULL, false))
+			goto end;
+	}
+	LOGD("write code 472 entry\n");
+	for (i = 0; i < gOpts.code472Num; i++) {
+		if (!saveEntry(outFile, (char *)gOpts.code472Path[i], ENTRY_472,
+		               gOpts.code472Sleep, &dataOffset, NULL, false))
+			goto end;
+	}
+	LOGD("write loader entry\n");
+	for (i = 0; i < gOpts.loaderNum; i++) {
+		if (!saveEntry(outFile, gOpts.loader[i].path, ENTRY_LOADER, 0, &dataOffset,
+		               gOpts.loader[i].name, true))
+			goto end;
+	}
+
+	LOGD("write code 471\n");
+	for (i = 0; i < gOpts.code471Num; i++) {
+		if (!writeFile(outFile, (char *)gOpts.code471Path[i], false))
+			goto end;
+	}
+	LOGD("write code 472\n");
+	for (i = 0; i < gOpts.code472Num; i++) {
+		if (!writeFile(outFile, (char *)gOpts.code472Path[i], false))
+			goto end;
+	}
+	LOGD("write loader\n");
+	for (i = 0; i < gOpts.loaderNum; i++) {
+		if (!writeFile(outFile, gOpts.loader[i].path, true))
+			goto end;
+	}
+	fflush(outFile);
+
+	LOGD("write crc\n");
+	crc = getCrc(gOpts.outPath);
+	if (!fwrite(&crc, sizeof(crc), 1, outFile))
+		goto end;
+
+	ret = true;
+end:
+	if (outFile)
+		fclose(outFile);
+	return ret;
+}
+
+/************merge code end************/
+/************unpack code***************/
+
+static inline void wide2str(const uint16_t *wide, char *str, int len)
+{
+	int i;
+	for (i = 0; i < len; i++) {
+		str[i] = (char)(wide[i] & 0xFF);
+	}
+	str[len] = 0;
+}
+
+static bool unpackEntry(rk_boot_entry *entry, const char *name, FILE *inFile)
+{
+	bool ret = false;
+	int size, i;
+	FILE *outFile = fopen(name, "wb+");
+	if (!outFile)
+		goto end;
+	printf("unpack entry(%s)\n", name);
+	fseek(inFile, entry->dataOffset, SEEK_SET);
+	size = entry->dataSize;
+	if (!fread(gBuf, size, 1, inFile))
+		goto end;
+	if (entry->type == ENTRY_LOADER) {
+		for (i = 0; i < size / SMALL_PACKET; i++)
+			P_RC4(gBuf + i * SMALL_PACKET, SMALL_PACKET);
+		if (size % SMALL_PACKET) {
+			P_RC4(gBuf + i * SMALL_PACKET, size - SMALL_PACKET * 512);
+		}
+	} else {
+		P_RC4(gBuf, size);
+	}
+	if (!fwrite(gBuf, size, 1, outFile))
+		goto end;
+	ret = true;
+end:
+	if (outFile)
+		fclose(outFile);
+	return ret;
+}
+
+static bool unpackBoot(char *path)
+{
+	bool ret = false;
+	FILE *inFile = fopen(path, "rb");
+	int entryNum, i;
+	char name[MAX_NAME_LEN];
+	rk_boot_entry *entrys;
+	if (!inFile) {
+		fprintf(stderr, "loader(%s) not found\n", path);
+		goto end;
+	}
+
+	rk_boot_header hdr;
+	if (!fread(&hdr, sizeof(rk_boot_header), 1, inFile)) {
+		fprintf(stderr, "read header failed\n");
+		goto end;
+	}
+
+	entryNum = hdr.code471Num + hdr.code472Num + hdr.loaderNum;
+	entrys = (rk_boot_entry *)malloc(sizeof(rk_boot_entry) * entryNum);
+	if (!fread(entrys, sizeof(rk_boot_entry) * entryNum, 1, inFile)) {
+		fprintf(stderr, "read data failed\n");
+		goto end;
+	}
+
+	LOGD("entry num:%d\n", entryNum);
+	for (i = 0; i < entryNum; i++) {
+		wide2str(entrys[i].name, name, MAX_NAME_LEN);
+
+		LOGD("entry:t=%d, name=%s, off=%d, size=%d\n", entrys[i].type, name,
+		     entrys[i].dataOffset, entrys[i].dataSize);
+		if (!unpackEntry(entrys + i, name, inFile)) {
+			fprintf(stderr, "unpack entry(%s) failed\n", name);
+			goto end;
+		}
+	}
+
+	ret = true;
+end:
+	if (inFile)
+		fclose(inFile);
+	return ret;
+}
+
+/************unpack code end***********/
+
+static void printHelp(void)
+{
+	printf("Usage1: boot_merger [options]... FILE\n");
+	printf("Merge or unpack Rockchip's loader (Default action is to merge.)\n");
+	printf("Options:\n");
+	printf("\t" OPT_MERGE "\t\t\tMerge loader with specified config.\n");
+	printf("\t" OPT_UNPACK "\t\tUnpack specified loader to current dir.\n");
+	printf("\t" OPT_VERBOSE "\t\tDisplay more runtime informations.\n");
+	printf("\t" OPT_HELP "\t\t\tDisplay this information.\n");
+	printf("\t" OPT_VERSION "\t\tDisplay version information.\n");
+	printf("\t" OPT_SUBFIX "\t\tSpec subfix.\n");
+	printf("\t" OPT_REPLACE "\t\tReplace some part of binary path.\n");
+	printf("\t" OPT_SIZE
+	       "\t\tImage size.\"--size [image KB size]\", must be 512KB aligned\n");
+	printf("Usage2: boot_merger [options] [parameter]\n");
+	printf("All below five option are must in this mode!\n");
+	printf("\t" OPT_CHIP "\t\tChip type, used for check with usbplug.\n");
+	printf("\t" OPT_471 "\t\t471 for download, ddr.bin.\n");
+	printf("\t" OPT_472 "\t\t472 for download, usbplug.bin.\n");
+	printf("\t" OPT_DATA "\t\tloader0 for flash, ddr.bin.\n");
+	printf("\t" OPT_BOOT "\t\tloader1 for flash, miniloader.bin.\n");
+	printf("\n./tools/boot_merger --pack --verbose -c RK322A -1 "
+	       "rkbin/rk322x_ddr_300MHz_v1.04.bin -2 "
+	       "rkbin/rk32/rk322x_usbplug_v2.32.bin -d "
+	       "rkbin/rk32/rk322x_ddr_300MHz_v1.04.bin -b "
+	       "rkbin/rk32/rk322x_miniloader_v2.32.bin\n");
+}
+
+int main(int argc, char **argv)
+{
+
+	int i;
+	bool merge = true;
+	char *optPath = NULL;
+
+	for (i = 1; i < argc; i++) {
+		if (!strcmp(OPT_VERBOSE, argv[i])) {
+			gDebug = true;
+			printf("enable debug\n");
+		} else if (!strcmp(OPT_HELP, argv[i])) {
+			printHelp();
+			return 0;
+		} else if (!strcmp(OPT_VERSION, argv[i])) {
+			printf("boot_merger (cjf@rock-chips.com)\t" VERSION "\n");
+			return 0;
+		} else if (!strcmp(OPT_MERGE, argv[i])) {
+			merge = true;
+		} else if (!strcmp(OPT_UNPACK, argv[i])) {
+			merge = false;
+		} else if (!strcmp(OPT_SUBFIX, argv[i])) {
+			i++;
+			snprintf(gSubfix, sizeof(gSubfix), "%s", argv[i]);
+		} else if (!strcmp(OPT_REPLACE, argv[i])) {
+			i++;
+			snprintf(gLegacyPath, sizeof(gLegacyPath), "%s", argv[i]);
+			i++;
+			snprintf(gNewPath, sizeof(gNewPath), "%s", argv[i]);
+		} else if (!strcmp(OPT_SIZE, argv[i])) {
+			g_merge_max_size = strtoul(argv[++i], NULL, 10);
+			if (g_merge_max_size % 512) {
+				printHelp();
+				return -1;
+			}
+			g_merge_max_size *= 1024; /* bytes */
+		} else {
+			optPath = argv[i];
+			break;
+		}
+	}
+	if (!merge && !optPath) {
+		fprintf(stderr, "need set out path to unpack!\n");
+		printHelp();
+		return -1;
+	}
+
+	gBuf = calloc(g_merge_max_size, 1);
+	if (!gBuf) {
+		LOGE("Merge image: calloc buffer error.\n");
+		return -1;
+	}
+
+	if (merge) {
+		LOGD("do_merge\n");
+		gConfigPath = optPath;
+		if (!mergeBoot(argc, argv)) {
+			fprintf(stderr, "merge failed!\n");
+			return -1;
+		}
+		printf("merge success(%s)\n", gOpts.outPath);
+	} else {
+		LOGD("do_unpack\n");
+		if (!unpackBoot(optPath)) {
+			fprintf(stderr, "unpack failed!\n");
+			return -1;
+		}
+		printf("unpack success\n");
+	}
+	return 0;
+}
diff --git a/tools/rockchip/boot_merger.h b/tools/rockchip/boot_merger.h
new file mode 100644
index 0000000000..ef25a2236d
--- /dev/null
+++ b/tools/rockchip/boot_merger.h
@@ -0,0 +1,201 @@
+/*
+ * (C) Copyright 2008-2015 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#ifndef BOOT_MERGER_H
+#define BOOT_MERGER_H
+
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <memory.h>
+#include <stdbool.h>
+
+/* #define DEBUG */
+
+extern bool gDebug;
+
+#define LOGE(fmt, args...) fprintf(stderr, "E: [%s] "fmt, __func__, ##args)
+#define LOGD(fmt, args...) do {\
+	if (gDebug) \
+	fprintf(stderr, "W: [%s] "fmt, __func__, ##args); \
+} while (0)
+
+
+#define SCANF_EAT(in)   fscanf(in, "%*[ \r\n\t/]")//, gEat)
+#define MAX_LINE_LEN        256
+extern char gEat[MAX_LINE_LEN];
+
+typedef char line_t[MAX_LINE_LEN];
+
+
+
+#define DEF_CONFIG_FILE     "CONFIG.ini"
+
+#define DEF_MAJOR           0
+#define DEF_MINOR           3
+#define DEF_CHIP            "RK30"
+#define DEF_CODE471_NUM     1
+#define DEF_CODE472_NUM     1
+#define DEF_CODE471_SLEEP   0
+#define DEF_CODE472_SLEEP   0
+#define DEF_CODE471_PATH    "30_LPDDR2_300MHz_DDR3_300MHz.bin"
+#define DEF_CODE472_PATH    "rk30usbplug.bin"
+#define DEF_LOADER_NUM      2
+#define DEF_LOADER0         "FlashData"
+#define DEF_LOADER0_PATH    "30_LPDDR2_300MHz_DDR3_300MHz.bin"
+#define DEF_LOADER1         "FlashBoot"
+#define DEF_LOADER1_PATH    "../../u-boot.bin"
+#define DEF_OUT_PATH        "../../RK30xxLoader_uboot.bin"
+
+#define OUT_SUBFIX          ".bin"
+
+#define SEC_CHIP            "[CHIP_NAME]"
+#define SEC_VERSION         "[VERSION]"
+#define SEC_471             "[CODE471_OPTION]"
+#define SEC_472             "[CODE472_OPTION]"
+#define SEC_LOADER          "[LOADER_OPTION]"
+#define SEC_OUT             "[OUTPUT]"
+
+#define OPT_NAME            "NAME"
+#define OPT_MAJOR           "MAJOR"
+#define OPT_MINOR           "MINOR"
+#define OPT_NUM             "NUM"
+#define OPT_LOADER_NUM      "LOADERCOUNT"
+#define OPT_PATH            "Path"
+#define OPT_SLEEP           "Sleep"
+#define OPT_LOADER_NAME     "LOADER"
+#define OPT_OUT_PATH        "PATH"
+
+typedef struct {
+	char       name[MAX_LINE_LEN];
+	char       path[MAX_LINE_LEN];
+} name_entry;
+
+typedef struct {
+	int         major;
+	int         minor;
+	char        chip[MAX_LINE_LEN];
+	int         code471Sleep;
+	int         code472Sleep;
+	int         code471Num;
+	int         code472Num;
+	line_t*     code471Path;
+	line_t*     code472Path;
+	int         loaderNum;
+	name_entry* loader;
+	char        outPath[MAX_LINE_LEN];
+} options;
+
+
+#define TAG						0x544F4F42
+#define MERGER_VERSION          0x01030000
+#define SMALL_PACKET			512
+
+#define MAX_NAME_LEN            20
+#define MAX_MERGE_SIZE          (512 << 10)
+
+#define SEC_CHIP_TYPES          "[CHIP_TYPES]"
+
+#define CHIP_RK28               "RK28"
+#define CHIP_RK281X             "RK281X"
+#define CHIP_RKPANDA            "RKPANDA"
+#define CHIP_RK27               "RK27"
+#define CHIP_RKNANO             "RKNANO"
+#define CHIP_RKSMART            "RKSMART"
+#define CHIP_RKCROWN            "RKCROWN"
+#define CHIP_RKCAYMAN           "RKCAYMAN"
+#define CHIP_RK29               "RK29"
+#define CHIP_RK292X             "RK292X"
+#define CHIP_RK30               "RK30"
+#define CHIP_RK30B              "RK30B"
+#define CHIP_RK31               "RK31"
+#define CHIP_RK32               "RK32"
+
+typedef enum {
+	RKNONE_DEVICE   =0,
+	RK27_DEVICE     =0x10,
+	RKCAYMAN_DEVICE =0x11,
+	RK28_DEVICE     =0x20,
+	RK281X_DEVICE   =0x21,
+	RKPANDA_DEVICE  =0x22,
+	RKNANO_DEVICE   =0x30,
+	RKSMART_DEVICE  =0x31,
+	RKCROWN_DEVICE  =0x40,
+	RK29_DEVICE     =0x50,
+	RK292X_DEVICE   =0x51,
+	RK30_DEVICE     =0x60,
+	RK30B_DEVICE    =0x61,
+	RK31_DEVICE     =0x70,
+	RK32_DEVICE     =0x80
+} rk_chip_type;
+
+typedef enum {
+	ENTRY_471       =1,
+	ENTRY_472       =2,
+	ENTRY_LOADER    =4,
+} rk_entry_type;
+
+#pragma pack(1)
+typedef struct {
+	uint16_t  year;
+	uint8_t   month;
+	uint8_t   day;
+	uint8_t   hour;
+	uint8_t   minute;
+	uint8_t   second;
+} rk_time;
+
+#define  BOOT_RESERVED_SIZE 57
+typedef struct {
+	uint32_t        tag;
+	uint16_t        size;
+	uint32_t        version;
+	uint32_t        mergerVersion;
+	rk_time         releaseTime;
+	uint32_t        chipType;
+	uint8_t         code471Num;
+	uint32_t        code471Offset;
+	uint8_t         code471Size;
+	uint8_t         code472Num;
+	uint32_t        code472Offset;
+	uint8_t         code472Size;
+	uint8_t         loaderNum;
+	uint32_t        loaderOffset;
+	uint8_t         loaderSize;
+	uint8_t         signFlag;
+	uint8_t         rc4Flag;
+	uint8_t         reserved[BOOT_RESERVED_SIZE];
+} rk_boot_header;
+
+typedef struct {
+	uint8_t         size;
+	rk_entry_type   type;
+	uint16_t        name[MAX_NAME_LEN];
+	uint32_t        dataOffset;
+	uint32_t        dataSize;
+	uint32_t        dataDelay;
+} rk_boot_entry;
+#pragma pack()
+
+#define OPT_VERBOSE         "--verbose"
+#define OPT_HELP            "--help"
+#define OPT_VERSION         "--version"
+#define OPT_MERGE           "--pack"
+#define OPT_UNPACK          "--unpack"
+#define OPT_SUBFIX          "--subfix"
+#define OPT_REPLACE         "--replace"
+#define OPT_SIZE	    "--size"
+
+#define OPT_CHIP	"-c"
+#define OPT_471		"-1"
+#define OPT_472		"-2"
+#define	OPT_DATA	"-d"
+#define	OPT_BOOT	"-b"
+#define	OPT_OUT		"-o"
+
+
+#define VERSION             "2013-8-12 14:27:23"
+
+#endif/* BOOT_MERGER_H */
diff --git a/tools/rockchip/checksum.c b/tools/rockchip/checksum.c
new file mode 100644
index 0000000000..15304cd426
--- /dev/null
+++ b/tools/rockchip/checksum.c
@@ -0,0 +1,118 @@
+/*
+ * (C) Copyright 2008-2015 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#include <sys/stat.h>
+#include <stdio.h>
+#include <stdint.h>
+#include <u-boot/crc.h>
+
+extern uint32_t crc32_rk(uint32_t, const unsigned char *, uint32_t);
+
+#define SZ_4M 0x00400000
+#define SZ_16M 0x01000000
+#define SZ_32M 0x02000000
+#define RK_BLK_SIZE 512
+
+void usage(const char *prog)
+{
+	fprintf(stderr, "Usage: %s <image>\n", prog);
+}
+
+/*
+ * Neutralize little endians.
+ */
+uint32_t le_uint32(uint32_t x)
+{
+	uint32_t val;
+	uint8_t *p = (uint8_t *)(&x);
+
+	val = (*p++ & 0xff) << 0;
+	val |= (*p++ & 0xff) << 8;
+	val |= (*p++ & 0xff) << 16;
+	val |= (*p & 0xff) << 24;
+
+	return val;
+}
+
+int main(int argc, char *argv[])
+{
+	FILE *fp;
+	uint32_t blocks = 0;
+
+	fp = fopen(argv[1], "rb");
+	if (!fp) {
+		perror(argv[1]);
+		return -1;
+	}
+
+	struct stat sb;
+	int ret = stat(argv[1], &sb);
+	if (!fp || ret) {
+		perror(argv[1]);
+		return -1;
+	}
+	blocks = sb.st_size / RK_BLK_SIZE;
+	if (sb.st_size % RK_BLK_SIZE) {
+		printf("size should align %d", RK_BLK_SIZE);
+		return -1;
+	}
+
+	printf("totle blocks:0x%08x\n", blocks);
+
+#ifdef CONFIG_FASTBOOT_TRANSFER_BUFFER_SIZE_EACH
+	uint32_t buf_size = CONFIG_FASTBOOT_TRANSFER_BUFFER_SIZE_EACH;
+#else
+	uint32_t buf_size = 16 * 1024 * 1024;
+#endif
+	void *buf = malloc(buf_size);
+	uint16_t buf_blocks = buf_size / RK_BLK_SIZE;
+	uint32_t offset = 0;
+#ifndef CONFIG_QUICK_CHECKSUM
+	uint32_t *crc_array = (uint32_t *)malloc(buf_size);
+	uint16_t crc_counts = 0;
+	uint32_t checksum = 0;
+#else
+	long long unsigned int checksum = 0;
+#endif
+	while (blocks > 0) {
+		uint16_t read_blocks = blocks > buf_blocks ? buf_blocks : blocks;
+
+		if (fread(buf, read_blocks * RK_BLK_SIZE, 1, fp) != 1) {
+			printf("read failed, offset:0x%08x, blocks:0x%08x\n", offset,
+			       read_blocks);
+			return -1;
+		}
+		offset += read_blocks;
+		blocks -= read_blocks;
+#ifndef CONFIG_QUICK_CHECKSUM
+		crc_array[crc_counts] = crc32_rk(0, buf, read_blocks * RK_BLK_SIZE);
+		printf("offset:0x%08x, blocks:0x%08x, crc:0x%08x\n", offset, read_blocks,
+		       crc_array[crc_counts]);
+		crc_counts++;
+#else
+		int i = 0;
+		uint32_t *data = (uint32_t *)buf;
+		for (i = 0; i<read_blocks *RK_BLK_SIZE>> 2; i++)
+			checksum += le_uint32(data[i]);
+		printf("offset:0x%08x, blocks:0x%08x, checksum:0x%016llx\n", offset,
+		       read_blocks, checksum);
+#endif
+	}
+
+#ifndef CONFIG_QUICK_CHECKSUM
+	/* 3:compute whole checksum */
+	checksum = (crc_counts == 1) ? crc_array[0]
+	           : crc32_rk(0, (unsigned char *)crc_array,
+	                      sizeof(uint32_t) * crc_counts);
+	printf("whole checksum:0x%08x\n", checksum);
+	free(crc_array);
+#else
+	printf("whole checksum:0x%016llx\n", checksum);
+#endif
+	free(buf);
+
+	fclose(fp);
+	return 0;
+}
diff --git a/tools/rockchip/crc32_rk.c b/tools/rockchip/crc32_rk.c
new file mode 100644
index 0000000000..13619aa67a
--- /dev/null
+++ b/tools/rockchip/crc32_rk.c
@@ -0,0 +1,101 @@
+/*
+ * (C) Copyright 2008-2015 Fuzhou Rockchip Electronics Co., Ltd
+ * Peter, Software Engineering, <superpeter.cai@gmail.com>.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifdef USE_HOSTCC
+#include <arpa/inet.h>
+#else
+#include <common.h>
+#endif
+#include <compiler.h>
+#include <u-boot/crc.h>
+#include "u-boot/zlib.h"
+
+#define tole(x) cpu_to_le32(x)
+
+/* ========================================================================
+ * Table of CRC-32's of all single-byte values (made by make_crc_table)
+ */
+static const uint32_t crc_table[256] = {
+	tole(0x00000000L), tole(0x04c10db7L), tole(0x09821b6eL), tole(0x0d4316d9L),
+	tole(0x130436dcL), tole(0x17c53b6bL), tole(0x1a862db2L), tole(0x1e472005L),
+	tole(0x26086db8L), tole(0x22c9600fL), tole(0x2f8a76d6L), tole(0x2b4b7b61L),
+	tole(0x350c5b64L), tole(0x31cd56d3L), tole(0x3c8e400aL), tole(0x384f4dbdL),
+	tole(0x4c10db70L), tole(0x48d1d6c7L), tole(0x4592c01eL), tole(0x4153cda9L),
+	tole(0x5f14edacL), tole(0x5bd5e01bL), tole(0x5696f6c2L), tole(0x5257fb75L),
+	tole(0x6a18b6c8L), tole(0x6ed9bb7fL), tole(0x639aada6L), tole(0x675ba011L),
+	tole(0x791c8014L), tole(0x7ddd8da3L), tole(0x709e9b7aL), tole(0x745f96cdL),
+	tole(0x9821b6e0L), tole(0x9ce0bb57L), tole(0x91a3ad8eL), tole(0x9562a039L),
+	tole(0x8b25803cL), tole(0x8fe48d8bL), tole(0x82a79b52L), tole(0x866696e5L),
+	tole(0xbe29db58L), tole(0xbae8d6efL), tole(0xb7abc036L), tole(0xb36acd81L),
+	tole(0xad2ded84L), tole(0xa9ece033L), tole(0xa4aff6eaL), tole(0xa06efb5dL),
+	tole(0xd4316d90L), tole(0xd0f06027L), tole(0xddb376feL), tole(0xd9727b49L),
+	tole(0xc7355b4cL), tole(0xc3f456fbL), tole(0xceb74022L), tole(0xca764d95L),
+	tole(0xf2390028L), tole(0xf6f80d9fL), tole(0xfbbb1b46L), tole(0xff7a16f1L),
+	tole(0xe13d36f4L), tole(0xe5fc3b43L), tole(0xe8bf2d9aL), tole(0xec7e202dL),
+	tole(0x34826077L), tole(0x30436dc0L), tole(0x3d007b19L), tole(0x39c176aeL),
+	tole(0x278656abL), tole(0x23475b1cL), tole(0x2e044dc5L), tole(0x2ac54072L),
+	tole(0x128a0dcfL), tole(0x164b0078L), tole(0x1b0816a1L), tole(0x1fc91b16L),
+	tole(0x018e3b13L), tole(0x054f36a4L), tole(0x080c207dL), tole(0x0ccd2dcaL),
+	tole(0x7892bb07L), tole(0x7c53b6b0L), tole(0x7110a069L), tole(0x75d1addeL),
+	tole(0x6b968ddbL), tole(0x6f57806cL), tole(0x621496b5L), tole(0x66d59b02L),
+	tole(0x5e9ad6bfL), tole(0x5a5bdb08L), tole(0x5718cdd1L), tole(0x53d9c066L),
+	tole(0x4d9ee063L), tole(0x495fedd4L), tole(0x441cfb0dL), tole(0x40ddf6baL),
+	tole(0xaca3d697L), tole(0xa862db20L), tole(0xa521cdf9L), tole(0xa1e0c04eL),
+	tole(0xbfa7e04bL), tole(0xbb66edfcL), tole(0xb625fb25L), tole(0xb2e4f692L),
+	tole(0x8aabbb2fL), tole(0x8e6ab698L), tole(0x8329a041L), tole(0x87e8adf6L),
+	tole(0x99af8df3L), tole(0x9d6e8044L), tole(0x902d969dL), tole(0x94ec9b2aL),
+	tole(0xe0b30de7L), tole(0xe4720050L), tole(0xe9311689L), tole(0xedf01b3eL),
+	tole(0xf3b73b3bL), tole(0xf776368cL), tole(0xfa352055L), tole(0xfef42de2L),
+	tole(0xc6bb605fL), tole(0xc27a6de8L), tole(0xcf397b31L), tole(0xcbf87686L),
+	tole(0xd5bf5683L), tole(0xd17e5b34L), tole(0xdc3d4dedL), tole(0xd8fc405aL),
+	tole(0x6904c0eeL), tole(0x6dc5cd59L), tole(0x6086db80L), tole(0x6447d637L),
+	tole(0x7a00f632L), tole(0x7ec1fb85L), tole(0x7382ed5cL), tole(0x7743e0ebL),
+	tole(0x4f0cad56L), tole(0x4bcda0e1L), tole(0x468eb638L), tole(0x424fbb8fL),
+	tole(0x5c089b8aL), tole(0x58c9963dL), tole(0x558a80e4L), tole(0x514b8d53L),
+	tole(0x25141b9eL), tole(0x21d51629L), tole(0x2c9600f0L), tole(0x28570d47L),
+	tole(0x36102d42L), tole(0x32d120f5L), tole(0x3f92362cL), tole(0x3b533b9bL),
+	tole(0x031c7626L), tole(0x07dd7b91L), tole(0x0a9e6d48L), tole(0x0e5f60ffL),
+	tole(0x101840faL), tole(0x14d94d4dL), tole(0x199a5b94L), tole(0x1d5b5623L),
+	tole(0xf125760eL), tole(0xf5e47bb9L), tole(0xf8a76d60L), tole(0xfc6660d7L),
+	tole(0xe22140d2L), tole(0xe6e04d65L), tole(0xeba35bbcL), tole(0xef62560bL),
+	tole(0xd72d1bb6L), tole(0xd3ec1601L), tole(0xdeaf00d8L), tole(0xda6e0d6fL),
+	tole(0xc4292d6aL), tole(0xc0e820ddL), tole(0xcdab3604L), tole(0xc96a3bb3L),
+	tole(0xbd35ad7eL), tole(0xb9f4a0c9L), tole(0xb4b7b610L), tole(0xb076bba7L),
+	tole(0xae319ba2L), tole(0xaaf09615L), tole(0xa7b380ccL), tole(0xa3728d7bL),
+	tole(0x9b3dc0c6L), tole(0x9ffccd71L), tole(0x92bfdba8L), tole(0x967ed61fL),
+	tole(0x8839f61aL), tole(0x8cf8fbadL), tole(0x81bbed74L), tole(0x857ae0c3L),
+	tole(0x5d86a099L), tole(0x5947ad2eL), tole(0x5404bbf7L), tole(0x50c5b640L),
+	tole(0x4e829645L), tole(0x4a439bf2L), tole(0x47008d2bL), tole(0x43c1809cL),
+	tole(0x7b8ecd21L), tole(0x7f4fc096L), tole(0x720cd64fL), tole(0x76cddbf8L),
+	tole(0x688afbfdL), tole(0x6c4bf64aL), tole(0x6108e093L), tole(0x65c9ed24L),
+	tole(0x11967be9L), tole(0x1557765eL), tole(0x18146087L), tole(0x1cd56d30L),
+	tole(0x02924d35L), tole(0x06534082L), tole(0x0b10565bL), tole(0x0fd15becL),
+	tole(0x379e1651L), tole(0x335f1be6L), tole(0x3e1c0d3fL), tole(0x3add0088L),
+	tole(0x249a208dL), tole(0x205b2d3aL), tole(0x2d183be3L), tole(0x29d93654L),
+	tole(0xc5a71679L), tole(0xc1661bceL), tole(0xcc250d17L), tole(0xc8e400a0L),
+	tole(0xd6a320a5L), tole(0xd2622d12L), tole(0xdf213bcbL), tole(0xdbe0367cL),
+	tole(0xe3af7bc1L), tole(0xe76e7676L), tole(0xea2d60afL), tole(0xeeec6d18L),
+	tole(0xf0ab4d1dL), tole(0xf46a40aaL), tole(0xf9295673L), tole(0xfde85bc4L),
+	tole(0x89b7cd09L), tole(0x8d76c0beL), tole(0x8035d667L), tole(0x84f4dbd0L),
+	tole(0x9ab3fbd5L), tole(0x9e72f662L), tole(0x9331e0bbL), tole(0x97f0ed0cL),
+	tole(0xafbfa0b1L), tole(0xab7ead06L), tole(0xa63dbbdfL), tole(0xa2fcb668L),
+	tole(0xbcbb966dL), tole(0xb87a9bdaL), tole(0xb5398d03L), tole(0xb1f880b4L)
+};
+
+/* ========================================================================= */
+#define DO_CRC(x) crc = tab[((crc >> 24) ^ (x)) & 255] ^ (crc << 8)
+uint32_t crc32_rk(uint32_t crc, const unsigned char *s, uint32_t len)
+{
+	const uint32_t *tab;
+	tab = crc_table;
+	crc = cpu_to_le32(crc);
+	do {
+		DO_CRC(*s++);
+	} while (--len);
+	return le32_to_cpu(crc);
+}
+#undef DO_CRC
diff --git a/tools/rockchip/loaderimage.c b/tools/rockchip/loaderimage.c
new file mode 100644
index 0000000000..1a98f72de9
--- /dev/null
+++ b/tools/rockchip/loaderimage.c
@@ -0,0 +1,366 @@
+/*
+ * (C) Copyright 2008-2015 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#include "compiler.h"
+#include <version.h>
+#include "sha.h"
+#include <u-boot/sha256.h>
+#include <u-boot/crc.h>
+#include <linux/sizes.h>
+#include <linux/kconfig.h>
+#include <config.h>
+
+extern uint32_t crc32_rk(uint32_t, const unsigned char *, uint32_t);
+
+#define OPT_PACK "--pack"
+#define OPT_UNPACK "--unpack"
+#define OPT_UBOOT "--uboot"
+#define OPT_TRUSTOS "--trustos"
+#define OPT_SIZE "--size"
+#define OPT_VERSION "--version"
+#define OPT_INFO "--info"
+
+/* pack or unpack */
+#define MODE_PACK 0
+#define MODE_UNPACK 1
+#define MODE_INFO 2
+#define CONFIG_SECUREBOOT_SHA256
+
+/* image type */
+#define IMAGE_UBOOT 0
+#define IMAGE_TRUST 1
+
+/* magic and hash size */
+#define LOADER_MAGIC_SIZE 8
+#define LOADER_HASH_SIZE 32
+
+/* uboot image config */
+#define UBOOT_NAME "uboot"
+#ifdef CONFIG_RK_NVME_BOOT_EN
+#define UBOOT_NUM 2
+#define UBOOT_MAX_SIZE 512 * 1024
+#else
+#define UBOOT_NUM 4
+#define UBOOT_MAX_SIZE 1024 * 1024
+#endif
+
+#define UBOOT_VERSION_STRING                                                   \
+  U_BOOT_VERSION " (" U_BOOT_DATE " - " U_BOOT_TIME ")" CONFIG_IDENT_STRING
+
+#define RK_UBOOT_MAGIC "LOADER  "
+#define RK_UBOOT_RUNNING_ADDR CONFIG_SYS_TEXT_BASE
+
+/* trust image config */
+#define TRUST_NAME "trustos"
+#define TRUST_NUM 4
+#define TRUST_MAX_SIZE 1024 * 1024
+#define TRUST_VERSION_STRING "Trust os"
+
+#define RK_TRUST_MAGIC "TOS     "
+#define RK_TRUST_RUNNING_ADDR (CONFIG_SYS_TEXT_BASE + SZ_128M + SZ_4M)
+
+typedef struct tag_second_loader_hdr {
+	uint8_t magic[LOADER_MAGIC_SIZE]; /* magic */
+	uint32_t version;
+	uint32_t reserved0;
+	uint32_t loader_load_addr;      /* physical load addr */
+	uint32_t loader_load_size;      /* size in bytes */
+	uint32_t crc32;                 /* crc32 */
+	uint32_t hash_len;              /* 20 or 32 , 0 is no hash */
+	uint8_t hash[LOADER_HASH_SIZE]; /* sha */
+
+	uint8_t reserved[1024 - 32 - 32];
+	uint32_t signTag;     /* 0x4E474953 */
+	uint32_t signlen;     /* maybe 128 or 256 */
+	uint8_t rsaHash[256]; /* maybe 128 or 256, using max size 256 */
+	uint8_t reserved2[2048 - 1024 - 256 - 8];
+} second_loader_hdr;
+
+void usage(const char *prog)
+{
+	fprintf(stderr, "Usage: %s [--pack|--unpack] [--uboot|--trustos]\
+		file_in "
+	        "file_out [load_addr]  [--size] [size number]\
+		[--version] "
+	        "[version] | [--info] [file]\n",
+	        prog);
+}
+
+unsigned int str2hex(char *str)
+{
+	int i = 0;
+	unsigned int value = 0;
+
+	if (*str == '0' && (*(str + 1) == 'x' || *(str + 1) == 'X'))
+		str += 2;
+	if (*str == 'x' || *str == 'X')
+		str += 1;
+
+	for (i = 0; *str != '\0'; i++, ++str) {
+		if (*str >= '0' && *str <= '9')
+			value = value * 16 + *str - '0';
+		else if (*str >= 'a' && *str <= 'f')
+			value = value * 16 + *str - 'a' + 10;
+		else if (*str >= 'A' && *str <= 'F')
+			value = value * 16 + *str - 'A' + 10;
+		else
+			break;
+	}
+	return value;
+}
+
+int main(int argc, char *argv[])
+{
+	int mode = -1, image = -1;
+	int max_size, max_num;
+	int size, i;
+	uint32_t loader_addr, in_loader_addr = -1;
+	char *magic, *version, *name;
+	FILE *fi, *fo;
+	second_loader_hdr hdr;
+	char *buf = 0;
+	uint32_t in_size = 0, in_num = 0;
+	char *file_in = NULL, *file_out = NULL;
+	uint32_t curr_version = 0;
+
+	if (argc < 3) {
+		usage(argv[0]);
+		exit(EXIT_FAILURE);
+	}
+
+	for (i = 1; i < argc; i++) {
+		if (!strcmp(argv[i], OPT_PACK)) {
+			mode = MODE_PACK;
+		} else if (!strcmp(argv[i], OPT_UNPACK)) {
+			mode = MODE_UNPACK;
+		} else if (!strcmp(argv[i], OPT_UBOOT)) {
+			image = IMAGE_UBOOT;
+			file_in = argv[++i];
+			file_out = argv[++i];
+			/* detect whether loader address is delivered */
+			if ((argv[i + 1]) && (strncmp(argv[i + 1], "--", 2)))
+				in_loader_addr = str2hex(argv[++i]);
+		} else if (!strcmp(argv[i], OPT_TRUSTOS)) {
+			image = IMAGE_TRUST;
+			file_in = argv[++i];
+			file_out = argv[++i];
+			/* detect whether loader address is delivered */
+			if ((argv[i + 1]) && (strncmp(argv[i + 1], "--", 2)))
+				in_loader_addr = str2hex(argv[++i]);
+		} else if (!strcmp(argv[i], OPT_SIZE)) {
+			in_size = strtoul(argv[++i], NULL, 10);
+			/*
+			 * Usually, it must be at 512kb align due to preloader
+			 * detects every 512kb. But some product has critial
+			 * flash size requirement, we have to make it small than
+			 * 512KB.
+			 */
+			if (in_size % 64) {
+				usage(argv[0]);
+				exit(EXIT_FAILURE);
+			}
+			in_size *= 1024;
+
+			in_num = strtoul(argv[++i], NULL, 10);
+		} else if (!strcmp(argv[i], OPT_VERSION)) {
+			curr_version = strtoul(argv[++i], NULL, 10);
+			printf("curr_version = 0x%x\n", curr_version);
+		} else if (!strcmp(argv[i], OPT_INFO)) {
+			mode = MODE_INFO;
+			file_in = argv[++i];
+		} else {
+			usage(argv[0]);
+			exit(EXIT_FAILURE);
+		}
+	}
+
+	/* config image information */
+	if (image == IMAGE_UBOOT) {
+		name = UBOOT_NAME;
+		magic = RK_UBOOT_MAGIC;
+		version = UBOOT_VERSION_STRING;
+		max_size = in_size ? in_size : UBOOT_MAX_SIZE;
+		max_num = in_num ? in_num : UBOOT_NUM;
+		loader_addr =
+		        (in_loader_addr == -1) ? RK_UBOOT_RUNNING_ADDR : in_loader_addr;
+	} else if (image == IMAGE_TRUST) {
+		name = TRUST_NAME;
+		magic = RK_TRUST_MAGIC;
+		version = TRUST_VERSION_STRING;
+		max_size = in_size ? in_size : TRUST_MAX_SIZE;
+		max_num = in_num ? in_num : TRUST_NUM;
+		loader_addr =
+		        (in_loader_addr == -1) ? RK_TRUST_RUNNING_ADDR : in_loader_addr;
+	} else if (mode == MODE_INFO) {
+
+	} else {
+		exit(EXIT_FAILURE);
+	}
+
+	if (mode == MODE_PACK) {
+		buf = calloc(max_size, max_num);
+		if (!buf) {
+			perror(file_out);
+			exit(EXIT_FAILURE);
+		}
+		printf("\n load addr is 0x%x!\n", loader_addr);
+		if (!file_in || !file_out) {
+			usage(argv[0]);
+			exit(EXIT_FAILURE);
+		}
+
+		/* file in */
+		fi = fopen(file_in, "rb");
+		if (!fi) {
+			perror(file_in);
+			exit(EXIT_FAILURE);
+		}
+
+		/* file out */
+		fo = fopen(file_out, "wb");
+		if (!fo) {
+			perror(file_out);
+			exit(EXIT_FAILURE);
+		}
+
+		printf("pack input %s \n", file_in);
+		fseek(fi, 0, SEEK_END);
+		size = ftell(fi);
+		fseek(fi, 0, SEEK_SET);
+		printf("pack file size: %d \n", size);
+		if (size > max_size - sizeof(second_loader_hdr)) {
+			perror(file_out);
+			exit(EXIT_FAILURE);
+		}
+		memset(&hdr, 0, sizeof(second_loader_hdr));
+		memcpy((char *)hdr.magic, magic, LOADER_MAGIC_SIZE);
+		hdr.version = curr_version;
+		hdr.loader_load_addr = loader_addr;
+		if (!fread(buf + sizeof(second_loader_hdr), size, 1, fi))
+			exit(EXIT_FAILURE);
+
+		/* Aligned size to 4-byte, Rockchip HW Crypto need 4-byte align */
+		size = (((size + 3) >> 2) << 2);
+		hdr.loader_load_size = size;
+
+		hdr.crc32 = crc32_rk(
+		                    0, (const unsigned char *)buf + sizeof(second_loader_hdr), size);
+		printf("crc = 0x%08x\n", hdr.crc32);
+
+#ifndef CONFIG_SECUREBOOT_SHA256
+		SHA_CTX ctx;
+		uint8_t *sha;
+		hdr.hash_len = (SHA_DIGEST_SIZE > LOADER_HASH_SIZE) ? LOADER_HASH_SIZE
+		               : SHA_DIGEST_SIZE;
+		SHA_init(&ctx);
+		SHA_update(&ctx, buf + sizeof(second_loader_hdr), size);
+		if (hdr.version > 0)
+			SHA_update(&ctx, (void *)&hdr.version, 8);
+
+		SHA_update(&ctx, &hdr.loader_load_addr, sizeof(hdr.loader_load_addr));
+		SHA_update(&ctx, &hdr.loader_load_size, sizeof(hdr.loader_load_size));
+		SHA_update(&ctx, &hdr.hash_len, sizeof(hdr.hash_len));
+		sha = (uint8_t *)SHA_final(&ctx);
+		memcpy(hdr.hash, sha, hdr.hash_len);
+#else
+		sha256_context ctx;
+		uint8_t hash[LOADER_HASH_SIZE];
+
+		memset(hash, 0, LOADER_HASH_SIZE);
+
+		hdr.hash_len = 32; /* sha256 */
+		sha256_starts(&ctx);
+		sha256_update(&ctx, (void *)buf + sizeof(second_loader_hdr), size);
+		if (hdr.version > 0)
+			sha256_update(&ctx, (void *)&hdr.version, 8);
+
+		sha256_update(&ctx, (void *)&hdr.loader_load_addr,
+		              sizeof(hdr.loader_load_addr));
+		sha256_update(&ctx, (void *)&hdr.loader_load_size,
+		              sizeof(hdr.loader_load_size));
+		sha256_update(&ctx, (void *)&hdr.hash_len, sizeof(hdr.hash_len));
+		sha256_finish(&ctx, hash);
+		memcpy(hdr.hash, hash, hdr.hash_len);
+#endif /* CONFIG_SECUREBOOT_SHA256 */
+
+		printf("%s version: %s\n", name, version);
+		memcpy(buf, &hdr, sizeof(second_loader_hdr));
+		for (i = 0; i < max_num; i++)
+			fwrite(buf, max_size, 1, fo);
+
+		printf("pack %s success! \n", file_out);
+		fclose(fi);
+		fclose(fo);
+	} else if (mode == MODE_UNPACK) {
+		buf = calloc(max_size, max_num);
+		if (!buf) {
+			perror(file_out);
+			exit(EXIT_FAILURE);
+		}
+		if (!file_in || !file_out) {
+			usage(argv[0]);
+			exit(EXIT_FAILURE);
+		}
+
+		/* file in */
+		fi = fopen(file_in, "rb");
+		if (!fi) {
+			perror(file_in);
+			exit(EXIT_FAILURE);
+		}
+
+		/* file out */
+		fo = fopen(file_out, "wb");
+		if (!fo) {
+			perror(file_out);
+			exit(EXIT_FAILURE);
+		}
+
+		printf("unpack input %s \n", file_in);
+		memset(&hdr, 0, sizeof(second_loader_hdr));
+		if (!fread(&hdr, sizeof(second_loader_hdr), 1, fi))
+			exit(EXIT_FAILURE);
+
+		if (!fread(buf, hdr.loader_load_size, 1, fi))
+			exit(EXIT_FAILURE);
+
+		fwrite(buf, hdr.loader_load_size, 1, fo);
+		printf("unpack %s success! \n", file_out);
+		fclose(fi);
+		fclose(fo);
+	} else if (mode == MODE_INFO) {
+		second_loader_hdr *hdr;
+
+		hdr = malloc(sizeof(struct tag_second_loader_hdr));
+		if (hdr == NULL) {
+			printf("Memory error!\n");
+			exit(EXIT_FAILURE);
+		}
+		/* file in */
+		fi = fopen(file_in, "rb");
+		if (!fi) {
+			perror(file_in);
+			exit(EXIT_FAILURE);
+		}
+
+		if (!fread(hdr, sizeof(struct tag_second_loader_hdr), 1, fi))
+			exit(EXIT_FAILURE);
+
+		if (!(memcmp(RK_UBOOT_MAGIC, hdr->magic, 5)) ||
+		    !(memcmp(RK_TRUST_MAGIC, hdr->magic, 3))) {
+			printf("The image info:\n");
+			printf("Rollback index is %d\n", hdr->version);
+			printf("Load Addr is 0x%x\n", hdr->loader_load_addr);
+		} else {
+			printf("Please input the correct file.\n");
+		}
+
+		fclose(fi);
+		free(hdr);
+	}
+	free(buf);
+
+	return 0;
+}
diff --git a/tools/rockchip/resource_tool.c b/tools/rockchip/resource_tool.c
new file mode 100644
index 0000000000..217ad31a2e
--- /dev/null
+++ b/tools/rockchip/resource_tool.c
@@ -0,0 +1,1009 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2008-2015 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <errno.h>
+#include <memory.h>
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdbool.h>
+#include <sys/stat.h>
+#include <time.h>
+
+/* #define DEBUG */
+
+static bool g_debug =
+#ifdef DEBUG
+        true;
+#else
+        false;
+#endif /* DEBUG */
+
+#define LOGE(fmt, args...)                                                     \
+  fprintf(stderr, "E/%s(%d): " fmt "\n", __func__, __LINE__, ##args)
+#define LOGD(fmt, args...)                                                     \
+  do {                                                                         \
+    if (g_debug)                                                               \
+      fprintf(stderr, "D/%s(%d): " fmt "\n", __func__, __LINE__, ##args);      \
+  } while (0)
+
+/* sync with ./board/rockchip/rk30xx/rkloader.c #define FDT_PATH */
+#define FDT_PATH "rk-kernel.dtb"
+#define DTD_SUBFIX ".dtb"
+
+#define DEFAULT_IMAGE_PATH "resource.img"
+#define DEFAULT_UNPACK_DIR "out"
+#define BLOCK_SIZE 512
+
+#define RESOURCE_PTN_HDR_SIZE 1
+#define INDEX_TBL_ENTR_SIZE 1
+
+#define RESOURCE_PTN_VERSION 0
+#define INDEX_TBL_VERSION 0
+
+#define RESOURCE_PTN_HDR_MAGIC "RSCE"
+typedef struct {
+	char magic[4]; /* tag, "RSCE" */
+	uint16_t resource_ptn_version;
+	uint16_t index_tbl_version;
+	uint8_t header_size;    /* blocks, size of ptn header. */
+	uint8_t tbl_offset;     /* blocks, offset of index table. */
+	uint8_t tbl_entry_size; /* blocks, size of index table's entry. */
+	uint32_t tbl_entry_num; /* numbers of index table's entry. */
+} resource_ptn_header;
+
+#define INDEX_TBL_ENTR_TAG "ENTR"
+#define MAX_INDEX_ENTRY_PATH_LEN 256
+typedef struct {
+	char tag[4]; /* tag, "ENTR" */
+	char path[MAX_INDEX_ENTRY_PATH_LEN];
+	uint32_t content_offset; /* blocks, offset of resource content. */
+	uint32_t content_size;   /* bytes, size of resource content. */
+} index_tbl_entry;
+
+#define OPT_VERBOSE "--verbose"
+#define OPT_HELP "--help"
+#define OPT_VERSION "--version"
+#define OPT_PRINT "--print"
+#define OPT_PACK "--pack"
+#define OPT_UNPACK "--unpack"
+#define OPT_TEST_LOAD "--test_load"
+#define OPT_TEST_CHARGE "--test_charge"
+#define OPT_IMAGE "--image="
+#define OPT_ROOT "--root="
+
+#define VERSION "2014-5-31 14:43:42"
+
+typedef struct {
+	char path[MAX_INDEX_ENTRY_PATH_LEN];
+	uint32_t content_offset; /* blocks, offset of resource content. */
+	uint32_t content_size;   /* bytes, size of resource content. */
+	void *load_addr;
+} resource_content;
+
+typedef struct {
+	int max_level;
+	int num;
+	int delay;
+	char prefix[MAX_INDEX_ENTRY_PATH_LEN];
+} anim_level_conf;
+
+#define DEF_CHARGE_DESC_PATH "charge_anim_desc.txt"
+
+#define OPT_CHARGE_ANIM_DELAY "delay="
+#define OPT_CHARGE_ANIM_LOOP_CUR "only_current_level="
+#define OPT_CHARGE_ANIM_LEVELS "levels="
+#define OPT_CHARGE_ANIM_LEVEL_CONF "max_level="
+#define OPT_CHARGE_ANIM_LEVEL_NUM "num="
+#define OPT_CHARGE_ANIM_LEVEL_PFX "prefix="
+
+static char image_path[MAX_INDEX_ENTRY_PATH_LEN] = "\0";
+
+static int fix_blocks(size_t size)
+{
+	return (size + BLOCK_SIZE - 1) / BLOCK_SIZE;
+}
+
+static const char *fix_path(const char *path)
+{
+	if (!memcmp(path, "./", 2)) {
+		return path + 2;
+	}
+	return path;
+}
+
+static uint16_t switch_short(uint16_t x)
+{
+	uint16_t val;
+	uint8_t *p = (uint8_t *)(&x);
+
+	val = (*p++ & 0xff) << 0;
+	val |= (*p & 0xff) << 8;
+
+	return val;
+}
+
+static uint32_t switch_int(uint32_t x)
+{
+	uint32_t val;
+	uint8_t *p = (uint8_t *)(&x);
+
+	val = (*p++ & 0xff) << 0;
+	val |= (*p++ & 0xff) << 8;
+	val |= (*p++ & 0xff) << 16;
+	val |= (*p & 0xff) << 24;
+
+	return val;
+}
+
+static void fix_header(resource_ptn_header *header)
+{
+	/* switch for be. */
+	header->resource_ptn_version = switch_short(header->resource_ptn_version);
+	header->index_tbl_version = switch_short(header->index_tbl_version);
+	header->tbl_entry_num = switch_int(header->tbl_entry_num);
+}
+
+static void fix_entry(index_tbl_entry *entry)
+{
+	/* switch for be. */
+	entry->content_offset = switch_int(entry->content_offset);
+	entry->content_size = switch_int(entry->content_size);
+}
+
+static int inline get_ptn_offset(void)
+{
+	return 0;
+}
+
+static bool StorageWriteLba(int offset_block, void *data, int blocks)
+{
+	bool ret = false;
+	FILE *file = fopen(image_path, "rb+");
+	if (!file)
+		goto end;
+	int offset = offset_block * BLOCK_SIZE;
+	fseek(file, offset, SEEK_SET);
+	if (offset != ftell(file)) {
+		LOGE("Failed to seek %s to %d!", image_path, offset);
+		goto end;
+	}
+	if (!fwrite(data, blocks * BLOCK_SIZE, 1, file)) {
+		LOGE("Failed to write %s!", image_path);
+		goto end;
+	}
+	ret = true;
+end:
+	if (file)
+		fclose(file);
+	return ret;
+}
+
+static bool StorageReadLba(int offset_block, void *data, int blocks)
+{
+	bool ret = false;
+	FILE *file = fopen(image_path, "rb");
+	if (!file)
+		goto end;
+	int offset = offset_block * BLOCK_SIZE;
+	fseek(file, offset, SEEK_SET);
+	if (offset != ftell(file)) {
+		goto end;
+	}
+	if (!fread(data, blocks * BLOCK_SIZE, 1, file)) {
+		goto end;
+	}
+	ret = true;
+end:
+	if (file)
+		fclose(file);
+	return ret;
+}
+
+static bool write_data(int offset_block, void *data, size_t len)
+{
+	bool ret = false;
+	if (!data)
+		goto end;
+	int blocks = len / BLOCK_SIZE;
+	if (blocks && !StorageWriteLba(offset_block, data, blocks)) {
+		goto end;
+	}
+	int left = len % BLOCK_SIZE;
+	if (left) {
+		char buf[BLOCK_SIZE] = "\0";
+		memcpy(buf, data + blocks * BLOCK_SIZE, left);
+		if (!StorageWriteLba(offset_block + blocks, buf, 1))
+			goto end;
+	}
+	ret = true;
+end:
+	return ret;
+}
+
+/**********************load test************************/
+static int load_file(const char *file_path, int offset_block, int blocks);
+
+static int test_load(int argc, char **argv)
+{
+	if (argc < 1) {
+		LOGE("Nothing to load!");
+		return -1;
+	}
+	const char *file_path;
+	int offset_block = 0;
+	int blocks = 0;
+	if (argc > 0) {
+		file_path = (const char *)fix_path(argv[0]);
+		argc--, argv++;
+	}
+	if (argc > 0) {
+		offset_block = atoi(argv[0]);
+		argc--, argv++;
+	}
+	if (argc > 0) {
+		blocks = atoi(argv[0]);
+	}
+	return load_file(file_path, offset_block, blocks);
+}
+
+static void free_content(resource_content *content)
+{
+	if (content->load_addr) {
+		free(content->load_addr);
+		content->load_addr = 0;
+	}
+}
+
+static void tests_dump_file(const char *path, void *data, int len)
+{
+	FILE *file = fopen(path, "wb");
+	if (!file)
+		return;
+	fwrite(data, len, 1, file);
+	fclose(file);
+}
+
+static bool load_content(resource_content *content)
+{
+	if (content->load_addr)
+		return true;
+	int blocks = fix_blocks(content->content_size);
+	content->load_addr = malloc(blocks * BLOCK_SIZE);
+	if (!content->load_addr)
+		return false;
+	if (!StorageReadLba(get_ptn_offset() + content->content_offset,
+	                    content->load_addr, blocks)) {
+		free_content(content);
+		return false;
+	}
+
+	tests_dump_file(content->path, content->load_addr, content->content_size);
+	return true;
+}
+
+static bool load_content_data(resource_content *content, int offset_block,
+                              void *data, int blocks)
+{
+	if (!StorageReadLba(get_ptn_offset() + content->content_offset + offset_block,
+	                    data, blocks)) {
+		return false;
+	}
+	tests_dump_file(content->path, data, blocks * BLOCK_SIZE);
+	return true;
+}
+
+static bool get_entry(const char *file_path, index_tbl_entry *entry)
+{
+	bool ret = false;
+	char buf[BLOCK_SIZE];
+	resource_ptn_header header;
+	if (!StorageReadLba(get_ptn_offset(), buf, 1)) {
+		LOGE("Failed to read header!");
+		goto end;
+	}
+	memcpy(&header, buf, sizeof(header));
+
+	if (memcmp(header.magic, RESOURCE_PTN_HDR_MAGIC, sizeof(header.magic))) {
+		LOGE("Not a resource image(%s)!", image_path);
+		goto end;
+	}
+	/* test on pc, switch for be. */
+	fix_header(&header);
+
+	/* TODO: support header_size & tbl_entry_size */
+	if (header.resource_ptn_version != RESOURCE_PTN_VERSION ||
+	    header.header_size != RESOURCE_PTN_HDR_SIZE ||
+	    header.index_tbl_version != INDEX_TBL_VERSION ||
+	    header.tbl_entry_size != INDEX_TBL_ENTR_SIZE) {
+		LOGE("Not supported in this version!");
+		goto end;
+	}
+
+	int i;
+	for (i = 0; i < header.tbl_entry_num; i++) {
+		/* TODO: support tbl_entry_size */
+		if (!StorageReadLba(
+		            get_ptn_offset() + header.header_size + i * header.tbl_entry_size,
+		            buf, 1)) {
+			LOGE("Failed to read index entry:%d!", i);
+			goto end;
+		}
+		memcpy(entry, buf, sizeof(*entry));
+
+		if (memcmp(entry->tag, INDEX_TBL_ENTR_TAG, sizeof(entry->tag))) {
+			LOGE("Something wrong with index entry:%d!", i);
+			goto end;
+		}
+
+		if (!strncmp(entry->path, file_path, sizeof(entry->path)))
+			break;
+	}
+	if (i == header.tbl_entry_num) {
+		LOGE("Cannot find %s!", file_path);
+		goto end;
+	}
+	/* test on pc, switch for be. */
+	fix_entry(entry);
+
+	printf("Found entry:\n\tpath:%s\n\toffset:%d\tsize:%d\n", entry->path,
+	       entry->content_offset, entry->content_size);
+
+	ret = true;
+end:
+	return ret;
+}
+
+static bool get_content(resource_content *content)
+{
+	bool ret = false;
+	index_tbl_entry entry;
+	if (!get_entry(content->path, &entry))
+		goto end;
+	content->content_offset = entry.content_offset;
+	content->content_size = entry.content_size;
+	ret = true;
+end:
+	return ret;
+}
+
+static int load_file(const char *file_path, int offset_block, int blocks)
+{
+	printf("Try to load:%s", file_path);
+	if (blocks) {
+		printf(", offset block:%d, blocks:%d\n", offset_block, blocks);
+	} else {
+		printf("\n");
+	}
+	bool ret = false;
+	resource_content content;
+	snprintf(content.path, sizeof(content.path), "%s", file_path);
+	content.load_addr = 0;
+	if (!get_content(&content)) {
+		goto end;
+	}
+	if (!blocks) {
+		if (!load_content(&content)) {
+			goto end;
+		}
+	} else {
+		void *data = malloc(blocks * BLOCK_SIZE);
+		if (!data)
+			goto end;
+		if (!load_content_data(&content, offset_block, data, blocks)) {
+			goto end;
+		}
+	}
+	ret = true;
+end:
+	free_content(&content);
+	return ret;
+}
+
+/**********************load test end************************/
+/**********************anim test************************/
+
+static bool parse_level_conf(const char *arg, anim_level_conf *level_conf)
+{
+	memset(level_conf, 0, sizeof(anim_level_conf));
+	char *buf = NULL;
+	buf = strstr(arg, OPT_CHARGE_ANIM_LEVEL_CONF);
+	if (buf) {
+		level_conf->max_level = atoi(buf + strlen(OPT_CHARGE_ANIM_LEVEL_CONF));
+	} else {
+		LOGE("Not found:%s", OPT_CHARGE_ANIM_LEVEL_CONF);
+		return false;
+	}
+	buf = strstr(arg, OPT_CHARGE_ANIM_LEVEL_NUM);
+	if (buf) {
+		level_conf->num = atoi(buf + strlen(OPT_CHARGE_ANIM_LEVEL_NUM));
+		if (level_conf->num <= 0) {
+			return false;
+		}
+	} else {
+		LOGE("Not found:%s", OPT_CHARGE_ANIM_LEVEL_NUM);
+		return false;
+	}
+	buf = strstr(arg, OPT_CHARGE_ANIM_DELAY);
+	if (buf) {
+		level_conf->delay = atoi(buf + strlen(OPT_CHARGE_ANIM_DELAY));
+	}
+	buf = strstr(arg, OPT_CHARGE_ANIM_LEVEL_PFX);
+	if (buf) {
+		snprintf(level_conf->prefix, sizeof(level_conf->prefix), "%s",
+		         buf + strlen(OPT_CHARGE_ANIM_LEVEL_PFX));
+	} else {
+		LOGE("Not found:%s", OPT_CHARGE_ANIM_LEVEL_PFX);
+		return false;
+	}
+
+	LOGD("Found conf:\nmax_level:%d, num:%d, delay:%d, prefix:%s",
+	     level_conf->max_level, level_conf->num, level_conf->delay,
+	     level_conf->prefix);
+	return true;
+}
+
+static int test_charge(int argc, char **argv)
+{
+	const char *desc;
+	if (argc > 0) {
+		desc = argv[0];
+	} else {
+		desc = DEF_CHARGE_DESC_PATH;
+	}
+
+	resource_content content;
+	snprintf(content.path, sizeof(content.path), "%s", desc);
+	content.load_addr = 0;
+	if (!get_content(&content)) {
+		goto end;
+	}
+	if (!load_content(&content)) {
+		goto end;
+	}
+
+	char *buf = (char *)content.load_addr;
+	char *end = buf + content.content_size - 1;
+	*end = '\0';
+	LOGD("desc:\n%s", buf);
+
+	int pos = 0;
+	while (1) {
+		char *line = (char *)memchr(buf + pos, '\n', strlen(buf + pos));
+		if (!line)
+			break;
+		*line = '\0';
+		LOGD("splite:%s", buf + pos);
+		pos += (strlen(buf + pos) + 1);
+	}
+
+	int delay = 900;
+	int only_current_level = false;
+	anim_level_conf *level_confs = NULL;
+	int level_conf_pos = 0;
+	int level_conf_num = 0;
+
+	while (true) {
+		if (buf >= end)
+			break;
+		const char *arg = buf;
+		buf += (strlen(buf) + 1);
+
+		LOGD("parse arg:%s", arg);
+		if (!memcmp(arg, OPT_CHARGE_ANIM_LEVEL_CONF,
+		            strlen(OPT_CHARGE_ANIM_LEVEL_CONF))) {
+			if (!level_confs) {
+				LOGE("Found level conf before levels!");
+				goto end;
+			}
+			if (level_conf_pos >= level_conf_num) {
+				LOGE("Too many level confs!(%d >= %d)", level_conf_pos, level_conf_num);
+				goto end;
+			}
+			if (!parse_level_conf(arg, level_confs + level_conf_pos)) {
+				LOGE("Failed to parse level conf:%s", arg);
+				goto end;
+			}
+			level_conf_pos++;
+		} else if (!memcmp(arg, OPT_CHARGE_ANIM_DELAY,
+		                   strlen(OPT_CHARGE_ANIM_DELAY))) {
+			delay = atoi(arg + strlen(OPT_CHARGE_ANIM_DELAY));
+			LOGD("Found delay:%d", delay);
+		} else if (!memcmp(arg, OPT_CHARGE_ANIM_LOOP_CUR,
+		                   strlen(OPT_CHARGE_ANIM_LOOP_CUR))) {
+			only_current_level =
+			        !memcmp(arg + strlen(OPT_CHARGE_ANIM_LOOP_CUR), "true", 4);
+			LOGD("Found only_current_level:%d", only_current_level);
+		} else if (!memcmp(arg, OPT_CHARGE_ANIM_LEVELS,
+		                   strlen(OPT_CHARGE_ANIM_LEVELS))) {
+			if (level_conf_num) {
+				goto end;
+			}
+			level_conf_num = atoi(arg + strlen(OPT_CHARGE_ANIM_LEVELS));
+			if (!level_conf_num) {
+				goto end;
+			}
+			level_confs =
+			        (anim_level_conf *)malloc(level_conf_num * sizeof(anim_level_conf));
+			LOGD("Found levels:%d", level_conf_num);
+		} else {
+			LOGE("Unknown arg:%s", arg);
+			goto end;
+		}
+	}
+
+	if (level_conf_pos != level_conf_num || !level_conf_num) {
+		LOGE("Something wrong with level confs!");
+		goto end;
+	}
+
+	int i = 0, j = 0;
+	for (i = 0; i < level_conf_num; i++) {
+		if (!level_confs[i].delay) {
+			level_confs[i].delay = delay;
+		}
+		if (!level_confs[i].delay) {
+			LOGE("Missing delay in level conf:%d", i);
+			goto end;
+		}
+		for (j = 0; j < i; j++) {
+			if (level_confs[j].max_level == level_confs[i].max_level) {
+				LOGE("Dup level conf:%d", i);
+				goto end;
+			}
+			if (level_confs[j].max_level > level_confs[i].max_level) {
+				anim_level_conf conf = level_confs[i];
+				memmove(level_confs + j + 1, level_confs + j,
+				        (i - j) * sizeof(anim_level_conf));
+				level_confs[j] = conf;
+			}
+		}
+	}
+
+	printf("Parse anim desc(%s):\n", desc);
+	printf("only_current_level=%d\n", only_current_level);
+	printf("level conf:\n");
+	for (i = 0; i < level_conf_num; i++) {
+		printf("\tmax=%d, delay=%d, num=%d, prefix=%s\n", level_confs[i].max_level,
+		       level_confs[i].delay, level_confs[i].num, level_confs[i].prefix);
+	}
+
+end:
+	free_content(&content);
+	return 0;
+}
+
+/**********************anim test end************************/
+/**********************append file************************/
+
+static const char *PROG = NULL;
+static resource_ptn_header header;
+static bool just_print = false;
+static char root_path[MAX_INDEX_ENTRY_PATH_LEN] = "\0";
+
+static void version(void)
+{
+	printf("%s (cjf@rock-chips.com)\t" VERSION "\n", PROG);
+}
+
+static void usage(void)
+{
+	printf("Usage: %s [options] [FILES]\n", PROG);
+	printf("Tools for Rockchip's resource image.\n");
+	version();
+	printf("Options:\n");
+	printf("\t" OPT_PACK "\t\t\tPack image from given files.\n");
+	printf("\t" OPT_UNPACK "\t\tUnpack given image to current dir.\n");
+	printf("\t" OPT_IMAGE "path"
+	       "\t\tSpecify input/output image path.\n");
+	printf("\t" OPT_PRINT "\t\t\tJust print informations.\n");
+	printf("\t" OPT_VERBOSE "\t\tDisplay more runtime informations.\n");
+	printf("\t" OPT_HELP "\t\t\tDisplay this information.\n");
+	printf("\t" OPT_VERSION "\t\tDisplay version information.\n");
+	printf("\t" OPT_ROOT "path"
+	       "\t\tSpecify resources' root dir.\n");
+}
+
+static int pack_image(int file_num, const char **files);
+static int unpack_image(const char *unpack_dir);
+
+enum ACTION {
+	ACTION_PACK,
+	ACTION_UNPACK,
+	ACTION_TEST_LOAD,
+	ACTION_TEST_CHARGE,
+};
+
+int main(int argc, char **argv)
+{
+	PROG = fix_path(argv[0]);
+
+	enum ACTION action = ACTION_PACK;
+
+	argc--, argv++;
+	while (argc > 0 && argv[0][0] == '-') {
+		/* it's a opt arg. */
+		const char *arg = argv[0];
+		argc--, argv++;
+		if (!strcmp(OPT_VERBOSE, arg)) {
+			g_debug = true;
+		} else if (!strcmp(OPT_HELP, arg)) {
+			usage();
+			return 0;
+		} else if (!strcmp(OPT_VERSION, arg)) {
+			version();
+			return 0;
+		} else if (!strcmp(OPT_PRINT, arg)) {
+			just_print = true;
+		} else if (!strcmp(OPT_PACK, arg)) {
+			action = ACTION_PACK;
+		} else if (!strcmp(OPT_UNPACK, arg)) {
+			action = ACTION_UNPACK;
+		} else if (!strcmp(OPT_TEST_LOAD, arg)) {
+			action = ACTION_TEST_LOAD;
+		} else if (!strcmp(OPT_TEST_CHARGE, arg)) {
+			action = ACTION_TEST_CHARGE;
+		} else if (!memcmp(OPT_IMAGE, arg, strlen(OPT_IMAGE))) {
+			snprintf(image_path, sizeof(image_path), "%s", arg + strlen(OPT_IMAGE));
+		} else if (!memcmp(OPT_ROOT, arg, strlen(OPT_ROOT))) {
+			snprintf(root_path, sizeof(root_path), "%s", arg + strlen(OPT_ROOT));
+		} else {
+			LOGE("Unknown opt:%s", arg);
+			usage();
+			return -1;
+		}
+	}
+
+	if (!image_path[0]) {
+		snprintf(image_path, sizeof(image_path), "%s", DEFAULT_IMAGE_PATH);
+	}
+
+	switch (action) {
+	case ACTION_PACK: {
+		int file_num = argc;
+		const char **files = (const char **)argv;
+		if (!file_num) {
+			LOGE("No file to pack!");
+			return 0;
+		}
+		LOGD("try to pack %d files.", file_num);
+		return pack_image(file_num, files);
+	}
+	case ACTION_UNPACK: {
+		return unpack_image(argc > 0 ? argv[0] : DEFAULT_UNPACK_DIR);
+	}
+	case ACTION_TEST_LOAD: {
+		return test_load(argc, argv);
+	}
+	case ACTION_TEST_CHARGE: {
+		return test_charge(argc, argv);
+	}
+	}
+	/* not reach here. */
+	return -1;
+}
+
+/************unpack code****************/
+static bool mkdirs(char *path)
+{
+	char *tmp = path;
+	char *pos = NULL;
+	char buf[MAX_INDEX_ENTRY_PATH_LEN];
+	bool ret = true;
+	while ((pos = memchr(tmp, '/', strlen(tmp)))) {
+		strcpy(buf, path);
+		buf[pos - path] = '\0';
+		tmp = pos + 1;
+		LOGD("mkdir:%s", buf);
+		if (!mkdir(buf, 0755)) {
+			ret = false;
+		}
+	}
+	if (!ret)
+		LOGD("Failed to mkdir(%s)!", path);
+	return ret;
+}
+
+static bool dump_file(FILE *file, const char *unpack_dir,
+                      index_tbl_entry entry)
+{
+	LOGD("try to dump entry:%s", entry.path);
+	bool ret = false;
+	FILE *out_file = NULL;
+	long int pos = 0;
+	char path[MAX_INDEX_ENTRY_PATH_LEN * 2 + 1];
+	if (just_print) {
+		ret = true;
+		goto done;
+	}
+
+	pos = ftell(file);
+	snprintf(path, sizeof(path), "%s/%s", unpack_dir, entry.path);
+	mkdirs(path);
+	out_file = fopen(path, "wb");
+	if (!out_file) {
+		LOGE("Failed to create:%s", path);
+		goto end;
+	}
+	long int offset = entry.content_offset * BLOCK_SIZE;
+	fseek(file, offset, SEEK_SET);
+	if (offset != ftell(file)) {
+		LOGE("Failed to read content:%s", entry.path);
+		goto end;
+	}
+	char buf[BLOCK_SIZE];
+	int n;
+	int len = entry.content_size;
+	while (len > 0) {
+		n = len > BLOCK_SIZE ? BLOCK_SIZE : len;
+		if (!fread(buf, n, 1, file)) {
+			LOGE("Failed to read content:%s", entry.path);
+			goto end;
+		}
+		if (!fwrite(buf, n, 1, out_file)) {
+			LOGE("Failed to write:%s", entry.path);
+			goto end;
+		}
+		len -= n;
+	}
+done:
+	ret = true;
+end:
+	if (out_file)
+		fclose(out_file);
+	if (pos)
+		fseek(file, pos, SEEK_SET);
+	return ret;
+}
+
+static int unpack_image(const char *dir)
+{
+	FILE *image_file = NULL;
+	bool ret = false;
+	char unpack_dir[MAX_INDEX_ENTRY_PATH_LEN];
+	if (just_print)
+		dir = ".";
+	snprintf(unpack_dir, sizeof(unpack_dir), "%s", dir);
+	if (!strlen(unpack_dir)) {
+		goto end;
+	} else if (unpack_dir[strlen(unpack_dir) - 1] == '/') {
+		unpack_dir[strlen(unpack_dir) - 1] = '\0';
+	}
+
+	mkdir(unpack_dir, 0755);
+	image_file = fopen(image_path, "rb");
+	char buf[BLOCK_SIZE];
+	if (!image_file) {
+		LOGE("Failed to open:%s", image_path);
+		goto end;
+	}
+	if (!fread(buf, BLOCK_SIZE, 1, image_file)) {
+		LOGE("Failed to read header!");
+		goto end;
+	}
+	memcpy(&header, buf, sizeof(header));
+
+	if (memcmp(header.magic, RESOURCE_PTN_HDR_MAGIC, sizeof(header.magic))) {
+		LOGE("Not a resource image(%s)!", image_path);
+		goto end;
+	}
+	/* switch for be. */
+	fix_header(&header);
+
+	printf("Dump header:\n");
+	printf("partition version:%d.%d\n", header.resource_ptn_version,
+	       header.index_tbl_version);
+	printf("header size:%d\n", header.header_size);
+	printf("index tbl:\n\toffset:%d\tentry size:%d\tentry num:%d\n",
+	       header.tbl_offset, header.tbl_entry_size, header.tbl_entry_num);
+
+	/* TODO: support header_size & tbl_entry_size */
+	if (header.resource_ptn_version != RESOURCE_PTN_VERSION ||
+	    header.header_size != RESOURCE_PTN_HDR_SIZE ||
+	    header.index_tbl_version != INDEX_TBL_VERSION ||
+	    header.tbl_entry_size != INDEX_TBL_ENTR_SIZE) {
+		LOGE("Not supported in this version!");
+		goto end;
+	}
+
+	printf("Dump Index table:\n");
+	index_tbl_entry entry;
+	int i;
+	for (i = 0; i < header.tbl_entry_num; i++) {
+		/* TODO: support tbl_entry_size */
+		if (!fread(buf, BLOCK_SIZE, 1, image_file)) {
+			LOGE("Failed to read index entry:%d!", i);
+			goto end;
+		}
+		memcpy(&entry, buf, sizeof(entry));
+
+		if (memcmp(entry.tag, INDEX_TBL_ENTR_TAG, sizeof(entry.tag))) {
+			LOGE("Something wrong with index entry:%d!", i);
+			goto end;
+		}
+		/* switch for be. */
+		fix_entry(&entry);
+
+		printf("entry(%d):\n\tpath:%s\n\toffset:%d\tsize:%d\n", i, entry.path,
+		       entry.content_offset, entry.content_size);
+		if (!dump_file(image_file, unpack_dir, entry)) {
+			goto end;
+		}
+	}
+	printf("Unack %s to %s successed!\n", image_path, unpack_dir);
+	ret = true;
+end:
+	if (image_file)
+		fclose(image_file);
+	return ret ? 0 : -1;
+}
+
+/************unpack code end****************/
+/************pack code****************/
+
+static inline size_t get_file_size(const char *path)
+{
+	LOGD("try to get size(%s)...", path);
+	struct stat st;
+	if (stat(path, &st) < 0) {
+		LOGE("Failed to get size:%s", path);
+		return -1;
+	}
+	LOGD("path:%s, size:%ld", path, st.st_size);
+	return st.st_size;
+}
+
+static int write_file(int offset_block, const char *src_path)
+{
+	LOGD("try to write file(%s) to offset:%d...", src_path, offset_block);
+	char buf[BLOCK_SIZE];
+	int ret = -1;
+	size_t file_size;
+	int blocks;
+	FILE *src_file = fopen(src_path, "rb");
+	if (!src_file) {
+		LOGE("Failed to open:%s", src_path);
+		goto end;
+	}
+
+	file_size = get_file_size(src_path);
+	if (file_size < 0) {
+		goto end;
+	}
+	blocks = fix_blocks(file_size);
+
+	int i;
+	for (i = 0; i < blocks; i++) {
+		memset(buf, 0, sizeof(buf));
+		if (!fread(buf, 1, BLOCK_SIZE, src_file)) {
+			LOGE("Failed to read:%s", src_path);
+			goto end;
+		}
+		if (!write_data(offset_block + i, buf, BLOCK_SIZE)) {
+			goto end;
+		}
+	}
+	ret = blocks;
+end:
+	if (src_file)
+		fclose(src_file);
+	return ret;
+}
+
+static bool write_header(const int file_num)
+{
+	LOGD("try to write header...");
+	memcpy(header.magic, RESOURCE_PTN_HDR_MAGIC, sizeof(header.magic));
+	header.resource_ptn_version = RESOURCE_PTN_VERSION;
+	header.index_tbl_version = INDEX_TBL_VERSION;
+	header.header_size = RESOURCE_PTN_HDR_SIZE;
+	header.tbl_offset = header.header_size;
+	header.tbl_entry_size = INDEX_TBL_ENTR_SIZE;
+	header.tbl_entry_num = file_num;
+
+	/* switch for le. */
+	resource_ptn_header hdr = header;
+	fix_header(&hdr);
+	return write_data(0, &hdr, sizeof(hdr));
+}
+
+static bool write_index_tbl(const int file_num, const char **files)
+{
+	LOGD("try to write index table...");
+	bool ret = false;
+	bool foundFdt = false;
+	int offset =
+	        header.header_size + header.tbl_entry_size * header.tbl_entry_num;
+	index_tbl_entry entry;
+	memcpy(entry.tag, INDEX_TBL_ENTR_TAG, sizeof(entry.tag));
+	int i;
+	for (i = 0; i < file_num; i++) {
+		size_t file_size = get_file_size(files[i]);
+		if (file_size < 0)
+			goto end;
+		entry.content_size = file_size;
+		entry.content_offset = offset;
+
+		if (write_file(offset, files[i]) < 0)
+			goto end;
+
+		LOGD("try to write index entry(%s)...", files[i]);
+
+		/* switch for le. */
+		fix_entry(&entry);
+		memset(entry.path, 0, sizeof(entry.path));
+		const char *path = files[i];
+		if (root_path[0]) {
+			if (!strncmp(path, root_path, strlen(root_path))) {
+				path += strlen(root_path);
+				if (path[0] == '/')
+					path++;
+			}
+		}
+		path = fix_path(path);
+		if (!strcmp(files[i] + strlen(files[i]) - strlen(DTD_SUBFIX), DTD_SUBFIX)) {
+			if (!foundFdt) {
+				/* use default path. */
+				LOGD("mod fdt path:%s -> %s...", files[i], FDT_PATH);
+				path = FDT_PATH;
+				foundFdt = true;
+			}
+		}
+		snprintf(entry.path, sizeof(entry.path), "%s", path);
+		offset += fix_blocks(file_size);
+		if (!write_data(header.header_size + i * header.tbl_entry_size, &entry,
+		                sizeof(entry)))
+			goto end;
+	}
+	ret = true;
+end:
+	return ret;
+}
+
+static int pack_image(int file_num, const char **files)
+{
+	bool ret = false;
+	FILE *image_file = fopen(image_path, "wb");
+	if (!image_file) {
+		LOGE("Failed to create:%s", image_path);
+		goto end;
+	}
+	fclose(image_file);
+
+	/* prepare files */
+	int i = 0;
+	int pos = 0;
+	const char *tmp;
+	for (i = 0; i < file_num; i++) {
+		if (!strcmp(files[i] + strlen(files[i]) - strlen(DTD_SUBFIX), DTD_SUBFIX)) {
+			/* dtb files for kernel. */
+			tmp = files[pos];
+			files[pos] = files[i];
+			files[i] = tmp;
+			pos++;
+		} else if (!strcmp(fix_path(image_path), fix_path(files[i]))) {
+			/* not to pack image itself! */
+			tmp = files[file_num - 1];
+			files[file_num - 1] = files[i];
+			files[i] = tmp;
+			file_num--;
+		}
+	}
+
+	if (!write_header(file_num)) {
+		LOGE("Failed to write header!");
+		goto end;
+	}
+	if (!write_index_tbl(file_num, files)) {
+		LOGE("Failed to write index table!");
+		goto end;
+	}
+	printf("Pack to %s successed!\n", image_path);
+	ret = true;
+end:
+	return ret ? 0 : -1;
+}
+
+/************pack code end****************/
diff --git a/tools/rockchip/sha.c b/tools/rockchip/sha.c
new file mode 100644
index 0000000000..b26fa740f8
--- /dev/null
+++ b/tools/rockchip/sha.c
@@ -0,0 +1,320 @@
+/* sha.c
+**
+** Copyright 2008, The Android Open Source Project
+**
+** Redistribution and use in source and binary forms, with or without
+** modification, are permitted provided that the following conditions are met:
+**     * Redistributions of source code must retain the above copyright
+**       notice, this list of conditions and the following disclaimer.
+**     * Redistributions in binary form must reproduce the above copyright
+**       notice, this list of conditions and the following disclaimer in the
+**       documentation and/or other materials provided with the distribution.
+**     * Neither the name of Google Inc. nor the names of its contributors may
+**       be used to endorse or promote products derived from this software
+**       without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY Google Inc. ``AS IS'' AND ANY EXPRESS OR
+** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+** MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO
+** EVENT SHALL Google Inc. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+** SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+** PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+** OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+** WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+** OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+** ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#include "sha.h"
+
+/*
+ Some machines lack byteswap.h and endian.h.  These have to use the
+ slower code, even if they're little-endian.
+*/
+
+#if defined(HAVE_ENDIAN_H) && defined(HAVE_LITTLE_ENDIAN)
+
+#include <byteswap.h>
+#include <memory.h>
+
+/*
+ This version is about 28% faster than the generic version below,
+ but assumes little-endianness.
+*/
+
+static inline uint32_t ror27(uint32_t val)
+{
+	return (val >> 27) | (val << 5);
+}
+static inline uint32_t ror2(uint32_t val)
+{
+	return (val >> 2) | (val << 30);
+}
+static inline uint32_t ror31(uint32_t val)
+{
+	return (val >> 31) | (val << 1);
+}
+
+static void SHA1_Transform(SHA_CTX *ctx)
+{
+	uint32_t W[80];
+	register uint32_t A, B, C, D, E;
+	int t;
+
+	A = ctx->state[0];
+	B = ctx->state[1];
+	C = ctx->state[2];
+	D = ctx->state[3];
+	E = ctx->state[4];
+
+#define SHA_F1(A, B, C, D, E, t)                                               \
+  E += ror27(A) + (W[t] = bswap_32(ctx->buf.w[t])) + (D ^ (B & (C ^ D))) +     \
+       0x5A827999;                                                             \
+  B = ror2(B);
+
+	for (t = 0; t < 15; t += 5) {
+		SHA_F1(A, B, C, D, E, t + 0);
+		SHA_F1(E, A, B, C, D, t + 1);
+		SHA_F1(D, E, A, B, C, t + 2);
+		SHA_F1(C, D, E, A, B, t + 3);
+		SHA_F1(B, C, D, E, A, t + 4);
+	}
+	SHA_F1(A, B, C, D, E, t + 0); /* 16th one, t == 15 */
+
+#undef SHA_F1
+
+#define SHA_F1(A, B, C, D, E, t)                                               \
+  E +=                                                                         \
+      ror27(A) + (W[t] = ror31(W[t - 3] ^ W[t - 8] ^ W[t - 14] ^ W[t - 16])) + \
+      (D ^ (B & (C ^ D))) + 0x5A827999;                                        \
+  B = ror2(B);
+
+	SHA_F1(E, A, B, C, D, t + 1);
+	SHA_F1(D, E, A, B, C, t + 2);
+	SHA_F1(C, D, E, A, B, t + 3);
+	SHA_F1(B, C, D, E, A, t + 4);
+
+#undef SHA_F1
+
+#define SHA_F2(A, B, C, D, E, t)                                               \
+  E +=                                                                         \
+      ror27(A) + (W[t] = ror31(W[t - 3] ^ W[t - 8] ^ W[t - 14] ^ W[t - 16])) + \
+      (B ^ C ^ D) + 0x6ED9EBA1;                                                \
+  B = ror2(B);
+
+	for (t = 20; t < 40; t += 5) {
+		SHA_F2(A, B, C, D, E, t + 0);
+		SHA_F2(E, A, B, C, D, t + 1);
+		SHA_F2(D, E, A, B, C, t + 2);
+		SHA_F2(C, D, E, A, B, t + 3);
+		SHA_F2(B, C, D, E, A, t + 4);
+	}
+
+#undef SHA_F2
+
+#define SHA_F3(A, B, C, D, E, t)                                               \
+  E +=                                                                         \
+      ror27(A) + (W[t] = ror31(W[t - 3] ^ W[t - 8] ^ W[t - 14] ^ W[t - 16])) + \
+      ((B & C) | (D & (B | C))) + 0x8F1BBCDC;                                  \
+  B = ror2(B);
+
+	for (; t < 60; t += 5) {
+		SHA_F3(A, B, C, D, E, t + 0);
+		SHA_F3(E, A, B, C, D, t + 1);
+		SHA_F3(D, E, A, B, C, t + 2);
+		SHA_F3(C, D, E, A, B, t + 3);
+		SHA_F3(B, C, D, E, A, t + 4);
+	}
+
+#undef SHA_F3
+
+#define SHA_F4(A, B, C, D, E, t)                                               \
+  E +=                                                                         \
+      ror27(A) + (W[t] = ror31(W[t - 3] ^ W[t - 8] ^ W[t - 14] ^ W[t - 16])) + \
+      (B ^ C ^ D) + 0xCA62C1D6;                                                \
+  B = ror2(B);
+
+	for (; t < 80; t += 5) {
+		SHA_F4(A, B, C, D, E, t + 0);
+		SHA_F4(E, A, B, C, D, t + 1);
+		SHA_F4(D, E, A, B, C, t + 2);
+		SHA_F4(C, D, E, A, B, t + 3);
+		SHA_F4(B, C, D, E, A, t + 4);
+	}
+
+#undef SHA_F4
+
+	ctx->state[0] += A;
+	ctx->state[1] += B;
+	ctx->state[2] += C;
+	ctx->state[3] += D;
+	ctx->state[4] += E;
+}
+
+void SHA_update(SHA_CTX *ctx, const void *data, int len)
+{
+	int i = ctx->count % sizeof(ctx->buf);
+	const uint8_t *p = (const uint8_t *)data;
+
+	ctx->count += len;
+
+	while (len > sizeof(ctx->buf) - i) {
+		memcpy(&ctx->buf.b[i], p, sizeof(ctx->buf) - i);
+		len -= sizeof(ctx->buf) - i;
+		p += sizeof(ctx->buf) - i;
+		SHA1_Transform(ctx);
+		i = 0;
+	}
+
+	while (len--) {
+		ctx->buf.b[i++] = *p++;
+		if (i == sizeof(ctx->buf)) {
+			SHA1_Transform(ctx);
+			i = 0;
+		}
+	}
+}
+
+const uint8_t *SHA_final(SHA_CTX *ctx)
+{
+	uint64_t cnt = ctx->count * 8;
+	int i;
+
+	SHA_update(ctx, (uint8_t *)"\x80", 1);
+	while ((ctx->count % sizeof(ctx->buf)) != (sizeof(ctx->buf) - 8)) {
+		SHA_update(ctx, (uint8_t *)"\0", 1);
+	}
+	for (i = 0; i < 8; ++i) {
+		uint8_t tmp = cnt >> ((7 - i) * 8);
+		SHA_update(ctx, &tmp, 1);
+	}
+
+	for (i = 0; i < 5; i++) {
+		ctx->buf.w[i] = bswap_32(ctx->state[i]);
+	}
+
+	return ctx->buf.b;
+}
+
+#else /* #if defined(HAVE_ENDIAN_H) && defined(HAVE_LITTLE_ENDIAN)*/
+
+#define rol(bits, value) (((value) << (bits)) | ((value) >> (32 - (bits))))
+
+static void SHA1_transform(SHA_CTX *ctx)
+{
+	uint32_t W[80];
+	uint32_t A, B, C, D, E;
+	uint8_t *p = ctx->buf;
+	int t;
+
+	for (t = 0; t < 16; ++t) {
+		uint32_t tmp = *p++ << 24;
+		tmp |= *p++ << 16;
+		tmp |= *p++ << 8;
+		tmp |= *p++;
+		W[t] = tmp;
+	}
+
+	for (; t < 80; t++) {
+		W[t] = rol(1, W[t - 3] ^ W[t - 8] ^ W[t - 14] ^ W[t - 16]);
+	}
+
+	A = ctx->state[0];
+	B = ctx->state[1];
+	C = ctx->state[2];
+	D = ctx->state[3];
+	E = ctx->state[4];
+
+	for (t = 0; t < 80; t++) {
+		uint32_t tmp = rol(5, A) + E + W[t];
+
+		if (t < 20)
+			tmp += (D ^ (B & (C ^ D))) + 0x5A827999;
+		else if (t < 40)
+			tmp += (B ^ C ^ D) + 0x6ED9EBA1;
+		else if (t < 60)
+			tmp += ((B & C) | (D & (B | C))) + 0x8F1BBCDC;
+		else
+			tmp += (B ^ C ^ D) + 0xCA62C1D6;
+
+		E = D;
+		D = C;
+		C = rol(30, B);
+		B = A;
+		A = tmp;
+	}
+
+	ctx->state[0] += A;
+	ctx->state[1] += B;
+	ctx->state[2] += C;
+	ctx->state[3] += D;
+	ctx->state[4] += E;
+}
+
+void SHA_update(SHA_CTX *ctx, const void *data, int len)
+{
+	int i = ctx->count % sizeof(ctx->buf);
+	const uint8_t *p = (const uint8_t *)data;
+
+	ctx->count += len;
+
+	while (len--) {
+		ctx->buf[i++] = *p++;
+		if (i == sizeof(ctx->buf)) {
+			SHA1_transform(ctx);
+			i = 0;
+		}
+	}
+}
+const uint8_t *SHA_final(SHA_CTX *ctx)
+{
+	uint8_t *p = ctx->buf;
+	uint64_t cnt = ctx->count * 8;
+	int i;
+
+	SHA_update(ctx, (uint8_t *)"\x80", 1);
+	while ((ctx->count % sizeof(ctx->buf)) != (sizeof(ctx->buf) - 8)) {
+		SHA_update(ctx, (uint8_t *)"\0", 1);
+	}
+	for (i = 0; i < 8; ++i) {
+		uint8_t tmp = cnt >> ((7 - i) * 8);
+		SHA_update(ctx, &tmp, 1);
+	}
+
+	for (i = 0; i < 5; i++) {
+		uint32_t tmp = ctx->state[i];
+		*p++ = tmp >> 24;
+		*p++ = tmp >> 16;
+		*p++ = tmp >> 8;
+		*p++ = tmp >> 0;
+	}
+
+	return ctx->buf;
+}
+
+#endif /* endianness */
+
+void SHA_init(SHA_CTX *ctx)
+{
+	ctx->state[0] = 0x67452301;
+	ctx->state[1] = 0xEFCDAB89;
+	ctx->state[2] = 0x98BADCFE;
+	ctx->state[3] = 0x10325476;
+	ctx->state[4] = 0xC3D2E1F0;
+	ctx->count = 0;
+}
+
+/* Convenience function */
+const uint8_t *SHA(const void *data, int len, uint8_t *digest)
+{
+	const uint8_t *p;
+	int i;
+	SHA_CTX ctx;
+	SHA_init(&ctx);
+	SHA_update(&ctx, data, len);
+	p = SHA_final(&ctx);
+	for (i = 0; i < SHA_DIGEST_SIZE; ++i) {
+		digest[i] = *p++;
+	}
+	return digest;
+}
diff --git a/tools/rockchip/sha.h b/tools/rockchip/sha.h
new file mode 100644
index 0000000000..d3001ee9e5
--- /dev/null
+++ b/tools/rockchip/sha.h
@@ -0,0 +1,63 @@
+/* sha.h
+**
+** Copyright 2008, The Android Open Source Project
+**
+** Redistribution and use in source and binary forms, with or without
+** modification, are permitted provided that the following conditions are met:
+**     * Redistributions of source code must retain the above copyright
+**       notice, this list of conditions and the following disclaimer.
+**     * Redistributions in binary form must reproduce the above copyright
+**       notice, this list of conditions and the following disclaimer in the
+**       documentation and/or other materials provided with the distribution.
+**     * Neither the name of Google Inc. nor the names of its contributors may
+**       be used to endorse or promote products derived from this software
+**       without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY Google Inc. ``AS IS'' AND ANY EXPRESS OR
+** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+** MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO
+** EVENT SHALL Google Inc. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+** SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+** PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+** OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+** WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+** OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+** ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#ifndef _EMBEDDED_SHA_H_
+#define _EMBEDDED_SHA_H_
+
+#include <inttypes.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+	typedef struct SHA_CTX {
+		uint64_t count;
+		uint32_t state[5];
+#if defined(HAVE_ENDIAN_H) && defined(HAVE_LITTLE_ENDIAN)
+		union {
+			uint8_t b[64];
+			uint32_t w[16];
+		} buf;
+#else
+		uint8_t buf[64];
+#endif
+	} SHA_CTX;
+
+	void SHA_init(SHA_CTX* ctx);
+	void SHA_update(SHA_CTX* ctx, const void* data, int len);
+	const uint8_t* SHA_final(SHA_CTX* ctx);
+
+	/* Convenience method. Returns digest parameter value. */
+	const uint8_t* SHA(const void* data, int len, uint8_t* digest);
+
+#define SHA_DIGEST_SIZE 20
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/rockchip/sha2.c b/tools/rockchip/sha2.c
new file mode 100644
index 0000000000..9699904579
--- /dev/null
+++ b/tools/rockchip/sha2.c
@@ -0,0 +1,760 @@
+/*
+ ---------------------------------------------------------------------------
+ Copyright (c) 2002, Dr Brian Gladman <brg@gladman.me.uk>, Worcester, UK.
+ All rights reserved.
+
+ LICENSE TERMS
+
+ The free distribution and use of this software in both source and binary
+ form is allowed (with or without changes) provided that:
+
+   1. distributions of this source code include the above copyright
+      notice, this list of conditions and the following disclaimer;
+
+   2. distributions in binary form include the above copyright
+      notice, this list of conditions and the following disclaimer
+      in the documentation and/or other associated materials;
+
+   3. the copyright holder's name is not used to endorse products
+      built using this software without specific written permission.
+
+ ALTERNATIVELY, provided that this notice is retained in full, this product
+ may be distributed under the terms of the GNU General Public License (GPL),
+ in which case the provisions of the GPL apply INSTEAD OF those given above.
+
+ DISCLAIMER
+
+ This software is provided 'as is' with no explicit or implied warranties
+ in respect of its properties, including, but not limited to, correctness
+ and/or fitness for purpose.
+ ---------------------------------------------------------------------------
+ Issue Date: 30/11/2002
+
+ This is a byte oriented version of SHA2 that operates on arrays of bytes
+ stored in memory. This code implements sha256, sha384 and sha512 but the
+ latter two functions rely on efficient 64-bit integer operations that
+ may not be very efficient on 32-bit machines
+
+ The sha256 functions use a type 'sha256_ctx' to hold details of the
+ current hash state and uses the following three calls:
+
+       void sha256_begin(sha256_ctx ctx[1])
+       void sha256_hash(sha256_ctx ctx[1], const unsigned char data[],
+                            unsigned long len)
+       void sha256_end(sha256_ctx ctx[1], unsigned char hval[])
+
+ The first subroutine initialises a hash computation by setting up the
+ context in the sha256_ctx context. The second subroutine hashes 8-bit
+ bytes from array data[] into the hash state withinh sha256_ctx context,
+ the number of bytes to be hashed being given by the the unsigned long
+ integer len.  The third subroutine completes the hash calculation and
+ places the resulting digest value in the array of 8-bit bytes hval[].
+
+ The sha384 and sha512 functions are similar and use the interfaces:
+
+       void sha384_begin(sha384_ctx ctx[1]);
+       void sha384_hash(sha384_ctx ctx[1], const unsigned char data[],
+                            unsigned long len);
+       void sha384_end(sha384_ctx ctx[1], unsigned char hval[]);
+
+       void sha512_begin(sha512_ctx ctx[1]);
+       void sha512_hash(sha512_ctx ctx[1], const unsigned char data[],
+                            unsigned long len);
+       void sha512_end(sha512_ctx ctx[1], unsigned char hval[]);
+
+ In addition there is a function sha2 that can be used to call all these
+ functions using a call with a hash length parameter as follows:
+
+       int sha2_begin(sha2_ctx ctx[1], unsigned long len);
+       void sha2_hash(sha2_ctx ctx[1], const unsigned char data[],
+                            unsigned long len);
+       void sha2_end(sha2_ctx ctx[1], unsigned char hval[]);
+
+ My thanks to Erik Andersen <andersen@codepoet.org> for testing this code
+ on big-endian systems and for his assistance with corrections
+*/
+
+/* define the hash functions that you need          */
+
+#define SHA_2 /* for dynamic hash length  */
+#define SHA_256
+#define SHA_384
+#define SHA_512
+
+#ifdef USE_HOSTCC
+#include <string.h> /* for memcpy() etc.        */
+#include <stdlib.h> /* for _lrotr with VC++     */
+#endif
+
+#include "sha2.h"
+
+/* rockchip crypto byte order */
+#define PLATFORM_BYTE_ORDER SHA_BIG_ENDIAN
+
+/*  1. PLATFORM SPECIFIC INCLUDES */
+
+// #if defined(__GNU_LIBRARY__)
+// #  include <byteswap.h>
+// #  include <endian.h>
+// #elif defined(__CRYPTLIB__)
+// #  if defined( INC_ALL )
+// #    include "crypt.h"
+// #  elif defined( INC_CHILD )
+// #    include "../crypt.h"
+// #  else
+// #    include "crypt.h"
+// #  endif
+// #  if defined(DATA_LITTLEENDIAN)
+// #    define PLATFORM_BYTE_ORDER SHA_LITTLE_ENDIAN
+// #  else
+// #    define PLATFORM_BYTE_ORDER SHA_BIG_ENDIAN
+// #  endif
+// #if defined(_MSC_VER)
+// #  include <stdlib.h>
+// #elif !defined(WIN32)
+// #  include <stdlib.h>
+// #  if !defined (_ENDIAN_H)
+// #    include <sys/param.h>
+// #  else
+// #    include _ENDIAN_H
+// #  endif
+// #endif
+
+/*  2. BYTE ORDER IN 32-BIT WORDS
+
+    To obtain the highest speed on processors with 32-bit words, this code
+    needs to determine the order in which bytes are packed into such words.
+    The following block of code is an attempt to capture the most obvious
+    ways in which various environments specify their endian definitions.
+    It may well fail, in which case the definitions will need to be set by
+    editing at the points marked **** EDIT HERE IF NECESSARY **** below.
+*/
+#define SHA_LITTLE_ENDIAN 1234 /* byte 0 is least significant (i386) */
+#define SHA_BIG_ENDIAN 4321    /* byte 0 is most significant (mc68k) */
+
+#if !defined(PLATFORM_BYTE_ORDER)
+#if defined(LITTLE_ENDIAN) || defined(BIG_ENDIAN)
+#if defined(LITTLE_ENDIAN) && defined(BIG_ENDIAN)
+#if defined(BYTE_ORDER)
+#if (BYTE_ORDER == LITTLE_ENDIAN)
+#define PLATFORM_BYTE_ORDER SHA_LITTLE_ENDIAN
+#elif(BYTE_ORDER == BIG_ENDIAN)
+#define PLATFORM_BYTE_ORDER SHA_BIG_ENDIAN
+#endif
+#endif
+#elif defined(LITTLE_ENDIAN) && !defined(BIG_ENDIAN)
+#define PLATFORM_BYTE_ORDER SHA_LITTLE_ENDIAN
+#elif !defined(LITTLE_ENDIAN) && defined(BIG_ENDIAN)
+#define PLATFORM_BYTE_ORDER SHA_BIG_ENDIAN
+#endif
+#elif defined(_LITTLE_ENDIAN) || defined(_BIG_ENDIAN)
+#if defined(_LITTLE_ENDIAN) && defined(_BIG_ENDIAN)
+#if defined(_BYTE_ORDER)
+#if (_BYTE_ORDER == _LITTLE_ENDIAN)
+#define PLATFORM_BYTE_ORDER SHA_LITTLE_ENDIAN
+#elif(_BYTE_ORDER == _BIG_ENDIAN)
+#define PLATFORM_BYTE_ORDER SHA_BIG_ENDIAN
+#endif
+#endif
+#elif defined(_LITTLE_ENDIAN) && !defined(_BIG_ENDIAN)
+#define PLATFORM_BYTE_ORDER SHA_LITTLE_ENDIAN
+#elif !defined(_LITTLE_ENDIAN) && defined(_BIG_ENDIAN)
+#define PLATFORM_BYTE_ORDER SHA_BIG_ENDIAN
+#endif
+#elif 0 /* **** EDIT HERE IF NECESSARY **** */
+#define PLATFORM_BYTE_ORDER SHA_LITTLE_ENDIAN
+#elif 0 /* **** EDIT HERE IF NECESSARY **** */
+#define PLATFORM_BYTE_ORDER SHA_BIG_ENDIAN
+#elif(('1234' >> 24) == '1')
+#define PLATFORM_BYTE_ORDER SHA_LITTLE_ENDIAN
+#elif(('4321' >> 24) == '1')
+#define PLATFORM_BYTE_ORDER SHA_BIG_ENDIAN
+#endif
+#endif
+
+#if !defined(PLATFORM_BYTE_ORDER)
+#error Please set undetermined byte order (lines 159 or 161 of sha2.c).
+#endif
+
+#ifdef _MSC_VER
+#pragma intrinsic(memcpy)
+#endif
+
+#define rotr32(x, n) (((x) >> n) | ((x) << (32 - n)))
+
+#if !defined(bswap_32)
+#define bswap_32(x)                                                            \
+  ((rotr32((x), 24) & 0x00ff00ff) | (rotr32((x), 8) & 0xff00ff00))
+#endif
+
+#if (PLATFORM_BYTE_ORDER == SHA_LITTLE_ENDIAN)
+#define SWAP_BYTES
+#else
+#undef SWAP_BYTES
+#endif
+
+#if defined(SHA_2) || defined(SHA_256)
+
+#define SHA256_MASK (SHA256_BLOCK_SIZE - 1)
+
+#if defined(SWAP_BYTES)
+#define bsw_32(p, n)                                                           \
+  {                                                                            \
+    int _i = (n);                                                              \
+    while (_i--)                                                               \
+      p[_i] = bswap_32(p[_i]);                                                 \
+  }
+#else
+#define bsw_32(p, n)
+#endif
+
+/* SHA256 mixing function definitions   */
+
+#define ch(x, y, z) (((x) & (y)) ^ (~(x) & (z)))
+#define maj(x, y, z) (((x) & (y)) ^ ((x) & (z)) ^ ((y) & (z)))
+
+#define s256_0(x) (rotr32((x), 2) ^ rotr32((x), 13) ^ rotr32((x), 22))
+#define s256_1(x) (rotr32((x), 6) ^ rotr32((x), 11) ^ rotr32((x), 25))
+#define g256_0(x) (rotr32((x), 7) ^ rotr32((x), 18) ^ ((x) >> 3))
+#define g256_1(x) (rotr32((x), 17) ^ rotr32((x), 19) ^ ((x) >> 10))
+
+/* rotated SHA256 round definition. Rather than swapping variables as in    */
+/* FIPS-180, different variables are 'rotated' on each round, returning     */
+/* to their starting positions every eight rounds                           */
+
+#define h2(i)                                                                  \
+  ctx->wbuf[i & 15] +=                                                         \
+      g256_1(ctx->wbuf[(i + 14) & 15]) + ctx->wbuf[(i + 9) & 15] +             \
+      g256_0(ctx->wbuf[(i + 1) & 15])
+
+#define h2_cycle(i, j)                                                         \
+  v[(7 - i) & 7] +=                                                            \
+      (j ? h2(i) : ctx->wbuf[i & 15]) + k256[i + j] + s256_1(v[(4 - i) & 7]) + \
+      ch(v[(4 - i) & 7], v[(5 - i) & 7], v[(6 - i) & 7]);                      \
+  v[(3 - i) & 7] += v[(7 - i) & 7];                                            \
+  v[(7 - i) & 7] += s256_0(v[(0 - i) & 7]) +                                   \
+                    maj(v[(0 - i) & 7], v[(1 - i) & 7], v[(2 - i) & 7])
+
+/* SHA256 mixing data   */
+
+const sha2_32t k256[64] = {
+	n_u32(428a2f98), n_u32(71374491), n_u32(b5c0fbcf), n_u32(e9b5dba5),
+	n_u32(3956c25b), n_u32(59f111f1), n_u32(923f82a4), n_u32(ab1c5ed5),
+	n_u32(d807aa98), n_u32(12835b01), n_u32(243185be), n_u32(550c7dc3),
+	n_u32(72be5d74), n_u32(80deb1fe), n_u32(9bdc06a7), n_u32(c19bf174),
+	n_u32(e49b69c1), n_u32(efbe4786), n_u32(0fc19dc6), n_u32(240ca1cc),
+	n_u32(2de92c6f), n_u32(4a7484aa), n_u32(5cb0a9dc), n_u32(76f988da),
+	n_u32(983e5152), n_u32(a831c66d), n_u32(b00327c8), n_u32(bf597fc7),
+	n_u32(c6e00bf3), n_u32(d5a79147), n_u32(06ca6351), n_u32(14292967),
+	n_u32(27b70a85), n_u32(2e1b2138), n_u32(4d2c6dfc), n_u32(53380d13),
+	n_u32(650a7354), n_u32(766a0abb), n_u32(81c2c92e), n_u32(92722c85),
+	n_u32(a2bfe8a1), n_u32(a81a664b), n_u32(c24b8b70), n_u32(c76c51a3),
+	n_u32(d192e819), n_u32(d6990624), n_u32(f40e3585), n_u32(106aa070),
+	n_u32(19a4c116), n_u32(1e376c08), n_u32(2748774c), n_u32(34b0bcb5),
+	n_u32(391c0cb3), n_u32(4ed8aa4a), n_u32(5b9cca4f), n_u32(682e6ff3),
+	n_u32(748f82ee), n_u32(78a5636f), n_u32(84c87814), n_u32(8cc70208),
+	n_u32(90befffa), n_u32(a4506ceb), n_u32(bef9a3f7), n_u32(c67178f2),
+};
+
+/* SHA256 initialisation data */
+
+const sha2_32t i256[8] = { n_u32(6a09e667), n_u32(bb67ae85), n_u32(3c6ef372),
+                           n_u32(a54ff53a), n_u32(510e527f), n_u32(9b05688c),
+                           n_u32(1f83d9ab), n_u32(5be0cd19)
+                         };
+
+void sha256_begin(sha256_ctx ctx[1])
+{
+	ctx->count[0] = ctx->count[1] = 0;
+	memcpy(ctx->hash, i256, 8 * sizeof(sha2_32t));
+}
+
+/* Compile 64 bytes of hash data into SHA256 digest value   */
+/* NOTE: this routine assumes that the byte order in the    */
+/* ctx->wbuf[] at this point is in such an order that low   */
+/* address bytes in the ORIGINAL byte stream placed in this */
+/* buffer will now go to the high end of words on BOTH big  */
+/* and little endian systems                                */
+
+void sha256_compile(sha256_ctx ctx[1])
+{
+	sha2_32t v[8], j;
+
+	memcpy(v, ctx->hash, 8 * sizeof(sha2_32t));
+
+	for (j = 0; j < 64; j += 16) {
+		h2_cycle(0, j);
+		h2_cycle(1, j);
+		h2_cycle(2, j);
+		h2_cycle(3, j);
+		h2_cycle(4, j);
+		h2_cycle(5, j);
+		h2_cycle(6, j);
+		h2_cycle(7, j);
+		h2_cycle(8, j);
+		h2_cycle(9, j);
+		h2_cycle(10, j);
+		h2_cycle(11, j);
+		h2_cycle(12, j);
+		h2_cycle(13, j);
+		h2_cycle(14, j);
+		h2_cycle(15, j);
+	}
+
+	ctx->hash[0] += v[0];
+	ctx->hash[1] += v[1];
+	ctx->hash[2] += v[2];
+	ctx->hash[3] += v[3];
+	ctx->hash[4] += v[4];
+	ctx->hash[5] += v[5];
+	ctx->hash[6] += v[6];
+	ctx->hash[7] += v[7];
+}
+
+/* SHA256 hash data in an array of bytes into hash buffer   */
+/* and call the hash_compile function as required.          */
+
+void sha256_hash(sha256_ctx ctx[1], const unsigned char data[],
+                 unsigned long len)
+{
+	sha2_32t pos = (sha2_32t)(ctx->count[0] & SHA256_MASK),
+	         space = SHA256_BLOCK_SIZE - pos;
+	const unsigned char *sp = data;
+
+	if ((ctx->count[0] += len) < len)
+		++(ctx->count[1]);
+
+	while (len >= space) { /* tranfer whole blocks while possible  */
+		memcpy(((unsigned char *)ctx->wbuf) + pos, sp, space);
+		sp += space;
+		len -= space;
+		space = SHA256_BLOCK_SIZE;
+		pos = 0;
+		bsw_32(ctx->wbuf, SHA256_BLOCK_SIZE >> 2);
+		sha256_compile(ctx);
+	}
+
+	memcpy(((unsigned char *)ctx->wbuf) + pos, sp, len);
+}
+
+/* SHA256 Final padding and digest calculation  */
+
+static sha2_32t m1[4] = { n_u32(00000000), n_u32(ff000000), n_u32(ffff0000),
+                          n_u32(ffffff00)
+                        };
+
+static sha2_32t b1[4] = { n_u32(80000000), n_u32(00800000), n_u32(00008000),
+                          n_u32(00000080)
+                        };
+
+void sha256_end(sha256_ctx ctx[1], unsigned char hval[])
+{
+	sha2_32t i = (sha2_32t)(ctx->count[0] & SHA256_MASK);
+
+	bsw_32(ctx->wbuf, (i + 3) >> 2)
+	/* bytes in the buffer are now in an order in which references  */
+	/* to 32-bit words will put bytes with lower addresses into the */
+	/* top of 32 bit words on BOTH big and little endian machines   */
+
+	/* we now need to mask valid bytes and add the padding which is */
+	/* a single 1 bit and as many zero bits as necessary.           */
+	ctx->wbuf[i >> 2] = (ctx->wbuf[i >> 2] & m1[i & 3]) | b1[i & 3];
+
+	/* we need 9 or more empty positions, one for the padding byte  */
+	/* (above) and eight for the length count.  If there is not     */
+	/* enough space pad and empty the buffer                        */
+	if (i > SHA256_BLOCK_SIZE - 9) {
+		if (i < 60)
+			ctx->wbuf[15] = 0;
+		sha256_compile(ctx);
+		i = 0;
+	} else /* compute a word index for the empty buffer positions  */
+		i = (i >> 2) + 1;
+
+	while (i < 14) /* and zero pad all but last two positions      */
+		ctx->wbuf[i++] = 0;
+
+	/* the following 32-bit length fields are assembled in the      */
+	/* wrong byte order on little endian machines but this is       */
+	/* corrected later since they are only ever used as 32-bit      */
+	/* word values.                                                 */
+
+	ctx->wbuf[14] = (ctx->count[1] << 3) | (ctx->count[0] >> 29);
+	ctx->wbuf[15] = ctx->count[0] << 3;
+
+	sha256_compile(ctx);
+
+	/* extract the hash value as bytes in case the hash buffer is   */
+	/* mislaigned for 32-bit words                                  */
+	for (i = 0; i < SHA256_DIGEST_SIZE; ++i)
+		hval[i] = (unsigned char)(ctx->hash[i >> 2] >> 8 * (~i & 3));
+}
+
+void sha256(unsigned char hval[], const unsigned char data[],
+            unsigned long len)
+{
+	sha256_ctx cx[1];
+
+	sha256_begin(cx);
+	sha256_hash(cx, data, len);
+	sha256_end(cx, hval);
+}
+
+#endif
+
+#if defined(SHA_2) || defined(SHA_384) || defined(SHA_512)
+
+#define SHA512_MASK (SHA512_BLOCK_SIZE - 1)
+
+#define rotr64(x, n) (((x) >> n) | ((x) << (64 - n)))
+
+#if !defined(bswap_64)
+#define bswap_64(x)                                                            \
+  (((sha2_64t)(bswap_32((sha2_32t)(x)))) << 32 |                               \
+   bswap_32((sha2_32t)((x) >> 32)))
+#endif
+
+#if defined(SWAP_BYTES)
+#define bsw_64(p, n)                                                           \
+  {                                                                            \
+    int _i = (n);                                                              \
+    while (_i--)                                                               \
+      p[_i] = bswap_64(p[_i]);                                                 \
+  }
+#else
+#define bsw_64(p, n)
+#endif
+
+/* SHA512 mixing function definitions   */
+
+#define s512_0(x) (rotr64((x), 28) ^ rotr64((x), 34) ^ rotr64((x), 39))
+#define s512_1(x) (rotr64((x), 14) ^ rotr64((x), 18) ^ rotr64((x), 41))
+#define g512_0(x) (rotr64((x), 1) ^ rotr64((x), 8) ^ ((x) >> 7))
+#define g512_1(x) (rotr64((x), 19) ^ rotr64((x), 61) ^ ((x) >> 6))
+
+/* rotated SHA512 round definition. Rather than swapping variables as in    */
+/* FIPS-180, different variables are 'rotated' on each round, returning     */
+/* to their starting positions every eight rounds                           */
+
+#define h5(i)                                                                  \
+  ctx->wbuf[i & 15] +=                                                         \
+      g512_1(ctx->wbuf[(i + 14) & 15]) + ctx->wbuf[(i + 9) & 15] +             \
+      g512_0(ctx->wbuf[(i + 1) & 15])
+
+#define h5_cycle(i, j)                                                         \
+  v[(7 - i) & 7] +=                                                            \
+      (j ? h5(i) : ctx->wbuf[i & 15]) + k512[i + j] + s512_1(v[(4 - i) & 7]) + \
+      ch(v[(4 - i) & 7], v[(5 - i) & 7], v[(6 - i) & 7]);                      \
+  v[(3 - i) & 7] += v[(7 - i) & 7];                                            \
+  v[(7 - i) & 7] += s512_0(v[(0 - i) & 7]) +                                   \
+                    maj(v[(0 - i) & 7], v[(1 - i) & 7], v[(2 - i) & 7])
+
+/* SHA384/SHA512 mixing data    */
+
+const sha2_64t k512[80] = {
+	n_u64(428a2f98d728ae22), n_u64(7137449123ef65cd), n_u64(b5c0fbcfec4d3b2f),
+	n_u64(e9b5dba58189dbbc), n_u64(3956c25bf348b538), n_u64(59f111f1b605d019),
+	n_u64(923f82a4af194f9b), n_u64(ab1c5ed5da6d8118), n_u64(d807aa98a3030242),
+	n_u64(12835b0145706fbe), n_u64(243185be4ee4b28c), n_u64(550c7dc3d5ffb4e2),
+	n_u64(72be5d74f27b896f), n_u64(80deb1fe3b1696b1), n_u64(9bdc06a725c71235),
+	n_u64(c19bf174cf692694), n_u64(e49b69c19ef14ad2), n_u64(efbe4786384f25e3),
+	n_u64(0fc19dc68b8cd5b5), n_u64(240ca1cc77ac9c65), n_u64(2de92c6f592b0275),
+	n_u64(4a7484aa6ea6e483), n_u64(5cb0a9dcbd41fbd4), n_u64(76f988da831153b5),
+	n_u64(983e5152ee66dfab), n_u64(a831c66d2db43210), n_u64(b00327c898fb213f),
+	n_u64(bf597fc7beef0ee4), n_u64(c6e00bf33da88fc2), n_u64(d5a79147930aa725),
+	n_u64(06ca6351e003826f), n_u64(142929670a0e6e70), n_u64(27b70a8546d22ffc),
+	n_u64(2e1b21385c26c926), n_u64(4d2c6dfc5ac42aed), n_u64(53380d139d95b3df),
+	n_u64(650a73548baf63de), n_u64(766a0abb3c77b2a8), n_u64(81c2c92e47edaee6),
+	n_u64(92722c851482353b), n_u64(a2bfe8a14cf10364), n_u64(a81a664bbc423001),
+	n_u64(c24b8b70d0f89791), n_u64(c76c51a30654be30), n_u64(d192e819d6ef5218),
+	n_u64(d69906245565a910), n_u64(f40e35855771202a), n_u64(106aa07032bbd1b8),
+	n_u64(19a4c116b8d2d0c8), n_u64(1e376c085141ab53), n_u64(2748774cdf8eeb99),
+	n_u64(34b0bcb5e19b48a8), n_u64(391c0cb3c5c95a63), n_u64(4ed8aa4ae3418acb),
+	n_u64(5b9cca4f7763e373), n_u64(682e6ff3d6b2b8a3), n_u64(748f82ee5defb2fc),
+	n_u64(78a5636f43172f60), n_u64(84c87814a1f0ab72), n_u64(8cc702081a6439ec),
+	n_u64(90befffa23631e28), n_u64(a4506cebde82bde9), n_u64(bef9a3f7b2c67915),
+	n_u64(c67178f2e372532b), n_u64(ca273eceea26619c), n_u64(d186b8c721c0c207),
+	n_u64(eada7dd6cde0eb1e), n_u64(f57d4f7fee6ed178), n_u64(06f067aa72176fba),
+	n_u64(0a637dc5a2c898a6), n_u64(113f9804bef90dae), n_u64(1b710b35131c471b),
+	n_u64(28db77f523047d84), n_u64(32caab7b40c72493), n_u64(3c9ebe0a15c9bebc),
+	n_u64(431d67c49c100d4c), n_u64(4cc5d4becb3e42b6), n_u64(597f299cfc657e2a),
+	n_u64(5fcb6fab3ad6faec), n_u64(6c44198c4a475817)
+};
+
+/* Compile 64 bytes of hash data into SHA384/SHA512 digest value  */
+
+void sha512_compile(sha512_ctx ctx[1])
+{
+	sha2_64t v[8];
+	sha2_32t j;
+
+	memcpy(v, ctx->hash, 8 * sizeof(sha2_64t));
+
+	for (j = 0; j < 80; j += 16) {
+		h5_cycle(0, j);
+		h5_cycle(1, j);
+		h5_cycle(2, j);
+		h5_cycle(3, j);
+		h5_cycle(4, j);
+		h5_cycle(5, j);
+		h5_cycle(6, j);
+		h5_cycle(7, j);
+		h5_cycle(8, j);
+		h5_cycle(9, j);
+		h5_cycle(10, j);
+		h5_cycle(11, j);
+		h5_cycle(12, j);
+		h5_cycle(13, j);
+		h5_cycle(14, j);
+		h5_cycle(15, j);
+	}
+
+	ctx->hash[0] += v[0];
+	ctx->hash[1] += v[1];
+	ctx->hash[2] += v[2];
+	ctx->hash[3] += v[3];
+	ctx->hash[4] += v[4];
+	ctx->hash[5] += v[5];
+	ctx->hash[6] += v[6];
+	ctx->hash[7] += v[7];
+}
+
+/* Compile 128 bytes of hash data into SHA256 digest value  */
+/* NOTE: this routine assumes that the byte order in the    */
+/* ctx->wbuf[] at this point is in such an order that low   */
+/* address bytes in the ORIGINAL byte stream placed in this */
+/* buffer will now go to the high end of words on BOTH big  */
+/* and little endian systems                                */
+
+void sha512_hash(sha512_ctx ctx[1], const unsigned char data[],
+                 unsigned long len)
+{
+	sha2_32t pos = (sha2_32t)(ctx->count[0] & SHA512_MASK),
+	         space = SHA512_BLOCK_SIZE - pos;
+	const unsigned char *sp = data;
+
+	if ((ctx->count[0] += len) < len)
+		++(ctx->count[1]);
+
+	while (len >= space) { /* tranfer whole blocks while possible  */
+		memcpy(((unsigned char *)ctx->wbuf) + pos, sp, space);
+		sp += space;
+		len -= space;
+		space = SHA512_BLOCK_SIZE;
+		pos = 0;
+		bsw_64(ctx->wbuf, SHA512_BLOCK_SIZE >> 3);
+		sha512_compile(ctx);
+	}
+
+	memcpy(((unsigned char *)ctx->wbuf) + pos, sp, len);
+}
+
+/* SHA384/512 Final padding and digest calculation  */
+
+static sha2_64t m2[8] = { n_u64(0000000000000000), n_u64(ff00000000000000),
+                          n_u64(ffff000000000000), n_u64(ffffff0000000000),
+                          n_u64(ffffffff00000000), n_u64(ffffffffff000000),
+                          n_u64(ffffffffffff0000), n_u64(ffffffffffffff00)
+                        };
+
+static sha2_64t b2[8] = { n_u64(8000000000000000), n_u64(0080000000000000),
+                          n_u64(0000800000000000), n_u64(0000008000000000),
+                          n_u64(0000000080000000), n_u64(0000000000800000),
+                          n_u64(0000000000008000), n_u64(0000000000000080)
+                        };
+
+static void sha_end(sha512_ctx ctx[1], unsigned char hval[],
+                    const unsigned int hlen)
+{
+	sha2_32t i = (sha2_32t)(ctx->count[0] & SHA512_MASK);
+
+	bsw_64(ctx->wbuf, (i + 7) >> 3);
+
+	/* bytes in the buffer are now in an order in which references  */
+	/* to 64-bit words will put bytes with lower addresses into the */
+	/* top of 64 bit words on BOTH big and little endian machines   */
+
+	/* we now need to mask valid bytes and add the padding which is */
+	/* a single 1 bit and as many zero bits as necessary.           */
+	ctx->wbuf[i >> 3] = (ctx->wbuf[i >> 3] & m2[i & 7]) | b2[i & 7];
+
+	/* we need 17 or more empty byte positions, one for the padding */
+	/* byte (above) and sixteen for the length count.  If there is  */
+	/* not enough space pad and empty the buffer                    */
+	if (i > SHA512_BLOCK_SIZE - 17) {
+		if (i < 120)
+			ctx->wbuf[15] = 0;
+		sha512_compile(ctx);
+		i = 0;
+	} else
+		i = (i >> 3) + 1;
+
+	while (i < 14)
+		ctx->wbuf[i++] = 0;
+
+	/* the following 64-bit length fields are assembled in the      */
+	/* wrong byte order on little endian machines but this is       */
+	/* corrected later since they are only ever used as 64-bit      */
+	/* word values.                                                 */
+
+	ctx->wbuf[14] = (ctx->count[1] << 3) | (ctx->count[0] >> 61);
+	ctx->wbuf[15] = ctx->count[0] << 3;
+
+	sha512_compile(ctx);
+
+	/* extract the hash value as bytes in case the hash buffer is   */
+	/* misaligned for 32-bit words                                  */
+	for (i = 0; i < hlen; ++i)
+		hval[i] = (unsigned char)(ctx->hash[i >> 3] >> 8 * (~i & 7));
+}
+
+#endif
+
+#if defined(SHA_2) || defined(SHA_384)
+
+/* SHA384 initialisation data   */
+
+const sha2_64t i384[80] = { n_u64(cbbb9d5dc1059ed8), n_u64(629a292a367cd507),
+                            n_u64(9159015a3070dd17), n_u64(152fecd8f70e5939),
+                            n_u64(67332667ffc00b31), n_u64(8eb44a8768581511),
+                            n_u64(db0c2e0d64f98fa7), n_u64(47b5481dbefa4fa4)
+                          };
+
+void sha384_begin(sha384_ctx ctx[1])
+{
+	ctx->count[0] = ctx->count[1] = 0;
+	memcpy(ctx->hash, i384, 8 * sizeof(sha2_64t));
+}
+
+void sha384_end(sha384_ctx ctx[1], unsigned char hval[])
+{
+	sha_end(ctx, hval, SHA384_DIGEST_SIZE);
+}
+
+void sha384(unsigned char hval[], const unsigned char data[],
+            unsigned long len)
+{
+	sha384_ctx cx[1];
+
+	sha384_begin(cx);
+	sha384_hash(cx, data, len);
+	sha384_end(cx, hval);
+}
+
+#endif
+
+#if defined(SHA_2) || defined(SHA_512)
+
+/* SHA512 initialisation data   */
+
+const sha2_64t i512[80] = { n_u64(6a09e667f3bcc908), n_u64(bb67ae8584caa73b),
+                            n_u64(3c6ef372fe94f82b), n_u64(a54ff53a5f1d36f1),
+                            n_u64(510e527fade682d1), n_u64(9b05688c2b3e6c1f),
+                            n_u64(1f83d9abfb41bd6b), n_u64(5be0cd19137e2179)
+                          };
+
+void sha512_begin(sha512_ctx ctx[1])
+{
+	ctx->count[0] = ctx->count[1] = 0;
+	memcpy(ctx->hash, i512, 8 * sizeof(sha2_64t));
+}
+
+void sha512_end(sha512_ctx ctx[1], unsigned char hval[])
+{
+	sha_end(ctx, hval, SHA512_DIGEST_SIZE);
+}
+
+void sha512(unsigned char hval[], const unsigned char data[],
+            unsigned long len)
+{
+	sha512_ctx cx[1];
+
+	sha512_begin(cx);
+	sha512_hash(cx, data, len);
+	sha512_end(cx, hval);
+}
+
+#endif
+
+#if defined(SHA_2)
+
+#define CTX_256(x) ((x)->uu->ctx256)
+#define CTX_384(x) ((x)->uu->ctx512)
+#define CTX_512(x) ((x)->uu->ctx512)
+
+/* SHA2 initialisation */
+
+int sha2_begin(sha2_ctx ctx[1], unsigned long len)
+{
+	unsigned long l = len;
+	switch (len) {
+	case 256:
+		l = len >> 3;
+	case 32:
+		CTX_256(ctx)->count[0] = CTX_256(ctx)->count[1] = 0;
+		memcpy(CTX_256(ctx)->hash, i256, 32);
+		break;
+	case 384:
+		l = len >> 3;
+	case 48:
+		CTX_384(ctx)->count[0] = CTX_384(ctx)->count[1] = 0;
+		memcpy(CTX_384(ctx)->hash, i384, 64);
+		break;
+	case 512:
+		l = len >> 3;
+	case 64:
+		CTX_512(ctx)->count[0] = CTX_512(ctx)->count[1] = 0;
+		memcpy(CTX_512(ctx)->hash, i512, 64);
+		break;
+	default:
+		return SHA2_BAD;
+	}
+
+	ctx->sha2_len = l;
+	return SHA2_GOOD;
+}
+
+void sha2_hash(sha2_ctx ctx[1], const unsigned char data[], unsigned long len)
+{
+	switch (ctx->sha2_len) {
+	case 32:
+		sha256_hash(CTX_256(ctx), data, len);
+		return;
+	case 48:
+		sha384_hash(CTX_384(ctx), data, len);
+		return;
+	case 64:
+		sha512_hash(CTX_512(ctx), data, len);
+		return;
+	}
+}
+
+void sha2_end(sha2_ctx ctx[1], unsigned char hval[])
+{
+	switch (ctx->sha2_len) {
+	case 32:
+		sha256_end(CTX_256(ctx), hval);
+		return;
+	case 48:
+		sha_end(CTX_384(ctx), hval, SHA384_DIGEST_SIZE);
+		return;
+	case 64:
+		sha_end(CTX_512(ctx), hval, SHA512_DIGEST_SIZE);
+		return;
+	}
+}
+
+int sha2(unsigned char hval[], unsigned long size, const unsigned char data[],
+         unsigned long len)
+{
+	sha2_ctx cx[1];
+
+	if (sha2_begin(cx, size) == SHA2_GOOD) {
+		sha2_hash(cx, data, len);
+		sha2_end(cx, hval);
+		return SHA2_GOOD;
+	} else
+		return SHA2_BAD;
+}
+
+#endif
diff --git a/tools/rockchip/sha2.h b/tools/rockchip/sha2.h
new file mode 100644
index 0000000000..e6a8bc20aa
--- /dev/null
+++ b/tools/rockchip/sha2.h
@@ -0,0 +1,161 @@
+/*
+ ---------------------------------------------------------------------------
+ Copyright (c) 2002, Dr Brian Gladman <brg@gladman.me.uk>, Worcester, UK.
+ All rights reserved.
+
+ LICENSE TERMS
+
+ The free distribution and use of this software in both source and binary
+ form is allowed (with or without changes) provided that:
+
+   1. distributions of this source code include the above copyright
+      notice, this list of conditions and the following disclaimer;
+
+   2. distributions in binary form include the above copyright
+      notice, this list of conditions and the following disclaimer
+      in the documentation and/or other associated materials;
+
+   3. the copyright holder's name is not used to endorse products
+      built using this software without specific written permission.
+
+ ALTERNATIVELY, provided that this notice is retained in full, this product
+ may be distributed under the terms of the GNU General Public License (GPL),
+ in which case the provisions of the GPL apply INSTEAD OF those given above.
+
+ DISCLAIMER
+
+ This software is provided 'as is' with no explicit or implied warranties
+ in respect of its properties, including, but not limited to, correctness
+ and/or fitness for purpose.
+ ---------------------------------------------------------------------------
+ Issue Date: 30/11/2002
+*/
+
+#ifndef _SHA2_H
+#define _SHA2_H
+
+#ifdef USE_HOSTCC
+#include <limits.h>
+#endif
+
+/*  Defines for suffixes to 32 and 64 bit unsigned numeric values   */
+
+#define sfx_lo(x,y) x##y
+#define sfx_hi(x,y) sfx_lo(x,y)
+#define n_u32(p)    sfx_hi(0x##p,s_u32)
+#define n_u64(p)    sfx_hi(0x##p,s_u64)
+
+#ifdef USE_HOSTCC
+/* define an unsigned 32-bit type */
+
+#if UINT_MAX == 0xffffffff
+typedef   unsigned int     sha2_32t;
+#define s_u32    u
+#elif ULONG_MAX == 0xffffffff
+typedef   unsigned long    sha2_32t;
+#define s_u32   ul
+#else
+#error Please define sha2_32t as an unsigned 32 bit type in sha2.h
+#endif
+
+/* define an unsigned 64-bit type */
+
+#if defined( _MSC_VER )
+typedef unsigned __int64   sha2_64t;
+#define s_u64 ui64
+#elif ULONG_MAX == 0xffffffffffffffff
+typedef unsigned long      sha2_64t;
+#define s_u64   ul
+#elif ULONG_MAX == 0xffffffff
+typedef unsigned long long sha2_64t;   /* a somewhat dangerous guess */
+#define s_u64  ull
+#else
+#error Please define sha2_64t as an unsigned 64 bit type in sha2.h
+#endif
+
+#else
+#include <common.h>
+
+typedef uint32_t	sha2_32t;
+#define s_u32	u
+
+typedef uint64_t	sha2_64t;   /* a somewhat dangerous guess */
+#define s_u64	ull
+#endif /* USE_HOSTCC */
+
+#if defined(__cplusplus)
+extern "C"
+{
+#endif
+
+#define SHA256_DIGEST_SIZE  32
+#define SHA384_DIGEST_SIZE  48
+#define SHA512_DIGEST_SIZE  64
+
+#define SHA256_BLOCK_SIZE   64
+#define SHA384_BLOCK_SIZE  128
+#define SHA512_BLOCK_SIZE  128
+
+#define SHA2_DIGEST_SIZE        SHA256_DIGEST_SIZE
+#define SHA2_MAX_DIGEST_SIZE    SHA512_DIGEST_SIZE
+
+#define SHA2_GOOD   0
+#define SHA2_BAD    1
+
+	/* type to hold the SHA256 context				*/
+
+	typedef struct {
+		sha2_32t count[2];
+		sha2_32t hash[8];
+		sha2_32t wbuf[16];
+	} sha256_ctx;
+
+	/* type to hold the SHA384/512 context			*/
+
+	typedef struct {
+		sha2_64t count[2];
+		sha2_64t hash[8];
+		sha2_64t wbuf[16];
+	} sha512_ctx;
+
+	typedef sha512_ctx  sha384_ctx;
+
+	/* type to hold a SHA2 context (256/384/512)  */
+
+	typedef struct {
+		union {
+			sha256_ctx  ctx256[1];
+			sha512_ctx  ctx512[1];
+		} uu[1];
+		sha2_32t    sha2_len;
+	} sha2_ctx;
+
+	void sha256_compile(sha256_ctx ctx[1]);
+	void sha512_compile(sha512_ctx ctx[1]);
+
+	void sha256_begin(sha256_ctx ctx[1]);
+	void sha256_hash(sha256_ctx ctx[1], const unsigned char data[], unsigned long len);
+	void sha256_end(sha256_ctx ctx[1], unsigned char hval[]);
+	void sha256(unsigned char hval[], const unsigned char data[], unsigned long len);
+
+	void sha384_begin(sha384_ctx ctx[1]);
+#define sha384_hash sha512_hash
+	void sha384_end(sha384_ctx ctx[1], unsigned char hval[]);
+	void sha384(unsigned char hval[], const unsigned char data[], unsigned long len);
+
+	void sha512_begin(sha512_ctx ctx[1]);
+	void sha512_hash(sha512_ctx ctx[1], const unsigned char data[], unsigned long len);
+	void sha512_end(sha512_ctx ctx[1], unsigned char hval[]);
+	void sha512(unsigned char hval[], const unsigned char data[], unsigned long len);
+
+	int sha2_begin(sha2_ctx ctx[1], unsigned long size);
+	void sha2_hash(sha2_ctx ctx[1], const unsigned char data[], unsigned long len);
+	void sha2_end(sha2_ctx ctx[1], unsigned char hval[]);
+	int sha2(unsigned char hval[], unsigned long size, const unsigned char data[], unsigned long len);
+
+#if defined(__cplusplus)
+}
+#endif
+
+
+#endif
diff --git a/tools/rockchip/trust_merger.c b/tools/rockchip/trust_merger.c
new file mode 100644
index 0000000000..a73ea81f96
--- /dev/null
+++ b/tools/rockchip/trust_merger.c
@@ -0,0 +1,930 @@
+/*
+ * Rockchip trust image generator
+ *
+ * (C) Copyright 2008-2015 Fuzhou Rockchip Electronics Co., Ltd
+ * Peter, Software Engineering, <superpeter.cai@gmail.com>.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#include <sys/stat.h>
+#include <u-boot/sha256.h>
+#include "trust_merger.h"
+#include "sha2.h"
+
+/* #define DEBUG */
+
+static bool gDebug =
+#ifdef DEBUG
+        true;
+#else
+        false;
+#endif /* DEBUG */
+
+#define LOGE(fmt, args...) fprintf(stderr, "E: [%s] " fmt, __func__, ##args)
+#define LOGD(fmt, args...)                                                     \
+  do {                                                                         \
+    if (gDebug)                                                                \
+      fprintf(stderr, "D: [%s] " fmt, __func__, ##args);                       \
+  } while (0)
+
+/* trust image has g_trust_max_num backups */
+static uint32_t g_trust_max_num = 2;
+static uint32_t g_trust_max_size = 2 * 1024 * 1024;
+
+/* config sha and rsa */
+#define SHA_SEL_256 3    /* little endian */
+#define SHA_SEL_256_RK 2 /* big endian: only rk3368 need it */
+#define SHA_SEL_160 1
+#define SHA_SEL_NONE 0
+
+#define RSA_SEL_2048_PSS 3 /* only RK3326, PX30, RK3308 */
+#define RSA_SEL_2048 2     /* most platforms except above PSS */
+#define RSA_SEL_1024 1
+#define RSA_SEL_NONE 0
+
+#define is_digit(c) ((c) >= '0' && (c) <= '9')
+
+static char *gConfigPath;
+static OPT_T gOpts;
+#define BL3X_FILESIZE_MAX (512 * 1024)
+static uint8_t gBuf[BL3X_FILESIZE_MAX];
+static bool gSubfix;
+static char *gLegacyPath;
+static char *gNewPath;
+static uint8_t gRSAmode = RSA_SEL_2048;
+static uint8_t gSHAmode = SHA_SEL_256;
+
+const uint8_t gBl3xID[BL_MAX_SEC][4] = { { 'B', 'L', '3', '0' },
+	{ 'B', 'L', '3', '1' },
+	{ 'B', 'L', '3', '2' },
+	{ 'B', 'L', '3', '3' }
+};
+
+static inline uint32_t getBCD(uint16_t value)
+{
+	uint8_t tmp[2] = { 0 };
+	int i;
+	uint32_t ret;
+
+	if (value > 0xFFFF) {
+		return 0;
+	}
+
+	for (i = 0; i < 2; i++) {
+		tmp[i] = (((value / 10) % 10) << 4) | (value % 10);
+		value /= 100;
+	}
+	ret = ((uint16_t)(tmp[1] << 8)) | tmp[0];
+
+	LOGD("ret:%x\n", ret);
+	return ret & 0xFF;
+}
+
+static inline void fixPath(char *path)
+{
+	int i, len = strlen(path);
+	char tmp[MAX_LINE_LEN];
+	char *start, *end;
+
+	for (i = 0; i < len; i++) {
+		if (path[i] == '\\')
+			path[i] = '/';
+		else if (path[i] == '\r' || path[i] == '\n')
+			path[i] = '\0';
+	}
+
+	if (gLegacyPath && gNewPath) {
+		start = strstr(path, gLegacyPath);
+		if (start) {
+			end = start + strlen(gLegacyPath);
+			/* Backup, so tmp can be src for strcat() */
+			strcpy(tmp, end);
+			/* Terminate, so path can be dest for strcat() */
+			*start = '\0';
+			strcat(path, tmp);
+		}
+	}
+}
+
+static bool parseVersion(FILE *file)
+{
+	int d = 0;
+
+	if (SCANF_EAT(file) != 0) {
+		return false;
+	}
+	if (fscanf(file, OPT_MAJOR "=%d", &d) != 1)
+		return false;
+	gOpts.major = (uint16_t) d;
+	if (SCANF_EAT(file) != 0) {
+		return false;
+	}
+	if (fscanf(file, OPT_MINOR "=%d", &d) != 1)
+		return false;
+	gOpts.minor = (uint16_t) d;
+	LOGD("major:%d, minor:%d\n", gOpts.major, gOpts.minor);
+	return true;
+}
+
+static bool parseBL3x(FILE *file, int bl3x_id)
+{
+	int pos;
+	int sec;
+	char buf[MAX_LINE_LEN];
+	bl_entry_t *pbl3x = NULL;
+
+	if (bl3x_id >= BL_MAX_SEC) {
+		return false;
+	}
+
+	pbl3x = &gOpts.bl3x[bl3x_id];
+
+	/* SEC */
+	if (SCANF_EAT(file) != 0) {
+		return false;
+	}
+	if (fscanf(file, OPT_SEC "=%d", &sec) != 1) {
+		return false;
+	}
+	if ((gSubfix) && (bl3x_id == BL32_SEC)) {
+		if (sec == 0) {
+			sec = 1;
+			printf("BL3%d adjust sec from 0 to 1\n", bl3x_id);
+		}
+	}
+	pbl3x->sec = sec;
+	LOGD("bl3%d sec: %d\n", bl3x_id, pbl3x->sec);
+
+	/* PATH */
+	if (SCANF_EAT(file) != 0) {
+		return false;
+	}
+	memset(buf, 0, MAX_LINE_LEN);
+	if (fscanf(file, OPT_PATH "=%s", buf) != 1) {
+		if (pbl3x->sec)
+			return false;
+	} else {
+		if (strlen(buf) != 0) {
+			fixPath(buf);
+			strcpy(pbl3x->path, buf);
+			LOGD("bl3%d path:%s\n", bl3x_id, pbl3x->path);
+		}
+	}
+
+	/* ADDR */
+	if (SCANF_EAT(file) != 0) {
+		return false;
+	}
+	memset(buf, 0, MAX_LINE_LEN);
+	if (fscanf(file, OPT_ADDR "=%s", buf) != 1) {
+		if (pbl3x->sec)
+			return false;
+	} else {
+		if (strlen(buf) != 0) {
+			pbl3x->addr = strtoul(buf, NULL, 16);
+			LOGD("bl3%d addr:0x%x\n", bl3x_id, pbl3x->addr);
+		}
+	}
+
+	pos = ftell(file);
+	if (pos < 0) {
+		return false;
+	}
+	if (SCANF_EAT(file) != 0) {
+		return false;
+	}
+
+	return true;
+}
+
+static bool parseOut(FILE *file)
+{
+	if (SCANF_EAT(file) != 0) {
+		return false;
+	}
+	if (fscanf(file, OPT_OUT_PATH "=%[^\r^\n]", gOpts.outPath) != 1)
+		return false;
+	fixPath(gOpts.outPath);
+	printf("out:%s\n", gOpts.outPath);
+
+	return true;
+}
+
+void printOpts(FILE *out)
+{
+	fprintf(out, SEC_BL30 "\n" OPT_SEC "=%d\n", gOpts.bl3x[BL30_SEC].sec);
+	if (gOpts.bl3x[BL30_SEC].sec) {
+		fprintf(out, OPT_PATH "=%s\n", gOpts.bl3x[BL30_SEC].path);
+		fprintf(out, OPT_ADDR "=0x%08x\n", gOpts.bl3x[BL30_SEC].addr);
+	}
+
+	fprintf(out, SEC_BL31 "\n" OPT_SEC "=%d\n", gOpts.bl3x[BL31_SEC].sec);
+	if (gOpts.bl3x[BL31_SEC].sec) {
+		fprintf(out, OPT_PATH "=%s\n", gOpts.bl3x[BL31_SEC].path);
+		fprintf(out, OPT_ADDR "=0x%08x\n", gOpts.bl3x[BL31_SEC].addr);
+	}
+
+	fprintf(out, SEC_BL32 "\n" OPT_SEC "=%d\n", gOpts.bl3x[BL32_SEC].sec);
+	if (gOpts.bl3x[BL32_SEC].sec) {
+		fprintf(out, OPT_PATH "=%s\n", gOpts.bl3x[BL32_SEC].path);
+		fprintf(out, OPT_ADDR "=0x%08x\n", gOpts.bl3x[BL32_SEC].addr);
+	}
+
+	fprintf(out, SEC_BL33 "\n" OPT_SEC "=%d\n", gOpts.bl3x[BL33_SEC].sec);
+	if (gOpts.bl3x[BL33_SEC].sec) {
+		fprintf(out, OPT_PATH "=%s\n", gOpts.bl3x[BL33_SEC].path);
+		fprintf(out, OPT_ADDR "=0x%08x\n", gOpts.bl3x[BL33_SEC].addr);
+	}
+
+	fprintf(out, SEC_OUT "\n" OPT_OUT_PATH "=%s\n", gOpts.outPath);
+}
+
+static bool parseOpts(void)
+{
+	FILE *file = NULL;
+	char *configPath = (gConfigPath == NULL) ? DEF_CONFIG_FILE : gConfigPath;
+	bool bl30ok = false, bl31ok = false, bl32ok = false, bl33ok = false;
+	bool outOk = false;
+	bool versionOk = false;
+	char buf[MAX_LINE_LEN];
+	bool ret = false;
+
+	file = fopen(configPath, "r");
+	if (!file) {
+		fprintf(stderr, "config(%s) not found!\n", configPath);
+		if (configPath == (char *)DEF_CONFIG_FILE) {
+			file = fopen(DEF_CONFIG_FILE, "w");
+			if (file) {
+				fprintf(stderr, "create defconfig\n");
+				printOpts(file);
+			}
+		}
+		goto end;
+	}
+
+	LOGD("start parse\n");
+
+	if (SCANF_EAT(file) != 0) {
+		goto end;
+	}
+	while (fscanf(file, "%s", buf) == 1) {
+		if (!strcmp(buf, SEC_VERSION)) {
+			versionOk = parseVersion(file);
+			if (!versionOk) {
+				LOGE("parseVersion failed!\n");
+				goto end;
+			}
+		} else if (!strcmp(buf, SEC_BL30)) {
+			bl30ok = parseBL3x(file, BL30_SEC);
+			if (!bl30ok) {
+				LOGE("parseBL30 failed!\n");
+				goto end;
+			}
+		} else if (!strcmp(buf, SEC_BL31)) {
+			bl31ok = parseBL3x(file, BL31_SEC);
+			if (!bl31ok) {
+				LOGE("parseBL31 failed!\n");
+				goto end;
+			}
+		} else if (!strcmp(buf, SEC_BL32)) {
+			bl32ok = parseBL3x(file, BL32_SEC);
+			if (!bl32ok) {
+				LOGE("parseBL32 failed!\n");
+				goto end;
+			}
+		} else if (!strcmp(buf, SEC_BL33)) {
+			bl33ok = parseBL3x(file, BL33_SEC);
+			if (!bl33ok) {
+				LOGE("parseBL33 failed!\n");
+				goto end;
+			}
+		} else if (!strcmp(buf, SEC_OUT)) {
+			outOk = parseOut(file);
+			if (!outOk) {
+				LOGE("parseOut failed!\n");
+				goto end;
+			}
+		} else if (buf[0] == '#') {
+			continue;
+		} else {
+			LOGE("unknown sec: %s!\n", buf);
+			goto end;
+		}
+		if (SCANF_EAT(file) != 0) {
+			goto end;
+		}
+	}
+
+	if (bl30ok && bl31ok && bl32ok && bl33ok && outOk)
+		ret = true;
+end:
+	if (file)
+		fclose(file);
+
+	return ret;
+}
+
+bool initOpts(void)
+{
+
+	memset(&gOpts, 0, sizeof(gOpts));
+
+	gOpts.major = DEF_MAJOR;
+	gOpts.minor = DEF_MINOR;
+
+	memcpy(&gOpts.bl3x[BL30_SEC].id, gBl3xID[BL30_SEC], 4);
+	strcpy(gOpts.bl3x[BL30_SEC].path, DEF_BL30_PATH);
+
+	memcpy(&gOpts.bl3x[BL31_SEC].id, gBl3xID[BL31_SEC], 4);
+	strcpy(gOpts.bl3x[BL31_SEC].path, DEF_BL31_PATH);
+
+	memcpy(&gOpts.bl3x[BL32_SEC].id, gBl3xID[BL32_SEC], 4);
+	strcpy(gOpts.bl3x[BL32_SEC].path, DEF_BL32_PATH);
+
+	memcpy(&gOpts.bl3x[BL33_SEC].id, gBl3xID[BL33_SEC], 4);
+	strcpy(gOpts.bl3x[BL33_SEC].path, DEF_BL33_PATH);
+
+	strcpy(gOpts.outPath, DEF_OUT_PATH);
+
+	return parseOpts();
+}
+
+static inline bool getFileSize(const char *path, uint32_t *size)
+{
+	struct stat st;
+
+	if (stat(path, &st) < 0)
+		return false;
+	*size = st.st_size;
+	LOGD("path:%s, size:%d\n", path, *size);
+	return true;
+}
+
+void fill_file(FILE *file, char ch, uint32_t fill_size)
+{
+	uint8_t fill_buffer[1024];
+	uint32_t cur_write;
+
+	memset(fill_buffer, ch, 1024);
+	while (fill_size > 0) {
+		cur_write = (fill_size >= 1024) ? 1024 : fill_size;
+		fwrite(fill_buffer, 1, cur_write, file);
+		fill_size -= cur_write;
+	}
+}
+
+bool filter_elf(uint32_t index, uint8_t *pMeta, uint32_t *pMetaNum,
+                bool *bElf)
+{
+	bool ret = false;
+	FILE *file = NULL;
+	uint8_t *file_buffer = NULL;
+	uint32_t file_size, read_size, i;
+	Elf32_Ehdr *pElfHeader32;
+	Elf32_Phdr *pElfProgram32;
+	Elf64_Ehdr *pElfHeader64;
+	Elf64_Phdr *pElfProgram64;
+	bl_entry_t *pEntry = (bl_entry_t *)(pMeta + sizeof(bl_entry_t) * (*pMetaNum));
+	LOGD("index=%d,file=%s\n", index, gOpts.bl3x[index].path);
+
+	if (!getFileSize(gOpts.bl3x[index].path, &file_size))
+		goto exit_fileter_elf;
+	file = fopen(gOpts.bl3x[index].path, "rb");
+	if (!file) {
+		LOGE("open file(%s) failed\n", gOpts.bl3x[index].path);
+		goto exit_fileter_elf;
+	}
+	file_buffer = malloc(file_size);
+	if (!file_buffer)
+		goto exit_fileter_elf;
+	read_size = fread(file_buffer, 1, file_size, file);
+	if (read_size != file_size)
+		goto exit_fileter_elf;
+
+	if (*((uint32_t *)file_buffer) != ELF_MAGIC) {
+		ret = true;
+		*bElf = false;
+		goto exit_fileter_elf;
+	}
+	*bElf = true;
+	if (file_buffer[5] != 1) { /* only support little endian */
+		goto exit_fileter_elf;
+	}
+	if (*((uint16_t *)(file_buffer + EI_NIDENT)) !=
+	    2) { /* only support executable case */
+		goto exit_fileter_elf;
+	}
+
+	if (file_buffer[4] == 2) {
+		pElfHeader64 = (Elf64_Ehdr *)file_buffer;
+		for (i = 0; i < pElfHeader64->e_phnum; i++) {
+			pElfProgram64 = (Elf64_Phdr *)(file_buffer + pElfHeader64->e_phoff +
+			                               i * pElfHeader64->e_phentsize);
+			if (pElfProgram64->p_type == 1) { /* PT_LOAD */
+				pEntry->id = gOpts.bl3x[index].id;
+				strcpy(pEntry->path, gOpts.bl3x[index].path);
+				pEntry->size = (uint32_t) pElfProgram64->p_filesz;
+				pEntry->offset = (uint32_t) pElfProgram64->p_offset;
+				pEntry->align_size = DO_ALIGN(pEntry->size, ENTRY_ALIGN);
+				pEntry->addr = (uint32_t) pElfProgram64->p_vaddr;
+				if (pEntry->align_size > BL3X_FILESIZE_MAX) {
+					LOGE("elf_file %s too large,segment=%d.\n", pEntry->path, i);
+					goto exit_fileter_elf;
+				}
+				LOGD("bl3%d: filesize = %d, imagesize = %d, segment=%d\n", index,
+				     pEntry->size, pEntry->align_size, i);
+				pEntry++;
+				(*pMetaNum)++;
+			}
+		}
+
+	} else {
+		pElfHeader32 = (Elf32_Ehdr *)file_buffer;
+		for (i = 0; i < pElfHeader32->e_phnum; i++) {
+			pElfProgram32 = (Elf32_Phdr *)(file_buffer + pElfHeader32->e_phoff +
+			                               i * pElfHeader32->e_phentsize);
+			if (pElfProgram32->p_type == 1) { /* PT_LOAD */
+				pEntry->id = gOpts.bl3x[index].id;
+				strcpy(pEntry->path, gOpts.bl3x[index].path);
+				pEntry->size = pElfProgram32->p_filesz;
+				pEntry->offset = pElfProgram32->p_offset;
+				pEntry->align_size = DO_ALIGN(pEntry->size, ENTRY_ALIGN);
+				pEntry->addr = pElfProgram32->p_vaddr;
+				if (pEntry->align_size > BL3X_FILESIZE_MAX) {
+					LOGE("elf_file %s too large,segment=%d.\n", pEntry->path, i);
+					goto exit_fileter_elf;
+				}
+				LOGD("bl3%d: filesize = %d, imagesize = %d, segment=%d\n", index,
+				     pEntry->size, pEntry->align_size, i);
+				pEntry++;
+				(*pMetaNum)++;
+			}
+		}
+	}
+	ret = true;
+exit_fileter_elf:
+	if (file)
+		fclose(file);
+	if (file_buffer)
+		free(file_buffer);
+	return ret;
+}
+
+#define SHA256_CHECK_SZ ((uint32_t)(256 * 1024))
+static bool bl3xHash256(uint8_t *pHash, uint8_t *pData, uint32_t nDataSize)
+{
+	uint32_t nHashSize, nHasHashSize;
+
+	if (!pHash || !pData || !nDataSize) {
+		return false;
+	}
+
+	nHasHashSize = 0;
+
+	if (gSHAmode == SHA_SEL_256_RK) {
+		sha256_ctx ctx;
+
+		sha256_begin(&ctx);
+		while (nDataSize > 0) {
+			nHashSize = (nDataSize >= SHA256_CHECK_SZ) ? SHA256_CHECK_SZ : nDataSize;
+			sha256_hash(&ctx, pData + nHasHashSize, nHashSize);
+			nHasHashSize += nHashSize;
+			nDataSize -= nHashSize;
+		}
+		sha256_end(&ctx, pHash);
+	} else {
+		sha256_context ctx;
+
+		sha256_starts(&ctx);
+		while (nDataSize > 0) {
+			nHashSize = (nDataSize >= SHA256_CHECK_SZ) ? SHA256_CHECK_SZ : nDataSize;
+			sha256_update(&ctx, pData + nHasHashSize, nHashSize);
+			nHasHashSize += nHashSize;
+			nDataSize -= nHashSize;
+		}
+		sha256_finish(&ctx, pHash);
+	}
+	return true;
+}
+
+static bool mergetrust(void)
+{
+	FILE *outFile = NULL;
+	uint32_t OutFileSize;
+	uint32_t SrcFileNum, SignOffset, nComponentNum;
+	TRUST_HEADER *pHead = NULL;
+	COMPONENT_DATA *pComponentData = NULL;
+	TRUST_COMPONENT *pComponent = NULL;
+	bool ret = false, bElf;
+	uint32_t i, n;
+	uint8_t *outBuf = NULL, *pbuf = NULL, *pMetaBuf = NULL;
+	bl_entry_t *pEntry = NULL;
+	if (!initOpts())
+		return false;
+
+	if (gDebug) {
+		printf("---------------\nUSING CONFIG:\n");
+		printOpts(stdout);
+		printf("---------------\n\n");
+	}
+	pMetaBuf = malloc(sizeof(bl_entry_t) * 32);
+	if (!pMetaBuf) {
+		LOGE("Merge trust image: malloc buffer error.\n");
+		goto end;
+	}
+
+	nComponentNum = SrcFileNum = 0;
+	for (i = BL30_SEC; i < BL_MAX_SEC; i++) {
+		if (gOpts.bl3x[i].sec) {
+			if (!filter_elf(i, pMetaBuf, &nComponentNum, &bElf)) {
+				LOGE("filter_elf %s file failed\n", gOpts.bl3x[i].path);
+				goto end;
+			}
+			if (!bElf) {
+				pEntry = (bl_entry_t *)(pMetaBuf + sizeof(bl_entry_t) * nComponentNum);
+				pEntry->id = gOpts.bl3x[i].id;
+				strcpy(pEntry->path, gOpts.bl3x[i].path);
+				getFileSize(pEntry->path, &pEntry->size);
+				pEntry->offset = 0;
+				pEntry->align_size = DO_ALIGN(pEntry->size, ENTRY_ALIGN);
+				pEntry->addr = gOpts.bl3x[i].addr;
+				if (pEntry->align_size > BL3X_FILESIZE_MAX) {
+					LOGE("file %s too large.\n", gOpts.bl3x[i].path);
+					goto end;
+				}
+				LOGD("bl3%d: filesize = %d, imagesize = %d\n", i, pEntry->size,
+				     pEntry->align_size);
+				pEntry++;
+				nComponentNum++;
+			}
+
+		}
+	}
+	LOGD("bl3x bin sec = %d\n", nComponentNum);
+
+	/* 2048bytes for head */
+	memset(gBuf, 0, TRUST_HEADER_SIZE);
+
+	/* Trust Head */
+	pHead = (TRUST_HEADER *)gBuf;
+	memcpy(&pHead->tag, TRUST_HEAD_TAG, 4);
+	pHead->version = (getBCD(gOpts.major) << 8) | getBCD(gOpts.minor);
+	pHead->flags = 0;
+	pHead->flags |= (gSHAmode << 0);
+	pHead->flags |= (gRSAmode << 4);
+
+	SignOffset = sizeof(TRUST_HEADER) + nComponentNum * sizeof(COMPONENT_DATA);
+	LOGD("trust bin sign offset = %d\n", SignOffset);
+	pHead->size = (nComponentNum << 16) | (SignOffset >> 2);
+
+	pComponent = (TRUST_COMPONENT *)(gBuf + SignOffset + SIGNATURE_SIZE);
+	pComponentData = (COMPONENT_DATA *)(gBuf + sizeof(TRUST_HEADER));
+
+	OutFileSize = TRUST_HEADER_SIZE;
+	pEntry = (bl_entry_t *)pMetaBuf;
+	for (i = 0; i < nComponentNum; i++) {
+		/* bl3x load and run address */
+		pComponentData->LoadAddr = pEntry->addr;
+
+		pComponent->ComponentID = pEntry->id;
+		pComponent->StorageAddr = (OutFileSize >> 9);
+		pComponent->ImageSize = (pEntry->align_size >> 9);
+
+		LOGD("bl3%c: LoadAddr = 0x%08x, StorageAddr = %d, ImageSize = %d\n",
+		     (char)((pEntry->id & 0xFF000000) >> 24), pComponentData->LoadAddr,
+		     pComponent->StorageAddr, pComponent->ImageSize);
+
+		OutFileSize += pEntry->align_size;
+		pComponentData++;
+		pComponent++;
+		pEntry++;
+	}
+
+	/* create out file */
+	outFile = fopen(gOpts.outPath, "wb+");
+	if (!outFile) {
+		LOGE("open out file(%s) failed\n", gOpts.outPath);
+
+		outFile = fopen(DEF_OUT_PATH, "wb");
+		if (!outFile) {
+			LOGE("open default out file:%s failed!\n", DEF_OUT_PATH);
+			goto end;
+		}
+	}
+
+	/* 0 for g_trust_max_num backups */
+#if 0
+	/* save trust head to out file */
+	if (!fwrite(gBuf, TRUST_HEADER_SIZE, 1, outFile))
+		goto end;
+
+	/* save trust bl3x bin */
+	for (i = BL30_SEC; i < BL_MAX_SEC; i++) {
+		if (gOpts.bl3x[i].sec) {
+			FILE *inFile = fopen(gOpts.bl3x[i].path, "rb");
+			if (!inFile)
+				goto end;
+
+			memset(gBuf, 0, imagesize[i]);
+			if (!fread(gBuf, filesize[i], 1, inFile))
+				goto end;
+			fclose(inFile);
+
+			if (!fwrite(gBuf, imagesize[i], 1, outFile))
+				goto end;
+		}
+	}
+#else
+	/* check bin size */
+	if (OutFileSize > g_trust_max_size) {
+		LOGE("Merge trust image: trust bin size overfull.\n");
+		goto end;
+	}
+
+	/* malloc buffer */
+	pbuf = outBuf = calloc(g_trust_max_size, g_trust_max_num);
+	if (!outBuf) {
+		LOGE("Merge trust image: calloc buffer error.\n");
+		goto end;
+	}
+	memset(outBuf, 0, (g_trust_max_size * g_trust_max_num));
+
+	/* save trust head data */
+	memcpy(pbuf, gBuf, TRUST_HEADER_SIZE);
+	pbuf += TRUST_HEADER_SIZE;
+
+	uint8_t *pHashData = NULL;
+	pComponentData = (COMPONENT_DATA *)(outBuf + sizeof(TRUST_HEADER));
+
+	/* save trust bl3x bin */
+	pEntry = (bl_entry_t *)pMetaBuf;
+	for (i = 0; i < nComponentNum; i++) {
+		FILE *inFile = fopen(pEntry->path, "rb");
+		if (!inFile)
+			goto end;
+
+		memset(gBuf, 0, pEntry->align_size);
+		fseek(inFile, pEntry->offset, SEEK_SET);
+		if (!fread(gBuf, pEntry->size, 1, inFile))
+			goto end;
+		fclose(inFile);
+
+		/* bl3x bin hash256 */
+		pHashData = (uint8_t *)&pComponentData->HashData[0];
+		bl3xHash256(pHashData, gBuf, pEntry->align_size);
+		memcpy(pbuf, gBuf, pEntry->align_size);
+
+		pComponentData++;
+		pbuf += pEntry->align_size;
+		pEntry++;
+	}
+
+	/* copy other (g_trust_max_num - 1) backup bin */
+	for (n = 1; n < g_trust_max_num; n++) {
+		memcpy(outBuf + g_trust_max_size * n, outBuf, g_trust_max_size);
+	}
+
+	/* save date to file */
+	if (!fwrite(outBuf, g_trust_max_size * g_trust_max_num, 1, outFile)) {
+		LOGE("Merge trust image: write file error.\n");
+		goto end;
+	}
+#endif
+
+	ret = true;
+
+end:
+	/*
+		for (i = BL30_SEC; i < BL_MAX_SEC; i++) {
+			if (gOpts.bl3x[i].sec != false) {
+				if (gOpts.bl3x[i].is_elf) {
+					if (stat(gOpts.bl3x[i].path, &st) >= 0)
+						remove(gOpts.bl3x[i].path);
+				}
+			}
+		}
+	*/
+	if (pMetaBuf)
+		free(pMetaBuf);
+	if (outBuf)
+		free(outBuf);
+	if (outFile)
+		fclose(outFile);
+	return ret;
+}
+
+static int saveDatatoFile(char *FileName, void *pBuf, uint32_t size)
+{
+	FILE *OutFile = NULL;
+	int ret = -1;
+
+	OutFile = fopen(FileName, "wb");
+	if (!OutFile) {
+		printf("open OutPutFlie:%s failed!\n", FileName);
+		goto end;
+	}
+	if (1 != fwrite(pBuf, size, 1, OutFile)) {
+		printf("write output file failed!\n");
+		goto end;
+	}
+
+	ret = 0;
+end:
+	if (OutFile)
+		fclose(OutFile);
+
+	return ret;
+}
+
+static bool unpacktrust(char *path)
+{
+	FILE *FileSrc = NULL;
+	uint32_t FileSize;
+	uint8_t *pBuf = NULL;
+	uint32_t SrcFileNum, SignOffset;
+	TRUST_HEADER *pHead = NULL;
+	COMPONENT_DATA *pComponentData = NULL;
+	TRUST_COMPONENT *pComponent = NULL;
+	char str[MAX_LINE_LEN];
+	bool ret = false;
+	uint32_t i;
+
+	FileSrc = fopen(path, "rb");
+	if (FileSrc == NULL) {
+		printf("open %s failed!\n", path);
+		goto end;
+	}
+
+	if (getFileSize(path, &FileSize) == false) {
+		printf("File Size failed!\n");
+		goto end;
+	}
+	printf("File Size = %d\n", FileSize);
+
+	pBuf = (uint8_t *)malloc(FileSize);
+	if (1 != fread(pBuf, FileSize, 1, FileSrc)) {
+		printf("read input file failed!\n");
+		goto end;
+	}
+
+	pHead = (TRUST_HEADER *)pBuf;
+
+	memcpy(str, &pHead->tag, 4);
+	str[4] = '\0';
+	printf("Header Tag:%s\n", str);
+	printf("Header version:%d\n", pHead->version);
+	printf("Header flag:%d\n", pHead->flags);
+
+	SrcFileNum = (pHead->size >> 16) & 0xffff;
+	SignOffset = (pHead->size & 0xffff) << 2;
+	printf("SrcFileNum:%d\n", SrcFileNum);
+	printf("SignOffset:%d\n", SignOffset);
+
+	pComponent = (TRUST_COMPONENT *)(pBuf + SignOffset + SIGNATURE_SIZE);
+	pComponentData = (COMPONENT_DATA *)(pBuf + sizeof(TRUST_HEADER));
+
+	for (i = 0; i < SrcFileNum; i++) {
+		printf("Component %d:\n", i);
+
+		memcpy(str, &pComponent->ComponentID, 4);
+		str[4] = '\0';
+		printf("ComponentID:%s\n", str);
+		printf("StorageAddr:0x%x\n", pComponent->StorageAddr);
+		printf("ImageSize:0x%x\n", pComponent->ImageSize);
+		printf("LoadAddr:0x%x\n", pComponentData->LoadAddr);
+
+		saveDatatoFile(str, pBuf + (pComponent->StorageAddr << 9),
+		               pComponent->ImageSize << 9);
+
+		pComponentData++;
+		pComponent++;
+	}
+
+	ret = true;
+end:
+	if (FileSrc)
+		fclose(FileSrc);
+	if (pBuf)
+		free(pBuf);
+
+	return ret;
+}
+
+static void printHelp(void)
+{
+	printf("Usage: trust_merger [options]... FILE\n");
+	printf(
+	        "Merge or unpack Rockchip's trust image (Default action is to merge.)\n");
+	printf("Options:\n");
+	printf("\t" OPT_MERGE "\t\t\tMerge trust with specified config.\n");
+	printf("\t" OPT_UNPACK "\t\tUnpack specified trust to current dir.\n");
+	printf("\t" OPT_VERBOSE "\t\tDisplay more runtime informations.\n");
+	printf("\t" OPT_HELP "\t\t\tDisplay this information.\n");
+	printf("\t" OPT_VERSION "\t\tDisplay version information.\n");
+	printf("\t" OPT_SUBFIX "\t\tSpec subfix.\n");
+	printf("\t" OPT_REPLACE "\t\tReplace some part of binary path.\n");
+	printf("\t" OPT_RSA "\t\t\tRSA mode.\"--rsa [mode]\", [mode] can be: "
+	       "0(none), 1(1024), 2(2048), 3(2048 pss).\n");
+	printf("\t" OPT_SHA
+	       "\t\t\tSHA mode.\"--sha [mode]\", [mode] can be: 0(none), 1(160), "
+	       "2(256 RK big endian), 3(256 little endian).\n");
+	printf("\t" OPT_SIZE "\t\t\tTrustImage size.\"--size [per image KB size] "
+	       "[copy count]\", per image must be 64KB aligned\n");
+}
+
+int main(int argc, char **argv)
+{
+	bool merge = true;
+	char *optPath = NULL;
+	int i;
+
+	gConfigPath = NULL;
+	for (i = 1; i < argc; i++) {
+		if (!strcmp(OPT_VERBOSE, argv[i])) {
+			gDebug = true;
+		} else if (!strcmp(OPT_HELP, argv[i])) {
+			printHelp();
+			return 0;
+		} else if (!strcmp(OPT_VERSION, argv[i])) {
+			printf("trust_merger (cwz@rock-chips.com)\t" VERSION "\n");
+			return 0;
+		} else if (!strcmp(OPT_MERGE, argv[i])) {
+			merge = true;
+		} else if (!strcmp(OPT_UNPACK, argv[i])) {
+			merge = false;
+		} else if (!strcmp(OPT_SUBFIX, argv[i])) {
+			gSubfix = true;
+			printf("trust_merger: Spec subfix!\n");
+		} else if (!strcmp(OPT_REPLACE, argv[i])) {
+			i++;
+			gLegacyPath = argv[i];
+			i++;
+			gNewPath = argv[i];
+		} else if (!strcmp(OPT_RSA, argv[i])) {
+			i++;
+			if (!is_digit(*(argv[i]))) {
+				printHelp();
+				return -1;
+			}
+			gRSAmode = *(argv[i]) - '0';
+			LOGD("rsa mode:%d\n", gRSAmode);
+		} else if (!strcmp(OPT_SHA, argv[i])) {
+			i++;
+			if (!is_digit(*(argv[i]))) {
+				printHelp();
+				return -1;
+			}
+			gSHAmode = *(argv[i]) - '0';
+			LOGD("sha mode:%d\n", gSHAmode);
+		} else if (!strcmp(OPT_SIZE, argv[i])) {
+			/* Per trust image size */
+			g_trust_max_size = strtoul(argv[++i], NULL, 10);
+			/*
+			 * Usually, it must be at 512kb align due to preloader
+			 * detects every 512kb. But some product has critial
+			 * flash size requirement, we have to make it small than
+			 * 512KB.
+			 */
+			if (g_trust_max_size % 64) {
+				printHelp();
+				return -1;
+			}
+			g_trust_max_size *= 1024; /* bytes */
+
+			/* Total backup numbers */
+			g_trust_max_num = strtoul(argv[++i], NULL, 10);
+		} else {
+			if (optPath) {
+				fprintf(stderr, "only need one path arg, but we have:\n%s\n%s.\n",
+				        optPath, argv[i]);
+				printHelp();
+				return -1;
+			}
+			optPath = argv[i];
+		}
+	}
+	if (!merge && !optPath) {
+		fprintf(stderr, "need set out path to unpack!\n");
+		printHelp();
+		return -1;
+	}
+
+	if (merge) {
+		LOGD("do_merge\n");
+		gConfigPath = optPath;
+		if (!mergetrust()) {
+			fprintf(stderr, "merge failed!\n");
+			return -1;
+		}
+		printf("merge success(%s)\n", gOpts.outPath);
+	} else {
+		LOGD("do_unpack\n");
+		if (!unpacktrust(optPath)) {
+			fprintf(stderr, "unpack failed!\n");
+			return -1;
+		}
+		printf("unpack success\n");
+	}
+
+	return 0;
+}
diff --git a/tools/rockchip/trust_merger.h b/tools/rockchip/trust_merger.h
new file mode 100644
index 0000000000..42628fe09f
--- /dev/null
+++ b/tools/rockchip/trust_merger.h
@@ -0,0 +1,185 @@
+/*
+ * Rockchip trust image generator
+ *
+ * (C) Copyright 2008-2015 Fuzhou Rockchip Electronics Co., Ltd
+ * Peter, Software Engineering, <superpeter.cai@gmail.com>.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#ifndef TRUST_MERGER_H
+#define TRUST_MERGER_H
+
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <memory.h>
+#include <stdbool.h>
+
+
+#define VERSION             "v1.0 (2015-06-15)"
+#define DO_ALIGN(a, b)	(((a) > 0) ? ((((a) - 1) / (b) + 1) * (b)) : (a))
+
+
+/* config file */
+#define SEC_VERSION         "[VERSION]"
+#define SEC_BL30            "[BL30_OPTION]"
+#define SEC_BL31            "[BL31_OPTION]"
+#define SEC_BL32            "[BL32_OPTION]"
+#define SEC_BL33            "[BL33_OPTION]"
+#define SEC_OUT             "[OUTPUT]"
+
+#define OPT_MAJOR           "MAJOR"
+#define OPT_MINOR           "MINOR"
+#define OPT_SEC             "SEC"
+#define OPT_PATH            "PATH"
+#define OPT_ADDR            "ADDR"
+#define OPT_OUT_PATH        "PATH"
+
+/* options */
+#define OPT_VERBOSE         "--verbose"
+#define OPT_HELP            "--help"
+#define OPT_VERSION         "--version"
+#define OPT_MERGE           "--pack"
+#define OPT_UNPACK          "--unpack"
+#define OPT_SUBFIX          "--subfix"
+#define OPT_REPLACE         "--replace"
+#define OPT_RSA		    "--rsa"
+#define OPT_SHA		    "--sha"
+#define OPT_SIZE	    "--size"
+
+#define DEF_MAJOR           0
+#define DEF_MINOR           0
+#define DEF_BL30_PATH       "bl30.bin"
+#define DEF_BL31_PATH       "bl31.bin"
+#define DEF_BL32_PATH       "bl32.bin"
+#define DEF_BL33_PATH       "bl33.bin"
+
+#define DEF_OUT_PATH        "trust.img"
+
+#define DEF_CONFIG_FILE     "RKTRUST.ini"
+
+
+#define MAX_LINE_LEN        256
+#define SCANF_EAT(in)       fscanf(in, "%*[ \r\n\t/]")
+
+#define ENTRY_ALIGN         (2048)
+
+enum {
+	BL30_SEC = 0,
+	BL31_SEC,
+	BL32_SEC,
+	BL33_SEC,
+	BL_MAX_SEC
+};
+
+
+
+typedef struct {
+	bool		sec;
+	uint32_t	id;
+	char		path[MAX_LINE_LEN];
+	uint32_t	addr;
+	uint32_t	offset;
+	uint32_t	size;
+	uint32_t	align_size;
+} bl_entry_t;
+
+typedef struct {
+	uint16_t	major;
+	uint16_t	minor;
+	bl_entry_t	bl3x[BL_MAX_SEC];
+	char	outPath[MAX_LINE_LEN];
+} OPT_T;
+
+
+#define TRUST_HEAD_TAG			"BL3X"
+#define SIGNATURE_SIZE			256
+#define TRUST_HEADER_SIZE		2048
+
+typedef struct {
+	uint32_t tag;
+	uint32_t version;
+	uint32_t flags;
+	uint32_t size;
+	uint32_t reserved[4];
+	uint32_t RSA_N[64];
+	uint32_t RSA_E[64];
+	uint32_t RSA_C[64];
+} TRUST_HEADER, *PTRUST_HEADER;
+
+
+typedef struct {
+	uint32_t HashData[8];
+	uint32_t LoadAddr;
+	uint32_t reserved[3];
+} COMPONENT_DATA, *PCOMPONENT_DATA;
+
+
+typedef struct {
+	uint32_t ComponentID;
+	uint32_t StorageAddr;
+	uint32_t ImageSize;
+	uint32_t reserved;
+} TRUST_COMPONENT, *PTRUST_COMPONENT;
+
+#define EI_NIDENT	16
+#define ELF_MAGIC 0x464c457f
+
+typedef struct {
+	uint8_t	e_ident[EI_NIDENT];
+	uint16_t	e_type;
+	uint16_t	e_machine;
+	uint32_t	e_version;
+	uint32_t	e_entry;  /* Entry point */
+	uint32_t	e_phoff;
+	uint32_t	e_shoff;
+	uint32_t	e_flags;
+	uint16_t	e_ehsize;
+	uint16_t	e_phentsize;
+	uint16_t	e_phnum;
+	uint16_t	e_shentsize;
+	uint16_t	e_shnum;
+	uint16_t	e_shstrndx;
+} Elf32_Ehdr;
+
+typedef struct {
+	uint8_t	e_ident[EI_NIDENT];	/* ELF "magic number" */
+	uint16_t e_type;
+	uint16_t e_machine;
+	uint32_t e_version;
+	uint64_t e_entry;		/* Entry point virtual address */
+	uint64_t e_phoff;		/* Program header table file offset */
+	uint64_t e_shoff;		/* Section header table file offset */
+	uint32_t e_flags;
+	uint16_t e_ehsize;
+	uint16_t e_phentsize;
+	uint16_t e_phnum;
+	uint16_t e_shentsize;
+	uint16_t e_shnum;
+	uint16_t e_shstrndx;
+} Elf64_Ehdr;
+
+typedef struct {
+	uint32_t	p_type;
+	uint32_t	p_offset;
+	uint32_t	p_vaddr;
+	uint32_t	p_paddr;
+	uint32_t	p_filesz;
+	uint32_t	p_memsz;
+	uint32_t	p_flags;
+	uint32_t	p_align;
+} Elf32_Phdr;
+
+typedef struct {
+	uint32_t p_type;
+	uint32_t p_flags;
+	uint64_t p_offset;		/* Segment file offset */
+	uint64_t p_vaddr;		/* Segment virtual address */
+	uint64_t p_paddr;		/* Segment physical address */
+	uint64_t p_filesz;		/* Segment size in file */
+	uint64_t p_memsz;		/* Segment size in memory */
+	uint64_t p_align;		/* Segment alignment, file & memory */
+} Elf64_Phdr;
+
+#endif /* TRUST_MERGER_H */

commit bbef4bcaa1ec3a7f024062f813105f936b71bbdd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Sep 26 17:00:15 2018 +0800

    sysreset: use psci sysreset as primary for rockchip platforms
    
    "rockchip_reset" is applied if PSCI is not enabled.
    
    Change-Id: Id219bf6d4c5d75e2b35af41b42ee0fc718800b68
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
index 3b100df3b9..76fcd3165a 100644
--- a/drivers/sysreset/Makefile
+++ b/drivers/sysreset/Makefile
@@ -5,7 +5,9 @@
 #
 
 obj-$(CONFIG_$(SPL_TPL_)SYSRESET) += sysreset-uclass.o
+ifndef CONFIG_TPL_BUILD
 obj-$(CONFIG_SYSRESET_PSCI) += sysreset_psci.o
+endif
 obj-$(CONFIG_SYSRESET_SYSCON) += sysreset_syscon.o
 obj-$(CONFIG_SYSRESET_WATCHDOG) += sysreset_watchdog.o
 
diff --git a/drivers/sysreset/sysreset-uclass.c b/drivers/sysreset/sysreset-uclass.c
index 0747c52b60..489f80fd48 100644
--- a/drivers/sysreset/sysreset-uclass.c
+++ b/drivers/sysreset/sysreset-uclass.c
@@ -30,6 +30,20 @@ int sysreset_walk(enum sysreset_t type)
 	struct udevice *dev;
 	int ret = -ENOSYS;
 
+	/*
+	 * Use psci sysreset as primary for rockchip platforms,
+	 * "rockchip_reset" is applied if PSCI is disabled.
+	 */
+#if !defined(CONFIG_TPL_BUILD) && \
+     defined(CONFIG_ARCH_ROCKCHIP) && defined(CONFIG_SYSRESET_PSCI)
+	ret = uclass_get_device_by_driver(UCLASS_SYSRESET,
+					  DM_GET_DRIVER(psci_sysreset), &dev);
+	if (!ret)
+		sysreset_request(dev, type);
+	else
+		printf("WARN: PSCI sysreset is disabled\n");
+#endif
+
 	while (ret != -EINPROGRESS && type < SYSRESET_COUNT) {
 		for (uclass_first_device(UCLASS_SYSRESET, &dev);
 		     dev;

commit aeed442f965911ae61129982d7bb5f34b2bde1cf
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Wed Sep 19 17:37:03 2018 +0800

    thermal: support rockchip thermal drivers
    
    Create driver to support all Rockchip SoCs tsadc get temp.
    Example of usage:
            struct udevice *thermal;
            int *temp = 0;
    
            ret = uclass_get_device(UCLASS_THERMAL, 0, &thermal);
            thermal_get_temp(thermal, temp);
    
    Change-Id: Ie63d3832c2186b4197215a670903d49046ed722a
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index 886f5fa546..daa36d5b7e 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -17,4 +17,10 @@ config IMX_THERMAL
           cpufreq is used as the cooling device to throttle CPUs when the
           passive trip is crossed.
 
+config ROCKCHIP_THERMAL
+	bool "Temperature sensor driver for Rockchip SoCs"
+	depends on CLK
+	help
+	  Support for Temperature Monitor (TEMPMON) found on Rockchip SoCs.
+
 endif # if DM_THERMAL
diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
index d768f5ef80..05f60926ac 100644
--- a/drivers/thermal/Makefile
+++ b/drivers/thermal/Makefile
@@ -7,3 +7,4 @@
 
 obj-$(CONFIG_DM_THERMAL) += thermal-uclass.o
 obj-$(CONFIG_IMX_THERMAL) += imx_thermal.o
+obj-$(CONFIG_ROCKCHIP_THERMAL) += rockchip_thermal.o
diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
new file mode 100644
index 0000000000..e826d5e12f
--- /dev/null
+++ b/drivers/thermal/rockchip_thermal.c
@@ -0,0 +1,1096 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <bitfield.h>
+#include <thermal.h>
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <div64.h>
+#include <errno.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/hardware.h>
+#include <asm/io.h>
+#include <dm/lists.h>
+#include <clk.h>
+#include <clk-uclass.h>
+#include <reset.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/**
+ * If the temperature over a period of time High,
+ * the resulting TSHUT gave CRU module,let it reset the entire chip,
+ * or via GPIO give PMIC.
+ */
+enum tshut_mode {
+	TSHUT_MODE_CRU = 0,
+	TSHUT_MODE_GPIO,
+};
+
+/**
+ * The system Temperature Sensors tshut(tshut) polarity
+ * the bit 8 is tshut polarity.
+ * 0: low active, 1: high active
+ */
+enum tshut_polarity {
+	TSHUT_LOW_ACTIVE = 0,
+	TSHUT_HIGH_ACTIVE,
+};
+
+/**
+ * The conversion table has the adc value and temperature.
+ * ADC_DECREMENT: the adc value is of diminishing.(e.g. rk3288_code_table)
+ * ADC_INCREMENT: the adc value is incremental.(e.g. rk3368_code_table)
+ */
+enum adc_sort_mode {
+	ADC_DECREMENT = 0,
+	ADC_INCREMENT,
+};
+
+#define SOC_MAX_SENSORS				2
+
+#define TSADCV2_USER_CON			0x00
+#define TSADCV2_AUTO_CON			0x04
+#define TSADCV2_INT_EN				0x08
+#define TSADCV2_INT_PD				0x0c
+#define TSADCV2_DATA(chn)			(0x20 + (chn) * 0x04)
+#define TSADCV2_COMP_INT(chn)		        (0x30 + (chn) * 0x04)
+#define TSADCV2_COMP_SHUT(chn)		        (0x40 + (chn) * 0x04)
+#define TSADCV2_HIGHT_INT_DEBOUNCE		0x60
+#define TSADCV2_HIGHT_TSHUT_DEBOUNCE		0x64
+#define TSADCV2_AUTO_PERIOD			0x68
+#define TSADCV2_AUTO_PERIOD_HT			0x6c
+
+#define TSADCV2_AUTO_EN				BIT(0)
+#define TSADCV2_AUTO_SRC_EN(chn)		BIT(4 + (chn))
+#define TSADCV2_AUTO_TSHUT_POLARITY_HIGH	BIT(8)
+
+#define TSADCV3_AUTO_Q_SEL_EN			BIT(1)
+
+#define TSADCV2_INT_SRC_EN(chn)			BIT(chn)
+#define TSADCV2_SHUT_2GPIO_SRC_EN(chn)		BIT(4 + (chn))
+#define TSADCV2_SHUT_2CRU_SRC_EN(chn)		BIT(8 + (chn))
+
+#define TSADCV2_INT_PD_CLEAR_MASK		~BIT(8)
+#define TSADCV3_INT_PD_CLEAR_MASK		~BIT(16)
+
+#define TSADCV2_DATA_MASK			0xfff
+#define TSADCV3_DATA_MASK			0x3ff
+
+#define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT	4
+#define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT	4
+#define TSADCV2_AUTO_PERIOD_TIME		250
+#define TSADCV2_AUTO_PERIOD_HT_TIME		50
+#define TSADCV3_AUTO_PERIOD_TIME		1875
+#define TSADCV3_AUTO_PERIOD_HT_TIME		1875
+
+#define TSADCV2_USER_INTER_PD_SOC		0x340	/* 13 clocks */
+
+#define GRF_SARADC_TESTBIT			0x0e644
+#define GRF_TSADC_TESTBIT_L			0x0e648
+#define GRF_TSADC_TESTBIT_H			0x0e64c
+
+#define PX30_GRF_SOC_CON2			0x0408
+
+#define GRF_SARADC_TESTBIT_ON			(0x10001 << 2)
+#define GRF_TSADC_TESTBIT_H_ON			(0x10001 << 2)
+#define GRF_TSADC_VCM_EN_L			(0x10001 << 7)
+#define GRF_TSADC_VCM_EN_H			(0x10001 << 7)
+
+#define GRF_CON_TSADC_CH_INV			(0x10001 << 1)
+
+#define MIN_TEMP				(-40000)
+#define LOWEST_TEMP				(-273000)
+#define MAX_TEMP				(125000)
+#define MAX_ENV_TEMP				(85000)
+
+#define BASE					(1024)
+#define BASE_SHIFT				(10)
+#define START_DEBOUNCE_COUNT			(100)
+#define HIGHER_DEBOUNCE_TEMP			(30000)
+#define LOWER_DEBOUNCE_TEMP			(15000)
+
+/**
+ * struct tsadc_table - hold information about code and temp mapping
+ * @code: raw code from tsadc ip
+ * @temp: the mapping temperature
+ */
+
+struct tsadc_table {
+	unsigned long code;
+	int temp;
+};
+
+struct chip_tsadc_table {
+	const struct tsadc_table *id;
+	unsigned int length;
+	u32 data_mask;
+	enum adc_sort_mode mode;
+};
+
+enum sensor_id {
+	SENSOR_CPU = 0,
+	SENSOR_GPU,
+};
+
+struct rockchip_tsadc_chip {
+	/* The sensor id of chip correspond to the ADC channel */
+	int chn_id[SOC_MAX_SENSORS];
+	int chn_num;
+	fdt_addr_t base;
+	fdt_addr_t grf;
+
+	/* The hardware-controlled tshut property */
+	int tshut_temp;
+	enum tshut_mode tshut_mode;
+	enum tshut_polarity tshut_polarity;
+
+	void (*tsadc_control)(struct udevice *dev, bool enable);
+	void (*tsadc_init)(struct udevice *dev);
+	int (*tsadc_get_temp)(struct udevice *dev, int chn,
+			      int *temp);
+	void (*irq_ack)(struct udevice *dev);
+	void (*set_alarm_temp)(struct udevice *dev,
+			       int chn, int temp);
+	void (*set_tshut_temp)(struct udevice *dev,
+			       int chn, int temp);
+	void (*set_tshut_mode)(struct udevice *dev, int chn, enum tshut_mode m);
+	struct chip_tsadc_table table;
+};
+
+struct rockchip_thermal_priv {
+	void *base;
+	void *grf;
+	enum tshut_mode tshut_mode;
+	const struct rockchip_tsadc_chip *data;
+};
+
+static const struct tsadc_table rk1808_code_table[] = {
+	{TSADCV2_DATA_MASK, -40000},
+	{641, -40000},
+	{633, -35000},
+	{625, -30000},
+	{617, -25000},
+	{609, -20000},
+	{601, -15000},
+	{593, -10000},
+	{585, -5000},
+	{577, 0},
+	{569, 5000},
+	{561, 10000},
+	{553, 15000},
+	{545, 20000},
+	{537, 25000},
+	{529, 30000},
+	{520, 35000},
+	{512, 40000},
+	{504, 45000},
+	{496, 50000},
+	{487, 55000},
+	{479, 60000},
+	{471, 65000},
+	{463, 70000},
+	{454, 75000},
+	{446, 80000},
+	{437, 85000},
+	{429, 90000},
+	{421, 95000},
+	{412, 100000},
+	{404, 105000},
+	{395, 110000},
+	{387, 115000},
+	{378, 120000},
+	{370, 125000},
+	{0, 125000},
+};
+
+static const struct tsadc_table rk3228_code_table[] = {
+	{0, -40000},
+	{588, -40000},
+	{593, -35000},
+	{598, -30000},
+	{603, -25000},
+	{608, -20000},
+	{613, -15000},
+	{618, -10000},
+	{623, -5000},
+	{629, 0},
+	{634, 5000},
+	{639, 10000},
+	{644, 15000},
+	{649, 20000},
+	{654, 25000},
+	{660, 30000},
+	{665, 35000},
+	{670, 40000},
+	{675, 45000},
+	{681, 50000},
+	{686, 55000},
+	{691, 60000},
+	{696, 65000},
+	{702, 70000},
+	{707, 75000},
+	{712, 80000},
+	{717, 85000},
+	{723, 90000},
+	{728, 95000},
+	{733, 100000},
+	{738, 105000},
+	{744, 110000},
+	{749, 115000},
+	{754, 120000},
+	{760, 125000},
+	{TSADCV2_DATA_MASK, 125000},
+};
+
+static const struct tsadc_table rk3288_code_table[] = {
+	{TSADCV2_DATA_MASK, -40000},
+	{3800, -40000},
+	{3792, -35000},
+	{3783, -30000},
+	{3774, -25000},
+	{3765, -20000},
+	{3756, -15000},
+	{3747, -10000},
+	{3737, -5000},
+	{3728, 0},
+	{3718, 5000},
+	{3708, 10000},
+	{3698, 15000},
+	{3688, 20000},
+	{3678, 25000},
+	{3667, 30000},
+	{3656, 35000},
+	{3645, 40000},
+	{3634, 45000},
+	{3623, 50000},
+	{3611, 55000},
+	{3600, 60000},
+	{3588, 65000},
+	{3575, 70000},
+	{3563, 75000},
+	{3550, 80000},
+	{3537, 85000},
+	{3524, 90000},
+	{3510, 95000},
+	{3496, 100000},
+	{3482, 105000},
+	{3467, 110000},
+	{3452, 115000},
+	{3437, 120000},
+	{3421, 125000},
+};
+
+static const struct tsadc_table rk3328_code_table[] = {
+	{0, -40000},
+	{296, -40000},
+	{304, -35000},
+	{313, -30000},
+	{331, -20000},
+	{340, -15000},
+	{349, -10000},
+	{359, -5000},
+	{368, 0},
+	{378, 5000},
+	{388, 10000},
+	{398, 15000},
+	{408, 20000},
+	{418, 25000},
+	{429, 30000},
+	{440, 35000},
+	{451, 40000},
+	{462, 45000},
+	{473, 50000},
+	{485, 55000},
+	{496, 60000},
+	{508, 65000},
+	{521, 70000},
+	{533, 75000},
+	{546, 80000},
+	{559, 85000},
+	{572, 90000},
+	{586, 95000},
+	{600, 100000},
+	{614, 105000},
+	{629, 110000},
+	{644, 115000},
+	{659, 120000},
+	{675, 125000},
+	{TSADCV2_DATA_MASK, 125000},
+};
+
+static const struct tsadc_table rk3368_code_table[] = {
+	{0, -40000},
+	{106, -40000},
+	{108, -35000},
+	{110, -30000},
+	{112, -25000},
+	{114, -20000},
+	{116, -15000},
+	{118, -10000},
+	{120, -5000},
+	{122, 0},
+	{124, 5000},
+	{126, 10000},
+	{128, 15000},
+	{130, 20000},
+	{132, 25000},
+	{134, 30000},
+	{136, 35000},
+	{138, 40000},
+	{140, 45000},
+	{142, 50000},
+	{144, 55000},
+	{146, 60000},
+	{148, 65000},
+	{150, 70000},
+	{152, 75000},
+	{154, 80000},
+	{156, 85000},
+	{158, 90000},
+	{160, 95000},
+	{162, 100000},
+	{163, 105000},
+	{165, 110000},
+	{167, 115000},
+	{169, 120000},
+	{171, 125000},
+	{TSADCV3_DATA_MASK, 125000},
+};
+
+static const struct tsadc_table rk3399_code_table[] = {
+	{0, -40000},
+	{402, -40000},
+	{410, -35000},
+	{419, -30000},
+	{427, -25000},
+	{436, -20000},
+	{444, -15000},
+	{453, -10000},
+	{461, -5000},
+	{470, 0},
+	{478, 5000},
+	{487, 10000},
+	{496, 15000},
+	{504, 20000},
+	{513, 25000},
+	{521, 30000},
+	{530, 35000},
+	{538, 40000},
+	{547, 45000},
+	{555, 50000},
+	{564, 55000},
+	{573, 60000},
+	{581, 65000},
+	{590, 70000},
+	{599, 75000},
+	{607, 80000},
+	{616, 85000},
+	{624, 90000},
+	{633, 95000},
+	{642, 100000},
+	{650, 105000},
+	{659, 110000},
+	{668, 115000},
+	{677, 120000},
+	{685, 125000},
+	{TSADCV3_DATA_MASK, 125000},
+};
+
+/*
+ * Struct used for matching a device
+ */
+struct of_device_id {
+	char compatible[32];
+	const void *data;
+};
+
+static int tsadc_code_to_temp(struct chip_tsadc_table *table, u32 code,
+			      int *temp)
+{
+	unsigned int low = 1;
+	unsigned int high = table->length - 1;
+	unsigned int mid = (low + high) / 2;
+	unsigned int num;
+	unsigned long denom;
+
+	switch (table->mode) {
+	case ADC_DECREMENT:
+		code &= table->data_mask;
+		if (code < table->id[high].code)
+			return -EAGAIN;	/* Incorrect reading */
+
+		while (low <= high) {
+			if (code >= table->id[mid].code &&
+			    code < table->id[mid - 1].code)
+				break;
+			else if (code < table->id[mid].code)
+				low = mid + 1;
+			else
+				high = mid - 1;
+
+			mid = (low + high) / 2;
+		}
+		break;
+	case ADC_INCREMENT:
+		code &= table->data_mask;
+		if (code < table->id[low].code)
+			return -EAGAIN;	/* Incorrect reading */
+
+		while (low <= high) {
+			if (code <= table->id[mid].code &&
+			    code > table->id[mid - 1].code)
+				break;
+			else if (code > table->id[mid].code)
+				low = mid + 1;
+			else
+				high = mid - 1;
+
+			mid = (low + high) / 2;
+		}
+		break;
+	default:
+		printf("%s: Invalid the conversion table mode=%d\n",
+		       __func__, table->mode);
+		return -EINVAL;
+	}
+
+	/*
+	 * The 5C granularity provided by the table is too much. Let's
+	 * assume that the relationship between sensor readings and
+	 * temperature between 2 table entries is linear and interpolate
+	 * to produce less granular result.
+	 */
+	num = table->id[mid].temp - table->id[mid - 1].temp;
+	num *= abs(table->id[mid - 1].code - code);
+	denom = abs(table->id[mid - 1].code - table->id[mid].code);
+	*temp = table->id[mid - 1].temp + (num / denom);
+
+	return 0;
+}
+
+static u32 tsadc_temp_to_code_v2(struct chip_tsadc_table table,
+				 int temp)
+{
+	int high, low, mid;
+	u32 error = table.data_mask;
+
+	low = 0;
+	high = table.length - 1;
+	mid = (high + low) / 2;
+
+	/* Return mask code data when the temp is over table range */
+	if (temp < table.id[low].temp || temp > table.id[high].temp)
+		goto exit;
+
+	while (low <= high) {
+		if (temp == table.id[mid].temp)
+			return table.id[mid].code;
+		else if (temp < table.id[mid].temp)
+			high = mid - 1;
+		else
+			low = mid + 1;
+		mid = (low + high) / 2;
+	}
+
+exit:
+	pr_err("%s: Invalid conversion table: code=%d, temperature=%d\n",
+	       __func__, error, temp);
+
+	return error;
+}
+
+static void tsadc_irq_ack_v2(struct udevice *dev)
+{
+	struct rockchip_thermal_priv *priv = dev_get_priv(dev);
+	u32 val;
+
+	val = readl(priv->base + TSADCV2_INT_PD);
+	writel(val & TSADCV2_INT_PD_CLEAR_MASK, priv->base + TSADCV2_INT_PD);
+}
+
+static void tsadc_irq_ack_v3(struct udevice *dev)
+{
+	struct rockchip_thermal_priv *priv = dev_get_priv(dev);
+	u32 val;
+
+	val = readl(priv->base + TSADCV2_INT_PD);
+	writel(val & TSADCV3_INT_PD_CLEAR_MASK, priv->base + TSADCV2_INT_PD);
+}
+
+static void tsadc_control_v3(struct udevice *dev, bool enable)
+{
+	struct rockchip_thermal_priv *priv = dev_get_priv(dev);
+	u32 val;
+
+	val = readl(priv->base + TSADCV2_AUTO_CON);
+	if (enable)
+		val |= TSADCV2_AUTO_EN | TSADCV3_AUTO_Q_SEL_EN;
+	else
+		val &= ~TSADCV2_AUTO_EN;
+
+	writel(val, priv->base + TSADCV2_AUTO_CON);
+}
+
+static void tsadc_control_v2(struct udevice *dev, bool enable)
+{
+	struct rockchip_thermal_priv *priv = dev_get_priv(dev);
+	u32 val;
+
+	val = readl(priv->base + TSADCV2_AUTO_CON);
+	if (enable)
+		val |= TSADCV2_AUTO_EN;
+	else
+		val &= ~TSADCV2_AUTO_EN;
+
+	writel(val, priv->base + TSADCV2_AUTO_CON);
+}
+
+static void tsadc_init_v2(struct udevice *dev)
+{
+	struct rockchip_thermal_priv *priv = dev_get_priv(dev);
+
+	writel(TSADCV2_AUTO_PERIOD_TIME,
+	       priv->base + TSADCV2_AUTO_PERIOD);
+	writel(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
+	       priv->base + TSADCV2_HIGHT_INT_DEBOUNCE);
+	writel(TSADCV2_AUTO_PERIOD_HT_TIME,
+	       priv->base + TSADCV2_AUTO_PERIOD_HT);
+	writel(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
+	       priv->base + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
+
+	if (priv->data->tshut_polarity == TSHUT_HIGH_ACTIVE)
+		writel(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
+		       priv->base + TSADCV2_AUTO_CON);
+	else
+		writel(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
+		       priv->base + TSADCV2_AUTO_CON);
+}
+
+static void tsadc_init_v3(struct udevice *dev)
+{
+	struct rockchip_thermal_priv *priv = dev_get_priv(dev);
+
+	if (!IS_ERR(priv->grf)) {
+		writel(GRF_TSADC_VCM_EN_L, priv->grf + GRF_TSADC_TESTBIT_L);
+		writel(GRF_TSADC_VCM_EN_H, priv->grf + GRF_TSADC_TESTBIT_H);
+
+		udelay(100);/* The spec note says at least 15 us */
+		writel(GRF_SARADC_TESTBIT_ON, priv->grf + GRF_SARADC_TESTBIT);
+		writel(GRF_TSADC_TESTBIT_H_ON, priv->grf + GRF_TSADC_TESTBIT_H);
+		udelay(200);/* The spec note says at least 90 us */
+	}
+	tsadc_init_v2(dev);
+}
+
+static void __maybe_unused tsadc_init_v5(struct udevice *dev)
+{
+	struct rockchip_thermal_priv *priv = dev_get_priv(dev);
+
+	/* Set interleave value to workround ic time sync issue */
+	writel(TSADCV2_USER_INTER_PD_SOC, priv->base +
+		       TSADCV2_USER_CON);
+	tsadc_init_v2(dev);
+}
+
+static void tsadc_init_v4(struct udevice *dev)
+{
+	struct rockchip_thermal_priv *priv = dev_get_priv(dev);
+
+	tsadc_init_v2(dev);
+	if (!IS_ERR(priv->grf))
+		writel(GRF_CON_TSADC_CH_INV, priv->grf + PX30_GRF_SOC_CON2);
+}
+
+static int tsadc_get_temp_v2(struct udevice *dev,
+			     int chn, int *temp)
+{
+	struct rockchip_thermal_priv *priv = dev_get_priv(dev);
+	struct chip_tsadc_table table = priv->data->table;
+	u32 val;
+
+	val = readl(priv->base + TSADCV2_DATA(chn));
+
+	return tsadc_code_to_temp(&table, val, temp);
+}
+
+static int predict_temp(int temp)
+{
+	/*
+	 * The deviation of prediction. the temperature will not change rapidly,
+	 * so this cov_q is small
+	 */
+	int cov_q = 18;
+	/*
+	 * The deviation of tsadc's reading, deviation of tsadc is very big when
+	 * abnormal temperature is get
+	 */
+	int cov_r = 542;
+
+	int gain;
+	int temp_mid;
+	int temp_now;
+	int prob_mid;
+	int prob_now;
+	static int temp_last = LOWEST_TEMP;
+	static int prob_last = 160;
+	static int bounding_cnt;
+
+	/*
+	 * init temp_last with a more suitable value, which mostly equals to
+	 * temp reading from tsadc, but not higher than MAX_ENV_TEMP. If the
+	 * temp is higher than MAX_ENV_TEMP, it is assumed to be abnormal
+	 * value and temp_last is adjusted to MAX_ENV_TEMP.
+	 */
+	if (temp_last == LOWEST_TEMP)
+		temp_last = min(temp, MAX_ENV_TEMP);
+
+	/*
+	 * Before START_DEBOUNCE_COUNT's samples of temperature, we consider
+	 * tsadc is stable, i.e. after that, the temperature may be not stable
+	 * and may have abnormal reading, so we set a bounding temperature. If
+	 * the reading from tsadc is too big, we set the delta temperature of
+	 * DEBOUNCE_TEMP/3 comparing to the last temperature.
+	 */
+
+	if (bounding_cnt++ > START_DEBOUNCE_COUNT) {
+		bounding_cnt = START_DEBOUNCE_COUNT;
+		if (temp - temp_last > HIGHER_DEBOUNCE_TEMP)
+			temp = temp_last + HIGHER_DEBOUNCE_TEMP / 3;
+		if (temp_last - temp > LOWER_DEBOUNCE_TEMP)
+			temp = temp_last - LOWER_DEBOUNCE_TEMP / 3;
+	}
+
+	temp_mid = temp_last;
+
+	/* calculate the probability of this time's prediction */
+	prob_mid = prob_last + cov_q;
+
+	/* calculate the Kalman Gain */
+	gain = (prob_mid * BASE) / (prob_mid + cov_r);
+
+	/* calculate the prediction of temperature */
+	temp_now = (temp_mid * BASE + gain * (temp - temp_mid)) >> BASE_SHIFT;
+
+	/*
+	 * Base on this time's Kalman Gain, ajust our probability of prediction
+	 * for next time calculation
+	 */
+	prob_now = ((BASE - gain) * prob_mid) >> BASE_SHIFT;
+
+	prob_last = prob_now;
+	temp_last = temp_now;
+
+	return temp_last;
+}
+
+static int tsadc_get_temp_v3(struct udevice *dev,
+			     int chn, int *temp)
+{
+	int ret;
+
+	ret = tsadc_get_temp_v2(dev, chn, temp);
+	if (!ret)
+		*temp = predict_temp(*temp);
+
+	return ret;
+}
+
+static void tsadc_alarm_temp_v2(struct udevice *dev,
+				int chn, int temp)
+{
+	struct rockchip_thermal_priv *priv = dev_get_priv(dev);
+	struct chip_tsadc_table table = priv->data->table;
+	u32 alarm_value, int_en;
+
+	alarm_value = tsadc_temp_to_code_v2(table, temp);
+	if (alarm_value == table.data_mask)
+		return;
+
+	writel(alarm_value, priv->base + TSADCV2_COMP_INT(chn));
+
+	int_en = readl(priv->base + TSADCV2_INT_EN);
+	int_en |= TSADCV2_INT_SRC_EN(chn);
+	writel(int_en, priv->base + TSADCV2_INT_EN);
+}
+
+static void tsadc_tshut_temp_v2(struct udevice *dev,
+				int chn, int temp)
+{
+	struct rockchip_thermal_priv *priv = dev_get_priv(dev);
+	struct chip_tsadc_table table = priv->data->table;
+	u32 tshut_value, val;
+
+	tshut_value = tsadc_temp_to_code_v2(table, temp);
+	if (tshut_value == table.data_mask)
+		return;
+
+	writel(tshut_value, priv->base + TSADCV2_COMP_SHUT(chn));
+
+	/* TSHUT will be valid */
+	val = readl(priv->base + TSADCV2_AUTO_CON);
+	writel(val | TSADCV2_AUTO_SRC_EN(chn), priv->base + TSADCV2_AUTO_CON);
+}
+
+static void tsadc_tshut_mode_v2(struct udevice *dev, int chn,
+				enum tshut_mode mode)
+{
+	struct rockchip_thermal_priv *priv = dev_get_priv(dev);
+	u32 val;
+
+	val = readl(priv->base + TSADCV2_INT_EN);
+	if (mode == TSHUT_MODE_GPIO) {
+		val &= ~TSADCV2_SHUT_2CRU_SRC_EN(chn);
+		val |= TSADCV2_SHUT_2GPIO_SRC_EN(chn);
+	} else {
+		val &= ~TSADCV2_SHUT_2GPIO_SRC_EN(chn);
+		val |= TSADCV2_SHUT_2CRU_SRC_EN(chn);
+	}
+
+	writel(val, priv->base + TSADCV2_INT_EN);
+}
+
+int rockchip_thermal_get_temp(struct udevice *dev, int *temp)
+{
+	struct rockchip_thermal_priv *priv = dev_get_priv(dev);
+
+	priv->data->tsadc_get_temp(dev, 0, temp);
+
+	return 0;
+}
+
+static const struct dm_thermal_ops rockchip_thermal_ops = {
+	.get_temp	= rockchip_thermal_get_temp,
+};
+
+static int rockchip_thermal_probe(struct udevice *dev)
+{
+	struct rockchip_thermal_priv *priv = dev_get_priv(dev);
+	struct rockchip_tsadc_chip *tsadc;
+	int ret, i, shut_temp;
+
+	/* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
+	ret = clk_set_defaults(dev);
+	if (ret)
+		printf("%s clk_set_defaults failed %d\n", __func__, ret);
+
+	tsadc = (struct rockchip_tsadc_chip *)dev_get_driver_data(dev);
+	priv->data = tsadc;
+
+	priv->tshut_mode = dev_read_u32_default(dev,
+						"rockchip,hw-tshut-mode",
+						-1);
+	if (priv->tshut_mode < 0)
+		priv->tshut_mode = priv->data->tshut_mode;
+
+	if (priv->tshut_mode == TSHUT_MODE_GPIO)
+		pinctrl_select_state(dev, "otpout");
+	else
+		pinctrl_select_state(dev, "gpio");
+
+	tsadc->tsadc_init(dev);
+	tsadc->irq_ack(dev);
+
+	shut_temp = dev_read_u32_default(dev, "rockchip,hw-tshut-temp", -1);
+	if (shut_temp < 0)
+		shut_temp = 120000;
+
+	for (i = 0; i < tsadc->chn_num; i++) {
+		tsadc->set_alarm_temp(dev, i, tsadc->tshut_temp);
+		tsadc->set_tshut_temp(dev, i, shut_temp);
+		if (priv->tshut_mode == TSHUT_MODE_GPIO)
+			tsadc->set_tshut_mode(dev, i, TSHUT_MODE_GPIO);
+		else
+			tsadc->set_tshut_mode(dev, i, TSHUT_MODE_CRU);
+	}
+
+	tsadc->tsadc_control(dev, true);
+	udelay(1000);
+
+	debug("tsadc probed successfully\n");
+
+	return 0;
+}
+
+static int rockchip_thermal_ofdata_to_platdata(struct udevice *dev)
+{
+	struct rockchip_thermal_priv *priv = dev_get_priv(dev);
+
+	priv->base = dev_read_addr_ptr(dev);
+	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
+	return 0;
+}
+
+static const struct rockchip_tsadc_chip rk1808_tsadc_data = {
+	.chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
+	.chn_num = 1, /* one channel for tsadc */
+
+	.tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
+	.tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
+	.tshut_temp = 95000,
+
+	.tsadc_init = tsadc_init_v2,
+	.tsadc_control = tsadc_control_v3,
+	.tsadc_get_temp = tsadc_get_temp_v2,
+	.irq_ack = tsadc_irq_ack_v3,
+	.set_alarm_temp = tsadc_alarm_temp_v2,
+	.set_tshut_temp = tsadc_tshut_temp_v2,
+	.set_tshut_mode = tsadc_tshut_mode_v2,
+
+	.table = {
+		.id = rk1808_code_table,
+		.length = ARRAY_SIZE(rk1808_code_table),
+		.data_mask = TSADCV2_DATA_MASK,
+		.mode = ADC_DECREMENT,
+	},
+};
+
+static const struct rockchip_tsadc_chip rk3228_tsadc_data = {
+	.chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
+	.chn_num = 1, /* one channel for tsadc */
+
+	.tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
+	.tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
+	.tshut_temp = 95000,
+
+	.tsadc_init = tsadc_init_v2,
+	.tsadc_control = tsadc_control_v3,
+	.tsadc_get_temp = tsadc_get_temp_v2,
+	.irq_ack = tsadc_irq_ack_v3,
+	.set_alarm_temp = tsadc_alarm_temp_v2,
+	.set_tshut_temp = tsadc_tshut_temp_v2,
+	.set_tshut_mode = tsadc_tshut_mode_v2,
+
+	.table = {
+		.id = rk3228_code_table,
+		.length = ARRAY_SIZE(rk3228_code_table),
+		.data_mask = TSADCV3_DATA_MASK,
+		.mode = ADC_INCREMENT,
+	},
+};
+
+static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
+	.chn_id[SENSOR_CPU] = 1, /* cpu sensor is channel 1 */
+	.chn_id[SENSOR_GPU] = 2, /* gpu sensor is channel 2 */
+	.chn_num = 2, /* two channels for tsadc */
+
+	.tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
+	.tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
+	.tshut_temp = 95000,
+
+	.tsadc_init = tsadc_init_v2,
+	.tsadc_control = tsadc_control_v2,
+	.tsadc_get_temp = tsadc_get_temp_v3,
+	.irq_ack = tsadc_irq_ack_v2,
+	.set_alarm_temp = tsadc_alarm_temp_v2,
+	.set_tshut_temp = tsadc_tshut_temp_v2,
+	.set_tshut_mode = tsadc_tshut_mode_v2,
+
+	.table = {
+		.id = rk3288_code_table,
+		.length = ARRAY_SIZE(rk3288_code_table),
+		.data_mask = TSADCV2_DATA_MASK,
+		.mode = ADC_DECREMENT,
+	},
+};
+
+static const struct rockchip_tsadc_chip rk3308_tsadc_data = {
+	.chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
+	.chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
+	.chn_num = 2, /* 2 channels for tsadc */
+
+	.tshut_mode = TSHUT_MODE_CRU, /* default TSHUT via CRU */
+	.tshut_temp = 95000,
+
+	.tsadc_init = tsadc_init_v4,
+	.tsadc_control = tsadc_control_v3,
+	.tsadc_get_temp = tsadc_get_temp_v2,
+	.irq_ack = tsadc_irq_ack_v3,
+	.set_alarm_temp = tsadc_alarm_temp_v2,
+	.set_tshut_temp = tsadc_tshut_temp_v2,
+	.set_tshut_mode = tsadc_tshut_mode_v2,
+
+	.table = {
+		.id = rk3328_code_table,
+		.length = ARRAY_SIZE(rk3328_code_table),
+		.data_mask = TSADCV2_DATA_MASK,
+		.mode = ADC_INCREMENT,
+	},
+};
+
+static const struct rockchip_tsadc_chip px30_tsadc_data = {
+	.chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
+	.chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
+	.chn_num = 2, /* 2 channels for tsadc */
+
+	.tshut_mode = TSHUT_MODE_CRU, /* default TSHUT via CRU */
+	.tshut_temp = 95000,
+
+	.tsadc_init = tsadc_init_v4,
+	.tsadc_control = tsadc_control_v3,
+	.tsadc_get_temp = tsadc_get_temp_v2,
+	.irq_ack = tsadc_irq_ack_v3,
+	.set_alarm_temp = tsadc_alarm_temp_v2,
+	.set_tshut_temp = tsadc_tshut_temp_v2,
+	.set_tshut_mode = tsadc_tshut_mode_v2,
+
+	.table = {
+		.id = rk3328_code_table,
+		.length = ARRAY_SIZE(rk3328_code_table),
+		.data_mask = TSADCV2_DATA_MASK,
+		.mode = ADC_INCREMENT,
+	},
+};
+
+static const struct rockchip_tsadc_chip rk3328_tsadc_data = {
+	.chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
+	.chn_num = 1, /* one channels for tsadc */
+
+	.tshut_mode = TSHUT_MODE_CRU, /* default TSHUT via CRU */
+	.tshut_temp = 95000,
+
+	.tsadc_init = tsadc_init_v2,
+	.tsadc_control = tsadc_control_v3,
+	.tsadc_get_temp = tsadc_get_temp_v2,
+	.irq_ack = tsadc_irq_ack_v3,
+	.set_alarm_temp = tsadc_alarm_temp_v2,
+	.set_tshut_temp = tsadc_tshut_temp_v2,
+	.set_tshut_mode = tsadc_tshut_mode_v2,
+
+	.table = {
+		.id = rk3328_code_table,
+		.length = ARRAY_SIZE(rk3328_code_table),
+		.data_mask = TSADCV2_DATA_MASK,
+		.mode = ADC_INCREMENT,
+	},
+};
+
+static const struct rockchip_tsadc_chip rk3366_tsadc_data = {
+	.chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
+	.chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
+	.chn_num = 2, /* two channels for tsadc */
+
+	.tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
+	.tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
+	.tshut_temp = 95000,
+
+	.tsadc_init = tsadc_init_v3,
+	.tsadc_control = tsadc_control_v3,
+	.tsadc_get_temp = tsadc_get_temp_v2,
+	.irq_ack = tsadc_irq_ack_v3,
+	.set_alarm_temp = tsadc_alarm_temp_v2,
+	.set_tshut_temp = tsadc_tshut_temp_v2,
+	.set_tshut_mode = tsadc_tshut_mode_v2,
+
+	.table = {
+		.id = rk3228_code_table,
+		.length = ARRAY_SIZE(rk3228_code_table),
+		.data_mask = TSADCV3_DATA_MASK,
+		.mode = ADC_INCREMENT,
+	},
+};
+
+static const struct rockchip_tsadc_chip rk3368_tsadc_data = {
+	.chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
+	.chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
+	.chn_num = 2, /* two channels for tsadc */
+
+	.tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
+	.tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
+	.tshut_temp = 95000,
+
+	.tsadc_init = tsadc_init_v2,
+	.tsadc_control = tsadc_control_v2,
+	.tsadc_get_temp = tsadc_get_temp_v2,
+	.irq_ack = tsadc_irq_ack_v2,
+	.set_alarm_temp = tsadc_alarm_temp_v2,
+	.set_tshut_temp = tsadc_tshut_temp_v2,
+	.set_tshut_mode = tsadc_tshut_mode_v2,
+
+	.table = {
+		.id = rk3368_code_table,
+		.length = ARRAY_SIZE(rk3368_code_table),
+		.data_mask = TSADCV3_DATA_MASK,
+		.mode = ADC_INCREMENT,
+	},
+};
+
+static const struct rockchip_tsadc_chip rk3399_tsadc_data = {
+	.chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
+	.chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
+	.chn_num = 2, /* two channels for tsadc */
+
+	.tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
+	.tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
+	.tshut_temp = 95000,
+
+	.tsadc_init = tsadc_init_v3,
+	.tsadc_control = tsadc_control_v3,
+	.tsadc_get_temp = tsadc_get_temp_v2,
+	.irq_ack = tsadc_irq_ack_v3,
+	.set_alarm_temp = tsadc_alarm_temp_v2,
+	.set_tshut_temp = tsadc_tshut_temp_v2,
+	.set_tshut_mode = tsadc_tshut_mode_v2,
+
+	.table = {
+		.id = rk3399_code_table,
+		.length = ARRAY_SIZE(rk3399_code_table),
+		.data_mask = TSADCV3_DATA_MASK,
+		.mode = ADC_INCREMENT,
+	},
+};
+
+static const struct udevice_id rockchip_thermal_match[] = {
+	{
+		.compatible = "rockchip,px30-tsadc",
+		.data = (ulong)&px30_tsadc_data,
+	},
+	{
+		.compatible = "rockchip,rk1808-tsadc",
+		.data = (ulong)&rk1808_tsadc_data,
+	},
+	{
+		.compatible = "rockchip,rk3228-tsadc",
+		.data = (ulong)&rk3228_tsadc_data,
+	},
+	{
+		.compatible = "rockchip,rk3288-tsadc",
+		.data = (ulong)&rk3288_tsadc_data,
+	},
+	{
+		.compatible = "rockchip,rk3308-tsadc",
+		.data = (ulong)&rk3308_tsadc_data,
+	},
+	{
+		.compatible = "rockchip,rk3328-tsadc",
+		.data = (ulong)&rk3328_tsadc_data,
+	},
+	{
+		.compatible = "rockchip,rk3366-tsadc",
+		.data = (ulong)&rk3366_tsadc_data,
+	},
+	{
+		.compatible = "rockchip,rk3368-tsadc",
+		.data = (ulong)&rk3368_tsadc_data,
+	},
+	{
+		.compatible = "rockchip,rk3399-tsadc",
+		.data = (ulong)&rk3399_tsadc_data,
+	},
+	{ /* end */ },
+};
+
+U_BOOT_DRIVER(rockchip_thermal) = {
+	.name		= "rockchip_thermal",
+	.id		= UCLASS_THERMAL,
+	.of_match	= rockchip_thermal_match,
+	.priv_auto_alloc_size = sizeof(struct rockchip_thermal_priv),
+	.ofdata_to_platdata = rockchip_thermal_ofdata_to_platdata,
+	.ops		= &rockchip_thermal_ops,
+	.probe		= rockchip_thermal_probe,
+};

commit cb3c37fcc0b85ba79736fde8194cd9add5e18511
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Wed Sep 19 17:35:32 2018 +0800

    clk: rockchip: support clk_tsadc setting freq
    
    Change-Id: Ie5e91c95d6ff3caf618ff1a5e5e3b7dcf6723325
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index ba249ae0da..f867e4f8aa 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -665,6 +665,32 @@ static ulong px30_saradc_set_clk(struct px30_clk_priv *priv, uint hz)
 	return px30_saradc_get_clk(priv);
 }
 
+static ulong px30_tsadc_get_clk(struct px30_clk_priv *priv)
+{
+	struct px30_cru *cru = priv->cru;
+	u32 div, con;
+
+	con = readl(&cru->clksel_con[54]);
+	div = con >> CLK_SARADC_DIV_CON_SHIFT & CLK_SARADC_DIV_CON_MASK;
+
+	return DIV_TO_RATE(OSC_HZ, div);
+}
+
+static ulong px30_tsadc_set_clk(struct px30_clk_priv *priv, uint hz)
+{
+	struct px30_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz);
+	assert(src_clk_div - 1 <= 2047);
+
+	rk_clrsetreg(&cru->clksel_con[54],
+		     CLK_SARADC_DIV_CON_MASK,
+		     (src_clk_div - 1) << CLK_SARADC_DIV_CON_SHIFT);
+
+	return px30_tsadc_get_clk(priv);
+}
+
 static ulong px30_spi_get_clk(struct px30_clk_priv *priv, ulong clk_id)
 {
 	struct px30_cru *cru = priv->cru;
@@ -1063,6 +1089,9 @@ static ulong px30_clk_get_rate(struct clk *clk)
 	case SCLK_SARADC:
 		rate = px30_saradc_get_clk(priv);
 		break;
+	case SCLK_TSADC:
+		rate = px30_tsadc_get_clk(priv);
+		break;
 	case SCLK_SPI0:
 	case SCLK_SPI1:
 		rate = px30_spi_get_clk(priv, clk->id);
@@ -1131,6 +1160,9 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_SARADC:
 		ret = px30_saradc_set_clk(priv, rate);
 		break;
+	case SCLK_TSADC:
+		ret = px30_tsadc_set_clk(priv, rate);
+		break;
 	case SCLK_SPI0:
 	case SCLK_SPI1:
 		ret = px30_spi_set_clk(priv, clk->id, rate);
diff --git a/drivers/clk/rockchip/clk_rk1808.c b/drivers/clk/rockchip/clk_rk1808.c
index 77013ee8c6..ecb08a04bf 100644
--- a/drivers/clk/rockchip/clk_rk1808.c
+++ b/drivers/clk/rockchip/clk_rk1808.c
@@ -353,6 +353,32 @@ static ulong rk1808_saradc_set_clk(struct rk1808_clk_priv *priv, uint hz)
 	return rk1808_saradc_get_clk(priv);
 }
 
+static ulong rk1808_tsadc_get_clk(struct rk1808_clk_priv *priv)
+{
+	struct rk1808_cru *cru = priv->cru;
+	u32 div, con;
+
+	con = readl(&cru->clksel_con[62]);
+	div = con & CLK_SARADC_DIV_CON_MASK;
+
+	return DIV_TO_RATE(OSC_HZ, div);
+}
+
+static ulong rk1808_tsadc_set_clk(struct rk1808_clk_priv *priv, uint hz)
+{
+	struct rk1808_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz);
+	assert(src_clk_div - 1 < 2047);
+
+	rk_clrsetreg(&cru->clksel_con[62],
+		     CLK_SARADC_DIV_CON_MASK,
+		     (src_clk_div - 1) << CLK_SARADC_DIV_CON_SHIFT);
+
+	return rk1808_tsadc_get_clk(priv);
+}
+
 static ulong rk1808_spi_get_clk(struct rk1808_clk_priv *priv, ulong clk_id)
 {
 	struct rk1808_cru *cru = priv->cru;
@@ -755,6 +781,9 @@ static ulong rk1808_clk_get_rate(struct clk *clk)
 	case SCLK_SARADC:
 		rate = rk1808_saradc_get_clk(priv);
 		break;
+	case SCLK_TSADC:
+		rate = rk1808_tsadc_get_clk(priv);
+		break;
 	case SCLK_SPI0:
 	case SCLK_SPI1:
 	case SCLK_SPI2:
@@ -844,6 +873,9 @@ static ulong rk1808_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_SARADC:
 		ret = rk1808_saradc_set_clk(priv, rate);
 		break;
+	case SCLK_TSADC:
+		ret = rk1808_tsadc_set_clk(priv, rate);
+		break;
 	case SCLK_SPI0:
 	case SCLK_SPI1:
 	case SCLK_SPI2:
diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index 44ecb71958..20dd359742 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -88,6 +88,11 @@ enum {
 	PD_BUS_ACLK_DIV1_SHIFT	= 0,
 	PD_BUS_ACLK_DIV1_MASK	= 0x7 << PD_BUS_ACLK_DIV1_SHIFT,
 
+	/* CLKSEL2: tsadc */
+	CLK_TSADC_DIV_CON_SHIFT	= 0,
+	CLK_TSADC_DIV_CON_MASK		= GENMASK(5, 0),
+	CLK_TSADC_DIV_CON_WIDTH	= 6,
+
 	/*
 	 * CLKSEL10
 	 * peripheral bus pclk div:
@@ -698,6 +703,31 @@ static ulong rockchip_saradc_set_clk(struct rk3288_cru *cru, uint hz)
 	return rockchip_saradc_get_clk(cru);
 }
 
+static ulong rockchip_tsadc_get_clk(struct rk3288_cru *cru)
+{
+	u32 div, val;
+
+	val = readl(&cru->cru_clksel_con[2]);
+	div = bitfield_extract(val, CLK_TSADC_DIV_CON_SHIFT,
+			       CLK_TSADC_DIV_CON_WIDTH);
+
+	return DIV_TO_RATE(32768, div);
+}
+
+static ulong rockchip_tsadc_set_clk(struct rk3288_cru *cru, uint hz)
+{
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1;
+	assert(src_clk_div < 128);
+
+	rk_clrsetreg(&cru->cru_clksel_con[2],
+		     CLK_TSADC_DIV_CON_MASK,
+		     src_clk_div << CLK_TSADC_DIV_CON_SHIFT);
+
+	return rockchip_tsadc_get_clk(cru);
+}
+
 static ulong rk3288_clk_get_rate(struct clk *clk)
 {
 	struct rk3288_clk_priv *priv = dev_get_priv(clk->dev);
@@ -735,6 +765,9 @@ static ulong rk3288_clk_get_rate(struct clk *clk)
 	case SCLK_SARADC:
 		new_rate = rockchip_saradc_get_clk(priv->cru);
 		break;
+	case SCLK_TSADC:
+		new_rate = rockchip_tsadc_get_clk(priv->cru);
+		break;
 	default:
 		return -ENOENT;
 	}
@@ -828,6 +861,9 @@ static ulong rk3288_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_SARADC:
 		new_rate = rockchip_saradc_set_clk(priv->cru, rate);
 		break;
+	case SCLK_TSADC:
+		new_rate = rockchip_tsadc_set_clk(priv->cru, rate);
+		break;
 	case PLL_GPLL:
 	case PLL_CPLL:
 	case PLL_NPLL:
diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index 73b774dfed..cfeff9e267 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -307,6 +307,34 @@ static ulong rk3308_saradc_set_clk(struct clk *clk, uint hz)
 	return rk3308_saradc_get_clk(clk);
 }
 
+static ulong rk3308_tsadc_get_clk(struct clk *clk)
+{
+	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3308_cru *cru = priv->cru;
+	u32 div, con;
+
+	con = readl(&cru->clksel_con[33]);
+	div = con >> CLK_SARADC_DIV_CON_SHIFT & CLK_SARADC_DIV_CON_MASK;
+
+	return DIV_TO_RATE(OSC_HZ, div);
+}
+
+static ulong rk3308_tsadc_set_clk(struct clk *clk, uint hz)
+{
+	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3308_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz);
+	assert(src_clk_div - 1 <= 2047);
+
+	rk_clrsetreg(&cru->clksel_con[33],
+		     CLK_SARADC_DIV_CON_MASK,
+		     (src_clk_div - 1) << CLK_SARADC_DIV_CON_SHIFT);
+
+	return rk3308_tsadc_get_clk(clk);
+}
+
 static ulong rk3308_spi_get_clk(struct clk *clk)
 {
 	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
@@ -708,6 +736,9 @@ static ulong rk3308_clk_get_rate(struct clk *clk)
 	case SCLK_SARADC:
 		rate = rk3308_saradc_get_clk(clk);
 		break;
+	case SCLK_TSADC:
+		rate = rk3308_tsadc_get_clk(clk);
+		break;
 	case SCLK_SPI0:
 	case SCLK_SPI1:
 		rate = rk3308_spi_get_clk(clk);
@@ -773,6 +804,9 @@ static ulong rk3308_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_SARADC:
 		ret = rk3308_saradc_set_clk(clk, rate);
 		break;
+	case SCLK_TSADC:
+		ret = rk3308_tsadc_set_clk(clk, rate);
+		break;
 	case SCLK_SPI0:
 	case SCLK_SPI1:
 		ret = rk3308_spi_set_clk(clk, rate);
diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c
index 15711ba844..8c27f99b43 100644
--- a/drivers/clk/rockchip/clk_rk3328.c
+++ b/drivers/clk/rockchip/clk_rk3328.c
@@ -399,6 +399,33 @@ static ulong rk3328_saradc_set_clk(struct rk3328_clk_priv *priv, uint hz)
 	return rk3328_saradc_get_clk(priv);
 }
 
+static ulong rk3328_tsadc_get_clk(struct rk3328_clk_priv *priv)
+{
+	struct rk3328_cru *cru = priv->cru;
+	u32 div, val;
+
+	val = readl(&cru->clksel_con[22]);
+	div = bitfield_extract(val, CLK_SARADC_DIV_CON_SHIFT,
+			       CLK_SARADC_DIV_CON_WIDTH);
+
+	return DIV_TO_RATE(OSC_HZ, div);
+}
+
+static ulong rk3328_tsadc_set_clk(struct rk3328_clk_priv *priv, uint hz)
+{
+	struct rk3328_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1;
+	assert(src_clk_div < 128);
+
+	rk_clrsetreg(&cru->clksel_con[22],
+		     CLK_SARADC_DIV_CON_MASK,
+		     src_clk_div << CLK_SARADC_DIV_CON_SHIFT);
+
+	return rk3328_tsadc_get_clk(priv);
+}
+
 static ulong rk3328_vop_get_clk(struct rk3328_clk_priv *priv, ulong clk_id)
 {
 	struct rk3328_cru *cru = priv->cru;
@@ -696,6 +723,9 @@ static ulong rk3328_clk_get_rate(struct clk *clk)
 	case SCLK_SARADC:
 		rate = rk3328_saradc_get_clk(priv);
 		break;
+	case SCLK_TSADC:
+		rate = rk3328_tsadc_get_clk(priv);
+		break;
 	case ACLK_VOP_PRE:
 	case ACLK_VIO_PRE:
 	case HCLK_VIO_PRE:
@@ -769,6 +799,9 @@ static ulong rk3328_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_SARADC:
 		ret = rk3328_saradc_set_clk(priv, rate);
 		break;
+	case SCLK_TSADC:
+		ret = rk3328_tsadc_set_clk(priv, rate);
+		break;
 	case DCLK_LCDC:
 	case ACLK_VOP_PRE:
 	case ACLK_VIO_PRE:
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index e6ba48fae3..cd2a85b6e2 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -922,6 +922,32 @@ static ulong rk3399_saradc_set_clk(struct rk3399_cru *cru, uint hz)
 	return rk3399_saradc_get_clk(cru);
 }
 
+static ulong rk3399_tsadc_get_clk(struct rk3399_cru *cru)
+{
+	u32 div, val;
+
+	val = readl(&cru->clksel_con[27]);
+	div = bitfield_extract(val, CLK_TSADC_SEL_SHIFT,
+			       10);
+
+	return DIV_TO_RATE(OSC_HZ, div);
+}
+
+static ulong rk3399_tsadc_set_clk(struct rk3399_cru *cru, uint hz)
+{
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1;
+	assert(src_clk_div <= 255);
+
+	rk_clrsetreg(&cru->clksel_con[27],
+		     CLK_TSADC_DIV_CON_MASK | CLK_TSADC_SEL_MASK,
+		     (CLK_TSADC_SEL_X24M << CLK_TSADC_SEL_SHIFT) |
+		     (src_clk_div << CLK_TSADC_DIV_CON_SHIFT));
+
+	return rk3399_tsadc_get_clk(cru);
+}
+
 static ulong rk3399_clk_get_rate(struct clk *clk)
 {
 	struct rk3399_clk_priv *priv = dev_get_priv(clk->dev);
@@ -969,6 +995,9 @@ static ulong rk3399_clk_get_rate(struct clk *clk)
 	case SCLK_SARADC:
 		rate = rk3399_saradc_get_clk(priv->cru);
 		break;
+	case SCLK_TSADC:
+		rate = rk3399_tsadc_get_clk(priv->cru);
+		break;
 	default:
 		return -ENOENT;
 	}
@@ -1037,6 +1066,9 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_SARADC:
 		ret = rk3399_saradc_set_clk(priv->cru, rate);
 		break;
+	case SCLK_TSADC:
+		ret = rk3399_tsadc_set_clk(priv->cru, rate);
+		break;
 	default:
 		return -ENOENT;
 	}

commit cab28f403dae8ca7690a93e8ff7433749b79e91f
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Sep 27 15:39:45 2018 +0800

    tool: rkcommon: add support for px30
    
    PX30 have 10K sram available.
    
    Change-Id: I67c565c84d00bc0141d79c437035993746ea9245
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index cc16ec0b36..8f184c1301 100644
--- a/tools/rkcommon.c
+++ b/tools/rkcommon.c
@@ -77,6 +77,7 @@ static struct spl_info spl_infos[] = {
 	{ "rk3328", "RK32", 0x8000 - 0x1000, false },
 	{ "rk3368", "RK33", 0x8000 - 0x1000, false },
 	{ "rk3399", "RK33", 0x30000 - 0x2000, false },
+	{ "px30", "RK33", 0x2800, false },
 	{ "rv1108", "RK11", 0x1800, false },
 };
 

commit f588f59eac0afdfa1a2245ae1a95d4cfec9d943f
Author: YouMin Chen <cym@rock-chips.com>
Date:   Wed Sep 26 21:22:32 2018 +0800

    driver: ram: rockhip: px30: fix lpddr2 bug
    
    set lpddr2 detect max row = 15 to match lpddr2 inc file
    
    Change-Id: I8fd57984331d35bafaf263829760204c582d120d
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram_px30.c b/drivers/ram/rockchip/sdram_px30.c
index 940558092b..35149d046e 100644
--- a/drivers/ram/rockchip/sdram_px30.c
+++ b/drivers/ram/rockchip/sdram_px30.c
@@ -920,7 +920,10 @@ static u64 dram_detect_cap(struct dram_info *dram,
 		/* detect col and bk for ddr3/lpddr3 */
 		coltmp = 12;
 		bktmp = 3;
-		rowtmp = 16;
+		if (dram_type == LPDDR2)
+			rowtmp = 15;
+		else
+			rowtmp = 16;
 
 		for (col = coltmp; col >= 9; col -= 1) {
 			writel(0, CONFIG_SYS_SDRAM_BASE);

commit ca0ddd934d52302d42dda29cd6145caec7df6c6c
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 26 11:54:53 2018 +0800

    rockchip: bootrom: update support for back to brom via boot_mode reg
    
    We should clear that the purpose is enter maskrom and get into USB boot:
    1. set the bootmode reg to bootrom mode in U-Boot/Kernel by cmd or Tool;
    2. Get back to bootrom with non-zero return value if not boot from USB;
    3. Clean the tag if already enter USB boot.
    
    Change-Id: I1127357c3b2f499519387880830b2b382f46af10
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/bootrom.c b/arch/arm/mach-rockchip/bootrom.c
index bef2a90d1f..f248869c00 100644
--- a/arch/arm/mach-rockchip/bootrom.c
+++ b/arch/arm/mach-rockchip/bootrom.c
@@ -31,28 +31,31 @@ void back_to_bootrom(enum rockchip_bootrom_cmd brom_cmd)
 }
 
 /*
- * we back to bootrom download mode if get a
+ * We back to bootrom download mode if get a
  * BOOT_BROM_DOWNLOAD flag in boot mode register
  *
- * note: the boot mode register is configured by
- * application(next stage bootloader, kernel, etc),
- * and the bootrom never check this register, so we need
+ * The bootrom never check this register, so we need
  * to check it and back to bootrom at very early bootstage(before
  * some basic configurations(such as interrupts) been
  * changed by TPL/SPL, as the bootrom download operation
  * relys on many default settings(such as interrupts) by
  * it's self.
+ * Note: the boot mode register is configured by
+ * application(next stage bootloader, kernel, etc) via command or PC Tool,
+ * cleared by USB download(bootrom mode) or loader(other mode) after the
+ * tag has work.
  */
 static bool check_back_to_brom_dnl_flag(void)
 {
-	u32 boot_mode;
+	u32 boot_mode, boot_id;
 
-	if (CONFIG_ROCKCHIP_BOOT_MODE_REG) {
+	if (CONFIG_ROCKCHIP_BOOT_MODE_REG && BROM_BOOTSOURCE_ID_ADDR) {
 		boot_mode = readl(CONFIG_ROCKCHIP_BOOT_MODE_REG);
-		if (boot_mode == BOOT_BROM_DOWNLOAD) {
+		boot_id = readl(BROM_BOOTSOURCE_ID_ADDR);
+		if (boot_id == BROM_BOOTSOURCE_USB)
 			writel(0, CONFIG_ROCKCHIP_BOOT_MODE_REG);
+		else if (boot_mode == BOOT_BROM_DOWNLOAD)
 			return true;
-		}
 	}
 
 	return false;

commit 2daa9732c06dc558a7df67f08d9c4f915ab6d8bb
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 26 11:53:52 2018 +0800

    rockchip: move BROM_BOOTSOURCE_ID_ADDR to bootrom.h
    
    The macro BROM_BOOTSOURCE_ID_ADDR does not belong to sdram_common.h
    
    Change-Id: I0490ff10b08287d71e3231baa999d3f096068c7c
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/bootrom.h b/arch/arm/include/asm/arch-rockchip/bootrom.h
index 78f9da6a64..15bf7a94c9 100644
--- a/arch/arm/include/asm/arch-rockchip/bootrom.h
+++ b/arch/arm/include/asm/arch-rockchip/bootrom.h
@@ -58,6 +58,7 @@ extern const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1];
 /**
  * Locations of the boot-device identifier in SRAM
  */
-#define RK3399_BROM_BOOTSOURCE_ID_ADDR   0xff8c0010
+#define BROM_BOOTSOURCE_ID_ADDR (CONFIG_ROCKCHIP_IRAM_START_ADDR + 0x10)
+
 
 #endif
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h b/arch/arm/include/asm/arch-rockchip/sdram_common.h
index d250759c11..33c8192f8e 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_common.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_common.h
@@ -78,8 +78,6 @@ enum {
 #define SYS_REG1_CS1_COL_SHIFT(ch)		(0 + (ch) * 2)
 #define SYS_REG1_CS1_COL_MASK			3
 
-#define BROM_BOOTSOURCE_ID_ADDR (CONFIG_ROCKCHIP_IRAM_START_ADDR + 0x10)
-
 /* Get sdram size decode from reg */
 size_t rockchip_sdram_size(phys_addr_t reg);
 

commit cf41a383b33a575d0b871a03a700bc6bea85a603
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Wed Sep 19 20:50:26 2018 +0800

    rockchip: ram: using common code for rk chip dmc probe
    
    Include rk1808, rk3036, rk3308 and rk3326/px30 use this common
    rockchip_sdram.c
    
    Change-Id: Iee3e100992b07027c05f132fa536504ecc02f11f
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index dffed38f8a..9b12db19d4 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -6,13 +6,14 @@
 
 obj-$(CONFIG_ROCKCHIP_RK3368) = dmc-rk3368.o
 obj-$(CONFIG_ROCKCHIP_RV1108) = sdram_rv1108_pctl_phy.o sdram_rv1108.o
-obj-$(CONFIG_ROCKCHIP_RK1808) = sdram_rk1808.o
-obj-$(CONFIG_ROCKCHIP_RK3036) = sdram_rk3036.o
 obj-$(CONFIG_ROCKCHIP_RK3128) = sdram_rk3128.o
 obj-$(CONFIG_ROCKCHIP_RK3188) = sdram_rk3188.o
 obj-$(CONFIG_ROCKCHIP_RK322X) = sdram_rk322x.o
 obj-$(CONFIG_ROCKCHIP_RK3288) = sdram_rk3288.o
-obj-$(CONFIG_ROCKCHIP_RK3308) = sdram_rk3308.o
 obj-$(CONFIG_ROCKCHIP_RK3328) = sdram_rk3328.o
 obj-$(CONFIG_ROCKCHIP_RK3399) = sdram_rk3399.o
 obj-$(CONFIG_ROCKCHIP_PX30) = sdram_px30.o
+obj-$(CONFIG_ROCKCHIP_PX30) += rockchip_sdram.o
+obj-$(CONFIG_ROCKCHIP_RK1808) = rockchip_sdram.o
+obj-$(CONFIG_ROCKCHIP_RK3036) = rockchip_sdram.o
+obj-$(CONFIG_ROCKCHIP_RK3308) = rockchip_sdram.o
diff --git a/drivers/ram/rockchip/rockchip_sdram.c b/drivers/ram/rockchip/rockchip_sdram.c
new file mode 100644
index 0000000000..aa65623108
--- /dev/null
+++ b/drivers/ram/rockchip/rockchip_sdram.c
@@ -0,0 +1,91 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd.
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <ram.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/grf_px30.h>
+#include <asm/arch/grf_rk1808.h>
+#include <asm/arch/grf_rk3036.h>
+#include <asm/arch/grf_rk3308.h>
+#include <asm/arch/sdram_common.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifndef CONFIG_TPL_BUILD
+struct dram_info {
+	struct ram_info info;
+};
+
+static int dmc_probe(struct udevice *dev)
+{
+	struct dram_info *priv = dev_get_priv(dev);
+
+#if defined(CONFIG_ROCKCHIP_RK3036)
+	struct rk3036_grf *grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
+	priv->info.size = rockchip_sdram_size((phys_addr_t)&grf->os_reg[1]);
+#elif defined(CONFIG_ROCKCHIP_RK3308)
+	struct rk3308_grf *grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
+	priv->info.size = rockchip_sdram_size((phys_addr_t)&grf->os_reg2);
+#elif defined(CONFIG_ROCKCHIP_PX30)
+	struct px30_pmugrf *pmugrf =
+		syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
+
+	priv->info.size =
+		rockchip_sdram_size((phys_addr_t)&pmugrf->os_reg[2]);
+#elif defined(CONFIG_ROCKCHIP_RK1808)
+	struct rk1808_pmugrf *pmugrf =
+		syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
+
+	priv->info.size =
+		rockchip_sdram_size((phys_addr_t)&pmugrf->os_reg[2]);
+#else
+#error chip error
+#endif
+
+	priv->info.base = CONFIG_SYS_SDRAM_BASE;
+
+	return 0;
+}
+
+static int dmc_get_info(struct udevice *dev, struct ram_info *info)
+{
+	struct dram_info *priv = dev_get_priv(dev);
+
+	*info = priv->info;
+
+	return 0;
+}
+
+static struct ram_ops dmc_ops = {
+	.get_info = dmc_get_info,
+};
+
+static const struct udevice_id dmc_ids[] = {
+#if defined(CONFIG_ROCKCHIP_RK3036)
+	{ .compatible = "rockchip,rk3036-dmc" },
+#elif defined(CONFIG_ROCKCHIP_RK3308)
+	{ .compatible = "rockchip,rk3308-dmc" },
+#elif defined(CONFIG_ROCKCHIP_PX30)
+	{ .compatible = "rockchip,px30-dmc" },
+#elif defined(CONFIG_ROCKCHIP_RK1808)
+	{ .compatible = "rockchip,rk1808-dmc" },
+#endif
+	{ }
+};
+
+U_BOOT_DRIVER(dmc_tiny) = {
+	.name = "rockchip_dmc",
+	.id = UCLASS_RAM,
+	.of_match = dmc_ids,
+	.ops = &dmc_ops,
+	.probe = dmc_probe,
+	.priv_auto_alloc_size = sizeof(struct dram_info),
+};
+#endif
diff --git a/drivers/ram/rockchip/sdram_px30.c b/drivers/ram/rockchip/sdram_px30.c
index 03622e67c6..940558092b 100644
--- a/drivers/ram/rockchip/sdram_px30.c
+++ b/drivers/ram/rockchip/sdram_px30.c
@@ -26,21 +26,20 @@
 #endif
 #endif
 
+#ifdef CONFIG_TPL_BUILD
+
 DECLARE_GLOBAL_DATA_PTR;
 struct dram_info {
-#ifdef CONFIG_TPL_BUILD
 	struct px30_ddr_pctl_regs *pctl;
 	struct px30_ddr_phy_regs *phy;
 	struct px30_cru *cru;
 	struct px30_msch_regs *msch;
 	struct px30_ddr_grf_regs *ddr_grf;
 	struct px30_grf *grf;
-#endif
 	struct ram_info info;
 	struct px30_pmugrf *pmugrf;
 };
 
-#ifdef CONFIG_TPL_BUILD
 #define PMUGRF_BASE_ADDR		0xFF010000
 #define CRU_BASE_ADDR			0xFF2B0000
 #define GRF_BASE_ADDR			0xFF140000
@@ -1229,46 +1228,4 @@ int sdram_init(void)
 error:
 	return (-1);
 }
-
-#else /* CONFIG_TPL_BUILD */
-
-static int px30_dmc_probe(struct udevice *dev)
-{
-	struct dram_info *priv = dev_get_priv(dev);
-
-	priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
-	debug("%s: pmugrf=%p\n", __func__, priv->pmugrf);
-	priv->info.base = CONFIG_SYS_SDRAM_BASE;
-	priv->info.size =
-		rockchip_sdram_size((phys_addr_t)&priv->pmugrf->os_reg[2]);
-
-	return 0;
-}
-
-static int px30_dmc_get_info(struct udevice *dev, struct ram_info *info)
-{
-	struct dram_info *priv = dev_get_priv(dev);
-
-	*info = priv->info;
-
-	return 0;
-}
-
-static struct ram_ops px30_dmc_ops = {
-	.get_info = px30_dmc_get_info,
-};
-
-static const struct udevice_id px30_dmc_ids[] = {
-	{ .compatible = "rockchip,px30-dmc" },
-	{ }
-};
-
-U_BOOT_DRIVER(dmc_px30) = {
-	.name = "rockchip_px30_dmc",
-	.id = UCLASS_RAM,
-	.of_match = px30_dmc_ids,
-	.ops = &px30_dmc_ops,
-	.probe = px30_dmc_probe,
-	.priv_auto_alloc_size = sizeof(struct dram_info),
-};
 #endif /* CONFIG_TPL_BUILD */
diff --git a/drivers/ram/rockchip/sdram_rk1808.c b/drivers/ram/rockchip/sdram_rk1808.c
deleted file mode 100644
index 681a2901d4..0000000000
--- a/drivers/ram/rockchip/sdram_rk1808.c
+++ /dev/null
@@ -1,59 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * (C) Copyright 2018 Rockchip Electronics Co., Ltd.
- */
-
-#include <common.h>
-#include <dm.h>
-#include <ram.h>
-#include <syscon.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/grf_rk1808.h>
-#include <asm/arch/sdram_common.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-struct dram_info {
-	struct ram_info info;
-	struct rk1808_pmugrf *pmugrf;
-};
-
-static int rk1808_dmc_probe(struct udevice *dev)
-{
-	struct dram_info *priv = dev_get_priv(dev);
-
-	priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
-	debug("%s: pmugrf=%p\n", __func__, priv->pmugrf);
-	priv->info.base = CONFIG_SYS_SDRAM_BASE;
-	priv->info.size =
-		rockchip_sdram_size((phys_addr_t)&priv->pmugrf->os_reg[2]);
-
-	return 0;
-}
-
-static int rk1808_dmc_get_info(struct udevice *dev, struct ram_info *info)
-{
-	struct dram_info *priv = dev_get_priv(dev);
-
-	*info = priv->info;
-
-	return 0;
-}
-
-static struct ram_ops rk1808_dmc_ops = {
-	.get_info = rk1808_dmc_get_info,
-};
-
-static const struct udevice_id rk1808_dmc_ids[] = {
-	{ .compatible = "rockchip,rk1808-dmc" },
-	{ }
-};
-
-U_BOOT_DRIVER(dmc_rk1808) = {
-	.name = "rockchip_rk1808_dmc",
-	.id = UCLASS_RAM,
-	.of_match = rk1808_dmc_ids,
-	.ops = &rk1808_dmc_ops,
-	.probe = rk1808_dmc_probe,
-	.priv_auto_alloc_size = sizeof(struct dram_info),
-};
diff --git a/drivers/ram/rockchip/sdram_rk3036.c b/drivers/ram/rockchip/sdram_rk3036.c
deleted file mode 100644
index 44c6a1c949..0000000000
--- a/drivers/ram/rockchip/sdram_rk3036.c
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
- *
- * SPDX-License-Identifier:     GPL-2.0
- */
-
-#include <common.h>
-#include <dm.h>
-#include <ram.h>
-#include <syscon.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/grf_rk3036.h>
-#include <asm/arch/sdram_common.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-struct dram_info {
-	struct ram_info info;
-	struct rk3036_grf *grf;
-};
-
-static int rk3036_dmc_probe(struct udevice *dev)
-{
-	struct dram_info *priv = dev_get_priv(dev);
-
-	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	debug("%s: grf=%p\n", __func__, priv->grf);
-	priv->info.base = CONFIG_SYS_SDRAM_BASE;
-	priv->info.size = rockchip_sdram_size(
-				(phys_addr_t)&priv->grf->os_reg[1]);
-
-	return 0;
-}
-
-static int rk3036_dmc_get_info(struct udevice *dev, struct ram_info *info)
-{
-	struct dram_info *priv = dev_get_priv(dev);
-
-	*info = priv->info;
-
-	return 0;
-}
-
-static struct ram_ops rk3036_dmc_ops = {
-	.get_info = rk3036_dmc_get_info,
-};
-
-static const struct udevice_id rk3036_dmc_ids[] = {
-	{ .compatible = "rockchip,rk3036-dmc" },
-	{ }
-};
-
-U_BOOT_DRIVER(dmc_rk3036) = {
-	.name = "rockchip_rk3036_dmc",
-	.id = UCLASS_RAM,
-	.of_match = rk3036_dmc_ids,
-	.ops = &rk3036_dmc_ops,
-	.probe = rk3036_dmc_probe,
-	.priv_auto_alloc_size = sizeof(struct dram_info),
-};
diff --git a/drivers/ram/rockchip/sdram_rk3308.c b/drivers/ram/rockchip/sdram_rk3308.c
deleted file mode 100644
index 03a52535b7..0000000000
--- a/drivers/ram/rockchip/sdram_rk3308.c
+++ /dev/null
@@ -1,58 +0,0 @@
-/*
- * (C) Copyright 2018 Rockchip Electronics Co., Ltd.
- *
- * SPDX-License-Identifier:     GPL-2.0
- */
-
-#include <common.h>
-#include <dm.h>
-#include <ram.h>
-#include <syscon.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/grf_rk3308.h>
-#include <asm/arch/sdram_common.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-struct dram_info {
-	struct ram_info info;
-};
-
-static int rk3308_dmc_probe(struct udevice *dev)
-{
-	struct dram_info *priv = dev_get_priv(dev);
-	struct rk3308_grf *grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-
-	priv->info.base = CONFIG_SYS_SDRAM_BASE;
-	priv->info.size = rockchip_sdram_size((phys_addr_t)&grf->os_reg2);
-
-	return 0;
-}
-
-static int rk3308_dmc_get_info(struct udevice *dev, struct ram_info *info)
-{
-	struct dram_info *priv = dev_get_priv(dev);
-
-	*info = priv->info;
-
-	return 0;
-}
-
-static struct ram_ops rk3308_dmc_ops = {
-	.get_info = rk3308_dmc_get_info,
-};
-
-
-static const struct udevice_id rk3308_dmc_ids[] = {
-	{ .compatible = "rockchip,rk3308-dmc" },
-	{ }
-};
-
-U_BOOT_DRIVER(dmc_rk3308) = {
-	.name = "rockchip_rk3308_dmc",
-	.id = UCLASS_RAM,
-	.of_match = rk3308_dmc_ids,
-	.ops = &rk3308_dmc_ops,
-	.probe = rk3308_dmc_probe,
-	.priv_auto_alloc_size = sizeof(struct dram_info),
-};

commit b615ccb0844f46ace55769875ee3ab1bceda90c9
Author: Sugar Zhang <sugar.zhang@rock-chips.com>
Date:   Fri Sep 21 18:27:11 2018 +0800

    configs: px30: enable rk809/rk817 sound support
    
    Change-Id: I4deae9b8e5a101c7b37e18d998e800da405726c0
    Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index bf13cd167e..b7a0aab7d1 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -77,6 +77,10 @@ CONFIG_DEBUG_UART_BASE=0xFF160000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_SOUND=y
+CONFIG_I2S_ROCKCHIP=y
+CONFIG_SOUND_RK817=y
+CONFIG_SOUND_ROCKCHIP=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y

commit 75958dd45d3be2e76bdd7e3ce6c761c2b527491f
Author: Sugar Zhang <sugar.zhang@rock-chips.com>
Date:   Fri Sep 21 18:24:51 2018 +0800

    configs: px30: update by make savedefconfig
    
    Change-Id: I44d3afebe124096676af6cb448d4ea45406dd6c4
    Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index f9945a3cee..bf13cd167e 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -6,10 +6,11 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_PX30=y
 CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
-CONFIG_SPL_STACK_R_ADDR=0x600000
 CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_TARGET_EVB_PX30=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
 CONFIG_DEFAULT_DEVICE_TREE="px30-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
@@ -19,10 +20,10 @@ CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
-CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
@@ -36,6 +37,7 @@ CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_NET is not set
 CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
@@ -47,7 +49,6 @@ CONFIG_SPL_SYSCON=y
 CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
-# CONFIG_CMD_NET is not set
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y
 CONFIG_RK8XX_PWRKEY=y
@@ -75,7 +76,6 @@ CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF160000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
@@ -92,13 +92,10 @@ CONFIG_G_DNL_VENDOR_NUM=0x2207
 CONFIG_G_DNL_PRODUCT_NUM=0x330d
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
-CONFIG_DISPLAY_ROCKCHIP_MIPI=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
-CONFIG_DRM_ROCKCHIP_PANEL=y
-CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y

commit 5b9c2cccdfdeb81adbd95163ea6c431777c0fe5c
Author: Sugar Zhang <sugar.zhang@rock-chips.com>
Date:   Fri Sep 21 17:15:29 2018 +0800

    sound: rockchip: add driver support for simple card
    
    This patch adds driver support for rockchip simple card.
    
    Change-Id: If6b0e2c8d5bbe5dff268d2b5abbdce5f3528282b
    Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>

diff --git a/drivers/sound/Kconfig b/drivers/sound/Kconfig
index dbb43509f2..9f31d8d3c1 100644
--- a/drivers/sound/Kconfig
+++ b/drivers/sound/Kconfig
@@ -56,6 +56,12 @@ config SOUND_RK817
 	  Enable the rk809/rk817 audio codec. This is connected via I2S for
 	  audio data and I2C for codec control.
 
+config SOUND_ROCKCHIP
+	bool "Support Rockchip Simple Sound Card"
+	depends on I2S_ROCKCHIP
+	help
+	  Enable the Rockchip Simple Sound Card.
+
 config SOUND_SANDBOX
 	bool "Support sandbox emulated audio codec"
 	depends on SANDBOX && SOUND
diff --git a/drivers/sound/Makefile b/drivers/sound/Makefile
index acb0238a5e..f07887fd5d 100644
--- a/drivers/sound/Makefile
+++ b/drivers/sound/Makefile
@@ -13,3 +13,4 @@ obj-$(CONFIG_SOUND_SANDBOX)	+= sandbox.o
 obj-$(CONFIG_SOUND_WM8994)	+= wm8994.o
 obj-$(CONFIG_SOUND_MAX98095)	+= max98095.o
 obj-$(CONFIG_SOUND_RK817)	+= rk817_codec.o
+obj-$(CONFIG_SOUND_ROCKCHIP)	+= rockchip-sound.o
diff --git a/drivers/sound/rockchip-sound.c b/drivers/sound/rockchip-sound.c
new file mode 100644
index 0000000000..cf58725907
--- /dev/null
+++ b/drivers/sound/rockchip-sound.c
@@ -0,0 +1,128 @@
+// SPDX-License-Identifier:     GPL-2.0+
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ */
+
+#include <dm.h>
+#include <malloc.h>
+#include <common.h>
+#include <asm/io.h>
+#include <libfdt.h>
+#include <fdtdec.h>
+#include <i2s.h>
+#include <sound.h>
+#include <asm/arch-rockchip/resource_img.h>
+
+#define WAV_SIZE		(5 * 1024 * 1024) /* BYTE */
+#define SAMPLERATE		44100
+
+static struct udevice *i2s_dev, *codec_dev;
+
+static int load_audio_wav(void *buf, const char *wav_name, int size)
+{
+	int ret = 0;
+#ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
+	ret = rockchip_read_resource_file(buf, wav_name, 0, size);
+#endif
+
+	return ret;
+}
+
+static int sound_hw_params(struct udevice *dev, unsigned int samplerate,
+			   unsigned int fmt, unsigned int channels)
+{
+	const struct snd_soc_dai_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->hw_params)
+		return -ENOTSUPP;
+
+	return ops->hw_params(dev, samplerate, fmt, channels);
+}
+
+static int sound_startup(struct udevice *dev)
+{
+	const struct snd_soc_dai_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->startup)
+		return -ENOTSUPP;
+
+	return ops->startup(dev);
+}
+
+static int sound_set_sysclk(struct udevice *dev, unsigned int freq)
+{
+	const struct snd_soc_dai_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->set_sysclk)
+		return -ENOTSUPP;
+
+	return ops->set_sysclk(dev, freq);
+}
+
+int sound_init(const void *blob)
+{
+	int ret;
+
+	ret = uclass_get_device(UCLASS_I2S, 0, &i2s_dev);
+	if (ret) {
+		if (ret != -ENODEV) {
+			printf("Get i2s device failed: %d\n", ret);
+			return ret;
+		}
+		return 0;
+	}
+
+	ret = uclass_get_device(UCLASS_CODEC, 0, &codec_dev);
+	if (ret) {
+		if (ret != -ENODEV) {
+			printf("Get codec device failed: %d\n", ret);
+			return ret;
+		}
+		return 0;
+	}
+
+	sound_set_sysclk(i2s_dev, SAMPLERATE * 256);
+	sound_hw_params(i2s_dev, SAMPLERATE, 16, 2);
+	sound_hw_params(codec_dev, SAMPLERATE, 16, 2);
+	sound_startup(i2s_dev);
+	sound_startup(codec_dev);
+
+	return ret;
+}
+
+static int _sound_play(struct udevice *dev, unsigned int *data,
+		       unsigned long data_size)
+{
+	const struct snd_soc_dai_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->transfer)
+		return -ENOTSUPP;
+
+	return ops->transfer(dev, data, data_size);
+}
+
+int sound_play(u32 msec, u32 frequency)
+{
+	unsigned int *buf;
+	unsigned long buf_size;
+	unsigned int ret = 0;
+
+	buf_size = WAV_SIZE;
+
+	buf = malloc(buf_size);
+	if (!buf) {
+		debug("%s: buf malloc failed\n", __func__);
+		return -ENOMEM;
+	}
+	ret = load_audio_wav(buf, "boot.wav", buf_size);
+	/* if boot.wav not find, use sound_create_square_wave */
+	if (ret <= 0)
+		sound_create_square_wave((unsigned short *)buf,
+					 buf_size / sizeof(unsigned short),
+					 frequency);
+
+	ret = _sound_play(i2s_dev, buf, (buf_size / sizeof(int)));
+	free(buf);
+
+	return ret;
+}

commit 4afb7f9c57158713fb4381cb9584975983abac3b
Author: Sugar Zhang <sugar.zhang@rock-chips.com>
Date:   Fri Sep 21 17:01:05 2018 +0800

    sound: rockchip: add driver support for rk809/rk817
    
    This patch adds driver support for rockchip rk809/rk817.
    
    Change-Id: I0e8355fa6dffb23d8413c0b3a198757aa2d2360c
    Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>

diff --git a/drivers/sound/Kconfig b/drivers/sound/Kconfig
index ec75f5220a..dbb43509f2 100644
--- a/drivers/sound/Kconfig
+++ b/drivers/sound/Kconfig
@@ -49,6 +49,13 @@ config SOUND_MAX98095
 	  audio data and I2C for codec control. At present it only works
 	  with the Samsung I2S driver.
 
+config SOUND_RK817
+	bool "Support Rockchip rk809/rk817 audio codec"
+	depends on I2S_ROCKCHIP && PMIC_RK8XX
+	help
+	  Enable the rk809/rk817 audio codec. This is connected via I2S for
+	  audio data and I2C for codec control.
+
 config SOUND_SANDBOX
 	bool "Support sandbox emulated audio codec"
 	depends on SANDBOX && SOUND
diff --git a/drivers/sound/Makefile b/drivers/sound/Makefile
index 21dfcae3a3..acb0238a5e 100644
--- a/drivers/sound/Makefile
+++ b/drivers/sound/Makefile
@@ -12,3 +12,4 @@ obj-$(CONFIG_I2S_SAMSUNG)	+= samsung-i2s.o
 obj-$(CONFIG_SOUND_SANDBOX)	+= sandbox.o
 obj-$(CONFIG_SOUND_WM8994)	+= wm8994.o
 obj-$(CONFIG_SOUND_MAX98095)	+= max98095.o
+obj-$(CONFIG_SOUND_RK817)	+= rk817_codec.o
diff --git a/drivers/sound/rk817_codec.c b/drivers/sound/rk817_codec.c
new file mode 100644
index 0000000000..b753d7e828
--- /dev/null
+++ b/drivers/sound/rk817_codec.c
@@ -0,0 +1,368 @@
+// SPDX-License-Identifier:     GPL-2.0+
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <power/pmic.h>
+#include <power/rk8xx_pmic.h>
+#include <sound.h>
+#include "rk817_codec.h"
+
+#define DBG(format, ...) \
+		printf("RK817: " format, ## __VA_ARGS__)
+
+/* For route */
+#define RK817_CODEC_PLAYBACK	1
+#define RK817_CODEC_CAPTURE	2
+#define RK817_CODEC_INCALL	4
+#define RK817_CODEC_ALL	(RK817_CODEC_PLAYBACK |\
+	RK817_CODEC_CAPTURE | RK817_CODEC_INCALL)
+
+/*
+ * DDAC L/R volume setting
+ * 0db~-95db,0.375db/step,for example:
+ * 0: 0dB
+ * 0x0a: -3.75dB
+ * 0x7d: -46dB
+ * 0xff: -95dB
+ */
+#define OUT_VOLUME	(0x03)
+
+#define CODEC_SET_SPK 1
+#define CODEC_SET_HP 2
+#define INITIAL_VOLUME	3
+
+struct rk817_codec_priv {
+	struct udevice *dev;
+	struct rk8xx_priv *rk817;
+	unsigned int stereo_sysclk;
+	unsigned int rate;
+	unsigned int spk_volume;
+	unsigned int hp_volume;
+	bool use_ext_amplifier;
+	long int playback_path;
+	int spk_mute_delay;
+	int hp_mute_delay;
+};
+
+static int snd_soc_write(struct udevice *dev, unsigned int reg,
+			 unsigned int val)
+{
+	return pmic_reg_write(dev, reg, val);
+}
+
+static int snd_soc_update_bits(struct udevice *dev, unsigned int reg,
+			       unsigned int mask, unsigned int value)
+{
+	return pmic_clrsetbits(dev, reg, mask, value);
+}
+
+static int rk817_reset(struct rk817_codec_priv *priv)
+{
+	struct udevice *codec = priv->dev->parent;
+
+	snd_soc_write(codec, RK817_CODEC_DTOP_LPT_SRST, 0x40);
+	snd_soc_write(codec, RK817_CODEC_DDAC_POPD_DACST, 0x02);
+
+	return 0;
+}
+
+static struct rk817_reg_val_typ playback_power_up_list[] = {
+	{RK817_CODEC_AREF_RTCFG1, 0x40},
+	{RK817_CODEC_DDAC_POPD_DACST, 0x02},
+	{RK817_CODEC_DDAC_SR_LMT0, 0x02},
+	/* {RK817_CODEC_DTOP_DIGEN_CLKE, 0x0f}, */
+	/* APLL */
+	{RK817_CODEC_APLL_CFG0, 0x04},
+	{RK817_CODEC_APLL_CFG1, 0x58},
+	{RK817_CODEC_APLL_CFG2, 0x2d},
+	{RK817_CODEC_APLL_CFG3, 0x0c},
+	{RK817_CODEC_APLL_CFG4, 0xa5},
+	{RK817_CODEC_APLL_CFG5, 0x00},
+
+	{RK817_CODEC_DI2S_RXCMD_TSD, 0x00},
+	{RK817_CODEC_DI2S_RSD, 0x00},
+	/* {RK817_CODEC_DI2S_CKM, 0x00}, */
+	{RK817_CODEC_DI2S_RXCR1, 0x00},
+	{RK817_CODEC_DI2S_RXCMD_TSD, 0x20},
+	{RK817_CODEC_DTOP_VUCTIME, 0xf4},
+	{RK817_CODEC_DDAC_MUTE_MIXCTL, 0x00},
+
+	{RK817_CODEC_DDAC_VOLL, 0x0a},
+	{RK817_CODEC_DDAC_VOLR, 0x0a},
+};
+
+#define RK817_CODEC_PLAYBACK_POWER_UP_LIST_LEN \
+	ARRAY_SIZE(playback_power_up_list)
+
+static struct rk817_reg_val_typ playback_power_down_list[] = {
+	{RK817_CODEC_DDAC_MUTE_MIXCTL, 0x01},
+	{RK817_CODEC_ADAC_CFG1, 0x0f},
+	/* HP */
+	{RK817_CODEC_AHP_CFG0, 0xe0},
+	{RK817_CODEC_AHP_CP, 0x09},
+	/* SPK */
+	{RK817_CODEC_ACLASSD_CFG1, 0x69},
+};
+
+#define RK817_CODEC_PLAYBACK_POWER_DOWN_LIST_LEN \
+	ARRAY_SIZE(playback_power_down_list)
+
+static int rk817_codec_power_up(struct rk817_codec_priv *rk817, int type)
+{
+	struct udevice *codec = rk817->dev->parent;
+	int i;
+
+	DBG("%s : power up %s %s %s\n", __func__,
+	    type & RK817_CODEC_PLAYBACK ? "playback" : "",
+	    type & RK817_CODEC_CAPTURE ? "capture" : "",
+	    type & RK817_CODEC_INCALL ? "incall" : "");
+
+	if (type & RK817_CODEC_PLAYBACK) {
+		snd_soc_update_bits(codec, RK817_CODEC_DTOP_DIGEN_CLKE,
+				    DAC_DIG_CLK_MASK, DAC_DIG_CLK_EN);
+		for (i = 0; i < RK817_CODEC_PLAYBACK_POWER_UP_LIST_LEN; i++) {
+			snd_soc_write(codec, playback_power_up_list[i].reg,
+				      playback_power_up_list[i].value);
+		}
+	}
+
+	return 0;
+}
+
+static int rk817_codec_power_down(struct rk817_codec_priv *rk817, int type)
+{
+	struct udevice *codec = rk817->dev->parent;
+	int i;
+
+	DBG("%s : power down %s %s %s\n", __func__,
+	    type & RK817_CODEC_PLAYBACK ? "playback" : "",
+	    type & RK817_CODEC_CAPTURE ? "capture" : "",
+	    type & RK817_CODEC_INCALL ? "incall" : "");
+
+	/* mute output for pop noise */
+	if ((type & RK817_CODEC_PLAYBACK) ||
+	    (type & RK817_CODEC_INCALL)) {
+		snd_soc_update_bits(codec, RK817_CODEC_DDAC_MUTE_MIXCTL,
+				    DACMT_ENABLE, DACMT_ENABLE);
+	}
+
+	if (type & RK817_CODEC_PLAYBACK) {
+		for (i = 0; i < RK817_CODEC_PLAYBACK_POWER_DOWN_LIST_LEN; i++) {
+			snd_soc_write(codec, playback_power_down_list[i].reg,
+				      playback_power_down_list[i].value);
+		}
+		snd_soc_update_bits(codec, RK817_CODEC_DTOP_DIGEN_CLKE,
+				    DAC_DIG_CLK_MASK, DAC_DIG_CLK_DIS);
+	}
+
+	if (type == RK817_CODEC_ALL) {
+		for (i = 0; i < RK817_CODEC_PLAYBACK_POWER_DOWN_LIST_LEN; i++) {
+			snd_soc_write(codec, playback_power_down_list[i].reg,
+				      playback_power_down_list[i].value);
+		}
+		snd_soc_write(codec, RK817_CODEC_DTOP_DIGEN_CLKE, 0x00);
+		snd_soc_write(codec, RK817_CODEC_APLL_CFG5, 0x01);
+		snd_soc_write(codec, RK817_CODEC_AREF_RTCFG1, 0x06);
+	}
+
+	return 0;
+}
+
+static int rk817_playback_path_put(struct rk817_codec_priv *rk817, int path)
+{
+	struct udevice *codec = rk817->dev->parent;
+	long int pre_path;
+
+	if (rk817->playback_path == path) {
+		DBG("%s : playback_path is not changed!\n", __func__);
+		return 0;
+	}
+
+	pre_path = rk817->playback_path;
+	rk817->playback_path = path;
+
+	DBG("%s : set playback_path %ld, pre_path %ld\n",
+	    __func__, rk817->playback_path, pre_path);
+
+	switch (rk817->playback_path) {
+	case OFF:
+		rk817_codec_power_down(rk817, RK817_CODEC_PLAYBACK);
+		break;
+	case RCV:
+	case SPK_PATH:
+	case RING_SPK:
+		if (pre_path == OFF)
+			rk817_codec_power_up(rk817, RK817_CODEC_PLAYBACK);
+		if (!rk817->use_ext_amplifier) {
+			/* power on dac ibias/l/r */
+			snd_soc_write(codec, RK817_CODEC_ADAC_CFG1,
+				      PWD_DACBIAS_ON | PWD_DACD_ON |
+				      PWD_DACL_ON | PWD_DACR_ON);
+			/* CLASS D mode */
+			snd_soc_write(codec, RK817_CODEC_DDAC_MUTE_MIXCTL, 0x10);
+			/* CLASS D enable */
+			snd_soc_write(codec, RK817_CODEC_ACLASSD_CFG1, 0xa5);
+			/* restart CLASS D, OCPP/N */
+			snd_soc_write(codec, RK817_CODEC_ACLASSD_CFG2, 0xc4);
+		} else {
+			/* HP_CP_EN , CP 2.3V */
+			snd_soc_write(codec, RK817_CODEC_AHP_CP, 0x11);
+			/* power on HP two stage opamp ,HP amplitude 0db */
+			snd_soc_write(codec, RK817_CODEC_AHP_CFG0, 0x80);
+			/* power on dac ibias/l/r */
+			snd_soc_write(codec, RK817_CODEC_ADAC_CFG1,
+				      PWD_DACBIAS_ON | PWD_DACD_DOWN |
+				      PWD_DACL_ON | PWD_DACR_ON);
+			snd_soc_update_bits(codec, RK817_CODEC_DDAC_MUTE_MIXCTL,
+					    DACMT_ENABLE, DACMT_DISABLE);
+		}
+		snd_soc_write(codec, RK817_CODEC_DDAC_VOLL, rk817->spk_volume);
+		snd_soc_write(codec, RK817_CODEC_DDAC_VOLR, rk817->spk_volume);
+		break;
+	case HP_PATH:
+	case HP_NO_MIC:
+	case RING_HP:
+	case RING_HP_NO_MIC:
+		if (pre_path == OFF)
+			rk817_codec_power_up(rk817, RK817_CODEC_PLAYBACK);
+		/* HP_CP_EN , CP 2.3V */
+		snd_soc_write(codec, RK817_CODEC_AHP_CP, 0x11);
+		/* power on HP two stage opamp ,HP amplitude 0db */
+		snd_soc_write(codec, RK817_CODEC_AHP_CFG0, 0x80);
+		/* power on dac ibias/l/r */
+		snd_soc_write(codec, RK817_CODEC_ADAC_CFG1,
+			      PWD_DACBIAS_ON | PWD_DACD_DOWN |
+			      PWD_DACL_ON | PWD_DACR_ON);
+		snd_soc_update_bits(codec, RK817_CODEC_DDAC_MUTE_MIXCTL,
+				    DACMT_ENABLE, DACMT_DISABLE);
+
+		snd_soc_write(codec, RK817_CODEC_DDAC_VOLL, rk817->hp_volume);
+		snd_soc_write(codec, RK817_CODEC_DDAC_VOLR, rk817->hp_volume);
+		break;
+	case BT:
+		break;
+	case SPK_HP:
+	case RING_SPK_HP:
+		if (pre_path == OFF)
+			rk817_codec_power_up(rk817, RK817_CODEC_PLAYBACK);
+
+		/* HP_CP_EN , CP 2.3V  */
+		snd_soc_write(codec, RK817_CODEC_AHP_CP, 0x11);
+		/* power on HP two stage opamp ,HP amplitude 0db */
+		snd_soc_write(codec, RK817_CODEC_AHP_CFG0, 0x80);
+
+		/* power on dac ibias/l/r */
+		snd_soc_write(codec, RK817_CODEC_ADAC_CFG1,
+			      PWD_DACBIAS_ON | PWD_DACD_ON |
+			      PWD_DACL_ON | PWD_DACR_ON);
+
+		if (!rk817->use_ext_amplifier) {
+			/* CLASS D mode */
+			snd_soc_write(codec, RK817_CODEC_DDAC_MUTE_MIXCTL, 0x10);
+			/* CLASS D enable */
+			snd_soc_write(codec, RK817_CODEC_ACLASSD_CFG1, 0xa5);
+			/* restart CLASS D, OCPP/N */
+			snd_soc_write(codec, RK817_CODEC_ACLASSD_CFG2, 0xc4);
+		}
+
+		snd_soc_write(codec, RK817_CODEC_DDAC_VOLL, rk817->hp_volume);
+		snd_soc_write(codec, RK817_CODEC_DDAC_VOLR, rk817->hp_volume);
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int rk817_hw_params(struct udevice *dev, unsigned int samplerate,
+			   unsigned int fmt, unsigned int channels)
+{
+	struct rk817_codec_priv *rk817 = dev_get_priv(dev);
+	struct udevice *codec = rk817->dev->parent;
+
+	snd_soc_update_bits(codec, RK817_CODEC_DI2S_CKM,
+			    RK817_I2S_MODE_MASK, RK817_I2S_MODE_SLV);
+	snd_soc_write(codec, RK817_CODEC_DI2S_RXCR2, VDW_RX_16BITS);
+	snd_soc_write(codec, RK817_CODEC_DI2S_TXCR2, VDW_TX_16BITS);
+
+	return 0;
+}
+
+static int rk817_digital_mute(struct rk817_codec_priv *rk817, int mute)
+{
+	struct udevice *codec = rk817->dev->parent;
+
+	if (mute)
+		snd_soc_update_bits(codec, RK817_CODEC_DDAC_MUTE_MIXCTL,
+				    DACMT_ENABLE, DACMT_ENABLE);
+	else
+		snd_soc_update_bits(codec, RK817_CODEC_DDAC_MUTE_MIXCTL,
+				    DACMT_ENABLE, DACMT_DISABLE);
+
+	return 0;
+}
+
+static int rk817_startup(struct udevice *dev)
+{
+	struct rk817_codec_priv *rk817 = dev_get_priv(dev);
+
+	rk817_playback_path_put(rk817, SPK_HP);
+	rk817_digital_mute(rk817, 0);
+
+	return 0;
+}
+
+static const struct snd_soc_dai_ops rk817_codec_ops = {
+	.hw_params = rk817_hw_params,
+	.startup = rk817_startup,
+};
+
+static int rk817_codec_probe(struct udevice *dev)
+{
+	struct rk8xx_priv *rk817 = dev_get_priv(dev->parent);
+	struct rk817_codec_priv *rk817_codec = dev_get_priv(dev);
+
+	if (!rk817) {
+		printf("%s : rk817 is null\n", __func__);
+		return -EINVAL;
+	}
+
+	switch (rk817->variant) {
+	case RK809_ID:
+	case RK817_ID:
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	rk817_codec->dev = dev;
+	rk817_codec->hp_volume = INITIAL_VOLUME;
+	rk817_codec->spk_volume = INITIAL_VOLUME;
+	rk817_codec->playback_path = OFF;
+	rk817_reset(rk817_codec);
+
+	return 0;
+}
+
+static const struct udevice_id rk817_codec_ids[] = {
+	{ .compatible = "rockchip,rk817-codec" },
+	{ }
+};
+
+U_BOOT_DRIVER(rk817) = {
+	.name = "rk817_codec",
+	.id = UCLASS_CODEC,
+	.of_match = rk817_codec_ids,
+	.probe = rk817_codec_probe,
+	.priv_auto_alloc_size = sizeof(struct rk817_codec_priv),
+	.ops = &rk817_codec_ops,
+};
+
+UCLASS_DRIVER(codec) = {
+	.id = UCLASS_CODEC,
+	.name = "codec",
+};
diff --git a/drivers/sound/rk817_codec.h b/drivers/sound/rk817_codec.h
new file mode 100644
index 0000000000..d4956a1e5c
--- /dev/null
+++ b/drivers/sound/rk817_codec.h
@@ -0,0 +1,203 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef __RK817_CODEC_H__
+#define __RK817_CODEC_H__
+
+/* codec register */
+#define RK817_CODEC_BASE		0x0000
+
+#define RK817_CODEC_DTOP_VUCTL		(RK817_CODEC_BASE + 0x12)
+#define RK817_CODEC_DTOP_VUCTIME	(RK817_CODEC_BASE + 0x13)
+#define RK817_CODEC_DTOP_LPT_SRST	(RK817_CODEC_BASE + 0x14)
+#define RK817_CODEC_DTOP_DIGEN_CLKE	(RK817_CODEC_BASE + 0x15)
+#define RK817_CODEC_AREF_RTCFG0		(RK817_CODEC_BASE + 0x16)
+#define RK817_CODEC_AREF_RTCFG1		(RK817_CODEC_BASE + 0x17)
+#define RK817_CODEC_AADC_CFG0		(RK817_CODEC_BASE + 0x18)
+#define RK817_CODEC_AADC_CFG1		(RK817_CODEC_BASE + 0x19)
+#define RK817_CODEC_DADC_VOLL		(RK817_CODEC_BASE + 0x1a)
+#define RK817_CODEC_DADC_VOLR		(RK817_CODEC_BASE + 0x1b)
+#define RK817_CODEC_DADC_SR_ACL0	(RK817_CODEC_BASE + 0x1e)
+#define RK817_CODEC_DADC_ALC1		(RK817_CODEC_BASE + 0x1f)
+#define RK817_CODEC_DADC_ALC2		(RK817_CODEC_BASE + 0x20)
+#define RK817_CODEC_DADC_NG		(RK817_CODEC_BASE + 0x21)
+#define RK817_CODEC_DADC_HPF		(RK817_CODEC_BASE + 0x22)
+#define RK817_CODEC_DADC_RVOLL		(RK817_CODEC_BASE + 0x23)
+#define RK817_CODEC_DADC_RVOLR		(RK817_CODEC_BASE + 0x24)
+#define RK817_CODEC_AMIC_CFG0		(RK817_CODEC_BASE + 0x27)
+#define RK817_CODEC_AMIC_CFG1		(RK817_CODEC_BASE + 0x28)
+#define RK817_CODEC_DMIC_PGA_GAIN	(RK817_CODEC_BASE + 0x29)
+#define RK817_CODEC_DMIC_LMT1		(RK817_CODEC_BASE + 0x2a)
+#define RK817_CODEC_DMIC_LMT2		(RK817_CODEC_BASE + 0x2b)
+#define RK817_CODEC_DMIC_NG1		(RK817_CODEC_BASE + 0x2c)
+#define RK817_CODEC_DMIC_NG2		(RK817_CODEC_BASE + 0x2d)
+#define RK817_CODEC_ADAC_CFG0		(RK817_CODEC_BASE + 0x2e)
+#define RK817_CODEC_ADAC_CFG1		(RK817_CODEC_BASE + 0x2f)
+#define RK817_CODEC_DDAC_POPD_DACST	(RK817_CODEC_BASE + 0x30)
+#define RK817_CODEC_DDAC_VOLL		(RK817_CODEC_BASE + 0x31)
+#define RK817_CODEC_DDAC_VOLR		(RK817_CODEC_BASE + 0x32)
+#define RK817_CODEC_DDAC_SR_LMT0	(RK817_CODEC_BASE + 0x35)
+#define RK817_CODEC_DDAC_LMT1		(RK817_CODEC_BASE + 0x36)
+#define RK817_CODEC_DDAC_LMT2		(RK817_CODEC_BASE + 0x37)
+#define RK817_CODEC_DDAC_MUTE_MIXCTL	(RK817_CODEC_BASE + 0x38)
+#define RK817_CODEC_DDAC_RVOLL		(RK817_CODEC_BASE + 0x39)
+#define RK817_CODEC_DDAC_RVOLR		(RK817_CODEC_BASE + 0x3a)
+#define RK817_CODEC_AHP_ANTI0		(RK817_CODEC_BASE + 0x3b)
+#define RK817_CODEC_AHP_ANTI1		(RK817_CODEC_BASE + 0x3c)
+#define RK817_CODEC_AHP_CFG0		(RK817_CODEC_BASE + 0x3d)
+#define RK817_CODEC_AHP_CFG1		(RK817_CODEC_BASE + 0x3e)
+#define RK817_CODEC_AHP_CP		(RK817_CODEC_BASE + 0x3f)
+#define RK817_CODEC_ACLASSD_CFG1	(RK817_CODEC_BASE + 0x40)
+#define RK817_CODEC_ACLASSD_CFG2	(RK817_CODEC_BASE + 0x41)
+#define RK817_CODEC_APLL_CFG0		(RK817_CODEC_BASE + 0x42)
+#define RK817_CODEC_APLL_CFG1		(RK817_CODEC_BASE + 0x43)
+#define RK817_CODEC_APLL_CFG2		(RK817_CODEC_BASE + 0x44)
+#define RK817_CODEC_APLL_CFG3		(RK817_CODEC_BASE + 0x45)
+#define RK817_CODEC_APLL_CFG4		(RK817_CODEC_BASE + 0x46)
+#define RK817_CODEC_APLL_CFG5		(RK817_CODEC_BASE + 0x47)
+#define RK817_CODEC_DI2S_CKM		(RK817_CODEC_BASE + 0x48)
+#define RK817_CODEC_DI2S_RSD		(RK817_CODEC_BASE + 0x49)
+#define RK817_CODEC_DI2S_RXCR1		(RK817_CODEC_BASE + 0x4a)
+#define RK817_CODEC_DI2S_RXCR2		(RK817_CODEC_BASE + 0x4b)
+#define RK817_CODEC_DI2S_RXCMD_TSD	(RK817_CODEC_BASE + 0x4c)
+#define RK817_CODEC_DI2S_TXCR1		(RK817_CODEC_BASE + 0x4d)
+#define RK817_CODEC_DI2S_TXCR2		(RK817_CODEC_BASE + 0x4e)
+#define RK817_CODEC_DI2S_TXCR3_TXCMD	(RK817_CODEC_BASE + 0x4f)
+
+/* RK817_CODEC_DTOP_DIGEN_CLKE */
+#define ADC_DIG_CLK_MASK		(0xf << 4)
+#define ADC_DIG_CLK_SFT			4
+#define ADC_DIG_CLK_DIS			(0x0 << 4)
+#define ADC_DIG_CLK_EN			(0xf << 4)
+
+#define DAC_DIG_CLK_MASK		(0xf << 0)
+#define DAC_DIG_CLK_SFT			0
+#define DAC_DIG_CLK_DIS			(0x0 << 0)
+#define DAC_DIG_CLK_EN			(0xf << 0)
+
+/* RK817_CODEC_APLL_CFG5 */
+#define PLL_PW_DOWN			(0x01 << 0)
+#define PLL_PW_UP			(0x00 << 0)
+
+/* RK817_CODEC_DI2S_CKM */
+#define PDM_EN_MASK			(0x1 << 3)
+#define PDM_EN_SFT			3
+#define PDM_EN_DISABLE			(0x0 << 3)
+#define PDM_EN_ENABLE			(0x1 << 3)
+
+#define SCK_EN_ENABLE			(0x1 << 2)
+#define SCK_EN_DISABLE			(0x0 << 2)
+
+#define RK817_I2S_MODE_MASK		(0x1 << 0)
+#define RK817_I2S_MODE_SFT		0
+#define RK817_I2S_MODE_MST		(0x1 << 0)
+#define RK817_I2S_MODE_SLV		(0x0 << 0)
+
+/* RK817_CODEC_DDAC_MUTE_MIXCTL */
+#define DACMT_ENABLE			(0x1 << 0)
+#define DACMT_DISABLE			(0x0 << 0)
+
+/* RK817_CODEC_DI2S_RXCR2 */
+#define VDW_RX_24BITS			(0x17)
+#define VDW_RX_16BITS			(0x0f)
+/* RK817_CODEC_DI2S_TXCR2 */
+#define VDW_TX_24BITS			(0x17)
+#define VDW_TX_16BITS			(0x0f)
+
+/* RK817_CODEC_AHP_CFG1 */
+#define HP_ANTIPOP_ENABLE		(0x1 << 4)
+#define HP_ANTIPOP_DISABLE		(0x0 << 4)
+
+/* RK817_CODEC_ADAC_CFG1 */
+#define PWD_DACBIAS_MASK		(0x1 << 3)
+#define PWD_DACBIAS_SFT			3
+#define PWD_DACBIAS_DOWN		(0x1 << 3)
+#define PWD_DACBIAS_ON			(0x0 << 3)
+
+#define PWD_DACD_MASK			(0x1 << 2)
+#define PWD_DACD_SFT			2
+#define PWD_DACD_DOWN			(0x1 << 2)
+#define PWD_DACD_ON			(0x0 << 2)
+
+#define PWD_DACL_MASK			(0x1 << 1)
+#define PWD_DACL_SFT			1
+#define PWD_DACL_DOWN			(0x1 << 1)
+#define PWD_DACL_ON			(0x0 << 1)
+
+#define PWD_DACR_MASK			(0x1 << 0)
+#define PWD_DACR_SFT			0
+#define PWD_DACR_DOWN			(0x1 << 0)
+#define PWD_DACR_ON			(0x0 << 0)
+
+/* RK817_CODEC_AADC_CFG0 */
+#define ADC_L_PWD_MASK			(0x1 << 7)
+#define ADC_L_PWD_SFT			7
+#define ADC_L_PWD_DIS			(0x0 << 7)
+#define ADC_L_PWD_EN			(0x1 << 7)
+
+#define ADC_R_PWD_MASK			(0x1 << 6)
+#define ADC_R_PWD_SFT			6
+#define ADC_R_PWD_DIS			(0x0 << 6)
+#define ADC_R_PWD_EN			(0x1 << 6)
+
+/* RK817_CODEC_AMIC_CFG0 */
+#define MIC_DIFF_MASK			(0x1 << 7)
+#define MIC_DIFF_SFT			7
+#define MIC_DIFF_DIS			(0x0 << 7)
+#define MIC_DIFF_EN			(0x1 << 7)
+
+#define PWD_PGA_L_MASK			(0x1 << 5)
+#define PWD_PGA_L_SFT			5
+#define PWD_PGA_L_DIS			(0x0 << 5)
+#define PWD_PGA_L_EN			(0x1 << 5)
+
+#define PWD_PGA_R_MASK			(0x1 << 4)
+#define PWD_PGA_R_SFT			4
+#define PWD_PGA_R_DIS			(0x0 << 4)
+#define PWD_PGA_R_EN			(0x1 << 4)
+
+enum {
+	RK817_HIFI,
+	RK817_VOICE,
+};
+
+enum {
+	RK817_MONO = 1,
+	RK817_STEREO,
+};
+
+enum {
+	OFF,
+	RCV,
+	SPK_PATH,
+	HP_PATH,
+	HP_NO_MIC,
+	BT,
+	SPK_HP,
+	RING_SPK,
+	RING_HP,
+	RING_HP_NO_MIC,
+	RING_SPK_HP,
+};
+
+enum {
+	MIC_OFF,
+	MAIN_MIC,
+	HANDS_FREE_MIC,
+	BT_SCO_MIC,
+};
+
+struct rk817_reg_val_typ {
+	unsigned int reg;
+	unsigned int value;
+};
+
+struct rk817_init_bit_typ {
+	unsigned int reg;
+	unsigned int power_bit;
+	unsigned int init_bit;
+};
+
+#endif /* __RK817_CODEC_H__ */
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index ed58b5d89c..fdfa9b5f58 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -31,6 +31,7 @@ enum uclass_id {
 	UCLASS_BLK,		/* Block device */
 	UCLASS_CLK,		/* Clock source, e.g. used by peripherals */
 	UCLASS_CPU,		/* CPU, typically part of an SoC */
+	UCLASS_CODEC,		/* audio codec */
 	UCLASS_CROS_EC,		/* Chrome OS EC */
 	UCLASS_DISPLAY,		/* Display (e.g. DisplayPort, HDMI) */
 	UCLASS_DMA,		/* Direct Memory Access */

commit 7a5efcbd6704ebbdcd1b6d46ae7f1bd6c6e96a9f
Author: Sugar Zhang <sugar.zhang@rock-chips.com>
Date:   Fri Sep 21 16:50:29 2018 +0800

    power: pmic: rk8xx: bind codec for rk809/rk817
    
    Change-Id: I600f49799dde318d46e349264f568e38225a6414
    Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index d9abd6de6f..7ad88b75b7 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -44,6 +44,11 @@ static const struct pmic_child_info fuel_gauge_info[] = {
 	{ },
 };
 
+static const struct pmic_child_info rk817_codec_info[] = {
+	{ .prefix = "codec", .driver = "rk817_codec"},
+	{ },
+};
+
 static int rk8xx_reg_count(struct udevice *dev)
 {
 	return RK808_NUM_OF_REGS;
@@ -146,6 +151,10 @@ static int rk8xx_bind(struct udevice *dev)
 	if (!children)
 		debug("%s: %s - no child found\n", __func__, dev->name);
 
+	children = pmic_bind_children(dev, dev->node, rk817_codec_info);
+	if (!children)
+		debug("%s: %s - no child found\n", __func__, dev->name);
+
 	/* Always return success for this device */
 	return 0;
 }

commit 69ab2873d7dfde4d3bde450cbbcd415ad5a6a883
Author: Sugar Zhang <sugar.zhang@rock-chips.com>
Date:   Fri Sep 21 16:31:49 2018 +0800

    sound: rockchip: add support for i2s
    
    This patch add driver support for rockchip i2s bus.
    
    Change-Id: I2c7f2b46d628706fa000055f7962ba6b4ff6d0b6
    Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>

diff --git a/drivers/sound/Kconfig b/drivers/sound/Kconfig
index 5de86c05c6..ec75f5220a 100644
--- a/drivers/sound/Kconfig
+++ b/drivers/sound/Kconfig
@@ -31,6 +31,16 @@ config I2S_SAMSUNG
 	  option provides an implementation for sound_init() and
 	  sound_play().
 
+config I2S_ROCKCHIP
+	bool "Enable I2S support for rockchip SoCs"
+	depends on SOUND
+	help
+	  Rockchip SoCs support an I2S interface for sending audio
+	  data to an audio codec. This option enables support for this,
+	  using one of the available audio codec drivers. Enabling this
+	  option provides an implementation for sound_init() and
+	  sound_play().
+
 config SOUND_MAX98095
 	bool "Support Maxim max98095 audio codec"
 	depends on I2S_SAMSUNG
diff --git a/drivers/sound/Makefile b/drivers/sound/Makefile
index 981ed614b1..21dfcae3a3 100644
--- a/drivers/sound/Makefile
+++ b/drivers/sound/Makefile
@@ -7,6 +7,7 @@
 
 obj-$(CONFIG_SOUND)	+= sound.o
 obj-$(CONFIG_I2S)	+= sound-i2s.o
+obj-$(CONFIG_I2S_ROCKCHIP)	+= rockchip-i2s.o
 obj-$(CONFIG_I2S_SAMSUNG)	+= samsung-i2s.o
 obj-$(CONFIG_SOUND_SANDBOX)	+= sandbox.o
 obj-$(CONFIG_SOUND_WM8994)	+= wm8994.o
diff --git a/drivers/sound/rockchip-i2s.c b/drivers/sound/rockchip-i2s.c
new file mode 100644
index 0000000000..f1f9bf21ab
--- /dev/null
+++ b/drivers/sound/rockchip-i2s.c
@@ -0,0 +1,189 @@
+// SPDX-License-Identifier:     GPL-2.0+
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ */
+
+#include <clk.h>
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <malloc.h>
+#include <asm/io.h>
+#include <sound.h>
+#include "rockchip-i2s.h"
+
+#define I2S_FIFO_LENGTH (31)
+
+struct rk_i2s_dev {
+	void *regbase;
+	struct clk mclk;
+};
+
+static inline u32 i2s_reg_readl(struct rk_i2s_dev *dev, u32 offset)
+{
+	return readl(dev->regbase + offset);
+}
+
+static inline void i2s_reg_writel(struct rk_i2s_dev *dev, u32 offset, u32 val)
+{
+	writel(val, dev->regbase + offset);
+}
+
+static inline void i2s_reg_update_bits(struct rk_i2s_dev *dev, u32 offset,
+				       u32 mask, u32 val)
+{
+	u32 tmp, orig;
+
+	orig = readl(dev->regbase + offset);
+
+	tmp = orig & ~mask;
+	tmp |= val & mask;
+
+	if (tmp != orig)
+		writel(tmp, dev->regbase + offset);
+}
+
+static void dump_regs(struct rk_i2s_dev *dev)
+{
+	int i = 0;
+
+	for (i = 0; i <= I2S_RXDR; i += 4)
+		debug("0x%02x: 0x%08x\n", i, readl(dev->regbase + i));
+}
+
+static int rk_i2s_hw_params(struct udevice *udev, unsigned int samplerate,
+			    unsigned int fmt, unsigned int channels)
+{
+	struct rk_i2s_dev *dev = dev_get_priv(udev);
+
+	/* set fmt */
+	i2s_reg_update_bits(dev, I2S_CKR,
+			    I2S_CKR_MSS_MASK, I2S_CKR_MSS_MASTER);
+	i2s_reg_update_bits(dev, I2S_TXCR,
+			    I2S_TXCR_IBM_MASK, I2S_TXCR_IBM_NORMAL);
+	i2s_reg_update_bits(dev, I2S_RXCR,
+			    I2S_RXCR_IBM_MASK, I2S_RXCR_IBM_NORMAL);
+	/* set div */
+	i2s_reg_update_bits(dev, I2S_CKR,
+			    I2S_CKR_TSD_MASK | I2S_CKR_RSD_MASK,
+			    I2S_CKR_TSD(64) | I2S_CKR_RSD(64));
+	i2s_reg_update_bits(dev, I2S_CKR,
+			    I2S_CKR_MDIV_MASK, I2S_CKR_MDIV(4));
+	/* set hwparams */
+	i2s_reg_update_bits(dev, I2S_TXCR,
+			    I2S_TXCR_VDW_MASK |
+			    I2S_TXCR_CSR_MASK,
+			    I2S_TXCR_VDW(16) |
+			    I2S_TXCR_CHN_2);
+	i2s_reg_update_bits(dev, I2S_RXCR,
+			    I2S_RXCR_CSR_MASK |
+			    I2S_RXCR_VDW_MASK,
+			    I2S_TXCR_VDW(16) |
+			    I2S_TXCR_CHN_2);
+	i2s_reg_update_bits(dev, I2S_DMACR,
+			    I2S_DMACR_TDL_MASK | I2S_DMACR_RDL_MASK,
+			    I2S_DMACR_TDL(16) | I2S_DMACR_RDL(16));
+
+	return 0;
+}
+
+static void rk_i2s_txctrl(struct rk_i2s_dev *dev, int on)
+{
+	if (on) {
+		i2s_reg_update_bits(dev, I2S_XFER,
+				    I2S_XFER_TXS_MASK | I2S_XFER_RXS_MASK,
+				    I2S_XFER_TXS_START | I2S_XFER_RXS_START);
+	} else {
+		i2s_reg_update_bits(dev, I2S_XFER,
+				    I2S_XFER_TXS_MASK |
+				    I2S_XFER_RXS_MASK,
+				    I2S_XFER_TXS_STOP |
+				    I2S_XFER_RXS_STOP);
+
+		i2s_reg_update_bits(dev, I2S_CLR,
+				    I2S_CLR_TXC_MASK | I2S_CLR_RXC_MASK,
+				    I2S_CLR_TXC | I2S_CLR_RXC);
+	}
+}
+
+static int rk_i2s_transfer_tx_data(struct udevice *udev, unsigned int *data,
+				   unsigned long data_size)
+{
+	struct rk_i2s_dev *dev = dev_get_priv(udev);
+	u32 val;
+
+	if (data_size < I2S_FIFO_LENGTH) {
+		debug("%s : invalid data size\n", __func__);
+		return -EINVAL;
+	}
+
+	rk_i2s_txctrl(dev, 1);
+	while (data_size > 0) {
+		val = i2s_reg_readl(dev, I2S_FIFOLR);
+		if (val < I2S_FIFO_LENGTH) {
+			i2s_reg_writel(dev, I2S_TXDR, *data++);
+			data_size--;
+		}
+	}
+
+	return 0;
+}
+
+static int rk_i2s_set_sysclk(struct udevice *dev, unsigned int freq)
+{
+	struct rk_i2s_dev *i2s = dev_get_priv(dev);
+
+	clk_set_rate(&i2s->mclk, freq);
+
+	return 0;
+}
+
+static const struct snd_soc_dai_ops rockchip_i2s_ops = {
+	.hw_params = rk_i2s_hw_params,
+	.set_sysclk = rk_i2s_set_sysclk,
+	.transfer = rk_i2s_transfer_tx_data,
+};
+
+static int rockchip_i2s_probe(struct udevice *dev)
+{
+	struct rk_i2s_dev *i2s = dev_get_priv(dev);
+	int ret;
+
+	i2s->regbase = dev_read_addr_ptr(dev);
+
+	ret = clk_get_by_name(dev, "i2s_clk", &i2s->mclk);
+	if (ret) {
+		printf("%s get i2s mclk fail!\n", __func__);
+		return -EINVAL;
+	}
+
+	dump_regs(i2s);
+	return 0;
+}
+
+static const struct udevice_id rockchip_i2s_ids[] = {
+	{ .compatible = "rockchip,px30-i2s", },
+	{ .compatible = "rockchip,rk3036-i2s", },
+	{ .compatible = "rockchip,rk3066-i2s", },
+	{ .compatible = "rockchip,rk3128-i2s", },
+	{ .compatible = "rockchip,rk3188-i2s", },
+	{ .compatible = "rockchip,rk3288-i2s", },
+	{ .compatible = "rockchip,rk3328-i2s", },
+	{ .compatible = "rockchip,rk3368-i2s", },
+	{ .compatible = "rockchip,rk3399-i2s", },
+	{ }
+};
+
+U_BOOT_DRIVER(rockchip_i2s) = {
+	.name = "rockchip_i2s",
+	.id = UCLASS_I2S,
+	.of_match = rockchip_i2s_ids,
+	.probe = rockchip_i2s_probe,
+	.priv_auto_alloc_size = sizeof(struct rk_i2s_dev),
+	.ops = &rockchip_i2s_ops,
+};
+
+UCLASS_DRIVER(i2s) = {
+	.id = UCLASS_I2S,
+	.name = "i2s_bus",
+};
diff --git a/drivers/sound/rockchip-i2s.h b/drivers/sound/rockchip-i2s.h
new file mode 100644
index 0000000000..977d2d3202
--- /dev/null
+++ b/drivers/sound/rockchip-i2s.h
@@ -0,0 +1,209 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef __ROCKCHIP_I2S_H__
+#define __ROCKCHIP_I2S_H__
+
+/* I2S REGS */
+#define I2S_TXCR	(0x0000)
+#define I2S_RXCR	(0x0004)
+#define I2S_CKR		(0x0008)
+#define I2S_FIFOLR	(0x000c)
+#define I2S_DMACR	(0x0010)
+#define I2S_INTCR	(0x0014)
+#define I2S_INTSR	(0x0018)
+#define I2S_XFER	(0x001c)
+#define I2S_CLR		(0x0020)
+#define I2S_TXDR	(0x0024)
+#define I2S_RXDR	(0x0028)
+
+/*
+ * TXCR
+ * transmit operation control register
+ */
+#define I2S_TXCR_RCNT_SHIFT	17
+#define I2S_TXCR_RCNT_MASK	(0x3f << I2S_TXCR_RCNT_SHIFT)
+#define I2S_TXCR_CSR_SHIFT	15
+#define I2S_TXCR_CSR(x)		(x << I2S_TXCR_CSR_SHIFT)
+#define I2S_TXCR_CHN_2		(0 << I2S_TXCR_CSR_SHIFT)
+#define I2S_TXCR_CHN_4		(1 << I2S_TXCR_CSR_SHIFT)
+#define I2S_TXCR_CHN_6		(2 << I2S_TXCR_CSR_SHIFT)
+#define I2S_TXCR_CHN_8		(3 << I2S_TXCR_CSR_SHIFT)
+#define I2S_TXCR_CSR_MASK	(3 << I2S_TXCR_CSR_SHIFT)
+#define I2S_TXCR_HWT		BIT(14)
+#define I2S_TXCR_SJM_SHIFT	12
+#define I2S_TXCR_SJM_R		(0 << I2S_TXCR_SJM_SHIFT)
+#define I2S_TXCR_SJM_L		(1 << I2S_TXCR_SJM_SHIFT)
+#define I2S_TXCR_FBM_SHIFT	11
+#define I2S_TXCR_FBM_MSB	(0 << I2S_TXCR_FBM_SHIFT)
+#define I2S_TXCR_FBM_LSB	(1 << I2S_TXCR_FBM_SHIFT)
+#define I2S_TXCR_IBM_SHIFT	9
+#define I2S_TXCR_IBM_NORMAL	(0 << I2S_TXCR_IBM_SHIFT)
+#define I2S_TXCR_IBM_LSJM	(1 << I2S_TXCR_IBM_SHIFT)
+#define I2S_TXCR_IBM_RSJM	(2 << I2S_TXCR_IBM_SHIFT)
+#define I2S_TXCR_IBM_MASK	(3 << I2S_TXCR_IBM_SHIFT)
+#define I2S_TXCR_PBM_SHIFT	7
+#define I2S_TXCR_PBM_MODE(x)	(x << I2S_TXCR_PBM_SHIFT)
+#define I2S_TXCR_PBM_MASK	(3 << I2S_TXCR_PBM_SHIFT)
+#define I2S_TXCR_TFS_SHIFT	5
+#define I2S_TXCR_TFS_I2S	(0 << I2S_TXCR_TFS_SHIFT)
+#define I2S_TXCR_TFS_PCM	(1 << I2S_TXCR_TFS_SHIFT)
+#define I2S_TXCR_TFS_MASK	(1 << I2S_TXCR_TFS_SHIFT)
+#define I2S_TXCR_VDW_SHIFT	0
+#define I2S_TXCR_VDW(x)		((x - 1) << I2S_TXCR_VDW_SHIFT)
+#define I2S_TXCR_VDW_MASK	(0x1f << I2S_TXCR_VDW_SHIFT)
+
+/*
+ * RXCR
+ * receive operation control register
+ */
+#define I2S_RXCR_CSR_SHIFT	15
+#define I2S_RXCR_CSR(x)		(x << I2S_RXCR_CSR_SHIFT)
+#define I2S_RXCR_CSR_MASK	(3 << I2S_RXCR_CSR_SHIFT)
+#define I2S_RXCR_HWT		BIT(14)
+#define I2S_RXCR_SJM_SHIFT	12
+#define I2S_RXCR_SJM_R		(0 << I2S_RXCR_SJM_SHIFT)
+#define I2S_RXCR_SJM_L		(1 << I2S_RXCR_SJM_SHIFT)
+#define I2S_RXCR_FBM_SHIFT	11
+#define I2S_RXCR_FBM_MSB	(0 << I2S_RXCR_FBM_SHIFT)
+#define I2S_RXCR_FBM_LSB	(1 << I2S_RXCR_FBM_SHIFT)
+#define I2S_RXCR_IBM_SHIFT	9
+#define I2S_RXCR_IBM_NORMAL	(0 << I2S_RXCR_IBM_SHIFT)
+#define I2S_RXCR_IBM_LSJM	(1 << I2S_RXCR_IBM_SHIFT)
+#define I2S_RXCR_IBM_RSJM	(2 << I2S_RXCR_IBM_SHIFT)
+#define I2S_RXCR_IBM_MASK	(3 << I2S_RXCR_IBM_SHIFT)
+#define I2S_RXCR_PBM_SHIFT	7
+#define I2S_RXCR_PBM_MODE(x)	(x << I2S_RXCR_PBM_SHIFT)
+#define I2S_RXCR_PBM_MASK	(3 << I2S_RXCR_PBM_SHIFT)
+#define I2S_RXCR_TFS_SHIFT	5
+#define I2S_RXCR_TFS_I2S	(0 << I2S_RXCR_TFS_SHIFT)
+#define I2S_RXCR_TFS_PCM	(1 << I2S_RXCR_TFS_SHIFT)
+#define I2S_RXCR_TFS_MASK	(1 << I2S_RXCR_TFS_SHIFT)
+#define I2S_RXCR_VDW_SHIFT	0
+#define I2S_RXCR_VDW(x)		((x - 1) << I2S_RXCR_VDW_SHIFT)
+#define I2S_RXCR_VDW_MASK	(0x1f << I2S_RXCR_VDW_SHIFT)
+
+/*
+ * CKR
+ * clock generation register
+ */
+#define I2S_CKR_MSS_SHIFT	27
+#define I2S_CKR_MSS_MASTER	(0 << I2S_CKR_MSS_SHIFT)
+#define I2S_CKR_MSS_SLAVE	(1 << I2S_CKR_MSS_SHIFT)
+#define I2S_CKR_MSS_MASK	(1 << I2S_CKR_MSS_SHIFT)
+#define I2S_CKR_CKP_SHIFT	26
+#define I2S_CKR_CKP_NEG		(0 << I2S_CKR_CKP_SHIFT)
+#define I2S_CKR_CKP_POS		(1 << I2S_CKR_CKP_SHIFT)
+#define I2S_CKR_RLP_SHIFT	25
+#define I2S_CKR_RLP_NORMAL	(0 << I2S_CKR_RLP_SHIFT)
+#define I2S_CKR_RLP_OPPSITE	(1 << I2S_CKR_RLP_SHIFT)
+#define I2S_CKR_TLP_SHIFT	24
+#define I2S_CKR_TLP_NORMAL	(0 << I2S_CKR_TLP_SHIFT)
+#define I2S_CKR_TLP_OPPSITE	(1 << I2S_CKR_TLP_SHIFT)
+#define I2S_CKR_MDIV_SHIFT	16
+#define I2S_CKR_MDIV(x)		(((x) - 1) << I2S_CKR_MDIV_SHIFT)
+#define I2S_CKR_MDIV_MASK	(0xff << I2S_CKR_MDIV_SHIFT)
+#define I2S_CKR_RSD_SHIFT	8
+#define I2S_CKR_RSD(x)		(((x) - 1) << I2S_CKR_RSD_SHIFT)
+#define I2S_CKR_RSD_MASK	(0xff << I2S_CKR_RSD_SHIFT)
+#define I2S_CKR_TSD_SHIFT	0
+#define I2S_CKR_TSD(x)		(((x) - 1) << I2S_CKR_TSD_SHIFT)
+#define I2S_CKR_TSD_MASK	(0xff << I2S_CKR_TSD_SHIFT)
+
+/*
+ * FIFOLR
+ * FIFO level register
+ */
+#define I2S_FIFOLR_RFL_SHIFT	24
+#define I2S_FIFOLR_RFL_MASK	(0x3f << I2S_FIFOLR_RFL_SHIFT)
+#define I2S_FIFOLR_TFL3_SHIFT	18
+#define I2S_FIFOLR_TFL3_MASK	(0x3f << I2S_FIFOLR_TFL3_SHIFT)
+#define I2S_FIFOLR_TFL2_SHIFT	12
+#define I2S_FIFOLR_TFL2_MASK	(0x3f << I2S_FIFOLR_TFL2_SHIFT)
+#define I2S_FIFOLR_TFL1_SHIFT	6
+#define I2S_FIFOLR_TFL1_MASK	(0x3f << I2S_FIFOLR_TFL1_SHIFT)
+#define I2S_FIFOLR_TFL0_SHIFT	0
+#define I2S_FIFOLR_TFL0_MASK	(0x3f << I2S_FIFOLR_TFL0_SHIFT)
+
+/*
+ * DMACR
+ * DMA control register
+ */
+#define I2S_DMACR_RDE_SHIFT	24
+#define I2S_DMACR_RDE_DISABLE	(0 << I2S_DMACR_RDE_SHIFT)
+#define I2S_DMACR_RDE_ENABLE	(1 << I2S_DMACR_RDE_SHIFT)
+#define I2S_DMACR_RDE_MASK	(1 << I2S_DMACR_RDE_SHIFT)
+#define I2S_DMACR_RDL_SHIFT	16
+#define I2S_DMACR_RDL(x)	((x - 1) << I2S_DMACR_RDL_SHIFT)
+#define I2S_DMACR_RDL_MASK	(0x1f << I2S_DMACR_RDL_SHIFT)
+#define I2S_DMACR_TDE_SHIFT	8
+#define I2S_DMACR_TDE_DISABLE	(0 << I2S_DMACR_TDE_SHIFT)
+#define I2S_DMACR_TDE_ENABLE	(1 << I2S_DMACR_TDE_SHIFT)
+#define I2S_DMACR_TDE_MASK	(1 << I2S_DMACR_TDE_SHIFT)
+#define I2S_DMACR_TDL_SHIFT	0
+#define I2S_DMACR_TDL(x)	((x) << I2S_DMACR_TDL_SHIFT)
+#define I2S_DMACR_TDL_MASK	(0x1f << I2S_DMACR_TDL_SHIFT)
+
+/*
+ * INTCR
+ * interrupt control register
+ */
+#define I2S_INTCR_RFT_SHIFT	20
+#define I2S_INTCR_RFT(x)	((x - 1) << I2S_INTCR_RFT_SHIFT)
+#define I2S_INTCR_RXOIC		BIT(18)
+#define I2S_INTCR_RXOIE_SHIFT	17
+#define I2S_INTCR_RXOIE_DISABLE	(0 << I2S_INTCR_RXOIE_SHIFT)
+#define I2S_INTCR_RXOIE_ENABLE	(1 << I2S_INTCR_RXOIE_SHIFT)
+#define I2S_INTCR_RXFIE_SHIFT	16
+#define I2S_INTCR_RXFIE_DISABLE	(0 << I2S_INTCR_RXFIE_SHIFT)
+#define I2S_INTCR_RXFIE_ENABLE	(1 << I2S_INTCR_RXFIE_SHIFT)
+#define I2S_INTCR_TFT_SHIFT	4
+#define I2S_INTCR_TFT(x)	((x - 1) << I2S_INTCR_TFT_SHIFT)
+#define I2S_INTCR_TFT_MASK	(0x1f << I2S_INTCR_TFT_SHIFT)
+#define I2S_INTCR_TXUIC		BIT(2)
+#define I2S_INTCR_TXUIE_SHIFT	1
+#define I2S_INTCR_TXUIE_DISABLE	(0 << I2S_INTCR_TXUIE_SHIFT)
+#define I2S_INTCR_TXUIE_ENABLE	(1 << I2S_INTCR_TXUIE_SHIFT)
+
+/*
+ * INTSR
+ * interrupt status register
+ */
+#define I2S_INTSR_RXOI_SHIFT	17
+#define I2S_INTSR_RXOI_INA	(0 << I2S_INTSR_RXOI_SHIFT)
+#define I2S_INTSR_RXOI_ACT	(1 << I2S_INTSR_RXOI_SHIFT)
+#define I2S_INTSR_RXFI_SHIFT	16
+#define I2S_INTSR_RXFI_INA	(0 << I2S_INTSR_RXFI_SHIFT)
+#define I2S_INTSR_RXFI_ACT	(1 << I2S_INTSR_RXFI_SHIFT)
+#define I2S_INTSR_TXUI_SHIFT	1
+#define I2S_INTSR_TXUI_INA	(0 << I2S_INTSR_TXUI_SHIFT)
+#define I2S_INTSR_TXUI_ACT	(1 << I2S_INTSR_TXUI_SHIFT)
+#define I2S_INTSR_TXEI_SHIFT	0
+#define I2S_INTSR_TXEI_INA	(0 << I2S_INTSR_TXEI_SHIFT)
+#define I2S_INTSR_TXEI_ACT	(1 << I2S_INTSR_TXEI_SHIFT)
+
+/*
+ * XFER
+ * Transfer start register
+ */
+#define I2S_XFER_RXS_SHIFT	1
+#define I2S_XFER_RXS_STOP	(0 << I2S_XFER_RXS_SHIFT)
+#define I2S_XFER_RXS_START	(1 << I2S_XFER_RXS_SHIFT)
+#define I2S_XFER_RXS_MASK	(1 << I2S_XFER_RXS_SHIFT)
+#define I2S_XFER_TXS_SHIFT	0
+#define I2S_XFER_TXS_STOP	(0 << I2S_XFER_TXS_SHIFT)
+#define I2S_XFER_TXS_START	(1 << I2S_XFER_TXS_SHIFT)
+#define I2S_XFER_TXS_MASK	(1 << I2S_XFER_TXS_SHIFT)
+
+/*
+ * CLR
+ * clear SCLK domain logic register
+ */
+#define I2S_CLR_RXC	BIT(1)
+#define I2S_CLR_RXC_MASK	BIT(1)
+#define I2S_CLR_TXC	BIT(0)
+#define I2S_CLR_TXC_MASK	BIT(0)
+
+#endif
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 441f14b237..ed58b5d89c 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -41,6 +41,7 @@ enum uclass_id {
 	UCLASS_I2C_EEPROM,	/* I2C EEPROM device */
 	UCLASS_I2C_GENERIC,	/* Generic I2C device */
 	UCLASS_I2C_MUX,		/* I2C multiplexer */
+	UCLASS_I2S,		/* I2S bus */
 	UCLASS_IDE,		/* IDE device */
 	UCLASS_IRQ,		/* Interrupt controller */
 	UCLASS_KEYBOARD,	/* Keyboard input device */
diff --git a/include/sound.h b/include/sound.h
index 155e1b40e2..73c1daaf3e 100644
--- a/include/sound.h
+++ b/include/sound.h
@@ -53,4 +53,14 @@ int sound_init(const void *blob);
  */
 int sound_play(uint32_t msec, uint32_t frequency);
 
+struct snd_soc_dai_ops {
+	int (*hw_params)(struct udevice *dev, unsigned int samplerate,
+			 unsigned int fmt, unsigned int channels);
+	int (*startup)(struct udevice *dev);
+	int (*shutdown)(struct udevice *dev);
+	int (*transfer)(struct udevice *dev, unsigned int *data,
+			unsigned long data_size);
+	int (*set_sysclk)(struct udevice *dev, unsigned int freq);
+};
+
 #endif  /* __SOUND__H__ */

commit 95f2641240fb67e33a7d87e5cff4c083b997f195
Author: Sugar Zhang <sugar.zhang@rock-chips.com>
Date:   Fri Sep 21 16:09:31 2018 +0800

    clk: rockchip: px30: add support clock for SCLK_I2S1
    
    Change-Id: Iaaacd6fdabe2c702202ffe09dc95cd6d648597d6
    Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_px30.h b/arch/arm/include/asm/arch-rockchip/cru_px30.h
index ca4655b40d..6703603744 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_px30.h
@@ -314,6 +314,26 @@ enum {
 	UART2_DIVNP5_SHIFT	= 0,
 	UART2_DIVNP5_MASK	= 0x1f << UART2_DIVNP5_SHIFT,
 
+	/* CRU_CLK_SEL30_CON */
+	CLK_I2S1_DIV_CON_MASK	= 0x7f,
+	CLK_I2S1_PLL_SEL_MASK	= 0X1 << 8,
+	CLK_I2S1_PLL_SEL_GPLL	= 0X0 << 8,
+	CLK_I2S1_PLL_SEL_NPLL	= 0X1 << 8,
+	CLK_I2S1_SEL_MASK	= 0x3 << 10,
+	CLK_I2S1_SEL_I2S1	= 0x0 << 10,
+	CLK_I2S1_SEL_FRAC	= 0x1 << 10,
+	CLK_I2S1_SEL_MCLK_IN	= 0x2 << 10,
+	CLK_I2S1_SEL_OSC	= 0x3 << 10,
+	CLK_I2S1_OUT_SEL_MASK	= 0x1 << 15,
+	CLK_I2S1_OUT_SEL_I2S1	= 0x0 << 15,
+	CLK_I2S1_OUT_SEL_OSC	= 0x1 << 15,
+
+	/* CRU_CLK_SEL31_CON */
+	CLK_I2S1_FRAC_NUMERATOR_SHIFT	= 16,
+	CLK_I2S1_FRAC_NUMERATOR_MASK	= 0xffff << 16,
+	CLK_I2S1_FRAC_DENOMINATOR_SHIFT	= 0,
+	CLK_I2S1_FRAC_DENOMINATOR_MASK	= 0xffff,
+
 	/* CRU_CLK_SEL49_CON */
 	CLK_I2C_PLL_SEL_GPLL		= 0,
 	CLK_I2C_PLL_SEL_24M,
@@ -354,6 +374,11 @@ enum {
 	CLK_SARADC_DIV_CON_SHIFT	= 0,
 	CLK_SARADC_DIV_CON_MASK		= 0x7ff,
 
+	/* CRU_CLK_GATE10_CON */
+	CLK_I2S1_OUT_MCLK_PAD_MASK	= 0x1 << 9,
+	CLK_I2S1_OUT_MCLK_PAD_ENABLE	= 0x1 << 9,
+	CLK_I2S1_OUT_MCLK_PAD_DISABLE	= 0x0 << 9,
+
 	/* CRU_PMU_MODE */
 	GPLL_MODE_SHIFT			= 0,
 	GPLL_MODE_MASK			= 3 << GPLL_MODE_SHIFT,
diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index adbf431a68..ba249ae0da 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -367,6 +367,120 @@ static ulong px30_i2c_set_clk(struct px30_clk_priv *priv, ulong clk_id, uint hz)
 	return px30_i2c_get_clk(priv, clk_id);
 }
 
+/*
+ * calculate best rational approximation for a given fraction
+ * taking into account restricted register size, e.g. to find
+ * appropriate values for a pll with 5 bit denominator and
+ * 8 bit numerator register fields, trying to set up with a
+ * frequency ratio of 3.1415, one would say:
+ *
+ * rational_best_approximation(31415, 10000,
+ *		(1 << 8) - 1, (1 << 5) - 1, &n, &d);
+ *
+ * you may look at given_numerator as a fixed point number,
+ * with the fractional part size described in given_denominator.
+ *
+ * for theoretical background, see:
+ * http://en.wikipedia.org/wiki/Continued_fraction
+ */
+static void rational_best_approximation(
+	unsigned long given_numerator, unsigned long given_denominator,
+	unsigned long max_numerator, unsigned long max_denominator,
+	unsigned long *best_numerator, unsigned long *best_denominator)
+{
+	unsigned long n, d, n0, d0, n1, d1;
+
+	n = given_numerator;
+	d = given_denominator;
+	n0 = 0;
+	d1 = 0;
+	n1 = 1;
+	d0 = 1;
+	for (;;) {
+		unsigned long t, a;
+
+		if (n1 > max_numerator || d1 > max_denominator) {
+			n1 = n0;
+			d1 = d0;
+			break;
+		}
+		if (d == 0)
+			break;
+		t = d;
+		a = n / d;
+		d = n % d;
+		n = t;
+		t = n0 + a * n1;
+		n0 = n1;
+		n1 = t;
+		t = d0 + a * d1;
+		d0 = d1;
+		d1 = t;
+	}
+	*best_numerator = n1;
+	*best_denominator = d1;
+}
+
+static ulong px30_i2s_get_clk(struct px30_clk_priv *priv, ulong clk_id)
+{
+	u32 con, fracdiv, gate;
+	u32 clk_src = GPLL_HZ / 2;
+	unsigned long m, n;
+	struct px30_cru *cru = priv->cru;
+
+	switch (clk_id) {
+	case SCLK_I2S1:
+		con = readl(&cru->clksel_con[30]);
+		fracdiv = readl(&cru->clksel_con[31]);
+		gate = readl(&cru->clkgate_con[10]);
+		m = fracdiv & CLK_I2S1_FRAC_NUMERATOR_MASK;
+		m >>= CLK_I2S1_FRAC_NUMERATOR_SHIFT;
+		n = fracdiv & CLK_I2S1_FRAC_DENOMINATOR_MASK;
+		n >>= CLK_I2S1_FRAC_DENOMINATOR_SHIFT;
+		debug("con30: 0x%x, gate: 0x%x, frac: 0x%x\n",
+		      con, gate, fracdiv);
+		break;
+	default:
+		printf("do not support this i2s bus\n");
+		return -EINVAL;
+	}
+
+	return clk_src * n / m;
+}
+
+static ulong px30_i2s_set_clk(struct px30_clk_priv *priv, ulong clk_id, uint hz)
+{
+	u32 clk_src;
+	unsigned long m, n, val;
+	struct px30_cru *cru = priv->cru;
+
+	clk_src = GPLL_HZ / 2;
+	rational_best_approximation(hz, clk_src,
+				    GENMASK(16 - 1, 0),
+				    GENMASK(16 - 1, 0),
+				    &m, &n);
+	switch (clk_id) {
+	case SCLK_I2S1:
+		rk_clrsetreg(&cru->clksel_con[30],
+			     CLK_I2S1_PLL_SEL_MASK, CLK_I2S1_PLL_SEL_GPLL);
+		rk_clrsetreg(&cru->clksel_con[30],
+			     CLK_I2S1_DIV_CON_MASK, 0x1);
+		rk_clrsetreg(&cru->clksel_con[30],
+			     CLK_I2S1_SEL_MASK, CLK_I2S1_SEL_FRAC);
+		val = m << CLK_I2S1_FRAC_NUMERATOR_SHIFT | n;
+		writel(val, &cru->clksel_con[31]);
+		rk_clrsetreg(&cru->clkgate_con[10],
+			     CLK_I2S1_OUT_MCLK_PAD_MASK,
+			     CLK_I2S1_OUT_MCLK_PAD_ENABLE);
+		break;
+	default:
+		printf("do not support this i2s bus\n");
+		return -EINVAL;
+	}
+
+	return px30_i2s_get_clk(priv, clk_id);
+}
+
 static ulong px30_nandc_get_clk(struct px30_clk_priv *priv)
 {
 	struct px30_cru *cru = priv->cru;
@@ -939,6 +1053,9 @@ static ulong px30_clk_get_rate(struct clk *clk)
 	case SCLK_I2C3:
 		rate = px30_i2c_get_clk(priv, clk->id);
 		break;
+	case SCLK_I2S1:
+		rate = px30_i2s_get_clk(priv, clk->id);
+		break;
 	case SCLK_PWM0:
 	case SCLK_PWM1:
 		rate = px30_pwm_get_clk(priv, clk->id);
@@ -1004,6 +1121,9 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_I2C3:
 		ret = px30_i2c_set_clk(priv, clk->id, rate);
 		break;
+	case SCLK_I2S1:
+		ret = px30_i2s_set_clk(priv, clk->id, rate);
+		break;
 	case SCLK_PWM0:
 	case SCLK_PWM1:
 		ret = px30_pwm_set_clk(priv, clk->id, rate);

commit a2a3fc8f3af299acb3f5492ef5cef8cec860b4f6
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Fri Aug 3 11:41:39 2018 +0800

    pinctrl: rockchip: Add pinctrl support for rk1808
    
    Change-Id: Ia60accc1940ed5cb0fa04f017fa97e34dff480cb
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 9f83c15723..3590b01912 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -18,6 +18,7 @@
 enum rockchip_pinctrl_type {
 	PX30,
 	RV1108,
+	RK1808,
 	RK2928,
 	RK3066B,
 	RK3128,
@@ -616,6 +617,45 @@ static struct rockchip_mux_route_data px30_mux_route_data[] = {
 	},
 };
 
+static struct rockchip_mux_route_data rk1808_mux_route_data[] = {
+	{
+		/* i2c2m0_sda */
+		.bank_num = 3,
+		.pin = 12,
+		.func = 2,
+		.route_offset = 0x190,
+		.route_val = BIT(16 + 3),
+	}, {
+		/* i2c2m1_sda */
+		.bank_num = 1,
+		.pin = 13,
+		.func = 2,
+		.route_offset = 0x190,
+		.route_val = BIT(16 + 3) | BIT(3),
+	}, {
+		/* uart2_rxm0 */
+		.bank_num = 4,
+		.pin = 3,
+		.func = 2,
+		.route_offset = 0x190,
+		.route_val = BIT(16 + 14) | BIT(16 + 15),
+	}, {
+		/* uart2_rxm1 */
+		.bank_num = 2,
+		.pin = 25,
+		.func = 2,
+		.route_offset = 0x190,
+		.route_val = BIT(16 + 14) | BIT(14) | BIT(16 + 15),
+	}, {
+		/* uart2_rxm2 */
+		.bank_num = 3,
+		.pin = 4,
+		.func = 2,
+		.route_offset = 0x190,
+		.route_val = BIT(16 + 14) | BIT(16 + 15) | BIT(15),
+	},
+};
+
 static struct rockchip_mux_route_data rk3128_mux_route_data[] = {
 	{
 		/* spi-0 */
@@ -1338,6 +1378,84 @@ static int rv1108_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank,
 	return 0;
 }
 
+#define RK1808_PULL_PMU_OFFSET		0x10
+#define RK1808_PULL_GRF_OFFSET		0x80
+#define RK1808_PULL_PINS_PER_REG	8
+#define RK1808_PULL_BITS_PER_PIN	2
+#define RK1808_PULL_BANK_STRIDE		16
+
+static void rk1808_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
+					 int pin_num,
+					 struct regmap **regmap,
+					 int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	if (bank->bank_num == 0) {
+		*regmap = priv->regmap_pmu;
+		*reg = RK1808_PULL_PMU_OFFSET;
+	} else {
+		*reg = RK1808_PULL_GRF_OFFSET;
+		*regmap = priv->regmap_base;
+	}
+
+	*reg += ((pin_num / RK1808_PULL_PINS_PER_REG) * 4);
+	*bit = (pin_num % RK1808_PULL_PINS_PER_REG);
+	*bit *= RK1808_PULL_BITS_PER_PIN;
+}
+
+#define RK1808_DRV_PMU_OFFSET		0x20
+#define RK1808_DRV_GRF_OFFSET		0x140
+#define RK1808_DRV_BITS_PER_PIN		2
+#define RK1808_DRV_PINS_PER_REG		8
+#define RK1808_DRV_BANK_STRIDE		16
+
+static void rk1808_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
+					int pin_num,
+					struct regmap **regmap,
+					int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	if (bank->bank_num == 0) {
+		*regmap = priv->regmap_pmu;
+		*reg = RK1808_DRV_PMU_OFFSET;
+	} else {
+		*regmap = priv->regmap_base;
+		*reg = RK1808_DRV_GRF_OFFSET;
+	}
+
+	*reg += ((pin_num / RK1808_DRV_PINS_PER_REG) * 4);
+	*bit = pin_num % RK1808_DRV_PINS_PER_REG;
+	*bit *= RK1808_DRV_BITS_PER_PIN;
+}
+
+#define RK1808_SCHMITT_PMU_OFFSET		0x0040
+#define RK1808_SCHMITT_GRF_OFFSET		0x0100
+#define RK1808_SCHMITT_BANK_STRIDE		16
+#define RK1808_SCHMITT_PINS_PER_REG		8
+
+static int rk1808_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank,
+					   int pin_num,
+					   struct regmap **regmap,
+					   int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	if (bank->bank_num == 0) {
+		*regmap = priv->regmap_pmu;
+		*reg = RK1808_SCHMITT_PMU_OFFSET;
+	} else {
+		*regmap = priv->regmap_base;
+		*reg = RK1808_SCHMITT_GRF_OFFSET;
+		*reg += (bank->bank_num  - 1) * RK1808_SCHMITT_BANK_STRIDE;
+	}
+	*reg += ((pin_num / RK1808_SCHMITT_PINS_PER_REG) * 4);
+	*bit = pin_num % RK1808_SCHMITT_PINS_PER_REG;
+
+	return 0;
+}
+
 #define RK2928_PULL_OFFSET		0x118
 #define RK2928_PULL_PINS_PER_REG	16
 #define RK2928_PULL_BANK_STRIDE		8
@@ -1826,6 +1944,7 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank,
 		break;
 	case PX30:
 	case RV1108:
+	case RK1808:
 	case RK3188:
 	case RK3288:
 	case RK3308:
@@ -1925,6 +2044,7 @@ static bool rockchip_pinconf_pull_valid(struct rockchip_pin_ctrl *ctrl,
 		return pull ? false : true;
 	case PX30:
 	case RV1108:
+	case RK1808:
 	case RK3188:
 	case RK3288:
 	case RK3308:
@@ -2336,6 +2456,48 @@ static struct rockchip_pin_ctrl rv1108_pin_ctrl = {
 	.schmitt_calc_reg	= rv1108_calc_schmitt_reg_and_bit,
 };
 
+static struct rockchip_pin_bank rk1808_pin_banks[] = {
+	PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0",
+			     IOMUX_SOURCE_PMU,
+			     IOMUX_SOURCE_PMU,
+			     IOMUX_SOURCE_PMU,
+			     IOMUX_SOURCE_PMU),
+	PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1",
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT),
+	PIN_BANK_IOMUX_FLAGS(2, 32, "gpio2",
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT),
+	PIN_BANK_IOMUX_FLAGS(3, 32, "gpio3",
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT),
+	PIN_BANK_IOMUX_FLAGS(4, 32, "gpio4",
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT),
+};
+
+static struct rockchip_pin_ctrl rk1808_pin_ctrl = {
+	.pin_banks		= rk1808_pin_banks,
+	.nr_banks		= ARRAY_SIZE(rk1808_pin_banks),
+	.label			= "RK1808-GPIO",
+	.type			= RK1808,
+	.iomux_routes		= rk1808_mux_route_data,
+	.niomux_routes		= ARRAY_SIZE(rk1808_mux_route_data),
+	.grf_mux_offset		= 0x0,
+	.pmu_mux_offset		= 0x0,
+	.pull_calc_reg		= rk1808_calc_pull_reg_and_bit,
+	.drv_calc_reg		= rk1808_calc_drv_reg_and_bit,
+	.schmitt_calc_reg	= rk1808_calc_schmitt_reg_and_bit,
+};
+
 static struct rockchip_pin_bank rk2928_pin_banks[] = {
 	PIN_BANK(0, 32, "gpio0"),
 	PIN_BANK(1, 32, "gpio1"),
@@ -2671,6 +2833,8 @@ static const struct udevice_id rockchip_pinctrl_dt_match[] = {
 		.data = (ulong)&px30_pin_ctrl },
 	{ .compatible = "rockchip,rv1108-pinctrl",
 		.data = (ulong)&rv1108_pin_ctrl },
+	{ .compatible = "rockchip,rk1808-pinctrl",
+		.data = (ulong)&rk1808_pin_ctrl },
 	{ .compatible = "rockchip,rk2928-pinctrl",
 		.data = (ulong)&rk2928_pin_ctrl },
 	{ .compatible = "rockchip,rk3036-pinctrl",

commit 72c44abc767ab065bfe64a8a1de9fc9b21d0f804
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 25 11:46:39 2018 +0800

    rk3399: decrease 16KB from BSS section
    
    the 16KB size is used for SPL code, it fixes compile issue:
    
    section .bss VMA [00000000ff8e0000,00000000ff8e01bf] overlaps
    section .u_boot_list VMA [00000000ff8df450,00000000ff8e0bf7]
    
    Change-Id: I05b5b9c8b05825835d7d80f843c590d390abe482
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index 980703db0e..6f5b909762 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -24,8 +24,8 @@
 #define CONFIG_SPL_TEXT_BASE		0xff8c2000
 #define CONFIG_SPL_MAX_SIZE		0x30000 - 0x2000
 /*  BSS setup */
-#define CONFIG_SPL_BSS_START_ADDR       0xff8e0000
-#define CONFIG_SPL_BSS_MAX_SIZE         0x10000
+#define CONFIG_SPL_BSS_START_ADDR       0xff8e4000
+#define CONFIG_SPL_BSS_MAX_SIZE         0x10000 - 0x4000
 
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */
 

commit f561125910ee60b180129bf6ff11b3fa4a5cc65b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 25 11:27:52 2018 +0800

    configs: lion-rk3368: increase TPL size to 32KB
    
    it fixes TPL size overflow compile issue.
    
    Change-Id: I5c936d2c170f34bc820ecc4630d061d0c9af8705
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig
index 6c8eee760f..2185049082 100644
--- a/configs/lion-rk3368_defconfig
+++ b/configs/lion-rk3368_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_TPL_MAX_SIZE=32768
 CONFIG_ROCKCHIP_RK3368=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_TPL_LIBCOMMON_SUPPORT=y

commit 71e299d362bb8dd358c327e05fe8d73163dc13b0
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Wed Aug 29 10:43:01 2018 +0800

    rockchip: dts: rk1808: add dmc node
    
    Change-Id: I4c4b26ec8889ad44bb70ebcbe771682894052bc0
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/arch/arm/dts/rk1808.dtsi b/arch/arm/dts/rk1808.dtsi
index b56bb3bca3..ec59306083 100644
--- a/arch/arm/dts/rk1808.dtsi
+++ b/arch/arm/dts/rk1808.dtsi
@@ -117,6 +117,10 @@
 		};
 	};
 
+	dmc: dmc {
+		compatible = "rockchip,rk1808-dmc";
+	};
+
 	cru: clock-controller@ff350000 {
 		compatible = "rockchip,rk1808-cru";
 		reg = <0x0 0xff350000 0x0 0x5000>;

commit f1fc975dacf3d9cf751d82fdb6f9d48b37aa9c65
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Wed Aug 29 10:39:45 2018 +0800

    drivers: ram: rockchip: add rk1808 sdram support
    
    Change-Id: I8dc6eaaf6bb9460ed05d4bda1658fc859bb522af
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index 674a58cc77..dffed38f8a 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -6,6 +6,7 @@
 
 obj-$(CONFIG_ROCKCHIP_RK3368) = dmc-rk3368.o
 obj-$(CONFIG_ROCKCHIP_RV1108) = sdram_rv1108_pctl_phy.o sdram_rv1108.o
+obj-$(CONFIG_ROCKCHIP_RK1808) = sdram_rk1808.o
 obj-$(CONFIG_ROCKCHIP_RK3036) = sdram_rk3036.o
 obj-$(CONFIG_ROCKCHIP_RK3128) = sdram_rk3128.o
 obj-$(CONFIG_ROCKCHIP_RK3188) = sdram_rk3188.o
diff --git a/drivers/ram/rockchip/sdram_rk1808.c b/drivers/ram/rockchip/sdram_rk1808.c
new file mode 100644
index 0000000000..681a2901d4
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_rk1808.c
@@ -0,0 +1,59 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd.
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <ram.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/grf_rk1808.h>
+#include <asm/arch/sdram_common.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct dram_info {
+	struct ram_info info;
+	struct rk1808_pmugrf *pmugrf;
+};
+
+static int rk1808_dmc_probe(struct udevice *dev)
+{
+	struct dram_info *priv = dev_get_priv(dev);
+
+	priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
+	debug("%s: pmugrf=%p\n", __func__, priv->pmugrf);
+	priv->info.base = CONFIG_SYS_SDRAM_BASE;
+	priv->info.size =
+		rockchip_sdram_size((phys_addr_t)&priv->pmugrf->os_reg[2]);
+
+	return 0;
+}
+
+static int rk1808_dmc_get_info(struct udevice *dev, struct ram_info *info)
+{
+	struct dram_info *priv = dev_get_priv(dev);
+
+	*info = priv->info;
+
+	return 0;
+}
+
+static struct ram_ops rk1808_dmc_ops = {
+	.get_info = rk1808_dmc_get_info,
+};
+
+static const struct udevice_id rk1808_dmc_ids[] = {
+	{ .compatible = "rockchip,rk1808-dmc" },
+	{ }
+};
+
+U_BOOT_DRIVER(dmc_rk1808) = {
+	.name = "rockchip_rk1808_dmc",
+	.id = UCLASS_RAM,
+	.of_match = rk1808_dmc_ids,
+	.ops = &rk1808_dmc_ops,
+	.probe = rk1808_dmc_probe,
+	.priv_auto_alloc_size = sizeof(struct dram_info),
+};

commit a28d53bfbfd17e87a8ae72a9e544a5cf650b7bb1
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Thu Aug 30 16:10:17 2018 +0800

    rockchip: rk_atags: add memset/memcpy for TINY TPL
    
    For some TPL with TINY mode didn't define LIBGENERIC_SUPPORT,
    need to realize memset/memcpy for rk_atags whit TPL.
    
    Change-Id: I9c7a343836592aa03fcee910404fb2f1e37a4989
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rk_atags.h b/arch/arm/include/asm/arch-rockchip/rk_atags.h
index da24bedbd1..d07bf1b0a1 100644
--- a/arch/arm/include/asm/arch-rockchip/rk_atags.h
+++ b/arch/arm/include/asm/arch-rockchip/rk_atags.h
@@ -167,4 +167,11 @@ void atags_test(void);
 /* Atags stat */
 void atags_stat(void);
 
+#if CONFIG_IS_ENABLED(TINY_FRAMEWORK) &&		\
+	!CONFIG_IS_ENABLED(LIBGENERIC_SUPPORT) &&	\
+	defined(CONFIG_ARM64)
+void *memset(void *s, int c, size_t count);
+void *memcpy(void *dest, const void *src, size_t count);
+#endif
+
 #endif
diff --git a/arch/arm/mach-rockchip/rk_atags.c b/arch/arm/mach-rockchip/rk_atags.c
index b2b57cd857..58fbc654f4 100644
--- a/arch/arm/mach-rockchip/rk_atags.c
+++ b/arch/arm/mach-rockchip/rk_atags.c
@@ -6,12 +6,72 @@
 
 #include <common.h>
 #include <asm/arch/rk_atags.h>
+#if CONFIG_IS_ENABLED(TINY_FRAMEWORK)
+#include <debug_uart.h>
+#endif
 
 #define tag_next(t)	((struct tag *)((u32 *)(t) + (t)->hdr.size))
 #define tag_size(type)	((sizeof(struct tag_header) + sizeof(struct type)) >> 2)
 #define for_each_tag(t, base)		\
 	for (t = base; t->hdr.size; t = tag_next(t))
 
+#if CONFIG_IS_ENABLED(TINY_FRAMEWORK) &&		\
+	!CONFIG_IS_ENABLED(LIBGENERIC_SUPPORT) &&	\
+	defined(CONFIG_ARM64)
+/**
+ * memset - Fill a region of memory with the given value
+ * @s: Pointer to the start of the area.
+ * @c: The byte to fill the area with
+ * @count: The size of the area.
+ *
+ * Do not use memset() to access IO space, use memset_io() instead.
+ */
+void *memset(void *s, int c, size_t count)
+{
+	unsigned long *sl = (unsigned long *)s;
+	char *s8;
+
+	s8 = (char *)sl;
+	while (count--)
+		*s8++ = c;
+
+	return s;
+}
+
+/**
+ * memcpy - Copy one area of memory to another
+ * @dest: Where to copy to
+ * @src: Where to copy from
+ * @count: The size of the area.
+ *
+ * You should not use this function to access IO space, use memcpy_toio()
+ * or memcpy_fromio() instead.
+ */
+void *memcpy(void *dest, const void *src, size_t count)
+{
+	unsigned long *dl = (unsigned long *)dest, *sl = (unsigned long *)src;
+	char *d8, *s8;
+
+	if (src == dest)
+		return dest;
+
+	/* while all data is aligned (common case), copy a word at a time */
+	if ((((ulong)dest | (ulong)src) & (sizeof(*dl) - 1)) == 0) {
+		while (count >= sizeof(*dl)) {
+			*dl++ = *sl++;
+			count -= sizeof(*dl);
+		}
+	}
+	/* copy the reset one byte at a time */
+	d8 = (char *)dl;
+	s8 = (char *)sl;
+	while (count--)
+		*d8++ = *s8++;
+
+	return dest;
+}
+#endif
+
 static int inline bad_magic(u32 magic)
 {
 	return ((magic != ATAG_CORE) &&
@@ -44,7 +104,12 @@ int atags_set_tag(u32 magic, void *tagdata)
 		return -ENODATA;
 
 	if (bad_magic(magic)) {
+#if !CONFIG_IS_ENABLED(TINY_FRAMEWORK)
 		printf("%s: magic(%x) is not support\n", __func__, magic);
+#else
+		printascii("magic is not support\n");
+#endif
+
 		return -EINVAL;
 	}
 
@@ -70,8 +135,13 @@ int atags_set_tag(u32 magic, void *tagdata)
 			 * some unknown reason.
 			 */
 			if (bad_magic(t->hdr.magic)) {
+#if !CONFIG_IS_ENABLED(TINY_FRAMEWORK)
 				printf("%s: find unknown magic(%x)\n",
 				       __func__, t->hdr.magic);
+#else
+				printascii("find unknown magic\n");
+#endif
+
 				return -EINVAL;
 			}
 
@@ -101,8 +171,13 @@ int atags_set_tag(u32 magic, void *tagdata)
 	};
 
 	if (atags_size_overflow(t, size)) {
+#if !CONFIG_IS_ENABLED(TINY_FRAMEWORK)
 		printf("%s: failed! no memory to setup magic(%x), max_mem=0x%x\n",
 		       __func__, magic, ATAGS_SIZE);
+#else
+		printascii("no memory to setup magic\n");
+#endif
+
 		return -ENOMEM;
 	}
 
@@ -128,8 +203,12 @@ struct tag *atags_get_tag(u32 magic)
 
 	for_each_tag(t, (struct tag *)ATAGS_PHYS_BASE) {
 		if (bad_magic(t->hdr.magic)) {
+#if !CONFIG_IS_ENABLED(TINY_FRAMEWORK)
 			printf("%s: find unknown magic(%x)\n",
 			       __func__, t->hdr.magic);
+#else
+			printascii("find unknown magic\n");
+#endif
 			return NULL;
 		}
 

commit 58d85a144db34ea8fa73f05f77bf9618ec59e550
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Sep 20 11:00:19 2018 +0800

    armv8: dump SP content when system crash
    
    Change-Id: I8f1d068f10eddf467413fb459934b1cb85481bb0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/lib/interrupts_64.c b/arch/arm/lib/interrupts_64.c
index 0781034b03..d88a62232f 100644
--- a/arch/arm/lib/interrupts_64.c
+++ b/arch/arm/lib/interrupts_64.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <linux/compiler.h>
 #include <efi_loader.h>
+#include <iomem.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 #if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_IRQ)
@@ -205,6 +206,10 @@ void show_regs(struct pt_regs *regs)
 	for (i = 0; i < 29; i += 2)
 		printf("x%-2d: %016lx x%-2d: %016lx\n",
 		       i, regs->regs[i], i+1, regs->regs[i+1]);
+
+	printf("\n");
+	iomem_show("SP", regs->sp, 0x00, 0xfc);
+
 	printf("\n");
 
 #ifdef CONFIG_ROCKCHIP_CRASH_DUMP

commit 2897464340fff586087c2fd4f8e4568caf2e874f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Sep 20 10:37:42 2018 +0800

    rockchip: rk3036: adjust U-Boot text base and init sp
    
    - set text base to 2MB offset;
    - set init sp to 4MB offset;
    
    Change-Id: I3d1ad775b5d3de2af50276dd93c233220e692408
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index f136a5bb2b..065a517084 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -18,8 +18,8 @@
 
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_MEM32
-#define CONFIG_SYS_TEXT_BASE		0x61000000
-#define CONFIG_SYS_INIT_SP_ADDR		0x61100000
+#define CONFIG_SYS_TEXT_BASE		0x60200000
+#define CONFIG_SYS_INIT_SP_ADDR		0x60400000
 #define CONFIG_SYS_LOAD_ADDR		0x61800800
 #define CONFIG_SPL_TEXT_BASE		0x60000000
 

commit 895938f1d450c618bd07f99913c1e0780a1a5362
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Sep 20 10:37:26 2018 +0800

    rockchip: rk3188: adjust U-Boot text base and init sp
    
    - set text base to 2MB offset;
    - set init sp to 4MB offset;
    
    Change-Id: I6e2e164ea9f77a7955a935b1a9f6aee7dd248768
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h
index d93f9adcf4..4d52e59a4d 100644
--- a/include/configs/rk3188_common.h
+++ b/include/configs/rk3188_common.h
@@ -24,9 +24,9 @@
 /* Bootrom will load u-boot binary to 0x60000000 once return from SPL */
 #define CONFIG_SYS_TEXT_BASE		0x60000000
 #else
-#define CONFIG_SYS_TEXT_BASE		0x60100000
+#define CONFIG_SYS_TEXT_BASE		0x60200000
 #endif
-#define CONFIG_SYS_INIT_SP_ADDR		0x60100000
+#define CONFIG_SYS_INIT_SP_ADDR		0x60400000
 #define CONFIG_SYS_LOAD_ADDR		0x60800800
 
 #define CONFIG_ROCKCHIP_MAX_INIT_SIZE	(0x8000 - 0x800)

commit 50f3250a1d681def40d1e268a54cb27b52c791ad
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Sep 20 10:37:04 2018 +0800

    rockchip: rk322x: adjust U-Boot text base and init sp
    
    - set text base to 2MB offset;
    - set init sp to 4MB offset;
    
    Change-Id: I4a482d854bc00e1592f5877cf7f3217b8752c81c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h
index 1230d4331a..f30ed6e753 100644
--- a/include/configs/rk322x_common.h
+++ b/include/configs/rk322x_common.h
@@ -16,8 +16,8 @@
 
 
 #define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SYS_TEXT_BASE		0x61000000
-#define CONFIG_SYS_INIT_SP_ADDR		0x61100000
+#define CONFIG_SYS_TEXT_BASE		0x60200000
+#define CONFIG_SYS_INIT_SP_ADDR		0x60400000
 #define CONFIG_SYS_LOAD_ADDR		0x61800800
 #define CONFIG_SPL_TEXT_BASE		0x60000000
 

commit e36a44135631ceb5a3e1c46ef2260b091610bde5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Sep 20 10:34:57 2018 +0800

    rockchip: rk3288: adjust U-Boot text base and init sp
    
    - set text base to 2MB offset;
    - set init sp to 4MB offset;
    
    Change-Id: I9f250c3561cbe8c0b4ee1c9da625766f7306c2f2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index 91611c1cd4..0685002b05 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -24,9 +24,9 @@
 /* Bootrom will load u-boot binary to 0x0 once return from SPL */
 #define CONFIG_SYS_TEXT_BASE		0x00000000
 #else
-#define CONFIG_SYS_TEXT_BASE		0x00100000
+#define CONFIG_SYS_TEXT_BASE		0x00200000
 #endif
-#define CONFIG_SYS_INIT_SP_ADDR		0x00100000
+#define CONFIG_SYS_INIT_SP_ADDR		0x00400000
 #define CONFIG_SYS_LOAD_ADDR		0x00800800
 #define CONFIG_SPL_STACK		0xff718000
 

commit 3776a9bd6fd2faeb1cae6a2696a2d12c031353b1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Sep 13 09:51:45 2018 +0800

    make.sh: add rk399pro-npu build
    
    Change-Id: I96c8dd6dc07c65549860631ecd70416f8f2f492e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 319822127b..6e6866c509 100755
--- a/make.sh
+++ b/make.sh
@@ -15,6 +15,7 @@ SUPPORT_LIST=`ls configs/*[r,p][x,v,k][0-9][0-9]*_defconfig`
 #
 # Format:           target board               label         loader      trust
 RKCHIP_INI_DESC=("CONFIG_TARGET_GVA_RK3229       NA          RK322XAT     NA"
+                 "CONFIG_COPROCESSOR_RK1808  RK3399PRO-NPU  RK3399PRONPU  RK3399PRONPU"
 # to be add...
                 )
 

commit b9578fc8d61dfbf2eddb38b79381351456391e13
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 11 20:18:36 2018 +0800

    configs: add rk3399pro-npu_defconfig
    
    Change-Id: I547f744fcbf2a89584fa487bcd76101f916e40a6
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3399pro-npu_defconfig b/configs/rk3399pro-npu_defconfig
new file mode 100644
index 0000000000..eea5cceccf
--- /dev/null
+++ b/configs/rk3399pro-npu_defconfig
@@ -0,0 +1,71 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_ROCKCHIP_RK1808=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_COPROCESSOR_RK1808=y
+CONFIG_TARGET_EVB_RK1808=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3399pro-npu-evb"
+CONFIG_DEBUG_UART=y
+# CONFIG_DISTRO_DEFAULTS is not set
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_BOOTDELAY=0
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_HUSH_PARSER=y
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_CONSOLE is not set
+# CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_EXPORTENV is not set
+# CONFIG_CMD_IMPORTENV is not set
+# CONFIG_CMD_SAVEENV is not set
+# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_CRC32 is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_RANDOM_UUID=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_PART=y
+# CONFIG_CMD_ITEST is not set
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_NET is not set
+# CONFIG_CMD_NFS is not set
+# CONFIG_CMD_MISC is not set
+CONFIG_RKPARM_PARTITION=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+# CONFIG_ADC is not set
+# CONFIG_SARADC_ROCKCHIP is not set
+CONFIG_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+# CONFIG_MMC is not set
+CONFIG_PHY=y
+CONFIG_PINCTRL=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_RAM=y
+CONFIG_DM_RAMDISK=y
+CONFIG_RAMDISK_READONLY=y
+CONFIG_DM_RESET=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0xff550000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_SYSRESET=y
+# CONFIG_SYS_WHITE_ON_BLACK is not set
+CONFIG_REGEX=y
+CONFIG_SHA1=y
+CONFIG_SHA256=y
+# CONFIG_EFI_LOADER is not set

commit 2aa1fe77050121db490853510664f2980ee4f72c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Sep 13 09:44:08 2018 +0800

    rockchip: kconfig: add CONFIG_COPROCESSOR_RK1808
    
    This indicates the RK1808 is working as a coprocessor for
    another more powerful SoC.
    
    Change-Id: Id843495de2acfa03508b9a378e9a48eedc3a7c62
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 9d237d4bd6..02e0269e94 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -288,6 +288,16 @@ config ROCKCHIP_RK1808
 	  The Rockchip RK1808 is a ARM-based Soc which embedded with dual
 	  Cortex-A35.
 
+if ROCKCHIP_RK1808
+
+config COPROCESSOR_RK1808
+	bool "RK1808 coprocessor"
+	help
+	  This indicates the RK1808 is working as a coprocessor for another
+	  more powerful SoC.
+
+endif
+
 config ROCKCHIP_RV1108
 	bool "Support Rockchip RV1108"
 	select CPU_V7
@@ -509,7 +519,6 @@ config ROCKCHIP_PRELOADER_ATAGS
 	  tos, U-Boot, etc. It delivers boot and configure information, shared with pre-loaders
 	  and finally ends with U-Boot.
 
-
 config GICV2
 	bool "ARM GICv2"
 

commit db58bbb1c1563ea1ea37c6148016bda2e966cb1a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Sep 13 10:13:49 2018 +0800

    arm: dts: add rk3399pro-npu-evb.dts
    
    Change-Id: Ib5a74849fcc0939e1be7ca481a58bfd1ac2e7c94
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3399pro-npu-evb.dts b/arch/arm/dts/rk3399pro-npu-evb.dts
new file mode 100644
index 0000000000..939baf5842
--- /dev/null
+++ b/arch/arm/dts/rk3399pro-npu-evb.dts
@@ -0,0 +1,58 @@
+// SPDX-License-Identifier:     GPL-2.0+
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ */
+
+/dts-v1/;
+#include "rk1808.dtsi"
+#include "rk1808-u-boot.dtsi"
+#include <dt-bindings/input/input.h>
+#include <linux/media-bus-format.h>
+
+/ {
+	model = "Rockchip RK3399PRO NPU";
+	compatible = "rockchip,rk3399pro-npu";
+
+	chosen {
+		stdout-path = &uart2;
+	};
+
+	ramdisk-readonly {
+		u-boot,dm-pre-reloc;
+		compatible = "ramdisk-readonly";
+		status = "okay";
+	};
+
+	xin24m: xin24m {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <24000000>;
+		clock-output-names = "xin24m";
+	};
+};
+
+&emmc {
+	fifo-mode;
+	bus-width = <8>;
+	cap-mmc-highspeed;
+	supports-emmc;
+	disable-wp;
+	non-removable;
+	num-slots = <1>;
+
+	status = "okay";
+};
+
+&sdmmc {
+	supports-sd;
+	status = "disabled";
+};
+
+&uart2 {
+	clock-frequency = <24000000>;
+	clocks = <&xin24m>, <&xin24m>;
+	clock-names = "baudclk", "apb_pclk";
+
+	status = "okay";
+};

commit bf6219b03bb26f2eb7e5e43a03782b6b0f4ec6f4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Sep 12 17:45:04 2018 +0800

    rockchip: rk1808: set ramdisk as devtype when DM_RAMDISK enabled
    
    Change-Id: I6162c5bf2db963101215c3f7e2f2cc190663d779
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk1808_common.h b/include/configs/rk1808_common.h
index 6a7c2ea020..5e41b20ef0 100644
--- a/include/configs/rk1808_common.h
+++ b/include/configs/rk1808_common.h
@@ -43,6 +43,14 @@
 	"ramdisk_addr_r=0x0a200000\0"
 
 #include <config_distro_bootcmd.h>
+
+#ifdef CONFIG_DM_RAMDISK
+#undef RKIMG_DET_BOOTDEV
+#define RKIMG_DET_BOOTDEV \
+	"rkimg_bootdev=" \
+	"setenv devtype ramdisk; setenv devnum 0; \0"
+#endif
+
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	ENV_MEM_LAYOUT_SETTINGS \
 	"partitions=" PARTS_DEFAULT \

commit 225168aa839ae76612d5839a76575180a184b45e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 11 21:00:08 2018 +0800

    rockchip: rk1808: set CONFIG_SYS_TEXT_BASE to 6MB offset
    
    Memory layout:
        0 ~ 2M: ATF;
        2 ~ 6M: OP-TEE;
        6 ~ 7M: U-Boot;
    
    Change-Id: I1eb7517f62151041f11ba80a84fc12649654aa69
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk1808_common.h b/include/configs/rk1808_common.h
index cb92d5b727..6a7c2ea020 100644
--- a/include/configs/rk1808_common.h
+++ b/include/configs/rk1808_common.h
@@ -12,8 +12,8 @@
 #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
-#define CONFIG_SYS_TEXT_BASE		0x00200000
-#define CONFIG_SYS_INIT_SP_ADDR		0x00400000
+#define CONFIG_SYS_TEXT_BASE		0x00600000
+#define CONFIG_SYS_INIT_SP_ADDR		0x00800000
 #define CONFIG_SYS_LOAD_ADDR		0x00800800
 #define CONFIG_SYS_BOOTM_LEN		(64 << 20)	/* 64M */
 #define COUNTER_FREQUENCY		24000000

commit b15a0aa284a9169b52110105e45a6fc5c0d634f0
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 11 20:06:57 2018 +0800

    rockchip: resource: add CONFIG_ADC for rockchip_read_dtb_by_adc()
    
    Change-Id: I77ccb8b7a18995e913e69fea2eba955ef0ae848c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 027d563a30..bb93c758c1 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -384,6 +384,7 @@ int rockchip_read_resource_file(void *buf, const char *name,
 #define MAX_ADC_CH_NR		10
 #define MAX_GPIO_NR		10
 
+#ifdef CONFIG_ADC
 /*
  * How to make it works ?
  *
@@ -472,6 +473,12 @@ static int rockchip_read_dtb_by_adc(const char *file_name)
 
 	return found ? 0 : -ENOENT;
 }
+#else
+static int rockchip_read_dtb_by_adc(const char *file_name)
+{
+	return  -ENOENT;
+}
+#endif
 
 static int gpio_parse_base_address(fdt_addr_t *gpio_base_addr)
 {

commit da734065442b6274900b88a9a901dfffb31a2d89
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 11 20:36:42 2018 +0800

    arm: rockchip: select DM_MMC if !DM_RAMDISK
    
    Change-Id: I1bf3af449d9bf9551de06763d10dba0c0910fdb7
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index a17879ddb6..895346ab40 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1122,7 +1122,7 @@ config ARCH_ROCKCHIP
 	select SPL_SYS_MALLOC_SIMPLE if SPL
 	select DM_GPIO
 	select DM_I2C
-	select DM_MMC
+	select DM_MMC if !DM_RAMDISK
 	select DM_SERIAL
 	select DM_SPI
 	select DM_SPI_FLASH

commit 98ff9f07f82f3210800a927d73e33c7ec1da6c97
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Sep 5 09:45:39 2018 +0800

    rockchip: add IF_TYPE_RAMDISK support
    
    Change-Id: I505606516bf186d8e869702c77f563d5cf0d6f37
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index b56edebf13..9e3f5cfed5 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -28,6 +28,9 @@
 #ifdef CONFIG_ROCKCHIP_DEBUGGER
 #include <rockchip_debugger.h>
 #endif
+#ifdef CONFIG_DM_RAMDISK
+#include <ramdisk.h>
+#endif
 #include <mmc.h>
 #include <of_live.h>
 #include <dm/root.h>
@@ -175,9 +178,15 @@ int init_kernel_dtb(void)
 	int ret = 0;
 	ulong fdt_addr = 0;
 
+#ifdef CONFIG_DM_MMC
 	ret = mmc_initialize(gd->bd);
 	if (ret)
-		debug("%s mmc initialized fail\n", __func__);
+		debug("%s: mmc initialized failed, ret=%d\n", __func__ ,ret);
+#else
+	ret = bramdisk_initialize();
+	if (ret)
+		debug("%s: bramdisk initialized failed, ret=%d\n", __func__, ret);
+#endif
 
 	fdt_addr = env_get_ulong("fdt_addr_r", 16, 0);
 	if (!fdt_addr) {
diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 37b58c4f6c..c5f421480b 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -177,6 +177,9 @@ int get_bootdev_type(void)
 	} else if (!strcmp(devtype, "spinor")) {
 		type = IF_TYPE_SPINOR;
 		boot_media = "nor";
+	} else if (!strcmp(devtype, "ramdisk")) {
+		type = IF_TYPE_RAMDISK;
+		boot_media = "ramdisk";
 	} else {
 		/* Add new to support */
 	}

commit a3fec70d49c3effc5e206c450e3d0ac20d8a3ebc
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Sep 5 09:38:13 2018 +0800

    dm: blk: add ramdisk uclass support
    
    - Use ram as a disk which appears as block devices.
    - Provide a read only ramdisk driver.
    
    Change-Id: Ie6dc1a036c8a2841cacd0d467599c11b74b4ad77
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
index ed7392ecd0..b60a856daa 100644
--- a/drivers/block/blk-uclass.c
+++ b/drivers/block/blk-uclass.c
@@ -27,6 +27,8 @@ static const char *if_typename_str[IF_TYPE_COUNT] = {
 	[IF_TYPE_RKNAND]	= "rknand",
 	[IF_TYPE_SPINAND]	= "spinand",
 	[IF_TYPE_SPINOR]	= "spinor",
+	[IF_TYPE_RAMDISK]	= "ramdisk",
+
 };
 
 static enum uclass_id if_type_uclass_id[IF_TYPE_COUNT] = {
@@ -43,6 +45,7 @@ static enum uclass_id if_type_uclass_id[IF_TYPE_COUNT] = {
 	[IF_TYPE_RKNAND]	= UCLASS_RKNAND,
 	[IF_TYPE_SPINAND]	= UCLASS_SPI_FLASH,
 	[IF_TYPE_SPINOR]	= UCLASS_SPI_FLASH,
+	[IF_TYPE_RAMDISK]	= UCLASS_RAMDISK,
 	[IF_TYPE_SYSTEMACE]	= UCLASS_INVALID,
 };
 
diff --git a/drivers/ram/Kconfig b/drivers/ram/Kconfig
index c3273ab7d9..d26c590d9f 100644
--- a/drivers/ram/Kconfig
+++ b/drivers/ram/Kconfig
@@ -33,3 +33,16 @@ config STM32_SDRAM
 	  STM32F7 family devices support flexible memory controller(FMC) to
 	  support external memories like sdram, psram & nand.
 	  This driver is for the sdram memory interface with the FMC.
+
+config DM_RAMDISK
+        bool "Enable Driver Model for RAMDISK drivers"
+        depends on DM
+        help
+          This enables the Ramdisk uclass support. These appear as block devices
+          in U-Boot.
+
+config RAMDISK_READONLY
+        bool "Enable read only ramdisk support"
+        depends on DM_RAMDISK
+        help
+          This enables the read only ramdisk support.
diff --git a/drivers/ram/Makefile b/drivers/ram/Makefile
index 8d102f9c1d..9d6abb0cfa 100644
--- a/drivers/ram/Makefile
+++ b/drivers/ram/Makefile
@@ -10,3 +10,5 @@ obj-$(CONFIG_STM32_SDRAM) += stm32_sdram.o
 obj-$(CONFIG_ARCH_BMIPS) += bmips_ram.o
 
 obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
+obj-$(CONFIG_DM_RAMDISK) += ramdisk-uclass.o
+obj-$(CONFIG_RAMDISK_READONLY) += ramdisk_readonly.o
diff --git a/drivers/ram/ramdisk-uclass.c b/drivers/ram/ramdisk-uclass.c
new file mode 100644
index 0000000000..edb1b7bdfd
--- /dev/null
+++ b/drivers/ram/ramdisk-uclass.c
@@ -0,0 +1,85 @@
+// SPDX-License-Identifier:     GPL-2.0+
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/device-internal.h>
+#include <dm/lists.h>
+#include <dm/root.h>
+#include <ramdisk.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int bramdisk_initialize(void)
+{
+	struct udevice *dev;
+
+	return uclass_get_device(UCLASS_BLK, 0, &dev);
+}
+
+static ulong ramdisk_bread(struct udevice *dev, lbaint_t start,
+			   lbaint_t blkcnt, void *dst)
+{
+	const struct ramdisk_ops *ops = dev_get_driver_ops(dev->parent);
+	struct blk_desc *desc = dev_get_uclass_platdata(dev);
+
+	if (!blkcnt)
+		return 0;
+
+	if (!ops->read)
+		return -ENOSYS;
+
+	return ops->read(desc, start, blkcnt, dst);
+}
+
+static ulong ramdisk_bwrite(struct udevice *dev, lbaint_t start,
+			    lbaint_t blkcnt, const void *src)
+{
+	const struct ramdisk_ops *ops = dev_get_driver_ops(dev->parent);
+	struct blk_desc *desc = dev_get_uclass_platdata(dev);
+
+	if (!blkcnt)
+		return 0;
+
+	if (!ops->write)
+		return -ENOSYS;
+
+	return ops->write(desc, start, blkcnt, src);
+}
+
+static ulong ramdisk_berase(struct udevice *dev,
+			    lbaint_t start, lbaint_t blkcnt)
+{
+	const struct ramdisk_ops *ops = dev_get_driver_ops(dev->parent);
+	struct blk_desc *desc = dev_get_uclass_platdata(dev);
+
+	if (!blkcnt)
+		return 0;
+
+	if (!ops->erase)
+		return -ENOSYS;
+
+	return ops->erase(desc, start, blkcnt);
+}
+
+static const struct blk_ops ramdisk_blk_ops = {
+	.read	= ramdisk_bread,
+#ifndef CONFIG_SPL_BUILD
+	.write	= ramdisk_bwrite,
+	.erase	= ramdisk_berase,
+#endif
+};
+
+U_BOOT_DRIVER(ramdisk_blk) = {
+	.name		= "ramdisk_blk",
+	.id		= UCLASS_BLK,
+	.ops		= &ramdisk_blk_ops,
+};
+
+UCLASS_DRIVER(ramdisk) = {
+	.id		= UCLASS_RAMDISK,
+	.name		= "ramdisk",
+	.flags		= DM_UC_FLAG_SEQ_ALIAS,
+};
diff --git a/drivers/ram/ramdisk_readonly.c b/drivers/ram/ramdisk_readonly.c
new file mode 100644
index 0000000000..7f2b3b8c7a
--- /dev/null
+++ b/drivers/ram/ramdisk_readonly.c
@@ -0,0 +1,61 @@
+// SPDX-License-Identifier:     GPL-2.0+
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/device-internal.h>
+#include <dm/lists.h>
+#include <dm/root.h>
+#include <ramdisk.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static ulong ramdisk_readonly_bread(struct blk_desc *desc, lbaint_t start,
+				    lbaint_t blkcnt, void *dst)
+{
+	unsigned long b_size, b_start;
+
+	/* Byte */
+	b_start = start * desc->blksz;
+	b_size = blkcnt * desc->blksz;
+	memcpy((char *)dst, (char *)b_start, b_size);
+
+	debug("%s: b_start=0x%lx, b_size=0x%lx. dst=%p\n",
+	      __func__, b_start, b_size, dst);
+
+	return blkcnt;
+}
+
+static int ramdisk_readonly_bind(struct udevice *dev)
+{
+	struct udevice *bdev;
+	int ret;
+
+	ret = blk_create_devicef(dev, "ramdisk_blk", "blk",
+				 IF_TYPE_RAMDISK, 0, 512, 0, &bdev);
+	if (ret) {
+		debug("Can't create block device\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+static const struct ramdisk_ops ramdisk_readonly_ops = {
+	.read = ramdisk_readonly_bread,
+};
+
+static const struct udevice_id ramdisk_readonly_ids[] = {
+	{ .compatible = "ramdisk-readonly" },
+	{ }
+};
+
+U_BOOT_DRIVER(ramdisk_readonly) = {
+	.name		= "ramdisk-readonly",
+	.id		= UCLASS_RAMDISK,
+	.ops		= &ramdisk_readonly_ops,
+	.of_match	= ramdisk_readonly_ids,
+	.bind		= ramdisk_readonly_bind,
+};
diff --git a/include/blk.h b/include/blk.h
index d8e3825454..4eb79ed748 100644
--- a/include/blk.h
+++ b/include/blk.h
@@ -37,6 +37,7 @@ enum if_type {
 	IF_TYPE_RKNAND,
 	IF_TYPE_SPINAND,
 	IF_TYPE_SPINOR,
+	IF_TYPE_RAMDISK,
 
 	IF_TYPE_COUNT,			/* Number of interface types */
 };
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index e74fcdd38a..441f14b237 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -71,6 +71,7 @@ enum uclass_id {
 	UCLASS_REMOTEPROC,	/* Remote Processor device */
 	UCLASS_RESET,		/* Reset controller device */
 	UCLASS_RKNAND,		/* Rockchip nand device with ftl */
+	UCLASS_RAMDISK,		/* Virtual ram disk */
 	UCLASS_RTC,		/* Real time clock device */
 	UCLASS_SCSI,		/* SCSI device */
 	UCLASS_SERIAL,		/* Serial UART */
diff --git a/include/ramdisk.h b/include/ramdisk.h
new file mode 100644
index 0000000000..73432eaef2
--- /dev/null
+++ b/include/ramdisk.h
@@ -0,0 +1,53 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef __RAMDISK_H__
+#define __RAMDISK_H__
+
+struct ramdisk_ops {
+	/*
+	 * read() - read from a block device
+	 *
+	 * @desc:	Block descriptor
+	 * @start:	Start block number to read
+	 * @blkcnt:	Number of blocks to read
+	 * @buffer:	Destination buffer for data read
+	 *
+	 * @return blkcnt is OK, otherwise is error.
+	 */
+	ulong (*read)(struct blk_desc *desc,
+		      lbaint_t start, lbaint_t blkcnt, void *buffer);
+
+	/*
+	 * write() - write to a block device
+	 *
+	 * @desc:	Block descriptor
+	 * @start:	Start block number to write
+	 * @blkcnt:	Number of blocks to write
+	 * @buffer:	Source buffer for data to write
+	 *
+	 * @return blkcnt is OK, otherwise is error.
+	 */
+
+	ulong (*write)(struct blk_desc *desc,
+		       lbaint_t start, lbaint_t blkcnt, const void *buffer);
+	/*
+	 * erase() - erase a section of a block device
+	 *
+	 * @desc:	Block descriptor
+	 * @start:	Start block number to erase
+	 * @blkcnt:	Number of blocks to erase
+	 *
+	 * @return blkcnt is OK, otherwise is error.
+	 */
+	ulong (*erase)(struct blk_desc *desc, lbaint_t start, lbaint_t blkcnt);
+};
+
+/*
+ * bramdisk_initialize() - do blk ramdisk initialize
+ */
+int bramdisk_initialize(void);
+
+#endif /* __RAMDISK_H__ */

commit c7e2486eb2d7aeb9fb9f685355da986a771efdcf
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Sep 5 09:28:51 2018 +0800

    disk: rkparam: support get partition info from atags
    
    - for some platform without storage, pre-loader passes partition info by atags.
    - search order: mmc/nand -> atags
    
    Change-Id: Ie2699e217999e4772168c96de3b16c084241891e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/disk/part_rkparm.c b/disk/part_rkparm.c
index 1d4a7d74fd..156608cf8b 100644
--- a/disk/part_rkparm.c
+++ b/disk/part_rkparm.c
@@ -6,6 +6,9 @@
 
 #include <common.h>
 #include <malloc.h>
+#ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
+#include <asm/arch/rk_atags.h>
+#endif
 
 #ifdef HAVE_BLOCK_DEVICE
 #define RK_PARAM_OFFSET			0x2000
@@ -27,6 +30,13 @@ struct rkparm_part {
 
 
 static LIST_HEAD(parts_head);
+
+/*
+ * What's this?
+ *
+ * There maybe two different storage media need to use this partition driver,
+ * e.g. rkand with SD card. So we need a flag info to recognize it.
+ */
 static int dev_num = -1;
 
 static int rkparm_param_parse(char *param, struct list_head *parts_head,
@@ -40,7 +50,7 @@ static int rkparm_param_parse(char *param, struct list_head *parts_head,
 	unsigned long size, start;
 
 	if (!cmdline) {
-		debug("RKPARM: Invalid parameter part table\n");
+		debug("RKPARM: Invalid parameter part table from storage\n");
 		return -EINVAL;
 	}
 
@@ -96,8 +106,8 @@ static int rkparm_param_parse(char *param, struct list_head *parts_head,
 	return 0;
 }
 
-static int rkparm_init_param(struct blk_desc *dev_desc,
-				struct list_head *parts_head)
+static int rkparm_init_param_from_storage(struct blk_desc *dev_desc,
+					  struct list_head *parts_head)
 {
 	struct rkparm_param *param;
 	int offset = 0;
@@ -119,7 +129,91 @@ static int rkparm_init_param(struct blk_desc *dev_desc,
 	}
 
 	return rkparm_param_parse(param->params, parts_head, dev_desc);
+}
+
+#if defined(CONFIG_ROCKCHIP_PRELOADER_ATAGS) && defined(CONFIG_DM_RAMDISK)
+static int rkparm_init_param_from_atags(struct blk_desc *dev_desc,
+					struct list_head *parts_head)
+{
+	struct rkparm_part *part;
+	struct tag *t;
+	u64 start, size;
+	int i, len;
+
+	if (!atags_is_available()) {
+		debug("%s: can't find ATAGS\n", __func__);
+		return -ENODATA;
+	}
+
+	t = atags_get_tag(ATAG_RAM_PARTITION);
+	if (!t) {
+		debug("%s: can't find ATAGS ramdisk partition\n", __func__);
+		return -ENODATA;
+	}
+
+	INIT_LIST_HEAD(parts_head);
+
+	for (i = 0; i < t->u.ram_part.count; i++) {
+		part = malloc(sizeof(*part));
+		if (!part) {
+			printf("%s: out of memory\n", __func__);
+			break;
+		}
+
+		len = strlen(t->u.ram_part.part[i].name) + 1;
+		memcpy((char *)&part->name,
+		       (char *)&t->u.ram_part.part[i].name, len);
+
+		start = t->u.ram_part.part[i].start;
+		size = t->u.ram_part.part[i].size;
+
+		if (!IS_ALIGNED(start, dev_desc->blksz)) {
+			printf("%s: '%s' addr(0x%llx) is not %ld byte aligned\n",
+			       __func__, part->name, start, dev_desc->blksz);
+			return -EINVAL;
+		} else if (!IS_ALIGNED(size, dev_desc->blksz)) {
+			printf("%s: '%s' size(0x%llx) is not %ld byte aligned\n",
+			       __func__, part->name, size, dev_desc->blksz);
+			return -EINVAL;
+		}
 
+		/* Convert bytes to blksz */
+		part->start = start / dev_desc->blksz;
+		part->size = size / dev_desc->blksz;
+		list_add_tail(&part->node, parts_head);
+
+		debug("%s: name=%s, start=0x%lx, size=0x%lx, blksz=0x%lx\n",
+		      __func__, part->name, part->start,
+		      part->size, dev_desc->blksz);
+	}
+
+	dev_num = ((dev_desc->if_type << 8) + dev_desc->devnum);
+
+	return 0;
+}
+#endif
+
+static int rkparm_init_param(struct blk_desc *dev_desc,
+			     struct list_head *parts_head)
+{
+	int ret;
+
+	ret = rkparm_init_param_from_storage(dev_desc, parts_head);
+	if (ret) {
+		debug("%s: failed to init param from storage\n", __func__);
+#if defined(CONFIG_ROCKCHIP_PRELOADER_ATAGS) && defined(CONFIG_DM_RAMDISK)
+		ret = rkparm_init_param_from_atags(dev_desc, parts_head);
+		if (ret) {
+			debug("%s: failed to init param from ram\n", __func__);
+			return ret;
+		}
+#endif
+	}
+
+	if (ret)
+		printf("RKPARM: Invalid parameter part table\n");
+
+	return ret;
 }
 
 static void part_print_rkparm(struct blk_desc *dev_desc)
@@ -145,7 +239,6 @@ static void part_print_rkparm(struct blk_desc *dev_desc)
 		       p->start, p->size, p->name);
 	}
 
-
 	return;
 }
 

commit 7e1a37f59e0266d3b62f4b32d9f8f2881e01c720
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 11 21:57:28 2018 +0800

    rockchip: atags: add atags_stat()
    
    Change-Id: I3ab086747cb9232118fd4e4f131648c242574309
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rk_atags.h b/arch/arm/include/asm/arch-rockchip/rk_atags.h
index aaa0500b0f..da24bedbd1 100644
--- a/arch/arm/include/asm/arch-rockchip/rk_atags.h
+++ b/arch/arm/include/asm/arch-rockchip/rk_atags.h
@@ -164,4 +164,7 @@ void atags_print_all_tags(void);
 /* An atags example test */
 void atags_test(void);
 
+/* Atags stat */
+void atags_stat(void);
+
 #endif
diff --git a/arch/arm/mach-rockchip/rk_atags.c b/arch/arm/mach-rockchip/rk_atags.c
index e02048656a..b2b57cd857 100644
--- a/arch/arm/mach-rockchip/rk_atags.c
+++ b/arch/arm/mach-rockchip/rk_atags.c
@@ -147,6 +147,31 @@ void atags_destroy(void)
 
 #if (defined(CONFIG_DEBUG_ATAGS) || defined(DEBUG)) && \
     !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
+void atags_stat(void)
+{
+	u32 in_use = 0, in_available = 0;
+	u32 start = ATAGS_PHYS_BASE, end = ATAGS_PHYS_BASE + ATAGS_SIZE;
+	struct tag *t;
+
+	for_each_tag(t, (struct tag *)ATAGS_PHYS_BASE) {
+		if (bad_magic(t->hdr.magic)) {
+			printf("%s: find unknown magic(%x)\n",
+			       __func__, t->hdr.magic);
+			return;
+		}
+
+		in_use += (t->hdr.size << 2);
+	}
+
+	in_available = ATAGS_SIZE - in_use;
+
+	printf("ATAGS state:\n");
+	printf("              addr = 0x%08x ~ 0x%08x\n", start, end);
+	printf("        Total size = 0x%08x\n", ATAGS_SIZE);
+	printf("       in use size = 0x%08x\n", in_use);
+	printf("    available size = 0x%08x\n", in_available);
+}
+
 void atags_print_tag(struct tag *t)
 {
 	u32 i;
@@ -297,6 +322,7 @@ void atags_test(void)
 	atags_set_tag(ATAG_RAM_PARTITION, &t_ram_param);
 
 	atags_print_all_tags();
+	atags_stat();
 }
 
 static int dump_atags(cmd_tbl_t *cmdtp, int flag,
@@ -315,4 +341,5 @@ U_BOOT_CMD(
 void inline atags_print_tag(struct tag *t) {}
 void inline atags_print_all_tags(void) {}
 void inline atags_test(void) {}
+void atags_stat(void) {};
 #endif

commit 0e9918bc21fc80f39e1c5e373914af6163d3c87e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Sep 5 08:48:05 2018 +0800

    rockchip: atags: add ram partition support
    
    Maybe there is no flash storage for some SoC which is used
    as coprocessor, preloader will load images for U-Boot and
    pass partition info by atags.
    
    Change-Id: Ieb6efff80cb615b3b5a7bcd51c672649f3c97115
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rk_atags.h b/arch/arm/include/asm/arch-rockchip/rk_atags.h
index 30a3cf6311..aaa0500b0f 100644
--- a/arch/arm/include/asm/arch-rockchip/rk_atags.h
+++ b/arch/arm/include/asm/arch-rockchip/rk_atags.h
@@ -15,6 +15,7 @@
 #define ATAG_BOOTDEV		0x54410051
 #define ATAG_DDR_MEM		0x54410052
 #define ATAG_TOS_MEM		0x54410053
+#define ATAG_RAM_PARTITION	0x54410054
 
 /* Tag size and offset */
 #define ATAGS_SIZE		(0x2000)	/* 8K */
@@ -82,6 +83,18 @@ struct tag_tos_mem {
 	u64 reserved[8];
 } __packed;
 
+struct tag_ram_partition {
+	u32 version;
+	u32 count;
+	u32 reserved[4];
+
+	struct {
+		char name[16];
+		u64 start;
+		u64 size;
+	} part[16];
+} __packed;
+
 struct tag_core {
 	u32 flags;
 	u32 pagesize;
@@ -102,6 +115,7 @@ struct tag {
 		struct tag_bootdev	bootdev;
 		struct tag_ddr_mem	ddr_mem;
 		struct tag_tos_mem	tos_mem;
+		struct tag_ram_partition ram_part;
 	} u;
 } __aligned(4);
 
diff --git a/arch/arm/mach-rockchip/rk_atags.c b/arch/arm/mach-rockchip/rk_atags.c
index ffb03532ac..e02048656a 100644
--- a/arch/arm/mach-rockchip/rk_atags.c
+++ b/arch/arm/mach-rockchip/rk_atags.c
@@ -19,7 +19,8 @@ static int inline bad_magic(u32 magic)
 		(magic != ATAG_SERIAL) &&
 		(magic != ATAG_BOOTDEV) &&
 		(magic != ATAG_DDR_MEM) &&
-		(magic != ATAG_TOS_MEM));
+		(magic != ATAG_TOS_MEM) &&
+		(magic != ATAG_RAM_PARTITION));
 }
 
 static int inline atags_size_overflow(struct tag *t, u32 tag_size)
@@ -93,6 +94,10 @@ int atags_set_tag(u32 magic, void *tagdata)
 	case ATAG_DDR_MEM:
 		size = tag_size(tag_ddr_mem);
 		break;
+	case ATAG_RAM_PARTITION:
+		size = tag_size(tag_ram_partition);
+		break;
+
 	};
 
 	if (atags_size_overflow(t, size)) {
@@ -203,6 +208,21 @@ void atags_print_tag(struct tag *t)
 		for (i = 0; i < ARRAY_SIZE(t->u.ddr_mem.reserved); i++)
 			printf("    res[%d] = 0x%x\n", i, t->u.ddr_mem.reserved[i]);
 		break;
+	case ATAG_RAM_PARTITION:
+		printf("[ram_partition]:\n");
+		printf("     magic = 0x%x\n", t->hdr.magic);
+		printf("   version = 0x%x\n", t->u.ram_part.version);
+		printf("     count = 0x%x\n", t->u.ram_part.count);
+		for (i = 0; i < ARRAY_SIZE(t->u.ram_part.reserved); i++)
+			printf("    res[%d] = 0x%x\n", i, t->u.ram_part.reserved[i]);
+
+		printf("    Part:  Name       Start Addr      Size\t\n");
+		for (i = 0; i < t->u.ram_part.count; i++)
+			printf("%16s      0x%08llx      0x%08llx\n",
+			       t->u.ram_part.part[i].name,
+			       t->u.ram_part.part[i].start,
+			       t->u.ram_part.part[i].size);
+		break;
 	case ATAG_CORE:
 		printf("[core]:\n");
 		printf("     magic = 0x%x\n", t->hdr.magic);
@@ -239,15 +259,34 @@ void atags_test(void)
 	struct tag_bootdev t_bootdev;
 	struct tag_ddr_mem t_ddr_mem;
 	struct tag_tos_mem t_tos_mem;
+	struct tag_ram_partition t_ram_param;
 
 	memset(&t_serial,  0x1, sizeof(t_serial));
 	memset(&t_bootdev, 0x2, sizeof(t_bootdev));
 	memset(&t_ddr_mem, 0x3, sizeof(t_ddr_mem));
 	memset(&t_tos_mem, 0x4, sizeof(t_tos_mem));
+	memset(&t_tos_mem, 0x0, sizeof(t_ram_param));
 
 	memcpy(&t_tos_mem.tee_mem.name, "tee_mem", 8);
 	memcpy(&t_tos_mem.drm_mem.name, "drm_mem", 8);
 
+	t_ram_param.count = 4;
+	memcpy(&t_ram_param.part[0].name, "misc", 9);
+	t_ram_param.part[0].start = 0x00600000;
+	t_ram_param.part[0].size =  0x00200000;
+
+	memcpy(&t_ram_param.part[1].name, "resource", 9);
+	t_ram_param.part[1].start = 0x00800000;
+	t_ram_param.part[1].size =  0x00200000;
+
+	memcpy(&t_ram_param.part[2].name, "kernel", 7);
+	t_ram_param.part[2].start = 0x00a00000;
+	t_ram_param.part[2].size =  0x02000000;
+
+	memcpy(&t_ram_param.part[3].name, "boot", 5);
+	t_ram_param.part[3].start = 0x04000000;
+	t_ram_param.part[3].size =  0x02000000;
+
 	/* First pre-loader must call it before atags_set_tag() */
 	atags_destroy();
 
@@ -255,6 +294,7 @@ void atags_test(void)
 	atags_set_tag(ATAG_BOOTDEV, &t_bootdev);
 	atags_set_tag(ATAG_DDR_MEM, &t_ddr_mem);
 	atags_set_tag(ATAG_TOS_MEM, &t_tos_mem);
+	atags_set_tag(ATAG_RAM_PARTITION, &t_ram_param);
 
 	atags_print_all_tags();
 }

commit 6b93bf2ba9dabdb29c5757074e5f865e79a64bab
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Sep 14 10:31:57 2018 +0800

    video/drm: rgb: Fix output mode setting
    
    Change-Id: I1adf38aa6262e889cc518c07325d6aeeb730f874
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_rgb.c b/drivers/video/drm/rockchip_rgb.c
index 77009f0040..ce737953ad 100644
--- a/drivers/video/drm/rockchip_rgb.c
+++ b/drivers/video/drm/rockchip_rgb.c
@@ -10,6 +10,7 @@
 #include <regmap.h>
 #include <dm/device.h>
 #include <dm/read.h>
+#include <linux/media-bus-format.h>
 
 #include "rockchip_display.h"
 #include "rockchip_crtc.h"
@@ -24,7 +25,7 @@ struct rockchip_rgb_priv {
 	struct regmap *grf;
 };
 
-static int rockchip_rgb_prepare(struct display_state *state)
+static int rockchip_rgb_enable(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
 	struct rockchip_rgb_priv *priv = dev_get_priv(conn_state->dev);
@@ -41,54 +42,39 @@ static int rockchip_rgb_prepare(struct display_state *state)
 	return 0;
 }
 
-static int rockchip_rgb_unprepare(struct display_state *state)
+static int rockchip_rgb_disable(struct display_state *state)
 {
 	return 0;
 }
 
-static int to_output_mode(const char *s)
-{
-	const struct {
-		const char *name;
-		int format;
-	} formats[] = {
-		{ "p888", ROCKCHIP_OUT_MODE_P888 },
-		{ "p666", ROCKCHIP_OUT_MODE_P666 },
-		{ "p565", ROCKCHIP_OUT_MODE_P565 },
-		{ "s888", ROCKCHIP_OUT_MODE_S888 },
-		{ "s888_dummy", ROCKCHIP_OUT_MODE_S888_DUMMY }
-	};
-	int i;
-
-	for (i = 0; i < ARRAY_SIZE(formats); i++)
-		if (!strncmp(s, formats[i].name, strlen(formats[i].name)))
-			return formats[i].format;
-
-	return ROCKCHIP_OUT_MODE_P888;
-}
-
 static int rockchip_rgb_init(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
-	struct panel_state *panel_state = &state->panel_state;
-	const char *mode;
 
 	conn_state->type = DRM_MODE_CONNECTOR_LVDS;
 	conn_state->color_space = V4L2_COLORSPACE_DEFAULT;
 
-	mode = dev_read_string(panel_state->dev, "rgb-mode");
-	if (mode)
-		conn_state->output_mode = to_output_mode(mode);
-	else
+	switch (conn_state->bus_format) {
+	case MEDIA_BUS_FMT_RGB666_1X18:
+		conn_state->output_mode = ROCKCHIP_OUT_MODE_P666;
+		break;
+	case MEDIA_BUS_FMT_RGB565_1X16:
+		conn_state->output_mode = ROCKCHIP_OUT_MODE_P565;
+		break;
+	case MEDIA_BUS_FMT_RGB888_1X24:
+	case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
+	default:
 		conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
+		break;
+	}
 
 	return 0;
 }
 
 static const struct rockchip_connector_funcs rockchip_rgb_funcs = {
 	.init = rockchip_rgb_init,
-	.enable = rockchip_rgb_prepare,
-	.disable = rockchip_rgb_unprepare,
+	.enable = rockchip_rgb_enable,
+	.disable = rockchip_rgb_disable,
 };
 
 static int rockchip_rgb_probe(struct udevice *dev)

commit 8659d08d2b589693d121c1298484e861b7dafc4f
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Tue Sep 11 18:19:10 2018 +0800

    usb: dwc2: amend the maximum request length
    
    Amend the maximum request length equate to the maximum transfer
    size of endpoind.
    
    Change-Id: I926c23ddf347f33cf166c51c80d099441978ca7e
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
index 687046151d..73ba0daa4d 100644
--- a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
+++ b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
@@ -98,7 +98,7 @@ static int setdma_rx(struct dwc2_ep *ep, struct dwc2_request *req)
 
 	buf = req->req.buf + req->req.actual;
 	length = min_t(u32, req->req.length - req->req.actual,
-		       ep_num ? DMA_BUFFER_SIZE : ep->ep.maxpacket);
+		       ep_num ? DOEPT_SIZ_XFER_SIZE_MAX_EP : ep->ep.maxpacket);
 
 	ep->len = length;
 	ep->dma_buf = buf;

commit 5b2bcb4f4876b482fa1a7e95cccab65aad50f90b
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Tue Sep 11 18:12:13 2018 +0800

    usb: dwc2: fix the maximum dieptsizn/doeptsizn
    
    The maximum transfer size supported should be 2^19 bytes
    from Table 5-79 (P372) of the DWC OTG Databook V3.10.
    
    Change-Id: I258b6c2119270fa2f31453af86f7eb179359e171
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/gadget/dwc2_udc_otg_regs.h b/drivers/usb/gadget/dwc2_udc_otg_regs.h
index 7f5a7ab9a3..1e7210063e 100644
--- a/drivers/usb/gadget/dwc2_udc_otg_regs.h
+++ b/drivers/usb/gadget/dwc2_udc_otg_regs.h
@@ -262,7 +262,7 @@ struct dwc2_usbotg_reg {
 #define DOEPT_SIZ_PKT_CNT(x)                      (x << 19)
 #define DOEPT_SIZ_XFER_SIZE(x)                    (x << 0)
 #define DOEPT_SIZ_XFER_SIZE_MAX_EP0               (0x7F << 0)
-#define DOEPT_SIZ_XFER_SIZE_MAX_EP                (0x7FFF << 0)
+#define DOEPT_SIZ_XFER_SIZE_MAX_EP                (0x7FFFF << 0)
 
 /* Device Endpoint-N Control Register (DIEPCTLn/DOEPCTLn) */
 #define DIEPCTL_TX_FIFO_NUM(x)                    (x << 22)

commit 812df22a142e8ba661e725f85c18f0140b50a54f
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jul 18 20:47:17 2018 +0800

    dm: mmc: add trim erase mode
    
    BUG: If erase is set as MMC_ERASE_ARG, the erase command
    perform an erase on erase group(s). If so, when the start
    address is close to the next partition address and the
    blkcnt is less than erase group size, the mmc_berase()
    will recalculate the end address and may exceed the next
    partition start address. This will erase the other partition
    useful data.
    
    Solve: Set erase mode as trim, the erase command perform an
    erase on the sector(s).
    
    The erase command of SD card perform an erase on the sector(s).
    We can just send the start and end address to erase SD card
    and send CMD38 with argument MMC_ERASE_ARG.
    
    Change-Id: Ic4251b77e9f9feb6a087324c0241625ff013a0a0
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mmc/mmc_write.c b/drivers/mmc/mmc_write.c
index 54acbf7336..1faea7b009 100644
--- a/drivers/mmc/mmc_write.c
+++ b/drivers/mmc/mmc_write.c
@@ -20,6 +20,7 @@ static ulong mmc_erase_t(struct mmc *mmc, ulong start, lbaint_t blkcnt)
 	struct mmc_cmd cmd;
 	ulong end;
 	int err, start_cmd, end_cmd;
+	uint erase_mode;
 
 	if (mmc->high_capacity) {
 		end = start + blkcnt - 1;
@@ -28,12 +29,24 @@ static ulong mmc_erase_t(struct mmc *mmc, ulong start, lbaint_t blkcnt)
 		start *= mmc->write_bl_len;
 	}
 
+	/*
+	 * The SD card have just one erase mode, the erase command
+	 * perform an erase on the sector(s).
+	 * The Emmc have four erase mode. We use the trim mode with
+	 * cmd.cmdarg equal to MMC_TRIM_ARG which command performs an
+	 * erase on the sector(s).
+	 */
 	if (IS_SD(mmc)) {
 		start_cmd = SD_CMD_ERASE_WR_BLK_START;
 		end_cmd = SD_CMD_ERASE_WR_BLK_END;
+		erase_mode = MMC_ERASE_ARG;
 	} else {
 		start_cmd = MMC_CMD_ERASE_GROUP_START;
 		end_cmd = MMC_CMD_ERASE_GROUP_END;
+		if (mmc->esr.mmc_can_trim)
+			erase_mode = MMC_TRIM_ARG;
+		else
+			erase_mode = MMC_ERASE_ARG;
 	}
 
 	cmd.cmdidx = start_cmd;
@@ -52,7 +65,7 @@ static ulong mmc_erase_t(struct mmc *mmc, ulong start, lbaint_t blkcnt)
 		goto err_out;
 
 	cmd.cmdidx = MMC_CMD_ERASE;
-	cmd.cmdarg = MMC_ERASE_ARG;
+	cmd.cmdarg = erase_mode;
 	cmd.resp_type = MMC_RSP_R1b;
 
 	err = mmc_send_cmd(mmc, &cmd, NULL);
@@ -81,50 +94,69 @@ ulong mmc_berase(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt)
 	struct mmc *mmc = find_mmc_device(dev_num);
 	lbaint_t blk = 0, blk_r = 0;
 	int timeout = 1000;
+	int mode = 0;
 
 	if (!mmc)
 		return -1;
 
+	if (!blkcnt)
+		return 0;
+
 	err = blk_select_hwpart_devnum(IF_TYPE_MMC, dev_num,
 				       block_dev->hwpart);
+
 	if (err < 0)
 		return -1;
 
-	/*
-	 * We want to see if the requested start or total block count are
-	 * unaligned.  We discard the whole numbers and only care about the
-	 * remainder.
-	 */
-	err = div_u64_rem(start, mmc->erase_grp_size, &start_rem);
-	err = div_u64_rem(blkcnt, mmc->erase_grp_size, &blkcnt_rem);
-	if (start_rem || blkcnt_rem)
-		printf("\n\nCaution! Your devices Erase group is 0x%x\n"
-		       "The erase range would be change to "
-		       "0x" LBAF "~0x" LBAF "\n\n",
-		       mmc->erase_grp_size, start & ~(mmc->erase_grp_size - 1),
-		       ((start + blkcnt + mmc->erase_grp_size)
-		       & ~(mmc->erase_grp_size - 1)) - 1);
-
-	while (blk < blkcnt) {
-		if (IS_SD(mmc) && mmc->ssr.au) {
-			blk_r = ((blkcnt - blk) > mmc->ssr.au) ?
-				mmc->ssr.au : (blkcnt - blk);
-		} else {
-			blk_r = ((blkcnt - blk) > mmc->erase_grp_size) ?
-				mmc->erase_grp_size : (blkcnt - blk);
-		}
-		err = mmc_erase_t(mmc, start + blk, blk_r);
-		if (err)
-			break;
-
-		blk += blk_r;
+	if (!IS_SD(mmc)) {
+		if (mmc->esr.mmc_can_trim)
+			mode = 1;
+	}
 
-		/* Waiting for the ready status */
+	if (mode) {
+		err = mmc_erase_t(mmc, start, blkcnt);
+		if (err)
+			return err;
 		if (mmc_send_status(mmc, timeout))
 			return 0;
-	}
 
-	return blk;
+		return blkcnt;
+	} else {
+		/*
+		 * We want to see if the requested start or total block
+		 * count are unaligned.  We discard the whole numbers and
+		 * only care about the remainder.
+		 */
+		err = div_u64_rem(start, mmc->erase_grp_size, &start_rem);
+		err = div_u64_rem(blkcnt, mmc->erase_grp_size, &blkcnt_rem);
+		if (start_rem || blkcnt_rem)
+			printf("\n\nCaution! Your devices Erase group is 0x%x\n"
+			       "The erase range would be change to "
+			       "0x" LBAF "~0x" LBAF "\n\n",
+			       mmc->erase_grp_size,
+			       start & ~(mmc->erase_grp_size - 1),
+			       ((start + blkcnt + mmc->erase_grp_size)
+			       & ~(mmc->erase_grp_size - 1)) - 1);
+		while (blk < blkcnt) {
+			if (IS_SD(mmc) && mmc->ssr.au) {
+				blk_r = ((blkcnt - blk) > mmc->ssr.au) ?
+				mmc->ssr.au : (blkcnt - blk);
+			} else {
+				blk_r = ((blkcnt - blk) > mmc->erase_grp_size) ?
+					mmc->erase_grp_size : (blkcnt - blk);
+			}
+			err = mmc_erase_t(mmc, start + blk, blk_r);
+			if (err)
+				break;
+
+			blk += blk_r;
+
+			/* Waiting for the ready status */
+			if (mmc_send_status(mmc, timeout))
+				return 0;
+		}
+		return blk;
+	}
 }
 
 static ulong mmc_write_blocks(struct mmc *mmc, lbaint_t start,

commit f680c019e6d910332958f764cee0f6af8b674bfe
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Sep 12 15:46:19 2018 +0800

    clk: rockchip: add debug info for waiting pll
    
    On FPGA, PLL is fake and can't give a lock state which causes
    dead waiting, so that adding a debug message to easily notice
    this situation.
    
    Change-Id: Ic7dccedb3d7e5c7588da85bb4c4552b924f60e43
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_pll.c b/drivers/clk/rockchip/clk_pll.c
index 6ace3db348..6d309a801c 100644
--- a/drivers/clk/rockchip/clk_pll.c
+++ b/drivers/clk/rockchip/clk_pll.c
@@ -233,8 +233,10 @@ static int rk3036_pll_set_rate(struct rockchip_pll_clock *pll,
 		  1 << RK3036_PLLCON1_PWRDOWN_SHIT);
 
 	/* waiting for pll lock */
-	while (!(readl(base + pll->con_offset + 0x4) & (1 << pll->lock_shift)))
+	while (!(readl(base + pll->con_offset + 0x4) & (1 << pll->lock_shift))) {
 		udelay(1);
+		debug("%s: wait pll lock, pll_id=%ld\n", __func__, pll_id);
+	}
 
 	rk_clrsetreg(base + pll->mode_offset, pll->mode_mask << pll->mode_shift,
 		     RKCLK_PLL_MODE_NORMAL << pll->mode_shift);

commit b8412744f419f7b74a8a181d3029f8e1e3604333
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 11 16:29:44 2018 +0800

    rockchip: rv1808: set init sp address backward
    
    U-Boot max size is default 1MB, so that if init sp starts
    from the tail of 1M, it overrides the U-Boot images which
    causes a relocation failure.
    
    Change-Id: I971c4fd63175137968430b130c25da03709d26e4
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h
index 73b75b16c7..b0f6b90ddf 100644
--- a/include/configs/rv1108_common.h
+++ b/include/configs/rv1108_common.h
@@ -16,7 +16,7 @@
 #define CONFIG_SYS_SDRAM_BASE		0x60000000
 #define SDRAM_MAX_SIZE			0x80000000
 #define CONFIG_SYS_TEXT_BASE		CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_TEXT_BASE + 0x100000)
+#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_TEXT_BASE + 0x200000)
 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x2000000)
 
 /* SPL support */

commit 954fa96c8300251b985ee4e7a369e56150c9ab50
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 11 16:29:30 2018 +0800

    rockchip: rk3368: set init sp address backward
    
    U-Boot max size is default 1MB, so that if init sp starts
    from the tail of 1M, it overrides the U-Boot images which
    causes a relocation failure.
    
    Change-Id: Ib137428bb5fa10ee5b30b79a2623a016ecfc19e3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h
index 0013e3cc4e..e9e3a97aee 100644
--- a/include/configs/rk3368_common.h
+++ b/include/configs/rk3368_common.h
@@ -22,7 +22,7 @@
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
 #define CONFIG_SYS_TEXT_BASE		0x00200000
-#define CONFIG_SYS_INIT_SP_ADDR		0x00300000
+#define CONFIG_SYS_INIT_SP_ADDR		0x00400000
 #define CONFIG_SYS_LOAD_ADDR		0x00280000
 #define CONFIG_SYS_BOOTM_LEN		(64 << 20)	/* 64M */
 

commit f3ed57b767ad6d89ad8cc61f9c3a0424d97eb701
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 11 16:29:11 2018 +0800

    rockchip: rk3328: set init sp address backward
    
    U-Boot max size is default 1MB, so that if init sp starts
    from the tail of 1M, it overrides the U-Boot images which
    causes a relocation failure.
    
    Change-Id: I572e5edb26e2f7430c89fd057761ddc9abf077c6
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index 3e41d4d9b6..362e3843dd 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -16,7 +16,7 @@
 #define CONFIG_SPL_FRAMEWORK
 
 #define CONFIG_SYS_TEXT_BASE		0x00200000
-#define CONFIG_SYS_INIT_SP_ADDR		0x00300000
+#define CONFIG_SYS_INIT_SP_ADDR		0x00400000
 #define CONFIG_SYS_LOAD_ADDR		0x00800800
 #define CONFIG_SPL_STACK		0x00400000
 #define CONFIG_SPL_TEXT_BASE		0x00000000

commit 2a864b7a8090e6f8adffb9901d5f20cd634137e5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 11 16:28:47 2018 +0800

    rockchip: rk3399: set init sp address backward
    
    U-Boot max size is default 1MB, so that if init sp starts
    from the tail of 1M, it overrides the U-Boot images which
    causes a relocation failure.
    
    Change-Id: I4e17b934dc3dd19f66bda374263dcb674c53b057
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index bf5f445011..980703db0e 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -18,7 +18,7 @@
 #endif
 
 #define CONFIG_SYS_TEXT_BASE		0x00200000
-#define CONFIG_SYS_INIT_SP_ADDR		0x00300000
+#define CONFIG_SYS_INIT_SP_ADDR		0x00400000
 #define CONFIG_SYS_LOAD_ADDR		0x00800800
 #define CONFIG_SPL_STACK		0xff8effff
 #define CONFIG_SPL_TEXT_BASE		0xff8c2000

commit a25a7031bc17b035245241ece1d6ecec92a040b8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 11 16:28:25 2018 +0800

    rockchip: rk3308: set init sp address backward
    
    U-Boot max size is default 1MB, so that if init sp starts
    from the tail of 1M, it overrides the U-Boot images which
    causes a relocation failure.
    
    Change-Id: Ie3bdadd58da954bff3de182725d28cfb6877e672
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h
index b562c94cd3..a728fa3709 100644
--- a/include/configs/rk3308_common.h
+++ b/include/configs/rk3308_common.h
@@ -18,7 +18,7 @@
 #define CONFIG_SYS_NS16550_MEM32
 
 #define CONFIG_SYS_TEXT_BASE		0x00600000
-#define CONFIG_SYS_INIT_SP_ADDR		0x00700000
+#define CONFIG_SYS_INIT_SP_ADDR		0x00800000
 #define CONFIG_SYS_LOAD_ADDR		0x00C00800
 #define CONFIG_SPL_STACK		0x00400000
 #define CONFIG_SYS_BOOTM_LEN		(64 << 20)	/* 64M */

commit 6cfe5b317bf51c7f8bd3d1c2c02bd1bd27776c12
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 11 16:28:02 2018 +0800

    rockchip: rk1808: set init sp address backward
    
    U-Boot max size is default 1MB, so that if init sp starts
    from the tail of 1M, it overrides the U-Boot images which
    causes a relocation failure.
    
    Change-Id: Ia310eda1317ae65aa374dca9294114813a645315
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk1808_common.h b/include/configs/rk1808_common.h
index 70945ccf27..cb92d5b727 100644
--- a/include/configs/rk1808_common.h
+++ b/include/configs/rk1808_common.h
@@ -13,7 +13,7 @@
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
 #define CONFIG_SYS_TEXT_BASE		0x00200000
-#define CONFIG_SYS_INIT_SP_ADDR		0x00300000
+#define CONFIG_SYS_INIT_SP_ADDR		0x00400000
 #define CONFIG_SYS_LOAD_ADDR		0x00800800
 #define CONFIG_SYS_BOOTM_LEN		(64 << 20)	/* 64M */
 #define COUNTER_FREQUENCY		24000000

commit aacf8d54f1300d6dcbd033fe45d16796c394ae91
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 11 16:25:01 2018 +0800

    rockchip: px30: set init sp address backward
    
    U-Boot max size is default 1MB, so that if init sp starts
    from the tail of 1M, it overrides the U-Boot images which
    causes a relocation failure.
    
    Change-Id: I0209a4294f9b85e89ce22a3a5c1e1b79a0ff37aa
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index 425659eac4..cb26415285 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -18,7 +18,7 @@
 #define CONFIG_SYS_NS16550_MEM32
 
 #define CONFIG_SYS_TEXT_BASE		0x00200000
-#define CONFIG_SYS_INIT_SP_ADDR		0x00300000
+#define CONFIG_SYS_INIT_SP_ADDR		0x00400000
 #define CONFIG_SYS_LOAD_ADDR		0x00800800
 #define CONFIG_SPL_STACK		0x00400000
 #define CONFIG_SPL_TEXT_BASE		0x00000000

commit 3680acb5fc21f1b3efc366369bb84936b579fe55
Author: Hao Xiaowei <hxw@rock-chips.com>
Date:   Tue Sep 11 09:29:42 2018 +0800

    configs: rk3126 rockchip: rk3128: enable avb for Android P
    
    Change-Id: I94ff27757b59343dac38d938f45c3b5b0fff6557
    Signed-off-by: Hao Xiaowei <hxw@rock-chips.com>

diff --git a/configs/rk3126_defconfig b/configs/rk3126_defconfig
index 2481be321d..ea939356ef 100644
--- a/configs/rk3126_defconfig
+++ b/configs/rk3126_defconfig
@@ -1,4 +1,13 @@
 CONFIG_ARM=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V1=y
+CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
+CONFIG_ANDROID_AVB=y
+CONFIG_AVB_LIBAVB=y
+CONFIG_AVB_LIBAVB_AB=y
+CONFIG_AVB_LIBAVB_ATX=y
+CONFIG_AVB_LIBAVB_USER=y
+CONFIG_RK_AVB_LIBAVB_USER=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x38000
 CONFIG_ROCKCHIP_RK3128=y
diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h
index d768f56148..7ef5972e24 100644
--- a/include/configs/rk3128_common.h
+++ b/include/configs/rk3128_common.h
@@ -11,7 +11,7 @@
 
 #define CONFIG_SYS_MAXARGS		16
 #define CONFIG_BAUDRATE			115200
-#define CONFIG_SYS_MALLOC_LEN		(32 << 20)
+#define CONFIG_SYS_MALLOC_LEN		(192 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
@@ -22,6 +22,8 @@
 #define GICC_BASE			0x1013A000
 #define GICD_BASE			0x10139000
 
+#define CONFIG_SUPPORT_EMMC_RPMB
+
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */
 
 #define CONFIG_ROCKUSB_G_DNL_PID	0x310C

commit bdf50261ca5dae56c75b1ff7d8d1a335d6bfe2f1
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Tue Sep 11 08:52:24 2018 +0800

    lib: optee_client: search security partition once
    
    Change-Id: I4f3fbdb1e319e5b200225353a2d945bebd888f8c
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/OpteeClientRkFs-v2.c b/lib/optee_clientApi/OpteeClientRkFs-v2.c
index d9ff4dd4bc..c0f331dbd4 100644
--- a/lib/optee_clientApi/OpteeClientRkFs-v2.c
+++ b/lib/optee_clientApi/OpteeClientRkFs-v2.c
@@ -149,21 +149,23 @@ static char dir_cache[RKSS_NAME_MAX_LENGTH][12];
 static int dir_num;
 static int dir_seek;
 
+static struct blk_desc *dev_desc = NULL;
+static disk_partition_t part_info;
 static int rkss_read_multi_sections(unsigned char *data, unsigned long index, unsigned int num)
 {
 	unsigned long ret;
-	struct blk_desc *dev_desc;
-	disk_partition_t part_info;
 
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: Could not find device\n", __func__);
-		return TEEC_ERROR_GENERIC;
-	}
+	if (dev_desc == NULL) {
+		dev_desc = rockchip_get_bootdev();
+		if (!dev_desc) {
+			printf("%s: Could not find device\n", __func__);
+			return TEEC_ERROR_GENERIC;
+		}
 
-	if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
-		printf("Could not find security partition\n");
-		return TEEC_ERROR_GENERIC;
+		if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
+			printf("Could not find security partition\n");
+			return TEEC_ERROR_GENERIC;
+		}
 	}
 	ret = blk_dread(dev_desc, part_info.start + index, num, data);
 	if (ret != num) {
@@ -176,18 +178,18 @@ static int rkss_read_multi_sections(unsigned char *data, unsigned long index, un
 static int rkss_write_multi_sections(unsigned char *data, unsigned long index, unsigned int num)
 {
 	unsigned long ret;
-	struct blk_desc *dev_desc;
-	disk_partition_t part_info;
 
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: Could not find device\n", __func__);
-		return TEEC_ERROR_GENERIC;
-	}
+	if (dev_desc == NULL) {
+		dev_desc = rockchip_get_bootdev();
+		if (!dev_desc) {
+			printf("%s: Could not find device\n", __func__);
+			return TEEC_ERROR_GENERIC;
+		}
 
-	if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
-		printf("Could not find security partition\n");
-		return TEEC_ERROR_GENERIC;
+		if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
+			printf("Could not find security partition\n");
+			return TEEC_ERROR_GENERIC;
+		}
 	}
 	ret = blk_dwrite(dev_desc, part_info.start + index, num, data);
 	if (ret != num) {
@@ -200,18 +202,18 @@ static int rkss_write_multi_sections(unsigned char *data, unsigned long index, u
 static int rkss_read_patition_tables(unsigned char *data)
 {
 	unsigned long ret;
-	struct blk_desc *dev_desc;
-	disk_partition_t part_info;
 
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: Could not find device\n", __func__);
-		return TEEC_ERROR_GENERIC;
-	}
+	if (dev_desc == NULL) {
+		dev_desc = rockchip_get_bootdev();
+		if (!dev_desc) {
+			printf("%s: Could not find device\n", __func__);
+			return TEEC_ERROR_GENERIC;
+		}
 
-	if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
-		printf("Could not find security partition\n");
-		return TEEC_ERROR_GENERIC;
+		if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
+			printf("Could not find security partition\n");
+			return TEEC_ERROR_GENERIC;
+		}
 	}
 	ret = blk_dread(dev_desc, part_info.start, RKSS_PARTITION_TABLE_COUNT, data);
 	if (ret != RKSS_PARTITION_TABLE_COUNT) {
diff --git a/lib/optee_clientApi/OpteeClientRkFs.c b/lib/optee_clientApi/OpteeClientRkFs.c
index 4281dcb56b..179c8c71c9 100644
--- a/lib/optee_clientApi/OpteeClientRkFs.c
+++ b/lib/optee_clientApi/OpteeClientRkFs.c
@@ -161,21 +161,23 @@ extern unsigned long blk_dread(struct blk_desc *block_dev, lbaint_t start,
 extern unsigned long blk_dwrite(struct blk_desc *block_dev, lbaint_t start,
 			 lbaint_t blkcnt, const void *buffer);
 
+static struct blk_desc *dev_desc = NULL;
+static disk_partition_t part_info;
 static int rkss_read_multi_sections(unsigned char *data, unsigned long index, unsigned int num)
 {
 	unsigned long ret;
-	struct blk_desc *dev_desc;
-	disk_partition_t part_info;
 
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: Could not find device\n", __func__);
-		return -1;
-	}
+	if (dev_desc == NULL) {
+		dev_desc = rockchip_get_bootdev();
+		if (!dev_desc) {
+			printf("%s: Could not find device\n", __func__);
+			return -1;
+		}
 
-	if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
-		printf("Could not find security partition\n");
-		return -1;
+		if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
+			printf("Could not find security partition\n");
+			return -1;
+		}
 	}
 	ret = blk_dread(dev_desc, part_info.start + index, num, data);
 	if (ret != num) {
@@ -193,18 +195,18 @@ static int rkss_read_section(struct rk_secure_storage *rkss)
 static int rkss_write_multi_sections(unsigned char *data, unsigned long index, unsigned int num)
 {
 	unsigned long ret;
-	struct blk_desc *dev_desc;
-	disk_partition_t part_info;
 
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: Could not find device\n", __func__);
-		return -1;
-	}
+	if (dev_desc == NULL) {
+		dev_desc = rockchip_get_bootdev();
+		if (!dev_desc) {
+			printf("%s: Could not find device\n", __func__);
+			return -1;
+		}
 
-	if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
-		printf("Could not find security partition\n");
-		return -1;
+		if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
+			printf("Could not find security partition\n");
+			return -1;
+		}
 	}
 	ret = blk_dwrite(dev_desc, part_info.start + index, num, data);
 	if (ret != num) {
@@ -222,18 +224,18 @@ static int rkss_write_section(struct rk_secure_storage *rkss)
 static int rkss_read_patition_tables(unsigned char *data)
 {
 	unsigned long ret;
-	struct blk_desc *dev_desc;
-	disk_partition_t part_info;
 
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: Could not find device\n", __func__);
-		return -1;
-	}
+	if (dev_desc == NULL) {
+		dev_desc = rockchip_get_bootdev();
+		if (!dev_desc) {
+			printf("%s: Could not find device\n", __func__);
+			return -1;
+		}
 
-	if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
-		printf("Could not find security partition\n");
-		return -1;
+		if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
+			printf("Could not find security partition\n");
+			return -1;
+		}
 	}
 	ret = blk_dread(dev_desc, part_info.start, RKSS_PARTITION_TABLE_COUNT, data);
 	if (ret != RKSS_PARTITION_TABLE_COUNT) {

commit 1b4602e0391655a1dbf006953783fb9d6441dcd5
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 5 11:27:48 2018 +0800

    gpt: free gpt_pte memory before we get a new one
    
    The memory leak will happen if there is a dev access switch, fix it
    by free the memory before we get a new one.
    
    Change-Id: I5d11609ab5b6cc37f2812d901f2427a1c83fd3a4
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/disk/part_efi.c b/disk/part_efi.c
index f2454e28d3..bc5ce215f6 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -275,9 +275,15 @@ int part_get_info_efi(struct blk_desc *dev_desc, int part,
 	if (!gpt_head)
 		gpt_head = memalign(ARCH_DMA_MINALIGN, dev_desc->blksz);
 
-	/* We suppose different dev have different size, eg. emmc vs sd */
-	if (gpt_head && (gpt_head->last_usable_lba + 0x22) != dev_desc->lba)
+	/*
+	 * We suppose different dev have different size, eg. emmc vs sd
+	 * free the pte first if exist and then will malloc and init a new one.
+	 */
+	if (gpt_head && (gpt_head->last_usable_lba + 0x22) != dev_desc->lba) {
+		if (gpt_pte)
+			free(gpt_pte);
 		gpt_pte = NULL;
+	}
 
 	/* "part" argument must be at least 1 */
 	if (part < 1) {

commit e2bd44da4a983fcbfe1034514624e08a7fc46743
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Sep 10 09:24:56 2018 +0800

    rockchip: rk3128: fix U-Boot code override by init sp
    
    U-Boot max size is default 1MB, so that if init sp starts
    from the tail of 1M, it overrides the U-Boot images which
    causes a relocation failure.
    
    Change-Id: I5a92fd069a63ca6ce78ac680b335a6ac6767ac02
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h
index 9d1df8360d..d768f56148 100644
--- a/include/configs/rk3128_common.h
+++ b/include/configs/rk3128_common.h
@@ -16,7 +16,7 @@
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
 #define CONFIG_SYS_TEXT_BASE		0x60000000
-#define CONFIG_SYS_INIT_SP_ADDR		0x60100000
+#define CONFIG_SYS_INIT_SP_ADDR		0x60300000
 #define CONFIG_SYS_LOAD_ADDR		0x60800800
 
 #define GICC_BASE			0x1013A000

commit 14ae479d491a5c251700897eb2c8a34529b55dd1
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Wed Sep 5 16:39:15 2018 +0800

    rockchip: configs: rk3308-aarch32: remove TPL_SYS_MALLOC_F_LEN,UART_ANNOUNCE
    
    Change-Id: I13c03c90d4bcb1599a834cb9780ae88e91c0c692
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

diff --git a/configs/rk3308-aarch32_defconfig b/configs/rk3308-aarch32_defconfig
index ed98594362..7b7d2412b6 100644
--- a/configs/rk3308-aarch32_defconfig
+++ b/configs/rk3308-aarch32_defconfig
@@ -9,7 +9,6 @@ CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_TARGET_EVB_RK3308=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3308-evb"
 CONFIG_DEBUG_UART=y
-CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 CONFIG_ANDROID_BOOT_IMAGE=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
@@ -60,7 +59,6 @@ CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF0C0000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y

commit 188cef68c614783c4be73d8f62cc759a101cf4f0
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Wed Sep 5 16:34:27 2018 +0800

    rockchip: configs: evb-aarch32-rk3308: remove TPL_SYS_MALLOC_F_LEN
    
    remove CONFIG_TPL_SYS_MALLOC_F_LEN and CONFIG_DEBUG_UART_ANNOUNCE.
    
    Change-Id: Ib1552dadebd5bd5ee0b9bb18e26d5f81cc4cf1be
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

diff --git a/configs/evb-aarch32-rk3308_defconfig b/configs/evb-aarch32-rk3308_defconfig
index 5255e19da8..c836b2c1a1 100644
--- a/configs/evb-aarch32-rk3308_defconfig
+++ b/configs/evb-aarch32-rk3308_defconfig
@@ -10,7 +10,6 @@ CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_TARGET_EVB_RK3308=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3308-evb"
 CONFIG_DEBUG_UART=y
-CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 CONFIG_ANDROID_BOOT_IMAGE=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
@@ -53,7 +52,6 @@ CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF0C0000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y

commit 6f3de9de6f194c90d292d593b891bd17eae83c74
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Wed Sep 5 16:23:32 2018 +0800

    rockchip: configs: evb-rk3308: remove TPL_SYS_MALLOC_F_LEN and UART_ANNOUNCE
    
    TPL do not need CONFIG_TPL_SYS_MALLOC_F_LEN to reserve early malloc area.
    U-boot, u-boot-spl and u-boot-tpl do not want to print "<debug_uart>" in
    debug_uart_init() function, so remove CONFIG_DEBUG_UART_ANNOUNCE.
    
    Change-Id: I30527bef4958655538f8aa62c1ceb51f485fb245
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index 29a7ad44e9..fcc1e167eb 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -8,7 +8,6 @@ CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_TARGET_EVB_RK3308=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3308-evb"
 CONFIG_DEBUG_UART=y
-CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 CONFIG_ANDROID_BOOT_IMAGE=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
@@ -51,7 +50,6 @@ CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF0C0000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y

commit d61082e9dfc265c229156f10d08b8019bc795bd1
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Sep 7 17:34:06 2018 +0800

    cmd: part: use MAX_SEARCH_PARTITIONS for part search
    
    Use Macro instead of hard code.
    
    Change-Id: I8a41a762bb16ca77816871b357ededdde0b1c875
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/cmd/part.c b/cmd/part.c
index 746bf40b2d..834f942446 100644
--- a/cmd/part.c
+++ b/cmd/part.c
@@ -86,7 +86,7 @@ static int do_part_list(int argc, char * const argv[])
 		char str[512] = { '\0', };
 		disk_partition_t info;
 
-		for (p = 1; p < 128; p++) {
+		for (p = 1; p < MAX_SEARCH_PARTITIONS; p++) {
 			char t[5];
 			int r = part_get_info(desc, p, &info);
 

commit 8fc4f040872ae7fa9c58f5e54ec51f6db9b6a73a
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Sep 7 17:26:30 2018 +0800

    part: rkparm: update message don't print by default
    
    The print "invalid parameter" is confused, make it clear to show this is
    a warning from RKPARM partition table.
    
    Change-Id: I1381dd6e60d963f1f233d08c8527495b6ca6101c
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/disk/part_rkparm.c b/disk/part_rkparm.c
index b4a4359f4f..1d4a7d74fd 100644
--- a/disk/part_rkparm.c
+++ b/disk/part_rkparm.c
@@ -40,7 +40,7 @@ static int rkparm_param_parse(char *param, struct list_head *parts_head,
 	unsigned long size, start;
 
 	if (!cmdline) {
-		printf("invalid parameter\n");
+		debug("RKPARM: Invalid parameter part table\n");
 		return -EINVAL;
 	}
 

commit 1e72694f2c2f8824de9d936ede201edcf1cbb92d
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Sep 6 15:26:18 2018 +0800

    rockchip: dw_mmc: do not print msg when not find sample clock
    
    Use debug instead of print for not always print the message, we can use
    mmc info to know MMC mode.
    Update the info by the way.
    
    Change-Id: Iaf5762246b4dbbbb4baf92aca478304dc1f49746
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index 6e55ec4538..7030f2fc6a 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -254,7 +254,7 @@ static int rockchip_dwmmc_probe(struct udevice *dev)
 
 	ret = clk_get_by_name(dev, "ciu-sample", &priv->sample_clk);
 	if (ret < 0)
-		printf("Caution: find clock fail, not support hs200!\n");
+		debug("MMC: sample clock not found, not support hs200!\n");
 	host->execute_tuning = rockchip_dwmmc_execute_tuning;
 #endif
 	host->fifoth_val = MSIZE(0x2) |

commit 551e2a5047ffdf3182c2207841d279d9bf210974
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Sep 6 10:05:09 2018 +0800

    rockchip: rk3328: add usb for pre-reloc
    
    Enable usb otg when enable kenrel dtb.
    
    Change-Id: I710bfc2137aac6904f9c5f7688a2852575b5208b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi
index 67842670ed..2a92490190 100644
--- a/arch/arm/dts/rk3328-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-u-boot.dtsi
@@ -34,3 +34,19 @@
 &sdmmc {
 	u-boot,dm-pre-reloc;
 };
+
+&usb20_otg {
+	u-boot,dm-pre-reloc;
+};
+
+&usb2phy_grf {
+	u-boot,dm-pre-reloc;
+};
+
+&u2phy {
+	u-boot,dm-pre-reloc;
+};
+
+&u2phy_otg {
+	u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi
index 94d39b1b35..670b98d6fa 100644
--- a/arch/arm/dts/rk3328.dtsi
+++ b/arch/arm/dts/rk3328.dtsi
@@ -435,12 +435,6 @@
 		u2phy: usb2-phy@100 {
 			compatible = "rockchip,rk3328-usb2phy";
 			reg = <0x100 0x10>;
-			clocks = <&xin24m>;
-			clock-names = "phyclk";
-			clock-output-names = "usb480m_phy";
-			#clock-cells = <0>;
-			assigned-clocks = <&cru USB480M>;
-			assigned-clock-parents = <&u2phy>;
 			#phy-cells = <1>;
 			status = "disabled";
 

commit 9f9a9f6d1f57a0ce18e01c2f365860936f8cab20
Author: Dayao Ji <jdy@rock-chips.com>
Date:   Thu Sep 6 12:26:22 2018 +0800

    rockchip: resource: get resource from boot partition when AB is enable
    
    In AB system, build recovery as boot, there is no recovery partition
    any more.
    
    Change-Id: I434102d589b369a48ed71c6be3635a9a84f788e0
    Signed-off-by: Dayao Ji <jdy@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index b67af6816f..027d563a30 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -199,8 +199,10 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 
 #ifdef CONFIG_ANDROID_BOOT_IMAGE
 	/* Get boot mode from misc */
+#ifndef CONFIG_ANDROID_AB
 	if (rockchip_get_boot_mode() == BOOT_MODE_RECOVERY)
 		boot_partname = PART_RECOVERY;
+#endif
 
 	/* Read boot/recovery and chenc if this is an AOSP img */
 #ifdef CONFIG_ANDROID_AB

commit affcebcd8fd85785644a5be11c469c438434695c
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Thu Aug 16 15:31:09 2018 +0800

    android: verity: Fix environment variable "bootargs" override
    
    Change-Id: Idd079d8773f536928d02f1b32bb562d5540ee85a
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index bf4aa75172..05a9b39af5 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -505,10 +505,37 @@ static AvbSlotVerifyResult android_slot_verify(char *boot_partname,
 	if (verify_result == AVB_SLOT_VERIFY_RESULT_OK ||
 	    verify_result == AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED ||
 	    (unlocked & LOCK_MASK)) {
+		int len = 0;
+		char *bootargs, *newbootargs;
+
+		if (*slot_data[0]->cmdline) {
+			debug("Kernel command line: %s\n", slot_data[0]->cmdline);
+			len += strlen(slot_data[0]->cmdline);
+		}
+
+		bootargs = env_get("bootargs");
+		if (bootargs)
+			len += strlen(bootargs);
+
+		newbootargs = malloc(len + 2);
+
+		if (!newbootargs) {
+			puts("Error: malloc in android_slot_verify failed!\n");
+			return AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+		}
+		*newbootargs = '\0';
+
+		if (bootargs) {
+			strcpy(newbootargs, bootargs);
+			strcat(newbootargs, " ");
+		}
+		if (*slot_data[0]->cmdline)
+			strcat(newbootargs, slot_data[0]->cmdline);
+		env_set("bootargs", newbootargs);
+
 		memcpy((uint8_t *)load_address,
 		       slot_data[0]->loaded_partitions->data,
 		       slot_data[0]->loaded_partitions->data_size);
-		env_set("bootargs", slot_data[0]->cmdline);
 
 		/* ... and decrement tries remaining, if applicable. */
 		if (!ab_data.slots[slot_index_to_boot].successful_boot &&

commit 270cc02165848317e720ccb8d56d7a29f18630a6
Author: YouMin Chen <cym@rock-chips.com>
Date:   Wed Sep 5 14:06:09 2018 +0800

    rockchip: px30: fix GPIO IOMUX define error
    
    Change-Id: Ic0c9b1d8b4889769a29e918e1c7d5129d5b67290
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c
index 02b2fd27ad..86e7248982 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -101,7 +101,7 @@ void board_debug_uart_init(void)
 		GPIO2B5_GPIO		= 0,
 		GPIO2B5_PWM2,
 
-		GPIO2B4_SHIFT		= 4,
+		GPIO2B4_SHIFT		= 0,
 		GPIO2B4_MASK		= 0xf << GPIO2B4_SHIFT,
 		GPIO2B4_GPIO		= 0,
 		GPIO2B4_CIF_D0M0,
@@ -156,7 +156,7 @@ void board_debug_uart_init(void)
 		GPIO1D1_GPIO		= 0,
 		GPIO1D1_SDIO_D3,
 
-		GPIO1D0_SHIFT		= 4,
+		GPIO1D0_SHIFT		= 0,
 		GPIO1D0_MASK		= 0xf << GPIO1D0_SHIFT,
 		GPIO1D0_GPIO		= 0,
 		GPIO1D0_SDIO_D2,

commit 440068083588e486bc028f27af469d976e4d2b5c
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Mon Sep 3 17:08:07 2018 +0800

    drm/rockchip: vop: Fix interlace resolution kernel logo move up
    
    Using crtc timing to decide display vertical start point.
    
    Change-Id: I3524cd192c6088311d9d04f489d6c294a1125470
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index 74813bf3bd..8113a4e395 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -656,8 +656,8 @@ static int rockchip_vop_set_plane(struct display_state *state)
 	dsp_info = (crtc_h - 1) << 16;
 	dsp_info |= (crtc_w - 1) & 0xffff;
 
-	dsp_stx = crtc_x + mode->htotal - mode->hsync_start;
-	dsp_sty = crtc_y + mode->vtotal - mode->vsync_start;
+	dsp_stx = crtc_x + mode->crtc_htotal - mode->crtc_hsync_start;
+	dsp_sty = crtc_y + mode->crtc_vtotal - mode->crtc_vsync_start;
 	dsp_st = dsp_sty << 16 | (dsp_stx & 0xffff);
 
 	if (crtc_state->ymirror) {

commit f8281ef08adde78ada2f3a9e59d54427c9dc8820
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Sep 3 09:39:48 2018 +0800

    video/drm: display: add rockchip_of_find_connector function
    
    Fixes: 747dfc263cb6 (video/drm: display: add rockchip_of_find_connector function)
    Change-Id: Idec9b8a0924fd7863ff39f59bdf2d596332b8e75
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 53ce8cc070..dff5c6c7c9 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -1229,46 +1229,37 @@ void rockchip_show_logo(void)
 	}
 }
 
-static struct udevice *rockchip_of_find_connector(struct udevice *dev)
+static struct udevice *rockchip_of_find_connector(ofnode endpoint)
 {
-	ofnode conn_node, port, ep;
-	struct udevice *conn_dev;
+	ofnode ep, port, ports, conn;
+	uint phandle;
+	struct udevice *dev;
 	int ret;
 
-	port = dev_read_subnode(dev, "port");
-	if (!ofnode_valid(port))
+	if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle))
 		return NULL;
 
-	ofnode_for_each_subnode(ep, port) {
-		ofnode _ep, _port, _ports;
-		uint phandle;
-
-		if (ofnode_read_u32(ep, "remote-endpoint", &phandle))
-			continue;
-
-		_ep = ofnode_get_by_phandle(phandle);
-		if (!ofnode_valid(_ep) || !ofnode_is_available(_ep))
-			continue;
+	ep = ofnode_get_by_phandle(phandle);
+	if (!ofnode_valid(ep) || !ofnode_is_available(ep))
+		return NULL;
 
-		_port = ofnode_get_parent(_ep);
-		if (!ofnode_valid(_port))
-			continue;
+	port = ofnode_get_parent(ep);
+	if (!ofnode_valid(port))
+		return NULL;
 
-		_ports = ofnode_get_parent(_port);
-		if (!ofnode_valid(_ports))
-			continue;
+	ports = ofnode_get_parent(port);
+	if (!ofnode_valid(ports))
+		return NULL;
 
-		conn_node = ofnode_get_parent(_ports);
-		if (!ofnode_valid(conn_node) || !ofnode_is_available(conn_node))
-			continue;
+	conn = ofnode_get_parent(ports);
+	if (!ofnode_valid(conn) || !ofnode_is_available(conn))
+		return NULL;
 
-		ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, conn_node,
-						  &conn_dev);
-		if (!ret)
-			return conn_dev;
-	}
+	ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, conn, &dev);
+	if (ret)
+		return NULL;
 
-	return NULL;
+	return dev;
 }
 
 static int rockchip_display_probe(struct udevice *dev)
@@ -1336,7 +1327,7 @@ static int rockchip_display_probe(struct udevice *dev)
 		}
 		crtc = (struct rockchip_crtc *)dev_get_driver_data(crtc_dev);
 
-		conn_dev = rockchip_of_find_connector(crtc_dev);
+		conn_dev = rockchip_of_find_connector(np_to_ofnode(ep_node));
 		if (!conn_dev) {
 			printf("Warn: can't find connect driver\n");
 			continue;

commit 175c2742764d13eb9336631be9324d4e3082aeea
Author: YouMin Chen <cym@rock-chips.com>
Date:   Tue Sep 4 21:55:13 2018 +0800

    driver: ram: rockhip: px30: fix PCTL.MSTR write error
    
    The programming mode of PCTL.MSTR is static,and only Can be written
    when the controller is in reset.
    
    Change-Id: If812a2bcec9f4f907b2539a3418b1526e1a6e1d2
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram_px30.c b/drivers/ram/rockchip/sdram_px30.c
index d186258f53..03622e67c6 100644
--- a/drivers/ram/rockchip/sdram_px30.c
+++ b/drivers/ram/rockchip/sdram_px30.c
@@ -726,15 +726,6 @@ static void enable_low_power(struct dram_info *dram,
 	/* off digit module clock when enter power down */
 	setbits_le32(PHY_REG(phy_base, 7), 1 << 7);
 
-	/*
-	 * If DDR3 or DDR4 active_ranks=1,
-	 * it will gate memory clock when enter power down.
-	 * Force set active_ranks to 3 to workaround it.
-	 */
-	if (sdram_params->dramtype == DDR3 || sdram_params->dramtype == DDR4)
-		clrsetbits_le32(pctl_base + DDR_PCTL2_MSTR, 0x3 << 24,
-				0x3 << 24);
-
 	/* enable sr, pd */
 	if (PD_IDLE == 0)
 		clrbits_le32(pctl_base + DDR_PCTL2_PWRCTL, (1 << 1));
@@ -1081,7 +1072,13 @@ static u32 remodify_sdram_params(struct px30_sdram_params *sdram_params)
 		break;
 	}
 
-	if (sdram_params->ch.rank == 2)
+	/*
+	 * If DDR3 or DDR4 MSTR.active_ranks=1,
+	 * it will gate memory clock when enter power down.
+	 * Force set active_ranks to 3 to workaround it.
+	 */
+	if (sdram_params->ch.rank == 2 || sdram_params->dramtype == DDR3 ||
+	    sdram_params->dramtype == DDR4)
 		tmp |= 3 << 24;
 	else
 		tmp |= 1 << 24;

commit 7a9c5709e13e2724f77e726d8c2de6bc2e8e7a8d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 4 16:58:22 2018 +0800

    configs: add rk3308-aarch32_defconfig
    
    What's different with evb-aarch32-rk3308_defconfig?
    
    - it enables CONFIG_USING_KERNEL_DTB to use kernel dtb;
    - it doesn't care much about boot time and image size;
    - it can be used for most rk3308 aarch32 board that doesn't have
      very critial quirements on boot time and image size.
    
    Change-Id: Ifca60d29416026b15b3f2a4935f88acb12ce955e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3308-aarch32_defconfig b/configs/rk3308-aarch32_defconfig
new file mode 100644
index 0000000000..ed98594362
--- /dev/null
+++ b/configs/rk3308-aarch32_defconfig
@@ -0,0 +1,76 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_ROCKCHIP_RK3308=y
+CONFIG_ARM64_BOOT_AARCH32=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_TARGET_EVB_RK3308=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3308-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+# CONFIG_PASS_DEVICE_SERIAL_BY_FDT is not set
+CONFIG_BOOTDELAY=0
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+# CONFIG_FASTBOOT is not set
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_PMIC=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_ADC_KEY=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PINCTRL=y
+CONFIG_DM_FUEL_GAUGE=y
+CONFIG_POWER_FG_RK816=y
+CONFIG_DM_PMIC=y
+# CONFIG_SPL_PMIC_CHILDREN is not set
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_DM_CHARGE_DISPLAY=y
+CONFIG_CHARGE_ANIMATION=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_RKFLASH=y
+CONFIG_RKNANDC_NAND=y
+CONFIG_RKSFC_NAND=y
+CONFIG_RKSFC_NOR=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0xFF0C0000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x330d
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
+CONFIG_TEST_ROCKCHIP=y

commit f01cc52bce224d1eb46a4adee461c7ccf2752461
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Fri Aug 31 11:51:49 2018 +0800

    lib: optee_client: speed up secure store
    
    use R&W multi blocks and cache used flag to
    speed up secure store.
    
    Change-Id: Ib534fa33e1bb03006ed3b85992d1d48b5fe36f39
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/OpteeClientRkFs-v2.c b/lib/optee_clientApi/OpteeClientRkFs-v2.c
index e5834d64db..d9ff4dd4bc 100644
--- a/lib/optee_clientApi/OpteeClientRkFs-v2.c
+++ b/lib/optee_clientApi/OpteeClientRkFs-v2.c
@@ -149,7 +149,7 @@ static char dir_cache[RKSS_NAME_MAX_LENGTH][12];
 static int dir_num;
 static int dir_seek;
 
-static int rkss_read_section(struct rk_secure_storage *rkss)
+static int rkss_read_multi_sections(unsigned char *data, unsigned long index, unsigned int num)
 {
 	unsigned long ret;
 	struct blk_desc *dev_desc;
@@ -165,16 +165,15 @@ static int rkss_read_section(struct rk_secure_storage *rkss)
 		printf("Could not find security partition\n");
 		return TEEC_ERROR_GENERIC;
 	}
-	ret = blk_dread(dev_desc, part_info.start + rkss->index, 1, rkss->data);
-	if (ret != 1) {
+	ret = blk_dread(dev_desc, part_info.start + index, num, data);
+	if (ret != num) {
 		printf("blk_dread fail \n");
 		return TEEC_ERROR_GENERIC;
 	}
-
 	return TEEC_SUCCESS;
 }
 
-static int rkss_write_section(struct rk_secure_storage *rkss)
+static int rkss_write_multi_sections(unsigned char *data, unsigned long index, unsigned int num)
 {
 	unsigned long ret;
 	struct blk_desc *dev_desc;
@@ -190,12 +189,11 @@ static int rkss_write_section(struct rk_secure_storage *rkss)
 		printf("Could not find security partition\n");
 		return TEEC_ERROR_GENERIC;
 	}
-	ret = blk_dwrite(dev_desc, part_info.start + rkss->index, 1, rkss->data);
-	if (ret != 1) {
+	ret = blk_dwrite(dev_desc, part_info.start + index, num, data);
+	if (ret != num) {
 		printf("blk_dwrite fail \n");
 		return TEEC_ERROR_GENERIC;
 	}
-
 	return TEEC_SUCCESS;
 }
 
@@ -220,7 +218,6 @@ static int rkss_read_patition_tables(unsigned char *data)
 		printf("blk_dread fail \n");
 		return TEEC_ERROR_GENERIC;
 	}
-
 	return TEEC_SUCCESS;
 }
 
@@ -243,15 +240,23 @@ static void rkss_dump_ptable(void)
 	int i, n, ret;
 	void *pdata;
 	struct rkss_file_info *p;
+	unsigned char *table_data;
+
+	table_data = malloc(RKSS_PARTITION_TABLE_COUNT * RKSS_DATA_LEN);
+	if (table_data == NULL) {
+		printf("malloc table_data fail \n");
+		return;
+	}
+	ret = rkss_read_patition_tables(table_data);
+	if (ret < 0) {
+		printf("rkss_read_patition_tables fail ! ret: %d.", ret);
+		return;
+	}
 
 	printf("-------------- DUMP ptable --------------");
 	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++) {
 		rkss.index = i;
-		ret = rkss_read_section(&rkss);
-		if (ret < 0) {
-			printf("rkss_read_section fail ! ret: %d.", ret);
-			return;
-		}
+		memcpy(rkss.data, table_data + rkss.index * RKSS_DATA_LEN, RKSS_DATA_LEN);
 
 		for (n = 0; n < RKSS_EACH_FILEFOLDER_COUNT; n++) {
 			pdata = rkss.data;
@@ -262,6 +267,7 @@ static void rkss_dump_ptable(void)
 					p->index, p->size);
 		}
 	}
+	free(table_data);
 	printf("-------------- DUMP END --------------");
 }
 
@@ -271,44 +277,40 @@ static void rkss_dump_usedflags(void)
 	int ret;
 
 	rkss.index = RKSS_USEDFLAGS_INDEX;
-	ret = rkss_read_section(&rkss);
+	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_section fail ! ret: %d.", ret);
+		printf("rkss_read_multi_sections fail ! ret: %d.", ret);
 		return;
 	}
 	rkss_dump(rkss.data, RKSS_DATA_LEN);
 }
 #endif
 
-static int rkss_verify_ptable(struct rk_secure_storage *rkss)
+static int rkss_verify_ptable(unsigned char *table_data)
 {
-	void *vp = (void *)rkss->data;
-	char *cp = (char *)vp;
+	unsigned char *cp, *vp;
 	struct rkss_file_verification *verify;
-	int ret;
-
-	if (rkss->index > RKSS_PARTITION_TABLE_COUNT) {
-		printf("cannot support verifing other section.");
-		return TEEC_ERROR_GENERIC;
-	}
+	int ret, i;
 
-	cp = (char *)(cp + RKSS_DATA_LEN - sizeof(struct rkss_file_verification));
-	verify = (struct rkss_file_verification *)(void *)cp;
-
-	if (verify->version != RKSS_VERSION
-			|| verify->checkstr != RKSS_CHECK_STR) {
-		printf("verify [%lu] fail, cleanning ....", rkss->index);
-		memset(rkss->data, 0, RKSS_DATA_LEN);
-		verify->checkstr = RKSS_CHECK_STR;
-		verify->version = RKSS_VERSION;
-		ret = rkss_write_section(rkss);
-		if (ret < 0) {
-			printf("cleanning ptable fail ! ret: %d.", ret);
-			return TEEC_ERROR_GENERIC;
+	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++) {
+		cp = table_data + (i * RKSS_DATA_LEN);
+		vp = cp + RKSS_DATA_LEN - sizeof(struct rkss_file_verification);
+		verify = (struct rkss_file_verification *)(void *)vp;
+
+		if (verify->version != RKSS_VERSION
+				|| verify->checkstr != RKSS_CHECK_STR) {
+			printf("verify [%d] fail, cleanning ....", i);
+			memset(cp, 0, RKSS_DATA_LEN);
+			verify->checkstr = RKSS_CHECK_STR;
+			verify->version = RKSS_VERSION;
 		}
-		return TEEC_SUCCESS;
 	}
-	debug("verify success. %lu", rkss->index);
+	ret = rkss_write_multi_sections(table_data, 0, RKSS_PARTITION_TABLE_COUNT);
+	if (ret < 0) {
+		printf("rkss_write_multi_sections failed!!! ret: %d.", ret);
+		return TEEC_ERROR_GENERIC;
+	}
+	debug("verify ptable success.");
 	return TEEC_SUCCESS;
 }
 
@@ -330,7 +332,7 @@ static int rkss_verify_usedflags(struct rk_secure_storage *rkss)
 				*flagw = n & 0x1 ? (*flagw & 0xF0) | (value & 0x0F) :
 						(*flagw & 0x0F) | (value << 4);
 			}
-			ret = rkss_write_section(rkss);
+			ret = rkss_write_multi_sections(rkss->data, rkss->index, 1);
 			if (ret < 0) {
 				printf("clean usedflags section failed!!! ret: %d.", ret);
 				return TEEC_ERROR_GENERIC;
@@ -353,9 +355,9 @@ static int rkss_get_fileinfo_by_index(int fd, struct rkss_file_info *pfileinfo)
 	struct rkss_file_info *p;
 
 	rkss.index = i;
-	ret = rkss_read_section(&rkss);
+	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_section fail ! ret: %d.", ret);
+		printf("rkss_read_multi_sections fail ! ret: %d.", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -370,6 +372,7 @@ static int rkss_get_fileinfo_by_index(int fd, struct rkss_file_info *pfileinfo)
 	debug("rkss_get_fileinfo_by_index p->used = %d p->name=%s p->index=%d p->size=%d \n",
 		p->used, p->name, p->index, p->size);
 	memcpy(pfileinfo, p, sizeof(struct rkss_file_info));
+
 	return TEEC_SUCCESS;
 }
 
@@ -532,9 +535,9 @@ static int rkss_get_empty_section_from_usedflags(int section_size)
 	uint8_t value;
 
 	rkss.index = RKSS_USEDFLAGS_INDEX;
-	ret = rkss_read_section(&rkss);
+	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_section fail ! ret: %d.", ret);
+		printf("rkss_read_multi_sections fail ! ret: %d.", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -555,75 +558,74 @@ static int rkss_get_empty_section_from_usedflags(int section_size)
 	return TEEC_ERROR_GENERIC;
 }
 
-static int rkss_incref_usedflags_section(int index)
+static int rkss_incref_multi_usedflags_sections(unsigned int index, unsigned int num)
 {
 	struct rk_secure_storage rkss = {0};
-	int ret, value;
+	int ret, value, i;
 	uint8_t *flag;
 
-	if (index >= RKSS_DATA_SECTION_COUNT) {
+	if ((index + num) >= RKSS_DATA_SECTION_COUNT) {
 		printf("index[%d] out of range.", index);
 		return TEEC_ERROR_GENERIC;
 	}
 
 	rkss.index = RKSS_USEDFLAGS_INDEX;
-	ret = rkss_read_section(&rkss);
+	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_section fail ! ret: %d.", ret);
+		printf("rkss_read_multi_sections fail ! ret: %d.", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
-	flag = (uint8_t *)rkss.data + (int)index/2;
-	value = index & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
-	if (++value > 0xF) {
-		printf("reference out of data: %d", value);
-		value = 0xF;
+	for (i = 0; i < num; i++, index++) {
+		flag = (uint8_t *)rkss.data + (int)index/2;
+		value = index & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
+		if (++value > 0xF) {
+			printf("reference out of data: %d", value);
+			value = 0xF;
+		}
+		*flag = index & 0x1 ? (*flag & 0xF0) | (value & 0x0F) :
+				(*flag & 0x0F) | (value << 4);
 	}
-	*flag = index & 0x1 ? (*flag & 0xF0) | (value & 0x0F) :
-			(*flag & 0x0F) | (value << 4);
-
-	ret = rkss_write_section(&rkss);
+	ret = rkss_write_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_write_section fail ! ret: %d.", ret);
+		printf("rkss_write_multi_sections fail ! ret: %d.", ret);
 		return TEEC_ERROR_GENERIC;
 	}
-
 	return TEEC_SUCCESS;
 }
 
-static int rkss_decref_usedflags_section(int index)
+static int rkss_decref_multi_usedflags_sections(unsigned int index, unsigned int num)
 {
 	struct rk_secure_storage rkss = {0};
-	int ret, value;
+	int ret, value, i;
 	uint8_t *flag;
 
-	if (index >= RKSS_DATA_SECTION_COUNT) {
-		debug("index[%d] out of range.", index);
+	if ((index + num) >= RKSS_DATA_SECTION_COUNT) {
+		printf("index[%d] out of range.", index);
 		return TEEC_ERROR_GENERIC;
 	}
 
 	rkss.index = RKSS_USEDFLAGS_INDEX;
-	ret = rkss_read_section(&rkss);
+	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_section fail ! ret: %d.", ret);
+		printf("rkss_read_multi_sections fail ! ret: %d.", ret);
 		return TEEC_ERROR_GENERIC;
 	}
-
-	flag = (uint8_t *)rkss.data + (int)index/2;
-	value = index & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
-	if (--value < 0) {
-		printf("reference out of data: %d", value);
-		value = 0x0;
+	for (i = 0; i < num; i++, index++) {
+		flag = (uint8_t *)rkss.data + (int)index/2;
+		value = index & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
+		if (--value < 0) {
+			printf("reference out of data: %d", value);
+			value = 0x0;
+		}
+		*flag = index & 0x1 ? (*flag & 0xF0) | (value & 0x0F) :
+				(*flag & 0x0F) | (value << 4);
 	}
-	*flag = index & 0x1 ? (*flag & 0xF0) | (value & 0x0F) :
-			(*flag & 0x0F) | (value << 4);
-
-	ret = rkss_write_section(&rkss);
+	ret = rkss_write_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_write_section fail ! ret: %d.", ret);
+		printf("rkss_write_multi_sections fail ! ret: %d.", ret);
 		return TEEC_ERROR_GENERIC;
 	}
-
 	return TEEC_SUCCESS;
 }
 
@@ -662,9 +664,9 @@ static int rkss_write_empty_ptable(struct rkss_file_info *pfileinfo)
 				debug("write emt ptable : [%d,%d] name:%s, index:%d, ",
 					i, n, p->name, p->index);
 				debug("size:%d, used:%d \n",  p->size, p->used);
-				ret = rkss_write_section(&rkss);
+				ret = rkss_write_multi_sections(rkss.data, rkss.index, 1);
 				if (ret < 0) {
-					printf("rkss_write_section fail ! ret: %d.", ret);
+					printf("rkss_write_multi_sections fail ! ret: %d.", ret);
 					free(table_data);
 					return TEEC_ERROR_GENERIC;
 				}
@@ -689,9 +691,9 @@ static int rkss_write_back_ptable(int fd, struct rkss_file_info *pfileinfo)
 	struct rkss_file_info *p;
 
 	rkss.index = i;
-	ret = rkss_read_section(&rkss);
+	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_section fail ! ret: %d.", ret);
+		printf("rkss_read_multi_sections fail ! ret: %d.", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -703,14 +705,15 @@ static int rkss_write_back_ptable(int fd, struct rkss_file_info *pfileinfo)
 	debug("write ptable : [%d,%d] name:%s, index:%d, size:%d, used:%d \n",
 			i, n, p->name, p->index, p->size, p->used);
 
-	ret = rkss_write_section(&rkss);
+	ret = rkss_write_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_write_section fail ! ret: %d.", ret);
+		printf("rkss_write_multi_sections fail ! ret: %d.", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 #ifdef DEBUG_RKFSS
 	rkss_dump_ptable();
 #endif
+
 	return TEEC_SUCCESS;
 }
 
@@ -751,11 +754,12 @@ static TEEC_Result ree_fs_new_create(size_t num_params,
 {
 	char *filename;
 	int fd;
-	int ret, num, i;
+	int ret, num;
 	struct rkss_file_info p = {0};
 	/* file open flags: O_RDWR | O_CREAT | O_TRUNC
 	 * if file exists, we must remove it first.
 	 */
+
 	filename = (char *)(size_t)params[1].u.memref.shm_id;
 	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
@@ -773,12 +777,10 @@ static TEEC_Result ree_fs_new_create(size_t num_params,
 		debug("ree_fs_new_create : file exist, clear it. %s", filename);
 		/* decrease ref from usedflags */
 		num = p.size / RKSS_DATA_LEN + 1;
-		for (i = 0; i < num; i++) {
-			ret = rkss_decref_usedflags_section(p.index + i);
-			if (ret < 0) {
-				printf("rkss_decref_usedflags_section error !");
-				return TEEC_ERROR_GENERIC;
-			}
+		ret = rkss_decref_multi_usedflags_sections(p.index, num);
+		if (ret < 0) {
+			printf("rkss_decref_multi_usedflags_sections error !");
+			return TEEC_ERROR_GENERIC;
 		}
 
 		/* rm from ptable */
@@ -826,8 +828,8 @@ static TEEC_Result ree_fs_new_read(size_t num_params,
 	int fd;
 	int ret;
 	struct rkss_file_info p = {0};
-	int section_offs, num, left, di, i, read;
-	struct rk_secure_storage rkss = {0};
+	int di, section_num;
+	uint8_t *temp_file_data;
 
 	fd = params[0].u.value.b;
 	offs = params[0].u.value.c;
@@ -851,35 +853,20 @@ static TEEC_Result ree_fs_new_read(size_t num_params,
 	if (offs >= p.size)
 		return TEEC_ERROR_BAD_PARAMETERS;
 
-	section_offs = offs % RKSS_DATA_LEN;
-	num = (len + section_offs) / RKSS_DATA_LEN + 1;
-	left = len > p.size ? p.size : len;
-	di = 0;
-	debug("reading section[%d], fd:%d, len:%zu, offs:%ld, section_offs:%d, filesize:%d \n",
-			p.index, fd, len, offs, section_offs, p.size);
-	for (i = 0; i < num; i++) {
-		rkss.index = p.index + i + offs / RKSS_DATA_LEN;
-		ret = rkss_read_section(&rkss);
-		if (ret < 0) {
-			printf("unavailable file index %lu!", rkss.index);
-			return TEEC_ERROR_GENERIC;
-		}
-
-		if (i == 0) {
-			read = left > RKSS_DATA_LEN - section_offs ? RKSS_DATA_LEN - section_offs : left;
-			memcpy((char *)data + di, rkss.data + section_offs, read);
-		} else {
-			read = left > RKSS_DATA_LEN ? RKSS_DATA_LEN : left;
-			memcpy((char *)data + di, rkss.data, read);
-		}
-#ifdef DEBUG_RKFSS
-		rkss_dump((char *)data + di, read);
-#endif
-		di += read;
-		left -= read;
+	section_num = p.size / RKSS_DATA_LEN + 1;
+	temp_file_data = malloc(section_num * RKSS_DATA_LEN);
+	ret = rkss_read_multi_sections(temp_file_data, p.index, section_num);
+	if (ret < 0) {
+		printf("unavailable file index!");
+		free(temp_file_data);
+		return TEEC_ERROR_GENERIC;
 	}
-
+	di = (offs + len) > p.size ? (p.size - offs) : len;
+	memcpy(data, temp_file_data + offs, di);
+	free(temp_file_data);
+	temp_file_data = 0;
 	params[1].u.memref.size = di;
+
 	return TEEC_SUCCESS;
 }
 
@@ -889,11 +876,10 @@ static TEEC_Result ree_fs_new_write(size_t num_params,
 	uint8_t *data;
 	size_t len;
 	off_t offs;
-	struct rk_secure_storage rkss = {0};
 	struct rkss_file_info p = {0};
-	int ret, i, left, fd, new_size;
-	int section_num, di, read, lastw, ws;
-	uint8_t *file_data;
+	int ret, fd, new_size;
+	int section_num;
+	uint8_t *file_data=0, *temp_file_data=0;
 
 	fd = params[0].u.value.b;
 	offs = params[0].u.value.c;
@@ -921,32 +907,21 @@ static TEEC_Result ree_fs_new_write(size_t num_params,
 	if (p.size != 0) {
 		/* Read old file data out */
 		section_num = p.size / RKSS_DATA_LEN + 1;
-		left = p.size;
-		di = 0;
-		read = 0;
-		for (i = 0; i < section_num; i++) {
-			rkss.index = p.index + i;
-			ret = rkss_read_section(&rkss);
-			if (ret < 0) {
-				printf("unavailable file index %lu!", rkss.index);
-				ret = TEEC_ERROR_GENERIC;
-				goto out;
-			}
-
-			read = left > RKSS_DATA_LEN ? RKSS_DATA_LEN : left;
-			memcpy(file_data + di, rkss.data, read);
-#ifdef DEBUG_RKFSS
-			rkss_dump((char *)data + di, read);
-#endif
-			di += read;
-			left -= read;
-			/* decrease ref from usedflags */
-			ret = rkss_decref_usedflags_section(rkss.index);
-			if (ret < 0) {
-				printf("rkss_decref_usedflags_section error !");
-				ret = TEEC_ERROR_GENERIC;
-				goto out;
-			}
+		temp_file_data = malloc(section_num * RKSS_DATA_LEN);
+		ret = rkss_read_multi_sections(temp_file_data, p.index, section_num);
+		if (ret < 0) {
+			printf("unavailable file index %d section_num %d", p.index, section_num);
+			ret = TEEC_ERROR_GENERIC;
+			goto out;
+		}
+		memcpy(file_data, temp_file_data, p.size);
+		free(temp_file_data);
+		temp_file_data = 0;
+		ret = rkss_decref_multi_usedflags_sections(p.index, section_num);
+		if (ret < 0) {
+			printf("rkss_decref_multi_usedflags_sections error !");
+			ret = TEEC_ERROR_GENERIC;
+			goto out;
 		}
 	}
 
@@ -957,13 +932,11 @@ static TEEC_Result ree_fs_new_write(size_t num_params,
 	p.index = rkss_get_empty_section_from_usedflags(section_num);
 	debug("Get Empty section in %d \n", p.index);
 	p.used = 1;
-	for (i = 0; i < section_num; i++) {
-		ret = rkss_incref_usedflags_section(p.index + i);
-		if (ret < 0) {
-			printf("rkss_incref_usedflags_section error !");
-			ret = TEEC_ERROR_GENERIC;
-			goto out;
-		}
+	ret = rkss_incref_multi_usedflags_sections(p.index, section_num);
+	if (ret < 0) {
+		printf("rkss_incref_multi_usedflags_sections error !");
+		ret = TEEC_ERROR_GENERIC;
+		goto out;
 	}
 
 	ret = rkss_write_back_ptable(fd, &p);
@@ -974,26 +947,12 @@ static TEEC_Result ree_fs_new_write(size_t num_params,
 	}
 
 	/* write new file data */
-	left = p.size;
-	lastw = 0;
-	for (i = 0; i < section_num; i++) {
-		rkss.index = p.index + i;
-		ws = left > RKSS_DATA_LEN ? RKSS_DATA_LEN : left;
-		memset(rkss.data, 0, sizeof(rkss.data));
-		memcpy(rkss.data, file_data + lastw, ws);
-		lastw += ws;
-		left -= RKSS_DATA_LEN;
-		left = left < 0 ? 0 : left;
-#ifdef DEBUG_RKFSS
-		rkss_dump(rkss.data, ws);
-#endif
-		ret = rkss_write_section(&rkss);
-		if (ret < 0) {
-			printf("rkss_write_section: write error!");
-			ret = TEEC_ERROR_GENERIC;
-			goto out;
-		}
-	}
+	temp_file_data = malloc(section_num * RKSS_DATA_LEN);
+	memset(temp_file_data, 0, section_num * RKSS_DATA_LEN);
+	memcpy(temp_file_data, file_data, p.size);
+	rkss_write_multi_sections(temp_file_data, p.index, section_num);
+	free(temp_file_data);
+	temp_file_data = 0;
 
 #ifdef DEBUG_RKFSS
 	rkss_dump_usedflags();
@@ -1002,6 +961,10 @@ static TEEC_Result ree_fs_new_write(size_t num_params,
 out:
 	if (file_data)
 		free(file_data);
+	if (temp_file_data) {
+		free(temp_file_data);
+		temp_file_data = 0;
+	}
 
 	return TEEC_SUCCESS;
 }
@@ -1013,6 +976,7 @@ static TEEC_Result ree_fs_new_truncate(size_t num_params,
 	size_t len;
 	int fd, ret;
 	struct rkss_file_info p = {0};
+	unsigned int section_num_old, section_num_new;
 
 	fd = params[0].u.value.b;
 	len = params[0].u.value.c;
@@ -1024,7 +988,17 @@ static TEEC_Result ree_fs_new_truncate(size_t num_params,
 		printf("fd:%d unvailable!", fd);
 		return TEEC_ERROR_GENERIC;
 	}
-
+	if (len > p.size) {
+		printf("truncate error!");
+		return TEEC_ERROR_GENERIC;
+	}
+	section_num_old = p.size / RKSS_DATA_LEN + 1;
+	section_num_new = len / RKSS_DATA_LEN + 1;
+	ret = rkss_decref_multi_usedflags_sections(p.index + section_num_new, section_num_old - section_num_new);
+	if (ret < 0) {
+		printf("rkss_decref_multi_usedflags_sections error !");
+		ret = TEEC_ERROR_GENERIC;
+	}
 	p.size = len;
 	ret = rkss_write_back_ptable(fd, &p);
 	if (ret < 0) {
@@ -1040,7 +1014,7 @@ static TEEC_Result ree_fs_new_remove(size_t num_params,
 {
 	char *filename;
 	struct rkss_file_info p = {0};
-	int ret, fd, num, i;
+	int ret, fd, num;
 
 	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx \n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
@@ -1060,13 +1034,10 @@ static TEEC_Result ree_fs_new_remove(size_t num_params,
 
 	/* decrease ref from usedflags */
 	num = p.size / RKSS_DATA_LEN + 1;
-	i = 0;
-	for (i = 0; i < num; i++) {
-		ret = rkss_decref_usedflags_section(p.index + i);
-		if (ret < 0) {
-			printf("rkss_decref_usedflags_section error !");
-			return TEEC_ERROR_GENERIC;
-		}
+	ret = rkss_decref_multi_usedflags_sections(p.index, num);
+	if (ret < 0) {
+		printf("rkss_decref_multi_usedflags_sections error !");
+		return TEEC_ERROR_GENERIC;
 	}
 
 	/* rm from ptable */
@@ -1081,6 +1052,7 @@ static TEEC_Result ree_fs_new_remove(size_t num_params,
 	rkss_dump_ptable();
 	rkss_dump_usedflags();
 #endif
+
 	return TEEC_SUCCESS;
 }
 
@@ -1205,39 +1177,42 @@ int tee_supp_rk_fs_init(void)
 	assert(sizeof(struct rkss_file_info) == 126);
 	assert(512 / sizeof(struct rkss_file_info) == RKSS_EACH_FILEFOLDER_COUNT);
 
-	int i, ret;
+	int ret;
 	struct rk_secure_storage rkss = {0};
+	unsigned char *table_data;
 
 	/* clean secure storage*/
 #ifdef DEBUG_CLEAN_RKSS
+	int i = 0;
 	for (i = 0; i < RKSS_DATA_SECTION_COUNT; i++) {
 		memset(rkss.data, 0, RKSS_DATA_LEN);
 		rkss.index = i;
-		rkss_write_section(&rkss);
+		rkss_write_multi_sections(rkss.data, rkss.index, 1);
 		printf("cleaned [%d]", i);
 	}
 #endif
 
-	/* Verify Partition Table*/
-	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++) {
-		debug("rkss_get_fileinfo_by_name: reading %d", i);
-		rkss.index = i;
-		ret = rkss_read_section(&rkss);
-		if (ret < 0) {
-			printf("rkss_read_section fail ! ret: %d.", ret);
-			return TEEC_ERROR_GENERIC;
-		}
-		if (rkss_verify_ptable(&rkss) < 0) {
-			printf("rkss_verify_ptable fail !");
-			return TEEC_ERROR_GENERIC;
-		}
+	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
+	if (table_data == NULL) {
+		printf("malloc table_data fail \n");
+		return TEEC_ERROR_GENERIC;
 	}
+	ret = rkss_read_patition_tables(table_data);
+	if (ret < 0) {
+		printf("rkss_read_patition_tables fail ! ret: %d.", ret);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	/* Verify Partition Table*/
+	rkss_verify_ptable(table_data);
+	free(table_data);
+	table_data = NULL;
 
 	/* Verify Usedflags Section*/
 	rkss.index = RKSS_USEDFLAGS_INDEX;
-	ret = rkss_read_section(&rkss);
+	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_section fail ! ret: %d.", ret);
+		printf("rkss_read_multi_sections fail ! ret: %d.", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 	ret = rkss_verify_usedflags(&rkss);
diff --git a/lib/optee_clientApi/OpteeClientRkFs.c b/lib/optee_clientApi/OpteeClientRkFs.c
index c38a128fdf..4281dcb56b 100644
--- a/lib/optee_clientApi/OpteeClientRkFs.c
+++ b/lib/optee_clientApi/OpteeClientRkFs.c
@@ -161,32 +161,67 @@ extern unsigned long blk_dread(struct blk_desc *block_dev, lbaint_t start,
 extern unsigned long blk_dwrite(struct blk_desc *block_dev, lbaint_t start,
 			 lbaint_t blkcnt, const void *buffer);
 
-static int rkss_read_section(struct rk_secure_storage *rkss)
+static int rkss_read_multi_sections(unsigned char *data, unsigned long index, unsigned int num)
 {
-	int ret;
+	unsigned long ret;
 	struct blk_desc *dev_desc;
 	disk_partition_t part_info;
 
 	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {
-		debug("%s: Could not find device\n", __func__);
+		printf("%s: Could not find device\n", __func__);
 		return -1;
 	}
 
 	if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
-		debug("Could not find security partition\n");
+		printf("Could not find security partition\n");
 		return -1;
 	}
-	ret = blk_dread(dev_desc, part_info.start + rkss->index, 1, rkss->data);
-	if (ret < 0)
+	ret = blk_dread(dev_desc, part_info.start + index, num, data);
+	if (ret != num) {
+		printf("blk_dread fail \n");
 		return -1;
+	}
+	return 0;
+}
+
+static int rkss_read_section(struct rk_secure_storage *rkss)
+{
+	return rkss_read_multi_sections(rkss->data, rkss->index, 1);
+}
 
+static int rkss_write_multi_sections(unsigned char *data, unsigned long index, unsigned int num)
+{
+	unsigned long ret;
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: Could not find device\n", __func__);
+		return -1;
+	}
+
+	if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
+		printf("Could not find security partition\n");
+		return -1;
+	}
+	ret = blk_dwrite(dev_desc, part_info.start + index, num, data);
+	if (ret != num) {
+		printf("blk_dwrite fail \n");
+		return -1;
+	}
 	return 0;
 }
 
 static int rkss_write_section(struct rk_secure_storage *rkss)
 {
-	int ret;
+	return rkss_write_multi_sections(rkss->data, rkss->index, 1);
+}
+
+static int rkss_read_patition_tables(unsigned char *data)
+{
+	unsigned long ret;
 	struct blk_desc *dev_desc;
 	disk_partition_t part_info;
 
@@ -200,10 +235,11 @@ static int rkss_write_section(struct rk_secure_storage *rkss)
 		printf("Could not find security partition\n");
 		return -1;
 	}
-	ret = blk_dwrite(dev_desc, part_info.start + rkss->index, 1, rkss->data);
-	if (ret < 0)
+	ret = blk_dread(dev_desc, part_info.start, RKSS_PARTITION_TABLE_COUNT, data);
+	if (ret != RKSS_PARTITION_TABLE_COUNT) {
+		printf("blk_dread fail \n");
 		return -1;
-
+	}
 	return 0;
 }
 
@@ -224,17 +260,26 @@ static void rkss_dump(void* data, unsigned int len)
 static void rkss_dump_ptable(void)
 {
 	printf("-------------- DUMP ptable --------------");
-	int i = 0;
+	int i = 0, ret;
+	unsigned char *table_data;
+
+	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
+	if (table_data == NULL) {
+		printf("malloc table_data fail \n");
+		return;
+	}
+	ret = rkss_read_patition_tables(table_data);
+	if (ret < 0) {
+		printf("rkss_read_patition_tables fail ! ret: %d.", ret);
+		free(table_data);
+		return;
+	}
+
 	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++)
 	{
 		struct rk_secure_storage rkss = {0};
 		rkss.index = i;
-		int ret = rkss_read_section(&rkss);
-		if (ret < 0)
-		{
-			printf("rkss_read_section fail ! ret: %d.", ret);
-			return;
-		}
+		memcpy(rkss.data, table_data + rkss.index * RKSS_DATA_LEN, RKSS_DATA_LEN);
 
 		int n ;
 		for (n = 0; n < RKSS_EACH_FILEFOLDER_COUNT; n++)
@@ -248,6 +293,7 @@ static void rkss_dump_ptable(void)
 					p->index, p->size);
 		}
 	}
+	free(table_data);
 	printf("-------------- DUMP END --------------");
 }
 
@@ -265,63 +311,54 @@ static void rkss_dump_usedflags(void)
 }
 #endif
 
-static int rkss_verify_ptable(struct rk_secure_storage* rkss)
+static int rkss_verify_ptable(unsigned char *table_data)
 {
-	void *vp = (void *)rkss->data;
-	char *cp = (char *)vp;
-
-	if ( rkss->index > RKSS_PARTITION_TABLE_COUNT)
-	{
-		printf("cannot support verifing other section.");
-		return 0;
-	}
-
-	cp = (char *)(cp + RKSS_DATA_LEN - sizeof(struct rkss_file_verification));
-	struct rkss_file_verification *verify =
-			(struct rkss_file_verification *)(void *)cp;
-
-	if (verify->version != RKSS_VERSION
-			|| verify->checkstr != RKSS_CHECK_STR)
-	{
-		debug("verify [%lu] fail, cleanning ....", rkss->index);
-		memset(rkss->data, 0, RKSS_DATA_LEN);
-		verify->checkstr = RKSS_CHECK_STR;
-		verify->version = RKSS_VERSION;
-		int ret = rkss_write_section(rkss);
-		if (ret < 0)
-		{
-			printf("cleanning ptable fail ! ret: %d.", ret);
-			return -1;
+	unsigned char *cp, *vp;
+	struct rkss_file_verification *verify;
+	int ret, i;
+
+	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++) {
+		cp = table_data + (i * RKSS_DATA_LEN);
+		vp = cp + RKSS_DATA_LEN - sizeof(struct rkss_file_verification);
+		verify = (struct rkss_file_verification *)(void *)vp;
+
+		if (verify->version != RKSS_VERSION
+				|| verify->checkstr != RKSS_CHECK_STR) {
+			printf("verify [%d] fail, cleanning ....", i);
+			memset(cp, 0, RKSS_DATA_LEN);
+			verify->checkstr = RKSS_CHECK_STR;
+			verify->version = RKSS_VERSION;
 		}
-		return 0;
 	}
+	ret = rkss_write_multi_sections(table_data, 0, RKSS_PARTITION_TABLE_COUNT);
+	if (ret < 0) {
+		printf("rkss_write_multi_sections failed!!! ret: %d.", ret);
+		return -1;
+	}
+	debug("verify ptable success.");
 	return 0;
 }
 
-static int rkss_verify_usedflags(struct rk_secure_storage* rkss)
+static int rkss_verify_usedflags(struct rk_secure_storage *rkss)
 {
 	uint8_t *flags = (uint8_t *)rkss->data;
+	int i, duel, flag, n, value, ret;
+	uint8_t *flagw;
 
-	int i = 0;
-	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT + 1; i++)
-	{
-		int duel = *(flags + (int)i/2);
-		int flag = i & 0x1 ? duel & 0x0F : (duel & 0xF0) >> 4;
-		if ( flag != 0x1 )
-		{
+	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT + 1; i++) {
+		duel = *(flags + (int)i/2);
+		flag = i & 0x1 ? duel & 0x0F : (duel & 0xF0) >> 4;
+		if (flag != 0x1) {
 			debug("init usedflags section ...");
 			memset(rkss->data, 0x00, RKSS_DATA_LEN);
-			int n = 0;
-			for (n = 0; n < RKSS_PARTITION_TABLE_COUNT + 1; n++)
-			{
-				uint8_t *flagw = (uint8_t *)rkss->data + (int)n/2;
-				uint8_t value = 0x1;
+			for (n = 0; n < RKSS_PARTITION_TABLE_COUNT + 1; n++) {
+				flagw = (uint8_t *)rkss->data + (int)n/2;
+				value = 0x1;
 				*flagw = n & 0x1 ? (*flagw & 0xF0) | (value & 0x0F) :
 						(*flagw & 0x0F) | (value << 4);
 			}
-			int ret = rkss_write_section(rkss);
-			if (ret < 0)
-			{
+			ret = rkss_write_multi_sections(rkss->data, rkss->index, 1);
+			if (ret < 0) {
 				printf("clean usedflags section failed!!! ret: %d.", ret);
 				return -1;
 			}
@@ -329,6 +366,7 @@ static int rkss_verify_usedflags(struct rk_secure_storage* rkss)
 			return 0;
 		}
 	}
+	debug("rkss_verify_usedflags: sucess.");
 	return 0;
 }
 
@@ -336,36 +374,40 @@ static int rkss_get_fileinfo_by_index(int fd, struct rkss_file_info *pfileinfo)
 {
 	int i = fd / RKSS_EACH_FILEFOLDER_COUNT;
 	int n = fd - (RKSS_EACH_FILEFOLDER_COUNT * i);
-
 	struct rk_secure_storage rkss = {0};
+	int ret;
+	void *pdata;
+	struct rkss_file_info *p;
+
 	rkss.index = i;
-	int ret = rkss_read_section(&rkss);
-	if (ret < 0)
-	{
-		printf("rkss_read_section fail ! ret: %d.", ret);
+	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
+	if (ret < 0) {
+		printf("rkss_read_multi_sections fail ! ret: %d.", ret);
 		return -1;
 	}
 
-	void *pdata = rkss.data;
-	struct rkss_file_info *p = (struct rkss_file_info *)pdata;
+	pdata = rkss.data;
+	p = (struct rkss_file_info *)pdata;
 	p += n;
 
-	if (p->used != 1)
-	{
-		printf("error: unused section! ");
+	if (p->used != 1) {
+		debug("error: unused section! ");
 		return -1;
 	}
-
+	debug("rkss_get_fileinfo_by_index p->used = %d p->name=%s p->index=%d p->size=%d \n",
+		p->used, p->name, p->index, p->size);
 	memcpy(pfileinfo, p, sizeof(struct rkss_file_info));
+
 	return 0;
 }
 
 static int rkss_get_fileinfo_by_name(
 		char* filename, struct rkss_file_info *pfileinfo)
 {
-	int i = 0;
+	int i = 0, ret;
 	uint8_t n = 0;
 	unsigned int len;
+	unsigned char *table_data;
 
 	len = strlen(filename);
 	if (len > RKSS_NAME_MAX_LENGTH - 1)
@@ -374,16 +416,23 @@ static int rkss_get_fileinfo_by_name(
 		return -1;
 	}
 
+	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
+	if (table_data == NULL) {
+		printf("malloc table_data fail \n");
+		return -1;
+	}
+	ret = rkss_read_patition_tables(table_data);
+	if (ret < 0) {
+		printf("rkss_read_patition_tables fail ! ret: %d.", ret);
+		free(table_data);
+		return -1;
+	}
+
 	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++)
 	{
 		struct rk_secure_storage rkss = {0};
 		rkss.index = i;
-		int ret = rkss_read_section(&rkss);
-		if (ret < 0)
-		{
-			printf("rkss_read_section fail ! ret: %d.", ret);
-			return -1;
-		}
+		memcpy(rkss.data, table_data + rkss.index * RKSS_DATA_LEN, RKSS_DATA_LEN);
 
 		for (n = 0; n < RKSS_EACH_FILEFOLDER_COUNT; n++)
 		{
@@ -399,6 +448,7 @@ static int rkss_get_fileinfo_by_name(
 				debug("rkss_get_fileinfo_by_name: hit table[%d/%d], index[%d/%d]",
 						i, RKSS_PARTITION_TABLE_COUNT, n, RKSS_EACH_FILEFOLDER_COUNT);
 				memcpy(pfileinfo, p, sizeof(struct rkss_file_info));
+				free(table_data);
 				return i * RKSS_EACH_FILEFOLDER_COUNT + n;
 			}
 
@@ -427,20 +477,23 @@ static int rkss_get_fileinfo_by_name(
 			} while(cur_inpos && cur_svpos);
 
 			debug("Matched folder: %s", p->name);
+			free(table_data);
 			return -100;
 UNMATCHFOLDER:
 			debug("Unmatched ...");
 		}
 	}
 	debug("rkss_get_fileinfo_by_name: file or dir no found!");
+	free(table_data);
 	return -1;
 }
 
 static int rkss_get_dirs_by_name(char* filename)
 {
-	int i = 0;
+	int i = 0, ret;
 	uint8_t n = 0;
 	unsigned int len;
+	unsigned char *table_data;
 
 	len = strlen(filename);
 	if (len > RKSS_NAME_MAX_LENGTH - 1)
@@ -449,17 +502,24 @@ static int rkss_get_dirs_by_name(char* filename)
 		return -1;
 	}
 
+	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
+	if (table_data == NULL) {
+		printf("malloc table_data fail \n");
+		return -1;
+	}
+	ret = rkss_read_patition_tables(table_data);
+	if (ret < 0) {
+		printf("rkss_read_patition_tables fail ! ret: %d.", ret);
+		free(table_data);
+		return -1;
+	}
+
 	dir_num = 0;
 	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++)
 	{
 		struct rk_secure_storage rkss = {0};
 		rkss.index = i;
-		int ret = rkss_read_section(&rkss);
-		if (ret < 0)
-		{
-			printf("rkss_read_section fail ! ret: %d.", ret);
-			return -1;
-		}
+		memcpy(rkss.data, table_data + rkss.index * RKSS_DATA_LEN, RKSS_DATA_LEN);
 
 		for (n = 0; n < RKSS_EACH_FILEFOLDER_COUNT; n++)
 		{
@@ -488,6 +548,7 @@ static int rkss_get_dirs_by_name(char* filename)
 			}
 		}
 	}
+	free(table_data);
 	return dir_num;
 }
 
@@ -526,95 +587,100 @@ static int rkss_get_empty_section_from_usedflags(int section_size)
 	return -10;
 }
 
-static int rkss_incref_usedflags_section(int index)
+static int rkss_incref_multi_usedflags_sections(unsigned int index, unsigned int num)
 {
-	debug("rkss_incref_usedflags_section :%d", index);
-	if (index >= RKSS_DATA_SECTION_COUNT)
-	{
+	struct rk_secure_storage rkss = {0};
+	int ret, value, i;
+	uint8_t *flag;
+
+	if ((index + num) >= RKSS_DATA_SECTION_COUNT) {
 		printf("index[%d] out of range.", index);
 		return -1;
 	}
 
-	struct rk_secure_storage rkss = {0};
 	rkss.index = RKSS_USEDFLAGS_INDEX;
-	int ret = rkss_read_section(&rkss);
-	if (ret < 0)
-	{
-		printf("rkss_read_section fail ! ret: %d.", ret);
+	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
+	if (ret < 0) {
+		printf("rkss_read_multi_sections fail ! ret: %d.", ret);
 		return -1;
 	}
 
-	uint8_t *flag = (uint8_t *)rkss.data + (int)index/2;
-	int value = index & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
-	if (++value > 0xF)
-	{
-		printf("reference out of data: %d", value);
-		value = 0xF;
+	for (i = 0; i < num; i++, index++) {
+		flag = (uint8_t *)rkss.data + (int)index/2;
+		value = index & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
+		if (++value > 0xF) {
+			printf("reference out of data: %d", value);
+			value = 0xF;
+		}
+		*flag = index & 0x1 ? (*flag & 0xF0) | (value & 0x0F) :
+				(*flag & 0x0F) | (value << 4);
 	}
-	*flag = index & 0x1 ? (*flag & 0xF0) | (value & 0x0F) :
-			(*flag & 0x0F) | (value << 4);
-
-	ret = rkss_write_section(&rkss);
-	if (ret < 0)
-	{
-		printf("rkss_write_section fail ! ret: %d.", ret);
+	ret = rkss_write_multi_sections(rkss.data, rkss.index, 1);
+	if (ret < 0) {
+		printf("rkss_write_multi_sections fail ! ret: %d.", ret);
 		return -1;
 	}
-
 	return 0;
 }
 
-static int rkss_decref_usedflags_section(int index)
+static int rkss_decref_multi_usedflags_sections(unsigned int index, unsigned int num)
 {
-	debug("rkss_decref_usedflags_section :%d", index);
-	if (index >= RKSS_DATA_SECTION_COUNT)
-	{
+	struct rk_secure_storage rkss = {0};
+	int ret, value, i;
+	uint8_t *flag;
+
+	if ((index + num) >= RKSS_DATA_SECTION_COUNT) {
 		printf("index[%d] out of range.", index);
 		return -1;
 	}
 
-	struct rk_secure_storage rkss = {0};
 	rkss.index = RKSS_USEDFLAGS_INDEX;
-	int ret = rkss_read_section(&rkss);
-	if (ret < 0)
-	{
-		printf("rkss_read_section fail ! ret: %d.", ret);
+	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
+	if (ret < 0) {
+		printf("rkss_read_multi_sections fail ! ret: %d.", ret);
 		return -1;
 	}
-
-	uint8_t *flag = (uint8_t *)rkss.data + (int)index/2;
-	int value = index & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
-	if (--value < 0)
-	{
-		printf("reference out of data: %d", value);
-		value = 0x0;
+	for (i = 0; i < num; i++, index++) {
+		flag = (uint8_t *)rkss.data + (int)index/2;
+		value = index & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
+		if (--value < 0) {
+			printf("reference out of data: %d", value);
+			value = 0x0;
+		}
+		*flag = index & 0x1 ? (*flag & 0xF0) | (value & 0x0F) :
+				(*flag & 0x0F) | (value << 4);
 	}
-	*flag = index & 0x1 ? (*flag & 0xF0) | (value & 0x0F) :
-			(*flag & 0x0F) | (value << 4);
-
-	ret = rkss_write_section(&rkss);
-	if (ret < 0)
-	{
-		printf("rkss_write_section fail ! ret: %d.", ret);
+	ret = rkss_write_multi_sections(rkss.data, rkss.index, 1);
+	if (ret < 0) {
+		printf("rkss_write_multi_sections fail ! ret: %d.", ret);
 		return -1;
 	}
-
 	return 0;
 }
 
 static int rkss_write_empty_ptable(struct rkss_file_info *pfileinfo)
 {
-	int i = 0;
+	int i = 0, ret;
+	unsigned char *table_data;
+
+	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
+	if (table_data == NULL) {
+		printf("malloc table_data fail \n");
+		return -1;
+	}
+
+	ret = rkss_read_patition_tables(table_data);
+	if (ret < 0) {
+		printf("rkss_read_patition_tables fail ! ret: %d.", ret);
+		free(table_data);
+		return -1;
+	}
+
 	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++)
 	{
 		struct rk_secure_storage rkss = {0};
 		rkss.index = i;
-		int ret = rkss_read_section(&rkss);
-		if (ret < 0)
-		{
-			printf("rkss_read_section fail ! ret: %d.", ret);
-			return -1;
-		}
+		memcpy(rkss.data, table_data + rkss.index * RKSS_DATA_LEN, RKSS_DATA_LEN);
 
 		int n = 0;
 		for (n = 0; n < RKSS_EACH_FILEFOLDER_COUNT; n++)
@@ -634,14 +700,16 @@ static int rkss_write_empty_ptable(struct rkss_file_info *pfileinfo)
 				if (ret < 0)
 				{
 					printf("rkss_write_section fail ! ret: %d.", ret);
+					free(table_data);
 					return -1;
 				}
-
+				free(table_data);
 				return i * RKSS_EACH_FILEFOLDER_COUNT + n;
 			}
 		}
 	}
 	printf("No enough ptable space available in secure storage.");
+	free(table_data);
 	return -1;
 }
 
@@ -783,30 +851,21 @@ static int tee_fs_read(struct tee_fs_rpc *fsrpc)
 	}
 
 	int num = fsrpc->len / RKSS_DATA_LEN + 1;
-	int left = fsrpc->len > p.size ? p.size : fsrpc->len;
 	int di = 0;
 	debug("reading section[%d], fd:%d, len:%d, filesize:%d",
 			p.index, fsrpc->fd, fsrpc->len, p.size);
-	int i = 0;
-	for (i = 0; i < num; i++)
-	{
-		struct rk_secure_storage rkss = {0};
-		rkss.index = p.index + i;
-		ret = rkss_read_section(&rkss);
-		if (ret < 0)
-		{
-			printf("unavailable file index %lu!", rkss.index);
-			return -1;
-		}
 
-		int read = left > RKSS_DATA_LEN ? RKSS_DATA_LEN : left;
-		memcpy(data + di, rkss.data, read);
-#ifdef DEBUG_RKFSS
-		rkss_dump(data + di, read);
-#endif
-		di += read;
-		left -= read;
+	uint8_t *temp_file_data = malloc(num * RKSS_DATA_LEN);
+	ret = rkss_read_multi_sections(temp_file_data, p.index, num);
+	if (ret < 0) {
+		printf("unavailable file index");
+		free(temp_file_data);
+		return -1;
 	}
+	di = fsrpc->len > p.size ? p.size : fsrpc->len;
+	memcpy(data, temp_file_data, di);
+	free(temp_file_data);
+	temp_file_data = 0;
 	return di;
 }
 
@@ -839,15 +898,11 @@ static int tee_fs_write(struct tee_fs_rpc *fsrpc)
 	p.index = rkss_get_empty_section_from_usedflags(num);
 	debug("Get Empty section in %d", p.index);
 	p.used = 1;
-	int i = 0;
-	for (i = 0; i < num; i++)
-	{
-		ret = rkss_incref_usedflags_section(p.index + i);
-		if (ret < 0)
-		{
-			printf("rkss_incref_usedflags_section error !");
-			return -1;
-		}
+
+	ret = rkss_incref_multi_usedflags_sections(p.index, num);
+	if (ret < 0) {
+		printf("rkss_incref_multi_usedflags_sections error !");
+		ret = -1;
 	}
 
 	ret = rkss_write_back_ptable(fsrpc->fd, &p);
@@ -857,28 +912,12 @@ static int tee_fs_write(struct tee_fs_rpc *fsrpc)
 		return -1;
 	}
 
-	int left = p.size;
-	int lastw = 0;
-	for (i = 0; i < num; i++)
-	{
-		struct rk_secure_storage rkss = {0};
-		rkss.index = p.index + i;
-		int ws = left > RKSS_DATA_LEN ? RKSS_DATA_LEN : left;
-		memcpy(rkss.data, (char *)data + lastw, ws);
-		lastw += ws;
-		left -= RKSS_DATA_LEN;
-		left = left < 0 ? 0 : left;
-		debug("writing: fd:%d, section[%lu], size:%d", fsrpc->fd, rkss.index, ws);
-#ifdef DEBUG_RKFSS
-		rkss_dump(rkss.data, ws);
-#endif
-		ret = rkss_write_section(&rkss);
-		if (ret < 0)
-		{
-			printf("rkss_write_section: write error!");
-			return -1;
-		}
-	}
+	uint8_t *temp_file_data = malloc(num * RKSS_DATA_LEN);
+	memset(temp_file_data, 0, num * RKSS_DATA_LEN);
+	memcpy(temp_file_data, data, p.size);
+	rkss_write_multi_sections(temp_file_data, p.index, num);
+	free(temp_file_data);
+	temp_file_data = 0;
 
 #ifdef DEBUG_RKFSS
 	rkss_dump_usedflags();
@@ -937,15 +976,11 @@ static int tee_fs_unlink(struct tee_fs_rpc *fsrpc)
 
 	/* decrease ref from usedflags */
 	int num = p.size / RKSS_DATA_LEN + 1;
-	int i = 0;
-	for (i = 0; i < num; i++)
+	ret = rkss_decref_multi_usedflags_sections(p.index, num);
+	if (ret < 0)
 	{
-		ret = rkss_decref_usedflags_section(p.index + i);
-		if (ret < 0)
-		{
-			printf("rkss_decref_usedflags_section error !");
-			return -1;
-		}
+		printf("rkss_decref_multi_usedflags_sections error !");
+		return -1;
 	}
 
 	/* rm from ptable */
@@ -998,15 +1033,11 @@ static int tee_fs_link(struct tee_fs_rpc *fsrpc)
 	}
 
 	int num = p_new.size / RKSS_DATA_LEN + 1;
-	int i = 0;
-	for (i = 0; i < num; i++)
+	ret = rkss_incref_multi_usedflags_sections(p_new.index, num);
+	if (ret < 0)
 	{
-		ret = rkss_incref_usedflags_section(p_new.index + i);
-		if (ret < 0)
-		{
-			printf("rkss_incref_usedflags_section error !");
-			return -1;
-		}
+		printf("rkss_incref_multi_usedflags_sections error !");
+		return -1;
 	}
 
 #ifdef DEBUG_RKFSS
@@ -1179,7 +1210,8 @@ int tee_supp_rk_fs_init(void)
 	assert(sizeof(struct rkss_file_info) == 126);
 	assert(512 / sizeof(struct rkss_file_info) == RKSS_EACH_FILEFOLDER_COUNT);
 
-	int i = 0;
+	__maybe_unused int i = 0;
+	unsigned char *table_data;
 #ifdef DEBUG_CLEAN_RKSS // clean secure storage
 	for (i = 0; i < RKSS_DATA_SECTION_COUNT; i++)
 	{
@@ -1192,28 +1224,32 @@ int tee_supp_rk_fs_init(void)
 #endif
 
 	// Verify Partition Table
-	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++)
-	{
-		//DMSG("rkss_get_fileinfo_by_name: reading %d",i);
-		struct rk_secure_storage rkss = {0};
-		rkss.index = i;
-		int ret = rkss_read_section(&rkss);
-		if (ret < 0)
-		{
-			debug("rkss_read_section fail ! ret: %d.", ret);
-			return -1;
-		}
-		if (rkss_verify_ptable(&rkss) < 0)
-		{
-			printf("rkss_verify_ptable fail !");
-			return -1;
-		}
+	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
+	if (table_data == NULL) {
+		printf("malloc table_data fail \n");
+		return -1;
 	}
+	int ret = rkss_read_patition_tables(table_data);
+	if (ret < 0) {
+		printf("rkss_read_patition_tables fail ! ret: %d.", ret);
+		free(table_data);
+		return -1;
+	}
+
+	/* Verify Partition Table*/
+	ret = rkss_verify_ptable(table_data);
+	if (ret < 0) {
+		printf("rkss_verify_ptable fail ! ret: %d.", ret);
+		free(table_data);
+		return -1;
+	}
+	free(table_data);
+	table_data = NULL;
 
 	// Verify Usedflags Section
 	struct rk_secure_storage rkss = {0};
 	rkss.index = RKSS_USEDFLAGS_INDEX;
-	int ret = rkss_read_section(&rkss);
+	ret = rkss_read_section(&rkss);
 	if (ret < 0)
 	{
 		printf("rkss_read_section fail ! ret: %d.", ret);

commit 0c0ee60291e48cd1cc6fb05dddf363cd816237fb
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Tue Sep 4 16:42:31 2018 +0800

    phy: rockchip: getting usb-phy device by name
    
    Amend getting usb-phy device by name instead of by index in case that
    various phy devices were existed in DT.
    
    Change-Id: I39e094e0319706554703c52997dd132d9a3e1fad
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index de1a74271a..010c745be7 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -255,7 +255,7 @@ int rockchip_chg_get_type(void)
 	bool is_dcd, vout;
 	int ret;
 
-	ret = uclass_get_device(UCLASS_PHY, 0, &udev);
+	ret = uclass_get_device_by_name(UCLASS_PHY, "usb2-phy", &udev);
 	if (ret == -ENODEV) {
 		pr_err("%s: get u2phy node failed: %d\n", __func__, ret);
 		return ret;
@@ -366,7 +366,7 @@ void otg_phy_init(struct dwc2_udc *dev)
 	void __iomem *base;
 	int ret;
 
-	ret = uclass_get_device(UCLASS_PHY, 0, &udev);
+	ret = uclass_get_device_by_name(UCLASS_PHY, "usb2-phy", &udev);
 	if (ret == -ENODEV) {
 		pr_err("%s: get u2phy node failed: %d\n", __func__, ret);
 		return;

commit f26f96c5879c31a180c636608c1664e793dd0cf1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 30 17:52:08 2018 +0800

    test: rockchip: add rockusb and fastboot cmd
    
    Change-Id: I23072323c2f2ee655a57af0150c2cb90135d3227
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/test/rockchip/test-rockchip.c b/test/rockchip/test-rockchip.c
index ec770d0ae5..303eb3a880 100644
--- a/test/rockchip/test-rockchip.c
+++ b/test/rockchip/test-rockchip.c
@@ -14,6 +14,16 @@ typedef struct board_module {
 	int (*test)(int argc, char * const argv[]);
 } board_module_t;
 
+static int board_rockusb_test(int argc, char * const argv[])
+{
+	return run_command_list("rockusb 0 ${devtype} ${devnum}", -1, 0);
+}
+
+static int board_fastboot_test(int argc, char * const argv[])
+{
+	return run_command_list("fastboot usb 0", -1, 0);
+}
+
 static board_module_t g_board_modules[] = {
 #if defined(CONFIG_IRQ)
 	{
@@ -27,7 +37,16 @@ static board_module_t g_board_modules[] = {
 		.desc = "enter bootrom download mode",
 		.test = board_brom_dnl_test
 	},
-
+	{
+		.name = "rockusb",
+		.desc = "enter rockusb download mode",
+		.test = board_rockusb_test
+	},
+	{
+		.name = "fastboot",
+		.desc = "enter fastboot download mode",
+		.test = board_fastboot_test
+	},
 #if defined(CONFIG_DM_KEY)
 	{
 		.name = "key",
@@ -85,7 +104,7 @@ static void help(void)
 	int i;
 
 	printf("Command: rktest [module] [args...]\n"
-	       "  - module: timer|key|emmc|rknand|regulator|eth|ir|brom|vendor\n"
+	       "  - module: timer|key|emmc|rknand|regulator|eth|ir|brom|rockusb|fastboot|vendor\n"
 	       "  - args: depends on module, try 'rktest [module]' for test or more help\n\n");
 
 	printf("  - Enabled modules:\n");

commit 175257e48ba541b92e6fe8f5a3a724f00f1dd5e5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 4 17:06:36 2018 +0800

    power: charge animation: support without CONFIG_IRQ enabled
    
    If CONFIG_IRQ is not enabled, cpu can't suspend to ATF or wfi,
    so that the wakeup period timer is useless.
    
    Give a message warning when CONFIG_IRQ is not enabled.
    
    Change-Id: I9af7e7114ab5d3b3d1026a3ba19ce6cbe56399eb
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index bd89383405..854e961798 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -12,7 +12,6 @@
 #include <errno.h>
 #include <key.h>
 #include <pwm.h>
-#include <irq-generic.h>
 #include <asm/arch/rockchip_smccc.h>
 #include <asm/suspend.h>
 #include <linux/input.h>
@@ -23,8 +22,11 @@
 #include <power/pmic.h>
 #include <power/rk8xx_pmic.h>
 #include <power/regulator.h>
-#include <rk_timer_irq.h>
 #include <video_rockchip.h>
+#ifdef CONFIG_IRQ
+#include <irq-generic.h>
+#include <rk_timer_irq.h>
+#endif
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -141,6 +143,20 @@ static int check_key_press(struct udevice *dev)
 	return state;
 }
 
+/*
+ * If not enable CONFIG_IRQ, cpu can't suspend to ATF or wfi, so that wakeup
+ * period timer is useless.
+ */
+#ifndef CONFIG_IRQ
+static int system_suspend_enter(struct charge_animation_pdata *pdata)
+{
+	return 0;
+}
+
+static void autowakeup_timer_init(struct udevice *dev, uint32_t seconds) {}
+static void autowakeup_timer_uninit(void) {}
+
+#else
 static int system_suspend_enter(struct charge_animation_pdata *pdata)
 {
 	if (pdata->system_suspend && IS_ENABLED(CONFIG_ARM_SMCCC)) {
@@ -179,7 +195,6 @@ static int system_suspend_enter(struct charge_animation_pdata *pdata)
 
 	return 0;
 }
-
 static void timer_irq_handler(int irq, void *data)
 {
 	struct udevice *dev = data;
@@ -214,6 +229,7 @@ static void autowakeup_timer_uninit(void)
 {
 	irq_free_handler(TIMER_IRQ);
 }
+#endif
 
 #ifdef CONFIG_DRM_ROCKCHIP
 static void charge_show_bmp(const char *name)
@@ -385,7 +401,12 @@ static int charge_animation_show(struct udevice *dev)
 		autowakeup_timer_init(dev, pdata->auto_wakeup_interval);
 	}
 
+/* Give a message warning when CONFIG_IRQ is not enabled */
+#ifdef CONFIG_IRQ
 	printf("Enter U-Boot charging mode\n");
+#else
+	printf("Enter U-Boot charging mode(without IRQ)\n");
+#endif
 
 	charge_start = get_timer(0);
 	delta = get_timer(0);

commit 5166b2759b64d7b88a70f71cdb9a873ddee3630c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 4 16:58:47 2018 +0800

    fuel gauge: rk816: fix compile warning
    
    Change-Id: I934f7a6b75c58d8827e0f0fa1838054608ff77f1
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk816.c b/drivers/power/fuel_gauge/fg_rk816.c
index aa601ee39d..7257211d60 100644
--- a/drivers/power/fuel_gauge/fg_rk816.c
+++ b/drivers/power/fuel_gauge/fg_rk816.c
@@ -930,9 +930,9 @@ static int rk816_bat_get_charger_type(struct battery_priv *di)
 
 static bool rk816_bat_need_initialize(struct battery_priv *di)
 {
-	struct charge_animation_pdata *pdata;
 	bool initialize = false;
 #ifdef CONFIG_DM_CHARGE_DISPLAY
+	struct charge_animation_pdata *pdata;
 	struct udevice *dev;
 	int est_voltage;
 

commit 2146330a8a382031fcb0c32013014803aaf6f328
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Aug 14 20:17:12 2018 +0800

    power: charge animaition doesn't depends on ROCKCHIP_DRM_ROCKCHIP
    
    at some time, we need virtual power mode supported by fuel gauge to
    set a static adapter input current, which don't reall want charge
    animation images show.
    
    Change-Id: If256b15eb585990f5c99781f830480b0d0a83cb4
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index 0e5b1c84cf..d1eac1757f 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -77,7 +77,7 @@ endchoice
 
 config CHARGE_ANIMATION
 	bool "Enable charge animation"
-	depends on DM_CHARGE_DISPLAY && DM_FUEL_GAUGE && DRM_ROCKCHIP
+	depends on DM_CHARGE_DISPLAY && DM_FUEL_GAUGE
 	help
 	  This adds a simple function for charge animation display.
 

commit 1e7c429d5d4fa84a0a74287f1edd55f4e7812500
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 30 17:01:01 2018 +0800

    test: rockchip: add command description
    
    => rktest
    Command: rktest [module] [args...]
      - module: timer|key|emmc|rknand|regulator|eth|ir|brom|vendor
      - args: depends on module, try 'rktest [module]' for test or more help
    
      - Enabled modules:
         -      timer: test timer and interrupt
         -       brom: enter bootrom download mode
         -        key: test board keys
         -       emmc: test emmc read/write speed
         -     rknand: test rknand read/write speed
         -  regulator: test regulator volatge set and show regulator status
         -     vendor: test vendor storage partition read/write
    
    Change-Id: I1f58dd65f7ffb229970cb86cb2f568cbca933336
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/test/rockchip/test-rockchip.c b/test/rockchip/test-rockchip.c
index 8ecf5d524d..ec770d0ae5 100644
--- a/test/rockchip/test-rockchip.c
+++ b/test/rockchip/test-rockchip.c
@@ -10,43 +10,90 @@
 
 typedef struct board_module {
 	char *name;
+	char *desc;
 	int (*test)(int argc, char * const argv[]);
 } board_module_t;
 
 static board_module_t g_board_modules[] = {
 #if defined(CONFIG_IRQ)
-	{ .name = "timer",	.test = board_timer_test },
+	{
+		.name = "timer",
+		.desc = "test timer and interrupt",
+		.test = board_timer_test
+	},
 #endif
-	{ .name = "brom",	.test = board_brom_dnl_test },
+	{
+		.name = "brom",
+		.desc = "enter bootrom download mode",
+		.test = board_brom_dnl_test
+	},
 
 #if defined(CONFIG_DM_KEY)
-	{ .name = "key",	.test = board_key_test },
+	{
+		.name = "key",
+		.desc = "test board keys",
+		.test = board_key_test
+	},
 #endif
 #if defined(CONFIG_MMC)
-	{ .name = "emmc",	.test = board_emmc_test },
-#endif
-#if defined(CONFIG_DM_REGULATOR)
-	{ .name = "regulator",	.test = board_regulator_test },
+	{
+		.name = "emmc",
+		.desc = "test emmc read/write speed",
+		.test = board_emmc_test
+	},
 #endif
 #if defined(CONFIG_RKNAND)
-	{ .name = "rknand",	.test = board_rknand_test },
+	{
+		.name = "rknand",
+		.desc = "test rknand read/write speed",
+		.test = board_rknand_test
+	},
+#endif
+
+#if defined(CONFIG_DM_REGULATOR)
+	{
+		.name = "regulator",
+		.desc = "test regulator volatge set and show regulator status",
+		.test = board_regulator_test
+	},
 #endif
 #if defined(CONFIG_GMAC_ROCKCHIP)
-	{ .name = "eth",        .test = board_eth_test },
+	{
+		.name = "eth",
+		.desc = "test ethernet",
+		.test = board_eth_test
+	},
 #endif
 #if defined(CONFIG_RK_IR)
-	{ .name = "ir",		.test = board_ir_test },
+	{
+		.name = "ir",
+		.desc = "test pwm ir remoter for box product",
+		.test = board_ir_test
+	},
 #endif
 #if defined(CONFIG_ROCKCHIP_VENDOR_PARTITION)
-	{ .name = "vendor",	.test = board_vendor_storage_test },
+	{
+		.name = "vendor",
+		.desc = "test vendor storage partition read/write",
+		.test = board_vendor_storage_test
+	},
 #endif
 };
 
 static void help(void)
 {
-	printf("Command: rktest [module] [args...]\n\n"
+	int i;
+
+	printf("Command: rktest [module] [args...]\n"
 	       "  - module: timer|key|emmc|rknand|regulator|eth|ir|brom|vendor\n"
-	       "  - args: depends on module\n");
+	       "  - args: depends on module, try 'rktest [module]' for test or more help\n\n");
+
+	printf("  - Enabled modules:\n");
+	for (i = 0; i < ARRAY_SIZE(g_board_modules); i++)
+		printf("     - %10s%s %s\n",
+		       g_board_modules[i].name,
+		       g_board_modules[i].desc ? ":" : "",
+		       g_board_modules[i].desc ? g_board_modules[i].desc : "");
 }
 
 static int do_rockchip_test(cmd_tbl_t *cmdtp, int flag,
@@ -68,7 +115,6 @@ static int do_rockchip_test(cmd_tbl_t *cmdtp, int flag,
 	if (!module_name)
 		return 0;
 
-
 	for (index = 0; index < ARRAY_SIZE(g_board_modules); index++) {
 		module = &g_board_modules[index];
 		if (module && !strcmp(module->name, module_name)) {

commit 32db71f8ce59df938deea5c2559e2ba744e137bd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Sep 3 11:17:27 2018 +0800

    dm: regulator: print unfixed bucks voltage
    
    This is mainly for debugging since voltage info is so important
    when system abort at early boot flow of U-Boot or kernel. On
    rockchip platforms, it usually prints vdd_arm and vdd_logic.
    
    Change-Id: Ibb58cb8865ab6857a51a8f50d8a7633c9132985d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/regulator-uclass.c b/drivers/power/regulator/regulator-uclass.c
index c319b53b95..7182bcc90b 100644
--- a/drivers/power/regulator/regulator-uclass.c
+++ b/drivers/power/regulator/regulator-uclass.c
@@ -267,8 +267,16 @@ int regulator_autoset(struct udevice *dev)
 	if (!uc_pdata->always_on && !uc_pdata->boot_on)
 		return -EMEDIUMTYPE;
 
-	if (uc_pdata->flags & REGULATOR_FLAG_AUTOSET_UV)
+	if (uc_pdata->flags & REGULATOR_FLAG_AUTOSET_UV) {
 		ret = regulator_set_value(dev, uc_pdata->min_uV);
+	} else {
+		if ((uc_pdata->type == REGULATOR_TYPE_BUCK) &&
+		    (uc_pdata->min_uV != -ENODATA) &&
+		    (uc_pdata->max_uV != -ENODATA))
+			printf("%s %d uV\n",
+			       uc_pdata->name, regulator_get_value(dev));
+	}
+
 	if (uc_pdata->init_uV > 0) {
 		ret = regulator_set_value(dev, uc_pdata->init_uV);
 		if (!ret)

commit cc314ad24f9c9d35747a385a0f99f4d1b05b7146
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 30 18:06:26 2018 +0800

    rockchip: atags: add atags_is_available()
    
    we would compatible pre-loaders parameters deliver by atags
    and fixed memory address(legacy), this interface gives a way
    to detect if atags is used now.
    
    Change-Id: I75c96faa23812c621e4084c58398605df29d043d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rk_atags.h b/arch/arm/include/asm/arch-rockchip/rk_atags.h
index ff58c8f927..30a3cf6311 100644
--- a/arch/arm/include/asm/arch-rockchip/rk_atags.h
+++ b/arch/arm/include/asm/arch-rockchip/rk_atags.h
@@ -133,6 +133,14 @@ int atags_set_tag(u32 magic, void *tagdata);
  */
 struct tag *atags_get_tag(u32 magic);
 
+/*
+ * atags_is_available - check if atags is available, used for second or
+ *			later pre-loaders.
+ *
+ * return: 0 is not available, otherwise available.
+ */
+int atags_is_available(void);
+
 /* Print only one tag */
 void atags_print_tag(struct tag *t);
 
diff --git a/arch/arm/mach-rockchip/rk_atags.c b/arch/arm/mach-rockchip/rk_atags.c
index 39809d0bed..ffb03532ac 100644
--- a/arch/arm/mach-rockchip/rk_atags.c
+++ b/arch/arm/mach-rockchip/rk_atags.c
@@ -27,6 +27,13 @@ static int inline atags_size_overflow(struct tag *t, u32 tag_size)
 	return (unsigned long)t + (tag_size << 2) - ATAGS_PHYS_BASE > ATAGS_SIZE;
 }
 
+int atags_is_available(void)
+{
+	struct tag *t = (struct tag *)ATAGS_PHYS_BASE;
+
+	return (t->hdr.magic == ATAG_CORE);
+}
+
 int atags_set_tag(u32 magic, void *tagdata)
 {
 	u32 length, size = 0;

commit de714de0da8c6124890909eaf3456bbaec82b8f7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 30 17:40:29 2018 +0800

    rockchip: atags: add U_BOOT_CMD "atags" do dump content
    
    Change-Id: I21e6422200e1c60ffc0cc9d520df10fa506b930e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk_atags.c b/arch/arm/mach-rockchip/rk_atags.c
index 8b992f600e..39809d0bed 100644
--- a/arch/arm/mach-rockchip/rk_atags.c
+++ b/arch/arm/mach-rockchip/rk_atags.c
@@ -133,7 +133,8 @@ void atags_destroy(void)
 	memset((char *)ATAGS_PHYS_BASE, 0, sizeof(struct tag));
 }
 
-#ifdef DEBUG_ATAGS
+#if (defined(CONFIG_DEBUG_ATAGS) || defined(DEBUG)) && \
+    !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
 void atags_print_tag(struct tag *t)
 {
 	u32 i;
@@ -250,6 +251,19 @@ void atags_test(void)
 
 	atags_print_all_tags();
 }
+
+static int dump_atags(cmd_tbl_t *cmdtp, int flag,
+		      int argc, char * const argv[])
+{
+	atags_print_all_tags();
+	return 0;
+}
+
+U_BOOT_CMD(
+	atags, 1, 1, dump_atags,
+	"Dump the content of the atags",
+	""
+);
 #else
 void inline atags_print_tag(struct tag *t) {}
 void inline atags_print_all_tags(void) {}

commit 8870d6b7ed68e67a20fdef679977e0ab67d68987
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Aug 7 09:21:12 2018 +0800

    rockchip: rk1808: add evb board support
    
    Change-Id: Id2beac9acc5b4b96fe480b3b2bea88e2f3c158aa
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk1808-evb.dts b/arch/arm/dts/rk1808-evb.dts
new file mode 100644
index 0000000000..116a64e5c2
--- /dev/null
+++ b/arch/arm/dts/rk1808-evb.dts
@@ -0,0 +1,52 @@
+// SPDX-License-Identifier:     GPL-2.0+
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ */
+
+/dts-v1/;
+#include "rk1808.dtsi"
+#include "rk1808-u-boot.dtsi"
+#include <dt-bindings/input/input.h>
+#include <linux/media-bus-format.h>
+
+/ {
+	model = "Rockchip RK1808 EVB";
+	compatible = "rockchip,rk1808-evb", "rockchip,rk1808";
+
+	chosen {
+		stdout-path = &uart2;
+	};
+
+	xin24m: xin24m {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <24000000>;
+		clock-output-names = "xin24m";
+	};
+};
+
+&emmc {
+	fifo-mode;
+	bus-width = <8>;
+	cap-mmc-highspeed;
+	supports-emmc;
+	disable-wp;
+	non-removable;
+	num-slots = <1>;
+
+	status = "okay";
+};
+
+&sdmmc {
+	supports-sd;
+	status = "disabled";
+};
+
+&uart2 {
+	clock-frequency = <24000000>;
+	clocks = <&xin24m>, <&xin24m>;
+	clock-names = "baudclk", "apb_pclk";
+
+	status = "okay";
+};
diff --git a/arch/arm/dts/rk1808-u-boot.dtsi b/arch/arm/dts/rk1808-u-boot.dtsi
new file mode 100644
index 0000000000..ba09a1dc12
--- /dev/null
+++ b/arch/arm/dts/rk1808-u-boot.dtsi
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier:     GPL-2.0+
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ */
+
+/ {
+	aliases {
+		mmc0 = &emmc;
+	};
+};
+
+&cru {
+	u-boot,dm-pre-reloc;
+};
+
+&grf {
+	u-boot,dm-pre-reloc;
+};
+
+&pmugrf {
+	u-boot,dm-pre-reloc;
+};
+
+&emmc {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&uart2 {
+	u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/rk1808.dtsi b/arch/arm/dts/rk1808.dtsi
new file mode 100644
index 0000000000..b56bb3bca3
--- /dev/null
+++ b/arch/arm/dts/rk1808.dtsi
@@ -0,0 +1,1334 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd.
+
+#include <dt-bindings/clock/rk1808-cru.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+
+/ {
+	compatible = "rockchip,rk1808";
+
+	interrupt-parent = <&gic>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	aliases {
+		i2c0 = &i2c0;
+		i2c1 = &i2c1;
+		i2c2 = &i2c2;
+		i2c3 = &i2c3;
+		i2c4 = &i2c4;
+		i2c5 = &i2c5;
+		serial2 = &uart2;
+		spi0 = &spi0;
+		spi1 = &spi1;
+		spi2 = &spi2;
+	};
+
+	cpus {
+		#address-cells = <2>;
+		#size-cells = <0>;
+
+		cpu0: cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a35", "arm,armv8";
+			reg = <0x0 0x0>;
+			clocks = <&cru ARMCLK>;
+		};
+
+		cpu1: cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a35", "arm,armv8";
+			reg = <0x0 0x1>;
+			clocks = <&cru ARMCLK>;
+		};
+	};
+
+	arm-pmu {
+		compatible = "arm,cortex-a53-pmu";
+		interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-affinity = <&cpu0>, <&cpu1>;
+	};
+
+	gmac_clkin: external-gmac-clock {
+		compatible = "fixed-clock";
+		clock-frequency = <125000000>;
+		clock-output-names = "gmac_clkin";
+		#clock-cells = <0>;
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
+			     <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
+			     <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
+			     <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
+		arm,no-tick-in-suspend;
+	};
+
+	xin24m: xin24m {
+		compatible = "fixed-clock";
+		clock-frequency = <24000000>;
+		clock-output-names = "xin24m";
+		#clock-cells = <0>;
+	};
+
+	xin32k: xin32k {
+		compatible = "fixed-clock";
+		clock-frequency = <32768>;
+		clock-output-names = "xin32k";
+		#clock-cells = <0>;
+	};
+
+	grf: syscon@fe000000 {
+		compatible = "rockchip,rk1808-grf", "syscon", "simple-mfd";
+		reg = <0x0 0xfe000000 0x0 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+	};
+
+	pmugrf: syscon@fe410000 {
+		compatible = "rockchip,rk1808-pmugrf", "syscon", "simple-mfd";
+		reg = <0x0 0xfe410000 0x0 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+	};
+
+	gic: interrupt-controller@ff100000 {
+		compatible = "arm,gic-v3";
+		#interrupt-cells = <3>;
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+		interrupt-controller;
+
+		reg = <0x0 0xff100000 0 0x10000>, /* GICD */
+		      <0x0 0xff140000 0 0xc0000>, /* GICR */
+		      <0x0 0xff300000 0 0x10000>, /* GICC */
+		      <0x0 0xff310000 0 0x10000>, /* GICH */
+		      <0x0 0xff320000 0 0x10000>; /* GICV */
+		interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
+		its: interrupt-controller@ff120000 {
+			compatible = "arm,gic-v3-its";
+			msi-controller;
+			reg = <0x0 0xff120000 0x0 0x20000>;
+		};
+	};
+
+	cru: clock-controller@ff350000 {
+		compatible = "rockchip,rk1808-cru";
+		reg = <0x0 0xff350000 0x0 0x5000>;
+		rockchip,grf = <&grf>;
+		#clock-cells = <1>;
+		#reset-cells = <1>;
+
+		assigned-clocks =
+			<&cru PLL_GPLL>, <&cru PLL_CPLL>,
+			<&cru PLL_PPLL>, <&cru ARMCLK>,
+			<&cru MSCLK_PERI>, <&cru LSCLK_PERI>,
+			<&cru HSCLK_BUS_PRE>, <&cru MSCLK_BUS_PRE>,
+			<&cru LSCLK_BUS_PRE>;
+		assigned-clock-rates =
+			<1200000000>, <1000000000>,
+			<416000000>, <816000000>,
+			<200000000>, <100000000>,
+			<300000000>, <200000000>,
+			<100000000>;
+	};
+
+	tsadc: tsadc@ff3a0000 {
+		compatible = "rockchip,rk1808-tsadc";
+		reg = <0x0 0xff3a0000 0x0 0x100>;
+		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+		rockchip,grf = <&grf>;
+		clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
+		clock-names = "tsadc", "apb_pclk";
+		assigned-clocks = <&cru SCLK_TSADC>;
+		assigned-clock-rates = <50000>;
+		resets = <&cru SRST_TSADC>;
+		reset-names = "tsadc-apb";
+		#thermal-sensor-cells = <1>;
+		rockchip,hw-tshut-temp = <120000>;
+		status = "disabled";
+	};
+
+	pwm0: pwm@ff3d0000 {
+		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff3d0000 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm0_pin>;
+		clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm1: pwm@ff3d0010 {
+		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff3d0010 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm1_pin>;
+		clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm2: pwm@ff3d0020 {
+		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff3d0020 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm2_pin>;
+		clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm3: pwm@ff3d0030 {
+		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff3d0030 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm3_pin>;
+		clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm4: pwm@ff3d8000 {
+		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff3d8000 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm4_pin>;
+		clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm5: pwm@ff3d8010 {
+		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff3d8010 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm5_pin>;
+		clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm6: pwm@ff3d8020 {
+		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff3d8020 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm6_pin>;
+		clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm7: pwm@ff3d8030 {
+		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff3d8030 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm7_pin>;
+		clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	i2c0: i2c@ff410000 {
+		compatible = "rockchip,rk3399-i2c";
+		reg = <0x0 0xff410000 0x0 0x1000>;
+		clocks =  <&cru SCLK_PMU_I2C0>, <&cru PCLK_I2C0_PMU>;
+		clock-names = "i2c", "pclk";
+		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c0_xfer>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	amba {
+		compatible = "simple-bus";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		dmac: dmac@ff4e0000 {
+			compatible = "arm,pl330", "arm,primecell";
+			reg = <0x0 0xff4e0000 0x0 0x4000>;
+			interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+			//clocks = <&cru ACLK_DMAC>;
+			//clock-names = "apb_pclk";
+			#dma-cells = <1>;
+			peripherals-req-type-burst;
+		};
+	};
+
+	i2c1: i2c@ff500000 {
+		compatible = "rockchip,rk3399-i2c";
+		reg = <0x0 0xff500000 0x0 0x1000>;
+		clocks = <&cru SCLK_I2C1>, <&cru PCLK_I2C1>;
+		clock-names = "i2c", "pclk";
+		interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c1_xfer>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	i2c2: i2c@ff504000 {
+		compatible = "rockchip,rk3399-i2c";
+		reg = <0x0 0xff504000 0x0 0x1000>;
+		clocks = <&cru SCLK_I2C2>, <&cru PCLK_I2C2>;
+		clock-names = "i2c", "pclk";
+		interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c2m0_xfer>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	i2c3: i2c@ff508000 {
+		compatible = "rockchip,rk3399-i2c";
+		reg = <0x0 0xff508000 0x0 0x1000>;
+		clocks = <&cru SCLK_I2C3>, <&cru PCLK_I2C3>;
+		clock-names = "i2c", "pclk";
+		interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c3_xfer>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	i2c4: i2c@ff50c000 {
+		compatible = "rockchip,rk3399-i2c";
+		reg = <0x0 0xff50c000 0x0 0x1000>;
+		clocks = <&cru SCLK_I2C4>, <&cru PCLK_I2C4>;
+		clock-names = "i2c", "pclk";
+		interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c4_xfer>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	i2c5: i2c@ff510000 {
+		compatible = "rockchip,rk3399-i2c";
+		reg = <0x0 0xff100000 0x0 0x1000>;
+		clocks = <&cru SCLK_I2C5>, <&cru PCLK_I2C5>;
+		clock-names = "i2c", "pclk";
+		interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c5_xfer>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	spi0: spi@ff520000 {
+		compatible = "rockchip,rk1808-spi", "rockchip,rk3066-spi";
+		reg = <0x0 0xff520000 0x0 0x1000>;
+		interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
+		clock-names = "spiclk", "apb_pclk";
+		dmas = <&dmac 10>, <&dmac 11>;
+		dma-names = "tx", "rx";
+		pinctrl-names = "default", "high_speed";
+		pinctrl-0 = <&spi0_clk &spi0_csn &spi0_miso &spi0_mosi>;
+		pinctrl-1 = <&spi0_clk_hs &spi0_csn &spi0_miso_hs &spi0_mosi_hs>;
+		status = "disabled";
+	};
+
+	spi1: spi@ff530000 {
+		compatible = "rockchip,rk1808-spi", "rockchip,rk3066-spi";
+		reg = <0x0 0xff530000 0x0 0x1000>;
+		interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&cru SCLK_SPI1>, <&cru PCLK_SPI1>;
+		clock-names = "spiclk", "apb_pclk";
+		dmas = <&dmac 12>, <&dmac 13>;
+		dma-names = "tx", "rx";
+		pinctrl-names = "default", "high_speed";
+		pinctrl-0 = <&spi1_clk &spi1_csn0 &spi1_csn1 &spi1_miso &spi1_mosi>;
+		pinctrl-1 = <&spi1_clk_hs &spi1_csn0 &spi1_csn1 &spi1_miso_hs &spi1_mosi_hs>;
+		status = "disabled";
+	};
+
+	spi2: spi@ff580000 {
+		compatible = "rockchip,rk1808-spi", "rockchip,rk3066-spi";
+		reg = <0x0 0xff580000 0x0 0x1000>;
+		interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&cru SCLK_SPI2>, <&cru PCLK_SPI2>;
+		clock-names = "spiclk", "apb_pclk";
+		dmas = <&dmac 14>, <&dmac 15>;
+		dma-names = "tx", "rx";
+		pinctrl-names = "default", "high_speed";
+		pinctrl-0 = <&spi2m0_clk &spi2m0_csn &spi2m0_miso &spi2m0_mosi>;
+		pinctrl-1 = <&spi2m0_clk_hs &spi2m0_csn &spi2m0_miso_hs &spi2m0_mosi_hs>;
+		status = "disabled";
+	};
+
+	uart2: serial@ff550000 {
+		compatible = "rockchip,rk1808-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xff550000 0x0 0x100>;
+		interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		status = "disabled";
+	};
+
+	pwm8: pwm@ff5d0000 {
+		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff5d0000 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm8_pin>;
+		clocks = <&cru SCLK_PWM2>, <&cru PCLK_PWM2>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm9: pwm@fff5d0010 {
+		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff5d0010 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm9_pin>;
+		clocks = <&cru SCLK_PWM2>, <&cru PCLK_PWM2>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm10: pwm@ff5d0020 {
+		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff5d0020 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm10_pin>;
+		clocks = <&cru SCLK_PWM2>, <&cru PCLK_PWM2>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm11: pwm@ff5d0030 {
+		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff5d0030 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm11_pin>;
+		clocks = <&cru SCLK_PWM2>, <&cru PCLK_PWM2>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	sdmmc: dwmmc@ffcf0000 {
+		compatible = "rockchip,rk1808-dw-mshc", "rockchip,rk3288-dw-mshc";
+		reg = <0x0 0xffcf0000 0x0 0x4000>;
+		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
+			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
+		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
+		max-frequency = <150000000>;
+		fifo-depth = <0x100>;
+		interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd>;
+		status = "disabled";
+	};
+
+	emmc: dwmmc@ffd00000 {
+		compatible = "rockchip,rk1808-dw-mshc", "rockchip,rk3288-dw-mshc";
+		reg = <0x0 0xffd00000 0x0 0x4000>;
+		clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
+			 <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
+		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
+		max-frequency = <150000000>;
+		fifo-depth = <0x100>;
+		interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
+		status = "disabled";
+	};
+
+	gmac: ethernet@ffdd0000 {
+		compatible = "rockchip,rk1808-gmac";
+		reg = <0x0 0xffdd0000 0x0 0x10000>;
+		rockchip,grf = <&grf>;
+		interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "macirq";
+		clocks = <&cru SCLK_GMAC>, <&cru SCLK_GMAC_RX_TX>,
+			 <&cru SCLK_GMAC_RX_TX>, <&cru SCLK_GMAC_REF>,
+			 <&cru SCLK_GMAC_REFOUT>, <&cru ACLK_GMAC>,
+			 <&cru PCLK_GMAC>, <&cru SCLK_GMAC_RGMII_SPEED>;
+		clock-names = "stmmaceth", "mac_clk_rx",
+			      "mac_clk_tx", "clk_mac_ref",
+			      "clk_mac_refout", "aclk_mac",
+			      "pclk_mac", "clk_mac_speed";
+		phy-mode = "rgmii";
+		pinctrl-names = "default";
+		pinctrl-0 = <&rgmii_pins>;
+		resets = <&cru SRST_GAMC_A>;
+		reset-names = "stmmaceth";
+		/* power-domains = <&power RK1808_PD_GMAC>; */
+		status = "disabled";
+	};
+
+	pinctrl: pinctrl {
+		compatible = "rockchip,rk1808-pinctrl";
+		rockchip,grf = <&grf>;
+		rockchip,pmu = <&pmugrf>;
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		gpio0: gpio0@ff4c0000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x0 0xff4c0000 0x0 0x100>;
+			interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru SCLK_PMU_GPIO0>, <&cru PCLK_GPIO0_PMU>;
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio1: gpio1@ff690000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x0 0xff690000 0x0 0x100>;
+			interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru SCLK_GPIO1>, <&cru PCLK_GPIO1>;
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio2: gpio2@ff6a0000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x0 0xff6a0000 0x0 0x100>;
+			interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru SCLK_GPIO2>, <&cru PCLK_GPIO2>;
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio3: gpio3@ff6b0000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x0 0xff6b0000 0x0 0x100>;
+			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru SCLK_GPIO3>, <&cru PCLK_GPIO3>;
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio4: gpio4@ff6c0000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x0 0xff6c0000 0x0 0x100>;
+			interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru SCLK_GPIO4>, <&cru PCLK_GPIO4>;
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		pcfg_pull_up: pcfg-pull-up {
+			bias-pull-up;
+		};
+
+		pcfg_pull_down: pcfg-pull-down {
+			bias-pull-down;
+		};
+
+		pcfg_pull_none: pcfg-pull-none {
+			bias-disable;
+		};
+
+		pcfg_pull_none_2ma: pcfg-pull-none-2ma {
+			bias-disable;
+			drive-strength = <2>;
+		};
+
+		pcfg_pull_up_2ma: pcfg-pull-up-2ma {
+			bias-pull-up;
+			drive-strength = <2>;
+		};
+
+		pcfg_pull_up_4ma: pcfg-pull-up-4ma {
+			bias-pull-up;
+			drive-strength = <4>;
+		};
+
+		pcfg_pull_none_4ma: pcfg-pull-none-4ma {
+			bias-disable;
+			drive-strength = <4>;
+		};
+
+		pcfg_pull_down_4ma: pcfg-pull-down-4ma {
+			bias-pull-down;
+			drive-strength = <4>;
+		};
+
+		pcfg_pull_none_8ma: pcfg-pull-none-8ma {
+			bias-disable;
+			drive-strength = <8>;
+		};
+
+		pcfg_pull_up_8ma: pcfg-pull-up-8ma {
+			bias-pull-up;
+			drive-strength = <8>;
+		};
+
+		pcfg_pull_none_12ma: pcfg-pull-none-12ma {
+			bias-disable;
+			drive-strength = <12>;
+		};
+
+		pcfg_pull_up_12ma: pcfg-pull-up-12ma {
+			bias-pull-up;
+			drive-strength = <12>;
+		};
+
+		pcfg_pull_none_smt: pcfg-pull-none-smt {
+			bias-disable;
+			input-schmitt-enable;
+		};
+
+		pcfg_output_high: pcfg-output-high {
+			output-high;
+		};
+
+		pcfg_output_low: pcfg-output-low {
+			output-low;
+		};
+
+		pcfg_input_high: pcfg-input-high {
+			bias-pull-up;
+			input-enable;
+		};
+
+		pcfg_input: pcfg-input {
+			input-enable;
+		};
+
+		emmc {
+			emmc_clk: emmc-clk {
+				rockchip,pins =
+					/* emmc_clkout */
+					<1 9 1 &pcfg_pull_none>;
+			};
+
+			emmc_rstnout: emmc-rstnout {
+				rockchip,pins =
+					/* emmc_rstn */
+					<1 11 1 &pcfg_pull_none>;
+			};
+
+			emmc_bus8: emmc-bus8 {
+				rockchip,pins =
+					/* emmc_d0 */
+					<1 RK_PA0 1 &pcfg_pull_none>,
+					/* emmc_d1 */
+					<1 RK_PA1 1 &pcfg_pull_none>,
+					/* emmc_d2 */
+					<1 RK_PA2 1 &pcfg_pull_none>,
+					/* emmc_d3 */
+					<1 RK_PA3 1 &pcfg_pull_none>,
+					/* emmc_d4 */
+					<1 RK_PA4 1 &pcfg_pull_none>,
+					/* emmc_d5 */
+					<1 RK_PA5 1 &pcfg_pull_none>,
+					/* emmc_d6 */
+					<1 RK_PA6 1 &pcfg_pull_none>,
+					/* emmc_d7 */
+					<1 RK_PA7 1 &pcfg_pull_none>;
+			};
+
+			emmc_pwren: emmc-pwren {
+				rockchip,pins =
+					<1 RK_PB0 1 &pcfg_pull_none>;
+			};
+
+			emmc_cmd: emmc-cmd {
+				rockchip,pins =
+					<1 RK_PB2 1 &pcfg_pull_none>;
+			};
+		};
+
+		gmac {
+			rgmii_pins: rgmii-pins {
+				rockchip,pins =
+					/* rgmii_txen */
+					<2 RK_PA1 2 &pcfg_pull_none_12ma>,
+					/* rgmii_txd1 */
+					<2 RK_PA2 2 &pcfg_pull_none_12ma>,
+					/* rgmii_txd0 */
+					<2 RK_PA3 2 &pcfg_pull_none_12ma>,
+					/* rgmii_rxd0 */
+					<2 RK_PA4 2 &pcfg_pull_none>,
+					/* rgmii_rxd1 */
+					<2 RK_PA5 2 &pcfg_pull_none>,
+					/* rgmii_rxdv */
+					<2 RK_PA7 2 &pcfg_pull_none>,
+					/* rgmii_mdio */
+					<2 RK_PB0 2 &pcfg_pull_none>,
+					/* rgmii_mdc */
+					<2 RK_PB2 2 &pcfg_pull_none>,
+					/* rgmii_txd3 */
+					<2 RK_PB3 2 &pcfg_pull_none_12ma>,
+					/* rgmii_txd2 */
+					<2 RK_PB4 2 &pcfg_pull_none_12ma>,
+					/* rgmii_rxd2 */
+					<2 RK_PB5 2 &pcfg_pull_none>,
+					/* rgmii_rxd3 */
+					<2 RK_PB6 2 &pcfg_pull_none>,
+					/* rgmii_clk */
+					<2 RK_PB7 2 &pcfg_pull_none>,
+					/* rgmii_txclk */
+					<2 RK_PC1 2 &pcfg_pull_none_12ma>,
+					/* rgmii_rxclk */
+					<2 RK_PC2 2 &pcfg_pull_none>;
+			};
+
+			rmii_pins: rmii-pins {
+				rockchip,pins =
+					/* rmii_txen */
+					<2 RK_PA1 2 &pcfg_pull_none_12ma>,
+					/* rmii_txd1 */
+					<2 RK_PA2 2 &pcfg_pull_none_12ma>,
+					/* rmii_txd0 */
+					<2 RK_PA3 2 &pcfg_pull_none_12ma>,
+					/* rmii_rxd0 */
+					<2 RK_PA4 2 &pcfg_pull_none>,
+					/* rmii_rxd1 */
+					<2 RK_PA5 2 &pcfg_pull_none>,
+					/* rmii_rxer */
+					<2 RK_PA6 2 &pcfg_pull_none>,
+					/* rmii_rxdv */
+					<2 RK_PA7 2 &pcfg_pull_none>,
+					/* rmii_mdio */
+					<2 RK_PB0 2 &pcfg_pull_none>,
+					/* rmii_mdc */
+					<2 RK_PB2 2 &pcfg_pull_none>,
+					/* rmii_clk */
+					<2 RK_PB7 2 &pcfg_pull_none>;
+			};
+		};
+
+		i2c0 {
+			i2c0_xfer: i2c0-xfer {
+				rockchip,pins =
+					/* i2c0_sda */
+					<0 RK_PB1 1 &pcfg_pull_none_smt>,
+					/* i2c0_scl */
+					<0 RK_PB0 1 &pcfg_pull_none_smt>;
+			};
+		};
+
+		i2c1 {
+			i2c1_xfer: i2c1-xfer {
+				rockchip,pins =
+					/* i2c1_sda */
+					<0 RK_PC1 1 &pcfg_pull_none_smt>,
+					/* i2c1_scl */
+					<0 RK_PC0 1 &pcfg_pull_none_smt>;
+			};
+		};
+
+		i2c2m0 {
+			i2c2m0_xfer: i2c2m0-xfer {
+				rockchip,pins =
+					/* i2c2m0_sda */
+					<3 RK_PB4 2 &pcfg_pull_none_smt>,
+					/* i2c2m0_scl */
+					<3 RK_PB3 2 &pcfg_pull_none_smt>;
+			};
+		};
+
+		i2c3 {
+			i2c3_xfer: i2c3-xfer {
+				rockchip,pins =
+					/* i2c3_sda */
+					<2 RK_PD1 1 &pcfg_pull_none_smt>,
+					/* i2c3_scl */
+					<2 RK_PD0 1 &pcfg_pull_none_smt>;
+			};
+		};
+
+		i2c4 {
+			i2c4_xfer: i2c4-xfer {
+				rockchip,pins =
+					/* i2c4_sda */
+					<3 RK_PC3 3 &pcfg_pull_none_smt>,
+					/* i2c4_scl */
+					<3 RK_PC2 3 &pcfg_pull_none_smt>;
+			};
+		};
+
+		i2c5 {
+			i2c5_xfer: i2c5-xfer {
+				rockchip,pins =
+					/* i2c5_sda */
+					<4 RK_PC2 1 &pcfg_pull_none_smt>,
+					/* i2c5_scl */
+					<4 RK_PC1 1 &pcfg_pull_none_smt>;
+			};
+		};
+
+		i2s1 {
+			i2s1_2ch_lrck: i2s1-2ch-lrck {
+				rockchip,pins =
+					<3 RK_PA0 1 &pcfg_pull_none>;
+			};
+			i2s1_2ch_sclk: i2s1-2ch-sclk {
+				rockchip,pins =
+					<3 RK_PA1 1 &pcfg_pull_none>;
+			};
+			i2s1_2ch_mclk: i2s1-2ch-mclk {
+				rockchip,pins =
+					<3 RK_PA2 1 &pcfg_pull_none>;
+			};
+			i2s1_2ch_sdo: i2s1-2ch-sdo {
+				rockchip,pins =
+					<3 RK_PA3 1 &pcfg_pull_none>;
+			};
+			i2s1_2ch_sdi: i2s1-2ch-sdi {
+				rockchip,pins =
+					<3 RK_PA4 1 &pcfg_pull_none>;
+			};
+		};
+
+		i2s0 {
+			i2s0_8ch_sdi3: i2s0-8ch-sdi3 {
+				rockchip,pins =
+					<3 RK_PA5 1 &pcfg_pull_none>;
+			};
+			i2s0_8ch_sdi2: i2s0-8ch-sdi2 {
+				rockchip,pins =
+					<3 RK_PA6 1 &pcfg_pull_none>;
+			};
+			i2s0_8ch_sdi1: i2s0-8ch-sdi1 {
+				rockchip,pins =
+					<3 RK_PA7 1 &pcfg_pull_none>;
+			};
+			i2s0_8ch_sclkrx: i2s0-8ch-sclkrx {
+				rockchip,pins =
+					<3 RK_PB0 1 &pcfg_pull_none>;
+			};
+			i2s0_8ch_lrckrx: i2s0-8ch-lrckrx {
+				rockchip,pins =
+					<3 RK_PB1 1 &pcfg_pull_none>;
+			};
+			i2s0_8ch_sdo3: i2s0-8ch-sdo3 {
+				rockchip,pins =
+					<3 RK_PB2 1 &pcfg_pull_none>;
+			};
+			i2s0_8ch_sdo2: i2s0-8ch-sdo2 {
+				rockchip,pins =
+					<3 RK_PB3 1 &pcfg_pull_none>;
+			};
+			i2s0_8ch_sdo1: i2s0-8ch-sdo1 {
+				rockchip,pins =
+					<3 RK_PB4 1 &pcfg_pull_none>;
+			};
+			i2s0_8ch_mclk: i2s0-8ch-mclk {
+				rockchip,pins =
+					<3 RK_PB5 1 &pcfg_pull_none>;
+			};
+			i2s0_8ch_lrcktx: i2s0-8ch-lrcktx {
+				rockchip,pins =
+					<3 RK_PB6 1 &pcfg_pull_none>;
+			};
+			i2s0_8ch_sclktx: i2s0-8ch-sclktx {
+				rockchip,pins =
+					<3 RK_PB7 1 &pcfg_pull_none>;
+			};
+			i2s0_8ch_sdo0: i2s0-8ch-sdo0 {
+				rockchip,pins =
+					<3 RK_PC0 1 &pcfg_pull_none>;
+			};
+			i2s0_8ch_sdi0: i2s0-8ch-sdi0 {
+				rockchip,pins =
+					<3 RK_PC1 1 &pcfg_pull_none>;
+			};
+		};
+
+		pciusb {
+			pciusb_pins: pciusb-pins {
+				rockchip,pins =
+					/* pciusb_debug0 */
+					<4 RK_PB4 3 &pcfg_pull_none>,
+					/* pciusb_debug1 */
+					<4 RK_PB5 3 &pcfg_pull_none>,
+					/* pciusb_debug2 */
+					<4 RK_PB6 3 &pcfg_pull_none>,
+					/* pciusb_debug3 */
+					<4 RK_PB7 3 &pcfg_pull_none>,
+					/* pciusb_debug4 */
+					<4 RK_PC0 3 &pcfg_pull_none>,
+					/* pciusb_debug5 */
+					<4 RK_PC1 3 &pcfg_pull_none>,
+					/* pciusb_debug6 */
+					<4 RK_PC2 3 &pcfg_pull_none>,
+					/* pciusb_debug7 */
+					<4 RK_PC3 3 &pcfg_pull_none>;
+			};
+		};
+
+		pdm {
+			pdm_clk: pdm-clk {
+				rockchip,pins =
+					/* pdm_clk0 */
+					<3 RK_PB0 2 &pcfg_pull_none>;
+			};
+
+			pdm_sdi3: pdm-sdi3 {
+				rockchip,pins =
+					<3 RK_PA5 2 &pcfg_pull_none>;
+			};
+
+			pdm_sdi2: pdm-sdi2 {
+				rockchip,pins =
+					<3 RK_PA6 2 &pcfg_pull_none>;
+			};
+
+			pdm_sdi1: pdm-sdi1 {
+				rockchip,pins =
+					<3 RK_PA7 2 &pcfg_pull_none>;
+			};
+
+			pdm_clk1: pdm-clk1 {
+				rockchip,pins =
+					<3 RK_PB1 2 &pcfg_pull_none>;
+			};
+
+			pdm_sdi0: pdm-sdi0 {
+				rockchip,pins =
+					<3 RK_PC1 2 &pcfg_pull_none>;
+			};
+		};
+
+		pwm0 {
+			pwm0_pin: pwm0-pin {
+				rockchip,pins =
+					<0 RK_PB7 1 &pcfg_pull_none>;
+			};
+		};
+
+		pwm1 {
+			pwm1_pin: pwm1-pin {
+				rockchip,pins =
+					<0 RK_PC3 1 &pcfg_pull_none>;
+			};
+		};
+
+		pwm2 {
+			pwm2_pin: pwm2-pin {
+				rockchip,pins =
+					<0 RK_PC5 1 &pcfg_pull_none>;
+			};
+		};
+
+		pwm3 {
+			pwm3_pin: pwm3-pin {
+				rockchip,pins =
+					<0 RK_PC4 1 &pcfg_pull_none>;
+			};
+		};
+
+		pwm4 {
+			pwm4_pin: pwm4-pin {
+				rockchip,pins =
+					<1 RK_PB6 2 &pcfg_pull_none>;
+			};
+		};
+
+		pwm5 {
+			pwm5_pin: pwm5-pin {
+				rockchip,pins =
+					<1 RK_PB7 2 &pcfg_pull_none>;
+			};
+		};
+		pwm6 {
+			pwm6_pin: pwm6-pin {
+				rockchip,pins =
+					<3 RK_PA1 2 &pcfg_pull_none>;
+			};
+		};
+
+		pwm7 {
+			pwm7_pin: pwm7-pin {
+				rockchip,pins =
+					<3 RK_PA2 2 &pcfg_pull_none>;
+			};
+		};
+
+		pwm8 {
+			pwm8_pin: pwm8-pin {
+				rockchip,pins =
+					<3 RK_PD0 2 &pcfg_pull_none>;
+			};
+		};
+
+		pwm9 {
+			pwm9_pin: pwm9-pin {
+				rockchip,pins =
+					<3 RK_PD1 2 &pcfg_pull_none>;
+			};
+		};
+
+		pwm10 {
+			pwm10_pin: pwm10-pin {
+				rockchip,pins =
+					<3 RK_PD2 2 &pcfg_pull_none>;
+			};
+		};
+
+		pwm11 {
+			pwm11_pin: pwm11-pin {
+				rockchip,pins =
+					<3 RK_PD3 2 &pcfg_pull_none>;
+			};
+		};
+
+		sdmmc0 {
+			sdmmc0_bus4: sdmmc0-bus4 {
+				rockchip,pins =
+				/* sdmmc0_d0 */
+				<4 RK_PA2 1 &pcfg_pull_none>,
+				/* sdmmc0_d1 */
+				<4 RK_PA3 1 &pcfg_pull_none>,
+				/* sdmmc0_d2 */
+				<4 RK_PA4 1 &pcfg_pull_none>,
+				/* sdmmc0_d3 */
+				<4 RK_PA5 1 &pcfg_pull_none>;
+			};
+			sdmmc0_cmd: sdmmc0-cmd {
+				rockchip,pins =
+					<4 RK_PA0 1 &pcfg_pull_none>;
+			};
+			sdmmc0_clk: sdmmc0-clk {
+				rockchip,pins =
+					<4 RK_PA1 1 &pcfg_pull_none>;
+			};
+		};
+
+		sdmmc1 {
+			sdmmc1_bus4: sdmmc1-bus4 {
+				rockchip,pins =
+				/* sdmmc1_d0 */
+				<4 RK_PB0 1 &pcfg_pull_none>,
+				/* sdmmc1_d1 */
+				<4 RK_PB1 1 &pcfg_pull_none>,
+				/* sdmmc1_d2 */
+				<4 RK_PB2 1 &pcfg_pull_none>,
+				/* sdmmc1_d3 */
+				<4 RK_PB3 1 &pcfg_pull_none>;
+			};
+
+			sdmmc1_cmd: sdmmc1-cmd {
+				rockchip,pins =
+					<4 RK_PA6 1 &pcfg_pull_none>;
+			};
+
+			sdmmc1_clk: sdmmc1-clk {
+				rockchip,pins =
+					<4 RK_PB1 1 &pcfg_pull_none>;
+			};
+		};
+
+		spi0 {
+			spi0_mosi: spi0-mosi {
+				rockchip,pins =
+					<1 RK_PB4 1 &pcfg_pull_up_4ma>;
+			};
+
+			spi0_miso: spi0-miso {
+				rockchip,pins =
+					<1 RK_PB5 1 &pcfg_pull_up_4ma>;
+			};
+
+			spi0_csn: spi0-csn {
+				rockchip,pins =
+					<1 RK_PB6 1 &pcfg_pull_up_4ma>;
+			};
+
+			spi0_clk: spi0-clk {
+				rockchip,pins =
+					<1 RK_PB7 1 &pcfg_pull_up_4ma>;
+			};
+
+			spi0_mosi_hs: spi0-mosi-hs {
+				rockchip,pins =
+					<1 RK_PB4 1 &pcfg_pull_up_8ma>;
+			};
+
+			spi0_miso_hs: spi0-miso-hs {
+				rockchip,pins =
+					<1 RK_PB5 1 &pcfg_pull_up_8ma>;
+			};
+
+			spi0_csn_hs: spi0-csn-hs {
+				rockchip,pins =
+					<1 RK_PB6 1 &pcfg_pull_up_8ma>;
+			};
+
+			spi0_clk_hs: spi0-clk-hs {
+				rockchip,pins =
+					<1 RK_PB7 1 &pcfg_pull_up_8ma>;
+			};
+		};
+
+		spi1 {
+			spi1_clk: spi1-clk {
+				rockchip,pins =
+					<4 RK_PB4 2 &pcfg_pull_up_4ma>;
+			};
+
+			spi1_mosi: spi1-mosi {
+				rockchip,pins =
+					<4 RK_PB5 2 &pcfg_pull_up_4ma>;
+			};
+
+			spi1_csn0: spi1-csn0 {
+				rockchip,pins =
+					<4 RK_PB6 2 &pcfg_pull_up_4ma>;
+			};
+
+			spi1_miso: spi1-miso {
+				rockchip,pins =
+					<4 RK_PB7 2 &pcfg_pull_up_4ma>;
+			};
+
+			spi1_csn1: spi1-csn1 {
+				rockchip,pins =
+					<4 RK_PC0 2 &pcfg_pull_up_4ma>;
+			};
+
+			spi1_clk_hs: spi1-clk-hs {
+				rockchip,pins =
+					<4 RK_PB4 2 &pcfg_pull_up_8ma>;
+			};
+
+			spi1_mosi_hs: spi1-mosi-hs {
+				rockchip,pins =
+					<4 RK_PB5 2 &pcfg_pull_up_8ma>;
+			};
+
+			spi1_csn0_hs: spi1-csn0-hs {
+				rockchip,pins =
+					<4 RK_PB6 2 &pcfg_pull_up_8ma>;
+			};
+
+			spi1_miso_hs: spi1-miso-hs {
+				rockchip,pins =
+					<4 RK_PB7 2 &pcfg_pull_up_8ma>;
+			};
+
+			spi1_csn1_hs: spi1-csn1-hs {
+				rockchip,pins =
+					<4 RK_PC0 2 &pcfg_pull_up_8ma>;
+			};
+		};
+
+		spi1m1 {
+			spi1m1_clk: spi1m1-clk {
+				rockchip,pins =
+					<3 RK_PC7 3 &pcfg_pull_up_4ma>;
+			};
+
+			spi1m1_mosi: spi1m1-mosi {
+				rockchip,pins =
+					<3 RK_PD0 3 &pcfg_pull_up_4ma>;
+			};
+
+			spi1m1_csn0: spi1m1-csn0 {
+				rockchip,pins =
+					<3 RK_PD1 3 &pcfg_pull_up_4ma>;
+			};
+
+			spi1m1_miso: spi1m1-miso {
+				rockchip,pins =
+					<3 RK_PD2 3 &pcfg_pull_up_4ma>;
+			};
+
+			spi1m1_csn1: spi1m1-csn1 {
+				rockchip,pins =
+					<3 RK_PD3 3 &pcfg_pull_up_4ma>;
+			};
+
+			spi1m1_clk_hs: spi1m1-clk-hs {
+				rockchip,pins =
+					<3 RK_PC7 3 &pcfg_pull_none>;
+			};
+
+			spi1m1_mosi_hs: spi1m1-mosi-hs {
+				rockchip,pins =
+					<3 RK_PD0 3 &pcfg_pull_none>;
+			};
+
+			spi1m1_csn0_hs: spi1m1-csn0-hs {
+				rockchip,pins =
+					<3 RK_PD1 3 &pcfg_pull_none>;
+			};
+
+			spi1m1_miso_hs: spi1m1-miso-hs {
+				rockchip,pins =
+					<3 RK_PD2 3 &pcfg_pull_none>;
+			};
+
+			spi1m1_csn1_hs: spi1m1-csn1-hs {
+				rockchip,pins =
+					<3 RK_PD3 3 &pcfg_pull_none>;
+			};
+		};
+
+		spi2m0 {
+			spi2m0_miso: spi2m0-miso {
+				rockchip,pins =
+					<1 RK_PA6 2 &pcfg_pull_up_4ma>;
+			};
+
+			spi2m0_clk: spi2m0-clk {
+				rockchip,pins =
+					<1 RK_PA7 2 &pcfg_pull_up_4ma>;
+			};
+
+			spi2m0_mosi: spi2m0-mosi {
+				rockchip,pins =
+					<1 RK_PB0 2 &pcfg_pull_up_4ma>;
+			};
+
+			spi2m0_csn: spi2m0-csn {
+				rockchip,pins =
+					<1 RK_PB1 2 &pcfg_pull_up_4ma>;
+			};
+
+			spi2m0_miso_hs: spi2m0-miso-hs {
+				rockchip,pins =
+					<1 RK_PA6 2 &pcfg_pull_none>;
+			};
+
+			spi2m0_clk_hs: spi2m0-clk-hs {
+				rockchip,pins =
+					<1 RK_PA7 2 &pcfg_pull_none>;
+			};
+
+			spi2m0_mosi_hs: spi2m0-mosi-hs {
+				rockchip,pins =
+					<1 RK_PB0 2 &pcfg_pull_none>;
+			};
+
+			spi2m0_csn_hs: spi2m0-csn-hs {
+				rockchip,pins =
+					<1 RK_PB1 2 &pcfg_pull_none>;
+			};
+		};
+
+		spi2m1 {
+			spi2m1_miso: spi2m1-miso {
+				rockchip,pins =
+					<2 RK_PA4 3 &pcfg_pull_up_4ma>;
+			};
+
+			spi2m1_clk: spi2m1-clk {
+				rockchip,pins =
+					<2 RK_PA5 3 &pcfg_pull_up_4ma>;
+			};
+
+			spi2m1_mosi: spi2m1-mosi {
+				rockchip,pins =
+					<2 RK_PA6 3 &pcfg_pull_up_4ma>;
+			};
+
+			spi2m1_csn: spi2m1-csn {
+				rockchip,pins =
+					<2 RK_PA7 3 &pcfg_pull_up_4ma>;
+			};
+
+			spi2m1_miso_hs: spi2m1-miso-hs {
+				rockchip,pins =
+					<2 RK_PA4 3 &pcfg_pull_none>;
+			};
+
+			spi2m1_clk_hs: spi2m1-clk-hs {
+				rockchip,pins =
+					<2 RK_PA5 3 &pcfg_pull_none>;
+			};
+
+			spi2m1_mosi_hs: spi2m1-mosi-hs {
+				rockchip,pins =
+					<2 RK_PA6 3 &pcfg_pull_none>;
+			};
+
+			spi2m1_csn_hs: spi2m1-csn-hs {
+				rockchip,pins =
+					<2 RK_PA7 3 &pcfg_pull_none>;
+			};
+		};
+
+		uart2m0 {
+			uart2m0_xfer: uart2m0-xfer {
+				rockchip,pins =
+					/* uart2_rxm0 */
+					<4 RK_PA3 2 &pcfg_pull_none>,
+					/* uart2_txm0 */
+					<4 RK_PA2 2 &pcfg_pull_none>;
+			};
+		};
+
+		uart2m1 {
+			uart2m1_xfer: uart2m1-xfer {
+				rockchip,pins =
+					/* uart2_rxm1 */
+					<2 RK_PD1 2 &pcfg_pull_none>,
+					/* uart2_txm1 */
+					<2 RK_PD0 2 &pcfg_pull_none>;
+			};
+		};
+
+		uart2m2 {
+			uart2m2_xfer: uart2m2-xfer {
+				rockchip,pins =
+					/* uart2_rxm2 */
+					<3 RK_PA4 2 &pcfg_pull_none>,
+					/* uart2_txm2 */
+					<3 RK_PA3 2 &pcfg_pull_none>;
+			};
+		};
+		tsadc {
+			tsadc_otp_gpio: tsadc-otp-gpio {
+				rockchip,pins =
+					<0 RK_PA6 0 &pcfg_pull_none>;
+			};
+
+			tsadc_otp_out: tsadc-otp-out {
+				rockchip,pins =
+					<0 RK_PA6 2 &pcfg_pull_none>;
+			};
+		};
+	};
+};
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index afa6a772ef..9d237d4bd6 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -527,5 +527,6 @@ source "arch/arm/mach-rockchip/rk3308/Kconfig"
 source "arch/arm/mach-rockchip/rk3328/Kconfig"
 source "arch/arm/mach-rockchip/rk3368/Kconfig"
 source "arch/arm/mach-rockchip/rk3399/Kconfig"
+source "arch/arm/mach-rockchip/rk1808/Kconfig"
 source "arch/arm/mach-rockchip/rv1108/Kconfig"
 endif
diff --git a/arch/arm/mach-rockchip/rk1808/Kconfig b/arch/arm/mach-rockchip/rk1808/Kconfig
new file mode 100644
index 0000000000..66ad22f518
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk1808/Kconfig
@@ -0,0 +1,15 @@
+if ROCKCHIP_RK1808
+
+config TARGET_EVB_RK1808
+	bool "EVB_RK1808"
+	select BOARD_LATE_INIT
+
+config SYS_SOC
+	default "rockchip"
+
+config SYS_MALLOC_F_LEN
+	default 0x400
+
+source "board/rockchip/evb_rk1808/Kconfig"
+
+endif
diff --git a/board/rockchip/evb_rk1808/Kconfig b/board/rockchip/evb_rk1808/Kconfig
new file mode 100644
index 0000000000..0da54f0137
--- /dev/null
+++ b/board/rockchip/evb_rk1808/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_EVB_RK1808
+
+config SYS_BOARD
+	default "evb_rk1808"
+
+config SYS_VENDOR
+	default "rockchip"
+
+config SYS_CONFIG_NAME
+	default "evb_rk1808"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+
+endif
diff --git a/board/rockchip/evb_rk1808/MAINTAINERS b/board/rockchip/evb_rk1808/MAINTAINERS
new file mode 100644
index 0000000000..883c15ab85
--- /dev/null
+++ b/board/rockchip/evb_rk1808/MAINTAINERS
@@ -0,0 +1,6 @@
+EVB-RK1808
+M:      Joseph Chen <chenjh@rock-chips.com>
+S:      Maintained
+F:      board/rockchip/evb_rk1808
+F:      include/configs/evb_rk1808.h
+F:      configs/rk1808_defconfig
diff --git a/board/rockchip/evb_rk1808/Makefile b/board/rockchip/evb_rk1808/Makefile
new file mode 100644
index 0000000000..145218c226
--- /dev/null
+++ b/board/rockchip/evb_rk1808/Makefile
@@ -0,0 +1,7 @@
+#
+# (C) Copyright 2018 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y	+= evb_rk1808.o
diff --git a/board/rockchip/evb_rk1808/evb_rk1808.c b/board/rockchip/evb_rk1808/evb_rk1808.c
new file mode 100644
index 0000000000..3a69da06e1
--- /dev/null
+++ b/board/rockchip/evb_rk1808/evb_rk1808.c
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier:     GPL-2.0+
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ */
+
+#include <common.h>
+
+DECLARE_GLOBAL_DATA_PTR;
diff --git a/configs/rk1808_defconfig b/configs/rk1808_defconfig
new file mode 100644
index 0000000000..313c93ad8e
--- /dev/null
+++ b/configs/rk1808_defconfig
@@ -0,0 +1,53 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_ROCKCHIP_RK1808=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_TARGET_EVB_RK1808=y
+CONFIG_DEFAULT_DEVICE_TREE="rk1808-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_BOOTDELAY=0
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_RKPARM_PARTITION=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_ADC_KEY=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PINCTRL=y
+CONFIG_DM_FUEL_GAUGE=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_RKNAND=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0xff550000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_SYSRESET=y
diff --git a/include/configs/evb_rk1808.h b/include/configs/evb_rk1808.h
new file mode 100644
index 0000000000..e2eb28768a
--- /dev/null
+++ b/include/configs/evb_rk1808.h
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ */
+
+#ifndef __EVB_RK1808_H
+#define __EVB_RK1808_H
+
+#include <configs/rk1808_common.h>
+
+#define ROCKCHIP_DEVICE_SETTINGS \
+			"stdout=serial,vidconsole\0" \
+			"stderr=serial,vidconsole\0"
+
+#ifndef CONFIG_SPL_BUILD
+#undef CONFIG_BOOTCOMMAND
+#define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
+#endif
+
+#endif
diff --git a/include/dt-bindings/clock/rk1808-cru.h b/include/dt-bindings/clock/rk1808-cru.h
index f42e43b43c..79938f7388 100644
--- a/include/dt-bindings/clock/rk1808-cru.h
+++ b/include/dt-bindings/clock/rk1808-cru.h
@@ -54,7 +54,7 @@
 #define SCLK_GMAC		53
 #define SCLK_GMAC_REF		54
 #define SCLK_GMAC_REFOUT	55
-#define SCLK_GMAC_RGMI_SPEED	56
+#define SCLK_GMAC_RGMII_SPEED	56
 #define SCLK_GMAC_RMII_SPEED	57
 #define SCLK_GMAC_RX_TX		58
 #define SCLK_CRYPTO		59
@@ -351,8 +351,9 @@
 #define SRST_SFC_H		136
 #define SRST_SFC		137
 #define SRST_GMAC_NIU_A		140
-#define SRST_GMAC_NIU_P		141
-#define SRST_GAMC_A		142
+#define SRST_GMAC_NIU_H		141
+#define SRST_GMAC_NIU_P		142
+#define SRST_GAMC_A		143
 
 /* cru_softrst_con9 */
 #define SRST_PMU_NIU_P		144

commit 10660eccefaf133a5efee34520f3e01cf5352414
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Sep 3 10:52:24 2018 +0800

    rockchip: resource: improve error and debug message
    
    Change-Id: I35cb6229048952f35701e33b30fb30fcca93a7ca
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index e871649178..b67af6816f 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -113,7 +113,8 @@ static int resource_image_check_header(const struct resource_img_hdr *hdr)
 
 	ret = memcmp(RESOURCE_MAGIC, hdr->magic, RESOURCE_MAGIC_SIZE);
 	if (ret) {
-		printf("bad resource image magic\n");
+		printf("bad resource image magic: %s\n",
+		       hdr->magic ? hdr->magic : "none");
 		ret = -EINVAL;
 	}
 	debug("resource image header:\n");
@@ -192,7 +193,7 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 	}
 	hdr = memalign(ARCH_DMA_MINALIGN, RK_BLK_SIZE);
 	if (!hdr) {
-		printf("%s out of memory!\n", __func__);
+		printf("%s: out of memory!\n", __func__);
 		return -ENOMEM;
 	}
 
@@ -213,7 +214,8 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 #endif
 	ret = part_get_info_by_name(dev_desc, boot_partname, &part_info);
 	if (ret < 0) {
-		printf("fail to get %s part\n", boot_partname);
+		printf("%s: failed to get %s part, ret=%d\n",
+		       __func__, boot_partname, ret);
 		/* RKIMG can support part table without 'boot' */
 		goto next;
 	}
@@ -225,12 +227,13 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 	andr_hdr = (void *)hdr;
 	ret = blk_dread(dev_desc, part_info.start, 1, andr_hdr);
 	if (ret != 1) {
-		printf("%s read fail\n", __func__);
+		printf("%s: failed to read %s hdr, ret=%d\n",
+		       __func__, part_info.name, ret);
 		goto out;
 	}
 	ret = android_image_check_header(andr_hdr);
 	if (!ret) {
-		debug("%s Load resource from %s senond pos\n",
+		debug("%s: Load resource from %s second pos\n",
 		      __func__, part_info.name);
 		/* Read resource from second offset */
 		offset = part_info.start * RK_BLK_SIZE;
@@ -248,20 +251,24 @@ next:
 	 * try to read RK format images(resource part).
 	 */
 	if (!resource_found) {
+		debug("%s: Load resource from resource part\n", __func__);
 		/* Read resource from Rockchip Resource partition */
 		ret = part_get_info_by_name(dev_desc, PART_RESOURCE, &part_info);
 		if (ret < 0) {
-			printf("fail to get %s part\n", PART_RESOURCE);
+			printf("%s: failed to get resource part, ret=%d\n",
+			       __func__, ret);
 			goto out;
 		}
 		offset = part_info.start;
-		debug("%s Load resource from %s\n", __func__, part_info.name);
 	}
 
 	/* Only read header and check magic */
 	ret = blk_dread(dev_desc, offset, 1, hdr);
-	if (ret != 1)
+	if (ret != 1) {
+		printf("%s: failed to read resource hdr, ret=%d\n",
+		       __func__, ret);
 		goto out;
+	}
 
 	ret = resource_image_check_header(hdr);
 	if (ret < 0)
@@ -270,15 +277,18 @@ next:
 	content = memalign(ARCH_DMA_MINALIGN,
 			   hdr->e_blks * hdr->e_nums * RK_BLK_SIZE);
 	if (!content) {
-		printf("alloc memory for content failed\n");
+		printf("%s: failed to alloc memory for content\n", __func__);
 		goto out;
 	}
 
-	/* Real read whole resource image */
+	/* Read all entries from resource image */
 	ret = blk_dread(dev_desc, offset + hdr->c_offset,
 			hdr->e_blks * hdr->e_nums, content);
-	if (ret != (hdr->e_blks * hdr->e_nums))
+	if (ret != (hdr->e_blks * hdr->e_nums)) {
+		printf("%s: failed to read resource entries, ret=%d\n",
+		       __func__, ret);
 		goto err;
+	}
 
 	for (e_num = 0; e_num < hdr->e_nums; e_num++) {
 		size = e_num * hdr->e_blks * RK_BLK_SIZE;

commit be5c9a601780fbd6d3c31a18ba0a0ebdf9e92ce0
Author: Yu YongZhen <yuyz@rock-chips.com>
Date:   Sat Sep 1 13:54:55 2018 +0800

    rockchip: configs: evb-aarch-rk3308: enable rockchip vendor partition
    
    Change-Id: Ic3a360320bd61a524cd2d39c7ebdbabce2db96e3
    Signed-off-by: Yu YongZhen <yuyz@rock-chips.com>

diff --git a/configs/evb-aarch32-rk3308_defconfig b/configs/evb-aarch32-rk3308_defconfig
index 5a2b43d056..5255e19da8 100644
--- a/configs/evb-aarch32-rk3308_defconfig
+++ b/configs/evb-aarch32-rk3308_defconfig
@@ -5,6 +5,7 @@ CONFIG_ROCKCHIP_RK3308=y
 CONFIG_ARM64_BOOT_AARCH32=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 # CONFIG_USING_KERNEL_DTB is not set
 CONFIG_TARGET_EVB_RK3308=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3308-evb"
@@ -46,8 +47,8 @@ CONFIG_RAM=y
 CONFIG_DM_RESET=y
 CONFIG_RKFLASH=y
 CONFIG_RKNANDC_NAND=y
-CONFIG_RKSFC_NOR=y
 CONFIG_RKSFC_NAND=y
+CONFIG_RKSFC_NOR=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF0C0000
 CONFIG_DEBUG_UART_CLOCK=24000000

commit 491dd3347b3f01fe45d4cb6a646edd7d65025d6e
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Tue Aug 28 17:41:40 2018 +0800

    rockchip: rv1108: tpl: Add RV1108 TPL_TINY_FRAMEWORK support
    
    We can init ddr in tiny tpl because of SRAM size limit.
    
    Change-Id: I2d914b7dc9c01399b418539f1b564f9cbbe1be5b
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 3a86a718e4..afa6a772ef 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -292,12 +292,30 @@ config ROCKCHIP_RV1108
 	bool "Support Rockchip RV1108"
 	select CPU_V7
 	select SUPPORT_SPL
+	select SUPPORT_TPL
 	select SPL
+	select TPL
 	select BOARD_LATE_INIT
 	help
 	  The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
 	  and a DSP.
 
+if ROCKCHIP_RV1108
+
+config TPL_LDSCRIPT
+        default "arch/arm/mach-rockchip/u-boot-tpl.lds"
+
+config TPL_TEXT_BASE
+        default 0x10080800
+
+config TPL_MAX_SIZE
+        default 6144
+
+config TPL_STACK
+        default 0x10082000
+
+endif
+
 config SPL_ROCKCHIP_BACK_TO_BROM
 	bool "SPL returns to bootrom"
 	default y if ROCKCHIP_RK3036
diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig
index f8b09f8a88..6a5c098770 100644
--- a/configs/evb-rv1108_defconfig
+++ b/configs/evb-rv1108_defconfig
@@ -4,6 +4,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_ROCKCHIP_RV1108=y
 CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_RKIMG_BOOTLOADER=y
 # CONFIG_USING_KERNEL_DTB is not set
 CONFIG_SPL_SERIAL_SUPPORT=y
@@ -14,6 +15,8 @@ CONFIG_DEBUG_UART=y
 # CONFIG_CONSOLE_MUX is not set
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
+CONFIG_TPL_TINY_FRAMEWORK=y
+CONFIG_TPL_SERIAL_SUPPORT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x62000000
 CONFIG_FASTBOOT_BUF_SIZE=0x08000000
 CONFIG_FASTBOOT_FLASH=y
@@ -27,8 +30,10 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIME=y
 CONFIG_SPL_OF_CONTROL=y
+CONFIG_TPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
 CONFIG_SPL_OF_PLATDATA=y
+CONFIG_TPL_OF_PLATDATA=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
@@ -55,6 +60,7 @@ CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
 CONFIG_DM_RESET=y
 CONFIG_RKFLASH=y
 CONFIG_RKSFC_NOR=y

commit a3f8c59f08a40d8cd3a986390546c9926df5745a
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Tue Aug 28 17:16:37 2018 +0800

    rockchip: ARM: tpl: add TPL_TINY_FRAMEWORK flow for arm
    
    If sram size is small for TPL build, it can defined
    CONFIG_TPL_TINY_FRAMEWORK to reduce TPL size.
    For ARM if defined CONFIG_TPL_TINY_FRAMEWORK when build TPL, after
    save_boot_params(), it jump to board_init_f() directly, then return to
    maskrom. and stack also use maskrom defined result, never change the SP.
    
    Change-Id: I9a90d031a5d200f86c437175e9ea47e8a34062ac
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 289ebc03f6..8d4d4a577d 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -36,6 +36,8 @@
 	.global	switch_to_hypervisor_ret
 #endif
 
+#if !CONFIG_IS_ENABLED(TINY_FRAMEWORK)
+
 reset:
 	/* Allow the board to save important registers */
 	b	save_boot_params
@@ -109,6 +111,8 @@ ENTRY(c_runtime_cpu_setup)
 
 ENDPROC(c_runtime_cpu_setup)
 
+#endif/* !CONFIG_IS_ENABLED(TINY_FRAMEWORK) */
+
 /*************************************************************************
  *
  * void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3)
diff --git a/arch/arm/include/asm/arch-rockchip/boot0.h b/arch/arm/include/asm/arch-rockchip/boot0.h
index d5bbe31e84..feb659d07b 100644
--- a/arch/arm/include/asm/arch-rockchip/boot0.h
+++ b/arch/arm/include/asm/arch-rockchip/boot0.h
@@ -42,9 +42,17 @@ entry_counter:
 
 #if (defined(CONFIG_SPL_BUILD) || defined(CONFIG_ARM64))
 	/* U-Boot proper of armv7 do not need this */
-#if CONFIG_IS_ENABLED(TINY_FRAMEWORK) && defined(CONFIG_ARM64)
+#if CONFIG_IS_ENABLED(TINY_FRAMEWORK)
+#if !defined(CONFIG_ARM64)
+	/*
+	 * For armv7, the addr '_start' will check by u-boot-tpl.lds file.
+	 */
+_start:
+#endif
 	/* Allow the board to save important registers */
 	b save_boot_params
+
+.type   save_boot_params_ret, % function
 .globl	save_boot_params_ret
 save_boot_params_ret:
 	b board_init_f
@@ -54,7 +62,7 @@ save_boot_params_ret:
 
 #endif
 
-#if !defined(CONFIG_ARM64)
+#if !defined(CONFIG_ARM64) && !CONFIG_IS_ENABLED(TINY_FRAMEWORK)
 	/*
 	 * For armv7, the addr '_start' will used as vector start address
 	 * and write to VBAR register, which needs to aligned to 0x20.
diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c
index ee70aae527..73e4ed386c 100644
--- a/arch/arm/mach-rockchip/tpl.c
+++ b/arch/arm/mach-rockchip/tpl.c
@@ -34,13 +34,13 @@ void putc(char c)
 #endif /* CONFIG_TPL_LIBCOMMON_SUPPORT */
 
 #ifndef CONFIG_TPL_LIBGENERIC_SUPPORT
-#ifdef CONFIG_ARM64
-/* for ARM64,it don't have define timer_init and __udelay except lib/timer.c */
 int __weak timer_init(void)
 {
 	return 0;
 }
 
+#ifdef CONFIG_ARM64
+/* for ARM64,it don't have define timer_init and __udelay except lib/timer.c */
 void __weak __udelay(unsigned long usec)
 {
 	u64 i, j, count;
@@ -56,6 +56,24 @@ void __weak __udelay(unsigned long usec)
 			break;
 	}
 }
+#else
+void __weak __udelay(unsigned long usec)
+{
+	u32 nowl, nowu;
+	u64 cur_count, end_count;
+
+	asm volatile("mrrc p15, 0, %0, %1, c14" : "=r" (nowl), "=r" (nowu));
+	cur_count = (u64)nowu << 32 | nowl;
+	/* usec to count,24MHz */
+	end_count = usec * 24 + cur_count;
+	while (1) {
+		asm volatile("mrrc p15, 0, %0, %1, c14" : "=r" (nowl),
+			     "=r" (nowu));
+		cur_count = (u64)nowu << 32 | nowl;
+		if (cur_count > end_count)
+			break;
+	}
+}
 #endif /* CONFIG_ARM64 */
 
 void udelay(unsigned long usec)
diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index 38ff08a57f..f159cbddf3 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -9,7 +9,13 @@
 #include <linux/sizes.h>
 
 #define COUNTER_FREQUENCY               24000000
+
+#if CONFIG_IS_ENABLED(TINY_FRAMEWORK) && !defined(CONFIG_ARM64)
+#undef CONFIG_SYS_ARCH_TIMER
+#else
 #define CONFIG_SYS_ARCH_TIMER
+#endif
+
 #define CONFIG_SYS_HZ_CLOCK	24000000
 
 #define CONFIG_SYS_NS16550_MEM32

commit a82a427da447f04e8385434b08970df4a51d05d1
Author: YouMin Chen <cym@rock-chips.com>
Date:   Tue Aug 28 17:13:15 2018 +0800

    driver: ram: rockhip: px30: fix auto power down issue
    
    1.The recommends value of dfi_tlp_resp is 7.
    2.Set PHY_REG07[7] to 1 for off digit module clock when enter power down.
    3.Force set DDR3 or DDR4 active_ranks to 3 to workaround the issue of
    gate memory clock when enter power down.
    
    Change-Id: Iea4dd5554a7c527053c91ab7bd0a9db8c8223b59
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram-px30-ddr3-detect-333.inc b/drivers/ram/rockchip/sdram-px30-ddr3-detect-333.inc
index 561273f40c..422364f462 100644
--- a/drivers/ram/rockchip/sdram-px30-ddr3-detect-333.inc
+++ b/drivers/ram/rockchip/sdram-px30-ddr3-detect-333.inc
@@ -45,7 +45,7 @@
 			{0x00000180, 0x00800020},	/* ZQCTL0 */
 			{0x00000184, 0x00000000},	/* ZQCTL1 */
 			{0x00000190, 0x07010001},	/* DFITMG0 */
-			{0x00000198, 0x05000101},	/* DFILPCFG0 */
+			{0x00000198, 0x07000101},	/* DFILPCFG0 */
 			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
 			{0x00000240, 0x06000604},	/* ODTCFG */
 			{0x00000244, 0x00000201},	/* ODTMAP */
diff --git a/drivers/ram/rockchip/sdram-px30-ddr4-detect-333.inc b/drivers/ram/rockchip/sdram-px30-ddr4-detect-333.inc
index dddd2f0269..0d4152769a 100644
--- a/drivers/ram/rockchip/sdram-px30-ddr4-detect-333.inc
+++ b/drivers/ram/rockchip/sdram-px30-ddr4-detect-333.inc
@@ -48,7 +48,7 @@
 			{0x00000180, 0x01000040},	/* ZQCTL0 */
 			{0x00000184, 0x00000000},	/* ZQCTL1 */
 			{0x00000190, 0x07030003},	/* DFITMG0 */
-			{0x00000198, 0x05000101},	/* DFILPCFG0 */
+			{0x00000198, 0x07000101},	/* DFILPCFG0 */
 			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
 			{0x00000240, 0x06000604},	/* ODTCFG */
 			{0x00000244, 0x00000201},	/* ODTMAP */
diff --git a/drivers/ram/rockchip/sdram-px30-lpddr2-detect-333.inc b/drivers/ram/rockchip/sdram-px30-lpddr2-detect-333.inc
index b65cb0a98f..ec51ad42be 100644
--- a/drivers/ram/rockchip/sdram-px30-lpddr2-detect-333.inc
+++ b/drivers/ram/rockchip/sdram-px30-lpddr2-detect-333.inc
@@ -47,7 +47,7 @@
 			{0x00000180, 0x003c000f},	/* ZQCTL0 */
 			{0x00000184, 0x00900000},	/* ZQCTL1 */
 			{0x00000190, 0x07020001},	/* DFITMG0 */
-			{0x00000198, 0x05000101},	/* DFILPCFG0 */
+			{0x00000198, 0x07000101},	/* DFILPCFG0 */
 			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
 			{0x00000240, 0x07030718},	/* ODTCFG */
 			{0x00000250, 0x00001f00},	/* SCHED */
diff --git a/drivers/ram/rockchip/sdram-px30-lpddr3-detect-333.inc b/drivers/ram/rockchip/sdram-px30-lpddr3-detect-333.inc
index f3a1816ee6..606f6ddd94 100644
--- a/drivers/ram/rockchip/sdram-px30-lpddr3-detect-333.inc
+++ b/drivers/ram/rockchip/sdram-px30-lpddr3-detect-333.inc
@@ -47,7 +47,7 @@
 			{0x00000180, 0x003c000f},	/* ZQCTL0 */
 			{0x00000184, 0x00900000},	/* ZQCTL1 */
 			{0x00000190, 0x07020000},	/* DFITMG0 */
-			{0x00000198, 0x05000101},	/* DFILPCFG0 */
+			{0x00000198, 0x07000101},	/* DFILPCFG0 */
 			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
 			{0x00000240, 0x0900090c},	/* ODTCFG */
 			{0x00000244, 0x00000101},	/* ODTMAP */
diff --git a/drivers/ram/rockchip/sdram_px30.c b/drivers/ram/rockchip/sdram_px30.c
index fc99d024f6..d186258f53 100644
--- a/drivers/ram/rockchip/sdram_px30.c
+++ b/drivers/ram/rockchip/sdram_px30.c
@@ -697,6 +697,7 @@ static void enable_low_power(struct dram_info *dram,
 			     struct px30_sdram_params *sdram_params)
 {
 	void __iomem *pctl_base = dram->pctl;
+	void __iomem *phy_base = dram->phy;
 	void __iomem *ddr_grf_base = dram->ddr_grf;
 	u32 grf_lp_con;
 
@@ -722,6 +723,18 @@ static void enable_low_power(struct dram_info *dram,
 	grf_lp_con = grf_lp_con | (0x1 << (9 + 16)) | (0x1 << 9);
 	writel(grf_lp_con, ddr_grf_base + DDR_GRF_LP_CON);
 
+	/* off digit module clock when enter power down */
+	setbits_le32(PHY_REG(phy_base, 7), 1 << 7);
+
+	/*
+	 * If DDR3 or DDR4 active_ranks=1,
+	 * it will gate memory clock when enter power down.
+	 * Force set active_ranks to 3 to workaround it.
+	 */
+	if (sdram_params->dramtype == DDR3 || sdram_params->dramtype == DDR4)
+		clrsetbits_le32(pctl_base + DDR_PCTL2_MSTR, 0x3 << 24,
+				0x3 << 24);
+
 	/* enable sr, pd */
 	if (PD_IDLE == 0)
 		clrbits_le32(pctl_base + DDR_PCTL2_PWRCTL, (1 << 1));

commit 28d6bb028c63c86a61b454f218408a992b1bab3b
Author: YouMin Chen <cym@rock-chips.com>
Date:   Tue Aug 28 17:10:13 2018 +0800

    driver: ram: rockhip: px30: fix deskew config error
    
    Change-Id: Ia2df921eafc2758431aec2f7079aac5b01d58d53
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram_px30.c b/drivers/ram/rockchip/sdram_px30.c
index 7b28887404..fc99d024f6 100644
--- a/drivers/ram/rockchip/sdram_px30.c
+++ b/drivers/ram/rockchip/sdram_px30.c
@@ -364,7 +364,7 @@ static void phy_cfg(struct dram_info *dram,
 	copy_to_reg(PHY_REG(phy_base, 0x70),
 		    &sdram_params->skew->cs0_dm0_skew[0], 44 * 4);
 	copy_to_reg(PHY_REG(phy_base, 0xc0),
-		    &sdram_params->skew->cs0_dm1_skew[0], 44 * 4);
+		    &sdram_params->skew->cs1_dm0_skew[0], 44 * 4);
 }
 
 static int update_refresh_reg(struct dram_info *dram)

commit 0c653b7e3f8a27a7e5a5898b873d6f56ed11fe2f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 30 16:05:13 2018 +0800

    test: rockchip: emmc/rknand: remove unused head file
    
    Change-Id: I7d38b27d0e61df979facb1c17907ef18e882b1ad
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/test/rockchip/test-emmc.c b/test/rockchip/test-emmc.c
index 7dc538e45d..383998b663 100644
--- a/test/rockchip/test-emmc.c
+++ b/test/rockchip/test-emmc.c
@@ -7,8 +7,6 @@
 #include <asm/io.h>
 #include <cli.h>
 #include <common.h>
-#include <irq-generic.h>
-#include <irq-platform.h>
 #include <linux/compat.h>
 #include <malloc.h>
 #include "test-rockchip.h"
diff --git a/test/rockchip/test-rknand.c b/test/rockchip/test-rknand.c
index c02b003039..59a6e2be6f 100644
--- a/test/rockchip/test-rknand.c
+++ b/test/rockchip/test-rknand.c
@@ -8,8 +8,6 @@
 #include <cli.h>
 #include <common.h>
 #include <linux/compat.h>
-#include <irq-generic.h>
-#include <irq-platform.h>
 #include <malloc.h>
 #include "test-rockchip.h"
 

commit dbe1e39c43687087fc857590d6b2c9feb97fbc80
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 30 16:04:50 2018 +0800

    test: rockchip: timer: compile depends on CONFIG_IRQ
    
    Change-Id: Ibe626355a882af3e879a604820b7c685c8bd533d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/test/rockchip/Makefile b/test/rockchip/Makefile
index 4739485926..319f22f553 100644
--- a/test/rockchip/Makefile
+++ b/test/rockchip/Makefile
@@ -5,8 +5,8 @@
 #
 
 obj-y += test-rockchip.o
-obj-y += test-timer.o
 obj-y += test-brom-dnl.o
+obj-$(CONFIG_IRQ) += test-timer.o
 obj-$(CONFIG_DM_KEY) += test-key.o
 obj-$(CONFIG_MMC) += test-emmc.o
 obj-$(CONFIG_DM_REGULATOR)+= test-regulator.o
diff --git a/test/rockchip/test-rockchip.c b/test/rockchip/test-rockchip.c
index 29a4fc3dae..8ecf5d524d 100644
--- a/test/rockchip/test-rockchip.c
+++ b/test/rockchip/test-rockchip.c
@@ -14,7 +14,9 @@ typedef struct board_module {
 } board_module_t;
 
 static board_module_t g_board_modules[] = {
+#if defined(CONFIG_IRQ)
 	{ .name = "timer",	.test = board_timer_test },
+#endif
 	{ .name = "brom",	.test = board_brom_dnl_test },
 
 #if defined(CONFIG_DM_KEY)

commit 7623c170e8eb86c0787bf8a1ba50ce48fcba067f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 30 14:49:17 2018 +0800

    pmic: rk8xx: print source on and off
    
    It tells the reason why PMIC current powers on an last powers off,
    this helps a lot for debugging when system suddenly power off or
    restart due to unknown power supply cause.
    
    Change-Id: Iec0c38dc1ac5745a9bc473848b5d617059b16faf
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index 732f3dca5e..d9abd6de6f 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -158,6 +158,7 @@ static int rk8xx_probe(struct udevice *dev)
 	int init_data_num = 0;
 	int ret = 0, i, show_variant;
 	uint8_t msb, lsb, id_msb, id_lsb;
+	uint8_t on_source = 0, off_source = 0;
 
 	/* read Chip variant */
 	if (device_is_compatible(dev, "rockchip,rk817") ||
@@ -185,9 +186,13 @@ static int rk8xx_probe(struct udevice *dev)
 	case RK805_ID:
 	case RK816_ID:
 	case RK818_ID:
+		on_source = RK8XX_ON_SOURCE;
+		off_source = RK8XX_OFF_SOURCE;
 		break;
 	case RK809_ID:
 	case RK817_ID:
+		on_source = RK817_ON_SOURCE;
+		off_source = RK817_OFF_SOURCE;
 #ifdef CONFIG_DM_CHARGE_DISPLAY
 		init_data = rk817_init_reg;
 		init_data_num = ARRAY_SIZE(rk817_init_reg);
@@ -212,7 +217,16 @@ static int rk8xx_probe(struct udevice *dev)
 		      pmic_reg_read(dev, init_data[i].reg));
 	}
 
-	printf("PMIC:  RK%x\n", show_variant);
+	printf("PMIC:  RK%x ", show_variant);
+
+	if (on_source && off_source) {
+		on_source = pmic_reg_read(dev, on_source);
+		off_source = pmic_reg_read(dev, off_source);
+		printf("(on=0x%02x, off=0x%02x)",
+		       pmic_reg_read(dev, on_source),
+		       pmic_reg_read(dev, off_source));
+	}
+	printf("\n");
 
 	return 0;
 }
diff --git a/include/power/rk8xx_pmic.h b/include/power/rk8xx_pmic.h
index f8297db791..81b58a88c1 100644
--- a/include/power/rk8xx_pmic.h
+++ b/include/power/rk8xx_pmic.h
@@ -199,6 +199,11 @@ enum {
 #define RK817_PMIC_SYS_CFG3	0xf4
 #define RK817_GPIO_INT_CFG	0xfe
 
+#define RK8XX_ON_SOURCE		0xae
+#define RK8XX_OFF_SOURCE	0xaf
+#define RK817_ON_SOURCE		0xf5
+#define RK817_OFF_SOURCE	0xf6
+
 struct reg_data {
 	u8 reg;
 	u8 val;

commit dc490422b65c7e18b8543dff36a26f5478272d67
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 23 17:43:13 2018 +0800

    rockchip: add rk atags support
    
    The atags information is deliverd among rockchip pre-loaders,
    i.e. ddr, miniloader, atf, tos and U-boot, etc.
    
    Notice: the first pre-loader who creates the atags must call
    atags_destroy() before atags_set_tag(), because atags_set_tag()
    may detect last valid and existence ATAG_CORE tag in memory and
    lead a wrong setup, that is not what we expect.
    
    Change-Id: I6c2bf7633699af14afd472f2069e7d3ed91f5196
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rk_atags.h b/arch/arm/include/asm/arch-rockchip/rk_atags.h
new file mode 100644
index 0000000000..ff58c8f927
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/rk_atags.h
@@ -0,0 +1,145 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ */
+
+#ifndef __RK_ATAGS_H_
+#define __RK_ATAGS_H_
+
+/* Tag magic */
+#define ATAG_CORE		0x54410001
+#define ATAG_NONE		0x00000000
+
+#define ATAG_SERIAL		0x54410050
+#define ATAG_BOOTDEV		0x54410051
+#define ATAG_DDR_MEM		0x54410052
+#define ATAG_TOS_MEM		0x54410053
+
+/* Tag size and offset */
+#define ATAGS_SIZE		(0x2000)	/* 8K */
+#define ATAGS_OFFSET		(0x200000 - ATAGS_SIZE)/* [2M-8K, 2M] */
+
+/* Tag sdram position!! */
+#define ATAGS_PHYS_BASE		(CONFIG_SYS_SDRAM_BASE + ATAGS_OFFSET)
+
+#ifndef ATAGS_PHYS_BASE
+"ERROR: ATAGS_PHYS_BASE is not defined!!"
+#endif
+
+/* tag_bootdev.devtype */
+#define BOOT_TYPE_EMMC		0x0
+#define BOOT_TYPE_NAND		0x1
+#define BOOT_TYPE_SDCARD	0x2
+#define BOOT_TYPE_SPI_NOR	0x3
+#define BOOT_TYPE_SPI_NAND	0x4
+
+/* tag_serial.m_mode */
+#define SERIAL_M_MODE_M0	0x0
+#define SERIAL_M_MODE_M1	0x1
+#define SERIAL_M_MODE_M2	0x2
+
+struct tag_serial {
+	u32 version;
+	u32 enable;
+	u64 addr;
+	u32 baudrate;
+	u32 m_mode;
+	u32 reserved[4];
+} __packed;
+
+struct tag_bootdev {
+	u32 version;
+	u32 devtype;
+	u32 devnum;
+	u32 mode;
+	u32 reserved[8];
+} __packed;
+
+struct tag_ddr_mem {
+	u32 count;
+	u32 version;
+	u64 bank[20];
+	u32 reserved[4];
+} __packed;
+
+struct tag_tos_mem {
+	u32 version;
+	struct {
+		char name[8];
+		u64 phy_addr;
+		u32 size;
+		u32 flags;
+	} tee_mem;
+
+	struct {
+		char name[8];
+		u64 phy_addr;
+		u32 size;
+		u32 flags;
+	} drm_mem;
+
+	u64 reserved[8];
+} __packed;
+
+struct tag_core {
+	u32 flags;
+	u32 pagesize;
+	u32 rootdev;
+} __packed;
+
+struct tag_header {
+	u32 size;	/* bytes = size * 4 */
+	u32 magic;
+} __packed;
+
+/* Must be 4 bytes align */
+struct tag {
+	struct tag_header hdr;
+	union {
+		struct tag_core		core;
+		struct tag_serial	serial;
+		struct tag_bootdev	bootdev;
+		struct tag_ddr_mem	ddr_mem;
+		struct tag_tos_mem	tos_mem;
+	} u;
+} __aligned(4);
+
+/*
+ * Destroy atags
+ *
+ * first pre-loader who creates atags must call it before atags_set_tag(),
+ * because atags_set_tag() may detect last valid and existence ATAG_CORE
+ * tag in memory and lead a wrong setup, that is not what we expect.
+ */
+void atags_destroy(void);
+
+/*
+ * atags_set_tag - set tag data
+ *
+ * @magic: tag magic, i.e. ATAG_SERIAL, ATAG_BOOTDEV, ....
+ * @tagdata: core data of struct, i.e. struct tag_serial/tag_bootdev ...
+ *
+ * return: 0 on success, others failed.
+ */
+int atags_set_tag(u32 magic, void *tagdata);
+
+/*
+ * atags_get_tag - get tag by tag magic
+ *
+ * @magic: tag magic, i.e. ATAG_SERIAL, ATAG_BOOTDEV, ...
+ *
+ * return: NULL on failed, otherwise return the tag that we want.
+ */
+struct tag *atags_get_tag(u32 magic);
+
+/* Print only one tag */
+void atags_print_tag(struct tag *t);
+
+/* Print all tags */
+void atags_print_all_tags(void);
+
+/* An atags example test */
+void atags_test(void);
+
+#endif
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index ebb94e284a..3a86a718e4 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -483,6 +483,15 @@ config ROCKCHIP_CRASH_DUMP
 	  This enable dump registers when system crash, the registers you would like
 	  to dump can be added in show_regs().
 
+config ROCKCHIP_PRELOADER_ATAGS
+	bool "Rockchip pre-loader atags"
+	default y if ARCH_ROCKCHIP
+	help
+	  This enable support Rockchip atags among pre-loaders, i.e. ddr, miniloader, ATF,
+	  tos, U-Boot, etc. It delivers boot and configure information, shared with pre-loaders
+	  and finally ends with U-Boot.
+
+
 config GICV2
 	bool "ARM GICv2"
 
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 17d860daa7..98351b7ac6 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -56,3 +56,5 @@ obj-spl-$(CONFIG_TPL_BUILD) =
 # Now add SPL/TPL objects back into the main build
 obj-$(CONFIG_SPL_BUILD) += $(obj-spl-y)
 obj-$(CONFIG_TPL_BUILD) += $(obj-tpl-y)
+
+obj-$(CONFIG_ROCKCHIP_PRELOADER_ATAGS) += rk_atags.o
diff --git a/arch/arm/mach-rockchip/rk_atags.c b/arch/arm/mach-rockchip/rk_atags.c
new file mode 100644
index 0000000000..8b992f600e
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk_atags.c
@@ -0,0 +1,257 @@
+// SPDX-License-Identifier:     GPL-2.0+
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd.
+ *
+ */
+
+#include <common.h>
+#include <asm/arch/rk_atags.h>
+
+#define tag_next(t)	((struct tag *)((u32 *)(t) + (t)->hdr.size))
+#define tag_size(type)	((sizeof(struct tag_header) + sizeof(struct type)) >> 2)
+#define for_each_tag(t, base)		\
+	for (t = base; t->hdr.size; t = tag_next(t))
+
+static int inline bad_magic(u32 magic)
+{
+	return ((magic != ATAG_CORE) &&
+		(magic != ATAG_NONE) &&
+		(magic != ATAG_SERIAL) &&
+		(magic != ATAG_BOOTDEV) &&
+		(magic != ATAG_DDR_MEM) &&
+		(magic != ATAG_TOS_MEM));
+}
+
+static int inline atags_size_overflow(struct tag *t, u32 tag_size)
+{
+	return (unsigned long)t + (tag_size << 2) - ATAGS_PHYS_BASE > ATAGS_SIZE;
+}
+
+int atags_set_tag(u32 magic, void *tagdata)
+{
+	u32 length, size = 0;
+	struct tag *t = (struct tag *)ATAGS_PHYS_BASE;
+
+	if (!tagdata)
+		return -ENODATA;
+
+	if (bad_magic(magic)) {
+		printf("%s: magic(%x) is not support\n", __func__, magic);
+		return -EINVAL;
+	}
+
+	/* Not allowed to be set by user directly, so do nothing */
+	if ((magic == ATAG_CORE) || (magic == ATAG_NONE))
+		return -EPERM;
+
+	/* If not initialized, setup now! */
+	if (t->hdr.magic != ATAG_CORE) {
+		t->hdr.magic = ATAG_CORE;
+		t->hdr.size = tag_size(tag_core);
+		t->u.core.flags = 0;
+		t->u.core.pagesize = 0;
+		t->u.core.rootdev = 0;
+
+		t = tag_next(t);
+	} else {
+		/* Find the end, and use it as a new tag */
+		for_each_tag(t, (struct tag *)ATAGS_PHYS_BASE) {
+			/*
+			 * We had better check magic to avoid traversing an
+			 * unknown tag, in case of atags has been damaged by
+			 * some unknown reason.
+			 */
+			if (bad_magic(t->hdr.magic)) {
+				printf("%s: find unknown magic(%x)\n",
+				       __func__, t->hdr.magic);
+				return -EINVAL;
+			}
+
+			if (t->hdr.magic == ATAG_NONE)
+				break;
+		}
+	}
+
+	/* Initialize new tag */
+	switch (magic) {
+	case ATAG_SERIAL:
+		size = tag_size(tag_serial);
+		break;
+	case ATAG_BOOTDEV:
+		size = tag_size(tag_bootdev);
+		break;
+	case ATAG_TOS_MEM:
+		size = tag_size(tag_tos_mem);
+		break;
+	case ATAG_DDR_MEM:
+		size = tag_size(tag_ddr_mem);
+		break;
+	};
+
+	if (atags_size_overflow(t, size)) {
+		printf("%s: failed! no memory to setup magic(%x), max_mem=0x%x\n",
+		       __func__, magic, ATAGS_SIZE);
+		return -ENOMEM;
+	}
+
+	/* It's okay to setup a new tag */
+	t->hdr.magic = magic;
+	t->hdr.size = size;
+	length = (t->hdr.size << 2) - sizeof(struct tag_header);
+	memcpy(&t->u, (char *)tagdata, length);
+
+	/* Next tag */
+	t = tag_next(t);
+
+	/* Setup done */
+	t->hdr.magic = ATAG_NONE;
+	t->hdr.size = 0;
+
+	return 0;
+}
+
+struct tag *atags_get_tag(u32 magic)
+{
+	struct tag *t;
+
+	for_each_tag(t, (struct tag *)ATAGS_PHYS_BASE) {
+		if (bad_magic(t->hdr.magic)) {
+			printf("%s: find unknown magic(%x)\n",
+			       __func__, t->hdr.magic);
+			return NULL;
+		}
+
+		if (t->hdr.magic == magic)
+			return t;
+	}
+
+	return NULL;
+}
+
+void atags_destroy(void)
+{
+	memset((char *)ATAGS_PHYS_BASE, 0, sizeof(struct tag));
+}
+
+#ifdef DEBUG_ATAGS
+void atags_print_tag(struct tag *t)
+{
+	u32 i;
+
+	if (!t)
+		return;
+
+	switch (t->hdr.magic) {
+	case ATAG_SERIAL:
+		printf("[serial]:\n");
+		printf("     magic = 0x%x\n", t->hdr.magic);
+		printf("      size = 0x%x\n\n", t->hdr.size << 2);
+		printf("   version = 0x%x\n", t->u.serial.version);
+		printf("    enable = 0x%x\n", t->u.serial.enable);
+		printf("      addr = 0x%llx\n", t->u.serial.addr);
+		printf("  baudrate = 0x%x\n", t->u.serial.baudrate);
+		printf("    m_mode = 0x%x\n", t->u.serial.m_mode);
+		for (i = 0; i < ARRAY_SIZE(t->u.serial.reserved); i++)
+			printf("    res[%d] = 0x%x\n", i, t->u.serial.reserved[i]);
+		break;
+	case ATAG_BOOTDEV:
+		printf("[bootdev]:\n");
+		printf("     magic = 0x%x\n", t->hdr.magic);
+		printf("      size = 0x%x\n\n", t->hdr.size << 2);
+		printf("   version = 0x%x\n", t->u.bootdev.version);
+		printf("   devtype = 0x%x\n", t->u.bootdev.devtype);
+		printf("    devnum = 0x%x\n", t->u.bootdev.devnum);
+		printf("      mode = 0x%x\n", t->u.bootdev.mode);
+		for (i = 0; i < ARRAY_SIZE(t->u.bootdev.reserved); i++)
+			printf("    res[%d] = 0x%x\n",
+			       i, t->u.bootdev.reserved[i]);
+		break;
+	case ATAG_TOS_MEM:
+		printf("[tos_mem]:\n");
+		printf("     magic = 0x%x\n", t->hdr.magic);
+		printf("      size = 0x%x\n\n", t->hdr.size << 2);
+		printf("   version = 0x%x\n", t->u.tos_mem.version);
+		printf("   tee_mem:\n");
+		printf("            name = %s\n", t->u.tos_mem.tee_mem.name);
+		printf("        phy_addr = 0x%llx\n", t->u.tos_mem.tee_mem.phy_addr);
+		printf("            size = 0x%x\n", t->u.tos_mem.tee_mem.size);
+		printf("           flags = 0x%x\n", t->u.tos_mem.tee_mem.flags);
+		printf("   drm_mem:\n");
+		printf("            name = %s\n", t->u.tos_mem.drm_mem.name);
+		printf("        phy_addr = 0x%llx\n", t->u.tos_mem.drm_mem.phy_addr);
+		printf("            size = 0x%x\n", t->u.tos_mem.drm_mem.size);
+		printf("           flags = 0x%x\n", t->u.tos_mem.drm_mem.flags);
+		for (i = 0; i < ARRAY_SIZE(t->u.tos_mem.reserved); i++)
+			printf("   res[%d] = 0x%llx\n", i, t->u.tos_mem.reserved[i]);
+		break;
+	case ATAG_DDR_MEM:
+		printf("[ddr_mem]:\n");
+		printf("     magic = 0x%x\n", t->hdr.magic);
+		printf("      size = 0x%x\n\n", t->hdr.size << 2);
+		printf("     count = 0x%x\n", t->u.ddr_mem.count);
+		printf("   version = 0x%x\n", t->u.ddr_mem.version);
+		for (i = 0; i < ARRAY_SIZE(t->u.ddr_mem.bank); i++)
+			printf("  bank[%d] = 0x%llx\n", i, t->u.ddr_mem.bank[i]);
+		for (i = 0; i < ARRAY_SIZE(t->u.ddr_mem.reserved); i++)
+			printf("    res[%d] = 0x%x\n", i, t->u.ddr_mem.reserved[i]);
+		break;
+	case ATAG_CORE:
+		printf("[core]:\n");
+		printf("     magic = 0x%x\n", t->hdr.magic);
+		printf("      size = 0x%x\n\n", t->hdr.size << 2);
+		printf("     flags = 0x%x\n", t->u.core.flags);
+		printf("  pagesize = 0x%x\n", t->u.core.pagesize);
+		printf("   rootdev = 0x%x\n", t->u.core.rootdev);
+		break;
+	default:
+		printf("%s: magic(%x) is not support\n", __func__, t->hdr.magic);
+	}
+
+	printf("\n");
+}
+
+void atags_print_all_tags(void)
+{
+	struct tag *t;
+
+	for_each_tag(t, (struct tag *)ATAGS_PHYS_BASE) {
+		if (bad_magic(t->hdr.magic)) {
+			printf("%s: find unknown magic(%x)\n",
+			       __func__, t->hdr.magic);
+			return;
+		}
+
+		atags_print_tag(t);
+	}
+}
+
+void atags_test(void)
+{
+	struct tag_serial t_serial;
+	struct tag_bootdev t_bootdev;
+	struct tag_ddr_mem t_ddr_mem;
+	struct tag_tos_mem t_tos_mem;
+
+	memset(&t_serial,  0x1, sizeof(t_serial));
+	memset(&t_bootdev, 0x2, sizeof(t_bootdev));
+	memset(&t_ddr_mem, 0x3, sizeof(t_ddr_mem));
+	memset(&t_tos_mem, 0x4, sizeof(t_tos_mem));
+
+	memcpy(&t_tos_mem.tee_mem.name, "tee_mem", 8);
+	memcpy(&t_tos_mem.drm_mem.name, "drm_mem", 8);
+
+	/* First pre-loader must call it before atags_set_tag() */
+	atags_destroy();
+
+	atags_set_tag(ATAG_SERIAL,  &t_serial);
+	atags_set_tag(ATAG_BOOTDEV, &t_bootdev);
+	atags_set_tag(ATAG_DDR_MEM, &t_ddr_mem);
+	atags_set_tag(ATAG_TOS_MEM, &t_tos_mem);
+
+	atags_print_all_tags();
+}
+#else
+void inline atags_print_tag(struct tag *t) {}
+void inline atags_print_all_tags(void) {}
+void inline atags_test(void) {}
+#endif

commit 45a3782ab41527e08a172e525c6eaf58076cdf9a
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Mon Aug 6 10:27:46 2018 +0800

    rockchip: clk: rk1808: add clk driver for rk1808
    
    Add basic clock for rk1808 which including pll, cpu, bus,
    emmc, i2c, spi, pwm, saradc clock init.
    
    Change-Id: I302c91e64d0c44ea991d734371811ab4be77c9ab
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk1808.h b/arch/arm/include/asm/arch-rockchip/cru_rk1808.h
new file mode 100644
index 0000000000..38ff81f8b6
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk1808.h
@@ -0,0 +1,270 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _ASM_ARCH_CRU_rk1808_H
+#define _ASM_ARCH_CRU_rk1808_H
+
+#include <common.h>
+
+#define MHz		1000000
+#define KHz		1000
+#define OSC_HZ		(24 * MHz)
+#define APLL_HZ		(600 * MHz)
+
+/* PX30 pll id */
+enum rk1808_pll_id {
+	APLL,
+	DPLL,
+	CPLL,
+	GPLL,
+	NPLL,
+	PPLL,
+	PLL_COUNT,
+};
+
+struct rk1808_clk_info {
+	unsigned long id;
+	char *name;
+	bool is_cru;
+};
+
+/* Private data for the clock driver - used by rockchip_get_cru() */
+struct rk1808_clk_priv {
+	struct rk1808_cru *cru;
+	ulong armclk_hz;
+	ulong cpll_hz;
+	ulong gpll_hz;
+	ulong npll_hz;
+};
+
+struct rk1808_pll {
+	unsigned int con0;
+	unsigned int con1;
+	unsigned int con2;
+	unsigned int con3;
+	unsigned int con4;
+	unsigned int reserved0[3];
+};
+
+struct rk1808_cru {
+	struct rk1808_pll pll[5];
+	unsigned int mode;
+	unsigned int misc;
+	unsigned int misc1;
+	unsigned int reserved2[1];
+	unsigned int glb_cnt_th;
+	unsigned int glb_rst_st;
+	unsigned int glb_srst_fst;
+	unsigned int glb_srst_snd;
+	unsigned int glb_rst_con;
+	unsigned int reserved3[7];
+	unsigned int hwffc_con0;
+	unsigned int reserved4;
+	unsigned int hwffc_th;
+	unsigned int hwffc_intst;
+	unsigned int apll_con0_s;
+	unsigned int apll_con1_s;
+	unsigned int clksel_con0_s;
+	unsigned int reserved5;
+	unsigned int clksel_con[73];
+	unsigned int reserved6[3];
+	unsigned int clkgate_con[20];
+	unsigned int ssgtbl[32];
+	unsigned int softrst_con[16];
+	unsigned int reserved7[(0x380 - 0x33c) / 4 - 1];
+	unsigned int sdmmc_con[2];
+	unsigned int sdio_con[2];
+	unsigned int emmc_con[2];
+	unsigned int reserved8[(0x400 - 0x394) / 4 - 1];
+	unsigned int autocs_con[10];
+	unsigned int reserved9[(0x4000 - 0x424) / 4 - 1];
+	struct rk1808_pll pmu_pll;
+	unsigned int pmu_mode;
+	unsigned int reserved10[(0x4040 - 0x4020) / 4 - 1];
+	unsigned int pmu_clksel_con[8];
+	unsigned int reserved11[(0x4080 - 0x405c) / 4 - 1];
+	unsigned int pmu_clkgate_con[2];
+	unsigned int reserved12[(0x40c0 - 0x4084) / 4 - 1];
+	unsigned int pmu_autocs_con[2];
+};
+
+check_member(rk1808_cru, pmu_autocs_con[0], 0x40c0);
+
+#define RK1808_PLL_CON(x)		((x) * 0x4)
+#define RK1808_MODE_CON			0xa0
+#define RK1808_PMU_PLL_CON(x)		((x) * 0x4 + 0x4000)
+#define RK1808_PMU_MODE_CON		0x4020
+
+enum {
+	/* CRU_CLK_SEL0_CON */
+	CORE_ACLK_DIV_SHIFT		= 12,
+	CORE_ACLK_DIV_MASK		= 0x07 << CORE_ACLK_DIV_SHIFT,
+	CORE_DBG_DIV_SHIFT		= 8,
+	CORE_DBG_DIV_MASK		= 0x03 << CORE_DBG_DIV_SHIFT,
+	CORE_CLK_PLL_SEL_SHIFT		= 7,
+	CORE_CLK_PLL_SEL_MASK		= 1 << CORE_CLK_PLL_SEL_SHIFT,
+	CORE_CLK_PLL_SEL_APLL		= 0,
+	CORE_CLK_PLL_SEL_GPLL,
+	CORE_DIV_CON_SHIFT		= 0,
+	CORE_DIV_CON_MASK		= 0x0f << CORE_DIV_CON_SHIFT,
+
+	/* CRU_CLK_SEL4_CON */
+	ACLK_VOP_PLL_SEL_GPLL		= 0,
+	ACLK_VOP_PLL_SEL_CPLL		= 1,
+	ACLK_VOP_PLL_SEL_SHIFT		= 7,
+	ACLK_VOP_PLL_SEL_MASK		= 1 << ACLK_VOP_PLL_SEL_SHIFT,
+	ACLK_VOP_DIV_CON_SHIFT		= 0,
+	ACLK_VOP_DIV_CON_MASK		= 0x1f << ACLK_VOP_DIV_CON_SHIFT,
+	HCLK_VOP_DIV_CON_SHIFT		= 8,
+	HCLK_VOP_DIV_CON_MASK		= 0x1f << HCLK_VOP_DIV_CON_SHIFT,
+
+	/* CRU_CLK_SEL5_CON */
+	DCLK_VOPRAW_SEL_VOPRAW		= 1,
+	DCLK_VOPRAW_SEL_VOPRAW_FRAC	= 2,
+	DCLK_VOPRAW_SEL_XIN24M		= 3,
+	DCLK_VOPRAW_SEL_SHIFT		= 14,
+	DCLK_VOPRAW_SEL_MASK		= 3 << DCLK_VOPRAW_SEL_SHIFT,
+	DCLK_VOPRAW_PLL_SEL_CPLL	= 0,
+	DCLK_VOPRAW_PLL_SEL_GPLL	= 1,
+	DCLK_VOPRAW_PLL_SEL_NPLL	= 2,
+	DCLK_VOPRAW_PLL_SEL_SHIFT	= 10,
+	DCLK_VOPRAW_PLL_SEL_MASK	= 3 << DCLK_VOPRAW_PLL_SEL_SHIFT,
+	DCLK_VOPRAW_DIV_CON_SHIFT	= 0,
+	DCLK_VOPRAW_DIV_CON_MASK	= 0xf << DCLK_VOPRAW_DIV_CON_SHIFT,
+
+	/* CRU_CLK_SEL7_CON */
+	DCLK_VOPLITE_SEL_VOPRAW		= 1,
+	DCLK_VOPLITE_SEL_VOPRAW_FRAC	= 2,
+	DCLK_VOPLITE_SEL_XIN24M		= 3,
+	DCLK_VOPLITE_SEL_SHIFT		= 14,
+	DCLK_VOPLITE_SEL_MASK		= 3 << DCLK_VOPLITE_SEL_SHIFT,
+	DCLK_VOPLITE_PLL_SEL_CPLL	= 0,
+	DCLK_VOPLITE_PLL_SEL_GPLL	= 1,
+	DCLK_VOPLITE_PLL_SEL_NPLL	= 2,
+	DCLK_VOPLITE_PLL_SEL_SHIFT	= 10,
+	DCLK_VOPLITE_PLL_SEL_MASK	= 3 << DCLK_VOPLITE_PLL_SEL_SHIFT,
+	DCLK_VOPLITE_DIV_CON_SHIFT	= 0,
+	DCLK_VOPLITE_DIV_CON_MASK	= 0xf << DCLK_VOPLITE_DIV_CON_SHIFT,
+
+	/* CRU_CLK_SEL19_CON */
+	CLK_PERI_PLL_SEL_GPLL		= 0,
+	CLK_PERI_PLL_SEL_CPLL		= 1,
+	CLK_PERI_PLL_SEL_SHIFT		= 15,
+	CLK_PERI_PLL_SEL_MASK		= 1 << CLK_PERI_PLL_SEL_SHIFT,
+	LSCLK_PERI_DIV_CON_SHIFT	= 8,
+	LSCLK_PERI_DIV_CON_MASK		= 0x1f << LSCLK_PERI_DIV_CON_SHIFT,
+	MSCLK_PERI_DIV_CON_SHIFT	= 0,
+	MSCLK_PERI_DIV_CON_MASK		= 0x1f << MSCLK_PERI_DIV_CON_SHIFT,
+
+	/* CRU_CLKSEL24_CON */
+	EMMC_PLL_SHIFT			= 14,
+	EMMC_PLL_MASK			= 3 << EMMC_PLL_SHIFT,
+	EMMC_SEL_GPLL			= 0,
+	EMMC_SEL_CPLL,
+	EMMC_SEL_NPLL,
+	EMMC_SEL_24M,
+	EMMC_DIV_SHIFT			= 0,
+	EMMC_DIV_MASK			= 0xff << EMMC_DIV_SHIFT,
+
+	/* CRU_CLKSEL25_CON */
+	EMMC_CLK_SEL_SHIFT		= 15,
+	EMMC_CLK_SEL_MASK		= 1 << EMMC_CLK_SEL_SHIFT,
+	EMMC_CLK_SEL_EMMC		= 0,
+	EMMC_CLK_SEL_EMMC_DIV50,
+	EMMC_DIV50_SHIFT		= 0,
+	EMMC_DIV50_MASK			= 0xff << EMMC_DIV_SHIFT,
+
+	/* CRU_CLK_SEL27_CON */
+	CLK_BUS_PLL_SEL_GPLL		= 0,
+	CLK_BUS_PLL_SEL_CPLL		= 1,
+	CLK_BUS_PLL_SEL_SHIFT		= 15,
+	CLK_BUS_PLL_SEL_MASK		= 1 << CLK_BUS_PLL_SEL_SHIFT,
+	HSCLK_BUS_DIV_CON_SHIFT		= 8,
+	HSCLK_BUS_DIV_CON_MASK		= 0x1f << HSCLK_BUS_DIV_CON_SHIFT,
+
+	/* CRU_CLK_SEL28_CON */
+	MSCLK_BUS_DIV_CON_SHIFT		= 8,
+	MSCLK_BUS_DIV_CON_MASK		= 0x1f << MSCLK_BUS_DIV_CON_SHIFT,
+	LSCLK_BUS_DIV_CON_SHIFT		= 0,
+	LSCLK_BUS_DIV_CON_MASK		= 0x1f << LSCLK_BUS_DIV_CON_SHIFT,
+
+	/* CRU_CLK_SEL59_CON */
+	CLK_I2C_PLL_SEL_GPLL		= 0,
+	CLK_I2C_PLL_SEL_24M,
+	CLK_I2C2_PLL_SEL_SHIFT		= 15,
+	CLK_I2C2_DIV_CON_SHIFT		= 8,
+	CLK_I2C2_DIV_CON_MASK		= 0x7f << CLK_I2C2_DIV_CON_SHIFT,
+	CLK_I2C2_PLL_SEL_MASK		= 1 << CLK_I2C2_PLL_SEL_SHIFT,
+	CLK_I2C1_PLL_SEL_SHIFT		= 7,
+	CLK_I2C1_DIV_CON_SHIFT		= 0,
+	CLK_I2C1_DIV_CON_MASK		= 0x7f,
+	CLK_I2C1_PLL_SEL_MASK		= 1 << CLK_I2C1_PLL_SEL_SHIFT,
+
+	/* CRU_CLK_SEL60_CON */
+	CLK_SPI_PLL_SEL_GPLL		= 0,
+	CLK_SPI_PLL_SEL_24M,
+	CLK_SPI0_PLL_SEL_SHIFT		= 15,
+	CLK_SPI0_DIV_CON_SHIFT		= 8,
+	CLK_SPI0_DIV_CON_MASK		= 0x7f << CLK_SPI0_DIV_CON_SHIFT,
+	CLK_SPI0_PLL_SEL_MASK		= 1 << CLK_SPI0_PLL_SEL_SHIFT,
+	CLK_I2C3_PLL_SEL_SHIFT		= 7,
+	CLK_I2C3_DIV_CON_SHIFT		= 0,
+	CLK_I2C3_DIV_CON_MASK		= 0x7f,
+	CLK_I2C3_PLL_SEL_MASK		= 1 << CLK_I2C3_PLL_SEL_SHIFT,
+
+	/* CRU_CLK_SEL61_CON */
+	CLK_SPI2_PLL_SEL_SHIFT		= 15,
+	CLK_SPI2_DIV_CON_SHIFT		= 8,
+	CLK_SPI2_DIV_CON_MASK		= 0x7f << CLK_SPI2_DIV_CON_SHIFT,
+	CLK_SPI2_PLL_SEL_MASK		= 1 << CLK_SPI2_PLL_SEL_SHIFT,
+	CLK_SPI1_PLL_SEL_SHIFT		= 7,
+	CLK_SPI1_DIV_CON_SHIFT		= 0,
+	CLK_SPI1_DIV_CON_MASK		= 0x7f,
+	CLK_SPI1_PLL_SEL_MASK		= 1 << CLK_SPI1_PLL_SEL_SHIFT,
+
+	/* CRU_CLK_SEL62_CON */
+	CLK_TSADC_DIV_CON_SHIFT		= 0,
+	CLK_TSADC_DIV_CON_MASK		= 0x3ff,
+
+	/* CRU_CLK_SEL63_CON */
+	CLK_SARADC_DIV_CON_SHIFT	= 0,
+	CLK_SARADC_DIV_CON_MASK		= 0x3ff,
+
+	/* CRU_CLK_SEL69_CON */
+	CLK_PWM_PLL_SEL_GPLL		= 0,
+	CLK_PWM_PLL_SEL_24M,
+	CLK_PWM1_PLL_SEL_SHIFT		= 15,
+	CLK_PWM1_DIV_CON_SHIFT		= 8,
+	CLK_PWM1_DIV_CON_MASK		= 0x7f << CLK_PWM1_DIV_CON_SHIFT,
+	CLK_PWM1_PLL_SEL_MASK		= 1 << CLK_PWM1_PLL_SEL_SHIFT,
+	CLK_PWM0_PLL_SEL_SHIFT		= 7,
+	CLK_PWM0_DIV_CON_SHIFT		= 0,
+	CLK_PWM0_DIV_CON_MASK		= 0x7f,
+	CLK_PWM0_PLL_SEL_MASK		= 1 << CLK_PWM0_PLL_SEL_SHIFT,
+
+	/* CRU_CLK_SEL70_CON */
+	CLK_PWM2_PLL_SEL_SHIFT		= 7,
+	CLK_PWM2_DIV_CON_SHIFT		= 0,
+	CLK_PWM2_DIV_CON_MASK		= 0x7f,
+	CLK_PWM2_PLL_SEL_MASK		= 1 << CLK_PWM2_PLL_SEL_SHIFT,
+
+	/* CRU_CLK_SEL71_CON */
+	CLK_I2C5_PLL_SEL_SHIFT		= 15,
+	CLK_I2C5_DIV_CON_SHIFT		= 8,
+	CLK_I2C5_DIV_CON_MASK		= 0x7f << CLK_I2C5_DIV_CON_SHIFT,
+	CLK_I2C5_PLL_SEL_MASK		= 1 << CLK_I2C5_PLL_SEL_SHIFT,
+	CLK_I2C4_PLL_SEL_SHIFT		= 7,
+	CLK_I2C4_DIV_CON_SHIFT		= 0,
+	CLK_I2C4_DIV_CON_MASK		= 0x7f,
+	CLK_I2C4_PLL_SEL_MASK		= 1 << CLK_I2C4_PLL_SEL_SHIFT,
+
+	/* CRU_PMU_CLK_SEL7_CON */
+	CLK_I2C0_PLL_SEL_PPLL		= 0,
+	CLK_I2C0_PLL_SEL_SHIFT		= 15,
+	CLK_I2C0_DIV_CON_SHIFT		= 8,
+	CLK_I2C0_PLL_SEL_MASK		= 1 << CLK_I2C0_PLL_SEL_SHIFT,
+	CLK_I2C0_DIV_CON_MASK		= 0x3f << CLK_I2C0_DIV_CON_SHIFT,
+};
+#endif
diff --git a/arch/arm/mach-rockchip/rk1808/Makefile b/arch/arm/mach-rockchip/rk1808/Makefile
index c09dc5f497..eef7daf3f3 100644
--- a/arch/arm/mach-rockchip/rk1808/Makefile
+++ b/arch/arm/mach-rockchip/rk1808/Makefile
@@ -4,5 +4,6 @@
 # SPDX-License-Identifier:     GPL-2.0+
 #
 
-obj-y += syscon_rk1808.o
 obj-y += rk1808.o
+obj-y += syscon_rk1808.o
+obj-y += clk_rk1808.o
diff --git a/arch/arm/mach-rockchip/rk1808/clk_rk1808.c b/arch/arm/mach-rockchip/rk1808/clk_rk1808.c
new file mode 100644
index 0000000000..b284283cf1
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk1808/clk_rk1808.c
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk1808.h>
+
+int rockchip_get_clk(struct udevice **devp)
+{
+	return uclass_get_device_by_driver(UCLASS_CLK,
+			DM_GET_DRIVER(rockchip_rk1808_cru), devp);
+}
+
+void *rockchip_get_cru(void)
+{
+	struct rk1808_clk_priv *priv;
+	struct udevice *dev;
+	int ret;
+
+	ret = rockchip_get_clk(&dev);
+	if (ret)
+		return ERR_PTR(ret);
+
+	priv = dev_get_priv(dev);
+
+	return priv->cru;
+}
diff --git a/drivers/clk/rockchip/Makefile b/drivers/clk/rockchip/Makefile
index f91a365523..80b5058c45 100644
--- a/drivers/clk/rockchip/Makefile
+++ b/drivers/clk/rockchip/Makefile
@@ -6,7 +6,7 @@
 
 obj-y += clk_pll.o
 obj-$(CONFIG_ROCKCHIP_PX30) += clk_px30.o
-#obj-y += clk_rk1808.o
+obj-$(CONFIG_ROCKCHIP_RK1808) += clk_rk1808.o
 obj-$(CONFIG_ROCKCHIP_RK3036) += clk_rk3036.o
 obj-$(CONFIG_ROCKCHIP_RK3066) += clk_rk3066.o
 obj-$(CONFIG_ROCKCHIP_RK3128) += clk_rk3128.o
diff --git a/drivers/clk/rockchip/clk_rk1808.c b/drivers/clk/rockchip/clk_rk1808.c
new file mode 100644
index 0000000000..77013ee8c6
--- /dev/null
+++ b/drivers/clk/rockchip/clk_rk1808.c
@@ -0,0 +1,1153 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <bitfield.h>
+#include <clk-uclass.h>
+#include <dm.h>
+#include <errno.h>
+#include <syscon.h>
+#include <clk.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk1808.h>
+#include <asm/arch/hardware.h>
+#include <asm/io.h>
+#include <dm/lists.h>
+#include <dt-bindings/clock/rk1808-cru.h>
+#include <div64.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define RK1808_CPUCLK_RATE(_rate, _aclk_div, _pclk_div)		\
+{								\
+	.rate	= _rate##U,					\
+	.aclk_div = _aclk_div,					\
+	.pclk_div = _pclk_div,					\
+}
+
+#define DIV_TO_RATE(input_rate, div)    ((input_rate) / ((div) + 1))
+
+static struct rockchip_pll_rate_table rk1808_pll_rates[] = {
+	/* _mhz, _refdiv, _fbdiv, _postdiv1, _postdiv2, _dsmpd, _frac */
+	RK3036_PLL_RATE(1200000000, 1, 50, 1, 1, 1, 0),
+	RK3036_PLL_RATE(1188000000, 2, 99, 1, 1, 1, 0),
+	RK3036_PLL_RATE(1100000000, 12, 550, 1, 1, 1, 0),
+	RK3036_PLL_RATE(1008000000, 1, 84, 2, 1, 1, 0),
+	RK3036_PLL_RATE(1000000000, 6, 500, 2, 1, 1, 0),
+	RK3036_PLL_RATE(816000000, 1, 68, 2, 1, 1, 0),
+	RK3036_PLL_RATE(800000000, 6, 400, 2, 1, 1, 0),
+	RK3036_PLL_RATE(600000000, 1, 75, 3, 1, 1, 0),
+	RK3036_PLL_RATE(594000000, 2, 99, 2, 1, 1, 0),
+	RK3036_PLL_RATE(500000000, 6, 250, 2, 1, 1, 0),
+	RK3036_PLL_RATE(200000000, 1, 200, 6, 4, 1, 0),
+	{ /* sentinel */ },
+};
+
+#ifndef CONFIG_SPL_BUILD
+#define RK1808_CLK_DUMP(_id, _name, _iscru)	\
+{						\
+	.id = _id,				\
+	.name = _name,				\
+	.is_cru = _iscru,			\
+}
+
+static const struct rk1808_clk_info clks_dump[] = {
+	RK1808_CLK_DUMP(PLL_APLL, "apll", true),
+	RK1808_CLK_DUMP(PLL_DPLL, "dpll", true),
+	RK1808_CLK_DUMP(PLL_CPLL, "cpll", true),
+	RK1808_CLK_DUMP(PLL_GPLL, "gpll", true),
+	RK1808_CLK_DUMP(PLL_NPLL, "npll", true),
+	RK1808_CLK_DUMP(PLL_PPLL, "ppll", true),
+	RK1808_CLK_DUMP(HSCLK_BUS_PRE, "hsclk_bus", true),
+	RK1808_CLK_DUMP(MSCLK_BUS_PRE, "msclk_bus", true),
+	RK1808_CLK_DUMP(LSCLK_BUS_PRE, "lsclk_bus", true),
+	RK1808_CLK_DUMP(MSCLK_PERI, "msclk_peri", true),
+	RK1808_CLK_DUMP(LSCLK_PERI, "lsclk_peri", true),
+};
+#endif
+
+static struct rockchip_cpu_rate_table rk1808_cpu_rates[] = {
+	RK1808_CPUCLK_RATE(1200000000, 1, 5),
+	RK1808_CPUCLK_RATE(1008000000, 1, 5),
+	RK1808_CPUCLK_RATE(816000000, 1, 3),
+	RK1808_CPUCLK_RATE(600000000, 1, 3),
+};
+
+static struct rockchip_pll_clock rk1808_pll_clks[] = {
+	[APLL] = PLL(pll_rk3036, PLL_APLL, RK1808_PLL_CON(0),
+		     RK1808_MODE_CON, 0, 10, 0, rk1808_pll_rates),
+	[DPLL] = PLL(pll_rk3036, PLL_DPLL, RK1808_PLL_CON(8),
+		     RK1808_MODE_CON, 2, 10, 0, NULL),
+	[CPLL] = PLL(pll_rk3036, PLL_CPLL, RK1808_PLL_CON(16),
+		    RK1808_MODE_CON, 4, 10, 0, rk1808_pll_rates),
+	[GPLL] = PLL(pll_rk3036, PLL_GPLL, RK1808_PLL_CON(24),
+		     RK1808_MODE_CON, 6, 10, 0, rk1808_pll_rates),
+	[NPLL] = PLL(pll_rk3036, PLL_NPLL, RK1808_PLL_CON(24),
+		     RK1808_MODE_CON, 8, 10, 0, rk1808_pll_rates),
+	[PPLL] = PLL(pll_rk3036, PLL_PPLL, RK1808_PMU_PLL_CON(0),
+		     RK1808_PMU_MODE_CON, 0, 10, 0, rk1808_pll_rates),
+};
+
+#ifndef CONFIG_SPL_BUILD
+static ulong rk1808_i2c_get_clk(struct rk1808_clk_priv *priv, ulong clk_id)
+{
+	struct rk1808_cru *cru = priv->cru;
+	u32 div, con;
+
+	switch (clk_id) {
+	case SCLK_PMU_I2C0:
+		con = readl(&cru->pmu_clksel_con[7]);
+		div = (con & CLK_I2C0_DIV_CON_MASK) >> CLK_I2C0_DIV_CON_SHIFT;
+		break;
+	case SCLK_I2C1:
+		con = readl(&cru->clksel_con[59]);
+		div = (con & CLK_I2C1_DIV_CON_MASK)  >> CLK_I2C1_DIV_CON_SHIFT;
+		break;
+	case SCLK_I2C2:
+		con = readl(&cru->clksel_con[59]);
+		div = (con & CLK_I2C2_DIV_CON_MASK) >> CLK_I2C2_DIV_CON_SHIFT;
+		break;
+	case SCLK_I2C3:
+		con = readl(&cru->clksel_con[60]);
+		div = (con & CLK_I2C3_DIV_CON_MASK) >> CLK_I2C3_DIV_CON_SHIFT;
+		break;
+	case SCLK_I2C4:
+		con = readl(&cru->clksel_con[71]);
+		div = (con & CLK_I2C4_DIV_CON_MASK) >> CLK_I2C4_DIV_CON_SHIFT;
+		break;
+	case SCLK_I2C5:
+		con = readl(&cru->clksel_con[71]);
+		div = (con & CLK_I2C5_DIV_CON_MASK) >> CLK_I2C5_DIV_CON_SHIFT;
+		break;
+	default:
+		printf("do not support this i2c bus\n");
+		return -EINVAL;
+	}
+
+	return DIV_TO_RATE(priv->gpll_hz, div);
+}
+
+static ulong rk1808_i2c_set_clk(struct rk1808_clk_priv *priv,
+				ulong clk_id, uint hz)
+{
+	struct rk1808_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+	assert(src_clk_div - 1 < 127);
+
+	switch (clk_id) {
+	case SCLK_PMU_I2C0:
+		rk_clrsetreg(&cru->pmu_clksel_con[7],
+			     CLK_I2C0_DIV_CON_MASK | CLK_I2C0_PLL_SEL_MASK,
+			     (src_clk_div - 1) << CLK_I2C0_DIV_CON_SHIFT |
+			     CLK_I2C0_PLL_SEL_PPLL << CLK_I2C0_PLL_SEL_SHIFT);
+		break;
+	case SCLK_I2C1:
+		rk_clrsetreg(&cru->clksel_con[59],
+			     CLK_I2C1_DIV_CON_MASK | CLK_I2C1_PLL_SEL_MASK,
+			     (src_clk_div - 1) << CLK_I2C1_DIV_CON_SHIFT |
+			     CLK_I2C_PLL_SEL_GPLL << CLK_I2C1_PLL_SEL_SHIFT);
+		break;
+	case SCLK_I2C2:
+		rk_clrsetreg(&cru->clksel_con[59],
+			     CLK_I2C2_DIV_CON_MASK | CLK_I2C2_PLL_SEL_MASK,
+			     (src_clk_div - 1) << CLK_I2C2_DIV_CON_SHIFT |
+			     CLK_I2C_PLL_SEL_GPLL << CLK_I2C2_PLL_SEL_SHIFT);
+		break;
+	case SCLK_I2C3:
+		rk_clrsetreg(&cru->clksel_con[60],
+			     CLK_I2C3_DIV_CON_MASK | CLK_I2C3_PLL_SEL_MASK,
+			     (src_clk_div - 1) << CLK_I2C3_DIV_CON_SHIFT |
+			     CLK_I2C_PLL_SEL_GPLL << CLK_I2C3_PLL_SEL_SHIFT);
+		break;
+	case SCLK_I2C4:
+		rk_clrsetreg(&cru->clksel_con[71],
+			     CLK_I2C4_DIV_CON_MASK | CLK_I2C4_PLL_SEL_MASK,
+			     (src_clk_div - 1) << CLK_I2C4_DIV_CON_SHIFT |
+			     CLK_I2C_PLL_SEL_GPLL << CLK_I2C4_PLL_SEL_SHIFT);
+		break;
+	case SCLK_I2C5:
+		rk_clrsetreg(&cru->clksel_con[71],
+			     CLK_I2C5_DIV_CON_MASK | CLK_I2C5_PLL_SEL_MASK,
+			     (src_clk_div - 1) << CLK_I2C5_DIV_CON_SHIFT |
+			     CLK_I2C_PLL_SEL_GPLL << CLK_I2C5_PLL_SEL_SHIFT);
+		break;
+	default:
+		printf("do not support this i2c bus\n");
+		return -EINVAL;
+	}
+
+	return rk1808_i2c_get_clk(priv, clk_id);
+}
+#endif
+
+static ulong rk1808_mmc_get_clk(struct rk1808_clk_priv *priv, uint clk_id)
+{
+	struct rk1808_cru *cru = priv->cru;
+	u32 div, con, con_id;
+
+	switch (clk_id) {
+	case HCLK_SDMMC:
+	case SCLK_SDMMC:
+		con_id = 20;
+		break;
+	case HCLK_SDIO:
+	case SCLK_SDIO:
+		con_id = 22;
+		break;
+	case HCLK_EMMC:
+	case SCLK_EMMC:
+	case SCLK_EMMC_SAMPLE:
+		con_id = 24;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	con = readl(&cru->clksel_con[con_id]);
+	div = (con & EMMC_DIV_MASK) >> EMMC_DIV_SHIFT;
+
+	if ((con & EMMC_PLL_MASK) >> EMMC_PLL_SHIFT
+	    == EMMC_SEL_24M)
+		return DIV_TO_RATE(OSC_HZ, div) / 2;
+	else
+		return DIV_TO_RATE(priv->gpll_hz, div) / 2;
+}
+
+static ulong rk1808_mmc_set_clk(struct rk1808_clk_priv *priv,
+				ulong clk_id, ulong set_rate)
+{
+	struct rk1808_cru *cru = priv->cru;
+	int src_clk_div;
+	u32 con_id;
+
+	switch (clk_id) {
+	case HCLK_SDMMC:
+	case SCLK_SDMMC:
+		con_id = 20;
+		break;
+	case HCLK_SDIO:
+	case SCLK_SDIO:
+		con_id = 22;
+		break;
+	case HCLK_EMMC:
+	case SCLK_EMMC:
+		con_id = 24;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	/* Select clk_sdmmc/emmc source from GPLL by default */
+	/* mmc clock defaulg div 2 internal, need provide double in cru */
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz / 2, set_rate);
+
+	if (src_clk_div > 127) {
+		/* use 24MHz source for 400KHz clock */
+		src_clk_div = DIV_ROUND_UP(OSC_HZ / 2, set_rate);
+		rk_clrsetreg(&cru->clksel_con[con_id],
+			     EMMC_PLL_MASK | EMMC_DIV_MASK,
+			     EMMC_SEL_24M << EMMC_PLL_SHIFT |
+			     (src_clk_div - 1) << EMMC_DIV_SHIFT);
+	} else {
+		rk_clrsetreg(&cru->clksel_con[con_id],
+			     EMMC_PLL_MASK | EMMC_DIV_MASK,
+			     EMMC_SEL_GPLL << EMMC_PLL_SHIFT |
+			     (src_clk_div - 1) << EMMC_DIV_SHIFT);
+	}
+	rk_clrsetreg(&cru->clksel_con[con_id + 1], EMMC_CLK_SEL_MASK,
+		     EMMC_CLK_SEL_EMMC);
+
+	return rk1808_mmc_get_clk(priv, clk_id);
+}
+
+#ifndef CONFIG_SPL_BUILD
+static ulong rk1808_pwm_get_clk(struct rk1808_clk_priv *priv, ulong clk_id)
+{
+	struct rk1808_cru *cru = priv->cru;
+	u32 div, con;
+
+	switch (clk_id) {
+	case SCLK_PWM0:
+		con = readl(&cru->clksel_con[69]);
+		div = (con & CLK_PWM0_DIV_CON_MASK) >> CLK_PWM0_DIV_CON_SHIFT;
+		break;
+	case SCLK_PWM1:
+		con = readl(&cru->clksel_con[69]);
+		div = (con & CLK_PWM1_DIV_CON_MASK) >> CLK_PWM1_DIV_CON_SHIFT;
+		break;
+	case SCLK_PWM2:
+		con = readl(&cru->clksel_con[70]);
+		div = (con & CLK_PWM2_DIV_CON_MASK) >> CLK_PWM2_DIV_CON_SHIFT;
+		break;
+	default:
+		printf("do not support this pwm bus\n");
+		return -EINVAL;
+	}
+
+	return DIV_TO_RATE(priv->gpll_hz, div);
+}
+
+static ulong rk1808_pwm_set_clk(struct rk1808_clk_priv *priv,
+				ulong clk_id, uint hz)
+{
+	struct rk1808_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+	assert(src_clk_div - 1 < 127);
+
+	switch (clk_id) {
+	case SCLK_PWM0:
+		rk_clrsetreg(&cru->clksel_con[69],
+			     CLK_PWM0_DIV_CON_MASK | CLK_PWM0_PLL_SEL_MASK,
+			     (src_clk_div - 1) << CLK_PWM0_DIV_CON_SHIFT |
+			     CLK_PWM_PLL_SEL_GPLL << CLK_PWM0_PLL_SEL_SHIFT);
+		break;
+	case SCLK_PWM1:
+		rk_clrsetreg(&cru->clksel_con[69],
+			     CLK_PWM1_DIV_CON_MASK | CLK_PWM1_PLL_SEL_MASK,
+			     (src_clk_div - 1) << CLK_PWM1_DIV_CON_SHIFT |
+			     CLK_PWM_PLL_SEL_GPLL << CLK_PWM1_PLL_SEL_SHIFT);
+		break;
+	case SCLK_PWM2:
+		rk_clrsetreg(&cru->clksel_con[70],
+			     CLK_PWM2_DIV_CON_MASK | CLK_PWM2_PLL_SEL_MASK,
+			     (src_clk_div - 1) << CLK_PWM2_DIV_CON_SHIFT |
+			     CLK_PWM_PLL_SEL_GPLL << CLK_PWM2_PLL_SEL_SHIFT);
+		break;
+	default:
+		printf("do not support this pwm bus\n");
+		return -EINVAL;
+	}
+
+	return rk1808_pwm_get_clk(priv, clk_id);
+}
+
+static ulong rk1808_saradc_get_clk(struct rk1808_clk_priv *priv)
+{
+	struct rk1808_cru *cru = priv->cru;
+	u32 div, con;
+
+	con = readl(&cru->clksel_con[63]);
+	div = con & CLK_SARADC_DIV_CON_MASK;
+
+	return DIV_TO_RATE(OSC_HZ, div);
+}
+
+static ulong rk1808_saradc_set_clk(struct rk1808_clk_priv *priv, uint hz)
+{
+	struct rk1808_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz);
+	assert(src_clk_div - 1 < 2047);
+
+	rk_clrsetreg(&cru->clksel_con[63],
+		     CLK_SARADC_DIV_CON_MASK,
+		     (src_clk_div - 1) << CLK_SARADC_DIV_CON_SHIFT);
+
+	return rk1808_saradc_get_clk(priv);
+}
+
+static ulong rk1808_spi_get_clk(struct rk1808_clk_priv *priv, ulong clk_id)
+{
+	struct rk1808_cru *cru = priv->cru;
+	u32 div, con;
+
+	switch (clk_id) {
+	case SCLK_SPI0:
+		con = readl(&cru->clksel_con[60]);
+		div = (con & CLK_SPI0_DIV_CON_MASK) >> CLK_SPI0_DIV_CON_SHIFT;
+		break;
+	case SCLK_SPI1:
+		con = readl(&cru->clksel_con[61]);
+		div = (con & CLK_SPI1_DIV_CON_MASK) >> CLK_SPI1_DIV_CON_SHIFT;
+		break;
+	case SCLK_SPI2:
+		con = readl(&cru->clksel_con[61]);
+		div = (con & CLK_SPI2_DIV_CON_MASK) >> CLK_SPI2_DIV_CON_SHIFT;
+		break;
+	default:
+		printf("do not support this pwm bus\n");
+		return -EINVAL;
+	}
+
+	return DIV_TO_RATE(priv->gpll_hz, div);
+}
+
+static ulong rk1808_spi_set_clk(struct rk1808_clk_priv *priv,
+				ulong clk_id, uint hz)
+{
+	struct rk1808_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+	assert(src_clk_div - 1 < 127);
+
+	switch (clk_id) {
+	case SCLK_SPI0:
+		rk_clrsetreg(&cru->clksel_con[60],
+			     CLK_SPI0_DIV_CON_MASK | CLK_SPI0_PLL_SEL_MASK,
+			     (src_clk_div - 1) << CLK_SPI0_DIV_CON_SHIFT |
+			     CLK_SPI_PLL_SEL_GPLL << CLK_SPI0_PLL_SEL_SHIFT);
+		break;
+	case SCLK_SPI1:
+		rk_clrsetreg(&cru->clksel_con[61],
+			     CLK_SPI1_DIV_CON_MASK | CLK_SPI1_PLL_SEL_MASK,
+			     (src_clk_div - 1) << CLK_SPI1_DIV_CON_SHIFT |
+			     CLK_SPI_PLL_SEL_GPLL << CLK_SPI1_PLL_SEL_SHIFT);
+		break;
+	case SCLK_SPI2:
+		rk_clrsetreg(&cru->clksel_con[61],
+			     CLK_SPI2_DIV_CON_MASK | CLK_SPI2_PLL_SEL_MASK,
+			     (src_clk_div - 1) << CLK_SPI2_DIV_CON_SHIFT |
+			     CLK_SPI_PLL_SEL_GPLL << CLK_SPI2_PLL_SEL_SHIFT);
+		break;
+	default:
+		printf("do not support this pwm bus\n");
+		return -EINVAL;
+	}
+
+	return rk1808_spi_get_clk(priv, clk_id);
+}
+
+#define RK1808_VOP_PLL_LIMIT_FREQ		600 * 1000000
+static ulong rk1808_vop_get_clk(struct rk1808_clk_priv *priv, ulong clk_id)
+{
+	struct rk1808_cru *cru = priv->cru;
+	u32 div, con, parent;
+
+	switch (clk_id) {
+	case ACLK_VOPRAW:
+	case ACLK_VOPLITE:
+		con = readl(&cru->clksel_con[4]);
+		div = (con & ACLK_VOP_DIV_CON_MASK) >> ACLK_VOP_DIV_CON_SHIFT;
+		parent = priv->gpll_hz;
+		break;
+	case HCLK_VOPRAW:
+	case HCLK_VOPLITE:
+		parent = rk1808_vop_get_clk(priv, ACLK_VOPRAW);
+		con = readl(&cru->clksel_con[4]);
+		div = (con & HCLK_VOP_DIV_CON_MASK) >> HCLK_VOP_DIV_CON_SHIFT;
+		break;
+	case DCLK_VOPRAW:
+		con = readl(&cru->clksel_con[5]);
+		div = con & DCLK_VOPRAW_DIV_CON_MASK;
+		parent = rockchip_pll_get_rate(&rk1808_pll_clks[NPLL],
+					       priv->cru, NPLL);
+		break;
+	case DCLK_VOPLITE:
+		con = readl(&cru->clksel_con[7]);
+		div = con & DCLK_VOPLITE_DIV_CON_MASK;
+		parent = (con & DCLK_VOPLITE_PLL_SEL_MASK) >>
+			 DCLK_VOPLITE_PLL_SEL_SHIFT;
+		if (parent == DCLK_VOPLITE_PLL_SEL_NPLL)
+			parent = rockchip_pll_get_rate(&rk1808_pll_clks[NPLL],
+						       priv->cru, NPLL);
+		else if (parent == DCLK_VOPLITE_PLL_SEL_CPLL)
+			parent = priv->cpll_hz;
+		else
+			parent = priv->gpll_hz;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rk1808_vop_set_clk(struct rk1808_clk_priv *priv,
+				ulong clk_id, uint hz)
+{
+	struct rk1808_cru *cru = priv->cru;
+	int src_clk_div, parent;
+
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+	assert(src_clk_div - 1 < 31);
+
+	switch (clk_id) {
+	case ACLK_VOPRAW:
+	case ACLK_VOPLITE:
+		rk_clrsetreg(&cru->clksel_con[4],
+			     ACLK_VOP_PLL_SEL_MASK | ACLK_VOP_DIV_CON_MASK,
+			     ACLK_VOP_PLL_SEL_GPLL << ACLK_VOP_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << ACLK_VOP_DIV_CON_SHIFT);
+		break;
+	case HCLK_VOPRAW:
+	case HCLK_VOPLITE:
+		src_clk_div =
+			DIV_ROUND_UP(rk1808_vop_get_clk(priv, ACLK_VOPRAW), hz);
+		assert(src_clk_div - 1 < 15);
+		rk_clrsetreg(&cru->clksel_con[4],
+			     HCLK_VOP_DIV_CON_MASK,
+			     (src_clk_div - 1) << HCLK_VOP_DIV_CON_SHIFT);
+		break;
+	case DCLK_VOPRAW:
+		/*
+		 * vopb dclk source from npll, and equals to
+		 */
+		src_clk_div = DIV_ROUND_UP(RK1808_VOP_PLL_LIMIT_FREQ, hz);
+		rockchip_pll_set_rate(&rk1808_pll_clks[NPLL],
+				      priv->cru, NPLL, src_clk_div * hz);
+		rk_clrsetreg(&cru->clksel_con[5],
+			     DCLK_VOPRAW_SEL_MASK |
+			     DCLK_VOPRAW_PLL_SEL_MASK |
+			     DCLK_VOPRAW_DIV_CON_MASK,
+			     DCLK_VOPRAW_SEL_VOPRAW <<
+			     DCLK_VOPRAW_SEL_SHIFT |
+			     DCLK_VOPRAW_PLL_SEL_NPLL <<
+			     DCLK_VOPRAW_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << DCLK_VOPRAW_DIV_CON_SHIFT);
+		break;
+	case DCLK_VOPLITE:
+		/*
+		 * vopl dclk source from cpll, and equals to
+		 */
+		if (!(priv->npll_hz % hz)) {
+			parent = DCLK_VOPLITE_PLL_SEL_NPLL;
+			src_clk_div = do_div(priv->npll_hz, hz);
+		} else if (!(priv->cpll_hz % hz)) {
+			parent = DCLK_VOPLITE_PLL_SEL_CPLL;
+			src_clk_div = do_div(priv->cpll_hz, hz);
+		} else {
+			parent = DCLK_VOPLITE_PLL_SEL_GPLL;
+			src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+		}
+		rk_clrsetreg(&cru->clksel_con[7],
+			     DCLK_VOPLITE_SEL_MASK | DCLK_VOPLITE_PLL_SEL_MASK |
+			     DCLK_VOPLITE_DIV_CON_MASK,
+			     DCLK_VOPLITE_SEL_VOPRAW << DCLK_VOPLITE_SEL_SHIFT |
+			     parent << DCLK_VOPLITE_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << DCLK_VOPLITE_DIV_CON_SHIFT);
+		break;
+	default:
+		printf("do not support this vop freq\n");
+		return -EINVAL;
+	}
+
+	return rk1808_vop_get_clk(priv, clk_id);
+}
+#endif
+
+static ulong rk1808_bus_get_clk(struct rk1808_clk_priv *priv, ulong clk_id)
+{
+	struct rk1808_cru *cru = priv->cru;
+	u32 div, con, parent;
+
+	switch (clk_id) {
+	case HSCLK_BUS_PRE:
+		con = readl(&cru->clksel_con[27]);
+		div = (con & HSCLK_BUS_DIV_CON_MASK) >> HSCLK_BUS_DIV_CON_SHIFT;
+		parent = priv->gpll_hz;
+		break;
+	case MSCLK_BUS_PRE:
+		con = readl(&cru->clksel_con[28]);
+		div = (con & MSCLK_BUS_DIV_CON_MASK) >> MSCLK_BUS_DIV_CON_SHIFT;
+		parent = priv->gpll_hz;
+		break;
+	case LSCLK_BUS_PRE:
+		con = readl(&cru->clksel_con[28]);
+		div = (con & LSCLK_BUS_DIV_CON_MASK) >> LSCLK_BUS_DIV_CON_SHIFT;
+		parent = priv->gpll_hz;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rk1808_bus_set_clk(struct rk1808_clk_priv *priv,
+				ulong clk_id, ulong hz)
+{
+	struct rk1808_cru *cru = priv->cru;
+	int src_clk_div;
+
+	/*
+	 * select gpll as pd_bus bus clock source and
+	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
+	 */
+	switch (clk_id) {
+	case HSCLK_BUS_PRE:
+		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+		assert(src_clk_div - 1 < 31);
+		rk_clrsetreg(&cru->clksel_con[27],
+			     CLK_BUS_PLL_SEL_MASK | HSCLK_BUS_DIV_CON_MASK,
+			     CLK_BUS_PLL_SEL_GPLL << CLK_BUS_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << HSCLK_BUS_DIV_CON_SHIFT);
+		break;
+	case MSCLK_BUS_PRE:
+		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+		assert(src_clk_div - 1 < 31);
+		rk_clrsetreg(&cru->clksel_con[28],
+			     CLK_BUS_PLL_SEL_MASK | MSCLK_BUS_DIV_CON_MASK,
+			     CLK_BUS_PLL_SEL_GPLL << CLK_BUS_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << MSCLK_BUS_DIV_CON_SHIFT);
+		break;
+	case LSCLK_BUS_PRE:
+		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+		assert(src_clk_div - 1 < 31);
+		rk_clrsetreg(&cru->clksel_con[28],
+			     CLK_BUS_PLL_SEL_MASK | LSCLK_BUS_DIV_CON_MASK,
+			     CLK_BUS_PLL_SEL_GPLL << CLK_BUS_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << LSCLK_BUS_DIV_CON_SHIFT);
+		break;
+	default:
+		printf("do not support this bus freq\n");
+		return -EINVAL;
+	}
+
+	return rk1808_bus_get_clk(priv, clk_id);
+}
+
+static ulong rk1808_peri_get_clk(struct rk1808_clk_priv *priv, ulong clk_id)
+{
+	struct rk1808_cru *cru = priv->cru;
+	u32 div, con, parent;
+
+	switch (clk_id) {
+	case MSCLK_PERI:
+		con = readl(&cru->clksel_con[19]);
+		div = (con & MSCLK_PERI_DIV_CON_MASK) >>
+		      MSCLK_PERI_DIV_CON_SHIFT;
+		parent = priv->gpll_hz;
+		break;
+	case LSCLK_PERI:
+		con = readl(&cru->clksel_con[19]);
+		div = (con & LSCLK_PERI_DIV_CON_MASK) >>
+		      LSCLK_PERI_DIV_CON_SHIFT;
+		parent = priv->gpll_hz;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rk1808_peri_set_clk(struct rk1808_clk_priv *priv,
+				 ulong clk_id, ulong hz)
+{
+	struct rk1808_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+	assert(src_clk_div - 1 < 31);
+
+	/*
+	 * select gpll as pd_peri bus clock source and
+	 * set up dependent divisors for HCLK and ACLK clocks.
+	 */
+	switch (clk_id) {
+	case MSCLK_PERI:
+		rk_clrsetreg(&cru->clksel_con[19],
+			     CLK_PERI_PLL_SEL_MASK | MSCLK_PERI_DIV_CON_MASK,
+			     CLK_PERI_PLL_SEL_GPLL << CLK_PERI_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << MSCLK_PERI_DIV_CON_SHIFT);
+		break;
+	case LSCLK_PERI:
+		rk_clrsetreg(&cru->clksel_con[19],
+			     CLK_PERI_PLL_SEL_MASK | LSCLK_PERI_DIV_CON_MASK,
+			     CLK_PERI_PLL_SEL_GPLL << CLK_PERI_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << LSCLK_PERI_DIV_CON_SHIFT);
+		break;
+	default:
+		printf("do not support this peri freq\n");
+		return -EINVAL;
+	}
+
+	return rk1808_peri_get_clk(priv, clk_id);
+}
+
+static ulong rk1808_armclk_set_clk(struct rk1808_clk_priv *priv, ulong hz)
+{
+	struct rk1808_cru *cru = priv->cru;
+	const struct rockchip_cpu_rate_table *rate;
+	ulong old_rate;
+
+	rate = rockchip_get_cpu_settings(rk1808_cpu_rates, hz);
+	if (!rate) {
+		printf("%s unsupported rate\n", __func__);
+		return -EINVAL;
+	}
+
+	/*
+	 * select apll as cpu/core clock pll source and
+	 * set up dependent divisors for PERI and ACLK clocks.
+	 * core hz : apll = 1:1
+	 */
+	old_rate = rockchip_pll_get_rate(&rk1808_pll_clks[APLL],
+					 priv->cru, APLL);
+	if (old_rate > hz) {
+		if (rockchip_pll_set_rate(&rk1808_pll_clks[APLL],
+					  priv->cru, APLL, hz))
+			return -EINVAL;
+		rk_clrsetreg(&cru->clksel_con[0],
+			     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK |
+			     CORE_ACLK_DIV_MASK | CORE_DBG_DIV_MASK,
+			     rate->aclk_div << CORE_ACLK_DIV_SHIFT |
+			     rate->pclk_div << CORE_DBG_DIV_SHIFT |
+			     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
+			     0 << CORE_DIV_CON_SHIFT);
+	} else if (old_rate < hz) {
+		rk_clrsetreg(&cru->clksel_con[0],
+			     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK |
+			     CORE_ACLK_DIV_MASK | CORE_DBG_DIV_MASK,
+			     rate->aclk_div << CORE_ACLK_DIV_SHIFT |
+			     rate->pclk_div << CORE_DBG_DIV_SHIFT |
+			     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
+			     0 << CORE_DIV_CON_SHIFT);
+		if (rockchip_pll_set_rate(&rk1808_pll_clks[APLL],
+					  priv->cru, APLL, hz))
+			return -EINVAL;
+	}
+
+	return rockchip_pll_get_rate(&rk1808_pll_clks[APLL], priv->cru, APLL);
+}
+
+static ulong rk1808_clk_get_rate(struct clk *clk)
+{
+	struct rk1808_clk_priv *priv = dev_get_priv(clk->dev);
+	ulong rate = 0;
+
+	debug("%s %ld\n", __func__, clk->id);
+	switch (clk->id) {
+	case PLL_APLL:
+	case PLL_DPLL:
+	case PLL_CPLL:
+	case PLL_GPLL:
+	case PLL_NPLL:
+	case PLL_PPLL:
+		rate = rockchip_pll_get_rate(&rk1808_pll_clks[clk->id - 1],
+					     priv->cru, clk->id - 1);
+		break;
+	case ARMCLK:
+		rate = rockchip_pll_get_rate(&rk1808_pll_clks[APLL],
+					     priv->cru, APLL);
+		break;
+	case HCLK_SDMMC:
+	case HCLK_EMMC:
+	case HCLK_SDIO:
+	case SCLK_SDMMC:
+	case SCLK_EMMC:
+	case SCLK_EMMC_SAMPLE:
+	case SCLK_SDIO:
+		rate = rk1808_mmc_get_clk(priv, clk->id);
+		break;
+#ifndef CONFIG_SPL_BUILD
+	case SCLK_PMU_I2C0:
+	case SCLK_I2C1:
+	case SCLK_I2C2:
+	case SCLK_I2C3:
+	case SCLK_I2C4:
+	case SCLK_I2C5:
+		rate = rk1808_i2c_get_clk(priv, clk->id);
+		break;
+	case SCLK_PWM0:
+	case SCLK_PWM1:
+	case SCLK_PWM2:
+		rate = rk1808_pwm_get_clk(priv, clk->id);
+		break;
+	case SCLK_SARADC:
+		rate = rk1808_saradc_get_clk(priv);
+		break;
+	case SCLK_SPI0:
+	case SCLK_SPI1:
+	case SCLK_SPI2:
+		rate = rk1808_spi_get_clk(priv, clk->id);
+		break;
+	case ACLK_VOPRAW:
+	case DCLK_VOPRAW:
+	case ACLK_VOPLITE:
+	case DCLK_VOPLITE:
+		rate = rk1808_vop_get_clk(priv, clk->id);
+		break;
+#endif
+	case HSCLK_BUS_PRE:
+	case MSCLK_BUS_PRE:
+	case LSCLK_BUS_PRE:
+		rate = rk1808_bus_get_clk(priv, clk->id);
+		break;
+	case MSCLK_PERI:
+	case LSCLK_PERI:
+		rate = rk1808_peri_get_clk(priv, clk->id);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return rate;
+}
+
+static ulong rk1808_clk_set_rate(struct clk *clk, ulong rate)
+{
+	struct rk1808_clk_priv *priv = dev_get_priv(clk->dev);
+	ulong ret = 0;
+
+	debug("%s %ld %ld\n", __func__, clk->id, rate);
+	switch (clk->id) {
+	case PLL_APLL:
+	case PLL_DPLL:
+	case PLL_PPLL:
+		ret = rockchip_pll_set_rate(&rk1808_pll_clks[clk->id - 1],
+					    priv->cru, clk->id - 1, rate);
+		break;
+	case PLL_CPLL:
+		ret = rockchip_pll_set_rate(&rk1808_pll_clks[CPLL],
+					    priv->cru, CPLL, rate);
+		if (ret == 0)
+			priv->cpll_hz = rate;
+		break;
+	case PLL_GPLL:
+		ret = rockchip_pll_set_rate(&rk1808_pll_clks[GPLL],
+					    priv->cru, GPLL, rate);
+		if (ret == 0)
+			priv->gpll_hz = rate;
+		break;
+	case PLL_NPLL:
+		ret = rockchip_pll_set_rate(&rk1808_pll_clks[NPLL],
+					    priv->cru, NPLL, rate);
+		if (ret == 0)
+			priv->npll_hz = rate;
+		break;
+	case ARMCLK:
+		if (priv->armclk_hz)
+			rk1808_armclk_set_clk(priv, rate);
+		priv->armclk_hz = rate;
+		break;
+	case HCLK_SDMMC:
+	case HCLK_EMMC:
+	case HCLK_SDIO:
+	case SCLK_SDMMC:
+	case SCLK_EMMC:
+	case SCLK_SDIO:
+		ret = rk1808_mmc_set_clk(priv, clk->id, rate);
+		break;
+#ifndef CONFIG_SPL_BUILD
+	case SCLK_PMU_I2C0:
+	case SCLK_I2C1:
+	case SCLK_I2C2:
+	case SCLK_I2C3:
+	case SCLK_I2C4:
+	case SCLK_I2C5:
+		ret = rk1808_i2c_set_clk(priv, clk->id, rate);
+		break;
+	case SCLK_PWM0:
+	case SCLK_PWM1:
+	case SCLK_PWM2:
+		ret = rk1808_pwm_set_clk(priv, clk->id, rate);
+		break;
+	case SCLK_SARADC:
+		ret = rk1808_saradc_set_clk(priv, rate);
+		break;
+	case SCLK_SPI0:
+	case SCLK_SPI1:
+	case SCLK_SPI2:
+		ret = rk1808_spi_set_clk(priv, clk->id, rate);
+		break;
+	case ACLK_VOPRAW:
+	case DCLK_VOPRAW:
+	case ACLK_VOPLITE:
+	case DCLK_VOPLITE:
+		ret = rk1808_vop_set_clk(priv, clk->id, rate);
+		break;
+#endif
+	case HSCLK_BUS_PRE:
+	case MSCLK_BUS_PRE:
+	case LSCLK_BUS_PRE:
+		ret = rk1808_bus_set_clk(priv, clk->id, rate);
+		break;
+	case MSCLK_PERI:
+	case LSCLK_PERI:
+		ret = rk1808_peri_set_clk(priv, clk->id, rate);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+}
+
+#define ROCKCHIP_MMC_DELAY_SEL		BIT(10)
+#define ROCKCHIP_MMC_DEGREE_MASK	0x3
+#define ROCKCHIP_MMC_DELAYNUM_OFFSET	2
+#define ROCKCHIP_MMC_DELAYNUM_MASK	(0xff << ROCKCHIP_MMC_DELAYNUM_OFFSET)
+
+#define PSECS_PER_SEC 1000000000000LL
+/*
+ * Each fine delay is between 44ps-77ps. Assume each fine delay is 60ps to
+ * simplify calculations. So 45degs could be anywhere between 33deg and 57.8deg.
+ */
+#define ROCKCHIP_MMC_DELAY_ELEMENT_PSEC 60
+
+int rk1808_mmc_get_phase(struct clk *clk)
+{
+	struct rk1808_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk1808_cru *cru = priv->cru;
+	u32 raw_value, delay_num;
+	u16 degrees = 0;
+	ulong rate;
+
+	rate = rk1808_clk_get_rate(clk);
+
+	if (rate < 0)
+		return rate;
+
+	if (clk->id == SCLK_EMMC_SAMPLE)
+		raw_value = readl(&cru->emmc_con[1]);
+	else if (clk->id == SCLK_SDMMC_SAMPLE)
+		raw_value = readl(&cru->sdmmc_con[1]);
+	else
+		raw_value = readl(&cru->sdio_con[1]);
+
+	raw_value >>= 1;
+	degrees = (raw_value & ROCKCHIP_MMC_DEGREE_MASK) * 90;
+
+	if (raw_value & ROCKCHIP_MMC_DELAY_SEL) {
+		/* degrees/delaynum * 10000 */
+		unsigned long factor = (ROCKCHIP_MMC_DELAY_ELEMENT_PSEC / 10) *
+					36 * (rate / 1000000);
+
+		delay_num = (raw_value & ROCKCHIP_MMC_DELAYNUM_MASK);
+		delay_num >>= ROCKCHIP_MMC_DELAYNUM_OFFSET;
+		degrees += DIV_ROUND_CLOSEST(delay_num * factor, 10000);
+	}
+
+	return degrees % 360;
+}
+
+int rk1808_mmc_set_phase(struct clk *clk, u32 degrees)
+{
+	struct rk1808_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk1808_cru *cru = priv->cru;
+	u8 nineties, remainder, delay_num;
+	u32 raw_value, delay;
+	ulong rate;
+
+	rate = rk1808_clk_get_rate(clk);
+
+	if (rate < 0)
+		return rate;
+
+	nineties = degrees / 90;
+	remainder = (degrees % 90);
+
+	/*
+	 * Convert to delay; do a little extra work to make sure we
+	 * don't overflow 32-bit / 64-bit numbers.
+	 */
+	delay = 10000000; /* PSECS_PER_SEC / 10000 / 10 */
+	delay *= remainder;
+	delay = DIV_ROUND_CLOSEST(delay, (rate / 1000) * 36 *
+				(ROCKCHIP_MMC_DELAY_ELEMENT_PSEC / 10));
+
+	delay_num = (u8)min_t(u32, delay, 255);
+
+	raw_value = delay_num ? ROCKCHIP_MMC_DELAY_SEL : 0;
+	raw_value |= delay_num << ROCKCHIP_MMC_DELAYNUM_OFFSET;
+	raw_value |= nineties;
+
+	raw_value <<= 1;
+	if (clk->id == SCLK_EMMC_SAMPLE)
+		writel(raw_value | 0xffff0000, &cru->emmc_con[1]);
+	else if (clk->id == SCLK_SDMMC_SAMPLE)
+		writel(raw_value | 0xffff0000, &cru->sdmmc_con[1]);
+	else
+		writel(raw_value | 0xffff0000, &cru->sdio_con[1]);
+
+	debug("mmc set_phase(%d) delay_nums=%u reg=%#x actual_degrees=%d\n",
+	      degrees, delay_num, raw_value, rk1808_mmc_get_phase(clk));
+
+	return 0;
+}
+
+static int rk1808_clk_get_phase(struct clk *clk)
+{
+	int ret;
+
+	debug("%s %ld\n", __func__, clk->id);
+	switch (clk->id) {
+	case SCLK_EMMC_SAMPLE:
+	case SCLK_SDMMC_SAMPLE:
+	case SCLK_SDIO_SAMPLE:
+		ret = rk1808_mmc_get_phase(clk);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+}
+
+static int rk1808_clk_set_phase(struct clk *clk, int degrees)
+{
+	int ret;
+
+	debug("%s %ld\n", __func__, clk->id);
+	switch (clk->id) {
+	case SCLK_EMMC_SAMPLE:
+	case SCLK_SDMMC_SAMPLE:
+	case SCLK_SDIO_SAMPLE:
+		ret = rk1808_mmc_set_phase(clk, degrees);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+}
+
+static struct clk_ops rk1808_clk_ops = {
+	.get_rate = rk1808_clk_get_rate,
+	.set_rate = rk1808_clk_set_rate,
+	.get_phase	= rk1808_clk_get_phase,
+	.set_phase	= rk1808_clk_set_phase,
+};
+
+static int rk1808_clk_probe(struct udevice *dev)
+{
+	struct rk1808_clk_priv *priv = dev_get_priv(dev);
+	int ret;
+
+	if (rockchip_pll_get_rate(&rk1808_pll_clks[APLL],
+				  priv->cru, APLL) != APLL_HZ) {
+		ret = rk1808_armclk_set_clk(priv, APLL_HZ);
+		if (ret < 0)
+			printf("%s failed to set armclk rate\n", __func__);
+	}
+
+	priv->cpll_hz = rockchip_pll_get_rate(&rk1808_pll_clks[CPLL],
+					      priv->cru, CPLL);
+	priv->gpll_hz = rockchip_pll_get_rate(&rk1808_pll_clks[GPLL],
+					      priv->cru, GPLL);
+
+	/* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
+	ret = clk_set_defaults(dev);
+	if (ret)
+		debug("%s clk_set_defaults failed %d\n", __func__, ret);
+
+	return 0;
+}
+
+static int rk1808_clk_ofdata_to_platdata(struct udevice *dev)
+{
+	struct rk1808_clk_priv *priv = dev_get_priv(dev);
+
+	priv->cru = dev_read_addr_ptr(dev);
+
+	return 0;
+}
+
+static int rk1808_clk_bind(struct udevice *dev)
+{
+	int ret;
+	struct udevice *sys_child, *sf_child;
+	struct sysreset_reg *priv;
+	struct softreset_reg *sf_priv;
+
+	/* The reset driver does not have a device node, so bind it here */
+	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
+				 &sys_child);
+	if (ret) {
+		debug("Warning: No sysreset driver: ret=%d\n", ret);
+	} else {
+		priv = malloc(sizeof(struct sysreset_reg));
+		priv->glb_srst_fst_value = offsetof(struct rk1808_cru,
+						    glb_srst_fst);
+		priv->glb_srst_snd_value = offsetof(struct rk1808_cru,
+						    glb_srst_snd);
+		sys_child->priv = priv;
+	}
+
+	ret = device_bind_driver_to_node(dev, "rockchip_reset", "reset",
+					 dev_ofnode(dev), &sf_child);
+	if (ret) {
+		debug("Warning: No rockchip reset driver: ret=%d\n", ret);
+	} else {
+		sf_priv = malloc(sizeof(struct softreset_reg));
+		sf_priv->sf_reset_offset = offsetof(struct rk1808_cru,
+						    softrst_con[0]);
+		sf_priv->sf_reset_num = 16;
+		sf_child->priv = sf_priv;
+	}
+
+	return 0;
+}
+
+static const struct udevice_id rk1808_clk_ids[] = {
+	{ .compatible = "rockchip,rk1808-cru" },
+	{ }
+};
+
+U_BOOT_DRIVER(rockchip_rk1808_cru) = {
+	.name		= "rockchip_rk1808_cru",
+	.id		= UCLASS_CLK,
+	.of_match	= rk1808_clk_ids,
+	.priv_auto_alloc_size = sizeof(struct rk1808_clk_priv),
+	.ofdata_to_platdata = rk1808_clk_ofdata_to_platdata,
+	.ops		= &rk1808_clk_ops,
+	.bind		= rk1808_clk_bind,
+	.probe		= rk1808_clk_probe,
+};
+
+#ifndef CONFIG_SPL_BUILD
+/**
+ * soc_clk_dump() - Print clock frequencies
+ * Returns zero on success
+ *
+ * Implementation for the clk dump command.
+ */
+int soc_clk_dump(void)
+{
+	struct udevice *cru_dev;
+	const struct rk1808_clk_info *clk_dump;
+	struct clk clk;
+	unsigned long clk_count = ARRAY_SIZE(clks_dump);
+	unsigned long rate;
+	int i, ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_CLK,
+					  DM_GET_DRIVER(rockchip_rk1808_cru),
+					  &cru_dev);
+	if (ret) {
+		printf("%s failed to get cru device\n", __func__);
+		return ret;
+	}
+
+	printf("CLK:");
+	for (i = 0; i < clk_count; i++) {
+		clk_dump = &clks_dump[i];
+		if (clk_dump->name) {
+			clk.id = clk_dump->id;
+			if (clk_dump->is_cru)
+				ret = clk_request(cru_dev, &clk);
+			if (ret < 0)
+				return ret;
+
+			rate = clk_get_rate(&clk);
+			clk_free(&clk);
+			if (i == 0) {
+				if (rate < 0)
+					printf("%s %s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("%s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
+			} else {
+				if (rate < 0)
+					printf("%s %s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("%s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
+			}
+		}
+	}
+
+	return 0;
+}
+#endif

commit 3204d7c4a3748fd2c5d08ad4d55ec4d181c36eb6
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Mon Aug 6 10:22:13 2018 +0800

    rockchip: clk: rk1808: Add binding header for rk1808
    
    files origin from kernel.
    
    Change-Id: Ie19bf329f00bf1c502db5d91978f89de3771eff2
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/include/dt-bindings/clock/rk1808-cru.h b/include/dt-bindings/clock/rk1808-cru.h
new file mode 100644
index 0000000000..f42e43b43c
--- /dev/null
+++ b/include/dt-bindings/clock/rk1808-cru.h
@@ -0,0 +1,466 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK1808_H
+#define _DT_BINDINGS_CLK_ROCKCHIP_RK1808_H
+
+/* core clocks */
+#define PLL_APLL		1
+#define PLL_DPLL		2
+#define PLL_CPLL		3
+#define PLL_GPLL		4
+#define PLL_NPLL		5
+#define PLL_PPLL		6
+#define ARMCLK			7
+
+#define DCLK_VOPRAW		10
+#define DCLK_VOPLITE		11
+#define DCLK_CIF		12
+#define XIN24M_DIV		13
+
+/* sclk (special clocks) */
+#define USB480M			20
+#define SCLK_PVTM_CORE		21
+#define SCLK_NPU		22
+#define SCLK_PVTM_NPU		23
+#define SCLK_DDRCLK		24
+#define SCLK_I2S0_8CH_TX_MUX	25
+#define SCLK_I2S0_8CH_RX_MUX	26
+#define SCLK_RTC32K_PMU		27
+#define SCLK_TXESC		28
+#define SCLK_RGA		29
+#define SCLK_ISP		30
+#define SCLK_CIF_OUT		31
+#define SCLK_PCIE_AUX		32
+#define SCLK_USB3_OTG0_REF	33
+#define SCLK_USB3_OTG0_SUSPEND	34
+#define SCLK_SDIO_DIV		35
+#define SCLK_SDIO_DIV50		36
+#define SCLK_SDIO		37
+#define SCLK_SDIO_DRV		38
+#define SCLK_SDIO_SAMPLE	39
+#define SCLK_EMMC_DIV		40
+#define SCLK_EMMC_DIV50		41
+#define SCLK_EMMC		42
+#define SCLK_EMMC_DRV		43
+#define SCLK_EMMC_SAMPLE	44
+#define SCLK_SDMMC_DIV		45
+#define SCLK_SDMMC_DIV50	46
+#define SCLK_SDMMC		47
+#define SCLK_SDMMC_DRV		48
+#define SCLK_SDMMC_SAMPLE	49
+#define SCLK_SFC		50
+#define SCLK_GMAC_OUT		51
+#define SCLK_GMAC_SRC		52
+#define SCLK_GMAC		53
+#define SCLK_GMAC_REF		54
+#define SCLK_GMAC_REFOUT	55
+#define SCLK_GMAC_RGMI_SPEED	56
+#define SCLK_GMAC_RMII_SPEED	57
+#define SCLK_GMAC_RX_TX		58
+#define SCLK_CRYPTO		59
+#define SCLK_CRYPTO_APK		60
+#define SCLK_UART1		61
+#define SCLK_UART2		62
+#define SCLK_UART3		63
+#define SCLK_UART4		64
+#define SCLK_UART5		65
+#define SCLK_UART6		66
+#define SCLK_UART7		67
+#define SCLK_I2C1		68
+#define SCLK_I2C2		69
+#define SCLK_I2C3		70
+#define SCLK_I2C4		71
+#define SCLK_I2C5		72
+#define SCLK_SPI0		73
+#define SCLK_SPI1		74
+#define SCLK_SPI2		75
+#define SCLK_TSADC		76
+#define SCLK_SARADC		77
+#define SCLK_EFUSE_S		78
+#define SCLK_EFUSE_NS		79
+#define SCLK_GPIO1		80
+#define SCLK_GPIO2		81
+#define SCLK_GPIO3		82
+#define SCLK_GPIO4		83
+#define SCLK_PWM0		84
+#define SCLK_PWM1		85
+#define SCLK_PWM2		86
+#define SCLK_TIMER0		87
+#define SCLK_TIMER1		88
+#define SCLK_TIMER2		89
+#define SCLK_TIMER3		90
+#define SCLK_TIMER4		91
+#define SCLK_TIMER5		92
+#define SCLK_PDM		93
+#define SCLK_I2S0_8CH_TX_SRC	94
+#define SCLK_I2S0_8CH_TX	95
+#define SCLK_I2S0_8CH_TX_OUT	96
+#define SCLK_I2S0_8CH_RX_SRC	97
+#define SCLK_I2S0_8CH_RX	98
+#define SCLK_I2S0_8CH_RX_OUT	99
+#define SCLK_I2S1_2CH_SRC	100
+#define SCLK_I2S1_2CH		101
+#define SCLK_I2S1_2CH_OUT	102
+#define SCLK_WIFI_PMU		103
+#define SCLK_UART0_PMU		104
+#define SCLK_PVTM_PMU		105
+#define SCLK_PMU_I2C0		106
+#define SCLK_PMU_GPIO0		107
+#define SCLK_REF24M_PMU		108
+#define SCLK_USBPHY_REF		109
+#define SCLK_MIPIDSIPHY_REF	110
+#define SCLK_PCIEPHY_REF	111
+
+/* aclk gates */
+#define ACLK_GIC_PRE		145
+#define ACLK_GIC		146
+#define ACLK_VPU		147
+#define ACLK_NPU		148
+#define ACLK_IMEM_PRE		153
+#define ACLK_IMEM0		154
+#define ACLK_IMEM1		155
+#define ACLK_IMEM2		156
+#define ACLK_IMEM3		157
+#define HSCLK_VIO		158
+#define ACLK_VOPRAW		159
+#define ACLK_VOPLITE		160
+#define ACLK_RGA		161
+#define ACLK_ISP		162
+#define ACLK_CIF		163
+#define HSCLK_PCIE		164
+#define ACLK_USB3OTG		165
+#define ACLK_PCIE		166
+#define ACLK_PCIE_MST		167
+#define ACLK_PCIE_SLV		168
+#define MSCLK_PERI		169
+#define ACLK_GMAC		170
+#define HSCLK_BUS_PRE		171
+#define ACLK_CRYPTO		172
+#define ACLK_DCF		173
+
+/* hclk gates */
+#define HCLK_VPU		200
+#define LSCLK_VIO		201
+#define HCLK_VOPRAW		202
+#define HCLK_VOPLITE		203
+#define HCLK_RGA		204
+#define HCLK_ISP		205
+#define HCLK_CIF		205
+#define LSCLK_PCIE		206
+#define HCLK_HOST		207
+#define LSCLK_PERI		208
+#define HCLK_SDIO		209
+#define HCLK_EMMC		210
+#define HCLK_SDMMC		211
+#define HCLK_SFC		212
+#define MSCLK_BUS_PRE		213
+#define HCLK_ROM		214
+#define HCLK_CRYPTO		215
+#define HCLK_VAD		216
+#define HCLK_PDM		217
+#define HCLK_I2S0_8CH		218
+#define HCLK_I2S1_8CH		219
+#define MSCLK_CORE_NIU		220
+#define HSCLK_IMEM		221
+
+/* pclk gates */
+#define PCLK_DDR		250
+#define PCLK_DSI_TX		251
+#define PCLK_CSI_TX		252
+#define PCLK_CSI2HOST		253
+#define PCLK_PCIE		254
+#define PCLK_GMAC		255
+#define LSCLK_BUS_PRE		256
+#define PCLK_DCF		257
+#define PCLK_UART1		258
+#define PCLK_UART2		259
+#define PCLK_UART3		260
+#define PCLK_UART4		261
+#define PCLK_UART5		262
+#define PCLK_UART6		263
+#define PCLK_UART7		264
+#define PCLK_I2C1		265
+#define PCLK_I2C2		266
+#define PCLK_I2C3		267
+#define PCLK_I2C4		268
+#define PCLK_I2C5		269
+#define PCLK_SPI0		270
+#define PCLK_SPI1		271
+#define PCLK_SPI2		272
+#define PCLK_TSADC		273
+#define PCLK_SARADC		274
+#define PCLK_EFUSE		275
+#define PCLK_GPIO1		276
+#define PCLK_GPIO2		277
+#define PCLK_GPIO3		278
+#define PCLK_GPIO4		279
+#define PCLK_PWM0		280
+#define PCLK_PWM1		281
+#define PCLK_PWM2		282
+#define PCLK_TIMER		283
+#define PCLK_WDT		284
+#define PCLK_MIPIDSIPHY		285
+#define PCLK_MIPICSIPHY		286
+#define PCLK_DDRMON		287
+#define PCLK_DDRC		289
+#define PCLK_MSCH		290
+#define PCLK_STDBY		291
+#define PCLK_GPIO0_PMU		292
+#define PCLK_UART0_PMU		293
+#define PCLK_I2C0_PMU		294
+#define PCLK_PMU_PRE		295
+
+#define CLK_NR_CLKS		(PCLK_PMU_PRE + 1)
+
+/* soft-reset indices */
+
+/* cru_softrst_con0 */
+#define SRST_CORE0_PO		0
+#define SRST_CORE1_PO		1
+#define SRST_CORE0		2
+#define SRST_CORE1		3
+#define SRST_CORE0_DBG		4
+#define SRST_CORE1_DBG		5
+#define SRST_TOPDBG		6
+#define SRST_CORE_NOC		7
+#define SRST_STRC_A		8
+#define SRST_L2C		9
+#define SRST_DAP                10
+#define SRST_CORE_MSNIU		11
+#define SRST_GIC2CORE		12
+#define SRST_CORE2GIC		13
+#define SRST_CORE_PRF_A		14
+#define SRST_CORE_GRF_P		15
+
+/* cru_softrst_con1 */
+#define SRST_DDRPHY		16
+#define SRST_DDRPHY_P		18
+#define SRST_UPCTL2		20
+#define SRST_UPCTL2_A		21
+#define SRST_UPCTL2_P		22
+#define SRST_MSCH		23
+#define SRST_MSCH_P		24
+#define SRST_DDRMON_P		25
+#define SRST_DDRSTDBY_P		26
+#define SRST_DDRSTDBY		27
+#define SRST_DDRGRF_P		28
+#define SRST_AXI_SPLIT_A	29
+#define SRST_DDRDFI_CTL		30
+#define SRST_DDRDFI_CTL_P	31
+
+/* cru_softrst_con2 */
+#define SRST_GIC500_NIU_A	32
+#define SRST_GIC500_A		33
+#define SRST_GIC_CORE2GIC	34
+#define SRST_GIC_GIC2CORE	35
+#define SRST_NPU_CORE		36
+#define SRST_NPU_A		37
+#define SRST_NPU_H		38
+#define SRST_NPU_NIU_A		39
+#define SRST_NPU_NIU_H		40
+#define SRST_NPU2MEM_A		41
+#define SRST_NPU_PVTM		42
+#define SRST_CORE_PVTM		43
+#define SRST_GIC_SPINLOCK_A	47
+
+/* cru_softrst_con3 */
+#define SRST_PCIE_NIU_H		48
+#define SRST_PCIE_NIU_L		49
+#define SRST_PCIEGRF_P		50
+#define SRST_PCIECTL_P		51
+#define SRST_PCIECTL_POWERUP	52
+#define SRST_PCIECTL_MST_A	53
+#define SRST_PCIECTL_SLV_A	54
+#define SRST_PCIECTL_DBI_A	55
+#define SRST_PCIECTL_BUTTON	56
+#define SRST_PCIECTL_PE		57
+#define SRST_PCIECTL_CORE	58
+#define SRST_PCIECTL_NSTICKY	59
+#define SRST_PCIECTL_STICKY	60
+#define SRST_PCIECTL_PWR	61
+#define SRST_PCIE_NIU_A		62
+#define SRST_PCIE_NIU_P		63
+
+/* cru_softrst_con4 */
+#define SRST_PCIEPHY_POR	64
+#define SRST_PCIEPHY_P		65
+#define SRST_PCIEPHY_PIPE	66
+#define SRST_USBPHY_POR		67
+#define SRST_USBPHY_OTG_PORT	68
+#define SRST_USBPHY_HOST_PORT	69
+#define SRST_USB3PHY_GRF_P	70
+#define SRST_USB2PHY_GRF_P	71
+#define SRST_USB3_OTG_A		72
+#define SRST_USB2HOST_H		73
+#define SRST_USB2HOST_ARB_H	74
+#define SRSTUSB2HOST_UTMI	75
+
+/* cru_softrst_con5 */
+#define SRST_IMEM0_A		80
+#define SRST_IMEM1_A		81
+#define SRST_IMEM2_A		82
+#define SRST_IMEM3_A		83
+#define SRST_IMEM0_NIU_A	84
+#define SRST_IMEM1_NIU_A	85
+#define SRST_IMEM2_NIU_A	86
+#define SRST_IMEM3_NIU_A	87
+#define SRST_IMEM_NIU_H		88
+#define SRST_VPU_NIU_A		92
+#define SRST_VPU_NIU_H		93
+#define SRST_VPU_A		94
+#define SRST_VPU_H		95
+
+/* cru_softrst_con6 */
+#define SRST_VIO_NIU_H		96
+#define SRST_VIO_NIU_L		97
+#define SRST_VOPRAW_A		98
+#define SRST_VOPRAW_H		99
+#define SRST_VOPRAW_D		100
+#define SRST_VOPLITE_A		101
+#define SRST_VOPLITE_H		102
+#define SRST_VOPLITE_D		103
+#define SRST_MIPIDSI_HOST_P	104
+#define SRST_CSITX_P		105
+#define SRST_CSITX_TXBYTEHS	106
+#define SRST_CSITX_TXESC	107
+#define SRST_CSITX_CAM		108
+#define SRST_CSITX_I		109
+
+/* cru_softrst_con7 */
+#define SRST_RGA_A		112
+#define SRST_RGA_H		113
+#define SRST_RGA		114
+#define SRST_CSI2HOST_P		115
+#define SRST_CIF_A		116
+#define SRST_CIF_H		117
+#define SRST_CIF_I		118
+#define SRST_CIF_PCLKIN		119
+#define SRST_CIF_D		120
+#define SRST_ISP_H		121
+#define SRST_ISP		122
+#define SRST_MIPICSIPHY_P	124
+#define SRST_MIPIDSIPHY_P	125
+
+/* cru_softrst_con8 */
+#define SRST_PERI_NIU_H		128
+#define SRST_PERI_NIU_L		129
+#define SRST_PDMMC_NIU_H	132
+#define SRST_SDMMC_H		133
+#define SRST_SDIO_H		134
+#define SRST_EMMC_H		135
+#define SRST_SFC_H		136
+#define SRST_SFC		137
+#define SRST_GMAC_NIU_A		140
+#define SRST_GMAC_NIU_P		141
+#define SRST_GAMC_A		142
+
+/* cru_softrst_con9 */
+#define SRST_PMU_NIU_P		144
+#define SRST_PMU_SGRF_P		145
+#define SRST_PMU_GRF_P		146
+#define SRST_PMU_PMU		147
+#define SRST_PMU_MEM_P		148
+#define SRST_PMU_GPIO0_P	149
+#define SRST_PMU_UART0_P	150
+#define SRST_PMU_CRU		151
+#define SRST_PMU_PVTM		152
+#define SRST_PMU_UART0		153
+#define SRST_PMU_NIU_H		154
+#define SRST_PMU_DDR_FAIL_SAVE	155
+#define SRST_PMU_I2C0_P		156
+#define SRST_PMU_I2C0		157
+#define SRST_PMU_GPIO0_DB	158
+
+/* cru_softrst_con10 */
+#define SRST_AUDIO_NIU_H	160
+#define SRST_VAD_H		161
+#define SRST_PDM_H		162
+#define SRST_PDM		163
+#define SRST_I2S0_H		164
+#define SRST_I2S0_TX		165
+#define SRST_I2S1_H		166
+#define SRST_I2S1		167
+#define SRST_I2S0_RX		168
+
+/* cru_softrst_con11 */
+#define SRST_BUS_NIU_M		176
+#define SRST_BUS_NIU_L		177
+#define SRST_TOP_NIU_P		178
+#define SRST_ROM_H		179
+#define SRST_CRYPTO_A		180
+#define SRST_CRYPTO_H		181
+#define SRST_CRYPTO_CORE	182
+#define SRST_CRYPTO_APK		183
+#define SRST_DCF_A		184
+#define SRST_DCF_P		185
+#define SRST_UART1_P		186
+#define SRST_UART1		187
+#define SRST_UART2_P		188
+#define SRST_UART2		189
+#define SRST_UART3_P		190
+#define SRST_UART3		191
+
+/* cru_softrst_con12 */
+#define SRST_UART4_P		192
+#define SRST_UART4		193
+#define SRST_UART5_P		194
+#define SRST_UART5		195
+#define SRST_UART6_P		196
+#define SRST_UART6		197
+#define SRST_UART7_P		198
+#define SRST_UART7		199
+#define SRST_I2C1_P		200
+#define SRST_I2C1		201
+#define SRST_I2C2_P		202
+#define SRST_I2C2		203
+#define SRST_I2C3_P		204
+#define SRST_I2C3		205
+#define SRST_PWM0_P		206
+#define SRST_PWM0		207
+
+/* cru_softrst_con13 */
+#define SRST_PWM1_P		208
+#define SRST_PWM1		209
+#define SRST_PWM2_P		210
+#define SRST_PWM2		211
+#define SRST_SPI0_P		212
+#define SRST_SPI0		213
+#define SRST_SPI1_P		214
+#define SRST_SPI1		215
+#define SRST_SPI2_P		216
+#define SRST_SPI2		217
+#define SRST_BUS_SGRF_P		218
+#define SRST_BUS_GRF_P		219
+#define SRST_TIMER_P		220
+#define SRST_TIMER0		221
+#define SRST_TIMER1		222
+#define SRST_TIMER2		223
+
+/* cru_softrst_con14 */
+#define SRST_TIMER3		224
+#define SRST_TIMER4		225
+#define SRST_TIMER5		226
+#define SRST_WDT_NS_P		227
+#define SRST_EFUSE_NS_P		228
+#define SRST_EFUSE_NS		229
+#define SRST_GPIO1_P		230
+#define SRST_GPIO1_DB		231
+#define SRST_GPIO2_P		232
+#define SRST_GPIO2_DB		233
+#define SRST_GPIO3_P		234
+#define SRST_GPIO3_DB		235
+#define SRST_GPIO4_P		236
+#define SRST_GPIO4_DB		237
+#define SRST_BUS_SUB_NIU_M	238
+
+/* cru_softrst_con15 */
+#define SRST_I2C4_P		240
+#define SRST_I2C4		241
+#define SRST_I2C5_P		242
+#define SRST_I2C5		243
+#define SRST_SARADC		252
+#define SRST_SARADC_P		253
+#define SRST_TSADC_P		254
+#define SRST_TSADC		255
+
+#endif

commit b8fa3d2a17dce6006a8a5f46cbc978a19a3fdf82
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Aug 7 09:19:08 2018 +0800

    rockchip: rk1808: add soc basic support
    
    RK3308 is a Soc from Rockchip, which embedded with dual
    ARM Cortex-A35.
    
    Change-Id: Ieda5705a058ef6a7be1966ccfff62eea66ca45db
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk1808.h b/arch/arm/include/asm/arch-rockchip/grf_rk1808.h
new file mode 100644
index 0000000000..7ef6487cbc
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk1808.h
@@ -0,0 +1,203 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd.
+ *
+ */
+#ifndef _ASM_ARCH_GRF_rk1808_H
+#define _ASM_ARCH_GRF_rk1808_H
+
+#include <common.h>
+
+struct rk1808_grf {
+	unsigned int gpio1a_iomux_l;			/* 0x0000 */
+	unsigned int gpio1a_iomux_h;			/* 0x0004 */
+	unsigned int gpio1b_iomux_l;			/* 0x0008 */
+	unsigned int gpio1b_iomux_h;			/* 0x000c */
+	unsigned int reserved0[(0x20 - 0x0c) / 4 - 1];
+	unsigned int gpio2a_iomux_l;			/* 0x0020 */
+	unsigned int gpio2a_iomux_h;			/* 0x0024 */
+	unsigned int gpio2b_iomux_l;			/* 0x0028 */
+	unsigned int gpio2b_iomux_h;			/* 0x002c */
+	unsigned int gpio2c_iomux_l;			/* 0x0030 */
+	unsigned int gpio2c_iomux_h;			/* 0x0034 */
+	unsigned int gpio2d_iomux_l;			/* 0x0038 */
+	unsigned int reserved1;
+	unsigned int gpio3a_iomux_l;			/* 0x0040 */
+	unsigned int gpio3a_iomux_h;			/* 0x0044 */
+	unsigned int gpio3b_iomux_l;			/* 0x0048 */
+	unsigned int gpio3b_iomux_h;			/* 0x004c */
+	unsigned int gpio3c_iomux_l;			/* 0x0050 */
+	unsigned int gpio3c_iomux_h;			/* 0x0054 */
+	unsigned int gpio3d_iomux_l;			/* 0x0058 */
+	unsigned int reserved2;
+	unsigned int gpio4a_iomux_l;			/* 0x0060 */
+	unsigned int gpio4a_iomux_h;			/* 0x0064 */
+	unsigned int gpio4b_iomux_l;			/* 0x0068 */
+	unsigned int gpio4b_iomux_h;			/* 0x006c */
+	unsigned int gpio4c_iomux_l;			/* 0x0070 */
+	unsigned int gpio4c_iomux_h;			/* 0x0074 */
+	unsigned int reserved3[(0x0080 - 0x0074) / 4 - 1];
+	unsigned int gpio1a_p;				/* 0x0080 */
+	unsigned int gpio1b_p;				/* 0x0084 */
+	unsigned int gpio1c_p;				/* 0x0088 */
+	unsigned int gpio1d_p;				/* 0x008c */
+	unsigned int gpio2a_p;				/* 0x0090 */
+	unsigned int gpio2b_p;				/* 0x0094 */
+	unsigned int gpio2c_p;				/* 0x0098 */
+	unsigned int gpio2d_p;				/* 0x009c */
+	unsigned int gpio3a_p;				/* 0x00a0 */
+	unsigned int gpio3b_p;				/* 0x00a4 */
+	unsigned int gpio3c_p;				/* 0x00a8 */
+	unsigned int gpio3d_p;				/* 0x00ac */
+	unsigned int gpio4a_p;				/* 0x00b0 */
+	unsigned int gpio4b_p;				/* 0x00b4 */
+	unsigned int gpio4c_p;				/* 0x00b8 */
+	unsigned int gpio4d_p;				/* 0x00bc */
+	unsigned int gpio1a_sr;				/* 0x00c0 */
+	unsigned int gpio1b_sr;				/* 0x00c4 */
+	unsigned int gpio1c_sr;				/* 0x00c8 */
+	unsigned int gpio1d_sr;				/* 0x00cc */
+	unsigned int gpio2a_sr;				/* 0x00d0 */
+	unsigned int gpio2b_sr;				/* 0x00d4 */
+	unsigned int gpio2c_sr;				/* 0x00d8 */
+	unsigned int gpio2d_sr;				/* 0x00dc */
+	unsigned int gpio3a_sr;				/* 0x00e0 */
+	unsigned int gpio3b_sr;				/* 0x00e4 */
+	unsigned int gpio3c_sr;				/* 0x00e8 */
+	unsigned int gpio3d_sr;				/* 0x00ec */
+	unsigned int gpio4a_sr;				/* 0x00f0 */
+	unsigned int gpio4b_sr;				/* 0x00f4 */
+	unsigned int gpio4c_sr;				/* 0x00f8 */
+	unsigned int gpio4d_sr;				/* 0x00fc */
+	unsigned int gpio1a_smt;			/* 0x0100 */
+	unsigned int gpio1b_smt;			/* 0x0104 */
+	unsigned int gpio1c_smt;			/* 0x0108 */
+	unsigned int gpio1d_smt;			/* 0x010c */
+	unsigned int gpio2a_smt;			/* 0x0110 */
+	unsigned int gpio2b_smt;			/* 0x0114 */
+	unsigned int gpio2c_smt;			/* 0x0118 */
+	unsigned int gpio2d_smt;			/* 0x011c */
+	unsigned int gpio3a_smt;			/* 0x0120 */
+	unsigned int gpio3b_smt;			/* 0x0124 */
+	unsigned int gpio3c_smt;			/* 0x0128 */
+	unsigned int gpio3d_smt;			/* 0x012c */
+	unsigned int gpio4a_smt;			/* 0x0130 */
+	unsigned int gpio4b_smt;			/* 0x0134 */
+	unsigned int gpio4c_smt;			/* 0x0138 */
+	unsigned int gpio4d_smt;			/* 0x013c */
+	unsigned int gpio1a_e;				/* 0x0140 */
+	unsigned int gpio1b_e;				/* 0x0144 */
+	unsigned int gpio1c_e;				/* 0x0148 */
+	unsigned int gpio1d_e;				/* 0x014c */
+	unsigned int gpio2a_e;				/* 0x0150 */
+	unsigned int gpio2b_e;				/* 0x0154 */
+	unsigned int gpio2c_e;				/* 0x0158 */
+	unsigned int gpio2d_e;				/* 0x015c */
+	unsigned int gpio3a_e;				/* 0x0160 */
+	unsigned int gpio3b_e;				/* 0x0164 */
+	unsigned int gpio3c_e;				/* 0x0168 */
+	unsigned int gpio3d_e;				/* 0x016c */
+	unsigned int gpio4a_e;				/* 0x0170 */
+	unsigned int gpio4b_e;				/* 0x0174 */
+	unsigned int gpio4c_e;				/* 0x0178 */
+	unsigned int gpio4d_e;				/* 0x017c */
+	unsigned int reserved4[(0x0190 - 0x017c) / 4 - 1];
+	unsigned int iofunc_con0;			/* 0x0190 */
+	unsigned int reserved5[(0x0400 - 0x0190) / 4 - 1];
+	unsigned int soc_con0;				/* 0x0400 */
+	unsigned int soc_con1;				/* 0x0404 */
+	unsigned int soc_con2;				/* 0x0408 */
+	unsigned int soc_con3;				/* 0x040c */
+	unsigned int soc_con4;				/* 0x0410 */
+	unsigned int soc_con5;				/* 0x0414 */
+	unsigned int reserved6[(0x0430 - 0x0414) / 4 - 1];
+	unsigned int pd_vi_con0;			/* 0x0430 */
+	unsigned int pd_vi_con1;			/* 0x0434 */
+	unsigned int pd_vi_status;			/* 0x0438 */
+	unsigned int reserved7;
+	unsigned int pd_vo_con0;			/* 0x0440 */
+	unsigned int pd_vo_con1;			/* 0x0444 */
+	unsigned int reserved8[(0x0480 - 0x0444) / 4 - 1];
+	unsigned int soc_status0;			/* 0x0480 */
+	unsigned int reserved9[(0x0500 - 0x0480) / 4 - 1];
+	unsigned int cpu_con0;				/* 0x0500 */
+	unsigned int cpu_con1;				/* 0x0504 */
+	unsigned int cpu_con2;				/* 0x0508 */
+	unsigned int reserved10[(0x0520 - 0x0508) / 4 - 1];
+	unsigned int cpu_status0;			/* 0x0520 */
+	unsigned int cpu_status1;			/* 0x0524 */
+	unsigned int reserved11[(0x0530 - 0x0524) / 4 - 1];
+	unsigned int soc_noc_con0;			/* 0x0530 */
+	unsigned int soc_noc_con1;			/* 0x0534 */
+	unsigned int soc_noc_con2;			/* 0x0538 */
+	unsigned int reserved12[(0x0600 - 0x0538) / 4 - 1];
+	unsigned int ram_con0;				/* 0x0600 */
+	unsigned int ram_con1;				/* 0x0604 */
+	unsigned int ram_con2;				/* 0x0608 */
+	unsigned int ram_con3;				/* 0x060c */
+	unsigned int ram_con4;				/* 0x0610 */
+	unsigned int reserved13[(0x0780 - 0x0610) / 4 - 1];
+	unsigned int npupvtm_con0;			/* 0x0780 */
+	unsigned int npupvtm_con1;			/* 0x0784 */
+	unsigned int npupvtm_status0;			/* 0x0788 */
+	unsigned int npupvtm_status1;			/* 0x078c */
+	unsigned int reserved14[(0x0800 - 0x078c) / 4 - 1];
+	unsigned int chip_id;				/* 0x0800 */
+	unsigned int reserved15[(0x0900 - 0x0800) / 4 - 1];
+	unsigned int mac_con0;				/* 0x0900 */
+	unsigned int mac_con1;				/* 0x0904 */
+
+};
+
+check_member(rk1808_grf, gpio1a_iomux_l, 0x0000);
+check_member(rk1808_grf, mac_con1, 0x0904);
+
+struct rk1808_pmugrf {
+	unsigned int gpio0al_iomux;
+	unsigned int gpio0bl_iomux;
+	unsigned int gpio0cl_iomux;
+	unsigned int gpio0dl_iomux;
+	unsigned int gpio0a_p;
+	unsigned int gpio0b_p;
+	unsigned int gpio0c_p;
+	unsigned int gpio0d_p;
+	unsigned int gpio0a_e;
+	unsigned int gpio0b_e;
+	unsigned int gpio0c_e;
+	unsigned int gpio0d_e;
+	unsigned int gpio0a_sr;
+	unsigned int gpio0b_sr;
+	unsigned int gpio0c_sr;
+	unsigned int gpio0d_sr;
+	unsigned int gpio0a_smt;
+	unsigned int gpio0b_smt;
+	unsigned int gpio0c_smt;
+	unsigned int gpio0d_smt;
+	unsigned int reserved1[(0x100 - 0x4c) / 4 - 1];
+	unsigned int soc_con[5];
+	unsigned int reserved2[(0x120 - 0x110) / 4 - 1];
+	unsigned int soc_status;
+	unsigned int reserved3[(0x140 - 0x120) / 4 - 1];
+	unsigned int io_vsel0;
+	unsigned int io_vsel1;
+	unsigned int io_vsel_status;
+	unsigned int reserved4[(0x180 - 0x148) / 4 - 1];
+	unsigned int pvtm_con[2];
+	unsigned int reserved5[2];
+	unsigned int pvtm_status[2];
+	unsigned int reserved6[(0x200 - 0x194) / 4 - 1];
+	unsigned int os_reg[12];
+	unsigned int reset_function_status;
+	unsigned int reset_function_clr;
+	unsigned int reserved7[(0x380 - 0x234) / 4 - 1];
+	unsigned int sig_detect_con;
+	unsigned int reserved8[(0x390 - 0x380) / 4 - 1];
+	unsigned int sig_detect_status;
+	unsigned int reserved9[(0x3a0 - 0x390) / 4 - 1];
+	unsigned int sig_detect_status_clear;
+	unsigned int reserved10[(0x3b0 - 0x3a0) / 4 - 1];
+	unsigned int sdmmc_det_counter;
+};
+
+check_member(rk1808_pmugrf, sdmmc_det_counter, 0x3b0);
+#endif
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index dcce0cbd70..ebb94e284a 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -279,6 +279,15 @@ config ROCKCHIP_RK3399
 	  and video codec support. Peripherals include Gigabit Ethernet,
 	  USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
 
+config ROCKCHIP_RK1808
+	bool "Support Rockchip RK1808"
+	select ARM64
+	select ARM_SMCCC
+	select DEBUG_UART_BOARD_INIT
+	help
+	  The Rockchip RK1808 is a ARM-based Soc which embedded with dual
+	  Cortex-A35.
+
 config ROCKCHIP_RV1108
 	bool "Support Rockchip RV1108"
 	select CPU_V7
@@ -328,6 +337,7 @@ config ROCKCHIP_BOOT_MODE_REG
 	default 0xff1005c8 if ROCKCHIP_RK3328
 	default 0xff738200 if ROCKCHIP_RK3368
 	default 0xff320300 if ROCKCHIP_RK3399
+	default 0xfe020200 if ROCKCHIP_RK1808
 	default 0x10300580 if ROCKCHIP_RV1108
 	default 0
 	help
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 6d0fd25d51..17d860daa7 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -47,6 +47,7 @@ obj-$(CONFIG_ROCKCHIP_RK3308) += rk3308/
 obj-$(CONFIG_ROCKCHIP_RK3328) += rk3328/
 obj-$(CONFIG_ROCKCHIP_RK3368) += rk3368/
 obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399/
+obj-$(CONFIG_ROCKCHIP_RK1808) += rk1808/
 obj-$(CONFIG_ROCKCHIP_RV1108) += rv1108/
 
 # Clear out SPL objects, in case this is a TPL build
diff --git a/arch/arm/mach-rockchip/rk1808/Makefile b/arch/arm/mach-rockchip/rk1808/Makefile
new file mode 100644
index 0000000000..c09dc5f497
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk1808/Makefile
@@ -0,0 +1,8 @@
+#
+# (C) Copyright 2018 Rockchip Electronics Co., Ltd.
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y += syscon_rk1808.o
+obj-y += rk1808.o
diff --git a/arch/arm/mach-rockchip/rk1808/rk1808.c b/arch/arm/mach-rockchip/rk1808/rk1808.c
new file mode 100644
index 0000000000..16525447ec
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk1808/rk1808.c
@@ -0,0 +1,75 @@
+// SPDX-License-Identifier:     GPL-2.0+
+/*
+ * Copyright (c) 2018 Rockchip Electronics Co., Ltd
+ *
+ */
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/grf_rk1808.h>
+#include <asm/arch/hardware.h>
+#include <asm/gpio.h>
+#include <debug_uart.h>
+
+#include <asm/armv8/mmu.h>
+static struct mm_region rk1808_mem_map[] = {
+	{
+		.virt = 0x0UL,
+		.phys = 0x0UL,
+		.size = 0xff000000UL,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+			 PTE_BLOCK_INNER_SHARE
+	}, {
+		.virt = 0xf8000000UL,
+		.phys = 0xf8000000UL,
+		.size = 0x08000000UL,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+			 PTE_BLOCK_NON_SHARE |
+			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
+	}, {
+		/* List terminator */
+		0,
+	}
+};
+
+struct mm_region *mem_map = rk1808_mem_map;
+
+#define GRF_BASE	0xfe000000
+
+enum {
+	GPIO4A3_SHIFT           = 12,
+	GPIO4A3_MASK            = GENMASK(15, 12),
+	GPIO4A3_GPIO            = 0,
+	GPIO4A3_SDMMC0_D1,
+	GPIO4A3_UART2_RX_M0,
+
+	GPIO4A2_SHIFT           = 8,
+	GPIO4A2_MASK            = GENMASK(11, 8),
+	GPIO4A2_GPIO            = 0,
+	GPIO4A2_SDMMC0_D0,
+	GPIO4A2_UART2_TX_M0,
+
+	UART2_IO_SEL_SHIFT	= 14,
+	UART2_IO_SEL_MASK	= GENMASK(15, 14),
+	UART2_IO_SEL_M0		= 0,
+	UART2_IO_SEL_M1,
+	UART2_IO_SEL_M2,
+	UART2_IO_SEL_USB,
+};
+
+/*
+ * Default use UART2_TX/RX_M0(TX: GPIO4_A2, RX: GPIO4_A3)
+ */
+void board_debug_uart_init(void)
+{
+	static struct rk1808_grf * const grf = (void *)GRF_BASE;
+
+	/* Enable early UART2 channel m0 on the rk1808 */
+	rk_clrsetreg(&grf->iofunc_con0, UART2_IO_SEL_MASK,
+		     UART2_IO_SEL_M0 << UART2_IO_SEL_SHIFT);
+
+	/* Switch iomux */
+	rk_clrsetreg(&grf->gpio4a_iomux_l,
+		     GPIO4A3_MASK | GPIO4A2_MASK,
+		     GPIO4A2_UART2_TX_M0 << GPIO4A2_SHIFT |
+		     GPIO4A3_UART2_RX_M0 << GPIO4A3_SHIFT);
+}
diff --git a/arch/arm/mach-rockchip/rk1808/syscon_rk1808.c b/arch/arm/mach-rockchip/rk1808/syscon_rk1808.c
new file mode 100644
index 0000000000..5ad3562db2
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk1808/syscon_rk1808.c
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier:     GPL-2.0+
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+
+static const struct udevice_id rk1808_syscon_ids[] = {
+	{ .compatible = "rockchip,rk1808-grf", .data = ROCKCHIP_SYSCON_GRF },
+	{ .compatible = "rockchip,rk1808-pmugrf", .data = ROCKCHIP_SYSCON_PMUGRF },
+	{ }
+};
+
+U_BOOT_DRIVER(syscon_rk1808) = {
+	.name = "rk1808_syscon",
+	.id = UCLASS_SYSCON,
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+	.bind = dm_scan_fdt_dev,
+#endif
+	.of_match = rk1808_syscon_ids,
+};
diff --git a/include/configs/rk1808_common.h b/include/configs/rk1808_common.h
new file mode 100644
index 0000000000..70945ccf27
--- /dev/null
+++ b/include/configs/rk1808_common.h
@@ -0,0 +1,54 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ */
+
+#ifndef __CONFIG_RK1808_COMMON_H
+#define __CONFIG_RK1808_COMMON_H
+
+#include "rockchip-common.h"
+
+#define CONFIG_SYS_MALLOC_LEN		(32 << 20)
+#define CONFIG_SYS_CBSIZE		1024
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_SYS_TEXT_BASE		0x00200000
+#define CONFIG_SYS_INIT_SP_ADDR		0x00300000
+#define CONFIG_SYS_LOAD_ADDR		0x00800800
+#define CONFIG_SYS_BOOTM_LEN		(64 << 20)	/* 64M */
+#define COUNTER_FREQUENCY		24000000
+
+#define GICD_BASE			0xff100000
+#define GICR_BASE			0xff140000
+#define GICC_BASE			0xff300000
+
+/* MMC/SD IP block */
+#define CONFIG_BOUNCE_BUFFER
+
+#define CONFIG_SYS_SDRAM_BASE		0
+#define SDRAM_MAX_SIZE			0xff000000
+#define SDRAM_BANK_SIZE			(2UL << 30)
+#define CONFIG_PREBOOT
+
+#ifndef CONFIG_SPL_BUILD
+/* usb mass storage */
+/* #define CONFIG_USB_FUNCTION_MASS_STORAGE */
+/* #define CONFIG_ROCKUSB_G_DNL_PID        0x330d */
+
+#define ENV_MEM_LAYOUT_SETTINGS \
+	"scriptaddr=0x00500000\0" \
+	"pxefile_addr_r=0x00600000\0" \
+	"fdt_addr_r=0x01f00000\0" \
+	"kernel_addr_r=0x02080000\0" \
+	"ramdisk_addr_r=0x0a200000\0"
+
+#include <config_distro_bootcmd.h>
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	ENV_MEM_LAYOUT_SETTINGS \
+	"partitions=" PARTS_DEFAULT \
+	ROCKCHIP_DEVICE_SETTINGS \
+	RKIMG_DET_BOOTDEV \
+	BOOTENV
+#endif
+
+#endif /* __CONFIG_RK1808_COMMON_H */

commit 41c0dd9b259fccd0a0d9a12c09ce53c3a1285de6
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Mon Aug 27 17:31:29 2018 +0800

    clk: rockchip: rk3399: Improve the aclk_perilp0 frequency
    
    Set aclk_perilp0 to 300M,
    To improve the performance of dual USB transmission.
    
    Change-Id: I3842742e87ed1d483215ec7bccb75b1c0ed503bf
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
index 97faba7324..15144d71e8 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
@@ -86,7 +86,7 @@ check_member(rk3399_cru, sdio1_con[1], 0x594);
 #define PERIHP_HCLK_HZ	(75 * MHz)
 #define PERIHP_PCLK_HZ	(37500 * KHz)
 
-#define PERILP0_ACLK_HZ	(100 * MHz)
+#define PERILP0_ACLK_HZ	(300 * MHz)
 #define PERILP0_HCLK_HZ	(100 * MHz)
 #define PERILP0_PCLK_HZ	(50 * MHz)
 
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index b8b5a3a074..e6ba48fae3 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -1189,7 +1189,6 @@ static void rkclk_init(struct rk3399_cru *cru)
 
 	/* configure perilp0 aclk, hclk, pclk */
 	aclk_div = DIV_ROUND_UP(GPLL_HZ, PERILP0_ACLK_HZ) - 1;
-	assert((aclk_div + 1) * PERILP0_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
 
 	hclk_div = PERILP0_ACLK_HZ / PERILP0_HCLK_HZ - 1;
 	assert((hclk_div + 1) * PERILP0_HCLK_HZ ==

commit 567735c8d99a45a4943b8f2cfc1aaf1e4415c24c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Aug 28 11:22:04 2018 +0800

    rockchip: enable icache/dcache anyway
    
    actually, icache is only enabled when not define CONFIG_SKIP_LOWLEVEL_INIT,
    icache/dcache had better not depend on other configures macros, so enable
    them anyway.
    
    Change-Id: Iba843ffd481a24c3b0235323253a5b423160c867
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 8da7c6dfac..b56edebf13 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -259,13 +259,11 @@ int board_fdt_fixup(void *blob)
 	return ret;
 }
 
-#if !defined(CONFIG_SYS_DCACHE_OFF) && !defined(CONFIG_ARM64)
 void enable_caches(void)
 {
-	/* Enable D-cache. I-cache is already enabled in start.S */
+	icache_enable();
 	dcache_enable();
 }
-#endif
 
 #if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
 #include <fdt_support.h>

commit 3302ecb798b00cd213213e6faff40141a8766832
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Aug 24 15:20:01 2018 +0800

    Revert "board_f: run reserve_board() earlier"
    
    This reverts commit a80c59f488ddce0fbc35cb92196f2f2d0890528e.
    
    armv7 get new gd after relocation depends on gd->bd position, this
    patch breaks the reserved memory layout.
    
    Change-Id: Ic23fe79d8c6edf048774808f3a06be5e17ccf686
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/board_f.c b/common/board_f.c
index 741c748cbc..f76f7da756 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -421,11 +421,11 @@ static int reserve_malloc(void)
 static int reserve_board(void)
 {
 	if (!gd->bd) {
-		gd->relocaddr -= sizeof(bd_t);
-		gd->bd = (bd_t *)map_sysmem(gd->relocaddr, sizeof(bd_t));
+		gd->start_addr_sp -= sizeof(bd_t);
+		gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
 		memset(gd->bd, '\0', sizeof(bd_t));
 		debug("Reserving %zu Bytes for Board Info at: %08lx\n",
-		      sizeof(bd_t), gd->relocaddr);
+		      sizeof(bd_t), gd->start_addr_sp);
 	}
 	return 0;
 }
@@ -839,11 +839,11 @@ static const init_fnc_t init_sequence_f[] = {
 #ifdef CONFIG_ARM
 	reserve_mmu,
 #endif
-	reserve_board,
 	reserve_video,
 	reserve_trace,
 	reserve_uboot,
 	reserve_malloc,
+	reserve_board,
 	setup_machine,
 	reserve_global_data,
 	reserve_fdt,

commit 74b417924bb3e34396fd361ff8672813e98704cb
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Aug 22 11:37:21 2018 +0800

    configs: evb-rk3229: support setting bootdelay time
    
    Change-Id: Ic645aa6916022b9f11c07e897a7e37aa00fe80f4
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index f83bc88bfc..32502c215f 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -17,6 +17,7 @@ CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_TARGET_EVB_RK3229=y
 CONFIG_SPL_STACK_R_ADDR=0x60600000
 CONFIG_DEFAULT_DEVICE_TREE="rk3229-evb"
+CONFIG_BOOTDELAY=0
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y

commit 56581d0ea3d03bc5e5fe22416074aa30a5d23a60
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Aug 22 18:00:27 2018 +0800

    rockchip: rk3399-firefly: boot sd before emmc for spl
    
    Make the SD have higher proirity then emmc when the SPL sacan the
    bootable U-Boot image.
    
    Change-Id: Ib80c3a190a9c7637dae1a9d8d303e296ee15464b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3399-firefly.dts b/arch/arm/dts/rk3399-firefly.dts
index 85c5208ee1..5e25387c9b 100644
--- a/arch/arm/dts/rk3399-firefly.dts
+++ b/arch/arm/dts/rk3399-firefly.dts
@@ -17,7 +17,7 @@
 
 	chosen {
 		stdout-path = &uart2;
-		u-boot,spl-boot-order = &sdhci, &sdmmc;
+		u-boot,spl-boot-order = &sdmmc, &sdhci;
 	};
 
 	backlight: backlight {

commit 2391e06651def2ab89a1a91cbc0d9dea9e55b323
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Aug 22 17:59:38 2018 +0800

    rockchip: rk3399: do not print in stimer init
    
    The Stimer init is at very early stage and the print is not available.
    
    Change-Id: I1e38ab8998abdeff3c95b7aaf88d2848a5a2b5d6
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c
index 377b639309..c131713d65 100644
--- a/arch/arm/mach-rockchip/rk3399/rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
@@ -65,7 +65,6 @@ void rockchip_stimer_init(void)
 	writel(0, TIMER_CHN10_BASE + TIMER_INIT_COUNT_L);
 	writel(0, TIMER_CHN10_BASE + TIMER_INIT_COUNT_H);
 	writel(TIMER_EN | TIMER_FMODE, TIMER_CHN10_BASE + TIMER_CONTROL_REG);
-	printf("%s\n", __func__);
 }
 #endif
 

commit 47b085748c7ae7dedc893b73fa7f3a073999f6e3
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Aug 22 17:58:30 2018 +0800

    rockchip: clk: rk3399: fix assert error
    
    We can not meet the assert condition after we update the code,
    fix it so that we can enable the DEBUG option.
    
    Change-Id: I4b3e6b30aae4480ed208f30610493a7d297e90ee
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index f7b1760054..b8b5a3a074 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -53,7 +53,7 @@ struct pll_div {
 #if !defined(CONFIG_SPL_BUILD)
 static const struct pll_div ppll_init_cfg = PLL_DIVISORS(PPLL_HZ, 2, 2, 1);
 #endif
-static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 1, 6, 1);
+static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 1, 3, 1);
 static const struct pll_div npll_init_cfg = PLL_DIVISORS(NPLL_HZ, 1, 3, 1);
 static const struct pll_div apll_1600_cfg = PLL_DIVISORS(1600*MHz, 3, 1, 1);
 static const struct pll_div apll_600_cfg = PLL_DIVISORS(600*MHz, 1, 2, 1);
@@ -1170,7 +1170,6 @@ static void rkclk_init(struct rk3399_cru *cru)
 
 	/* configure perihp aclk, hclk, pclk */
 	aclk_div = DIV_ROUND_UP(GPLL_HZ, PERIHP_ACLK_HZ) - 1;
-	assert((aclk_div + 1) * PERIHP_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
 
 	hclk_div = PERIHP_ACLK_HZ / PERIHP_HCLK_HZ - 1;
 	assert((hclk_div + 1) * PERIHP_HCLK_HZ ==
@@ -1433,7 +1432,6 @@ static void pmuclk_init(struct rk3399_pmucru *pmucru)
 
 	/*  configure pmu pclk */
 	pclk_div = PPLL_HZ / PMU_PCLK_HZ - 1;
-	assert((pclk_div + 1) * PMU_PCLK_HZ == PPLL_HZ && pclk_div <= 0x1f);
 	rk_clrsetreg(&pmucru->pmucru_clksel[0],
 		     PMU_PCLK_DIV_CON_MASK,
 		     pclk_div << PMU_PCLK_DIV_CON_SHIFT);

commit 7c709eb56ba3ea4f5d086a48e6dc62fd3d4379a6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Aug 20 17:28:52 2018 +0800

    rockchiop: dts: rk3126: clean up evb and bnd-d708
    
    - remove unused file: rk3126-bnd-d708.dts;
    - remove unused nodes in rk3126-evb.dts;
    - add nandc and uart2 to rk3128-u-boot.dtsi;
    
    Change-Id: Ic5fda6daa371b67887b3521aaa0676b0bd3c0b9a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 087b721eea..594614a2c6 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -31,7 +31,6 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
 	rk3036-sdk.dtb \
 	rk3066a-mk808.dtb \
 	rk3126-evb.dtb \
-	rk3126-bnd-d708.dtb \
 	rk3128-evb.dtb \
 	rk3188-radxarock.dtb \
 	rk3288-evb.dtb \
diff --git a/arch/arm/dts/rk3126-bnd-d708.dts b/arch/arm/dts/rk3126-bnd-d708.dts
deleted file mode 100644
index c940b8d219..0000000000
--- a/arch/arm/dts/rk3126-bnd-d708.dts
+++ /dev/null
@@ -1,411 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-/dts-v1/;
-
-#include "rk3128.dtsi"
-#include "rk3128-u-boot.dtsi"
-#include <dt-bindings/input/input.h>
-
-/ {
-	model = "Rockchip RK3126 bnd-d708 board";
-	compatible = "rockchip,rk3128-evb", "rockchip,rk3128";
-
-	chosen {
-		stdout-path = &uart2;
-	};
-
-	vcc5v0_host: vcc5v0-host-drv {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc5v0_host";
-		gpio = <&gpio2 23 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&host_vbus_drv>;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		regulator-always-on;
-	};
-
-	vcc_backlight: vcc-backlight {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc_backlight";
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		regulator-always-on;
-	};
-
-	backlight: backlight {
-		compatible = "pwm-backlight";
-		brightness-levels = <
-			255 169 168 168 167 166 166 165
-			164 164 163 162 162 161 160 160
-			159 158 158 157 156 156 155 154
-			154 153 152 152 151 150 150 149
-			148 148 147 146 146 145 144 144
-			143 142 142 141 140 140 139 138
-			138 137 136 136 135 134 134 133
-			132 132 131 130 130 129 128 128
-			127 126 126 125 124 124 123 122
-			122 121 120 120 119 118 118 117
-			116 116 115 114 114 113 112 112
-			111 110 110 109 108 108 107 106
-			106 105 104 104 103 102 102 101
-			100 100  99  98  98  97  96  96
-			 95  94  94  93  92  92  91  90
-			 90  89  88  88  87  86  86  85
-			 84  84  83  82  82  81  80  80
-			 79  78  78  77  76  76  75  74
-			 74  73  72  72  71  70  70  69
-			 68  68  67  66  66  65  64  64
-			 63  62  62  61  60  60  59  58
-			 58  57  56  56  55  54  54  53
-			 52  52  51  50  50  49  48  48
-			 47  46  46  45  44  44  43  42
-			 42  41  40  40  39  38  38  37
-			 36  36  35  34  34  33  32  32
-			 31  30  30  29  28  28  27  26
-			 26  25  24  24  23  22  22  21
-			 20  20  19  18  18  17  16  16
-			 15  14  14  13  12  12  11  10
-			 10   9   8   8   7   6   6   5
-			  4   4   3   2   1   1   1   0>;
-		default-brightness-level = <128>;
-		pwms = <&pwm0 0 25000 0>;
-		enable-gpios = <&gpio2 RK_PB6 GPIO_ACTIVE_HIGH>;
-		power-supply = <&vcc_backlight>;
-		status = "okay";
-	};
-
-	adc-keys {
-		compatible = "adc-keys";
-		io-channels = <&saradc 2>;
-		io-channel-names = "buttons";
-		poll-interval = <100>;
-		keyup-threshold-microvolt = <3300000>;
-
-		button-up {
-			label = "Volume Up";
-			linux,code = <KEY_VOLUMEUP>;
-			press-threshold-microvolt = <0>;
-		};
-
-		button-down {
-			label = "Volume Down";
-			linux,code = <KEY_VOLUMEDOWN>;
-			press-threshold-microvolt = <1650000>;
-		};
-	};
-
-	charge-animation {
-		compatible = "charge-animation";
-		screen-on-voltage-threshold = <3350>;
-		power-on-voltage-threshold = <3450>;
-		power-on-soc-threshold = <0>;
-		status = "okay";
-	};
-};
-
-&mipi_dphy {
-	status = "okay";
-};
-
-&dsi {
-	status = "okay";
-
-	panel@0 {
-		compatible = "simple-panel-dsi";
-		reg = <0>;
-		backlight = <&backlight>;
-		power-supply = <&ldo6>;
-		power-invert = <1>;
-		enable-gpios = <&gpio2 RK_PC3 GPIO_ACTIVE_HIGH>;
-		reset-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_LOW>;
-		prepare-delay-ms = <20>;
-		reset-delay-ms = <20>;
-		init-delay-ms = <20>;
-		enable-delay-ms = <120>;
-		disable-delay-ms = <20>;
-		unprepare-delay-ms = <20>;
-
-		width-mm = <153>;
-		height-mm = <85>;
-
-		dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
-			      MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
-		dsi,format = <MIPI_DSI_FMT_RGB888>;
-		dsi,lanes = <4>;
-		status = "okay";
-
-		panel-init-sequence = [
-			05 1e 01 01
-			15 00 02 80 47
-			15 00 02 81 40
-			15 00 02 82 04
-			15 00 02 83 77
-			15 00 02 84 0f
-			15 00 02 85 70
-			15 78 02 86 70
-		];
-
-		display-timings {
-			native-mode = <&timing0>;
-
-			timing0: timing0 {
-				clock-frequency = <49500000>;
-				hactive = <1024>;
-				hfront-porch = <120>;
-				hsync-len = <40>;
-				hback-porch = <120>;
-				vactive = <600>;
-				vfront-porch = <14>;
-				vsync-len = <4>;
-				vback-porch = <14>;
-				hsync-active = <0>;
-				vsync-active = <0>;
-				de-active = <0>;
-				pixelclk-active = <0>;
-			};
-		};
-	};
-};
-
-&i2c0 {
-	status = "okay";
-	clock-frequency = <400000>;
-
-	rk816: pmic@1a {
-		compatible = "rockchip,rk816";
-		reg = <0x1a>;
-		interrupt-parent = <&gpio0>;
-		interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pmic_int_l>;
-		rockchip,system-power-controller;
-		wakeup-source;
-		gpio-controller;
-		#gpio-cells = <2>;
-		#clock-cells = <1>;
-		clock-output-names = "xin32k", "rk816-clkout2";
-
-		gpio {
-			status = "okay";
-		};
-
-		pwrkey {
-			status = "okay";
-		};
-
-		rtc {
-			status = "okay";
-		};
-
-		battery {
-			compatible = "rk816-battery";
-			ocv_table = < 3400 3654 3686 3710 3744 3775 3803
-						  3825 3843 3858 3870 3886 3916 3955
-						  3988 4010 4023 4032 4049 4080 4151 >;
-			design_capacity = <2000>;
-			design_qmax = <2200>;
-			bat_res = <120>;
-			max_input_current = <2000>;
-			max_chrg_current = <1000>;
-			max_chrg_voltage = <4200>;
-			sleep_enter_current = <300>;
-			sleep_exit_current = <300>;
-			sleep_filter_current = <100>;
-			power_off_thresd = <3500>;
-			zero_algorithm_vol = <3800>;
-			max_soc_offset = <60>;
-			monitor_sec = <5>;
-			virtual_power = <0>;
-			power_dc2otg = <0>;
-			dc_det_adc = <0>;
-		};
-
-		regulators {
-
-			vdd_arm: DCDC_REG1{
-				regulator-name= "vdd_arm";
-				regulator-min-microvolt = <750000>;
-				regulator-max-microvolt = <1500000>;
-				regulator-ramp-delay = <6001>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <900000>;
-				};
-			};
-
-			vdd_log: DCDC_REG2 {
-				regulator-name= "vdd_logic";
-				regulator-min-microvolt = <750000>;
-				regulator-max-microvolt = <1500000>;
-				regulator-ramp-delay = <6001>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <1000000>;
-				};
-			};
-
-			vcc_ddr: DCDC_REG3 {
-				regulator-name = "vcc_ddr";
-				regulator-always-on;
-				regulator-boot-on;
-			};
-
-			vcc_io: DCDC_REG4 {
-				regulator-name = "vcc_io";
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <3000000>;
-				};
-			};
-
-			vcc28_cif: LDO_REG1 {
-				regulator-name = "vcc28_cif";
-				regulator-min-microvolt = <2800000>;
-				regulator-max-microvolt = <2800000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc18_cif: LDO_REG2 {
-				regulator-name = "vcc18_cif";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vdd_11: LDO_REG3 {
-				regulator-name = "vdd_11";
-				regulator-min-microvolt = <1100000>;
-				regulator-max-microvolt = <1100000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <1100000>;
-				};
-			};
-
-			ldo4: LDO_REG4 {
-				regulator-name= "ldo4";
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			ldo5: LDO_REG5 {
-				regulator-name= "ldo5";
-				regulator-min-microvolt = <3000000>;
-				regulator-max-microvolt = <3000000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			ldo6: LDO_REG6 {
-				regulator-name= "ldo6";
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <3300000>;
-				};
-			};
-		};
-	};
-};
-
-&nandc {
-	u-boot,dm-pre-reloc;
-	status = "okay";
-};
-
-&pwm0 {
-	status = "okay";
-};
-
-&u2phy {
-	status = "okay";
-};
-
-&u2phy_otg {
-	status = "okay";
-};
-
-&u2phy_host {
-	status = "okay";
-};
-
-&uart2 {
-	clock-frequency = <24000000>;
-	u-boot,dm-pre-reloc;
-	status = "okay";
-};
-
-&usb_host_ehci {
-	status = "okay";
-};
-
-&usb_host_ohci {
-	status = "okay";
-};
-
-&usb_otg {
-	status = "okay";
-};
-
-&pinctrl {
-	usb_otg {
-		otg_vbus_drv: otg-vbus-drv {
-			rockchip,pins = <0 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	usb_host {
-		host_vbus_drv: host-vbus-drv {
-			rockchip,pins = <2 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	pmic_int_l: pmic-int-l {
-			rockchip,pins =
-				<0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
-	};
-};
-
-&route_dsi {
-	status = "okay";
-};
-
-&vop {
-	status = "okay";
-};
-
-&saradc {
-	status = "okay";
-};
diff --git a/arch/arm/dts/rk3126-evb.dts b/arch/arm/dts/rk3126-evb.dts
index b2cd3b73ea..26fe2500d6 100644
--- a/arch/arm/dts/rk3126-evb.dts
+++ b/arch/arm/dts/rk3126-evb.dts
@@ -12,7 +12,7 @@
 
 / {
 	model = "Rockchip RK3126 Evaluation board";
-	compatible = "rockchip,rk3128-evb", "rockchip,rk3128";
+	compatible = "rockchip,rk3126-evb", "rockchip,rk3126";
 
 	chosen {
 		stdout-path = &uart2;
@@ -28,108 +28,6 @@
 		regulator-max-microvolt = <5000000>;
 	};
 
-	vcc5v0_host: vcc5v0-host-drv {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc5v0_host";
-		gpio = <&gpio2 23 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&host_vbus_drv>;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		regulator-always-on;
-	};
-
-	vcc_backlight: vcc-backlight {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc_backlight";
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		regulator-always-on;
-	};
-
-	backlight: backlight {
-		compatible = "pwm-backlight";
-		brightness-levels = <
-			0   1   2   3   4   5   6   7
-			8   9  10  11  12  13  14  15
-			16  17  18  19  20  21  22  23
-			24  25  26  27  28  29  30  31
-			32  33  34  35  36  37  38  39
-			40  41  42  43  44  45  46  47
-			48  49  50  51  52  53  54  55
-			56  57  58  59  60  61  62  63
-			64  65  66  67  68  69  70  71
-			72  73  74  75  76  77  78  79
-			80  81  82  83  84  85  86  87
-			88  89  90  91  92  93  94  95
-			96  97  98  99 100 101 102 103
-			104 105 106 107 108 109 110 111
-			112 113 114 115 116 117 118 119
-			120 121 122 123 124 125 126 127
-			128 129 130 131 132 133 134 135
-			136 137 138 139 140 141 142 143
-			144 145 146 147 148 149 150 151
-			152 153 154 155 156 157 158 159
-			160 161 162 163 164 165 166 167
-			168 169 170 171 172 173 174 175
-			176 177 178 179 180 181 182 183
-			184 185 186 187 188 189 190 191
-			192 193 194 195 196 197 198 199
-			200 201 202 203 204 205 206 207
-			208 209 210 211 212 213 214 215
-			216 217 218 219 220 221 222 223
-			224 225 226 227 228 229 230 231
-			232 233 234 235 236 237 238 239
-			240 241 242 243 244 245 246 247
-			248 249 250 251 252 253 254 255>;
-		default-brightness-level = <128>;
-		pwms = <&pwm0 0 1000000 1>;
-		enable-gpios = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>;
-		power-supply = <&vcc_backlight>;
-		status = "okay";
-	};
-
-	lvds_panel: lvds-panel {
-		u-boot,dm-pre-reloc;
-		compatible ="simple-panel";
-		backlight = <&backlight>;
-		bus-format = <0x1009>;
-		/* enable-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
-		 * delay,disable = <10>;
-		 * power-supply = <&vcc_lcd>;
-		 */
-		power-supply = <&ldo6>;
-		power-invert = <1>;
-		rockchip,data-mapping = "jeida";
-		rockchip,data-width = <18>;
-		rockchip,output = "rgb";
-
-		display-timings {
-			native-mode = <&timing0>;
-			timing0: timing0 {
-				clock-frequency = <60000000>;
-				hactive = <1024>;
-				vactive = <600>;
-				hback-porch = <100>;
-				hfront-porch = <120>;
-				vback-porch = <10>;
-				vfront-porch = <15>;
-				hsync-len = <100>;
-				vsync-len = <10>;
-				hsync-active = <0>;
-				vsync-active = <0>;
-				de-active = <0>;
-				pixelclk-active = <0>;
-			};
-		};
-
-		ports {
-			panel_in_lvds: endpoint {
-				remote-endpoint = <&lvds_out_panel>;
-			};
-		};
-	};
-
 	adc-keys {
 		compatible = "adc-keys";
 		io-channels = <&saradc 2>;
@@ -149,193 +47,6 @@
 			press-threshold-microvolt = <1650000>;
 		};
 	};
-
-	charge-animation {
-		compatible = "rockchip,uboot-charge";
-		rockchip,uboot-charge-on = <0>;
-		rockchip,android-charge-on = <1>;
-		status = "okay";
-	};
-};
-
-&i2c1 {
-	status = "okay";
-
-        hym8563: hym8563@51 {
-		compatible = "haoyu,hym8563";
-		reg = <0x51>;
-		#clock-cells = <0>;
-		clock-frequency = <32768>;
-		clock-output-names = "xin32k";
-	};
-};
-
-&i2c2 {
-	clock-frequency = <100000>;
-	status = "okay";
-
-	rk816: pmic@1a {
-		compatible = "rockchip,rk816";
-		reg = <0x1a>;
-		interrupt-parent = <&gpio0>;
-		interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pmic_int_l>;
-		rockchip,system-power-controller;
-		wakeup-source;
-		gpio-controller;
-		#gpio-cells = <2>;
-		#clock-cells = <1>;
-		clock-output-names = "xin32k", "rk816-clkout2";
-
-		gpio {
-			status = "okay";
-		};
-
-		pwrkey {
-			status = "okay";
-		};
-
-		rtc {
-			status = "okay";
-		};
-
-		battery {
-			compatible = "rk816-battery";
-			ocv_table = < 3400 3654 3686 3710 3744 3775 3803
-						  3825 3843 3858 3870 3886 3916 3955
-						  3988 4010 4023 4032 4049 4080 4151 >;
-			design_capacity = <2000>;
-			design_qmax = <2200>;
-			bat_res = <120>;
-			max_input_current = <2000>;
-			max_chrg_current = <1000>;
-			max_chrg_voltage = <4200>;
-			sleep_enter_current = <300>;
-			sleep_exit_current = <300>;
-			sleep_filter_current = <100>;
-			power_off_thresd = <3500>;
-			zero_algorithm_vol = <3800>;
-			max_soc_offset = <60>;
-			monitor_sec = <5>;
-			virtual_power = <0>;
-			power_dc2otg = <0>;
-			dc_det_adc = <0>;
-		};
-
-		regulators {
-
-			vdd_arm: DCDC_REG1{
-				regulator-name= "vdd_arm";
-				regulator-min-microvolt = <750000>;
-				regulator-max-microvolt = <1500000>;
-				regulator-ramp-delay = <6001>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <900000>;
-				};
-			};
-
-			vdd_log: DCDC_REG2 {
-				regulator-name= "vdd_logic";
-				regulator-min-microvolt = <750000>;
-				regulator-max-microvolt = <1500000>;
-				regulator-ramp-delay = <6001>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <1000000>;
-				};
-			};
-
-			vcc_ddr: DCDC_REG3 {
-				regulator-name = "vcc_ddr";
-				regulator-always-on;
-				regulator-boot-on;
-			};
-
-			vcc_io: DCDC_REG4 {
-				regulator-name = "vcc_io";
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <3000000>;
-				};
-			};
-
-			vcc28_cif: LDO_REG1 {
-				regulator-name = "vcc28_cif";
-				regulator-min-microvolt = <2800000>;
-				regulator-max-microvolt = <2800000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc18_cif: LDO_REG2 {
-				regulator-name = "vcc18_cif";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vdd_11: LDO_REG3 {
-				regulator-name = "vdd_11";
-				regulator-min-microvolt = <1100000>;
-				regulator-max-microvolt = <1100000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <1100000>;
-				};
-			};
-
-			ldo4: LDO_REG4 {
-				regulator-name= "ldo4";
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			ldo5: LDO_REG5 {
-				regulator-name= "ldo5";
-				regulator-min-microvolt = <3000000>;
-				regulator-max-microvolt = <3000000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			ldo6: LDO_REG6 {
-				regulator-name= "ldo6";
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <3300000>;
-				};
-			};
-		};
-	};
 };
 
 &u2phy {
@@ -374,22 +85,6 @@
 	status = "okay";
 };
 
-&lvds {
-	status = "okay";
-	ports {
-		lvds_out: endpoint@0 {
-			reg = <0>;
-			lvds_out_panel: endpoint {
-				remote-endpoint = <&panel_in_lvds>;
-			};
-		};
-	};
-};
-
-&vop {
-	status = "okay";
-};
-
 &pinctrl {
 	usb_otg {
 		otg_vbus_drv: otg-vbus-drv {
@@ -402,13 +97,4 @@
 			rockchip,pins = <2 23 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
 	};
-
-	pmic_int_l: pmic-int-l {
-			rockchip,pins =
-				<0 2 RK_FUNC_GPIO &pcfg_pull_none>;
-	};
-};
-
-&saradc {
-	status = "okay";
 };
diff --git a/arch/arm/dts/rk3128-u-boot.dtsi b/arch/arm/dts/rk3128-u-boot.dtsi
index 3b225ad16f..3561fe1530 100644
--- a/arch/arm/dts/rk3128-u-boot.dtsi
+++ b/arch/arm/dts/rk3128-u-boot.dtsi
@@ -9,8 +9,14 @@
 	u-boot,dm-pre-reloc;
 };
 
+&nandc {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 &emmc {
 	u-boot,dm-pre-reloc;
+	status = "okay";
 };
 
 &grf {
@@ -20,3 +26,8 @@
 &cru {
 	u-boot,dm-pre-reloc;
 };
+
+&uart2 {
+	u-boot,dm-pre-reloc;
+	clock-frequency = <24000000>;
+};

commit 565dccc55a0a4c4f24195fc61bbb53b2ba6c0ae8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Aug 20 17:27:46 2018 +0800

    configs: rk3126: remove unused defconfig
    
    we can use rk3126_defconfig by default.
    
    Change-Id: I40d0796e899be49c5819c2b4ef82fef7060d6187
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/bnd-d708-rk3126_defconfig b/configs/bnd-d708-rk3126_defconfig
deleted file mode 100644
index 49534e1ccf..0000000000
--- a/configs/bnd-d708-rk3126_defconfig
+++ /dev/null
@@ -1,87 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_ROCKCHIP=y
-CONFIG_ROCKCHIP_RK3128=y
-CONFIG_ROCKCHIP_RK3126=y
-CONFIG_ROCKCHIP_RESOURCE_IMAGE=y
-CONFIG_RKIMG_BOOTLOADER=y
-CONFIG_CMD_BOOT_ROCKCHIP=y
-CONFIG_RKPARM_PARTITION=y
-CONFIG_DEFAULT_DEVICE_TREE="rk3126-bnd-d708"
-CONFIG_DEBUG_UART=y
-CONFIG_FIT=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
-CONFIG_SYS_MALLOC_F_LEN=0x38000
-# CONFIG_DISPLAY_CPUINFO is not set
-CONFIG_ANDROID_BOOTLOADER=y
-CONFIG_FASTBOOT=y
-CONFIG_USB_FUNCTION_FASTBOOT=y
-CONFIG_CMD_FASTBOOT=y
-CONFIG_FASTBOOT_BUF_ADDR=0x60800800
-CONFIG_FASTBOOT_BUF_SIZE=0x04000000
-CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=0
-CONFIG_NAND_BOOT=y
-# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_GPT=y
-CONFIG_CMD_LOAD_ANDROID=y
-CONFIG_CMD_BOOT_ANDROID=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_BMP=y
-CONFIG_CMD_TIME=y
-CONFIG_CMD_CHARGE_DISPLAY=y
-CONFIG_REGMAP=y
-CONFIG_SYSCON=y
-CONFIG_CLK=y
-CONFIG_ROCKCHIP_GPIO=y
-CONFIG_SYS_I2C_ROCKCHIP=y
-CONFIG_DM_KEY=y
-CONFIG_MMC_DW=y
-CONFIG_OF_LIVE=y
-CONFIG_OF_CHECKS=y
-CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_PHY=y
-CONFIG_PHY_ROCKCHIP_INNO_USB2=y
-CONFIG_PINCTRL=y
-CONFIG_DM_FUEL_GAUGE=y
-CONFIG_DM_PMIC=y
-CONFIG_PMIC_RK8XX=y
-CONFIG_REGULATOR_PWM=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_REGULATOR_RK8XX=y
-CONFIG_DM_CHARGE_DISPLAY=y
-CONFIG_CHARGE_ANIMATION=y
-CONFIG_PWM_ROCKCHIP=y
-CONFIG_RAM=y
-CONFIG_DM_RESET=y
-CONFIG_RKNAND=y
-CONFIG_DEBUG_UART_BASE=0x20068000
-CONFIG_DEBUG_UART_CLOCK=24000000
-CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_SYS_NS16550=y
-CONFIG_SYSRESET=y
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_GENERIC=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_OHCI_GENERIC=y
-CONFIG_USB_DWC2=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_DWC2_OTG=y
-CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x310c
-CONFIG_DM_VIDEO=y
-CONFIG_DISPLAY=y
-CONFIG_VIDEO_ROCKCHIP=y
-CONFIG_DISPLAY_ROCKCHIP_MIPI=y
-CONFIG_DRM_ROCKCHIP=y
-CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
-CONFIG_LCD=y
-CONFIG_USE_TINY_PRINTF=y
-CONFIG_ERRNO_STR=y
-CONFIG_TEST_ROCKCHIP=y
diff --git a/configs/evb-rk3126_defconfig b/configs/evb-rk3126_defconfig
deleted file mode 100644
index 9f55b4c675..0000000000
--- a/configs/evb-rk3126_defconfig
+++ /dev/null
@@ -1,85 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_ROCKCHIP=y
-CONFIG_ROCKCHIP_RK3128=y
-CONFIG_ROCKCHIP_RK3126=y
-CONFIG_ROCKCHIP_RESOURCE_IMAGE=y
-CONFIG_RKIMG_BOOTLOADER=y
-CONFIG_CMD_BOOT_ROCKCHIP=y
-CONFIG_RKPARM_PARTITION=y
-CONFIG_DEFAULT_DEVICE_TREE="rk3126-evb"
-CONFIG_DEBUG_UART=y
-CONFIG_FIT=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
-CONFIG_SYS_MALLOC_F_LEN=0x38000
-# CONFIG_DISPLAY_CPUINFO is not set
-CONFIG_ANDROID_BOOTLOADER=y
-CONFIG_FASTBOOT=y
-CONFIG_USB_FUNCTION_FASTBOOT=y
-CONFIG_CMD_FASTBOOT=y
-CONFIG_FASTBOOT_BUF_ADDR=0x60800800
-CONFIG_FASTBOOT_BUF_SIZE=0x04000000
-CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=0
-# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_GPT=y
-CONFIG_CMD_LOAD_ANDROID=y
-CONFIG_CMD_BOOT_ANDROID=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_BMP=y
-CONFIG_CMD_TIME=y
-CONFIG_CMD_CHARGE_DISPLAY=y
-CONFIG_REGMAP=y
-CONFIG_SYSCON=y
-CONFIG_CLK=y
-CONFIG_ROCKCHIP_GPIO=y
-CONFIG_SYS_I2C_ROCKCHIP=y
-CONFIG_DM_KEY=y
-CONFIG_MMC_DW=y
-CONFIG_OF_LIVE=y
-CONFIG_OF_CHECKS=y
-CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_PHY=y
-CONFIG_PHY_ROCKCHIP_INNO_USB2=y
-CONFIG_PINCTRL=y
-CONFIG_DM_FUEL_GAUGE=y
-CONFIG_DM_PMIC=y
-CONFIG_PMIC_RK8XX=y
-CONFIG_REGULATOR_PWM=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_REGULATOR_RK8XX=y
-CONFIG_DM_CHARGE_DISPLAY=y
-CONFIG_CHARGE_ANIMATION=y
-CONFIG_PWM_ROCKCHIP=y
-CONFIG_RAM=y
-CONFIG_DM_RESET=y
-CONFIG_DEBUG_UART_BASE=0x20068000
-CONFIG_DEBUG_UART_CLOCK=24000000
-CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_SYS_NS16550=y
-CONFIG_SYSRESET=y
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_GENERIC=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_OHCI_GENERIC=y
-CONFIG_USB_DWC2=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_DWC2_OTG=y
-CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x310c
-CONFIG_DM_VIDEO=y
-CONFIG_DISPLAY=y
-CONFIG_DRM_ROCKCHIP=y
-CONFIG_DRM_ROCKCHIP_LVDS=y
-CONFIG_LCD=y
-CONFIG_USE_TINY_PRINTF=y
-CONFIG_ERRNO_STR=y
-CONFIG_TEST_ROCKCHIP=y
-CONFIG_ADC_KEY=y
-CONFIG_RK8XX_PWRKEY=y

commit 839446eac3b3512840193ce984b522ddbc442e7f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Aug 20 17:32:39 2018 +0800

    rockchip: rk3128: enable RKIMG_BOOTCOMMAND when SPL is disabled
    
    Change-Id: I32042f76161e5912d1b30d1165b36c999c3e6179
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/evb_rk3128.h b/include/configs/evb_rk3128.h
index 56ea754554..1038ffc8b0 100644
--- a/include/configs/evb_rk3128.h
+++ b/include/configs/evb_rk3128.h
@@ -20,7 +20,9 @@
 		"stdout=serial,vidconsole\0" \
 		"stderr=serial,vidconsole\0"
 
+#ifndef CONFIG_SPL_BUILD
 #undef CONFIG_BOOTCOMMAND
 #define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
+#endif
 
 #endif

commit b6b0fe1fea8a604a139c64fdda5fa19fb22a9774
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Aug 20 17:27:04 2018 +0800

    configs: add rk3126_defconfig
    
    Change-Id: I5bb76336b9f48a6f6b3d671f26f2f555d19d0945
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3126_defconfig b/configs/rk3126_defconfig
new file mode 100644
index 0000000000..2481be321d
--- /dev/null
+++ b/configs/rk3126_defconfig
@@ -0,0 +1,87 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0x38000
+CONFIG_ROCKCHIP_RK3128=y
+CONFIG_ROCKCHIP_RK3126=y
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3126-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_NAND_BOOT=y
+CONFIG_BOOTDELAY=0
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_FASTBOOT_BUF_ADDR=0x60800800
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_BMP=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_CHARGE_DISPLAY=y
+CONFIG_RKPARM_PARTITION=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_RK8XX_PWRKEY=y
+CONFIG_ADC_KEY=y
+CONFIG_GPIO_KEY=y
+CONFIG_RK_KEY=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PINCTRL=y
+CONFIG_DM_FUEL_GAUGE=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_DM_CHARGE_DISPLAY=y
+CONFIG_CHARGE_ANIMATION=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_RKNAND=y
+CONFIG_DEBUG_UART_BASE=0x20068000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x310c
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_DISPLAY_ROCKCHIP_MIPI=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_DRM_ROCKCHIP_LVDS=y
+CONFIG_LCD=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_ERRNO_STR=y
+CONFIG_TEST_ROCKCHIP=y

commit a80c59f488ddce0fbc35cb92196f2f2d0890528e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Aug 15 15:58:17 2018 +0800

    board_f: run reserve_board() earlier
    
    it promises reserve_board() not to overlay trust os memory.
    
    Change-Id: I149de3b7956a63a80ab91c38c12c16b8709b9756
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/board_f.c b/common/board_f.c
index f76f7da756..741c748cbc 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -421,11 +421,11 @@ static int reserve_malloc(void)
 static int reserve_board(void)
 {
 	if (!gd->bd) {
-		gd->start_addr_sp -= sizeof(bd_t);
-		gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
+		gd->relocaddr -= sizeof(bd_t);
+		gd->bd = (bd_t *)map_sysmem(gd->relocaddr, sizeof(bd_t));
 		memset(gd->bd, '\0', sizeof(bd_t));
 		debug("Reserving %zu Bytes for Board Info at: %08lx\n",
-		      sizeof(bd_t), gd->start_addr_sp);
+		      sizeof(bd_t), gd->relocaddr);
 	}
 	return 0;
 }
@@ -839,11 +839,11 @@ static const init_fnc_t init_sequence_f[] = {
 #ifdef CONFIG_ARM
 	reserve_mmu,
 #endif
+	reserve_board,
 	reserve_video,
 	reserve_trace,
 	reserve_uboot,
 	reserve_malloc,
-	reserve_board,
 	setup_machine,
 	reserve_global_data,
 	reserve_fdt,

commit 54fc9addaa2071bbc927b1831d06ad4701a3c3b7
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Fri Aug 17 11:02:23 2018 +0800

    drm/rockchip: add a safety mothed to restore logo file
    
    we found the name value from the following function will
    be null at rockchip_display_fixup(), so we instore this
    value at display_state local parameter.
        ofnode_read_string_index(node, "logo,kernel", 0, &name))
    
    Change-Id: I18c6b2a699cf8063d4b9e43b7627c388746dcff0
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 66220f2038..53ce8cc070 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -1351,8 +1351,12 @@ static int rockchip_display_probe(struct udevice *dev)
 		memset(s, 0, sizeof(*s));
 
 		INIT_LIST_HEAD(&s->head);
-		ret = ofnode_read_string_index(node, "logo,uboot", 0, &s->ulogo_name);
-		ret = ofnode_read_string_index(node, "logo,kernel", 0, &s->klogo_name);
+		ret = ofnode_read_string_index(node, "logo,uboot", 0, &name);
+		if (!ret)
+			memcpy(s->ulogo_name, name, strlen(name));
+		ret = ofnode_read_string_index(node, "logo,kernel", 0, &name);
+		if (!ret)
+			memcpy(s->klogo_name, name, strlen(name));
 		ret = ofnode_read_string_index(node, "logo,mode", 0, &name);
 		if (!strcmp(name, "fullscreen"))
 			s->logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN;
diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index f198b4208d..ce8f45169c 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -154,8 +154,8 @@ struct display_state {
 	struct connector_state conn_state;
 	struct panel_state panel_state;
 
-	const char *ulogo_name;
-	const char *klogo_name;
+	char ulogo_name[30];
+	char klogo_name[30];
 
 	struct logo_info logo;
 	int logo_mode;

commit 747dfc263cb6df28a4ff5cdd171659cc40df7290
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Aug 17 14:25:27 2018 +0800

    video/drm: display: add rockchip_of_find_connector function
    
    The connector node may not be a child of root node, make it more generic.
    
    Change-Id: I1a8a2176710579417f53953e6c1a813bf715f7a1
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 9d84120f44..66220f2038 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -1229,6 +1229,48 @@ void rockchip_show_logo(void)
 	}
 }
 
+static struct udevice *rockchip_of_find_connector(struct udevice *dev)
+{
+	ofnode conn_node, port, ep;
+	struct udevice *conn_dev;
+	int ret;
+
+	port = dev_read_subnode(dev, "port");
+	if (!ofnode_valid(port))
+		return NULL;
+
+	ofnode_for_each_subnode(ep, port) {
+		ofnode _ep, _port, _ports;
+		uint phandle;
+
+		if (ofnode_read_u32(ep, "remote-endpoint", &phandle))
+			continue;
+
+		_ep = ofnode_get_by_phandle(phandle);
+		if (!ofnode_valid(_ep) || !ofnode_is_available(_ep))
+			continue;
+
+		_port = ofnode_get_parent(_ep);
+		if (!ofnode_valid(_port))
+			continue;
+
+		_ports = ofnode_get_parent(_port);
+		if (!ofnode_valid(_ports))
+			continue;
+
+		conn_node = ofnode_get_parent(_ports);
+		if (!ofnode_valid(conn_node) || !ofnode_is_available(conn_node))
+			continue;
+
+		ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, conn_node,
+						  &conn_dev);
+		if (!ret)
+			return conn_dev;
+	}
+
+	return NULL;
+}
+
 static int rockchip_display_probe(struct udevice *dev)
 {
 	struct video_priv *uc_priv = dev_get_uclass_priv(dev);
@@ -1243,7 +1285,6 @@ static int rockchip_display_probe(struct udevice *dev)
 	int ret;
 	ofnode node, route_node;
 	struct device_node *port_node, *vop_node, *ep_node;
-	struct device_node *cnt_node, *p;
 	struct public_phy_data *data;
 
 	/* Before relocation we don't need to do anything */
@@ -1295,28 +1336,12 @@ static int rockchip_display_probe(struct udevice *dev)
 		}
 		crtc = (struct rockchip_crtc *)dev_get_driver_data(crtc_dev);
 
-		phandle = ofnode_read_u32_default(np_to_ofnode(ep_node),
-						  "remote-endpoint", -1);
-		cnt_node = of_find_node_by_phandle(phandle);
-		if (phandle < 0) {
-			printf("Warn: can't find remote-endpoint's handle\n");
-			continue;
-		}
-		while (cnt_node->parent){
-			p = of_get_parent(cnt_node);
-			if (!strcmp(p->full_name, "/"))
-				break;
-			cnt_node = p;
-		}
-		if (!of_device_is_available(cnt_node))
-			continue;
-		ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY,
-						  np_to_ofnode(cnt_node),
-						  &conn_dev);
-		if (ret) {
+		conn_dev = rockchip_of_find_connector(crtc_dev);
+		if (!conn_dev) {
 			printf("Warn: can't find connect driver\n");
 			continue;
 		}
+
 		conn = (const struct rockchip_connector *)dev_get_driver_data(conn_dev);
 
 		s = malloc(sizeof(*s));
@@ -1340,7 +1365,7 @@ static int rockchip_display_probe(struct udevice *dev)
 			s->charge_logo_mode = ROCKCHIP_DISPLAY_CENTER;
 
 		s->blob = blob;
-		s->conn_state.node = np_to_ofnode(cnt_node);
+		s->conn_state.node = conn_dev->node;
 		s->conn_state.dev = conn_dev;
 		s->conn_state.connector = conn;
 		s->conn_state.overscan.left_margin = 100;

commit e7ca7e39ee39e18448065e7f00e708262ecd3bdf
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Fri Feb 23 17:38:49 2018 +0100

    UPSTREAM: core: ofnode: add ofnode_get_parent function
    
    The Rockchip video drivers need to walk the ofnode-parrents to find
    an enclosing device that has a UCLASS_DISPLAY driver bound.  This
    adds a ofnode_get_parent()-function that returns the parent-node.
    
    Change-Id: I312236c966348aaa36ffc30e3f7dbc83d706fb36
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
    Reviewed-by: Anatolij Gustschin <agust@denx.de>
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
    (cherry picked from commit e2d5997ffdf5cbf4f7d53584dab2ffc673f50987)

diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index 59c8ff3014..44eb2bbb5f 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -165,6 +165,20 @@ ofnode ofnode_next_subnode(ofnode node)
 		fdt_next_subnode(gd->fdt_blob, ofnode_to_offset(node)));
 }
 
+ofnode ofnode_get_parent(ofnode node)
+{
+	ofnode parent;
+
+	assert(ofnode_valid(node));
+	if (ofnode_is_np(node))
+		parent = np_to_ofnode(of_get_parent(ofnode_to_np(node)));
+	else
+		parent.of_offset = fdt_parent_offset(gd->fdt_blob,
+						     ofnode_to_offset(node));
+
+	return parent;
+}
+
 const char *ofnode_get_name(ofnode node)
 {
 	if(!ofnode_valid(node)){
diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index b1681e256e..742d6028c5 100644
--- a/include/dm/ofnode.h
+++ b/include/dm/ofnode.h
@@ -301,6 +301,14 @@ ofnode ofnode_first_subnode(ofnode node);
  */
 ofnode ofnode_next_subnode(ofnode node);
 
+/**
+ * ofnode_get_parent() - get the ofnode's parent (enclosing ofnode)
+ *
+ * @node: valid node to look up
+ * @return ofnode reference of the parent node
+ */
+ofnode ofnode_get_parent(ofnode node);
+
 /**
  * ofnode_get_name() - get the name of a node
  *

commit 280f977d918bdcb425f6cb5946fc318c85f547af
Author: William Wu <william.wu@rock-chips.com>
Date:   Wed Aug 22 16:35:20 2018 +0800

    rockchip: rk3128: scan sub-nodes of the syscon node
    
    Change-Id: Id677e5615625abd25c987c899bf4906ee3aed05b
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3128/syscon_rk3128.c b/arch/arm/mach-rockchip/rk3128/syscon_rk3128.c
index 0b636390ac..6795ee2a21 100644
--- a/arch/arm/mach-rockchip/rk3128/syscon_rk3128.c
+++ b/arch/arm/mach-rockchip/rk3128/syscon_rk3128.c
@@ -17,5 +17,8 @@ static const struct udevice_id rk3128_syscon_ids[] = {
 U_BOOT_DRIVER(syscon_rk3128) = {
 	.name = "rk3128_syscon",
 	.id = UCLASS_SYSCON,
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	.bind = dm_scan_fdt_dev,
+#endif
 	.of_match = rk3128_syscon_ids,
 };

commit 123c920622cc462fd3a11abea7b9647b03f48497
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Aug 20 17:45:36 2018 +0800

    board_r: skip mmc init when CONFIG_USING_KERNEL_DTB is enabled
    
    When CONFIG_USING_KERNEL_DTB is enabled, mmc has been initialized earlier.
    
    Change-Id: If3d7374cbbd4e403d9627c44133bf5fd1aeb9af8
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/board_r.c b/common/board_r.c
index 1e5847dda3..cd79e97bae 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -424,8 +424,13 @@ static int initr_onenand(void)
 #ifdef CONFIG_MMC
 static int initr_mmc(void)
 {
+/*
+ * When CONFIG_USING_KERNEL_DTB is enabled, mmc has been initialized earlier.
+ */
+#ifndef CONFIG_USING_KERNEL_DTB
 	puts("MMC:   ");
 	mmc_initialize(gd->bd);
+#endif
 	return 0;
 }
 #endif

commit dd3941ee08b0186c68b6f6fbf098380282a36a95
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Aug 20 17:39:40 2018 +0800

    sdram: rk3128: use debug() for probe message
    
    Change-Id: Ifa8ff92d6741aaf83fbd48e96fbbb78cc744439d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram_rk3128.c b/drivers/ram/rockchip/sdram_rk3128.c
index 04ad2bbb8c..68b0830884 100644
--- a/drivers/ram/rockchip/sdram_rk3128.c
+++ b/drivers/ram/rockchip/sdram_rk3128.c
@@ -23,7 +23,7 @@ static int rk3128_dmc_probe(struct udevice *dev)
 	struct dram_info *priv = dev_get_priv(dev);
 
 	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	printf("%s: grf=%p\n", __func__, priv->grf);
+	debug("%s: grf=%p\n", __func__, priv->grf);
 	priv->info.base = CONFIG_SYS_SDRAM_BASE;
 	priv->info.size = rockchip_sdram_size(
 				(phys_addr_t)&priv->grf->os_reg[1]);

commit 062d7a0a07509bfd06288989b9bc66f9ee9f3970
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Aug 20 17:24:06 2018 +0800

    rockchip: rk3128: invoke board_debug_uart_init()
    
    we use uart2 by default.
    
    Change-Id: Ie7e53a57cc08a035184040657eb7a6010bc1c83f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3128/rk3128.c b/arch/arm/mach-rockchip/rk3128/rk3128.c
index 3e5f6f6a47..56c36af60c 100644
--- a/arch/arm/mach-rockchip/rk3128/rk3128.c
+++ b/arch/arm/mach-rockchip/rk3128/rk3128.c
@@ -5,6 +5,8 @@
  */
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
+#include <asm/arch/bootrom.h>
+#include <asm/arch/grf_rk3128.h>
 
 #define GRF_GPIO1C_IOMUX		0x200080c0
 #define SDMMC_INTMASK			0x10214024
@@ -40,4 +42,26 @@ int arch_cpu_init(void)
 
 void board_debug_uart_init(void)
 {
+	struct rk3128_grf * const grf __maybe_unused =
+		(struct rk3128_grf * const)0x20008000;
+
+	enum {
+		/* UART2 */
+		GPIO1C2_SHIFT		= 4,
+		GPIO1C2_MASK		= GENMASK(5, 4),
+		GPIO1C2_GPIO		= 0,
+		GPIO1C2_MMC0_D0		= 1,
+		GPIO1C2_UART2_TX	= 2,
+
+		GPIO1C3_SHIFT		= 6,
+		GPIO1C3_MASK		= GENMASK(7, 6),
+		GPIO1C3_GPIO		= 0,
+		GPIO1C2_MMC0_D1		= 1,
+		GPIO1C2_UART2_RX	= 2,
+	};
+
+	rk_clrsetreg(&grf->gpio1c_iomux,
+		     GPIO1C2_MASK, GPIO1C2_UART2_TX << GPIO1C2_SHIFT);
+	rk_clrsetreg(&grf->gpio1c_iomux,
+		     GPIO1C3_MASK, GPIO1C2_UART2_RX << GPIO1C3_SHIFT);
 }

commit 2d39b25158d48e71e93993c2a044039702cc3c69
Author: William Wu <william.wu@rock-chips.com>
Date:   Tue Aug 21 17:32:34 2018 +0800

    phy: phy-rockchip-inno-usb2: add support for rk3368
    
    This patch adds usb 2.0 phy otg-port and host-port
    configurations for rk3368.
    
    Change-Id: I1b5f6945a23449122f123cbf5aac22de2d803728
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index d42a889398..de1a74271a 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -728,6 +728,46 @@ static const struct rockchip_usb2phy_cfg rk3328_phy_cfgs[] = {
 	{ /* sentinel */ }
 };
 
+static const struct rockchip_usb2phy_cfg rk3368_phy_cfgs[] = {
+	{
+		.reg = 0x700,
+		.num_ports	= 2,
+		.clkout_ctl	= { 0x0724, 15, 15, 1, 0 },
+		.port_cfgs	= {
+			[USB2PHY_PORT_OTG] = {
+				.phy_sus	= { 0x0700, 8, 0, 0, 0x1d1 },
+				.bvalid_det_en	= { 0x0680, 3, 3, 0, 1 },
+				.bvalid_det_st	= { 0x0690, 3, 3, 0, 1 },
+				.bvalid_det_clr = { 0x06a0, 3, 3, 0, 1 },
+				.ls_det_en	= { 0x0680, 2, 2, 0, 1 },
+				.ls_det_st	= { 0x0690, 2, 2, 0, 1 },
+				.ls_det_clr	= { 0x06a0, 2, 2, 0, 1 },
+				.utmi_bvalid	= { 0x04bc, 23, 23, 0, 1 },
+				.utmi_ls	= { 0x04bc, 25, 24, 0, 1 },
+			},
+			[USB2PHY_PORT_HOST] = {
+				.phy_sus	= { 0x0728, 8, 0, 0, 0x1d1 },
+				.ls_det_en	= { 0x0680, 4, 4, 0, 1 },
+				.ls_det_st	= { 0x0690, 4, 4, 0, 1 },
+				.ls_det_clr	= { 0x06a0, 4, 4, 0, 1 }
+			}
+		},
+		.chg_det = {
+			.opmode		= { 0x0700, 3, 0, 5, 1 },
+			.cp_det		= { 0x04b8, 30, 30, 0, 1 },
+			.dcp_det	= { 0x04b8, 29, 29, 0, 1 },
+			.dp_det		= { 0x04b8, 31, 31, 0, 1 },
+			.idm_sink_en	= { 0x0718, 8, 8, 0, 1 },
+			.idp_sink_en	= { 0x0718, 7, 7, 0, 1 },
+			.idp_src_en	= { 0x0718, 9, 9, 0, 1 },
+			.rdm_pdwn_en	= { 0x0718, 10, 10, 0, 1 },
+			.vdm_src_en	= { 0x0718, 12, 12, 0, 1 },
+			.vdp_src_en	= { 0x0718, 11, 11, 0, 1 },
+		},
+	},
+	{ /* sentinel */ }
+};
+
 static const struct rockchip_usb2phy_cfg rv1108_phy_cfgs[] = {
 	{
 		.reg = 0x100,
@@ -775,6 +815,7 @@ static const struct udevice_id rockchip_usb2phy_ids[] = {
 	{ .compatible = "rockchip,rk322x-usb2phy", .data = (ulong)&rk322x_phy_cfgs },
 	{ .compatible = "rockchip,rk3308-usb2phy", .data = (ulong)&rk3328_phy_cfgs },
 	{ .compatible = "rockchip,rk3328-usb2phy", .data = (ulong)&rk3328_phy_cfgs },
+	{ .compatible = "rockchip,rk3368-usb2phy", .data = (ulong)&rk3368_phy_cfgs },
 	{ .compatible = "rockchip,rv1108-usb2phy", .data = (ulong)&rv1108_phy_cfgs },
 	{ }
 };

commit 6f0347c8c395a251ecf0aa94cf0d0971bacb5119
Author: tony.xu <tony.xu@rock-chips.com>
Date:   Wed Aug 15 15:07:23 2018 +0800

    usb: gadget: rockusb: write keybox to RPMB
    
    invoke function:
    write_keybox_to_secure_storage(uint8_t *uboot_data, uint32_t len).
    it only work when the chip support OPTEE_V1
    
    Change-Id: If010b7cab6bab87485d9542af8c04544d27162cc
    Signed-off-by: tony.xu <tony.xu@rock-chips.com>

diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index cbf2f743f3..29a81bd45b 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -8,6 +8,7 @@
 #include <asm/io.h>
 #include <asm/arch/boot_mode.h>
 #include <asm/arch/chip_info.h>
+#include <optee_include/OpteeClientInterface.h>
 
 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
 #include <asm/arch/vendor.h>
@@ -352,6 +353,13 @@ static int rkusb_do_vs_write(struct fsg_common *common)
 					return -EIO;
 			} else {
 				/* RPMB */
+#ifdef CONFIG_OPTEE_V1
+				rc =
+				write_keybox_to_secure_storage((u8 *)data,
+							       vhead->size);
+				if (!rc)
+					return -EIO;
+#endif
 			}
 
 			common->residue -= common->data_size;

commit 1c2bd90493d62c7802b621802ddbcf5126c72208
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Aug 20 09:13:29 2018 +0800

    rockchip: resource: fix read dtb by gpio hw id failed
    
    - every bank is 8 pins, i.e. A0~A7, B0~B7, ...;
    - add more quote for "cached_v[]";
    
    Change-Id: I0e6a3ec5e66b95074894c893acd767ce83d34fec
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 39987927bc..e871649178 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -420,7 +420,13 @@ static int rockchip_read_dtb_by_adc(const char *file_name)
 			return -EINVAL;
 		}
 
-		/* Read raw adc value */
+		/*
+		 * Read raw adc value
+		 *
+		 * It doesn't need to read adc value every loop, reading once
+		 * is enough. We use cached_v[] to save what we have read, zero
+		 * means not read before.
+		 */
 		if (cached_v[channel] == 0) {
 			ret = adc_channel_single_shot(dev_name,
 						      channel, &raw_adc);
@@ -542,12 +548,17 @@ static int rockchip_read_dtb_by_gpio(const char *file_name)
 		pin  = *(p + 2) - '0';
 		lvl  = *(p + 4) - '0';
 
+		/*
+		 * It doesn't need to read gpio value every loop, reading once
+		 * is enough. We use cached_v[] to save what we have read, zero
+		 * means not read before.
+		 */
 		if (cached_v[port] == 0)
 			cached_v[port] =
 				readl(gpio_base_addr[port] + GPIO_EXT_PORT);
 
 		/* Verify result */
-		bit = bank * 32 + pin;
+		bit = bank * 8 + pin;
 		val = cached_v[port] & (1 << bit) ? 1 : 0;
 
 		if (val == !!lvl) {

commit b5359c85d58b789e0cde080d9c06685bae3b82f4
Author: tony.xu <tony.xu@rock-chips.com>
Date:   Fri Aug 17 10:33:50 2018 +0800

    include: optee_include: add declarations for write_keybox_to_secure_storage
    
    Change-Id: I78349eaf54ee32e06e34b89f333e4b89db1008fd
    Signed-off-by: tony.xu <tony.xu@rock-chips.com>

diff --git a/include/optee_include/OpteeClientInterface.h b/include/optee_include/OpteeClientInterface.h
index 93470d3004..fb859d6924 100644
--- a/include/optee_include/OpteeClientInterface.h
+++ b/include/optee_include/OpteeClientInterface.h
@@ -40,6 +40,7 @@ TEEC_Result read_from_keymaster
 uint32_t write_to_keymaster
 	(uint8_t *filename, uint32_t filename_size,
 	uint8_t *data, uint32_t data_size);
+int write_keybox_to_secure_storage(uint8_t *uboot_data, uint32_t len);
 uint32_t trusty_read_attribute_hash(uint32_t *buf, uint32_t length);
 uint32_t trusty_write_attribute_hash(uint32_t *buf, uint32_t length);
 uint32_t trusty_notify_optee_uboot_end(void);

commit 90d27e7fed2179754609c54e4a41618a7a980a9f
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Mar 5 22:26:43 2018 +0800

    fastboot: split cb_getvar into dedicate functions
    
    The old implementation of cb_getvar is programed in one functions, this
    make the cb_getvar huge. So separate cb_getvar in several functions.
    
    Functions:
    fb_getvar_all: Get all parameters by cmd fastboot
                   getvar all.
    fb_getvar_single: Get one parameter by cmd fastboot
                      getvar xxx.
    fb_read_var: Parse parameters
    
    Change-Id: I1e795228f8129af82702f8f315cbad349ceec451
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
old mode 100755
new mode 100644
index 99d62a650f..9ec9d2bbd3
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -52,6 +52,9 @@
 
 #define EP_BUFFER_SIZE			4096
 #define SLEEP_COUNT 20000
+#define MAX_PART_NUM_STR_SIZE 4
+#define PARTITION_TYPE_STRINGS "partition-type"
+
 /*
  * EP_BUFFER_SIZE must always be an integral multiple of maxpacket size
  * (64 or 512 or 1024), else we break on certain controllers like DWC3
@@ -199,6 +202,22 @@ static void busy_indicator(void)
 		state = 0;
 }
 
+static int fb_get_fstype(const char *ifname, const int part_num,
+			 const char **fs_type)
+{
+	char part_num_str[MAX_PART_NUM_STR_SIZE] = {0};
+
+	snprintf(part_num_str, ARRAY_SIZE(part_num_str), ":%x", part_num);
+
+	if (fs_set_blk_dev(ifname, part_num_str, FS_TYPE_ANY))
+		return -1;
+
+	if (fs_get_fstype(fs_type))
+		return -1;
+
+	return 0;
+}
+
 static int sleep_thread(void)
 {
 	int rc = 0;
@@ -474,116 +493,282 @@ static int strcmp_l1(const char *s1, const char *s2)
 	return strncmp(s1, s2, strlen(s1));
 }
 
-static void cb_getvar(struct usb_ep *ep, struct usb_request *req)
+struct name_string {
+	const char *str;
+	int expects_args;
+	char delim;
+};
+
+#define NAME_NO_ARGS(s)	{.str = s, .expects_args = 0}
+#define NAME_ARGS(s, d)	{.str = s, .expects_args = 1, .delim = d}
+
+static size_t name_check_match(const char *str, size_t len,
+			       const struct name_string *name)
 {
-	char *cmd = req->buf;
-	char response[FASTBOOT_RESPONSE_LEN];
-	const char *s;
-	size_t chars_left;
+	size_t str_len = strlen(name->str);
 
-	strcpy(response, "OKAY");
-	chars_left = sizeof(response) - strlen(response) - 1;
+	/* If name len is greater than input, return 0. */
+	if (str_len > len)
+		return 0;
 
-	strsep(&cmd, ":");
-	if (!cmd) {
-		pr_err("missing variable");
-		fastboot_tx_write_str("FAILmissing var");
-		return;
+	/* If name str does not match input string, return 0. */
+	if (memcmp(name->str, str, str_len))
+		return 0;
+
+	if (name->expects_args) {
+		/* string should have space for delim */
+		if (len == str_len)
+			return 0;
+
+		/* Check delim match */
+		if (name->delim != str[str_len])
+			return 0;
+	} else {
+		/* Name str len should match input len */
+		if (str_len != len)
+			return 0;
 	}
 
-	if (!strcmp_l1("version", cmd)) {
-		strncat(response, FASTBOOT_VERSION, chars_left);
-	} else if (!strcmp_l1("bootloader-version", cmd)) {
-		strncat(response, U_BOOT_VERSION, chars_left);
-	} else if (!strcmp_l1("product", cmd)) {
-		strncat(response, CONFIG_SYS_BOARD, chars_left);
-	} else if (!strcmp_l1("variant", cmd)) {
-		strncat(response, "userdebug", chars_left);
-	} else if (!strcmp_l1("secure", cmd)) {
-		strncat(response, "no", chars_left);
-	} else if (!strcmp_l1("unlocked", cmd)) {
-		strncat(response, "yes", chars_left);
-	} else if (!strcmp_l1("off-mode-charge", cmd)) {
-		strncat(response, "0", chars_left);
-	} else if (!strcmp_l1("battery-voltage", cmd)) {
-		strncat(response, "7.4", chars_left);
-	} else if (!strcmp_l1("battery-soc-ok", cmd)) {
-		strncat(response, "yes", chars_left);
-	} else if (!strcmp_l1("downloadsize", cmd) ||
-		!strcmp_l1("max-download-size", cmd)) {
-		char str_num[12];
-
-		sprintf(str_num, "0x%08x", CONFIG_FASTBOOT_BUF_SIZE);
-		strncat(response, str_num, chars_left);
-	} else if (!strcmp_l1("serialno", cmd)) {
+	return str_len + name->expects_args;
+}
+
+static void fb_add_string(char *dst, size_t chars_left,
+			  const char *str, const char *args)
+{
+	if (!str)
+		return;
+
+	int ret = snprintf(dst, chars_left, str, args);
+
+	if (ret < 0)
+		pr_err("snprintf is error!");
+}
+
+static void fb_add_number(char *dst, size_t chars_left,
+			  const char *format, size_t num)
+{
+	if (!format)
+		return;
+
+	int ret = snprintf(dst, chars_left, format, num);
+
+	if (ret > chars_left)
+		pr_err("snprintf is error!");
+}
+
+static int fb_read_var(char *cmd, char *response,
+		       fb_getvar_t var, size_t chars_left)
+{
+	const char *s;
+	int ret = 0;
+
+	switch (var) {
+	case FB_VERSION:
+		fb_add_string(response, chars_left, FASTBOOT_VERSION, NULL);
+		break;
+	case FB_BOOTLOADER_VERSION:
+		fb_add_string(response, chars_left, U_BOOT_VERSION, NULL);
+		break;
+	case FB_BASEBAND_VERSION:
+		fb_add_string(response, chars_left, "N/A", NULL);
+		break;
+	case FB_PRODUCT:
+		fb_add_string(response, chars_left, CONFIG_SYS_BOARD, NULL);
+		break;
+	case FB_SERIAL_NO:
 		s = env_get("serial#");
 		if (s)
-			strncat(response, s, chars_left);
-		else
-			strcpy(response, "FAILValue not set");
-	} else if (strncmp("at-attest-dh", cmd, 12) == 0) {
-#ifdef CONFIG_OPTEE_CLIENT
-		char dhbuf[8];
-		uint32_t dh_len = 8;
-		uint32_t res = trusty_attest_dh((uint8_t *)dhbuf, &dh_len);
-		if (res)
-			strcpy(response, "FAILdh not set");
+			fb_add_string(response, chars_left, s, NULL);
 		else
-			strncat(response, dhbuf, chars_left);
+			ret = -1;
+		break;
+	case FB_SECURE:
+		fb_add_string(response, chars_left, "yes", NULL);
+		break;
+	case FB_VARIANT:
+		fb_add_string(response, chars_left, "userdebug", NULL);
+		break;
+	case FB_DWNLD_SIZE:
+		fb_add_number(response, chars_left, "0x%08x",
+			      CONFIG_FASTBOOT_BUF_SIZE);
+		break;
+	case FB_PART_SIZE:
+	case FB_PART_TYPE: {
+		char *part_name = cmd;
+
+		cmd = strsep(&part_name, ":");
+		if (!cmd || !part_name) {
+			fb_add_string(response, chars_left,
+				      "argument Invalid!", NULL);
+			ret = -1;
+			break;
+		}
+
+#ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV
+		disk_partition_t part_info;
+		struct blk_desc *dev_desc;
+		int part_num = -1;
+		const char *fs_type = NULL;
+
+#ifdef CONFIG_RKIMG_BOOTLOADER
+		dev_desc = rockchip_get_bootdev();
 #else
-		fastboot_tx_write_str("FAILnot implemented");
-		return;
+		dev_desc = NULL;
 #endif
-	} else if (strncmp("at-attest-uuid", cmd, 14) == 0) {
-#ifdef CONFIG_OPTEE_CLIENT
-		char uuid[32] = {0};
-		uint32_t uuid_len = 32;
-		uint32_t res = trusty_attest_uuid((uint8_t *)uuid, &uuid_len);
-		if (res)
-			strcpy(response, "FAILuuid not set");
-		else
-			strncat(response, uuid, chars_left);
+		if (!dev_desc) {
+			fb_add_string(response, chars_left,
+				      "block device not found", NULL);
+			ret = -1;
+			break;
+		}
+
+		part_num = part_get_info_by_name(dev_desc, part_name,
+						 &part_info);
+		if (part_num < 0) {
+			fb_add_string(response, chars_left,
+				      "partition not found", NULL);
+			ret = -1;
+		} else if (!strncmp(PARTITION_TYPE_STRINGS, cmd,
+					strlen(PARTITION_TYPE_STRINGS))) {
+			if (fb_get_fstype("mmc", part_num, &fs_type)) {
+				fb_add_string(response, chars_left,
+					      (char *)part_info.type, NULL);
+			} else {
+				fb_add_string(response, chars_left,
+					      fs_type, NULL);
+			}
+		} else if (!strncmp("partition-size", cmd, 14)) {
+			u64 part_size;
+
+			part_size = (uint64_t)part_info.size;
+			snprintf(response, chars_left, "0x%llx",
+				 part_size * dev_desc->blksz);
+		}
 #else
-		fastboot_tx_write_str("FAILnot implemented");
-		return;
+		fb_add_string(response, chars_left, "not implemented", NULL);
+		ret = -1;
 #endif
-	} else if (strncmp("at-vboot-state", cmd, 14) == 0) {
-		char uuid[32] = {0};
+		break;
+	}
+	case FB_BLK_SIZE: {
+#ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV
+		struct blk_desc *dev_desc;
 
-		strncat(response, uuid, chars_left);
-	} else if (!strcmp_l1("slot-count", cmd)) {
-#ifdef CONFIG_RK_AVB_LIBAVB_USER
-		char slot_count[2];
-		char temp;
+#ifdef CONFIG_RKIMG_BOOTLOADER
+		dev_desc = rockchip_get_bootdev();
+#else
+		dev_desc = NULL;
+#endif
+		if (!dev_desc) {
+			fb_add_string(response, chars_left,
+				      "block device not found", NULL);
+			ret = -1;
+		} else {
+			fb_add_number(response, chars_left,
+				      "0x%lx", dev_desc->blksz);
+		}
+#else
+		fb_add_string(response, chars_left, "not implemented", NULL);
+		ret = -1;
+#endif
+		break;
+	}
+	case FB_ERASE_SIZE: {
+#ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV
+		lbaint_t erase_grp_size;
 
-		slot_count[1] = '\0';
-		rk_avb_read_slot_count(&temp);
-		slot_count[0] = temp + 0x30;
-		strncat(response, slot_count, chars_left);
+		erase_grp_size = fb_mmc_get_erase_grp_size();
+		if (erase_grp_size < 0) {
+			fb_add_string(response, chars_left,
+				      "block device not found", NULL);
+			ret = -1;
+		} else {
+			fb_add_number(response, chars_left, "0x"LBAF"",
+				      erase_grp_size);
+		}
 #else
-		fastboot_tx_write_str("FAILnot implemented");
-		return;
+		fb_add_string(response, chars_left, "not implemented", NULL);
+		ret = -1;
 #endif
-	} else if (!strcmp_l1("current-slot", cmd)) {
+		break;
+	}
+	case FB_UNLOCKED: {
 #ifdef CONFIG_RK_AVB_LIBAVB_USER
-		char slot_surrent[8] = {0};
+		uint8_t flash_lock_state = 0;
 
-		if (!rk_avb_get_current_slot(slot_surrent))
-			strncat(response, slot_surrent+1, chars_left);
+		if (rk_avb_read_flash_lock_state(&flash_lock_state))
+			fb_add_string(response, chars_left, "yes", NULL);
 		else
-			strcpy(response, "FAILgeterror");
+			fb_add_string(response, chars_left, "no", NULL);
 #else
-		fastboot_tx_write_str("FAILnot implemented");
-		return;
+		fb_add_string(response, chars_left, "not implemented", NULL);
+		ret = -1;
 #endif
-	} else if (!strcmp_l1("slot-suffixes", cmd)) {
+		break;
+	}
+	case  FB_OFF_MODE_CHARGE: {
+		fb_add_string(response, chars_left, "not implemented", NULL);
+		break;
+	}
+	case FB_BATT_VOLTAGE: {
+		fb_add_string(response, chars_left, "not implemented", NULL);
+		break;
+	}
+	case FB_BATT_SOC_OK: {
+		fb_add_string(response, chars_left, "no", NULL);
+		break;
+	}
 #ifdef CONFIG_RK_AVB_LIBAVB_USER
-		char slot_suffixes_temp[4];
-		char slot_suffixes[9];
+	case FB_HAS_COUNT: {
+		char slot_count[2];
+		char temp;
+
+		slot_count[1] = '\0';
+		if (rk_avb_read_slot_count(&temp) < 0) {
+			fb_add_number(response, chars_left, "%d", 0);
+			ret = -1;
+			break;
+		}
+		slot_count[0] = temp + 0x30;
+		fb_add_string(response, chars_left, slot_count, NULL);
+		break;
+	}
+	case FB_HAS_SLOT: {
+		char *part_name = cmd;
+		int has_slot = -1;
+
+		cmd = strsep(&part_name, ":");
+		if (!cmd || !part_name) {
+			fb_add_string(response, chars_left,
+				      "argument Invalid!", NULL);
+			ret = -1;
+			break;
+		}
+
+		has_slot = rk_avb_get_part_has_slot_info(part_name);
+		if (has_slot < 0)
+			fb_add_string(response, chars_left, "no", NULL);
+		else
+			fb_add_string(response, chars_left, "yes", NULL);
+		break;
+	}
+	case FB_CURR_SLOT: {
+		char slot_surrent[8] = {0};
+
+		if (!rk_avb_get_current_slot(slot_surrent)) {
+			fb_add_string(response, chars_left,
+				      slot_surrent + 1, NULL);
+		} else {
+			fb_add_string(response, chars_left, "get error", NULL);
+			ret = -1;
+		}
+		break;
+	}
+	case FB_SLOT_SUFFIXES: {
+		char slot_suffixes_temp[4] = {0};
+		char slot_suffixes[9] = {0};
 		int slot_cnt = 0;
 
-		memset(slot_suffixes_temp, 0, 4);
-		memset(slot_suffixes, 0, 9);
 		rk_avb_read_slot_suffixes(slot_suffixes_temp);
 		while (slot_suffixes_temp[slot_cnt] != '\0') {
 			slot_suffixes[slot_cnt * 2]
@@ -591,150 +776,568 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req)
 			slot_suffixes[slot_cnt * 2 + 1] = ',';
 			slot_cnt++;
 		}
-		strncat(response, slot_suffixes, chars_left);
-#else
-		fastboot_tx_write_str("FAILnot implemented");
-		return;
-#endif
-	} else if (!strncmp("has-slot", cmd, 8)) {
-#ifdef CONFIG_RK_AVB_LIBAVB_USER
-		char *part_name = cmd;
 
-		cmd = strsep(&part_name, ":");
-		if (!strcmp(part_name, "boot") ||
-		    !strcmp(part_name, "system") ||
-		    !strcmp(part_name, "vendor") ||
-		    !strcmp(part_name, "vbmeta") ||
-		    !strcmp(part_name, "oem")) {
-			strncat(response, "yes", chars_left);
-		} else {
-			strcpy(response, "FAILno");
-		}
-#else
-		fastboot_tx_write_str("FAILnot implemented");
-		return;
-#endif
-	} else if (!strncmp("slot-unbootable", cmd, 15)) {
-#ifdef CONFIG_RK_AVB_LIBAVB_USER
+		slot_suffixes[(slot_cnt - 1) * 2 + 1] = '\0';
+		fb_add_string(response, chars_left, slot_suffixes, NULL);
+		break;
+	}
+	case FB_SLOT_SUCCESSFUL:{
 		char *slot_name = cmd;
+		AvbABData ab_info;
 
 		cmd = strsep(&slot_name, ":");
-		if (!strcmp(slot_name, "a") ||
-		    !strcmp(slot_name, "b")) {
-			strncat(response, "no", chars_left);
+		if (!cmd || !slot_name) {
+			fb_add_string(response, chars_left,
+				      "argument Invalid!", NULL);
+			ret = -1;
+			break;
+		}
+
+		if (rk_avb_get_ab_info(&ab_info) < 0) {
+			fb_add_string(response, chars_left,
+				      "get ab info failed!", NULL);
+			ret = -1;
+			break;
+		}
+
+		if (!strcmp(slot_name, "a")) {
+			if (ab_info.slots[0].successful_boot)
+				fb_add_string(response, chars_left,
+					      "yes", NULL);
+			else
+				fb_add_string(response, chars_left,
+					      "no", NULL);
+		} else if (!strcmp(slot_name, "b")) {
+			if (ab_info.slots[1].successful_boot)
+				fb_add_string(response, chars_left,
+					      "yes", NULL);
+			else
+				fb_add_string(response, chars_left,
+					      "no", NULL);
 		} else {
-			strcpy(response, "FAILno");
+			fb_add_string(response, chars_left, "no", NULL);
 		}
-#else
-		fastboot_tx_write_str("FAILnot implemented");
-		return;
-#endif
-	} else if (!strncmp("slot-successful", cmd, 15)) {
-#ifdef CONFIG_RK_AVB_LIBAVB_USER
+		break;
+	}
+	case FB_SLOT_UNBOOTABLE: {
 		char *slot_name = cmd;
+		AvbABData ab_info;
 
 		cmd = strsep(&slot_name, ":");
-		if (!strcmp(slot_name, "a") ||
-		    !strcmp(slot_name, "b")) {
-			strncat(response, "no", chars_left);
+
+		if (!cmd || !slot_name) {
+			fb_add_string(response, chars_left,
+				      "argument Invalid!", NULL);
+			ret = -1;
+			break;
+		}
+
+		if (rk_avb_get_ab_info(&ab_info) < 0) {
+			fb_add_string(response, chars_left,
+				      "get ab info failed!", NULL);
+			ret = -1;
+			break;
+		}
+
+		if (!strcmp(slot_name, "a")) {
+			if (!ab_info.slots[0].successful_boot &&
+			    !ab_info.slots[0].tries_remaining &&
+			    !ab_info.slots[0].priority)
+				fb_add_string(response, chars_left,
+					      "yes", NULL);
+			else
+				fb_add_string(response, chars_left, "no", NULL);
+		} else if (!strcmp(slot_name, "b")) {
+			if (!ab_info.slots[1].successful_boot &&
+			    !ab_info.slots[1].tries_remaining &&
+			    !ab_info.slots[1].priority)
+				fb_add_string(response, chars_left,
+					      "yes", NULL);
+			else
+				fb_add_string(response, chars_left, "no", NULL);
 		} else {
-			strcpy(response, "FAILno");
+			fb_add_string(response, chars_left, "no", NULL);
 		}
-#else
-		fastboot_tx_write_str("FAILnot implemented");
-		return;
-#endif
-	} else if (!strncmp("slot-retry-count", cmd, 16)) {
-#ifdef CONFIG_RK_AVB_LIBAVB_USER
+		break;
+	}
+	case FB_SLOT_RETRY_COUNT: {
 		char *slot_name = cmd;
-		char count[10] = {0};
-		static int cnt[2] = {0};
+		AvbABData ab_info;
 
 		cmd = strsep(&slot_name, ":");
+		if (!cmd || !slot_name) {
+			fb_add_string(response, chars_left,
+				      "argument Invalid!", NULL);
+			ret = -1;
+			break;
+		}
+
+		if (rk_avb_get_ab_info(&ab_info) < 0) {
+			fb_add_string(response, chars_left,
+				      "get ab info failed!", NULL);
+			ret = -1;
+			break;
+		}
+
 		if (!strcmp(slot_name, "a")) {
-			sprintf(count, "%c", 0x30+cnt[0]);
-			strncat(response, count, chars_left);
-			if (cnt[0] > 0)
-				cnt[0]--;
+			fb_add_number(response, chars_left,
+				      "%d", ab_info.slots[0].tries_remaining);
 		} else if (!strcmp(slot_name, "b")) {
-			sprintf(count, "%c", 0x30+cnt[1]);
-			strncat(response, count, chars_left);
-			if (cnt[1] > 0)
-				cnt[1]--;
+			fb_add_number(response, chars_left, "%d",
+				      ab_info.slots[1].tries_remaining);
+
 		} else {
 			strcpy(response, "FAILno");
 		}
+		break;
+	}
+	case FB_AT_VBST: {
+		char vbst[VBOOT_STATE_SIZE] = {0};
+		char *p_vbst;
+
+		strcpy(response, "INFO");
+		rk_avb_get_at_vboot_state(vbst);
+		p_vbst = vbst;
+		do {
+			cmd = strsep(&p_vbst, "\n");
+			if (strlen(cmd) > 0) {
+				memcpy(&response[4], cmd, chars_left);
+				fastboot_tx_write_str(response);
+			}
+		} while (strlen(cmd));
+		break;
+	}
+#endif
+#ifdef CONFIG_OPTEE_CLIENT
+	case FB_AT_DH: {
+		char dhbuf[ATTEST_DH_SIZE];
+		uint32_t dh_len = ATTEST_DH_SIZE;
+		uint32_t res = trusty_attest_dh((uint8_t *)dhbuf, &dh_len);
+
+		if (res) {
+			fb_add_string(response, chars_left, "dh not set", NULL);
+			ret = -1;
+		} else {
+			fb_add_string(response, chars_left, dhbuf, NULL);
+		}
+		break;
+	}
+	case FB_AT_UUID: {
+		char uuid[ATTEST_UUID_SIZE] = {0};
+		uint32_t uuid_len = ATTEST_UUID_SIZE;
+		uint32_t res = trusty_attest_uuid((uint8_t *)uuid, &uuid_len);
+
+		uuid[ATTEST_UUID_SIZE - 1] = 0;
+		if (res) {
+			fb_add_string(response, chars_left, "dh not set", NULL);
+			ret = -1;
+		} else {
+			fb_add_string(response, chars_left, uuid, NULL);
+		}
+		break;
+	}
+#endif
+	default: {
+			char *envstr;
+
+			envstr = malloc(strlen("fastboot.") + strlen(cmd) + 1);
+			if (!envstr) {
+				fb_add_string(response, chars_left,
+					      "malloc error", NULL);
+				ret = -1;
+				break;
+			}
+
+			sprintf(envstr, "fastboot.%s", cmd);
+			s = env_get(envstr);
+			if (s) {
+				strncat(response, s, chars_left);
+			} else {
+				printf("WARNING: unknown variable: %s\n", cmd);
+				fb_add_string(response, chars_left,
+					      "not implemented", NULL);
+			}
+
+			free(envstr);
+			break;
+		}
+	}
+
+	return ret;
+}
+
+static const struct {
+	/*
+	 *any changes to this array require an update to the corresponding
+	 *enum in fastboot.h
+	 */
+	struct name_string name;
+	fb_getvar_t var;
+} getvar_table[] = {
+	{ NAME_NO_ARGS("version"), FB_VERSION},
+	{ NAME_NO_ARGS("version-bootloader"), FB_BOOTLOADER_VERSION},
+	{ NAME_NO_ARGS("version-baseband"), FB_BASEBAND_VERSION},
+	{ NAME_NO_ARGS("product"), FB_PRODUCT},
+	{ NAME_NO_ARGS("serialno"), FB_SERIAL_NO},
+	{ NAME_NO_ARGS("secure"), FB_SECURE},
+	{ NAME_NO_ARGS("max-download-size"), FB_DWNLD_SIZE},
+	{ NAME_NO_ARGS("logical-block-size"), FB_BLK_SIZE},
+	{ NAME_NO_ARGS("erase-block-size"), FB_ERASE_SIZE},
+	{ NAME_ARGS("partition-type", ':'), FB_PART_TYPE},
+	{ NAME_ARGS("partition-size", ':'), FB_PART_SIZE},
+	{ NAME_NO_ARGS("unlocked"), FB_UNLOCKED},
+	{ NAME_NO_ARGS("off-mode-charge"), FB_OFF_MODE_CHARGE},
+	{ NAME_NO_ARGS("battery-voltage"), FB_BATT_VOLTAGE},
+	{ NAME_NO_ARGS("variant"), FB_VARIANT},
+	{ NAME_NO_ARGS("battery-soc-ok"), FB_BATT_SOC_OK},
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
+	/* Slots related */
+	{ NAME_NO_ARGS("slot-count"), FB_HAS_COUNT},
+	{ NAME_ARGS("has-slot", ':'), FB_HAS_SLOT},
+	{ NAME_NO_ARGS("current-slot"), FB_CURR_SLOT},
+	{ NAME_NO_ARGS("slot-suffixes"), FB_SLOT_SUFFIXES},
+	{ NAME_ARGS("slot-successful", ':'), FB_SLOT_SUCCESSFUL},
+	{ NAME_ARGS("slot-unbootable", ':'), FB_SLOT_UNBOOTABLE},
+	{ NAME_ARGS("slot-retry-count", ':'), FB_SLOT_RETRY_COUNT},
+	{ NAME_NO_ARGS("at-vboot-state"), FB_AT_VBST},
+#endif
+	/*
+	 * OEM specific :
+	 * Spec says names starting with lowercase letter are reserved.
+	 */
+#ifdef CONFIG_OPTEE_CLIENT
+	{ NAME_NO_ARGS("at-attest-dh"), FB_AT_DH},
+	{ NAME_NO_ARGS("at-attest-uuid"), FB_AT_UUID},
+#endif
+};
+
+static int fb_getvar_single(char *cmd, char *response, size_t chars_left)
+{
+	int i;
+	size_t match_len = 0;
+	size_t len = strlen(cmd);
+
+	for (i = 0; i < ARRAY_SIZE(getvar_table); i++) {
+		match_len = name_check_match(cmd, len, &getvar_table[i].name);
+		if (match_len)
+			break;
+	}
+
+	if (match_len == 0) {
+		fb_add_string(response, chars_left, "unknown variable", NULL);
+		return -1;
+	}
+
+	if (fb_read_var(cmd, response, getvar_table[i].var, chars_left) < 0)
+		return -1;
+
+	return 0;
+}
+
+static void fb_getvar_all(void)
+{
+	char response[FASTBOOT_RESPONSE_LEN] = {0};
+	char resp_tmp[FASTBOOT_RESPONSE_LEN] = {0};
+	char *actual_resp;
+	size_t chars_left;
+	int i, p;
+	disk_partition_t part_info;
+	struct blk_desc *dev_desc;
+
+	strcpy(response, "INFO");
+	chars_left = sizeof(response) - strlen(response) - 1;
+	actual_resp = response + strlen(response);
+
+	for (i = 0; i < ARRAY_SIZE(getvar_table); i++) {
+		fb_getvar_t var = getvar_table[i].var;
+
+		switch (var) {
+		case FB_PART_TYPE:
+		case FB_PART_SIZE: {
+			const char *fs_type = NULL;
+#ifdef CONFIG_RKIMG_BOOTLOADER
+			dev_desc = rockchip_get_bootdev();
 #else
-		fastboot_tx_write_str("FAILnot implemented");
-		return;
+			dev_desc = NULL;
 #endif
-	} else if (!strncmp("partition-type", cmd, 14) ||
-		   !strncmp("partition-size", cmd, 14)) {
-		disk_partition_t part_info;
-		struct blk_desc *dev_desc;
-		char *part_name = cmd;
-		char part_size_str[20];
+			if (!dev_desc) {
+				fb_add_string(actual_resp, chars_left,
+					      "%s:block device not found",
+					      getvar_table[i].name.str);
+				fastboot_tx_write_str(response);
+				break;
+			}
 
-		cmd = strsep(&part_name, ":");
-		dev_desc = blk_get_dev("mmc", 0);
-		if (!dev_desc) {
-			strcpy(response, "FAILblock device not found");
-		} else if (part_get_info_by_name(dev_desc, part_name, &part_info) < 0) {
-			strcpy(response, "FAILpartition not found");
-		} else if (!strncmp("partition-type", cmd, 14)) {
-			strncat(response, (char *)part_info.type, chars_left);
-		} else if (!strncmp("partition-size", cmd, 14)) {
-			sprintf(part_size_str, "0x%016x", (int)part_info.size);
-			strncat(response, part_size_str, chars_left);
+			for (p = 1; p <= MAX_SEARCH_PARTITIONS; p++) {
+				if (part_get_info(dev_desc, p,
+						  &part_info) < 0) {
+					break;
+				}
+
+				if (var == FB_PART_TYPE) {
+					fs_type = NULL;
+					if (fb_get_fstype("mmc", p,
+							  &fs_type)) {
+						fb_add_string(
+							resp_tmp,
+							FASTBOOT_RESPONSE_LEN,
+							(char *)part_info.type,
+							NULL);
+					} else {
+						fb_add_string(
+							resp_tmp,
+							FASTBOOT_RESPONSE_LEN,
+							fs_type,
+							NULL);
+					}
+
+					snprintf(actual_resp,
+						 chars_left,
+						 "%s:%s:%s",
+						 getvar_table[i].name.str,
+						 part_info.name,
+						 resp_tmp);
+				} else {
+					uint64_t part_size;
+
+					part_size = (uint64_t)part_info.size;
+					snprintf(actual_resp,
+						 chars_left,
+						 "%s:%s:0x%llx",
+						 getvar_table[i].name.str,
+						 part_info.name,
+						 part_size * dev_desc->blksz);
+				}
+				fastboot_tx_write_str(response);
+			}
+			break;
 		}
-	} else if (!strncmp("oem-unlock", cmd, 10)) {
-#ifdef CONFIG_FASTBOOT_OEM_UNLOCK
 #ifdef CONFIG_RK_AVB_LIBAVB_USER
-		fastboot_tx_write_str("FAILnot implemented");
-		return;
+		case FB_HAS_SLOT: {
+			uchar *ptr_name_tmp;
+			char c = '_';
+			int has_slot = -1;
+
+#ifdef CONFIG_RKIMG_BOOTLOADER
+			dev_desc = rockchip_get_bootdev();
 #else
+			dev_desc = NULL;
+#endif
+			if (!dev_desc) {
+				fb_add_string(actual_resp, chars_left,
+					      "%s:block device not found",
+					      getvar_table[i].name.str);
+				fastboot_tx_write_str(response);
+				break;
+			}
 
-		char msg[50] = {0};
-		uint8_t unlock = 0;
-		TEEC_Result result;
+			for (p = 1; p <= MAX_SEARCH_PARTITIONS; p++) {
+				if (part_get_info(dev_desc, p,
+						  &part_info) < 0) {
+					break;
+				} else {
+					ptr_name_tmp = (uchar *)strrchr(
+						(char *)part_info.name, c);
+					if (ptr_name_tmp &&
+					    part_info.name[ptr_name_tmp -
+						part_info.name + 2] == '\0')
+						fb_add_string(
+							resp_tmp,
+							ptr_name_tmp -
+							part_info.name + 1,
+							(char *)part_info.name,
+							NULL);
+					else
+						strcpy(resp_tmp,
+						       (char *)part_info.name);
+
+					has_slot = rk_avb_get_part_has_slot_info(
+						resp_tmp);
+					if (has_slot < 0) {
+						snprintf(actual_resp,
+							 chars_left,
+							 "%s:%s:no",
+							 getvar_table[i].name.str,
+							 resp_tmp);
+					} else {
+						snprintf(actual_resp,
+							 chars_left,
+							 "%s:%s:yes",
+							 getvar_table[i].name.str,
+							 resp_tmp);
+						p++;
+					}
+
+					fastboot_tx_write_str(response);
+				}
+			}
+			break;
+		}
 
-		result = trusty_read_oem_unlock(&unlock);
-		if (result) {
-			printf("read oem unlock status with error : 0x%x\n", result);
-			fastboot_tx_write_str("FAILRead oem unlock status failed");
-			return;
+		case FB_SLOT_SUCCESSFUL: {
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
+			AvbABData ab_info;
+
+			if (rk_avb_get_ab_info(&ab_info) < 0) {
+				fb_add_string(actual_resp,
+					      chars_left,
+					      "%s:get ab info failed!",
+					      getvar_table[i].name.str);
+				fastboot_tx_write_str(response);
+				break;
+			}
+
+			if (ab_info.slots[0].successful_boot)
+				fb_add_string(actual_resp, chars_left,
+					      "%s:a:yes",
+					      getvar_table[i].name.str);
+			else
+				fb_add_string(actual_resp, chars_left,
+					      "%s:a:no",
+					      getvar_table[i].name.str);
+			fastboot_tx_write_str(response);
+
+			if (ab_info.slots[1].successful_boot)
+				fb_add_string(actual_resp, chars_left,
+					      "%s:b:yes",
+					      getvar_table[i].name.str);
+			else
+				fb_add_string(actual_resp, chars_left,
+					      "%s:b:no",
+					      getvar_table[i].name.str);
+			fastboot_tx_write_str(response);
+#else
+			fb_add_string(actual_resp, chars_left,
+				      "%s:not find ab info!",
+				      getvar_table[i].name.str);
+			fastboot_tx_write_str(response);
+#endif
+			break;
 		}
-		sprintf(msg, "Device is %s, Status Code: %d\n",
-			unlock == 0 ? "LOCKED" : "UNLOCKED", unlock);
 
-		printf(msg);
-		strncat(response, msg, chars_left);
+		case FB_SLOT_UNBOOTABLE: {
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
+			AvbABData ab_info;
+
+			if (rk_avb_get_ab_info(&ab_info) < 0) {
+				fb_add_string(actual_resp, chars_left,
+					      "%s:not find ab info!",
+					      getvar_table[i].name.str);
+				fastboot_tx_write_str(response);
+				break;
+			}
+
+			if (!ab_info.slots[0].successful_boot &&
+			    !ab_info.slots[0].tries_remaining &&
+			    !ab_info.slots[0].priority)
+				fb_add_string(actual_resp, chars_left,
+					      "%s:a:yes",
+					      getvar_table[i].name.str);
+			else
+				fb_add_string(actual_resp, chars_left,
+					      "%s:a:no",
+					      getvar_table[i].name.str);
+			fastboot_tx_write_str(response);
+
+			if (!ab_info.slots[1].successful_boot &&
+			    !ab_info.slots[1].tries_remaining &&
+			    !ab_info.slots[1].priority)
+				fb_add_string(actual_resp, chars_left,
+					      "%s:b:yes",
+					      getvar_table[i].name.str);
+			else
+				fb_add_string(actual_resp, chars_left,
+					      "%s:b:no",
+					      getvar_table[i].name.str);
+
+			fastboot_tx_write_str(response);
+#else
+			fb_add_string(actual_resp, chars_left,
+				      "%s:not find ab info!",
+				      getvar_table[i].name.str);
+			fastboot_tx_write_str(response);
 #endif
+			break;
+		}
+
+		case FB_SLOT_RETRY_COUNT: {
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
+			AvbABData ab_info;
+
+			if (rk_avb_get_ab_info(&ab_info) < 0) {
+				fb_add_string(actual_resp, chars_left,
+					      "%s:not find ab info!",
+					      getvar_table[i].name.str);
+				fastboot_tx_write_str(response);
+				break;
+			}
+
+			snprintf(actual_resp, chars_left, "%s:a:%d",
+				 getvar_table[i].name.str,
+				 ab_info.slots[1].tries_remaining);
+			fastboot_tx_write_str(response);
+			snprintf(actual_resp, chars_left, "%s:b:%d",
+				 getvar_table[i].name.str,
+				 ab_info.slots[1].tries_remaining);
+			fastboot_tx_write_str(response);
 #else
-		fastboot_tx_write_str("FAILnot implemented");
-		return;
+			fb_add_string(actual_resp, chars_left,
+				      "%s:not find ab info!",
+				      getvar_table[i].name.str);
+			fastboot_tx_write_str(response);
+#endif
+			break;
+		}
 #endif
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
+		case FB_AT_VBST:
+			break;
+#endif
+		default:
+			fb_getvar_single((char *)getvar_table[i].name.str,
+					 resp_tmp, FASTBOOT_RESPONSE_LEN);
+			snprintf(actual_resp, chars_left, "%s:%s",
+				 getvar_table[i].name.str, resp_tmp);
+			fastboot_tx_write_str(response);
+		}
+	}
+}
+
+static void cb_getvar(struct usb_ep *ep, struct usb_request *req)
+{
+	char *cmd = req->buf;
+	char response[FASTBOOT_RESPONSE_LEN] = {0};
+	const char *str_read_all = "all";
+	size_t len = 0;
+	size_t chars_left;
+
+	strsep(&cmd, ":");
+	if (!cmd) {
+		pr_err("missing variable");
+		fastboot_tx_write_str("FAILmissing var");
+		return;
+	}
+
+	len = strlen(cmd);
+	if (len == strlen(str_read_all) &&
+	    (strncmp(cmd, str_read_all, len) == 0)) {
+		fb_getvar_all();
+		fastboot_tx_write_str("OKAYDone!");
 	} else {
-		char *envstr;
+		strcpy(response, "OKAY");
+		chars_left = sizeof(response) - strlen(response) - 1;
 
-		envstr = malloc(strlen("fastboot.") + strlen(cmd) + 1);
-		if (!envstr) {
-			fastboot_tx_write_str("FAILmalloc error");
+		if (fb_getvar_single(cmd, &response[strlen(response)],
+				     chars_left) < 0) {
+			strcpy(cmd, "FAILunknown variable");
+			strncat(cmd, &response[strlen(response)], chars_left);
+			fastboot_tx_write_str(cmd);
 			return;
 		}
-
-		sprintf(envstr, "fastboot.%s", cmd);
-		s = env_get(envstr);
-		if (s) {
-			strncat(response, s, chars_left);
-		} else {
-			printf("WARNING: unknown variable: %s\n", cmd);
-			strcpy(response, "FAILVariable not implemented");
-		}
-
-		free(envstr);
+		fastboot_tx_write_str(response);
 	}
-	fastboot_tx_write_str(response);
+
+	return;
 }
 
 static unsigned int rx_bytes_expected(struct usb_ep *ep)
diff --git a/include/fastboot.h b/include/fastboot.h
index bc7ff2bb14..452ff1d801 100644
--- a/include/fastboot.h
+++ b/include/fastboot.h
@@ -16,6 +16,40 @@
 /* The 64 defined bytes plus \0 */
 #define FASTBOOT_RESPONSE_LEN (64 + 1)
 
+/* Fastboot getvar variables */
+typedef enum {
+	FB_VERSION,
+	FB_BOOTLOADER_VERSION,
+	FB_BASEBAND_VERSION,
+	FB_PRODUCT,
+	FB_SERIAL_NO,
+	FB_SECURE,
+	FB_DWNLD_SIZE,
+	FB_BLK_SIZE,
+	FB_ERASE_SIZE,
+	FB_PART_TYPE,
+	FB_PART_SIZE,
+	FB_UNLOCKED,
+	FB_VARIANT,
+	FB_OFF_MODE_CHARGE,
+	FB_BATT_VOLTAGE,
+	FB_BATT_SOC_OK,
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
+	FB_HAS_COUNT,
+	FB_HAS_SLOT,
+	FB_CURR_SLOT,
+	FB_SLOT_SUFFIXES,
+	FB_SLOT_SUCCESSFUL,
+	FB_SLOT_UNBOOTABLE,
+	FB_SLOT_RETRY_COUNT,
+	FB_AT_VBST,
+#endif
+#ifdef CONFIG_OPTEE_CLIENT
+	FB_AT_DH,
+	FB_AT_UUID,
+#endif
+} fb_getvar_t;
+
 void fastboot_fail(const char *reason, char *response);
 void fastboot_okay(const char *reason, char *response);
 

commit 42784e282f3e35d1ed4bc55401c3675256c00931
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Aug 14 15:26:06 2018 +0800

    rockchip; fix DRAM info address
    
    Change-Id: I01cbb873cb5861ffd00e9b7d374c22ec42639f6b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
index f410fec514..faeb0dffa5 100644
--- a/arch/arm/mach-rockchip/sdram_common.c
+++ b/arch/arm/mach-rockchip/sdram_common.c
@@ -253,8 +253,8 @@ ulong board_get_usable_ram_top(ulong total_size)
 
 int rockchip_setup_ddr_param(struct ram_info *info)
 {
-	struct ddr_param *dinfo = (struct ddr_param *)CONFIG_SYS_SDRAM_BASE +
-					PARAM_DRAM_INFO_OFFSET;
+	struct ddr_param *dinfo = (struct ddr_param *)(CONFIG_SYS_SDRAM_BASE +
+					PARAM_DRAM_INFO_OFFSET);
 
 	dinfo->count = 1;
 	dinfo->bank_addr = info->base;

commit 7c1937d6d1c7daf8e59b4760f8adc7ee42bd7bea
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Aug 8 21:14:18 2018 +0800

    lib: avb: change judgement value when read from rpmb
    
    If the item is not existent, trust will return TEE_ERROR_GENERIC
    TEE_ERROR_NO_DATA and TEE_ERROR_ITEM_NOT_FOUND. We initialize
    the item when return these value.
    
    TEST: fastboot getvar at-vboot-state
    
    ERROR: avb-perm-attr-set=0
    avb-locked=
    avb-unlock-disabled=
    
    Change-Id: Ie1b4e1ce7d1dc419a0af11e5701b0130f2f7f553
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/lib/avb/libavb_user/avb_ops_user.c b/lib/avb/libavb_user/avb_ops_user.c
index 9dd8a8b570..0838880ef9 100755
--- a/lib/avb/libavb_user/avb_ops_user.c
+++ b/lib/avb/libavb_user/avb_ops_user.c
@@ -1,418 +1,444 @@
-/*
- * Copyright (C) 2017 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include <common.h>
-#include <image.h>
-#include <android_image.h>
-#include <malloc.h>
-#include <mapmem.h>
-#include <errno.h>
-#include <command.h>
-#include <mmc.h>
-#include <blk.h>
-#include <part.h>
-#include <android_avb/avb_ops_user.h>
-#include <android_avb/libavb_ab.h>
-#include <android_avb/avb_atx_validate.h>
-#include <android_avb/avb_atx_types.h>
-#include <optee_include/OpteeClientInterface.h>
-#include <optee_include/tee_api_defines.h>
-#include <android_avb/avb_vbmeta_image.h>
-#include <android_avb/avb_atx_validate.h>
-#include <boot_rkimg.h>
-
-static void byte_to_block(int64_t *offset,
-			  size_t *num_bytes,
-			  lbaint_t *offset_blk,
-			  lbaint_t *blkcnt)
-{
-	*offset_blk = (lbaint_t)(*offset / 512);
-	if (*num_bytes % 512 == 0) {
-		if (*offset % 512 == 0) {
-			*blkcnt = (lbaint_t)(*num_bytes / 512);
-		} else {
-			*blkcnt = (lbaint_t)(*num_bytes / 512) + 1;
-		}
-	} else {
-		if (*offset % 512 == 0) {
-			*blkcnt = (lbaint_t)(*num_bytes / 512) + 1;
-		} else {
-			if ((*offset % 512) + (*num_bytes % 512) < 512 ||
-			    (*offset % 512) + (*num_bytes % 512) == 512) {
-				*blkcnt = (lbaint_t)(*num_bytes / 512) + 1;
-			} else {
-				*blkcnt = (lbaint_t)(*num_bytes / 512) + 2;
-			}
-		}
-	}
-}
-
-static AvbIOResult read_from_partition(AvbOps* ops,
-                                       const char* partition,
-                                       int64_t offset,
-                                       size_t num_bytes,
-                                       void* buffer,
-                                       size_t* out_num_read)
-{
-	struct blk_desc *dev_desc;
-	lbaint_t offset_blk, blkcnt;
-	disk_partition_t part_info;
-
-	byte_to_block(&offset, &num_bytes, &offset_blk, &blkcnt);
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: Could not find device\n", __func__);
-		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
-	}
-
-	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0) {
-		printf("Could not find \"%s\" partition\n", partition);
-		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
-	}
-
-	if((offset % 512 == 0) && (num_bytes % 512 == 0)) {
-		blk_dread(dev_desc, part_info.start + offset_blk, blkcnt, buffer);
-		*out_num_read = blkcnt * 512;
-	} else {
-		char *buffer_temp;
-		buffer_temp = malloc(512 * blkcnt);
-		if (buffer_temp == NULL) {
-			printf("malloc error!\n");
-			return AVB_IO_RESULT_ERROR_OOM;
-		}
-		blk_dread(dev_desc, part_info.start + offset_blk, blkcnt, buffer_temp);
-		memcpy(buffer, buffer_temp + (offset % 512), num_bytes);
-		*out_num_read = num_bytes;
-		free(buffer_temp);
-	}
-
-	return AVB_IO_RESULT_OK;
-}
-
-static AvbIOResult write_to_partition(AvbOps* ops,
-                                      const char* partition,
-                                      int64_t offset,
-                                      size_t num_bytes,
-                                      const void* buffer)
-{
-	struct blk_desc *dev_desc;
-	char *buffer_temp;
-	disk_partition_t part_info;
-	lbaint_t offset_blk, blkcnt;
-
-	byte_to_block(&offset, &num_bytes, &offset_blk, &blkcnt);
-	buffer_temp = malloc(512 * blkcnt);
-	if (buffer_temp == NULL) {
-		printf("malloc error!\n");
-		return AVB_IO_RESULT_ERROR_OOM;
-	}
-	memset(buffer_temp, 0, 512 * blkcnt);
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: Could not find device\n", __func__);
-		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
-	}
-
-	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0) {
-		printf("Could not find \"%s\" partition\n", partition);
-		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
-	}
-
-	if ((offset % 512 != 0) && (num_bytes % 512) != 0) {
-		blk_dread(dev_desc, part_info.start + offset_blk, blkcnt, buffer_temp);
-	}
-
-	memcpy(buffer_temp, buffer + (offset % 512), num_bytes);
-	blk_dwrite(dev_desc, part_info.start + offset_blk, blkcnt, buffer);
-	free(buffer_temp);
-
-	return AVB_IO_RESULT_OK;
-}
-
-static AvbIOResult validate_vbmeta_public_key(
-	AvbOps *ops,
-	const uint8_t *public_key_data,
-	size_t public_key_length,
-	const uint8_t *public_key_metadata,
-	size_t public_key_metadata_length,
-	bool *out_is_trusted)
-{
-#ifdef AVB_VBMETA_PUBLIC_KEY_VALIDATE
-	if (out_is_trusted != NULL) {
-		avb_atx_validate_vbmeta_public_key(ops,
-						   public_key_data,
-						   public_key_length,
-						   public_key_metadata,
-						   public_key_metadata_length,
-						   out_is_trusted);
-	}
-#else
-	if (out_is_trusted != NULL) {
-		*out_is_trusted = true;
-	}
-#endif
-	return AVB_IO_RESULT_OK;
-}
-
-static AvbIOResult read_rollback_index(AvbOps *ops,
-                                       size_t rollback_index_location,
-                                       uint64_t *out_rollback_index)
-{
-	if (out_rollback_index != NULL) {
-#ifdef CONFIG_OPTEE_CLIENT
-		int ret;
-		ret = trusty_read_rollback_index(rollback_index_location,
-						 out_rollback_index);
-		if (ret == TEE_ERROR_ITEM_NOT_FOUND) {
-			*out_rollback_index = 0;
-			ret = trusty_write_rollback_index(rollback_index_location,
-							  *out_rollback_index);
-			if (ret != 0) {
-				printf("%s: init rollback index error\n", __FILE__);
-				return AVB_IO_RESULT_ERROR_IO;
-			}
-			ret = trusty_read_rollback_index(rollback_index_location,
-							 out_rollback_index);
-			if (ret == 0)
-				return AVB_IO_RESULT_OK;
-		} else if (ret == 0) {
-			return AVB_IO_RESULT_OK;
-		} else {
-			printf("trusty_read_rollback_index ret = %x\n", ret);
-			return AVB_IO_RESULT_ERROR_IO;
-		}
-#endif
-	}
-	return AVB_IO_RESULT_ERROR_IO;
-}
-
-static AvbIOResult write_rollback_index(AvbOps *ops,
-                                        size_t rollback_index_location,
-                                        uint64_t rollback_index)
-{
-#ifdef CONFIG_OPTEE_CLIENT
-	if (trusty_write_rollback_index(rollback_index_location, rollback_index)) {
-		printf("%s: Fail to write rollback index\n", __FILE__);
-		return AVB_IO_RESULT_ERROR_IO;
-	}
-	return AVB_IO_RESULT_OK;
-#endif
-	return AVB_IO_RESULT_ERROR_IO;
-}
-
-static AvbIOResult read_is_device_unlocked(AvbOps *ops, bool *out_is_unlocked)
-{
-	if (out_is_unlocked != NULL) {
-#ifdef CONFIG_OPTEE_CLIENT
-		int ret;
-
-		ret = trusty_read_lock_state((uint8_t *)out_is_unlocked);
-		if (ret == TEE_ERROR_ITEM_NOT_FOUND) {
-			*out_is_unlocked = 1;
-			if (trusty_write_lock_state(*out_is_unlocked)) {
-				printf("%s: init lock state error\n", __FILE__);
-				return AVB_IO_RESULT_ERROR_IO;
-			}
-
-			ret = trusty_read_lock_state((uint8_t *)out_is_unlocked);
-			if(ret == 0)
-				return 0;
-		} else if (ret == 0) {
-			return AVB_IO_RESULT_OK;
-		} else {
-			printf("read_is_device_unlocked ret = %x\n", ret);
-			return AVB_IO_RESULT_ERROR_IO;
-		}
-#endif
-	}
-	return AVB_IO_RESULT_ERROR_IO;
-}
-
-static AvbIOResult write_is_device_unlocked(AvbOps *ops, bool *out_is_unlocked)
-{
-	if (out_is_unlocked != NULL) {
-#ifdef CONFIG_OPTEE_CLIENT
-		if (trusty_write_lock_state(*out_is_unlocked)) {
-			printf("%s: Fail to write lock state\n", __FILE__);
-			return AVB_IO_RESULT_ERROR_IO;
-		}
-		return AVB_IO_RESULT_OK;
-#endif
-	}
-	return AVB_IO_RESULT_ERROR_IO;
-}
-
-static AvbIOResult get_size_of_partition(AvbOps *ops,
-                                         const char *partition,
-                                         uint64_t *out_size_in_bytes)
-{
-	struct blk_desc *dev_desc;
-	disk_partition_t part_info;
-
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: Could not find device\n", __func__);
-		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
-	}
-
-	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0) {
-		printf("Could not find \"%s\" partition\n", partition);
-		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
-	}
-	*out_size_in_bytes = (part_info.size) * 512;
-	return AVB_IO_RESULT_OK;
-}
-
-static AvbIOResult get_unique_guid_for_partition(AvbOps *ops,
-                                                 const char *partition,
-                                                 char *guid_buf,
-                                                 size_t guid_buf_size)
-{
-	struct blk_desc *dev_desc;
-	disk_partition_t part_info;
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: Could not find device\n", __func__);
-		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
-	}
-
-	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0) {
-		printf("Could not find \"%s\" partition\n", partition);
-		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
-	}
-	if (guid_buf != NULL && guid_buf_size > 0) {
-		memcpy(guid_buf, part_info.uuid, guid_buf_size);
-	}
-	return AVB_IO_RESULT_OK;
-}
-
-/* read permanent attributes from rpmb */
-AvbIOResult avb_read_perm_attr(AvbAtxOps* atx_ops,
-			       AvbAtxPermanentAttributes* attributes)
-{
-	if (attributes != NULL) {
-#ifdef CONFIG_OPTEE_CLIENT
-		trusty_read_permanent_attributes((uint8_t *)attributes,
-						 sizeof(struct AvbAtxPermanentAttributes));
-		return AVB_IO_RESULT_OK;
-#endif
-	}
-
-	return -1;
-}
-
-/*read permanent attributes hash from efuse */
-AvbIOResult avb_read_perm_attr_hash(AvbAtxOps* atx_ops,
-				    uint8_t hash[AVB_SHA256_DIGEST_SIZE])
-{
-#ifdef CONFIG_OPTEE_CLIENT
-	if (trusty_read_attribute_hash((uint32_t *)hash, AVB_SHA256_DIGEST_SIZE / 4))
-		return -1;
-#else
-	avb_error("Please open the macro!\n");
-	return -1;
-#endif
-	return AVB_IO_RESULT_OK;
-}
-
-static void avb_set_key_version(AvbAtxOps* atx_ops,
-                        size_t rollback_index_location,
-                        uint64_t key_version)
-{
-#ifdef CONFIG_OPTEE_CLIENT
-	if (trusty_write_rollback_index(rollback_index_location, key_version)) {
-		printf("%s: Fail to write rollback index\n", __FILE__);
-	}
-#endif
-}
-
-AvbIOResult rk_get_random(AvbAtxOps* atx_ops,
-                          size_t num_bytes,
-                          uint8_t* output)
-{
-        int i;
-        unsigned int seed;
-
-        seed = (unsigned int)get_timer(0);
-        for (i = 0; i < num_bytes; i++) {
-		srand(seed);
-                output[i] = (uint8_t)(rand());
-                seed = (unsigned int)(output[i]);
-        }
-
-        return 0;
-}
-
-AvbOps* avb_ops_user_new(void) {
-  AvbOps* ops;
-
-  ops = calloc(1, sizeof(AvbOps));
-  if (ops == NULL) {
-    avb_error("Error allocating memory for AvbOps.\n");
-    goto out;
-  }
-
-  ops->ab_ops = calloc(1, sizeof(AvbABOps));
-  if (ops->ab_ops == NULL) {
-    avb_error("Error allocating memory for AvbABOps.\n");
-    free(ops);
-    goto out;
-  }
-
-  ops->atx_ops = calloc(1, sizeof(AvbAtxOps));
-  if (ops->atx_ops == NULL) {
-    avb_error("Error allocating memory for AvbAtxOps.\n");
-    free(ops->ab_ops);
-    free(ops);
-    goto out;
-  }
-  ops->ab_ops->ops = ops;
-  ops->atx_ops->ops = ops;
-
-  ops->read_from_partition = read_from_partition;
-  ops->write_to_partition = write_to_partition;
-  ops->validate_vbmeta_public_key = validate_vbmeta_public_key;
-  ops->read_rollback_index = read_rollback_index;
-  ops->write_rollback_index = write_rollback_index;
-  ops->read_is_device_unlocked = read_is_device_unlocked;
-  ops->write_is_device_unlocked = write_is_device_unlocked;
-  ops->get_unique_guid_for_partition = get_unique_guid_for_partition;
-  ops->get_size_of_partition = get_size_of_partition;
-  ops->ab_ops->read_ab_metadata = avb_ab_data_read;
-  ops->ab_ops->write_ab_metadata = avb_ab_data_write;
-  ops->atx_ops->read_permanent_attributes = avb_read_perm_attr;
-  ops->atx_ops->read_permanent_attributes_hash = avb_read_perm_attr_hash;
-  ops->atx_ops->set_key_version = avb_set_key_version;
-  ops->atx_ops->get_random = rk_get_random;
-
-out:
-  return ops;
-}
-
-
-void avb_ops_user_free(AvbOps* ops) {
-  free(ops->ab_ops);
-  free(ops->atx_ops);
-  free(ops);
-}
+/*
+ * Copyright (C) 2017 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <common.h>
+#include <image.h>
+#include <android_image.h>
+#include <malloc.h>
+#include <mapmem.h>
+#include <errno.h>
+#include <command.h>
+#include <mmc.h>
+#include <blk.h>
+#include <part.h>
+#include <android_avb/avb_ops_user.h>
+#include <android_avb/libavb_ab.h>
+#include <android_avb/avb_atx_validate.h>
+#include <android_avb/avb_atx_types.h>
+#include <optee_include/OpteeClientInterface.h>
+#include <optee_include/tee_api_defines.h>
+#include <android_avb/avb_vbmeta_image.h>
+#include <android_avb/avb_atx_validate.h>
+#include <boot_rkimg.h>
+
+static void byte_to_block(int64_t *offset,
+			  size_t *num_bytes,
+			  lbaint_t *offset_blk,
+			  lbaint_t *blkcnt)
+{
+	*offset_blk = (lbaint_t)(*offset / 512);
+	if (*num_bytes % 512 == 0) {
+		if (*offset % 512 == 0)
+			*blkcnt = (lbaint_t)(*num_bytes / 512);
+		else
+			*blkcnt = (lbaint_t)(*num_bytes / 512) + 1;
+	} else {
+		if (*offset % 512 == 0) {
+			*blkcnt = (lbaint_t)(*num_bytes / 512) + 1;
+		} else {
+			if ((*offset % 512) + (*num_bytes % 512) < 512 ||
+			    (*offset % 512) + (*num_bytes % 512) == 512) {
+				*blkcnt = (lbaint_t)(*num_bytes / 512) + 1;
+			} else {
+				*blkcnt = (lbaint_t)(*num_bytes / 512) + 2;
+			}
+		}
+	}
+}
+
+static AvbIOResult read_from_partition(AvbOps *ops,
+				       const char *partition,
+				       int64_t offset,
+				       size_t num_bytes,
+				       void *buffer,
+				       size_t *out_num_read)
+{
+	struct blk_desc *dev_desc;
+	lbaint_t offset_blk, blkcnt;
+	disk_partition_t part_info;
+
+	byte_to_block(&offset, &num_bytes, &offset_blk, &blkcnt);
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: Could not find device\n", __func__);
+		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
+	}
+
+	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0) {
+		printf("Could not find \"%s\" partition\n", partition);
+		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
+	}
+
+	if ((offset % 512 == 0) && (num_bytes % 512 == 0)) {
+		blk_dread(dev_desc, part_info.start + offset_blk,
+			  blkcnt, buffer);
+		*out_num_read = blkcnt * 512;
+	} else {
+		char *buffer_temp;
+
+		buffer_temp = malloc(512 * blkcnt);
+		if (!buffer_temp) {
+			printf("malloc error!\n");
+			return AVB_IO_RESULT_ERROR_OOM;
+		}
+		blk_dread(dev_desc, part_info.start + offset_blk,
+			  blkcnt, buffer_temp);
+		memcpy(buffer, buffer_temp + (offset % 512), num_bytes);
+		*out_num_read = num_bytes;
+		free(buffer_temp);
+	}
+
+	return AVB_IO_RESULT_OK;
+}
+
+static AvbIOResult write_to_partition(AvbOps *ops,
+				      const char *partition,
+				      int64_t offset,
+				      size_t num_bytes,
+				      const void *buffer)
+{
+	struct blk_desc *dev_desc;
+	char *buffer_temp;
+	disk_partition_t part_info;
+	lbaint_t offset_blk, blkcnt;
+
+	byte_to_block(&offset, &num_bytes, &offset_blk, &blkcnt);
+	buffer_temp = malloc(512 * blkcnt);
+	if (!buffer_temp) {
+		printf("malloc error!\n");
+		return AVB_IO_RESULT_ERROR_OOM;
+	}
+	memset(buffer_temp, 0, 512 * blkcnt);
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: Could not find device\n", __func__);
+		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
+	}
+
+	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0) {
+		printf("Could not find \"%s\" partition\n", partition);
+		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
+	}
+
+	if ((offset % 512 != 0) && (num_bytes % 512) != 0)
+		blk_dread(dev_desc, part_info.start + offset_blk,
+			  blkcnt, buffer_temp);
+
+	memcpy(buffer_temp, buffer + (offset % 512), num_bytes);
+	blk_dwrite(dev_desc, part_info.start + offset_blk, blkcnt, buffer);
+	free(buffer_temp);
+
+	return AVB_IO_RESULT_OK;
+}
+
+static AvbIOResult
+validate_vbmeta_public_key(AvbOps *ops,
+			   const uint8_t *public_key_data,
+			   size_t public_key_length,
+			   const uint8_t *public_key_metadata,
+			   size_t public_key_metadata_length,
+			   bool *out_is_trusted)
+{
+#ifdef AVB_VBMETA_PUBLIC_KEY_VALIDATE
+	if (out_is_trusted) {
+		avb_atx_validate_vbmeta_public_key(ops,
+						   public_key_data,
+						   public_key_length,
+						   public_key_metadata,
+						   public_key_metadata_length,
+						   out_is_trusted);
+	}
+#else
+	if (out_is_trusted)
+		*out_is_trusted = true;
+#endif
+	return AVB_IO_RESULT_OK;
+}
+
+static AvbIOResult read_rollback_index(AvbOps *ops,
+				       size_t rollback_index_location,
+				       uint64_t *out_rollback_index)
+{
+	if (out_rollback_index) {
+#ifdef CONFIG_OPTEE_CLIENT
+		int ret;
+
+		ret = trusty_read_rollback_index(rollback_index_location,
+						 out_rollback_index);
+		switch (ret) {
+		case TEE_SUCCESS:
+			ret = AVB_IO_RESULT_OK;
+			break;
+		case TEE_ERROR_GENERIC:
+		case TEE_ERROR_NO_DATA:
+		case TEE_ERROR_ITEM_NOT_FOUND:
+			*out_rollback_index = 0;
+			ret = trusty_write_rollback_index(rollback_index_location,
+							  *out_rollback_index);
+			if (ret) {
+				printf("%s: init rollback index error\n",
+				       __FILE__);
+				ret = AVB_IO_RESULT_ERROR_IO;
+			} else {
+				ret =
+				trusty_read_rollback_index(rollback_index_location,
+							   out_rollback_index);
+				if (ret)
+					ret = AVB_IO_RESULT_ERROR_IO;
+				else
+					ret = AVB_IO_RESULT_OK;
+			}
+			break;
+		default:
+			ret = AVB_IO_RESULT_ERROR_IO;
+			printf("%s: trusty_read_rollback_index failed",
+			       __FILE__);
+		}
+
+		return ret;
+#endif
+	}
+	return AVB_IO_RESULT_ERROR_IO;
+}
+
+static AvbIOResult write_rollback_index(AvbOps *ops,
+					size_t rollback_index_location,
+					uint64_t rollback_index)
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	if (trusty_write_rollback_index(rollback_index_location,
+					rollback_index)) {
+		printf("%s: Fail to write rollback index\n", __FILE__);
+		return AVB_IO_RESULT_ERROR_IO;
+	}
+	return AVB_IO_RESULT_OK;
+#endif
+	return AVB_IO_RESULT_ERROR_IO;
+}
+
+static AvbIOResult read_is_device_unlocked(AvbOps *ops, bool *out_is_unlocked)
+{
+	if (out_is_unlocked) {
+#ifdef CONFIG_OPTEE_CLIENT
+		int ret;
+
+		ret = trusty_read_lock_state((uint8_t *)out_is_unlocked);
+		switch (ret) {
+		case TEE_SUCCESS:
+			ret = AVB_IO_RESULT_OK;
+			break;
+		case TEE_ERROR_GENERIC:
+		case TEE_ERROR_NO_DATA:
+		case TEE_ERROR_ITEM_NOT_FOUND:
+			*out_is_unlocked = 1;
+			if (trusty_write_lock_state(*out_is_unlocked)) {
+				printf("%s: init lock state error\n", __FILE__);
+				ret = AVB_IO_RESULT_ERROR_IO;
+			} else {
+				ret =
+				trusty_read_lock_state((uint8_t *)out_is_unlocked);
+				if (ret == 0)
+					ret = AVB_IO_RESULT_OK;
+				else
+					ret = AVB_IO_RESULT_ERROR_IO;
+			}
+			break;
+		default:
+			ret = AVB_IO_RESULT_ERROR_IO;
+			printf("%s: trusty_read_lock_state failed\n", __FILE__);
+		}
+		return ret;
+#endif
+	}
+	return AVB_IO_RESULT_ERROR_IO;
+}
+
+static AvbIOResult write_is_device_unlocked(AvbOps *ops, bool *out_is_unlocked)
+{
+	if (out_is_unlocked) {
+#ifdef CONFIG_OPTEE_CLIENT
+		if (trusty_write_lock_state(*out_is_unlocked)) {
+			printf("%s: Fail to write lock state\n", __FILE__);
+			return AVB_IO_RESULT_ERROR_IO;
+		}
+		return AVB_IO_RESULT_OK;
+#endif
+	}
+	return AVB_IO_RESULT_ERROR_IO;
+}
+
+static AvbIOResult get_size_of_partition(AvbOps *ops,
+					 const char *partition,
+					 uint64_t *out_size_in_bytes)
+{
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: Could not find device\n", __func__);
+		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
+	}
+
+	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0) {
+		printf("Could not find \"%s\" partition\n", partition);
+		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
+	}
+	*out_size_in_bytes = (part_info.size) * 512;
+	return AVB_IO_RESULT_OK;
+}
+
+static AvbIOResult get_unique_guid_for_partition(AvbOps *ops,
+						 const char *partition,
+						 char *guid_buf,
+						 size_t guid_buf_size)
+{
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: Could not find device\n", __func__);
+		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
+	}
+
+	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0) {
+		printf("Could not find \"%s\" partition\n", partition);
+		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
+	}
+	if (guid_buf && guid_buf_size > 0)
+		memcpy(guid_buf, part_info.uuid, guid_buf_size);
+
+	return AVB_IO_RESULT_OK;
+}
+
+/* read permanent attributes from rpmb */
+AvbIOResult avb_read_perm_attr(AvbAtxOps *atx_ops,
+			       AvbAtxPermanentAttributes *attributes)
+{
+	if (attributes) {
+#ifdef CONFIG_OPTEE_CLIENT
+		trusty_read_permanent_attributes((uint8_t *)attributes,
+						 sizeof(struct AvbAtxPermanentAttributes));
+		return AVB_IO_RESULT_OK;
+#endif
+	}
+
+	return -1;
+}
+
+/*read permanent attributes hash from efuse */
+AvbIOResult avb_read_perm_attr_hash(AvbAtxOps *atx_ops,
+				    uint8_t hash[AVB_SHA256_DIGEST_SIZE])
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	if (trusty_read_attribute_hash((uint32_t *)hash,
+				       AVB_SHA256_DIGEST_SIZE / 4))
+		return -1;
+#else
+	avb_error("Please open the macro!\n");
+	return -1;
+#endif
+	return AVB_IO_RESULT_OK;
+}
+
+static void avb_set_key_version(AvbAtxOps *atx_ops,
+				size_t rollback_index_location,
+				uint64_t key_version)
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	if (trusty_write_rollback_index(rollback_index_location, key_version))
+		printf("%s: Fail to write rollback index\n", __FILE__);
+#endif
+}
+
+AvbIOResult rk_get_random(AvbAtxOps *atx_ops,
+			  size_t num_bytes,
+			  uint8_t *output)
+{
+	int i;
+	unsigned int seed;
+
+	seed = (unsigned int)get_timer(0);
+	for (i = 0; i < num_bytes; i++) {
+		srand(seed);
+		output[i] = (uint8_t)(rand());
+		seed = (unsigned int)(output[i]);
+	}
+
+	return 0;
+}
+
+AvbOps *avb_ops_user_new(void)
+{
+	AvbOps *ops;
+
+	ops = calloc(1, sizeof(AvbOps));
+	if (!ops) {
+		avb_error("Error allocating memory for AvbOps.\n");
+		goto out;
+	}
+	ops->ab_ops = calloc(1, sizeof(AvbABOps));
+	if (!ops->ab_ops) {
+		avb_error("Error allocating memory for AvbABOps.\n");
+		free(ops);
+		goto out;
+	}
+
+	ops->atx_ops = calloc(1, sizeof(AvbAtxOps));
+	if (!ops->atx_ops) {
+		avb_error("Error allocating memory for AvbAtxOps.\n");
+		free(ops->ab_ops);
+		free(ops);
+		goto out;
+	}
+	ops->ab_ops->ops = ops;
+	ops->atx_ops->ops = ops;
+
+	ops->read_from_partition = read_from_partition;
+	ops->write_to_partition = write_to_partition;
+	ops->validate_vbmeta_public_key = validate_vbmeta_public_key;
+	ops->read_rollback_index = read_rollback_index;
+	ops->write_rollback_index = write_rollback_index;
+	ops->read_is_device_unlocked = read_is_device_unlocked;
+	ops->write_is_device_unlocked = write_is_device_unlocked;
+	ops->get_unique_guid_for_partition = get_unique_guid_for_partition;
+	ops->get_size_of_partition = get_size_of_partition;
+	ops->ab_ops->read_ab_metadata = avb_ab_data_read;
+	ops->ab_ops->write_ab_metadata = avb_ab_data_write;
+	ops->atx_ops->read_permanent_attributes = avb_read_perm_attr;
+	ops->atx_ops->read_permanent_attributes_hash = avb_read_perm_attr_hash;
+	ops->atx_ops->set_key_version = avb_set_key_version;
+	ops->atx_ops->get_random = rk_get_random;
+
+out:
+	return ops;
+}
+
+void avb_ops_user_free(AvbOps *ops)
+{
+	free(ops->ab_ops);
+	free(ops->atx_ops);
+	free(ops);
+}
diff --git a/lib/avb/rk_avb_user/rk_avb_ops_user.c b/lib/avb/rk_avb_user/rk_avb_ops_user.c
index ba2cba1b27..b58a81fe95 100644
--- a/lib/avb/rk_avb_user/rk_avb_ops_user.c
+++ b/lib/avb/rk_avb_user/rk_avb_ops_user.c
@@ -159,22 +159,25 @@ int rk_avb_read_flash_lock_state(uint8_t *flash_lock_state)
 	int ret;
 
 	ret = trusty_read_flash_lock_state(flash_lock_state);
-	if (ret == TEE_ERROR_ITEM_NOT_FOUND) {
+	switch (ret) {
+	case TEE_SUCCESS:
+		break;
+	case TEE_ERROR_GENERIC:
+	case TEE_ERROR_NO_DATA:
+	case TEE_ERROR_ITEM_NOT_FOUND:
 		*flash_lock_state = 1;
 		if (trusty_write_flash_lock_state(*flash_lock_state)) {
-			printf("trusty_write_flash_lock_state error!\n");
-			return -1;
+			avb_error("trusty_write_flash_lock_state error!");
+			ret = -1;
+		} else {
+			ret = trusty_read_flash_lock_state(flash_lock_state);
 		}
-
-		ret = trusty_read_flash_lock_state(flash_lock_state);
-
-		return ret;
-	} else if (ret == 0) {
-		return 0;
-	} else {
-		printf("avb_read_flash_lock_state ret = %x\n", ret);
-		return -1;
+		break;
+	default:
+		printf("%s: trusty_read_flash_lock_state failed\n", __FILE__);
 	}
+
+	return ret;
 #else
 	return -1;
 #endif
@@ -214,22 +217,25 @@ int rk_avb_read_lock_state(uint8_t *lock_state)
 	int ret;
 
 	ret = trusty_read_lock_state(lock_state);
-	if (ret == TEE_ERROR_ITEM_NOT_FOUND) {
+	switch (ret) {
+	case TEE_SUCCESS:
+		break;
+	case TEE_ERROR_GENERIC:
+	case TEE_ERROR_NO_DATA:
+	case TEE_ERROR_ITEM_NOT_FOUND:
 		*lock_state = 1;
 		if (rk_avb_write_lock_state(*lock_state)) {
-			printf("avb_write_lock_state error!\n");
-			return -1;
+			avb_error("avb_write_lock_state error!");
+			ret = -1;
+		} else {
+			ret = trusty_read_lock_state(lock_state);
 		}
-
-		ret = trusty_read_lock_state(lock_state);
-
-		return ret;
-	} else if (ret == 0) {
-		return 0;
-	} else {
-		printf("avb_read_lock_state ret = %x\n", ret);
-		return -1;
+		break;
+	default:
+		printf("%s: trusty_read_lock_state failed\n", __FILE__);
 	}
+
+	return ret;
 #else
 	return -1;
 #endif
@@ -255,22 +261,26 @@ int rk_avb_read_perm_attr_flag(uint8_t *flag)
 	int ret;
 
 	ret = trusty_read_permanent_attributes_flag(flag);
-	if (ret != TEE_SUCCESS) {
+	switch (ret) {
+	case TEE_SUCCESS:
+		break;
+	case TEE_ERROR_GENERIC:
+	case TEE_ERROR_NO_DATA:
+	case TEE_ERROR_ITEM_NOT_FOUND:
 		*flag = 0;
 		if (rk_avb_write_perm_attr_flag(*flag)) {
-			printf("avb_write_perm_attr_flag error!\n");
-			return -1;
+			avb_error("avb_write_perm_attr_flag error!");
+			ret = -1;
+		} else {
+			ret = trusty_read_permanent_attributes_flag(flag);
 		}
-
-		ret = trusty_read_permanent_attributes_flag(flag);
-
-		return ret;
-	} else if (ret == 0) {
-		return 0;
-	} else {
-		printf("avb_read_perm_attr_flag ret = %x\n", ret);
-		return -1;
+		break;
+	default:
+		printf("%s: trusty_read_permanent_attributes_flag failed",
+		       __FILE__);
 	}
+
+	return ret;
 #else
 	return -1;
 #endif

commit 615e0cde57865e2025a3cb2340bfde96a6f58d1f
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Aug 8 21:23:51 2018 +0800

    lib: avb: fix bug HANG in fastboot getvar at-vboot-state
    
    Bug: Run 'fastboot getvar at-vboot-state', then HANG
    in the fastboot without any message.
    
    Cause: The fastboot can not decide the vboot size when
    the return information size of vboot state is larger
    than the VBOOT_STATE_SIZE. This makes the device will not
    response to console.
    
    Solution: 1. Enlarge VBOOT_STATE_SIZE. The max size of
    vboot state may be 862, so define VBOOT_STATE_SIZE
    to 1000.
    2. Use snprintf to get the info.
    
    Change-Id: I2d0fda76ca9034c596993ab27a02cbf2fa550977
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/android_avb/rk_avb_ops_user.h b/include/android_avb/rk_avb_ops_user.h
old mode 100755
new mode 100644
index 76a4de6349..0a70e7096b
--- a/include/android_avb/rk_avb_ops_user.h
+++ b/include/android_avb/rk_avb_ops_user.h
@@ -23,7 +23,7 @@ extern "C" {
 #define ROLLBACK_MAX_SIZE 20
 #define LOCK_MASK 0x1
 #define UNLOCK_DISABLE_MASK 0x2
-#define VBOOT_STATE_SIZE    300
+#define VBOOT_STATE_SIZE    1000
 #define PERM_ATTR_SUCCESS_FLAG 1
 /* soc-v use the rsa2048 */
 #define VBOOT_KEY_SIZE   256
diff --git a/lib/avb/rk_avb_user/rk_avb_ops_user.c b/lib/avb/rk_avb_user/rk_avb_ops_user.c
old mode 100755
new mode 100644
index 92e50c38dd..ba2cba1b27
--- a/lib/avb/rk_avb_user/rk_avb_ops_user.c
+++ b/lib/avb/rk_avb_user/rk_avb_ops_user.c
@@ -512,62 +512,73 @@ int rk_avb_get_bootloader_min_version(char *buffer)
 
 void rk_avb_get_at_vboot_state(char *buf)
 {
-	char temp_buffer[200] = {0};
 	char temp_flag = 0;
-	char crlf[2] = {'\n', 0};
 	char *lock_val = NULL;
-	char *unlocK_dis_val = NULL;
+	char *unlock_dis_val = NULL;
 	char *perm_attr_flag = NULL;
 	char *bootloader_locked_flag = NULL;
-	char *lock_state = "bootloader-locked=";
-	char *btld_min_ver = "bootloader-min-versions=";
-	char *avb_perm_attr_set = "avb-perm-attr-set=";
-	char *avb_lock = "avb-locked=";
-	char *avb_unlock_dis = "avb-unlock-disabled=";
-	char *avb_min_ver = "avb-min-versions=";
+	char *rollback_indices;
+	char min_versions[ROLLBACK_MAX_SIZE + 1] = {0};
+	int n;
 
 	if (rk_avb_read_perm_attr_flag((uint8_t *)&temp_flag)) {
-		printf("Can not read perm_attr_flag!\n");
+		avb_error("Can not read perm_attr_flag!");
 		perm_attr_flag = "";
 	} else {
 		perm_attr_flag = temp_flag ? "1" : "0";
 	}
-	sprintf(buf, "%s%s%s%s", buf, avb_perm_attr_set, perm_attr_flag, crlf);
 
 	temp_flag = 0;
 	if (rk_avb_read_lock_state((uint8_t *)&temp_flag)) {
-		printf("Can not read lock state!\n");
+		avb_error("Can not read lock state!");
 		lock_val = "";
-		unlocK_dis_val = "";
+		unlock_dis_val = "";
 	} else {
 		lock_val = (temp_flag & LOCK_MASK) ? "0" : "1";
-		unlocK_dis_val = (temp_flag & UNLOCK_DISABLE_MASK) ? "1" : "0";
+		unlock_dis_val = (temp_flag & UNLOCK_DISABLE_MASK) ? "1" : "0";
 	}
-	sprintf(buf, "%s%s%s%s%s%s%s", buf, avb_lock, lock_val, crlf,
-		avb_unlock_dis, unlocK_dis_val, crlf);
 
 	temp_flag = 0;
 	if (rk_avb_read_bootloader_locked_flag((uint8_t *)&temp_flag)) {
-		printf("Can not read bootloader locked flag!\n");
+		avb_error("Can not read bootloader locked flag!");
 		bootloader_locked_flag = "";
 	} else {
 		bootloader_locked_flag = temp_flag ? "1" : "0";
 	}
-	sprintf(buf, "%s%s%s%s", buf, lock_state, bootloader_locked_flag, crlf);
 
-	if (rk_avb_read_all_rollback_index(temp_buffer))
-		printf("Can not avb_min_ver!\n");
-	sprintf(buf, "%s%s%s%s", buf, avb_min_ver, temp_buffer, crlf);
+	rollback_indices = malloc(VBOOT_STATE_SIZE);
+	if (!rollback_indices) {
+		avb_error("No buff to malloc!");
+		return;
+	}
+
+	memset(rollback_indices, 0, VBOOT_STATE_SIZE);
+	if (rk_avb_read_all_rollback_index(rollback_indices))
+		avb_error("Can not read avb_min_ver!");
 
 	/* bootloader-min-versions */
-	memset(temp_buffer, 0, 200);
-#ifdef CONFIG_SUPPORT_EMMC_RPMB
-	if (rk_avb_get_bootloader_min_version(temp_buffer))
+	if (rk_avb_get_bootloader_min_version(min_versions))
 		avb_error("Call rk_avb_get_bootloader_min_version error!");
-#else
-	memcpy(temp_buffer, "-1", strlen("-1"));
-#endif
-	sprintf(buf, "%s%s%s%s", buf, btld_min_ver, temp_buffer, crlf);
+
+	n = snprintf(buf, VBOOT_STATE_SIZE - 1,
+		     "avb-perm-attr-set=%s\n"
+		     "avb-locked=%s\n"
+		     "avb-unlock-disabled=%s\n"
+		     "bootloader-locked=%s\n"
+		     "avb-min-versions=%s\n"
+		     "bootloader-min-versions=%s\n",
+		     perm_attr_flag,
+		     lock_val,
+		     unlock_dis_val,
+		     bootloader_locked_flag,
+		     rollback_indices,
+		     min_versions);
+	if (n >= VBOOT_STATE_SIZE) {
+		avb_error("The VBOOT_STATE buf is truncated\n");
+		buf[VBOOT_STATE_SIZE - 1] = 0;
+	}
+	debug("The vboot state buf is %s\n", buf);
+	free(rollback_indices);
 }
 
 int rk_avb_get_ab_info(AvbABData* ab_data)

commit fc7985c1ac4247019a29125054b49540bacf18fa
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jun 27 21:46:55 2018 +0800

    android: add 'root=PARTUUID=xxx-xxx'
    
    Set 'root=PARTUUID=' to bootargs When use the CONFIG_ANDROID_AB.
    
    Change-Id: I9760f1a9ad67ba1f2cb334a0af50db464d87816b
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index db614a1575..bf4aa75172 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -39,6 +39,33 @@
 #define ANDROID_ARG_FDT_FILENAME "kernel.dtb"
 #endif
 #define OEM_UNLOCK_ARG_SIZE 30
+#define UUID_SIZE 37
+
+#if defined(CONFIG_ANDROID_AB) && !defined(CONFIG_ANDROID_AVB)
+static int get_partition_unique_uuid(char *partition,
+				     char *guid_buf,
+				     size_t guid_buf_size)
+{
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: Could not find device\n", __func__);
+		return -1;
+	}
+
+	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0) {
+		printf("Could not find \"%s\" partition\n", partition);
+		return -1;
+	}
+
+	if (guid_buf && guid_buf_size > 0)
+		memcpy(guid_buf, part_info.uuid, guid_buf_size);
+
+	return 0;
+}
+#endif
 
 char *android_str_append(char *base_name, char *slot_suffix)
 {
@@ -767,12 +794,35 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 #endif
 	printf("ANDROID: reboot reason: \"%s\"\n", android_boot_mode_str(mode));
 
+#ifdef CONFIG_ANDROID_AB
+	/*TODO: get from pre-loader or misc partition*/
+	if (rk_avb_get_current_slot(slot_suffix))
+		return -1;
+
+	if (slot_suffix[0] != '_') {
+		printf("There is no bootable slot!\n");
+		return -1;
+	}
+#endif
+
 	switch (mode) {
 	case ANDROID_BOOT_MODE_NORMAL:
 		/* In normal mode, we load the kernel from "boot" but append
 		 * "skip_initramfs" to the cmdline to make it ignore the
 		 * recovery initramfs in the boot partition.
 		 */
+#if defined(CONFIG_ANDROID_AB) && !defined(CONFIG_ANDROID_AVB)
+		char root_partition[20] = {0};
+		char guid_buf[UUID_SIZE] = {0};
+		char root_partuuid[70] = "root=PARTUUID=";
+
+		strcat(root_partition, ANDROID_PARTITION_SYSTEM);
+		strcat(root_partition, slot_suffix);
+		get_partition_unique_uuid(root_partition, guid_buf, UUID_SIZE);
+		strcat(root_partuuid, guid_buf);
+		env_update("bootargs", root_partuuid);
+#endif
+
 #ifdef CONFIG_ANDROID_AB
 		mode_cmdline = "skip_initramfs";
 #endif
@@ -793,17 +843,6 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 		return android_bootloader_boot_bootloader();
 	}
 
-#ifdef CONFIG_ANDROID_AB
-	/*TODO: get from pre-loader or misc partition*/
-	if (rk_avb_get_current_slot(slot_suffix))
-		return -1;
-
-	if (slot_suffix[0] != '_') {
-		printf("There is no bootable slot!\n");
-		return -1;
-	}
-#endif
-
 #ifdef CONFIG_ANDROID_AVB
 	if (android_slot_verify(boot_partname, load_address, slot_suffix))
 		return -1;

commit a737bf22c090c083294129ac36cde15d1c1ffbef
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Thu Aug 16 16:52:11 2018 +0800

    rockchip: clk: pll: Fix pll rate overflow calculation on 32-bit
    
    Change-Id: Ide0a10a19218443fa016ee91b5a18cfbf3e0948d
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_pll.c b/drivers/clk/rockchip/clk_pll.c
index 706b645623..6ace3db348 100644
--- a/drivers/clk/rockchip/clk_pll.c
+++ b/drivers/clk/rockchip/clk_pll.c
@@ -252,7 +252,7 @@ static ulong rk3036_pll_get_rate(struct rockchip_pll_clock *pll,
 {
 	u32 refdiv, fbdiv, postdiv1, postdiv2, dsmpd, frac;
 	u32 con = 0, shift, mask;
-	ulong rate = OSC_HZ;
+	ulong rate;
 
 	con = readl(base + pll->mode_offset);
 	shift = pll->mode_shift;
@@ -278,19 +278,16 @@ static ulong rk3036_pll_get_rate(struct rockchip_pll_clock *pll,
 		con = readl(base + pll->con_offset + 0x8);
 		frac = (con & RK3036_PLLCON2_FRAC_MASK) >>
 			RK3036_PLLCON2_FRAC_SHIFT;
-		rate *= fbdiv;
-		rate = rate / refdiv;
+		rate = (24 * fbdiv / (refdiv * postdiv1 * postdiv2)) * 1000000;
 		if (dsmpd == 0) {
-			ulong frac_rate = OSC_HZ;
+			u64 frac_rate = OSC_HZ * (u64)frac;
 
-			frac_rate = frac_rate  >> 12;
-			frac_rate = frac_rate * frac;
-			frac_rate = frac_rate  >> 12;
-			frac_rate = frac_rate / refdiv;
+			do_div(frac_rate, refdiv);
+			frac_rate >>= 24;
+			do_div(frac_rate, postdiv1);
+			do_div(frac_rate, postdiv1);
 			rate += frac_rate;
 		}
-		rate = rate / (postdiv1 * postdiv2);
-
 		return rate;
 	case RKCLK_PLL_MODE_DEEP:
 	default:

commit 9a7ebf31057d48c90fe59d4679dbf2cfdb0f005b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Aug 13 15:32:57 2018 +0800

    rockchip: rk3368: add evb rk3368 support
    
    Change-Id: Icd49c20a25e19eb66d797e17df5e128d7572fe73
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3368/Kconfig b/arch/arm/mach-rockchip/rk3368/Kconfig
index 7c9b722b00..5bdddfa7cc 100644
--- a/arch/arm/mach-rockchip/rk3368/Kconfig
+++ b/arch/arm/mach-rockchip/rk3368/Kconfig
@@ -40,6 +40,11 @@ config TARGET_EVB_PX5
          HDMI video input/output interface, audio codec ES8396,
          WIFI/BT (on RTL8723BS), Gsensor BMA250E and light&proximity
          sensor STK3410.
+
+config TARGET_EVB_RK3368
+	bool "RK3368 evaluation board"
+	select BOARD_LATE_INIT
+
 endchoice
 
 config SYS_SOC
@@ -49,6 +54,7 @@ source "board/theobroma-systems/lion_rk3368/Kconfig"
 source "board/rockchip/sheep_rk3368/Kconfig"
 source "board/geekbuying/geekbox/Kconfig"
 source "board/rockchip/evb_px5/Kconfig"
+source "board/rockchip/evb_rk3368/Kconfig"
 
 config SPL_LDSCRIPT
 	default "arch/arm/cpu/armv8/u-boot-spl.lds"
diff --git a/board/rockchip/evb_rk3368/Kconfig b/board/rockchip/evb_rk3368/Kconfig
new file mode 100644
index 0000000000..02722bd852
--- /dev/null
+++ b/board/rockchip/evb_rk3368/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_EVB_RK3368
+
+config SYS_BOARD
+	default "evb_rk3368"
+
+config SYS_VENDOR
+	default "rockchip"
+
+config SYS_CONFIG_NAME
+	default "evb_rk3368"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+
+endif
diff --git a/board/rockchip/evb_rk3368/Makefile b/board/rockchip/evb_rk3368/Makefile
new file mode 100644
index 0000000000..63ce0c52bf
--- /dev/null
+++ b/board/rockchip/evb_rk3368/Makefile
@@ -0,0 +1,7 @@
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+# Copyright (c) 2018 Rockchip Electronics Co., Ltd
+#
+
+obj-y	+= evb_rk3368.o
diff --git a/board/rockchip/evb_rk3368/evb_rk3368.c b/board/rockchip/evb_rk3368/evb_rk3368.c
new file mode 100644
index 0000000000..9382e88c30
--- /dev/null
+++ b/board/rockchip/evb_rk3368/evb_rk3368.c
@@ -0,0 +1,10 @@
+/*
+ * SPDX-License-Identifier:     GPL-2.0+
+ *
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
diff --git a/configs/rk3368_defconfig b/configs/rk3368_defconfig
new file mode 100644
index 0000000000..796476dcd2
--- /dev/null
+++ b/configs/rk3368_defconfig
@@ -0,0 +1,87 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0x1000
+CONFIG_TARGET_EVB_RK3368=y
+CONFIG_ROCKCHIP_RK3368=y
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3368-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_BOOTDELAY=0
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ARCH_EARLY_INIT_R=y
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_FASTBOOT_BUF_ADDR=0x800800
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_OEM_UNLOCK=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_NET is not set
+CONFIG_RKPARM_PARTITION=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_RK8XX_PWRKEY=y
+CONFIG_ADC_KEY=y
+CONFIG_GPIO_KEY=y
+CONFIG_RK_KEY=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PINCTRL=y
+CONFIG_DM_FUEL_GAUGE=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_DM_CHARGE_DISPLAY=y
+CONFIG_CHARGE_ANIMATION=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_RKNAND=y
+CONFIG_DEBUG_UART_BASE=0xff690000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x330a
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_DRM_ROCKCHIP_LVDS=y
+CONFIG_DRM_ROCKCHIP_RGB=y
+CONFIG_LCD=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_ERRNO_STR=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V1=y
+CONFIG_TEST_ROCKCHIP=y
diff --git a/include/configs/evb_rk3368.h b/include/configs/evb_rk3368.h
new file mode 100644
index 0000000000..0a1cad92ce
--- /dev/null
+++ b/include/configs/evb_rk3368.h
@@ -0,0 +1,27 @@
+/*
+ * SPDX-License-Identifier:     GPL-2.0+
+ *
+ * Copyright (c) 2018 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef __CONFIGS_RK3368_EVB_H
+#define __CONFIGS_RK3368_EVB_H
+
+#include <configs/rk3368_common.h>
+
+#ifndef CONFIG_SPL_BUILD
+
+#undef ROCKCHIP_DEVICE_SETTINGS
+#define ROCKCHIP_DEVICE_SETTINGS \
+		"stdout=serial,vidconsole\0" \
+		"stderr=serial,vidconsole\0"
+
+#undef CONFIG_BOOTCOMMAND
+#define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
+#endif
+
+/* rockchip ohci host driver */
+#define CONFIG_USB_OHCI_NEW
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	1
+
+#endif
diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h
index eead7b22ce..0013e3cc4e 100644
--- a/include/configs/rk3368_common.h
+++ b/include/configs/rk3368_common.h
@@ -24,6 +24,7 @@
 #define CONFIG_SYS_TEXT_BASE		0x00200000
 #define CONFIG_SYS_INIT_SP_ADDR		0x00300000
 #define CONFIG_SYS_LOAD_ADDR		0x00280000
+#define CONFIG_SYS_BOOTM_LEN		(64 << 20)	/* 64M */
 
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_TEXT_BASE            0x00000000
@@ -37,6 +38,10 @@
 #define CONFIG_ROCKUSB_G_DNL_PID	0x330A
 
 #define CONFIG_BOUNCE_BUFFER
+#define COUNTER_FREQUENCY              24000000
+#define CONFIG_PREBOOT
+
+#define CONFIG_SUPPORT_EMMC_RPMB
 
 #ifndef CONFIG_SPL_BUILD
 
@@ -46,14 +51,21 @@
 #define ENV_MEM_LAYOUT_SETTINGS \
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
-	"fdt_addr_r=0x5600000\0" \
-	"kernel_addr_r=0x280000\0" \
-	"ramdisk_addr_r=0x5bf0000\0"
+	"fdt_addr_r=0x01f00000\0" \
+	"kernel_addr_r=0x02080000\0" \
+	"ramdisk_addr_r=0x0a200000\0"
 
 #include <config_distro_bootcmd.h>
 
+#ifndef ROCKCHIP_DEVICE_SETTINGS
+#define ROCKCHIP_DEVICE_SETTINGS
+#endif
+
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	ENV_MEM_LAYOUT_SETTINGS	\
+	"partitions=" PARTS_DEFAULT \
+	RKIMG_DET_BOOTDEV \
+	ROCKCHIP_DEVICE_SETTINGS \
 	BOOTENV
 
 #endif

commit e0b87408200cb831103ab95ad5f0bc93fc2bb8ec
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Aug 13 15:33:26 2018 +0800

    rockchip: board: rk3368 usb suppots find node by compatible
    
    Change-Id: I02873c9a111023b79711fc895a87973c58690687
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 29c3409005..8da7c6dfac 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -306,10 +306,18 @@ int board_usb_init(int index, enum usb_init_type init)
 		/*
 		 * With kernel dtb support, rk3288 dwc2 otg node
 		 * use the rockchip legacy dwc2 driver "dwc_otg_310"
-		 * with the compatible "rockchip,rk3288_usb20_otg".
+		 * with the compatible "rockchip,rk3288_usb20_otg",
+		 * and rk3368 also use the "dwc_otg_310" driver with
+		 * the compatible "rockchip,rk3368-usb".
 		 */
+#if defined(CONFIG_ROCKCHIP_RK3288)
 		node = fdt_node_offset_by_compatible(blob, -1,
 				"rockchip,rk3288_usb20_otg");
+#elif defined(CONFIG_ROCKCHIP_RK3368)
+		node = fdt_node_offset_by_compatible(blob, -1,
+				"rockchip,rk3368-usb");
+#endif
+
 		if (node > 0) {
 			matched = true;
 		} else {

commit 9e228ce33860a82a572651bbb333ae1583054c87
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 16 15:28:43 2018 +0800

    android: dtbo: fix "androidboot.dtbo_" => "androidboot.dtbo_idx="
    
    Change-Id: Iefc050e4c503d5e79843c840a8d0b3a002dd9833
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 5f23df7169..db614a1575 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -716,7 +716,7 @@ int android_fdt_overlay_apply(void *fdt_addr)
 		fdt_increase_size(fdt_addr, fdt_totalsize((void *)fdt_dtbo));
 		ret = fdt_overlay_apply(fdt_addr, (void *)fdt_dtbo);
 		if (!ret) {
-			snprintf(buf, 32, "%s%d", "androidboot.dtbo_", index);
+			snprintf(buf, 32, "%s%d", "androidboot.dtbo_idx=", index);
 			env_update("bootargs", buf);
 			printf("ANDROID: fdt overlay OK\n");
 		} else {

commit 45484bdc51522056c9474a6ce666e2186a2d5e42
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Wed Aug 15 10:23:18 2018 +0800

    rockchip: clk: px30: Add support to initialize npll rate
    
    Change-Id: If98ed54ad785a40efae7da78c5f0122158a3de61
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_px30.h b/arch/arm/include/asm/arch-rockchip/cru_px30.h
index f94def58ca..ca4655b40d 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_px30.h
@@ -14,6 +14,7 @@
 
 #define APLL_HZ		(600 * MHz)
 #define GPLL_HZ		(1200 * MHz)
+#define NPLL_HZ		(1188 * MHz)
 #define ACLK_BUS_HZ	(200 * MHz)
 #define HCLK_BUS_HZ	(150 * MHz)
 #define PCLK_BUS_HZ	(100 * MHz)
diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 888dbd3697..adbf431a68 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -1412,6 +1412,7 @@ static void px30_clk_init(struct px30_pmuclk_priv *priv)
 {
 	struct udevice *cru_dev;
 	struct px30_clk_priv *cru_priv;
+	ulong npll_hz;
 	int ret;
 
 	priv->gpll_hz = px30_gpll_get_pmuclk(priv);
@@ -1431,6 +1432,13 @@ static void px30_clk_init(struct px30_pmuclk_priv *priv)
 	cru_priv = dev_get_priv(cru_dev);
 	cru_priv->gpll_hz = priv->gpll_hz;
 
+	npll_hz = px30_clk_get_pll_rate(cru_priv, NPLL);
+	if (npll_hz != NPLL_HZ) {
+		ret = px30_clk_set_pll_rate(cru_priv, NPLL, NPLL_HZ);
+		if (ret < 0)
+			printf("%s failed to set npll rate\n", __func__);
+	}
+
 	px30_bus_set_clk(cru_priv, ACLK_BUS_PRE, ACLK_BUS_HZ);
 	px30_bus_set_clk(cru_priv, HCLK_BUS_PRE, HCLK_BUS_HZ);
 	px30_bus_set_clk(cru_priv, PCLK_BUS_PRE, PCLK_BUS_HZ);

commit bd0eec95300f1e8052d3d0237e4913df2d7194c5
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Fri Aug 10 12:01:01 2018 +0800

    configs: rockchip: rk3308: enable rockchip vendor partition config
    
    Change-Id: Ib884f96b997c8931063cf3d766fabb64f4eeb131
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index 48ac5837a6..29a7ad44e9 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -66,3 +66,4 @@ CONFIG_SPL_TINY_MEMSET=y
 CONFIG_LZ4=y
 CONFIG_LZO=y
 CONFIG_ERRNO_STR=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y

commit 40bd3f862c2b01e6741c2e24eaecf8665662d8f8
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Fri Aug 10 11:58:11 2018 +0800

    drivers: rkflash: register vendor ops interface
    
    Change-Id: I518c31db29d785d311d7f5695d8017ea679888dd
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/rkflash_api.c b/drivers/rkflash/rkflash_api.c
index a52d2a9f02..26c82a780f 100644
--- a/drivers/rkflash/rkflash_api.c
+++ b/drivers/rkflash/rkflash_api.c
@@ -168,6 +168,35 @@ u32 rksfc_nand_get_density(struct udevice *udev)
 {
 	return sftl_get_density();
 }
+
+int rksfc_nand_vendor_read(struct blk_desc *dev_desc,
+			   u32 sec,
+			   u32 n_sec,
+			   void *p_data)
+{
+	int ret;
+
+	ret = sftl_vendor_read(sec, n_sec, (u8 *)p_data);
+	if (!ret)
+		return n_sec;
+	else
+		return -EIO;
+}
+
+int rksfc_nand_vendor_write(struct blk_desc *dev_desc,
+			    u32 sec,
+			    u32 n_sec,
+			    void *p_data)
+{
+	int ret;
+
+	ret = sftl_vendor_write(sec, n_sec, (u8 *)p_data);
+	if (!ret)
+		return n_sec;
+	else
+		return -EIO;
+}
+
 #endif
 
 #ifdef CONFIG_RKNANDC_NAND
@@ -205,4 +234,33 @@ u32 rknand_flash_get_density(struct udevice *udev)
 {
 	return sftl_get_density();
 }
+
+int rknand_flash_vendor_read(struct blk_desc *dev_desc,
+			     u32 sec,
+			     u32 n_sec,
+			     void *p_data)
+{
+	int ret;
+
+	ret = sftl_vendor_read(sec, n_sec, (u8 *)p_data);
+	if (!ret)
+		return n_sec;
+	else
+		return -EIO;
+}
+
+int rknand_flash_vendor_write(struct blk_desc *dev_desc,
+			      u32 sec,
+			      u32 n_sec,
+			      void *p_data)
+{
+	int ret;
+
+	ret = sftl_vendor_write(sec, n_sec, (u8 *)p_data);
+	if (!ret)
+		return n_sec;
+	else
+		return -EIO;
+}
+
 #endif
diff --git a/drivers/rkflash/rkflash_api.h b/drivers/rkflash/rkflash_api.h
index f1f9bfee39..9c4563f7f0 100644
--- a/drivers/rkflash/rkflash_api.h
+++ b/drivers/rkflash/rkflash_api.h
@@ -43,6 +43,14 @@ int rksfc_nand_write(struct udevice *udev,
 		     u32 index,
 		     u32 count,
 		     const void *buf);
+int rksfc_nand_vendor_read(struct blk_desc *dev_desc,
+			   u32 sec,
+			   u32 n_sec,
+			   void *p_data);
+int rksfc_nand_vendor_write(struct blk_desc *dev_desc,
+			    u32 sec,
+			    u32 n_sec,
+			    void *p_data);
 #endif
 
 #ifdef CONFIG_RKNANDC_NAND
@@ -55,5 +63,14 @@ int rknand_flash_write(struct udevice *udev,
 		       u32 index,
 		       u32 count,
 		       const void *buf);
+int rknand_flash_vendor_read(struct blk_desc *dev_desc,
+			     u32 sec,
+			     u32 n_sec,
+			     void *p_data);
+int rknand_flash_vendor_write(struct blk_desc *dev_desc,
+			      u32 sec,
+			      u32 n_sec,
+			      void *p_data);
+
 #endif
 #endif
diff --git a/drivers/rkflash/rknandc_base.c b/drivers/rkflash/rknandc_base.c
index 9b9de4a63d..30e0c680a9 100644
--- a/drivers/rkflash/rknandc_base.c
+++ b/drivers/rkflash/rknandc_base.c
@@ -9,6 +9,7 @@
 #include <dm.h>
 #include <dm/device-internal.h>
 #include <asm/arch/clock.h>
+#include <asm/arch/vendor.h>
 
 #include "rkflash_blk.h"
 #include "rkflash_api.h"
@@ -21,8 +22,8 @@ static struct flash_operation nandc_flash_op = {
 	rknand_flash_read,
 	rknand_flash_write,
 	NULL,
-	NULL,
-	NULL,
+	rknand_flash_vendor_read,
+	rknand_flash_vendor_write,
 #else
 	-1, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
 #endif
@@ -92,6 +93,10 @@ static int rockchip_nand_probe(struct udevice *udev)
 		priv->read = nandc_flash_op.flash_read;
 		priv->write = nandc_flash_op.flash_write;
 		priv->erase = nandc_flash_op.flash_erase;
+#ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
+		flash_vendor_dev_ops_register(nandc_flash_op.vendor_read,
+					      nandc_flash_op.vendor_write);
+#endif
 		debug("%s probe success\n", __func__);
 	}
 
diff --git a/drivers/rkflash/rksfc_base.c b/drivers/rkflash/rksfc_base.c
index 299197250e..d9075a3e74 100644
--- a/drivers/rkflash/rksfc_base.c
+++ b/drivers/rkflash/rksfc_base.c
@@ -10,6 +10,7 @@
 #include <dm/device-internal.h>
 #include <asm/arch/clock.h>
 #include <rksfc.h>
+#include <asm/arch/vendor.h>
 
 #include "rkflash_blk.h"
 #include "rkflash_api.h"
@@ -37,8 +38,8 @@ static struct flash_operation sfc_nand_op = {
 	rksfc_nand_read,
 	rksfc_nand_write,
 	NULL,
-	NULL,
-	NULL,
+	rksfc_nand_vendor_read,
+	rksfc_nand_vendor_write,
 #else
 	-1, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
 #endif
@@ -120,6 +121,10 @@ static int rockchip_rksfc_probe(struct udevice *udev)
 				spi_flash_op[i]->flash_get_capacity(udev);
 			priv->read = spi_flash_op[i]->flash_read;
 			priv->write = spi_flash_op[i]->flash_write;
+#ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
+			flash_vendor_dev_ops_register(spi_flash_op[i]->vendor_read,
+						      spi_flash_op[i]->vendor_write);
+#endif
 			debug("%s probe success\n", __func__);
 			break;
 		}

commit 38ba45ea839f8da970de2176e5564225b4719dcd
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Wed Aug 15 09:18:57 2018 +0800

    configs: rockchip: Enable drm tve for some platform
    
    include platform: rk3229, rk3128h, rk3328.
    
    Change-Id: I9de8e83884e60cb30426ccb1b81e04b9b73fe00c
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>

diff --git a/configs/rk3128x_defconfig b/configs/rk3128x_defconfig
index 2c669fb4b4..665f8a226d 100644
--- a/configs/rk3128x_defconfig
+++ b/configs/rk3128x_defconfig
@@ -106,6 +106,7 @@ CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_HDMI=y
 CONFIG_ROCKCHIP_INNO_HDMI_PHY=y
+CONFIG_ROCKCHIP_DRM_TVE=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
diff --git a/configs/rk322x_defconfig b/configs/rk322x_defconfig
index cbe1cfdb54..bd8b4daf4f 100644
--- a/configs/rk322x_defconfig
+++ b/configs/rk322x_defconfig
@@ -101,6 +101,7 @@ CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_HDMI=y
 CONFIG_ROCKCHIP_INNO_HDMI_PHY=y
+CONFIG_ROCKCHIP_DRM_TVE=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index 348a08fd9e..82324f27f7 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -110,6 +110,7 @@ CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_HDMI=y
 CONFIG_ROCKCHIP_INNO_HDMI_PHY=y
+CONFIG_ROCKCHIP_DRM_TVE=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y

commit 87d9371f0078a75649b8c1db691a170e43eb202c
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Wed Aug 15 09:15:36 2018 +0800

    configs: rockchip: Enable drm hdmi for some platform
    
    include platform: rk3229, rk3128h, rk3328, rk3399.
    
    Change-Id: I3f1cbc3a6c68a2349b76a4e13c6103d53b2c41ae
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>

diff --git a/configs/rk3128x_defconfig b/configs/rk3128x_defconfig
index baa869aa2a..2c669fb4b4 100644
--- a/configs/rk3128x_defconfig
+++ b/configs/rk3128x_defconfig
@@ -104,6 +104,8 @@ CONFIG_G_DNL_PRODUCT_NUM=0xd00d
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_DW_HDMI=y
+CONFIG_ROCKCHIP_INNO_HDMI_PHY=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
diff --git a/configs/rk322x_defconfig b/configs/rk322x_defconfig
index 40380018f0..cbe1cfdb54 100644
--- a/configs/rk322x_defconfig
+++ b/configs/rk322x_defconfig
@@ -99,6 +99,8 @@ CONFIG_G_DNL_PRODUCT_NUM=0xd00d
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_DW_HDMI=y
+CONFIG_ROCKCHIP_INNO_HDMI_PHY=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index 843879ba5e..348a08fd9e 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -108,6 +108,8 @@ CONFIG_G_DNL_PRODUCT_NUM=0x330a
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_DW_HDMI=y
+CONFIG_ROCKCHIP_INNO_HDMI_PHY=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
index 0b64fb61e0..cff3149344 100644
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -109,6 +109,7 @@ CONFIG_USB_ETHER_SMSC95XX=y
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_DW_HDMI=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
 CONFIG_DRM_ROCKCHIP_LVDS=y

commit a7df48681ab2521f4431d27f5bd1b30cb49f3b91
Author: tony.xu <tony.xu@rock-chips.com>
Date:   Sat Aug 11 17:02:29 2018 +0800

    load keybox to secure storage thtough u-boot: u-boot->ca->ta
    
    Change-Id: Ifdf237ec235c791565d2da1b5881df2f1499d422
    Signed-off-by: tony.xu <tony.xu@rock-chips.com>

diff --git a/include/optee_include/c11fe8ac-b997-48cf-a28de2a55e5240ef.h b/include/optee_include/c11fe8ac-b997-48cf-a28de2a55e5240ef.h
new file mode 100644
index 0000000000..4b2aeff231
--- /dev/null
+++ b/include/optee_include/c11fe8ac-b997-48cf-a28de2a55e5240ef.h
@@ -0,0 +1,12 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#ifndef _WIDEVINE_TA_H_
+#define _WIDEVINE_TA_H_
+
+extern const uint8_t widevine_keybox_data[];
+extern const uint32_t widevine_keybox_size;
+
+#endif /* _WIDEVINE_TA_H_ */
diff --git a/lib/optee_clientApi/Makefile b/lib/optee_clientApi/Makefile
index 989dfc2b72..552135f4da 100644
--- a/lib/optee_clientApi/Makefile
+++ b/lib/optee_clientApi/Makefile
@@ -16,6 +16,11 @@ obj-y += 258be795-f9ca-40e6-a8699ce6886c5d5d.o
 lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.o: lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c
 lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c: lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta
 	$(srctree)/lib/optee_clientApi/tabinary_to_cfile.py --prefix keymaster --TA $< --out $@
+
+obj-y += c11fe8ac-b997-48cf-a28de2a55e5240ef.o
+lib/optee_clientApi/c11fe8ac-b997-48cf-a28de2a55e5240ef.o: lib/optee_clientApi/c11fe8ac-b997-48cf-a28de2a55e5240ef.c
+lib/optee_clientApi/c11fe8ac-b997-48cf-a28de2a55e5240ef.c: lib/optee_clientApi/c11fe8ac-b997-48cf-a28de2a55e5240ef.ta
+	$(srctree)/lib/optee_clientApi/tabinary_to_cfile.py --prefix widevine_keybox --TA $< --out $@
 endif
 
 ifdef CONFIG_OPTEE_V2
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index 8c7c3dc1b7..166c00446f 100755
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -10,6 +10,190 @@
 #include <optee_include/tee_client_api.h>
 #include <optee_include/tee_api_defines.h>
 #include <boot_rkimg.h>
+#include <stdlib.h>
+
+#define	BOOT_FROM_EMMC	(1 << 1)
+
+uint32_t rk_send_keybox_to_ta(uint8_t *filename, uint32_t filename_size,
+			      TEEC_UUID uuid,
+			      uint8_t *key, uint32_t key_size,
+			      uint8_t *data, uint32_t data_size)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+
+	TEEC_UUID *TeecUuid = &uuid;
+	TEEC_Operation TeecOperation = {0};
+
+	struct blk_desc *dev_desc;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
+
+	OpteeClientApiLibInitialize();
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						    TEEC_NONE,
+						    TEEC_NONE,
+						    TEEC_NONE);
+
+	/* 0 nand or emmc "security" partition , 1 rpmb */
+	TeecOperation.params[0].value.a =
+		(dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				      &TeecSession,
+				      TeecUuid,
+				      TEEC_LOGIN_PUBLIC,
+				      NULL,
+				      &TeecOperation,
+				      &ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = filename_size;
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	memcpy(SharedMem0.buffer, filename, SharedMem0.size);
+
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = key_size;
+	SharedMem1.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+
+	memcpy(SharedMem1.buffer, key, SharedMem1.size);
+
+	TEEC_SharedMemory SharedMem2 = {0};
+
+	SharedMem2.size = data_size;
+	SharedMem2.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem2);
+
+	memcpy(SharedMem2.buffer, data, SharedMem2.size);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+
+	TeecOperation.params[2].tmpref.buffer = SharedMem2.buffer;
+	TeecOperation.params[2].tmpref.size = SharedMem2.size;
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						    TEEC_MEMREF_TEMP_INPUT,
+						    TEEC_MEMREF_TEMP_INOUT,
+						    TEEC_NONE);
+
+	printf("check: does keybox exised in secure storage...\n");
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					122,
+					&TeecOperation,
+					&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS) {
+		printf("no keybox in secure storage, write keybox to secure storage\n");
+		TeecResult = TEEC_InvokeCommand(&TeecSession,
+						121,
+						&TeecOperation,
+						&ErrorOrigin);
+		if (TeecResult != TEEC_SUCCESS) {
+			printf("send data to TA failed with code 0x%x\n", TeecResult);
+		} else {
+			printf("send data to TA success with code 0x%x\n", TeecResult);
+		}
+	}
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+	TEEC_ReleaseSharedMemory(&SharedMem2);
+
+	TEEC_CloseSession(&TeecSession);
+	TEEC_FinalizeContext(&TeecContext);
+
+	return TeecResult;
+}
+
+int write_keybox_to_secure_storage(uint8_t *uboot_data, uint32_t len)
+{
+	typedef struct VENDOR_DATA {
+		uint8_t tag[4];
+		uint32_t key_size;
+		uint32_t data_size;
+		uint8_t *all_data;
+	} VENDOR_DATA;
+
+	uint8_t *key = NULL;
+	uint8_t *data = NULL;
+	VENDOR_DATA tmp_data;
+
+	memset(&tmp_data, 0, sizeof(VENDOR_DATA));
+	memcpy(tmp_data.tag, uboot_data, 4);
+	tmp_data.key_size = *(uboot_data + 4);
+	tmp_data.data_size = *(uboot_data + 8);
+	tmp_data.all_data = malloc(tmp_data.key_size + tmp_data.data_size);
+	memcpy(tmp_data.all_data, uboot_data + 12,
+	       tmp_data.key_size + tmp_data.data_size);
+
+	uint8_t widevine_tag[] = {'K', 'B', 'O', 'X'};
+	uint8_t tag[] = {0};
+
+	uint32_t object_id = 101;
+
+	TEEC_UUID tmp_uuid;
+
+	if (memcmp(uboot_data, widevine_tag, 4) == 0) {
+		TEEC_UUID widevine_uuid = { 0xc11fe8ac, 0xb997, 0x48cf,
+			{ 0xa2, 0x8d, 0xe2, 0xa5, 0x5e, 0x52, 0x40, 0xef} };
+		tmp_uuid = widevine_uuid;
+		memcpy(tag, uboot_data, 4);
+		printf("check tag success! %s\n", tag);
+	} else {
+		memcpy(tag, uboot_data, 4);
+		printf("check tag failed! %s\n", tag);
+	}
+
+	key = malloc(tmp_data.key_size);
+	if (!key) {
+		printf("Malloc key failed!!\n");
+		goto reboot;
+	}
+
+	data = malloc(tmp_data.data_size);
+	if (!data) {
+		printf("Malloc data failed!!\n");
+		goto reboot;
+	}
+
+	memcpy(key, tmp_data.all_data, tmp_data.key_size);
+	memcpy(data, tmp_data.all_data + tmp_data.key_size,
+	       tmp_data.data_size);
+
+	rk_send_keybox_to_ta((uint8_t *)&object_id, sizeof(uint32_t),
+			     tmp_uuid,
+			     key, tmp_data.key_size,
+			     data, tmp_data.data_size);
+reboot:
+	if (key)
+		free(key);
+	if (data)
+		free(data);
+	if (tmp_data.all_data)
+	free(tmp_data.all_data);
+
+	memset(&tmp_data, 0, sizeof(VENDOR_DATA));
+	return 0;
+}
 
 void test_optee(void)
 {
@@ -17,7 +201,7 @@ void test_optee(void)
 	TEEC_Context TeecContext;
 	TEEC_Session TeecSession;
 	uint32_t ErrorOrigin;
-	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142, \
 		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
@@ -1828,4 +2012,4 @@ TEEC_Result trusty_read_oem_unlock(uint8_t *unlock)
 	}
 
 	return ret;
-}
\ No newline at end of file
+}
diff --git a/lib/optee_clientApi/OpteeClientRPC.c b/lib/optee_clientApi/OpteeClientRPC.c
index 810665f3af..9de072765e 100644
--- a/lib/optee_clientApi/OpteeClientRPC.c
+++ b/lib/optee_clientApi/OpteeClientRPC.c
@@ -16,6 +16,7 @@
 #include <optee_include/tee_rpc_types.h>
 #include <optee_include/tee_rpc.h>
 #include <optee_include/258be795-f9ca-40e6-a8699ce6886c5d5d.h>
+#include <optee_include/c11fe8ac-b997-48cf-a28de2a55e5240ef.h>
 #ifdef CONFIG_OPTEE_V1
 #include <optee_include/OpteeClientRkFs.h>
 #endif
@@ -55,6 +56,25 @@ TEEC_Result OpteeRpcFree(uint32_t Address)
 	return TEEC_SUCCESS;
 }
 
+int is_uuid_equal(TEE_UUID uuid1, TEEC_UUID uuid2)
+{
+	bool a, b, c;
+
+	a = (uuid1.timeLow == uuid2.timeLow);
+	b = (uuid1.timeMid == uuid2.timeMid);
+	c = (uuid1.timeHiAndVersion == uuid2.timeHiAndVersion);
+	if ((a & b & c) == 0) {
+		return 0;
+	} else {
+		if (memcmp(uuid1.clockSeqAndNode,
+			   uuid2.clockSeqAndNode, 8) == 0) {
+			return 1;
+		} else {
+			return 0;
+		}
+	}
+}
+
 /*
  * Load a TA from storage into memory and provide it back to OpTEE.
  * Param[0] = IN: struct tee_rpc_load_ta_cmd
@@ -72,6 +92,8 @@ TEEC_Result OpteeRpcCmdLoadTa(t_teesmc32_arg *TeeSmc32Arg)
 		goto Exit;
 	}
 
+	TEEC_UUID TA_RK_KEYMASTER_UUID = {0x258be795, 0xf9ca, 0x40e6,
+			{0xa8, 0x69, 0x9c, 0xe6, 0x88, 0x6c, 0x5d, 0x5d} };
 	TeeSmc32Param = TEESMC32_GET_PARAMS(TeeSmc32Arg);
 	TeeLoadTaCmd = (struct tee_rpc_load_ta_cmd *)
 					(size_t)TeeSmc32Param[0].u.memref.buf_ptr;
@@ -88,8 +110,13 @@ TEEC_Result OpteeRpcCmdLoadTa(t_teesmc32_arg *TeeSmc32Arg)
 	uint32_t ImageSize = 0;
 	size_t AllocAddress = 0;
 
-	ImageData = (void *)keymaster_data;
-	ImageSize = keymaster_size;
+	if (is_uuid_equal(TeeLoadTaCmd->uuid, TA_RK_KEYMASTER_UUID)) {
+		ImageData = (void *)keymaster_data;
+		ImageSize = keymaster_size;
+	} else {
+		ImageData = (void *)widevine_keybox_data;
+		ImageSize = widevine_keybox_size;
+	}
 
 	if (Status != 0) {
 		TeecResult = TEEC_ERROR_ITEM_NOT_FOUND;
diff --git a/lib/optee_clientApi/c11fe8ac-b997-48cf-a28de2a55e5240ef.ta b/lib/optee_clientApi/c11fe8ac-b997-48cf-a28de2a55e5240ef.ta
new file mode 100644
index 0000000000..2d466e3223
Binary files /dev/null and b/lib/optee_clientApi/c11fe8ac-b997-48cf-a28de2a55e5240ef.ta differ

commit c3b76d4826959a1bb13b12d8acc87c35c78fe1b9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Aug 13 15:44:49 2018 +0800

    rockchip: rk3368: init uart2 early debug console iomux
    
    Change-Id: Ia5e1a0daf50ab509919f81f68a6ac590d93d4d2e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3368/rk3368.c b/arch/arm/mach-rockchip/rk3368/rk3368.c
index 0978b66b7f..e82b631138 100644
--- a/arch/arm/mach-rockchip/rk3368/rk3368.c
+++ b/arch/arm/mach-rockchip/rk3368/rk3368.c
@@ -220,16 +220,16 @@ static void sgrf_init(void)
 
 void board_debug_uart_init(void)
 {
-#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000)
 	/*
 	 * N.B.: This is called before the device-model has been
 	 *       initialised. For this reason, we can not access
 	 *       the GRF address range using the syscon API.
 	 */
-	struct rk3368_grf * const grf =
+	struct rk3368_grf * const grf __maybe_unused =
 		(struct rk3368_grf * const)0xff770000;
 
 	enum {
+		/* UART0 */
 		GPIO2D1_MASK            = GENMASK(3, 2),
 		GPIO2D1_GPIO            = 0,
 		GPIO2D1_UART0_SOUT      = (1 << 2),
@@ -237,13 +237,29 @@ void board_debug_uart_init(void)
 		GPIO2D0_MASK            = GENMASK(1, 0),
 		GPIO2D0_GPIO            = 0,
 		GPIO2D0_UART0_SIN       = (1 << 0),
+
+		/* UART2 */
+		GPIO2A6_MASK		= GENMASK(13, 12),
+		GPIO2A6_GPIO		= 0,
+		GPIO2A6_UART0_SIN      = (1 << 13),
+
+		GPIO2A5_MASK		= GENMASK(11, 10),
+		GPIO2A5_GPIO		= 0,
+		GPIO2A5_UART0_SOUT	 = (1 << 11),
 	};
 
+#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000)
 	/* Enable early UART0 on the RK3368 */
 	rk_clrsetreg(&grf->gpio2d_iomux,
 		     GPIO2D0_MASK, GPIO2D0_UART0_SIN);
 	rk_clrsetreg(&grf->gpio2d_iomux,
 		     GPIO2D1_MASK, GPIO2D1_UART0_SOUT);
+#elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff690000)
+	/* Enable early UART2 on the RK3368 */
+	rk_clrsetreg(&grf->gpio2a_iomux,
+		     GPIO2A6_MASK, GPIO2A6_UART0_SIN);
+	rk_clrsetreg(&grf->gpio2a_iomux,
+		     GPIO2A5_MASK, GPIO2A5_UART0_SOUT);
 #endif
 }
 

commit f2b393098883049206f30567da2f280194d286e2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Aug 13 15:30:31 2018 +0800

    rockchip: rk3368: scan sub-nodes of the syscon node
    
    Change-Id: I209a149b8de280580a7f219cede7bf2ebc69f416
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3368/syscon_rk3368.c b/arch/arm/mach-rockchip/rk3368/syscon_rk3368.c
index 99d51f0edc..17b411f0be 100644
--- a/arch/arm/mach-rockchip/rk3368/syscon_rk3368.c
+++ b/arch/arm/mach-rockchip/rk3368/syscon_rk3368.c
@@ -26,6 +26,9 @@ static const struct udevice_id rk3368_syscon_ids[] = {
 U_BOOT_DRIVER(syscon_rk3368) = {
 	.name = "rk3368_syscon",
 	.id = UCLASS_SYSCON,
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	.bind = dm_scan_fdt_dev,
+#endif
 	.of_match = rk3368_syscon_ids,
 };
 

commit 2ddecca3501a6f2086bf3dce915d4845db43bac6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Aug 13 15:30:07 2018 +0800

    rockchip: dts: rk3368: add rk3368-evb.dts
    
    Change-Id: I7cc415f6a100b26c619d7f199f4d9e781407379a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3368-evb.dts b/arch/arm/dts/rk3368-evb.dts
new file mode 100644
index 0000000000..6461d8a3b2
--- /dev/null
+++ b/arch/arm/dts/rk3368-evb.dts
@@ -0,0 +1,56 @@
+/*
+ * SPDX-License-Identifier:     GPL-2.0+
+ *
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ */
+
+/dts-v1/;
+#include "rk3368.dtsi"
+#include "rk3368-u-boot.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Rockchip RK3399 Evaluation Board";
+	compatible = "rockchip,rk3368-evb", "rockchip,rk3368";
+
+	chosen {
+		stdout-path = "serial2:115200n8";
+	};
+};
+
+&emmc {
+	fifo-mode;
+	bus-width = <8>;
+	cap-mmc-highspeed;
+	supports-emmc;
+	disable-wp;
+	non-removable;
+	num-slots = <1>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
+	status = "okay";
+};
+
+&uart2 {
+	status = "okay";
+};
+
+&u2phy {
+	status = "okay";
+
+	u2phy_host: host-port {
+		status = "okay";
+	};
+};
+
+&usb_host0_ehci {
+	status = "okay";
+};
+
+&usb_host0_ohci {
+	status = "okay";
+};
+
+&usb_otg {
+	status = "okay";
+};
diff --git a/arch/arm/dts/rk3368-u-boot.dtsi b/arch/arm/dts/rk3368-u-boot.dtsi
new file mode 100644
index 0000000000..cd53b84579
--- /dev/null
+++ b/arch/arm/dts/rk3368-u-boot.dtsi
@@ -0,0 +1,46 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+/ {
+	aliases {
+		mmc0 = &emmc;
+		mmc1 = &sdmmc;
+	};
+};
+
+&uart2 {
+	clock-frequency = <24000000>;
+	u-boot,dm-pre-reloc;
+};
+
+&sdmmc {
+	u-boot,dm-pre-reloc;
+};
+
+&emmc {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&service_msch {
+	u-boot,dm-pre-reloc;
+};
+
+&dmc {
+	u-boot,dm-pre-reloc;
+};
+
+&pmugrf {
+	u-boot,dm-pre-reloc;
+};
+
+&cru {
+	u-boot,dm-pre-reloc;
+};
+
+&grf {
+	u-boot,dm-pre-reloc;
+};
\ No newline at end of file

commit 57702281391371e32d88091dc970c274ddc4137f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Aug 13 15:28:50 2018 +0800

    rockchip: dts: rk3368: add usb host/phy nodes
    
    Change-Id: I8f7e33d204c63f5455dd33e5b254998e6f20d0da
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3368.dtsi b/arch/arm/dts/rk3368.dtsi
index 70f432ced1..8bc18d8627 100644
--- a/arch/arm/dts/rk3368.dtsi
+++ b/arch/arm/dts/rk3368.dtsi
@@ -544,6 +544,19 @@
 		interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru HCLK_HOST0>;
 		clock-names = "usbhost";
+		phys = <&u2phy_host>;
+		phy-names = "usb";
+		status = "disabled";
+	};
+
+	usb_host0_ohci: usb@ff520000 {
+		compatible = "generic-ohci";
+		reg = <0x0 0xff520000 0x0 0x20000>;
+		interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_HOST0>, <&u2phy>;
+		clock-names = "usbhost", "utmi";
+		phys = <&u2phy_host>;
+		phy-names = "usb";
 		status = "disabled";
 	};
 
@@ -559,6 +572,8 @@
 		g-rx-fifo-size = <275>;
 		g-tx-fifo-size = <256 128 128 64 64 32>;
 		g-use-dma;
+		phys = <&u2phy_otg>;
+		phy-names = "usb2-phy";
 		status = "disabled";
 	};
 
@@ -677,6 +692,37 @@
 	grf: syscon@ff770000 {
 		compatible = "rockchip,rk3368-grf", "syscon";
 		reg = <0x0 0xff770000 0x0 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		u2phy: usb2-phy@700 {
+			compatible = "rockchip,rk3368-usb2phy";
+			reg = <0x700 0x2c>;
+			clocks = <&cru SCLK_OTGPHY0>;
+			clock-names = "phyclk";
+			#clock-cells = <0>;
+			clock-output-names = "usbotg_out";
+			assigned-clocks = <&cru SCLK_USBPHY480M>;
+			assigned-clock-parents = <&u2phy>;
+			status = "disabled";
+
+			u2phy_otg: otg-port {
+				#phy-cells = <0>;
+				interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
+					     <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
+					     <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
+				interrupt-names = "otg-bvalid", "otg-id",
+						  "linestate";
+				status = "disabled";
+			};
+
+			u2phy_host: host-port {
+				#phy-cells = <0>;
+				interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
+				interrupt-names = "linestate";
+				status = "disabled";
+			};
+		};
 	};
 
 	wdt: watchdog@ff800000 {

commit 2a48727aba86ee6f1776d21ade6ab82edfcc0856
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Wed Aug 15 09:06:22 2018 +0800

    drm: Transplant tve code from rkdevelop
    
    Support tve in rk322x and rk322xh.
    
    Tested in rk3328, rk3229, rk3128h.
    
    Change-Id: I96a5034bced08e89bc9767ce7479ad4cf00ee4a5
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>

diff --git a/drivers/video/drm/Kconfig b/drivers/video/drm/Kconfig
index e1c71cbe0a..0c60d9d73d 100644
--- a/drivers/video/drm/Kconfig
+++ b/drivers/video/drm/Kconfig
@@ -69,3 +69,11 @@ config DRM_ROCKCHIP_RGB
 	help
 	  Choose this option to enable support for Rockchip RGB driver.
 	  say Y to enable its driver.
+
+config ROCKCHIP_DRM_TVE
+	bool "Rockchip TVE Support"
+	depends on DRM_ROCKCHIP
+	help
+	  Choose this option to enable support for Rockchip TVE.
+	  Rockchip rk322x and rk322xh SoC has TVE can be used, and
+	  say Y to enable TVE driver.
diff --git a/drivers/video/drm/Makefile b/drivers/video/drm/Makefile
index 195b6ca7e6..2f77efe22d 100644
--- a/drivers/video/drm/Makefile
+++ b/drivers/video/drm/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI) += rockchip-dw-mipi-dsi.o \
 					  rockchip-inno-mipi-dphy.o
 obj-$(CONFIG_DRM_ROCKCHIP_DW_HDMI) += rockchip_dw_hdmi.o dw_hdmi.o
 obj-$(CONFIG_ROCKCHIP_INNO_HDMI_PHY) += rockchip-inno-hdmi-phy.o
+obj-$(CONFIG_ROCKCHIP_DRM_TVE) += rockchip_drm_tve.o
 obj-$(CONFIG_DRM_ROCKCHIP_ANALOGIX_DP) += rockchip_analogix_dp.o rockchip_analogix_dp_reg.o
 obj-$(CONFIG_DRM_ROCKCHIP_LVDS) += rockchip_lvds.o
 obj-$(CONFIG_DRM_ROCKCHIP_RGB) += rockchip_rgb.o
diff --git a/drivers/video/drm/rockchip_crtc.h b/drivers/video/drm/rockchip_crtc.h
index 27bd7a6c03..6681446c7e 100644
--- a/drivers/video/drm/rockchip_crtc.h
+++ b/drivers/video/drm/rockchip_crtc.h
@@ -10,6 +10,7 @@
 struct rockchip_crtc {
 	const struct rockchip_crtc_funcs *funcs;
 	const void *data;
+	bool hdmi_hpd;
 };
 
 struct rockchip_crtc_funcs {
diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 46ce448812..9d84120f44 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -50,6 +50,93 @@ static LIST_HEAD(logo_cache_list);
 static unsigned long memory_start;
 static unsigned long memory_end;
 
+/*
+ * the phy types are used by different connectors in public.
+ * The current version only has inno hdmi phy for hdmi and tve.
+ */
+enum public_use_phy {
+	NONE,
+	INNO_HDMI_PHY
+};
+
+/* save public phy data */
+struct public_phy_data {
+	void *private_date;
+	const struct rockchip_phy *phy_drv;
+	int phy_node;
+	int public_phy_type;
+	bool phy_init;
+};
+
+/* check which kind of public phy does connector use */
+static int check_public_use_phy(struct display_state *state)
+{
+	int ret = NONE;
+#ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY
+	struct connector_state *conn_state = &state->conn_state;
+
+	if (!strncmp(dev_read_name(conn_state->dev), "tve", 3) ||
+	    !strncmp(dev_read_name(conn_state->dev), "hdmi", 4))
+		ret = INNO_HDMI_PHY;
+#endif
+
+	return ret;
+}
+
+/*
+ * get public phy driver and initialize it.
+ * The current version only has inno hdmi phy for hdmi and tve.
+ */
+static int get_public_phy(struct display_state *state,
+			  struct public_phy_data *data)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	const struct rockchip_phy *phy;
+	struct udevice *dev;
+	int ret = 0;
+
+	switch (data->public_phy_type) {
+	case INNO_HDMI_PHY:
+#if defined(CONFIG_ROCKCHIP_RK3328)
+		ret = uclass_find_device_by_name(UCLASS_PHY,
+						 "hdmiphy@ff430000", &dev);
+#elif defined(CONFIG_ROCKCHIP_RK322X)
+		ret = uclass_find_device_by_name(UCLASS_PHY,
+						 "hdmi-phy@12030000", &dev);
+#else
+		ret = -EINVAL;
+#endif
+		if (ret) {
+			printf("Warn: can't find phy driver\n");
+			return 0;
+		}
+
+		phy = (const struct rockchip_phy *)dev_get_driver_data(dev);
+		if (!phy) {
+			printf("failed to get phy driver\n");
+			return 0;
+		}
+
+		conn_state->phy_dev = dev;
+		conn_state->phy_node = dev->node;
+		if (!phy->funcs || !phy->funcs->init ||
+		    phy->funcs->init(state)) {
+			printf("failed to init phy driver\n");
+			return -EINVAL;
+		}
+		conn_state->phy = phy;
+
+		printf("inno hdmi phy init success, save it\n");
+		data->phy_node = ofnode_to_offset(conn_state->phy_node);
+		data->private_date = conn_state->phy_private;
+		data->phy_drv = conn_state->phy;
+		data->phy_init = true;
+		return 0;
+	default:
+		return -EINVAL;
+	}
+}
+
 static void init_display_buffer(ulong base)
 {
 	memory_start = base + DRM_ROCKCHIP_FB_SIZE;
@@ -141,13 +228,40 @@ static struct udevice *get_panel_device(struct display_state *state, ofnode conn
 	return NULL;
 }
 
-static int connector_phy_init(struct display_state *state)
+static int connector_phy_init(struct display_state *state,
+			      struct public_phy_data *data)
 {
 	struct connector_state *conn_state = &state->conn_state;
 	const struct rockchip_phy *phy;
 	struct udevice *dev;
-	int ret;
+	int ret, type;
+
+	/* does this connector use public phy with others */
+	type = check_public_use_phy(state);
+	if (type == INNO_HDMI_PHY) {
+		/* there is no public phy was initialized */
+		if (!data->phy_init) {
+			printf("start get public phy\n");
+			data->public_phy_type = type;
+			if (get_public_phy(state, data)) {
+				printf("can't find correct public phy type\n");
+				free(data);
+				return -EINVAL;
+			}
+			return 0;
+		}
+
+		/* if this phy has been initialized, get it directly */
+		conn_state->phy_node = offset_to_ofnode(data->phy_node);
+		conn_state->phy_private = data->private_date;
+		conn_state->phy = data->phy_drv;
+		return 0;
+	}
 
+	/*
+	 * if this connector don't use the same phy with others,
+	 * just get phy as original method.
+	 */
 	ret = uclass_get_device_by_phandle(UCLASS_PHY, conn_state->dev, "phys",
 					   &dev);
 	if (ret) {
@@ -533,7 +647,7 @@ static int display_init(struct display_state *state)
 	const struct rockchip_connector *conn = conn_state->connector;
 	const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
 	struct crtc_state *crtc_state = &state->crtc_state;
-	const struct rockchip_crtc *crtc = crtc_state->crtc;
+	struct rockchip_crtc *crtc = crtc_state->crtc;
 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
 	struct drm_display_mode *mode = &conn_state->mode;
 	int ret = 0;
@@ -560,8 +674,23 @@ static int display_init(struct display_state *state)
 	/*
 	 * support hotplug, but not connect;
 	 */
+#ifdef CONFIG_ROCKCHIP_DRM_TVE
+	if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_TV) {
+		printf("hdmi plugin ,skip tve\n");
+		goto deinit;
+	}
+#elif defined(CONFIG_ROCKCHIP_DRM_RK1000)
+	if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_LVDS) {
+		printf("hdmi plugin ,skip tve\n");
+		goto deinit;
+	}
+#endif
 	if (conn_funcs->detect) {
 		ret = conn_funcs->detect(state);
+#if defined(CONFIG_ROCKCHIP_DRM_TVE) || defined(CONFIG_ROCKCHIP_DRM_RK1000)
+		if (conn_state->type == DRM_MODE_CONNECTOR_HDMIA)
+			crtc->hdmi_hpd = ret;
+#endif
 		if (!ret)
 			goto deinit;
 	}
@@ -1107,7 +1236,7 @@ static int rockchip_display_probe(struct udevice *dev)
 	const void *blob = gd->fdt_blob;
 	int phandle;
 	struct udevice *crtc_dev, *conn_dev;
-	const struct rockchip_crtc *crtc;
+	struct rockchip_crtc *crtc;
 	const struct rockchip_connector *conn;
 	struct display_state *s;
 	const char *name;
@@ -1115,10 +1244,19 @@ static int rockchip_display_probe(struct udevice *dev)
 	ofnode node, route_node;
 	struct device_node *port_node, *vop_node, *ep_node;
 	struct device_node *cnt_node, *p;
+	struct public_phy_data *data;
 
 	/* Before relocation we don't need to do anything */
 	if (!(gd->flags & GD_FLG_RELOC))
 		return 0;
+
+	data = malloc(sizeof(struct public_phy_data));
+	if (!data) {
+		printf("failed to alloc phy data\n");
+		return -ENOMEM;
+	}
+	data->phy_init = false;
+
 	init_display_buffer(plat->base);
 
 	route_node = dev_read_subnode(dev, "route");
@@ -1155,7 +1293,7 @@ static int rockchip_display_probe(struct udevice *dev)
 			printf("Warn: can't find crtc driver %d\n", ret);
 			continue;
 		}
-		crtc = (const struct rockchip_crtc *)dev_get_driver_data(crtc_dev);
+		crtc = (struct rockchip_crtc *)dev_get_driver_data(crtc_dev);
 
 		phandle = ofnode_read_u32_default(np_to_ofnode(ep_node),
 						  "remote-endpoint", -1);
@@ -1222,7 +1360,7 @@ static int rockchip_display_probe(struct udevice *dev)
 			continue;
 		}
 
-		if (connector_phy_init(s)) {
+		if (connector_phy_init(s, data)) {
 			printf("Warn: Failed to init phy drivers\n");
 			free(s);
 			continue;
diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index d38e113fe4..f198b4208d 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -64,7 +64,7 @@ struct rockchip_mcu_timing {
 
 struct crtc_state {
 	struct udevice *dev;
-	const struct rockchip_crtc *crtc;
+	struct rockchip_crtc *crtc;
 	void *private;
 	ofnode node;
 	int crtc_id;
diff --git a/drivers/video/drm/rockchip_drm_tve.c b/drivers/video/drm/rockchip_drm_tve.c
new file mode 100644
index 0000000000..79fd98fa11
--- /dev/null
+++ b/drivers/video/drm/rockchip_drm_tve.c
@@ -0,0 +1,579 @@
+/*
+ * SPDX-License-Identifier:	GPL-2.0+
+ * (C) Copyright 2008-2015 Fuzhou Rockchip Electronics Co., Ltd
+ */
+#include <common.h>
+#include <malloc.h>
+#include <fdtdec.h>
+#include <fdt_support.h>
+#include <asm/io.h>
+#include <linux/media-bus-format.h>
+#include <asm/arch-rockchip/clock.h>
+#include <dm/device.h>
+#include <dm/read.h>
+#include <dm/uclass-internal.h>
+#include <linux/fb.h>
+#include <edid.h>
+#include <syscon.h>
+#include <boot_rkimg.h>
+#include <mapmem.h>
+#include <misc.h>
+#include "rockchip_drm_tve.h"
+#include "rockchip_display.h"
+#include "rockchip_crtc.h"
+#include "rockchip_connector.h"
+#include "rockchip_phy.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static struct drm_tve tve_s;
+
+#define tve_writel(offset, v)	writel(v, tve_s.reg_phy_base  + offset)
+#define tve_readl(offset)	readl(tve_s.reg_phy_base + offset)
+
+#define tve_dac_writel(offset, v)   writel(v, tve_s.vdacbase + offset)
+#define tve_dac_readl(offset)	readl(tve_s.vdacbase + offset)
+
+#define RK322X_VDAC_STANDARD 0x15
+
+#define TVE_REG_NUM 0x28
+
+static const struct drm_display_mode tve_modes[] = {
+	/* 0 - 720x576i@50Hz */
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 13500, 720, 753,
+		   816, 864, 576, 580, 586, 625, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
+		   DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
+	  .vrefresh = 50, },
+	/* 1 - 720x480i@60Hz */
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 13500, 720, 753,
+		   815, 858, 480, 480, 486, 525, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
+		   DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
+	  .vrefresh = 60, },
+};
+
+static void dac_enable(int enable)
+{
+	u32 mask, val = 0;
+	u32 grfreg = 0;
+
+#if defined(CONFIG_ROCKCHIP_RK322X) || defined(CONFIG_ROCKCHIP_RK3328)
+	tve_dac_writel(VDAC_VDAC2, v_CUR_CTR(tve_s.daclevel));
+	tve_dac_writel(VDAC_VDAC3, v_CAB_EN(0));
+#endif
+	if (enable) {
+		mask = m_VBG_EN | m_DAC_EN | m_DAC_GAIN;
+#if defined(CONFIG_ROCKCHIP_RK3128)
+			val = m_VBG_EN | m_DAC_EN | v_DAC_GAIN(tve_s.daclevel);
+			grfreg = GRF_TVE_CON0;
+#elif defined(CONFIG_ROCKCHIP_RK3036)
+			val = m_VBG_EN | m_DAC_EN | v_DAC_GAIN(tve_s.daclevel);
+			grfreg = GRF_SOC_CON3;
+#endif
+		val |= mask << 16;
+
+#if defined(CONFIG_ROCKCHIP_RK322X) || defined(CONFIG_ROCKCHIP_RK3328)
+			val = v_CUR_REG(tve_s.dac1level) |
+				v_DR_PWR_DOWN(0) | v_BG_PWR_DOWN(0);
+#endif
+	} else {
+		mask = m_VBG_EN | m_DAC_EN;
+		val = 0;
+#if defined(CONFIG_ROCKCHIP_RK3128)
+			grfreg = GRF_TVE_CON0;
+#elif defined(CONFIG_ROCKCHIP_RK3036)
+			grfreg = GRF_SOC_CON3;
+#endif
+		val |= mask << 16;
+
+#if defined(CONFIG_ROCKCHIP_RK322X) || defined(CONFIG_ROCKCHIP_RK3328)
+			val = v_CUR_REG(tve_s.dac1level) |
+				m_DR_PWR_DOWN | m_BG_PWR_DOWN;
+		#endif
+	}
+
+	if (grfreg)
+		writel(val, tve_s.grf + grfreg);
+	else if (tve_s.vdacbase)
+		tve_dac_writel(VDAC_VDAC1, val);
+}
+
+static void tve_set_mode(int mode)
+{
+	if (tve_s.soctype != SOC_RK322X &&
+	    tve_s.soctype != SOC_RK322XH) {
+		tve_writel(TV_RESET, v_RESET(1));
+		udelay(100);
+		tve_writel(TV_RESET, v_RESET(0));
+	}
+
+	if (tve_s.soctype == SOC_RK3036)
+		tve_writel(TV_CTRL, v_CVBS_MODE(mode) | v_CLK_UPSTREAM_EN(2) |
+			   v_TIMING_EN(2) | v_LUMA_FILTER_GAIN(0) |
+			   v_LUMA_FILTER_UPSAMPLE(1) | v_CSC_PATH(0));
+	else
+		tve_writel(TV_CTRL, v_CVBS_MODE(mode) | v_CLK_UPSTREAM_EN(2) |
+			   v_TIMING_EN(2) | v_LUMA_FILTER_GAIN(0) |
+			   v_LUMA_FILTER_UPSAMPLE(1) | v_CSC_PATH(3));
+
+	tve_writel(TV_LUMA_FILTER0, tve_s.lumafilter0);
+	tve_writel(TV_LUMA_FILTER1, tve_s.lumafilter1);
+	tve_writel(TV_LUMA_FILTER2, tve_s.lumafilter2);
+
+	if (mode == TVOUT_CVBS_NTSC) {
+		tve_writel(TV_ROUTING, v_DAC_SENSE_EN(0) | v_Y_IRE_7_5(1) |
+			v_Y_AGC_PULSE_ON(1) | v_Y_VIDEO_ON(1) |
+			v_Y_SYNC_ON(1) | v_PIC_MODE(mode));
+		tve_writel(TV_BW_CTRL, v_CHROMA_BW(BP_FILTER_NTSC) |
+			   v_COLOR_DIFF_BW(COLOR_DIFF_FILTER_BW_1_3));
+		tve_writel(TV_SATURATION, 0x0052543C);
+		if (tve_s.test_mode)
+			tve_writel(TV_BRIGHTNESS_CONTRAST, 0x00008300);
+		else
+			tve_writel(TV_BRIGHTNESS_CONTRAST, 0x00007900);
+
+		tve_writel(TV_FREQ_SC,	0x21F07BD7);
+		tve_writel(TV_SYNC_TIMING, 0x00C07a81);
+		tve_writel(TV_ADJ_TIMING, 0x96B40000);
+		tve_writel(TV_ACT_ST,	0x001500D6);
+		tve_writel(TV_ACT_TIMING, 0x169800FC | (1 << 12) | (1 << 28));
+
+	} else if (mode == TVOUT_CVBS_PAL) {
+		tve_writel(TV_ROUTING, v_DAC_SENSE_EN(0) | v_Y_IRE_7_5(0) |
+			v_Y_AGC_PULSE_ON(0) | v_Y_VIDEO_ON(1) |
+			v_YPP_MODE(1) | v_Y_SYNC_ON(1) | v_PIC_MODE(mode));
+		tve_writel(TV_BW_CTRL, v_CHROMA_BW(BP_FILTER_PAL) |
+			v_COLOR_DIFF_BW(COLOR_DIFF_FILTER_BW_1_3));
+
+		tve_writel(TV_SATURATION, tve_s.saturation);
+		tve_writel(TV_BRIGHTNESS_CONTRAST, tve_s.brightcontrast);
+
+		tve_writel(TV_FREQ_SC,	0x2A098ACB);
+		tve_writel(TV_SYNC_TIMING, 0x00C28381);
+		tve_writel(TV_ADJ_TIMING, (0xc << 28) | 0x06c00800 | 0x80);
+		tve_writel(TV_ACT_ST,	0x001500F6);
+		tve_writel(TV_ACT_TIMING, 0x0694011D | (1 << 12) | (2 << 28));
+
+		tve_writel(TV_ADJ_TIMING, tve_s.adjtiming);
+		tve_writel(TV_ACT_TIMING, 0x0694011D | (1 << 12) | (2 << 28));
+	}
+}
+
+static u8 rk_get_vdac_value(void)
+{
+	u8 value = 0;
+#ifdef CONFIG_ROCKCHIP_EFUSE
+#if defined(CONFIG_ROCKCHIP_RK322X)
+	struct udevice *dev;
+	u32 regs[2] = {0};
+	u8 fuses[1];
+	ofnode node;
+	int ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_MISC,
+					  DM_GET_DRIVER(rockchip_efuse), &dev);
+	if (ret) {
+		printf("%s: no misc-device found\n", __func__);
+		return -EINVAL;
+	}
+
+	node = dev_read_subnode(dev, "tve_dac");
+	if (!ofnode_valid(node))
+		return -EINVAL;
+
+	ret = ofnode_read_u32_array(node, "reg", regs, 2);
+	if (ret) {
+		printf("Cannot get efuse reg\n");
+		return -EINVAL;
+	}
+
+	ret = misc_read(dev, regs[0], &fuses, regs[1]);
+	if (ret) {
+		printf("%s: misc_read failed\n", __func__);
+		return 0;
+	}
+
+	value = fuses[0];
+	value = (value >> 3) & 0x1f;
+#endif
+#endif /* CONFIG_RK_EFUSE */
+	if (value > 0)
+		value += 5;
+	TVEDBG("%s value = 0x%x\n", __func__, value);
+
+	return value;
+}
+
+static int rockchip_drm_tve_init(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	int node = 0;
+	int dac_value, getvdac;
+	fdt_addr_t addr;
+
+	conn_state->type = DRM_MODE_CONNECTOR_TV;
+	tve_s.grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	if (tve_s.grf <= 0) {
+		printf("%s:Get syscon grf failed (ret=%p)\n",
+		       __func__, tve_s.grf);
+		return -ENXIO;
+	}
+
+#if defined(CONFIG_ROCKCHIP_RK3036)
+	addr = dev_read_addr_index(conn_state->dev, 0);
+	if (addr == FDT_ADDR_T_NONE)
+		return -EINVAL;
+
+	tve_s.reg_phy_base = (void *)addr;
+	tve_s.soctype = SOC_RK3036;
+	node = fdt_node_offset_by_compatible(gd->fdt_blob, 0,
+					     "rockchip,rk3036-tve");
+	if (node < 0) {
+		printf("can't find dts node for rk3036-tve\n");
+		goto err;
+	}
+#elif defined(CONFIG_ROCKCHIP_RK3128)
+	addr = dev_read_addr_index(conn_state->dev, 0);
+	if (addr == FDT_ADDR_T_NONE)
+		return -EINVAL;
+
+	tve_s.reg_phy_base = (void *)addr;
+	tve_s.soctype = SOC_RK312X;
+	tve_s.saturation = 0;
+	node = fdt_node_offset_by_compatible(gd->fdt_blob, 0,
+					     "rockchip,rk312x-tve");
+	if (node < 0) {
+		printf("can't find dts node for rk312x-tve\n");
+		goto err;
+	}
+#elif defined(CONFIG_ROCKCHIP_RK322X)
+	addr = dev_read_addr_index(conn_state->dev, 0);
+	if (addr == FDT_ADDR_T_NONE)
+		return -EINVAL;
+
+	tve_s.reg_phy_base = (void *)addr;
+	tve_s.soctype = SOC_RK322X;
+	tve_s.saturation = 0;
+
+	addr = dev_read_addr_index(conn_state->dev, 1);
+	if (addr == FDT_ADDR_T_NONE)
+		return -EINVAL;
+	tve_s.vdacbase = (void *)addr;
+	node = fdt_node_offset_by_compatible(gd->fdt_blob, 0,
+					     "rockchip,rk3328-tve");
+	if (node < 0) {
+		printf("can't find dts node for rk322x-tve\n");
+		goto err;
+	}
+#elif defined(CONFIG_ROCKCHIP_RK3328)
+	addr = dev_read_addr_index(conn_state->dev, 0);
+	if (addr == FDT_ADDR_T_NONE)
+		return -EINVAL;
+
+	tve_s.reg_phy_base = (void *)addr;
+	tve_s.soctype = SOC_RK322XH;
+
+	addr = dev_read_addr_index(conn_state->dev, 1);
+	if (addr == FDT_ADDR_T_NONE)
+		return -EINVAL;
+	tve_s.vdacbase = (void *)addr;
+
+	node = fdt_node_offset_by_compatible(gd->fdt_blob, 0,
+					     "rockchip,rk3328-tve");
+	if (node < 0) {
+		printf("can't find dts node for rk322xh-tve\n");
+		goto err;
+	}
+#endif
+
+	if (!fdt_device_is_available(gd->fdt_blob, node)) {
+		printf("tve is disabled\n");
+		goto err;
+	}
+
+	if (tve_s.soctype == SOC_RK312X)
+		tve_s.test_mode = fdtdec_get_int(gd->fdt_blob, node,
+						 "test_mode", 0);
+
+	tve_s.preferred_mode = fdtdec_get_int(gd->fdt_blob, node,
+					      "rockchip,tvemode", -1);
+	if (tve_s.preferred_mode < 0) {
+		tve_s.preferred_mode = 0;
+	} else if (tve_s.preferred_mode > 1) {
+		printf("tve mode value invalid\n");
+		goto err;
+	}
+
+	tve_s.saturation = fdtdec_get_int(gd->fdt_blob, node,
+					  "rockchip,saturation", 0);
+	if (tve_s.saturation == 0) {
+		printf("tve saturation err\n");
+		goto err;
+	}
+
+	tve_s.brightcontrast = fdtdec_get_int(gd->fdt_blob, node,
+					      "rockchip,brightcontrast", 0);
+	if (tve_s.brightcontrast == 0) {
+		printf("tve brightcontrast err\n");
+		goto err;
+	}
+
+	tve_s.adjtiming = fdtdec_get_int(gd->fdt_blob, node,
+					 "rockchip,adjtiming", 0);
+	if (tve_s.adjtiming == 0) {
+		printf("tve adjtiming err\n");
+		goto err;
+	}
+
+	tve_s.lumafilter0 = fdtdec_get_int(gd->fdt_blob, node,
+					   "rockchip,lumafilter0", 0);
+	if (tve_s.lumafilter0 == 0) {
+		printf("tve lumafilter0 err\n");
+		goto err;
+	}
+
+	tve_s.lumafilter1 = fdtdec_get_int(gd->fdt_blob, node,
+					   "rockchip,lumafilter1", 0);
+	if (tve_s.lumafilter1 == 0) {
+		printf("tve lumafilter1 err\n");
+		goto err;
+	}
+
+	tve_s.lumafilter2 = fdtdec_get_int(gd->fdt_blob, node,
+					   "rockchip,lumafilter2", 0);
+	if (tve_s.lumafilter2 == 0) {
+		printf("tve lumafilter2 err\n");
+		goto err;
+	}
+
+	dac_value = fdtdec_get_int(gd->fdt_blob, node, "rockchip,daclevel", 0);
+	if (dac_value == 0) {
+		printf("tve dac_value err\n");
+		goto err;
+	}
+
+	tve_s.daclevel = dac_value;
+	if (tve_s.soctype == SOC_RK322X) {
+		getvdac = rk_get_vdac_value();
+		if (getvdac > 0) {
+			tve_s.daclevel =
+				dac_value + getvdac - RK322X_VDAC_STANDARD;
+			if (tve_s.daclevel > 0x3f ||
+			    tve_s.daclevel < 0) {
+				printf("rk322x daclevel error!\n");
+				tve_s.daclevel = dac_value;
+			}
+		} else if (getvdac < 0) {
+			printf("get rk322x daclevel error\n");
+			goto err;
+		}
+	}
+
+	if (tve_s.soctype == SOC_RK322X ||
+	    tve_s.soctype == SOC_RK322XH) {
+		tve_s.dac1level = fdtdec_get_int(gd->fdt_blob, node,
+						 "rockchip,dac1level", 0);
+		if (tve_s.dac1level == 0) {
+			printf("rk322x dac1level error!\n");
+			goto err;
+		}
+	}
+	TVEDBG("tve_s.test_mode = 0x%x\n", tve_s.test_mode);
+	TVEDBG("tve_s.saturation = 0x%x\n", tve_s.saturation);
+	TVEDBG("tve_s.brightcontrast = 0x%x\n", tve_s.brightcontrast);
+	TVEDBG("tve_s.adjtiming = 0x%x\n", tve_s.adjtiming);
+	TVEDBG("tve_s.lumafilter0 = 0x%x\n", tve_s.lumafilter0);
+	TVEDBG("tve_s.lumafilter1 = 0x%x\n", tve_s.lumafilter1);
+	TVEDBG("tve_s.lumafilter2 = 0x%x\n", tve_s.lumafilter2);
+	TVEDBG("tve_s.daclevel = 0x%x\n", tve_s.daclevel);
+
+	return 0;
+
+err:
+	dac_enable(0);
+	return -ENODEV;
+}
+
+static int rockchip_drm_tve_enable(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct drm_display_mode *mode = &conn_state->mode;
+	int tve_type;
+
+#ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY
+	/* set inno hdmi phy clk. */
+	rockchip_phy_set_pll(state, 27000000);
+#endif
+	if (mode->vdisplay == 576)
+		tve_type = TVOUT_CVBS_PAL;
+	else
+		tve_type = TVOUT_CVBS_NTSC;
+	dac_enable(0);
+	tve_set_mode(tve_type);
+	dac_enable(1);
+
+	return 0;
+}
+
+static void rockchip_drm_tve_deinit(struct display_state *state)
+{
+	dac_enable(0);
+}
+
+static int rockchip_drm_tve_prepare(struct display_state *state)
+{
+	return 0;
+}
+
+static int rockchip_drm_tve_disable(struct display_state *state)
+{
+	dac_enable(0);
+	return 0;
+}
+
+static int rockchip_drm_tve_detect(struct display_state *state)
+{
+	return 1;
+}
+
+static void drm_tve_selete_output(struct overscan *overscan,
+				  struct drm_display_mode *mode)
+{
+	int ret, i, screen_size;
+	struct base_screen_info *screen_info = NULL;
+	struct base_disp_info base_parameter;
+	struct drm_display_mode modes[2];
+	const struct base_overscan *scan;
+	char baseparameter_buf[8 * RK_BLK_SIZE] __aligned(ARCH_DMA_MINALIGN);
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+	int max_scan = 100;
+	int min_scan = 50;
+
+	overscan->left_margin = max_scan;
+	overscan->right_margin = max_scan;
+	overscan->top_margin = max_scan;
+	overscan->bottom_margin = max_scan;
+
+	for (i = 0; i < 2; i++) {
+		modes[i] = tve_modes[i];
+		if (i == tve_s.preferred_mode)
+			modes[i].type |= DRM_MODE_TYPE_PREFERRED;
+	}
+	*mode = modes[tve_s.preferred_mode];
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: Could not find device\n", __func__);
+		return;
+	}
+
+	if (part_get_info_by_name(dev_desc, "baseparameter", &part_info) < 0) {
+		printf("Could not find baseparameter partition\n");
+		return;
+	}
+
+	ret = blk_dread(dev_desc, part_info.start, 1,
+			(void *)baseparameter_buf);
+	if (ret < 0) {
+		printf("read baseparameter failed\n");
+		return;
+	}
+
+	memcpy(&base_parameter, baseparameter_buf, sizeof(base_parameter));
+	scan = &base_parameter.scan;
+
+	screen_size = sizeof(base_parameter.screen_list) /
+		sizeof(base_parameter.screen_list[0]);
+
+	for (i = 0; i < screen_size; i++) {
+		if (base_parameter.screen_list[i].type ==
+		    DRM_MODE_CONNECTOR_TV) {
+			screen_info = &base_parameter.screen_list[i];
+			break;
+		}
+	}
+
+	if (scan->leftscale < min_scan && scan->leftscale > 0)
+		overscan->left_margin = min_scan;
+	else if (scan->leftscale < max_scan)
+		overscan->left_margin = scan->leftscale;
+
+	if (scan->rightscale < min_scan && scan->rightscale > 0)
+		overscan->right_margin = min_scan;
+	else if (scan->rightscale < max_scan)
+		overscan->right_margin = scan->rightscale;
+
+	if (scan->topscale < min_scan && scan->topscale > 0)
+		overscan->top_margin = min_scan;
+	else if (scan->topscale < max_scan)
+		overscan->top_margin = scan->topscale;
+
+	if (scan->bottomscale < min_scan && scan->bottomscale > 0)
+		overscan->bottom_margin = min_scan;
+	else if (scan->bottomscale < max_scan)
+		overscan->bottom_margin = scan->bottomscale;
+
+	if (screen_info &&
+	    (screen_info->mode.hdisplay == 720 &&
+	    screen_info->mode.vdisplay == 576 &&
+	    screen_info->mode.hsync_start == 753 &&
+	    screen_info->mode.hsync_end == 816))
+		*mode = modes[0];
+	else if (screen_info &&
+		 screen_info->mode.vdisplay == 480 &&
+		 screen_info->mode.vsync_start == 480 &&
+		 screen_info->mode.vsync_end == 486)
+		*mode = modes[1];
+
+	if (screen_info)
+		printf("base_parameter.mode:%dx%d\n",
+		       screen_info->mode.hdisplay,
+		       screen_info->mode.vdisplay);
+}
+
+static int rockchip_drm_tve_get_timing(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct drm_display_mode *mode = &conn_state->mode;
+
+	conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
+	conn_state->bus_format = MEDIA_BUS_FMT_YUV8_1X24;
+	drm_tve_selete_output(&conn_state->overscan, mode);
+
+	return 0;
+}
+
+static int rockchip_drm_tve_probe(struct udevice *dev)
+{
+	return 0;
+}
+
+const struct rockchip_connector_funcs rockchip_drm_tve_funcs = {
+	.init = rockchip_drm_tve_init,
+	.deinit = rockchip_drm_tve_deinit,
+	.prepare = rockchip_drm_tve_prepare,
+	.enable = rockchip_drm_tve_enable,
+	.disable = rockchip_drm_tve_disable,
+	.get_timing = rockchip_drm_tve_get_timing,
+	.detect = rockchip_drm_tve_detect,
+};
+
+static const struct rockchip_connector rk3328_drm_tve_data = {
+	.funcs = &rockchip_drm_tve_funcs,
+};
+
+static const struct udevice_id rockchip_drm_tve_ids[] = {
+	{
+	 .compatible = "rockchip,rk3328-tve",
+	 .data = (ulong)&rk3328_drm_tve_data,
+	}, {}
+};
+
+U_BOOT_DRIVER(rockchip_drm_tve) = {
+	.name = "rockchip_drm_tve",
+	.id = UCLASS_DISPLAY,
+	.of_match = rockchip_drm_tve_ids,
+	.probe	= rockchip_drm_tve_probe,
+};
diff --git a/drivers/video/drm/rockchip_drm_tve.h b/drivers/video/drm/rockchip_drm_tve.h
new file mode 100644
index 0000000000..2d504a6e8c
--- /dev/null
+++ b/drivers/video/drm/rockchip_drm_tve.h
@@ -0,0 +1,153 @@
+/*
+ * SPDX-License-Identifier:	GPL-2.0+
+ * (C) Copyright 2008-2015 Fuzhou Rockchip Electronics Co., Ltd
+ */
+#ifndef __ROCKCHIP_DRM_TVE_H__
+#define __ROCKCHIP_DRM_TVE_H__
+
+#include <lcd.h>
+
+#define TV_CTRL			(0x00)
+	#define m_CVBS_MODE			BIT(24)
+	#define m_CLK_UPSTREAM_EN		(3 << 18)
+	#define m_TIMING_EN			(3 << 16)
+	#define m_LUMA_FILTER_GAIN		(3 << 9)
+	#define m_LUMA_FILTER_BW		BIT(8)
+	#define m_CSC_PATH			(3 << 1)
+
+	#define v_CVBS_MODE(x)			((x & 1) << 24)
+	#define v_CLK_UPSTREAM_EN(x)		((x & 3) << 18)
+	#define v_TIMING_EN(x)			((x & 3) << 16)
+	#define v_LUMA_FILTER_GAIN(x)		((x & 3) << 9)
+	#define v_LUMA_FILTER_UPSAMPLE(x)	((x & 1) << 8)
+	#define v_CSC_PATH(x)			((x & 3) << 1)
+
+#define TV_SYNC_TIMING		(0x04)
+#define TV_ACT_TIMING		(0x08)
+#define TV_ADJ_TIMING		(0x0c)
+#define TV_FREQ_SC		(0x10)
+#define TV_LUMA_FILTER0		(0x14)
+#define TV_LUMA_FILTER1		(0x18)
+#define TV_LUMA_FILTER2		(0x1C)
+#define TV_ACT_ST		(0x34)
+#define TV_ROUTING		(0x38)
+	#define m_DAC_SENSE_EN		BIT(27)
+	#define m_Y_IRE_7_5		BIT(19)
+	#define m_Y_AGC_PULSE_ON	BIT(15)
+	#define m_Y_VIDEO_ON		BIT(11)
+	#define m_Y_SYNC_ON		BIT(7)
+	#define m_YPP_MODE		BIT(3)
+	#define m_MONO_EN		BIT(2)
+	#define m_PIC_MODE		BIT(1)
+
+	#define v_DAC_SENSE_EN(x)	((x & 1) << 27)
+	#define v_Y_IRE_7_5(x)		((x & 1) << 19)
+	#define v_Y_AGC_PULSE_ON(x)	((x & 1) << 15)
+	#define v_Y_VIDEO_ON(x)		((x & 1) << 11)
+	#define v_Y_SYNC_ON(x)		((x & 1) << 7)
+	#define v_YPP_MODE(x)		((x & 1) << 3)
+	#define v_MONO_EN(x)		((x & 1) << 2)
+	#define v_PIC_MODE(x)		((x & 1) << 1)
+
+#define TV_SYNC_ADJUST		(0x50)
+#define TV_STATUS		(0x54)
+#define TV_RESET		(0x68)
+	#define m_RESET			BIT(1)
+	#define v_RESET(x)		((x & 1) << 1)
+#define TV_SATURATION		(0x78)
+#define TV_BW_CTRL		(0x8C)
+	#define m_CHROMA_BW	(3 << 4)
+	#define m_COLOR_DIFF_BW	(0xf)
+
+	enum {
+		BP_FILTER_PASS = 0,
+		BP_FILTER_NTSC,
+		BP_FILTER_PAL,
+	};
+	enum {
+		COLOR_DIFF_FILTER_OFF = 0,
+		COLOR_DIFF_FILTER_BW_0_6,
+		COLOR_DIFF_FILTER_BW_1_3,
+		COLOR_DIFF_FILTER_BW_2_0
+	};
+
+	#define v_CHROMA_BW(x)		((3 & x) << 4)
+	#define v_COLOR_DIFF_BW(x)	(0xF & x)
+
+#define TV_BRIGHTNESS_CONTRAST	(0x90)
+
+#define m_EXTREF_EN		BIT(0)
+#define m_VBG_EN		BIT(1)
+#define m_DAC_EN		BIT(2)
+#define m_SENSE_EN		BIT(3)
+#define m_BIAS_EN		(7 << 4)
+#define m_DAC_GAIN		(0x3f << 7)
+#define v_DAC_GAIN(x)		((x & 0x3f) << 7)
+
+#define VDAC_VDAC0             (0x00)
+       #define m_RST_ANA               BIT(7)
+       #define m_RST_DIG               BIT(6)
+
+       #define v_RST_ANA(x)            ((x & 1) << 7)
+       #define v_RST_DIG(x)            ((x & 1) << 6)
+#define VDAC_VDAC1             (0x280)
+       #define m_CUR_REG               (0xf << 4)
+       #define m_DR_PWR_DOWN           BIT(1)
+       #define m_BG_PWR_DOWN           BIT(0)
+
+       #define v_CUR_REG(x)            ((x & 0xf) << 4)
+       #define v_DR_PWR_DOWN(x)        ((x & 1) << 1)
+       #define v_BG_PWR_DOWN(x)        ((x & 1) << 0)
+#define VDAC_VDAC2             (0x284)
+       #define m_CUR_CTR               (0X3f)
+
+       #define v_CUR_CTR(x)            ((x & 0X3f))
+#define VDAC_VDAC3             (0x288)
+       #define m_CAB_EN                BIT(5)
+       #define m_CAB_REF               BIT(4)
+       #define m_CAB_FLAG              BIT(0)
+
+       #define v_CAB_EN(x)             ((x & 1) << 5)
+       #define v_CAB_REF(x)            ((x & 1) << 4)
+       #define v_CAB_FLAG(x)           ((x & 1) << 0)
+
+enum {
+	TVOUT_CVBS_NTSC = 0,
+	TVOUT_CVBS_PAL,
+};
+
+enum {
+	SOC_RK3036 = 0,
+	SOC_RK312X,
+	SOC_RK322X,
+	SOC_RK322XH
+};
+
+struct drm_tve {
+	void    *reg_phy_base;
+	int	soctype;
+	int	test_mode;
+	int	saturation;
+	void    *vdacbase;
+	int	brightcontrast;
+	int	adjtiming;
+	int	lumafilter0;
+	int	lumafilter1;
+	int	lumafilter2;
+	int	daclevel;
+	int	dac1level;
+	int	preferred_mode;
+	void    *grf;
+};
+
+#define RK30_TVE_REGBASE 0x10118000 + 0x200
+#define MAX_TVE_COUNT  2
+
+#ifdef TVEDEBUG
+#define TVEDBG(format, ...) \
+		printf("TVE: " format, ## __VA_ARGS__)
+#else
+#define TVEDBG(format, ...)
+#endif
+
+#endif /* __ROCKCHIP_DRM_TVE_H__*/

commit 8e2bab3fc592f2c222a220d894a033e964c97a7a
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Fri Jul 13 09:09:39 2018 +0800

    drm: Transplant dw-hdmi code from rkdevelop
    
    1.Updating edid parse method.
    2.New hdmi i2c control method.
    3.Adding mode filter.
    4.Adding color select method.
    5.Support hdmi 2.0.
    6.Adding baseparameter reading.
    7.Support HDCP 1.4.
    
    Tested in rk3399/rk3229/rk3128h/rk3328.
    
    Change-Id: I2b3b1fb0079e97ba4b737781356e920548d6ad75
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>

diff --git a/common/edid.c b/common/edid.c
index 517ac0b252..02b42c1941 100644
--- a/common/edid.c
+++ b/common/edid.c
@@ -73,6 +73,7 @@
 struct detailed_mode_closure {
 	struct edid *edid;
 	struct hdmi_edid_data *data;
+	bool preferred;
 	u32 quirks;
 	int modes;
 };
@@ -155,562 +156,562 @@ static const struct drm_display_mode edid_cea_modes[] = {
 	/* 0 - dummy, VICs start at 1 */
 	{ },
 	/* 1 - 640x480@60Hz */
-	{ DRM_MODE(25175, 640, 656,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
 		   752, 800, 480, 490, 492, 525, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 	/* 2 - 720x480@60Hz */
-	{ DRM_MODE(27000, 720, 736,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
 		   798, 858, 480, 489, 495, 525, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 	/* 3 - 720x480@60Hz */
-	{ DRM_MODE(27000, 720, 736,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
 		   798, 858, 480, 489, 495, 525, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 4 - 1280x720@60Hz */
-	{ DRM_MODE(74250, 1280, 1390,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
 		   1430, 1650, 720, 725, 730, 750, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 5 - 1920x1080i@60Hz */
-	{ DRM_MODE(74250, 1920, 2008,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
 		   2052, 2200, 1080, 1084, 1094, 1125, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
 			DRM_MODE_FLAG_INTERLACE),
 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 6 - 720(1440)x480i@60Hz */
-	{ DRM_MODE(13500, 720, 739,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
 		   801, 858, 480, 488, 494, 525, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 	/* 7 - 720(1440)x480i@60Hz */
-	{ DRM_MODE(13500, 720, 739,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
 		   801, 858, 480, 488, 494, 525, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 8 - 720(1440)x240@60Hz */
-	{ DRM_MODE(13500, 720, 739,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
 		   801, 858, 240, 244, 247, 262, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 			DRM_MODE_FLAG_DBLCLK),
 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 	/* 9 - 720(1440)x240@60Hz */
-	{ DRM_MODE(13500, 720, 739,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
 		   801, 858, 240, 244, 247, 262, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 			DRM_MODE_FLAG_DBLCLK),
 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 10 - 2880x480i@60Hz */
-	{ DRM_MODE(54000, 2880, 2956,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
 		   3204, 3432, 480, 488, 494, 525, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 			DRM_MODE_FLAG_INTERLACE),
 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 	/* 11 - 2880x480i@60Hz */
-	{ DRM_MODE(54000, 2880, 2956,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
 		   3204, 3432, 480, 488, 494, 525, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 			DRM_MODE_FLAG_INTERLACE),
 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 12 - 2880x240@60Hz */
-	{ DRM_MODE(54000, 2880, 2956,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
 		   3204, 3432, 240, 244, 247, 262, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 	/* 13 - 2880x240@60Hz */
-	{ DRM_MODE(54000, 2880, 2956,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
 		   3204, 3432, 240, 244, 247, 262, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 14 - 1440x480@60Hz */
-	{ DRM_MODE(54000, 1440, 1472,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
 		   1596, 1716, 480, 489, 495, 525, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 	/* 15 - 1440x480@60Hz */
-	{ DRM_MODE(54000, 1440, 1472,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
 		   1596, 1716, 480, 489, 495, 525, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 16 - 1920x1080@60Hz */
-	{ DRM_MODE(148500, 1920, 2008,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
 		   2052, 2200, 1080, 1084, 1089, 1125, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 17 - 720x576@50Hz */
-	{ DRM_MODE(27000, 720, 732,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
 		   796, 864, 576, 581, 586, 625, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 	/* 18 - 720x576@50Hz */
-	{ DRM_MODE(27000, 720, 732,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
 		   796, 864, 576, 581, 586, 625, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 19 - 1280x720@50Hz */
-	{ DRM_MODE(74250, 1280, 1720,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720,
 		   1760, 1980, 720, 725, 730, 750, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 20 - 1920x1080i@50Hz */
-	{ DRM_MODE(74250, 1920, 2448,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
 		   2492, 2640, 1080, 1084, 1094, 1125, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
 			DRM_MODE_FLAG_INTERLACE),
 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 21 - 720(1440)x576i@50Hz */
-	{ DRM_MODE(13500, 720, 732,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
 		   795, 864, 576, 580, 586, 625, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 	/* 22 - 720(1440)x576i@50Hz */
-	{ DRM_MODE(13500, 720, 732,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
 		   795, 864, 576, 580, 586, 625, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 23 - 720(1440)x288@50Hz */
-	{ DRM_MODE(13500, 720, 732,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
 		   795, 864, 288, 290, 293, 312, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 			DRM_MODE_FLAG_DBLCLK),
 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 	/* 24 - 720(1440)x288@50Hz */
-	{ DRM_MODE(13500, 720, 732,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
 		   795, 864, 288, 290, 293, 312, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 			DRM_MODE_FLAG_DBLCLK),
 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 25 - 2880x576i@50Hz */
-	{ DRM_MODE(54000, 2880, 2928,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
 		   3180, 3456, 576, 580, 586, 625, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 			DRM_MODE_FLAG_INTERLACE),
 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 	/* 26 - 2880x576i@50Hz */
-	{ DRM_MODE(54000, 2880, 2928,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
 		   3180, 3456, 576, 580, 586, 625, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 			DRM_MODE_FLAG_INTERLACE),
 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 27 - 2880x288@50Hz */
-	{ DRM_MODE(54000, 2880, 2928,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
 		   3180, 3456, 288, 290, 293, 312, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 	/* 28 - 2880x288@50Hz */
-	{ DRM_MODE(54000, 2880, 2928,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
 		   3180, 3456, 288, 290, 293, 312, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 29 - 1440x576@50Hz */
-	{ DRM_MODE(54000, 1440, 1464,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
 		   1592, 1728, 576, 581, 586, 625, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 	/* 30 - 1440x576@50Hz */
-	{ DRM_MODE(54000, 1440, 1464,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
 		   1592, 1728, 576, 581, 586, 625, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 31 - 1920x1080@50Hz */
-	{ DRM_MODE(148500, 1920, 2448,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
 		   2492, 2640, 1080, 1084, 1089, 1125, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 32 - 1920x1080@24Hz */
-	{ DRM_MODE(74250, 1920, 2558,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558,
 		   2602, 2750, 1080, 1084, 1089, 1125, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 33 - 1920x1080@25Hz */
-	{ DRM_MODE(74250, 1920, 2448,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
 		   2492, 2640, 1080, 1084, 1089, 1125, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 34 - 1920x1080@30Hz */
-	{ DRM_MODE(74250, 1920, 2008,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
 		   2052, 2200, 1080, 1084, 1089, 1125, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 35 - 2880x480@60Hz */
-	{ DRM_MODE(108000, 2880, 2944,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
 		   3192, 3432, 480, 489, 495, 525, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 	/* 36 - 2880x480@60Hz */
-	{ DRM_MODE(108000, 2880, 2944,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
 		   3192, 3432, 480, 489, 495, 525, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 37 - 2880x576@50Hz */
-	{ DRM_MODE(108000, 2880, 2928,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
 		   3184, 3456, 576, 581, 586, 625, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 	/* 38 - 2880x576@50Hz */
-	{ DRM_MODE(108000, 2880, 2928,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
 		   3184, 3456, 576, 581, 586, 625, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 39 - 1920x1080i@50Hz */
-	{ DRM_MODE(72000, 1920, 1952,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 72000, 1920, 1952,
 		   2120, 2304, 1080, 1126, 1136, 1250, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC |
 			DRM_MODE_FLAG_INTERLACE),
 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 40 - 1920x1080i@100Hz */
-	{ DRM_MODE(148500, 1920, 2448,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
 		   2492, 2640, 1080, 1084, 1094, 1125, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
 			DRM_MODE_FLAG_INTERLACE),
 	  .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 41 - 1280x720@100Hz */
-	{ DRM_MODE(148500, 1280, 1720,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720,
 		   1760, 1980, 720, 725, 730, 750, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 42 - 720x576@100Hz */
-	{ DRM_MODE(54000, 720, 732,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
 		   796, 864, 576, 581, 586, 625, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 	/* 43 - 720x576@100Hz */
-	{ DRM_MODE(54000, 720, 732,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
 		   796, 864, 576, 581, 586, 625, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 44 - 720(1440)x576i@100Hz */
-	{ DRM_MODE(27000, 720, 732,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
 		   795, 864, 576, 580, 586, 625, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
 	  .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 	/* 45 - 720(1440)x576i@100Hz */
-	{ DRM_MODE(27000, 720, 732,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
 		   795, 864, 576, 580, 586, 625, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
 	  .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 46 - 1920x1080i@120Hz */
-	{ DRM_MODE(148500, 1920, 2008,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
 		   2052, 2200, 1080, 1084, 1094, 1125, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
 			DRM_MODE_FLAG_INTERLACE),
 	  .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 47 - 1280x720@120Hz */
-	{ DRM_MODE(148500, 1280, 1390,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390,
 		   1430, 1650, 720, 725, 730, 750, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 48 - 720x480@120Hz */
-	{ DRM_MODE(54000, 720, 736,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
 		   798, 858, 480, 489, 495, 525, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 	/* 49 - 720x480@120Hz */
-	{ DRM_MODE(54000, 720, 736,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
 		   798, 858, 480, 489, 495, 525, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 50 - 720(1440)x480i@120Hz */
-	{ DRM_MODE(27000, 720, 739,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 27000, 720, 739,
 		   801, 858, 480, 488, 494, 525, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
 	  .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 	/* 51 - 720(1440)x480i@120Hz */
-	{ DRM_MODE(27000, 720, 739,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 27000, 720, 739,
 		   801, 858, 480, 488, 494, 525, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
 	  .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 52 - 720x576@200Hz */
-	{ DRM_MODE(108000, 720, 732,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
 		   796, 864, 576, 581, 586, 625, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 	/* 53 - 720x576@200Hz */
-	{ DRM_MODE(108000, 720, 732,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
 		   796, 864, 576, 581, 586, 625, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 54 - 720(1440)x576i@200Hz */
-	{ DRM_MODE(54000, 720, 732,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
 		   795, 864, 576, 580, 586, 625, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
 	  .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 	/* 55 - 720(1440)x576i@200Hz */
-	{ DRM_MODE(54000, 720, 732,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
 		   795, 864, 576, 580, 586, 625, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
 	  .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 56 - 720x480@240Hz */
-	{ DRM_MODE(108000, 720, 736,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
 		   798, 858, 480, 489, 495, 525, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 	/* 57 - 720x480@240Hz */
-	{ DRM_MODE(108000, 720, 736,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
 		   798, 858, 480, 489, 495, 525, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 58 - 720(1440)x480i@240 */
-	{ DRM_MODE(54000, 720, 739,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 54000, 720, 739,
 		   801, 858, 480, 488, 494, 525, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
 	  .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 	/* 59 - 720(1440)x480i@240 */
-	{ DRM_MODE(54000, 720, 739,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 54000, 720, 739,
 		   801, 858, 480, 488, 494, 525, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
 	  .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 60 - 1280x720@24Hz */
-	{ DRM_MODE(59400, 1280, 3040,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040,
 		   3080, 3300, 720, 725, 730, 750, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 61 - 1280x720@25Hz */
-	{ DRM_MODE(74250, 1280, 3700,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700,
 		   3740, 3960, 720, 725, 730, 750, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 62 - 1280x720@30Hz */
-	{ DRM_MODE(74250, 1280, 3040,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040,
 		   3080, 3300, 720, 725, 730, 750, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 63 - 1920x1080@120Hz */
-	{ DRM_MODE(297000, 1920, 2008,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008,
 		   2052, 2200, 1080, 1084, 1089, 1125, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 64 - 1920x1080@100Hz */
-	{ DRM_MODE(297000, 1920, 2448,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448,
 		   2492, 2640, 1080, 1084, 1089, 1125, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 65 - 1280x720@24Hz */
-	{ DRM_MODE(59400, 1280, 3040,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040,
 		   3080, 3300, 720, 725, 730, 750, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 66 - 1280x720@25Hz */
-	{ DRM_MODE(74250, 1280, 3700,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700,
 		   3740, 3960, 720, 725, 730, 750, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 67 - 1280x720@30Hz */
-	{ DRM_MODE(74250, 1280, 3040,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040,
 		   3080, 3300, 720, 725, 730, 750, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 68 - 1280x720@50Hz */
-	{ DRM_MODE(74250, 1280, 1720,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720,
 		   1760, 1980, 720, 725, 730, 750, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 69 - 1280x720@60Hz */
-	{ DRM_MODE(74250, 1280, 1390,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
 		   1430, 1650, 720, 725, 730, 750, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 70 - 1280x720@100Hz */
-	{ DRM_MODE(148500, 1280, 1720,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720,
 		   1760, 1980, 720, 725, 730, 750, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 71 - 1280x720@120Hz */
-	{ DRM_MODE(148500, 1280, 1390,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390,
 		   1430, 1650, 720, 725, 730, 750, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 72 - 1920x1080@24Hz */
-	{ DRM_MODE(74250, 1920, 2558,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558,
 		   2602, 2750, 1080, 1084, 1089, 1125, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 73 - 1920x1080@25Hz */
-	{ DRM_MODE(74250, 1920, 2448,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
 		   2492, 2640, 1080, 1084, 1089, 1125, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 74 - 1920x1080@30Hz */
-	{ DRM_MODE(74250, 1920, 2008,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
 		   2052, 2200, 1080, 1084, 1089, 1125, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 75 - 1920x1080@50Hz */
-	{ DRM_MODE(148500, 1920, 2448,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
 		   2492, 2640, 1080, 1084, 1089, 1125, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 76 - 1920x1080@60Hz */
-	{ DRM_MODE(148500, 1920, 2008,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
 		   2052, 2200, 1080, 1084, 1089, 1125, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 77 - 1920x1080@100Hz */
-	{ DRM_MODE(297000, 1920, 2448,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448,
 		   2492, 2640, 1080, 1084, 1089, 1125, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 78 - 1920x1080@120Hz */
-	{ DRM_MODE(297000, 1920, 2008,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008,
 		   2052, 2200, 1080, 1084, 1089, 1125, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 79 - 1680x720@24Hz */
-	{ DRM_MODE(59400, 1680, 3040,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 59400, 1680, 3040,
 		3080, 3300, 720, 725, 730, 750, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 80 - 1680x720@25Hz */
-	{ DRM_MODE(59400, 1680, 2908,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 59400, 1680, 2908,
 		2948, 3168, 720, 725, 730, 750, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 81 - 1680x720@30Hz */
-	{ DRM_MODE(59400, 1680, 2380,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 59400, 1680, 2380,
 		2420, 2640, 720, 725, 730, 750, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 82 - 1680x720@50Hz */
-	{ DRM_MODE(82500, 1680, 1940,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 82500, 1680, 1940,
 		1980, 2200, 720, 725, 730, 750, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 83 - 1680x720@60Hz */
-	{ DRM_MODE(99000, 1680, 1940,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 99000, 1680, 1940,
 		1980, 2200, 720, 725, 730, 750, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 84 - 1680x720@100Hz */
-	{ DRM_MODE(165000, 1680, 1740,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 165000, 1680, 1740,
 		1780, 2000, 720, 725, 730, 825, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 85 - 1680x720@120Hz */
-	{ DRM_MODE(198000, 1680, 1740,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 198000, 1680, 1740,
 		1780, 2000, 720, 725, 730, 825, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 86 - 2560x1080@24Hz */
-	{ DRM_MODE(99000, 2560, 3558,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 99000, 2560, 3558,
 		3602, 3750, 1080, 1084, 1089, 1100, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 87 - 2560x1080@25Hz */
-	{ DRM_MODE(90000, 2560, 3008,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 90000, 2560, 3008,
 		3052, 3200, 1080, 1084, 1089, 1125, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 88 - 2560x1080@30Hz */
-	{ DRM_MODE(118800, 2560, 3328,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 118800, 2560, 3328,
 		3372, 3520, 1080, 1084, 1089, 1125, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 89 - 2560x1080@50Hz */
-	{ DRM_MODE(185625, 2560, 3108,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 185625, 2560, 3108,
 		3152, 3300, 1080, 1084, 1089, 1125, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 90 - 2560x1080@60Hz */
-	{ DRM_MODE(198000, 2560, 2808,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 198000, 2560, 2808,
 		2852, 3000, 1080, 1084, 1089, 1100, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 91 - 2560x1080@100Hz */
-	{ DRM_MODE(371250, 2560, 2778,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 371250, 2560, 2778,
 		2822, 2970, 1080, 1084, 1089, 1250, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 92 - 2560x1080@120Hz */
-	{ DRM_MODE(495000, 2560, 3108,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 495000, 2560, 3108,
 		3152, 3300, 1080, 1084, 1089, 1250, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 93 - 3840x2160p@24Hz 16:9 */
-	{ DRM_MODE(297000, 3840, 5116,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 297000, 3840, 5116,
 		5204, 5500, 2160, 2168, 2178, 2250, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 94 - 3840x2160p@25Hz 16:9 */
-	{ DRM_MODE(297000, 3840, 4896,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 297000, 3840, 4896,
 		4984, 5280, 2160, 2168, 2178, 2250, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 95 - 3840x2160p@30Hz 16:9 */
-	{ DRM_MODE(297000, 3840, 4016,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 297000, 3840, 4016,
 		4104, 4400, 2160, 2168, 2178, 2250, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 96 - 3840x2160p@50Hz 16:9 */
-	{ DRM_MODE(594000, 3840, 4896,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 594000, 3840, 4896,
 		4984, 5280, 2160, 2168, 2178, 2250, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 97 - 3840x2160p@60Hz 16:9 */
-	{ DRM_MODE(594000, 3840, 4016,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 594000, 3840, 4016,
 		4104, 4400, 2160, 2168, 2178, 2250, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 98 - 4096x2160p@24Hz 256:135 */
-	{ DRM_MODE(297000, 4096, 5116,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 297000, 4096, 5116,
 		5204, 5500, 2160, 2168, 2178, 2250, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
 	/* 99 - 4096x2160p@25Hz 256:135 */
-	{ DRM_MODE(297000, 4096, 5064,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 297000, 4096, 5064,
 		5152, 5280, 2160, 2168, 2178, 2250, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
 	/* 100 - 4096x2160p@30Hz 256:135 */
-	{ DRM_MODE(297000, 4096, 4184,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 297000, 4096, 4184,
 		4272, 4400, 2160, 2168, 2178, 2250, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
 	/* 101 - 4096x2160p@50Hz 256:135 */
-	{ DRM_MODE(594000, 4096, 5064,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 594000, 4096, 5064,
 		5152, 5280, 2160, 2168, 2178, 2250, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
 	/* 102 - 4096x2160p@60Hz 256:135 */
-	{ DRM_MODE(594000, 4096, 4184,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 594000, 4096, 4184,
 		4272, 4400, 2160, 2168, 2178, 2250, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
 	/* 103 - 3840x2160p@24Hz 64:27 */
-	{ DRM_MODE(297000, 3840, 5116,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 297000, 3840, 5116,
 		5204, 5500, 2160, 2168, 2178, 2250, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 104 - 3840x2160p@25Hz 64:27 */
-	{ DRM_MODE(297000, 3840, 4016,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 297000, 3840, 4016,
 		4104, 4400, 2160, 2168, 2178, 2250, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 105 - 3840x2160p@30Hz 64:27 */
-	{ DRM_MODE(297000, 3840, 4016,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 297000, 3840, 4016,
 		4104, 4400, 2160, 2168, 2178, 2250, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 106 - 3840x2160p@50Hz 64:27 */
-	{ DRM_MODE(594000, 3840, 4896,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 594000, 3840, 4896,
 		4984, 5280, 2160, 2168, 2178, 2250, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 107 - 3840x2160p@60Hz 64:27 */
-	{ DRM_MODE(594000, 3840, 4016,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 594000, 3840, 4016,
 		4104, 4400, 2160, 2168, 2178, 2250, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
@@ -723,25 +724,25 @@ static const struct drm_display_mode edid_4k_modes[] = {
 	/* 0 - dummy, VICs start at 1 */
 	{ },
 	/* 1 - 3840x2160@30Hz */
-	{ DRM_MODE(297000,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 297000,
 		   3840, 4016, 4104, 4400,
 		   2160, 2168, 2178, 2250, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 30, },
 	/* 2 - 3840x2160@25Hz */
-	{ DRM_MODE(297000,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 297000,
 		   3840, 4896, 4984, 5280,
 		   2160, 2168, 2178, 2250, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 25, },
 	/* 3 - 3840x2160@24Hz */
-	{ DRM_MODE(297000,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 297000,
 		   3840, 5116, 5204, 5500,
 		   2160, 2168, 2178, 2250, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 24, },
 	/* 4 - 4096x2160@24Hz (SMPTE) */
-	{ DRM_MODE(297000,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 297000,
 		   4096, 5116, 5204, 5500,
 		   2160, 2168, 2178, 2250, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
@@ -754,356 +755,356 @@ static const struct drm_display_mode edid_4k_modes[] = {
  */
 static const struct drm_display_mode drm_dmt_modes[] = {
 	/* 0x01 - 640x350@85Hz */
-	{ DRM_MODE(31500, 640, 672,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
 		   736, 832, 350, 382, 385, 445, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x02 - 640x400@85Hz */
-	{ DRM_MODE(31500, 640, 672,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
 		   736, 832, 400, 401, 404, 445, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x03 - 720x400@85Hz */
-	{ DRM_MODE(35500, 720, 756,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
 		   828, 936, 400, 401, 404, 446, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x04 - 640x480@60Hz */
-	{ DRM_MODE(25175, 640, 656,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
 		   752, 800, 480, 490, 492, 525, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x05 - 640x480@72Hz */
-	{ DRM_MODE(31500, 640, 664,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
 		   704, 832, 480, 489, 492, 520, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x06 - 640x480@75Hz */
-	{ DRM_MODE(31500, 640, 656,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
 		   720, 840, 480, 481, 484, 500, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x07 - 640x480@85Hz */
-	{ DRM_MODE(36000, 640, 696,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
 		   752, 832, 480, 481, 484, 509, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x08 - 800x600@56Hz */
-	{ DRM_MODE(36000, 800, 824,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
 		   896, 1024, 600, 601, 603, 625, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x09 - 800x600@60Hz */
-	{ DRM_MODE(40000, 800, 840,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
 		   968, 1056, 600, 601, 605, 628, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x0a - 800x600@72Hz */
-	{ DRM_MODE(50000, 800, 856,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
 		   976, 1040, 600, 637, 643, 666, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x0b - 800x600@75Hz */
-	{ DRM_MODE(49500, 800, 816,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
 		   896, 1056, 600, 601, 604, 625, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x0c - 800x600@85Hz */
-	{ DRM_MODE(56250, 800, 832,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 56250, 800, 832,
 		   896, 1048, 600, 601, 604, 631, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x0d - 800x600@120Hz RB */
-	{ DRM_MODE(73250, 800, 848,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 73250, 800, 848,
 		   880, 960, 600, 603, 607, 636, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x0e - 848x480@60Hz */
-	{ DRM_MODE(33750, 848, 864,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 33750, 848, 864,
 		   976, 1088, 480, 486, 494, 517, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x0f - 1024x768@43Hz, interlace */
-	{ DRM_MODE(44900, 1024, 1032,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
 		   1208, 1264, 768, 768, 772, 817, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
 		   DRM_MODE_FLAG_INTERLACE) },
 	/* 0x10 - 1024x768@60Hz */
-	{ DRM_MODE(65000, 1024, 1048,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
 		   1184, 1344, 768, 771, 777, 806, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x11 - 1024x768@70Hz */
-	{ DRM_MODE(75000, 1024, 1048,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
 		   1184, 1328, 768, 771, 777, 806, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x12 - 1024x768@75Hz */
-	{ DRM_MODE(78750, 1024, 1040,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
 		   1136, 1312, 768, 769, 772, 800, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x13 - 1024x768@85Hz */
-	{ DRM_MODE(94500, 1024, 1072,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
 		   1168, 1376, 768, 769, 772, 808, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x14 - 1024x768@120Hz RB */
-	{ DRM_MODE(115500, 1024, 1072,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 115500, 1024, 1072,
 		   1104, 1184, 768, 771, 775, 813, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x15 - 1152x864@75Hz */
-	{ DRM_MODE(108000, 1152, 1216,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
 		   1344, 1600, 864, 865, 868, 900, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x55 - 1280x720@60Hz */
-	{ DRM_MODE(74250, 1280, 1390,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
 		   1430, 1650, 720, 725, 730, 750, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x16 - 1280x768@60Hz RB */
-	{ DRM_MODE(68250, 1280, 1328,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 68250, 1280, 1328,
 		   1360, 1440, 768, 771, 778, 790, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x17 - 1280x768@60Hz */
-	{ DRM_MODE(79500, 1280, 1344,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
 		   1472, 1664, 768, 771, 778, 798, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x18 - 1280x768@75Hz */
-	{ DRM_MODE(102250, 1280, 1360,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360,
 		   1488, 1696, 768, 771, 778, 805, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x19 - 1280x768@85Hz */
-	{ DRM_MODE(117500, 1280, 1360,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,
 		   1496, 1712, 768, 771, 778, 809, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x1a - 1280x768@120Hz RB */
-	{ DRM_MODE(140250, 1280, 1328,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 140250, 1280, 1328,
 		   1360, 1440, 768, 771, 778, 813, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x1b - 1280x800@60Hz RB */
-	{ DRM_MODE(71000, 1280, 1328,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 71000, 1280, 1328,
 		   1360, 1440, 800, 803, 809, 823, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x1c - 1280x800@60Hz */
-	{ DRM_MODE(83500, 1280, 1352,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
 		   1480, 1680, 800, 803, 809, 831, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x1d - 1280x800@75Hz */
-	{ DRM_MODE(106500, 1280, 1360,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360,
 		   1488, 1696, 800, 803, 809, 838, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x1e - 1280x800@85Hz */
-	{ DRM_MODE(122500, 1280, 1360,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,
 		   1496, 1712, 800, 803, 809, 843, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x1f - 1280x800@120Hz RB */
-	{ DRM_MODE(146250, 1280, 1328,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 146250, 1280, 1328,
 		   1360, 1440, 800, 803, 809, 847, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x20 - 1280x960@60Hz */
-	{ DRM_MODE(108000, 1280, 1376,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
 		   1488, 1800, 960, 961, 964, 1000, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x21 - 1280x960@85Hz */
-	{ DRM_MODE(148500, 1280, 1344,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,
 		   1504, 1728, 960, 961, 964, 1011, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x22 - 1280x960@120Hz RB */
-	{ DRM_MODE(175500, 1280, 1328,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 175500, 1280, 1328,
 		   1360, 1440, 960, 963, 967, 1017, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x23 - 1280x1024@60Hz */
-	{ DRM_MODE(108000, 1280, 1328,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
 		   1440, 1688, 1024, 1025, 1028, 1066, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x24 - 1280x1024@75Hz */
-	{ DRM_MODE(135000, 1280, 1296,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
 		   1440, 1688, 1024, 1025, 1028, 1066, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x25 - 1280x1024@85Hz */
-	{ DRM_MODE(157500, 1280, 1344,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,
 		   1504, 1728, 1024, 1025, 1028, 1072, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x26 - 1280x1024@120Hz RB */
-	{ DRM_MODE(187250, 1280, 1328,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 187250, 1280, 1328,
 		   1360, 1440, 1024, 1027, 1034, 1084, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x27 - 1360x768@60Hz */
-	{ DRM_MODE(85500, 1360, 1424,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
 		   1536, 1792, 768, 771, 777, 795, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x28 - 1360x768@120Hz RB */
-	{ DRM_MODE(148250, 1360, 1408,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 148250, 1360, 1408,
 		   1440, 1520, 768, 771, 776, 813, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x51 - 1366x768@60Hz */
-	{ DRM_MODE(85500, 1366, 1436,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 85500, 1366, 1436,
 		   1579, 1792, 768, 771, 774, 798, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x56 - 1366x768@60Hz */
-	{ DRM_MODE(72000, 1366, 1380,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 72000, 1366, 1380,
 		   1436, 1500, 768, 769, 772, 800, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x29 - 1400x1050@60Hz RB */
-	{ DRM_MODE(101000, 1400, 1448,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 101000, 1400, 1448,
 		   1480, 1560, 1050, 1053, 1057, 1080, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x2a - 1400x1050@60Hz */
-	{ DRM_MODE(121750, 1400, 1488,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
 		   1632, 1864, 1050, 1053, 1057, 1089, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x2b - 1400x1050@75Hz */
-	{ DRM_MODE(156000, 1400, 1504,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,
 		   1648, 1896, 1050, 1053, 1057, 1099, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x2c - 1400x1050@85Hz */
-	{ DRM_MODE(179500, 1400, 1504,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,
 		   1656, 1912, 1050, 1053, 1057, 1105, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x2d - 1400x1050@120Hz RB */
-	{ DRM_MODE(208000, 1400, 1448,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 208000, 1400, 1448,
 		   1480, 1560, 1050, 1053, 1057, 1112, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x2e - 1440x900@60Hz RB */
-	{ DRM_MODE(88750, 1440, 1488,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 88750, 1440, 1488,
 		   1520, 1600, 900, 903, 909, 926, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x2f - 1440x900@60Hz */
-	{ DRM_MODE(106500, 1440, 1520,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
 		   1672, 1904, 900, 903, 909, 934, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x30 - 1440x900@75Hz */
-	{ DRM_MODE(136750, 1440, 1536,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536,
 		   1688, 1936, 900, 903, 909, 942, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x31 - 1440x900@85Hz */
-	{ DRM_MODE(157000, 1440, 1544,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,
 		   1696, 1952, 900, 903, 909, 948, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x32 - 1440x900@120Hz RB */
-	{ DRM_MODE(182750, 1440, 1488,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 182750, 1440, 1488,
 		   1520, 1600, 900, 903, 909, 953, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x53 - 1600x900@60Hz */
-	{ DRM_MODE(108000, 1600, 1624,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 108000, 1600, 1624,
 		   1704, 1800, 900, 901, 904, 1000, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x33 - 1600x1200@60Hz */
-	{ DRM_MODE(162000, 1600, 1664,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
 		   1856, 2160, 1200, 1201, 1204, 1250, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x34 - 1600x1200@65Hz */
-	{ DRM_MODE(175500, 1600, 1664,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664,
 		   1856, 2160, 1200, 1201, 1204, 1250, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x35 - 1600x1200@70Hz */
-	{ DRM_MODE(189000, 1600, 1664,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664,
 		   1856, 2160, 1200, 1201, 1204, 1250, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x36 - 1600x1200@75Hz */
-	{ DRM_MODE(202500, 1600, 1664,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 202500, 1600, 1664,
 		   1856, 2160, 1200, 1201, 1204, 1250, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x37 - 1600x1200@85Hz */
-	{ DRM_MODE(229500, 1600, 1664,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,
 		   1856, 2160, 1200, 1201, 1204, 1250, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x38 - 1600x1200@120Hz RB */
-	{ DRM_MODE(268250, 1600, 1648,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 268250, 1600, 1648,
 		   1680, 1760, 1200, 1203, 1207, 1271, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x39 - 1680x1050@60Hz RB */
-	{ DRM_MODE(119000, 1680, 1728,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 119000, 1680, 1728,
 		   1760, 1840, 1050, 1053, 1059, 1080, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x3a - 1680x1050@60Hz */
-	{ DRM_MODE(146250, 1680, 1784,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
 		   1960, 2240, 1050, 1053, 1059, 1089, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x3b - 1680x1050@75Hz */
-	{ DRM_MODE(187000, 1680, 1800,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800,
 		   1976, 2272, 1050, 1053, 1059, 1099, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x3c - 1680x1050@85Hz */
-	{ DRM_MODE(214750, 1680, 1808,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,
 		   1984, 2288, 1050, 1053, 1059, 1105, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x3d - 1680x1050@120Hz RB */
-	{ DRM_MODE(245500, 1680, 1728,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 245500, 1680, 1728,
 		   1760, 1840, 1050, 1053, 1059, 1112, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x3e - 1792x1344@60Hz */
-	{ DRM_MODE(204750, 1792, 1920,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
 		   2120, 2448, 1344, 1345, 1348, 1394, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x3f - 1792x1344@75Hz */
-	{ DRM_MODE(261000, 1792, 1888,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,
 		   2104, 2456, 1344, 1345, 1348, 1417, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x40 - 1792x1344@120Hz RB */
-	{ DRM_MODE(333250, 1792, 1840,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 333250, 1792, 1840,
 		   1872, 1952, 1344, 1347, 1351, 1423, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x41 - 1856x1392@60Hz */
-	{ DRM_MODE(218250, 1856, 1952,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
 		   2176, 2528, 1392, 1393, 1396, 1439, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x42 - 1856x1392@75Hz */
-	{ DRM_MODE(288000, 1856, 1984,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,
 		   2208, 2560, 1392, 1393, 1396, 1500, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x43 - 1856x1392@120Hz RB */
-	{ DRM_MODE(356500, 1856, 1904,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 356500, 1856, 1904,
 		   1936, 2016, 1392, 1395, 1399, 1474, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x52 - 1920x1080@60Hz */
-	{ DRM_MODE(148500, 1920, 2008,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
 		   2052, 2200, 1080, 1084, 1089, 1125, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x44 - 1920x1200@60Hz RB */
-	{ DRM_MODE(154000, 1920, 1968,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 154000, 1920, 1968,
 		   2000, 2080, 1200, 1203, 1209, 1235, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x45 - 1920x1200@60Hz */
-	{ DRM_MODE(193250, 1920, 2056,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
 		   2256, 2592, 1200, 1203, 1209, 1245, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x46 - 1920x1200@75Hz */
-	{ DRM_MODE(245250, 1920, 2056,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056,
 		   2264, 2608, 1200, 1203, 1209, 1255, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x47 - 1920x1200@85Hz */
-	{ DRM_MODE(281250, 1920, 2064,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,
 		   2272, 2624, 1200, 1203, 1209, 1262, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x48 - 1920x1200@120Hz RB */
-	{ DRM_MODE(317000, 1920, 1968,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 317000, 1920, 1968,
 		   2000, 2080, 1200, 1203, 1209, 1271, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x49 - 1920x1440@60Hz */
-	{ DRM_MODE(234000, 1920, 2048,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
 		   2256, 2600, 1440, 1441, 1444, 1500, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x4a - 1920x1440@75Hz */
-	{ DRM_MODE(297000, 1920, 2064,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,
 		   2288, 2640, 1440, 1441, 1444, 1500, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x4b - 1920x1440@120Hz RB */
-	{ DRM_MODE(380500, 1920, 1968,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 380500, 1920, 1968,
 		   2000, 2080, 1440, 1443, 1447, 1525, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x54 - 2048x1152@60Hz */
-	{ DRM_MODE(162000, 2048, 2074,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 162000, 2048, 2074,
 		   2154, 2250, 1152, 1153, 1156, 1200, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x4c - 2560x1600@60Hz RB */
-	{ DRM_MODE(268500, 2560, 2608,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 268500, 2560, 2608,
 		   2640, 2720, 1600, 1603, 1609, 1646, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x4d - 2560x1600@60Hz */
-	{ DRM_MODE(348500, 2560, 2752,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
 		   3032, 3504, 1600, 1603, 1609, 1658, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x4e - 2560x1600@75Hz */
-	{ DRM_MODE(443250, 2560, 2768,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768,
 		   3048, 3536, 1600, 1603, 1609, 1672, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x4f - 2560x1600@85Hz */
-	{ DRM_MODE(505250, 2560, 2768,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,
 		   3048, 3536, 1600, 1603, 1609, 1682, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x50 - 2560x1600@120Hz RB */
-	{ DRM_MODE(552750, 2560, 2608,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 552750, 2560, 2608,
 		   2640, 2720, 1600, 1603, 1609, 1694, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x57 - 4096x2160@60Hz RB */
-	{ DRM_MODE(556744, 4096, 4104,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 556744, 4096, 4104,
 		   4136, 4176, 2160, 2208, 2216, 2222, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x58 - 4096x2160@59.94Hz RB */
-	{ DRM_MODE(556188, 4096, 4104,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 556188, 4096, 4104,
 		   4136, 4176, 2160, 2208, 2216, 2222, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 };
@@ -1119,72 +1120,72 @@ static const struct drm_display_mode drm_dmt_modes[] = {
  */
 static const struct drm_display_mode edid_est_modes[] = {
 	/* 800x600@60Hz */
-	{ DRM_MODE(40000, 800, 840,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
 		   968, 1056, 600, 601, 605, 628, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 800x600@56Hz */
-	{ DRM_MODE(36000, 800, 824,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
 		   896, 1024, 600, 601, 603,  625, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 640x480@75Hz */
-	{ DRM_MODE(31500, 640, 656,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
 		   720, 840, 480, 481, 484, 500, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 640x480@72Hz */
-	{ DRM_MODE(31500, 640, 664,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
 		   704,  832, 480, 489, 492, 520, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 640x480@67Hz */
-	{ DRM_MODE(30240, 640, 704,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
 		   768,  864, 480, 483, 486, 525, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 640x480@60Hz */
-	{ DRM_MODE(25175, 640, 656,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
 		   752, 800, 480, 490, 492, 525, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 720x400@88Hz */
-	{ DRM_MODE(35500, 720, 738,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
 		   846, 900, 400, 421, 423,  449, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 720x400@70Hz */
-	{ DRM_MODE(28320, 720, 738,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
 		   846,  900, 400, 412, 414, 449, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 1280x1024@75Hz */
-	{ DRM_MODE(135000, 1280, 1296,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
 		   1440, 1688, 1024, 1025, 1028, 1066, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 1024x768@75Hz */
-	{ DRM_MODE(78750, 1024, 1040,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
 		   1136, 1312,  768, 769, 772, 800, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 1024x768@70Hz */
-	{ DRM_MODE(75000, 1024, 1048,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
 		   1184, 1328, 768, 771, 777, 806, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 1024x768@60Hz */
-	{ DRM_MODE(65000, 1024, 1048,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
 		   1184, 1344, 768, 771, 777, 806, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 1024x768@43Hz */
-	{ DRM_MODE(44900, 1024, 1032,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
 		   1208, 1264, 768, 768, 776, 817, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
 		   DRM_MODE_FLAG_INTERLACE) },
 	/* 832x624@75Hz */
-	{ DRM_MODE(57284, 832, 864,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
 		   928, 1152, 624, 625, 628, 667, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 800x600@75Hz */
-	{ DRM_MODE(49500, 800, 816,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
 		   896, 1056, 600, 601, 604,  625, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 800x600@72Hz */
-	{ DRM_MODE(50000, 800, 856,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
 		   976, 1040, 600, 637, 643, 666, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 1152x864@75Hz */
-	{ DRM_MODE(108000, 1152, 1216,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
 		   1344, 1600, 864, 865, 868, 900, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 };
@@ -2233,6 +2234,8 @@ static void drm_add_hdmi_modes(struct hdmi_edid_data *data,
 {
 	struct drm_display_mode *mode_buf = data->mode_buf;
 
+	if (data->modes >= MODE_LEN)
+		return;
 	mode_buf[(data->modes)++] = *mode;
 }
 
@@ -2306,11 +2309,10 @@ drm_add_cmdb_modes(u8 svd, struct drm_hdmi_info *hdmi)
 	bitmap_set(hdmi->y420_cmdb_modes, vic, 1);
 }
 
-static int
-do_cea_modes(const u8 *db, u8 len, struct drm_hdmi_info *hdmi,
-	     struct hdmi_edid_data *data)
+int do_cea_modes(struct hdmi_edid_data *data, const u8 *db, u8 len)
 {
 	int i, modes = 0;
+	struct drm_hdmi_info *hdmi = &data->display_info.hdmi;
 
 	for (i = 0; i < len; i++) {
 		struct drm_display_mode *mode;
@@ -2348,11 +2350,11 @@ do_cea_modes(const u8 *db, u8 len, struct drm_hdmi_info *hdmi,
  * which contains modes which can be supported in YCBCR 420
  * output format only.
  */
-static
-int do_y420vdb_modes(const u8 *svds, u8 svds_len, struct drm_hdmi_info *hdmi,
-		     struct hdmi_edid_data *data)
+static int
+do_y420vdb_modes(struct hdmi_edid_data *data, const u8 *svds, u8 svds_len)
 {
 	int modes = 0, i;
+	struct drm_hdmi_info *hdmi = &data->display_info.hdmi;
 
 	for (i = 0; i < svds_len; i++) {
 		u8 vic = svd_to_vic(svds[i]);
@@ -3060,8 +3062,7 @@ int add_cea_modes(struct hdmi_edid_data *data, struct edid *edid)
 			if (cea_db_tag(db) == EDID_CEA861_DB_VIDEO) {
 				video = db + 1;
 				video_len = dbl;
-				modes += do_cea_modes(video, dbl,
-						      &data->hdmi_info, data);
+				modes += do_cea_modes(data, video, dbl);
 			} else if (cea_db_is_hdmi_vsdb(db)) {
 				hdmi = db;
 				hdmi_len = dbl;
@@ -3069,9 +3070,8 @@ int add_cea_modes(struct hdmi_edid_data *data, struct edid *edid)
 				const u8 *vdb420 = &db[2];
 
 				/* Add 4:2:0(only) modes present in EDID */
-				modes += do_y420vdb_modes(vdb420, dbl - 1,
-							  &data->hdmi_info,
-							  data);
+				modes += do_y420vdb_modes(data, vdb420,
+							  dbl - 1);
 			}
 		}
 	}
@@ -3089,8 +3089,8 @@ int add_cea_modes(struct hdmi_edid_data *data, struct edid *edid)
 
 typedef void detailed_cb(struct detailed_timing *timing, void *closure);
 
-static
-void cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
+static void
+cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
 {
 	int i, n = 0;
 	u8 d = ext[0x02];
@@ -3101,8 +3101,8 @@ void cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
 		cb((struct detailed_timing *)(det_base + 18 * i), closure);
 }
 
-static
-void vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
+static void
+vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
 {
 	unsigned int i, n = min((int)ext[0x02], 6);
 	u8 *det_base = ext + 5;
@@ -3114,8 +3114,8 @@ void vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
 		cb((struct detailed_timing *)(det_base + 18 * i), closure);
 }
 
-static
-void drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
+static void
+drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
 {
 	int i;
 	struct edid *edid = (struct edid *)raw_edid;
@@ -3230,8 +3230,8 @@ struct drm_display_mode *drm_mode_detailed(struct edid *edid,
 
 	/* it is incorrect if hsync/vsync width is zero */
 	if (!hsync_pulse_width || !vsync_pulse_width) {
-		debug("Incorrect Detailed timing. "
-		      "Wrong Hsync/Vsync pulse width\n");
+		debug("Incorrect Detailed timing. ");
+		debug("Wrong Hsync/Vsync pulse width\n");
 		return NULL;
 	}
 
@@ -3281,6 +3281,7 @@ struct drm_display_mode *drm_mode_detailed(struct edid *edid,
 
 set_refresh:
 
+	mode->type = DRM_MODE_TYPE_DRIVER;
 	mode->vrefresh = drm_get_vrefresh(mode);
 
 	return mode;
@@ -3487,6 +3488,9 @@ do_detailed_mode(struct detailed_timing *timing, void *c)
 		if (!newmode)
 			return;
 
+		if (closure->preferred)
+			newmode->type |= DRM_MODE_TYPE_PREFERRED;
+
 		/*
 		 * Detailed modes are limited to 10kHz pixel clock resolution,
 		 * so fix up anything that looks like CEA/HDMI mode,
@@ -3496,6 +3500,7 @@ do_detailed_mode(struct detailed_timing *timing, void *c)
 		drm_add_hdmi_modes(closure->data, newmode);
 		drm_mode_destroy(newmode);
 		closure->modes++;
+		closure->preferred = 0;
 	}
 }
 
@@ -3512,9 +3517,14 @@ add_detailed_modes(struct hdmi_edid_data *data, struct edid *edid,
 	struct detailed_mode_closure closure = {
 		.data = data,
 		.edid = edid,
+		.preferred = 1,
 		.quirks = quirks,
 	};
 
+	if (closure.preferred && !version_greater(edid, 1, 3))
+		closure.preferred =
+			(edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
+
 	drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure);
 
 	return closure.modes;
@@ -4044,7 +4054,7 @@ drm_mode_std(struct hdmi_edid_data *data, struct edid *edid,
 	 */
 	for (i = 0; i < num; i++)
 		if (data->mode_buf[i].hdisplay == hsize &&
-		    data->mode_buf[i].hdisplay &&
+		    data->mode_buf[i].vdisplay == vsize &&
 		    drm_get_vrefresh(&data->mode_buf[i]) == vrefresh_rate)
 			return NULL;
 
@@ -4411,8 +4421,10 @@ drm_display_mode *drm_displayid_detailed(struct displayid_detailed_timings_1
 		hsync_positive ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
 	mode->flags |=
 		vsync_positive ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
+	mode->type = DRM_MODE_TYPE_DRIVER;
 
 	if (timings->flags & 0x80)
+		mode->type |= DRM_MODE_TYPE_PREFERRED;
 	mode->vrefresh = drm_get_vrefresh(mode);
 
 	return mode;
@@ -4753,6 +4765,7 @@ static void edid_fixup_preferred(struct hdmi_edid_data *data,
 
 	for (i = 0; i < num; i++) {
 		cur_mode = &data->mode_buf[i];
+		cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
 
 		if (cur_mode == preferred_mode)
 			continue;
@@ -4772,6 +4785,7 @@ static void edid_fixup_preferred(struct hdmi_edid_data *data,
 			preferred_mode = cur_mode;
 		}
 	}
+	preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
 	data->preferred_mode = preferred_mode;
 }
 
@@ -5286,3 +5300,203 @@ ssize_t hdmi_vendor_infoframe_pack(struct hdmi_vendor_infoframe *frame,
 
 	return length;
 }
+
+/**
+ * drm_do_probe_ddc_edid() - get EDID information via I2C
+ * @adap: ddc adapter
+ * @buf: EDID data buffer to be filled
+ * @block: 128 byte EDID block to start fetching from
+ * @len: EDID data buffer length to fetch
+ *
+ * Try to fetch EDID information by calling I2C driver functions.
+ *
+ * Return: 0 on success or -1 on failure.
+ */
+static int
+drm_do_probe_ddc_edid(struct ddc_adapter *adap, u8 *buf, unsigned int block,
+		      size_t len)
+{
+	unsigned char start = block * HDMI_EDID_BLOCK_SIZE;
+	unsigned char segment = block >> 1;
+	unsigned char xfers = segment ? 3 : 2;
+	int ret, retries = 5;
+
+	do {
+		struct i2c_msg msgs[] = {
+			{
+				.addr	= DDC_SEGMENT_ADDR,
+				.flags	= 0,
+				.len	= 1,
+				.buf	= &segment,
+			}, {
+				.addr	= DDC_ADDR,
+				.flags	= 0,
+				.len	= 1,
+				.buf	= &start,
+			}, {
+				.addr	= DDC_ADDR,
+				.flags	= I2C_M_RD,
+				.len	= len,
+				.buf	= buf,
+			}
+		};
+
+		ret = adap->ddc_xfer(adap, &msgs[3 - xfers], xfers);
+
+	} while (ret != xfers && --retries);
+
+	/* All msg transfer successfully. */
+	return ret == xfers ? 0 : -1;
+}
+
+int drm_do_get_edid(struct ddc_adapter *adap, u8 *edid)
+{
+	int i, j, block_num, block = 0;
+	bool edid_corrupt;
+#ifdef DEBUG
+	u8 *buff;
+#endif
+
+	/* base block fetch */
+	for (i = 0; i < 4; i++) {
+		if (drm_do_probe_ddc_edid(adap, edid, 0, HDMI_EDID_BLOCK_SIZE))
+			goto err;
+		if (drm_edid_block_valid(edid, 0, true,
+					 &edid_corrupt))
+			break;
+		if (i == 0 && drm_edid_is_zero(edid, HDMI_EDID_BLOCK_SIZE)) {
+			printf("edid base block is 0, get edid failed\n");
+			goto err;
+		}
+	}
+
+	if (i == 4)
+		goto err;
+
+	block++;
+	/* get the number of extensions */
+	block_num = edid[0x7e];
+
+	for (j = 1; j <= block_num; j++) {
+		for (i = 0; i < 4; i++) {
+			if (drm_do_probe_ddc_edid(adap, &edid[0x80 * j], j,
+						  HDMI_EDID_BLOCK_SIZE))
+				goto err;
+			if (drm_edid_block_valid(&edid[0x80 * j], j,
+						 true, NULL))
+				break;
+		}
+
+		if (i == 4)
+			goto err;
+		block++;
+	}
+
+#ifdef DEBUG
+	printf("RAW EDID:\n");
+	for (i = 0; i < block_num + 1; i++) {
+		buff = &edid[0x80 * i];
+		for (j = 0; j < HDMI_EDID_BLOCK_SIZE; j++) {
+			if (j % 16 == 0)
+				printf("\n");
+			printf("0x%02x, ", buff[j]);
+		}
+		printf("\n");
+	}
+#endif
+
+	return 0;
+
+err:
+	printf("can't get edid block:%d\n", block);
+	/* clear all read edid block, include invalid block */
+	memset(edid, 0, HDMI_EDID_BLOCK_SIZE * (block + 1));
+	return -EFAULT;
+}
+
+static ssize_t hdmi_ddc_read(struct ddc_adapter *adap, u16 addr, u8 offset,
+			     void *buffer, size_t size)
+{
+	struct i2c_msg msgs[2] = {
+		{
+			.addr = addr,
+			.flags = 0,
+			.len = 1,
+			.buf = &offset,
+		}, {
+			.addr = addr,
+			.flags = I2C_M_RD,
+			.len = size,
+			.buf = buffer,
+		}
+	};
+
+	return adap->ddc_xfer(adap, msgs, ARRAY_SIZE(msgs));
+}
+
+static ssize_t hdmi_ddc_write(struct ddc_adapter *adap, u16 addr, u8 offset,
+			      const void *buffer, size_t size)
+{
+	struct i2c_msg msg = {
+		.addr = addr,
+		.flags = 0,
+		.len = 1 + size,
+		.buf = NULL,
+	};
+	void *data;
+	int err;
+
+	data = malloc(1 + size);
+	if (!data)
+		return -ENOMEM;
+
+	msg.buf = data;
+
+	memcpy(data, &offset, sizeof(offset));
+	memcpy(data + 1, buffer, size);
+
+	err = adap->ddc_xfer(adap, &msg, 1);
+
+	free(data);
+
+	return err;
+}
+
+/**
+ * drm_scdc_readb - read a single byte from SCDC
+ * @adap: ddc adapter
+ * @offset: offset of register to read
+ * @value: return location for the register value
+ *
+ * Reads a single byte from SCDC. This is a convenience wrapper around the
+ * drm_scdc_read() function.
+ *
+ * Returns:
+ * 0 on success or a negative error code on failure.
+ */
+u8 drm_scdc_readb(struct ddc_adapter *adap, u8 offset,
+		  u8 *value)
+{
+	return hdmi_ddc_read(adap, SCDC_I2C_SLAVE_ADDRESS, offset, value,
+			     sizeof(*value));
+}
+
+/**
+ * drm_scdc_writeb - write a single byte to SCDC
+ * @adap: ddc adapter
+ * @offset: offset of register to read
+ * @value: return location for the register value
+ *
+ * Writes a single byte to SCDC. This is a convenience wrapper around the
+ * drm_scdc_write() function.
+ *
+ * Returns:
+ * 0 on success or a negative error code on failure.
+ */
+u8 drm_scdc_writeb(struct ddc_adapter *adap, u8 offset,
+		   u8 value)
+{
+	return hdmi_ddc_write(adap, SCDC_I2C_SLAVE_ADDRESS, offset, &value,
+			      sizeof(value));
+}
+
diff --git a/drivers/video/drm/Kconfig b/drivers/video/drm/Kconfig
index a83278dc3c..e1c71cbe0a 100644
--- a/drivers/video/drm/Kconfig
+++ b/drivers/video/drm/Kconfig
@@ -21,6 +21,14 @@ config DRM_ROCKCHIP_DW_HDMI
 	 for the Synopsys DesignWare HDMI driver. If you want to
 	 enable HDMI on, you should selet this option.
 
+config ROCKCHIP_INNO_HDMI_PHY
+	bool "Rockchip specific extensions for INNO HDMI PHY"
+	depends on DRM_ROCKCHIP
+	help
+	 This selects support for INNO HDMI PHY. If you want to
+	 use HDMI or TVE in RK322XH or RK322X, you should selet
+	 this option.
+
 config DRM_ROCKCHIP_MIPI_DSI
 	bool
 
diff --git a/drivers/video/drm/Makefile b/drivers/video/drm/Makefile
index f6b39fa882..195b6ca7e6 100644
--- a/drivers/video/drm/Makefile
+++ b/drivers/video/drm/Makefile
@@ -11,6 +11,7 @@ obj-$(CONFIG_DRM_ROCKCHIP_MIPI_DSI)	+= rockchip_mipi_dsi.o
 obj-$(CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI) += rockchip-dw-mipi-dsi.o \
 					  rockchip-inno-mipi-dphy.o
 obj-$(CONFIG_DRM_ROCKCHIP_DW_HDMI) += rockchip_dw_hdmi.o dw_hdmi.o
+obj-$(CONFIG_ROCKCHIP_INNO_HDMI_PHY) += rockchip-inno-hdmi-phy.o
 obj-$(CONFIG_DRM_ROCKCHIP_ANALOGIX_DP) += rockchip_analogix_dp.o rockchip_analogix_dp_reg.o
 obj-$(CONFIG_DRM_ROCKCHIP_LVDS) += rockchip_lvds.o
 obj-$(CONFIG_DRM_ROCKCHIP_RGB) += rockchip_rgb.o
diff --git a/drivers/video/drm/dw_hdmi.c b/drivers/video/drm/dw_hdmi.c
index 5edfc2238e..152f0377b2 100644
--- a/drivers/video/drm/dw_hdmi.c
+++ b/drivers/video/drm/dw_hdmi.c
@@ -8,9 +8,10 @@
 #include <malloc.h>
 #include <syscon.h>
 #include <asm/arch-rockchip/clock.h>
+#include <asm/arch/vendor.h>
 #include <edid.h>
 #include <dm/device.h>
-#include <dm/of_node.h>
+#include <dm/ofnode.h>
 #include <dm/read.h>
 #include <linux/hdmi.h>
 #include <linux/media-bus-format.h>
@@ -20,7 +21,11 @@
 #include "rockchip_crtc.h"
 #include "rockchip_connector.h"
 #include "dw_hdmi.h"
+#include "rockchip_phy.h"
 
+#define HDCP_PRIVATE_KEY_SIZE   280
+#define HDCP_KEY_SHA_SIZE       20
+#define HDMI_HDCP1X_ID		5
 /*
  * Unless otherwise noted, entries in this table are 100% optimization.
  * Values can be obtained from hdmi_compute_n() but that function is
@@ -112,6 +117,7 @@ struct hdmi_vmode {
 	unsigned int mpixelclock;
 	unsigned int mpixelrepetitioninput;
 	unsigned int mpixelrepetitionoutput;
+	unsigned int mtmdsclock;
 };
 
 struct hdmi_data_info {
@@ -133,12 +139,29 @@ struct dw_hdmi_phy_data {
 			 unsigned long mpixelclock);
 };
 
+struct hdcp_keys {
+	u8 KSV[8];
+	u8 devicekey[HDCP_PRIVATE_KEY_SIZE];
+	u8 sha1[HDCP_KEY_SHA_SIZE];
+	u8 seeds[2];
+};
+
+struct dw_hdmi_i2c {
+	u8			slave_reg;
+	bool			is_regaddr;
+	bool			is_segment;
+
+	unsigned int		scl_high_ns;
+	unsigned int		scl_low_ns;
+};
+
 struct dw_hdmi {
 	enum dw_hdmi_devtype dev_type;
 	unsigned int version;
 	struct hdmi_data_info hdmi_data;
 	struct hdmi_edid_data edid_data;
 	const struct dw_hdmi_plat_data *plat_data;
+	struct ddc_adapter adap;
 
 	int vic;
 	int io_width;
@@ -149,6 +172,7 @@ struct dw_hdmi {
 	bool sink_has_audio;
 	void *regs;
 	void *grf;
+	struct dw_hdmi_i2c *i2c;
 
 	struct {
 		const struct dw_hdmi_phy_ops *ops;
@@ -163,9 +187,12 @@ struct dw_hdmi {
 	unsigned int audio_cts;
 	unsigned int audio_n;
 	bool audio_enable;
+	bool scramble_low_rates;
 
 	void (*write)(struct dw_hdmi *hdmi, u8 val, int offset);
 	u8 (*read)(struct dw_hdmi *hdmi, int offset);
+
+	bool hdcp1x_enable;
 };
 
 static void dw_hdmi_writel(struct dw_hdmi *hdmi, u8 val, int offset)
@@ -349,6 +376,166 @@ static inline void hdmi_phy_test_dout(struct dw_hdmi *hdmi,
 	hdmi_writeb(hdmi, bit, HDMI_PHY_TST2);
 }
 
+static int dw_hdmi_i2c_read(struct dw_hdmi *hdmi,
+			    unsigned char *buf, unsigned int length)
+{
+	struct dw_hdmi_i2c *i2c = hdmi->i2c;
+	int interrupt = 0, i = 20;
+
+	if (!i2c->is_regaddr) {
+		printf("set read register address to 0\n");
+		i2c->slave_reg = 0x00;
+		i2c->is_regaddr = true;
+	}
+
+	while (length--) {
+		hdmi_writeb(hdmi, i2c->slave_reg++, HDMI_I2CM_ADDRESS);
+		if (i2c->is_segment)
+			hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_READ_EXT,
+				    HDMI_I2CM_OPERATION);
+		else
+			hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_READ,
+				    HDMI_I2CM_OPERATION);
+
+		while (i--) {
+			udelay(1000);
+			interrupt = hdmi_readb(hdmi, HDMI_IH_I2CM_STAT0);
+			if (interrupt)
+				hdmi_writeb(hdmi, interrupt,
+					    HDMI_IH_I2CM_STAT0);
+			if (interrupt & (m_SCDC_READREQ | m_I2CM_DONE |
+					 m_I2CM_ERROR))
+				break;
+		}
+
+		if (!interrupt) {
+			printf("[%s] i2c read reg[0x%02x] no interrupt\n",
+			       __func__, i2c->slave_reg);
+			return -EAGAIN;
+		}
+
+		/* Check for error condition on the bus */
+		if (interrupt & HDMI_IH_I2CM_STAT0_ERROR) {
+			printf("[%s] read reg[0x%02x] data error:0x%02x\n",
+			       __func__, i2c->slave_reg, interrupt);
+			return -EIO;
+		}
+
+		i = 20;
+		*buf++ = hdmi_readb(hdmi, HDMI_I2CM_DATAI);
+	}
+	i2c->is_segment = false;
+
+	return 0;
+}
+
+static int dw_hdmi_i2c_write(struct dw_hdmi *hdmi,
+			     unsigned char *buf, unsigned int length)
+{
+	struct dw_hdmi_i2c *i2c = hdmi->i2c;
+	int i = 20;
+	u8 interrupt = 0;
+
+	if (!i2c->is_regaddr) {
+		/* Use the first write byte as register address */
+		i2c->slave_reg = buf[0];
+		length--;
+		buf++;
+		i2c->is_regaddr = true;
+	}
+
+	while (length--) {
+		hdmi_writeb(hdmi, *buf++, HDMI_I2CM_DATAO);
+		hdmi_writeb(hdmi, i2c->slave_reg++, HDMI_I2CM_ADDRESS);
+		hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_WRITE,
+			    HDMI_I2CM_OPERATION);
+
+		while (i--) {
+			udelay(1000);
+			interrupt = hdmi_readb(hdmi, HDMI_IH_I2CM_STAT0);
+			if (interrupt)
+				hdmi_writeb(hdmi,
+					    interrupt, HDMI_IH_I2CM_STAT0);
+
+			if (interrupt & (m_SCDC_READREQ |
+					 m_I2CM_DONE | m_I2CM_ERROR))
+				break;
+		}
+
+		if ((interrupt & m_I2CM_ERROR) || (i == -1)) {
+			printf("[%s] write data error\n", __func__);
+			return -EIO;
+		} else if (interrupt & m_I2CM_DONE) {
+			printf("[%s] write offset %02x success\n",
+			       __func__, i2c->slave_reg);
+			return -EAGAIN;
+		}
+
+		i = 20;
+	}
+
+	return 0;
+}
+
+static int dw_hdmi_i2c_xfer(struct ddc_adapter *adap,
+			    struct i2c_msg *msgs, int num)
+{
+	struct dw_hdmi *hdmi = container_of(adap, struct dw_hdmi, adap);
+	struct dw_hdmi_i2c *i2c = hdmi->i2c;
+	u8 addr = msgs[0].addr;
+	int i, ret = 0;
+
+	printf("xfer: num: %d, addr: %#x\n", num, addr);
+	for (i = 0; i < num; i++) {
+		if (msgs[i].len == 0) {
+			printf("unsupported transfer %d/%d, no data\n",
+			       i + 1, num);
+			return -EOPNOTSUPP;
+		}
+	}
+
+	hdmi_writeb(hdmi, 0x00, HDMI_IH_MUTE_I2CM_STAT0);
+
+	/* Set slave device address taken from the first I2C message */
+	if (addr == DDC_SEGMENT_ADDR && msgs[0].len == 1)
+		addr = DDC_ADDR;
+	hdmi_writeb(hdmi, addr, HDMI_I2CM_SLAVE);
+
+	/* Set slave device register address on transfer */
+	i2c->is_regaddr = false;
+
+	/* Set segment pointer for I2C extended read mode operation */
+	i2c->is_segment = false;
+
+	for (i = 0; i < num; i++) {
+		debug("xfer: num: %d/%d, len: %d, flags: %#x\n",
+		      i + 1, num, msgs[i].len, msgs[i].flags);
+		if (msgs[i].addr == DDC_SEGMENT_ADDR && msgs[i].len == 1) {
+			i2c->is_segment = true;
+			hdmi_writeb(hdmi, DDC_SEGMENT_ADDR, HDMI_I2CM_SEGADDR);
+			hdmi_writeb(hdmi, *msgs[i].buf, HDMI_I2CM_SEGPTR);
+		} else {
+			if (msgs[i].flags & I2C_M_RD)
+				ret = dw_hdmi_i2c_read(hdmi, msgs[i].buf,
+						       msgs[i].len);
+			else
+				ret = dw_hdmi_i2c_write(hdmi, msgs[i].buf,
+							msgs[i].len);
+		}
+		if (ret < 0)
+			break;
+	}
+
+	if (!ret)
+		ret = num;
+
+	/* Mute DONE and ERROR interrupts */
+	hdmi_writeb(hdmi, HDMI_IH_I2CM_STAT0_ERROR | HDMI_IH_I2CM_STAT0_DONE,
+		    HDMI_IH_MUTE_I2CM_STAT0);
+
+	return ret;
+}
+
 static bool hdmi_phy_wait_i2c_done(struct dw_hdmi *hdmi, int msec)
 {
 	u32 val;
@@ -491,8 +678,8 @@ static int dw_hdmi_phy_power_on(struct dw_hdmi *hdmi)
 		printf("PHY PLL failed to lock\n");
 		return -ETIMEDOUT;
 	}
-
 	printf("PHY PLL locked %u iterations\n", i);
+
 	return 0;
 }
 
@@ -509,6 +696,13 @@ int hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi *hdmi,
 	const struct dw_hdmi_mpll_config *mpll_config = pdata->mpll_cfg;
 	const struct dw_hdmi_curr_ctrl *curr_ctrl = pdata->cur_ctr;
 	const struct dw_hdmi_phy_config *phy_config = pdata->phy_config;
+	unsigned int tmdsclock = hdmi->hdmi_data.video_mode.mtmdsclock;
+	unsigned int depth =
+		hdmi_bus_fmt_color_depth(hdmi->hdmi_data.enc_out_bus_format);
+
+	if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format) &&
+	    pdata->mpll_cfg_420)
+		mpll_config = pdata->mpll_cfg_420;
 
 	/* PLL/MPLL Cfg - always match on final entry */
 	for (; mpll_config->mpixelclock != ~0UL; mpll_config++)
@@ -516,11 +710,11 @@ int hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi *hdmi,
 			break;
 
 	for (; curr_ctrl->mpixelclock != ~0UL; curr_ctrl++)
-		if (mpixelclock <= curr_ctrl->mpixelclock)
+		if (tmdsclock <= curr_ctrl->mpixelclock)
 			break;
 
 	for (; phy_config->mpixelclock != ~0UL; phy_config++)
-		if (mpixelclock <= phy_config->mpixelclock)
+		if (tmdsclock <= phy_config->mpixelclock)
 			break;
 
 	if (mpll_config->mpixelclock == ~0UL ||
@@ -528,31 +722,29 @@ int hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi *hdmi,
 	    phy_config->mpixelclock == ~0UL)
 		return -EINVAL;
 
-	/*
-	 * RK3399 mpll clock source is vpll, also is vop clock source.
-	 * vpll rate is twice of mpixelclock in YCBCR420 mode, we need
-	 * to enable mpll pre-divider.
-	 */
-	if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format) &&
-	    (hdmi->dev_type == RK3399_HDMI || hdmi->dev_type == RK3368_HDMI))
-		dw_hdmi_phy_i2c_write(hdmi, mpll_config->res[0].cpce | 4,
-				      HDMI_3D_TX_PHY_CPCE_CTRL);
+	if (!hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format))
+		depth = fls(depth - 8);
 	else
-		dw_hdmi_phy_i2c_write(hdmi, mpll_config->res[0].cpce,
-				      HDMI_3D_TX_PHY_CPCE_CTRL);
-	dw_hdmi_phy_i2c_write(hdmi, mpll_config->res[0].gmp,
+		depth = 0;
+	if (depth)
+		depth--;
+
+	dw_hdmi_phy_i2c_write(hdmi, mpll_config->res[depth].cpce,
+			      HDMI_3D_TX_PHY_CPCE_CTRL);
+
+	dw_hdmi_phy_i2c_write(hdmi, mpll_config->res[depth].gmp,
 			      HDMI_3D_TX_PHY_GMPCTRL);
-	dw_hdmi_phy_i2c_write(hdmi, curr_ctrl->curr[0],
+	dw_hdmi_phy_i2c_write(hdmi, curr_ctrl->curr[depth],
 			      HDMI_3D_TX_PHY_CURRCTRL);
 
 	dw_hdmi_phy_i2c_write(hdmi, 0, HDMI_3D_TX_PHY_PLLPHBYCTRL);
 	dw_hdmi_phy_i2c_write(hdmi, HDMI_3D_TX_PHY_MSM_CTRL_CKO_SEL_FB_CLK,
 			      HDMI_3D_TX_PHY_MSM_CTRL);
 
-	dw_hdmi_phy_i2c_write(hdmi, 0x0004, HDMI_3D_TX_PHY_TXTERM);
-	dw_hdmi_phy_i2c_write(hdmi, 0x8009,
+	dw_hdmi_phy_i2c_write(hdmi, phy_config->term, HDMI_3D_TX_PHY_TXTERM);
+	dw_hdmi_phy_i2c_write(hdmi, phy_config->sym_ctr,
 			      HDMI_3D_TX_PHY_CKSYMTXCTRL);
-	dw_hdmi_phy_i2c_write(hdmi, 0x0272,
+	dw_hdmi_phy_i2c_write(hdmi, phy_config->vlev_ctr,
 			      HDMI_3D_TX_PHY_VLEVCTRL);
 
 	/* Override and disable clock termination. */
@@ -600,168 +792,13 @@ static const struct dw_hdmi_phy_data dw_hdmi_phys[] = {
 	}
 };
 
-/* ddc i2c master reset */
-static void rockchip_dw_hdmi_i2cm_reset(struct dw_hdmi *hdmi)
-{
-	hdmi_writeb(hdmi, 0x00, HDMI_I2CM_SOFTRSTZ);
-	udelay(100);
-}
-
-static void rockchip_dw_hdmi_i2cm_mask_int(struct dw_hdmi *hdmi, int mask)
-{
-	if (!mask) {
-		hdmi_writeb(hdmi, HDMI_I2CM_INT_DONE_POL, HDMI_I2CM_INT);
-		hdmi_writeb(hdmi, HDMI_I2CM_CTLINT_NAC_POL |
-			    HDMI_I2CM_CTLINT_ARB_POL, HDMI_I2CM_CTLINT);
-		hdmi_writeb(hdmi, 0x00, HDMI_IH_MUTE_I2CM_STAT0);
-	} else {
-		hdmi_writeb(hdmi, 0xff, HDMI_I2CM_INT);
-		hdmi_writeb(hdmi, 0xff, HDMI_I2CM_CTLINT);
-	}
-}
-
-static u16 i2c_count(u16 sfrclock, u16 sclmintime)
-{
-	unsigned long tmp_scl_period = 0;
-
-	if (((sfrclock * sclmintime) % I2C_DIV_FACTOR) != 0)
-		tmp_scl_period = (unsigned long)((sfrclock * sclmintime) +
-				(I2C_DIV_FACTOR - ((sfrclock * sclmintime) %
-				I2C_DIV_FACTOR))) / I2C_DIV_FACTOR;
-	else
-		tmp_scl_period = (unsigned long)(sfrclock * sclmintime) /
-				I2C_DIV_FACTOR;
-
-	return (u16)(tmp_scl_period);
-}
-
-static void rockchip_dw_hdmi_i2cm_clk_init(struct dw_hdmi *hdmi)
-{
-	int value;
-
-	/* Set DDC I2C CLK which divided from DDC_CLK. */
-	value = i2c_count(24000, EDID_I2C_MIN_SS_SCL_HIGH_TIME);
-	hdmi_writeb(hdmi, value & 0xff,
-		    HDMI_I2CM_SS_SCL_HCNT_0_ADDR);
-	hdmi_writeb(hdmi, (value >> 8) & 0xff,
-		    HDMI_I2CM_SS_SCL_HCNT_1_ADDR);
-	value = i2c_count(24000, EDID_I2C_MIN_SS_SCL_LOW_TIME);
-	hdmi_writeb(hdmi, value & 0xff,
-		    HDMI_I2CM_SS_SCL_LCNT_0_ADDR);
-	hdmi_writeb(hdmi, (value >> 8) & 0xff,
-		    HDMI_I2CM_SS_SCL_LCNT_1_ADDR);
-	hdmi_modb(hdmi, HDMI_I2CM_DIV_STD_MODE,
-		  HDMI_I2CM_DIV_FAST_STD_MODE, HDMI_I2CM_DIV);
-}
-
-/*set read/write offset,set read/write mode*/
-static void rockchip_dw_hdmi_i2cm_write_request(struct dw_hdmi *hdmi,
-						u8 offset, u8 data)
-{
-	hdmi_writeb(hdmi, offset, HDMI_I2CM_ADDRESS);
-	hdmi_writeb(hdmi, data, HDMI_I2CM_DATAO);
-	hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_WRITE, HDMI_I2CM_OPERATION_READ);
-}
-
-static void rockchip_dw_hdmi_i2cm_read_request(struct dw_hdmi *hdmi,
-					       u8 offset)
-{
-	hdmi_writeb(hdmi, offset, HDMI_I2CM_ADDRESS);
-	hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_READ, HDMI_I2CM_OPERATION);
-}
-
-static void rockchip_dw_hdmi_i2cm_write_data(struct dw_hdmi *hdmi,
-					     u8 data, u8 offset)
-{
-	u8 interrupt = 0;
-	int trytime = 2;
-	int i = 20;
-
-	while (trytime-- > 0) {
-		rockchip_dw_hdmi_i2cm_write_request(hdmi, offset, data);
-		while (i--) {
-			udelay(1000);
-			interrupt = hdmi_readb(hdmi, HDMI_IH_I2CM_STAT0);
-			if (interrupt)
-				hdmi_writeb(hdmi,
-					    interrupt, HDMI_IH_I2CM_STAT0);
-
-			if (interrupt & (m_SCDC_READREQ |
-					 m_I2CM_DONE | m_I2CM_ERROR))
-				break;
-		}
-
-		if (interrupt & m_I2CM_DONE) {
-			printf("[%s] write offset %02x data %02x success\n",
-			       __func__, offset, data);
-			trytime = 0;
-		} else if ((interrupt & m_I2CM_ERROR) || (i == -1)) {
-			printf("[%s] write data error\n", __func__);
-			rockchip_dw_hdmi_i2cm_reset(hdmi);
-		}
-	}
-}
-
-static int rockchip_dw_hdmi_i2cm_read_data(struct dw_hdmi *hdmi, u8 offset)
-{
-	u8 interrupt = 0, val = 0;
-	int trytime = 2;
-	int i = 20;
-
-	while (trytime-- > 0) {
-		rockchip_dw_hdmi_i2cm_read_request(hdmi, offset);
-		while (i--) {
-			udelay(1000);
-			interrupt = hdmi_readb(hdmi, HDMI_IH_I2CM_STAT0);
-			if (interrupt)
-				hdmi_writeb(hdmi, HDMI_IH_I2CM_STAT0,
-					    interrupt);
-
-			if (interrupt & (m_SCDC_READREQ |
-				m_I2CM_DONE | m_I2CM_ERROR))
-				break;
-		}
-
-		if (interrupt & m_I2CM_DONE) {
-			val = hdmi_readb(hdmi, HDMI_I2CM_DATAI);
-			trytime = 0;
-		} else if ((interrupt & m_I2CM_ERROR) || (i == -1)) {
-			printf("[%s] read data error\n", __func__);
-			rockchip_dw_hdmi_i2cm_reset(hdmi);
-		}
-	}
-	return val;
-}
-
-static int rockchip_dw_hdmi_scdc_get_sink_version(struct dw_hdmi *hdmi)
-{
-	return rockchip_dw_hdmi_i2cm_read_data(hdmi, SCDC_SINK_VERSION);
-}
-
-static void rockchip_dw_hdmi_scdc_set_source_version(struct dw_hdmi *hdmi,
-						     u8 version)
-{
-	rockchip_dw_hdmi_i2cm_write_data(hdmi, version, SCDC_SOURCE_VERSION);
-}
-
-static void rockchip_dw_hdmi_scdc_init(struct dw_hdmi *hdmi)
-{
-	rockchip_dw_hdmi_i2cm_reset(hdmi);
-	rockchip_dw_hdmi_i2cm_mask_int(hdmi, 1);
-	rockchip_dw_hdmi_i2cm_clk_init(hdmi);
-	/* set scdc i2c addr */
-	hdmi_writeb(hdmi, DDC_I2C_SCDC_ADDR, HDMI_I2CM_SLAVE);
-	rockchip_dw_hdmi_i2cm_mask_int(hdmi, 0);/*enable interrupt*/
-}
-
 static int rockchip_dw_hdmi_scrambling_enable(struct dw_hdmi *hdmi,
 					      int enable)
 {
-	int stat;
+	u8 stat;
+
+	drm_scdc_readb(&hdmi->adap, SCDC_TMDS_CONFIG, &stat);
 
-	rockchip_dw_hdmi_scdc_init(hdmi);
-	stat = rockchip_dw_hdmi_i2cm_read_data(hdmi,
-					       SCDC_TMDS_CONFIG);
 	if (stat < 0) {
 		debug("Failed to read tmds config\n");
 		return false;
@@ -770,7 +807,7 @@ static int rockchip_dw_hdmi_scrambling_enable(struct dw_hdmi *hdmi,
 	if (enable == 1) {
 		/* Write on Rx the bit Scrambling_Enable, register 0x20 */
 		stat |= SCDC_SCRAMBLING_ENABLE;
-		rockchip_dw_hdmi_i2cm_write_data(hdmi, stat, SCDC_TMDS_CONFIG);
+		drm_scdc_writeb(&hdmi->adap, SCDC_TMDS_CONFIG, stat);
 		/* TMDS software reset request */
 		hdmi_writeb(hdmi, (u8)~HDMI_MC_SWRSTZ_TMDSSWRST_REQ,
 			    HDMI_MC_SWRSTZ);
@@ -784,7 +821,7 @@ static int rockchip_dw_hdmi_scrambling_enable(struct dw_hdmi *hdmi,
 			    HDMI_MC_SWRSTZ);
 		/* Write on Rx the bit Scrambling_Enable, register 0x20 */
 		stat &= ~SCDC_SCRAMBLING_ENABLE;
-		rockchip_dw_hdmi_i2cm_write_data(hdmi, stat, SCDC_TMDS_CONFIG);
+		drm_scdc_writeb(&hdmi->adap, SCDC_TMDS_CONFIG, stat);
 	}
 
 	return 0;
@@ -792,17 +829,14 @@ static int rockchip_dw_hdmi_scrambling_enable(struct dw_hdmi *hdmi,
 
 static void rockchip_dw_hdmi_scdc_set_tmds_rate(struct dw_hdmi *hdmi)
 {
-	int stat;
+	u8 stat;
 
-	rockchip_dw_hdmi_scdc_init(hdmi);
-	stat = rockchip_dw_hdmi_i2cm_read_data(hdmi,
-					       SCDC_TMDS_CONFIG);
-	if (hdmi->hdmi_data.video_mode.mpixelclock > 340000000)
+	drm_scdc_readb(&hdmi->adap, SCDC_TMDS_CONFIG, &stat);
+	if (hdmi->hdmi_data.video_mode.mtmdsclock > 340000000)
 		stat |= SCDC_TMDS_BIT_CLOCK_RATIO_BY_40;
 	else
 		stat &= ~SCDC_TMDS_BIT_CLOCK_RATIO_BY_40;
-	rockchip_dw_hdmi_i2cm_write_data(hdmi, stat,
-					 SCDC_TMDS_CONFIG);
+	drm_scdc_writeb(&hdmi->adap, SCDC_TMDS_CONFIG, stat);
 }
 
 static int hdmi_phy_configure(struct dw_hdmi *hdmi)
@@ -810,7 +844,8 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi)
 	const struct dw_hdmi_phy_data *phy = hdmi->phy.data;
 	const struct dw_hdmi_plat_data *pdata = hdmi->plat_data;
 	unsigned long mpixelclock = hdmi->hdmi_data.video_mode.mpixelclock;
-	int ret, sink_version;
+	unsigned long mtmdsclock = hdmi->hdmi_data.video_mode.mtmdsclock;
+	int ret;
 
 	dw_hdmi_phy_power_off(hdmi);
 
@@ -845,14 +880,14 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi)
 	}
 
 	/* Wait for resuming transmission of TMDS clock and data */
-	if (mpixelclock > 340000000)
+	if (mtmdsclock > 340000000)
 		mdelay(100);
 
 	return dw_hdmi_phy_power_on(hdmi);
 }
 
-static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data,
-			    struct drm_display_mode *mode)
+static int dw_hdmi_phy_init(struct dw_hdmi *hdmi,
+			    void *data)
 {
 	int i, ret;
 
@@ -868,13 +903,14 @@ static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data,
 	return 0;
 }
 
-static void dw_hdmi_phy_disable(struct dw_hdmi *hdmi, void *data)
+static void dw_hdmi_phy_disable(struct dw_hdmi *hdmi,
+				void *data)
 {
 	dw_hdmi_phy_power_off(hdmi);
 }
 
-static enum drm_connector_status dw_hdmi_phy_read_hpd(struct dw_hdmi *hdmi,
-						      void *data)
+static enum drm_connector_status
+dw_hdmi_phy_read_hpd(struct dw_hdmi *hdmi, void *data)
 {
 	return hdmi_readb(hdmi, HDMI_PHY_STAT0) & HDMI_PHY_HPD ?
 		connector_status_connected : connector_status_disconnected;
@@ -935,29 +971,58 @@ static int dw_hdmi_detect_phy(struct dw_hdmi *hdmi)
 	return -ENODEV;
 }
 
+static unsigned int
+hdmi_get_tmdsclock(struct dw_hdmi *hdmi, unsigned long mpixelclock)
+{
+	unsigned int tmdsclock = mpixelclock;
+	unsigned int depth =
+		hdmi_bus_fmt_color_depth(hdmi->hdmi_data.enc_out_bus_format);
+
+	if (!hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format)) {
+		switch (depth) {
+		case 16:
+			tmdsclock = mpixelclock * 2;
+			break;
+		case 12:
+			tmdsclock = mpixelclock * 3 / 2;
+			break;
+		case 10:
+			tmdsclock = mpixelclock * 5 / 4;
+			break;
+		default:
+			break;
+		}
+	}
+
+	return tmdsclock;
+}
+
 static void hdmi_av_composer(struct dw_hdmi *hdmi,
 			     const struct drm_display_mode *mode)
 {
-	u8 inv_val = 0;
+	u8 bytes = 0, inv_val = 0;
 	struct hdmi_vmode *vmode = &hdmi->hdmi_data.video_mode;
 	struct drm_hdmi_info *hdmi_info = &hdmi->edid_data.display_info.hdmi;
-	int bytes, hblank, vblank, h_de_hs, v_de_vs, hsync_len, vsync_len;
+	int hblank, vblank, h_de_hs, v_de_vs, hsync_len, vsync_len;
 	unsigned int hdisplay, vdisplay;
 
-	vmode->mpixelclock = mode->clock * 1000;
-	if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format))
-		vmode->mpixelclock /= 2;
+	vmode->mpixelclock = mode->crtc_clock * 1000;
 	if ((mode->flags & DRM_MODE_FLAG_3D_MASK) ==
 		DRM_MODE_FLAG_3D_FRAME_PACKING)
 		vmode->mpixelclock *= 2;
-	printf("final pixclk = %d\n", vmode->mpixelclock);
+	vmode->mtmdsclock = hdmi_get_tmdsclock(hdmi, vmode->mpixelclock);
+	if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format))
+		vmode->mtmdsclock /= 2;
+	printf("final pixclk = %d tmdsclk = %d\n",
+	       vmode->mpixelclock, vmode->mtmdsclock);
 
 	/* Set up HDMI_FC_INVIDCONF
 	 * fc_invidconf.HDCP_keepout must be set (1'b1)
 	 * when activate the scrambler feature.
 	 */
-	inv_val = (vmode->mpixelclock > 340000000 ||
-		   hdmi_info->scdc.scrambling.low_rates ?
+	inv_val = (vmode->mtmdsclock > 340000000 ||
+		   (hdmi_info->scdc.scrambling.low_rates &&
+		   hdmi->scramble_low_rates) ?
 		   HDMI_FC_INVIDCONF_HDCP_KEEPOUT_ACTIVE :
 		   HDMI_FC_INVIDCONF_HDCP_KEEPOUT_INACTIVE);
 
@@ -995,10 +1060,6 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi,
 	h_de_hs = mode->hsync_start - mode->hdisplay;
 	hsync_len = mode->hsync_end - mode->hsync_start;
 
-	/*
-	 * When we're setting a YCbCr420 mode, we need
-	 * to adjust the horizontal timing to suit.
-	 */
 	/*
 	 * When we're setting a YCbCr420 mode, we need
 	 * to adjust the horizontal timing to suit.
@@ -1031,10 +1092,12 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi,
 
 	/* Scrambling Control */
 	if (hdmi_info->scdc.supported) {
-		if (vmode->mpixelclock > 340000000 ||
-		    hdmi_info->scdc.scrambling.low_rates) {
-			bytes = rockchip_dw_hdmi_scdc_get_sink_version(hdmi);
-			rockchip_dw_hdmi_scdc_set_source_version(hdmi, bytes);
+		if (vmode->mtmdsclock > 340000000 ||
+		    (hdmi_info->scdc.scrambling.low_rates &&
+		     hdmi->scramble_low_rates)) {
+			drm_scdc_readb(&hdmi->adap, SCDC_SINK_VERSION, &bytes);
+			drm_scdc_writeb(&hdmi->adap, SCDC_SOURCE_VERSION,
+					bytes);
 			rockchip_dw_hdmi_scrambling_enable(hdmi, 1);
 		} else {
 			rockchip_dw_hdmi_scrambling_enable(hdmi, 0);
@@ -1229,6 +1292,9 @@ static void dw_hdmi_clear_overflow(struct dw_hdmi *hdmi)
 		count = 4;
 		break;
 	case 0x131a:
+	case 0x200a:
+	case 0x201a:
+	case 0x211a:
 		count = 1;
 		break;
 	default:
@@ -1301,11 +1367,8 @@ static void hdmi_video_packetize(struct dw_hdmi *hdmi)
 	}
 
 	/* set the packetizer registers */
-	val = ((color_depth << HDMI_VP_PR_CD_COLOR_DEPTH_OFFSET) &
-		HDMI_VP_PR_CD_COLOR_DEPTH_MASK) |
-		((hdmi_data->pix_repet_factor <<
-		HDMI_VP_PR_CD_DESIRED_PR_FACTOR_OFFSET) &
-		HDMI_VP_PR_CD_DESIRED_PR_FACTOR_MASK);
+	val = (color_depth << HDMI_VP_PR_CD_COLOR_DEPTH_OFFSET) &
+	      HDMI_VP_PR_CD_COLOR_DEPTH_MASK;
 	hdmi_writeb(hdmi, val, HDMI_VP_PR_CD);
 
 	hdmi_modb(hdmi, HDMI_VP_STUFF_PR_STUFFING_STUFFING_MODE,
@@ -1324,8 +1387,13 @@ static void hdmi_video_packetize(struct dw_hdmi *hdmi)
 		  HDMI_VP_CONF_PR_EN_MASK |
 		  HDMI_VP_CONF_BYPASS_SELECT_MASK, HDMI_VP_CONF);
 
-	hdmi_modb(hdmi, 1 << HDMI_VP_STUFF_IDEFAULT_PHASE_OFFSET,
-		  HDMI_VP_STUFF_IDEFAULT_PHASE_MASK, HDMI_VP_STUFF);
+	if ((color_depth == 5 && hdmi->previous_mode.htotal % 4) ||
+	    (color_depth == 6 && hdmi->previous_mode.htotal % 2))
+		hdmi_modb(hdmi, 0, HDMI_VP_STUFF_IDEFAULT_PHASE_MASK,
+			  HDMI_VP_STUFF);
+	else
+		hdmi_modb(hdmi, 1 << HDMI_VP_STUFF_IDEFAULT_PHASE_OFFSET,
+			  HDMI_VP_STUFF_IDEFAULT_PHASE_MASK, HDMI_VP_STUFF);
 
 	hdmi_writeb(hdmi, remap_size, HDMI_VP_REMAP);
 
@@ -1432,10 +1500,10 @@ static void hdmi_enable_overflow_interrupts(struct dw_hdmi *hdmi)
 	hdmi_writeb(hdmi, 0, HDMI_IH_MUTE_FC_STAT2);
 }
 
-static void dw_hdmi_disable(struct dw_hdmi *hdmi)
+static void dw_hdmi_disable(struct dw_hdmi *hdmi, struct display_state *state)
 {
 	if (hdmi->phy.enabled) {
-		hdmi->phy.ops->disable(hdmi, hdmi->phy.data);
+		hdmi->phy.ops->disable(hdmi, state);
 		hdmi->phy.enabled = false;
 	}
 }
@@ -1769,7 +1837,7 @@ void hdmi_set_clk_regenerator(struct dw_hdmi *hdmi, unsigned long pixel_clk,
 
 static void hdmi_clk_regenerator_update_pixel_clock(struct dw_hdmi *hdmi)
 {
-	hdmi_set_clk_regenerator(hdmi, hdmi->hdmi_data.video_mode.mpixelclock,
+	hdmi_set_clk_regenerator(hdmi, hdmi->hdmi_data.video_mode.mtmdsclock,
 				 hdmi->sample_rate);
 }
 
@@ -1781,18 +1849,158 @@ static void hdmi_enable_audio_clk(struct dw_hdmi *hdmi)
 void dw_hdmi_set_sample_rate(struct dw_hdmi *hdmi, unsigned int rate)
 {
 	hdmi->sample_rate = rate;
-	hdmi_set_clk_regenerator(hdmi, hdmi->hdmi_data.video_mode.mpixelclock,
+	hdmi_set_clk_regenerator(hdmi, hdmi->hdmi_data.video_mode.mtmdsclock,
 				 hdmi->sample_rate);
 }
 
+static int dw_hdmi_hdcp_load_key(struct dw_hdmi *hdmi)
+{
+	int i, j, ret, val;
+	struct hdcp_keys *hdcp_keys;
+
+	val = sizeof(*hdcp_keys);
+	hdcp_keys = malloc(val);
+	if (!hdcp_keys)
+		return -ENOMEM;
+
+	memset(hdcp_keys, 0, val);
+
+	ret = vendor_storage_read(HDMI_HDCP1X_ID, hdcp_keys, val);
+	if (ret < val) {
+		printf("HDCP: read size %d\n", ret);
+		free(hdcp_keys);
+		return -EINVAL;
+	}
+
+	if (hdcp_keys->KSV[0] == 0x00 &&
+	    hdcp_keys->KSV[1] == 0x00 &&
+	    hdcp_keys->KSV[2] == 0x00 &&
+	    hdcp_keys->KSV[3] == 0x00 &&
+	    hdcp_keys->KSV[4] == 0x00) {
+		printf("HDCP: Invalid hdcp key\n");
+		free(hdcp_keys);
+		return -EINVAL;
+	}
+
+	/* Disable decryption logic */
+	hdmi_writeb(hdmi, 0, HDMI_HDCPREG_RMCTL);
+	/* Poll untile DPK write is allowed */
+	do {
+		val = hdmi_readb(hdmi, HDMI_HDCPREG_RMSTS);
+	} while ((val & DPK_WR_OK_STS) == 0);
+
+	hdmi_writeb(hdmi, 0, HDMI_HDCPREG_DPK6);
+	hdmi_writeb(hdmi, 0, HDMI_HDCPREG_DPK5);
+
+	/* The useful data in ksv should be 5 byte */
+	for (i = 4; i >= 0; i--)
+		hdmi_writeb(hdmi, hdcp_keys->KSV[i], HDMI_HDCPREG_DPK0 + i);
+	/* Poll untile DPK write is allowed */
+	do {
+		val = hdmi_readb(hdmi, HDMI_HDCPREG_RMSTS);
+	} while ((val & DPK_WR_OK_STS) == 0);
+
+	/* Enable decryption logic */
+	hdmi_writeb(hdmi, 1, HDMI_HDCPREG_RMCTL);
+	hdmi_writeb(hdmi, hdcp_keys->seeds[0], HDMI_HDCPREG_SEED1);
+	hdmi_writeb(hdmi, hdcp_keys->seeds[1], HDMI_HDCPREG_SEED0);
+
+	/* Write encrypt device private key */
+	for (i = 0; i < DW_HDMI_HDCP_DPK_LEN - 6; i += 7) {
+		for (j = 6; j >= 0; j--)
+			hdmi_writeb(hdmi, hdcp_keys->devicekey[i + j],
+				    HDMI_HDCPREG_DPK0 + j);
+		do {
+			val = hdmi_readb(hdmi, HDMI_HDCPREG_RMSTS);
+		} while ((val & DPK_WR_OK_STS) == 0);
+	}
+
+	free(hdcp_keys);
+	return 0;
+}
+
+static void hdmi_tx_hdcp_config(struct dw_hdmi *hdmi,
+				const struct drm_display_mode *mode)
+{
+	u8 vsync_pol, hsync_pol, data_pol, hdmi_dvi;
+
+	if (!hdmi->hdcp1x_enable)
+		return;
+
+	/* Configure the video polarity */
+	vsync_pol = mode->flags & DRM_MODE_FLAG_PVSYNC ?
+		    HDMI_A_VIDPOLCFG_VSYNCPOL_ACTIVE_HIGH :
+		    HDMI_A_VIDPOLCFG_VSYNCPOL_ACTIVE_LOW;
+	hsync_pol = mode->flags & DRM_MODE_FLAG_PHSYNC ?
+		    HDMI_A_VIDPOLCFG_HSYNCPOL_ACTIVE_HIGH :
+		    HDMI_A_VIDPOLCFG_HSYNCPOL_ACTIVE_LOW;
+	data_pol = HDMI_A_VIDPOLCFG_DATAENPOL_ACTIVE_HIGH;
+	hdmi_modb(hdmi, vsync_pol | hsync_pol | data_pol,
+		  HDMI_A_VIDPOLCFG_VSYNCPOL_MASK |
+		  HDMI_A_VIDPOLCFG_HSYNCPOL_MASK |
+		  HDMI_A_VIDPOLCFG_DATAENPOL_MASK,
+		  HDMI_A_VIDPOLCFG);
+
+	/* Config the display mode */
+	hdmi_dvi = hdmi->sink_is_hdmi ? HDMI_A_HDCPCFG0_HDMIDVI_HDMI :
+		   HDMI_A_HDCPCFG0_HDMIDVI_DVI;
+	hdmi_modb(hdmi, hdmi_dvi, HDMI_A_HDCPCFG0_HDMIDVI_MASK,
+		  HDMI_A_HDCPCFG0);
+
+	if (!(hdmi_readb(hdmi, HDMI_HDCPREG_RMSTS) & 0x3f))
+		dw_hdmi_hdcp_load_key(hdmi);
+
+	hdmi_modb(hdmi, HDMI_FC_INVIDCONF_HDCP_KEEPOUT_ACTIVE,
+		  HDMI_FC_INVIDCONF_HDCP_KEEPOUT_MASK,
+		  HDMI_FC_INVIDCONF);
+
+	if (hdmi_readb(hdmi, HDMI_CONFIG1_ID) & HDMI_A_HDCP22_MASK) {
+		hdmi_modb(hdmi, HDMI_HDCP2_OVR_ENABLE |
+			  HDMI_HDCP2_FORCE_DISABLE,
+			  HDMI_HDCP2_OVR_EN_MASK |
+			  HDMI_HDCP2_FORCE_MASK,
+			  HDMI_HDCP2REG_CTRL);
+		hdmi_writeb(hdmi, 0xff, HDMI_HDCP2REG_MASK);
+		hdmi_writeb(hdmi, 0xff, HDMI_HDCP2REG_MUTE);
+	}
+
+	hdmi_writeb(hdmi, 0x40, HDMI_A_OESSWCFG);
+		    hdmi_modb(hdmi, HDMI_A_HDCPCFG0_BYPENCRYPTION_DISABLE |
+		    HDMI_A_HDCPCFG0_EN11FEATURE_DISABLE |
+		    HDMI_A_HDCPCFG0_SYNCRICHECK_ENABLE,
+		    HDMI_A_HDCPCFG0_BYPENCRYPTION_MASK |
+		    HDMI_A_HDCPCFG0_EN11FEATURE_MASK |
+		    HDMI_A_HDCPCFG0_SYNCRICHECK_MASK, HDMI_A_HDCPCFG0);
+
+	hdmi_modb(hdmi, HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_ENABLE |
+		  HDMI_A_HDCPCFG1_PH2UPSHFTENC_ENABLE,
+		  HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_MASK |
+		  HDMI_A_HDCPCFG1_PH2UPSHFTENC_MASK, HDMI_A_HDCPCFG1);
+
+	/* Reset HDCP Engine */
+	if (hdmi_readb(hdmi, HDMI_MC_CLKDIS) & HDMI_MC_CLKDIS_HDCPCLK_MASK) {
+		hdmi_modb(hdmi, HDMI_A_HDCPCFG1_SWRESET_ASSERT,
+			  HDMI_A_HDCPCFG1_SWRESET_MASK, HDMI_A_HDCPCFG1);
+	}
+
+	hdmi_writeb(hdmi, 0x00, HDMI_A_APIINTMSK);
+	hdmi_modb(hdmi, HDMI_A_HDCPCFG0_RXDETECT_ENABLE,
+		  HDMI_A_HDCPCFG0_RXDETECT_MASK, HDMI_A_HDCPCFG0);
+
+	hdmi_modb(hdmi, HDMI_MC_CLKDIS_HDCPCLK_ENABLE,
+		  HDMI_MC_CLKDIS_HDCPCLK_MASK, HDMI_MC_CLKDIS);
+
+	printf("%s success\n", __func__);
+}
+
 static int dw_hdmi_setup(struct dw_hdmi *hdmi,
-			 struct drm_display_mode *mode)
+			 struct drm_display_mode *mode,
+			 struct display_state *state)
 {
 	int ret;
 	void *data = hdmi->plat_data->phy_data;
 
 	hdmi_disable_overflow_interrupts(hdmi);
-
 	if (!hdmi->vic)
 		printf("Non-CEA mode used in HDMI\n");
 	else
@@ -1817,25 +2025,6 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi,
 		hdmi->hdmi_data.video_mode.mpixelrepetitioninput = 0;
 	}
 
-	/* TOFIX: Get input format from plat data or fallback to RGB888 */
-	if (hdmi->plat_data->get_input_bus_format)
-		hdmi->hdmi_data.enc_in_bus_format =
-			hdmi->plat_data->get_input_bus_format(data);
-	else if (hdmi->plat_data->input_bus_format)
-		hdmi->hdmi_data.enc_in_bus_format =
-			hdmi->plat_data->input_bus_format;
-	else
-		hdmi->hdmi_data.enc_in_bus_format =
-			MEDIA_BUS_FMT_RGB888_1X24;
-
-	/* TOFIX: Default to RGB888 output format */
-	if (hdmi->plat_data->get_output_bus_format)
-		hdmi->hdmi_data.enc_out_bus_format =
-			hdmi->plat_data->get_output_bus_format(data);
-	else
-		hdmi->hdmi_data.enc_out_bus_format =
-			MEDIA_BUS_FMT_RGB888_1X24;
-
 	/* TOFIX: Get input encoding from plat data or fallback to none */
 	if (hdmi->plat_data->get_enc_in_encoding)
 		hdmi->hdmi_data.enc_in_encoding =
@@ -1859,7 +2048,7 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi,
 	hdmi_av_composer(hdmi, mode);
 
 	/* HDMI Initialization Step B.2 */
-	ret = hdmi->phy.ops->init(hdmi, hdmi->phy.data, &hdmi->previous_mode);
+	ret = hdmi->phy.ops->init(hdmi, state);
 	if (ret)
 		return ret;
 	hdmi->phy.enabled = true;
@@ -1876,8 +2065,6 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi,
 
 	/* not for DVI mode */
 	if (hdmi->sink_is_hdmi) {
-		printf("%s HDMI mode\n", __func__);
-
 		/* HDMI Initialization Step F - Configure AVI InfoFrame */
 		hdmi_config_AVI(hdmi, mode);
 		hdmi_config_vendor_specific_infoframe(hdmi, mode);
@@ -1888,6 +2075,7 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi,
 	hdmi_video_packetize(hdmi);
 	hdmi_video_csc(hdmi);
 	hdmi_video_sample(hdmi);
+	hdmi_tx_hdcp_config(hdmi, mode);
 	dw_hdmi_clear_overflow(hdmi);
 	if (hdmi->cable_plugin && hdmi->sink_is_hdmi)
 		hdmi_enable_overflow_interrupts(hdmi);
@@ -1895,9 +2083,10 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi,
 	return 0;
 }
 
-int dw_hdmi_detect_hotplug(struct dw_hdmi *hdmi)
+int dw_hdmi_detect_hotplug(struct dw_hdmi *hdmi,
+			   struct display_state *state)
 {
-	return hdmi->phy.ops->read_hpd(hdmi, hdmi->phy.data);
+	return hdmi->phy.ops->read_hpd(hdmi, state);
 }
 
 static int dw_hdmi_set_reg_wr(struct dw_hdmi *hdmi)
@@ -1945,127 +2134,74 @@ static void dw_hdmi_dev_init(struct dw_hdmi *hdmi)
 	hdmi->version = (hdmi_readb(hdmi, HDMI_DESIGN_ID) << 8)
 		      | (hdmi_readb(hdmi, HDMI_REVISION_ID) << 0);
 
-	dw_hdmi_phy_power_off(hdmi);
 	initialize_hdmi_mutes(hdmi);
 }
 
-static int dw_hdmi_read_edid(struct dw_hdmi *hdmi,
-			     int block, unsigned char *buff)
+static void dw_hdmi_i2c_set_divs(struct dw_hdmi *hdmi)
 {
-	int i = 0, n = 0, index = 0, ret = -1, trytime = 2;
-	int offset = (block % 2) * 0x80;
-	int interrupt = 0;
+	unsigned long low_ns, high_ns;
+	unsigned long div_low, div_high;
 
-	rockchip_dw_hdmi_i2cm_reset(hdmi);
+	/* Standard-mode */
+	if (hdmi->i2c->scl_high_ns < 4000)
+		high_ns = 4708;
+	else
+		high_ns = hdmi->i2c->scl_high_ns;
 
-	/* Set DDC I2C CLK which divided from DDC_CLK to 100KHz. */
-	rockchip_dw_hdmi_i2cm_clk_init(hdmi);
+	if (hdmi->i2c->scl_low_ns < 4700)
+		low_ns = 4916;
+	else
+		low_ns = hdmi->i2c->scl_low_ns;
 
-	/* Enable I2C interrupt for reading edid */
-	rockchip_dw_hdmi_i2cm_mask_int(hdmi, 0);
+	div_low = (24000 * low_ns) / 1000000;
+	if ((24000 * low_ns) % 1000000)
+		div_low++;
 
-	hdmi_writeb(hdmi, DDC_I2C_EDID_ADDR, HDMI_I2CM_SLAVE);
-	hdmi_writeb(hdmi, DDC_I2C_SEG_ADDR, HDMI_I2CM_SEGADDR);
-	hdmi_writeb(hdmi, block / 2, HDMI_I2CM_SEGPTR);
+	div_high = (24000 * high_ns) / 1000000;
+	if ((24000 * high_ns) % 1000000)
+		div_high++;
 
-	while (trytime--) {
-		for (n = 0; n < HDMI_EDID_BLOCK_SIZE / 8; n++) {
-			hdmi_writeb(hdmi, offset + 8 * n, HDMI_I2CM_ADDRESS);
-			/*enable extend sequential read operation*/
-			if (block == 0)
-				hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_READ8,
-					    HDMI_I2CM_OPERATION);
-			else
-				hdmi_writeb(hdmi,
-					    HDMI_I2CM_OPERATION_READ8_EXT,
-					    HDMI_I2CM_OPERATION);
-
-			i = 20;
-			while (i--) {
-				mdelay(1);
-				interrupt = hdmi_readb(hdmi,
-						       HDMI_IH_I2CM_STAT0);
-				if (interrupt) {
-					hdmi_writeb(hdmi,
-						    interrupt,
-						    HDMI_IH_I2CM_STAT0);
-				}
-
-				if (interrupt &
-				    (m_SCDC_READREQ |
-				     m_I2CM_DONE |
-				     m_I2CM_ERROR))
-					break;
-				mdelay(4);
-			}
+	/* Maximum divider supported by hw is 0xffff */
+	if (div_low > 0xffff)
+		div_low = 0xffff;
 
-			if (interrupt & m_I2CM_DONE) {
-				for (index = 0; index < 8; index++)
-					buff[8 * n + index] =
-					hdmi_readb(hdmi, HDMI_I2CM_READ_BUFF0
-						   + index);
-
-				if (n == HDMI_EDID_BLOCK_SIZE / 8 - 1) {
-					ret = 0;
-					printf("[%s] edid read success\n",
-					       __func__);
-					goto exit;
-				}
-				continue;
-			} else if ((interrupt & m_I2CM_ERROR) || (i == -1)) {
-				printf("[%s] edid read error\n", __func__);
-				rockchip_dw_hdmi_i2cm_reset(hdmi);
-				break;
-			}
-		}
+	if (div_high > 0xffff)
+		div_high = 0xffff;
 
-		printf("[%s] edid try times %d\n", __func__, trytime);
-		mdelay(100);
-	}
-
-exit:
-	/* Disable I2C interrupt */
-	rockchip_dw_hdmi_i2cm_mask_int(hdmi, 1);
-	return ret;
+	hdmi_writeb(hdmi, div_high & 0xff, HDMI_I2CM_SS_SCL_HCNT_0_ADDR);
+	hdmi_writeb(hdmi, (div_high >> 8) & 0xff,
+		    HDMI_I2CM_SS_SCL_HCNT_1_ADDR);
+	hdmi_writeb(hdmi, div_low & 0xff, HDMI_I2CM_SS_SCL_LCNT_0_ADDR);
+	hdmi_writeb(hdmi, (div_low >> 8) & 0xff,
+		    HDMI_I2CM_SS_SCL_LCNT_1_ADDR);
 }
 
-static int drm_do_get_edid(struct dw_hdmi *hdmi, u8 *edid)
+static void dw_hdmi_i2c_init(struct dw_hdmi *hdmi)
 {
-	int i, j, block_num, ret;
-
-	/* base block fetch */
-	for (i = 0; i < 3; i++) {
-		ret = dw_hdmi_read_edid(hdmi, 0, edid);
-		if (!ret)
-			break;
-	}
+	/* Software reset */
+	hdmi_writeb(hdmi, 0x00, HDMI_I2CM_SOFTRSTZ);
 
-	if (ret) {
-		printf("get base block failed\n");
-		goto err;
-	}
+	/* Set Standard Mode speed */
+	hdmi_modb(hdmi, HDMI_I2CM_DIV_STD_MODE,
+		  HDMI_I2CM_DIV_FAST_STD_MODE, HDMI_I2CM_DIV);
 
-	/* get the number of extensions */
-	block_num = edid[0x7e];
+	/* Set done, not acknowledged and arbitration interrupt polarities */
+	hdmi_writeb(hdmi, HDMI_I2CM_INT_DONE_POL, HDMI_I2CM_INT);
+	hdmi_writeb(hdmi, HDMI_I2CM_CTLINT_NAC_POL | HDMI_I2CM_CTLINT_ARB_POL,
+		    HDMI_I2CM_CTLINT);
 
-	for (j = 1; j <= block_num; j++) {
-		for (i = 0; i < 3; i++) {
-			ret = dw_hdmi_read_edid(hdmi, j, &edid[0x80 * j]);
-			if (!ret)
-				break;
-		}
-	}
+	/* Clear DONE and ERROR interrupts */
+	hdmi_writeb(hdmi, HDMI_IH_I2CM_STAT0_ERROR | HDMI_IH_I2CM_STAT0_DONE,
+		    HDMI_IH_I2CM_STAT0);
 
-	if (ret) {
-		printf("get extensions failed\n");
-		goto err;
-	}
+	/* Mute DONE and ERROR interrupts */
+	hdmi_writeb(hdmi, HDMI_IH_I2CM_STAT0_ERROR | HDMI_IH_I2CM_STAT0_DONE,
+		    HDMI_IH_MUTE_I2CM_STAT0);
 
-	return 0;
+	/* set SDA high level holding time */
+	hdmi_writeb(hdmi, 0x48, HDMI_I2CM_SDA_HOLD);
 
-err:
-	memset(edid, 0, HDMI_EDID_BLOCK_SIZE);
-	return -EFAULT;
+	dw_hdmi_i2c_set_divs(hdmi);
 }
 
 void dw_hdmi_audio_enable(struct dw_hdmi *hdmi)
@@ -2096,14 +2232,23 @@ int rockchip_dw_hdmi_init(struct display_state *state)
 		return -ENOMEM;
 
 	memset(hdmi, 0, sizeof(struct dw_hdmi));
-
 	mode_buf = malloc(MODE_LEN * sizeof(struct drm_display_mode));
 	if (!mode_buf)
 		return -ENOMEM;
+
 	memset(mode_buf, 0, MODE_LEN * sizeof(struct drm_display_mode));
 
 	hdmi->regs = dev_read_addr_ptr(conn_state->dev);
 	hdmi->io_width = ofnode_read_s32_default(hdmi_node, "reg-io-width", -1);
+
+	if (ofnode_read_bool(hdmi_node, "scramble-low-rates"))
+		hdmi->scramble_low_rates = true;
+
+	if (ofnode_read_bool(hdmi_node, "hdcp1x-enable"))
+		hdmi->hdcp1x_enable = true;
+	else
+		hdmi->hdcp1x_enable = false;
+
 	hdmi->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 	if (hdmi->grf <= 0) {
 		printf("%s: Get syscon grf failed (ret=%p)\n",
@@ -2113,14 +2258,38 @@ int rockchip_dw_hdmi_init(struct display_state *state)
 
 	dw_hdmi_set_reg_wr(hdmi);
 
-	if (crtc_state->crtc_id)
-		val = ((1 << pdata->vop_sel_bit) |
-		       (1 << (16 + pdata->vop_sel_bit)));
-	else
-		val = ((0 << pdata->vop_sel_bit) |
-		       (1 << (16 + pdata->vop_sel_bit)));
-	writel(val, hdmi->grf + pdata->grf_vop_sel_reg);
+	if (pdata->grf_vop_sel_reg) {
+		if (crtc_state->crtc_id)
+			val = ((1 << pdata->vop_sel_bit) |
+			       (1 << (16 + pdata->vop_sel_bit)));
+		else
+			val = ((0 << pdata->vop_sel_bit) |
+			       (1 << (16 + pdata->vop_sel_bit)));
+		writel(val, hdmi->grf + pdata->grf_vop_sel_reg);
+	}
+
+	hdmi->i2c = malloc(sizeof(struct dw_hdmi_i2c));
+	if (!hdmi->i2c)
+		return -ENOMEM;
+	hdmi->adap.ddc_xfer = dw_hdmi_i2c_xfer;
 
+	/*
+	 * Read high and low time from device tree. If not available use
+	 * the default timing scl clock rate is about 99.6KHz.
+	 */
+	hdmi->i2c->scl_high_ns =
+		ofnode_read_s32_default(hdmi_node,
+					"ddc-i2c-scl-high-time-ns", -1);
+	if (hdmi->i2c->scl_high_ns < 0)
+		hdmi->i2c->scl_high_ns = 4708;
+
+	hdmi->i2c->scl_low_ns =
+		ofnode_read_s32_default(hdmi_node,
+					"ddc-i2c-scl-low-time-ns", -1);
+	if (hdmi->i2c->scl_low_ns < 0)
+		hdmi->i2c->scl_low_ns = 4916;
+
+	dw_hdmi_i2c_init(hdmi);
 	conn_state->type = DRM_MODE_CONNECTOR_HDMIA;
 	conn_state->output_mode = ROCKCHIP_OUT_MODE_AAAA;
 
@@ -2130,6 +2299,7 @@ int rockchip_dw_hdmi_init(struct display_state *state)
 	hdmi->sample_rate = 48000;
 
 	conn_state->private = hdmi;
+	dw_hdmi_set_iomux(hdmi->grf, hdmi->dev_type);
 	dw_hdmi_detect_phy(hdmi);
 	dw_hdmi_dev_init(hdmi);
 
@@ -2141,6 +2311,8 @@ void rockchip_dw_hdmi_deinit(struct display_state *state)
 	struct connector_state *conn_state = &state->conn_state;
 	struct dw_hdmi *hdmi = conn_state->private;
 
+	if (hdmi->i2c)
+		free(hdmi->i2c);
 	if (hdmi->edid_data.mode_buf)
 		free(hdmi->edid_data.mode_buf);
 	if (hdmi)
@@ -2161,7 +2333,10 @@ int rockchip_dw_hdmi_enable(struct display_state *state)
 	if (!hdmi)
 		return -EFAULT;
 
-	dw_hdmi_setup(hdmi, mode);
+	/* Store the display mode for plugin/DKMS poweron events */
+	memcpy(&hdmi->previous_mode, mode, sizeof(hdmi->previous_mode));
+
+	dw_hdmi_setup(hdmi, mode, state);
 
 	return 0;
 }
@@ -2171,49 +2346,79 @@ int rockchip_dw_hdmi_disable(struct display_state *state)
 	struct connector_state *conn_state = &state->conn_state;
 	struct dw_hdmi *hdmi = conn_state->private;
 
-	dw_hdmi_disable(hdmi);
+	dw_hdmi_disable(hdmi, state);
 	return 0;
 }
 
 int rockchip_dw_hdmi_get_timing(struct display_state *state)
 {
-	int ret;
+	int ret, i;
 	struct connector_state *conn_state = &state->conn_state;
 	struct drm_display_mode *mode = &conn_state->mode;
 	struct dw_hdmi *hdmi = conn_state->private;
+	struct edid *edid = (struct edid *)conn_state->edid;
+	unsigned int bus_format;
+	struct overscan *overscan = &conn_state->overscan;
+	const u8 def_modes_vic[6] = {4, 16, 2, 17, 31, 19};
 
 	if (!hdmi)
 		return -EFAULT;
-	ret = drm_do_get_edid(hdmi, conn_state->edid);
+
+	ret = drm_do_get_edid(&hdmi->adap, conn_state->edid);
 	if (!ret) {
+		hdmi->sink_is_hdmi =
+			drm_detect_hdmi_monitor(edid);
+		hdmi->sink_has_audio = drm_detect_monitor_audio(edid);
 		ret = drm_add_edid_modes(&hdmi->edid_data, conn_state->edid);
+	}
+	if (ret <= 0) {
+		hdmi->sink_is_hdmi = true;
+		hdmi->sink_has_audio = true;
+		do_cea_modes(&hdmi->edid_data, def_modes_vic,
+			     sizeof(def_modes_vic));
+		hdmi->edid_data.preferred_mode = &hdmi->edid_data.mode_buf[0];
+		printf("failed to get edid\n");
+	}
+	drm_rk_filter_whitelist(&hdmi->edid_data);
+	if (hdmi->phy.ops->mode_valid)
+		hdmi->phy.ops->mode_valid(hdmi, state);
+	if (!drm_mode_prune_invalid(&hdmi->edid_data)) {
+		printf("can't find valid hdmi mode\n");
+		return -EINVAL;
+	}
 
-		if (ret > 0) {
-			hdmi->sink_is_hdmi =
-				drm_detect_hdmi_monitor(conn_state->edid);
-			hdmi->sink_has_audio = false;
-			*mode = *hdmi->edid_data.preferred_mode;
-			hdmi->vic = drm_match_cea_mode(mode);
+	for (i = 0; i < hdmi->edid_data.modes; i++)
+		hdmi->edid_data.mode_buf[i].vrefresh =
+			drm_mode_vrefresh(&hdmi->edid_data.mode_buf[i]);
 
-			return 0;
-		}
-	}
+	drm_mode_sort(&hdmi->edid_data);
+	drm_rk_selete_output(&hdmi->edid_data, &bus_format,
+			     overscan, hdmi->dev_type);
 
-	/* if can't get edid timing, use default resolution. */
-	printf("can't get edid timing\n");
-	hdmi->vic = HDMI_VIDEO_DEFAULT_MODE;
-	hdmi->sink_is_hdmi = true;
-	hdmi->sink_has_audio = false;
-	mode->hdisplay = 1280;
-	mode->hsync_start = 1390;
-	mode->hsync_end = 1430;
-	mode->htotal = 1650;
-	mode->vdisplay = 720;
-	mode->vsync_start = 725;
-	mode->vsync_end = 730;
-	mode->vtotal = 750;
-	mode->clock = 74250;
-	mode->flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC;
+	*mode = *hdmi->edid_data.preferred_mode;
+	hdmi->vic = drm_match_cea_mode(mode);
+
+	printf("mode:%dx%d\n", mode->hdisplay, mode->vdisplay);
+	conn_state->bus_format = bus_format;
+	hdmi->hdmi_data.enc_in_bus_format = bus_format;
+	hdmi->hdmi_data.enc_out_bus_format = bus_format;
+
+	switch (bus_format) {
+	case MEDIA_BUS_FMT_UYVY10_1X20:
+		conn_state->bus_format = MEDIA_BUS_FMT_YUV10_1X30;
+		hdmi->hdmi_data.enc_in_bus_format =
+			MEDIA_BUS_FMT_YUV10_1X30;
+		break;
+	case MEDIA_BUS_FMT_UYVY8_1X16:
+		conn_state->bus_format = MEDIA_BUS_FMT_YUV8_1X24;
+		hdmi->hdmi_data.enc_in_bus_format =
+			MEDIA_BUS_FMT_YUV8_1X24;
+		break;
+	case MEDIA_BUS_FMT_UYYVYY8_0_5X24:
+	case MEDIA_BUS_FMT_UYYVYY10_0_5X30:
+		conn_state->output_mode = ROCKCHIP_OUT_MODE_YUV420;
+		break;
+	}
 
 	return 0;
 }
@@ -2227,7 +2432,7 @@ int rockchip_dw_hdmi_detect(struct display_state *state)
 	if (!hdmi)
 		return -EFAULT;
 
-	ret = dw_hdmi_detect_hotplug(hdmi);
+	ret = dw_hdmi_detect_hotplug(hdmi, state);
 
 	return ret;
 }
@@ -2238,8 +2443,77 @@ int rockchip_dw_hdmi_get_edid(struct display_state *state)
 	struct connector_state *conn_state = &state->conn_state;
 	struct dw_hdmi *hdmi = conn_state->private;
 
-	ret = drm_do_get_edid(hdmi, conn_state->edid);
+	ret = drm_do_get_edid(&hdmi->adap, conn_state->edid);
 
 	return ret;
 }
 
+int inno_dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data)
+{
+	struct display_state *state = (struct display_state *)data;
+	struct connector_state *conn_state = &state->conn_state;
+	u32 color_depth, bus_width;
+
+	color_depth =
+		hdmi_bus_fmt_color_depth(hdmi->hdmi_data.enc_out_bus_format);
+
+	if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format))
+		bus_width = color_depth / 2;
+	else if (!hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format))
+		bus_width = color_depth;
+	else
+		bus_width = 8;
+	rockchip_phy_set_bus_width(state, bus_width);
+	rockchip_phy_set_pll(state, conn_state->mode.crtc_clock * 1000);
+	if (hdmi->edid_data.display_info.hdmi.scdc.supported)
+		rockchip_dw_hdmi_scdc_set_tmds_rate(hdmi);
+	rockchip_phy_power_on(state);
+
+	return 0;
+}
+
+void inno_dw_hdmi_phy_disable(struct dw_hdmi *hdmi, void *data)
+{
+}
+
+enum drm_connector_status
+inno_dw_hdmi_phy_read_hpd(struct dw_hdmi *hdmi, void *data)
+{
+	enum drm_connector_status status;
+	struct display_state *state = (struct display_state *)data;
+
+	status = dw_hdmi_phy_read_hpd(hdmi, state);
+
+	if (hdmi->dev_type == RK3328_HDMI) {
+		if (status == connector_status_connected)
+			inno_dw_hdmi_set_domain(hdmi->grf, 1);
+		else
+			inno_dw_hdmi_set_domain(hdmi->grf, 0);
+	}
+
+	return status;
+}
+
+void inno_dw_hdmi_mode_valid(struct dw_hdmi *hdmi, void *data)
+{
+	struct display_state *state = (struct display_state *)data;
+	struct hdmi_edid_data *edid_data = &hdmi->edid_data;
+	unsigned long rate;
+	int i, ret;
+	struct drm_display_mode *mode_buf = edid_data->mode_buf;
+
+	for (i = 0; i < edid_data->modes; i++) {
+		if (edid_data->mode_buf[i].invalid)
+			continue;
+		if (edid_data->mode_buf[i].flags & DRM_MODE_FLAG_DBLCLK)
+			rate = mode_buf[i].clock * 1000 * 2;
+		else
+			rate = mode_buf[i].clock * 1000;
+
+		/* Check whether mode is out of phy cfg range. */
+		ret = rockchip_phy_round_rate(state, rate);
+
+		if (ret < 0)
+			edid_data->mode_buf[i].invalid = true;
+	}
+}
diff --git a/drivers/video/drm/dw_hdmi.h b/drivers/video/drm/dw_hdmi.h
index 5f9c48befa..f3df9f6054 100644
--- a/drivers/video/drm/dw_hdmi.h
+++ b/drivers/video/drm/dw_hdmi.h
@@ -487,6 +487,22 @@
 #define HDMI_A_PRESETUP                         0x501A
 #define HDMI_A_SRM_BASE                         0x5020
 
+/* HDCP Registers */
+#define HDMI_HDCPREG_RMCTL                      0x780e
+#define HDMI_HDCPREG_RMSTS                      0x780f
+#define HDMI_HDCPREG_SEED0                      0x7810
+#define HDMI_HDCPREG_SEED1                      0x7811
+#define HDMI_HDCPREG_DPK0                       0x7812
+#define HDMI_HDCPREG_DPK1                       0x7813
+#define HDMI_HDCPREG_DPK2                       0x7814
+#define HDMI_HDCPREG_DPK3                       0x7815
+#define HDMI_HDCPREG_DPK4                       0x7816
+#define HDMI_HDCPREG_DPK5                       0x7817
+#define HDMI_HDCPREG_DPK6                       0x7818
+#define HDMI_HDCP2REG_CTRL                      0x7904
+#define HDMI_HDCP2REG_MASK                      0x790c
+#define HDMI_HDCP2REG_MUTE                      0x790e
+
 /* CEC Engine Registers */
 #define HDMI_CEC_CTRL                           0x7D00
 #define HDMI_CEC_STAT                           0x7D01
@@ -1203,6 +1219,55 @@ enum {
 	HDMI_MC_SWRSTZ_I2S_RESET_MSK = BIT(3),
 };
 
+enum {
+	HDMI_MC_CLKDIS_HDCPCLK_MASK = 0x40,
+	HDMI_MC_CLKDIS_HDCPCLK_ENABLE = 0x00,
+
+	HDMI_A_SRMCTRL_SHA1_FAIL_MASK = 0X08,
+	HDMI_A_SRMCTRL_SHA1_FAIL_DISABLE = 0X00,
+	HDMI_A_SRMCTRL_SHA1_FAIL_ENABLE = 0X08,
+
+	HDMI_A_SRMCTRL_KSV_UPDATE_MASK = 0X04,
+	HDMI_A_SRMCTRL_KSV_UPDATE_DISABLE = 0X00,
+	HDMI_A_SRMCTRL_KSV_UPDATE_ENABLE = 0X04,
+
+	HDMI_A_SRMCTRL_KSV_MEM_REQ_MASK = 0X01,
+	HDMI_A_SRMCTRL_KSV_MEM_REQ_DISABLE = 0X00,
+	HDMI_A_SRMCTRL_KSV_MEM_REQ_ENABLE = 0X01,
+
+	HDMI_A_SRMCTRL_KSV_MEM_ACCESS_MASK = 0X02,
+	HDMI_A_SRMCTRL_KSV_MEM_ACCESS_DISABLE = 0X00,
+	HDMI_A_SRMCTRL_KSV_MEM_ACCESS_ENABLE = 0X02,
+
+	HDMI_A_SRM_BASE_MAX_DEVS_EXCEEDED = 0x80,
+	HDMI_A_SRM_BASE_DEVICE_COUNT = 0x7f,
+
+	HDMI_A_SRM_BASE_MAX_CASCADE_EXCEEDED = 0x08,
+
+	HDMI_A_APIINTSTAT_KSVSHA1_CALC_INT = 0x02,
+
+	/* HDCPREG_RMSTS field values */
+	DPK_WR_OK_STS = 0x40,
+
+	HDMI_A_HDCP22_MASK = 0x40,
+
+	HDMI_HDCP2_OVR_EN_MASK = 0x02,
+	HDMI_HDCP2_OVR_ENABLE = 0x02,
+	HDMI_HDCP2_OVR_DISABLE = 0x00,
+
+	HDMI_HDCP2_FORCE_MASK = 0x04,
+	HDMI_HDCP2_FORCE_ENABLE = 0x04,
+	HDMI_HDCP2_FORCE_DISABLE = 0x00,
+};
+
+enum {
+	DW_HDMI_HDCP_KSV_LEN = 8,
+	DW_HDMI_HDCP_SHA_LEN = 20,
+	DW_HDMI_HDCP_DPK_LEN = 280,
+	DW_HDMI_HDCP_KEY_LEN = 308,
+	DW_HDMI_HDCP_SEED_LEN = 2,
+};
+
 /*
  * HDMI 3D TX PHY registers
  */
@@ -1339,4 +1404,14 @@ enum {
 	FAST_MODE
 };
 
+void drm_mode_sort(struct hdmi_edid_data *edid_data);
+int drm_mode_prune_invalid(struct hdmi_edid_data *edid_data);
+void drm_rk_filter_whitelist(struct hdmi_edid_data *edid_data);
+void drm_rk_selete_output(struct hdmi_edid_data *edid_data,
+			  unsigned int *bus_format,
+			  struct overscan *overscan,
+			  enum dw_hdmi_devtype dev_type);
+void inno_dw_hdmi_set_domain(void *grf, int status);
+void dw_hdmi_set_iomux(void *grf, int dev_type);
+
 #endif /* _ROCKCHIP_HDMI_H_ */
diff --git a/drivers/video/drm/rockchip-inno-hdmi-phy.c b/drivers/video/drm/rockchip-inno-hdmi-phy.c
new file mode 100644
index 0000000000..99d1c922ab
--- /dev/null
+++ b/drivers/video/drm/rockchip-inno-hdmi-phy.c
@@ -0,0 +1,1087 @@
+/*
+ * SPDX-License-Identifier:     GPL-2.0+
+ * (C) Copyright 2008-2016 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <config.h>
+#include <common.h>
+#include <errno.h>
+#include <malloc.h>
+#include <misc.h>
+#include <fdtdec.h>
+#include <fdt_support.h>
+#include <asm/unaligned.h>
+#include <dm/device.h>
+#include <dm/read.h>
+#include <asm/io.h>
+#include <linux/list.h>
+#include <div64.h>
+#include <linux/media-bus-format.h>
+
+#include "rockchip_display.h"
+#include "rockchip_crtc.h"
+#include "rockchip_connector.h"
+#include "rockchip_phy.h"
+
+#define INNO_HDMI_PHY_TIMEOUT_LOOP_COUNT	1000
+/*#define UPDATE(x, h, l)	(((x) << (l)) & GENMASK((h), (l)))*/
+
+/* REG: 0x00 */
+#define PRE_PLL_REFCLK_SEL_MASK			BIT(0)
+#define PRE_PLL_REFCLK_SEL_PCLK			BIT(0)
+#define PRE_PLL_REFCLK_SEL_OSCCLK		0
+/* REG: 0x01 */
+#define BYPASS_RXSENSE_EN_MASK			BIT(2)
+#define BYPASS_RXSENSE_EN			BIT(2)
+#define BYPASS_PWRON_EN_MASK			BIT(1)
+#define BYPASS_PWRON_EN				BIT(1)
+#define BYPASS_PLLPD_EN_MASK			BIT(0)
+#define BYPASS_PLLPD_EN				BIT(0)
+/* REG: 0x02 */
+#define BYPASS_PDATA_EN_MASK			BIT(4)
+#define BYPASS_PDATA_EN				BIT(4)
+#define PDATAEN_MASK				BIT(0)
+#define PDATAEN_DISABLE				BIT(0)
+#define PDATAEN_ENABLE				0
+/* REG: 0x03 */
+#define BYPASS_AUTO_TERM_RES_CAL		BIT(7)
+#define AUDO_TERM_RES_CAL_SPEED_14_8(x)		UPDATE(x, 6, 0)
+/* REG: 0x04 */
+#define AUDO_TERM_RES_CAL_SPEED_7_0(x)		UPDATE(x, 7, 0)
+/* REG: 0xaa */
+#define POST_PLL_CTRL_MASK			BIT(0)
+#define POST_PLL_CTRL_MANUAL			BIT(0)
+/* REG: 0xe0 */
+#define POST_PLL_POWER_MASK			BIT(5)
+#define POST_PLL_POWER_DOWN			BIT(5)
+#define POST_PLL_POWER_UP			0
+#define PRE_PLL_POWER_MASK			BIT(4)
+#define PRE_PLL_POWER_DOWN			BIT(4)
+#define PRE_PLL_POWER_UP			0
+#define RXSENSE_CLK_CH_MASK			BIT(3)
+#define RXSENSE_CLK_CH_ENABLE			BIT(3)
+#define RXSENSE_DATA_CH2_MASK			BIT(2)
+#define RXSENSE_DATA_CH2_ENABLE			BIT(2)
+#define RXSENSE_DATA_CH1_MASK			BIT(1)
+#define RXSENSE_DATA_CH1_ENABLE			BIT(1)
+#define RXSENSE_DATA_CH0_MASK			BIT(0)
+#define RXSENSE_DATA_CH0_ENABLE			BIT(0)
+/* REG: 0xe1 */
+#define BANDGAP_MASK				BIT(4)
+#define BANDGAP_ENABLE				BIT(4)
+#define BANDGAP_DISABLE				0
+#define TMDS_DRIVER_MASK			GENMASK(3, 0)
+#define TMDS_DRIVER_ENABLE			UPDATE(0xf, 3, 0)
+#define TMDS_DRIVER_DISABLE			0
+/* REG: 0xe2 */
+#define PRE_PLL_FB_DIV_8_MASK			BIT(7)
+#define PRE_PLL_FB_DIV_8_SHIFT			7
+#define PRE_PLL_FB_DIV_8(x)			UPDATE(x, 7, 7)
+#define PCLK_VCO_DIV_5_MASK			BIT(5)
+#define PCLK_VCO_DIV_5_SHIFT			5
+#define PCLK_VCO_DIV_5(x)			UPDATE(x, 5, 5)
+#define PRE_PLL_PRE_DIV_MASK			GENMASK(4, 0)
+#define PRE_PLL_PRE_DIV(x)			UPDATE(x, 4, 0)
+/* REG: 0xe3 */
+#define PRE_PLL_FB_DIV_7_0(x)			UPDATE(x, 7, 0)
+/* REG: 0xe4 */
+#define PRE_PLL_PCLK_DIV_B_MASK			GENMASK(6, 5)
+#define PRE_PLL_PCLK_DIV_B_SHIFT		5
+#define PRE_PLL_PCLK_DIV_B(x)			UPDATE(x, 6, 5)
+#define PRE_PLL_PCLK_DIV_A_MASK			GENMASK(4, 0)
+#define PRE_PLL_PCLK_DIV_A_SHIFT		0
+#define PRE_PLL_PCLK_DIV_A(x)			UPDATE(x, 4, 0)
+/* REG: 0xe5 */
+#define PRE_PLL_PCLK_DIV_C_MASK			GENMASK(6, 5)
+#define PRE_PLL_PCLK_DIV_C_SHIFT		5
+#define PRE_PLL_PCLK_DIV_C(x)			UPDATE(x, 6, 5)
+#define PRE_PLL_PCLK_DIV_D_MASK			GENMASK(4, 0)
+#define PRE_PLL_PCLK_DIV_D_SHIFT		0
+#define PRE_PLL_PCLK_DIV_D(x)			UPDATE(x, 4, 0)
+/* REG: 0xe6 */
+#define PRE_PLL_TMDSCLK_DIV_C_MASK		GENMASK(5, 4)
+#define PRE_PLL_TMDSCLK_DIV_C(x)		UPDATE(x, 5, 4)
+#define PRE_PLL_TMDSCLK_DIV_A_MASK		GENMASK(3, 2)
+#define PRE_PLL_TMDSCLK_DIV_A(x)		UPDATE(x, 3, 2)
+#define PRE_PLL_TMDSCLK_DIV_B_MASK		GENMASK(1, 0)
+#define PRE_PLL_TMDSCLK_DIV_B(x)		UPDATE(x, 1, 0)
+/* REG: 0xe8 */
+#define PRE_PLL_LOCK_STATUS			BIT(0)
+/* REG: 0xe9 */
+#define POST_PLL_POST_DIV_EN_MASK		GENMASK(7, 6)
+#define POST_PLL_POST_DIV_ENABLE		UPDATE(3, 7, 6)
+#define POST_PLL_POST_DIV_DISABLE		0
+#define POST_PLL_PRE_DIV_MASK			GENMASK(4, 0)
+#define POST_PLL_PRE_DIV(x)			UPDATE(x, 4, 0)
+/* REG: 0xea */
+#define POST_PLL_FB_DIV_7_0(x)			UPDATE(x, 7, 0)
+/* REG: 0xeb */
+#define POST_PLL_FB_DIV_8_MASK			BIT(7)
+#define POST_PLL_FB_DIV_8(x)			UPDATE(x, 7, 7)
+#define POST_PLL_POST_DIV_MASK			GENMASK(5, 4)
+#define POST_PLL_POST_DIV(x)			UPDATE(x, 5, 4)
+#define POST_PLL_LOCK_STATUS			BIT(0)
+/* REG: 0xee */
+#define TMDS_CH_TA_MASK				GENMASK(7, 4)
+#define TMDS_CH_TA_ENABLE			UPDATE(0xf, 7, 4)
+#define TMDS_CH_TA_DISABLE			0
+/* REG: 0xef */
+#define TMDS_CLK_CH_TA(x)			UPDATE(x, 7, 6)
+#define TMDS_DATA_CH2_TA(x)			UPDATE(x, 5, 4)
+#define TMDS_DATA_CH1_TA(x)			UPDATE(x, 3, 2)
+#define TMDS_DATA_CH0_TA(x)			UPDATE(x, 1, 0)
+/* REG: 0xf0 */
+#define TMDS_DATA_CH2_PRE_EMPHASIS_MASK		GENMASK(5, 4)
+#define TMDS_DATA_CH2_PRE_EMPHASIS(x)		UPDATE(x, 5, 4)
+#define TMDS_DATA_CH1_PRE_EMPHASIS_MASK		GENMASK(3, 2)
+#define TMDS_DATA_CH1_PRE_EMPHASIS(x)		UPDATE(x, 3, 2)
+#define TMDS_DATA_CH0_PRE_EMPHASIS_MASK		GENMASK(1, 0)
+#define TMDS_DATA_CH0_PRE_EMPHASIS(x)		UPDATE(x, 1, 0)
+/* REG: 0xf1 */
+#define TMDS_CLK_CH_OUTPUT_SWING(x)		UPDATE(x, 7, 4)
+#define TMDS_DATA_CH2_OUTPUT_SWING(x)		UPDATE(x, 3, 0)
+/* REG: 0xf2 */
+#define TMDS_DATA_CH1_OUTPUT_SWING(x)		UPDATE(x, 7, 4)
+#define TMDS_DATA_CH0_OUTPUT_SWING(x)		UPDATE(x, 3, 0)
+
+enum inno_hdmi_phy_type {
+	INNO_HDMI_PHY_RK3228,
+	INNO_HDMI_PHY_RK3328
+};
+
+struct inno_hdmi_phy_drv_data;
+
+struct phy_config {
+	unsigned long	tmdsclock;
+	u8		regs[14];
+};
+
+struct inno_hdmi_phy {
+	const void *blob;
+	ofnode node;
+	void *regs;
+
+	/* platform data */
+	const struct inno_hdmi_phy_drv_data *plat_data;
+	unsigned long pixclock;
+	u32 bus_width;
+	struct phy_config *phy_cfg;
+};
+
+struct pre_pll_config {
+	unsigned long pixclock;
+	unsigned long tmdsclock;
+	u8 prediv;
+	u16 fbdiv;
+	u8 tmds_div_a;
+	u8 tmds_div_b;
+	u8 tmds_div_c;
+	u8 pclk_div_a;
+	u8 pclk_div_b;
+	u8 pclk_div_c;
+	u8 pclk_div_d;
+	u8 vco_div_5_en;
+	u32 fracdiv;
+};
+
+struct post_pll_config {
+	unsigned long tmdsclock;
+	u8 prediv;
+	u16 fbdiv;
+	u8 postdiv;
+	u8 version;
+};
+
+struct inno_hdmi_phy_ops {
+	void (*init)(struct inno_hdmi_phy *inno);
+	int (*power_on)(struct inno_hdmi_phy *inno,
+			const struct post_pll_config *cfg,
+			const struct phy_config *phy_cfg);
+	void (*power_off)(struct inno_hdmi_phy *inno);
+	int (*pre_pll_update)(struct inno_hdmi_phy *inno,
+			      const struct pre_pll_config *cfg);
+	unsigned long (*recalc_rate)(struct inno_hdmi_phy *inno,
+				     unsigned long parent_rate);
+};
+
+struct inno_hdmi_phy_drv_data {
+	enum inno_hdmi_phy_type		dev_type;
+	const struct inno_hdmi_phy_ops	*ops;
+	const struct phy_config		*phy_cfg_table;
+};
+
+struct rockchip_inno_data {
+	char compatible[30];
+	const void *data;
+};
+
+static const struct pre_pll_config pre_pll_cfg_table[] = {
+	{ 27000000,  27000000, 1,  90, 3, 2, 2, 10, 3, 3, 4, 0, 0},
+	{ 27000000,  33750000, 1,  90, 1, 3, 3, 10, 3, 3, 4, 0, 0},
+	{ 40000000,  40000000, 1,  80, 2, 2, 2, 12, 2, 2, 2, 0, 0},
+	{ 59341000,  59341000, 1,  98, 3, 1, 2,  1, 3, 3, 4, 0, 0xE6AE6B},
+	{ 59400000,  59400000, 1,  99, 3, 1, 1,  1, 3, 3, 4, 0, 0},
+	{ 59341000,  74176250, 1,  98, 0, 3, 3,  1, 3, 3, 4, 0, 0xE6AE6B},
+	{ 59400000,  74250000, 1,  99, 1, 2, 2,  1, 3, 3, 4, 0, 0},
+	{ 74176000,  74176000, 1,  98, 1, 2, 2,  1, 2, 3, 4, 0, 0xE6AE6B},
+	{ 74250000,  74250000, 1,  99, 1, 2, 2,  1, 2, 3, 4, 0, 0},
+	{ 74176000,  92720000, 4, 494, 1, 2, 2,  1, 3, 3, 4, 0, 0x816817},
+	{ 74250000,  92812500, 4, 495, 1, 2, 2,  1, 3, 3, 4, 0, 0},
+	{148352000, 148352000, 1,  98, 1, 1, 1,  1, 2, 2, 2, 0, 0xE6AE6B},
+	{148500000, 148500000, 1,  99, 1, 1, 1,  1, 2, 2, 2, 0, 0},
+	{148352000, 185440000, 4, 494, 0, 2, 2,  1, 3, 2, 2, 0, 0x816817},
+	{148500000, 185625000, 4, 495, 0, 2, 2,  1, 3, 2, 2, 0, 0},
+	{296703000, 296703000, 1,  98, 0, 1, 1,  1, 0, 2, 2, 0, 0xE6AE6B},
+	{297000000, 297000000, 1,  99, 0, 1, 1,  1, 0, 2, 2, 0, 0},
+	{296703000, 370878750, 4, 494, 1, 2, 0,  1, 3, 1, 1, 0, 0x816817},
+	{297000000, 371250000, 4, 495, 1, 2, 0,  1, 3, 1, 1, 0, 0},
+	{593407000, 296703500, 1,  98, 0, 1, 1,  1, 0, 2, 1, 0, 0xE6AE6B},
+	{594000000, 297000000, 1,  99, 0, 1, 1,  1, 0, 2, 1, 0, 0},
+	{593407000, 370879375, 4, 494, 1, 2, 0,  1, 3, 1, 1, 1, 0x816817},
+	{594000000, 371250000, 4, 495, 1, 2, 0,  1, 3, 1, 1, 1, 0},
+	{593407000, 593407000, 1,  98, 0, 2, 0,  1, 0, 1, 1, 0, 0xE6AE6B},
+	{594000000, 594000000, 1,  99, 0, 2, 0,  1, 0, 1, 1, 0, 0},
+	{     ~0UL,	    0, 0,   0, 0, 0, 0,  0, 0, 0, 0, 0, 0}
+};
+
+static const struct post_pll_config post_pll_cfg_table[] = {
+	{33750000,  1, 40, 8, 1},
+	{33750000,  1, 80, 8, 2},
+	{33750000,  1, 10, 2, 4},
+	{74250000,  1, 40, 8, 1},
+	{74250000, 18, 80, 8, 2},
+	{148500000, 2, 40, 4, 3},
+	{297000000, 4, 40, 2, 3},
+	{594000000, 8, 40, 1, 3},
+	{     ~0UL, 0,  0, 0, 0}
+};
+
+static const struct phy_config rk3228_phy_cfg[] = {
+	{	165000000, {
+			0xaa, 0x00, 0x44, 0x44, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00,
+		},
+	}, {
+		340000000, {
+			0xaa, 0x15, 0x6a, 0xaa, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00,
+		},
+	}, {
+		594000000, {
+			0xaa, 0x15, 0x7a, 0xaa, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00,
+		},
+	}, {
+		~0UL, {
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00,
+		},
+	}
+};
+
+static const struct phy_config rk3328_phy_cfg[] = {
+	{	165000000, {
+			0x07, 0x08, 0x08, 0x08, 0x00, 0x00, 0x08, 0x08, 0x08,
+			0x00, 0xac, 0xcc, 0xcc, 0xcc,
+		},
+	}, {
+		340000000, {
+			0x0b, 0x0d, 0x0d, 0x0d, 0x07, 0x15, 0x08, 0x08, 0x08,
+			0x3f, 0xac, 0xcc, 0xcd, 0xdd,
+		},
+	}, {
+		594000000, {
+			0x10, 0x1a, 0x1a, 0x1a, 0x07, 0x15, 0x08, 0x08, 0x08,
+			0x00, 0xac, 0xcc, 0xcc, 0xcc,
+		},
+	}, {
+		~0UL, {
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00,
+		},
+	}
+};
+
+static inline void inno_write(struct inno_hdmi_phy *inno, u32 reg, u8 val)
+{
+	writel(val, inno->regs + (reg * 4));
+}
+
+static inline u8 inno_read(struct inno_hdmi_phy *inno, u32 reg)
+{
+	u32 val;
+
+	val = readl(inno->regs + (reg * 4));
+
+	return val;
+}
+
+static inline void inno_update_bits(struct inno_hdmi_phy *inno, u8 reg,
+				    u8 mask, u8 val)
+{
+	u32 tmp, orig;
+
+	orig = inno_read(inno, reg);
+	tmp = orig & ~mask;
+	tmp |= val & mask;
+	inno_write(inno, reg, tmp);
+}
+
+static u32 inno_hdmi_phy_get_tmdsclk(struct inno_hdmi_phy *inno,
+				     unsigned long rate)
+{
+	u32 tmdsclk;
+
+	switch (inno->bus_width) {
+	case 4:
+		tmdsclk = (u32)rate / 2;
+		break;
+	case 5:
+		tmdsclk = (u32)rate * 5 / 8;
+		break;
+	case 6:
+		tmdsclk = (u32)rate * 3 / 4;
+		break;
+	case 10:
+		tmdsclk = (u32)rate * 5 / 4;
+		break;
+	case 12:
+		tmdsclk = (u32)rate * 3 / 2;
+		break;
+	case 16:
+		tmdsclk = (u32)rate * 2;
+		break;
+	default:
+		tmdsclk = rate;
+	}
+
+	return tmdsclk;
+}
+
+static u8 rk_get_cpu_version(void)
+{
+	u8 val = 0;
+#ifdef CONFIG_ROCKCHIP_EFUSE
+	struct udevice *dev;
+	u32 regs[2] = {0};
+	u8 fuses[1];
+	ofnode node;
+	int ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_MISC,
+					  DM_GET_DRIVER(rockchip_efuse), &dev);
+	if (ret) {
+		printf("%s: no misc-device found\n", __func__);
+		return -EINVAL;
+	}
+
+	node = dev_read_subnode(dev, "cpu-version");
+	if (!ofnode_valid(node))
+		return -EINVAL;
+
+	ret = ofnode_read_u32_array(node, "reg", regs, 2);
+	if (ret) {
+		printf("Cannot get efuse reg\n");
+		return -EINVAL;
+	}
+
+	ret = misc_read(dev, regs[0], &fuses, regs[1]);
+	if (ret) {
+		printf("%s: misc_read failed\n", __func__);
+		return 0;
+	}
+
+	val = fuses[0];
+	val = (val >> 3) & 0x1;
+#endif
+	return val;
+}
+
+static int inno_hdmi_phy_power_on(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct inno_hdmi_phy *inno = conn_state->phy_private;
+	const struct post_pll_config *cfg = post_pll_cfg_table;
+	const struct phy_config *phy_cfg = inno->plat_data->phy_cfg_table;
+	u32 tmdsclock = inno_hdmi_phy_get_tmdsclk(inno, inno->pixclock);
+	u32 chipversion = 1;
+
+	printf("start Inno HDMI PHY Power On\n");
+
+	if (inno->phy_cfg)
+		phy_cfg = inno->phy_cfg;
+
+	if (!tmdsclock) {
+		printf("TMDS clock is zero!\n");
+		return -EINVAL;
+	}
+
+	if (inno->plat_data->dev_type == INNO_HDMI_PHY_RK3328 &&
+	    rk_get_cpu_version())
+		chipversion = 2;
+	else if (inno->plat_data->dev_type == INNO_HDMI_PHY_RK3228 &&
+		 tmdsclock <= 33750000)
+		chipversion = 4;
+
+	printf("tmdsclock = %d; chipversion = %d\n", tmdsclock, chipversion);
+
+	for (; cfg->tmdsclock != ~0UL; cfg++)
+		if (tmdsclock <= cfg->tmdsclock &&
+		    cfg->version & chipversion)
+			break;
+
+	for (; phy_cfg->tmdsclock != ~0UL; phy_cfg++)
+		if (tmdsclock <= phy_cfg->tmdsclock)
+			break;
+
+	if (cfg->tmdsclock == ~0UL || phy_cfg->tmdsclock == ~0UL)
+		return -EINVAL;
+
+	printf("Inno HDMI PHY Power On\n");
+	if (inno->plat_data->ops->power_on)
+		return inno->plat_data->ops->power_on(inno, cfg, phy_cfg);
+	else
+		return -EINVAL;
+}
+
+static int inno_hdmi_phy_power_off(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct inno_hdmi_phy *inno = conn_state->phy_private;
+
+	if (inno->plat_data->ops->power_off)
+		inno->plat_data->ops->power_off(inno);
+	printf("Inno HDMI PHY Power Off\n");
+
+	return 0;
+}
+
+static int inno_hdmi_phy_clk_is_prepared(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct inno_hdmi_phy *inno = conn_state->phy_private;
+	u8 status;
+
+	if (inno->plat_data->dev_type == INNO_HDMI_PHY_RK3228)
+		status = inno_read(inno, 0xe0) & PRE_PLL_POWER_MASK;
+	else
+		status = inno_read(inno, 0xa0) & 1;
+
+	return status ? 0 : 1;
+}
+
+static int inno_hdmi_phy_clk_prepare(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct inno_hdmi_phy *inno = conn_state->phy_private;
+
+	if (inno->plat_data->dev_type == INNO_HDMI_PHY_RK3228)
+		inno_update_bits(inno, 0xe0, PRE_PLL_POWER_MASK,
+				 PRE_PLL_POWER_UP);
+	else
+		inno_update_bits(inno, 0xa0, 1, 0);
+
+	return 0;
+}
+
+static int inno_hdmi_phy_clk_set_rate(struct display_state *state,
+				      unsigned long rate)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct inno_hdmi_phy *inno = conn_state->phy_private;
+	const struct pre_pll_config *cfg = pre_pll_cfg_table;
+	u32 tmdsclock = inno_hdmi_phy_get_tmdsclk(inno, rate);
+
+	for (; cfg->pixclock != ~0UL; cfg++)
+		if (cfg->pixclock == rate && cfg->tmdsclock == tmdsclock)
+			break;
+
+	if (cfg->pixclock == ~0UL) {
+		printf("unsupported rate %lu\n", rate);
+		return -EINVAL;
+	}
+
+	if (inno->plat_data->ops->pre_pll_update)
+		inno->plat_data->ops->pre_pll_update(inno, cfg);
+
+	inno->pixclock = rate;
+
+	return 0;
+}
+
+static void inno_hdmi_phy_rk3228_init(struct inno_hdmi_phy *inno)
+{
+	u32 m, v;
+
+	/*
+	 * Use phy internal register control
+	 * rxsense/poweron/pllpd/pdataen signal.
+	 */
+	m = BYPASS_RXSENSE_EN_MASK | BYPASS_PWRON_EN_MASK |
+	    BYPASS_PLLPD_EN_MASK;
+	v = BYPASS_RXSENSE_EN | BYPASS_PWRON_EN | BYPASS_PLLPD_EN;
+	inno_update_bits(inno, 0x01, m, v);
+	inno_update_bits(inno, 0x02, BYPASS_PDATA_EN_MASK, BYPASS_PDATA_EN);
+
+	/* manual power down post-PLL */
+	inno_update_bits(inno, 0xaa, POST_PLL_CTRL_MASK, POST_PLL_CTRL_MANUAL);
+}
+
+static int
+inno_hdmi_phy_rk3228_power_on(struct inno_hdmi_phy *inno,
+			      const struct post_pll_config *cfg,
+			      const struct phy_config *phy_cfg)
+{
+	int pll_tries;
+	u32 m, v;
+
+	/* pdata_en disable */
+	inno_update_bits(inno, 0x02, PDATAEN_MASK, PDATAEN_DISABLE);
+
+	/* Power down Post-PLL */
+	inno_update_bits(inno, 0xe0, PRE_PLL_POWER_MASK, PRE_PLL_POWER_DOWN);
+	inno_update_bits(inno, 0xe0, POST_PLL_POWER_MASK, POST_PLL_POWER_DOWN);
+
+	/* Post-PLL update */
+	m = POST_PLL_PRE_DIV_MASK;
+	v = POST_PLL_PRE_DIV(cfg->prediv);
+	inno_update_bits(inno, 0xe9, m, v);
+
+	m = POST_PLL_FB_DIV_8_MASK;
+	v = POST_PLL_FB_DIV_8(cfg->fbdiv >> 8);
+	inno_update_bits(inno, 0xeb, m, v);
+	inno_write(inno, 0xea, POST_PLL_FB_DIV_7_0(cfg->fbdiv));
+
+	if (cfg->postdiv == 1) {
+		/* Disable Post-PLL post divider */
+		m = POST_PLL_POST_DIV_EN_MASK;
+		v = POST_PLL_POST_DIV_DISABLE;
+		inno_update_bits(inno, 0xe9, m, v);
+	} else {
+		/* Enable Post-PLL post divider */
+		m = POST_PLL_POST_DIV_EN_MASK;
+		v = POST_PLL_POST_DIV_ENABLE;
+		inno_update_bits(inno, 0xe9, m, v);
+
+		m = POST_PLL_POST_DIV_MASK;
+		v = POST_PLL_POST_DIV(cfg->postdiv / 2 - 1);
+		inno_update_bits(inno, 0xeb, m, v);
+	}
+
+	for (v = 0; v < 4; v++)
+		inno_write(inno, 0xef + v, phy_cfg->regs[v]);
+
+	/* Power up Post-PLL */
+	inno_update_bits(inno, 0xe0, POST_PLL_POWER_MASK, POST_PLL_POWER_UP);
+	inno_update_bits(inno, 0xe0, PRE_PLL_POWER_MASK, PRE_PLL_POWER_UP);
+
+	/* BandGap enable */
+	inno_update_bits(inno, 0xe1, BANDGAP_MASK, BANDGAP_ENABLE);
+
+	/* TMDS driver enable */
+	inno_update_bits(inno, 0xe1, TMDS_DRIVER_MASK, TMDS_DRIVER_ENABLE);
+
+	/* Wait for post PLL lock */
+	pll_tries = 0;
+	while (!(inno_read(inno, 0xeb) & POST_PLL_LOCK_STATUS)) {
+		if (pll_tries == INNO_HDMI_PHY_TIMEOUT_LOOP_COUNT) {
+			printf("Post-PLL unlock\n");
+			return -ETIMEDOUT;
+		}
+
+		pll_tries++;
+		udelay(100);
+	}
+
+	if (cfg->tmdsclock > 340000000)
+		mdelay(100);
+
+	/* pdata_en enable */
+	inno_update_bits(inno, 0x02, PDATAEN_MASK, PDATAEN_ENABLE);
+	return 0;
+}
+
+static void inno_hdmi_phy_rk3228_power_off(struct inno_hdmi_phy *inno)
+{
+	/* TMDS driver Disable */
+	inno_update_bits(inno, 0xe1, TMDS_DRIVER_MASK, TMDS_DRIVER_DISABLE);
+
+	/* BandGap Disable */
+	inno_update_bits(inno, 0xe1, BANDGAP_MASK, BANDGAP_DISABLE);
+
+	/* Post-PLL power down */
+	inno_update_bits(inno, 0xe0, POST_PLL_POWER_MASK, POST_PLL_POWER_DOWN);
+}
+
+static int
+inno_hdmi_phy_rk3228_pre_pll_update(struct inno_hdmi_phy *inno,
+				    const struct pre_pll_config *cfg)
+{
+	int pll_tries;
+	u32 m, v;
+
+	/* Power down PRE-PLL */
+	inno_update_bits(inno, 0xe0, PRE_PLL_POWER_MASK, PRE_PLL_POWER_DOWN);
+
+	m = PRE_PLL_FB_DIV_8_MASK | PCLK_VCO_DIV_5_MASK | PRE_PLL_PRE_DIV_MASK;
+	v = PRE_PLL_FB_DIV_8(cfg->fbdiv >> 8) |
+	    PCLK_VCO_DIV_5(cfg->vco_div_5_en) | PRE_PLL_PRE_DIV(cfg->prediv);
+	inno_update_bits(inno, 0xe2, m, v);
+
+	inno_write(inno, 0xe3, PRE_PLL_FB_DIV_7_0(cfg->fbdiv));
+
+	m = PRE_PLL_PCLK_DIV_B_MASK | PRE_PLL_PCLK_DIV_A_MASK;
+	v = PRE_PLL_PCLK_DIV_B(cfg->pclk_div_b) |
+	    PRE_PLL_PCLK_DIV_A(cfg->pclk_div_a);
+	inno_update_bits(inno, 0xe4, m, v);
+
+	m = PRE_PLL_PCLK_DIV_C_MASK | PRE_PLL_PCLK_DIV_D_MASK;
+	v = PRE_PLL_PCLK_DIV_C(cfg->pclk_div_c) |
+	    PRE_PLL_PCLK_DIV_D(cfg->pclk_div_d);
+	inno_update_bits(inno, 0xe5, m, v);
+
+	m = PRE_PLL_TMDSCLK_DIV_C_MASK | PRE_PLL_TMDSCLK_DIV_A_MASK |
+	    PRE_PLL_TMDSCLK_DIV_B_MASK;
+	v = PRE_PLL_TMDSCLK_DIV_C(cfg->tmds_div_c) |
+	    PRE_PLL_TMDSCLK_DIV_A(cfg->tmds_div_a) |
+	    PRE_PLL_TMDSCLK_DIV_B(cfg->tmds_div_b);
+	inno_update_bits(inno, 0xe6, m, v);
+
+	/* Power up PRE-PLL */
+	inno_update_bits(inno, 0xe0, PRE_PLL_POWER_MASK, PRE_PLL_POWER_UP);
+
+	/* Wait for Pre-PLL lock */
+	pll_tries = 0;
+	while (!(inno_read(inno, 0xe8) & PRE_PLL_LOCK_STATUS)) {
+		if (pll_tries == INNO_HDMI_PHY_TIMEOUT_LOOP_COUNT) {
+			printf("Pre-PLL unlock\n");
+			return -ETIMEDOUT;
+		}
+
+		pll_tries++;
+		udelay(100);
+	}
+
+	return 0;
+}
+
+static void inno_hdmi_phy_rk3328_init(struct inno_hdmi_phy *inno)
+{
+	/*
+	 * Use phy internal register control
+	 * rxsense/poweron/pllpd/pdataen signal.
+	 */
+	inno_write(inno, 0x01, 0x07);
+	inno_write(inno, 0x02, 0x91);
+}
+
+static int
+inno_hdmi_phy_rk3328_power_on(struct inno_hdmi_phy *inno,
+			      const struct post_pll_config *cfg,
+			      const struct phy_config *phy_cfg)
+{
+	u32 val;
+
+	/* set pdata_en to 0 */
+	inno_update_bits(inno, 0x02, 1, 0);
+	/* Power off post PLL */
+	inno_update_bits(inno, 0xaa, 1, 1);
+
+	val = cfg->fbdiv & 0xff;
+	inno_write(inno, 0xac, val);
+	if (cfg->postdiv == 1) {
+		inno_write(inno, 0xaa, 2);
+		val = (cfg->fbdiv >> 8) | cfg->prediv;
+		inno_write(inno, 0xab, val);
+	} else {
+		val = (cfg->postdiv / 2) - 1;
+		inno_write(inno, 0xad, val);
+		val = (cfg->fbdiv >> 8) | cfg->prediv;
+		inno_write(inno, 0xab, val);
+		inno_write(inno, 0xaa, 0x0e);
+	}
+
+	for (val = 0; val < 14; val++)
+		inno_write(inno, 0xb5 + val, phy_cfg->regs[val]);
+
+	/* bit[7:6] of reg c8/c9/ca/c8 is ESD detect threshold:
+	 * 00 - 340mV
+	 * 01 - 280mV
+	 * 10 - 260mV
+	 * 11 - 240mV
+	 * default is 240mV, now we set it to 340mV
+	 */
+	inno_write(inno, 0xc8, 0);
+	inno_write(inno, 0xc9, 0);
+	inno_write(inno, 0xca, 0);
+	inno_write(inno, 0xcb, 0);
+
+	if (phy_cfg->tmdsclock > 340000000) {
+		/* Set termination resistor to 100ohm */
+		val = 75000000 / 100000;
+		inno_write(inno, 0xc5, ((val >> 8) & 0xff) | 0x80);
+		inno_write(inno, 0xc6, val & 0xff);
+		inno_write(inno, 0xc7, 3 << 1);
+		inno_write(inno, 0xc5, ((val >> 8) & 0xff));
+	} else if (phy_cfg->tmdsclock > 165000000) {
+		inno_write(inno, 0xc5, 0x81);
+		/* clk termination resistor is 50ohm
+		 * data termination resistor is 150ohm
+		 */
+		inno_write(inno, 0xc8, 0x30);
+		inno_write(inno, 0xc9, 0x10);
+		inno_write(inno, 0xca, 0x10);
+		inno_write(inno, 0xcb, 0x10);
+	} else {
+		inno_write(inno, 0xc5, 0x81);
+	}
+
+	/* set TMDS sync detection counter length */
+	val = 47520000000UL / phy_cfg->tmdsclock;
+	inno_write(inno, 0xd8, (val >> 8) & 0xff);
+	inno_write(inno, 0xd9, val & 0xff);
+
+	/* Power up post PLL */
+	inno_update_bits(inno, 0xaa, 1, 0);
+	/* Power up tmds driver */
+	inno_update_bits(inno, 0xb0, 4, 4);
+	inno_write(inno, 0xb2, 0x0f);
+
+	/* Wait for post PLL lock */
+	for (val = 0; val < 5; val++) {
+		if (inno_read(inno, 0xaf) & 1)
+			break;
+		udelay(1000);
+	}
+	if (!(inno_read(inno, 0xaf) & 1)) {
+		printf("HDMI PHY Post PLL unlock\n");
+		return -ETIMEDOUT;
+	}
+	if (phy_cfg->tmdsclock > 340000000)
+		mdelay(100);
+	/* set pdata_en to 1 */
+	inno_update_bits(inno, 0x02, 1, 1);
+
+	return 0;
+}
+
+static void inno_hdmi_phy_rk3328_power_off(struct inno_hdmi_phy *inno)
+{
+	/* Power off driver */
+	inno_write(inno, 0xb2, 0);
+	/* Power off band gap */
+	inno_update_bits(inno, 0xb0, 4, 0);
+	/* Power off post pll */
+	inno_update_bits(inno, 0xaa, 1, 1);
+}
+
+static int
+inno_hdmi_phy_rk3328_pre_pll_update(struct inno_hdmi_phy *inno,
+				    const struct pre_pll_config *cfg)
+{
+	u32 val;
+
+	/* Power off PLL */
+	inno_update_bits(inno, 0xa0, 1, 1);
+	/* Configure pre-pll */
+	inno_update_bits(inno, 0xa0, 2, (cfg->vco_div_5_en & 1) << 1);
+	inno_write(inno, 0xa1, cfg->prediv);
+	if (cfg->fracdiv)
+		val = ((cfg->fbdiv >> 8) & 0x0f) | 0xc0;
+	else
+		val = ((cfg->fbdiv >> 8) & 0x0f) | 0xf0;
+	inno_write(inno, 0xa2, val);
+	inno_write(inno, 0xa3, cfg->fbdiv & 0xff);
+	val = (cfg->pclk_div_a & 0x1f) |
+	      ((cfg->pclk_div_b & 3) << 5);
+	inno_write(inno, 0xa5, val);
+	val = (cfg->pclk_div_d & 0x1f) |
+	      ((cfg->pclk_div_c & 3) << 5);
+	inno_write(inno, 0xa6, val);
+	val = ((cfg->tmds_div_a & 3) << 4) |
+	      ((cfg->tmds_div_b & 3) << 2) |
+	      (cfg->tmds_div_c & 3);
+	inno_write(inno, 0xa4, val);
+
+	if (cfg->fracdiv) {
+		val = cfg->fracdiv & 0xff;
+		inno_write(inno, 0xd3, val);
+		val = (cfg->fracdiv >> 8) & 0xff;
+		inno_write(inno, 0xd2, val);
+		val = (cfg->fracdiv >> 16) & 0xff;
+		inno_write(inno, 0xd1, val);
+	} else {
+		inno_write(inno, 0xd3, 0);
+		inno_write(inno, 0xd2, 0);
+		inno_write(inno, 0xd1, 0);
+	}
+
+	/* Power up PLL */
+	inno_update_bits(inno, 0xa0, 1, 0);
+
+	/* Wait for PLL lock */
+	for (val = 0; val < 5; val++) {
+		if (inno_read(inno, 0xa9) & 1)
+			break;
+		udelay(1000);
+	}
+	if (val == 5) {
+		printf("Pre-PLL unlock\n");
+		return -ETIMEDOUT;
+	}
+
+	return 0;
+}
+
+static unsigned long
+inno_hdmi_3328_phy_pll_recalc_rate(struct inno_hdmi_phy *inno,
+				   unsigned long parent_rate)
+{
+	unsigned long rate, vco, frac;
+	u8 nd, no_a, no_b, no_d;
+	__maybe_unused u8 no_c;
+	u16 nf;
+
+	nd = inno_read(inno, 0xa1) & 0x3f;
+	nf = ((inno_read(inno, 0xa2) & 0x0f) << 8) | inno_read(inno, 0xa3);
+	vco = parent_rate * nf;
+	if ((inno_read(inno, 0xa2) & 0x30) == 0) {
+		frac = inno_read(inno, 0xd3) |
+		       (inno_read(inno, 0xd2) << 8) |
+		       (inno_read(inno, 0xd1) << 16);
+		vco += DIV_ROUND_CLOSEST(parent_rate * frac, (1 << 24));
+	}
+	if (inno_read(inno, 0xa0) & 2) {
+		rate = vco / (nd * 5);
+	} else {
+		no_a = inno_read(inno, 0xa5) & 0x1f;
+		no_b = ((inno_read(inno, 0xa5) >> 5) & 7) + 2;
+		no_c = (1 << ((inno_read(inno, 0xa6) >> 5) & 7));
+		no_d = inno_read(inno, 0xa6) & 0x1f;
+		if (no_a == 1)
+			rate = vco / (nd * no_b * no_d * 2);
+		else
+			rate = vco / (nd * no_a * no_d * 2);
+	}
+	inno->pixclock = rate;
+
+	return rate;
+}
+
+#define PHY_TAB_LEN 60
+
+static
+int inno_hdmi_update_phy_table(struct inno_hdmi_phy *inno, u32 *config,
+			       struct phy_config *phy_cfg,
+			       int phy_table_size)
+{
+	int i, j;
+
+	for (i = 0; i < phy_table_size; i++) {
+		phy_cfg[i].tmdsclock =
+			(unsigned long)config[i * 15];
+
+		debug("%ld ", phy_cfg[i].tmdsclock);
+		for (j = 0; j < 14; j++) {
+			phy_cfg[i].regs[j] = (u8)config[i * 15 + 1 + j];
+			debug("0x%02x ", phy_cfg[i].regs[j]);
+		}
+		debug("\n");
+	}
+
+	/*
+	 * The last set of phy cfg is used to indicate whether
+	 * there is no more phy cfg data.
+	 */
+	phy_cfg[i].tmdsclock = ~0UL;
+	for (j = 0; j < 14; j++)
+		phy_cfg[i].regs[j] = 0;
+
+	return 0;
+}
+
+static const struct inno_hdmi_phy_ops rk3228_hdmi_phy_ops = {
+	.init = inno_hdmi_phy_rk3228_init,
+	.power_on = inno_hdmi_phy_rk3228_power_on,
+	.power_off = inno_hdmi_phy_rk3228_power_off,
+	.pre_pll_update = inno_hdmi_phy_rk3228_pre_pll_update,
+};
+
+static const struct inno_hdmi_phy_ops rk3328_hdmi_phy_ops = {
+	.init = inno_hdmi_phy_rk3328_init,
+	.power_on = inno_hdmi_phy_rk3328_power_on,
+	.power_off = inno_hdmi_phy_rk3328_power_off,
+	.pre_pll_update = inno_hdmi_phy_rk3328_pre_pll_update,
+	.recalc_rate = inno_hdmi_3328_phy_pll_recalc_rate,
+};
+
+static const struct inno_hdmi_phy_drv_data rk3228_hdmi_phy_drv_data = {
+	.dev_type = INNO_HDMI_PHY_RK3228,
+	.ops = &rk3228_hdmi_phy_ops,
+	.phy_cfg_table = rk3228_phy_cfg,
+};
+
+static const struct inno_hdmi_phy_drv_data rk3328_hdmi_phy_drv_data = {
+	.dev_type = INNO_HDMI_PHY_RK3328,
+	.ops = &rk3328_hdmi_phy_ops,
+	.phy_cfg_table = rk3328_phy_cfg,
+};
+
+static const struct rockchip_inno_data inno_hdmi_phy_of_match[] = {
+	{ .compatible = "rockchip,rk3228-hdmi-phy",
+	  .data = &rk3228_hdmi_phy_drv_data
+	},
+	{ .compatible = "rockchip,rk3328-hdmi-phy",
+	  .data = &rk3328_hdmi_phy_drv_data
+	},
+	{}
+};
+
+static int inno_hdmi_phy_init(struct display_state *state)
+{
+	const void *blob = state->blob;
+	struct connector_state *conn_state = &state->conn_state;
+	struct udevice *dev = conn_state->phy_dev;
+	ofnode phy_node = conn_state->phy_node;
+	struct inno_hdmi_phy *inno;
+	int i, val, phy_table_size, ret;
+	const char *name;
+	u32 *phy_config;
+
+	inno = malloc(sizeof(*inno));
+	if (!inno)
+		return -ENOMEM;
+
+	inno->blob = blob;
+	inno->node = phy_node;
+
+	inno->regs = dev_read_addr_ptr(dev);
+	if (!inno->regs) {
+		printf("%s: failed to get phy address\n", __func__);
+		return -ENOMEM;
+	}
+	conn_state->phy_private = inno;
+
+	name = dev_read_string(dev, "compatible");
+	for (i = 0; i < ARRAY_SIZE(inno_hdmi_phy_of_match); i++) {
+		if (!strcmp(name, inno_hdmi_phy_of_match[i].compatible)) {
+			inno->plat_data = inno_hdmi_phy_of_match[i].data;
+			break;
+		}
+	}
+
+	dev_read_prop(dev, "rockchip,phy-table", &val);
+
+	if (val >= 0) {
+		if (val % PHY_TAB_LEN || !val) {
+			printf("Invalid phy cfg table format!\n");
+			return -EINVAL;
+		}
+
+		phy_config = malloc(val);
+		if (!phy_config) {
+			printf("kmalloc phy table failed\n");
+			return -ENOMEM;
+		}
+
+		phy_table_size = val / PHY_TAB_LEN;
+		/* Effective phy cfg data and the end of phy cfg table */
+		inno->phy_cfg = malloc(val + PHY_TAB_LEN);
+		if (!inno->phy_cfg) {
+			free(phy_config);
+			return -ENOMEM;
+		}
+
+		dev_read_u32_array(dev, "rockchip,phy-table",
+				   phy_config, val / sizeof(u32));
+		ret = inno_hdmi_update_phy_table(inno, phy_config,
+						 inno->phy_cfg,
+						 phy_table_size);
+		if (ret) {
+			free(phy_config);
+			return ret;
+		}
+		free(phy_config);
+	} else {
+		printf("use default hdmi phy table\n");
+	}
+
+	if (i >= ARRAY_SIZE(inno_hdmi_phy_of_match))
+		return 0;
+
+	if (!inno->plat_data || !inno->plat_data->ops)
+		return -EINVAL;
+
+	if (inno->plat_data->ops->init)
+		inno->plat_data->ops->init(inno);
+
+	return 0;
+}
+
+static unsigned long inno_hdmi_phy_set_pll(struct display_state *state,
+					   unsigned long rate)
+{
+	inno_hdmi_phy_clk_prepare(state);
+	inno_hdmi_phy_clk_is_prepared(state);
+	inno_hdmi_phy_clk_set_rate(state, rate);
+	return 0;
+}
+
+static void
+inno_hdmi_phy_set_bus_width(struct display_state *state, u32 bus_width)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct inno_hdmi_phy *inno = conn_state->phy_private;
+
+	inno->bus_width = bus_width;
+}
+
+static long
+inno_hdmi_phy_clk_round_rate(struct display_state *state, unsigned long rate)
+{
+	int i;
+	const struct pre_pll_config *cfg = pre_pll_cfg_table;
+	struct connector_state *conn_state = &state->conn_state;
+	struct inno_hdmi_phy *inno = conn_state->phy_private;
+	u32 tmdsclock = inno_hdmi_phy_get_tmdsclk(inno, rate);
+
+	for (; cfg->pixclock != ~0UL; cfg++)
+		if (cfg->pixclock == rate)
+			break;
+
+	/*
+	 * XXX: Limit pixel clock under 600MHz
+	 * rk3228 does not support non-zero fracdiv
+	 */
+	if ((inno->plat_data->dev_type == INNO_HDMI_PHY_RK3228 &&
+	     cfg->fracdiv) || cfg->pixclock > 600000000)
+		return -EINVAL;
+
+	/*
+	 * If there is no dts phy cfg table, use default phy cfg table.
+	 * The tmds clock maximum is 594MHz. So there is no need to check
+	 * whether tmds clock is out of range.
+	 */
+	if (!inno->phy_cfg)
+		return cfg->pixclock;
+
+	/* Check if tmds clock is out of dts phy config's range. */
+	for (i = 0; inno->phy_cfg[i].tmdsclock != ~0UL; i++) {
+		if (inno->phy_cfg[i].tmdsclock >= tmdsclock)
+			break;
+	}
+
+	if (inno->phy_cfg[i].tmdsclock == ~0UL)
+		return -EINVAL;
+
+	return cfg->pixclock;
+}
+
+const struct rockchip_phy_funcs inno_hdmi_phy_funcs = {
+	.init = inno_hdmi_phy_init,
+	.power_on = inno_hdmi_phy_power_on,
+	.power_off = inno_hdmi_phy_power_off,
+	.set_pll = inno_hdmi_phy_set_pll,
+	.set_bus_width = inno_hdmi_phy_set_bus_width,
+	.round_rate = inno_hdmi_phy_clk_round_rate,
+};
diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index fdf1131605..46ce448812 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -11,6 +11,7 @@
 #include <libfdt.h>
 #include <fdtdec.h>
 #include <fdt_support.h>
+#include <linux/hdmi.h>
 #include <linux/list.h>
 #include <linux/compat.h>
 #include <linux/media-bus-format.h>
@@ -150,7 +151,7 @@ static int connector_phy_init(struct display_state *state)
 	ret = uclass_get_device_by_phandle(UCLASS_PHY, conn_state->dev, "phys",
 					   &dev);
 	if (ret) {
-		debug("Warn: can't find phy driver\n");
+		printf("Warn: can't find phy driver\n");
 		return 0;
 	}
 
@@ -168,7 +169,6 @@ static int connector_phy_init(struct display_state *state)
 		printf("failed to init phy driver\n");
 		return -EINVAL;
 	}
-
 	conn_state->phy = phy;
 	return 0;
 }
@@ -405,6 +405,62 @@ void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags)
 	p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal);
 }
 
+/**
+ * drm_mode_is_420_only - if a given videomode can be only supported in YCBCR420
+ * output format
+ *
+ * @connector: drm connector under action.
+ * @mode: video mode to be tested.
+ *
+ * Returns:
+ * true if the mode can be supported in YCBCR420 format
+ * false if not.
+ */
+bool drm_mode_is_420_only(const struct drm_display_info *display,
+			  struct drm_display_mode *mode)
+{
+	u8 vic = drm_match_cea_mode(mode);
+
+	return test_bit(vic, display->hdmi.y420_vdb_modes);
+}
+
+/**
+ * drm_mode_is_420_also - if a given videomode can be supported in YCBCR420
+ * output format also (along with RGB/YCBCR444/422)
+ *
+ * @display: display under action.
+ * @mode: video mode to be tested.
+ *
+ * Returns:
+ * true if the mode can be support YCBCR420 format
+ * false if not.
+ */
+bool drm_mode_is_420_also(const struct drm_display_info *display,
+			  struct drm_display_mode *mode)
+{
+	u8 vic = drm_match_cea_mode(mode);
+
+	return test_bit(vic, display->hdmi.y420_cmdb_modes);
+}
+
+/**
+ * drm_mode_is_420 - if a given videomode can be supported in YCBCR420
+ * output format
+ *
+ * @display: display under action.
+ * @mode: video mode to be tested.
+ *
+ * Returns:
+ * true if the mode can be supported in YCBCR420 format
+ * false if not.
+ */
+bool drm_mode_is_420(const struct drm_display_info *display,
+		     struct drm_display_mode *mode)
+{
+	return drm_mode_is_420_only(display, mode) ||
+		drm_mode_is_420_also(display, mode);
+}
+
 static int display_get_timing(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
@@ -526,7 +582,6 @@ static int display_init(struct display_state *state)
 		if (ret)
 			goto deinit;
 	}
-
 	state->is_init = 1;
 
 	return 0;
@@ -1173,7 +1228,6 @@ static int rockchip_display_probe(struct udevice *dev)
 			continue;
 		}
 		list_add_tail(&s->head, &rockchip_display_list);
-
 	}
 
 	if (list_empty(&rockchip_display_list)) {
diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index 9d613abeaf..d38e113fe4 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -170,5 +170,7 @@ struct display_state {
 
 int drm_mode_vrefresh(const struct drm_display_mode *mode);
 int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val);
+bool drm_mode_is_420(const struct drm_display_info *display,
+		     struct drm_display_mode *mode);
 
 #endif
diff --git a/drivers/video/drm/rockchip_dw_hdmi.c b/drivers/video/drm/rockchip_dw_hdmi.c
index d951d146ab..52d16231db 100644
--- a/drivers/video/drm/rockchip_dw_hdmi.c
+++ b/drivers/video/drm/rockchip_dw_hdmi.c
@@ -5,8 +5,12 @@
  */
 
 #include <common.h>
+#include <boot_rkimg.h>
+#include <asm/io.h>
 #include <dm/device.h>
 #include <linux/dw_hdmi.h>
+#include <linux/hdmi.h>
+#include <linux/media-bus-format.h>
 #include "rockchip_display.h"
 #include "rockchip_crtc.h"
 #include "rockchip_connector.h"
@@ -19,6 +23,25 @@
 #define RK3399_GRF_SOC_CON20		0x6250
 #define RK3399_HDMI_LCDC_SEL		BIT(6)
 
+#define RK3228_IO_3V_DOMAIN              ((7 << 4) | (7 << (4 + 16)))
+#define RK3328_IO_3V_DOMAIN              (7 << (9 + 16))
+#define RK3328_IO_5V_DOMAIN              ((7 << 9) | (3 << (9 + 16)))
+#define RK3328_IO_CTRL_BY_HDMI           ((1 << 13) | (1 << (13 + 16)))
+#define RK3328_IO_DDC_IN_MSK             ((3 << 10) | (3 << (10 + 16)))
+#define RK3228_IO_DDC_IN_MSK             ((3 << 13) | (3 << (13 + 16)))
+#define RK3228_GRF_SOC_CON2              0x0408
+#define RK3228_GRF_SOC_CON6              0x0418
+#define RK3328_GRF_SOC_CON2              0x0408
+#define RK3328_GRF_SOC_CON3              0x040c
+#define RK3328_GRF_SOC_CON4              0x0410
+
+#define DRM_BASE_MODE(c, hd, hss, hse, ht, vd, vss, vse, vt, vs, f) \
+	.clock = (c), \
+	.hdisplay = (hd), .hsync_start = (hss), .hsync_end = (hse), \
+	.htotal = (ht), .vdisplay = (vd), \
+	.vsync_start = (vss), .vsync_end = (vse), .vtotal = (vt), \
+	.vscan = (vs), .flags = (f)
+
 static const struct dw_hdmi_mpll_config rockchip_mpll_cfg[] = {
 	{
 		30666000, {
@@ -107,6 +130,46 @@ static const struct dw_hdmi_mpll_config rockchip_mpll_cfg[] = {
 	}
 };
 
+static const struct dw_hdmi_mpll_config rockchip_mpll_cfg_420[] = {
+	{
+		30666000, {
+			{ 0x00b7, 0x0000 },
+			{ 0x2157, 0x0000 },
+			{ 0x40f7, 0x0000 },
+		},
+	},  {
+		92000000, {
+			{ 0x00b7, 0x0000 },
+			{ 0x2143, 0x0001 },
+			{ 0x40a3, 0x0001 },
+		},
+	},  {
+		184000000, {
+			{ 0x0073, 0x0001 },
+			{ 0x2146, 0x0002 },
+			{ 0x4062, 0x0002 },
+		},
+	},  {
+		340000000, {
+			{ 0x0052, 0x0003 },
+			{ 0x214d, 0x0003 },
+			{ 0x4065, 0x0003 },
+		},
+	},  {
+		600000000, {
+			{ 0x0041, 0x0003 },
+			{ 0x3b4d, 0x0003 },
+			{ 0x5a65, 0x0003 },
+		},
+	},  {
+		~0UL, {
+			{ 0x0000, 0x0000 },
+			{ 0x0000, 0x0000 },
+			{ 0x0000, 0x0000 },
+		},
+	}
+};
+
 static const struct dw_hdmi_curr_ctrl rockchip_cur_ctr[] = {
 	/*      pixelclk    bpp8    bpp10   bpp12 */
 	{
@@ -125,6 +188,571 @@ static const struct dw_hdmi_phy_config rockchip_phy_config[] = {
 	{ ~0UL,	     0x0000, 0x0000, 0x0000}
 };
 
+static const struct base_drm_display_mode resolution_white[] = {
+	/* 0. vic:2 - 720x480@60Hz */
+	{ DRM_BASE_MODE(27000, 720, 736,
+			798, 858, 480, 489, 495, 525, 0,
+			DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 1. vic:3 - 720x480@60Hz */
+	{ DRM_BASE_MODE(27000, 720, 736,
+			798, 858, 480, 489, 495, 525, 0,
+			DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 2. vic:4 - 1280x720@60Hz */
+	{ DRM_BASE_MODE(74250, 1280, 1390,
+			1430, 1650, 720, 725, 730, 750, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 3. vic:5 - 1920x1080i@60Hz */
+	{ DRM_BASE_MODE(74250, 1920, 2008,
+			2052, 2200, 1080, 1084, 1094, 1125, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
+			DRM_MODE_FLAG_INTERLACE),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 4. vic:6 - 720(1440)x480i@60Hz */
+	{ DRM_BASE_MODE(13500, 720, 739,
+			801, 858, 480, 488, 494, 525, 0,
+			DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 5. vic:16 - 1920x1080@60Hz */
+	{ DRM_BASE_MODE(148500, 1920, 2008,
+			2052, 2200, 1080, 1084, 1089, 1125, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 6. vic:17 - 720x576@50Hz */
+	{ DRM_BASE_MODE(27000, 720, 732,
+			796, 864, 576, 581, 586, 625, 0,
+			DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 7. vic:18 - 720x576@50Hz */
+	{ DRM_BASE_MODE(27000, 720, 732,
+			796, 864, 576, 581, 586, 625, 0,
+			DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 8. vic:19 - 1280x720@50Hz */
+	{ DRM_BASE_MODE(74250, 1280, 1720,
+			1760, 1980, 720, 725, 730, 750, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 9. vic:20 - 1920x1080i@50Hz */
+	{ DRM_BASE_MODE(74250, 1920, 2448,
+			2492, 2640, 1080, 1084, 1094, 1125, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
+			DRM_MODE_FLAG_INTERLACE),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 10. vic:21 - 720(1440)x576i@50Hz */
+	{ DRM_BASE_MODE(13500, 720, 732,
+			795, 864, 576, 580, 586, 625, 0,
+			DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 11. vic:31 - 1920x1080@50Hz */
+	{ DRM_BASE_MODE(148500, 1920, 2448,
+			2492, 2640, 1080, 1084, 1089, 1125, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 12. vic:32 - 1920x1080@24Hz */
+	{ DRM_BASE_MODE(74250, 1920, 2558,
+			2602, 2750, 1080, 1084, 1089, 1125, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 13. vic:33 - 1920x1080@25Hz */
+	{ DRM_BASE_MODE(74250, 1920, 2448,
+			2492, 2640, 1080, 1084, 1089, 1125, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 14. vic:34 - 1920x1080@30Hz */
+	{ DRM_BASE_MODE(74250, 1920, 2008,
+			2052, 2200, 1080, 1084, 1089, 1125, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 15. vic:39 - 1920x1080i@50Hz */
+	{ DRM_BASE_MODE(72000, 1920, 1952,
+			2120, 2304, 1080, 1126, 1136, 1250, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_INTERLACE),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 16. vic:60 - 1280x720@24Hz */
+	{ DRM_BASE_MODE(59400, 1280, 3040,
+			3080, 3300, 720, 725, 730, 750, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 17. vic:61 - 1280x720@25Hz */
+	{ DRM_BASE_MODE(74250, 1280, 3700,
+			3740, 3960, 720, 725, 730, 750, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 18. vic:62 - 1280x720@30Hz */
+	{ DRM_BASE_MODE(74250, 1280, 3040,
+			3080, 3300, 720, 725, 730, 750, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 19. vic:93 - 3840x2160p@24Hz 16:9 */
+	{ DRM_BASE_MODE(297000, 3840, 5116,
+			5204, 5500, 2160, 2168, 2178, 2250, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 20. vic:94 - 3840x2160p@25Hz 16:9 */
+	{ DRM_BASE_MODE(297000, 3840, 4896,
+			4984, 5280, 2160, 2168, 2178, 2250, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 21. vic:95 - 3840x2160p@30Hz 16:9 */
+	{ DRM_BASE_MODE(297000, 3840, 4016,
+			4104, 4400, 2160, 2168, 2178, 2250, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 22. vic:96 - 3840x2160p@50Hz 16:9 */
+	{ DRM_BASE_MODE(594000, 3840, 4896,
+			4984, 5280, 2160, 2168, 2178, 2250, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 23. vic:97 - 3840x2160p@60Hz 16:9 */
+	{ DRM_BASE_MODE(594000, 3840, 4016,
+			4104, 4400, 2160, 2168, 2178, 2250, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 24. vic:98 - 4096x2160p@24Hz 256:135 */
+	{ DRM_BASE_MODE(297000, 4096, 5116,
+			5204, 5500, 2160, 2168, 2178, 2250, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
+	/* 25. vic:99 - 4096x2160p@25Hz 256:135 */
+	{ DRM_BASE_MODE(297000, 4096, 5064,
+			5152, 5280, 2160, 2168, 2178, 2250, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
+	/* 26. vic:100 - 4096x2160p@30Hz 256:135 */
+	{ DRM_BASE_MODE(297000, 4096, 4184,
+			4272, 4400, 2160, 2168, 2178, 2250, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
+	/* 27. vic:101 - 4096x2160p@50Hz 256:135 */
+	{ DRM_BASE_MODE(594000, 4096, 5064,
+			5152, 5280, 2160, 2168, 2178, 2250, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
+	/* 28. vic:102 - 4096x2160p@60Hz 256:135 */
+	{ DRM_BASE_MODE(594000, 4096, 4184,
+			4272, 4400, 2160, 2168, 2178, 2250, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
+};
+
+static bool drm_mode_equal(const struct base_drm_display_mode *mode1,
+			   const struct drm_display_mode *mode2)
+{
+	unsigned int flags_mask =
+		DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_PHSYNC |
+		DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC |
+		DRM_MODE_FLAG_NVSYNC;
+
+	if (mode1->clock == mode2->clock &&
+	    mode1->hdisplay == mode2->hdisplay &&
+	    mode1->hsync_start == mode2->hsync_start &&
+	    mode1->hsync_end == mode2->hsync_end &&
+	    mode1->htotal == mode2->htotal &&
+	    mode1->vdisplay == mode2->vdisplay &&
+	    mode1->vsync_start == mode2->vsync_start &&
+	    mode1->vsync_end == mode2->vsync_end &&
+	    mode1->vtotal == mode2->vtotal &&
+	    (mode1->flags & flags_mask) == (mode2->flags & flags_mask)) {
+		return true;
+	}
+
+	return false;
+}
+
+/**
+ * drm_mode_sort - sort mode list
+ * @edid_data: modes structures to sort
+ *
+ * Sort @edid_data by favorability, moving good modes to the head of the list.
+ */
+void drm_mode_sort(struct hdmi_edid_data *edid_data)
+{
+	struct drm_display_mode *a, *b;
+	struct drm_display_mode c;
+	int diff, i, j;
+
+	for (i = 0; i < (edid_data->modes - 1); i++) {
+		a = &edid_data->mode_buf[i];
+		for (j = i + 1; j < edid_data->modes; j++) {
+			b = &edid_data->mode_buf[j];
+			diff = ((b->type & DRM_MODE_TYPE_PREFERRED) != 0) -
+				((a->type & DRM_MODE_TYPE_PREFERRED) != 0);
+			if (diff) {
+				if (diff > 0) {
+					c = *a;
+					*a = *b;
+					*b = c;
+				}
+				continue;
+			}
+
+			diff = b->hdisplay * b->vdisplay
+				- a->hdisplay * a->vdisplay;
+			if (diff) {
+				if (diff > 0) {
+					c = *a;
+					*a = *b;
+					*b = c;
+				}
+				continue;
+			}
+
+			diff = b->vrefresh - a->vrefresh;
+			if (diff) {
+				if (diff > 0) {
+					c = *a;
+					*a = *b;
+					*b = c;
+				}
+				continue;
+			}
+
+			diff = b->clock - a->clock;
+			if (diff > 0) {
+				c = *a;
+				*a = *b;
+				*b = c;
+			}
+		}
+	}
+	edid_data->preferred_mode = &edid_data->mode_buf[0];
+}
+
+/**
+ * drm_mode_prune_invalid - remove invalid modes from mode list
+ * @edid_data: structure store mode list
+ * Returns:
+ * Number of valid modes.
+ */
+int drm_mode_prune_invalid(struct hdmi_edid_data *edid_data)
+{
+	int i, j;
+	int num = edid_data->modes;
+	int len = sizeof(struct drm_display_mode);
+	struct drm_display_mode *mode_buf = edid_data->mode_buf;
+
+	for (i = 0; i < num; i++) {
+		if (mode_buf[i].invalid) {
+			/* If mode is invalid, delete it. */
+			for (j = i; j < num - 1; j++)
+				memcpy(&mode_buf[j], &mode_buf[j + 1], len);
+
+			num--;
+			i--;
+		}
+	}
+	/* Clear redundant modes of mode_buf. */
+	memset(&mode_buf[num], 0, len * (edid_data->modes - num));
+
+	edid_data->modes = num;
+	return num;
+}
+
+/**
+ * drm_rk_filter_whitelist - mark modes out of white list from mode list
+ * @edid_data: structure store mode list
+ */
+void drm_rk_filter_whitelist(struct hdmi_edid_data *edid_data)
+{
+	int i, j, white_len;
+
+	if (sizeof(resolution_white)) {
+		white_len = sizeof(resolution_white) /
+			sizeof(resolution_white[0]);
+		for (i = 0; i < edid_data->modes; i++) {
+			for (j = 0; j < white_len; j++) {
+				if (drm_mode_equal(&resolution_white[j],
+						   &edid_data->mode_buf[i]))
+					break;
+			}
+
+			if (j == white_len)
+				edid_data->mode_buf[i].invalid = true;
+		}
+	}
+}
+
+void drm_rk_select_mode(struct hdmi_edid_data *edid_data,
+			struct base_screen_info *screen_info)
+{
+	int i;
+	const struct base_drm_display_mode *base_mode;
+
+	if (!screen_info) {
+		/* define init resolution here */
+	} else {
+		base_mode = &screen_info->mode;
+		for (i = 0; i < edid_data->modes; i++) {
+			if (drm_mode_equal(base_mode,
+					   &edid_data->mode_buf[i])) {
+				edid_data->preferred_mode =
+					&edid_data->mode_buf[i];
+				break;
+			}
+		}
+	}
+}
+
+static unsigned int drm_rk_select_color(struct hdmi_edid_data *edid_data,
+					struct base_screen_info *screen_info,
+					enum dw_hdmi_devtype dev_type)
+{
+	struct drm_display_info *info = &edid_data->display_info;
+	struct drm_display_mode *mode = edid_data->preferred_mode;
+	int max_tmds_clock = info->max_tmds_clock;
+	bool support_dc = false;
+	bool mode_420 = drm_mode_is_420(info, mode);
+	unsigned int color_depth = 8;
+	unsigned int base_color = DRM_HDMI_OUTPUT_YCBCR444;
+	unsigned int color_format = DRM_HDMI_OUTPUT_DEFAULT_RGB;
+	unsigned long tmdsclock, pixclock = mode->clock;
+
+	if (screen_info)
+		base_color = screen_info->format;
+
+	switch (base_color) {
+	case DRM_HDMI_OUTPUT_YCBCR_HQ:
+		if (info->color_formats & DRM_COLOR_FORMAT_YCRCB444)
+			color_format = DRM_HDMI_OUTPUT_YCBCR444;
+		else if (info->color_formats & DRM_COLOR_FORMAT_YCRCB422)
+			color_format = DRM_HDMI_OUTPUT_YCBCR422;
+		else if (mode_420)
+			color_format = DRM_HDMI_OUTPUT_YCBCR420;
+		break;
+	case DRM_HDMI_OUTPUT_YCBCR_LQ:
+		if (mode_420)
+			color_format = DRM_HDMI_OUTPUT_YCBCR420;
+		else if (info->color_formats & DRM_COLOR_FORMAT_YCRCB422)
+			color_format = DRM_HDMI_OUTPUT_YCBCR422;
+		else if (info->color_formats & DRM_COLOR_FORMAT_YCRCB444)
+			color_format = DRM_HDMI_OUTPUT_YCBCR444;
+		break;
+	case DRM_HDMI_OUTPUT_YCBCR420:
+		if (mode_420)
+			color_format = DRM_HDMI_OUTPUT_YCBCR420;
+		break;
+	case DRM_HDMI_OUTPUT_YCBCR422:
+		if (info->color_formats & DRM_COLOR_FORMAT_YCRCB422)
+			color_format = DRM_HDMI_OUTPUT_YCBCR422;
+		break;
+	case DRM_HDMI_OUTPUT_YCBCR444:
+		if (info->color_formats & DRM_COLOR_FORMAT_YCRCB444)
+			color_format = DRM_HDMI_OUTPUT_YCBCR444;
+		break;
+	case DRM_HDMI_OUTPUT_DEFAULT_RGB:
+	default:
+		break;
+	}
+
+	if (color_format == DRM_HDMI_OUTPUT_DEFAULT_RGB &&
+	    info->edid_hdmi_dc_modes & DRM_EDID_HDMI_DC_30)
+		support_dc = true;
+	if (color_format == DRM_HDMI_OUTPUT_YCBCR444 &&
+	    (info->edid_hdmi_dc_modes &
+	     (DRM_EDID_HDMI_DC_Y444 | DRM_EDID_HDMI_DC_30)))
+		support_dc = true;
+	if (color_format == DRM_HDMI_OUTPUT_YCBCR422)
+		support_dc = true;
+	if (color_format == DRM_HDMI_OUTPUT_YCBCR420 &&
+	    info->hdmi.y420_dc_modes & DRM_EDID_YCBCR420_DC_30)
+		support_dc = true;
+
+	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
+		pixclock *= 2;
+
+	if (screen_info && screen_info->depth == 10)
+		color_depth = screen_info->depth;
+
+	if (color_format == DRM_HDMI_OUTPUT_YCBCR422 || color_depth == 8)
+		tmdsclock = pixclock;
+	else
+		tmdsclock = pixclock * color_depth / 8;
+
+	if (color_format == DRM_HDMI_OUTPUT_YCBCR420)
+		tmdsclock /= 2;
+
+	if (!max_tmds_clock)
+		max_tmds_clock = 340000;
+
+	switch (dev_type) {
+	case RK3368_HDMI:
+		max_tmds_clock = min(max_tmds_clock, 340000);
+		break;
+	case RK3328_HDMI:
+	case RK3228_HDMI:
+		max_tmds_clock = min(max_tmds_clock, 371250);
+		break;
+	default:
+		max_tmds_clock = min(max_tmds_clock, 594000);
+		break;
+	}
+
+	if (tmdsclock > max_tmds_clock) {
+		if (max_tmds_clock >= 594000) {
+			color_depth = 8;
+		} else if (max_tmds_clock > 340000) {
+			if (drm_mode_is_420(info, mode))
+				color_format = DRM_HDMI_OUTPUT_YCBCR420;
+		} else {
+			color_depth = 8;
+			if (drm_mode_is_420(info, mode))
+				color_format = DRM_HDMI_OUTPUT_YCBCR420;
+		}
+	}
+
+	if (color_depth > 8 && support_dc) {
+		if (dev_type == RK3288_HDMI)
+			return MEDIA_BUS_FMT_RGB101010_1X30;
+		switch (color_format) {
+		case DRM_HDMI_OUTPUT_YCBCR444:
+			return MEDIA_BUS_FMT_YUV10_1X30;
+		case DRM_HDMI_OUTPUT_YCBCR422:
+			return MEDIA_BUS_FMT_UYVY10_1X20;
+		case DRM_HDMI_OUTPUT_YCBCR420:
+			return MEDIA_BUS_FMT_UYYVYY10_0_5X30;
+		default:
+			return MEDIA_BUS_FMT_RGB101010_1X30;
+		}
+	} else {
+		if (dev_type == RK3288_HDMI)
+			return MEDIA_BUS_FMT_RGB888_1X24;
+		switch (color_format) {
+		case DRM_HDMI_OUTPUT_YCBCR444:
+			return MEDIA_BUS_FMT_YUV8_1X24;
+		case DRM_HDMI_OUTPUT_YCBCR422:
+			return MEDIA_BUS_FMT_UYVY8_1X16;
+		case DRM_HDMI_OUTPUT_YCBCR420:
+			return MEDIA_BUS_FMT_UYYVYY8_0_5X24;
+		default:
+			return MEDIA_BUS_FMT_RGB888_1X24;
+		}
+	}
+}
+
+void drm_rk_selete_output(struct hdmi_edid_data *edid_data,
+			  unsigned int *bus_format,
+			  struct overscan *overscan,
+			  enum dw_hdmi_devtype dev_type)
+{
+	int ret, i, screen_size;
+	struct base_disp_info base_parameter;
+	const struct base_overscan *scan;
+	struct base_screen_info *screen_info = NULL;
+	int max_scan = 100;
+	int min_scan = 51;
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+	char baseparameter_buf[8 * RK_BLK_SIZE] __aligned(ARCH_DMA_MINALIGN);
+
+	overscan->left_margin = max_scan;
+	overscan->right_margin = max_scan;
+	overscan->top_margin = max_scan;
+	overscan->bottom_margin = max_scan;
+
+	if (dev_type == RK3288_HDMI)
+		*bus_format = MEDIA_BUS_FMT_RGB888_1X24;
+	else
+		*bus_format = MEDIA_BUS_FMT_YUV8_1X24;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: Could not find device\n", __func__);
+		return;
+	}
+
+	if (part_get_info_by_name(dev_desc, "baseparameter", &part_info) < 0) {
+		printf("Could not find baseparameter partition\n");
+		return;
+	}
+
+	ret = blk_dread(dev_desc, part_info.start, 1,
+			(void *)baseparameter_buf);
+	if (ret < 0) {
+		printf("read baseparameter failed\n");
+		return;
+	}
+
+	memcpy(&base_parameter, baseparameter_buf, sizeof(base_parameter));
+	scan = &base_parameter.scan;
+
+	if (scan->leftscale < min_scan && scan->leftscale > 0)
+		overscan->left_margin = min_scan;
+	else if (scan->leftscale < max_scan && scan->leftscale > 0)
+		overscan->left_margin = scan->leftscale;
+
+	if (scan->rightscale < min_scan && scan->rightscale > 0)
+		overscan->right_margin = min_scan;
+	else if (scan->rightscale < max_scan && scan->rightscale > 0)
+		overscan->right_margin = scan->rightscale;
+
+	if (scan->topscale < min_scan && scan->topscale > 0)
+		overscan->top_margin = min_scan;
+	else if (scan->topscale < max_scan && scan->topscale > 0)
+		overscan->top_margin = scan->topscale;
+
+	if (scan->bottomscale < min_scan && scan->bottomscale > 0)
+		overscan->bottom_margin = min_scan;
+	else if (scan->bottomscale < max_scan && scan->bottomscale > 0)
+		overscan->bottom_margin = scan->bottomscale;
+
+	screen_size = sizeof(base_parameter.screen_list) /
+		sizeof(base_parameter.screen_list[0]);
+
+	for (i = 0; i < screen_size; i++) {
+		if (base_parameter.screen_list[i].type ==
+		    DRM_MODE_CONNECTOR_HDMIA) {
+			screen_info = &base_parameter.screen_list[i];
+			break;
+		}
+	}
+
+	if (screen_info)
+		printf("base_parameter.mode:%dx%d\n",
+		       screen_info->mode.hdisplay,
+		       screen_info->mode.vdisplay);
+	drm_rk_select_mode(edid_data, screen_info);
+
+	*bus_format = drm_rk_select_color(edid_data, screen_info,
+					  dev_type);
+}
+
+void inno_dw_hdmi_set_domain(void *grf, int status)
+{
+	if (status)
+		writel(RK3328_IO_5V_DOMAIN, grf + RK3328_GRF_SOC_CON4);
+	else
+		writel(RK3328_IO_3V_DOMAIN, grf + RK3328_GRF_SOC_CON4);
+}
+
+void dw_hdmi_set_iomux(void *grf, int dev_type)
+{
+	switch (dev_type) {
+	case RK3328_HDMI:
+		writel(RK3328_IO_DDC_IN_MSK, grf + RK3328_GRF_SOC_CON2);
+		writel(RK3328_IO_CTRL_BY_HDMI, grf + RK3328_GRF_SOC_CON3);
+		break;
+	case RK3228_HDMI:
+		writel(RK3228_IO_3V_DOMAIN, grf + RK3228_GRF_SOC_CON6);
+		writel(RK3228_IO_DDC_IN_MSK, grf + RK3228_GRF_SOC_CON2);
+		break;
+	default:
+		break;
+	}
+}
+
+static const struct dw_hdmi_phy_ops inno_dw_hdmi_phy_ops = {
+	.init = inno_dw_hdmi_phy_init,
+	.disable = inno_dw_hdmi_phy_disable,
+	.read_hpd = inno_dw_hdmi_phy_read_hpd,
+	.mode_valid = inno_dw_hdmi_mode_valid,
+};
+
 static const struct rockchip_connector_funcs rockchip_dw_hdmi_funcs = {
 	.init = rockchip_dw_hdmi_init,
 	.deinit = rockchip_dw_hdmi_deinit,
@@ -136,21 +764,46 @@ static const struct rockchip_connector_funcs rockchip_dw_hdmi_funcs = {
 	.get_edid = rockchip_dw_hdmi_get_edid,
 };
 
-static const struct dw_hdmi_plat_data rk3288_hdmi_drv_data = {
+const struct dw_hdmi_plat_data rk3288_hdmi_drv_data = {
 	.vop_sel_bit = 4,
 	.grf_vop_sel_reg = RK3288_GRF_SOC_CON6,
+	.mpll_cfg   = rockchip_mpll_cfg,
+	.cur_ctr    = rockchip_cur_ctr,
+	.phy_config = rockchip_phy_config,
 	.dev_type   = RK3288_HDMI,
 };
 
-static const struct dw_hdmi_plat_data rk3399_hdmi_drv_data = {
+const struct dw_hdmi_plat_data rk3328_hdmi_drv_data = {
+	.vop_sel_bit = 0,
+	.grf_vop_sel_reg = 0,
+	.phy_ops    = &inno_dw_hdmi_phy_ops,
+	.phy_name   = "inno_dw_hdmi_phy2",
+	.dev_type   = RK3328_HDMI,
+};
+
+const struct dw_hdmi_plat_data rk3228_hdmi_drv_data = {
+	.vop_sel_bit = 0,
+	.grf_vop_sel_reg = 0,
+	.phy_ops    = &inno_dw_hdmi_phy_ops,
+	.phy_name   = "inno_dw_hdmi_phy",
+	.dev_type   = RK3228_HDMI,
+};
+
+const struct dw_hdmi_plat_data rk3399_hdmi_drv_data = {
 	.vop_sel_bit = 6,
 	.grf_vop_sel_reg = RK3399_GRF_SOC_CON20,
 	.mpll_cfg   = rockchip_mpll_cfg,
 	.cur_ctr    = rockchip_cur_ctr,
 	.phy_config = rockchip_phy_config,
+	.mpll_cfg_420 = rockchip_mpll_cfg_420,
 	.dev_type   = RK3399_HDMI,
 };
 
+static int rockchip_dw_hdmi_probe(struct udevice *dev)
+{
+	return 0;
+}
+
 static const struct rockchip_connector rk3399_dw_hdmi_data = {
 	.funcs = &rockchip_dw_hdmi_funcs,
 	.data = &rk3399_hdmi_drv_data,
@@ -161,10 +814,15 @@ static const struct rockchip_connector rk3288_dw_hdmi_data = {
 	.data = &rk3288_hdmi_drv_data,
 };
 
-static int rockchip_dw_hdmi_probe(struct udevice *dev)
-{
-	return 0;
-}
+static const struct rockchip_connector rk3328_dw_hdmi_data = {
+	.funcs = &rockchip_dw_hdmi_funcs,
+	.data = &rk3328_hdmi_drv_data,
+};
+
+static const struct rockchip_connector rk3228_dw_hdmi_data = {
+	.funcs = &rockchip_dw_hdmi_funcs,
+	.data = &rk3228_hdmi_drv_data,
+};
 
 static const struct udevice_id rockchip_dw_hdmi_ids[] = {
 	{
@@ -173,6 +831,15 @@ static const struct udevice_id rockchip_dw_hdmi_ids[] = {
 	}, {
 	 .compatible = "rockchip,rk3288-dw-hdmi",
 	 .data = (ulong)&rk3288_dw_hdmi_data,
+	}, {
+	 .compatible = "rockchip,rk3328-dw-hdmi",
+	 .data = (ulong)&rk3328_dw_hdmi_data,
+	}, {
+	 .compatible = "rockchip,rk3128-inno-hdmi",
+	 .data = (ulong)&rk3228_dw_hdmi_data,
+	}, {
+	 .compatible = "rockchip,rk3228-dw-hdmi",
+	 .data = (ulong)&rk3228_dw_hdmi_data,
 	}, {}
 };
 
diff --git a/drivers/video/drm/rockchip_dw_hdmi.h b/drivers/video/drm/rockchip_dw_hdmi.h
index bf09bbaa18..fb1ecc1b9a 100644
--- a/drivers/video/drm/rockchip_dw_hdmi.h
+++ b/drivers/video/drm/rockchip_dw_hdmi.h
@@ -19,4 +19,13 @@ int rockchip_dw_hdmi_get_timing(struct display_state *state);
 int rockchip_dw_hdmi_detect(struct display_state *state);
 int rockchip_dw_hdmi_get_edid(struct display_state *state);
 
+enum drm_connector_status
+inno_dw_hdmi_phy_read_hpd(struct dw_hdmi *hdmi,
+			  void *data);
+void inno_dw_hdmi_phy_disable(struct dw_hdmi *dw_hdmi,
+			      void *data);
+int inno_dw_hdmi_phy_init(struct dw_hdmi *dw_hdmi,
+			  void *data);
+void inno_dw_hdmi_mode_valid(struct dw_hdmi *hdmi, void *data);
+
 #endif /* _ROCKCHIP_DW_HDMI_REG_H_ */
diff --git a/drivers/video/drm/rockchip_phy.c b/drivers/video/drm/rockchip_phy.c
index c7f147f826..960d561c70 100644
--- a/drivers/video/drm/rockchip_phy.c
+++ b/drivers/video/drm/rockchip_phy.c
@@ -22,6 +22,12 @@ static const struct rockchip_phy rockchip_inno_mipi_dphy_data = {
 };
 #endif
 
+#ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY
+static const struct rockchip_phy rockchip_inno_hdmi_phy_data = {
+	 .funcs = &inno_hdmi_phy_funcs,
+};
+#endif
+
 static const struct udevice_id rockchip_phy_ids[] = {
 #ifdef CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI
 	{
@@ -44,6 +50,17 @@ static const struct udevice_id rockchip_phy_ids[] = {
 		.compatible = "rockchip,rv1108-mipi-dphy",
 		.data = (ulong)&rockchip_inno_mipi_dphy_data,
 	},
+#endif
+#ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY
+	{
+	 .compatible = "rockchip,rk3328-hdmi-phy",
+	 .data = (ulong)&rockchip_inno_hdmi_phy_data,
+	},
+	{
+	 .compatible = "rockchip,rk3228-hdmi-phy",
+	 .data = (ulong)&rockchip_inno_hdmi_phy_data,
+	},
+
 #endif
 	{}
 };
@@ -105,3 +122,31 @@ unsigned long rockchip_phy_set_pll(struct display_state *state,
 
 	return phy->funcs->set_pll(state, rate);
 }
+
+void rockchip_phy_set_bus_width(struct display_state *state, u32 bus_width)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	const struct rockchip_phy *phy =
+		(struct rockchip_phy *)conn_state->phy;
+
+	if (!phy || !phy->funcs || !phy->funcs->set_bus_width) {
+		debug("%s: failed to find phy set_bus_width funcs\n", __func__);
+		return;
+	}
+
+	return phy->funcs->set_bus_width(state, bus_width);
+}
+
+long rockchip_phy_round_rate(struct display_state *state, unsigned long rate)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	const struct rockchip_phy *phy =
+		(struct rockchip_phy *)conn_state->phy;
+
+	if (!phy || !phy->funcs || !phy->funcs->round_rate) {
+		debug("%s: failed to find phy round_rate funcs\n", __func__);
+		return -ENODEV;
+	}
+
+	return phy->funcs->round_rate(state, rate);
+}
diff --git a/drivers/video/drm/rockchip_phy.h b/drivers/video/drm/rockchip_phy.h
index 70e9c820b7..4fed5a0cc9 100644
--- a/drivers/video/drm/rockchip_phy.h
+++ b/drivers/video/drm/rockchip_phy.h
@@ -13,6 +13,8 @@ struct rockchip_phy_funcs {
 	int (*power_off)(struct display_state *state);
 	unsigned long (*set_pll)(struct display_state *state,
 				 unsigned long rate);
+	void (*set_bus_width)(struct display_state *state, u32 bus_width);
+	long (*round_rate)(struct display_state *state, unsigned long rate);
 };
 
 struct rockchip_phy {
@@ -26,8 +28,13 @@ int rockchip_phy_power_off(struct display_state *state);
 int rockchip_phy_power_on(struct display_state *state);
 unsigned long rockchip_phy_set_pll(struct display_state *state,
 				   unsigned long rate);
+void rockchip_phy_set_bus_width(struct display_state *state, u32 bus_width);
+long rockchip_phy_round_rate(struct display_state *state, unsigned long rate);
 
 #ifdef CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI
 extern const struct rockchip_phy_funcs inno_mipi_dphy_funcs;
 #endif
+#ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY
+extern const struct rockchip_phy_funcs inno_hdmi_phy_funcs;
+#endif
 #endif
diff --git a/include/drm_modes.h b/include/drm_modes.h
index d71f562ddb..36d5641dbb 100644
--- a/include/drm_modes.h
+++ b/include/drm_modes.h
@@ -36,7 +36,7 @@
 #define DRM_MODE_FLAG_PIXMUX			(1 << 11)
 #define DRM_MODE_FLAG_DBLCLK			(1 << 12)
 #define DRM_MODE_FLAG_CLKDIV2			(1 << 13)
-#define DRM_MODE_FLAG_PPIXDATA			(1 << 31)
+#define DRM_MODE_FLAG_PPIXDATA                  BIT(31)
 
 #define DRM_MODE_CONNECTOR_Unknown	0
 #define DRM_MODE_CONNECTOR_VGA		1
@@ -124,7 +124,8 @@ enum v4l2_colorspace {
 #define CRTC_STEREO_DOUBLE	(1 << 1) /* adjust timings for stereo modes */
 #define CRTC_NO_DBLSCAN		(1 << 2) /* don't adjust doublescan */
 #define CRTC_NO_VSCAN		(1 << 3) /* don't adjust doublescan */
-#define CRTC_STEREO_DOUBLE_ONLY	(CRTC_STEREO_DOUBLE | CRTC_NO_DBLSCAN | CRTC_NO_VSCAN)
+#define CRTC_STEREO_DOUBLE_ONLY	(CRTC_STEREO_DOUBLE | CRTC_NO_DBLSCAN | \
+				 CRTC_NO_VSCAN)
 
 #define DRM_MODE_FLAG_3D_MAX	DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF
 
@@ -160,6 +161,7 @@ struct drm_display_mode {
 	int crtc_vsync_start;
 	int crtc_vsync_end;
 	int crtc_vtotal;
+	bool invalid;
 };
 
 #endif
diff --git a/include/edid.h b/include/edid.h
index 06698db9c3..1ac641c963 100644
--- a/include/edid.h
+++ b/include/edid.h
@@ -16,11 +16,13 @@
 
 #include <div64.h>
 #include <linux/types.h>
+#include <drm_modes.h>
+#include <i2c.h>
 
 /* Size of the EDID data */
 #define EDID_SIZE	128
 #define EDID_EXT_SIZE	256
-#define MODE_LEN	120
+#define MODE_LEN	240
 
 #define CEA_EXT	    0x02
 #define VTB_EXT	    0x10
@@ -44,16 +46,16 @@
 #define  DRM_MODE_FLAG_420			BIT(23)
 #define  DRM_MODE_FLAG_420_ONLY			BIT(24)
 
-#define DRM_MODE_FLAG_3D_MASK			(0x1f << 14)
-#define  DRM_MODE_FLAG_3D_NONE			(0 << 14)
-#define  DRM_MODE_FLAG_3D_FRAME_PACKING		BIT(14)
-#define  DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE	(2 << 14)
-#define  DRM_MODE_FLAG_3D_LINE_ALTERNATIVE	(3 << 14)
-#define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL	(4 << 14)
-#define  DRM_MODE_FLAG_3D_L_DEPTH		(5 << 14)
-#define  DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH	(6 << 14)
-#define  DRM_MODE_FLAG_3D_TOP_AND_BOTTOM	(7 << 14)
-#define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF	(8 << 14)
+#define DRM_MODE_FLAG_3D_MASK                  (0x1f << 14)
+#define  DRM_MODE_FLAG_3D_NONE                 (0 << 14)
+#define  DRM_MODE_FLAG_3D_FRAME_PACKING                BIT(14)
+#define  DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE    (2 << 14)
+#define  DRM_MODE_FLAG_3D_LINE_ALTERNATIVE     (3 << 14)
+#define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL    (4 << 14)
+#define  DRM_MODE_FLAG_3D_L_DEPTH              (5 << 14)
+#define  DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH        (6 << 14)
+#define  DRM_MODE_FLAG_3D_TOP_AND_BOTTOM       (7 << 14)
+#define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF    (8 << 14)
 
 #define BITS_PER_BYTE         8
 #define BITS_TO_LONGS(nr)     DIV_ROUND_UP(nr, BITS_PER_BYTE * sizeof(long))
@@ -61,13 +63,18 @@
 	(((_x) >> (_pos)) & 1)
 #define GET_BITS(_x, _pos_msb, _pos_lsb) \
 	(((_x) >> (_pos_lsb)) & ((1 << ((_pos_msb) - (_pos_lsb) + 1)) - 1))
-#define DRM_MODE(c, hd, hss, hse, ht, vd, vss, vse, vt, vs, f) \
-	.clock = (c), \
+#define DRM_MODE(t, c, hd, hss, hse, ht, vd, vss, vse, vt, vs, f) \
+	.clock = (c), .type = (t),\
 	.hdisplay = (hd), .hsync_start = (hss), .hsync_end = (hse), \
 	.htotal = (ht), .vdisplay = (vd), \
 	.vsync_start = (vss), .vsync_end = (vse), .vtotal = (vt), \
 	.vscan = (vs), .flags = (f)
 
+#define DDC_SEGMENT_ADDR 0x30
+#define DDC_ADDR 0x50
+#define HDMI_EDID_BLOCK_SIZE 128
+#define SCDC_I2C_SLAVE_ADDRESS 0x54
+
 /* Aspect ratios used in EDID info. */
 enum edid_aspect {
 	ASPECT_625 = 0,
@@ -317,13 +324,15 @@ struct edid_monitor_descriptor {
 #define DRM_EDID_FEATURE_PREFERRED_TIMING (1 << 1)
 #define DRM_EDID_FEATURE_STANDARD_COLOR   (1 << 2)
 /* If analog */
-#define DRM_EDID_FEATURE_DISPLAY_TYPE     (3 << 3) /* 00=mono, 01=rgb, 10=non-rgb, 11=unknown */
+/* 00=mono, 01=rgb, 10=non-rgb, 11=unknown */
+#define DRM_EDID_FEATURE_DISPLAY_TYPE     (3 << 3)
 /* If digital */
 #define DRM_EDID_FEATURE_COLOR_MASK	  (3 << 3)
 #define DRM_EDID_FEATURE_RGB		  (0 << 3)
 #define DRM_EDID_FEATURE_RGB_YCRCB444	  (1 << 3)
 #define DRM_EDID_FEATURE_RGB_YCRCB422	  (2 << 3)
-#define DRM_EDID_FEATURE_RGB_YCRCB	  (3 << 3) /* both 4:4:4 and 4:2:2 */
+/* both 4:4:4 and 4:2:2 */
+#define DRM_EDID_FEATURE_RGB_YCRCB	  (3 << 3)
 
 #define DRM_EDID_FEATURE_PM_ACTIVE_OFF    (1 << 5)
 #define DRM_EDID_FEATURE_PM_SUSPEND       (1 << 6)
@@ -710,6 +719,61 @@ struct edid {
 	u8 checksum;
 } __packed;
 
+enum base_output_format {
+	DRM_HDMI_OUTPUT_DEFAULT_RGB, /* default RGB */
+	DRM_HDMI_OUTPUT_YCBCR444, /* YCBCR 444 */
+	DRM_HDMI_OUTPUT_YCBCR422, /* YCBCR 422 */
+	DRM_HDMI_OUTPUT_YCBCR420, /* YCBCR 420 */
+	/* (YCbCr444 > YCbCr422 > YCbCr420 > RGB) */
+	DRM_HDMI_OUTPUT_YCBCR_HQ,
+	/* (YCbCr420 > YCbCr422 > YCbCr444 > RGB) */
+	DRM_HDMI_OUTPUT_YCBCR_LQ,
+	DRM_HDMI_OUTPUT_INVALID, /* Guess what ? */
+};
+
+enum  base_output_depth {
+	AUTOMATIC = 0,
+	DEPTH_24BIT = 8,
+	DEPTH_30BIT = 10,
+};
+
+struct base_overscan {
+	unsigned int maxvalue;
+	unsigned short leftscale;
+	unsigned short rightscale;
+	unsigned short topscale;
+	unsigned short bottomscale;
+};
+
+struct base_drm_display_mode {
+	int clock;		/* in kHz */
+	int hdisplay;
+	int hsync_start;
+	int hsync_end;
+	int htotal;
+	int vdisplay;
+	int vsync_start;
+	int vsync_end;
+	int vtotal;
+	int vrefresh;
+	int vscan;
+	unsigned int flags;
+	int picture_aspect_ratio;
+};
+
+struct base_screen_info {
+	int type;
+	struct base_drm_display_mode mode;	/* 52 bytes */
+	enum base_output_format  format;	/* 4 bytes */
+	enum base_output_depth depth;		/* 4 bytes */
+	unsigned int feature;			/* 4 bytes */
+};
+
+struct base_disp_info {
+	struct base_screen_info screen_list[5];
+	struct base_overscan scan;		/* 12 bytes */
+};
+
 /**
  * Print the EDID info.
  *
@@ -754,11 +818,15 @@ struct display_timing;
 struct hdmi_edid_data {
 	struct drm_display_mode *preferred_mode;
 	int modes;
-	struct drm_hdmi_info hdmi_info;
 	struct drm_display_mode *mode_buf;
 	struct drm_display_info display_info;
 };
 
+struct ddc_adapter {
+	int (*ddc_xfer)(struct ddc_adapter *adap, struct i2c_msg *msgs,
+			int num);
+};
+
 /**
  * edid_get_timing() - Get basic digital display parameters
  *
@@ -777,5 +845,11 @@ int edid_get_drm_mode(u8 *buf, int buf_size, struct drm_display_mode *mode,
 int drm_add_edid_modes(struct hdmi_edid_data *data, u8 *edid);
 bool drm_detect_hdmi_monitor(struct edid *edid);
 bool drm_detect_monitor_audio(struct edid *edid);
+int do_cea_modes(struct hdmi_edid_data *data, const u8 *db, u8 len);
+int drm_do_get_edid(struct ddc_adapter *adap, u8 *edid);
+u8 drm_scdc_readb(struct ddc_adapter *adap, u8 offset,
+		  u8 *value);
+u8 drm_scdc_writeb(struct ddc_adapter *adap, u8 offset,
+		   u8 value);
 
 #endif /* __EDID_H_ */
diff --git a/include/linux/dw_hdmi.h b/include/linux/dw_hdmi.h
index 83b65e9b92..8b0b8fa6e2 100644
--- a/include/linux/dw_hdmi.h
+++ b/include/linux/dw_hdmi.h
@@ -10,6 +10,11 @@
 #ifndef __DW_HDMI__
 #define __DW_HDMI__
 
+struct dw_hdmi;
+struct drm_display_mode;
+struct ddc_adapter;
+struct i2c_msg;
+
 /**
  * DOC: Supported input formats and encodings
  *
@@ -127,10 +132,11 @@ struct dw_hdmi_phy_config {
 };
 
 struct dw_hdmi_phy_ops {
-	int (*init)(struct dw_hdmi *hdmi, void *data,
-		    struct drm_display_mode *mode);
+	int (*init)(struct dw_hdmi *hdmi, void *data);
 	void (*disable)(struct dw_hdmi *hdmi, void *data);
-	enum drm_connector_status (*read_hpd)(struct dw_hdmi *hdmi, void *data);
+	enum drm_connector_status (*read_hpd)(struct dw_hdmi *hdmi,
+					      void *data);
+	void (*mode_valid)(struct dw_hdmi *hdmi, void *data);
 };
 
 struct dw_hdmi_plat_data {
@@ -147,6 +153,7 @@ struct dw_hdmi_plat_data {
 
 	/* Synopsys PHY support */
 	const struct dw_hdmi_mpll_config *mpll_cfg;
+	const struct dw_hdmi_mpll_config *mpll_cfg_420;
 	const struct dw_hdmi_curr_ctrl *cur_ctr;
 	const struct dw_hdmi_phy_config *phy_config;
 	int (*configure_phy)(struct dw_hdmi *hdmi,
diff --git a/include/linux/hdmi.h b/include/linux/hdmi.h
index 041034ff00..70a8e36755 100644
--- a/include/linux/hdmi.h
+++ b/include/linux/hdmi.h
@@ -26,6 +26,7 @@
 #define __LINUX_HDMI_H_
 
 #include <linux/types.h>
+#include <drm_modes.h>
 
 enum hdmi_infoframe_type {
 	HDMI_INFOFRAME_TYPE_VENDOR = 0x81,

commit 3628f4d04ec78f6b200d297c12f9f3d334563ec0
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Fri Aug 10 11:33:38 2018 +0800

    rockchip: vendor: Completing the vendor part planning for flash
    
    1.Nand flash and SPI Nand large capacity case;
      |64KB vendor part 1| p2 | storage ....|
    2.Spi nor small capacity case;
      |8KB offset|4KB vendor part 1| p2 | p3 | p4| storage ...|
    3.Support vendor ops register.
    
    Change-Id: Ifbf5f3499b0976202e9df63936a06d8fcdd68aa4
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/vendor.h b/arch/arm/include/asm/arch-rockchip/vendor.h
index 83c487d92e..671669f5d8 100644
--- a/arch/arm/include/asm/arch-rockchip/vendor.h
+++ b/arch/arm/include/asm/arch-rockchip/vendor.h
@@ -21,5 +21,12 @@ struct vendor_item {
 int vendor_storage_test(void);
 int vendor_storage_read(u16 id, void *pbuf, u16 size);
 int vendor_storage_write(u16 id, void *pbuf, u16 size);
-
+int flash_vendor_dev_ops_register(int (*read)(struct blk_desc *dev_desc,
+					      u32 sec,
+					      u32 n_sec,
+					      void *p_data),
+				  int (*write)(struct blk_desc *dev_desc,
+					       u32 sec,
+					       u32 n_sec,
+					       void *p_data));
 #endif /* _ROCKCHIP_VENDOR_ */
diff --git a/arch/arm/mach-rockchip/vendor.c b/arch/arm/mach-rockchip/vendor.c
index db17a61375..d305bdcd7d 100644
--- a/arch/arm/mach-rockchip/vendor.c
+++ b/arch/arm/mach-rockchip/vendor.c
@@ -12,6 +12,7 @@
 /* tag for vendor check */
 #define VENDOR_TAG		0x524B5644
 /* The Vendor partition contains the number of Vendor blocks */
+#define NAND_VENDOR_PART_NUM	2
 #define VENDOR_PART_NUM		4
 /* align to 64 bytes */
 #define VENDOR_BTYE_ALIGN	0x3F
@@ -28,7 +29,18 @@
 /* The maximum number of items in each Vendor block */
 #define EMMC_VENDOR_ITEM_NUM		126
 
-/* --- Spi/Spi Nand/SLC/MLC define --- */
+/* --- Spi Nand/SLC/MLC large capacity case define --- */
+/* The Vendor partition contains the number of Vendor blocks */
+#define NAND_VENDOR_PART_OFFSET		0
+/*
+ * The number of memory blocks used by each
+ * Vendor structure(8 * 512B = 4KB)
+ */
+#define NAND_VENDOR_PART_BLKS		128
+/* The maximum number of items in each Vendor block */
+#define NAND_VENDOR_ITEM_NUM		126
+
+/* --- Spi/Spi Nand/SLC/MLC small capacity case define --- */
 /* The Vendor partition contains the number of Vendor blocks */
 #define	FLASH_VENDOR_PART_OFFSET	8
 /*
@@ -69,6 +81,7 @@ struct vendor_info {
 	u32 *hash;
 	u32 *version2;
 };
+
 /*
  * Calculate the offset of each field for emmc.
  * Emmc vendor info size: 64KB
@@ -77,12 +90,22 @@ struct vendor_info {
 #define EMMC_VENDOR_DATA_OFFSET	(sizeof(struct vendor_hdr) + EMMC_VENDOR_ITEM_NUM * sizeof(struct vendor_item))
 #define EMMC_VENDOR_HASH_OFFSET (EMMC_VENDOR_INFO_SIZE - 8)
 #define EMMC_VENDOR_VERSION2_OFFSET (EMMC_VENDOR_INFO_SIZE - 4)
+
+/*
+ * Calculate the offset of each field for spi nand/slc/mlc large capacity case.
+ * Flash vendor info size: 4KB
+ */
+#define NAND_VENDOR_INFO_SIZE	(NAND_VENDOR_PART_BLKS * VENDOR_BLOCK_SIZE)
+#define NAND_VENDOR_DATA_OFFSET	(sizeof(struct vendor_hdr) + NAND_VENDOR_ITEM_NUM * sizeof(struct vendor_item))
+#define NAND_VENDOR_HASH_OFFSET (NAND_VENDOR_INFO_SIZE - 8)
+#define NAND_VENDOR_VERSION2_OFFSET (NAND_VENDOR_INFO_SIZE - 4)
+
 /*
- * Calculate the offset of each field for spi nor/spi nand/slc/mlc.
+ * Calculate the offset of each field for spi nor/spi nand/slc/mlc large small capacity case.
  * Flash vendor info size: 4KB
  */
 #define FLASH_VENDOR_INFO_SIZE	(FLASH_VENDOR_PART_BLKS * VENDOR_BLOCK_SIZE)
-#define FLASH_VENDOR_DATA_OFFSET	(sizeof(struct vendor_hdr) + FLASH_VENDOR_ITEM_NUM * sizeof(struct vendor_item))
+#define FLASH_VENDOR_DATA_OFFSET (sizeof(struct vendor_hdr) + FLASH_VENDOR_ITEM_NUM * sizeof(struct vendor_item))
 #define FLASH_VENDOR_HASH_OFFSET (FLASH_VENDOR_INFO_SIZE - 8)
 #define FLASH_VENDOR_VERSION2_OFFSET (FLASH_VENDOR_INFO_SIZE - 4)
 
@@ -91,6 +114,34 @@ static struct vendor_info vendor_info;
 /* The storage type of the device */
 static int bootdev_type;
 
+/* vendor private read write ops*/
+static	int (*_flash_read)(struct blk_desc *dev_desc,
+			   u32 sec,
+			   u32 n_sec,
+			   void *buffer);
+static	int (*_flash_write)(struct blk_desc *dev_desc,
+			    u32 sec,
+			    u32 n_sec,
+			    void *buffer);
+
+int flash_vendor_dev_ops_register(int (*read)(struct blk_desc *dev_desc,
+					      u32 sec,
+					      u32 n_sec,
+					      void *p_data),
+				  int (*write)(struct blk_desc *dev_desc,
+					       u32 sec,
+					       u32 n_sec,
+					       void *p_data))
+{
+	if (!_flash_read) {
+		_flash_read = read;
+		_flash_write = write;
+		return 0;
+	}
+
+	return -EPERM;
+}
+
 /**********************************************************/
 /*              vendor API implementation                 */
 /**********************************************************/
@@ -111,7 +162,7 @@ static int vendor_ops(u8 *buffer, u32 addr, u32 n_sec, int write)
 		/*
 		 * The location of VendorStorage in Flash is shown in the
 		 * following figure. The starting address of the VendorStorage
-		 * partition is 3.5MB(EMMC_VENDOR_PART_OFFSET*BLOCK_SIZE(512)),
+		 * partition offset is 3.5MB(EMMC_VENDOR_PART_OFFSET*BLOCK_SIZE(512)),
 		 * and the partition size is 256KB.
 		 * ----------------------------------------------------
 		 * |   3.5MB    |  VendorStorage  |                   |
@@ -121,12 +172,24 @@ static int vendor_ops(u8 *buffer, u32 addr, u32 n_sec, int write)
 		debug("[Vendor INFO]:VendorStorage offset address=0x%x\n", lba);
 		break;
 	case IF_TYPE_RKNAND:
-	case IF_TYPE_SPINOR:
 	case IF_TYPE_SPINAND:
 		/*
 		 * The location of VendorStorage in Flash is shown in the
 		 * following figure. The starting address of the VendorStorage
-		 * partition is 4KB (FLASH_VENDOR_PART_OFFSET * BLOCK_SIZE),
+		 * partition offset is 0KB in FTL vendor block,
+		 * and the partition size is 128KB.
+		 * ----------------------------------------------------
+		 * |  VendorStorage  |                     |
+		 * ----------------------------------------------------
+		 */
+		lba = NAND_VENDOR_PART_OFFSET;
+		debug("[Vendor INFO]:VendorStorage offset address=0x%x\n", lba);
+		break;
+	case IF_TYPE_SPINOR:
+		/*
+		 * The location of VendorStorage in Flash is shown in the
+		 * following figure. The starting address of the VendorStorage
+		 * partition offset is 4KB (FLASH_VENDOR_PART_OFFSET * BLOCK_SIZE),
 		 * and the partition size is 16KB.
 		 * ----------------------------------------------------
 		 * |   4KB    |  VendorStorage  |                     |
@@ -139,10 +202,18 @@ static int vendor_ops(u8 *buffer, u32 addr, u32 n_sec, int write)
 		printf("[Vendor ERROR]:Boot device type is invalid!\n");
 		return -ENODEV;
 	}
-	if (write)
-		ret = blk_dwrite(dev_desc, lba + addr, n_sec, buffer);
-	else
-		ret = blk_dread(dev_desc, lba + addr, n_sec, buffer);
+	if (write) {
+		if (_flash_write)
+			ret = _flash_write(dev_desc, lba + addr, n_sec, buffer);
+		else
+			ret = blk_dwrite(dev_desc, lba + addr, n_sec, buffer);
+	} else {
+		if (_flash_read)
+			ret = _flash_read(dev_desc, lba + addr, n_sec, buffer);
+		else
+			ret = blk_dread(dev_desc, lba + addr, n_sec, buffer);
+	}
+
 	debug("[Vendor INFO]:op=%s, ret=%d\n", write ? "write" : "read", ret);
 
 	return ret;
@@ -171,7 +242,7 @@ int vendor_storage_init(void)
 	u32 size, i;
 	u32 max_ver = 0;
 	u32 max_index = 0;
-	u16 data_offset, hash_offset;
+	u16 data_offset, hash_offset, part_num;
 	u16 version2_offset, part_size;
 	struct blk_desc *dev_desc;
 
@@ -189,15 +260,24 @@ int vendor_storage_init(void)
 		data_offset = EMMC_VENDOR_DATA_OFFSET;
 		hash_offset = EMMC_VENDOR_HASH_OFFSET;
 		version2_offset = EMMC_VENDOR_VERSION2_OFFSET;
+		part_num = VENDOR_PART_NUM;
 		break;
 	case IF_TYPE_RKNAND:
-	case IF_TYPE_SPINOR:
 	case IF_TYPE_SPINAND:
+		size = NAND_VENDOR_INFO_SIZE;
+		part_size = NAND_VENDOR_PART_BLKS;
+		data_offset = NAND_VENDOR_DATA_OFFSET;
+		hash_offset = NAND_VENDOR_HASH_OFFSET;
+		version2_offset = NAND_VENDOR_VERSION2_OFFSET;
+		part_num = NAND_VENDOR_PART_NUM;
+		break;
+	case IF_TYPE_SPINOR:
 		size = FLASH_VENDOR_INFO_SIZE;
 		part_size = FLASH_VENDOR_PART_BLKS;
 		data_offset = FLASH_VENDOR_DATA_OFFSET;
 		hash_offset = FLASH_VENDOR_HASH_OFFSET;
 		version2_offset = FLASH_VENDOR_VERSION2_OFFSET;
+		part_num = VENDOR_PART_NUM;
 		break;
 	default:
 		debug("[Vendor ERROR]:Boot device type is invalid!\n");
@@ -225,7 +305,7 @@ int vendor_storage_init(void)
 	vendor_info.version2 = (u32 *)(buffer + version2_offset);
 
 	/* Find valid and up-to-date one from (vendor0 - vendor3) */
-	for (i = 0; i < VENDOR_PART_NUM; i++) {
+	for (i = 0; i < part_num; i++) {
 		ret_size = vendor_ops((u8 *)vendor_info.hdr,
 				      part_size * i, part_size, 0);
 		if (ret_size != part_size) {
@@ -248,7 +328,7 @@ int vendor_storage_init(void)
 		 * Keep vendor_info the same as the largest
 		 * version of vendor
 		 */
-		if (max_index != (VENDOR_PART_NUM - 1)) {
+		if (max_index != (part_num - 1)) {
 			ret_size = vendor_ops((u8 *)vendor_info.hdr,
 					       part_size * max_index, part_size, 0);
 			if (ret_size != part_size) {
@@ -331,7 +411,7 @@ int vendor_storage_write(u16 id, void *pbuf, u16 size)
 	int cnt, ret = 0;
 	u32 i, next_index, align_size;
 	struct vendor_item *item;
-	u16 part_size, max_item_num, offset;
+	u16 part_size, max_item_num, offset, part_num;
 
 	/* init vendor storage */
 	if (!bootdev_type) {
@@ -344,12 +424,18 @@ int vendor_storage_write(u16 id, void *pbuf, u16 size)
 	case IF_TYPE_MMC:
 		part_size = EMMC_VENDOR_PART_BLKS;
 		max_item_num = EMMC_VENDOR_ITEM_NUM;
+		part_num = VENDOR_PART_NUM;
 		break;
 	case IF_TYPE_RKNAND:
-	case IF_TYPE_SPINOR:
 	case IF_TYPE_SPINAND:
+		part_size = NAND_VENDOR_PART_BLKS;
+		max_item_num = NAND_VENDOR_ITEM_NUM;
+		part_num = NAND_VENDOR_PART_NUM;
+		break;
+	case IF_TYPE_SPINOR:
 		part_size = FLASH_VENDOR_PART_BLKS;
 		max_item_num = FLASH_VENDOR_ITEM_NUM;
+		part_num = VENDOR_PART_NUM;
 		break;
 	default:
 		ret = -ENODEV;
@@ -376,7 +462,7 @@ int vendor_storage_write(u16 id, void *pbuf, u16 size)
 			vendor_info.hdr->version++;
 			*(vendor_info.version2) = vendor_info.hdr->version;
 			vendor_info.hdr->next_index++;
-			if (vendor_info.hdr->next_index >= VENDOR_PART_NUM)
+			if (vendor_info.hdr->next_index >= part_num)
 				vendor_info.hdr->next_index = 0;
 			cnt = vendor_ops((u8 *)vendor_info.hdr, part_size * next_index, part_size, 1);
 			return (cnt == part_size) ? size : -EIO;
@@ -401,7 +487,7 @@ int vendor_storage_write(u16 id, void *pbuf, u16 size)
 		vendor_info.hdr->version++;
 		vendor_info.hdr->next_index++;
 		*(vendor_info.version2) = vendor_info.hdr->version;
-		if (vendor_info.hdr->next_index >= VENDOR_PART_NUM)
+		if (vendor_info.hdr->next_index >= part_num)
 			vendor_info.hdr->next_index = 0;
 
 		cnt = vendor_ops((u8 *)vendor_info.hdr, part_size * next_index, part_size, 1);
@@ -418,19 +504,25 @@ int vendor_storage_write(u16 id, void *pbuf, u16 size)
 /* Reset the vendor storage space to the initial state */
 static void vendor_test_reset(void)
 {
-	u16 i, part_size;
+	u16 i, part_size, part_num;
 	u32 size;
 
 	switch (bootdev_type) {
 	case IF_TYPE_MMC:
 		size = EMMC_VENDOR_INFO_SIZE;
 		part_size = EMMC_VENDOR_PART_BLKS;
+		part_num = VENDOR_PART_NUM;
 		break;
 	case IF_TYPE_RKNAND:
-	case IF_TYPE_SPINOR:
 	case IF_TYPE_SPINAND:
+		size = NAND_VENDOR_INFO_SIZE;
+		part_size = NAND_VENDOR_PART_BLKS;
+		part_num = NAND_VENDOR_PART_NUM;
+		break;
+	case IF_TYPE_SPINOR:
 		size = FLASH_VENDOR_INFO_SIZE;
 		part_size = FLASH_VENDOR_PART_BLKS;
+		part_num = VENDOR_PART_NUM;
 		break;
 	default:
 		size = 0;
@@ -449,7 +541,7 @@ static void vendor_test_reset(void)
 				     (unsigned long)vendor_info.data;
 	*(vendor_info.version2) = vendor_info.hdr->version;
 	/* write to flash. */
-	for (i = 0; i < VENDOR_PART_NUM; i++)
+	for (i = 0; i < part_num; i++)
 		vendor_ops((u8 *)vendor_info.hdr, part_size * i, part_size, 1);
 }
 
@@ -488,8 +580,13 @@ int vendor_storage_test(void)
 		size = total_size/item_num;
 		break;
 	case IF_TYPE_RKNAND:
-	case IF_TYPE_SPINOR:
 	case IF_TYPE_SPINAND:
+		item_num = NAND_VENDOR_ITEM_NUM;
+		total_size = (unsigned long)vendor_info.hash -
+			     (unsigned long)vendor_info.data;
+		size = total_size/item_num;
+		break;
+	case IF_TYPE_SPINOR:
 		item_num = FLASH_VENDOR_ITEM_NUM;
 		total_size = (unsigned long)vendor_info.hash -
 			     (unsigned long)vendor_info.data;
@@ -618,7 +715,7 @@ int vendor_storage_test(void)
 	printf("[Vendor Test]:item_num=%d, size=%d.\n", item_num, size);
 
 	vendor_test_reset();
-	for (id = 0; id <= item_num; id++) {
+	for (id = 0; id < item_num; id++) {
 		memset(buffer, id, size);
 		ret = vendor_storage_write(id, buffer, size);
 		if (ret < 0) {

commit bb2992fad02314a8eb3264ff49f4fbdc37bf96e3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Aug 14 20:37:46 2018 +0800

    rockchip: board: lower the charge animation failed info
    
    Change-Id: Ibb09da0fbf5e13fcaadf0a54ce7932958600fd2f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 233f0b6f9a..29c3409005 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -115,7 +115,7 @@ static int charge_display(void)
 	ret = uclass_get_device(UCLASS_CHARGE_DISPLAY, 0, &dev);
 	if (ret) {
 		if (ret != -ENODEV) {
-			printf("Get UCLASS CHARGE DISPLAY failed: %d\n", ret);
+			debug("Get UCLASS CHARGE DISPLAY failed: %d\n", ret);
 			return ret;
 		} else {
 			debug("Can't find charge display driver\n");

commit 14a3ce4514eebf8f1ad4b9f430193b0937573796
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Aug 14 20:36:30 2018 +0800

    fuel gauge: rk816: print charge type
    
    Change-Id: Ieafcd6dfefce1419e4df7e52882c8a882b53adcc
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk816.c b/drivers/power/fuel_gauge/fg_rk816.c
index 84e1ee46f8..aa601ee39d 100644
--- a/drivers/power/fuel_gauge/fg_rk816.c
+++ b/drivers/power/fuel_gauge/fg_rk816.c
@@ -183,6 +183,14 @@ enum dc_type {
 	DC_TYPE_OF_ADC,
 };
 
+static const char *charger_type_to_name[] = {
+	"NONE",
+	"USB",
+	"AC",
+	"DC",
+	"UNKN",
+};
+
 static const u32 CHRG_VOL_SEL[] = {
 	4050, 4100, 4150, 4200, 4250, 4300, 4350
 };
@@ -990,7 +998,9 @@ static int rk816_fg_init(struct battery_priv *di)
 	di->pwr_vol = di->voltage_avg;
 	rk816_bat_charger_setting(di, di->chrg_type);
 
-	printf("Battery: soc=%d%%, voltage=%dmv\n", di->dsoc, di->voltage_avg);
+	printf("Battery: soc=%d%%, voltage=%dmv, Charger: %s%s\n",
+	       di->dsoc, di->voltage_avg, charger_type_to_name[di->chrg_type],
+	       di->virtual_power ? "(virtual)" : "");
 
 	return 0;
 }

commit 31ab5b3ba0b944fab357d8ce95757675e78390fe
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Aug 14 20:35:45 2018 +0800

    power: charge animation: lower the print info
    
    Change-Id: If6f597f3cf1d6da67f14f8a598f5a50e14fb798f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index fef2bd6584..bd89383405 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -661,24 +661,23 @@ static int charge_animation_probe(struct udevice *dev)
 	ret = uclass_get_device(UCLASS_FG, 0, &fg);
 	if (ret) {
 		if (ret == -ENODEV)
-			printf("Can't find FG\n");
+			debug("Can't find FG\n");
 		else
-			printf("Get UCLASS FG failed: %d\n", ret);
+			debug("Get UCLASS FG failed: %d\n", ret);
 		return ret;
 	}
 	priv->fg = fg;
 
 	/* Get PWRKEY: used for wakeup and turn off/on LCD */
-	ret = key_read(KEY_POWER);
-	if (ret == KEY_NOT_EXIST) {
-		printf("Can't find power key\n");
+	if (key_read(KEY_POWER) == KEY_NOT_EXIST) {
+		debug("Can't find power key\n");
 		return -EINVAL;
 	}
 
 	/* Initialize charge current */
 	soc = fuel_gauge_get_soc(fg);
 	if (soc < 0 || soc > 100) {
-		printf("get soc failed: %d\n", soc);
+		debug("get soc failed: %d\n", soc);
 		return -EINVAL;
 	}
 

commit ac5a8f08e811581376e731c898c21e4f79177ec2
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Mon Aug 13 17:21:47 2018 +0800

    rockchip: rk3128h: Fix AVB2.0 boot failure for Android P GSI
    
    Generic System Image (GSI) for Android P use the vbmeta without
    the "Authentication data" and "Auxiliary data" block, in this case
    just load the entire partition. This led to a malloc fail in libavb.
    This increase malloc pool len.
    
    GSI vbmeta image info:
    avbtool info_image --image vbmeta.img
    Minimum libavb version:   1.0
    Header Block:             256 bytes
    Authentication Block:     0 bytes
    Auxiliary Block:          0 bytes
    Algorithm:                NONE
    Rollback Index:           0
    Flags:                    2
    Release String:           'avbtool 1.1.0'
    Descriptors:
        (none)
    
    This fixes boot failure seen on rk3128h target: avb_util.c:199:
    ERROR: Failed to allocate memory.
    
    Change-Id: I148f60774916eca4c5e326385c733535633a6c75
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h
index 3d98be4e32..1230d4331a 100644
--- a/include/configs/rk322x_common.h
+++ b/include/configs/rk322x_common.h
@@ -10,7 +10,7 @@
 #include "rockchip-common.h"
 
 #define CONFIG_SKIP_LOWLEVEL_INIT
-#define CONFIG_SYS_MALLOC_LEN		(32 << 20)
+#define CONFIG_SYS_MALLOC_LEN		(128 << 20)
 #define CONFIG_SYS_CBSIZE		2048
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/*  64M */
 

commit 9c6baab84ba292afd372cbc281025695639deedd
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Mon Aug 13 17:05:34 2018 +0800

    configs: rk3128x_defconfig: enable AVB2.0
    
    Change-Id: Ic0bb820807384c9c04a27bb9051562e4f0ae2171
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/configs/rk3128x_defconfig b/configs/rk3128x_defconfig
index 11c6dd9406..baa869aa2a 100644
--- a/configs/rk3128x_defconfig
+++ b/configs/rk3128x_defconfig
@@ -24,6 +24,7 @@ CONFIG_SPL_FIT_SOURCE="arch/arm/mach-rockchip/fit_spl_optee.its"
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_ANDROID_AVB=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
 CONFIG_TPL_SYS_MALLOC_SIMPLE=y
@@ -112,6 +113,11 @@ CONFIG_SPL_TINY_MEMSET=y
 CONFIG_TPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
 CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_AVB_LIBAVB=y
+CONFIG_AVB_LIBAVB_AB=y
+CONFIG_AVB_LIBAVB_ATX=y
+CONFIG_AVB_LIBAVB_USER=y
+CONFIG_RK_AVB_LIBAVB_USER=y
 CONFIG_OPTEE_CLIENT=y
 CONFIG_OPTEE_V1=y
 CONFIG_TEST_ROCKCHIP=y

commit f03c827ad6f1e04e56faa4e798199d575d7c6fe2
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Mon Aug 13 15:43:12 2018 +0800

    configs: rk3128x_defconfig: enable CONFIG_OPTEE_(CLIENT|V1)
    
    Change-Id: I8fd157a50f9cd395d840af6ffee5ebd19d4dbb64
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/configs/rk3128x_defconfig b/configs/rk3128x_defconfig
index 0eb3ab4916..11c6dd9406 100644
--- a/configs/rk3128x_defconfig
+++ b/configs/rk3128x_defconfig
@@ -112,4 +112,6 @@ CONFIG_SPL_TINY_MEMSET=y
 CONFIG_TPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
 CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V1=y
 CONFIG_TEST_ROCKCHIP=y

commit c798cdd16945c6d02aa9922b6df96646bd1c6281
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Wed Aug 1 18:15:35 2018 +0800

    drivers: rknand: support bootloader upgraged
    
    The boot loader image write to lba 0x40, the nand driver
    will copy to the the reserved blocks for bootrom.
    
    Change-Id: I7517818b39032bc8ff16cbb4a9e9342f95306181
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/drivers/rknand/rk_ftl_arm_v7.S b/drivers/rknand/rk_ftl_arm_v7.S
index 0c63064f76..ebf23e322e 100644
--- a/drivers/rknand/rk_ftl_arm_v7.S
+++ b/drivers/rknand/rk_ftl_arm_v7.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2018-02-08
+ * date: 2018-08-10
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -18,9 +18,6 @@
 	.eabi_attribute 34, 0
 	.eabi_attribute 18, 2
 	.file	"rk_ftl_arm_v7.c"
-	.text
-.Ltext0:
-	.cfi_sections	.debug_frame
 	.section	.text.ftl_set_blk_mode.part.10,"ax",%progbits
 	.align	1
 	.syntax unified
@@ -29,19 +26,12 @@
 	.fpu softvfp
 	.type	ftl_set_blk_mode.part.10, %function
 ftl_set_blk_mode.part.10:
-.LFB507:
-	.file 1 "drivers/rknand/rkftl/FtlSysBlk.c"
-	.loc 1 1501 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL0:
-	.loc 1 1504 0
 	ldr	r3, .L2
 	lsrs	r1, r0, #5
 	and	r0, r0, #31
-.LVL1:
 	ldr	r2, [r3]
 	movs	r3, #1
 	lsl	r0, r3, r0
@@ -53,8 +43,6 @@ ftl_set_blk_mode.part.10:
 	.align	2
 .L2:
 	.word	.LANCHOR0
-	.cfi_endproc
-.LFE507:
 	.size	ftl_set_blk_mode.part.10, .-ftl_set_blk_mode.part.10
 	.section	.text.FlashMemCmp8,"ax",%progbits
 	.align	1
@@ -65,61 +53,35 @@ ftl_set_blk_mode.part.10:
 	.fpu softvfp
 	.type	FlashMemCmp8, %function
 FlashMemCmp8:
-.LFB203:
-	.file 2 "drivers/rknand/rkftl/flash.c"
-	.loc 2 205 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2:
-	.loc 2 208 0
 	ldr	r3, .L12
-	.loc 2 205 0
 	push	{r4, r5, lr}
-	.cfi_def_cfa_offset 12
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 2 208 0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cbz	r3, .L7
-	.loc 2 209 0
 	ldrb	r4, [r0, #1]	@ zero_extendqisi2
 	ldrb	r3, [r1, #1]	@ zero_extendqisi2
 	cmp	r4, r3
 	beq	.L11
 	movs	r3, #0
 .L7:
-.LVL3:
-	.loc 2 212 0 discriminator 1
 	cmp	r3, r2
 	bne	.L9
-.LVL4:
 .L11:
-	.loc 2 210 0
 	movs	r0, #0
-.LVL5:
-	.loc 2 217 0
 	pop	{r4, r5, pc}
-.LVL6:
 .L9:
-	.loc 2 213 0
 	ldrb	r5, [r0, r3]	@ zero_extendqisi2
 	ldrb	r4, [r1, r3]	@ zero_extendqisi2
 	adds	r3, r3, #1
-.LVL7:
 	cmp	r5, r4
 	beq	.L7
-	.loc 2 214 0
 	mov	r0, r3
-.LVL8:
 	pop	{r4, r5, pc}
 .L13:
 	.align	2
 .L12:
 	.word	.LANCHOR1
-	.cfi_endproc
-.LFE203:
 	.size	FlashMemCmp8, .-FlashMemCmp8
 	.section	.text.FlashRsvdBlkChk,"ax",%progbits
 	.align	1
@@ -130,14 +92,9 @@ FlashMemCmp8:
 	.fpu softvfp
 	.type	FlashRsvdBlkChk, %function
 FlashRsvdBlkChk:
-.LFB204:
-	.loc 2 239 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL9:
-	.loc 2 240 0
 	ldr	r3, .L17
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	ldr	r3, .L17+4
@@ -145,25 +102,18 @@ FlashRsvdBlkChk:
 	muls	r3, r2, r3
 	cmp	r3, r1
 	bls	.L16
-	.loc 2 240 0 is_stmt 0 discriminator 1
 	adds	r0, r0, #0
-.LVL10:
 	it	ne
 	movne	r0, #1
 	bx	lr
-.LVL11:
 .L16:
 	movs	r0, #1
-.LVL12:
-	.loc 2 244 0 is_stmt 1
 	bx	lr
 .L18:
 	.align	2
 .L17:
 	.word	.LANCHOR2
 	.word	.LANCHOR3
-	.cfi_endproc
-.LFE204:
 	.size	FlashRsvdBlkChk, .-FlashRsvdBlkChk
 	.section	.text.FlashGetRandomizer,"ax",%progbits
 	.align	1
@@ -174,46 +124,26 @@ FlashRsvdBlkChk:
 	.fpu softvfp
 	.type	FlashGetRandomizer, %function
 FlashGetRandomizer:
-.LFB205:
-	.loc 2 247 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL13:
-	.loc 2 250 0
 	ldr	r3, .L27
 	and	r2, r1, #127
-	.loc 2 247 0
 	push	{r4, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 4, -8
-	.cfi_offset 14, -4
-	.loc 2 250 0
 	ldrh	r4, [r3, r2, lsl #1]
-.LVL14:
-	.loc 2 251 0
 	ldr	r3, .L27+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cbz	r3, .L19
-	.loc 2 251 0 is_stmt 0 discriminator 1
 	bl	FlashRsvdBlkChk
-.LVL15:
 	cbz	r0, .L19
-	.loc 2 252 0 is_stmt 1
 	orr	r4, r4, #-1073741824
-.LVL16:
 .L19:
-	.loc 2 254 0
 	mov	r0, r4
 	pop	{r4, pc}
-.LVL17:
 .L28:
 	.align	2
 .L27:
 	.word	.LANCHOR4
 	.word	.LANCHOR5
-	.cfi_endproc
-.LFE205:
 	.size	FlashGetRandomizer, .-FlashGetRandomizer
 	.section	.text.FlashSetRandomizer,"ax",%progbits
 	.align	1
@@ -224,60 +154,30 @@ FlashGetRandomizer:
 	.fpu softvfp
 	.type	FlashSetRandomizer, %function
 FlashSetRandomizer:
-.LFB206:
-	.loc 2 257 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL18:
 	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 2 260 0
 	and	r2, r1, #127
 	ldr	r3, .L37
-	.loc 2 257 0
 	mov	r5, r0
-	.loc 2 260 0
 	ldrh	r4, [r3, r2, lsl #1]
-.LVL19:
-	.loc 2 261 0
 	ldr	r3, .L37+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cbz	r3, .L30
-	.loc 2 261 0 is_stmt 0 discriminator 1
 	bl	FlashRsvdBlkChk
-.LVL20:
 	cbz	r0, .L30
-	.loc 2 262 0 is_stmt 1
 	orr	r4, r4, #-1073741824
-.LVL21:
 .L30:
-.LBB134:
-.LBB135:
-	.file 3 "drivers/rknand/rkftl/nandc.c"
-	.loc 3 343 0
 	ldr	r3, .L37+8
 	ldr	r3, [r3, r5, lsl #3]
-.LVL22:
-	.loc 3 344 0
 	str	r4, [r3, #336]
-.LVL23:
 	pop	{r3, r4, r5, pc}
-.LVL24:
 .L38:
 	.align	2
 .L37:
 	.word	.LANCHOR4
 	.word	.LANCHOR5
 	.word	.LANCHOR6
-.LBE135:
-.LBE134:
-	.cfi_endproc
-.LFE206:
 	.size	FlashSetRandomizer, .-FlashSetRandomizer
 	.section	.text.FlashReadCmd,"ax",%progbits
 	.align	1
@@ -288,64 +188,33 @@ FlashSetRandomizer:
 	.fpu softvfp
 	.type	FlashReadCmd, %function
 FlashReadCmd:
-.LFB211:
-	.loc 2 322 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL25:
 	push	{r4, r5}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 4, -8
-	.cfi_offset 5, -4
-	.loc 2 330 0
 	lsrs	r2, r1, #16
-.LBB136:
-.LBB137:
-	.loc 3 123 0
 	ldr	r4, .L40
 	ldr	r3, [r4, r0, lsl #3]
-.LVL26:
-	.loc 3 124 0
 	add	r4, r4, r0, lsl #3
 	ldrb	r4, [r4, #4]	@ zero_extendqisi2
-.LVL27:
-.LBE137:
-.LBE136:
-	.loc 2 325 0
 	add	r3, r3, r4, lsl #8
 	movs	r4, #0
 	str	r4, [r3, #2056]
-	.loc 2 326 0
 	str	r4, [r3, #2052]
-	.loc 2 327 0
 	str	r4, [r3, #2052]
-	.loc 2 328 0
 	uxtb	r4, r1
 	str	r4, [r3, #2052]
-	.loc 2 329 0
 	lsrs	r4, r1, #8
 	str	r4, [r3, #2052]
-	.loc 2 330 0
 	str	r2, [r3, #2052]
-	.loc 2 331 0
 	movs	r2, #48
 	str	r2, [r3, #2056]
-	.loc 2 333 0
 	pop	{r4, r5}
-	.cfi_restore 5
-	.cfi_restore 4
-	.cfi_def_cfa_offset 0
-	.loc 2 332 0
 	b	FlashSetRandomizer
-.LVL28:
 .L41:
 	.align	2
 .L40:
 	.word	.LANCHOR6
-	.cfi_endproc
-.LFE211:
 	.size	FlashReadCmd, .-FlashReadCmd
 	.section	.text.FlashReadDpDataOutCmd,"ax",%progbits
 	.align	1
@@ -356,98 +225,47 @@ FlashReadCmd:
 	.fpu softvfp
 	.type	FlashReadDpDataOutCmd, %function
 FlashReadDpDataOutCmd:
-.LFB212:
-	.loc 2 336 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL29:
-.LBB138:
-.LBB139:
-	.loc 3 123 0
 	ldr	r2, .L46
-.LBE139:
-.LBE138:
-	.loc 2 336 0
 	push	{r4, r5, r6}
-	.cfi_def_cfa_offset 12
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 6, -4
 	uxtb	r6, r1
-	.loc 2 340 0
 	ldr	r4, .L46+4
 	lsrs	r5, r1, #8
-.LBB141:
-.LBB140:
-	.loc 3 123 0
 	ldr	r3, [r2, r0, lsl #3]
-.LVL30:
-	.loc 3 124 0
 	add	r2, r2, r0, lsl #3
-.LBE140:
-.LBE141:
-	.loc 2 340 0
 	ldrb	r4, [r4, #16]	@ zero_extendqisi2
 	ldrb	r2, [r2, #4]	@ zero_extendqisi2
-.LVL31:
 	cmp	r4, #1
 	lsr	r4, r1, #16
 	lsl	r2, r2, #8
-	.loc 2 341 0
 	add	r3, r3, r2
-	.loc 2 340 0
 	bne	.L43
-	.loc 2 341 0
 	movs	r2, #6
 	str	r2, [r3, #2056]
-	.loc 2 342 0
 	movs	r2, #0
 	str	r2, [r3, #2052]
-	.loc 2 343 0
 	str	r2, [r3, #2052]
-	.loc 2 344 0
 	str	r6, [r3, #2052]
-	.loc 2 345 0
 	str	r5, [r3, #2052]
-	.loc 2 346 0
 	str	r4, [r3, #2052]
 .L45:
-	.loc 2 358 0
 	movs	r2, #224
 	str	r2, [r3, #2056]
-	.loc 2 361 0
 	pop	{r4, r5, r6}
-	.cfi_remember_state
-	.cfi_restore 6
-	.cfi_restore 5
-	.cfi_restore 4
-	.cfi_def_cfa_offset 0
-	.loc 2 360 0
 	b	FlashSetRandomizer
-.LVL32:
 .L43:
-	.cfi_restore_state
-	.loc 2 349 0
 	movs	r2, #0
 	str	r2, [r3, #2056]
-	.loc 2 350 0
 	str	r2, [r3, #2052]
-	.loc 2 351 0
 	str	r2, [r3, #2052]
-	.loc 2 352 0
 	str	r6, [r3, #2052]
-	.loc 2 353 0
 	str	r5, [r3, #2052]
-	.loc 2 354 0
 	str	r4, [r3, #2052]
-	.loc 2 355 0
 	movs	r4, #5
 	str	r4, [r3, #2056]
-	.loc 2 356 0
 	str	r2, [r3, #2052]
-	.loc 2 357 0
 	str	r2, [r3, #2052]
 	b	.L45
 .L47:
@@ -455,8 +273,6 @@ FlashReadDpDataOutCmd:
 .L46:
 	.word	.LANCHOR6
 	.word	.LANCHOR7
-	.cfi_endproc
-.LFE212:
 	.size	FlashReadDpDataOutCmd, .-FlashReadDpDataOutCmd
 	.section	.text.flash_enter_slc_mode,"ax",%progbits
 	.align	1
@@ -467,38 +283,19 @@ FlashReadDpDataOutCmd:
 	.fpu softvfp
 	.type	flash_enter_slc_mode, %function
 flash_enter_slc_mode:
-.LFB214:
-	.loc 2 399 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL33:
-	.loc 2 401 0
 	ldr	r3, .L53
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cbz	r3, .L48
-.LVL34:
-.LBB146:
-.LBB147:
-.LBB148:
-.LBB149:
-	.loc 3 123 0
 	ldr	r3, .L53+4
 	ldr	r2, [r3, r0, lsl #3]
-.LVL35:
-	.loc 3 124 0
 	add	r3, r3, r0, lsl #3
-	.loc 3 126 0
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-.LVL36:
-.LBE149:
-.LBE148:
-	.loc 2 403 0
 	add	r3, r2, r3, lsl #8
 	movs	r2, #218
 	str	r2, [r3, #2056]
-.LVL37:
 .L48:
 	bx	lr
 .L54:
@@ -506,10 +303,6 @@ flash_enter_slc_mode:
 .L53:
 	.word	.LANCHOR8
 	.word	.LANCHOR6
-.LBE147:
-.LBE146:
-	.cfi_endproc
-.LFE214:
 	.size	flash_enter_slc_mode, .-flash_enter_slc_mode
 	.section	.text.flash_exit_slc_mode,"ax",%progbits
 	.align	1
@@ -520,38 +313,19 @@ flash_enter_slc_mode:
 	.fpu softvfp
 	.type	flash_exit_slc_mode, %function
 flash_exit_slc_mode:
-.LFB215:
-	.loc 2 408 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL38:
-	.loc 2 410 0
 	ldr	r3, .L60
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cbz	r3, .L55
-.LVL39:
-.LBB154:
-.LBB155:
-.LBB156:
-.LBB157:
-	.loc 3 123 0
 	ldr	r3, .L60+4
 	ldr	r2, [r3, r0, lsl #3]
-.LVL40:
-	.loc 3 124 0
 	add	r3, r3, r0, lsl #3
-	.loc 3 126 0
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-.LVL41:
-.LBE157:
-.LBE156:
-	.loc 2 412 0
 	add	r3, r2, r3, lsl #8
 	movs	r2, #223
 	str	r2, [r3, #2056]
-.LVL42:
 .L55:
 	bx	lr
 .L61:
@@ -559,10 +333,6 @@ flash_exit_slc_mode:
 .L60:
 	.word	.LANCHOR8
 	.word	.LANCHOR6
-.LBE155:
-.LBE154:
-	.cfi_endproc
-.LFE215:
 	.size	flash_exit_slc_mode, .-flash_exit_slc_mode
 	.section	.text.FlashProgFirstCmd,"ax",%progbits
 	.align	1
@@ -573,62 +343,32 @@ flash_exit_slc_mode:
 	.fpu softvfp
 	.type	FlashProgFirstCmd, %function
 FlashProgFirstCmd:
-.LFB216:
-	.loc 2 417 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL43:
 	push	{r4, r5}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 4, -8
-	.cfi_offset 5, -4
-	.loc 2 426 0
 	lsrs	r2, r1, #16
-.LBB158:
-.LBB159:
-	.loc 3 123 0
 	ldr	r4, .L63
 	ldr	r3, [r4, r0, lsl #3]
-.LVL44:
-	.loc 3 124 0
 	add	r4, r4, r0, lsl #3
 	ldrb	r4, [r4, #4]	@ zero_extendqisi2
-.LVL45:
-.LBE159:
-.LBE158:
-	.loc 2 421 0
 	add	r3, r3, r4, lsl #8
 	movs	r4, #128
 	str	r4, [r3, #2056]
-	.loc 2 422 0
 	movs	r4, #0
 	str	r4, [r3, #2052]
-	.loc 2 423 0
 	str	r4, [r3, #2052]
-	.loc 2 424 0
 	uxtb	r4, r1
 	str	r4, [r3, #2052]
-	.loc 2 425 0
 	lsrs	r4, r1, #8
 	str	r4, [r3, #2052]
-	.loc 2 426 0
 	str	r2, [r3, #2052]
-	.loc 2 428 0
 	pop	{r4, r5}
-	.cfi_restore 5
-	.cfi_restore 4
-	.cfi_def_cfa_offset 0
-	.loc 2 427 0
 	b	FlashSetRandomizer
-.LVL46:
 .L64:
 	.align	2
 .L63:
 	.word	.LANCHOR6
-	.cfi_endproc
-.LFE216:
 	.size	FlashProgFirstCmd, .-FlashProgFirstCmd
 	.section	.text.FlashEraseCmd,"ax",%progbits
 	.align	1
@@ -639,70 +379,38 @@ FlashProgFirstCmd:
 	.fpu softvfp
 	.type	FlashEraseCmd, %function
 FlashEraseCmd:
-.LFB217:
-	.loc 2 431 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL47:
 	push	{r4, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 4, -8
-	.cfi_offset 14, -4
-.LBB160:
-.LBB161:
-	.loc 3 123 0
 	ldr	r4, .L70
 	ldr	r3, [r4, r0, lsl #3]
-.LVL48:
-	.loc 3 124 0
 	add	r4, r4, r0, lsl #3
 	ldrb	r0, [r4, #4]	@ zero_extendqisi2
-.LVL49:
 	lsls	r0, r0, #8
-.LBE161:
-.LBE160:
-	.loc 2 435 0
 	cbz	r2, .L66
-	.loc 2 436 0
 	adds	r2, r3, r0
-.LVL50:
 	movs	r4, #96
 	str	r4, [r2, #2056]
-	.loc 2 437 0
 	uxtb	r4, r1
 	str	r4, [r2, #2052]
-	.loc 2 438 0
 	lsrs	r4, r1, #8
 	str	r4, [r2, #2052]
-	.loc 2 439 0
 	lsrs	r4, r1, #16
 	str	r4, [r2, #2052]
-	.loc 2 440 0
 	ldr	r2, .L70+4
 	ldr	r2, [r2]
 	add	r1, r1, r2
-.LVL51:
 .L66:
-	.loc 2 442 0
 	add	r3, r3, r0
 	movs	r2, #96
 	str	r2, [r3, #2056]
-	.loc 2 443 0
 	uxtb	r2, r1
 	str	r2, [r3, #2052]
-	.loc 2 444 0
 	lsrs	r2, r1, #8
-	.loc 2 445 0
 	lsrs	r1, r1, #16
-.LVL52:
-	.loc 2 444 0
 	str	r2, [r3, #2052]
-	.loc 2 446 0
 	movs	r2, #208
-	.loc 2 445 0
 	str	r1, [r3, #2052]
-	.loc 2 446 0
 	str	r2, [r3, #2056]
 	pop	{r4, pc}
 .L71:
@@ -710,8 +418,6 @@ FlashEraseCmd:
 .L70:
 	.word	.LANCHOR6
 	.word	.LANCHOR3
-	.cfi_endproc
-.LFE217:
 	.size	FlashEraseCmd, .-FlashEraseCmd
 	.section	.text.FlashProgDpSecondCmd,"ax",%progbits
 	.align	1
@@ -722,64 +428,34 @@ FlashEraseCmd:
 	.fpu softvfp
 	.type	FlashProgDpSecondCmd, %function
 FlashProgDpSecondCmd:
-.LFB218:
-	.loc 2 450 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL53:
 	push	{r4, r5}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 4, -8
-	.cfi_offset 5, -4
-	.loc 2 459 0
 	lsrs	r2, r1, #16
-.LBB162:
-.LBB163:
-	.loc 3 123 0
 	ldr	r4, .L73
 	ldr	r3, [r4, r0, lsl #3]
-.LVL54:
-	.loc 3 124 0
 	add	r4, r4, r0, lsl #3
 	ldrb	r5, [r4, #4]	@ zero_extendqisi2
-.LVL55:
-.LBE163:
-.LBE162:
-	.loc 2 454 0
 	ldr	r4, .L73+4
 	ldrb	r4, [r4, #11]	@ zero_extendqisi2
 	add	r3, r3, r5, lsl #8
 	str	r4, [r3, #2056]
-	.loc 2 455 0
 	movs	r4, #0
 	str	r4, [r3, #2052]
-	.loc 2 456 0
 	str	r4, [r3, #2052]
-	.loc 2 457 0
 	uxtb	r4, r1
 	str	r4, [r3, #2052]
-	.loc 2 458 0
 	lsrs	r4, r1, #8
 	str	r4, [r3, #2052]
-	.loc 2 459 0
 	str	r2, [r3, #2052]
-	.loc 2 461 0
 	pop	{r4, r5}
-	.cfi_restore 5
-	.cfi_restore 4
-	.cfi_def_cfa_offset 0
-	.loc 2 460 0
 	b	FlashSetRandomizer
-.LVL56:
 .L74:
 	.align	2
 .L73:
 	.word	.LANCHOR6
 	.word	.LANCHOR7
-	.cfi_endproc
-.LFE218:
 	.size	FlashProgDpSecondCmd, .-FlashProgDpSecondCmd
 	.section	.text.FlashProgSecondCmd,"ax",%progbits
 	.align	1
@@ -790,27 +466,13 @@ FlashProgDpSecondCmd:
 	.fpu softvfp
 	.type	FlashProgSecondCmd, %function
 FlashProgSecondCmd:
-.LFB219:
-	.loc 2 464 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL57:
-.LBB164:
-.LBB165:
-	.loc 3 123 0
 	ldr	r3, .L76
 	ldr	r2, [r3, r0, lsl #3]
-.LVL58:
-	.loc 3 124 0
 	add	r3, r3, r0, lsl #3
-	.loc 3 126 0
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-.LVL59:
-.LBE165:
-.LBE164:
-	.loc 2 468 0
 	add	r3, r2, r3, lsl #8
 	movs	r2, #16
 	str	r2, [r3, #2056]
@@ -819,8 +481,6 @@ FlashProgSecondCmd:
 	.align	2
 .L76:
 	.word	.LANCHOR6
-	.cfi_endproc
-.LFE219:
 	.size	FlashProgSecondCmd, .-FlashProgSecondCmd
 	.section	.text.FlashProgDpFirstCmd,"ax",%progbits
 	.align	1
@@ -831,41 +491,15 @@ FlashProgSecondCmd:
 	.fpu softvfp
 	.type	FlashProgDpFirstCmd, %function
 FlashProgDpFirstCmd:
-.LFB220:
-	.loc 2 472 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL60:
-.LBB166:
-.LBB167:
-	.loc 3 123 0
 	ldr	r3, .L79
-.LBE167:
-.LBE166:
-	.loc 2 476 0
 	ldr	r1, .L79+4
-.LVL61:
-.LBB170:
-.LBB168:
-	.loc 3 123 0
 	ldr	r2, [r3, r0, lsl #3]
-.LVL62:
-	.loc 3 124 0
 	add	r3, r3, r0, lsl #3
-.LBE168:
-.LBE170:
-	.loc 2 476 0
 	ldrb	r1, [r1, #10]	@ zero_extendqisi2
-.LBB171:
-.LBB169:
-	.loc 3 126 0
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-.LVL63:
-.LBE169:
-.LBE171:
-	.loc 2 476 0
 	add	r3, r2, r3, lsl #8
 	str	r1, [r3, #2056]
 	bx	lr
@@ -874,8 +508,6 @@ FlashProgDpFirstCmd:
 .L79:
 	.word	.LANCHOR6
 	.word	.LANCHOR7
-	.cfi_endproc
-.LFE220:
 	.size	FlashProgDpFirstCmd, .-FlashProgDpFirstCmd
 	.section	.text.FlashReadStatus,"ax",%progbits
 	.align	1
@@ -886,69 +518,26 @@ FlashProgDpFirstCmd:
 	.fpu softvfp
 	.type	FlashReadStatus, %function
 FlashReadStatus:
-.LFB221:
-	.loc 2 480 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL64:
 	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 2 484 0
 	movs	r2, #112
-.LBB172:
-.LBB173:
-	.loc 3 123 0
 	ldr	r3, .L82
 	ldr	r5, [r3, r0, lsl #3]
-.LVL65:
-	.loc 3 124 0
 	add	r3, r3, r0, lsl #3
-.LBE173:
-.LBE172:
-.LBB175:
-.LBB176:
-	.loc 3 306 0
 	movs	r0, #80
-.LVL66:
-.LBE176:
-.LBE175:
-.LBB178:
-.LBB174:
-	.loc 3 126 0
 	ldrb	r4, [r3, #4]	@ zero_extendqisi2
-.LVL67:
-.LBE174:
-.LBE178:
-	.loc 2 484 0
 	add	r3, r5, r4, lsl #8
-	.loc 2 487 0
 	adds	r4, r4, #8
 	lsls	r4, r4, #8
-	.loc 2 484 0
 	str	r2, [r3, #2056]
-.LVL68:
-.LBB179:
-.LBB177:
-	.loc 3 306 0
 	bl	udelay
-.LVL69:
-.LBE177:
-.LBE179:
-	.loc 2 487 0
 	ldr	r0, [r5, r4]
-	.loc 2 488 0
 	pop	{r3, r4, r5, pc}
 .L83:
 	.align	2
 .L82:
 	.word	.LANCHOR6
-	.cfi_endproc
-.LFE221:
 	.size	FlashReadStatus, .-FlashReadStatus
 	.section	.text.JSHash,"ax",%progbits
 	.align	1
@@ -959,47 +548,27 @@ FlashReadStatus:
 	.fpu softvfp
 	.type	JSHash, %function
 JSHash:
-.LFB229:
-	.loc 2 800 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL70:
-	.loc 2 801 0
 	ldr	r3, .L87
 	add	r1, r1, r0
-.LVL71:
-	.loc 2 800 0
 	push	{r4, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 4, -8
-	.cfi_offset 14, -4
-.LVL72:
 .L85:
-	.loc 2 804 0 discriminator 1
 	cmp	r0, r1
 	bne	.L86
-	.loc 2 807 0
 	mov	r0, r3
-.LVL73:
 	pop	{r4, pc}
-.LVL74:
 .L86:
-	.loc 2 805 0 discriminator 3
 	lsrs	r2, r3, #2
 	ldrb	r4, [r0], #1	@ zero_extendqisi2
-.LVL75:
 	add	r2, r2, r3, lsl #5
 	add	r2, r2, r4
 	eors	r3, r3, r2
-.LVL76:
 	b	.L85
 .L88:
 	.align	2
 .L87:
 	.word	1204201446
-	.cfi_endproc
-.LFE229:
 	.size	JSHash, .-JSHash
 	.section	.text.FlashLoadIdbInfo,"ax",%progbits
 	.align	1
@@ -1010,17 +579,11 @@ JSHash:
 	.fpu softvfp
 	.type	FlashLoadIdbInfo, %function
 FlashLoadIdbInfo:
-.LFB232:
-	.loc 2 925 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	.loc 2 927 0
 	movs	r0, #0
 	bx	lr
-	.cfi_endproc
-.LFE232:
 	.size	FlashLoadIdbInfo, .-FlashLoadIdbInfo
 	.section	.text.FlashPrintInfo,"ax",%progbits
 	.align	1
@@ -1031,14 +594,10 @@ FlashLoadIdbInfo:
 	.fpu softvfp
 	.type	FlashPrintInfo, %function
 FlashPrintInfo:
-.LFB538:
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	bx	lr
-	.cfi_endproc
-.LFE538:
 	.size	FlashPrintInfo, .-FlashPrintInfo
 	.section	.text.ToshibaSetRRPara,"ax",%progbits
 	.align	1
@@ -1049,93 +608,47 @@ FlashPrintInfo:
 	.fpu softvfp
 	.type	ToshibaSetRRPara, %function
 ToshibaSetRRPara:
-.LFB239:
-	.loc 2 1723 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL77:
-	.loc 2 1723 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 3, -32
-	.cfi_offset 4, -28
-	.cfi_offset 5, -24
-	.cfi_offset 6, -20
-	.cfi_offset 7, -16
-	.cfi_offset 8, -12
-	.cfi_offset 10, -8
-	.cfi_offset 14, -4
 	add	r7, r1, r1, lsl #2
-	.loc 2 1726 0
 	ldr	r10, .L99+12
-	.loc 2 1723 0
 	mov	r5, r0
 	mov	r6, r1
-	.loc 2 1726 0
 	movs	r4, #0
-	.loc 2 1728 0
 	ldr	r8, .L99+16
-.LVL78:
 .L92:
-	.loc 2 1726 0 discriminator 1
 	ldrb	r3, [r10]	@ zero_extendqisi2
 	cmp	r4, r3
 	bcc	.L96
-	.loc 2 1738 0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.LVL79:
 .L96:
-	.loc 2 1727 0
 	movs	r3, #85
-.LBB180:
-.LBB181:
-	.loc 3 306 0
 	movs	r0, #200
-.LBE181:
-.LBE180:
-	.loc 2 1727 0
 	str	r3, [r5, #8]
-	.loc 2 1728 0
 	ldrsb	r3, [r4, r8]
 	str	r3, [r5, #4]
-.LVL80:
-.LBB183:
-.LBB182:
-	.loc 3 306 0
 	bl	udelay
-.LVL81:
-.LBE182:
-.LBE183:
-	.loc 2 1730 0
 	ldr	r3, .L99
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #34
 	bne	.L93
-	.loc 2 1731 0
 	adds	r3, r4, r7
 	add	r3, r3, r8
 .L98:
-	.loc 2 1733 0
 	ldrsb	r3, [r3, #5]
 .L97:
-	.loc 2 1735 0
 	str	r3, [r5]
-	.loc 2 1726 0
 	adds	r4, r4, #1
-.LVL82:
 	b	.L92
 .L93:
-	.loc 2 1732 0
 	cmp	r3, #35
 	bne	.L95
-	.loc 2 1733 0
 	ldr	r3, .L99+4
 	adds	r2, r4, r7
 	add	r3, r3, r2
 	b	.L98
 .L95:
-	.loc 2 1735 0
 	ldr	r3, .L99+8
 	ldrsb	r3, [r3, r6]
 	b	.L97
@@ -1147,8 +660,6 @@ ToshibaSetRRPara:
 	.word	.LANCHOR12
 	.word	.LANCHOR13
 	.word	.LANCHOR9
-	.cfi_endproc
-.LFE239:
 	.size	ToshibaSetRRPara, .-ToshibaSetRRPara
 	.section	.text.SamsungSetRRPara,"ax",%progbits
 	.align	1
@@ -1159,82 +670,38 @@ ToshibaSetRRPara:
 	.fpu softvfp
 	.type	SamsungSetRRPara, %function
 SamsungSetRRPara:
-.LFB241:
-	.loc 2 1807 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL83:
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 3, -32
-	.cfi_offset 4, -28
-	.cfi_offset 5, -24
-	.cfi_offset 6, -20
-	.cfi_offset 7, -16
-	.cfi_offset 8, -12
-	.cfi_offset 10, -8
-	.cfi_offset 14, -4
-	.loc 2 1807 0
 	mov	r6, r0
 	ldr	r7, .L104
-	.loc 2 1810 0
 	movs	r4, #0
-	.loc 2 1811 0
 	mov	r10, #161
-	.loc 2 1810 0
 	ldr	r8, .L104+4
 	add	r1, r7, r1, lsl #2
-.LVL84:
 	adds	r5, r1, #3
-.LVL85:
 .L102:
-	.loc 2 1810 0 is_stmt 0 discriminator 1
 	ldrb	r3, [r8]	@ zero_extendqisi2
 	cmp	r4, r3
 	bcc	.L103
-	.loc 2 1817 0 is_stmt 1
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.LVL86:
 .L103:
-	.loc 2 1812 0 discriminator 3
 	movs	r3, #0
-	.loc 2 1811 0 discriminator 3
 	str	r10, [r6, #8]
-	.loc 2 1812 0 discriminator 3
 	str	r3, [r6]
-.LBB184:
-.LBB185:
-	.loc 3 306 0 discriminator 3
 	mov	r0, #300
-.LBE185:
-.LBE184:
-	.loc 2 1813 0 discriminator 3
 	ldrsb	r3, [r7, r4]
-	.loc 2 1810 0 discriminator 3
 	adds	r4, r4, #1
-.LVL87:
-	.loc 2 1813 0 discriminator 3
 	str	r3, [r6]
-	.loc 2 1814 0 discriminator 3
 	ldrsb	r3, [r5, #1]!
 	str	r3, [r6]
-.LVL88:
-.LBB187:
-.LBB186:
-	.loc 3 306 0 discriminator 3
 	bl	udelay
-.LVL89:
 	b	.L102
 .L105:
 	.align	2
 .L104:
 	.word	.LANCHOR14
 	.word	.LANCHOR13
-.LBE186:
-.LBE187:
-	.cfi_endproc
-.LFE241:
 	.size	SamsungSetRRPara, .-SamsungSetRRPara
 	.global	__aeabi_uidiv
 	.global	__aeabi_uidivmod
@@ -1247,114 +714,59 @@ SamsungSetRRPara:
 	.fpu softvfp
 	.type	LogAddr2PhyAddr, %function
 LogAddr2PhyAddr:
-.LFB254:
-	.loc 2 2669 0
-	.cfi_startproc
 	@ args = 4, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL90:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 2669 0
 	mov	r6, r3
-	.loc 2 2671 0
 	ldr	r3, .L111
-.LVL91:
-	.loc 2 2669 0
 	mov	r8, r1
 	mov	r7, r2
 	mov	r5, r0
-	.loc 2 2671 0
 	ldrh	r4, [r3, #14]
 	ldrh	r3, [r3, #12]
 	smulbb	r4, r4, r3
-	.loc 2 2675 0
 	ldr	r3, .L111+4
 	ldrh	fp, [r3]
-	.loc 2 2671 0
 	uxth	r4, r4
-.LVL92:
-	.loc 2 2677 0
 	ldr	r3, .L111+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #1
-	.loc 2 2680 0
 	ldr	r3, [r0, #4]
-	.loc 2 2678 0
 	it	eq
 	lsleq	r1, fp, #1
-.LVL93:
-	.loc 2 2681 0
 	ubfx	r2, r3, #10, #16
-.LVL94:
-	.loc 2 2678 0
 	it	eq
 	uxtheq	fp, r1
-.LVL95:
-	.loc 2 2682 0
 	mov	r0, r2
-.LVL96:
-	.loc 2 2681 0
 	str	r3, [sp, #4]
-.LVL97:
-	.loc 2 2682 0
 	mov	r1, r4
 	str	r2, [sp]
 	bl	__aeabi_uidiv
-.LVL98:
 	ldr	r2, [sp]
 	uxth	r10, r0
-.LVL99:
 	mov	r1, r4
 	mov	r0, r2
 	bl	__aeabi_uidivmod
-.LVL100:
-	.loc 2 2684 0
 	ldr	r3, [sp, #4]
-	.loc 2 2685 0
 	cmp	r8, #1
 	uxth	r1, r1
-.LVL101:
-	.loc 2 2684 0
 	ubfx	r3, r3, #0, #10
-.LVL102:
-	.loc 2 2685 0
 	bne	.L108
-	.loc 2 2685 0 is_stmt 0 discriminator 1
 	ldr	r2, .L111+12
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cbnz	r2, .L108
-	.loc 2 2686 0 is_stmt 1
 	ldr	r2, .L111+16
 	ldrh	r3, [r2, r3, lsl #1]
-.LVL103:
 .L108:
-	.loc 2 2687 0
 	ldr	r2, .L111+20
 	ldr	r2, [r2, r10, lsl #2]
 	mla	r1, fp, r1, r2
-.LVL104:
 	add	r1, r1, r3
-	.loc 2 2691 0
 	ldrb	r3, [sp, #40]	@ zero_extendqisi2
-.LVL105:
-	.loc 2 2687 0
 	str	r1, [r7]
-	.loc 2 2688 0
 	str	r10, [r6]
-.LVL106:
-	.loc 2 2691 0
 	cmp	r3, #1
 	bls	.L110
-	.loc 2 2692 0
 	ldr	r0, [r5, #4]
 	ldr	r3, [r5, #40]
 	add	r0, r0, #1024
@@ -1362,17 +774,10 @@ LogAddr2PhyAddr:
 	rsbs	r0, r3, #0
 	adcs	r0, r0, r3
 .L109:
-.LVL107:
-	.loc 2 2696 0
 	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-.LVL108:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL109:
 .L110:
-	.cfi_restore_state
 	movs	r0, #0
 	b	.L109
 .L112:
@@ -1384,8 +789,6 @@ LogAddr2PhyAddr:
 	.word	.LANCHOR8
 	.word	.LANCHOR16
 	.word	.LANCHOR17
-	.cfi_endproc
-.LFE254:
 	.size	LogAddr2PhyAddr, .-LogAddr2PhyAddr
 	.section	.text.FlashReadStatusEN,"ax",%progbits
 	.align	1
@@ -1396,38 +799,13 @@ LogAddr2PhyAddr:
 	.fpu softvfp
 	.type	FlashReadStatusEN, %function
 FlashReadStatusEN:
-.LFB255:
-	.loc 2 2699 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL110:
-.LBB188:
-.LBB189:
-	.loc 3 123 0
 	ldr	r3, .L125
-.LBE189:
-.LBE188:
-	.loc 2 2699 0
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-.LBB191:
-.LBB190:
-	.loc 3 123 0
 	ldr	r5, [r3, r0, lsl #3]
-.LVL111:
-	.loc 3 124 0
 	add	r3, r3, r0, lsl #3
-	.loc 3 126 0
 	ldrb	r4, [r3, #4]	@ zero_extendqisi2
-.LVL112:
-.LBE190:
-.LBE191:
-	.loc 2 2703 0
 	ldr	r3, .L125+4
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #8]	@ zero_extendqisi2
@@ -1436,74 +814,38 @@ FlashReadStatusEN:
 	add	r4, r4, #8
 	bne	.L114
 	ldr	r0, .L125+8
-.LVL113:
-	.loc 2 2704 0
 	cbnz	r2, .L115
-	.loc 2 2705 0
 	ldrb	r2, [r0, #13]	@ zero_extendqisi2
-.LVL114:
 .L124:
-	.loc 2 2707 0
 	add	r3, r3, r5
 	str	r2, [r3, #2056]
-	.loc 2 2709 0
 	ldrb	r0, [r0, #15]	@ zero_extendqisi2
 	cbz	r0, .L119
-.LBB192:
-	.loc 2 2712 0 discriminator 1
 	add	r6, r5, r4, lsl #8
-.LBE192:
 	movs	r2, #0
 .L118:
-.LVL115:
-.LBB193:
-	.loc 2 2711 0 discriminator 1
 	cmp	r2, r0
 	bcc	.L120
-.LVL116:
 .L119:
-.LBE193:
-	.loc 2 2719 0
 	lsls	r4, r4, #8
-.LBB194:
-.LBB195:
-	.loc 3 306 0
 	movs	r0, #80
 	bl	udelay
-.LVL117:
-.LBE195:
-.LBE194:
-	.loc 2 2719 0
 	ldr	r0, [r5, r4]
-	.loc 2 2720 0
 	uxtb	r0, r0
 	pop	{r4, r5, r6, pc}
-.LVL118:
 .L115:
-	.loc 2 2707 0
 	ldrb	r2, [r0, #14]	@ zero_extendqisi2
-.LVL119:
 	b	.L124
-.LVL120:
 .L120:
-.LBB196:
-	.loc 2 2712 0 discriminator 3
 	lsls	r3, r2, #3
-	.loc 2 2711 0 discriminator 3
 	adds	r2, r2, #1
-.LVL121:
-	.loc 2 2712 0 discriminator 3
 	lsr	r3, r1, r3
 	uxtb	r3, r3
 	str	r3, [r6, #4]
 	b	.L118
-.LVL122:
 .L114:
-.LBE196:
-	.loc 2 2716 0
 	add	r3, r3, r5
 	movs	r2, #112
-.LVL123:
 	str	r2, [r3, #2056]
 	b	.L119
 .L126:
@@ -1512,8 +854,6 @@ FlashReadStatusEN:
 	.word	.LANCHOR6
 	.word	.LANCHOR18
 	.word	.LANCHOR7
-	.cfi_endproc
-.LFE255:
 	.size	FlashReadStatusEN, .-FlashReadStatusEN
 	.section	.text.FlashWaitReadyEN,"ax",%progbits
 	.align	1
@@ -1524,43 +864,23 @@ FlashReadStatusEN:
 	.fpu softvfp
 	.type	FlashWaitReadyEN, %function
 FlashWaitReadyEN:
-.LFB256:
-	.loc 2 2723 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL124:
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
 	mov	r4, r0
 	mov	r5, r1
 	mov	r6, r2
-.LVL125:
 .L131:
-	.loc 2 2727 0
 	mov	r2, r6
 	mov	r1, r5
 	mov	r0, r4
 	bl	FlashReadStatusEN
-.LVL126:
-	.loc 2 2728 0
 	cmp	r0, #255
-	.loc 2 2727 0
 	mov	r3, r0
-.LVL127:
-	.loc 2 2728 0
 	beq	.L131
-	.loc 2 2730 0
 	lsls	r3, r3, #25
 	bpl	.L131
-	.loc 2 2734 0
 	pop	{r4, r5, r6, pc}
-	.cfi_endproc
-.LFE256:
 	.size	FlashWaitReadyEN, .-FlashWaitReadyEN
 	.section	.text.NandcReadDontCaseBusyEn,"ax",%progbits
 	.align	1
@@ -1571,16 +891,10 @@ FlashWaitReadyEN:
 	.fpu softvfp
 	.type	NandcReadDontCaseBusyEn, %function
 NandcReadDontCaseBusyEn:
-.LFB268:
-	.loc 3 111 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL128:
 	bx	lr
-	.cfi_endproc
-.LFE268:
 	.size	NandcReadDontCaseBusyEn, .-NandcReadDontCaseBusyEn
 	.section	.text.NandcGetChipIf,"ax",%progbits
 	.align	1
@@ -1591,31 +905,20 @@ NandcReadDontCaseBusyEn:
 	.fpu softvfp
 	.type	NandcGetChipIf, %function
 NandcGetChipIf:
-.LFB269:
-	.loc 3 120 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL129:
-	.loc 3 123 0
 	ldr	r2, .L136
-	.loc 3 124 0
 	add	r3, r2, r0, lsl #3
-	.loc 3 126 0
 	ldr	r0, [r2, r0, lsl #3]
-.LVL130:
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
 	adds	r3, r3, #8
-	.loc 3 128 0
 	add	r0, r0, r3, lsl #8
 	bx	lr
 .L137:
 	.align	2
 .L136:
 	.word	.LANCHOR6
-	.cfi_endproc
-.LFE269:
 	.size	NandcGetChipIf, .-NandcGetChipIf
 	.section	.text.NandcSetDdrPara,"ax",%progbits
 	.align	1
@@ -1626,19 +929,13 @@ NandcGetChipIf:
 	.fpu softvfp
 	.type	NandcSetDdrPara, %function
 NandcSetDdrPara:
-.LFB270:
-	.loc 3 131 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL131:
-	.loc 3 133 0
 	ldr	r3, .L139
 	ldr	r2, [r3]
 	lsls	r3, r0, #8
 	orr	r0, r3, r0, lsl #16
-.LVL132:
 	orr	r0, r0, #1
 	str	r0, [r2, #304]
 	bx	lr
@@ -1646,8 +943,6 @@ NandcSetDdrPara:
 	.align	2
 .L139:
 	.word	.LANCHOR19
-	.cfi_endproc
-.LFE270:
 	.size	NandcSetDdrPara, .-NandcSetDdrPara
 	.section	.text.NandcSetDdrDiv,"ax",%progbits
 	.align	1
@@ -1658,17 +953,11 @@ NandcSetDdrPara:
 	.fpu softvfp
 	.type	NandcSetDdrDiv, %function
 NandcSetDdrDiv:
-.LFB271:
-	.loc 3 143 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL133:
-	.loc 3 144 0
 	ldr	r3, .L142
 	orr	r0, r0, #16640
-.LVL134:
 	ldr	r3, [r3]
 	str	r0, [r3, #344]
 	bx	lr
@@ -1676,8 +965,6 @@ NandcSetDdrDiv:
 	.align	2
 .L142:
 	.word	.LANCHOR19
-	.cfi_endproc
-.LFE271:
 	.size	NandcSetDdrDiv, .-NandcSetDdrDiv
 	.section	.text.NandcSetDdrMode,"ax",%progbits
 	.align	1
@@ -1688,37 +975,24 @@ NandcSetDdrDiv:
 	.fpu softvfp
 	.type	NandcSetDdrMode, %function
 NandcSetDdrMode:
-.LFB272:
-	.loc 3 148 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL135:
-	.loc 3 150 0
 	ldr	r3, .L147
 	ldr	r2, [r3]
 	ldr	r3, [r2]
-.LVL136:
-	.loc 3 152 0
 	cbnz	r0, .L145
-	.loc 3 151 0
 	bfi	r3, r0, #13, #1
 .L146:
-	.loc 3 160 0
 	str	r3, [r2]
 	bx	lr
 .L145:
-	.loc 3 158 0
 	orr	r3, r3, #253952
-.LVL137:
 	b	.L146
 .L148:
 	.align	2
 .L147:
 	.word	.LANCHOR19
-	.cfi_endproc
-.LFE272:
 	.size	NandcSetDdrMode, .-NandcSetDdrMode
 	.section	.text.NandcSetMode,"ax",%progbits
 	.align	1
@@ -1729,62 +1003,33 @@ NandcSetDdrMode:
 	.fpu softvfp
 	.type	NandcSetMode, %function
 NandcSetMode:
-.LFB273:
-	.loc 3 170 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL138:
-	.loc 3 174 0
 	ldr	r3, .L156
-	.loc 3 175 0
 	ands	r1, r0, #6
-	.loc 3 174 0
 	ldr	r2, [r3]
 	ldr	r3, [r2]
-.LVL139:
-	.loc 3 175 0
 	beq	.L150
-	.loc 3 182 0
 	lsls	r1, r0, #29
-	.loc 3 228 0
 	movw	r1, #16641
 	str	r1, [r2, #344]
-	.loc 3 178 0
 	orr	r3, r3, #24576
-.LVL140:
-	.loc 3 229 0
 	ldr	r1, .L156+4
-	.loc 3 179 0
 	bfc	r3, #15, #1
-.LVL141:
-	.loc 3 181 0
 	orr	r3, r3, #196608
-.LVL142:
-	.loc 3 184 0
 	it	mi
 	orrmi	r3, r3, #32768
-.LVL143:
-	.loc 3 229 0
 	str	r1, [r2, #304]
-	.loc 3 231 0
 	movs	r1, #38
 	str	r1, [r2, #308]
-	.loc 3 232 0
 	movs	r1, #39
 	str	r1, [r2, #308]
-.LVL144:
 .L152:
-	.loc 3 264 0
 	str	r3, [r2]
-	.loc 3 272 0
 	movs	r0, #0
-.LVL145:
 	bx	lr
-.LVL146:
 .L150:
-	.loc 3 262 0
 	bfi	r3, r1, #13, #1
 	b	.L152
 .L157:
@@ -1792,8 +1037,6 @@ NandcSetMode:
 .L156:
 	.word	.LANCHOR19
 	.word	1710595
-	.cfi_endproc
-.LFE273:
 	.size	NandcSetMode, .-NandcSetMode
 	.section	.text.NandcFlashCs,"ax",%progbits
 	.align	1
@@ -1804,41 +1047,23 @@ NandcSetMode:
 	.fpu softvfp
 	.type	NandcFlashCs, %function
 NandcFlashCs:
-.LFB274:
-	.loc 3 275 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL147:
-	.loc 3 278 0
 	ldr	r3, .L159
-	.loc 3 283 0
 	movs	r2, #1
-	.loc 3 278 0
 	ldr	r1, [r3, r0, lsl #3]
-.LVL148:
-	.loc 3 279 0
 	add	r0, r3, r0, lsl #3
-.LVL149:
-	.loc 3 283 0
 	ldrb	r0, [r0, #4]	@ zero_extendqisi2
-.LVL150:
-	.loc 3 282 0
 	ldr	r3, [r1]
-	.loc 3 283 0
 	lsls	r2, r2, r0
 	bfi	r3, r2, #0, #8
-.LVL151:
-	.loc 3 286 0
 	str	r3, [r1]
 	bx	lr
 .L160:
 	.align	2
 .L159:
 	.word	.LANCHOR6
-	.cfi_endproc
-.LFE274:
 	.size	NandcFlashCs, .-NandcFlashCs
 	.section	.text.NandcFlashDeCs,"ax",%progbits
 	.align	1
@@ -1849,34 +1074,20 @@ NandcFlashCs:
 	.fpu softvfp
 	.type	NandcFlashDeCs, %function
 NandcFlashDeCs:
-.LFB275:
-	.loc 3 290 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL152:
-	.loc 3 293 0
 	ldr	r3, .L162
 	ldr	r2, [r3, r0, lsl #3]
-.LVL153:
-	.loc 3 296 0
 	ldr	r3, [r2]
-	.loc 3 297 0
 	bfc	r3, #0, #8
-.LVL154:
-	.loc 3 298 0
 	bfc	r3, #17, #1
-	.loc 3 301 0
 	str	r3, [r2]
-.LVL155:
 	bx	lr
 .L163:
 	.align	2
 .L162:
 	.word	.LANCHOR6
-	.cfi_endproc
-.LFE275:
 	.size	NandcFlashDeCs, .-NandcFlashDeCs
 	.section	.text.HynixSetRRPara,"ax",%progbits
 	.align	1
@@ -1887,154 +1098,76 @@ NandcFlashDeCs:
 	.fpu softvfp
 	.type	HynixSetRRPara, %function
 HynixSetRRPara:
-.LFB244:
-	.loc 2 1901 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL156:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 1901 0
 	mov	r7, r3
-	.loc 2 1906 0
 	ldr	r3, .L171
-.LVL157:
-	.loc 2 1901 0
 	mov	r5, r0
 	mov	r6, r1
 	mov	r10, r2
 	ldr	r4, .L171+4
-	.loc 2 1906 0
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	cmp	r3, #6
 	bne	.L165
-	.loc 2 1908 0
 	movs	r3, #20
 	add	r3, r3, r0, lsl #6
 	add	r3, r3, r7, lsl #2
-.LVL158:
 .L170:
-	.loc 2 1911 0
 	add	r4, r4, r3
-.LVL159:
 .L166:
-.LBB197:
-.LBB198:
-	.loc 3 123 0
 	ldr	r3, .L171+8
-.LBE198:
-.LBE197:
-	.loc 2 1916 0
 	mov	r0, r5
-.LVL160:
 	subs	r6, r6, #1
 	subs	r4, r4, #1
-.LVL161:
 	add	r6, r6, r10
-.LBB200:
-.LBB199:
-	.loc 3 123 0
 	ldr	r8, [r3, r5, lsl #3]
-.LVL162:
-	.loc 3 124 0
 	add	r3, r3, r5, lsl #3
 	ldrb	fp, [r3, #4]	@ zero_extendqisi2
-.LVL163:
-.LBE199:
-.LBE200:
-	.loc 2 1916 0
 	bl	NandcFlashCs
-.LVL164:
-	.loc 2 1917 0
 	movs	r3, #54
 	lsl	fp, fp, #8
 	add	r0, r8, fp
 	str	r3, [r0, #2056]
-.LVL165:
 	add	r3, r10, #-1
 	mov	r10, r0
-.LVL166:
 .L168:
-	.loc 2 1918 0 discriminator 1
 	cmp	r3, r6
 	bne	.L169
-	.loc 2 1923 0
 	movs	r3, #22
-.LVL167:
 	add	r8, r8, fp
 	str	r3, [r8, #2056]
-	.loc 2 1924 0
 	mov	r0, r5
 	bl	NandcFlashDeCs
-.LVL168:
-	.loc 2 1925 0
 	ldr	r3, .L171+12
 	strb	r7, [r3, r5]
-	.loc 2 1926 0
 	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL169:
 .L165:
-	.cfi_restore_state
-	.loc 2 1909 0
 	cmp	r3, #7
 	bne	.L167
-	.loc 2 1911 0
 	movs	r3, #160
 	movs	r2, #28
-.LVL170:
 	smlabb	r2, r3, r0, r2
 	movs	r3, #10
 	smlabb	r3, r3, r7, r2
 	b	.L170
-.LVL171:
 .L167:
-	.loc 2 1913 0
 	adds	r3, r7, #2
 	add	r3, r3, r0, lsl #3
 	add	r4, r4, r3, lsl #3
 	adds	r4, r4, #4
-.LVL172:
 	b	.L166
-.LVL173:
 .L169:
-	.loc 2 1919 0 discriminator 3
 	ldrb	r2, [r3, #1]!	@ zero_extendqisi2
-.LVL174:
-.LBB201:
-.LBB202:
-	.loc 3 306 0 discriminator 3
 	movs	r0, #200
-.LBE202:
-.LBE201:
-	.loc 2 1919 0 discriminator 3
 	str	r2, [r10, #2052]
-.LVL175:
 	str	r3, [sp, #4]
-.LBB204:
-.LBB203:
-	.loc 3 306 0 discriminator 3
 	bl	udelay
-.LVL176:
-.LBE203:
-.LBE204:
-	.loc 2 1921 0 discriminator 3
 	ldrsb	r2, [r4, #1]!
 	ldr	r3, [sp, #4]
-.LVL177:
 	str	r2, [r10, #2048]
 	b	.L168
 .L172:
@@ -2044,8 +1177,6 @@ HynixSetRRPara:
 	.word	.LANCHOR20
 	.word	.LANCHOR6
 	.word	.LANCHOR21
-	.cfi_endproc
-.LFE244:
 	.size	HynixSetRRPara, .-HynixSetRRPara
 	.section	.text.FlashSetReadRetryDefault,"ax",%progbits
 	.align	1
@@ -2056,57 +1187,30 @@ HynixSetRRPara:
 	.fpu softvfp
 	.type	FlashSetReadRetryDefault, %function
 FlashSetReadRetryDefault:
-.LFB246:
-	.loc 2 1970 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL178:
-	.loc 2 1972 0
 	ldr	r3, .L179
-	.loc 2 1970 0
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 2 1972 0
 	ldr	r3, [r3]
-	.loc 2 1974 0
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	cmp	r3, #6
 	bhi	.L173
-.LBB207:
-.LBB208:
-	.loc 2 1977 0
 	ldr	r5, .L179+4
-.LBE208:
-.LBE207:
 	movs	r4, #0
-.LBB210:
-.LBB209:
 	adds	r6, r5, #4
-.LVL179:
 .L176:
-	.loc 2 1976 0
 	ldr	r3, .L179+8
 	uxtb	r0, r4
-.LVL180:
 	ldrb	r3, [r3, r4, lsl #3]	@ zero_extendqisi2
 	cmp	r3, #173
 	bne	.L175
-	.loc 2 1977 0
 	movs	r3, #0
 	mov	r2, r6
 	ldrb	r1, [r5, #1]	@ zero_extendqisi2
 	bl	HynixSetRRPara
-.LVL181:
 .L175:
 	adds	r4, r4, #1
-.LVL182:
-	.loc 2 1975 0
 	cmp	r4, #4
 	bne	.L176
 .L173:
@@ -2117,10 +1221,6 @@ FlashSetReadRetryDefault:
 	.word	.LANCHOR18
 	.word	.LANCHOR20
 	.word	.LANCHOR22
-.LBE209:
-.LBE210:
-	.cfi_endproc
-.LFE246:
 	.size	FlashSetReadRetryDefault, .-FlashSetReadRetryDefault
 	.section	.text.FlashWaitCmdDone,"ax",%progbits
 	.align	1
@@ -2131,36 +1231,18 @@ FlashSetReadRetryDefault:
 	.fpu softvfp
 	.type	FlashWaitCmdDone, %function
 FlashWaitCmdDone:
-.LFB257:
-	.loc 2 2737 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL183:
-	.loc 2 2742 0
 	ldr	r2, .L188
 	lsls	r3, r0, #4
-	.loc 2 2737 0
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 2 2737 0
 	mov	r6, r0
-	.loc 2 2742 0
 	adds	r4, r2, r3
 	ldr	r1, [r4, #8]
 	cbz	r1, .L183
-	.loc 2 2739 0
 	ldrb	r5, [r2, r3]	@ zero_extendqisi2
-	.loc 2 2743 0
 	mov	r0, r5
-.LVL184:
 	bl	NandcFlashCs
-.LVL185:
-	.loc 2 2744 0
 	ldr	r3, .L188+4
 	mov	r0, r5
 	ldr	r1, [r4, #4]
@@ -2169,46 +1251,26 @@ FlashWaitCmdDone:
 	it	ne
 	movne	r2, #1
 	bl	FlashWaitReadyEN
-.LVL186:
 	mov	r1, r0
-.LVL187:
-	.loc 2 2745 0
 	mov	r0, r5
-.LVL188:
 	bl	NandcFlashDeCs
-.LVL189:
-	.loc 2 2749 0
 	ldr	r3, [r4, #8]
-	.loc 2 2747 0
 	sbfx	r1, r1, #0, #1
-.LVL190:
-	.loc 2 2749 0
+	ldr	r2, [r4, #12]
 	str	r1, [r3]
-	.loc 2 2750 0
 	movs	r3, #0
-	.loc 2 2751 0
-	ldr	r2, [r4, #12]
-	.loc 2 2750 0
 	str	r3, [r4, #8]
-	.loc 2 2751 0
 	cbz	r2, .L183
-	.loc 2 2752 0
 	str	r1, [r2]
-	.loc 2 2753 0
 	str	r3, [r4, #12]
-.LVL191:
 .L183:
-	.loc 2 2757 0
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.LVL192:
 .L189:
 	.align	2
 .L188:
 	.word	.LANCHOR23
 	.word	.LANCHOR17
-	.cfi_endproc
-.LFE257:
 	.size	FlashWaitCmdDone, .-FlashWaitCmdDone
 	.section	.text.NandcDelayns,"ax",%progbits
 	.align	1
@@ -2219,24 +1281,12 @@ FlashWaitCmdDone:
 	.fpu softvfp
 	.type	NandcDelayns, %function
 NandcDelayns:
-.LFB276:
-	.loc 3 305 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL193:
 	push	{r3, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 3, -8
-	.cfi_offset 14, -4
-	.loc 3 306 0
 	bl	udelay
-.LVL194:
-	.loc 3 308 0
 	movs	r0, #0
 	pop	{r3, pc}
-	.cfi_endproc
-.LFE276:
 	.size	NandcDelayns, .-NandcDelayns
 	.section	.text.NandcWaitFlashReady,"ax",%progbits
 	.align	1
@@ -2247,69 +1297,35 @@ NandcDelayns:
 	.fpu softvfp
 	.type	NandcWaitFlashReady, %function
 NandcWaitFlashReady:
-.LFB277:
-	.loc 3 311 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL195:
-	.loc 3 316 0
 	ldr	r3, .L196
-	.loc 3 311 0
 	push	{r0, r1, r2, r4, r5, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 3 316 0
 	ldr	r4, .L196+4
 	ldr	r5, [r3, r0, lsl #3]
-.LVL196:
 .L193:
-.LBB211:
-.LBB212:
-	.loc 3 306 0
 	movs	r0, #100
 	bl	udelay
-.LVL197:
-.LBE212:
-.LBE211:
-	.loc 3 322 0
 	ldr	r3, [r5]
 	str	r3, [sp, #4]
-	.loc 3 323 0
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #22
 	bmi	.L194
-.LVL198:
-	.loc 3 319 0 discriminator 2
 	subs	r4, r4, #1
-.LVL199:
 	bne	.L193
-	.loc 3 333 0
 	mov	r0, #-1
-.LVL200:
 .L191:
-	.loc 3 336 0
 	add	sp, sp, #12
-	.cfi_remember_state
-	.cfi_def_cfa_offset 12
 	@ sp needed
 	pop	{r4, r5, pc}
-.LVL201:
 .L194:
-	.cfi_restore_state
-	.loc 3 318 0
 	movs	r0, #0
-	.loc 3 335 0
 	b	.L191
 .L197:
 	.align	2
 .L196:
 	.word	.LANCHOR6
 	.word	100000
-	.cfi_endproc
-.LFE277:
 	.size	NandcWaitFlashReady, .-NandcWaitFlashReady
 	.section	.text.FlashReset,"ax",%progbits
 	.align	1
@@ -2320,70 +1336,27 @@ NandcWaitFlashReady:
 	.fpu softvfp
 	.type	FlashReset, %function
 FlashReset:
-.LFB207:
-	.loc 2 267 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL202:
-.LBB213:
-.LBB214:
-	.loc 3 123 0
 	ldr	r3, .L199
-.LBE214:
-.LBE213:
-	.loc 2 267 0
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 2 267 0
 	mov	r4, r0
-.LBB216:
-.LBB215:
-	.loc 3 123 0
 	ldr	r5, [r3, r0, lsl #3]
-.LVL203:
-	.loc 3 124 0
 	add	r3, r3, r0, lsl #3
-	.loc 3 126 0
 	ldrb	r6, [r3, #4]	@ zero_extendqisi2
-.LVL204:
-.LBE215:
-.LBE216:
-	.loc 2 271 0
 	bl	NandcFlashCs
-.LVL205:
-	.loc 2 272 0
 	movs	r3, #255
-	.loc 2 273 0
 	mov	r0, r4
-	.loc 2 272 0
 	add	r5, r5, r6, lsl #8
 	str	r3, [r5, #2056]
-	.loc 2 273 0
 	bl	NandcWaitFlashReady
-.LVL206:
-	.loc 2 274 0
 	mov	r0, r4
-	.loc 2 275 0
 	pop	{r4, r5, r6, lr}
-	.cfi_restore 14
-	.cfi_restore 6
-	.cfi_restore 5
-	.cfi_restore 4
-	.cfi_def_cfa_offset 0
-	.loc 2 274 0
 	b	NandcFlashDeCs
-.LVL207:
 .L200:
 	.align	2
 .L199:
 	.word	.LANCHOR6
-	.cfi_endproc
-.LFE207:
 	.size	FlashReset, .-FlashReset
 	.section	.text.FlashEraseBlock,"ax",%progbits
 	.align	1
@@ -2394,57 +1367,29 @@ FlashReset:
 	.fpu softvfp
 	.type	FlashEraseBlock, %function
 FlashEraseBlock:
-.LFB225:
-	.loc 2 589 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL208:
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 2 589 0
 	mov	r4, r0
 	mov	r5, r1
 	mov	r6, r2
-	.loc 2 593 0
 	bl	NandcWaitFlashReady
-.LVL209:
-	.loc 2 594 0
 	mov	r0, r4
 	bl	NandcFlashCs
-.LVL210:
-	.loc 2 595 0
 	mov	r2, r6
 	mov	r1, r5
 	mov	r0, r4
 	bl	FlashEraseCmd
-.LVL211:
-	.loc 2 596 0
 	mov	r0, r4
 	bl	NandcWaitFlashReady
-.LVL212:
-	.loc 2 597 0
 	mov	r1, r5
 	mov	r0, r4
 	bl	FlashReadStatus
-.LVL213:
 	mov	r1, r0
-.LVL214:
-	.loc 2 598 0
 	mov	r0, r4
-.LVL215:
 	bl	NandcFlashDeCs
-.LVL216:
-	.loc 2 603 0
 	and	r0, r1, #1
-.LVL217:
 	pop	{r4, r5, r6, pc}
-	.cfi_endproc
-.LFE225:
 	.size	FlashEraseBlock, .-FlashEraseBlock
 	.section	.text.FlashSetInterfaceMode,"ax",%progbits
 	.align	1
@@ -2455,175 +1400,94 @@ FlashEraseBlock:
 	.fpu softvfp
 	.type	FlashSetInterfaceMode, %function
 FlashSetInterfaceMode:
-.LFB226:
-	.loc 2 606 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL218:
-	.loc 2 636 0
 	ldr	r3, .L230
-	.loc 2 645 0
 	mov	ip, #128
-	.loc 2 606 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 636 0
 	movs	r5, #0
-	.loc 2 637 0
 	movs	r7, #239
-	.loc 2 642 0
 	mov	lr, #1
-	.loc 2 643 0
 	mov	r8, #35
-	.loc 2 640 0
 	mov	r10, #32
-	.loc 2 636 0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	and	r2, r3, #4
 	and	r3, r3, #1
 	str	r2, [sp]
-	.loc 2 648 0
 	mov	r2, r5
 	str	r3, [sp, #4]
-.LVL219:
 .L212:
-	.loc 2 613 0
 	ldr	r3, .L230+4
 	ldrb	r4, [r5, r3]	@ zero_extendqisi2
-.LVL220:
-	.loc 2 614 0
 	cmp	r4, #152
 	beq	.L203
-	.loc 2 614 0 is_stmt 0 discriminator 1
 	cmp	r4, #69
 	beq	.L203
-	.loc 2 614 0 discriminator 2
 	cmp	r4, #173
 	beq	.L203
-	.loc 2 614 0 discriminator 3
 	cmp	r4, #44
 	bne	.L204
 .L203:
-.LBB217:
-.LBB218:
-	.loc 3 123 0 is_stmt 1
 	ldr	r3, .L230+8
-.LBE218:
-.LBE217:
-	.loc 2 615 0
 	cmp	r0, #1
-.LBB220:
-.LBB219:
-	.loc 3 123 0
 	ldr	r1, [r5, r3]
-	.loc 3 124 0
 	add	r3, r3, r5
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-.LBE219:
-.LBE220:
-	.loc 2 615 0
 	bne	.L205
-	.loc 2 616 0
 	ldr	r6, [sp, #4]
 	cbz	r6, .L204
-	.loc 2 620 0
 	lsls	r3, r3, #8
-	.loc 2 621 0
 	cmp	r4, #173
-	.loc 2 620 0
 	add	fp, r1, r3
 	str	r7, [fp, #2056]
-	.loc 2 621 0
 	bne	.L206
-	.loc 2 622 0
 	str	r0, [fp, #2052]
 .L229:
-	.loc 2 646 0
 	str	r2, [fp, #2048]
 	b	.L210
 .L206:
-	.loc 2 624 0
 	cmp	r4, #44
-	.loc 2 626 0
 	ittet	eq
 	moveq	r4, #5
-.LVL221:
-	.loc 2 625 0
 	streq	r0, [fp, #2052]
-	.loc 2 628 0
 	strne	ip, [fp, #2052]
-	.loc 2 626 0
 	streq	r4, [fp, #2048]
-	.loc 2 629 0
 	it	ne
 	strne	r0, [fp, #2048]
-.LVL222:
 .L210:
 	add	r3, r3, r1
-	.loc 2 648 0
 	str	r2, [r3, #2048]
-	.loc 2 649 0
 	str	r2, [r3, #2048]
-	.loc 2 650 0
 	str	r2, [r3, #2048]
 .L204:
 	adds	r5, r5, #8
-	.loc 2 611 0 discriminator 2
 	cmp	r5, #32
 	bne	.L212
-	.loc 2 680 0
 	movs	r0, #0
-.LVL223:
 	bl	NandcWaitFlashReady
-.LVL224:
-	.loc 2 682 0
 	movs	r0, #0
 	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL225:
 .L205:
-	.cfi_restore_state
-	.loc 2 636 0
 	ldr	r6, [sp]
 	cmp	r6, #0
 	beq	.L204
-	.loc 2 637 0
 	lsls	r3, r3, #8
-	.loc 2 638 0
 	cmp	r4, #173
-	.loc 2 637 0
 	add	fp, r1, r3
 	str	r7, [fp, #2056]
-	.loc 2 638 0
 	bne	.L209
-	.loc 2 639 0
 	str	lr, [fp, #2052]
-	.loc 2 640 0
 	str	r10, [fp, #2048]
 	b	.L210
 .L209:
-	.loc 2 641 0
 	cmp	r4, #44
 	bne	.L211
-	.loc 2 642 0
 	str	lr, [fp, #2052]
-	.loc 2 643 0
 	str	r8, [fp, #2048]
 	b	.L210
 .L211:
-	.loc 2 645 0
 	str	ip, [fp, #2052]
 	b	.L229
 .L231:
@@ -2632,8 +1496,6 @@ FlashSetInterfaceMode:
 	.word	.LANCHOR24
 	.word	.LANCHOR22
 	.word	.LANCHOR6
-	.cfi_endproc
-.LFE226:
 	.size	FlashSetInterfaceMode, .-FlashSetInterfaceMode
 	.section	.text.SandiskSetRRPara,"ax",%progbits
 	.align	1
@@ -2644,100 +1506,86 @@ FlashSetInterfaceMode:
 	.fpu softvfp
 	.type	SandiskSetRRPara, %function
 SandiskSetRRPara:
-.LFB238:
-	.loc 2 1706 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL226:
 	push	{r3, r4, r5, r6, r7, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 3, -24
-	.cfi_offset 4, -20
-	.cfi_offset 5, -16
-	.cfi_offset 6, -12
-	.cfi_offset 7, -8
-	.cfi_offset 14, -4
-	.loc 2 1709 0
 	movs	r3, #239
 	str	r3, [r0, #8]
-	.loc 2 1710 0
 	movs	r3, #17
-	.loc 2 1706 0
 	mov	r5, r0
 	mov	r4, r1
-	.loc 2 1710 0
 	str	r3, [r0, #4]
-.LVL227:
-.LBB221:
-.LBB222:
-	.loc 3 306 0
 	movs	r0, #200
-.LVL228:
 	bl	udelay
-.LVL229:
-.LBE222:
-.LBE221:
-	.loc 2 1716 0
-	ldr	r6, .L238
+	ldr	r3, .L238
 	add	r4, r4, r4, lsl #2
-	.loc 2 1712 0
-	ldr	r1, .L238+4
+	ldr	r6, .L238+4
 	movs	r2, #0
-	.loc 2 1713 0
-	ldr	r0, .L238+8
-	.loc 2 1714 0
-	ldr	r7, .L238+12
-.LVL230:
+	ldr	r7, .L238+8
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	ldr	r3, .L238+12
+	ldrb	r0, [r3]	@ zero_extendqisi2
 .L233:
-	.loc 2 1712 0 discriminator 1
-	ldrb	r3, [r1]	@ zero_extendqisi2
-	cmp	r2, r3
+	cmp	r2, r1
 	bcc	.L236
-	.loc 2 1718 0
 	movs	r0, #0
-	.loc 2 1720 0
 	pop	{r3, r4, r5, r6, r7, lr}
-	.cfi_remember_state
-	.cfi_restore 14
-	.cfi_restore 7
-	.cfi_restore 6
-	.cfi_restore 5
-	.cfi_restore 4
-	.cfi_restore 3
-	.cfi_def_cfa_offset 0
-.LVL231:
-	.loc 2 1718 0
 	b	NandcWaitFlashReady
-.LVL232:
 .L236:
-	.cfi_restore_state
-	.loc 2 1713 0
-	ldrb	r3, [r0]	@ zero_extendqisi2
-	cmp	r3, #67
-	add	r3, r2, r4
-	.loc 2 1714 0
+	adds	r3, r2, r4
+	cmp	r0, #67
 	ite	eq
 	addeq	r3, r3, r7
-	.loc 2 1716 0
 	addne	r3, r3, r6
 	ldrsb	r3, [r3, #5]
-	.loc 2 1712 0
 	adds	r2, r2, #1
-.LVL233:
-	.loc 2 1716 0
 	str	r3, [r5]
 	b	.L233
 .L239:
 	.align	2
 .L238:
-	.word	.LANCHOR11
 	.word	.LANCHOR13
-	.word	.LANCHOR10
+	.word	.LANCHOR11
 	.word	.LANCHOR9
-	.cfi_endproc
-.LFE238:
+	.word	.LANCHOR10
 	.size	SandiskSetRRPara, .-SandiskSetRRPara
+	.section	.text.micron_auto_read_calibration_config,"ax",%progbits
+	.align	1
+	.global	micron_auto_read_calibration_config
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	micron_auto_read_calibration_config, %function
+micron_auto_read_calibration_config:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	mov	r5, r0
+	mov	r6, r1
+	bl	NandcWaitFlashReady
+	ldr	r0, .L241
+	ldr	r4, [r0, r5, lsl #3]
+	add	r0, r0, r5, lsl #3
+	ldrb	r3, [r0, #4]	@ zero_extendqisi2
+	movs	r0, #200
+	add	r4, r4, r3, lsl #8
+	movs	r3, #239
+	str	r3, [r4, #2056]
+	movs	r3, #150
+	str	r3, [r4, #2052]
+	bl	udelay
+	movs	r3, #0
+	str	r6, [r4, #2048]
+	str	r3, [r4, #2048]
+	str	r3, [r4, #2048]
+	str	r3, [r4, #2048]
+	pop	{r4, r5, r6, pc}
+.L242:
+	.align	2
+.L241:
+	.word	.LANCHOR6
+	.size	micron_auto_read_calibration_config, .-micron_auto_read_calibration_config
 	.section	.text.FlashEraseSLc2KBlocks,"ax",%progbits
 	.align	1
 	.global	FlashEraseSLc2KBlocks
@@ -2747,48 +1595,23 @@ SandiskSetRRPara:
 	.fpu softvfp
 	.type	FlashEraseSLc2KBlocks, %function
 FlashEraseSLc2KBlocks:
-.LFB260:
-	.loc 2 2901 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL234:
 	push	{r4, r5, r6, r7, r8, r10, lr}
-	.cfi_def_cfa_offset 28
-	.cfi_offset 4, -28
-	.cfi_offset 5, -24
-	.cfi_offset 6, -20
-	.cfi_offset 7, -16
-	.cfi_offset 8, -12
-	.cfi_offset 10, -8
-	.cfi_offset 14, -4
 	mov	r7, r1
-	.loc 2 2911 0
-	ldr	r8, .L250+12
-	.loc 2 2901 0
+	ldr	r8, .L253+12
 	sub	sp, sp, #20
-	.cfi_def_cfa_offset 48
 	mov	r5, r0
-	.loc 2 2909 0
 	movs	r6, #0
-	.loc 2 2915 0
-	ldr	r10, .L250+16
-.LVL235:
-.L241:
-	.loc 2 2909 0 discriminator 1
+	ldr	r10, .L253+16
+.L244:
 	cmp	r6, r7
-	bne	.L246
-	.loc 2 2938 0
+	bne	.L249
 	movs	r0, #0
 	add	sp, sp, #20
-	.cfi_remember_state
-	.cfi_def_cfa_offset 28
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.LVL236:
-.L246:
-	.cfi_restore_state
-	.loc 2 2910 0
+.L249:
 	subs	r3, r7, r6
 	add	r2, sp, #8
 	uxtb	r3, r3
@@ -2797,110 +1620,70 @@ FlashEraseSLc2KBlocks:
 	str	r3, [sp]
 	add	r3, sp, #12
 	bl	LogAddr2PhyAddr
-.LVL237:
-	.loc 2 2911 0
 	ldr	r3, [sp, #12]
 	ldrb	r2, [r8]	@ zero_extendqisi2
 	cmp	r2, r3
-	bhi	.L242
-	.loc 2 2912 0
+	bhi	.L245
 	mov	r3, #-1
 	str	r3, [r5]
-.L243:
-	.loc 2 2909 0 discriminator 2
+.L246:
 	adds	r6, r6, #1
-.LVL238:
 	adds	r5, r5, #36
-	b	.L241
-.L242:
-	.loc 2 2915 0
+	b	.L244
+.L245:
 	ldrb	r4, [r10, r3]	@ zero_extendqisi2
-.LVL239:
-	.loc 2 2916 0
 	lsls	r3, r3, #4
-	ldr	r2, .L250
-	.loc 2 2917 0
+	ldr	r2, .L253
 	mov	r0, r4
-	.loc 2 2916 0
 	strb	r4, [r2, r3]
-	.loc 2 2917 0
 	bl	NandcWaitFlashReady
-.LVL240:
-	.loc 2 2918 0
 	mov	r0, r4
 	bl	NandcFlashCs
-.LVL241:
-	.loc 2 2919 0
 	movs	r2, #0
 	ldr	r1, [sp, #8]
 	mov	r0, r4
 	bl	FlashEraseCmd
-.LVL242:
-	.loc 2 2920 0
 	mov	r0, r4
 	bl	NandcWaitFlashReady
-.LVL243:
-	.loc 2 2921 0
 	ldr	r1, [sp, #8]
 	mov	r0, r4
 	bl	FlashReadStatus
-.LVL244:
-	.loc 2 2927 0
-	ldr	r3, .L250+4
-	.loc 2 2923 0
+	ldr	r3, .L253+4
 	sbfx	r0, r0, #0, #1
-.LVL245:
-	.loc 2 2925 0
 	str	r0, [r5]
-	.loc 2 2927 0
 	movs	r2, #0
 	ldr	r1, [sp, #8]
 	mov	r0, r4
 	ldr	r3, [r3]
 	add	r1, r1, r3
 	bl	FlashEraseCmd
-.LVL246:
-	.loc 2 2928 0
 	mov	r0, r4
 	bl	NandcWaitFlashReady
-.LVL247:
-	.loc 2 2929 0
 	ldr	r1, [sp, #8]
 	mov	r0, r4
 	bl	FlashReadStatus
-.LVL248:
-	.loc 2 2931 0
 	lsls	r3, r0, #31
-	.loc 2 2932 0
 	itt	mi
 	movmi	r3, #-1
 	strmi	r3, [r5]
-	.loc 2 2933 0
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	bne	.L245
-	.loc 2 2934 0
+	bne	.L248
 	ldr	r1, [sp, #8]
-	ldr	r0, .L250+8
-.LVL249:
+	ldr	r0, .L253+8
 	bl	printf
-.LVL250:
-.L245:
-	.loc 2 2935 0
+.L248:
 	mov	r0, r4
 	bl	NandcFlashDeCs
-.LVL251:
-	b	.L243
-.L251:
+	b	.L246
+.L254:
 	.align	2
-.L250:
+.L253:
 	.word	.LANCHOR23
 	.word	.LANCHOR3
 	.word	.LC1
 	.word	.LANCHOR25
 	.word	.LANCHOR26
-	.cfi_endproc
-.LFE260:
 	.size	FlashEraseSLc2KBlocks, .-FlashEraseSLc2KBlocks
 	.section	.text.FlashEraseBlocks,"ax",%progbits
 	.align	1
@@ -2911,82 +1694,43 @@ FlashEraseSLc2KBlocks:
 	.fpu softvfp
 	.type	FlashEraseBlocks, %function
 FlashEraseBlocks:
-.LFB263:
-	.loc 2 3223 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL252:
-	.loc 2 3233 0
-	ldr	r3, .L283
-	.loc 2 3223 0
+	ldr	r3, .L286
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
 	mov	r8, r0
 	sub	sp, sp, #24
-	.cfi_def_cfa_offset 56
-	.loc 2 3223 0
 	mov	fp, r1
 	mov	r7, r2
-	.loc 2 3233 0
 	ldrb	r4, [r3]	@ zero_extendqisi2
-	cbnz	r4, .L253
-	.loc 2 3244 0 discriminator 1
-	ldr	r10, .L283+8
-.LVL253:
-.L254:
-	.loc 2 3236 0 discriminator 1
+	cbnz	r4, .L256
+	ldr	r10, .L286+8
+.L257:
 	cmp	r4, r7
-	bcc	.L263
-	.loc 2 3273 0 discriminator 1
-	ldr	r5, .L283+4
+	bcc	.L266
+	ldr	r5, .L286+4
 	movs	r4, #0
-.LVL254:
-	.loc 2 3274 0 discriminator 1
-	ldr	r6, .L283+8
-.L264:
-.LVL255:
-	.loc 2 3271 0 discriminator 1
-	ldr	r3, .L283+12
+	ldr	r6, .L286+8
+.L267:
+	ldr	r3, .L286+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r4, r3
-	bcc	.L266
-	.loc 2 3278 0
-	ldr	r3, .L283+16
+	bcc	.L269
+	ldr	r3, .L286+16
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L267
-.LVL256:
-.L268:
-	.loc 2 3283 0
+	bne	.L270
+.L271:
 	movs	r0, #0
-	b	.L252
-.LVL257:
-.L253:
-	.loc 2 3234 0
+	b	.L255
+.L256:
 	mov	r1, r2
-.LVL258:
 	bl	FlashEraseSLc2KBlocks
-.LVL259:
-.L252:
-	.loc 2 3284 0
+.L255:
 	add	sp, sp, #24
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL260:
-.L263:
-	.cfi_restore_state
-	.loc 2 3237 0
+.L266:
 	movs	r5, #36
 	add	r2, sp, #16
 	muls	r5, r4, r5
@@ -2999,169 +1743,107 @@ FlashEraseBlocks:
 	str	r3, [sp]
 	add	r3, sp, #20
 	bl	LogAddr2PhyAddr
-.LVL261:
-	.loc 2 3238 0
-	ldr	r3, .L283+12
-	.loc 2 3237 0
+	ldr	r3, .L286+12
 	mov	r6, r0
-.LVL262:
-	.loc 2 3238 0
 	ldr	r0, [sp, #20]
-.LVL263:
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r0
-	bhi	.L256
-	.loc 2 3239 0
+	bhi	.L259
 	mov	r3, #-1
 	str	r3, [r8, r5]
-.L257:
-	.loc 2 3236 0 discriminator 2
+.L260:
 	adds	r4, r4, #1
-.LVL264:
-	b	.L254
-.L256:
-	.loc 2 3242 0
-	ldr	r3, .L283+20
+	b	.L257
+.L259:
+	ldr	r3, .L286+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	.loc 2 3243 0
 	cmp	r3, #0
-	.loc 2 3244 0
 	add	r3, r10, r0, lsl #4
-	.loc 2 3243 0
 	it	eq
 	moveq	r6, #0
-.LVL265:
-	.loc 2 3244 0
 	ldr	r3, [r3, #8]
-	cbz	r3, .L259
-	.loc 2 3245 0
+	cbz	r3, .L262
 	uxtb	r0, r0
 	bl	FlashWaitCmdDone
-.LVL266:
-.L259:
-	.loc 2 3246 0
+.L262:
 	ldr	r1, [sp, #20]
 	ldr	r0, [sp, #12]
 	lsls	r2, r1, #4
 	add	r3, r10, r2
 	str	r0, [r3, #8]
-	.loc 2 3247 0
 	movs	r0, #0
 	str	r0, [r3, #12]
-	.loc 2 3248 0
 	ldr	r0, [sp, #16]
 	str	r0, [r3, #4]
-	.loc 2 3249 0
-	cbz	r6, .L260
-	.loc 2 3250 0
+	cbz	r6, .L263
 	adds	r5, r5, #36
 	add	r5, r5, r8
 	str	r5, [r3, #12]
-.L260:
-	.loc 2 3252 0
-	ldr	r3, .L283+24
+.L263:
+	ldr	r3, .L286+24
 	ldrb	r5, [r3, r1]	@ zero_extendqisi2
-.LVL267:
-	.loc 2 3254 0
 	mov	r0, r5
-	.loc 2 3253 0
 	strb	r5, [r10, r2]
-	.loc 2 3254 0
 	bl	NandcFlashCs
-.LVL268:
-	.loc 2 3255 0
 	cmp	fp, #1
-	.loc 2 3256 0
 	mov	r0, r5
-	.loc 2 3255 0
-	bne	.L261
-	.loc 2 3255 0 is_stmt 0 discriminator 1
-	ldr	r3, .L283+4
+	bne	.L264
+	ldr	r3, .L286+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L261
-	.loc 2 3256 0 is_stmt 1
+	cbz	r3, .L264
 	bl	flash_enter_slc_mode
-.LVL269:
-.L262:
-	.loc 2 3260 0
-	ldr	r3, .L283+28
+.L265:
+	ldr	r3, .L286+28
 	mov	r0, r5
 	ldr	r2, [sp, #20]
-	.loc 2 3263 0
 	add	r4, r4, r6
-.LVL270:
-	.loc 2 3260 0
 	ldr	r1, [sp, #16]
 	ldr	r2, [r3, r2, lsl #2]
 	adds	r2, r2, #0
 	it	ne
 	movne	r2, #1
 	bl	FlashWaitReadyEN
-.LVL271:
-	.loc 2 3261 0
 	mov	r2, r6
 	ldr	r1, [sp, #16]
 	mov	r0, r5
 	bl	FlashEraseCmd
-.LVL272:
-	.loc 2 3262 0
 	mov	r0, r5
 	bl	NandcFlashDeCs
-.LVL273:
-	b	.L257
-.L261:
-	.loc 2 3258 0
+	b	.L260
+.L264:
 	bl	flash_exit_slc_mode
-.LVL274:
-	b	.L262
-.LVL275:
-.L266:
-	.loc 2 3272 0
+	b	.L265
+.L269:
 	uxtb	r0, r4
 	bl	FlashWaitCmdDone
-.LVL276:
-	.loc 2 3273 0
 	cmp	fp, #1
-	bne	.L265
-	.loc 2 3273 0 is_stmt 0 discriminator 1
+	bne	.L268
 	ldrb	r3, [r5]	@ zero_extendqisi2
-	cbz	r3, .L265
-	.loc 2 3274 0 is_stmt 1
+	cbz	r3, .L268
 	lsls	r3, r4, #4
 	ldrb	r0, [r6, r3]	@ zero_extendqisi2
 	bl	flash_exit_slc_mode
-.LVL277:
-.L265:
-	.loc 2 3271 0 discriminator 2
+.L268:
 	adds	r4, r4, #1
-.LVL278:
-	b	.L264
-.L267:
-	.loc 2 3278 0 discriminator 1
-	ldr	r3, .L283+32
+	b	.L267
+.L270:
+	ldr	r3, .L286+32
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #69
-	bne	.L268
+	bne	.L271
 	movs	r3, #0
-	.loc 2 3280 0 discriminator 1
 	movs	r2, #36
 	mov	r1, r3
-.LVL279:
-.L269:
-	.loc 2 3279 0 discriminator 1
+.L272:
 	cmp	r3, r7
-	beq	.L268
-	.loc 2 3280 0 discriminator 3
+	beq	.L271
 	mul	r0, r2, r3
-	.loc 2 3279 0 discriminator 3
 	adds	r3, r3, #1
-.LVL280:
-	.loc 2 3280 0 discriminator 3
 	str	r1, [r8, r0]
-	b	.L269
-.L284:
+	b	.L272
+.L287:
 	.align	2
-.L283:
+.L286:
 	.word	.LANCHOR1
 	.word	.LANCHOR8
 	.word	.LANCHOR23
@@ -3171,8 +1853,6 @@ FlashEraseBlocks:
 	.word	.LANCHOR26
 	.word	.LANCHOR17
 	.word	.LANCHOR22
-	.cfi_endproc
-.LFE263:
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
 	.section	.text.FlashReadDpCmd,"ax",%progbits
 	.align	1
@@ -3183,140 +1863,63 @@ FlashEraseBlocks:
 	.fpu softvfp
 	.type	FlashReadDpCmd, %function
 FlashReadDpCmd:
-.LFB213:
-	.loc 2 364 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL281:
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 3, -32
-	.cfi_offset 4, -28
-	.cfi_offset 5, -24
-	.cfi_offset 6, -20
-	.cfi_offset 7, -16
-	.cfi_offset 8, -12
-	.cfi_offset 10, -8
-	.cfi_offset 14, -4
-	.loc 2 364 0
 	mov	r5, r2
-.LBB223:
-.LBB224:
-	.loc 3 123 0
-	ldr	r3, .L289
-.LBE224:
-.LBE223:
-	.loc 2 364 0
+	ldr	r3, .L292
 	mov	r6, r1
 	uxtb	lr, r1
 	mov	r7, r0
 	lsrs	r1, r1, #8
-.LVL282:
 	uxtb	r8, r5
-.LBB226:
-.LBB225:
-	.loc 3 123 0
 	ldr	r10, [r3, r0, lsl #3]
-.LVL283:
-	.loc 3 124 0
 	add	r3, r3, r0, lsl #3
 	ldrb	r4, [r3, #4]	@ zero_extendqisi2
-.LVL284:
-.LBE225:
-.LBE226:
-	.loc 2 368 0
-	ldr	r3, .L289+4
+	ldr	r3, .L292+4
 	ldrb	r2, [r3, #16]	@ zero_extendqisi2
-.LVL285:
 	lsls	r4, r4, #8
 	ldrb	ip, [r3, #8]	@ zero_extendqisi2
-	.loc 2 369 0
 	add	r4, r4, r10
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
-	.loc 2 368 0
 	cmp	r2, #1
 	lsr	r2, r6, #16
-	.loc 2 369 0
 	str	ip, [r4, #2056]
-	.loc 2 368 0
-	bne	.L286
-	.loc 2 370 0
+	bne	.L289
 	mov	r10, #0
 	str	r10, [r4, #2052]
-	.loc 2 371 0
 	str	r10, [r4, #2052]
-	.loc 2 372 0
 	str	lr, [r4, #2052]
-	.loc 2 373 0
 	str	r1, [r4, #2052]
-	.loc 2 374 0
 	str	r2, [r4, #2052]
-	.loc 2 375 0
 	str	r3, [r4, #2056]
-	.loc 2 376 0
 	bl	NandcWaitFlashReady
-.LVL286:
-	.loc 2 377 0
 	str	r10, [r4, #2056]
-	.loc 2 378 0
 	str	r10, [r4, #2052]
-	.loc 2 379 0
 	str	r10, [r4, #2052]
-.L288:
-	.loc 2 391 0
+.L291:
 	lsrs	r3, r5, #8
-	.loc 2 392 0
 	lsrs	r5, r5, #16
-.LVL287:
-	.loc 2 390 0
 	str	r8, [r4, #2052]
-	.loc 2 391 0
 	str	r3, [r4, #2052]
-	.loc 2 393 0
 	movs	r3, #48
-	.loc 2 392 0
 	str	r5, [r4, #2052]
-	.loc 2 395 0
 	mov	r1, r6
-	.loc 2 393 0
 	str	r3, [r4, #2056]
-	.loc 2 395 0
 	mov	r0, r7
-	.loc 2 396 0
 	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
-	.cfi_remember_state
-	.cfi_restore 14
-	.cfi_restore 10
-	.cfi_restore 8
-	.cfi_restore 7
-	.cfi_restore 6
-	.cfi_restore 5
-	.cfi_restore 4
-	.cfi_restore 3
-	.cfi_def_cfa_offset 0
-.LVL288:
-	.loc 2 395 0
 	b	FlashSetRandomizer
-.LVL289:
-.L286:
-	.cfi_restore_state
-	.loc 2 386 0
+.L289:
 	str	lr, [r4, #2052]
-	.loc 2 387 0
 	str	r1, [r4, #2052]
-	.loc 2 388 0
 	str	r2, [r4, #2052]
-	.loc 2 389 0
 	str	r3, [r4, #2056]
-	b	.L288
-.L290:
+	b	.L291
+.L293:
 	.align	2
-.L289:
+.L292:
 	.word	.LANCHOR6
 	.word	.LANCHOR7
-	.cfi_endproc
-.LFE213:
 	.size	FlashReadDpCmd, .-FlashReadDpCmd
 	.section	.text.FlashDeInit,"ax",%progbits
 	.align	1
@@ -3327,70 +1930,47 @@ FlashReadDpCmd:
 	.fpu softvfp
 	.type	FlashDeInit, %function
 FlashDeInit:
-.LFB253:
-	.loc 2 2656 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 4, -8
-	.cfi_offset 14, -4
-	.loc 2 2657 0
 	movs	r0, #0
-	.loc 2 2659 0
-	ldr	r4, .L299
-	.loc 2 2657 0
 	bl	NandcWaitFlashReady
-.LVL290:
-	.loc 2 2658 0
 	bl	FlashSetReadRetryDefault
-.LVL291:
-	.loc 2 2659 0
+	ldr	r3, .L303
+	ldr	r2, [r3]
+	ldr	r3, .L303+4
+	cmp	r2, r3
+	bne	.L295
+	movs	r0, #0
+	bl	flash_enter_slc_mode
+.L295:
+	ldr	r4, .L303+8
 	ldrb	r3, [r4]	@ zero_extendqisi2
-	cbz	r3, .L292
-	.loc 2 2659 0 is_stmt 0 discriminator 1
-	ldr	r3, .L299+4
+	cbz	r3, .L296
+	ldr	r3, .L303+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	lsls	r3, r3, #31
-	bpl	.L292
-	.loc 2 2660 0 is_stmt 1
+	bpl	.L296
 	movs	r0, #1
 	bl	FlashSetInterfaceMode
-.LVL292:
-	.loc 2 2661 0
 	movs	r0, #1
 	bl	NandcSetMode
-.LVL293:
-	.loc 2 2662 0
 	movs	r3, #0
 	strb	r3, [r4]
-.L292:
-.LVL294:
-.LBB227:
-.LBB228:
-	.loc 3 343 0
-	ldr	r3, .L299+8
-	.loc 3 344 0
+.L296:
+	ldr	r3, .L303+16
 	movs	r0, #0
-	.loc 3 343 0
 	ldr	r3, [r3]
-.LVL295:
-	.loc 3 344 0
 	str	r0, [r3, #336]
-.LVL296:
-.LBE228:
-.LBE227:
-	.loc 2 2666 0
 	pop	{r4, pc}
-.L300:
+.L304:
 	.align	2
-.L299:
+.L303:
 	.word	.LANCHOR29
+	.word	1446522928
+	.word	.LANCHOR30
 	.word	.LANCHOR24
 	.word	.LANCHOR6
-	.cfi_endproc
-.LFE253:
 	.size	FlashDeInit, .-FlashDeInit
 	.section	.text.NandcRandmzSel,"ax",%progbits
 	.align	1
@@ -3401,28 +1981,17 @@ FlashDeInit:
 	.fpu softvfp
 	.type	NandcRandmzSel, %function
 NandcRandmzSel:
-.LFB278:
-	.loc 3 339 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL297:
-.LBB229:
-	.loc 3 343 0
-	ldr	r3, .L302
+	ldr	r3, .L306
 	ldr	r3, [r3, r0, lsl #3]
-.LVL298:
-	.loc 3 344 0
 	str	r1, [r3, #336]
 	bx	lr
-.L303:
+.L307:
 	.align	2
-.L302:
+.L306:
 	.word	.LANCHOR6
-.LBE229:
-	.cfi_endproc
-.LFE278:
 	.size	NandcRandmzSel, .-NandcRandmzSel
 	.section	.text.NandcTimeCfg,"ax",%progbits
 	.align	1
@@ -3433,46 +2002,27 @@ NandcRandmzSel:
 	.fpu softvfp
 	.type	NandcTimeCfg, %function
 NandcTimeCfg:
-.LFB279:
-	.loc 3 349 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL299:
-	ldr	r3, .L309
-	.loc 3 369 0
+	ldr	r3, .L313
 	cmp	r0, #35
-	.loc 3 371 0
 	ldr	r3, [r3]
-	.loc 3 369 0
-	bhi	.L305
-	.loc 3 371 0
+	bhi	.L309
 	movw	r2, #4193
-.L308:
-.LBB232:
-.LBB233:
-	.loc 3 379 0
+.L312:
 	str	r2, [r3, #4]
 	bx	lr
-.L305:
-.LVL300:
-	.loc 3 373 0
+.L309:
 	cmp	r0, #99
-	.loc 3 375 0
 	ite	hi
 	movwhi	r2, #8322
-	.loc 3 379 0
 	movwls	r2, #4225
-	b	.L308
-.L310:
+	b	.L312
+.L314:
 	.align	2
-.L309:
+.L313:
 	.word	.LANCHOR19
-.LBE233:
-.LBE232:
-	.cfi_endproc
-.LFE279:
 	.size	NandcTimeCfg, .-NandcTimeCfg
 	.section	.text.FlashTimingCfg,"ax",%progbits
 	.align	1
@@ -3483,25 +2033,16 @@ NandcTimeCfg:
 	.fpu softvfp
 	.type	FlashTimingCfg, %function
 FlashTimingCfg:
-.LFB210:
-	.loc 2 308 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL301:
-	.loc 2 318 0
-	ldr	r3, .L312
+	ldr	r3, .L316
 	ldrb	r0, [r3, #21]	@ zero_extendqisi2
-.LVL302:
 	b	NandcTimeCfg
-.LVL303:
-.L313:
+.L317:
 	.align	2
-.L312:
-	.word	.LANCHOR30
-	.cfi_endproc
-.LFE210:
+.L316:
+	.word	.LANCHOR31
 	.size	FlashTimingCfg, .-FlashTimingCfg
 	.section	.text.NandcBchSel,"ax",%progbits
 	.align	1
@@ -3512,83 +2053,44 @@ FlashTimingCfg:
 	.fpu softvfp
 	.type	NandcBchSel, %function
 NandcBchSel:
-.LFB280:
-	.loc 3 400 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL304:
-	.loc 3 405 0
-	ldr	r3, .L322
-	.loc 3 404 0
+	ldr	r3, .L326
 	movs	r1, #0
-.LVL305:
-	.loc 3 400 0
 	push	{r4, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 4, -8
-	.cfi_offset 14, -4
-	.loc 3 408 0
 	movs	r4, #16
-	.loc 3 411 0
 	cmp	r0, r4
-	.loc 3 405 0
 	ldr	r2, [r3]
 	mov	r3, #1
-.LVL306:
 	str	r3, [r2, #8]
-	.loc 3 406 0
-	ldr	r3, .L322+4
-.LVL307:
+	ldr	r3, .L326+4
 	str	r0, [r3]
-.LVL308:
-	.loc 3 407 0
 	mov	r3, r1
-.LVL309:
-	.loc 3 408 0
 	bfi	r3, r4, #8, #8
-.LVL310:
-	.loc 3 410 0
 	bfi	r3, r1, #18, #1
-	.loc 3 411 0
-	bne	.L315
-.L318:
-	.loc 3 412 0
+	bne	.L319
+.L322:
 	bfc	r3, #4, #1
-.L316:
-	.loc 3 422 0
+.L320:
 	orr	r3, r3, #1
-.LVL311:
-	.loc 3 424 0
 	str	r3, [r2, #12]
 	pop	{r4, pc}
-.L315:
-	.loc 3 413 0
+.L319:
 	cmp	r0, #24
-	bne	.L317
-	.loc 3 414 0
+	bne	.L321
 	orr	r3, r3, #16
-.LVL312:
-	b	.L316
-.LVL313:
-.L317:
-	.loc 3 419 0
+	b	.L320
+.L321:
 	cmp	r0, #40
-	.loc 3 418 0
 	orr	r3, r3, #262144
-.LVL314:
 	orr	r3, r3, #16
-.LVL315:
-	.loc 3 419 0
-	bne	.L316
-	b	.L318
-.L323:
+	bne	.L320
+	b	.L322
+.L327:
 	.align	2
-.L322:
+.L326:
 	.word	.LANCHOR19
-	.word	.LANCHOR31
-	.cfi_endproc
-.LFE280:
+	.word	.LANCHOR32
 	.size	NandcBchSel, .-NandcBchSel
 	.section	.text.FlashBchSel,"ax",%progbits
 	.align	1
@@ -3599,25 +2101,16 @@ NandcBchSel:
 	.fpu softvfp
 	.type	FlashBchSel, %function
 FlashBchSel:
-.LFB209:
-	.loc 2 302 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL316:
-	.loc 2 303 0
-	ldr	r3, .L325
+	ldr	r3, .L329
 	strb	r0, [r3]
-	.loc 2 304 0
 	b	NandcBchSel
-.LVL317:
-.L326:
+.L330:
 	.align	2
-.L325:
-	.word	.LANCHOR32
-	.cfi_endproc
-.LFE209:
+.L329:
+	.word	.LANCHOR33
 	.size	FlashBchSel, .-FlashBchSel
 	.section	.text.NandCIrqEnable,"ax",%progbits
 	.align	1
@@ -3628,14 +2121,10 @@ FlashBchSel:
 	.fpu softvfp
 	.type	NandCIrqEnable, %function
 NandCIrqEnable:
-.LFB546:
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	bx	lr
-	.cfi_endproc
-.LFE546:
 	.size	NandCIrqEnable, .-NandCIrqEnable
 	.section	.text.NandCIrqDisable,"ax",%progbits
 	.align	1
@@ -3646,16 +2135,10 @@ NandCIrqEnable:
 	.fpu softvfp
 	.type	NandCIrqDisable, %function
 NandCIrqDisable:
-.LFB282:
-	.loc 3 444 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL318:
 	bx	lr
-	.cfi_endproc
-.LFE282:
 	.size	NandCIrqDisable, .-NandCIrqDisable
 	.section	.text.rk_nandc_get_irq_status,"ax",%progbits
 	.align	1
@@ -3666,20 +2149,11 @@ NandCIrqDisable:
 	.fpu softvfp
 	.type	rk_nandc_get_irq_status, %function
 rk_nandc_get_irq_status:
-.LFB283:
-	.loc 3 452 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL319:
-	.loc 3 454 0
 	ldr	r0, [r0, #372]
-.LVL320:
-	.loc 3 455 0
 	bx	lr
-	.cfi_endproc
-.LFE283:
 	.size	rk_nandc_get_irq_status, .-rk_nandc_get_irq_status
 	.section	.text.rk_nandc_flash_ready,"ax",%progbits
 	.align	1
@@ -3690,14 +2164,10 @@ rk_nandc_get_irq_status:
 	.fpu softvfp
 	.type	rk_nandc_flash_ready, %function
 rk_nandc_flash_ready:
-.LFB542:
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	bx	lr
-	.cfi_endproc
-.LFE542:
 	.size	rk_nandc_flash_ready, .-rk_nandc_flash_ready
 	.section	.text.NandcIqrWaitFlashReady,"ax",%progbits
 	.align	1
@@ -3708,14 +2178,10 @@ rk_nandc_flash_ready:
 	.fpu softvfp
 	.type	NandcIqrWaitFlashReady, %function
 NandcIqrWaitFlashReady:
-.LFB540:
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	bx	lr
-	.cfi_endproc
-.LFE540:
 	.size	NandcIqrWaitFlashReady, .-NandcIqrWaitFlashReady
 	.section	.text.rk_nandc_flash_xfer_completed,"ax",%progbits
 	.align	1
@@ -3726,16 +2192,10 @@ NandcIqrWaitFlashReady:
 	.fpu softvfp
 	.type	rk_nandc_flash_xfer_completed, %function
 rk_nandc_flash_xfer_completed:
-.LFB286:
-	.loc 3 482 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL321:
 	bx	lr
-	.cfi_endproc
-.LFE286:
 	.size	rk_nandc_flash_xfer_completed, .-rk_nandc_flash_xfer_completed
 	.section	.text.NandcSendDumpDataStart,"ax",%progbits
 	.align	1
@@ -3746,51 +2206,28 @@ rk_nandc_flash_xfer_completed:
 	.fpu softvfp
 	.type	NandcSendDumpDataStart, %function
 NandcSendDumpDataStart:
-.LFB287:
-	.loc 3 490 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL322:
-	.loc 3 503 0
 	ldr	r2, [r0, #16]
-	.loc 3 490 0
 	sub	sp, sp, #8
-	.cfi_def_cfa_offset 8
-	.loc 3 501 0
-	ldr	r3, .L334
-.LVL323:
-	.loc 3 503 0
+	ldr	r3, .L338
 	str	r2, [sp, #4]
-	.loc 3 504 0
 	ldr	r2, [sp, #4]
-.LVL324:
 	bfc	r2, #2, #1
 	str	r2, [sp, #4]
-	.loc 3 505 0
 	ldr	r2, [sp, #4]
-.LVL325:
 	str	r2, [r0, #16]
-.LVL326:
-	.loc 3 507 0
 	str	r3, [r0, #8]
-	.loc 3 508 0
 	orr	r3, r3, #4
-.LVL327:
-	.loc 3 509 0
 	str	r3, [r0, #8]
-	.loc 3 510 0
 	add	sp, sp, #8
-	.cfi_def_cfa_offset 0
 	@ sp needed
 	bx	lr
-.L335:
+.L339:
 	.align	2
-.L334:
+.L338:
 	.word	538969130
-	.cfi_endproc
-.LFE287:
 	.size	NandcSendDumpDataStart, .-NandcSendDumpDataStart
 	.section	.text.NandcSendDumpDataDone,"ax",%progbits
 	.align	1
@@ -3801,30 +2238,19 @@ NandcSendDumpDataStart:
 	.fpu softvfp
 	.type	NandcSendDumpDataDone, %function
 NandcSendDumpDataDone:
-.LFB288:
-	.loc 3 513 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL328:
 	sub	sp, sp, #8
-	.cfi_def_cfa_offset 8
-.L337:
-	.loc 3 517 0 discriminator 1
+.L341:
 	ldr	r3, [r0, #8]
 	str	r3, [sp, #4]
-	.loc 3 518 0 discriminator 1
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #11
-	bpl	.L337
-	.loc 3 519 0
+	bpl	.L341
 	add	sp, sp, #8
-	.cfi_def_cfa_offset 0
 	@ sp needed
 	bx	lr
-	.cfi_endproc
-.LFE288:
 	.size	NandcSendDumpDataDone, .-NandcSendDumpDataDone
 	.section	.text.NandcXferStart,"ax",%progbits
 	.align	1
@@ -3835,304 +2261,172 @@ NandcSendDumpDataDone:
 	.fpu softvfp
 	.type	NandcXferStart, %function
 NandcXferStart:
-.LFB289:
-	.loc 3 521 0
-	.cfi_startproc
 	@ args = 8, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL329:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
 	sub	sp, sp, #24
-	.cfi_def_cfa_offset 56
-	.loc 3 521 0
-	mov	r6, r1
-	.loc 3 524 0
+	mov	r7, r1
 	ldr	r1, [sp, #60]
-.LVL330:
-	.loc 3 521 0
 	str	r2, [sp, #4]
-	ldr	r8, [sp, #56]
-	.loc 3 524 0
+	ldr	fp, [sp, #56]
 	cmp	r1, #0
-	bne	.L354
-	.loc 3 524 0 is_stmt 0 discriminator 2
-	adds	ip, r8, #0
+	bne	.L358
+	adds	r5, fp, #0
 	it	ne
-	movne	ip, #1
-.L341:
-.LVL331:
-	.loc 3 528 0 is_stmt 1 discriminator 6
-	ldr	r1, .L359
-	.loc 3 531 0 discriminator 6
+	movne	r5, #1
+.L345:
+	ldr	r1, .L363
 	movs	r4, #0
-.LVL332:
-	.loc 3 528 0 discriminator 6
-	ldr	r5, [r1, r0, lsl #3]
-.LVL333:
-	.loc 3 529 0 discriminator 6
+	ldr	r6, [r1, r0, lsl #3]
 	add	r1, r1, r0, lsl #3
-	.loc 3 534 0 discriminator 6
 	movs	r0, #16
-.LVL334:
-	.loc 3 532 0 discriminator 6
-	ldr	r7, [r5, #12]
-.LVL335:
-	.loc 3 529 0 discriminator 6
+	ldr	r8, [r6, #12]
 	ldrb	r1, [r1, #4]	@ zero_extendqisi2
-.LVL336:
-	.loc 3 534 0 discriminator 6
-	bfi	r7, r0, #8, #8
-.LVL337:
-	.loc 3 536 0 discriminator 6
-	bfi	r7, r4, #3, #1
-	.loc 3 541 0 discriminator 6
-	bfi	r4, r6, #1, #1
-	.loc 3 538 0 discriminator 6
-	bfi	r7, r1, #5, #3
-	.loc 3 543 0 discriminator 6
+	bfi	r8, r0, #8, #8
+	bfi	r8, r4, #3, #1
+	bfi	r4, r7, #1, #1
+	bfi	r8, r1, #5, #3
 	orr	r4, r4, #8
-.LVL338:
-	.loc 3 544 0 discriminator 6
 	movs	r1, #1
-.LVL339:
 	bfi	r4, r1, #5, #2
-.LVL340:
-	.loc 3 547 0 discriminator 6
 	lsrs	r3, r3, r1
-.LVL341:
-	.loc 3 546 0 discriminator 6
 	orr	r4, r4, #536870912
-.LVL342:
 	orr	r4, r4, #1024
-.LVL343:
-	.loc 3 547 0 discriminator 6
 	bfi	r4, r3, #4, #1
-.LVL344:
-	.loc 3 549 0 discriminator 6
-	ldr	r3, .L359+4
+	ldr	r3, .L363+4
 	ldr	r3, [r3]
 	cmp	r3, #3
-	bls	.L342
-.LVL345:
-.LBB234:
-	.loc 3 555 0
-	ldr	r3, [r5, #16]
+	bls	.L346
+	ldr	r3, [r6, #16]
 	str	r3, [sp, #20]
-	.loc 3 556 0
 	ldr	r3, [sp, #20]
 	bfc	r3, #2, #1
 	str	r3, [sp, #20]
-	.loc 3 558 0
-	cmp	ip, #0
-	beq	.L343
-	.loc 3 560 0
-	cmp	r6, #0
-	bne	.L344
-.LVL346:
-.L352:
-	.loc 3 583 0
+	cmp	r5, #0
+	beq	.L347
+	ldr	r5, .L363+8
+	cmp	r7, #0
+	bne	.L348
+.L356:
 	ldr	r2, [sp, #4]
-	ldr	r10, .L359+12
 	adds	r2, r2, #1
 	asrs	r2, r2, #1
 	bfi	r4, r2, #22, #6
-	.loc 3 584 0
-	cmp	r8, #0
-	beq	.L345
-	mov	r0, r8
-.L346:
-	.loc 3 585 0 discriminator 4
-	ldr	r3, [r10, #4]
-	.loc 3 608 0 discriminator 4
+	cmp	fp, #0
+	beq	.L349
+	mov	r0, fp
+.L350:
+	ldr	r3, [r5, #4]
 	add	r1, r0, #63
-	ubfx	fp, r4, #22, #5
+	ubfx	r10, r4, #22, #5
 	bic	r1, r1, #63
-	.loc 3 584 0 discriminator 4
-	str	r0, [r10, #8]
-	.loc 3 608 0 discriminator 4
-	add	r1, r1, fp, lsl #10
-	.loc 3 604 0 discriminator 4
-	str	r0, [r10, #16]
-	.loc 3 608 0 discriminator 4
+	str	r0, [r5, #8]
+	add	r1, r1, r10, lsl #10
+	str	r0, [r5, #16]
 	bic	r0, r0, #63
-	.loc 3 585 0 discriminator 4
-	str	r3, [r10, #12]
-	.loc 3 623 0 discriminator 4
-	clz	r6, r6
-	.loc 3 605 0 discriminator 4
-	str	r3, [r10, #20]
-	.loc 3 623 0 discriminator 4
-	lsrs	r6, r6, #5
-	.loc 3 608 0 discriminator 4
+	str	r3, [r5, #12]
+	clz	r7, r7
+	str	r3, [r5, #20]
+	lsrs	r7, r7, #5
 	bl	flush_dcache_range
-.LVL347:
-	.loc 3 609 0 discriminator 4
-	ldr	r0, [r10, #20]
-.LVL348:
-	.loc 3 610 0 discriminator 4
+	ldr	r0, [r5, #20]
 	add	r1, r0, #63
 	bic	r0, r0, #63
-.LVL349:
 	bic	r1, r1, #63
-	add	r1, r1, fp, lsl #7
+	add	r1, r1, r10, lsl #7
 	bl	flush_dcache_range
-.LVL350:
-	.loc 3 614 0 discriminator 4
 	movs	r3, #1
-	.loc 3 618 0 discriminator 4
 	movs	r2, #16
-	.loc 3 614 0 discriminator 4
-	str	r3, [r10, #24]
-	.loc 3 620 0 discriminator 4
-	tst	r8, #3
-	.loc 3 615 0 discriminator 4
-	ldr	r3, [r10, #16]
-	str	r3, [r5, #20]
-	.loc 3 616 0 discriminator 4
-	ldr	r3, [r10, #20]
 	str	r3, [r5, #24]
-	.loc 3 617 0 discriminator 4
+	tst	fp, #3
+	ldr	r3, [r5, #16]
+	str	r3, [r6, #20]
+	ldr	r3, [r5, #20]
+	str	r3, [r6, #24]
 	mov	r3, #0
 	str	r3, [sp, #20]
-	.loc 3 618 0 discriminator 4
 	ldr	r3, [sp, #20]
 	bfi	r3, r2, #9, #5
-	.loc 3 621 0 discriminator 4
 	it	eq
 	moveq	r2, #2
-	.loc 3 618 0 discriminator 4
 	str	r3, [sp, #20]
-	.loc 3 619 0 discriminator 4
 	ldr	r3, [sp, #20]
 	orr	r3, r3, #448
 	str	r3, [sp, #20]
-	.loc 3 621 0 discriminator 4
 	ittt	eq
 	ldreq	r3, [sp, #20]
 	bfieq	r3, r2, #3, #3
 	streq	r3, [sp, #20]
-	.loc 3 622 0 discriminator 4
 	ldr	r3, [sp, #20]
 	orr	r3, r3, #4
 	str	r3, [sp, #20]
-	.loc 3 623 0 discriminator 4
 	ldr	r3, [sp, #20]
-	bfi	r3, r6, #1, #1
+	bfi	r3, r7, #1, #1
 	str	r3, [sp, #20]
-	.loc 3 624 0 discriminator 4
 	ldr	r3, [sp, #20]
 	orr	r3, r3, #1
 	str	r3, [sp, #20]
-.L343:
-	.loc 3 627 0
+.L347:
 	ldr	r3, [sp, #20]
-	str	r3, [r5, #16]
-.L342:
-.LBE234:
-	.loc 3 629 0
-	str	r7, [r5, #12]
-	.loc 3 630 0
-	str	r4, [r5, #8]
-	.loc 3 631 0
+	str	r3, [r6, #16]
+.L346:
+	str	r8, [r6, #12]
+	str	r4, [r6, #8]
 	orr	r4, r4, #4
-.LVL351:
-	.loc 3 632 0
-	str	r4, [r5, #8]
-	.loc 3 633 0
+	str	r4, [r6, #8]
 	add	sp, sp, #24
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL352:
-.L354:
-	.cfi_restore_state
-	mov	ip, #1
-	b	.L341
-.LVL353:
-.L344:
-.LBB236:
-.LBB235:
-	.loc 3 562 0
-	ldr	r3, .L359+8
-	.loc 3 563 0
-	ldr	r0, [sp, #60]
-	ldr	r10, .L359+12
-	.loc 3 562 0
+.L358:
+	movs	r5, #1
+	b	.L345
+.L348:
+	ldr	r3, .L363+12
+	movs	r1, #0
+	ldr	lr, [r5, #4]
+	mov	r0, r1
 	ldr	r3, [r3]
 	cmp	r3, #25
 	ite	cc
 	movcc	r3, #64
 	movcs	r3, #128
 	str	r3, [sp, #8]
-.LVL354:
-	.loc 3 563 0
 	ldr	r3, [sp, #4]
-.LVL355:
 	lsrs	r3, r3, #1
 	str	r3, [sp, #12]
-	movs	r3, #0
-	mov	ip, r3
-.LVL356:
-.L348:
-	.loc 3 563 0 is_stmt 0 discriminator 1
+	ldr	r3, [sp, #60]
+.L352:
 	ldr	r2, [sp, #12]
-	cmp	ip, r2
-	bcs	.L352
-	.loc 3 565 0 is_stmt 1
-	ldr	r1, [sp, #60]
-	cbz	r1, .L349
-	.loc 3 567 0
-	ldrh	fp, [r0]
-	.loc 3 568 0
-	adds	r0, r0, #4
-.LVL357:
-	.loc 3 567 0
-	ldrh	r1, [r0, #-2]
-.LVL358:
-	bic	lr, r3, #3
-	ldr	r2, [r10, #4]
-	orr	r1, fp, r1, lsl #16
-	str	r1, [r2, lr]
-.L350:
+	cmp	r0, r2
+	bcs	.L356
+	ldr	r2, [sp, #60]
+	bic	r10, r1, #3
+	cbz	r2, .L353
+	ldrh	ip, [r3]
+	adds	r3, r3, #4
+	ldrh	r2, [r3, #-2]
+	orr	ip, ip, r2, lsl #16
+	str	ip, [lr, r10]
+.L354:
 	ldr	r2, [sp, #8]
-	.loc 3 563 0 discriminator 2
-	add	ip, ip, #1
-.LVL359:
-	add	r3, r3, r2
-	b	.L348
-.L349:
-	.loc 3 571 0
-	ldr	r1, [r10, #4]
-	bic	lr, r3, #3
+	adds	r0, r0, #1
+	add	r1, r1, r2
+	b	.L352
+.L353:
 	mov	r2, #-1
-	str	r2, [r1, lr]
+	str	r2, [lr, r10]
+	b	.L354
+.L349:
+	ldr	r3, .L363+8
+	ldr	r0, [r3]
 	b	.L350
-.LVL360:
-.L345:
-.LBE235:
-	.loc 3 584 0 discriminator 1
-	ldr	r0, [r10]
-	b	.L346
-.L360:
+.L364:
 	.align	2
-.L359:
+.L363:
 	.word	.LANCHOR6
-	.word	.LANCHOR33
-	.word	.LANCHOR31
 	.word	.LANCHOR34
-.LBE236:
-	.cfi_endproc
-.LFE289:
+	.word	.LANCHOR35
+	.word	.LANCHOR32
 	.size	NandcXferStart, .-NandcXferStart
 	.section	.text.NandcXferComp,"ax",%progbits
 	.align	1
@@ -4143,130 +2437,81 @@ NandcXferStart:
 	.fpu softvfp
 	.type	NandcXferComp, %function
 NandcXferComp:
-.LFB290:
-	.loc 3 636 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL361:
-	.loc 3 645 0
-	ldr	r3, .L389
-	.loc 3 636 0
+	ldr	r3, .L393
 	push	{r0, r1, r4, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -8
-	.cfi_offset 14, -4
-	.loc 3 645 0
 	ldr	r1, [r3, r0, lsl #3]
-.LVL362:
-	.loc 3 648 0
-	ldr	r3, .L389+4
+	ldr	r3, .L393+4
 	ldr	r0, [r3]
-.LVL363:
 	cmp	r0, #3
-	bls	.L382
-	.loc 3 648 0 is_stmt 0 discriminator 1
+	bls	.L386
 	ldr	r3, [r1, #16]
 	lsls	r2, r3, #29
-	bpl	.L382
-.LVL364:
-.LBB237:
-	.loc 3 655 0 is_stmt 1
+	bpl	.L386
 	ldr	r3, [r1, #16]
 	tst	r3, #2
-	.loc 3 657 0
 	ldr	r3, [r1, #8]
 	str	r3, [sp]
-	.loc 3 655 0
-	beq	.L369
-.L365:
-	.loc 3 658 0
+	beq	.L373
+.L369:
 	ldr	r2, [r1, #28]
 	ldr	r3, [sp]
 	ubfx	r2, r2, #16, #5
 	ubfx	r3, r3, #22, #6
 	cmp	r2, r3
-	bge	.L366
-	.loc 3 660 0
+	bge	.L370
 	cmp	r0, #5
-	bls	.L365
-.LBB238:
-	.loc 3 663 0
+	bls	.L369
 	ldr	r3, [r1]
 	str	r3, [sp, #4]
-	.loc 3 664 0
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #18
-	bpl	.L365
-	.loc 3 664 0 is_stmt 0 discriminator 1
+	bpl	.L369
 	ldr	r3, [sp, #4]
 	lsls	r4, r3, #14
-	bpl	.L365
-.L366:
-.LBE238:
-	.loc 3 735 0 is_stmt 1
-	ldr	r3, .L389+8
+	bpl	.L369
+.L370:
+	ldr	r3, .L393+8
 	movs	r2, #0
 	str	r2, [r3, #24]
-.LVL365:
-.L361:
-.LBE237:
-	.loc 3 745 0
+.L365:
 	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 8
 	@ sp needed
 	pop	{r4, pc}
-.LVL366:
-.L370:
-	.cfi_restore_state
-.LBB239:
-	.loc 3 705 0
+.L374:
 	ldr	r3, [r1, #8]
 	str	r3, [sp]
-.L369:
-	.loc 3 703 0
+.L373:
 	ldr	r3, [sp]
 	lsls	r2, r3, #11
-	bpl	.L370
-	.loc 3 715 0
-	ldr	r4, .L389+12
+	bpl	.L374
+	ldr	r4, .L393+12
 	ldr	r2, [r4]
-	cbz	r2, .L371
-	.loc 3 716 0
+	cbz	r2, .L375
 	mov	r0, r1
 	bl	NandcSendDumpDataStart
-.LVL367:
-.L371:
-	.loc 3 732 0
+.L375:
 	ldr	r3, [r4]
 	cmp	r3, #0
-	beq	.L366
-	.loc 3 733 0
+	beq	.L370
 	mov	r0, r1
 	bl	NandcSendDumpDataDone
-.LVL368:
-	b	.L366
-.LVL369:
-.L382:
-.LBE239:
-	.loc 3 742 0 discriminator 1
+	b	.L370
+.L386:
 	ldr	r3, [r1, #8]
 	str	r3, [sp]
-	.loc 3 743 0 discriminator 1
 	ldr	r3, [sp]
 	lsls	r3, r3, #11
-	bpl	.L382
-	b	.L361
-.L390:
+	bpl	.L386
+	b	.L365
+.L394:
 	.align	2
-.L389:
+.L393:
 	.word	.LANCHOR6
-	.word	.LANCHOR33
 	.word	.LANCHOR34
 	.word	.LANCHOR35
-	.cfi_endproc
-.LFE290:
+	.word	.LANCHOR36
 	.size	NandcXferComp, .-NandcXferComp
 	.section	.text.Ftl_log2,"ax",%progbits
 	.align	1
@@ -4277,41 +2522,22 @@ NandcXferComp:
 	.fpu softvfp
 	.type	Ftl_log2, %function
 Ftl_log2:
-.LFB293:
-	.file 4 "drivers/rknand/rkftl/FtlPlat.c"
-	.loc 4 144 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL370:
-	.loc 4 148 0
 	movs	r1, #0
-	.loc 4 146 0
 	movs	r2, #1
-.LVL371:
-.L392:
-	.loc 4 148 0 discriminator 1
+.L396:
 	cmp	r2, r0
 	uxth	r3, r1
-.LVL372:
 	add	r1, r1, #1
-	bls	.L393
-.LVL373:
-	.loc 4 150 0
+	bls	.L397
 	subs	r0, r3, #1
-.LVL374:
-	.loc 4 152 0
 	uxth	r0, r0
 	bx	lr
-.LVL375:
-.L393:
-	.loc 4 149 0 discriminator 3
+.L397:
 	lsls	r2, r2, #1
-.LVL376:
-	b	.L392
-	.cfi_endproc
-.LFE293:
+	b	.L396
 	.size	Ftl_log2, .-Ftl_log2
 	.section	.text.FtlPrintInfo,"ax",%progbits
 	.align	1
@@ -4322,16 +2548,10 @@ Ftl_log2:
 	.fpu softvfp
 	.type	FtlPrintInfo, %function
 FtlPrintInfo:
-.LFB294:
-	.loc 4 176 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL377:
 	bx	lr
-	.cfi_endproc
-.LFE294:
 	.size	FtlPrintInfo, .-FtlPrintInfo
 	.section	.text.FtlSysBlkNumInit,"ax",%progbits
 	.align	1
@@ -4342,57 +2562,41 @@ FtlPrintInfo:
 	.fpu softvfp
 	.type	FtlSysBlkNumInit, %function
 FtlSysBlkNumInit:
-.LFB295:
-	.loc 4 182 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL378:
-	.loc 4 185 0
-	ldr	r3, .L396
+	ldr	r3, .L400
 	cmp	r0, #24
 	it	cc
 	movcc	r0, #24
-.LVL379:
-	.loc 4 186 0
-	ldr	r2, .L396+4
-	.loc 4 185 0
+	ldr	r2, .L400+4
 	str	r0, [r3]
-	.loc 4 186 0
-	ldr	r3, .L396+8
+	ldr	r3, .L400+8
 	ldrh	r3, [r3]
 	muls	r3, r0, r3
 	str	r3, [r2]
-	.loc 4 187 0
-	ldr	r2, .L396+12
+	ldr	r2, .L400+12
 	ldrh	r2, [r2]
 	subs	r0, r2, r0
-.LVL380:
-	ldr	r2, .L396+16
+	ldr	r2, .L400+16
 	strh	r0, [r2]	@ movhi
-	.loc 4 191 0
 	movs	r0, #0
-	.loc 4 188 0
-	ldr	r2, .L396+20
+	ldr	r2, .L400+20
 	ldr	r2, [r2]
 	subs	r3, r2, r3
-	ldr	r2, .L396+24
+	ldr	r2, .L400+24
 	str	r3, [r2]
-	.loc 4 191 0
 	bx	lr
-.L397:
+.L401:
 	.align	2
-.L396:
-	.word	.LANCHOR36
-	.word	.LANCHOR38
+.L400:
 	.word	.LANCHOR37
-	.word	.LANCHOR40
 	.word	.LANCHOR39
-	.word	.LANCHOR42
+	.word	.LANCHOR38
 	.word	.LANCHOR41
-	.cfi_endproc
-.LFE295:
+	.word	.LANCHOR40
+	.word	.LANCHOR43
+	.word	.LANCHOR42
 	.size	FtlSysBlkNumInit, .-FtlSysBlkNumInit
 	.global	__aeabi_idiv
 	.section	.text.FtlConstantsInit,"ax",%progbits
@@ -4404,73 +2608,36 @@ FtlSysBlkNumInit:
 	.fpu softvfp
 	.type	FtlConstantsInit, %function
 FtlConstantsInit:
-.LFB296:
-	.loc 4 200 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL381:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
 	mov	r10, r0
-	.loc 4 204 0
 	ldrh	r7, [r0, #8]
-	.loc 4 200 0
 	sub	sp, sp, #24
-	.cfi_def_cfa_offset 56
-	.loc 4 204 0
-	ldr	r3, .L425
-	.loc 4 207 0
-	ldr	r1, .L425+4
+	ldr	r3, .L429
+	ldr	r1, .L429+4
 	ldrh	r6, [r10, #14]
-	.loc 4 206 0
-	ldr	r2, .L425+8
-	.loc 4 204 0
+	ldr	r2, .L429+8
 	strh	r7, [r3]	@ movhi
-	.loc 4 205 0
 	ldrh	r3, [r0, #10]
-	.loc 4 206 0
 	ldrh	r0, [r0, #12]
-.LVL382:
-	.loc 4 207 0
 	strh	r6, [r1]	@ movhi
-.LVL383:
 	str	r1, [sp, #20]
-	.loc 4 210 0
-	ldr	r1, .L425+12
-	.loc 4 205 0
-	ldr	r4, .L425+16
-	.loc 4 206 0
+	ldr	r1, .L429+12
+	ldr	r4, .L429+16
 	strh	r0, [r2]	@ movhi
-	.loc 4 209 0
 	movs	r2, #0
-	.loc 4 205 0
 	strh	r3, [r4]	@ movhi
 	str	r4, [sp, #8]
-.LVL384:
-.L399:
-	.loc 4 210 0 discriminator 3
+.L403:
 	strb	r2, [r2, r1]
-	.loc 4 209 0 discriminator 3
 	adds	r2, r2, #1
-.LVL385:
 	cmp	r2, #32
-	bne	.L399
-	.loc 4 211 0
+	bne	.L403
 	ldrh	r1, [r10, #14]
 	ldrh	r2, [r10, #20]
-.LVL386:
 	cmp	r2, r1, lsr #8
-	bcs	.L400
-	.loc 4 215 0
+	bcs	.L404
 	uxtb	r8, r0
 	lsl	r2, r8, #1
 	uxtb	r2, r2
@@ -4478,288 +2645,181 @@ FtlConstantsInit:
 	subs	r2, r3, #1
 	muls	r2, r0, r2
 	str	r2, [sp, #12]
-	.loc 4 213 0
 	movs	r2, #0
-.L401:
-.LVL387:
-	.loc 4 213 0 is_stmt 0 discriminator 1
+.L405:
 	cmp	r2, r0
-	bcs	.L403
+	bcs	.L407
 	ldr	r4, [sp, #12]
-	.loc 4 215 0 is_stmt 1
 	sub	fp, r2, r0
 	uxtb	r1, r2
 	adds	r5, r2, r4
-	ldr	r4, .L425+12
+	ldr	r4, .L429+12
 	add	r4, r4, r5
-	.loc 4 213 0
 	movs	r5, #0
 	mov	lr, r4
-	.loc 4 215 0
-	ldr	r4, .L425+12
-	.loc 4 213 0
+	ldr	r4, .L429+12
 	mov	ip, r5
-	.loc 4 215 0
 	add	fp, fp, r4
-	b	.L404
-.LVL388:
-.L402:
-	.loc 4 216 0 discriminator 3
+	b	.L408
+.L406:
 	add	r4, r8, r1
-	.loc 4 215 0 discriminator 3
 	strb	r1, [fp, r5]
-	.loc 4 216 0 discriminator 3
 	str	r4, [sp, #16]
-	.loc 4 214 0 discriminator 3
 	add	ip, ip, #1
-.LVL389:
-	.loc 4 216 0 discriminator 3
 	ldrb	r4, [sp, #16]	@ zero_extendqisi2
 	strb	r4, [lr, r5]
 	ldr	r4, [sp, #4]
 	add	r1, r1, r4
 	uxtb	r1, r1
-.LVL390:
-.L404:
-	.loc 4 214 0 discriminator 1
+.L408:
 	cmp	ip, r3
 	add	r5, r5, r0
-	bcc	.L402
-	.loc 4 213 0 discriminator 2
+	bcc	.L406
 	adds	r2, r2, #1
-.LVL391:
-	b	.L401
-.LVL392:
-.L403:
-	.loc 4 219 0
+	b	.L405
+.L407:
 	ldr	r2, [sp, #8]
-.LVL393:
 	lsls	r3, r3, #1
-	.loc 4 220 0
 	lsrs	r6, r6, #1
-	.loc 4 219 0
 	strh	r3, [r2]	@ movhi
-	.loc 4 220 0
-	ldr	r3, .L425+4
+	ldr	r3, .L429+4
 	strh	r6, [r3]	@ movhi
-.L400:
-	.loc 4 225 0
-	ldr	r3, .L425+20
+.L404:
+	ldr	r3, .L429+20
 	movs	r2, #5
-	.loc 4 227 0
 	cmp	r7, #1
-	.loc 4 226 0
 	mov	r1, #0
-	.loc 4 225 0
 	strh	r2, [r3]	@ movhi
-	.loc 4 226 0
-	ldr	r2, .L425+24
-	.loc 4 228 0
+	ldr	r2, .L429+24
 	it	eq
 	strheq	r7, [r3]	@ movhi
-	.loc 4 229 0
-	ldr	r3, .L425+28
-	.loc 4 226 0
+	ldr	r3, .L429+28
 	strh	r1, [r2]	@ movhi
-	.loc 4 229 0
 	mov	r1, #4352
 	strh	r1, [r3]	@ movhi
-	.loc 4 230 0
-	ldr	r1, .L425+32
+	ldr	r1, .L429+32
 	ldrb	r1, [r1]	@ zero_extendqisi2
 	str	r1, [sp, #4]
-	cbz	r1, .L406
-	.loc 4 231 0
+	cbz	r1, .L410
 	mov	r1, #384
 	strh	r1, [r3]	@ movhi
-.L406:
-	.loc 4 233 0
+.L410:
 	ldr	r3, [sp, #8]
 	str	r2, [sp, #16]
-	.loc 4 236 0
-	ldr	fp, .L425+120
-	.loc 4 233 0
+	ldr	fp, .L429+120
 	ldrh	r5, [r3]
-	ldr	r3, .L425+36
-	.loc 4 239 0
-	ldr	r8, .L425+124
-	.loc 4 233 0
+	ldr	r3, .L429+36
+	ldr	r8, .L429+124
 	smulbb	r5, r5, r0
 	uxth	r5, r5
 	strh	r5, [r3]	@ movhi
-	.loc 4 234 0
 	ldr	r3, [sp, #20]
 	ldrh	r4, [r3]
-	ldr	r3, .L425+40
+	ldr	r3, .L429+40
 	smulbb	r0, r0, r4
 	uxth	r0, r0
 	strh	r0, [r3]	@ movhi
-	.loc 4 235 0
 	bl	Ftl_log2
-.LVL394:
-	ldr	r3, .L425+44
-	.loc 4 236 0
+	ldr	r3, .L429+44
 	ldrh	r6, [r10, #16]
-	.loc 4 237 0
 	ldrh	r1, [r10, #18]
-	.loc 4 235 0
 	strh	r0, [r3]	@ movhi
-	.loc 4 237 0
-	ldr	r3, .L425+48
-	.loc 4 238 0
+	ldr	r3, .L429+48
 	smulbb	r0, r5, r6
-	.loc 4 236 0
 	strh	r6, [fp]	@ movhi
-	.loc 4 237 0
 	str	r1, [sp, #12]
 	strh	r1, [r3]	@ movhi
-	.loc 4 238 0
-	ldr	r3, .L425+52
+	ldr	r3, .L429+52
 	strh	r0, [r3]	@ movhi
-	.loc 4 239 0
 	ldrh	r3, [r10, #20]
-	.loc 4 240 0
 	mov	r0, r3
-	.loc 4 239 0
 	strh	r3, [r8]	@ movhi
-	.loc 4 240 0
 	str	r3, [sp, #8]
 	bl	Ftl_log2
-.LVL395:
-	.loc 4 245 0
 	ldr	r3, [sp, #8]
-	.loc 4 240 0
 	mov	r7, r0
-	ldr	ip, .L425+128
-	.loc 4 257 0
+	ldr	ip, .L429+128
 	cmp	r4, #1024
-	.loc 4 245 0
-	ldr	lr, .L425+132
-	.loc 4 257 0
+	ldr	lr, .L429+132
 	ldr	r2, [sp, #16]
-	.loc 4 240 0
 	strh	r0, [ip]	@ movhi
-	.loc 4 245 0
 	lsl	r0, r3, #9
-	.loc 4 257 0
 	ldr	r1, [sp, #12]
-	.loc 4 245 0
 	uxth	r0, r0
 	strh	r0, [lr]	@ movhi
-	.loc 4 246 0
 	lsr	r0, r0, #8
-	ldr	lr, .L425+136
-	.loc 4 267 0
+	ldr	lr, .L429+136
 	mul	r1, r3, r1
-	.loc 4 246 0
 	strh	r0, [lr]	@ movhi
-	.loc 4 247 0
 	ldrh	lr, [r10, #26]
 	mov	r10, ip
-.LVL396:
-	ldr	r0, .L425+56
+	ldr	r0, .L429+56
 	strh	lr, [r0]	@ movhi
-	.loc 4 249 0
 	mul	lr, r4, r5
-	ldr	r0, .L425+60
+	ldr	r0, .L429+60
 	str	lr, [r0]
-	.loc 4 258 0
 	itt	hi
 	uxtbhi	r0, r4
 	strhhi	r0, [r2]	@ movhi
-	.loc 4 265 0
 	ldrh	r2, [r2]
 	subs	r2, r4, r2
 	muls	r2, r5, r2
 	muls	r2, r3, r2
 	muls	r6, r2, r6
-	ldr	r2, .L425+64
+	ldr	r2, .L429+64
 	asrs	r6, r6, #11
 	str	r6, [r2]
-	.loc 4 267 0
-	ldr	r6, .L425+28
+	ldr	r6, .L429+28
 	ldrh	r0, [r6]
 	lsls	r0, r0, #3
 	bl	__aeabi_idiv
-.LVL397:
 	uxth	r0, r0
 	mov	r3, r6
-	ldr	r6, .L425+68
-	.loc 4 268 0
+	ldr	r6, .L429+68
 	cmp	r0, #4
-	.loc 4 269 0
 	itt	ls
 	movls	r2, #4
 	strhls	r2, [r6]	@ movhi
-	.loc 4 271 0
 	ldr	r2, [sp, #4]
-	.loc 4 267 0
 	it	hi
 	strhhi	r0, [r6]	@ movhi
-	.loc 4 271 0
-	cbz	r2, .L410
-	.loc 4 272 0
+	cbz	r2, .L414
 	mov	r2, #640
 	strh	r2, [r3]	@ movhi
-.L410:
-	.loc 4 273 0
+.L414:
 	ldrh	r3, [r3]
-	.loc 4 275 0
 	lsls	r4, r4, #6
-	.loc 4 273 0
-	ldr	r2, .L425+72
-	.loc 4 281 0
+	ldr	r2, .L429+72
 	mov	r1, r5
 	ldrh	r0, [r6]
-	.loc 4 273 0
 	asrs	r3, r3, r7
-	.loc 4 275 0
 	adds	r7, r7, #9
 	asrs	r4, r4, r7
-	.loc 4 279 0
-	ldr	r7, .L425+76
-	.loc 4 273 0
+	ldr	r7, .L429+76
 	adds	r3, r3, #2
 	strh	r3, [r2]	@ movhi
-	.loc 4 275 0
-	ldr	r3, .L425+80
+	ldr	r3, .L429+80
 	strh	r4, [r3]	@ movhi
 	uxth	r4, r4
-	.loc 4 279 0
 	mul	r3, r4, r5
-	.loc 4 281 0
 	adds	r4, r4, #8
-	.loc 4 279 0
 	str	r3, [r7]
-	.loc 4 281 0
 	bl	__aeabi_uidiv
-.LVL398:
 	uxtah	r0, r4, r0
-	ldr	r4, .L425+84
-	.loc 4 282 0
+	ldr	r4, .L429+84
 	cmp	r5, #1
-	.loc 4 300 0
-	ldr	r5, .L425+88
-	.loc 4 283 0
+	ldr	r5, .L429+88
 	it	eq
 	addeq	r0, r0, #4
 	str	r0, [r4]
-	.loc 4 286 0
 	ldrh	r0, [r4]
 	bl	FtlSysBlkNumInit
-.LVL399:
-	.loc 4 287 0
 	ldr	r2, [r4]
-	.loc 4 294 0
 	movs	r0, #24
-	.loc 4 287 0
-	ldr	r3, .L425+92
-	.loc 4 300 0
+	ldr	r3, .L429+92
 	ldrb	r5, [r5]	@ zero_extendqisi2
-	.loc 4 287 0
 	str	r2, [r3]
-	.loc 4 289 0
-	ldr	r3, .L425+96
+	ldr	r3, .L429+96
 	ldr	r2, [r3]
 	ldrh	r3, [fp]
 	lsls	r2, r2, #2
@@ -4767,117 +2827,89 @@ FtlConstantsInit:
 	ldrh	r2, [r10]
 	adds	r2, r2, #9
 	lsrs	r3, r3, r2
-	ldr	r2, .L425+100
+	ldr	r2, .L429+100
 	adds	r3, r3, #2
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	.loc 4 294 0
-	ldr	r2, .L425+104
+	ldr	r2, .L429+104
 	strh	r0, [r2]	@ movhi
-	.loc 4 296 0
 	movs	r0, #0
-	ldr	r2, .L425+108
+	ldr	r2, .L429+108
 	str	r0, [r2]
-	.loc 4 298 0
 	ldrh	r0, [r6]
 	adds	r2, r0, #3
 	strh	r2, [r6]	@ movhi
-	.loc 4 299 0
 	ldr	r2, [r7]
 	adds	r4, r2, #3
 	str	r4, [r7]
-	.loc 4 300 0
-	cbz	r5, .L413
-	.loc 4 302 0
+	cbz	r5, .L417
 	adds	r2, r2, #5
-	.loc 4 301 0
 	adds	r0, r0, #4
 	strh	r0, [r6]	@ movhi
-.L424:
-	.loc 4 304 0
+.L428:
 	str	r2, [r7]
-.L414:
-	.loc 4 307 0
-	ldr	r1, .L425+112
+.L418:
+	ldr	r1, .L429+112
 	movs	r2, #0
 	strh	r2, [r1]	@ movhi
-	.loc 4 308 0
-	ldr	r2, .L425+116
+	ldr	r2, .L429+116
 	ldrh	r0, [r2]
-.LVL400:
-	.loc 4 309 0
 	lsrs	r2, r0, #3
-	.loc 4 308 0
 	add	r2, r2, r0, lsl #1
-	.loc 4 339 0
 	movs	r0, #0
-.LVL401:
-	.loc 4 308 0
 	adds	r2, r2, #52
 	add	r3, r2, r3, lsl #2
-.LVL402:
-	.loc 4 310 0
 	ldrh	r2, [r8]
 	cmp	r3, r2, lsl #9
-	.loc 4 311 0
 	itt	cc
 	movcc	r3, #1
 	strhcc	r3, [r1]	@ movhi
-	.loc 4 339 0
 	add	sp, sp, #24
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL403:
-.L413:
-	.cfi_restore_state
-	.loc 4 303 0
+.L417:
 	cmp	r4, #7
-	bhi	.L414
-	.loc 4 304 0
+	bhi	.L418
 	movs	r2, #8
-	b	.L424
-.L426:
+	b	.L428
+.L430:
 	.align	2
-.L425:
-	.word	.LANCHOR43
-	.word	.LANCHOR40
-	.word	.LANCHOR45
-	.word	.LANCHOR46
+.L429:
 	.word	.LANCHOR44
+	.word	.LANCHOR41
+	.word	.LANCHOR46
 	.word	.LANCHOR47
+	.word	.LANCHOR45
 	.word	.LANCHOR48
 	.word	.LANCHOR49
-	.word	.LANCHOR1
-	.word	.LANCHOR37
 	.word	.LANCHOR50
+	.word	.LANCHOR1
+	.word	.LANCHOR38
 	.word	.LANCHOR51
-	.word	.LANCHOR53
+	.word	.LANCHOR52
 	.word	.LANCHOR54
-	.word	.LANCHOR59
-	.word	.LANCHOR42
+	.word	.LANCHOR55
 	.word	.LANCHOR60
+	.word	.LANCHOR43
 	.word	.LANCHOR61
 	.word	.LANCHOR62
-	.word	.LANCHOR64
 	.word	.LANCHOR63
-	.word	.LANCHOR36
-	.word	.LANCHOR8
 	.word	.LANCHOR65
-	.word	.LANCHOR41
+	.word	.LANCHOR64
+	.word	.LANCHOR37
+	.word	.LANCHOR8
 	.word	.LANCHOR66
+	.word	.LANCHOR42
 	.word	.LANCHOR67
 	.word	.LANCHOR68
 	.word	.LANCHOR69
-	.word	.LANCHOR39
-	.word	.LANCHOR52
-	.word	.LANCHOR55
+	.word	.LANCHOR70
+	.word	.LANCHOR40
+	.word	.LANCHOR53
 	.word	.LANCHOR56
 	.word	.LANCHOR57
 	.word	.LANCHOR58
-	.cfi_endproc
-.LFE296:
+	.word	.LANCHOR59
 	.size	FtlConstantsInit, .-FtlConstantsInit
 	.section	.text.IsBlkInVendorPart,"ax",%progbits
 	.align	1
@@ -4888,61 +2920,35 @@ FtlConstantsInit:
 	.fpu softvfp
 	.type	IsBlkInVendorPart, %function
 IsBlkInVendorPart:
-.LFB299:
-	.loc 4 640 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL404:
-	.loc 4 643 0
-	ldr	r3, .L434
+	ldr	r3, .L438
 	ldrh	r3, [r3]
-	cbz	r3, .L433
-.LBB242:
-.LBB243:
-	.loc 4 645 0
-	ldr	r3, .L434+4
-	.loc 4 644 0
-	ldr	r2, .L434+8
-	.loc 4 645 0
+	cbz	r3, .L437
+	ldr	r3, .L438+4
+	ldr	r2, .L438+8
 	ldr	r3, [r3]
 	ldrh	r2, [r2]
 	add	r2, r3, r2, lsl #1
-.L429:
-	.loc 4 644 0
-	cmp	r3, r2
-	bne	.L430
 .L433:
-.LBE243:
-.LBE242:
-	.loc 4 650 0
+	cmp	r3, r2
+	bne	.L434
+.L437:
 	movs	r0, #0
-.LVL405:
 	bx	lr
-.LVL406:
-.L430:
-.LBB245:
-.LBB244:
-	.loc 4 645 0
+.L434:
 	ldrh	r1, [r3], #2
 	cmp	r0, r1
-	bne	.L429
-	.loc 4 646 0
+	bne	.L433
 	movs	r0, #1
-.LVL407:
-.LBE244:
-.LBE245:
-	.loc 4 651 0
 	bx	lr
-.L435:
+.L439:
 	.align	2
-.L434:
-	.word	.LANCHOR70
+.L438:
 	.word	.LANCHOR71
-	.word	.LANCHOR61
-	.cfi_endproc
-.LFE299:
+	.word	.LANCHOR72
+	.word	.LANCHOR62
 	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
 	.section	.text.FtlGetCap,"ax",%progbits
 	.align	1
@@ -4953,20 +2959,16 @@ IsBlkInVendorPart:
 	.fpu softvfp
 	.type	FtlGetCap, %function
 FtlGetCap:
-.LFB534:
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L437
+	ldr	r3, .L441
 	ldr	r0, [r3]
 	bx	lr
-.L438:
+.L442:
 	.align	2
-.L437:
-	.word	.LANCHOR68
-	.cfi_endproc
-.LFE534:
+.L441:
+	.word	.LANCHOR69
 	.size	FtlGetCap, .-FtlGetCap
 	.section	.text.FtlGetCapacity,"ax",%progbits
 	.align	1
@@ -4977,20 +2979,16 @@ FtlGetCap:
 	.fpu softvfp
 	.type	FtlGetCapacity, %function
 FtlGetCapacity:
-.LFB532:
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L440
+	ldr	r3, .L444
 	ldr	r0, [r3]
 	bx	lr
-.L441:
+.L445:
 	.align	2
-.L440:
-	.word	.LANCHOR68
-	.cfi_endproc
-.LFE532:
+.L444:
+	.word	.LANCHOR69
 	.size	FtlGetCapacity, .-FtlGetCapacity
 	.section	.text.ftl_get_density,"ax",%progbits
 	.align	1
@@ -5001,24 +2999,16 @@ FtlGetCapacity:
 	.fpu softvfp
 	.type	ftl_get_density, %function
 ftl_get_density:
-.LFB312:
-	.loc 4 1835 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL408:
-	.loc 4 1837 0
-	ldr	r3, .L443
+	ldr	r3, .L447
 	ldr	r0, [r3]
-.LVL409:
 	bx	lr
-.L444:
+.L448:
 	.align	2
-.L443:
-	.word	.LANCHOR68
-	.cfi_endproc
-.LFE312:
+.L447:
+	.word	.LANCHOR69
 	.size	ftl_get_density, .-ftl_get_density
 	.section	.text.FtlGetLpn,"ax",%progbits
 	.align	1
@@ -5029,22 +3019,16 @@ ftl_get_density:
 	.fpu softvfp
 	.type	FtlGetLpn, %function
 FtlGetLpn:
-.LFB313:
-	.loc 4 1840 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	.loc 4 1842 0
-	ldr	r3, .L446
+	ldr	r3, .L450
 	ldr	r0, [r3]
 	bx	lr
-.L447:
+.L451:
 	.align	2
-.L446:
-	.word	.LANCHOR72
-	.cfi_endproc
-.LFE313:
+.L450:
+	.word	.LANCHOR73
 	.size	FtlGetLpn, .-FtlGetLpn
 	.section	.text.FtlGetCurEraseBlock,"ax",%progbits
 	.align	1
@@ -5055,27 +3039,20 @@ FtlGetLpn:
 	.fpu softvfp
 	.type	FtlGetCurEraseBlock, %function
 FtlGetCurEraseBlock:
-.LFB314:
-	.loc 4 1845 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	.loc 4 1846 0
-	ldr	r2, .L449
-	ldr	r3, .L449+4
+	ldr	r2, .L453
+	ldr	r3, .L453+4
 	ldr	r0, [r2]
 	ldrh	r3, [r3]
-	.loc 4 1847 0
 	muls	r0, r3, r0
 	bx	lr
-.L450:
+.L454:
 	.align	2
-.L449:
-	.word	.LANCHOR73
-	.word	.LANCHOR37
-	.cfi_endproc
-.LFE314:
+.L453:
+	.word	.LANCHOR74
+	.word	.LANCHOR38
 	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
 	.section	.text.FtlGetAllBlockNum,"ax",%progbits
 	.align	1
@@ -5086,27 +3063,20 @@ FtlGetCurEraseBlock:
 	.fpu softvfp
 	.type	FtlGetAllBlockNum, %function
 FtlGetAllBlockNum:
-.LFB315:
-	.loc 4 1850 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	.loc 4 1851 0
-	ldr	r2, .L452
-	ldr	r3, .L452+4
+	ldr	r2, .L456
+	ldr	r3, .L456+4
 	ldrh	r0, [r2]
 	ldrh	r3, [r3]
-	.loc 4 1852 0
 	muls	r0, r3, r0
 	bx	lr
-.L453:
+.L457:
 	.align	2
-.L452:
-	.word	.LANCHOR37
-	.word	.LANCHOR40
-	.cfi_endproc
-.LFE315:
+.L456:
+	.word	.LANCHOR38
+	.word	.LANCHOR41
 	.size	FtlGetAllBlockNum, .-FtlGetAllBlockNum
 	.section	.text.FtlBbmMapBadBlock,"ax",%progbits
 	.align	1
@@ -5117,44 +3087,21 @@ FtlGetAllBlockNum:
 	.fpu softvfp
 	.type	FtlBbmMapBadBlock, %function
 FtlBbmMapBadBlock:
-.LFB316:
-	.file 5 "drivers/rknand/rkftl/FtlBbm.c"
-	.loc 5 5 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL410:
-	.loc 5 12 0
-	ldr	r3, .L455
-	.loc 5 5 0
+	ldr	r3, .L459
 	push	{r0, r1, r2, r4, r5, r6, r7, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -20
-	.cfi_offset 5, -16
-	.cfi_offset 6, -12
-	.cfi_offset 7, -8
-	.cfi_offset 14, -4
-	.loc 5 5 0
 	mov	r5, r0
-	.loc 5 12 0
 	ldrh	r4, [r3]
 	mov	r1, r4
 	bl	__aeabi_uidiv
-.LVL411:
 	mov	r1, r4
-	.loc 5 15 0
-	ldr	r4, .L455+4
-	.loc 5 12 0
+	ldr	r4, .L459+4
 	uxth	r6, r0
-.LVL412:
 	mov	r0, r5
 	bl	__aeabi_uidivmod
-.LVL413:
-	.loc 5 15 0
 	add	r2, r4, r6, lsl #2
 	uxth	r3, r1
-.LVL414:
-	.loc 5 17 0
 	ldr	r2, [r2, #28]
 	lsrs	r1, r3, #5
 	and	r7, r3, #31
@@ -5163,35 +3110,24 @@ FtlBbmMapBadBlock:
 	ldr	r7, [r2, r1, lsl #2]
 	orrs	r0, r0, r7
 	str	r0, [r2, r1, lsl #2]
-.LVL415:
-	.loc 5 18 0
 	mov	r2, r6
 	str	r0, [sp]
 	mov	r1, r5
-	ldr	r0, .L455+8
+	ldr	r0, .L459+8
 	bl	printf
-.LVL416:
-	.loc 5 19 0
 	ldrh	r3, [r4, #6]
-	.loc 5 21 0
 	movs	r0, #0
-	.loc 5 19 0
 	adds	r3, r3, #1
 	strh	r3, [r4, #6]	@ movhi
-	.loc 5 21 0
 	add	sp, sp, #12
-	.cfi_def_cfa_offset 20
 	@ sp needed
 	pop	{r4, r5, r6, r7, pc}
-.LVL417:
-.L456:
+.L460:
 	.align	2
-.L455:
-	.word	.LANCHOR50
-	.word	.LANCHOR74
+.L459:
+	.word	.LANCHOR51
+	.word	.LANCHOR75
 	.word	.LC2
-	.cfi_endproc
-.LFE316:
 	.size	FtlBbmMapBadBlock, .-FtlBbmMapBadBlock
 	.section	.text.FtlBbmIsBadBlock,"ax",%progbits
 	.align	1
@@ -5202,64 +3138,33 @@ FtlBbmMapBadBlock:
 	.fpu softvfp
 	.type	FtlBbmIsBadBlock, %function
 FtlBbmIsBadBlock:
-.LFB317:
-	.loc 5 26 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL418:
-	.loc 5 34 0
-	ldr	r3, .L458
-	.loc 5 26 0
+	ldr	r3, .L462
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 5 26 0
 	mov	r6, r0
-	.loc 5 34 0
 	ldrh	r5, [r3]
-.LVL419:
-	.loc 5 35 0
 	mov	r1, r5
 	bl	__aeabi_uidivmod
-.LVL420:
-	.loc 5 34 0
 	mov	r0, r6
-	.loc 5 35 0
 	uxth	r4, r1
-.LVL421:
-	.loc 5 34 0
 	mov	r1, r5
 	bl	__aeabi_uidiv
-.LVL422:
-	.loc 5 37 0
-	ldr	r3, .L458+4
-	.loc 5 34 0
+	ldr	r3, .L462+4
 	uxth	r0, r0
-	.loc 5 38 0
 	lsrs	r2, r4, #5
 	and	r4, r4, #31
-.LVL423:
-	.loc 5 37 0
 	add	r0, r3, r0, lsl #2
-	.loc 5 38 0
 	ldr	r3, [r0, #28]
 	ldr	r0, [r3, r2, lsl #2]
 	lsrs	r0, r0, r4
-	.loc 5 42 0
 	and	r0, r0, #1
 	pop	{r4, r5, r6, pc}
-.LVL424:
-.L459:
+.L463:
 	.align	2
-.L458:
-	.word	.LANCHOR50
-	.word	.LANCHOR74
-	.cfi_endproc
-.LFE317:
+.L462:
+	.word	.LANCHOR51
+	.word	.LANCHOR75
 	.size	FtlBbmIsBadBlock, .-FtlBbmIsBadBlock
 	.section	.text.FtlBbtInfoPrint,"ax",%progbits
 	.align	1
@@ -5270,14 +3175,10 @@ FtlBbmIsBadBlock:
 	.fpu softvfp
 	.type	FtlBbtInfoPrint, %function
 FtlBbtInfoPrint:
-.LFB536:
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	bx	lr
-	.cfi_endproc
-.LFE536:
 	.size	FtlBbtInfoPrint, .-FtlBbtInfoPrint
 	.section	.text.V2P_block,"ax",%progbits
 	.align	1
@@ -5288,54 +3189,31 @@ FtlBbtInfoPrint:
 	.fpu softvfp
 	.type	V2P_block, %function
 V2P_block:
-.LFB325:
-	.loc 1 5 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL425:
-	.loc 1 5 0
 	push	{r3, r4, r5, r6, r7, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 3, -24
-	.cfi_offset 4, -20
-	.cfi_offset 5, -16
-	.cfi_offset 6, -12
-	.cfi_offset 7, -8
-	.cfi_offset 14, -4
-	.loc 1 5 0
 	mov	r5, r1
-	.loc 1 8 0
-	ldr	r3, .L462
-	.loc 1 5 0
+	ldr	r3, .L466
 	mov	r7, r0
-	.loc 1 8 0
 	ldrh	r6, [r3]
-.LVL426:
 	mov	r1, r6
-.LVL427:
 	bl	__aeabi_uidiv
-.LVL428:
-	ldr	r3, .L462+4
+	ldr	r3, .L466+4
 	smulbb	r5, r6, r5
 	mov	r1, r6
 	ldrh	r4, [r3]
 	smulbb	r4, r4, r0
 	mov	r0, r7
 	bl	__aeabi_uidivmod
-.LVL429:
 	adds	r0, r5, r1
 	add	r0, r0, r4
-	.loc 1 10 0
 	uxth	r0, r0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L463:
+.L467:
 	.align	2
-.L462:
-	.word	.LANCHOR45
-	.word	.LANCHOR50
-	.cfi_endproc
-.LFE325:
+.L466:
+	.word	.LANCHOR46
+	.word	.LANCHOR51
 	.size	V2P_block, .-V2P_block
 	.section	.text.P2V_plane,"ax",%progbits
 	.align	1
@@ -5346,46 +3224,27 @@ V2P_block:
 	.fpu softvfp
 	.type	P2V_plane, %function
 P2V_plane:
-.LFB326:
-	.loc 1 13 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL430:
-	.loc 1 16 0
-	ldr	r3, .L465
-	.loc 1 13 0
+	ldr	r3, .L469
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 1 13 0
 	mov	r6, r0
-	.loc 1 16 0
 	ldrh	r5, [r3]
-.LVL431:
-	ldr	r3, .L465+4
+	ldr	r3, .L469+4
 	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
-.LVL432:
 	smulbb	r4, r0, r5
 	mov	r1, r5
 	mov	r0, r6
 	bl	__aeabi_uidivmod
-.LVL433:
 	add	r1, r1, r4
-	.loc 1 18 0
 	uxth	r0, r1
 	pop	{r4, r5, r6, pc}
-.L466:
+.L470:
 	.align	2
-.L465:
-	.word	.LANCHOR45
-	.word	.LANCHOR50
-	.cfi_endproc
-.LFE326:
+.L469:
+	.word	.LANCHOR46
+	.word	.LANCHOR51
 	.size	P2V_plane, .-P2V_plane
 	.section	.text.P2V_block_in_plane,"ax",%progbits
 	.align	1
@@ -5396,40 +3255,23 @@ P2V_plane:
 	.fpu softvfp
 	.type	P2V_block_in_plane, %function
 P2V_block_in_plane:
-.LFB327:
-	.loc 1 21 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL434:
 	push	{r3, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 3, -8
-	.cfi_offset 14, -4
-	.loc 1 24 0
-	ldr	r3, .L468
+	ldr	r3, .L472
 	ldrh	r1, [r3]
 	bl	__aeabi_uidivmod
-.LVL435:
-	.loc 1 25 0
-	ldr	r3, .L468+4
-	.loc 1 24 0
+	ldr	r3, .L472+4
 	uxth	r0, r1
-.LVL436:
-	.loc 1 25 0
 	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
-.LVL437:
-	.loc 1 27 0
 	uxth	r0, r0
 	pop	{r3, pc}
-.L469:
+.L473:
 	.align	2
-.L468:
-	.word	.LANCHOR50
-	.word	.LANCHOR45
-	.cfi_endproc
-.LFE327:
+.L472:
+	.word	.LANCHOR51
+	.word	.LANCHOR46
 	.size	P2V_block_in_plane, .-P2V_block_in_plane
 	.section	.text.ftl_cmp_data_ver,"ax",%progbits
 	.align	1
@@ -5440,38 +3282,24 @@ P2V_block_in_plane:
 	.fpu softvfp
 	.type	ftl_cmp_data_ver, %function
 ftl_cmp_data_ver:
-.LFB328:
-	.loc 1 31 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL438:
-	.loc 1 34 0
 	cmp	r0, r1
-	bls	.L471
-	.loc 1 36 0
+	bls	.L475
 	subs	r0, r0, r1
-.LVL439:
 	cmp	r0, #-2147483648
 	ite	hi
 	movhi	r0, #0
 	movls	r0, #1
 	bx	lr
-.LVL440:
-.L471:
-	.loc 1 40 0
+.L475:
 	subs	r0, r1, r0
-.LVL441:
 	cmp	r0, #-2147483648
 	ite	ls
 	movls	r0, #0
 	movhi	r0, #1
-.LVL442:
-	.loc 1 44 0
 	bx	lr
-	.cfi_endproc
-.LFE328:
 	.size	ftl_cmp_data_ver, .-ftl_cmp_data_ver
 	.section	.text.FtlFreeSysBlkQueueEmpty,"ax",%progbits
 	.align	1
@@ -5482,25 +3310,18 @@ ftl_cmp_data_ver:
 	.fpu softvfp
 	.type	FtlFreeSysBlkQueueEmpty, %function
 FtlFreeSysBlkQueueEmpty:
-.LFB331:
-	.loc 1 88 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	.loc 1 89 0
-	ldr	r3, .L474
+	ldr	r3, .L478
 	ldrh	r0, [r3, #6]
-	.loc 1 90 0
 	clz	r0, r0
 	lsrs	r0, r0, #5
 	bx	lr
-.L475:
+.L479:
 	.align	2
-.L474:
-	.word	.LANCHOR75
-	.cfi_endproc
-.LFE331:
+.L478:
+	.word	.LANCHOR76
 	.size	FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty
 	.section	.text.FtlFreeSysBlkQueueFull,"ax",%progbits
 	.align	1
@@ -5511,26 +3332,19 @@ FtlFreeSysBlkQueueEmpty:
 	.fpu softvfp
 	.type	FtlFreeSysBlkQueueFull, %function
 FtlFreeSysBlkQueueFull:
-.LFB332:
-	.loc 1 93 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	.loc 1 94 0
-	ldr	r3, .L477
+	ldr	r3, .L481
 	ldrh	r0, [r3, #6]
-	.loc 1 95 0
 	sub	r3, r0, #1024
 	rsbs	r0, r3, #0
 	adcs	r0, r0, r3
 	bx	lr
-.L478:
+.L482:
 	.align	2
-.L477:
-	.word	.LANCHOR75
-	.cfi_endproc
-.LFE332:
+.L481:
+	.word	.LANCHOR76
 	.size	FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull
 	.section	.text.FtlFreeSysBlkQueueIn,"ax",%progbits
 	.align	1
@@ -5541,99 +3355,61 @@ FtlFreeSysBlkQueueFull:
 	.fpu softvfp
 	.type	FtlFreeSysBlkQueueIn, %function
 FtlFreeSysBlkQueueIn:
-.LFB333:
-	.loc 1 98 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL443:
+	subs	r3, r0, #1
+	movw	r2, #65533
+	uxth	r3, r3
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 1 98 0
 	mov	r5, r0
-.LBB246:
-.LBB247:
-	.loc 1 94 0
-	ldr	r4, .L488
-.LBE247:
-.LBE246:
-	.loc 1 101 0
+	cmp	r3, r2
+	bhi	.L483
+	ldr	r4, .L492
 	ldrh	r3, [r4, #6]
 	cmp	r3, #1024
-	beq	.L479
-.LVL444:
-.LBB248:
-	.loc 1 103 0
-	cbz	r1, .L481
-	.loc 1 103 0 is_stmt 0 discriminator 1
-	ldr	r3, .L488+4
+	beq	.L483
+	cbz	r1, .L485
+	ldr	r3, .L492+4
 	ldr	r3, [r3]
-	cbnz	r3, .L481
-.LBB249:
-	.loc 1 104 0 is_stmt 1
+	cbnz	r3, .L485
 	bl	P2V_block_in_plane
-.LVL445:
-	.loc 1 105 0
-	ldr	r3, .L488+8
-	.loc 1 104 0
+	ldr	r3, .L492+8
 	mov	r6, r0
-.LVL446:
-	.loc 1 106 0
 	movs	r2, #1
 	mov	r1, r2
-	.loc 1 105 0
 	ldr	r0, [r3]
 	lsls	r3, r5, #10
 	str	r3, [r0, #4]
-	.loc 1 106 0
 	bl	FlashEraseBlocks
-.LVL447:
-	.loc 1 107 0
-	ldr	r3, .L488+12
+	ldr	r3, .L492+12
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r6, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r6, lsl #1]	@ movhi
-	.loc 1 108 0
-	ldr	r2, .L488+16
+	ldr	r2, .L492+16
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
-.LVL448:
-.L481:
-.LBE249:
-	.loc 1 110 0
+.L485:
 	ldrh	r3, [r4, #6]
 	adds	r3, r3, #1
 	strh	r3, [r4, #6]	@ movhi
-	.loc 1 111 0
 	ldrh	r3, [r4, #4]
 	adds	r2, r3, #4
-	.loc 1 112 0
 	adds	r3, r3, #1
 	ubfx	r3, r3, #0, #10
-	.loc 1 111 0
 	strh	r5, [r4, r2, lsl #1]	@ movhi
-	.loc 1 112 0
 	strh	r3, [r4, #4]	@ movhi
-.LVL449:
-.L479:
+.L483:
 	pop	{r4, r5, r6, pc}
-.L489:
+.L493:
 	.align	2
-.L488:
-	.word	.LANCHOR75
+.L492:
 	.word	.LANCHOR76
 	.word	.LANCHOR77
 	.word	.LANCHOR78
 	.word	.LANCHOR79
-.LBE248:
-	.cfi_endproc
-.LFE333:
+	.word	.LANCHOR80
 	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
 	.section	.text.FtlFreeSysBLkSort,"ax",%progbits
 	.align	1
@@ -5644,178 +3420,46 @@ FtlFreeSysBlkQueueIn:
 	.fpu softvfp
 	.type	FtlFreeSysBLkSort, %function
 FtlFreeSysBLkSort:
-.LFB334:
-	.loc 1 118 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	.loc 1 119 0
-	ldr	r3, .L497
-	.loc 1 123 0
-	movs	r0, #0
-	.loc 1 118 0
+	ldr	r3, .L503
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 1 123 0
-	mov	r6, r0
-	.loc 1 119 0
-	ldrh	r5, [r3, #28]
-	ldr	r3, .L497+4
-	and	r5, r5, #31
-.LVL450:
+	ldrh	r2, [r3, #6]
+	cbz	r2, .L494
+	ldr	r2, .L503+4
+	movs	r6, #0
 	ldrh	r1, [r3, #2]
+	mov	r5, r6
+	ldrh	r4, [r2, #28]
 	ldrh	r2, [r3, #4]
-.LVL451:
-.L491:
-	.loc 1 123 0 discriminator 1
-	uxth	r4, r0
-	adds	r0, r0, #1
-.LVL452:
-	cmp	r5, r4
-	bgt	.L492
-	cbz	r6, .L490
+	and	r4, r4, #31
+.L496:
+	uxth	r0, r6
+	adds	r6, r6, #1
+	cmp	r4, r0
+	bgt	.L497
+	cbz	r5, .L494
 	strh	r1, [r3, #2]	@ movhi
 	strh	r2, [r3, #4]	@ movhi
-.L490:
+.L494:
 	pop	{r4, r5, r6, pc}
-.LVL453:
-.L492:
-	.loc 1 124 0 discriminator 3
-	adds	r4, r1, #4
-.LVL454:
-	.loc 1 125 0 discriminator 3
+.L497:
+	adds	r0, r1, #4
 	adds	r1, r1, #1
-	.loc 1 124 0 discriminator 3
-	ldrh	r6, [r3, r4, lsl #1]
-.LVL455:
-	.loc 1 126 0 discriminator 3
-	adds	r4, r2, #4
-	.loc 1 125 0 discriminator 3
+	ldrh	r5, [r3, r0, lsl #1]
+	adds	r0, r2, #4
 	ubfx	r1, r1, #0, #10
-	.loc 1 126 0 discriminator 3
-	strh	r6, [r3, r4, lsl #1]	@ movhi
-.LVL456:
-	movs	r6, #1
-.LVL457:
-	.loc 1 127 0 discriminator 3
-	add	r2, r2, r6
+	strh	r5, [r3, r0, lsl #1]	@ movhi
+	movs	r5, #1
+	add	r2, r2, r5
 	ubfx	r2, r2, #0, #10
-	b	.L491
-.L498:
+	b	.L496
+.L504:
 	.align	2
-.L497:
-	.word	.LANCHOR80
-	.word	.LANCHOR75
-	.cfi_endproc
-.LFE334:
-	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
-	.section	.text.remove_from_free_sys_Queue,"ax",%progbits
-	.align	1
-	.global	remove_from_free_sys_Queue
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	remove_from_free_sys_Queue, %function
-remove_from_free_sys_Queue:
-.LFB335:
-	.loc 1 161 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL458:
-	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 1 161 0
-	mov	r1, r0
-.LBB250:
-.LBB251:
-	.loc 1 89 0
-	ldr	r5, .L506
-	ldrh	r3, [r5, #6]
-.LBE251:
-.LBE250:
-	.loc 1 166 0
-	cbz	r3, .L505
-	.loc 1 168 0
-	ldrh	r0, [r5, #2]
-.LVL459:
-	movs	r4, #0
-.L501:
-.LVL460:
-	.loc 1 167 0 discriminator 1
-	cmp	r4, r3
-	bcc	.L503
-.LVL461:
-.L505:
-	.loc 1 162 0
-	movs	r0, #0
-	pop	{r3, r4, r5, pc}
-.LVL462:
 .L503:
-	.loc 1 168 0
-	adds	r2, r4, r0
-	ubfx	r2, r2, #0, #10
-	adds	r2, r2, #4
-	ldrh	r2, [r5, r2, lsl #1]
-	cmp	r2, r1
-	bne	.L502
-.LVL463:
-	.loc 1 170 0
-	ldr	r0, .L506+4
-	bl	printf
-.LVL464:
-	.loc 1 171 0
-	ldrh	r3, [r5, #2]
-	.loc 1 169 0
-	movs	r0, #1
-	.loc 1 171 0
-	adds	r2, r3, #4
-	add	r4, r4, r3
-.LVL465:
-	.loc 1 172 0
-	adds	r3, r3, #1
-	.loc 1 171 0
-	ldrh	r2, [r5, r2, lsl #1]
-	.loc 1 172 0
-	ubfx	r3, r3, #0, #10
-	.loc 1 171 0
-	ubfx	r4, r4, #0, #10
-	.loc 1 172 0
-	strh	r3, [r5, #2]	@ movhi
-	.loc 1 171 0
-	adds	r4, r4, #4
-	.loc 1 173 0
-	ldrh	r3, [r5, #6]
-	.loc 1 171 0
-	strh	r2, [r5, r4, lsl #1]	@ movhi
-	.loc 1 173 0
-	subs	r3, r3, #1
-	strh	r3, [r5, #6]	@ movhi
-	.loc 1 174 0
-	pop	{r3, r4, r5, pc}
-.LVL466:
-.L502:
-	.loc 1 167 0 discriminator 2
-	adds	r4, r4, #1
-.LVL467:
-	b	.L501
-.L507:
-	.align	2
-.L506:
-	.word	.LANCHOR75
-	.word	.LC3
-	.cfi_endproc
-.LFE335:
-	.size	remove_from_free_sys_Queue, .-remove_from_free_sys_Queue
+	.word	.LANCHOR76
+	.word	.LANCHOR81
+	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
 	.section	.text.FtlFreeSysBlkQueueOut,"ax",%progbits
 	.align	1
 	.global	FtlFreeSysBlkQueueOut
@@ -5825,136 +3469,127 @@ remove_from_free_sys_Queue:
 	.fpu softvfp
 	.type	FtlFreeSysBlkQueueOut, %function
 FtlFreeSysBlkQueueOut:
-.LFB336:
-	.loc 1 182 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL468:
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 3, -32
-	.cfi_offset 4, -28
-	.cfi_offset 5, -24
-	.cfi_offset 6, -20
-	.cfi_offset 7, -16
-	.cfi_offset 8, -12
-	.cfi_offset 10, -8
-	.cfi_offset 14, -4
-.LBB252:
-.LBB253:
-	.loc 1 89 0
-	ldr	r4, .L518
+	ldr	r4, .L515
 	mov	r6, r4
-.LVL469:
-.L509:
+.L506:
 	ldrh	r1, [r4, #6]
-.LBE253:
-.LBE252:
-	.loc 1 187 0
 	cmp	r1, #0
-	beq	.L510
-	.loc 1 188 0
+	beq	.L507
 	ldrh	r3, [r4, #2]
-	.loc 1 189 0
 	subs	r1, r1, #1
 	strh	r1, [r4, #6]	@ movhi
-	.loc 1 188 0
 	adds	r2, r3, #4
-	.loc 1 190 0
 	adds	r3, r3, #1
 	ubfx	r3, r3, #0, #10
-	.loc 1 188 0
 	ldrh	r5, [r4, r2, lsl #1]
-.LVL470:
-	.loc 1 190 0
 	strh	r3, [r4, #2]	@ movhi
-	.loc 1 191 0
-	ldr	r3, .L518+4
+	ldr	r3, .L515+4
 	ldr	r10, [r3]
 	cmp	r10, #0
-	bne	.L511
-.LBB254:
-	.loc 1 193 0
-	ldr	r8, .L518+28
-	.loc 1 192 0
+	bne	.L508
+	ldr	r8, .L515+28
 	mov	r0, r5
 	bl	P2V_block_in_plane
-.LVL471:
 	mov	r7, r0
-.LVL472:
-	.loc 1 193 0
 	lsls	r3, r5, #10
 	ldr	r0, [r8]
 	str	r3, [r0, #4]
-	.loc 1 194 0
-	ldr	r3, .L518+8
+	ldr	r3, .L515+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L512
-	.loc 1 195 0
+	cbz	r3, .L509
 	movs	r2, #1
 	mov	r1, r10
 	bl	FlashEraseBlocks
-.LVL473:
-.L512:
-	.loc 1 196 0
+.L509:
 	movs	r2, #1
 	ldr	r0, [r8]
 	mov	r1, r2
 	bl	FlashEraseBlocks
-.LVL474:
-	.loc 1 197 0
-	ldr	r3, .L518+12
+	ldr	r3, .L515+12
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r7, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r7, lsl #1]	@ movhi
-	.loc 1 198 0
-	ldr	r2, .L518+16
+	ldr	r2, .L515+16
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
-.LVL475:
-.L511:
-.LBE254:
-	.loc 1 205 0
-	cbnz	r5, .L514
-	.loc 1 206 0
+.L508:
+	subs	r3, r5, #1
+	movw	r2, #65533
+	uxth	r3, r3
+	cmp	r3, r2
+	bls	.L511
 	ldrh	r2, [r6, #6]
 	mov	r1, r5
-	ldr	r0, .L518+20
+	ldr	r0, .L515+20
 	bl	printf
-.LVL476:
-	.loc 1 208 0
-	b	.L509
-.LVL477:
-.L510:
-	.loc 1 202 0
-	ldr	r0, .L518+24
+	b	.L506
+.L507:
+	ldr	r0, .L515+24
 	bl	printf
-.LVL478:
-.L513:
-	b	.L513
-.LVL479:
-.L514:
-	.loc 1 211 0
+.L510:
+	b	.L510
+.L511:
 	mov	r0, r5
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.LVL480:
-.L519:
+.L516:
 	.align	2
-.L518:
-	.word	.LANCHOR75
+.L515:
 	.word	.LANCHOR76
+	.word	.LANCHOR77
 	.word	.LANCHOR8
-	.word	.LANCHOR78
 	.word	.LANCHOR79
-	.word	.LC5
+	.word	.LANCHOR80
 	.word	.LC4
-	.word	.LANCHOR77
-	.cfi_endproc
-.LFE336:
+	.word	.LC3
+	.word	.LANCHOR78
 	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
+	.section	.text.test_node_in_list,"ax",%progbits
+	.align	1
+	.global	test_node_in_list
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	test_node_in_list, %function
+test_node_in_list:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L522
+	push	{r4, r5, lr}
+	movw	r5, #65535
+	ldr	r2, [r0]
+	ldr	r4, [r3]
+	subs	r3, r2, r4
+	asrs	r0, r3, #1
+	ldr	r3, .L522+4
+	muls	r3, r0, r3
+	movs	r0, #6
+	uxth	r3, r3
+.L519:
+	cmp	r3, r1
+	beq	.L520
+	ldrh	r3, [r2]
+	cmp	r3, r5
+	beq	.L521
+	mla	r2, r0, r3, r4
+	b	.L519
+.L520:
+	movs	r0, #1
+	pop	{r4, r5, pc}
+.L521:
+	movs	r0, #0
+	pop	{r4, r5, pc}
+.L523:
+	.align	2
+.L522:
+	.word	.LANCHOR82
+	.word	-1431655765
+	.size	test_node_in_list, .-test_node_in_list
 	.section	.text.insert_data_list,"ax",%progbits
 	.align	1
 	.global	insert_data_list
@@ -5964,243 +3599,126 @@ FtlFreeSysBlkQueueOut:
 	.fpu softvfp
 	.type	insert_data_list, %function
 insert_data_list:
-.LFB339:
-	.loc 1 256 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL481:
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 48
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 1 267 0
-	ldr	r5, .L537
-	ldrh	r3, [r5]
-	cmp	r3, r0
-	bls	.L522
-.LVL482:
-.LBB257:
-.LBB258:
-	.loc 1 272 0
-	ldr	r6, .L537+4
-	movs	r4, #6
-	muls	r4, r0, r4
-	.loc 1 275 0
-	ldr	r2, .L537+8
-	.loc 1 273 0
+	ldr	r3, .L540
+	ldrh	lr, [r3]
+	cmp	lr, r0
+	bls	.L526
+	ldr	r3, .L540+4
+	movs	r5, #6
+	ldr	r4, [r3]
+	mul	r3, r5, r0
+	str	r3, [sp, #4]
+	adds	r1, r4, r3
+	ldr	r2, [sp, #4]
 	movw	r3, #65535
-	.loc 1 272 0
-	ldr	ip, [r6]
-	mov	r8, r6
-	add	r1, ip, r4
-.LVL483:
-	.loc 1 273 0
 	strh	r3, [r1, #2]	@ movhi
-	strh	r3, [ip, r4]	@ movhi
-	.loc 1 275 0
-	ldr	r3, [r2]
-	cbnz	r3, .L523
-.L536:
-	.loc 1 324 0
-	str	r1, [r2]
-	b	.L522
-.L523:
-	.loc 1 280 0
-	ldr	r2, .L537+12
-	lsls	r7, r0, #1
-	.loc 1 281 0
-	ldrh	r6, [r1, #4]
-	.loc 1 280 0
-	ldr	lr, [r2]
-	ldrh	r2, [lr, r0, lsl #1]
-.LVL484:
-	.loc 1 282 0
-	cmp	r6, #0
-	beq	.L533
-	.loc 1 281 0
-	muls	r2, r6, r2
-.LVL485:
-.L535:
-	.loc 1 286 0
-	ldr	fp, [r8]
-	.loc 1 289 0
-	ldrh	r5, [r5]
-	.loc 1 283 0
-	str	r2, [sp, #4]
-.LVL486:
-	.loc 1 286 0
-	sub	r2, r3, fp
-.LVL487:
-	asr	r8, r2, #1
-	ldr	r2, .L537+16
-	.loc 1 289 0
-	str	r5, [sp, #8]
-	.loc 1 301 0
-	ldr	r5, .L537+20
-	.loc 1 286 0
-	mul	r2, r2, r8
-	.loc 1 301 0
-	ldr	r8, [r5]
-	.loc 1 286 0
-	uxth	r2, r2
-.LVL488:
-	.loc 1 301 0
-	add	r5, r8, r7
-	str	r5, [sp, #12]
-	.loc 1 263 0
-	movs	r5, #0
-.LVL489:
-.L531:
-	.loc 1 288 0
-	adds	r5, r5, #1
-.LVL490:
-	.loc 1 289 0
-	ldr	r7, [sp, #8]
-	.loc 1 288 0
-	uxth	r5, r5
-.LVL491:
-	.loc 1 289 0
-	cmp	r5, r7
-	bhi	.L522
-	.loc 1 292 0
-	cmp	r0, r2
-	beq	.L522
-	.loc 1 295 0
-	ldrh	r7, [lr, r2, lsl #1]
-	lsl	r10, r2, #1
-	mov	r6, r7
-.LVL492:
-	.loc 1 296 0
-	ldrh	r7, [r3, #4]
-.LVL493:
-	.loc 1 297 0
-	cbz	r7, .L534
-	.loc 1 296 0
-	muls	r7, r6, r7
-.LVL494:
-.L526:
-	.loc 1 300 0
-	ldr	r6, [sp, #4]
-.LVL495:
-	cmp	r6, r7
+	strh	r3, [r4, r2]	@ movhi
+	ldr	r3, .L540+8
+	ldr	ip, [r3]
+	cmp	ip, #0
 	bne	.L527
-	.loc 1 301 0
-	ldr	r6, [sp, #12]
-	ldrh	r10, [r8, r10]
-	ldrh	r7, [r6]
-.LVL496:
-	cmp	r10, r7
-	bcc	.L529
-.L528:
-	.loc 1 319 0
-	strh	r2, [ip, r4]	@ movhi
-.LVL497:
-	.loc 1 320 0
-	ldrh	r2, [r3, #2]
-.LVL498:
-	strh	r2, [r1, #2]	@ movhi
-.LVL499:
-	.loc 1 322 0
-	ldr	r2, .L537+8
-	ldr	r4, [r2]
-	cmp	r3, r4
-	bne	.L532
-	.loc 1 323 0
-	strh	r0, [r3, #2]	@ movhi
-	b	.L536
-.LVL500:
-.L533:
-	.loc 1 283 0
-	mov	r2, #-1
-.LVL501:
-	b	.L535
-.LVL502:
-.L534:
-	.loc 1 298 0
-	mov	r7, #-1
-.LVL503:
-	b	.L526
-.LVL504:
-.L527:
-	.loc 1 305 0
-	bcc	.L528
-.LVL505:
-.L529:
-	.loc 1 308 0
-	ldrh	r7, [r3]
-	movw	r6, #65535
-	cmp	r7, r6
-	bne	.L530
-	.loc 1 309 0
-	strh	r2, [r1, #2]	@ movhi
-.LVL506:
-	.loc 1 310 0
-	strh	r0, [r3]	@ movhi
-	.loc 1 311 0
-	ldr	r3, .L537+24
-.LVL507:
+.L539:
 	str	r1, [r3]
-.LVL508:
-.L522:
-.LBE258:
-.LBE257:
-	.loc 1 330 0
+.L526:
 	movs	r0, #0
-.LVL509:
 	add	sp, sp, #16
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL510:
+.L527:
+	ldr	r3, .L540+12
+	lsls	r2, r0, #1
+	ldr	r3, [r3]
+	str	r3, [sp, #8]
+	ldrh	r6, [r3, r0, lsl #1]
+	ldrh	r3, [r1, #4]
+	cbz	r3, .L537
+	mul	fp, r3, r6
+.L528:
+	sub	r3, ip, r4
+	asrs	r6, r3, #1
+	ldr	r3, .L540+16
+	muls	r3, r6, r3
+	ldr	r6, .L540+20
+	ldr	r8, [r6]
+	movs	r6, #0
+	uxth	r3, r3
+	add	r2, r8, r2
+	str	r2, [sp, #12]
+	mov	r2, ip
+.L535:
+	adds	r6, r6, #1
+	uxth	r6, r6
+	cmp	lr, r6
+	bcc	.L526
+	cmp	r3, r0
+	beq	.L526
+	ldr	r7, [sp, #8]
+	lsl	r10, r3, #1
+	ldrh	r7, [r7, r3, lsl #1]
+	mov	r5, r7
+	ldrh	r7, [r2, #4]
+	cbz	r7, .L538
+	muls	r7, r5, r7
 .L530:
-	.cfi_restore_state
-.LBB260:
-.LBB259:
-	.loc 1 316 0
-	movs	r3, #6
-.LVL511:
-	mov	r2, r7
-.LVL512:
-	mla	r3, r3, r7, fp
-.LVL513:
-	b	.L531
-.LVL514:
-.L532:
-	.loc 1 326 0
-	ldrh	r4, [r3, #2]
-	ldr	r2, .L537+4
-	ldr	r1, [r2]
-.LVL515:
-	movs	r2, #6
-.LVL516:
-	muls	r2, r4, r2
-.LVL517:
-	strh	r0, [r1, r2]	@ movhi
-	.loc 1 327 0
-	strh	r0, [r3, #2]	@ movhi
-	b	.L522
+	cmp	fp, r7
+	bne	.L531
+	ldr	r5, [sp, #12]
+	ldrh	r10, [r8, r10]
+	ldrh	r7, [r5]
+	cmp	r10, r7
+	bcc	.L533
+.L532:
+	ldr	r5, [sp, #4]
+	cmp	r2, ip
+	strh	r3, [r4, r5]	@ movhi
+	ldrh	r3, [r2, #2]
+	strh	r3, [r1, #2]	@ movhi
+	bne	.L536
+	strh	r0, [r2, #2]	@ movhi
+	ldr	r3, .L540+8
+	b	.L539
+.L537:
+	mov	fp, #-1
+	b	.L528
 .L538:
+	mov	r7, #-1
+	b	.L530
+.L531:
+	bcc	.L532
+.L533:
+	ldrh	r7, [r2]
+	movw	r5, #65535
+	cmp	r7, r5
+	bne	.L534
+	strh	r3, [r1, #2]	@ movhi
+	strh	r0, [r2]	@ movhi
+	ldr	r3, .L540+24
+	b	.L539
+.L534:
+	movs	r3, #6
+	mla	r2, r3, r7, r4
+	mov	r3, r7
+	b	.L535
+.L536:
+	ldrh	r1, [r2, #2]
+	movs	r3, #6
+	muls	r3, r1, r3
+	strh	r0, [r4, r3]	@ movhi
+	strh	r0, [r2, #2]	@ movhi
+	b	.L526
+.L541:
 	.align	2
-.L537:
-	.word	.LANCHOR39
-	.word	.LANCHOR81
+.L540:
+	.word	.LANCHOR40
 	.word	.LANCHOR82
 	.word	.LANCHOR83
-	.word	-1431655765
-	.word	.LANCHOR78
 	.word	.LANCHOR84
-.LBE259:
-.LBE260:
-	.cfi_endproc
-.LFE339:
+	.word	-1431655765
+	.word	.LANCHOR79
+	.word	.LANCHOR85
 	.size	insert_data_list, .-insert_data_list
 	.section	.text.INSERT_DATA_LIST,"ax",%progbits
 	.align	1
@@ -6211,69 +3729,38 @@ insert_data_list:
 	.fpu softvfp
 	.type	INSERT_DATA_LIST, %function
 INSERT_DATA_LIST:
-.LFB338:
-	.loc 1 225 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL518:
 	push	{r3, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 3, -8
-	.cfi_offset 14, -4
-	.loc 1 226 0
 	bl	insert_data_list
-.LVL519:
-	.loc 1 227 0
-	ldr	r2, .L541
+	ldr	r2, .L544
 	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	.loc 1 228 0
-	ldr	r2, .L541+4
+	ldr	r2, .L544+4
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bcs	.L539
-.LVL520:
-.LBB263:
-.LBB264:
-	ldr	r1, .L541+8
-	movs	r2, #228
-	ldr	r0, .L541+12
+	bcs	.L542
+	ldr	r1, .L544+8
+	movs	r2, #210
+	ldr	r0, .L544+12
 	bl	printf
-.LVL521:
-	ldr	r1, .L541+16
-	ldr	r0, .L541+20
-.LBE264:
-.LBE263:
-	.loc 1 229 0
+	ldr	r1, .L544+16
+	ldr	r0, .L544+20
 	pop	{r3, lr}
-	.cfi_remember_state
-	.cfi_restore 14
-	.cfi_restore 3
-	.cfi_def_cfa_offset 0
-.LBB266:
-.LBB265:
-	.loc 1 228 0
 	b	printf
-.LVL522:
-.L539:
-	.cfi_restore_state
-	pop	{r3, pc}
 .L542:
+	pop	{r3, pc}
+.L545:
 	.align	2
-.L541:
-	.word	.LANCHOR85
-	.word	.LANCHOR39
+.L544:
 	.word	.LANCHOR86
+	.word	.LANCHOR40
+	.word	.LANCHOR87
+	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC8
-.LBE265:
-.LBE266:
-	.cfi_endproc
-.LFE338:
 	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
 	.section	.text.insert_free_list,"ax",%progbits
 	.align	1
@@ -6284,146 +3771,75 @@ INSERT_DATA_LIST:
 	.fpu softvfp
 	.type	insert_free_list, %function
 insert_free_list:
-.LFB340:
-	.loc 1 333 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 8
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL523:
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 1 339 0
 	movw	r1, #65535
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	cmp	r0, r1
-	beq	.L544
-	.loc 1 342 0
-	ldr	r4, .L550
+	beq	.L547
+	ldr	r3, .L553
 	mov	r10, #6
-	mul	r6, r10, r0
-	.loc 1 345 0
-	ldr	r2, .L550+4
-	.loc 1 342 0
-	ldr	r7, [r4]
-	str	r4, [sp]
-	mov	ip, r2
-	adds	r5, r7, r6
-.LVL524:
-	.loc 1 343 0
+	mul	r7, r10, r0
+	ldr	r4, [r3]
+	ldr	r3, .L553+4
+	adds	r5, r4, r7
+	ldr	r6, [r3]
+	mov	lr, r3
 	strh	r1, [r5, #2]	@ movhi
-	strh	r1, [r7, r6]	@ movhi
-	.loc 1 345 0
-	ldr	r3, [r2]
-	cbnz	r3, .L545
-	.loc 1 346 0
-	str	r5, [r2]
-.LVL525:
-.L544:
-	.loc 1 379 0
+	strh	r1, [r4, r7]	@ movhi
+	cbnz	r6, .L548
+	str	r5, [r3]
+.L547:
 	movs	r0, #0
-.LVL526:
-	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL527:
-.L545:
-	.cfi_restore_state
-	.loc 1 350 0
-	ldr	r2, .L550+8
-	ldr	r8, [r2]
-	ldrh	r2, [r8, r0, lsl #1]
-	str	r2, [sp, #4]
-.LVL528:
-	.loc 1 352 0
-	ldr	r2, [sp]
-	ldr	lr, [r2]
-	ldr	r2, .L550+12
-	sub	fp, r3, lr
-	asr	fp, fp, #1
-	mul	r2, r2, fp
-	.loc 1 359 0
+.L548:
+	ldr	r3, .L553+8
+	subs	r2, r6, r4
 	mov	fp, r1
-	.loc 1 352 0
+	ldr	ip, [r3]
+	asrs	r3, r2, #1
+	ldr	r2, .L553+12
+	ldrh	r8, [ip, r0, lsl #1]
+	muls	r2, r3, r2
+	mov	r3, r6
 	uxth	r2, r2
-.LVL529:
-.L548:
-	.loc 1 356 0
-	ldrh	r1, [r8, r2, lsl #1]
-	mov	r4, r1
-	ldr	r1, [sp, #4]
-	cmp	r4, r1
-	bcs	.L546
-	.loc 1 359 0
+.L551:
+	ldrh	r1, [ip, r2, lsl #1]
+	cmp	r1, r8
+	bcs	.L549
 	ldrh	r1, [r3]
 	cmp	r1, fp
-	bne	.L547
-	.loc 1 360 0
+	bne	.L550
 	strh	r2, [r5, #2]	@ movhi
-.LVL530:
-	.loc 1 361 0
 	strh	r0, [r3]	@ movhi
-	.loc 1 362 0
-	b	.L544
-.LVL531:
-.L547:
-	.loc 1 365 0
-	mla	r3, r10, r1, lr
-.LVL532:
-	.loc 1 355 0
+	b	.L547
+.L550:
+	mla	r3, r10, r1, r4
 	mov	r2, r1
-.LVL533:
-	b	.L548
-.LVL534:
-.L546:
-	.loc 1 368 0
+	b	.L551
+.L549:
 	ldrh	r1, [r3, #2]
+	cmp	r3, r6
 	strh	r1, [r5, #2]	@ movhi
-.LVL535:
-	.loc 1 369 0
-	strh	r2, [r7, r6]	@ movhi
-	.loc 1 371 0
-	ldr	r2, [ip]
-.LVL536:
-	cmp	r3, r2
-	bne	.L549
-	.loc 1 372 0
-	strh	r0, [r3, #2]	@ movhi
-.LVL537:
-	.loc 1 373 0
-	str	r5, [ip]
-	b	.L544
-.LVL538:
-.L549:
-	.loc 1 375 0
-	ldrh	r5, [r3, #2]
-.LVL539:
-	ldr	r2, [sp]
-	ldr	r1, [r2]
-	movs	r2, #6
-	muls	r2, r5, r2
-	strh	r0, [r1, r2]	@ movhi
-.LVL540:
-	.loc 1 376 0
-	strh	r0, [r3, #2]	@ movhi
-	b	.L544
-.L551:
+	it	ne
+	ldrhne	r1, [r3, #2]
+	strh	r2, [r4, r7]	@ movhi
+	iteet	ne
+	movne	r2, #6
+	strheq	r0, [r3, #2]	@ movhi
+	streq	r5, [lr]
+	mulne	r2, r2, r1
+	itt	ne
+	strhne	r0, [r4, r2]	@ movhi
+	strhne	r0, [r3, #2]	@ movhi
+	b	.L547
+.L554:
 	.align	2
-.L550:
-	.word	.LANCHOR81
-	.word	.LANCHOR87
-	.word	.LANCHOR78
+.L553:
+	.word	.LANCHOR82
+	.word	.LANCHOR88
+	.word	.LANCHOR79
 	.word	-1431655765
-	.cfi_endproc
-.LFE340:
 	.size	insert_free_list, .-insert_free_list
 	.section	.text.INSERT_FREE_LIST,"ax",%progbits
 	.align	1
@@ -6434,69 +3850,38 @@ insert_free_list:
 	.fpu softvfp
 	.type	INSERT_FREE_LIST, %function
 INSERT_FREE_LIST:
-.LFB337:
-	.loc 1 214 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL541:
 	push	{r3, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 3, -8
-	.cfi_offset 14, -4
-	.loc 1 215 0
 	bl	insert_free_list
-.LVL542:
-	.loc 1 216 0
-	ldr	r2, .L554
+	ldr	r2, .L557
 	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	.loc 1 221 0
-	ldr	r2, .L554+4
+	ldr	r2, .L557+4
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bcs	.L552
-.LVL543:
-.LBB269:
-.LBB270:
-	ldr	r1, .L554+8
-	movs	r2, #221
-	ldr	r0, .L554+12
+	bcs	.L555
+	ldr	r1, .L557+8
+	movs	r2, #203
+	ldr	r0, .L557+12
 	bl	printf
-.LVL544:
-	ldr	r1, .L554+16
-	ldr	r0, .L554+20
-.LBE270:
-.LBE269:
-	.loc 1 222 0
+	ldr	r1, .L557+16
+	ldr	r0, .L557+20
 	pop	{r3, lr}
-	.cfi_remember_state
-	.cfi_restore 14
-	.cfi_restore 3
-	.cfi_def_cfa_offset 0
-.LBB272:
-.LBB271:
-	.loc 1 221 0
 	b	printf
-.LVL545:
-.L552:
-	.cfi_restore_state
-	pop	{r3, pc}
 .L555:
+	pop	{r3, pc}
+.L558:
 	.align	2
-.L554:
-	.word	.LANCHOR88
-	.word	.LANCHOR39
+.L557:
 	.word	.LANCHOR89
+	.word	.LANCHOR40
+	.word	.LANCHOR90
+	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC8
-.LBE271:
-.LBE272:
-	.cfi_endproc
-.LFE337:
 	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
 	.section	.text.List_remove_node,"ax",%progbits
 	.align	1
@@ -6507,130 +3892,79 @@ INSERT_FREE_LIST:
 	.fpu softvfp
 	.type	List_remove_node, %function
 List_remove_node:
-.LFB341:
-	.loc 1 382 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL546:
 	push	{r4, r5, r6, r7, r8, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 4, -24
-	.cfi_offset 5, -20
-	.cfi_offset 6, -16
-	.cfi_offset 7, -12
-	.cfi_offset 8, -8
-	.cfi_offset 14, -4
-	.loc 1 385 0
 	movs	r6, #6
-	ldr	r4, .L562
+	ldr	r5, .L565
 	muls	r6, r1, r6
-	.loc 1 386 0
 	movw	r3, #65535
-	.loc 1 382 0
 	mov	r8, r0
-	.loc 1 385 0
-	ldr	r7, [r4]
-	adds	r5, r7, r6
-.LVL547:
-	.loc 1 386 0
-	ldrh	r2, [r5, #2]
+	ldr	r7, [r5]
+	adds	r4, r7, r6
+	ldrh	r2, [r4, #2]
 	cmp	r2, r3
-	bne	.L557
-	.loc 1 386 0 is_stmt 0 discriminator 1
+	bne	.L560
 	ldr	r3, [r0]
-	cmp	r5, r3
-	beq	.L557
-	.loc 1 386 0 discriminator 2
-	ldr	r1, .L562+4
-.LVL548:
+	cmp	r4, r3
+	beq	.L560
+	ldr	r1, .L565+4
 	mov	r2, #386
-	ldr	r0, .L562+8
-.LVL549:
+	ldr	r0, .L565+8
 	bl	printf
-.LVL550:
-	ldr	r1, .L562+12
-	ldr	r0, .L562+16
+	ldr	r1, .L565+12
+	ldr	r0, .L565+16
 	bl	printf
-.LVL551:
-.L557:
-	.loc 1 388 0 is_stmt 1
+.L560:
 	ldr	r3, [r8]
 	movw	r1, #65535
-	cmp	r5, r3
+	cmp	r4, r3
 	ldrh	r3, [r7, r6]
-	bne	.L558
-	.loc 1 389 0
+	bne	.L561
 	cmp	r3, r1
-	.loc 1 392 0
 	ittee	ne
-	ldrne	r0, [r4]
+	ldrne	r0, [r5]
 	movne	r2, #6
-	.loc 1 390 0
 	moveq	r3, #0
 	streq	r3, [r8]
-	.loc 1 392 0
 	ittt	ne
 	mlane	r3, r2, r3, r0
 	strne	r3, [r8]
-	.loc 1 393 0
 	strhne	r1, [r3, #2]	@ movhi
-.L560:
-	.loc 1 406 0
+.L563:
 	movw	r3, #65535
-	.loc 1 408 0
 	movs	r0, #0
-	.loc 1 406 0
 	strh	r3, [r7, r6]	@ movhi
-	strh	r3, [r5, #2]	@ movhi
-	.loc 1 408 0
+	strh	r3, [r4, #2]	@ movhi
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL552:
-.L558:
-	.loc 1 395 0
+.L561:
 	cmp	r3, r1
-	ldrh	r1, [r5, #2]
-	bne	.L561
-	.loc 1 396 0
+	ldrh	r1, [r4, #2]
+	bne	.L564
 	cmp	r1, r3
-	beq	.L560
-.LVL553:
-	.loc 1 398 0
+	beq	.L563
 	movs	r2, #6
-	ldr	r0, [r4]
+	ldr	r0, [r5]
 	muls	r1, r2, r1
-.LVL554:
 	strh	r3, [r0, r1]	@ movhi
-.LVL555:
-	b	.L560
-.L561:
-.LVL556:
-	.loc 1 402 0
-	ldr	r0, [r4]
+	b	.L563
+.L564:
+	ldr	r0, [r5]
 	movs	r2, #6
-	mla	r3, r2, r3, r0
-.LVL557:
-	strh	r1, [r3, #2]	@ movhi
-.LVL558:
-	.loc 1 403 0
-	ldrh	r0, [r5, #2]
-	.loc 1 404 0
-	ldrh	r1, [r7, r6]
-	ldr	r3, [r4]
-	muls	r2, r0, r2
-	strh	r1, [r3, r2]	@ movhi
-.LVL559:
-	b	.L560
-.L563:
+	mla	r5, r2, r3, r0
+	strh	r1, [r5, #2]	@ movhi
+	ldrh	r1, [r4, #2]
+	muls	r2, r1, r2
+	strh	r3, [r0, r2]	@ movhi
+	b	.L563
+.L566:
 	.align	2
-.L562:
-	.word	.LANCHOR81
-	.word	.LANCHOR90
+.L565:
+	.word	.LANCHOR82
+	.word	.LANCHOR91
+	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC8
-	.cfi_endproc
-.LFE341:
 	.size	List_remove_node, .-List_remove_node
 	.section	.text.List_pop_index_node,"ax",%progbits
 	.align	1
@@ -6641,79 +3975,42 @@ List_remove_node:
 	.fpu softvfp
 	.type	List_pop_index_node, %function
 List_pop_index_node:
-.LFB342:
-	.loc 1 411 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL560:
-	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 1 416 0
 	ldr	r3, [r0]
-	cbz	r3, .L570
-	.loc 1 431 0
-	ldr	r2, .L571
-.LVL561:
-	.loc 1 430 0
+	push	{r4, r5, r6, lr}
+	cbz	r3, .L573
+	ldr	r2, .L574
 	movw	r5, #65535
-	.loc 1 431 0
 	movs	r6, #6
 	ldr	r2, [r2]
-.LVL562:
-.L566:
-	.loc 1 430 0
-	cbnz	r1, .L567
 .L569:
-	.loc 1 446 0
-	ldr	r4, .L571+4
+	cbnz	r1, .L570
+.L572:
+	ldr	r4, .L574+4
 	subs	r3, r3, r2
-.LVL563:
 	asrs	r3, r3, #1
 	muls	r4, r3, r4
-.LVL564:
-	.loc 1 447 0
 	uxth	r1, r4
-.LVL565:
 	bl	List_remove_node
-.LVL566:
 	uxth	r0, r4
-	.loc 1 453 0
 	pop	{r4, r5, r6, pc}
-.LVL567:
-.L567:
-	.loc 1 430 0 discriminator 1
+.L570:
 	ldrh	r4, [r3]
 	cmp	r4, r5
-	beq	.L569
-	.loc 1 432 0
+	beq	.L572
 	subs	r1, r1, #1
-.LVL568:
-	.loc 1 431 0
 	mla	r3, r6, r4, r2
-.LVL569:
-	.loc 1 432 0
 	uxth	r1, r1
-.LVL570:
-	b	.L566
-.LVL571:
-.L570:
-	.loc 1 417 0
+	b	.L569
+.L573:
 	movw	r0, #65535
-.LVL572:
-	.loc 1 454 0
 	pop	{r4, r5, r6, pc}
-.L572:
+.L575:
 	.align	2
-.L571:
-	.word	.LANCHOR81
+.L574:
+	.word	.LANCHOR82
 	.word	-1431655765
-	.cfi_endproc
-.LFE342:
 	.size	List_pop_index_node, .-List_pop_index_node
 	.section	.text.List_get_gc_head_node,"ax",%progbits
 	.align	1
@@ -6724,73 +4021,42 @@ List_pop_index_node:
 	.fpu softvfp
 	.type	List_get_gc_head_node, %function
 List_get_gc_head_node:
-.LFB343:
-	.loc 1 462 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL573:
-	.loc 1 466 0
-	ldr	r3, .L579
-	.loc 1 462 0
+	ldr	r3, .L582
 	push	{r4, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 4, -8
-	.cfi_offset 14, -4
-	.loc 1 466 0
 	ldr	r3, [r3]
-	cbz	r3, .L578
-	.loc 1 471 0
-	ldr	r2, .L579+4
+	cbz	r3, .L581
+	ldr	r2, .L582+4
 	movs	r4, #6
 	ldr	r1, [r2]
-	.loc 1 470 0
 	movw	r2, #65535
-.L575:
-.LVL574:
-	cbz	r0, .L576
-	.loc 1 470 0 is_stmt 0 discriminator 1
+.L578:
+	cbz	r0, .L579
 	ldrh	r3, [r3]
-.LVL575:
 	cmp	r3, r2
-	bne	.L577
-.L578:
-	.loc 1 467 0 is_stmt 1
+	bne	.L580
+.L581:
 	movw	r0, #65535
-.LVL576:
 	pop	{r4, pc}
-.LVL577:
-.L577:
-	.loc 1 472 0
+.L580:
 	subs	r0, r0, #1
-.LVL578:
-	.loc 1 471 0
 	mla	r3, r4, r3, r1
-.LVL579:
-	.loc 1 472 0
 	uxth	r0, r0
-.LVL580:
-	b	.L575
-.L576:
-.LVL581:
-	.loc 1 476 0
-	ldr	r0, .L579+8
-.LVL582:
+	b	.L578
+.L579:
+	ldr	r0, .L582+8
 	subs	r3, r3, r1
-.LVL583:
 	asrs	r3, r3, #1
 	muls	r3, r0, r3
 	uxth	r0, r3
-	.loc 1 479 0
 	pop	{r4, pc}
-.L580:
+.L583:
 	.align	2
-.L579:
+.L582:
+	.word	.LANCHOR83
 	.word	.LANCHOR82
-	.word	.LANCHOR81
 	.word	-1431655765
-	.cfi_endproc
-.LFE343:
 	.size	List_get_gc_head_node, .-List_get_gc_head_node
 	.section	.text.List_update_data_list,"ax",%progbits
 	.align	1
@@ -6801,200 +4067,121 @@ List_get_gc_head_node:
 	.fpu softvfp
 	.type	List_update_data_list, %function
 List_update_data_list:
-.LFB344:
-	.loc 1 482 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL584:
-	.loc 1 491 0
-	ldr	r3, .L592
-	.loc 1 482 0
+	ldr	r3, .L595
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 1 482 0
 	mov	r4, r0
-	.loc 1 491 0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L583
-	.loc 1 491 0 is_stmt 0 discriminator 1
-	ldr	r3, .L592+4
+	beq	.L586
+	ldr	r3, .L595+4
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L583
-	.loc 1 491 0 discriminator 2
-	ldr	r3, .L592+8
+	beq	.L586
+	ldr	r3, .L595+8
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L583
-.LVL585:
-.LBB275:
-.LBB276:
-	.loc 1 494 0 is_stmt 1
-	ldr	r7, .L592+12
+	beq	.L586
+	ldr	r7, .L595+12
 	movs	r6, #6
-	.loc 1 496 0
-	ldr	r3, .L592+16
-	.loc 1 494 0
+	ldr	r3, .L595+16
 	muls	r6, r0, r6
 	ldr	fp, [r7]
-	.loc 1 496 0
 	ldr	r3, [r3]
-	.loc 1 494 0
 	add	r10, fp, r6
-.LVL586:
-	.loc 1 496 0
 	cmp	r10, r3
-	beq	.L583
-	.loc 1 499 0
-	ldr	r3, .L592+20
-	.loc 1 500 0
+	beq	.L586
+	ldr	r3, .L595+20
 	ldrh	r5, [r10, #4]
-	.loc 1 499 0
 	ldr	r2, [r3]
 	mov	r8, r3
 	ldrh	r2, [r2, r0, lsl #1]
-.LVL587:
-	.loc 1 501 0
 	cmp	r5, #0
-	beq	.L590
-	.loc 1 500 0
+	beq	.L593
 	muls	r5, r2, r5
-.LVL588:
-.L585:
-	.loc 1 504 0
+.L588:
 	ldrh	r3, [r10, #2]
 	movw	r2, #65535
-.LVL589:
 	cmp	r3, r2
-	bne	.L586
+	bne	.L589
 	ldrh	r2, [fp, r6]
 	cmp	r2, r3
-	bne	.L586
-	ldr	r1, .L592+24
+	bne	.L589
+	ldr	r1, .L595+24
 	mov	r2, #504
-	ldr	r0, .L592+28
-.LVL590:
+	ldr	r0, .L595+28
 	bl	printf
-.LVL591:
-	ldr	r1, .L592+32
-	ldr	r0, .L592+36
+	ldr	r1, .L595+32
+	ldr	r0, .L595+36
 	bl	printf
-.LVL592:
-.L586:
-	.loc 1 505 0
+.L589:
 	ldrh	r3, [r10, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L587
+	bne	.L590
 	ldrh	r2, [fp, r6]
 	cmp	r2, r3
-	beq	.L583
-.L587:
-	.loc 1 507 0
+	beq	.L586
+.L590:
 	movs	r2, #6
 	muls	r2, r3, r2
-.LVL593:
-	.loc 1 508 0
-	ldr	r3, .L592+40
+	ldr	r3, .L595+40
 	asrs	r1, r2, #1
 	muls	r3, r1, r3
-	.loc 1 509 0
 	ldr	r1, [r8]
 	ldrh	r0, [r1, r3, lsl #1]
-.LVL594:
-	.loc 1 510 0
 	ldr	r1, [r7]
 	add	r2, r2, r1
-.LVL595:
 	ldrh	r3, [r2, #4]
-.LVL596:
-	.loc 1 511 0
-	cbz	r3, .L591
-	.loc 1 510 0
+	cbz	r3, .L594
 	muls	r3, r0, r3
-.LVL597:
-.L588:
-	.loc 1 514 0
+.L591:
 	cmp	r5, r3
-	bcs	.L583
-	.loc 1 515 0
-	ldr	r5, .L592+44
-.LVL598:
+	bcs	.L586
+	ldr	r5, .L595+44
 	mov	r1, r4
-	ldr	r0, .L592+16
-.LVL599:
+	ldr	r0, .L595+16
 	bl	List_remove_node
-.LVL600:
 	ldrh	r3, [r5]
-	cbnz	r3, .L589
-	ldr	r1, .L592+24
+	cbnz	r3, .L592
+	ldr	r1, .L595+24
 	movw	r2, #515
-	ldr	r0, .L592+28
+	ldr	r0, .L595+28
 	bl	printf
-.LVL601:
-	ldr	r1, .L592+32
-	ldr	r0, .L592+36
+	ldr	r1, .L595+32
+	ldr	r0, .L595+36
 	bl	printf
-.LVL602:
-.L589:
+.L592:
 	ldrh	r3, [r5]
-	.loc 1 516 0
 	mov	r0, r4
-	.loc 1 515 0
 	subs	r3, r3, #1
 	strh	r3, [r5]	@ movhi
-	.loc 1 516 0
 	bl	INSERT_DATA_LIST
-.LVL603:
-.L583:
-.LBE276:
-.LBE275:
-	.loc 1 519 0
+.L586:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL604:
-.L590:
-.LBB278:
-.LBB277:
-	.loc 1 502 0
+.L593:
 	mov	r5, #-1
-.LVL605:
-	b	.L585
-.LVL606:
-.L591:
-	.loc 1 512 0
-	mov	r3, #-1
-.LVL607:
 	b	.L588
-.L593:
+.L594:
+	mov	r3, #-1
+	b	.L591
+.L596:
 	.align	2
-.L592:
-	.word	.LANCHOR91
+.L595:
 	.word	.LANCHOR92
 	.word	.LANCHOR93
-	.word	.LANCHOR81
+	.word	.LANCHOR94
 	.word	.LANCHOR82
 	.word	.LANCHOR83
-	.word	.LANCHOR94
+	.word	.LANCHOR84
+	.word	.LANCHOR95
+	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC8
 	.word	-1431655765
-	.word	.LANCHOR85
-.LBE277:
-.LBE278:
-	.cfi_endproc
-.LFE344:
+	.word	.LANCHOR86
 	.size	List_update_data_list, .-List_update_data_list
 	.section	.text.ftl_map_blk_alloc_new_blk,"ax",%progbits
 	.align	1
@@ -7005,110 +4192,69 @@ List_update_data_list:
 	.fpu softvfp
 	.type	ftl_map_blk_alloc_new_blk, %function
 ftl_map_blk_alloc_new_blk:
-.LFB347:
-	.loc 1 601 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL608:
+	ldrh	r1, [r0, #10]
+	ldr	r2, [r0, #12]
 	push	{r3, r4, r5, r6, r7, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 3, -24
-	.cfi_offset 4, -20
-	.cfi_offset 5, -16
-	.cfi_offset 6, -12
-	.cfi_offset 7, -8
-	.cfi_offset 14, -4
-	.loc 1 601 0
 	mov	r4, r0
-	.loc 1 605 0
-	ldrh	r1, [r0, #10]
 	movs	r3, #0
-	ldr	r2, [r0, #12]
-.LVL609:
-.L595:
+.L598:
 	uxth	r5, r3
-.LVL610:
-	.loc 1 605 0 is_stmt 0 discriminator 1
 	cmp	r5, r1
-	bcs	.L598
-	.loc 1 606 0 is_stmt 1
+	bcs	.L601
 	mov	r7, r2
 	adds	r3, r3, #1
 	ldrh	r6, [r7]
 	adds	r2, r2, #2
 	cmp	r6, #0
-	bne	.L595
-	.loc 1 607 0
+	bne	.L598
 	bl	FtlFreeSysBlkQueueOut
-.LVL611:
-	.loc 1 608 0
 	subs	r3, r0, #1
 	movw	r2, #65533
 	uxth	r3, r3
-	.loc 1 607 0
 	mov	r1, r0
 	strh	r0, [r7]	@ movhi
-	.loc 1 608 0
 	cmp	r3, r2
-	bls	.L596
-	.loc 1 609 0
-	ldr	r3, .L602
-	ldr	r0, .L602+4
+	bls	.L599
+	ldr	r3, .L605
+	ldr	r0, .L605+4
 	ldrh	r2, [r3, #6]
 	bl	printf
-.LVL612:
-.L597:
-	b	.L597
-.L596:
-	.loc 1 622 0
+.L600:
+	b	.L600
+.L599:
 	ldr	r3, [r4, #28]
-	.loc 1 620 0
 	strh	r6, [r4, #2]	@ movhi
-	.loc 1 621 0
 	strh	r5, [r4]	@ movhi
-	.loc 1 622 0
 	adds	r3, r3, #1
 	str	r3, [r4, #28]
-	.loc 1 623 0
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-.L598:
-	.loc 1 627 0
+.L601:
 	ldrh	r3, [r4, #10]
 	cmp	r3, r5
-	bhi	.L600
-.LVL613:
-.LBB281:
-.LBB282:
-	ldr	r1, .L602+8
-	movw	r2, #627
-	ldr	r0, .L602+12
+	bhi	.L603
+	ldr	r1, .L605+8
+	mov	r2, #628
+	ldr	r0, .L605+12
 	bl	printf
-.LVL614:
-	ldr	r1, .L602+16
-	ldr	r0, .L602+20
+	ldr	r1, .L605+16
+	ldr	r0, .L605+20
 	bl	printf
-.LVL615:
-.L600:
-.LBE282:
-.LBE281:
-	.loc 1 629 0
+.L603:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.LVL616:
-.L603:
+.L606:
 	.align	2
-.L602:
-	.word	.LANCHOR75
-	.word	.LC9
-	.word	.LANCHOR95
+.L605:
+	.word	.LANCHOR76
+	.word	.LC8
+	.word	.LANCHOR96
+	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC8
-	.cfi_endproc
-.LFE347:
 	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
 	.section	.text.select_l2p_ram_region,"ax",%progbits
 	.align	1
@@ -7119,144 +4265,93 @@ ftl_map_blk_alloc_new_blk:
 	.fpu softvfp
 	.type	select_l2p_ram_region, %function
 select_l2p_ram_region:
-.LFB352:
-	.loc 1 824 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL617:
 	push	{r3, r4, r5, r6, r7, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 3, -24
-	.cfi_offset 4, -20
-	.cfi_offset 5, -16
-	.cfi_offset 6, -12
-	.cfi_offset 7, -8
-	.cfi_offset 14, -4
-	.loc 1 829 0
 	movs	r1, #0
-	ldr	r3, .L614
-	.loc 1 830 0
+	ldr	r3, .L617
 	movs	r0, #12
 	movw	r5, #65535
-	.loc 1 829 0
 	ldrh	r2, [r3]
-	.loc 1 830 0
-	ldr	r3, .L614+4
+	ldr	r3, .L617+4
 	ldr	r3, [r3]
-.LVL618:
-.L605:
+.L608:
 	uxth	r4, r1
-.LVL619:
-	.loc 1 829 0 discriminator 1
 	cmp	r4, r2
-	bcc	.L607
+	bcc	.L610
 	mov	r4, r2
-.LVL620:
 	movs	r1, #0
-.LVL621:
 	mov	r6, #-2147483648
-	.loc 1 840 0
 	movs	r7, #12
-.L608:
+.L611:
 	uxth	r5, r1
-.LVL622:
-	.loc 1 839 0 discriminator 1
 	cmp	r5, r2
-	bcc	.L610
-	.loc 1 848 0
+	bcc	.L613
 	cmp	r4, r2
-	bcc	.L606
-	.loc 1 854 0
-	ldr	r1, .L614+8
+	bcc	.L609
+	ldr	r1, .L617+8
 	mov	r4, r2
 	mov	r0, #-1
 	ldrh	r7, [r1]
 	movs	r1, #0
-.LVL623:
-.L611:
+.L614:
 	uxth	r5, r1
-.LVL624:
-	.loc 1 853 0 discriminator 1
 	cmp	r5, r2
-	bcc	.L613
-	.loc 1 859 0
+	bcc	.L616
 	cmp	r4, r2
-	bcc	.L606
-	.loc 1 859 0 is_stmt 0 discriminator 1
-	movw	r2, #859
-	ldr	r1, .L614+12
-	ldr	r0, .L614+16
-.LVL625:
+	bcc	.L609
+	movw	r2, #863
+	ldr	r1, .L617+12
+	ldr	r0, .L617+16
 	bl	printf
-.LVL626:
-	ldr	r1, .L614+20
-	ldr	r0, .L614+24
+	ldr	r1, .L617+20
+	ldr	r0, .L617+24
 	bl	printf
-.LVL627:
-	b	.L606
-.LVL628:
-.L607:
+	b	.L609
+.L610:
 	adds	r1, r1, #1
-	.loc 1 830 0 is_stmt 1
 	mla	r6, r0, r1, r3
 	ldrh	r6, [r6, #-12]
 	cmp	r6, r5
-	bne	.L605
-.LVL629:
-.L606:
-	.loc 1 861 0
+	bne	.L608
+.L609:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, pc}
-.LVL630:
-.L610:
-	.loc 1 840 0
+.L613:
 	mla	r0, r7, r1, r3
 	ldr	r0, [r0, #4]
 	cmp	r0, #0
-	blt	.L609
-	.loc 1 841 0
+	blt	.L612
 	cmp	r6, r0
 	itt	hi
 	movhi	r6, r0
-.LVL631:
 	movhi	r4, r5
-.L609:
-.LVL632:
+.L612:
 	adds	r1, r1, #1
-.LVL633:
-	b	.L608
-.LVL634:
-.L613:
-	.loc 1 854 0
+	b	.L611
+.L616:
 	ldr	r6, [r3, #4]
 	cmp	r0, r6
-	bls	.L612
-	.loc 1 854 0 is_stmt 0 discriminator 1
+	bls	.L615
 	ldrh	ip, [r3]
 	cmp	ip, r7
 	itt	ne
 	movne	r0, r6
-.LVL635:
 	movne	r4, r5
-.LVL636:
-.L612:
+.L615:
 	adds	r1, r1, #1
-.LVL637:
 	adds	r3, r3, #12
-	b	.L611
-.L615:
+	b	.L614
+.L618:
 	.align	2
-.L614:
-	.word	.LANCHOR67
-	.word	.LANCHOR96
+.L617:
+	.word	.LANCHOR68
 	.word	.LANCHOR97
 	.word	.LANCHOR98
+	.word	.LANCHOR99
+	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC8
-	.cfi_endproc
-.LFE352:
 	.size	select_l2p_ram_region, .-select_l2p_ram_region
 	.section	.text.FtlUpdateVaildLpn,"ax",%progbits
 	.align	1
@@ -7267,83 +4362,51 @@ select_l2p_ram_region:
 	.fpu softvfp
 	.type	FtlUpdateVaildLpn, %function
 FtlUpdateVaildLpn:
-.LFB358:
-	.loc 1 1010 0 is_stmt 1
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL638:
-	.loc 1 1013 0
-	ldr	r2, .L622
-	.loc 1 1010 0
-	push	{r4, r5, lr}
-	.cfi_def_cfa_offset 12
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
+	ldr	r2, .L629
+	push	{r4, r5, r6, lr}
 	mov	r1, r2
-	.loc 1 1013 0
 	ldrh	r3, [r2]
 	cmp	r3, #4
-	bhi	.L617
-	.loc 1 1013 0 is_stmt 0 discriminator 1
-	cbnz	r0, .L617
-	.loc 1 1013 0
+	bhi	.L620
+	cbnz	r0, .L620
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
-	.loc 1 1022 0 is_stmt 1
-	pop	{r4, r5, pc}
-.L617:
-	.loc 1 1015 0
-	ldr	r3, .L622+4
-	.loc 1 1014 0
-	movs	r2, #0
-	strh	r2, [r1]	@ movhi
-.LBB285:
-.LBB286:
-	.loc 1 1018 0
-	movw	r5, #65535
-	.loc 1 1016 0
-	ldr	r1, .L622+8
-.LBE286:
-.LBE285:
-	.loc 1 1015 0
-	str	r2, [r3]
-.LVL639:
-.LBB288:
-.LBB287:
-	.loc 1 1018 0
-	ldr	r2, .L622+12
-	ldrh	r1, [r1]
-	ldr	r2, [r2]
-	add	r1, r2, r1, lsl #1
-.LVL640:
-.L618:
-	.loc 1 1016 0
-	cmp	r2, r1
-	bne	.L620
-	pop	{r4, r5, pc}
+	pop	{r4, r5, r6, pc}
 .L620:
-	.loc 1 1018 0
-	ldrh	r4, [r2], #2
-	cmp	r4, r5
-	.loc 1 1019 0
-	ittt	ne
-	ldrne	r0, [r3]
-	addne	r0, r0, r4
-	strne	r0, [r3]
-	b	.L618
+	movs	r3, #0
+	ldr	r0, .L629+4
+	strh	r3, [r1]	@ movhi
+	movw	r6, #65535
+	ldr	r1, .L629+8
+	ldrh	r4, [r0]
+	mov	r0, r3
+	ldr	r2, .L629+12
+	ldr	r1, [r1]
+	str	r3, [r2]
+	add	r4, r1, r4, lsl #1
+.L621:
+	cmp	r1, r4
+	bne	.L623
+	cbz	r3, .L619
+	str	r0, [r2]
+.L619:
+	pop	{r4, r5, r6, pc}
 .L623:
+	ldrh	r5, [r1], #2
+	cmp	r5, r6
+	itt	ne
+	addne	r0, r0, r5
+	movne	r3, #1
+	b	.L621
+.L630:
 	.align	2
-.L622:
-	.word	.LANCHOR99
+.L629:
 	.word	.LANCHOR100
-	.word	.LANCHOR39
-	.word	.LANCHOR83
-.LBE287:
-.LBE288:
-	.cfi_endproc
-.LFE358:
+	.word	.LANCHOR40
+	.word	.LANCHOR84
+	.word	.LANCHOR101
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
 	.section	.text.ftl_set_blk_mode,"ax",%progbits
 	.align	1
@@ -7354,39 +4417,27 @@ FtlUpdateVaildLpn:
 	.fpu softvfp
 	.type	ftl_set_blk_mode, %function
 ftl_set_blk_mode:
-.LFB363:
-	.loc 1 1502 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL641:
-	.loc 1 1502 0
 	mov	r3, r0
-	.loc 1 1503 0
-	cbz	r1, .L625
+	cbz	r1, .L632
 	b	ftl_set_blk_mode.part.10
-.LVL642:
-.L625:
-	.loc 1 1506 0
-	ldr	r2, .L626
+.L632:
+	ldr	r2, .L633
 	lsrs	r0, r0, #5
-.LVL643:
 	and	r3, r3, #31
 	ldr	r1, [r2]
-.LVL644:
 	movs	r2, #1
 	lsl	r3, r2, r3
 	ldr	r2, [r1, r0, lsl #2]
 	bic	r2, r2, r3
 	str	r2, [r1, r0, lsl #2]
 	bx	lr
-.L627:
+.L634:
 	.align	2
-.L626:
+.L633:
 	.word	.LANCHOR0
-	.cfi_endproc
-.LFE363:
 	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
 	.section	.text.ftl_get_blk_mode,"ax",%progbits
 	.align	1
@@ -7397,30 +4448,21 @@ ftl_set_blk_mode:
 	.fpu softvfp
 	.type	ftl_get_blk_mode, %function
 ftl_get_blk_mode:
-.LFB364:
-	.loc 1 1510 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL645:
-	.loc 1 1511 0
-	ldr	r3, .L629
+	ldr	r3, .L636
 	lsrs	r2, r0, #5
 	and	r0, r0, #31
-.LVL646:
 	ldr	r3, [r3]
 	ldr	r3, [r3, r2, lsl #2]
 	lsr	r0, r3, r0
-	.loc 1 1512 0
 	and	r0, r0, #1
 	bx	lr
-.L630:
+.L637:
 	.align	2
-.L629:
+.L636:
 	.word	.LANCHOR0
-	.cfi_endproc
-.LFE364:
 	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
 	.section	.text.ftl_sb_update_avl_pages,"ax",%progbits
 	.align	1
@@ -7431,93 +4473,56 @@ ftl_get_blk_mode:
 	.fpu softvfp
 	.type	ftl_sb_update_avl_pages, %function
 ftl_sb_update_avl_pages:
-.LFB370:
-	.loc 1 1831 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL647:
-	.loc 1 1833 0
 	movs	r3, #0
-	.loc 1 1831 0
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 1 1833 0
 	strh	r3, [r0, #4]	@ movhi
-.LVL648:
-	.loc 1 1836 0
 	movw	r6, #65535
-	.loc 1 1834 0
-	ldr	r3, .L638
+	ldr	r3, .L645
 	ldrh	r4, [r3]
 	add	r3, r0, r2, lsl #1
 	adds	r3, r3, #14
-.LVL649:
-.L632:
-	.loc 1 1834 0 is_stmt 0 discriminator 1
+.L639:
 	cmp	r2, r4
-	bcc	.L634
-	.loc 1 1845 0 is_stmt 1
-	ldr	r3, .L638+4
+	bcc	.L641
+	ldr	r3, .L645+4
 	add	r5, r0, #16
-	.loc 1 1843 0
 	movw	r6, #65535
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	subs	r1, r3, r1
-.LVL650:
-	.loc 1 1845 0
 	movs	r3, #0
 	uxth	r1, r1
-.LVL651:
-.L635:
-	.loc 1 1841 0 discriminator 1
+.L642:
 	uxth	r2, r3
 	cmp	r4, r2
-	bhi	.L637
-	.loc 1 1848 0
+	bhi	.L644
 	pop	{r4, r5, r6, pc}
-.LVL652:
-.L634:
-	.loc 1 1836 0
+.L641:
 	ldrh	r5, [r3, #2]!
-	.loc 1 1834 0
 	adds	r2, r2, #1
-.LVL653:
 	uxth	r2, r2
-.LVL654:
-	.loc 1 1836 0
 	cmp	r5, r6
-	.loc 1 1838 0
 	ittt	ne
 	ldrhne	r5, [r0, #4]
 	addne	r5, r5, #1
 	strhne	r5, [r0, #4]	@ movhi
-	b	.L632
-.LVL655:
-.L637:
-	.loc 1 1843 0
+	b	.L639
+.L644:
 	ldrh	r2, [r5], #2
 	adds	r3, r3, #1
-.LVL656:
 	cmp	r2, r6
-	.loc 1 1845 0
 	ittt	ne
 	ldrhne	r2, [r0, #4]
 	addne	r2, r2, r1
 	strhne	r2, [r0, #4]	@ movhi
-	b	.L635
-.L639:
+	b	.L642
+.L646:
 	.align	2
-.L638:
-	.word	.LANCHOR37
-	.word	.LANCHOR52
-	.cfi_endproc
-.LFE370:
+.L645:
+	.word	.LANCHOR38
+	.word	.LANCHOR53
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
 	.section	.text.make_superblock,"ax",%progbits
 	.align	1
@@ -7528,144 +4533,92 @@ ftl_sb_update_avl_pages:
 	.fpu softvfp
 	.type	make_superblock, %function
 make_superblock:
-.LFB375:
-	.loc 1 2332 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL657:
-	.loc 1 2335 0
-	ldr	r3, .L653
-	.loc 1 2332 0
+	ldr	r3, .L660
+	ldrh	r2, [r0]
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 1 2332 0
 	mov	r4, r0
-	.loc 1 2335 0
-	ldrh	r2, [r0]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L641
-	.loc 1 2335 0 is_stmt 0 discriminator 1
-	ldr	r1, .L653+4
-	movw	r2, #2335
-	ldr	r0, .L653+8
-.LVL658:
+	bcc	.L648
+	ldr	r1, .L660+4
+	movw	r2, #2613
+	ldr	r0, .L660+8
 	bl	printf
-.LVL659:
-	ldr	r1, .L653+12
-	ldr	r0, .L653+16
+	ldr	r1, .L660+12
+	ldr	r0, .L660+16
 	bl	printf
-.LVL660:
-.L641:
-	.loc 1 2338 0 is_stmt 1
-	ldr	r3, .L653+20
+.L648:
+	ldr	r3, .L660+20
 	add	r6, r4, #16
-	.loc 1 2339 0
-	ldr	r10, .L653+40
-	.loc 1 2340 0
+	ldr	r10, .L660+40
 	movw	r7, #65535
-	.loc 1 2336 0
 	movs	r5, #0
-	.loc 1 2338 0
 	ldrh	r8, [r3]
-	.loc 1 2336 0
 	strh	r5, [r4, #4]	@ movhi
-	.loc 1 2337 0
 	strb	r5, [r4, #7]
-.LVL661:
-.L642:
-	.loc 1 2338 0 discriminator 1
+.L649:
 	uxth	r3, r5
 	cmp	r8, r3
-	bhi	.L644
-	.loc 1 2348 0
-	ldr	r2, .L653+24
+	bhi	.L651
+	ldr	r2, .L660+24
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r2]
 	smulbb	r3, r3, r2
 	strh	r3, [r4, #4]	@ movhi
-	.loc 1 2349 0
 	movs	r3, #0
 	strb	r3, [r4, #9]
-	.loc 1 2350 0
-	ldr	r3, .L653+28
+	ldr	r3, .L660+28
 	ldr	r3, [r3]
-	cbz	r3, .L645
-	.loc 1 2350 0 is_stmt 0 discriminator 1
-	ldr	r3, .L653+32
+	cbz	r3, .L652
+	ldr	r3, .L660+32
 	ldrh	r2, [r4]
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r2, lsl #1]
-	cmp	r3, #59
-	.loc 1 2351 0 is_stmt 1 discriminator 1
+	cmp	r3, #79
 	itt	ls
 	movls	r3, #1
 	strbls	r3, [r4, #9]
-.L645:
-	.loc 1 2354 0
-	ldr	r3, .L653+36
+.L652:
+	ldr	r3, .L660+36
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L646
-	.loc 1 2355 0
+	cbz	r3, .L653
 	movs	r3, #1
 	strb	r3, [r4, #9]
-.L646:
-	.loc 1 2357 0
+.L653:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL662:
-.L644:
-	.loc 1 2339 0
+.L651:
 	ldrh	r1, [r4]
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL663:
-	.loc 1 2340 0
 	strh	r7, [r6]	@ movhi
-	.loc 1 2339 0
 	mov	fp, r0
-.LVL664:
-	.loc 1 2341 0
 	bl	FtlBbmIsBadBlock
-.LVL665:
-	cbnz	r0, .L643
-	.loc 1 2342 0
+	cbnz	r0, .L650
 	strh	fp, [r6]	@ movhi
-	.loc 1 2343 0
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	strb	r3, [r4, #7]
-.L643:
-.LVL666:
+.L650:
 	adds	r5, r5, #1
-.LVL667:
 	adds	r6, r6, #2
-	b	.L642
-.L654:
+	b	.L649
+.L661:
 	.align	2
-.L653:
-	.word	.LANCHOR39
-	.word	.LANCHOR101
+.L660:
+	.word	.LANCHOR40
+	.word	.LANCHOR102
+	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC8
-	.word	.LANCHOR37
-	.word	.LANCHOR52
+	.word	.LANCHOR38
+	.word	.LANCHOR53
 	.word	.LANCHOR28
-	.word	.LANCHOR78
+	.word	.LANCHOR79
 	.word	.LANCHOR1
-	.word	.LANCHOR46
-	.cfi_endproc
-.LFE375:
+	.word	.LANCHOR47
 	.size	make_superblock, .-make_superblock
 	.section	.text.update_multiplier_value,"ax",%progbits
 	.align	1
@@ -7676,93 +4629,54 @@ make_superblock:
 	.fpu softvfp
 	.type	update_multiplier_value, %function
 update_multiplier_value:
-.LFB382:
-	.loc 1 2710 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL668:
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 3, -32
-	.cfi_offset 4, -28
-	.cfi_offset 5, -24
-	.cfi_offset 6, -20
-	.cfi_offset 7, -16
-	.cfi_offset 8, -12
-	.cfi_offset 10, -8
-	.cfi_offset 14, -4
-	.loc 1 2714 0
 	movs	r5, #0
-	ldr	r3, .L661
-	.loc 1 2710 0
+	ldr	r3, .L668
 	mov	r6, r0
-	.loc 1 2712 0
 	mov	r4, r5
-	.loc 1 2715 0
-	ldr	r10, .L661+12
-	.loc 1 2714 0
+	ldr	r10, .L668+12
 	ldrh	r7, [r3]
-	.loc 1 2717 0
-	ldr	r3, .L661+4
+	ldr	r3, .L668+4
 	ldrh	r8, [r3]
-.LVL669:
-.L656:
-	.loc 1 2714 0 discriminator 1
+.L663:
 	uxth	r3, r5
 	cmp	r7, r3
-	bhi	.L658
-	.loc 1 2719 0
-	cbz	r4, .L660
-	.loc 1 2720 0
+	bhi	.L665
+	cbz	r4, .L667
 	mov	r1, r4
 	mov	r0, #32768
 	bl	__aeabi_idiv
-.LVL670:
-.L659:
-	.loc 1 2721 0
-	ldr	r3, .L661+8
+.L666:
+	ldr	r3, .L668+8
 	movs	r2, #6
 	ldr	r3, [r3]
 	mla	r6, r2, r6, r3
 	strh	r0, [r6, #4]	@ movhi
-	.loc 1 2723 0
 	movs	r0, #0
-.LVL671:
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.LVL672:
-.L658:
-	.loc 1 2715 0
+.L665:
 	mov	r1, r6
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL673:
-	.loc 1 2716 0
 	bl	FtlBbmIsBadBlock
-.LVL674:
-	cbnz	r0, .L657
-	.loc 1 2717 0
+	cbnz	r0, .L664
 	add	r4, r4, r8
-.LVL675:
 	uxth	r4, r4
-.LVL676:
-.L657:
+.L664:
 	adds	r5, r5, #1
-.LVL677:
-	b	.L656
-.LVL678:
-.L660:
+	b	.L663
+.L667:
 	mov	r0, r4
-	b	.L659
-.L662:
+	b	.L666
+.L669:
 	.align	2
-.L661:
-	.word	.LANCHOR37
-	.word	.LANCHOR52
-	.word	.LANCHOR81
-	.word	.LANCHOR46
-	.cfi_endproc
-.LFE382:
+.L668:
+	.word	.LANCHOR38
+	.word	.LANCHOR53
+	.word	.LANCHOR82
+	.word	.LANCHOR47
 	.size	update_multiplier_value, .-update_multiplier_value
 	.section	.text.GetFreeBlockMinEraseCount,"ax",%progbits
 	.align	1
@@ -7773,41 +4687,31 @@ update_multiplier_value:
 	.fpu softvfp
 	.type	GetFreeBlockMinEraseCount, %function
 GetFreeBlockMinEraseCount:
-.LFB383:
-	.loc 1 2726 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL679:
-	.loc 1 2729 0
-	ldr	r3, .L666
+	ldr	r3, .L673
 	ldr	r0, [r3]
-	cbz	r0, .L664
-	.loc 1 2730 0
-	ldr	r3, .L666+4
+	cbz	r0, .L671
+	ldr	r3, .L673+4
 	ldr	r3, [r3]
 	subs	r0, r0, r3
-	ldr	r3, .L666+8
+	ldr	r3, .L673+8
 	asrs	r0, r0, #1
 	muls	r0, r3, r0
-	ldr	r3, .L666+12
+	ldr	r3, .L673+12
 	ldr	r3, [r3]
 	uxth	r0, r0
 	ldrh	r0, [r3, r0, lsl #1]
-.LVL680:
-.L664:
-	.loc 1 2732 0
+.L671:
 	bx	lr
-.L667:
+.L674:
 	.align	2
-.L666:
-	.word	.LANCHOR87
-	.word	.LANCHOR81
+.L673:
+	.word	.LANCHOR88
+	.word	.LANCHOR82
 	.word	-1431655765
-	.word	.LANCHOR78
-	.cfi_endproc
-.LFE383:
+	.word	.LANCHOR79
 	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
 	.section	.text.GetFreeBlockMaxEraseCount,"ax",%progbits
 	.align	1
@@ -7818,90 +4722,57 @@ GetFreeBlockMinEraseCount:
 	.fpu softvfp
 	.type	GetFreeBlockMaxEraseCount, %function
 GetFreeBlockMaxEraseCount:
-.LFB384:
-	.loc 1 2735 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL681:
-	.loc 1 2740 0
-	ldr	r3, .L676
-	.loc 1 2735 0
+	ldr	r3, .L683
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 1 2740 0
 	ldr	r3, [r3]
-	cbz	r3, .L674
-	.loc 1 2741 0
-	ldr	r2, .L676+4
-	.loc 1 2745 0
+	cbz	r3, .L681
+	ldr	r2, .L683+4
 	movs	r5, #6
 	movw	r6, #65535
-	.loc 1 2741 0
 	ldrh	r2, [r2]
 	rsb	r2, r2, r2, lsl #3
 	asrs	r2, r2, #3
 	cmp	r0, r2
-	.loc 1 2742 0
 	it	gt
 	uxthgt	r0, r2
-.LVL682:
-	.loc 1 2743 0
-	ldr	r2, .L676+8
+	ldr	r2, .L683+8
 	ldr	r1, [r2]
-	ldr	r2, .L676+12
+	ldr	r2, .L683+12
 	subs	r3, r3, r1
 	asrs	r3, r3, #1
 	muls	r3, r2, r3
-	.loc 1 2744 0
 	movs	r2, #0
-	.loc 1 2743 0
 	uxth	r3, r3
-.LVL683:
-.L671:
-	.loc 1 2744 0 discriminator 1
+.L678:
 	uxth	r4, r2
 	cmp	r0, r4
-	bls	.L673
-	.loc 1 2745 0
+	bls	.L680
 	mul	r4, r5, r3
 	adds	r2, r2, #1
-.LVL684:
 	ldrh	r4, [r1, r4]
 	cmp	r4, r6
-	bne	.L675
-.L673:
-	.loc 1 2749 0
-	ldr	r2, .L676+16
+	bne	.L682
+.L680:
+	ldr	r2, .L683+16
 	ldr	r2, [r2]
 	ldrh	r0, [r2, r3, lsl #1]
-.LVL685:
 	pop	{r4, r5, r6, pc}
-.LVL686:
-.L675:
+.L682:
 	mov	r3, r4
-.LVL687:
-	b	.L671
-.L674:
-	.loc 1 2736 0
+	b	.L678
+.L681:
 	mov	r0, r3
-.LVL688:
-	.loc 1 2752 0
 	pop	{r4, r5, r6, pc}
-.L677:
+.L684:
 	.align	2
-.L676:
-	.word	.LANCHOR87
+.L683:
 	.word	.LANCHOR88
-	.word	.LANCHOR81
+	.word	.LANCHOR89
+	.word	.LANCHOR82
 	.word	-1431655765
-	.word	.LANCHOR78
-	.cfi_endproc
-.LFE384:
+	.word	.LANCHOR79
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
 	.section	.text.free_data_superblock,"ax",%progbits
 	.align	1
@@ -7912,45 +4783,24 @@ GetFreeBlockMaxEraseCount:
 	.fpu softvfp
 	.type	free_data_superblock, %function
 free_data_superblock:
-.LFB385:
-	.loc 1 2843 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL689:
-	.loc 1 2844 0
 	movw	r2, #65535
-	.loc 1 2843 0
 	push	{r3, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 3, -8
-	.cfi_offset 14, -4
-	.loc 1 2844 0
 	cmp	r0, r2
-	beq	.L679
-.LVL690:
-.LBB291:
-.LBB292:
-	.loc 1 2846 0
-	ldr	r2, .L680
+	beq	.L686
+	ldr	r2, .L687
 	movs	r1, #0
 	ldr	r2, [r2]
 	strh	r1, [r2, r0, lsl #1]	@ movhi
-	.loc 1 2847 0
 	bl	INSERT_FREE_LIST
-.LVL691:
-.L679:
-.LBE292:
-.LBE291:
-	.loc 1 2849 0
+.L686:
 	movs	r0, #0
 	pop	{r3, pc}
-.L681:
+.L688:
 	.align	2
-.L680:
-	.word	.LANCHOR83
-	.cfi_endproc
-.LFE385:
+.L687:
+	.word	.LANCHOR84
 	.size	free_data_superblock, .-free_data_superblock
 	.section	.text.FtlGcBufInit,"ax",%progbits
 	.align	1
@@ -7961,154 +4811,100 @@ free_data_superblock:
 	.fpu softvfp
 	.type	FtlGcBufInit, %function
 FtlGcBufInit:
-.LFB391:
-	.file 6 "drivers/rknand/rkftl/FtlGc.c"
-	.loc 6 21 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 6 26 0
-	movs	r5, #12
-	ldr	r0, .L687
-	.loc 6 24 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #0
-	.loc 6 27 0
-	ldr	r6, .L687+4
-	ldr	r7, .L687+8
-	.loc 6 28 0
-	ldr	ip, .L687+28
-	.loc 6 29 0
-	ldr	r8, .L687+32
-	.loc 6 24 0
-	ldr	r2, .L687+12
+	ldr	r1, .L694
+	mov	fp, #1
+	ldr	r2, .L694+4
+	ldr	r5, [r1]
+	ldr	r1, .L694+8
 	str	r3, [r2]
-.LVL692:
-.L683:
-	.loc 6 25 0 discriminator 1
-	ldr	r2, .L687+16
-	uxth	r1, r3
-	add	lr, r3, #1
+	ldr	r2, .L694+12
+	mov	r0, r5
+	ldr	r1, [r1]
 	ldrh	r2, [r2]
-	cmp	r1, r2
-	bcc	.L684
-	.loc 6 33 0 discriminator 1
-	ldr	r0, .L687+20
-	.loc 6 34 0 discriminator 1
-	movs	r4, #12
-	ldr	r1, .L687
-	movs	r5, #0
-	.loc 6 35 0 discriminator 1
-	ldr	r6, .L687+4
-	ldr	r7, .L687+8
-	.loc 6 36 0 discriminator 1
-	ldr	ip, .L687+28
-	ldr	lr, .L687+24
-.LVL693:
-.L685:
-	.loc 6 33 0 discriminator 1
-	ldr	r3, [r0]
-	cmp	r2, r3
-	bcc	.L686
-	.loc 6 38 0
+	str	r1, [sp, #4]
+	ldr	r1, .L694+16
+	ldrh	r1, [r1]
+	str	r1, [sp]
+	ldr	r1, .L694+20
+	ldr	r10, [r1]
+	ldr	r1, .L694+24
+	ldrh	r7, [r1]
+	ldr	r1, .L694+28
+	ldr	r4, [r1]
+	movs	r1, #12
+	mla	r1, r2, r1, r1
+	adds	r4, r4, #8
+	add	r8, r5, r1
+	mov	r1, r3
+.L690:
+	adds	r0, r0, #12
+	ldr	r6, [sp]
+	cmp	r0, r8
+	add	ip, r3, r7
+	add	r4, r4, #36
+	add	lr, r1, r6
+	bne	.L691
+	ldr	r3, .L694+32
+	mov	lr, #12
+	mov	r8, #0
+	ldr	r0, [r3]
+	ldr	r3, .L694+8
+	ldr	r4, [r3]
+	ldr	r3, .L694+20
+	ldr	ip, [r3]
+.L692:
+	cmp	r2, r0
+	bcc	.L693
+	add	sp, sp, #8
+	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL694:
-.L684:
-	uxth	r3, r3
-	.loc 6 26 0 discriminator 3
-	ldr	r10, [r0]
-	movs	r4, #1
-	mul	r2, r5, r3
-	add	r1, r10, r2
-	str	r4, [r1, #8]
-	.loc 6 27 0 discriminator 3
-	ldrh	r4, [r7]
-	ldr	r1, [r6]
-	muls	r4, r3, r4
-	bic	r4, r4, #3
-	add	r1, r1, r4
-	str	r1, [r10, r2]
-	.loc 6 28 0 discriminator 3
-	ldr	r1, .L687+24
-	ldr	r10, [r0]
-	ldrh	fp, [r1]
-	ldr	r1, [ip]
-	add	r4, r10, r2
-	mul	fp, r3, fp
-	bic	fp, fp, #3
-	add	r1, r1, fp
-	.loc 6 29 0 discriminator 3
-	mov	fp, #36
-	.loc 6 28 0 discriminator 3
-	str	r1, [r4, #4]
-	.loc 6 29 0 discriminator 3
-	ldr	r1, [r8]
-	ldr	r2, [r10, r2]
-	mla	r3, fp, r3, r1
-.LVL695:
-	str	r2, [r3, #8]
-	.loc 6 30 0 discriminator 3
-	ldr	r2, [r4, #4]
-	str	r2, [r3, #12]
-.LVL696:
-	mov	r3, lr
-	b	.L683
-.LVL697:
-.L686:
-	.loc 6 35 0 discriminator 3
-	ldrh	r10, [r7]
-	.loc 6 34 0 discriminator 3
-	mul	r8, r4, r2
-	ldr	fp, [r1]
-	.loc 6 35 0 discriminator 3
-	mul	r10, r2, r10
-	.loc 6 34 0 discriminator 3
-	add	r3, fp, r8
-	str	r5, [r3, #8]
-	.loc 6 35 0 discriminator 3
-	ldr	r3, [r6]
-	bic	r10, r10, #3
+.L691:
+	bic	r1, r1, #3
+	bic	r3, r3, #3
+	mov	r6, r1
+	ldr	r1, [sp, #4]
 	add	r3, r3, r10
-	str	r3, [fp, r8]
-	.loc 6 36 0 discriminator 3
-	ldrh	r10, [lr]
-	ldr	r3, [r1]
-	mul	r10, r2, r10
-	add	r8, r8, r3
-	ldr	r3, [ip]
-	.loc 6 33 0 discriminator 3
+	str	fp, [r0, #-4]
+	str	r3, [r0, #-8]
+	add	r6, r6, r1
+	mov	r1, lr
+	str	r6, [r0, #-12]
+	str	r3, [r4, #-32]
+	mov	r3, ip
+	str	r6, [r4, #-36]
+	b	.L690
+.L693:
+	ldr	r3, [sp]
+	mul	r10, lr, r2
+	muls	r3, r2, r3
+	add	r1, r5, r10
+	str	r8, [r1, #8]
+	bic	r3, r3, #3
+	add	r3, r3, r4
+	str	r3, [r5, r10]
+	mul	r3, r2, r7
 	adds	r2, r2, #1
-.LVL698:
 	uxth	r2, r2
-.LVL699:
-	.loc 6 36 0 discriminator 3
-	bic	r10, r10, #3
-	add	r3, r3, r10
-	str	r3, [r8, #4]
-	b	.L685
-.L688:
+	bic	r3, r3, #3
+	add	r3, r3, ip
+	str	r3, [r1, #4]
+	b	.L692
+.L695:
 	.align	2
-.L687:
-	.word	.LANCHOR103
+.L694:
 	.word	.LANCHOR104
-	.word	.LANCHOR57
-	.word	.LANCHOR102
-	.word	.LANCHOR37
-	.word	.LANCHOR107
-	.word	.LANCHOR58
+	.word	.LANCHOR103
 	.word	.LANCHOR105
+	.word	.LANCHOR38
+	.word	.LANCHOR58
 	.word	.LANCHOR106
-	.cfi_endproc
-.LFE391:
+	.word	.LANCHOR59
+	.word	.LANCHOR107
+	.word	.LANCHOR108
 	.size	FtlGcBufInit, .-FtlGcBufInit
 	.section	.text.FtlGcBufFree,"ax",%progbits
 	.align	1
@@ -8119,80 +4915,45 @@ FtlGcBufInit:
 	.fpu softvfp
 	.type	FtlGcBufFree, %function
 FtlGcBufFree:
-.LFB392:
-	.loc 6 41 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL700:
-	.loc 6 46 0
-	ldr	r3, .L696
-	.loc 6 47 0
+	ldr	r3, .L703
 	mov	ip, #12
-	.loc 6 41 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 6 45 0
 	movs	r4, #0
-	.loc 6 47 0
 	mov	fp, #36
-	.loc 6 48 0
 	mov	lr, r4
-	.loc 6 46 0
 	ldr	r7, [r3]
-	.loc 6 47 0
-	ldr	r3, .L696+4
+	ldr	r3, .L703+4
 	ldr	r5, [r3]
-.LVL701:
-.L690:
+.L697:
 	uxth	r3, r4
-	.loc 6 45 0 discriminator 1
 	cmp	r1, r3
-	bls	.L689
-	.loc 6 47 0
+	bls	.L696
 	mla	r8, fp, r3, r0
 	movs	r2, #0
-.L691:
-.LVL702:
+.L698:
 	uxth	r3, r2
-	.loc 6 46 0 discriminator 1
 	cmp	r7, r3
-	bls	.L692
-	.loc 6 47 0
+	bls	.L699
 	mul	r3, ip, r3
 	ldr	r6, [r8, #8]
 	adds	r2, r2, #1
-.LVL703:
 	add	r10, r5, r3
 	ldr	r3, [r5, r3]
 	cmp	r3, r6
-	bne	.L691
-	.loc 6 48 0
+	bne	.L698
 	str	lr, [r10, #8]
-.L692:
-.LVL704:
+.L699:
 	adds	r4, r4, #1
-.LVL705:
-	b	.L690
-.LVL706:
-.L689:
+	b	.L697
+.L696:
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL707:
-.L697:
+.L704:
 	.align	2
-.L696:
-	.word	.LANCHOR107
-	.word	.LANCHOR103
-	.cfi_endproc
-.LFE392:
+.L703:
+	.word	.LANCHOR108
+	.word	.LANCHOR104
 	.size	FtlGcBufFree, .-FtlGcBufFree
 	.section	.text.FtlGcBufAlloc,"ax",%progbits
 	.align	1
@@ -8203,82 +4964,47 @@ FtlGcBufFree:
 	.fpu softvfp
 	.type	FtlGcBufAlloc, %function
 FtlGcBufAlloc:
-.LFB393:
-	.loc 6 56 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL708:
-	.loc 6 61 0
-	ldr	r3, .L705
-	.loc 6 60 0
+	ldr	r3, .L712
 	movs	r2, #0
-	.loc 6 56 0
 	push	{r4, r5, r6, r7, r8, r10, lr}
-	.cfi_def_cfa_offset 28
-	.cfi_offset 4, -28
-	.cfi_offset 5, -24
-	.cfi_offset 6, -20
-	.cfi_offset 7, -16
-	.cfi_offset 8, -12
-	.cfi_offset 10, -8
-	.cfi_offset 14, -4
-	.loc 6 62 0
 	mov	ip, #12
-	.loc 6 63 0
 	movs	r7, #1
-	.loc 6 64 0
 	mov	lr, #36
-	.loc 6 61 0
 	ldr	r4, [r3]
-	.loc 6 62 0
-	ldr	r3, .L705+4
+	ldr	r3, .L712+4
 	ldr	r5, [r3]
-.LVL709:
-.L699:
+.L706:
 	uxth	r8, r2
-	.loc 6 60 0 discriminator 1
 	cmp	r1, r8
-	bhi	.L703
-	.loc 6 70 0
+	bhi	.L710
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L703:
+.L710:
 	mov	r10, #0
-.L700:
-.LVL710:
+.L707:
 	uxth	r3, r10
-	.loc 6 61 0 discriminator 1
 	cmp	r4, r3
-	bls	.L701
-	.loc 6 62 0
+	bls	.L708
 	mla	r3, ip, r3, r5
 	add	r10, r10, #1
-.LVL711:
 	ldr	r6, [r3, #8]
 	cmp	r6, #0
-	bne	.L700
-	.loc 6 64 0
+	bne	.L707
 	mla	r8, lr, r8, r0
-	ldr	r6, [r3]
-	.loc 6 63 0
 	str	r7, [r3, #8]
-	.loc 6 64 0
-	str	r6, [r8, #8]
-	.loc 6 65 0
+	ldr	r6, [r3]
 	ldr	r3, [r3, #4]
+	str	r6, [r8, #8]
 	str	r3, [r8, #12]
-.L701:
-.LVL712:
+.L708:
 	adds	r2, r2, #1
-.LVL713:
-	b	.L699
-.L706:
+	b	.L706
+.L713:
 	.align	2
-.L705:
-	.word	.LANCHOR107
-	.word	.LANCHOR103
-	.cfi_endproc
-.LFE393:
+.L712:
+	.word	.LANCHOR108
+	.word	.LANCHOR104
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
 	.section	.text.IsBlkInGcList,"ax",%progbits
 	.align	1
@@ -8289,48 +5015,30 @@ FtlGcBufAlloc:
 	.fpu softvfp
 	.type	IsBlkInGcList, %function
 IsBlkInGcList:
-.LFB394:
-	.loc 6 73 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL714:
-	.loc 6 77 0
-	ldr	r3, .L712
-	.loc 6 76 0
-	ldr	r2, .L712+4
-	.loc 6 77 0
+	ldr	r3, .L719
+	ldr	r2, .L719+4
 	ldr	r3, [r3]
 	ldrh	r2, [r2]
 	add	r2, r3, r2, lsl #1
-.LVL715:
-.L708:
-	.loc 6 76 0 discriminator 1
+.L715:
 	cmp	r3, r2
-	bne	.L710
-	.loc 6 80 0
+	bne	.L717
 	movs	r0, #0
-.LVL716:
 	bx	lr
-.LVL717:
-.L710:
-	.loc 6 77 0
+.L717:
 	ldrh	r1, [r3], #2
 	cmp	r1, r0
-	bne	.L708
-	.loc 6 78 0
+	bne	.L715
 	movs	r0, #1
-.LVL718:
-	.loc 6 81 0
 	bx	lr
-.L713:
+.L720:
 	.align	2
-.L712:
-	.word	.LANCHOR108
+.L719:
 	.word	.LANCHOR109
-	.cfi_endproc
-.LFE394:
+	.word	.LANCHOR110
 	.size	IsBlkInGcList, .-IsBlkInGcList
 	.section	.text.FtlGcUpdatePage,"ax",%progbits
 	.align	1
@@ -8341,95 +5049,56 @@ IsBlkInGcList:
 	.fpu softvfp
 	.type	FtlGcUpdatePage, %function
 FtlGcUpdatePage:
-.LFB395:
-	.loc 6 84 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL719:
 	push	{r3, r4, r5, r6, r7, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 3, -24
-	.cfi_offset 4, -20
-	.cfi_offset 5, -16
-	.cfi_offset 6, -12
-	.cfi_offset 7, -8
-	.cfi_offset 14, -4
-	.loc 6 84 0
 	mov	r5, r0
-	.loc 6 90 0
-	ldr	r4, .L718
-	.loc 6 87 0
+	ldr	r4, .L725
 	ubfx	r0, r0, #10, #16
-.LVL720:
-	.loc 6 84 0
 	mov	r6, r1
 	mov	r7, r2
-	.loc 6 87 0
 	bl	P2V_block_in_plane
-.LVL721:
-	.loc 6 91 0
-	ldr	r3, .L718+4
-	.loc 6 90 0
+	ldr	r3, .L725+4
 	ldrh	r1, [r4]
-	.loc 6 91 0
 	ldr	r2, [r3]
-	.loc 6 90 0
 	movs	r3, #0
-.LVL722:
-.L715:
+.L722:
 	uxth	ip, r3
-.LVL723:
-	.loc 6 90 0 is_stmt 0 discriminator 1
 	cmp	ip, r1
-	bcc	.L717
-	.loc 6 95 0 is_stmt 1
-	bne	.L716
-	.loc 6 96 0
+	bcc	.L724
+	bne	.L723
 	strh	r0, [r2, ip, lsl #1]	@ movhi
-	.loc 6 97 0
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	b	.L716
-.L717:
+	b	.L723
+.L724:
 	adds	r3, r3, #1
-	.loc 6 91 0
 	add	ip, r2, r3, lsl #1
-.LVL724:
 	ldrh	ip, [ip, #-2]
 	cmp	ip, r0
-	bne	.L715
-.L716:
-	.loc 6 100 0
-	ldr	r0, .L718+8
-.LVL725:
-	movs	r3, #12
-	ldrh	r2, [r0]
-	muls	r3, r2, r3
-	ldr	r2, .L718+12
-	ldr	r2, [r2]
-	adds	r1, r2, r3
-	str	r6, [r1, #4]
-	.loc 6 101 0
-	str	r7, [r1, #8]
-	.loc 6 102 0
-	str	r5, [r2, r3]
-	.loc 6 106 0
-	ldrh	r3, [r0]
-	adds	r3, r3, #1
-	strh	r3, [r0]	@ movhi
+	bne	.L722
+.L723:
+	ldr	r2, .L725+8
+	movs	r0, #12
+	ldr	r1, .L725+12
+	ldrh	r3, [r2]
+	ldr	r1, [r1]
+	muls	r0, r3, r0
+	adds	r3, r3, #1
+	adds	r4, r1, r0
+	str	r6, [r4, #4]
+	str	r7, [r4, #8]
+	str	r5, [r1, r0]
+	strh	r3, [r2]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.LVL726:
-.L719:
+.L726:
 	.align	2
-.L718:
+.L725:
+	.word	.LANCHOR110
 	.word	.LANCHOR109
-	.word	.LANCHOR108
 	.word	.LANCHOR111
-	.word	.LANCHOR110
-	.cfi_endproc
-.LFE395:
+	.word	.LANCHOR112
 	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
 	.section	.text.FtlGcRefreshBlock,"ax",%progbits
 	.align	1
@@ -8440,53 +5109,54 @@ FtlGcUpdatePage:
 	.fpu softvfp
 	.type	FtlGcRefreshBlock, %function
 FtlGcRefreshBlock:
-.LFB403:
-	.loc 6 380 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL727:
-	push	{r4, r5, lr}
-	.cfi_def_cfa_offset 12
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 6 384 0
-	ldr	r4, .L723
+	ldr	ip, .L732+12
+	push	{r4, r5, r6, r7, lr}
+	ldrh	lr, [ip]
+	cmp	lr, r0
+	beq	.L728
+	ldr	r6, .L732
+	ldrh	r7, [r6]
+	cmp	r0, r7
+	beq	.L728
+	ldr	r4, .L732+4
 	ldrh	r5, [r4]
-	cmp	r5, r0
-	beq	.L721
-	.loc 6 384 0 is_stmt 0 discriminator 1
-	ldr	r3, .L723+4
-	ldrh	r1, [r3]
+	cmp	r0, r5
+	beq	.L728
+	ldr	r2, .L732+8
+	ldrh	r1, [r2]
 	cmp	r0, r1
-	beq	.L721
-	.loc 6 386 0 is_stmt 1
-	movw	r2, #65535
-	cmp	r5, r2
-	bne	.L722
-	.loc 6 387 0
-	strh	r0, [r4]	@ movhi
-.L721:
-	.loc 6 400 0
+	beq	.L728
+	movw	r3, #65535
+	cmp	lr, r3
+	bne	.L729
+	strh	r0, [ip]	@ movhi
+.L728:
 	movs	r0, #0
-.LVL728:
-	pop	{r4, r5, pc}
-.LVL729:
-.L722:
-	.loc 6 388 0
-	cmp	r1, r2
-	.loc 6 389 0
+	pop	{r4, r5, r6, r7, pc}
+.L729:
+	cmp	r7, r3
+	bne	.L730
+	strh	r0, [r6]	@ movhi
+	b	.L728
+.L730:
+	cmp	r5, r3
+	bne	.L731
+	strh	r0, [r4]	@ movhi
+	b	.L728
+.L731:
+	cmp	r1, r3
 	it	eq
-	strheq	r0, [r3]	@ movhi
-	b	.L721
-.L724:
+	strheq	r0, [r2]	@ movhi
+	b	.L728
+.L733:
 	.align	2
-.L723:
-	.word	.LANCHOR112
+.L732:
+	.word	.LANCHOR114
+	.word	.LANCHOR115
+	.word	.LANCHOR116
 	.word	.LANCHOR113
-	.cfi_endproc
-.LFE403:
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
 	.section	.text.FtlGcRefreshOpenBlock,"ax",%progbits
 	.align	1
@@ -8497,14 +5167,10 @@ FtlGcRefreshBlock:
 	.fpu softvfp
 	.type	FtlGcRefreshOpenBlock, %function
 FtlGcRefreshOpenBlock:
-.LFB544:
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	b	FtlGcRefreshBlock
-	.cfi_endproc
-.LFE544:
 	.size	FtlGcRefreshOpenBlock, .-FtlGcRefreshOpenBlock
 	.section	.text.FtlGcMarkBadPhyBlk,"ax",%progbits
 	.align	1
@@ -8515,91 +5181,55 @@ FtlGcRefreshOpenBlock:
 	.fpu softvfp
 	.type	FtlGcMarkBadPhyBlk, %function
 FtlGcMarkBadPhyBlk:
-.LFB404:
-	.loc 6 403 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL730:
-	.loc 6 403 0
 	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 6 403 0
 	mov	r4, r0
-	.loc 6 405 0
 	bl	P2V_block_in_plane
-.LVL731:
 	mov	r5, r0
-.LVL732:
-	.loc 6 410 0
 	bl	FtlGcRefreshBlock
-.LVL733:
-	.loc 6 411 0
-	ldr	r3, .L734
+	ldr	r3, .L743
 	ldr	r3, [r3]
-	cbz	r3, .L727
-	.loc 6 412 0
-	ldr	r3, .L734+4
+	cbz	r3, .L736
+	ldr	r3, .L743+4
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r5, lsl #1]
-	cmp	r3, #29
-	.loc 6 413 0
+	cmp	r3, #39
 	itt	hi
-	subhi	r3, r3, #30
+	subhi	r3, r3, #40
 	strhhi	r3, [r2, r5, lsl #1]	@ movhi
-.L727:
-.LVL734:
-	.loc 6 416 0
-	ldr	r2, .L734+8
+.L736:
+	ldr	r2, .L743+8
 	movs	r1, #0
-	.loc 6 417 0
-	ldr	r5, .L734+12
-.LVL735:
-	.loc 6 416 0
+	ldr	r5, .L743+12
 	ldrh	r3, [r2]
-.LVL736:
-.L728:
-	.loc 6 416 0 is_stmt 0 discriminator 1
+.L737:
 	uxth	r0, r1
 	cmp	r3, r0
-	bhi	.L730
-	.loc 6 420 0 is_stmt 1
+	bhi	.L739
 	cmp	r3, #15
-	.loc 6 421 0
 	itttt	ls
 	addls	r1, r3, #1
-.LVL737:
 	strhls	r1, [r2]	@ movhi
-	ldrls	r2, .L734+12
+	ldrls	r2, .L743+12
 	strhls	r4, [r2, r3, lsl #1]	@ movhi
-	b	.L729
-.LVL738:
-.L730:
+	b	.L738
+.L739:
 	adds	r1, r1, #1
-.LVL739:
-	.loc 6 417 0
 	add	r0, r5, r1, lsl #1
-.LVL740:
 	ldrh	r0, [r0, #-2]
 	cmp	r0, r4
-	bne	.L728
-.L729:
-	.loc 6 423 0
+	bne	.L737
+.L738:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L735:
+.L744:
 	.align	2
-.L734:
+.L743:
 	.word	.LANCHOR28
-	.word	.LANCHOR78
-	.word	.LANCHOR114
-	.word	.LANCHOR115
-	.cfi_endproc
-.LFE404:
+	.word	.LANCHOR79
+	.word	.LANCHOR117
+	.word	.LANCHOR118
 	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
 	.section	.text.FtlGcReFreshBadBlk,"ax",%progbits
 	.align	1
@@ -8610,65 +5240,127 @@ FtlGcMarkBadPhyBlk:
 	.fpu softvfp
 	.type	FtlGcReFreshBadBlk, %function
 FtlGcReFreshBadBlk:
-.LFB405:
-	.loc 6 427 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	.loc 6 428 0
-	ldr	r3, .L742
-	.loc 6 427 0
+	ldr	r3, .L751
 	push	{r4, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 4, -8
-	.cfi_offset 14, -4
-	.loc 6 428 0
 	ldrh	r3, [r3]
-	cbz	r3, .L737
-	.loc 6 428 0 is_stmt 0 discriminator 1
-	ldr	r2, .L742+4
+	cbz	r3, .L746
+	ldr	r2, .L751+4
 	ldrh	r1, [r2]
 	movw	r2, #65535
 	cmp	r1, r2
-	bne	.L737
-	.loc 6 429 0 is_stmt 1
-	ldr	r4, .L742+8
+	bne	.L746
+	ldr	r4, .L751+8
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	.loc 6 430 0
 	itt	cs
 	movcs	r3, #0
 	strhcs	r3, [r4]	@ movhi
-.LBB295:
-.LBB296:
-	.loc 6 431 0
-	ldr	r3, .L742+12
+	ldr	r3, .L751+12
 	ldrh	r2, [r4]
 	ldrh	r0, [r3, r2, lsl #1]
 	bl	P2V_block_in_plane
-.LVL741:
 	bl	FtlGcRefreshBlock
-.LVL742:
-	.loc 6 432 0
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-.L737:
-.LBE296:
-.LBE295:
-	.loc 6 435 0
+.L746:
 	movs	r0, #0
 	pop	{r4, pc}
-.L743:
+.L752:
 	.align	2
-.L742:
-	.word	.LANCHOR114
-	.word	.LANCHOR112
-	.word	.LANCHOR116
-	.word	.LANCHOR115
-	.cfi_endproc
-.LFE405:
+.L751:
+	.word	.LANCHOR117
+	.word	.LANCHOR113
+	.word	.LANCHOR119
+	.word	.LANCHOR118
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
+	.section	.text.flash_boot_enter_slc_mode,"ax",%progbits
+	.align	1
+	.global	flash_boot_enter_slc_mode
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_boot_enter_slc_mode, %function
+flash_boot_enter_slc_mode:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L755
+	ldr	r2, [r3]
+	ldr	r3, .L755+4
+	cmp	r2, r3
+	bne	.L753
+	b	flash_enter_slc_mode
+.L753:
+	bx	lr
+.L756:
+	.align	2
+.L755:
+	.word	.LANCHOR29
+	.word	1446522928
+	.size	flash_boot_enter_slc_mode, .-flash_boot_enter_slc_mode
+	.section	.text.flash_boot_exit_slc_mode,"ax",%progbits
+	.align	1
+	.global	flash_boot_exit_slc_mode
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_boot_exit_slc_mode, %function
+flash_boot_exit_slc_mode:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L759
+	ldr	r2, [r3]
+	ldr	r3, .L759+4
+	cmp	r2, r3
+	bne	.L757
+	b	flash_exit_slc_mode
+.L757:
+	bx	lr
+.L760:
+	.align	2
+.L759:
+	.word	.LANCHOR29
+	.word	1446522928
+	.size	flash_boot_exit_slc_mode, .-flash_boot_exit_slc_mode
+	.section	.text.FW_FlashBlockErase.constprop.41,"ax",%progbits
+	.align	1
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FW_FlashBlockErase.constprop.41, %function
+FW_FlashBlockErase.constprop.41:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L762
+	push	{r4, lr}
+	mov	r4, r0
+	movs	r0, #0
+	ldr	r3, [r3]
+	ldrb	r1, [r3, #9]	@ zero_extendqisi2
+	bl	flash_boot_enter_slc_mode
+	mov	r0, r4
+	bl	__aeabi_uidiv
+	movs	r2, #0
+	mov	r1, r0
+	mov	r0, r2
+	bl	FlashEraseBlock
+	mov	r1, r0
+	movs	r0, #0
+	bl	flash_boot_exit_slc_mode
+	uxtb	r0, r1
+	pop	{r4, pc}
+.L763:
+	.align	2
+.L762:
+	.word	.LANCHOR18
+	.size	FW_FlashBlockErase.constprop.41, .-FW_FlashBlockErase.constprop.41
 	.section	.text.ftl_memset,"ax",%progbits
 	.align	1
 	.global	ftl_memset
@@ -8678,19 +5370,10 @@ FtlGcReFreshBadBlk:
 	.fpu softvfp
 	.type	ftl_memset, %function
 ftl_memset:
-.LFB480:
-	.file 7 "drivers/rknand/rkftl/FTL_OSDepend_3.10.c"
-	.loc 7 27 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL743:
-	.loc 7 28 0
 	b	memset
-.LVL744:
-	.cfi_endproc
-.LFE480:
 	.size	ftl_memset, .-ftl_memset
 	.section	.text.BuildFlashLsbPageTable,"ax",%progbits
 	.align	1
@@ -8701,273 +5384,172 @@ ftl_memset:
 	.fpu softvfp
 	.type	BuildFlashLsbPageTable, %function
 BuildFlashLsbPageTable:
-.LFB233:
-	.loc 2 930 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL745:
 	push	{r4, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 4, -8
-	.cfi_offset 14, -4
-	.loc 2 930 0
 	mov	r4, r1
-	.loc 2 933 0
-	cbnz	r0, .L746
-	.loc 2 935 0 discriminator 3
-	ldr	r3, .L783
-.LVL746:
-.L747:
+	cbnz	r0, .L766
+	ldr	r3, .L803
+.L767:
 	strh	r0, [r3, r0, lsl #1]	@ movhi
-.LVL747:
 	adds	r0, r0, #1
-.LVL748:
-	.loc 2 934 0 discriminator 3
 	cmp	r0, #256
-	bne	.L747
-.LVL749:
-.L753:
-	.loc 2 966 0
+	bne	.L767
+.L773:
 	movs	r1, #255
 	mov	r2, #1024
-	ldr	r0, .L783+4
-	.loc 2 967 0
+	ldr	r0, .L803+4
 	uxth	r4, r4
-.LVL750:
-	.loc 2 966 0
 	bl	ftl_memset
-.LVL751:
-	.loc 2 969 0
-	ldr	r1, .L783
-	.loc 2 968 0
+	ldr	r1, .L803
 	movs	r3, #0
-	.loc 2 969 0
-	ldr	r0, .L783+4
-.LVL752:
-.L748:
-	.loc 2 968 0 discriminator 1
+	ldr	r0, .L803+4
+.L768:
 	uxth	r2, r3
 	cmp	r4, r2
-	bhi	.L770
-	.loc 2 974 0
+	bhi	.L790
 	pop	{r4, pc}
-.LVL753:
-.L746:
-	.loc 2 936 0
+.L766:
 	cmp	r0, #1
-	bne	.L749
-	.loc 2 939 0
-	ldr	r1, .L783
-.LVL754:
+	bne	.L769
+	ldr	r1, .L803
 	movs	r3, #0
-.LVL755:
-.L752:
+.L772:
 	cmp	r3, #3
 	uxth	r2, r3
-.LVL756:
-	bls	.L750
-	.loc 2 939 0 is_stmt 0 discriminator 1
+	bls	.L770
 	tst	r2, #1
 	ite	ne
 	movne	r0, #3
 	moveq	r0, #2
 	rsb	r2, r0, r2, lsl #1
-.LVL757:
 	uxth	r2, r2
-.L750:
-	.loc 2 939 0 discriminator 8
+.L770:
 	strh	r2, [r1, r3, lsl #1]	@ movhi
-.LVL758:
 	adds	r3, r3, #1
-.LVL759:
-	.loc 2 938 0 is_stmt 1 discriminator 8
 	cmp	r3, #256
-	bne	.L752
-	b	.L753
-.LVL760:
-.L749:
-	.loc 2 940 0
+	bne	.L772
+	b	.L773
+.L769:
 	cmp	r0, #2
-	bne	.L754
-	.loc 2 943 0
-	ldr	r1, .L783
-.LVL761:
+	bne	.L774
+	ldr	r1, .L803
 	movs	r2, #0
-.L756:
+.L776:
 	uxth	r3, r2
-.LVL762:
 	cmp	r2, #1
 	ittt	hi
 	lslhi	r3, r3, #1
-.LVL763:
 	addhi	r3, r3, #-1
 	uxthhi	r3, r3
 	strh	r3, [r1, r2, lsl #1]	@ movhi
-.LVL764:
 	adds	r2, r2, #1
-.LVL765:
-	.loc 2 942 0
 	cmp	r2, #256
-	bne	.L756
-	b	.L753
-.LVL766:
-.L754:
-	.loc 2 944 0
+	bne	.L776
+	b	.L773
+.L774:
 	cmp	r0, #3
-	bne	.L757
-	.loc 2 947 0
-	ldr	r1, .L783
-.LVL767:
+	bne	.L777
+	ldr	r1, .L803
 	movs	r3, #0
-.LVL768:
-.L760:
+.L780:
 	cmp	r3, #5
 	uxth	r2, r3
-.LVL769:
-	bls	.L758
-	.loc 2 947 0 is_stmt 0 discriminator 1
+	bls	.L778
 	tst	r2, #1
 	ite	ne
 	movne	r0, #5
 	moveq	r0, #4
 	rsb	r2, r0, r2, lsl #1
-.LVL770:
 	uxth	r2, r2
-.L758:
-	.loc 2 947 0 discriminator 8
+.L778:
 	strh	r2, [r1, r3, lsl #1]	@ movhi
-.LVL771:
 	adds	r3, r3, #1
-.LVL772:
-	.loc 2 946 0 is_stmt 1 discriminator 8
 	cmp	r3, #256
-	bne	.L760
-	b	.L753
-.LVL773:
-.L757:
-	.loc 2 948 0
+	bne	.L780
+	b	.L773
+.L777:
 	cmp	r0, #4
 	mov	r3, #0
-	bne	.L761
-.LVL774:
-	.loc 2 951 0 discriminator 2
-	ldr	r2, .L783
+	bne	.L781
+	ldr	r2, .L803
 	strh	r3, [r2]	@ movhi
-.LVL775:
 	movs	r3, #1
 	strh	r3, [r2, #2]	@ movhi
-.LVL776:
 	movs	r3, #2
 	strh	r3, [r2, #4]	@ movhi
-.LVL777:
 	movs	r3, #3
 	strh	r3, [r2, #6]	@ movhi
-.LVL778:
 	movs	r3, #5
 	strh	r3, [r2, #10]	@ movhi
 	movs	r3, #7
 	strh	r3, [r2, #12]	@ movhi
 	movs	r3, #8
 	strh	r0, [r2, #8]	@ movhi
-.LVL779:
 	strh	r3, [r2, #14]!	@ movhi
-.LVL780:
-.L763:
-	.loc 2 953 0
+.L783:
 	tst	r3, #1
 	ite	ne
 	movne	r1, #7
 	moveq	r1, #6
 	rsb	r1, r1, r3, lsl #1
-	.loc 2 952 0
 	adds	r3, r3, #1
-.LVL781:
 	uxth	r3, r3
-.LVL782:
-	.loc 2 953 0
 	strh	r1, [r2, #2]!	@ movhi
-	.loc 2 952 0
 	cmp	r3, #256
-	bne	.L763
-	b	.L753
-.LVL783:
-.L761:
-	.loc 2 954 0
+	bne	.L783
+	b	.L773
+.L781:
 	cmp	r0, #5
-	bne	.L764
-	.loc 2 957 0 discriminator 3
-	ldr	r2, .L783
-.L765:
-.LVL784:
+	bne	.L784
+	ldr	r2, .L803
+.L785:
 	strh	r3, [r2, r3, lsl #1]	@ movhi
-.LVL785:
 	adds	r3, r3, #1
-.LVL786:
-	.loc 2 956 0 discriminator 3
 	cmp	r3, #16
-	bne	.L765
-	ldr	r2, .L783+8
-.LVL787:
-.L766:
-	.loc 2 959 0 discriminator 2
+	bne	.L785
+	ldr	r2, .L803+8
+.L786:
 	strh	r3, [r2, #2]!	@ movhi
 	adds	r3, r3, #2
 	uxth	r3, r3
-	.loc 2 958 0 discriminator 2
 	cmp	r3, #496
-	bne	.L766
-	b	.L753
-.L764:
-	.loc 2 960 0
+	bne	.L786
+	b	.L773
+.L784:
 	cmp	r0, #6
-	bne	.L753
-	.loc 2 963 0
-	ldr	r0, .L783
-.LVL788:
+	bne	.L773
+	ldr	r0, .L803
 	mov	r1, r3
-.LVL789:
-.L769:
+.L789:
 	cmp	r1, #5
 	uxth	r2, r1
-.LVL790:
-	bls	.L767
-	.loc 2 963 0 is_stmt 0 discriminator 1
+	bls	.L787
 	tst	r2, #1
 	ite	ne
 	movne	r2, #12
-.LVL791:
 	moveq	r2, #10
 	subs	r2, r3, r2
 	uxth	r2, r2
-.L767:
-	.loc 2 963 0 discriminator 8
+.L787:
 	strh	r2, [r0, r1, lsl #1]	@ movhi
-.LVL792:
 	adds	r1, r1, #1
-.LVL793:
-	.loc 2 962 0 is_stmt 1 discriminator 8
 	cmp	r1, #256
 	add	r3, r3, #3
 	uxth	r3, r3
-	bne	.L769
-	b	.L753
-.LVL794:
-.L770:
-	.loc 2 969 0 discriminator 3
+	bne	.L789
+	b	.L773
+.L790:
 	ldrh	r2, [r1, r3, lsl #1]
 	adds	r3, r3, #1
-.LVL795:
 	strh	r2, [r0, r2, lsl #1]	@ movhi
-	b	.L748
-.L784:
+	b	.L768
+.L804:
 	.align	2
-.L783:
+.L803:
 	.word	.LANCHOR16
-	.word	.LANCHOR117
+	.word	.LANCHOR120
 	.word	.LANCHOR16+30
-	.cfi_endproc
-.LFE233:
 	.size	BuildFlashLsbPageTable, .-BuildFlashLsbPageTable
 	.section	.text.FlashDieInfoInit,"ax",%progbits
 	.align	1
@@ -8978,191 +5560,129 @@ BuildFlashLsbPageTable:
 	.fpu softvfp
 	.type	FlashDieInfoInit, %function
 FlashDieInfoInit:
-.LFB248:
-	.loc 2 2048 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 2051 0
 	movs	r3, #0
-	.loc 2 2052 0
-	ldr	r2, .L803
-	.loc 2 2051 0
-	ldr	r5, .L803+4
-	.loc 2 2052 0
+	ldr	r2, .L823
+	ldr	r4, .L823+4
 	strb	r3, [r2]
-	mov	fp, r2
-	ldr	r7, .L803+8
-	.loc 2 2051 0
-	strb	r3, [r5]
-	.loc 2 2053 0
-	ldr	r3, .L803+12
+	str	r2, [sp]
+	strb	r3, [r4]
+	ldr	r3, .L823+8
+	ldr	r7, .L823+12
 	ldrh	r3, [r3, #10]
-	.loc 2 2054 0
 	cmp	r3, #256
-	bls	.L786
-	.loc 2 2055 0
+	bls	.L806
 	mov	r3, #512
-.L802:
-	.loc 2 2059 0
+.L822:
 	movs	r2, #8
 	movs	r1, #0
-	ldr	r0, .L803+16
-	.loc 2 2066 0
+	ldr	r0, .L823+16
 	movs	r6, #0
-	.loc 2 2057 0
 	str	r3, [r7]
-	.loc 2 2059 0
 	bl	ftl_memset
-.LVL796:
-	.loc 2 2060 0
 	movs	r2, #32
 	movs	r1, #0
-	ldr	r0, .L803+20
+	ldr	r0, .L823+20
 	bl	ftl_memset
-.LVL797:
-	.loc 2 2061 0
 	movs	r2, #128
 	movs	r1, #0
-	ldr	r0, .L803+24
+	ldr	r0, .L823+24
 	bl	ftl_memset
-.LVL798:
-	.loc 2 2067 0
-	ldr	r3, .L803+28
-	ldr	r10, .L803+36
-	ldr	r4, [r3]
-	.loc 2 2069 0
-	ldr	r3, .L803+16
-	.loc 2 2067 0
-	add	r8, r4, #1
-.LVL799:
-.L790:
-	ldrb	r2, [r4]	@ zero_extendqisi2
-	add	r1, r10, r6, lsl #3
+	ldr	r3, .L823+28
+	ldr	fp, .L823+36
+	ldr	r5, [r3]
+	ldr	r3, .L823+16
+	ldrb	r10, [r5]	@ zero_extendqisi2
+	add	r8, r5, #1
+.L810:
+	mov	r2, r10
+	add	r1, fp, r6, lsl #3
 	mov	r0, r8
 	str	r3, [sp, #4]
-.LVL800:
 	bl	FlashMemCmp8
-.LVL801:
 	ldr	r3, [sp, #4]
-	cbnz	r0, .L789
-	.loc 2 2068 0
-	ldrb	r2, [r5]	@ zero_extendqisi2
-	ldr	r1, .L803+20
-	.loc 2 2069 0
+	cbnz	r0, .L809
+	ldrb	r2, [r4]	@ zero_extendqisi2
+	ldr	r1, .L823+20
 	strb	r6, [r3, r2]
-	.loc 2 2068 0
 	str	r0, [r1, r2, lsl #2]
-	.loc 2 2069 0
 	adds	r1, r2, #1
-	strb	r1, [r5]
-.L789:
-	.loc 2 2066 0 discriminator 2
+	strb	r1, [r4]
+.L809:
 	adds	r6, r6, #1
-.LVL802:
 	cmp	r6, #4
-	bne	.L790
-	.loc 2 2076 0
-	ldrb	r3, [r5]	@ zero_extendqisi2
-	strb	r3, [fp]
-	.loc 2 2077 0
-	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	bne	.L810
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	ldr	r2, [sp]
+	strb	r3, [r2]
+	ldrb	r3, [r5, #8]	@ zero_extendqisi2
 	cmp	r3, #2
-	beq	.L791
-.L795:
-	.loc 2 2087 0
-	ldrh	r2, [r4, #14]
-	ldrb	r3, [r5]	@ zero_extendqisi2
+	beq	.L811
+.L815:
+	ldrh	r2, [r5, #14]
+	ldrb	r3, [r4]	@ zero_extendqisi2
 	smulbb	r3, r3, r2
-	ldrb	r2, [r4, #13]	@ zero_extendqisi2
+	ldrb	r2, [r5, #13]	@ zero_extendqisi2
 	smulbb	r3, r3, r2
-	ldr	r2, .L803+32
+	ldr	r2, .L823+32
 	strh	r3, [r2]	@ movhi
-	.loc 2 2088 0
 	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL803:
-.L786:
-	.cfi_restore_state
-	.loc 2 2056 0
+.L806:
 	cmp	r3, #128
-	.loc 2 2057 0
 	it	hi
 	movhi	r3, #256
-	b	.L802
-.LVL804:
-.L791:
-	.loc 2 2080 0
-	ldr	r10, [r7]
+	b	.L822
+.L811:
+	ldr	fp, [r7]
 	movs	r6, #0
-.LVL805:
-	ldr	r7, .L803+20
-	.loc 2 2083 0
-	ldr	fp, .L803+16
-.L794:
-.LVL806:
-	.loc 2 2079 0
-	ldr	r3, .L803+36
+	ldr	r7, .L823+20
+	ldr	r3, .L823+16
+.L814:
+	str	r3, [sp]
+	mov	r2, r10
+	ldr	r3, .L823+36
 	mov	r0, r8
-	ldrb	r2, [r4]	@ zero_extendqisi2
 	add	r1, r3, r6, lsl #3
 	bl	FlashMemCmp8
-.LVL807:
-	cbnz	r0, .L792
-	.loc 2 2080 0
-	ldrh	r3, [r4, #14]
-	ldrb	r2, [r5]	@ zero_extendqisi2
-	and	r1, r3, #65280
-	ldrb	r3, [r4, #13]	@ zero_extendqisi2
-	mul	r3, r10, r3
-	muls	r3, r1, r3
-	str	r3, [r7, r2, lsl #2]
-	.loc 2 2081 0
-	ldrb	r1, [r4, #23]	@ zero_extendqisi2
-	cbz	r1, .L793
-	.loc 2 2082 0
-	lsls	r3, r3, #1
-	str	r3, [r7, r2, lsl #2]
-.L793:
-	.loc 2 2083 0
-	adds	r3, r2, #1
-	strb	r6, [fp, r2]
-	strb	r3, [r5]
-.L792:
-	.loc 2 2078 0 discriminator 2
+	ldr	r3, [sp]
+	cbnz	r0, .L812
+	ldrh	r2, [r5, #14]
+	ldrb	r1, [r4]	@ zero_extendqisi2
+	and	r0, r2, #65280
+	ldrb	r2, [r5, #13]	@ zero_extendqisi2
+	mul	r2, fp, r2
+	muls	r2, r0, r2
+	str	r2, [r7, r1, lsl #2]
+	ldrb	r0, [r5, #23]	@ zero_extendqisi2
+	cbz	r0, .L813
+	lsls	r2, r2, #1
+	str	r2, [r7, r1, lsl #2]
+.L813:
+	adds	r2, r1, #1
+	strb	r6, [r3, r1]
+	strb	r2, [r4]
+.L812:
 	adds	r6, r6, #1
-.LVL808:
 	cmp	r6, #4
-	bne	.L794
-	b	.L795
-.L804:
+	bne	.L814
+	b	.L815
+.L824:
 	.align	2
-.L803:
-	.word	.LANCHOR118
+.L823:
+	.word	.LANCHOR121
 	.word	.LANCHOR25
+	.word	.LANCHOR31
 	.word	.LANCHOR3
-	.word	.LANCHOR30
 	.word	.LANCHOR26
 	.word	.LANCHOR17
 	.word	.LANCHOR23
 	.word	.LANCHOR18
-	.word	.LANCHOR119
+	.word	.LANCHOR122
 	.word	.LANCHOR22
-	.cfi_endproc
-.LFE248:
 	.size	FlashDieInfoInit, .-FlashDieInfoInit
 	.section	.text.ReadFlashInfo,"ax",%progbits
 	.align	1
@@ -9173,111 +5693,69 @@ FlashDieInfoInit:
 	.fpu softvfp
 	.type	ReadFlashInfo, %function
 ReadFlashInfo:
-.LFB266:
-	.loc 2 3343 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL809:
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 2 3346 0
 	movs	r2, #11
 	movs	r1, #0
-	.loc 2 3343 0
 	mov	r4, r0
-.LVL810:
-	.loc 2 3360 0
-	movs	r5, #1
-	.loc 2 3346 0
 	bl	ftl_memset
-.LVL811:
-	.loc 2 3348 0
-	ldr	r1, .L808
-	ldr	r2, .L808+4
-	ldr	r3, [r1]
-	ldr	r2, [r2]
-	ldrb	r3, [r3, #9]	@ zero_extendqisi2
-	smulbb	r3, r3, r2
+	ldr	r3, .L828
 	movs	r2, #0
+	ldr	r1, [r3]
+	ldr	r3, .L828+4
+	ldrb	r0, [r1, #9]	@ zero_extendqisi2
+	ldr	r3, [r3]
+	smulbb	r3, r3, r0
 	uxth	r3, r3
 	strb	r3, [r4, #4]
 	lsrs	r3, r3, #8
 	strb	r3, [r4, #5]
-	.loc 2 3349 0
-	ldr	r3, .L808+8
+	ldr	r3, .L828+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	strb	r3, [r4, #7]
-.LBB297:
-.LBB298:
-	.loc 4 1826 0
-	ldr	r3, .L808+12
-	ldr	r3, [r3]
-.LBE298:
-.LBE297:
-	.loc 2 3351 0
-	ubfx	r0, r3, #8, #8
-	strb	r3, [r4]
-	strb	r0, [r4, #1]
-	ubfx	r0, r3, #16, #8
-	lsrs	r3, r3, #24
-	strb	r0, [r4, #2]
-	.loc 2 3360 0
-	ldr	r0, .L808+16
-	.loc 2 3351 0
+	ldr	r3, .L828+12
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	strb	r5, [r4]
+	ldrb	r5, [r3, #1]	@ zero_extendqisi2
+	strb	r5, [r4, #1]
+	ldrb	r5, [r3, #2]	@ zero_extendqisi2
+	ldrb	r3, [r3, #3]	@ zero_extendqisi2
+	strb	r0, [r4, #6]
+	strb	r5, [r4, #2]
+	movs	r5, #1
 	strb	r3, [r4, #3]
-	.loc 2 3355 0
-	ldr	r3, [r1]
-	ldrb	r1, [r3, #9]	@ zero_extendqisi2
-	strb	r1, [r4, #6]
-	.loc 2 3356 0
-	movs	r1, #32
-	strb	r1, [r4, #8]
-	.loc 2 3357 0
-	ldrb	r3, [r3, #7]	@ zero_extendqisi2
-	.loc 2 3358 0
+	movs	r3, #32
+	strb	r3, [r4, #8]
+	ldrb	r3, [r1, #7]	@ zero_extendqisi2
+	ldr	r0, .L828+16
 	strb	r2, [r4, #10]
-.LVL812:
-	.loc 2 3357 0
 	strb	r3, [r4, #9]
-	.loc 2 3359 0
-	ldr	r3, .L808+20
+	ldr	r3, .L828+20
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	mov	r3, r2
-.LVL813:
-.L806:
-	.loc 2 3359 0 is_stmt 0 discriminator 1
+.L826:
 	uxtb	r2, r3
 	cmp	r1, r2
-	bhi	.L807
-	.loc 2 3361 0 is_stmt 1
+	bhi	.L827
 	pop	{r4, r5, r6, pc}
-.LVL814:
-.L807:
-	.loc 2 3360 0 discriminator 3
+.L827:
 	ldrb	r2, [r3, r0]	@ zero_extendqisi2
 	adds	r3, r3, #1
-.LVL815:
 	ldrb	r6, [r4, #10]	@ zero_extendqisi2
 	lsl	r2, r5, r2
 	orrs	r2, r2, r6
 	strb	r2, [r4, #10]
-	b	.L806
-.L809:
+	b	.L826
+.L829:
 	.align	2
-.L808:
+.L828:
 	.word	.LANCHOR18
 	.word	.LANCHOR3
-	.word	.LANCHOR32
-	.word	.LANCHOR68
+	.word	.LANCHOR33
+	.word	.LANCHOR69
 	.word	.LANCHOR26
 	.word	.LANCHOR25
-	.cfi_endproc
-.LFE266:
 	.size	ReadFlashInfo, .-ReadFlashInfo
 	.section	.text.FtlBbt2Bitmap,"ax",%progbits
 	.align	1
@@ -9288,92 +5766,58 @@ ReadFlashInfo:
 	.fpu softvfp
 	.type	FtlBbt2Bitmap, %function
 FtlBbt2Bitmap:
-.LFB319:
-	.loc 5 72 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL816:
-	.loc 5 74 0
-	ldr	r3, .L816
-	.loc 5 72 0
+	ldr	r3, .L836
 	push	{r4, r5, r6, r7, r8, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 4, -24
-	.cfi_offset 5, -20
-	.cfi_offset 6, -16
-	.cfi_offset 7, -12
-	.cfi_offset 8, -8
-	.cfi_offset 14, -4
-	.loc 5 72 0
 	mov	r5, r0
-	.loc 5 79 0
-	ldr	r7, .L816+4
-	.loc 5 72 0
+	ldr	r7, .L836+4
 	mov	r6, r1
 	subs	r4, r5, #2
 	addw	r5, r5, #1022
-	.loc 5 74 0
 	ldrh	r2, [r3]
 	movs	r1, #0
-.LVL817:
-	.loc 5 79 0
-	ldr	r8, .L816+20
-	.loc 5 74 0
+	ldr	r8, .L836+20
 	mov	r0, r6
-.LVL818:
 	lsls	r2, r2, #2
 	bl	ftl_memset
-.LVL819:
-.L813:
-	.loc 5 77 0
+.L833:
 	ldrh	r3, [r4, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L810
-	.loc 5 79 0
+	beq	.L830
 	ldrh	r2, [r7]
 	cmp	r2, r3
-	bhi	.L812
-	.loc 5 79 0 is_stmt 0 discriminator 1
+	bhi	.L832
 	mov	r1, r8
 	movs	r2, #79
-	ldr	r0, .L816+8
+	ldr	r0, .L836+8
 	bl	printf
-.LVL820:
-	ldr	r1, .L816+12
-	ldr	r0, .L816+16
+	ldr	r1, .L836+12
+	ldr	r0, .L836+16
 	bl	printf
-.LVL821:
-.L812:
-	.loc 5 80 0 is_stmt 1 discriminator 2
+.L832:
 	ldrh	r3, [r4, #2]!
 	movs	r2, #1
-	.loc 5 75 0 discriminator 2
 	cmp	r5, r4
-	.loc 5 80 0 discriminator 2
 	lsr	r1, r3, #5
 	and	r3, r3, #31
 	lsl	r3, r2, r3
 	ldr	r2, [r6, r1, lsl #2]
 	orr	r2, r2, r3
 	str	r2, [r6, r1, lsl #2]
-	.loc 5 75 0 discriminator 2
-	bne	.L813
-.L810:
+	bne	.L833
+.L830:
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL822:
-.L817:
+.L837:
 	.align	2
-.L816:
-	.word	.LANCHOR120
-	.word	.LANCHOR50
+.L836:
+	.word	.LANCHOR123
+	.word	.LANCHOR51
+	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC8
-	.word	.LANCHOR121
-	.cfi_endproc
-.LFE319:
+	.word	.LANCHOR124
 	.size	FtlBbt2Bitmap, .-FtlBbt2Bitmap
 	.section	.text.FtlBbtMemInit,"ax",%progbits
 	.align	1
@@ -9384,33 +5828,22 @@ FtlBbt2Bitmap:
 	.fpu softvfp
 	.type	FtlBbtMemInit, %function
 FtlBbtMemInit:
-.LFB322:
-	.loc 5 225 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	.loc 5 226 0
-	ldr	r0, .L819
+	ldr	r0, .L839
 	movw	r3, #65535
-	.loc 5 228 0
 	movs	r2, #16
 	movs	r1, #255
-	.loc 5 226 0
 	strh	r3, [r0]	@ movhi
-	.loc 5 227 0
 	movs	r3, #0
 	strh	r3, [r0, #6]	@ movhi
-	.loc 5 228 0
 	adds	r0, r0, #12
 	b	ftl_memset
-.LVL823:
-.L820:
+.L840:
 	.align	2
-.L819:
-	.word	.LANCHOR74
-	.cfi_endproc
-.LFE322:
+.L839:
+	.word	.LANCHOR75
 	.size	FtlBbtMemInit, .-FtlBbtMemInit
 	.section	.text.FtlFreeSysBlkQueueInit,"ax",%progbits
 	.align	1
@@ -9421,47 +5854,25 @@ FtlBbtMemInit:
 	.fpu softvfp
 	.type	FtlFreeSysBlkQueueInit, %function
 FtlFreeSysBlkQueueInit:
-.LFB330:
-	.loc 1 76 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL824:
-	.loc 1 79 0
-	ldr	r3, .L822
-	.loc 1 83 0
+	ldr	r3, .L842
 	mov	r2, #2048
-	.loc 1 76 0
 	push	{r4, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 4, -8
-	.cfi_offset 14, -4
-	.loc 1 79 0
 	movs	r4, #0
-	.loc 1 83 0
 	mov	r1, r4
-	.loc 1 79 0
 	strh	r4, [r3, #2]	@ movhi
-	.loc 1 80 0
 	strh	r4, [r3, #4]	@ movhi
-	.loc 1 81 0
 	strh	r4, [r3, #6]	@ movhi
-	.loc 1 82 0
 	strh	r0, [r3], #8	@ movhi
-	.loc 1 83 0
 	mov	r0, r3
-.LVL825:
 	bl	ftl_memset
-.LVL826:
-	.loc 1 85 0
 	mov	r0, r4
 	pop	{r4, pc}
-.L823:
+.L843:
 	.align	2
-.L822:
-	.word	.LANCHOR75
-	.cfi_endproc
-.LFE330:
+.L842:
+	.word	.LANCHOR76
 	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
 	.section	.text.ftl_free_no_use_map_blk,"ax",%progbits
 	.align	1
@@ -9472,166 +5883,96 @@ FtlFreeSysBlkQueueInit:
 	.fpu softvfp
 	.type	ftl_free_no_use_map_blk, %function
 ftl_free_no_use_map_blk:
-.LFB346:
-	.loc 1 561 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL827:
+	ldrh	r2, [r0, #10]
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 1 561 0
 	mov	r4, r0
-	.loc 1 570 0
-	ldrh	r2, [r0, #10]
-	movs	r1, #0
-	.loc 1 564 0
 	ldr	r5, [r0, #20]
-	.loc 1 562 0
+	movs	r1, #0
 	ldr	r10, [r0, #12]
-.LVL828:
-	.loc 1 563 0
-	ldr	r6, [r0, #24]
-.LVL829:
-	.loc 1 570 0
 	lsls	r2, r2, #1
+	ldr	r6, [r0, #24]
 	mov	r0, r5
-.LVL830:
 	bl	ftl_memset
-.LVL831:
-	.loc 1 571 0
 	movs	r3, #0
-.LVL832:
-.L825:
-	.loc 1 571 0 is_stmt 0 discriminator 1
+.L845:
 	ldrh	r1, [r4, #6]
 	uxth	r2, r3
 	cmp	r1, r2
-	bhi	.L829
-	.loc 1 579 0 is_stmt 1
+	bhi	.L849
 	ldrh	r3, [r5]
-.LVL833:
-	.loc 1 582 0
 	movs	r6, #0
-.LVL834:
-	.loc 1 583 0
-	ldr	r2, .L838
-.LVL835:
-	.loc 1 580 0
+	ldr	r2, .L858
 	mov	fp, r6
-.LVL836:
-.L830:
-	.loc 1 582 0 discriminator 1
+.L850:
 	ldrh	r0, [r4, #10]
 	uxth	r1, r6
-.LVL837:
 	cmp	r0, r1
-	bhi	.L834
-	.loc 1 598 0
+	bhi	.L854
 	mov	r0, fp
 	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL838:
-.L829:
-	.cfi_restore_state
-	.loc 1 572 0
+.L849:
 	uxth	r2, r3
 	ldr	r1, [r6, r2, lsl #2]
-	.loc 1 573 0
 	movs	r2, #0
-	.loc 1 572 0
 	ubfx	r1, r1, #10, #16
-.LVL839:
-.L826:
-	.loc 1 573 0 discriminator 1
+.L846:
 	ldrh	r7, [r4, #10]
 	uxth	r0, r2
 	cmp	r7, r0
-	bhi	.L828
-.LVL840:
+	bhi	.L848
 	adds	r3, r3, #1
-.LVL841:
-	b	.L825
-.LVL842:
-.L828:
-	.loc 1 574 0
+	b	.L845
+.L848:
 	uxth	r0, r2
 	adds	r2, r2, #1
-.LVL843:
 	ldrh	r7, [r10, r0, lsl #1]
 	cmp	r7, r1
-	.loc 1 575 0
 	ittt	eq
 	ldrheq	r7, [r5, r0, lsl #1]
 	addeq	r7, r7, #1
 	strheq	r7, [r5, r0, lsl #1]	@ movhi
-.LVL844:
-	b	.L826
-.LVL845:
-.L834:
-	.loc 1 583 0
+	b	.L846
+.L854:
 	ldrh	r0, [r4]
 	uxth	r7, r6
 	cmp	r0, r1
-	bne	.L831
-	.loc 1 583 0 is_stmt 0 discriminator 1
+	bne	.L851
 	ldrh	r0, [r2]
 	ldrh	ip, [r4, #2]
 	cmp	ip, r0
-	.loc 1 584 0 is_stmt 1 discriminator 1
 	it	cc
 	strhcc	r0, [r5, r7, lsl #1]	@ movhi
-.L831:
-	.loc 1 585 0
+.L851:
 	ldrh	r8, [r5, r7, lsl #1]
 	cmp	r3, r8
 	itt	hi
 	movhi	fp, r1
 	movhi	r3, r8
-.LVL846:
-	.loc 1 589 0
 	cmp	r8, #0
-	bne	.L833
-	.loc 1 589 0 is_stmt 0 discriminator 1
+	bne	.L853
 	ldrh	r0, [r10, r7, lsl #1]
-	cbz	r0, .L833
-	.loc 1 591 0 is_stmt 1
+	cbz	r0, .L853
 	movs	r1, #1
-.LVL847:
 	str	r2, [sp, #4]
 	str	r3, [sp]
 	bl	FtlFreeSysBlkQueueIn
-.LVL848:
-	.loc 1 592 0
 	strh	r8, [r10, r7, lsl #1]	@ movhi
-	.loc 1 593 0
 	ldr	r2, [sp, #4]
 	ldrh	r1, [r4, #8]
 	ldr	r3, [sp]
 	subs	r1, r1, #1
 	strh	r1, [r4, #8]	@ movhi
-.LVL849:
-.L833:
+.L853:
 	adds	r6, r6, #1
-.LVL850:
-	b	.L830
-.L839:
+	b	.L850
+.L859:
 	.align	2
-.L838:
-	.word	.LANCHOR53
-	.cfi_endproc
-.LFE346:
+.L858:
+	.word	.LANCHOR54
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.section	.text.FtlL2PDataInit,"ax",%progbits
 	.align	1
@@ -9642,152 +5983,90 @@ ftl_free_no_use_map_blk:
 	.fpu softvfp
 	.type	FtlL2PDataInit, %function
 FtlL2PDataInit:
-.LFB368:
-	.loc 1 1796 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 8
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 1 1798 0
+	push	{r4, r5, r6, r7, r8, lr}
 	movs	r1, #0
-	ldr	r8, .L843+40
-	.loc 1 1802 0
-	mov	r10, #12
-	.loc 1 1798 0
-	ldr	r7, .L843
-	ldr	r2, [r8]
-	.loc 1 1799 0
-	ldr	r5, .L843+4
-	ldr	r4, .L843+8
-	.loc 1 1798 0
-	ldr	r0, [r7]
+	ldr	r5, .L863
+	ldr	r4, .L863+4
+	ldr	r2, [r5]
+	ldr	r7, .L863+8
+	ldr	r6, .L863+12
+	ldr	r0, [r4]
 	lsls	r2, r2, #1
-	.loc 1 1799 0
-	ldr	r6, .L843+12
-	.loc 1 1798 0
+	ldr	r8, .L863+44
 	bl	ftl_memset
-.LVL851:
-	.loc 1 1799 0
-	ldrh	r3, [r5]
+	ldrh	r3, [r7]
 	movs	r1, #255
-	ldrh	r2, [r4]
-	ldr	r0, [r6]
+	ldrh	r2, [r6]
+	ldr	r0, [r8]
 	muls	r2, r3, r2
 	bl	ftl_memset
-.LVL852:
-	.loc 1 1802 0
-	ldr	ip, .L843+44
-	.loc 1 1800 0
+	ldr	r3, .L863+16
+	movw	r0, #65535
+	ldrh	r1, [r6]
+	ldr	ip, [r8]
+	ldr	r2, [r3]
+	movs	r3, #12
+	ldrh	r7, [r7]
+	mla	r3, r1, r3, r3
+	adds	r1, r2, r3
 	movs	r3, #0
-	movw	r1, #65535
-	str	r7, [sp, #4]
-.LVL853:
-.L841:
-	.loc 1 1800 0 is_stmt 0 discriminator 1
-	ldrh	r7, [r4]
-	uxth	r2, r3
-	add	lr, r3, #1
-	cmp	r7, r2
-	bhi	.L842
-	.loc 1 1806 0 is_stmt 1
-	ldr	r3, .L843+16
-.LVL854:
-	.loc 1 1808 0
-	ldr	r2, [r8]
-.LVL855:
-	.loc 1 1806 0
-	strh	r1, [r3, #2]	@ movhi
-	.loc 1 1808 0
+	mov	lr, r3
+.L861:
+	adds	r2, r2, #12
+	adds	r6, r3, r7
+	cmp	r2, r1
+	bne	.L862
+	ldr	r3, .L863+20
+	ldr	r2, [r5]
+	strh	r0, [r3, #2]	@ movhi
 	strh	r2, [r3, #10]	@ movhi
-	.loc 1 1809 0
 	movw	r2, #61634
 	strh	r2, [r3, #4]	@ movhi
-	.loc 1 1810 0
-	ldr	r2, .L843+20
-	.loc 1 1807 0
-	strh	r1, [r3]	@ movhi
-	.loc 1 1816 0
-	strh	r1, [r3, #40]	@ movhi
-	.loc 1 1810 0
+	ldr	r2, .L863+24
+	strh	r0, [r3]	@ movhi
+	strh	r0, [r3, #40]	@ movhi
 	ldrh	r2, [r2]
 	strh	r2, [r3, #8]	@ movhi
-	.loc 1 1811 0
-	ldr	r2, .L843+24
+	ldr	r2, .L863+28
 	ldrh	r2, [r2]
 	strh	r2, [r3, #6]	@ movhi
-	.loc 1 1812 0
-	ldr	r2, .L843+28
+	ldr	r2, .L863+32
 	ldr	r2, [r2]
 	str	r2, [r3, #12]
-	.loc 1 1813 0
-	ldr	r2, .L843+32
+	ldr	r2, .L863+36
 	ldr	r2, [r2]
 	str	r2, [r3, #16]
-	.loc 1 1814 0
-	ldr	r2, [sp, #4]
-	ldr	r2, [r2]
+	ldr	r2, [r4]
 	str	r2, [r3, #20]
-	.loc 1 1815 0
-	ldr	r2, .L843+36
+	ldr	r2, .L863+40
 	ldr	r2, [r2]
 	str	r2, [r3, #24]
-	.loc 1 1817 0
-	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL856:
-.L842:
-	.cfi_restore_state
-	.loc 1 1802 0 discriminator 3
-	uxth	r3, r3
-	ldr	r7, [ip]
-	movs	r0, #0
-	mul	r2, r10, r3
-	add	fp, r7, r2
-	str	r0, [fp, #4]
-	.loc 1 1803 0 discriminator 3
-	strh	r1, [r7, r2]	@ movhi
-	.loc 1 1804 0 discriminator 3
-	ldr	r7, [ip]
-	add	r2, r2, r7
-	ldrh	r7, [r5]
-	muls	r3, r7, r3
-.LVL857:
-	ldr	r7, [r6]
+	pop	{r4, r5, r6, r7, r8, pc}
+.L862:
 	bic	r3, r3, #3
-	add	r3, r3, r7
-	str	r3, [r2, #8]
-.LVL858:
-	mov	r3, lr
-	b	.L841
-.L844:
+	str	lr, [r2, #-8]
+	add	r3, r3, ip
+	strh	r0, [r2, #-12]	@ movhi
+	str	r3, [r2, #-4]
+	mov	r3, r6
+	b	.L861
+.L864:
 	.align	2
-.L843:
-	.word	.LANCHOR122
-	.word	.LANCHOR57
-	.word	.LANCHOR67
-	.word	.LANCHOR123
-	.word	.LANCHOR124
+.L863:
+	.word	.LANCHOR65
 	.word	.LANCHOR125
-	.word	.LANCHOR66
-	.word	.LANCHOR126
+	.word	.LANCHOR58
+	.word	.LANCHOR68
+	.word	.LANCHOR97
 	.word	.LANCHOR127
 	.word	.LANCHOR128
-	.word	.LANCHOR64
-	.word	.LANCHOR96
-	.cfi_endproc
-.LFE368:
+	.word	.LANCHOR67
+	.word	.LANCHOR129
+	.word	.LANCHOR130
+	.word	.LANCHOR131
+	.word	.LANCHOR126
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
 	.section	.text.FtlVariablesInit,"ax",%progbits
 	.align	1
@@ -9798,112 +6077,75 @@ FtlL2PDataInit:
 	.fpu softvfp
 	.type	FtlVariablesInit, %function
 FtlVariablesInit:
-.LFB298:
-	.loc 4 614 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 4 617 0
 	movs	r4, #0
-	ldr	r3, .L846
-	.loc 4 618 0
+	ldr	r3, .L866
 	movw	r2, #65535
-	.loc 4 628 0
 	mov	r1, r4
-	.loc 4 629 0
-	ldr	r5, .L846+4
-	.loc 4 617 0
+	ldr	r5, .L866+4
 	str	r4, [r3]
-	.loc 4 618 0
-	ldr	r3, .L846+8
+	ldr	r3, .L866+8
 	strh	r2, [r3]	@ movhi
-	.loc 4 621 0
 	mov	r2, #-1
-	.loc 4 619 0
-	ldr	r3, .L846+12
+	ldr	r3, .L866+12
 	str	r4, [r3]
-	.loc 4 620 0
-	ldr	r3, .L846+16
+	ldr	r3, .L866+16
 	str	r4, [r3]
-	.loc 4 621 0
-	ldr	r3, .L846+20
+	ldr	r3, .L866+20
 	str	r2, [r3]
-	.loc 4 625 0
-	ldr	r3, .L846+24
+	ldr	r3, .L866+24
 	str	r4, [r3]
-	.loc 4 627 0
-	ldr	r3, .L846+28
+	ldr	r3, .L866+28
 	strh	r4, [r3]	@ movhi
-	.loc 4 628 0
-	ldr	r3, .L846+32
+	ldr	r3, .L866+32
 	ldrh	r2, [r3]
-	ldr	r3, .L846+36
+	ldr	r3, .L866+36
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL859:
-	.loc 4 629 0
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L846+40
+	ldr	r3, .L866+40
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL860:
-	.loc 4 630 0
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L846+44
+	ldr	r3, .L866+44
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL861:
-	.loc 4 631 0
 	mov	r1, r4
 	movs	r2, #48
-	ldr	r0, .L846+48
+	ldr	r0, .L866+48
 	bl	ftl_memset
-.LVL862:
-	.loc 4 632 0
 	mov	r2, #512
 	mov	r1, r4
-	ldr	r0, .L846+52
+	ldr	r0, .L866+52
 	bl	ftl_memset
-.LVL863:
-	.loc 4 633 0
 	bl	FtlGcBufInit
-.LVL864:
-	.loc 4 634 0
 	bl	FtlL2PDataInit
-.LVL865:
-	.loc 4 636 0
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L847:
+.L867:
 	.align	2
-.L846:
-	.word	.LANCHOR129
-	.word	.LANCHOR40
-	.word	.LANCHOR130
-	.word	.LANCHOR131
+.L866:
 	.word	.LANCHOR132
+	.word	.LANCHOR41
 	.word	.LANCHOR133
-	.word	.LANCHOR28
-	.word	.LANCHOR70
-	.word	.LANCHOR61
-	.word	.LANCHOR71
-	.word	.LANCHOR78
 	.word	.LANCHOR134
-	.word	.LANCHOR80
 	.word	.LANCHOR135
-	.cfi_endproc
-.LFE298:
+	.word	.LANCHOR136
+	.word	.LANCHOR28
+	.word	.LANCHOR71
+	.word	.LANCHOR62
+	.word	.LANCHOR72
+	.word	.LANCHOR79
+	.word	.LANCHOR137
+	.word	.LANCHOR81
+	.word	.LANCHOR138
 	.size	FtlVariablesInit, .-FtlVariablesInit
 	.section	.text.SupperBlkListInit,"ax",%progbits
 	.align	1
@@ -9914,258 +6156,161 @@ FtlVariablesInit:
 	.fpu softvfp
 	.type	SupperBlkListInit, %function
 SupperBlkListInit:
-.LFB376:
-	.loc 1 2360 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	.loc 1 2364 0
-	ldr	r3, .L859
+	ldr	r3, .L879
 	movs	r2, #6
-	.loc 1 2360 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 1 2364 0
 	movs	r1, #0
-	ldr	r6, .L859+4
-	.loc 1 2360 0
+	ldr	r6, .L879+4
 	sub	sp, sp, #24
-	.cfi_def_cfa_offset 56
-	.loc 1 2365 0
 	movs	r4, #0
-	.loc 1 2364 0
 	ldrh	r3, [r3]
-	.loc 1 2371 0
 	mov	r8, r4
-	.loc 1 2364 0
 	ldr	r0, [r6]
-	.loc 1 2371 0
 	mov	r5, r4
 	mov	r10, r6
-	.loc 1 2364 0
 	muls	r2, r3, r2
 	bl	ftl_memset
-.LVL866:
-	.loc 1 2365 0
-	ldr	r3, .L859+8
-	.loc 1 2368 0
-	ldr	r2, .L859+12
-	.loc 1 2370 0
-	ldr	r1, .L859+16
-	.loc 1 2365 0
+	ldr	r3, .L879+8
+	ldr	r2, .L879+12
+	ldr	r1, .L879+16
 	str	r4, [r3]
-	.loc 1 2366 0
-	ldr	r3, .L859+20
-	.loc 1 2368 0
+	ldr	r3, .L879+20
 	strh	r4, [r2]	@ movhi
-	.loc 1 2370 0
 	strh	r4, [r1]	@ movhi
-.LVL867:
-	.loc 1 2366 0
 	str	r4, [r3]
-	.loc 1 2367 0
-	ldr	r3, .L859+24
+	ldr	r3, .L879+24
 	str	r2, [sp, #8]
 	str	r4, [r3]
-	.loc 1 2369 0
-	ldr	r3, .L859+28
+	ldr	r3, .L879+28
 	mov	fp, r3
 	strh	r4, [r3]	@ movhi
-.LVL868:
-.L849:
-	.loc 1 2373 0 discriminator 1
-	ldr	r3, .L859+32
+.L869:
+	ldr	r3, .L879+32
 	sxth	r7, r4
-.LVL869:
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	bge	.L856
-	.loc 1 2375 0
-	ldr	r3, .L859+36
-	.loc 1 2376 0
+	bge	.L876
+	ldr	r3, .L879+36
 	uxth	r1, r4
 	str	r1, [sp, #12]
-	.loc 1 2375 0
 	ldrh	r2, [r3]
-	.loc 1 2378 0
-	ldr	r3, .L859+40
+	ldr	r3, .L879+40
 	ldrh	r3, [r3]
 	str	r3, [sp, #4]
 	movs	r3, #0
 	mov	r6, r3
-	b	.L857
-.LVL870:
-.L851:
+	b	.L877
+.L871:
 	str	r3, [sp, #20]
-	.loc 1 2376 0
-	ldr	r3, .L859+44
-.LVL871:
+	ldr	r3, .L879+44
 	ldr	r1, [sp, #12]
 	str	r2, [sp, #16]
 	ldrb	r0, [r3, r0]	@ zero_extendqisi2
-.LVL872:
 	bl	V2P_block
-.LVL873:
-	.loc 1 2377 0
 	bl	FtlBbmIsBadBlock
-.LVL874:
 	ldr	r2, [sp, #16]
 	ldr	r3, [sp, #20]
-	cbnz	r0, .L850
-	.loc 1 2378 0
+	cbnz	r0, .L870
 	ldr	r1, [sp, #4]
 	add	r6, r6, r1
-.LVL875:
 	sxth	r6, r6
-.LVL876:
-.L850:
+.L870:
 	adds	r3, r3, #1
-.LVL877:
-.L857:
-	.loc 1 2375 0 discriminator 1
+.L877:
 	sxth	r0, r3
 	cmp	r0, r2
-	blt	.L851
+	blt	.L871
 	lsls	r3, r7, #1
-.LVL878:
-	.loc 1 2380 0
-	cbz	r6, .L852
-	.loc 1 2381 0
+	cbz	r6, .L872
 	mov	r1, r6
 	str	r3, [sp, #4]
 	mov	r0, #32768
-.LVL879:
 	bl	__aeabi_idiv
-.LVL880:
 	ldr	r3, [sp, #4]
 	sxth	r6, r0
-.LVL881:
-.L853:
-	.loc 1 2385 0
+.L873:
 	ldr	r2, [r10]
 	add	r3, r3, r7
 	add	r2, r2, r3, lsl #1
-	.loc 1 2387 0
-	ldr	r3, .L859+48
-	.loc 1 2385 0
+	ldr	r3, .L879+48
 	strh	r6, [r2, #4]	@ movhi
-	.loc 1 2387 0
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	beq	.L854
-	.loc 1 2388 0 discriminator 1
-	ldr	r3, .L859+52
+	beq	.L874
+	ldr	r3, .L879+52
 	ldrh	r3, [r3]
-	.loc 1 2387 0 discriminator 1
 	cmp	r7, r3
-	beq	.L854
-	.loc 1 2389 0
-	ldr	r3, .L859+56
+	beq	.L874
+	ldr	r3, .L879+56
 	ldrh	r3, [r3]
-	.loc 1 2388 0
 	cmp	r7, r3
-	beq	.L854
-	.loc 1 2391 0
-	ldr	r3, .L859+60
+	beq	.L874
+	ldr	r3, .L879+60
 	uxth	r0, r4
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r7, lsl #1]
-	cbnz	r3, .L855
-	.loc 1 2392 0
+	cbnz	r3, .L875
 	add	r8, r8, #1
-.LVL882:
 	uxth	r8, r8
-.LVL883:
-	.loc 1 2393 0
 	bl	INSERT_FREE_LIST
-.LVL884:
-.L854:
+.L874:
 	adds	r4, r4, #1
-.LVL885:
-	b	.L849
-.LVL886:
-.L852:
-	.loc 1 2383 0
-	ldr	r2, .L859+60
+	b	.L869
+.L872:
+	ldr	r2, .L879+60
 	movw	r1, #65535
 	ldr	r2, [r2]
 	strh	r1, [r2, r7, lsl #1]	@ movhi
-	b	.L853
-.LVL887:
-.L855:
-	.loc 1 2395 0
+	b	.L873
+.L875:
 	adds	r5, r5, #1
-.LVL888:
 	uxth	r5, r5
-.LVL889:
-	.loc 1 2396 0
 	bl	INSERT_DATA_LIST
-.LVL890:
-	b	.L854
-.LVL891:
-.L856:
-	.loc 1 2400 0
+	b	.L874
+.L876:
 	ldr	r2, [sp, #8]
-	.loc 1 2401 0
 	strh	r8, [fp]	@ movhi
-	.loc 1 2400 0
 	strh	r5, [r2]	@ movhi
-	.loc 1 2405 0
 	add	r5, r5, r8
-.LVL892:
 	cmp	r3, r5
-	bge	.L858
-	.loc 1 2405 0 is_stmt 0 discriminator 1
-	ldr	r1, .L859+64
-	movw	r2, #2405
-	ldr	r0, .L859+68
+	bge	.L878
+	ldr	r1, .L879+64
+	movw	r2, #2683
+	ldr	r0, .L879+68
 	bl	printf
-.LVL893:
-	ldr	r1, .L859+72
-	ldr	r0, .L859+76
+	ldr	r1, .L879+72
+	ldr	r0, .L879+76
 	bl	printf
-.LVL894:
-.L858:
-	.loc 1 2407 0 is_stmt 1
+.L878:
 	movs	r0, #0
 	add	sp, sp, #24
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL895:
-.L860:
+.L880:
 	.align	2
-.L859:
-	.word	.LANCHOR40
-	.word	.LANCHOR81
-	.word	.LANCHOR87
-	.word	.LANCHOR85
-	.word	.LANCHOR136
+.L879:
+	.word	.LANCHOR41
 	.word	.LANCHOR82
-	.word	.LANCHOR84
 	.word	.LANCHOR88
-	.word	.LANCHOR39
-	.word	.LANCHOR37
-	.word	.LANCHOR52
-	.word	.LANCHOR46
-	.word	.LANCHOR91
+	.word	.LANCHOR86
+	.word	.LANCHOR139
+	.word	.LANCHOR83
+	.word	.LANCHOR85
+	.word	.LANCHOR89
+	.word	.LANCHOR40
+	.word	.LANCHOR38
+	.word	.LANCHOR53
+	.word	.LANCHOR47
 	.word	.LANCHOR92
 	.word	.LANCHOR93
-	.word	.LANCHOR83
-	.word	.LANCHOR137
+	.word	.LANCHOR94
+	.word	.LANCHOR84
+	.word	.LANCHOR140
+	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC8
-	.cfi_endproc
-.LFE376:
 	.size	SupperBlkListInit, .-SupperBlkListInit
 	.section	.text.FtlGcPageVarInit,"ax",%progbits
 	.align	1
@@ -10176,62 +6321,62 @@ SupperBlkListInit:
 	.fpu softvfp
 	.type	FtlGcPageVarInit, %function
 FtlGcPageVarInit:
-.LFB397:
-	.loc 6 218 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	.loc 6 219 0
-	ldr	r2, .L862
+	ldr	r2, .L882
 	movs	r3, #0
-	.loc 6 218 0
 	push	{r4, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 4, -8
-	.cfi_offset 14, -4
-	.loc 6 221 0
 	movs	r1, #255
-	ldr	r4, .L862+4
-	.loc 6 219 0
+	ldr	r4, .L882+4
 	strh	r3, [r2]	@ movhi
-	.loc 6 220 0
-	ldr	r2, .L862+8
+	ldr	r2, .L882+8
 	strh	r3, [r2]	@ movhi
-	.loc 6 221 0
 	ldrh	r2, [r4]
-	ldr	r3, .L862+12
+	ldr	r3, .L882+12
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL896:
-	.loc 6 222 0
 	ldrh	r3, [r4]
 	movs	r2, #12
 	movs	r1, #255
 	muls	r2, r3, r2
-	ldr	r3, .L862+16
+	ldr	r3, .L882+16
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL897:
-	.loc 6 224 0
 	pop	{r4, lr}
-	.cfi_restore 14
-	.cfi_restore 4
-	.cfi_def_cfa_offset 0
-	.loc 6 223 0
 	b	FtlGcBufInit
-.LVL898:
-.L863:
+.L883:
 	.align	2
-.L862:
-	.word	.LANCHOR109
-	.word	.LANCHOR54
-	.word	.LANCHOR111
-	.word	.LANCHOR108
+.L882:
 	.word	.LANCHOR110
-	.cfi_endproc
-.LFE397:
+	.word	.LANCHOR55
+	.word	.LANCHOR111
+	.word	.LANCHOR109
+	.word	.LANCHOR112
 	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
+	.section	.text.idb_init,"ax",%progbits
+	.align	1
+	.global	idb_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	idb_init, %function
+idb_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	mov	r2, #262144
+	movs	r1, #0
+	ldr	r0, .L885
+	bl	ftl_memset
+	movs	r0, #0
+	pop	{r3, pc}
+.L886:
+	.align	2
+.L885:
+	.word	idb_buf
+	.size	idb_init, .-idb_init
 	.section	.text.ftl_memcpy,"ax",%progbits
 	.align	1
 	.global	ftl_memcpy
@@ -10241,18 +6386,10 @@ FtlGcPageVarInit:
 	.fpu softvfp
 	.type	ftl_memcpy, %function
 ftl_memcpy:
-.LFB481:
-	.loc 7 32 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL899:
-	.loc 7 33 0
 	b	memcpy
-.LVL900:
-	.cfi_endproc
-.LFE481:
 	.size	ftl_memcpy, .-ftl_memcpy
 	.section	.text.FlashReadIdbData,"ax",%progbits
 	.align	1
@@ -10263,30 +6400,18 @@ ftl_memcpy:
 	.fpu softvfp
 	.type	FlashReadIdbData, %function
 FlashReadIdbData:
-.LFB250:
-	.loc 2 2139 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL901:
 	push	{r3, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 3, -8
-	.cfi_offset 14, -4
-	.loc 2 2140 0
 	mov	r2, #2048
-	ldr	r1, .L866
+	ldr	r1, .L889
 	bl	ftl_memcpy
-.LVL902:
-	.loc 2 2142 0
 	movs	r0, #0
 	pop	{r3, pc}
-.L867:
+.L890:
 	.align	2
-.L866:
-	.word	.LANCHOR138
-	.cfi_endproc
-.LFE250:
+.L889:
+	.word	.LANCHOR141
 	.size	FlashReadIdbData, .-FlashReadIdbData
 	.section	.text.FlashLoadPhyInfoInRam,"ax",%progbits
 	.align	1
@@ -10297,98 +6422,62 @@ FlashReadIdbData:
 	.fpu softvfp
 	.type	FlashLoadPhyInfoInRam, %function
 FlashLoadPhyInfoInRam:
-.LFB251:
-	.loc 2 2145 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL903:
 	push	{r4, r5, r6, r7, r8, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 4, -24
-	.cfi_offset 5, -20
-	.cfi_offset 6, -16
-	.cfi_offset 7, -12
-	.cfi_offset 8, -8
-	.cfi_offset 14, -4
-	.loc 2 2149 0
 	movs	r6, #0
-	ldr	r7, .L876
-	.loc 2 2150 0
-	ldr	r5, .L876+4
-.LVL904:
-.L871:
+	ldr	r7, .L899
+	ldr	r5, .L899+4
+.L894:
 	ldrb	r2, [r7, #-1]	@ zero_extendqisi2
 	mov	r1, r5
 	mov	r0, r7
 	lsl	r8, r6, #5
 	bl	FlashMemCmp8
-.LVL905:
 	mov	r4, r0
-	cbnz	r0, .L869
-	.loc 2 2151 0
-	ldr	r5, .L876+8
-	.loc 2 2159 0
+	cbnz	r0, .L892
+	ldr	r5, .L899+8
 	mov	r3, r4
-	ldr	r2, .L876+12
-	.loc 2 2151 0
+	ldr	r2, .L899+12
 	add	r5, r5, r8
-.LVL906:
-	.loc 2 2159 0
 	ldrb	r0, [r5, #22]	@ zero_extendqisi2
 	mov	r1, r2
-.LVL907:
-.L870:
+.L893:
 	lsls	r6, r3, #5
 	ldrb	r6, [r6, r2]	@ zero_extendqisi2
 	cmp	r6, r0
-	beq	.L873
-	.loc 2 2158 0 discriminator 2
+	beq	.L896
 	adds	r3, r3, #1
-.LVL908:
 	cmp	r3, #4
-	bne	.L870
-.L873:
-	.loc 2 2162 0
+	bne	.L893
+.L896:
 	add	r1, r1, r3, lsl #5
 	movs	r2, #32
-	ldr	r0, .L876+16
+	ldr	r0, .L899+16
 	bl	ftl_memcpy
-.LVL909:
-	.loc 2 2163 0
 	movs	r2, #32
 	mov	r1, r5
-	ldr	r0, .L876+20
+	ldr	r0, .L899+20
 	bl	ftl_memcpy
-.LVL910:
-	.loc 2 2164 0
-	b	.L868
-.LVL911:
-.L869:
-	.loc 2 2149 0 discriminator 2
+	b	.L891
+.L892:
 	adds	r6, r6, #1
-.LVL912:
 	adds	r7, r7, #32
-	cmp	r6, #74
-	bne	.L871
-	.loc 2 2157 0
+	cmp	r6, #77
+	bne	.L894
 	mov	r4, #-1
-.LVL913:
-.L868:
-	.loc 2 2165 0
+.L891:
 	mov	r0, r4
 	pop	{r4, r5, r6, r7, r8, pc}
-.L877:
+.L900:
 	.align	2
-.L876:
-	.word	.LANCHOR139+1
+.L899:
+	.word	.LANCHOR142+1
 	.word	.LANCHOR22
-	.word	.LANCHOR139
-	.word	.LANCHOR140
+	.word	.LANCHOR142
+	.word	.LANCHOR143
 	.word	.LANCHOR7
-	.word	.LANCHOR30
-	.cfi_endproc
-.LFE251:
+	.word	.LANCHOR31
 	.size	FlashLoadPhyInfoInRam, .-FlashLoadPhyInfoInRam
 	.section	.text.ftl_memcpy32,"ax",%progbits
 	.align	1
@@ -10399,36 +6488,19 @@ FlashLoadPhyInfoInRam:
 	.fpu softvfp
 	.type	ftl_memcpy32, %function
 ftl_memcpy32:
-.LFB482:
-	.loc 7 37 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL914:
-	.loc 7 40 0
 	movs	r3, #0
-	.loc 7 37 0
 	push	{r4, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 4, -8
-	.cfi_offset 14, -4
-.LVL915:
-.L879:
-	.loc 7 40 0 discriminator 1
+.L902:
 	cmp	r3, r2
-	bne	.L880
-	.loc 7 43 0
+	bne	.L903
 	pop	{r4, pc}
-.L880:
-	.loc 7 41 0 discriminator 3
+.L903:
 	ldr	r4, [r1, r3, lsl #2]
 	str	r4, [r0, r3, lsl #2]
-	.loc 7 40 0 discriminator 3
 	adds	r3, r3, #1
-.LVL916:
-	b	.L879
-	.cfi_endproc
-.LFE482:
+	b	.L902
 	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.NandcCopy1KB,"ax",%progbits
 	.align	1
@@ -10439,134 +6511,70 @@ ftl_memcpy32:
 	.fpu softvfp
 	.type	NandcCopy1KB, %function
 NandcCopy1KB:
-.LFB291:
-	.loc 3 748 0
-	.cfi_startproc
 	@ args = 4, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL917:
-	.loc 3 759 0
 	cmp	r1, #1
-	.loc 3 748 0
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 3 748 0
 	mov	r4, r2
-.LVL918:
-	.loc 3 754 0
 	add	r2, r0, #4096
-.LVL919:
-	.loc 3 755 0
 	add	r6, r0, #512
-.LVL920:
-	.loc 3 757 0
 	add	r0, r2, r4, lsl #9
-.LVL921:
-	.loc 3 748 0
 	ldr	r5, [sp, #16]
-	.loc 3 759 0
-	bne	.L882
-	.loc 3 761 0
-	cbz	r3, .L883
-	.loc 3 762 0
+	bne	.L905
+	cbz	r3, .L906
 	lsls	r1, r3, #30
-.LVL922:
-	bne	.L884
-	.loc 3 763 0
+	bne	.L907
 	mov	r2, #256
 	mov	r1, r3
 	bl	ftl_memcpy32
-.LVL923:
-.L883:
-	.loc 3 767 0
-	cbz	r5, .L881
-	.loc 3 769 0
+.L906:
+	cbz	r5, .L904
 	ldrb	r2, [r5, #1]	@ zero_extendqisi2
-	.loc 3 771 0
 	lsrs	r4, r4, #1
-.LVL924:
-	.loc 3 769 0
 	ldrb	r3, [r5]	@ zero_extendqisi2
-	.loc 3 771 0
 	add	r4, r4, r4, lsl #1
 	lsls	r4, r4, #4
-	.loc 3 769 0
 	orr	r3, r3, r2, lsl #8
 	ldrb	r2, [r5, #2]	@ zero_extendqisi2
 	orr	r3, r3, r2, lsl #16
 	ldrb	r2, [r5, #3]	@ zero_extendqisi2
 	orr	r3, r3, r2, lsl #24
-.LVL925:
-	.loc 3 771 0
 	str	r3, [r6, r4]
-.LVL926:
 	pop	{r4, r5, r6, pc}
-.LVL927:
-.L884:
-	.loc 3 765 0
+.L907:
 	mov	r2, #1024
 	mov	r1, r3
 	bl	ftl_memcpy
-.LVL928:
-	b	.L883
-.LVL929:
-.L882:
-	.loc 3 776 0
-	cbz	r3, .L887
-	.loc 3 777 0
+	b	.L906
+.L905:
+	cbz	r3, .L910
 	lsls	r2, r3, #30
-	bne	.L888
-	.loc 3 778 0
+	bne	.L911
 	mov	r1, r0
-.LVL930:
 	mov	r2, #256
 	mov	r0, r3
-.LVL931:
 	bl	ftl_memcpy32
-.LVL932:
-.L887:
-	.loc 3 782 0
-	cbz	r5, .L881
-	.loc 3 784 0
+.L910:
+	cbz	r5, .L904
 	lsrs	r4, r4, #1
-.LVL933:
 	add	r4, r4, r4, lsl #1
 	lsls	r4, r4, #4
 	ldr	r3, [r6, r4]
-.LVL934:
-	.loc 3 785 0
 	strb	r3, [r5]
-	.loc 3 786 0
 	lsrs	r2, r3, #8
 	strb	r2, [r5, #1]
-	.loc 3 787 0
 	lsrs	r2, r3, #16
-	.loc 3 788 0
 	lsrs	r3, r3, #24
-.LVL935:
-	.loc 3 787 0
 	strb	r2, [r5, #2]
-	.loc 3 788 0
 	strb	r3, [r5, #3]
-.L881:
+.L904:
 	pop	{r4, r5, r6, pc}
-.LVL936:
-.L888:
-	.loc 3 780 0
+.L911:
 	mov	r1, r0
-.LVL937:
 	mov	r2, #1024
 	mov	r0, r3
-.LVL938:
 	bl	ftl_memcpy
-.LVL939:
-	b	.L887
-	.cfi_endproc
-.LFE291:
+	b	.L910
 	.size	NandcCopy1KB, .-NandcCopy1KB
 	.section	.text.NandcXferData,"ax",%progbits
 	.align	1
@@ -10577,60 +6585,26 @@ NandcCopy1KB:
 	.fpu softvfp
 	.type	NandcXferData, %function
 NandcXferData:
-.LFB292:
-	.loc 3 794 0
-	.cfi_startproc
 	@ args = 4, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL940:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
 	mov	r7, r3
-.LVL941:
-	.loc 3 801 0
-	ldr	r3, .L935
-.LVL942:
-	.loc 3 794 0
+	ldr	r3, .L958
 	sub	sp, sp, #96
-	.cfi_def_cfa_offset 128
-	.loc 3 794 0
 	mov	r6, r0
 	mov	r10, r2
 	str	r1, [sp, #12]
-	.loc 3 801 0
 	ldr	r5, [r3, r0, lsl #3]
-.LVL943:
-	.loc 3 804 0
 	lsls	r3, r7, #26
-	.loc 3 794 0
 	ldr	r4, [sp, #128]
-	.loc 3 804 0
-	bne	.L900
-	.loc 3 806 0
-	cbnz	r4, .L901
-.LVL944:
-	.loc 3 808 0
+	bne	.L923
+	cbnz	r4, .L924
 	add	r4, sp, #32
-.LVL945:
-	.loc 3 809 0
 	movs	r2, #64
-.LVL946:
 	movs	r1, #255
-.LVL947:
 	add	r0, sp, #32
-.LVL948:
 	bl	ftl_memset
-.LVL949:
-.L901:
-	.loc 3 811 0
+.L924:
 	movs	r3, #0
 	mov	r2, r10
 	ldr	r1, [sp, #12]
@@ -10638,160 +6612,85 @@ NandcXferData:
 	str	r4, [sp, #4]
 	str	r7, [sp]
 	bl	NandcXferStart
-.LVL950:
-	.loc 3 812 0
 	mov	r0, r6
 	bl	NandcXferComp
-.LVL951:
-	.loc 3 813 0
 	ldr	r3, [sp, #12]
 	cmp	r3, #0
-	bne	.L925
-.LBB299:
-	.loc 3 817 0
-	ldr	r2, .L935+4
-	.loc 3 820 0
+	bne	.L948
+	ldr	r2, .L958+4
 	lsr	r0, r10, #1
-	.loc 3 822 0
-	ldr	ip, .L935+12
-	.loc 3 817 0
+	ldr	ip, .L958+12
 	ldr	r3, [r2]
 	cmp	r3, #25
-	.loc 3 820 0
 	ldr	r3, [sp, #12]
-	.loc 3 817 0
 	ite	cc
 	movcc	r7, #64
-.LVL952:
 	movcs	r7, #128
-.LVL953:
-	.loc 3 820 0
 	mov	r1, r3
-.LVL954:
-.L904:
-	.loc 3 820 0 is_stmt 0 discriminator 1
+.L927:
 	cmp	r1, r0
 	add	r4, r4, #4
-.LVL955:
 	add	r6, r7, r3
-	bcc	.L905
-.LBE299:
-.LBB300:
-	.loc 3 838 0 is_stmt 1
-	ldr	r3, .L935+8
-.LBE300:
-	.loc 3 829 0
+	bcc	.L928
+	ldr	r3, .L958+8
 	lsr	r4, r10, #2
-.LVL956:
 	ldr	r0, [r2]
-.LBB301:
-	.loc 3 838 0
 	movs	r2, #0
 	mov	r8, r2
 	ldr	r1, [r3]
-.LVL957:
-.L906:
-.LBE301:
-	.loc 3 829 0 discriminator 1
+.L929:
 	cmp	r2, r4
-	bcs	.L902
-	.loc 3 829 0 is_stmt 0 discriminator 3
-	cbnz	r0, .L912
-.LVL958:
-.L902:
-	.loc 3 851 0 is_stmt 1
+	bcs	.L925
+	cbnz	r0, .L935
+.L925:
 	movs	r3, #0
 	str	r3, [r5, #16]
-.LVL959:
-.L913:
-	.loc 3 901 0
-	ldr	r3, .L935+8
+.L936:
+	ldr	r3, .L958+8
 	ldr	r3, [r3]
 	cmp	r3, #5
-	bls	.L899
-	.loc 3 901 0 is_stmt 0 discriminator 1
+	bls	.L922
 	ldr	r3, [sp, #12]
-	cbnz	r3, .L899
-.LBB302:
-	.loc 3 904 0 is_stmt 1
+	cbnz	r3, .L922
 	ldr	r3, [r5]
-	.loc 3 905 0
 	and	r2, r3, #139264
 	cmp	r2, #139264
-.LVL960:
-	.loc 3 908 0
 	ittt	eq
 	moveq	r8, #-1
-	.loc 3 909 0
 	orreq	r3, r3, #131072
-.LVL961:
-	.loc 3 910 0
 	streq	r3, [r5]
-.LVL962:
-.L899:
-.LBE302:
-	.loc 3 923 0
+.L922:
 	mov	r0, r8
 	add	sp, sp, #96
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL963:
-.L905:
-	.cfi_restore_state
-.LBB303:
-	.loc 3 822 0 discriminator 3
+.L928:
 	bic	lr, r3, #3
 	ldr	r3, [ip, #4]
-	.loc 3 820 0 discriminator 3
 	adds	r1, r1, #1
-.LVL964:
-	.loc 3 822 0 discriminator 3
 	ldr	r3, [r3, lr]
-.LVL965:
-	.loc 3 823 0 discriminator 3
 	strb	r3, [r4, #-4]
-.LVL966:
-	.loc 3 824 0 discriminator 3
 	lsr	lr, r3, #8
 	strb	lr, [r4, #-3]
-.LVL967:
-	.loc 3 825 0 discriminator 3
 	lsr	lr, r3, #16
-	.loc 3 826 0 discriminator 3
 	lsrs	r3, r3, #24
-.LVL968:
-	.loc 3 825 0 discriminator 3
 	strb	lr, [r4, #-2]
-.LVL969:
-	.loc 3 826 0 discriminator 3
 	strb	r3, [r4, #-1]
-	.loc 3 820 0 discriminator 3
 	mov	r3, r6
-	b	.L904
-.LVL970:
-.L912:
-.LBE303:
-	.loc 3 831 0
+	b	.L927
+.L935:
 	add	r3, r2, #8
 	ldr	r3, [r5, r3, lsl #2]
 	str	r3, [sp, #28]
-	.loc 3 833 0
 	ldr	r3, [sp, #28]
 	lsls	r6, r3, #29
-	bmi	.L928
-	.loc 3 833 0 is_stmt 0 discriminator 1
+	bmi	.L951
 	ldr	r3, [sp, #28]
 	ubfx	r3, r3, #15, #1
 	cmp	r3, #0
-	bne	.L928
-.LVL971:
-.LBB304:
-	.loc 3 838 0 is_stmt 1
+	bne	.L951
 	cmp	r1, #5
-	bls	.L908
-	.loc 3 840 0
+	bls	.L931
 	ldr	r6, [sp, #28]
 	ldr	r3, [sp, #28]
 	ubfx	r6, r6, #3, #5
@@ -10812,29 +6711,18 @@ NandcXferData:
 	ite	hi
 	ubfxhi	r6, r6, #27, #1
 	ubfxls	r6, r6, #29, #1
-.L934:
-	.loc 3 844 0 discriminator 2
+.L957:
 	orr	r3, r3, r6, lsl #5
-.L910:
-.LVL972:
-	.loc 3 846 0
+.L933:
 	cmp	r8, r3
 	it	cc
 	movcc	r8, r3
-.LVL973:
-.L907:
-.LBE304:
-	.loc 3 829 0 discriminator 2
+.L930:
 	adds	r2, r2, #1
-.LVL974:
-	b	.L906
-.LVL975:
-.L908:
-.LBB305:
-	.loc 3 842 0
+	b	.L929
+.L931:
 	cmp	r1, #3
-	bls	.L910
-	.loc 3 844 0
+	bls	.L933
 	ldr	r6, [sp, #28]
 	ldr	r3, [sp, #28]
 	ubfx	r6, r6, #3, #5
@@ -10855,55 +6743,38 @@ NandcXferData:
 	ite	hi
 	ubfxhi	r6, r6, #28, #1
 	ubfxls	r6, r6, #30, #1
-	b	.L934
-.LVL976:
-.L928:
-.LBE305:
-	.loc 3 834 0
+	b	.L957
+.L951:
 	mov	r8, #-1
-.LVL977:
-	b	.L907
-.LVL978:
-.L925:
-	.loc 3 795 0
+	b	.L930
+.L948:
 	mov	r8, #0
-	b	.L902
-.LVL979:
-.L900:
-	.loc 3 856 0
+	b	.L925
+.L923:
 	ldr	r3, [sp, #12]
 	cmp	r3, #1
-	bne	.L914
+	bne	.L937
 	cmp	r4, #0
 	mov	r8, #0
 	ite	ne
 	movne	r3, #4
 	moveq	r3, #0
 	str	r3, [sp, #16]
-.LVL980:
-.L915:
-	.loc 3 858 0 discriminator 2
+.L938:
 	cmp	r8, r10
-	bcc	.L917
-	.loc 3 795 0
+	bcc	.L940
 	mov	r8, #0
-.LVL981:
-	b	.L913
-.LVL982:
-.L917:
-	.loc 3 860 0
+	b	.L936
+.L940:
 	and	fp, r8, #3
-	cbz	r7, .L930
+	cbz	r7, .L953
 	add	r3, r7, r8, lsl #9
-.L916:
-	.loc 3 860 0 is_stmt 0 discriminator 4
+.L939:
 	str	r4, [sp]
 	mov	r2, fp
 	movs	r1, #1
 	mov	r0, r5
 	bl	NandcCopy1KB
-.LVL983:
-	.loc 3 861 0 is_stmt 1 discriminator 4
 	movs	r3, #0
 	movs	r2, #2
 	str	r3, [sp, #4]
@@ -10911,36 +6782,24 @@ NandcXferData:
 	str	r3, [sp]
 	mov	r0, r6
 	mov	r3, fp
-	.loc 3 858 0 discriminator 4
 	add	r8, r8, #2
-.LVL984:
-	.loc 3 861 0 discriminator 4
 	bl	NandcXferStart
-.LVL985:
-	.loc 3 862 0 discriminator 4
 	mov	r0, r6
 	bl	NandcXferComp
-.LVL986:
 	ldr	r3, [sp, #16]
 	add	r4, r4, r3
-	b	.L915
-.L930:
+	b	.L938
+.L953:
 	mov	r3, r7
-	b	.L916
-.LVL987:
-.L914:
-	.loc 3 867 0
+	b	.L939
+.L937:
 	mov	r8, #0
 	movs	r2, #2
-.LVL988:
 	mov	r3, r8
 	str	r8, [sp, #4]
 	str	r8, [sp]
 	mov	r1, r8
-.LVL989:
 	bl	NandcXferStart
-.LVL990:
-	.loc 3 868 0
 	mov	fp, r7
 	cmp	r4, r8
 	str	r4, [sp, #16]
@@ -10949,28 +6808,16 @@ NandcXferData:
 	movne	r3, #4
 	moveq	r3, r8
 	str	r3, [sp, #20]
-.LVL991:
-.L918:
-	.loc 3 868 0 is_stmt 0 discriminator 2
+.L941:
 	cmp	r4, r10
-	bcs	.L913
-	.loc 3 871 0 is_stmt 1
+	bcs	.L936
 	mov	r0, r6
-	.loc 3 873 0
 	adds	r4, r4, #2
-.LVL992:
-	.loc 3 871 0
 	bl	NandcXferComp
-.LVL993:
-	.loc 3 872 0
 	ldr	r3, [r5, #32]
-	.loc 3 873 0
 	cmp	r10, r4
-	.loc 3 872 0
 	str	r3, [sp, #28]
-	.loc 3 873 0
-	bls	.L919
-	.loc 3 874 0
+	bls	.L942
 	movs	r3, #0
 	movs	r2, #2
 	str	r3, [sp, #4]
@@ -10979,28 +6826,19 @@ NandcXferData:
 	mov	r0, r6
 	and	r3, r4, #3
 	bl	NandcXferStart
-.LVL994:
-.L919:
-	.loc 3 876 0
+.L942:
 	ldr	r3, [sp, #28]
 	lsls	r3, r3, #29
-	bmi	.L931
-.LBB306:
-	.loc 3 885 0
+	bmi	.L954
 	ldr	r3, [sp, #28]
 	ldr	r2, [sp, #28]
 	ubfx	r3, r3, #3, #5
 	ubfx	r2, r2, #27, #1
-.LVL995:
 	orr	r3, r3, r2, lsl #5
-	.loc 3 887 0
 	cmp	r8, r3
 	it	cc
 	movcc	r8, r3
-.LVL996:
-.L920:
-.LBE306:
-	.loc 3 896 0
+.L943:
 	ldr	r3, [sp, #16]
 	cmp	r7, #0
 	sub	r2, r4, #2
@@ -11013,27 +6851,21 @@ NandcXferData:
 	moveq	r3, #0
 	add	fp, fp, #1024
 	bl	NandcCopy1KB
-.LVL997:
 	ldr	r3, [sp, #16]
 	ldr	r2, [sp, #20]
 	add	r3, r3, r2
 	str	r3, [sp, #16]
-	b	.L918
-.LVL998:
-.L931:
-	.loc 3 878 0
+	b	.L941
+.L954:
 	mov	r8, #-1
-.LVL999:
-	b	.L920
-.L936:
+	b	.L943
+.L959:
 	.align	2
-.L935:
+.L958:
 	.word	.LANCHOR6
-	.word	.LANCHOR31
-	.word	.LANCHOR33
+	.word	.LANCHOR32
 	.word	.LANCHOR34
-	.cfi_endproc
-.LFE292:
+	.word	.LANCHOR35
 	.size	NandcXferData, .-NandcXferData
 	.section	.text.FlashReadRawPage,"ax",%progbits
 	.align	1
@@ -11044,96 +6876,53 @@ NandcXferData:
 	.fpu softvfp
 	.type	FlashReadRawPage, %function
 FlashReadRawPage:
-.LFB222:
-	.loc 2 491 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1000:
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -24
-	.cfi_offset 5, -20
-	.cfi_offset 6, -16
-	.cfi_offset 7, -12
-	.cfi_offset 8, -8
-	.cfi_offset 14, -4
-	.loc 2 491 0
 	mov	r8, r3
-	.loc 2 494 0
-	ldr	r3, .L939
-.LVL1001:
-	.loc 2 491 0
+	ldr	r3, .L962
 	mov	r6, r1
 	mov	r7, r2
-	.loc 2 497 0
 	mov	r4, r0
-	.loc 2 494 0
 	ldrb	r5, [r3, #9]	@ zero_extendqisi2
-.LVL1002:
-	.loc 2 497 0
-	cbnz	r0, .L938
-	.loc 2 497 0 is_stmt 0 discriminator 1
-	ldr	r3, .L939+4
-	ldr	r2, .L939+8
-.LVL1003:
+	cbnz	r0, .L961
+	ldr	r3, .L962+4
+	ldr	r2, .L962+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	ldr	r0, [r2]
-.LVL1004:
 	muls	r0, r3, r0
-	.loc 2 498 0 is_stmt 1 discriminator 1
 	cmp	r0, r1
 	it	hi
 	movhi	r5, #4
-.LVL1005:
-.L938:
-	.loc 2 499 0
+.L961:
 	mov	r0, r4
 	bl	NandcWaitFlashReady
-.LVL1006:
-	.loc 2 500 0
 	mov	r0, r4
 	bl	NandcFlashCs
-.LVL1007:
-	.loc 2 501 0
 	mov	r1, r6
 	mov	r0, r4
 	bl	FlashReadCmd
-.LVL1008:
-	.loc 2 502 0
 	mov	r0, r4
 	bl	NandcWaitFlashReady
-.LVL1009:
-	.loc 2 503 0
 	mov	r3, r7
 	mov	r2, r5
 	str	r8, [sp]
 	movs	r1, #0
 	mov	r0, r4
 	bl	NandcXferData
-.LVL1010:
 	mov	r1, r0
-.LVL1011:
-	.loc 2 513 0
 	mov	r0, r4
-.LVL1012:
 	bl	NandcFlashDeCs
-.LVL1013:
-	.loc 2 515 0
 	mov	r0, r1
 	add	sp, sp, #8
-	.cfi_def_cfa_offset 24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL1014:
-.L940:
+.L963:
 	.align	2
-.L939:
-	.word	.LANCHOR30
+.L962:
+	.word	.LANCHOR31
 	.word	.LANCHOR2
 	.word	.LANCHOR3
-	.cfi_endproc
-.LFE222:
 	.size	FlashReadRawPage, .-FlashReadRawPage
 	.section	.text.FlashDdrTunningRead,"ax",%progbits
 	.align	1
@@ -11144,274 +6933,158 @@ FlashReadRawPage:
 	.fpu softvfp
 	.type	FlashDdrTunningRead, %function
 FlashDdrTunningRead:
-.LFB227:
-	.loc 2 685 0
-	.cfi_startproc
 	@ args = 4, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1015:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
 	mov	r7, r3
-	.loc 2 695 0
-	ldr	r3, .L966
-.LVL1016:
-	.loc 2 685 0
+	ldr	r3, .L989
 	sub	sp, sp, #24
-	.cfi_def_cfa_offset 56
-	.loc 2 685 0
 	str	r0, [sp, #8]
-	.loc 2 695 0
 	ldr	r3, [r3]
-	.loc 2 685 0
 	str	r1, [sp, #12]
 	str	r2, [sp, #4]
-	.loc 2 695 0
 	ldr	r3, [r3, #304]
 	str	r3, [sp, #20]
-.LVL1017:
-	.loc 2 696 0
-	ldr	r3, .L966+4
-.LVL1018:
+	ldr	r3, .L989+4
 	ldr	r3, [r3]
-	.loc 2 697 0
 	cmp	r3, #8
-	.loc 2 698 0
 	ldr	r3, [sp, #56]
-	.loc 2 697 0
 	ite	cc
 	movcc	fp, #6
 	movcs	fp, #12
-.LVL1019:
-	.loc 2 698 0
 	cmp	r3, #0
-	beq	.L955
-	.loc 2 699 0
+	beq	.L978
 	movs	r0, #1
-.LVL1020:
-	.loc 2 703 0
-	ldr	r4, .L966+8
-	.loc 2 699 0
+	ldr	r4, .L989+8
 	bl	FlashSetInterfaceMode
-.LVL1021:
-	.loc 2 700 0
 	movs	r0, #1
 	bl	NandcSetMode
-.LVL1022:
-	.loc 2 701 0
 	ldr	r0, [sp, #8]
 	bl	FlashReset
-.LVL1023:
-	.loc 2 702 0
 	mov	r3, r7
 	ldr	r2, [sp, #4]
 	ldr	r1, [sp, #12]
 	ldr	r0, [sp, #8]
 	bl	FlashReadRawPage
-.LVL1024:
 	mov	r6, r0
-.LVL1025:
-	.loc 2 703 0
 	ldrb	r0, [r4]	@ zero_extendqisi2
-.LVL1026:
 	bl	FlashSetInterfaceMode
-.LVL1027:
-	.loc 2 704 0
 	ldrb	r0, [r4]	@ zero_extendqisi2
 	bl	NandcSetMode
-.LVL1028:
-	.loc 2 705 0
 	adds	r3, r6, #1
-	bne	.L944
-.LVL1029:
-.L953:
-	.loc 2 759 0
+	bne	.L967
+.L976:
 	mov	r6, #-1
-.L941:
-	.loc 2 778 0
+.L964:
 	mov	r0, r6
 	add	sp, sp, #24
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1030:
-.L944:
-	.cfi_restore_state
-	.loc 2 708 0
+.L967:
 	mov	r2, r6
 	ldr	r1, [sp, #12]
-	ldr	r0, .L966+12
+	ldr	r0, .L989+12
 	bl	printf
-.LVL1031:
-	.loc 2 722 0
-	ldr	r2, .L966+16
+	ldr	r2, .L989+16
 	ldr	r3, [r2]
 	adds	r3, r3, #1
-	.loc 2 723 0
 	cmp	r3, #2048
-	bcs	.L946
-	.loc 2 722 0
+	bcs	.L969
 	str	r3, [r2]
-	b	.L941
-.L946:
-	.loc 2 726 0
+	b	.L964
+.L969:
 	movs	r7, #0
 	str	r7, [r2]
-.LVL1032:
-	.loc 2 709 0
 	str	r7, [sp, #4]
-.LVL1033:
-.L943:
+.L966:
 	mov	r10, #0
 	mov	r8, #-1
 	mov	r5, r10
 	mov	r4, r10
 	str	r10, [sp, #16]
-.LVL1034:
-.L951:
-	.loc 2 731 0
+.L974:
 	uxtb	r0, fp
 	bl	NandcSetDdrPara
-.LVL1035:
-	.loc 2 732 0
 	mov	r3, r7
 	ldr	r2, [sp, #4]
 	ldr	r1, [sp, #12]
 	ldr	r0, [sp, #8]
 	bl	FlashReadRawPage
-.LVL1036:
-	.loc 2 734 0
 	adds	r3, r6, #1
 	cmp	r0, r3
-	bhi	.L947
-.LVL1037:
-	.loc 2 740 0
+	bhi	.L970
 	cmp	r0, #2
-	bhi	.L957
-	.loc 2 741 0
+	bhi	.L980
 	adds	r4, r4, #1
-.LVL1038:
-	.loc 2 742 0
 	cmp	r4, #9
-	bls	.L957
-.LVL1039:
-	.loc 2 744 0
+	bls	.L980
 	mov	r3, r5
-	.loc 2 732 0
 	mov	r6, r0
-	.loc 2 743 0
 	sub	r5, fp, r4
-.LVL1040:
-	.loc 2 737 0
 	mov	r8, #0
-.LVL1041:
-.L949:
-	.loc 2 759 0
+.L972:
 	ldr	r2, [sp, #16]
 	cmp	r4, r2
 	it	ls
 	movls	r5, r3
-.LVL1042:
-.L950:
-	.loc 2 762 0
-	cbz	r5, .L952
-	.loc 2 763 0
+.L973:
+	cbz	r5, .L975
 	mov	r1, r5
-	ldr	r0, .L966+20
-.LVL1043:
+	ldr	r0, .L989+20
 	bl	printf
-.LVL1044:
-	.loc 2 764 0
 	uxtb	r0, r5
 	bl	NandcSetDdrPara
-.LVL1045:
-.L952:
-	.loc 2 767 0
+.L975:
 	cmp	r8, #0
-	beq	.L941
-	.loc 2 768 0
+	beq	.L964
 	ldr	r2, [sp, #12]
 	ldr	r1, [sp, #8]
-	ldr	r0, .L966+24
+	ldr	r0, .L989+24
 	bl	printf
-.LVL1046:
-	.loc 2 769 0
 	ldr	r3, [sp, #56]
 	cmp	r3, #0
-	beq	.L953
-	.loc 2 771 0
+	beq	.L976
 	ldr	r3, [sp, #20]
 	ubfx	r0, r3, #8, #8
 	bl	NandcSetDdrPara
-.LVL1047:
-	b	.L941
-.LVL1048:
-.L955:
-	.loc 2 688 0
+	b	.L964
+.L978:
 	mov	r6, #1024
-	b	.L943
-.LVL1049:
-.L947:
-	.loc 2 748 0
+	b	.L966
+.L970:
 	ldr	r3, [sp, #16]
 	cmp	r4, r3
-	bls	.L958
-.LVL1050:
-	.loc 2 751 0
+	bls	.L981
 	cmp	r4, #7
-	.loc 2 750 0
 	sub	r5, r10, r4
-.LVL1051:
-	.loc 2 751 0
-	bhi	.L950
+	bhi	.L973
 	str	r4, [sp, #16]
-.LVL1052:
-.L958:
-	.loc 2 754 0
+.L981:
 	movs	r4, #0
-.LVL1053:
-	b	.L948
-.LVL1054:
-.L957:
-	.loc 2 737 0
+	b	.L971
+.L980:
 	mov	r8, #0
 	mov	r10, fp
 	mov	r6, r0
-	.loc 2 736 0
 	mov	r7, r8
-	.loc 2 735 0
 	str	r8, [sp, #4]
-.LVL1055:
-.L948:
-	.loc 2 730 0 discriminator 2
+.L971:
 	add	fp, fp, #2
-.LVL1056:
 	cmp	fp, #69
-	bls	.L951
+	bls	.L974
 	mov	r3, r5
 	mov	r5, r10
-	b	.L949
-.L967:
+	b	.L972
+.L990:
 	.align	2
-.L966:
+.L989:
 	.word	.LANCHOR19
-	.word	.LANCHOR33
+	.word	.LANCHOR34
 	.word	.LANCHOR24
+	.word	.LC9
+	.word	.LANCHOR144
 	.word	.LC10
-	.word	.LANCHOR141
 	.word	.LC11
-	.word	.LC12
-	.cfi_endproc
-.LFE227:
 	.size	FlashDdrTunningRead, .-FlashDdrTunningRead
 	.section	.text.FlashReadPage,"ax",%progbits
 	.align	1
@@ -11422,189 +7095,107 @@ FlashDdrTunningRead:
 	.fpu softvfp
 	.type	FlashReadPage, %function
 FlashReadPage:
-.LFB223:
-	.loc 2 518 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1057:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 518 0
 	mov	r7, r2
 	mov	r5, r0
 	mov	r6, r1
 	mov	r8, r3
-	.loc 2 519 0
 	bl	FlashReadRawPage
-.LVL1058:
-	.loc 2 522 0
 	adds	r2, r0, #1
-	.loc 2 519 0
 	mov	r4, r0
-.LVL1059:
-	.loc 2 522 0
-	bne	.L969
-	.loc 2 522 0 is_stmt 0 discriminator 1
-	ldr	r10, .L987+20
+	bne	.L992
+	ldr	r10, .L1010+20
 	ldrb	fp, [r10]	@ zero_extendqisi2
 	cmp	fp, #0
-	bne	.L970
-.L972:
-.LVL1060:
-	.loc 2 529 0 is_stmt 1
-	ldr	r3, .L987
+	bne	.L993
+.L995:
+	ldr	r3, .L1010
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L969
-.LBB307:
-	.loc 2 530 0
-	ldr	r3, .L987+4
-	.loc 2 531 0
+	cbz	r3, .L992
+	ldr	r3, .L1010+4
 	mov	r1, r6
 	mov	r2, r7
 	mov	r0, r5
-	.loc 2 530 0
 	ldr	r3, [r3]
 	ldr	r10, [r3, #304]
-.LVL1061:
-	.loc 2 531 0
 	movs	r3, #1
 	str	r3, [sp]
 	mov	r3, r8
 	bl	FlashDdrTunningRead
-.LVL1062:
-	.loc 2 532 0
 	adds	r1, r0, #1
-	.loc 2 531 0
 	mov	r4, r0
-.LVL1063:
-	.loc 2 532 0
-	beq	.L973
-	.loc 2 532 0 is_stmt 0 discriminator 1
-	ldr	r3, .L987+8
+	beq	.L996
+	ldr	r3, .L1010+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r0, r3, lsr #1
-	bls	.L969
-.L973:
-	.loc 2 533 0 is_stmt 1
+	bls	.L992
+.L996:
 	ubfx	r0, r10, #8, #8
-.LVL1064:
 	bl	NandcSetDdrPara
-.LVL1065:
-	b	.L969
-.LVL1066:
-.L970:
-.LBE307:
-.LBB308:
-	.loc 2 524 0
+	b	.L992
+.L993:
 	movs	r3, #0
-	.loc 2 525 0
 	mov	r2, r7
-	.loc 2 524 0
 	strb	r3, [r10]
-	.loc 2 525 0
 	mov	r1, r6
 	mov	r3, r8
 	mov	r0, r5
-.LVL1067:
 	bl	FlashReadRawPage
-.LVL1068:
-.LBE308:
-	.loc 2 529 0
 	adds	r3, r0, #1
-.LBB309:
-	.loc 2 526 0
 	strb	fp, [r10]
-.LBE309:
-	.loc 2 529 0
-	beq	.L972
-.LBB310:
+	beq	.L995
 	mov	r4, r0
-.LVL1069:
-.L969:
-.LBE310:
-	.loc 2 536 0
-	ldr	r10, .L987+24
+.L992:
+	ldr	r10, .L1010+24
 	ldr	fp, [r10]
 	cmp	fp, #0
-	beq	.L968
-	.loc 2 536 0 is_stmt 0 discriminator 1
+	beq	.L991
 	adds	r2, r4, #1
-	bne	.L968
-	.loc 2 537 0 is_stmt 1
+	bne	.L991
 	mov	r3, r8
 	mov	r2, r7
 	mov	r1, r6
 	mov	r0, r5
 	blx	fp
-.LVL1070:
-	.loc 2 538 0
 	mov	r3, r6
-	.loc 2 537 0
 	mov	r4, r0
-.LVL1071:
-	.loc 2 538 0
 	mov	r1, r0
 	mov	r2, r5
-	ldr	r0, .L987+12
-.LVL1072:
+	ldr	r0, .L1010+12
 	bl	printf
-.LVL1073:
-	.loc 2 539 0
 	adds	r3, r4, #1
-	bne	.L968
-	.loc 2 539 0 is_stmt 0 discriminator 1
-	ldr	r3, .L987+16
+	bne	.L991
+	ldr	r3, .L1010+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L968
-	.loc 2 540 0 is_stmt 1
+	cbz	r3, .L991
 	mov	r0, r5
 	bl	flash_enter_slc_mode
-.LVL1074:
-	.loc 2 541 0
 	ldr	r4, [r10]
-.LVL1075:
 	mov	r3, r8
 	mov	r2, r7
 	mov	r1, r6
 	mov	r0, r5
 	blx	r4
-.LVL1076:
 	mov	r4, r0
-.LVL1077:
-	.loc 2 542 0
 	mov	r0, r5
-.LVL1078:
 	bl	flash_exit_slc_mode
-.LVL1079:
-.L968:
-	.loc 2 547 0
+.L991:
 	mov	r0, r4
 	add	sp, sp, #8
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1080:
-.L988:
+.L1011:
 	.align	2
-.L987:
-	.word	.LANCHOR29
+.L1010:
+	.word	.LANCHOR30
 	.word	.LANCHOR19
-	.word	.LANCHOR32
-	.word	.LC13
+	.word	.LANCHOR33
+	.word	.LC12
 	.word	.LANCHOR8
 	.word	.LANCHOR5
-	.word	.LANCHOR142
-	.cfi_endproc
-.LFE223:
+	.word	.LANCHOR145
 	.size	FlashReadPage, .-FlashReadPage
 	.section	.text.FlashDdrParaScan,"ax",%progbits
 	.align	1
@@ -11615,110 +7206,57 @@ FlashReadPage:
 	.fpu softvfp
 	.type	FlashDdrParaScan, %function
 FlashDdrParaScan:
-.LFB228:
-	.loc 2 781 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1081:
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -24
-	.cfi_offset 5, -20
-	.cfi_offset 6, -16
-	.cfi_offset 7, -12
-	.cfi_offset 8, -8
-	.cfi_offset 14, -4
-	.loc 2 781 0
 	mov	r6, r0
-.LVL1082:
-	.loc 2 784 0
-	ldr	r4, .L1000
-	.loc 2 786 0
+	ldr	r4, .L1023
 	movs	r5, #0
-	.loc 2 781 0
 	mov	r7, r1
-	.loc 2 784 0
 	ldrb	r0, [r4]	@ zero_extendqisi2
-.LVL1083:
 	bl	FlashSetInterfaceMode
-.LVL1084:
-	.loc 2 785 0
 	ldrb	r0, [r4]	@ zero_extendqisi2
 	bl	NandcSetMode
-.LVL1085:
-	.loc 2 786 0
 	mov	r3, r5
 	mov	r2, r5
 	str	r5, [sp]
 	mov	r1, r7
 	mov	r0, r6
 	bl	FlashDdrTunningRead
-.LVL1086:
-	.loc 2 787 0
 	mov	r3, r5
 	mov	r2, r5
-	.loc 2 786 0
 	mov	r8, r0
-.LVL1087:
-	.loc 2 787 0
 	mov	r1, r7
 	mov	r0, r6
-.LVL1088:
-	ldr	r5, .L1000+4
+	ldr	r5, .L1023+4
 	bl	FlashReadRawPage
-.LVL1089:
 	adds	r0, r0, #1
-	beq	.L990
-	.loc 2 789 0
+	beq	.L1013
 	cmp	r8, #-1
-	bne	.L991
-.L990:
-.LVL1090:
-	.loc 2 789 0 is_stmt 0 discriminator 1
+	bne	.L1014
+.L1013:
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	lsls	r3, r3, #31
-	bpl	.L991
-.LVL1091:
-.LBB313:
-.LBB314:
-	.loc 2 790 0 is_stmt 1
+	bpl	.L1014
 	movs	r0, #1
 	bl	FlashSetInterfaceMode
-.LVL1092:
-	.loc 2 791 0
 	movs	r0, #1
 	bl	NandcSetMode
-.LVL1093:
-	.loc 2 792 0
 	movs	r3, #0
-.LVL1094:
-.L999:
-.LBE314:
-.LBE313:
-	.loc 2 797 0
+.L1022:
 	movs	r0, #0
-	.loc 2 794 0
 	strb	r3, [r5]
-	.loc 2 797 0
 	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL1095:
-.L991:
-	.cfi_restore_state
-	.loc 2 794 0
+.L1014:
 	movs	r3, #1
-	b	.L999
-.L1001:
+	b	.L1022
+.L1024:
 	.align	2
-.L1000:
+.L1023:
 	.word	.LANCHOR24
-	.word	.LANCHOR29
-	.cfi_endproc
-.LFE228:
+	.word	.LANCHOR30
 	.size	FlashDdrParaScan, .-FlashDdrParaScan
 	.section	.text.FlashLoadPhyInfo,"ax",%progbits
 	.align	1
@@ -11729,244 +7267,146 @@ FlashDdrParaScan:
 	.fpu softvfp
 	.type	FlashLoadPhyInfo, %function
 FlashLoadPhyInfo:
-.LFB230:
-	.loc 2 810 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1096:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 817 0
 	movs	r3, #60
-	.loc 2 810 0
 	sub	sp, sp, #24
-	.cfi_def_cfa_offset 56
-	.loc 2 824 0
-	ldr	fp, .L1017+8
-	.loc 2 827 0
+	ldr	fp, .L1040+8
 	movs	r4, #0
-	.loc 2 829 0
 	movs	r7, #4
-	.loc 2 817 0
 	strb	r3, [sp, #20]
 	movs	r3, #40
 	strb	r3, [sp, #21]
 	movs	r3, #24
 	strb	r3, [sp, #22]
 	movs	r3, #16
-	.loc 2 826 0
-	ldr	r1, .L1017
-	.loc 2 829 0
+	ldr	r1, .L1040
 	mov	r0, r4
-	.loc 2 817 0
 	strb	r3, [sp, #23]
-	.loc 2 813 0
 	mov	r6, #-1
-	.loc 2 824 0
 	ldrh	r3, [fp, #10]
-	.loc 2 827 0
-	ldr	r8, .L1017+36
-	.loc 2 826 0
-	ldr	r5, .L1017+4
-	.loc 2 824 0
+	ldr	r8, .L1040+36
+	ldr	r5, .L1040+4
 	str	r3, [sp, #4]
-.LVL1097:
-	.loc 2 826 0
 	ldr	r3, [r1]
-.LVL1098:
-	.loc 2 827 0
 	str	r4, [r8]
-	.loc 2 826 0
 	str	r3, [r5]
-	.loc 2 829 0
 	bl	flash_enter_slc_mode
-.LVL1099:
-	.loc 2 833 0
 	mov	r10, r1
 	str	r8, [sp, #12]
-.LVL1100:
-.L1003:
-	.loc 2 810 0
+.L1026:
 	mov	r8, #0
 	adds	r3, r4, #1
 	str	r3, [sp, #8]
-.LVL1101:
-.L1005:
-	.loc 2 832 0
+.L1028:
 	add	r3, sp, #20
 	ldrb	r0, [r3, r8]	@ zero_extendqisi2
 	bl	FlashBchSel
-.LVL1102:
-	.loc 2 833 0
 	movs	r3, #0
 	ldr	r2, [r10]
 	mov	r1, r4
 	mov	r0, r3
 	bl	FlashReadRawPage
-.LVL1103:
-	.loc 2 834 0
 	adds	r0, r0, #1
-.LVL1104:
-	bne	.L1004
-	.loc 2 835 0
+	bne	.L1027
 	movs	r3, #0
 	ldr	r2, [r10]
 	ldr	r1, [sp, #8]
 	mov	r0, r3
-.LVL1105:
 	bl	FlashReadRawPage
-.LVL1106:
-	.loc 2 836 0
 	adds	r0, r0, #1
-.LVL1107:
-	bne	.L1004
-	.loc 2 831 0
+	bne	.L1027
 	add	r8, r8, #1
-.LVL1108:
 	cmp	r8, #4
-	bne	.L1005
-.LVL1109:
-.L1006:
+	bne	.L1028
+.L1029:
 	ldr	r3, [sp, #4]
-	.loc 2 830 0 discriminator 2
 	subs	r7, r7, #1
-.LVL1110:
 	add	r4, r4, r3
-	bne	.L1003
-	.loc 2 865 0
+	bne	.L1026
 	mov	r0, r7
-	b	.L1016
-.L1007:
-	.loc 2 850 0
+	b	.L1039
+.L1030:
 	movw	r1, #2036
 	add	r0, r8, #12
 	bl	JSHash
-.LVL1111:
 	ldr	r3, [r8, #8]
 	cmp	r3, r0
-	bne	.L1013
-	.loc 2 851 0
+	bne	.L1036
 	movs	r2, #32
 	add	r1, r8, #160
-	ldr	r0, .L1017+8
+	ldr	r0, .L1040+8
 	bl	ftl_memcpy
-.LVL1112:
-	.loc 2 852 0
 	ldr	r1, [r5]
 	movs	r2, #32
-	ldr	r0, .L1017+12
+	ldr	r0, .L1040+12
 	adds	r1, r1, #192
 	bl	ftl_memcpy
-.LVL1113:
-	.loc 2 853 0
 	ldr	r1, [r5]
 	mov	r2, #852
-	ldr	r0, .L1017+16
+	ldr	r0, .L1040+16
 	adds	r1, r1, #224
 	bl	ftl_memcpy
-.LVL1114:
-	.loc 2 854 0
 	ldr	r6, [r5]
-.LVL1115:
-	.loc 2 857 0
 	mov	r0, r4
-	.loc 2 854 0
-	ldr	r3, .L1017+20
-	.loc 2 857 0
+	ldr	r3, .L1040+20
 	ldrh	r1, [fp, #10]
-	.loc 2 854 0
 	ldr	r2, [r6, #1076]
 	strb	r2, [r3]
-	.loc 2 856 0
 	ldr	r3, [sp, #12]
 	str	r4, [r3]
-	.loc 2 857 0
 	bl	__aeabi_uidiv
-.LVL1116:
-	ldr	r3, .L1017+24
-	.loc 2 858 0
+	ldr	r3, .L1040+24
 	adds	r2, r0, #1
-	cbz	r0, .L1009
-.L1015:
-	.loc 2 859 0
+	cbz	r0, .L1032
+.L1038:
 	str	r2, [r3]
-	.loc 2 860 0
 	ldrh	r2, [r6, #14]
-	.loc 2 861 0
 	movs	r6, #0
-	.loc 2 860 0
-	ldr	r3, .L1017+28
+	ldr	r3, .L1040+28
 	strb	r2, [r3]
-.LVL1117:
-	b	.L1006
-.LVL1118:
-.L1009:
-	.loc 2 859 0
+	b	.L1029
+.L1032:
 	movs	r2, #2
-	b	.L1015
-.LVL1119:
-.L1013:
+	b	.L1038
+.L1036:
 	mov	r6, #-1
-.LVL1120:
-	b	.L1006
-.LVL1121:
-.L1004:
-	.loc 2 844 0
+	b	.L1029
+.L1027:
 	ldr	r8, [r5]
-.LVL1122:
-	ldr	r2, .L1017+32
+	ldr	r2, .L1040+32
 	ldr	r3, [r8]
 	cmp	r3, r2
-	bne	.L1006
-	.loc 2 845 0
+	bne	.L1029
 	cmp	r6, #0
-	bne	.L1007
-	.loc 2 846 0
+	bne	.L1030
 	ldrh	r1, [fp, #10]
 	mov	r0, r4
 	bl	__aeabi_uidiv
-.LVL1123:
-	ldr	r3, .L1017+24
+	ldr	r3, .L1040+24
 	adds	r0, r0, #1
 	str	r0, [r3]
-	.loc 2 847 0
 	mov	r0, r6
-.LVL1124:
-.L1016:
-	.loc 2 865 0
+.L1039:
 	bl	flash_exit_slc_mode
-.LVL1125:
-	.loc 2 867 0
 	mov	r0, r6
 	add	sp, sp, #24
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1126:
-.L1018:
+.L1041:
 	.align	2
-.L1017:
-	.word	.LANCHOR144
-	.word	.LANCHOR143
-	.word	.LANCHOR30
+.L1040:
+	.word	.LANCHOR147
+	.word	.LANCHOR146
+	.word	.LANCHOR31
 	.word	.LANCHOR7
 	.word	.LANCHOR20
-	.word	.LANCHOR29
-	.word	.LANCHOR146
-	.word	.LANCHOR147
+	.word	.LANCHOR30
+	.word	.LANCHOR149
+	.word	.LANCHOR150
 	.word	1312902724
-	.word	.LANCHOR145
-	.cfi_endproc
-.LFE230:
+	.word	.LANCHOR148
 	.size	FlashLoadPhyInfo, .-FlashLoadPhyInfo
 	.section	.text.ToshibaReadRetrial,"ax",%progbits
 	.align	1
@@ -11977,288 +7417,168 @@ FlashLoadPhyInfo:
 	.fpu softvfp
 	.type	ToshibaReadRetrial, %function
 ToshibaReadRetrial:
-.LFB240:
-	.loc 2 1741 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1127:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
 	sub	sp, sp, #24
-	.cfi_def_cfa_offset 56
-	.loc 2 1741 0
 	mov	r6, r0
 	str	r2, [sp, #12]
 	mov	fp, r3
 	str	r1, [sp, #20]
-	.loc 2 1748 0
 	bl	NandcWaitFlashReady
-.LVL1128:
-.LBB315:
-.LBB316:
-	.loc 3 123 0
-	ldr	r3, .L1046
-.LBE316:
-.LBE315:
-	.loc 2 1751 0
-	ldr	r2, .L1046+4
-.LBB320:
-.LBB317:
-	.loc 3 123 0
+	ldr	r3, .L1069
+	ldr	r2, .L1069+4
 	ldr	r4, [r3, r6, lsl #3]
-.LVL1129:
-	.loc 3 124 0
 	add	r3, r3, r6, lsl #3
 	str	r2, [sp, #16]
 	ldrb	r7, [r3, #4]	@ zero_extendqisi2
-.LBE317:
-.LBE320:
-	.loc 2 1751 0
 	ldrb	r3, [r2]	@ zero_extendqisi2
-.LBB321:
-.LBB318:
-	.loc 3 126 0
 	add	r5, r7, #8
-.LBE318:
-.LBE321:
-	.loc 2 1751 0
 	subs	r3, r3, #67
-.LBB322:
-.LBB319:
-	.loc 3 126 0
 	add	r5, r4, r5, lsl #8
-.LVL1130:
-.LBE319:
-.LBE322:
-	.loc 2 1751 0
 	cmp	r3, #1
-	bls	.L1036
-	.loc 2 1753 0
-	ldr	r3, .L1046+8
+	bls	.L1059
+	ldr	r3, .L1069+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1037
-.LVL1131:
-	.loc 2 1755 0
+	cbz	r3, .L1060
 	movs	r0, #0
 	bl	NandcSetDdrMode
-.LVL1132:
-	.loc 2 1754 0
 	movs	r3, #1
-.LVL1133:
-.L1037:
-	.loc 2 1744 0
+.L1060:
 	str	r3, [sp, #8]
-.LVL1134:
-	.loc 2 1757 0
 	add	r3, r4, r7, lsl #8
-.LVL1135:
 	movs	r2, #92
 	str	r2, [r3, #2056]
-	.loc 2 1758 0
 	movs	r2, #197
 	str	r2, [r3, #2056]
-.LVL1136:
-.L1020:
-	.loc 2 1760 0
+.L1043:
 	mov	r8, #1
-	.loc 2 1743 0
 	mov	r3, #-1
 	str	r3, [sp, #4]
-.LVL1137:
-.L1022:
-	.loc 2 1760 0 discriminator 1
-	ldr	r3, .L1046+12
+.L1045:
+	ldr	r3, .L1069+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	cmp	r8, r3
-	bcc	.L1031
+	bcc	.L1054
 	ldr	r10, [sp, #4]
-.LVL1138:
-.L1030:
-	.loc 2 1791 0
+.L1053:
 	ldr	r3, [sp, #16]
-	.loc 2 1792 0
 	movs	r1, #0
 	mov	r0, r5
-	.loc 2 1791 0
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	subs	r2, r2, #67
 	cmp	r2, #1
-	bhi	.L1032
-	.loc 2 1792 0
+	bhi	.L1055
 	bl	SandiskSetRRPara
-.LVL1139:
-.L1033:
-	.loc 2 1795 0
+.L1056:
 	add	r4, r4, r7, lsl #8
 	movs	r2, #255
 	str	r2, [r4, #2056]
-	.loc 2 1798 0
-	ldr	r2, .L1046+16
+	ldr	r2, .L1069+16
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	add	r2, r2, r2, lsl #1
 	cmp	r10, r2, asr #2
-	bcc	.L1034
-	.loc 2 1799 0 discriminator 1
+	bcc	.L1057
 	cmp	r10, #-1
 	it	ne
 	movne	r10, #256
-.LVL1140:
-.L1034:
-	.loc 2 1800 0
+.L1057:
 	mov	r0, r6
 	bl	NandcWaitFlashReady
-.LVL1141:
-	.loc 2 1801 0
 	ldr	r3, [sp, #8]
-	cbz	r3, .L1019
-	.loc 2 1802 0
+	cbz	r3, .L1042
 	movs	r0, #4
 	bl	NandcSetDdrMode
-.LVL1142:
-.L1019:
-	.loc 2 1804 0
+.L1042:
 	mov	r0, r10
 	add	sp, sp, #24
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1143:
-.L1036:
-	.cfi_restore_state
-	.loc 2 1744 0
+.L1059:
 	movs	r3, #0
 	str	r3, [sp, #8]
-	b	.L1020
-.LVL1144:
-.L1031:
-	.loc 2 1761 0
+	b	.L1043
+.L1054:
 	ldr	r3, [sp, #16]
-	.loc 2 1762 0
 	mov	r0, r5
 	uxtb	r1, r8
-	.loc 2 1761 0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	subs	r3, r3, #67
 	cmp	r3, #1
-	bhi	.L1023
-	.loc 2 1762 0
+	bhi	.L1046
 	bl	SandiskSetRRPara
-.LVL1145:
-.L1024:
-	.loc 2 1765 0
+.L1047:
 	ldr	r3, [sp, #16]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #34
-	bne	.L1025
-	.loc 2 1765 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1046+12
+	bne	.L1048
+	ldr	r3, .L1069+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	subs	r3, r3, #3
 	cmp	r8, r3
-	.loc 2 1766 0 is_stmt 1 discriminator 1
 	ittt	eq
 	addeq	r3, r4, r7, lsl #8
 	moveq	r2, #179
 	streq	r2, [r3, #2056]
-.L1025:
-	.loc 2 1768 0
+.L1048:
 	add	r3, r4, r7, lsl #8
 	movs	r2, #38
 	str	r2, [r3, #2056]
-	.loc 2 1769 0
 	movs	r2, #93
 	str	r2, [r3, #2056]
-	.loc 2 1771 0
 	ldr	r3, [sp, #8]
-	cbz	r3, .L1026
-	.loc 2 1772 0
+	cbz	r3, .L1049
 	movs	r0, #4
 	bl	NandcSetDdrMode
-.LVL1146:
-	.loc 2 1773 0
 	mov	r3, fp
 	ldr	r2, [sp, #12]
 	ldr	r1, [sp, #20]
 	mov	r0, r6
 	bl	FlashReadRawPage
-.LVL1147:
 	mov	r10, r0
-.LVL1148:
-	.loc 2 1774 0
 	movs	r0, #0
-.LVL1149:
 	bl	NandcSetDdrMode
-.LVL1150:
-.L1027:
-	.loc 2 1780 0
+.L1050:
 	cmp	r10, #-1
-	beq	.L1028
-	.loc 2 1785 0
-	ldr	r2, .L1046+16
+	beq	.L1051
+	ldr	r2, .L1069+16
 	ldr	r3, [sp, #4]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r3, #-1
 	it	eq
 	moveq	r3, r10
 	str	r3, [sp, #4]
-.LVL1151:
 	add	r2, r2, r2, lsl #1
 	cmp	r10, r2, asr #2
-	bcc	.L1030
-	.loc 2 1784 0
+	bcc	.L1053
 	mov	fp, #0
-	.loc 2 1783 0
 	str	fp, [sp, #12]
-.LVL1152:
-.L1028:
-	.loc 2 1760 0 discriminator 2
+.L1051:
 	add	r8, r8, #1
-.LVL1153:
-	b	.L1022
-.LVL1154:
-.L1023:
-	.loc 2 1764 0
+	b	.L1045
+.L1046:
 	bl	ToshibaSetRRPara
-.LVL1155:
-	b	.L1024
-.L1026:
-	.loc 2 1776 0
+	b	.L1047
+.L1049:
 	mov	r3, fp
 	ldr	r2, [sp, #12]
 	ldr	r1, [sp, #20]
 	mov	r0, r6
 	bl	FlashReadRawPage
-.LVL1156:
 	mov	r10, r0
-.LVL1157:
-	b	.L1027
-.LVL1158:
-.L1032:
-	.loc 2 1794 0
+	b	.L1050
+.L1055:
 	bl	ToshibaSetRRPara
-.LVL1159:
-	b	.L1033
-.L1047:
+	b	.L1056
+.L1070:
 	.align	2
-.L1046:
+.L1069:
 	.word	.LANCHOR6
 	.word	.LANCHOR10
-	.word	.LANCHOR29
-	.word	.LANCHOR148
-	.word	.LANCHOR32
-	.cfi_endproc
-.LFE240:
+	.word	.LANCHOR30
+	.word	.LANCHOR151
+	.word	.LANCHOR33
 	.size	ToshibaReadRetrial, .-ToshibaReadRetrial
 	.section	.text.SamsungReadRetrial,"ax",%progbits
 	.align	1
@@ -12269,132 +7589,76 @@ ToshibaReadRetrial:
 	.fpu softvfp
 	.type	SamsungReadRetrial, %function
 SamsungReadRetrial:
-.LFB242:
-	.loc 2 1820 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1160:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 1820 0
 	mov	r7, r0
 	mov	r10, r2
 	mov	r8, r3
 	mov	fp, r1
-	.loc 2 1828 0
 	movs	r6, #1
-	.loc 2 1826 0
 	bl	NandcWaitFlashReady
-.LVL1161:
-.LBB323:
-.LBB324:
-	.loc 3 123 0
-	ldr	r2, .L1061
-.LBE324:
-.LBE323:
-	.loc 2 1822 0
+	ldr	r2, .L1084
 	mov	r4, #-1
-.LBB326:
-.LBB325:
-	.loc 3 124 0
 	add	r3, r2, r7, lsl #3
-	.loc 3 126 0
 	ldrb	r5, [r3, #4]	@ zero_extendqisi2
 	add	r3, r5, #8
 	ldr	r5, [r2, r7, lsl #3]
 	add	r5, r5, r3, lsl #8
-.LVL1162:
-.L1049:
-.LBE325:
-.LBE326:
-	.loc 2 1828 0 discriminator 1
-	ldr	r3, .L1061+4
+.L1072:
+	ldr	r3, .L1084+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	cmp	r6, r3
-	bcc	.L1053
-.LVL1163:
-.L1052:
-	.loc 2 1843 0
+	bcc	.L1076
+.L1075:
 	movs	r1, #0
 	mov	r0, r5
 	bl	SamsungSetRRPara
-.LVL1164:
-	.loc 2 1844 0
-	ldr	r3, .L1061+8
+	ldr	r3, .L1084+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, asr #2
-	bcc	.L1048
-	.loc 2 1845 0 discriminator 1
+	bcc	.L1071
 	adds	r3, r4, #1
 	it	ne
 	movne	r4, #256
-.LVL1165:
-.L1048:
-	.loc 2 1848 0
+.L1071:
 	mov	r0, r4
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1166:
-.L1053:
-	.loc 2 1829 0
+.L1076:
 	uxtb	r1, r6
 	mov	r0, r5
 	bl	SamsungSetRRPara
-.LVL1167:
-	.loc 2 1830 0
 	mov	r2, r10
 	mov	r3, r8
 	mov	r1, fp
 	mov	r0, r7
 	bl	FlashReadRawPage
-.LVL1168:
-	.loc 2 1832 0
 	adds	r2, r0, #1
-	beq	.L1050
-	.loc 2 1837 0
-	ldr	r3, .L1061+8
+	beq	.L1073
+	ldr	r3, .L1084+8
 	cmp	r4, #-1
 	it	eq
 	moveq	r4, r0
-.LVL1169:
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r0, r3, asr #2
-	bcc	.L1056
-	.loc 2 1836 0
+	bcc	.L1079
 	mov	r8, #0
-	.loc 2 1835 0
 	mov	r10, r8
-.LVL1170:
-.L1050:
-	.loc 2 1828 0 discriminator 2
+.L1073:
 	adds	r6, r6, #1
-.LVL1171:
-	b	.L1049
-.LVL1172:
-.L1056:
-	.loc 2 1830 0
+	b	.L1072
+.L1079:
 	mov	r4, r0
-.LVL1173:
-	b	.L1052
-.L1062:
+	b	.L1075
+.L1085:
 	.align	2
-.L1061:
+.L1084:
 	.word	.LANCHOR6
-	.word	.LANCHOR148
-	.word	.LANCHOR32
-	.cfi_endproc
-.LFE242:
+	.word	.LANCHOR151
+	.word	.LANCHOR33
 	.size	SamsungReadRetrial, .-SamsungReadRetrial
 	.section	.text.MicronReadRetrial,"ax",%progbits
 	.align	1
@@ -12405,251 +7669,157 @@ SamsungReadRetrial:
 	.fpu softvfp
 	.type	MicronReadRetrial, %function
 MicronReadRetrial:
-.LFB243:
-	.loc 2 1851 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 24
+	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1174:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	mov	r10, r3
-	.loc 2 1856 0
-	ldr	r3, .L1078
-.LVL1175:
-	.loc 2 1851 0
-	sub	sp, sp, #32
-	.cfi_def_cfa_offset 64
-	.loc 2 1851 0
-	mov	r7, r0
-	mov	fp, r2
-	str	r1, [sp, #16]
-	.loc 2 1856 0
-	ldrb	r4, [r3]	@ zero_extendqisi2
-.LVL1176:
-	.loc 2 1858 0
-	ldr	r3, .L1078+4
+	mov	r7, r3
+	ldr	r3, .L1111
+	sub	sp, sp, #40
+	mov	r5, r0
+	str	r2, [sp, #16]
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	ldr	r3, .L1111+4
+	str	r1, [sp, #28]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1064
-	.loc 2 1856 0
-	add	r4, r4, r4, lsl #1
-.LVL1177:
-	asrs	r4, r4, #2
-.LVL1178:
-.L1065:
-	.loc 2 1861 0
-	mov	r0, r7
-.LVL1179:
-	bl	NandcWaitFlashReady
-.LVL1180:
-.LBB327:
-.LBB328:
-	.loc 3 123 0
-	ldr	r3, .L1078+8
-.LBE328:
-.LBE327:
-	.loc 2 1863 0
-	movs	r6, #0
-	.loc 2 1853 0
-	mov	r5, #-1
-.LBB330:
-.LBB329:
-	.loc 3 123 0
-	ldr	r2, [r3, r7, lsl #3]
-	.loc 3 124 0
-	add	r3, r3, r7, lsl #3
-	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-	.loc 3 123 0
-	str	r2, [sp, #8]
-.LVL1181:
+	bne	.L1087
+	add	r2, r2, r2, lsl #1
+	asrs	r3, r2, #2
+.L1110:
+.L1088:
+	mov	r8, #0
 	str	r3, [sp, #12]
-.LVL1182:
-.LBE329:
-.LBE330:
-	.loc 2 1864 0
-	lsls	r3, r3, #8
-	str	r3, [sp, #24]
-.LVL1183:
-.L1066:
-	.loc 2 1863 0 discriminator 1
-	ldr	r3, .L1078+12
+	mov	r6, r8
+.L1098:
+	mov	r0, r5
+	mov	r10, #0
+	bl	NandcWaitFlashReady
+	ldr	r3, .L1111+8
+	mov	r4, #-1
+	ldr	r2, [r3, r5, lsl #3]
+	add	r3, r3, r5, lsl #3
+	ldrb	fp, [r3, #4]	@ zero_extendqisi2
+	str	r2, [sp, #24]
+	lsl	r3, fp, #8
+	str	r3, [sp, #32]
+.L1089:
+	ldr	r3, .L1111+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r6, r3
-	bcc	.L1070
-.LVL1184:
-.L1069:
-	.loc 2 1884 0
-	ldr	r3, [sp, #8]
-.LBB331:
-.LBB332:
-	.loc 3 306 0
+	cmp	r10, r3
+	bcc	.L1093
+.L1092:
+	ldr	r3, [sp, #24]
 	movs	r0, #200
-.LBE332:
-.LBE331:
-	.loc 2 1884 0
-	ldr	r2, [sp, #12]
-	add	r7, r3, r2, lsl #8
+	add	fp, r3, fp, lsl #8
 	movs	r3, #239
-	str	r3, [r7, #2056]
-	.loc 2 1885 0
+	str	r3, [fp, #2056]
 	movs	r3, #137
-	str	r3, [r7, #2052]
-.LVL1185:
-.LBB334:
-.LBB333:
-	.loc 3 306 0
+	str	r3, [fp, #2052]
 	bl	udelay
-.LVL1186:
-.LBE333:
-.LBE334:
-	.loc 2 1891 0
-	cmp	r5, r4
-	.loc 2 1887 0
-	mov	r3, #0
-	str	r3, [r7, #2048]
-	.loc 2 1888 0
-	str	r3, [r7, #2048]
-	.loc 2 1889 0
-	str	r3, [r7, #2048]
-	.loc 2 1890 0
-	str	r3, [r7, #2048]
-	.loc 2 1891 0
-	bcc	.L1063
-	.loc 2 1892 0 discriminator 1
-	adds	r3, r5, #1
-	.loc 2 1895 0 discriminator 1
-	ldr	r2, [sp, #16]
-	.loc 2 1892 0 discriminator 1
+	ldr	r3, [sp, #12]
+	str	r6, [fp, #2048]
+	str	r6, [fp, #2048]
+	cmp	r4, r3
+	str	r6, [fp, #2048]
+	str	r6, [fp, #2048]
+	bcc	.L1094
+	adds	r1, r4, #1
+	mov	r3, r10
 	it	ne
-	movne	r5, #256
-.LVL1187:
-	.loc 2 1895 0 discriminator 1
-	mov	r3, r6
-.LVL1188:
-	str	r5, [sp]
-	mov	r1, r6
-	ldr	r0, .L1078+16
+	movne	r4, #256
+	ldr	r2, [sp, #28]
+	str	r4, [sp]
+	mov	r1, r10
+	ldr	r0, .L1111+16
 	bl	printf
-.LVL1189:
-.L1063:
-	.loc 2 1898 0
+	cmp	r8, #0
+	bne	.L1096
+	ldr	r3, .L1111+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L1086
+	adds	r2, r4, #1
+	bne	.L1086
+	movs	r1, #3
 	mov	r0, r5
-	add	sp, sp, #32
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1190:
-.L1064:
-	.cfi_restore_state
-	.loc 2 1859 0
-	ldr	r3, .L1078+20
-	smull	r4, r5, r4, r3
-.LVL1191:
-	mov	r4, r5
-.LVL1192:
-	b	.L1065
-.LVL1193:
-.L1070:
-	.loc 2 1864 0
-	ldr	r2, [sp, #24]
-.LBB335:
-.LBB336:
-	.loc 3 306 0
+	bl	micron_auto_read_calibration_config
+	mov	r8, #1
+	b	.L1098
+.L1087:
+	ldr	r3, .L1111+20
+	smull	r2, r3, r2, r3
+	b	.L1110
+.L1093:
+	ldr	r2, [sp, #32]
 	movs	r0, #200
-.LBE336:
-.LBE335:
-	.loc 2 1864 0
-	ldr	r3, [sp, #8]
-	.loc 2 1868 0
-	mov	r8, #0
-	.loc 2 1864 0
+	ldr	r3, [sp, #24]
 	add	r3, r3, r2
 	movs	r2, #239
 	str	r2, [r3, #2056]
-	.loc 2 1865 0
 	movs	r2, #137
 	str	r2, [r3, #2052]
-	str	r3, [sp, #28]
-.LVL1194:
-.LBB338:
-.LBB337:
-	.loc 3 306 0
+	str	r3, [sp, #36]
 	bl	udelay
-.LVL1195:
-.LBE337:
-.LBE338:
-	.loc 2 1867 0
-	adds	r3, r6, #1
-	.loc 2 1871 0
-	ldr	r1, [sp, #16]
-	.loc 2 1867 0
+	add	r3, r10, #1
+	ldr	r1, [sp, #28]
 	mov	r2, r3
 	str	r3, [sp, #20]
-	ldr	r3, [sp, #28]
-	.loc 2 1871 0
-	mov	r0, r7
-	.loc 2 1867 0
+	ldr	r3, [sp, #36]
+	mov	r0, r5
 	str	r2, [r3, #2048]
-	.loc 2 1871 0
-	mov	r2, fp
-	.loc 2 1868 0
-	str	r8, [r3, #2048]
-	.loc 2 1869 0
-	str	r8, [r3, #2048]
-	.loc 2 1870 0
-	str	r8, [r3, #2048]
-	.loc 2 1871 0
-	mov	r3, r10
+	str	r6, [r3, #2048]
+	ldr	r2, [sp, #16]
+	str	r6, [r3, #2048]
+	str	r6, [r3, #2048]
+	mov	r3, r7
 	bl	FlashReadRawPage
-.LVL1196:
-	.loc 2 1873 0
-	adds	r2, r0, #1
-	beq	.L1067
-	.loc 2 1874 0
-	cmp	r5, #-1
+	adds	r3, r0, #1
+	beq	.L1090
+	ldr	r3, [sp, #12]
+	cmp	r4, #-1
 	it	eq
-	moveq	r5, r0
-.LVL1197:
-	.loc 2 1878 0
-	cmp	r0, r4
-	bcc	.L1073
-	.loc 2 1877 0
-	mov	r10, r8
-	.loc 2 1876 0
-	mov	fp, r8
-.LVL1198:
-.L1067:
-	.loc 2 1876 0 is_stmt 0 discriminator 1
-	ldr	r6, [sp, #20]
-.LVL1199:
-	b	.L1066
-.LVL1200:
-.L1073:
-	.loc 2 1871 0 is_stmt 1
-	mov	r5, r0
-.LVL1201:
-	b	.L1069
-.L1079:
+	moveq	r4, r0
+	cmp	r0, r3
+	bcc	.L1100
+	movs	r7, #0
+	str	r7, [sp, #16]
+.L1090:
+	ldr	r10, [sp, #20]
+	b	.L1089
+.L1100:
+	movs	r7, #0
+	mov	r4, r0
+	str	r7, [sp, #16]
+	b	.L1092
+.L1096:
+	movs	r1, #0
+	mov	r0, r5
+	bl	micron_auto_read_calibration_config
+	adds	r3, r4, #1
+	it	ne
+	movne	r4, #256
+.L1086:
+	mov	r0, r4
+	add	sp, sp, #40
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1094:
+	cmp	r8, #0
+	beq	.L1086
+	movs	r1, #0
+	mov	r0, r5
+	bl	micron_auto_read_calibration_config
+	mov	r4, #256
+	b	.L1086
+.L1112:
 	.align	2
-.L1078:
-	.word	.LANCHOR32
+.L1111:
+	.word	.LANCHOR33
 	.word	.LANCHOR8
 	.word	.LANCHOR6
-	.word	.LANCHOR148
-	.word	.LC14
+	.word	.LANCHOR151
+	.word	.LC13
 	.word	1431655766
-	.cfi_endproc
-.LFE243:
 	.size	MicronReadRetrial, .-MicronReadRetrial
 	.section	.text.HynixReadRetrial,"ax",%progbits
 	.align	1
@@ -12660,168 +7830,95 @@ MicronReadRetrial:
 	.fpu softvfp
 	.type	HynixReadRetrial, %function
 HynixReadRetrial:
-.LFB245:
-	.loc 2 1929 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1202:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 1929 0
 	mov	fp, r2
-	.loc 2 1933 0
-	ldr	r4, .L1097
-	.loc 2 1940 0
+	ldr	r4, .L1130
 	mov	r8, #0
-	.loc 2 1931 0
 	mov	r6, #-1
-	.loc 2 1929 0
 	mov	r10, r3
 	mov	r7, r0
 	str	r1, [sp, #4]
-	.loc 2 1934 0
 	ldrb	r2, [r4, #2]	@ zero_extendqisi2
-.LVL1203:
-	.loc 2 1933 0
 	adds	r3, r4, r0
-.LVL1204:
 	ldrb	r5, [r3, #12]	@ zero_extendqisi2
-.LVL1205:
-	.loc 2 1934 0
 	str	r2, [sp]
-.LVL1206:
-	.loc 2 1936 0
-	ldr	r2, .L1097+4
+	ldr	r2, .L1130+4
 	ldr	r2, [r2]
 	ldrb	r2, [r2, #19]	@ zero_extendqisi2
 	cmp	r2, #7
-	.loc 2 1937 0
 	it	eq
 	ldrbeq	r5, [r3, #20]	@ zero_extendqisi2
-.LVL1207:
-	.loc 2 1939 0
 	bl	NandcWaitFlashReady
-.LVL1208:
-.L1082:
-	.loc 2 1940 0 discriminator 1
+.L1115:
 	ldr	r3, [sp]
 	cmp	r8, r3
-	bcc	.L1087
-.LVL1209:
-.L1086:
-	.loc 2 1958 0
-	ldr	r3, .L1097+4
-	.loc 2 1959 0
+	bcc	.L1120
+.L1119:
+	ldr	r3, .L1130+4
 	add	r4, r4, r7
-	.loc 2 1958 0
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	cmp	r3, #7
-	.loc 2 1962 0
-	ldr	r3, .L1097+8
-	.loc 2 1959 0
+	ldr	r3, .L1130+8
 	ite	eq
 	strbeq	r5, [r4, #20]
-	.loc 2 1961 0
 	strbne	r5, [r4, #12]
-	.loc 2 1962 0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r6, r3, asr #2
-	bcc	.L1080
-	.loc 2 1963 0 discriminator 1
+	bcc	.L1113
 	adds	r3, r6, #1
 	it	ne
 	movne	r6, #256
-.LVL1210:
-.L1080:
-	.loc 2 1967 0
+.L1113:
 	mov	r0, r6
 	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-.LVL1211:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1212:
-.L1087:
-	.cfi_restore_state
-	.loc 2 1943 0
+.L1120:
 	ldr	r3, [sp]
-	.loc 2 1941 0
 	adds	r5, r5, #1
-.LVL1213:
 	uxtb	r5, r5
-.LVL1214:
-	.loc 2 1944 0
-	ldr	r2, .L1097+12
+	ldr	r2, .L1130+12
 	ldrb	r1, [r4, #1]	@ zero_extendqisi2
 	mov	r0, r7
-	.loc 2 1943 0
 	cmp	r3, r5
 	it	ls
 	movls	r5, #0
-.LVL1215:
-	.loc 2 1944 0
 	mov	r3, r5
 	bl	HynixSetRRPara
-.LVL1216:
-	.loc 2 1945 0
 	mov	r2, fp
 	mov	r3, r10
 	ldr	r1, [sp, #4]
 	mov	r0, r7
 	bl	FlashReadRawPage
-.LVL1217:
-	.loc 2 1947 0
 	adds	r2, r0, #1
-	beq	.L1084
-	.loc 2 1952 0
-	ldr	r3, .L1097+8
-	.loc 2 1948 0
+	beq	.L1117
+	ldr	r3, .L1130+8
 	cmp	r6, #-1
 	it	eq
 	moveq	r6, r0
-.LVL1218:
-	.loc 2 1952 0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r0, r3, asr #2
-	bcc	.L1091
-	.loc 2 1951 0
+	bcc	.L1124
 	mov	r10, #0
-	.loc 2 1950 0
 	mov	fp, r10
-.LVL1219:
-.L1084:
-	.loc 2 1940 0 discriminator 2
+.L1117:
 	add	r8, r8, #1
-.LVL1220:
-	b	.L1082
-.LVL1221:
-.L1091:
-	.loc 2 1945 0
+	b	.L1115
+.L1124:
 	mov	r6, r0
-.LVL1222:
-	b	.L1086
-.L1098:
+	b	.L1119
+.L1131:
 	.align	2
-.L1097:
+.L1130:
 	.word	.LANCHOR20
 	.word	.LANCHOR18
-	.word	.LANCHOR32
+	.word	.LANCHOR33
 	.word	.LANCHOR20+4
-	.cfi_endproc
-.LFE245:
 	.size	HynixReadRetrial, .-HynixReadRetrial
 	.section	.text.FlashProgPage,"ax",%progbits
 	.align	1
@@ -12832,120 +7929,66 @@ HynixReadRetrial:
 	.fpu softvfp
 	.type	FlashProgPage, %function
 FlashProgPage:
-.LFB224:
-	.loc 2 562 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1223:
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -24
-	.cfi_offset 5, -20
-	.cfi_offset 6, -16
-	.cfi_offset 7, -12
-	.cfi_offset 8, -8
-	.cfi_offset 14, -4
-	.loc 2 562 0
 	mov	r8, r3
-	.loc 2 566 0
-	ldr	r3, .L1102
-.LVL1224:
-	.loc 2 562 0
+	ldr	r3, .L1135
 	mov	r5, r1
 	mov	r7, r2
-	.loc 2 568 0
 	mov	r4, r0
-	.loc 2 566 0
 	ldrb	r6, [r3, #9]	@ zero_extendqisi2
-.LVL1225:
-	.loc 2 568 0
-	cbnz	r0, .L1100
-	.loc 2 568 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1102+4
-	ldr	r2, .L1102+8
-.LVL1226:
+	cbnz	r0, .L1133
+	ldr	r3, .L1135+4
+	ldr	r2, .L1135+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	ldr	r1, [r2]
-.LVL1227:
 	muls	r1, r3, r1
 	cmp	r1, r5
-	bls	.L1100
-	.loc 2 569 0 is_stmt 1
-	ldr	r3, .L1102+12
+	bls	.L1133
+	ldr	r3, .L1135+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L1101
-	.loc 2 572 0
+	cbnz	r3, .L1134
 	subs	r6, r6, #2
-.LVL1228:
-.L1100:
-	.loc 2 574 0
+.L1133:
 	mov	r0, r4
-.LVL1229:
 	bl	NandcWaitFlashReady
-.LVL1230:
-	.loc 2 575 0
 	mov	r0, r4
 	bl	NandcFlashCs
-.LVL1231:
-	.loc 2 576 0
 	mov	r1, r5
 	mov	r0, r4
 	bl	FlashProgFirstCmd
-.LVL1232:
-	.loc 2 577 0
 	mov	r3, r7
 	uxtb	r2, r6
 	str	r8, [sp]
 	movs	r1, #1
 	mov	r0, r4
 	bl	NandcXferData
-.LVL1233:
-	.loc 2 578 0
 	mov	r1, r5
 	mov	r0, r4
 	bl	FlashProgSecondCmd
-.LVL1234:
-	.loc 2 579 0
 	mov	r0, r4
 	bl	NandcWaitFlashReady
-.LVL1235:
-	.loc 2 580 0
 	mov	r1, r5
 	mov	r0, r4
 	bl	FlashReadStatus
-.LVL1236:
 	mov	r1, r0
-.LVL1237:
-	.loc 2 581 0
 	mov	r0, r4
-.LVL1238:
 	bl	NandcFlashDeCs
-.LVL1239:
-	.loc 2 586 0
 	and	r0, r1, #1
-.LVL1240:
 	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL1241:
-.L1101:
-	.cfi_restore_state
-	.loc 2 570 0
+.L1134:
 	movs	r6, #4
-.LVL1242:
-	b	.L1100
-.L1103:
+	b	.L1133
+.L1136:
 	.align	2
-.L1102:
-	.word	.LANCHOR30
+.L1135:
+	.word	.LANCHOR31
 	.word	.LANCHOR2
 	.word	.LANCHOR3
 	.word	.LANCHOR1
-	.cfi_endproc
-.LFE224:
 	.size	FlashProgPage, .-FlashProgPage
 	.section	.text.FlashSavePhyInfo,"ax",%progbits
 	.align	1
@@ -12956,149 +7999,89 @@ FlashProgPage:
 	.fpu softvfp
 	.type	FlashSavePhyInfo, %function
 FlashSavePhyInfo:
-.LFB231:
-	.loc 2 870 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1243:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 873 0
-	ldr	r7, .L1113
-	ldr	r4, .L1113+4
+	ldr	r7, .L1146
+	ldr	r4, .L1146+4
 	ldr	r3, [r7]
-	.loc 2 886 0
-	ldr	r10, .L1113+60
-	.loc 2 903 0
-	ldr	r8, .L1113+64
-	.loc 2 873 0
+	ldr	r10, .L1146+60
+	ldr	r8, .L1146+64
 	str	r3, [r4]
-	.loc 2 877 0
-	ldr	r3, .L1113+8
+	ldr	r3, .L1146+8
 	ldrb	r0, [r3]	@ zero_extendqisi2
 	bl	FlashBchSel
-.LVL1244:
-	.loc 2 885 0
 	mov	r2, #2048
 	movs	r1, #0
 	ldr	r0, [r7]
 	bl	ftl_memset
-.LVL1245:
-	.loc 2 886 0
-	ldr	r3, [r4]
-	.loc 2 891 0
-	movs	r2, #32
-	ldr	r1, .L1113+12
-	.loc 2 886 0
-	str	r10, [r3]
-	.loc 2 887 0
-	ldr	r3, .L1113+16
 	ldr	r0, [r4]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	.loc 2 891 0
+	movs	r2, #32
+	ldr	r3, .L1146+12
+	ldr	r1, .L1146+16
+	str	r10, [r0]
 	adds	r0, r0, #16
-	.loc 2 887 0
+	ldrb	r3, [r3]	@ zero_extendqisi2
 	strh	r3, [r0, #-4]	@ movhi
-	.loc 2 888 0
-	ldr	r3, .L1113+20
+	ldr	r3, .L1146+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	strh	r3, [r0, #-2]	@ movhi
-	.loc 2 889 0
-	ldr	r3, .L1113+24
+	ldr	r3, .L1146+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r3, [r0, #1060]
-	.loc 2 891 0
 	bl	ftl_memcpy
-.LVL1246:
-	.loc 2 892 0
 	ldr	r0, [r4]
 	movs	r2, #8
-	ldr	r1, .L1113+28
+	ldr	r1, .L1146+28
 	adds	r0, r0, #80
 	bl	ftl_memcpy
-.LVL1247:
-	.loc 2 893 0
 	ldr	r0, [r4]
 	movs	r2, #32
-	ldr	r1, .L1113+32
+	ldr	r1, .L1146+32
 	adds	r0, r0, #96
 	bl	ftl_memcpy
-.LVL1248:
-	.loc 2 895 0
 	ldr	r0, [r4]
 	movs	r2, #32
-	ldr	r1, .L1113+36
+	ldr	r1, .L1146+36
 	adds	r0, r0, #160
 	bl	ftl_memcpy
-.LVL1249:
-	.loc 2 896 0
 	ldr	r0, [r4]
 	movs	r2, #32
-	ldr	r1, .L1113+40
+	ldr	r1, .L1146+40
 	adds	r0, r0, #192
 	bl	ftl_memcpy
-.LVL1250:
-	.loc 2 897 0
 	ldr	r0, [r4]
 	mov	r2, #852
-	ldr	r1, .L1113+44
+	ldr	r1, .L1146+44
 	adds	r0, r0, #224
 	bl	ftl_memcpy
-.LVL1251:
-	.loc 2 898 0
 	ldr	r5, [r4]
 	movw	r1, #2036
 	add	r0, r5, #12
 	bl	JSHash
-.LVL1252:
-	.loc 2 900 0
-	ldr	r1, .L1113+48
-	.loc 2 899 0
+	ldr	r1, .L1146+48
 	mov	r3, #1592
 	str	r3, [r5, #4]
-	.loc 2 898 0
 	str	r0, [r5, #8]
-	.loc 2 901 0
 	movs	r0, #0
-	.loc 2 900 0
 	ldr	r3, [r1]
-	.loc 2 872 0
 	movs	r5, #0
-	.loc 2 902 0
 	mov	r6, r5
-	.loc 2 900 0
 	str	r3, [r4]
-	.loc 2 901 0
 	bl	flash_enter_slc_mode
-.LVL1253:
 	mov	fp, r1
-.LVL1254:
-.L1107:
-	.loc 2 903 0
+.L1140:
 	ldr	r1, [r8]
 	movs	r2, #0
 	mov	r0, r2
 	muls	r1, r6, r1
 	bl	FlashEraseBlock
-.LVL1255:
-	.loc 2 904 0
 	ldr	r1, [r8]
 	movs	r3, #0
 	ldr	r2, [r7]
 	mov	r0, r3
 	muls	r1, r6, r1
 	bl	FlashProgPage
-.LVL1256:
-	.loc 2 905 0
 	ldr	r1, [r8]
 	movs	r3, #0
 	ldr	r2, [r7]
@@ -13106,104 +8089,74 @@ FlashSavePhyInfo:
 	muls	r1, r6, r1
 	adds	r1, r1, #1
 	bl	FlashProgPage
-.LVL1257:
-	.loc 2 906 0
 	ldr	r1, [r8]
 	movs	r3, #0
 	ldr	r2, [fp]
 	mov	r0, r3
 	muls	r1, r6, r1
 	bl	FlashReadRawPage
-.LVL1258:
 	adds	r0, r0, #1
 	add	r2, r6, #1
-	beq	.L1105
-	.loc 2 907 0
+	beq	.L1138
 	ldr	r3, [r4]
 	ldr	r1, [r3]
 	cmp	r1, r10
-	bne	.L1105
-	.loc 2 908 0 discriminator 1
+	bne	.L1138
 	add	r0, r3, #12
 	movw	r1, #2036
 	str	r2, [sp, #4]
 	str	r3, [sp]
 	bl	JSHash
-.LVL1259:
-	.loc 2 907 0 discriminator 1
 	ldr	r3, [sp]
 	ldr	r2, [sp, #4]
 	ldr	r3, [r3, #8]
 	cmp	r3, r0
-	bne	.L1105
-	.loc 2 909 0
-	ldr	r3, .L1113+52
-	.loc 2 914 0
+	bne	.L1138
+	ldr	r3, .L1146+52
 	cmp	r5, #1
-	.loc 2 909 0
 	str	r2, [r3]
-	.loc 2 910 0
 	ldr	r3, [r8]
 	mul	r6, r6, r3
-.LVL1260:
-	ldr	r3, .L1113+56
+	ldr	r3, .L1146+56
 	str	r6, [r3]
-.LVL1261:
-	.loc 2 914 0
-	beq	.L1108
+	beq	.L1141
 	movs	r5, #1
-.LVL1262:
-.L1105:
-	.loc 2 902 0 discriminator 2
+.L1138:
 	cmp	r2, #4
 	mov	r6, r2
-.LVL1263:
-	bne	.L1107
-.LVL1264:
-.L1106:
-	.loc 2 917 0
+	bne	.L1140
+.L1139:
 	movs	r0, #0
 	bl	flash_exit_slc_mode
-.LVL1265:
-	.loc 2 918 0
 	clz	r0, r5
 	lsrs	r0, r0, #5
-	.loc 2 922 0
 	negs	r0, r0
 	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1266:
-.L1108:
-	.cfi_restore_state
-	.loc 2 911 0
+.L1141:
 	movs	r5, #2
-.LVL1267:
-	b	.L1106
-.L1114:
+	b	.L1139
+.L1147:
 	.align	2
-.L1113:
-	.word	.LANCHOR144
-	.word	.LANCHOR143
-	.word	.LANCHOR149
-	.word	.LANCHOR22
+.L1146:
+	.word	.LANCHOR147
+	.word	.LANCHOR146
+	.word	.LANCHOR152
 	.word	.LANCHOR25
+	.word	.LANCHOR22
 	.word	.LANCHOR2
-	.word	.LANCHOR29
+	.word	.LANCHOR30
 	.word	.LANCHOR26
 	.word	.LANCHOR17
-	.word	.LANCHOR30
+	.word	.LANCHOR31
 	.word	.LANCHOR7
 	.word	.LANCHOR20
-	.word	.LANCHOR150
-	.word	.LANCHOR146
-	.word	.LANCHOR145
+	.word	.LANCHOR153
+	.word	.LANCHOR149
+	.word	.LANCHOR148
 	.word	1312902724
 	.word	.LANCHOR3
-	.cfi_endproc
-.LFE231:
 	.size	FlashSavePhyInfo, .-FlashSavePhyInfo
 	.section	.text.FlashReadIdbDataRaw,"ax",%progbits
 	.align	1
@@ -13214,32 +8167,13 @@ FlashSavePhyInfo:
 	.fpu softvfp
 	.type	FlashReadIdbDataRaw, %function
 FlashReadIdbDataRaw:
-.LFB249:
-	.loc 2 2091 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1268:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 2095 0
 	movs	r3, #60
-	.loc 2 2091 0
 	sub	sp, sp, #24
-	.cfi_def_cfa_offset 56
-	.loc 2 2105 0
-	ldr	r2, .L1127
-	.loc 2 2091 0
+	ldr	r2, .L1160
 	mov	r10, r0
-	.loc 2 2095 0
 	strb	r3, [sp, #20]
 	movs	r3, #40
 	strb	r3, [sp, #21]
@@ -13247,160 +8181,107 @@ FlashReadIdbDataRaw:
 	strb	r3, [sp, #22]
 	movs	r3, #16
 	strb	r3, [sp, #23]
-.LVL1269:
-	.loc 2 2103 0
-	ldr	r3, .L1127+4
-	.loc 2 2105 0
+	ldr	r3, .L1160+4
 	ldr	r1, [r2]
 	str	r2, [sp, #8]
-	.loc 2 2103 0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r3, [sp, #4]
-.LVL1270:
-	.loc 2 2105 0
-	ldr	r3, .L1127+8
+	ldr	r3, .L1160+8
 	cmp	r1, r3
 	str	r3, [sp, #12]
-	bne	.L1116
-	.loc 2 2106 0
+	bne	.L1149
 	movs	r0, #0
-.LVL1271:
 	bl	flash_enter_slc_mode
-.LVL1272:
-.L1116:
-	.loc 2 2102 0
+.L1149:
 	mov	r7, #-1
-	.loc 2 2108 0
 	movs	r4, #2
-	.loc 2 2107 0
 	mov	r2, #2048
 	movs	r1, #0
 	mov	r0, r10
 	bl	ftl_memset
-.LVL1273:
-.L1117:
-	.loc 2 2108 0 discriminator 1
-	ldr	r3, .L1127+12
+.L1150:
+	ldr	r3, .L1160+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r4, r3
-	bcc	.L1122
-.L1121:
-.LVL1274:
-	.loc 2 2132 0
+	bcc	.L1155
+.L1154:
 	ldr	r0, [sp, #4]
 	bl	FlashBchSel
-.LVL1275:
-	.loc 2 2133 0
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #12]
 	ldr	r3, [r3]
 	cmp	r3, r2
-	bne	.L1115
-	.loc 2 2134 0
+	bne	.L1148
 	movs	r0, #0
 	bl	flash_exit_slc_mode
-.LVL1276:
-.L1115:
-	.loc 2 2136 0
+.L1148:
 	mov	r0, r7
 	add	sp, sp, #24
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1277:
-.L1122:
-	.cfi_restore_state
-	.loc 2 2111 0
-	ldr	r5, .L1127+16
+.L1155:
+	ldr	r5, .L1160+16
 	movs	r6, #0
-	ldr	fp, .L1127+32
-.L1119:
-.LVL1278:
-	.loc 2 2110 0
+	ldr	fp, .L1160+32
+.L1152:
 	add	r3, sp, #20
 	ldrb	r8, [r6, r3]	@ zero_extendqisi2
 	mov	r0, r8
 	bl	FlashBchSel
-.LVL1279:
-	.loc 2 2111 0
 	ldr	r1, [fp]
 	movs	r3, #0
 	ldr	r2, [r5]
 	mov	r0, r3
 	muls	r1, r4, r1
 	bl	FlashReadRawPage
-.LVL1280:
 	adds	r0, r0, #1
-	bne	.L1118
-	.loc 2 2109 0 discriminator 2
+	bne	.L1151
 	adds	r6, r6, #1
-.LVL1281:
 	cmp	r6, #4
-	bne	.L1119
-.L1120:
-	.loc 2 2108 0 discriminator 2
+	bne	.L1152
+.L1153:
 	adds	r4, r4, #1
-.LVL1282:
-	b	.L1117
-.LVL1283:
-.L1125:
-	.loc 2 2123 0
+	b	.L1150
+.L1158:
 	movs	r7, #0
-	b	.L1121
-.LVL1284:
-.L1118:
-	.loc 2 2117 0
+	b	.L1154
+.L1151:
 	ldr	r3, [r5]
 	ldr	r2, [r3]
-	ldr	r3, .L1127+20
+	ldr	r3, .L1160+20
 	cmp	r2, r3
-	bne	.L1120
-	.loc 2 2119 0
+	bne	.L1153
 	mov	r1, r8
-	ldr	r0, .L1127+24
+	ldr	r0, .L1160+24
 	bl	printf
-.LVL1285:
-	.loc 2 2121 0
 	mov	r2, #2048
 	ldr	r1, [r5]
 	mov	r0, r10
 	bl	ftl_memcpy
-.LVL1286:
-	.loc 2 2122 0
 	ldr	r3, [r5]
-	ldr	r2, .L1127+12
+	ldr	r2, .L1160+12
 	ldr	r3, [r3, #512]
 	strb	r3, [r2]
-.LVL1287:
-	.loc 2 2124 0
-	ldr	r3, .L1127+28
+	ldr	r3, .L1160+28
 	ldr	r2, [r3]
 	cmp	r4, r2
-	bcs	.L1125
-	.loc 2 2125 0
+	bcs	.L1158
 	str	r4, [r3]
-	.loc 2 2123 0
 	movs	r7, #0
-	.loc 2 2126 0
 	bl	FlashSavePhyInfo
-.LVL1288:
-	.loc 2 2127 0
-	b	.L1120
-.L1128:
+	b	.L1153
+.L1161:
 	.align	2
-.L1127:
-	.word	.LANCHOR151
-	.word	.LANCHOR32
+.L1160:
+	.word	.LANCHOR29
+	.word	.LANCHOR33
 	.word	1446522928
 	.word	.LANCHOR2
-	.word	.LANCHOR144
+	.word	.LANCHOR147
 	.word	-52655045
-	.word	.LC15
-	.word	.LANCHOR146
+	.word	.LC14
+	.word	.LANCHOR149
 	.word	.LANCHOR3
-	.cfi_endproc
-.LFE249:
 	.size	FlashReadIdbDataRaw, .-FlashReadIdbDataRaw
 	.section	.text.FlashPageProgMsbFFData,"ax",%progbits
 	.align	1
@@ -13411,80802 +8292,18546 @@ FlashReadIdbDataRaw:
 	.fpu softvfp
 	.type	FlashPageProgMsbFFData, %function
 FlashPageProgMsbFFData:
-.LFB247:
-	.loc 2 1984 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1289:
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 3, -32
-	.cfi_offset 4, -28
-	.cfi_offset 5, -24
-	.cfi_offset 6, -20
-	.cfi_offset 7, -16
-	.cfi_offset 8, -12
-	.cfi_offset 10, -8
-	.cfi_offset 14, -4
-	.loc 2 1984 0
 	mov	r4, r2
-	.loc 2 1985 0
-	ldr	r5, .L1139
-	.loc 2 1984 0
+	ldr	r5, .L1172
 	mov	r6, r0
 	mov	r7, r1
-	.loc 2 1985 0
 	ldr	r3, [r5]
 	ldrb	r2, [r3, #19]	@ zero_extendqisi2
-.LVL1290:
-	.loc 2 1987 0
-	ldr	r3, .L1139+4
+	ldr	r3, .L1172+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1130
-	.loc 2 1987 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1139+8
+	cbz	r3, .L1163
+	ldr	r3, .L1172+8
 	ldr	r1, [r3]
-.LVL1291:
-	ldr	r3, .L1139+12
+	ldr	r3, .L1172+12
 	cmp	r1, r3
-	beq	.L1129
-.L1130:
-	.loc 2 1989 0 is_stmt 1
+	beq	.L1162
+.L1163:
 	subs	r3, r2, #5
 	uxtb	r3, r3
 	cmp	r3, #30
-	bhi	.L1131
-	ldr	r2, .L1139+16
-.LVL1292:
+	bhi	.L1164
+	ldr	r2, .L1172+16
 	lsr	r3, r2, r3
 	lsls	r3, r3, #31
-	bmi	.L1133
+	bmi	.L1166
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.LVL1293:
-.L1134:
-	.loc 2 1993 0
+.L1167:
 	ldrh	r2, [r10, r4, lsl #1]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1129
-	.loc 2 1994 0
+	bne	.L1162
 	mov	r2, #32768
 	movs	r1, #255
 	ldr	r0, [r8]
 	bl	ftl_memset
-.LVL1294:
-	.loc 2 2038 0
 	adds	r1, r4, r7
-	.loc 2 1991 0
 	adds	r4, r4, #1
-.LVL1295:
 	uxth	r4, r4
-	.loc 2 2038 0
 	movs	r3, #0
 	ldr	r2, [r8]
 	mov	r0, r6
 	bl	FlashProgPage
-.LVL1296:
-.L1135:
-	.loc 2 1991 0 discriminator 1
+.L1168:
 	ldr	r3, [r5]
 	ldrh	r3, [r3, #10]
 	cmp	r3, r4
-	bhi	.L1134
+	bhi	.L1167
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.LVL1297:
-.L1131:
-	.loc 2 1989 0
+.L1164:
 	cmp	r2, #68
-	bne	.L1129
-.LVL1298:
-.L1133:
-	.loc 2 1993 0 discriminator 1
-	ldr	r10, .L1139+20
-	.loc 2 1994 0 discriminator 1
-	ldr	r8, .L1139+24
-	b	.L1135
-.LVL1299:
-.L1129:
+	bne	.L1162
+.L1166:
+	ldr	r10, .L1172+20
+	ldr	r8, .L1172+24
+	b	.L1168
+.L1162:
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.LVL1300:
-.L1140:
+.L1173:
 	.align	2
-.L1139:
+.L1172:
 	.word	.LANCHOR18
 	.word	.LANCHOR8
-	.word	.LANCHOR151
+	.word	.LANCHOR29
 	.word	1446522928
 	.word	1073758215
-	.word	.LANCHOR117
-	.word	.LANCHOR150
-	.cfi_endproc
-.LFE247:
-	.size	FlashPageProgMsbFFData, .-FlashPageProgMsbFFData
-	.section	.text.ftl_memcmp,"ax",%progbits
-	.align	1
-	.global	ftl_memcmp
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_memcmp, %function
-ftl_memcmp:
-.LFB483:
-	.loc 7 47 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-.LVL1301:
-	.loc 7 48 0
-	b	memcmp
-.LVL1302:
-	.cfi_endproc
-.LFE483:
-	.size	ftl_memcmp, .-ftl_memcmp
-	.section	.text.rknand_get_clk_rate,"ax",%progbits
-	.align	1
-	.global	rknand_get_clk_rate
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	rknand_get_clk_rate, %function
-rknand_get_clk_rate:
-.LFB484:
-	.loc 7 52 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-.LVL1303:
-	.loc 7 54 0
-	ldr	r0, .L1143
-.LVL1304:
-	bx	lr
-.L1144:
-	.align	2
-.L1143:
-	.word	148000000
-	.cfi_endproc
-.LFE484:
-	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
-	.section	.text.ftl_malloc,"ax",%progbits
-	.align	1
-	.global	ftl_malloc
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_malloc, %function
-ftl_malloc:
-.LFB485:
-	.loc 7 57 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-.LVL1305:
-	.loc 7 58 0
-	movs	r1, #0
-	b	kmalloc
-.LVL1306:
-	.cfi_endproc
-.LFE485:
-	.size	ftl_malloc, .-ftl_malloc
-	.section	.text.NandcInit,"ax",%progbits
-	.align	1
-	.global	NandcInit
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	NandcInit, %function
-NandcInit:
-.LFB267:
-	.loc 3 16 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1307:
-	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 3 41 0
-	movs	r2, #1
-	ldr	r3, .L1148
-	movs	r1, #0
-	.loc 3 62 0
-	ldr	r4, .L1148+4
-	.loc 3 41 0
-	str	r2, [r3, #12]
-	movs	r2, #2
-	str	r2, [r3, #20]
-	movs	r2, #3
-	str	r2, [r3, #28]
-	.loc 3 45 0
-	ldr	r2, .L1148+8
-	.loc 3 42 0
-	stm	r3, {r0, r1}
-.LVL1308:
-	str	r0, [r3, #8]
-.LVL1309:
-	.loc 3 45 0
-	str	r0, [r2]
-	.loc 3 42 0
-	str	r0, [r3, #16]
-.LVL1310:
-	str	r0, [r3, #24]
-.LVL1311:
-	.loc 3 53 0
-	ldr	r3, [r0]
-	and	r3, r3, #253952
-.LVL1312:
-	.loc 3 62 0
-	ubfx	r5, r3, #13, #1
-	.loc 3 63 0
-	bfi	r3, r1, #13, #1
-	.loc 3 66 0
-	ldr	r1, [r0, #352]
-	.loc 3 65 0
-	orr	r3, r3, #256
-.LVL1313:
-	.loc 3 62 0
-	str	r5, [r4]
-	.loc 3 66 0
-	ldr	r4, .L1148+12
-	ubfx	r1, r1, #16, #4
-	.loc 3 67 0
-	ldr	r5, .L1148+16
-	.loc 3 66 0
-	str	r1, [r4]
-	.loc 3 67 0
-	ldr	r1, [r0, #352]
-	str	r1, [r5]
-	.loc 3 68 0
-	movw	r5, #2049
-	cmp	r1, r5
-	.loc 3 69 0
-	itt	eq
-	moveq	r1, #8
-	streq	r1, [r4]
-	.loc 3 71 0
-	movs	r4, #0
-.LVL1314:
-	.loc 3 70 0
-	str	r3, [r0]
-	.loc 3 101 0
-	mov	r0, #36864
-.LVL1315:
-	.loc 3 71 0
-	ldr	r3, [r2]
-.LVL1316:
-.LBB343:
-.LBB344:
-.LBB345:
-.LBB346:
-	.loc 3 379 0
-	movw	r2, #4225
-.LBE346:
-.LBE345:
-.LBE344:
-.LBE343:
-	.loc 3 71 0
-	str	r4, [r3, #336]
-.LVL1317:
-.LBB350:
-.LBB349:
-.LBB348:
-.LBB347:
-	.loc 3 379 0
-	str	r2, [r3, #4]
-.LVL1318:
-.LBE347:
-.LBE348:
-.LBE349:
-.LBE350:
-	.loc 3 74 0
-	movw	r2, #8322
-	str	r2, [r3, #344]
-	.loc 3 83 0
-	ldr	r2, .L1148+20
-	str	r2, [r3, #304]
-	.loc 3 101 0
-	bl	ftl_malloc
-.LVL1319:
-	ldr	r3, .L1148+24
-	str	r0, [r3]
-	.loc 3 102 0
-	ldr	r3, .L1148+28
-	str	r0, [r3]
-	.loc 3 103 0
-	add	r0, r0, #32768
-	str	r0, [r3, #4]
-	.loc 3 104 0
-	str	r4, [r3, #24]
-	.loc 3 106 0
-	ldr	r3, .L1148+32
-	str	r4, [r3]
-	pop	{r3, r4, r5, pc}
-.L1149:
-	.align	2
-.L1148:
-	.word	.LANCHOR6
-	.word	.LANCHOR152
-	.word	.LANCHOR19
-	.word	.LANCHOR33
-	.word	.LANCHOR151
-	.word	1710593
+	.word	.LANCHOR120
 	.word	.LANCHOR153
-	.word	.LANCHOR34
-	.word	.LANCHOR35
-	.cfi_endproc
-.LFE267:
-	.size	NandcInit, .-NandcInit
-	.section	.text.FtlMemInit,"ax",%progbits
+	.size	FlashPageProgMsbFFData, .-FlashPageProgMsbFFData
+	.section	.text.idb_write_data,"ax",%progbits
 	.align	1
-	.global	FtlMemInit
+	.global	idb_write_data
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlMemInit, %function
-FtlMemInit:
-.LFB297:
-	.loc 4 355 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
+	.type	idb_write_data, %function
+idb_write_data:
+	@ args = 0, pretend = 0, frame = 96
 	@ frame_needed = 0, uses_anonymous_args = 0
-	.loc 4 359 0
-	ldr	r3, .L1155
-	.loc 4 355 0
+	mov	r0, r1
+	mov	r1, r2
+	adds	r2, r0, r3
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 4 359 0
-	movs	r4, #0
-	.loc 4 377 0
-	ldr	r2, .L1155+4
-	.loc 4 399 0
-	movs	r6, #12
-	.loc 4 359 0
-	strh	r4, [r3]	@ movhi
-	.loc 4 360 0
-	ldr	r3, .L1155+8
-	.loc 4 398 0
-	ldr	r5, .L1155+12
-	.loc 4 400 0
-	ldr	r10, .L1155+296
-	.loc 4 360 0
-	str	r4, [r3]
-	.loc 4 361 0
-	ldr	r3, .L1155+16
-	.loc 4 398 0
-	ldrh	r0, [r5]
-	.loc 4 411 0
-	ldr	r8, .L1155+300
-	.loc 4 361 0
-	str	r4, [r3]
-	.loc 4 362 0
-	ldr	r3, .L1155+20
-	.loc 4 398 0
-	lsls	r0, r0, #1
-	.loc 4 423 0
-	ldr	fp, .L1155+304
-	.loc 4 362 0
-	str	r4, [r3]
-	.loc 4 363 0
-	ldr	r3, .L1155+24
-	str	r4, [r3]
-	.loc 4 364 0
-	ldr	r3, .L1155+28
-	str	r4, [r3]
-	.loc 4 365 0
-	ldr	r3, .L1155+32
-	str	r4, [r3]
-	.loc 4 366 0
-	ldr	r3, .L1155+36
-	str	r4, [r3]
-	.loc 4 367 0
-	ldr	r3, .L1155+40
-	str	r4, [r3]
-	.loc 4 368 0
-	ldr	r3, .L1155+44
-	str	r4, [r3]
-	.loc 4 369 0
-	ldr	r3, .L1155+48
-	str	r4, [r3]
-	.loc 4 370 0
-	ldr	r3, .L1155+52
-	str	r4, [r3]
-	.loc 4 371 0
-	ldr	r3, .L1155+56
-	str	r4, [r3]
-	.loc 4 372 0
-	ldr	r3, .L1155+60
-	str	r4, [r3]
-	.loc 4 373 0
-	ldr	r3, .L1155+64
-	str	r4, [r3]
-	.loc 4 374 0
-	ldr	r3, .L1155+68
-	str	r4, [r3]
-	.loc 4 375 0
-	ldr	r3, .L1155+72
-	str	r4, [r3]
-	.loc 4 376 0
-	ldr	r3, .L1155+76
-	str	r4, [r3]
-	.loc 4 377 0
-	movw	r3, #65535
-	str	r3, [r2]
-	.loc 4 378 0
-	ldr	r2, .L1155+80
-	str	r4, [r2]
-	.loc 4 379 0
-	ldr	r2, .L1155+84
-	str	r4, [r2]
-	.loc 4 380 0
-	ldr	r2, .L1155+88
+	cmp	r2, #63
+	sub	sp, sp, #104
+	bls	.L1175
+	cmp	r0, #576
+	bcs	.L1176
+	ldr	r2, .L1227
+	cmp	r0, #64
+	mov	r4, #1
 	str	r4, [r2]
-	.loc 4 381 0
-	ldr	r2, .L1155+92
-	strh	r3, [r2]	@ movhi
-	.loc 4 382 0
-	ldr	r2, .L1155+96
-	strh	r3, [r2]	@ movhi
-	.loc 4 383 0
-	movs	r2, #32
-	ldr	r3, .L1155+100
-	strh	r2, [r3]	@ movhi
-	.loc 4 384 0
-	movs	r2, #128
-	ldr	r3, .L1155+104
-	strh	r2, [r3]	@ movhi
-	.loc 4 385 0
-	ldr	r3, .L1155+108
-	strh	r4, [r3]	@ movhi
-	.loc 4 386 0
-	ldr	r3, .L1155+112
-	strh	r4, [r3]	@ movhi
-	.loc 4 387 0
-	ldr	r3, .L1155+116
-	strh	r4, [r3]	@ movhi
-	.loc 4 388 0
-	ldr	r3, .L1155+120
-	strh	r4, [r3]	@ movhi
-	.loc 4 398 0
-	bl	ftl_malloc
-.LVL1320:
-	ldr	r3, .L1155+124
-	str	r0, [r3]
-	.loc 4 399 0
-	ldrh	r0, [r5]
-	.loc 4 400 0
-	movs	r5, #36
-	.loc 4 399 0
-	muls	r0, r6, r0
-	bl	ftl_malloc
-.LVL1321:
-	ldr	r3, .L1155+128
-	str	r0, [r3]
-	.loc 4 400 0
-	ldrh	r3, [r10]
-	muls	r5, r3, r5
-.LVL1322:
-	.loc 4 401 0
-	lsls	r7, r5, #2
-	mov	r0, r7
-	bl	ftl_malloc
-.LVL1323:
-	ldr	r3, .L1155+132
-	str	r0, [r3]
-	.loc 4 402 0
-	mov	r0, r5
-	bl	ftl_malloc
-.LVL1324:
-	ldr	r3, .L1155+136
-	str	r0, [r3]
-	.loc 4 403 0
-	mov	r0, r7
-	bl	ftl_malloc
-.LVL1325:
-	ldr	r3, .L1155+140
-	.loc 4 410 0
-	ldr	r7, .L1155+144
-	.loc 4 403 0
-	str	r0, [r3]
-	.loc 4 404 0
-	mov	r0, r5
-	bl	ftl_malloc
-.LVL1326:
-	ldr	r3, .L1155+148
-	str	r0, [r3]
-	.loc 4 405 0
-	mov	r0, r5
-	bl	ftl_malloc
-.LVL1327:
-	ldr	r3, .L1155+152
-	.loc 4 410 0
-	ldrh	r5, [r7]
-.LVL1328:
-	.loc 4 405 0
-	str	r0, [r3]
-	.loc 4 411 0
-	ldrh	r3, [r10]
-	.loc 4 412 0
-	mov	r0, r5
-	.loc 4 411 0
-	lsls	r3, r3, #1
-	adds	r3, r3, #1
-	str	r3, [r8]
-	.loc 4 412 0
-	bl	ftl_malloc
-.LVL1329:
-	ldr	r3, .L1155+156
-	str	r0, [r3]
-	.loc 4 413 0
-	mov	r0, r5
-	bl	ftl_malloc
-.LVL1330:
-	ldr	r3, .L1155+160
-	str	r0, [r3]
-	.loc 4 414 0
-	mov	r0, r5
-	bl	ftl_malloc
-.LVL1331:
-	ldr	r3, .L1155+164
-	str	r0, [r3]
-	.loc 4 415 0
-	ldr	r0, [r8]
-	muls	r0, r5, r0
-	bl	ftl_malloc
-.LVL1332:
-	ldr	r3, .L1155+168
-	str	r0, [r3]
-	.loc 4 419 0
-	mov	r0, r5
-	bl	ftl_malloc
-.LVL1333:
-	ldr	r3, .L1155+172
-	str	r0, [r3]
-	.loc 4 420 0
-	mov	r0, r5
-	bl	ftl_malloc
-.LVL1334:
-	ldr	r3, .L1155+176
-	str	r0, [r3]
-	.loc 4 421 0
-	ldr	r0, [r8]
-	muls	r0, r6, r0
-	bl	ftl_malloc
-.LVL1335:
-	ldr	r3, .L1155+180
-	.loc 4 423 0
-	ldrh	r5, [r10]
-.LVL1336:
-	.loc 4 447 0
-	ldr	r10, .L1155+308
-	.loc 4 421 0
-	str	r0, [r3]
-	.loc 4 423 0
-	ldrh	r3, [fp]
-	muls	r5, r3, r5
-.LVL1337:
-	.loc 4 424 0
-	mov	r0, r5
-	bl	ftl_malloc
-.LVL1338:
-	ldr	r3, .L1155+184
-	str	r0, [r3]
-	.loc 4 425 0
-	lsls	r0, r5, #2
-	.loc 4 432 0
-	ldr	r5, .L1155+188
-.LVL1339:
-	.loc 4 425 0
-	bl	ftl_malloc
-.LVL1340:
-	ldr	r3, .L1155+192
-	str	r0, [r3]
-	.loc 4 426 0
-	ldrh	r3, [fp]
-	ldr	r0, [r8]
-	.loc 4 432 0
-	ldr	r8, .L1155+312
-	.loc 4 426 0
-	muls	r0, r3, r0
-	bl	ftl_malloc
-.LVL1341:
-	ldr	r3, .L1155+196
-	str	r0, [r3]
-	.loc 4 432 0
-	ldrh	r0, [r5]
-	lsls	r0, r0, #1
-	uxth	r0, r0
-	strh	r0, [r8]	@ movhi
-	.loc 4 433 0
-	bl	ftl_malloc
-.LVL1342:
-	ldr	r3, .L1155+200
-	str	r0, [r3]
-	.loc 4 434 0
-	ldrh	r3, [r8]
-	.loc 4 435 0
-	ldr	r0, .L1155+204
-	.loc 4 434 0
-	addw	r3, r3, #547
-	lsrs	r3, r3, #9
-	.loc 4 435 0
-	and	r0, r0, r3, lsl #9
-	.loc 4 434 0
-	strh	r3, [r8]	@ movhi
-	.loc 4 435 0
-	bl	ftl_malloc
-.LVL1343:
-	ldr	r3, .L1155+208
-	str	r0, [r3]
-	.loc 4 436 0
-	adds	r0, r0, #32
-	ldr	r3, .L1155+212
-	str	r0, [r3]
-.LVL1344:
-	.loc 4 442 0
-	ldrh	r0, [r5]
-	.loc 4 446 0
-	lsls	r0, r0, #1
-.LVL1345:
-	bl	ftl_malloc
-.LVL1346:
-	ldr	r3, .L1155+216
-	str	r0, [r3]
-.LVL1347:
-	.loc 4 447 0
-	ldr	r3, [r10]
-	lsl	r8, r3, #1
-.LVL1348:
-	.loc 4 448 0
-	mov	r0, r8
-	bl	ftl_malloc
-.LVL1349:
-	ldr	r3, .L1155+220
-	str	r0, [r3]
-	.loc 4 449 0
-	mov	r0, r8
-	bl	ftl_malloc
-.LVL1350:
-	ldr	r3, .L1155+224
-	.loc 4 451 0
-	ldr	r8, .L1155+316
-.LVL1351:
-	.loc 4 449 0
-	str	r0, [r3]
-	.loc 4 450 0
-	ldrh	r0, [r5]
-	lsrs	r0, r0, #3
-	adds	r0, r0, #4
-	bl	ftl_malloc
-.LVL1352:
-	ldr	r3, .L1155+228
-	str	r0, [r3]
-	.loc 4 451 0
-	ldrh	r0, [r8]
-	lsls	r0, r0, #1
-	bl	ftl_malloc
-.LVL1353:
-	ldr	r3, .L1155+232
-	str	r0, [r3]
-	.loc 4 452 0
-	ldrh	r0, [r8]
-	lsls	r0, r0, #1
-	bl	ftl_malloc
-.LVL1354:
-	ldr	r3, .L1155+236
-	str	r0, [r3]
-	.loc 4 453 0
-	ldrh	r0, [r8]
-	.loc 4 454 0
-	ldr	r8, .L1155+320
-	.loc 4 453 0
-	lsls	r0, r0, #2
-	bl	ftl_malloc
-.LVL1355:
-	ldr	r3, .L1155+240
-	str	r0, [r3]
-	.loc 4 454 0
-	ldrh	r0, [r8]
-	lsls	r0, r0, #2
-	bl	ftl_malloc
-.LVL1356:
-	.loc 4 455 0
-	ldrh	r2, [r8]
-	mov	r1, r4
-	.loc 4 454 0
-	ldr	r3, .L1155+244
-	.loc 4 455 0
-	lsls	r2, r2, #2
-	.loc 4 454 0
-	str	r0, [r3]
-	.loc 4 455 0
-	bl	ftl_memset
-.LVL1357:
-	.loc 4 457 0
-	ldr	r3, .L1155+248
-	ldrh	r4, [r3]
-	lsls	r4, r4, #2
-.LVL1358:
-	.loc 4 458 0
-	mov	r0, r4
-	bl	ftl_malloc
-.LVL1359:
-	ldr	r3, .L1155+252
-	str	r0, [r3]
-	.loc 4 459 0
-	mov	r0, r4
-	bl	ftl_malloc
-.LVL1360:
-	ldr	r3, .L1155+256
-	.loc 4 462 0
-	ldr	r4, .L1155+260
-.LVL1361:
-	.loc 4 459 0
-	str	r0, [r3]
-.LVL1362:
-	.loc 4 460 0
-	ldr	r0, [r10]
-	.loc 4 461 0
-	lsls	r0, r0, #2
-.LVL1363:
-	bl	ftl_malloc
-.LVL1364:
-	ldr	r3, .L1155+264
-	str	r0, [r3]
-.LVL1365:
-	.loc 4 462 0
-	ldrh	r0, [r4]
-	.loc 4 463 0
-	muls	r0, r6, r0
-.LVL1366:
-	.loc 4 469 0
-	ldr	r6, .L1155+268
-	.loc 4 463 0
-	bl	ftl_malloc
-.LVL1367:
-	ldr	r3, .L1155+272
-	str	r0, [r3]
-.LVL1368:
-	.loc 4 464 0
-	ldrh	r3, [r4]
-	ldrh	r0, [r7]
-	.loc 4 465 0
-	muls	r0, r3, r0
-.LVL1369:
-	bl	ftl_malloc
-.LVL1370:
-	ldr	r3, .L1155+276
-	str	r0, [r3]
-.LVL1371:
-	.loc 4 467 0
-	movs	r0, #6
-	.loc 4 466 0
-	ldrh	r3, [r5]
-	.loc 4 468 0
-	ldr	r5, .L1155+280
-	.loc 4 467 0
-	muls	r0, r3, r0
-.LVL1372:
-	bl	ftl_malloc
-.LVL1373:
-	ldr	r3, .L1155+284
-	str	r0, [r3]
-	.loc 4 468 0
-	ldr	r3, .L1155+288
-	ldrh	r0, [r3]
-	.loc 4 469 0
-	ldrh	r3, [r6]
-	.loc 4 468 0
-	adds	r0, r0, #31
-	asrs	r0, r0, #5
-	strh	r0, [r5]	@ movhi
-.LVL1374:
-	.loc 4 469 0
-	muls	r0, r3, r0
-.LVL1375:
-	.loc 4 470 0
-	lsls	r0, r0, #2
-.LVL1376:
-	bl	ftl_malloc
-.LVL1377:
-	.loc 4 473 0
-	ldrh	r1, [r5]
-	.loc 4 471 0
-	movs	r2, #1
-	.loc 4 470 0
-	ldr	r3, .L1155+292
-	.loc 4 471 0
-	ldrh	r6, [r6]
-	lsls	r1, r1, #2
-	.loc 4 470 0
-	mov	r4, r3
-	str	r0, [r4, #28]!
-.LVL1378:
-	.loc 4 471 0
+	bhi	.L1177
+	rsb	r0, r0, #64
+	subs	r2, r3, r0
+	add	r1, r1, r0, lsl #9
+	ldr	r0, .L1227+4
+	lsls	r2, r2, #9
+.L1226:
+	bl	ftl_memcpy
+.L1215:
+	movs	r0, #0
+	add	sp, sp, #104
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1177:
+	rsb	r2, r0, #576
+	subs	r0, r0, #64
+	cmp	r2, r3
+	it	cs
+	movcs	r2, r3
+	ldr	r3, .L1227+4
+	lsls	r2, r2, #9
+	add	r0, r3, r0, lsl #9
+	b	.L1226
+.L1175:
+	cmp	r0, #576
+	bcc	.L1215
+.L1176:
+	ldr	r3, .L1227
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L1215
+	ldr	r3, .L1227+8
+	ldr	r2, [r3]
+	ldrb	r3, [r2, #9]	@ zero_extendqisi2
+	ldrh	r2, [r2, #10]
+	smulbb	r3, r3, r2
+	uxth	r3, r3
+	mov	r1, r3
+	addw	r0, r3, #511
+	str	r3, [sp, #8]
+	bl	__aeabi_uidiv
+	ldr	r1, .L1227+4
+	movs	r3, #0
+	str	r0, [sp, #20]
+	movw	r2, #65535
 	mov	r0, r1
-	b	.L1156
-.L1157:
+.L1181:
+	ldr	r4, [r1, r2, lsl #2]
+	cbnz	r4, .L1179
+	ldr	r4, [r1, r3, lsl #2]
+	adds	r3, r3, #1
+	cmp	r3, #4096
+	it	hi
+	movhi	r3, #0
+	str	r4, [r1, r2, lsl #2]
+	subs	r2, r2, #1
+	cmp	r2, #4096
+	bne	.L1181
+.L1179:
+	ldr	r1, [r0, r2, lsl #2]
+	mov	r3, #512
+	ldr	r0, .L1227+12
+	bl	printf
+	ldr	r3, .L1227+16
+	ldr	r2, [sp, #8]
+	ldr	r3, [r3]
+	str	r3, [sp, #16]
+	ldr	r3, [sp, #20]
+	muls	r3, r2, r3
+	str	r3, [sp, #36]
+	ldr	r3, [sp, #16]
+	mul	r4, r3, r2
+	movs	r3, #0
+	str	r3, [sp, #12]
+.L1182:
+	ldr	r3, [sp, #16]
+	cmp	r3, #15
+	bls	.L1199
+	ldr	r3, [sp, #12]
+	cbnz	r3, .L1201
+	mov	r1, r3
+	ldr	r0, .L1227+20
+	bl	printf
+.L1201:
+	ldr	r3, .L1227
+	movs	r2, #0
+	str	r2, [r3]
+	b	.L1215
+.L1228:
 	.align	2
-.L1155:
-	.word	.LANCHOR136
-	.word	.LANCHOR170
+.L1227:
 	.word	.LANCHOR154
-	.word	.LANCHOR54
-	.word	.LANCHOR155
-	.word	.LANCHOR156
-	.word	.LANCHOR157
-	.word	.LANCHOR158
-	.word	.LANCHOR159
-	.word	.LANCHOR160
-	.word	.LANCHOR161
-	.word	.LANCHOR162
-	.word	.LANCHOR163
-	.word	.LANCHOR164
-	.word	.LANCHOR165
-	.word	.LANCHOR79
-	.word	.LANCHOR166
-	.word	.LANCHOR167
-	.word	.LANCHOR168
-	.word	.LANCHOR169
-	.word	.LANCHOR171
-	.word	.LANCHOR172
-	.word	.LANCHOR73
-	.word	.LANCHOR112
-	.word	.LANCHOR113
-	.word	.LANCHOR173
-	.word	.LANCHOR174
-	.word	.LANCHOR175
-	.word	.LANCHOR114
-	.word	.LANCHOR176
-	.word	.LANCHOR116
-	.word	.LANCHOR108
-	.word	.LANCHOR110
-	.word	.LANCHOR177
-	.word	.LANCHOR178
-	.word	.LANCHOR179
-	.word	.LANCHOR57
-	.word	.LANCHOR77
-	.word	.LANCHOR106
-	.word	.LANCHOR180
-	.word	.LANCHOR181
-	.word	.LANCHOR182
-	.word	.LANCHOR104
-	.word	.LANCHOR183
-	.word	.LANCHOR184
-	.word	.LANCHOR103
-	.word	.LANCHOR185
-	.word	.LANCHOR40
-	.word	.LANCHOR186
-	.word	.LANCHOR105
-	.word	.LANCHOR134
-	.word	33553920
-	.word	.LANCHOR188
-	.word	.LANCHOR78
-	.word	.LANCHOR83
-	.word	.LANCHOR126
-	.word	.LANCHOR122
-	.word	.LANCHOR0
-	.word	.LANCHOR71
-	.word	.LANCHOR189
-	.word	.LANCHOR190
-	.word	.LANCHOR191
-	.word	.LANCHOR66
-	.word	.LANCHOR128
-	.word	.LANCHOR192
-	.word	.LANCHOR67
-	.word	.LANCHOR127
-	.word	.LANCHOR44
-	.word	.LANCHOR96
-	.word	.LANCHOR123
-	.word	.LANCHOR120
-	.word	.LANCHOR81
-	.word	.LANCHOR50
-	.word	.LANCHOR74
-	.word	.LANCHOR37
-	.word	.LANCHOR107
-	.word	.LANCHOR58
-	.word	.LANCHOR64
-	.word	.LANCHOR187
-	.word	.LANCHOR61
-	.word	.LANCHOR62
-.L1156:
-.LVL1379:
-.L1151:
-	.loc 4 471 0 is_stmt 0 discriminator 1
-	cmp	r2, r6
-	bcc	.L1152
-	add	r3, r3, r2, lsl #2
-	ldr	r2, .L1158
-.LVL1380:
-	.loc 4 478 0 is_stmt 1
+	.word	idb_buf
+	.word	.LANCHOR18
+	.word	.LC15
+	.word	.LANCHOR149
+	.word	.LC17
+.L1199:
+	mov	r2, #512
 	movs	r1, #0
-	adds	r3, r3, #24
-.L1153:
-	.loc 4 476 0 discriminator 1
-	cmp	r3, r2
-	bne	.L1154
-	.loc 4 605 0
+	ldr	r0, .L1229
+	bl	memset
+	ldr	r3, .L1229+4
+	mov	r0, r4
+	ldr	r3, [r3]
+	ldrb	fp, [r3, #9]	@ zero_extendqisi2
+	ldrh	r5, [r3, #10]
+	bl	FW_FlashBlockErase.constprop.41
+	smulbb	r5, r5, fp
+	uxth	r5, r5
+	cmp	r5, #512
+	bcs	.L1183
+	adds	r0, r5, r4
+	bl	FW_FlashBlockErase.constprop.41
+.L1183:
+	ldr	r7, .L1229+8
+	mov	r1, r5
+	ldr	r10, .L1229+36
+	mov	r0, r4
+	bl	__aeabi_uidivmod
+	mov	r6, r1
+	subs	r3, r4, r1
+	str	r3, [sp, #24]
+.L1187:
+	lsrs	r2, r6, #2
+	beq	.L1184
+	ldr	r0, .L1229+12
+	adds	r1, r2, #1
+	ldr	r3, .L1229+16
+	ldrb	r0, [r0]	@ zero_extendqisi2
+	ldrh	r3, [r3, r1, lsl #1]
+	cbz	r0, .L1185
+	ldr	r0, [r10]
+	ldr	r5, .L1229+20
+	cmp	r0, r5
+	it	eq
+	moveq	r3, r1
+.L1185:
+	add	r3, r3, #1073741824
+	subs	r3, r3, #1
+	lsls	r3, r3, #2
+	str	r3, [sp, #40]
+.L1184:
+	movw	r3, #61424
+	str	r3, [sp, #44]
+	ldr	r3, .L1229+16
+	ldrh	r5, [r3, r2, lsl #1]
+	ldr	r3, .L1229+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L1186
+	ldr	r3, [r10]
+	ldr	r1, .L1229+20
+	cmp	r3, r1
+	it	eq
+	moveq	r5, r2
+.L1186:
+	ldr	r3, [sp, #24]
+	adds	r6, r6, #4
+	ldr	r2, .L1229+24
+	ldr	r8, .L1229+4
+	mla	r3, r5, fp, r3
+	adds	r5, r5, #1
+	uxth	r5, r5
+	str	r3, [sp, #32]
+	ldrb	r3, [r2]	@ zero_extendqisi2
+	ldr	r2, .L1229+28
+	str	r3, [sp, #28]
+	ldrb	r0, [r2]	@ zero_extendqisi2
+	bl	FlashBchSel
 	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1381:
-.L1152:
-	.loc 4 473 0 discriminator 3
-	ldr	r5, [r3, #28]
-	.loc 4 471 0 discriminator 3
-	adds	r2, r2, #1
-.LVL1382:
-	.loc 4 473 0 discriminator 3
-	add	r5, r5, r0
-	add	r0, r0, r1
-	str	r5, [r4, #4]!
-	b	.L1151
-.LVL1383:
-.L1154:
-	.loc 4 478 0 discriminator 2
-	str	r1, [r3, #4]!
-	b	.L1153
-.L1159:
-	.align	2
-.L1158:
-	.word	.LANCHOR74+56
-	.cfi_endproc
-.LFE297:
-	.size	FtlMemInit, .-FtlMemInit
-	.section	.text.ftl_free,"ax",%progbits
-	.align	1
-	.global	ftl_free
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_free, %function
-ftl_free:
-.LFB486:
-	.loc 7 62 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-.LVL1384:
-.LBB351:
-.LBB352:
-	.file 8 "include/linux/compat.h"
-	.loc 8 80 0
-	b	free
-.LVL1385:
-.LBE352:
-.LBE351:
-	.cfi_endproc
-.LFE486:
-	.size	ftl_free, .-ftl_free
-	.section	.text.StorageSysDataLoad,"ax",%progbits
-	.align	1
-	.global	StorageSysDataLoad
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	StorageSysDataLoad, %function
-StorageSysDataLoad:
-.LFB487:
-	.loc 7 67 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1386:
-	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 7 67 0
-	mov	r4, r1
+	bl	flash_boot_enter_slc_mode
+	ldr	r2, [r8]
+	ldr	r3, [sp, #32]
+	ldrb	r1, [r2, #9]	@ zero_extendqisi2
+	mov	r0, r3
+	bl	__aeabi_uidiv
+	add	r3, sp, #40
+	mov	r2, r7
+	mov	r1, r0
+	movs	r0, #0
+	bl	FlashProgPage
+	movs	r0, #0
+	add	r7, r7, #2048
+	bl	flash_boot_exit_slc_mode
+	ldr	r0, [sp, #28]
+	bl	FlashBchSel
+	mov	r1, fp
+	ldr	r0, [sp, #24]
+	bl	__aeabi_uidiv
+	mov	r2, r5
+	mov	r1, r0
+	movs	r0, #0
+	bl	FlashPageProgMsbFFData
+	ldr	r3, .L1229+32
+	cmp	r7, r3
+	bne	.L1187
+	ldr	r3, [r8]
+	mov	r0, r4
+	ldr	r7, .L1229
+	movs	r6, #0
+	ldrb	r8, [r3, #9]	@ zero_extendqisi2
+	ldrh	r1, [r3, #10]
+	smulbb	r1, r1, r8
+	uxth	r1, r1
+	bl	__aeabi_uidivmod
+	mul	r5, r8, r1
+	mov	r10, r1
+	subs	r3, r4, r1
+	str	r3, [sp, #28]
+	ubfx	r5, r5, #2, #2
+.L1188:
+	cmp	r6, #512
+	bcs	.L1195
+	ldr	r1, .L1229+12
+	rsb	r3, r5, #4
+	uxth	r3, r3
+	ldr	r2, .L1229+16
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	str	r3, [sp, #24]
+	add	r3, r10, r6
+	lsrs	r3, r3, #2
+	ldrh	r2, [r2, r3, lsl #1]
+	cbz	r1, .L1189
+	ldr	r1, .L1229+36
+	ldr	r0, .L1229+20
+	ldr	r1, [r1]
+	cmp	r1, r0
+	it	eq
+	moveq	r2, r3
+.L1189:
+	ldr	r3, [sp, #28]
+	add	r5, r5, r3
+	ldr	r3, .L1229+24
+	mla	r5, r2, r8, r5
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r3, [sp, #32]
+	ldr	r3, .L1229+4
+	ldr	r3, [r3]
+	ldrb	fp, [r3, #9]	@ zero_extendqisi2
+	ldr	r3, .L1229+40
+	ldrh	r2, [r3, #26]
+	ldr	r3, .L1229+44
+	ldr	r3, [r3]
+	muls	r3, r2, r3
+	mul	r3, fp, r3
+	cmp	r5, r3
+	bcs	.L1190
+	ldr	r3, .L1229+28
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	bl	FlashBchSel
+.L1190:
+	movs	r0, #0
+	bl	flash_boot_enter_slc_mode
+	mov	r1, fp
+	mov	r0, r5
+	bl	__aeabi_uidiv
+	add	r3, sp, #40
+	mov	r1, r0
+	mov	fp, r0
+	mov	r2, r7
+	movs	r0, #0
+	bl	FlashReadPage
+	adds	r3, r0, #1
+	mov	r5, r0
+	bne	.L1191
+	ldr	r3, .L1229+28
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #40
+	beq	.L1191
+	movs	r0, #40
+	bl	FlashBchSel
+	add	r3, sp, #40
+	mov	r2, r7
+	mov	r1, fp
+	movs	r0, #0
+	bl	FlashReadPage
 	mov	r5, r0
-	.loc 7 70 0
+.L1191:
+	movs	r0, #0
+	bl	flash_boot_exit_slc_mode
+	ldr	r0, [sp, #32]
+	bl	FlashBchSel
+	adds	r5, r5, #1
+	mov	r5, #-1
+	it	ne
+	movne	r5, #0
+	cbz	r5, .L1192
+.L1195:
+	ldr	r3, .L1229+8
+	movs	r5, #0
+	ldr	r6, .L1229
+.L1193:
+	mov	r7, r3
+	ldr	r1, [r6, r5, lsl #2]
+	ldr	r2, [r7]
+	adds	r3, r3, #4
+	cmp	r1, r2
+	beq	.L1196
 	mov	r2, #512
 	movs	r1, #0
-.LVL1387:
-	mov	r0, r4
-.LVL1388:
+	ldr	r0, .L1229
 	bl	memset
-.LVL1389:
-	.loc 7 71 0
-	mov	r3, r4
-	add	r1, r5, #256
-	movs	r2, #1
-	movs	r0, #16
-	.loc 7 73 0
-	pop	{r4, r5, r6, lr}
-	.cfi_restore 14
-	.cfi_restore 6
-	.cfi_restore 5
-	.cfi_restore 4
-	.cfi_def_cfa_offset 0
-.LVL1390:
-	.loc 7 71 0
-	b	FtlRead
-.LVL1391:
-	.cfi_endproc
-.LFE487:
-	.size	StorageSysDataLoad, .-StorageSysDataLoad
-	.section	.text.StorageSysDataStore,"ax",%progbits
+	str	r5, [sp]
+	mov	r1, r4
+	ldr	r3, [r7]
+	ldr	r2, [r6, r5, lsl #2]
+	ldr	r0, .L1229+48
+	bl	printf
+	mov	r0, r4
+	bl	FW_FlashBlockErase.constprop.41
+	ldr	r3, [sp, #20]
+	cmp	r3, #1
+	bls	.L1197
+	ldr	r3, [sp, #8]
+	adds	r0, r3, r4
+	bl	FW_FlashBlockErase.constprop.41
+.L1197:
+	ldr	r3, [sp, #16]
+	ldr	r2, [sp, #20]
+	add	r3, r3, r2
+	str	r3, [sp, #16]
+	ldr	r3, [sp, #36]
+	add	r4, r4, r3
+	b	.L1182
+.L1192:
+	ldr	r3, [sp, #24]
+	add	r6, r6, r3
+	add	r7, r7, r3, lsl #9
+	uxth	r6, r6
+	b	.L1188
+.L1196:
+	adds	r5, r5, #1
+	cmp	r5, #65536
+	bne	.L1193
+	ldr	r3, [sp, #12]
+	adds	r3, r3, #1
+	cmp	r3, #5
+	str	r3, [sp, #12]
+	bls	.L1197
+	b	.L1201
+.L1230:
+	.align	2
+.L1229:
+	.word	gp_flash_check_buf
+	.word	.LANCHOR18
+	.word	idb_buf
+	.word	.LANCHOR8
+	.word	.LANCHOR16
+	.word	1446522928
+	.word	.LANCHOR33
+	.word	.LANCHOR152
+	.word	idb_buf+262144
+	.word	.LANCHOR29
+	.word	.LANCHOR15
+	.word	.LANCHOR3
+	.word	.LC16
+	.size	idb_write_data, .-idb_write_data
+	.section	.text.ftl_memcmp,"ax",%progbits
 	.align	1
-	.global	StorageSysDataStore
+	.global	ftl_memcmp
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	StorageSysDataStore, %function
-StorageSysDataStore:
-.LFB488:
-	.loc 7 76 0
-	.cfi_startproc
+	.type	ftl_memcmp, %function
+ftl_memcmp:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL1392:
-	.loc 7 79 0
-	mov	r3, r1
-	movs	r2, #1
-	add	r1, r0, #256
-.LVL1393:
-	movs	r0, #16
-.LVL1394:
-	b	FtlWrite
-.LVL1395:
-	.cfi_endproc
-.LFE488:
-	.size	StorageSysDataStore, .-StorageSysDataStore
-	.section	.text.FlashBootVendorRead,"ax",%progbits
+	b	memcmp
+	.size	ftl_memcmp, .-ftl_memcmp
+	.section	.text.rknand_get_clk_rate,"ax",%progbits
 	.align	1
-	.global	FlashBootVendorRead
+	.global	rknand_get_clk_rate
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashBootVendorRead, %function
-FlashBootVendorRead:
-.LFB489:
-	.loc 7 84 0
-	.cfi_startproc
+	.type	rknand_get_clk_rate, %function
+rknand_get_clk_rate:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL1396:
-	.loc 7 87 0
-	mov	r3, r2
-	mov	r1, r0
-.LVL1397:
-	movs	r2, #1
-.LVL1398:
-	movs	r0, #16
-.LVL1399:
-	b	FtlRead
-.LVL1400:
-	.cfi_endproc
-.LFE489:
-	.size	FlashBootVendorRead, .-FlashBootVendorRead
-	.section	.text.FlashBootVendorWrite,"ax",%progbits
+	ldr	r0, .L1233
+	bx	lr
+.L1234:
+	.align	2
+.L1233:
+	.word	148000000
+	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
+	.section	.text.ftl_malloc,"ax",%progbits
 	.align	1
-	.global	FlashBootVendorWrite
+	.global	ftl_malloc
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashBootVendorWrite, %function
-FlashBootVendorWrite:
-.LFB490:
-	.loc 7 92 0
-	.cfi_startproc
+	.type	ftl_malloc, %function
+ftl_malloc:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL1401:
-	.loc 7 95 0
-	mov	r3, r2
-	mov	r1, r0
-.LVL1402:
-	movs	r2, #1
-.LVL1403:
-	movs	r0, #16
-.LVL1404:
-	b	FtlWrite
-.LVL1405:
-	.cfi_endproc
-.LFE490:
-	.size	FlashBootVendorWrite, .-FlashBootVendorWrite
-	.section	.text.FlashCs123Init,"ax",%progbits
+	movs	r1, #0
+	b	kmalloc
+	.size	ftl_malloc, .-ftl_malloc
+	.section	.text.NandcInit,"ax",%progbits
 	.align	1
-	.global	FlashCs123Init
+	.global	NandcInit
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashCs123Init, %function
-FlashCs123Init:
-.LFB491:
-	.loc 7 101 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	bx	lr
-	.cfi_endproc
-.LFE491:
-	.size	FlashCs123Init, .-FlashCs123Init
-	.section	.text.rk_nand_de_init,"ax",%progbits
-	.align	1
-	.global	rk_nand_de_init
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	rk_nand_de_init, %function
-rk_nand_de_init:
-.LFB493:
-	.loc 7 116 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	.loc 7 117 0
-	b	FlashDeInit
-.LVL1406:
-	.cfi_endproc
-.LFE493:
-	.size	rk_nand_de_init, .-rk_nand_de_init
-	.section	.text.rk_ftl_get_capacity,"ax",%progbits
-	.align	1
-	.global	rk_ftl_get_capacity
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	rk_ftl_get_capacity, %function
-rk_ftl_get_capacity:
-.LFB495:
-	.loc 7 128 0
-	.cfi_startproc
+	.type	NandcInit, %function
+NandcInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	.loc 7 130 0
-	ldr	r3, .L1168
-	ldr	r0, [r3]
-	bx	lr
-.L1169:
+	push	{r3, r4, r5, lr}
+	movs	r2, #1
+	ldr	r3, .L1238
+	movs	r4, #0
+	ldr	r5, .L1238+4
+	str	r2, [r3, #12]
+	movs	r2, #2
+	str	r2, [r3, #20]
+	movs	r2, #3
+	stm	r3, {r0, r4}
+	str	r0, [r3, #8]
+	str	r0, [r3, #16]
+	str	r2, [r3, #28]
+	str	r0, [r3, #24]
+	ldr	r3, .L1238+8
+	ldr	r2, .L1238+12
+	str	r0, [r3]
+	ldr	r3, [r0]
+	and	r3, r3, #253952
+	ubfx	r1, r3, #13, #1
+	bfi	r3, r4, #13, #1
+	str	r1, [r2]
+	orr	r3, r3, #256
+	ldr	r2, [r0, #352]
+	ldr	r1, .L1238+16
+	ubfx	r2, r2, #16, #4
+	str	r2, [r1]
+	ldr	r2, [r0, #352]
+	str	r2, [r5]
+	movw	r5, #2049
+	cmp	r2, r5
+	itt	eq
+	moveq	r2, #8
+	streq	r2, [r1]
+	str	r3, [r0]
+	movw	r3, #4225
+	str	r4, [r0, #336]
+	str	r3, [r0, #4]
+	movw	r3, #8322
+	str	r3, [r0, #344]
+	ldr	r3, .L1238+20
+	str	r3, [r0, #304]
+	mov	r0, #36864
+	bl	ftl_malloc
+	ldr	r3, .L1238+24
+	str	r0, [r3]
+	ldr	r3, .L1238+28
+	str	r0, [r3]
+	add	r0, r0, #32768
+	str	r0, [r3, #4]
+	str	r4, [r3, #24]
+	ldr	r3, .L1238+32
+	str	r4, [r3]
+	pop	{r3, r4, r5, pc}
+.L1239:
 	.align	2
-.L1168:
-	.word	.LANCHOR68
-	.cfi_endproc
-.LFE495:
-	.size	rk_ftl_get_capacity, .-rk_ftl_get_capacity
-	.section	.text.rknand_print_hex,"ax",%progbits
+.L1238:
+	.word	.LANCHOR6
+	.word	.LANCHOR29
+	.word	.LANCHOR19
+	.word	.LANCHOR155
+	.word	.LANCHOR34
+	.word	1710593
+	.word	.LANCHOR156
+	.word	.LANCHOR35
+	.word	.LANCHOR36
+	.size	NandcInit, .-NandcInit
+	.section	.text.FtlMemInit,"ax",%progbits
 	.align	1
-	.global	rknand_print_hex
+	.global	FtlMemInit
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	rknand_print_hex, %function
-rknand_print_hex:
-.LFB496:
-	.loc 7 133 0
-	.cfi_startproc
+	.type	FtlMemInit, %function
+FtlMemInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1407:
+	ldr	r3, .L1245
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 7 141 0
-	movs	r5, #0
-	.loc 7 154 0
-	ldr	r7, .L1179
-	.loc 7 133 0
-	mov	fp, r0
-	mov	r6, r1
-	mov	r8, r2
-	mov	r10, r3
-	.loc 7 142 0
-	mov	r4, r5
-.LVL1408:
-.L1171:
-	.loc 7 142 0 is_stmt 0 discriminator 1
-	cmp	r4, r10
-	bne	.L1177
-	.loc 7 162 0 is_stmt 1
-	ldr	r1, .L1179+4
-	ldr	r0, .L1179+8
-	.loc 7 164 0
-	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_remember_state
-	.cfi_restore 14
-	.cfi_restore 11
-	.cfi_restore 10
-	.cfi_restore 8
-	.cfi_restore 7
-	.cfi_restore 6
-	.cfi_restore 5
-	.cfi_restore 4
-	.cfi_def_cfa_offset 0
-.LVL1409:
-	.loc 7 162 0
-	b	printf
-.LVL1410:
-.L1177:
-	.cfi_restore_state
-	.loc 7 144 0
-	cbnz	r5, .L1172
-	.loc 7 146 0
-	mov	r2, r4
-	mov	r1, fp
-	ldr	r0, .L1179+12
-	bl	printf
-.LVL1411:
-.L1172:
-	.loc 7 149 0
-	cmp	r8, #4
-	bne	.L1173
-	.loc 7 150 0
-	ldr	r1, [r6, r4, lsl #2]
-.L1178:
-	.loc 7 154 0
+	movs	r4, #0
+	ldr	r2, .L1245+4
+	movs	r6, #12
+	strh	r4, [r3]	@ movhi
+	ldr	r3, .L1245+8
+	ldr	r5, .L1245+12
+	ldr	r10, .L1245+304
+	str	r4, [r3]
+	ldr	r3, .L1245+16
+	ldr	r8, .L1245+308
+	ldr	fp, .L1245+312
+	str	r4, [r3]
+	ldr	r3, .L1245+20
+	str	r4, [r3]
+	ldr	r3, .L1245+24
+	str	r4, [r3]
+	ldr	r3, .L1245+28
+	str	r4, [r3]
+	ldr	r3, .L1245+32
+	str	r4, [r3]
+	ldr	r3, .L1245+36
+	str	r4, [r3]
+	ldr	r3, .L1245+40
+	str	r4, [r3]
+	ldr	r3, .L1245+44
+	str	r4, [r3]
+	ldr	r3, .L1245+48
+	str	r4, [r3]
+	ldr	r3, .L1245+52
+	str	r4, [r3]
+	ldr	r3, .L1245+56
+	str	r4, [r3]
+	ldr	r3, .L1245+60
+	str	r4, [r3]
+	ldr	r3, .L1245+64
+	str	r4, [r3]
+	ldr	r3, .L1245+68
+	str	r4, [r3]
+	ldr	r3, .L1245+72
+	str	r4, [r3]
+	ldr	r3, .L1245+76
+	str	r4, [r3]
+	movw	r3, #65535
+	str	r3, [r2]
+	ldr	r2, .L1245+80
+	str	r4, [r2]
+	ldr	r2, .L1245+84
+	str	r4, [r2]
+	ldr	r2, .L1245+88
+	str	r4, [r2]
+	ldr	r2, .L1245+92
+	strh	r3, [r2]	@ movhi
+	ldr	r2, .L1245+96
+	strh	r3, [r2]	@ movhi
+	ldr	r2, .L1245+100
+	strh	r3, [r2]	@ movhi
+	ldr	r2, .L1245+104
+	strh	r3, [r2]	@ movhi
+	movs	r2, #32
+	ldr	r3, .L1245+108
+	strh	r2, [r3]	@ movhi
+	movs	r2, #128
+	ldr	r3, .L1245+112
+	strh	r2, [r3]	@ movhi
+	ldr	r3, .L1245+116
+	strh	r4, [r3]	@ movhi
+	ldr	r3, .L1245+120
+	strh	r4, [r3]	@ movhi
+	ldr	r3, .L1245+124
+	strh	r4, [r3]	@ movhi
+	ldr	r3, .L1245+128
+	strh	r4, [r3]	@ movhi
+	ldrh	r0, [r5]
+	lsls	r0, r0, #1
+	bl	ftl_malloc
+	ldr	r3, .L1245+132
+	str	r0, [r3]
+	ldrh	r0, [r5]
+	movs	r5, #36
+	muls	r0, r6, r0
+	bl	ftl_malloc
+	ldr	r3, .L1245+136
+	str	r0, [r3]
+	ldrh	r3, [r10]
+	muls	r5, r3, r5
+	lsls	r7, r5, #2
 	mov	r0, r7
-	.loc 7 156 0
-	adds	r5, r5, #1
-.LVL1412:
-	.loc 7 154 0
-	bl	printf
-.LVL1413:
-	.loc 7 156 0
-	cmp	r5, #15
-	bls	.L1176
-.LVL1414:
-	.loc 7 158 0
-	movs	r5, #0
-	.loc 7 159 0
-	ldr	r1, .L1179+4
-	ldr	r0, .L1179+8
-	bl	printf
-.LVL1415:
-.L1176:
-	.loc 7 142 0 discriminator 2
-	adds	r4, r4, #1
-.LVL1416:
-	b	.L1171
-.L1173:
-	.loc 7 151 0
-	cmp	r8, #2
-	.loc 7 152 0
-	ite	eq
-	ldrsheq	r1, [r6, r4, lsl #1]
-	.loc 7 154 0
-	ldrbne	r1, [r6, r4]	@ zero_extendqisi2
-	b	.L1178
-.L1180:
-	.align	2
-.L1179:
-	.word	.LC17
-	.word	.LC18
-	.word	.LC8
-	.word	.LC16
-	.cfi_endproc
-.LFE496:
-	.size	rknand_print_hex, .-rknand_print_hex
-	.section	.text.HynixGetReadRetryDefault,"ax",%progbits
-	.align	1
-	.global	HynixGetReadRetryDefault
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	HynixGetReadRetryDefault, %function
-HynixGetReadRetryDefault:
-.LFB236:
-	.loc 2 1362 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 64
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1417:
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 1377 0
-	movs	r3, #172
-	.loc 2 1375 0
-	ldr	r5, .L1278
-	.loc 2 1379 0
-	cmp	r0, #2
-	.loc 2 1377 0
-	mov	r1, #173
-	mov	r2, #174
-	.loc 2 1362 0
-	sub	sp, sp, #64
-	.cfi_def_cfa_offset 96
-	.loc 2 1362 0
-	mov	r4, r0
-	.loc 2 1377 0
-	strb	r3, [r5, #4]
-	mov	r3, #175
-	.loc 2 1375 0
-	strb	r0, [r5]
-.LVL1418:
-	.loc 2 1377 0
-	strb	r1, [r5, #5]
-.LVL1419:
-	strb	r2, [r5, #6]
-.LVL1420:
-	strb	r3, [r5, #7]
-.LVL1421:
-	.loc 2 1379 0
-	bne	.L1182
-	.loc 2 1380 0
-	movs	r3, #167
-	.loc 2 1381 0
-	movs	r2, #247
-	.loc 2 1380 0
-	strb	r3, [r5, #4]
-	.loc 2 1381 0
-	ldr	r3, .L1278+4
-	strb	r2, [r3, #17]
-.L1238:
-	.loc 2 1368 0
-	mov	r10, #7
-	b	.L1273
-.L1182:
-	.loc 2 1382 0
-	cmp	r0, #3
-	bne	.L1184
-.LVL1422:
-	.loc 2 1388 0 discriminator 1
-	movs	r3, #176
-	strb	r3, [r5, #4]
-.LVL1423:
-	movs	r3, #177
-	strb	r3, [r5, #5]
-.LVL1424:
-	movs	r3, #178
-	strb	r3, [r5, #6]
-.LVL1425:
-	movs	r3, #179
-	strb	r3, [r5, #7]
-.LVL1426:
-	movs	r3, #180
-	strb	r3, [r5, #8]
-.LVL1427:
-	movs	r3, #181
-	strb	r3, [r5, #9]
-.LVL1428:
-	movs	r3, #182
-	strb	r3, [r5, #10]
-.LVL1429:
-	movs	r3, #183
-.LVL1430:
-.L1274:
-	.loc 2 1392 0
-	mov	r10, #8
-	.loc 2 1400 0
-	strb	r3, [r5, #11]
-	.loc 2 1391 0
-	mov	fp, r10
-.L1183:
-.LVL1431:
-	.loc 2 1426 0
-	subs	r3, r4, #1
-	cmp	r3, #1
-	bhi	.L1188
-	mov	r8, #0
-.LVL1432:
-.L1189:
-	.loc 2 1427 0 discriminator 1
-	ldr	r3, .L1278+8
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	uxtb	r3, r8
-	cmp	r2, r3
-	bhi	.L1195
-.LVL1433:
-.L1196:
-	.loc 2 1600 0
-	ldr	r3, .L1278
-	strb	fp, [r3, #1]
-	.loc 2 1601 0
-	strb	r10, [r3, #2]
-	.loc 2 1602 0
-	add	sp, sp, #64
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1434:
-.L1184:
-	.cfi_restore_state
-	.loc 2 1389 0
-	cmp	r0, #4
-	bne	.L1185
-.LVL1435:
-	.loc 2 1393 0
-	movs	r0, #204
-.LVL1436:
-	.loc 2 1398 0
-	strb	r1, [r5, #9]
-	.loc 2 1393 0
-	strb	r0, [r5, #4]
-	.loc 2 1394 0
-	movs	r0, #191
-	strb	r0, [r5, #5]
-	.loc 2 1395 0
-	movs	r0, #170
-	strb	r0, [r5, #6]
-	.loc 2 1396 0
-	movs	r0, #171
-	strb	r0, [r5, #7]
-	.loc 2 1397 0
-	movs	r0, #205
-	strb	r0, [r5, #8]
-	.loc 2 1399 0
-	strb	r2, [r5, #10]
-	b	.L1274
-.LVL1437:
-.L1185:
-	.loc 2 1401 0
-	cmp	r0, #5
-	bne	.L1186
-.LVL1438:
-	.loc 2 1405 0
-	movs	r3, #56
-	.loc 2 1404 0
-	mov	r10, #8
-	.loc 2 1405 0
-	strb	r3, [r5, #4]
-	.loc 2 1406 0
-	movs	r3, #57
-	strb	r3, [r5, #5]
-	.loc 2 1407 0
-	movs	r3, #58
-	strb	r3, [r5, #6]
-	.loc 2 1408 0
-	movs	r3, #59
-	strb	r3, [r5, #7]
-.LVL1439:
-.L1273:
-	.loc 2 1367 0
-	mov	fp, #4
-	b	.L1183
-.LVL1440:
-.L1186:
-	.loc 2 1409 0
-	cmp	r0, #6
-	bne	.L1187
-.LVL1441:
-	.loc 2 1413 0
-	movs	r3, #14
-	.loc 2 1412 0
-	mov	r10, #12
-	.loc 2 1413 0
-	strb	r3, [r5, #4]
-	.loc 2 1414 0
-	movs	r3, #15
-	strb	r3, [r5, #5]
-	.loc 2 1415 0
-	movs	r3, #16
-	strb	r3, [r5, #6]
-	.loc 2 1416 0
-	movs	r3, #17
-	strb	r3, [r5, #7]
-	b	.L1273
-.LVL1442:
-.L1187:
-	.loc 2 1417 0
-	cmp	r0, #7
-	bne	.L1238
-.LVL1443:
-	.loc 2 1421 0 discriminator 1
-	movs	r3, #176
-	.loc 2 1419 0 discriminator 1
-	mov	r10, #12
-	.loc 2 1421 0 discriminator 1
-	strb	r3, [r5, #4]
-.LVL1444:
-	movs	r3, #177
-	strb	r3, [r5, #5]
-.LVL1445:
-	movs	r3, #178
-	strb	r3, [r5, #6]
-.LVL1446:
-	movs	r3, #179
-	strb	r3, [r5, #7]
-.LVL1447:
-	movs	r3, #180
-	strb	r3, [r5, #8]
-.LVL1448:
-	movs	r3, #181
-	strb	r3, [r5, #9]
-.LVL1449:
-	movs	r3, #182
-	strb	r3, [r5, #10]
-.LVL1450:
-	movs	r3, #183
-	strb	r3, [r5, #11]
-.LVL1451:
-	.loc 2 1422 0 discriminator 1
-	movs	r3, #212
-	strb	r3, [r5, #12]
-	.loc 2 1423 0 discriminator 1
-	movs	r3, #213
-	strb	r3, [r5, #13]
-	.loc 2 1418 0 discriminator 1
-	mov	fp, #10
-	b	.L1183
-.LVL1452:
-.L1195:
-.LBB353:
-	.loc 2 1429 0
-	ldr	r2, .L1278+12
-.LBB354:
-.LBB355:
-	.loc 3 126 0
-	movs	r6, #0
-.LBE355:
-.LBE354:
-	.loc 2 1429 0
-	ldrb	r2, [r2, r3]	@ zero_extendqisi2
-.LVL1453:
-.LBB359:
-.LBB356:
-	.loc 3 123 0
-	ldr	r3, .L1278+16
-	ldr	r7, [r3, r2, lsl #3]
-.LBE356:
-.LBE359:
-	.loc 2 1430 0
-	add	r4, r5, r2, lsl #6
-.LBB360:
-.LBB357:
-	.loc 3 124 0
-	add	r3, r3, r2, lsl #3
-.LBE357:
-.LBE360:
-	.loc 2 1434 0
-	movs	r2, #55
-.LVL1454:
-	.loc 2 1430 0
-	adds	r4, r4, #20
-.LVL1455:
-	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-.LVL1456:
-	.loc 2 1434 0
-	add	r7, r7, r3, lsl #8
-	addw	r3, r7, #2056
-.LVL1457:
-.L1190:
-	.loc 2 1435 0 discriminator 3
-	adds	r1, r5, r6
-	.loc 2 1434 0 discriminator 3
-	str	r2, [r3]
-	.loc 2 1435 0 discriminator 3
-	ldrb	r1, [r1, #4]	@ zero_extendqisi2
-.LBB361:
-.LBB362:
-	.loc 3 306 0 discriminator 3
-	movs	r0, #80
-.LBE362:
-.LBE361:
-	.loc 2 1434 0 discriminator 3
-	str	r2, [sp, #4]
-	str	r3, [sp]
-	.loc 2 1435 0 discriminator 3
-	str	r1, [r7, #2052]
-.LVL1458:
-.LBB364:
-.LBB363:
-	.loc 3 306 0 discriminator 3
-	bl	udelay
-.LVL1459:
-.LBE363:
-.LBE364:
-	.loc 2 1437 0 discriminator 3
-	ldr	r1, [r7, #2048]
-	.loc 2 1433 0 discriminator 3
-	ldr	r3, [sp]
-	ldr	r2, [sp, #4]
-	.loc 2 1437 0 discriminator 3
-	strb	r1, [r4, r6]
-.LVL1460:
-	adds	r6, r6, #1
-.LVL1461:
-	.loc 2 1433 0 discriminator 3
-	uxtb	r1, r6
-	cmp	fp, r1
-	bhi	.L1190
-	.loc 2 1442 0
-	ldr	r7, .L1278+4
-	mov	r1, r4
-	.loc 2 1433 0
-	movs	r2, #0
-.L1193:
-.LVL1462:
-.LBB365:
-.LBB358:
-	.loc 3 126 0
-	movs	r3, #1
-.LBE358:
-.LBE365:
-	.loc 2 1442 0
-	adds	r6, r7, r2
-.LVL1463:
-.L1192:
-	.loc 2 1442 0 is_stmt 0 discriminator 3
-	ldrb	r0, [r6, r3, lsl #2]	@ zero_extendqisi2
-	ldrb	ip, [r1]	@ zero_extendqisi2
-	add	r0, r0, ip
-	strb	r0, [r1, r3, lsl #3]
-	.loc 2 1441 0 is_stmt 1 discriminator 3
-	adds	r3, r3, #1
-.LVL1464:
-	cmp	r3, #7
-	bne	.L1192
-.LVL1465:
-	adds	r2, r2, #1
-.LVL1466:
-	adds	r1, r1, #1
-	.loc 2 1440 0 discriminator 2
-	cmp	r2, #4
-	bne	.L1193
-	.loc 2 1445 0 discriminator 2
-	movs	r3, #0
-.LVL1467:
-	add	r8, r8, #1
-.LVL1468:
-	strb	r3, [r4, #16]
-	.loc 2 1446 0 discriminator 2
-	strb	r3, [r4, #24]
-	.loc 2 1447 0 discriminator 2
-	strb	r3, [r4, #32]
-	.loc 2 1448 0 discriminator 2
-	strb	r3, [r4, #40]
-	.loc 2 1449 0 discriminator 2
-	strb	r3, [r4, #48]
-	.loc 2 1451 0 discriminator 2
-	strb	r3, [r4, #41]
-	.loc 2 1452 0 discriminator 2
-	strb	r3, [r4, #49]
-	b	.L1189
-.LVL1469:
-.L1188:
-.LBE353:
-	.loc 2 1454 0
-	subs	r3, r4, #3
-	cmp	r3, #4
-	bhi	.L1196
-.LBB366:
-.LBB367:
-	.loc 2 1534 0 discriminator 1
-	smulbb	r3, r10, fp
-	.loc 2 1506 0 discriminator 1
-	ldr	r8, .L1278+24
-	.loc 2 1534 0 discriminator 1
-	asrs	r2, r3, #2
-	.loc 2 1536 0 discriminator 1
-	lsls	r3, r3, #4
-	str	r3, [sp, #56]
-	lsls	r3, r2, #3
-	.loc 2 1534 0 discriminator 1
-	str	r2, [sp, #8]
-	str	r3, [sp, #48]
-	lsls	r3, r2, #2
-	str	r3, [sp, #24]
-	.loc 2 1536 0 discriminator 1
-	movs	r3, #0
-	str	r3, [sp, #20]
-.L1197:
-	ldrb	r3, [sp, #20]	@ zero_extendqisi2
-	str	r3, [sp, #12]
-.LVL1470:
-.LBE367:
-	.loc 2 1457 0 discriminator 1
-	ldr	r3, .L1278+8
-	ldr	r2, [sp, #12]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, r2
-	bls	.L1196
-.LBB377:
-	.loc 2 1460 0
-	ldr	r2, [sp, #12]
-	ldr	r3, .L1278+12
-	ldrb	r7, [r3, r2]	@ zero_extendqisi2
-.LVL1471:
-.LBB368:
-.LBB369:
-	.loc 3 123 0
-	ldr	r3, .L1278+16
-.LBE369:
-.LBE368:
-	.loc 2 1464 0
-	mov	r0, r7
-.LBB371:
-.LBB370:
-	.loc 3 123 0
-	ldr	r2, [r3, r7, lsl #3]
-	.loc 3 124 0
-	add	r3, r3, r7, lsl #3
-	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-	.loc 3 123 0
-	str	r2, [sp]
-.LVL1472:
-	str	r3, [sp, #4]
-.LVL1473:
-.LBE370:
-.LBE371:
-	.loc 2 1463 0
-	mov	r3, r2
-	ldr	r2, [sp, #4]
-	add	r3, r3, r2, lsl #8
-	movs	r2, #255
-	str	r2, [r3, #2056]
-	.loc 2 1464 0
-	bl	NandcWaitFlashReady
-.LVL1474:
-	ldr	r1, .L1278
-	.loc 2 1465 0
-	cmp	r4, #7
-	.loc 2 1466 0
-	it	eq
-	moveq	r3, #160
-	.loc 2 1468 0
-	ldr	r2, [sp, #4]
-	.loc 2 1466 0
-	itete	eq
-	mlaeq	r1, r3, r7, r1
-	.loc 2 1461 0
-	addne	r1, r1, r7, lsl #6
-	.loc 2 1466 0
-	addeq	r3, r1, #28
-	.loc 2 1461 0
-	addne	r3, r1, #20
-	.loc 2 1466 0
-	str	r3, [sp, #28]
-.LVL1475:
-	.loc 2 1469 0
-	cmp	r4, #4
-	.loc 2 1468 0
-	ldr	r3, [sp]
-.LVL1476:
-	add	r3, r3, r2, lsl #8
-	mov	r2, #54
-	str	r2, [r3, #2056]
-	.loc 2 1469 0
-	bne	.L1200
-	.loc 2 1470 0
-	movs	r2, #255
-	str	r2, [r3, #2052]
-	.loc 2 1471 0
-	movs	r2, #64
-	str	r2, [r3, #2048]
-	.loc 2 1472 0
-	movs	r2, #204
-.L1276:
-	.loc 2 1480 0
-	str	r2, [r3, #2052]
-.LVL1477:
-	.loc 2 1481 0
-	movs	r2, #77
-	b	.L1277
-.LVL1478:
-.L1200:
-	.loc 2 1474 0
-	subs	r2, r4, #5
-	cmp	r2, #1
-	bhi	.L1202
-	.loc 2 1475 0
-	ldr	r2, .L1278
-	ldrb	r2, [r2, #4]	@ zero_extendqisi2
-	str	r2, [r3, #2052]
-	.loc 2 1476 0
-	movs	r2, #82
-.LVL1479:
-.L1277:
-	.loc 2 1481 0
-	str	r2, [r3, #2048]
-	.loc 2 1490 0
-	cmp	r4, #6
-	.loc 2 1483 0
-	ldr	r3, [sp]
-	.loc 2 1497 0
+	bl	ftl_malloc
+	ldr	r3, .L1245+140
+	str	r0, [r3]
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L1245+144
+	str	r0, [r3]
 	mov	r0, r7
-	.loc 2 1483 0
-	ldr	r2, [sp, #4]
-	add	r5, r3, r2, lsl #8
-	mov	r3, #22
-	str	r3, [r5, #2056]
-	.loc 2 1484 0
-	mov	r3, #23
-	str	r3, [r5, #2056]
-	.loc 2 1485 0
-	mov	r3, #4
-	str	r3, [r5, #2056]
-	.loc 2 1486 0
-	mov	r3, #25
-	str	r3, [r5, #2056]
-	.loc 2 1487 0
-	mov	r3, #0
-	str	r3, [r5, #2056]
-	.loc 2 1488 0
-	str	r3, [r5, #2052]
-	.loc 2 1489 0
-	str	r3, [r5, #2052]
-	.loc 2 1491 0
-	it	eq
-	moveq	r3, #31
-	.loc 2 1493 0
-	str	r3, [r5, #2052]
-	.loc 2 1494 0
-	movs	r3, #2
-	str	r3, [r5, #2052]
-	.loc 2 1495 0
-	movs	r3, #0
-	str	r3, [r5, #2052]
-	.loc 2 1496 0
-	ldr	r2, [sp, #4]
-	ldr	r3, [sp]
-	add	r3, r3, r2, lsl #8
-	movs	r2, #48
-	str	r2, [r3, #2056]
-	.loc 2 1497 0
-	bl	NandcWaitFlashReady
-.LVL1480:
-	.loc 2 1501 0
-	subs	r3, r4, #5
-	cmp	r3, #1
-	str	r3, [sp, #32]
-	bls	.L1239
-	.loc 2 1500 0
-	cmp	r4, #7
-	ite	eq
-	moveq	r2, #32
-	movne	r2, #2
-.L1205:
-.LVL1481:
-	.loc 2 1506 0
-	ldr	r3, [r8]
-.LVL1482:
-	subs	r2, r2, #1
-.LVL1483:
-	subs	r1, r3, #1
-	uxtab	r2, r3, r2
-	mov	r0, r1
-.LVL1484:
-.L1206:
-	.loc 2 1508 0 discriminator 3
-	ldr	r6, [r5, #2048]
-	strb	r6, [r0, #1]!
-.LVL1485:
-	.loc 2 1507 0 discriminator 3
-	cmp	r0, r2
-	bne	.L1206
-	.loc 2 1511 0
-	cmp	r4, #7
-	bne	.L1207
-	movs	r2, #0
-.LVL1486:
-.L1209:
-	.loc 2 1513 0
-	ldrb	r0, [r3, r2, lsl #2]	@ zero_extendqisi2
-	uxtb	r1, r2
-.LVL1487:
-	cmp	r0, #12
-	beq	.L1208
-	.loc 2 1515 0
-	add	r0, r3, r2, lsl #2
-	ldrb	r0, [r0, #1]	@ zero_extendqisi2
-	cmp	r0, #10
-	beq	.L1208
-.LVL1488:
-	adds	r2, r2, #1
-.LVL1489:
-	.loc 2 1512 0 discriminator 2
-	cmp	r2, #8
-	bne	.L1209
-.LVL1490:
-.L1210:
-	.loc 2 1519 0
-	movs	r1, #0
-	ldr	r0, .L1278+20
-	bl	printf
-.LVL1491:
-.L1212:
-	b	.L1212
-.LVL1492:
-.L1202:
-	.loc 2 1478 0
-	movs	r2, #174
-	str	r2, [r3, #2052]
-	.loc 2 1479 0
-	movs	r2, #0
-	str	r2, [r3, #2048]
-	.loc 2 1480 0
-	movs	r2, #176
-	b	.L1276
-.LVL1493:
-.L1239:
-	.loc 2 1502 0
-	movs	r2, #16
-	b	.L1205
-.L1279:
-	.align	2
-.L1278:
-	.word	.LANCHOR20
-	.word	.LANCHOR193
-	.word	.LANCHOR25
-	.word	.LANCHOR26
-	.word	.LANCHOR6
-	.word	.LC19
-	.word	.LANCHOR144
-.LVL1494:
-.L1208:
-	.loc 2 1518 0
-	cmp	r1, #6
-	bhi	.L1210
-.LVL1495:
-.L1211:
-	.loc 2 1535 0
-	ldr	lr, [r8]
-.LVL1496:
-	.loc 2 1536 0
-	mov	r3, lr
-.LVL1497:
-.L1216:
-	.loc 2 1536 0 is_stmt 0 discriminator 1
-	ldr	r1, [sp, #56]
-	sub	r2, r3, lr
-.LVL1498:
-	cmp	r2, r1
-	blt	.L1217
-.LVL1499:
-	ldr	r3, [r8]
-	ldr	r2, [sp, #24]
-	adds	r1, r3, r2
-	.loc 2 1539 0 is_stmt 1
-	movs	r3, #8
-.LVL1500:
-.L1219:
-	mov	r6, r1
-.LBB372:
-	.loc 2 1542 0
-	movs	r0, #0
-.LVL1501:
-.L1218:
-	.loc 2 1543 0 discriminator 3
-	ldr	r2, [r6]
-	.loc 2 1542 0 discriminator 3
-	adds	r0, r0, #1
-.LVL1502:
-	.loc 2 1543 0 discriminator 3
-	mvns	r2, r2
-	str	r2, [r6], #4
-	.loc 2 1542 0 discriminator 3
-	ldr	r2, [sp, #8]
-	cmp	r2, r0
-	bgt	.L1218
-.LVL1503:
-	ldr	r2, [sp, #48]
-.LBE372:
-	.loc 2 1540 0 discriminator 2
-	subs	r3, r3, #1
-.LVL1504:
-	add	r1, r1, r2
-	bne	.L1219
-.LVL1505:
-.L1225:
-	lsls	r2, r3, #2
-	lsls	r1, r3, #2
-	str	r2, [sp, #60]
-	ldr	r2, [r8]
-	str	r2, [sp, #44]
-	add	r2, r2, r1
-.LBB373:
-.LBB374:
-	.loc 2 1555 0
-	movs	r1, #0
-	str	r2, [sp, #52]
-	mov	r2, r1
-.LVL1506:
-.L1224:
-	.loc 2 1553 0
-	movs	r0, #1
-	ldr	ip, [sp, #52]
-	lsls	r0, r0, r2
-	str	r0, [sp, #36]
-.LVL1507:
-	movs	r0, #16
-.LVL1508:
-	str	r0, [sp, #40]
-	.loc 2 1552 0
-	movs	r0, #0
-	str	r0, [sp, #16]
-.LVL1509:
-.L1222:
-	.loc 2 1555 0
-	ldr	r6, [sp, #36]
-	mov	r0, r6
-	ldr	r6, [ip]
-	bics	r0, r0, r6
-	ldr	r6, [sp, #24]
-	.loc 2 1556 0
-	it	eq
-	ldreq	r0, [sp, #16]
-	add	ip, ip, r6
-	itt	eq
-	addeq	r0, r0, #1
-	streq	r0, [sp, #16]
-.LVL1510:
-	.loc 2 1554 0
-	ldr	r0, [sp, #40]
-	subs	r0, r0, #1
-	str	r0, [sp, #40]
-.LVL1511:
-	bne	.L1222
-	.loc 2 1558 0
-	ldr	r0, [sp, #16]
-.LVL1512:
-.LBE374:
-	.loc 2 1551 0
-	adds	r2, r2, #1
-.LVL1513:
-.LBB375:
-	.loc 2 1558 0
-	cmp	r0, #8
-	.loc 2 1559 0
-	itt	hi
-	ldrhi	r0, [sp, #36]
-	orrhi	r1, r1, r0
-.LVL1514:
-.LBE375:
-	.loc 2 1551 0
-	cmp	r2, #32
-	bne	.L1224
-	.loc 2 1561 0 discriminator 2
-	ldr	r2, [sp, #44]
-.LVL1515:
-.LBE373:
-	.loc 2 1546 0 discriminator 2
-	adds	r3, r3, #1
-.LVL1516:
-.LBB376:
-	.loc 2 1561 0 discriminator 2
-	ldr	r0, [sp, #60]
-	str	r1, [r2, r0]
-.LBE376:
-	.loc 2 1546 0 discriminator 2
-	ldr	r2, [sp, #8]
-	cmp	r2, r3
-	bgt	.L1225
-	.loc 2 1566 0
-	ldr	r1, [r8]
-.LVL1517:
-	movs	r3, #0
-.LVL1518:
-	subs	r2, r1, #4
-	add	r0, r1, #28
-.LVL1519:
-.L1228:
-	ldr	r6, [r2, #4]!
-	cbnz	r6, .L1227
-	.loc 2 1567 0
-	adds	r3, r3, #1
-.LVL1520:
-.L1227:
-	.loc 2 1565 0 discriminator 2
-	cmp	r0, r2
-	bne	.L1228
-	.loc 2 1569 0
-	cmp	r3, #7
-	ble	.L1229
-	.loc 2 1570 0
-	ldr	r0, .L1280
-	mov	r3, #1024
-.LVL1521:
-	movs	r2, #1
-	bl	rknand_print_hex
-.LVL1522:
-	.loc 2 1571 0
-	movs	r1, #0
-	ldr	r0, .L1280+4
-	bl	printf
-.LVL1523:
-.L1230:
-	b	.L1230
-.LVL1524:
-.L1207:
-	.loc 2 1522 0
-	cmp	r4, #6
-	bne	.L1211
-	adds	r3, r3, #7
-.LVL1525:
-.L1213:
-	.loc 2 1524 0
-	ldrb	r2, [r1, #1]!	@ zero_extendqisi2
-.LVL1526:
-	cmp	r2, #12
-	beq	.L1211
-	.loc 2 1526 0
-	ldrb	r2, [r1, #8]	@ zero_extendqisi2
-	cmp	r2, #4
-	beq	.L1211
-.LVL1527:
-	.loc 2 1523 0 discriminator 2
-	cmp	r1, r3
-	bne	.L1213
-	.loc 2 1530 0
-	movs	r1, #0
-.LVL1528:
-	ldr	r0, .L1280+4
-	bl	printf
-.LVL1529:
-.L1215:
-	b	.L1215
-.LVL1530:
-.L1217:
-	.loc 2 1537 0 discriminator 3
-	ldr	r2, [r5, #2048]
-	strb	r2, [r3], #1
-	b	.L1216
-.LVL1531:
-.L1229:
-	.loc 2 1576 0
-	cmp	r4, #6
-	beq	.L1241
-	.loc 2 1575 0
-	cmp	r4, #7
-	ite	eq
-	moveq	ip, #10
-	movne	ip, #8
-.L1231:
-.LVL1532:
-	add	r3, fp, #-1
-.LVL1533:
-	ldr	r1, [sp, #28]
-	uxtb	r3, r3
-	.loc 2 1580 0
-	movs	r0, #0
-	adds	r3, r3, #1
-	str	r3, [sp, #16]
-.LVL1534:
-.L1232:
-	.loc 2 1579 0
-	mov	r3, r1
-	mov	r2, lr
-.LVL1535:
-.L1233:
-	.loc 2 1582 0 discriminator 3
-	ldrb	r6, [r2], #1	@ zero_extendqisi2
-.LVL1536:
-	strb	r6, [r3], #1
-.LVL1537:
-	.loc 2 1581 0 discriminator 3
-	sub	r6, r2, lr
-	uxtb	r6, r6
-	cmp	fp, r6
-	bhi	.L1233
-	ldr	r3, [sp, #16]
-	.loc 2 1580 0 discriminator 2
-	adds	r0, r0, #1
-.LVL1538:
-	cmp	r10, r0
-	add	r1, r1, ip
-	add	lr, lr, r3
-.LVL1539:
-	bgt	.L1232
-	.loc 2 1586 0
-	ldr	r3, [sp]
-	.loc 2 1587 0
-	mov	r0, r7
-.LVL1540:
-	.loc 2 1586 0
-	ldr	r2, [sp, #4]
-	add	r6, r3, r2, lsl #8
-	movs	r3, #255
-	str	r3, [r6, #2056]
-	.loc 2 1587 0
-	bl	NandcWaitFlashReady
-.LVL1541:
-	.loc 2 1588 0
-	ldr	r3, [sp, #32]
-	cmp	r3, #1
-	bhi	.L1235
-	.loc 2 1589 0
-	movs	r3, #54
-	.loc 2 1593 0
-	mov	r1, #-1
-	.loc 2 1589 0
-	str	r3, [r6, #2056]
-	.loc 2 1590 0
-	ldr	r3, .L1280+8
-	.loc 2 1593 0
-	ldr	r0, [sp, #12]
-	.loc 2 1590 0
-	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-	str	r3, [r5, #2052]
-	.loc 2 1591 0
-	movs	r3, #0
-	str	r3, [r5, #2048]
-	.loc 2 1592 0
-	movs	r3, #22
-	str	r3, [r6, #2056]
-	.loc 2 1593 0
-	bl	FlashReadCmd
-.LVL1542:
-.L1236:
-	.loc 2 1597 0 discriminator 2
-	mov	r0, r7
-	bl	NandcWaitFlashReady
-.LVL1543:
-	ldr	r3, [sp, #20]
+	bl	ftl_malloc
+	ldr	r3, .L1245+148
+	ldr	r7, .L1245+152
+	str	r0, [r3]
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L1245+156
+	str	r0, [r3]
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L1245+160
+	ldrh	r5, [r7]
+	str	r0, [r3]
+	ldrh	r3, [r10]
+	mov	r0, r5
+	lsls	r3, r3, #1
 	adds	r3, r3, #1
-	str	r3, [sp, #20]
-.LVL1544:
-	b	.L1197
-.LVL1545:
-.L1241:
-	.loc 2 1577 0
-	mov	ip, #4
-	b	.L1231
-.LVL1546:
-.L1235:
-	.loc 2 1595 0
-	movs	r3, #56
-	str	r3, [r6, #2056]
-	b	.L1236
-.L1281:
-	.align	2
-.L1280:
-	.word	.LC20
-	.word	.LC19
-	.word	.LANCHOR20
-.LBE377:
-.LBE366:
-	.cfi_endproc
-.LFE236:
-	.size	HynixGetReadRetryDefault, .-HynixGetReadRetryDefault
-	.section	.text.FlashGetReadRetryDefault,"ax",%progbits
-	.align	1
-	.global	FlashGetReadRetryDefault
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FlashGetReadRetryDefault, %function
-FlashGetReadRetryDefault:
-.LFB237:
-	.loc 2 1674 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-.LVL1547:
-	.loc 2 1675 0
-	mov	r3, r0
-	cbz	r0, .L1282
-	.loc 2 1677 0
-	subs	r2, r0, #1
-	cmp	r2, #6
-	bhi	.L1284
-	.loc 2 1678 0
-	b	HynixGetReadRetryDefault
-.LVL1548:
-.L1284:
-	.loc 2 1679 0
-	cmp	r0, #49
-	bne	.L1285
-	.loc 2 1680 0
-	ldr	r0, .L1305
-.LVL1549:
-	.loc 2 1683 0
-	movs	r2, #64
-	ldr	r1, .L1305+4
-	.loc 2 1680 0
-	strb	r3, [r0]
-	.loc 2 1681 0
-	movs	r3, #4
-.LVL1550:
-	strb	r3, [r0, #1]
-	.loc 2 1682 0
-	movs	r3, #15
-	strb	r3, [r0, #2]
-.L1303:
-.LBB380:
-.LBB381:
-	.loc 2 1701 0
-	adds	r0, r0, #4
-	b	ftl_memcpy
-.LVL1551:
-.L1285:
-.LBE381:
-.LBE380:
-	.loc 2 1684 0
-	cmp	r0, #33
-	beq	.L1286
-	.loc 2 1684 0 is_stmt 0 discriminator 1
-	sub	r2, r0, #65
-	cmp	r2, #1
-	bhi	.L1287
-.L1286:
-	.loc 2 1686 0 is_stmt 1
-	ldr	r0, .L1305
-.LVL1552:
-	strb	r3, [r0]
-	.loc 2 1687 0
-	movs	r3, #4
-.LVL1553:
-.L1304:
-.LBB383:
-.LBB382:
-	.loc 2 1693 0
-	strb	r3, [r0, #1]
-	.loc 2 1694 0
-	movs	r3, #7
-	strb	r3, [r0, #2]
-	.loc 2 1695 0
-	movs	r2, #45
-	ldr	r1, .L1305+8
-	b	.L1303
-.LVL1554:
-.L1287:
-	.loc 2 1690 0
-	cmp	r0, #34
-	beq	.L1288
-	cmp	r0, #67
-	bne	.L1289
-.L1288:
-	.loc 2 1692 0
-	ldr	r0, .L1305
-.LVL1555:
-	strb	r3, [r0]
-	.loc 2 1693 0
-	movs	r3, #5
-.LVL1556:
-	b	.L1304
-.LVL1557:
-.L1289:
-	.loc 2 1696 0
-	cmp	r0, #35
-	beq	.L1290
-	cmp	r0, #68
-	bne	.L1282
-.L1290:
-	.loc 2 1698 0
-	ldr	r0, .L1305
-.LVL1558:
-	.loc 2 1701 0
-	movs	r2, #95
-	ldr	r1, .L1305+12
-	.loc 2 1698 0
-	strb	r3, [r0]
-	.loc 2 1699 0
-	movs	r3, #5
-.LVL1559:
-	strb	r3, [r0, #1]
-	.loc 2 1700 0
-	movs	r3, #17
-	strb	r3, [r0, #2]
-	b	.L1303
-.LVL1560:
-.L1282:
-	bx	lr
-.L1306:
-	.align	2
-.L1305:
-	.word	.LANCHOR20
-	.word	.LANCHOR14
-	.word	.LANCHOR9
-	.word	.LANCHOR11
-.LBE382:
-.LBE383:
-	.cfi_endproc
-.LFE237:
-	.size	FlashGetReadRetryDefault, .-FlashGetReadRetryDefault
-	.section	.text.FlashInit,"ax",%progbits
-	.align	1
-	.global	FlashInit
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FlashInit, %function
-FlashInit:
-.LFB252:
-	.loc 2 2193 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 16
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1561:
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	mov	r4, r0
-	sub	sp, sp, #32
-	.cfi_def_cfa_offset 64
-	.loc 2 2199 0
-	mov	r0, #32768
-.LVL1562:
-	.loc 2 2207 0
-	movs	r5, #0
-	.loc 2 2199 0
+	str	r3, [r8]
 	bl	ftl_malloc
-.LVL1563:
-	ldr	r3, .L1399
-	.loc 2 2205 0
-	ldr	r10, .L1399+132
-	.loc 2 2211 0
-	ldr	r8, .L1399+136
-	.loc 2 2199 0
+	ldr	r3, .L1245+164
 	str	r0, [r3]
-	.loc 2 2200 0
-	mov	r0, #32768
+	mov	r0, r5
 	bl	ftl_malloc
-.LVL1564:
-	ldr	r3, .L1399+4
-	.loc 2 2213 0
-	ldr	r6, .L1399+8
-	.loc 2 2209 0
-	ldr	r7, .L1399+12
-	.loc 2 2200 0
+	ldr	r3, .L1245+168
 	str	r0, [r3]
-	.loc 2 2201 0
-	mov	r0, #4096
+	mov	r0, r5
 	bl	ftl_malloc
-.LVL1565:
-	ldr	r3, .L1399+16
+	ldr	r3, .L1245+172
 	str	r0, [r3]
-	.loc 2 2202 0
-	mov	r0, #32768
+	ldr	r0, [r8]
+	muls	r0, r5, r0
 	bl	ftl_malloc
-.LVL1566:
-	ldr	r3, .L1399+20
+	ldr	r3, .L1245+176
 	str	r0, [r3]
-	.loc 2 2203 0
-	mov	r0, #4096
+	mov	r0, r5
 	bl	ftl_malloc
-.LVL1567:
-	ldr	r3, .L1399+24
-	.loc 2 2206 0
-	ldr	r2, .L1399+28
-	.loc 2 2211 0
-	strb	r5, [r8]
-	.loc 2 2203 0
+	ldr	r3, .L1245+180
+	str	r0, [r3]
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L1245+184
+	str	r0, [r3]
+	ldr	r0, [r8]
+	muls	r0, r6, r0
+	bl	ftl_malloc
+	ldr	r3, .L1245+188
+	ldrh	r5, [r10]
+	ldr	r10, .L1245+316
+	str	r0, [r3]
+	ldrh	r3, [fp]
+	muls	r5, r3, r5
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L1245+192
+	str	r0, [r3]
+	lsls	r0, r5, #2
+	ldr	r5, .L1245+196
+	bl	ftl_malloc
+	ldr	r3, .L1245+200
+	str	r0, [r3]
+	ldrh	r3, [fp]
+	ldr	r0, [r8]
+	ldr	r8, .L1245+320
+	muls	r0, r3, r0
+	bl	ftl_malloc
+	ldr	r3, .L1245+204
+	str	r0, [r3]
+	ldrh	r0, [r5]
+	lsls	r0, r0, #1
+	uxth	r0, r0
+	strh	r0, [r8]	@ movhi
+	bl	ftl_malloc
+	ldr	r3, .L1245+208
+	str	r0, [r3]
+	ldrh	r3, [r8]
+	ldr	r0, .L1245+212
+	addw	r3, r3, #547
+	lsrs	r3, r3, #9
+	and	r0, r0, r3, lsl #9
+	strh	r3, [r8]	@ movhi
+	bl	ftl_malloc
+	ldr	r3, .L1245+216
+	str	r0, [r3]
+	adds	r0, r0, #32
+	ldr	r3, .L1245+220
+	str	r0, [r3]
+	ldrh	r0, [r5]
+	lsls	r0, r0, #1
+	bl	ftl_malloc
+	ldr	r3, .L1245+224
+	str	r0, [r3]
+	ldr	r3, [r10]
+	lsl	r8, r3, #1
+	mov	r0, r8
+	bl	ftl_malloc
+	ldr	r3, .L1245+228
+	str	r0, [r3]
+	mov	r0, r8
+	bl	ftl_malloc
+	ldr	r3, .L1245+232
+	ldr	r8, .L1245+324
+	str	r0, [r3]
+	ldrh	r0, [r5]
+	lsrs	r0, r0, #3
+	adds	r0, r0, #4
+	bl	ftl_malloc
+	ldr	r3, .L1245+236
+	str	r0, [r3]
+	ldrh	r0, [r8]
+	lsls	r0, r0, #1
+	bl	ftl_malloc
+	ldr	r3, .L1245+240
+	str	r0, [r3]
+	ldrh	r0, [r8]
+	lsls	r0, r0, #1
+	bl	ftl_malloc
+	ldr	r3, .L1245+244
+	str	r0, [r3]
+	ldrh	r0, [r8]
+	ldr	r8, .L1245+328
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L1245+248
+	str	r0, [r3]
+	ldrh	r0, [r8]
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldrh	r2, [r8]
+	mov	r1, r4
+	ldr	r3, .L1245+252
+	lsls	r2, r2, #2
 	str	r0, [r3]
-	.loc 2 2205 0
-	movs	r3, #50
-	strb	r3, [r10]
-	.loc 2 2215 0
-	mov	r0, r4
-	.loc 2 2206 0
-	strb	r3, [r2]
-	.loc 2 2208 0
-	movs	r2, #128
-	.loc 2 2207 0
-	ldr	r3, .L1399+32
-	ldr	r4, .L1399+36
-.LVL1568:
-	.loc 2 2209 0
-	strb	r5, [r7]
-	.loc 2 2207 0
-	str	r5, [r3]
-	.loc 2 2208 0
-	ldr	r3, .L1399+40
-	str	r2, [r3]
-	.loc 2 2210 0
-	ldr	r3, .L1399+44
-	str	r5, [r3]
-	.loc 2 2213 0
-	movs	r3, #60
-	strb	r3, [r6]
-	.loc 2 2215 0
-	bl	NandcInit
-.LVL1569:
-	str	r10, [sp, #20]
-.LBB392:
-.LBB393:
-.LBB394:
-.LBB395:
-	.loc 3 123 0
-	ldr	r10, .L1399+140
-	str	r8, [sp, #16]
-	mov	r8, r6
-	mov	r6, r4
-.LVL1570:
-.L1312:
-.LBE395:
-.LBE394:
-.LBE393:
-.LBE392:
-	.loc 2 2217 0
-	uxtb	fp, r5
-.LVL1571:
-.LBB405:
-.LBB404:
-	.loc 2 282 0
-	mov	r0, fp
-	bl	FlashReset
-.LVL1572:
-.LBB398:
-.LBB396:
-	.loc 3 124 0
-	add	r1, r10, r5, lsl #3
-	.loc 3 123 0
-	ldr	r3, [r10, r5, lsl #3]
-.LBE396:
-.LBE398:
-	.loc 2 284 0
-	mov	r0, fp
-	ldrb	r1, [r1, #4]	@ zero_extendqisi2
-.LBB399:
-.LBB397:
-	.loc 3 123 0
-	str	r3, [sp, #28]
-.LVL1573:
-	str	r1, [sp, #24]
-.LVL1574:
-.LBE397:
-.LBE399:
-	.loc 2 284 0
-	bl	NandcFlashCs
-.LVL1575:
-	.loc 2 285 0
-	ldr	r1, [sp, #24]
-.LBB400:
-.LBB401:
-	.loc 3 306 0
-	movs	r0, #200
-.LBE401:
-.LBE400:
-	.loc 2 285 0
-	ldr	r3, [sp, #28]
-	add	r3, r3, r1, lsl #8
-	movs	r1, #144
-	str	r1, [r3, #2056]
-	.loc 2 286 0
-	movs	r1, #0
-	str	r1, [r3, #2052]
-	str	r3, [sp, #24]
-.LVL1576:
-.LBB403:
-.LBB402:
-	.loc 3 306 0
-	bl	udelay
-.LVL1577:
-.LBE402:
-.LBE403:
-	.loc 2 288 0
-	ldr	r3, [sp, #24]
-	.loc 2 296 0
-	mov	r0, fp
-	.loc 2 288 0
-	ldr	r1, [r3, #2048]
-	strb	r1, [r4]
-	.loc 2 289 0
-	ldr	r1, [r3, #2048]
-	strb	r1, [r4, #1]
-	.loc 2 290 0
-	ldr	r1, [r3, #2048]
-	strb	r1, [r4, #2]
-	.loc 2 291 0
-	ldr	r1, [r3, #2048]
-	strb	r1, [r4, #3]
-	.loc 2 292 0
-	ldr	r1, [r3, #2048]
-	strb	r1, [r4, #4]
-	.loc 2 293 0
-	ldr	r3, [r3, #2048]
-	strb	r3, [r4, #5]
-	.loc 2 296 0
-	bl	NandcFlashDeCs
-.LVL1578:
-	.loc 2 297 0
-	ldrb	r2, [r4]	@ zero_extendqisi2
-	subs	r3, r2, #1
-	uxtb	r3, r3
-	cmp	r3, #253
-	bhi	.L1308
-	.loc 2 298 0
-	ldrb	r1, [r4, #5]	@ zero_extendqisi2
-	ldrb	r3, [r4, #1]	@ zero_extendqisi2
-	ldr	r0, .L1399+48
-	str	r1, [sp, #12]
-	ldrb	r1, [r4, #4]	@ zero_extendqisi2
-	str	r1, [sp, #8]
-	ldrb	r1, [r4, #3]	@ zero_extendqisi2
-	str	r1, [sp, #4]
-	ldrb	r1, [r4, #2]	@ zero_extendqisi2
-	str	r1, [sp]
-	adds	r1, r5, #1
-	bl	printf
-.LVL1579:
-.L1308:
-.LBE404:
-.LBE405:
-	.loc 2 2218 0
-	cbnz	r5, .L1309
-	.loc 2 2219 0
-	ldrb	r3, [r6]	@ zero_extendqisi2
-	subs	r3, r3, #1
-	uxtb	r3, r3
-	cmp	r3, #253
-	bhi	.L1352
-	.loc 2 2219 0 is_stmt 0 discriminator 1
-	ldrb	r3, [r6, #1]	@ zero_extendqisi2
-	cmp	r3, #255
-	beq	.L1352
-.L1309:
-	.loc 2 2223 0 is_stmt 1
-	ldrb	r3, [r4]	@ zero_extendqisi2
-	.loc 2 2216 0
-	adds	r5, r5, #1
-.LVL1580:
-	adds	r4, r4, #8
-.LVL1581:
-	.loc 2 2223 0
-	cmp	r3, #181
-	.loc 2 2224 0
-	itt	eq
-	moveq	r3, #44
-	strbeq	r3, [r4, #-8]
-	.loc 2 2216 0
-	cmp	r5, #4
-	bne	.L1312
-	.loc 2 2234 0
-	ldrb	r3, [r6]	@ zero_extendqisi2
-	cmp	r3, #173
-	beq	.L1313
-	.loc 2 2235 0
-	ldr	r3, .L1399+52
-	ldr	r0, [r3]
-	bl	NandcSetDdrMode
-.LVL1582:
-.L1313:
-	.loc 2 2242 0
-	mov	r2, #852
-	movs	r1, #0
-	ldr	r0, .L1399+56
 	bl	ftl_memset
-.LVL1583:
-	.loc 2 2243 0
-	ldr	r4, .L1399+60
-.LVL1584:
-	ldr	r3, .L1399+64
-	.loc 2 2244 0
-	ldr	r5, .L1399+68
-.LVL1585:
-	.loc 2 2243 0
-	str	r3, [r4]
-	.loc 2 2244 0
-	movs	r3, #0
-	strb	r3, [r5]
-	.loc 2 2246 0
-	ldrb	r3, [r6, #1]	@ zero_extendqisi2
-	cmp	r3, #161
-	beq	.L1314
-	.loc 2 2246 0 is_stmt 0 discriminator 2
-	cmp	r3, #218
-	beq	.L1314
-	.loc 2 2246 0 discriminator 3
-	and	r2, r3, #223
-	cmp	r2, #209
-	beq	.L1314
-	.loc 2 2247 0 is_stmt 1
-	cmp	r3, #220
-	bne	.L1315
-	.loc 2 2247 0 is_stmt 0 discriminator 1
-	ldrb	r2, [r6, #3]	@ zero_extendqisi2
-	cmp	r2, #149
-	bne	.L1315
-.L1314:
-	.loc 2 2248 0 is_stmt 1
-	ldr	r1, [sp, #16]
+	ldr	r3, .L1245+256
+	ldrh	r4, [r3]
+	lsls	r4, r4, #2
+	mov	r0, r4
+	bl	ftl_malloc
+	ldr	r3, .L1245+260
+	str	r0, [r3]
+	mov	r0, r4
+	bl	ftl_malloc
+	ldr	r3, .L1245+264
+	ldr	r4, .L1245+268
+	str	r0, [r3]
+	ldr	r0, [r10]
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L1245+272
+	str	r0, [r3]
+	ldrh	r0, [r4]
+	muls	r0, r6, r0
+	ldr	r6, .L1245+276
+	bl	ftl_malloc
+	ldr	r3, .L1245+280
+	str	r0, [r3]
+	ldrh	r3, [r4]
+	ldrh	r0, [r7]
+	muls	r0, r3, r0
+	bl	ftl_malloc
+	ldr	r3, .L1245+284
+	str	r0, [r3]
+	movs	r0, #6
+	ldrh	r3, [r5]
+	ldr	r5, .L1245+288
+	muls	r0, r3, r0
+	bl	ftl_malloc
+	ldr	r3, .L1245+292
+	str	r0, [r3]
+	ldr	r3, .L1245+296
+	ldrh	r0, [r3]
+	ldrh	r3, [r6]
+	adds	r0, r0, #31
+	asrs	r0, r0, #5
+	strh	r0, [r5]	@ movhi
+	muls	r0, r3, r0
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldrh	r1, [r5]
 	movs	r2, #1
-	strb	r2, [r1]
-	.loc 2 2249 0
-	movs	r2, #16
-	ldr	r1, [sp, #20]
-	.loc 2 2250 0
-	strb	r2, [r8]
-	.loc 2 2249 0
-	strb	r2, [r1]
-	.loc 2 2251 0
-	ldrb	r1, [r6]	@ zero_extendqisi2
-	ldr	r2, .L1399+72
-	.loc 2 2253 0
-	cmp	r1, #152
-	.loc 2 2251 0
-	strb	r1, [r2, #1]
-	.loc 2 2252 0
-	strb	r3, [r2, #2]
-	.loc 2 2253 0
-	bne	.L1316
-	.loc 2 2253 0 is_stmt 0 discriminator 1
-	ldrsb	r1, [r6, #4]
-	cmp	r1, #0
-	.loc 2 2254 0 is_stmt 1 discriminator 1
-	itt	ge
-	movge	r1, #24
-	strbge	r1, [r8]
-.L1316:
-	.loc 2 2255 0
-	ldr	r1, .L1399+76
-	ldr	r0, [r1]
-	ldr	r1, .L1399+80
-	cmp	r0, r1
-	.loc 2 2256 0
-	itt	eq
-	moveq	r1, #16
-	strbeq	r1, [r8]
-	.loc 2 2257 0
-	cmp	r3, #218
-	bne	.L1318
-	.loc 2 2258 0
-	mov	r1, #2048
-.L1395:
-	.loc 2 2261 0
-	strh	r1, [r2, #14]	@ movhi
-	.loc 2 2262 0
-	strb	r3, [r2, #2]
-.L1319:
-	.loc 2 2264 0
-	movs	r2, #32
-	ldr	r1, .L1399+84
-	ldr	r0, .L1399+88
-	bl	ftl_memcpy
-.LVL1586:
-	.loc 2 2265 0
-	movs	r2, #32
-	ldr	r1, .L1399+72
-	ldr	r0, .L1399+64
-	bl	ftl_memcpy
-.LVL1587:
-.L1315:
-	.loc 2 2268 0
-	ldr	r3, [sp, #16]
-	ldr	r8, .L1399+144
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #0
-	bne	.L1321
-	.loc 2 2269 0
-	bl	FlashLoadPhyInfoInRam
-.LVL1588:
-	cbnz	r0, .L1323
-	.loc 2 2270 0
-	ldr	r3, [r4]
-	ldr	r10, .L1399+100
-	ldrh	r3, [r3, #16]
-	lsrs	r3, r3, #8
-	.loc 2 2271 0
-	lsls	r1, r3, #31
-	.loc 2 2270 0
-	and	r0, r3, #7
-	strb	r0, [r10]
-	.loc 2 2271 0
-	bmi	.L1323
-	.loc 2 2272 0
-	movs	r3, #1
-	strb	r3, [r7]
-	.loc 2 2273 0
-	bl	FlashSetInterfaceMode
-.LVL1589:
-	.loc 2 2274 0
-	ldrb	r0, [r10]	@ zero_extendqisi2
-	bl	NandcSetMode
-.LVL1590:
-.L1323:
-	.loc 2 2277 0
-	ldr	r3, [r4]
-	ldrb	r3, [r3, #26]	@ zero_extendqisi2
-	strb	r3, [r8]
-	.loc 2 2282 0
-	bl	FlashLoadPhyInfo
-.LVL1591:
-	.loc 2 2299 0
-	cmp	r0, #0
-	beq	.L1321
-	.loc 2 2300 0
-	ldr	r3, [r4]
-	ldr	r0, .L1399+92
-.LVL1592:
-	ldrh	r1, [r3, #14]
-	bl	printf
-.LVL1593:
-	.loc 2 2301 0
-	bl	FlashLoadPhyInfoInRam
-.LVL1594:
-	adds	r2, r0, #1
-	beq	.L1307
-	.loc 2 2303 0
-	bl	FlashDieInfoInit
-.LVL1595:
-	.loc 2 2304 0
-	ldr	r3, [r4]
-	ldrb	r0, [r3, #19]	@ zero_extendqisi2
-	bl	FlashGetReadRetryDefault
-.LVL1596:
-	.loc 2 2306 0
-	ldr	r3, [r4]
-	ldr	r2, .L1399+96
-	ldrb	r1, [r3, #9]	@ zero_extendqisi2
-	ldrh	r2, [r2]
-	addw	r2, r2, #4095
-	cmp	r1, r2, asr #12
-	blt	.L1326
-	.loc 2 2307 0 discriminator 1
-	ldrh	r2, [r3, #14]
-	adds	r2, r2, #255
-	.loc 2 2306 0 discriminator 1
-	cmp	r1, r2, asr #8
-	bge	.L1327
-.L1326:
-	.loc 2 2309 0
-	ldrh	r2, [r3, #14]
-	bic	r2, r2, #255
-	strh	r2, [r3, #14]	@ movhi
-.L1327:
-	.loc 2 2316 0
-	ldr	r3, .L1399+100
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	tst	r3, #6
-	beq	.L1328
-	.loc 2 2321 0
-	bl	FlashSavePhyInfo
-.LVL1597:
-	.loc 2 2322 0
-	ldr	r3, .L1399+104
-	movs	r0, #0
-	ldr	r1, [r3]
-	bl	FlashDdrParaScan
-.LVL1598:
-.L1328:
-	.loc 2 2329 0
-	bl	FlashSavePhyInfo
-.LVL1599:
-.L1321:
-	.loc 2 2333 0
-	ldr	fp, [r4]
-	.loc 2 2337 0
-	ldr	r10, .L1399+100
-	.loc 2 2333 0
-	ldrb	r3, [fp, #26]	@ zero_extendqisi2
-	.loc 2 2349 0
-	ldrh	r0, [fp, #10]
-	.loc 2 2333 0
-	strb	r3, [r8]
-	.loc 2 2334 0
-	ldrh	r3, [fp, #16]
-	ubfx	r2, r3, #7, #1
-	.loc 2 2335 0
-	ubfx	r1, r3, #3, #1
-	.loc 2 2334 0
-	strb	r2, [r5]
-	.loc 2 2335 0
-	ldr	r2, .L1399+108
-	.loc 2 2338 0
-	ldr	r5, .L1399+112
-	.loc 2 2335 0
-	strb	r1, [r2]
-	.loc 2 2336 0
-	ubfx	r1, r3, #4, #1
-	ldr	r2, .L1399+116
-	.loc 2 2337 0
-	ubfx	r3, r3, #8, #3
-	strb	r3, [r10]
-	.loc 2 2338 0
-	movs	r3, #0
-	str	r3, [r5]
-	.loc 2 2336 0
-	strb	r1, [r2]
-	.loc 2 2349 0
-	ldrb	r1, [fp, #12]	@ zero_extendqisi2
-	bl	__aeabi_idiv
-.LVL1600:
-	mov	r1, r0
-	ldrb	r0, [fp, #18]	@ zero_extendqisi2
-	bl	BuildFlashLsbPageTable
-.LVL1601:
-	.loc 2 2350 0
-	bl	FlashDieInfoInit
-.LVL1602:
-	.loc 2 2351 0
-	ldr	r3, [r4]
-	mov	ip, r5
-	ldrh	r2, [r3, #16]
-	tst	r2, #64
-	beq	.L1330
-	.loc 2 2352 0
-	ldrb	r0, [r3, #19]	@ zero_extendqisi2
-	ldr	r3, .L1399+120
-	.loc 2 2353 0
-	ldr	r2, .L1399+124
-	.loc 2 2352 0
-	strb	r0, [r3]
-	.loc 2 2353 0
-	ldr	r3, .L1399+56
-	ldrb	r1, [r3, #1]	@ zero_extendqisi2
-	.loc 2 2354 0
-	ldrb	lr, [r3, #2]	@ zero_extendqisi2
-	.loc 2 2353 0
-	strb	r1, [r2]
-	.loc 2 2354 0
-	ldr	r1, .L1399+128
-	strb	lr, [r1]
-	.loc 2 2356 0
-	add	lr, r0, #-1
-	cmp	lr, #6
-	b	.L1400
-.L1401:
+	ldr	r3, .L1245+300
+	ldrh	r6, [r6]
+	lsls	r1, r1, #2
+	mov	r4, r3
+	str	r0, [r4, #28]!
+	b	.L1246
+.L1247:
 	.align	2
-.L1399:
-	.word	.LANCHOR144
-	.word	.LANCHOR150
-	.word	.LANCHOR149
-	.word	.LANCHOR29
+.L1245:
+	.word	.LANCHOR139
+	.word	.LANCHOR173
+	.word	.LANCHOR157
+	.word	.LANCHOR55
+	.word	.LANCHOR158
+	.word	.LANCHOR159
+	.word	.LANCHOR160
+	.word	.LANCHOR161
+	.word	.LANCHOR162
+	.word	.LANCHOR163
+	.word	.LANCHOR164
+	.word	.LANCHOR165
+	.word	.LANCHOR166
+	.word	.LANCHOR167
+	.word	.LANCHOR168
+	.word	.LANCHOR80
+	.word	.LANCHOR169
+	.word	.LANCHOR170
+	.word	.LANCHOR171
+	.word	.LANCHOR172
+	.word	.LANCHOR174
+	.word	.LANCHOR175
+	.word	.LANCHOR74
+	.word	.LANCHOR113
+	.word	.LANCHOR114
+	.word	.LANCHOR115
+	.word	.LANCHOR116
+	.word	.LANCHOR176
+	.word	.LANCHOR177
+	.word	.LANCHOR178
+	.word	.LANCHOR117
+	.word	.LANCHOR179
+	.word	.LANCHOR119
+	.word	.LANCHOR109
+	.word	.LANCHOR112
+	.word	.LANCHOR180
+	.word	.LANCHOR181
+	.word	.LANCHOR182
+	.word	.LANCHOR58
+	.word	.LANCHOR78
+	.word	.LANCHOR107
+	.word	.LANCHOR183
+	.word	.LANCHOR184
+	.word	.LANCHOR185
+	.word	.LANCHOR105
+	.word	.LANCHOR186
+	.word	.LANCHOR187
+	.word	.LANCHOR104
+	.word	.LANCHOR188
+	.word	.LANCHOR41
+	.word	.LANCHOR189
+	.word	.LANCHOR106
+	.word	.LANCHOR137
+	.word	33553920
+	.word	.LANCHOR191
+	.word	.LANCHOR79
+	.word	.LANCHOR84
+	.word	.LANCHOR129
+	.word	.LANCHOR125
+	.word	.LANCHOR0
+	.word	.LANCHOR72
+	.word	.LANCHOR192
+	.word	.LANCHOR193
 	.word	.LANCHOR194
+	.word	.LANCHOR67
+	.word	.LANCHOR131
 	.word	.LANCHOR195
-	.word	.LANCHOR196
-	.word	.LANCHOR147
-	.word	.LANCHOR146
-	.word	.LANCHOR22
-	.word	.LANCHOR3
-	.word	.LANCHOR141
-	.word	.LC21
-	.word	.LANCHOR152
-	.word	.LANCHOR20
-	.word	.LANCHOR18
-	.word	.LANCHOR30
-	.word	.LANCHOR5
-	.word	.LANCHOR197
-	.word	.LANCHOR151
-	.word	1446522928
-	.word	.LANCHOR140+32
-	.word	.LANCHOR7
-	.word	.LC22
-	.word	.LANCHOR119
-	.word	.LANCHOR24
-	.word	.LANCHOR145
-	.word	.LANCHOR198
-	.word	.LANCHOR142
-	.word	.LANCHOR27
-	.word	.LANCHOR10
-	.word	.LANCHOR13
-	.word	.LANCHOR148
-	.word	.LANCHOR2
-	.word	.LANCHOR1
-	.word	.LANCHOR6
-	.word	.LANCHOR8
-.L1400:
-	mov	lr, r1
-	bhi	.L1331
-.LBB406:
-	.loc 2 2359 0
-	ldr	r2, .L1402
-	str	r2, [r5]
-	.loc 2 2360 0
-	subs	r2, r0, #5
-	cmp	r2, #1
-	bhi	.L1332
-	.loc 2 2361 0
-	ldr	r2, .L1402+4
-	.loc 2 2363 0
-	adds	r3, r3, #20
-	.loc 2 2361 0
-	movs	r1, #1
-	str	r1, [r2]
-.LVL1603:
-.L1333:
-	subs	r1, r3, #1
-	.loc 2 2366 0
-	movs	r2, #0
-	adds	r3, r3, #31
-.LVL1604:
-.L1335:
-	.loc 2 2368 0
-	ldrsb	r5, [r1, #1]!
-	cbnz	r5, .L1334
-	.loc 2 2369 0
-	adds	r2, r2, #1
-.LVL1605:
-.L1334:
-	.loc 2 2367 0 discriminator 2
-	cmp	r3, r1
-	bne	.L1335
-	.loc 2 2372 0
-	cmp	r2, #27
-	bls	.L1330
-	.loc 2 2373 0
-	bl	FlashGetReadRetryDefault
-.LVL1606:
-	.loc 2 2374 0
-	bl	FlashSavePhyInfo
-.LVL1607:
-.L1330:
-.LBE406:
-	.loc 2 2399 0
-	ldr	r3, .L1402+8
-	ldr	r2, [r3]
-	ldr	r3, .L1402+12
-	cmp	r2, r3
-	bne	.L1346
-	.loc 2 2399 0 is_stmt 0 discriminator 1
-	ldrb	r3, [r8]	@ zero_extendqisi2
-	cbz	r3, .L1346
-	.loc 2 2400 0 is_stmt 1
-	ldr	r3, [r4]
-	movs	r2, #0
-	strb	r2, [r3, #18]
-.L1346:
-	.loc 2 2406 0
-	ldrb	r3, [r6]	@ zero_extendqisi2
-	cmp	r3, #44
-	bne	.L1347
-	.loc 2 2406 0 is_stmt 0 discriminator 1
-	ldrb	r3, [r7]	@ zero_extendqisi2
-	cbz	r3, .L1347
-	.loc 2 2409 0 is_stmt 1
-	movs	r3, #0
-	.loc 2 2410 0
-	movs	r0, #1
-	.loc 2 2409 0
-	strb	r3, [r7]
-	.loc 2 2410 0
-	bl	FlashSetInterfaceMode
-.LVL1608:
-	.loc 2 2411 0
-	movs	r0, #1
-	bl	NandcSetMode
-.LVL1609:
-.L1347:
-	.loc 2 2428 0
-	movs	r0, #0
-	bl	flash_enter_slc_mode
-.LVL1610:
-	.loc 2 2429 0
-	ldrb	r3, [r10]	@ zero_extendqisi2
-	tst	r3, #6
-	beq	.L1348
-	.loc 2 2430 0
-	ldrb	r2, [r7]	@ zero_extendqisi2
-	cbnz	r2, .L1349
-	.loc 2 2430 0 is_stmt 0 discriminator 1
-	lsls	r3, r3, #31
-	bmi	.L1348
-.L1349:
-	.loc 2 2431 0 is_stmt 1
-	ldr	r3, .L1402+16
-	movs	r0, #0
-	ldr	r1, [r3]
-	bl	FlashDdrParaScan
-.LVL1611:
-.L1348:
-	.loc 2 2438 0
-	movs	r0, #0
-	.loc 2 2544 0
-	movs	r7, #16
-	.loc 2 2438 0
-	bl	flash_exit_slc_mode
-.LVL1612:
-	.loc 2 2531 0
-	ldr	r3, [r4]
-	ldrb	r0, [r3, #20]	@ zero_extendqisi2
-	bl	FlashBchSel
-.LVL1613:
-	.loc 2 2532 0
-	ldr	r0, .L1402+20
-	bl	FlashReadIdbDataRaw
-.LVL1614:
-.LBB407:
-	.loc 2 2551 0
-	ldr	r5, [r4]
-.LBE407:
-	.loc 2 2544 0
-	ldr	r3, [sp, #20]
-.LBB408:
-	.loc 2 2551 0
-	ldr	r4, .L1402+24
-.LBE408:
-	.loc 2 2544 0
-	strb	r7, [r3]
-.LVL1615:
-.LBB409:
-	.loc 2 2551 0
-	ldrb	r3, [r5, #12]	@ zero_extendqisi2
-	strh	r3, [r4, #8]	@ movhi
-	.loc 2 2552 0
-	ldrb	r3, [r5, #7]	@ zero_extendqisi2
-	str	r3, [r4, #4]
-	.loc 2 2553 0
-	ldr	r3, [r6]
-	.loc 2 2556 0
-	ldrh	r6, [r5, #14]
-	.loc 2 2553 0
-	str	r3, [r4]
-	.loc 2 2554 0
-	ldr	r3, .L1402+28
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	strh	r3, [r4, #10]	@ movhi
-	.loc 2 2555 0
-	ldrb	r3, [r5, #13]	@ zero_extendqisi2
-	.loc 2 2556 0
-	strh	r6, [r4, #14]	@ movhi
-	.loc 2 2555 0
-	strh	r3, [r4, #12]	@ movhi
-	.loc 2 2557 0
-	ldrh	r3, [r5, #10]
-	strh	r3, [r4, #16]	@ movhi
-	.loc 2 2558 0
-	ldrb	r1, [r5, #12]	@ zero_extendqisi2
-	ldrh	r0, [r5, #10]
-	bl	__aeabi_idiv
-.LVL1616:
-	strh	r0, [r4, #18]	@ movhi
-	.loc 2 2559 0
-	ldrb	r2, [r5, #9]	@ zero_extendqisi2
-	strh	r2, [r4, #20]	@ movhi
-	.loc 2 2560 0
-	ldrh	r1, [r5, #10]
-	ldrb	r3, [r5, #9]	@ zero_extendqisi2
-	.loc 2 2562 0
-	strh	r7, [r4, #26]	@ movhi
-	.loc 2 2560 0
-	smulbb	r3, r3, r1
-	.loc 2 2561 0
-	mov	r1, #512
-	strh	r1, [r4, #24]	@ movhi
-	.loc 2 2563 0
-	ldr	r1, [sp, #16]
-	.loc 2 2560 0
-	uxth	r3, r3
-	.loc 2 2563 0
-	ldrb	r1, [r1]	@ zero_extendqisi2
-	.loc 2 2560 0
-	strh	r3, [r4, #22]	@ movhi
-	.loc 2 2563 0
-	cmp	r1, #1
-	bne	.L1350
-	.loc 2 2568 0
-	lsls	r3, r3, #1
-	.loc 2 2566 0
-	lsrs	r1, r6, #1
-	.loc 2 2567 0
-	lsls	r2, r2, #1
-	.loc 2 2568 0
-	strh	r3, [r4, #22]	@ movhi
-	.loc 2 2569 0
-	movs	r3, #8
-	.loc 2 2566 0
-	strh	r1, [r4, #14]	@ movhi
-	.loc 2 2567 0
-	strh	r2, [r4, #20]	@ movhi
-	.loc 2 2569 0
-	strh	r3, [r4, #26]	@ movhi
-.L1350:
-.LBE409:
-	.loc 2 2588 0
-	ldrb	r0, [r5, #20]	@ zero_extendqisi2
-	bl	FlashBchSel
-.LVL1617:
-	.loc 2 2592 0
+	.word	.LANCHOR68
+	.word	.LANCHOR130
+	.word	.LANCHOR45
+	.word	.LANCHOR97
+	.word	.LANCHOR126
+	.word	.LANCHOR123
+	.word	.LANCHOR82
+	.word	.LANCHOR51
+	.word	.LANCHOR75
+	.word	.LANCHOR38
+	.word	.LANCHOR108
+	.word	.LANCHOR59
+	.word	.LANCHOR65
+	.word	.LANCHOR190
+	.word	.LANCHOR62
+	.word	.LANCHOR63
+.L1246:
+	mov	r0, r1
+.L1241:
+	cmp	r2, r6
+	bcc	.L1242
+	add	r3, r3, r2, lsl #2
+	ldr	r2, .L1248
+	movs	r1, #0
+	adds	r3, r3, #24
+.L1243:
+	cmp	r3, r2
+	bne	.L1244
 	movs	r0, #0
-.LVL1618:
-.L1307:
-	.loc 2 2593 0
-	add	sp, sp, #32
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1318:
-	.cfi_restore_state
-	.loc 2 2260 0
-	cmp	r3, #220
-	bne	.L1319
-	.loc 2 2261 0
-	mov	r1, #4096
-	b	.L1395
-.L1332:
-.LVL1619:
-.LBB410:
-	.loc 2 2363 0
-	add	r2, r3, #28
-	adds	r3, r3, #20
-	cmp	r0, #7
-	it	eq
-	moveq	r3, r2
-	b	.L1333
-.LVL1620:
-.L1331:
-.LBE410:
-	.loc 2 2376 0
-	sub	r3, r0, #17
-	cmp	r3, #2
-	bhi	.L1337
-	.loc 2 2377 0
-	ldr	r3, .L1402+32
-	.loc 2 2379 0
-	cmp	r0, #19
-	.loc 2 2377 0
-	str	r3, [r5]
-	.loc 2 2378 0
-	ite	ne
-	movne	r3, #7
-	.loc 2 2380 0
-	moveq	r3, #15
-	strb	r3, [r1]
-	b	.L1330
-.L1337:
-	.loc 2 2381 0
-	cmp	r0, #33
-	beq	.L1339
-	.loc 2 2381 0 is_stmt 0 discriminator 1
-	sub	r3, r0, #65
-	cmp	r3, #1
-	bhi	.L1340
-.L1339:
-	.loc 2 2382 0 is_stmt 1
-	ldr	r3, .L1402+36
-	str	r3, [ip]
-	.loc 2 2383 0
-	movs	r3, #4
-	strb	r3, [r2]
-	.loc 2 2384 0
-	movs	r3, #7
-	strb	r3, [lr]
-	b	.L1330
-.L1340:
-	.loc 2 2385 0
-	sub	r3, r0, #67
-	uxtb	r3, r3
-	cmp	r3, #1
-	bls	.L1341
-	.loc 2 2385 0 is_stmt 0 discriminator 1
-	sub	r1, r0, #34
-	cmp	r1, #1
-	bhi	.L1342
-.L1341:
-	.loc 2 2386 0 is_stmt 1
-	ldr	r1, .L1402+36
-	.loc 2 2388 0
-	cmp	r0, #35
-	.loc 2 2386 0
-	str	r1, [ip]
-	ldr	r1, .L1402+40
-	.loc 2 2388 0
-	beq	.L1343
-	.loc 2 2388 0 is_stmt 0 discriminator 1
-	cmp	r0, #68
-	beq	.L1343
-	.loc 2 2387 0 is_stmt 1
-	movs	r0, #7
-.L1396:
-	.loc 2 2390 0
-	cmp	r3, #1
-	.loc 2 2389 0
-	strb	r0, [r1]
-	.loc 2 2391 0
-	ite	ls
-	movls	r3, #4
-	.loc 2 2393 0
-	movhi	r3, #5
-	strb	r3, [r2]
-	b	.L1330
-.L1343:
-	.loc 2 2389 0
-	movs	r0, #17
-	b	.L1396
-.L1342:
-	.loc 2 2394 0
-	cmp	r0, #49
-	.loc 2 2395 0
-	itt	eq
-	ldreq	r3, .L1402+44
-	streq	r3, [r5]
-	b	.L1330
-.LVL1621:
-.L1352:
-	.loc 2 2220 0
-	mvn	r0, #1
-	b	.L1307
-.L1403:
+.L1242:
+	ldr	r5, [r3, #28]
+	adds	r2, r2, #1
+	add	r5, r5, r0
+	add	r0, r0, r1
+	str	r5, [r4, #4]!
+	b	.L1241
+.L1244:
+	str	r1, [r3, #4]!
+	b	.L1243
+.L1249:
 	.align	2
-.L1402:
-	.word	HynixReadRetrial
-	.word	.LANCHOR35
-	.word	.LANCHOR151
-	.word	1446522928
-	.word	.LANCHOR145
-	.word	.LANCHOR138
-	.word	.LANCHOR15
-	.word	.LANCHOR25
-	.word	MicronReadRetrial
-	.word	ToshibaReadRetrial
-	.word	.LANCHOR148
-	.word	SamsungReadRetrial
-	.cfi_endproc
-.LFE252:
-	.size	FlashInit, .-FlashInit
-	.section	.text.FlashReadSlc2KPages,"ax",%progbits
+.L1248:
+	.word	.LANCHOR75+56
+	.size	FtlMemInit, .-FtlMemInit
+	.section	.text.ftl_free,"ax",%progbits
 	.align	1
-	.global	FlashReadSlc2KPages
+	.global	ftl_free
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashReadSlc2KPages, %function
-FlashReadSlc2KPages:
-.LFB258:
-	.loc 2 2761 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 16
+	.type	ftl_free, %function
+ftl_free:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1622:
-	.loc 2 2767 0
-	ldr	r3, .L1433
-	.loc 2 2761 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	mov	r8, r1
-	.loc 2 2794 0
-	ldr	fp, .L1433+28
-	mov	r4, r0
-	.loc 2 2771 0
-	movs	r7, #0
-	.loc 2 2761 0
-	sub	sp, sp, #24
-	.cfi_def_cfa_offset 56
-	.loc 2 2767 0
-	ldrb	r10, [r3, #9]	@ zero_extendqisi2
-.LVL1623:
-	.loc 2 2761 0
-	str	r2, [sp, #12]
-.LVL1624:
-.L1405:
-	.loc 2 2771 0 discriminator 1
-	cmp	r7, r8
-	bne	.L1418
-	.loc 2 2815 0
-	movs	r0, #0
-	add	sp, sp, #24
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1625:
-.L1418:
-	.cfi_restore_state
-	.loc 2 2772 0
-	sub	r3, r8, r7
-	add	r2, sp, #20
-	uxtb	r3, r3
-	ldr	r1, [sp, #12]
-	mov	r0, r4
-	str	r3, [sp]
-	add	r3, sp, #16
-	bl	LogAddr2PhyAddr
-.LVL1626:
-	.loc 2 2773 0
-	ldr	r2, .L1433+4
-	ldr	r3, [sp, #16]
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cmp	r2, r3
-	bhi	.L1406
-	.loc 2 2774 0
-	mov	r3, #-1
-	str	r3, [r4]
-.L1407:
-	.loc 2 2771 0 discriminator 2
-	adds	r7, r7, #1
-.LVL1627:
-	adds	r4, r4, #36
-	b	.L1405
-.L1406:
-	.loc 2 2777 0
-	ldr	r2, .L1433+8
-	ldrb	r5, [r2, r3]	@ zero_extendqisi2
-.LVL1628:
-	.loc 2 2778 0
-	mov	r0, r5
-	bl	NandcWaitFlashReady
-.LVL1629:
-	.loc 2 2779 0
-	mov	r0, r5
-	bl	NandcFlashCs
-.LVL1630:
-	.loc 2 2780 0
-	ldr	r1, [sp, #20]
-	mov	r0, r5
-	bl	FlashReadCmd
-.LVL1631:
-	.loc 2 2781 0
-	mov	r0, r5
-	bl	NandcWaitFlashReady
-.LVL1632:
-	.loc 2 2782 0
-	ldr	r3, [r4, #12]
-	mov	r2, r10
-	movs	r1, #0
-	mov	r0, r5
-	str	r3, [sp]
-	ldr	r3, [r4, #8]
-	bl	NandcXferData
-.LVL1633:
-	.loc 2 2785 0
-	ldr	r3, .L1433+12
-	.loc 2 2782 0
-	mov	r6, r0
-.LVL1634:
-	.loc 2 2785 0
-	ldr	r1, [sp, #20]
-	mov	r0, r5
-.LVL1635:
-	ldr	r3, [r3]
-	add	r1, r1, r3
-	bl	FlashReadCmd
-.LVL1636:
-	.loc 2 2787 0
-	ldr	r3, [r4, #8]
-	.loc 2 2786 0
-	cbz	r3, .L1408
-	.loc 2 2786 0 is_stmt 0 discriminator 1
-	add	r3, r3, #2048
-.L1408:
-	.loc 2 2788 0 is_stmt 1 discriminator 4
-	ldr	r2, [r4, #12]
-	.loc 2 2786 0 discriminator 4
-	cbz	r2, .L1409
-	.loc 2 2786 0 is_stmt 0 discriminator 5
-	adds	r2, r2, #8
-.L1409:
-	.loc 2 2786 0 discriminator 8
-	str	r2, [sp]
+	@ link register save eliminated.
+	b	free
+	.size	ftl_free, .-ftl_free
+	.section	.text.StorageSysDataLoad,"ax",%progbits
+	.align	1
+	.global	StorageSysDataLoad
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	StorageSysDataLoad, %function
+StorageSysDataLoad:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	mov	r4, r1
+	mov	r5, r0
+	mov	r2, #512
 	movs	r1, #0
-	mov	r2, r10
-	mov	r0, r5
-	bl	NandcXferData
-.LVL1637:
+	mov	r0, r4
+	bl	memset
+	mov	r3, r4
+	add	r1, r5, #256
+	movs	r2, #1
+	movs	r0, #16
+	pop	{r4, r5, r6, lr}
+	b	FtlRead
+	.size	StorageSysDataLoad, .-StorageSysDataLoad
+	.section	.text.FlashBootVendorRead,"ax",%progbits
+	.align	1
+	.global	FlashBootVendorRead
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashBootVendorRead, %function
+FlashBootVendorRead:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r3, r2
 	mov	r1, r0
-.LVL1638:
-	.loc 2 2789 0 is_stmt 1 discriminator 8
-	mov	r0, r5
-.LVL1639:
-	bl	NandcFlashDeCs
-.LVL1640:
-	.loc 2 2794 0 discriminator 8
-	ldrb	r3, [fp]	@ zero_extendqisi2
-	cmp	r6, r1
-	it	cc
-	movcc	r6, r1
-.LVL1641:
-	add	r3, r3, r3, lsl #1
-	cmp	r6, r3, asr #2
-	bls	.L1410
-	.loc 2 2795 0 discriminator 1
-	adds	r0, r6, #1
-	it	ne
-	movne	r6, #256
-	.loc 2 2798 0 discriminator 1
-	str	r6, [r4]
-.L1413:
-	.loc 2 2801 0
-	ldr	r3, [r4, #12]
-	cbz	r3, .L1414
-	.loc 2 2802 0
-	ldr	r2, [r3, #8]
-	adds	r1, r2, #1
-.LVL1642:
-	bne	.L1414
-	.loc 2 2802 0 is_stmt 0 discriminator 1
-	ldr	r3, [r3]
-	adds	r3, r3, #1
-	.loc 2 2803 0 is_stmt 1 discriminator 1
-	it	ne
-	strne	r2, [r4]
-.L1414:
-	.loc 2 2806 0
-	ldr	r3, [r4]
-	adds	r2, r3, #1
-	bne	.L1407
-	.loc 2 2807 0
-	ldr	r1, [r4, #4]
-	ldrb	r2, [fp]	@ zero_extendqisi2
-	ldr	r0, .L1433+16
-	bl	printf
-.LVL1643:
-	.loc 2 2808 0
-	ldr	r1, [r4, #8]
-	cbz	r1, .L1416
-	.loc 2 2809 0
-	movs	r3, #8
-	movs	r2, #4
-	ldr	r0, .L1433+20
-	bl	rknand_print_hex
-.LVL1644:
-.L1416:
-	.loc 2 2810 0
-	ldr	r1, [r4, #12]
-	cmp	r1, #0
-	beq	.L1407
-	.loc 2 2811 0
-	movs	r3, #4
-	ldr	r0, .L1433+24
-	mov	r2, r3
-	bl	rknand_print_hex
-.LVL1645:
-	b	.L1407
-.LVL1646:
-.L1410:
-	.loc 2 2800 0
-	movs	r3, #0
-	str	r3, [r4]
-	b	.L1413
-.L1434:
+	movs	r2, #1
+	movs	r0, #16
+	b	FtlRead
+	.size	FlashBootVendorRead, .-FlashBootVendorRead
+	.section	.text.FlashCs123Init,"ax",%progbits
+	.align	1
+	.global	FlashCs123Init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashCs123Init, %function
+FlashCs123Init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	FlashCs123Init, .-FlashCs123Init
+	.section	.text.rk_nand_de_init,"ax",%progbits
+	.align	1
+	.global	rk_nand_de_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_nand_de_init, %function
+rk_nand_de_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	FlashDeInit
+	.size	rk_nand_de_init, .-rk_nand_de_init
+	.section	.text.rk_ftl_get_capacity,"ax",%progbits
+	.align	1
+	.global	rk_ftl_get_capacity
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_ftl_get_capacity, %function
+rk_ftl_get_capacity:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L1256
+	ldr	r0, [r3]
+	bx	lr
+.L1257:
 	.align	2
-.L1433:
-	.word	.LANCHOR30
-	.word	.LANCHOR25
-	.word	.LANCHOR26
-	.word	.LANCHOR3
-	.word	.LC23
-	.word	.LC24
-	.word	.LC25
-	.word	.LANCHOR32
-	.cfi_endproc
-.LFE258:
-	.size	FlashReadSlc2KPages, .-FlashReadSlc2KPages
-	.section	.text.FlashReadPages,"ax",%progbits
+.L1256:
+	.word	.LANCHOR69
+	.size	rk_ftl_get_capacity, .-rk_ftl_get_capacity
+	.section	.text.rknand_print_hex,"ax",%progbits
 	.align	1
-	.global	FlashReadPages
+	.global	rknand_print_hex
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashReadPages, %function
-FlashReadPages:
-.LFB261:
-	.loc 2 2941 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 32
+	.type	rknand_print_hex, %function
+rknand_print_hex:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1647:
-	.loc 2 2956 0
-	ldr	r3, .L1526
-	.loc 2 2941 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	sub	sp, sp, #40
-	.cfi_def_cfa_offset 72
-	.loc 2 2941 0
-	mov	r10, r0
-	str	r1, [sp, #24]
-	.loc 2 2956 0
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	.loc 2 2941 0
-	str	r2, [sp, #12]
-	.loc 2 2956 0
-	cbnz	r3, .L1436
-	.loc 2 2948 0
-	ldr	r2, .L1526+4
-.LVL1648:
-	.loc 2 2949 0
-	mov	r8, r3
-	str	r3, [sp, #8]
-	.loc 2 2948 0
-	ldrb	r2, [r2, #9]	@ zero_extendqisi2
-	str	r2, [sp, #20]
-	.loc 2 2949 0
-	ldr	r2, .L1526+8
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	str	r2, [sp, #28]
-.LVL1649:
-.L1437:
-	.loc 2 2962 0 discriminator 1
-	ldr	r3, [sp, #8]
-	ldr	r2, [sp, #24]
-	cmp	r3, r2
-	bcc	.L1475
-	.loc 2 3081 0
-	movs	r0, #0
-	b	.L1435
-.LVL1650:
-.L1436:
-	.loc 2 2957 0
-	bl	FlashReadSlc2KPages
-.LVL1651:
-.L1435:
-	.loc 2 3082 0
-	add	sp, sp, #40
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
+	movs	r5, #0
+	ldr	r7, .L1267
+	mov	fp, r0
+	mov	r6, r1
+	mov	r8, r2
+	mov	r10, r3
+	mov	r4, r5
+.L1259:
+	cmp	r4, r10
+	bne	.L1265
+	ldr	r1, .L1267+4
+	ldr	r0, .L1267+8
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	printf
+.L1265:
+	cbnz	r5, .L1260
+	mov	r2, r4
+	mov	r1, fp
+	ldr	r0, .L1267+12
+	bl	printf
+.L1260:
+	cmp	r8, #4
+	bne	.L1261
+	ldr	r1, [r6, r4, lsl #2]
+.L1266:
+	mov	r0, r7
+	adds	r5, r5, #1
+	bl	printf
+	cmp	r5, #15
+	bls	.L1264
+	movs	r5, #0
+	ldr	r1, .L1267+4
+	ldr	r0, .L1267+8
+	bl	printf
+.L1264:
+	adds	r4, r4, #1
+	b	.L1259
+.L1261:
+	cmp	r8, #2
+	ite	eq
+	ldrsheq	r1, [r6, r4, lsl #1]
+	ldrbne	r1, [r6, r4]	@ zero_extendqisi2
+	b	.L1266
+.L1268:
+	.align	2
+.L1267:
+	.word	.LC19
+	.word	.LC20
+	.word	.LC7
+	.word	.LC18
+	.size	rknand_print_hex, .-rknand_print_hex
+	.section	.text.HynixGetReadRetryDefault,"ax",%progbits
+	.align	1
+	.global	HynixGetReadRetryDefault
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	HynixGetReadRetryDefault, %function
+HynixGetReadRetryDefault:
+	@ args = 0, pretend = 0, frame = 56
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r3, #172
+	ldr	r5, .L1368
+	cmp	r0, #2
+	mov	r1, #173
+	mov	r2, #174
+	sub	sp, sp, #56
+	mov	r4, r0
+	strb	r3, [r5, #4]
+	mov	r3, #175
+	strb	r0, [r5]
+	strb	r1, [r5, #5]
+	strb	r2, [r5, #6]
+	strb	r3, [r5, #7]
+	bne	.L1270
+	movs	r3, #167
+	movs	r2, #247
+	strb	r3, [r5, #4]
+	ldr	r3, .L1368+4
+	strb	r2, [r3, #17]
+.L1326:
+	mov	r10, #7
+	b	.L1362
+.L1270:
+	cmp	r0, #3
+	bne	.L1272
+	movs	r3, #176
+	strb	r3, [r5, #4]
+	movs	r3, #177
+	strb	r3, [r5, #5]
+	movs	r3, #178
+	strb	r3, [r5, #6]
+	movs	r3, #179
+	strb	r3, [r5, #7]
+	movs	r3, #180
+	strb	r3, [r5, #8]
+	movs	r3, #181
+	strb	r3, [r5, #9]
+	movs	r3, #182
+	strb	r3, [r5, #10]
+	movs	r3, #183
+.L1363:
+	mov	r10, #8
+	strb	r3, [r5, #11]
+	mov	fp, r10
+.L1271:
+	subs	r3, r4, #1
+	cmp	r3, #1
+	bhi	.L1276
+	mov	r8, #0
+.L1277:
+	ldr	r3, .L1368+8
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	uxtb	r3, r8
+	cmp	r2, r3
+	bhi	.L1283
+.L1284:
+	ldr	r3, .L1368
+	strb	fp, [r3, #1]
+	strb	r10, [r3, #2]
+	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1652:
-.L1475:
-	.cfi_restore_state
-	.loc 2 2963 0
+.L1272:
+	cmp	r0, #4
+	bne	.L1273
+	movs	r0, #204
+	strb	r1, [r5, #9]
+	strb	r0, [r5, #4]
+	movs	r0, #191
+	strb	r0, [r5, #5]
+	movs	r0, #170
+	strb	r0, [r5, #6]
+	movs	r0, #171
+	strb	r0, [r5, #7]
+	movs	r0, #205
+	strb	r0, [r5, #8]
+	strb	r2, [r5, #10]
+	b	.L1363
+.L1273:
+	cmp	r0, #5
+	bne	.L1274
+	movs	r3, #56
+	mov	r10, #8
+	strb	r3, [r5, #4]
+	movs	r3, #57
+	strb	r3, [r5, #5]
+	movs	r3, #58
+	strb	r3, [r5, #6]
+	movs	r3, #59
+	strb	r3, [r5, #7]
+.L1362:
+	mov	fp, #4
+	b	.L1271
+.L1274:
+	cmp	r0, #6
+	bne	.L1275
+	movs	r3, #14
+	mov	r10, #12
+	strb	r3, [r5, #4]
+	movs	r3, #15
+	strb	r3, [r5, #5]
+	movs	r3, #16
+	strb	r3, [r5, #6]
+	movs	r3, #17
+	strb	r3, [r5, #7]
+	b	.L1362
+.L1275:
+	cmp	r0, #7
+	bne	.L1326
+	movs	r3, #176
+	mov	r10, #12
+	strb	r3, [r5, #4]
+	movs	r3, #177
+	strb	r3, [r5, #5]
+	movs	r3, #178
+	strb	r3, [r5, #6]
+	movs	r3, #179
+	strb	r3, [r5, #7]
+	movs	r3, #180
+	strb	r3, [r5, #8]
+	movs	r3, #181
+	strb	r3, [r5, #9]
+	movs	r3, #182
+	strb	r3, [r5, #10]
+	movs	r3, #183
+	strb	r3, [r5, #11]
+	movs	r3, #212
+	strb	r3, [r5, #12]
+	movs	r3, #213
+	strb	r3, [r5, #13]
+	mov	fp, #10
+	b	.L1271
+.L1283:
+	ldr	r2, .L1368+12
+	movs	r6, #0
+	ldrb	r2, [r2, r3]	@ zero_extendqisi2
+	ldr	r3, .L1368+16
+	ldr	r7, [r3, r2, lsl #3]
+	add	r4, r5, r2, lsl #6
+	add	r3, r3, r2, lsl #3
+	movs	r2, #55
+	adds	r4, r4, #20
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+	add	r7, r7, r3, lsl #8
+	addw	r3, r7, #2056
+.L1278:
+	adds	r1, r5, r6
+	str	r2, [r3]
+	ldrb	r1, [r1, #4]	@ zero_extendqisi2
+	movs	r0, #80
+	str	r2, [sp, #8]
+	str	r3, [sp, #4]
+	str	r1, [r7, #2052]
+	bl	udelay
+	ldr	r1, [r7, #2048]
+	ldr	r3, [sp, #4]
 	ldr	r2, [sp, #8]
-	movs	r3, #36
-.LVL1653:
-	.loc 2 2964 0
-	ldr	r1, [sp, #12]
-	.loc 2 2963 0
-	mul	fp, r3, r2
-	add	r7, r10, fp
-	ldr	r3, [r7, #4]
-	.loc 2 2964 0
-	mov	r0, r7
-	.loc 2 2963 0
-	str	r3, [sp, #16]
-.LVL1654:
-	.loc 2 2964 0
-	ldr	r3, [sp, #24]
-.LVL1655:
-	subs	r3, r3, r2
-	add	r2, sp, #36
-	uxtb	r3, r3
-	str	r3, [sp]
-.LVL1656:
-	add	r3, sp, #32
-	bl	LogAddr2PhyAddr
-.LVL1657:
-	.loc 2 2965 0
-	ldr	r2, .L1526+12
-	.loc 2 2964 0
-	mov	r5, r0
-.LVL1658:
-	.loc 2 2965 0
-	ldr	r3, [sp, #32]
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cmp	r2, r3
-	bhi	.L1439
-	.loc 2 2966 0
-	mov	r3, #-1
-	str	r3, [r10, fp]
-.LVL1659:
-.L1440:
-	.loc 2 2962 0 discriminator 2
-	ldr	r3, [sp, #8]
+	strb	r1, [r4, r6]
+	adds	r6, r6, #1
+	uxtb	r1, r6
+	cmp	fp, r1
+	bhi	.L1278
+	ldr	r7, .L1368+4
+	mov	r1, r4
+	movs	r2, #0
+.L1281:
+	movs	r3, #1
+	adds	r6, r7, r2
+.L1280:
+	ldrb	r0, [r6, r3, lsl #2]	@ zero_extendqisi2
+	ldrb	ip, [r1]	@ zero_extendqisi2
+	add	r0, r0, ip
+	strb	r0, [r1, r3, lsl #3]
 	adds	r3, r3, #1
-	str	r3, [sp, #8]
-.LVL1660:
-	b	.L1437
-.LVL1661:
-.L1439:
-	.loc 2 2969 0
-	ldr	r2, .L1526+16
-	ldrb	r4, [r2, r3]	@ zero_extendqisi2
-.LVL1662:
-	.loc 2 2970 0
-	ldr	r3, .L1526+20
-	.loc 2 2973 0
-	mov	r0, r4
-.LVL1663:
-	.loc 2 2970 0
+	cmp	r3, #7
+	bne	.L1280
+	adds	r2, r2, #1
+	adds	r1, r1, #1
+	cmp	r2, #4
+	bne	.L1281
+	movs	r3, #0
+	add	r8, r8, #1
+	strb	r3, [r4, #16]
+	strb	r3, [r4, #24]
+	strb	r3, [r4, #32]
+	strb	r3, [r4, #40]
+	strb	r3, [r4, #48]
+	strb	r3, [r4, #41]
+	strb	r3, [r4, #49]
+	b	.L1277
+.L1276:
+	subs	r3, r4, #3
+	cmp	r3, #4
+	bhi	.L1284
+	smulbb	r3, r10, fp
+	asrs	r2, r3, #2
+	lsls	r3, r3, #4
+	str	r3, [sp, #52]
+	lsls	r3, r2, #3
+	str	r2, [sp, #12]
+	str	r3, [sp, #48]
+	lsls	r3, r2, #2
+	str	r3, [sp, #32]
+	movs	r3, #0
+.L1367:
+	str	r3, [sp, #28]
+	ldrb	r3, [sp, #28]	@ zero_extendqisi2
+	str	r3, [sp, #16]
+	ldr	r3, .L1368+8
+	ldr	r2, [sp, #16]
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	.loc 2 2971 0
-	cmp	r3, #0
-	it	eq
-	moveq	r5, #0
-.LVL1664:
-	.loc 2 2973 0
-	bl	NandcWaitFlashReady
-.LVL1665:
-	.loc 2 2974 0
-	ldr	r3, .L1526+24
-	ldr	r3, [r3]
-	ldrb	r1, [r3, #19]	@ zero_extendqisi2
-	subs	r3, r1, #1
-	cmp	r3, #6
-	bhi	.L1442
-.LBB411:
-	.loc 2 2975 0
-	ldr	r3, .L1526+28
-	.loc 2 2976 0
-	cmp	r1, #7
-	.loc 2 2975 0
-	add	r2, r3, r4
-	ldrb	r3, [r2, #12]	@ zero_extendqisi2
-.LVL1666:
-	.loc 2 2977 0
+	cmp	r3, r2
+	bls	.L1284
+	ldr	r2, [sp, #16]
+	ldr	r3, .L1368+12
+	ldrb	r8, [r3, r2]	@ zero_extendqisi2
+	ldr	r3, .L1368+16
+	mov	r0, r8
+	ldr	r2, [r3, r8, lsl #3]
+	add	r3, r3, r8, lsl #3
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+	str	r2, [sp, #4]
+	str	r3, [sp, #8]
+	mov	r3, r2
+	ldr	r2, [sp, #8]
+	add	r3, r3, r2, lsl #8
+	movs	r2, #255
+	str	r2, [r3, #2056]
+	bl	NandcWaitFlashReady
+	ldr	r1, .L1368
+	cmp	r4, #7
 	it	eq
-	ldrbeq	r3, [r2, #20]	@ zero_extendqisi2
-.LVL1667:
-	.loc 2 2978 0
-	ldr	r2, .L1526+32
-	ldrb	r2, [r2, r4]	@ zero_extendqisi2
-	cmp	r2, r3
-	beq	.L1442
-	.loc 2 2979 0
-	ldr	r2, .L1526+36
-	mov	r0, r4
-	ldrb	r1, [r2, #-3]	@ zero_extendqisi2
-	bl	HynixSetRRPara
-.LVL1668:
-.L1442:
-.LBE411:
-	.loc 2 2982 0
-	mov	r0, r4
-	bl	NandcFlashCs
-.LVL1669:
-	.loc 2 2984 0
-	ldr	r3, [sp, #12]
-	cmp	r3, #1
-	beq	.L1444
-	.loc 2 2984 0 is_stmt 0 discriminator 2
-	ldr	r3, [sp, #16]
-	cmp	r3, #0
-	bge	.L1445
-.L1444:
-	.loc 2 2984 0 discriminator 3
-	ldr	r3, .L1526+40
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1445
-	.loc 2 2985 0 is_stmt 1
-	mov	r0, r4
-	bl	flash_enter_slc_mode
-.LVL1670:
-.L1452:
-	.loc 2 2989 0
-	ldr	r1, [sp, #36]
-	adds	r6, r1, #1
-	bne	.L1447
-	.loc 2 2989 0 is_stmt 0 discriminator 1
-	cmp	r4, #255
-	beq	.L1477
-.L1447:
-.LVL1671:
-	.loc 2 2991 0 is_stmt 1
-	cbz	r5, .L1449
-	.loc 2 2992 0
-	ldr	r3, .L1526+44
-	mov	r0, r4
-	ldr	r2, [r3]
-	add	r2, r2, r1
-	bl	FlashReadDpCmd
-.LVL1672:
-.L1450:
-	.loc 2 3001 0
-	mov	r0, r4
+	moveq	r3, #160
+	ldr	r2, [sp, #8]
+	itete	eq
+	mlaeq	r1, r3, r8, r1
+	addne	r1, r1, r8, lsl #6
+	addeq	r3, r1, #28
+	addne	r3, r1, #20
+	str	r3, [sp, #36]
+	cmp	r4, #4
+	ldr	r3, [sp, #4]
+	add	r3, r3, r2, lsl #8
+	mov	r2, #54
+	str	r2, [r3, #2056]
+	bne	.L1288
+	movs	r2, #255
+	str	r2, [r3, #2052]
+	movs	r2, #64
+	str	r2, [r3, #2048]
+	movs	r2, #204
+.L1365:
+	str	r2, [r3, #2052]
+	movs	r2, #77
+	b	.L1366
+.L1288:
+	subs	r2, r4, #5
+	cmp	r2, #1
+	bhi	.L1290
+	ldr	r2, .L1368
+	ldrb	r2, [r2, #4]	@ zero_extendqisi2
+	str	r2, [r3, #2052]
+	movs	r2, #82
+.L1366:
+	str	r2, [r3, #2048]
+	cmp	r4, #6
+	ldr	r3, [sp, #4]
+	mov	r0, r8
+	ldr	r2, [sp, #8]
+	add	r5, r3, r2, lsl #8
+	mov	r3, #22
+	ldr	r2, [sp, #8]
+	str	r3, [r5, #2056]
+	mov	r3, #23
+	str	r3, [r5, #2056]
+	mov	r3, #4
+	str	r3, [r5, #2056]
+	mov	r3, #25
+	str	r3, [r5, #2056]
+	mov	r3, #0
+	str	r3, [r5, #2056]
+	str	r3, [r5, #2052]
+	str	r3, [r5, #2052]
+	it	eq
+	moveq	r3, #31
+	str	r3, [r5, #2052]
+	movs	r3, #2
+	str	r3, [r5, #2052]
+	movs	r3, #0
+	str	r3, [r5, #2052]
+	ldr	r3, [sp, #4]
+	add	r3, r3, r2, lsl #8
+	movs	r2, #48
+	str	r2, [r3, #2056]
 	bl	NandcWaitFlashReady
-.LVL1673:
-	.loc 2 3002 0
-	cbz	r5, .L1448
-.LVL1674:
-	.loc 2 3003 0
-	ldr	r1, [sp, #36]
-	mov	r0, r4
-	bl	FlashReadDpDataOutCmd
-.LVL1675:
-.L1448:
-	.loc 2 3004 0
-	ldr	r3, [r7, #12]
-	movs	r1, #0
-	ldr	r2, [sp, #20]
-	mov	r0, r4
-	str	r3, [sp]
-	ldr	r3, [r7, #8]
-	bl	NandcXferData
-.LVL1676:
-	.loc 2 3008 0
-	ldr	r3, .L1526+8
-	.loc 2 3004 0
-	mov	r6, r0
-.LVL1677:
-	.loc 2 3008 0
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1451
-	.loc 2 3008 0 is_stmt 0 discriminator 1
-	adds	r0, r0, #1
-.LVL1678:
-	bne	.L1451
-	.loc 2 3009 0 is_stmt 1
-	ldr	r3, .L1526+8
-	movs	r5, #0
-	strb	r5, [r3]
-.LVL1679:
-	.loc 2 3011 0
-	b	.L1452
-.LVL1680:
-.L1445:
-	.loc 2 2987 0
-	mov	r0, r4
-	bl	flash_exit_slc_mode
-.LVL1681:
-	b	.L1452
-.LVL1682:
-.L1449:
-	.loc 2 2994 0
-	mov	r0, r4
-	bl	FlashReadCmd
-.LVL1683:
-	b	.L1450
-.LVL1684:
-.L1477:
-	.loc 2 2997 0
-	movs	r5, #0
-.LVL1685:
-	b	.L1448
-.LVL1686:
-.L1451:
-	.loc 2 3013 0
-	cbz	r5, .L1453
-	.loc 2 3014 0
-	ldr	r3, .L1526+44
-	mov	r0, r4
-	ldr	r1, [sp, #36]
+	subs	r3, r4, #5
+	cmp	r3, #1
+	str	r3, [sp, #40]
+	bls	.L1327
+	cmp	r4, #7
+	ite	eq
+	moveq	r2, #32
+	movne	r2, #2
+.L1293:
+	ldr	r3, .L1368+20
+	subs	r2, r2, #1
 	ldr	r3, [r3]
-	add	r1, r1, r3
-	bl	FlashReadDpDataOutCmd
-.LVL1687:
-	.loc 2 3016 0
-	add	r3, fp, #36
-	.loc 2 3015 0
+	subs	r1, r3, #1
+	uxtab	r2, r3, r2
+	mov	r0, r1
+.L1294:
+	ldr	r6, [r5, #2048]
+	strb	r6, [r0, #1]!
+	cmp	r2, r0
+	bne	.L1294
+	cmp	r4, #7
+	bne	.L1295
+	movs	r2, #0
+.L1297:
+	ldrb	r0, [r3, r2, lsl #2]	@ zero_extendqisi2
+	uxtb	r1, r2
+	cmp	r0, #12
+	beq	.L1296
+	add	r0, r3, r2, lsl #2
+	ldrb	r0, [r0, #1]	@ zero_extendqisi2
+	cmp	r0, #10
+	beq	.L1296
+	adds	r2, r2, #1
+	cmp	r2, #8
+	bne	.L1297
+.L1298:
 	movs	r1, #0
-	.loc 2 3016 0
-	add	r3, r3, r10
-	.loc 2 3015 0
-	mov	r0, r4
-	ldr	r2, [r3, #12]
-	str	r2, [sp]
-	ldr	r2, [sp, #20]
-	ldr	r3, [r3, #8]
-	bl	NandcXferData
-.LVL1688:
-	.loc 2 3019 0
-	cmp	r0, #-1
-	.loc 2 3015 0
-	mov	r8, r0
-.LVL1689:
-	.loc 2 3019 0
-	it	eq
-	moveq	r5, #0
-.LVL1690:
-.L1453:
-	.loc 2 3021 0
-	mov	r0, r4
-	bl	NandcFlashDeCs
-.LVL1691:
-	.loc 2 3022 0
-	ldr	r3, .L1526+8
-	.loc 2 3023 0
-	adds	r1, r6, #1
-	.loc 2 3022 0
-	ldrb	r2, [sp, #28]	@ zero_extendqisi2
-	strb	r2, [r3]
-	.loc 2 3023 0
-	bne	.L1454
-	.loc 2 3023 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1526+48
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L1455
-.LVL1692:
-.L1459:
-	.loc 2 3032 0 is_stmt 1
-	ldr	r3, .L1526+52
-	ldr	r5, [r3]
-	cmp	r5, #0
-	bne	.L1456
-	.loc 2 3049 0
-	ldr	r3, [r7, #12]
-	mov	r0, r4
-	ldr	r2, [r7, #8]
-	ldr	r1, [sp, #36]
-	bl	FlashReadRawPage
-.LVL1693:
-	b	.L1525
-.LVL1694:
-.L1455:
-.LBB412:
-	.loc 2 3024 0
-	ldr	r3, .L1526+56
-	.loc 2 3026 0
-	mov	r0, r4
-	ldr	r1, [sp, #36]
-	.loc 2 3024 0
-	ldr	r3, [r3]
-	ldr	r5, [r3, #304]
-.LVL1695:
-	.loc 2 3026 0
-	movs	r3, #1
-	str	r3, [sp]
-	ldr	r2, [r7, #8]
-	ldr	r3, [r7, #12]
-	bl	FlashDdrTunningRead
-.LVL1696:
-	.loc 2 3027 0
-	adds	r2, r0, #1
-	.loc 2 3026 0
-	mov	r6, r0
-.LVL1697:
-	.loc 2 3027 0
-	beq	.L1458
-	.loc 2 3027 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1526+60
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r0, r3, lsr #1
-	bls	.L1478
-.L1458:
-	.loc 2 3028 0 is_stmt 1
-	ubfx	r0, r5, #8, #8
-.LVL1698:
-	bl	NandcSetDdrPara
-.LVL1699:
-.LBE412:
-	.loc 2 3030 0
-	adds	r3, r6, #1
-	beq	.L1459
-.L1478:
-.LBB413:
-	.loc 2 3025 0
-	movs	r5, #0
-.LVL1700:
-.L1454:
-.LBE413:
-	.loc 2 3051 0
-	ldr	r3, .L1526+60
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	r6, r3, asr #2
-	bls	.L1467
-	.loc 2 3051 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1526+52
-	ldr	r3, [r3]
-	cmp	r3, #0
-	bne	.L1467
-	.loc 2 3052 0 is_stmt 1
-	mov	r6, #256
-.LVL1701:
-	b	.L1462
-.L1527:
+	ldr	r0, .L1368+24
+	bl	printf
+.L1300:
+	b	.L1300
+.L1290:
+	movs	r2, #174
+	str	r2, [r3, #2052]
+	movs	r2, #0
+	str	r2, [r3, #2048]
+	movs	r2, #176
+	b	.L1365
+.L1327:
+	movs	r2, #16
+	b	.L1293
+.L1369:
 	.align	2
-.L1526:
-	.word	.LANCHOR1
-	.word	.LANCHOR30
-	.word	.LANCHOR5
+.L1368:
+	.word	.LANCHOR20
+	.word	.LANCHOR196
 	.word	.LANCHOR25
 	.word	.LANCHOR26
-	.word	.LANCHOR198
-	.word	.LANCHOR18
-	.word	.LANCHOR20
-	.word	.LANCHOR21
-	.word	.LANCHOR20+4
-	.word	.LANCHOR8
-	.word	.LANCHOR3
-	.word	.LANCHOR29
-	.word	.LANCHOR142
-	.word	.LANCHOR19
-	.word	.LANCHOR32
-.LVL1702:
-.L1456:
-	.loc 2 3034 0
-	ldr	r3, [r7, #12]
-	mov	r0, r4
-	ldr	r2, [r7, #8]
-	ldr	r1, [sp, #36]
-	blx	r5
-.LVL1703:
-	.loc 2 3035 0
-	adds	r5, r0, #1
-	.loc 2 3034 0
-	mov	r6, r0
-.LVL1704:
-	.loc 2 3035 0
-	bne	.L1460
-	.loc 2 3036 0
-	ldr	r3, .L1528
-	ldr	r3, [r3]
-	ldrb	r3, [r3, #19]	@ zero_extendqisi2
+	.word	.LANCHOR6
+	.word	.LANCHOR147
+	.word	.LC21
+.L1296:
+	cmp	r1, #6
+	bhi	.L1298
+.L1299:
+	ldr	r3, .L1370
+	ldr	lr, [r3]
+	mov	r3, lr
+.L1304:
+	ldr	r1, [sp, #52]
+	sub	r2, r3, lr
+	cmp	r1, r2
+	bgt	.L1305
+	ldr	r3, .L1370
+	ldr	r1, [r3]
+	ldr	r3, [sp, #32]
+	adds	r0, r1, r3
+	movs	r3, #8
+.L1307:
+	mov	r7, r0
+	movs	r6, #0
+.L1306:
+	ldr	r2, [r7]
+	adds	r6, r6, #1
+	mvns	r2, r2
+	str	r2, [r7], #4
+	ldr	r2, [sp, #12]
+	cmp	r2, r6
+	bgt	.L1306
+	ldr	r2, [sp, #48]
 	subs	r3, r3, #1
-	cmp	r3, #6
-	bhi	.L1461
-	.loc 2 3037 0
-	ldr	r2, .L1528+4
-	movs	r3, #0
-	mov	r0, r4
-.LVL1705:
-	ldrb	r1, [r2, #-3]	@ zero_extendqisi2
-	bl	HynixSetRRPara
-.LVL1706:
-.L1461:
-	.loc 2 3038 0
-	ldr	r3, [r7, #12]
-	mov	r0, r4
-	ldr	r2, [r7, #8]
-	ldr	r1, [sp, #36]
-	bl	FlashReadRawPage
-.LVL1707:
-	.loc 2 3039 0
-	ldr	r2, .L1528+8
-	.loc 2 3038 0
-	mov	r6, r0
-.LVL1708:
-	.loc 2 3039 0
-	mov	r3, r0
-	ldr	r1, [r7, #4]
-	ldr	r0, .L1528+12
-.LVL1709:
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	bl	printf
-.LVL1710:
-	.loc 2 3040 0
-	adds	r0, r6, #1
-	bne	.L1460
-	.loc 2 3040 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1528+16
-	ldrb	r5, [r3]	@ zero_extendqisi2
-	cbz	r5, .L1462
-	.loc 2 3041 0 is_stmt 1
-	ldr	r3, [sp, #12]
-	.loc 2 3042 0
-	mov	r0, r4
-	.loc 2 3041 0
-	cmp	r3, #1
-	beq	.L1463
-	.loc 2 3041 0 is_stmt 0 discriminator 1
-	ldr	r3, [sp, #16]
-	cmp	r3, #0
-	bge	.L1464
-.L1463:
-	.loc 2 3042 0 is_stmt 1
-	bl	flash_enter_slc_mode
-.LVL1711:
-.L1465:
-	.loc 2 3045 0
-	ldr	r3, .L1528+20
-	mov	r0, r4
-	ldr	r2, [r7, #8]
-	ldr	r1, [sp, #36]
-	ldr	r5, [r3]
-	ldr	r3, [r7, #12]
-	blx	r5
-.LVL1712:
-.L1525:
-	.loc 2 3059 0
-	adds	r1, r0, #1
-	.loc 2 3049 0
-	mov	r6, r0
-.LVL1713:
-	mov	r5, #0
-	.loc 2 3059 0
-	bne	.L1467
-.LVL1714:
-.L1462:
-	.loc 2 3058 0
-	str	r6, [r10, fp]
-.L1468:
-	.loc 2 3062 0
-	ldr	r3, [r10, fp]
-	adds	r2, r3, #1
-	bne	.L1470
-	.loc 2 3063 0
-	ldr	r2, .L1528+8
-	ldr	r1, [r7, #4]
-	ldr	r0, .L1528+24
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	bl	printf
-.LVL1715:
-	.loc 2 3066 0
-	ldr	r1, [r7, #12]
-	cbz	r1, .L1470
-	.loc 2 3067 0
-	movs	r3, #4
-	ldr	r0, .L1528+28
-	mov	r2, r3
-	bl	rknand_print_hex
-.LVL1716:
-.L1470:
-	.loc 2 3069 0
-	cbz	r5, .L1472
-	.loc 2 3070 0
-	ldr	r3, .L1528+8
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	r8, r3, asr #2
-	bls	.L1473
-	.loc 2 3070 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1528+20
-	ldr	r3, [r3]
-	.loc 2 3071 0 is_stmt 1 discriminator 1
-	cmp	r3, #0
+	add	r0, r0, r2
+	bne	.L1307
+	str	r1, [sp, #20]
+	str	r3, [sp, #24]
+.L1313:
+	movs	r0, #0
+	mov	r2, r0
+.L1312:
+	movs	r3, #1
+	mov	ip, #0
+	lsl	r7, r3, r2
+	movs	r3, #16
+	str	r3, [sp, #44]
+	mov	r6, r7
+	ldr	r7, [sp, #20]
+.L1310:
+	ldr	r3, [r7]
+	bics	r3, r6, r3
+	ldr	r3, [sp, #32]
 	it	eq
-	moveq	r8, #256
-.LVL1717:
-.L1473:
-	.loc 2 3074 0
-	cmp	r8, #-1
-	.loc 2 3073 0
-	add	r3, fp, #36
-	str	r8, [r10, r3]
-	.loc 2 3074 0
-	beq	.L1472
-	.loc 2 3074 0 is_stmt 0 discriminator 1
-	cmp	r8, #256
-	.loc 2 3075 0 is_stmt 1 discriminator 1
-	itt	ne
-	movne	r2, #0
-	strne	r2, [r10, r3]
-.L1472:
-	.loc 2 3077 0
-	ldr	r3, [sp, #8]
-	add	r3, r3, r5
-	str	r3, [sp, #8]
-.LVL1718:
-	.loc 2 3078 0
+	addeq	ip, ip, #1
+	add	r7, r7, r3
+	ldr	r3, [sp, #44]
+	subs	r3, r3, #1
+	str	r3, [sp, #44]
+	bne	.L1310
+	cmp	ip, #8
+	add	r2, r2, #1
+	itt	hi
+	movhi	r3, r6
+	orrhi	r0, r0, r3
+	cmp	r2, #32
+	bne	.L1312
+	ldr	r3, [sp, #20]
+	str	r0, [r3], #4
+	str	r3, [sp, #20]
+	ldr	r3, [sp, #24]
+	adds	r3, r3, #1
+	str	r3, [sp, #24]
+	ldr	r2, [sp, #24]
 	ldr	r3, [sp, #12]
-.LVL1719:
+	cmp	r3, r2
+	bgt	.L1313
+	subs	r2, r1, #4
+	add	r0, r1, #28
+	movs	r3, #0
+.L1316:
+	ldr	r6, [r2, #4]!
+	cbnz	r6, .L1315
+	adds	r3, r3, #1
+.L1315:
+	cmp	r0, r2
+	bne	.L1316
+	cmp	r3, #7
+	ble	.L1317
+	ldr	r0, .L1370+4
+	mov	r3, #1024
+	movs	r2, #1
+	bl	rknand_print_hex
+	movs	r1, #0
+	ldr	r0, .L1370+8
+	bl	printf
+.L1318:
+	b	.L1318
+.L1295:
+	cmp	r4, #6
+	bne	.L1299
+	adds	r3, r3, #7
+.L1301:
+	ldrb	r2, [r1, #1]!	@ zero_extendqisi2
+	cmp	r2, #12
+	beq	.L1299
+	ldrb	r2, [r1, #8]	@ zero_extendqisi2
+	cmp	r2, #4
+	beq	.L1299
+	cmp	r3, r1
+	bne	.L1301
+	movs	r1, #0
+	ldr	r0, .L1370+8
+	bl	printf
+.L1303:
+	b	.L1303
+.L1305:
+	ldr	r2, [r5, #2048]
+	strb	r2, [r3], #1
+	b	.L1304
+.L1317:
+	cmp	r4, #6
+	beq	.L1329
+	cmp	r4, #7
+	ite	eq
+	moveq	ip, #10
+	movne	ip, #8
+.L1319:
+	add	r3, fp, #-1
+	ldr	r1, [sp, #36]
+	uxtb	r3, r3
+	movs	r0, #0
+	adds	r3, r3, #1
+.L1320:
+	mov	r7, r1
+	mov	r2, lr
+.L1321:
+	ldrb	r6, [r2], #1	@ zero_extendqisi2
+	strb	r6, [r7], #1
+	sub	r6, r2, lr
+	uxtb	r6, r6
+	cmp	fp, r6
+	bhi	.L1321
+	adds	r0, r0, #1
+	add	lr, lr, r3
+	cmp	r10, r0
+	add	r1, r1, ip
+	bgt	.L1320
+	ldr	r3, [sp, #4]
+	mov	r0, r8
+	ldr	r2, [sp, #8]
+	add	r6, r3, r2, lsl #8
+	movs	r3, #255
+	str	r3, [r6, #2056]
+	bl	NandcWaitFlashReady
+	ldr	r3, [sp, #40]
 	cmp	r3, #1
-	beq	.L1474
-	.loc 2 3078 0 is_stmt 0 discriminator 2
-	ldr	r3, [sp, #16]
-	cmp	r3, #0
-	bge	.L1440
-.L1474:
-	.loc 2 3078 0 discriminator 3
-	ldr	r3, .L1528+16
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #0
-	beq	.L1440
-	.loc 2 3079 0 is_stmt 1
-	mov	r0, r4
-	bl	flash_exit_slc_mode
-.LVL1720:
-	b	.L1440
-.LVL1721:
-.L1464:
-	.loc 2 3044 0
-	bl	flash_exit_slc_mode
-.LVL1722:
-	b	.L1465
-.L1460:
-	.loc 2 3031 0
-	movs	r5, #0
-.LVL1723:
-.L1467:
-	.loc 2 3059 0 discriminator 1
-	cmp	r6, #256
-	beq	.L1462
-	.loc 2 3060 0
+	bhi	.L1323
+	movs	r3, #54
+	mov	r1, #-1
+	str	r3, [r6, #2056]
+	ldr	r3, .L1370+12
+	ldr	r0, [sp, #16]
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+	str	r3, [r5, #2052]
 	movs	r3, #0
-	str	r3, [r10, fp]
-	b	.L1468
-.L1529:
+	str	r3, [r5, #2048]
+	movs	r3, #22
+	str	r3, [r6, #2056]
+	bl	FlashReadCmd
+.L1324:
+	mov	r0, r8
+	bl	NandcWaitFlashReady
+	ldr	r3, [sp, #28]
+	adds	r3, r3, #1
+	b	.L1367
+.L1329:
+	mov	ip, #4
+	b	.L1319
+.L1323:
+	movs	r3, #56
+	str	r3, [r6, #2056]
+	b	.L1324
+.L1371:
 	.align	2
-.L1528:
-	.word	.LANCHOR18
-	.word	.LANCHOR20+4
-	.word	.LANCHOR32
-	.word	.LC26
-	.word	.LANCHOR8
-	.word	.LANCHOR142
-	.word	.LC23
-	.word	.LC25
-	.cfi_endproc
-.LFE261:
-	.size	FlashReadPages, .-FlashReadPages
-	.section	.text.FlashProgSlc2KPages,"ax",%progbits
+.L1370:
+	.word	.LANCHOR147
+	.word	.LC22
+	.word	.LC21
+	.word	.LANCHOR20
+	.size	HynixGetReadRetryDefault, .-HynixGetReadRetryDefault
+	.section	.text.FlashGetReadRetryDefault,"ax",%progbits
 	.align	1
-	.global	FlashProgSlc2KPages
+	.global	FlashGetReadRetryDefault
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashProgSlc2KPages, %function
-FlashProgSlc2KPages:
-.LFB259:
-	.loc 2 2818 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 56
+	.type	FlashGetReadRetryDefault, %function
+FlashGetReadRetryDefault:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r3, r0
+	cbz	r0, .L1372
+	subs	r2, r0, #1
+	cmp	r2, #6
+	bhi	.L1374
+	b	HynixGetReadRetryDefault
+.L1374:
+	cmp	r0, #49
+	bne	.L1375
+	ldr	r0, .L1395
+	movs	r2, #64
+	ldr	r1, .L1395+4
+	strb	r3, [r0]
+	movs	r3, #4
+	strb	r3, [r0, #1]
+	movs	r3, #15
+	strb	r3, [r0, #2]
+.L1393:
+	adds	r0, r0, #4
+	b	ftl_memcpy
+.L1375:
+	cmp	r0, #33
+	beq	.L1376
+	sub	r2, r0, #65
+	cmp	r2, #1
+	bhi	.L1377
+.L1376:
+	ldr	r0, .L1395
+	strb	r3, [r0]
+	movs	r3, #4
+.L1394:
+	strb	r3, [r0, #1]
+	movs	r3, #7
+	strb	r3, [r0, #2]
+	movs	r2, #45
+	ldr	r1, .L1395+8
+	b	.L1393
+.L1377:
+	cmp	r0, #34
+	beq	.L1378
+	cmp	r0, #67
+	bne	.L1379
+.L1378:
+	ldr	r0, .L1395
+	strb	r3, [r0]
+	movs	r3, #5
+	b	.L1394
+.L1379:
+	cmp	r0, #35
+	beq	.L1380
+	cmp	r0, #68
+	bne	.L1372
+.L1380:
+	ldr	r0, .L1395
+	movs	r2, #95
+	ldr	r1, .L1395+12
+	strb	r3, [r0]
+	movs	r3, #5
+	strb	r3, [r0, #1]
+	movs	r3, #17
+	strb	r3, [r0, #2]
+	b	.L1393
+.L1372:
+	bx	lr
+.L1396:
+	.align	2
+.L1395:
+	.word	.LANCHOR20
+	.word	.LANCHOR14
+	.word	.LANCHOR9
+	.word	.LANCHOR11
+	.size	FlashGetReadRetryDefault, .-FlashGetReadRetryDefault
+	.section	.text.FlashInit,"ax",%progbits
+	.align	1
+	.global	FlashInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashInit, %function
+FlashInit:
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1724:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	sub	sp, sp, #64
-	.cfi_def_cfa_offset 96
-	.loc 2 2818 0
-	str	r3, [sp, #12]
-	mov	r10, r1
-	mov	r8, r2
 	mov	r4, r0
-	.loc 2 2825 0
-	ldr	r3, .L1559
-.LVL1725:
-	.loc 2 2827 0
-	mov	r6, r0
-	.loc 2 2852 0
-	ldr	fp, .L1559+28
-	.loc 2 2827 0
-	movs	r7, #0
-	.loc 2 2825 0
-	ldrb	r3, [r3, #9]	@ zero_extendqisi2
-	str	r3, [sp, #8]
-.LVL1726:
-.L1531:
-	.loc 2 2827 0 discriminator 1
-	cmp	r7, r10
-	bne	.L1537
-	.loc 2 2866 0
-	ldr	r3, [sp, #12]
-	cmp	r3, #0
-	bne	.L1548
-.LVL1727:
-.L1558:
-	.loc 2 2899 0
-	movs	r0, #0
-	add	sp, sp, #64
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1728:
-.L1537:
-	.cfi_restore_state
-	.loc 2 2832 0
-	sub	r3, r10, r7
-	add	r2, sp, #20
-	uxtb	r3, r3
-	mov	r1, r8
-	mov	r0, r6
-	str	r3, [sp]
-	add	r3, sp, #24
-	bl	LogAddr2PhyAddr
-.LVL1729:
-	.loc 2 2834 0
-	ldr	r2, .L1559+4
-	ldr	r3, [sp, #24]
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cmp	r2, r3
-	bhi	.L1532
-	.loc 2 2835 0
-	mov	r3, #-1
-	str	r3, [r6]
-.L1533:
-	.loc 2 2827 0 discriminator 2
-	adds	r7, r7, #1
-.LVL1730:
-	adds	r6, r6, #36
-	b	.L1531
-.L1532:
-	.loc 2 2838 0
-	ldr	r2, .L1559+8
-	ldrb	r5, [r2, r3]	@ zero_extendqisi2
-.LVL1731:
-	.loc 2 2839 0
-	mov	r0, r5
-	bl	NandcWaitFlashReady
-.LVL1732:
-	.loc 2 2840 0
-	mov	r0, r5
+	sub	sp, sp, #32
+	mov	r0, #32768
+	movs	r5, #0
+	bl	ftl_malloc
+	ldr	r3, .L1490
+	ldr	r10, .L1490+132
+	ldr	r8, .L1490+136
+	str	r0, [r3]
+	mov	r0, #32768
+	bl	ftl_malloc
+	ldr	r3, .L1490+4
+	ldr	r6, .L1490+8
+	ldr	r7, .L1490+12
+	str	r0, [r3]
+	mov	r0, #4096
+	bl	ftl_malloc
+	ldr	r3, .L1490+16
+	str	r0, [r3]
+	mov	r0, #32768
+	bl	ftl_malloc
+	ldr	r3, .L1490+20
+	str	r0, [r3]
+	mov	r0, #4096
+	bl	ftl_malloc
+	ldr	r3, .L1490+24
+	ldr	r2, .L1490+28
+	strb	r5, [r8]
+	str	r0, [r3]
+	movs	r3, #50
+	strb	r3, [r10]
+	mov	r0, r4
+	strb	r3, [r2]
+	movs	r2, #128
+	ldr	r3, .L1490+32
+	ldr	r4, .L1490+36
+	strb	r5, [r7]
+	str	r5, [r3]
+	ldr	r3, .L1490+40
+	str	r2, [r3]
+	ldr	r3, .L1490+44
+	str	r5, [r3]
+	movs	r3, #60
+	strb	r3, [r6]
+	bl	NandcInit
+	str	r10, [sp, #20]
+	ldr	r10, .L1490+140
+	str	r8, [sp, #16]
+	mov	r8, r6
+	mov	r6, r4
+.L1402:
+	uxtb	fp, r5
+	mov	r0, fp
+	bl	FlashReset
+	add	r1, r10, r5, lsl #3
+	ldr	r3, [r10, r5, lsl #3]
+	mov	r0, fp
+	ldrb	r1, [r1, #4]	@ zero_extendqisi2
+	str	r3, [sp, #28]
+	str	r1, [sp, #24]
 	bl	NandcFlashCs
-.LVL1733:
-	.loc 2 2841 0
-	ldr	r1, [sp, #20]
-	mov	r0, r5
-	bl	FlashProgFirstCmd
-.LVL1734:
-	.loc 2 2842 0
-	ldr	r3, [r6, #12]
-	movs	r1, #1
-	ldr	r2, [sp, #8]
-	mov	r0, r5
-	str	r3, [sp]
-	ldr	r3, [r6, #8]
-	bl	NandcXferData
-.LVL1735:
-	.loc 2 2843 0
-	ldr	r1, [sp, #20]
-	mov	r0, r5
-	bl	FlashProgSecondCmd
-.LVL1736:
-	.loc 2 2844 0
-	mov	r0, r5
-	bl	NandcWaitFlashReady
-.LVL1737:
-	.loc 2 2845 0
-	ldr	r1, [sp, #20]
-	mov	r0, r5
-	bl	FlashReadStatus
-.LVL1738:
-	.loc 2 2847 0
-	sbfx	r0, r0, #0, #1
-.LVL1739:
-	.loc 2 2852 0
-	ldr	r1, [sp, #20]
-	.loc 2 2850 0
-	str	r0, [r6]
-	.loc 2 2852 0
-	mov	r0, r5
-	ldr	r3, [fp]
-	add	r1, r1, r3
-	bl	FlashProgFirstCmd
-.LVL1740:
-	.loc 2 2854 0
-	ldr	r3, [r6, #8]
-	.loc 2 2853 0
-	cbz	r3, .L1534
-	.loc 2 2853 0 is_stmt 0 discriminator 1
-	add	r3, r3, #2048
-.L1534:
-	.loc 2 2855 0 is_stmt 1 discriminator 4
-	ldr	r2, [r6, #12]
-	.loc 2 2853 0 discriminator 4
-	cbz	r2, .L1535
-	.loc 2 2853 0 is_stmt 0 discriminator 5
-	adds	r2, r2, #8
-.L1535:
-	.loc 2 2853 0 discriminator 8
-	str	r2, [sp]
-	movs	r1, #1
-	ldr	r2, [sp, #8]
-	mov	r0, r5
-	bl	NandcXferData
-.LVL1741:
-	.loc 2 2856 0 is_stmt 1 discriminator 8
-	ldr	r3, [fp]
-	mov	r0, r5
-	ldr	r1, [sp, #20]
-	add	r1, r1, r3
-	bl	FlashProgSecondCmd
-.LVL1742:
-	.loc 2 2857 0 discriminator 8
-	mov	r0, r5
-	bl	NandcWaitFlashReady
-.LVL1743:
-	.loc 2 2858 0 discriminator 8
-	ldr	r1, [sp, #20]
-	mov	r0, r5
-	bl	FlashReadStatus
-.LVL1744:
-	.loc 2 2860 0 discriminator 8
-	lsls	r2, r0, #31
-	.loc 2 2863 0 discriminator 8
-	mov	r0, r5
-.LVL1745:
-	.loc 2 2861 0 discriminator 8
-	itt	mi
-	movmi	r3, #-1
-	strmi	r3, [r6]
-	.loc 2 2863 0 discriminator 8
+	ldr	r1, [sp, #24]
+	movs	r0, #200
+	ldr	r3, [sp, #28]
+	add	r3, r3, r1, lsl #8
+	movs	r1, #144
+	str	r1, [r3, #2056]
+	movs	r1, #0
+	str	r1, [r3, #2052]
+	str	r3, [sp, #24]
+	bl	udelay
+	ldr	r3, [sp, #24]
+	mov	r0, fp
+	ldr	r1, [r3, #2048]
+	strb	r1, [r4]
+	ldr	r1, [r3, #2048]
+	strb	r1, [r4, #1]
+	ldr	r1, [r3, #2048]
+	strb	r1, [r4, #2]
+	ldr	r1, [r3, #2048]
+	strb	r1, [r4, #3]
+	ldr	r1, [r3, #2048]
+	strb	r1, [r4, #4]
+	ldr	r3, [r3, #2048]
+	strb	r3, [r4, #5]
 	bl	NandcFlashDeCs
-.LVL1746:
-	b	.L1533
-.LVL1747:
-.L1544:
-.LBB414:
-	.loc 2 2869 0
-	ldr	r3, [r4]
-	adds	r3, r3, #1
-	bne	.L1539
-	.loc 2 2870 0
-	ldr	r1, [r4, #4]
-	ldr	r0, .L1559+12
-	bl	printf
-.LVL1748:
-.L1540:
-.LBE414:
-	.loc 2 2867 0 discriminator 2
-	adds	r6, r6, #1
-.LVL1749:
-	adds	r4, r4, #36
-.LVL1750:
-.L1538:
-	.loc 2 2867 0 is_stmt 0 discriminator 1
-	cmp	r7, r6
-	bne	.L1544
-	b	.L1558
-.L1539:
-.LBB415:
-	.loc 2 2873 0 is_stmt 1
-	subs	r3, r7, r6
-	add	r2, sp, #20
+	ldrb	r2, [r4]	@ zero_extendqisi2
+	subs	r3, r2, #1
 	uxtb	r3, r3
-	mov	r1, r8
-	mov	r0, r4
-	.loc 2 2875 0
-	ldr	fp, .L1559+32
-	.loc 2 2873 0
-	str	r3, [sp]
-	add	r3, sp, #24
-	bl	LogAddr2PhyAddr
-.LVL1751:
-	.loc 2 2874 0
-	ldr	r2, [r10]
-	movs	r3, #0
-	.loc 2 2876 0
-	mov	ip, r4
-	add	r5, sp, #28
-	.loc 2 2874 0
-	str	r3, [r2]
-	.loc 2 2875 0
-	ldr	r2, [fp]
-	str	r3, [r2]
-	.loc 2 2876 0
-	ldmia	ip!, {r0, r1, r2, r3}
-	stmia	r5!, {r0, r1, r2, r3}
-	ldmia	ip!, {r0, r1, r2, r3}
-	stmia	r5!, {r0, r1, r2, r3}
-	.loc 2 2879 0
-	mov	r2, r8
-	.loc 2 2876 0
-	ldr	r3, [ip]
-	.loc 2 2879 0
-	movs	r1, #1
-	add	r0, sp, #28
-	.loc 2 2876 0
-	str	r3, [r5]
-	.loc 2 2877 0
-	ldr	r3, [r10]
-	str	r3, [sp, #36]
-	.loc 2 2878 0
-	ldr	r3, [fp]
-	str	r3, [sp, #40]
-	.loc 2 2879 0
-	bl	FlashReadPages
-.LVL1752:
-	.loc 2 2880 0
-	ldr	r5, [sp, #28]
-	adds	r3, r5, #1
-	bne	.L1541
-	.loc 2 2881 0
-	ldr	r1, [r4, #4]
-	ldr	r0, .L1559+16
-	bl	printf
-.LVL1753:
-	.loc 2 2882 0
-	str	r5, [r4]
-.L1541:
-	.loc 2 2884 0
-	ldr	r3, [r4, #12]
-	cbz	r3, .L1542
-	.loc 2 2885 0
-	ldr	r2, [r3]
-	ldr	r3, [fp]
-	ldr	r3, [r3]
-	cmp	r2, r3
-	beq	.L1542
-	.loc 2 2886 0
-	ldr	r1, [r4, #4]
-	ldr	r0, .L1559+20
-	bl	printf
-.LVL1754:
-	.loc 2 2887 0
-	mov	r3, #-1
-	str	r3, [r4]
-.L1542:
-	.loc 2 2890 0
-	ldr	r3, [r4, #8]
-	cmp	r3, #0
-	beq	.L1540
-	.loc 2 2891 0
-	ldr	r2, [r3]
-	ldr	r3, [r10]
-	ldr	r3, [r3]
-	cmp	r2, r3
-	beq	.L1540
-	.loc 2 2892 0
-	ldr	r1, [r4, #4]
-	ldr	r0, .L1559+24
+	cmp	r3, #253
+	bhi	.L1398
+	ldrb	r1, [r4, #5]	@ zero_extendqisi2
+	ldrb	r3, [r4, #1]	@ zero_extendqisi2
+	ldr	r0, .L1490+48
+	str	r1, [sp, #12]
+	ldrb	r1, [r4, #4]	@ zero_extendqisi2
+	str	r1, [sp, #8]
+	ldrb	r1, [r4, #3]	@ zero_extendqisi2
+	str	r1, [sp, #4]
+	ldrb	r1, [r4, #2]	@ zero_extendqisi2
+	str	r1, [sp]
+	adds	r1, r5, #1
 	bl	printf
-.LVL1755:
-	.loc 2 2893 0
-	mov	r3, #-1
+.L1398:
+	cbnz	r5, .L1399
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	subs	r3, r3, #1
+	uxtb	r3, r3
+	cmp	r3, #253
+	bhi	.L1443
+	ldrb	r3, [r6, #1]	@ zero_extendqisi2
+	cmp	r3, #255
+	beq	.L1443
+.L1399:
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	adds	r5, r5, #1
+	adds	r4, r4, #8
+	cmp	r3, #181
+	itt	eq
+	moveq	r3, #44
+	strbeq	r3, [r4, #-8]
+	cmp	r5, #4
+	bne	.L1402
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	cmp	r3, #173
+	beq	.L1403
+	ldr	r3, .L1490+52
+	ldr	r0, [r3]
+	bl	NandcSetDdrMode
+.L1403:
+	mov	r2, #852
+	movs	r1, #0
+	ldr	r0, .L1490+56
+	bl	ftl_memset
+	ldr	r4, .L1490+60
+	ldr	r3, .L1490+64
+	ldr	r5, .L1490+68
 	str	r3, [r4]
-	b	.L1540
-.LVL1756:
-.L1548:
-.LBE415:
-	movs	r6, #0
-.LBB416:
-	.loc 2 2874 0
-	ldr	r10, .L1559+36
-.LVL1757:
-	b	.L1538
-.L1560:
-	.align	2
-.L1559:
-	.word	.LANCHOR30
-	.word	.LANCHOR25
-	.word	.LANCHOR26
-	.word	.LC27
-	.word	.LC28
-	.word	.LC29
-	.word	.LC30
-	.word	.LANCHOR3
-	.word	.LANCHOR196
-	.word	.LANCHOR195
-.LBE416:
-	.cfi_endproc
-.LFE259:
-	.size	FlashProgSlc2KPages, .-FlashProgSlc2KPages
-	.section	.text.FlashProgPages,"ax",%progbits
-	.align	1
-	.global	FlashProgPages
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FlashProgPages, %function
-FlashProgPages:
-.LFB262:
-	.loc 2 3108 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 64
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1758:
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	sub	sp, sp, #72
-	.cfi_def_cfa_offset 104
-	.loc 2 3115 0
-	ldr	r5, .L1613
-	.loc 2 3108 0
-	mov	r4, r0
-	mov	r8, r2
-	str	r1, [sp, #8]
-	.loc 2 3115 0
-	ldr	r5, [r5]
-	.loc 2 3108 0
-	str	r3, [sp, #20]
-	.loc 2 3115 0
-	ldrb	r5, [r5, #19]	@ zero_extendqisi2
-	str	r5, [sp, #16]
-.LVL1759:
-	.loc 2 3120 0
-	ldr	r5, .L1613+4
-.LVL1760:
-	ldrb	r7, [r5]	@ zero_extendqisi2
-	cbnz	r7, .L1562
-	.loc 2 3116 0
-	ldr	r3, .L1613+8
-.LVL1761:
-	ldrb	r3, [r3, #9]	@ zero_extendqisi2
-	str	r3, [sp, #12]
-.LVL1762:
-.L1563:
-	.loc 2 3123 0 discriminator 1
-	ldr	r3, [sp, #8]
-	cmp	r7, r3
-	bcc	.L1576
-	.loc 2 3180 0 discriminator 1
-	ldr	r6, .L1613+12
-	movs	r5, #0
-	.loc 2 3182 0 discriminator 1
-	ldr	r7, .L1613+16
-.LVL1763:
-.L1577:
-	.loc 2 3180 0 discriminator 1
-	ldrb	r3, [r6]	@ zero_extendqisi2
-	cmp	r5, r3
-	bcc	.L1579
-	.loc 2 3186 0
-	ldr	r3, [sp, #20]
-	cmp	r3, #0
-	bne	.L1580
-.LVL1764:
-.L1588:
-	.loc 2 3218 0
-	movs	r0, #0
-	b	.L1561
-.LVL1765:
-.L1562:
-	.loc 2 3121 0
-	bl	FlashProgSlc2KPages
-.LVL1766:
-.L1561:
-	.loc 2 3219 0
-	add	sp, sp, #72
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1767:
-.L1576:
-	.cfi_restore_state
-	.loc 2 3124 0
-	ldr	r3, [sp, #8]
-	movs	r6, #36
-	muls	r6, r7, r6
-	add	r2, sp, #28
-	mov	r1, r8
-	subs	r3, r3, r7
-	uxtb	r3, r3
-	add	fp, r4, r6
-	str	r3, [sp]
-	mov	r0, fp
-	add	r3, sp, #32
-	bl	LogAddr2PhyAddr
-.LVL1768:
-	.loc 2 3125 0
-	ldr	r3, .L1613+12
-	.loc 2 3124 0
-	mov	r10, r0
-.LVL1769:
-	.loc 2 3125 0
-	ldr	r0, [sp, #32]
-.LVL1770:
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, r0
-	bhi	.L1565
-	.loc 2 3126 0
-	mov	r3, #-1
-	str	r3, [r4, r6]
-.L1566:
-	.loc 2 3123 0 discriminator 2
-	adds	r7, r7, #1
-.LVL1771:
-	b	.L1563
-.L1565:
-	.loc 2 3129 0
-	ldr	r3, .L1613+20
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	.loc 2 3130 0
-	cmp	r3, #0
-	.loc 2 3131 0
-	ldr	r3, .L1613+24
-	.loc 2 3130 0
-	it	eq
-	moveq	r10, #0
-.LVL1772:
-	.loc 2 3131 0
-	add	r3, r3, r0, lsl #4
-	ldr	r3, [r3, #8]
-	cbz	r3, .L1568
-	.loc 2 3134 0
-	uxtb	r0, r0
-	bl	FlashWaitCmdDone
-.LVL1773:
-.L1568:
-	.loc 2 3136 0
-	ldr	r3, [sp, #32]
-	.loc 2 3137 0
-	movs	r1, #0
-	.loc 2 3136 0
-	ldr	r2, .L1613+24
-	add	r2, r2, r3, lsl #4
-	.loc 2 3137 0
-	str	r1, [r2, #12]
-	.loc 2 3138 0
-	ldr	r1, [sp, #28]
-	.loc 2 3136 0
-	str	fp, [r2, #8]
-	.loc 2 3138 0
-	str	r1, [r2, #4]
-	.loc 2 3141 0
-	cmp	r10, #0
-	beq	.L1569
-	.loc 2 3142 0
-	add	r1, r6, #36
-	add	r1, r1, r4
-	str	r1, [r2, #12]
-.L1569:
-	.loc 2 3143 0
-	ldr	r2, .L1613+28
-	ldrb	r5, [r2, r3]	@ zero_extendqisi2
-.LVL1774:
-	.loc 2 3144 0
-	lsls	r3, r3, #4
-	ldr	r2, .L1613+24
-	.loc 2 3146 0
-	mov	r0, r5
-	.loc 2 3144 0
-	strb	r5, [r2, r3]
-	.loc 2 3145 0
-	ldr	r3, .L1613+12
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #1
-	bne	.L1570
-	.loc 2 3146 0
-	bl	NandcWaitFlashReady
-.LVL1775:
-.L1571:
-	.loc 2 3152 0
-	ldr	r3, [sp, #16]
-	subs	r3, r3, #1
-	cmp	r3, #6
-	bhi	.L1572
-	.loc 2 3153 0
-	ldr	r3, .L1613+32
-	ldrb	r3, [r3, r5]	@ zero_extendqisi2
-	cbz	r3, .L1572
-	.loc 2 3154 0
-	ldr	r1, .L1613+36
 	movs	r3, #0
-	mov	r0, r5
-	adds	r2, r1, #4
-	ldrb	r1, [r1, #1]	@ zero_extendqisi2
-	bl	HynixSetRRPara
-.LVL1776:
-.L1572:
-	.loc 2 3156 0
-	mov	r0, r5
-	bl	NandcFlashCs
-.LVL1777:
-	.loc 2 3157 0
-	cmp	r8, #1
-	.loc 2 3158 0
-	mov	r0, r5
-	.loc 2 3157 0
-	bne	.L1573
-	.loc 2 3157 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1613+16
+	strb	r3, [r5]
+	ldrb	r3, [r6, #1]	@ zero_extendqisi2
+	cmp	r3, #161
+	beq	.L1404
+	cmp	r3, #218
+	beq	.L1404
+	and	r2, r3, #223
+	cmp	r2, #209
+	beq	.L1404
+	cmp	r3, #220
+	bne	.L1405
+	ldrb	r2, [r6, #3]	@ zero_extendqisi2
+	cmp	r2, #149
+	bne	.L1405
+.L1404:
+	ldr	r1, [sp, #16]
+	movs	r2, #1
+	strb	r2, [r1]
+	movs	r2, #16
+	ldr	r1, [sp, #20]
+	strb	r2, [r8]
+	strb	r2, [r1]
+	ldrb	r1, [r6]	@ zero_extendqisi2
+	ldr	r2, .L1490+72
+	cmp	r1, #152
+	strb	r1, [r2, #1]
+	strb	r3, [r2, #2]
+	bne	.L1406
+	ldrsb	r1, [r6, #4]
+	cmp	r1, #0
+	itt	ge
+	movge	r1, #24
+	strbge	r1, [r8]
+.L1406:
+	ldr	r1, .L1490+76
+	ldr	r0, .L1490+80
+	ldr	r1, [r1]
+	cmp	r1, r0
+	beq	.L1407
+	movw	r0, #2049
+	cmp	r1, r0
+	bne	.L1408
+.L1407:
+	movs	r1, #16
+	strb	r1, [r8]
+.L1408:
+	cmp	r3, #218
+	bne	.L1409
+	mov	r1, #2048
+.L1486:
+	strh	r1, [r2, #14]	@ movhi
+	strb	r3, [r2, #2]
+.L1410:
+	movs	r2, #32
+	ldr	r1, .L1490+84
+	ldr	r0, .L1490+88
+	bl	ftl_memcpy
+	movs	r2, #32
+	ldr	r1, .L1490+72
+	ldr	r0, .L1490+64
+	bl	ftl_memcpy
+.L1405:
+	ldr	r3, [sp, #16]
+	ldr	r8, .L1490+144
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1573
-	.loc 2 3158 0 is_stmt 1
-	bl	flash_enter_slc_mode
-.LVL1778:
-.L1574:
-	.loc 2 3161 0
-	ldr	r1, [sp, #28]
-	mov	r0, r5
-	bl	FlashProgFirstCmd
-.LVL1779:
-	.loc 2 3162 0
-	ldr	r3, [fp, #12]
-	movs	r1, #1
-	ldr	r2, [sp, #12]
-	mov	r0, r5
-	str	r3, [sp]
-	ldr	r3, [fp, #8]
-	bl	NandcXferData
-.LVL1780:
-	.loc 2 3163 0
-	cmp	r10, #0
-	beq	.L1575
-	.loc 2 3164 0
-	ldr	r1, [sp, #28]
-	mov	r0, r5
-	bl	FlashProgDpFirstCmd
-.LVL1781:
-	.loc 2 3165 0
-	ldr	r3, .L1613+40
-	mov	r0, r5
-	ldr	r2, [sp, #32]
-	.loc 2 3167 0
-	adds	r6, r6, #36
-	.loc 2 3165 0
-	ldr	r1, [sp, #28]
-	.loc 2 3167 0
-	add	r6, r6, r4
-	.loc 2 3165 0
-	ldr	r2, [r3, r2, lsl #2]
-	adds	r2, r2, #0
-	it	ne
-	movne	r2, #1
-	bl	FlashWaitReadyEN
-.LVL1782:
-	.loc 2 3166 0
-	ldr	r3, .L1613+44
-	mov	r0, r5
-	ldr	r1, [sp, #28]
-	ldr	r3, [r3]
-	add	r1, r1, r3
-	bl	FlashProgDpSecondCmd
-.LVL1783:
-	.loc 2 3167 0
-	ldr	r3, [r6, #12]
-	movs	r1, #1
-	ldr	r2, [sp, #12]
-	mov	r0, r5
-	str	r3, [sp]
-	ldr	r3, [r6, #8]
-	bl	NandcXferData
-.LVL1784:
-.L1575:
-	.loc 2 3169 0
-	ldr	r1, [sp, #28]
-	mov	r0, r5
-	bl	FlashProgSecondCmd
-.LVL1785:
-	.loc 2 3170 0
-	mov	r0, r5
-	.loc 2 3171 0
-	add	r7, r7, r10
-.LVL1786:
-	.loc 2 3170 0
-	bl	NandcFlashDeCs
-.LVL1787:
-	b	.L1566
-.L1570:
-	.loc 2 3148 0
-	bl	NandcFlashCs
-.LVL1788:
-	.loc 2 3149 0
-	ldr	r2, [sp, #32]
-	mov	r0, r5
-	ldr	r3, .L1613+40
-	ldr	r1, [sp, #28]
-	ldr	r2, [r3, r2, lsl #2]
-	adds	r2, r2, #0
-	it	ne
-	movne	r2, #1
-	bl	FlashWaitReadyEN
-.LVL1789:
-	.loc 2 3150 0
-	mov	r0, r5
-	bl	NandcFlashDeCs
-.LVL1790:
-	b	.L1571
-.L1573:
-	.loc 2 3160 0
-	bl	flash_exit_slc_mode
-.LVL1791:
-	b	.L1574
-.LVL1792:
-.L1579:
-	.loc 2 3181 0
-	uxtb	r0, r5
-	bl	FlashWaitCmdDone
-.LVL1793:
-	.loc 2 3182 0
-	cmp	r8, #1
-	bne	.L1578
-	.loc 2 3182 0 is_stmt 0 discriminator 1
-	ldrb	r3, [r7]	@ zero_extendqisi2
-	cbz	r3, .L1578
-	.loc 2 3183 0 is_stmt 1
-	ldr	r2, .L1613+24
-	lsls	r3, r5, #4
-	ldrb	r0, [r2, r3]	@ zero_extendqisi2
-	bl	flash_exit_slc_mode
-.LVL1794:
-.L1578:
-	.loc 2 3180 0 discriminator 2
-	adds	r5, r5, #1
-.LVL1795:
-	b	.L1577
-.L1580:
-.LBB417:
-	.loc 2 3194 0
-	ldr	r7, .L1613+48
-.LBE417:
-	.loc 2 3186 0
-	movs	r6, #0
-.LVL1796:
-.L1581:
-	.loc 2 3187 0 discriminator 1
-	ldr	r3, [sp, #8]
-	cmp	r6, r3
-	beq	.L1588
-.LBB418:
-	.loc 2 3189 0
+	bne	.L1412
+	bl	FlashLoadPhyInfoInRam
+	cbnz	r0, .L1414
 	ldr	r3, [r4]
-	adds	r3, r3, #1
-	bne	.L1582
-	.loc 2 3190 0
-	ldr	r1, [r4, #4]
-	ldr	r0, .L1613+52
+	ldr	r10, .L1490+100
+	ldrh	r3, [r3, #16]
+	lsrs	r3, r3, #8
+	lsls	r1, r3, #31
+	and	r0, r3, #7
+	strb	r0, [r10]
+	bmi	.L1414
+	movs	r3, #1
+	strb	r3, [r7]
+	bl	FlashSetInterfaceMode
+	ldrb	r0, [r10]	@ zero_extendqisi2
+	bl	NandcSetMode
+.L1414:
+	ldr	r3, [r4]
+	ldrb	r3, [r3, #26]	@ zero_extendqisi2
+	strb	r3, [r8]
+	bl	FlashLoadPhyInfo
+	cmp	r0, #0
+	beq	.L1412
+	ldr	r3, [r4]
+	ldr	r0, .L1490+92
+	ldrh	r1, [r3, #14]
 	bl	printf
-.LVL1797:
-.L1583:
-.LBE418:
-	.loc 2 3187 0 discriminator 2
-	adds	r6, r6, #1
-.LVL1798:
-	adds	r4, r4, #36
-	b	.L1581
-.L1582:
-.LBB419:
-	.loc 2 3193 0
-	ldr	r3, [sp, #8]
-	add	r2, sp, #28
-	mov	r1, r8
-	mov	r0, r4
-	.loc 2 3195 0
-	ldr	r10, .L1613+68
-	.loc 2 3196 0
-	add	r5, sp, #36
-	.loc 2 3193 0
-	subs	r3, r3, r6
-	uxtb	r3, r3
-	str	r3, [sp]
-	add	r3, sp, #32
-	bl	LogAddr2PhyAddr
-.LVL1799:
-	.loc 2 3194 0
-	ldr	r2, [r7]
-	movs	r3, #0
-	.loc 2 3196 0
-	mov	ip, r4
-	.loc 2 3194 0
-	str	r3, [r2]
-	.loc 2 3195 0
-	ldr	r2, [r10]
-	str	r3, [r2]
-	.loc 2 3196 0
-	ldmia	ip!, {r0, r1, r2, r3}
-	stmia	r5!, {r0, r1, r2, r3}
-	ldmia	ip!, {r0, r1, r2, r3}
-	stmia	r5!, {r0, r1, r2, r3}
-	.loc 2 3199 0
-	mov	r2, r8
-	.loc 2 3196 0
-	ldr	r3, [ip]
-	.loc 2 3199 0
-	movs	r1, #1
-	add	r0, sp, #36
-	.loc 2 3196 0
-	str	r3, [r5]
-	.loc 2 3197 0
-	ldr	r3, [r7]
-	str	r3, [sp, #44]
-	.loc 2 3198 0
-	ldr	r3, [r10]
-	str	r3, [sp, #48]
-	.loc 2 3199 0
-	bl	FlashReadPages
-.LVL1800:
-	.loc 2 3200 0
-	ldr	r5, [sp, #36]
-	adds	r3, r5, #1
-	bne	.L1584
-	.loc 2 3201 0
-	ldr	r1, [r4, #4]
-	ldr	r0, .L1613+56
-	bl	printf
-.LVL1801:
-	.loc 2 3202 0
-	str	r5, [r4]
-.L1584:
-	.loc 2 3204 0
-	ldr	r3, [r4, #12]
-	cbz	r3, .L1585
-	.loc 2 3205 0
-	ldr	r2, [r3]
-	ldr	r3, [r10]
-	ldr	r3, [r3]
-	cmp	r2, r3
-	beq	.L1585
-	.loc 2 3206 0
-	ldr	r1, [r4, #4]
-	ldr	r0, .L1613+60
-	bl	printf
-.LVL1802:
-	.loc 2 3207 0
-	mov	r3, #-1
-	str	r3, [r4]
-.L1585:
-	.loc 2 3210 0
-	ldr	r3, [r4, #8]
-	cmp	r3, #0
-	beq	.L1583
-	.loc 2 3211 0
+	bl	FlashLoadPhyInfoInRam
+	adds	r2, r0, #1
+	beq	.L1397
+	bl	FlashDieInfoInit
+	ldr	r3, [r4]
+	ldrb	r0, [r3, #19]	@ zero_extendqisi2
+	bl	FlashGetReadRetryDefault
+	ldr	r3, [r4]
+	ldr	r2, .L1490+96
+	ldrb	r1, [r3, #9]	@ zero_extendqisi2
+	ldrh	r2, [r2]
+	addw	r2, r2, #4095
+	cmp	r1, r2, asr #12
+	blt	.L1417
+	ldrh	r2, [r3, #14]
+	adds	r2, r2, #255
+	cmp	r1, r2, asr #8
+	bge	.L1418
+.L1417:
+	ldrh	r2, [r3, #14]
+	bic	r2, r2, #255
+	strh	r2, [r3, #14]	@ movhi
+.L1418:
+	ldr	r3, .L1490+100
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	tst	r3, #6
+	beq	.L1419
+	bl	FlashSavePhyInfo
+	ldr	r3, .L1490+104
+	movs	r0, #0
+	ldr	r1, [r3]
+	bl	FlashDdrParaScan
+.L1419:
+	bl	FlashSavePhyInfo
+.L1412:
+	ldr	fp, [r4]
+	ldr	r10, .L1490+100
+	ldrb	r3, [fp, #26]	@ zero_extendqisi2
+	ldrh	r0, [fp, #10]
+	strb	r3, [r8]
+	ldrh	r3, [fp, #16]
+	ubfx	r2, r3, #7, #1
+	ubfx	r1, r3, #3, #1
+	strb	r2, [r5]
+	ldr	r2, .L1490+108
+	ldr	r5, .L1490+112
+	strb	r1, [r2]
+	ubfx	r1, r3, #4, #1
+	ldr	r2, .L1490+116
+	ubfx	r3, r3, #8, #3
+	strb	r3, [r10]
+	movs	r3, #0
+	str	r3, [r5]
+	strb	r1, [r2]
+	ldrb	r1, [fp, #12]	@ zero_extendqisi2
+	bl	__aeabi_idiv
+	mov	r1, r0
+	ldrb	r0, [fp, #18]	@ zero_extendqisi2
+	bl	BuildFlashLsbPageTable
+	bl	FlashDieInfoInit
+	ldr	r3, [r4]
+	mov	ip, r5
+	ldrh	r2, [r3, #16]
+	tst	r2, #64
+	beq	.L1421
+	ldrb	r0, [r3, #19]	@ zero_extendqisi2
+	ldr	r3, .L1490+120
+	ldr	r2, .L1490+124
+	strb	r0, [r3]
+	ldr	r3, .L1490+56
+	ldrb	r1, [r3, #1]	@ zero_extendqisi2
+	ldrb	lr, [r3, #2]	@ zero_extendqisi2
+	strb	r1, [r2]
+	ldr	r1, .L1490+128
+	strb	lr, [r1]
+	b	.L1491
+.L1492:
+	.align	2
+.L1490:
+	.word	.LANCHOR147
+	.word	.LANCHOR153
+	.word	.LANCHOR152
+	.word	.LANCHOR30
+	.word	.LANCHOR197
+	.word	.LANCHOR198
+	.word	.LANCHOR199
+	.word	.LANCHOR150
+	.word	.LANCHOR149
+	.word	.LANCHOR22
+	.word	.LANCHOR3
+	.word	.LANCHOR144
+	.word	.LC23
+	.word	.LANCHOR155
+	.word	.LANCHOR20
+	.word	.LANCHOR18
+	.word	.LANCHOR31
+	.word	.LANCHOR5
+	.word	.LANCHOR200
+	.word	.LANCHOR29
+	.word	1446522928
+	.word	.LANCHOR143+32
+	.word	.LANCHOR7
+	.word	.LC24
+	.word	.LANCHOR122
+	.word	.LANCHOR24
+	.word	.LANCHOR148
+	.word	.LANCHOR201
+	.word	.LANCHOR145
+	.word	.LANCHOR27
+	.word	.LANCHOR10
+	.word	.LANCHOR13
+	.word	.LANCHOR151
+	.word	.LANCHOR2
+	.word	.LANCHOR1
+	.word	.LANCHOR6
+	.word	.LANCHOR8
+.L1491:
+	add	lr, r0, #-1
+	cmp	lr, #6
+	mov	lr, r1
+	bhi	.L1422
+	ldr	r2, .L1493
+	str	r2, [r5]
+	subs	r2, r0, #5
+	cmp	r2, #1
+	bhi	.L1423
+	ldr	r2, .L1493+4
+	adds	r3, r3, #20
+	movs	r1, #1
+	str	r1, [r2]
+.L1424:
+	subs	r1, r3, #1
+	movs	r2, #0
+	adds	r3, r3, #31
+.L1426:
+	ldrsb	r5, [r1, #1]!
+	cbnz	r5, .L1425
+	adds	r2, r2, #1
+.L1425:
+	cmp	r3, r1
+	bne	.L1426
+	cmp	r2, #27
+	bls	.L1421
+	bl	FlashGetReadRetryDefault
+	bl	FlashSavePhyInfo
+.L1421:
+	ldr	r3, .L1493+8
 	ldr	r2, [r3]
-	ldr	r3, [r7]
-	ldr	r3, [r3]
+	ldr	r3, .L1493+12
 	cmp	r2, r3
-	beq	.L1583
-	.loc 2 3212 0
-	ldr	r1, [r4, #4]
-	ldr	r0, .L1613+64
-	bl	printf
-.LVL1803:
-	.loc 2 3213 0
-	mov	r3, #-1
+	bne	.L1437
+	ldrb	r3, [r8]	@ zero_extendqisi2
+	cbz	r3, .L1437
+	ldr	r3, [r4]
+	movs	r2, #0
+	strb	r2, [r3, #18]
+.L1437:
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	cmp	r3, #44
+	bne	.L1438
+	ldrb	r3, [r7]	@ zero_extendqisi2
+	cbz	r3, .L1438
+	movs	r3, #0
+	movs	r0, #1
+	strb	r3, [r7]
+	bl	FlashSetInterfaceMode
+	movs	r0, #1
+	bl	NandcSetMode
+.L1438:
+	movs	r0, #0
+	bl	flash_enter_slc_mode
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	tst	r3, #6
+	beq	.L1439
+	ldrb	r2, [r7]	@ zero_extendqisi2
+	cbnz	r2, .L1440
+	lsls	r3, r3, #31
+	bmi	.L1439
+.L1440:
+	ldr	r3, .L1493+16
+	movs	r0, #0
+	ldr	r1, [r3]
+	bl	FlashDdrParaScan
+.L1439:
+	movs	r0, #0
+	movs	r7, #16
+	bl	flash_exit_slc_mode
+	ldr	r3, [r4]
+	ldrb	r0, [r3, #20]	@ zero_extendqisi2
+	bl	FlashBchSel
+	ldr	r0, .L1493+20
+	bl	FlashReadIdbDataRaw
+	ldr	r8, [r4]
+	ldr	r3, [sp, #20]
+	ldr	r4, .L1493+24
+	ldrb	r1, [r8, #12]	@ zero_extendqisi2
+	strb	r7, [r3]
+	ldrh	r5, [r8, #10]
+	strh	r1, [r4, #8]	@ movhi
+	ldrb	r3, [r8, #7]	@ zero_extendqisi2
+	mov	r0, r5
+	str	r3, [r4, #4]
+	ldr	r3, [r6]
+	ldrh	r6, [r8, #14]
 	str	r3, [r4]
-	b	.L1583
-.L1614:
+	ldr	r3, .L1493+28
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	strh	r3, [r4, #10]	@ movhi
+	ldrb	r3, [r8, #13]	@ zero_extendqisi2
+	strh	r5, [r4, #16]	@ movhi
+	strh	r6, [r4, #14]	@ movhi
+	strh	r3, [r4, #12]	@ movhi
+	bl	__aeabi_idiv
+	mov	r2, #512
+	strh	r0, [r4, #18]	@ movhi
+	ldrb	r3, [r8, #9]	@ zero_extendqisi2
+	strh	r2, [r4, #24]	@ movhi
+	ldr	r2, [sp, #16]
+	strh	r3, [r4, #20]	@ movhi
+	smulbb	r5, r5, r3
+	strh	r7, [r4, #26]	@ movhi
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	uxth	r5, r5
+	cmp	r2, #1
+	strh	r5, [r4, #22]	@ movhi
+	bne	.L1441
+	lsls	r3, r3, #1
+	lsrs	r2, r6, #1
+	lsls	r5, r5, #1
+	strh	r3, [r4, #20]	@ movhi
+	movs	r3, #8
+	strh	r2, [r4, #14]	@ movhi
+	strh	r5, [r4, #22]	@ movhi
+	strh	r3, [r4, #26]	@ movhi
+.L1441:
+	ldrb	r0, [r8, #20]	@ zero_extendqisi2
+	bl	FlashBchSel
+	movs	r0, #0
+.L1397:
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1409:
+	cmp	r3, #220
+	bne	.L1410
+	mov	r1, #4096
+	b	.L1486
+.L1423:
+	add	r2, r3, #28
+	adds	r3, r3, #20
+	cmp	r0, #7
+	it	eq
+	moveq	r3, r2
+	b	.L1424
+.L1422:
+	sub	r3, r0, #17
+	cmp	r3, #2
+	bhi	.L1428
+	ldr	r3, .L1493+32
+	cmp	r0, #19
+	str	r3, [r5]
+	ite	ne
+	movne	r3, #7
+	moveq	r3, #15
+	strb	r3, [r1]
+	b	.L1421
+.L1428:
+	cmp	r0, #33
+	beq	.L1430
+	sub	r3, r0, #65
+	cmp	r3, #1
+	bhi	.L1431
+.L1430:
+	ldr	r3, .L1493+36
+	str	r3, [ip]
+	movs	r3, #4
+	strb	r3, [r2]
+	movs	r3, #7
+	strb	r3, [lr]
+	b	.L1421
+.L1431:
+	sub	r3, r0, #67
+	uxtb	r3, r3
+	cmp	r3, #1
+	bls	.L1432
+	sub	r1, r0, #34
+	cmp	r1, #1
+	bhi	.L1433
+.L1432:
+	ldr	r1, .L1493+36
+	cmp	r0, #35
+	str	r1, [ip]
+	ldr	r1, .L1493+40
+	beq	.L1434
+	cmp	r0, #68
+	beq	.L1434
+	movs	r0, #7
+.L1487:
+	cmp	r3, #1
+	strb	r0, [r1]
+	ite	ls
+	movls	r3, #4
+	movhi	r3, #5
+	strb	r3, [r2]
+	b	.L1421
+.L1434:
+	movs	r0, #17
+	b	.L1487
+.L1433:
+	cmp	r0, #49
+	itt	eq
+	ldreq	r3, .L1493+44
+	streq	r3, [r5]
+	b	.L1421
+.L1443:
+	mvn	r0, #1
+	b	.L1397
+.L1494:
 	.align	2
-.L1613:
-	.word	.LANCHOR18
-	.word	.LANCHOR1
-	.word	.LANCHOR30
+.L1493:
+	.word	HynixReadRetrial
+	.word	.LANCHOR36
+	.word	.LANCHOR29
+	.word	1446522928
+	.word	.LANCHOR148
+	.word	.LANCHOR141
+	.word	.LANCHOR15
 	.word	.LANCHOR25
-	.word	.LANCHOR8
-	.word	.LANCHOR27
-	.word	.LANCHOR23
-	.word	.LANCHOR26
-	.word	.LANCHOR21
-	.word	.LANCHOR20
-	.word	.LANCHOR17
-	.word	.LANCHOR3
-	.word	.LANCHOR195
-	.word	.LC27
-	.word	.LC28
-	.word	.LC29
-	.word	.LC30
-	.word	.LANCHOR196
-.LBE419:
-	.cfi_endproc
-.LFE262:
-	.size	FlashProgPages, .-FlashProgPages
-	.section	.text.FlashTestBlk,"ax",%progbits
+	.word	MicronReadRetrial
+	.word	ToshibaReadRetrial
+	.word	.LANCHOR151
+	.word	SamsungReadRetrial
+	.size	FlashInit, .-FlashInit
+	.section	.text.FlashReadSlc2KPages,"ax",%progbits
 	.align	1
-	.global	FlashTestBlk
+	.global	FlashReadSlc2KPages
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashTestBlk, %function
-FlashTestBlk:
-.LFB235:
-	.loc 2 1053 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 104
+	.type	FlashReadSlc2KPages, %function
+FlashReadSlc2KPages:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1804:
-	.loc 2 1058 0
-	ldr	r3, .L1618
-	.loc 2 1053 0
-	push	{r4, r5, lr}
-	.cfi_def_cfa_offset 12
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r8, r1
+	ldr	r3, .L1524
+	mov	fp, r2
 	mov	r4, r0
-	sub	sp, sp, #108
-	.cfi_def_cfa_offset 120
-	.loc 2 1058 0
+	movs	r7, #0
+	ldrb	r10, [r3, #9]	@ zero_extendqisi2
+.L1496:
+	cmp	r7, r8
+	bne	.L1509
+	movs	r0, #0
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1509:
+	sub	r3, r8, r7
+	add	r2, sp, #12
+	uxtb	r3, r3
+	mov	r1, fp
+	mov	r0, r4
+	str	r3, [sp]
+	add	r3, sp, #8
+	bl	LogAddr2PhyAddr
+	ldr	r2, .L1524+4
+	ldr	r3, [sp, #8]
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r2, r3
+	bhi	.L1497
+	mov	r3, #-1
+	str	r3, [r4]
+.L1498:
+	adds	r7, r7, #1
+	adds	r4, r4, #36
+	b	.L1496
+.L1497:
+	ldr	r2, .L1524+8
+	ldrb	r5, [r2, r3]	@ zero_extendqisi2
+	mov	r0, r5
+	bl	NandcWaitFlashReady
+	mov	r0, r5
+	bl	NandcFlashCs
+	ldr	r1, [sp, #12]
+	mov	r0, r5
+	bl	FlashReadCmd
+	mov	r0, r5
+	bl	NandcWaitFlashReady
+	ldr	r3, [r4, #12]
+	mov	r2, r10
+	movs	r1, #0
+	mov	r0, r5
+	str	r3, [sp]
+	ldr	r3, [r4, #8]
+	bl	NandcXferData
+	ldr	r3, .L1524+12
+	mov	r6, r0
+	ldr	r1, [sp, #12]
+	mov	r0, r5
 	ldr	r3, [r3]
-	cmp	r0, r3
-	bcc	.L1617
-.LVL1805:
-.LBB422:
-.LBB423:
-	.loc 2 1061 0
-	ldr	r5, .L1618+4
-	.loc 2 1062 0
-	add	r0, sp, #40
-.LVL1806:
-	.loc 2 1063 0
-	movs	r2, #32
-	movs	r1, #165
-	.loc 2 1062 0
-	str	r0, [sp, #16]
-	.loc 2 1065 0
-	lsls	r4, r4, #10
-.LVL1807:
-	.loc 2 1061 0
-	ldr	r3, [r5]
-	str	r3, [sp, #12]
-	.loc 2 1063 0
-	bl	ftl_memset
-.LVL1808:
-	.loc 2 1064 0
-	movs	r2, #8
-	movs	r1, #90
-	ldr	r0, [r5]
-	bl	ftl_memset
-.LVL1809:
-	.loc 2 1066 0
-	movs	r2, #1
-	add	r0, sp, #4
-	mov	r1, r2
-	.loc 2 1065 0
-	str	r4, [sp, #8]
-	.loc 2 1066 0
-	bl	FlashEraseBlocks
-.LVL1810:
-	.loc 2 1067 0
-	movs	r3, #1
-	add	r0, sp, #4
-	mov	r2, r3
-	mov	r1, r3
-	bl	FlashProgPages
-.LVL1811:
-	.loc 2 1068 0
-	ldr	r4, [sp, #4]
-	.loc 2 1074 0
-	movs	r2, #1
+	add	r1, r1, r3
+	bl	FlashReadCmd
+	ldr	r3, [r4, #8]
+	cbz	r3, .L1499
+	add	r3, r3, #2048
+.L1499:
+	ldr	r2, [r4, #12]
+	cbz	r2, .L1500
+	adds	r2, r2, #8
+.L1500:
+	str	r2, [sp]
 	movs	r1, #0
-	add	r0, sp, #4
-	.loc 2 1068 0
-	adds	r4, r4, #0
+	mov	r2, r10
+	mov	r0, r5
+	bl	NandcXferData
+	mov	r1, r0
+	mov	r0, r5
+	bl	NandcFlashDeCs
+	ldr	r3, .L1524+16
+	cmp	r6, r1
+	it	cc
+	movcc	r6, r1
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	add	r3, r2, r2, lsl #1
+	cmp	r6, r3, asr #2
+	bls	.L1501
+	adds	r5, r6, #1
 	it	ne
-	movne	r4, #1
-	negs	r4, r4
-.LDL1:
-.LVL1812:
-	.loc 2 1074 0
-	bl	FlashEraseBlocks
-.LVL1813:
-.L1615:
-.LBE423:
-.LBE422:
-	.loc 2 1076 0
-	mov	r0, r4
-	add	sp, sp, #108
-	.cfi_remember_state
-	.cfi_def_cfa_offset 12
-	@ sp needed
-	pop	{r4, r5, pc}
-.LVL1814:
-.L1617:
-	.cfi_restore_state
-	.loc 2 1059 0
-	movs	r4, #0
-	b	.L1615
-.L1619:
+	movne	r6, #256
+	str	r6, [r4]
+.L1504:
+	ldr	r3, [r4, #12]
+	cbz	r3, .L1505
+	ldr	r1, [r3, #12]
+	adds	r1, r1, #1
+	bne	.L1505
+	ldr	r1, [r3, #8]
+	adds	r0, r1, #1
+	bne	.L1505
+	ldr	r3, [r3]
+	adds	r3, r3, #1
+	it	ne
+	strne	r1, [r4]
+.L1505:
+	ldr	r3, [r4]
+	adds	r1, r3, #1
+	bne	.L1498
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1524+20
+	bl	printf
+	ldr	r1, [r4, #8]
+	cbz	r1, .L1507
+	movs	r3, #8
+	movs	r2, #4
+	ldr	r0, .L1524+24
+	bl	rknand_print_hex
+.L1507:
+	ldr	r1, [r4, #12]
+	cmp	r1, #0
+	beq	.L1498
+	movs	r3, #4
+	ldr	r0, .L1524+28
+	mov	r2, r3
+	bl	rknand_print_hex
+	b	.L1498
+.L1501:
+	movs	r3, #0
+	str	r3, [r4]
+	b	.L1504
+.L1525:
 	.align	2
-.L1618:
-	.word	.LANCHOR146
-	.word	.LANCHOR150
-	.cfi_endproc
-.LFE235:
-	.size	FlashTestBlk, .-FlashTestBlk
-	.section	.text.FtlLowFormatEraseBlock,"ax",%progbits
+.L1524:
+	.word	.LANCHOR31
+	.word	.LANCHOR25
+	.word	.LANCHOR26
+	.word	.LANCHOR3
+	.word	.LANCHOR33
+	.word	.LC25
+	.word	.LC26
+	.word	.LC27
+	.size	FlashReadSlc2KPages, .-FlashReadSlc2KPages
+	.section	.text.FlashReadPages,"ax",%progbits
 	.align	1
-	.global	FtlLowFormatEraseBlock
+	.global	FlashReadPages
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlLowFormatEraseBlock, %function
-FtlLowFormatEraseBlock:
-.LFB300:
-	.loc 4 654 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 24
+	.type	FlashReadPages, %function
+FlashReadPages:
+	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1815:
-	.loc 4 663 0
-	ldr	r3, .L1665
-	.loc 4 654 0
+	ldr	r3, .L1617
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	sub	sp, sp, #24
-	.cfi_def_cfa_offset 56
-	.loc 4 654 0
-	str	r0, [sp, #8]
-	.loc 4 663 0
-	ldr	r3, [r3]
-	.loc 4 654 0
-	str	r1, [sp, #4]
-	.loc 4 663 0
-	cmp	r3, #0
-	bne	.L1647
-	.loc 4 661 0
-	ldr	r1, .L1665+4
-.LVL1816:
-	.loc 4 672 0
-	mov	r10, r3
-	.loc 4 671 0
-	ldr	r4, [sp, #8]
-	.loc 4 666 0
-	mov	r5, r3
-	.loc 4 673 0
-	ldr	r7, .L1665+8
-	mov	r8, #36
-	.loc 4 661 0
-	ldrb	r2, [r1]	@ zero_extendqisi2
-	mov	fp, r1
+	sub	sp, sp, #40
+	mov	r10, r0
+	str	r1, [sp, #24]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r2, [sp, #12]
+	cbnz	r3, .L1527
+	ldr	r2, .L1617+4
+	mov	r8, r3
+	str	r3, [sp, #8]
+	ldrb	r2, [r2, #9]	@ zero_extendqisi2
 	str	r2, [sp, #20]
-.LVL1817:
-	.loc 4 668 0
-	ldr	r2, .L1665+12
-	ldrb	r0, [r2]	@ zero_extendqisi2
-.LVL1818:
-	str	r2, [sp, #16]
-	str	r0, [sp, #12]
-.LVL1819:
-	.loc 4 671 0
-	ldr	r0, .L1665+16
-	str	r4, [r0]
-.LVL1820:
-	.loc 4 667 0
-	mov	r4, r3
-.LVL1821:
-.L1622:
-	.loc 4 672 0 discriminator 1
-	ldr	r3, .L1665+20
-	uxth	r2, r10
-	ldrh	r1, [r3]
-	cmp	r1, r2
-	bhi	.L1626
-	.loc 4 692 0
-	cmp	r5, #0
-	beq	.L1620
-	.loc 4 668 0
-	ldr	r3, [sp, #12]
-	.loc 4 696 0
-	movs	r7, #0
-	.loc 4 697 0
-	ldr	r8, .L1665+8
-	mov	r2, r5
-	.loc 4 696 0
-	strb	r7, [fp]
-	.loc 4 701 0
-	mov	r10, #36
-.LVL1822:
-	.loc 4 668 0
-	adds	r6, r3, #0
-	it	ne
-	movne	r6, #1
-	.loc 4 697 0
-	ldr	r0, [r8]
-	mov	r1, r6
-	bl	FlashEraseBlocks
-.LVL1823:
-	.loc 4 698 0
-	ldrb	r3, [sp, #20]	@ zero_extendqisi2
-	strb	r3, [fp]
-.LVL1824:
-.L1628:
-	.loc 4 700 0 discriminator 1
-	uxth	r3, r7
-	cmp	r5, r3
-	bhi	.L1630
-	.loc 4 708 0
-	ldr	r3, [sp, #4]
-	cmp	r3, #0
-	bne	.L1631
-	.loc 4 660 0
-	uxth	r6, r6
-	.loc 4 659 0
-	movs	r3, #6
-	str	r3, [sp, #16]
-	.loc 4 657 0
-	movs	r3, #1
-	str	r3, [sp, #12]
-.LVL1825:
-.L1632:
-	.loc 4 720 0
-	ldr	r8, .L1665+8
-	mov	r10, #0
-.LVL1826:
-.L1641:
-	.loc 4 719 0
-	mov	fp, #0
-	.loc 4 718 0
-	mov	r5, fp
-.LVL1827:
-.L1633:
-	.loc 4 719 0 discriminator 1
-	ldr	r3, .L1665+20
-	uxth	r2, fp
-	ldrh	r1, [r3]
-	cmp	r1, r2
-	bhi	.L1636
-	.loc 4 734 0
-	cbz	r5, .L1620
-	.loc 4 737 0
-	ldr	fp, .L1665+4
-.LVL1828:
-	.loc 4 738 0
-	movs	r3, #1
-	.loc 4 737 0
-	movs	r7, #0
-	.loc 4 738 0
-	mov	r2, r6
-.LVL1829:
-	mov	r1, r5
-	ldr	r0, [r8]
-	.loc 4 737 0
-	strb	r7, [fp]
-	.loc 4 738 0
-	bl	FlashProgPages
-.LVL1830:
-	.loc 4 739 0
-	ldrb	r3, [sp, #20]	@ zero_extendqisi2
-	strb	r3, [fp]
-.LVL1831:
-	.loc 4 742 0
-	mov	fp, #36
-.LVL1832:
-.L1638:
-	.loc 4 741 0 discriminator 1
-	uxth	r3, r7
-	cmp	r5, r3
-	bhi	.L1640
-	.loc 4 748 0
-	ldr	r3, [sp, #16]
-	add	r10, r10, r3
-.LVL1833:
-	.loc 4 749 0
-	ldr	r3, [sp, #12]
-	.loc 4 748 0
-	uxth	r10, r10
-.LVL1834:
-	.loc 4 749 0
-	cmp	r3, r10
-	bhi	.L1641
-	movs	r7, #0
-.LVL1835:
-	.loc 4 755 0 discriminator 1
-	mov	r10, #36
-.LVL1836:
-.L1642:
-	.loc 4 754 0 discriminator 1
-	uxth	r3, r7
-	cmp	r5, r3
-	bhi	.L1644
-	.loc 4 759 0
+	ldr	r2, .L1617+8
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	str	r2, [sp, #28]
+.L1528:
 	ldr	r3, [sp, #8]
-	cmp	r3, #63
-	bls	.L1645
-	.loc 4 759 0 is_stmt 0 discriminator 1
-	ldr	r3, [sp, #4]
-	cbz	r3, .L1620
-.L1645:
-	.loc 4 760 0 is_stmt 1
-	mov	r2, r5
-	mov	r1, r6
-	ldr	r0, [r8]
-	bl	FlashEraseBlocks
-.LVL1837:
-.L1620:
-	.loc 4 763 0
-	mov	r0, r4
-	add	sp, sp, #24
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
+	ldr	r2, [sp, #24]
+	cmp	r3, r2
+	bcc	.L1566
+	movs	r0, #0
+	b	.L1526
+.L1527:
+	bl	FlashReadSlc2KPages
+.L1526:
+	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1838:
-.L1626:
-	.cfi_restore_state
-	.loc 4 673 0
-	uxth	r2, r10
-	ldr	r0, [r7]
-	movs	r3, #0
-	mul	r1, r8, r2
-	str	r3, [r0, r1]
-	.loc 4 674 0
-	ldr	r3, .L1665+24
-	ldr	r1, [sp, #8]
-	ldrb	r0, [r3, r2]	@ zero_extendqisi2
-	bl	V2P_block
-.LVL1839:
-	.loc 4 676 0
-	ldr	r3, [sp, #4]
-	.loc 4 674 0
-	mov	r6, r0
-.LVL1840:
-	.loc 4 676 0
-	cbz	r3, .L1623
-	.loc 4 677 0
-	bl	IsBlkInVendorPart
-.LVL1841:
-	cbnz	r0, .L1624
-.L1623:
-	.loc 4 681 0
-	mov	r0, r6
-	bl	FtlBbmIsBadBlock
-.LVL1842:
-	cbnz	r0, .L1625
-	.loc 4 684 0
-	ldr	r3, .L1665+28
-	.loc 4 682 0
-	lsls	r6, r6, #10
-	ldr	r2, [r7]
-	.loc 4 684 0
-	ldrh	r1, [r3]
-	ldr	r3, .L1665+32
-	.loc 4 682 0
-	mla	r2, r8, r5, r2
-	.loc 4 684 0
-	muls	r1, r5, r1
-	.loc 4 685 0
-	adds	r5, r5, #1
-.LVL1843:
-	uxth	r5, r5
-.LVL1844:
-	.loc 4 683 0
-	str	r0, [r2, #8]
-	.loc 4 684 0
-	ldr	r0, [r3]
-	bic	r1, r1, #3
-	.loc 4 682 0
-	str	r6, [r2, #4]
-	.loc 4 684 0
-	add	r1, r1, r0
-	str	r1, [r2, #12]
-.L1624:
-.LVL1845:
-	add	r10, r10, #1
-.LVL1846:
-	b	.L1622
-.LVL1847:
-.L1625:
-	.loc 4 687 0
-	adds	r4, r4, #1
-.LVL1848:
-	uxth	r4, r4
-.LVL1849:
-	b	.L1624
-.LVL1850:
-.L1630:
-	.loc 4 701 0
-	mul	r3, r10, r7
-	ldr	r2, [r8]
-	adds	r1, r2, r3
-	ldr	r3, [r2, r3]
-	adds	r3, r3, #1
-	bne	.L1629
-	.loc 4 703 0
-	ldr	r0, [r1, #4]
-	.loc 4 702 0
-	adds	r4, r4, #1
-.LVL1851:
-	uxth	r4, r4
-.LVL1852:
-	.loc 4 703 0
-	ubfx	r0, r0, #10, #16
-	bl	FtlBbmMapBadBlock
-.LVL1853:
-.L1629:
-	adds	r7, r7, #1
-.LVL1854:
-	b	.L1628
-.LVL1855:
-.L1631:
-	.loc 4 710 0
-	ldr	r3, .L1665+36
-	ldrh	r3, [r3]
-	str	r3, [sp, #12]
-.LVL1856:
-	.loc 4 712 0
-	ldr	r3, [sp, #16]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L1648
-	.loc 4 711 0
-	ldr	r3, [sp, #12]
-	.loc 4 709 0
-	movs	r6, #1
-	.loc 4 711 0
-	lsrs	r3, r3, #2
-	str	r3, [sp, #16]
-	b	.L1632
-.L1648:
-	.loc 4 709 0
-	movs	r6, #1
-	.loc 4 713 0
-	str	r6, [sp, #16]
-	b	.L1632
-.LVL1857:
-.L1636:
-	.loc 4 720 0
-	uxth	r2, fp
+.L1566:
+	ldr	r2, [sp, #8]
 	movs	r3, #36
-	ldr	r0, [r8]
-	movs	r7, #0
-	mul	r1, r3, r2
-	.loc 4 721 0
-	ldr	r3, .L1665+24
-	.loc 4 720 0
-	str	r7, [r0, r1]
-	.loc 4 721 0
-	ldr	r1, [sp, #8]
-	ldrb	r0, [r3, r2]	@ zero_extendqisi2
-	bl	V2P_block
-.LVL1858:
-	.loc 4 722 0
-	ldr	r3, [sp, #4]
-	.loc 4 721 0
-	mov	r7, r0
-.LVL1859:
-	.loc 4 722 0
-	cbz	r3, .L1634
-	.loc 4 723 0
-	bl	IsBlkInVendorPart
-.LVL1860:
-	cbnz	r0, .L1635
-.L1634:
-	.loc 4 726 0
+	ldr	r1, [sp, #12]
+	mul	fp, r3, r2
+	add	r7, r10, fp
+	ldr	r3, [r7, #4]
 	mov	r0, r7
-	bl	FtlBbmIsBadBlock
-.LVL1861:
-	cbnz	r0, .L1635
-	.loc 4 727 0
-	ldr	r2, [r8]
-	movs	r3, #36
-	add	r7, r10, r7, lsl #10
-	mla	r2, r3, r5, r2
-	.loc 4 728 0
-	ldr	r3, .L1665+40
-	ldr	r1, [r3]
-	.loc 4 729 0
-	ldr	r3, .L1665+28
-	.loc 4 727 0
-	str	r7, [r2, #4]
-	.loc 4 728 0
-	str	r1, [r2, #8]
-	.loc 4 729 0
-	ldrh	r1, [r3]
-	ldr	r3, .L1665+44
-	muls	r1, r5, r1
-	ldr	r0, [r3]
-	.loc 4 730 0
-	adds	r5, r5, #1
-.LVL1862:
-	uxth	r5, r5
-.LVL1863:
-	.loc 4 729 0
-	bic	r1, r1, #3
-	add	r1, r1, r0
-	str	r1, [r2, #12]
-.L1635:
-.LVL1864:
-	add	fp, fp, #1
-.LVL1865:
-	b	.L1633
-.LVL1866:
-.L1640:
-	.loc 4 742 0
-	mul	r3, fp, r7
-	ldr	r2, [r8]
-	adds	r1, r2, r3
-	ldr	r3, [r2, r3]
-	cbz	r3, .L1639
-	.loc 4 744 0
-	ldr	r0, [r1, #4]
-	.loc 4 743 0
-	adds	r4, r4, #1
-.LVL1867:
-	uxth	r4, r4
-.LVL1868:
-	.loc 4 744 0
-	ubfx	r0, r0, #10, #16
-	bl	FtlBbmMapBadBlock
-.LVL1869:
-.L1639:
-	adds	r7, r7, #1
-.LVL1870:
-	b	.L1638
-.LVL1871:
-.L1644:
-	.loc 4 755 0
-	ldr	r3, [sp, #4]
-	cbz	r3, .L1643
-	.loc 4 755 0 is_stmt 0 discriminator 1
-	mul	r3, r10, r7
-	ldr	r2, [r8]
-	adds	r1, r2, r3
-	ldr	r3, [r2, r3]
-	cbnz	r3, .L1643
-	.loc 4 756 0 is_stmt 1
-	ldr	r0, [r1, #4]
-	movs	r1, #1
-	ubfx	r0, r0, #10, #16
-	bl	FtlFreeSysBlkQueueIn
-.LVL1872:
-.L1643:
-	adds	r7, r7, #1
-.LVL1873:
-	b	.L1642
-.LVL1874:
-.L1647:
-	.loc 4 664 0
-	movs	r4, #0
-	b	.L1620
-.L1666:
-	.align	2
-.L1665:
-	.word	.LANCHOR76
-	.word	.LANCHOR27
-	.word	.LANCHOR77
-	.word	.LANCHOR8
-	.word	.LANCHOR73
-	.word	.LANCHOR37
-	.word	.LANCHOR46
-	.word	.LANCHOR58
-	.word	.LANCHOR186
-	.word	.LANCHOR53
-	.word	.LANCHOR183
-	.word	.LANCHOR184
-	.cfi_endproc
-.LFE300:
-	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
-	.section	.text.FtlBbmTblFlush,"ax",%progbits
-	.align	1
-	.global	FtlBbmTblFlush
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlBbmTblFlush, %function
-FtlBbmTblFlush:
-.LFB320:
-	.loc 5 104 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1875:
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 48
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 5 111 0
-	ldr	r3, .L1678
-	ldr	r4, [r3]
-	str	r3, [sp, #12]
-	cmp	r4, #0
-	bne	.L1669
-.LBB426:
-.LBB427:
-	.loc 5 114 0
-	ldr	r3, .L1678+4
-	.loc 5 115 0
-	mov	r1, r4
-	.loc 5 113 0
-	ldr	r7, .L1678+8
-	ldr	r5, .L1678+12
-	.loc 5 114 0
-	ldr	r3, [r3]
-	.loc 5 113 0
-	ldr	r0, [r7]
-	mov	r8, r7
-	ldr	r6, .L1678+16
-	.loc 5 114 0
-	str	r3, [r5, #12]
-	.loc 5 117 0
-	ldr	r7, .L1678+20
-	.loc 5 115 0
-	ldr	r3, .L1678+24
-	.loc 5 118 0
-	ldr	r10, .L1678+56
-	.loc 5 113 0
-	str	r0, [r5, #8]
-	.loc 5 115 0
-	ldrh	r2, [r3]
-	bl	ftl_memset
-.LVL1876:
-.L1670:
-	.loc 5 117 0
-	ldrh	r3, [r7]
-	cmp	r4, r3
-	blt	.L1671
-	.loc 5 120 0
-	ldr	r6, [r5, #12]
-.LVL1877:
-	.loc 5 121 0
-	movs	r2, #16
-	.loc 5 124 0
-	ldr	r4, .L1678+28
-.LVL1878:
-	.loc 5 121 0
-	movs	r1, #255
-	.loc 5 108 0
-	movs	r7, #0
-	.loc 5 121 0
-	mov	r0, r6
-	bl	ftl_memset
-.LVL1879:
-	.loc 5 123 0
-	movw	r3, #61649
-	mov	r10, r4
-	strh	r3, [r6]	@ movhi
-	.loc 5 124 0
-	ldr	r3, [r4, #8]
-	.loc 5 106 0
-	str	r7, [sp, #8]
-	.loc 5 124 0
-	str	r3, [r6, #4]
-	.loc 5 125 0
-	ldrh	r3, [r4]
-	strh	r3, [r6, #2]	@ movhi
-	.loc 5 126 0
-	ldrh	r3, [r4, #4]
-	strh	r3, [r6, #8]	@ movhi
-	.loc 5 127 0
-	ldrh	r3, [r4, #6]
-	strh	r3, [r6, #10]	@ movhi
-	.loc 5 128 0
-	ldr	r3, .L1678+32
-	ldr	r3, [r3]
-	strh	r3, [r6, #12]	@ movhi
-.L1672:
-.LVL1880:
-	.loc 5 130 0
-	ldr	r3, [r8]
-	.loc 5 132 0
-	mov	fp, #0
-	.loc 5 133 0
-	ldrh	r1, [r4]
-	ldrh	r2, [r4, #2]
-	.loc 5 130 0
-	str	r3, [r5, #8]
-	.loc 5 131 0
-	ldr	r3, .L1678+4
-	.loc 5 132 0
-	str	fp, [r5]
-	.loc 5 131 0
-	ldr	r3, [r3]
-	str	r3, [r5, #12]
-	.loc 5 133 0
-	orr	r3, r2, r1, lsl #10
-	.loc 5 134 0
-	ldrh	r0, [r6, #10]
-	.loc 5 133 0
-	str	r3, [r5, #4]
-	.loc 5 134 0
-	ldrh	r3, [r4, #4]
-	str	r0, [sp]
-	ldr	r0, .L1678+36
-	bl	printf
-.LVL1881:
-	.loc 5 135 0
-	movs	r3, #1
-	ldr	r0, .L1678+12
-	mov	r2, r3
-	mov	r1, r3
-	bl	FlashProgPages
-.LVL1882:
-	.loc 5 136 0
-	ldr	r3, .L1678+40
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r3]
-	subs	r3, r3, #1
+	str	r3, [sp, #16]
+	ldr	r3, [sp, #24]
+	subs	r3, r3, r2
+	add	r2, sp, #36
+	uxtb	r3, r3
+	str	r3, [sp]
+	add	r3, sp, #32
+	bl	LogAddr2PhyAddr
+	ldr	r2, .L1617+12
+	mov	r5, r0
+	ldr	r3, [sp, #32]
+	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, r3
-	blt	.L1673
-	.loc 5 139 0
-	ldr	r3, [r4, #8]
-	.loc 5 141 0
-	ldrh	r2, [r4]
-	.loc 5 143 0
-	strh	fp, [r4, #2]	@ movhi
-	.loc 5 139 0
-	adds	r3, r3, #1
-	str	r3, [r4, #8]
-	.loc 5 140 0
-	str	r3, [r6, #4]
-	.loc 5 141 0
-	strh	r2, [r6, #8]	@ movhi
-	.loc 5 142 0
-	ldrh	r3, [r4, #4]
-	.loc 5 144 0
-	strh	r2, [r4, #4]	@ movhi
-	.loc 5 147 0
-	ldr	r2, .L1678+44
-	.loc 5 142 0
-	strh	r3, [r4]	@ movhi
-	.loc 5 145 0
-	lsls	r3, r3, #10
-	.loc 5 147 0
-	ldr	r0, [r2]
-	.loc 5 148 0
-	movs	r2, #1
-	.loc 5 145 0
-	str	r3, [r5, #4]
-	.loc 5 148 0
-	mov	r1, r2
-	.loc 5 147 0
-	str	r3, [r0, #4]
-	.loc 5 148 0
-	bl	FlashEraseBlocks
-.LVL1883:
-	.loc 5 149 0
-	movs	r3, #1
-	ldr	r0, .L1678+12
-	mov	r2, r3
-	mov	r1, r3
-	bl	FlashProgPages
-.LVL1884:
-.L1673:
-	.loc 5 157 0
-	ldrh	r3, [r10, #2]
-	adds	r3, r3, #1
-	strh	r3, [r10, #2]	@ movhi
-	.loc 5 158 0
-	ldr	r3, [r5]
+	bhi	.L1530
+	mov	r3, #-1
+	str	r3, [r10, fp]
+.L1531:
+	ldr	r3, [sp, #8]
 	adds	r3, r3, #1
-	bne	.L1674
-	.loc 5 161 0
-	adds	r7, r7, #1
-.LVL1885:
-	.loc 5 160 0
-	ldr	r1, [r5, #4]
-	.loc 5 161 0
-	uxth	r7, r7
-	.loc 5 160 0
-	ldr	r0, .L1678+48
-	bl	printf
-.LVL1886:
-	.loc 5 162 0
-	cmp	r7, #3
-	bls	.L1672
-	.loc 5 163 0
-	mov	r2, r7
-	ldr	r1, [r5, #4]
-	ldr	r0, .L1678+52
-	bl	printf
-.LVL1887:
-	.loc 5 165 0
-	ldr	r2, [sp, #12]
-	movs	r3, #1
-	str	r3, [r2]
-.LVL1888:
-.L1669:
-.LBE427:
-.LBE426:
-	.loc 5 179 0
-	movs	r0, #0
-	add	sp, sp, #16
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1889:
-.L1671:
-	.cfi_restore_state
-.LBB429:
-.LBB428:
-	.loc 5 118 0
-	ldrh	r2, [r10]
-	ldr	r3, [r5, #8]
-	ldr	r1, [r6, #4]!
-	mul	r0, r4, r2
-	lsls	r2, r2, #2
-	.loc 5 117 0
-	adds	r4, r4, #1
-.LVL1890:
-	.loc 5 118 0
-	add	r0, r3, r0, lsl #2
-	bl	ftl_memcpy
-.LVL1891:
-	b	.L1670
-.LVL1892:
-.L1674:
-	.loc 5 172 0
-	ldr	r3, [sp, #8]
-	cmp	r3, #0
-	bne	.L1669
-	movs	r3, #1
 	str	r3, [sp, #8]
-.LVL1893:
-	b	.L1672
-.L1679:
-	.align	2
-.L1678:
-	.word	.LANCHOR76
-	.word	.LANCHOR185
-	.word	.LANCHOR180
-	.word	.LANCHOR199
-	.word	.LANCHOR74+24
-	.word	.LANCHOR44
-	.word	.LANCHOR57
-	.word	.LANCHOR74
-	.word	.LANCHOR36
-	.word	.LC31
-	.word	.LANCHOR53
-	.word	.LANCHOR77
-	.word	.LC32
-	.word	.LC33
-	.word	.LANCHOR120
-.LBE428:
-.LBE429:
-	.cfi_endproc
-.LFE320:
-	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
-	.section	.text.allocate_data_superblock,"ax",%progbits
-	.align	1
-	.global	allocate_data_superblock
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	allocate_data_superblock, %function
-allocate_data_superblock:
-.LFB386:
-	.loc 1 2852 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1894:
-	.loc 1 2858 0
-	ldr	r3, .L1743
-	.loc 1 2852 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 1 2852 0
-	mov	r4, r0
-	.loc 1 2858 0
-	ldr	r3, [r3]
+	b	.L1528
+.L1530:
+	ldr	r2, .L1617+16
+	ldrb	r4, [r2, r3]	@ zero_extendqisi2
+	ldr	r3, .L1617+20
+	mov	r0, r4
+	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1682
-	ldr	r7, .L1743+4
-.LVL1895:
-.L1681:
-.LBB434:
-.LBB435:
-	.loc 1 2861 0
-	ldr	r3, .L1743+4
-	ldr	r6, .L1743+8
-	ldrh	r3, [r3]
-	ldrh	r2, [r6]
-	add	r3, r3, r2
-	ldr	r2, .L1743+12
-	ldrh	r2, [r2]
-	cmp	r3, r2
-	ble	.L1683
-	ldr	r1, .L1743+16
-	movw	r2, #2861
-	ldr	r0, .L1743+20
-	bl	printf
-.LVL1896:
-	ldr	r1, .L1743+24
-	ldr	r0, .L1743+28
-	bl	printf
-.LVL1897:
-.L1683:
-	.loc 1 2863 0
-	ldr	r3, .L1743+32
-	ldrb	r2, [r4, #8]	@ zero_extendqisi2
-	cmp	r4, r3
-	bne	.L1684
-	.loc 1 2864 0
-	ldr	r3, .L1743+36
-	ldrh	r5, [r7]
+	it	eq
+	moveq	r5, #0
+	bl	NandcWaitFlashReady
+	ldr	r3, .L1617+24
 	ldr	r3, [r3]
-	lsrs	r0, r5, #1
-	mul	ip, r3, r5
-	adds	r1, r0, #1
-	add	r1, r1, ip, lsr #2
-	.loc 1 2865 0
-	ldr	ip, .L1743+48
-	.loc 1 2864 0
-	uxth	r1, r1
-.LVL1898:
-	.loc 1 2865 0
-	ldr	ip, [ip]
-	cmp	ip, #0
-	beq	.L1685
-	ldr	ip, .L1743+52
-	ldr	ip, [ip]
-	cmp	ip, #29
-	bhi	.L1685
-	.loc 1 2866 0
-	cmp	ip, #2
-	bls	.L1718
-	lsls	r5, r5, #31
-	bpl	.L1714
-	cmp	r3, #0
-	beq	.L1718
-.L1714:
-	.loc 1 2869 0
-	mov	r1, r0
-.LVL1899:
-	b	.L1685
-.LVL1900:
-.L1684:
-	.loc 1 2873 0
-	cmp	r2, #1
-	bne	.L1718
-	ldr	r3, .L1743+40
-	ldrh	r3, [r3]
+	ldrb	r1, [r3, #19]	@ zero_extendqisi2
+	subs	r3, r1, #1
+	cmp	r3, #6
+	bhi	.L1533
+	ldr	r3, .L1617+28
+	cmp	r1, #7
+	add	r2, r3, r4
+	ldrb	r3, [r2, #12]	@ zero_extendqisi2
+	it	eq
+	ldrbeq	r3, [r2, #20]	@ zero_extendqisi2
+	ldr	r2, .L1617+32
+	ldrb	r2, [r2, r4]	@ zero_extendqisi2
+	cmp	r2, r3
+	beq	.L1533
+	ldr	r2, .L1617+36
+	mov	r0, r4
+	ldrb	r1, [r2, #-3]	@ zero_extendqisi2
+	bl	HynixSetRRPara
+.L1533:
+	mov	r0, r4
+	bl	NandcFlashCs
+	ldr	r3, [sp, #12]
 	cmp	r3, #1
-	beq	.L1718
-	ldr	r3, .L1743+44
-	ldrb	r3, [r3]	@ zero_extendqisi2
+	beq	.L1535
+	ldr	r3, [sp, #16]
 	cmp	r3, #0
-	bne	.L1718
-	.loc 1 2875 0
-	ldr	r0, .L1743+48
-	.loc 1 2874 0
-	ldrh	r3, [r7]
-	.loc 1 2875 0
-	ldr	r0, [r0]
-	.loc 1 2874 0
-	lsrs	r1, r3, #3
-.LVL1901:
-	.loc 1 2875 0
-	cbz	r0, .L1685
-	ldr	r0, .L1743+52
-	ldr	r0, [r0]
-	cmp	r0, #1
-	bhi	.L1685
-	.loc 1 2876 0
-	rsb	r3, r3, r3, lsl #3
-	ubfx	r1, r3, #3, #16
-.LVL1902:
-.L1685:
-	.loc 1 2879 0
-	cbz	r1, .L1686
-	.loc 1 2880 0
-	subs	r1, r1, #1
-.LVL1903:
-	uxth	r1, r1
-.LVL1904:
-.L1686:
-	.loc 1 2881 0
-	ldr	r0, .L1743+56
-	bl	List_pop_index_node
-.LVL1905:
-	ldrh	r3, [r7]
-	mov	r5, r0
-	uxth	r8, r0
-.LVL1906:
-	cbnz	r3, .L1687
-	ldr	r1, .L1743+16
-	movw	r2, #2881
-	ldr	r0, .L1743+20
-	bl	printf
-.LVL1907:
-	ldr	r1, .L1743+24
-	ldr	r0, .L1743+28
-	bl	printf
-.LVL1908:
-.L1687:
-	ldrh	r3, [r7]
-	.loc 1 2886 0
+	bge	.L1536
+.L1535:
+	ldr	r3, .L1617+40
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L1536
 	mov	r0, r4
-	.loc 1 2881 0
-	subs	r3, r3, #1
-	strh	r3, [r7]	@ movhi
-	.loc 1 2885 0
-	strh	r8, [r4]	@ movhi
-	.loc 1 2886 0
-	bl	make_superblock
-.LVL1909:
-	.loc 1 2887 0
-	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1688
-	.loc 1 2891 0
-	ldr	r3, .L1743+60
-	uxth	r5, r5
-	movw	r2, #65535
-	ldr	r3, [r3]
-	strh	r2, [r3, r5, lsl #1]	@ movhi
-	.loc 1 2893 0
-	ldrh	r2, [r6]
-	ldrh	r3, [r7]
-	add	r3, r3, r2
-	ldr	r2, .L1743+12
-	ldrh	r2, [r2]
-	cmp	r3, r2
-	ble	.L1681
-	movw	r2, #2893
-	ldr	r1, .L1743+16
-	ldr	r0, .L1743+20
-	bl	printf
-.LVL1910:
-	ldr	r1, .L1743+24
-	ldr	r0, .L1743+28
-	bl	printf
-.LVL1911:
-	b	.L1681
-.LVL1912:
-.L1718:
-	.loc 1 2873 0
+	bl	flash_enter_slc_mode
+.L1543:
+	ldr	r1, [sp, #36]
+	adds	r6, r1, #1
+	bne	.L1538
+	cmp	r4, #255
+	beq	.L1568
+.L1538:
+	cbz	r5, .L1540
+	ldr	r3, .L1617+44
+	mov	r0, r4
+	ldr	r2, [r3]
+	add	r2, r2, r1
+	bl	FlashReadDpCmd
+.L1541:
+	mov	r0, r4
+	bl	NandcWaitFlashReady
+	cbz	r5, .L1539
+	ldr	r1, [sp, #36]
+	mov	r0, r4
+	bl	FlashReadDpDataOutCmd
+.L1539:
+	ldr	r3, [r7, #12]
 	movs	r1, #0
-	b	.L1686
-.LVL1913:
-.L1688:
-	.loc 1 2896 0
-	ldrh	r2, [r6]
-	ldrh	r3, [r7]
-	add	r3, r3, r2
-	ldr	r2, .L1743+12
-	ldrh	r2, [r2]
-	cmp	r3, r2
-	ble	.L1690
-	ldr	r1, .L1743+16
-	mov	r2, #2896
-	ldr	r0, .L1743+20
-	bl	printf
-.LVL1914:
-	ldr	r1, .L1743+24
-	ldr	r0, .L1743+28
-	bl	printf
-.LVL1915:
-.L1690:
-	.loc 1 2899 0
-	ldr	r2, .L1743+64
-	.loc 1 2900 0
-	movs	r6, #0
-	ldr	r10, .L1743+104
-	add	ip, r4, #16
-	mov	lr, r6
-	ldrh	r1, [r2]
-	movs	r2, #36
-	ldr	r0, [r10]
-	mov	r3, r0
-	mla	r1, r2, r1, r0
-	str	r1, [sp]
-.L1691:
-.LVL1916:
-	.loc 1 2899 0
-	ldr	r1, [sp]
-	cmp	r1, r3
-	bne	.L1693
-	.loc 1 2908 0
-	cbnz	r6, .L1694
-	ldr	r1, .L1743+16
-	movw	r2, #2908
-	ldr	r0, .L1743+20
-	bl	printf
-.LVL1917:
-	ldr	r1, .L1743+24
-	ldr	r0, .L1743+28
-	bl	printf
-.LVL1918:
-.L1694:
-	.loc 1 2910 0
-	ldr	r3, .L1743+48
-	uxth	r5, r5
-	ldr	fp, .L1743+108
+	ldr	r2, [sp, #20]
+	mov	r0, r4
+	str	r3, [sp]
+	ldr	r3, [r7, #8]
+	bl	NandcXferData
+	ldr	r3, .L1617+8
+	mov	r6, r0
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L1542
+	adds	r0, r0, #1
+	bne	.L1542
+	ldr	r3, .L1617+8
+	movs	r5, #0
+	strb	r5, [r3]
+	b	.L1543
+.L1536:
+	mov	r0, r4
+	bl	flash_exit_slc_mode
+	b	.L1543
+.L1540:
+	mov	r0, r4
+	bl	FlashReadCmd
+	b	.L1541
+.L1568:
+	movs	r5, #0
+	b	.L1539
+.L1542:
+	cbz	r5, .L1544
+	ldr	r3, .L1617+44
+	mov	r0, r4
+	ldr	r1, [sp, #36]
 	ldr	r3, [r3]
-	cbz	r3, .L1695
-	ldr	r3, .L1743+68
-	cmp	r4, r3
-	bne	.L1695
-	.loc 1 2911 0
-	ldr	r3, [fp]
-	ldrh	r3, [r3, r5, lsl #1]
-	cmp	r3, #30
-	.loc 1 2912 0
-	itt	hi
-	movhi	r3, #0
-	strbhi	r3, [r4, #8]
-.L1695:
-	.loc 1 2915 0
-	ldr	r3, .L1743+72
-	ldrh	r3, [r3]
-	cmp	r3, r8
-	bne	.L1696
-	ldr	r1, .L1743+16
-	movw	r2, #2915
-	ldr	r0, .L1743+20
-	bl	printf
-.LVL1919:
-	ldr	r1, .L1743+24
-	ldr	r0, .L1743+28
-	bl	printf
-.LVL1920:
-.L1696:
-	.loc 1 2916 0
-	ldrb	r1, [r4, #8]	@ zero_extendqisi2
-	ldr	r2, .L1743+76
-	ldr	r3, .L1743+80
-	cmp	r1, #0
-	bne	.L1697
-	.loc 1 2917 0
-	ldr	r0, [fp]
-	ldrh	lr, [r0, r5, lsl #1]
-	cmp	lr, #0
-	beq	.L1698
-	.loc 1 2918 0
-	ldr	r1, .L1743+84
-	ldrh	ip, [r1]
-	add	r1, lr, ip
-.L1741:
-	.loc 1 2920 0
-	strh	r1, [r0, r5, lsl #1]	@ movhi
-	.loc 1 2922 0
-	mov	r0, r8
-	.loc 1 2921 0
-	ldr	r1, [r2]
-	str	r3, [sp, #4]
-	str	r2, [sp]
-	adds	r1, r1, #1
-	str	r1, [r2]
-	.loc 1 2922 0
+	add	r1, r1, r3
+	bl	FlashReadDpDataOutCmd
+	add	r3, fp, #36
 	movs	r1, #0
-	bl	ftl_set_blk_mode
-.LVL1921:
-	ldm	sp, {r2, r3}
-.L1700:
-	.loc 1 2929 0
-	ldr	r1, [fp]
-	.loc 1 2932 0
+	add	r3, r3, r10
+	mov	r0, r4
+	ldr	r2, [r3, #12]
+	str	r2, [sp]
+	ldr	r2, [sp, #20]
+	ldr	r3, [r3, #8]
+	bl	NandcXferData
+	cmp	r0, #-1
+	mov	r8, r0
+	it	eq
+	moveq	r5, #0
+.L1544:
+	mov	r0, r4
+	bl	NandcFlashDeCs
+	ldr	r3, .L1617+8
+	adds	r1, r6, #1
+	ldrb	r2, [sp, #28]	@ zero_extendqisi2
+	strb	r2, [r3]
+	bne	.L1545
+	ldr	r3, .L1617+48
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L1546
+.L1550:
+	ldr	r3, .L1617+52
+	ldr	r5, [r3]
+	cmp	r5, #0
+	bne	.L1547
+	ldr	r3, [r7, #12]
+	mov	r0, r4
+	ldr	r2, [r7, #8]
+	ldr	r1, [sp, #36]
+	bl	FlashReadRawPage
+	b	.L1616
+.L1546:
+	ldr	r3, .L1617+56
+	mov	r0, r4
+	ldr	r1, [sp, #36]
 	ldr	r3, [r3]
-	ldr	r2, [r2]
-	.loc 1 2929 0
-	ldrh	ip, [r1, r5, lsl #1]
-	ldr	r1, .L1743+88
-	ldr	r0, [r1]
-	cmp	ip, r0
-	.loc 1 2930 0
-	it	hi
-	strhi	ip, [r1]
-	.loc 1 2932 0
-	ldr	r1, .L1743+84
-	ldrh	r0, [r1]
-	ldr	r1, .L1743+12
-	mla	r0, r2, r0, r3
-	ldrh	r1, [r1]
-	bl	__aeabi_uidiv
-.LVL1922:
-	ldr	r3, .L1743+92
-	str	r0, [r3]
-	.loc 1 2933 0
-	ldr	r3, .L1743+96
-	.loc 1 2936 0
-	ldr	r0, .L1743+100
-	.loc 1 2933 0
-	ldr	r2, [r3]
-	ldr	r3, [r2, #16]
-	adds	r3, r3, #1
-	str	r3, [r2, #16]
-.LVL1923:
-	movs	r3, #36
-	.loc 1 2936 0
-	ldr	r2, [r10]
-	adds	r1, r2, #4
-	mla	r3, r3, r6, r2
-	adds	r3, r3, #40
-.LVL1924:
-.L1702:
-	adds	r1, r1, #36
-	.loc 1 2935 0
-	cmp	r3, r1
-	bne	.L1703
-	.loc 1 2937 0
-	ldr	r3, .L1743+44
+	ldr	r5, [r3, #304]
+	movs	r3, #1
+	str	r3, [sp]
+	ldr	r2, [r7, #8]
+	ldr	r3, [r7, #12]
+	bl	FlashDdrTunningRead
+	adds	r2, r0, #1
+	mov	r6, r0
+	beq	.L1549
+	ldr	r3, .L1617+60
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1704
-	.loc 1 2938 0
-	ldrb	r3, [r4, #8]	@ zero_extendqisi2
-	.loc 1 2939 0
-	mov	r2, r6
-	.loc 1 2941 0
-	ldr	r0, [r10]
-	.loc 1 2938 0
-	cmp	r3, #1
-	.loc 1 2939 0
-	ite	eq
-	moveq	r1, #0
-	.loc 1 2941 0
-	movne	r1, #1
-	bl	FlashEraseBlocks
-.LVL1925:
-.L1704:
-	.loc 1 2943 0
-	mov	r2, r6
-	ldr	r0, [r10]
-	ldrb	r1, [r4, #8]	@ zero_extendqisi2
-	mov	r10, #0
-	bl	FlashEraseBlocks
-.LVL1926:
-	.loc 1 2944 0
-	mov	fp, r10
-	.loc 1 2946 0
-	movs	r2, #36
-.LVL1927:
-.L1706:
-	.loc 1 2945 0
-	uxth	r3, r10
-	cmp	r6, r3
-	bhi	.L1708
-	.loc 1 2956 0
-	cmp	fp, #0
-	beq	.L1709
-	.loc 1 2957 0
-	mov	r0, r8
-	bl	update_multiplier_value
-.LVL1928:
-	.loc 1 2958 0
-	bl	FtlBbmTblFlush
-.LVL1929:
-.L1709:
-	.loc 1 2961 0
-	ldrb	r2, [r4, #7]	@ zero_extendqisi2
-	ldr	r1, .L1743+60
-	cmp	r2, #0
-	bne	.L1710
-	.loc 1 2963 0
-	ldr	r3, [r1]
-	movw	r2, #65535
-	strh	r2, [r3, r5, lsl #1]	@ movhi
-	b	.L1681
-.L1744:
+	cmp	r0, r3, lsr #1
+	bls	.L1569
+.L1549:
+	ubfx	r0, r5, #8, #8
+	bl	NandcSetDdrPara
+	adds	r3, r6, #1
+	beq	.L1550
+.L1569:
+	movs	r5, #0
+.L1545:
+	ldr	r3, .L1617+60
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r6, r3, asr #2
+	bls	.L1558
+	ldr	r3, .L1617+52
+	ldr	r3, [r3]
+	cmp	r3, #0
+	bne	.L1558
+	mov	r6, #256
+	b	.L1553
+.L1618:
 	.align	2
-.L1743:
-	.word	.LANCHOR76
-	.word	.LANCHOR88
-	.word	.LANCHOR85
-	.word	.LANCHOR39
-	.word	.LANCHOR200
-	.word	.LC6
-	.word	.LC7
-	.word	.LC8
-	.word	.LANCHOR93
-	.word	.LANCHOR169
-	.word	.LANCHOR43
-	.word	.LANCHOR8
-	.word	.LANCHOR28
-	.word	.LANCHOR167
-	.word	.LANCHOR87
-	.word	.LANCHOR83
-	.word	.LANCHOR37
-	.word	.LANCHOR91
+.L1617:
+	.word	.LANCHOR1
+	.word	.LANCHOR31
+	.word	.LANCHOR5
+	.word	.LANCHOR25
+	.word	.LANCHOR26
 	.word	.LANCHOR201
-	.word	.LANCHOR164
-	.word	.LANCHOR165
-	.word	.LANCHOR47
-	.word	.LANCHOR166
-	.word	.LANCHOR202
-	.word	.LANCHOR188
-	.word	-1024
-	.word	.LANCHOR77
-	.word	.LANCHOR78
-.LVL1930:
-.L1693:
-	.loc 1 2900 0
-	str	lr, [r3, #8]
-	.loc 1 2903 0
-	movw	fp, #65535
-	.loc 1 2901 0
-	str	lr, [r3, #12]
-	.loc 1 2903 0
-	ldrh	r1, [ip], #2
-	cmp	r1, fp
-	beq	.L1692
-	.loc 1 2904 0
-	mla	fp, r2, r6, r0
-	.loc 1 2905 0
-	adds	r6, r6, #1
-.LVL1931:
-	.loc 1 2904 0
-	lsls	r1, r1, #10
-	.loc 1 2905 0
-	uxth	r6, r6
-.LVL1932:
-	.loc 1 2904 0
-	str	r1, [fp, #4]
-.L1692:
-	adds	r3, r3, #36
-	b	.L1691
-.L1698:
-	.loc 1 2920 0
-	movs	r1, #2
-	b	.L1741
-.L1697:
-	.loc 1 2924 0
-	ldr	r0, [fp]
-	str	r2, [sp, #4]
-	.loc 1 2925 0
-	str	r3, [sp]
-.LVL1933:
-	.loc 1 2924 0
-	ldrh	r1, [r0, r5, lsl #1]
-	adds	r1, r1, #1
-	strh	r1, [r0, r5, lsl #1]	@ movhi
-.LBB436:
-.LBB437:
-	mov	r0, r8
-.LBE437:
-.LBE436:
-	.loc 1 2925 0
-	ldr	r1, [r3]
-	adds	r1, r1, #1
-	str	r1, [r3]
-.LBB439:
-.LBB438:
-	bl	ftl_set_blk_mode.part.10
-.LVL1934:
-	ldr	r2, [sp, #4]
-	ldr	r3, [sp]
-	b	.L1700
-.LVL1935:
-.L1703:
-.LBE438:
-.LBE439:
-	.loc 1 2936 0
-	ldr	r2, [r1, #-36]
-	ands	r2, r2, r0
-	str	r2, [r1, #-36]
-	b	.L1702
-.LVL1936:
-.L1708:
-	.loc 1 2946 0
-	ldr	r1, .L1745
-	mul	r3, r2, r10
-	ldr	r1, [r1]
-	adds	r0, r1, r3
-	ldr	r3, [r1, r3]
-	adds	r1, r3, #1
-	bne	.L1707
-	.loc 1 2948 0
-	ldr	r0, [r0, #4]
-	.loc 1 2947 0
-	add	fp, fp, #1
-.LVL1937:
-	str	r2, [sp, #4]
-	str	r3, [sp]
-	.loc 1 2949 0
-	ubfx	r0, r0, #10, #16
-	bl	FtlBbmMapBadBlock
-.LVL1938:
-	.loc 1 2950 0
-	ldr	r3, [sp]
-	add	r1, r4, r10, lsl #1
-	.loc 1 2951 0
-	ldr	r2, [sp, #4]
-	.loc 1 2950 0
-	strh	r3, [r1, #16]	@ movhi
-	.loc 1 2951 0
-	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	.word	.LANCHOR18
+	.word	.LANCHOR20
+	.word	.LANCHOR21
+	.word	.LANCHOR20+4
+	.word	.LANCHOR8
+	.word	.LANCHOR3
+	.word	.LANCHOR30
+	.word	.LANCHOR145
+	.word	.LANCHOR19
+	.word	.LANCHOR33
+.L1547:
+	ldr	r3, [r7, #12]
+	mov	r0, r4
+	ldr	r2, [r7, #8]
+	ldr	r1, [sp, #36]
+	blx	r5
+	adds	r5, r0, #1
+	mov	r6, r0
+	bne	.L1551
+	ldr	r3, .L1619
+	ldr	r3, [r3]
+	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r3, #1
-	strb	r3, [r4, #7]
-.L1707:
-.LVL1939:
-	add	r10, r10, #1
-.LVL1940:
-	b	.L1706
-.LVL1941:
-.L1710:
-	.loc 1 2968 0
-	ldr	r3, .L1745+4
-	.loc 1 2972 0
-	ldr	r0, .L1745+8
-	.loc 1 2968 0
-	ldrh	r3, [r3]
-	.loc 1 2969 0
-	strh	r8, [r4]	@ movhi
-	.loc 1 2968 0
-	smulbb	r3, r3, r2
-	.loc 1 2970 0
-	movs	r2, #0
-	strh	r2, [r4, #2]	@ movhi
-	.loc 1 2971 0
-	strb	r2, [r4, #6]
-	.loc 1 2972 0
-	ldr	r2, [r0]
-	.loc 1 2968 0
-	uxth	r3, r3
-	strh	r3, [r4, #4]	@ movhi
-	.loc 1 2972 0
-	str	r2, [r4, #12]
-	adds	r2, r2, #1
-	str	r2, [r0]
-	.loc 1 2973 0
-	ldr	r2, [r1]
-	ldrh	r0, [r4]
-	strh	r3, [r2, r0, lsl #1]	@ movhi
-	.loc 1 2974 0
-	ldrh	r3, [r4, #4]
-	cbz	r3, .L1711
-	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1682
-.L1711:
-	ldr	r1, .L1745+12
-	movw	r2, #2974
-	ldr	r0, .L1745+16
+	cmp	r3, #6
+	bhi	.L1552
+	ldr	r2, .L1619+4
+	movs	r3, #0
+	mov	r0, r4
+	ldrb	r1, [r2, #-3]	@ zero_extendqisi2
+	bl	HynixSetRRPara
+.L1552:
+	ldr	r3, [r7, #12]
+	mov	r0, r4
+	ldr	r2, [r7, #8]
+	ldr	r1, [sp, #36]
+	bl	FlashReadRawPage
+	ldr	r2, .L1619+8
+	mov	r6, r0
+	mov	r3, r0
+	ldr	r1, [r7, #4]
+	ldr	r0, .L1619+12
+	ldrb	r2, [r2]	@ zero_extendqisi2
 	bl	printf
-.LVL1942:
-	ldr	r1, .L1745+20
-	ldr	r0, .L1745+24
+	adds	r0, r6, #1
+	bne	.L1551
+	ldr	r3, .L1619+16
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	cbz	r5, .L1553
+	ldr	r3, [sp, #12]
+	mov	r0, r4
+	cmp	r3, #1
+	beq	.L1554
+	ldr	r3, [sp, #16]
+	cmp	r3, #0
+	bge	.L1555
+.L1554:
+	bl	flash_enter_slc_mode
+.L1556:
+	ldr	r3, .L1619+20
+	mov	r0, r4
+	ldr	r2, [r7, #8]
+	ldr	r1, [sp, #36]
+	ldr	r5, [r3]
+	ldr	r3, [r7, #12]
+	blx	r5
+.L1616:
+	adds	r1, r0, #1
+	mov	r6, r0
+	mov	r5, #0
+	bne	.L1558
+.L1553:
+	str	r6, [r10, fp]
+.L1559:
+	ldr	r3, [r10, fp]
+	adds	r2, r3, #1
+	bne	.L1561
+	ldr	r2, .L1619+8
+	ldr	r1, [r7, #4]
+	ldr	r0, .L1619+24
+	ldrb	r2, [r2]	@ zero_extendqisi2
 	bl	printf
-.LVL1943:
-.L1682:
-.LBE435:
-.LBE434:
-	.loc 1 2976 0
-	movs	r0, #0
-	add	sp, sp, #8
-	.cfi_def_cfa_offset 32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1944:
-.L1746:
-	.align	2
-.L1745:
-	.word	.LANCHOR77
-	.word	.LANCHOR52
-	.word	.LANCHOR156
-	.word	.LANCHOR200
-	.word	.LC6
-	.word	.LC7
-	.word	.LC8
-	.cfi_endproc
-.LFE386:
-	.size	allocate_data_superblock, .-allocate_data_superblock
-	.section	.text.FtlGcFreeBadSuperBlk,"ax",%progbits
-	.align	1
-	.global	FtlGcFreeBadSuperBlk
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlGcFreeBadSuperBlk, %function
-FtlGcFreeBadSuperBlk:
-.LFB406:
-	.loc 6 438 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1945:
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 6 438 0
-	mov	r10, r0
-	.loc 6 443 0
-	ldr	r4, .L1759
-	ldrh	r3, [r4]
-	cbz	r3, .L1748
-.LBB442:
-.LBB443:
-	.loc 6 447 0
-	ldr	r8, .L1759+12
-.LBE443:
-.LBE442:
-	movs	r7, #0
-.LVL1946:
-.L1749:
-.LBB446:
-.LBB444:
-	.loc 6 444 0
-	ldr	r3, .L1759+4
-	ldrh	r2, [r3]
-	uxth	r3, r7
-	cmp	r2, r3
-	bhi	.L1755
-	.loc 6 460 0
-	bl	FtlGcReFreshBadBlk
-.LVL1947:
-.L1748:
-.LBE444:
-.LBE446:
-	.loc 6 477 0
-	movs	r0, #0
-	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1948:
-.L1755:
-	.cfi_restore_state
-.LBB447:
-.LBB445:
-	.loc 6 445 0
-	ldr	r2, .L1759+8
-	uxth	r3, r7
-	mov	r1, r10
-	mov	fp, #0
-	ldrb	r0, [r2, r3]	@ zero_extendqisi2
-	bl	V2P_block
-.LVL1949:
-	mov	r1, r0
-.LVL1950:
-.L1750:
-	.loc 6 446 0
-	ldrh	r3, [r4]
-	uxth	r5, fp
-.LVL1951:
-	cmp	r3, r5
-	bhi	.L1754
-.LVL1952:
-	adds	r7, r7, #1
-.LVL1953:
-	b	.L1749
-.LVL1954:
-.L1754:
-	.loc 6 447 0
-	uxth	r6, fp
-	ldrh	r3, [r8, r6, lsl #1]
-	cmp	r3, r1
-	bne	.L1751
-	.loc 6 451 0
-	mov	r0, r1
-	str	r1, [sp, #4]
-	bl	FtlBbmMapBadBlock
-.LVL1955:
-	.loc 6 452 0
-	bl	FtlBbmTblFlush
-.LVL1956:
-	.loc 6 453 0
-	ldrh	r2, [r4]
-	add	r3, r8, r6, lsl #1
-	ldr	r1, [sp, #4]
-.LVL1957:
-.L1752:
-	cmp	r5, r2
-	bcc	.L1753
-	.loc 6 455 0
-	subs	r2, r2, #1
-	strh	r2, [r4]	@ movhi
-.LVL1958:
-.L1751:
-	add	fp, fp, #1
-.LVL1959:
-	b	.L1750
-.LVL1960:
-.L1753:
-	.loc 6 454 0
-	ldrh	r0, [r3, #2]!
-	.loc 6 453 0
-	adds	r5, r5, #1
-.LVL1961:
-	uxth	r5, r5
-.LVL1962:
-	.loc 6 454 0
-	strh	r0, [r3, #-2]	@ movhi
-	b	.L1752
-.L1760:
-	.align	2
-.L1759:
-	.word	.LANCHOR114
-	.word	.LANCHOR37
-	.word	.LANCHOR46
-	.word	.LANCHOR115
-.LBE445:
-.LBE447:
-	.cfi_endproc
-.LFE406:
-	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
-	.section	.text.update_vpc_list,"ax",%progbits
-	.align	1
-	.global	update_vpc_list
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	update_vpc_list, %function
-update_vpc_list:
-.LFB389:
-	.loc 1 3076 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1963:
-	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 1 3076 0
-	mov	r4, r0
-	.loc 1 3077 0
-	ldr	r3, .L1771
+	ldr	r1, [r7, #12]
+	cbz	r1, .L1561
+	movs	r3, #4
+	ldr	r0, .L1619+28
+	mov	r2, r3
+	bl	rknand_print_hex
+.L1561:
+	cbz	r5, .L1563
+	ldr	r3, .L1619+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r8, r3, asr #2
+	bls	.L1564
+	ldr	r3, .L1619+20
 	ldr	r3, [r3]
-	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	bne	.L1762
-	.loc 1 3078 0
-	ldr	r2, .L1771+4
-	ldrh	r1, [r2]
-	cmp	r1, r0
-	bne	.L1763
-	.loc 1 3080 0
-	movw	r3, #65535
-	strh	r3, [r2]	@ movhi
-.L1764:
-.LVL1964:
-.LBB450:
-.LBB451:
-	.loc 1 3085 0
-	ldr	r5, .L1771+8
-	mov	r1, r4
-	ldr	r0, .L1771+12
-.LVL1965:
-	bl	List_remove_node
-.LVL1966:
-	ldrh	r3, [r5]
-	cbnz	r3, .L1766
-	ldr	r1, .L1771+16
-	movw	r2, #3085
-	ldr	r0, .L1771+20
-	bl	printf
-.LVL1967:
-	ldr	r1, .L1771+24
-	ldr	r0, .L1771+28
-	bl	printf
-.LVL1968:
-.L1766:
-	ldrh	r3, [r5]
-	.loc 1 3086 0
-	mov	r0, r4
-	.loc 1 3085 0
-	subs	r3, r3, #1
-	strh	r3, [r5]	@ movhi
-	.loc 1 3086 0
-	bl	free_data_superblock
-.LVL1969:
-	.loc 1 3087 0
+	it	eq
+	moveq	r8, #256
+.L1564:
+	cmp	r8, #-1
+	add	r3, fp, #36
+	str	r8, [r10, r3]
+	beq	.L1563
+	cmp	r8, #256
+	itt	ne
+	movne	r2, #0
+	strne	r2, [r10, r3]
+.L1563:
+	ldr	r3, [sp, #8]
+	add	r3, r3, r5
+	str	r3, [sp, #8]
+	ldr	r3, [sp, #12]
+	cmp	r3, #1
+	beq	.L1565
+	ldr	r3, [sp, #16]
+	cmp	r3, #0
+	bge	.L1531
+.L1565:
+	ldr	r3, .L1619+16
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L1531
 	mov	r0, r4
-	bl	FtlGcFreeBadSuperBlk
-.LVL1970:
-	.loc 1 3088 0
-	ldr	r3, .L1771+32
-	ldrh	r2, [r5]
-	ldrh	r3, [r3]
-	add	r3, r3, r2
-	ldr	r2, .L1771+36
-	ldrh	r2, [r2]
-	cmp	r3, r2
-	ble	.L1770
-	ldr	r1, .L1771+16
-	mov	r2, #3088
-	ldr	r0, .L1771+20
-	bl	printf
-.LVL1971:
-	ldr	r1, .L1771+24
-	ldr	r0, .L1771+28
-	bl	printf
-.LVL1972:
-.L1770:
-	movs	r3, #1
-	b	.L1761
-.LVL1973:
-.L1763:
-.LBE451:
-.LBE450:
-	.loc 1 3081 0
-	ldr	r2, .L1771+40
-	ldrh	r2, [r2]
-	cmp	r2, r0
-	beq	.L1761
-	.loc 1 3081 0 is_stmt 0 discriminator 1
-	ldr	r2, .L1771+44
-	ldrh	r2, [r2]
-	cmp	r2, r0
-	beq	.L1761
-	.loc 1 3081 0 discriminator 2
-	ldr	r2, .L1771+48
-	ldrh	r2, [r2]
-	cmp	r2, r0
-	bne	.L1764
-.LVL1974:
-.L1761:
-	.loc 1 3094 0 is_stmt 1
-	mov	r0, r3
-	pop	{r3, r4, r5, pc}
-.LVL1975:
-.L1762:
-	.loc 1 3091 0
-	bl	List_update_data_list
-.LVL1976:
-	.loc 1 3093 0
-	movs	r3, #0
-	b	.L1761
-.L1772:
-	.align	2
-.L1771:
-	.word	.LANCHOR83
-	.word	.LANCHOR201
-	.word	.LANCHOR85
-	.word	.LANCHOR82
-	.word	.LANCHOR203
-	.word	.LC6
-	.word	.LC7
-	.word	.LC8
-	.word	.LANCHOR88
-	.word	.LANCHOR39
-	.word	.LANCHOR91
-	.word	.LANCHOR92
-	.word	.LANCHOR93
-	.cfi_endproc
-.LFE389:
-	.size	update_vpc_list, .-update_vpc_list
-	.section	.text.decrement_vpc_count,"ax",%progbits
-	.align	1
-	.global	decrement_vpc_count
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	decrement_vpc_count, %function
-decrement_vpc_count:
-.LFB390:
-	.loc 1 3097 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1977:
-	.loc 1 3100 0
-	movw	r3, #65535
-	.loc 1 3097 0
-	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 1 3100 0
-	cmp	r0, r3
-	.loc 1 3097 0
-	mov	r4, r0
-	.loc 1 3100 0
-	beq	.L1774
-	.loc 1 3101 0
-	ldr	r5, .L1782
-	ldr	r3, [r5]
-	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L1775
-	.loc 1 3102 0
-	mov	r1, r0
-	ldr	r0, .L1782+4
-.LVL1978:
-	bl	printf
-.LVL1979:
-	.loc 1 3103 0
-	ldr	r3, [r5]
-	ldrh	r5, [r3, r4, lsl #1]
-	cbz	r5, .L1776
-.L1780:
-	.loc 1 3118 0
+	bl	flash_exit_slc_mode
+	b	.L1531
+.L1555:
+	bl	flash_exit_slc_mode
+	b	.L1556
+.L1551:
 	movs	r5, #0
-.LVL1980:
-.L1773:
-	.loc 1 3128 0
-	mov	r0, r5
-	pop	{r4, r5, r6, pc}
-.LVL1981:
-.L1776:
-	.loc 1 3103 0 discriminator 1
-	movw	r2, #3103
-.LVL1982:
-.L1781:
-	.loc 1 3125 0 discriminator 2
-	ldr	r1, .L1782+8
-	ldr	r0, .L1782+12
-	bl	printf
-.LVL1983:
-	ldr	r1, .L1782+16
-	ldr	r0, .L1782+20
-	bl	printf
-.LVL1984:
-	b	.L1773
-.LVL1985:
-.L1775:
-	.loc 1 3112 0
-	subs	r2, r2, #1
-	strh	r2, [r3, r0, lsl #1]	@ movhi
-.L1774:
-	.loc 1 3116 0
-	ldr	r6, .L1782+24
-	movw	r3, #65535
-	ldrh	r0, [r6]
-.LVL1986:
-	cmp	r0, r3
-	bne	.L1778
-	.loc 1 3117 0
-	strh	r4, [r6]	@ movhi
-	b	.L1780
-.L1778:
-	.loc 1 3119 0
-	cmp	r4, r0
-	beq	.L1780
-	.loc 1 3122 0
-	bl	update_vpc_list
-.LVL1987:
-	.loc 1 3125 0
-	ldr	r3, .L1782+28
-	.loc 1 3122 0
-	adds	r5, r0, #0
-	.loc 1 3125 0
-	ldr	r2, .L1782+32
-	.loc 1 3122 0
-	it	ne
-	movne	r5, #1
-.LVL1988:
-	.loc 1 3124 0
-	strh	r4, [r6]	@ movhi
-	.loc 1 3125 0
-	ldr	r3, [r3]
-	ldr	r2, [r2]
-	subs	r3, r3, r2
-	asrs	r2, r3, #1
-	ldr	r3, .L1782+36
-	muls	r3, r2, r3
-	ldr	r2, .L1782
-	ldr	r2, [r2]
-	uxth	r1, r3
-	ldrh	r2, [r2, r1, lsl #1]
-	cmp	r2, #0
-	bne	.L1773
-	.loc 1 3125 0 is_stmt 0 discriminator 1
-	cmp	r4, r1
-	beq	.L1773
-	.loc 1 3125 0 discriminator 2
-	movw	r2, #3125
-	b	.L1781
-.L1783:
+.L1558:
+	cmp	r6, #256
+	beq	.L1553
+	movs	r3, #0
+	str	r3, [r10, fp]
+	b	.L1559
+.L1620:
 	.align	2
-.L1782:
-	.word	.LANCHOR83
-	.word	.LC34
-	.word	.LANCHOR204
-	.word	.LC6
-	.word	.LC7
-	.word	.LC8
-	.word	.LANCHOR130
-	.word	.LANCHOR82
-	.word	.LANCHOR81
-	.word	-1431655765
-	.cfi_endproc
-.LFE390:
-	.size	decrement_vpc_count, .-decrement_vpc_count
-	.section	.text.FtlSlcSuperblockCheck,"ax",%progbits
+.L1619:
+	.word	.LANCHOR18
+	.word	.LANCHOR20+4
+	.word	.LANCHOR33
+	.word	.LC28
+	.word	.LANCHOR8
+	.word	.LANCHOR145
+	.word	.LC25
+	.word	.LC27
+	.size	FlashReadPages, .-FlashReadPages
+	.section	.text.FlashProgSlc2KPages,"ax",%progbits
 	.align	1
-	.global	FtlSlcSuperblockCheck
+	.global	FlashProgSlc2KPages
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlSlcSuperblockCheck, %function
-FtlSlcSuperblockCheck:
-.LFB373:
-	.loc 1 2278 0 is_stmt 1
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
+	.type	FlashProgSlc2KPages, %function
+FlashProgSlc2KPages:
+	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1989:
-	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 1 2278 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #64
+	str	r3, [sp, #12]
+	mov	r8, r1
 	mov	r4, r0
-	.loc 1 2281 0
-	ldrh	r3, [r0, #4]
+	mov	r6, r0
+	ldr	r3, .L1650
+	movs	r7, #0
+	ldr	fp, .L1650+28
+	str	r2, [sp, #8]
+	ldrb	r10, [r3, #9]	@ zero_extendqisi2
+.L1622:
+	cmp	r7, r8
+	bne	.L1628
+	ldr	r3, [sp, #12]
 	cmp	r3, #0
-	beq	.L1784
-	.loc 1 2283 0
-	ldrh	r2, [r0]
-	movw	r3, #65535
+	bne	.L1639
+.L1649:
+	movs	r0, #0
+	add	sp, sp, #64
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1628:
+	sub	r3, r8, r7
+	add	r2, sp, #20
+	uxtb	r3, r3
+	ldr	r1, [sp, #8]
+	mov	r0, r6
+	str	r3, [sp]
+	add	r3, sp, #24
+	bl	LogAddr2PhyAddr
+	ldr	r2, .L1650+4
+	ldr	r3, [sp, #24]
+	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, r3
-	beq	.L1784
-.LVL1990:
-.LBB454:
-.LBB455:
-	.loc 1 2285 0
-	ldrb	r3, [r0, #6]	@ zero_extendqisi2
-	ldr	r5, .L1795
-	.loc 1 2297 0
-	ldr	r6, .L1795+4
-	.loc 1 2285 0
-	adds	r3, r3, #8
-	ldrh	r3, [r0, r3, lsl #1]
-.LVL1991:
-.L1788:
-	.loc 1 2286 0
-	movw	r2, #65535
-	cmp	r3, r2
-	beq	.L1790
-	.loc 1 2296 0
-	ldrb	r3, [r4, #8]	@ zero_extendqisi2
-.LVL1992:
-	cmp	r3, #1
-	bne	.L1791
-	ldrb	r1, [r5]	@ zero_extendqisi2
-	cbnz	r1, .L1791
-	.loc 1 2297 0
-	ldrh	r1, [r4, #2]
-	.loc 1 2296 0
-	ldrh	r1, [r6, r1, lsl #1]
-	cmp	r1, r2
-	bne	.L1791
-	.loc 1 2298 0
-	ldrh	r3, [r4, #4]
-	.loc 1 2299 0
-	ldrh	r0, [r4]
-	.loc 1 2298 0
-	subs	r3, r3, #1
-	strh	r3, [r4, #4]	@ movhi
-	.loc 1 2299 0
-	bl	decrement_vpc_count
-.LVL1993:
-	.loc 1 2300 0
-	ldrh	r2, [r4, #4]
-	cbnz	r2, .L1790
-	.loc 1 2301 0
-	ldrh	r3, [r4, #2]
-	.loc 1 2302 0
-	strb	r2, [r4, #6]
-	.loc 1 2301 0
-	adds	r3, r3, #1
-	strh	r3, [r4, #2]	@ movhi
-	pop	{r4, r5, r6, pc}
-.LVL1994:
-.L1790:
-.LDL2:
-	.loc 1 2288 0
-	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	.loc 1 2289 0
-	ldr	r2, .L1795+8
-	.loc 1 2288 0
+	bhi	.L1623
+	mov	r3, #-1
+	str	r3, [r6]
+.L1624:
+	adds	r7, r7, #1
+	adds	r6, r6, #36
+	b	.L1622
+.L1623:
+	ldr	r2, .L1650+8
+	ldrb	r5, [r2, r3]	@ zero_extendqisi2
+	mov	r0, r5
+	bl	NandcWaitFlashReady
+	mov	r0, r5
+	bl	NandcFlashCs
+	ldr	r1, [sp, #20]
+	mov	r0, r5
+	bl	FlashProgFirstCmd
+	ldr	r3, [r6, #12]
+	mov	r2, r10
+	movs	r1, #1
+	mov	r0, r5
+	str	r3, [sp]
+	ldr	r3, [r6, #8]
+	bl	NandcXferData
+	ldr	r1, [sp, #20]
+	mov	r0, r5
+	bl	FlashProgSecondCmd
+	mov	r0, r5
+	bl	NandcWaitFlashReady
+	ldr	r1, [sp, #20]
+	mov	r0, r5
+	bl	FlashReadStatus
+	sbfx	r0, r0, #0, #1
+	ldr	r1, [sp, #20]
+	str	r0, [r6]
+	mov	r0, r5
+	ldr	r3, [fp]
+	add	r1, r1, r3
+	bl	FlashProgFirstCmd
+	ldr	r3, [r6, #8]
+	cbz	r3, .L1625
+	add	r3, r3, #2048
+.L1625:
+	ldr	r2, [r6, #12]
+	cbz	r2, .L1626
+	adds	r2, r2, #8
+.L1626:
+	str	r2, [sp]
+	movs	r1, #1
+	mov	r2, r10
+	mov	r0, r5
+	bl	NandcXferData
+	ldr	r3, [fp]
+	mov	r0, r5
+	ldr	r1, [sp, #20]
+	add	r1, r1, r3
+	bl	FlashProgSecondCmd
+	mov	r0, r5
+	bl	NandcWaitFlashReady
+	ldr	r1, [sp, #20]
+	mov	r0, r5
+	bl	FlashReadStatus
+	lsls	r2, r0, #31
+	mov	r0, r5
+	itt	mi
+	movmi	r3, #-1
+	strmi	r3, [r6]
+	bl	NandcFlashDeCs
+	b	.L1624
+.L1635:
+	ldr	r3, [r4]
 	adds	r3, r3, #1
-	.loc 1 2289 0
-	ldrh	r2, [r2]
-	.loc 1 2288 0
+	bne	.L1630
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1650+12
+	bl	printf
+.L1631:
+	add	r8, r8, #1
+	adds	r4, r4, #36
+.L1629:
+	cmp	r7, r8
+	bne	.L1635
+	b	.L1649
+.L1630:
+	sub	r3, r7, r8
+	ldr	fp, .L1650+32
 	uxtb	r3, r3
-	strb	r3, [r4, #6]
-	.loc 1 2289 0
-	cmp	r2, r3
-	bne	.L1789
-	.loc 1 2290 0
-	ldrh	r3, [r4, #2]
-	adds	r3, r3, #1
-	strh	r3, [r4, #2]	@ movhi
-	.loc 1 2291 0
+	add	r2, sp, #20
+	ldr	r1, [sp, #8]
+	mov	r0, r4
+	str	r3, [sp]
+	add	r3, sp, #24
+	bl	LogAddr2PhyAddr
+	ldr	lr, [r10]
 	movs	r3, #0
-	strb	r3, [r4, #6]
-.L1789:
-	.loc 1 2293 0
-	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	adds	r3, r3, #8
-	ldrh	r3, [r4, r3, lsl #1]
-.LVL1995:
-	b	.L1788
-.LVL1996:
-.L1791:
-	.loc 1 2308 0
-	ldrb	r2, [r5]	@ zero_extendqisi2
-	cbz	r2, .L1784
-	cmp	r3, #1
-	bne	.L1784
-	.loc 1 2309 0
-	ldr	r3, .L1795+12
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r3]
+	ldr	ip, [fp]
+	mov	r6, r4
+	add	r5, sp, #28
+	str	r3, [lr]
+	str	r3, [ip]
+	ldmia	r6!, {r0, r1, r2, r3}
+	stmia	r5!, {r0, r1, r2, r3}
+	str	lr, [sp, #36]
+	ldmia	r6!, {r0, r1, r2, r3}
+	str	ip, [sp, #40]
+	stmia	r5!, {r0, r1, r2, r3}
+	movs	r1, #1
+	ldr	r3, [r6]
+	add	r0, sp, #28
+	ldr	r2, [sp, #8]
+	str	r3, [r5]
+	bl	FlashReadPages
+	ldr	r5, [sp, #28]
+	adds	r3, r5, #1
+	bne	.L1632
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1650+16
+	bl	printf
+	str	r5, [r4]
+.L1632:
+	ldr	r3, [r4, #12]
+	cbz	r3, .L1633
+	ldr	r2, [r3]
+	ldr	r3, [fp]
+	ldr	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1784
-	.loc 1 2310 0
-	ldr	r3, .L1795+16
-	ldrh	r1, [r4]
-	ldrh	r0, [r4, #4]
+	beq	.L1633
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1650+20
+	bl	printf
+	mov	r3, #-1
+	str	r3, [r4]
+.L1633:
+	ldr	r3, [r4, #8]
+	cmp	r3, #0
+	beq	.L1631
 	ldr	r2, [r3]
-	ldrh	r3, [r2, r1, lsl #1]
-	subs	r3, r3, r0
-	strh	r3, [r2, r1, lsl #1]	@ movhi
-	.loc 1 2311 0
-	movs	r3, #0
-	.loc 1 2312 0
-	ldr	r2, .L1795+20
-	.loc 1 2311 0
-	strh	r3, [r4, #4]	@ movhi
-	.loc 1 2313 0
-	strb	r3, [r4, #6]
-	.loc 1 2312 0
-	ldrh	r2, [r2]
-	strh	r2, [r4, #2]	@ movhi
-.LVL1997:
-.L1784:
-	pop	{r4, r5, r6, pc}
-.LVL1998:
-.L1796:
+	ldr	r3, [r10]
+	ldr	r3, [r3]
+	cmp	r2, r3
+	beq	.L1631
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1650+24
+	bl	printf
+	mov	r3, #-1
+	str	r3, [r4]
+	b	.L1631
+.L1639:
+	mov	r8, #0
+	ldr	r10, .L1650+36
+	b	.L1629
+.L1651:
 	.align	2
-.L1795:
-	.word	.LANCHOR8
-	.word	.LANCHOR117
-	.word	.LANCHOR37
-	.word	.LANCHOR53
-	.word	.LANCHOR83
-	.word	.LANCHOR52
-.LBE455:
-.LBE454:
-	.cfi_endproc
-.LFE373:
-	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
-	.section	.text.get_new_active_ppa,"ax",%progbits
+.L1650:
+	.word	.LANCHOR31
+	.word	.LANCHOR25
+	.word	.LANCHOR26
+	.word	.LC29
+	.word	.LC30
+	.word	.LC31
+	.word	.LC32
+	.word	.LANCHOR3
+	.word	.LANCHOR199
+	.word	.LANCHOR198
+	.size	FlashProgSlc2KPages, .-FlashProgSlc2KPages
+	.section	.text.FlashProgPages,"ax",%progbits
 	.align	1
-	.global	get_new_active_ppa
+	.global	FlashProgPages
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	get_new_active_ppa, %function
-get_new_active_ppa:
-.LFB388:
-	.loc 1 3021 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
+	.type	FlashProgPages, %function
+FlashProgPages:
+	@ args = 0, pretend = 0, frame = 64
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1999:
-	push	{r4, r5, r6, r7, r8, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 4, -24
-	.cfi_offset 5, -20
-	.cfi_offset 6, -16
-	.cfi_offset 7, -12
-	.cfi_offset 8, -8
-	.cfi_offset 14, -4
-	.loc 1 3025 0
-	movw	r3, #65535
-	ldrh	r2, [r0]
-	.loc 1 3021 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #72
+	ldr	r5, .L1704
 	mov	r4, r0
-	.loc 1 3025 0
-	cmp	r2, r3
-	bne	.L1798
-	.loc 1 3025 0 is_stmt 0 discriminator 1
-	ldr	r1, .L1819
-	movw	r2, #3025
-	ldr	r0, .L1819+4
-.LVL2000:
-	bl	printf
-.LVL2001:
-	ldr	r1, .L1819+8
-	ldr	r0, .L1819+12
-	bl	printf
-.LVL2002:
-.L1798:
-	.loc 1 3026 0 is_stmt 1
-	ldr	r5, .L1819+16
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r5]
-	cmp	r2, r3
-	bne	.L1799
-	.loc 1 3026 0 is_stmt 0 discriminator 1
-	ldr	r1, .L1819
-	movw	r2, #3026
-	ldr	r0, .L1819+4
-	bl	printf
-.LVL2003:
-	ldr	r1, .L1819+8
-	ldr	r0, .L1819+12
-	bl	printf
-.LVL2004:
-.L1799:
-	.loc 1 3027 0 is_stmt 1
-	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1800
-	.loc 1 3027 0 is_stmt 0 discriminator 1
-	ldr	r1, .L1819
-	movw	r2, #3027
-	ldr	r0, .L1819+4
-	bl	printf
-.LVL2005:
-	ldr	r1, .L1819+8
-	ldr	r0, .L1819+12
-	bl	printf
-.LVL2006:
-.L1800:
-	.loc 1 3028 0 is_stmt 1
-	movs	r3, #0
-	ldr	r7, .L1819+20
-	strb	r3, [r4, #10]
-	.loc 1 3029 0
-	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	.loc 1 3039 0
-	ldr	r6, .L1819+24
-	.loc 1 3029 0
-	adds	r3, r3, #8
-	ldrh	r2, [r4, r3, lsl #1]
-.LVL2007:
-.L1801:
-	.loc 1 3030 0
-	movw	r0, #65535
-	cmp	r2, r0
-	beq	.L1802
-	.loc 1 3039 0
-	ldrb	r3, [r4, #8]	@ zero_extendqisi2
-	ldrh	r1, [r4, #2]
-	cmp	r3, #1
-	ldrh	r3, [r4, #4]
-	bne	.L1804
-	.loc 1 3039 0 is_stmt 0 discriminator 1
-	ldrb	ip, [r6]	@ zero_extendqisi2
-	cmp	ip, #0
-	bne	.L1804
-	.loc 1 3039 0 discriminator 2
-	ldr	ip, .L1819+28
-	ldrh	ip, [ip, r1, lsl #1]
-	cmp	ip, r0
-	bne	.L1804
-	.loc 1 3040 0 is_stmt 1
-	subs	r3, r3, #1
-	.loc 1 3041 0
-	ldrh	r0, [r4]
-	.loc 1 3040 0
-	strh	r3, [r4, #4]	@ movhi
-	.loc 1 3041 0
-	bl	decrement_vpc_count
-.LVL2008:
-.L1802:
-	.loc 1 3032 0
-	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	.loc 1 3033 0
-	ldrh	r2, [r7]
-	.loc 1 3032 0
-	adds	r3, r3, #1
-	uxtb	r3, r3
-	.loc 1 3033 0
-	cmp	r2, r3
-	.loc 1 3032 0
-	strb	r3, [r4, #6]
-	.loc 1 3033 0
-	bne	.L1803
-	.loc 1 3034 0
-	ldrh	r3, [r4, #2]
-	adds	r3, r3, #1
-	strh	r3, [r4, #2]	@ movhi
-	.loc 1 3035 0
-	movs	r3, #0
-	strb	r3, [r4, #6]
-.L1803:
-	.loc 1 3037 0
-	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	adds	r3, r3, #8
-	ldrh	r2, [r4, r3, lsl #1]
-.LVL2009:
-	b	.L1801
-.L1804:
-	.loc 1 3055 0
-	ldr	r8, .L1819+24
-	.loc 1 3044 0
-	orr	r6, r1, r2, lsl #10
-.LVL2010:
-	.loc 1 3045 0
-	subs	r3, r3, #1
-	strh	r3, [r4, #4]	@ movhi
-.LVL2011:
-.L1805:
-	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	.loc 1 3053 0
-	movw	r2, #65535
-	.loc 1 3049 0
-	ldrh	r0, [r7]
-.L1807:
-	.loc 1 3048 0
-	adds	r3, r3, #1
+	mov	r8, r2
+	str	r1, [sp, #8]
+	ldr	r5, [r5]
+	str	r3, [sp, #20]
+	ldrb	r5, [r5, #19]	@ zero_extendqisi2
+	str	r5, [sp, #16]
+	ldr	r5, .L1704+4
+	ldrb	r7, [r5]	@ zero_extendqisi2
+	cbnz	r7, .L1653
+	ldr	r3, .L1704+8
+	ldrb	r3, [r3, #9]	@ zero_extendqisi2
+	str	r3, [sp, #12]
+.L1654:
+	ldr	r3, [sp, #8]
+	cmp	r7, r3
+	bcc	.L1667
+	ldr	r6, .L1704+12
+	movs	r5, #0
+	ldr	r7, .L1704+16
+.L1668:
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	cmp	r5, r3
+	bcc	.L1670
+	ldr	r3, [sp, #20]
+	cmp	r3, #0
+	bne	.L1671
+.L1679:
+	movs	r0, #0
+	b	.L1652
+.L1653:
+	bl	FlashProgSlc2KPages
+.L1652:
+	add	sp, sp, #72
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1667:
+	ldr	r3, [sp, #8]
+	movs	r6, #36
+	muls	r6, r7, r6
+	add	r2, sp, #28
+	mov	r1, r8
+	subs	r3, r3, r7
 	uxtb	r3, r3
-	.loc 1 3049 0
+	add	fp, r4, r6
+	str	r3, [sp]
+	mov	r0, fp
+	add	r3, sp, #32
+	bl	LogAddr2PhyAddr
+	ldr	r3, .L1704+12
+	mov	r10, r0
+	ldr	r0, [sp, #32]
+	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r0
-	.loc 1 3050 0
-	itttt	eq
-	ldrheq	r3, [r4, #2]
-	addeq	r3, r3, #1
-	strheq	r3, [r4, #2]	@ movhi
-	.loc 1 3051 0
-	moveq	r3, #0
-	.loc 1 3053 0
-	add	r1, r3, #8
-	ldrh	r1, [r4, r1, lsl #1]
-	cmp	r1, r2
-	beq	.L1807
-	strb	r3, [r4, #6]
-	.loc 1 3055 0
-	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	bhi	.L1656
+	mov	r3, #-1
+	str	r3, [r4, r6]
+.L1657:
+	adds	r7, r7, #1
+	b	.L1654
+.L1656:
+	ldr	r3, .L1704+20
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	ldr	r3, .L1704+24
+	it	eq
+	moveq	r10, #0
+	add	r3, r3, r0, lsl #4
+	ldr	r3, [r3, #8]
+	cbz	r3, .L1659
+	uxtb	r0, r0
+	bl	FlashWaitCmdDone
+.L1659:
+	ldr	r3, [sp, #32]
+	movs	r1, #0
+	ldr	r2, .L1704+24
+	add	r2, r2, r3, lsl #4
+	str	r1, [r2, #12]
+	ldr	r1, [sp, #28]
+	str	fp, [r2, #8]
+	str	r1, [r2, #4]
+	cmp	r10, #0
+	beq	.L1660
+	add	r1, r6, #36
+	add	r1, r1, r4
+	str	r1, [r2, #12]
+.L1660:
+	ldr	r2, .L1704+28
+	ldrb	r5, [r2, r3]	@ zero_extendqisi2
+	lsls	r3, r3, #4
+	ldr	r2, .L1704+24
+	mov	r0, r5
+	strb	r5, [r2, r3]
+	ldr	r3, .L1704+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1808
-	.loc 1 3055 0 is_stmt 0 discriminator 1
-	ldrb	r1, [r8]	@ zero_extendqisi2
-	ldrh	r3, [r4, #2]
-	cbnz	r1, .L1809
-	.loc 1 3055 0 discriminator 2
-	ldr	r1, .L1819+28
-	ldrh	r3, [r1, r3, lsl #1]
-	cmp	r3, r2
-	bne	.L1808
-	.loc 1 3055 0 discriminator 3
-	ldrh	r3, [r4, #4]
-	cbz	r3, .L1808
-	.loc 1 3057 0 is_stmt 1
+	bne	.L1661
+	bl	NandcWaitFlashReady
+.L1662:
+	ldr	r3, [sp, #16]
 	subs	r3, r3, #1
-	.loc 1 3058 0
-	ldrh	r0, [r4]
-	.loc 1 3057 0
-	strh	r3, [r4, #4]	@ movhi
-	.loc 1 3058 0
-	bl	decrement_vpc_count
-.LVL2012:
-	.loc 1 3059 0
-	b	.L1805
-.L1809:
-	.loc 1 3063 0
-	ldr	r2, .L1819+32
-	ldrh	r2, [r2]
-	cmp	r3, r2
-	bcc	.L1808
-	.loc 1 3064 0
-	ldr	r3, .L1819+36
-	ldrh	r1, [r4]
-	ldrh	r0, [r4, #4]
-	ldr	r2, [r3]
-	ldrh	r3, [r2, r1, lsl #1]
-	subs	r3, r3, r0
-	strh	r3, [r2, r1, lsl #1]	@ movhi
-	.loc 1 3065 0
+	cmp	r3, #6
+	bhi	.L1663
+	ldr	r3, .L1704+32
+	ldrb	r3, [r3, r5]	@ zero_extendqisi2
+	cbz	r3, .L1663
+	ldr	r1, .L1704+36
 	movs	r3, #0
-	.loc 1 3066 0
-	ldrh	r2, [r5]
-	.loc 1 3065 0
-	strh	r3, [r4, #4]	@ movhi
-	.loc 1 3067 0
-	strb	r3, [r4, #6]
-	.loc 1 3066 0
-	strh	r2, [r4, #2]	@ movhi
-.L1808:
-	.loc 1 3071 0
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r5]
+	mov	r0, r5
+	adds	r2, r1, #4
+	ldrb	r1, [r1, #1]	@ zero_extendqisi2
+	bl	HynixSetRRPara
+.L1663:
+	mov	r0, r5
+	bl	NandcFlashCs
+	cmp	r8, #1
+	mov	r0, r5
+	bne	.L1664
+	ldr	r3, .L1704+16
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L1664
+	bl	flash_enter_slc_mode
+.L1665:
+	ldr	r1, [sp, #28]
+	mov	r0, r5
+	bl	FlashProgFirstCmd
+	ldr	r3, [fp, #12]
+	movs	r1, #1
+	ldr	r2, [sp, #12]
+	mov	r0, r5
+	str	r3, [sp]
+	ldr	r3, [fp, #8]
+	bl	NandcXferData
+	cmp	r10, #0
+	beq	.L1666
+	ldr	r1, [sp, #28]
+	mov	r0, r5
+	bl	FlashProgDpFirstCmd
+	ldr	r3, .L1704+40
+	mov	r0, r5
+	ldr	r2, [sp, #32]
+	adds	r6, r6, #36
+	ldr	r1, [sp, #28]
+	add	r6, r6, r4
+	ldr	r2, [r3, r2, lsl #2]
+	adds	r2, r2, #0
+	it	ne
+	movne	r2, #1
+	bl	FlashWaitReadyEN
+	ldr	r3, .L1704+44
+	mov	r0, r5
+	ldr	r1, [sp, #28]
+	ldr	r3, [r3]
+	add	r1, r1, r3
+	bl	FlashProgDpSecondCmd
+	ldr	r3, [r6, #12]
+	movs	r1, #1
+	ldr	r2, [sp, #12]
+	mov	r0, r5
+	str	r3, [sp]
+	ldr	r3, [r6, #8]
+	bl	NandcXferData
+.L1666:
+	ldr	r1, [sp, #28]
+	mov	r0, r5
+	bl	FlashProgSecondCmd
+	mov	r0, r5
+	add	r7, r7, r10
+	bl	NandcFlashDeCs
+	b	.L1657
+.L1661:
+	bl	NandcFlashCs
+	ldr	r2, [sp, #32]
+	mov	r0, r5
+	ldr	r3, .L1704+40
+	ldr	r1, [sp, #28]
+	ldr	r2, [r3, r2, lsl #2]
+	adds	r2, r2, #0
+	it	ne
+	movne	r2, #1
+	bl	FlashWaitReadyEN
+	mov	r0, r5
+	bl	NandcFlashDeCs
+	b	.L1662
+.L1664:
+	bl	flash_exit_slc_mode
+	b	.L1665
+.L1670:
+	uxtb	r0, r5
+	bl	FlashWaitCmdDone
+	cmp	r8, #1
+	bne	.L1669
+	ldrb	r3, [r7]	@ zero_extendqisi2
+	cbz	r3, .L1669
+	ldr	r2, .L1704+24
+	lsls	r3, r5, #4
+	ldrb	r0, [r2, r3]	@ zero_extendqisi2
+	bl	flash_exit_slc_mode
+.L1669:
+	adds	r5, r5, #1
+	b	.L1668
+.L1671:
+	ldr	r10, .L1704+64
+	movs	r7, #0
+.L1672:
+	ldr	r3, [sp, #8]
+	cmp	r7, r3
+	beq	.L1679
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	bne	.L1673
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1704+48
+	bl	printf
+.L1674:
+	adds	r7, r7, #1
+	adds	r4, r4, #36
+	b	.L1672
+.L1673:
+	ldr	r3, [sp, #8]
+	add	r2, sp, #28
+	ldr	fp, .L1704+68
+	mov	r1, r8
+	mov	r0, r4
+	mov	r6, r4
+	subs	r3, r3, r7
+	add	r5, sp, #36
+	uxtb	r3, r3
+	str	r3, [sp]
+	add	r3, sp, #32
+	bl	LogAddr2PhyAddr
+	ldr	lr, [r10]
+	movs	r3, #0
+	ldr	ip, [fp]
+	str	r3, [lr]
+	str	r3, [ip]
+	ldmia	r6!, {r0, r1, r2, r3}
+	stmia	r5!, {r0, r1, r2, r3}
+	str	lr, [sp, #44]
+	ldmia	r6!, {r0, r1, r2, r3}
+	str	ip, [sp, #48]
+	stmia	r5!, {r0, r1, r2, r3}
+	mov	r2, r8
+	ldr	r3, [r6]
+	movs	r1, #1
+	add	r0, sp, #36
+	str	r3, [r5]
+	bl	FlashReadPages
+	ldr	r5, [sp, #36]
+	adds	r3, r5, #1
+	bne	.L1675
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1704+52
+	bl	printf
+	str	r5, [r4]
+.L1675:
+	ldr	r3, [r4, #12]
+	cbz	r3, .L1676
+	ldr	r2, [r3]
+	ldr	r3, [fp]
+	ldr	r3, [r3]
 	cmp	r2, r3
-	bne	.L1797
-	.loc 1 3071 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r4, #4]
-	cbz	r3, .L1797
-	.loc 1 3071 0 discriminator 2
-	ldr	r1, .L1819
-	movw	r2, #3071
-	ldr	r0, .L1819+4
+	beq	.L1676
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1704+56
 	bl	printf
-.LVL2013:
-	ldr	r1, .L1819+8
-	ldr	r0, .L1819+12
+	mov	r3, #-1
+	str	r3, [r4]
+.L1676:
+	ldr	r3, [r4, #8]
+	cmp	r3, #0
+	beq	.L1674
+	ldr	r2, [r3]
+	ldr	r3, [r10]
+	ldr	r3, [r3]
+	cmp	r2, r3
+	beq	.L1674
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1704+60
 	bl	printf
-.LVL2014:
-.L1797:
-	.loc 1 3073 0 is_stmt 1
-	mov	r0, r6
-	pop	{r4, r5, r6, r7, r8, pc}
-.LVL2015:
-.L1820:
+	mov	r3, #-1
+	str	r3, [r4]
+	b	.L1674
+.L1705:
 	.align	2
-.L1819:
-	.word	.LANCHOR205
-	.word	.LC6
-	.word	.LC7
-	.word	.LC8
-	.word	.LANCHOR52
-	.word	.LANCHOR37
+.L1704:
+	.word	.LANCHOR18
+	.word	.LANCHOR1
+	.word	.LANCHOR31
+	.word	.LANCHOR25
 	.word	.LANCHOR8
-	.word	.LANCHOR117
-	.word	.LANCHOR53
-	.word	.LANCHOR83
-	.cfi_endproc
-.LFE388:
-	.size	get_new_active_ppa, .-get_new_active_ppa
-	.section	.text.FtlVpcTblFlush,"ax",%progbits
-	.align	1
-	.global	FtlVpcTblFlush
+	.word	.LANCHOR27
+	.word	.LANCHOR23
+	.word	.LANCHOR26
+	.word	.LANCHOR21
+	.word	.LANCHOR20
+	.word	.LANCHOR17
+	.word	.LANCHOR3
+	.word	.LC29
+	.word	.LC30
+	.word	.LC31
+	.word	.LC32
+	.word	.LANCHOR198
+	.word	.LANCHOR199
+	.size	FlashProgPages, .-FlashProgPages
+	.section	.text.FlashTestBlk,"ax",%progbits
+	.align	1
+	.global	FlashTestBlk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlVpcTblFlush, %function
-FtlVpcTblFlush:
-.LFB360:
-	.loc 1 1135 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 8
+	.type	FlashTestBlk, %function
+FlashTestBlk:
+	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2016:
-	.loc 1 1140 0
-	ldr	r3, .L1841
-	.loc 1 1135 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 1 1140 0
-	ldr	r2, [r3]
-	str	r3, [sp]
-	cmp	r2, #0
-	bne	.L1823
-.LBB459:
-.LBB460:
-	.loc 1 1143 0
-	ldr	r8, .L1841+108
-	ldr	r4, .L1841+4
-	.loc 1 1144 0
-	ldr	r7, .L1841+8
-	.loc 1 1143 0
-	ldr	r3, [r8]
-	.loc 1 1152 0
-	ldr	r5, .L1841+12
-	.loc 1 1144 0
-	ldr	r6, [r7]
-	.loc 1 1143 0
-	str	r3, [r4, #8]
-	.loc 1 1146 0
-	ldr	r3, .L1841+16
-	.loc 1 1144 0
-	str	r6, [r4, #12]
-.LVL2017:
-	.loc 1 1153 0
-	ldr	r0, .L1841+20
-	.loc 1 1146 0
-	ldrh	r1, [r3]
-	.loc 1 1150 0
-	str	r2, [r6, #12]
-	.loc 1 1146 0
-	strh	r1, [r6, #2]	@ movhi
-	.loc 1 1147 0
-	movw	r1, #61604
-	strh	r1, [r6]	@ movhi
-	.loc 1 1148 0
-	ldr	r1, [r3, #8]
-	.loc 1 1149 0
-	str	r2, [r6, #8]
-	.loc 1 1153 0
-	ldr	r2, .L1841+24
-	.loc 1 1148 0
-	str	r1, [r6, #4]
-	.loc 1 1154 0
-	ldrh	r3, [r3, #6]
-	.loc 1 1153 0
-	stm	r5, {r0, r2}
-	.loc 1 1154 0
-	strh	r3, [r5, #8]	@ movhi
-	.loc 1 1155 0
-	ldr	r3, .L1841+28
-	ldrh	r3, [r3]
-	strb	r3, [r5, #10]
-	.loc 1 1157 0
-	ldr	r3, .L1841+32
-	ldrh	r2, [r3]
-	.loc 1 1158 0
-	ldrh	r1, [r3, #2]
-	.loc 1 1157 0
-	strh	r2, [r5, #14]	@ movhi
-	.loc 1 1158 0
-	ldrb	r2, [r3, #6]	@ zero_extendqisi2
-	.loc 1 1159 0
-	ldrb	r3, [r3, #8]	@ zero_extendqisi2
-	strb	r3, [r5, #11]
-	.loc 1 1158 0
-	orr	r2, r2, r1, lsl #6
-	.loc 1 1161 0
-	ldr	r3, .L1841+36
-	.loc 1 1158 0
-	strh	r2, [r5, #16]	@ movhi
-	.loc 1 1161 0
-	ldrh	r2, [r3]
-	.loc 1 1162 0
-	ldrh	r1, [r3, #2]
-	.loc 1 1161 0
-	strh	r2, [r5, #18]	@ movhi
-	.loc 1 1162 0
-	ldrb	r2, [r3, #6]	@ zero_extendqisi2
-	.loc 1 1163 0
-	ldrb	r3, [r3, #8]	@ zero_extendqisi2
-	strb	r3, [r5, #12]
-	.loc 1 1162 0
-	orr	r2, r2, r1, lsl #6
-	.loc 1 1165 0
-	ldr	r3, .L1841+40
-	.loc 1 1162 0
-	strh	r2, [r5, #20]	@ movhi
-	.loc 1 1165 0
-	ldrh	r2, [r3]
-	strh	r2, [r5, #22]	@ movhi
-	.loc 1 1166 0
-	ldrh	r1, [r3, #2]
-	ldrb	r2, [r3, #6]	@ zero_extendqisi2
-	.loc 1 1167 0
-	ldrb	r3, [r3, #8]	@ zero_extendqisi2
-	.loc 1 1180 0
-	ldr	r0, [r4, #8]
-	.loc 1 1167 0
-	strb	r3, [r5, #13]
-	.loc 1 1166 0
-	orr	r2, r2, r1, lsl #6
-	.loc 1 1169 0
-	ldr	r3, .L1841+44
-	.loc 1 1180 0
-	movs	r1, #255
-	.loc 1 1166 0
-	strh	r2, [r5, #24]	@ movhi
-	.loc 1 1169 0
-	ldr	r3, [r3]
-	str	r3, [r5, #32]
-	.loc 1 1174 0
-	ldr	r3, .L1841+48
-	ldr	r3, [r3]
-	str	r3, [r5, #40]
-	.loc 1 1175 0
-	ldr	r3, .L1841+52
+	ldr	r3, .L1709
+	push	{r4, r5, lr}
+	mov	r4, r0
+	sub	sp, sp, #108
 	ldr	r3, [r3]
-	str	r3, [r5, #36]
-	.loc 1 1180 0
-	ldr	r3, .L1841+56
-	ldrh	r2, [r3]
+	cmp	r0, r3
+	bcc	.L1708
+	ldr	r5, .L1709+4
+	add	r0, sp, #40
+	movs	r2, #32
+	movs	r1, #165
+	str	r0, [sp, #16]
+	lsls	r4, r4, #10
+	ldr	r3, [r5]
+	str	r3, [sp, #12]
 	bl	ftl_memset
-.LVL2018:
-	.loc 1 1181 0
-	mov	r1, r5
-	.loc 1 1182 0
-	ldr	r5, .L1841+60
-	.loc 1 1181 0
-	movs	r2, #48
-	ldr	r0, [r4, #8]
-	bl	ftl_memcpy
-.LVL2019:
-	.loc 1 1182 0
-	ldrh	r2, [r5]
-	ldr	r3, .L1841+64
-	ldr	r0, [r4, #8]
-	ldr	r1, [r3]
-	lsls	r2, r2, #1
-	adds	r0, r0, #48
-	bl	ftl_memcpy
-.LVL2020:
-	.loc 1 1183 0
-	ldrh	r0, [r5]
-	ldr	r3, [r4, #8]
-	ldr	r1, .L1841+68
-	lsrs	r2, r0, #3
-	adds	r0, r0, #24
-	lsls	r0, r0, #1
-	ldr	r1, [r1]
-	adds	r2, r2, #4
-	bic	r0, r0, #3
-	add	r0, r0, r3
-	bl	ftl_memcpy
-.LVL2021:
-	.loc 1 1184 0
-	ldr	r3, .L1841+72
-	str	r7, [sp, #4]
-	ldrh	r3, [r3]
-	cbz	r3, .L1824
-.LBB461:
-	.loc 1 1185 0
-	ldrh	r0, [r5]
-.LVL2022:
-	.loc 1 1186 0
-	ldr	r3, .L1841+76
-	ldr	r1, .L1841+80
-	ldrh	r2, [r3]
-	.loc 1 1185 0
-	lsrs	r3, r0, #3
-	.loc 1 1186 0
-	ldr	r1, [r1]
-	.loc 1 1185 0
-	add	r3, r3, r0, lsl #1
-	.loc 1 1186 0
-	ldr	r0, [r4, #8]
-.LVL2023:
-	.loc 1 1185 0
-	adds	r3, r3, #52
-	.loc 1 1186 0
-	lsls	r2, r2, #2
-	ubfx	r3, r3, #2, #14
-	add	r0, r0, r3, lsl #2
-	bl	ftl_memcpy
-.LVL2024:
-.L1824:
-.LBE461:
-	.loc 1 1193 0
-	ldr	r5, .L1841+16
-	.loc 1 1138 0
-	movs	r7, #0
-	.loc 1 1136 0
-	movw	fp, #65535
-	.loc 1 1189 0
-	movs	r0, #0
-	bl	FtlUpdateVaildLpn
-.LVL2025:
-	mov	r10, r5
-.L1825:
-.LVL2026:
-	.loc 1 1191 0
-	ldr	r3, [r8]
-	.loc 1 1193 0
-	ldrh	r2, [r5]
-	.loc 1 1194 0
-	ldr	r0, .L1841+4
-	.loc 1 1191 0
-	str	r3, [r4, #8]
-	.loc 1 1192 0
-	ldr	r3, [sp, #4]
-	ldr	r3, [r3]
-	str	r3, [r4, #12]
-	.loc 1 1193 0
-	ldrh	r3, [r5, #2]
-	orr	r3, r3, r2, lsl #10
-	str	r3, [r4, #4]
-	.loc 1 1194 0
-	movs	r3, #1
-	mov	r2, r3
-	mov	r1, r3
-	bl	FlashProgPages
-.LVL2027:
-	.loc 1 1195 0
-	ldr	r3, .L1841+84
-	ldrh	r2, [r5, #2]
-	ldrh	r3, [r3]
-	subs	r3, r3, #1
-	cmp	r2, r3
-	blt	.L1826
-	.loc 1 1197 0
-	ldrh	r3, [r5]
-	.loc 1 1196 0
-	ldrh	fp, [r5, #4]
-.LVL2028:
-	.loc 1 1197 0
-	strh	r3, [r5, #4]	@ movhi
-	.loc 1 1198 0
-	movs	r3, #0
-	strh	r3, [r5, #2]	@ movhi
-	.loc 1 1199 0
-	bl	FtlFreeSysBlkQueueOut
-.LVL2029:
-	.loc 1 1204 0
-	ldr	r2, .L1841+48
-	.loc 1 1199 0
-	strh	r0, [r5]	@ movhi
-	.loc 1 1204 0
-	ldr	r3, [r2]
-	adds	r1, r3, #1
-	str	r3, [r5, #8]
-	str	r1, [r2]
-	.loc 1 1205 0
-	lsls	r2, r0, #10
-	str	r2, [r4, #4]
-	.loc 1 1206 0
-	str	r3, [r6, #4]
-	.loc 1 1208 0
+	movs	r2, #8
+	movs	r1, #90
+	ldr	r0, [r5]
+	bl	ftl_memset
+	movs	r2, #1
+	add	r0, sp, #4
+	mov	r1, r2
+	str	r4, [sp, #8]
+	bl	FlashEraseBlocks
 	movs	r3, #1
-	.loc 1 1207 0
-	strh	r0, [r6, #2]	@ movhi
-	.loc 1 1208 0
+	add	r0, sp, #4
 	mov	r2, r3
 	mov	r1, r3
-	ldr	r0, .L1841+4
 	bl	FlashProgPages
-.LVL2030:
-.L1826:
-	.loc 1 1210 0
-	ldrh	r3, [r10, #2]
-	.loc 1 1211 0
-	ldr	r2, [r4]
-	.loc 1 1210 0
-	adds	r3, r3, #1
-	uxth	r3, r3
-	.loc 1 1211 0
-	adds	r1, r2, #1
-	.loc 1 1210 0
-	strh	r3, [r10, #2]	@ movhi
-	.loc 1 1211 0
-	bne	.L1827
-	.loc 1 1213 0
-	cmp	r3, #1
-	bne	.L1828
-	ldr	r1, .L1841+88
-	movw	r2, #1213
-	ldr	r0, .L1841+92
-	bl	printf
-.LVL2031:
-	ldr	r1, .L1841+96
-	ldr	r0, .L1841+100
-	bl	printf
-.LVL2032:
-.L1828:
-	.loc 1 1214 0
-	ldrh	r3, [r10, #2]
-	.loc 1 1216 0
-	adds	r7, r7, #1
-.LVL2033:
-	uxth	r7, r7
-.LVL2034:
-	.loc 1 1214 0
-	cmp	r3, #1
-	.loc 1 1215 0
-	itttt	eq
-	ldreq	r3, .L1841+84
-	ldrheq	r3, [r3]
-	addeq	r3, r3, #-1
-	strheq	r3, [r10, #2]	@ movhi
-	.loc 1 1217 0
-	cmp	r7, #3
-	bls	.L1825
-	.loc 1 1218 0
-	mov	r2, r7
-	ldr	r1, [r4, #4]
-	ldr	r0, .L1841+104
-	bl	printf
-.LVL2035:
-	.loc 1 1220 0
-	ldr	r2, [sp]
-	movs	r3, #1
-	str	r3, [r2]
-.LVL2036:
-.L1823:
-.LBE460:
-.LBE459:
-	.loc 1 1232 0
-	movs	r0, #0
-	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
+	ldr	r4, [sp, #4]
+	movs	r2, #1
+	movs	r1, #0
+	add	r0, sp, #4
+	adds	r4, r4, #0
+	it	ne
+	movne	r4, #1
+	negs	r4, r4
+	bl	FlashEraseBlocks
+.L1706:
+	mov	r0, r4
+	add	sp, sp, #108
 	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL2037:
-.L1827:
-	.cfi_restore_state
-.LBB463:
-.LBB462:
-	.loc 1 1226 0
-	cmp	r3, #1
-	beq	.L1825
-	cmp	r2, #256
-	beq	.L1825
-	.loc 1 1229 0
-	movw	r3, #65535
-	cmp	fp, r3
-	beq	.L1823
-	.loc 1 1230 0
-	movs	r1, #1
-	mov	r0, fp
-	bl	FtlFreeSysBlkQueueIn
-.LVL2038:
-	b	.L1823
-.L1842:
+	pop	{r4, r5, pc}
+.L1708:
+	movs	r4, #0
+	b	.L1706
+.L1710:
 	.align	2
-.L1841:
-	.word	.LANCHOR76
-	.word	.LANCHOR199
-	.word	.LANCHOR185
-	.word	.LANCHOR80
-	.word	.LANCHOR206
-	.word	1179929683
-	.word	1342177352
-	.word	.LANCHOR44
-	.word	.LANCHOR91
-	.word	.LANCHOR92
-	.word	.LANCHOR93
-	.word	.LANCHOR164
-	.word	.LANCHOR156
-	.word	.LANCHOR157
-	.word	.LANCHOR57
-	.word	.LANCHOR39
-	.word	.LANCHOR83
-	.word	.LANCHOR0
-	.word	.LANCHOR69
-	.word	.LANCHOR66
-	.word	.LANCHOR128
-	.word	.LANCHOR53
-	.word	.LANCHOR207
-	.word	.LC6
-	.word	.LC7
-	.word	.LC8
-	.word	.LC35
-	.word	.LANCHOR180
-.LBE462:
-.LBE463:
-	.cfi_endproc
-.LFE360:
-	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
-	.section	.text.FtlSuperblockPowerLostFix,"ax",%progbits
+.L1709:
+	.word	.LANCHOR149
+	.word	.LANCHOR153
+	.size	FlashTestBlk, .-FlashTestBlk
+	.section	.text.FtlLowFormatEraseBlock,"ax",%progbits
 	.align	1
-	.global	FtlSuperblockPowerLostFix
+	.global	FtlLowFormatEraseBlock
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlSuperblockPowerLostFix, %function
-FtlSuperblockPowerLostFix:
-.LFB380:
-	.loc 1 2531 0
-	.cfi_startproc
+	.type	FtlLowFormatEraseBlock, %function
+FtlLowFormatEraseBlock:
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2039:
-	.loc 1 2537 0
-	ldr	r3, .L1858
-	.loc 1 2531 0
-	push	{r4, r5, r6, r7, r8, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 4, -24
-	.cfi_offset 5, -20
-	.cfi_offset 6, -16
-	.cfi_offset 7, -12
-	.cfi_offset 8, -8
-	.cfi_offset 14, -4
-	mov	r4, r0
+	ldr	r3, .L1756
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #40
-	.cfi_def_cfa_offset 64
-	.loc 1 2537 0
-	ldrb	r5, [r3]	@ zero_extendqisi2
-	cbz	r5, .L1857
-	.loc 1 2537 0 is_stmt 0 discriminator 1
-	ldrb	r5, [r0, #8]	@ zero_extendqisi2
-	cmp	r5, #1
-	bne	.L1852
-.LVL2040:
-	.loc 1 2540 0 is_stmt 1
-	ldrh	r6, [r0, #4]
-.LVL2041:
-.L1844:
-	.loc 1 2550 0
-	ldr	r7, .L1858+4
-	.loc 1 2551 0
-	ldr	r8, .L1858+20
-.LVL2042:
-.L1845:
-	.loc 1 2543 0
-	adds	r6, r6, #-1
-.LVL2043:
-	bcc	.L1847
-.LVL2044:
-	.loc 1 2544 0
-	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1846
-.LVL2045:
-.L1847:
-	.loc 1 2564 0
-	ldr	r3, .L1858+8
-	ldrh	r1, [r4]
-	ldrh	r0, [r4, #4]
-	ldr	r2, [r3]
-	ldrh	r3, [r2, r1, lsl #1]
-	subs	r3, r3, r0
-	strh	r3, [r2, r1, lsl #1]	@ movhi
-	.loc 1 2565 0
-	ldr	r3, .L1858+12
+	str	r0, [sp, #8]
+	ldr	r3, [r3]
+	str	r1, [sp, #4]
+	cmp	r3, #0
+	bne	.L1738
+	ldr	r2, .L1756+4
+	mov	r10, r3
+	mov	r5, r3
+	mov	r4, r3
+	mov	r8, #36
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	str	r2, [sp, #20]
+	ldr	r2, .L1756+8
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	str	r2, [sp, #12]
+	ldr	r2, .L1756+12
+	str	r0, [r2]
+	ldr	r2, .L1756+16
+	ldrh	fp, [r2]
+	ldr	r2, .L1756+20
+	ldr	r7, [r2]
+	ldr	r2, .L1756+24
+	ldr	r2, [r2]
+	str	r2, [sp, #16]
+	ldr	r2, .L1756+28
+	ldrh	r2, [r2]
+	str	r2, [sp, #24]
+.L1713:
+	uxth	r2, r10
+	cmp	fp, r2
+	bhi	.L1717
+	cmp	r5, #0
+	beq	.L1711
+	ldr	r3, [sp, #12]
+	mov	r0, r7
+	ldr	r10, .L1756+4
+	mov	r8, #0
+	mov	r2, r5
+	ldr	r7, .L1756+20
+	adds	r6, r3, #0
+	it	ne
+	movne	r6, #1
+	strb	r8, [r10]
+	mov	r1, r6
+	bl	FlashEraseBlocks
+	ldrb	r3, [sp, #20]	@ zero_extendqisi2
+	strb	r3, [r10]
+	mov	r10, #36
+.L1719:
+	uxth	r3, r8
+	cmp	r5, r3
+	bhi	.L1721
+	ldr	r3, [sp, #4]
+	cmp	r3, #0
+	bne	.L1722
+	uxth	r6, r6
+	movs	r3, #6
+	str	r3, [sp, #16]
+	movs	r3, #1
+	str	r3, [sp, #12]
+.L1723:
+	mov	r8, #0
+.L1732:
+	ldr	r3, .L1756+16
+	mov	fp, #0
+	mov	r5, fp
 	ldrh	r3, [r3]
-	strh	r3, [r4, #2]	@ movhi
-	.loc 1 2566 0
-	movs	r3, #0
-	strb	r3, [r4, #6]
-	.loc 1 2567 0
-	strh	r3, [r4, #4]	@ movhi
-	.loc 1 2569 0
+	str	r3, [sp, #24]
+	ldr	r3, .L1756+20
+	ldr	r10, [r3]
+	ldr	r3, .L1756+32
+	ldr	r3, [r3]
+	str	r3, [sp, #28]
+	ldr	r3, .L1756+36
+	ldr	r3, [r3]
+	str	r3, [sp, #32]
+	ldr	r3, .L1756+28
+	ldrh	r3, [r3]
+	str	r3, [sp, #36]
+.L1724:
+	ldr	r3, [sp, #24]
+	uxth	r2, fp
+	cmp	r3, r2
+	bhi	.L1727
+	cbz	r5, .L1711
+	ldr	fp, .L1756+4
+	movs	r3, #1
+	mov	r0, r10
+	movs	r7, #0
+	mov	r2, r6
+	mov	r1, r5
+	strb	r7, [fp]
+	bl	FlashProgPages
+	ldrb	r3, [sp, #20]	@ zero_extendqisi2
+	ldr	r10, .L1756+20
+	strb	r3, [fp]
+	mov	fp, #36
+.L1729:
+	uxth	r3, r7
+	cmp	r5, r3
+	bhi	.L1731
+	ldr	r3, [sp, #16]
+	add	r8, r8, r3
+	ldr	r3, [sp, #12]
+	uxth	r8, r8
+	cmp	r3, r8
+	bhi	.L1732
+	ldr	r8, .L1756+20
+	movs	r7, #0
+	mov	r10, #36
+.L1733:
+	uxth	r3, r7
+	cmp	r5, r3
+	bhi	.L1735
+	ldr	r3, [sp, #8]
+	cmp	r3, #63
+	bls	.L1736
+	ldr	r3, [sp, #4]
+	cbz	r3, .L1711
+.L1736:
+	ldr	r3, .L1756+20
+	mov	r2, r5
+	mov	r1, r6
+	ldr	r0, [r3]
+	bl	FlashEraseBlocks
+.L1711:
+	mov	r0, r4
 	add	sp, sp, #40
-	.cfi_remember_state
-	.cfi_def_cfa_offset 24
 	@ sp needed
-	pop	{r4, r5, r6, r7, r8, pc}
-.LVL2046:
-.L1852:
-	.cfi_restore_state
-	.loc 1 2535 0
-	movs	r5, #0
-.L1857:
-	.loc 1 2534 0
-	movs	r6, #12
-	b	.L1844
-.LVL2047:
-.L1846:
-	.loc 1 2546 0
-	mov	r0, r4
-	bl	get_new_active_ppa
-.LVL2048:
-	str	r0, [sp, #8]
-	.loc 1 2547 0
-	adds	r0, r0, #1
-	beq	.L1847
-	.loc 1 2551 0
-	ldr	r1, [r8]
-	.loc 1 2549 0
-	mov	r3, #-1
-	.loc 1 2550 0
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1717:
+	mul	r2, r8, r10
+	movs	r3, #0
+	ldr	r1, [sp, #8]
+	str	r3, [r7, r2]
+	ldr	r3, .L1756+40
+	ldrb	r0, [r3, r10]	@ zero_extendqisi2
+	bl	V2P_block
+	ldr	r3, [sp, #4]
+	mov	r6, r0
+	cbz	r3, .L1714
+	bl	IsBlkInVendorPart
+	cbnz	r0, .L1715
+.L1714:
+	mov	r0, r6
+	bl	FtlBbmIsBadBlock
+	cbnz	r0, .L1716
+	ldr	r3, [sp, #24]
+	mla	r1, r8, r5, r7
+	lsls	r6, r6, #10
+	mul	r2, r3, r5
+	ldr	r3, [sp, #16]
+	adds	r5, r5, #1
+	str	r6, [r1, #4]
+	uxth	r5, r5
+	str	r0, [r1, #8]
+	bic	r2, r2, #3
+	add	r2, r2, r3
+	str	r2, [r1, #12]
+.L1715:
+	add	r10, r10, #1
+	b	.L1713
+.L1716:
+	adds	r4, r4, #1
+	uxth	r4, r4
+	b	.L1715
+.L1721:
+	mul	r3, r10, r8
 	ldr	r2, [r7]
-	.loc 1 2549 0
-	str	r3, [sp, #20]
-	.loc 1 2551 0
-	str	r1, [sp, #16]
-.LVL2049:
-	.loc 1 2550 0
-	str	r2, [sp, #12]
-	.loc 1 2555 0
-	str	r3, [r1, #12]
-	.loc 1 2554 0
-	str	r3, [r1, #8]
-	.loc 1 2556 0
-	ldrh	r3, [r4]
-	.loc 1 2559 0
-	ldr	r0, .L1858+16
-	.loc 1 2556 0
-	strh	r3, [r1, #2]	@ movhi
-	.loc 1 2557 0
+	adds	r1, r2, r3
+	ldr	r3, [r2, r3]
+	adds	r3, r3, #1
+	bne	.L1720
+	ldr	r0, [r1, #4]
+	adds	r4, r4, #1
+	uxth	r4, r4
+	ubfx	r0, r0, #10, #16
+	bl	FtlBbmMapBadBlock
+.L1720:
+	add	r8, r8, #1
+	b	.L1719
+.L1722:
+	ldr	r3, .L1756+44
+	ldrh	r3, [r3]
+	str	r3, [sp, #12]
+	ldr	r3, .L1756+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L1739
+	ldr	r3, [sp, #12]
+	movs	r6, #1
+	lsrs	r3, r3, #2
+	str	r3, [sp, #16]
+	b	.L1723
+.L1739:
+	movs	r6, #1
+	str	r6, [sp, #16]
+	b	.L1723
+.L1727:
+	movs	r3, #36
+	ldr	r1, [sp, #8]
+	mul	r2, r3, fp
 	movs	r3, #0
-	strh	r3, [r1]	@ movhi
-	.loc 1 2559 0
-	ldr	r2, [r0]
-	str	r2, [r1, #4]
-	adds	r2, r2, #1
-	adds	r1, r2, #1
-.LVL2050:
-	.loc 1 2560 0
-	mov	r1, #1
-	.loc 1 2559 0
-	it	eq
-	moveq	r2, r3
-	str	r2, [r0]
-	.loc 1 2560 0
-	mov	r2, r5
-	add	r0, sp, #4
-	bl	FlashProgPages
-.LVL2051:
-	.loc 1 2561 0
-	ldrh	r0, [r4]
-	bl	decrement_vpc_count
-.LVL2052:
-	b	.L1845
-.L1859:
+	str	r3, [r10, r2]
+	ldr	r3, .L1756+40
+	ldrb	r0, [r3, fp]	@ zero_extendqisi2
+	bl	V2P_block
+	ldr	r3, [sp, #4]
+	mov	r7, r0
+	cbz	r3, .L1725
+	bl	IsBlkInVendorPart
+	cbnz	r0, .L1726
+.L1725:
+	mov	r0, r7
+	bl	FtlBbmIsBadBlock
+	cbnz	r0, .L1726
+	movs	r3, #36
+	add	r7, r8, r7, lsl #10
+	mla	r1, r3, r5, r10
+	ldr	r3, [sp, #28]
+	str	r3, [r1, #8]
+	ldr	r3, [sp, #36]
+	str	r7, [r1, #4]
+	mul	r2, r3, r5
+	ldr	r3, [sp, #32]
+	adds	r5, r5, #1
+	uxth	r5, r5
+	bic	r2, r2, #3
+	add	r2, r2, r3
+	str	r2, [r1, #12]
+.L1726:
+	add	fp, fp, #1
+	b	.L1724
+.L1731:
+	mul	r3, fp, r7
+	ldr	r2, [r10]
+	adds	r1, r2, r3
+	ldr	r3, [r2, r3]
+	cbz	r3, .L1730
+	ldr	r0, [r1, #4]
+	adds	r4, r4, #1
+	uxth	r4, r4
+	ubfx	r0, r0, #10, #16
+	bl	FtlBbmMapBadBlock
+.L1730:
+	adds	r7, r7, #1
+	b	.L1729
+.L1735:
+	ldr	r3, [sp, #4]
+	cbz	r3, .L1734
+	mul	r3, r10, r7
+	ldr	r2, [r8]
+	adds	r1, r2, r3
+	ldr	r3, [r2, r3]
+	cbnz	r3, .L1734
+	ldr	r0, [r1, #4]
+	movs	r1, #1
+	ubfx	r0, r0, #10, #16
+	bl	FtlFreeSysBlkQueueIn
+.L1734:
+	adds	r7, r7, #1
+	b	.L1733
+.L1738:
+	movs	r4, #0
+	b	.L1711
+.L1757:
 	.align	2
-.L1858:
+.L1756:
+	.word	.LANCHOR77
+	.word	.LANCHOR27
 	.word	.LANCHOR8
-	.word	.LANCHOR180
-	.word	.LANCHOR83
-	.word	.LANCHOR52
-	.word	.LANCHOR157
-	.word	.LANCHOR185
-	.cfi_endproc
-.LFE380:
-	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
-	.section	.text.FtlLoadFactoryBbt,"ax",%progbits
+	.word	.LANCHOR74
+	.word	.LANCHOR38
+	.word	.LANCHOR78
+	.word	.LANCHOR189
+	.word	.LANCHOR59
+	.word	.LANCHOR186
+	.word	.LANCHOR187
+	.word	.LANCHOR47
+	.word	.LANCHOR54
+	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
+	.section	.text.FtlBbmTblFlush,"ax",%progbits
 	.align	1
-	.global	FtlLoadFactoryBbt
+	.global	FtlBbmTblFlush
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlLoadFactoryBbt, %function
-FtlLoadFactoryBbt:
-.LFB321:
-	.loc 5 182 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
+	.type	FtlBbmTblFlush, %function
+FtlBbmTblFlush:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	.loc 5 188 0
-	ldr	r3, .L1870
-	.loc 5 182 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 5 191 0
-	movs	r6, #0
-	.loc 5 188 0
-	ldr	r5, .L1870+4
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r3, .L1769
+	ldr	r4, [r3]
+	str	r3, [sp, #12]
+	cmp	r4, #0
+	bne	.L1760
+	ldr	r3, .L1769+4
+	mov	r1, r4
+	ldr	r7, .L1769+8
+	ldr	r5, .L1769+12
 	ldr	r3, [r3]
-	ldr	r7, .L1870+8
-	.loc 5 195 0
-	ldr	r10, .L1870+20
-	.loc 5 188 0
-	str	r3, [r5, #8]
-	.loc 5 189 0
-	ldr	r3, .L1870+12
-	ldr	r8, [r3]
-	str	r8, [r5, #12]
-.LVL2053:
-.L1861:
-	.loc 5 191 0 discriminator 1
-	ldr	r3, .L1870+16
-	ldrh	r3, [r3]
-	cmp	r6, r3
-	bcc	.L1866
-	.loc 5 222 0
-	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL2054:
-.L1866:
-	.loc 5 195 0
-	ldrh	r4, [r10]
-	.loc 5 194 0
-	movw	r3, #65535
-	.loc 5 199 0
-	ldr	fp, .L1870+4
-	.loc 5 194 0
-	strh	r3, [r7, #2]!	@ movhi
-	.loc 5 195 0
-	subs	r4, r4, #1
-	uxth	r4, r4
-.LVL2055:
-.L1862:
-	.loc 5 195 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r10]
-	sub	r2, r3, #15
-	cmp	r2, r4
-	bgt	.L1864
-.LVL2056:
-	.loc 5 197 0 is_stmt 1
-	mla	r3, r6, r3, r4
-.LVL2057:
-	.loc 5 199 0
-	movs	r2, #1
-.LVL2058:
-	mov	r1, r2
-	mov	r0, fp
-	.loc 5 197 0
-	lsls	r3, r3, #10
-	.loc 5 198 0
+	ldr	r0, [r7]
+	mov	r8, r7
+	ldr	r6, .L1769+16
+	str	r3, [r5, #12]
+	ldr	r7, .L1769+20
+	ldr	r3, .L1769+24
+	ldr	r10, .L1769+56
+	str	r0, [r5, #8]
+	ldrh	r2, [r3]
+	bl	ftl_memset
+.L1761:
+	ldrh	r3, [r7]
+	cmp	r4, r3
+	blt	.L1762
+	ldr	r6, [r5, #12]
+	movs	r2, #16
+	ldr	r4, .L1769+28
+	movs	r1, #255
+	movs	r7, #0
+	mov	r0, r6
+	bl	ftl_memset
+	movw	r3, #61649
+	mov	r10, r4
+	strh	r3, [r6]	@ movhi
+	ldr	r3, [r4, #8]
+	str	r7, [sp, #8]
+	str	r3, [r6, #4]
+	ldrh	r3, [r4]
+	strh	r3, [r6, #2]	@ movhi
+	ldrh	r3, [r4, #4]
+	strh	r3, [r6, #8]	@ movhi
+	ldrh	r3, [r4, #6]
+	strh	r3, [r6, #10]	@ movhi
+	ldr	r3, .L1769+32
+	ldr	r3, [r3]
+	strh	r3, [r6, #12]	@ movhi
+.L1763:
+	ldr	r3, [r8]
+	mov	fp, #0
+	ldrh	r1, [r4]
+	ldrh	r2, [r4, #2]
+	str	r3, [r5, #8]
+	ldr	r3, .L1769+4
+	ldrh	r0, [r6, #10]
+	str	fp, [r5]
+	ldr	r3, [r3]
+	str	r3, [r5, #12]
+	orr	r3, r2, r1, lsl #10
 	str	r3, [r5, #4]
-	.loc 5 199 0
-	bl	FlashReadPages
-.LVL2059:
-	.loc 5 200 0
-	ldr	r3, [r5]
-	adds	r3, r3, #1
-	beq	.L1863
-	.loc 5 208 0
-	ldrh	r2, [r8]
-	movw	r3, #61664
+	ldrh	r3, [r4, #4]
+	str	r0, [sp]
+	ldr	r0, .L1769+36
+	bl	printf
+	movs	r3, #1
+	ldr	r0, .L1769+12
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+	ldr	r3, .L1769+40
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3]
+	subs	r3, r3, #1
 	cmp	r2, r3
-	bne	.L1863
-	.loc 5 210 0
-	strh	r4, [r7]	@ movhi
-.L1864:
-	.loc 5 191 0 discriminator 2
-	adds	r6, r6, #1
-.LVL2060:
-	b	.L1861
-.L1863:
-	.loc 5 195 0 discriminator 2
-	subs	r4, r4, #1
-.LVL2061:
-	uxth	r4, r4
-.LVL2062:
-	b	.L1862
-.L1871:
-	.align	2
-.L1870:
-	.word	.LANCHOR180
-	.word	.LANCHOR199
-	.word	.LANCHOR74+10
-	.word	.LANCHOR185
-	.word	.LANCHOR44
-	.word	.LANCHOR50
-	.cfi_endproc
-.LFE321:
-	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
-	.section	.text.FtlGetLastWrittenPage,"ax",%progbits
-	.align	1
-	.global	FtlGetLastWrittenPage
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlGetLastWrittenPage, %function
-FtlGetLastWrittenPage:
-.LFB329:
-	.loc 1 47 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 104
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2063:
-	.loc 1 51 0
-	cmp	r1, #1
-	.loc 1 47 0
-	push	{r4, r5, r6, r7, r8, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 4, -24
-	.cfi_offset 5, -20
-	.cfi_offset 6, -16
-	.cfi_offset 7, -12
-	.cfi_offset 8, -8
-	.cfi_offset 14, -4
-	.loc 1 51 0
-	it	eq
-	ldreq	r3, .L1884
-	.loc 1 47 0
-	sub	sp, sp, #104
-	.cfi_def_cfa_offset 128
-	.loc 1 57 0
-	lsl	r7, r0, #10
-	.loc 1 58 0
-	mov	r2, r1
-	.loc 1 51 0
-	it	ne
-	ldrne	r3, .L1884+4
-	.loc 1 47 0
-	mov	r8, r1
-	.loc 1 53 0
-	movs	r6, #0
-	.loc 1 58 0
-	movs	r1, #1
-.LVL2064:
-	add	r0, sp, #4
-.LVL2065:
-	.loc 1 51 0
-	ldrh	r5, [r3]
-.LVL2066:
-	.loc 1 54 0
-	add	r3, sp, #40
-	str	r3, [sp, #16]
-.LVL2067:
-	.loc 1 53 0
-	str	r6, [sp, #12]
-	.loc 1 56 0
-	subs	r5, r5, #1
-.LVL2068:
-	sxth	r5, r5
-.LVL2069:
-	.loc 1 57 0
-	orr	r3, r5, r7
-	str	r3, [sp, #8]
-	.loc 1 58 0
-	bl	FlashReadPages
-.LVL2070:
-	.loc 1 59 0
-	ldr	r3, [sp, #40]
-	adds	r3, r3, #1
-	bne	.L1875
-.LVL2071:
-.L1876:
-	.loc 1 60 0
-	cmp	r6, r5
-	ble	.L1879
-.LVL2072:
-.L1875:
-	.loc 1 73 0
-	mov	r0, r5
-	add	sp, sp, #104
-	.cfi_remember_state
-	.cfi_def_cfa_offset 24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, pc}
-.LVL2073:
-.L1879:
-	.cfi_restore_state
-	.loc 1 61 0
-	adds	r3, r6, r5
-	.loc 1 63 0
-	mov	r2, r8
-	.loc 1 61 0
-	add	r3, r3, r3, lsr #31
-	.loc 1 63 0
-	movs	r1, #1
-	add	r0, sp, #4
-	.loc 1 61 0
-	asrs	r4, r3, #1
-.LVL2074:
-	.loc 1 62 0
-	sxth	r3, r4
-	orrs	r3, r3, r7
-	str	r3, [sp, #8]
-	.loc 1 63 0
-	bl	FlashReadPages
-.LVL2075:
-	.loc 1 65 0
-	ldr	r3, [sp, #40]
+	blt	.L1764
+	ldr	r3, [r4, #8]
+	ldrh	r2, [r4]
+	strh	fp, [r4, #2]	@ movhi
 	adds	r3, r3, #1
-	bne	.L1877
-	.loc 1 65 0 is_stmt 0 discriminator 1
-	ldr	r3, [sp, #44]
+	str	r3, [r4, #8]
+	str	r3, [r6, #4]
+	strh	r2, [r6, #8]	@ movhi
+	ldrh	r3, [r4, #4]
+	strh	r2, [r4, #4]	@ movhi
+	ldr	r2, .L1769+44
+	strh	r3, [r4]	@ movhi
+	lsls	r3, r3, #10
+	ldr	r0, [r2]
+	movs	r2, #1
+	str	r3, [r5, #4]
+	mov	r1, r2
+	str	r3, [r0, #4]
+	bl	FlashEraseBlocks
+	movs	r3, #1
+	ldr	r0, .L1769+12
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+.L1764:
+	ldrh	r3, [r10, #2]
 	adds	r3, r3, #1
-	bne	.L1877
-	.loc 1 65 0 discriminator 2
-	ldr	r3, [sp, #4]
+	strh	r3, [r10, #2]	@ movhi
+	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L1877
-	.loc 1 66 0 is_stmt 1
-	subs	r4, r4, #1
-.LVL2076:
-	sxth	r5, r4
-.LVL2077:
-	b	.L1876
-.LVL2078:
-.L1877:
-	.loc 1 68 0
+	bne	.L1765
+	adds	r7, r7, #1
+	ldr	r1, [r5, #4]
+	uxth	r7, r7
+	ldr	r0, .L1769+48
+	bl	printf
+	cmp	r7, #3
+	bls	.L1763
+	mov	r2, r7
+	ldr	r1, [r5, #4]
+	ldr	r0, .L1769+52
+	bl	printf
+	ldr	r2, [sp, #12]
+	movs	r3, #1
+	str	r3, [r2]
+.L1760:
+	movs	r0, #0
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1762:
+	ldrh	r2, [r10]
+	ldr	r3, [r5, #8]
+	ldr	r1, [r6, #4]!
+	mul	r0, r4, r2
+	lsls	r2, r2, #2
 	adds	r4, r4, #1
-.LVL2079:
-	sxth	r6, r4
-.LVL2080:
-	b	.L1876
-.L1885:
+	add	r0, r3, r0, lsl #2
+	bl	ftl_memcpy
+	b	.L1761
+.L1765:
+	ldr	r3, [sp, #8]
+	cmp	r3, #0
+	bne	.L1760
+	movs	r3, #1
+	str	r3, [sp, #8]
+	b	.L1763
+.L1770:
 	.align	2
-.L1884:
-	.word	.LANCHOR53
-	.word	.LANCHOR52
-	.cfi_endproc
-.LFE329:
-	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
-	.section	.text.FtlLoadBbt,"ax",%progbits
+.L1769:
+	.word	.LANCHOR77
+	.word	.LANCHOR188
+	.word	.LANCHOR183
+	.word	.LANCHOR202
+	.word	.LANCHOR75+24
+	.word	.LANCHOR45
+	.word	.LANCHOR58
+	.word	.LANCHOR75
+	.word	.LANCHOR37
+	.word	.LC33
+	.word	.LANCHOR54
+	.word	.LANCHOR78
+	.word	.LC34
+	.word	.LC35
+	.word	.LANCHOR123
+	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
+	.section	.text.allocate_data_superblock,"ax",%progbits
 	.align	1
-	.global	FtlLoadBbt
+	.global	allocate_data_superblock
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlLoadBbt, %function
-FtlLoadBbt:
-.LFB323:
-	.loc 5 249 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
+	.type	allocate_data_superblock, %function
+allocate_data_superblock:
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 3, -32
-	.cfi_offset 4, -28
-	.cfi_offset 5, -24
-	.cfi_offset 6, -20
-	.cfi_offset 7, -16
-	.cfi_offset 8, -12
-	.cfi_offset 10, -8
-	.cfi_offset 14, -4
-	.loc 5 257 0
-	ldr	r8, .L1915+48
-	ldr	r4, .L1915
-	ldr	r3, [r8]
-	.loc 5 261 0
-	ldr	r7, .L1915+4
-	.loc 5 264 0
-	mov	r10, r4
-	.loc 5 257 0
-	str	r3, [r4, #8]
-	.loc 5 258 0
-	ldr	r3, .L1915+8
-	ldr	r6, [r3]
-	str	r6, [r4, #12]
-.LVL2081:
-	.loc 5 260 0
-	bl	FtlBbtMemInit
-.LVL2082:
-	.loc 5 261 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r0
+	ldr	r3, .L1834
+	ldr	r3, [r3]
+	cmp	r3, #0
+	bne	.L1773
+	ldr	r7, .L1834+4
+.L1772:
+	ldr	r3, .L1834+4
+	ldr	r6, .L1834+8
+	ldrh	r3, [r3]
+	ldrh	r2, [r6]
+	add	r3, r3, r2
+	ldr	r2, .L1834+12
+	ldrh	r2, [r2]
+	cmp	r3, r2
+	ble	.L1774
+	ldr	r1, .L1834+16
+	mov	r2, #3168
+	ldr	r0, .L1834+20
+	bl	printf
+	ldr	r1, .L1834+24
+	ldr	r0, .L1834+28
+	bl	printf
+.L1774:
+	ldr	r3, .L1834+32
+	ldrb	r2, [r4, #8]	@ zero_extendqisi2
+	cmp	r4, r3
+	bne	.L1775
+	ldr	r3, .L1834+36
 	ldrh	r5, [r7]
-	subs	r5, r5, #1
-	uxth	r5, r5
-.LVL2083:
-.L1887:
-	.loc 5 261 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r7]
-	subs	r3, r3, #47
-	cmp	r3, r5
-	bgt	.L1890
-	.loc 5 263 0 is_stmt 1
-	lsls	r3, r5, #10
-	.loc 5 264 0
-	movs	r2, #1
-	mov	r1, r2
-	mov	r0, r10
-	.loc 5 263 0
-	str	r3, [r4, #4]
-	.loc 5 264 0
-	bl	FlashReadPages
-.LVL2084:
-	.loc 5 265 0
-	ldr	r3, [r4]
-	adds	r3, r3, #1
-	bne	.L1888
-	.loc 5 267 0
-	ldr	r3, [r4, #4]
-	.loc 5 268 0
-	movs	r2, #1
-	mov	r1, r2
-	mov	r0, r10
-	.loc 5 267 0
-	adds	r3, r3, #1
-	str	r3, [r4, #4]
-	.loc 5 268 0
-	bl	FlashReadPages
-.LVL2085:
-.L1888:
-	.loc 5 270 0
-	ldr	r3, [r4]
-	adds	r3, r3, #1
-	beq	.L1889
-	.loc 5 278 0
-	ldrh	r2, [r6]
-	movw	r3, #61649
-	cmp	r2, r3
-	bne	.L1889
-	.loc 5 280 0
-	ldr	r3, .L1915+12
-	.loc 5 281 0
-	ldr	r2, [r6, #4]
-	.loc 5 280 0
-	strh	r5, [r3]	@ movhi
-	.loc 5 281 0
-	str	r2, [r3, #8]
-	.loc 5 282 0
-	ldrh	r2, [r6, #8]
-	strh	r2, [r3, #4]	@ movhi
-.L1890:
-	.loc 5 298 0
-	ldr	r5, .L1915+12
-.LVL2086:
+	ldr	r3, [r3]
+	lsrs	r0, r5, #1
+	mul	ip, r3, r5
+	adds	r1, r0, #1
+	add	r1, r1, ip, lsr #2
+	ldr	ip, .L1834+48
+	uxth	r1, r1
+	ldr	ip, [ip]
+	cmp	ip, #0
+	beq	.L1776
+	ldr	ip, .L1834+52
+	ldr	ip, [ip]
+	cmp	ip, #39
+	bhi	.L1776
+	cmp	ip, #2
+	bls	.L1809
+	lsls	r5, r5, #31
+	bpl	.L1805
+	cmp	r3, #0
+	beq	.L1809
+.L1805:
+	mov	r1, r0
+	b	.L1776
+.L1775:
+	cmp	r2, #1
+	bne	.L1809
+	ldr	r3, .L1834+40
+	ldrh	r3, [r3]
+	cmp	r3, #1
+	beq	.L1809
+	ldr	r3, .L1834+44
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L1809
+	ldr	r0, .L1834+48
+	ldrh	r3, [r7]
+	ldr	r0, [r0]
+	lsrs	r1, r3, #3
+	cbz	r0, .L1776
+	ldr	r0, .L1834+52
+	ldr	r0, [r0]
+	cmp	r0, #1
+	bhi	.L1776
+	rsb	r3, r3, r3, lsl #3
+	ubfx	r1, r3, #3, #16
+.L1776:
+	cbz	r1, .L1777
+	subs	r1, r1, #1
+	uxth	r1, r1
+.L1777:
+	ldr	r0, .L1834+56
+	bl	List_pop_index_node
+	ldrh	r3, [r7]
+	mov	r5, r0
+	uxth	r8, r0
+	cbnz	r3, .L1778
+	ldr	r1, .L1834+16
+	movw	r2, #3188
+	ldr	r0, .L1834+20
+	bl	printf
+	ldr	r1, .L1834+24
+	ldr	r0, .L1834+28
+	bl	printf
+.L1778:
+	ldrh	r3, [r7]
+	mov	r0, r4
+	subs	r3, r3, #1
+	strh	r3, [r7]	@ movhi
+	strh	r8, [r4]	@ movhi
+	bl	make_superblock
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	cbnz	r3, .L1779
+	ldr	r3, .L1834+60
+	uxth	r5, r5
 	movw	r2, #65535
-	ldrh	r3, [r5]
-	cmp	r3, r2
-	beq	.L1904
-	.loc 5 304 0
-	ldrh	r3, [r5, #4]
+	ldr	r3, [r3]
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	ldrh	r2, [r6]
+	ldrh	r3, [r7]
+	add	r3, r3, r2
+	ldr	r2, .L1834+12
+	ldrh	r2, [r2]
 	cmp	r3, r2
-	beq	.L1894
-	.loc 5 306 0
-	lsls	r3, r3, #10
-	.loc 5 307 0
-	movs	r2, #1
-	mov	r1, r2
-	ldr	r0, .L1915
-	.loc 5 306 0
-	str	r3, [r4, #4]
-	.loc 5 307 0
-	bl	FlashReadPages
-.LVL2087:
-	.loc 5 308 0
-	ldr	r3, [r4]
-	adds	r3, r3, #1
-	beq	.L1894
-	.loc 5 311 0
+	ble	.L1772
+	mov	r2, #3200
+	ldr	r1, .L1834+16
+	ldr	r0, .L1834+20
+	bl	printf
+	ldr	r1, .L1834+24
+	ldr	r0, .L1834+28
+	bl	printf
+	b	.L1772
+.L1809:
+	movs	r1, #0
+	b	.L1777
+.L1779:
 	ldrh	r2, [r6]
-	movw	r3, #61649
-	cmp	r2, r3
-	bne	.L1894
-	.loc 5 311 0 is_stmt 0 discriminator 1
-	ldr	r3, [r6, #4]
-	ldr	r2, [r5, #8]
+	ldrh	r3, [r7]
+	add	r3, r3, r2
+	ldr	r2, .L1834+12
+	ldrh	r2, [r2]
 	cmp	r3, r2
-	bls	.L1894
-	.loc 5 313 0 is_stmt 1
-	ldrh	r2, [r5, #4]
-	.loc 5 314 0
-	str	r3, [r5, #8]
-	.loc 5 315 0
-	ldrh	r3, [r6, #8]
-	.loc 5 313 0
-	strh	r2, [r5]	@ movhi
-	.loc 5 315 0
-	strh	r3, [r5, #4]	@ movhi
-.L1894:
-	.loc 5 327 0
-	ldr	r10, .L1915
-	.loc 5 320 0
-	movs	r1, #1
-	ldrh	r0, [r5]
-	bl	FtlGetLastWrittenPage
-.LVL2088:
-	sxth	r7, r0
-.LVL2089:
-	.loc 5 321 0
-	adds	r0, r0, #1
-	strh	r0, [r5, #2]	@ movhi
-.L1896:
-	.loc 5 323 0
-	cmp	r7, #0
-	bge	.L1899
-	.loc 5 336 0
-	ldr	r1, .L1915+16
-	mov	r2, #336
-	ldr	r0, .L1915+20
+	ble	.L1781
+	ldr	r1, .L1834+16
+	movw	r2, #3203
+	ldr	r0, .L1834+20
 	bl	printf
-.LVL2090:
-	ldr	r1, .L1915+24
-	ldr	r0, .L1915+28
+	ldr	r1, .L1834+24
+	ldr	r0, .L1834+28
 	bl	printf
-.LVL2091:
-.L1898:
-	.loc 5 337 0
-	ldrh	r3, [r6, #10]
-	.loc 5 339 0
-	ldrh	r0, [r6, #12]
-	.loc 5 337 0
-	strh	r3, [r5, #6]	@ movhi
-	.loc 5 339 0
-	movw	r3, #65535
-	cmp	r0, r3
-	beq	.L1901
-	.loc 5 341 0
-	ldr	r3, .L1915+32
-	ldr	r2, [r3]
-	cmp	r0, r2
-	beq	.L1901
-	.loc 5 341 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1915+36
-	ldrh	r3, [r3]
-	lsrs	r3, r3, #2
+.L1781:
+	ldr	r2, .L1834+64
+	movs	r6, #0
+	ldr	fp, .L1834+100
+	add	ip, r4, #16
+	mov	lr, r6
+	movw	r10, #65535
+	ldrh	r1, [r2]
+	movs	r2, #36
+	ldr	r0, [fp]
+	str	r2, [sp, #4]
+	mov	r3, r0
+	mla	r1, r2, r1, r0
+	str	r1, [sp]
+.L1782:
+	ldr	r2, [sp]
 	cmp	r2, r3
-	bcs	.L1901
-	.loc 5 343 0 is_stmt 1
-	cmp	r0, r3
-	bcs	.L1901
-	.loc 5 345 0
-	bl	FtlSysBlkNumInit
-.LVL2092:
-.L1901:
-	ldr	r6, .L1915+40
-.LVL2093:
-	.loc 5 249 0 discriminator 1
-	movs	r5, #0
-	.loc 5 350 0 discriminator 1
-	ldr	r7, .L1915+44
-.LVL2094:
-	.loc 5 351 0 discriminator 1
-	ldr	r8, .L1915+52
-.L1902:
-.LVL2095:
-	.loc 5 350 0 discriminator 1
-	ldrh	r3, [r7]
-	cmp	r5, r3
-	bcc	.L1903
-	.loc 5 357 0
-	movs	r0, #0
-	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.LVL2096:
-.L1889:
-	.loc 5 261 0 discriminator 2
-	subs	r5, r5, #1
-.LVL2097:
+	bne	.L1784
+	cbnz	r6, .L1785
+	ldr	r1, .L1834+16
+	movw	r2, #3215
+	ldr	r0, .L1834+20
+	bl	printf
+	ldr	r1, .L1834+24
+	ldr	r0, .L1834+28
+	bl	printf
+.L1785:
+	ldr	r3, .L1834+48
 	uxth	r5, r5
-.LVL2098:
-	b	.L1887
-.LVL2099:
-.L1899:
-	.loc 5 325 0
-	ldrh	r3, [r5]
-	.loc 5 327 0
-	movs	r2, #1
-	mov	r1, r2
-	mov	r0, r10
-	.loc 5 325 0
-	orr	r3, r7, r3, lsl #10
-	str	r3, [r4, #4]
-	.loc 5 326 0
-	ldr	r3, [r8]
-	str	r3, [r4, #8]
-	.loc 5 327 0
-	bl	FlashReadPages
-.LVL2100:
-	.loc 5 329 0
-	ldr	r3, [r4]
+	ldr	r10, .L1834+104
+	ldr	r3, [r3]
+	cbz	r3, .L1786
+	ldr	r3, .L1834+68
+	cmp	r4, r3
+	bne	.L1786
+	ldr	r3, [r10]
+	ldrh	r3, [r3, r5, lsl #1]
+	cmp	r3, #40
+	itt	hi
+	movhi	r3, #0
+	strbhi	r3, [r4, #8]
+.L1786:
+	ldr	r3, .L1834+72
+	ldrh	r3, [r3]
+	cmp	r3, r8
+	bne	.L1787
+	ldr	r1, .L1834+16
+	movw	r2, #3222
+	ldr	r0, .L1834+20
+	bl	printf
+	ldr	r1, .L1834+24
+	ldr	r0, .L1834+28
+	bl	printf
+.L1787:
+	ldrb	r1, [r4, #8]	@ zero_extendqisi2
+	ldr	r2, .L1834+76
+	ldr	r3, .L1834+80
+	cmp	r1, #0
+	bne	.L1788
+	ldr	r0, [r10]
+	ldrh	lr, [r0, r5, lsl #1]
+	cmp	lr, #0
+	beq	.L1789
+	ldr	r1, .L1834+84
+	ldrh	ip, [r1]
+	add	r1, lr, ip
+.L1832:
+	strh	r1, [r0, r5, lsl #1]	@ movhi
+	mov	r0, r8
+	ldr	r1, [r2]
+	str	r3, [sp, #4]
+	str	r2, [sp]
+	adds	r1, r1, #1
+	str	r1, [r2]
+	movs	r1, #0
+	bl	ftl_set_blk_mode
+	ldm	sp, {r2, r3}
+.L1791:
+	lsls	r1, r5, #1
+	ldr	r3, [r3]
+	ldr	r2, [r2]
+	str	r1, [sp]
+	ldr	r1, [r10]
+	ldrh	ip, [r1, r5, lsl #1]
+	ldr	r1, .L1834+88
+	ldr	r0, [r1]
+	cmp	ip, r0
+	it	hi
+	strhi	ip, [r1]
+	ldr	r1, .L1834+84
+	ldrh	r0, [r1]
+	ldr	r1, .L1834+12
+	mla	r0, r2, r0, r3
+	ldrh	r1, [r1]
+	bl	__aeabi_uidiv
+	ldr	r3, .L1834+92
+	ldr	ip, .L1834+108
+	str	r0, [r3]
+	ldr	r3, .L1834+96
+	ldr	r0, [fp]
+	ldr	r2, [r3]
+	adds	r1, r0, #4
+	ldr	r3, [r2, #16]
 	adds	r3, r3, #1
-	beq	.L1897
-	.loc 5 329 0 is_stmt 0 discriminator 1
-	ldrh	r2, [r6]
-	movw	r3, #61649
-	cmp	r2, r3
-	beq	.L1898
-.L1897:
-	subs	r7, r7, #1
-.LVL2101:
-	sxth	r7, r7
-.LVL2102:
-	b	.L1896
-.LVL2103:
-.L1903:
-	.loc 5 351 0 is_stmt 1 discriminator 3
-	ldrh	r2, [r8]
-	ldr	r1, [r4, #8]
-	ldr	r0, [r6, #4]!
-	lsls	r2, r2, #2
-	mla	r1, r5, r2, r1
-	.loc 5 350 0 discriminator 3
-	adds	r5, r5, #1
-.LVL2104:
-	.loc 5 351 0 discriminator 3
-	bl	ftl_memcpy
-.LVL2105:
-	b	.L1902
-.LVL2106:
-.L1904:
-	.loc 5 300 0
-	mov	r0, #-1
-	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.LVL2107:
-.L1916:
+	str	r3, [r2, #16]
+	movs	r3, #36
+	mla	r3, r3, r6, r0
+	adds	r3, r3, #40
+.L1793:
+	adds	r1, r1, #36
+	cmp	r3, r1
+	bne	.L1794
+	ldr	r3, .L1834+44
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L1795
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	mov	r2, r6
+	cmp	r3, #1
+	ite	eq
+	moveq	r1, #0
+	movne	r1, #1
+	bl	FlashEraseBlocks
+.L1795:
+	ldrb	r1, [r4, #8]	@ zero_extendqisi2
+	mov	r2, r6
+	ldr	r0, [fp]
+	mov	r10, #0
+	bl	FlashEraseBlocks
+	mov	r3, r10
+	movs	r1, #36
+.L1797:
+	uxth	r2, r10
+	cmp	r6, r2
+	bhi	.L1799
+	cbz	r3, .L1800
+	mov	r0, r8
+	bl	update_multiplier_value
+	bl	FtlBbmTblFlush
+.L1800:
+	ldrb	r2, [r4, #7]	@ zero_extendqisi2
+	ldr	r1, .L1834+60
+	cmp	r2, #0
+	bne	.L1801
+	ldr	r3, [r1]
+	movw	r2, #65535
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	b	.L1772
+.L1835:
 	.align	2
-.L1915:
-	.word	.LANCHOR199
-	.word	.LANCHOR50
-	.word	.LANCHOR185
-	.word	.LANCHOR74
-	.word	.LANCHOR208
+.L1834:
+	.word	.LANCHOR77
+	.word	.LANCHOR89
+	.word	.LANCHOR86
+	.word	.LANCHOR40
+	.word	.LANCHOR203
+	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC8
-	.word	.LANCHOR36
-	.word	.LANCHOR40
-	.word	.LANCHOR74+24
+	.word	.LANCHOR94
+	.word	.LANCHOR172
 	.word	.LANCHOR44
-	.word	.LANCHOR180
-	.word	.LANCHOR120
-	.cfi_endproc
-.LFE323:
-	.size	FtlLoadBbt, .-FtlLoadBbt
-	.section	.text.ftl_map_blk_gc,"ax",%progbits
+	.word	.LANCHOR8
+	.word	.LANCHOR28
+	.word	.LANCHOR170
+	.word	.LANCHOR88
+	.word	.LANCHOR84
+	.word	.LANCHOR38
+	.word	.LANCHOR92
+	.word	.LANCHOR204
+	.word	.LANCHOR167
+	.word	.LANCHOR168
+	.word	.LANCHOR48
+	.word	.LANCHOR169
+	.word	.LANCHOR205
+	.word	.LANCHOR191
+	.word	.LANCHOR78
+	.word	.LANCHOR79
+	.word	-1024
+.L1784:
+	ldrh	r1, [ip], #2
+	str	lr, [r3, #8]
+	str	lr, [r3, #12]
+	cmp	r1, r10
+	beq	.L1783
+	ldr	r2, [sp, #4]
+	lsls	r1, r1, #10
+	mla	r2, r2, r6, r0
+	adds	r6, r6, #1
+	uxth	r6, r6
+	str	r1, [r2, #4]
+.L1783:
+	adds	r3, r3, #36
+	b	.L1782
+.L1789:
+	movs	r1, #2
+	b	.L1832
+.L1788:
+	ldr	r0, [r10]
+	str	r2, [sp, #4]
+	str	r3, [sp]
+	ldrh	r1, [r0, r5, lsl #1]
+	adds	r1, r1, #1
+	strh	r1, [r0, r5, lsl #1]	@ movhi
+	mov	r0, r8
+	ldr	r1, [r3]
+	adds	r1, r1, #1
+	str	r1, [r3]
+	bl	ftl_set_blk_mode.part.10
+	ldr	r2, [sp, #4]
+	ldr	r3, [sp]
+	b	.L1791
+.L1794:
+	ldr	r2, [r1, #-36]
+	and	r2, r2, ip
+	str	r2, [r1, #-36]
+	b	.L1793
+.L1799:
+	ldr	r0, .L1836
+	mul	r2, r1, r10
+	ldr	r0, [r0]
+	add	ip, r0, r2
+	ldr	r2, [r0, r2]
+	adds	r0, r2, #1
+	bne	.L1798
+	ldr	r0, [ip, #4]
+	adds	r3, r3, #1
+	str	r1, [sp, #12]
+	str	r2, [sp, #8]
+	ubfx	r0, r0, #10, #16
+	str	r3, [sp, #4]
+	bl	FtlBbmMapBadBlock
+	ldr	r2, [sp, #8]
+	add	r0, r4, r10, lsl #1
+	ldr	r1, [sp, #12]
+	ldr	r3, [sp, #4]
+	strh	r2, [r0, #16]	@ movhi
+	ldrb	r2, [r4, #7]	@ zero_extendqisi2
+	subs	r2, r2, #1
+	strb	r2, [r4, #7]
+.L1798:
+	add	r10, r10, #1
+	b	.L1797
+.L1801:
+	ldr	r3, .L1836+4
+	ldr	r0, .L1836+8
+	ldrh	r3, [r3]
+	strh	r8, [r4]	@ movhi
+	smulbb	r3, r3, r2
+	movs	r2, #0
+	strh	r2, [r4, #2]	@ movhi
+	strb	r2, [r4, #6]
+	ldr	r2, [r0]
+	uxth	r3, r3
+	strh	r3, [r4, #4]	@ movhi
+	str	r2, [r4, #12]
+	adds	r2, r2, #1
+	str	r2, [r0]
+	ldr	r2, [r1]
+	ldr	r1, [sp]
+	strh	r3, [r2, r1]	@ movhi
+	ldrh	r3, [r4, #4]
+	cbz	r3, .L1802
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	cbnz	r3, .L1773
+.L1802:
+	ldr	r1, .L1836+12
+	movw	r2, #3281
+	ldr	r0, .L1836+16
+	bl	printf
+	ldr	r1, .L1836+20
+	ldr	r0, .L1836+24
+	bl	printf
+.L1773:
+	movs	r0, #0
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1837:
+	.align	2
+.L1836:
+	.word	.LANCHOR78
+	.word	.LANCHOR53
+	.word	.LANCHOR159
+	.word	.LANCHOR203
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.size	allocate_data_superblock, .-allocate_data_superblock
+	.section	.text.FtlGcFreeBadSuperBlk,"ax",%progbits
 	.align	1
-	.global	ftl_map_blk_gc
+	.global	FtlGcFreeBadSuperBlk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_map_blk_gc, %function
-ftl_map_blk_gc:
-.LFB348:
-	.loc 1 632 0
-	.cfi_startproc
+	.type	FtlGcFreeBadSuperBlk, %function
+FtlGcFreeBadSuperBlk:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2108:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 1 632 0
-	mov	r4, r0
-	.loc 1 637 0
-	ldr	r5, [r0, #12]
-.LVL2109:
-	.loc 1 638 0
-	ldr	fp, [r0, #24]
-.LVL2110:
-	.loc 1 641 0
-	bl	ftl_free_no_use_map_blk
-.LVL2111:
-	.loc 1 643 0
-	ldrh	ip, [r4, #10]
-	ldrh	r2, [r4, #8]
-	ldrh	r1, [r4, #40]
-	sub	r3, ip, #4
-	ldr	r6, .L1937
-	cmp	r2, r3
-	bge	.L1918
-	.loc 1 644 0
-	movw	r3, #65535
-	cmp	r1, r3
-	beq	.L1920
-	.loc 1 644 0 is_stmt 0 discriminator 1
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r6]
-	cmp	r2, r3
-	bcc	.L1921
-.L1918:
-	.loc 1 645 0 is_stmt 1
-	movw	r3, #65535
-	.loc 1 641 0
-	uxth	r0, r0
-	.loc 1 645 0
-	cmp	r1, r3
-	beq	.L1922
-	.loc 1 645 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r4, #2]
-	ldrh	r2, [r6]
-	cmp	r2, r3
-	bls	.L1923
-.LVL2112:
-.L1922:
-	.loc 1 655 0 is_stmt 1
-	ldrh	r10, [r5, r0, lsl #1]
-.LVL2113:
-	lsls	r2, r0, #1
-	.loc 1 656 0
-	cmp	r10, #0
-	beq	.L1920
-	.loc 1 656 0 is_stmt 0 discriminator 1
-	ldr	r3, [r4, #32]
-	cbnz	r3, .L1920
-	.loc 1 657 0 is_stmt 1
-	movs	r1, #1
-	str	r1, [r4, #32]
-	.loc 1 658 0
-	strh	r3, [r5, r2]	@ movhi
-	.loc 1 659 0
-	ldrh	r3, [r4, #8]
-	.loc 1 660 0
-	ldrh	r2, [r4, #2]
-	.loc 1 659 0
-	subs	r3, r3, #1
-	strh	r3, [r4, #8]	@ movhi
-	.loc 1 660 0
-	ldrh	r3, [r6]
-	cmp	r2, r3
-	bcc	.L1928
-	.loc 1 661 0
-	mov	r0, r4
-.LVL2114:
-	bl	ftl_map_blk_alloc_new_blk
-.LVL2115:
-.L1928:
-	.loc 1 665 0 discriminator 1
-	ldr	r5, .L1937+4
-.LVL2116:
-	.loc 1 653 0 discriminator 1
+	mov	r10, r0
+	ldr	r4, .L1850
+	ldrh	r3, [r4]
+	cbz	r3, .L1839
+	ldr	r8, .L1850+12
 	movs	r7, #0
-.L1929:
-	.loc 1 663 0 discriminator 1
-	ldrh	r2, [r4, #6]
+.L1840:
+	ldr	r3, .L1850+4
+	ldrh	r2, [r3]
 	uxth	r3, r7
-.LVL2117:
-	cmp	r2, r3
-	bhi	.L1933
-	.loc 1 681 0
-	movs	r1, #1
-	mov	r0, r10
-	bl	FtlFreeSysBlkQueueIn
-.LVL2118:
-	.loc 1 682 0
-	movs	r3, #0
-	str	r3, [r4, #32]
-.LVL2119:
-.L1920:
-	.loc 1 686 0
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r6]
 	cmp	r2, r3
-	bcc	.L1921
-	.loc 1 687 0
-	mov	r0, r4
-	bl	ftl_map_blk_alloc_new_blk
-.LVL2120:
-.L1921:
-	.loc 1 689 0
+	bhi	.L1846
+	bl	FtlGcReFreshBadBlk
+.L1839:
 	movs	r0, #0
 	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL2121:
-.L1926:
-	.cfi_restore_state
-	.loc 1 647 0
-	ldrh	r8, [r5, r2, lsl #1]
-	add	lr, r2, #1
-	cmp	r8, r1
-	beq	.L1924
-	mov	r2, lr
-.LVL2122:
-.L1925:
-	uxth	r7, r2
-.LVL2123:
-	.loc 1 646 0 discriminator 1
-	cmp	r7, ip
-	bcc	.L1926
-	.loc 1 641 0
-	mov	r7, r0
-.LVL2124:
-.L1924:
-	.loc 1 652 0
-	uxth	r2, r2
-	ldr	r0, .L1937+8
-	ldrh	r2, [r5, r2, lsl #1]
-.LVL2125:
-	bl	printf
-.LVL2126:
-	.loc 1 653 0
-	movw	r3, #65535
-	mov	r0, r7
-	strh	r3, [r4, #40]	@ movhi
-	b	.L1922
-.LVL2127:
-.L1923:
-	movs	r2, #0
-	b	.L1925
-.LVL2128:
-.L1933:
-	uxth	r8, r7
-	.loc 1 664 0
-	ldr	r2, [fp, r8, lsl #2]
-	cmp	r10, r2, lsr #10
-	bne	.L1930
-	str	r3, [sp, #4]
-	.loc 1 665 0
-	ldr	r3, .L1937+12
-.LVL2129:
-	.loc 1 669 0
-	ldr	r0, .L1937+4
-	.loc 1 665 0
-	ldr	r2, [r3]
-	str	r2, [r5, #8]
-	.loc 1 666 0
-	ldr	r2, .L1937+16
-	ldr	r3, [r2]
-	str	r3, [r5, #12]
-	.loc 1 667 0
-	ldr	r2, [fp, r8, lsl #2]
-	.loc 1 666 0
-	str	r3, [sp]
-	.loc 1 667 0
-	str	r2, [r5, #4]
-.LVL2130:
-	.loc 1 669 0
-	movs	r2, #1
-	mov	r1, r2
-	bl	FlashReadPages
-.LVL2131:
-	.loc 1 671 0
-	ldr	r3, [sp]
-	ldrh	r2, [r3, #8]
-	ldr	r3, [sp, #4]
-	cmp	r2, r3
-	beq	.L1931
-	.loc 1 671 0 is_stmt 0 discriminator 1
-	ldr	r1, .L1937+20
-	movw	r2, #671
-	ldr	r0, .L1937+24
-	bl	printf
-.LVL2132:
-	ldr	r1, .L1937+28
-	ldr	r0, .L1937+32
-	bl	printf
-.LVL2133:
-.L1931:
-	.loc 1 672 0 is_stmt 1
-	ldr	r3, [r5]
-	adds	r3, r3, #1
-	bne	.L1932
-	.loc 1 673 0
-	movs	r3, #0
-	.loc 1 674 0
-	ldr	r0, .L1937+36
-	.loc 1 673 0
-	str	r3, [fp, r8, lsl #2]
-	.loc 1 674 0
-	ldr	r3, [sp]
-	ldr	r1, [r5, #4]
-	ldrh	r2, [r3, #8]
-	bl	printf
-.LVL2134:
-	.loc 1 675 0
-	ldr	r3, .L1937+40
-	movs	r2, #1
-	str	r2, [r3]
-.LVL2135:
-.L1930:
+.L1846:
+	ldr	r2, .L1850+8
+	uxth	r3, r7
+	mov	r1, r10
+	mov	fp, #0
+	ldrb	r0, [r2, r3]	@ zero_extendqisi2
+	bl	V2P_block
+	mov	r1, r0
+.L1841:
+	ldrh	r3, [r4]
+	uxth	r5, fp
+	cmp	r3, r5
+	bhi	.L1845
 	adds	r7, r7, #1
-.LVL2136:
-	b	.L1929
-.LVL2137:
-.L1932:
-	.loc 1 677 0
-	ldr	r2, [r5, #8]
-	mov	r1, r8
-	mov	r0, r4
-	bl	FtlMapWritePage
-.LVL2138:
-	b	.L1930
-.L1938:
+	b	.L1840
+.L1845:
+	uxth	r6, fp
+	ldrh	r3, [r8, r6, lsl #1]
+	cmp	r3, r1
+	bne	.L1842
+	mov	r0, r1
+	str	r1, [sp, #4]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	ldrh	r2, [r4]
+	add	r3, r8, r6, lsl #1
+	ldr	r1, [sp, #4]
+.L1843:
+	cmp	r5, r2
+	bcc	.L1844
+	subs	r2, r2, #1
+	strh	r2, [r4]	@ movhi
+.L1842:
+	add	fp, fp, #1
+	b	.L1841
+.L1844:
+	ldrh	r0, [r3, #2]!
+	adds	r5, r5, #1
+	uxth	r5, r5
+	strh	r0, [r3, #-2]	@ movhi
+	b	.L1843
+.L1851:
 	.align	2
-.L1937:
-	.word	.LANCHOR53
-	.word	.LANCHOR199
-	.word	.LC36
-	.word	.LANCHOR181
-	.word	.LANCHOR185
-	.word	.LANCHOR209
-	.word	.LC6
-	.word	.LC7
-	.word	.LC8
-	.word	.LC37
-	.word	.LANCHOR76
-	.cfi_endproc
-.LFE348:
-	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
-	.section	.text.Ftl_write_map_blk_to_last_page,"ax",%progbits
+.L1850:
+	.word	.LANCHOR117
+	.word	.LANCHOR38
+	.word	.LANCHOR47
+	.word	.LANCHOR118
+	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
+	.section	.text.update_vpc_list,"ax",%progbits
 	.align	1
-	.global	Ftl_write_map_blk_to_last_page
+	.global	update_vpc_list
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	Ftl_write_map_blk_to_last_page, %function
-Ftl_write_map_blk_to_last_page:
-.LFB349:
-	.loc 1 692 0
-	.cfi_startproc
+	.type	update_vpc_list, %function
+update_vpc_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2139:
-	.loc 1 700 0
-	ldr	r3, .L1949
-	.loc 1 692 0
-	push	{r4, r5, r6, r7, r8, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 4, -24
-	.cfi_offset 5, -20
-	.cfi_offset 6, -16
-	.cfi_offset 7, -12
-	.cfi_offset 8, -8
-	.cfi_offset 14, -4
-	.loc 1 692 0
+	push	{r3, r4, r5, lr}
 	mov	r4, r0
-	.loc 1 700 0
-	ldr	r5, [r3]
-	cbnz	r5, .L1940
-	.loc 1 702 0
-	ldrh	r3, [r0]
-	movw	r2, #65535
-	.loc 1 695 0
-	ldr	r6, [r0, #12]
-	.loc 1 702 0
+	ldr	r3, .L1862
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r0, lsl #1]
+	cmp	r3, #0
+	bne	.L1853
+	ldr	r2, .L1862+4
+	ldrh	r1, [r2]
+	cmp	r1, r0
+	bne	.L1854
+	movw	r3, #65535
+	strh	r3, [r2]	@ movhi
+.L1855:
+	ldr	r5, .L1862+8
+	mov	r1, r4
+	ldr	r0, .L1862+12
+	bl	List_remove_node
+	ldrh	r3, [r5]
+	cbnz	r3, .L1857
+	ldr	r1, .L1862+16
+	mov	r2, #3392
+	ldr	r0, .L1862+20
+	bl	printf
+	ldr	r1, .L1862+24
+	ldr	r0, .L1862+28
+	bl	printf
+.L1857:
+	ldrh	r3, [r5]
+	mov	r0, r4
+	subs	r3, r3, #1
+	strh	r3, [r5]	@ movhi
+	bl	free_data_superblock
+	mov	r0, r4
+	bl	FtlGcFreeBadSuperBlk
+	ldr	r3, .L1862+32
+	ldrh	r2, [r5]
+	ldrh	r3, [r3]
+	add	r3, r3, r2
+	ldr	r2, .L1862+36
+	ldrh	r2, [r2]
 	cmp	r3, r2
-	bne	.L1941
-	.loc 1 703 0
-	ldrh	r3, [r0, #8]
-	cbz	r3, .L1942
-	.loc 1 703 0 is_stmt 0 discriminator 1
-	ldr	r1, .L1949+4
-	movw	r2, #703
-	ldr	r0, .L1949+8
-.LVL2140:
+	ble	.L1861
+	ldr	r1, .L1862+16
+	movw	r2, #3395
+	ldr	r0, .L1862+20
 	bl	printf
-.LVL2141:
-	ldr	r1, .L1949+12
-	ldr	r0, .L1949+16
+	ldr	r1, .L1862+24
+	ldr	r0, .L1862+28
 	bl	printf
-.LVL2142:
-.L1942:
-	.loc 1 704 0 is_stmt 1
-	ldrh	r3, [r4, #8]
-	adds	r3, r3, #1
-	strh	r3, [r4, #8]	@ movhi
-	.loc 1 705 0
-	bl	FtlFreeSysBlkQueueOut
-.LVL2143:
-	.loc 1 706 0
-	movs	r3, #0
-	.loc 1 705 0
-	strh	r0, [r6]	@ movhi
-	.loc 1 706 0
-	strh	r3, [r4, #2]	@ movhi
-	.loc 1 707 0
-	strh	r3, [r4]	@ movhi
-	.loc 1 708 0
-	ldr	r3, [r4, #28]
-	adds	r3, r3, #1
-	str	r3, [r4, #28]
-.L1940:
-	.loc 1 739 0
-	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, pc}
-.LVL2144:
-.L1941:
-	.loc 1 712 0
-	ldrh	r7, [r6, r3, lsl #1]
-	.loc 1 723 0
-	movs	r1, #255
-	.loc 1 713 0
-	ldrh	r3, [r0, #2]
-	ldr	r2, .L1949+20
-	.loc 1 714 0
-	ldr	r6, .L1949+24
-	.loc 1 696 0
-	ldr	r8, [r0, #24]
-	.loc 1 713 0
-	orr	r3, r3, r7, lsl #10
-	str	r3, [r2, #4]
-	.loc 1 714 0
-	ldr	r3, [r6]
-	str	r3, [r2, #8]
-	.loc 1 715 0
-	ldr	r3, .L1949+28
-	ldr	r3, [r3]
-	str	r3, [r2, #12]
-.LVL2145:
-	.loc 1 718 0
-	ldr	r2, [r0, #28]
-	str	r2, [r3, #4]
-.LVL2146:
-	.loc 1 719 0
-	movw	r2, #64245
-	strh	r2, [r3, #8]	@ movhi
-	.loc 1 720 0
-	ldrh	r2, [r0, #4]
-	.loc 1 721 0
-	strh	r7, [r3, #2]	@ movhi
-	.loc 1 720 0
-	strh	r2, [r3]	@ movhi
-	.loc 1 723 0
-	ldr	r3, .L1949+32
-.LVL2147:
-	ldr	r0, [r6]
-.LVL2148:
-	ldrh	r2, [r3]
-	lsls	r2, r2, #3
-	bl	ftl_memset
-.LVL2149:
-	.loc 1 725 0
-	mov	r2, r5
-	.loc 1 724 0
-	mov	r3, r5
-.LVL2150:
-.L1943:
-	.loc 1 725 0 discriminator 1
-	ldrh	r0, [r4, #6]
-	uxth	r1, r2
-	cmp	r0, r1
-	bhi	.L1945
-	.loc 1 732 0
-	movs	r2, #1
-.LVL2151:
+.L1861:
+	movs	r3, #1
+	b	.L1852
+.L1854:
+	ldr	r2, .L1862+40
+	ldrh	r2, [r2]
+	cmp	r2, r0
+	beq	.L1852
+	ldr	r2, .L1862+44
+	ldrh	r2, [r2]
+	cmp	r2, r0
+	beq	.L1852
+	ldr	r2, .L1862+48
+	ldrh	r2, [r2]
+	cmp	r2, r0
+	bne	.L1855
+.L1852:
+	mov	r0, r3
+	pop	{r3, r4, r5, pc}
+.L1853:
+	bl	List_update_data_list
 	movs	r3, #0
-.LVL2152:
-	mov	r1, r2
-.LVL2153:
-	ldr	r0, .L1949+20
-	bl	FlashProgPages
-.LVL2154:
-	.loc 1 733 0
-	ldrh	r3, [r4, #2]
-	.loc 1 737 0
-	mov	r0, r4
-	.loc 1 733 0
-	adds	r3, r3, #1
-	strh	r3, [r4, #2]	@ movhi
-	.loc 1 737 0
-	bl	ftl_map_blk_gc
-.LVL2155:
-	.loc 1 738 0
-	b	.L1940
-.LVL2156:
-.L1945:
-	uxth	r1, r2
-	.loc 1 726 0
-	ldr	r0, [r8, r1, lsl #2]
-	cmp	r7, r0, lsr #10
-	bne	.L1944
-	.loc 1 728 0
-	ldr	r0, [r6]
-	.loc 1 727 0
-	adds	r3, r3, #1
-.LVL2157:
-	uxth	r3, r3
-.LVL2158:
-	.loc 1 728 0
-	str	r1, [r0, r3, lsl #3]
-	.loc 1 729 0
-	ldr	r0, [r8, r1, lsl #2]
-	ldr	r1, [r6]
-	add	r1, r1, r3, lsl #3
-	str	r0, [r1, #4]
-.L1944:
-.LVL2159:
-	adds	r2, r2, #1
-.LVL2160:
-	b	.L1943
-.L1950:
+	b	.L1852
+.L1863:
 	.align	2
-.L1949:
-	.word	.LANCHOR76
-	.word	.LANCHOR210
+.L1862:
+	.word	.LANCHOR84
+	.word	.LANCHOR204
+	.word	.LANCHOR86
+	.word	.LANCHOR83
+	.word	.LANCHOR206
+	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC8
-	.word	.LANCHOR199
-	.word	.LANCHOR180
-	.word	.LANCHOR185
-	.word	.LANCHOR53
-	.cfi_endproc
-.LFE349:
-	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
-	.section	.text.FtlMapWritePage,"ax",%progbits
+	.word	.LANCHOR89
+	.word	.LANCHOR40
+	.word	.LANCHOR92
+	.word	.LANCHOR93
+	.word	.LANCHOR94
+	.size	update_vpc_list, .-update_vpc_list
+	.section	.text.decrement_vpc_count,"ax",%progbits
 	.align	1
-	.global	FtlMapWritePage
+	.global	decrement_vpc_count
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlMapWritePage, %function
-FtlMapWritePage:
-.LFB350:
-	.loc 1 742 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 8
+	.type	decrement_vpc_count, %function
+decrement_vpc_count:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2161:
-	.loc 1 747 0
-	ldr	r3, .L1974
-	.loc 1 742 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 1 742 0
-	mov	r4, r0
-	mov	r8, r1
-	str	r2, [sp]
-	.loc 1 747 0
-	ldr	r5, [r3]
-	str	r3, [sp, #4]
-	cmp	r5, #0
-	bne	.L1969
-.LBB466:
-.LBB467:
-	.loc 1 752 0
-	ldr	r10, .L1974+36
-.LVL2162:
-.L1953:
-	.loc 1 751 0
-	ldr	r2, .L1974+4
-	ldr	r3, [r2]
-	adds	r3, r3, #1
-	str	r3, [r2]
-	.loc 1 752 0
-	ldrh	r3, [r10]
-	ldrh	r2, [r4, #2]
-	subs	r3, r3, #1
-	cmp	r2, r3
-	bge	.L1954
-	ldrh	r2, [r4]
 	movw	r3, #65535
-	cmp	r2, r3
-	bne	.L1955
-.L1954:
-	.loc 1 753 0
-	mov	r0, r4
-	bl	Ftl_write_map_blk_to_last_page
-.LVL2163:
-.L1955:
-	.loc 1 764 0
-	ldrh	r2, [r4]
-	ldr	r3, [r4, #12]
-	ldrh	r3, [r3, r2, lsl #1]
-	cbnz	r3, .L1956
-	ldr	r1, .L1974+8
-	mov	r2, #764
-	ldr	r0, .L1974+12
+	push	{r4, r5, r6, lr}
+	cmp	r0, r3
+	mov	r4, r0
+	beq	.L1865
+	ldr	r5, .L1876
+	ldr	r3, [r5]
+	ldrh	r2, [r3, r0, lsl #1]
+	cmp	r2, #0
+	bne	.L1866
+	mov	r1, r0
+	ldr	r0, .L1876+4
 	bl	printf
-.LVL2164:
-	ldr	r1, .L1974+16
-	ldr	r0, .L1974+20
+	ldr	r3, [r5]
+	ldrh	r3, [r3, r4, lsl #1]
+	cbnz	r3, .L1867
+	ldr	r1, .L1876+8
+	movw	r2, #3410
+	ldr	r0, .L1876+12
 	bl	printf
-.LVL2165:
-.L1956:
-	.loc 1 765 0
-	ldrh	r2, [r4]
-	ldrh	r3, [r4, #10]
-	cmp	r2, r3
-	bcc	.L1957
-	ldr	r1, .L1974+8
-	movw	r2, #765
-	ldr	r0, .L1974+12
+	ldr	r1, .L1876+16
+	ldr	r0, .L1876+20
 	bl	printf
-.LVL2166:
-	ldr	r1, .L1974+16
-	ldr	r0, .L1974+20
+.L1867:
+	ldr	r3, [r5]
+	movs	r2, #32
+	mov	r1, r4
+	ldr	r0, .L1876+24
+	strh	r2, [r3, r4, lsl #1]	@ movhi
+	bl	test_node_in_list
+	cbz	r0, .L1868
+	ldr	r6, .L1876+28
+	mov	r1, r4
+	ldr	r0, .L1876+24
+	bl	List_remove_node
+	ldrh	r3, [r6]
+	cbnz	r3, .L1869
+	ldr	r1, .L1876+8
+	movw	r2, #3414
+	ldr	r0, .L1876+12
 	bl	printf
-.LVL2167:
-.L1957:
-	.loc 1 766 0
-	ldrh	r2, [r4]
-	.loc 1 772 0
-	movs	r1, #0
-	.loc 1 766 0
-	ldr	r3, [r4, #12]
-	.loc 1 768 0
-	ldr	r6, .L1974+24
-	.loc 1 766 0
-	ldrh	r7, [r3, r2, lsl #1]
-.LVL2168:
-	.loc 1 772 0
-	movs	r2, #16
-	.loc 1 768 0
-	ldrh	r3, [r4, #2]
-	mov	fp, r6
-	orr	r3, r3, r7, lsl #10
-	str	r3, [r6, #4]
-	.loc 1 769 0
-	ldr	r3, [sp]
-	str	r3, [r6, #8]
-	.loc 1 770 0
-	ldr	r3, .L1974+28
-	ldr	r0, [r3]
-	str	r0, [r6, #12]
-	.loc 1 772 0
-	bl	ftl_memset
-.LVL2169:
-	.loc 1 773 0
-	ldr	r3, [r6, #12]
-.LVL2170:
-	.loc 1 778 0
-	mov	r0, r6
-	.loc 1 774 0
-	ldr	r2, [r4, #28]
-	.loc 1 775 0
-	strh	r8, [r3, #8]	@ movhi
-	.loc 1 774 0
-	str	r2, [r3, #4]
-	.loc 1 776 0
-	ldrh	r2, [r4, #4]
-	.loc 1 777 0
-	strh	r7, [r3, #2]	@ movhi
-	.loc 1 776 0
-	strh	r2, [r3]	@ movhi
-	.loc 1 778 0
-	movs	r3, #1
-.LVL2171:
-	mov	r2, r3
-	mov	r1, r3
-	bl	FlashProgPages
-.LVL2172:
-	.loc 1 779 0
-	ldrh	r2, [r4, #2]
-	adds	r2, r2, #1
-	uxth	r2, r2
-	strh	r2, [r4, #2]	@ movhi
-	.loc 1 781 0
-	ldr	r1, [r6]
-	adds	r3, r1, #1
-	bne	.L1958
-	.loc 1 782 0
-	ldr	r1, [r6, #4]
-	.loc 1 783 0
-	adds	r5, r5, #1
-.LVL2173:
-	.loc 1 782 0
-	ldr	r0, .L1974+32
-	.loc 1 783 0
-	uxth	r5, r5
-	.loc 1 782 0
+	ldr	r1, .L1876+16
+	ldr	r0, .L1876+20
 	bl	printf
-.LVL2174:
-	.loc 1 784 0
-	ldrh	r2, [r4, #2]
-	cmp	r2, #2
-	.loc 1 785 0
-	itttt	ls
-	ldrls	r3, .L1974+36
-	ldrhls	r2, [r3]
-	addls	r2, r2, #-1
-	strhls	r2, [r4, #2]	@ movhi
-	.loc 1 787 0
-	cmp	r5, #3
-	bls	.L1953
-	.loc 1 788 0
-	mov	r2, r5
-	ldr	r1, [r6, #4]
-	ldr	r0, .L1974+40
+.L1869:
+	ldrh	r3, [r6]
+	mov	r0, r4
+	subs	r3, r3, #1
+	strh	r3, [r6]	@ movhi
+	bl	INSERT_DATA_LIST
+	ldr	r3, [r5]
+	mov	r1, r4
+	ldr	r0, .L1876+32
+	ldrh	r2, [r3, r4, lsl #1]
 	bl	printf
-.LVL2175:
-	.loc 1 790 0
-	ldr	r2, [sp, #4]
-	movs	r3, #1
-	str	r3, [r2]
-.LVL2176:
-.L1969:
-.LBE467:
-.LBE466:
-	.loc 1 811 0
-	movs	r0, #0
-	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-.LVL2177:
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL2178:
-.L1958:
-	.cfi_restore_state
-.LBB469:
-.LBB468:
-	.loc 1 803 0
-	cbz	r1, .L1961
-	.loc 1 806 0
-	cmp	r2, #1
-	.loc 1 804 0
-	strh	r7, [r4, #40]	@ movhi
-	.loc 1 806 0
-	beq	.L1953
-	cmp	r1, #256
-.L1973:
-	beq	.L1953
-	.loc 1 809 0
-	ldr	r2, [fp, #4]
-	ldr	r3, [r4, #24]
-	str	r2, [r3, r8, lsl #2]
-	b	.L1969
-.L1961:
-	.loc 1 806 0
-	cmp	r2, #1
-	b	.L1973
-.L1975:
+.L1868:
+	mov	r0, r4
+	bl	FtlGcRefreshBlock
+.L1872:
+	movs	r5, #0
+	b	.L1864
+.L1866:
+	subs	r2, r2, #1
+	strh	r2, [r3, r0, lsl #1]	@ movhi
+.L1865:
+	ldr	r6, .L1876+36
+	movw	r3, #65535
+	ldrh	r0, [r6]
+	cmp	r0, r3
+	bne	.L1871
+	strh	r4, [r6]	@ movhi
+	b	.L1872
+.L1871:
+	cmp	r4, r0
+	beq	.L1872
+	bl	update_vpc_list
+	ldr	r3, .L1876+40
+	adds	r5, r0, #0
+	ldr	r2, .L1876+44
+	it	ne
+	movne	r5, #1
+	strh	r4, [r6]	@ movhi
+	ldr	r3, [r3]
+	ldr	r2, [r2]
+	subs	r3, r3, r2
+	asrs	r2, r3, #1
+	ldr	r3, .L1876+48
+	muls	r3, r2, r3
+	ldr	r2, .L1876
+	ldr	r2, [r2]
+	uxth	r1, r3
+	ldrh	r2, [r2, r1, lsl #1]
+	cbnz	r2, .L1864
+	cmp	r4, r1
+	beq	.L1864
+	ldr	r1, .L1876+8
+	movw	r2, #3435
+	ldr	r0, .L1876+12
+	bl	printf
+	ldr	r1, .L1876+16
+	ldr	r0, .L1876+20
+	bl	printf
+.L1864:
+	mov	r0, r5
+	pop	{r4, r5, r6, pc}
+.L1877:
 	.align	2
-.L1974:
-	.word	.LANCHOR76
-	.word	.LANCHOR162
-	.word	.LANCHOR211
+.L1876:
+	.word	.LANCHOR84
+	.word	.LC36
+	.word	.LANCHOR207
+	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC8
-	.word	.LANCHOR199
-	.word	.LANCHOR185
-	.word	.LC38
-	.word	.LANCHOR53
-	.word	.LC39
-.LBE468:
-.LBE469:
-	.cfi_endproc
-.LFE350:
-	.size	FtlMapWritePage, .-FtlMapWritePage
-	.section	.text.flush_l2p_region,"ax",%progbits
-	.align	1
-	.global	flush_l2p_region
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	flush_l2p_region, %function
-flush_l2p_region:
-.LFB351:
-	.loc 1 814 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2179:
-	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 1 817 0
-	movs	r4, #12
-	ldr	r5, .L1977
-	muls	r4, r0, r4
-	.loc 1 818 0
-	ldr	r0, .L1977+4
-.LVL2180:
-	.loc 1 817 0
-	ldr	r3, [r5]
-	adds	r2, r3, r4
-.LVL2181:
-	.loc 1 818 0
-	ldrh	r1, [r3, r4]
-.LVL2182:
-	ldr	r2, [r2, #8]
-	bl	FtlMapWritePage
-.LVL2183:
-	.loc 1 819 0
-	ldr	r3, [r5]
-	.loc 1 821 0
-	movs	r0, #0
-	.loc 1 819 0
-	add	r4, r4, r3
-	ldr	r3, [r4, #4]
-	bic	r3, r3, #-2147483648
-	str	r3, [r4, #4]
-	.loc 1 821 0
-	pop	{r3, r4, r5, pc}
-.L1978:
-	.align	2
-.L1977:
-	.word	.LANCHOR96
-	.word	.LANCHOR124
-	.cfi_endproc
-.LFE351:
-	.size	flush_l2p_region, .-flush_l2p_region
-	.section	.text.l2p_flush,"ax",%progbits
+	.word	.LANCHOR88
+	.word	.LANCHOR89
+	.word	.LC37
+	.word	.LANCHOR133
+	.word	.LANCHOR83
+	.word	.LANCHOR82
+	.word	-1431655765
+	.size	decrement_vpc_count, .-decrement_vpc_count
+	.section	.text.FtlSlcSuperblockCheck,"ax",%progbits
 	.align	1
-	.global	l2p_flush
+	.global	FtlSlcSuperblockCheck
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	l2p_flush, %function
-l2p_flush:
-.LFB353:
-	.loc 1 864 0
-	.cfi_startproc
+	.type	FtlSlcSuperblockCheck, %function
+FtlSlcSuperblockCheck:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2184:
+	ldrh	r3, [r0, #4]
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 1 871 0
-	movs	r4, #0
-	ldr	r5, .L1983
-	.loc 1 872 0
-	ldr	r6, .L1983+4
-.LVL2185:
-.L1980:
-	.loc 1 871 0 discriminator 1
-	ldrh	r3, [r5]
-	uxth	r0, r4
-.LVL2186:
-	cmp	r3, r0
-	bhi	.L1982
-	.loc 1 875 0
-	movs	r0, #0
-.LVL2187:
-	pop	{r4, r5, r6, pc}
-.LVL2188:
-.L1982:
-	.loc 1 872 0
-	ldr	r2, [r6]
-	uxth	r3, r4
-	movs	r1, #12
-	mla	r3, r1, r3, r2
-	ldr	r3, [r3, #4]
+	mov	r4, r0
 	cmp	r3, #0
-	bge	.L1981
-	.loc 1 873 0
-	bl	flush_l2p_region
-.LVL2189:
-.L1981:
-	adds	r4, r4, #1
-.LVL2190:
-	b	.L1980
-.L1984:
+	beq	.L1878
+	ldrh	r2, [r0]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L1878
+	ldrb	r3, [r0, #6]	@ zero_extendqisi2
+	ldr	r5, .L1889
+	ldr	r6, .L1889+4
+	adds	r3, r3, #8
+	ldrh	r3, [r0, r3, lsl #1]
+.L1882:
+	movw	r2, #65535
+	cmp	r3, r2
+	beq	.L1884
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	cmp	r3, #1
+	bne	.L1885
+	ldrb	r1, [r5]	@ zero_extendqisi2
+	cbnz	r1, .L1885
+	ldrh	r1, [r4, #2]
+	ldrh	r1, [r6, r1, lsl #1]
+	cmp	r1, r2
+	bne	.L1885
+	ldrh	r3, [r4, #4]
+	ldrh	r0, [r4]
+	subs	r3, r3, #1
+	strh	r3, [r4, #4]	@ movhi
+	bl	decrement_vpc_count
+	ldrh	r2, [r4, #4]
+	cbnz	r2, .L1884
+	ldrh	r3, [r4, #2]
+	strb	r2, [r4, #6]
+	adds	r3, r3, #1
+	strh	r3, [r4, #2]	@ movhi
+	pop	{r4, r5, r6, pc}
+.L1884:
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	ldr	r2, .L1889+8
+	adds	r3, r3, #1
+	ldrh	r2, [r2]
+	uxtb	r3, r3
+	strb	r3, [r4, #6]
+	cmp	r2, r3
+	bne	.L1883
+	ldrh	r3, [r4, #2]
+	adds	r3, r3, #1
+	strh	r3, [r4, #2]	@ movhi
+	movs	r3, #0
+	strb	r3, [r4, #6]
+.L1883:
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	adds	r3, r3, #8
+	ldrh	r3, [r4, r3, lsl #1]
+	b	.L1882
+.L1885:
+	ldrb	r2, [r5]	@ zero_extendqisi2
+	cbz	r2, .L1878
+	cmp	r3, #1
+	bne	.L1878
+	ldr	r3, .L1889+12
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L1878
+	ldr	r3, .L1889+16
+	ldrh	r1, [r4]
+	ldrh	r0, [r4, #4]
+	ldr	r2, [r3]
+	ldrh	r3, [r2, r1, lsl #1]
+	subs	r3, r3, r0
+	strh	r3, [r2, r1, lsl #1]	@ movhi
+	movs	r3, #0
+	ldr	r2, .L1889+20
+	strh	r3, [r4, #4]	@ movhi
+	strb	r3, [r4, #6]
+	ldrh	r2, [r2]
+	strh	r2, [r4, #2]	@ movhi
+.L1878:
+	pop	{r4, r5, r6, pc}
+.L1890:
 	.align	2
-.L1983:
-	.word	.LANCHOR67
-	.word	.LANCHOR96
-	.cfi_endproc
-.LFE353:
-	.size	l2p_flush, .-l2p_flush
-	.section	.text.log2phys,"ax",%progbits
+.L1889:
+	.word	.LANCHOR8
+	.word	.LANCHOR120
+	.word	.LANCHOR38
+	.word	.LANCHOR54
+	.word	.LANCHOR84
+	.word	.LANCHOR53
+	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
+	.section	.text.get_new_active_ppa,"ax",%progbits
 	.align	1
-	.global	log2phys
+	.global	get_new_active_ppa
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	log2phys, %function
-log2phys:
-.LFB354:
-	.loc 1 878 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 16
+	.type	get_new_active_ppa, %function
+get_new_active_ppa:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2191:
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 48
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 1 881 0
-	ldr	r3, .L2003
-	.loc 1 878 0
-	str	r1, [sp, #4]
-	.loc 1 881 0
-	ldrh	r6, [r3]
-	.loc 1 878 0
-	str	r2, [sp, #12]
-	.loc 1 881 0
-	adds	r3, r6, #7
-	.loc 1 882 0
-	movs	r6, #1
-	.loc 1 881 0
-	lsr	fp, r0, r3
-	.loc 1 882 0
-	lsls	r6, r6, r3
-	.loc 1 884 0
-	ldr	r3, .L2003+4
-	.loc 1 882 0
-	subs	r6, r6, #1
-	.loc 1 881 0
-	uxth	r8, fp
-.LVL2192:
-	.loc 1 882 0
-	ands	r6, r6, r0
-	.loc 1 884 0
-	ldr	r3, [r3]
-	.loc 1 882 0
-	uxth	r6, r6
-.LVL2193:
-	.loc 1 884 0
-	cmp	r0, r3
-	bcc	.L1986
-	.loc 1 884 0 is_stmt 0 discriminator 1
-	ldr	r1, .L2003+8
-.LVL2194:
-	mov	r2, #884
-.LVL2195:
-	ldr	r0, .L2003+12
-.LVL2196:
+	ldrh	r2, [r0]
+	movw	r3, #65535
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r4, r0
+	cmp	r2, r3
+	bne	.L1892
+	ldr	r1, .L1913
+	movw	r2, #3332
+	ldr	r0, .L1913+4
 	bl	printf
-.LVL2197:
-	ldr	r1, .L2003+16
-	ldr	r0, .L2003+20
+	ldr	r1, .L1913+8
+	ldr	r0, .L1913+12
 	bl	printf
-.LVL2198:
-.L1986:
-	.loc 1 887 0 is_stmt 1
-	ldr	r5, .L2003+24
-	movs	r4, #12
-	.loc 1 886 0
-	ldr	r3, .L2003+28
-	.loc 1 887 0
-	ldr	r1, [r5]
-	.loc 1 886 0
-	ldrh	r2, [r3]
-	movs	r3, #0
-.LVL2199:
-.L1987:
-	uxth	r10, r3
-.LVL2200:
-	.loc 1 886 0 is_stmt 0 discriminator 1
-	cmp	r10, r2
-	bcc	.L1992
-	.loc 1 901 0 is_stmt 1
-	bl	select_l2p_ram_region
-.LVL2201:
-	.loc 1 902 0
-	muls	r4, r0, r4
-	ldr	r3, [r5]
-	.loc 1 901 0
-	mov	r10, r0
-.LVL2202:
-	.loc 1 902 0
-	ldrh	r1, [r3, r4]
-	adds	r2, r3, r4
-	movw	r3, #65535
-	cmp	r1, r3
-	beq	.L1993
-	.loc 1 902 0 is_stmt 0 discriminator 1
-	ldr	r3, [r2, #4]
-	cmp	r3, #0
-	bge	.L1993
-	.loc 1 903 0 is_stmt 1
-	bl	flush_l2p_region
-.LVL2203:
-.L1993:
-.LBB472:
-.LBB473:
-	.loc 1 526 0
-	ldr	r3, .L2003+32
-	ldrh	r3, [r3]
-	cmp	r3, r8
-	bcs	.L1994
-	ldr	r1, .L2003+36
-	movw	r2, #526
-	ldr	r0, .L2003+12
+.L1892:
+	ldr	r5, .L1913+16
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r5]
+	cmp	r2, r3
+	bne	.L1893
+	ldr	r1, .L1913
+	movw	r2, #3333
+	ldr	r0, .L1913+4
 	bl	printf
-.LVL2204:
-	ldr	r1, .L2003+16
-	ldr	r0, .L2003+20
+	ldr	r1, .L1913+8
+	ldr	r0, .L1913+12
 	bl	printf
-.LVL2205:
-.L1994:
-	.loc 1 527 0
-	ldr	r3, .L2003+40
-	uxth	fp, fp
-	ldr	r3, [r3]
-	ldr	r7, [r3, fp, lsl #2]
-.LVL2206:
-	.loc 1 529 0
-	cmp	r7, #0
-	bne	.L1995
-	.loc 1 530 0
-	ldr	r3, [r5]
-	movs	r1, #255
-	ldr	r2, .L2003+44
-	add	r3, r3, r4
-	ldr	r0, [r3, #8]
-	ldrh	r2, [r2]
-	bl	ftl_memset
-.LVL2207:
-	.loc 1 531 0
-	ldr	r3, [r5]
-	strh	r8, [r3, r4]	@ movhi
-	.loc 1 532 0
-	ldr	r3, [r5]
-	add	r4, r4, r3
-	str	r7, [r4, #4]
-	b	.L1988
-.LVL2208:
-.L1992:
-	adds	r3, r3, #1
-.LBE473:
-.LBE472:
-	.loc 1 887 0
-	mla	r0, r4, r3, r1
-	ldrh	r0, [r0, #-12]
-	cmp	r0, r8
-	bne	.L1987
-.LVL2209:
-.L1988:
-	.loc 1 889 0
-	ldr	r2, [sp, #12]
-	movs	r3, #12
-	ldr	r1, .L2003+24
-	cbnz	r2, .L1989
-	.loc 1 890 0
-	ldr	r2, [r1]
-	mla	r3, r3, r10, r2
-	ldr	r2, [sp, #4]
-	ldr	r3, [r3, #8]
-	ldr	r3, [r3, r6, lsl #2]
-	str	r3, [r2]
-.L1990:
-	.loc 1 896 0
-	ldr	r2, [r1]
-	movs	r3, #12
-	mla	r10, r3, r10, r2
-.LVL2210:
-	ldr	r3, [r10, #4]
-	adds	r2, r3, #1
-	beq	.L2000
-	.loc 1 897 0
-	adds	r3, r3, #1
-	str	r3, [r10, #4]
-.L2000:
-	.loc 1 908 0
-	movs	r0, #0
-	add	sp, sp, #16
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL2211:
-.L1989:
-	.cfi_restore_state
-	.loc 1 892 0
-	ldr	r2, [sp, #4]
-	mul	r3, r3, r10
-	ldr	r0, [r2]
-	ldr	r2, [r5]
-	add	r2, r2, r3
-	ldr	r2, [r2, #8]
-	str	r0, [r2, r6, lsl #2]
-	.loc 1 893 0
-	ldr	r2, [r5]
-	add	r3, r3, r2
-	ldr	r2, [r3, #4]
-	orr	r2, r2, #-2147483648
-	str	r2, [r3, #4]
-	.loc 1 894 0
-	ldr	r3, .L2003+48
-	strh	r8, [r3]	@ movhi
-	b	.L1990
-.LVL2212:
-.L1995:
-.LBB475:
-.LBB474:
-	.loc 1 536 0
-	ldr	r2, [r5]
-	.loc 1 535 0
-	ldr	r3, .L2003+52
-	.loc 1 536 0
-	add	r2, r2, r4
-	ldr	r2, [r2, #8]
-	.loc 1 538 0
-	mov	r0, r3
-	.loc 1 535 0
-	str	r7, [r3, #4]
-	.loc 1 538 0
-	str	r3, [sp, #8]
-	.loc 1 536 0
-	str	r2, [r3, #8]
-	.loc 1 537 0
-	ldr	r2, .L2003+56
-	ldr	r2, [r2]
-	str	r2, [r3, #12]
-	.loc 1 538 0
-	movs	r2, #1
-	mov	r1, r2
-	bl	FlashReadPages
-.LVL2213:
-	.loc 1 539 0
-	ldr	r3, [sp, #8]
-	ldr	r2, [r3, #12]
-	.loc 1 540 0
-	ldr	r3, [r3]
-	.loc 1 539 0
-	str	r2, [sp, #8]
-.LVL2214:
-	.loc 1 540 0
-	cmp	r3, #256
-	bne	.L1996
-	.loc 1 541 0
-	mov	r2, r7
-.LVL2215:
-	mov	r1, fp
-	ldr	r0, .L2003+60
-	.loc 1 542 0
-	lsrs	r7, r7, #10
-.LVL2216:
-	.loc 1 541 0
-	bl	printf
-.LVL2217:
-	.loc 1 543 0
-	ldr	r3, [r5]
-	mov	r1, fp
-	.loc 1 542 0
-	ldr	r0, .L2003+64
-	.loc 1 543 0
-	add	r3, r3, r4
-	.loc 1 542 0
-	strh	r7, [r0, #40]	@ movhi
-	.loc 1 543 0
-	ldr	r2, [r3, #8]
-	bl	FtlMapWritePage
-.LVL2218:
-.L1996:
-	.loc 1 552 0
-	ldr	r3, [sp, #8]
-	ldrh	r3, [r3, #8]
-	cmp	r3, r8
-	beq	.L1997
-	ldr	r1, .L2003+36
-	mov	r2, #552
-	ldr	r0, .L2003+12
-	bl	printf
-.LVL2219:
-	ldr	r1, .L2003+16
-	ldr	r0, .L2003+20
-	bl	printf
-.LVL2220:
-.L1997:
-	.loc 1 555 0
-	ldr	r3, .L2003+24
-	movs	r1, #0
-	ldr	r3, [r3]
-	adds	r2, r3, r4
-	str	r1, [r2, #4]
-	.loc 1 556 0
-	strh	r8, [r3, r4]	@ movhi
-	b	.L1988
-.L2004:
-	.align	2
-.L2003:
-	.word	.LANCHOR56
-	.word	.LANCHOR72
-	.word	.LANCHOR212
-	.word	.LC6
-	.word	.LC7
-	.word	.LC8
-	.word	.LANCHOR96
-	.word	.LANCHOR67
-	.word	.LANCHOR66
-	.word	.LANCHOR213
-	.word	.LANCHOR128
-	.word	.LANCHOR57
-	.word	.LANCHOR97
-	.word	.LANCHOR199
-	.word	.LANCHOR185
-	.word	.LC40
-	.word	.LANCHOR124
-.LBE474:
-.LBE475:
-	.cfi_endproc
-.LFE354:
-	.size	log2phys, .-log2phys
-	.section	.text.FtlReUsePrevPpa,"ax",%progbits
-	.align	1
-	.global	FtlReUsePrevPpa
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlReUsePrevPpa, %function
-FtlReUsePrevPpa:
-.LFB371:
-	.loc 1 1851 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2221:
-	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -24
-	.cfi_offset 5, -20
-	.cfi_offset 6, -16
-	.cfi_offset 7, -12
-	.cfi_offset 8, -8
-	.cfi_offset 14, -4
-	.loc 1 1851 0
-	mov	r6, r0
-	.loc 1 1854 0
-	ldr	r5, .L2015
-	.loc 1 1852 0
-	ubfx	r0, r1, #10, #16
-.LVL2222:
-	.loc 1 1851 0
-	str	r1, [sp, #4]
-	.loc 1 1852 0
-	bl	P2V_block_in_plane
-.LVL2223:
-	.loc 1 1854 0
-	ldr	r2, [r5]
-	.loc 1 1852 0
-	mov	r7, r0
-.LVL2224:
-	.loc 1 1854 0
-	ldrh	r3, [r2, r0, lsl #1]
-	cmp	r3, #0
-	bne	.L2006
-	.loc 1 1855 0
-	ldr	r2, .L2015+4
-	ldr	r4, [r2]
-	cmp	r4, #0
-	beq	.L2007
-.LBB476:
-	.loc 1 1859 0
-	ldr	r2, .L2015+8
-	.loc 1 1867 0
-	movw	lr, #65535
-	.loc 1 1859 0
-	ldr	ip, .L2015+32
-	.loc 1 1858 0
-	ldr	r0, .L2015+12
-.LVL2225:
-	.loc 1 1859 0
-	ldr	r2, [r2]
-	.loc 1 1858 0
-	ldrh	r1, [r0]
-.LVL2226:
-	mov	r8, r0
-	.loc 1 1859 0
-	subs	r4, r4, r2
-	asrs	r4, r4, #1
-	mul	r4, ip, r4
-	.loc 1 1867 0
-	mov	ip, #6
-	.loc 1 1859 0
-	uxth	r4, r4
-.LVL2227:
-.L2008:
-	.loc 1 1860 0 discriminator 1
-	uxth	r0, r3
-	cmp	r1, r0
-	bls	.L2007
-	.loc 1 1861 0
-	cmp	r4, r7
-	bne	.L2009
-	.loc 1 1862 0
-	mov	r1, r4
-.LVL2228:
-	ldr	r0, .L2015+4
-	bl	List_remove_node
-.LVL2229:
-	ldrh	r3, [r8]
-	cbnz	r3, .L2010
-	.loc 1 1862 0 is_stmt 0 discriminator 1
-	ldr	r1, .L2015+16
-	movw	r2, #1862
-	ldr	r0, .L2015+20
+.L1893:
+	ldrh	r3, [r4, #4]
+	cbnz	r3, .L1894
+	ldr	r1, .L1913
+	movw	r2, #3334
+	ldr	r0, .L1913+4
 	bl	printf
-.LVL2230:
-	ldr	r1, .L2015+24
-	ldr	r0, .L2015+28
+	ldr	r1, .L1913+8
+	ldr	r0, .L1913+12
 	bl	printf
-.LVL2231:
-.L2010:
-	.loc 1 1862 0 discriminator 3
-	ldrh	r3, [r8]
-	.loc 1 1863 0 is_stmt 1 discriminator 3
-	mov	r0, r4
-	.loc 1 1862 0 discriminator 3
+.L1894:
+	movs	r3, #0
+	ldr	r7, .L1913+20
+	strb	r3, [r4, #10]
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	ldr	r6, .L1913+24
+	adds	r3, r3, #8
+	ldrh	r2, [r4, r3, lsl #1]
+.L1895:
+	movw	r0, #65535
+	cmp	r2, r0
+	beq	.L1896
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	ldrh	r1, [r4, #2]
+	cmp	r3, #1
+	ldrh	r3, [r4, #4]
+	bne	.L1898
+	ldrb	ip, [r6]	@ zero_extendqisi2
+	cmp	ip, #0
+	bne	.L1898
+	ldr	ip, .L1913+28
+	ldrh	ip, [ip, r1, lsl #1]
+	cmp	ip, r0
+	bne	.L1898
 	subs	r3, r3, #1
-	strh	r3, [r8]	@ movhi
-	.loc 1 1863 0 discriminator 3
-	bl	INSERT_DATA_LIST
-.LVL2232:
-	.loc 1 1864 0 discriminator 3
-	ldr	r2, [r5]
-	ldrh	r3, [r2, r7, lsl #1]
-.LVL2233:
-.L2006:
-.LBE476:
-	.loc 1 1873 0
+	ldrh	r0, [r4]
+	strh	r3, [r4, #4]	@ movhi
+	bl	decrement_vpc_count
+.L1896:
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	ldrh	r2, [r7]
 	adds	r3, r3, #1
-	strh	r3, [r2, r7, lsl #1]	@ movhi
-	b	.L2007
-.LVL2234:
-.L2009:
-.LBB477:
-	.loc 1 1867 0
-	mul	r4, ip, r4
-.LVL2235:
+	uxtb	r3, r3
+	cmp	r2, r3
+	strb	r3, [r4, #6]
+	bne	.L1897
+	ldrh	r3, [r4, #2]
 	adds	r3, r3, #1
-.LVL2236:
-	ldrh	r4, [r2, r4]
-	cmp	r4, lr
-	bne	.L2008
-.LVL2237:
-.L2007:
-.LBE477:
-	.loc 1 1875 0
-	movs	r2, #1
-	add	r1, sp, #4
+	strh	r3, [r4, #2]	@ movhi
+	movs	r3, #0
+	strb	r3, [r4, #6]
+.L1897:
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	adds	r3, r3, #8
+	ldrh	r2, [r4, r3, lsl #1]
+	b	.L1895
+.L1898:
+	ldr	r8, .L1913+24
+	orr	r6, r1, r2, lsl #10
+	subs	r3, r3, #1
+	strh	r3, [r4, #4]	@ movhi
+.L1899:
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	movw	r2, #65535
+	ldrh	r0, [r7]
+.L1901:
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	cmp	r3, r0
+	itttt	eq
+	ldrheq	r3, [r4, #2]
+	addeq	r3, r3, #1
+	strheq	r3, [r4, #2]	@ movhi
+	moveq	r3, #0
+	add	r1, r3, #8
+	ldrh	r1, [r4, r1, lsl #1]
+	cmp	r1, r2
+	beq	.L1901
+	strb	r3, [r4, #6]
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	cmp	r3, #1
+	bne	.L1902
+	ldrb	r1, [r8]	@ zero_extendqisi2
+	ldrh	r3, [r4, #2]
+	cbnz	r1, .L1903
+	ldr	r1, .L1913+28
+	ldrh	r3, [r1, r3, lsl #1]
+	cmp	r3, r2
+	bne	.L1902
+	ldrh	r3, [r4, #4]
+	cbz	r3, .L1902
+	subs	r3, r3, #1
+	ldrh	r0, [r4]
+	strh	r3, [r4, #4]	@ movhi
+	bl	decrement_vpc_count
+	b	.L1899
+.L1903:
+	ldr	r2, .L1913+32
+	ldrh	r2, [r2]
+	cmp	r3, r2
+	bcc	.L1902
+	ldr	r3, .L1913+36
+	ldrh	r1, [r4]
+	ldrh	r0, [r4, #4]
+	ldr	r2, [r3]
+	ldrh	r3, [r2, r1, lsl #1]
+	subs	r3, r3, r0
+	strh	r3, [r2, r1, lsl #1]	@ movhi
+	movs	r3, #0
+	ldrh	r2, [r5]
+	strh	r3, [r4, #4]	@ movhi
+	strb	r3, [r4, #6]
+	strh	r2, [r4, #2]	@ movhi
+.L1902:
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r5]
+	cmp	r2, r3
+	bne	.L1891
+	ldrh	r3, [r4, #4]
+	cbz	r3, .L1891
+	ldr	r1, .L1913
+	movw	r2, #3378
+	ldr	r0, .L1913+4
+	bl	printf
+	ldr	r1, .L1913+8
+	ldr	r0, .L1913+12
+	bl	printf
+.L1891:
 	mov	r0, r6
-	bl	log2phys
-.LVL2238:
-	.loc 1 1876 0
-	add	sp, sp, #8
-	.cfi_def_cfa_offset 24
-	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL2239:
-.L2016:
+.L1914:
 	.align	2
-.L2015:
-	.word	.LANCHOR83
-	.word	.LANCHOR87
-	.word	.LANCHOR81
-	.word	.LANCHOR88
-	.word	.LANCHOR214
+.L1913:
+	.word	.LANCHOR208
+	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC8
-	.word	-1431655765
-	.cfi_endproc
-.LFE371:
-	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
-	.section	.text.FtlVendorPartWrite,"ax",%progbits
+	.word	.LANCHOR53
+	.word	.LANCHOR38
+	.word	.LANCHOR8
+	.word	.LANCHOR120
+	.word	.LANCHOR54
+	.word	.LANCHOR84
+	.size	get_new_active_ppa, .-get_new_active_ppa
+	.section	.text.FtlVpcTblFlush,"ax",%progbits
 	.align	1
-	.global	FtlVendorPartWrite
+	.global	FtlVpcTblFlush
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlVendorPartWrite, %function
-FtlVendorPartWrite:
-.LFB355:
-	.loc 1 911 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 56
+	.type	FtlVpcTblFlush, %function
+FtlVpcTblFlush:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2240:
-	.loc 1 918 0
-	ldr	r3, .L2029
-	.loc 1 911 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	sub	sp, sp, #56
-	.cfi_def_cfa_offset 88
-	.loc 1 911 0
-	str	r2, [sp]
-	.loc 1 918 0
-	adds	r2, r0, r1
-.LVL2241:
-	.loc 1 911 0
-	mov	r7, r0
-	mov	r5, r1
-	.loc 1 918 0
+	ldr	r3, .L1935
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r1, [r3]
+	str	r3, [sp]
+	cmp	r1, #0
+	bne	.L1917
+	ldr	r3, .L1935+4
+	ldr	r7, .L1935+8
+	ldr	r8, .L1935+112
+	ldr	r4, .L1935+12
+	ldr	r6, [r7]
+	ldr	r0, [r8]
+	ldrh	r2, [r3]
+	str	r6, [r4, #12]
+	str	r0, [r4, #8]
+	strh	r2, [r6, #2]	@ movhi
+	movw	r2, #61604
+	ldr	r5, .L1935+16
+	strh	r2, [r6]	@ movhi
+	ldr	r2, [r3, #8]
+	ldrh	r3, [r3, #6]
+	str	r1, [r6, #8]
+	str	r2, [r6, #4]
+	strh	r3, [r5, #8]	@ movhi
+	ldr	r3, .L1935+20
+	ldr	ip, .L1935+116
+	ldr	r2, .L1935+24
 	ldrh	r3, [r3]
-	cmp	r2, r3
-	bhi	.L2025
-	.loc 1 916 0
-	ldr	r3, .L2029+4
-	mov	r8, #0
-	ldrh	r6, [r3]
-	lsr	r6, r0, r6
-	lsl	fp, r6, #2
-.LVL2242:
-.L2019:
-	.loc 1 921 0
-	cbnz	r5, .L2024
-.LVL2243:
-.L2017:
-	.loc 1 944 0
-	mov	r0, r8
-	add	sp, sp, #56
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-.LVL2244:
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL2245:
-.L2024:
-	.cfi_restore_state
-	.loc 1 922 0
-	ldr	r3, .L2029+8
-	.loc 1 923 0
-	mov	r0, r7
-	ldr	r10, .L2029+24
-	.loc 1 922 0
+	str	r1, [r6, #12]
+	stm	r5, {r2, ip}
+	strb	r3, [r5, #10]
+	ldr	r3, .L1935+28
+	ldrh	r2, [r3]
+	ldrh	r1, [r3, #2]
+	strh	r2, [r5, #14]	@ movhi
+	ldrb	r2, [r3, #6]	@ zero_extendqisi2
+	ldrb	r3, [r3, #8]	@ zero_extendqisi2
+	strb	r3, [r5, #11]
+	orr	r2, r2, r1, lsl #6
+	ldr	r3, .L1935+32
+	strh	r2, [r5, #16]	@ movhi
+	ldrh	r2, [r3]
+	ldrh	r1, [r3, #2]
+	strh	r2, [r5, #18]	@ movhi
+	ldrb	r2, [r3, #6]	@ zero_extendqisi2
+	ldrb	r3, [r3, #8]	@ zero_extendqisi2
+	strb	r3, [r5, #12]
+	orr	r2, r2, r1, lsl #6
+	ldr	r3, .L1935+36
+	strh	r2, [r5, #20]	@ movhi
+	ldrh	r2, [r3]
+	strh	r2, [r5, #22]	@ movhi
+	ldrh	r1, [r3, #2]
+	ldrb	r2, [r3, #6]	@ zero_extendqisi2
+	ldrb	r3, [r3, #8]	@ zero_extendqisi2
+	strb	r3, [r5, #13]
+	orr	r2, r2, r1, lsl #6
+	ldr	r3, .L1935+40
+	movs	r1, #255
+	strh	r2, [r5, #24]	@ movhi
 	ldr	r3, [r3]
-	ldr	r2, [r3, fp]
-	.loc 1 923 0
-	ldr	r3, .L2029+12
-	.loc 1 922 0
-	str	r2, [sp, #12]
-.LVL2246:
-	.loc 1 923 0
+	str	r3, [r5, #32]
+	ldr	r3, .L1935+44
+	ldr	r3, [r3]
+	str	r3, [r5, #40]
+	ldr	r3, .L1935+48
+	ldr	r3, [r3]
+	str	r3, [r5, #36]
+	ldr	r3, .L1935+52
 	ldrh	r3, [r3]
-	mov	r1, r3
-	str	r3, [sp, #8]
-	bl	__aeabi_uidivmod
-.LVL2247:
-	.loc 1 924 0
-	ldr	r3, [sp, #8]
-	.loc 1 925 0
-	ldr	r2, [sp, #12]
-	.loc 1 923 0
-	str	r1, [sp, #4]
-.LVL2248:
-	.loc 1 924 0
-	subs	r4, r3, r1
-	uxth	r4, r4
-.LVL2249:
-	.loc 1 925 0
-	cmp	r5, r4
-	.loc 1 926 0
-	it	cc
-	uxthcc	r4, r5
-.LVL2250:
-	.loc 1 927 0
-	cbz	r2, .L2021
-	.loc 1 927 0 is_stmt 0 discriminator 1
-	cmp	r4, r3
-	beq	.L2021
-	.loc 1 929 0 is_stmt 1
-	ldr	r3, [r10]
-	.loc 1 931 0
-	add	r0, sp, #20
-	.loc 1 928 0
-	str	r2, [sp, #24]
-	.loc 1 931 0
-	movs	r2, #1
-	mov	r1, r2
-	.loc 1 929 0
-	str	r3, [sp, #28]
-	.loc 1 930 0
-	movs	r3, #0
-	str	r3, [sp, #32]
-	.loc 1 931 0
-	bl	FlashReadPages
-.LVL2251:
-.L2022:
-	.loc 1 935 0
-	lsls	r3, r4, #9
-	ldr	r0, [r10]
-	.loc 1 939 0
-	subs	r5, r5, r4
-.LVL2252:
-	.loc 1 935 0
-	mov	r2, r3
-	str	r3, [sp, #8]
-	ldm	sp, {r1, r3}
-	.loc 1 940 0
-	add	r7, r7, r4
-.LVL2253:
-	add	fp, fp, #4
-	.loc 1 935 0
-	add	r0, r0, r3, lsl #9
-	bl	ftl_memcpy
-.LVL2254:
-	.loc 1 936 0
-	ldr	r2, [r10]
-	mov	r1, r6
-	ldr	r0, .L2029+16
-	.loc 1 938 0
-	adds	r6, r6, #1
-.LVL2255:
-	.loc 1 936 0
-	bl	FtlMapWritePage
-.LVL2256:
-	.loc 1 941 0
-	ldr	r3, [sp]
-	.loc 1 937 0
-	adds	r0, r0, #1
-	it	eq
-	moveq	r8, #-1
-.LVL2257:
-	.loc 1 941 0
-	mov	r2, r3
-	ldr	r3, [sp, #8]
-	add	r2, r2, r3
-	str	r2, [sp]
-.LVL2258:
-	b	.L2019
-.LVL2259:
-.L2021:
-	.loc 1 933 0
-	ldr	r3, .L2029+20
-	movs	r1, #0
-	ldr	r0, [r10]
+	strh	r3, [r5, #44]	@ movhi
+	ldr	r3, .L1935+56
+	ldrh	r3, [r3]
+	strh	r3, [r5, #46]	@ movhi
+	ldr	r3, .L1935+60
 	ldrh	r2, [r3]
-.LVL2260:
 	bl	ftl_memset
-.LVL2261:
-	b	.L2022
-.LVL2262:
-.L2025:
-	.loc 1 919 0
-	mov	r8, #-1
-	b	.L2017
-.L2030:
-	.align	2
-.L2029:
-	.word	.LANCHOR49
-	.word	.LANCHOR56
-	.word	.LANCHOR191
-	.word	.LANCHOR55
-	.word	.LANCHOR215
-	.word	.LANCHOR57
-	.word	.LANCHOR182
-	.cfi_endproc
-.LFE355:
-	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
-	.section	.text.Ftl_save_ext_data,"ax",%progbits
-	.align	1
-	.global	Ftl_save_ext_data
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	Ftl_save_ext_data, %function
-Ftl_save_ext_data:
-.LFB377:
-	.loc 1 2410 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	.loc 1 2411 0
-	ldr	r2, .L2033
-	ldr	r3, .L2033+4
-	ldr	r1, [r2]
-	cmp	r1, r3
-	bne	.L2031
-.LBB480:
-.LBB481:
-	.loc 1 2412 0
-	ldr	r3, .L2033+8
-	.loc 1 2427 0
-	movs	r1, #1
+	mov	r1, r5
+	ldr	r5, .L1935+64
+	movs	r2, #48
+	ldr	r0, [r4, #8]
+	bl	ftl_memcpy
+	ldrh	r2, [r5]
+	ldr	r3, .L1935+68
+	ldr	r0, [r4, #8]
+	ldr	r1, [r3]
+	lsls	r2, r2, #1
+	adds	r0, r0, #48
+	bl	ftl_memcpy
+	ldrh	r0, [r5]
+	ldr	r3, [r4, #8]
+	ldr	r1, .L1935+72
+	lsrs	r2, r0, #3
+	adds	r0, r0, #24
+	lsls	r0, r0, #1
+	ldr	r1, [r1]
+	adds	r2, r2, #4
+	bic	r0, r0, #3
+	add	r0, r0, r3
+	bl	ftl_memcpy
+	ldr	r3, .L1935+76
+	str	r7, [sp, #4]
+	ldrh	r3, [r3]
+	cbz	r3, .L1918
+	ldrh	r0, [r5]
+	ldr	r3, .L1935+80
+	ldr	r1, .L1935+84
+	ldrh	r2, [r3]
+	lsrs	r3, r0, #3
+	ldr	r1, [r1]
+	add	r3, r3, r0, lsl #1
+	ldr	r0, [r4, #8]
+	adds	r3, r3, #52
+	lsls	r2, r2, #2
+	ubfx	r3, r3, #2, #14
+	add	r0, r0, r3, lsl #2
+	bl	ftl_memcpy
+.L1918:
+	ldr	r5, .L1935+4
+	movs	r7, #0
+	movw	fp, #65535
 	movs	r0, #0
-	.loc 1 2412 0
-	str	r3, [r2, #4]
-	.loc 1 2413 0
-	ldr	r3, .L2033+12
-	ldr	r3, [r3]
-	str	r3, [r2, #88]
-	.loc 1 2414 0
-	ldr	r3, .L2033+16
-	ldr	r3, [r3]
-	str	r3, [r2, #92]
-	.loc 1 2415 0
-	ldr	r3, .L2033+20
-	ldr	r3, [r3]
-	str	r3, [r2, #8]
-	.loc 1 2416 0
-	ldr	r3, .L2033+24
-	ldr	r3, [r3]
-	str	r3, [r2, #12]
-	.loc 1 2417 0
-	ldr	r3, .L2033+28
-	ldr	r3, [r3]
-	str	r3, [r2, #16]
-	.loc 1 2418 0
-	ldr	r3, .L2033+32
-	ldr	r3, [r3]
-	str	r3, [r2, #20]
-	.loc 1 2419 0
-	ldr	r3, .L2033+36
-	ldr	r3, [r3]
-	str	r3, [r2, #28]
-	.loc 1 2420 0
-	ldr	r3, .L2033+40
-	ldr	r3, [r3]
-	str	r3, [r2, #32]
-	.loc 1 2421 0
-	ldr	r3, .L2033+44
-	ldr	r3, [r3]
-	str	r3, [r2, #36]
-	.loc 1 2422 0
-	ldr	r3, .L2033+48
-	ldr	r3, [r3]
-	str	r3, [r2, #40]
-	.loc 1 2423 0
-	ldr	r3, .L2033+52
-	ldr	r3, [r3]
-	str	r3, [r2, #44]
-	.loc 1 2424 0
-	ldr	r3, .L2033+56
-	ldr	r3, [r3]
-	str	r3, [r2, #48]
-	.loc 1 2425 0
-	ldr	r3, .L2033+60
-	ldr	r3, [r3]
-	str	r3, [r2, #60]
-	.loc 1 2426 0
-	ldr	r3, .L2033+64
-	ldr	r3, [r3]
-	str	r3, [r2, #64]
-	.loc 1 2427 0
-	b	FtlVendorPartWrite
-.LVL2263:
-.L2031:
-	bx	lr
-.L2034:
-	.align	2
-.L2033:
-	.word	.LANCHOR135
-	.word	1179929683
-	.word	1342177352
-	.word	.LANCHOR216
-	.word	.LANCHOR217
-	.word	.LANCHOR158
-	.word	.LANCHOR159
-	.word	.LANCHOR163
-	.word	.LANCHOR162
-	.word	.LANCHOR165
-	.word	.LANCHOR79
-	.word	.LANCHOR160
-	.word	.LANCHOR161
-	.word	.LANCHOR166
-	.word	.LANCHOR167
-	.word	.LANCHOR155
-	.word	.LANCHOR154
-.LBE481:
-.LBE480:
-	.cfi_endproc
-.LFE377:
-	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
-	.section	.text.FtlEctTblFlush,"ax",%progbits
-	.align	1
-	.global	FtlEctTblFlush
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlEctTblFlush, %function
-FtlEctTblFlush:
-.LFB357:
-	.loc 1 988 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2264:
-	push	{r3, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 3, -8
-	.cfi_offset 14, -4
-	.loc 1 990 0
-	ldr	r3, .L2042
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L2040
-	.loc 1 990 0 is_stmt 0 discriminator 1
-	ldr	r3, .L2042+4
+	bl	FtlUpdateVaildLpn
+	mov	r10, r5
+.L1919:
+	ldr	r3, [r8]
+	ldrh	r2, [r5]
+	ldr	r0, .L1935+12
+	str	r3, [r4, #8]
+	ldr	r3, [sp, #4]
 	ldr	r3, [r3]
-	cmp	r3, #29
-	.loc 1 991 0 is_stmt 1 discriminator 1
-	ite	hi
-	movhi	r3, #32
-	movls	r3, #4
-.L2036:
-.LVL2265:
-	.loc 1 992 0
-	ldr	r1, .L2042+8
-	ldrh	r2, [r1]
-	cmp	r2, #31
-	.loc 1 993 0
-	ittt	ls
-	addls	r2, r2, #1
-	.loc 1 994 0
-	movls	r3, #1
-.LVL2266:
-	.loc 1 993 0
-	strhls	r2, [r1]	@ movhi
-.LVL2267:
-	ldr	r2, .L2042+12
-	.loc 1 996 0
-	cbnz	r0, .L2038
-	.loc 1 996 0 is_stmt 0 discriminator 1
-	ldr	r1, [r2]
-	ldr	r0, [r1, #20]
-.LVL2268:
-	ldr	r1, [r1, #16]
-	add	r3, r3, r0
-.LVL2269:
-	cmp	r1, r3
-	bcc	.L2039
-.L2038:
-	.loc 1 998 0 is_stmt 1
+	str	r3, [r4, #12]
+	ldrh	r3, [r5, #2]
+	orr	r3, r3, r2, lsl #10
+	str	r3, [r4, #4]
+	movs	r3, #1
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+	ldr	r3, .L1935+88
+	ldrh	r2, [r5, #2]
+	ldrh	r3, [r3]
+	subs	r3, r3, #1
+	cmp	r2, r3
+	blt	.L1920
+	ldrh	r3, [r5]
+	ldrh	fp, [r5, #4]
+	strh	r3, [r5, #4]	@ movhi
+	movs	r3, #0
+	strh	r3, [r5, #2]	@ movhi
+	bl	FtlFreeSysBlkQueueOut
+	ldr	r2, .L1935+44
+	strh	r0, [r5]	@ movhi
 	ldr	r3, [r2]
-	.loc 1 1003 0
-	movs	r0, #64
-	.loc 1 998 0
-	ldr	r1, [r3, #16]
-	str	r1, [r3, #20]
-	.loc 1 999 0
-	ldr	r1, .L2042+16
-	str	r1, [r3]
-	.loc 1 1000 0
-	ldr	r3, .L2042+20
-	ldr	r2, [r2]
-	ldrh	r1, [r3]
-	lsls	r3, r1, #9
-	str	r3, [r2, #12]
-	.loc 1 1001 0
-	ldr	r3, [r2, #8]
+	adds	r1, r3, #1
+	str	r3, [r5, #8]
+	str	r1, [r2]
+	lsls	r2, r0, #10
+	str	r2, [r4, #4]
+	str	r3, [r6, #4]
+	movs	r3, #1
+	strh	r0, [r6, #2]	@ movhi
+	mov	r2, r3
+	mov	r1, r3
+	ldr	r0, .L1935+12
+	bl	FlashProgPages
+.L1920:
+	ldrh	r3, [r10, #2]
+	ldr	r2, [r4]
 	adds	r3, r3, #1
-	str	r3, [r2, #8]
-	.loc 1 1002 0
-	movs	r3, #0
-	str	r3, [r2, #4]
-	.loc 1 1003 0
-	bl	FtlVendorPartWrite
-.LVL2270:
-	.loc 1 1004 0
-	bl	Ftl_save_ext_data
-.LVL2271:
-.L2039:
-	.loc 1 1006 0
+	uxth	r3, r3
+	adds	r1, r2, #1
+	strh	r3, [r10, #2]	@ movhi
+	bne	.L1921
+	cmp	r3, #1
+	bne	.L1922
+	ldr	r1, .L1935+92
+	movw	r2, #1219
+	ldr	r0, .L1935+96
+	bl	printf
+	ldr	r1, .L1935+100
+	ldr	r0, .L1935+104
+	bl	printf
+.L1922:
+	ldrh	r3, [r10, #2]
+	adds	r7, r7, #1
+	uxth	r7, r7
+	cmp	r3, #1
+	itttt	eq
+	ldreq	r3, .L1935+88
+	ldrheq	r3, [r3]
+	addeq	r3, r3, #-1
+	strheq	r3, [r10, #2]	@ movhi
+	cmp	r7, #3
+	bls	.L1919
+	mov	r2, r7
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1935+108
+	bl	printf
+	ldr	r2, [sp]
+	movs	r3, #1
+	str	r3, [r2]
+.L1917:
 	movs	r0, #0
-	pop	{r3, pc}
-.LVL2272:
-.L2040:
-	.loc 1 989 0
-	movs	r3, #32
-	b	.L2036
-.L2043:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1921:
+	cmp	r3, #1
+	beq	.L1919
+	cmp	r2, #256
+	beq	.L1919
+	movw	r3, #65535
+	cmp	fp, r3
+	beq	.L1917
+	movs	r1, #1
+	mov	r0, fp
+	bl	FtlFreeSysBlkQueueIn
+	b	.L1917
+.L1936:
 	.align	2
-.L2042:
-	.word	.LANCHOR28
-	.word	.LANCHOR167
-	.word	.LANCHOR218
+.L1935:
+	.word	.LANCHOR77
+	.word	.LANCHOR209
 	.word	.LANCHOR188
-	.word	1112818501
-	.word	.LANCHOR187
-	.cfi_endproc
-.LFE357:
-	.size	FtlEctTblFlush, .-FtlEctTblFlush
-	.section	.text.allocate_new_data_superblock,"ax",%progbits
+	.word	.LANCHOR202
+	.word	.LANCHOR81
+	.word	.LANCHOR45
+	.word	1179929683
+	.word	.LANCHOR92
+	.word	.LANCHOR93
+	.word	.LANCHOR94
+	.word	.LANCHOR167
+	.word	.LANCHOR159
+	.word	.LANCHOR160
+	.word	.LANCHOR113
+	.word	.LANCHOR114
+	.word	.LANCHOR58
+	.word	.LANCHOR40
+	.word	.LANCHOR84
+	.word	.LANCHOR0
+	.word	.LANCHOR70
+	.word	.LANCHOR67
+	.word	.LANCHOR131
+	.word	.LANCHOR54
+	.word	.LANCHOR210
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LC38
+	.word	.LANCHOR183
+	.word	1342177353
+	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
+	.section	.text.FtlSuperblockPowerLostFix,"ax",%progbits
 	.align	1
-	.global	allocate_new_data_superblock
+	.global	FtlSuperblockPowerLostFix
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	allocate_new_data_superblock, %function
-allocate_new_data_superblock:
-.LFB387:
-	.loc 1 2979 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
+	.type	FtlSuperblockPowerLostFix, %function
+FtlSuperblockPowerLostFix:
+	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2273:
-	.loc 1 2982 0
-	ldr	r3, .L2071
-	.loc 1 2979 0
-	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 1 2979 0
+	ldr	r3, .L1952
+	push	{r4, r5, r6, r7, r8, r10, lr}
 	mov	r4, r0
-	.loc 1 2980 0
-	ldrh	r5, [r0]
-.LVL2274:
-	.loc 1 2982 0
-	ldrh	r3, [r3]
-	cmp	r3, r5
-	bcs	.L2045
-	.loc 1 2982 0 is_stmt 0 discriminator 1
-	ldr	r1, .L2071+4
-	movw	r2, #2982
-	ldr	r0, .L2071+8
-.LVL2275:
-	bl	printf
-.LVL2276:
-	ldr	r1, .L2071+12
-	ldr	r0, .L2071+16
-	bl	printf
-.LVL2277:
-.L2045:
-	.loc 1 2983 0 is_stmt 1
-	ldr	r3, .L2071+20
-	ldr	r3, [r3]
+	sub	sp, sp, #44
+	ldr	r8, [r3]
+	cmp	r8, #0
+	bne	.L1937
+	ldr	r3, .L1952+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L2046
-	.loc 1 2985 0
-	movw	r3, #65535
-	cmp	r5, r3
-	beq	.L2047
-	.loc 1 2986 0
-	ldr	r3, .L2071+24
-	.loc 1 2987 0
-	mov	r0, r5
-	.loc 1 2986 0
+	beq	.L1948
+	ldrb	r3, [r0, #8]	@ zero_extendqisi2
+	cmp	r3, #1
+	bne	.L1948
+	ldrh	r6, [r0, #4]
+	mov	r8, r3
+.L1939:
+	mov	r3, #-1
+	ldr	r2, .L1952+8
+	str	r3, [sp, #20]
+	movs	r7, #0
+	ldr	r3, .L1952+12
+	ldr	r5, [r2]
+	mvn	r2, #2
+	ldr	r10, .L1952+24
 	ldr	r3, [r3]
-	ldrh	r3, [r3, r5, lsl #1]
-	cbz	r3, .L2048
-	.loc 1 2987 0
-	bl	INSERT_DATA_LIST
-.LVL2278:
-.L2047:
-	.loc 1 2991 0
+	str	r5, [sp, #16]
+	str	r3, [sp, #12]
+	str	r2, [r5, #8]
+	mvn	r2, #1
+	str	r2, [r5, #12]
+	ldrh	r2, [r4]
+	strh	r7, [r5]	@ movhi
+	strh	r2, [r5, #2]	@ movhi
+	movw	r2, #61589
+	str	r2, [r3]
+	add	r2, r2, #304087040
+	add	r2, r2, #1269760
+	addw	r2, r2, #1507
+	str	r2, [r3, #4]
+.L1940:
+	adds	r6, r6, #-1
+	bcc	.L1943
+	ldrh	r3, [r4, #4]
+	cbnz	r3, .L1941
+.L1943:
+	ldr	r3, .L1952+16
+	ldrh	r1, [r4]
+	ldrh	r0, [r4, #4]
+	ldr	r2, [r3]
+	ldrh	r3, [r2, r1, lsl #1]
+	subs	r3, r3, r0
+	strh	r3, [r2, r1, lsl #1]	@ movhi
+	ldr	r3, .L1952+20
+	ldrh	r3, [r3]
+	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
-	strb	r3, [r4, #8]
-	.loc 1 2993 0
-	ldr	r3, .L2071+28
-	cmp	r4, r3
-	beq	.L2049
-	.loc 1 2993 0 is_stmt 0 discriminator 1
-	ldr	r3, .L2071+32
-	ldrh	r2, [r3]
-	cmp	r2, #1
-	beq	.L2049
-	.loc 1 2993 0 discriminator 2
-	ldr	r3, .L2071+36
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2050
-.L2049:
-	.loc 1 2994 0 is_stmt 1
-	movs	r3, #1
-	strb	r3, [r4, #8]
-.L2051:
-	.loc 1 3005 0
-	ldr	r6, .L2071+40
-	movw	r2, #65535
-	ldrh	r0, [r6]
-	cmp	r0, r2
-	beq	.L2056
-	.loc 1 3009 0
-	cmp	r5, r0
-	bne	.L2057
-	.loc 1 3009 0 is_stmt 0 discriminator 1
-	ldr	r3, .L2071+24
-	ldr	r3, [r3]
-	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L2058
-.L2057:
-	.loc 1 3010 0 is_stmt 1
-	bl	update_vpc_list
-.LVL2279:
-.L2058:
-	.loc 1 3011 0
-	movw	r3, #65535
-	strh	r3, [r6]	@ movhi
-.L2056:
-	.loc 1 3013 0
+	strb	r3, [r4, #6]
+	strh	r3, [r4, #4]	@ movhi
+.L1937:
+	add	sp, sp, #44
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.L1948:
+	movs	r6, #12
+	b	.L1939
+.L1941:
 	mov	r0, r4
-	bl	allocate_data_superblock
-.LVL2280:
-	.loc 1 3014 0
-	bl	l2p_flush
-.LVL2281:
-	.loc 1 3015 0
-	movs	r0, #0
-	bl	FtlEctTblFlush
-.LVL2282:
-	.loc 1 3016 0
-	bl	FtlVpcTblFlush
-.LVL2283:
-.L2046:
-	.loc 1 3018 0
-	movs	r0, #0
-	pop	{r4, r5, r6, pc}
-.LVL2284:
-.L2048:
-	.loc 1 2989 0
-	bl	INSERT_FREE_LIST
-.LVL2285:
-	b	.L2047
-.L2050:
-	.loc 1 2995 0
-	ldr	r3, .L2071+44
-	cmp	r4, r3
-	bne	.L2051
-	.loc 1 2996 0
-	cmp	r2, #3
-	beq	.L2053
-	.loc 1 2996 0 is_stmt 0 discriminator 1
-	ldr	r2, .L2071+48
-	ldr	r2, [r2]
-	cmp	r2, #1
-	bne	.L2054
-.L2053:
-	.loc 1 2997 0 is_stmt 1
-	movs	r2, #1
-	strb	r2, [r3, #8]
-.L2054:
-	.loc 1 2998 0
-	ldr	r2, .L2071+52
-	ldr	r2, [r2]
-	cmp	r2, #0
-	beq	.L2051
-	.loc 1 2998 0 is_stmt 0 discriminator 1
-	ldr	r2, .L2071+56
-	ldr	r2, [r2]
-	cmp	r2, #29
-	.loc 1 2999 0 is_stmt 1 discriminator 1
-	itt	ls
-	movls	r2, #1
-	strbls	r2, [r3, #8]
-	b	.L2051
-.L2072:
+	bl	get_new_active_ppa
+	str	r0, [sp, #8]
+	adds	r0, r0, #1
+	beq	.L1943
+	ldr	r3, [r10]
+	movs	r1, #1
+	add	r0, sp, #4
+	str	r3, [r5, #4]
+	adds	r3, r3, #1
+	adds	r2, r3, #1
+	mov	r2, r8
+	it	eq
+	moveq	r3, r7
+	str	r3, [r10]
+	movs	r3, #0
+	bl	FlashProgPages
+	ldrh	r0, [r4]
+	bl	decrement_vpc_count
+	b	.L1940
+.L1953:
 	.align	2
-.L2071:
-	.word	.LANCHOR39
-	.word	.LANCHOR219
-	.word	.LC6
-	.word	.LC7
-	.word	.LC8
-	.word	.LANCHOR76
-	.word	.LANCHOR83
-	.word	.LANCHOR92
-	.word	.LANCHOR43
+.L1952:
+	.word	.LANCHOR77
 	.word	.LANCHOR8
-	.word	.LANCHOR130
-	.word	.LANCHOR91
-	.word	.LANCHOR155
-	.word	.LANCHOR28
-	.word	.LANCHOR167
-	.cfi_endproc
-.LFE387:
-	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
-	.section	.text.FtlProgPages,"ax",%progbits
+	.word	.LANCHOR188
+	.word	.LANCHOR183
+	.word	.LANCHOR84
+	.word	.LANCHOR53
+	.word	.LANCHOR160
+	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
+	.section	.text.FtlLoadFactoryBbt,"ax",%progbits
 	.align	1
-	.global	FtlProgPages
+	.global	FtlLoadFactoryBbt
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlProgPages, %function
-FtlProgPages:
-.LFB306:
-	.loc 4 1531 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 16
+	.type	FtlLoadFactoryBbt, %function
+FtlLoadFactoryBbt:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2286:
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 48
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 4 1531 0
-	mov	r4, r3
-	.loc 4 1539 0
-	ldr	r3, .L2092
-.LVL2287:
-	.loc 4 1531 0
-	mov	r5, r0
-	mov	r8, r1
-	.loc 4 1539 0
-	ldrb	r6, [r3]	@ zero_extendqisi2
-	cbz	r6, .L2074
-	.loc 4 1539 0 is_stmt 0 discriminator 1
-	ldrb	r6, [r4, #8]	@ zero_extendqisi2
-	subs	r3, r6, #1
-	rsbs	r6, r3, #0
-	adcs	r6, r6, r3
-.L2074:
-.LVL2288:
-	.loc 4 1548 0 is_stmt 1 discriminator 6
-	ldr	r10, .L2092+32
-	.loc 4 1544 0 discriminator 6
-	movs	r7, #0
-	.loc 4 1542 0 discriminator 6
-	ldrb	r3, [r4, #9]	@ zero_extendqisi2
-	mov	r2, r6
-.LVL2289:
-	mov	r1, r8
-.LVL2290:
-	mov	r0, r5
-.LVL2291:
-	bl	FlashProgPages
-.LVL2292:
-.L2075:
-	.loc 4 1544 0 discriminator 1
-	cmp	r7, r8
-	beq	.L2084
-	.loc 4 1549 0
-	ldr	fp, .L2092+36
-	b	.L2085
-.L2078:
-	.loc 4 1546 0
-	ldr	r0, [r5, #4]
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-.LVL2293:
-	.loc 4 1547 0
-	ldrh	r3, [r4]
-	cmp	r3, r0
-	bne	.L2076
-	.loc 4 1548 0
-	ldr	r1, [r10]
-	ldrh	r0, [r4, #4]
-.LVL2294:
-	ldrh	r2, [r1, r3, lsl #1]
-	subs	r2, r2, r0
-	strh	r2, [r1, r3, lsl #1]	@ movhi
-	.loc 4 1549 0
-	ldrh	r3, [fp]
-	strh	r3, [r4, #2]	@ movhi
-	.loc 4 1550 0
-	movs	r3, #0
-	strb	r3, [r4, #6]
-	.loc 4 1551 0
-	strh	r3, [r4, #4]	@ movhi
-.L2076:
-	.loc 4 1553 0
-	ldrh	r3, [r4, #4]
-	cbnz	r3, .L2077
-	.loc 4 1554 0
-	mov	r0, r4
-	bl	allocate_new_data_superblock
-.LVL2295:
-.L2077:
-	.loc 4 1557 0
-	ldr	r2, .L2092+4
-	ldr	r3, [r2, #96]
-	adds	r3, r3, #1
-	str	r3, [r2, #96]
-	.loc 4 1558 0
-	ldr	r0, [r5, #4]
-	ubfx	r0, r0, #10, #16
-	bl	FtlGcMarkBadPhyBlk
-.LVL2296:
-	.loc 4 1559 0
-	mov	r0, r4
-	bl	get_new_active_ppa
-.LVL2297:
-	.loc 4 1561 0
-	mov	r2, r6
-	.loc 4 1560 0
-	str	r0, [r5, #4]
-	.loc 4 1559 0
-	str	r0, [sp, #12]
-	.loc 4 1561 0
-	movs	r1, #1
-	ldrb	r3, [r4, #9]	@ zero_extendqisi2
-	mov	r0, r5
-	bl	FlashProgPages
-.LVL2298:
-.L2085:
-	.loc 4 1545 0
-	ldr	r3, [r5]
-	adds	r3, r3, #1
-	beq	.L2078
-	.loc 4 1564 0
-	ldr	r3, .L2092+8
-	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+	ldr	r3, .L1964
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r6, #0
+	ldr	r5, .L1964+4
+	ldr	r3, [r3]
+	ldr	r7, .L1964+8
+	ldr	r10, .L1964+20
+	str	r3, [r5, #8]
+	ldr	r3, .L1964+12
+	ldr	r8, [r3]
+	str	r8, [r5, #12]
+.L1955:
+	ldr	r3, .L1964+16
 	ldrh	r3, [r3]
-	cmp	r2, r3
-	bcc	.L2079
-	.loc 4 1564 0 is_stmt 0 discriminator 1
-	ldr	r1, .L2092+12
-	movw	r2, #1564
-	ldr	r0, .L2092+16
-	bl	printf
-.LVL2299:
-	ldr	r1, .L2092+20
-	ldr	r0, .L2092+24
-	bl	printf
-.LVL2300:
-.L2079:
-	.loc 4 1565 0 is_stmt 1
-	ldr	r3, [r5, #4]
-	.loc 4 1566 0
-	cbnz	r6, .L2080
-.L2091:
-	.loc 4 1568 0
+	cmp	r6, r3
+	bcc	.L1960
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1960:
+	ldrh	r4, [r10]
+	movw	r3, #65535
+	ldr	fp, .L1964+4
+	strh	r3, [r7, #2]!	@ movhi
+	subs	r4, r4, #1
+	uxth	r4, r4
+.L1956:
+	ldrh	r3, [r10]
+	sub	r2, r3, #15
+	cmp	r2, r4
+	bgt	.L1958
+	mla	r3, r6, r3, r4
 	movs	r2, #1
-	add	r1, sp, #12
-	ldr	r0, [r5, #16]
-	.loc 4 1567 0
-	str	r3, [sp, #12]
-	.loc 4 1568 0
-	bl	log2phys
-.LVL2301:
-	.loc 4 1570 0
-	ldr	r3, [r5, #12]
-	ldr	r3, [r3, #12]
-.LVL2302:
-	.loc 4 1572 0
-	ubfx	r0, r3, #10, #16
-	str	r3, [sp, #4]
-	bl	P2V_block_in_plane
-.LVL2303:
-	.loc 4 1573 0
-	ldr	r3, [sp, #4]
-	.loc 4 1572 0
-	mov	fp, r0
-.LVL2304:
-	.loc 4 1573 0
-	adds	r3, r3, #1
-	beq	.L2082
-	.loc 4 1575 0
-	ldr	r3, [r10]
-	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L2083
-	.loc 4 1576 0
-	mov	r1, r0
-	ldr	r0, .L2092+28
-.LVL2305:
-	bl	printf
-.LVL2306:
-.L2083:
-	.loc 4 1577 0
+	mov	r1, r2
 	mov	r0, fp
-	bl	decrement_vpc_count
-.LVL2307:
-.L2082:
-	.loc 4 1544 0 discriminator 2
-	adds	r7, r7, #1
-.LVL2308:
-	adds	r5, r5, #36
-	b	.L2075
-.LVL2309:
-.L2080:
-	.loc 4 1567 0
-	orr	r3, r3, #-2147483648
-	b	.L2091
-.L2084:
-	.loc 4 1581 0
-	ldr	r3, .L2092+8
-	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-	ldrh	r3, [r3]
+	lsls	r3, r3, #10
+	str	r3, [r5, #4]
+	bl	FlashReadPages
+	ldr	r3, [r5]
+	adds	r3, r3, #1
+	beq	.L1957
+	ldrh	r2, [r8]
+	movw	r3, #61664
 	cmp	r2, r3
-	bcc	.L2073
-	.loc 4 1581 0 is_stmt 0 discriminator 1
-	ldr	r1, .L2092+12
-	movw	r2, #1581
-	ldr	r0, .L2092+16
-	bl	printf
-.LVL2310:
-	ldr	r1, .L2092+20
-	ldr	r0, .L2092+24
-	bl	printf
-.LVL2311:
-.L2073:
-	.loc 4 1582 0 is_stmt 1
-	add	sp, sp, #16
-	.cfi_def_cfa_offset 32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL2312:
-.L2093:
+	bne	.L1957
+	strh	r4, [r7]	@ movhi
+.L1958:
+	adds	r6, r6, #1
+	b	.L1955
+.L1957:
+	subs	r4, r4, #1
+	uxth	r4, r4
+	b	.L1956
+.L1965:
 	.align	2
-.L2092:
-	.word	.LANCHOR8
-	.word	.LANCHOR135
-	.word	.LANCHOR37
-	.word	.LANCHOR220
-	.word	.LC6
-	.word	.LC7
-	.word	.LC8
-	.word	.LC41
-	.word	.LANCHOR83
-	.word	.LANCHOR52
-	.cfi_endproc
-.LFE306:
-	.size	FtlProgPages, .-FtlProgPages
-	.section	.text.FtlCacheWriteBack,"ax",%progbits
+.L1964:
+	.word	.LANCHOR183
+	.word	.LANCHOR202
+	.word	.LANCHOR75+10
+	.word	.LANCHOR188
+	.word	.LANCHOR45
+	.word	.LANCHOR51
+	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
+	.section	.text.FtlGetLastWrittenPage,"ax",%progbits
 	.align	1
-	.global	FtlCacheWriteBack
+	.global	FtlGetLastWrittenPage
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlCacheWriteBack, %function
-FtlCacheWriteBack:
-.LFB307:
-	.loc 4 1585 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
+	.type	FtlGetLastWrittenPage, %function
+FtlGetLastWrittenPage:
+	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 4, -8
-	.cfi_offset 14, -4
-	.loc 4 1586 0
-	ldr	r4, .L2099
-	ldr	r0, [r4]
-	cbz	r0, .L2095
-	.loc 4 1587 0
-	ldr	r3, .L2099+4
-	movs	r2, #0
+	cmp	r1, #1
+	push	{r4, r5, r6, r7, r8, lr}
+	it	eq
+	ldreq	r3, .L1978
+	sub	sp, sp, #104
+	lsl	r7, r0, #10
+	mov	r2, r1
+	it	ne
+	ldrne	r3, .L1978+4
+	mov	r8, r1
+	movs	r6, #0
 	movs	r1, #1
-	ldr	r3, [r3]
-	bl	FtlProgPages
-.LVL2313:
-	.loc 4 1588 0
-	movs	r3, #0
-	str	r3, [r4]
-.L2095:
-	.loc 4 1591 0
-	movs	r0, #0
-	pop	{r4, pc}
-.L2100:
+	add	r0, sp, #4
+	ldrh	r5, [r3]
+	add	r3, sp, #40
+	str	r3, [sp, #16]
+	str	r6, [sp, #12]
+	subs	r5, r5, #1
+	sxth	r5, r5
+	orr	r3, r5, r7
+	str	r3, [sp, #8]
+	bl	FlashReadPages
+	ldr	r3, [sp, #40]
+	adds	r3, r3, #1
+	bne	.L1969
+.L1970:
+	cmp	r6, r5
+	ble	.L1973
+.L1969:
+	mov	r0, r5
+	add	sp, sp, #104
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1973:
+	adds	r3, r6, r5
+	mov	r2, r8
+	add	r3, r3, r3, lsr #31
+	movs	r1, #1
+	add	r0, sp, #4
+	asrs	r4, r3, #1
+	sxth	r3, r4
+	orrs	r3, r3, r7
+	str	r3, [sp, #8]
+	bl	FlashReadPages
+	ldr	r3, [sp, #40]
+	adds	r3, r3, #1
+	bne	.L1971
+	ldr	r3, [sp, #44]
+	adds	r3, r3, #1
+	bne	.L1971
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #1
+	beq	.L1971
+	subs	r4, r4, #1
+	sxth	r5, r4
+	b	.L1970
+.L1971:
+	adds	r4, r4, #1
+	sxth	r6, r4
+	b	.L1970
+.L1979:
 	.align	2
-.L2099:
-	.word	.LANCHOR129
-	.word	.LANCHOR221
-	.cfi_endproc
-.LFE307:
-	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
-	.section	.text.ftl_discard,"ax",%progbits
+.L1978:
+	.word	.LANCHOR54
+	.word	.LANCHOR53
+	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
+	.section	.text.FtlLoadBbt,"ax",%progbits
 	.align	1
-	.global	ftl_discard
+	.global	FtlLoadBbt
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_discard, %function
-ftl_discard:
-.LFB309:
-	.loc 4 1779 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 8
+	.type	FtlLoadBbt, %function
+FtlLoadBbt:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2314:
-	.loc 4 1786 0
-	ldr	r3, .L2116
-	.loc 4 1779 0
-	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -24
-	.cfi_offset 5, -20
-	.cfi_offset 6, -16
-	.cfi_offset 7, -12
-	.cfi_offset 8, -8
-	.cfi_offset 14, -4
-	.loc 4 1779 0
-	mov	r5, r2
-	.loc 4 1786 0
-	adds	r2, r1, r2
-.LVL2315:
-	.loc 4 1779 0
-	mov	r6, r1
-	.loc 4 1786 0
-	ldr	r3, [r3]
-	cmp	r2, r3
-	bhi	.L2109
-	.loc 4 1789 0
-	cmp	r5, #31
-	bhi	.L2103
-.LVL2316:
-.L2108:
-	.loc 4 1790 0
-	movs	r0, #0
-.L2101:
-	.loc 4 1823 0
-	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, pc}
-.LVL2317:
-.L2103:
-	.cfi_restore_state
-	.loc 4 1794 0
-	ldr	r8, .L2116+12
-	.loc 4 1792 0
-	bl	FtlCacheWriteBack
-.LVL2318:
-	.loc 4 1794 0
-	mov	r0, r6
-	ldrh	r4, [r8]
-	mov	r1, r4
-	bl	__aeabi_uidiv
-.LVL2319:
-	.loc 4 1795 0
-	smulbb	r3, r0, r4
-	.loc 4 1794 0
-	mov	r7, r0
-.LVL2320:
-	.loc 4 1795 0
-	subs	r6, r6, r3
-.LVL2321:
-	uxth	r6, r6
-.LVL2322:
-	.loc 4 1796 0
-	cbz	r6, .L2104
-.LVL2323:
-	.loc 4 1797 0
-	subs	r4, r4, r6
-.LVL2324:
-	.loc 4 1798 0
-	adds	r7, r7, #1
-.LVL2325:
-	.loc 4 1797 0
-	cmp	r4, r5
-	it	cs
-	movcs	r4, r5
-	uxth	r4, r4
-	.loc 4 1799 0
-	subs	r5, r5, r4
-.LVL2326:
-.L2104:
-	.loc 4 1806 0
-	ldr	r4, .L2116+4
-	.loc 4 1802 0
-	mov	r3, #-1
-	.loc 4 1807 0
-	ldr	r6, .L2116+8
-.LVL2327:
-	.loc 4 1802 0
-	str	r3, [sp, #4]
-.L2105:
-	.loc 4 1803 0
-	ldrh	r3, [r8]
-	cmp	r5, r3
-	bcs	.L2107
-	.loc 4 1816 0
-	ldr	r3, .L2116+4
-	ldr	r2, [r3]
-	cmp	r2, #32
-	bls	.L2108
-	.loc 4 1818 0
-	movs	r4, #0
-	str	r4, [r3]
-	.loc 4 1819 0
-	bl	l2p_flush
-.LVL2328:
-	.loc 4 1820 0
-	bl	FtlVpcTblFlush
-.LVL2329:
-	b	.L2108
-.L2107:
-	.loc 4 1804 0
-	movs	r2, #0
-	mov	r1, sp
-	mov	r0, r7
-	bl	log2phys
-.LVL2330:
-	.loc 4 1805 0
-	ldr	r3, [sp]
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	ldr	r8, .L2009+48
+	ldr	r4, .L2009
+	ldr	r3, [r8]
+	ldr	r7, .L2009+4
+	mov	r10, r4
+	str	r3, [r4, #8]
+	ldr	r3, .L2009+8
+	ldr	r6, [r3]
+	str	r6, [r4, #12]
+	bl	FtlBbtMemInit
+	ldrh	r5, [r7]
+	subs	r5, r5, #1
+	uxth	r5, r5
+.L1981:
+	ldrh	r3, [r7]
+	subs	r3, r3, #47
+	cmp	r3, r5
+	bgt	.L1984
+	lsls	r3, r5, #10
+	movs	r2, #1
+	mov	r1, r2
+	mov	r0, r10
+	str	r3, [r4, #4]
+	bl	FlashReadPages
+	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L2106
-	.loc 4 1806 0
+	bne	.L1982
+	ldr	r3, [r4, #4]
+	movs	r2, #1
+	mov	r1, r2
+	mov	r0, r10
+	adds	r3, r3, #1
+	str	r3, [r4, #4]
+	bl	FlashReadPages
+.L1982:
 	ldr	r3, [r4]
-	.loc 4 1808 0
+	adds	r3, r3, #1
+	beq	.L1983
+	ldrh	r2, [r6]
+	movw	r3, #61649
+	cmp	r2, r3
+	bne	.L1983
+	ldr	r3, .L2009+12
+	ldr	r2, [r6, #4]
+	strh	r5, [r3]	@ movhi
+	str	r2, [r3, #8]
+	ldrh	r2, [r6, #8]
+	strh	r2, [r3, #4]	@ movhi
+.L1984:
+	ldr	r5, .L2009+12
+	movw	r2, #65535
+	ldrh	r3, [r5]
+	cmp	r3, r2
+	beq	.L1998
+	ldrh	r3, [r5, #4]
+	cmp	r3, r2
+	beq	.L1988
+	lsls	r3, r3, #10
 	movs	r2, #1
-	add	r1, sp, #4
-	mov	r0, r7
-	.loc 4 1806 0
+	mov	r1, r2
+	ldr	r0, .L2009
+	str	r3, [r4, #4]
+	bl	FlashReadPages
+	ldr	r3, [r4]
 	adds	r3, r3, #1
-	str	r3, [r4]
-	.loc 4 1807 0
-	ldr	r3, [r6]
+	beq	.L1988
+	ldrh	r2, [r6]
+	movw	r3, #61649
+	cmp	r2, r3
+	bne	.L1988
+	ldr	r3, [r6, #4]
+	ldr	r2, [r5, #8]
+	cmp	r3, r2
+	bls	.L1988
+	ldrh	r2, [r5, #4]
+	str	r3, [r5, #8]
+	ldrh	r3, [r6, #8]
+	strh	r2, [r5]	@ movhi
+	strh	r3, [r5, #4]	@ movhi
+.L1988:
+	ldr	r10, .L2009
+	movs	r1, #1
+	ldrh	r0, [r5]
+	bl	FtlGetLastWrittenPage
+	sxth	r7, r0
+	adds	r0, r0, #1
+	strh	r0, [r5, #2]	@ movhi
+.L1990:
+	cmp	r7, #0
+	bge	.L1993
+	ldr	r1, .L2009+16
+	mov	r2, #336
+	ldr	r0, .L2009+20
+	bl	printf
+	ldr	r1, .L2009+24
+	ldr	r0, .L2009+28
+	bl	printf
+.L1992:
+	ldrh	r3, [r6, #10]
+	ldrh	r0, [r6, #12]
+	strh	r3, [r5, #6]	@ movhi
+	movw	r3, #65535
+	cmp	r0, r3
+	beq	.L1995
+	ldr	r3, .L2009+32
+	ldr	r2, [r3]
+	cmp	r0, r2
+	beq	.L1995
+	ldr	r3, .L2009+36
+	ldrh	r3, [r3]
+	lsrs	r3, r3, #2
+	cmp	r2, r3
+	bcs	.L1995
+	cmp	r0, r3
+	bcs	.L1995
+	bl	FtlSysBlkNumInit
+.L1995:
+	ldr	r6, .L2009+40
+	movs	r5, #0
+	ldr	r7, .L2009+44
+	ldr	r8, .L2009+52
+.L1996:
+	ldrh	r3, [r7]
+	cmp	r5, r3
+	bcc	.L1997
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L1983:
+	subs	r5, r5, #1
+	uxth	r5, r5
+	b	.L1981
+.L1993:
+	ldrh	r3, [r5]
+	movs	r2, #1
+	mov	r1, r2
+	mov	r0, r10
+	orr	r3, r7, r3, lsl #10
+	str	r3, [r4, #4]
+	ldr	r3, [r8]
+	str	r3, [r4, #8]
+	bl	FlashReadPages
+	ldr	r3, [r4]
 	adds	r3, r3, #1
-	str	r3, [r6]
-	.loc 4 1808 0
-	bl	log2phys
-.LVL2331:
-	.loc 4 1809 0
-	ldr	r0, [sp]
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-.LVL2332:
-	.loc 4 1810 0
-	bl	decrement_vpc_count
-.LVL2333:
-.L2106:
-	.loc 4 1813 0
-	ldrh	r3, [r8]
-	.loc 4 1812 0
-	adds	r7, r7, #1
-.LVL2334:
-	.loc 4 1813 0
-	subs	r5, r5, r3
-.LVL2335:
-	b	.L2105
-.LVL2336:
-.L2109:
-	.loc 4 1787 0
+	beq	.L1991
+	ldrh	r2, [r6]
+	movw	r3, #61649
+	cmp	r2, r3
+	beq	.L1992
+.L1991:
+	subs	r7, r7, #1
+	sxth	r7, r7
+	b	.L1990
+.L1997:
+	ldrh	r2, [r8]
+	ldr	r1, [r4, #8]
+	ldr	r0, [r6, #4]!
+	lsls	r2, r2, #2
+	mla	r1, r5, r2, r1
+	adds	r5, r5, #1
+	bl	ftl_memcpy
+	b	.L1996
+.L1998:
 	mov	r0, #-1
-.LVL2337:
-	b	.L2101
-.L2117:
-	.align	2
-.L2116:
-	.word	.LANCHOR68
-	.word	.LANCHOR222
-	.word	.LANCHOR160
-	.word	.LANCHOR55
-	.cfi_endproc
-.LFE309:
-	.size	ftl_discard, .-ftl_discard
-	.section	.text.FtlSysFlush,"ax",%progbits
-	.align	1
-	.global	FtlSysFlush
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlSysFlush, %function
-FtlSysFlush:
-.LFB303:
-	.loc 4 1003 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 3, -8
-	.cfi_offset 14, -4
-	.loc 4 1004 0
-	ldr	r3, .L2120
-	ldr	r3, [r3]
-	cbnz	r3, .L2119
-.LBB484:
-.LBB485:
-	.loc 4 1007 0
-	bl	FtlCacheWriteBack
-.LVL2338:
-	.loc 4 1008 0
-	bl	l2p_flush
-.LVL2339:
-	.loc 4 1009 0
-	movs	r0, #1
-	bl	FtlEctTblFlush
-.LVL2340:
-	.loc 4 1010 0
-	bl	FtlVpcTblFlush
-.LVL2341:
-.L2119:
-.LBE485:
-.LBE484:
-	.loc 4 1012 0
-	movs	r0, #0
-	pop	{r3, pc}
-.L2121:
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L2010:
 	.align	2
-.L2120:
-	.word	.LANCHOR76
-	.cfi_endproc
-.LFE303:
-	.size	FtlSysFlush, .-FtlSysFlush
-	.section	.text.FtlDeInit,"ax",%progbits
+.L2009:
+	.word	.LANCHOR202
+	.word	.LANCHOR51
+	.word	.LANCHOR188
+	.word	.LANCHOR75
+	.word	.LANCHOR211
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LANCHOR37
+	.word	.LANCHOR41
+	.word	.LANCHOR75+24
+	.word	.LANCHOR45
+	.word	.LANCHOR183
+	.word	.LANCHOR123
+	.size	FtlLoadBbt, .-FtlLoadBbt
+	.section	.text.ftl_map_blk_gc,"ax",%progbits
 	.align	1
-	.global	FtlDeInit
+	.global	ftl_map_blk_gc
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlDeInit, %function
-FtlDeInit:
-.LFB304:
-	.loc 4 1015 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
+	.type	ftl_map_blk_gc, %function
+ftl_map_blk_gc:
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 3, -8
-	.cfi_offset 14, -4
-	.loc 4 1016 0
-	ldr	r3, .L2124
-	ldr	r3, [r3]
-	cmp	r3, #1
-	bne	.L2123
-	.loc 4 1017 0
-	bl	FtlSysFlush
-.LVL2342:
-.L2123:
-	.loc 4 1019 0
-	movs	r0, #0
-	pop	{r3, pc}
-.L2125:
-	.align	2
-.L2124:
-	.word	.LANCHOR223
-	.cfi_endproc
-.LFE304:
-	.size	FtlDeInit, .-FtlDeInit
-	.section	.text.rk_ftl_de_init,"ax",%progbits
-	.align	1
-	.global	rk_ftl_de_init
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	rk_ftl_de_init, %function
-rk_ftl_de_init:
-.LFB494:
-	.loc 7 121 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 3, -8
-	.cfi_offset 14, -4
-.LBB486:
-.LBB487:
-	.loc 7 117 0
-	bl	FlashDeInit
-.LVL2343:
-.LBE487:
-.LBE486:
-	.loc 7 123 0
-	bl	FtlDeInit
-.LVL2344:
-	.loc 7 125 0
-	pop	{r3, lr}
-	.cfi_restore 14
-	.cfi_restore 3
-	.cfi_def_cfa_offset 0
-.LBB488:
-.LBB489:
-	.loc 7 117 0
-	b	FlashDeInit
-.LVL2345:
-.LBE489:
-.LBE488:
-	.cfi_endproc
-.LFE494:
-	.size	rk_ftl_de_init, .-rk_ftl_de_init
-	.section	.text.FtlVendorPartRead,"ax",%progbits
-	.align	1
-	.global	FtlVendorPartRead
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlVendorPartRead, %function
-FtlVendorPartRead:
-.LFB356:
-	.loc 1 947 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 56
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2346:
-	.loc 1 955 0
-	ldr	r3, .L2137
-	.loc 1 947 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	mov	r10, r2
-	.loc 1 955 0
-	adds	r2, r0, r1
-.LVL2347:
-	.loc 1 947 0
-	sub	sp, sp, #56
-	.cfi_def_cfa_offset 88
-	.loc 1 947 0
-	mov	r7, r0
-	mov	r6, r1
-	.loc 1 955 0
-	ldrh	r3, [r3]
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r0
+	ldr	r3, [r0, #24]
+	ldr	r5, [r0, #12]
+	str	r3, [sp, #8]
+	bl	ftl_free_no_use_map_blk
+	ldrh	ip, [r4, #10]
+	ldrh	r2, [r4, #8]
+	ldrh	r1, [r4, #40]
+	sub	r3, ip, #4
+	ldr	r6, .L2032
 	cmp	r2, r3
-	bhi	.L2136
-	.loc 1 952 0
-	ldr	r3, .L2137+4
-	mov	r8, #0
-	.loc 1 965 0
-	ldr	fp, .L2137+28
-	.loc 1 952 0
-	ldrh	r5, [r3]
-	lsr	r5, r0, r5
-	lsls	r3, r5, #2
-	str	r3, [sp]
-.LVL2348:
-.L2129:
-	.loc 1 957 0
-	cbnz	r6, .L2135
-.LVL2349:
-.L2127:
-	.loc 1 984 0
-	mov	r0, r8
-	add	sp, sp, #56
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL2350:
-.L2135:
-	.cfi_restore_state
-	.loc 1 958 0
-	ldr	r3, .L2137+8
-	.loc 1 959 0
+	bge	.L2012
+	movw	r3, #65535
+	cmp	r1, r3
+	beq	.L2014
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r6]
+	cmp	r2, r3
+	bcc	.L2015
+.L2012:
+	movw	r3, #65535
+	uxth	r0, r0
+	cmp	r1, r3
+	beq	.L2016
+	ldrh	r3, [r4, #2]
+	ldrh	r2, [r6]
+	cmp	r2, r3
+	bls	.L2017
+.L2016:
+	ldrh	r3, [r5, r0, lsl #1]
+	lsls	r2, r0, #1
+	str	r3, [sp, #4]
+	cbz	r3, .L2014
+	ldr	r3, [r4, #32]
+	cbnz	r3, .L2014
+	movs	r1, #1
+	str	r1, [r4, #32]
+	strh	r3, [r5, r2]	@ movhi
+	ldrh	r3, [r4, #8]
+	ldrh	r2, [r4, #2]
+	subs	r3, r3, #1
+	strh	r3, [r4, #8]	@ movhi
+	ldrh	r3, [r6]
+	cmp	r2, r3
+	bcc	.L2022
+	mov	r0, r4
+	bl	ftl_map_blk_alloc_new_blk
+.L2022:
+	ldr	r5, .L2032+4
+	movs	r7, #0
+.L2023:
+	ldrh	r3, [r4, #6]
+	uxth	fp, r7
+	cmp	r3, fp
+	bhi	.L2028
+	movs	r1, #1
+	ldr	r0, [sp, #4]
+	bl	FtlFreeSysBlkQueueIn
+	movs	r3, #0
+	str	r3, [r4, #32]
+.L2014:
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r6]
+	cmp	r2, r3
+	bcc	.L2015
+	mov	r0, r4
+	bl	ftl_map_blk_alloc_new_blk
+	b	.L2015
+.L2020:
+	ldrh	r8, [r5, r2, lsl #1]
+	add	lr, r2, #1
+	cmp	r8, r1
+	beq	.L2018
+	mov	r2, lr
+.L2019:
+	uxth	r7, r2
+	cmp	r7, ip
+	bcc	.L2020
+	mov	r7, r0
+.L2018:
+	uxth	r2, r2
+	ldr	r0, .L2032+8
+	ldrh	r2, [r5, r2, lsl #1]
+	bl	printf
+	movw	r3, #65535
 	mov	r0, r7
-	.loc 1 958 0
-	ldr	r2, [sp]
-	ldr	r3, [r3]
-	ldr	r3, [r3, r2]
-	.loc 1 959 0
-	ldr	r2, .L2137+12
-	.loc 1 958 0
-	str	r3, [sp, #8]
-.LVL2351:
-	.loc 1 959 0
-	ldrh	r4, [r2]
-	mov	r1, r4
-	bl	__aeabi_uidivmod
-.LVL2352:
-	.loc 1 960 0
-	subs	r4, r4, r1
-	.loc 1 961 0
+	strh	r3, [r4, #40]	@ movhi
+	b	.L2016
+.L2017:
+	movs	r2, #0
+	b	.L2019
+.L2028:
 	ldr	r3, [sp, #8]
-	.loc 1 960 0
-	uxth	r4, r4
-	.loc 1 959 0
-	str	r1, [sp, #4]
-.LVL2353:
-	.loc 1 961 0
-	cmp	r6, r4
-	.loc 1 962 0
-	it	cc
-	uxthcc	r4, r6
-.LVL2354:
-	lsls	r2, r4, #9
-	str	r2, [sp, #8]
-.LVL2355:
-	.loc 1 963 0
-	cmp	r3, #0
-	beq	.L2131
-	.loc 1 965 0
-	ldr	r2, [fp]
-	.loc 1 967 0
-	add	r0, sp, #20
-	.loc 1 964 0
-	str	r3, [sp, #24]
+	uxth	r10, r7
+	add	r3, r3, r10, lsl #2
 	str	r3, [sp, #12]
-	.loc 1 965 0
-	str	r2, [sp, #28]
-	.loc 1 966 0
-	movs	r2, #0
-	str	r2, [sp, #32]
-	.loc 1 967 0
+	ldr	r3, [sp, #8]
+	ldr	r2, [r3, r10, lsl #2]
+	ldr	r3, [sp, #4]
+	cmp	r3, r2, lsr #10
+	bne	.L2024
+	ldr	r3, .L2032+12
+	str	r2, [r5, #4]
 	movs	r2, #1
+	ldr	r0, .L2032+4
+	ldr	r1, [r3]
+	str	r1, [r5, #8]
+	ldr	r1, .L2032+16
+	ldr	r8, [r1]
 	mov	r1, r2
+	str	r8, [r5, #12]
 	bl	FlashReadPages
-.LVL2356:
-	.loc 1 968 0
-	ldr	r2, [sp, #20]
-	.loc 1 970 0
-	ldr	r3, [sp, #12]
-	.loc 1 969 0
+	ldrh	r2, [r8, #8]
+	cmp	r2, fp
+	beq	.L2025
+	ldr	r1, .L2032+20
+	mov	r2, #672
+	ldr	r0, .L2032+24
+	bl	printf
+	ldr	r1, .L2032+28
+	ldr	r0, .L2032+32
+	bl	printf
+.L2025:
+	ldr	r2, [r5]
 	adds	r2, r2, #1
-	.loc 1 970 0
-	ldr	r2, .L2137+16
-	.loc 1 969 0
-	it	eq
-	moveq	r8, #-1
-.LVL2357:
-	.loc 1 970 0
-	ldr	r2, [r2]
-	cmp	r2, #256
-	bne	.L2133
-	.loc 1 971 0
-	mov	r2, r3
-	mov	r1, r5
-	ldr	r0, .L2137+20
+	ldrh	r2, [r8, #8]
+	bne	.L2026
+.L2027:
+	ldr	r1, [sp, #12]
+	movs	r3, #0
+	ldr	r0, .L2032+36
+	str	r3, [r1]
+	ldr	r1, [r5, #4]
 	bl	printf
-.LVL2358:
-	.loc 1 972 0
-	ldr	r2, [fp]
-	mov	r1, r5
-	ldr	r0, .L2137+24
+	ldr	r3, .L2032+40
+	movs	r2, #1
+	str	r2, [r3]
+.L2015:
+	movs	r0, #0
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2026:
+	cmp	r2, fp
+	bne	.L2027
+	ldrh	r0, [r8]
+	ldrh	r1, [r4, #4]
+	cmp	r0, r1
+	bne	.L2027
+	ldr	r2, [r5, #8]
+	mov	r1, r10
+	mov	r0, r4
 	bl	FtlMapWritePage
-.LVL2359:
-.L2133:
-	.loc 1 974 0
-	ldr	r1, [fp]
-	lsls	r2, r4, #9
-	ldr	r3, [sp, #4]
-	mov	r0, r10
-	add	r1, r1, r3, lsl #9
-	bl	ftl_memcpy
-.LVL2360:
-.L2134:
-	.loc 1 981 0
-	ldr	r3, [sp, #8]
-	.loc 1 978 0
-	adds	r5, r5, #1
-.LVL2361:
-	.loc 1 979 0
-	subs	r6, r6, r4
-.LVL2362:
-	.loc 1 980 0
-	add	r7, r7, r4
-.LVL2363:
-	.loc 1 981 0
-	add	r10, r10, r3
-.LVL2364:
-	ldr	r3, [sp]
-	adds	r3, r3, #4
-	str	r3, [sp]
-	b	.L2129
-.LVL2365:
-.L2131:
-	.loc 1 976 0
-	lsls	r2, r4, #9
-	mov	r1, r3
-	mov	r0, r10
-	bl	ftl_memset
-.LVL2366:
-	b	.L2134
-.LVL2367:
-.L2136:
-	.loc 1 956 0
-	mov	r8, #-1
-	b	.L2127
-.L2138:
+.L2024:
+	adds	r7, r7, #1
+	b	.L2023
+.L2033:
 	.align	2
-.L2137:
-	.word	.LANCHOR49
-	.word	.LANCHOR56
-	.word	.LANCHOR191
-	.word	.LANCHOR55
-	.word	.LANCHOR199
-	.word	.LC42
-	.word	.LANCHOR215
-	.word	.LANCHOR182
-	.cfi_endproc
-.LFE356:
-	.size	FtlVendorPartRead, .-FtlVendorPartRead
-	.section	.text.FtlLoadEctTbl,"ax",%progbits
+.L2032:
+	.word	.LANCHOR54
+	.word	.LANCHOR202
+	.word	.LC39
+	.word	.LANCHOR184
+	.word	.LANCHOR188
+	.word	.LANCHOR212
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LC40
+	.word	.LANCHOR77
+	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
+	.section	.text.Ftl_write_map_blk_to_last_page,"ax",%progbits
 	.align	1
-	.global	FtlLoadEctTbl
+	.global	Ftl_write_map_blk_to_last_page
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlLoadEctTbl, %function
-FtlLoadEctTbl:
-.LFB362:
-	.loc 1 1489 0
-	.cfi_startproc
+	.type	Ftl_write_map_blk_to_last_page, %function
+Ftl_write_map_blk_to_last_page:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 1 1490 0
-	movs	r0, #64
-	ldr	r4, .L2141
-	ldr	r5, .L2141+4
-	ldr	r2, [r4]
-	ldrh	r1, [r5]
-	bl	FtlVendorPartRead
-.LVL2368:
-	.loc 1 1491 0
-	ldr	r3, [r4]
-	ldr	r2, [r3]
-	ldr	r3, .L2141+8
-	cmp	r2, r3
-	beq	.L2140
-.LBB492:
-.LBB493:
-	.loc 1 1493 0
-	ldr	r1, .L2141+12
-	ldr	r0, .L2141+16
+	ldr	r3, .L2044
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r4, r0
+	ldr	r5, [r3]
+	cbnz	r5, .L2035
+	ldrh	r3, [r0]
+	movw	r2, #65535
+	ldr	r6, [r0, #12]
+	cmp	r3, r2
+	bne	.L2036
+	ldrh	r3, [r0, #8]
+	cbz	r3, .L2037
+	ldr	r1, .L2044+4
+	mov	r2, #708
+	ldr	r0, .L2044+8
 	bl	printf
-.LVL2369:
-	.loc 1 1494 0
-	ldrh	r2, [r5]
-	movs	r1, #0
-	ldr	r0, [r4]
-	lsls	r2, r2, #9
-	bl	ftl_memset
-.LVL2370:
-.L2140:
-.LBE493:
-.LBE492:
-	.loc 1 1499 0
+	ldr	r1, .L2044+12
+	ldr	r0, .L2044+16
+	bl	printf
+.L2037:
+	ldrh	r3, [r4, #8]
+	adds	r3, r3, #1
+	strh	r3, [r4, #8]	@ movhi
+	bl	FtlFreeSysBlkQueueOut
+	movs	r3, #0
+	strh	r0, [r6]	@ movhi
+	strh	r3, [r4, #2]	@ movhi
+	strh	r3, [r4]	@ movhi
+	ldr	r3, [r4, #28]
+	adds	r3, r3, #1
+	str	r3, [r4, #28]
+.L2035:
 	movs	r0, #0
-	pop	{r3, r4, r5, pc}
-.L2142:
-	.align	2
-.L2141:
-	.word	.LANCHOR188
-	.word	.LANCHOR187
-	.word	1112818501
-	.word	.LC43
-	.word	.LC8
-	.cfi_endproc
-.LFE362:
-	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
-	.section	.text.Ftl_load_ext_data,"ax",%progbits
+	pop	{r4, r5, r6, r7, r8, pc}
+.L2036:
+	ldrh	r6, [r6, r3, lsl #1]
+	movs	r1, #255
+	ldrh	r3, [r0, #2]
+	ldr	r2, .L2044+20
+	ldr	r8, .L2044+32
+	ldr	r7, [r0, #24]
+	orr	r3, r3, r6, lsl #10
+	ldr	r0, [r8]
+	str	r3, [r2, #4]
+	ldr	r3, .L2044+24
+	str	r0, [r2, #8]
+	ldr	r3, [r3]
+	str	r3, [r2, #12]
+	ldr	r2, [r4, #28]
+	str	r2, [r3, #4]
+	movw	r2, #64245
+	strh	r2, [r3, #8]	@ movhi
+	ldrh	r2, [r4, #4]
+	strh	r6, [r3, #2]	@ movhi
+	strh	r2, [r3]	@ movhi
+	ldr	r3, .L2044+28
+	ldrh	r2, [r3]
+	lsls	r2, r2, #3
+	bl	ftl_memset
+	ldrh	ip, [r4, #6]
+	mov	r3, r5
+	ldr	r1, [r8]
+	mov	r2, r5
+.L2038:
+	uxth	r0, r3
+	cmp	ip, r0
+	bhi	.L2040
+	movs	r2, #1
+	movs	r3, #0
+	mov	r1, r2
+	ldr	r0, .L2044+20
+	bl	FlashProgPages
+	ldrh	r3, [r4, #2]
+	mov	r0, r4
+	adds	r3, r3, #1
+	strh	r3, [r4, #2]	@ movhi
+	bl	ftl_map_blk_gc
+	b	.L2035
+.L2040:
+	ldr	r0, [r7, r3, lsl #2]
+	cmp	r6, r0, lsr #10
+	bne	.L2039
+	adds	r2, r2, #1
+	uxth	r2, r2
+	str	r3, [r1, r2, lsl #3]
+	add	r5, r1, r2, lsl #3
+	ldr	r0, [r7, r3, lsl #2]
+	str	r0, [r5, #4]
+.L2039:
+	adds	r3, r3, #1
+	b	.L2038
+.L2045:
+	.align	2
+.L2044:
+	.word	.LANCHOR77
+	.word	.LANCHOR213
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LANCHOR202
+	.word	.LANCHOR188
+	.word	.LANCHOR54
+	.word	.LANCHOR183
+	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
+	.section	.text.FtlMapWritePage,"ax",%progbits
 	.align	1
-	.global	Ftl_load_ext_data
+	.global	FtlMapWritePage
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	Ftl_load_ext_data, %function
-Ftl_load_ext_data:
-.LFB378:
-	.loc 1 2432 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
+	.type	FtlMapWritePage, %function
+FtlMapWritePage:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 1 2433 0
-	movs	r1, #1
-	ldr	r4, .L2147
-	movs	r0, #0
-	.loc 1 2434 0
-	ldr	r5, .L2147+4
-	.loc 1 2433 0
-	mov	r2, r4
-	bl	FtlVendorPartRead
-.LVL2371:
-	.loc 1 2434 0
-	ldr	r3, [r4]
-	cmp	r3, r5
-	beq	.L2144
-	.loc 1 2435 0
-	mov	r2, #512
-	movs	r1, #0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r0
+	ldr	r10, .L2069+36
+	mov	r8, r1
+	movs	r6, #0
+	str	r2, [sp]
+.L2047:
+	ldr	r2, .L2069
+	ldr	r3, [r2]
+	adds	r3, r3, #1
+	str	r3, [r2]
+	ldrh	r3, [r10]
+	ldrh	r2, [r4, #2]
+	subs	r3, r3, #1
+	cmp	r2, r3
+	bge	.L2048
+	ldrh	r2, [r4]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L2049
+.L2048:
 	mov	r0, r4
-	bl	ftl_memset
-.LVL2372:
-	.loc 1 2436 0
-	str	r5, [r4]
-.L2144:
-	.loc 1 2439 0
-	ldr	r3, [r4]
-	cmp	r3, r5
-	ldr	r5, .L2147+8
-	bne	.L2145
-	.loc 1 2440 0
-	ldr	r2, [r4, #88]
-	ldr	r3, .L2147+12
-	str	r2, [r3]
-	.loc 1 2441 0
-	ldr	r2, [r4, #92]
-	ldr	r3, .L2147+16
-	str	r2, [r3]
-	.loc 1 2442 0
-	ldr	r2, [r4, #8]
-	ldr	r3, .L2147+20
-	str	r2, [r3]
-	.loc 1 2443 0
-	ldr	r2, [r4, #12]
-	ldr	r3, .L2147+24
-	str	r2, [r3]
-	.loc 1 2444 0
-	ldr	r2, [r4, #16]
-	ldr	r3, .L2147+28
-	str	r2, [r3]
-	.loc 1 2445 0
-	ldr	r2, [r4, #20]
-	ldr	r3, .L2147+32
-	str	r2, [r3]
-	.loc 1 2446 0
-	ldr	r3, [r4, #28]
-	.loc 1 2447 0
-	ldr	r2, [r4, #32]
-	.loc 1 2446 0
-	str	r3, [r5]
-	.loc 1 2447 0
-	ldr	r3, .L2147+36
-	str	r2, [r3]
-	.loc 1 2448 0
-	ldr	r2, [r4, #36]
-	ldr	r3, .L2147+40
-	str	r2, [r3]
-	.loc 1 2449 0
-	ldr	r2, [r4, #40]
-	ldr	r3, .L2147+44
-	str	r2, [r3]
-	.loc 1 2450 0
-	ldr	r2, [r4, #44]
-	ldr	r3, .L2147+48
-	str	r2, [r3]
-	.loc 1 2451 0
-	ldr	r2, [r4, #48]
-	ldr	r3, .L2147+52
-	str	r2, [r3]
-	.loc 1 2452 0
-	ldr	r2, [r4, #60]
-	ldr	r3, .L2147+56
-	str	r2, [r3]
-.L2145:
-	.loc 1 2462 0
-	ldr	r3, .L2147+60
-	movs	r2, #0
-	str	r2, [r3]
-	.loc 1 2472 0
-	ldr	r2, [r4, #68]
-	ldr	r3, .L2147+64
+	bl	Ftl_write_map_blk_to_last_page
+.L2049:
+	ldr	r3, .L2069+4
+	ldr	r2, [r3]
+	str	r3, [sp, #4]
+	cmp	r2, #0
+	bne	.L2064
+	ldrh	r2, [r4]
+	ldr	r3, [r4, #12]
+	ldrh	r3, [r3, r2, lsl #1]
+	cbnz	r3, .L2051
+	ldr	r1, .L2069+8
+	mov	r2, #768
+	ldr	r0, .L2069+12
+	bl	printf
+	ldr	r1, .L2069+16
+	ldr	r0, .L2069+20
+	bl	printf
+.L2051:
+	ldrh	r2, [r4]
+	ldrh	r3, [r4, #10]
 	cmp	r2, r3
-	bne	.L2146
-	.loc 1 2473 0
-	ldr	r3, .L2147+68
-	movs	r2, #1
-	.loc 1 2474 0
-	ldr	r1, .L2147+72
-	ldr	r0, .L2147+76
-	.loc 1 2473 0
-	str	r2, [r3]
-	.loc 1 2474 0
+	bcc	.L2052
+	ldr	r1, .L2069+8
+	movw	r2, #769
+	ldr	r0, .L2069+12
 	bl	printf
-.LVL2373:
-.L2146:
-	.loc 1 2479 0
-	ldr	r3, .L2147+80
-	ldr	r1, .L2147+84
-	ldrh	r2, [r3]
-	ldr	r3, .L2147+88
-	ldrh	r1, [r1]
+	ldr	r1, .L2069+16
+	ldr	r0, .L2069+20
+	bl	printf
+.L2052:
+	ldrh	r2, [r4]
+	movs	r1, #0
+	ldr	r3, [r4, #12]
+	ldr	r5, .L2069+24
+	ldrh	r7, [r3, r2, lsl #1]
+	movs	r2, #16
+	ldrh	r3, [r4, #2]
+	mov	fp, r5
+	orr	r3, r3, r7, lsl #10
+	str	r3, [r5, #4]
+	ldr	r3, [sp]
+	str	r3, [r5, #8]
+	ldr	r3, .L2069+28
 	ldr	r0, [r3]
-	ldr	r3, [r5]
-	mla	r0, r0, r2, r3
-	bl	__aeabi_uidiv
-.LVL2374:
-	ldr	r3, .L2147+92
-	str	r0, [r3]
-	pop	{r3, r4, r5, pc}
-.L2148:
+	str	r0, [r5, #12]
+	bl	ftl_memset
+	ldr	r3, [r5, #12]
+	mov	r0, r5
+	ldr	r2, [r4, #28]
+	strh	r8, [r3, #8]	@ movhi
+	str	r2, [r3, #4]
+	ldrh	r2, [r4, #4]
+	strh	r7, [r3, #2]	@ movhi
+	strh	r2, [r3]	@ movhi
+	movs	r3, #1
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+	ldrh	r2, [r4, #2]
+	ldr	r1, [r5]
+	adds	r2, r2, #1
+	uxth	r2, r2
+	adds	r3, r1, #1
+	strh	r2, [r4, #2]	@ movhi
+	bne	.L2053
+	ldr	r1, [r5, #4]
+	adds	r6, r6, #1
+	ldr	r0, .L2069+32
+	uxth	r6, r6
+	bl	printf
+	ldrh	r2, [r4, #2]
+	cmp	r2, #2
+	itttt	ls
+	ldrls	r3, .L2069+36
+	ldrhls	r2, [r3]
+	addls	r2, r2, #-1
+	strhls	r2, [r4, #2]	@ movhi
+	cmp	r6, #3
+	bls	.L2047
+	mov	r2, r6
+	ldr	r1, [r5, #4]
+	ldr	r0, .L2069+40
+	bl	printf
+	ldr	r2, [sp, #4]
+	movs	r3, #1
+	str	r3, [r2]
+.L2064:
+	movs	r0, #0
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2053:
+	cbz	r1, .L2056
+	cmp	r2, #1
+	strh	r7, [r4, #40]	@ movhi
+	beq	.L2047
+	cmp	r1, #256
+.L2068:
+	beq	.L2047
+	ldr	r2, [fp, #4]
+	ldr	r3, [r4, #24]
+	str	r2, [r3, r8, lsl #2]
+	b	.L2064
+.L2056:
+	cmp	r2, #1
+	b	.L2068
+.L2070:
 	.align	2
-.L2147:
-	.word	.LANCHOR135
-	.word	1179929683
+.L2069:
 	.word	.LANCHOR165
-	.word	.LANCHOR216
-	.word	.LANCHOR217
-	.word	.LANCHOR158
-	.word	.LANCHOR159
-	.word	.LANCHOR163
-	.word	.LANCHOR162
-	.word	.LANCHOR79
-	.word	.LANCHOR160
-	.word	.LANCHOR161
-	.word	.LANCHOR166
-	.word	.LANCHOR167
-	.word	.LANCHOR155
-	.word	.LANCHOR154
-	.word	305432421
-	.word	.LANCHOR28
-	.word	.LC44
-	.word	.LC8
-	.word	.LANCHOR47
-	.word	.LANCHOR39
-	.word	.LANCHOR164
+	.word	.LANCHOR77
+	.word	.LANCHOR214
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
 	.word	.LANCHOR202
-	.cfi_endproc
-.LFE378:
-	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
-	.section	.text.FtlMapBlkWriteDumpData,"ax",%progbits
+	.word	.LANCHOR188
+	.word	.LC41
+	.word	.LANCHOR54
+	.word	.LC42
+	.size	FtlMapWritePage, .-FtlMapWritePage
+	.section	.text.flush_l2p_region,"ax",%progbits
 	.align	1
-	.global	FtlMapBlkWriteDumpData
+	.global	flush_l2p_region
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlMapBlkWriteDumpData, %function
-FtlMapBlkWriteDumpData:
-.LFB359:
-	.loc 1 1025 0
-	.cfi_startproc
+	.type	flush_l2p_region, %function
+flush_l2p_region:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2375:
-	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 3, -32
-	.cfi_offset 4, -28
-	.cfi_offset 5, -24
-	.cfi_offset 6, -20
-	.cfi_offset 7, -16
-	.cfi_offset 8, -12
-	.cfi_offset 10, -8
-	.cfi_offset 14, -4
-	.loc 1 1025 0
-	mov	r4, r0
-	.loc 1 1031 0
-	ldr	r3, [r0, #36]
-	cmp	r3, #0
-	beq	.L2149
-	.loc 1 1033 0
-	movs	r3, #0
-	.loc 1 1027 0
-	ldrh	r6, [r0, #6]
-	.loc 1 1033 0
-	str	r3, [r0, #36]
-	.loc 1 1034 0
-	ldr	r3, .L2163
-	.loc 1 1028 0
-	ldr	r10, [r0, #24]
-	.loc 1 1034 0
-	ldr	r3, [r3]
-	cmp	r3, #0
-	bne	.L2149
-	.loc 1 1036 0
-	ldr	r3, .L2163+4
-	ldr	r5, .L2163+8
-	ldr	r3, [r3]
-	mov	r7, r5
-	str	r3, [r5, #8]
-.LVL2376:
-	.loc 1 1037 0
-	ldr	r3, .L2163+12
-	ldr	r8, [r3]
-	str	r8, [r5, #12]
-	.loc 1 1040 0
-	ldrh	r3, [r0, #2]
-	cbz	r3, .L2153
-	.loc 1 1040 0 is_stmt 0 discriminator 1
-	ldr	r2, .L2163+16
-	ldrh	r2, [r2]
-	subs	r2, r2, #1
-	cmp	r3, r2
-	bge	.L2153
-	.loc 1 1040 0 discriminator 2
-	ldrh	r2, [r0]
-	movw	r1, #65535
-	cmp	r2, r1
-	beq	.L2153
-.LVL2377:
-.LBB494:
-	.loc 1 1044 0 is_stmt 1
-	ldr	r1, [r0, #12]
-	.loc 1 1046 0
-	subs	r3, r3, #1
-	.loc 1 1048 0
-	mov	r0, r5
-.LVL2378:
-	.loc 1 1044 0
-	ldrh	r2, [r1, r2, lsl #1]
-.LVL2379:
-	.loc 1 1046 0
-	orr	r3, r3, r2, lsl #10
-	.loc 1 1048 0
-	movs	r2, #1
-	mov	r1, r2
-	.loc 1 1046 0
-	str	r3, [r5, #4]
-.LVL2380:
-	.loc 1 1048 0
-	bl	FlashReadPages
-.LVL2381:
-	.loc 1 1050 0
+	push	{r3, r4, r5, lr}
+	movs	r4, #12
+	ldr	r5, .L2072
+	muls	r4, r0, r4
+	ldr	r0, .L2072+4
 	ldr	r3, [r5]
-	adds	r3, r3, #1
-	beq	.L2153
-	.loc 1 1050 0 is_stmt 0 discriminator 1
-	ldr	r3, [r4, #24]
-	ldrh	r1, [r8, #8]
-	ldr	r2, [r3, r1, lsl #2]
-	ldr	r3, [r5, #4]
+	adds	r2, r3, r4
+	ldrh	r1, [r3, r4]
+	ldr	r2, [r2, #8]
+	bl	FtlMapWritePage
+	ldr	r3, [r5]
+	movs	r0, #0
+	add	r4, r4, r3
+	ldr	r3, [r4, #4]
+	bic	r3, r3, #-2147483648
+	str	r3, [r4, #4]
+	pop	{r3, r4, r5, pc}
+.L2073:
+	.align	2
+.L2072:
+	.word	.LANCHOR97
+	.word	.LANCHOR127
+	.size	flush_l2p_region, .-flush_l2p_region
+	.section	.text.l2p_flush,"ax",%progbits
+	.align	1
+	.global	l2p_flush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	l2p_flush, %function
+l2p_flush:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	movs	r4, #0
+	ldr	r5, .L2078
+	ldr	r6, .L2078+4
+.L2075:
+	ldrh	r3, [r5]
+	uxth	r0, r4
+	cmp	r3, r0
+	bhi	.L2077
+	movs	r0, #0
+	pop	{r4, r5, r6, pc}
+.L2077:
+	ldr	r2, [r6]
+	uxth	r3, r4
+	movs	r1, #12
+	mla	r3, r1, r3, r2
+	ldr	r3, [r3, #4]
+	cmp	r3, #0
+	bge	.L2076
+	bl	flush_l2p_region
+.L2076:
+	adds	r4, r4, #1
+	b	.L2075
+.L2079:
+	.align	2
+.L2078:
+	.word	.LANCHOR68
+	.word	.LANCHOR97
+	.size	l2p_flush, .-l2p_flush
+	.section	.text.FtlVendorPartWrite,"ax",%progbits
+	.align	1
+	.global	FtlVendorPartWrite
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlVendorPartWrite, %function
+FtlVendorPartWrite:
+	@ args = 0, pretend = 0, frame = 56
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2092
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #56
+	str	r2, [sp]
+	adds	r2, r0, r1
+	mov	r7, r0
+	mov	r5, r1
+	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L2153
-	.loc 1 1053 0 is_stmt 1
-	ldr	r2, [r5, #8]
-.LVL2382:
-.L2162:
-.LBE494:
-	.loc 1 1070 0
-	mov	r0, r4
-	.loc 1 1072 0
-	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
-	.cfi_remember_state
-	.cfi_restore 14
-	.cfi_restore 10
-	.cfi_restore 8
-	.cfi_restore 7
-	.cfi_restore 6
-	.cfi_restore 5
-	.cfi_restore 4
-	.cfi_restore 3
-	.cfi_def_cfa_offset 0
-.LVL2383:
-	.loc 1 1070 0
-	b	FtlMapWritePage
-.LVL2384:
-.L2153:
-	.cfi_restore_state
-	.loc 1 1027 0
-	subs	r6, r6, #1
-	.loc 1 1059 0
-	uxth	r6, r6
-	ldr	r3, [r10, r6, lsl #2]
-.LVL2385:
-	.loc 1 1060 0
-	str	r3, [r7, #4]
-	.loc 1 1061 0
-	cbz	r3, .L2154
-	.loc 1 1063 0
+	bhi	.L2088
+	ldr	r3, .L2092+4
+	mov	r8, #0
+	ldrh	r6, [r3]
+	lsr	r6, r0, r6
+	lsl	fp, r6, #2
+.L2082:
+	cbnz	r5, .L2087
+.L2080:
+	mov	r0, r8
+	add	sp, sp, #56
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2087:
+	ldr	r3, .L2092+8
+	mov	r0, r7
+	ldr	r10, .L2092+24
+	ldr	r3, [r3]
+	ldr	r2, [r3, fp]
+	ldr	r3, .L2092+12
+	str	r2, [sp, #12]
+	ldrh	r3, [r3]
+	mov	r1, r3
+	str	r3, [sp, #8]
+	bl	__aeabi_uidivmod
+	ldr	r3, [sp, #8]
+	ldr	r2, [sp, #12]
+	str	r1, [sp, #4]
+	subs	r4, r3, r1
+	uxth	r4, r4
+	cmp	r5, r4
+	it	cc
+	uxthcc	r4, r5
+	cbz	r2, .L2084
+	cmp	r4, r3
+	beq	.L2084
+	ldr	r3, [r10]
+	add	r0, sp, #20
+	str	r2, [sp, #24]
 	movs	r2, #1
-	ldr	r0, .L2163+8
 	mov	r1, r2
+	str	r3, [sp, #28]
+	movs	r3, #0
+	str	r3, [sp, #32]
 	bl	FlashReadPages
-.LVL2386:
-.L2155:
-	.loc 1 1070 0
-	ldr	r2, [r7, #8]
+.L2085:
+	lsls	r3, r4, #9
+	ldr	r0, [r10]
+	subs	r5, r5, r4
+	mov	r2, r3
+	str	r3, [sp, #8]
+	ldm	sp, {r1, r3}
+	add	r7, r7, r4
+	add	fp, fp, #4
+	add	r0, r0, r3, lsl #9
+	bl	ftl_memcpy
+	ldr	r2, [r10]
 	mov	r1, r6
-	b	.L2162
-.LVL2387:
-.L2154:
-	.loc 1 1067 0
-	ldr	r3, .L2163+20
-.LVL2388:
-	movs	r1, #255
-	ldr	r0, [r7, #8]
+	ldr	r0, .L2092+16
+	adds	r6, r6, #1
+	bl	FtlMapWritePage
+	ldr	r3, [sp]
+	adds	r0, r0, #1
+	it	eq
+	moveq	r8, #-1
+	mov	r2, r3
+	ldr	r3, [sp, #8]
+	add	r2, r2, r3
+	str	r2, [sp]
+	b	.L2082
+.L2084:
+	ldr	r3, .L2092+20
+	movs	r1, #0
+	ldr	r0, [r10]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-.LVL2389:
-	b	.L2155
-.LVL2390:
-.L2149:
-	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L2164:
+	b	.L2085
+.L2088:
+	mov	r8, #-1
+	b	.L2080
+.L2093:
 	.align	2
-.L2163:
-	.word	.LANCHOR76
-	.word	.LANCHOR181
-	.word	.LANCHOR199
-	.word	.LANCHOR185
-	.word	.LANCHOR53
+.L2092:
+	.word	.LANCHOR50
 	.word	.LANCHOR57
-	.cfi_endproc
-.LFE359:
-	.size	FtlMapBlkWriteDumpData, .-FtlMapBlkWriteDumpData
-	.section	.text.FtlScanSysBlk,"ax",%progbits
+	.word	.LANCHOR194
+	.word	.LANCHOR56
+	.word	.LANCHOR215
+	.word	.LANCHOR58
+	.word	.LANCHOR185
+	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
+	.section	.text.Ftl_save_ext_data,"ax",%progbits
 	.align	1
-	.global	FtlScanSysBlk
+	.global	Ftl_save_ext_data
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlScanSysBlk, %function
-FtlScanSysBlk:
-.LFB361:
-	.loc 1 1235 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 24
+	.type	Ftl_save_ext_data, %function
+Ftl_save_ext_data:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 1 1241 0
-	movs	r4, #0
-	.loc 1 1243 0
-	ldr	r5, .L2248
-	.loc 1 1235 0
-	sub	sp, sp, #24
-	.cfi_def_cfa_offset 56
-	.loc 1 1243 0
-	mov	r1, r4
-	ldr	r3, .L2248+4
-	ldr	r2, [r5]
-	.loc 1 1242 0
-	ldr	r7, .L2248+8
-	.loc 1 1241 0
-	ldr	r6, .L2248+12
-	.loc 1 1243 0
-	ldr	r0, [r3]
-	lsls	r2, r2, #2
-	.loc 1 1242 0
-	strh	r4, [r7]	@ movhi
-	.loc 1 1241 0
-	strh	r4, [r6]	@ movhi
-	.loc 1 1243 0
-	bl	ftl_memset
-.LVL2391:
-	.loc 1 1244 0
-	ldr	r2, [r5]
-	mov	r1, r4
-	ldr	r5, .L2248+16
-	.loc 1 1245 0
-	ldr	r8, .L2248+88
-	.loc 1 1244 0
-	lsls	r2, r2, #1
-	ldr	r0, [r5]
-	bl	ftl_memset
-.LVL2392:
-	.loc 1 1245 0
-	ldrh	r2, [r8]
-	mov	r1, r4
-	ldr	r3, .L2248+20
-	lsls	r2, r2, #2
-	ldr	r0, [r3]
-	bl	ftl_memset
-.LVL2393:
-	.loc 1 1246 0
-	ldrh	r2, [r8]
-	mov	r1, r4
-	ldr	r3, .L2248+24
-	lsls	r2, r2, #1
-	ldr	r0, [r3]
-	bl	ftl_memset
-.LVL2394:
-	.loc 1 1247 0
-	movs	r2, #12
-	movs	r1, #255
-	ldr	r0, .L2248+28
-	bl	ftl_memset
-.LVL2395:
-	.loc 1 1249 0
-	ldr	r3, .L2248+32
-	str	r7, [sp, #12]
-	str	r5, [sp, #8]
-	ldrh	r3, [r3]
-	str	r3, [sp]
-.LVL2396:
-.L2166:
-	.loc 1 1249 0 is_stmt 0 discriminator 1
-	ldr	r3, .L2248+36
-	ldr	r2, [sp]
-	ldrh	r3, [r3]
-	cmp	r3, r2
-	bls	.L2208
-	.loc 1 1253 0 is_stmt 1 discriminator 1
-	ldr	r3, .L2248+40
-	.loc 1 1260 0 discriminator 1
-	movs	r4, #0
-	ldr	r1, .L2248+44
-	mov	r7, r4
-	.loc 1 1258 0 discriminator 1
-	mov	r8, #36
-	.loc 1 1253 0 discriminator 1
-	ldrh	fp, [r3]
-	.loc 1 1258 0 discriminator 1
-	ldr	r3, .L2248+48
-	.loc 1 1260 0 discriminator 1
-	ldr	r2, [r1]
-	ldr	r1, .L2248+52
-	.loc 1 1258 0 discriminator 1
-	ldr	r5, [r3]
-	.loc 1 1259 0 discriminator 1
-	ldr	r3, .L2248+56
-	.loc 1 1260 0 discriminator 1
-	ldrh	r10, [r1]
-	.loc 1 1259 0 discriminator 1
+	@ link register save eliminated.
+	ldr	r2, .L2096
+	ldr	r3, .L2096+4
+	ldr	r1, [r2]
+	cmp	r1, r3
+	bne	.L2094
+	ldr	r3, .L2096+8
+	movs	r1, #1
+	movs	r0, #0
+	str	r3, [r2, #4]
+	ldr	r3, .L2096+12
 	ldr	r3, [r3]
-	b	.L2209
-.LVL2397:
-.L2168:
-	str	r3, [sp, #16]
-	.loc 1 1255 0
-	ldr	r3, .L2248+60
-	ldr	r1, [sp]
-	str	r2, [sp, #20]
-	ldrb	r0, [r3, r4]	@ zero_extendqisi2
-	bl	V2P_block
-.LVL2398:
-	str	r0, [sp, #4]
-.LVL2399:
-	.loc 1 1256 0
-	bl	FtlBbmIsBadBlock
-.LVL2400:
-	ldr	r3, [sp, #16]
-	ldr	r2, [sp, #20]
-	cbnz	r0, .L2167
-	.loc 1 1258 0
-	ldr	r1, [sp, #4]
-	mla	r0, r8, r7, r5
-	lsls	r1, r1, #10
-	.loc 1 1259 0
-	str	r3, [r0, #8]
-	.loc 1 1258 0
-	str	r1, [r0, #4]
-	.loc 1 1260 0
-	mul	r1, r10, r7
-	.loc 1 1261 0
-	adds	r7, r7, #1
-.LVL2401:
-	uxth	r7, r7
-.LVL2402:
-	.loc 1 1260 0
-	bic	r1, r1, #3
-	add	r1, r1, r2
-	str	r1, [r0, #12]
-.L2167:
-.LVL2403:
-	adds	r4, r4, #1
-.LVL2404:
-.L2209:
-	.loc 1 1253 0 discriminator 1
-	uxth	r1, r4
-	cmp	fp, r1
-	bhi	.L2168
-	.loc 1 1264 0
-	cbnz	r7, .L2169
-.LVL2405:
-.L2207:
-	.loc 1 1249 0
-	ldr	r3, [sp]
+	str	r3, [r2, #88]
+	ldr	r3, .L2096+16
+	ldr	r3, [r3]
+	str	r3, [r2, #92]
+	ldr	r3, .L2096+20
+	ldr	r3, [r3]
+	str	r3, [r2, #8]
+	ldr	r3, .L2096+24
+	ldr	r3, [r3]
+	str	r3, [r2, #12]
+	ldr	r3, .L2096+28
+	ldr	r3, [r3]
+	str	r3, [r2, #16]
+	ldr	r3, .L2096+32
+	ldr	r3, [r3]
+	str	r3, [r2, #20]
+	ldr	r3, .L2096+36
+	ldr	r3, [r3]
+	str	r3, [r2, #28]
+	ldr	r3, .L2096+40
+	ldr	r3, [r3]
+	str	r3, [r2, #32]
+	ldr	r3, .L2096+44
+	ldr	r3, [r3]
+	str	r3, [r2, #36]
+	ldr	r3, .L2096+48
+	ldr	r3, [r3]
+	str	r3, [r2, #40]
+	ldr	r3, .L2096+52
+	ldr	r3, [r3]
+	str	r3, [r2, #44]
+	ldr	r3, .L2096+56
+	ldr	r3, [r3]
+	str	r3, [r2, #48]
+	ldr	r3, .L2096+60
+	ldr	r3, [r3]
+	str	r3, [r2, #60]
+	ldr	r3, .L2096+64
+	ldr	r3, [r3]
+	str	r3, [r2, #64]
+	b	FtlVendorPartWrite
+.L2094:
+	bx	lr
+.L2097:
+	.align	2
+.L2096:
+	.word	.LANCHOR138
+	.word	1179929683
+	.word	1342177353
+	.word	.LANCHOR216
+	.word	.LANCHOR217
+	.word	.LANCHOR161
+	.word	.LANCHOR162
+	.word	.LANCHOR166
+	.word	.LANCHOR165
+	.word	.LANCHOR168
+	.word	.LANCHOR80
+	.word	.LANCHOR163
+	.word	.LANCHOR164
+	.word	.LANCHOR169
+	.word	.LANCHOR170
+	.word	.LANCHOR158
+	.word	.LANCHOR157
+	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
+	.section	.text.FtlEctTblFlush,"ax",%progbits
+	.align	1
+	.global	FtlEctTblFlush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlEctTblFlush, %function
+FtlEctTblFlush:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	ldr	r3, .L2105
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L2103
+	ldr	r3, .L2105+4
+	ldr	r3, [r3]
+	cmp	r3, #39
+	ite	hi
+	movhi	r3, #32
+	movls	r3, #4
+.L2099:
+	ldr	r1, .L2105+8
+	ldrh	r2, [r1]
+	cmp	r2, #31
+	ittt	ls
+	addls	r2, r2, #1
+	movls	r3, #1
+	strhls	r2, [r1]	@ movhi
+	ldr	r2, .L2105+12
+	cbnz	r0, .L2101
+	ldr	r1, [r2]
+	ldr	r0, [r1, #20]
+	ldr	r1, [r1, #16]
+	add	r3, r3, r0
+	cmp	r1, r3
+	bcc	.L2102
+.L2101:
+	ldr	r2, [r2]
+	movs	r0, #64
+	ldr	r3, [r2, #16]
+	str	r3, [r2, #20]
+	ldr	r3, .L2105+16
+	str	r3, [r2]
+	ldr	r3, .L2105+20
+	ldrh	r1, [r3]
+	lsls	r3, r1, #9
+	str	r3, [r2, #12]
+	ldr	r3, [r2, #8]
 	adds	r3, r3, #1
-	uxth	r3, r3
-	str	r3, [sp]
-.LVL2406:
-	b	.L2166
-.LVL2407:
-.L2169:
-	.loc 1 1267 0
-	movs	r2, #1
-	mov	r1, r7
-	mov	r0, r5
-	bl	FlashReadPages
-.LVL2408:
-	.loc 1 1268 0
+	str	r3, [r2, #8]
 	movs	r3, #0
-.LVL2409:
-.L2246:
-	str	r3, [sp, #4]
-.LVL2410:
-	.loc 1 1268 0 is_stmt 0 discriminator 2
-	ldrh	r3, [sp, #4]
-	cmp	r7, r3
-	bls	.L2207
-	ldr	r3, [sp, #4]
-	mov	r8, #36
-	.loc 1 1269 0 is_stmt 1
-	ldr	fp, .L2248+48
-	mul	r8, r8, r3
-	ldr	r3, [fp]
-	add	r2, r3, r8
-	.loc 1 1272 0
-	ldr	r3, [r3, r8]
-	.loc 1 1269 0
-	ldr	r4, [r2, #4]
-	.loc 1 1270 0
-	ldr	r5, [r2, #12]
-	.loc 1 1272 0
-	adds	r3, r3, #1
-	.loc 1 1269 0
-	ubfx	r4, r4, #10, #16
-.LVL2411:
-	.loc 1 1272 0
-	bne	.L2173
-	mov	r10, #16
-	.loc 1 1274 0
-	mov	r3, fp
-.L2175:
-.LVL2412:
-	ldr	r0, [r3]
-	str	r3, [sp, #16]
-	add	r0, r0, r8
-	ldr	r2, [r0, #4]
-	adds	r2, r2, #1
-	str	r2, [r0, #4]
-	.loc 1 1275 0
-	movs	r2, #1
-	mov	r1, r2
-	bl	FlashReadPages
-.LVL2413:
-	.loc 1 1276 0
-	ldrh	r1, [r5]
-	movw	r2, #65535
-	ldr	r3, [sp, #16]
-	cmp	r1, r2
-	bne	.L2172
-	.loc 1 1277 0
-	ldr	r3, [fp]
-	mov	r2, #-1
-	str	r2, [r3, r8]
-	.loc 1 1285 0
-	ldr	r3, [fp]
-	ldr	r3, [r3, r8]
-	cmp	r3, r2
-	beq	.L2174
-.LVL2414:
-.L2173:
-	.loc 1 1287 0
-	ldr	r3, .L2248+64
-	ldr	r2, [r3]
-	ldr	r3, [r5, #4]
-	adds	r1, r2, #1
-	beq	.L2176
-	.loc 1 1287 0 is_stmt 0 discriminator 1
-	cmp	r2, r3
-	bhi	.L2177
-.L2176:
-	.loc 1 1289 0 is_stmt 1
-	adds	r2, r3, #1
-	.loc 1 1292 0
-	ittt	ne
-	ldrne	r1, .L2248+64
-	addne	r2, r3, #1
-	strne	r2, [r1]
-.L2177:
-	.loc 1 1297 0
-	ldrh	r2, [r5]
-	movw	r1, #61604
-	cmp	r2, r1
-	beq	.L2179
-	bhi	.L2180
-	movw	r3, #61574
-	cmp	r2, r3
-	beq	.L2181
-.LVL2415:
-.L2178:
-	ldr	r3, [sp, #4]
-	adds	r3, r3, #1
-	b	.L2246
-.LVL2416:
-.L2172:
-	.loc 1 1279 0
-	ldr	r2, [r3]
-	ldr	r2, [r2, r8]
-	adds	r2, r2, #1
-	bne	.L2173
-.LVL2417:
-	add	r10, r10, #-1
-.LVL2418:
-	uxth	r10, r10
-	.loc 1 1273 0 discriminator 2
-	cmp	r10, #0
-	bne	.L2175
-.L2174:
-	.loc 1 1439 0
-	ldr	r3, .L2248+68
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	cbnz	r1, .L2247
-.L2205:
-	.loc 1 1442 0
-	mov	r0, r4
-	bl	FtlFreeSysBlkQueueIn
-.LVL2419:
-	b	.L2178
-.L2180:
-	.loc 1 1297 0
-	movw	r3, #61634
-	cmp	r2, r3
-	beq	.L2182
-	movw	r3, #65535
-	cmp	r2, r3
-	bne	.L2178
-.L2247:
-	.loc 1 1440 0
-	movs	r1, #0
-	b	.L2205
-.L2182:
-	.loc 1 1302 0
-	ldr	r8, .L2248
-	ldrh	r2, [r6]
-	ldr	r3, [r8]
-	cmp	r2, r3
-	bls	.L2184
-	.loc 1 1302 0 is_stmt 0 discriminator 1
-	ldr	r1, .L2248+72
-	movw	r2, #1302
-	ldr	r0, .L2248+76
+	str	r3, [r2, #4]
+	bl	FtlVendorPartWrite
+	bl	Ftl_save_ext_data
+.L2102:
+	movs	r0, #0
+	pop	{r3, pc}
+.L2103:
+	movs	r3, #32
+	b	.L2099
+.L2106:
+	.align	2
+.L2105:
+	.word	.LANCHOR28
+	.word	.LANCHOR170
+	.word	.LANCHOR218
+	.word	.LANCHOR191
+	.word	1112818501
+	.word	.LANCHOR190
+	.size	FtlEctTblFlush, .-FtlEctTblFlush
+	.section	.text.allocate_new_data_superblock,"ax",%progbits
+	.align	1
+	.global	allocate_new_data_superblock
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	allocate_new_data_superblock, %function
+allocate_new_data_superblock:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2134
+	push	{r4, r5, r6, lr}
+	mov	r4, r0
+	ldrh	r5, [r0]
+	ldrh	r3, [r3]
+	cmp	r3, r5
+	bcs	.L2108
+	ldr	r1, .L2134+4
+	movw	r2, #3289
+	ldr	r0, .L2134+8
 	bl	printf
-.LVL2420:
-	ldr	r1, .L2248+80
-	ldr	r0, .L2248+84
+	ldr	r1, .L2134+12
+	ldr	r0, .L2134+16
 	bl	printf
-.LVL2421:
-.L2184:
-	.loc 1 1303 0 is_stmt 1
-	ldr	r1, [r8]
-	ldrh	r0, [r6]
-	.loc 1 1305 0
-	ldr	r2, .L2248+4
-	.loc 1 1303 0
-	uxth	ip, r1
-	.loc 1 1305 0
-	ldr	r10, [r2]
-	.loc 1 1303 0
-	add	r3, ip, #-1
-	sub	ip, ip, r0
-	add	ip, ip, #-1
-	sxth	r3, r3
-.LVL2422:
-	sxth	ip, ip
-.L2185:
-	.loc 1 1303 0 is_stmt 0 discriminator 1
-	cmp	r3, ip
-	bgt	.L2191
-	.loc 1 1329 0 is_stmt 1
-	cmp	r3, #0
-	bge	.L2224
-	b	.L2178
-.L2191:
-	.loc 1 1305 0
-	ldr	r2, [r5, #4]
-	lsl	r8, r3, #2
-	mov	lr, r2
-	ldr	r2, [r10, r3, lsl #2]
-	cmp	lr, r2
-	bls	.L2186
-	.loc 1 1307 0
-	ldr	r2, [r10]
-	cbnz	r2, .L2187
-	.loc 1 1307 0 is_stmt 0 discriminator 1
-	cmp	r1, r0
-	.loc 1 1315 0 is_stmt 1 discriminator 1
-	itt	ne
-	addne	r0, r0, #1
-	strhne	r0, [r6]	@ movhi
-.L2187:
-	ldr	ip, .L2248+4
-	.loc 1 1318 0 discriminator 1
-	uxth	r10, r3
-	ldr	r0, .L2248+16
-	movs	r2, #0
-.L2188:
-	uxth	lr, r2
-	sxth	r1, r2
-.LVL2423:
-	cmp	r10, lr
-	bhi	.L2189
-	.loc 1 1323 0
-	ldr	r2, [r5, #4]
-	.loc 1 1329 0
+.L2108:
+	ldr	r3, .L2134+20
+	ldr	r3, [r3]
 	cmp	r3, #0
-	.loc 1 1323 0
-	ldr	r1, [ip]
-.LVL2424:
-	str	r2, [r1, r8]
-	.loc 1 1324 0
-	ldr	r2, [r0]
-	strh	r4, [r2, r3, lsl #1]	@ movhi
-	.loc 1 1329 0
-	blt	.L2178
-	.loc 1 1339 0
-	ldr	r2, .L2248
-	ldrh	r0, [r6]
-	ldr	r2, [r2]
-	subs	r2, r2, r0
-	subs	r2, r2, #1
-	sxth	r2, r2
-	cmp	r3, r2
-	bgt	.L2178
-.LVL2425:
-.L2224:
-	.loc 1 1342 0
-	ldr	r2, .L2248+4
-	.loc 1 1341 0
-	adds	r0, r0, #1
-	.loc 1 1342 0
-	ldr	r1, [r5, #4]
-	.loc 1 1341 0
-	strh	r0, [r6]	@ movhi
-	.loc 1 1342 0
-	ldr	r2, [r2]
-	str	r1, [r2, r3, lsl #2]
-	.loc 1 1343 0
-	ldr	r2, .L2248+16
-.L2244:
-	.loc 1 1393 0
-	ldr	r2, [r2]
-	strh	r4, [r2, r3, lsl #1]	@ movhi
-.LVL2426:
-	b	.L2178
-.LVL2427:
-.L2189:
-	.loc 1 1320 0 discriminator 3
-	ldr	lr, [ip]
-	adds	r2, r2, #1
-	add	fp, lr, r1, lsl #2
-	ldr	fp, [fp, #4]
-	str	fp, [lr, r1, lsl #2]
-	.loc 1 1321 0 discriminator 3
-	ldr	lr, [r0]
-	add	fp, lr, r1, lsl #1
-	ldrh	fp, [fp, #2]
-	strh	fp, [lr, r1, lsl #1]	@ movhi
-.LVL2428:
-	b	.L2188
-.L2186:
-	subs	r3, r3, #1
-.LVL2429:
-	sxth	r3, r3
-.LVL2430:
-	b	.L2185
-.L2249:
-	.align	2
-.L2248:
-	.word	.LANCHOR64
-	.word	.LANCHOR127
-	.word	.LANCHOR70
-	.word	.LANCHOR125
-	.word	.LANCHOR126
-	.word	.LANCHOR190
-	.word	.LANCHOR71
-	.word	.LANCHOR206
-	.word	.LANCHOR39
-	.word	.LANCHOR40
-	.word	.LANCHOR37
-	.word	.LANCHOR105
-	.word	.LANCHOR177
-	.word	.LANCHOR58
-	.word	.LANCHOR104
-	.word	.LANCHOR46
-	.word	.LANCHOR156
-	.word	.LANCHOR8
-	.word	.LANCHOR224
-	.word	.LC6
-	.word	.LC7
-	.word	.LC8
-	.word	.LANCHOR61
-.LVL2431:
-.L2181:
-	.loc 1 1349 0
-	ldr	r3, [sp, #12]
-	ldr	r8, .L2250+28
+	bne	.L2109
+	movw	r3, #65535
+	cmp	r5, r3
+	beq	.L2110
+	ldr	r3, .L2134+24
+	mov	r0, r5
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r5, lsl #1]
+	cbz	r3, .L2111
+	bl	INSERT_DATA_LIST
+.L2110:
+	movs	r3, #0
+	strb	r3, [r4, #8]
+	ldr	r3, .L2134+28
+	cmp	r4, r3
+	beq	.L2112
+	ldr	r3, .L2134+32
 	ldrh	r2, [r3]
-	ldrh	r3, [r8]
-	cmp	r2, r3
-	bls	.L2194
-	.loc 1 1349 0 is_stmt 0 discriminator 1
-	ldr	r1, .L2250
-	movw	r2, #1349
-	ldr	r0, .L2250+4
-	bl	printf
-.LVL2432:
-	ldr	r1, .L2250+8
-	ldr	r0, .L2250+12
-	bl	printf
-.LVL2433:
-.L2194:
-	.loc 1 1350 0 is_stmt 1
-	ldr	r2, .L2250+16
-	ldrh	lr, [r8]
-	ldrh	r0, [r2]
-	.loc 1 1352 0
-	ldr	r2, .L2250+20
-	.loc 1 1350 0
-	add	ip, lr, #-1
-	sxth	r3, ip
-.LVL2434:
-	sub	ip, ip, r0
-	.loc 1 1352 0
-	ldr	r10, [r2]
-.L2195:
-	.loc 1 1350 0 discriminator 1
-	cmp	r3, ip
-	ble	.L2200
-	.loc 1 1352 0
-	ldr	r2, [r5, #4]
-	lsl	r8, r3, #2
-	ldr	r1, [r10, r3, lsl #2]
-	cmp	r2, r1
-	bls	.L2196
-	.loc 1 1354 0
-	ldr	r2, [r10]
-	cbnz	r2, .L2197
-	.loc 1 1354 0 is_stmt 0 discriminator 1
-	cmp	lr, r0
-	.loc 1 1365 0 is_stmt 1 discriminator 1
-	ittt	ne
-	ldrne	r2, .L2250+16
-	addne	r0, r0, #1
-	strhne	r0, [r2]	@ movhi
-.L2197:
-	ldr	ip, .L2250+20
-	.loc 1 1367 0 discriminator 1
-	uxth	r10, r3
-	ldr	r0, .L2250+24
-	movs	r2, #0
-.L2198:
-	uxth	lr, r2
-	sxth	r1, r2
-.LVL2435:
-	cmp	r10, lr
-	bhi	.L2199
-	.loc 1 1372 0
-	ldr	r2, [r5, #4]
-	ldr	r1, [ip]
-.LVL2436:
-	str	r2, [r1, r8]
-	.loc 1 1373 0
-	ldr	r2, [r0]
-	strh	r4, [r2, r3, lsl #1]	@ movhi
-.LVL2437:
-.L2200:
-	.loc 1 1378 0
-	cmp	r3, #0
-	blt	.L2178
-	.loc 1 1389 0
-	ldr	r2, .L2250+28
-	ldr	r0, .L2250+16
-	ldrh	r2, [r2]
-	ldrh	r1, [r0]
-	subs	r2, r2, #1
-	subs	r2, r2, r1
-	sxth	r2, r2
-	cmp	r3, r2
-	bgt	.L2178
-	.loc 1 1392 0
-	ldr	r2, .L2250+20
-	.loc 1 1391 0
-	adds	r1, r1, #1
-	strh	r1, [r0]	@ movhi
-	.loc 1 1392 0
-	ldr	r1, [r5, #4]
-	ldr	r2, [r2]
-	str	r1, [r2, r3, lsl #2]
-	.loc 1 1393 0
-	ldr	r2, .L2250+24
-	b	.L2244
-.LVL2438:
-.L2199:
-	.loc 1 1369 0 discriminator 3
-	ldr	lr, [ip]
-	adds	r2, r2, #1
-	add	fp, lr, r1, lsl #2
-	ldr	fp, [fp, #4]
-	str	fp, [lr, r1, lsl #2]
-	.loc 1 1370 0 discriminator 3
-	ldr	lr, [r0]
-	add	fp, lr, r1, lsl #1
-	ldrh	fp, [fp, #2]
-	strh	fp, [lr, r1, lsl #1]	@ movhi
-.LVL2439:
-	b	.L2198
-.L2196:
-	subs	r3, r3, #1
-.LVL2440:
-	sxth	r3, r3
-.LVL2441:
-	b	.L2195
-.LVL2442:
-.L2179:
-	.loc 1 1400 0
-	ldr	r8, .L2250+44
+	cmp	r2, #1
+	beq	.L2112
+	ldr	r3, .L2134+36
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2113
+.L2112:
+	movs	r3, #1
+	strb	r3, [r4, #8]
+.L2114:
+	ldr	r6, .L2134+40
 	movw	r2, #65535
-	ldrh	r1, [r8]
-	cmp	r1, r2
-	bne	.L2202
-	.loc 1 1402 0
-	strh	r4, [r8]	@ movhi
-.L2245:
-	.loc 1 1413 0
-	str	r3, [r8, #8]
-	b	.L2178
-.L2202:
-	.loc 1 1407 0
-	ldrh	r0, [r8, #4]
+	ldrh	r0, [r6]
 	cmp	r0, r2
-	beq	.L2203
-	.loc 1 1408 0
-	movs	r1, #1
-	bl	FtlFreeSysBlkQueueIn
-.LVL2443:
-.L2203:
-	.loc 1 1409 0
-	ldr	r2, [r8, #8]
-	ldr	r3, [r5, #4]
-	cmp	r2, r3
-	bcs	.L2204
-	.loc 1 1411 0
-	ldrh	r3, [r8]
-	.loc 1 1412 0
-	strh	r4, [r8]	@ movhi
-	.loc 1 1411 0
-	strh	r3, [r8, #4]	@ movhi
-	.loc 1 1413 0
-	ldr	r3, [r5, #4]
-	b	.L2245
-.L2204:
-	.loc 1 1417 0
-	strh	r4, [r8, #4]	@ movhi
-	b	.L2178
-.LVL2444:
-.L2208:
-	.loc 1 1447 0
-	ldr	r3, .L2250+32
-	ldr	r2, [r3]
-	ldrh	r3, [r2]
-	cbz	r3, .L2210
-.L2213:
-	.loc 1 1465 0
-	ldr	r1, .L2250+24
-	ldr	r0, [r1]
-	ldrh	r2, [r0]
-	cmp	r2, #0
-	beq	.L2211
-.L2212:
-	.loc 1 1483 0
-	ldr	r3, .L2250+36
-	ldrh	r2, [r6]
+	beq	.L2119
+	cmp	r5, r0
+	bne	.L2120
+	ldr	r3, .L2134+24
 	ldr	r3, [r3]
-	cmp	r2, r3
-	bls	.L2243
-	.loc 1 1483 0 is_stmt 0 discriminator 1
-	ldr	r1, .L2250
-	movw	r2, #1483
-	ldr	r0, .L2250+4
-	bl	printf
-.LVL2445:
-	ldr	r1, .L2250+8
-	ldr	r0, .L2250+12
-	bl	printf
-.LVL2446:
-.L2243:
-	.loc 1 1485 0 is_stmt 1
+	ldrh	r3, [r3, r0, lsl #1]
+	cbz	r3, .L2121
+.L2120:
+	bl	update_vpc_list
+.L2121:
+	movw	r3, #65535
+	strh	r3, [r6]	@ movhi
+.L2119:
+	mov	r0, r4
+	bl	allocate_data_superblock
+	bl	l2p_flush
 	movs	r0, #0
-	add	sp, sp, #24
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-.LVL2447:
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL2448:
-.L2210:
-	.cfi_restore_state
-	.loc 1 1447 0 discriminator 1
-	ldrh	r1, [r6]
-	cmp	r1, #0
-	beq	.L2213
-	.loc 1 1449 0 discriminator 1
-	ldr	r5, .L2250+36
-	ldr	r0, [r5]
-.L2214:
-	sxth	r4, r3
-.LVL2449:
-	cmp	r4, r0
-	bcs	.L2213
-	.loc 1 1451 0
-	ldrh	r1, [r2, r4, lsl #1]
-	adds	r3, r3, #1
-	cmp	r1, #0
-	beq	.L2214
-	.loc 1 1456 0 discriminator 1
-	ldr	r7, .L2250+40
-	mov	r3, r4
-	.loc 1 1457 0 discriminator 1
-	mov	ip, #0
-.L2215:
-.LVL2450:
-	.loc 1 1453 0 discriminator 1
-	ldr	r2, [r5]
-	cmp	r3, r2
-	bcs	.L2213
-	.loc 1 1455 0 discriminator 3
-	ldr	r2, [sp, #8]
-	subs	r1, r3, r4
+	bl	FtlEctTblFlush
+	bl	FtlVpcTblFlush
+.L2109:
+	movs	r0, #0
+	pop	{r4, r5, r6, pc}
+.L2111:
+	bl	INSERT_FREE_LIST
+	b	.L2110
+.L2113:
+	ldr	r3, .L2134+44
+	cmp	r4, r3
+	bne	.L2114
+	cmp	r2, #3
+	beq	.L2116
+	ldr	r2, .L2134+48
 	ldr	r2, [r2]
-	ldrh	r0, [r2, r3, lsl #1]
-	strh	r0, [r2, r1, lsl #1]	@ movhi
-	.loc 1 1456 0 discriminator 3
-	ldr	r2, [r7]
-	ldr	r0, [r2, r3, lsl #2]
-	str	r0, [r2, r1, lsl #2]
-	.loc 1 1457 0 discriminator 3
-	ldr	r2, [sp, #8]
+	cmp	r2, #1
+	bne	.L2117
+.L2116:
+	movs	r2, #1
+	strb	r2, [r3, #8]
+.L2117:
+	ldr	r2, .L2134+52
 	ldr	r2, [r2]
-	strh	ip, [r2, r3, lsl #1]	@ movhi
-	adds	r3, r3, #1
-.LVL2451:
-	sxth	r3, r3
-.LVL2452:
-	b	.L2215
-.LVL2453:
-.L2211:
-	.loc 1 1465 0 discriminator 1
-	ldr	r3, .L2250+16
-	ldrh	r3, [r3]
-	cmp	r3, #0
-	beq	.L2212
-	.loc 1 1467 0 discriminator 1
-	ldr	r4, .L2250+28
-	ldrh	r5, [r4]
-.L2220:
-	sxth	r3, r2
-.LVL2454:
-	cmp	r3, r5
-	mov	r7, r3
-	bge	.L2212
-	.loc 1 1469 0
-	ldrh	ip, [r0, r3, lsl #1]
-	adds	r2, r2, #1
-	cmp	ip, #0
-	beq	.L2220
-	.loc 1 1474 0 discriminator 1
-	ldr	ip, .L2250+20
-	.loc 1 1475 0 discriminator 1
-	mov	lr, #0
-.LVL2455:
-.L2221:
-	.loc 1 1471 0 discriminator 1
-	ldrh	r2, [r4]
-	cmp	r3, r2
-	bge	.L2212
-	.loc 1 1473 0 discriminator 3
-	ldr	r2, [r1]
-	subs	r0, r3, r7
-	ldrh	r5, [r2, r3, lsl #1]
-	strh	r5, [r2, r0, lsl #1]	@ movhi
-	.loc 1 1474 0 discriminator 3
-	ldr	r2, [ip]
-	ldr	r5, [r2, r3, lsl #2]
-	str	r5, [r2, r0, lsl #2]
-	.loc 1 1475 0 discriminator 3
-	ldr	r2, [r1]
-	strh	lr, [r2, r3, lsl #1]	@ movhi
-	adds	r3, r3, #1
-.LVL2456:
-	sxth	r3, r3
-.LVL2457:
-	b	.L2221
-.L2251:
+	cmp	r2, #0
+	beq	.L2114
+	ldr	r2, .L2134+56
+	ldr	r2, [r2]
+	cmp	r2, #39
+	itt	ls
+	movls	r2, #1
+	strbls	r2, [r3, #8]
+	b	.L2114
+.L2135:
 	.align	2
-.L2250:
-	.word	.LANCHOR224
+.L2134:
+	.word	.LANCHOR40
+	.word	.LANCHOR219
+	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC8
-	.word	.LANCHOR70
-	.word	.LANCHOR190
-	.word	.LANCHOR71
-	.word	.LANCHOR61
-	.word	.LANCHOR126
-	.word	.LANCHOR64
-	.word	.LANCHOR127
-	.word	.LANCHOR206
-	.cfi_endproc
-.LFE361:
-	.size	FtlScanSysBlk, .-FtlScanSysBlk
-	.section	.text.FtlLoadSysInfo,"ax",%progbits
+	.word	.LANCHOR77
+	.word	.LANCHOR84
+	.word	.LANCHOR93
+	.word	.LANCHOR44
+	.word	.LANCHOR8
+	.word	.LANCHOR133
+	.word	.LANCHOR92
+	.word	.LANCHOR158
+	.word	.LANCHOR28
+	.word	.LANCHOR170
+	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
+	.section	.text.FtlVendorPartRead,"ax",%progbits
 	.align	1
-	.global	FtlLoadSysInfo
+	.global	FtlVendorPartRead
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlLoadSysInfo, %function
-FtlLoadSysInfo:
-.LFB365:
-	.loc 1 1515 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 8
+	.type	FtlVendorPartRead, %function
+FtlVendorPartRead:
+	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 1 1520 0
-	movs	r1, #0
-	.loc 1 1523 0
-	ldr	r6, .L2277
-	.loc 1 1521 0
-	ldr	r10, .L2277+156
-	.loc 1 1523 0
-	ldrh	r2, [r6]
-	ldr	r7, .L2277+4
-	.loc 1 1521 0
-	ldr	r3, [r10]
-	.loc 1 1520 0
-	ldr	r4, .L2277+8
-	.loc 1 1524 0
-	ldr	r5, .L2277+12
-	.loc 1 1523 0
-	lsls	r2, r2, #1
-	ldr	r0, [r7]
-	mov	r8, r7
-	.loc 1 1521 0
-	str	r3, [r4, #12]
-	.loc 1 1520 0
-	str	r1, [r4, #8]
-	.loc 1 1523 0
-	bl	ftl_memset
-.LVL2458:
-	.loc 1 1524 0
-	ldrh	r0, [r5]
-	movw	r3, #65535
-	cmp	r0, r3
-	bne	.L2253
-.L2262:
-	.loc 1 1525 0
-	mov	r0, #-1
-.L2252:
-	.loc 1 1623 0
-	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2253:
-	.cfi_restore_state
-	.loc 1 1527 0
-	movs	r1, #1
-	.loc 1 1532 0
-	ldr	fp, .L2277+160
-	.loc 1 1527 0
-	bl	FtlGetLastWrittenPage
-.LVL2459:
-	.loc 1 1536 0
-	ldr	r3, .L2277+16
-	.loc 1 1527 0
-	sxth	r7, r0
-.LVL2460:
-	.loc 1 1528 0
-	adds	r0, r0, #1
-	strh	r0, [r5, #2]	@ movhi
-.L2255:
-	.loc 1 1530 0
-	cmp	r7, #0
-	bge	.L2258
-	.loc 1 1543 0
-	ldr	r1, .L2277+20
-	movw	r2, #1543
-	ldr	r0, .L2277+24
-	bl	printf
-.LVL2461:
-	ldr	r1, .L2277+28
-	ldr	r0, .L2277+32
-	bl	printf
-.LVL2462:
-.L2257:
-	.loc 1 1545 0
-	ldr	r2, .L2277+36
-	ldrh	r3, [r6]
-	ldrh	r2, [r2]
-	adds	r3, r3, #24
-	cmp	r2, r3, lsl #1
-	bcs	.L2260
-	.loc 1 1545 0 is_stmt 0 discriminator 1
-	ldr	r1, .L2277+20
-	movw	r2, #1545
-	ldr	r0, .L2277+24
-	bl	printf
-.LVL2463:
-	ldr	r1, .L2277+28
-	ldr	r0, .L2277+32
-	bl	printf
-.LVL2464:
-.L2260:
-	.loc 1 1547 0 is_stmt 1
-	movs	r2, #48
-	ldr	r1, [r4, #8]
-	ldr	r0, .L2277+40
-	bl	ftl_memcpy
-.LVL2465:
-	.loc 1 1548 0
-	ldrh	r2, [r6]
-	ldr	r1, [r4, #8]
-	ldr	r0, [r8]
-	lsls	r2, r2, #1
-	adds	r1, r1, #48
-	bl	ftl_memcpy
-.LVL2466:
-	.loc 1 1549 0
-	ldrh	r1, [r6]
-	ldr	r3, [r4, #8]
-	lsrs	r2, r1, #3
-	adds	r1, r1, #24
-	lsls	r1, r1, #1
-	adds	r2, r2, #4
-	bic	r1, r1, #3
-	add	r1, r1, r3
-	ldr	r3, .L2277+44
-	ldr	r0, [r3]
-	bl	ftl_memcpy
-.LVL2467:
-	.loc 1 1550 0
-	ldr	r3, .L2277+48
-	ldrh	r3, [r3]
-	cbz	r3, .L2261
-.LBB495:
-	.loc 1 1551 0
-	ldrh	r1, [r6]
-.LVL2468:
-	.loc 1 1552 0
-	ldr	r3, .L2277+52
-	ldrh	r2, [r3]
-	.loc 1 1551 0
-	lsrs	r3, r1, #3
-	add	r3, r3, r1, lsl #1
-	.loc 1 1552 0
-	ldr	r1, [r4, #8]
-.LVL2469:
-	.loc 1 1551 0
-	adds	r3, r3, #52
-	.loc 1 1552 0
-	lsls	r2, r2, #2
-	ubfx	r3, r3, #2, #14
-	add	r1, r1, r3, lsl #2
-	ldr	r3, .L2277+56
-	ldr	r0, [r3]
-	bl	ftl_memcpy
-.LVL2470:
-.L2261:
-.LBE495:
-	.loc 1 1556 0
-	ldr	r4, .L2277+40
-	ldr	r3, .L2277+16
-	ldr	r2, [r4]
-	cmp	r2, r3
-	bne	.L2262
-	.loc 1 1560 0
-	ldr	r3, .L2277+60
-	ldrb	r2, [r4, #10]	@ zero_extendqisi2
-	.loc 1 1559 0
-	ldrh	r6, [r4, #8]
-	.loc 1 1560 0
-	ldrh	r3, [r3]
-	.loc 1 1559 0
-	strh	r6, [r5, #6]	@ movhi
-	.loc 1 1560 0
-	cmp	r2, r3
-	bne	.L2262
-	.loc 1 1563 0
-	ldr	r3, .L2277+64
-	.loc 1 1564 0
-	ldr	r2, .L2277+68
-	.loc 1 1563 0
-	str	r6, [r3]
-	.loc 1 1564 0
-	ldr	r3, .L2277+72
-	ldrh	r3, [r3]
-	muls	r3, r6, r3
-	str	r3, [r2]
-	.loc 1 1565 0
-	ldr	r2, .L2277+76
-	ldrh	r2, [r2]
-	muls	r3, r2, r3
-	ldr	r2, .L2277+80
-	str	r3, [r2]
-	.loc 1 1566 0
-	ldr	r3, .L2277+84
-	ldr	r5, [r3]
-	ldr	r3, .L2277+88
-	ldrh	r0, [r3, #6]
-	ldr	r3, .L2277+92
-	subs	r0, r5, r0
-	ldrh	r1, [r3]
-	subs	r0, r0, r6
-	bl	__aeabi_uidiv
-.LVL2471:
-	ldr	r3, .L2277+96
-	.loc 1 1572 0
-	cmp	r6, r5
-	.loc 1 1566 0
-	strh	r0, [r3]	@ movhi
-	.loc 1 1572 0
-	bls	.L2263
-	.loc 1 1572 0 is_stmt 0 discriminator 1
-	ldr	r1, .L2277+20
-	movw	r2, #1572
-	ldr	r0, .L2277+24
-	bl	printf
-.LVL2472:
-	ldr	r1, .L2277+28
-	ldr	r0, .L2277+32
-	bl	printf
-.LVL2473:
-.L2263:
-	.loc 1 1575 0 is_stmt 1
-	ldrh	r2, [r4, #16]
-	.loc 1 1574 0
-	ldr	r3, .L2277+100
-	ldrh	ip, [r4, #14]
-	.loc 1 1579 0
-	ldr	r7, .L2277+104
-.LVL2474:
-	.loc 1 1575 0
-	lsrs	r1, r2, #6
-	.loc 1 1576 0
-	and	r2, r2, #63
-	strb	r2, [r3, #6]
-	.loc 1 1577 0
-	ldrb	r2, [r4, #11]	@ zero_extendqisi2
-	.loc 1 1575 0
-	strh	r1, [r3, #2]	@ movhi
-	.loc 1 1584 0
-	ldr	r1, .L2277+108
-	.loc 1 1577 0
-	strb	r2, [r3, #8]
-	.loc 1 1584 0
-	ldrh	r2, [r4, #18]
-	.loc 1 1574 0
-	strh	ip, [r3]	@ movhi
-	.loc 1 1579 0
-	movw	r3, #65535
-	strh	r3, [r7]	@ movhi
-	.loc 1 1580 0
-	movs	r3, #0
-	.loc 1 1584 0
-	strh	r2, [r1]	@ movhi
-	.loc 1 1585 0
-	ldrh	r2, [r4, #20]
-	.loc 1 1580 0
-	strh	r3, [r7, #2]	@ movhi
-	.loc 1 1581 0
-	strb	r3, [r7, #6]
-	.loc 1 1582 0
-	strb	r3, [r7, #8]
-	.loc 1 1585 0
-	lsrs	r5, r2, #6
-	.loc 1 1586 0
-	and	r2, r2, #63
-	strb	r2, [r1, #6]
-	.loc 1 1587 0
-	ldrb	r2, [r4, #12]	@ zero_extendqisi2
-	.loc 1 1585 0
-	strh	r5, [r1, #2]	@ movhi
-	.loc 1 1589 0
-	ldrh	r5, [r4, #22]
-	.loc 1 1587 0
-	strb	r2, [r1, #8]
-	.loc 1 1589 0
-	ldr	r2, .L2277+112
-	strh	r5, [r2]	@ movhi
-	.loc 1 1590 0
-	ldrh	r5, [r4, #24]
-	lsrs	r6, r5, #6
-	.loc 1 1591 0
-	and	r5, r5, #63
-	strb	r5, [r2, #6]
-	.loc 1 1592 0
-	ldrb	r5, [r4, #13]	@ zero_extendqisi2
-	.loc 1 1590 0
-	strh	r6, [r2, #2]	@ movhi
-	.loc 1 1599 0
-	ldr	r6, [r4, #32]
-	.loc 1 1592 0
-	strb	r5, [r2, #8]
-	.loc 1 1594 0
-	ldr	r5, .L2277+116
-	str	r3, [r5]
-	.loc 1 1595 0
-	ldr	r5, .L2277+120
-	str	r3, [r5]
-	.loc 1 1596 0
-	ldr	r5, .L2277+124
-	str	r3, [r5]
-	.loc 1 1597 0
-	ldr	r5, .L2277+128
-	str	r3, [r5]
-	.loc 1 1599 0
-	ldr	r5, .L2277+132
-	str	r6, [r5]
+	ldr	r3, .L2146
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r10, r2
+	adds	r2, r0, r1
+	sub	sp, sp, #56
+	mov	r7, r0
 	mov	r6, r1
-	.loc 1 1600 0
-	ldr	r5, .L2277+136
-	str	r3, [r5]
-	.loc 1 1601 0
-	ldr	r5, .L2277+140
-	str	r3, [r5]
-	.loc 1 1602 0
-	ldr	r5, .L2277+144
-	.loc 1 1604 0
-	ldr	lr, [r4, #40]
-	.loc 1 1602 0
-	str	r3, [r5]
-	.loc 1 1604 0
-	ldr	r3, .L2277+148
-	ldr	r5, [r3]
-	cmp	lr, r5
-	mov	r5, r2
-	.loc 1 1605 0
-	it	hi
-	strhi	lr, [r3]
-	.loc 1 1607 0
-	ldr	r3, .L2277+152
-	ldr	r2, [r4, #36]
-	ldr	r1, [r3]
-	cmp	r2, r1
-	.loc 1 1608 0
-	it	hi
-	strhi	r2, [r3]
-	.loc 1 1610 0
-	movw	r3, #65535
-	cmp	ip, r3
-	beq	.L2266
-	.loc 1 1611 0
-	ldr	r0, .L2277+100
-	bl	make_superblock
-.LVL2475:
-.L2266:
-	.loc 1 1613 0
-	ldrh	r2, [r6]
-	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L2267
-	.loc 1 1614 0
-	ldr	r0, .L2277+108
-	bl	make_superblock
-.LVL2476:
-.L2267:
-	.loc 1 1616 0
-	ldrh	r2, [r5]
-	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L2268
-	.loc 1 1617 0
-	ldr	r0, .L2277+112
-	bl	make_superblock
-.LVL2477:
-.L2268:
-	.loc 1 1619 0
-	ldrh	r2, [r7]
-	movw	r3, #65535
+	ldrh	r3, [r3]
 	cmp	r2, r3
-	beq	.L2269
-	.loc 1 1620 0
-	ldr	r0, .L2277+104
-	bl	make_superblock
-.LVL2478:
-.L2269:
-	.loc 1 1622 0
-	movs	r0, #0
-	b	.L2252
-.LVL2479:
-.L2258:
-	.loc 1 1531 0
-	ldrh	r2, [r5]
-	.loc 1 1533 0
-	ldr	r0, .L2277+8
-	str	r3, [sp, #4]
-	.loc 1 1531 0
-	orr	r2, r7, r2, lsl #10
-	str	r2, [r4, #4]
-	.loc 1 1532 0
+	bhi	.L2145
+	ldr	r3, .L2146+4
+	mov	r8, #0
+	ldr	fp, .L2146+28
+	ldrh	r5, [r3]
+	lsr	r5, r0, r5
+	lsls	r3, r5, #2
+	str	r3, [sp]
+.L2138:
+	cbnz	r6, .L2144
+.L2136:
+	mov	r0, r8
+	add	sp, sp, #56
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2144:
+	ldr	r3, .L2146+8
+	mov	r0, r7
+	ldr	r2, [sp]
+	ldr	r3, [r3]
+	ldr	r3, [r3, r2]
+	ldr	r2, .L2146+12
+	str	r3, [sp, #8]
+	ldrh	r4, [r2]
+	mov	r1, r4
+	bl	__aeabi_uidivmod
+	subs	r4, r4, r1
+	ldr	r3, [sp, #8]
+	uxth	r4, r4
+	str	r1, [sp, #4]
+	cmp	r6, r4
+	it	cc
+	uxthcc	r4, r6
+	lsls	r2, r4, #9
+	str	r2, [sp, #8]
+	cmp	r3, #0
+	beq	.L2140
 	ldr	r2, [fp]
-	str	r2, [r4, #8]
-	.loc 1 1533 0
+	add	r0, sp, #20
+	str	r3, [sp, #24]
+	str	r3, [sp, #12]
+	str	r2, [sp, #28]
+	movs	r2, #0
+	str	r2, [sp, #32]
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL2480:
-	.loc 1 1536 0
-	ldr	r2, [r4]
-	ldr	r3, [sp, #4]
+	ldr	r2, [sp, #20]
+	ldr	r3, [sp, #12]
 	adds	r2, r2, #1
-	beq	.L2256
-	.loc 1 1537 0 discriminator 1
-	ldr	r2, [fp]
-	.loc 1 1536 0 discriminator 1
+	ldr	r2, .L2146+16
+	it	eq
+	moveq	r8, #-1
 	ldr	r2, [r2]
-	cmp	r2, r3
-	bne	.L2256
-	.loc 1 1538 0
-	ldr	r2, [r10]
-	ldrh	r1, [r2]
-	.loc 1 1537 0
-	movw	r2, #61604
-	cmp	r1, r2
-	beq	.L2257
-.L2256:
-	subs	r7, r7, #1
-.LVL2481:
-	sxth	r7, r7
-.LVL2482:
-	b	.L2255
-.L2278:
+	cmp	r2, #256
+	bne	.L2142
+	mov	r2, r3
+	mov	r1, r5
+	ldr	r0, .L2146+20
+	bl	printf
+	ldr	r2, [fp]
+	mov	r1, r5
+	ldr	r0, .L2146+24
+	bl	FtlMapWritePage
+.L2142:
+	ldr	r1, [fp]
+	lsls	r2, r4, #9
+	ldr	r3, [sp, #4]
+	mov	r0, r10
+	add	r1, r1, r3, lsl #9
+	bl	ftl_memcpy
+.L2143:
+	ldr	r3, [sp, #8]
+	adds	r5, r5, #1
+	subs	r6, r6, r4
+	add	r7, r7, r4
+	add	r10, r10, r3
+	ldr	r3, [sp]
+	adds	r3, r3, #4
+	str	r3, [sp]
+	b	.L2138
+.L2140:
+	lsls	r2, r4, #9
+	mov	r1, r3
+	mov	r0, r10
+	bl	ftl_memset
+	b	.L2143
+.L2145:
+	mov	r8, #-1
+	b	.L2136
+.L2147:
 	.align	2
-.L2277:
-	.word	.LANCHOR39
-	.word	.LANCHOR83
-	.word	.LANCHOR199
-	.word	.LANCHOR206
-	.word	1179929683
-	.word	.LANCHOR225
-	.word	.LC6
-	.word	.LC7
-	.word	.LC8
+.L2146:
+	.word	.LANCHOR50
 	.word	.LANCHOR57
-	.word	.LANCHOR80
-	.word	.LANCHOR0
-	.word	.LANCHOR69
-	.word	.LANCHOR66
-	.word	.LANCHOR192
-	.word	.LANCHOR44
-	.word	.LANCHOR226
-	.word	.LANCHOR72
-	.word	.LANCHOR52
-	.word	.LANCHOR55
-	.word	.LANCHOR68
-	.word	.LANCHOR41
-	.word	.LANCHOR74
-	.word	.LANCHOR37
-	.word	.LANCHOR227
-	.word	.LANCHOR91
-	.word	.LANCHOR201
-	.word	.LANCHOR92
-	.word	.LANCHOR93
-	.word	.LANCHOR158
-	.word	.LANCHOR159
-	.word	.LANCHOR163
-	.word	.LANCHOR162
-	.word	.LANCHOR164
-	.word	.LANCHOR165
-	.word	.LANCHOR166
-	.word	.LANCHOR161
-	.word	.LANCHOR156
-	.word	.LANCHOR157
+	.word	.LANCHOR194
+	.word	.LANCHOR56
+	.word	.LANCHOR202
+	.word	.LC43
+	.word	.LANCHOR215
 	.word	.LANCHOR185
-	.word	.LANCHOR180
-	.cfi_endproc
-.LFE365:
-	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
-	.section	.text.FtlMapTblRecovery,"ax",%progbits
+	.size	FtlVendorPartRead, .-FtlVendorPartRead
+	.section	.text.FtlLoadEctTbl,"ax",%progbits
 	.align	1
-	.global	FtlMapTblRecovery
+	.global	FtlLoadEctTbl
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlMapTblRecovery, %function
-FtlMapTblRecovery:
-.LFB366:
-	.loc 1 1626 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 32
+	.type	FtlLoadEctTbl, %function
+FtlLoadEctTbl:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2483:
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	sub	sp, sp, #40
-	.cfi_def_cfa_offset 72
-	.loc 1 1630 0
-	ldr	r3, [r0, #24]
-	.loc 1 1626 0
-	mov	r4, r0
-	.loc 1 1637 0
+	push	{r3, r4, r5, lr}
+	movs	r0, #64
+	ldr	r4, .L2150
+	ldr	r5, .L2150+4
+	ldr	r2, [r4]
+	ldrh	r1, [r5]
+	bl	FtlVendorPartRead
+	ldr	r3, [r4]
+	ldr	r2, [r3]
+	ldr	r3, .L2150+8
+	cmp	r2, r3
+	beq	.L2149
+	ldr	r1, .L2150+12
+	ldr	r0, .L2150+16
+	bl	printf
+	ldrh	r2, [r5]
 	movs	r1, #0
-	.loc 1 1643 0
-	movs	r5, #0
-	.loc 1 1633 0
-	ldrh	fp, [r0, #6]
-	.loc 1 1630 0
-	str	r3, [sp, #20]
-.LVL2484:
-	.loc 1 1631 0
-	ldr	r3, [r0, #12]
-.LVL2485:
-	.loc 1 1637 0
-	lsl	r2, fp, #2
-	.loc 1 1631 0
-	str	r3, [sp, #12]
-.LVL2486:
-	.loc 1 1632 0
-	ldr	r3, [r0, #16]
-.LVL2487:
-	str	r3, [sp, #28]
-.LVL2488:
-	.loc 1 1634 0
-	ldrh	r3, [r0, #8]
-.LVL2489:
-	.loc 1 1637 0
-	ldr	r0, [sp, #20]
-.LVL2490:
-	.loc 1 1634 0
-	str	r3, [sp, #24]
-.LVL2491:
-	.loc 1 1637 0
+	ldr	r0, [r4]
+	lsls	r2, r2, #9
 	bl	ftl_memset
-.LVL2492:
-	.loc 1 1638 0
-	ldr	r2, .L2321
-	ldr	r3, .L2321+4
-	.loc 1 1643 0
-	str	r5, [r4, #32]
-	.loc 1 1638 0
-	ldr	r1, [r2]
-	.loc 1 1644 0
-	str	r5, [r4, #28]
-	str	r3, [sp, #16]
-	.loc 1 1638 0
-	str	r1, [r3, #8]
-	.loc 1 1639 0
-	ldr	r1, .L2321+8
-	str	r2, [sp, #36]
-	ldr	r6, [r1]
-	.loc 1 1641 0
-	movw	r1, #65535
-	.loc 1 1639 0
-	str	r6, [r3, #12]
-.LVL2493:
-	.loc 1 1641 0
-	strh	r1, [r4]	@ movhi
-	.loc 1 1642 0
-	strh	r1, [r4, #2]	@ movhi
-	.loc 1 1645 0
-	movs	r1, #1
-	str	r1, [r4, #36]
-.LVL2494:
-.L2280:
-	.loc 1 1646 0 discriminator 1
-	ldr	r3, [sp, #24]
-	sxth	r10, r5
-.LVL2495:
-	cmp	r10, r3
-	bge	.L2298
-	.loc 1 1648 0
-	ldr	r3, [sp, #24]
-	lsl	r7, r10, #1
-	subs	r3, r3, #1
-	cmp	r10, r3
-	bne	.L2281
-	.loc 1 1650 0
-	ldr	r3, [sp, #12]
+.L2149:
+	movs	r0, #0
+	pop	{r3, r4, r5, pc}
+.L2151:
+	.align	2
+.L2150:
+	.word	.LANCHOR191
+	.word	.LANCHOR190
+	.word	1112818501
+	.word	.LC44
+	.word	.LC7
+	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
+	.section	.text.Ftl_load_ext_data,"ax",%progbits
+	.align	1
+	.global	Ftl_load_ext_data
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	Ftl_load_ext_data, %function
+Ftl_load_ext_data:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
 	movs	r1, #1
-	ldrh	r0, [r3, r10, lsl #1]
-	add	r7, r7, r3
-	bl	FtlGetLastWrittenPage
-.LVL2496:
-	.loc 1 1653 0
-	ldr	r3, [sp, #28]
-	.loc 1 1650 0
-	sxth	r8, r0
-.LVL2497:
-	.loc 1 1651 0
-	adds	r0, r0, #1
-	.loc 1 1652 0
-	strh	r5, [r4]	@ movhi
-	.loc 1 1651 0
-	strh	r0, [r4, #2]	@ movhi
-	.loc 1 1655 0
-	movs	r5, #0
-	.loc 1 1653 0
-	ldr	r3, [r3, r10, lsl #2]
-	.loc 1 1657 0
-	ldr	r10, .L2321+4
-.LVL2498:
-	.loc 1 1653 0
-	str	r3, [r4, #28]
-.LVL2499:
-.L2282:
-	sxth	r3, r5
-.LVL2500:
-	.loc 1 1655 0 discriminator 1
-	cmp	r3, r8
-	ble	.L2285
-.LVL2501:
-.L2298:
-	.loc 1 1712 0
-	ldr	r7, .L2321+12
-	cmp	r4, r7
-	bne	.L2287
-	.loc 1 1712 0 is_stmt 0 discriminator 1
-	ldr	r3, .L2321+16
-	ldrh	r3, [r3]
-	cbz	r3, .L2287
-.LBB496:
-.LBB497:
-	.loc 1 1746 0 is_stmt 1 discriminator 1
-	ldr	r8, .L2321+40
-.LBE497:
-.LBE496:
-	movs	r6, #0
-.LVL2502:
-.L2301:
-.LBB500:
-	.loc 1 1717 0 discriminator 1
-	ldr	r3, .L2321+20
-	ldrh	r3, [r3]
-	cmp	r6, r3
-	bcc	.L2309
-.LVL2503:
-.L2287:
-.LBE500:
-	.loc 1 1766 0
+	ldr	r4, .L2156
+	movs	r0, #0
+	ldr	r5, .L2156+4
+	mov	r2, r4
+	bl	FtlVendorPartRead
+	ldr	r3, [r4]
+	cmp	r3, r5
+	beq	.L2153
+	mov	r2, #512
+	movs	r1, #0
 	mov	r0, r4
-	bl	ftl_free_no_use_map_blk
-.LVL2504:
-	.loc 1 1767 0
-	ldr	r3, .L2321+24
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r3]
+	bl	ftl_memset
+	str	r5, [r4]
+.L2153:
+	ldr	r3, [r4]
+	cmp	r3, r5
+	ldr	r5, .L2156+8
+	bne	.L2154
+	ldr	r2, [r4, #88]
+	ldr	r3, .L2156+12
+	str	r2, [r3]
+	ldr	r2, [r4, #92]
+	ldr	r3, .L2156+16
+	str	r2, [r3]
+	ldr	r2, [r4, #8]
+	ldr	r3, .L2156+20
+	str	r2, [r3]
+	ldr	r2, [r4, #12]
+	ldr	r3, .L2156+24
+	str	r2, [r3]
+	ldr	r2, [r4, #16]
+	ldr	r3, .L2156+28
+	str	r2, [r3]
+	ldr	r2, [r4, #20]
+	ldr	r3, .L2156+32
+	str	r2, [r3]
+	ldr	r3, [r4, #28]
+	ldr	r2, [r4, #32]
+	str	r3, [r5]
+	ldr	r3, .L2156+36
+	str	r2, [r3]
+	ldr	r2, [r4, #36]
+	ldr	r3, .L2156+40
+	str	r2, [r3]
+	ldr	r2, [r4, #40]
+	ldr	r3, .L2156+44
+	str	r2, [r3]
+	ldr	r2, [r4, #44]
+	ldr	r3, .L2156+48
+	str	r2, [r3]
+	ldr	r2, [r4, #48]
+	ldr	r3, .L2156+52
+	str	r2, [r3]
+	ldr	r2, [r4, #60]
+	ldr	r3, .L2156+56
+	str	r2, [r3]
+.L2154:
+	ldr	r3, .L2156+60
+	movs	r2, #0
+	str	r2, [r3]
+	ldr	r2, [r4, #68]
+	ldr	r3, .L2156+64
 	cmp	r2, r3
-	bne	.L2300
-	.loc 1 1769 0
-	mov	r0, r4
-	bl	ftl_map_blk_alloc_new_blk
-.LVL2505:
-.L2300:
-	.loc 1 1772 0
-	mov	r0, r4
-	bl	ftl_map_blk_gc
-.LVL2506:
-	.loc 1 1774 0
-	mov	r0, r4
-	bl	ftl_map_blk_gc
-.LVL2507:
-	.loc 1 1776 0
-	movs	r0, #0
-	add	sp, sp, #40
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL2508:
-.L2285:
-	.cfi_restore_state
-	.loc 1 1657 0
-	ldrh	r2, [r7]
-	.loc 1 1658 0
-	ldr	r0, .L2321+4
-	.loc 1 1657 0
-	orr	r3, r3, r2, lsl #10
-.LVL2509:
-	.loc 1 1658 0
+	bne	.L2155
+	ldr	r3, .L2156+68
 	movs	r2, #1
-	mov	r1, r2
-	.loc 1 1657 0
-	str	r3, [r10, #4]
-	.loc 1 1658 0
-	bl	FlashReadPages
-.LVL2510:
-	.loc 1 1661 0
-	ldr	r3, [r10]
-	adds	r3, r3, #1
-	beq	.L2283
-	.loc 1 1663 0
-	ldrh	r3, [r6, #8]
-	cmp	fp, r3
-	bls	.L2284
-	.loc 1 1663 0 is_stmt 0 discriminator 1
-	ldrh	r1, [r6]
-	ldrh	r2, [r4, #4]
-	cmp	r1, r2
-	bne	.L2284
-	.loc 1 1665 0 is_stmt 1
-	ldr	r2, [r10, #4]
-	ldr	r1, [sp, #20]
-	str	r2, [r1, r3, lsl #2]
-.L2284:
-.LVL2511:
-	adds	r5, r5, #1
-.LVL2512:
-	b	.L2282
-.LVL2513:
-.L2283:
-	.loc 1 1668 0
-	ldrh	r3, [r7]
-	strh	r3, [r4, #40]	@ movhi
-	b	.L2284
-.LVL2514:
-.L2281:
-	.loc 1 1674 0
-	ldr	r3, .L2321
-	ldr	r8, .L2321+4
+	ldr	r1, .L2156+72
+	ldr	r0, .L2156+76
+	str	r2, [r3]
+	bl	printf
+.L2155:
+	ldr	r3, .L2156+80
+	ldr	r1, .L2156+84
+	ldrh	r2, [r3]
+	ldr	r3, .L2156+88
+	ldrh	r1, [r1]
+	ldr	r0, [r3]
+	ldr	r3, [r5]
+	mla	r0, r0, r2, r3
+	bl	__aeabi_uidiv
+	ldr	r3, .L2156+92
+	str	r0, [r3]
+	pop	{r3, r4, r5, pc}
+.L2157:
+	.align	2
+.L2156:
+	.word	.LANCHOR138
+	.word	1179929683
+	.word	.LANCHOR168
+	.word	.LANCHOR216
+	.word	.LANCHOR217
+	.word	.LANCHOR161
+	.word	.LANCHOR162
+	.word	.LANCHOR166
+	.word	.LANCHOR165
+	.word	.LANCHOR80
+	.word	.LANCHOR163
+	.word	.LANCHOR164
+	.word	.LANCHOR169
+	.word	.LANCHOR170
+	.word	.LANCHOR158
+	.word	.LANCHOR157
+	.word	305432421
+	.word	.LANCHOR28
+	.word	.LC45
+	.word	.LC7
+	.word	.LANCHOR48
+	.word	.LANCHOR40
+	.word	.LANCHOR167
+	.word	.LANCHOR205
+	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
+	.section	.text.FtlMapBlkWriteDumpData,"ax",%progbits
+	.align	1
+	.global	FtlMapBlkWriteDumpData
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlMapBlkWriteDumpData, %function
+FtlMapBlkWriteDumpData:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	mov	r4, r0
+	ldr	r3, [r0, #36]
+	cmp	r3, #0
+	beq	.L2158
+	movs	r3, #0
+	ldrh	r6, [r0, #6]
+	str	r3, [r0, #36]
+	ldr	r3, .L2172
+	ldr	r10, [r0, #24]
 	ldr	r3, [r3]
-	.loc 1 1676 0
-	mov	r0, r8
-	.loc 1 1674 0
-	str	r3, [r8, #8]
-	.loc 1 1675 0
-	ldr	r3, [sp, #12]
-	add	r3, r3, r7
-	ldr	r7, .L2321+24
-	str	r3, [sp, #32]
-	ldr	r3, [sp, #12]
-	ldrh	r2, [r3, r10, lsl #1]
-	ldrh	r3, [r7]
+	cmp	r3, #0
+	bne	.L2158
+	ldr	r3, .L2172+4
+	ldr	r5, .L2172+8
+	ldr	r3, [r3]
+	mov	r7, r5
+	str	r3, [r5, #8]
+	ldr	r3, .L2172+12
+	ldr	r8, [r3]
+	ldrh	r3, [r0, #2]
+	str	r8, [r5, #12]
+	cbz	r3, .L2162
+	ldr	r2, .L2172+16
+	ldrh	r2, [r2]
+	subs	r2, r2, #1
+	cmp	r3, r2
+	bge	.L2162
+	ldrh	r2, [r0]
+	movw	r1, #65535
+	cmp	r2, r1
+	beq	.L2162
+	ldr	r1, [r0, #12]
 	subs	r3, r3, #1
+	mov	r0, r5
+	ldrh	r2, [r1, r2, lsl #1]
 	orr	r3, r3, r2, lsl #10
-	.loc 1 1676 0
 	movs	r2, #1
 	mov	r1, r2
-	.loc 1 1675 0
-	str	r3, [r8, #4]
-	.loc 1 1676 0
+	str	r3, [r5, #4]
 	bl	FlashReadPages
-.LVL2515:
-	.loc 1 1679 0
-	ldr	r3, [r8]
+	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L2311
-	.loc 1 1679 0 is_stmt 0 discriminator 1
-	ldrh	r2, [r6]
-	ldrh	r3, [r4, #4]
-	cmp	r2, r3
-	bne	.L2311
-	.loc 1 1679 0 discriminator 2
-	ldrh	r2, [r6, #8]
-	movw	r3, #64245
+	beq	.L2162
+	ldr	r3, [r4, #24]
+	ldrh	r1, [r8, #8]
+	ldr	r2, [r3, r1, lsl #2]
+	ldr	r3, [r5, #4]
 	cmp	r2, r3
-	beq	.L2289
-.L2311:
-	.loc 1 1695 0 is_stmt 1
-	ldr	r10, .L2321+24
-.LVL2516:
-	movs	r7, #0
-	.loc 1 1697 0
-	ldr	r8, .L2321+4
-.L2290:
-.LVL2517:
-	.loc 1 1695 0 discriminator 1
-	ldrh	r2, [r10]
-	sxth	r3, r7
-	cmp	r3, r2
-	bge	.L2296
-	.loc 1 1697 0
-	ldr	r2, [sp, #32]
-	.loc 1 1698 0
-	ldr	r0, .L2321+4
-	.loc 1 1697 0
-	ldrh	r2, [r2]
-	orr	r3, r3, r2, lsl #10
-	.loc 1 1698 0
+	bne	.L2162
+	ldr	r2, [r5, #8]
+.L2171:
+	mov	r0, r4
+	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
+	b	FtlMapWritePage
+.L2162:
+	subs	r6, r6, #1
+	uxth	r6, r6
+	ldr	r3, [r10, r6, lsl #2]
+	str	r3, [r7, #4]
+	cbz	r3, .L2163
 	movs	r2, #1
+	ldr	r0, .L2172+8
 	mov	r1, r2
-	.loc 1 1697 0
-	str	r3, [r8, #4]
-	.loc 1 1698 0
 	bl	FlashReadPages
-.LVL2518:
-	.loc 1 1701 0
-	ldr	r3, [r8]
-	adds	r3, r3, #1
-	beq	.L2294
-	.loc 1 1703 0
-	ldrh	r3, [r6, #8]
-	cmp	fp, r3
-	bls	.L2294
-	.loc 1 1703 0 is_stmt 0 discriminator 1
-	ldrh	r1, [r6]
-	ldrh	r2, [r4, #4]
-	cmp	r1, r2
-	.loc 1 1705 0 is_stmt 1 discriminator 1
-	ittt	eq
-	ldreq	r2, [r8, #4]
-	ldreq	r1, [sp, #20]
-	streq	r2, [r1, r3, lsl #2]
-.L2294:
-.LVL2519:
-	adds	r7, r7, #1
-.LVL2520:
-	b	.L2290
-.LVL2521:
-.L2289:
-	movs	r1, #0
-.L2291:
-	.loc 1 1682 0 discriminator 1
+.L2164:
+	ldr	r2, [r7, #8]
+	mov	r1, r6
+	b	.L2171
+.L2163:
+	ldr	r3, .L2172+20
+	movs	r1, #255
+	ldr	r0, [r7, #8]
+	ldrh	r2, [r3]
+	bl	ftl_memset
+	b	.L2164
+.L2158:
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L2173:
+	.align	2
+.L2172:
+	.word	.LANCHOR77
+	.word	.LANCHOR184
+	.word	.LANCHOR202
+	.word	.LANCHOR188
+	.word	.LANCHOR54
+	.word	.LANCHOR58
+	.size	FtlMapBlkWriteDumpData, .-FtlMapBlkWriteDumpData
+	.section	.text.FtlScanSysBlk,"ax",%progbits
+	.align	1
+	.global	FtlScanSysBlk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlScanSysBlk, %function
+FtlScanSysBlk:
+	@ args = 0, pretend = 0, frame = 32
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #0
+	ldr	r5, .L2256
+	sub	sp, sp, #32
+	mov	r1, r4
+	ldr	r3, .L2256+4
+	ldr	r2, [r5]
+	ldr	r6, .L2256+8
+	strh	r4, [r3]	@ movhi
+	ldr	r3, .L2256+12
+	lsls	r2, r2, #2
+	strh	r4, [r6]	@ movhi
+	ldr	r7, .L2256+16
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldr	r2, [r5]
+	mov	r1, r4
+	ldr	r3, .L2256+20
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
 	ldrh	r2, [r7]
-	sxth	r3, r1
-.LVL2522:
-	subs	r2, r2, #1
+	mov	r1, r4
+	ldr	r3, .L2256+24
+	lsls	r2, r2, #2
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldrh	r2, [r7]
+	mov	r1, r4
+	ldr	r3, .L2256+28
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+	movs	r2, #12
+	movs	r1, #255
+	ldr	r0, .L2256+32
+	bl	ftl_memset
+	ldr	r3, .L2256+36
+	str	r6, [sp, #12]
+	str	r5, [sp, #16]
+	ldrh	r3, [r3]
+	str	r3, [sp, #4]
+.L2175:
+	ldr	r3, .L2256+40
+	ldr	r2, [sp, #4]
+	ldrh	r3, [r3]
 	cmp	r3, r2
-	blt	.L2293
-.LVL2523:
-.L2296:
+	bls	.L2217
+	ldr	r3, .L2256+44
+	movs	r5, #0
+	ldr	r1, .L2256+48
+	mov	fp, r5
+	movs	r7, #36
+	ldrh	r8, [r3]
+	ldr	r3, .L2256+52
+	ldr	r2, [r1]
+	ldr	r1, .L2256+56
+	ldr	r6, [r3]
+	ldr	r3, .L2256+60
+	str	r2, [sp, #8]
+	ldrh	r10, [r1]
+	ldr	r3, [r3]
+	ldr	r2, .L2256+64
+	b	.L2218
+.L2177:
+	ldrb	r0, [r2, r5]	@ zero_extendqisi2
+	ldr	r1, [sp, #4]
+	str	r3, [sp, #28]
+	str	r2, [sp, #24]
+	bl	V2P_block
+	str	r0, [sp, #20]
+	bl	FtlBbmIsBadBlock
+	ldr	r2, [sp, #24]
+	ldr	r3, [sp, #28]
+	cbnz	r0, .L2176
+	ldr	r1, [sp, #20]
+	mla	r0, r7, fp, r6
+	ldr	r4, [sp, #8]
+	lsls	r1, r1, #10
+	str	r3, [r0, #8]
+	str	r1, [r0, #4]
+	mul	r1, r10, fp
+	bic	r1, r1, #3
+	add	r1, r1, r4
+	str	r1, [r0, #12]
+	add	r1, fp, #1
+	uxth	fp, r1
+.L2176:
 	adds	r5, r5, #1
-.LVL2524:
-	b	.L2280
-.LVL2525:
-.L2293:
-	.loc 1 1684 0
-	ldr	r2, .L2321
-	lsls	r0, r3, #3
-	ldr	r2, [r2]
-	ldr	r3, [r2, r3, lsl #3]
-.LVL2526:
-	.loc 1 1685 0
-	uxth	ip, r3
-	cmp	fp, ip
-	bls	.L2292
-	.loc 1 1687 0
-	add	r2, r2, r0
-	ldr	r0, [sp, #20]
-	ldr	r2, [r2, #4]
-	str	r2, [r0, ip, lsl #2]
-.L2292:
-.LVL2527:
-	adds	r1, r1, #1
-.LVL2528:
-	b	.L2291
-.LVL2529:
-.L2309:
-.LBB501:
-	.loc 1 1718 0
-	ldr	r3, .L2321+28
-	lsls	r5, r6, #2
+.L2218:
+	uxth	r1, r5
+	cmp	r8, r1
+	bhi	.L2177
+	cmp	fp, #0
+	bne	.L2178
+.L2216:
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	str	r3, [sp, #4]
+	b	.L2175
+.L2178:
+	movs	r7, #0
+	movs	r2, #1
+	mov	r1, fp
+	mov	r0, r6
+	bl	FlashReadPages
+.L2179:
+	uxth	r3, r7
+	cmp	fp, r3
+	bls	.L2216
+	ldr	r3, .L2256+52
+	mov	r8, #36
+	mul	r8, r8, r7
 	ldr	r3, [r3]
-	ldr	r2, [r3, r6, lsl #2]
-	subs	r1, r2, #1
-	adds	r1, r1, #3
-	bhi	.L2303
-	.loc 1 1719 0 discriminator 1
-	ldr	fp, .L2321+44
-	ldr	r1, [fp]
-	.loc 1 1718 0 discriminator 1
-	ldr	r1, [r1, r6, lsl #2]
-	cmp	r2, r1
-	beq	.L2303
-	.loc 1 1721 0
-	ldr	r2, [sp, #36]
-	ldr	r1, [sp, #16]
-	.loc 1 1725 0
-	ldr	r0, .L2321+4
-	.loc 1 1721 0
-	ldr	r2, [r2]
-	str	r2, [r1, #8]
-	.loc 1 1722 0
-	ldr	r2, .L2321+8
-	ldr	r10, [r2]
-	.loc 1 1725 0
+	add	r2, r3, r8
+	ldr	r3, [r3, r8]
+	ldr	r5, [r2, #4]
+	ldr	r6, [r2, #12]
+	adds	r3, r3, #1
+	ubfx	r5, r5, #10, #16
+	bne	.L2182
+	mov	r10, #16
+.L2184:
+	ldr	r3, .L2256+52
 	movs	r2, #1
-	.loc 1 1722 0
-	str	r10, [r1, #12]
-.LVL2530:
-	.loc 1 1724 0
-	ldr	r3, [r3, r5]
-	str	r3, [r1, #4]
-	.loc 1 1725 0
 	mov	r1, r2
+	ldr	r0, [r3]
+	add	r0, r0, r8
+	ldr	r3, [r0, #4]
+	adds	r3, r3, #1
+	str	r3, [r0, #4]
 	bl	FlashReadPages
-.LVL2531:
-	.loc 1 1727 0
-	ldr	r3, [sp, #16]
+	ldrh	r2, [r6]
+	movw	r3, #65535
+	cmp	r2, r3
+	ldr	r3, .L2256+52
+	ldr	r3, [r3]
+	bne	.L2181
+	mov	r2, #-1
+	str	r2, [r3, r8]
+	ldr	r3, .L2256+52
 	ldr	r3, [r3]
+	ldr	r3, [r3, r8]
+	cmp	r3, r2
+	beq	.L2183
+.L2182:
+	ldr	r3, .L2256+68
+	ldr	r2, [r3]
+	ldr	r3, [r6, #4]
+	adds	r1, r2, #1
+	beq	.L2185
+	cmp	r2, r3
+	bhi	.L2186
+.L2185:
+	adds	r2, r3, #1
+	ittt	ne
+	ldrne	r1, .L2256+68
+	addne	r2, r3, #1
+	strne	r2, [r1]
+.L2186:
+	ldrh	r2, [r6]
+	movw	r1, #61604
+	cmp	r2, r1
+	beq	.L2188
+	bhi	.L2189
+	movw	r3, #61574
+	cmp	r2, r3
+	beq	.L2190
+.L2187:
+	adds	r7, r7, #1
+	b	.L2179
+.L2181:
+	ldr	r3, [r3, r8]
 	adds	r3, r3, #1
-	beq	.L2303
-	.loc 1 1727 0 is_stmt 0 discriminator 1
-	ldrh	r2, [r10]
-	ldrh	r3, [r7, #4]
+	bne	.L2182
+	add	r10, r10, #-1
+	uxth	r10, r10
+	cmp	r10, #0
+	bne	.L2184
+.L2183:
+	ldr	r3, .L2256+72
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	cbnz	r1, .L2255
+.L2214:
+	mov	r0, r5
+	bl	FtlFreeSysBlkQueueIn
+	b	.L2187
+.L2189:
+	movw	r3, #61634
 	cmp	r2, r3
-	bne	.L2303
-	.loc 1 1733 0 is_stmt 1
-	ldr	r2, [fp]
-	ldr	r0, [sp, #16]
-	.loc 1 1728 0
-	ldr	r3, [r10, #4]
-.LVL2532:
-	.loc 1 1733 0
-	ldr	r1, [r2, r5]
-	str	r1, [r0, #4]
-	.loc 1 1734 0
-	ldr	r2, [r2, r5]
-	cbnz	r2, .L2305
-	.loc 1 1735 0
-	str	r2, [r10, #4]
-.LVL2533:
-.L2306:
-	.loc 1 1740 0
-	ldr	r2, [r10, #4]
-	cmp	r3, r2
-	bls	.L2303
-.LBB498:
-	.loc 1 1742 0
-	ldr	r10, .L2321+28
-.LVL2534:
-	ldr	fp, .L2321+44
-	ldr	r1, [r10]
-	ldr	r0, [fp]
-	str	r2, [sp]
-	ldr	r1, [r1, r5]
-	ldr	r2, [r0, r5]
-	ldr	r0, .L2321+32
+	beq	.L2191
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L2187
+.L2255:
+	movs	r1, #0
+	b	.L2214
+.L2191:
+	ldr	r3, .L2256+8
+	ldrh	r2, [r3]
+	ldr	r3, .L2256
+	ldr	r3, [r3]
+	cmp	r2, r3
+	bls	.L2193
+	ldr	r1, .L2256+76
+	movw	r2, #1308
+	ldr	r0, .L2256+80
 	bl	printf
-.LVL2535:
-	.loc 1 1744 0
-	ldr	r3, [r10]
-	ldr	r2, [r3, r5]
-	ldr	r3, [fp]
-	str	r2, [r3, r5]
-	.loc 1 1746 0
-	movs	r2, #0
-	.loc 1 1745 0
-	ldr	r3, [r10]
-	ldr	r0, [r3, r5]
-	.loc 1 1746 0
-	ldrh	r3, [r8]
-	.loc 1 1745 0
-	ubfx	r0, r0, #10, #16
-.LVL2536:
-.L2307:
-	sxth	r1, r2
-.LVL2537:
-	.loc 1 1746 0 discriminator 1
-	cmp	r1, r3
-	blt	.L2308
-	.loc 1 1751 0 discriminator 1
-	ldr	r2, .L2321+36
-	ldr	r2, [r2]
-	cmp	r3, r2
-	bcs	.L2303
-	.loc 1 1752 0
+	ldr	r1, .L2256+84
+	ldr	r0, .L2256+88
+	bl	printf
+.L2193:
+	ldr	r3, [sp, #16]
 	ldr	r2, [sp, #12]
-	strh	r0, [r2, r3, lsl #1]	@ movhi
-	.loc 1 1753 0
-	ldrh	r3, [r8]
-	adds	r3, r3, #1
-	strh	r3, [r8]	@ movhi
-	.loc 1 1755 0
-	bl	remove_from_free_sys_Queue
-.LVL2538:
-	b	.L2303
-.LVL2539:
-.L2305:
-.LBE498:
-	.loc 1 1737 0
-	movs	r2, #1
-	ldr	r0, .L2321+4
-	mov	r1, r2
-	str	r3, [sp, #20]
-	bl	FlashReadPages
-.LVL2540:
-	ldr	r3, [sp, #20]
-	b	.L2306
-.LVL2541:
-.L2308:
-.LBB499:
-	.loc 1 1747 0
-	ldr	r5, [sp, #12]
-	adds	r2, r2, #1
-	ldrh	r1, [r5, r1, lsl #1]
-.LVL2542:
+	ldr	r1, [r3]
+	ldrh	r0, [r2]
+	ldr	r2, .L2256+12
+	uxth	r10, r1
+	ldr	ip, [r2]
+	add	r3, r10, #-1
+	sub	r10, r10, r0
+	add	r10, r10, #-1
+	sxth	r3, r3
+	sxth	r10, r10
+.L2194:
+	cmp	r3, r10
+	bgt	.L2200
+	cmp	r3, #0
+	bge	.L2233
+	b	.L2187
+.L2200:
+	ldr	r2, [ip, r3, lsl #2]
+	add	r8, ip, r3, lsl #2
+	ldr	r4, [r6, #4]
+	cmp	r4, r2
+	bls	.L2195
+	ldr	r2, [ip]
+	cbnz	r2, .L2196
 	cmp	r1, r0
-	bne	.L2307
-.LVL2543:
-.L2303:
-.LBE499:
-	.loc 1 1717 0 discriminator 2
-	adds	r6, r6, #1
-.LVL2544:
-	b	.L2301
-.L2322:
+	ittt	ne
+	ldrne	r2, .L2256+8
+	addne	r0, r0, #1
+	strhne	r0, [r2]	@ movhi
+.L2196:
+	ldr	r2, .L2256+20
+	uxth	r10, r3
+	ldr	r0, [r2]
+	movs	r2, #0
+.L2197:
+	uxth	lr, r2
+	sxth	r1, r2
+	cmp	r10, lr
+	bhi	.L2198
+	ldr	r2, [r6, #4]
+	cmp	r3, #0
+	str	r2, [r8]
+	strh	r5, [r0, r3, lsl #1]	@ movhi
+	blt	.L2187
+	ldr	r2, .L2256+8
+	ldrh	r0, [r2]
+	ldr	r2, .L2256
+	ldr	r2, [r2]
+	subs	r2, r2, r0
+	subs	r2, r2, #1
+	sxth	r2, r2
+	cmp	r3, r2
+	bgt	.L2187
+.L2233:
+	ldr	r2, .L2256+8
+	adds	r0, r0, #1
+	strh	r0, [r2]	@ movhi
+	ldr	r2, [r6, #4]
+	str	r2, [ip, r3, lsl #2]
+	ldr	r2, .L2256+20
+.L2253:
+	ldr	r2, [r2]
+	strh	r5, [r2, r3, lsl #1]	@ movhi
+	b	.L2187
+.L2198:
+	add	lr, ip, r1, lsl #2
+	adds	r2, r2, #1
+	ldr	r4, [lr, #4]
+	add	lr, r0, r1, lsl #1
+	ldrh	lr, [lr, #2]
+	str	r4, [ip, r1, lsl #2]
+	strh	lr, [r0, r1, lsl #1]	@ movhi
+	b	.L2197
+.L2195:
+	subs	r3, r3, #1
+	sxth	r3, r3
+	b	.L2194
+.L2257:
 	.align	2
-.L2321:
-	.word	.LANCHOR180
-	.word	.LANCHOR199
-	.word	.LANCHOR185
-	.word	.LANCHOR124
-	.word	.LANCHOR69
-	.word	.LANCHOR66
-	.word	.LANCHOR53
-	.word	.LANCHOR192
-	.word	.LC45
-	.word	.LANCHOR64
-	.word	.LANCHOR125
+.L2256:
+	.word	.LANCHOR65
+	.word	.LANCHOR71
 	.word	.LANCHOR128
-.LBE501:
-	.cfi_endproc
-.LFE366:
-	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
-	.section	.text.FtlLoadVonderInfo,"ax",%progbits
-	.align	1
-	.global	FtlLoadVonderInfo
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlLoadVonderInfo, %function
-FtlLoadVonderInfo:
-.LFB367:
-	.loc 1 1779 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 3, -8
-	.cfi_offset 14, -4
-	.loc 1 1780 0
-	ldr	r3, .L2324
-	ldr	r0, .L2324+4
-	ldrh	r3, [r3]
-	strh	r3, [r0, #10]	@ movhi
-	.loc 1 1781 0
-	movw	r3, #61574
-	strh	r3, [r0, #4]	@ movhi
-	.loc 1 1782 0
-	ldr	r3, .L2324+8
-	ldrh	r3, [r3]
-	strh	r3, [r0, #8]	@ movhi
-	.loc 1 1783 0
-	ldr	r3, .L2324+12
-	ldrh	r3, [r3]
-	strh	r3, [r0, #6]	@ movhi
-	.loc 1 1784 0
-	ldr	r3, .L2324+16
-	ldr	r3, [r3]
-	str	r3, [r0, #12]
-	.loc 1 1785 0
-	ldr	r3, .L2324+20
-	ldr	r3, [r3]
-	str	r3, [r0, #16]
-	.loc 1 1786 0
-	ldr	r3, .L2324+24
-	ldr	r3, [r3]
-	str	r3, [r0, #20]
-	.loc 1 1787 0
-	ldr	r3, .L2324+28
+	.word	.LANCHOR130
+	.word	.LANCHOR62
+	.word	.LANCHOR129
+	.word	.LANCHOR193
+	.word	.LANCHOR72
+	.word	.LANCHOR209
+	.word	.LANCHOR40
+	.word	.LANCHOR41
+	.word	.LANCHOR38
+	.word	.LANCHOR106
+	.word	.LANCHOR180
+	.word	.LANCHOR59
+	.word	.LANCHOR105
+	.word	.LANCHOR47
+	.word	.LANCHOR159
+	.word	.LANCHOR8
+	.word	.LANCHOR220
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+.L2190:
+	ldr	r8, .L2258+20
+	ldr	r10, .L2258+28
+	ldrh	r2, [r8]
+	ldrh	r3, [r10]
+	cmp	r2, r3
+	bls	.L2203
+	ldr	r1, .L2258
+	movw	r2, #1355
+	ldr	r0, .L2258+4
+	bl	printf
+	ldr	r1, .L2258+8
+	ldr	r0, .L2258+12
+	bl	printf
+.L2203:
+	ldr	r2, .L2258+16
+	ldrh	lr, [r10]
+	ldrh	ip, [r8]
+	ldr	r0, [r2]
+	add	r10, lr, #-1
+	sxth	r3, r10
+	sub	r10, r10, ip
+.L2204:
+	cmp	r3, r10
+	ble	.L2209
+	ldr	r1, [r6, #4]
+	add	r8, r0, r3, lsl #2
+	ldr	r2, [r0, r3, lsl #2]
+	cmp	r1, r2
+	bls	.L2205
+	ldr	r2, [r0]
+	cbnz	r2, .L2206
+	cmp	lr, ip
+	ittt	ne
+	ldrne	r2, .L2258+20
+	addne	ip, ip, #1
+	strhne	ip, [r2]	@ movhi
+.L2206:
+	ldr	r2, .L2258+24
+	uxth	r10, r3
+	ldr	ip, [r2]
+	movs	r2, #0
+.L2207:
+	uxth	lr, r2
+	sxth	r1, r2
+	cmp	r10, lr
+	bhi	.L2208
+	ldr	r2, [r6, #4]
+	str	r2, [r8]
+	strh	r5, [ip, r3, lsl #1]	@ movhi
+.L2209:
+	cmp	r3, #0
+	blt	.L2187
+	ldr	r2, .L2258+28
+	ldr	ip, .L2258+20
+	ldrh	r2, [r2]
+	ldrh	r1, [ip]
+	subs	r2, r2, #1
+	subs	r2, r2, r1
+	sxth	r2, r2
+	cmp	r3, r2
+	bgt	.L2187
+	ldr	r2, [r6, #4]
+	adds	r1, r1, #1
+	strh	r1, [ip]	@ movhi
+	str	r2, [r0, r3, lsl #2]
+	ldr	r2, .L2258+24
+	b	.L2253
+.L2208:
+	add	lr, r0, r1, lsl #2
+	adds	r2, r2, #1
+	ldr	r4, [lr, #4]
+	add	lr, ip, r1, lsl #1
+	ldrh	lr, [lr, #2]
+	str	r4, [r0, r1, lsl #2]
+	strh	lr, [ip, r1, lsl #1]	@ movhi
+	b	.L2207
+.L2205:
+	subs	r3, r3, #1
+	sxth	r3, r3
+	b	.L2204
+.L2188:
+	ldr	r8, .L2258+48
+	movw	r2, #65535
+	ldrh	r1, [r8]
+	cmp	r1, r2
+	bne	.L2211
+.L2254:
+	strh	r5, [r8]	@ movhi
+	str	r3, [r8, #8]
+	b	.L2187
+.L2211:
+	ldrh	r0, [r8, #4]
+	cmp	r0, r2
+	beq	.L2212
+	movs	r1, #1
+	bl	FtlFreeSysBlkQueueIn
+.L2212:
+	ldr	r3, [r6, #4]
+	ldr	r2, [r8, #8]
+	cmp	r2, r3
+	bcs	.L2213
+	ldrh	r2, [r8]
+	strh	r2, [r8, #4]	@ movhi
+	b	.L2254
+.L2213:
+	strh	r5, [r8, #4]	@ movhi
+	b	.L2187
+.L2217:
+	ldr	r3, .L2258+32
+	ldr	r2, [r3]
+	ldrh	r3, [r2]
+	cbz	r3, .L2219
+.L2222:
+	ldr	r3, .L2258+24
+	ldr	r4, [r3]
+	ldrh	r2, [r4]
+	cmp	r2, #0
+	beq	.L2220
+.L2221:
+	ldr	r3, .L2258+36
+	ldrh	r2, [r3]
+	ldr	r3, .L2258+40
 	ldr	r3, [r3]
-	str	r3, [r0, #24]
-	.loc 1 1788 0
-	movw	r3, #65535
-	strh	r3, [r0, #40]	@ movhi
-	.loc 1 1790 0
-	bl	FtlMapTblRecovery
-.LVL2545:
-	.loc 1 1793 0
+	cmp	r2, r3
+	bls	.L2252
+	ldr	r1, .L2258
+	movw	r2, #1489
+	ldr	r0, .L2258+4
+	bl	printf
+	ldr	r1, .L2258+8
+	ldr	r0, .L2258+12
+	bl	printf
+.L2252:
 	movs	r0, #0
-	pop	{r3, pc}
-.L2325:
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2219:
+	ldr	r1, .L2258+36
+	ldrh	r1, [r1]
+	cmp	r1, #0
+	beq	.L2222
+	ldr	r5, .L2258+40
+	ldr	r0, [r5]
+.L2223:
+	sxth	r1, r3
+	cmp	r1, r0
+	bcs	.L2222
+	ldrh	r4, [r2, r1, lsl #1]
+	adds	r3, r3, #1
+	cmp	r4, #0
+	beq	.L2223
+	ldr	r3, .L2258+44
+	movs	r6, #0
+	ldr	r0, [r3]
+	mov	r3, r1
+.L2224:
+	ldr	r4, [r5]
+	cmp	r3, r4
+	bcs	.L2222
+	ldrh	r7, [r2, r3, lsl #1]
+	subs	r4, r3, r1
+	strh	r7, [r2, r4, lsl #1]	@ movhi
+	ldr	r7, [r0, r3, lsl #2]
+	str	r7, [r0, r4, lsl #2]
+	strh	r6, [r2, r3, lsl #1]	@ movhi
+	adds	r3, r3, #1
+	sxth	r3, r3
+	b	.L2224
+.L2220:
+	ldr	r3, .L2258+20
+	ldrh	r3, [r3]
+	cmp	r3, #0
+	beq	.L2221
+	ldr	r5, .L2258+28
+	ldrh	r1, [r5]
+.L2229:
+	sxth	r3, r2
+	cmp	r3, r1
+	mov	r6, r3
+	bge	.L2221
+	ldrh	r0, [r4, r3, lsl #1]
+	adds	r2, r2, #1
+	cmp	r0, #0
+	beq	.L2229
+	ldr	r2, .L2258+16
+	movs	r0, #0
+	ldr	r2, [r2]
+.L2230:
+	ldrh	r1, [r5]
+	cmp	r3, r1
+	bge	.L2221
+	ldrh	r7, [r4, r3, lsl #1]
+	subs	r1, r3, r6
+	strh	r7, [r4, r1, lsl #1]	@ movhi
+	ldr	r7, [r2, r3, lsl #2]
+	str	r7, [r2, r1, lsl #2]
+	adds	r1, r3, #1
+	strh	r0, [r4, r3, lsl #1]	@ movhi
+	sxth	r3, r1
+	b	.L2230
+.L2259:
 	.align	2
-.L2324:
-	.word	.LANCHOR61
-	.word	.LANCHOR215
-	.word	.LANCHOR70
-	.word	.LANCHOR62
+.L2258:
+	.word	.LANCHOR220
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LANCHOR193
 	.word	.LANCHOR71
-	.word	.LANCHOR190
-	.word	.LANCHOR189
-	.word	.LANCHOR191
-	.cfi_endproc
-.LFE367:
-	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
-	.section	.text.FtlLoadMapInfo,"ax",%progbits
+	.word	.LANCHOR72
+	.word	.LANCHOR62
+	.word	.LANCHOR129
+	.word	.LANCHOR128
+	.word	.LANCHOR65
+	.word	.LANCHOR130
+	.word	.LANCHOR209
+	.size	FtlScanSysBlk, .-FtlScanSysBlk
+	.section	.text.FtlLoadSysInfo,"ax",%progbits
 	.align	1
-	.global	FtlLoadMapInfo
+	.global	FtlLoadSysInfo
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlLoadMapInfo, %function
-FtlLoadMapInfo:
-.LFB369:
-	.loc 1 1820 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
+	.type	FtlLoadSysInfo, %function
+FtlLoadSysInfo:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 3, -8
-	.cfi_offset 14, -4
-	.loc 1 1821 0
-	bl	FtlL2PDataInit
-.LVL2546:
-	.loc 1 1823 0
-	ldr	r0, .L2327
-	bl	FtlMapTblRecovery
-.LVL2547:
-	.loc 1 1828 0
-	movs	r0, #0
-	pop	{r3, pc}
-.L2328:
-	.align	2
-.L2327:
-	.word	.LANCHOR124
-	.cfi_endproc
-.LFE369:
-	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
-	.section	.text.FtlRecoverySuperblock,"ax",%progbits
-	.align	1
-	.global	FtlRecoverySuperblock
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlRecoverySuperblock, %function
-FtlRecoverySuperblock:
-.LFB372:
-	.loc 1 1879 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 56
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2548:
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 1 1893 0
-	movw	r2, #65535
-	ldrh	r3, [r0]
-	.loc 1 1879 0
-	sub	sp, sp, #56
-	.cfi_def_cfa_offset 88
-	.loc 1 1879 0
-	mov	r8, r0
-	.loc 1 1893 0
-	cmp	r3, r2
-	beq	.L2484
-	.loc 1 1898 0
-	ldrh	r3, [r0, #2]
-	str	r3, [sp, #8]
-.LVL2549:
-	.loc 1 1899 0
-	ldrb	r3, [r0, #6]	@ zero_extendqisi2
-	.loc 1 1904 0
-	ldr	r1, [sp, #8]
-	.loc 1 1899 0
-	str	r3, [sp, #24]
-.LVL2550:
-	.loc 1 1904 0
-	ldr	r3, .L2493
-	ldrh	r3, [r3]
-	cmp	r3, r1
-	mov	r3, #0
-	bne	.L2332
-	.loc 1 1905 0
-	strh	r3, [r0, #4]	@ movhi
-.LVL2551:
-.L2491:
-	.loc 1 2254 0
-	strb	r3, [r8, #6]
-.LVL2552:
-.L2484:
-	.loc 1 2275 0
-	movs	r0, #0
-	add	sp, sp, #56
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r1, #0
+	ldr	r8, .L2285+156
+	ldr	r5, .L2285
+	ldr	r3, [r8]
+	ldr	r4, .L2285+4
+	ldr	r10, .L2285+160
+	ldrh	r2, [r5]
+	ldr	r7, .L2285+8
+	str	r3, [r4, #8]
+	ldr	r6, .L2285+12
+	ldr	r3, [r10]
+	lsls	r2, r2, #1
+	ldr	r0, [r7]
+	str	r3, [r4, #12]
+	bl	ftl_memset
+	ldrh	r0, [r6]
+	movw	r3, #65535
+	str	r7, [sp]
+	cmp	r0, r3
+	bne	.L2261
+.L2270:
+	mov	r0, #-1
+.L2260:
+	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL2553:
-.L2332:
-	.cfi_restore_state
-	.loc 1 1912 0
-	ldrh	r0, [r0, #16]
-.LVL2554:
-.L2333:
-	.loc 1 1913 0
-	cmp	r0, r2
-	uxth	r5, r3
-.LVL2555:
-	add	r3, r3, #1
-	beq	.L2334
-	.loc 1 1919 0
-	ldrb	r1, [r8, #8]	@ zero_extendqisi2
-	cmp	r1, #1
-	bne	.L2335
-	.loc 1 1920 0
-	bl	FtlGetLastWrittenPage
-.LVL2556:
-	.loc 1 1922 0
-	adds	r6, r0, #1
-	.loc 1 1920 0
-	mov	r4, r0
-.LVL2557:
-	.loc 1 1922 0
-	beq	.L2336
-	.loc 1 1922 0 is_stmt 0 discriminator 1
-	ldr	r3, .L2493+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #0
-	bne	.L2413
-	.loc 1 1923 0 is_stmt 1
-	ldr	r3, .L2493+8
-	ldrh	r5, [r3, r0, lsl #1]
-.LVL2558:
-.L2337:
-	.loc 1 1944 0 discriminator 1
-	ldr	r3, .L2493+12
-	.loc 1 1946 0 discriminator 1
-	movw	fp, #65535
-	.loc 1 1947 0 discriminator 1
-	mov	r10, #36
-	.loc 1 1944 0 discriminator 1
-	ldrh	ip, [r3]
-	.loc 1 1947 0 discriminator 1
-	ldr	r3, .L2493+16
-	ldr	r0, [r3]
-	.loc 1 1949 0 discriminator 1
-	ldr	r3, .L2493+20
-	ldr	r3, [r3]
-	str	r3, [sp, #4]
-	ldr	r3, .L2493+24
-	ldrh	lr, [r3]
-	add	r3, r8, #16
-	str	r3, [sp, #20]
-	str	r3, [sp]
-	movs	r3, #0
-	mov	r6, r3
-.L2338:
-.LVL2559:
-	.loc 1 1944 0 discriminator 1
-	uxth	r2, r3
-	cmp	ip, r2
-	bhi	.L2342
-	.loc 1 1953 0
-	ldrb	r3, [r8, #8]	@ zero_extendqisi2
-.LVL2560:
-	cmp	r3, #1
-	bne	.L2414
-	.loc 1 1953 0 is_stmt 0 discriminator 1
-	ldr	r3, .L2493+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	adds	r3, r3, #0
-	it	ne
-	movne	r3, #1
-.L2485:
-	str	r3, [sp, #32]
-.LVL2561:
-	.loc 1 1956 0 is_stmt 1
-	mov	r1, r6
-	ldr	r2, [sp, #32]
-.LVL2562:
-	.loc 1 1958 0
-	movs	r7, #0
-	.loc 1 1956 0
-	bl	FlashReadPages
-.LVL2563:
-	.loc 1 1957 0
-	ldr	r3, .L2493+28
-	.loc 1 1889 0
-	movw	r10, #65535
-	ldr	fp, .L2493+16
-	.loc 1 1957 0
-	ldr	r3, [r3]
-	subs	r3, r3, #1
-	str	r3, [sp]
-.LVL2564:
-.L2344:
-	uxth	r3, r7
-.LVL2565:
-	.loc 1 1958 0 discriminator 1
-	cmp	r6, r3
-	bhi	.L2349
-	.loc 1 1975 0
-	bne	.L2347
-	.loc 1 1977 0
-	adds	r4, r4, #1
-.LVL2566:
-	uxth	r3, r4
-.LVL2567:
-	str	r3, [sp, #4]
-.LVL2568:
-	.loc 1 1979 0
-	ldr	r3, [fp]
-	ldr	r0, [r3, #4]
-.LVL2569:
-.L2486:
-	.loc 1 1983 0
-	ubfx	r0, r0, #10, #16
-	bl	P2V_plane
-.LVL2570:
-	.loc 1 1986 0
-	ldrb	r3, [r8, #8]	@ zero_extendqisi2
-	.loc 1 1983 0
-	str	r0, [sp, #12]
-.LVL2571:
-	.loc 1 1986 0
-	cmp	r3, #1
-	bne	.L2351
-	.loc 1 1986 0 is_stmt 0 discriminator 1
-	ldr	r2, .L2493+4
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbnz	r2, .L2351
-	.loc 1 1987 0 is_stmt 1
-	ldr	r1, [sp, #4]
-	ldr	r2, .L2493+8
-	ldrh	r2, [r2, r1, lsl #1]
-	str	r2, [sp, #4]
-.LVL2572:
-.L2351:
-	.loc 1 1990 0
-	ldr	r2, .L2493
-	ldr	r1, [sp, #4]
-	ldrh	r2, [r2]
-	cmp	r2, r1
-	bne	.L2352
-	.loc 1 1991 0
-	ldrh	r2, [sp, #4]
-	strh	r2, [r8, #2]	@ movhi
-	.loc 1 1992 0
-	movs	r2, #0
-	strb	r2, [r8, #6]
-	.loc 1 1993 0
-	strh	r2, [r8, #4]	@ movhi
-.L2352:
-	.loc 1 1996 0
-	ldr	r2, [sp, #4]
-	ldr	r1, [sp, #8]
-	cmp	r2, r1
-	bne	.L2353
-	.loc 1 1996 0 is_stmt 0 discriminator 1
-	ldr	r2, [sp, #12]
-	ldr	r1, [sp, #24]
-	cmp	r2, r1
-	bne	.L2353
-.LVL2573:
-.L2492:
-	.loc 1 2269 0 is_stmt 1
-	ldr	r1, [sp, #4]
-	mov	r0, r8
-	bl	ftl_sb_update_avl_pages
-.LVL2574:
-	b	.L2484
-.LVL2575:
-.L2334:
-	.loc 1 1915 0
-	uxth	r1, r3
-	adds	r1, r1, #8
-	ldrh	r0, [r8, r1, lsl #1]
-.LVL2576:
-	b	.L2333
-.LVL2577:
-.L2335:
-	.loc 1 1927 0
-	movs	r1, #0
+.L2261:
+	movs	r1, #1
+	mov	fp, r4
 	bl	FtlGetLastWrittenPage
-.LVL2578:
-	mov	r4, r0
-.LVL2579:
-	.loc 1 1932 0
+	ldr	r3, .L2285+16
+	sxth	r7, r0
 	adds	r0, r0, #1
-.LVL2580:
-	beq	.L2336
-.L2413:
-	mov	r5, r4
-.LVL2581:
-	b	.L2337
-.LVL2582:
-.L2336:
-	.loc 1 1933 0
-	ldr	r3, [sp, #8]
-	cbz	r3, .L2339
-	.loc 1 1933 0 is_stmt 0 discriminator 1
-	ldr	r1, .L2493+32
-	movw	r2, #1933
-	ldr	r0, .L2493+36
-	bl	printf
-.LVL2583:
-	ldr	r1, .L2493+40
-	ldr	r0, .L2493+44
+	strh	r0, [r6, #2]	@ movhi
+.L2263:
+	cmp	r7, #0
+	bge	.L2266
+	ldr	r1, .L2285+20
+	movw	r2, #1549
+	ldr	r0, .L2285+24
 	bl	printf
-.LVL2584:
-.L2339:
-	.loc 1 1934 0 is_stmt 1
-	ldr	r3, [sp, #24]
-	cbz	r3, .L2340
-	.loc 1 1934 0 is_stmt 0 discriminator 1
-	cmp	r5, r3
-	beq	.L2340
-	.loc 1 1934 0 discriminator 2
-	ldr	r1, .L2493+32
-	movw	r2, #1934
-	ldr	r0, .L2493+36
+	ldr	r1, .L2285+28
+	ldr	r0, .L2285+32
 	bl	printf
-.LVL2585:
-	ldr	r1, .L2493+40
-	ldr	r0, .L2493+44
+.L2265:
+	ldr	r2, .L2285+36
+	ldrh	r3, [r5]
+	ldrh	r2, [r2]
+	adds	r3, r3, #24
+	cmp	r2, r3, lsl #1
+	bcs	.L2268
+	ldr	r1, .L2285+20
+	movw	r2, #1551
+	ldr	r0, .L2285+24
 	bl	printf
-.LVL2586:
-.L2340:
-	.loc 1 1935 0 is_stmt 1
-	movs	r3, #0
-	strh	r3, [r8, #2]	@ movhi
-	b	.L2491
-.LVL2587:
-.L2342:
-	.loc 1 1945 0
-	ldr	r1, [sp]
-	ldrh	r2, [r1], #2
-	.loc 1 1946 0
-	cmp	r2, fp
-	.loc 1 1945 0
-	str	r1, [sp]
-.LVL2588:
-	.loc 1 1946 0
-	beq	.L2341
-	.loc 1 1947 0
-	mla	r1, r10, r6, r0
-	orr	r2, r5, r2, lsl #10
-.LVL2589:
-	str	r2, [r1, #4]
-.LVL2590:
-	.loc 1 1948 0
-	movs	r2, #0
-	str	r2, [r1, #8]
-	.loc 1 1949 0
-	mul	r2, lr, r6
-	.loc 1 1950 0
-	adds	r6, r6, #1
-.LVL2591:
-	uxth	r6, r6
-.LVL2592:
-	.loc 1 1949 0
-	bic	r2, r2, #3
-	mov	r7, r2
-	ldr	r2, [sp, #4]
-	add	r7, r7, r2
-	str	r7, [r1, #12]
-.L2341:
-.LVL2593:
-	adds	r3, r3, #1
-.LVL2594:
-	b	.L2338
-.LVL2595:
-.L2414:
-	movs	r3, #0
-	b	.L2485
-.LVL2596:
-.L2349:
-	.loc 1 1959 0
-	movs	r3, #36
-.LVL2597:
-	ldr	r1, [fp]
-	muls	r3, r7, r3
-	adds	r2, r1, r3
-	ldr	r3, [r1, r3]
-	cbnz	r3, .L2345
-	.loc 1 1960 0
-	ldr	r2, [r2, #12]
-.LVL2598:
-	.loc 1 1961 0
-	ldr	r3, [r2, #4]
-	adds	r1, r3, #1
-	beq	.L2346
-	.loc 1 1962 0
-	ldr	r1, .L2493+28
-	mov	r0, r3
-	ldr	r1, [r1]
-	bl	ftl_cmp_data_ver
-.LVL2599:
-	cbz	r0, .L2346
-	.loc 1 1964 0
-	ldr	r1, .L2493+28
-	adds	r3, r3, #1
-	str	r3, [r1]
-.L2346:
-	.loc 1 1967 0
-	ldr	r3, [r2]
-	adds	r3, r3, #1
-	bne	.L2348
-.LVL2600:
-.L2347:
-	.loc 1 1982 0
-	uxth	r3, r4
-	.loc 1 1983 0
-	uxth	r7, r7
-	.loc 1 1982 0
-	str	r3, [sp, #4]
-.LVL2601:
-	.loc 1 1983 0
-	movs	r2, #36
-	ldr	r3, [fp]
-	mla	r7, r2, r7, r3
-.LVL2602:
-	ldr	r0, [r7, #4]
-	b	.L2486
-.LVL2603:
-.L2345:
-	.loc 1 1970 0
-	ldr	r1, [r2, #4]
-	.loc 1 1971 0
-	uxth	r10, r5
-	.loc 1 1970 0
-	ldr	r0, .L2493+48
+	ldr	r1, .L2285+28
+	ldr	r0, .L2285+32
 	bl	printf
-.LVL2604:
-	.loc 1 1972 0
-	ldrh	r2, [r8]
-	ldr	r3, .L2493+52
-	strh	r2, [r3]	@ movhi
-.LVL2605:
-.L2348:
-	adds	r7, r7, #1
-.LVL2606:
-	b	.L2344
-.LVL2607:
-.L2353:
-	.loc 1 2002 0
-	movw	r2, #65535
-	cmp	r10, r2
-	bne	.L2354
-	.loc 1 2002 0 is_stmt 0 discriminator 1
-	cmp	r3, #0
-	bne	.L2355
-.L2354:
-.LVL2608:
-.LBB502:
-	.loc 1 2008 0 is_stmt 1
-	ldr	r3, .L2493+56
-	.loc 1 2007 0
-	uxth	r10, r5
-.LVL2609:
-	.loc 1 2012 0
-	uxth	r5, r5
-.LVL2610:
-	.loc 1 2030 0
-	ldr	fp, .L2493+56
-	.loc 1 2034 0
-	mov	r7, #-1
-	.loc 1 2008 0
-	ldr	r2, [r3]
-	.loc 1 2034 0
-	mov	r6, r7
-.LVL2611:
-	.loc 1 2008 0
-	adds	r2, r2, #1
-	.loc 1 2009 0
-	itt	eq
-	ldreq	r2, [sp]
-	streq	r2, [r3]
-	.loc 1 2010 0
-	ldr	r3, [r3]
-	str	r3, [sp, #28]
-.LVL2612:
-	.loc 1 2012 0
-	ldr	r3, [sp, #8]
-.LVL2613:
-	adds	r3, r3, #7
-	cmp	r5, r3
-	.loc 1 2013 0
-	itet	gt
-	subgt	r4, r10, #7
-	ldrle	r4, [sp, #8]
-	uxthgt	r4, r4
-.LVL2614:
-.L2358:
-	.loc 1 2014 0 discriminator 1
-	cmp	r4, r10
-	bhi	.L2371
-	.loc 1 2016 0
-	ldr	r3, .L2493+12
-	.loc 1 2018 0
-	movw	lr, #65535
-	.loc 1 2019 0
-	mov	ip, #36
-	.loc 1 2016 0
+.L2268:
+	movs	r2, #48
+	ldr	r1, [r4, #8]
+	ldr	r0, .L2285+40
+	bl	ftl_memcpy
+	ldrh	r2, [r5]
+	ldr	r3, [sp]
+	ldr	r1, [r4, #8]
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	adds	r1, r1, #48
+	bl	ftl_memcpy
+	ldrh	r1, [r5]
+	ldr	r3, [r4, #8]
+	lsrs	r2, r1, #3
+	adds	r1, r1, #24
+	lsls	r1, r1, #1
+	adds	r2, r2, #4
+	bic	r1, r1, #3
+	add	r1, r1, r3
+	ldr	r3, .L2285+44
+	ldr	r0, [r3]
+	bl	ftl_memcpy
+	ldr	r3, .L2285+48
 	ldrh	r3, [r3]
-	str	r3, [sp, #36]
-	.loc 1 2019 0
-	ldr	r3, .L2493+16
+	cbz	r3, .L2269
+	ldrh	r1, [r5]
+	ldr	r3, .L2285+52
+	ldrh	r2, [r3]
+	lsrs	r3, r1, #3
+	add	r3, r3, r1, lsl #1
+	ldr	r1, [r4, #8]
+	adds	r3, r3, #52
+	lsls	r2, r2, #2
+	ubfx	r3, r3, #2, #14
+	add	r1, r1, r3, lsl #2
+	ldr	r3, .L2285+56
 	ldr	r0, [r3]
-	ldr	r3, [sp, #20]
-	str	r3, [sp, #16]
+	bl	ftl_memcpy
+.L2269:
+	ldr	r4, .L2285+40
+	ldr	r3, .L2285+16
+	ldr	r2, [r4]
+	cmp	r2, r3
+	bne	.L2270
+	ldr	r3, .L2285+60
+	ldrb	r2, [r4, #10]	@ zero_extendqisi2
+	ldrh	r5, [r4, #8]
+	ldrh	r3, [r3]
+	strh	r5, [r6, #6]	@ movhi
+	cmp	r2, r3
+	bne	.L2270
+	ldr	r3, .L2285+64
+	ldr	r2, .L2285+68
+	str	r5, [r3]
+	ldr	r3, .L2285+72
+	ldrh	r3, [r3]
+	muls	r3, r5, r3
+	str	r3, [r2]
+	ldr	r2, .L2285+76
+	ldrh	r2, [r2]
+	muls	r3, r2, r3
+	ldr	r2, .L2285+80
+	str	r3, [r2]
+	ldr	r3, .L2285+84
+	ldr	r6, [r3]
+	ldr	r3, .L2285+88
+	ldrh	r0, [r3, #6]
+	ldr	r3, .L2285+92
+	subs	r0, r6, r0
+	ldrh	r1, [r3]
+	subs	r0, r0, r5
+	bl	__aeabi_uidiv
+	ldr	r3, .L2285+96
+	cmp	r5, r6
+	strh	r0, [r3]	@ movhi
+	bls	.L2271
+	ldr	r1, .L2285+20
+	movw	r2, #1578
+	ldr	r0, .L2285+24
+	bl	printf
+	ldr	r1, .L2285+28
+	ldr	r0, .L2285+32
+	bl	printf
+.L2271:
+	ldrh	r2, [r4, #16]
+	ldr	r3, .L2285+100
+	ldrh	ip, [r4, #14]
+	ldr	r7, .L2285+104
+	lsrs	r1, r2, #6
+	and	r2, r2, #63
+	strb	r2, [r3, #6]
+	ldrb	r2, [r4, #11]	@ zero_extendqisi2
+	strh	r1, [r3, #2]	@ movhi
+	ldr	r1, .L2285+108
+	strb	r2, [r3, #8]
+	ldrh	r2, [r4, #18]
+	strh	ip, [r3]	@ movhi
+	movw	r3, #65535
+	strh	r3, [r7]	@ movhi
 	movs	r3, #0
-	mov	r5, r3
-	b	.L2372
-.LVL2615:
-.L2360:
-	.loc 1 2017 0
-	ldr	r1, [sp, #16]
-	ldrh	r2, [r1], #2
-	.loc 1 2018 0
-	cmp	r2, lr
-	.loc 1 2017 0
-	str	r1, [sp, #16]
-.LVL2616:
-	.loc 1 2018 0
-	beq	.L2359
-	.loc 1 2019 0
-	mla	r1, ip, r5, r0
-	.loc 1 2020 0
-	adds	r5, r5, #1
-.LVL2617:
-	.loc 1 2019 0
-	orr	r2, r4, r2, lsl #10
-.LVL2618:
-	.loc 1 2020 0
-	uxth	r5, r5
-.LVL2619:
-	.loc 1 2019 0
-	str	r2, [r1, #4]
-.LVL2620:
-.L2359:
-	adds	r3, r3, #1
-.LVL2621:
-.L2372:
-	.loc 1 2016 0 discriminator 1
-	ldr	r1, [sp, #36]
-	uxth	r2, r3
-	cmp	r2, r1
-	bcc	.L2360
-	.loc 1 2023 0
-	mov	r1, r5
-	ldr	r2, [sp, #32]
-	bl	FlashReadPages
-.LVL2622:
-	.loc 1 2033 0
-	ldr	r3, .L2493+4
-	movs	r2, #36
-	ldr	ip, .L2493+60
-	.loc 1 2027 0
-	movw	r1, #65535
-	.loc 1 2033 0
-	ldrb	r0, [r3]	@ zero_extendqisi2
-	ldr	r3, .L2493+16
-	ldr	r3, [r3]
-	mla	r5, r2, r5, r3
-.LVL2623:
-.L2361:
-	.loc 1 2024 0 discriminator 1
-	cmp	r5, r3
-	bne	.L2370
-	.loc 1 2014 0
-	adds	r4, r4, #1
-.LVL2624:
-	uxth	r4, r4
-.LVL2625:
-	b	.L2358
-.L2494:
-	.align	2
-.L2493:
-	.word	.LANCHOR52
-	.word	.LANCHOR8
-	.word	.LANCHOR16
-	.word	.LANCHOR37
-	.word	.LANCHOR177
-	.word	.LANCHOR105
-	.word	.LANCHOR58
-	.word	.LANCHOR157
-	.word	.LANCHOR228
-	.word	.LC6
-	.word	.LC7
-	.word	.LC8
-	.word	.LC46
-	.word	.LANCHOR229
-	.word	.LANCHOR133
-	.word	.LANCHOR117
-.L2370:
-	.loc 1 2025 0
-	ldr	r2, [r3]
-	cbnz	r2, .L2362
-	.loc 1 2026 0
-	ldr	r2, [r3, #12]
-.LVL2626:
-	.loc 1 2027 0
-	ldrh	lr, [r2]
-	cmp	lr, r1
-	beq	.L2363
-	.loc 1 2029 0
-	ldr	r2, [r2, #4]
-.LVL2627:
-	cmp	r2, #-1
-	beq	.L2363
-	.loc 1 2030 0
-	ldr	r6, [fp]
-.LVL2628:
-	.loc 1 2031 0
-	str	r2, [fp]
-.LVL2629:
-	.loc 1 2032 0
-	adds	r2, r7, #1
-	bne	.L2363
-	.loc 1 2032 0 is_stmt 0 discriminator 1
-	ldrh	r2, [ip, r4, lsl #1]
+	strh	r2, [r1]	@ movhi
+	ldrh	r2, [r4, #20]
+	strh	r3, [r7, #2]	@ movhi
+	strb	r3, [r7, #6]
+	strb	r3, [r7, #8]
+	lsrs	r5, r2, #6
+	and	r2, r2, #63
+	strb	r2, [r1, #6]
+	ldrb	r2, [r4, #12]	@ zero_extendqisi2
+	strh	r5, [r1, #2]	@ movhi
+	ldrh	r5, [r4, #22]
+	strb	r2, [r1, #8]
+	ldr	r2, .L2285+112
+	strh	r5, [r2]	@ movhi
+	ldrh	r5, [r4, #24]
+	lsrs	r6, r5, #6
+	and	r5, r5, #63
+	strb	r5, [r2, #6]
+	ldrb	r5, [r4, #13]	@ zero_extendqisi2
+	strh	r6, [r2, #2]	@ movhi
+	ldr	r6, [r4, #32]
+	strb	r5, [r2, #8]
+	ldr	r5, .L2285+116
+	str	r3, [r5]
+	ldr	r5, .L2285+120
+	str	r3, [r5]
+	ldr	r5, .L2285+124
+	str	r3, [r5]
+	ldr	r5, .L2285+128
+	str	r3, [r5]
+	ldr	r5, .L2285+132
+	str	r6, [r5]
+	mov	r6, r1
+	ldr	r5, .L2285+136
+	str	r3, [r5]
+	ldr	r5, .L2285+140
+	str	r3, [r5]
+	ldr	r5, .L2285+144
+	ldr	lr, [r4, #40]
+	str	r3, [r5]
+	ldr	r3, .L2285+148
+	ldr	r5, [r3]
+	cmp	lr, r5
+	mov	r5, r2
+	it	hi
+	strhi	lr, [r3]
+	ldr	r3, .L2285+152
+	ldr	r2, [r4, #36]
+	ldr	r1, [r3]
 	cmp	r2, r1
-	bne	.L2364
-	.loc 1 2033 0 is_stmt 1
-	cbz	r0, .L2363
-.L2364:
-	.loc 1 2034 0
-	ldr	r2, [sp]
-	cmp	r2, r6
-	it	ne
-	movne	r7, r6
-.LVL2630:
-.L2363:
-	adds	r3, r3, #36
-	b	.L2361
-.L2362:
-	.loc 1 2040 0
-	ldr	r3, .L2495
-	ldrh	r2, [r8]
-	strh	r2, [r3]	@ movhi
-	.loc 1 2041 0
-	ldrb	r3, [r8, #8]	@ zero_extendqisi2
-	cbnz	r3, .L2355
-	.loc 1 2043 0
-	ldr	r3, .L2495+4
-	ldrh	r2, [r3, r4, lsl #1]
+	it	hi
+	strhi	r2, [r3]
+	movw	r3, #65535
+	cmp	ip, r3
+	beq	.L2274
+	ldr	r0, .L2285+100
+	bl	make_superblock
+.L2274:
+	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L2366
-	.loc 1 2045 0
-	adds	r2, r7, #1
-	ldr	r3, .L2495+8
-	beq	.L2367
-	.loc 1 2046 0
-	str	r7, [r3]
-.LVL2631:
-.L2355:
-.LBE502:
-	.loc 1 2069 0
-	ldr	r3, .L2495+12
+	beq	.L2275
+	ldr	r0, .L2285+108
+	bl	make_superblock
+.L2275:
+	ldrh	r2, [r5]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L2276
+	ldr	r0, .L2285+112
+	bl	make_superblock
+.L2276:
+	ldrh	r2, [r7]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L2277
+	ldr	r0, .L2285+104
+	bl	make_superblock
+.L2277:
+	movs	r0, #0
+	b	.L2260
+.L2266:
+	ldrh	r2, [r6]
+	mov	r0, fp
+	str	r3, [sp, #4]
+	orr	r2, r7, r2, lsl #10
+	str	r2, [r4, #4]
+	ldr	r2, [r8]
+	str	r2, [r4, #8]
 	movs	r2, #1
-	.loc 1 2070 0
-	ldr	r0, .L2495+16
-	.loc 1 2079 0
-	ldr	r10, .L2495+64
-	.loc 1 2069 0
-	strh	r2, [r3]	@ movhi
-	.loc 1 2070 0
-	bl	FtlMapBlkWriteDumpData
-.LVL2632:
-	ldr	fp, [sp, #8]
-.LVL2633:
-.L2373:
-	.loc 1 2076 0
-	ldr	r3, .L2495+20
-	.loc 1 2078 0
-	movw	r7, #65535
-	.loc 1 2079 0
-	ldr	r0, [r10]
-	mov	ip, #36
-	.loc 1 2076 0
-	ldr	r1, [sp, #20]
-	movs	r2, #0
-	ldrh	r5, [r3]
-	.loc 1 2080 0
-	ldr	r3, .L2495+24
-	.loc 1 2075 0
-	str	r2, [sp, #16]
-	.loc 1 2080 0
-	ldrb	r6, [r3]	@ zero_extendqisi2
-.LVL2634:
-.L2374:
-	.loc 1 2076 0 discriminator 1
-	uxth	r3, r2
-	cmp	r5, r3
-	bhi	.L2377
-	.loc 1 2085 0
-	ldr	r2, [sp, #32]
-.LVL2635:
-	ldr	r1, [sp, #16]
+	mov	r1, r2
 	bl	FlashReadPages
-.LVL2636:
-	.loc 1 2086 0
-	movs	r3, #0
-.LVL2637:
-.L2490:
-	str	r3, [sp, #28]
-.LVL2638:
-	.loc 1 2086 0 is_stmt 0 discriminator 2
-	ldr	r2, [sp, #16]
-	ldrh	r3, [sp, #28]
-	cmp	r2, r3
-	bhi	.L2407
-	.loc 1 2243 0 is_stmt 1
-	ldrb	r3, [r8, #8]	@ zero_extendqisi2
-	.loc 1 2242 0
-	add	fp, fp, #1
-.LVL2639:
-	uxth	fp, fp
-.LVL2640:
-	.loc 1 2243 0
-	cmp	r3, #1
-	bne	.L2408
-	.loc 1 2243 0 is_stmt 0 discriminator 1
-	ldr	r3, .L2495+24
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2408
-	.loc 1 2244 0 is_stmt 1
-	ldr	r3, .L2495+28
-	ldrh	r3, [r3]
-	cmp	r3, fp
-	bne	.L2408
-	.loc 1 2244 0 is_stmt 0 discriminator 1
+	ldr	r2, [r4]
 	ldr	r3, [sp, #4]
-	cmp	r3, fp
-	beq	.L2382
-.L2408:
-	.loc 1 2248 0 is_stmt 1
-	ldr	r3, .L2495+32
-	ldrh	r3, [r3]
-	cmp	r3, fp
-	bne	.L2373
-	.loc 1 2251 0
-	ldr	r2, .L2495+20
-	.loc 1 2253 0
-	movw	r0, #65535
-	.loc 1 2250 0
-	movs	r3, #0
-	.loc 1 2249 0
-	strh	fp, [r8, #2]	@ movhi
-	.loc 1 2250 0
-	strh	r3, [r8, #4]	@ movhi
-.LVL2641:
-	.loc 1 2251 0
-	ldrh	r2, [r2]
-.LVL2642:
-.L2409:
-	.loc 1 2251 0 is_stmt 0 discriminator 1
-	uxth	r1, r3
-	cmp	r1, r2
-	bcs	.L2484
-	.loc 1 2252 0 is_stmt 1
-	ldr	r1, [sp, #20]
-	ldrh	r4, [r1], #2
-	.loc 1 2253 0
-	cmp	r4, r0
-	.loc 1 2252 0
-	str	r1, [sp, #20]
-.LVL2643:
-	add	r1, r3, #1
-	.loc 1 2253 0
-	bne	.L2491
-	mov	r3, r1
-.LVL2644:
-	b	.L2409
-.LVL2645:
-.L2367:
-.LBB503:
-	.loc 1 2047 0
-	ldr	r2, [sp]
-	ldr	r1, [sp, #28]
-	cmp	r2, r1
-	.loc 1 2050 0
-	itet	eq
-	ldreq	r2, [r3]
-	.loc 1 2048 0
-	movne	r2, r1
-	.loc 1 2050 0
-	addeq	r2, r2, #-1
-.L2487:
-	.loc 1 2064 0
-	str	r2, [r3]
-	b	.L2355
-.L2366:
-	.loc 1 2052 0
-	ldr	r3, [sp]
-	cmp	r6, r3
-	beq	.L2369
-	.loc 1 2053 0
-	adds	r3, r6, #1
-	beq	.L2355
-	.loc 1 2054 0
-	ldr	r3, .L2495+8
-	str	r6, [r3]
-	b	.L2355
-.L2369:
-	.loc 1 2055 0
-	ldr	r2, .L2495+8
-	ldr	r1, [sp]
-	ldr	r3, [r2]
-	cmp	r1, r3
-	beq	.L2355
-	.loc 1 2056 0
-	subs	r3, r3, #1
-	str	r3, [r2]
-	b	.L2355
-.L2371:
-	.loc 1 2064 0
-	mov	r2, #-1
-	ldr	r3, .L2495+8
-	b	.L2487
-.LVL2646:
-.L2377:
-.LBE503:
-	.loc 1 2077 0
-	ldrh	r3, [r1], #2
-.LVL2647:
-	.loc 1 2078 0
-	cmp	r3, r7
-	beq	.L2375
-	.loc 1 2079 0
-	ldr	r4, [sp, #16]
-	orr	r3, fp, r3, lsl #10
-.LVL2648:
-	mla	r4, ip, r4, r0
-	str	r3, [r4, #4]
-.LVL2649:
-	.loc 1 2080 0
-	ldrb	lr, [r8, #8]	@ zero_extendqisi2
-	cmp	lr, #1
-	bne	.L2376
-	.loc 1 2080 0 is_stmt 0 discriminator 1
-	cbz	r6, .L2376
-	.loc 1 2081 0 is_stmt 1
-	orr	r3, r3, #-2147483648
-	str	r3, [r4, #4]
-.L2376:
-	.loc 1 2082 0
-	ldr	r3, [sp, #16]
-	adds	r3, r3, #1
-	uxth	r3, r3
-	str	r3, [sp, #16]
-.LVL2650:
-.L2375:
 	adds	r2, r2, #1
-.LVL2651:
-	b	.L2374
-.LVL2652:
-.L2407:
-	ldr	r3, [sp, #28]
-	movs	r5, #36
-	.loc 1 2087 0
-	ldr	r7, [r10]
-	muls	r5, r3, r5
-	adds	r6, r7, r5
-	ldr	r4, [r6, #4]
-	.loc 1 2088 0
-	ubfx	r0, r4, #10, #16
-	.loc 1 2087 0
-	str	r4, [sp, #52]
-	.loc 1 2088 0
-	bl	P2V_plane
-.LVL2653:
-	.loc 1 2090 0
-	ldr	r3, [sp, #8]
-	cmp	fp, r3
-	bcc	.L2379
-	.loc 1 2090 0 is_stmt 0 discriminator 1
-	bne	.L2380
-	.loc 1 2091 0 is_stmt 1
-	ldr	r3, [sp, #24]
-	cmp	r3, r0
-	bhi	.L2379
-.L2380:
-	.loc 1 2094 0
-	ldr	r3, [sp, #4]
-	cmp	fp, r3
-	bne	.L2381
-	.loc 1 2094 0 is_stmt 0 discriminator 1
-	ldr	r3, [sp, #12]
-	cmp	r3, r0
-	beq	.L2382
-.L2381:
-.LVL2654:
-	.loc 1 2098 0 is_stmt 1
-	ldr	r3, [r7, r5]
-	adds	r3, r3, #1
-	beq	.L2383
-	.loc 1 2101 0
-	ldr	r6, [r6, #12]
-.LVL2655:
-	.loc 1 2102 0
-	movw	r3, #61589
-	ldrh	r2, [r6]
+	beq	.L2264
+	ldr	r2, [r8]
+	ldr	r2, [r2]
 	cmp	r2, r3
-	beq	.L2384
-.LVL2656:
-.L2391:
-.LBB504:
-	.loc 1 2135 0
-	ldrh	r0, [r8]
-.LVL2657:
-.L2489:
-.LBE504:
-	.loc 1 2219 0
-	bl	decrement_vpc_count
-.LVL2658:
-.L2379:
-	ldr	r3, [sp, #28]
-	adds	r3, r3, #1
-	b	.L2490
-.LVL2659:
-.L2384:
-	.loc 1 2108 0
-	ldr	r3, [r6, #4]
-	str	r3, [sp]
-.LVL2660:
-	.loc 1 2109 0
-	adds	r3, r3, #1
-.LVL2661:
-	beq	.L2385
-	.loc 1 2110 0 discriminator 1
-	ldr	r3, .L2495+36
-	ldr	r0, [sp]
-.LVL2662:
-	ldr	r1, [r3]
-	bl	ftl_cmp_data_ver
-.LVL2663:
-	.loc 1 2109 0 discriminator 1
-	cbz	r0, .L2385
-	.loc 1 2112 0
-	ldr	r2, [sp]
-	adds	r2, r2, #1
-	str	r2, [r3]
-.L2385:
-	.loc 1 2115 0
-	ldrh	r2, [r6]
-	movw	r3, #61589
-	cmp	r2, r3
-	beq	.L2386
-	.loc 1 2115 0 is_stmt 0 discriminator 1
-	ldr	r1, .L2495+40
-	movw	r2, #2115
-	ldr	r0, .L2495+44
-	bl	printf
-.LVL2664:
-	ldr	r1, .L2495+48
-	ldr	r0, .L2495+52
-	bl	printf
-.LVL2665:
-.L2386:
-	.loc 1 2116 0 is_stmt 1
-	ldr	r4, [r6, #8]
-.LVL2666:
-	.loc 1 2118 0
-	add	r1, sp, #48
-	.loc 1 2117 0
-	ldr	r3, [r6, #12]
-	.loc 1 2118 0
-	movs	r2, #0
-	mov	r0, r4
-	.loc 1 2117 0
-	str	r3, [sp, #44]
-	.loc 1 2118 0
-	bl	log2phys
-.LVL2667:
-	.loc 1 2119 0
-	ldr	r3, .L2495+8
-	ldr	r1, [r3]
-	adds	r7, r1, #1
-	beq	.L2387
-	.loc 1 2120 0 discriminator 1
-	ldr	r0, [sp]
-	bl	ftl_cmp_data_ver
-.LVL2668:
-	.loc 1 2119 0 discriminator 1
-	cmp	r0, #0
-	beq	.L2387
-.LBB505:
-	.loc 1 2124 0
-	ldr	r3, [sp, #44]
-	adds	r6, r3, #1
-.LVL2669:
-	beq	.L2388
-	.loc 1 2125 0
-	ldr	r0, [r10]
-	.loc 1 2127 0
-	movs	r2, #0
-	movs	r1, #1
-	.loc 1 2125 0
-	add	r0, r0, r5
-	.loc 1 2126 0
-	str	r3, [r0, #4]
-	.loc 1 2125 0
-	ldr	r6, [r0, #12]
-.LVL2670:
-	.loc 1 2127 0
-	bl	FlashReadPages
-.LVL2671:
-	.loc 1 2140 0
+	bne	.L2264
 	ldr	r2, [r10]
-	ldr	r1, [r2, r5]
-	adds	r3, r2, r5
-	adds	r1, r1, #1
-	bne	.L2389
-.LVL2672:
-.L2390:
-	.loc 1 2172 0
-	mov	r3, #-1
-	.loc 1 2173 0
-	ldrh	r0, [r8]
-	.loc 1 2172 0
-	str	r3, [sp, #44]
-	.loc 1 2173 0
-	bl	decrement_vpc_count
-.LVL2673:
-.L2398:
-.LBE505:
-	.loc 1 2213 0
-	ldr	r6, [sp, #44]
-	adds	r0, r6, #1
-	beq	.L2379
-.L2412:
-	.loc 1 2215 0
-	ubfx	r0, r6, #10, #16
-	bl	P2V_block_in_plane
-.LVL2674:
-	.loc 1 2216 0
-	ldr	r3, .L2495+56
-	.loc 1 2215 0
-	mov	r4, r0
-.LVL2675:
-	.loc 1 2216 0
-	ldrh	r3, [r3]
-	cmp	r3, r0
-	bhi	.L2403
-	.loc 1 2216 0 is_stmt 0 discriminator 1
-	ldr	r1, .L2495+40
-	movw	r2, #2216
-	ldr	r0, .L2495+44
-.LVL2676:
-	bl	printf
-.LVL2677:
-	ldr	r1, .L2495+48
-	ldr	r0, .L2495+52
-	bl	printf
-.LVL2678:
-.L2403:
-	.loc 1 2217 0 is_stmt 1
-	ldr	r3, .L2495+60
-	ldr	r3, [r3]
-	ldrh	r3, [r3, r4, lsl #1]
-	cmp	r3, #0
-	beq	.L2404
-	.loc 1 2219 0
-	mov	r0, r4
-	b	.L2489
-.LVL2679:
-.L2388:
-.LBB506:
-	.loc 1 2131 0
-	ldr	r3, [sp, #52]
-	ldr	r2, [sp, #48]
-	cmp	r2, r3
-	bne	.L2391
-	.loc 1 2132 0
-	movs	r2, #1
-	add	r1, sp, #44
-	mov	r0, r4
-	bl	log2phys
-.LVL2680:
-	b	.L2391
-.LVL2681:
-.L2389:
-	.loc 1 2140 0 discriminator 1
-	ldr	r1, [r6, #8]
-	cmp	r4, r1
-	bne	.L2390
-	.loc 1 2128 0 discriminator 2
-	ldr	r7, [r6, #4]
-	.loc 1 2141 0 discriminator 2
-	ldr	r0, .L2495+8
-	mov	r1, r7
-	ldr	r0, [r0]
-	bl	ftl_cmp_data_ver
-.LVL2682:
-	.loc 1 2140 0 discriminator 2
-	cmp	r0, #0
-	beq	.L2390
-	.loc 1 2142 0
-	ldr	r1, [sp, #48]
-	ldr	r0, [sp, #52]
-	cmp	r1, r0
-	bne	.L2393
-.L2396:
-	.loc 1 2168 0
-	ldr	r1, [sp, #44]
-	mov	r0, r4
-	bl	FtlReUsePrevPpa
-.LVL2683:
-	b	.L2390
-.L2496:
+	ldrh	r1, [r2]
+	movw	r2, #61604
+	cmp	r1, r2
+	beq	.L2265
+.L2264:
+	subs	r7, r7, #1
+	sxth	r7, r7
+	b	.L2263
+.L2286:
 	.align	2
-.L2495:
-	.word	.LANCHOR229
-	.word	.LANCHOR117
-	.word	.LANCHOR133
-	.word	.LANCHOR230
-	.word	.LANCHOR124
-	.word	.LANCHOR37
-	.word	.LANCHOR8
-	.word	.LANCHOR53
-	.word	.LANCHOR52
-	.word	.LANCHOR157
-	.word	.LANCHOR228
+.L2285:
+	.word	.LANCHOR40
+	.word	.LANCHOR202
+	.word	.LANCHOR84
+	.word	.LANCHOR209
+	.word	1179929683
+	.word	.LANCHOR221
+	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC8
-	.word	.LANCHOR39
-	.word	.LANCHOR83
-	.word	.LANCHOR177
-.L2393:
-	.loc 1 2145 0
-	ldr	r0, [sp, #44]
-	cmp	r1, r0
-	beq	.L2390
-	.loc 1 2146 0
-	adds	r0, r1, #1
-	beq	.L2394
-	.loc 1 2148 0
-	str	r1, [r3, #4]
-	.loc 1 2149 0
-	movs	r2, #0
-	movs	r1, #1
-	mov	r0, r3
-	.loc 1 2147 0
-	ldr	r6, [r3, #12]
-.LVL2684:
-	.loc 1 2149 0
-	bl	FlashReadPages
-.LVL2685:
-.L2395:
-	.loc 1 2154 0
-	ldr	r3, [r10]
-	ldr	r3, [r3, r5]
-	adds	r3, r3, #1
-	beq	.L2396
-	.loc 1 2155 0
-	ldr	r3, [r6, #4]
-.LVL2686:
-	.loc 1 2156 0
-	ldr	r2, .L2497
-	mov	r1, r3
-	ldr	r0, [r2]
-	bl	ftl_cmp_data_ver
-.LVL2687:
-	cmp	r0, #0
-	beq	.L2396
-	.loc 1 2157 0
-	mov	r1, r3
-	mov	r0, r7
-	bl	ftl_cmp_data_ver
-.LVL2688:
-	cmp	r0, #0
-	beq	.L2390
-.LVL2689:
-	b	.L2396
-.LVL2690:
-.L2394:
-	.loc 1 2151 0
-	str	r1, [r2, r5]
-	b	.L2395
-.L2387:
-.LBE506:
-	.loc 1 2174 0
-	ldr	r3, [sp, #52]
-	ldr	r2, [sp, #48]
-	cmp	r2, r3
-	beq	.L2398
-	.loc 1 2176 0
-	movs	r2, #1
-	add	r1, sp, #52
-	mov	r0, r4
-	bl	log2phys
-.LVL2691:
-	.loc 1 2177 0
-	ldr	r6, [sp, #48]
-.LVL2692:
-	adds	r5, r6, #1
-	beq	.L2398
-	.loc 1 2177 0 is_stmt 0 discriminator 1
-	ldr	r3, [sp, #44]
-	cmp	r6, r3
-	beq	.L2412
-	.loc 1 2178 0 is_stmt 1
-	ubfx	r0, r6, #10, #16
-	bl	P2V_block_in_plane
-.LVL2693:
-	.loc 1 2180 0
-	ldr	r3, .L2497+4
-	ldrh	r3, [r3]
-	cmp	r3, r0
-	beq	.L2402
-	.loc 1 2181 0 discriminator 1
-	ldr	r3, .L2497+8
-	.loc 1 2180 0 discriminator 1
-	ldrh	r3, [r3]
-	cmp	r3, r0
-	beq	.L2402
-	.loc 1 2182 0
-	ldr	r3, .L2497+12
-	.loc 1 2181 0
-	ldrh	r3, [r3]
-	cmp	r3, r0
-	bne	.L2398
-.L2402:
-.LVL2694:
-.LBB507:
-	.loc 1 2186 0
-	ldr	r0, [r10]
-.LVL2695:
-	.loc 1 2189 0
-	movs	r2, #0
-	movs	r1, #1
-	.loc 1 2188 0
-	str	r6, [r0, #4]
-	.loc 1 2186 0
-	ldr	r5, [r0, #12]
-.LVL2696:
-	.loc 1 2189 0
-	bl	FlashReadPages
-.LVL2697:
-	.loc 1 2192 0
-	ldr	r3, [r10]
-	ldr	r3, [r3]
-	adds	r3, r3, #1
-	beq	.L2398
-	.loc 1 2193 0
-	ldr	r1, [r5, #4]
-	ldr	r0, [sp]
-	bl	ftl_cmp_data_ver
-.LVL2698:
-	cmp	r0, #0
-	bne	.L2398
-	.loc 1 2200 0
-	movs	r2, #1
-	add	r1, sp, #48
-.LVL2699:
-	mov	r0, r4
-	bl	log2phys
-.LVL2700:
-	b	.L2398
-.LVL2701:
-.L2404:
-.LBE507:
-	.loc 1 2221 0
-	mov	r1, r4
-	ldr	r0, .L2497+16
-	bl	printf
-.LVL2702:
-	b	.L2379
-.LVL2703:
-.L2383:
-	.loc 1 2227 0
-	ldrh	r3, [r8]
-	.loc 1 2228 0
-	mov	r1, r4
-	.loc 1 2227 0
-	ldr	r2, .L2497+20
-	.loc 1 2228 0
-	ldr	r0, .L2497+24
-.LVL2704:
-	.loc 1 2227 0
-	strh	r3, [r2]	@ movhi
-	.loc 1 2228 0
-	ldr	r2, [sp]
-	bl	printf
-.LVL2705:
-	.loc 1 2229 0
-	ldr	r2, .L2497+28
-	ldr	r3, [r2]
-	cmp	r3, #31
-	bhi	.L2405
-	.loc 1 2230 0
-	ldr	r0, [sp, #52]
-	ldr	r1, .L2497+32
-	str	r0, [r1, r3, lsl #2]
-	.loc 1 2231 0
-	adds	r3, r3, #1
-	str	r3, [r2]
-.L2405:
-	.loc 1 2233 0
-	ldrh	r0, [r8]
-	bl	decrement_vpc_count
-.LVL2706:
-	.loc 1 2235 0
-	ldr	r3, .L2497
-	ldr	r2, [r3]
-	adds	r1, r2, #1
-	bne	.L2406
-	.loc 1 2236 0
-	ldr	r2, [sp]
-.L2488:
-	.loc 1 2238 0
-	str	r2, [r3]
-	b	.L2379
-.L2406:
-	.loc 1 2237 0
-	ldr	r1, [sp]
-	cmp	r1, r2
-	bcs	.L2379
-	.loc 1 2238 0
-	mov	r2, r1
-	b	.L2488
-.LVL2707:
-.L2382:
-.LDL3:
-	.loc 1 2267 0
-	ldrb	r3, [sp, #12]	@ zero_extendqisi2
-	.loc 1 2269 0
-	ldr	r2, [sp, #12]
-	.loc 1 2267 0
-	strb	r3, [r8, #6]
-	.loc 1 2268 0
-	ldrh	r3, [sp, #4]
-	strh	r3, [r8, #2]	@ movhi
-	b	.L2492
-.L2498:
-	.align	2
-.L2497:
-	.word	.LANCHOR133
-	.word	.LANCHOR91
+	.word	.LANCHOR58
+	.word	.LANCHOR81
+	.word	.LANCHOR0
+	.word	.LANCHOR70
+	.word	.LANCHOR67
+	.word	.LANCHOR195
+	.word	.LANCHOR45
+	.word	.LANCHOR222
+	.word	.LANCHOR73
+	.word	.LANCHOR53
+	.word	.LANCHOR56
+	.word	.LANCHOR69
+	.word	.LANCHOR42
+	.word	.LANCHOR75
+	.word	.LANCHOR38
+	.word	.LANCHOR223
 	.word	.LANCHOR92
+	.word	.LANCHOR204
 	.word	.LANCHOR93
-	.word	.LC47
-	.word	.LANCHOR229
-	.word	.LC48
-	.word	.LANCHOR231
-	.word	.LANCHOR232
-	.cfi_endproc
-.LFE372:
-	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
-	.section	.text.FtlGcScanTempBlk,"ax",%progbits
+	.word	.LANCHOR94
+	.word	.LANCHOR161
+	.word	.LANCHOR162
+	.word	.LANCHOR166
+	.word	.LANCHOR165
+	.word	.LANCHOR167
+	.word	.LANCHOR168
+	.word	.LANCHOR169
+	.word	.LANCHOR164
+	.word	.LANCHOR159
+	.word	.LANCHOR160
+	.word	.LANCHOR183
+	.word	.LANCHOR188
+	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
+	.section	.text.FtlDumpBlockInfo,"ax",%progbits
 	.align	1
-	.global	FtlGcScanTempBlk
+	.global	FtlDumpBlockInfo
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlGcScanTempBlk, %function
-FtlGcScanTempBlk:
-.LFB398:
-	.loc 6 227 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 24
+	.type	FtlDumpBlockInfo, %function
+FtlDumpBlockInfo:
+	@ args = 0, pretend = 0, frame = 64
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2708:
-	.loc 6 236 0
-	ldr	r3, .L2526
-	.loc 6 237 0
-	movw	r2, #65535
-	.loc 6 227 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	sub	sp, sp, #24
-	.cfi_def_cfa_offset 56
-	.loc 6 227 0
-	mov	r5, r0
-	.loc 6 236 0
-	ldrh	r4, [r3]
-.LVL2709:
-	str	r3, [sp, #16]
-	.loc 6 237 0
-	cmp	r4, r2
-	beq	.L2517
-	.loc 6 239 0
-	cbnz	r4, .L2500
-.L2501:
-	.loc 6 240 0
-	bl	FtlGcPageVarInit
-.LVL2710:
-	b	.L2502
-.LVL2711:
-.L2517:
-	.loc 6 238 0
-	movs	r4, #0
-.LVL2712:
-.L2500:
-	.loc 6 239 0 discriminator 1
-	ldr	r3, .L2526+4
-	ldrh	r3, [r3]
-	cmp	r3, r1
-	beq	.L2501
-.LVL2713:
-.L2502:
-	.loc 6 250 0
-	ldr	fp, .L2526+44
-	.loc 6 238 0
-	mov	r3, #-1
-	str	r3, [sp, #8]
-.LVL2714:
-.L2514:
-	.loc 6 244 0
-	ldrh	r2, [r5]
-	movw	r3, #65535
-	.loc 6 242 0
-	movs	r0, #0
-	strb	r0, [r5, #8]
-.LVL2715:
-	.loc 6 244 0
-	cmp	r2, r3
-	beq	.L2503
-.L2516:
-.LVL2716:
-	.loc 6 247 0
-	ldr	r3, .L2526+8
-	.loc 6 249 0
-	movw	ip, #65535
-	.loc 6 250 0
-	ldr	r0, [fp]
-	mov	lr, #36
-	.loc 6 247 0
-	ldrh	r8, [r3]
-	.loc 6 252 0
-	ldr	r3, .L2526+12
-	ldr	r3, [r3]
-	str	r3, [sp, #12]
-	ldr	r3, .L2526+16
-	ldrh	r10, [r3]
-	add	r3, r5, #16
-	str	r3, [sp, #4]
-	.loc 6 247 0
-	movs	r3, #0
-	.loc 6 246 0
-	mov	r6, r3
-.LVL2717:
-.L2504:
-	.loc 6 247 0 discriminator 1
-	uxth	r2, r3
-	cmp	r8, r2
-	bhi	.L2506
-	.loc 6 257 0
-	movs	r7, #0
-	mov	r10, #36
-	.loc 6 256 0
-	movs	r2, #0
+	ubfx	r0, r0, #10, #16
+	ldr	r4, .L2299
+	sub	sp, sp, #88
+	mov	r8, r1
+	ldrh	r3, [r4]
+	str	r3, [sp, #24]
+	bl	P2V_block_in_plane
+	ldr	r1, .L2299+4
+	mov	r6, r0
+	ldr	r0, .L2299+8
+	bl	printf
+	ldr	r3, .L2299+12
 	mov	r1, r6
-	bl	FlashReadPages
-.LVL2718:
-.L2507:
-	.loc 6 257 0 discriminator 1
-	uxth	r3, r7
-	cmp	r6, r3
-	bhi	.L2515
-	.loc 6 292 0
-	ldr	r3, .L2526+4
-	.loc 6 282 0
-	adds	r4, r4, #1
-.LVL2719:
-	uxth	r4, r4
-.LVL2720:
-	.loc 6 292 0
+	ldr	r0, .L2299+16
+	ldr	r3, [r3]
+	ldrh	r2, [r3, r6, lsl #1]
+	bl	printf
+	add	r0, sp, #88
+	strh	r6, [r0, #-48]!	@ movhi
+	bl	make_superblock
+	ldr	r3, .L2299+20
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	cbz	r5, .L2288
+	cmp	r8, #0
+	bne	.L2297
+	mov	r0, r6
+	bl	ftl_get_blk_mode
+	cmp	r0, #1
+	mov	r5, r0
+	bne	.L2288
+	ldr	r3, .L2299+24
 	ldrh	r3, [r3]
-	cmp	r3, r4
-	bhi	.L2516
-	.loc 6 283 0
-	movs	r0, #0
-	b	.L2503
-.LVL2721:
-.L2506:
-	.loc 6 248 0
-	ldr	r1, [sp, #4]
-	ldrh	r2, [r1], #2
-	.loc 6 249 0
-	cmp	r2, ip
-	.loc 6 248 0
-	str	r1, [sp, #4]
-.LVL2722:
-	.loc 6 249 0
-	beq	.L2505
-	.loc 6 250 0
-	mla	r1, lr, r6, r0
-	orr	r2, r4, r2, lsl #10
-.LVL2723:
-	str	r2, [r1, #4]
-.LVL2724:
-	.loc 6 251 0
+	str	r3, [sp, #24]
+.L2288:
+	movs	r6, #0
+	ldrh	r3, [r4]
+	ldr	r2, [sp, #24]
+	mov	r1, r5
+	ldr	r0, .L2299+28
+	bl	printf
+.L2289:
+	ldr	r3, .L2299+32
 	movs	r2, #0
-	str	r2, [r1, #8]
-	.loc 6 252 0
-	mul	r2, r10, r6
-	.loc 6 253 0
+	add	ip, sp, #54
+	mov	r4, r2
+	movw	r10, #65535
+	mov	fp, #36
+	ldrh	lr, [r3]
+	ldr	r3, .L2299+36
+	ldr	r0, [r3]
+	ldr	r3, .L2299+40
+	ldr	r3, [r3]
+	str	r3, [sp, #28]
+	ldr	r3, .L2299+44
+	ldrh	r3, [r3]
+	str	r3, [sp, #32]
+	ldr	r3, .L2299+48
+	ldr	r3, [r3]
+	str	r3, [sp, #36]
+	ldr	r3, .L2299+52
+	ldrh	r8, [r3]
+.L2290:
+	uxth	r3, r2
+	cmp	lr, r3
+	bhi	.L2292
+	ldr	fp, .L2299+56
+	mov	r8, #0
+	mov	r10, #36
+	mov	r2, r5
+	mov	r1, r4
+	bl	FlashReadPages
+.L2293:
+	uxth	r3, r8
+	cmp	r4, r3
+	bhi	.L2294
 	adds	r6, r6, #1
-.LVL2725:
+	ldr	r3, [sp, #24]
 	uxth	r6, r6
-.LVL2726:
-	.loc 6 252 0
-	bic	r2, r2, #3
-	mov	r7, r2
-	ldr	r2, [sp, #12]
-	add	r7, r7, r2
-	str	r7, [r1, #12]
-.L2505:
-.LVL2727:
-	adds	r3, r3, #1
-.LVL2728:
-	b	.L2504
-.LVL2729:
-.L2515:
-	mul	r8, r10, r7
-	.loc 6 258 0
-	ldr	r2, [fp]
-	str	r2, [sp, #20]
-	add	r3, r2, r8
-	ldr	r1, [r3, #4]
-	str	r3, [sp, #12]
-.LVL2730:
-	.loc 6 259 0
-	ubfx	r0, r1, #10, #16
-	str	r1, [sp, #4]
-	bl	P2V_plane
-.LVL2731:
-	.loc 6 261 0
-	ldr	r2, [sp, #20]
-	ldr	r1, [sp, #4]
-	ldr	r2, [r2, r8]
-	cbnz	r2, .L2508
-	.loc 6 263 0
-	ldr	r3, [sp, #12]
-	.loc 6 264 0
-	movw	ip, #65535
-	adds	r7, r7, #1
-.LVL2732:
-	.loc 6 263 0
-	ldr	r3, [r3, #12]
-.LVL2733:
-	.loc 6 264 0
-	ldrh	r2, [r3]
-	cmp	r2, ip
-	bne	.L2509
-	.loc 6 265 0
-	ldr	r3, .L2526+20
-.LVL2734:
-	movs	r2, #1
-	str	r2, [r3]
-.LVL2735:
-.L2503:
-	.loc 6 299 0
-	ldr	r2, [sp, #16]
-	movw	r3, #65535
-	.loc 6 301 0
-	strb	r0, [r5, #6]
-	.loc 6 302 0
-	mov	r1, r4
-	.loc 6 300 0
-	strh	r4, [r5, #2]	@ movhi
-	.loc 6 299 0
-	strh	r3, [r2]	@ movhi
-	.loc 6 302 0
-	mov	r2, r0
-	mov	r0, r5
-.LVL2736:
-	bl	ftl_sb_update_avl_pages
-.LVL2737:
-	.loc 6 304 0
-	ldr	r0, [sp, #8]
-	add	sp, sp, #24
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
+	cmp	r3, r6
+	bne	.L2289
+.L2295:
+	movs	r0, #0
+	add	sp, sp, #88
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL2738:
-.L2509:
-	.cfi_restore_state
-	.loc 6 268 0
-	ldr	r2, [r3, #8]
-	ldr	r0, [r3, #12]
-.LVL2739:
-	bl	FtlGcUpdatePage
-.LVL2740:
-	b	.L2507
-.LVL2741:
-.L2508:
-	.loc 6 271 0
-	mov	r2, r1
-	ldr	r0, .L2526+24
-.LVL2742:
-	ldrh	r1, [r5]
-.LVL2743:
-	bl	printf
-.LVL2744:
-	.loc 6 272 0
-	ldr	r3, .L2526+28
-	ldrh	r2, [r5]
-	ldr	r3, [r3]
-	cbnz	r3, .L2510
-	.loc 6 272 0 is_stmt 0 discriminator 2
-	ldr	r3, .L2526+32
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2511
-.L2510:
-	.loc 6 272 0 discriminator 3
-	ldr	r3, .L2526+36
-	ldr	r3, [r3]
-	ldrh	r3, [r3, r2, lsl #1]
-	cmp	r3, #119
-	bls	.L2512
-.L2511:
-	.loc 6 272 0 discriminator 5
-	ldr	r3, [fp]
-	ldr	r3, [r3, r8]
-	adds	r3, r3, #1
-	bne	.L2513
-.L2512:
-	.loc 6 273 0 is_stmt 1
-	ldr	r3, [fp]
-	add	r3, r3, r8
-	ldr	r3, [r3, #4]
-	str	r3, [sp, #8]
-.LVL2745:
-.L2513:
-	.loc 6 274 0
-	ldr	r3, .L2526+40
-	movs	r4, #0
-.LVL2746:
+.L2297:
+	movs	r5, #0
+	b	.L2288
+.L2292:
+	ldrh	r3, [ip, #2]!
+	cmp	r3, r10
+	beq	.L2291
+	mla	r1, fp, r4, r0
+	ldr	r7, [sp, #28]
+	orr	r3, r6, r3, lsl #10
+	str	r3, [r1, #4]
+	ldr	r3, [sp, #32]
+	muls	r3, r4, r3
+	bic	r3, r3, #3
+	add	r3, r3, r7
+	ldr	r7, [sp, #36]
+	str	r3, [r1, #8]
+	mul	r3, r8, r4
+	adds	r4, r4, #1
+	uxth	r4, r4
+	bic	r3, r3, #3
+	add	r3, r3, r7
+	str	r3, [r1, #12]
+.L2291:
+	adds	r2, r2, #1
+	b	.L2290
+.L2294:
+	ldr	r3, .L2299+36
+	mul	r0, r10, r8
+	ldrh	r1, [sp, #40]
+	add	r8, r8, #1
+	ldr	ip, [r3]
+	add	r2, ip, r0
+	ldr	lr, [r2, #8]
+	ldr	r3, [r2, #12]
+	ldr	r7, [lr, #4]
+	str	r7, [sp, #20]
+	ldr	r7, [lr]
+	str	r7, [sp, #16]
+	ldr	r7, [r3, #12]
+	str	r7, [sp, #12]
+	ldr	r7, [r3, #8]
+	str	r7, [sp, #8]
+	ldr	r7, [r3, #4]
+	str	r7, [sp, #4]
 	ldr	r3, [r3]
-	strh	r4, [r3, r2, lsl #1]	@ movhi
-	.loc 6 275 0
-	ldrh	r0, [r5]
-	bl	INSERT_FREE_LIST
-.LVL2747:
-	.loc 6 276 0
-	movw	r3, #65535
-	strh	r3, [r5]	@ movhi
-.LVL2748:
-	.loc 6 278 0
-	bl	FtlGcPageVarInit
-.LVL2749:
-	.loc 6 279 0
-	b	.L2514
-.L2527:
+	str	r3, [sp]
+	ldr	r3, [r2, #4]
+	ldr	r2, [ip, r0]
+	mov	r0, fp
+	bl	printf
+	b	.L2293
+.L2300:
 	.align	2
-.L2526:
-	.word	.LANCHOR233
-	.word	.LANCHOR52
-	.word	.LANCHOR37
+.L2299:
+	.word	.LANCHOR53
+	.word	.LANCHOR224
+	.word	.LC46
+	.word	.LANCHOR84
+	.word	.LC47
+	.word	.LANCHOR8
+	.word	.LANCHOR54
+	.word	.LC48
+	.word	.LANCHOR38
+	.word	.LANCHOR180
 	.word	.LANCHOR105
 	.word	.LANCHOR58
-	.word	.LANCHOR132
+	.word	.LANCHOR106
+	.word	.LANCHOR59
 	.word	.LC49
-	.word	.LANCHOR28
-	.word	.LANCHOR8
-	.word	.LANCHOR78
-	.word	.LANCHOR83
-	.word	.LANCHOR177
-	.cfi_endproc
-.LFE398:
-	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
-	.section	.text.FtlGcFreeTempBlock,"ax",%progbits
+	.size	FtlDumpBlockInfo, .-FtlDumpBlockInfo
+	.section	.text.FtlScanAllBlock,"ax",%progbits
 	.align	1
-	.global	FtlGcFreeTempBlock
+	.global	FtlScanAllBlock
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlGcFreeTempBlock, %function
-FtlGcFreeTempBlock:
-.LFB396:
-	.loc 6 111 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 16
+	.type	FtlScanAllBlock, %function
+FtlScanAllBlock:
+	@ args = 0, pretend = 0, frame = 64
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2750:
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 48
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 6 118 0
-	ldr	r3, .L2551
-	ldr	r3, [r3]
-	cbz	r3, .L2529
-.LVL2751:
-.L2534:
-	.loc 6 119 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #88
+	ldr	r6, .L2311
+	ldr	r1, .L2311+4
+	ldr	r0, .L2311+8
+	bl	printf
+	movs	r3, #0
+	str	r3, [sp, #28]
+.L2302:
+	ldr	r3, .L2311+12
+	ldrh	r0, [sp, #28]
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bhi	.L2310
 	movs	r0, #0
-.L2528:
-	.loc 6 215 0
-	add	sp, sp, #16
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
+	add	sp, sp, #88
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL2752:
-.L2529:
-	.cfi_restore_state
-	.loc 6 120 0
-	ldr	r0, .L2551+4
-.LVL2753:
-	movw	r3, #65535
-	ldr	r5, .L2551+8
-	ldrh	r6, [r0]
-	mov	r4, r0
-	cmp	r6, r3
-	beq	.L2531
-.LVL2754:
-	.loc 6 132 0
-	ldr	r3, .L2551+12
-	ldrh	r1, [r3]
-	bl	FtlGcScanTempBlk
-.LVL2755:
-	str	r0, [sp, #12]
-	.loc 6 133 0
-	adds	r0, r0, #1
-	beq	.L2531
-	.loc 6 136 0
-	ldr	r3, .L2551+16
+.L2310:
+	add	r4, sp, #88
+	add	r7, sp, #54
+	strh	r0, [r4, #-48]!	@ movhi
+	movw	r10, #65535
+	bl	ftl_get_blk_mode
+	ldr	r3, .L2311+16
+	mov	fp, #36
+	ldrh	r1, [sp, #28]
 	ldr	r2, [r3]
-	ldrh	r3, [r2, r6, lsl #1]
-	cmp	r3, #4
-	bls	.L2532
-	.loc 6 137 0
-	subs	r3, r3, #5
-	.loc 6 138 0
-	movs	r0, #1
-	.loc 6 137 0
-	strh	r3, [r2, r6, lsl #1]	@ movhi
-	.loc 6 138 0
-	bl	FtlEctTblFlush
-.LVL2756:
-.L2532:
-	.loc 6 140 0
-	ldr	r3, [r5]
-	cbnz	r3, .L2533
-	.loc 6 141 0
-	ldr	r2, .L2551+20
-	.loc 6 142 0
-	ldr	r0, [sp, #12]
-	.loc 6 141 0
-	ldr	r3, [r2, #96]
-	.loc 6 142 0
-	ubfx	r0, r0, #10, #16
-	.loc 6 141 0
-	adds	r3, r3, #1
-	str	r3, [r2, #96]
-	.loc 6 142 0
-	bl	FtlBbmMapBadBlock
-.LVL2757:
-	.loc 6 143 0
-	bl	FtlBbmTblFlush
-.LVL2758:
-.L2533:
-	.loc 6 145 0
-	movs	r3, #0
-	.loc 6 146 0
-	movs	r0, #1
-	.loc 6 145 0
-	str	r3, [r5]
-	.loc 6 146 0
-	b	.L2528
-.LVL2759:
-.L2531:
-	.loc 6 154 0
-	ldrh	r2, [r4]
-	.loc 6 153 0
-	movs	r3, #0
-	str	r3, [r5]
-	.loc 6 154 0
-	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L2534
-.LVL2760:
-	.loc 6 163 0
-	ldr	r6, .L2551+12
-	.loc 6 161 0
-	bl	FtlCacheWriteBack
-.LVL2761:
-	.loc 6 163 0
-	ldrb	r0, [r4, #7]	@ zero_extendqisi2
-	ldrh	r2, [r6]
-	ldr	r5, .L2551+24
-	muls	r2, r0, r2
-	ldrh	r1, [r5]
-	cmp	r1, r2
-	beq	.L2535
-	.loc 6 163 0 is_stmt 0 discriminator 1
-	ldr	r1, .L2551+28
-	movs	r2, #163
-	ldr	r0, .L2551+32
-	bl	printf
-.LVL2762:
-	ldr	r1, .L2551+36
-	ldr	r0, .L2551+40
-	bl	printf
-.LVL2763:
-.L2535:
-	.loc 6 164 0 is_stmt 1
-	ldrh	r6, [r6]
-	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	ldr	r2, .L2551+44
-	ldrh	r0, [r4]
-	.loc 6 168 0
-	ldr	fp, .L2551+84
-	.loc 6 164 0
-	smulbb	r3, r3, r6
-	ldr	r1, [r2]
-	.loc 6 166 0
-	movs	r6, #0
-	str	r2, [sp, #4]
-	.loc 6 164 0
-	strh	r3, [r1, r0, lsl #1]	@ movhi
-	.loc 6 165 0
-	ldr	r1, .L2551+48
-	ldrh	r3, [r5]
-	ldr	r0, [r1]
-	add	r3, r3, r0
-	str	r3, [r1]
-.LVL2764:
-.L2536:
-	.loc 6 166 0 discriminator 1
-	ldrh	r2, [r5]
-	uxth	r3, r6
-	cmp	r2, r3
-	bhi	.L2540
-	.loc 6 181 0
-	movw	r0, #65535
-	bl	decrement_vpc_count
-.LVL2765:
-	.loc 6 182 0
-	ldr	r3, .L2551+52
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2541
-	.loc 6 183 0
-	ldrh	r1, [r4]
-	ldr	r0, .L2551+56
+	mov	r3, r0
+	ldr	r0, .L2311+20
+	ldrh	r2, [r2, r1, lsl #1]
 	bl	printf
-.LVL2766:
-.L2541:
-	.loc 6 184 0
-	ldr	r3, [sp, #4]
-	ldrh	r0, [r4]
-	ldr	r3, [r3]
-	ldrh	r3, [r3, r0, lsl #1]
-	cmp	r3, #0
-	beq	.L2542
-	.loc 6 185 0
-	bl	INSERT_DATA_LIST
-.LVL2767:
-.L2543:
-	.loc 6 190 0
-	ldr	r3, .L2551+60
-	.loc 6 188 0
-	movw	r6, #65535
-.LVL2768:
-	strh	r6, [r4]	@ movhi
-	.loc 6 189 0
-	movs	r4, #0
-	strh	r4, [r5]	@ movhi
-	.loc 6 190 0
-	strh	r4, [r3]	@ movhi
-	.loc 6 191 0
-	bl	l2p_flush
-.LVL2769:
-	.loc 6 192 0
-	bl	FtlVpcTblFlush
-.LVL2770:
-	.loc 6 206 0
-	ldr	r3, .L2551+64
-	ldrh	r2, [r3]
-	ldr	r3, .L2551+68
-	ldrh	r3, [r3]
-	add	r3, r3, r3, lsl #1
-	cmp	r2, r3, asr #2
-	ble	.L2534
-	.loc 6 207 0
-	ldr	r3, .L2551+72
-	.loc 6 208 0
-	movs	r2, #20
-	.loc 6 214 0
 	mov	r0, r4
-	.loc 6 207 0
-	strh	r6, [r3]	@ movhi
-	.loc 6 208 0
-	ldr	r3, .L2551+76
-	strh	r2, [r3]	@ movhi
-	b	.L2528
-.LVL2771:
-.L2540:
-	.loc 6 167 0
-	uxth	r3, r6
-	movs	r7, #12
-	.loc 6 168 0
-	ldr	r2, [fp]
-	.loc 6 167 0
-	muls	r7, r3, r7
-	ldr	r3, .L2551+80
-	ldr	r8, [r3]
-	add	r10, r8, r7
-.LVL2772:
-	.loc 6 168 0
-	ldr	r1, [r10, #8]
-	cmp	r1, r2
-	bcc	.L2537
-	.loc 6 168 0 is_stmt 0 discriminator 1
-	ldr	r1, .L2551+28
-	movs	r2, #168
-	ldr	r0, .L2551+32
-	bl	printf
-.LVL2773:
-	ldr	r1, .L2551+36
-	ldr	r0, .L2551+40
-	bl	printf
-.LVL2774:
-.L2537:
-	.loc 6 169 0 is_stmt 1
+	bl	make_superblock
+	ldr	r3, .L2311+24
 	movs	r2, #0
-	add	r1, sp, #12
-	ldr	r0, [r10, #8]
-	bl	log2phys
-.LVL2775:
-	.loc 6 170 0
-	ldr	r2, [sp, #12]
-	ldr	r0, [r8, r7]
-	cmp	r0, r2
-	bne	.L2538
-	.loc 6 171 0
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-.LVL2776:
-	.loc 6 172 0
+	ldr	r0, [r6]
+	mov	r4, r2
+	ldrh	lr, [r3]
+	ldr	r3, .L2311+28
+	ldr	r3, [r3]
+	str	r3, [sp, #32]
+	ldr	r3, .L2311+32
+	ldrh	ip, [r3]
+	ldr	r3, .L2311+36
+	ldr	r3, [r3]
+	str	r3, [sp, #36]
+	ldr	r3, .L2311+40
+	ldrh	r8, [r3]
+.L2303:
+	uxth	r3, r2
+	cmp	lr, r3
+	bhi	.L2305
+	ldr	r10, .L2311+44
+	movs	r7, #0
+	mov	r8, #36
+	movs	r2, #0
+	mov	r1, r4
+	bl	FlashReadPages
+.L2306:
+	uxth	r3, r7
+	cmp	r4, r3
+	bhi	.L2307
+	ldr	r10, .L2311+48
+	movs	r7, #0
+	mov	r8, #36
 	movs	r2, #1
-	.loc 6 171 0
-	mov	r7, r0
-.LVL2777:
-	.loc 6 172 0
-	add	r1, r10, #4
-	ldr	r0, [r10, #8]
-	bl	log2phys
-.LVL2778:
-	.loc 6 173 0
-	mov	r0, r7
-.LVL2779:
-.L2550:
-	.loc 6 177 0
-	bl	decrement_vpc_count
-.LVL2780:
-.L2539:
-	adds	r6, r6, #1
-.LVL2781:
-	b	.L2536
-.LVL2782:
-.L2538:
-	.loc 6 175 0
-	ldr	r3, [r10, #4]
-	cmp	r2, r3
-	beq	.L2539
-	.loc 6 177 0
-	ldrh	r0, [r4]
-	b	.L2550
-.LVL2783:
-.L2542:
-	.loc 6 187 0
-	bl	INSERT_FREE_LIST
-.LVL2784:
-	b	.L2543
-.L2552:
+	mov	r1, r4
+	ldr	r0, [r6]
+	bl	FlashReadPages
+.L2308:
+	uxth	r3, r7
+	cmp	r4, r3
+	bhi	.L2309
+	ldr	r3, [sp, #28]
+	adds	r3, r3, #1
+	str	r3, [sp, #28]
+	b	.L2302
+.L2305:
+	ldrh	r3, [r7, #2]!
+	cmp	r3, r10
+	beq	.L2304
+	mla	r1, fp, r4, r0
+	ldr	r5, [sp, #32]
+	lsls	r3, r3, #10
+	str	r3, [r1, #4]
+	mul	r3, ip, r4
+	bic	r3, r3, #3
+	add	r3, r3, r5
+	ldr	r5, [sp, #36]
+	str	r3, [r1, #8]
+	mul	r3, r8, r4
+	adds	r4, r4, #1
+	uxth	r4, r4
+	bic	r3, r3, #3
+	add	r3, r3, r5
+	str	r3, [r1, #12]
+.L2304:
+	adds	r2, r2, #1
+	b	.L2303
+.L2307:
+	mul	r2, r8, r7
+	ldr	r0, [r6]
+	ldrh	r1, [sp, #40]
+	adds	r7, r7, #1
+	add	lr, r0, r2
+	ldr	fp, [lr, #8]
+	ldr	r3, [lr, #12]
+	ldr	r5, [fp, #4]
+	str	r5, [sp, #20]
+	ldr	r5, [fp]
+	str	r5, [sp, #16]
+	ldr	r5, [r3, #12]
+	str	r5, [sp, #12]
+	ldr	r5, [r3, #8]
+	str	r5, [sp, #8]
+	ldr	r5, [r3, #4]
+	str	r5, [sp, #4]
+	ldr	r3, [r3]
+	str	r3, [sp]
+	ldr	r2, [r0, r2]
+	mov	r0, r10
+	ldr	r3, [lr, #4]
+	bl	printf
+	b	.L2306
+.L2309:
+	mul	r2, r8, r7
+	ldr	r0, [r6]
+	ldrh	r1, [sp, #40]
+	adds	r7, r7, #1
+	add	lr, r0, r2
+	ldr	fp, [lr, #8]
+	ldr	r3, [lr, #12]
+	ldr	r5, [fp, #4]
+	str	r5, [sp, #20]
+	ldr	r5, [fp]
+	str	r5, [sp, #16]
+	ldr	r5, [r3, #12]
+	str	r5, [sp, #12]
+	ldr	r5, [r3, #8]
+	str	r5, [sp, #8]
+	ldr	r5, [r3, #4]
+	str	r5, [sp, #4]
+	ldr	r3, [r3]
+	str	r3, [sp]
+	ldr	r2, [r0, r2]
+	mov	r0, r10
+	ldr	r3, [lr, #4]
+	bl	printf
+	b	.L2308
+.L2312:
 	.align	2
-.L2551:
-	.word	.LANCHOR76
-	.word	.LANCHOR93
-	.word	.LANCHOR132
-	.word	.LANCHOR52
-	.word	.LANCHOR78
-	.word	.LANCHOR135
-	.word	.LANCHOR111
-	.word	.LANCHOR234
-	.word	.LC6
-	.word	.LC7
-	.word	.LC8
-	.word	.LANCHOR83
-	.word	.LANCHOR158
-	.word	.LANCHOR8
+.L2311:
+	.word	.LANCHOR180
+	.word	.LANCHOR225
+	.word	.LC46
+	.word	.LANCHOR41
+	.word	.LANCHOR84
 	.word	.LC50
-	.word	.LANCHOR109
-	.word	.LANCHOR88
-	.word	.LANCHOR227
-	.word	.LANCHOR201
-	.word	.LANCHOR173
-	.word	.LANCHOR110
-	.word	.LANCHOR72
-	.cfi_endproc
-.LFE396:
-	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
-	.section	.text.Ftl_get_new_temp_ppa,"ax",%progbits
-	.align	1
-	.global	Ftl_get_new_temp_ppa
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	Ftl_get_new_temp_ppa, %function
-Ftl_get_new_temp_ppa:
-.LFB400:
-	.loc 6 318 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 6 319 0
-	movw	r3, #65535
-	ldr	r4, .L2556
-	ldrh	r2, [r4]
-	cmp	r2, r3
-	beq	.L2554
-	.loc 6 319 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r4, #4]
-	cbnz	r3, .L2555
-.L2554:
-	.loc 6 320 0 is_stmt 1
-	bl	FtlCacheWriteBack
-.LVL2785:
-	.loc 6 321 0
-	movs	r0, #0
-	.loc 6 322 0
-	movs	r5, #0
-	.loc 6 321 0
-	bl	FtlGcFreeTempBlock
-.LVL2786:
-	.loc 6 323 0
-	ldr	r0, .L2556
-	.loc 6 322 0
-	strb	r5, [r4, #8]
-	.loc 6 323 0
-	bl	allocate_data_superblock
-.LVL2787:
-	.loc 6 324 0
-	ldr	r3, .L2556+4
-	strh	r5, [r3]	@ movhi
-	.loc 6 325 0
-	ldr	r3, .L2556+8
-	strh	r5, [r3]	@ movhi
-	.loc 6 326 0
-	bl	l2p_flush
-.LVL2788:
-	.loc 6 327 0
-	mov	r0, r5
-	bl	FtlEctTblFlush
-.LVL2789:
-	.loc 6 328 0
-	bl	FtlVpcTblFlush
-.LVL2790:
-.L2555:
-	.loc 6 330 0
-	ldr	r0, .L2556
-	.loc 6 331 0
-	pop	{r3, r4, r5, lr}
-	.cfi_restore 14
-	.cfi_restore 5
-	.cfi_restore 4
-	.cfi_restore 3
-	.cfi_def_cfa_offset 0
-	.loc 6 330 0
-	b	get_new_active_ppa
-.LVL2791:
-.L2557:
-	.align	2
-.L2556:
-	.word	.LANCHOR93
-	.word	.LANCHOR109
-	.word	.LANCHOR111
-	.cfi_endproc
-.LFE400:
-	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
-	.section	.text.Ftl_gc_temp_data_write_back,"ax",%progbits
+	.word	.LANCHOR38
+	.word	.LANCHOR105
+	.word	.LANCHOR58
+	.word	.LANCHOR106
+	.word	.LANCHOR59
+	.word	.LC51
+	.word	.LC52
+	.size	FtlScanAllBlock, .-FtlScanAllBlock
+	.section	.text.FtlMapTblRecovery,"ax",%progbits
 	.align	1
-	.global	Ftl_gc_temp_data_write_back
+	.global	FtlMapTblRecovery
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	Ftl_gc_temp_data_write_back, %function
-Ftl_gc_temp_data_write_back:
-.LFB401:
-	.loc 6 334 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
+	.type	FtlMapTblRecovery, %function
+FtlMapTblRecovery:
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 3, -24
-	.cfi_offset 4, -20
-	.cfi_offset 5, -16
-	.cfi_offset 6, -12
-	.cfi_offset 7, -8
-	.cfi_offset 14, -4
-	.loc 6 338 0
-	ldr	r3, .L2575
-	ldr	r5, .L2575+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2559
-	.loc 6 338 0 is_stmt 0 discriminator 1
-	ldr	r3, [r5]
-	lsls	r1, r3, #31
-	bpl	.L2559
-	.loc 6 338 0 discriminator 2
-	ldr	r3, .L2575+8
-	ldrh	r3, [r3, #4]
-	cbz	r3, .L2559
-.L2564:
-	.loc 6 339 0 is_stmt 1
-	movs	r0, #0
-	pop	{r3, r4, r5, r6, r7, pc}
-.L2559:
-	.loc 6 341 0
-	ldr	r4, .L2575+12
-	movs	r3, #0
+	ldr	r3, [r0, #16]
+	movs	r1, #0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #24
+	ldrh	fp, [r0, #6]
+	mov	r4, r0
 	movs	r6, #0
-.LBB510:
-.LBB511:
-	.loc 6 343 0
-	movs	r7, #36
-.LBE511:
-.LBE510:
-	.loc 6 341 0
+	ldr	r8, [r0, #24]
+	str	r3, [sp, #12]
+	ldrh	r3, [r0, #8]
+	lsl	r2, fp, #2
+	ldr	r10, [r0, #12]
+	mov	r0, r8
+	ldr	r5, .L2338
+	str	r3, [sp, #4]
+	bl	ftl_memset
+	ldr	r3, .L2338+4
+	str	r6, [r4, #32]
+	str	r6, [r4, #28]
+	ldr	r2, [r3]
+	str	r3, [sp, #8]
+	str	r2, [r5, #8]
+	ldr	r2, .L2338+8
+	ldr	r7, [r2]
+	movw	r2, #65535
+	str	r7, [r5, #12]
+	strh	r2, [r4]	@ movhi
+	strh	r2, [r4, #2]	@ movhi
+	movs	r2, #1
+	str	r2, [r4, #36]
+.L2314:
+	ldr	r2, [sp, #4]
+	sxth	r3, r6
+	cmp	r3, r2
+	bge	.L2332
+	ldr	r2, [sp, #4]
+	subs	r2, r2, #1
+	cmp	r3, r2
+	lsl	r2, r3, #1
+	bne	.L2315
+	ldrh	r0, [r10, r3, lsl #1]
+	movs	r1, #1
+	add	r5, r10, r2
+	str	r3, [sp, #4]
+	bl	FtlGetLastWrittenPage
+	ldr	r3, [sp, #12]
+	sxth	r10, r0
+	strh	r6, [r4]	@ movhi
+	movs	r6, #0
+	adds	r0, r0, #1
 	mov	r2, r3
-	ldr	r1, [r5]
-	ldr	r0, [r4]
-	bl	FlashProgPages
-.LVL2792:
-.L2561:
-.LBB514:
-.LBB512:
-	.loc 6 342 0
-	ldr	r1, [r5]
-	uxth	r3, r6
-	cmp	r3, r1
-	bcc	.L2563
-	.loc 6 356 0
-	ldr	r0, [r4]
-	bl	FtlGcBufFree
-.LVL2793:
-	.loc 6 357 0
-	movs	r3, #0
-	str	r3, [r5]
-	.loc 6 358 0
-	ldr	r3, .L2575+8
-	ldrh	r3, [r3, #4]
-	cmp	r3, #0
-	bne	.L2564
-	.loc 6 359 0
-	movs	r0, #1
-	bl	FtlGcFreeTempBlock
-.LVL2794:
-	b	.L2574
-.L2563:
-	.loc 6 343 0
-	muls	r3, r7, r3
-	ldr	r2, [r4]
+	ldr	r3, [sp, #4]
+	strh	r0, [r4, #2]	@ movhi
+	ldr	r3, [r2, r3, lsl #2]
+	str	r3, [r4, #28]
+	ldr	r3, .L2338
+.L2316:
+	sxth	r2, r6
+	cmp	r2, r10
+	ble	.L2319
+.L2332:
+	mov	r0, r4
+	bl	ftl_free_no_use_map_blk
+	ldr	r3, .L2338+12
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bne	.L2321
+	mov	r0, r4
+	bl	ftl_map_blk_alloc_new_blk
+.L2321:
+	mov	r0, r4
+	bl	ftl_map_blk_gc
+	mov	r0, r4
+	bl	ftl_map_blk_gc
+	movs	r0, #0
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2319:
+	ldrh	r1, [r5]
+	ldr	r0, .L2338
+	str	r3, [sp, #4]
+	orr	r2, r2, r1, lsl #10
+	str	r2, [r3, #4]
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+	ldr	r3, [sp, #4]
+	ldr	r2, [r3]
+	adds	r2, r2, #1
+	beq	.L2317
+	ldrh	r2, [r7, #8]
+	cmp	fp, r2
+	bls	.L2318
+	ldrh	r0, [r7]
+	ldrh	r1, [r4, #4]
+	cmp	r0, r1
+	bne	.L2318
+	ldr	r1, [r3, #4]
+	str	r1, [r8, r2, lsl #2]
+.L2318:
 	adds	r6, r6, #1
-.LVL2795:
-	ldr	r0, [r2, r3]
-	adds	r1, r2, r3
-	adds	r2, r0, #1
-	bne	.L2562
-	.loc 6 344 0
-	ldr	r2, .L2575+8
-	movs	r6, #0
-	ldr	r1, .L2575+16
-	ldrh	r5, [r2]
+	b	.L2316
+.L2317:
+	ldrh	r2, [r5]
+	strh	r2, [r4, #40]	@ movhi
+	b	.L2318
+.L2315:
+	ldr	r1, [sp, #8]
+	add	r2, r10, r2
+	str	r2, [sp, #16]
+	ldr	r0, .L2338
 	ldr	r1, [r1]
-	strh	r6, [r1, r5, lsl #1]	@ movhi
-	.loc 6 346 0
-	ldr	r1, .L2575+20
-	.loc 6 345 0
-	strh	r0, [r2]	@ movhi
-	.loc 6 346 0
-	ldr	r2, [r1, #96]
+	str	r1, [r5, #8]
+	ldrh	r1, [r10, r3, lsl #1]
+	ldr	r3, .L2338+12
+	ldrh	r2, [r3]
+	str	r3, [sp, #20]
+	subs	r2, r2, #1
+	orr	r2, r2, r1, lsl #10
+	str	r2, [r5, #4]
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+	ldr	r2, [r5]
 	adds	r2, r2, #1
-	str	r2, [r1, #96]
-	.loc 6 347 0
-	ldr	r2, [r4]
-	add	r3, r3, r2
-	ldr	r0, [r3, #4]
-	ubfx	r0, r0, #10, #16
-	bl	FtlBbmMapBadBlock
-.LVL2796:
-	.loc 6 348 0
-	bl	FtlBbmTblFlush
-.LVL2797:
-	.loc 6 349 0
-	bl	FtlGcPageVarInit
-.LVL2798:
-.L2574:
-	.loc 6 360 0
-	movs	r0, #1
-.LBE512:
-.LBE514:
-	.loc 6 363 0
-	pop	{r3, r4, r5, r6, r7, pc}
-.L2562:
-.LBB515:
-.LBB513:
-	.loc 6 352 0
-	ldr	r3, [r1, #12]
-.LVL2799:
-	.loc 6 353 0
-	ldr	r1, [r1, #4]
-	ldr	r2, [r3, #8]
-	ldr	r0, [r3, #12]
-	bl	FtlGcUpdatePage
-.LVL2800:
-	b	.L2561
-.L2576:
+	beq	.L2334
+	ldrh	r1, [r7]
+	ldrh	r2, [r4, #4]
+	ldr	r3, [sp, #20]
+	cmp	r1, r2
+	bne	.L2334
+	ldrh	r1, [r7, #8]
+	movw	r2, #64245
+	cmp	r1, r2
+	beq	.L2323
+.L2334:
+	movs	r3, #0
+.L2324:
+	ldr	r1, .L2338+12
+	sxth	r2, r3
+	ldrh	r1, [r1]
+	cmp	r2, r1
+	bge	.L2330
+	str	r3, [sp, #20]
+	ldr	r3, [sp, #16]
+	ldr	r0, .L2338
+	ldrh	r1, [r3]
+	orr	r2, r2, r1, lsl #10
+	str	r2, [r5, #4]
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+	ldr	r2, [r5]
+	ldr	r3, [sp, #20]
+	adds	r2, r2, #1
+	beq	.L2328
+	ldrh	r2, [r7, #8]
+	cmp	fp, r2
+	bls	.L2328
+	ldrh	r1, [r4, #4]
+	ldrh	r0, [r7]
+	cmp	r0, r1
+	itt	eq
+	ldreq	r1, [r5, #4]
+	streq	r1, [r8, r2, lsl #2]
+.L2328:
+	adds	r3, r3, #1
+	b	.L2324
+.L2323:
+	ldrh	r2, [r3]
+	movs	r1, #0
+	ldr	r3, [sp, #8]
+	subs	r2, r2, #1
+	ldr	ip, [r3]
+.L2325:
+	sxth	r3, r1
+	cmp	r3, r2
+	blt	.L2327
+.L2330:
+	adds	r6, r6, #1
+	b	.L2314
+.L2327:
+	lsls	r0, r3, #3
+	ldr	r3, [ip, r3, lsl #3]
+	adds	r1, r1, #1
+	uxth	lr, r3
+	cmp	fp, lr
+	itttt	hi
+	addhi	r0, r0, ip
+	movhi	r3, lr
+	ldrhi	r0, [r0, #4]
+	strhi	r0, [r8, r3, lsl #2]
+	b	.L2325
+.L2339:
 	.align	2
-.L2575:
-	.word	.LANCHOR8
-	.word	.LANCHOR102
-	.word	.LANCHOR93
-	.word	.LANCHOR178
-	.word	.LANCHOR83
-	.word	.LANCHOR135
-.LBE513:
-.LBE515:
-	.cfi_endproc
-.LFE401:
-	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
-	.section	.text.FtlGcPageRecovery,"ax",%progbits
+.L2338:
+	.word	.LANCHOR202
+	.word	.LANCHOR183
+	.word	.LANCHOR188
+	.word	.LANCHOR54
+	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
+	.section	.text.FtlLoadVonderInfo,"ax",%progbits
 	.align	1
-	.global	FtlGcPageRecovery
+	.global	FtlLoadVonderInfo
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlGcPageRecovery, %function
-FtlGcPageRecovery:
-.LFB399:
-	.loc 6 307 0
-	.cfi_startproc
+	.type	FtlLoadVonderInfo, %function
+FtlLoadVonderInfo:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 6 308 0
-	ldr	r4, .L2579
-	ldr	r5, .L2579+4
-	ldrh	r1, [r4]
-	mov	r0, r5
-	bl	FtlGcScanTempBlk
-.LVL2801:
-	.loc 6 309 0
-	ldrh	r2, [r5, #2]
-	ldrh	r3, [r4]
-	cmp	r2, r3
-	bcc	.L2577
-.LBB518:
-.LBB519:
-	.loc 6 311 0
-	ldr	r0, .L2579+8
-	bl	FtlMapBlkWriteDumpData
-.LVL2802:
-	.loc 6 312 0
+	push	{r3, lr}
+	ldr	r3, .L2341
+	ldr	r0, .L2341+4
+	ldrh	r3, [r3]
+	strh	r3, [r0, #10]	@ movhi
+	movw	r3, #61574
+	strh	r3, [r0, #4]	@ movhi
+	ldr	r3, .L2341+8
+	ldrh	r3, [r3]
+	strh	r3, [r0, #8]	@ movhi
+	ldr	r3, .L2341+12
+	ldrh	r3, [r3]
+	strh	r3, [r0, #6]	@ movhi
+	ldr	r3, .L2341+16
+	ldr	r3, [r3]
+	str	r3, [r0, #12]
+	ldr	r3, .L2341+20
+	ldr	r3, [r3]
+	str	r3, [r0, #16]
+	ldr	r3, .L2341+24
+	ldr	r3, [r3]
+	str	r3, [r0, #20]
+	ldr	r3, .L2341+28
+	ldr	r3, [r3]
+	str	r3, [r0, #24]
+	movw	r3, #65535
+	strh	r3, [r0, #40]	@ movhi
+	bl	FtlMapTblRecovery
 	movs	r0, #0
-	bl	FtlGcFreeTempBlock
-.LVL2803:
-	.loc 6 313 0
-	ldr	r3, .L2579+12
-	movs	r2, #0
-	str	r2, [r3]
-.L2577:
-	pop	{r3, r4, r5, pc}
-.L2580:
+	pop	{r3, pc}
+.L2342:
 	.align	2
-.L2579:
-	.word	.LANCHOR52
-	.word	.LANCHOR93
-	.word	.LANCHOR124
-	.word	.LANCHOR132
-.LBE519:
-.LBE518:
-	.cfi_endproc
-.LFE399:
-	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
-	.section	.text.FtlPowerLostRecovery,"ax",%progbits
+.L2341:
+	.word	.LANCHOR62
+	.word	.LANCHOR215
+	.word	.LANCHOR71
+	.word	.LANCHOR63
+	.word	.LANCHOR72
+	.word	.LANCHOR193
+	.word	.LANCHOR192
+	.word	.LANCHOR194
+	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
+	.section	.text.FtlLoadMapInfo,"ax",%progbits
 	.align	1
-	.global	FtlPowerLostRecovery
+	.global	FtlLoadMapInfo
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlPowerLostRecovery, %function
-FtlPowerLostRecovery:
-.LFB374:
-	.loc 1 2319 0
-	.cfi_startproc
+	.type	FtlLoadMapInfo, %function
+FtlLoadMapInfo:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 1 2320 0
-	movs	r4, #0
-	.loc 1 2322 0
-	ldr	r5, .L2582
-	.loc 1 2320 0
-	ldr	r3, .L2582+4
-	.loc 1 2322 0
-	mov	r0, r5
-	.loc 1 2320 0
-	str	r4, [r3]
-	.loc 1 2322 0
-	bl	FtlRecoverySuperblock
-.LVL2804:
-	.loc 1 2323 0
-	mov	r0, r5
-	.loc 1 2324 0
-	ldr	r5, .L2582+8
-	.loc 1 2323 0
-	bl	FtlSlcSuperblockCheck
-.LVL2805:
-	.loc 1 2324 0
-	mov	r0, r5
-	bl	FtlRecoverySuperblock
-.LVL2806:
-	.loc 1 2325 0
-	mov	r0, r5
-	bl	FtlSlcSuperblockCheck
-.LVL2807:
-	.loc 1 2326 0
-	bl	FtlGcPageRecovery
-.LVL2808:
-	.loc 1 2327 0
-	movw	r0, #65535
-	bl	decrement_vpc_count
-.LVL2809:
-	.loc 1 2329 0
-	mov	r0, r4
-	pop	{r3, r4, r5, pc}
-.L2583:
+	push	{r3, lr}
+	bl	FtlL2PDataInit
+	ldr	r0, .L2344
+	bl	FtlMapTblRecovery
+	movs	r0, #0
+	pop	{r3, pc}
+.L2345:
 	.align	2
-.L2582:
-	.word	.LANCHOR91
-	.word	.LANCHOR231
-	.word	.LANCHOR92
-	.cfi_endproc
-.LFE374:
-	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
-	.section	.text.FtlSysBlkInit,"ax",%progbits
+.L2344:
+	.word	.LANCHOR127
+	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
+	.section	.text.FtlGcScanTempBlk,"ax",%progbits
 	.align	1
-	.global	FtlSysBlkInit
+	.global	FtlGcScanTempBlk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlSysBlkInit, %function
-FtlSysBlkInit:
-.LFB381:
-	.loc 1 2603 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
+	.type	FtlGcScanTempBlk, %function
+FtlGcScanTempBlk:
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 3, -24
-	.cfi_offset 4, -20
-	.cfi_offset 5, -16
-	.cfi_offset 6, -12
-	.cfi_offset 7, -8
-	.cfi_offset 14, -4
-	.loc 1 2607 0
+	ldr	r3, .L2373
+	movw	r2, #65535
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #24
+	mov	r5, r0
+	ldrh	r4, [r3]
+	str	r3, [sp, #16]
+	cmp	r4, r2
+	beq	.L2364
+	cbnz	r4, .L2347
+.L2348:
+	bl	FtlGcPageVarInit
+	b	.L2349
+.L2364:
+	movs	r4, #0
+.L2347:
+	ldr	r3, .L2373+4
+	ldrh	r3, [r3]
+	cmp	r3, r1
+	beq	.L2348
+.L2349:
+	ldr	fp, .L2373+44
+	mov	r3, #-1
+	str	r3, [sp, #8]
+.L2361:
+	ldrh	r2, [r5]
+	movw	r3, #65535
+	movs	r0, #0
+	strb	r0, [r5, #8]
+	cmp	r2, r3
+	beq	.L2350
+.L2363:
+	ldr	r3, .L2373+8
+	movw	ip, #65535
+	ldr	r0, [fp]
+	mov	lr, #36
+	ldrh	r8, [r3]
+	ldr	r3, .L2373+12
+	ldr	r3, [r3]
+	str	r3, [sp, #12]
+	ldr	r3, .L2373+16
+	ldrh	r10, [r3]
+	add	r3, r5, #16
+	str	r3, [sp, #4]
 	movs	r3, #0
-	ldr	r4, .L2594
-	.loc 1 2608 0
-	movw	r5, #65535
-	.loc 1 2607 0
-	strh	r3, [r4]	@ movhi
-	.loc 1 2608 0
-	ldr	r3, .L2594+4
-	strh	r5, [r3]	@ movhi
-	.loc 1 2610 0
-	ldr	r3, .L2594+8
-	ldrh	r0, [r3]
-	bl	FtlFreeSysBlkQueueInit
-.LVL2810:
-	.loc 1 2611 0
-	bl	FtlScanSysBlk
-.LVL2811:
-	.loc 1 2612 0
-	ldr	r3, .L2594+12
+	mov	r6, r3
+.L2351:
+	uxth	r2, r3
+	cmp	r8, r2
+	bhi	.L2353
+	movs	r7, #0
+	mov	r10, #36
+	movs	r2, #0
+	mov	r1, r6
+	bl	FlashReadPages
+.L2354:
+	uxth	r3, r7
+	cmp	r6, r3
+	bhi	.L2362
+	ldr	r3, .L2373+4
+	adds	r4, r4, #1
+	uxth	r4, r4
 	ldrh	r3, [r3]
-	cmp	r3, r5
-	bne	.L2585
-.L2587:
-	.loc 1 2613 0
-	mov	r6, #-1
-.L2584:
-	.loc 1 2707 0
-	mov	r0, r6
-	pop	{r3, r4, r5, r6, r7, pc}
-.L2585:
-	.loc 1 2615 0
-	bl	FtlLoadSysInfo
-.LVL2812:
-	mov	r6, r0
-	cmp	r0, #0
-	bne	.L2587
-	.loc 1 2618 0
-	bl	FtlLoadMapInfo
-.LVL2813:
-	.loc 1 2619 0
-	bl	FtlLoadVonderInfo
-.LVL2814:
-	.loc 1 2620 0
-	bl	Ftl_load_ext_data
-.LVL2815:
-	.loc 1 2622 0
-	bl	FtlLoadEctTbl
-.LVL2816:
-	.loc 1 2623 0
-	bl	FtlFreeSysBLkSort
-.LVL2817:
-	.loc 1 2625 0
-	bl	SupperBlkListInit
-.LVL2818:
-	.loc 1 2626 0
-	bl	FtlPowerLostRecovery
-.LVL2819:
-	.loc 1 2628 0
-	movs	r0, #1
-	bl	FtlUpdateVaildLpn
-.LVL2820:
-.LBB523:
-.LBB524:
-	.loc 1 2630 0
-	ldr	r3, .L2594+16
-	.loc 1 2631 0
-	movs	r0, #12
-	.loc 1 2630 0
+	cmp	r3, r4
+	bhi	.L2363
+	movs	r0, #0
+	b	.L2350
+.L2353:
+	ldr	r1, [sp, #4]
+	ldrh	r2, [r1], #2
+	cmp	r2, ip
+	str	r1, [sp, #4]
+	beq	.L2352
+	mla	r1, lr, r6, r0
+	orr	r2, r4, r2, lsl #10
+	str	r2, [r1, #4]
+	movs	r2, #0
+	str	r2, [r1, #8]
+	mul	r2, r10, r6
+	adds	r6, r6, #1
+	uxth	r6, r6
+	bic	r2, r2, #3
+	mov	r7, r2
+	ldr	r2, [sp, #12]
+	add	r7, r7, r2
+	str	r7, [r1, #12]
+.L2352:
+	adds	r3, r3, #1
+	b	.L2351
+.L2362:
+	mul	r8, r10, r7
+	ldr	r2, [fp]
+	str	r2, [sp, #20]
+	add	r3, r2, r8
+	ldr	r1, [r3, #4]
+	str	r3, [sp, #12]
+	ubfx	r0, r1, #10, #16
+	str	r1, [sp, #4]
+	bl	P2V_plane
+	ldr	r2, [sp, #20]
+	ldr	r1, [sp, #4]
+	ldr	r2, [r2, r8]
+	cbnz	r2, .L2355
+	ldr	r3, [sp, #12]
+	movw	ip, #65535
+	adds	r7, r7, #1
+	ldr	r3, [r3, #12]
 	ldrh	r2, [r3]
-	.loc 1 2631 0
-	ldr	r3, .L2594+20
-	ldr	r1, [r3]
-	.loc 1 2630 0
-	mov	r3, r6
-.L2588:
-.LVL2821:
-	cmp	r3, r2
-	blt	.L2590
-	.loc 1 2636 0
-	ldrh	r3, [r4]
-.LVL2822:
-	cmp	r3, #0
-	beq	.L2584
-.L2589:
-	.loc 1 2637 0
-	ldr	r5, .L2594+24
-	.loc 1 2638 0
-	ldr	r4, .L2594+28
-	.loc 1 2637 0
+	cmp	r2, ip
+	bne	.L2356
+	ldr	r3, .L2373+20
+	movs	r2, #1
+	str	r2, [r3]
+.L2350:
+	ldr	r2, [sp, #16]
+	movw	r3, #65535
+	strb	r0, [r5, #6]
+	mov	r1, r4
+	strh	r4, [r5, #2]	@ movhi
+	strh	r3, [r2]	@ movhi
+	mov	r2, r0
 	mov	r0, r5
-	bl	FtlSuperblockPowerLostFix
-.LVL2823:
-	.loc 1 2638 0
-	mov	r0, r4
-	bl	FtlSuperblockPowerLostFix
-.LVL2824:
-.LBB525:
-	.loc 1 2643 0
-	ldr	r2, .L2594+32
-	ldrh	r0, [r5]
-	ldrh	r7, [r5, #4]
-	ldr	r1, [r2]
-	ldrh	r3, [r1, r0, lsl #1]
-	subs	r3, r3, r7
-	strh	r3, [r1, r0, lsl #1]	@ movhi
-	.loc 1 2644 0
-	ldr	r1, .L2594+36
-	.loc 1 2649 0
-	ldr	r0, [r2]
-	ldrh	r7, [r4, #4]
-	.loc 1 2644 0
-	ldrh	r3, [r1]
-	strh	r3, [r5, #2]	@ movhi
-	.loc 1 2645 0
-	movs	r3, #0
-	strb	r3, [r5, #6]
-	.loc 1 2646 0
-	strh	r3, [r5, #4]	@ movhi
-.LVL2825:
-	.loc 1 2649 0
-	ldrh	r5, [r4]
-	ldrh	r2, [r0, r5, lsl #1]
-	subs	r2, r2, r7
-	strh	r2, [r0, r5, lsl #1]	@ movhi
-	.loc 1 2650 0
-	ldrh	r2, [r1]
-.LBE525:
-	.loc 1 2662 0
-	ldr	r0, .L2594+40
-.LBB526:
-	.loc 1 2651 0
-	strb	r3, [r4, #6]
-	.loc 1 2650 0
-	strh	r2, [r4, #2]	@ movhi
-	.loc 1 2652 0
-	strh	r3, [r4, #4]	@ movhi
-.LBE526:
-	.loc 1 2662 0
-	bl	FtlMapBlkWriteDumpData
-.LVL2826:
-	.loc 1 2663 0
-	ldr	r0, .L2594+44
-	bl	FtlMapBlkWriteDumpData
-.LVL2827:
-	.loc 1 2675 0
-	ldr	r2, .L2594+48
-	ldrh	r3, [r2, #30]
-	adds	r3, r3, #1
-	strh	r3, [r2, #30]	@ movhi
-	.loc 1 2676 0
-	bl	l2p_flush
-.LVL2828:
-	.loc 1 2677 0
-	bl	FtlVpcTblFlush
-.LVL2829:
-	.loc 1 2678 0
-	bl	FtlVpcTblFlush
-.LVL2830:
-	b	.L2584
-.LVL2831:
-.L2590:
-	.loc 1 2631 0
-	mla	r5, r0, r3, r1
-	ldr	r5, [r5, #4]
-	cmp	r5, #0
-	blt	.L2589
-	.loc 1 2630 0
+	bl	ftl_sb_update_avl_pages
+	ldr	r0, [sp, #8]
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2356:
+	ldr	r2, [r3, #8]
+	ldr	r0, [r3, #12]
+	bl	FtlGcUpdatePage
+	b	.L2354
+.L2355:
+	mov	r2, r1
+	ldr	r0, .L2373+24
+	ldrh	r1, [r5]
+	bl	printf
+	ldr	r3, .L2373+28
+	ldrh	r2, [r5]
+	ldr	r3, [r3]
+	cbnz	r3, .L2357
+	ldr	r3, .L2373+32
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2358
+.L2357:
+	ldr	r3, .L2373+36
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r2, lsl #1]
+	cmp	r3, #159
+	bls	.L2359
+.L2358:
+	ldr	r3, [fp]
+	ldr	r3, [r3, r8]
 	adds	r3, r3, #1
-.LVL2832:
-	b	.L2588
-.L2595:
+	bne	.L2360
+.L2359:
+	ldr	r3, [fp]
+	add	r3, r3, r8
+	ldr	r3, [r3, #4]
+	str	r3, [sp, #8]
+.L2360:
+	ldr	r3, .L2373+40
+	movs	r4, #0
+	ldr	r3, [r3]
+	strh	r4, [r3, r2, lsl #1]	@ movhi
+	ldrh	r0, [r5]
+	bl	INSERT_FREE_LIST
+	movw	r3, #65535
+	strh	r3, [r5]	@ movhi
+	bl	FtlGcPageVarInit
+	b	.L2361
+.L2374:
 	.align	2
-.L2594:
-	.word	.LANCHOR230
-	.word	.LANCHOR229
+.L2373:
+	.word	.LANCHOR226
+	.word	.LANCHOR53
 	.word	.LANCHOR38
-	.word	.LANCHOR206
-	.word	.LANCHOR67
-	.word	.LANCHOR96
-	.word	.LANCHOR91
-	.word	.LANCHOR92
-	.word	.LANCHOR83
-	.word	.LANCHOR52
-	.word	.LANCHOR124
-	.word	.LANCHOR215
-	.word	.LANCHOR80
-.LBE524:
-.LBE523:
-	.cfi_endproc
-.LFE381:
-	.size	FtlSysBlkInit, .-FtlSysBlkInit
-	.section	.text.rk_ftl_garbage_collect,"ax",%progbits
+	.word	.LANCHOR106
+	.word	.LANCHOR59
+	.word	.LANCHOR135
+	.word	.LC53
+	.word	.LANCHOR28
+	.word	.LANCHOR8
+	.word	.LANCHOR79
+	.word	.LANCHOR84
+	.word	.LANCHOR180
+	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
+	.section	.text.FlashReadFacBbtData,"ax",%progbits
 	.align	1
-	.global	rk_ftl_garbage_collect
+	.global	FlashReadFacBbtData
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	rk_ftl_garbage_collect, %function
-rk_ftl_garbage_collect:
-.LFB407:
-	.loc 6 533 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 40
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2833:
-	.loc 6 541 0
-	ldr	r3, .L2686
-	.loc 6 533 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	sub	sp, sp, #40
-	.cfi_def_cfa_offset 72
-	.loc 6 541 0
-	ldr	r2, [r3]
-	cmp	r2, #0
-	bne	.L2648
-	.loc 6 544 0
-	ldr	r3, .L2686+4
-	ldr	r3, [r3]
-	cmp	r3, #0
-	bne	.L2648
-	.loc 6 547 0
-	ldr	r2, .L2686+8
-	ldrh	r2, [r2]
-	cmp	r2, #47
-	bls	.L2650
-.LVL2834:
-.LBB529:
-.LBB530:
-	.loc 6 555 0
-	ldr	r3, .L2686+12
-	movw	r5, #65535
-	ldrh	r4, [r3]
-	cmp	r4, r5
-	beq	.L2598
-	ldr	r1, .L2686+16
-.LVL2835:
-	ldrh	r2, [r1]
-	cmp	r2, r5
-	.loc 6 556 0
-	itt	eq
-	strheq	r4, [r1]	@ movhi
-	.loc 6 557 0
-	strheq	r2, [r3]	@ movhi
-.L2598:
-	.loc 6 676 0
-	cmp	r0, #0
-	bne	.L2651
-	.loc 6 677 0
-	ldr	r3, .L2686+20
-	ldrh	r3, [r3]
-	cmp	r3, #24
-	bhi	.L2652
-	ldr	r2, .L2686+24
-	.loc 6 679 0
-	cmp	r3, #16
-	.loc 6 680 0
-	ldrh	r4, [r2]
-	.loc 6 679 0
-	bls	.L2601
-	.loc 6 680 0
-	lsrs	r4, r4, #5
-.LVL2836:
-.L2600:
-	.loc 6 688 0
-	ldr	r2, .L2686+28
-	ldrh	r1, [r2]
-	cmp	r1, r3
+	.type	FlashReadFacBbtData, %function
+FlashReadFacBbtData:
+	@ args = 0, pretend = 0, frame = 48
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	fp, r2
+	ldr	r2, .L2388
+	sub	sp, sp, #48
+	mov	r6, r1
+	mov	r4, r0
+	ldr	r7, .L2388+4
+	ldrh	r3, [r2, #14]
+	ldrh	r2, [r2, #12]
+	smulbb	r3, r3, r2
+	ldr	r2, [r7]
+	uxth	r3, r3
+	str	r2, [sp, #20]
+	ldr	r2, .L2388+8
+	subs	r5, r3, #1
+	mul	r10, r6, r3
+	uxth	r5, r5
+	subs	r3, r3, #15
+	ldr	r1, [r2]
+	mov	r8, r2
+	str	r1, [sp, #24]
+.L2376:
+	cmp	r3, r5
+	ble	.L2383
+	mov	r0, #-1
+	b	.L2375
+.L2383:
+	add	r2, r5, r10
+	add	r0, sp, #12
+	lsls	r2, r2, #10
+	str	r3, [sp, #4]
+	str	r2, [sp, #16]
+	movs	r2, #1
 	mov	r1, r2
-	bcs	.L2604
-	.loc 6 689 0
-	ldr	r3, .L2686+32
-	movw	r0, #65535
-.LVL2837:
-	ldrh	r3, [r3]
-	cmp	r3, r0
-	bne	.L2605
-	ldr	r0, .L2686+16
-	ldrh	r0, [r0]
-	cmp	r0, r3
-	bne	.L2605
-	.loc 6 691 0
-	ldr	r3, .L2686+36
-	ldrh	r0, [r3]
-	cbnz	r0, .L2606
-	ldr	r3, .L2686+40
-	ldr	r4, .L2686+44
-.LVL2838:
-	ldr	r3, [r3]
-	ldr	r4, [r4]
-	add	r3, r3, r3, lsl #1
-	cmp	r4, r3, lsr #2
-	bcs	.L2607
-.L2606:
-	.loc 6 692 0
-	ldr	r3, .L2686+48
-	ldrh	r3, [r3]
-	add	r3, r3, r3, lsl #1
-	asrs	r3, r3, #2
-	strh	r3, [r1]	@ movhi
-.L2608:
-	.loc 6 695 0
-	ldr	r3, .L2686+52
-	movs	r2, #0
-	str	r2, [r3]
-.LVL2839:
-.L2596:
-.LBE530:
-.LBE529:
-	.loc 6 934 0
-	add	sp, sp, #40
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
+	bl	FlashReadPages
+	ldr	r2, [sp, #12]
+	ldr	r3, [sp, #4]
+	adds	r2, r2, #1
+	beq	.L2377
+	ldr	r2, [r8]
+	ldrh	r1, [r2]
+	movw	r2, #61664
+	cmp	r1, r2
+	bne	.L2377
+	cbz	r4, .L2384
+	cbz	r6, .L2379
+.L2382:
+	mov	r2, fp
+	ldr	r1, [r7]
+	mov	r0, r4
+	bl	ftl_memcpy
+	movs	r3, #4
+	ldr	r0, .L2388+12
+	mov	r2, r3
+	mov	r1, r4
+	bl	rknand_print_hex
+	movs	r0, #0
+.L2375:
+	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL2840:
-.L2601:
-	.cfi_restore_state
-.LBB532:
-.LBB531:
-	.loc 6 681 0
-	cmp	r3, #12
-	bls	.L2602
-	.loc 6 682 0
-	lsrs	r4, r4, #4
-.LVL2841:
-	b	.L2600
-.LVL2842:
-.L2602:
-	.loc 6 683 0
-	cmp	r3, #8
-	bls	.L2600
-	.loc 6 684 0
-	lsrs	r4, r4, #2
-.LVL2843:
-	b	.L2600
-.LVL2844:
-.L2652:
-	.loc 6 678 0
-	movs	r4, #1
-	b	.L2600
-.LVL2845:
-.L2607:
-	.loc 6 694 0
-	movs	r3, #18
-	strh	r3, [r2]	@ movhi
-	b	.L2608
-.LVL2846:
-.L2605:
-	.loc 6 698 0
-	ldr	r3, .L2686+48
-	ldrh	r3, [r3]
-	add	r3, r3, r3, lsl #1
-	asrs	r3, r3, #2
-	strh	r3, [r1]	@ movhi
-.L2604:
-	.loc 6 704 0
-	ldr	r3, .L2686+56
-	ldrh	r3, [r3]
-	cbz	r3, .L2599
-	.loc 6 705 0
-	adds	r4, r4, #32
-.LVL2847:
+.L2379:
+	ldr	r1, [r7]
+	mov	ip, #1
+	ldr	r5, .L2388+16
+.L2380:
+	ldr	r0, [r5]
+	uxth	r3, r6
+	adds	r6, r6, #1
+	cmp	r3, r0
+	bcs	.L2382
+	lsrs	r0, r3, #5
+	and	r3, r3, #31
+	lsl	r3, ip, r3
+	ldr	r2, [r1, r0, lsl #2]
+	orrs	r3, r3, r2
+	str	r3, [r1, r0, lsl #2]
+	b	.L2380
+.L2377:
+	subs	r5, r5, #1
+	uxth	r5, r5
+	b	.L2376
+.L2384:
+	mov	r0, r4
+	b	.L2375
+.L2389:
+	.align	2
+.L2388:
+	.word	.LANCHOR15
+	.word	.LANCHOR147
+	.word	.LANCHOR197
+	.word	.LC54
+	.word	.LANCHOR149
+	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
+	.section	.text.FlashGetBadBlockList,"ax",%progbits
+	.align	1
+	.global	FlashGetBadBlockList
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashGetBadBlockList, %function
+FlashGetBadBlockList:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r5, r0
+	ldr	r3, .L2400
+	ldr	r6, .L2400+4
+	ldr	r3, [r3]
+	ldr	r0, [r6]
+	ldrb	r4, [r3, #13]	@ zero_extendqisi2
+	ldrh	r3, [r3, #14]
+	smulbb	r4, r4, r3
 	uxth	r4, r4
-.LVL2848:
-.L2599:
-	.loc 6 753 0
-	ldr	r5, .L2686+60
-	movw	r3, #65535
-	ldrh	r2, [r5]
-	cmp	r2, r3
-	bne	.L2611
-	.loc 6 756 0
-	ldr	r3, .L2686+16
-	ldrh	r1, [r3]
-	cmp	r1, r2
-	beq	.L2612
-	.loc 6 760 0
-	ldr	r0, .L2686+64
-	ldr	r0, [r0]
-	ldrh	r1, [r0, r1, lsl #1]
-	cbnz	r1, .L2613
-	.loc 6 761 0
-	strh	r2, [r3]	@ movhi
-.L2613:
-	.loc 6 762 0
-	ldrh	r2, [r3]
-	strh	r2, [r5]	@ movhi
-	.loc 6 763 0
-	movw	r2, #65535
-	strh	r2, [r3]	@ movhi
-.L2612:
-	.loc 6 767 0
-	ldrh	r0, [r5]
-	movw	r6, #65535
-	.loc 6 766 0
-	movs	r3, #0
-	strb	r3, [r5, #8]
-	.loc 6 767 0
-	cmp	r0, r6
-	beq	.L2611
-	.loc 6 768 0
-	bl	IsBlkInGcList
-.LVL2849:
-	cbz	r0, .L2615
-	.loc 6 769 0
-	strh	r6, [r5]	@ movhi
-.L2615:
-	.loc 6 771 0
-	ldr	r3, .L2686+68
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2616
-	.loc 6 772 0
-	ldrh	r0, [r5]
-	bl	ftl_get_blk_mode
-.LVL2850:
-	strb	r0, [r5, #8]
-.L2616:
-	.loc 6 775 0
-	ldrh	r2, [r5]
-	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L2611
-	.loc 6 776 0
-	ldr	r0, .L2686+60
-	bl	make_superblock
-.LVL2851:
-	.loc 6 779 0
-	ldr	r2, .L2686+72
-	.loc 6 777 0
+	adds	r2, r4, #7
+	asrs	r2, r2, #3
+	bl	FlashReadFacBbtData
+	adds	r0, r0, #1
+	bne	.L2391
+.L2395:
 	movs	r3, #0
-	strh	r3, [r5, #2]	@ movhi
-	.loc 6 778 0
-	strb	r3, [r5, #6]
-	.loc 6 779 0
-	strh	r3, [r2]	@ movhi
-	.loc 6 780 0
-	ldr	r3, .L2686+64
-	ldrh	r2, [r5]
-	ldr	r3, [r3]
-	ldrh	r2, [r3, r2, lsl #1]
-	ldr	r3, .L2686+76
-	strh	r2, [r3]	@ movhi
-.L2611:
-	.loc 6 785 0
-	ldr	r2, .L2686+80
-	ldrh	r3, [r5]
-	ldrh	r2, [r2]
-	cmp	r2, r3
-	beq	.L2617
-	ldr	r2, .L2686+84
-	ldrh	r2, [r2]
-	cmp	r2, r3
-	beq	.L2617
-	.loc 6 791 0
-	ldr	r6, .L2686+60
-	mov	r5, r6
-.L2618:
-	ldrh	r2, [r6]
-	movw	r3, #65535
-	cmp	r2, r3
-	bne	.L2619
-	.loc 6 795 0
-	ldr	r10, .L2686+92
-	.loc 6 792 0
+.L2392:
+	movw	r2, #65535
+	movs	r0, #0
+	strh	r2, [r5, r3, lsl #1]	@ movhi
+	pop	{r3, r4, r5, r6, r7, pc}
+.L2391:
+	ldr	r7, [r6]
 	movs	r2, #0
-	ldr	r3, .L2686+52
-	mov	r7, r10
-	str	r2, [r3]
-.L2620:
-	.loc 6 795 0
-	ldrh	r8, [r10]
-	mov	r0, r8
-	bl	List_get_gc_head_node
-.LVL2852:
-	uxth	fp, r0
-	.loc 6 796 0
-	movw	r3, #65535
-	cmp	fp, r3
-	.loc 6 795 0
-	strh	fp, [r5]	@ movhi
-	.loc 6 796 0
-	bne	.L2621
-	.loc 6 797 0
-	movs	r3, #0
-	.loc 6 798 0
-	movs	r0, #8
-	.loc 6 797 0
-	strh	r3, [r10]	@ movhi
-	b	.L2596
-.LVL2853:
-.L2651:
-	.loc 6 534 0
-	movs	r4, #1
-	b	.L2599
-.LVL2854:
-.L2617:
-	.loc 6 786 0
-	movw	r3, #65535
-	strh	r3, [r5]	@ movhi
-.LVL2855:
-.L2684:
-	.loc 6 822 0
-	ldr	r3, .L2686+36
-	ldrh	r0, [r3]
-	b	.L2596
-.LVL2856:
-.L2621:
-	str	r0, [sp, #4]
-	.loc 6 800 0
-	mov	r0, fp
-	bl	IsBlkInGcList
-.LVL2857:
-	add	r3, r8, #1
-	ldr	r2, [sp, #4]
-	cbz	r0, .L2622
-	.loc 6 801 0
-	strh	r3, [r10]	@ movhi
-	b	.L2620
-.L2622:
-	.loc 6 814 0
-	ldr	r1, .L2686+24
-	.loc 6 804 0
-	uxth	r3, r3
-	.loc 6 814 0
-	ldr	lr, .L2686+96
-	uxth	r2, r2
-	ldr	r8, .L2686+64
-	ldrh	r1, [r1]
-	ldrh	lr, [lr]
-	ldr	r0, [r8]
-	.loc 6 804 0
-	strh	r3, [r10]	@ movhi
-	.loc 6 814 0
-	mul	r1, lr, r1
-	ldrh	ip, [r0, r2, lsl #1]
-	cmp	ip, r1, asr #1
-	bgt	.L2624
-	.loc 6 815 0
-	cmp	r3, #48
-	bls	.L2625
-	cmp	ip, #8
-	bls	.L2625
-	ldr	r3, .L2686+88
-	ldrh	r3, [r3]
-	cmp	r3, #35
-	bhi	.L2625
-.L2624:
-	.loc 6 816 0
-	movs	r3, #0
-	strh	r3, [r7]	@ movhi
-.L2625:
-	.loc 6 819 0
-	ldrh	r3, [r0, r2, lsl #1]
-	cmp	r1, r3
-	bgt	.L2626
-	.loc 6 820 0
-	movw	r3, #65535
-	strh	r3, [r5]	@ movhi
-	.loc 6 821 0
-	movs	r3, #0
-	strh	r3, [r7]	@ movhi
-	b	.L2684
-.L2626:
-	.loc 6 825 0
-	cbnz	r3, .L2627
-	.loc 6 826 0
-	movw	r0, #65535
-	bl	decrement_vpc_count
-.LVL2858:
-	.loc 6 827 0
-	ldrh	r3, [r7]
-	adds	r3, r3, #1
-	strh	r3, [r7]	@ movhi
-	b	.L2620
-.L2687:
+	lsr	ip, r4, #4
+	mov	r3, r2
+	subs	r4, r4, #1
+	mov	lr, #1
+.L2393:
+	uxth	r1, r2
+	cmp	r1, r4
+	bge	.L2392
+	lsrs	r6, r1, #5
+	and	r0, r1, #31
+	lsl	r0, lr, r0
+	adds	r2, r2, #1
+	ldr	r6, [r7, r6, lsl #2]
+	tst	r0, r6
+	ittt	ne
+	addne	r0, r3, #1
+	strhne	r1, [r5, r3, lsl #1]	@ movhi
+	uxthne	r3, r0
+	cmp	r3, ip
+	bcc	.L2393
+	b	.L2395
+.L2401:
 	.align	2
-.L2686:
-	.word	.LANCHOR76
-	.word	.LANCHOR168
-	.word	.LANCHOR85
-	.word	.LANCHOR113
-	.word	.LANCHOR112
-	.word	.LANCHOR88
-	.word	.LANCHOR52
-	.word	.LANCHOR173
-	.word	.LANCHOR93
-	.word	.LANCHOR235
-	.word	.LANCHOR72
-	.word	.LANCHOR100
-	.word	.LANCHOR227
-	.word	.LANCHOR169
-	.word	.LANCHOR114
-	.word	.LANCHOR201
-	.word	.LANCHOR83
-	.word	.LANCHOR8
-	.word	.LANCHOR236
-	.word	.LANCHOR237
-	.word	.LANCHOR91
-	.word	.LANCHOR92
-	.word	.LANCHOR109
-	.word	.LANCHOR175
-	.word	.LANCHOR37
-.L2627:
-	.loc 6 830 0
-	movs	r3, #0
-	strb	r3, [r5, #8]
-	.loc 6 831 0
-	ldr	r3, .L2688
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2628
-	.loc 6 832 0
-	mov	r0, fp
-	bl	ftl_get_blk_mode
-.LVL2859:
-	strb	r0, [r5, #8]
-.L2628:
-	.loc 6 835 0
-	ldr	r3, .L2688+4
-	ldrh	r3, [r3]
-	cmp	r3, fp
-	bne	.L2629
-	ldr	r1, .L2688+8
-	movw	r2, #835
-	ldr	r0, .L2688+12
-	bl	printf
-.LVL2860:
-	ldr	r1, .L2688+16
-	ldr	r0, .L2688+20
-	bl	printf
-.LVL2861:
-.L2629:
-	.loc 6 836 0
-	ldr	r3, .L2688+24
-	ldrh	r2, [r5]
-	ldrh	r3, [r3]
-	cmp	r2, r3
-	bne	.L2630
-	ldr	r1, .L2688+8
-	mov	r2, #836
-	ldr	r0, .L2688+12
-	bl	printf
-.LVL2862:
-	ldr	r1, .L2688+16
-	ldr	r0, .L2688+20
-	bl	printf
-.LVL2863:
-.L2630:
-	.loc 6 837 0
-	ldr	r3, .L2688+28
-	ldrh	r2, [r5]
-	ldrh	r3, [r3]
-	cmp	r2, r3
-	bne	.L2631
-	ldr	r1, .L2688+8
-	movw	r2, #837
-	ldr	r0, .L2688+12
-	bl	printf
-.LVL2864:
-	ldr	r1, .L2688+16
-	ldr	r0, .L2688+20
-	bl	printf
-.LVL2865:
-.L2631:
-	.loc 6 838 0
-	mov	r0, r6
-	bl	make_superblock
-.LVL2866:
-	.loc 6 839 0
-	ldr	r2, .L2688+32
-	movs	r3, #0
-	.loc 6 840 0
-	ldrh	r1, [r5]
-	.loc 6 839 0
-	strh	r3, [r2]	@ movhi
-	.loc 6 840 0
-	ldr	r2, [r8]
-	ldrh	r1, [r2, r1, lsl #1]
-	ldr	r2, .L2688+36
-	.loc 6 841 0
-	strh	r3, [r5, #2]	@ movhi
-	.loc 6 842 0
-	strb	r3, [r5, #6]
-	.loc 6 840 0
-	strh	r1, [r2]	@ movhi
-.L2619:
-	.loc 6 852 0
-	ldr	r3, .L2688+40
-	movs	r2, #1
-	str	r2, [r3]
-	.loc 6 853 0
-	ldr	r3, .L2688+44
+.L2400:
+	.word	.LANCHOR18
+	.word	.LANCHOR153
+	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
+	.section	.text.FtlMakeBbt,"ax",%progbits
+	.align	1
+	.global	FtlMakeBbt
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlMakeBbt, %function
+FtlMakeBbt:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2422
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r7, [r3]
+	cmp	r7, #0
+	bne	.L2403
+	ldr	r8, .L2422+40
+	ldr	r4, .L2422+4
+	bl	FtlBbtMemInit
+	sub	r10, r8, #18
+	bl	FtlLoadFactoryBbt
+.L2404:
+	ldr	r3, .L2422+8
 	ldrh	r3, [r3]
-	str	r3, [sp, #12]
-.LVL2867:
-	.loc 6 854 0
-	ldr	r3, .L2688
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2632
-	ldrb	r3, [r5, #8]	@ zero_extendqisi2
-	cmp	r3, r2
-	.loc 6 855 0
-	ittt	eq
-	ldreq	r3, .L2688+48
-	ldrheq	r3, [r3]
-	streq	r3, [sp, #12]
-.LVL2868:
-.L2632:
-	.loc 6 856 0
-	ldrh	r3, [r5, #2]
-	ldr	r1, [sp, #12]
-	.loc 6 864 0
-	ldr	fp, .L2688+80
-	.loc 6 856 0
-	adds	r2, r3, r4
+	cmp	r7, r3
+	bcc	.L2410
+	ldr	r5, .L2422+12
+	movs	r4, #0
+.L2411:
+	ldrh	r3, [r5]
+	uxth	r0, r4
+	adds	r4, r4, #1
+	cmp	r3, r0
+	bhi	.L2412
+	ldr	r4, .L2422+16
+	movw	r6, #65535
+	ldrh	r5, [r4, #12]
+	subs	r5, r5, #1
+	uxth	r5, r5
+.L2413:
+	ldrh	r3, [r4, #12]
+	subs	r3, r3, #47
+	cmp	r3, r5
+	bgt	.L2417
+	mov	r0, r5
+	bl	FtlBbmIsBadBlock
+	cmp	r0, #1
+	beq	.L2414
+	mov	r0, r5
+	bl	FlashTestBlk
+	cmp	r0, #0
+	beq	.L2415
+	mov	r0, r5
+	bl	FtlBbmMapBadBlock
+.L2414:
+	subs	r5, r5, #1
+	uxth	r5, r5
+	b	.L2413
+.L2410:
+	ldr	r3, .L2422+20
+	movw	r1, #65535
+	ldrh	r2, [r10, #2]!
+	ldr	r0, [r3]
+	ldr	r3, .L2422+24
 	cmp	r2, r1
-	.loc 6 857 0
-	itt	gt
-	movgt	r2, r1
-	subgt	r4, r2, r3
-.LVL2869:
-	.loc 6 869 0
-	mov	r3, #0
-	.loc 6 857 0
-	it	gt
-	uxthgt	r4, r4
-.LVL2870:
-	.loc 6 869 0
-	str	r3, [sp, #8]
-.LVL2871:
-.L2634:
-	.loc 6 859 0
-	ldrh	r3, [sp, #8]
-	cmp	r4, r3
-	bls	.L2642
-	.loc 6 861 0
-	ldr	r3, .L2688+52
-	.loc 6 863 0
-	movw	r8, #65535
-	.loc 6 864 0
-	ldrh	lr, [r6, #2]
-	mov	r10, #36
-	ldr	r0, [fp]
-	.loc 6 861 0
-	ldrh	r7, [r3]
-	.loc 6 864 0
-	ldr	r3, [sp, #8]
-	add	lr, lr, r3
-	ldr	r3, .L2688+56
-	str	r3, [sp, #16]
-	movs	r3, #0
+	str	r0, [r4, #8]
+	ldr	fp, [r3]
 	str	r3, [sp, #4]
-	b	.L2643
-.LVL2872:
-.L2636:
-	.loc 6 862 0
-	ldr	r1, [sp, #16]
-	ldrh	r2, [r1, #2]!
-	.loc 6 863 0
-	cmp	r2, r8
-	.loc 6 862 0
-	str	r1, [sp, #16]
-.LVL2873:
-	.loc 6 863 0
-	beq	.L2635
-	.loc 6 864 0
-	ldr	r1, [sp, #4]
-	orr	r2, lr, r2, lsl #10
-.LVL2874:
-	mla	ip, r10, r1, r0
-	str	r2, [ip, #4]
-.LVL2875:
-	.loc 6 865 0
-	mov	r2, r1
-	adds	r2, r2, #1
-	uxth	r2, r2
-	str	r2, [sp, #4]
-.LVL2876:
-.L2635:
-	adds	r3, r3, #1
-.LVL2877:
-.L2643:
-	.loc 6 861 0
-	uxth	r2, r3
-	cmp	r7, r2
-	bhi	.L2636
-	.loc 6 869 0
-	ldrb	r2, [r6, #8]	@ zero_extendqisi2
-	ldr	r1, [sp, #4]
+	ldr	r3, .L2422+28
+	str	fp, [r4, #12]
+	beq	.L2405
+	ldrh	r6, [r3]
+	mov	r0, r4
+	str	r3, [sp]
+	mla	r6, r7, r6, r2
+	lsls	r2, r6, #10
+	str	r2, [r4, #4]
+	movs	r2, #1
+	mov	r1, r2
 	bl	FlashReadPages
-.LVL2878:
+	ldr	r3, [sp]
+	ldr	r1, [r4, #8]
+	ldr	r0, [r8]
+	ldrh	r2, [r3]
+	adds	r2, r2, #7
+	asrs	r2, r2, #3
+	bl	ftl_memcpy
+.L2406:
+	uxth	r0, r6
+	adds	r7, r7, #1
+	add	r8, r8, #4
+	bl	FtlBbmMapBadBlock
+	b	.L2404
+.L2405:
+	mov	r1, r7
+	str	r3, [sp]
+	bl	FlashGetBadBlockList
+	ldr	r1, [r8]
+	ldr	r0, [r4, #8]
+	bl	FtlBbt2Bitmap
+	ldr	r3, [sp]
+	ldrh	r5, [r3]
+.L2408:
+	subs	r5, r5, #1
+	uxth	r5, r5
+.L2407:
+	ldr	r3, [sp]
+	ldrh	r0, [r3]
+	smlabb	r0, r0, r7, r5
+	uxth	r0, r0
+	bl	FtlBbmIsBadBlock
+	cmp	r0, #1
+	beq	.L2408
+	ldr	r3, [sp, #4]
+	movs	r2, #16
+	movs	r1, #0
+	strh	r5, [r10]	@ movhi
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldr	r2, [sp]
+	movw	r3, #61664
+	strh	r3, [fp]	@ movhi
 	movs	r3, #0
-.LVL2879:
-.L2683:
-	str	r3, [sp, #16]
-.LVL2880:
-	.loc 6 871 0
-	ldr	r2, [sp, #4]
-	ldrh	r3, [sp, #16]
-	cmp	r2, r3
-	bhi	.L2641
-.LVL2881:
-	ldr	r3, [sp, #8]
+	str	r3, [fp, #4]
+	ldrh	r6, [r2]
+	ldrh	r3, [r10]
+	ldr	r1, [r8]
+	ldr	r0, [r4, #8]
+	strh	r3, [fp, #2]	@ movhi
+	mla	r6, r7, r6, r3
+	lsls	r3, r6, #10
+	str	r3, [r4, #4]
+	ldr	r3, .L2422+32
+	ldrh	r2, [r3]
+	lsls	r2, r2, #2
+	bl	ftl_memcpy
+	movs	r2, #1
+	mov	r0, r4
+	mov	r1, r2
+	bl	FlashEraseBlocks
+	movs	r3, #1
+	mov	r0, r4
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+	ldr	r3, [r4]
 	adds	r3, r3, #1
-	str	r3, [sp, #8]
-.LVL2882:
-	b	.L2634
-.LVL2883:
-.L2641:
-	ldr	r3, [sp, #16]
-	movs	r7, #36
-	muls	r7, r3, r7
-	.loc 6 872 0
-	ldr	r3, [fp]
-	adds	r2, r3, r7
-.LVL2884:
-	.loc 6 873 0
-	ldr	r3, [r3, r7]
-	adds	r3, r3, #1
-	beq	.L2638
-	.loc 6 872 0
-	ldr	r10, [r2, #12]
-	.loc 6 873 0
-	movw	r3, #61589
-	ldrh	r2, [r10]
-.LVL2885:
-	cmp	r2, r3
-	bne	.L2638
-	.loc 6 875 0
-	ldr	r8, [r10, #8]
-.LVL2886:
-	.loc 6 876 0
-	cmp	r8, #-1
-	bne	.L2639
-	ldr	r1, .L2688+8
-	mov	r2, #876
-	ldr	r0, .L2688+12
-	bl	printf
-.LVL2887:
-	ldr	r1, .L2688+16
-	ldr	r0, .L2688+20
-	bl	printf
-.LVL2888:
-.L2639:
-	.loc 6 877 0
-	movs	r2, #0
-	add	r1, sp, #36
-	mov	r0, r8
-	bl	log2phys
-.LVL2889:
-	.loc 6 878 0
-	ldr	r0, [fp]
-	ldr	r3, [sp, #36]
-	add	r0, r0, r7
-	ldr	r2, [r0, #4]
-	bic	r3, r3, #-2147483648
-	cmp	r3, r2
-	bne	.L2638
-	.loc 6 880 0
-	ldr	r2, .L2688+32
-	.loc 6 881 0
-	ldr	r8, .L2688+68
-.LVL2890:
-	ldr	r1, .L2688+60
-	.loc 6 880 0
-	ldrh	r3, [r2]
-	.loc 6 881 0
-	ldr	r0, [r0, #16]
-	str	r1, [sp, #28]
-	.loc 6 880 0
-	adds	r3, r3, #1
-	strh	r3, [r2]	@ movhi
-	.loc 6 881 0
-	movs	r2, #36
-	ldr	r3, [r8]
-	str	r2, [sp, #24]
-	str	r3, [sp, #20]
-	ldr	r3, [r1]
-	ldr	r1, [sp, #20]
-	mla	r3, r2, r1, r3
-	str	r0, [r3, #16]
-	str	r3, [sp, #20]
-	.loc 6 882 0
-	bl	Ftl_get_new_temp_ppa
-.LVL2891:
-	ldr	r3, [sp, #20]
-	.loc 6 883 0
-	ldr	r1, [sp, #28]
-	ldr	r2, [sp, #24]
-	.loc 6 882 0
-	str	r0, [r3, #4]
-	.loc 6 883 0
-	ldr	r1, [r1]
-	ldr	r3, [r8]
-	mla	r1, r2, r3, r1
-	ldr	r3, [fp]
-	add	r3, r3, r7
-	ldr	r2, [r3, #8]
-	str	r2, [r1, #8]
-	.loc 6 884 0
-	ldr	r3, [r3, #12]
-	str	r3, [r1, #12]
-	.loc 6 892 0
+	bne	.L2406
+	uxth	r0, r6
+	bl	FtlBbmMapBadBlock
+	b	.L2407
+.L2412:
+	bl	FtlBbmMapBadBlock
+	b	.L2411
+.L2415:
+	ldrh	r3, [r4]
+	cmp	r3, r6
+	bne	.L2416
+	strh	r5, [r4]	@ movhi
+	b	.L2414
+.L2416:
+	strh	r5, [r4, #4]	@ movhi
+.L2417:
+	ldr	r3, .L2422+36
+	movs	r5, #0
+	str	r5, [r4, #8]
+	movs	r2, #2
 	movs	r1, #1
-	.loc 6 885 0
-	ldr	r3, [sp, #36]
-	str	r3, [r10, #12]
-	.loc 6 886 0
-	ldr	r3, .L2688+28
-	ldrh	r2, [r3]
-	str	r3, [sp, #20]
-	strh	r2, [r10, #2]	@ movhi
-	.loc 6 889 0
-	ldr	r2, .L2688+64
-	.loc 6 892 0
-	ldr	r0, [fp]
-	.loc 6 889 0
-	ldr	r2, [r2]
-	.loc 6 892 0
-	add	r0, r0, r7
-	.loc 6 889 0
-	str	r2, [r10, #4]
-	.loc 6 891 0
-	ldr	r2, [r8]
-	adds	r2, r2, #1
-	str	r2, [r8]
-	.loc 6 892 0
-	bl	FtlGcBufAlloc
-.LVL2892:
-	.loc 6 893 0
-	ldr	r2, .L2688
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbnz	r2, .L2640
-	ldr	r3, [sp, #20]
-	ldr	r2, [r8]
-	ldrb	r1, [r3, #7]	@ zero_extendqisi2
-	cmp	r1, r2
-	beq	.L2640
-	ldrh	r3, [r3, #4]
-	cbnz	r3, .L2638
-.L2640:
-	.loc 6 894 0
-	bl	Ftl_gc_temp_data_write_back
-.LVL2893:
-	cbz	r0, .L2638
-.LVL2894:
-.L2685:
-	.loc 6 909 0
-	ldr	r3, .L2688+40
-	movs	r2, #0
-	str	r2, [r3]
-	b	.L2684
-.LVL2895:
-.L2638:
-	ldr	r3, [sp, #16]
+	strh	r5, [r4, #2]	@ movhi
+	ldr	r0, [r3]
+	ldrh	r3, [r4]
+	lsls	r3, r3, #10
+	str	r3, [r0, #4]
+	ldrh	r3, [r4, #4]
+	lsls	r3, r3, #10
+	str	r3, [r0, #40]
+	bl	FlashEraseBlocks
+	ldrh	r0, [r4]
+	bl	FtlBbmMapBadBlock
+	ldrh	r0, [r4, #4]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	ldr	r3, [r4, #8]
+	ldrh	r2, [r4, #4]
+	strh	r5, [r4, #2]	@ movhi
 	adds	r3, r3, #1
-	b	.L2683
-.LVL2896:
-.L2642:
-	.loc 6 903 0
-	ldrh	r3, [r6, #2]
-	add	r4, r4, r3
-.LVL2897:
-	.loc 6 905 0
-	ldr	r3, [sp, #12]
-	.loc 6 903 0
-	uxth	r4, r4
-	.loc 6 905 0
-	cmp	r3, r4
-	.loc 6 903 0
-	strh	r4, [r6, #2]	@ movhi
-	.loc 6 905 0
-	bhi	.L2644
-	.loc 6 907 0
-	ldr	r3, .L2688+68
-	ldr	r3, [r3]
-	cbz	r3, .L2645
-	.loc 6 908 0
-	bl	Ftl_gc_temp_data_write_back
-.LVL2898:
-	cmp	r0, #0
-	bne	.L2685
-.L2645:
-	.loc 6 913 0
-	ldr	r3, .L2688+32
-	ldrh	r1, [r3]
-	cbnz	r1, .L2646
-	ldr	r3, .L2688+72
-	ldrh	r2, [r6]
-	ldr	r3, [r3]
-	ldrh	r0, [r3, r2, lsl #1]
-	cbz	r0, .L2646
-	.loc 6 915 0
-	strh	r1, [r3, r2, lsl #1]	@ movhi
-	.loc 6 916 0
-	ldrh	r0, [r6]
-	bl	update_vpc_list
-.LVL2899:
-	.loc 6 917 0
-	bl	FtlCacheWriteBack
-.LVL2900:
-	.loc 6 918 0
-	bl	l2p_flush
-.LVL2901:
-	.loc 6 919 0
-	bl	FtlVpcTblFlush
-.LVL2902:
-.L2646:
-	.loc 6 921 0
-	movw	r3, #65535
-	strh	r3, [r6]	@ movhi
-.L2644:
-	.loc 6 923 0
-	ldr	r3, .L2688+76
-	ldrh	r0, [r3]
-	cmp	r0, #2
-	bhi	.L2647
-	.loc 6 925 0
-	ldr	r3, .L2688+44
-	ldrh	r4, [r3]
-.LVL2903:
-	b	.L2618
-.LVL2904:
-.L2647:
-	.loc 6 928 0
-	ldr	r3, .L2688+40
-	movs	r2, #0
-	.loc 6 933 0
-	adds	r0, r0, #1
-.LVL2905:
-	.loc 6 928 0
-	str	r2, [r3]
-	b	.L2596
-.LVL2906:
-.L2648:
-.LBE531:
-.LBE532:
-	.loc 6 542 0
+	str	r3, [r4, #8]
+	ldrh	r3, [r4]
+	strh	r2, [r4]	@ movhi
+	strh	r3, [r4, #4]	@ movhi
+	bl	FtlBbmTblFlush
+.L2403:
 	movs	r0, #0
-.LVL2907:
-	b	.L2596
-.L2689:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2423:
 	.align	2
-.L2688:
-	.word	.LANCHOR8
-	.word	.LANCHOR91
-	.word	.LANCHOR238
-	.word	.LC6
-	.word	.LC7
-	.word	.LC8
-	.word	.LANCHOR92
-	.word	.LANCHOR93
-	.word	.LANCHOR236
-	.word	.LANCHOR237
-	.word	.LANCHOR168
-	.word	.LANCHOR52
-	.word	.LANCHOR53
-	.word	.LANCHOR37
-	.word	.LANCHOR201+14
-	.word	.LANCHOR178
-	.word	.LANCHOR157
-	.word	.LANCHOR102
-	.word	.LANCHOR83
-	.word	.LANCHOR88
-	.word	.LANCHOR106
-.LVL2908:
-.L2650:
-	mov	r0, r3
-.LVL2909:
-	b	.L2596
-	.cfi_endproc
-.LFE407:
-	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
-	.section	.text.FtlInit,"ax",%progbits
+.L2422:
+	.word	.LANCHOR77
+	.word	.LANCHOR202
+	.word	.LANCHOR45
+	.word	.LANCHOR60
+	.word	.LANCHOR75
+	.word	.LANCHOR183
+	.word	.LANCHOR188
+	.word	.LANCHOR51
+	.word	.LANCHOR123
+	.word	.LANCHOR78
+	.word	.LANCHOR75+28
+	.size	FtlMakeBbt, .-FtlMakeBbt
+	.section	.text.log2phys,"ax",%progbits
 	.align	1
-	.global	FtlInit
+	.global	log2phys
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlInit, %function
-FtlInit:
-.LFB302:
-	.loc 4 915 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
+	.type	log2phys, %function
+log2phys:
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2910:
-	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 4 916 0
-	mov	r3, #-1
-	ldr	r4, .L2699
-	.loc 4 915 0
-	mov	r5, r0
-	.loc 4 917 0
-	ldr	r2, .L2699+4
-	.loc 4 916 0
-	str	r3, [r4]
-	.loc 4 917 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r3, .L2443
+	str	r1, [sp, #4]
+	ldrh	r5, [r3]
+	str	r2, [sp, #8]
+	adds	r3, r5, #7
+	movs	r5, #1
+	lsr	r8, r0, r3
+	lsls	r5, r5, r3
+	ldr	r3, .L2443+4
+	subs	r5, r5, #1
+	uxth	r7, r8
+	ands	r5, r5, r0
+	ldr	r3, [r3]
+	uxth	r5, r5
+	cmp	r0, r3
+	bcc	.L2425
+	ldr	r1, .L2443+8
+	mov	r2, #888
+	ldr	r0, .L2443+12
+	bl	printf
+	ldr	r1, .L2443+16
+	ldr	r0, .L2443+20
+	bl	printf
+.L2425:
+	ldr	r6, .L2443+24
+	movs	r4, #12
+	ldr	r3, .L2443+28
+	ldr	r1, [r6]
+	ldrh	r2, [r3]
 	movs	r3, #0
-	.loc 4 928 0
-	ldr	r1, .L2699+8
-	.loc 4 917 0
-	str	r3, [r2]
-	.loc 4 918 0
-	ldr	r2, .L2699+12
-	.loc 4 928 0
-	ldr	r0, .L2699+16
-.LVL2911:
-	.loc 4 918 0
-	str	r3, [r2]
-	.loc 4 928 0
+.L2426:
+	uxth	r10, r3
+	cmp	r10, r2
+	bcc	.L2431
+	bl	select_l2p_ram_region
+	muls	r4, r0, r4
+	ldr	r3, [r6]
+	mov	r10, r0
+	ldrh	r1, [r3, r4]
+	adds	r2, r3, r4
+	movw	r3, #65535
+	cmp	r1, r3
+	beq	.L2432
+	ldr	r3, [r2, #4]
+	cmp	r3, #0
+	bge	.L2432
+	bl	flush_l2p_region
+.L2432:
+	ldr	r3, .L2443+32
+	ldrh	r2, [r3]
+	str	r3, [sp, #12]
+	cmp	r2, r7
+	bcs	.L2433
+	ldr	r1, .L2443+36
+	movw	r2, #526
+	ldr	r0, .L2443+12
 	bl	printf
-.LVL2912:
-	.loc 4 930 0
-	mov	r0, r5
-	bl	FtlConstantsInit
-.LVL2913:
-	.loc 4 931 0
-	bl	FtlMemInit
-.LVL2914:
-	.loc 4 932 0
-	bl	FtlVariablesInit
-.LVL2915:
-	.loc 4 933 0
-	ldr	r3, .L2699+20
-	ldrh	r0, [r3]
-	bl	FtlFreeSysBlkQueueInit
-.LVL2916:
-	.loc 4 948 0
-	bl	FtlLoadBbt
-.LVL2917:
-	cbz	r0, .L2691
-	.loc 4 949 0
-	ldr	r1, .L2699+24
-	ldr	r0, .L2699+28
-.L2698:
-	.loc 4 956 0
+	ldr	r1, .L2443+16
+	ldr	r0, .L2443+20
 	bl	printf
-.LVL2918:
-.L2692:
-	.loc 4 1000 0
+.L2433:
+	ldr	r3, .L2443+40
+	uxth	r8, r8
+	ldr	r3, [r3]
+	ldr	fp, [r3, r8, lsl #2]
+	cmp	fp, #0
+	bne	.L2434
+	ldr	r3, [r6]
+	movs	r1, #255
+	ldr	r2, .L2443+44
+	add	r3, r3, r4
+	ldrh	r2, [r2]
+	ldr	r0, [r3, #8]
+	bl	ftl_memset
+	ldr	r3, [r6]
+	adds	r2, r3, r4
+	strh	r7, [r3, r4]	@ movhi
+	str	fp, [r2, #4]
+	b	.L2427
+.L2431:
+	adds	r3, r3, #1
+	mla	r0, r4, r3, r1
+	ldrh	r0, [r0, #-12]
+	cmp	r0, r7
+	bne	.L2426
+.L2427:
+	ldr	r2, [sp, #8]
+	movs	r3, #12
+	ldr	r1, .L2443+24
+	cbnz	r2, .L2428
+	ldr	r2, [r1]
+	mla	r3, r3, r10, r2
+	ldr	r2, [sp, #4]
+	ldr	r3, [r3, #8]
+	ldr	r3, [r3, r5, lsl #2]
+	str	r3, [r2]
+.L2429:
+	ldr	r2, [r1]
+	movs	r3, #12
+	mla	r10, r3, r10, r2
+	ldr	r3, [r10, #4]
+	adds	r2, r3, #1
+	beq	.L2440
+	adds	r3, r3, #1
+	str	r3, [r10, #4]
+.L2440:
 	movs	r0, #0
-	pop	{r3, r4, r5, pc}
-.LVL2919:
-.L2691:
-	.loc 4 954 0
-	bl	FtlSysBlkInit
-.LVL2920:
-	cbz	r0, .L2693
-	.loc 4 956 0
-	ldr	r1, .L2699+24
-	ldr	r0, .L2699+32
-	b	.L2698
-.L2693:
-	.loc 4 961 0
-	movs	r1, #1
-	str	r1, [r4]
-	.loc 4 965 0
-	bl	rk_ftl_garbage_collect
-.LVL2921:
-	.loc 4 967 0
-	ldr	r3, .L2699+36
-	ldrh	r3, [r3]
-	cmp	r3, #15
-	bhi	.L2692
-	mov	r4, #1024
-.L2695:
-.LVL2922:
-.LBB537:
-.LBB538:
-.LBB539:
-	.loc 4 987 0
-	movs	r1, #1
-	mov	r0, r1
-	bl	rk_ftl_garbage_collect
-.LVL2923:
-	.loc 4 986 0
-	subs	r4, r4, #1
-.LVL2924:
-	bne	.L2695
-	b	.L2692
-.L2700:
-	.align	2
-.L2699:
-	.word	.LANCHOR223
-	.word	.LANCHOR239
-	.word	.LC51
-	.word	.LANCHOR76
-	.word	.LC8
-	.word	.LANCHOR38
-	.word	.LANCHOR240
-	.word	.LC52
-	.word	.LC53
-	.word	.LANCHOR88
-.LBE539:
-.LBE538:
-.LBE537:
-	.cfi_endproc
-.LFE302:
-	.size	FtlInit, .-FtlInit
-	.section	.text.rk_ftl_init,"ax",%progbits
-	.align	1
-	.global	rk_ftl_init
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	rk_ftl_init, %function
-rk_ftl_init:
-.LFB492:
-	.loc 7 105 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2925:
-	push	{r4, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 4, -8
-	.cfi_offset 14, -4
-	.loc 7 108 0
-	bl	FlashInit
-.LVL2926:
-	.loc 7 109 0
-	mov	r4, r0
-	cbnz	r0, .L2702
-	.loc 7 110 0
-	ldr	r0, .L2703
-.LVL2927:
-	bl	FtlInit
-.LVL2928:
-.L2702:
-	.loc 7 111 0
-	mov	r1, r4
-	ldr	r0, .L2703+4
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2428:
+	ldr	r2, [r6]
+	mla	r3, r3, r10, r2
+	ldr	r2, [sp, #4]
+	ldr	r0, [r2]
+	ldr	r2, [r3, #8]
+	str	r0, [r2, r5, lsl #2]
+	ldr	r2, [r3, #4]
+	orr	r2, r2, #-2147483648
+	str	r2, [r3, #4]
+	ldr	r3, .L2443+48
+	strh	r7, [r3]	@ movhi
+	b	.L2429
+.L2434:
+	ldr	r2, [r6]
+	ldr	r3, .L2443+52
+	add	r2, r2, r4
+	ldr	r2, [r2, #8]
+	mov	r0, r3
+	str	fp, [r3, #4]
+	str	r3, [sp]
+	str	r2, [r3, #8]
+	ldr	r2, .L2443+56
+	ldr	r2, [r2]
+	str	r2, [r3, #12]
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+	ldr	r3, [sp]
+	ldr	r2, [r3, #12]
+	ldr	r3, [r3]
+	str	r2, [sp]
+	cmp	r3, #256
+	bne	.L2435
+	mov	r2, fp
+	mov	r1, r8
+	ldr	r0, .L2443+60
 	bl	printf
-.LVL2929:
-	.loc 7 113 0
-	mov	r0, r4
-	pop	{r4, pc}
-.LVL2930:
-.L2704:
+	ldr	r0, .L2443+64
+	lsr	r3, fp, #10
+	mov	r1, r8
+	strh	r3, [r0, #40]	@ movhi
+	ldr	r3, [r6]
+	add	r3, r3, r4
+	ldr	r2, [r3, #8]
+	bl	FtlMapWritePage
+.L2435:
+	ldr	r3, [sp]
+	ldrh	r3, [r3, #8]
+	cmp	r3, r7
+	beq	.L2436
+	mov	r2, fp
+	mov	r1, r8
+	ldr	r0, .L2443+68
+	bl	printf
+	ldr	r1, .L2443+52
+	movs	r3, #4
+	mov	r2, r3
+	ldr	r0, .L2443+72
+	ldr	r1, [r1, #12]
+	bl	rknand_print_hex
+	ldr	r3, [sp, #12]
+	movs	r2, #4
+	ldr	r1, .L2443+40
+	ldr	r0, .L2443+76
+	ldrh	r3, [r3]
+	ldr	r1, [r1]
+	bl	rknand_print_hex
+	ldr	r3, .L2443+80
+	movs	r2, #1
+	str	r2, [r3]
+.L2436:
+	ldr	r3, [sp]
+	ldrh	r3, [r3, #8]
+	cmp	r3, r7
+	beq	.L2437
+	ldr	r1, .L2443+36
+	movw	r2, #553
+	ldr	r0, .L2443+12
+	bl	printf
+	ldr	r1, .L2443+16
+	ldr	r0, .L2443+20
+	bl	printf
+.L2437:
+	ldr	r3, .L2443+24
+	movs	r1, #0
+	ldr	r3, [r3]
+	adds	r2, r3, r4
+	str	r1, [r2, #4]
+	strh	r7, [r3, r4]	@ movhi
+	b	.L2427
+.L2444:
 	.align	2
-.L2703:
-	.word	.LANCHOR15
-	.word	.LC54
-	.cfi_endproc
-.LFE492:
-	.size	rk_ftl_init, .-rk_ftl_init
-	.section	.text.ftl_fix_nand_power_lost_error,"ax",%progbits
+.L2443:
+	.word	.LANCHOR57
+	.word	.LANCHOR73
+	.word	.LANCHOR227
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LANCHOR97
+	.word	.LANCHOR68
+	.word	.LANCHOR67
+	.word	.LANCHOR228
+	.word	.LANCHOR131
+	.word	.LANCHOR58
+	.word	.LANCHOR98
+	.word	.LANCHOR202
+	.word	.LANCHOR188
+	.word	.LC55
+	.word	.LANCHOR127
+	.word	.LC56
+	.word	.LC27
+	.word	.LC57
+	.word	.LANCHOR77
+	.size	log2phys, .-log2phys
+	.section	.text.FtlProgPages,"ax",%progbits
 	.align	1
-	.global	ftl_fix_nand_power_lost_error
+	.global	FtlProgPages
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_fix_nand_power_lost_error, %function
-ftl_fix_nand_power_lost_error:
-.LFB379:
-	.loc 1 2483 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 56
+	.type	FtlProgPages, %function
+FtlProgPages:
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	.loc 1 2484 0
-	ldr	r3, .L2719
-	.loc 1 2483 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	sub	sp, sp, #56
-	.cfi_def_cfa_offset 88
-	.loc 1 2484 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r3
+	ldr	r3, .L2465
+	mov	r5, r0
+	mov	r10, r1
+	ldr	r7, [r3]
+	mov	r8, r3
+	cbnz	r7, .L2445
+	ldr	r3, .L2465+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #0
-	beq	.L2705
-.LVL2931:
-.LBB540:
-	.loc 1 2486 0
-	ldr	r7, .L2719+4
-	.loc 1 2488 0
-	ldr	r6, .L2719+8
-	.loc 1 2491 0
-	ldr	r10, .L2719+32
-	.loc 1 2486 0
-	ldrh	r5, [r7]
-.LVL2932:
-	.loc 1 2488 0
-	ldr	r3, [r6]
-	.loc 1 2492 0
-	ldr	r4, .L2719+12
-	.loc 1 2488 0
-	mov	r1, r5
-	ldr	r0, .L2719+16
-	ldrh	r2, [r3, r5, lsl #1]
-	lsl	r8, r5, #1
+	cbz	r3, .L2460
+	ldrb	r6, [r4, #8]	@ zero_extendqisi2
+	subs	r3, r6, #1
+	rsbs	r6, r3, #0
+	adcs	r6, r6, r3
+.L2447:
+	ldr	fp, .L2465+40
+	mov	r2, r6
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	mov	r1, r10
+	mov	r0, r5
+	bl	FlashProgPages
+.L2448:
+	cmp	r7, r10
+	bne	.L2458
+	ldr	r3, .L2465+8
+	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L2445
+	ldr	r1, .L2465+12
+	mov	r2, #1600
+	ldr	r0, .L2465+16
 	bl	printf
-.LVL2933:
-	.loc 1 2491 0
-	ldrh	r0, [r10]
-	bl	FtlGcRefreshBlock
-.LVL2934:
-	.loc 1 2492 0
-	ldrh	r0, [r4]
-	bl	FtlGcRefreshBlock
-.LVL2935:
-	.loc 1 2493 0
-	mov	r0, r10
-	bl	allocate_new_data_superblock
-.LVL2936:
-	.loc 1 2494 0
+	ldr	r1, .L2465+20
+	ldr	r0, .L2465+24
+	bl	printf
+.L2445:
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2460:
+	mov	r6, r7
+	b	.L2447
+.L2451:
+	ldr	r0, [r5, #4]
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	ldrh	r3, [r4]
+	cmp	r3, r0
+	bne	.L2449
+	ldr	r1, [fp]
+	ldrh	r0, [r4, #4]
+	ldrh	r2, [r1, r3, lsl #1]
+	subs	r2, r2, r0
+	strh	r2, [r1, r3, lsl #1]	@ movhi
+	ldr	r3, .L2465+28
+	ldrh	r3, [r3]
+	strh	r3, [r4, #2]	@ movhi
+	movs	r3, #0
+	strb	r3, [r4, #6]
+	strh	r3, [r4, #4]	@ movhi
+.L2449:
+	ldrh	r3, [r4, #4]
+	cbnz	r3, .L2450
 	mov	r0, r4
-	.loc 1 2496 0
-	movw	r4, #4097
-	.loc 1 2494 0
 	bl	allocate_new_data_superblock
-.LVL2937:
-	str	r7, [sp, #4]
-.LVL2938:
-.L2707:
-	.loc 1 2496 0
-	subs	r4, r4, #1
-.LVL2939:
-	beq	.L2711
-.LVL2940:
-	.loc 1 2497 0
+.L2450:
+	ldr	r2, .L2465+32
+	ldr	r3, [r2, #96]
+	adds	r3, r3, #1
+	str	r3, [r2, #96]
+	ldr	r0, [r5, #4]
+	ubfx	r0, r0, #10, #16
+	bl	FtlGcMarkBadPhyBlk
+	mov	r0, r4
+	bl	get_new_active_ppa
+	mov	r2, r6
+	str	r0, [r5, #4]
+	str	r0, [sp, #12]
 	movs	r1, #1
-	mov	r0, r1
-	bl	rk_ftl_garbage_collect
-.LVL2941:
-	.loc 1 2498 0
-	ldr	r3, [r6]
-	ldrh	r3, [r3, r8]
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	mov	r0, r5
+	bl	FlashProgPages
+	ldr	r3, [r8]
 	cmp	r3, #0
-	bne	.L2707
-.LVL2942:
-.L2711:
-	.loc 1 2501 0
-	ldr	r3, [r6]
-	mov	r1, r5
-	ldr	r0, .L2719+16
-	ldrh	r2, [r3, r5, lsl #1]
+	bne	.L2445
+.L2458:
+	ldr	r3, [r5]
+	adds	r3, r3, #1
+	beq	.L2451
+	ldr	r3, .L2465+8
+	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L2452
+	ldr	r1, .L2465+12
+	movw	r2, #1583
+	ldr	r0, .L2465+16
 	bl	printf
-.LVL2943:
-	.loc 1 2502 0
-	ldr	r3, [r6]
-	ldrh	r4, [r3, r5, lsl #1]
-	cbnz	r4, .L2709
-.LVL2944:
-.LBB541:
-	.loc 1 2509 0
-	add	r0, sp, #56
-	.loc 1 2516 0
-	ldr	r7, .L2719+20
-	.loc 1 2509 0
-	strh	r5, [r0, #-48]!	@ movhi
-	.loc 1 2515 0
-	movw	r10, #65535
-	.loc 1 2510 0
-	bl	make_superblock
-.LVL2945:
-	.loc 1 2513 0
-	ldr	r3, .L2719+24
-	add	r0, sp, #22
-	.loc 1 2516 0
-	ldr	r8, [r7]
-	.loc 1 2513 0
-	mov	r2, r4
-	.loc 1 2516 0
-	mov	fp, #36
-	.loc 1 2517 0
-	mov	ip, r4
-	.loc 1 2513 0
-	ldrh	lr, [r3]
-.LVL2946:
-.L2712:
-	.loc 1 2513 0 is_stmt 0 discriminator 1
-	uxth	r3, r2
-	cmp	lr, r3
-	bhi	.L2714
-	.loc 1 2522 0 is_stmt 1
-	ldr	r3, [r6]
-	mov	r1, r5
-	ldr	r0, .L2719+28
-	ldrh	r2, [r3, r5, lsl #1]
-.LVL2947:
+	ldr	r1, .L2465+20
+	ldr	r0, .L2465+24
 	bl	printf
-.LVL2948:
-	.loc 1 2523 0
-	mov	r2, r4
-	movs	r1, #0
-	ldr	r0, [r7]
-	bl	FlashEraseBlocks
-.LVL2949:
-	.loc 1 2524 0
-	mov	r2, r4
-	movs	r1, #1
-	ldr	r0, [r7]
-	bl	FlashEraseBlocks
-.LVL2950:
-.L2709:
-.LBE541:
-	.loc 1 2526 0
-	ldr	r2, [sp, #4]
-	movw	r3, #65535
-	strh	r3, [r2]	@ movhi
-.LVL2951:
-.L2705:
-.LBE540:
-	.loc 1 2528 0
-	add	sp, sp, #56
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL2952:
-.L2714:
-	.cfi_restore_state
-.LBB543:
-.LBB542:
-	.loc 1 2514 0
-	ldrh	r3, [r0, #2]!
-.LVL2953:
-	.loc 1 2515 0
-	cmp	r3, r10
-	beq	.L2713
-	.loc 1 2516 0
-	mla	r1, fp, r4, r8
-	.loc 1 2519 0
-	adds	r4, r4, #1
-.LVL2954:
-	.loc 1 2516 0
-	lsls	r3, r3, #10
-.LVL2955:
-	.loc 1 2519 0
-	uxth	r4, r4
-.LVL2956:
-	.loc 1 2516 0
-	str	r3, [r1, #4]
-.LVL2957:
-	.loc 1 2517 0
-	str	ip, [r1, #8]
-	.loc 1 2518 0
-	str	ip, [r1, #12]
-.L2713:
-.LVL2958:
+.L2452:
+	ldr	r3, [r5, #4]
+	cbnz	r6, .L2453
+.L2464:
+	movs	r2, #1
+	add	r1, sp, #12
+	ldr	r0, [r5, #16]
+	str	r3, [sp, #12]
+	bl	log2phys
+	ldr	r3, [r5, #12]
+	ldr	r2, [r3, #12]
+	ubfx	r0, r2, #10, #16
+	str	r2, [sp, #4]
+	bl	P2V_block_in_plane
+	ldr	r2, [sp, #4]
+	mov	r3, r0
 	adds	r2, r2, #1
-.LVL2959:
-	b	.L2712
-.L2720:
+	beq	.L2455
+	ldr	r2, [fp]
+	ldrh	r2, [r2, r0, lsl #1]
+	cbnz	r2, .L2456
+	mov	r1, r0
+	str	r0, [sp, #4]
+	ldr	r0, .L2465+36
+	bl	printf
+	ldr	r3, [sp, #4]
+.L2456:
+	mov	r0, r3
+	bl	decrement_vpc_count
+.L2455:
+	adds	r7, r7, #1
+	adds	r5, r5, #36
+	b	.L2448
+.L2453:
+	orr	r3, r3, #-2147483648
+	b	.L2464
+.L2466:
 	.align	2
-.L2719:
+.L2465:
+	.word	.LANCHOR77
 	.word	.LANCHOR8
+	.word	.LANCHOR38
 	.word	.LANCHOR229
-	.word	.LANCHOR83
-	.word	.LANCHOR92
-	.word	.LC55
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LANCHOR53
+	.word	.LANCHOR138
+	.word	.LC58
+	.word	.LANCHOR84
+	.size	FtlProgPages, .-FtlProgPages
+	.section	.text.FtlCacheWriteBack,"ax",%progbits
+	.align	1
+	.global	FtlCacheWriteBack
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlCacheWriteBack, %function
+FtlCacheWriteBack:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	ldr	r3, .L2472
+	ldr	r4, [r3]
+	cbnz	r4, .L2468
+	ldr	r5, .L2472+4
+	ldr	r0, [r5]
+	cbz	r0, .L2468
+	ldr	r3, .L2472+8
+	mov	r2, r4
+	movs	r1, #1
+	ldr	r3, [r3]
+	bl	FtlProgPages
+	str	r4, [r5]
+.L2468:
+	movs	r0, #0
+	pop	{r3, r4, r5, pc}
+.L2473:
+	.align	2
+.L2472:
 	.word	.LANCHOR77
-	.word	.LANCHOR37
-	.word	.LC56
-	.word	.LANCHOR91
-.LBE542:
-.LBE543:
-	.cfi_endproc
-.LFE379:
-	.size	ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error
-	.section	.text.ftl_read,"ax",%progbits
+	.word	.LANCHOR132
+	.word	.LANCHOR230
+	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
+	.section	.text.FtlSysFlush,"ax",%progbits
 	.align	1
-	.global	ftl_read
+	.global	FtlSysFlush
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_read, %function
-ftl_read:
-.LFB305:
-	.loc 4 1430 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 64
+	.type	FtlSysFlush, %function
+FtlSysFlush:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2960:
-	.loc 4 1440 0
-	cmp	r0, #16
-	.loc 4 1430 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	sub	sp, sp, #64
-	.cfi_def_cfa_offset 96
-	.loc 4 1430 0
+	push	{r3, lr}
+	ldr	r3, .L2476
+	ldr	r3, [r3]
+	cbnz	r3, .L2475
+	bl	FtlCacheWriteBack
+	bl	l2p_flush
+	movs	r0, #1
+	bl	FtlEctTblFlush
+	bl	FtlVpcTblFlush
+.L2475:
+	movs	r0, #0
+	pop	{r3, pc}
+.L2477:
+	.align	2
+.L2476:
+	.word	.LANCHOR77
+	.size	FtlSysFlush, .-FtlSysFlush
+	.section	.text.FtlDeInit,"ax",%progbits
+	.align	1
+	.global	FtlDeInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlDeInit, %function
+FtlDeInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	ldr	r3, .L2480
+	ldr	r3, [r3]
+	cmp	r3, #1
+	bne	.L2479
+	bl	FtlSysFlush
+.L2479:
+	movs	r0, #0
+	pop	{r3, pc}
+.L2481:
+	.align	2
+.L2480:
+	.word	.LANCHOR231
+	.size	FtlDeInit, .-FtlDeInit
+	.section	.text.rk_ftl_de_init,"ax",%progbits
+	.align	1
+	.global	rk_ftl_de_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_ftl_de_init, %function
+rk_ftl_de_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	bl	FlashDeInit
+	bl	FtlDeInit
+	pop	{r3, lr}
+	b	FlashDeInit
+	.size	rk_ftl_de_init, .-rk_ftl_de_init
+	.section	.text.ftl_discard,"ax",%progbits
+	.align	1
+	.global	ftl_discard
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_discard, %function
+ftl_discard:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2498
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	mov	r5, r2
+	adds	r2, r1, r2
 	mov	r6, r1
-	mov	r7, r3
-	str	r2, [sp, #28]
-	.loc 4 1440 0
-	bne	.L2722
-	.loc 4 1441 0
-	mov	r2, r3
-.LVL2961:
-	ldr	r1, [sp, #28]
-.LVL2962:
-	add	r0, r6, #256
-.LVL2963:
-	bl	FtlVendorPartRead
-.LVL2964:
-	str	r0, [sp, #8]
-.LVL2965:
-.L2721:
-	.loc 4 1529 0
-	ldr	r0, [sp, #8]
-	add	sp, sp, #64
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL2966:
-.L2722:
-	.cfi_restore_state
-	.loc 4 1446 0
-	ldr	r3, [sp, #28]
-.LVL2967:
-	adds	r3, r1, r3
-	str	r3, [sp, #12]
-	ldr	r3, .L2759
-	ldr	r2, [sp, #12]
-.LVL2968:
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L2744
-	.loc 4 1446 0 is_stmt 0 discriminator 1
-	ldr	r3, .L2759+4
+	bhi	.L2491
+	cmp	r5, #31
+	bhi	.L2485
+.L2486:
+	movs	r0, #0
+.L2483:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L2485:
+	ldr	r3, .L2498+4
 	ldr	r3, [r3]
-	adds	r0, r3, #1
-.LVL2969:
-	beq	.L2745
-	.loc 4 1449 0 is_stmt 1
+	cmp	r3, #0
+	bne	.L2486
+	ldr	r8, .L2498+16
 	bl	FtlCacheWriteBack
-.LVL2970:
-	.loc 4 1451 0
-	ldr	r3, .L2759+8
 	mov	r0, r6
-	ldrh	r4, [r3]
-	mov	r1, r4
-	bl	__aeabi_uidiv
-.LVL2971:
-	.loc 4 1452 0
-	ldr	r3, [sp, #12]
+	ldrh	r4, [r8]
 	mov	r1, r4
-	.loc 4 1451 0
-	str	r0, [sp, #16]
-.LVL2972:
-	.loc 4 1452 0
-	subs	r0, r3, #1
-.LVL2973:
 	bl	__aeabi_uidiv
-.LVL2974:
-	.loc 4 1453 0
-	ldr	r3, [sp, #16]
-	.loc 4 1457 0
-	ldr	r2, .L2759+12
-	.loc 4 1451 0
-	ldr	r4, [sp, #16]
-	.loc 4 1453 0
-	rsb	r3, r3, #1
-	.loc 4 1452 0
-	str	r0, [sp, #20]
-.LVL2975:
-	.loc 4 1453 0
-	add	r3, r3, r0
+	smulbb	r3, r0, r4
+	mov	r7, r0
+	subs	r6, r6, r3
+	uxth	r6, r6
+	cbz	r6, .L2487
+	subs	r4, r4, r6
+	adds	r7, r7, #1
+	cmp	r4, r5
+	it	cs
+	movcs	r4, r5
+	uxth	r4, r4
+	subs	r5, r5, r4
+.L2487:
+	ldr	r4, .L2498+8
+	mov	r3, #-1
+	ldr	r6, .L2498+12
 	str	r3, [sp, #4]
-.LVL2976:
-	.loc 4 1457 0
-	ldr	r1, [sp, #4]
-	ldr	r3, [r2]
-.LVL2977:
-	add	r3, r3, r1
-	str	r3, [r2]
-	.loc 4 1444 0
-	movs	r3, #0
-	.loc 4 1456 0
-	mov	r5, r3
-	.loc 4 1444 0
-	str	r3, [sp]
-	str	r3, [sp, #24]
-	.loc 4 1431 0
-	str	r3, [sp, #8]
-.LVL2978:
-.L2724:
-	.loc 4 1458 0
-	ldr	r3, [sp, #4]
-	cbnz	r3, .L2743
-	.loc 4 1526 0
-	ldr	r3, .L2759+16
-	ldrh	r3, [r3]
-	cmp	r3, #0
-	beq	.L2721
-	.loc 4 1527 0
-	movs	r1, #1
-	ldr	r0, [sp, #4]
-	bl	rk_ftl_garbage_collect
-.LVL2979:
-	b	.L2721
-.LVL2980:
-.L2743:
-	.loc 4 1459 0
-	add	r1, sp, #60
+.L2488:
+	ldrh	r3, [r8]
+	cmp	r5, r3
+	bcs	.L2490
+	ldr	r3, .L2498+8
+	ldr	r2, [r3]
+	cmp	r2, #32
+	bls	.L2486
+	movs	r4, #0
+	str	r4, [r3]
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	b	.L2486
+.L2490:
 	movs	r2, #0
-	mov	r0, r4
+	mov	r1, sp
+	mov	r0, r7
 	bl	log2phys
-.LVL2981:
-	.loc 4 1460 0
-	ldr	r3, [sp, #60]
-	adds	r1, r3, #1
-	bne	.L2725
-	.loc 4 1461 0 discriminator 1
-	ldr	r10, .L2759+8
-	mov	r8, #0
-.L2726:
-.LVL2982:
-	ldrh	r0, [r10]
-	cmp	r8, r0
-	bcc	.L2728
-.LVL2983:
-.L2729:
-	.loc 4 1490 0
-	ldr	r3, [sp, #4]
-	.loc 4 1488 0
-	adds	r4, r4, #1
-.LVL2984:
-	.loc 4 1490 0
-	subs	r3, r3, #1
-.LVL2985:
-	str	r3, [sp, #4]
-	beq	.L2733
-	.loc 4 1490 0 is_stmt 0 discriminator 1
-	ldr	r3, .L2759+20
-.LVL2986:
-	ldrh	r3, [r3]
-	cmp	r5, r3, lsl #2
-	bne	.L2724
-.L2733:
-	.loc 4 1491 0 is_stmt 1
-	cmp	r5, #0
-	beq	.L2724
-	.loc 4 1492 0
-	ldr	r3, .L2759+24
-	movs	r2, #0
-	mov	r1, r5
-	.loc 4 1498 0
-	ldr	r10, .L2759+48
-	.loc 4 1493 0
-	mov	r8, #0
-	.loc 4 1492 0
-	ldr	r0, [r3]
-	bl	FlashReadPages
-.LVL2987:
-	.loc 4 1499 0
 	ldr	r3, [sp]
-	lsls	r3, r3, #9
-	str	r3, [sp, #44]
-	.loc 4 1496 0
-	ldr	r3, [sp, #32]
-	lsls	r3, r3, #9
-	str	r3, [sp, #36]
-	ldr	r3, [sp, #24]
-	lsls	r3, r3, #9
-	str	r3, [sp, #40]
-.LVL2988:
-.L2742:
-	.loc 4 1494 0
-	ldr	r3, .L2759+24
-	mov	fp, #36
-	mul	fp, fp, r8
-	ldr	r1, [sp, #16]
-	ldr	r3, [r3]
-	add	r3, r3, fp
-	ldr	r2, [r3, #16]
-	cmp	r1, r2
-	bne	.L2735
-	.loc 4 1495 0
-	ldr	r1, [r3, #8]
-	ldr	r3, .L2759+28
-	ldr	r3, [r3]
-	cmp	r1, r3
-	bne	.L2736
-	.loc 4 1496 0
-	ldr	r3, [sp, #36]
+	adds	r3, r3, #1
+	beq	.L2489
+	ldr	r3, [r4]
+	movs	r2, #1
+	add	r1, sp, #4
 	mov	r0, r7
-	ldr	r2, [sp, #40]
-	add	r1, r1, r3
-.L2758:
-	.loc 4 1499 0
-	bl	ftl_memcpy
-.LVL2989:
-.L2736:
-	.loc 4 1501 0
-	ldr	r3, .L2759+24
-	ldr	r3, [r3]
-	ldr	r1, [r3, fp]
-	add	ip, r3, fp
-	adds	r2, r1, #1
-	bne	.L2737
-	.loc 4 1502 0
-	ldr	r0, .L2759+32
-	.loc 4 1503 0
-	str	r1, [sp, #8]
-	.loc 4 1502 0
-	ldr	r2, [r0, #72]
-	adds	r2, r2, #1
-	str	r2, [r0, #72]
-.LVL2990:
-.L2737:
-	.loc 4 1505 0
-	ldr	r3, [r3, fp]
-	cmp	r3, #256
-	bne	.L2738
-.LBB544:
-	.loc 4 1507 0
-	ldr	r0, [ip, #4]
+	adds	r3, r3, #1
+	str	r3, [r4]
+	ldr	r3, [r6]
+	adds	r3, r3, #1
+	str	r3, [r6]
+	bl	log2phys
+	ldr	r0, [sp]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL2991:
-	mov	fp, r0
-.LVL2992:
-	.loc 4 1508 0
-	bl	FtlGcRefreshBlock
-.LVL2993:
-	.loc 4 1517 0
-	ldr	r2, .L2759+36
-	.loc 4 1508 0
-	movw	r3, #2049
-.LVL2994:
-.L2740:
-	.loc 4 1514 0
-	subs	r3, r3, #1
-.LVL2995:
-	bne	.L2739
-.LVL2996:
-.L2741:
-	.loc 4 1518 0
-	bl	FtlSysFlush
-.LVL2997:
-.L2738:
-.LBE544:
-	.loc 4 1493 0 discriminator 2
-	add	r8, r8, #1
-.LVL2998:
-	cmp	r5, r8
-	bne	.L2742
-	.loc 4 1522 0
+	bl	decrement_vpc_count
+.L2489:
+	ldrh	r3, [r8]
+	adds	r7, r7, #1
+	subs	r5, r5, r3
+	b	.L2488
+.L2491:
+	mov	r0, #-1
+	b	.L2483
+.L2499:
+	.align	2
+.L2498:
+	.word	.LANCHOR69
+	.word	.LANCHOR77
+	.word	.LANCHOR232
+	.word	.LANCHOR163
+	.word	.LANCHOR56
+	.size	ftl_discard, .-ftl_discard
+	.section	.text.Ftlscanalldata,"ax",%progbits
+	.align	1
+	.global	Ftlscanalldata
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	Ftlscanalldata, %function
+Ftlscanalldata:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, lr}
 	movs	r5, #0
-.LVL2999:
-	b	.L2724
-.LVL3000:
-.L2728:
-	.loc 4 1462 0
-	mla	r0, r0, r4, r8
-.LVL3001:
-	.loc 4 1463 0
-	cmp	r6, r0
-	bhi	.L2727
-	.loc 4 1463 0 is_stmt 0 discriminator 1
-	ldr	r3, [sp, #12]
-	cmp	r3, r0
-	bls	.L2727
-	.loc 4 1464 0 is_stmt 1
-	subs	r0, r0, r6
-.LVL3002:
-	mov	r2, #512
+	ldr	r7, .L2514
+	sub	sp, sp, #32
 	movs	r1, #0
-	add	r0, r7, r0, lsl #9
-	bl	ftl_memset
-.LVL3003:
-.L2727:
-	.loc 4 1461 0 discriminator 2
-	add	r8, r8, #1
-.LVL3004:
-	b	.L2726
-.LVL3005:
-.L2725:
-	.loc 4 1467 0
-	ldr	r2, .L2759+24
-	mov	r8, #36
-	ldr	r2, [r2]
-	mla	r8, r8, r5, r2
-	str	r3, [r8, #4]
-	.loc 4 1468 0
-	ldr	r3, [sp, #16]
-	cmp	r4, r3
-	ldr	r3, .L2759+8
-	bne	.L2730
-	.loc 4 1469 0
-	ldr	r2, .L2759+28
-	.loc 4 1470 0
-	mov	r0, r6
-	ldrh	r10, [r3]
-	.loc 4 1469 0
-	ldr	r2, [r2]
-	.loc 4 1470 0
-	mov	r1, r10
-	.loc 4 1469 0
-	str	r2, [r8, #8]
-	.loc 4 1470 0
-	bl	__aeabi_uidivmod
-.LVL3006:
+	ldr	r8, .L2514+24
+	ldr	r0, .L2514+4
+	bl	printf
+.L2501:
+	ldr	r3, [r7]
+	cmp	r5, r3
+	bcc	.L2507
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L2507:
+	movs	r2, #0
+	add	r1, sp, #28
+	mov	r0, r5
+	bl	log2phys
+	ubfx	r3, r5, #0, #11
+	cbnz	r3, .L2502
 	ldr	r2, [sp, #28]
-	.loc 4 1471 0
-	sub	r3, r10, r1
-	.loc 4 1470 0
-	str	r1, [sp, #32]
-.LVL3007:
-	cmp	r3, r2
-	it	cs
-	movcs	r3, r2
-.LVL3008:
-	.loc 4 1473 0
-	cmp	r3, r10
-	str	r3, [sp, #24]
-.LVL3009:
-	bne	.L2731
-	.loc 4 1474 0
-	str	r7, [r8, #8]
-.LVL3010:
-.L2731:
-	.loc 4 1483 0
-	ldr	r3, .L2759+40
-	ldr	r2, .L2759+44
-	.loc 4 1484 0
-	str	r4, [r8, #16]
-	.loc 4 1483 0
-	ldrh	r3, [r3]
+	mov	r1, r5
+	mov	r0, r8
+	bl	printf
+.L2502:
+	ldr	r3, [sp, #28]
+	adds	r2, r3, #1
+	beq	.L2504
+	ldr	r4, .L2514+8
+	movs	r2, #0
+	movs	r1, #1
+	str	r3, [r4, #4]
+	mov	r0, r4
+	ldr	r3, .L2514+12
+	str	r5, [r4, #16]
+	str	r2, [r4]
+	ldr	r3, [r3]
+	str	r3, [r4, #8]
+	ldr	r3, .L2514+16
+	ldr	r6, [r3]
+	str	r6, [r4, #12]
+	bl	FlashReadPages
+	ldr	r3, [r4]
+	cmp	r3, #256
+	beq	.L2505
+	adds	r3, r3, #1
+	beq	.L2505
+	ldr	r3, [r6, #8]
+	cmp	r5, r3
+	beq	.L2504
+.L2505:
+	ldr	r2, [r4, #8]
+	ldr	r3, [r4, #12]
+	ldr	r0, .L2514+20
+	ldr	r1, [r2, #4]
+	str	r1, [sp, #16]
+	mov	r1, r5
 	ldr	r2, [r2]
-	muls	r3, r5, r3
-	.loc 4 1485 0
+	str	r2, [sp, #12]
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	ldr	r2, [r3, #8]
+	str	r2, [sp, #4]
+	ldr	r2, [r3, #4]
+	str	r2, [sp]
+	ldr	r2, [r4, #4]
+	ldr	r3, [r3]
+	bl	printf
+.L2504:
 	adds	r5, r5, #1
-.LVL3011:
-	.loc 4 1483 0
-	bic	r3, r3, #3
-	add	r3, r3, r2
-	str	r3, [r8, #12]
-	b	.L2729
-.L2730:
-	.loc 4 1475 0
-	ldr	r2, [sp, #20]
-	cmp	r4, r2
-	bne	.L2732
-	.loc 4 1476 0
-	ldr	r2, .L2759+48
-	.loc 4 1477 0
-	ldr	r1, [sp, #12]
-	.loc 4 1476 0
-	ldr	r2, [r2]
-	str	r2, [r8, #8]
-	.loc 4 1477 0
-	ldrh	r2, [r3]
-	mul	r3, r2, r4
-	subs	r1, r1, r3
-	.loc 4 1478 0
-	cmp	r2, r1
-	.loc 4 1477 0
-	str	r1, [sp]
-.LVL3012:
-	.loc 4 1478 0
-	bne	.L2731
-.LVL3013:
-.L2757:
-	.loc 4 1481 0
-	subs	r3, r3, r6
-	add	r3, r7, r3, lsl #9
-	str	r3, [r8, #8]
-	b	.L2731
-.L2732:
-	ldrh	r3, [r3]
-	muls	r3, r4, r3
-	b	.L2757
-.LVL3014:
-.L2735:
-	.loc 4 1497 0
-	ldr	r1, [sp, #20]
-	cmp	r1, r2
-	bne	.L2736
-	.loc 4 1498 0
-	ldr	r1, [r3, #8]
-	ldr	r3, [r10]
-	cmp	r1, r3
-	bne	.L2736
-	.loc 4 1499 0
-	ldr	r3, .L2759+8
-	ldr	r2, [sp, #44]
-	ldrh	r0, [r3]
-	ldr	r3, [sp, #20]
-	muls	r0, r3, r0
-	subs	r0, r0, r6
-	add	r0, r7, r0, lsl #9
-	b	.L2758
-.LVL3015:
-.L2739:
-.LBB545:
-	.loc 4 1516 0
-	movs	r1, #1
-	str	r2, [sp, #52]
-	mov	r0, r1
-	str	r3, [sp, #48]
-.LVL3016:
-	bl	rk_ftl_garbage_collect
-.LVL3017:
-	.loc 4 1517 0
-	ldr	r2, [sp, #52]
-	ldr	r3, [sp, #48]
-	ldrh	r1, [r2]
-	cmp	r1, fp
-	beq	.L2740
-	b	.L2741
-.LVL3018:
-.L2744:
-.LBE545:
-	.loc 4 1447 0
-	mov	r3, #-1
-.LVL3019:
-.L2745:
-	str	r3, [sp, #8]
-	b	.L2721
-.L2760:
+	b	.L2501
+.L2515:
 	.align	2
-.L2759:
-	.word	.LANCHOR68
-	.word	.LANCHOR223
-	.word	.LANCHOR55
-	.word	.LANCHOR163
-	.word	.LANCHOR114
-	.word	.LANCHOR37
-	.word	.LANCHOR177
+.L2514:
+	.word	.LANCHOR73
+	.word	.LC59
+	.word	.LANCHOR202
 	.word	.LANCHOR183
-	.word	.LANCHOR135
-	.word	.LANCHOR201
-	.word	.LANCHOR58
-	.word	.LANCHOR186
-	.word	.LANCHOR184
-	.cfi_endproc
-.LFE305:
-	.size	ftl_read, .-ftl_read
-	.section	.text.ftl_write,"ax",%progbits
+	.word	.LANCHOR188
+	.word	.LC61
+	.word	.LC60
+	.size	Ftlscanalldata, .-Ftlscanalldata
+	.section	.text.FtlReUsePrevPpa,"ax",%progbits
 	.align	1
-	.global	ftl_write
+	.global	FtlReUsePrevPpa
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_write, %function
-ftl_write:
-.LFB308:
-	.loc 4 1594 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 80
+	.type	FtlReUsePrevPpa, %function
+FtlReUsePrevPpa:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL3020:
-	.loc 4 1602 0
-	cmp	r0, #16
-	.loc 4 1594 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	sub	sp, sp, #80
-	.cfi_def_cfa_offset 112
-	.loc 4 1594 0
-	mov	r7, r1
-	str	r2, [sp, #12]
-	str	r3, [sp, #4]
-	.loc 4 1602 0
-	bne	.L2762
-	.loc 4 1603 0
-	mov	r2, r3
-.LVL3021:
-	ldr	r1, [sp, #12]
-.LVL3022:
-	add	r0, r7, #256
-.LVL3023:
-	bl	FtlVendorPartWrite
-.LVL3024:
-.L2761:
-	.loc 4 1775 0
-	add	sp, sp, #80
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL3025:
-.L2762:
-	.cfi_restore_state
-	.loc 4 1606 0
-	ldr	r3, [sp, #12]
-.LVL3026:
-	adds	r5, r1, r3
-	ldr	r3, .L2816
-	ldr	r3, [r3]
-	cmp	r5, r3
-	bhi	.L2796
-	.loc 4 1606 0 is_stmt 0 discriminator 1
-	ldr	r3, .L2816+4
-	ldr	r0, [r3]
-.LVL3027:
-	adds	r4, r0, #1
-	beq	.L2761
-	.loc 4 1609 0 is_stmt 1
-	ldr	r3, .L2816+8
-	mov	r2, #2048
-.LVL3028:
-	.loc 4 1610 0
-	mov	r0, r7
-	.loc 4 1609 0
-	str	r2, [r3]
-	.loc 4 1610 0
-	ldr	r3, .L2816+12
-	ldrh	r4, [r3]
-	mov	r1, r4
-.LVL3029:
-	bl	__aeabi_uidiv
-.LVL3030:
-	.loc 4 1611 0
-	mov	r1, r4
-	.loc 4 1610 0
-	mov	r10, r0
-.LVL3031:
-	.loc 4 1611 0
-	subs	r0, r5, #1
-.LVL3032:
-	bl	__aeabi_uidiv
-.LVL3033:
-	.loc 4 1614 0
-	ldr	r2, .L2816+16
-	.loc 4 1612 0
-	sub	r5, r0, r10
-	adds	r3, r5, #1
-	.loc 4 1614 0
-	adds	r1, r5, #1
-	.loc 4 1612 0
-	str	r3, [sp, #8]
-	.loc 4 1614 0
-	ldr	r3, [r2]
-	.loc 4 1611 0
-	str	r0, [sp, #20]
-.LVL3034:
-	.loc 4 1614 0
-	add	r3, r3, r1
-	str	r3, [r2]
-	.loc 4 1615 0
-	ldr	r3, .L2816+20
-	ldr	r8, [r3]
-	cmp	r8, #0
-	beq	.L2764
-	.loc 4 1616 0
-	ldr	r3, [r8, #16]
-	cmp	r10, r3
-	beq	.L2765
-	.loc 4 1617 0
-	bl	FtlCacheWriteBack
-.LVL3035:
-.L2764:
-	.loc 4 1644 0
-	ldr	r5, .L2816+24
-	.loc 4 1643 0
-	mov	r4, r10
-.LVL3036:
-.L2766:
-	ldr	r3, [sp, #8]
-	cmp	r3, #0
-	beq	.L2795
-	.loc 4 1644 0
-	ldr	r6, .L2816+28
-	ldrb	r2, [r5, #6]	@ zero_extendqisi2
-	ldrh	r3, [r6]
-	cmp	r2, r3
-	bcc	.L2767
-	.loc 4 1644 0 is_stmt 0 discriminator 1
-	ldr	r1, .L2816+32
-	movw	r2, #1644
-	ldr	r0, .L2816+36
-	bl	printf
-.LVL3037:
-	ldr	r1, .L2816+40
-	ldr	r0, .L2816+44
-	bl	printf
-.LVL3038:
-.L2767:
-	.loc 4 1645 0 is_stmt 1
-	ldrh	r3, [r5, #4]
-	cbnz	r3, .L2768
-	.loc 4 1646 0
-	bl	FtlCacheWriteBack
-.LVL3039:
-	.loc 4 1668 0
-	mov	r0, r5
-	bl	allocate_new_data_superblock
-.LVL3040:
-.L2768:
-	.loc 4 1673 0
-	ldrb	r3, [r5, #7]	@ zero_extendqisi2
-	.loc 4 1675 0
-	ldrh	r2, [r5, #4]
-	.loc 4 1673 0
-	lsls	r3, r3, #2
-	cmp	r3, r2
-	it	cs
-	movcs	r3, r2
-	ldr	r2, [sp, #8]
-	cmp	r3, r2
-	it	cs
-	movcs	r3, r2
-	.loc 4 1677 0
-	ldrb	r2, [r5, #6]	@ zero_extendqisi2
-	str	r3, [sp, #36]
-.LVL3041:
-	ldrh	r3, [r6]
-.LVL3042:
-	cmp	r2, r3
-	bcc	.L2769
-	.loc 4 1677 0 is_stmt 0 discriminator 1
-	ldr	r1, .L2816+32
-	movw	r2, #1677
-	ldr	r0, .L2816+36
-	bl	printf
-.LVL3043:
-	ldr	r1, .L2816+40
-	ldr	r0, .L2816+44
-	bl	printf
-.LVL3044:
-.L2769:
-	.loc 4 1700 0 is_stmt 1 discriminator 1
-	mov	r8, #0
-.LVL3045:
-.L2770:
-	.loc 4 1678 0 discriminator 1
-	ldr	r3, [sp, #36]
-	cmp	r8, r3
-	bne	.L2791
-.L2771:
-.LVL3046:
-	.loc 4 1759 0
-	ldr	r3, .L2816+20
-	ldr	r3, [r3]
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	mov	r6, r0
+	ldr	r5, .L2526
+	ubfx	r0, r1, #10, #16
+	str	r1, [sp, #4]
+	bl	P2V_block_in_plane
+	ldr	r2, [r5]
+	mov	r7, r0
+	ldrh	r3, [r2, r0, lsl #1]
 	cmp	r3, #0
-	beq	.L2792
-.LVL3047:
-	.loc 4 1761 0
-	ldr	r3, [sp, #8]
-	.loc 4 1762 0
-	subs	r8, r8, #1
-.LVL3048:
-	.loc 4 1761 0
-	add	r3, r3, #-1
-	str	r3, [sp, #8]
-.LVL3049:
-	.loc 4 1762 0
-	bne	.L2792
-.LVL3050:
-.L2795:
-	.loc 4 1769 0
-	ldr	r3, [sp, #20]
-.LVL3051:
-	movs	r0, #0
-	sub	r1, r3, r10
-	bl	rk_ftl_garbage_collect
-.LVL3052:
-	.loc 4 1774 0
-	movs	r0, #0
-	b	.L2761
-.LVL3053:
-.L2765:
-	.loc 4 1619 0
-	ldr	r2, .L2816+48
-	.loc 4 1620 0
+	bne	.L2517
+	ldr	r2, .L2526+4
+	ldr	r4, [r2]
+	cmp	r4, #0
+	beq	.L2518
+	ldr	r2, .L2526+8
+	movw	lr, #65535
+	ldr	ip, .L2526+32
+	ldr	r0, .L2526+12
+	ldr	r2, [r2]
+	ldrh	r1, [r0]
+	mov	r8, r0
+	subs	r4, r4, r2
+	asrs	r4, r4, #1
+	mul	r4, ip, r4
+	mov	ip, #6
+	uxth	r4, r4
+.L2519:
+	uxth	r0, r3
+	cmp	r1, r0
+	bls	.L2518
+	cmp	r4, r7
+	bne	.L2520
 	mov	r1, r4
-.LVL3054:
-	mov	r0, r7
-.LVL3055:
-	.loc 4 1619 0
-	ldr	r3, [r2]
-	adds	r3, r3, #1
-	str	r3, [r2]
-	.loc 4 1620 0
-	bl	__aeabi_uidivmod
-.LVL3056:
-	ldr	r2, [sp, #12]
-	.loc 4 1621 0
-	subs	r4, r4, r1
-	.loc 4 1624 0
-	ldr	r0, [r8, #8]
-	.loc 4 1620 0
-	mov	r3, r1
-.LVL3057:
-	.loc 4 1624 0
-	ldr	r1, [sp, #4]
-.LVL3058:
-	cmp	r4, r2
-	it	cs
-	movcs	r4, r2
-.LVL3059:
-	lsls	r6, r4, #9
-	add	r0, r0, r3, lsl #9
-	mov	r2, r6
-	bl	ftl_memcpy
-.LVL3060:
-	.loc 4 1626 0
-	cmp	r5, #0
-	beq	.L2798
-	.loc 4 1628 0
-	ldr	r3, [sp, #12]
-	.loc 4 1629 0
-	add	r7, r7, r4
-.LVL3061:
-	.loc 4 1631 0
-	add	r10, r10, #1
-.LVL3062:
-	.loc 4 1628 0
-	subs	r3, r3, r4
-	str	r3, [sp, #12]
-.LVL3063:
-	.loc 4 1630 0
-	ldr	r3, [sp, #4]
-.LVL3064:
-	add	r3, r3, r6
-	str	r3, [sp, #4]
-.LVL3065:
-	.loc 4 1632 0
-	bl	FtlCacheWriteBack
-.LVL3066:
-	str	r5, [sp, #8]
-	b	.L2764
-.LVL3067:
-.L2791:
-	.loc 4 1679 0
-	ldrh	r3, [r5, #4]
-	cmp	r3, #0
-	beq	.L2771
-	.loc 4 1683 0
-	movs	r2, #0
-	add	r1, sp, #40
-	mov	r0, r4
-	movs	r6, #36
-	bl	log2phys
-.LVL3068:
-	.loc 4 1684 0
-	mov	r0, r5
-	mul	r6, r6, r8
-	bl	get_new_active_ppa
-.LVL3069:
-	.loc 4 1686 0
-	ldr	r3, .L2816+52
-	.loc 4 1687 0
-	ldr	r2, .L2816+56
-	.loc 4 1686 0
-	ldr	r1, [r3]
-	.loc 4 1687 0
-	ldrh	r2, [r2]
-	.loc 4 1686 0
-	str	r3, [sp, #16]
-	add	r1, r1, r6
-	str	r0, [r1, #4]
-	.loc 4 1687 0
-	mul	r0, r2, r8
-.LVL3070:
-	.loc 4 1688 0
-	str	r4, [r1, #16]
-	.loc 4 1687 0
-	bic	r3, r0, #3
-	ldr	r0, .L2816+60
-	str	r3, [sp, #28]
-	ldr	r3, [r0]
-	ldr	r0, [sp, #28]
-	str	r3, [sp, #32]
-	add	fp, r3, r0
-.LVL3071:
-	str	fp, [r1, #12]
-	.loc 4 1691 0
-	mov	r0, fp
-	movs	r1, #0
-.LVL3072:
-	bl	ftl_memset
-.LVL3073:
-	.loc 4 1693 0
-	cmp	r4, r10
-	ldr	r1, .L2816+12
-	beq	.L2772
-	.loc 4 1693 0 is_stmt 0 discriminator 1
-	ldr	r3, [sp, #20]
-	cmp	r4, r3
-	ldr	r3, [sp, #16]
-	bne	.L2811
-.LVL3074:
-	.loc 4 1701 0 is_stmt 1
-	ldr	r3, [sp, #12]
-	adds	r2, r7, r3
-	ldrh	r3, [r1]
-	smulbb	r3, r3, r4
-	subs	r2, r2, r3
-	uxth	r3, r2
-	str	r3, [sp, #16]
-.LVL3075:
-	.loc 4 1700 0
-	movs	r3, #0
-.LVL3076:
-	str	r3, [sp, #24]
-	b	.L2775
-.LVL3077:
-.L2772:
-	.loc 4 1695 0
-	ldrh	r2, [r1]
-	mov	r0, r7
-	mov	r1, r2
-	str	r2, [sp, #16]
-	bl	__aeabi_uidivmod
-.LVL3078:
-	.loc 4 1696 0
-	ldr	r2, [sp, #16]
-	.loc 4 1695 0
-	str	r1, [sp, #24]
-.LVL3079:
-	.loc 4 1696 0
-	subs	r2, r2, r1
-.LVL3080:
-	ldr	r1, [sp, #12]
-.LVL3081:
-	mov	r3, r2
-	cmp	r2, r1
-	it	cs
-	movcs	r3, r1
-	str	r3, [sp, #16]
-.LVL3082:
-.L2775:
-	.loc 4 1704 0
-	ldr	r3, .L2816+12
-	ldr	r2, [sp, #16]
-	ldrh	r3, [r3]
-	cmp	r2, r3
-	ldr	r3, .L2816+52
-	.loc 4 1706 0
-	ldr	r3, [r3]
-	.loc 4 1704 0
-	bne	.L2776
-	.loc 4 1705 0
-	cmp	r4, r10
-	.loc 4 1706 0
-	add	r6, r6, r3
-	.loc 4 1705 0
-	bne	.L2777
-	.loc 4 1706 0
-	ldr	r3, [sp, #4]
-.LVL3083:
-.L2814:
-	.loc 4 1749 0
-	str	r3, [r6, #8]
-	b	.L2778
-.LVL3084:
-.L2777:
-	.loc 4 1708 0
-	ldr	r2, [sp, #16]
-.LVL3085:
-	ldr	r3, [sp, #4]
-	muls	r2, r4, r2
-	subs	r2, r2, r7
-	add	r2, r3, r2, lsl #9
-	str	r2, [r6, #8]
-.LVL3086:
-.L2778:
-	.loc 4 1751 0
-	ldr	r3, .L2816+28
-	ldrb	r2, [r5, #6]	@ zero_extendqisi2
-	ldrh	r3, [r3]
-	cmp	r2, r3
-	bcc	.L2788
-	.loc 4 1751 0 is_stmt 0 discriminator 1
-	ldr	r1, .L2816+32
-	movw	r2, #1751
-	ldr	r0, .L2816+36
+	ldr	r0, .L2526+4
+	bl	List_remove_node
+	ldrh	r3, [r8]
+	cbnz	r3, .L2521
+	ldr	r1, .L2526+16
+	movw	r2, #2140
+	ldr	r0, .L2526+20
 	bl	printf
-.LVL3087:
-	ldr	r1, .L2816+40
-	ldr	r0, .L2816+44
+	ldr	r1, .L2526+24
+	ldr	r0, .L2526+28
 	bl	printf
-.LVL3088:
-.L2788:
-	.loc 4 1752 0 is_stmt 1
-	ldr	r2, [sp, #32]
-	movw	r3, #61589
-	ldr	r1, [sp, #28]
-	.loc 4 1678 0
-	add	r8, r8, #1
-.LVL3089:
-	.loc 4 1752 0
-	strh	r3, [r2, r1]	@ movhi
-	.loc 4 1753 0
-	ldr	r2, .L2816+64
-	.loc 4 1754 0
-	str	r4, [fp, #8]
-	.loc 4 1757 0
-	adds	r4, r4, #1
-.LVL3090:
-	.loc 4 1753 0
-	ldr	r3, [r2]
-	str	r3, [fp, #4]
+.L2521:
+	ldrh	r3, [r8]
+	mov	r0, r4
+	subs	r3, r3, #1
+	strh	r3, [r8]	@ movhi
+	bl	INSERT_DATA_LIST
+	ldr	r2, [r5]
+	ldrh	r3, [r2, r7, lsl #1]
+.L2517:
 	adds	r3, r3, #1
-	adds	r1, r3, #1
-	it	eq
-	moveq	r3, #0
-	str	r3, [r2]
-	.loc 4 1755 0
-	ldr	r3, [sp, #40]
-	str	r3, [fp, #12]
-	.loc 4 1756 0
-	ldrh	r3, [r5]
-	strh	r3, [fp, #2]	@ movhi
-	b	.L2770
-.L2817:
+	strh	r3, [r2, r7, lsl #1]	@ movhi
+	b	.L2518
+.L2520:
+	mul	r4, ip, r4
+	adds	r3, r3, #1
+	ldrh	r4, [r2, r4]
+	cmp	r4, lr
+	bne	.L2519
+.L2518:
+	movs	r2, #1
+	add	r1, sp, #4
+	mov	r0, r6
+	bl	log2phys
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L2527:
 	.align	2
-.L2816:
-	.word	.LANCHOR68
-	.word	.LANCHOR223
-	.word	.LANCHOR241
-	.word	.LANCHOR55
-	.word	.LANCHOR159
-	.word	.LANCHOR129
-	.word	.LANCHOR91
-	.word	.LANCHOR37
-	.word	.LANCHOR242
+.L2526:
+	.word	.LANCHOR84
+	.word	.LANCHOR88
+	.word	.LANCHOR82
+	.word	.LANCHOR89
+	.word	.LANCHOR233
+	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC8
-	.word	.LANCHOR161
-	.word	.LANCHOR179
-	.word	.LANCHOR58
-	.word	.LANCHOR186
-	.word	.LANCHOR157
-.LVL3091:
-.L2776:
-	.loc 4 1711 0
-	cmp	r4, r10
-	.loc 4 1712 0
-	add	r3, r3, r6
-	ite	eq
-	ldreq	r2, .L2818
-.LVL3092:
-	.loc 4 1714 0
-	ldrne	r2, .L2818+4
-	ldr	r2, [r2]
-	str	r2, [r3, #8]
-.LVL3093:
-	.loc 4 1716 0
-	ldr	r2, [sp, #40]
-	ldr	r3, .L2818+8
-	adds	r0, r2, #1
-	beq	.L2781
-.LBB546:
-	.loc 4 1720 0
-	ldr	r3, [r3]
-	.loc 4 1722 0
-	movs	r1, #1
-	.loc 4 1719 0
-	str	r4, [sp, #60]
-	.loc 4 1722 0
-	add	r0, sp, #44
-	.loc 4 1718 0
-	str	r2, [sp, #48]
-	.loc 4 1720 0
-	add	r3, r3, r6
-	ldr	r2, [r3, #8]
-	.loc 4 1721 0
-	ldr	r3, [r3, #12]
-	.loc 4 1720 0
-	str	r2, [sp, #52]
-	.loc 4 1722 0
-	movs	r2, #0
-	.loc 4 1721 0
-	str	r3, [sp, #56]
-	.loc 4 1722 0
-	bl	FlashReadPages
-.LVL3094:
-	.loc 4 1723 0
-	ldr	r3, [sp, #44]
-	adds	r3, r3, #1
-	bne	.L2782
-	.loc 4 1724 0
-	ldr	r2, .L2818+12
-	ldr	r3, [r2, #72]
-	adds	r3, r3, #1
-	str	r3, [r2, #72]
-.L2785:
-	ldr	r2, [sp, #16]
-.LBE546:
-	.loc 4 1736 0
-	cmp	r4, r10
-	ldr	r3, .L2818+8
-	lsl	r2, r2, #9
-	bne	.L2786
-	.loc 4 1737 0
-	ldr	r1, [r3]
-	str	r3, [sp, #16]
-	ldr	r3, [sp, #24]
-	add	r1, r1, r6
-	ldr	r0, [r1, #8]
-	ldr	r1, [sp, #4]
-	add	r0, r0, r3, lsl #9
-.L2813:
-	.loc 4 1739 0
-	bl	ftl_memcpy
-.LVL3095:
-	.loc 4 1741 0
-	ldr	r2, [sp, #20]
-	.loc 4 1739 0
-	ldr	r3, [sp, #16]
-	.loc 4 1741 0
-	cmp	r4, r2
-	bne	.L2778
-	.loc 4 1742 0
-	ldrh	r2, [r5, #4]
-	cmp	r2, #0
-	beq	.L2778
-	.loc 4 1743 0
-	ldr	r3, [r3]
-	add	r6, r6, r3
-	ldr	r3, .L2818+16
-	str	r6, [r3]
-	.loc 4 1744 0
-	ldr	r3, .L2818+20
-	str	r5, [r3]
-	b	.L2778
-.L2782:
-.LBB547:
-	.loc 4 1726 0
-	ldr	r3, [fp, #8]
-	cmp	r4, r3
-	beq	.L2784
-	.loc 4 1727 0
-	ldr	r2, .L2818+12
-	.loc 4 1728 0
-	ldr	r0, .L2818+24
-	.loc 4 1727 0
-	ldr	r3, [r2, #72]
-	adds	r3, r3, #1
-	str	r3, [r2, #72]
-	.loc 4 1728 0
-	mov	r2, r4
-	ldr	r1, [fp, #8]
-	bl	printf
-.LVL3096:
-.L2784:
-	.loc 4 1730 0
-	ldr	r3, [fp, #8]
-	cmp	r4, r3
-	beq	.L2785
-	.loc 4 1730 0 is_stmt 0 discriminator 1
-	movw	r2, #1730
-	ldr	r1, .L2818+28
-	ldr	r0, .L2818+32
-	bl	printf
-.LVL3097:
-	ldr	r1, .L2818+36
-	ldr	r0, .L2818+40
-	bl	printf
-.LVL3098:
-	b	.L2785
-.L2781:
-.LBE547:
-	.loc 4 1733 0 is_stmt 1
-	ldr	r3, [r3]
-	movs	r1, #0
-	ldr	r2, .L2818+44
-	add	r3, r3, r6
-	ldrh	r2, [r2]
-	ldr	r0, [r3, #8]
-	bl	ftl_memset
-.LVL3099:
-	b	.L2785
-.L2786:
-	.loc 4 1739 0
-	ldr	r1, .L2818+48
-	ldr	r0, [r3]
-	str	r3, [sp, #16]
-	ldrh	r1, [r1]
-	ldr	r3, [sp, #4]
-	add	r0, r0, r6
-	ldr	r0, [r0, #8]
-	muls	r1, r4, r1
-	subs	r1, r1, r7
-	add	r1, r3, r1, lsl #9
-	b	.L2813
-.L2811:
-	.loc 4 1749 0
-	ldr	r3, [r3]
-	ldr	r2, [sp, #4]
-	add	r6, r6, r3
-	ldrh	r3, [r1]
-	muls	r3, r4, r3
-	subs	r3, r3, r7
-	add	r3, r2, r3, lsl #9
-	b	.L2814
-.LVL3100:
-.L2792:
-	.loc 4 1765 0
-	ldr	r0, .L2818+8
-	mov	r3, r5
-	movs	r2, #0
-	mov	r1, r8
-	ldr	r0, [r0]
-	bl	FtlProgPages
-.LVL3101:
-	.loc 4 1766 0
-	ldr	r3, [sp, #8]
-	cmp	r3, r8
-	bcs	.L2793
-	.loc 4 1766 0 is_stmt 0 discriminator 1
-	ldr	r1, .L2818+28
-	movw	r2, #1766
-	ldr	r0, .L2818+32
-	bl	printf
-.LVL3102:
-	ldr	r1, .L2818+36
-	ldr	r0, .L2818+40
-	bl	printf
-.LVL3103:
-.L2793:
-	.loc 4 1767 0 is_stmt 1
-	ldr	r3, [sp, #8]
-	sub	r3, r3, r8
-	str	r3, [sp, #8]
-.LVL3104:
-	b	.L2766
-.LVL3105:
-.L2796:
-	.loc 4 1607 0
-	mov	r0, #-1
-.LVL3106:
-	b	.L2761
-.LVL3107:
-.L2798:
-	.loc 4 1627 0
-	mov	r0, r5
-	b	.L2761
-.L2819:
-	.align	2
-.L2818:
-	.word	.LANCHOR183
-	.word	.LANCHOR184
-	.word	.LANCHOR179
-	.word	.LANCHOR135
-	.word	.LANCHOR129
-	.word	.LANCHOR221
-	.word	.LC57
-	.word	.LANCHOR242
-	.word	.LC6
-	.word	.LC7
-	.word	.LC8
-	.word	.LANCHOR57
-	.word	.LANCHOR55
-	.cfi_endproc
-.LFE308:
-	.size	ftl_write, .-ftl_write
-	.section	.text.FlashReadFacBbtData,"ax",%progbits
+	.word	-1431655765
+	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
+	.section	.text.FtlRecoverySuperblock,"ax",%progbits
 	.align	1
-	.global	FlashReadFacBbtData
+	.global	FtlRecoverySuperblock
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashReadFacBbtData, %function
-FlashReadFacBbtData:
-.LFB264:
-	.loc 2 3288 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 48
+	.type	FtlRecoverySuperblock, %function
+FtlRecoverySuperblock:
+	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL3108:
+	ldrh	r3, [r0]
+	movw	r2, #65535
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	mov	fp, r2
-	.loc 2 3293 0
-	ldr	r2, .L2832
-.LVL3109:
-	.loc 2 3288 0
-	sub	sp, sp, #48
-	.cfi_def_cfa_offset 80
-	.loc 2 3288 0
-	mov	r6, r1
-	mov	r4, r0
-	.loc 2 3295 0
-	ldr	r7, .L2832+4
-	.loc 2 3293 0
-	ldrh	r3, [r2, #14]
-	ldrh	r2, [r2, #12]
-	smulbb	r3, r3, r2
-	.loc 2 3295 0
-	ldr	r2, [r7]
-	.loc 2 3293 0
-	uxth	r3, r3
-.LVL3110:
-	.loc 2 3295 0
-	str	r2, [sp, #20]
-	.loc 2 3296 0
-	ldr	r2, .L2832+8
-	.loc 2 3297 0
-	subs	r5, r3, #1
-	.loc 2 3298 0
-	mul	r10, r6, r3
-	.loc 2 3297 0
-	uxth	r5, r5
-.LVL3111:
-	subs	r3, r3, #15
-.LVL3112:
-	.loc 2 3296 0
-	ldr	r1, [r2]
-.LVL3113:
-	mov	r8, r2
-	str	r1, [sp, #24]
-.LVL3114:
-.L2821:
-	.loc 2 3297 0 discriminator 1
-	cmp	r3, r5
-	ble	.L2827
-	.loc 2 3289 0
-	mov	r0, #-1
-	b	.L2820
-.L2827:
-	.loc 2 3298 0
-	add	r2, r5, r10
-	.loc 2 3300 0
-	add	r0, sp, #12
-	.loc 2 3298 0
-	lsls	r2, r2, #10
-	str	r3, [sp, #4]
-.LVL3115:
-	.loc 2 3299 0
-	str	r2, [sp, #16]
-	.loc 2 3300 0
-	movs	r2, #1
-	mov	r1, r2
-	bl	FlashReadPages
-.LVL3116:
-	.loc 2 3301 0
-	ldr	r2, [sp, #12]
-	ldr	r3, [sp, #4]
-	adds	r2, r2, #1
-	beq	.L2822
-	.loc 2 3302 0
-	ldr	r2, [r8]
-	ldrh	r1, [r2]
-	movw	r2, #61664
-	cmp	r1, r2
-	bne	.L2822
-.LVL3117:
-	.loc 2 3304 0
-	cbz	r4, .L2828
-.LVL3118:
-.LBB550:
-.LBB551:
-	.loc 2 3305 0
-	cbnz	r6, .L2824
-	.loc 2 3306 0
-	ldr	r0, .L2832+12
-	.loc 2 3307 0
-	movs	r5, #1
-.LVL3119:
-.L2825:
-	.loc 2 3306 0
-	ldr	r1, [r0]
-	uxth	r3, r6
-.LVL3120:
-	adds	r6, r6, #1
+	mov	r10, r0
+	sub	sp, sp, #56
+	cmp	r3, r2
+	beq	.L2689
+	ldrh	r3, [r0, #2]
+	str	r3, [sp, #12]
+	ldrb	r3, [r0, #6]	@ zero_extendqisi2
+	ldr	r1, [sp, #12]
+	str	r3, [sp, #28]
+	ldr	r3, .L2698
+	ldrh	r3, [r3]
 	cmp	r3, r1
-	bcc	.L2826
-.LVL3121:
-.L2824:
-	.loc 2 3309 0
-	mov	r2, fp
-	ldr	r1, [r7]
-	mov	r0, r4
-	bl	ftl_memcpy
-.LVL3122:
-	.loc 2 3310 0
-	movs	r3, #4
-	ldr	r0, .L2832+16
-	mov	r2, r3
-	mov	r1, r4
-	bl	rknand_print_hex
-.LVL3123:
+	mov	r3, #0
+	bne	.L2531
+	strh	r3, [r0, #4]	@ movhi
+.L2696:
+	strb	r3, [r10, #6]
+.L2689:
 	movs	r0, #0
-.LVL3124:
-.L2820:
-.LBE551:
-.LBE550:
-	.loc 2 3317 0
-	add	sp, sp, #48
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
+	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL3125:
-.L2826:
-	.cfi_restore_state
-.LBB553:
-.LBB552:
-	.loc 2 3307 0
-	ldr	r1, [r7]
-	lsr	ip, r3, #5
-	and	r3, r3, #31
-.LVL3126:
-	lsl	r3, r5, r3
-	ldr	r2, [r1, ip, lsl #2]
-	orrs	r3, r3, r2
-	str	r3, [r1, ip, lsl #2]
-.LVL3127:
-	b	.L2825
-.LVL3128:
-.L2822:
-.LBE552:
-.LBE553:
-	.loc 2 3297 0 discriminator 2
-	subs	r5, r5, #1
-.LVL3129:
-	uxth	r5, r5
-.LVL3130:
-	b	.L2821
-.LVL3131:
-.L2828:
-	.loc 2 3303 0
-	mov	r0, r4
-.LVL3132:
-	.loc 2 3316 0
-	b	.L2820
-.L2833:
-	.align	2
-.L2832:
-	.word	.LANCHOR15
-	.word	.LANCHOR144
-	.word	.LANCHOR194
-	.word	.LANCHOR146
-	.word	.LC58
-	.cfi_endproc
-.LFE264:
-	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
-	.section	.text.FlashGetBadBlockList,"ax",%progbits
-	.align	1
-	.global	FlashGetBadBlockList
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FlashGetBadBlockList, %function
-FlashGetBadBlockList:
-.LFB265:
-	.loc 2 3320 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL3133:
-	.loc 2 3323 0
-	ldr	r3, .L2844
-	.loc 2 3320 0
-	push	{r4, r5, r6, r7, r8, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 4, -24
-	.cfi_offset 5, -20
-	.cfi_offset 6, -16
-	.cfi_offset 7, -12
-	.cfi_offset 8, -8
-	.cfi_offset 14, -4
-	.loc 2 3320 0
-	mov	r5, r0
-	.loc 2 3326 0
-	ldr	r6, .L2844+4
-	.loc 2 3323 0
+.L2531:
+	ldrh	r0, [r0, #16]
+.L2532:
+	cmp	r0, r2
+	uxth	r5, r3
+	add	r3, r3, #1
+	beq	.L2533
+	ldrb	r1, [r10, #8]	@ zero_extendqisi2
+	cmp	r1, #1
+	bne	.L2534
+	bl	FtlGetLastWrittenPage
+	adds	r6, r0, #1
+	mov	r4, r0
+	beq	.L2535
+	ldr	r3, .L2698+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L2613
+	ldr	r3, .L2698+8
+	ldrh	r6, [r3, r0, lsl #1]
+.L2536:
+	ldr	r3, .L2698+12
+	movw	lr, #65535
+	mov	r8, #36
+	ldrh	fp, [r3]
+	ldr	r3, .L2698+16
+	ldr	r0, [r3]
+	ldr	r3, .L2698+20
 	ldr	r3, [r3]
-	.loc 2 3326 0
-	ldr	r0, [r6]
-.LVL3134:
-	.loc 2 3323 0
-	ldrb	r4, [r3, #13]	@ zero_extendqisi2
-	ldrh	r3, [r3, #14]
-	smulbb	r4, r4, r3
-	uxth	r4, r4
-	.loc 2 3326 0
-	adds	r2, r4, #7
-	asrs	r2, r2, #3
-	bl	FlashReadFacBbtData
-.LVL3135:
-	.loc 2 3327 0
-	adds	r0, r0, #1
-.LVL3136:
-	mov	ip, r6
-	bne	.L2835
-.LVL3137:
-.L2839:
-	.loc 2 3321 0
+	str	r3, [sp, #8]
+	ldr	r3, .L2698+24
+	ldrh	ip, [r3]
+	add	r3, r10, #16
+	str	r3, [sp, #20]
+	str	r3, [sp, #4]
 	movs	r3, #0
-.L2836:
-.LVL3138:
-	.loc 2 3338 0
-	movw	r2, #65535
-	.loc 2 3340 0
-	movs	r0, #0
-	.loc 2 3338 0
-	strh	r2, [r5, r3, lsl #1]	@ movhi
-	.loc 2 3340 0
-	pop	{r4, r5, r6, r7, r8, pc}
-.LVL3139:
-.L2835:
-	.loc 2 3332 0
-	movs	r2, #0
-	lsr	lr, r4, #4
-	mov	r3, r2
-	.loc 2 3328 0
-	subs	r4, r4, #1
-	.loc 2 3329 0
-	mov	r8, #1
-.LVL3140:
-.L2837:
-	uxth	r1, r2
-.LVL3141:
-	.loc 2 3328 0 discriminator 1
-	cmp	r1, r4
-	bge	.L2836
-	.loc 2 3329 0
-	ldr	r6, [ip]
-	lsrs	r7, r1, #5
-	and	r0, r1, #31
-	lsl	r0, r8, r0
-	adds	r2, r2, #1
-	ldr	r6, [r6, r7, lsl #2]
-	tst	r0, r6
-	.loc 2 3330 0
-	ittt	ne
-	addne	r0, r3, #1
-.LVL3142:
-	strhne	r1, [r5, r3, lsl #1]	@ movhi
-	uxthne	r3, r0
-.LVL3143:
-	.loc 2 3332 0
-	cmp	r3, lr
-	bcc	.L2837
-	b	.L2839
-.L2845:
-	.align	2
-.L2844:
-	.word	.LANCHOR18
-	.word	.LANCHOR150
-	.cfi_endproc
-.LFE265:
-	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
-	.section	.text.FtlMakeBbt,"ax",%progbits
-	.align	1
-	.global	FtlMakeBbt
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlMakeBbt, %function
-FtlMakeBbt:
-.LFB324:
-	.loc 5 361 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	.loc 5 369 0
-	ldr	r3, .L2866
-	.loc 5 361 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 5 369 0
-	ldr	r7, [r3]
-	cmp	r7, #0
-	bne	.L2847
-	ldr	r8, .L2866+40
-.LBB556:
-.LBB557:
-	.loc 5 375 0
-	ldr	r4, .L2866+4
-	.loc 5 371 0
-	bl	FtlBbtMemInit
-.LVL3144:
-	sub	r10, r8, #18
-	.loc 5 372 0
-	bl	FtlLoadFactoryBbt
-.LVL3145:
-.L2848:
-	.loc 5 373 0
-	ldr	r3, .L2866+8
-	ldrh	r3, [r3]
+	mov	r7, r3
+.L2537:
+	uxth	r2, r3
+	cmp	fp, r2
+	bhi	.L2541
+	ldrb	r3, [r10, #8]	@ zero_extendqisi2
+	cmp	r3, #1
+	bne	.L2614
+	ldr	r3, .L2698+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	adds	r3, r3, #0
+	it	ne
+	movne	r3, #1
+.L2690:
+	str	r3, [sp, #36]
+	mov	r1, r7
+	ldr	r2, [sp, #36]
+	movs	r5, #0
+	bl	FlashReadPages
+	ldr	r3, .L2698+28
+	movw	fp, #65535
+	ldr	r8, .L2698+16
+	ldr	r3, [r3]
+	subs	r3, r3, #1
+	str	r3, [sp, #4]
+.L2543:
+	uxth	r3, r5
 	cmp	r7, r3
-	bcc	.L2854
-	.loc 5 427 0
-	ldr	r5, .L2866+12
-	.loc 5 373 0
-	movs	r4, #0
-.L2855:
-	.loc 5 427 0
-	ldrh	r3, [r5]
-	uxth	r0, r4
-.LVL3146:
+	bhi	.L2548
+	bne	.L2546
 	adds	r4, r4, #1
-	cmp	r3, r0
-	bhi	.L2856
-	.loc 5 433 0
-	ldr	r4, .L2866+16
-	.loc 5 442 0
-	movw	r6, #65535
-	.loc 5 433 0
-	ldrh	r5, [r4, #12]
-	subs	r5, r5, #1
-	uxth	r5, r5
-.LVL3147:
-.L2857:
-	ldrh	r3, [r4, #12]
-	subs	r3, r3, #47
-	cmp	r3, r5
-	bgt	.L2861
-	.loc 5 435 0
-	mov	r0, r5
-	bl	FtlBbmIsBadBlock
-.LVL3148:
-	cmp	r0, #1
-	beq	.L2858
-	.loc 5 437 0
-	mov	r0, r5
-	bl	FlashTestBlk
-.LVL3149:
-	cmp	r0, #0
-	beq	.L2859
-	.loc 5 439 0
-	mov	r0, r5
-	bl	FtlBbmMapBadBlock
-.LVL3150:
-.L2858:
-	.loc 5 433 0
-	subs	r5, r5, #1
-.LVL3151:
-	uxth	r5, r5
-.LVL3152:
-	b	.L2857
-.LVL3153:
-.L2854:
-	.loc 5 375 0
-	ldr	r3, .L2866+20
-	.loc 5 378 0
-	movw	r1, #65535
-	ldrh	r2, [r10, #2]!
-	.loc 5 375 0
-	ldr	r0, [r3]
-	.loc 5 376 0
-	ldr	r3, .L2866+24
-	.loc 5 378 0
+	uxth	r3, r4
+	str	r3, [sp, #8]
+	ldr	r3, [r8]
+	ldr	r0, [r3, #4]
+.L2691:
+	ubfx	r0, r0, #10, #16
+	bl	P2V_plane
+	ldrb	r3, [r10, #8]	@ zero_extendqisi2
+	str	r0, [sp, #16]
+	cmp	r3, #1
+	bne	.L2550
+	ldr	r2, .L2698+4
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbnz	r2, .L2550
+	ldr	r1, [sp, #8]
+	ldr	r2, .L2698+8
+	ldrh	r2, [r2, r1, lsl #1]
+	str	r2, [sp, #8]
+.L2550:
+	ldr	r2, .L2698
+	ldr	r1, [sp, #8]
+	ldrh	r2, [r2]
 	cmp	r2, r1
-	.loc 5 375 0
-	str	r0, [r4, #8]
-	.loc 5 376 0
-	ldr	fp, [r3]
-	str	r3, [sp, #4]
-	ldr	r3, .L2866+28
-	str	fp, [r4, #12]
-.LVL3154:
-	.loc 5 378 0
-	beq	.L2849
-	.loc 5 380 0
-	ldrh	r6, [r3]
-	.loc 5 382 0
-	mov	r0, r4
-	.loc 5 380 0
-	str	r3, [sp]
-	mla	r6, r7, r6, r2
-.LVL3155:
-	.loc 5 381 0
-	lsls	r2, r6, #10
-	str	r2, [r4, #4]
-	.loc 5 382 0
-	movs	r2, #1
-	mov	r1, r2
-	bl	FlashReadPages
-.LVL3156:
-	.loc 5 383 0
-	ldr	r3, [sp]
-	ldr	r1, [r4, #8]
-	ldr	r0, [r8]
-	ldrh	r2, [r3]
-	adds	r2, r2, #7
-	asrs	r2, r2, #3
-	bl	ftl_memcpy
-.LVL3157:
-.L2850:
-	.loc 5 422 0
-	uxth	r0, r6
-	.loc 5 373 0
-	adds	r7, r7, #1
-.LVL3158:
-	add	r8, r8, #4
-	.loc 5 422 0
-	bl	FtlBbmMapBadBlock
-.LVL3159:
-	b	.L2848
-.LVL3160:
-.L2849:
-	.loc 5 387 0
-	mov	r1, r7
-	str	r3, [sp]
-	bl	FlashGetBadBlockList
-.LVL3161:
-	.loc 5 388 0
-	ldr	r1, [r8]
-	ldr	r0, [r4, #8]
-	bl	FtlBbt2Bitmap
-.LVL3162:
-	.loc 5 390 0
-	ldr	r3, [sp]
-	ldrh	r5, [r3]
-.L2852:
-	.loc 5 394 0
-	subs	r5, r5, #1
-	uxth	r5, r5
-.LVL3163:
-.L2851:
-	.loc 5 392 0
-	ldr	r3, [sp]
-	ldrh	r0, [r3]
-	smlabb	r0, r0, r7, r5
-	uxth	r0, r0
-	bl	FtlBbmIsBadBlock
-.LVL3164:
-	cmp	r0, #1
-	beq	.L2852
-	.loc 5 397 0
-	ldr	r3, [sp, #4]
-	movs	r2, #16
+	bne	.L2551
+	ldrh	r2, [sp, #8]
+	strh	r2, [r10, #2]	@ movhi
+	movs	r2, #0
+	strb	r2, [r10, #6]
+	strh	r2, [r10, #4]	@ movhi
+.L2551:
+	ldr	r2, [sp, #8]
+	ldr	r1, [sp, #12]
+	cmp	r2, r1
+	bne	.L2552
+	ldr	r2, [sp, #16]
+	ldr	r1, [sp, #28]
+	cmp	r2, r1
+	bne	.L2552
+.L2697:
+	ldr	r1, [sp, #8]
+	mov	r0, r10
+	bl	ftl_sb_update_avl_pages
+	b	.L2689
+.L2533:
+	uxth	r1, r3
+	adds	r1, r1, #8
+	ldrh	r0, [r10, r1, lsl #1]
+	b	.L2532
+.L2534:
 	movs	r1, #0
-	.loc 5 396 0
-	strh	r5, [r10]	@ movhi
-	.loc 5 397 0
-	ldr	r0, [r3]
-	bl	ftl_memset
-.LVL3165:
-	.loc 5 398 0
-	movw	r3, #61664
-	strh	r3, [fp]	@ movhi
-	.loc 5 399 0
+	bl	FtlGetLastWrittenPage
+	mov	r4, r0
+	adds	r0, r0, #1
+	beq	.L2535
+.L2613:
+	mov	r6, r4
+	b	.L2536
+.L2535:
+	ldr	r3, [sp, #12]
+	cbz	r3, .L2538
+	ldr	r1, .L2698+32
+	movw	r2, #2211
+	ldr	r0, .L2698+36
+	bl	printf
+	ldr	r1, .L2698+40
+	ldr	r0, .L2698+44
+	bl	printf
+.L2538:
+	ldr	r3, [sp, #28]
+	cbz	r3, .L2539
+	cmp	r5, r3
+	beq	.L2539
+	ldr	r1, .L2698+32
+	movw	r2, #2212
+	ldr	r0, .L2698+36
+	bl	printf
+	ldr	r1, .L2698+40
+	ldr	r0, .L2698+44
+	bl	printf
+.L2539:
 	movs	r3, #0
-	str	r3, [fp, #4]
-	.loc 5 400 0
-	ldrh	r3, [r10]
-	strh	r3, [fp, #2]	@ movhi
-	.loc 5 401 0
-	ldr	r3, [sp]
-	.loc 5 403 0
+	strh	r3, [r10, #2]	@ movhi
+	b	.L2696
+.L2541:
+	ldr	r1, [sp, #4]
+	ldrh	r2, [r1], #2
+	cmp	r2, lr
+	str	r1, [sp, #4]
+	beq	.L2540
+	mla	r1, r8, r7, r0
+	orr	r2, r6, r2, lsl #10
+	str	r2, [r1, #4]
+	movs	r2, #0
+	str	r2, [r1, #8]
+	mul	r2, ip, r7
+	adds	r7, r7, #1
+	uxth	r7, r7
+	bic	r2, r2, #3
+	mov	r5, r2
+	ldr	r2, [sp, #8]
+	add	r5, r5, r2
+	str	r5, [r1, #12]
+.L2540:
+	adds	r3, r3, #1
+	b	.L2537
+.L2614:
+	movs	r3, #0
+	b	.L2690
+.L2548:
+	movs	r3, #36
 	ldr	r1, [r8]
-	ldr	r0, [r4, #8]
-	.loc 5 401 0
-	ldrh	r6, [r3]
-	ldrh	r3, [r10]
-	mla	r6, r7, r6, r3
-.LVL3166:
-	.loc 5 402 0
-	lsls	r3, r6, #10
-	str	r3, [r4, #4]
-	.loc 5 403 0
-	ldr	r3, .L2866+32
-	ldrh	r2, [r3]
-	lsls	r2, r2, #2
-	bl	ftl_memcpy
-.LVL3167:
-	.loc 5 404 0
-	movs	r2, #1
-	mov	r0, r4
-	mov	r1, r2
-	bl	FlashEraseBlocks
-.LVL3168:
-	.loc 5 405 0
-	movs	r3, #1
-	mov	r0, r4
-	mov	r2, r3
-	mov	r1, r3
-	bl	FlashProgPages
-.LVL3169:
-	.loc 5 406 0
-	ldr	r3, [r4]
+	muls	r3, r5, r3
+	adds	r2, r1, r3
+	ldr	r3, [r1, r3]
+	cbnz	r3, .L2544
+	ldr	r2, [r2, #12]
+	ldr	r3, [r2, #4]
+	adds	r1, r3, #1
+	beq	.L2545
+	ldr	r1, .L2698+28
+	mov	r0, r3
+	ldr	r1, [r1]
+	bl	ftl_cmp_data_ver
+	cbz	r0, .L2545
+	ldr	r1, .L2698+28
 	adds	r3, r3, #1
-	bne	.L2850
-	.loc 5 408 0
-	uxth	r0, r6
-	bl	FtlBbmMapBadBlock
-.LVL3170:
-	b	.L2851
-.LVL3171:
-.L2856:
-	.loc 5 429 0
-	bl	FtlBbmMapBadBlock
-.LVL3172:
-	b	.L2855
-.LVL3173:
-.L2859:
-	.loc 5 442 0
-	ldrh	r3, [r4]
-	cmp	r3, r6
-	bne	.L2860
-	.loc 5 444 0
-	strh	r5, [r4]	@ movhi
-	b	.L2858
-.L2860:
-	.loc 5 448 0
-	strh	r5, [r4, #4]	@ movhi
-.L2861:
-	.loc 5 460 0
-	ldr	r3, .L2866+36
-	.loc 5 457 0
-	movs	r5, #0
-.LVL3174:
-	.loc 5 459 0
-	str	r5, [r4, #8]
-	.loc 5 462 0
-	movs	r2, #2
-	movs	r1, #1
-	.loc 5 457 0
-	strh	r5, [r4, #2]	@ movhi
-	.loc 5 460 0
-	ldr	r0, [r3]
-	ldrh	r3, [r4]
-	lsls	r3, r3, #10
-	str	r3, [r0, #4]
-	.loc 5 461 0
-	ldrh	r3, [r4, #4]
-	lsls	r3, r3, #10
-	str	r3, [r0, #40]
-	.loc 5 462 0
-	bl	FlashEraseBlocks
-.LVL3175:
-	.loc 5 464 0
-	ldrh	r0, [r4]
-	bl	FtlBbmMapBadBlock
-.LVL3176:
-	.loc 5 465 0
-	ldrh	r0, [r4, #4]
-	bl	FtlBbmMapBadBlock
-.LVL3177:
-	.loc 5 467 0
-	bl	FtlBbmTblFlush
-.LVL3178:
-	.loc 5 468 0
-	ldr	r3, [r4, #8]
-	.loc 5 471 0
-	ldrh	r2, [r4, #4]
-	.loc 5 472 0
-	strh	r5, [r4, #2]	@ movhi
-	.loc 5 468 0
+	str	r3, [r1]
+.L2545:
+	ldr	r3, [r2]
 	adds	r3, r3, #1
-	str	r3, [r4, #8]
-	.loc 5 470 0
-	ldrh	r3, [r4]
-.LVL3179:
-	.loc 5 471 0
-	strh	r2, [r4]	@ movhi
-	.loc 5 473 0
-	strh	r3, [r4, #4]	@ movhi
-	.loc 5 475 0
-	bl	FtlBbmTblFlush
-.LVL3180:
-.L2847:
-.LBE557:
-.LBE556:
-	.loc 5 478 0
+	bne	.L2547
+.L2546:
+	uxth	r3, r4
+	uxth	r5, r5
+	str	r3, [sp, #8]
+	movs	r2, #36
+	ldr	r3, [r8]
+	mla	r5, r2, r5, r3
+	ldr	r0, [r5, #4]
+	b	.L2691
+.L2544:
+	ldr	r1, [r2, #4]
+	uxth	fp, r6
+	ldr	r0, .L2698+48
+	bl	printf
+	ldrh	r2, [r10]
+	ldr	r3, .L2698+52
+	strh	r2, [r3]	@ movhi
+.L2547:
+	adds	r5, r5, #1
+	b	.L2543
+.L2552:
+	movw	r2, #65535
+	cmp	fp, r2
+	bne	.L2553
+	cmp	r3, #0
+	bne	.L2554
+.L2553:
+	ldr	r3, .L2698+56
+	uxth	fp, r6
+	uxth	r6, r6
+	mov	r7, #-1
+	ldr	r2, [r3]
+	adds	r2, r2, #1
+	itt	eq
+	ldreq	r2, [sp, #4]
+	streq	r2, [r3]
+	ldr	r3, [r3]
+	str	r3, [sp, #24]
+	ldr	r3, [sp, #12]
+	adds	r3, r3, #7
+	cmp	r6, r3
+	mov	r6, r7
+	itet	gt
+	subgt	r4, fp, #7
+	ldrle	r4, [sp, #12]
+	uxthgt	r4, r4
+.L2557:
+	cmp	r4, fp
+	bhi	.L2572
+	ldr	r3, .L2698+12
+	movw	lr, #65535
+	mov	ip, #36
+	ldrh	r8, [r3]
+	ldr	r3, .L2698+16
+	ldr	r0, [r3]
+	ldr	r3, [sp, #20]
+	str	r3, [sp, #32]
+	movs	r3, #0
+	mov	r5, r3
+	b	.L2573
+.L2559:
+	ldr	r1, [sp, #32]
+	ldrh	r2, [r1], #2
+	cmp	r2, lr
+	str	r1, [sp, #32]
+	beq	.L2558
+	mla	r1, ip, r5, r0
+	adds	r5, r5, #1
+	orr	r2, r4, r2, lsl #10
+	uxth	r5, r5
+	str	r2, [r1, #4]
+.L2558:
+	adds	r3, r3, #1
+.L2573:
+	uxth	r2, r3
+	cmp	r8, r2
+	bhi	.L2559
+	mov	r1, r5
+	ldr	r2, [sp, #36]
+	bl	FlashReadPages
+	ldr	r2, .L2698+4
+	movs	r1, #36
+	ldr	r3, .L2698+56
 	movs	r0, #0
-	add	sp, sp, #8
-	.cfi_def_cfa_offset 32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2867:
+	movw	ip, #65535
+	ldrb	lr, [r2]	@ zero_extendqisi2
+	ldr	r2, .L2698+16
+	ldr	r3, [r3]
+	ldr	r2, [r2]
+	mla	r5, r1, r5, r2
+.L2560:
+	cmp	r2, r5
+	bne	.L2570
+	cbz	r0, .L2571
+	ldr	r2, .L2698+56
+	str	r3, [r2]
+.L2571:
+	adds	r4, r4, #1
+	uxth	r4, r4
+	b	.L2557
+.L2699:
 	.align	2
-.L2866:
-	.word	.LANCHOR76
-	.word	.LANCHOR199
-	.word	.LANCHOR44
-	.word	.LANCHOR59
-	.word	.LANCHOR74
+.L2698:
+	.word	.LANCHOR53
+	.word	.LANCHOR8
+	.word	.LANCHOR16
+	.word	.LANCHOR38
 	.word	.LANCHOR180
-	.word	.LANCHOR185
-	.word	.LANCHOR50
-	.word	.LANCHOR120
-	.word	.LANCHOR77
-	.word	.LANCHOR74+28
-	.cfi_endproc
-.LFE324:
-	.size	FtlMakeBbt, .-FtlMakeBbt
-	.section	.text.FtlLowFormat,"ax",%progbits
-	.align	1
-	.global	FtlLowFormat
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlLowFormat, %function
-FtlLowFormat:
-.LFB301:
-	.loc 4 767 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 16
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 48
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 4 774 0
-	ldr	r3, .L2899
-	ldr	r4, [r3]
-	cmp	r4, #0
-	bne	.L2870
-	.loc 4 776 0
-	ldr	r5, .L2899+4
-	mov	r1, r4
-	ldr	r3, .L2899+8
-	.loc 4 780 0
-	ldr	r6, .L2899+12
-	.loc 4 776 0
-	ldrh	r2, [r5]
-	ldr	r0, [r3]
-	lsls	r2, r2, #2
-	bl	ftl_memset
-.LVL3181:
-	.loc 4 777 0
-	ldrh	r2, [r5]
-	mov	r1, r4
-	ldr	r3, .L2899+16
-	.loc 4 778 0
-	ldr	r5, .L2899+20
-	.loc 4 777 0
-	lsls	r2, r2, #2
-	ldr	r0, [r3]
-	bl	ftl_memset
-.LVL3182:
-	.loc 4 779 0
-	ldr	r3, .L2899+24
-	.loc 4 780 0
-	ldrh	r0, [r6]
-	.loc 4 778 0
-	str	r4, [r5]
-	.loc 4 779 0
-	str	r4, [r3]
-	.loc 4 780 0
-	bl	FtlFreeSysBlkQueueInit
-.LVL3183:
-	.loc 4 781 0
-	bl	FtlLoadBbt
-.LVL3184:
-	cbz	r0, .L2871
-	.loc 4 782 0
-	bl	FtlMakeBbt
-.LVL3185:
-.L2871:
-	.loc 4 784 0 discriminator 1
-	ldr	ip, .L2899+80
-	.loc 4 767 0 discriminator 1
+	.word	.LANCHOR106
+	.word	.LANCHOR59
+	.word	.LANCHOR160
+	.word	.LANCHOR234
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LC62
+	.word	.LANCHOR235
+	.word	.LANCHOR136
+.L2570:
+	ldr	r1, [r2]
+	cbnz	r1, .L2561
+	ldr	r1, [r2, #12]
+	ldrh	r8, [r1]
+	cmp	r8, ip
+	beq	.L2617
+	ldr	r1, [r1, #4]
+	cmp	r1, #-1
+	beq	.L2617
+	adds	r0, r7, #1
+	bne	.L2619
+	ldr	r0, .L2700
+	ldrh	r0, [r0, r4, lsl #1]
+	cmp	r0, ip
+	bne	.L2563
+	cmp	lr, #0
+	beq	.L2619
+.L2563:
+	ldr	r0, [sp, #4]
+	cmp	r0, r3
+	it	ne
+	movne	r7, r3
+.L2619:
+	movs	r0, #1
+	b	.L2562
+.L2561:
+	cbz	r0, .L2564
+	ldr	r2, .L2700+4
+	str	r3, [r2]
+.L2564:
+	ldr	r3, .L2700+8
+	ldrh	r2, [r10]
+	strh	r2, [r3]	@ movhi
+	ldrb	r3, [r10, #8]	@ zero_extendqisi2
+	cbnz	r3, .L2554
+	ldr	r3, .L2700
+	ldrh	r2, [r3, r4, lsl #1]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L2566
+	adds	r1, r7, #1
+	ldr	r3, .L2700+4
+	beq	.L2567
+	str	r7, [r3]
+.L2554:
+	ldr	r3, .L2700+12
+	movs	r2, #1
+	ldr	r0, .L2700+16
+	ldr	r6, .L2700+20
+	strh	r2, [r3]	@ movhi
+	bl	FtlMapBlkWriteDumpData
+	ldr	fp, [sp, #12]
+.L2574:
+	ldr	r3, .L2700+24
+	movw	ip, #65535
+	ldr	r0, [r6]
+	mov	lr, #36
+	ldr	r1, [sp, #20]
 	movs	r2, #0
-	.loc 4 785 0 discriminator 1
-	ldr	r7, .L2899+28
-	.loc 4 786 0 discriminator 1
-	ldr	r4, .L2899+32
-	ldr	lr, .L2899+112
-.L2872:
-.LVL3186:
-	.loc 4 784 0 discriminator 1
-	ldrh	r1, [ip]
+	ldrh	r5, [r3]
+	ldr	r3, .L2700+28
+	str	r2, [sp, #24]
+	ldrb	r7, [r3]	@ zero_extendqisi2
+.L2575:
 	uxth	r3, r2
-	adds	r2, r2, #1
-.LVL3187:
-	cmp	r3, r1, lsl #7
-	blt	.L2873
-.LVL3188:
-	.loc 4 791 0
-	ldr	r3, .L2899+36
-.LVL3189:
-	.loc 4 790 0
-	movs	r7, #0
-	.loc 4 791 0
-	ldr	fp, .L2899+116
-	ldrh	r4, [r3]
-.LVL3190:
-	mov	r8, r3
-	mov	r10, fp
-.LVL3191:
-.L2874:
-	.loc 4 791 0 is_stmt 0 discriminator 1
-	ldrh	r3, [fp]
-	cmp	r3, r4
-	bhi	.L2875
-	.loc 4 794 0 is_stmt 1
-	ldr	r4, .L2899+40
-.LVL3192:
-	subs	r3, r7, #2
-	ldrh	r1, [r4]
-	cmp	r3, r1, lsl #1
-	bgt	.L2876
-.LVL3193:
-.L2880:
-	.loc 4 790 0
-	movs	r7, #0
-	mov	r6, r7
-.L2877:
-	.loc 4 805 0 discriminator 1
-	ldrh	r3, [r8]
-	uxth	r0, r7
-.LVL3194:
-	adds	r7, r7, #1
-	cmp	r3, r0
-	bhi	.L2881
-	.loc 4 807 0
-	ldrh	r2, [r10]
-	ldr	r3, .L2899+44
-	.loc 4 810 0
-	ldrh	r4, [r4]
-	ldr	r7, .L2899+48
-	.loc 4 807 0
-	str	r2, [r3]
-	.loc 4 810 0
-	ldr	r3, .L2899+52
-	mov	r1, r4
-	ldr	r3, [r3]
-	mov	r0, r3
-.LVL3195:
-	str	r3, [sp, #8]
-	bl	__aeabi_uidiv
-.LVL3196:
-	.loc 4 811 0
-	ldr	r1, .L2899+56
-	ubfx	r3, r0, #5, #16
-	add	r2, r3, #36
-	.loc 4 810 0
-	mov	fp, r0
-	str	r0, [r7]
-	.loc 4 811 0
-	strh	r2, [r1]	@ movhi
-	.loc 4 812 0
-	movs	r2, #24
-	muls	r2, r4, r2
-	.loc 4 811 0
-	str	r3, [sp]
-	str	r1, [sp, #4]
-	.loc 4 812 0
-	cmp	r6, r2
-	ble	.L2882
-	.loc 4 813 0
-	ldr	r3, [sp, #8]
-	mov	r1, r4
-	subs	r0, r3, r6
-	bl	__aeabi_uidiv
-.LVL3197:
-	.loc 4 814 0
-	ldr	r3, [sp, #4]
-	.loc 4 813 0
-	str	r0, [r7]
-	.loc 4 814 0
-	lsrs	r0, r0, #5
-	adds	r0, r0, #24
-	strh	r0, [r3]	@ movhi
-.L2882:
-	.loc 4 817 0
-	ldr	r3, .L2899+60
-	ldr	r3, [r3]
+	cmp	r3, r5
+	bcc	.L2578
+	ldr	r2, [sp, #36]
+	ldr	r1, [sp, #24]
+	bl	FlashReadPages
+	movs	r3, #0
+.L2695:
+	str	r3, [sp, #32]
+	ldr	r2, [sp, #24]
+	ldrh	r3, [sp, #32]
+	cmp	r2, r3
+	bhi	.L2607
+	ldrb	r3, [r10, #8]	@ zero_extendqisi2
+	add	fp, fp, #1
+	uxth	fp, fp
 	cmp	r3, #1
-	bne	.L2883
-	.loc 4 818 0
-	ldr	r2, .L2899+56
-	mov	r1, r4
-	mov	r0, r6
-	ldrh	r3, [r2]
-	str	r2, [sp, #12]
-	str	r3, [sp, #8]
-	bl	__aeabi_uidiv
-.LVL3198:
-	ldr	r3, [sp, #8]
-	ldr	r2, [sp, #12]
-	uxtah	r0, r3, r0
-	add	r3, r3, r0, asr #2
-	strh	r3, [r2]	@ movhi
-.L2883:
-	.loc 4 820 0
-	ldr	r3, .L2899+64
+	bne	.L2608
+	ldr	r3, .L2700+28
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2884
-	.loc 4 821 0
-	ldr	r2, .L2899+56
-	mov	r1, r4
-	mov	r0, r6
-	ldrh	r3, [r2]
-	str	r2, [sp, #12]
-	str	r3, [sp, #8]
-	bl	__aeabi_uidiv
-.LVL3199:
-	ldr	r3, [sp, #8]
-	ldr	r2, [sp, #12]
-	uxtah	r0, r3, r0
-	add	r3, r3, r0, asr #2
-	strh	r3, [r2]	@ movhi
-.L2884:
-	.loc 4 823 0
-	ldr	r3, .L2899+68
-	ldrh	r3, [r3]
-	cbz	r3, .L2886
-	.loc 4 824 0
-	ldr	r2, .L2899+56
-	ldrh	r1, [r2]
-	add	r1, r1, r3, lsr #1
-	strh	r1, [r2]	@ movhi
-	.loc 4 825 0
-	mul	r1, r4, r3
-	cmp	r6, r1
-	bge	.L2886
-	.loc 4 827 0
-	ldr	r1, [sp]
-	adds	r3, r3, #32
-	.loc 4 826 0
-	str	fp, [r7]
-	.loc 4 827 0
-	add	r1, r1, r3
-	strh	r1, [r2]	@ movhi
-.L2886:
-	.loc 4 836 0
-	ldr	r3, [sp, #4]
-	ldr	r6, .L2899+72
-.LVL3200:
-	ldrh	r2, [r3]
-	ldr	r3, [r7]
-	subs	r3, r3, r2
-	muls	r4, r3, r4
-	.loc 4 837 0
-	ldr	r3, .L2899+76
+	cbz	r3, .L2608
+	ldr	r3, .L2700+32
 	ldrh	r3, [r3]
-	.loc 4 836 0
-	str	r4, [r6]
-	.loc 4 837 0
-	muls	r4, r3, r4
-	.loc 4 838 0
-	ldr	r3, .L2899+80
+	cmp	r3, fp
+	bne	.L2608
+	ldr	r3, [sp, #8]
+	cmp	r3, fp
+	beq	.L2583
+.L2608:
+	ldr	r3, .L2700+36
 	ldrh	r3, [r3]
-	.loc 4 837 0
-	str	r4, [r7]
-	.loc 4 857 0
-	ldr	r7, .L2899+84
-	.loc 4 838 0
-	muls	r4, r3, r4
-	ldr	r3, .L2899+88
-	str	r4, [r3]
-	.loc 4 852 0
-	movw	r4, #65535
-	.loc 4 843 0
-	bl	FtlBbmTblFlush
-.LVL3201:
-	.loc 4 850 0
-	ldrh	r2, [r10]
-	movs	r1, #0
-	ldr	r10, .L2899+120
-	lsls	r2, r2, #1
-	ldr	r0, [r10]
-	bl	ftl_memset
-.LVL3202:
-	.loc 4 851 0
-	ldr	r2, .L2899+92
+	cmp	r3, fp
+	bne	.L2574
+	ldr	r2, .L2700+24
+	movw	r0, #65535
 	movs	r3, #0
-	.loc 4 857 0
-	strh	r3, [r7, #2]	@ movhi
-	.loc 4 861 0
-	movs	r1, #255
-	.loc 4 858 0
-	strb	r3, [r7, #6]
-	.loc 4 851 0
+	strh	fp, [r10, #2]	@ movhi
+	strh	r3, [r10, #4]	@ movhi
+	ldrh	r2, [r2]
+.L2609:
+	uxth	r1, r3
+	cmp	r1, r2
+	bcs	.L2689
+	ldr	r1, [sp, #20]
+	ldrh	r4, [r1], #2
+	cmp	r4, r0
+	str	r1, [sp, #20]
+	add	r1, r3, #1
+	bne	.L2696
+	mov	r3, r1
+	b	.L2609
+.L2567:
+	ldr	r2, [sp, #4]
+	ldr	r1, [sp, #24]
+	cmp	r2, r1
+	itet	eq
+	ldreq	r2, [r3]
+	movne	r2, r1
+	addeq	r2, r2, #-1
+.L2692:
+	str	r2, [r3]
+	b	.L2554
+.L2566:
+	ldr	r3, [sp, #4]
+	cmp	r6, r3
+	beq	.L2569
+	adds	r2, r6, #1
+	beq	.L2554
+	ldr	r3, .L2700+4
+	str	r6, [r3]
+	b	.L2554
+.L2569:
+	ldr	r2, .L2700+4
+	ldr	r1, [sp, #4]
+	ldr	r3, [r2]
+	cmp	r1, r3
+	beq	.L2554
+	subs	r3, r3, #1
 	str	r3, [r2]
-	.loc 4 852 0
-	ldr	r2, .L2899+96
-	.loc 4 859 0
-	strh	r3, [r7]	@ movhi
-	.loc 4 853 0
-	strh	r3, [r2, #2]	@ movhi
-	.loc 4 854 0
-	strb	r3, [r2, #6]
-	.loc 4 855 0
-	strb	r3, [r2, #8]
-	.loc 4 860 0
-	movs	r3, #1
-	.loc 4 852 0
-	strh	r4, [r2]	@ movhi
-	.loc 4 861 0
-	ldrh	r2, [r8]
-	mov	r8, r10
-	.loc 4 860 0
-	strb	r3, [r7, #8]
-	.loc 4 870 0
-	mov	r10, r7
-	.loc 4 861 0
-	ldr	r3, .L2899+100
-	lsrs	r2, r2, #3
-	ldr	r0, [r3]
-	bl	ftl_memset
-.LVL3203:
-.L2888:
-	.loc 4 870 0
-	mov	r0, r10
-	bl	make_superblock
-.LVL3204:
-	.loc 4 871 0
-	ldrb	r3, [r7, #7]	@ zero_extendqisi2
-	ldrh	r2, [r7]
-	cmp	r3, #0
-	bne	.L2889
-	.loc 4 874 0
-	ldr	r3, [r8]
-	strh	r4, [r3, r2, lsl #1]	@ movhi
-	.loc 4 875 0
-	ldrh	r3, [r7]
+	b	.L2554
+.L2617:
+	mov	r1, r3
+	mov	r3, r6
+.L2562:
+	mov	r6, r3
+	adds	r2, r2, #36
+	mov	r3, r1
+	b	.L2560
+.L2572:
+	mov	r2, #-1
+	ldr	r3, .L2700+4
+	b	.L2692
+.L2578:
+	ldrh	r3, [r1], #2
+	cmp	r3, ip
+	beq	.L2576
+	ldr	r4, [sp, #24]
+	orr	r3, fp, r3, lsl #10
+	mla	r4, lr, r4, r0
+	str	r3, [r4, #4]
+	ldrb	r8, [r10, #8]	@ zero_extendqisi2
+	cmp	r8, #1
+	bne	.L2577
+	cbz	r7, .L2577
+	orr	r3, r3, #-2147483648
+	str	r3, [r4, #4]
+.L2577:
+	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	strh	r3, [r7]	@ movhi
-	.loc 4 876 0
-	b	.L2888
-.LVL3205:
-.L2873:
-	.loc 4 785 0 discriminator 3
-	ldr	r0, [r7]
-	mvns	r1, r3
-	orr	r1, r3, r1, lsl #16
-	str	r1, [r0, r3, lsl #2]
-	.loc 4 786 0 discriminator 3
-	ldr	r1, [r4]
-	str	lr, [r1, r3, lsl #2]
-.LVL3206:
-	b	.L2872
-.LVL3207:
-.L2875:
-	.loc 4 792 0 discriminator 3
+	uxth	r3, r3
+	str	r3, [sp, #24]
+.L2576:
+	adds	r2, r2, #1
+	b	.L2575
+.L2607:
+	ldr	r3, [sp, #32]
+	movs	r5, #36
+	ldr	r8, [r6]
+	muls	r5, r3, r5
+	add	r7, r8, r5
+	ldr	r4, [r7, #4]
+	ubfx	r0, r4, #10, #16
+	str	r4, [sp, #52]
+	bl	P2V_plane
+	ldr	r3, [sp, #12]
+	cmp	fp, r3
+	bcc	.L2580
+	bne	.L2581
+	ldr	r3, [sp, #28]
+	cmp	r3, r0
+	bhi	.L2580
+.L2581:
+	ldr	r3, [sp, #8]
+	cmp	fp, r3
+	bne	.L2582
+	ldr	r3, [sp, #16]
+	cmp	r3, r0
+	beq	.L2583
+.L2582:
+	ldr	r3, [r8, r5]
+	adds	r3, r3, #1
+	beq	.L2584
+	ldr	r3, [r7, #12]
+	movw	r2, #61589
+	ldrh	r1, [r3]
+	cmp	r1, r2
+	beq	.L2585
+.L2591:
+	ldrh	r0, [r10]
+.L2694:
+	bl	decrement_vpc_count
+.L2580:
+	ldr	r3, [sp, #32]
+	adds	r3, r3, #1
+	b	.L2695
+.L2585:
+	ldr	r2, [r3, #4]
+	str	r2, [sp, #4]
+	adds	r2, r2, #1
+	beq	.L2586
+	ldr	r2, .L2700+40
+	ldr	r0, [sp, #4]
+	ldr	r1, [r2]
+	bl	ftl_cmp_data_ver
+	cbz	r0, .L2586
+	ldr	r1, [sp, #4]
+	adds	r1, r1, #1
+	str	r1, [r2]
+.L2586:
+	ldr	r4, [r3, #8]
+	add	r1, sp, #48
+	ldr	r3, [r3, #12]
+	movs	r2, #0
 	mov	r0, r4
+	str	r3, [sp, #44]
+	bl	log2phys
+	ldr	r3, .L2700+4
+	ldr	r1, [r3]
+	adds	r3, r1, #1
+	beq	.L2587
+	ldr	r0, [sp, #4]
+	bl	ftl_cmp_data_ver
+	cmp	r0, #0
+	beq	.L2587
+	ldr	r3, [sp, #44]
+	adds	r7, r3, #1
+	beq	.L2588
+	ldr	r0, [r6]
+	movs	r2, #0
 	movs	r1, #1
-	bl	FtlLowFormatEraseBlock
-.LVL3208:
-	.loc 4 791 0 discriminator 3
-	adds	r4, r4, #1
-.LVL3209:
-	.loc 4 792 0 discriminator 3
-	add	r7, r7, r0
-.LVL3210:
-	uxth	r7, r7
-.LVL3211:
-	.loc 4 791 0 discriminator 3
-	uxth	r4, r4
-.LVL3212:
-	b	.L2874
-.LVL3213:
-.L2876:
-	.loc 4 796 0
-	mov	r0, r7
-	bl	__aeabi_uidiv
-.LVL3214:
-	ldr	r3, .L2899+104
+	add	r0, r0, r5
+	str	r3, [r0, #4]
+	ldr	r7, [r0, #12]
+	bl	FlashReadPages
+	ldr	r2, [r6]
+	ldr	r1, [r2, r5]
+	adds	r3, r2, r5
+	adds	r1, r1, #1
+	bne	.L2589
+.L2590:
+	mov	r3, #-1
+	ldrh	r0, [r10]
+	str	r3, [sp, #44]
+	bl	decrement_vpc_count
+.L2598:
+	ldr	r7, [sp, #44]
+	adds	r0, r7, #1
+	beq	.L2580
+.L2612:
+	ubfx	r0, r7, #10, #16
+	bl	P2V_block_in_plane
+	ldr	r3, .L2700+44
+	mov	r4, r0
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bhi	.L2603
+	ldr	r1, .L2700+48
+	movw	r2, #2494
+	ldr	r0, .L2700+52
+	bl	printf
+	ldr	r1, .L2700+56
+	ldr	r0, .L2700+60
+	bl	printf
+.L2603:
+	ldr	r3, .L2700+64
 	ldr	r3, [r3]
-	add	r0, r0, r3
-	uxth	r0, r0
-	bl	FtlSysBlkNumInit
-.LVL3215:
-	.loc 4 797 0
-	ldrh	r0, [r6]
-	bl	FtlFreeSysBlkQueueInit
-.LVL3216:
-	.loc 4 799 0
-	ldrh	r6, [r8]
-.LVL3217:
-.L2878:
-	.loc 4 799 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r10]
-	cmp	r3, r6
-	bls	.L2880
-	.loc 4 800 0 is_stmt 1 discriminator 3
-	mov	r0, r6
-	movs	r1, #1
-	.loc 4 799 0 discriminator 3
-	adds	r6, r6, #1
-.LVL3218:
-	.loc 4 800 0 discriminator 3
-	bl	FtlLowFormatEraseBlock
-.LVL3219:
-	.loc 4 799 0 discriminator 3
-	uxth	r6, r6
-.LVL3220:
-	b	.L2878
-.LVL3221:
-.L2881:
-	.loc 4 806 0 discriminator 3
-	movs	r1, #0
-	bl	FtlLowFormatEraseBlock
-.LVL3222:
-	add	r6, r6, r0
-.LVL3223:
-	uxth	r6, r6
-.LVL3224:
-	b	.L2877
-.LVL3225:
-.L2889:
-	.loc 4 878 0
-	ldr	r3, [r5]
-	.loc 4 879 0
-	ldrh	r1, [r7, #4]
-	.loc 4 881 0
-	ldr	r4, .L2899+108
-	.loc 4 878 0
-	str	r3, [r7, #12]
-	adds	r3, r3, #1
-	str	r3, [r5]
-	.loc 4 879 0
-	ldr	r3, [r8]
-	.loc 4 886 0
-	mov	r10, r4
-	.loc 4 879 0
-	strh	r1, [r3, r2, lsl #1]	@ movhi
-	.loc 4 881 0
-	movs	r3, #0
-	strh	r3, [r4, #2]	@ movhi
-	.loc 4 882 0
-	strb	r3, [r4, #6]
-	.loc 4 883 0
-	ldrh	r3, [r7]
-	.loc 4 890 0
-	movw	r7, #65535
-	.loc 4 883 0
-	adds	r3, r3, #1
-	strh	r3, [r4]	@ movhi
-	.loc 4 884 0
-	movs	r3, #1
-	strb	r3, [r4, #8]
-.L2890:
-	.loc 4 886 0
-	mov	r0, r10
-	bl	make_superblock
-.LVL3226:
-	.loc 4 887 0
-	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	ldrh	r2, [r4]
+	ldrh	r3, [r3, r4, lsl #1]
 	cmp	r3, #0
-	bne	.L2891
-	.loc 4 890 0
-	ldr	r3, [r8]
-	strh	r7, [r3, r2, lsl #1]	@ movhi
-	.loc 4 891 0
-	ldrh	r3, [r4]
-	adds	r3, r3, #1
-	strh	r3, [r4]	@ movhi
-	.loc 4 892 0
-	b	.L2890
-.L2900:
+	beq	.L2604
+	mov	r0, r4
+	b	.L2694
+.L2588:
+	ldr	r3, [sp, #52]
+	ldr	r2, [sp, #48]
+	cmp	r2, r3
+	bne	.L2591
+	movs	r2, #1
+	add	r1, sp, #44
+	mov	r0, r4
+	bl	log2phys
+	b	.L2591
+.L2701:
 	.align	2
-.L2899:
-	.word	.LANCHOR76
-	.word	.LANCHOR66
-	.word	.LANCHOR192
+.L2700:
+	.word	.LANCHOR120
+	.word	.LANCHOR136
+	.word	.LANCHOR235
+	.word	.LANCHOR236
+	.word	.LANCHOR127
+	.word	.LANCHOR180
 	.word	.LANCHOR38
-	.word	.LANCHOR128
-	.word	.LANCHOR156
-	.word	.LANCHOR157
-	.word	.LANCHOR183
-	.word	.LANCHOR184
-	.word	.LANCHOR39
-	.word	.LANCHOR37
-	.word	.LANCHOR73
-	.word	.LANCHOR72
-	.word	.LANCHOR41
-	.word	.LANCHOR227
-	.word	.LANCHOR28
 	.word	.LANCHOR8
-	.word	.LANCHOR48
-	.word	.LANCHOR226
-	.word	.LANCHOR52
-	.word	.LANCHOR55
-	.word	.LANCHOR91
-	.word	.LANCHOR68
-	.word	.LANCHOR100
-	.word	.LANCHOR201
-	.word	.LANCHOR0
-	.word	.LANCHOR65
-	.word	.LANCHOR92
-	.word	168778952
+	.word	.LANCHOR54
+	.word	.LANCHOR53
+	.word	.LANCHOR160
 	.word	.LANCHOR40
-	.word	.LANCHOR83
-.L2891:
-	.loc 4 894 0
-	ldr	r3, [r5]
-	.loc 4 895 0
-	ldrh	r1, [r4, #4]
-	.loc 4 894 0
-	str	r3, [r4, #12]
-	adds	r3, r3, #1
-	str	r3, [r5]
-	.loc 4 896 0
-	movw	r4, #65535
-	.loc 4 895 0
-	ldr	r3, [r8]
-	strh	r1, [r3, r2, lsl #1]	@ movhi
-	.loc 4 896 0
-	ldr	r3, .L2901
-	strh	r4, [r3]	@ movhi
-	.loc 4 899 0
-	bl	FtlFreeSysBlkQueueOut
-.LVL3227:
-	ldr	r3, .L2901+4
-	.loc 4 900 0
+	.word	.LANCHOR234
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LANCHOR84
+.L2589:
+	ldr	r1, [r7, #8]
+	cmp	r4, r1
+	bne	.L2590
+	ldr	r8, [r7, #4]
+	ldr	r0, .L2702
+	mov	r1, r8
+	ldr	r0, [r0]
+	bl	ftl_cmp_data_ver
+	cmp	r0, #0
+	beq	.L2590
+	ldr	r1, [sp, #48]
+	ldr	r0, [sp, #52]
+	cmp	r1, r0
+	bne	.L2593
+.L2596:
+	ldr	r1, [sp, #44]
+	mov	r0, r4
+	bl	FtlReUsePrevPpa
+	b	.L2590
+.L2593:
+	ldr	r0, [sp, #44]
+	cmp	r1, r0
+	beq	.L2590
+	adds	r0, r1, #1
+	beq	.L2594
+	str	r1, [r3, #4]
 	movs	r2, #0
-	strh	r2, [r3, #2]	@ movhi
-	.loc 4 902 0
-	ldr	r2, [r6]
-	.loc 4 899 0
-	strh	r0, [r3]	@ movhi
-	.loc 4 901 0
-	strh	r4, [r3, #4]	@ movhi
-	.loc 4 902 0
-	strh	r2, [r3, #6]	@ movhi
-	.loc 4 903 0
-	ldr	r2, [r5]
-	str	r2, [r3, #8]
-	adds	r2, r2, #1
-	str	r2, [r5]
-	.loc 4 904 0
-	bl	FtlVpcTblFlush
-.LVL3228:
-	.loc 4 905 0
-	bl	FtlSysBlkInit
-.LVL3229:
-	cbnz	r0, .L2870
-	.loc 4 906 0
-	ldr	r3, .L2901+8
+	movs	r1, #1
+	mov	r0, r3
+	ldr	r7, [r3, #12]
+	bl	FlashReadPages
+.L2595:
+	ldr	r3, [r6]
+	ldr	r3, [r3, r5]
+	adds	r3, r3, #1
+	beq	.L2596
+	ldr	r3, [r7, #4]
+	ldr	r2, .L2702
+	mov	r1, r3
+	ldr	r0, [r2]
+	bl	ftl_cmp_data_ver
+	cmp	r0, #0
+	beq	.L2596
+	mov	r1, r3
+	mov	r0, r8
+	bl	ftl_cmp_data_ver
+	cmp	r0, #0
+	beq	.L2590
+	b	.L2596
+.L2594:
+	str	r1, [r2, r5]
+	b	.L2595
+.L2587:
+	ldr	r3, [sp, #52]
+	ldr	r2, [sp, #48]
+	cmp	r2, r3
+	beq	.L2598
+	movs	r2, #1
+	add	r1, sp, #52
+	mov	r0, r4
+	bl	log2phys
+	ldr	r7, [sp, #48]
+	adds	r5, r7, #1
+	beq	.L2598
+	ldr	r3, [sp, #44]
+	cmp	r7, r3
+	beq	.L2612
+	ubfx	r0, r7, #10, #16
+	bl	P2V_block_in_plane
+	ldr	r3, .L2702+4
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	beq	.L2602
+	ldr	r3, .L2702+8
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	beq	.L2602
+	ldr	r3, .L2702+12
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bne	.L2598
+.L2602:
+	ldr	r0, [r6]
+	movs	r2, #0
+	movs	r1, #1
+	str	r7, [r0, #4]
+	ldr	r5, [r0, #12]
+	bl	FlashReadPages
+	ldr	r3, [r6]
+	ldr	r3, [r3]
+	adds	r3, r3, #1
+	beq	.L2598
+	ldr	r1, [r5, #4]
+	ldr	r0, [sp, #4]
+	bl	ftl_cmp_data_ver
+	cmp	r0, #0
+	bne	.L2598
 	movs	r2, #1
+	add	r1, sp, #48
+	mov	r0, r4
+	bl	log2phys
+	b	.L2598
+.L2604:
+	mov	r1, r4
+	ldr	r0, .L2702+16
+	bl	printf
+	b	.L2580
+.L2584:
+	ldrh	r3, [r10]
+	mov	r1, r4
+	ldr	r2, .L2702+20
+	ldr	r0, .L2702+24
+	strh	r3, [r2]	@ movhi
+	ldr	r2, [sp, #4]
+	bl	printf
+	ldr	r2, .L2702+28
+	ldr	r3, [r2]
+	cmp	r3, #31
+	bhi	.L2605
+	ldr	r0, [sp, #52]
+	ldr	r1, .L2702+32
+	str	r0, [r1, r3, lsl #2]
+	adds	r3, r3, #1
+	str	r3, [r2]
+.L2605:
+	ldrh	r0, [r10]
+	bl	decrement_vpc_count
+	ldr	r3, .L2702
+	ldr	r2, [r3]
+	adds	r1, r2, #1
+	bne	.L2606
+	ldr	r2, [sp, #4]
+.L2693:
 	str	r2, [r3]
-.L2870:
-	.loc 4 908 0
+	b	.L2580
+.L2606:
+	ldr	r1, [sp, #4]
+	cmp	r1, r2
+	bcs	.L2580
+	mov	r2, r1
+	b	.L2693
+.L2583:
+	ldrb	r3, [sp, #16]	@ zero_extendqisi2
+	ldr	r2, [sp, #16]
+	strb	r3, [r10, #6]
+	ldrh	r3, [sp, #8]
+	strh	r3, [r10, #2]	@ movhi
+	b	.L2697
+.L2703:
+	.align	2
+.L2702:
+	.word	.LANCHOR136
+	.word	.LANCHOR92
+	.word	.LANCHOR93
+	.word	.LANCHOR94
+	.word	.LC63
+	.word	.LANCHOR235
+	.word	.LC64
+	.word	.LANCHOR237
+	.word	.LANCHOR238
+	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
+	.section	.text.FtlGcFreeTempBlock,"ax",%progbits
+	.align	1
+	.global	FtlGcFreeTempBlock
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcFreeTempBlock, %function
+FtlGcFreeTempBlock:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r3, .L2727
+	ldr	r3, [r3]
+	cbz	r3, .L2705
+.L2710:
 	movs	r0, #0
+.L2704:
 	add	sp, sp, #16
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2902:
-	.align	2
-.L2901:
-	.word	.LANCHOR93
-	.word	.LANCHOR206
-	.word	.LANCHOR223
-	.cfi_endproc
-.LFE301:
-	.size	FtlLowFormat, .-FtlLowFormat
-	.global	FtlMallocOffset
-	.global	FtlMallocBuffer
-	.global	gc_ink_free_return_value
-	.global	FtlUpdateVaildLpnCount
-	.global	g_ect_tbl_power_up_flush
-	.global	power_up_flag
-	.global	g_LowFormat
-	.global	gFtlInitStatus
-	.global	DeviceCapacity
-	.global	ToshibaRefValue
-	.global	Toshiba15RefValue
-	.global	ToshibaA19RefValue
-	.global	SamsungRefValue
-	.global	refValueDefault
-	.global	random_seed
-	.global	gSlcNandParaInfo
-	.global	gNandParaInfo
-	.global	g_page_map_check_enable
-	.global	g_power_lost_ecc_error_blk
-	.global	g_power_lost_recovery_flag
-	.global	c_mlc_erase_count_value
-	.global	g_recovery_ppa_tbl
-	.global	g_recovery_page_min_ver
-	.global	g_recovery_page_num
-	.global	g_cur_erase_blk
-	.global	g_gc_skip_write_count
-	.global	g_gc_head_data_block_count
-	.global	g_gc_head_data_block
-	.global	g_ftl_nand_free_count
-	.global	g_in_swl_replace
-	.global	g_in_gc_progress
-	.global	g_all_blk_used_slc_mode
-	.global	g_max_erase_count
-	.global	g_totle_sys_slc_erase_count
-	.global	g_totle_slc_erase_count
-	.global	g_min_erase_count
-	.global	g_totle_avg_erase_count
-	.global	g_totle_mlc_erase_count
-	.global	g_totle_l2p_write_count
-	.global	g_totle_cache_write_count
-	.global	g_tmp_data_superblock_id
-	.global	g_totle_read_page_count
-	.global	g_totle_discard_page_count
-	.global	g_totle_read_sector
-	.global	g_totle_write_sector
-	.global	g_totle_write_page_count
-	.global	g_totle_gc_page_count
-	.global	g_gc_blk_index
-	.global	g_gc_merge_free_blk_threshold
-	.global	g_gc_free_blk_threshold
-	.global	g_gc_refresh_block_temp_tbl
-	.global	g_free_slc_blk_num
-	.global	g_gc_refresh_block_temp_num
-	.global	g_gc_bad_block_temp_tbl
-	.global	g_gc_bad_block_gc_index
-	.global	g_gc_bad_block_temp_num
-	.global	g_gc_next_blk_1
-	.global	g_gc_next_blk
-	.global	g_gc_cur_blk_max_valid_pages
-	.global	g_gc_cur_blk_valid_pages
-	.global	g_gc_page_offset
-	.global	g_gc_blk_num
-	.global	p_gc_blk_tbl
-	.global	p_gc_page_info
-	.global	g_sys_ext_data
-	.global	g_sys_save_data
-	.global	gp_last_act_superblock
-	.global	g_gc_superblock
-	.global	g_gc_temp_superblock
-	.global	g_buffer_superblock
-	.global	g_active_superblock
-	.global	g_num_data_superblocks
-	.global	g_num_free_superblocks
-	.global	p_data_block_list_tail
-	.global	p_data_block_list_head
-	.global	p_free_data_block_list_head
-	.global	p_data_block_list_table
-	.global	g_l2p_last_update_region_id
-	.global	p_l2p_map_buf
-	.global	p_l2p_ram_map
-	.global	g_totle_vendor_block
-	.global	p_vendor_region_ppn_table
-	.global	p_vendor_block_ver_table
-	.global	p_vendor_block_valid_page_count
-	.global	p_vendor_block_table
-	.global	g_totle_map_block
-	.global	p_map_region_ppn_check_table
-	.global	p_map_region_ppn_table
-	.global	p_map_block_ver_table
-	.global	p_map_block_valid_page_count
-	.global	p_map_block_table
-	.global	p_blk_mode_table
-	.global	p_valid_page_count_check_table
-	.global	p_valid_page_count_table
-	.global	g_totle_swl_count
-	.global	p_swl_mul_table
-	.global	p_erase_count_table
-	.global	g_ect_tbl_info_size
-	.global	gp_ect_tbl_info
-	.global	g_gc_num_req
-	.global	c_gc_page_buf_num
-	.global	gp_gc_page_buf_info
-	.global	p_gc_data_buf
-	.global	p_gc_spare_buf
-	.global	p_io_spare_buf
-	.global	p_io_data_buf_1
-	.global	p_io_data_buf_0
-	.global	p_sys_spare_buf
-	.global	p_vendor_data_buf
-	.global	p_sys_data_buf_1
-	.global	p_sys_data_buf
-	.global	p_plane_order_table
-	.global	g_req_cache
-	.global	req_gc_dst
-	.global	req_gc
-	.global	req_erase
-	.global	req_prgm
-	.global	req_read
-	.global	req_sys
-	.global	gVendorBlkInfo
-	.global	gL2pMapInfo
-	.global	gSysFreeQueue
-	.global	gSysInfo
-	.global	gBbtInfo
-	.global	g_flash_read_only_en
-	.global	g_inkDie_check_enable
-	.global	g_SlcPartLbaEndSector
-	.global	g_MaxLbn
-	.global	g_VaildLpn
-	.global	g_MaxLpn
-	.global	g_MaxLbaSector
-	.global	g_GlobalDataVersion
-	.global	g_GlobalSysVersion
-	.global	ftl_gc_temp_power_lost_recovery_flag
-	.global	c_ftl_nand_max_data_blks
-	.global	c_ftl_nand_data_op_blks_per_plane
-	.global	c_ftl_nand_data_blks_per_plane
-	.global	c_ftl_nand_max_sys_blks
-	.global	c_ftl_nand_init_sys_blks_per_plane
-	.global	c_ftl_nand_sys_blks_per_plane
-	.global	c_ftl_vendor_part_size
-	.global	c_ftl_nand_max_vendor_blks
-	.global	c_ftl_nand_max_map_blks
-	.global	c_ftl_nand_map_blks_per_plane
-	.global	c_ftl_nand_vendor_region_num
-	.global	c_ftl_nand_l2pmap_ram_region_num
-	.global	c_ftl_nand_map_region_num
-	.global	c_ftl_nand_totle_phy_blks
-	.global	c_ftl_nand_reserved_blks
-	.global	c_ftl_nand_byte_pre_oob
-	.global	c_ftl_nand_byte_pre_page
-	.global	c_ftl_nand_sec_pre_page_shift
-	.global	c_ftl_nand_sec_pre_page
-	.global	c_ftl_nand_page_pre_super_blk
-	.global	c_ftl_nand_page_pre_slc_blk
-	.global	c_ftl_nand_page_pre_blk
-	.global	c_ftl_nand_bbm_buf_size
-	.global	c_ftl_nand_ext_blk_pre_plane
-	.global	c_ftl_nand_blk_pre_plane
-	.global	c_ftl_nand_planes_num
-	.global	c_ftl_nand_blks_per_die_shift
-	.global	c_ftl_nand_blks_per_die
-	.global	c_ftl_nand_planes_per_die
-	.global	c_ftl_nand_die_num
-	.global	c_ftl_nand_type
-	.global	gMasterTempBuf
-	.global	gMasterInfo
-	.global	gNandcDumpWriteEn
-	.global	gToggleModeClkDiv
-	.global	gBootDdrMode
-	.global	gNandcEccBits
-	.global	gpNandc1
-	.global	gpNandc
-	.global	g_nandc_version_data
-	.global	gNandcVer
-	.global	gNandChipMap
-	.global	gNandIDataBuf
-	.global	FlashDdrTunningReadCount
-	.global	FlashWaitBusyScheduleEn
-	.global	gNandPhyInfo
-	.global	gFlashProgCheckSpareBuffer
-	.global	gFlashProgCheckBuffer
-	.global	gFlashSpareBuffer
-	.global	gFlashPageBuffer1
-	.global	gFlashPageBuffer0
-	.global	gpFlashSaveInfo
-	.global	gReadRetryInfo
-	.global	gpNandParaInfo
-	.global	gNandOptPara
-	.global	g_slc2KBNand
-	.global	g_maxRetryCount
-	.global	g_maxRegNum
-	.global	g_retryMode
-	.global	gNandIDBResBlkNumSaveInFlash
-	.global	gNandIDBResBlkNum
-	.global	gNandFlashResEndPageAddr
-	.global	gNandFlashInfoBlockAddr
-	.global	gNandFlashIdbBlockAddr
-	.global	gNandFlashInfoBlockEcc
-	.global	gNandFlashIDBEccBits
-	.global	gNandFlashEccBits
-	.global	gNandRandomizer
-	.global	gBlockPageAlignSize
-	.global	gTotleBlock
-	.global	gNandMaxChip
-	.global	gNandMaxDie
-	.global	gFlashInterfaceMode
-	.global	gFlashSlcMode
-	.global	gFlashOnfiModeEn
-	.global	gFlashToggleModeEn
-	.global	gFlashSdrModeEn
-	.global	gMultiPageProgEn
-	.global	gMultiPageReadEn
-	.global	gpReadRetrial
-	.global	mlcPageToSlcPageTbl
-	.global	slcPageToMlcPageTbl
-	.global	DieAddrs
-	.global	gDieOp
-	.global	DieCsIndex
-	.global	IDByte
-	.global	read_retry_cur_offset
-	.section	.bss.DeviceCapacity,"aw",%nobits
-	.align	2
-	.set	.LANCHOR60,. + 0
-	.type	DeviceCapacity, %object
-	.size	DeviceCapacity, 4
-DeviceCapacity:
-	.space	4
-	.section	.bss.DieAddrs,"aw",%nobits
+.L2705:
+	ldr	r0, .L2727+4
+	movw	r3, #65535
+	ldr	r5, .L2727+8
+	ldrh	r6, [r0]
+	mov	r4, r0
+	cmp	r6, r3
+	beq	.L2707
+	ldr	r3, .L2727+12
+	ldrh	r1, [r3]
+	bl	FtlGcScanTempBlk
+	str	r0, [sp, #12]
+	adds	r0, r0, #1
+	beq	.L2707
+	ldr	r3, .L2727+16
+	ldr	r2, [r3]
+	ldrh	r3, [r2, r6, lsl #1]
+	cmp	r3, #4
+	bls	.L2708
+	subs	r3, r3, #5
+	movs	r0, #1
+	strh	r3, [r2, r6, lsl #1]	@ movhi
+	bl	FtlEctTblFlush
+.L2708:
+	ldr	r3, [r5]
+	cbnz	r3, .L2709
+	ldr	r2, .L2727+20
+	ldr	r0, [sp, #12]
+	ldr	r3, [r2, #96]
+	ubfx	r0, r0, #10, #16
+	adds	r3, r3, #1
+	str	r3, [r2, #96]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+.L2709:
+	movs	r3, #0
+	movs	r0, #1
+	str	r3, [r5]
+	b	.L2704
+.L2707:
+	ldrh	r2, [r4]
+	movs	r3, #0
+	str	r3, [r5]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L2710
+	ldr	r6, .L2727+12
+	bl	FtlCacheWriteBack
+	ldrb	r0, [r4, #7]	@ zero_extendqisi2
+	ldrh	r2, [r6]
+	ldr	r5, .L2727+24
+	muls	r2, r0, r2
+	ldrh	r1, [r5]
+	cmp	r1, r2
+	beq	.L2711
+	ldr	r1, .L2727+28
+	movs	r2, #163
+	ldr	r0, .L2727+32
+	bl	printf
+	ldr	r1, .L2727+36
+	ldr	r0, .L2727+40
+	bl	printf
+.L2711:
+	ldrh	r6, [r6]
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	ldr	r2, .L2727+44
+	ldrh	r0, [r4]
+	ldr	fp, .L2727+84
+	smulbb	r3, r3, r6
+	ldr	r1, [r2]
+	movs	r6, #0
+	str	r2, [sp, #4]
+	strh	r3, [r1, r0, lsl #1]	@ movhi
+	ldr	r1, .L2727+48
+	ldrh	r3, [r5]
+	ldr	r0, [r1]
+	add	r3, r3, r0
+	str	r3, [r1]
+.L2712:
+	ldrh	r2, [r5]
+	uxth	r3, r6
+	cmp	r2, r3
+	bhi	.L2716
+	movw	r0, #65535
+	bl	decrement_vpc_count
+	ldr	r3, .L2727+52
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2717
+	ldrh	r1, [r4]
+	ldr	r0, .L2727+56
+	bl	printf
+.L2717:
+	ldr	r3, [sp, #4]
+	ldrh	r0, [r4]
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r0, lsl #1]
+	cmp	r3, #0
+	beq	.L2718
+	bl	INSERT_DATA_LIST
+.L2719:
+	ldr	r3, .L2727+60
+	movw	r6, #65535
+	strh	r6, [r4]	@ movhi
+	movs	r4, #0
+	strh	r4, [r5]	@ movhi
+	strh	r4, [r3]	@ movhi
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	ldr	r3, .L2727+64
+	ldrh	r2, [r3]
+	ldr	r3, .L2727+68
+	ldrh	r3, [r3]
+	add	r3, r3, r3, lsl #1
+	cmp	r2, r3, asr #2
+	ble	.L2710
+	ldr	r3, .L2727+72
+	movs	r2, #20
+	mov	r0, r4
+	strh	r6, [r3]	@ movhi
+	ldr	r3, .L2727+76
+	strh	r2, [r3]	@ movhi
+	b	.L2704
+.L2716:
+	uxth	r3, r6
+	movs	r7, #12
+	ldr	r2, [fp]
+	muls	r7, r3, r7
+	ldr	r3, .L2727+80
+	ldr	r8, [r3]
+	add	r10, r8, r7
+	ldr	r1, [r10, #8]
+	cmp	r1, r2
+	bcc	.L2713
+	ldr	r1, .L2727+28
+	movs	r2, #168
+	ldr	r0, .L2727+32
+	bl	printf
+	ldr	r1, .L2727+36
+	ldr	r0, .L2727+40
+	bl	printf
+.L2713:
+	movs	r2, #0
+	add	r1, sp, #12
+	ldr	r0, [r10, #8]
+	bl	log2phys
+	ldr	r2, [sp, #12]
+	ldr	r0, [r8, r7]
+	cmp	r0, r2
+	bne	.L2714
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	movs	r2, #1
+	mov	r7, r0
+	add	r1, r10, #4
+	ldr	r0, [r10, #8]
+	bl	log2phys
+	mov	r0, r7
+.L2726:
+	bl	decrement_vpc_count
+.L2715:
+	adds	r6, r6, #1
+	b	.L2712
+.L2714:
+	ldr	r3, [r10, #4]
+	cmp	r2, r3
+	beq	.L2715
+	ldrh	r0, [r4]
+	b	.L2726
+.L2718:
+	bl	INSERT_FREE_LIST
+	b	.L2719
+.L2728:
 	.align	2
-	.set	.LANCHOR17,. + 0
-	.type	DieAddrs, %object
-	.size	DieAddrs, 32
-DieAddrs:
-	.space	32
-	.section	.bss.DieCsIndex,"aw",%nobits
-	.align	2
-	.set	.LANCHOR26,. + 0
-	.type	DieCsIndex, %object
-	.size	DieCsIndex, 8
-DieCsIndex:
-	.space	8
-	.section	.bss.FlashDdrTunningReadCount,"aw",%nobits
-	.align	2
-	.set	.LANCHOR141,. + 0
-	.type	FlashDdrTunningReadCount, %object
-	.size	FlashDdrTunningReadCount, 4
-FlashDdrTunningReadCount:
-	.space	4
-	.section	.bss.FlashWaitBusyScheduleEn,"aw",%nobits
-	.align	2
-	.type	FlashWaitBusyScheduleEn, %object
-	.size	FlashWaitBusyScheduleEn, 4
-FlashWaitBusyScheduleEn:
-	.space	4
-	.section	.bss.FtlMallocBuffer,"aw",%nobits
-	.align	6
-	.type	FtlMallocBuffer, %object
-	.size	FtlMallocBuffer, 1310720
-FtlMallocBuffer:
-	.space	1310720
-	.section	.bss.FtlUpdateVaildLpnCount,"aw",%nobits
-	.align	1
-	.set	.LANCHOR99,. + 0
-	.type	FtlUpdateVaildLpnCount, %object
-	.size	FtlUpdateVaildLpnCount, 2
-FtlUpdateVaildLpnCount:
-	.space	2
-	.section	.bss.IDByte,"aw",%nobits
-	.align	2
-	.set	.LANCHOR22,. + 0
-	.type	IDByte, %object
-	.size	IDByte, 32
-IDByte:
-	.space	32
-	.section	.bss.c_ftl_nand_bbm_buf_size,"aw",%nobits
-	.align	1
-	.set	.LANCHOR120,. + 0
-	.type	c_ftl_nand_bbm_buf_size, %object
-	.size	c_ftl_nand_bbm_buf_size, 2
-c_ftl_nand_bbm_buf_size:
-	.space	2
-	.section	.bss.c_ftl_nand_blk_pre_plane,"aw",%nobits
-	.align	1
-	.set	.LANCHOR40,. + 0
-	.type	c_ftl_nand_blk_pre_plane, %object
-	.size	c_ftl_nand_blk_pre_plane, 2
-c_ftl_nand_blk_pre_plane:
-	.space	2
-	.section	.bss.c_ftl_nand_blks_per_die,"aw",%nobits
-	.align	1
-	.set	.LANCHOR50,. + 0
-	.type	c_ftl_nand_blks_per_die, %object
-	.size	c_ftl_nand_blks_per_die, 2
-c_ftl_nand_blks_per_die:
-	.space	2
-	.section	.bss.c_ftl_nand_blks_per_die_shift,"aw",%nobits
-	.align	1
-	.set	.LANCHOR51,. + 0
-	.type	c_ftl_nand_blks_per_die_shift, %object
-	.size	c_ftl_nand_blks_per_die_shift, 2
-c_ftl_nand_blks_per_die_shift:
-	.space	2
-	.section	.bss.c_ftl_nand_byte_pre_oob,"aw",%nobits
-	.align	1
-	.set	.LANCHOR58,. + 0
-	.type	c_ftl_nand_byte_pre_oob, %object
-	.size	c_ftl_nand_byte_pre_oob, 2
-c_ftl_nand_byte_pre_oob:
-	.space	2
-	.section	.bss.c_ftl_nand_byte_pre_page,"aw",%nobits
-	.align	1
-	.set	.LANCHOR57,. + 0
-	.type	c_ftl_nand_byte_pre_page, %object
-	.size	c_ftl_nand_byte_pre_page, 2
-c_ftl_nand_byte_pre_page:
-	.space	2
-	.section	.bss.c_ftl_nand_data_blks_per_plane,"aw",%nobits
-	.align	1
-	.set	.LANCHOR39,. + 0
-	.type	c_ftl_nand_data_blks_per_plane, %object
-	.size	c_ftl_nand_data_blks_per_plane, 2
-c_ftl_nand_data_blks_per_plane:
-	.space	2
-	.section	.bss.c_ftl_nand_data_op_blks_per_plane,"aw",%nobits
-	.align	1
-	.set	.LANCHOR227,. + 0
-	.type	c_ftl_nand_data_op_blks_per_plane, %object
-	.size	c_ftl_nand_data_op_blks_per_plane, 2
-c_ftl_nand_data_op_blks_per_plane:
-	.space	2
-	.section	.bss.c_ftl_nand_die_num,"aw",%nobits
-	.align	1
-	.set	.LANCHOR44,. + 0
-	.type	c_ftl_nand_die_num, %object
-	.size	c_ftl_nand_die_num, 2
-c_ftl_nand_die_num:
-	.space	2
-	.section	.bss.c_ftl_nand_ext_blk_pre_plane,"aw",%nobits
+.L2727:
+	.word	.LANCHOR77
+	.word	.LANCHOR94
+	.word	.LANCHOR135
+	.word	.LANCHOR53
+	.word	.LANCHOR79
+	.word	.LANCHOR138
+	.word	.LANCHOR111
+	.word	.LANCHOR239
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LANCHOR84
+	.word	.LANCHOR161
+	.word	.LANCHOR8
+	.word	.LC65
+	.word	.LANCHOR110
+	.word	.LANCHOR89
+	.word	.LANCHOR223
+	.word	.LANCHOR204
+	.word	.LANCHOR176
+	.word	.LANCHOR112
+	.word	.LANCHOR73
+	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
+	.section	.text.FtlGcPageRecovery,"ax",%progbits
 	.align	1
-	.set	.LANCHOR48,. + 0
-	.type	c_ftl_nand_ext_blk_pre_plane, %object
-	.size	c_ftl_nand_ext_blk_pre_plane, 2
-c_ftl_nand_ext_blk_pre_plane:
-	.space	2
-	.section	.bss.c_ftl_nand_init_sys_blks_per_plane,"aw",%nobits
+	.global	FtlGcPageRecovery
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcPageRecovery, %function
+FtlGcPageRecovery:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	ldr	r4, .L2731
+	ldr	r5, .L2731+4
+	ldrh	r1, [r4]
+	mov	r0, r5
+	bl	FtlGcScanTempBlk
+	ldrh	r2, [r5, #2]
+	ldrh	r3, [r4]
+	cmp	r2, r3
+	bcc	.L2729
+	ldr	r0, .L2731+8
+	bl	FtlMapBlkWriteDumpData
+	movs	r0, #0
+	bl	FtlGcFreeTempBlock
+	ldr	r3, .L2731+12
+	movs	r2, #0
+	str	r2, [r3]
+.L2729:
+	pop	{r3, r4, r5, pc}
+.L2732:
 	.align	2
-	.set	.LANCHOR65,. + 0
-	.type	c_ftl_nand_init_sys_blks_per_plane, %object
-	.size	c_ftl_nand_init_sys_blks_per_plane, 4
-c_ftl_nand_init_sys_blks_per_plane:
-	.space	4
-	.section	.bss.c_ftl_nand_l2pmap_ram_region_num,"aw",%nobits
-	.align	1
-	.set	.LANCHOR67,. + 0
-	.type	c_ftl_nand_l2pmap_ram_region_num, %object
-	.size	c_ftl_nand_l2pmap_ram_region_num, 2
-c_ftl_nand_l2pmap_ram_region_num:
-	.space	2
-	.section	.bss.c_ftl_nand_map_blks_per_plane,"aw",%nobits
-	.align	1
-	.set	.LANCHOR63,. + 0
-	.type	c_ftl_nand_map_blks_per_plane, %object
-	.size	c_ftl_nand_map_blks_per_plane, 2
-c_ftl_nand_map_blks_per_plane:
-	.space	2
-	.section	.bss.c_ftl_nand_map_region_num,"aw",%nobits
+.L2731:
+	.word	.LANCHOR53
+	.word	.LANCHOR94
+	.word	.LANCHOR127
+	.word	.LANCHOR135
+	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
+	.section	.text.FtlPowerLostRecovery,"ax",%progbits
 	.align	1
-	.set	.LANCHOR66,. + 0
-	.type	c_ftl_nand_map_region_num, %object
-	.size	c_ftl_nand_map_region_num, 2
-c_ftl_nand_map_region_num:
-	.space	2
-	.section	.bss.c_ftl_nand_max_data_blks,"aw",%nobits
-	.align	2
-	.set	.LANCHOR41,. + 0
-	.type	c_ftl_nand_max_data_blks, %object
-	.size	c_ftl_nand_max_data_blks, 4
-c_ftl_nand_max_data_blks:
-	.space	4
-	.section	.bss.c_ftl_nand_max_map_blks,"aw",%nobits
-	.align	2
-	.set	.LANCHOR64,. + 0
-	.type	c_ftl_nand_max_map_blks, %object
-	.size	c_ftl_nand_max_map_blks, 4
-c_ftl_nand_max_map_blks:
-	.space	4
-	.section	.bss.c_ftl_nand_max_sys_blks,"aw",%nobits
+	.global	FtlPowerLostRecovery
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlPowerLostRecovery, %function
+FtlPowerLostRecovery:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	movs	r4, #0
+	ldr	r5, .L2734
+	ldr	r3, .L2734+4
+	mov	r0, r5
+	str	r4, [r3]
+	bl	FtlRecoverySuperblock
+	mov	r0, r5
+	ldr	r5, .L2734+8
+	bl	FtlSlcSuperblockCheck
+	mov	r0, r5
+	bl	FtlRecoverySuperblock
+	mov	r0, r5
+	bl	FtlSlcSuperblockCheck
+	bl	FtlGcPageRecovery
+	movw	r0, #65535
+	bl	decrement_vpc_count
+	mov	r0, r4
+	pop	{r3, r4, r5, pc}
+.L2735:
 	.align	2
-	.set	.LANCHOR38,. + 0
-	.type	c_ftl_nand_max_sys_blks, %object
-	.size	c_ftl_nand_max_sys_blks, 4
-c_ftl_nand_max_sys_blks:
-	.space	4
-	.section	.bss.c_ftl_nand_max_vendor_blks,"aw",%nobits
-	.align	1
-	.set	.LANCHOR61,. + 0
-	.type	c_ftl_nand_max_vendor_blks, %object
-	.size	c_ftl_nand_max_vendor_blks, 2
-c_ftl_nand_max_vendor_blks:
-	.space	2
-	.section	.bss.c_ftl_nand_page_pre_blk,"aw",%nobits
+.L2734:
+	.word	.LANCHOR92
+	.word	.LANCHOR237
+	.word	.LANCHOR93
+	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
+	.section	.text.FtlSysBlkInit,"ax",%progbits
 	.align	1
-	.set	.LANCHOR52,. + 0
-	.type	c_ftl_nand_page_pre_blk, %object
-	.size	c_ftl_nand_page_pre_blk, 2
-c_ftl_nand_page_pre_blk:
-	.space	2
-	.section	.bss.c_ftl_nand_page_pre_slc_blk,"aw",%nobits
-	.align	1
-	.set	.LANCHOR53,. + 0
-	.type	c_ftl_nand_page_pre_slc_blk, %object
-	.size	c_ftl_nand_page_pre_slc_blk, 2
-c_ftl_nand_page_pre_slc_blk:
-	.space	2
-	.section	.bss.c_ftl_nand_page_pre_super_blk,"aw",%nobits
-	.align	1
-	.set	.LANCHOR54,. + 0
-	.type	c_ftl_nand_page_pre_super_blk, %object
-	.size	c_ftl_nand_page_pre_super_blk, 2
-c_ftl_nand_page_pre_super_blk:
-	.space	2
-	.section	.bss.c_ftl_nand_planes_num,"aw",%nobits
-	.align	1
-	.set	.LANCHOR37,. + 0
-	.type	c_ftl_nand_planes_num, %object
-	.size	c_ftl_nand_planes_num, 2
-c_ftl_nand_planes_num:
-	.space	2
-	.section	.bss.c_ftl_nand_planes_per_die,"aw",%nobits
-	.align	1
-	.set	.LANCHOR45,. + 0
-	.type	c_ftl_nand_planes_per_die, %object
-	.size	c_ftl_nand_planes_per_die, 2
-c_ftl_nand_planes_per_die:
-	.space	2
-	.section	.bss.c_ftl_nand_reserved_blks,"aw",%nobits
-	.align	1
-	.set	.LANCHOR59,. + 0
-	.type	c_ftl_nand_reserved_blks, %object
-	.size	c_ftl_nand_reserved_blks, 2
-c_ftl_nand_reserved_blks:
-	.space	2
-	.section	.bss.c_ftl_nand_sec_pre_page,"aw",%nobits
-	.align	1
-	.set	.LANCHOR55,. + 0
-	.type	c_ftl_nand_sec_pre_page, %object
-	.size	c_ftl_nand_sec_pre_page, 2
-c_ftl_nand_sec_pre_page:
-	.space	2
-	.section	.bss.c_ftl_nand_sec_pre_page_shift,"aw",%nobits
-	.align	1
-	.set	.LANCHOR56,. + 0
-	.type	c_ftl_nand_sec_pre_page_shift, %object
-	.size	c_ftl_nand_sec_pre_page_shift, 2
-c_ftl_nand_sec_pre_page_shift:
-	.space	2
-	.section	.bss.c_ftl_nand_sys_blks_per_plane,"aw",%nobits
-	.align	2
-	.set	.LANCHOR36,. + 0
-	.type	c_ftl_nand_sys_blks_per_plane, %object
-	.size	c_ftl_nand_sys_blks_per_plane, 4
-c_ftl_nand_sys_blks_per_plane:
-	.space	4
-	.section	.bss.c_ftl_nand_totle_phy_blks,"aw",%nobits
-	.align	2
-	.set	.LANCHOR42,. + 0
-	.type	c_ftl_nand_totle_phy_blks, %object
-	.size	c_ftl_nand_totle_phy_blks, 4
-c_ftl_nand_totle_phy_blks:
-	.space	4
-	.section	.bss.c_ftl_nand_type,"aw",%nobits
-	.align	1
-	.set	.LANCHOR43,. + 0
-	.type	c_ftl_nand_type, %object
-	.size	c_ftl_nand_type, 2
-c_ftl_nand_type:
-	.space	2
-	.section	.bss.c_ftl_nand_vendor_region_num,"aw",%nobits
-	.align	1
-	.set	.LANCHOR62,. + 0
-	.type	c_ftl_nand_vendor_region_num, %object
-	.size	c_ftl_nand_vendor_region_num, 2
-c_ftl_nand_vendor_region_num:
-	.space	2
-	.section	.bss.c_ftl_vendor_part_size,"aw",%nobits
-	.align	1
-	.set	.LANCHOR49,. + 0
-	.type	c_ftl_vendor_part_size, %object
-	.size	c_ftl_vendor_part_size, 2
-c_ftl_vendor_part_size:
-	.space	2
-	.section	.bss.c_gc_page_buf_num,"aw",%nobits
+	.global	FtlSysBlkInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlSysBlkInit, %function
+FtlSysBlkInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	movs	r3, #0
+	ldr	r4, .L2746
+	movw	r5, #65535
+	strh	r3, [r4]	@ movhi
+	ldr	r3, .L2746+4
+	strh	r5, [r3]	@ movhi
+	ldr	r3, .L2746+8
+	ldrh	r0, [r3]
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlScanSysBlk
+	ldr	r3, .L2746+12
+	ldrh	r3, [r3]
+	cmp	r3, r5
+	mov	r5, r4
+	bne	.L2737
+.L2739:
+	mov	r4, #-1
+.L2736:
+	mov	r0, r4
+	pop	{r3, r4, r5, r6, r7, pc}
+.L2737:
+	bl	FtlLoadSysInfo
+	mov	r4, r0
+	cmp	r0, #0
+	bne	.L2739
+	bl	FtlLoadMapInfo
+	bl	FtlLoadVonderInfo
+	bl	Ftl_load_ext_data
+	bl	FtlLoadEctTbl
+	bl	FtlFreeSysBLkSort
+	bl	SupperBlkListInit
+	bl	FtlPowerLostRecovery
+	movs	r0, #1
+	bl	FtlUpdateVaildLpn
+	ldr	r3, .L2746+16
+	movs	r0, #12
+	ldrh	r2, [r3]
+	ldr	r3, .L2746+20
+	ldr	r1, [r3]
+	mov	r3, r4
+.L2740:
+	cmp	r3, r2
+	blt	.L2742
+	ldrh	r3, [r5]
+	cmp	r3, #0
+	beq	.L2736
+.L2741:
+	ldr	r3, .L2746+24
+	ldr	r1, [r3]
+	ldr	r3, .L2746+28
+	ldrh	r0, [r3]
+	ldrh	r5, [r3, #4]
+	ldrh	r2, [r1, r0, lsl #1]
+	subs	r2, r2, r5
+	ldr	r5, .L2746+32
+	strh	r2, [r1, r0, lsl #1]	@ movhi
+	ldrh	r2, [r5]
+	strh	r2, [r3, #2]	@ movhi
+	movs	r2, #0
+	strh	r2, [r3, #4]	@ movhi
+	strb	r2, [r3, #6]
+	ldr	r3, .L2746+36
+	ldrh	r6, [r3]
+	ldrh	r7, [r3, #4]
+	ldrh	r0, [r1, r6, lsl #1]
+	subs	r0, r0, r7
+	strh	r0, [r1, r6, lsl #1]	@ movhi
+	ldrh	r1, [r5]
+	ldr	r0, .L2746+40
+	strb	r2, [r3, #6]
+	strh	r1, [r3, #2]	@ movhi
+	strh	r2, [r3, #4]	@ movhi
+	bl	FtlMapBlkWriteDumpData
+	ldr	r0, .L2746+44
+	bl	FtlMapBlkWriteDumpData
+	ldr	r2, .L2746+48
+	ldrh	r3, [r2, #30]
+	adds	r3, r3, #1
+	strh	r3, [r2, #30]	@ movhi
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	bl	FtlVpcTblFlush
+	b	.L2736
+.L2742:
+	mla	r6, r0, r3, r1
+	ldr	r6, [r6, #4]
+	cmp	r6, #0
+	blt	.L2741
+	adds	r3, r3, #1
+	b	.L2740
+.L2747:
 	.align	2
-	.set	.LANCHOR107,. + 0
-	.type	c_gc_page_buf_num, %object
-	.size	c_gc_page_buf_num, 4
-c_gc_page_buf_num:
-	.space	4
-	.section	.bss.c_mlc_erase_count_value,"aw",%nobits
+.L2746:
+	.word	.LANCHOR236
+	.word	.LANCHOR235
+	.word	.LANCHOR39
+	.word	.LANCHOR209
+	.word	.LANCHOR68
+	.word	.LANCHOR97
+	.word	.LANCHOR84
+	.word	.LANCHOR92
+	.word	.LANCHOR53
+	.word	.LANCHOR93
+	.word	.LANCHOR127
+	.word	.LANCHOR215
+	.word	.LANCHOR81
+	.size	FtlSysBlkInit, .-FtlSysBlkInit
+	.section	.text.FtlLowFormat,"ax",%progbits
 	.align	1
-	.set	.LANCHOR47,. + 0
-	.type	c_mlc_erase_count_value, %object
-	.size	c_mlc_erase_count_value, 2
-c_mlc_erase_count_value:
-	.space	2
-	.section	.bss.ftl_gc_temp_power_lost_recovery_flag,"aw",%nobits
-	.align	2
-	.set	.LANCHOR132,. + 0
-	.type	ftl_gc_temp_power_lost_recovery_flag, %object
-	.size	ftl_gc_temp_power_lost_recovery_flag, 4
-ftl_gc_temp_power_lost_recovery_flag:
-	.space	4
-	.section	.bss.gBbtInfo,"aw",%nobits
-	.align	2
-	.set	.LANCHOR74,. + 0
-	.type	gBbtInfo, %object
-	.size	gBbtInfo, 60
-gBbtInfo:
-	.space	60
-	.section	.bss.gBlockPageAlignSize,"aw",%nobits
-	.align	2
-	.set	.LANCHOR3,. + 0
-	.type	gBlockPageAlignSize, %object
-	.size	gBlockPageAlignSize, 4
-gBlockPageAlignSize:
-	.space	4
-	.section	.bss.gBootDdrMode,"aw",%nobits
-	.align	2
-	.set	.LANCHOR152,. + 0
-	.type	gBootDdrMode, %object
-	.size	gBootDdrMode, 4
-gBootDdrMode:
-	.space	4
-	.section	.bss.gDieOp,"aw",%nobits
-	.align	2
-	.set	.LANCHOR23,. + 0
-	.type	gDieOp, %object
-	.size	gDieOp, 128
-gDieOp:
-	.space	128
-	.section	.bss.gFlashInterfaceMode,"aw",%nobits
-	.set	.LANCHOR24,. + 0
-	.type	gFlashInterfaceMode, %object
-	.size	gFlashInterfaceMode, 1
-gFlashInterfaceMode:
-	.space	1
-	.section	.bss.gFlashOnfiModeEn,"aw",%nobits
-	.type	gFlashOnfiModeEn, %object
-	.size	gFlashOnfiModeEn, 1
-gFlashOnfiModeEn:
-	.space	1
-	.section	.bss.gFlashPageBuffer0,"aw",%nobits
-	.align	2
-	.set	.LANCHOR144,. + 0
-	.type	gFlashPageBuffer0, %object
-	.size	gFlashPageBuffer0, 4
-gFlashPageBuffer0:
-	.space	4
-	.section	.bss.gFlashPageBuffer1,"aw",%nobits
-	.align	2
-	.set	.LANCHOR150,. + 0
-	.type	gFlashPageBuffer1, %object
-	.size	gFlashPageBuffer1, 4
-gFlashPageBuffer1:
-	.space	4
-	.section	.bss.gFlashProgCheckBuffer,"aw",%nobits
-	.align	2
-	.set	.LANCHOR195,. + 0
-	.type	gFlashProgCheckBuffer, %object
-	.size	gFlashProgCheckBuffer, 4
-gFlashProgCheckBuffer:
-	.space	4
-	.section	.bss.gFlashProgCheckSpareBuffer,"aw",%nobits
-	.align	2
-	.set	.LANCHOR196,. + 0
-	.type	gFlashProgCheckSpareBuffer, %object
-	.size	gFlashProgCheckSpareBuffer, 4
-gFlashProgCheckSpareBuffer:
-	.space	4
-	.section	.bss.gFlashSdrModeEn,"aw",%nobits
-	.type	gFlashSdrModeEn, %object
-	.size	gFlashSdrModeEn, 1
-gFlashSdrModeEn:
-	.space	1
-	.section	.bss.gFlashSlcMode,"aw",%nobits
-	.set	.LANCHOR8,. + 0
-	.type	gFlashSlcMode, %object
-	.size	gFlashSlcMode, 1
-gFlashSlcMode:
-	.space	1
-	.section	.bss.gFlashSpareBuffer,"aw",%nobits
+	.global	FtlLowFormat
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlLowFormat, %function
+FtlLowFormat:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2779
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #24
+	ldr	r4, [r3]
+	cmp	r4, #0
+	bne	.L2750
+	ldr	r5, .L2779+4
+	mov	r1, r4
+	ldr	r3, .L2779+8
+	ldr	r6, .L2779+12
+	ldrh	r2, [r5]
+	ldr	r0, [r3]
+	lsls	r2, r2, #2
+	bl	ftl_memset
+	ldrh	r2, [r5]
+	mov	r1, r4
+	ldr	r3, .L2779+16
+	ldr	r5, .L2779+20
+	lsls	r2, r2, #2
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldr	r3, .L2779+24
+	ldrh	r0, [r6]
+	str	r4, [r5]
+	str	r4, [r3]
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlLoadBbt
+	cbz	r0, .L2751
+	bl	FtlMakeBbt
+.L2751:
+	ldr	r3, .L2779+28
+	ldr	r2, .L2779+32
+	ldr	ip, .L2779+112
+	ldrh	r1, [r3]
+	ldr	r4, [r2]
+	ldr	r2, .L2779+36
+	str	r3, [sp, #12]
+	lsls	r1, r1, #7
+	ldr	r7, [r2]
+	movs	r2, #0
+.L2752:
+	uxth	r3, r2
+	adds	r2, r2, #1
+	cmp	r3, r1
+	blt	.L2753
+	ldr	r3, .L2779+40
+	movs	r7, #0
+	ldr	fp, .L2779+116
+	ldrh	r4, [r3]
+	mov	r8, r3
+	mov	r10, fp
+.L2754:
+	ldrh	r3, [fp]
+	cmp	r3, r4
+	bhi	.L2755
+	ldr	r4, .L2779+44
+	subs	r3, r7, #2
+	ldrh	r1, [r4]
+	cmp	r3, r1, lsl #1
+	bgt	.L2756
+.L2760:
+	movs	r7, #0
+	mov	r6, r7
+.L2757:
+	ldrh	r3, [r8]
+	uxth	r0, r7
+	adds	r7, r7, #1
+	cmp	r3, r0
+	bhi	.L2761
+	ldrh	r2, [r10]
+	ldr	r3, .L2779+48
+	ldrh	r4, [r4]
+	ldr	r7, .L2779+52
+	str	r2, [r3]
+	ldr	r3, .L2779+56
+	mov	r1, r4
+	ldr	r3, [r3]
+	mov	r0, r3
+	str	r3, [sp, #16]
+	bl	__aeabi_uidiv
+	ldr	r1, .L2779+60
+	ubfx	r3, r0, #5, #16
+	add	r2, r3, #36
+	mov	fp, r0
+	str	r0, [r7]
+	strh	r2, [r1]	@ movhi
+	movs	r2, #24
+	muls	r2, r4, r2
+	str	r3, [sp, #4]
+	str	r1, [sp, #8]
+	cmp	r6, r2
+	ble	.L2762
+	ldr	r3, [sp, #16]
+	mov	r1, r4
+	subs	r0, r3, r6
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #8]
+	str	r0, [r7]
+	lsrs	r0, r0, #5
+	adds	r0, r0, #24
+	strh	r0, [r3]	@ movhi
+.L2762:
+	ldr	r3, .L2779+64
+	ldr	r3, [r3]
+	cmp	r3, #1
+	bne	.L2763
+	ldr	r2, .L2779+60
+	mov	r1, r4
+	mov	r0, r6
+	ldrh	r3, [r2]
+	str	r2, [sp, #20]
+	str	r3, [sp, #16]
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #16]
+	ldr	r2, [sp, #20]
+	uxtah	r0, r3, r0
+	add	r3, r3, r0, asr #2
+	strh	r3, [r2]	@ movhi
+.L2763:
+	ldr	r3, .L2779+68
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2764
+	ldr	r2, .L2779+60
+	mov	r1, r4
+	mov	r0, r6
+	ldrh	r3, [r2]
+	str	r2, [sp, #20]
+	str	r3, [sp, #16]
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #16]
+	ldr	r2, [sp, #20]
+	uxtah	r0, r3, r0
+	add	r3, r3, r0, asr #2
+	strh	r3, [r2]	@ movhi
+.L2764:
+	ldr	r3, .L2779+72
+	ldrh	r3, [r3]
+	cbz	r3, .L2766
+	ldr	r2, .L2779+60
+	ldrh	r1, [r2]
+	add	r1, r1, r3, lsr #1
+	strh	r1, [r2]	@ movhi
+	mul	r1, r4, r3
+	cmp	r6, r1
+	bge	.L2766
+	ldr	r1, [sp, #4]
+	adds	r3, r3, #32
+	str	fp, [r7]
+	add	r1, r1, r3
+	strh	r1, [r2]	@ movhi
+.L2766:
+	ldr	r3, [sp, #8]
+	ldr	r6, .L2779+76
+	ldrh	r2, [r3]
+	ldr	r3, [r7]
+	subs	r3, r3, r2
+	muls	r4, r3, r4
+	ldr	r3, .L2779+80
+	ldrh	r3, [r3]
+	str	r4, [r6]
+	muls	r4, r3, r4
+	ldr	r3, [sp, #12]
+	ldrh	r3, [r3]
+	str	r4, [r7]
+	ldr	r7, .L2779+84
+	muls	r4, r3, r4
+	ldr	r3, .L2779+88
+	str	r4, [r3]
+	movw	r4, #65535
+	bl	FtlBbmTblFlush
+	ldrh	r2, [r10]
+	movs	r1, #0
+	ldr	r10, .L2779+120
+	lsls	r2, r2, #1
+	ldr	r0, [r10]
+	bl	ftl_memset
+	ldr	r2, .L2779+92
+	movs	r3, #0
+	strh	r3, [r7, #2]	@ movhi
+	movs	r1, #255
+	strb	r3, [r7, #6]
+	str	r3, [r2]
+	ldr	r2, .L2779+96
+	strh	r3, [r7]	@ movhi
+	strh	r3, [r2, #2]	@ movhi
+	strb	r3, [r2, #6]
+	strb	r3, [r2, #8]
+	movs	r3, #1
+	strh	r4, [r2]	@ movhi
+	ldrh	r2, [r8]
+	mov	r8, r10
+	strb	r3, [r7, #8]
+	mov	r10, r7
+	ldr	r3, .L2779+100
+	lsrs	r2, r2, #3
+	ldr	r0, [r3]
+	bl	ftl_memset
+.L2768:
+	mov	r0, r10
+	bl	make_superblock
+	ldrb	r3, [r7, #7]	@ zero_extendqisi2
+	ldrh	r2, [r7]
+	cmp	r3, #0
+	bne	.L2769
+	ldr	r3, [r8]
+	strh	r4, [r3, r2, lsl #1]	@ movhi
+	ldrh	r3, [r7]
+	adds	r3, r3, #1
+	strh	r3, [r7]	@ movhi
+	b	.L2768
+.L2753:
+	mvns	r0, r3
+	orr	r0, r3, r0, lsl #16
+	str	r0, [r4, r3, lsl #2]
+	str	ip, [r7, r3, lsl #2]
+	b	.L2752
+.L2755:
+	mov	r0, r4
+	movs	r1, #1
+	bl	FtlLowFormatEraseBlock
+	adds	r4, r4, #1
+	add	r7, r7, r0
+	uxth	r7, r7
+	uxth	r4, r4
+	b	.L2754
+.L2756:
+	mov	r0, r7
+	bl	__aeabi_uidiv
+	ldr	r3, .L2779+104
+	ldr	r3, [r3]
+	add	r0, r0, r3
+	uxth	r0, r0
+	bl	FtlSysBlkNumInit
+	ldrh	r0, [r6]
+	bl	FtlFreeSysBlkQueueInit
+	ldrh	r6, [r8]
+.L2758:
+	ldrh	r3, [r10]
+	cmp	r3, r6
+	bls	.L2760
+	mov	r0, r6
+	movs	r1, #1
+	adds	r6, r6, #1
+	bl	FtlLowFormatEraseBlock
+	uxth	r6, r6
+	b	.L2758
+.L2761:
+	movs	r1, #0
+	bl	FtlLowFormatEraseBlock
+	add	r6, r6, r0
+	uxth	r6, r6
+	b	.L2757
+.L2769:
+	ldr	r3, [r5]
+	ldrh	r1, [r7, #4]
+	ldr	r4, .L2779+108
+	str	r3, [r7, #12]
+	adds	r3, r3, #1
+	str	r3, [r5]
+	ldr	r3, [r8]
+	mov	r10, r4
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	movs	r3, #0
+	strh	r3, [r4, #2]	@ movhi
+	strb	r3, [r4, #6]
+	ldrh	r3, [r7]
+	movw	r7, #65535
+	adds	r3, r3, #1
+	strh	r3, [r4]	@ movhi
+	movs	r3, #1
+	strb	r3, [r4, #8]
+.L2770:
+	mov	r0, r10
+	bl	make_superblock
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	ldrh	r2, [r4]
+	cmp	r3, #0
+	bne	.L2771
+	ldr	r3, [r8]
+	strh	r7, [r3, r2, lsl #1]	@ movhi
+	ldrh	r3, [r4]
+	adds	r3, r3, #1
+	strh	r3, [r4]	@ movhi
+	b	.L2770
+.L2780:
 	.align	2
-	.set	.LANCHOR194,. + 0
-	.type	gFlashSpareBuffer, %object
-	.size	gFlashSpareBuffer, 4
-gFlashSpareBuffer:
-	.space	4
-	.section	.bss.gFlashToggleModeEn,"aw",%nobits
-	.set	.LANCHOR29,. + 0
-	.type	gFlashToggleModeEn, %object
-	.size	gFlashToggleModeEn, 1
-gFlashToggleModeEn:
-	.space	1
-	.section	.bss.gL2pMapInfo,"aw",%nobits
-	.align	2
-	.set	.LANCHOR124,. + 0
-	.type	gL2pMapInfo, %object
-	.size	gL2pMapInfo, 44
-gL2pMapInfo:
-	.space	44
-	.section	.bss.gMasterInfo,"aw",%nobits
-	.align	2
-	.set	.LANCHOR34,. + 0
-	.type	gMasterInfo, %object
-	.size	gMasterInfo, 32
-gMasterInfo:
-	.space	32
-	.section	.bss.gMasterTempBuf,"aw",%nobits
-	.align	2
-	.set	.LANCHOR153,. + 0
-	.type	gMasterTempBuf, %object
-	.size	gMasterTempBuf, 4
-gMasterTempBuf:
-	.space	4
-	.section	.bss.gMultiPageProgEn,"aw",%nobits
-	.set	.LANCHOR27,. + 0
-	.type	gMultiPageProgEn, %object
-	.size	gMultiPageProgEn, 1
-gMultiPageProgEn:
-	.space	1
-	.section	.bss.gMultiPageReadEn,"aw",%nobits
-	.set	.LANCHOR198,. + 0
-	.type	gMultiPageReadEn, %object
-	.size	gMultiPageReadEn, 1
-gMultiPageReadEn:
-	.space	1
-	.section	.bss.gNandChipMap,"aw",%nobits
-	.align	2
-	.set	.LANCHOR6,. + 0
-	.type	gNandChipMap, %object
-	.size	gNandChipMap, 32
-gNandChipMap:
-	.space	32
-	.section	.bss.gNandFlashEccBits,"aw",%nobits
-	.set	.LANCHOR32,. + 0
-	.type	gNandFlashEccBits, %object
-	.size	gNandFlashEccBits, 1
-gNandFlashEccBits:
-	.space	1
-	.section	.bss.gNandFlashIDBEccBits,"aw",%nobits
-	.set	.LANCHOR149,. + 0
-	.type	gNandFlashIDBEccBits, %object
-	.size	gNandFlashIDBEccBits, 1
-gNandFlashIDBEccBits:
-	.space	1
-	.section	.bss.gNandFlashIdbBlockAddr,"aw",%nobits
+.L2779:
+	.word	.LANCHOR77
+	.word	.LANCHOR67
+	.word	.LANCHOR195
+	.word	.LANCHOR39
+	.word	.LANCHOR131
+	.word	.LANCHOR159
+	.word	.LANCHOR160
+	.word	.LANCHOR56
+	.word	.LANCHOR186
+	.word	.LANCHOR187
+	.word	.LANCHOR40
+	.word	.LANCHOR38
+	.word	.LANCHOR74
+	.word	.LANCHOR73
+	.word	.LANCHOR42
+	.word	.LANCHOR223
+	.word	.LANCHOR28
+	.word	.LANCHOR8
+	.word	.LANCHOR49
+	.word	.LANCHOR222
+	.word	.LANCHOR53
+	.word	.LANCHOR92
+	.word	.LANCHOR69
+	.word	.LANCHOR101
+	.word	.LANCHOR204
+	.word	.LANCHOR0
+	.word	.LANCHOR66
+	.word	.LANCHOR93
+	.word	168778952
+	.word	.LANCHOR41
+	.word	.LANCHOR84
+.L2771:
+	ldr	r3, [r5]
+	ldrh	r1, [r4, #4]
+	str	r3, [r4, #12]
+	adds	r3, r3, #1
+	str	r3, [r5]
+	movw	r4, #65535
+	ldr	r3, [r8]
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	ldr	r3, .L2781
+	strh	r4, [r3]	@ movhi
+	bl	FtlFreeSysBlkQueueOut
+	ldr	r3, .L2781+4
+	movs	r2, #0
+	strh	r2, [r3, #2]	@ movhi
+	ldr	r2, [r6]
+	strh	r0, [r3]	@ movhi
+	strh	r4, [r3, #4]	@ movhi
+	strh	r2, [r3, #6]	@ movhi
+	ldr	r2, [r5]
+	str	r2, [r3, #8]
+	adds	r2, r2, #1
+	str	r2, [r5]
+	bl	FtlVpcTblFlush
+	bl	FtlSysBlkInit
+	cbnz	r0, .L2750
+	ldr	r3, .L2781+8
+	movs	r2, #1
+	str	r2, [r3]
+.L2750:
+	movs	r0, #0
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2782:
 	.align	2
-	.set	.LANCHOR146,. + 0
-	.type	gNandFlashIdbBlockAddr, %object
-	.size	gNandFlashIdbBlockAddr, 4
-gNandFlashIdbBlockAddr:
-	.space	4
-	.section	.bss.gNandFlashInfoBlockAddr,"aw",%nobits
+.L2781:
+	.word	.LANCHOR94
+	.word	.LANCHOR209
+	.word	.LANCHOR231
+	.size	FtlLowFormat, .-FtlLowFormat
+	.section	.text.Ftl_get_new_temp_ppa,"ax",%progbits
+	.align	1
+	.global	Ftl_get_new_temp_ppa
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	Ftl_get_new_temp_ppa, %function
+Ftl_get_new_temp_ppa:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	movw	r3, #65535
+	ldr	r4, .L2786
+	ldrh	r2, [r4]
+	cmp	r2, r3
+	beq	.L2784
+	ldrh	r3, [r4, #4]
+	cbnz	r3, .L2785
+.L2784:
+	bl	FtlCacheWriteBack
+	movs	r0, #0
+	movs	r5, #0
+	bl	FtlGcFreeTempBlock
+	ldr	r0, .L2786
+	strb	r5, [r4, #8]
+	bl	allocate_data_superblock
+	ldr	r3, .L2786+4
+	strh	r5, [r3]	@ movhi
+	ldr	r3, .L2786+8
+	strh	r5, [r3]	@ movhi
+	bl	l2p_flush
+	mov	r0, r5
+	bl	FtlEctTblFlush
+	bl	FtlVpcTblFlush
+.L2785:
+	ldr	r0, .L2786
+	pop	{r3, r4, r5, lr}
+	b	get_new_active_ppa
+.L2787:
 	.align	2
-	.set	.LANCHOR145,. + 0
-	.type	gNandFlashInfoBlockAddr, %object
-	.size	gNandFlashInfoBlockAddr, 4
-gNandFlashInfoBlockAddr:
-	.space	4
-	.section	.bss.gNandFlashInfoBlockEcc,"aw",%nobits
-	.type	gNandFlashInfoBlockEcc, %object
-	.size	gNandFlashInfoBlockEcc, 1
-gNandFlashInfoBlockEcc:
-	.space	1
-	.section	.bss.gNandFlashResEndPageAddr,"aw",%nobits
+.L2786:
+	.word	.LANCHOR94
+	.word	.LANCHOR110
+	.word	.LANCHOR111
+	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
+	.section	.text.Ftl_gc_temp_data_write_back,"ax",%progbits
+	.align	1
+	.global	Ftl_gc_temp_data_write_back
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	Ftl_gc_temp_data_write_back, %function
+Ftl_gc_temp_data_write_back:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	ldr	r3, .L2803
+	ldr	r3, [r3]
+	cbz	r3, .L2789
+.L2792:
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, pc}
+.L2789:
+	ldr	r3, .L2803+4
+	ldr	r5, .L2803+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2791
+	ldr	r3, [r5]
+	lsls	r2, r3, #31
+	bpl	.L2791
+	ldr	r3, .L2803+12
+	ldrh	r3, [r3, #4]
+	cmp	r3, #0
+	bne	.L2792
+.L2791:
+	ldr	r4, .L2803+16
+	movs	r3, #0
+	movs	r6, #0
+	movs	r7, #36
+	mov	r2, r3
+	ldr	r1, [r5]
+	ldr	r0, [r4]
+	bl	FlashProgPages
+.L2793:
+	ldr	r1, [r5]
+	uxth	r3, r6
+	cmp	r3, r1
+	bcc	.L2795
+	ldr	r0, [r4]
+	bl	FtlGcBufFree
+	movs	r3, #0
+	str	r3, [r5]
+	ldr	r3, .L2803+12
+	ldrh	r3, [r3, #4]
+	cmp	r3, #0
+	bne	.L2792
+	movs	r0, #1
+	bl	FtlGcFreeTempBlock
+	b	.L2802
+.L2795:
+	muls	r3, r7, r3
+	ldr	r2, [r4]
+	adds	r6, r6, #1
+	adds	r1, r2, r3
+	ldr	r2, [r2, r3]
+	adds	r3, r2, #1
+	bne	.L2794
+	ldr	r3, .L2803+12
+	movs	r5, #0
+	ldr	r0, .L2803+20
+	ldrh	r4, [r3]
+	ldr	r0, [r0]
+	strh	r5, [r0, r4, lsl #1]	@ movhi
+	strh	r2, [r3]	@ movhi
+	ldr	r2, .L2803+24
+	ldr	r0, [r1, #4]
+	ldr	r3, [r2, #96]
+	ubfx	r0, r0, #10, #16
+	adds	r3, r3, #1
+	str	r3, [r2, #96]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	bl	FtlGcPageVarInit
+.L2802:
+	movs	r0, #1
+	pop	{r3, r4, r5, r6, r7, pc}
+.L2794:
+	ldr	r3, [r1, #12]
+	ldr	r1, [r1, #4]
+	ldr	r2, [r3, #8]
+	ldr	r0, [r3, #12]
+	bl	FtlGcUpdatePage
+	b	.L2793
+.L2804:
 	.align	2
-	.type	gNandFlashResEndPageAddr, %object
-	.size	gNandFlashResEndPageAddr, 4
-gNandFlashResEndPageAddr:
-	.space	4
-	.section	.bss.gNandIDBResBlkNum,"aw",%nobits
-	.set	.LANCHOR2,. + 0
-	.type	gNandIDBResBlkNum, %object
-	.size	gNandIDBResBlkNum, 1
-gNandIDBResBlkNum:
-	.space	1
-	.section	.bss.gNandIDBResBlkNumSaveInFlash,"aw",%nobits
-	.set	.LANCHOR147,. + 0
-	.type	gNandIDBResBlkNumSaveInFlash, %object
-	.size	gNandIDBResBlkNumSaveInFlash, 1
-gNandIDBResBlkNumSaveInFlash:
-	.space	1
-	.section	.bss.gNandIDataBuf,"aw",%nobits
-	.align	2
-	.set	.LANCHOR138,. + 0
-	.type	gNandIDataBuf, %object
-	.size	gNandIDataBuf, 2048
-gNandIDataBuf:
-	.space	2048
-	.section	.bss.gNandMaxChip,"aw",%nobits
-	.set	.LANCHOR118,. + 0
-	.type	gNandMaxChip, %object
-	.size	gNandMaxChip, 1
-gNandMaxChip:
-	.space	1
-	.section	.bss.gNandMaxDie,"aw",%nobits
-	.set	.LANCHOR25,. + 0
-	.type	gNandMaxDie, %object
-	.size	gNandMaxDie, 1
-gNandMaxDie:
-	.space	1
-	.section	.bss.gNandOptPara,"aw",%nobits
-	.set	.LANCHOR7,. + 0
-	.type	gNandOptPara, %object
-	.size	gNandOptPara, 32
-gNandOptPara:
-	.space	32
-	.section	.bss.gNandPhyInfo,"aw",%nobits
-	.align	2
-	.set	.LANCHOR15,. + 0
-	.type	gNandPhyInfo, %object
-	.size	gNandPhyInfo, 28
-gNandPhyInfo:
-	.space	28
-	.section	.bss.gNandRandomizer,"aw",%nobits
-	.set	.LANCHOR5,. + 0
-	.type	gNandRandomizer, %object
-	.size	gNandRandomizer, 1
-gNandRandomizer:
-	.space	1
-	.section	.bss.gNandcDumpWriteEn,"aw",%nobits
-	.align	2
-	.set	.LANCHOR35,. + 0
-	.type	gNandcDumpWriteEn, %object
-	.size	gNandcDumpWriteEn, 4
-gNandcDumpWriteEn:
-	.space	4
-	.section	.bss.gNandcEccBits,"aw",%nobits
-	.align	2
-	.set	.LANCHOR31,. + 0
-	.type	gNandcEccBits, %object
-	.size	gNandcEccBits, 4
-gNandcEccBits:
-	.space	4
-	.section	.bss.gNandcVer,"aw",%nobits
-	.align	2
-	.set	.LANCHOR33,. + 0
-	.type	gNandcVer, %object
-	.size	gNandcVer, 4
-gNandcVer:
-	.space	4
-	.section	.bss.gReadRetryInfo,"aw",%nobits
-	.set	.LANCHOR20,. + 0
-	.type	gReadRetryInfo, %object
-	.size	gReadRetryInfo, 852
-gReadRetryInfo:
-	.space	852
-	.section	.bss.gSysFreeQueue,"aw",%nobits
-	.align	1
-	.set	.LANCHOR75,. + 0
-	.type	gSysFreeQueue, %object
-	.size	gSysFreeQueue, 2056
-gSysFreeQueue:
-	.space	2056
-	.section	.bss.gSysInfo,"aw",%nobits
-	.align	2
-	.set	.LANCHOR206,. + 0
-	.type	gSysInfo, %object
-	.size	gSysInfo, 12
-gSysInfo:
-	.space	12
-	.section	.bss.gToggleModeClkDiv,"aw",%nobits
-	.align	2
-	.type	gToggleModeClkDiv, %object
-	.size	gToggleModeClkDiv, 4
-gToggleModeClkDiv:
-	.space	4
-	.section	.bss.gTotleBlock,"aw",%nobits
-	.align	1
-	.set	.LANCHOR119,. + 0
-	.type	gTotleBlock, %object
-	.size	gTotleBlock, 2
-gTotleBlock:
-	.space	2
-	.section	.bss.gVendorBlkInfo,"aw",%nobits
-	.align	2
-	.set	.LANCHOR215,. + 0
-	.type	gVendorBlkInfo, %object
-	.size	gVendorBlkInfo, 44
-gVendorBlkInfo:
-	.space	44
-	.section	.bss.g_GlobalDataVersion,"aw",%nobits
-	.align	2
-	.set	.LANCHOR157,. + 0
-	.type	g_GlobalDataVersion, %object
-	.size	g_GlobalDataVersion, 4
-g_GlobalDataVersion:
-	.space	4
-	.section	.bss.g_GlobalSysVersion,"aw",%nobits
-	.align	2
-	.set	.LANCHOR156,. + 0
-	.type	g_GlobalSysVersion, %object
-	.size	g_GlobalSysVersion, 4
-g_GlobalSysVersion:
-	.space	4
-	.section	.bss.g_LowFormat,"aw",%nobits
-	.align	2
-	.set	.LANCHOR239,. + 0
-	.type	g_LowFormat, %object
-	.size	g_LowFormat, 4
-g_LowFormat:
-	.space	4
-	.section	.bss.g_MaxLbaSector,"aw",%nobits
-	.align	2
-	.set	.LANCHOR68,. + 0
-	.type	g_MaxLbaSector, %object
-	.size	g_MaxLbaSector, 4
-g_MaxLbaSector:
-	.space	4
-	.section	.bss.g_MaxLbn,"aw",%nobits
-	.align	2
-	.set	.LANCHOR226,. + 0
-	.type	g_MaxLbn, %object
-	.size	g_MaxLbn, 4
-g_MaxLbn:
-	.space	4
-	.section	.bss.g_MaxLpn,"aw",%nobits
-	.align	2
-	.set	.LANCHOR72,. + 0
-	.type	g_MaxLpn, %object
-	.size	g_MaxLpn, 4
-g_MaxLpn:
-	.space	4
-	.section	.bss.g_SlcPartLbaEndSector,"aw",%nobits
-	.align	2
-	.set	.LANCHOR154,. + 0
-	.type	g_SlcPartLbaEndSector, %object
-	.size	g_SlcPartLbaEndSector, 4
-g_SlcPartLbaEndSector:
-	.space	4
-	.section	.bss.g_VaildLpn,"aw",%nobits
-	.align	2
-	.set	.LANCHOR100,. + 0
-	.type	g_VaildLpn, %object
-	.size	g_VaildLpn, 4
-g_VaildLpn:
-	.space	4
-	.section	.bss.g_active_superblock,"aw",%nobits
-	.align	2
-	.set	.LANCHOR91,. + 0
-	.type	g_active_superblock, %object
-	.size	g_active_superblock, 48
-g_active_superblock:
-	.space	48
-	.section	.bss.g_all_blk_used_slc_mode,"aw",%nobits
-	.align	2
-	.set	.LANCHOR155,. + 0
-	.type	g_all_blk_used_slc_mode, %object
-	.size	g_all_blk_used_slc_mode, 4
-g_all_blk_used_slc_mode:
-	.space	4
-	.section	.bss.g_buffer_superblock,"aw",%nobits
-	.align	2
-	.set	.LANCHOR92,. + 0
-	.type	g_buffer_superblock, %object
-	.size	g_buffer_superblock, 48
-g_buffer_superblock:
-	.space	48
-	.section	.bss.g_cur_erase_blk,"aw",%nobits
-	.align	2
-	.set	.LANCHOR73,. + 0
-	.type	g_cur_erase_blk, %object
-	.size	g_cur_erase_blk, 4
-g_cur_erase_blk:
-	.space	4
-	.section	.bss.g_ect_tbl_info_size,"aw",%nobits
-	.align	1
-	.set	.LANCHOR187,. + 0
-	.type	g_ect_tbl_info_size, %object
-	.size	g_ect_tbl_info_size, 2
-g_ect_tbl_info_size:
-	.space	2
-	.section	.bss.g_ect_tbl_power_up_flush,"aw",%nobits
-	.align	1
-	.set	.LANCHOR218,. + 0
-	.type	g_ect_tbl_power_up_flush, %object
-	.size	g_ect_tbl_power_up_flush, 2
-g_ect_tbl_power_up_flush:
-	.space	2
-	.section	.bss.g_flash_read_only_en,"aw",%nobits
-	.align	2
-	.set	.LANCHOR76,. + 0
-	.type	g_flash_read_only_en, %object
-	.size	g_flash_read_only_en, 4
-g_flash_read_only_en:
-	.space	4
-	.section	.bss.g_free_slc_blk_num,"aw",%nobits
-	.align	1
-	.set	.LANCHOR136,. + 0
-	.type	g_free_slc_blk_num, %object
-	.size	g_free_slc_blk_num, 2
-g_free_slc_blk_num:
-	.space	2
-	.section	.bss.g_ftl_nand_free_count,"aw",%nobits
-	.align	2
-	.set	.LANCHOR241,. + 0
-	.type	g_ftl_nand_free_count, %object
-	.size	g_ftl_nand_free_count, 4
-g_ftl_nand_free_count:
-	.space	4
-	.section	.bss.g_gc_bad_block_gc_index,"aw",%nobits
-	.align	1
-	.set	.LANCHOR116,. + 0
-	.type	g_gc_bad_block_gc_index, %object
-	.size	g_gc_bad_block_gc_index, 2
-g_gc_bad_block_gc_index:
-	.space	2
-	.section	.bss.g_gc_bad_block_temp_num,"aw",%nobits
-	.align	1
-	.set	.LANCHOR114,. + 0
-	.type	g_gc_bad_block_temp_num, %object
-	.size	g_gc_bad_block_temp_num, 2
-g_gc_bad_block_temp_num:
-	.space	2
-	.section	.bss.g_gc_bad_block_temp_tbl,"aw",%nobits
-	.align	1
-	.set	.LANCHOR115,. + 0
-	.type	g_gc_bad_block_temp_tbl, %object
-	.size	g_gc_bad_block_temp_tbl, 34
-g_gc_bad_block_temp_tbl:
-	.space	34
-	.section	.bss.g_gc_blk_index,"aw",%nobits
+.L2803:
+	.word	.LANCHOR77
+	.word	.LANCHOR8
+	.word	.LANCHOR103
+	.word	.LANCHOR94
+	.word	.LANCHOR181
+	.word	.LANCHOR84
+	.word	.LANCHOR138
+	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
+	.section	.text.rk_ftl_garbage_collect,"ax",%progbits
 	.align	1
-	.set	.LANCHOR175,. + 0
-	.type	g_gc_blk_index, %object
-	.size	g_gc_blk_index, 2
-g_gc_blk_index:
-	.space	2
-	.section	.bss.g_gc_blk_num,"aw",%nobits
-	.align	1
-	.set	.LANCHOR109,. + 0
-	.type	g_gc_blk_num, %object
-	.size	g_gc_blk_num, 2
-g_gc_blk_num:
-	.space	2
-	.section	.bss.g_gc_cur_blk_max_valid_pages,"aw",%nobits
-	.align	1
-	.set	.LANCHOR237,. + 0
-	.type	g_gc_cur_blk_max_valid_pages, %object
-	.size	g_gc_cur_blk_max_valid_pages, 2
-g_gc_cur_blk_max_valid_pages:
-	.space	2
-	.section	.bss.g_gc_cur_blk_valid_pages,"aw",%nobits
-	.align	1
-	.set	.LANCHOR236,. + 0
-	.type	g_gc_cur_blk_valid_pages, %object
-	.size	g_gc_cur_blk_valid_pages, 2
-g_gc_cur_blk_valid_pages:
-	.space	2
-	.section	.bss.g_gc_free_blk_threshold,"aw",%nobits
-	.align	1
-	.set	.LANCHOR173,. + 0
-	.type	g_gc_free_blk_threshold, %object
-	.size	g_gc_free_blk_threshold, 2
-g_gc_free_blk_threshold:
-	.space	2
-	.section	.bss.g_gc_head_data_block,"aw",%nobits
-	.align	2
-	.set	.LANCHOR170,. + 0
-	.type	g_gc_head_data_block, %object
-	.size	g_gc_head_data_block, 4
-g_gc_head_data_block:
-	.space	4
-	.section	.bss.g_gc_head_data_block_count,"aw",%nobits
-	.align	2
-	.set	.LANCHOR171,. + 0
-	.type	g_gc_head_data_block_count, %object
-	.size	g_gc_head_data_block_count, 4
-g_gc_head_data_block_count:
-	.space	4
-	.section	.bss.g_gc_merge_free_blk_threshold,"aw",%nobits
-	.align	1
-	.set	.LANCHOR174,. + 0
-	.type	g_gc_merge_free_blk_threshold, %object
-	.size	g_gc_merge_free_blk_threshold, 2
-g_gc_merge_free_blk_threshold:
-	.space	2
-	.section	.bss.g_gc_next_blk,"aw",%nobits
-	.align	1
-	.set	.LANCHOR112,. + 0
-	.type	g_gc_next_blk, %object
-	.size	g_gc_next_blk, 2
-g_gc_next_blk:
-	.space	2
-	.section	.bss.g_gc_next_blk_1,"aw",%nobits
-	.align	1
-	.set	.LANCHOR113,. + 0
-	.type	g_gc_next_blk_1, %object
-	.size	g_gc_next_blk_1, 2
-g_gc_next_blk_1:
-	.space	2
-	.section	.bss.g_gc_num_req,"aw",%nobits
+	.global	rk_ftl_garbage_collect
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_ftl_garbage_collect, %function
+rk_ftl_garbage_collect:
+	@ args = 0, pretend = 0, frame = 32
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2895
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #40
+	ldr	r2, [r3]
+	cmp	r2, #0
+	bne	.L2857
+	ldr	r3, .L2895+4
+	ldr	r3, [r3]
+	cmp	r3, #0
+	bne	.L2857
+	ldr	r2, .L2895+8
+	ldrh	r2, [r2]
+	cmp	r2, #47
+	bls	.L2859
+	ldr	r5, .L2895+12
+	movw	r2, #65535
+	ldrh	ip, [r5]
+	cmp	ip, r2
+	beq	.L2807
+	ldr	r7, .L2895+16
+	ldrh	r3, [r7]
+	cmp	r3, r2
+	bne	.L2807
+	ldr	r1, .L2895+20
+	ldrh	r6, [r1]
+	cmp	r6, r3
+	beq	.L2807
+	ldr	r2, .L2895+24
+	ldrh	r4, [r2]
+	cmp	r4, r3
+	itttt	ne
+	strhne	ip, [r7]	@ movhi
+	strhne	r6, [r5]	@ movhi
+	strhne	r4, [r1]	@ movhi
+	strhne	r3, [r2]	@ movhi
+.L2807:
+	cmp	r0, #0
+	bne	.L2860
+	ldr	r3, .L2895+28
+	ldrh	r3, [r3]
+	cmp	r3, #24
+	bhi	.L2861
+	ldr	r2, .L2895+32
+	cmp	r3, #16
+	ldrh	r4, [r2]
+	bls	.L2810
+	lsrs	r4, r4, #5
+.L2809:
+	ldr	r2, .L2895+36
+	ldrh	r1, [r2]
+	cmp	r1, r3
+	mov	r1, r2
+	bcs	.L2813
+	ldr	r3, .L2895+40
+	movw	r0, #65535
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bne	.L2814
+	ldr	r0, .L2895+16
+	ldrh	r0, [r0]
+	cmp	r0, r3
+	bne	.L2814
+	ldr	r3, .L2895+44
+	ldrh	r0, [r3]
+	cbnz	r0, .L2815
+	ldr	r3, .L2895+48
+	ldr	r4, .L2895+52
+	ldr	r3, [r3]
+	ldr	r4, [r4]
+	add	r3, r3, r3, lsl #1
+	cmp	r4, r3, lsr #2
+	bcs	.L2816
+.L2815:
+	ldr	r3, .L2895+56
+	ldrh	r3, [r3]
+	add	r3, r3, r3, lsl #1
+	asrs	r3, r3, #2
+	strh	r3, [r1]	@ movhi
+.L2817:
+	ldr	r3, .L2895+60
+	movs	r2, #0
+	str	r2, [r3]
+.L2805:
+	add	sp, sp, #40
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2810:
+	cmp	r3, #12
+	bls	.L2811
+	lsrs	r4, r4, #4
+	b	.L2809
+.L2811:
+	cmp	r3, #8
+	bls	.L2809
+	lsrs	r4, r4, #2
+	b	.L2809
+.L2861:
+	movs	r4, #1
+	b	.L2809
+.L2816:
+	movs	r3, #18
+	strh	r3, [r2]	@ movhi
+	b	.L2817
+.L2814:
+	ldr	r3, .L2895+56
+	ldrh	r3, [r3]
+	add	r3, r3, r3, lsl #1
+	asrs	r3, r3, #2
+	strh	r3, [r1]	@ movhi
+.L2813:
+	ldr	r3, .L2895+64
+	ldrh	r3, [r3]
+	cbz	r3, .L2808
+	adds	r4, r4, #32
+	uxth	r4, r4
+.L2808:
+	ldr	r5, .L2895+68
+	movw	r3, #65535
+	ldrh	r2, [r5]
+	cmp	r2, r3
+	bne	.L2820
+	ldr	r3, .L2895+16
+	ldrh	r1, [r3]
+	cmp	r1, r2
+	beq	.L2821
+	ldr	r0, .L2895+72
+	ldr	r0, [r0]
+	ldrh	r1, [r0, r1, lsl #1]
+	cbnz	r1, .L2822
+	strh	r2, [r3]	@ movhi
+.L2822:
+	ldrh	r2, [r3]
+	strh	r2, [r5]	@ movhi
+	movw	r2, #65535
+	strh	r2, [r3]	@ movhi
+.L2821:
+	ldrh	r0, [r5]
+	movw	r6, #65535
+	movs	r3, #0
+	strb	r3, [r5, #8]
+	cmp	r0, r6
+	beq	.L2820
+	bl	IsBlkInGcList
+	cbz	r0, .L2824
+	strh	r6, [r5]	@ movhi
+.L2824:
+	ldr	r3, .L2895+76
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2825
+	ldrh	r0, [r5]
+	bl	ftl_get_blk_mode
+	strb	r0, [r5, #8]
+.L2825:
+	ldrh	r2, [r5]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L2820
+	ldr	r0, .L2895+68
+	bl	make_superblock
+	ldr	r2, .L2895+80
+	movs	r3, #0
+	strh	r3, [r5, #2]	@ movhi
+	strb	r3, [r5, #6]
+	strh	r3, [r2]	@ movhi
+	ldr	r3, .L2895+72
+	ldrh	r2, [r5]
+	ldr	r3, [r3]
+	ldrh	r2, [r3, r2, lsl #1]
+	ldr	r3, .L2895+84
+	strh	r2, [r3]	@ movhi
+.L2820:
+	ldr	r2, .L2895+88
+	ldrh	r3, [r5]
+	ldrh	r2, [r2]
+	cmp	r2, r3
+	beq	.L2826
+	ldr	r2, .L2895+92
+	ldrh	r2, [r2]
+	cmp	r2, r3
+	beq	.L2826
+	ldr	r5, .L2895+68
+	mov	r6, r5
+.L2827:
+	ldrh	r2, [r5]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L2828
+	ldr	r10, .L2895+100
+	movs	r2, #0
+	ldr	r3, .L2895+60
+	mov	r7, r10
+	str	r2, [r3]
+.L2829:
+	ldrh	r8, [r10]
+	mov	r0, r8
+	bl	List_get_gc_head_node
+	uxth	fp, r0
+	movw	r3, #65535
+	cmp	fp, r3
+	strh	fp, [r6]	@ movhi
+	bne	.L2830
+	movs	r3, #0
+	movs	r0, #8
+	strh	r3, [r10]	@ movhi
+	b	.L2805
+.L2860:
+	movs	r4, #1
+	b	.L2808
+.L2826:
+	movw	r3, #65535
+	strh	r3, [r5]	@ movhi
+.L2893:
+	ldr	r3, .L2895+44
+	ldrh	r0, [r3]
+	b	.L2805
+.L2830:
+	str	r0, [sp, #8]
+	mov	r0, fp
+	bl	IsBlkInGcList
+	add	r3, r8, #1
+	ldr	r2, [sp, #8]
+	cbz	r0, .L2831
+	strh	r3, [r10]	@ movhi
+	b	.L2829
+.L2831:
+	ldr	r1, .L2895+32
+	uxth	r3, r3
+	ldr	lr, .L2895+104
+	uxth	r2, r2
+	ldr	r8, .L2895+72
+	ldrh	r1, [r1]
+	ldrh	lr, [lr]
+	ldr	r0, [r8]
+	strh	r3, [r10]	@ movhi
+	mul	r1, lr, r1
+	ldrh	ip, [r0, r2, lsl #1]
+	cmp	ip, r1, asr #1
+	bgt	.L2833
+	cmp	r3, #48
+	bls	.L2834
+	cmp	ip, #8
+	bls	.L2834
+	ldr	r3, .L2895+96
+	ldrh	r3, [r3]
+	cmp	r3, #35
+	bhi	.L2834
+.L2833:
+	movs	r3, #0
+	strh	r3, [r7]	@ movhi
+.L2834:
+	ldrh	r3, [r0, r2, lsl #1]
+	cmp	r1, r3
+	bgt	.L2835
+	movw	r3, #65535
+	strh	r3, [r6]	@ movhi
+	movs	r3, #0
+	strh	r3, [r7]	@ movhi
+	b	.L2893
+.L2835:
+	cmp	r3, #0
+	bne	.L2836
+	movw	r0, #65535
+	bl	decrement_vpc_count
+	ldrh	r3, [r7]
+	adds	r3, r3, #1
+	strh	r3, [r7]	@ movhi
+	b	.L2829
+.L2896:
 	.align	2
-	.set	.LANCHOR102,. + 0
-	.type	g_gc_num_req, %object
-	.size	g_gc_num_req, 4
-g_gc_num_req:
-	.space	4
-	.section	.bss.g_gc_page_offset,"aw",%nobits
-	.align	1
-	.set	.LANCHOR111,. + 0
-	.type	g_gc_page_offset, %object
-	.size	g_gc_page_offset, 2
-g_gc_page_offset:
-	.space	2
-	.section	.bss.g_gc_refresh_block_temp_num,"aw",%nobits
-	.align	1
-	.set	.LANCHOR176,. + 0
-	.type	g_gc_refresh_block_temp_num, %object
-	.size	g_gc_refresh_block_temp_num, 2
-g_gc_refresh_block_temp_num:
-	.space	2
-	.section	.bss.g_gc_refresh_block_temp_tbl,"aw",%nobits
-	.align	1
-	.type	g_gc_refresh_block_temp_tbl, %object
-	.size	g_gc_refresh_block_temp_tbl, 34
-g_gc_refresh_block_temp_tbl:
-	.space	34
-	.section	.bss.g_gc_skip_write_count,"aw",%nobits
-	.align	2
-	.set	.LANCHOR172,. + 0
-	.type	g_gc_skip_write_count, %object
-	.size	g_gc_skip_write_count, 4
-g_gc_skip_write_count:
-	.space	4
-	.section	.bss.g_gc_superblock,"aw",%nobits
-	.align	2
-	.set	.LANCHOR201,. + 0
-	.type	g_gc_superblock, %object
-	.size	g_gc_superblock, 48
-g_gc_superblock:
-	.space	48
-	.section	.bss.g_gc_temp_superblock,"aw",%nobits
-	.align	2
-	.set	.LANCHOR93,. + 0
-	.type	g_gc_temp_superblock, %object
-	.size	g_gc_temp_superblock, 48
-g_gc_temp_superblock:
-	.space	48
-	.section	.bss.g_in_gc_progress,"aw",%nobits
+.L2895:
+	.word	.LANCHOR77
+	.word	.LANCHOR171
+	.word	.LANCHOR86
+	.word	.LANCHOR114
+	.word	.LANCHOR113
+	.word	.LANCHOR115
+	.word	.LANCHOR116
+	.word	.LANCHOR89
+	.word	.LANCHOR53
+	.word	.LANCHOR176
+	.word	.LANCHOR94
+	.word	.LANCHOR240
+	.word	.LANCHOR73
+	.word	.LANCHOR101
+	.word	.LANCHOR223
+	.word	.LANCHOR172
+	.word	.LANCHOR117
+	.word	.LANCHOR204
+	.word	.LANCHOR84
+	.word	.LANCHOR8
+	.word	.LANCHOR241
+	.word	.LANCHOR242
+	.word	.LANCHOR92
+	.word	.LANCHOR93
+	.word	.LANCHOR110
+	.word	.LANCHOR178
+	.word	.LANCHOR38
+.L2836:
+	movs	r3, #0
+	strb	r3, [r6, #8]
+	ldr	r3, .L2897
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2837
+	mov	r0, fp
+	bl	ftl_get_blk_mode
+	strb	r0, [r6, #8]
+.L2837:
+	ldr	r3, .L2897+4
+	ldrh	r3, [r3]
+	cmp	r3, fp
+	bne	.L2838
+	ldr	r1, .L2897+8
+	movw	r2, #851
+	ldr	r0, .L2897+12
+	bl	printf
+	ldr	r1, .L2897+16
+	ldr	r0, .L2897+20
+	bl	printf
+.L2838:
+	ldr	r3, .L2897+24
+	ldrh	r2, [r6]
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bne	.L2839
+	ldr	r1, .L2897+8
+	mov	r2, #852
+	ldr	r0, .L2897+12
+	bl	printf
+	ldr	r1, .L2897+16
+	ldr	r0, .L2897+20
+	bl	printf
+.L2839:
+	ldr	r3, .L2897+28
+	ldrh	r2, [r6]
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bne	.L2840
+	ldr	r1, .L2897+8
+	movw	r2, #853
+	ldr	r0, .L2897+12
+	bl	printf
+	ldr	r1, .L2897+16
+	ldr	r0, .L2897+20
+	bl	printf
+.L2840:
+	mov	r0, r5
+	bl	make_superblock
+	ldr	r2, .L2897+32
+	movs	r3, #0
+	ldrh	r1, [r6]
+	strh	r3, [r2]	@ movhi
+	ldr	r2, [r8]
+	ldrh	r1, [r2, r1, lsl #1]
+	ldr	r2, .L2897+36
+	strh	r3, [r6, #2]	@ movhi
+	strb	r3, [r6, #6]
+	strh	r1, [r2]	@ movhi
+.L2828:
+	ldr	r3, .L2897+40
+	movs	r2, #1
+	str	r2, [r3]
+	ldr	r3, .L2897+44
+	ldrh	r3, [r3]
+	str	r3, [sp, #12]
+	ldr	r3, .L2897
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2841
+	ldrb	r3, [r6, #8]	@ zero_extendqisi2
+	cmp	r3, r2
+	ittt	eq
+	ldreq	r3, .L2897+48
+	ldrheq	r3, [r3]
+	streq	r3, [sp, #12]
+.L2841:
+	ldrh	r3, [r6, #2]
+	ldr	r1, [sp, #12]
+	ldr	fp, .L2897+84
+	adds	r2, r3, r4
+	cmp	r2, r1
+	itt	gt
+	movgt	r2, r1
+	subgt	r4, r2, r3
+	mov	r3, #0
+	it	gt
+	uxthgt	r4, r4
+	str	r3, [sp, #20]
+.L2843:
+	ldrh	r3, [sp, #20]
+	cmp	r4, r3
+	bls	.L2851
+	ldr	r3, .L2897+52
+	movw	r8, #65535
+	ldrh	lr, [r5, #2]
+	mov	r10, #36
+	ldr	r0, [fp]
+	ldrh	r7, [r3]
+	ldr	r3, [sp, #20]
+	add	lr, lr, r3
+	ldr	r3, .L2897+56
+	str	r3, [sp, #16]
+	movs	r3, #0
+	str	r3, [sp, #8]
+	b	.L2852
+.L2845:
+	ldr	r1, [sp, #16]
+	ldrh	r2, [r1, #2]!
+	cmp	r2, r8
+	str	r1, [sp, #16]
+	beq	.L2844
+	ldr	r1, [sp, #8]
+	orr	r2, lr, r2, lsl #10
+	mla	ip, r10, r1, r0
+	str	r2, [ip, #4]
+	mov	r2, r1
+	adds	r2, r2, #1
+	uxth	r2, r2
+	str	r2, [sp, #8]
+.L2844:
+	adds	r3, r3, #1
+.L2852:
+	uxth	r2, r3
+	cmp	r2, r7
+	bcc	.L2845
+	ldrb	r2, [r5, #8]	@ zero_extendqisi2
+	ldr	r1, [sp, #8]
+	bl	FlashReadPages
+	movs	r3, #0
+.L2892:
+	str	r3, [sp, #16]
+	ldr	r2, [sp, #8]
+	ldrh	r3, [sp, #16]
+	cmp	r2, r3
+	bhi	.L2850
+	ldr	r3, [sp, #20]
+	adds	r3, r3, #1
+	str	r3, [sp, #20]
+	b	.L2843
+.L2850:
+	ldr	r3, [sp, #16]
+	movs	r7, #36
+	muls	r7, r3, r7
+	ldr	r3, [fp]
+	adds	r2, r3, r7
+	ldr	r3, [r3, r7]
+	adds	r3, r3, #1
+	beq	.L2847
+	ldr	r8, [r2, #12]
+	movw	r3, #61589
+	ldrh	r2, [r8]
+	cmp	r2, r3
+	bne	.L2847
+	ldr	r10, [r8, #8]
+	cmp	r10, #-1
+	bne	.L2848
+	ldr	r1, .L2897+8
+	mov	r2, #892
+	ldr	r0, .L2897+12
+	bl	printf
+	ldr	r1, .L2897+16
+	ldr	r0, .L2897+20
+	bl	printf
+.L2848:
+	movs	r2, #0
+	add	r1, sp, #36
+	mov	r0, r10
+	bl	log2phys
+	ldr	r0, [fp]
+	ldr	r3, [sp, #36]
+	add	r0, r0, r7
+	ldr	r2, [r0, #4]
+	bic	r3, r3, #-2147483648
+	cmp	r3, r2
+	bne	.L2847
+	ldr	r2, .L2897+32
+	ldr	r1, .L2897+60
+	ldr	r10, .L2897+68
+	ldrh	r3, [r2]
+	str	r1, [sp, #28]
+	adds	r3, r3, #1
+	strh	r3, [r2]	@ movhi
+	ldr	r2, [r1]
+	movs	r1, #36
+	ldr	r3, [r10]
+	mla	r3, r1, r3, r2
+	ldr	r2, [r0, #16]
+	str	r2, [r3, #16]
+	str	r3, [sp, #24]
+	bl	Ftl_get_new_temp_ppa
+	ldr	r3, [sp, #24]
+	ldr	r1, [sp, #28]
+	str	r0, [r3, #4]
+	ldr	r2, [r1]
+	movs	r1, #36
+	ldr	r3, [r10]
+	ldr	r0, [fp]
+	mla	r2, r1, r3, r2
+	add	r0, r0, r7
+	ldr	r7, .L2897+28
+	ldr	r1, [r0, #8]
+	adds	r3, r3, #1
+	str	r1, [r2, #8]
+	ldr	r1, [r0, #12]
+	str	r1, [r2, #12]
+	movs	r1, #1
+	ldr	r2, [sp, #36]
+	str	r2, [r8, #12]
+	ldrh	r2, [r7]
+	strh	r2, [r8, #2]	@ movhi
+	ldr	r2, .L2897+64
+	str	r3, [r10]
+	ldr	r2, [r2]
+	str	r2, [r8, #4]
+	bl	FtlGcBufAlloc
+	ldr	r3, .L2897
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L2849
+	ldrb	r2, [r7, #7]	@ zero_extendqisi2
+	ldr	r3, [r10]
+	cmp	r2, r3
+	beq	.L2849
+	ldrh	r3, [r7, #4]
+	cbnz	r3, .L2847
+.L2849:
+	bl	Ftl_gc_temp_data_write_back
+	cbz	r0, .L2847
+.L2894:
+	ldr	r3, .L2897+40
+	movs	r2, #0
+	str	r2, [r3]
+	b	.L2893
+.L2847:
+	ldr	r3, [sp, #16]
+	adds	r3, r3, #1
+	b	.L2892
+.L2851:
+	ldrh	r3, [r5, #2]
+	add	r4, r4, r3
+	ldr	r3, [sp, #12]
+	uxth	r4, r4
+	cmp	r3, r4
+	strh	r4, [r5, #2]	@ movhi
+	bhi	.L2853
+	ldr	r3, .L2897+68
+	ldr	r3, [r3]
+	cbz	r3, .L2854
+	bl	Ftl_gc_temp_data_write_back
+	cmp	r0, #0
+	bne	.L2894
+.L2854:
+	ldr	r3, .L2897+32
+	ldrh	r4, [r3]
+	cbnz	r4, .L2855
+	ldr	r7, .L2897+72
+	ldrh	r1, [r5]
+	ldr	r3, [r7]
+	ldrh	r3, [r3, r1, lsl #1]
+	cbz	r3, .L2855
+	ldr	r0, .L2897+36
+	ldrh	r2, [r5, #2]
+	ldrh	r0, [r0]
+	str	r3, [sp]
+	mov	r3, r4
+	str	r0, [sp, #4]
+	ldr	r0, .L2897+76
+	bl	printf
+	ldrh	r2, [r5]
+	ldr	r3, [r7]
+	strh	r4, [r3, r2, lsl #1]	@ movhi
+	ldrh	r0, [r5]
+	bl	update_vpc_list
+	bl	FtlCacheWriteBack
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+.L2855:
+	movw	r3, #65535
+	strh	r3, [r5]	@ movhi
+.L2853:
+	ldr	r3, .L2897+80
+	ldrh	r0, [r3]
+	cmp	r0, #2
+	bhi	.L2856
+	ldr	r3, .L2897+44
+	ldrh	r4, [r3]
+	b	.L2827
+.L2856:
+	ldr	r3, .L2897+40
+	movs	r2, #0
+	adds	r0, r0, #1
+	str	r2, [r3]
+	b	.L2805
+.L2898:
 	.align	2
-	.set	.LANCHOR168,. + 0
-	.type	g_in_gc_progress, %object
-	.size	g_in_gc_progress, 4
-g_in_gc_progress:
-	.space	4
-	.section	.bss.g_in_swl_replace,"aw",%nobits
-	.align	2
-	.set	.LANCHOR169,. + 0
-	.type	g_in_swl_replace, %object
-	.size	g_in_swl_replace, 4
-g_in_swl_replace:
-	.space	4
-	.section	.bss.g_inkDie_check_enable,"aw",%nobits
-	.align	2
-	.set	.LANCHOR28,. + 0
-	.type	g_inkDie_check_enable, %object
-	.size	g_inkDie_check_enable, 4
-g_inkDie_check_enable:
-	.space	4
-	.section	.bss.g_l2p_last_update_region_id,"aw",%nobits
+.L2897:
+	.word	.LANCHOR8
+	.word	.LANCHOR92
+	.word	.LANCHOR243
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LANCHOR93
+	.word	.LANCHOR94
+	.word	.LANCHOR241
+	.word	.LANCHOR242
+	.word	.LANCHOR171
+	.word	.LANCHOR53
+	.word	.LANCHOR54
+	.word	.LANCHOR38
+	.word	.LANCHOR204+14
+	.word	.LANCHOR181
+	.word	.LANCHOR160
+	.word	.LANCHOR103
+	.word	.LANCHOR84
+	.word	.LC66
+	.word	.LANCHOR89
+	.word	.LANCHOR107
+.L2857:
+	movs	r0, #0
+	b	.L2805
+.L2859:
+	mov	r0, r3
+	b	.L2805
+	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
+	.section	.text.FtlInit,"ax",%progbits
 	.align	1
-	.set	.LANCHOR97,. + 0
-	.type	g_l2p_last_update_region_id, %object
-	.size	g_l2p_last_update_region_id, 2
-g_l2p_last_update_region_id:
-	.space	2
-	.section	.bss.g_maxRegNum,"aw",%nobits
-	.set	.LANCHOR13,. + 0
-	.type	g_maxRegNum, %object
-	.size	g_maxRegNum, 1
-g_maxRegNum:
-	.space	1
-	.section	.bss.g_maxRetryCount,"aw",%nobits
-	.set	.LANCHOR148,. + 0
-	.type	g_maxRetryCount, %object
-	.size	g_maxRetryCount, 1
-g_maxRetryCount:
-	.space	1
-	.section	.bss.g_max_erase_count,"aw",%nobits
-	.align	2
-	.set	.LANCHOR166,. + 0
-	.type	g_max_erase_count, %object
-	.size	g_max_erase_count, 4
-g_max_erase_count:
-	.space	4
-	.section	.bss.g_min_erase_count,"aw",%nobits
-	.align	2
-	.set	.LANCHOR167,. + 0
-	.type	g_min_erase_count, %object
-	.size	g_min_erase_count, 4
-g_min_erase_count:
-	.space	4
-	.section	.bss.g_nandc_version_data,"aw",%nobits
+	.global	FtlInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlInit, %function
+FtlInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	mov	r3, #-1
+	ldr	r4, .L2908
+	mov	r5, r0
+	ldr	r2, .L2908+4
+	str	r3, [r4]
+	movs	r3, #0
+	ldr	r1, .L2908+8
+	str	r3, [r2]
+	ldr	r2, .L2908+12
+	ldr	r0, .L2908+16
+	str	r3, [r2]
+	bl	printf
+	mov	r0, r5
+	bl	FtlConstantsInit
+	bl	FtlMemInit
+	bl	FtlVariablesInit
+	ldr	r3, .L2908+20
+	ldrh	r0, [r3]
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlLoadBbt
+	cbz	r0, .L2900
+	ldr	r1, .L2908+24
+	ldr	r0, .L2908+28
+.L2907:
+	bl	printf
+.L2901:
+	movs	r0, #0
+	pop	{r3, r4, r5, pc}
+.L2900:
+	bl	FtlSysBlkInit
+	cbz	r0, .L2902
+	ldr	r1, .L2908+24
+	ldr	r0, .L2908+32
+	b	.L2907
+.L2902:
+	movs	r1, #1
+	str	r1, [r4]
+	bl	rk_ftl_garbage_collect
+	ldr	r3, .L2908+36
+	ldrh	r3, [r3]
+	cmp	r3, #15
+	bhi	.L2901
+	mov	r4, #1024
+.L2904:
+	movs	r1, #1
+	mov	r0, r1
+	bl	rk_ftl_garbage_collect
+	subs	r4, r4, #1
+	bne	.L2904
+	b	.L2901
+.L2909:
 	.align	2
-	.set	.LANCHOR151,. + 0
-	.type	g_nandc_version_data, %object
-	.size	g_nandc_version_data, 4
-g_nandc_version_data:
-	.space	4
-	.section	.bss.g_num_data_superblocks,"aw",%nobits
-	.align	1
-	.set	.LANCHOR85,. + 0
-	.type	g_num_data_superblocks, %object
-	.size	g_num_data_superblocks, 2
-g_num_data_superblocks:
-	.space	2
-	.section	.bss.g_num_free_superblocks,"aw",%nobits
-	.align	1
-	.set	.LANCHOR88,. + 0
-	.type	g_num_free_superblocks, %object
-	.size	g_num_free_superblocks, 2
-g_num_free_superblocks:
-	.space	2
-	.section	.bss.g_page_map_check_enable,"aw",%nobits
-	.align	1
-	.set	.LANCHOR69,. + 0
-	.type	g_page_map_check_enable, %object
-	.size	g_page_map_check_enable, 2
-g_page_map_check_enable:
-	.space	2
-	.section	.bss.g_power_lost_ecc_error_blk,"aw",%nobits
-	.align	1
-	.set	.LANCHOR229,. + 0
-	.type	g_power_lost_ecc_error_blk, %object
-	.size	g_power_lost_ecc_error_blk, 2
-g_power_lost_ecc_error_blk:
-	.space	2
-	.section	.bss.g_power_lost_recovery_flag,"aw",%nobits
+.L2908:
+	.word	.LANCHOR231
+	.word	.LANCHOR244
+	.word	.LC67
+	.word	.LANCHOR77
+	.word	.LC7
+	.word	.LANCHOR39
+	.word	.LANCHOR245
+	.word	.LC68
+	.word	.LC69
+	.word	.LANCHOR89
+	.size	FtlInit, .-FtlInit
+	.section	.text.rk_ftl_init,"ax",%progbits
 	.align	1
-	.set	.LANCHOR230,. + 0
-	.type	g_power_lost_recovery_flag, %object
-	.size	g_power_lost_recovery_flag, 2
-g_power_lost_recovery_flag:
-	.space	2
-	.section	.bss.g_recovery_page_min_ver,"aw",%nobits
-	.align	2
-	.set	.LANCHOR133,. + 0
-	.type	g_recovery_page_min_ver, %object
-	.size	g_recovery_page_min_ver, 4
-g_recovery_page_min_ver:
-	.space	4
-	.section	.bss.g_recovery_page_num,"aw",%nobits
-	.align	2
-	.set	.LANCHOR231,. + 0
-	.type	g_recovery_page_num, %object
-	.size	g_recovery_page_num, 4
-g_recovery_page_num:
-	.space	4
-	.section	.bss.g_recovery_ppa_tbl,"aw",%nobits
-	.align	2
-	.set	.LANCHOR232,. + 0
-	.type	g_recovery_ppa_tbl, %object
-	.size	g_recovery_ppa_tbl, 128
-g_recovery_ppa_tbl:
-	.space	128
-	.section	.bss.g_req_cache,"aw",%nobits
-	.align	2
-	.set	.LANCHOR129,. + 0
-	.type	g_req_cache, %object
-	.size	g_req_cache, 4
-g_req_cache:
-	.space	4
-	.section	.bss.g_retryMode,"aw",%nobits
-	.set	.LANCHOR10,. + 0
-	.type	g_retryMode, %object
-	.size	g_retryMode, 1
-g_retryMode:
-	.space	1
-	.section	.bss.g_slc2KBNand,"aw",%nobits
-	.set	.LANCHOR1,. + 0
-	.type	g_slc2KBNand, %object
-	.size	g_slc2KBNand, 1
-g_slc2KBNand:
-	.space	1
-	.section	.bss.g_sys_ext_data,"aw",%nobits
-	.align	2
-	.set	.LANCHOR135,. + 0
-	.type	g_sys_ext_data, %object
-	.size	g_sys_ext_data, 512
-g_sys_ext_data:
-	.space	512
-	.section	.bss.g_sys_save_data,"aw",%nobits
+	.global	rk_ftl_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_ftl_init, %function
+rk_ftl_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, lr}
+	bl	FlashInit
+	mov	r4, r0
+	cbnz	r0, .L2911
+	ldr	r0, .L2912
+	bl	FtlInit
+.L2911:
+	bl	idb_init
+	mov	r1, r4
+	ldr	r0, .L2912+4
+	bl	printf
+	mov	r0, r4
+	pop	{r4, pc}
+.L2913:
 	.align	2
-	.set	.LANCHOR80,. + 0
-	.type	g_sys_save_data, %object
-	.size	g_sys_save_data, 48
-g_sys_save_data:
-	.space	48
-	.section	.bss.g_tmp_data_superblock_id,"aw",%nobits
+.L2912:
+	.word	.LANCHOR15
+	.word	.LC70
+	.size	rk_ftl_init, .-rk_ftl_init
+	.section	.text.ftl_fix_nand_power_lost_error,"ax",%progbits
 	.align	1
-	.set	.LANCHOR130,. + 0
-	.type	g_tmp_data_superblock_id, %object
-	.size	g_tmp_data_superblock_id, 2
-g_tmp_data_superblock_id:
-	.space	2
-	.section	.bss.g_totle_avg_erase_count,"aw",%nobits
-	.align	2
-	.set	.LANCHOR202,. + 0
-	.type	g_totle_avg_erase_count, %object
-	.size	g_totle_avg_erase_count, 4
-g_totle_avg_erase_count:
-	.space	4
-	.section	.bss.g_totle_cache_write_count,"aw",%nobits
-	.align	2
-	.set	.LANCHOR161,. + 0
-	.type	g_totle_cache_write_count, %object
-	.size	g_totle_cache_write_count, 4
-g_totle_cache_write_count:
-	.space	4
-	.section	.bss.g_totle_discard_page_count,"aw",%nobits
-	.align	2
-	.set	.LANCHOR160,. + 0
-	.type	g_totle_discard_page_count, %object
-	.size	g_totle_discard_page_count, 4
-g_totle_discard_page_count:
-	.space	4
-	.section	.bss.g_totle_gc_page_count,"aw",%nobits
-	.align	2
-	.set	.LANCHOR158,. + 0
-	.type	g_totle_gc_page_count, %object
-	.size	g_totle_gc_page_count, 4
-g_totle_gc_page_count:
-	.space	4
-	.section	.bss.g_totle_l2p_write_count,"aw",%nobits
-	.align	2
-	.set	.LANCHOR162,. + 0
-	.type	g_totle_l2p_write_count, %object
-	.size	g_totle_l2p_write_count, 4
-g_totle_l2p_write_count:
-	.space	4
-	.section	.bss.g_totle_map_block,"aw",%nobits
-	.align	1
-	.set	.LANCHOR125,. + 0
-	.type	g_totle_map_block, %object
-	.size	g_totle_map_block, 2
-g_totle_map_block:
-	.space	2
-	.section	.bss.g_totle_mlc_erase_count,"aw",%nobits
-	.align	2
-	.set	.LANCHOR164,. + 0
-	.type	g_totle_mlc_erase_count, %object
-	.size	g_totle_mlc_erase_count, 4
-g_totle_mlc_erase_count:
-	.space	4
-	.section	.bss.g_totle_read_page_count,"aw",%nobits
-	.align	2
-	.set	.LANCHOR163,. + 0
-	.type	g_totle_read_page_count, %object
-	.size	g_totle_read_page_count, 4
-g_totle_read_page_count:
-	.space	4
-	.section	.bss.g_totle_read_sector,"aw",%nobits
-	.align	2
-	.set	.LANCHOR217,. + 0
-	.type	g_totle_read_sector, %object
-	.size	g_totle_read_sector, 4
-g_totle_read_sector:
-	.space	4
-	.section	.bss.g_totle_slc_erase_count,"aw",%nobits
-	.align	2
-	.set	.LANCHOR165,. + 0
-	.type	g_totle_slc_erase_count, %object
-	.size	g_totle_slc_erase_count, 4
-g_totle_slc_erase_count:
-	.space	4
-	.section	.bss.g_totle_swl_count,"aw",%nobits
-	.align	2
-	.set	.LANCHOR131,. + 0
-	.type	g_totle_swl_count, %object
-	.size	g_totle_swl_count, 4
-g_totle_swl_count:
-	.space	4
-	.section	.bss.g_totle_sys_slc_erase_count,"aw",%nobits
-	.align	2
-	.set	.LANCHOR79,. + 0
-	.type	g_totle_sys_slc_erase_count, %object
-	.size	g_totle_sys_slc_erase_count, 4
-g_totle_sys_slc_erase_count:
-	.space	4
-	.section	.bss.g_totle_vendor_block,"aw",%nobits
-	.align	1
-	.set	.LANCHOR70,. + 0
-	.type	g_totle_vendor_block, %object
-	.size	g_totle_vendor_block, 2
-g_totle_vendor_block:
-	.space	2
-	.section	.bss.g_totle_write_page_count,"aw",%nobits
-	.align	2
-	.set	.LANCHOR159,. + 0
-	.type	g_totle_write_page_count, %object
-	.size	g_totle_write_page_count, 4
-g_totle_write_page_count:
-	.space	4
-	.section	.bss.g_totle_write_sector,"aw",%nobits
-	.align	2
-	.set	.LANCHOR216,. + 0
-	.type	g_totle_write_sector, %object
-	.size	g_totle_write_sector, 4
-g_totle_write_sector:
-	.space	4
-	.section	.bss.gc_discard_updated,"aw",%nobits
+	.global	ftl_fix_nand_power_lost_error
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_fix_nand_power_lost_error, %function
+ftl_fix_nand_power_lost_error:
+	@ args = 0, pretend = 0, frame = 56
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2928
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #56
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L2914
+	ldr	r7, .L2928+4
+	ldr	r6, .L2928+8
+	ldr	r10, .L2928+32
+	ldrh	r5, [r7]
+	ldr	r3, [r6]
+	ldr	r4, .L2928+12
+	mov	r1, r5
+	ldr	r0, .L2928+16
+	ldrh	r2, [r3, r5, lsl #1]
+	lsl	r8, r5, #1
+	bl	printf
+	ldrh	r0, [r10]
+	bl	FtlGcRefreshBlock
+	ldrh	r0, [r4]
+	bl	FtlGcRefreshBlock
+	mov	r0, r10
+	bl	allocate_new_data_superblock
+	mov	r0, r4
+	movw	r4, #4097
+	bl	allocate_new_data_superblock
+	str	r7, [sp, #4]
+.L2916:
+	subs	r4, r4, #1
+	beq	.L2920
+	movs	r1, #1
+	mov	r0, r1
+	bl	rk_ftl_garbage_collect
+	ldr	r3, [r6]
+	ldrh	r3, [r3, r8]
+	cmp	r3, #0
+	bne	.L2916
+.L2920:
+	ldr	r3, [r6]
+	mov	r1, r5
+	ldr	r0, .L2928+16
+	ldrh	r2, [r3, r5, lsl #1]
+	bl	printf
+	ldr	r3, [r6]
+	ldrh	r4, [r3, r5, lsl #1]
+	cbnz	r4, .L2918
+	add	r0, sp, #56
+	ldr	r7, .L2928+20
+	strh	r5, [r0, #-48]!	@ movhi
+	movw	r10, #65535
+	bl	make_superblock
+	ldr	r3, .L2928+24
+	add	r0, sp, #22
+	ldr	r8, [r7]
+	mov	r2, r4
+	mov	fp, #36
+	mov	ip, r4
+	ldrh	lr, [r3]
+.L2921:
+	uxth	r3, r2
+	cmp	lr, r3
+	bhi	.L2923
+	ldr	r3, [r6]
+	mov	r1, r5
+	ldr	r0, .L2928+28
+	ldrh	r2, [r3, r5, lsl #1]
+	bl	printf
+	mov	r2, r4
+	movs	r1, #0
+	ldr	r0, [r7]
+	bl	FlashEraseBlocks
+	mov	r2, r4
+	movs	r1, #1
+	ldr	r0, [r7]
+	bl	FlashEraseBlocks
+.L2918:
+	ldr	r2, [sp, #4]
+	movw	r3, #65535
+	strh	r3, [r2]	@ movhi
+.L2914:
+	add	sp, sp, #56
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2923:
+	ldrh	r3, [r0, #2]!
+	cmp	r3, r10
+	beq	.L2922
+	mla	r1, fp, r4, r8
+	adds	r4, r4, #1
+	lsls	r3, r3, #10
+	uxth	r4, r4
+	str	r3, [r1, #4]
+	str	ip, [r1, #8]
+	str	ip, [r1, #12]
+.L2922:
+	adds	r2, r2, #1
+	b	.L2921
+.L2929:
 	.align	2
-	.set	.LANCHOR222,. + 0
-	.type	gc_discard_updated, %object
-	.size	gc_discard_updated, 4
-gc_discard_updated:
-	.space	4
-	.section	.bss.gc_ink_free_return_value,"aw",%nobits
+.L2928:
+	.word	.LANCHOR8
+	.word	.LANCHOR235
+	.word	.LANCHOR84
+	.word	.LANCHOR93
+	.word	.LC71
+	.word	.LANCHOR78
+	.word	.LANCHOR38
+	.word	.LC72
+	.word	.LANCHOR92
+	.size	ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error
+	.section	.text.ftl_read,"ax",%progbits
 	.align	1
-	.set	.LANCHOR235,. + 0
-	.type	gc_ink_free_return_value, %object
-	.size	gc_ink_free_return_value, 2
-gc_ink_free_return_value:
-	.space	2
-	.section	.bss.gpFlashSaveInfo,"aw",%nobits
-	.align	2
-	.set	.LANCHOR143,. + 0
-	.type	gpFlashSaveInfo, %object
-	.size	gpFlashSaveInfo, 4
-gpFlashSaveInfo:
-	.space	4
-	.section	.bss.gpNandParaInfo,"aw",%nobits
-	.align	2
-	.set	.LANCHOR18,. + 0
-	.type	gpNandParaInfo, %object
-	.size	gpNandParaInfo, 4
-gpNandParaInfo:
-	.space	4
-	.section	.bss.gpNandc,"aw",%nobits
-	.align	2
-	.set	.LANCHOR19,. + 0
-	.type	gpNandc, %object
-	.size	gpNandc, 4
-gpNandc:
-	.space	4
-	.section	.bss.gpNandc1,"aw",%nobits
-	.align	2
-	.type	gpNandc1, %object
-	.size	gpNandc1, 4
-gpNandc1:
-	.space	4
-	.section	.bss.gpReadRetrial,"aw",%nobits
-	.align	2
-	.set	.LANCHOR142,. + 0
-	.type	gpReadRetrial, %object
-	.size	gpReadRetrial, 4
-gpReadRetrial:
-	.space	4
-	.section	.bss.gp_ect_tbl_info,"aw",%nobits
-	.align	2
-	.set	.LANCHOR188,. + 0
-	.type	gp_ect_tbl_info, %object
-	.size	gp_ect_tbl_info, 4
-gp_ect_tbl_info:
-	.space	4
-	.section	.bss.gp_gc_page_buf_info,"aw",%nobits
-	.align	2
-	.set	.LANCHOR103,. + 0
-	.type	gp_gc_page_buf_info, %object
-	.size	gp_gc_page_buf_info, 4
-gp_gc_page_buf_info:
-	.space	4
-	.section	.bss.gp_last_act_superblock,"aw",%nobits
-	.align	2
-	.set	.LANCHOR221,. + 0
-	.type	gp_last_act_superblock, %object
-	.size	gp_last_act_superblock, 4
-gp_last_act_superblock:
-	.space	4
-	.section	.bss.mlcPageToSlcPageTbl,"aw",%nobits
-	.align	2
-	.set	.LANCHOR117,. + 0
-	.type	mlcPageToSlcPageTbl, %object
-	.size	mlcPageToSlcPageTbl, 1024
-mlcPageToSlcPageTbl:
-	.space	1024
-	.section	.bss.p_blk_mode_table,"aw",%nobits
-	.align	2
-	.set	.LANCHOR0,. + 0
-	.type	p_blk_mode_table, %object
-	.size	p_blk_mode_table, 4
-p_blk_mode_table:
-	.space	4
-	.section	.bss.p_data_block_list_head,"aw",%nobits
-	.align	2
-	.set	.LANCHOR82,. + 0
-	.type	p_data_block_list_head, %object
-	.size	p_data_block_list_head, 4
-p_data_block_list_head:
-	.space	4
-	.section	.bss.p_data_block_list_table,"aw",%nobits
-	.align	2
-	.set	.LANCHOR81,. + 0
-	.type	p_data_block_list_table, %object
-	.size	p_data_block_list_table, 4
-p_data_block_list_table:
-	.space	4
-	.section	.bss.p_data_block_list_tail,"aw",%nobits
-	.align	2
-	.set	.LANCHOR84,. + 0
-	.type	p_data_block_list_tail, %object
-	.size	p_data_block_list_tail, 4
-p_data_block_list_tail:
-	.space	4
-	.section	.bss.p_erase_count_table,"aw",%nobits
-	.align	2
-	.set	.LANCHOR78,. + 0
-	.type	p_erase_count_table, %object
-	.size	p_erase_count_table, 4
-p_erase_count_table:
-	.space	4
-	.section	.bss.p_free_data_block_list_head,"aw",%nobits
-	.align	2
-	.set	.LANCHOR87,. + 0
-	.type	p_free_data_block_list_head, %object
-	.size	p_free_data_block_list_head, 4
-p_free_data_block_list_head:
-	.space	4
-	.section	.bss.p_gc_blk_tbl,"aw",%nobits
-	.align	2
-	.set	.LANCHOR108,. + 0
-	.type	p_gc_blk_tbl, %object
-	.size	p_gc_blk_tbl, 4
-p_gc_blk_tbl:
-	.space	4
-	.section	.bss.p_gc_data_buf,"aw",%nobits
-	.align	2
-	.set	.LANCHOR104,. + 0
-	.type	p_gc_data_buf, %object
-	.size	p_gc_data_buf, 4
-p_gc_data_buf:
-	.space	4
-	.section	.bss.p_gc_page_info,"aw",%nobits
-	.align	2
-	.set	.LANCHOR110,. + 0
-	.type	p_gc_page_info, %object
-	.size	p_gc_page_info, 4
-p_gc_page_info:
-	.space	4
-	.section	.bss.p_gc_spare_buf,"aw",%nobits
+	.global	ftl_read
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_read, %function
+ftl_read:
+	@ args = 0, pretend = 0, frame = 64
+	@ frame_needed = 0, uses_anonymous_args = 0
+	cmp	r0, #16
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #88
+	mov	r6, r1
+	mov	r7, r3
+	str	r2, [sp, #52]
+	bne	.L2931
+	mov	r2, r3
+	ldr	r1, [sp, #52]
+	add	r0, r6, #256
+	bl	FtlVendorPartRead
+	str	r0, [sp, #32]
+.L2930:
+	ldr	r0, [sp, #32]
+	add	sp, sp, #88
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2931:
+	ldr	r3, [sp, #52]
+	adds	r3, r1, r3
+	str	r3, [sp, #36]
+	ldr	r3, .L2969
+	ldr	r2, [sp, #36]
+	ldr	r3, [r3]
+	cmp	r2, r3
+	bhi	.L2954
+	ldr	r3, .L2969+4
+	ldr	r3, [r3]
+	adds	r4, r3, #1
+	beq	.L2955
+	bl	FtlCacheWriteBack
+	ldr	r3, .L2969+8
+	mov	r0, r6
+	ldr	r10, .L2969+52
+	ldrh	r4, [r3]
+	mov	r1, r4
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #36]
+	mov	r1, r4
+	str	r0, [sp, #40]
+	subs	r0, r3, #1
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #40]
+	ldr	r2, .L2969+12
+	ldr	r4, [sp, #40]
+	rsb	r3, r3, #1
+	str	r0, [sp, #44]
+	add	r3, r3, r0
+	str	r3, [sp, #28]
+	ldr	r1, [sp, #28]
+	ldr	r3, [r2]
+	add	r3, r3, r1
+	str	r3, [r2]
+	movs	r3, #0
+	mov	r5, r3
+	str	r3, [sp, #24]
+	str	r3, [sp, #48]
+	str	r3, [sp, #32]
+.L2933:
+	ldr	r3, [sp, #28]
+	cbnz	r3, .L2953
+	ldr	r3, .L2969+16
+	ldrh	r3, [r3]
+	cmp	r3, #0
+	beq	.L2930
+	movs	r1, #1
+	ldr	r0, [sp, #28]
+	bl	rk_ftl_garbage_collect
+	b	.L2930
+.L2953:
+	movs	r2, #0
+	add	r1, sp, #84
+	mov	r0, r4
+	bl	log2phys
+	ldr	r3, [sp, #84]
+	adds	r0, r3, #1
+	bne	.L2934
+	ldr	fp, .L2969+8
+	mov	r8, #0
+.L2935:
+	ldrh	r0, [fp]
+	cmp	r8, r0
+	bcc	.L2937
+.L2938:
+	ldr	r3, [sp, #28]
+	adds	r4, r4, #1
+	subs	r3, r3, #1
+	str	r3, [sp, #28]
+	beq	.L2942
+	ldr	r3, .L2969+20
+	ldrh	r3, [r3]
+	cmp	r5, r3, lsl #2
+	bne	.L2933
+.L2942:
+	cmp	r5, #0
+	beq	.L2933
+	movs	r2, #0
+	mov	r1, r5
+	ldr	r0, [r10]
+	mov	fp, #0
+	bl	FlashReadPages
+	ldr	r3, [sp, #24]
+	lsls	r3, r3, #9
+	str	r3, [sp, #68]
+	ldr	r3, [sp, #56]
+	lsls	r3, r3, #9
+	str	r3, [sp, #60]
+	ldr	r3, [sp, #48]
+	lsls	r3, r3, #9
+	str	r3, [sp, #64]
+.L2952:
+	mov	r8, #36
+	ldr	r3, [r10]
+	mul	r8, r8, fp
+	ldr	r1, [sp, #40]
+	add	r3, r3, r8
+	ldr	r2, [r3, #16]
+	cmp	r1, r2
+	bne	.L2944
+	ldr	r1, [r3, #8]
+	ldr	r3, .L2969+24
+	ldr	r3, [r3]
+	cmp	r1, r3
+	bne	.L2945
+	ldr	r3, [sp, #60]
+	mov	r0, r7
+	ldr	r2, [sp, #64]
+	add	r1, r1, r3
+.L2968:
+	bl	ftl_memcpy
+.L2945:
+	ldr	r2, [r10]
+	add	r2, r2, r8
+	ldr	r3, [r2, #12]
+	ldr	lr, [r2, #16]
+	ldr	r0, [r3, #8]
+	cmp	lr, r0
+	beq	.L2946
+	ldr	ip, .L2969+32
+	ldr	r0, [ip, #72]
+	adds	r0, r0, #1
+	str	r0, [ip, #72]
+	ldr	r0, [r2, #8]
+	ldr	r1, [r0, #4]
+	str	r1, [sp, #16]
+	mov	r1, lr
+	ldr	r0, [r0]
+	str	r0, [sp, #12]
+	ldr	r0, [r3, #12]
+	str	r0, [sp, #8]
+	ldr	r0, [r3, #8]
+	str	r0, [sp, #4]
+	ldr	r0, [r3, #4]
+	str	r0, [sp]
+	ldr	r0, .L2969+28
+	ldr	r3, [r3]
+	ldr	r2, [r2, #4]
+	bl	printf
+.L2946:
+	ldr	r3, [r10]
+	add	r2, r3, r8
+	ldr	r3, [r3, r8]
+	adds	r1, r3, #1
+	bne	.L2947
+	ldr	r1, .L2969+32
+	str	r3, [sp, #32]
+	ldr	r2, [r1, #72]
+	adds	r2, r2, #1
+	str	r2, [r1, #72]
+.L2948:
+	add	fp, fp, #1
+	cmp	r5, fp
+	bne	.L2952
+	movs	r5, #0
+	b	.L2933
+.L2937:
+	mla	r0, r0, r4, r8
+	cmp	r6, r0
+	bhi	.L2936
+	ldr	r3, [sp, #36]
+	cmp	r3, r0
+	bls	.L2936
+	subs	r0, r0, r6
+	mov	r2, #512
+	movs	r1, #0
+	add	r0, r7, r0, lsl #9
+	bl	ftl_memset
+.L2936:
+	add	r8, r8, #1
+	b	.L2935
+.L2934:
+	ldr	r2, [r10]
+	mov	r8, #36
+	mla	r8, r8, r5, r2
+	str	r3, [r8, #4]
+	ldr	r3, [sp, #40]
+	cmp	r4, r3
+	ldr	r3, .L2969+8
+	bne	.L2939
+	ldr	r2, .L2969+24
+	mov	r0, r6
+	ldrh	fp, [r3]
+	ldr	r2, [r2]
+	mov	r1, fp
+	str	r2, [r8, #8]
+	bl	__aeabi_uidivmod
+	ldr	r2, [sp, #52]
+	sub	r3, fp, r1
+	str	r1, [sp, #56]
+	cmp	r3, r2
+	it	cs
+	movcs	r3, r2
+	cmp	fp, r3
+	str	r3, [sp, #48]
+	bne	.L2940
+	str	r7, [r8, #8]
+.L2940:
+	ldr	r3, .L2969+36
+	ldr	r2, .L2969+40
+	str	r4, [r8, #16]
+	ldrh	r3, [r3]
+	ldr	r2, [r2]
+	muls	r3, r5, r3
+	adds	r5, r5, #1
+	bic	r3, r3, #3
+	add	r3, r3, r2
+	str	r3, [r8, #12]
+	b	.L2938
+.L2939:
+	ldr	r2, [sp, #44]
+	cmp	r4, r2
+	bne	.L2941
+	ldr	r2, .L2969+44
+	ldr	r1, [sp, #36]
+	ldr	r2, [r2]
+	str	r2, [r8, #8]
+	ldrh	r2, [r3]
+	mul	r3, r2, r4
+	subs	r1, r1, r3
+	cmp	r2, r1
+	str	r1, [sp, #24]
+	bne	.L2940
+.L2967:
+	subs	r3, r3, r6
+	add	r3, r7, r3, lsl #9
+	str	r3, [r8, #8]
+	b	.L2940
+.L2941:
+	ldrh	r3, [r3]
+	muls	r3, r4, r3
+	b	.L2967
+.L2944:
+	ldr	r1, [sp, #44]
+	cmp	r1, r2
+	bne	.L2945
+	ldr	r1, [r3, #8]
+	ldr	r3, .L2969+44
+	ldr	r3, [r3]
+	cmp	r1, r3
+	bne	.L2945
+	ldr	r3, .L2969+8
+	ldr	r2, [sp, #68]
+	ldrh	r0, [r3]
+	ldr	r3, [sp, #44]
+	muls	r0, r3, r0
+	subs	r0, r0, r6
+	add	r0, r7, r0, lsl #9
+	b	.L2968
+.L2947:
+	cmp	r3, #256
+	bne	.L2948
+	ldr	r0, [r2, #4]
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	mov	r8, r0
+	bl	FtlGcRefreshBlock
+	ldr	r2, .L2969+48
+	movw	r3, #2049
+.L2950:
+	subs	r3, r3, #1
+	bne	.L2949
+.L2951:
+	bl	FtlSysFlush
+	b	.L2948
+.L2949:
+	movs	r1, #1
+	str	r2, [sp, #76]
+	mov	r0, r1
+	str	r3, [sp, #72]
+	bl	rk_ftl_garbage_collect
+	ldr	r2, [sp, #76]
+	ldr	r3, [sp, #72]
+	ldrh	r1, [r2]
+	cmp	r1, r8
+	beq	.L2950
+	b	.L2951
+.L2954:
+	mov	r3, #-1
+.L2955:
+	str	r3, [sp, #32]
+	b	.L2930
+.L2970:
 	.align	2
-	.set	.LANCHOR105,. + 0
-	.type	p_gc_spare_buf, %object
-	.size	p_gc_spare_buf, 4
-p_gc_spare_buf:
-	.space	4
-	.section	.bss.p_io_data_buf_0,"aw",%nobits
-	.align	2
-	.set	.LANCHOR183,. + 0
-	.type	p_io_data_buf_0, %object
-	.size	p_io_data_buf_0, 4
-p_io_data_buf_0:
-	.space	4
-	.section	.bss.p_io_data_buf_1,"aw",%nobits
-	.align	2
-	.set	.LANCHOR184,. + 0
-	.type	p_io_data_buf_1, %object
-	.size	p_io_data_buf_1, 4
-p_io_data_buf_1:
-	.space	4
-	.section	.bss.p_io_spare_buf,"aw",%nobits
-	.align	2
-	.set	.LANCHOR186,. + 0
-	.type	p_io_spare_buf, %object
-	.size	p_io_spare_buf, 4
-p_io_spare_buf:
-	.space	4
-	.section	.bss.p_l2p_map_buf,"aw",%nobits
-	.align	2
-	.set	.LANCHOR123,. + 0
-	.type	p_l2p_map_buf, %object
-	.size	p_l2p_map_buf, 4
-p_l2p_map_buf:
-	.space	4
-	.section	.bss.p_l2p_ram_map,"aw",%nobits
-	.align	2
-	.set	.LANCHOR96,. + 0
-	.type	p_l2p_ram_map, %object
-	.size	p_l2p_ram_map, 4
-p_l2p_ram_map:
-	.space	4
-	.section	.bss.p_map_block_table,"aw",%nobits
-	.align	2
-	.set	.LANCHOR126,. + 0
-	.type	p_map_block_table, %object
-	.size	p_map_block_table, 4
-p_map_block_table:
-	.space	4
-	.section	.bss.p_map_block_valid_page_count,"aw",%nobits
-	.align	2
-	.set	.LANCHOR122,. + 0
-	.type	p_map_block_valid_page_count, %object
-	.size	p_map_block_valid_page_count, 4
-p_map_block_valid_page_count:
-	.space	4
-	.section	.bss.p_map_block_ver_table,"aw",%nobits
-	.align	2
-	.set	.LANCHOR127,. + 0
-	.type	p_map_block_ver_table, %object
-	.size	p_map_block_ver_table, 4
-p_map_block_ver_table:
-	.space	4
-	.section	.bss.p_map_region_ppn_check_table,"aw",%nobits
-	.align	2
-	.set	.LANCHOR192,. + 0
-	.type	p_map_region_ppn_check_table, %object
-	.size	p_map_region_ppn_check_table, 4
-p_map_region_ppn_check_table:
-	.space	4
-	.section	.bss.p_map_region_ppn_table,"aw",%nobits
-	.align	2
-	.set	.LANCHOR128,. + 0
-	.type	p_map_region_ppn_table, %object
-	.size	p_map_region_ppn_table, 4
-p_map_region_ppn_table:
-	.space	4
-	.section	.bss.p_plane_order_table,"aw",%nobits
-	.set	.LANCHOR46,. + 0
-	.type	p_plane_order_table, %object
-	.size	p_plane_order_table, 32
-p_plane_order_table:
-	.space	32
-	.section	.bss.p_swl_mul_table,"aw",%nobits
-	.align	2
-	.set	.LANCHOR134,. + 0
-	.type	p_swl_mul_table, %object
-	.size	p_swl_mul_table, 4
-p_swl_mul_table:
-	.space	4
-	.section	.bss.p_sys_data_buf,"aw",%nobits
-	.align	2
-	.set	.LANCHOR180,. + 0
-	.type	p_sys_data_buf, %object
-	.size	p_sys_data_buf, 4
-p_sys_data_buf:
-	.space	4
-	.section	.bss.p_sys_data_buf_1,"aw",%nobits
-	.align	2
-	.set	.LANCHOR181,. + 0
-	.type	p_sys_data_buf_1, %object
-	.size	p_sys_data_buf_1, 4
-p_sys_data_buf_1:
-	.space	4
-	.section	.bss.p_sys_spare_buf,"aw",%nobits
-	.align	2
-	.set	.LANCHOR185,. + 0
-	.type	p_sys_spare_buf, %object
-	.size	p_sys_spare_buf, 4
-p_sys_spare_buf:
-	.space	4
-	.section	.bss.p_valid_page_count_check_table,"aw",%nobits
-	.align	2
-	.type	p_valid_page_count_check_table, %object
-	.size	p_valid_page_count_check_table, 4
-p_valid_page_count_check_table:
-	.space	4
-	.section	.bss.p_valid_page_count_table,"aw",%nobits
-	.align	2
-	.set	.LANCHOR83,. + 0
-	.type	p_valid_page_count_table, %object
-	.size	p_valid_page_count_table, 4
-p_valid_page_count_table:
-	.space	4
-	.section	.bss.p_vendor_block_table,"aw",%nobits
-	.align	2
-	.set	.LANCHOR71,. + 0
-	.type	p_vendor_block_table, %object
-	.size	p_vendor_block_table, 4
-p_vendor_block_table:
-	.space	4
-	.section	.bss.p_vendor_block_valid_page_count,"aw",%nobits
-	.align	2
-	.set	.LANCHOR189,. + 0
-	.type	p_vendor_block_valid_page_count, %object
-	.size	p_vendor_block_valid_page_count, 4
-p_vendor_block_valid_page_count:
-	.space	4
-	.section	.bss.p_vendor_block_ver_table,"aw",%nobits
-	.align	2
-	.set	.LANCHOR190,. + 0
-	.type	p_vendor_block_ver_table, %object
-	.size	p_vendor_block_ver_table, 4
-p_vendor_block_ver_table:
-	.space	4
-	.section	.bss.p_vendor_data_buf,"aw",%nobits
-	.align	2
-	.set	.LANCHOR182,. + 0
-	.type	p_vendor_data_buf, %object
-	.size	p_vendor_data_buf, 4
-p_vendor_data_buf:
-	.space	4
-	.section	.bss.p_vendor_region_ppn_table,"aw",%nobits
-	.align	2
-	.set	.LANCHOR191,. + 0
-	.type	p_vendor_region_ppn_table, %object
-	.size	p_vendor_region_ppn_table, 4
-p_vendor_region_ppn_table:
-	.space	4
-	.section	.bss.read_retry_cur_offset,"aw",%nobits
-	.set	.LANCHOR21,. + 0
-	.type	read_retry_cur_offset, %object
-	.size	read_retry_cur_offset, 4
-read_retry_cur_offset:
-	.space	4
-	.section	.bss.req_erase,"aw",%nobits
-	.align	2
-	.set	.LANCHOR77,. + 0
-	.type	req_erase, %object
-	.size	req_erase, 4
-req_erase:
-	.space	4
-	.section	.bss.req_gc,"aw",%nobits
-	.align	2
-	.set	.LANCHOR106,. + 0
-	.type	req_gc, %object
-	.size	req_gc, 4
-req_gc:
-	.space	4
-	.section	.bss.req_gc_dst,"aw",%nobits
-	.align	2
-	.set	.LANCHOR178,. + 0
-	.type	req_gc_dst, %object
-	.size	req_gc_dst, 4
-req_gc_dst:
-	.space	4
-	.section	.bss.req_prgm,"aw",%nobits
-	.align	2
-	.set	.LANCHOR179,. + 0
-	.type	req_prgm, %object
-	.size	req_prgm, 4
-req_prgm:
-	.space	4
-	.section	.bss.req_read,"aw",%nobits
-	.align	2
-	.set	.LANCHOR177,. + 0
-	.type	req_read, %object
-	.size	req_read, 4
-req_read:
-	.space	4
-	.section	.bss.req_sys,"aw",%nobits
-	.align	2
-	.set	.LANCHOR199,. + 0
-	.type	req_sys, %object
-	.size	req_sys, 36
-req_sys:
-	.space	36
-	.section	.bss.slcPageToMlcPageTbl,"aw",%nobits
-	.align	2
-	.set	.LANCHOR16,. + 0
-	.type	slcPageToMlcPageTbl, %object
-	.size	slcPageToMlcPageTbl, 512
-slcPageToMlcPageTbl:
-	.space	512
-	.section	.data.FtlMallocOffset,"aw",%progbits
-	.align	2
-	.type	FtlMallocOffset, %object
-	.size	FtlMallocOffset, 4
-FtlMallocOffset:
-	.word	64
-	.section	.data.NandFlashParaTbl,"aw",%progbits
+.L2969:
+	.word	.LANCHOR69
+	.word	.LANCHOR231
+	.word	.LANCHOR56
+	.word	.LANCHOR166
+	.word	.LANCHOR117
+	.word	.LANCHOR38
+	.word	.LANCHOR186
+	.word	.LC61
+	.word	.LANCHOR138
+	.word	.LANCHOR59
+	.word	.LANCHOR189
+	.word	.LANCHOR187
+	.word	.LANCHOR204
+	.word	.LANCHOR180
+	.size	ftl_read, .-ftl_read
+	.section	.text.FtlWrite,"ax",%progbits
 	.align	1
-	.set	.LANCHOR139,. + 0
-	.type	NandFlashParaTbl, %object
-	.size	NandFlashParaTbl, 2368
-NandFlashParaTbl:
-	.byte	6
-	.byte	44
-	.byte	100
-	.byte	68
-	.byte	75
-	.byte	-87
-	.byte	0
-	.byte	4
-	.byte	1
-	.byte	16
-	.short	256
-	.byte	2
-	.byte	2
-	.short	2048
-	.short	479
-	.byte	3
-	.byte	17
-	.byte	40
-	.byte	32
-	.byte	1
-	.byte	0
-	.byte	1
-	.byte	0
-	.byte	0
-	.byte	0
-	.space	4
-	.byte	6
-	.byte	44
-	.byte	68
-	.byte	68
-	.byte	75
-	.byte	-87
-	.byte	0
-	.byte	4
-	.byte	1
-	.byte	16
-	.short	256
-	.byte	2
-	.byte	2
-	.short	1064
-	.short	479
-	.byte	3
-	.byte	17
-	.byte	40
-	.byte	32
-	.byte	1
-	.byte	0
-	.byte	1
-	.byte	0
-	.byte	0
-	.byte	0
-	.space	4
-	.byte	6
-	.byte	44
-	.byte	104
-	.byte	4
-	.byte	74
-	.byte	-87
-	.byte	0
-	.byte	4
-	.byte	1
-	.byte	8
-	.short	256
-	.byte	2
-	.byte	2
-	.short	2048
-	.short	287
-	.byte	1
-	.byte	0
-	.byte	24
-	.byte	32
-	.byte	1
-	.byte	0
-	.byte	1
-	.byte	0
-	.byte	0
-	.byte	0
-	.space	4
-	.byte	5
-	.byte	44
-	.byte	-120
-	.byte	4
-	.byte	75
-	.byte	-87
-	.byte	0
-	.byte	4
-	.byte	1
-	.byte	16
-	.short	256
-	.byte	2
-	.byte	2
-	.short	2048
-	.short	287
-	.byte	1
-	.byte	0
-	.byte	24
-	.byte	32
-	.byte	1
-	.byte	0
-	.byte	1
-	.byte	0
-	.byte	0
-	.byte	0
-	.space	4
-	.byte	6
-	.byte	44
-	.byte	-88
-	.byte	5
-	.byte	-53
-	.byte	-87
-	.byte	0
-	.byte	4
-	.byte	2
-	.byte	16
-	.short	256
-	.byte	2
-	.byte	2
-	.short	2048
-	.short	287
-	.byte	1
-	.byte	0
-	.byte	24
-	.byte	32
-	.byte	1
-	.byte	0
-	.byte	1
-	.byte	0
-	.byte	0
-	.byte	0
-	.space	4
-	.byte	6
-	.byte	44
-	.byte	104
-	.byte	4
-	.byte	70
-	.byte	-119
-	.byte	0
-	.byte	4
-	.byte	1
-	.byte	8
-	.short	256
-	.byte	2
-	.byte	2
-	.short	2048
-	.short	287
-	.byte	1
-	.byte	0
-	.byte	24
-	.byte	32
-	.byte	1
-	.byte	0
-	.byte	1
-	.byte	0
-	.byte	0
-	.byte	0
-	.space	4
-	.byte	6
-	.byte	44
-	.byte	72
-	.byte	4
-	.byte	74
-	.byte	-91
-	.byte	0
-	.byte	4
-	.byte	1
-	.byte	8
-	.short	256
-	.byte	2
-	.byte	2
-	.short	1024
-	.short	287
-	.byte	1
-	.byte	0
-	.byte	24
-	.byte	32
-	.byte	1
-	.byte	0
-	.byte	1
-	.byte	0
-	.byte	0
-	.byte	0
-	.space	4
-	.byte	6
-	.byte	44
-	.byte	-124
-	.byte	100
-	.byte	60
-	.byte	-91
-	.byte	0
-	.byte	4
-	.byte	1
-	.byte	32
-	.short	512
-	.byte	2
-	.byte	2
-	.short	1024
-	.short	479
-	.byte	3
-	.byte	17
-	.byte	40
-	.byte	32
-	.byte	1
-	.byte	0
-	.byte	1
-	.byte	0
-	.byte	0
-	.byte	0
-	.space	4
-	.byte	5
-	.byte	44
-	.byte	-124
-	.byte	100
-	.byte	84
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-	.byte	120
-	.byte	0
-	.byte	124
-	.byte	118
-	.byte	116
-	.byte	114
-	.byte	0
-	.byte	8
-	.byte	8
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	11
-	.byte	126
-	.byte	118
-	.byte	116
-	.byte	0
-	.byte	16
-	.byte	118
-	.byte	114
-	.byte	112
-	.byte	0
-	.byte	2
-	.byte	0
-	.byte	126
-	.byte	124
-	.byte	0
-	.section	.data.ToshibaRefValue,"aw",%progbits
-	.set	.LANCHOR12,. + 0
-	.type	ToshibaRefValue, %object
-	.size	ToshibaRefValue, 8
-ToshibaRefValue:
-	.byte	0
-	.byte	4
-	.byte	124
-	.byte	120
-	.byte	116
-	.byte	8
-	.byte	12
-	.byte	112
-	.section	.data.ftl_gc_temp_block_bops_scan_page_addr,"aw",%progbits
-	.align	1
-	.set	.LANCHOR233,. + 0
-	.type	ftl_gc_temp_block_bops_scan_page_addr, %object
-	.size	ftl_gc_temp_block_bops_scan_page_addr, 2
-ftl_gc_temp_block_bops_scan_page_addr:
-	.short	-1
-	.section	.data.gFtlInitStatus,"aw",%progbits
-	.align	2
-	.set	.LANCHOR223,. + 0
-	.type	gFtlInitStatus, %object
-	.size	gFtlInitStatus, 4
-gFtlInitStatus:
-	.word	-1
-	.section	.data.gNandParaInfo,"aw",%progbits
-	.align	1
-	.set	.LANCHOR30,. + 0
-	.type	gNandParaInfo, %object
-	.size	gNandParaInfo, 32
-gNandParaInfo:
-	.byte	0
-	.byte	0
-	.space	5
-	.byte	0
-	.byte	1
-	.byte	8
-	.short	128
-	.byte	2
-	.byte	1
-	.short	2048
-	.short	0
-	.byte	1
-	.byte	0
-	.byte	24
-	.byte	32
-	.byte	1
-	.byte	0
-	.byte	1
-	.byte	0
-	.byte	0
-	.byte	0
-	.space	4
-	.section	.data.gSlcNandParaInfo,"aw",%progbits
-	.align	1
-	.set	.LANCHOR197,. + 0
-	.type	gSlcNandParaInfo, %object
-	.size	gSlcNandParaInfo, 32
-gSlcNandParaInfo:
-	.byte	2
-	.byte	-104
-	.byte	-15
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	1
-	.byte	1
-	.byte	4
-	.short	64
-	.byte	1
-	.byte	1
-	.short	1024
-	.short	256
-	.byte	0
-	.byte	0
-	.byte	16
-	.byte	40
-	.byte	1
-	.byte	0
-	.byte	1
-	.byte	0
-	.byte	0
-	.byte	0
-	.space	4
-	.section	.data.power_up_flag,"aw",%progbits
-	.align	2
-	.type	power_up_flag, %object
-	.size	power_up_flag, 4
-power_up_flag:
-	.word	1
-	.section	.data.random_seed,"aw",%progbits
-	.align	1
-	.set	.LANCHOR4,. + 0
-	.type	random_seed, %object
-	.size	random_seed, 256
-random_seed:
-	.short	22378
-	.short	1512
-	.short	25245
-	.short	17827
-	.short	25756
-	.short	19440
-	.short	9026
-	.short	10030
-	.short	29528
-	.short	20467
-	.short	29676
-	.short	24432
-	.short	31328
-	.short	6872
-	.short	13426
-	.short	13842
-	.short	8783
-	.short	1108
-	.short	782
-	.short	28837
-	.short	30729
-	.short	9505
-	.short	18676
-	.short	23085
-	.short	18730
-	.short	1085
-	.short	32609
-	.short	14697
-	.short	20858
-	.short	15170
-	.short	30365
-	.short	1607
-	.short	32298
-	.short	4995
-	.short	18905
-	.short	1976
-	.short	9592
-	.short	20204
-	.short	17443
-	.short	13615
-	.short	23330
-	.short	29369
-	.short	13947
-	.short	9398
-	.short	32398
-	.short	8984
-	.short	27600
-	.short	21785
-	.short	6019
-	.short	6311
-	.short	31598
-	.short	30210
-	.short	19327
-	.short	13896
-	.short	11347
-	.short	27545
-	.short	3107
-	.short	26575
-	.short	32270
-	.short	19852
-	.short	20601
-	.short	8349
-	.short	9290
-	.short	29819
-	.short	13579
-	.short	3661
-	.short	28676
-	.short	27331
-	.short	32574
-	.short	8693
-	.short	31253
-	.short	9081
-	.short	5399
-	.short	6842
-	.short	20087
-	.short	5537
-	.short	1274
-	.short	11617
-	.short	9530
-	.short	4866
-	.short	8035
-	.short	23219
-	.short	1178
-	.short	23272
-	.short	7383
-	.short	18944
-	.short	12488
-	.short	12871
-	.short	29340
-	.short	20532
-	.short	11022
-	.short	22514
-	.short	228
-	.short	22363
-	.short	24978
-	.short	14584
-	.short	12138
-	.short	3092
-	.short	17916
-	.short	16863
-	.short	14554
-	.short	31457
-	.short	29474
-	.short	25311
-	.short	24121
-	.short	3684
-	.short	28037
-	.short	22865
-	.short	22839
-	.short	25217
-	.short	13217
-	.short	27186
-	.short	14938
-	.short	11180
-	.short	29754
-	.short	24180
-	.short	15150
-	.short	32455
-	.short	20434
-	.short	23848
-	.short	29983
-	.short	16120
-	.short	14769
-	.short	20041
-	.short	29803
-	.short	28406
-	.short	17598
-	.short	28087
-	.section	.data.refValueDefault,"aw",%progbits
-	.set	.LANCHOR193,. + 0
-	.type	refValueDefault, %object
-	.size	refValueDefault, 28
-refValueDefault:
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	6
-	.byte	10
-	.byte	6
-	.byte	0
-	.byte	-3
-	.byte	-7
-	.byte	-8
-	.byte	0
-	.byte	-6
-	.byte	-13
-	.byte	-15
-	.byte	0
-	.byte	-11
-	.byte	-20
-	.byte	-23
-	.byte	0
-	.byte	0
-	.byte	-26
-	.byte	-30
-	.byte	0
-	.byte	0
-	.byte	-32
-	.byte	-37
-	.section	.rodata.FlashDdrTunningRead.str1.1,"aMS",%progbits,1
-.LC10:
-	.ascii	"sdr read ok %x ecc=%d\012\000"
-.LC11:
-	.ascii	"sync para %d\012\000"
-.LC12:
-	.ascii	"TOG mode Read error %x %x\012\000"
-	.section	.rodata.FlashEraseSLc2KBlocks.str1.1,"aMS",%progbits,1
-.LC1:
-	.ascii	"FlashEraseBlocks pageAddr error %x\012\000"
-	.section	.rodata.FlashInit.str1.1,"aMS",%progbits,1
-.LC21:
-	.ascii	"No.%d FLASH ID:%x %x %x %x %x %x\012\000"
-.LC22:
-	.ascii	"FlashLoadPhyInfo fail %x!!\012\000"
-	.section	.rodata.FlashProgSlc2KPages.str1.1,"aMS",%progbits,1
-.LC27:
-	.ascii	"prog error: = %x\012\000"
-.LC28:
-	.ascii	"prog read error: = %x\012\000"
-.LC29:
-	.ascii	"prog read s error: = %x %x %x\012\000"
-.LC30:
-	.ascii	"prog read d error: = %x %x %x\012\000"
-	.section	.rodata.FlashReadFacBbtData.str1.1,"aMS",%progbits,1
-.LC58:
-	.ascii	"BBT:\000"
-	.section	.rodata.FlashReadIdbDataRaw.str1.1,"aMS",%progbits,1
-.LC15:
-	.ascii	"ECC:%d\012\000"
-	.section	.rodata.FlashReadPage.str1.1,"aMS",%progbits,1
-.LC13:
-	.ascii	"read retry status %x %x %x\012\000"
-	.section	.rodata.FlashReadPages.str1.1,"aMS",%progbits,1
-.LC26:
-	.ascii	"ReadRetry pageadd=%x ecc=%x err=%x\012\000"
-	.section	.rodata.FlashReadSlc2KPages.str1.1,"aMS",%progbits,1
-.LC23:
-	.ascii	"Read pageadd=%x  ecc=%x err=%x\012\000"
-.LC24:
-	.ascii	"data:\000"
-.LC25:
-	.ascii	"spare:\000"
-	.section	.rodata.FtlBbmMapBadBlock.str1.1,"aMS",%progbits,1
-.LC2:
-	.ascii	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\012"
-	.ascii	"\000"
-	.section	.rodata.FtlBbmTblFlush.str1.1,"aMS",%progbits,1
-.LC31:
-	.ascii	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\012\000"
-.LC32:
-	.ascii	"FtlBbmTblFlush error:%x\012\000"
-.LC33:
-	.ascii	"FtlBbmTblFlush error = %x error count = %d\012\000"
-	.section	.rodata.FtlFreeSysBlkQueueOut.str1.1,"aMS",%progbits,1
-.LC4:
-	.ascii	"FtlFreeSysBlkQueueOut free count = %d\012\000"
-.LC5:
-	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\012"
-	.ascii	"\000"
-	.section	.rodata.FtlGcFreeTempBlock.str1.1,"aMS",%progbits,1
-.LC50:
-	.ascii	"GC des block %x done\012\000"
-	.section	.rodata.FtlGcScanTempBlk.str1.1,"aMS",%progbits,1
-.LC49:
-	.ascii	"FtlGcScanTempBlkError ID %x %x!!!!!!!\012\000"
-	.section	.rodata.FtlInit.str1.1,"aMS",%progbits,1
-.LC51:
-	.ascii	"FTL version: 5.0.48 20180408\000"
-.LC52:
-	.ascii	"...%s: no bad block mapping table, format device\012"
-	.ascii	"\000"
-.LC53:
-	.ascii	"...%s FtlSysBlkInit error ,format device!\012\000"
-	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",%progbits,1
-.LC43:
-	.ascii	"no ect\000"
-	.section	.rodata.FtlMapTblRecovery.str1.1,"aMS",%progbits,1
-.LC45:
-	.ascii	"page map lost %x %x %x %x\012\000"
-	.section	.rodata.FtlMapWritePage.str1.1,"aMS",%progbits,1
-.LC38:
-	.ascii	"FtlMapWritePage error = %x\012\000"
-.LC39:
-	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
-	.section	.rodata.FtlProgPages.str1.1,"aMS",%progbits,1
-.LC41:
-	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
-	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",%progbits,1
-.LC46:
-	.ascii	"RSB refresh addr %x\012\000"
-.LC47:
-	.ascii	"spuer block %x vpn is 0\012 \000"
-.LC48:
-	.ascii	"g_recovery_ppa %x ver %x\012 \000"
-	.section	.rodata.FtlVendorPartRead.str1.1,"aMS",%progbits,1
-.LC42:
-	.ascii	"FtlVendorPartRead refresh = %x phyAddr = %x\012\000"
-	.section	.rodata.FtlVpcTblFlush.str1.1,"aMS",%progbits,1
-.LC35:
-	.ascii	"FtlVpcTblFlush error = %x error count = %d\012\000"
-	.section	.rodata.Ftl_load_ext_data.str1.1,"aMS",%progbits,1
-.LC44:
-	.ascii	"slc mode\000"
-	.section	.rodata.HynixGetReadRetryDefault.str1.1,"aMS",%progbits,1
-.LC19:
-	.ascii	"otp error! %d\000"
-.LC20:
-	.ascii	"rr\000"
-	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",%progbits,1
-.LC6:
-	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
-.LC7:
-	.ascii	"!!!!! FTL sys Error !!!!!\000"
-.LC8:
-	.ascii	"%s\012\000"
-	.section	.rodata.MicronReadRetrial.str1.1,"aMS",%progbits,1
-.LC14:
-	.ascii	"micron RR %d row=%x,count %d,status=%d\012\000"
-	.section	.rodata.__func__.10397,"a",%progbits
-	.set	.LANCHOR240,. + 0
-	.type	__func__.10397, %object
-	.size	__func__.10397, 8
-__func__.10397:
-	.ascii	"FtlInit\000"
-	.section	.rodata.__func__.10457,"a",%progbits
-	.set	.LANCHOR220,. + 0
-	.type	__func__.10457, %object
-	.size	__func__.10457, 13
-__func__.10457:
-	.ascii	"FtlProgPages\000"
-	.section	.rodata.__func__.10483,"a",%progbits
-	.set	.LANCHOR242,. + 0
-	.type	__func__.10483, %object
-	.size	__func__.10483, 10
-__func__.10483:
-	.ascii	"ftl_write\000"
-	.section	.rodata.__func__.10546,"a",%progbits
-	.set	.LANCHOR121,. + 0
-	.type	__func__.10546, %object
-	.size	__func__.10546, 14
-__func__.10546:
-	.ascii	"FtlBbt2Bitmap\000"
-	.section	.rodata.__func__.10592,"a",%progbits
-	.set	.LANCHOR208,. + 0
-	.type	__func__.10592, %object
-	.size	__func__.10592, 11
-__func__.10592:
-	.ascii	"FtlLoadBbt\000"
-	.section	.rodata.__func__.10694,"a",%progbits
-	.set	.LANCHOR89,. + 0
-	.type	__func__.10694, %object
-	.size	__func__.10694, 17
-__func__.10694:
-	.ascii	"INSERT_FREE_LIST\000"
-	.section	.rodata.__func__.10698,"a",%progbits
-	.set	.LANCHOR86,. + 0
-	.type	__func__.10698, %object
-	.size	__func__.10698, 17
-__func__.10698:
-	.ascii	"INSERT_DATA_LIST\000"
-	.section	.rodata.__func__.10728,"a",%progbits
-	.set	.LANCHOR90,. + 0
-	.type	__func__.10728, %object
-	.size	__func__.10728, 17
-__func__.10728:
-	.ascii	"List_remove_node\000"
-	.section	.rodata.__func__.10758,"a",%progbits
-	.set	.LANCHOR94,. + 0
-	.type	__func__.10758, %object
-	.size	__func__.10758, 22
-__func__.10758:
-	.ascii	"List_update_data_list\000"
-	.section	.rodata.__func__.10765,"a",%progbits
-	.set	.LANCHOR213,. + 0
-	.type	__func__.10765, %object
-	.size	__func__.10765, 20
-__func__.10765:
-	.ascii	"ftl_load_l2p_region\000"
-	.section	.rodata.__func__.10796,"a",%progbits
-	.set	.LANCHOR95,. + 0
-	.type	__func__.10796, %object
-	.size	__func__.10796, 26
-__func__.10796:
-	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.section	.rodata.__func__.10810,"a",%progbits
-	.set	.LANCHOR209,. + 0
-	.type	__func__.10810, %object
-	.size	__func__.10810, 15
-__func__.10810:
-	.ascii	"ftl_map_blk_gc\000"
-	.section	.rodata.__func__.10823,"a",%progbits
-	.set	.LANCHOR210,. + 0
-	.type	__func__.10823, %object
-	.size	__func__.10823, 31
-__func__.10823:
-	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.section	.rodata.__func__.10836,"a",%progbits
-	.set	.LANCHOR211,. + 0
-	.type	__func__.10836, %object
-	.size	__func__.10836, 16
-__func__.10836:
-	.ascii	"FtlMapWritePage\000"
-	.section	.rodata.__func__.10856,"a",%progbits
-	.set	.LANCHOR98,. + 0
-	.type	__func__.10856, %object
-	.size	__func__.10856, 22
-__func__.10856:
-	.ascii	"select_l2p_ram_region\000"
-	.section	.rodata.__func__.10872,"a",%progbits
-	.set	.LANCHOR212,. + 0
-	.type	__func__.10872, %object
-	.size	__func__.10872, 9
-__func__.10872:
-	.ascii	"log2phys\000"
-	.section	.rodata.__func__.10934,"a",%progbits
-	.set	.LANCHOR207,. + 0
-	.type	__func__.10934, %object
-	.size	__func__.10934, 15
-__func__.10934:
-	.ascii	"FtlVpcTblFlush\000"
-	.section	.rodata.__func__.10953,"a",%progbits
-	.set	.LANCHOR224,. + 0
-	.type	__func__.10953, %object
-	.size	__func__.10953, 14
-__func__.10953:
-	.ascii	"FtlScanSysBlk\000"
-	.section	.rodata.__func__.11007,"a",%progbits
-	.set	.LANCHOR225,. + 0
-	.type	__func__.11007, %object
-	.size	__func__.11007, 15
-__func__.11007:
-	.ascii	"FtlLoadSysInfo\000"
-	.section	.rodata.__func__.11077,"a",%progbits
-	.set	.LANCHOR214,. + 0
-	.type	__func__.11077, %object
-	.size	__func__.11077, 16
-__func__.11077:
-	.ascii	"FtlReUsePrevPpa\000"
-	.section	.rodata.__func__.11110,"a",%progbits
-	.set	.LANCHOR228,. + 0
-	.type	__func__.11110, %object
-	.size	__func__.11110, 22
-__func__.11110:
-	.ascii	"FtlRecoverySuperblock\000"
-	.section	.rodata.__func__.11164,"a",%progbits
-	.set	.LANCHOR101,. + 0
-	.type	__func__.11164, %object
-	.size	__func__.11164, 16
-__func__.11164:
-	.ascii	"make_superblock\000"
-	.section	.rodata.__func__.11184,"a",%progbits
-	.set	.LANCHOR137,. + 0
-	.type	__func__.11184, %object
-	.size	__func__.11184, 18
-__func__.11184:
-	.ascii	"SupperBlkListInit\000"
-	.section	.rodata.__func__.11261,"a",%progbits
-	.set	.LANCHOR200,. + 0
-	.type	__func__.11261, %object
-	.size	__func__.11261, 25
-__func__.11261:
-	.ascii	"allocate_data_superblock\000"
-	.section	.rodata.__func__.11275,"a",%progbits
-	.set	.LANCHOR219,. + 0
-	.type	__func__.11275, %object
-	.size	__func__.11275, 29
-__func__.11275:
-	.ascii	"allocate_new_data_superblock\000"
-	.section	.rodata.__func__.11281,"a",%progbits
-	.set	.LANCHOR205,. + 0
-	.type	__func__.11281, %object
-	.size	__func__.11281, 19
-__func__.11281:
-	.ascii	"get_new_active_ppa\000"
-	.section	.rodata.__func__.11292,"a",%progbits
-	.set	.LANCHOR203,. + 0
-	.type	__func__.11292, %object
-	.size	__func__.11292, 16
-__func__.11292:
-	.ascii	"update_vpc_list\000"
-	.section	.rodata.__func__.11297,"a",%progbits
-	.set	.LANCHOR204,. + 0
-	.type	__func__.11297, %object
-	.size	__func__.11297, 20
-__func__.11297:
-	.ascii	"decrement_vpc_count\000"
-	.section	.rodata.__func__.11365,"a",%progbits
-	.set	.LANCHOR234,. + 0
-	.type	__func__.11365, %object
-	.size	__func__.11365, 19
-__func__.11365:
-	.ascii	"FtlGcFreeTempBlock\000"
-	.section	.rodata.__func__.11459,"a",%progbits
-	.set	.LANCHOR238,. + 0
-	.type	__func__.11459, %object
-	.size	__func__.11459, 23
-__func__.11459:
-	.ascii	"rk_ftl_garbage_collect\000"
-	.section	.rodata.decrement_vpc_count.str1.1,"aMS",%progbits,1
-.LC34:
-	.ascii	"decrement_vpc_count %x = %d\012\000"
-	.section	.rodata.ftl_fix_nand_power_lost_error.str1.1,"aMS",%progbits,1
-.LC55:
-	.ascii	"fix power lost blk = %x vpc=%x\012\000"
-.LC56:
-	.ascii	"erase power lost blk = %x vpc=%x\012\000"
-	.section	.rodata.ftl_map_blk_alloc_new_blk.str1.1,"aMS",%progbits,1
-.LC9:
-	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d\012\000"
-	.section	.rodata.ftl_map_blk_gc.str1.1,"aMS",%progbits,1
-.LC36:
-	.ascii	"ftl_map_blk_gc blk info: %x %x %x\012\000"
-.LC37:
-	.ascii	"page map lost: %x %x\012\000"
-	.section	.rodata.ftl_write.str1.1,"aMS",%progbits,1
-.LC57:
-	.ascii	"FtlWrite: lpa error:%x %x\012\000"
-	.section	.rodata.log2phys.str1.1,"aMS",%progbits,1
-.LC40:
-	.ascii	"load_l2p_region refresh = %x phyAddr = %x\012\000"
-	.section	.rodata.remove_from_free_sys_Queue.str1.1,"aMS",%progbits,1
-.LC3:
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-	.ascii	"FtlInit %x\012\000"
-	.section	.rodata.rknand_print_hex.str1.1,"aMS",%progbits,1
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-	.ascii	"%s 0x%x:\000"
-.LC17:
-	.ascii	"%x \000"
-.LC18:
-	.ascii	"\000"
-	.text
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-	.file 9 "drivers/rknand/rkftl/ftl_typedef.h"
-	.file 10 "drivers/rknand/rkftl/flash_com.h"
-	.file 11 "drivers/rknand/rkftl/flash.h"
-	.file 12 "drivers/rknand/rkftl/nandc.h"
-	.file 13 "include/common.h"
-	.file 14 "include/errno.h"
-	.file 15 "./arch/arm/include/asm/types.h"
-	.file 16 "./arch/arm/include/asm/posix_types.h"
-	.file 17 "include/linux/types.h"
-	.file 18 "include/linux/string.h"
-	.file 19 "include/efi.h"
-	.file 20 "include/ide.h"
-	.file 21 "include/linux/list.h"
-	.file 22 "include/part.h"
-	.file 23 "include/flash.h"
-	.file 24 "include/lmb.h"
-	.file 25 "include/asm-generic/u-boot.h"
-	.file 26 "./arch/arm/include/asm/u-boot-arm.h"
-	.file 27 "include/../scripts/dtc/libfdt/fdt.h"
-	.file 28 "include/libfdt_env.h"
-	.file 29 "include/image.h"
-	.file 30 "include/dm/uclass-id.h"
-	.file 31 "include/net.h"
-	.file 32 "drivers/rknand/rkftl/FtlStruct.h"
-	.file 33 "drivers/rknand/rkftl/FtlGlobal.h"
-	.file 34 "drivers/rknand/rkftl/FtlInc.h"
-	.file 35 "include/malloc.h"
-	.file 36 "include/linux/rbtree.h"
-	.file 37 "include/mtd/mtd-abi.h"
-	.file 38 "include/linux/mtd/mtd.h"
-	.file 39 "include/../drivers/mtd/ubi/ubi-media.h"
-	.file 40 "include/../drivers/mtd/ubi/ubi.h"
-	.file 41 "include/ubi_uboot.h"
-	.file 42 "include/stdio.h"
-	.file 43 "include/linux/delay.h"
-	.file 44 "include/log.h"
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-	.uleb128 0xa
-	.4byte	.LASF80
-	.byte	0xb
-	.byte	0xc6
-	.4byte	0x587
-	.byte	0x4
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x45
-	.4byte	0x597
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x7f
-	.byte	0
-	.uleb128 0x10
-	.byte	0x84
-	.byte	0xb
-	.byte	0xc9
-	.4byte	0x5dc
-	.uleb128 0xa
-	.4byte	.LASF75
-	.byte	0xb
-	.byte	0xcb
-	.4byte	0x3a
-	.byte	0
-	.uleb128 0xa
-	.4byte	.LASF76
-	.byte	0xb
-	.byte	0xcc
-	.4byte	0x3a
-	.byte	0x1
-	.uleb128 0xa
-	.4byte	.LASF77
-	.byte	0xb
-	.byte	0xcd
-	.4byte	0x3a
-	.byte	0x2
-	.uleb128 0xa
-	.4byte	.LASF40
-	.byte	0xb
-	.byte	0xce
-	.4byte	0x3a
-	.byte	0x3
-	.uleb128 0xa
-	.4byte	.LASF80
-	.byte	0xb
-	.byte	0xcf
-	.4byte	0x587
-	.byte	0x4
-	.byte	0
-	.uleb128 0x11
-	.4byte	.LASF173
-	.2byte	0x354
-	.byte	0xb
-	.byte	0xa0
-	.4byte	0x616
-	.uleb128 0x12
-	.4byte	.LASF82
-	.byte	0xb
-	.byte	0xb0
-	.4byte	0x3f4
-	.uleb128 0x12
-	.4byte	.LASF83
-	.byte	0xb
-	.byte	0xbd
-	.4byte	0x4be
-	.uleb128 0x12
-	.4byte	.LASF84
-	.byte	0xb
-	.byte	0xc7
-	.4byte	0x542
-	.uleb128 0x12
-	.4byte	.LASF85
-	.byte	0xb
-	.byte	0xd0
-	.4byte	0x597
-	.byte	0
-	.uleb128 0x3
-	.4byte	.LASF86
-	.byte	0xb
-	.byte	0xd1
-	.4byte	0x5dc
-	.uleb128 0x9
-	.4byte	.LASF87
-	.byte	0x10
-	.byte	0xb
-	.byte	0xd3
-	.4byte	0x676
-	.uleb128 0xa
-	.4byte	.LASF88
-	.byte	0xb
-	.byte	0xd5
-	.4byte	0x3a
-	.byte	0
-	.uleb128 0xa
-	.4byte	.LASF89
-	.byte	0xb
-	.byte	0xd6
-	.4byte	0x3a
-	.byte	0x1
-	.uleb128 0xa
-	.4byte	.LASF90
-	.byte	0xb
-	.byte	0xd7
-	.4byte	0x57
-	.byte	0x2
-	.uleb128 0xa
-	.4byte	.LASF16
-	.byte	0xb
-	.byte	0xd8
-	.4byte	0x74
-	.byte	0x4
-	.uleb128 0xa
-	.4byte	.LASF91
-	.byte	0xb
-	.byte	0xd9
-	.4byte	0x676
-	.byte	0x8
-	.uleb128 0xa
-	.4byte	.LASF92
-	.byte	0xb
-	.byte	0xda
-	.4byte	0x676
-	.byte	0xc
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0xc5
-	.uleb128 0x13
-	.4byte	.LASF93
-	.2byte	0x638
-	.byte	0xb
-	.byte	0xdd
-	.4byte	0x728
-	.uleb128 0xb
-	.ascii	"tag\000"
-	.byte	0xb
-	.byte	0xdf
-	.4byte	0x74
-	.byte	0
-	.uleb128 0xb
-	.ascii	"len\000"
-	.byte	0xb
-	.byte	0xe0
-	.4byte	0x74
-	.byte	0x4
-	.uleb128 0xa
-	.4byte	.LASF94
-	.byte	0xb
-	.byte	0xe1
-	.4byte	0x74
-	.byte	0x8
-	.uleb128 0xa
-	.4byte	.LASF95
-	.byte	0xb
-	.byte	0xe2
-	.4byte	0x57
-	.byte	0xc
-	.uleb128 0xa
-	.4byte	.LASF96
-	.byte	0xb
-	.byte	0xe3
-	.4byte	0x57
-	.byte	0xe
-	.uleb128 0xa
-	.4byte	.LASF97
-	.byte	0xb
-	.byte	0xe4
-	.4byte	0x728
-	.byte	0x10
-	.uleb128 0xa
-	.4byte	.LASF98
-	.byte	0xb
-	.byte	0xe5
-	.4byte	0x51c
-	.byte	0x50
-	.uleb128 0xa
-	.4byte	.LASF99
-	.byte	0xb
-	.byte	0xe6
-	.4byte	0x73e
-	.byte	0x60
-	.uleb128 0xa
-	.4byte	.LASF100
-	.byte	0xb
-	.byte	0xe8
-	.4byte	0x3e9
-	.byte	0xa0
-	.uleb128 0xa
-	.4byte	.LASF101
-	.byte	0xb
-	.byte	0xe9
-	.4byte	0x2c1
-	.byte	0xc0
-	.uleb128 0xa
-	.4byte	.LASF102
-	.byte	0xb
-	.byte	0xea
-	.4byte	0x616
-	.byte	0xe0
-	.uleb128 0xf
-	.4byte	.LASF103
-	.byte	0xb
-	.byte	0xec
-	.4byte	0x74
-	.2byte	0x434
-	.uleb128 0xf
-	.4byte	.LASF40
-	.byte	0xb
-	.byte	0xed
-	.4byte	0x74e
-	.2byte	0x438
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x3a
-	.4byte	0x73e
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x7
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x7
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x74
-	.4byte	0x74e
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0xf
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x3a
-	.4byte	0x75f
-	.uleb128 0x14
-	.4byte	0x2aa
-	.2byte	0x1ff
-	.byte	0
-	.uleb128 0x3
-	.4byte	.LASF104
-	.byte	0xb
-	.byte	0xee
-	.4byte	0x67c
-	.uleb128 0x9
-	.4byte	.LASF105
-	.byte	0xb
-	.byte	0xb
-	.byte	0xf0
-	.4byte	0x7cb
-	.uleb128 0xa
-	.4byte	.LASF106
-	.byte	0xb
-	.byte	0xf2
-	.4byte	0x74
-	.byte	0
-	.uleb128 0xa
-	.4byte	.LASF107
-	.byte	0xb
-	.byte	0xf3
-	.4byte	0x57
-	.byte	0x4
-	.uleb128 0xa
-	.4byte	.LASF108
-	.byte	0xb
-	.byte	0xf4
-	.4byte	0x3a
-	.byte	0x6
-	.uleb128 0xa
-	.4byte	.LASF109
-	.byte	0xb
-	.byte	0xf5
-	.4byte	0x3a
-	.byte	0x7
-	.uleb128 0xa
-	.4byte	.LASF110
-	.byte	0xb
-	.byte	0xf6
-	.4byte	0x3a
-	.byte	0x8
-	.uleb128 0xa
-	.4byte	.LASF111
-	.byte	0xb
-	.byte	0xf7
-	.4byte	0x3a
-	.byte	0x9
-	.uleb128 0xa
-	.4byte	.LASF112
-	.byte	0xb
-	.byte	0xf8
-	.4byte	0x3a
-	.byte	0xa
-	.byte	0
-	.uleb128 0x3
-	.4byte	.LASF113
-	.byte	0xb
-	.byte	0xf9
-	.4byte	0x7d6
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x76a
-	.uleb128 0x6
-	.4byte	0x3a
-	.4byte	0x7ec
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x3
-	.byte	0
-	.uleb128 0x15
-	.4byte	.LASF114
-	.byte	0xb
-	.2byte	0x107
-	.4byte	0x7dc
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	read_retry_cur_offset
-	.uleb128 0x6
-	.4byte	0x3a
-	.4byte	0x814
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x3
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x7
-	.byte	0
-	.uleb128 0x15
-	.4byte	.LASF97
-	.byte	0xb
-	.2byte	0x108
-	.4byte	0x7fe
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	IDByte
-	.uleb128 0x15
-	.4byte	.LASF98
-	.byte	0xb
-	.2byte	0x109
-	.4byte	0x46c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	DieCsIndex
-	.uleb128 0x6
-	.4byte	0x621
-	.4byte	0x848
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x7
-	.byte	0
-	.uleb128 0x15
-	.4byte	.LASF115
-	.byte	0xb
-	.2byte	0x10a
-	.4byte	0x838
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gDieOp
-	.uleb128 0x6
-	.4byte	0x74
-	.4byte	0x86a
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x7
-	.byte	0
-	.uleb128 0x15
-	.4byte	.LASF99
-	.byte	0xb
-	.2byte	0x10b
-	.4byte	0x85a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	DieAddrs
-	.uleb128 0x16
-	.4byte	0xba
-	.byte	0xb
-	.2byte	0x10c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	slcPageToMlcPageTbl
-	.uleb128 0x16
-	.4byte	0xaf
-	.byte	0xb
-	.2byte	0x10d
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	mlcPageToSlcPageTbl
-	.uleb128 0x17
-	.4byte	0x74
-	.4byte	0x8b6
-	.uleb128 0x18
-	.4byte	0x3a
-	.uleb128 0x18
-	.4byte	0x74
-	.uleb128 0x18
-	.4byte	0x8b6
-	.uleb128 0x18
-	.4byte	0x8b6
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x3a
-	.uleb128 0x15
-	.4byte	.LASF116
-	.byte	0xb
-	.2byte	0x10e
-	.4byte	0x8ce
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gpReadRetrial
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x898
-	.uleb128 0x15
-	.4byte	.LASF117
-	.byte	0xb
-	.2byte	0x10f
-	.4byte	0x3a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gMultiPageReadEn
-	.uleb128 0x15
-	.4byte	.LASF118
-	.byte	0xb
-	.2byte	0x110
-	.4byte	0x3a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gMultiPageProgEn
-	.uleb128 0x15
-	.4byte	.LASF119
-	.byte	0xb
-	.2byte	0x111
-	.4byte	0x3a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gFlashSdrModeEn
-	.uleb128 0x15
-	.4byte	.LASF120
-	.byte	0xb
-	.2byte	0x112
-	.4byte	0x3a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gFlashToggleModeEn
-	.uleb128 0x15
-	.4byte	.LASF121
-	.byte	0xb
-	.2byte	0x113
-	.4byte	0x3a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gFlashOnfiModeEn
-	.uleb128 0x15
-	.4byte	.LASF122
-	.byte	0xb
-	.2byte	0x115
-	.4byte	0x3a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gFlashSlcMode
-	.uleb128 0x15
-	.4byte	.LASF123
-	.byte	0xb
-	.2byte	0x116
-	.4byte	0x3a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gFlashInterfaceMode
-	.uleb128 0x15
-	.4byte	.LASF124
-	.byte	0xb
-	.2byte	0x117
-	.4byte	0x3a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gNandMaxDie
-	.uleb128 0x15
-	.4byte	.LASF125
-	.byte	0xb
-	.2byte	0x118
-	.4byte	0x3a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gNandMaxChip
-	.uleb128 0x15
-	.4byte	.LASF126
-	.byte	0xb
-	.2byte	0x119
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gTotleBlock
-	.uleb128 0x15
-	.4byte	.LASF127
-	.byte	0xb
-	.2byte	0x11a
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gBlockPageAlignSize
-	.uleb128 0x15
-	.4byte	.LASF128
-	.byte	0xb
-	.2byte	0x11b
-	.4byte	0x3a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gNandRandomizer
-	.uleb128 0x15
-	.4byte	.LASF129
-	.byte	0xb
-	.2byte	0x11c
-	.4byte	0x3a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gNandFlashEccBits
-	.uleb128 0x15
-	.4byte	.LASF130
-	.byte	0xb
-	.2byte	0x11d
-	.4byte	0x3a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gNandFlashIDBEccBits
-	.uleb128 0x15
-	.4byte	.LASF131
-	.byte	0xb
-	.2byte	0x11e
-	.4byte	0x3a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gNandFlashInfoBlockEcc
-	.uleb128 0x15
-	.4byte	.LASF132
-	.byte	0xb
-	.2byte	0x11f
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gNandFlashIdbBlockAddr
-	.uleb128 0x15
-	.4byte	.LASF133
-	.byte	0xb
-	.2byte	0x120
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gNandFlashInfoBlockAddr
-	.uleb128 0x15
-	.4byte	.LASF134
-	.byte	0xb
-	.2byte	0x121
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gNandFlashResEndPageAddr
-	.uleb128 0x15
-	.4byte	.LASF135
-	.byte	0xb
-	.2byte	0x122
-	.4byte	0x3a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gNandIDBResBlkNum
-	.uleb128 0x15
-	.4byte	.LASF136
-	.byte	0xb
-	.2byte	0x123
-	.4byte	0x3a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gNandIDBResBlkNumSaveInFlash
-	.uleb128 0x15
-	.4byte	.LASF137
-	.byte	0xb
-	.2byte	0x124
-	.4byte	0x3a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_retryMode
-	.uleb128 0x15
-	.4byte	.LASF138
-	.byte	0xb
-	.2byte	0x125
-	.4byte	0x3a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_maxRegNum
-	.uleb128 0x15
-	.4byte	.LASF139
-	.byte	0xb
-	.2byte	0x126
-	.4byte	0x3a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_maxRetryCount
-	.uleb128 0x16
-	.4byte	0x1e6
-	.byte	0xb
-	.2byte	0x127
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_slc2KBNand
-	.uleb128 0x19
-	.4byte	.LASF140
-	.byte	0xb
-	.2byte	0x128
-	.4byte	0x3e9
-	.uleb128 0x15
-	.4byte	.LASF141
-	.byte	0xb
-	.2byte	0x129
-	.4byte	0x2c1
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gNandOptPara
-	.uleb128 0x15
-	.4byte	.LASF142
-	.byte	0xb
-	.2byte	0x12a
-	.4byte	0xab0
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gpNandParaInfo
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x3e9
-	.uleb128 0x15
-	.4byte	.LASF143
-	.byte	0xb
-	.2byte	0x12c
-	.4byte	0x616
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gReadRetryInfo
-	.uleb128 0x15
-	.4byte	.LASF144
-	.byte	0xb
-	.2byte	0x12d
-	.4byte	0xada
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gpFlashSaveInfo
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x75f
-	.uleb128 0x15
-	.4byte	.LASF145
-	.byte	0xb
-	.2byte	0x131
-	.4byte	0x13e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gFlashPageBuffer0
-	.uleb128 0x15
-	.4byte	.LASF146
-	.byte	0xb
-	.2byte	0x132
-	.4byte	0x13e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gFlashPageBuffer1
-	.uleb128 0x15
-	.4byte	.LASF147
-	.byte	0xb
-	.2byte	0x133
-	.4byte	0x13e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gFlashSpareBuffer
-	.uleb128 0x15
-	.4byte	.LASF148
-	.byte	0xb
-	.2byte	0x134
-	.4byte	0x13e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gFlashProgCheckBuffer
-	.uleb128 0x15
-	.4byte	.LASF149
-	.byte	0xb
-	.2byte	0x135
-	.4byte	0x13e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gFlashProgCheckSpareBuffer
-	.uleb128 0x15
-	.4byte	.LASF150
-	.byte	0xb
-	.2byte	0x137
-	.4byte	0x144
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gNandPhyInfo
-	.uleb128 0x15
-	.4byte	.LASF151
-	.byte	0xb
-	.2byte	0x138
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	FlashWaitBusyScheduleEn
-	.uleb128 0x15
-	.4byte	.LASF152
-	.byte	0xb
-	.2byte	0x139
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	FlashDdrTunningReadCount
-	.uleb128 0x6
-	.4byte	0x74
-	.4byte	0xb81
-	.uleb128 0x14
-	.4byte	0x2aa
-	.2byte	0x1ff
-	.byte	0
-	.uleb128 0x15
-	.4byte	.LASF153
-	.byte	0xb
-	.2byte	0x13b
-	.4byte	0xb70
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gNandIDataBuf
-	.uleb128 0x1a
-	.4byte	.LASF441
-	.byte	0x4
-	.4byte	0x2c
-	.byte	0xc
-	.byte	0x15
-	.4byte	0xbc2
-	.uleb128 0x1b
-	.4byte	.LASF154
-	.byte	0
-	.uleb128 0x1b
-	.4byte	.LASF155
-	.byte	0x1
-	.uleb128 0x1b
-	.4byte	.LASF156
-	.byte	0x2
-	.uleb128 0x1b
-	.4byte	.LASF157
-	.byte	0x3
-	.uleb128 0x1b
-	.4byte	.LASF158
-	.byte	0x4
-	.byte	0
-	.uleb128 0x3
-	.4byte	.LASF159
-	.byte	0xc
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-	.uleb128 0x1d
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-	.uleb128 0x1d
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-	.uleb128 0x1d
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-	.byte	0
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-	.uleb128 0x1f
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-	.uleb128 0x1f
-	.ascii	"V4\000"
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-	.uleb128 0x1f
-	.ascii	"V6\000"
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-	.uleb128 0x3
-	.4byte	.LASF208
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-	.uleb128 0x1d
-	.4byte	.LASF209
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-	.uleb128 0x1d
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-	.uleb128 0x1d
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-	.uleb128 0x1d
-	.4byte	.LASF214
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-	.uleb128 0x1d
-	.4byte	.LASF215
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-	.byte	0x1
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-	.uleb128 0x1d
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-	.byte	0xc
-	.byte	0xb2
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-	.byte	0x4
-	.byte	0x1
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-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF217
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-	.byte	0xb
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-	.uleb128 0x1d
-	.4byte	.LASF218
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-	.byte	0x6
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-	.uleb128 0x1c
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-	.byte	0xb5
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-	.byte	0x1
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-	.uleb128 0x1c
-	.ascii	"cnt\000"
-	.byte	0xc
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-	.byte	0x4
-	.byte	0x1
-	.byte	0x4
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF219
-	.byte	0xc
-	.byte	0xb7
-	.4byte	0x2c
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-	.byte	0x1
-	.byte	0x3
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF220
-	.byte	0xc
-	.byte	0xb8
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x2
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF221
-	.byte	0xc
-	.byte	0xb9
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-	.byte	0x4
-	.byte	0x1
-	.byte	0x1
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF222
-	.byte	0xc
-	.byte	0xba
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x10
-	.byte	0x4
-	.byte	0xc
-	.byte	0xbc
-	.4byte	0x136c
-	.uleb128 0x1d
-	.4byte	.LASF209
-	.byte	0xc
-	.byte	0xbe
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-	.byte	0x4
-	.byte	0x1
-	.byte	0x1f
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF210
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-	.byte	0x4
-	.byte	0x1
-	.byte	0x1e
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF211
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-	.byte	0xc0
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x1d
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF212
-	.byte	0xc
-	.byte	0xc1
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-	.byte	0x5
-	.byte	0x18
-	.byte	0
-	.uleb128 0x1d
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-	.byte	0xc
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-	.uleb128 0x1d
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-	.uleb128 0x1d
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-	.uleb128 0x1d
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-	.uleb128 0x1c
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-	.uleb128 0x1d
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-	.4byte	0x1398
-	.uleb128 0x1f
-	.ascii	"d32\000"
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-	.ascii	"V4\000"
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-	.4byte	0x117a
-	.uleb128 0x1f
-	.ascii	"V6\000"
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-	.uleb128 0x20
-	.4byte	0x136c
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-	.4byte	.LASF225
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-	.uleb128 0x1d
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-	.uleb128 0x1d
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-	.uleb128 0x24
-	.4byte	.LASF256
-	.byte	0xc
-	.2byte	0x113
-	.4byte	0x74
-	.2byte	0x134
-	.uleb128 0x24
-	.4byte	.LASF257
-	.byte	0xc
-	.2byte	0x114
-	.4byte	0x74
-	.2byte	0x138
-	.uleb128 0x24
-	.4byte	.LASF258
-	.byte	0xc
-	.2byte	0x115
-	.4byte	0x1796
-	.2byte	0x13c
-	.uleb128 0x24
-	.4byte	.LASF259
-	.byte	0xc
-	.2byte	0x117
-	.4byte	0x74
-	.2byte	0x150
-	.uleb128 0x24
-	.4byte	.LASF260
-	.byte	0xc
-	.2byte	0x118
-	.4byte	0x74
-	.2byte	0x154
-	.uleb128 0x24
-	.4byte	.LASF261
-	.byte	0xc
-	.2byte	0x119
-	.4byte	0x74
-	.2byte	0x158
-	.uleb128 0x24
-	.4byte	.LASF244
-	.byte	0xc
-	.2byte	0x11a
-	.4byte	0x74
-	.2byte	0x15c
-	.uleb128 0x24
-	.4byte	.LASF262
-	.byte	0xc
-	.2byte	0x11b
-	.4byte	0x74
-	.2byte	0x160
-	.uleb128 0x24
-	.4byte	.LASF263
-	.byte	0xc
-	.2byte	0x11d
-	.4byte	0x74
-	.2byte	0x164
-	.uleb128 0x24
-	.4byte	.LASF264
-	.byte	0xc
-	.2byte	0x11e
-	.4byte	0x74
-	.2byte	0x168
-	.uleb128 0x24
-	.4byte	.LASF265
-	.byte	0xc
-	.2byte	0x11f
-	.4byte	0x74
-	.2byte	0x16c
-	.uleb128 0x24
-	.4byte	.LASF266
-	.byte	0xc
-	.2byte	0x120
-	.4byte	0x74
-	.2byte	0x170
-	.uleb128 0x24
-	.4byte	.LASF267
-	.byte	0xc
-	.2byte	0x121
-	.4byte	0x74
-	.2byte	0x174
-	.uleb128 0x24
-	.4byte	.LASF268
-	.byte	0xc
-	.2byte	0x122
-	.4byte	0x17a6
-	.2byte	0x178
-	.uleb128 0x24
-	.4byte	.LASF269
-	.byte	0xc
-	.2byte	0x123
-	.4byte	0x73e
-	.2byte	0x180
-	.uleb128 0x24
-	.4byte	.LASF270
-	.byte	0xc
-	.2byte	0x124
-	.4byte	0x73e
-	.2byte	0x1c0
-	.uleb128 0x24
-	.4byte	.LASF271
-	.byte	0xc
-	.2byte	0x125
-	.4byte	0x17b6
-	.2byte	0x200
-	.uleb128 0x24
-	.4byte	.LASF272
-	.byte	0xc
-	.2byte	0x126
-	.4byte	0x17c6
-	.2byte	0x400
-	.uleb128 0x24
-	.4byte	.LASF273
-	.byte	0xc
-	.2byte	0x127
-	.4byte	0x17e6
-	.2byte	0x800
-	.uleb128 0x25
-	.ascii	"buf\000"
-	.byte	0xc
-	.2byte	0x128
-	.4byte	0xb70
-	.2byte	0x1000
-	.byte	0
-	.uleb128 0x20
-	.4byte	0x15ce
-	.uleb128 0x6
-	.4byte	0x74
-	.4byte	0x1796
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x3b
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x74
-	.4byte	0x17a6
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x4
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x74
-	.4byte	0x17b6
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x1
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x74
-	.4byte	0x17c6
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x7f
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x74
-	.4byte	0x17d6
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0xff
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x15b0
-	.4byte	0x17e6
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x7
-	.byte	0
-	.uleb128 0x20
-	.4byte	0x17d6
-	.uleb128 0x26
-	.4byte	.LASF274
-	.2byte	0x1800
-	.byte	0xc
-	.2byte	0x103
-	.4byte	0x1805
-	.uleb128 0x27
-	.ascii	"V6\000"
-	.byte	0xc
-	.2byte	0x129
-	.4byte	0x1781
-	.byte	0
-	.uleb128 0x20
-	.4byte	0x17eb
-	.uleb128 0x21
-	.4byte	.LASF275
-	.byte	0xc
-	.2byte	0x12a
-	.4byte	0x1816
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x1805
-	.uleb128 0x28
-	.4byte	.LASF276
-	.byte	0x20
-	.byte	0xc
-	.2byte	0x12c
-	.4byte	0x1892
-	.uleb128 0x23
-	.4byte	.LASF277
-	.byte	0xc
-	.2byte	0x12e
-	.4byte	0x13e
-	.byte	0
-	.uleb128 0x23
-	.4byte	.LASF278
-	.byte	0xc
-	.2byte	0x12f
-	.4byte	0x13e
-	.byte	0x4
-	.uleb128 0x23
-	.4byte	.LASF279
-	.byte	0xc
-	.2byte	0x130
-	.4byte	0x13e
-	.byte	0x8
-	.uleb128 0x23
-	.4byte	.LASF280
-	.byte	0xc
-	.2byte	0x131
-	.4byte	0x13e
-	.byte	0xc
-	.uleb128 0x23
-	.4byte	.LASF281
-	.byte	0xc
-	.2byte	0x132
-	.4byte	0x74
-	.byte	0x10
-	.uleb128 0x23
-	.4byte	.LASF282
-	.byte	0xc
-	.2byte	0x133
-	.4byte	0x74
-	.byte	0x14
-	.uleb128 0x23
-	.4byte	.LASF283
-	.byte	0xc
-	.2byte	0x134
-	.4byte	0x74
-	.byte	0x18
-	.uleb128 0x29
-	.ascii	"cnt\000"
-	.byte	0xc
-	.2byte	0x135
-	.4byte	0x74
-	.byte	0x1c
-	.byte	0
-	.uleb128 0x21
-	.4byte	.LASF284
-	.byte	0xc
-	.2byte	0x136
-	.4byte	0x181c
-	.uleb128 0x28
-	.4byte	.LASF285
-	.byte	0x8
-	.byte	0xc
-	.2byte	0x138
-	.4byte	0x18c6
-	.uleb128 0x23
-	.4byte	.LASF286
-	.byte	0xc
-	.2byte	0x13a
-	.4byte	0x13e
-	.byte	0
-	.uleb128 0x23
-	.4byte	.LASF287
-	.byte	0xc
-	.2byte	0x13b
-	.4byte	0x74
-	.byte	0x4
-	.byte	0
-	.uleb128 0x21
-	.4byte	.LASF288
-	.byte	0xc
-	.2byte	0x13c
-	.4byte	0x189e
-	.uleb128 0x6
-	.4byte	0x18c6
-	.4byte	0x18e2
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x3
-	.byte	0
-	.uleb128 0x15
-	.4byte	.LASF289
-	.byte	0xc
-	.2byte	0x14a
-	.4byte	0x18d2
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gNandChipMap
-	.uleb128 0x15
-	.4byte	.LASF290
-	.byte	0xc
-	.2byte	0x14c
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gNandcVer
-	.uleb128 0x15
-	.4byte	.LASF291
-	.byte	0xc
-	.2byte	0x14d
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_nandc_version_data
-	.uleb128 0x15
-	.4byte	.LASF292
-	.byte	0xc
-	.2byte	0x14e
-	.4byte	0x180a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gpNandc
-	.uleb128 0x15
-	.4byte	.LASF293
-	.byte	0xc
-	.2byte	0x14f
-	.4byte	0x180a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gpNandc1
-	.uleb128 0x15
-	.4byte	.LASF294
-	.byte	0xc
-	.2byte	0x150
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gNandcEccBits
-	.uleb128 0x15
-	.4byte	.LASF295
-	.byte	0xc
-	.2byte	0x151
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gBootDdrMode
-	.uleb128 0x15
-	.4byte	.LASF296
-	.byte	0xc
-	.2byte	0x152
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gToggleModeClkDiv
-	.uleb128 0x15
-	.4byte	.LASF297
-	.byte	0xc
-	.2byte	0x153
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gNandcDumpWriteEn
-	.uleb128 0x15
-	.4byte	.LASF298
-	.byte	0xc
-	.2byte	0x155
-	.4byte	0x1892
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gMasterInfo
-	.uleb128 0x15
-	.4byte	.LASF299
-	.byte	0xc
-	.2byte	0x156
-	.4byte	0x13e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gMasterTempBuf
-	.uleb128 0x3
-	.4byte	.LASF300
-	.byte	0xd
-	.byte	0xd
-	.4byte	0x33
-	.uleb128 0x2
-	.byte	0x4
-	.byte	0x7
-	.4byte	.LASF301
-	.uleb128 0x8
-	.4byte	.LASF302
-	.byte	0xe
-	.byte	0xc
-	.4byte	0x8f
-	.uleb128 0x3
-	.4byte	.LASF303
-	.byte	0xf
-	.byte	0xc
-	.4byte	0x33
-	.uleb128 0x3
-	.4byte	.LASF304
-	.byte	0xf
-	.byte	0xf
-	.4byte	0x25
-	.uleb128 0x3
-	.4byte	.LASF305
-	.byte	0xf
-	.byte	0x12
-	.4byte	0x2c
-	.uleb128 0x3
-	.4byte	.LASF306
-	.byte	0xf
-	.byte	0x16
-	.4byte	0x96
-	.uleb128 0x2a
-	.ascii	"u8\000"
-	.byte	0xf
-	.byte	0x1f
-	.4byte	0x33
-	.uleb128 0x4
-	.4byte	0x19f1
-	.uleb128 0x2a
-	.ascii	"u32\000"
-	.byte	0xf
-	.byte	0x25
-	.4byte	0x2c
-	.uleb128 0x3
-	.4byte	.LASF307
-	.byte	0xf
-	.byte	0x35
-	.4byte	0x19b3
-	.uleb128 0x3
-	.4byte	.LASF308
-	.byte	0xf
-	.byte	0x36
-	.4byte	0x19b3
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x1a2e
-	.uleb128 0x2
-	.byte	0x1
-	.byte	0x8
-	.4byte	.LASF309
-	.uleb128 0x4
-	.4byte	0x1a27
-	.uleb128 0x3
-	.4byte	.LASF310
-	.byte	0x10
-	.byte	0x16
-	.4byte	0x25
-	.uleb128 0x2
-	.byte	0x4
-	.byte	0x5
-	.4byte	.LASF311
-	.uleb128 0x3
-	.4byte	.LASF312
-	.byte	0x10
-	.byte	0x25
-	.4byte	0x2c
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x1a27
-	.uleb128 0x3
-	.4byte	.LASF313
-	.byte	0x10
-	.byte	0x38
-	.4byte	0x9d
-	.uleb128 0x3
-	.4byte	.LASF314
-	.byte	0x11
-	.byte	0xb
-	.4byte	0x1a33
-	.uleb128 0x3
-	.4byte	.LASF315
-	.byte	0x11
-	.byte	0x2c
-	.4byte	0x1a56
-	.uleb128 0x3
-	.4byte	.LASF316
-	.byte	0x11
-	.byte	0x35
-	.4byte	0x1a45
-	.uleb128 0x3
-	.4byte	.LASF317
-	.byte	0x11
-	.byte	0x52
-	.4byte	0x33
-	.uleb128 0x4
-	.4byte	0x1a82
-	.uleb128 0x3
-	.4byte	.LASF318
-	.byte	0x11
-	.byte	0x55
-	.4byte	0x19b3
-	.uleb128 0x3
-	.4byte	.LASF319
-	.byte	0x11
-	.byte	0x59
-	.4byte	0x25
-	.uleb128 0x3
-	.4byte	.LASF320
-	.byte	0x11
-	.byte	0x5b
-	.4byte	0x19b3
-	.uleb128 0x3
-	.4byte	.LASF321
-	.byte	0x11
-	.byte	0x69
-	.4byte	0x19c5
-	.uleb128 0x3
-	.4byte	.LASF322
-	.byte	0x11
-	.byte	0x6b
-	.4byte	0x19db
-	.uleb128 0x3
-	.4byte	.LASF323
-	.byte	0x11
-	.byte	0x6f
-	.4byte	0x19e6
-	.uleb128 0x3
-	.4byte	.LASF324
-	.byte	0x11
-	.byte	0x95
-	.4byte	0x19d0
-	.uleb128 0x3
-	.4byte	.LASF325
-	.byte	0x11
-	.byte	0x97
-	.4byte	0x19db
-	.uleb128 0x2b
-	.byte	0x4
-	.uleb128 0x8
-	.4byte	.LASF326
-	.byte	0x12
-	.byte	0xb
-	.4byte	0x1a50
-	.uleb128 0x2
-	.byte	0x1
-	.byte	0x2
-	.4byte	.LASF327
-	.uleb128 0x6
-	.4byte	0x1a27
-	.4byte	0x1b09
-	.uleb128 0x7
-	.byte	0
-	.uleb128 0x19
-	.4byte	.LASF328
-	.byte	0x13
-	.2byte	0x140
-	.4byte	0x1afe
-	.uleb128 0x19
-	.4byte	.LASF329
-	.byte	0x13
-	.2byte	0x143
-	.4byte	0x1afe
-	.uleb128 0x19
-	.4byte	.LASF330
-	.byte	0x13
-	.2byte	0x143
-	.4byte	0x1afe
-	.uleb128 0x6
-	.4byte	0x1a27
-	.4byte	0x1b3d
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x8
-	.byte	0
-	.uleb128 0x2c
-	.4byte	.LASF851
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x1b3d
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x1b4e
-	.uleb128 0x2d
-	.uleb128 0x6
-	.4byte	0x1aa8
-	.4byte	0x1b5a
-	.uleb128 0x7
-	.byte	0
-	.uleb128 0x8
-	.4byte	.LASF331
-	.byte	0x14
-	.byte	0x10
-	.4byte	0x1b4f
-	.uleb128 0x6
-	.4byte	0x33
-	.4byte	0x1b75
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x5
-	.byte	0
-	.uleb128 0x9
-	.4byte	.LASF332
-	.byte	0x8
-	.byte	0x15
-	.byte	0x16
-	.4byte	0x1b9a
-	.uleb128 0xa
-	.4byte	.LASF333
-	.byte	0x15
-	.byte	0x17
-	.4byte	0x1b9a
-	.byte	0
-	.uleb128 0xa
-	.4byte	.LASF334
-	.byte	0x15
-	.byte	0x17
-	.4byte	0x1b9a
-	.byte	0x4
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x1b75
-	.uleb128 0x9
-	.4byte	.LASF335
-	.byte	0x8
-	.byte	0x16
-	.byte	0xf
-	.4byte	0x1bc5
-	.uleb128 0xa
-	.4byte	.LASF336
-	.byte	0x16
-	.byte	0x10
-	.4byte	0x1a50
-	.byte	0
-	.uleb128 0xa
-	.4byte	.LASF337
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-	.byte	0x11
-	.4byte	0x1bde
-	.byte	0x4
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x1ba0
-	.uleb128 0x17
-	.4byte	0x8f
-	.4byte	0x1bde
-	.uleb128 0x18
-	.4byte	0x8f
-	.uleb128 0x18
-	.4byte	0x8f
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x1bca
-	.uleb128 0x6
-	.4byte	0x1bc5
-	.4byte	0x1bef
-	.uleb128 0x7
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x1be4
-	.uleb128 0x8
-	.4byte	.LASF335
-	.byte	0x16
-	.byte	0xcd
-	.4byte	0x1bef
-	.uleb128 0xe
-	.2byte	0xa0c
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-	.byte	0x13
-	.4byte	0x1c46
-	.uleb128 0xa
-	.4byte	.LASF338
-	.byte	0x17
-	.byte	0x14
-	.4byte	0x1aa8
-	.byte	0
-	.uleb128 0xa
-	.4byte	.LASF339
-	.byte	0x17
-	.byte	0x15
-	.4byte	0x1a9d
-	.byte	0x4
-	.uleb128 0xa
-	.4byte	.LASF340
-	.byte	0x17
-	.byte	0x16
-	.4byte	0x1aa8
-	.byte	0x8
-	.uleb128 0xa
-	.4byte	.LASF176
-	.byte	0x17
-	.byte	0x17
-	.4byte	0x1c46
-	.byte	0xc
-	.uleb128 0xf
-	.4byte	.LASF341
-	.byte	0x17
-	.byte	0x18
-	.4byte	0x1c57
-	.2byte	0x80c
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x1aa8
-	.4byte	0x1c57
-	.uleb128 0x14
-	.4byte	0x2aa
-	.2byte	0x1ff
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x19a8
-	.4byte	0x1c68
-	.uleb128 0x14
-	.4byte	0x2aa
-	.2byte	0x1ff
-	.byte	0
-	.uleb128 0x3
-	.4byte	.LASF342
-	.byte	0x17
-	.byte	0x32
-	.4byte	0x1bff
-	.uleb128 0x6
-	.4byte	0x1c68
-	.4byte	0x1c7e
-	.uleb128 0x7
-	.byte	0
-	.uleb128 0x8
-	.4byte	.LASF343
-	.byte	0x17
-	.byte	0x34
-	.4byte	0x1c73
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x4
-	.4byte	.LASF344
-	.uleb128 0x9
-	.4byte	.LASF345
-	.byte	0x8
-	.byte	0x18
-	.byte	0x10
-	.4byte	0x1cb5
-	.uleb128 0xa
-	.4byte	.LASF346
-	.byte	0x18
-	.byte	0x11
-	.4byte	0x1a0b
-	.byte	0
-	.uleb128 0xa
-	.4byte	.LASF338
-	.byte	0x18
-	.byte	0x12
-	.4byte	0x1a16
-	.byte	0x4
-	.byte	0
-	.uleb128 0x9
-	.4byte	.LASF347
-	.byte	0x50
-	.byte	0x18
-	.byte	0x15
-	.4byte	0x1ce6
-	.uleb128 0xb
-	.ascii	"cnt\000"
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-	.uleb128 0x1b
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-	.uleb128 0x1b
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-	.uleb128 0x1b
-	.4byte	.LASF463
-	.byte	0x14
-	.uleb128 0x1b
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-	.uleb128 0x1b
-	.4byte	.LASF465
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-	.uleb128 0x1b
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-	.uleb128 0x1b
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-	.uleb128 0x1b
-	.4byte	.LASF469
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-	.uleb128 0x1b
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-	.uleb128 0x1b
-	.4byte	.LASF471
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-	.uleb128 0x1b
-	.4byte	.LASF472
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-	.uleb128 0x1b
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-	.uleb128 0x1b
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-	.uleb128 0x1b
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-	.uleb128 0x1b
-	.4byte	.LASF477
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-	.uleb128 0x1b
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-	.uleb128 0x1b
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-	.uleb128 0x1b
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-	.uleb128 0x1b
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-	.uleb128 0x1b
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-	.uleb128 0x1b
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-	.uleb128 0x1b
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-	.uleb128 0x1b
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-	.uleb128 0x1b
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-	.uleb128 0x1b
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-	.uleb128 0x1b
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-	.uleb128 0x1b
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-	.uleb128 0x1b
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-	.uleb128 0x1b
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-	.uleb128 0x1b
-	.4byte	.LASF502
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-	.uleb128 0x1b
-	.4byte	.LASF503
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-	.uleb128 0x1b
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-	.uleb128 0x1b
-	.4byte	.LASF505
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-	.uleb128 0x1b
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-	.uleb128 0x1b
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-	.uleb128 0x1b
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-	.uleb128 0x1b
-	.4byte	.LASF509
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-	.uleb128 0x1b
-	.4byte	.LASF510
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-	.uleb128 0x1b
-	.4byte	.LASF511
-	.byte	0x44
-	.uleb128 0x1b
-	.4byte	.LASF512
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-	.uleb128 0x1b
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-	.uleb128 0x1b
-	.4byte	.LASF514
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-	.uleb128 0x1b
-	.4byte	.LASF515
-	.byte	0x48
-	.uleb128 0x1b
-	.4byte	.LASF516
-	.byte	0x49
-	.uleb128 0x1b
-	.4byte	.LASF517
-	.byte	0x4a
-	.uleb128 0x1b
-	.4byte	.LASF518
-	.byte	0x4b
-	.uleb128 0x1b
-	.4byte	.LASF519
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-	.uleb128 0x1b
-	.4byte	.LASF520
-	.byte	0x4d
-	.uleb128 0x1b
-	.4byte	.LASF521
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-	.uleb128 0x1b
-	.4byte	.LASF522
-	.byte	0x4f
-	.uleb128 0x1b
-	.4byte	.LASF523
-	.byte	0x50
-	.uleb128 0x31
-	.4byte	.LASF524
-	.sleb128 -1
-	.byte	0
-	.uleb128 0x32
-	.byte	0x4
-	.4byte	0x2c
-	.byte	0x2c
-	.byte	0xe0
-	.4byte	0x2462
-	.uleb128 0x1b
-	.4byte	.LASF525
-	.byte	0x5
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x1a27
-	.4byte	0x2472
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x1f
-	.byte	0
-	.uleb128 0x8
-	.4byte	.LASF526
-	.byte	0xd
-	.byte	0xa6
-	.4byte	0x1aa8
-	.uleb128 0x6
-	.4byte	0x19f1
-	.4byte	0x2488
-	.uleb128 0x7
-	.byte	0
-	.uleb128 0x8
-	.4byte	.LASF527
-	.byte	0xd
-	.byte	0xa8
-	.4byte	0x247d
-	.uleb128 0x8
-	.4byte	.LASF528
-	.byte	0xd
-	.byte	0xa9
-	.4byte	0x247d
-	.uleb128 0x8
-	.4byte	.LASF529
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-	.byte	0xf7
-	.4byte	0x1aa8
-	.uleb128 0x8
-	.4byte	.LASF530
-	.byte	0xd
-	.byte	0xf8
-	.4byte	0x1aa8
-	.uleb128 0x8
-	.4byte	.LASF531
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-	.byte	0xf9
-	.4byte	0x1aa8
-	.uleb128 0x9
-	.4byte	.LASF532
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-	.byte	0x1f
-	.byte	0x2e
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-	.4byte	.LASF533
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-	.byte	0x2f
-	.4byte	0x1adf
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-	.byte	0
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-	.4byte	0x19a8
-	.uleb128 0x9
-	.4byte	.LASF534
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-	.byte	0xa6
-	.4byte	0x257b
-	.uleb128 0xa
-	.4byte	.LASF336
-	.byte	0x1f
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-	.byte	0
-	.uleb128 0xa
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-	.4byte	0x1a0b
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-	.byte	0xab
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-	.4byte	.LASF537
-	.byte	0x1f
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-	.4byte	.LASF540
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-	.byte	0x2c
-	.uleb128 0xa
-	.4byte	.LASF541
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-	.byte	0x30
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-	.uleb128 0x19
-	.4byte	.LASF548
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-	.uleb128 0x19
-	.4byte	.LASF549
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-	.uleb128 0x19
-	.4byte	.LASF550
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-	.4byte	.LASF555
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-	.uleb128 0x19
-	.4byte	.LASF556
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-	.4byte	.LASF562
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-	.4byte	.LASF563
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-	.4byte	0x74
-	.byte	0x8
-	.byte	0
-	.uleb128 0x28
-	.4byte	.LASF668
-	.byte	0xc
-	.byte	0x20
-	.2byte	0x10d
-	.4byte	0x2f1e
-	.uleb128 0x23
-	.4byte	.LASF17
-	.byte	0x20
-	.2byte	0x10f
-	.4byte	0x13e
-	.byte	0
-	.uleb128 0x23
-	.4byte	.LASF18
-	.byte	0x20
-	.2byte	0x110
-	.4byte	0x13e
-	.byte	0x4
-	.uleb128 0x23
-	.4byte	.LASF669
-	.byte	0x20
-	.2byte	0x111
-	.4byte	0x74
-	.byte	0x8
-	.byte	0
-	.uleb128 0x35
-	.4byte	.LASF670
-	.byte	0x21
-	.byte	0x12
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_type
-	.uleb128 0x35
-	.4byte	.LASF671
-	.byte	0x21
-	.byte	0x13
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_die_num
-	.uleb128 0x35
-	.4byte	.LASF672
-	.byte	0x21
-	.byte	0x14
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_planes_per_die
-	.uleb128 0x35
-	.4byte	.LASF673
-	.byte	0x21
-	.byte	0x15
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_blks_per_die
-	.uleb128 0x35
-	.4byte	.LASF674
-	.byte	0x21
-	.byte	0x16
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_blks_per_die_shift
-	.uleb128 0x35
-	.4byte	.LASF675
-	.byte	0x21
-	.byte	0x17
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_planes_num
-	.uleb128 0x35
-	.4byte	.LASF676
-	.byte	0x21
-	.byte	0x18
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_blk_pre_plane
-	.uleb128 0x35
-	.4byte	.LASF677
-	.byte	0x21
-	.byte	0x19
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_ext_blk_pre_plane
-	.uleb128 0x35
-	.4byte	.LASF678
-	.byte	0x21
-	.byte	0x1a
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_bbm_buf_size
-	.uleb128 0x35
-	.4byte	.LASF679
-	.byte	0x21
-	.byte	0x1c
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_page_pre_blk
-	.uleb128 0x35
-	.4byte	.LASF680
-	.byte	0x21
-	.byte	0x1d
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_page_pre_slc_blk
-	.uleb128 0x35
-	.4byte	.LASF681
-	.byte	0x21
-	.byte	0x1e
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_page_pre_super_blk
-	.uleb128 0x35
-	.4byte	.LASF682
-	.byte	0x21
-	.byte	0x1f
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_sec_pre_page
-	.uleb128 0x35
-	.4byte	.LASF683
-	.byte	0x21
-	.byte	0x20
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_sec_pre_page_shift
-	.uleb128 0x35
-	.4byte	.LASF684
-	.byte	0x21
-	.byte	0x26
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_byte_pre_page
-	.uleb128 0x35
-	.4byte	.LASF685
-	.byte	0x21
-	.byte	0x27
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_byte_pre_oob
-	.uleb128 0x35
-	.4byte	.LASF686
-	.byte	0x21
-	.byte	0x28
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_reserved_blks
-	.uleb128 0x35
-	.4byte	.LASF687
-	.byte	0x21
-	.byte	0x29
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_totle_phy_blks
-	.uleb128 0x35
-	.4byte	.LASF688
-	.byte	0x21
-	.byte	0x2b
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_map_region_num
-	.uleb128 0x35
-	.4byte	.LASF689
-	.byte	0x21
-	.byte	0x2c
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_l2pmap_ram_region_num
-	.uleb128 0x35
-	.4byte	.LASF690
-	.byte	0x21
-	.byte	0x2e
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_vendor_region_num
-	.uleb128 0x35
-	.4byte	.LASF691
-	.byte	0x21
-	.byte	0x30
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_map_blks_per_plane
-	.uleb128 0x35
-	.4byte	.LASF692
-	.byte	0x21
-	.byte	0x31
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_max_map_blks
-	.uleb128 0x35
-	.4byte	.LASF693
-	.byte	0x21
-	.byte	0x32
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_max_vendor_blks
-	.uleb128 0x35
-	.4byte	.LASF694
-	.byte	0x21
-	.byte	0x33
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_vendor_part_size
-	.uleb128 0x35
-	.4byte	.LASF695
-	.byte	0x21
-	.byte	0x34
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_sys_blks_per_plane
-	.uleb128 0x35
-	.4byte	.LASF696
-	.byte	0x21
-	.byte	0x35
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_init_sys_blks_per_plane
-	.uleb128 0x35
-	.4byte	.LASF697
-	.byte	0x21
-	.byte	0x36
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_max_sys_blks
-	.uleb128 0x35
-	.4byte	.LASF698
-	.byte	0x21
-	.byte	0x37
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_data_blks_per_plane
-	.uleb128 0x35
-	.4byte	.LASF699
-	.byte	0x21
-	.byte	0x38
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_data_op_blks_per_plane
-	.uleb128 0x35
-	.4byte	.LASF700
-	.byte	0x21
-	.byte	0x39
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_max_data_blks
-	.uleb128 0x35
-	.4byte	.LASF701
-	.byte	0x21
-	.byte	0x3a
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	ftl_gc_temp_power_lost_recovery_flag
-	.uleb128 0x35
-	.4byte	.LASF702
-	.byte	0x21
-	.byte	0x3c
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_GlobalSysVersion
-	.uleb128 0x35
-	.4byte	.LASF703
-	.byte	0x21
-	.byte	0x3d
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_GlobalDataVersion
-	.uleb128 0x35
-	.4byte	.LASF704
-	.byte	0x21
-	.byte	0x3e
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_MaxLbaSector
-	.uleb128 0x35
-	.4byte	.LASF705
-	.byte	0x21
-	.byte	0x3f
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_MaxLpn
-	.uleb128 0x35
-	.4byte	.LASF706
-	.byte	0x21
-	.byte	0x40
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_VaildLpn
-	.uleb128 0x35
-	.4byte	.LASF707
-	.byte	0x21
-	.byte	0x41
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_MaxLbn
-	.uleb128 0x35
-	.4byte	.LASF708
-	.byte	0x21
-	.byte	0x42
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_SlcPartLbaEndSector
-	.uleb128 0x35
-	.4byte	.LASF709
-	.byte	0x21
-	.byte	0x43
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_inkDie_check_enable
-	.uleb128 0x35
-	.4byte	.LASF710
-	.byte	0x21
-	.byte	0x44
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_flash_read_only_en
-	.uleb128 0x35
-	.4byte	.LASF711
-	.byte	0x21
-	.byte	0x46
-	.4byte	0x27bd
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gBbtInfo
-	.uleb128 0x35
-	.4byte	.LASF712
-	.byte	0x21
-	.byte	0x47
-	.4byte	0x283d
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gSysInfo
-	.uleb128 0x35
-	.4byte	.LASF713
-	.byte	0x21
-	.byte	0x48
-	.4byte	0x2db6
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gSysFreeQueue
-	.uleb128 0x35
-	.4byte	.LASF714
-	.byte	0x21
-	.byte	0x49
-	.4byte	0x2885
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gL2pMapInfo
-	.uleb128 0x35
-	.4byte	.LASF715
-	.byte	0x21
-	.byte	0x4a
-	.4byte	0x2885
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gVendorBlkInfo
-	.uleb128 0x35
-	.4byte	.LASF716
-	.byte	0x21
-	.byte	0x4b
-	.4byte	0xc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	req_sys
-	.uleb128 0x35
-	.4byte	.LASF717
-	.byte	0x21
-	.byte	0x4c
-	.4byte	0x676
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	req_read
-	.uleb128 0x35
-	.4byte	.LASF718
-	.byte	0x21
-	.byte	0x4d
-	.4byte	0x676
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	req_prgm
-	.uleb128 0x35
-	.4byte	.LASF719
-	.byte	0x21
-	.byte	0x4e
-	.4byte	0x676
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	req_erase
-	.uleb128 0x35
-	.4byte	.LASF720
-	.byte	0x21
-	.byte	0x4f
-	.4byte	0x676
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	req_gc
-	.uleb128 0x35
-	.4byte	.LASF721
-	.byte	0x21
-	.byte	0x50
-	.4byte	0x676
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	req_gc_dst
-	.uleb128 0x35
-	.4byte	.LASF722
-	.byte	0x21
-	.byte	0x52
-	.4byte	0x676
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_req_cache
-	.uleb128 0x6
-	.4byte	0x3a
-	.4byte	0x32b3
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x1f
-	.byte	0
-	.uleb128 0x35
-	.4byte	.LASF723
-	.byte	0x21
-	.byte	0x54
-	.4byte	0x32a3
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_plane_order_table
-	.uleb128 0x35
-	.4byte	.LASF724
-	.byte	0x21
-	.byte	0x5e
-	.4byte	0x13e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_sys_data_buf
-	.uleb128 0x35
-	.4byte	.LASF725
-	.byte	0x21
-	.byte	0x5f
-	.4byte	0x13e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_sys_data_buf_1
-	.uleb128 0x35
-	.4byte	.LASF726
-	.byte	0x21
-	.byte	0x60
-	.4byte	0x13e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_vendor_data_buf
-	.uleb128 0x35
-	.4byte	.LASF727
-	.byte	0x21
-	.byte	0x61
-	.4byte	0x13e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_sys_spare_buf
-	.uleb128 0x35
-	.4byte	.LASF728
-	.byte	0x21
-	.byte	0x62
-	.4byte	0x13e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_io_data_buf_0
-	.uleb128 0x35
-	.4byte	.LASF729
-	.byte	0x21
-	.byte	0x63
-	.4byte	0x13e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_io_data_buf_1
-	.uleb128 0x35
-	.4byte	.LASF730
-	.byte	0x21
-	.byte	0x64
-	.4byte	0x13e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_io_spare_buf
-	.uleb128 0x35
-	.4byte	.LASF731
-	.byte	0x21
-	.byte	0x65
-	.4byte	0x13e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_gc_spare_buf
-	.uleb128 0x35
-	.4byte	.LASF732
-	.byte	0x21
-	.byte	0x66
-	.4byte	0x13e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_gc_data_buf
-	.uleb128 0x35
-	.4byte	.LASF733
-	.byte	0x21
-	.byte	0x67
-	.4byte	0x336e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gp_gc_page_buf_info
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x2ee9
-	.uleb128 0x35
-	.4byte	.LASF734
-	.byte	0x21
-	.byte	0x68
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_gc_page_buf_num
-	.uleb128 0x35
-	.4byte	.LASF735
-	.byte	0x21
-	.byte	0x69
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_num_req
-	.uleb128 0x35
-	.4byte	.LASF736
-	.byte	0x21
-	.byte	0x6b
-	.4byte	0x33a7
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gp_ect_tbl_info
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x297d
-	.uleb128 0x35
-	.4byte	.LASF737
-	.byte	0x21
-	.byte	0x6c
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_ect_tbl_info_size
-	.uleb128 0x35
-	.4byte	.LASF738
-	.byte	0x21
-	.byte	0x70
-	.4byte	0x293a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_erase_count_table
-	.uleb128 0x35
-	.4byte	.LASF739
-	.byte	0x21
-	.byte	0x72
-	.4byte	0x293a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_swl_mul_table
-	.uleb128 0x35
-	.4byte	.LASF740
-	.byte	0x21
-	.byte	0x73
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_swl_count
-	.uleb128 0x35
-	.4byte	.LASF741
-	.byte	0x21
-	.byte	0x74
-	.4byte	0x293a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_valid_page_count_table
-	.uleb128 0x35
-	.4byte	.LASF742
-	.byte	0x21
-	.byte	0x75
-	.4byte	0x293a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_valid_page_count_check_table
-	.uleb128 0x35
-	.4byte	.LASF743
-	.byte	0x21
-	.byte	0x76
-	.4byte	0x13e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_blk_mode_table
-	.uleb128 0x35
-	.4byte	.LASF744
-	.byte	0x21
-	.byte	0x78
-	.4byte	0x293a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_map_block_table
-	.uleb128 0x35
-	.4byte	.LASF745
-	.byte	0x21
-	.byte	0x79
-	.4byte	0x293a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_map_block_valid_page_count
-	.uleb128 0x35
-	.4byte	.LASF746
-	.byte	0x21
-	.byte	0x7a
-	.4byte	0x13e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_map_block_ver_table
-	.uleb128 0x35
-	.4byte	.LASF747
-	.byte	0x21
-	.byte	0x7b
-	.4byte	0x13e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_map_region_ppn_table
-	.uleb128 0x35
-	.4byte	.LASF748
-	.byte	0x21
-	.byte	0x7c
-	.4byte	0x13e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_map_region_ppn_check_table
-	.uleb128 0x35
-	.4byte	.LASF749
-	.byte	0x21
-	.byte	0x7d
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_map_block
-	.uleb128 0x35
-	.4byte	.LASF750
-	.byte	0x21
-	.byte	0x7f
-	.4byte	0x293a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_vendor_block_table
-	.uleb128 0x35
-	.4byte	.LASF751
-	.byte	0x21
-	.byte	0x80
-	.4byte	0x293a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_vendor_block_valid_page_count
-	.uleb128 0x35
-	.4byte	.LASF752
-	.byte	0x21
-	.byte	0x81
-	.4byte	0x13e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_vendor_block_ver_table
-	.uleb128 0x35
-	.4byte	.LASF753
-	.byte	0x21
-	.byte	0x82
-	.4byte	0x13e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_vendor_region_ppn_table
-	.uleb128 0x35
-	.4byte	.LASF754
-	.byte	0x21
-	.byte	0x83
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_vendor_block
-	.uleb128 0x35
-	.4byte	.LASF755
-	.byte	0x21
-	.byte	0x85
-	.4byte	0x34f0
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_l2p_ram_map
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x2940
-	.uleb128 0x35
-	.4byte	.LASF756
-	.byte	0x21
-	.byte	0x86
-	.4byte	0x13e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_l2p_map_buf
-	.uleb128 0x35
-	.4byte	.LASF757
-	.byte	0x21
-	.byte	0x87
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_l2p_last_update_region_id
-	.uleb128 0x35
-	.4byte	.LASF758
-	.byte	0x21
-	.byte	0x8e
-	.4byte	0x3529
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_data_block_list_table
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x2d85
-	.uleb128 0x35
-	.4byte	.LASF759
-	.byte	0x21
-	.byte	0x8f
-	.4byte	0x3529
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_free_data_block_list_head
-	.uleb128 0x35
-	.4byte	.LASF760
-	.byte	0x21
-	.byte	0x91
-	.4byte	0x3529
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_data_block_list_head
-	.uleb128 0x35
-	.4byte	.LASF761
-	.byte	0x21
-	.byte	0x92
-	.4byte	0x3529
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_data_block_list_tail
-	.uleb128 0x35
-	.4byte	.LASF762
-	.byte	0x21
-	.byte	0x93
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_num_free_superblocks
-	.uleb128 0x35
-	.4byte	.LASF763
-	.byte	0x21
-	.byte	0x94
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_num_data_superblocks
-	.uleb128 0x35
-	.4byte	.LASF764
-	.byte	0x21
-	.byte	0x95
-	.4byte	0x2e11
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_active_superblock
-	.uleb128 0x35
-	.4byte	.LASF765
-	.byte	0x21
-	.byte	0x96
-	.4byte	0x2e11
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_buffer_superblock
-	.uleb128 0x35
-	.4byte	.LASF766
-	.byte	0x21
-	.byte	0x97
-	.4byte	0x2e11
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_temp_superblock
-	.uleb128 0x35
-	.4byte	.LASF767
-	.byte	0x21
-	.byte	0x98
-	.4byte	0x2e11
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_superblock
-	.uleb128 0x35
-	.4byte	.LASF768
-	.byte	0x21
-	.byte	0x99
-	.4byte	0x35d9
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gp_last_act_superblock
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x2e11
-	.uleb128 0x35
-	.4byte	.LASF769
-	.byte	0x21
-	.byte	0x9a
-	.4byte	0x2b32
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_sys_save_data
-	.uleb128 0x35
-	.4byte	.LASF770
-	.byte	0x21
-	.byte	0x9b
-	.4byte	0x2c2f
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_sys_ext_data
-	.uleb128 0x35
-	.4byte	.LASF771
-	.byte	0x21
-	.byte	0x9d
-	.4byte	0x3612
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_gc_page_info
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x2eb4
-	.uleb128 0x35
-	.4byte	.LASF772
-	.byte	0x21
-	.byte	0x9e
-	.4byte	0x293a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_gc_blk_tbl
-	.uleb128 0x35
-	.4byte	.LASF773
-	.byte	0x21
-	.byte	0x9f
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_blk_num
-	.uleb128 0x35
-	.4byte	.LASF774
-	.byte	0x21
-	.byte	0xa0
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_page_offset
-	.uleb128 0x35
-	.4byte	.LASF775
-	.byte	0x21
-	.byte	0xa1
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_cur_blk_valid_pages
-	.uleb128 0x35
-	.4byte	.LASF776
-	.byte	0x21
-	.byte	0xa2
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_cur_blk_max_valid_pages
-	.uleb128 0x35
-	.4byte	.LASF777
-	.byte	0x21
-	.byte	0xa3
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_next_blk
-	.uleb128 0x35
-	.4byte	.LASF778
-	.byte	0x21
-	.byte	0xa4
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_next_blk_1
-	.uleb128 0x35
-	.4byte	.LASF779
-	.byte	0x21
-	.byte	0xa5
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_bad_block_temp_num
-	.uleb128 0x35
-	.4byte	.LASF780
-	.byte	0x21
-	.byte	0xa6
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_bad_block_gc_index
-	.uleb128 0x6
-	.4byte	0x57
-	.4byte	0x36c1
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x10
-	.byte	0
-	.uleb128 0x35
-	.4byte	.LASF781
-	.byte	0x21
-	.byte	0xa7
-	.4byte	0x36b1
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_bad_block_temp_tbl
-	.uleb128 0x35
-	.4byte	.LASF782
-	.byte	0x21
-	.byte	0xa8
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_refresh_block_temp_num
-	.uleb128 0x35
-	.4byte	.LASF783
-	.byte	0x21
-	.byte	0xa9
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_free_slc_blk_num
-	.uleb128 0x35
-	.4byte	.LASF784
-	.byte	0x21
-	.byte	0xaa
-	.4byte	0x36b1
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_refresh_block_temp_tbl
-	.uleb128 0x35
-	.4byte	.LASF785
-	.byte	0x21
-	.byte	0xac
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_free_blk_threshold
-	.uleb128 0x35
-	.4byte	.LASF786
-	.byte	0x21
-	.byte	0xad
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_merge_free_blk_threshold
-	.uleb128 0x35
-	.4byte	.LASF787
-	.byte	0x21
-	.byte	0xae
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_blk_index
-	.uleb128 0x35
-	.4byte	.LASF788
-	.byte	0x21
-	.byte	0xb0
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_gc_page_count
-	.uleb128 0x35
-	.4byte	.LASF789
-	.byte	0x21
-	.byte	0xb1
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_write_page_count
-	.uleb128 0x35
-	.4byte	.LASF790
-	.byte	0x21
-	.byte	0xb2
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_write_sector
-	.uleb128 0x35
-	.4byte	.LASF791
-	.byte	0x21
-	.byte	0xb3
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_read_sector
-	.uleb128 0x35
-	.4byte	.LASF792
-	.byte	0x21
-	.byte	0xb5
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_discard_page_count
-	.uleb128 0x35
-	.4byte	.LASF793
-	.byte	0x21
-	.byte	0xb6
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_read_page_count
-	.uleb128 0x35
-	.4byte	.LASF794
-	.byte	0x21
-	.byte	0xb7
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_tmp_data_superblock_id
-	.uleb128 0x35
-	.4byte	.LASF795
-	.byte	0x21
-	.byte	0xb8
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_cache_write_count
-	.uleb128 0x35
-	.4byte	.LASF796
-	.byte	0x21
-	.byte	0xb9
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_l2p_write_count
-	.uleb128 0x35
-	.4byte	.LASF797
-	.byte	0x21
-	.byte	0xbb
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_mlc_erase_count
-	.uleb128 0x35
-	.4byte	.LASF798
-	.byte	0x21
-	.byte	0xbc
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_avg_erase_count
-	.uleb128 0x35
-	.4byte	.LASF799
-	.byte	0x21
-	.byte	0xbd
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_min_erase_count
-	.uleb128 0x35
-	.4byte	.LASF800
-	.byte	0x21
-	.byte	0xbe
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_slc_erase_count
-	.uleb128 0x35
-	.4byte	.LASF801
-	.byte	0x21
-	.byte	0xbf
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_sys_slc_erase_count
-	.uleb128 0x35
-	.4byte	.LASF802
-	.byte	0x21
-	.byte	0xc0
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_max_erase_count
-	.uleb128 0x35
-	.4byte	.LASF803
-	.byte	0x21
-	.byte	0xc1
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_all_blk_used_slc_mode
-	.uleb128 0x35
-	.4byte	.LASF804
-	.byte	0x21
-	.byte	0xc3
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_in_gc_progress
-	.uleb128 0x35
-	.4byte	.LASF805
-	.byte	0x21
-	.byte	0xc4
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_in_swl_replace
-	.uleb128 0x35
-	.4byte	.LASF806
-	.byte	0x21
-	.byte	0xc5
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_ftl_nand_free_count
-	.uleb128 0x35
-	.4byte	.LASF807
-	.byte	0x21
-	.byte	0xc6
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_head_data_block
-	.uleb128 0x35
-	.4byte	.LASF808
-	.byte	0x21
-	.byte	0xc7
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_head_data_block_count
-	.uleb128 0x35
-	.4byte	.LASF809
-	.byte	0x21
-	.byte	0xc8
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_skip_write_count
-	.uleb128 0x35
-	.4byte	.LASF810
-	.byte	0x21
-	.byte	0xc9
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_cur_erase_blk
-	.uleb128 0x35
-	.4byte	.LASF811
-	.byte	0x21
-	.byte	0xcb
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_recovery_page_num
-	.uleb128 0x35
-	.4byte	.LASF812
-	.byte	0x21
-	.byte	0xcc
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_recovery_page_min_ver
-	.uleb128 0x6
-	.4byte	0x74
-	.4byte	0x38f1
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x1f
-	.byte	0
-	.uleb128 0x35
-	.4byte	.LASF813
-	.byte	0x21
-	.byte	0xcd
-	.4byte	0x38e1
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_recovery_ppa_tbl
-	.uleb128 0x35
-	.4byte	.LASF814
-	.byte	0x21
-	.byte	0xce
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_mlc_erase_count_value
-	.uleb128 0x35
-	.4byte	.LASF815
-	.byte	0x21
-	.byte	0xcf
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_power_lost_recovery_flag
-	.uleb128 0x35
-	.4byte	.LASF816
-	.byte	0x21
-	.byte	0xd0
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_power_lost_ecc_error_blk
-	.uleb128 0x35
-	.4byte	.LASF817
-	.byte	0x21
-	.byte	0xd1
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_page_map_check_enable
-	.uleb128 0x8
-	.4byte	.LASF818
-	.byte	0x22
-	.byte	0xe
-	.4byte	0x74
-	.uleb128 0x6
-	.4byte	0x2c1
-	.4byte	0x3961
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x3
-	.byte	0
-	.uleb128 0x36
-	.4byte	.LASF101
-	.byte	0x2
-	.byte	0x10
-	.4byte	0x3951
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	NandOptPara
-	.uleb128 0x6
-	.4byte	0x3e9
-	.4byte	0x3982
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x49
-	.byte	0
-	.uleb128 0x36
-	.4byte	.LASF819
-	.byte	0x2
-	.byte	0x5f
-	.4byte	0x3972
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	NandFlashParaTbl
-	.uleb128 0x37
-	.4byte	0xa80
-	.byte	0x2
-	.byte	0xca
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gNandParaInfo
-	.uleb128 0x35
-	.4byte	.LASF820
-	.byte	0x2
-	.byte	0xcb
-	.4byte	0x3e9
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gSlcNandParaInfo
-	.uleb128 0x6
-	.4byte	0x57
-	.4byte	0x39c1
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x7f
-	.byte	0
-	.uleb128 0x35
-	.4byte	.LASF821
-	.byte	0x2
-	.byte	0xdb
-	.4byte	0x39b1
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	random_seed
-	.uleb128 0x6
-	.4byte	0x45
-	.4byte	0x39e8
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x6
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x3
-	.byte	0
-	.uleb128 0x15
-	.4byte	.LASF822
-	.byte	0x2
-	.2byte	0x547
-	.4byte	0x39d2
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	refValueDefault
-	.uleb128 0x6
-	.4byte	0x45
-	.4byte	0x3a10
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0xf
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x3
-	.byte	0
-	.uleb128 0x15
-	.4byte	.LASF823
-	.byte	0x2
-	.2byte	0x644
-	.4byte	0x39fa
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	SamsungRefValue
-	.uleb128 0x6
-	.4byte	0x45
-	.4byte	0x3a38
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x8
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x4
-	.byte	0
-	.uleb128 0x15
-	.4byte	.LASF824
-	.byte	0x2
-	.2byte	0x65a
-	.4byte	0x3a22
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	ToshibaA19RefValue
-	.uleb128 0x6
-	.4byte	0x45
-	.4byte	0x3a60
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x12
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x4
-	.byte	0
-	.uleb128 0x15
-	.4byte	.LASF825
-	.byte	0x2
-	.2byte	0x670
-	.4byte	0x3a4a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	Toshiba15RefValue
-	.uleb128 0x6
-	.4byte	0x45
-	.4byte	0x3a82
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x7
-	.byte	0
-	.uleb128 0x15
-	.4byte	.LASF826
-	.byte	0x2
-	.2byte	0x688
-	.4byte	0x3a72
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	ToshibaRefValue
-	.uleb128 0x35
-	.4byte	.LASF827
-	.byte	0x4
-	.byte	0x6
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	DeviceCapacity
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-	.uleb128 0x5
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-	.4byte	gFtlInitStatus
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-	.byte	0x4
-	.2byte	0x38f
-	.uleb128 0x5
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-	.uleb128 0x5
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-	.uleb128 0x5
-	.byte	0x3
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-	.4byte	FtlUpdateVaildLpnCount
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-	.uleb128 0x5
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-	.uleb128 0x5
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-	.uleb128 0x23
-	.4byte	.LASF846
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-	.4byte	.LASF848
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-	.byte	0x8
-	.2byte	0x105
-	.4byte	0x1aea
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-	.uleb128 0x23
-	.4byte	.LASF850
-	.byte	0x8
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-	.uleb128 0xc
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-	.4byte	0x3bca
-	.uleb128 0x2c
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-	.uleb128 0xc
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-	.4byte	.LASF852
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-	.4byte	0x3c60
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-	.uleb128 0xa
-	.4byte	.LASF864
-	.byte	0x26
-	.byte	0x3b
-	.4byte	0x1ac9
-	.byte	0
-	.uleb128 0xa
-	.4byte	.LASF879
-	.byte	0x26
-	.byte	0x3c
-	.4byte	0x1abe
-	.byte	0x8
-	.uleb128 0xa
-	.4byte	.LASF920
-	.byte	0x26
-	.byte	0x3d
-	.4byte	0x1abe
-	.byte	0xc
-	.uleb128 0xa
-	.4byte	.LASF921
-	.byte	0x26
-	.byte	0x3e
-	.4byte	0x40c1
-	.byte	0x10
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x19b3
-	.uleb128 0x9
-	.4byte	.LASF922
-	.byte	0x20
-	.byte	0x26
-	.byte	0x54
-	.4byte	0x4134
-	.uleb128 0xa
-	.4byte	.LASF923
-	.byte	0x26
-	.byte	0x55
-	.4byte	0x2c
-	.byte	0
-	.uleb128 0xb
-	.ascii	"len\000"
-	.byte	0x26
-	.byte	0x56
-	.4byte	0x1a77
-	.byte	0x4
-	.uleb128 0xa
-	.4byte	.LASF924
-	.byte	0x26
-	.byte	0x57
-	.4byte	0x1a77
-	.byte	0x8
-	.uleb128 0xa
-	.4byte	.LASF925
-	.byte	0x26
-	.byte	0x58
-	.4byte	0x1a77
-	.byte	0xc
-	.uleb128 0xa
-	.4byte	.LASF926
-	.byte	0x26
-	.byte	0x59
-	.4byte	0x1a77
-	.byte	0x10
-	.uleb128 0xa
-	.4byte	.LASF927
-	.byte	0x26
-	.byte	0x5a
-	.4byte	0x1abe
-	.byte	0x14
-	.uleb128 0xa
-	.4byte	.LASF928
-	.byte	0x26
-	.byte	0x5b
-	.4byte	0x224c
-	.byte	0x18
-	.uleb128 0xa
-	.4byte	.LASF929
-	.byte	0x26
-	.byte	0x5c
-	.4byte	0x224c
-	.byte	0x1c
-	.byte	0
-	.uleb128 0x13
-	.4byte	.LASF930
-	.2byte	0xba8
-	.byte	0x26
-	.byte	0x71
-	.4byte	0x4174
-	.uleb128 0xa
-	.4byte	.LASF931
-	.byte	0x26
-	.byte	0x72
-	.4byte	0x19db
-	.byte	0
-	.uleb128 0xa
-	.4byte	.LASF932
-	.byte	0x26
-	.byte	0x73
-	.4byte	0x4174
-	.byte	0x4
-	.uleb128 0xf
-	.4byte	.LASF883
-	.byte	0x26
-	.byte	0x74
-	.4byte	0x19db
-	.2byte	0xaa4
-	.uleb128 0xf
-	.4byte	.LASF933
-	.byte	0x26
-	.byte	0x75
-	.4byte	0x4185
-	.2byte	0xaa8
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x19db
-	.4byte	0x4185
-	.uleb128 0x14
-	.4byte	0x2aa
-	.2byte	0x2a7
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x3d09
-	.4byte	0x4195
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x1f
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x4134
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x4084
-	.uleb128 0x17
-	.4byte	0x8f
-	.4byte	0x41b5
-	.uleb128 0x18
-	.4byte	0x4067
-	.uleb128 0x18
-	.4byte	0x4078
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x41a1
-	.uleb128 0x17
-	.4byte	0x19b3
-	.4byte	0x41d9
-	.uleb128 0x18
-	.4byte	0x4067
-	.uleb128 0x18
-	.4byte	0x19b3
-	.uleb128 0x18
-	.4byte	0x19b3
-	.uleb128 0x18
-	.4byte	0x19b3
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x41bb
-	.uleb128 0x17
-	.4byte	0x8f
-	.4byte	0x4202
-	.uleb128 0x18
-	.4byte	0x4067
-	.uleb128 0x18
-	.4byte	0x1a6c
-	.uleb128 0x18
-	.4byte	0x1a77
-	.uleb128 0x18
-	.4byte	0x4202
-	.uleb128 0x18
-	.4byte	0x4208
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x1a77
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x1a82
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x41df
-	.uleb128 0x17
-	.4byte	0x8f
-	.4byte	0x4237
-	.uleb128 0x18
-	.4byte	0x4067
-	.uleb128 0x18
-	.4byte	0x1a6c
-	.uleb128 0x18
-	.4byte	0x1a77
-	.uleb128 0x18
-	.4byte	0x4202
-	.uleb128 0x18
-	.4byte	0x4237
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x1a8d
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x4214
-	.uleb128 0x17
-	.4byte	0x8f
-	.4byte	0x425c
-	.uleb128 0x18
-	.4byte	0x4067
-	.uleb128 0x18
-	.4byte	0x1a6c
-	.uleb128 0x18
-	.4byte	0x425c
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x40c7
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x4243
-	.uleb128 0x17
-	.4byte	0x8f
-	.4byte	0x4286
-	.uleb128 0x18
-	.4byte	0x4067
-	.uleb128 0x18
-	.4byte	0x1a77
-	.uleb128 0x18
-	.4byte	0x4202
-	.uleb128 0x18
-	.4byte	0x4286
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x3cd8
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x4268
-	.uleb128 0x17
-	.4byte	0x8f
-	.4byte	0x42ab
-	.uleb128 0x18
-	.4byte	0x4067
-	.uleb128 0x18
-	.4byte	0x1a6c
-	.uleb128 0x18
-	.4byte	0x1a77
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x4292
-	.uleb128 0x33
-	.4byte	0x42bc
-	.uleb128 0x18
-	.4byte	0x4067
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x42b1
-	.uleb128 0x17
-	.4byte	0x8f
-	.4byte	0x42db
-	.uleb128 0x18
-	.4byte	0x4067
-	.uleb128 0x18
-	.4byte	0x1a6c
-	.uleb128 0x18
-	.4byte	0x1ac9
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x42c2
-	.uleb128 0x17
-	.4byte	0x8f
-	.4byte	0x42f5
-	.uleb128 0x18
-	.4byte	0x4067
-	.uleb128 0x18
-	.4byte	0x1a6c
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x42e1
-	.uleb128 0x17
-	.4byte	0x8f
-	.4byte	0x430a
-	.uleb128 0x18
-	.4byte	0x4067
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x42fb
-	.uleb128 0x2c
-	.4byte	.LASF934
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x4310
-	.uleb128 0x28
-	.4byte	.LASF935
-	.byte	0xac
-	.byte	0x27
-	.2byte	0x161
-	.4byte	0x43ab
-	.uleb128 0x23
-	.4byte	.LASF936
-	.byte	0x27
-	.2byte	0x162
-	.4byte	0x1adf
-	.byte	0
-	.uleb128 0x23
-	.4byte	.LASF937
-	.byte	0x27
-	.2byte	0x163
-	.4byte	0x1adf
-	.byte	0x4
-	.uleb128 0x23
-	.4byte	.LASF938
-	.byte	0x27
-	.2byte	0x164
-	.4byte	0x1adf
-	.byte	0x8
-	.uleb128 0x23
-	.4byte	.LASF939
-	.byte	0x27
-	.2byte	0x165
-	.4byte	0x19c5
-	.byte	0xc
-	.uleb128 0x23
-	.4byte	.LASF940
-	.byte	0x27
-	.2byte	0x166
-	.4byte	0x19c5
-	.byte	0xd
-	.uleb128 0x23
-	.4byte	.LASF941
-	.byte	0x27
-	.2byte	0x167
-	.4byte	0x1ad4
-	.byte	0xe
-	.uleb128 0x23
-	.4byte	.LASF336
-	.byte	0x27
-	.2byte	0x16b
-	.4byte	0x43ab
-	.byte	0x10
-	.uleb128 0x23
-	.4byte	.LASF878
-	.byte	0x27
-	.2byte	0x16d
-	.4byte	0x19c5
-	.byte	0x90
-	.uleb128 0x23
-	.4byte	.LASF600
-	.byte	0x27
-	.2byte	0x16e
-	.4byte	0x43bb
-	.byte	0x91
-	.uleb128 0x29
-	.ascii	"crc\000"
-	.byte	0x27
-	.2byte	0x16f
-	.4byte	0x1adf
-	.byte	0xa8
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x1a27
-	.4byte	0x43bb
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x7f
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x19c5
-	.4byte	0x43cb
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x16
-	.byte	0
-	.uleb128 0x3a
-	.byte	0xc
-	.byte	0x28
-	.byte	0xae
-	.4byte	0x43e9
-	.uleb128 0x1f
-	.ascii	"rb\000"
-	.byte	0x28
-	.byte	0xaf
-	.4byte	0x3c88
-	.uleb128 0x12
-	.4byte	.LASF942
-	.byte	0x28
-	.byte	0xb0
-	.4byte	0x1b75
-	.byte	0
-	.uleb128 0x9
-	.4byte	.LASF943
-	.byte	0x14
-	.byte	0x28
-	.byte	0xad
-	.4byte	0x4417
-	.uleb128 0xb
-	.ascii	"u\000"
-	.byte	0x28
-	.byte	0xb1
-	.4byte	0x43cb
-	.byte	0
-	.uleb128 0xb
-	.ascii	"ec\000"
-	.byte	0x28
-	.byte	0xb2
-	.4byte	0x8f
-	.byte	0xc
-	.uleb128 0xa
-	.4byte	.LASF944
-	.byte	0x28
-	.byte	0xb3
-	.4byte	0x8f
-	.byte	0x10
-	.byte	0
-	.uleb128 0x13
-	.4byte	.LASF945
-	.2byte	0x10c
-	.byte	0x28
-	.byte	0xeb
-	.4byte	0x4462
-	.uleb128 0xb
-	.ascii	"e\000"
-	.byte	0x28
-	.byte	0xec
-	.4byte	0x4462
-	.byte	0
-	.uleb128 0xa
-	.4byte	.LASF946
-	.byte	0x28
-	.byte	0xed
-	.4byte	0x4478
-	.byte	0x80
-	.uleb128 0xf
-	.4byte	.LASF947
-	.byte	0x28
-	.byte	0xee
-	.4byte	0x8f
-	.2byte	0x100
-	.uleb128 0xf
-	.4byte	.LASF948
-	.byte	0x28
-	.byte	0xef
-	.4byte	0x8f
-	.2byte	0x104
-	.uleb128 0xf
-	.4byte	.LASF949
-	.byte	0x28
-	.byte	0xf0
-	.4byte	0x8f
-	.2byte	0x108
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x4472
-	.4byte	0x4472
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x1f
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x43e9
-	.uleb128 0x6
-	.4byte	0x8f
-	.4byte	0x4488
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x1f
-	.byte	0
-	.uleb128 0x13
-	.4byte	.LASF950
-	.2byte	0x40c
-	.byte	0x28
-	.byte	0xff
-	.4byte	0x44cd
-	.uleb128 0x23
-	.4byte	.LASF951
-	.byte	0x28
-	.2byte	0x100
-	.4byte	0x44cd
-	.byte	0
-	.uleb128 0x24
-	.4byte	.LASF952
-	.byte	0x28
-	.2byte	0x101
-	.4byte	0x8f
-	.2byte	0x400
-	.uleb128 0x24
-	.4byte	.LASF338
-	.byte	0x28
-	.2byte	0x102
-	.4byte	0x8f
-	.2byte	0x404
-	.uleb128 0x24
-	.4byte	.LASF953
-	.byte	0x28
-	.2byte	0x103
-	.4byte	0x8f
-	.2byte	0x408
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x8f
-	.4byte	0x44dd
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0xff
-	.byte	0
-	.uleb128 0x30
-	.4byte	.LASF954
-	.2byte	0x110
-	.byte	0x28
-	.2byte	0x138
-	.4byte	0x4699
-	.uleb128 0x29
-	.ascii	"dev\000"
-	.byte	0x28
-	.2byte	0x139
-	.4byte	0x3bca
-	.byte	0
-	.uleb128 0x23
-	.4byte	.LASF853
-	.byte	0x28
-	.2byte	0x13a
-	.4byte	0x3c60
-	.byte	0x18
-	.uleb128 0x29
-	.ascii	"ubi\000"
-	.byte	0x28
-	.2byte	0x13b
-	.4byte	0x4b06
-	.byte	0x20
-	.uleb128 0x23
-	.4byte	.LASF955
-	.byte	0x28
-	.2byte	0x13c
-	.4byte	0x8f
-	.byte	0x24
-	.uleb128 0x23
-	.4byte	.LASF956
-	.byte	0x28
-	.2byte	0x13d
-	.4byte	0x8f
-	.byte	0x28
-	.uleb128 0x23
-	.4byte	.LASF957
-	.byte	0x28
-	.2byte	0x13e
-	.4byte	0x8f
-	.byte	0x2c
-	.uleb128 0x23
-	.4byte	.LASF958
-	.byte	0x28
-	.2byte	0x13f
-	.4byte	0x8f
-	.byte	0x30
-	.uleb128 0x23
-	.4byte	.LASF959
-	.byte	0x28
-	.2byte	0x140
-	.4byte	0x8f
-	.byte	0x34
-	.uleb128 0x23
-	.4byte	.LASF960
-	.byte	0x28
-	.2byte	0x141
-	.4byte	0x8f
-	.byte	0x38
-	.uleb128 0x23
-	.4byte	.LASF936
-	.byte	0x28
-	.2byte	0x143
-	.4byte	0x8f
-	.byte	0x3c
-	.uleb128 0x23
-	.4byte	.LASF939
-	.byte	0x28
-	.2byte	0x144
-	.4byte	0x8f
-	.byte	0x40
-	.uleb128 0x23
-	.4byte	.LASF961
-	.byte	0x28
-	.2byte	0x145
-	.4byte	0x8f
-	.byte	0x44
-	.uleb128 0x23
-	.4byte	.LASF962
-	.byte	0x28
-	.2byte	0x146
-	.4byte	0x8f
-	.byte	0x48
-	.uleb128 0x23
-	.4byte	.LASF963
-	.byte	0x28
-	.2byte	0x14a
-	.4byte	0x1a00
-	.byte	0x4c
-	.uleb128 0x23
-	.4byte	.LASF964
-	.byte	0x28
-	.2byte	0x14c
-	.4byte	0x9d
-	.byte	0x50
-	.uleb128 0x23
-	.4byte	.LASF937
-	.byte	0x28
-	.2byte	0x14d
-	.4byte	0x8f
-	.byte	0x58
-	.uleb128 0x23
-	.4byte	.LASF938
-	.byte	0x28
-	.2byte	0x14e
-	.4byte	0x8f
-	.byte	0x5c
-	.uleb128 0x23
-	.4byte	.LASF941
-	.byte	0x28
-	.2byte	0x14f
-	.4byte	0x8f
-	.byte	0x60
-	.uleb128 0x23
-	.4byte	.LASF336
-	.byte	0x28
-	.2byte	0x150
-	.4byte	0x43ab
-	.byte	0x64
-	.uleb128 0x23
-	.4byte	.LASF965
-	.byte	0x28
-	.2byte	0x152
-	.4byte	0x8f
-	.byte	0xe4
-	.uleb128 0x23
-	.4byte	.LASF966
-	.byte	0x28
-	.2byte	0x153
-	.4byte	0x8f
-	.byte	0xe8
-	.uleb128 0x23
-	.4byte	.LASF967
-	.byte	0x28
-	.2byte	0x154
-	.4byte	0x9d
-	.byte	0xf0
-	.uleb128 0x23
-	.4byte	.LASF968
-	.byte	0x28
-	.2byte	0x155
-	.4byte	0x9d
-	.byte	0xf8
-	.uleb128 0x24
-	.4byte	.LASF969
-	.byte	0x28
-	.2byte	0x156
-	.4byte	0x1aea
-	.2byte	0x100
-	.uleb128 0x24
-	.4byte	.LASF970
-	.byte	0x28
-	.2byte	0x158
-	.4byte	0x4b0c
-	.2byte	0x104
-	.uleb128 0x3b
-	.4byte	.LASF971
-	.byte	0x28
-	.2byte	0x159
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x1f
-	.2byte	0x108
-	.uleb128 0x3b
-	.4byte	.LASF972
-	.byte	0x28
-	.2byte	0x15a
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x1e
-	.2byte	0x108
-	.uleb128 0x3b
-	.4byte	.LASF940
-	.byte	0x28
-	.2byte	0x15b
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x1d
-	.2byte	0x108
-	.uleb128 0x3b
-	.4byte	.LASF973
-	.byte	0x28
-	.2byte	0x15c
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x1c
-	.2byte	0x108
-	.uleb128 0x3b
-	.4byte	.LASF974
-	.byte	0x28
-	.2byte	0x15d
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x1b
-	.2byte	0x108
-	.uleb128 0x3b
-	.4byte	.LASF975
-	.byte	0x28
-	.2byte	0x15e
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x1a
-	.2byte	0x108
-	.byte	0
-	.uleb128 0x30
-	.4byte	.LASF976
-	.2byte	0xc08
-	.byte	0x28
-	.2byte	0x212
-	.4byte	0x4b06
-	.uleb128 0x23
-	.4byte	.LASF853
-	.byte	0x28
-	.2byte	0x213
-	.4byte	0x3c60
-	.byte	0
-	.uleb128 0x29
-	.ascii	"dev\000"
-	.byte	0x28
-	.2byte	0x214
-	.4byte	0x3bca
-	.byte	0x8
-	.uleb128 0x23
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-	.uleb128 0x23
-	.4byte	.LASF979
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-	.uleb128 0x23
-	.4byte	.LASF980
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-	.2byte	0x21a
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-	.2byte	0x238
-	.uleb128 0x24
-	.4byte	.LASF982
-	.byte	0x28
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-	.4byte	0x8f
-	.2byte	0x23c
-	.uleb128 0x24
-	.4byte	.LASF983
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-	.2byte	0x21d
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-	.2byte	0x240
-	.uleb128 0x24
-	.4byte	.LASF984
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-	.uleb128 0x24
-	.4byte	.LASF985
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-	.2byte	0x21f
-	.4byte	0x8f
-	.2byte	0x248
-	.uleb128 0x24
-	.4byte	.LASF986
-	.byte	0x28
-	.2byte	0x220
-	.4byte	0x8f
-	.2byte	0x24c
-	.uleb128 0x24
-	.4byte	.LASF987
-	.byte	0x28
-	.2byte	0x221
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-	.uleb128 0x24
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-	.4byte	.LASF989
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-	.2byte	0x224
-	.4byte	0x8f
-	.2byte	0x258
-	.uleb128 0x24
-	.4byte	.LASF990
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-	.2byte	0x25c
-	.uleb128 0x24
-	.4byte	.LASF991
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-	.4byte	0x4c77
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-	.4byte	.LASF992
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-	.2byte	0x229
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-	.2byte	0x268
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-	.4byte	.LASF994
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-	.4byte	.LASF998
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-	.2byte	0x27c
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-	.4byte	.LASF999
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-	.uleb128 0x25
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-	.4byte	0x4c7d
-	.2byte	0x284
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-	.4byte	.LASF1000
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-	.4byte	0x4488
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-	.uleb128 0x24
-	.4byte	.LASF1001
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-	.2byte	0x237
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-	.2byte	0x694
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-	.4byte	.LASF1002
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-	.2byte	0xaa4
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-	.4byte	.LASF1004
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-	.4byte	0x1aea
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-	.uleb128 0x24
-	.4byte	.LASF1005
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-	.4byte	.LASF1078
-	.byte	0x28
-	.2byte	0x30e
-	.4byte	0x3c47
-	.uleb128 0x2c
-	.4byte	.LASF1079
-	.uleb128 0x19
-	.4byte	.LASF1080
-	.byte	0x28
-	.2byte	0x30f
-	.4byte	0x4d0c
-	.uleb128 0x6
-	.4byte	0x4b06
-	.4byte	0x4d28
-	.uleb128 0x7
-	.byte	0
-	.uleb128 0x8
-	.4byte	.LASF1081
-	.byte	0x29
-	.byte	0x4d
-	.4byte	0x4d1d
-	.uleb128 0x6
-	.4byte	0x3a
-	.4byte	0x4d46
-	.uleb128 0x3d
-	.4byte	0x2aa
-	.4byte	0x13ffff
-	.byte	0
-	.uleb128 0x35
-	.4byte	.LASF1082
-	.byte	0x7
-	.byte	0x17
-	.4byte	0x4d33
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	FtlMallocBuffer
-	.uleb128 0x35
-	.4byte	.LASF1083
-	.byte	0x7
-	.byte	0x18
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	FtlMallocOffset
-	.uleb128 0x3e
-	.4byte	.LASF1085
-	.byte	0x7
-	.byte	0x84
-	.4byte	.LFB496
-	.4byte	.LFE496-.LFB496
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4e71
-	.uleb128 0x3f
-	.ascii	"s\000"
-	.byte	0x7
-	.byte	0x84
-	.4byte	0x1a50
-	.4byte	.LLST443
-	.uleb128 0x3f
-	.ascii	"buf\000"
-	.byte	0x7
-	.byte	0x84
-	.4byte	0x1aea
-	.4byte	.LLST444
-	.uleb128 0x40
-	.4byte	.LASF1084
-	.byte	0x7
-	.byte	0x84
-	.4byte	0x74
-	.4byte	.LLST445
-	.uleb128 0x3f
-	.ascii	"len\000"
-	.byte	0x7
-	.byte	0x84
-	.4byte	0x74
-	.4byte	.LLST446
-	.uleb128 0x41
-	.ascii	"i\000"
-	.byte	0x7
-	.byte	0x89
-	.4byte	0x74
-	.4byte	.LLST447
-	.uleb128 0x41
-	.ascii	"j\000"
-	.byte	0x7
-	.byte	0x89
-	.4byte	0x74
-	.4byte	.LLST448
-	.uleb128 0x41
-	.ascii	"p8\000"
-	.byte	0x7
-	.byte	0x8a
-	.4byte	0x1a50
-	.4byte	.LLST449
-	.uleb128 0x41
-	.ascii	"p16\000"
-	.byte	0x7
-	.byte	0x8b
-	.4byte	0x4e71
-	.4byte	.LLST450
-	.uleb128 0x41
-	.ascii	"p32\000"
-	.byte	0x7
-	.byte	0x8c
-	.4byte	0x13e
-	.4byte	.LLST451
-	.uleb128 0x42
-	.4byte	.LVL1410
-	.4byte	0x103ff
-	.4byte	0x4e1d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC18
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1411
-	.4byte	0x103ff
-	.4byte	0x4e40
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC16
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1413
-	.4byte	0x103ff
-	.4byte	0x4e54
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1415
-	.4byte	0x103ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC18
-	.byte	0
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x6d
-	.uleb128 0x46
-	.4byte	.LASF1124
-	.byte	0x7
-	.byte	0x7f
-	.4byte	0x2c
-	.byte	0x1
-	.uleb128 0x3e
-	.4byte	.LASF1086
-	.byte	0x7
-	.byte	0x78
-	.4byte	.LFB494
-	.4byte	.LFE494-.LFB494
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4edc
-	.uleb128 0x47
-	.4byte	0x4edc
-	.4byte	.LBB486
-	.4byte	.LBE486-.LBB486
-	.byte	0x7
-	.byte	0x7a
-	.4byte	0x4eb5
-	.uleb128 0x48
-	.4byte	.LVL2343
-	.4byte	0xbed1
-	.byte	0
-	.uleb128 0x47
-	.4byte	0x4edc
-	.4byte	.LBB488
-	.4byte	.LBE488-.LBB488
-	.byte	0x7
-	.byte	0x7c
-	.4byte	0x4ed2
-	.uleb128 0x49
-	.4byte	.LVL2345
-	.4byte	0xbed1
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2344
-	.4byte	0x9884
-	.byte	0
-	.uleb128 0x4a
-	.4byte	.LASF1088
-	.byte	0x7
-	.byte	0x73
-	.byte	0x1
-	.uleb128 0x4b
-	.4byte	.LASF1090
-	.byte	0x7
-	.byte	0x68
-	.4byte	0x84
-	.4byte	.LFB492
-	.4byte	.LFE492-.LFB492
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4f61
-	.uleb128 0x40
-	.4byte	.LASF1087
-	.byte	0x7
-	.byte	0x68
-	.4byte	0x13e
-	.4byte	.LLST738
-	.uleb128 0x41
-	.ascii	"ret\000"
-	.byte	0x7
-	.byte	0x6a
-	.4byte	0x84
-	.4byte	.LLST739
-	.uleb128 0x44
-	.4byte	.LVL2926
-	.4byte	0xbf65
-	.4byte	0x4f30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2928
-	.4byte	0x98b5
-	.4byte	0x4f47
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR15
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2929
-	.4byte	0x103ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC54
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x4a
-	.4byte	.LASF1089
-	.byte	0x7
-	.byte	0x64
-	.byte	0x1
-	.uleb128 0x4b
-	.4byte	.LASF1091
-	.byte	0x7
-	.byte	0x5b
-	.4byte	0x74
-	.4byte	.LFB490
-	.4byte	.LFE490-.LFB490
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4fde
-	.uleb128 0x40
-	.4byte	.LASF542
-	.byte	0x7
-	.byte	0x5b
-	.4byte	0x74
-	.4byte	.LLST440
-	.uleb128 0x40
-	.4byte	.LASF1092
-	.byte	0x7
-	.byte	0x5b
-	.4byte	0x74
-	.4byte	.LLST441
-	.uleb128 0x3f
-	.ascii	"buf\000"
-	.byte	0x7
-	.byte	0x5b
-	.4byte	0x1aea
-	.4byte	.LLST442
-	.uleb128 0x4c
-	.ascii	"ret\000"
-	.byte	0x7
-	.byte	0x5d
-	.4byte	0x74
-	.sleb128 -1
-	.uleb128 0x4d
-	.4byte	.LVL1405
-	.4byte	0x1040b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x40
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0
-	.byte	0
-	.uleb128 0x4b
-	.4byte	.LASF1093
-	.byte	0x7
-	.byte	0x53
-	.4byte	0x74
-	.4byte	.LFB489
-	.4byte	.LFE489-.LFB489
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5053
-	.uleb128 0x40
-	.4byte	.LASF542
-	.byte	0x7
-	.byte	0x53
-	.4byte	0x74
-	.4byte	.LLST437
-	.uleb128 0x40
-	.4byte	.LASF1092
-	.byte	0x7
-	.byte	0x53
-	.4byte	0x74
-	.4byte	.LLST438
-	.uleb128 0x3f
-	.ascii	"buf\000"
-	.byte	0x7
-	.byte	0x53
-	.4byte	0x1aea
-	.4byte	.LLST439
-	.uleb128 0x4c
-	.ascii	"ret\000"
-	.byte	0x7
-	.byte	0x55
-	.4byte	0x74
-	.sleb128 -1
-	.uleb128 0x4d
-	.4byte	.LVL1400
-	.4byte	0x10417
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x40
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0
-	.byte	0
-	.uleb128 0x4b
-	.4byte	.LASF1094
-	.byte	0x7
-	.byte	0x4b
-	.4byte	0x74
-	.4byte	.LFB488
-	.4byte	.LFE488-.LFB488
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x50bc
-	.uleb128 0x40
-	.4byte	.LASF1095
-	.byte	0x7
-	.byte	0x4b
-	.4byte	0x74
-	.4byte	.LLST435
-	.uleb128 0x3f
-	.ascii	"Buf\000"
-	.byte	0x7
-	.byte	0x4b
-	.4byte	0x1aea
-	.4byte	.LLST436
-	.uleb128 0x4c
-	.ascii	"ret\000"
-	.byte	0x7
-	.byte	0x4d
-	.4byte	0x74
-	.sleb128 -1
-	.uleb128 0x4d
-	.4byte	.LVL1395
-	.4byte	0x1040b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x40
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x6
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x23
-	.uleb128 0x100
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0
-	.byte	0
-	.uleb128 0x4b
-	.4byte	.LASF1096
-	.byte	0x7
-	.byte	0x42
-	.4byte	0x74
-	.4byte	.LFB487
-	.4byte	.LFE487-.LFB487
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5145
-	.uleb128 0x40
-	.4byte	.LASF1095
-	.byte	0x7
-	.byte	0x42
-	.4byte	0x74
-	.4byte	.LLST433
-	.uleb128 0x3f
-	.ascii	"Buf\000"
-	.byte	0x7
-	.byte	0x42
-	.4byte	0x1aea
-	.4byte	.LLST434
-	.uleb128 0x4c
-	.ascii	"ret\000"
-	.byte	0x7
-	.byte	0x44
-	.4byte	0x74
-	.sleb128 -1
-	.uleb128 0x44
-	.4byte	.LVL1389
-	.4byte	0x10423
-	.4byte	0x511f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x200
-	.byte	0
-	.uleb128 0x4d
-	.4byte	.LVL1391
-	.4byte	0x10417
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x40
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x6
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x23
-	.uleb128 0x100
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0
-	.byte	0
-	.uleb128 0x3e
-	.4byte	.LASF1097
-	.byte	0x7
-	.byte	0x3d
-	.4byte	.LFB486
-	.4byte	.LFE486-.LFB486
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5194
-	.uleb128 0x3f
-	.ascii	"buf\000"
-	.byte	0x7
-	.byte	0x3d
-	.4byte	0x1aea
-	.4byte	.LLST431
-	.uleb128 0x4e
-	.4byte	0x536b
-	.4byte	.LBB351
-	.4byte	.LBE351-.LBB351
-	.byte	0x7
-	.byte	0x3f
-	.uleb128 0x4f
-	.4byte	0x5377
-	.4byte	.LLST432
-	.uleb128 0x4d
-	.4byte	.LVL1385
-	.4byte	0x10430
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x4b
-	.4byte	.LASF1098
-	.byte	0x7
-	.byte	0x38
-	.4byte	0x1aea
-	.4byte	.LFB485
-	.4byte	.LFE485-.LFB485
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x51d3
-	.uleb128 0x40
-	.4byte	.LASF338
-	.byte	0x7
-	.byte	0x38
-	.4byte	0x8f
-	.4byte	.LLST423
-	.uleb128 0x4d
-	.4byte	.LVL1306
-	.4byte	0x1043d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.byte	0
-	.uleb128 0x50
-	.4byte	.LASF1109
-	.byte	0x7
-	.byte	0x33
-	.4byte	0x8f
-	.byte	0x1
-	.4byte	0x51ef
-	.uleb128 0x51
-	.4byte	.LASF1107
-	.byte	0x7
-	.byte	0x33
-	.4byte	0x8f
-	.byte	0
-	.uleb128 0x4b
-	.4byte	.LASF1099
-	.byte	0x7
-	.byte	0x2e
-	.4byte	0x8f
-	.4byte	.LFB483
-	.4byte	.LFE483-.LFB483
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5255
-	.uleb128 0x40
-	.4byte	.LASF1100
-	.byte	0x7
-	.byte	0x2e
-	.4byte	0x1aea
-	.4byte	.LLST419
-	.uleb128 0x40
-	.4byte	.LASF1101
-	.byte	0x7
-	.byte	0x2e
-	.4byte	0x1aea
-	.4byte	.LLST420
-	.uleb128 0x40
-	.4byte	.LASF602
-	.byte	0x7
-	.byte	0x2e
-	.4byte	0x2c
-	.4byte	.LLST421
-	.uleb128 0x4d
-	.4byte	.LVL1302
-	.4byte	0x10449
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0
-	.byte	0
-	.uleb128 0x3e
-	.4byte	.LASF1102
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-	.byte	0x24
-	.4byte	.LFB482
-	.4byte	.LFE482-.LFB482
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x529f
-	.uleb128 0x52
-	.4byte	.LASF1103
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-	.byte	0x24
-	.4byte	0x13e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x52
-	.4byte	.LASF1104
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-	.byte	0x24
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-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x52
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-	.byte	0x24
-	.4byte	0x2c
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x41
-	.ascii	"i\000"
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-	.byte	0x26
-	.4byte	0x74
-	.4byte	.LLST310
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x7f
-	.uleb128 0x4b
-	.4byte	.LASF1105
-	.byte	0x7
-	.byte	0x1f
-	.4byte	0x1aea
-	.4byte	.LFB481
-	.4byte	.LFE481-.LFB481
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x530b
-	.uleb128 0x40
-	.4byte	.LASF1103
-	.byte	0x7
-	.byte	0x1f
-	.4byte	0x1aea
-	.4byte	.LLST304
-	.uleb128 0x40
-	.4byte	.LASF1104
-	.byte	0x7
-	.byte	0x1f
-	.4byte	0x1b48
-	.4byte	.LLST305
-	.uleb128 0x40
-	.4byte	.LASF338
-	.byte	0x7
-	.byte	0x1f
-	.4byte	0x2c
-	.4byte	.LLST306
-	.uleb128 0x4d
-	.4byte	.LVL900
-	.4byte	0x10455
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0
-	.byte	0
-	.uleb128 0x4b
-	.4byte	.LASF1106
-	.byte	0x7
-	.byte	0x1a
-	.4byte	0x1aea
-	.4byte	.LFB480
-	.4byte	.LFE480-.LFB480
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x536b
-	.uleb128 0x3f
-	.ascii	"s\000"
-	.byte	0x7
-	.byte	0x1a
-	.4byte	0x1aea
-	.4byte	.LLST276
-	.uleb128 0x3f
-	.ascii	"c\000"
-	.byte	0x7
-	.byte	0x1a
-	.4byte	0x8f
-	.4byte	.LLST277
-	.uleb128 0x3f
-	.ascii	"n\000"
-	.byte	0x7
-	.byte	0x1a
-	.4byte	0x2c
-	.4byte	.LLST278
-	.uleb128 0x4d
-	.4byte	.LVL744
-	.4byte	0x10423
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0
-	.byte	0
-	.uleb128 0x53
-	.4byte	.LASF1562
-	.byte	0x8
-	.byte	0x4e
-	.byte	0x3
-	.4byte	0x5383
-	.uleb128 0x51
-	.4byte	.LASF1108
-	.byte	0x8
-	.byte	0x4e
-	.4byte	0x1b48
-	.byte	0
-	.uleb128 0x54
-	.4byte	.LASF1110
-	.byte	0x6
-	.2byte	0x214
-	.4byte	0x8f
-	.byte	0x1
-	.4byte	0x5442
-	.uleb128 0x55
-	.4byte	.LASF923
-	.byte	0x6
-	.2byte	0x214
-	.4byte	0x74
-	.uleb128 0x55
-	.4byte	.LASF1111
-	.byte	0x6
-	.2byte	0x214
-	.4byte	0x74
-	.uleb128 0x56
-	.4byte	.LASF1112
-	.byte	0x6
-	.2byte	0x216
-	.4byte	0x57
-	.uleb128 0x57
-	.ascii	"lpa\000"
-	.byte	0x6
-	.2byte	0x217
-	.4byte	0x74
-	.uleb128 0x57
-	.ascii	"ppa\000"
-	.byte	0x6
-	.2byte	0x217
-	.4byte	0x74
-	.uleb128 0x56
-	.4byte	.LASF1113
-	.byte	0x6
-	.2byte	0x218
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF576
-	.byte	0x6
-	.2byte	0x219
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1114
-	.byte	0x6
-	.2byte	0x219
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1115
-	.byte	0x6
-	.2byte	0x219
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1116
-	.byte	0x6
-	.2byte	0x219
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1117
-	.byte	0x6
-	.2byte	0x21a
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1118
-	.byte	0x6
-	.2byte	0x21b
-	.4byte	0x5442
-	.uleb128 0x58
-	.4byte	.LASF1119
-	.byte	0x6
-	.2byte	0x316
-	.uleb128 0x58
-	.4byte	.LASF1120
-	.byte	0x6
-	.2byte	0x319
-	.uleb128 0x59
-	.4byte	.LASF1121
-	.4byte	0x5458
-	.4byte	.LASF1110
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x2a5a
-	.uleb128 0x6
-	.4byte	0x1a2e
-	.4byte	0x5458
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x16
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x5448
-	.uleb128 0x54
-	.4byte	.LASF1122
-	.byte	0x6
-	.2byte	0x1b5
-	.4byte	0x8f
-	.byte	0x1
-	.4byte	0x54a7
-	.uleb128 0x55
-	.4byte	.LASF1123
-	.byte	0x6
-	.2byte	0x1b5
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1114
-	.byte	0x6
-	.2byte	0x1b7
-	.4byte	0x57
-	.uleb128 0x57
-	.ascii	"i\000"
-	.byte	0x6
-	.2byte	0x1b8
-	.4byte	0x57
-	.uleb128 0x57
-	.ascii	"j\000"
-	.byte	0x6
-	.2byte	0x1b8
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF664
-	.byte	0x6
-	.2byte	0x1b9
-	.4byte	0x57
-	.byte	0
-	.uleb128 0x5a
-	.4byte	.LASF1125
-	.byte	0x6
-	.2byte	0x1aa
-	.4byte	0x8f
-	.byte	0x1
-	.uleb128 0x5b
-	.4byte	.LASF1126
-	.byte	0x6
-	.2byte	0x192
-	.4byte	0x8f
-	.4byte	.LFB404
-	.4byte	.LFE404-.LFB404
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5521
-	.uleb128 0x5c
-	.4byte	.LASF664
-	.byte	0x6
-	.2byte	0x192
-	.4byte	0x57
-	.4byte	.LLST273
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x6
-	.2byte	0x194
-	.4byte	0x57
-	.4byte	.LLST274
-	.uleb128 0x5e
-	.4byte	.LASF1127
-	.byte	0x6
-	.2byte	0x195
-	.4byte	0x57
-	.4byte	.LLST275
-	.uleb128 0x44
-	.4byte	.LVL731
-	.4byte	0x8958
-	.4byte	0x5510
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL733
-	.4byte	0x5521
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1128
-	.byte	0x6
-	.2byte	0x17b
-	.4byte	0x8f
-	.4byte	.LFB403
-	.4byte	.LFE403-.LFB403
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x554c
-	.uleb128 0x5c
-	.4byte	.LASF1108
-	.byte	0x6
-	.2byte	0x17b
-	.4byte	0x57
-	.4byte	.LLST272
-	.byte	0
-	.uleb128 0x5f
-	.4byte	.LASF1193
-	.byte	0x6
-	.2byte	0x16d
-	.4byte	0x8f
-	.4byte	0x5569
-	.uleb128 0x55
-	.4byte	.LASF1108
-	.byte	0x6
-	.2byte	0x16d
-	.4byte	0x57
-	.byte	0
-	.uleb128 0x54
-	.4byte	.LASF1129
-	.byte	0x6
-	.2byte	0x14d
-	.4byte	0x74
-	.byte	0x1
-	.4byte	0x5591
-	.uleb128 0x57
-	.ascii	"i\000"
-	.byte	0x6
-	.2byte	0x14f
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1118
-	.byte	0x6
-	.2byte	0x150
-	.4byte	0x5442
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1130
-	.byte	0x6
-	.2byte	0x13d
-	.4byte	0x74
-	.4byte	.LFB400
-	.4byte	.LFE400-.LFB400
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5616
-	.uleb128 0x48
-	.4byte	.LVL2785
-	.4byte	0x93da
-	.uleb128 0x44
-	.4byte	.LVL2786
-	.4byte	0x57df
-	.4byte	0x55c8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2787
-	.4byte	0x5ef1
-	.4byte	0x55dc
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2788
-	.4byte	0x7c46
-	.uleb128 0x44
-	.4byte	.LVL2789
-	.4byte	0x7759
-	.4byte	0x55f9
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2790
-	.4byte	0x75f4
-	.uleb128 0x4d
-	.4byte	.LVL2791
-	.4byte	0x5c52
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR93
-	.byte	0
-	.byte	0
-	.uleb128 0x60
-	.4byte	.LASF1131
-	.byte	0x6
-	.2byte	0x132
-	.byte	0x1
-	.uleb128 0x4b
-	.4byte	.LASF1132
-	.byte	0x6
-	.byte	0xe2
-	.4byte	0x74
-	.4byte	.LFB398
-	.4byte	.LFE398-.LFB398
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5798
-	.uleb128 0x40
-	.4byte	.LASF1133
-	.byte	0x6
-	.byte	0xe2
-	.4byte	0x35d9
-	.4byte	.LLST706
-	.uleb128 0x40
-	.4byte	.LASF1134
-	.byte	0x6
-	.byte	0xe2
-	.4byte	0x74
-	.4byte	.LLST707
-	.uleb128 0x61
-	.4byte	.LASF1116
-	.byte	0x6
-	.byte	0xe4
-	.4byte	0x57
-	.4byte	.LLST708
-	.uleb128 0x61
-	.4byte	.LASF1135
-	.byte	0x6
-	.byte	0xe5
-	.4byte	0x57
-	.4byte	.LLST709
-	.uleb128 0x41
-	.ascii	"req\000"
-	.byte	0x6
-	.byte	0xe5
-	.4byte	0x57
-	.4byte	.LLST710
-	.uleb128 0x61
-	.4byte	.LASF1114
-	.byte	0x6
-	.byte	0xe6
-	.4byte	0x57
-	.4byte	.LLST711
-	.uleb128 0x61
-	.4byte	.LASF658
-	.byte	0x6
-	.byte	0xe6
-	.4byte	0x57
-	.4byte	.LLST712
-	.uleb128 0x61
-	.4byte	.LASF656
-	.byte	0x6
-	.byte	0xe6
-	.4byte	0x57
-	.4byte	.LLST713
-	.uleb128 0x61
-	.4byte	.LASF1136
-	.byte	0x6
-	.byte	0xe7
-	.4byte	0x74
-	.4byte	.LLST714
-	.uleb128 0x61
-	.4byte	.LASF1137
-	.byte	0x6
-	.byte	0xe8
-	.4byte	0x74
-	.4byte	.LLST715
-	.uleb128 0x61
-	.4byte	.LASF1138
-	.byte	0x6
-	.byte	0xe9
-	.4byte	0x74
-	.4byte	.LLST716
-	.uleb128 0x61
-	.4byte	.LASF1118
-	.byte	0x6
-	.byte	0xea
-	.4byte	0x5442
-	.4byte	.LLST717
-	.uleb128 0x62
-	.4byte	.LASF1139
-	.byte	0x6
-	.byte	0xf1
-	.uleb128 0x62
-	.4byte	.LASF1140
-	.byte	0x6
-	.byte	0xf5
-	.uleb128 0x63
-	.4byte	.LASF1162
-	.byte	0x6
-	.2byte	0x129
-	.4byte	.L2503
-	.uleb128 0x48
-	.4byte	.LVL2710
-	.4byte	0x5798
-	.uleb128 0x44
-	.4byte	.LVL2718
-	.4byte	0xb17b
-	.4byte	0x5729
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2731
-	.4byte	0x8990
-	.4byte	0x5744
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x91
-	.sleb128 -52
-	.byte	0x6
-	.byte	0x9
-	.byte	0xea
-	.byte	0x24
-	.byte	0x9
-	.byte	0xf4
-	.byte	0x25
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2737
-	.4byte	0x6dbf
-	.4byte	0x575e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2740
-	.4byte	0x59e7
-	.uleb128 0x44
-	.4byte	.LVL2744
-	.4byte	0x103ff
-	.4byte	0x5785
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC49
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -52
-	.byte	0x6
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2747
-	.4byte	0x8565
-	.uleb128 0x48
-	.4byte	.LVL2749
-	.4byte	0x5798
-	.byte	0
-	.uleb128 0x3e
-	.4byte	.LASF1141
-	.byte	0x6
-	.byte	0xd9
-	.4byte	.LFB397
-	.4byte	.LFE397-.LFB397
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x57df
-	.uleb128 0x44
-	.4byte	.LVL896
-	.4byte	0x530b
-	.4byte	0x57c1
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL897
-	.4byte	0x530b
-	.4byte	0x57d5
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LVL898
-	.4byte	0x5b2a
-	.byte	0
-	.uleb128 0x4b
-	.4byte	.LASF1142
-	.byte	0x6
-	.byte	0x6e
-	.4byte	0x8f
-	.4byte	.LFB396
-	.4byte	.LFE396-.LFB396
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x59d2
-	.uleb128 0x40
-	.4byte	.LASF1143
-	.byte	0x6
-	.byte	0x6e
-	.4byte	0x8f
-	.4byte	.LLST718
-	.uleb128 0x41
-	.ascii	"i\000"
-	.byte	0x6
-	.byte	0x70
-	.4byte	0x57
-	.4byte	.LLST719
-	.uleb128 0x61
-	.4byte	.LASF1144
-	.byte	0x6
-	.byte	0x70
-	.4byte	0x57
-	.4byte	.LLST720
-	.uleb128 0x36
-	.4byte	.LASF1145
-	.byte	0x6
-	.byte	0x71
-	.4byte	0x74
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x61
-	.4byte	.LASF1146
-	.byte	0x6
-	.byte	0x72
-	.4byte	0x74
-	.4byte	.LLST721
-	.uleb128 0x36
-	.4byte	.LASF1133
-	.byte	0x6
-	.byte	0x73
-	.4byte	0x35d9
-	.uleb128 0x6
-	.byte	0x3
-	.4byte	g_gc_temp_superblock
-	.byte	0x9f
-	.uleb128 0x61
-	.4byte	.LASF1147
-	.byte	0x6
-	.byte	0x74
-	.4byte	0x3612
-	.4byte	.LLST722
-	.uleb128 0x64
-	.4byte	.LASF1121
-	.4byte	0x59e2
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.11365
-	.uleb128 0x44
-	.4byte	.LVL2755
-	.4byte	0x561f
-	.4byte	0x5884
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2756
-	.4byte	0x7759
-	.4byte	0x5897
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2757
-	.4byte	0x8dc2
-	.uleb128 0x48
-	.4byte	.LVL2758
-	.4byte	0x8c64
-	.uleb128 0x48
-	.4byte	.LVL2761
-	.4byte	0x93da
-	.uleb128 0x44
-	.4byte	.LVL2762
-	.4byte	0x103ff
-	.4byte	0x58d8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR234
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xa3
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2763
-	.4byte	0x103ff
-	.4byte	0x58f8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2765
-	.4byte	0x5b4d
-	.4byte	0x590c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x9
-	.byte	0xff
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2766
-	.4byte	0x103ff
-	.4byte	0x5923
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC50
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2767
-	.4byte	0x8540
-	.uleb128 0x48
-	.4byte	.LVL2769
-	.4byte	0x7c46
-	.uleb128 0x48
-	.4byte	.LVL2770
-	.4byte	0x75f4
-	.uleb128 0x44
-	.4byte	.LVL2773
-	.4byte	0x103ff
-	.4byte	0x5964
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR234
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xa8
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2774
-	.4byte	0x103ff
-	.4byte	0x5984
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2775
-	.4byte	0x7a04
-	.4byte	0x599d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2776
-	.4byte	0x8958
-	.uleb128 0x44
-	.4byte	.LVL2778
-	.4byte	0x7a04
-	.4byte	0x59bf
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 4
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2780
-	.4byte	0x5b4d
-	.uleb128 0x48
-	.4byte	.LVL2784
-	.4byte	0x8565
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x1a2e
-	.4byte	0x59e2
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x12
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x59d2
-	.uleb128 0x3e
-	.4byte	.LASF1148
-	.byte	0x6
-	.byte	0x53
-	.4byte	.LFB395
-	.4byte	.LFE395-.LFB395
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5a5c
-	.uleb128 0x40
-	.4byte	.LASF1149
-	.byte	0x6
-	.byte	0x53
-	.4byte	0x74
-	.4byte	.LLST267
-	.uleb128 0x40
-	.4byte	.LASF667
-	.byte	0x6
-	.byte	0x53
-	.4byte	0x74
-	.4byte	.LLST268
-	.uleb128 0x3f
-	.ascii	"lpa\000"
-	.byte	0x6
-	.byte	0x53
-	.4byte	0x74
-	.4byte	.LLST269
-	.uleb128 0x61
-	.4byte	.LASF1150
-	.byte	0x6
-	.byte	0x55
-	.4byte	0x57
-	.4byte	.LLST270
-	.uleb128 0x41
-	.ascii	"i\000"
-	.byte	0x6
-	.byte	0x56
-	.4byte	0x57
-	.4byte	.LLST271
-	.uleb128 0x45
-	.4byte	.LVL721
-	.4byte	0x8958
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x8
-	.byte	0x75
-	.sleb128 0
-	.byte	0x9
-	.byte	0xea
-	.byte	0x24
-	.byte	0x9
-	.byte	0xf4
-	.byte	0x25
-	.byte	0
-	.byte	0
-	.uleb128 0x4b
-	.4byte	.LASF1151
-	.byte	0x6
-	.byte	0x48
-	.4byte	0x74
-	.4byte	.LFB394
-	.4byte	.LFE394-.LFB394
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5a92
-	.uleb128 0x3f
-	.ascii	"blk\000"
-	.byte	0x6
-	.byte	0x48
-	.4byte	0x57
-	.4byte	.LLST265
-	.uleb128 0x41
-	.ascii	"i\000"
-	.byte	0x6
-	.byte	0x4a
-	.4byte	0x57
-	.4byte	.LLST266
-	.byte	0
-	.uleb128 0x3e
-	.4byte	.LASF1152
-	.byte	0x6
-	.byte	0x37
-	.4byte	.LFB393
-	.4byte	.LFE393-.LFB393
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5ade
-	.uleb128 0x65
-	.ascii	"req\000"
-	.byte	0x6
-	.byte	0x37
-	.4byte	0x676
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x52
-	.4byte	.LASF1153
-	.byte	0x6
-	.byte	0x37
-	.4byte	0x74
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x41
-	.ascii	"i\000"
-	.byte	0x6
-	.byte	0x39
-	.4byte	0x57
-	.4byte	.LLST263
-	.uleb128 0x61
-	.4byte	.LASF1154
-	.byte	0x6
-	.byte	0x3a
-	.4byte	0x57
-	.4byte	.LLST264
-	.byte	0
-	.uleb128 0x3e
-	.4byte	.LASF1155
-	.byte	0x6
-	.byte	0x28
-	.4byte	.LFB392
-	.4byte	.LFE392-.LFB392
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5b2a
-	.uleb128 0x65
-	.ascii	"req\000"
-	.byte	0x6
-	.byte	0x28
-	.4byte	0x676
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x52
-	.4byte	.LASF1153
-	.byte	0x6
-	.byte	0x28
-	.4byte	0x74
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x41
-	.ascii	"i\000"
-	.byte	0x6
-	.byte	0x2a
-	.4byte	0x57
-	.4byte	.LLST261
-	.uleb128 0x61
-	.4byte	.LASF1154
-	.byte	0x6
-	.byte	0x2b
-	.4byte	0x57
-	.4byte	.LLST262
-	.byte	0
-	.uleb128 0x3e
-	.4byte	.LASF1156
-	.byte	0x6
-	.byte	0x14
-	.4byte	.LFB391
-	.4byte	.LFE391-.LFB391
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5b4d
-	.uleb128 0x41
-	.ascii	"i\000"
-	.byte	0x6
-	.byte	0x16
-	.4byte	0x57
-	.4byte	.LLST260
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1157
-	.byte	0x1
-	.2byte	0xc18
-	.4byte	0x8f
-	.4byte	.LFB390
-	.4byte	.LFE390-.LFB390
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5bfd
-	.uleb128 0x5c
-	.4byte	.LASF1144
-	.byte	0x1
-	.2byte	0xc18
-	.4byte	0x57
-	.4byte	.LLST554
-	.uleb128 0x5d
-	.ascii	"ret\000"
-	.byte	0x1
-	.2byte	0xc1a
-	.4byte	0x8f
-	.4byte	.LLST555
-	.uleb128 0x64
-	.4byte	.LASF1121
-	.4byte	0x5c0d
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.11297
-	.uleb128 0x44
-	.4byte	.LVL1979
-	.4byte	0x103ff
-	.4byte	0x5bb3
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC34
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1983
-	.4byte	0x103ff
-	.4byte	0x5bd3
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR204
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1984
-	.4byte	0x103ff
-	.4byte	0x5bf3
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1987
-	.4byte	0x5c12
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x1a2e
-	.4byte	0x5c0d
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x13
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x5bfd
-	.uleb128 0x54
-	.4byte	.LASF1158
-	.byte	0x1
-	.2byte	0xc03
-	.4byte	0x8f
-	.byte	0x1
-	.4byte	0x5c3d
-	.uleb128 0x55
-	.4byte	.LASF1144
-	.byte	0x1
-	.2byte	0xc03
-	.4byte	0x57
-	.uleb128 0x59
-	.4byte	.LASF1121
-	.4byte	0x5c4d
-	.4byte	.LASF1158
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x1a2e
-	.4byte	0x5c4d
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0xf
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x5c3d
-	.uleb128 0x5b
-	.4byte	.LASF1159
-	.byte	0x1
-	.2byte	0xbcc
-	.4byte	0x74
-	.4byte	.LFB388
-	.4byte	.LFE388-.LFB388
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5dee
-	.uleb128 0x5c
-	.4byte	.LASF1160
-	.byte	0x1
-	.2byte	0xbcc
-	.4byte	0x35d9
-	.4byte	.LLST559
-	.uleb128 0x5e
-	.4byte	.LASF1116
-	.byte	0x1
-	.2byte	0xbce
-	.4byte	0x57
-	.4byte	.LLST560
-	.uleb128 0x5e
-	.4byte	.LASF1161
-	.byte	0x1
-	.2byte	0xbcf
-	.4byte	0x74
-	.4byte	.LLST561
-	.uleb128 0x64
-	.4byte	.LASF1121
-	.4byte	0x59e2
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.11281
-	.uleb128 0x63
-	.4byte	.LASF1163
-	.byte	0x1
-	.2byte	0xbd7
-	.4byte	.L1802
-	.uleb128 0x63
-	.4byte	.LASF1164
-	.byte	0x1
-	.2byte	0xbe6
-	.4byte	.L1805
-	.uleb128 0x44
-	.4byte	.LVL2001
-	.4byte	0x103ff
-	.4byte	0x5cea
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR205
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xbd1
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2002
-	.4byte	0x103ff
-	.4byte	0x5d0a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2003
-	.4byte	0x103ff
-	.4byte	0x5d31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR205
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xbd2
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2004
-	.4byte	0x103ff
-	.4byte	0x5d51
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2005
-	.4byte	0x103ff
-	.4byte	0x5d78
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR205
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xbd3
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2006
-	.4byte	0x103ff
-	.4byte	0x5d98
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2008
-	.4byte	0x5b4d
-	.uleb128 0x48
-	.4byte	.LVL2012
-	.4byte	0x5b4d
-	.uleb128 0x44
-	.4byte	.LVL2013
-	.4byte	0x103ff
-	.4byte	0x5dd1
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR205
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xbff
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2014
-	.4byte	0x103ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1165
-	.byte	0x1
-	.2byte	0xba2
-	.4byte	0x8f
-	.4byte	.LFB387
-	.4byte	.LFE387-.LFB387
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5edc
-	.uleb128 0x5c
-	.4byte	.LASF1160
-	.byte	0x1
-	.2byte	0xba2
-	.4byte	0x35d9
-	.4byte	.LLST624
-	.uleb128 0x38
-	.4byte	.LASF1144
-	.byte	0x1
-	.2byte	0xba4
-	.4byte	0x57
-	.uleb128 0x1
-	.byte	0x55
-	.uleb128 0x64
-	.4byte	.LASF1121
-	.4byte	0x5eec
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.11275
-	.uleb128 0x44
-	.4byte	.LVL2276
-	.4byte	0x103ff
-	.4byte	0x5e5c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR219
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xba6
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2277
-	.4byte	0x103ff
-	.4byte	0x5e7c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2278
-	.4byte	0x8540
-	.4byte	0x5e90
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2279
-	.4byte	0x5c12
-	.uleb128 0x44
-	.4byte	.LVL2280
-	.4byte	0x5ef1
-	.4byte	0x5ead
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2281
-	.4byte	0x7c46
-	.uleb128 0x44
-	.4byte	.LVL2282
-	.4byte	0x7759
-	.4byte	0x5ec9
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2283
-	.4byte	0x75f4
-	.uleb128 0x48
-	.4byte	.LVL2285
-	.4byte	0x8565
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x1a2e
-	.4byte	0x5eec
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x1c
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x5edc
-	.uleb128 0x54
-	.4byte	.LASF1166
-	.byte	0x1
-	.2byte	0xb23
-	.4byte	0x8f
-	.byte	0x1
-	.4byte	0x5f74
-	.uleb128 0x66
-	.ascii	"p\000"
-	.byte	0x1
-	.2byte	0xb23
-	.4byte	0x35d9
-	.uleb128 0x56
-	.4byte	.LASF1167
-	.byte	0x1
-	.2byte	0xb25
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1114
-	.byte	0x1
-	.2byte	0xb26
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1135
-	.byte	0x1
-	.2byte	0xb26
-	.4byte	0x57
-	.uleb128 0x57
-	.ascii	"n\000"
-	.byte	0x1
-	.2byte	0xb26
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1116
-	.byte	0x1
-	.2byte	0xb26
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1168
-	.byte	0x1
-	.2byte	0xb27
-	.4byte	0x8f
-	.uleb128 0x56
-	.4byte	.LASF1169
-	.byte	0x1
-	.2byte	0xb28
-	.4byte	0x57
-	.uleb128 0x58
-	.4byte	.LASF1170
-	.byte	0x1
-	.2byte	0xb2c
-	.uleb128 0x59
-	.4byte	.LASF1121
-	.4byte	0x5f84
-	.4byte	.LASF1166
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x1a2e
-	.4byte	0x5f84
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x18
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x5f74
-	.uleb128 0x54
-	.4byte	.LASF1171
-	.byte	0x1
-	.2byte	0xb1a
-	.4byte	0x8f
-	.byte	0x1
-	.4byte	0x5fa7
-	.uleb128 0x55
-	.4byte	.LASF1144
-	.byte	0x1
-	.2byte	0xb1a
-	.4byte	0x57
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1172
-	.byte	0x1
-	.2byte	0xaae
-	.4byte	0x57
-	.4byte	.LFB384
-	.4byte	.LFE384-.LFB384
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6000
-	.uleb128 0x5c
-	.4byte	.LASF542
-	.byte	0x1
-	.2byte	0xaae
-	.4byte	0x57
-	.4byte	.LLST254
-	.uleb128 0x5e
-	.4byte	.LASF993
-	.byte	0x1
-	.2byte	0xab0
-	.4byte	0x57
-	.4byte	.LLST255
-	.uleb128 0x5e
-	.4byte	.LASF1108
-	.byte	0x1
-	.2byte	0xab1
-	.4byte	0x57
-	.4byte	.LLST256
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x1
-	.2byte	0xab2
-	.4byte	0x57
-	.4byte	.LLST257
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1173
-	.byte	0x1
-	.2byte	0xaa5
-	.4byte	0x57
-	.4byte	.LFB383
-	.4byte	.LFE383-.LFB383
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x602b
-	.uleb128 0x5e
-	.4byte	.LASF1174
-	.byte	0x1
-	.2byte	0xaa7
-	.4byte	0x57
-	.4byte	.LLST253
-	.byte	0
-	.uleb128 0x67
-	.4byte	.LASF1175
-	.byte	0x1
-	.2byte	0xa95
-	.4byte	0x8f
-	.4byte	.LFB382
-	.4byte	.LFE382-.LFB382
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x60a3
-	.uleb128 0x5c
-	.4byte	.LASF1144
-	.byte	0x1
-	.2byte	0xa95
-	.4byte	0x57
-	.4byte	.LLST249
-	.uleb128 0x5e
-	.4byte	.LASF1114
-	.byte	0x1
-	.2byte	0xa97
-	.4byte	0x57
-	.4byte	.LLST250
-	.uleb128 0x5e
-	.4byte	.LASF1116
-	.byte	0x1
-	.2byte	0xa97
-	.4byte	0x57
-	.4byte	.LLST251
-	.uleb128 0x5e
-	.4byte	.LASF651
-	.byte	0x1
-	.2byte	0xa98
-	.4byte	0x57
-	.4byte	.LLST252
-	.uleb128 0x44
-	.4byte	.LVL673
-	.4byte	0x89c8
-	.4byte	0x6099
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL674
-	.4byte	0x8d5f
-	.byte	0
-	.uleb128 0x54
-	.4byte	.LASF1176
-	.byte	0x1
-	.2byte	0xa2a
-	.4byte	0x8f
-	.byte	0x1
-	.4byte	0x60cd
-	.uleb128 0x57
-	.ascii	"i\000"
-	.byte	0x1
-	.2byte	0xa2c
-	.4byte	0x8f
-	.uleb128 0x68
-	.uleb128 0x56
-	.4byte	.LASF1133
-	.byte	0x1
-	.2byte	0xa51
-	.4byte	0x35d9
-	.byte	0
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1177
-	.byte	0x1
-	.2byte	0x9e2
-	.4byte	.LFB380
-	.4byte	.LFE380-.LFB380
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6174
-	.uleb128 0x5c
-	.4byte	.LASF1133
-	.byte	0x1
-	.2byte	0x9e2
-	.4byte	0x35d9
-	.4byte	.LLST564
-	.uleb128 0x38
-	.4byte	.LASF1178
-	.byte	0x1
-	.2byte	0x9e4
-	.4byte	0xc5
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -60
-	.uleb128 0x5e
-	.4byte	.LASF1118
-	.byte	0x1
-	.2byte	0x9e5
-	.4byte	0x5442
-	.4byte	.LLST565
-	.uleb128 0x5e
-	.4byte	.LASF1179
-	.byte	0x1
-	.2byte	0x9e6
-	.4byte	0x8f
-	.4byte	.LLST566
-	.uleb128 0x5e
-	.4byte	.LASF660
-	.byte	0x1
-	.2byte	0x9e7
-	.4byte	0x74
-	.4byte	.LLST567
-	.uleb128 0x44
-	.4byte	.LVL2048
-	.4byte	0x5c52
-	.4byte	0x6146
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2051
-	.4byte	0xae0d
-	.4byte	0x616a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -60
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2052
-	.4byte	0x5b4d
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1180
-	.byte	0x1
-	.2byte	0x9b2
-	.4byte	.LFB379
-	.4byte	.LFE379-.LFB379
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x62f6
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x640
-	.uleb128 0x5e
-	.4byte	.LASF1181
-	.byte	0x1
-	.2byte	0x9b5
-	.4byte	0x74
-	.4byte	.LLST740
-	.uleb128 0x5e
-	.4byte	.LASF1182
-	.byte	0x1
-	.2byte	0x9b6
-	.4byte	0x57
-	.4byte	.LLST741
-	.uleb128 0x6b
-	.4byte	.Ldebug_ranges0+0x658
-	.4byte	0x6269
-	.uleb128 0x38
-	.4byte	.LASF1183
-	.byte	0x1
-	.2byte	0x9c7
-	.4byte	0x2e11
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -80
-	.uleb128 0x5e
-	.4byte	.LASF1184
-	.byte	0x1
-	.2byte	0x9c8
-	.4byte	0x35d9
-	.4byte	.LLST742
-	.uleb128 0x5e
-	.4byte	.LASF1114
-	.byte	0x1
-	.2byte	0x9c9
-	.4byte	0x57
-	.4byte	.LLST743
-	.uleb128 0x5e
-	.4byte	.LASF1116
-	.byte	0x1
-	.2byte	0x9ca
-	.4byte	0x57
-	.4byte	.LLST744
-	.uleb128 0x5e
-	.4byte	.LASF1135
-	.byte	0x1
-	.2byte	0x9cb
-	.4byte	0x57
-	.4byte	.LLST745
-	.uleb128 0x44
-	.4byte	.LVL2945
-	.4byte	0x64a2
-	.4byte	0x621d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -80
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2948
-	.4byte	0x103ff
-	.4byte	0x623a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC56
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2949
-	.4byte	0xac82
-	.4byte	0x6253
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2950
-	.4byte	0xac82
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2933
-	.4byte	0x103ff
-	.4byte	0x6286
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC55
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2934
-	.4byte	0x5521
-	.uleb128 0x48
-	.4byte	.LVL2935
-	.4byte	0x5521
-	.uleb128 0x44
-	.4byte	.LVL2936
-	.4byte	0x5dee
-	.4byte	0x62ac
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2937
-	.4byte	0x5dee
-	.4byte	0x62c3
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR92
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2941
-	.4byte	0x5383
-	.4byte	0x62db
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2943
-	.4byte	0x103ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC55
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x6c
-	.4byte	.LASF1185
-	.byte	0x1
-	.2byte	0x97f
-	.4byte	.LFB378
-	.4byte	.LFE378-.LFB378
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6367
-	.uleb128 0x44
-	.4byte	.LVL2371
-	.4byte	0x77b1
-	.4byte	0x632a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2372
-	.4byte	0x530b
-	.4byte	0x634a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x200
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2373
-	.4byte	0x103ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC44
-	.byte	0
-	.byte	0
-	.uleb128 0x60
-	.4byte	.LASF1186
-	.byte	0x1
-	.2byte	0x969
-	.byte	0x1
-	.uleb128 0x67
-	.4byte	.LASF1187
-	.byte	0x1
-	.2byte	0x937
-	.4byte	0x8f
-	.4byte	.LFB376
-	.4byte	.LFE376-.LFB376
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x648d
-	.uleb128 0x5e
-	.4byte	.LASF1188
-	.byte	0x1
-	.2byte	0x939
-	.4byte	0x62
-	.4byte	.LLST298
-	.uleb128 0x5e
-	.4byte	.LASF1114
-	.byte	0x1
-	.2byte	0x939
-	.4byte	0x62
-	.4byte	.LLST299
-	.uleb128 0x5e
-	.4byte	.LASF1116
-	.byte	0x1
-	.2byte	0x939
-	.4byte	0x62
-	.4byte	.LLST300
-	.uleb128 0x5e
-	.4byte	.LASF651
-	.byte	0x1
-	.2byte	0x939
-	.4byte	0x62
-	.4byte	.LLST301
-	.uleb128 0x5e
-	.4byte	.LASF1189
-	.byte	0x1
-	.2byte	0x93a
-	.4byte	0x57
-	.4byte	.LLST302
-	.uleb128 0x5e
-	.4byte	.LASF1190
-	.byte	0x1
-	.2byte	0x93a
-	.4byte	0x57
-	.4byte	.LLST303
-	.uleb128 0x64
-	.4byte	.LASF1121
-	.4byte	0x649d
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.11184
-	.uleb128 0x44
-	.4byte	.LVL866
-	.4byte	0x530b
-	.4byte	0x640d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL873
-	.4byte	0x89c8
-	.4byte	0x6423
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -44
-	.byte	0x94
-	.byte	0x2
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL874
-	.4byte	0x8d5f
-	.uleb128 0x44
-	.4byte	.LVL884
-	.4byte	0x8565
-	.4byte	0x6440
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL890
-	.4byte	0x8540
-	.uleb128 0x44
-	.4byte	.LVL893
-	.4byte	0x103ff
-	.4byte	0x6470
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR137
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x965
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL894
-	.4byte	0x103ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x1a2e
-	.4byte	0x649d
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x11
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x648d
-	.uleb128 0x5b
-	.4byte	.LASF1191
-	.byte	0x1
-	.2byte	0x91b
-	.4byte	0x8f
-	.4byte	.LFB375
-	.4byte	.LFE375-.LFB375
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6558
-	.uleb128 0x6d
-	.ascii	"p\000"
-	.byte	0x1
-	.2byte	0x91b
-	.4byte	0x35d9
-	.4byte	.LLST247
-	.uleb128 0x5e
-	.4byte	.LASF1114
-	.byte	0x1
-	.2byte	0x91d
-	.4byte	0x57
-	.4byte	.LLST248
-	.uleb128 0x38
-	.4byte	.LASF1116
-	.byte	0x1
-	.2byte	0x91d
-	.4byte	0x57
-	.uleb128 0x1
-	.byte	0x5b
-	.uleb128 0x64
-	.4byte	.LASF1121
-	.4byte	0x5c4d
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.11164
-	.uleb128 0x44
-	.4byte	.LVL659
-	.4byte	0x103ff
-	.4byte	0x651e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR101
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x91f
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL660
-	.4byte	0x103ff
-	.4byte	0x653e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL663
-	.4byte	0x89c8
-	.uleb128 0x45
-	.4byte	.LVL665
-	.4byte	0x8d5f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1192
-	.byte	0x1
-	.2byte	0x90e
-	.4byte	0x8f
-	.4byte	.LFB374
-	.4byte	.LFE374-.LFB374
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x65df
-	.uleb128 0x44
-	.4byte	.LVL2804
-	.4byte	0x660d
-	.4byte	0x6586
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2805
-	.4byte	0x65df
-	.4byte	0x659d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR91
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2806
-	.4byte	0x660d
-	.4byte	0x65b1
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2807
-	.4byte	0x65df
-	.4byte	0x65c5
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2808
-	.4byte	0x5616
-	.uleb128 0x45
-	.4byte	.LVL2809
-	.4byte	0x5b4d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x9
-	.byte	0xff
-	.byte	0
-	.byte	0
-	.uleb128 0x6e
-	.4byte	.LASF1194
-	.byte	0x1
-	.2byte	0x8e5
-	.byte	0x1
-	.4byte	0x660d
-	.uleb128 0x55
-	.4byte	.LASF1160
-	.byte	0x1
-	.2byte	0x8e5
-	.4byte	0x35d9
-	.uleb128 0x56
-	.4byte	.LASF1116
-	.byte	0x1
-	.2byte	0x8e7
-	.4byte	0x57
-	.uleb128 0x58
-	.4byte	.LASF1163
-	.byte	0x1
-	.2byte	0x8ef
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1195
-	.byte	0x1
-	.2byte	0x756
-	.4byte	0x8f
-	.4byte	.LFB372
-	.4byte	.LFE372-.LFB372
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6c72
-	.uleb128 0x5c
-	.4byte	.LASF1133
-	.byte	0x1
-	.2byte	0x756
-	.4byte	0x35d9
-	.4byte	.LLST678
-	.uleb128 0x5e
-	.4byte	.LASF1196
-	.byte	0x1
-	.2byte	0x758
-	.4byte	0x57
-	.4byte	.LLST679
-	.uleb128 0x5e
-	.4byte	.LASF1197
-	.byte	0x1
-	.2byte	0x758
-	.4byte	0x57
-	.4byte	.LLST680
-	.uleb128 0x5e
-	.4byte	.LASF1114
-	.byte	0x1
-	.2byte	0x759
-	.4byte	0x57
-	.4byte	.LLST681
-	.uleb128 0x5e
-	.4byte	.LASF658
-	.byte	0x1
-	.2byte	0x759
-	.4byte	0x57
-	.4byte	.LLST682
-	.uleb128 0x5e
-	.4byte	.LASF656
-	.byte	0x1
-	.2byte	0x759
-	.4byte	0x57
-	.4byte	.LLST683
-	.uleb128 0x5e
-	.4byte	.LASF1198
-	.byte	0x1
-	.2byte	0x75a
-	.4byte	0x57
-	.4byte	.LLST684
-	.uleb128 0x5e
-	.4byte	.LASF1199
-	.byte	0x1
-	.2byte	0x75a
-	.4byte	0x57
-	.4byte	.LLST685
-	.uleb128 0x5e
-	.4byte	.LASF1116
-	.byte	0x1
-	.2byte	0x75b
-	.4byte	0x57
-	.4byte	.LLST686
-	.uleb128 0x5e
-	.4byte	.LASF1200
-	.byte	0x1
-	.2byte	0x75c
-	.4byte	0x8f
-	.4byte	.LLST687
-	.uleb128 0x5e
-	.4byte	.LASF1201
-	.byte	0x1
-	.2byte	0x75c
-	.4byte	0x8f
-	.4byte	.LLST688
-	.uleb128 0x5e
-	.4byte	.LASF1135
-	.byte	0x1
-	.2byte	0x75d
-	.4byte	0x57
-	.4byte	.LLST689
-	.uleb128 0x5d
-	.ascii	"n\000"
-	.byte	0x1
-	.2byte	0x75d
-	.4byte	0x57
-	.4byte	.LLST690
-	.uleb128 0x5d
-	.ascii	"req\000"
-	.byte	0x1
-	.2byte	0x75d
-	.4byte	0x57
-	.4byte	.LLST691
-	.uleb128 0x5d
-	.ascii	"lpa\000"
-	.byte	0x1
-	.2byte	0x75e
-	.4byte	0x74
-	.4byte	.LLST692
-	.uleb128 0x38
-	.4byte	.LASF1202
-	.byte	0x1
-	.2byte	0x75e
-	.4byte	0x74
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -44
-	.uleb128 0x38
-	.4byte	.LASF1145
-	.byte	0x1
-	.2byte	0x75e
-	.4byte	0x74
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -40
-	.uleb128 0x38
-	.4byte	.LASF1136
-	.byte	0x1
-	.2byte	0x75e
-	.4byte	0x74
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x5e
-	.4byte	.LASF1150
-	.byte	0x1
-	.2byte	0x75f
-	.4byte	0x57
-	.4byte	.LLST693
-	.uleb128 0x5e
-	.4byte	.LASF1203
-	.byte	0x1
-	.2byte	0x75f
-	.4byte	0x57
-	.4byte	.LLST694
-	.uleb128 0x5e
-	.4byte	.LASF1204
-	.byte	0x1
-	.2byte	0x760
-	.4byte	0x74
-	.4byte	.LLST695
-	.uleb128 0x5e
-	.4byte	.LASF1205
-	.byte	0x1
-	.2byte	0x761
-	.4byte	0x57
-	.4byte	.LLST696
-	.uleb128 0x5e
-	.4byte	.LASF1118
-	.byte	0x1
-	.2byte	0x762
-	.4byte	0x5442
-	.4byte	.LLST697
-	.uleb128 0x5e
-	.4byte	.LASF1206
-	.byte	0x1
-	.2byte	0x763
-	.4byte	0x74
-	.4byte	.LLST698
-	.uleb128 0x64
-	.4byte	.LASF1121
-	.4byte	0x6c82
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.11110
-	.uleb128 0x63
-	.4byte	.LASF1207
-	.byte	0x1
-	.2byte	0x812
-	.4byte	.L2355
-	.uleb128 0x63
-	.4byte	.LASF1140
-	.byte	0x1
-	.2byte	0x81a
-	.4byte	.L2373
-	.uleb128 0x63
-	.4byte	.LASF1208
-	.byte	0x1
-	.2byte	0x8d7
-	.4byte	.LDL3
-	.uleb128 0x58
-	.4byte	.LASF1209
-	.byte	0x1
-	.2byte	0x8e1
-	.uleb128 0x6b
-	.4byte	.Ldebug_ranges0+0x5b8
-	.4byte	0x682e
-	.uleb128 0x5e
-	.4byte	.LASF1210
-	.byte	0x1
-	.2byte	0x7d3
-	.4byte	0x74
-	.4byte	.LLST699
-	.uleb128 0x5e
-	.4byte	.LASF1211
-	.byte	0x1
-	.2byte	0x7d4
-	.4byte	0x74
-	.4byte	.LLST700
-	.uleb128 0x5e
-	.4byte	.LASF1212
-	.byte	0x1
-	.2byte	0x7d5
-	.4byte	0x74
-	.4byte	.LLST701
-	.uleb128 0x45
-	.4byte	.LVL2622
-	.4byte	0xb17b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -56
-	.byte	0x6
-	.byte	0
-	.byte	0
-	.uleb128 0x6b
-	.4byte	.Ldebug_ranges0+0x5d0
-	.4byte	0x6902
-	.uleb128 0x5e
-	.4byte	.LASF1213
-	.byte	0x1
-	.2byte	0x849
-	.4byte	0x74
-	.4byte	.LLST702
-	.uleb128 0x5e
-	.4byte	.LASF1214
-	.byte	0x1
-	.2byte	0x84a
-	.4byte	0x74
-	.4byte	.LLST703
-	.uleb128 0x44
-	.4byte	.LVL2671
-	.4byte	0xb17b
-	.4byte	0x686f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2673
-	.4byte	0x5b4d
-	.uleb128 0x44
-	.4byte	.LVL2680
-	.4byte	0x7a04
-	.4byte	0x6897
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -44
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2682
-	.4byte	0x8913
-	.4byte	0x68ab
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2683
-	.4byte	0x6c87
-	.4byte	0x68bf
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2685
-	.4byte	0xb17b
-	.4byte	0x68d7
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2687
-	.4byte	0x8913
-	.4byte	0x68eb
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x73
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2688
-	.4byte	0x8913
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x6f
-	.4byte	.LBB507
-	.4byte	.LBE507-.LBB507
-	.4byte	0x697e
-	.uleb128 0x5e
-	.4byte	.LASF1215
-	.byte	0x1
-	.2byte	0x888
-	.4byte	0x74
-	.4byte	.LLST704
-	.uleb128 0x5e
-	.4byte	.LASF1214
-	.byte	0x1
-	.2byte	0x889
-	.4byte	0x74
-	.4byte	.LLST705
-	.uleb128 0x44
-	.4byte	.LVL2697
-	.4byte	0xb17b
-	.4byte	0x6947
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2698
-	.4byte	0x8913
-	.4byte	0x6962
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x7d
-	.sleb128 0
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2700
-	.4byte	0x7a04
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -40
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2556
-	.4byte	0x8847
-	.uleb128 0x44
-	.4byte	.LVL2563
-	.4byte	0xb17b
-	.4byte	0x69a2
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -56
-	.byte	0x6
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2570
-	.4byte	0x8990
-	.uleb128 0x44
-	.4byte	.LVL2574
-	.4byte	0x6dbf
-	.4byte	0x69c8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x91
-	.sleb128 -84
-	.byte	0x94
-	.byte	0x2
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2578
-	.4byte	0x8847
-	.4byte	0x69db
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2583
-	.4byte	0x103ff
-	.4byte	0x6a02
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR228
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x78d
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2584
-	.4byte	0x103ff
-	.4byte	0x6a22
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2585
-	.4byte	0x103ff
-	.4byte	0x6a49
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR228
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x78e
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2586
-	.4byte	0x103ff
-	.4byte	0x6a69
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2599
-	.4byte	0x8913
-	.4byte	0x6a83
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x73
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2604
-	.4byte	0x103ff
-	.4byte	0x6a9a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC46
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2632
-	.4byte	0x7653
-	.4byte	0x6ab1
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR124
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2636
-	.4byte	0xb17b
-	.4byte	0x6ace
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -72
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -56
-	.byte	0x6
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2653
-	.4byte	0x8990
-	.4byte	0x6ae8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x8
-	.byte	0x74
-	.sleb128 0
-	.byte	0x9
-	.byte	0xea
-	.byte	0x24
-	.byte	0x9
-	.byte	0xf4
-	.byte	0x25
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2658
-	.4byte	0x5b4d
-	.uleb128 0x44
-	.4byte	.LVL2663
-	.4byte	0x8913
-	.4byte	0x6b0c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x7d
-	.sleb128 0
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2664
-	.4byte	0x103ff
-	.4byte	0x6b33
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR228
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x843
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2665
-	.4byte	0x103ff
-	.4byte	0x6b53
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2667
-	.4byte	0x7a04
-	.4byte	0x6b72
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -40
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2668
-	.4byte	0x8913
-	.4byte	0x6b8d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x7d
-	.sleb128 0
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2674
-	.4byte	0x8958
-	.4byte	0x6ba7
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x8
-	.byte	0x76
-	.sleb128 0
-	.byte	0x9
-	.byte	0xea
-	.byte	0x24
-	.byte	0x9
-	.byte	0xf4
-	.byte	0x25
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2677
-	.4byte	0x103ff
-	.4byte	0x6bce
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR228
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x8a8
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2678
-	.4byte	0x103ff
-	.4byte	0x6bee
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2691
-	.4byte	0x7a04
-	.4byte	0x6c0d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2693
-	.4byte	0x8958
-	.4byte	0x6c27
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x8
-	.byte	0x76
-	.sleb128 0
-	.byte	0x9
-	.byte	0xea
-	.byte	0x24
-	.byte	0x9
-	.byte	0xf4
-	.byte	0x25
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2702
-	.4byte	0x103ff
-	.4byte	0x6c44
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC47
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2705
-	.4byte	0x103ff
-	.4byte	0x6c68
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC48
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0x7d
-	.sleb128 0
-	.byte	0x6
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2706
-	.4byte	0x5b4d
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x1a2e
-	.4byte	0x6c82
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x15
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x6c72
-	.uleb128 0x69
-	.4byte	.LASF1216
-	.byte	0x1
-	.2byte	0x73a
-	.4byte	.LFB371
-	.4byte	.LFE371-.LFB371
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6dbf
-	.uleb128 0x6d
-	.ascii	"lpa\000"
-	.byte	0x1
-	.2byte	0x73a
-	.4byte	0x74
-	.4byte	.LLST608
-	.uleb128 0x5c
-	.4byte	.LASF1202
-	.byte	0x1
-	.2byte	0x73a
-	.4byte	0x74
-	.4byte	.LLST609
-	.uleb128 0x5e
-	.4byte	.LASF1150
-	.byte	0x1
-	.2byte	0x73c
-	.4byte	0x57
-	.4byte	.LLST610
-	.uleb128 0x64
-	.4byte	.LASF1121
-	.4byte	0x5c4d
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.11077
-	.uleb128 0x6b
-	.4byte	.Ldebug_ranges0+0x560
-	.4byte	0x6d88
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x1
-	.2byte	0x740
-	.4byte	0x57
-	.4byte	.LLST611
-	.uleb128 0x5e
-	.4byte	.LASF1108
-	.byte	0x1
-	.2byte	0x741
-	.4byte	0x57
-	.4byte	.LLST612
-	.uleb128 0x5e
-	.4byte	.LASF542
-	.byte	0x1
-	.2byte	0x742
-	.4byte	0x57
-	.4byte	.LLST613
-	.uleb128 0x44
-	.4byte	.LVL2229
-	.4byte	0x838c
-	.4byte	0x6d30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR87
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2230
-	.4byte	0x103ff
-	.4byte	0x6d57
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR214
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x746
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2231
-	.4byte	0x103ff
-	.4byte	0x6d77
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2232
-	.4byte	0x8540
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2223
-	.4byte	0x8958
-	.4byte	0x6da3
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9
-	.byte	0xea
-	.byte	0x24
-	.byte	0x9
-	.byte	0xf4
-	.byte	0x25
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2238
-	.4byte	0x7a04
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -28
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1217
-	.byte	0x1
-	.2byte	0x726
-	.4byte	.LFB370
-	.4byte	.LFE370-.LFB370
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6e14
-	.uleb128 0x70
-	.4byte	.LASF1133
-	.byte	0x1
-	.2byte	0x726
-	.4byte	0x35d9
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5c
-	.4byte	.LASF656
-	.byte	0x1
-	.2byte	0x726
-	.4byte	0x57
-	.4byte	.LLST244
-	.uleb128 0x5c
-	.4byte	.LASF658
-	.byte	0x1
-	.2byte	0x726
-	.4byte	0x57
-	.4byte	.LLST245
-	.uleb128 0x5e
-	.4byte	.LASF1114
-	.byte	0x1
-	.2byte	0x728
-	.4byte	0x57
-	.4byte	.LLST246
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1218
-	.byte	0x1
-	.2byte	0x71b
-	.4byte	0x8f
-	.4byte	.LFB369
-	.4byte	.LFE369-.LFB369
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6e4b
-	.uleb128 0x48
-	.4byte	.LVL2546
-	.4byte	0x6e4b
-	.uleb128 0x45
-	.4byte	.LVL2547
-	.4byte	0x6ec3
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR124
-	.byte	0
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1219
-	.byte	0x1
-	.2byte	0x703
-	.4byte	.LFB368
-	.4byte	.LFE368-.LFB368
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6e95
-	.uleb128 0x5e
-	.4byte	.LASF607
-	.byte	0x1
-	.2byte	0x705
-	.4byte	0x57
-	.4byte	.LLST297
-	.uleb128 0x44
-	.4byte	.LVL851
-	.4byte	0x530b
-	.4byte	0x6e84
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL852
-	.4byte	0x530b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1220
-	.byte	0x1
-	.2byte	0x6f2
-	.4byte	0x8f
-	.4byte	.LFB367
-	.4byte	.LFE367-.LFB367
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6ec3
-	.uleb128 0x45
-	.4byte	.LVL2545
-	.4byte	0x6ec3
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR215
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1221
-	.byte	0x1
-	.2byte	0x659
-	.4byte	0x8f
-	.4byte	.LFB366
-	.4byte	.LFE366-.LFB366
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7105
-	.uleb128 0x5c
-	.4byte	.LASF1222
-	.byte	0x1
-	.2byte	0x659
-	.4byte	0x7105
-	.4byte	.LLST665
-	.uleb128 0x5e
-	.4byte	.LASF1223
-	.byte	0x1
-	.2byte	0x65b
-	.4byte	0x62
-	.4byte	.LLST666
-	.uleb128 0x5e
-	.4byte	.LASF576
-	.byte	0x1
-	.2byte	0x65b
-	.4byte	0x62
-	.4byte	.LLST667
-	.uleb128 0x5e
-	.4byte	.LASF1224
-	.byte	0x1
-	.2byte	0x65c
-	.4byte	0x62
-	.4byte	.LLST668
-	.uleb128 0x5e
-	.4byte	.LASF607
-	.byte	0x1
-	.2byte	0x65d
-	.4byte	0x57
-	.4byte	.LLST669
-	.uleb128 0x5e
-	.4byte	.LASF1225
-	.byte	0x1
-	.2byte	0x65e
-	.4byte	0x13e
-	.4byte	.LLST670
-	.uleb128 0x5e
-	.4byte	.LASF587
-	.byte	0x1
-	.2byte	0x65f
-	.4byte	0x293a
-	.4byte	.LLST671
-	.uleb128 0x5e
-	.4byte	.LASF588
-	.byte	0x1
-	.2byte	0x660
-	.4byte	0x13e
-	.4byte	.LLST672
-	.uleb128 0x5e
-	.4byte	.LASF584
-	.byte	0x1
-	.2byte	0x661
-	.4byte	0x57
-	.4byte	.LLST673
-	.uleb128 0x38
-	.4byte	.LASF1226
-	.byte	0x1
-	.2byte	0x662
-	.4byte	0x57
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -48
-	.uleb128 0x5e
-	.4byte	.LASF1227
-	.byte	0x1
-	.2byte	0x663
-	.4byte	0x710b
-	.4byte	.LLST674
-	.uleb128 0x6b
-	.4byte	.Ldebug_ranges0+0x578
-	.4byte	0x7028
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x1
-	.2byte	0x6b1
-	.4byte	0x74
-	.4byte	.LLST675
-	.uleb128 0x5e
-	.4byte	.LASF383
-	.byte	0x1
-	.2byte	0x6b1
-	.4byte	0x74
-	.4byte	.LLST676
-	.uleb128 0x6b
-	.4byte	.Ldebug_ranges0+0x598
-	.4byte	0x6fed
-	.uleb128 0x5e
-	.4byte	.LASF1228
-	.byte	0x1
-	.2byte	0x6cd
-	.4byte	0x57
-	.4byte	.LLST677
-	.uleb128 0x44
-	.4byte	.LVL2535
-	.4byte	0x103ff
-	.4byte	0x6fe3
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC45
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2538
-	.4byte	0x8671
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2531
-	.4byte	0xb17b
-	.4byte	0x700c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -56
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2540
-	.4byte	0xb17b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -56
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2492
-	.4byte	0x530b
-	.4byte	0x704b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -52
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x4
-	.byte	0x7b
-	.sleb128 0
-	.byte	0x32
-	.byte	0x24
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2496
-	.4byte	0x8847
-	.4byte	0x705e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2504
-	.4byte	0x8113
-	.4byte	0x7072
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2505
-	.4byte	0x80bb
-	.4byte	0x7086
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2506
-	.4byte	0x7f15
-	.4byte	0x709a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2507
-	.4byte	0x7f15
-	.4byte	0x70ae
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2510
-	.4byte	0xb17b
-	.4byte	0x70cc
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2515
-	.4byte	0xb17b
-	.4byte	0x70ea
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2518
-	.4byte	0xb17b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x2885
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x2aa2
-	.uleb128 0x67
-	.4byte	.LASF1229
-	.byte	0x1
-	.2byte	0x5ea
-	.4byte	0x8f
-	.4byte	.LFB365
-	.4byte	.LFE365-.LFB365
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7309
-	.uleb128 0x5e
-	.4byte	.LASF1224
-	.byte	0x1
-	.2byte	0x5ec
-	.4byte	0x62
-	.4byte	.LLST663
-	.uleb128 0x64
-	.4byte	.LASF1121
-	.4byte	0x7319
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.11007
-	.uleb128 0x6f
-	.4byte	.LBB495
-	.4byte	.LBE495-.LBB495
-	.4byte	0x7171
-	.uleb128 0x5e
-	.4byte	.LASF864
-	.byte	0x1
-	.2byte	0x60f
-	.4byte	0x57
-	.4byte	.LLST664
-	.uleb128 0x48
-	.4byte	.LVL2470
-	.4byte	0x52a5
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2458
-	.4byte	0x530b
-	.4byte	0x7184
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2459
-	.4byte	0x8847
-	.4byte	0x7197
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2461
-	.4byte	0x103ff
-	.4byte	0x71be
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR225
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x607
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2462
-	.4byte	0x103ff
-	.4byte	0x71de
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2463
-	.4byte	0x103ff
-	.4byte	0x7205
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR225
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x609
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2464
-	.4byte	0x103ff
-	.4byte	0x7225
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2465
-	.4byte	0x52a5
-	.4byte	0x7242
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR80
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x30
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2466
-	.4byte	0x52a5
-	.uleb128 0x48
-	.4byte	.LVL2467
-	.4byte	0x52a5
-	.uleb128 0x44
-	.4byte	.LVL2472
-	.4byte	0x103ff
-	.4byte	0x727b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR225
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x624
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2473
-	.4byte	0x103ff
-	.4byte	0x729b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2475
-	.4byte	0x64a2
-	.4byte	0x72b2
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR91
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2476
-	.4byte	0x64a2
-	.4byte	0x72c6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2477
-	.4byte	0x64a2
-	.4byte	0x72da
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2478
-	.4byte	0x64a2
-	.4byte	0x72ee
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2480
-	.4byte	0xb17b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x1a2e
-	.4byte	0x7319
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0xe
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x7309
-	.uleb128 0x5b
-	.4byte	.LASF1230
-	.byte	0x1
-	.2byte	0x5e5
-	.4byte	0x8f
-	.4byte	.LFB364
-	.4byte	.LFE364-.LFB364
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7349
-	.uleb128 0x5c
-	.4byte	.LASF1231
-	.byte	0x1
-	.2byte	0x5e5
-	.4byte	0x57
-	.4byte	.LLST243
-	.byte	0
-	.uleb128 0x6e
-	.4byte	.LASF1232
-	.byte	0x1
-	.2byte	0x5dd
-	.byte	0x1
-	.4byte	0x736f
-	.uleb128 0x55
-	.4byte	.LASF1231
-	.byte	0x1
-	.2byte	0x5dd
-	.4byte	0x57
-	.uleb128 0x55
-	.4byte	.LASF923
-	.byte	0x1
-	.2byte	0x5dd
-	.4byte	0x8f
-	.byte	0
-	.uleb128 0x5a
-	.4byte	.LASF1233
-	.byte	0x1
-	.2byte	0x5d0
-	.4byte	0x8f
-	.byte	0x1
-	.uleb128 0x5b
-	.4byte	.LASF1234
-	.byte	0x1
-	.2byte	0x4d2
-	.4byte	0x8f
-	.4byte	.LFB361
-	.4byte	.LFE361-.LFB361
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x75df
-	.uleb128 0x5e
-	.4byte	.LASF1114
-	.byte	0x1
-	.2byte	0x4d4
-	.4byte	0x57
-	.4byte	.LLST656
-	.uleb128 0x5e
-	.4byte	.LASF1235
-	.byte	0x1
-	.2byte	0x4d4
-	.4byte	0x57
-	.4byte	.LLST657
-	.uleb128 0x5e
-	.4byte	.LASF664
-	.byte	0x1
-	.2byte	0x4d5
-	.4byte	0x57
-	.4byte	.LLST658
-	.uleb128 0x5e
-	.4byte	.LASF1135
-	.byte	0x1
-	.2byte	0x4d5
-	.4byte	0x57
-	.4byte	.LLST659
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x1
-	.2byte	0x4d6
-	.4byte	0x62
-	.4byte	.LLST660
-	.uleb128 0x5d
-	.ascii	"j\000"
-	.byte	0x1
-	.2byte	0x4d6
-	.4byte	0x62
-	.4byte	.LLST661
-	.uleb128 0x5e
-	.4byte	.LASF1236
-	.byte	0x1
-	.2byte	0x4d7
-	.4byte	0x710b
-	.4byte	.LLST662
-	.uleb128 0x64
-	.4byte	.LASF1121
-	.4byte	0x75ef
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.10953
-	.uleb128 0x44
-	.4byte	.LVL2391
-	.4byte	0x530b
-	.4byte	0x7425
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2392
-	.4byte	0x530b
-	.4byte	0x7439
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2393
-	.4byte	0x530b
-	.4byte	0x744d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2394
-	.4byte	0x530b
-	.4byte	0x7461
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2395
-	.4byte	0x530b
-	.4byte	0x7483
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR206
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x3c
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2398
-	.4byte	0x89c8
-	.4byte	0x7499
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x4
-	.byte	0x7d
-	.sleb128 0
-	.byte	0x94
-	.byte	0x2
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2400
-	.4byte	0x8d5f
-	.4byte	0x74af
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -52
-	.byte	0x94
-	.byte	0x2
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2408
-	.4byte	0xb17b
-	.4byte	0x74ce
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2413
-	.4byte	0xb17b
-	.4byte	0x74e6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2419
-	.4byte	0x8737
-	.4byte	0x74fa
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2420
-	.4byte	0x103ff
-	.4byte	0x7521
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR224
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x516
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2421
-	.4byte	0x103ff
-	.4byte	0x7541
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2432
-	.4byte	0x103ff
-	.4byte	0x7568
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR224
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x545
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2433
-	.4byte	0x103ff
-	.4byte	0x7588
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2443
-	.4byte	0x8737
-	.4byte	0x759b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2445
-	.4byte	0x103ff
-	.4byte	0x75c2
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR224
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x5cb
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2446
-	.4byte	0x103ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x1a2e
-	.4byte	0x75ef
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0xd
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x75df
-	.uleb128 0x54
-	.4byte	.LASF1237
-	.byte	0x1
-	.2byte	0x46e
-	.4byte	0x8f
-	.byte	0x1
-	.4byte	0x764d
-	.uleb128 0x56
-	.4byte	.LASF577
-	.byte	0x1
-	.2byte	0x470
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1238
-	.byte	0x1
-	.2byte	0x471
-	.4byte	0x764d
-	.uleb128 0x56
-	.4byte	.LASF1239
-	.byte	0x1
-	.2byte	0x472
-	.4byte	0x57
-	.uleb128 0x58
-	.4byte	.LASF1240
-	.byte	0x1
-	.2byte	0x4a6
-	.uleb128 0x59
-	.4byte	.LASF1121
-	.4byte	0x7319
-	.4byte	.LASF1237
-	.uleb128 0x68
-	.uleb128 0x56
-	.4byte	.LASF864
-	.byte	0x1
-	.2byte	0x4a1
-	.4byte	0x57
-	.byte	0
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x2aea
-	.uleb128 0x69
-	.4byte	.LASF1241
-	.byte	0x1
-	.2byte	0x400
-	.4byte	.LFB359
-	.4byte	.LFE359-.LFB359
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7735
-	.uleb128 0x5c
-	.4byte	.LASF1222
-	.byte	0x1
-	.2byte	0x400
-	.4byte	0x7105
-	.4byte	.LLST650
-	.uleb128 0x5d
-	.ascii	"ppa\000"
-	.byte	0x1
-	.2byte	0x402
-	.4byte	0x74
-	.4byte	.LLST651
-	.uleb128 0x5e
-	.4byte	.LASF595
-	.byte	0x1
-	.2byte	0x403
-	.4byte	0x57
-	.4byte	.LLST652
-	.uleb128 0x5e
-	.4byte	.LASF1225
-	.byte	0x1
-	.2byte	0x404
-	.4byte	0x13e
-	.4byte	.LLST653
-	.uleb128 0x6f
-	.4byte	.LBB494
-	.4byte	.LBE494-.LBB494
-	.4byte	0x76f1
-	.uleb128 0x5e
-	.4byte	.LASF664
-	.byte	0x1
-	.2byte	0x412
-	.4byte	0x74
-	.4byte	.LLST654
-	.uleb128 0x5e
-	.4byte	.LASF1227
-	.byte	0x1
-	.2byte	0x413
-	.4byte	0x710b
-	.4byte	.LLST655
-	.uleb128 0x45
-	.4byte	.LVL2381
-	.4byte	0xb17b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x42
-	.4byte	.LVL2384
-	.4byte	0x7d61
-	.4byte	0x7706
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2386
-	.4byte	0xb17b
-	.4byte	0x7724
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2389
-	.4byte	0x530b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.byte	0
-	.uleb128 0x6e
-	.4byte	.LASF1242
-	.byte	0x1
-	.2byte	0x3f1
-	.byte	0x1
-	.4byte	0x7759
-	.uleb128 0x55
-	.4byte	.LASF669
-	.byte	0x1
-	.2byte	0x3f1
-	.4byte	0x74
-	.uleb128 0x57
-	.ascii	"i\000"
-	.byte	0x1
-	.2byte	0x3f3
-	.4byte	0x57
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1243
-	.byte	0x1
-	.2byte	0x3db
-	.4byte	0x8f
-	.4byte	.LFB357
-	.4byte	.LFE357-.LFB357
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x77b1
-	.uleb128 0x5c
-	.4byte	.LASF1244
-	.byte	0x1
-	.2byte	0x3db
-	.4byte	0x74
-	.4byte	.LLST622
-	.uleb128 0x5e
-	.4byte	.LASF1245
-	.byte	0x1
-	.2byte	0x3dd
-	.4byte	0x74
-	.4byte	.LLST623
-	.uleb128 0x44
-	.4byte	.LVL2270
-	.4byte	0x78f1
-	.4byte	0x77a7
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x40
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2271
-	.4byte	0x6367
-	.byte	0
-	.uleb128 0x67
-	.4byte	.LASF1246
-	.byte	0x1
-	.2byte	0x3b2
-	.4byte	0x74
-	.4byte	.LFB356
-	.4byte	.LFE356-.LFB356
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x78f1
-	.uleb128 0x5c
-	.4byte	.LASF1095
-	.byte	0x1
-	.2byte	0x3b2
-	.4byte	0x74
-	.4byte	.LLST642
-	.uleb128 0x5c
-	.4byte	.LASF1247
-	.byte	0x1
-	.2byte	0x3b2
-	.4byte	0x74
-	.4byte	.LLST643
-	.uleb128 0x5c
-	.4byte	.LASF1248
-	.byte	0x1
-	.2byte	0x3b2
-	.4byte	0x8b6
-	.4byte	.LLST644
-	.uleb128 0x5d
-	.ascii	"len\000"
-	.byte	0x1
-	.2byte	0x3b4
-	.4byte	0x57
-	.4byte	.LLST645
-	.uleb128 0x5e
-	.4byte	.LASF864
-	.byte	0x1
-	.2byte	0x3b4
-	.4byte	0x57
-	.4byte	.LLST646
-	.uleb128 0x5d
-	.ascii	"ppn\000"
-	.byte	0x1
-	.2byte	0x3b5
-	.4byte	0x74
-	.4byte	.LLST647
-	.uleb128 0x5e
-	.4byte	.LASF1249
-	.byte	0x1
-	.2byte	0x3b6
-	.4byte	0x74
-	.4byte	.LLST648
-	.uleb128 0x71
-	.ascii	"req\000"
-	.byte	0x1
-	.2byte	0x3b7
-	.4byte	0xc5
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -68
-	.uleb128 0x5e
-	.4byte	.LASF1250
-	.byte	0x1
-	.2byte	0x3b8
-	.4byte	0x74
-	.4byte	.LLST649
-	.uleb128 0x44
-	.4byte	.LVL2356
-	.4byte	0xb17b
-	.4byte	0x787a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -68
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2358
-	.4byte	0x103ff
-	.4byte	0x789f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC42
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -76
-	.byte	0x6
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2359
-	.4byte	0x7d61
-	.4byte	0x78bc
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR215
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2360
-	.4byte	0x52a5
-	.4byte	0x78d8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x4
-	.byte	0x74
-	.sleb128 0
-	.byte	0x39
-	.byte	0x24
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2366
-	.4byte	0x530b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x4
-	.byte	0x74
-	.sleb128 0
-	.byte	0x39
-	.byte	0x24
-	.byte	0
-	.byte	0
-	.uleb128 0x67
-	.4byte	.LASF1251
-	.byte	0x1
-	.2byte	0x38e
-	.4byte	0x74
-	.4byte	.LFB355
-	.4byte	.LFE355-.LFB355
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7a04
-	.uleb128 0x5c
-	.4byte	.LASF1095
-	.byte	0x1
-	.2byte	0x38e
-	.4byte	0x74
-	.4byte	.LLST614
-	.uleb128 0x5c
-	.4byte	.LASF1247
-	.byte	0x1
-	.2byte	0x38e
-	.4byte	0x74
-	.4byte	.LLST615
-	.uleb128 0x5c
-	.4byte	.LASF1248
-	.byte	0x1
-	.2byte	0x38e
-	.4byte	0x8b6
-	.4byte	.LLST616
-	.uleb128 0x5d
-	.ascii	"len\000"
-	.byte	0x1
-	.2byte	0x390
-	.4byte	0x57
-	.4byte	.LLST617
-	.uleb128 0x5e
-	.4byte	.LASF864
-	.byte	0x1
-	.2byte	0x390
-	.4byte	0x57
-	.4byte	.LLST618
-	.uleb128 0x5d
-	.ascii	"ppn\000"
-	.byte	0x1
-	.2byte	0x391
-	.4byte	0x74
-	.4byte	.LLST619
-	.uleb128 0x5e
-	.4byte	.LASF1249
-	.byte	0x1
-	.2byte	0x392
-	.4byte	0x74
-	.4byte	.LLST620
-	.uleb128 0x71
-	.ascii	"req\000"
-	.byte	0x1
-	.2byte	0x393
-	.4byte	0xc5
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -68
-	.uleb128 0x5e
-	.4byte	.LASF1250
-	.byte	0x1
-	.2byte	0x394
-	.4byte	0x74
-	.4byte	.LLST621
-	.uleb128 0x44
-	.4byte	.LVL2251
-	.4byte	0xb17b
-	.4byte	0x79ba
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -68
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2254
-	.4byte	0x52a5
-	.4byte	0x79d7
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x7d
-	.sleb128 0
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -80
-	.byte	0x6
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2256
-	.4byte	0x7d61
-	.4byte	0x79f4
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR215
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 -1
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2261
-	.4byte	0x530b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1252
-	.byte	0x1
-	.2byte	0x36d
-	.4byte	0x8f
-	.4byte	.LFB354
-	.4byte	.LFE354-.LFB354
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7c31
-	.uleb128 0x6d
-	.ascii	"lpn\000"
-	.byte	0x1
-	.2byte	0x36d
-	.4byte	0x74
-	.4byte	.LLST600
-	.uleb128 0x6d
-	.ascii	"ppn\000"
-	.byte	0x1
-	.2byte	0x36d
-	.4byte	0x13e
-	.4byte	.LLST601
-	.uleb128 0x5c
-	.4byte	.LASF1253
-	.byte	0x1
-	.2byte	0x36d
-	.4byte	0x8f
-	.4byte	.LLST602
-	.uleb128 0x5e
-	.4byte	.LASF1254
-	.byte	0x1
-	.2byte	0x36f
-	.4byte	0x57
-	.4byte	.LLST603
-	.uleb128 0x38
-	.4byte	.LASF1255
-	.byte	0x1
-	.2byte	0x36f
-	.4byte	0x57
-	.uleb128 0x1
-	.byte	0x58
-	.uleb128 0x38
-	.4byte	.LASF1256
-	.byte	0x1
-	.2byte	0x36f
-	.4byte	0x57
-	.uleb128 0x1
-	.byte	0x56
-	.uleb128 0x64
-	.4byte	.LASF1121
-	.4byte	0x7c41
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.10872
-	.uleb128 0x63
-	.4byte	.LASF1257
-	.byte	0x1
-	.2byte	0x378
-	.4byte	.L1988
-	.uleb128 0x72
-	.4byte	0x81e2
-	.4byte	.LBB472
-	.4byte	.Ldebug_ranges0+0x548
-	.byte	0x1
-	.2byte	0x38a
-	.4byte	0x7bd0
-	.uleb128 0x4f
-	.4byte	0x81ff
-	.4byte	.LLST604
-	.uleb128 0x4f
-	.4byte	0x81f3
-	.4byte	.LLST605
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x548
-	.uleb128 0x73
-	.4byte	0x820b
-	.4byte	.LLST606
-	.uleb128 0x73
-	.4byte	0x8217
-	.4byte	.LLST607
-	.uleb128 0x74
-	.4byte	0x8223
-	.uleb128 0x44
-	.4byte	.LVL2204
-	.4byte	0x103ff
-	.4byte	0x7afe
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR213
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x20e
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2205
-	.4byte	0x103ff
-	.4byte	0x7b1e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2207
-	.4byte	0x530b
-	.4byte	0x7b32
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2213
-	.4byte	0xb17b
-	.4byte	0x7b51
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -40
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2217
-	.4byte	0x103ff
-	.4byte	0x7b6e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC40
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2218
-	.4byte	0x7d61
-	.4byte	0x7b8b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR124
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2219
-	.4byte	0x103ff
-	.4byte	0x7bb2
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR213
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x228
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2220
-	.4byte	0x103ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2197
-	.4byte	0x103ff
-	.4byte	0x7bf7
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR212
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x374
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2198
-	.4byte	0x103ff
-	.4byte	0x7c17
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2201
-	.4byte	0x7c78
-	.uleb128 0x45
-	.4byte	.LVL2203
-	.4byte	0x7d13
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x1a2e
-	.4byte	0x7c41
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x8
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x7c31
-	.uleb128 0x5b
-	.4byte	.LASF1258
-	.byte	0x1
-	.2byte	0x35f
-	.4byte	0x8f
-	.4byte	.LFB353
-	.4byte	.LFE353-.LFB353
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7c78
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x1
-	.2byte	0x361
-	.4byte	0x57
-	.4byte	.LLST599
-	.uleb128 0x48
-	.4byte	.LVL2189
-	.4byte	0x7d13
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1259
-	.byte	0x1
-	.2byte	0x337
-	.4byte	0x57
-	.4byte	.LFB352
-	.4byte	.LFE352-.LFB352
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7d13
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x1
-	.2byte	0x339
-	.4byte	0x57
-	.4byte	.LLST236
-	.uleb128 0x5e
-	.4byte	.LASF1260
-	.byte	0x1
-	.2byte	0x33a
-	.4byte	0x57
-	.4byte	.LLST237
-	.uleb128 0x5e
-	.4byte	.LASF1261
-	.byte	0x1
-	.2byte	0x33b
-	.4byte	0x74
-	.4byte	.LLST238
-	.uleb128 0x64
-	.4byte	.LASF1121
-	.4byte	0x6c82
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.10856
-	.uleb128 0x44
-	.4byte	.LVL626
-	.4byte	0x103ff
-	.4byte	0x7cf6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR98
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x35b
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL627
-	.4byte	0x103ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1262
-	.byte	0x1
-	.2byte	0x32d
-	.4byte	0x8f
-	.4byte	.LFB351
-	.4byte	.LFE351-.LFB351
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7d61
-	.uleb128 0x5c
-	.4byte	.LASF1254
-	.byte	0x1
-	.2byte	0x32d
-	.4byte	0x57
-	.4byte	.LLST597
-	.uleb128 0x5e
-	.4byte	.LASF595
-	.byte	0x1
-	.2byte	0x32f
-	.4byte	0x74
-	.4byte	.LLST598
-	.uleb128 0x45
-	.4byte	.LVL2183
-	.4byte	0x7d61
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR124
-	.byte	0
-	.byte	0
-	.uleb128 0x54
-	.4byte	.LASF1263
-	.byte	0x1
-	.2byte	0x2e5
-	.4byte	0x8f
-	.byte	0x1
-	.4byte	0x7dd0
-	.uleb128 0x55
-	.4byte	.LASF1222
-	.byte	0x1
-	.2byte	0x2e5
-	.4byte	0x7105
-	.uleb128 0x55
-	.4byte	.LASF595
-	.byte	0x1
-	.2byte	0x2e5
-	.4byte	0x74
-	.uleb128 0x55
-	.4byte	.LASF1248
-	.byte	0x1
-	.2byte	0x2e5
-	.4byte	0x13e
-	.uleb128 0x56
-	.4byte	.LASF664
-	.byte	0x1
-	.2byte	0x2e7
-	.4byte	0x74
-	.uleb128 0x56
-	.4byte	.LASF1227
-	.byte	0x1
-	.2byte	0x2e8
-	.4byte	0x710b
-	.uleb128 0x56
-	.4byte	.LASF1239
-	.byte	0x1
-	.2byte	0x2e9
-	.4byte	0x57
-	.uleb128 0x58
-	.4byte	.LASF1264
-	.byte	0x1
-	.2byte	0x2ee
-	.uleb128 0x59
-	.4byte	.LASF1121
-	.4byte	0x5c4d
-	.4byte	.LASF1263
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1265
-	.byte	0x1
-	.2byte	0x2b3
-	.4byte	0x8f
-	.4byte	.LFB349
-	.4byte	.LFE349-.LFB349
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7f00
-	.uleb128 0x5c
-	.4byte	.LASF1222
-	.byte	0x1
-	.2byte	0x2b3
-	.4byte	0x7105
-	.4byte	.LLST586
-	.uleb128 0x56
-	.4byte	.LASF664
-	.byte	0x1
-	.2byte	0x2b5
-	.4byte	0x57
-	.uleb128 0x5e
-	.4byte	.LASF607
-	.byte	0x1
-	.2byte	0x2b5
-	.4byte	0x57
-	.4byte	.LLST587
-	.uleb128 0x5e
-	.4byte	.LASF1266
-	.byte	0x1
-	.2byte	0x2b6
-	.4byte	0x57
-	.4byte	.LLST588
-	.uleb128 0x5e
-	.4byte	.LASF1267
-	.byte	0x1
-	.2byte	0x2b7
-	.4byte	0x293a
-	.4byte	.LLST589
-	.uleb128 0x5e
-	.4byte	.LASF1225
-	.byte	0x1
-	.2byte	0x2b8
-	.4byte	0x13e
-	.4byte	.LLST590
-	.uleb128 0x5e
-	.4byte	.LASF1227
-	.byte	0x1
-	.2byte	0x2b9
-	.4byte	0x710b
-	.4byte	.LLST591
-	.uleb128 0x64
-	.4byte	.LASF1121
-	.4byte	0x7f10
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.10823
-	.uleb128 0x44
-	.4byte	.LVL2141
-	.4byte	0x103ff
-	.4byte	0x7e8c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR210
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x2bf
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2142
-	.4byte	0x103ff
-	.4byte	0x7eac
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2143
-	.4byte	0x858a
-	.uleb128 0x44
-	.4byte	.LVL2149
-	.4byte	0x530b
-	.4byte	0x7ec9
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2154
-	.4byte	0xae0d
-	.4byte	0x7eef
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR199
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2155
-	.4byte	0x7f15
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x1a2e
-	.4byte	0x7f10
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x1e
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x7f00
-	.uleb128 0x5b
-	.4byte	.LASF1268
-	.byte	0x1
-	.2byte	0x277
-	.4byte	0x8f
-	.4byte	.LFB348
-	.4byte	.LFE348-.LFB348
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x80bb
-	.uleb128 0x5c
-	.4byte	.LASF1222
-	.byte	0x1
-	.2byte	0x277
-	.4byte	0x7105
-	.4byte	.LLST579
-	.uleb128 0x5e
-	.4byte	.LASF1269
-	.byte	0x1
-	.2byte	0x279
-	.4byte	0x57
-	.4byte	.LLST580
-	.uleb128 0x5e
-	.4byte	.LASF1270
-	.byte	0x1
-	.2byte	0x27a
-	.4byte	0x57
-	.4byte	.LLST581
-	.uleb128 0x5e
-	.4byte	.LASF607
-	.byte	0x1
-	.2byte	0x27b
-	.4byte	0x57
-	.4byte	.LLST582
-	.uleb128 0x5e
-	.4byte	.LASF1271
-	.byte	0x1
-	.2byte	0x27c
-	.4byte	0x57
-	.4byte	.LLST583
-	.uleb128 0x5e
-	.4byte	.LASF1267
-	.byte	0x1
-	.2byte	0x27d
-	.4byte	0x293a
-	.4byte	.LLST584
-	.uleb128 0x38
-	.4byte	.LASF1225
-	.byte	0x1
-	.2byte	0x27e
-	.4byte	0x13e
-	.uleb128 0x1
-	.byte	0x5b
-	.uleb128 0x5e
-	.4byte	.LASF1227
-	.byte	0x1
-	.2byte	0x27f
-	.4byte	0x710b
-	.4byte	.LLST585
-	.uleb128 0x64
-	.4byte	.LASF1121
-	.4byte	0x7319
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.10810
-	.uleb128 0x44
-	.4byte	.LVL2111
-	.4byte	0x8113
-	.4byte	0x7fd0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2115
-	.4byte	0x80bb
-	.4byte	0x7fe4
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2118
-	.4byte	0x8737
-	.4byte	0x7ffd
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2120
-	.4byte	0x80bb
-	.4byte	0x8011
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2126
-	.4byte	0x103ff
-	.4byte	0x8028
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC36
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2131
-	.4byte	0xb17b
-	.4byte	0x8046
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2132
-	.4byte	0x103ff
-	.4byte	0x806d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR209
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x29f
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2133
-	.4byte	0x103ff
-	.4byte	0x808d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2134
-	.4byte	0x103ff
-	.4byte	0x80a4
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC37
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2138
-	.4byte	0x7d61
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x54
-	.4byte	.LASF1272
-	.byte	0x1
-	.2byte	0x258
-	.4byte	0x8f
-	.byte	0x1
-	.4byte	0x80fe
-	.uleb128 0x55
-	.4byte	.LASF1222
-	.byte	0x1
-	.2byte	0x258
-	.4byte	0x7105
-	.uleb128 0x56
-	.4byte	.LASF1271
-	.byte	0x1
-	.2byte	0x25a
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1267
-	.byte	0x1
-	.2byte	0x25b
-	.4byte	0x293a
-	.uleb128 0x59
-	.4byte	.LASF1121
-	.4byte	0x810e
-	.4byte	.LASF1272
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x1a2e
-	.4byte	0x810e
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x19
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x80fe
-	.uleb128 0x5b
-	.4byte	.LASF1273
-	.byte	0x1
-	.2byte	0x230
-	.4byte	0x8f
-	.4byte	.LFB346
-	.4byte	.LFE346-.LFB346
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x81e2
-	.uleb128 0x5c
-	.4byte	.LASF1222
-	.byte	0x1
-	.2byte	0x230
-	.4byte	0x7105
-	.4byte	.LLST290
-	.uleb128 0x38
-	.4byte	.LASF1267
-	.byte	0x1
-	.2byte	0x232
-	.4byte	0x293a
-	.uleb128 0x1
-	.byte	0x5a
-	.uleb128 0x5e
-	.4byte	.LASF1225
-	.byte	0x1
-	.2byte	0x233
-	.4byte	0x13e
-	.4byte	.LLST291
-	.uleb128 0x38
-	.4byte	.LASF1274
-	.byte	0x1
-	.2byte	0x234
-	.4byte	0x293a
-	.uleb128 0x1
-	.byte	0x55
-	.uleb128 0x5e
-	.4byte	.LASF664
-	.byte	0x1
-	.2byte	0x235
-	.4byte	0x57
-	.4byte	.LLST292
-	.uleb128 0x5e
-	.4byte	.LASF607
-	.byte	0x1
-	.2byte	0x235
-	.4byte	0x57
-	.4byte	.LLST293
-	.uleb128 0x5e
-	.4byte	.LASF1271
-	.byte	0x1
-	.2byte	0x236
-	.4byte	0x57
-	.4byte	.LLST294
-	.uleb128 0x5e
-	.4byte	.LASF1275
-	.byte	0x1
-	.2byte	0x237
-	.4byte	0x57
-	.4byte	.LLST295
-	.uleb128 0x5e
-	.4byte	.LASF1270
-	.byte	0x1
-	.2byte	0x238
-	.4byte	0x57
-	.4byte	.LLST296
-	.uleb128 0x44
-	.4byte	.LVL831
-	.4byte	0x530b
-	.4byte	0x81d2
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL848
-	.4byte	0x8737
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x75
-	.4byte	.LASF1276
-	.byte	0x1
-	.2byte	0x209
-	.4byte	0x8f
-	.byte	0x1
-	.4byte	0x8231
-	.uleb128 0x55
-	.4byte	.LASF595
-	.byte	0x1
-	.2byte	0x209
-	.4byte	0x57
-	.uleb128 0x55
-	.4byte	.LASF1254
-	.byte	0x1
-	.2byte	0x209
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1227
-	.byte	0x1
-	.2byte	0x20b
-	.4byte	0x710b
-	.uleb128 0x56
-	.4byte	.LASF21
-	.byte	0x1
-	.2byte	0x20c
-	.4byte	0x74
-	.uleb128 0x59
-	.4byte	.LASF1121
-	.4byte	0x5c0d
-	.4byte	.LASF1276
-	.byte	0
-	.uleb128 0x54
-	.4byte	.LASF1277
-	.byte	0x1
-	.2byte	0x1e1
-	.4byte	0x8f
-	.byte	0x1
-	.4byte	0x82b0
-	.uleb128 0x55
-	.4byte	.LASF1188
-	.byte	0x1
-	.2byte	0x1e1
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1278
-	.byte	0x1
-	.2byte	0x1e3
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1279
-	.byte	0x1
-	.2byte	0x1e4
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1280
-	.byte	0x1
-	.2byte	0x1e5
-	.4byte	0x74
-	.uleb128 0x56
-	.4byte	.LASF1281
-	.byte	0x1
-	.2byte	0x1e7
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1282
-	.byte	0x1
-	.2byte	0x1e8
-	.4byte	0x74
-	.uleb128 0x56
-	.4byte	.LASF1283
-	.byte	0x1
-	.2byte	0x1e9
-	.4byte	0x3529
-	.uleb128 0x56
-	.4byte	.LASF1284
-	.byte	0x1
-	.2byte	0x1e9
-	.4byte	0x3529
-	.uleb128 0x59
-	.4byte	.LASF1121
-	.4byte	0x6c82
-	.4byte	.LASF1277
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1285
-	.byte	0x1
-	.2byte	0x1cd
-	.4byte	0x8f
-	.4byte	.LFB343
-	.4byte	.LFE343-.LFB343
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x82fb
-	.uleb128 0x5c
-	.4byte	.LASF542
-	.byte	0x1
-	.2byte	0x1cd
-	.4byte	0x57
-	.4byte	.LLST220
-	.uleb128 0x5e
-	.4byte	.LASF1188
-	.byte	0x1
-	.2byte	0x1cf
-	.4byte	0x57
-	.4byte	.LLST221
-	.uleb128 0x5e
-	.4byte	.LASF1283
-	.byte	0x1
-	.2byte	0x1d0
-	.4byte	0x3529
-	.4byte	.LLST222
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1286
-	.byte	0x1
-	.2byte	0x19a
-	.4byte	0x8f
-	.4byte	.LFB342
-	.4byte	.LFE342-.LFB342
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8386
-	.uleb128 0x5c
-	.4byte	.LASF1287
-	.byte	0x1
-	.2byte	0x19a
-	.4byte	0x8386
-	.4byte	.LLST214
-	.uleb128 0x5c
-	.4byte	.LASF542
-	.byte	0x1
-	.2byte	0x19a
-	.4byte	0x57
-	.4byte	.LLST215
-	.uleb128 0x5c
-	.4byte	.LASF660
-	.byte	0x1
-	.2byte	0x19a
-	.4byte	0x57
-	.4byte	.LLST216
-	.uleb128 0x5e
-	.4byte	.LASF1188
-	.byte	0x1
-	.2byte	0x19c
-	.4byte	0x57
-	.4byte	.LLST217
-	.uleb128 0x5e
-	.4byte	.LASF1283
-	.byte	0x1
-	.2byte	0x19d
-	.4byte	0x3529
-	.4byte	.LLST218
-	.uleb128 0x5e
-	.4byte	.LASF1288
-	.byte	0x1
-	.2byte	0x19e
-	.4byte	0x74
-	.4byte	.LLST219
-	.uleb128 0x45
-	.4byte	.LVL566
-	.4byte	0x838c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x3529
-	.uleb128 0x5b
-	.4byte	.LASF1289
-	.byte	0x1
-	.2byte	0x17d
-	.4byte	0x8f
-	.4byte	.LFB341
-	.4byte	.LFE341-.LFB341
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8437
-	.uleb128 0x5c
-	.4byte	.LASF1287
-	.byte	0x1
-	.2byte	0x17d
-	.4byte	0x8386
-	.4byte	.LLST211
-	.uleb128 0x5c
-	.4byte	.LASF1188
-	.byte	0x1
-	.2byte	0x17d
-	.4byte	0x57
-	.4byte	.LLST212
-	.uleb128 0x38
-	.4byte	.LASF1283
-	.byte	0x1
-	.2byte	0x17f
-	.4byte	0x3529
-	.uleb128 0x1
-	.byte	0x55
-	.uleb128 0x5e
-	.4byte	.LASF1290
-	.byte	0x1
-	.2byte	0x17f
-	.4byte	0x3529
-	.4byte	.LLST213
-	.uleb128 0x64
-	.4byte	.LASF1121
-	.4byte	0x8447
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.10728
-	.uleb128 0x44
-	.4byte	.LVL550
-	.4byte	0x103ff
-	.4byte	0x841a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR90
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x182
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL551
-	.4byte	0x103ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x1a2e
-	.4byte	0x8447
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x10
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x8437
-	.uleb128 0x5b
-	.4byte	.LASF1291
-	.byte	0x1
-	.2byte	0x14c
-	.4byte	0x8f
-	.4byte	.LFB340
-	.4byte	.LFE340-.LFB340
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x84c4
-	.uleb128 0x5c
-	.4byte	.LASF1188
-	.byte	0x1
-	.2byte	0x14c
-	.4byte	0x57
-	.4byte	.LLST206
-	.uleb128 0x5e
-	.4byte	.LASF1283
-	.byte	0x1
-	.2byte	0x14e
-	.4byte	0x3529
-	.4byte	.LLST207
-	.uleb128 0x38
-	.4byte	.LASF1290
-	.byte	0x1
-	.2byte	0x14e
-	.4byte	0x3529
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x38
-	.4byte	.LASF1292
-	.byte	0x1
-	.2byte	0x14f
-	.4byte	0x57
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x5e
-	.4byte	.LASF1293
-	.byte	0x1
-	.2byte	0x150
-	.4byte	0x57
-	.4byte	.LLST208
-	.uleb128 0x5e
-	.4byte	.LASF1294
-	.byte	0x1
-	.2byte	0x151
-	.4byte	0x57
-	.4byte	.LLST209
-	.byte	0
-	.uleb128 0x50
-	.4byte	.LASF1295
-	.byte	0x1
-	.byte	0xff
-	.4byte	0x8f
-	.byte	0x1
-	.4byte	0x8540
-	.uleb128 0x51
-	.4byte	.LASF1188
-	.byte	0x1
-	.byte	0xff
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1283
-	.byte	0x1
-	.2byte	0x101
-	.4byte	0x3529
-	.uleb128 0x56
-	.4byte	.LASF1290
-	.byte	0x1
-	.2byte	0x101
-	.4byte	0x3529
-	.uleb128 0x56
-	.4byte	.LASF1296
-	.byte	0x1
-	.2byte	0x102
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1297
-	.byte	0x1
-	.2byte	0x103
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1280
-	.byte	0x1
-	.2byte	0x104
-	.4byte	0x74
-	.uleb128 0x56
-	.4byte	.LASF1298
-	.byte	0x1
-	.2byte	0x105
-	.4byte	0x74
-	.uleb128 0x56
-	.4byte	.LASF1294
-	.byte	0x1
-	.2byte	0x106
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF602
-	.byte	0x1
-	.2byte	0x107
-	.4byte	0x57
-	.byte	0
-	.uleb128 0x76
-	.4byte	.LASF1299
-	.byte	0x1
-	.byte	0xe0
-	.byte	0x1
-	.4byte	0x8565
-	.uleb128 0x51
-	.4byte	.LASF1188
-	.byte	0x1
-	.byte	0xe0
-	.4byte	0x57
-	.uleb128 0x59
-	.4byte	.LASF1121
-	.4byte	0x8447
-	.4byte	.LASF1299
-	.byte	0
-	.uleb128 0x76
-	.4byte	.LASF1300
-	.byte	0x1
-	.byte	0xd5
-	.byte	0x1
-	.4byte	0x858a
-	.uleb128 0x51
-	.4byte	.LASF1188
-	.byte	0x1
-	.byte	0xd5
-	.4byte	0x57
-	.uleb128 0x59
-	.4byte	.LASF1121
-	.4byte	0x8447
-	.4byte	.LASF1300
-	.byte	0
-	.uleb128 0x4b
-	.4byte	.LASF1301
-	.byte	0x1
-	.byte	0xb5
-	.4byte	0x57
-	.4byte	.LFB336
-	.4byte	.LFE336-.LFB336
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x866b
-	.uleb128 0x41
-	.ascii	"tmp\000"
-	.byte	0x1
-	.byte	0xb7
-	.4byte	0x57
-	.4byte	.LLST194
-	.uleb128 0x77
-	.ascii	"Q\000"
-	.byte	0x1
-	.byte	0xb8
-	.4byte	0x866b
-	.uleb128 0x6
-	.byte	0x3
-	.4byte	gSysFreeQueue
-	.byte	0x9f
-	.uleb128 0x78
-	.4byte	.LASF1302
-	.byte	0x1
-	.byte	0xba
-	.4byte	.L509
-	.uleb128 0x6f
-	.4byte	.LBB254
-	.4byte	.LBE254-.LBB254
-	.4byte	0x862b
-	.uleb128 0x61
-	.4byte	.LASF1303
-	.byte	0x1
-	.byte	0xc0
-	.4byte	0x57
-	.4byte	.LLST195
-	.uleb128 0x44
-	.4byte	.LVL471
-	.4byte	0x8958
-	.4byte	0x85fd
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL473
-	.4byte	0xac82
-	.4byte	0x8616
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL474
-	.4byte	0xac82
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x79
-	.4byte	0x87e2
-	.4byte	.LBB252
-	.4byte	.LBE252-.LBB252
-	.byte	0x1
-	.byte	0xbb
-	.uleb128 0x44
-	.4byte	.LVL476
-	.4byte	0x103ff
-	.4byte	0x8657
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC5
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL478
-	.4byte	0x103ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC4
-	.byte	0
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x2db6
-	.uleb128 0x4b
-	.4byte	.LASF1304
-	.byte	0x1
-	.byte	0xa0
-	.4byte	0x8f
-	.4byte	.LFB335
-	.4byte	.LFE335-.LFB335
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x86e8
-	.uleb128 0x3f
-	.ascii	"blk\000"
-	.byte	0x1
-	.byte	0xa0
-	.4byte	0x57
-	.4byte	.LLST191
-	.uleb128 0x41
-	.ascii	"ret\000"
-	.byte	0x1
-	.byte	0xa2
-	.4byte	0x8f
-	.4byte	.LLST192
-	.uleb128 0x41
-	.ascii	"i\000"
-	.byte	0x1
-	.byte	0xa3
-	.4byte	0x74
-	.4byte	.LLST193
-	.uleb128 0x77
-	.ascii	"Q\000"
-	.byte	0x1
-	.byte	0xa4
-	.4byte	0x866b
-	.uleb128 0x6
-	.byte	0x3
-	.4byte	gSysFreeQueue
-	.byte	0x9f
-	.uleb128 0x79
-	.4byte	0x87e2
-	.4byte	.LBB250
-	.4byte	.LBE250-.LBB250
-	.byte	0x1
-	.byte	0xa6
-	.uleb128 0x45
-	.4byte	.LVL464
-	.4byte	0x103ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC3
-	.byte	0
-	.byte	0
-	.uleb128 0x3e
-	.4byte	.LASF1305
-	.byte	0x1
-	.byte	0x75
-	.4byte	.LFB334
-	.4byte	.LFE334-.LFB334
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8737
-	.uleb128 0x36
-	.4byte	.LASF602
-	.byte	0x1
-	.byte	0x77
-	.4byte	0x84
-	.uleb128 0x1
-	.byte	0x55
-	.uleb128 0x41
-	.ascii	"i\000"
-	.byte	0x1
-	.byte	0x78
-	.4byte	0x57
-	.4byte	.LLST189
-	.uleb128 0x41
-	.ascii	"blk\000"
-	.byte	0x1
-	.byte	0x78
-	.4byte	0x57
-	.4byte	.LLST190
-	.uleb128 0x77
-	.ascii	"Q\000"
-	.byte	0x1
-	.byte	0x79
-	.4byte	0x866b
-	.uleb128 0x6
-	.byte	0x3
-	.4byte	gSysFreeQueue
-	.byte	0x9f
-	.byte	0
-	.uleb128 0x3e
-	.4byte	.LASF1306
-	.byte	0x1
-	.byte	0x61
-	.4byte	.LFB333
-	.4byte	.LFE333-.LFB333
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x87d6
-	.uleb128 0x3f
-	.ascii	"blk\000"
-	.byte	0x1
-	.byte	0x61
-	.4byte	0x57
-	.4byte	.LLST185
-	.uleb128 0x40
-	.4byte	.LASF1307
-	.byte	0x1
-	.byte	0x61
-	.4byte	0x57
-	.4byte	.LLST186
-	.uleb128 0x6f
-	.4byte	.LBB248
-	.4byte	.LBE248-.LBB248
-	.4byte	0x87c6
-	.uleb128 0x41
-	.ascii	"Q\000"
-	.byte	0x1
-	.byte	0x66
-	.4byte	0x866b
-	.4byte	.LLST187
-	.uleb128 0x7a
-	.4byte	.LBB249
-	.4byte	.LBE249-.LBB249
-	.uleb128 0x61
-	.4byte	.LASF1303
-	.byte	0x1
-	.byte	0x68
-	.4byte	0x57
-	.4byte	.LLST188
-	.uleb128 0x44
-	.4byte	.LVL445
-	.4byte	0x8958
-	.4byte	0x87b0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL447
-	.4byte	0xac82
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x79
-	.4byte	0x87d6
-	.4byte	.LBB246
-	.4byte	.LBE246-.LBB246
-	.byte	0x1
-	.byte	0x65
-	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF1308
-	.byte	0x1
-	.byte	0x5c
-	.4byte	0x57
-	.byte	0x1
-	.uleb128 0x46
-	.4byte	.LASF1309
-	.byte	0x1
-	.byte	0x57
-	.4byte	0x57
-	.byte	0x1
-	.uleb128 0x4b
-	.4byte	.LASF1310
-	.byte	0x1
-	.byte	0x4b
-	.4byte	0x57
-	.4byte	.LFB330
-	.4byte	.LFE330-.LFB330
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8847
-	.uleb128 0x3f
-	.ascii	"max\000"
-	.byte	0x1
-	.byte	0x4b
-	.4byte	0x57
-	.4byte	.LLST289
-	.uleb128 0x77
-	.ascii	"Q\000"
-	.byte	0x1
-	.byte	0x4d
-	.4byte	0x866b
-	.uleb128 0x6
-	.byte	0x3
-	.4byte	gSysFreeQueue
-	.byte	0x9f
-	.uleb128 0x45
-	.4byte	.LVL826
-	.4byte	0x530b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR75+8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x800
-	.byte	0
-	.byte	0
-	.uleb128 0x4b
-	.4byte	.LASF1311
-	.byte	0x1
-	.byte	0x2e
-	.4byte	0x8f
-	.4byte	.LFB329
-	.4byte	.LFE329-.LFB329
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8913
-	.uleb128 0x40
-	.4byte	.LASF664
-	.byte	0x1
-	.byte	0x2e
-	.4byte	0x74
-	.4byte	.LLST570
-	.uleb128 0x40
-	.4byte	.LASF1312
-	.byte	0x1
-	.byte	0x2e
-	.4byte	0x8f
-	.4byte	.LLST571
-	.uleb128 0x77
-	.ascii	"req\000"
-	.byte	0x1
-	.byte	0x30
-	.4byte	0xc5
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -124
-	.uleb128 0x41
-	.ascii	"low\000"
-	.byte	0x1
-	.byte	0x31
-	.4byte	0x62
-	.4byte	.LLST572
-	.uleb128 0x36
-	.4byte	.LASF1313
-	.byte	0x1
-	.byte	0x31
-	.4byte	0x62
-	.uleb128 0x1
-	.byte	0x55
-	.uleb128 0x41
-	.ascii	"mid\000"
-	.byte	0x1
-	.byte	0x31
-	.4byte	0x62
-	.4byte	.LLST573
-	.uleb128 0x36
-	.4byte	.LASF278
-	.byte	0x1
-	.byte	0x32
-	.4byte	0x73e
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -88
-	.uleb128 0x61
-	.4byte	.LASF1314
-	.byte	0x1
-	.byte	0x33
-	.4byte	0x57
-	.4byte	.LLST574
-	.uleb128 0x44
-	.4byte	.LVL2070
-	.4byte	0xb17b
-	.4byte	0x88f6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -124
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2075
-	.4byte	0xb17b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -124
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x4b
-	.4byte	.LASF1315
-	.byte	0x1
-	.byte	0x1e
-	.4byte	0x74
-	.4byte	.LFB328
-	.4byte	.LFE328-.LFB328
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8958
-	.uleb128 0x40
-	.4byte	.LASF1316
-	.byte	0x1
-	.byte	0x1e
-	.4byte	0x74
-	.4byte	.LLST183
-	.uleb128 0x52
-	.4byte	.LASF1317
-	.byte	0x1
-	.byte	0x1e
-	.4byte	0x74
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x41
-	.ascii	"ret\000"
-	.byte	0x1
-	.byte	0x20
-	.4byte	0x74
-	.4byte	.LLST184
-	.byte	0
-	.uleb128 0x7b
-	.4byte	.LASF1318
-	.byte	0x1
-	.byte	0x14
-	.4byte	0x57
-	.4byte	.LFB327
-	.4byte	.LFE327-.LFB327
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8990
-	.uleb128 0x40
-	.4byte	.LASF1116
-	.byte	0x1
-	.byte	0x14
-	.4byte	0x57
-	.4byte	.LLST181
-	.uleb128 0x61
-	.4byte	.LASF1235
-	.byte	0x1
-	.byte	0x16
-	.4byte	0x57
-	.4byte	.LLST182
-	.byte	0
-	.uleb128 0x7b
-	.4byte	.LASF1319
-	.byte	0x1
-	.byte	0xc
-	.4byte	0x57
-	.4byte	.LFB326
-	.4byte	.LFE326-.LFB326
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x89c8
-	.uleb128 0x40
-	.4byte	.LASF1116
-	.byte	0x1
-	.byte	0xc
-	.4byte	0x57
-	.4byte	.LLST179
-	.uleb128 0x61
-	.4byte	.LASF1114
-	.byte	0x1
-	.byte	0xe
-	.4byte	0x57
-	.4byte	.LLST180
-	.byte	0
-	.uleb128 0x7b
-	.4byte	.LASF1320
-	.byte	0x1
-	.byte	0x4
-	.4byte	0x57
-	.4byte	.LFB325
-	.4byte	.LFE325-.LFB325
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8a0f
-	.uleb128 0x40
-	.4byte	.LASF1114
-	.byte	0x1
-	.byte	0x4
-	.4byte	0x57
-	.4byte	.LLST176
-	.uleb128 0x40
-	.4byte	.LASF1235
-	.byte	0x1
-	.byte	0x4
-	.4byte	0x57
-	.4byte	.LLST177
-	.uleb128 0x61
-	.4byte	.LASF1108
-	.byte	0x1
-	.byte	0x6
-	.4byte	0x57
-	.4byte	.LLST178
-	.byte	0
-	.uleb128 0x54
-	.4byte	.LASF1321
-	.byte	0x5
-	.2byte	0x168
-	.4byte	0x84
-	.byte	0x1
-	.4byte	0x8a59
-	.uleb128 0x57
-	.ascii	"die\000"
-	.byte	0x5
-	.2byte	0x16a
-	.4byte	0x74
-	.uleb128 0x57
-	.ascii	"blk\000"
-	.byte	0x5
-	.2byte	0x16b
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1322
-	.byte	0x5
-	.2byte	0x16c
-	.4byte	0x74
-	.uleb128 0x56
-	.4byte	.LASF1323
-	.byte	0x5
-	.2byte	0x16e
-	.4byte	0x8a59
-	.uleb128 0x58
-	.4byte	.LASF1324
-	.byte	0x5
-	.2byte	0x187
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x29fa
-	.uleb128 0x4b
-	.4byte	.LASF1325
-	.byte	0x5
-	.byte	0xf8
-	.4byte	0x8f
-	.4byte	.LFB323
-	.4byte	.LFE323-.LFB323
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8baf
-	.uleb128 0x41
-	.ascii	"i\000"
-	.byte	0x5
-	.byte	0xfa
-	.4byte	0x74
-	.4byte	.LLST575
-	.uleb128 0x41
-	.ascii	"blk\000"
-	.byte	0x5
-	.byte	0xfb
-	.4byte	0x57
-	.4byte	.LLST576
-	.uleb128 0x61
-	.4byte	.LASF1224
-	.byte	0x5
-	.byte	0xfd
-	.4byte	0x62
-	.4byte	.LLST577
-	.uleb128 0x61
-	.4byte	.LASF1323
-	.byte	0x5
-	.byte	0xfe
-	.4byte	0x8a59
-	.4byte	.LLST578
-	.uleb128 0x64
-	.4byte	.LASF1121
-	.4byte	0x8bbf
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.10592
-	.uleb128 0x48
-	.4byte	.LVL2082
-	.4byte	0x8bc4
-	.uleb128 0x44
-	.4byte	.LVL2084
-	.4byte	0xb17b
-	.4byte	0x8ae8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2085
-	.4byte	0xb17b
-	.4byte	0x8b06
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2087
-	.4byte	0xb17b
-	.4byte	0x8b24
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2088
-	.4byte	0x8847
-	.4byte	0x8b37
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2090
-	.4byte	0x103ff
-	.4byte	0x8b5e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR208
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x150
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2091
-	.4byte	0x103ff
-	.4byte	0x8b7e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2092
-	.4byte	0x9fb4
-	.uleb128 0x44
-	.4byte	.LVL2100
-	.4byte	0xb17b
-	.4byte	0x8ba5
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2105
-	.4byte	0x52a5
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x1a2e
-	.4byte	0x8bbf
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0xa
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x8baf
-	.uleb128 0x3e
-	.4byte	.LASF1326
-	.byte	0x5
-	.byte	0xe0
-	.4byte	.LFB322
-	.4byte	.LFE322-.LFB322
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8bf8
-	.uleb128 0x4d
-	.4byte	.LVL823
-	.4byte	0x530b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR74+12
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x40
-	.byte	0
-	.byte	0
-	.uleb128 0x4b
-	.4byte	.LASF1327
-	.byte	0x5
-	.byte	0xb5
-	.4byte	0x8f
-	.4byte	.LFB321
-	.4byte	.LFE321-.LFB321
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8c64
-	.uleb128 0x77
-	.ascii	"die\000"
-	.byte	0x5
-	.byte	0xb7
-	.4byte	0x74
-	.uleb128 0x1
-	.byte	0x56
-	.uleb128 0x41
-	.ascii	"blk\000"
-	.byte	0x5
-	.byte	0xb8
-	.4byte	0x57
-	.4byte	.LLST568
-	.uleb128 0x61
-	.4byte	.LASF1328
-	.byte	0x5
-	.byte	0xb9
-	.4byte	0x74
-	.4byte	.LLST569
-	.uleb128 0x36
-	.4byte	.LASF1323
-	.byte	0x5
-	.byte	0xba
-	.4byte	0x8a59
-	.uleb128 0x1
-	.byte	0x58
-	.uleb128 0x45
-	.4byte	.LVL2059
-	.4byte	0xb17b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x50
-	.4byte	.LASF1329
-	.byte	0x5
-	.byte	0x67
-	.4byte	0x8f
-	.byte	0x1
-	.4byte	0x8cb3
-	.uleb128 0x7c
-	.ascii	"i\000"
-	.byte	0x5
-	.byte	0x69
-	.4byte	0x8f
-	.uleb128 0x7d
-	.4byte	.LASF1330
-	.byte	0x5
-	.byte	0x6a
-	.4byte	0x8f
-	.uleb128 0x7d
-	.4byte	.LASF1323
-	.byte	0x5
-	.byte	0x6b
-	.4byte	0x8a59
-	.uleb128 0x7d
-	.4byte	.LASF1239
-	.byte	0x5
-	.byte	0x6c
-	.4byte	0x57
-	.uleb128 0x62
-	.4byte	.LASF1331
-	.byte	0x5
-	.byte	0x81
-	.uleb128 0x59
-	.4byte	.LASF1121
-	.4byte	0x7319
-	.4byte	.LASF1329
-	.byte	0
-	.uleb128 0x3e
-	.4byte	.LASF1332
-	.byte	0x5
-	.byte	0x47
-	.4byte	.LFB319
-	.4byte	.LFE319-.LFB319
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8d57
-	.uleb128 0x40
-	.4byte	.LASF1267
-	.byte	0x5
-	.byte	0x47
-	.4byte	0x293a
-	.4byte	.LLST287
-	.uleb128 0x40
-	.4byte	.LASF1333
-	.byte	0x5
-	.byte	0x47
-	.4byte	0x13e
-	.4byte	.LLST288
-	.uleb128 0x7c
-	.ascii	"i\000"
-	.byte	0x5
-	.byte	0x49
-	.4byte	0x74
-	.uleb128 0x64
-	.4byte	.LASF1121
-	.4byte	0x75ef
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.10546
-	.uleb128 0x44
-	.4byte	.LVL819
-	.4byte	0x530b
-	.4byte	0x8d17
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL820
-	.4byte	0x103ff
-	.4byte	0x8d3a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x4f
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL821
-	.4byte	0x103ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.byte	0
-	.uleb128 0x4a
-	.4byte	.LASF1334
-	.byte	0x5
-	.byte	0x2c
-	.byte	0x1
-	.uleb128 0x7b
-	.4byte	.LASF1335
-	.byte	0x5
-	.byte	0x19
-	.4byte	0x8f
-	.4byte	.LFB317
-	.4byte	.LFE317-.LFB317
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8dc2
-	.uleb128 0x40
-	.4byte	.LASF664
-	.byte	0x5
-	.byte	0x19
-	.4byte	0x57
-	.4byte	.LLST171
-	.uleb128 0x41
-	.ascii	"die\000"
-	.byte	0x5
-	.byte	0x1b
-	.4byte	0x74
-	.4byte	.LLST172
-	.uleb128 0x41
-	.ascii	"i\000"
-	.byte	0x5
-	.byte	0x1c
-	.4byte	0x74
-	.4byte	.LLST173
-	.uleb128 0x61
-	.4byte	.LASF1333
-	.byte	0x5
-	.byte	0x1d
-	.4byte	0x13e
-	.4byte	.LLST174
-	.uleb128 0x61
-	.4byte	.LASF1336
-	.byte	0x5
-	.byte	0x1e
-	.4byte	0x57
-	.4byte	.LLST175
-	.byte	0
-	.uleb128 0x7b
-	.4byte	.LASF1337
-	.byte	0x5
-	.byte	0x4
-	.4byte	0x8f
-	.4byte	.LFB316
-	.4byte	.LFE316-.LFB316
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8e37
-	.uleb128 0x40
-	.4byte	.LASF664
-	.byte	0x5
-	.byte	0x4
-	.4byte	0x57
-	.4byte	.LLST167
-	.uleb128 0x41
-	.ascii	"die\000"
-	.byte	0x5
-	.byte	0x6
-	.4byte	0x74
-	.4byte	.LLST168
-	.uleb128 0x61
-	.4byte	.LASF1333
-	.byte	0x5
-	.byte	0x7
-	.4byte	0x13e
-	.4byte	.LLST169
-	.uleb128 0x61
-	.4byte	.LASF1336
-	.byte	0x5
-	.byte	0x8
-	.4byte	0x57
-	.4byte	.LLST170
-	.uleb128 0x45
-	.4byte	.LVL416
-	.4byte	0x103ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC2
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x7e
-	.4byte	.LASF1338
-	.byte	0x4
-	.2byte	0x739
-	.4byte	0x74
-	.4byte	.LFB315
-	.4byte	.LFE315-.LFB315
-	.uleb128 0x1
-	.byte	0x9c
-	.uleb128 0x7e
-	.4byte	.LASF1339
-	.byte	0x4
-	.2byte	0x734
-	.4byte	0x74
-	.4byte	.LFB314
-	.4byte	.LFE314-.LFB314
-	.uleb128 0x1
-	.byte	0x9c
-	.uleb128 0x7e
-	.4byte	.LASF1340
-	.byte	0x4
-	.2byte	0x72f
-	.4byte	0x74
-	.4byte	.LFB313
-	.4byte	.LFE313-.LFB313
-	.uleb128 0x1
-	.byte	0x9c
-	.uleb128 0x54
-	.4byte	.LASF1341
-	.byte	0x4
-	.2byte	0x72a
-	.4byte	0x74
-	.byte	0x1
-	.4byte	0x8e97
-	.uleb128 0x66
-	.ascii	"lun\000"
-	.byte	0x4
-	.2byte	0x72a
-	.4byte	0x3a
-	.byte	0
-	.uleb128 0x54
-	.4byte	.LASF1342
-	.byte	0x4
-	.2byte	0x725
-	.4byte	0x74
-	.byte	0x1
-	.4byte	0x8eb5
-	.uleb128 0x66
-	.ascii	"LUN\000"
-	.byte	0x4
-	.2byte	0x725
-	.4byte	0x3a
-	.byte	0
-	.uleb128 0x5a
-	.4byte	.LASF1343
-	.byte	0x4
-	.2byte	0x720
-	.4byte	0x74
-	.byte	0x1
-	.uleb128 0x67
-	.4byte	.LASF1344
-	.byte	0x4
-	.2byte	0x6f2
-	.4byte	0x8f
-	.4byte	.LFB309
-	.4byte	.LFE309-.LFB309
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8fd6
-	.uleb128 0x6d
-	.ascii	"lun\000"
-	.byte	0x4
-	.2byte	0x6f2
-	.4byte	0x19f1
-	.4byte	.LLST635
-	.uleb128 0x5c
-	.4byte	.LASF176
-	.byte	0x4
-	.2byte	0x6f2
-	.4byte	0x1a00
-	.4byte	.LLST636
-	.uleb128 0x5c
-	.4byte	.LASF1345
-	.byte	0x4
-	.2byte	0x6f2
-	.4byte	0x1a00
-	.4byte	.LLST637
-	.uleb128 0x5e
-	.4byte	.LASF864
-	.byte	0x4
-	.2byte	0x6f4
-	.4byte	0x57
-	.4byte	.LLST638
-	.uleb128 0x5d
-	.ascii	"tmp\000"
-	.byte	0x4
-	.2byte	0x6f5
-	.4byte	0x57
-	.4byte	.LLST639
-	.uleb128 0x5d
-	.ascii	"lpa\000"
-	.byte	0x4
-	.2byte	0x6f6
-	.4byte	0x74
-	.4byte	.LLST640
-	.uleb128 0x38
-	.4byte	.LASF1202
-	.byte	0x4
-	.2byte	0x6f7
-	.4byte	0x74
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -32
-	.uleb128 0x38
-	.4byte	.LASF1161
-	.byte	0x4
-	.2byte	0x6f7
-	.4byte	0x74
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -28
-	.uleb128 0x5e
-	.4byte	.LASF1150
-	.byte	0x4
-	.2byte	0x6f8
-	.4byte	0x57
-	.4byte	.LLST641
-	.uleb128 0x48
-	.4byte	.LVL2318
-	.4byte	0x93da
-	.uleb128 0x48
-	.4byte	.LVL2328
-	.4byte	0x7c46
-	.uleb128 0x48
-	.4byte	.LVL2329
-	.4byte	0x75f4
-	.uleb128 0x44
-	.4byte	.LVL2330
-	.4byte	0x7a04
-	.4byte	0x8fa4
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2331
-	.4byte	0x7a04
-	.4byte	0x8fc3
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -28
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2332
-	.4byte	0x8958
-	.uleb128 0x48
-	.4byte	.LVL2333
-	.4byte	0x5b4d
-	.byte	0
-	.uleb128 0x67
-	.4byte	.LASF1346
-	.byte	0x4
-	.2byte	0x639
-	.4byte	0x8f
-	.4byte	.LFB308
-	.4byte	.LFE308-.LFB308
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x93c5
-	.uleb128 0x6d
-	.ascii	"LUN\000"
-	.byte	0x4
-	.2byte	0x639
-	.4byte	0x3a
-	.4byte	.LLST764
-	.uleb128 0x5c
-	.4byte	.LASF1095
-	.byte	0x4
-	.2byte	0x639
-	.4byte	0x74
-	.4byte	.LLST765
-	.uleb128 0x5c
-	.4byte	.LASF1247
-	.byte	0x4
-	.2byte	0x639
-	.4byte	0x74
-	.4byte	.LLST766
-	.uleb128 0x5c
-	.4byte	.LASF1248
-	.byte	0x4
-	.2byte	0x639
-	.4byte	0x8b6
-	.4byte	.LLST767
-	.uleb128 0x5e
-	.4byte	.LASF1118
-	.byte	0x4
-	.2byte	0x63b
-	.4byte	0x5442
-	.4byte	.LLST768
-	.uleb128 0x5d
-	.ascii	"lpa\000"
-	.byte	0x4
-	.2byte	0x63c
-	.4byte	0x74
-	.4byte	.LLST769
-	.uleb128 0x5e
-	.4byte	.LASF1347
-	.byte	0x4
-	.2byte	0x63c
-	.4byte	0x74
-	.4byte	.LLST770
-	.uleb128 0x5e
-	.4byte	.LASF1348
-	.byte	0x4
-	.2byte	0x63c
-	.4byte	0x74
-	.4byte	.LLST771
-	.uleb128 0x38
-	.4byte	.LASF1202
-	.byte	0x4
-	.2byte	0x63d
-	.4byte	0x74
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -72
-	.uleb128 0x5d
-	.ascii	"ppa\000"
-	.byte	0x4
-	.2byte	0x63d
-	.4byte	0x74
-	.4byte	.LLST772
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x4
-	.2byte	0x63e
-	.4byte	0x74
-	.4byte	.LLST773
-	.uleb128 0x5e
-	.4byte	.LASF1349
-	.byte	0x4
-	.2byte	0x63e
-	.4byte	0x74
-	.4byte	.LLST774
-	.uleb128 0x5e
-	.4byte	.LASF1115
-	.byte	0x4
-	.2byte	0x63e
-	.4byte	0x74
-	.4byte	.LLST775
-	.uleb128 0x5e
-	.4byte	.LASF1350
-	.byte	0x4
-	.2byte	0x63f
-	.4byte	0x74
-	.4byte	.LLST776
-	.uleb128 0x5e
-	.4byte	.LASF1351
-	.byte	0x4
-	.2byte	0x63f
-	.4byte	0x74
-	.4byte	.LLST777
-	.uleb128 0x5e
-	.4byte	.LASF1160
-	.byte	0x4
-	.2byte	0x640
-	.4byte	0x35d9
-	.4byte	.LLST778
-	.uleb128 0x64
-	.4byte	.LASF1121
-	.4byte	0x93d5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.10483
-	.uleb128 0x6b
-	.4byte	.Ldebug_ranges0+0x688
-	.4byte	0x9196
-	.uleb128 0x38
-	.4byte	.LASF1352
-	.byte	0x4
-	.2byte	0x6b5
-	.4byte	0xc5
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -68
-	.uleb128 0x44
-	.4byte	.LVL3094
-	.4byte	0xb17b
-	.4byte	0x9135
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -68
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3096
-	.4byte	0x103ff
-	.4byte	0x9152
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC57
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3097
-	.4byte	0x103ff
-	.4byte	0x9179
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR242
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x6c2
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL3098
-	.4byte	0x103ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3024
-	.4byte	0x78f1
-	.4byte	0x91bb
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x77
-	.sleb128 256
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -100
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -108
-	.byte	0x6
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL3035
-	.4byte	0x93da
-	.uleb128 0x44
-	.4byte	.LVL3037
-	.4byte	0x103ff
-	.4byte	0x91eb
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR242
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x66c
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3038
-	.4byte	0x103ff
-	.4byte	0x920b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL3039
-	.4byte	0x93da
-	.uleb128 0x44
-	.4byte	.LVL3040
-	.4byte	0x5dee
-	.4byte	0x9228
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3043
-	.4byte	0x103ff
-	.4byte	0x924f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR242
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x68d
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3044
-	.4byte	0x103ff
-	.4byte	0x926f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3052
-	.4byte	0x5383
-	.4byte	0x928d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x7
-	.byte	0x91
-	.sleb128 -92
-	.byte	0x6
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x1c
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3060
-	.4byte	0x52a5
-	.4byte	0x92a9
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -108
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL3066
-	.4byte	0x93da
-	.uleb128 0x44
-	.4byte	.LVL3068
-	.4byte	0x7a04
-	.4byte	0x92d2
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -72
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3069
-	.4byte	0x5c52
-	.4byte	0x92e6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3073
-	.4byte	0x530b
-	.4byte	0x92ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3087
-	.4byte	0x103ff
-	.4byte	0x9326
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR242
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x6d7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3088
-	.4byte	0x103ff
-	.4byte	0x9346
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL3095
-	.4byte	0x52a5
-	.uleb128 0x44
-	.4byte	.LVL3099
-	.4byte	0x530b
-	.4byte	0x9362
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3101
-	.4byte	0x9409
-	.4byte	0x9381
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3102
-	.4byte	0x103ff
-	.4byte	0x93a8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR242
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x6e6
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL3103
-	.4byte	0x103ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x1a2e
-	.4byte	0x93d5
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x9
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x93c5
-	.uleb128 0x5b
-	.4byte	.LASF1353
-	.byte	0x4
-	.2byte	0x630
-	.4byte	0x8f
-	.4byte	.LFB307
-	.4byte	.LFE307-.LFB307
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x9409
-	.uleb128 0x45
-	.4byte	.LVL2313
-	.4byte	0x9409
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1354
-	.byte	0x4
-	.2byte	0x5fa
-	.4byte	.LFB306
-	.4byte	.LFE306-.LFB306
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x9644
-	.uleb128 0x6d
-	.ascii	"req\000"
-	.byte	0x4
-	.2byte	0x5fa
-	.4byte	0x676
-	.4byte	.LLST625
-	.uleb128 0x5c
-	.4byte	.LASF1115
-	.byte	0x4
-	.2byte	0x5fa
-	.4byte	0x74
-	.4byte	.LLST626
-	.uleb128 0x5c
-	.4byte	.LASF1355
-	.byte	0x4
-	.2byte	0x5fa
-	.4byte	0x74
-	.4byte	.LLST627
-	.uleb128 0x5c
-	.4byte	.LASF1160
-	.byte	0x4
-	.2byte	0x5fa
-	.4byte	0x35d9
-	.4byte	.LLST628
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x4
-	.2byte	0x5fc
-	.4byte	0x74
-	.4byte	.LLST629
-	.uleb128 0x71
-	.ascii	"ppa\000"
-	.byte	0x4
-	.2byte	0x5fd
-	.4byte	0x74
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x5e
-	.4byte	.LASF1202
-	.byte	0x4
-	.2byte	0x5fd
-	.4byte	0x74
-	.4byte	.LLST630
-	.uleb128 0x5e
-	.4byte	.LASF1144
-	.byte	0x4
-	.2byte	0x5fe
-	.4byte	0x57
-	.4byte	.LLST631
-	.uleb128 0x5e
-	.4byte	.LASF72
-	.byte	0x4
-	.2byte	0x5ff
-	.4byte	0x57
-	.4byte	.LLST632
-	.uleb128 0x5e
-	.4byte	.LASF1118
-	.byte	0x4
-	.2byte	0x600
-	.4byte	0x5442
-	.4byte	.LLST633
-	.uleb128 0x5e
-	.4byte	.LASF1206
-	.byte	0x4
-	.2byte	0x601
-	.4byte	0x74
-	.4byte	.LLST634
-	.uleb128 0x64
-	.4byte	.LASF1121
-	.4byte	0x9654
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.10457
-	.uleb128 0x44
-	.4byte	.LVL2292
-	.4byte	0xae0d
-	.4byte	0x94fb
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2293
-	.4byte	0x8958
-	.uleb128 0x44
-	.4byte	.LVL2295
-	.4byte	0x5dee
-	.4byte	0x9518
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2296
-	.4byte	0x54b4
-	.uleb128 0x44
-	.4byte	.LVL2297
-	.4byte	0x5c52
-	.4byte	0x9535
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2298
-	.4byte	0xae0d
-	.4byte	0x9554
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2299
-	.4byte	0x103ff
-	.4byte	0x957b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR220
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x61c
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2300
-	.4byte	0x103ff
-	.4byte	0x959b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2301
-	.4byte	0x7a04
-	.4byte	0x95b4
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2303
-	.4byte	0x8958
-	.4byte	0x95cf
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x91
-	.sleb128 -44
-	.byte	0x6
-	.byte	0x9
-	.byte	0xea
-	.byte	0x24
-	.byte	0x9
-	.byte	0xf4
-	.byte	0x25
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2306
-	.4byte	0x103ff
-	.4byte	0x95ec
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC41
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2307
-	.4byte	0x5b4d
-	.4byte	0x9600
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2310
-	.4byte	0x103ff
-	.4byte	0x9627
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR220
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x62d
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2311
-	.4byte	0x103ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x1a2e
-	.4byte	0x9654
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0xc
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x9644
-	.uleb128 0x67
-	.4byte	.LASF1356
-	.byte	0x4
-	.2byte	0x595
-	.4byte	0x8f
-	.4byte	.LFB305
-	.4byte	.LFE305-.LFB305
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x9884
-	.uleb128 0x6d
-	.ascii	"LUN\000"
-	.byte	0x4
-	.2byte	0x595
-	.4byte	0x3a
-	.4byte	.LLST746
-	.uleb128 0x5c
-	.4byte	.LASF1095
-	.byte	0x4
-	.2byte	0x595
-	.4byte	0x74
-	.4byte	.LLST747
-	.uleb128 0x5c
-	.4byte	.LASF1247
-	.byte	0x4
-	.2byte	0x595
-	.4byte	0x74
-	.4byte	.LLST748
-	.uleb128 0x5c
-	.4byte	.LASF1248
-	.byte	0x4
-	.2byte	0x595
-	.4byte	0x8b6
-	.4byte	.LLST749
-	.uleb128 0x5d
-	.ascii	"ret\000"
-	.byte	0x4
-	.2byte	0x597
-	.4byte	0x8f
-	.4byte	.LLST750
-	.uleb128 0x5e
-	.4byte	.LASF1347
-	.byte	0x4
-	.2byte	0x598
-	.4byte	0x74
-	.4byte	.LLST751
-	.uleb128 0x5e
-	.4byte	.LASF1348
-	.byte	0x4
-	.2byte	0x598
-	.4byte	0x74
-	.4byte	.LLST752
-	.uleb128 0x5e
-	.4byte	.LASF1357
-	.byte	0x4
-	.2byte	0x598
-	.4byte	0x74
-	.4byte	.LLST753
-	.uleb128 0x5d
-	.ascii	"lpa\000"
-	.byte	0x4
-	.2byte	0x599
-	.4byte	0x74
-	.4byte	.LLST754
-	.uleb128 0x71
-	.ascii	"ppa\000"
-	.byte	0x4
-	.2byte	0x599
-	.4byte	0x74
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x5d
-	.ascii	"n\000"
-	.byte	0x4
-	.2byte	0x59b
-	.4byte	0x74
-	.4byte	.LLST755
-	.uleb128 0x5e
-	.4byte	.LASF1115
-	.byte	0x4
-	.2byte	0x59b
-	.4byte	0x74
-	.4byte	.LLST756
-	.uleb128 0x5e
-	.4byte	.LASF1349
-	.byte	0x4
-	.2byte	0x59b
-	.4byte	0x74
-	.4byte	.LLST757
-	.uleb128 0x5e
-	.4byte	.LASF1358
-	.byte	0x4
-	.2byte	0x59c
-	.4byte	0x74
-	.4byte	.LLST758
-	.uleb128 0x5e
-	.4byte	.LASF1359
-	.byte	0x4
-	.2byte	0x59c
-	.4byte	0x74
-	.4byte	.LLST759
-	.uleb128 0x5e
-	.4byte	.LASF1360
-	.byte	0x4
-	.2byte	0x59d
-	.4byte	0x74
-	.4byte	.LLST760
-	.uleb128 0x5e
-	.4byte	.LASF1361
-	.byte	0x4
-	.2byte	0x59e
-	.4byte	0x74
-	.4byte	.LLST761
-	.uleb128 0x6b
-	.4byte	.Ldebug_ranges0+0x670
-	.4byte	0x97e4
-	.uleb128 0x5e
-	.4byte	.LASF1181
-	.byte	0x4
-	.2byte	0x5e2
-	.4byte	0x74
-	.4byte	.LLST762
-	.uleb128 0x5e
-	.4byte	.LASF1108
-	.byte	0x4
-	.2byte	0x5e3
-	.4byte	0x57
-	.4byte	.LLST763
-	.uleb128 0x48
-	.4byte	.LVL2991
-	.4byte	0x8958
-	.uleb128 0x44
-	.4byte	.LVL2993
-	.4byte	0x5521
-	.4byte	0x97c6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2997
-	.4byte	0x98a8
-	.uleb128 0x45
-	.4byte	.LVL3017
-	.4byte	0x5383
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2964
-	.4byte	0x77b1
-	.4byte	0x9807
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x76
-	.sleb128 256
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -68
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2970
-	.4byte	0x93da
-	.uleb128 0x44
-	.4byte	.LVL2979
-	.4byte	0x5383
-	.4byte	0x982b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -92
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2981
-	.4byte	0x7a04
-	.4byte	0x984a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2987
-	.4byte	0xb17b
-	.4byte	0x9864
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2989
-	.4byte	0x52a5
-	.uleb128 0x45
-	.4byte	.LVL3003
-	.4byte	0x530b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x200
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1362
-	.byte	0x4
-	.2byte	0x3f6
-	.4byte	0x8f
-	.4byte	.LFB304
-	.4byte	.LFE304-.LFB304
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x98a8
-	.uleb128 0x48
-	.4byte	.LVL2342
-	.4byte	0x98a8
-	.byte	0
-	.uleb128 0x5a
-	.4byte	.LASF1363
-	.byte	0x4
-	.2byte	0x3ea
-	.4byte	0x8f
-	.byte	0x1
-	.uleb128 0x54
-	.4byte	.LASF1364
-	.byte	0x4
-	.2byte	0x392
-	.4byte	0x8f
-	.byte	0x1
-	.4byte	0x98ec
-	.uleb128 0x55
-	.4byte	.LASF1365
-	.byte	0x4
-	.2byte	0x392
-	.4byte	0x98ec
-	.uleb128 0x59
-	.4byte	.LASF1121
-	.4byte	0x9902
-	.4byte	.LASF1364
-	.uleb128 0x68
-	.uleb128 0x57
-	.ascii	"i\000"
-	.byte	0x4
-	.2byte	0x3c8
-	.4byte	0x74
-	.byte	0
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x1e1
-	.uleb128 0x6
-	.4byte	0x1a2e
-	.4byte	0x9902
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x7
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x98f2
-	.uleb128 0x67
-	.4byte	.LASF1366
-	.byte	0x4
-	.2byte	0x2fe
-	.4byte	0x8f
-	.4byte	.LFB301
-	.4byte	.LFE301-.LFB301
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x9a85
-	.uleb128 0x5e
-	.4byte	.LASF1235
-	.byte	0x4
-	.2byte	0x300
-	.4byte	0x57
-	.4byte	.LLST798
-	.uleb128 0x5e
-	.4byte	.LASF1367
-	.byte	0x4
-	.2byte	0x300
-	.4byte	0x57
-	.4byte	.LLST799
-	.uleb128 0x5e
-	.4byte	.LASF1368
-	.byte	0x4
-	.2byte	0x301
-	.4byte	0x57
-	.4byte	.LLST800
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x4
-	.2byte	0x302
-	.4byte	0x57
-	.4byte	.LLST801
-	.uleb128 0x63
-	.4byte	.LASF1369
-	.byte	0x4
-	.2byte	0x365
-	.4byte	.L2888
-	.uleb128 0x63
-	.4byte	.LASF1370
-	.byte	0x4
-	.2byte	0x375
-	.4byte	.L2890
-	.uleb128 0x44
-	.4byte	.LVL3181
-	.4byte	0x530b
-	.4byte	0x998b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3182
-	.4byte	0x530b
-	.4byte	0x999f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL3183
-	.4byte	0x87ee
-	.uleb128 0x48
-	.4byte	.LVL3184
-	.4byte	0x8a5f
-	.uleb128 0x48
-	.4byte	.LVL3185
-	.4byte	0x8a0f
-	.uleb128 0x48
-	.4byte	.LVL3201
-	.4byte	0x8c64
-	.uleb128 0x44
-	.4byte	.LVL3202
-	.4byte	0x530b
-	.4byte	0x99d6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3203
-	.4byte	0x530b
-	.4byte	0x99ea
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3204
-	.4byte	0x64a2
-	.4byte	0x99fe
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3208
-	.4byte	0x9a85
-	.4byte	0x9a17
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL3215
-	.4byte	0x9fb4
-	.uleb128 0x48
-	.4byte	.LVL3216
-	.4byte	0x87ee
-	.uleb128 0x44
-	.4byte	.LVL3219
-	.4byte	0x9a85
-	.4byte	0x9a42
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 -1
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3222
-	.4byte	0x9a85
-	.4byte	0x9a55
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3226
-	.4byte	0x64a2
-	.4byte	0x9a69
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL3227
-	.4byte	0x858a
-	.uleb128 0x48
-	.4byte	.LVL3228
-	.4byte	0x75f4
-	.uleb128 0x48
-	.4byte	.LVL3229
-	.4byte	0x60a3
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1371
-	.byte	0x4
-	.2byte	0x28d
-	.4byte	0x8f
-	.4byte	.LFB300
-	.4byte	.LFE300-.LFB300
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x9c4c
-	.uleb128 0x5c
-	.4byte	.LASF1235
-	.byte	0x4
-	.2byte	0x28d
-	.4byte	0x57
-	.4byte	.LLST528
-	.uleb128 0x5c
-	.4byte	.LASF1372
-	.byte	0x4
-	.2byte	0x28d
-	.4byte	0x3a
-	.4byte	.LLST529
-	.uleb128 0x5e
-	.4byte	.LASF1367
-	.byte	0x4
-	.2byte	0x28f
-	.4byte	0x57
-	.4byte	.LLST530
-	.uleb128 0x5e
-	.4byte	.LASF1135
-	.byte	0x4
-	.2byte	0x28f
-	.4byte	0x57
-	.4byte	.LLST531
-	.uleb128 0x5e
-	.4byte	.LASF1114
-	.byte	0x4
-	.2byte	0x290
-	.4byte	0x57
-	.4byte	.LLST532
-	.uleb128 0x5e
-	.4byte	.LASF664
-	.byte	0x4
-	.2byte	0x290
-	.4byte	0x57
-	.4byte	.LLST533
-	.uleb128 0x5e
-	.4byte	.LASF1373
-	.byte	0x4
-	.2byte	0x291
-	.4byte	0x57
-	.4byte	.LLST534
-	.uleb128 0x5e
-	.4byte	.LASF1374
-	.byte	0x4
-	.2byte	0x292
-	.4byte	0x57
-	.4byte	.LLST535
-	.uleb128 0x5e
-	.4byte	.LASF1375
-	.byte	0x4
-	.2byte	0x293
-	.4byte	0x57
-	.4byte	.LLST536
-	.uleb128 0x5e
-	.4byte	.LASF1376
-	.byte	0x4
-	.2byte	0x294
-	.4byte	0x57
-	.4byte	.LLST537
-	.uleb128 0x5e
-	.4byte	.LASF1377
-	.byte	0x4
-	.2byte	0x295
-	.4byte	0x3a
-	.4byte	.LLST538
-	.uleb128 0x63
-	.4byte	.LASF1378
-	.byte	0x4
-	.2byte	0x2cd
-	.4byte	.L1632
-	.uleb128 0x44
-	.4byte	.LVL1823
-	.4byte	0xac82
-	.4byte	0x9b75
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1830
-	.4byte	0xae0d
-	.4byte	0x9b94
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1837
-	.4byte	0xac82
-	.4byte	0x9bae
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1839
-	.4byte	0x89c8
-	.4byte	0x9bc4
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -48
-	.byte	0x94
-	.byte	0x2
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1841
-	.4byte	0x9c4c
-	.4byte	0x9bd8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1842
-	.4byte	0x8d5f
-	.4byte	0x9bec
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1853
-	.4byte	0x8dc2
-	.uleb128 0x44
-	.4byte	.LVL1858
-	.4byte	0x89c8
-	.4byte	0x9c0b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -48
-	.byte	0x94
-	.byte	0x2
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1860
-	.4byte	0x9c4c
-	.4byte	0x9c1f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1861
-	.4byte	0x8d5f
-	.4byte	0x9c33
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1869
-	.4byte	0x8dc2
-	.uleb128 0x45
-	.4byte	.LVL1872
-	.4byte	0x8737
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x54
-	.4byte	.LASF1379
-	.byte	0x4
-	.2byte	0x27f
-	.4byte	0x8f
-	.byte	0x1
-	.4byte	0x9c76
-	.uleb128 0x55
-	.4byte	.LASF664
-	.byte	0x4
-	.2byte	0x27f
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1380
-	.byte	0x4
-	.2byte	0x281
-	.4byte	0x57
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1381
-	.byte	0x4
-	.2byte	0x265
-	.4byte	0x8f
-	.4byte	.LFB298
-	.4byte	.LFE298-.LFB298
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x9d26
-	.uleb128 0x44
-	.4byte	.LVL859
-	.4byte	0x530b
-	.4byte	0x9ca4
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL860
-	.4byte	0x530b
-	.4byte	0x9cb8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL861
-	.4byte	0x530b
-	.4byte	0x9ccc
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL862
-	.4byte	0x530b
-	.4byte	0x9cef
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR80
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL863
-	.4byte	0x530b
-	.4byte	0x9d13
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR135
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x200
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL864
-	.4byte	0x5b2a
-	.uleb128 0x48
-	.4byte	.LVL865
-	.4byte	0x6e4b
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1382
-	.byte	0x4
-	.2byte	0x162
-	.4byte	0x8f
-	.4byte	.LFB297
-	.4byte	.LFE297-.LFB297
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x9f4a
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x4
-	.2byte	0x164
-	.4byte	0x74
-	.4byte	.LLST429
-	.uleb128 0x5e
-	.4byte	.LASF1383
-	.byte	0x4
-	.2byte	0x165
-	.4byte	0x74
-	.4byte	.LLST430
-	.uleb128 0x48
-	.4byte	.LVL1320
-	.4byte	0x5194
-	.uleb128 0x48
-	.4byte	.LVL1321
-	.4byte	0x5194
-	.uleb128 0x44
-	.4byte	.LVL1323
-	.4byte	0x5194
-	.4byte	0x9d84
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1324
-	.4byte	0x5194
-	.4byte	0x9d98
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1325
-	.4byte	0x5194
-	.4byte	0x9dac
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1326
-	.4byte	0x5194
-	.4byte	0x9dc0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1327
-	.4byte	0x5194
-	.4byte	0x9dd4
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1329
-	.4byte	0x5194
-	.4byte	0x9de8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1330
-	.4byte	0x5194
-	.4byte	0x9dfc
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1331
-	.4byte	0x5194
-	.4byte	0x9e10
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1332
-	.4byte	0x5194
-	.uleb128 0x44
-	.4byte	.LVL1333
-	.4byte	0x5194
-	.4byte	0x9e2d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1334
-	.4byte	0x5194
-	.4byte	0x9e41
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1335
-	.4byte	0x5194
-	.uleb128 0x44
-	.4byte	.LVL1338
-	.4byte	0x5194
-	.4byte	0x9e5e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1340
-	.4byte	0x5194
-	.uleb128 0x48
-	.4byte	.LVL1341
-	.4byte	0x5194
-	.uleb128 0x48
-	.4byte	.LVL1342
-	.4byte	0x5194
-	.uleb128 0x48
-	.4byte	.LVL1343
-	.4byte	0x5194
-	.uleb128 0x48
-	.4byte	.LVL1346
-	.4byte	0x5194
-	.uleb128 0x44
-	.4byte	.LVL1349
-	.4byte	0x5194
-	.4byte	0x9e9f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1350
-	.4byte	0x5194
-	.4byte	0x9eb3
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1352
-	.4byte	0x5194
-	.uleb128 0x48
-	.4byte	.LVL1353
-	.4byte	0x5194
-	.uleb128 0x48
-	.4byte	.LVL1354
-	.4byte	0x5194
-	.uleb128 0x48
-	.4byte	.LVL1355
-	.4byte	0x5194
-	.uleb128 0x48
-	.4byte	.LVL1356
-	.4byte	0x5194
-	.uleb128 0x44
-	.4byte	.LVL1357
-	.4byte	0x530b
-	.4byte	0x9ef4
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1359
-	.4byte	0x5194
-	.4byte	0x9f08
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1360
-	.4byte	0x5194
-	.4byte	0x9f1c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1364
-	.4byte	0x5194
-	.uleb128 0x48
-	.4byte	.LVL1367
-	.4byte	0x5194
-	.uleb128 0x48
-	.4byte	.LVL1370
-	.4byte	0x5194
-	.uleb128 0x48
-	.4byte	.LVL1373
-	.4byte	0x5194
-	.uleb128 0x48
-	.4byte	.LVL1377
-	.4byte	0x5194
-	.byte	0
-	.uleb128 0x7b
-	.4byte	.LASF1384
-	.byte	0x4
-	.byte	0xc7
-	.4byte	0x8f
-	.4byte	.LFB296
-	.4byte	.LFE296-.LFB296
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x9fb4
-	.uleb128 0x40
-	.4byte	.LASF1365
-	.byte	0x4
-	.byte	0xc7
-	.4byte	0x98ec
-	.4byte	.LLST162
-	.uleb128 0x41
-	.ascii	"i\000"
-	.byte	0x4
-	.byte	0xc9
-	.4byte	0x74
-	.4byte	.LLST163
-	.uleb128 0x41
-	.ascii	"j\000"
-	.byte	0x4
-	.byte	0xc9
-	.4byte	0x74
-	.4byte	.LLST164
-	.uleb128 0x48
-	.4byte	.LVL394
-	.4byte	0xa000
-	.uleb128 0x44
-	.4byte	.LVL395
-	.4byte	0xa000
-	.4byte	0x9faa
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -48
-	.byte	0x6
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL399
-	.4byte	0x9fb4
-	.byte	0
-	.uleb128 0x4b
-	.4byte	.LASF1385
-	.byte	0x4
-	.byte	0xb5
-	.4byte	0x8f
-	.4byte	.LFB295
-	.4byte	.LFE295-.LFB295
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x9fdd
-	.uleb128 0x40
-	.4byte	.LASF1386
-	.byte	0x4
-	.byte	0xb5
-	.4byte	0x57
-	.4byte	.LLST161
-	.byte	0
-	.uleb128 0x3e
-	.4byte	.LASF1387
-	.byte	0x4
-	.byte	0xaf
-	.4byte	.LFB294
-	.4byte	.LFE294-.LFB294
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xa000
-	.uleb128 0x52
-	.4byte	.LASF1388
-	.byte	0x4
-	.byte	0xaf
-	.4byte	0x74
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0
-	.uleb128 0x4b
-	.4byte	.LASF1389
-	.byte	0x4
-	.byte	0x8f
-	.4byte	0x57
-	.4byte	.LFB293
-	.4byte	.LFE293-.LFB293
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xa045
-	.uleb128 0x3f
-	.ascii	"num\000"
-	.byte	0x4
-	.byte	0x8f
-	.4byte	0x74
-	.4byte	.LLST158
-	.uleb128 0x41
-	.ascii	"i\000"
-	.byte	0x4
-	.byte	0x91
-	.4byte	0x57
-	.4byte	.LLST159
-	.uleb128 0x61
-	.4byte	.LASF1390
-	.byte	0x4
-	.byte	0x92
-	.4byte	0x74
-	.4byte	.LLST160
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1391
-	.byte	0x3
-	.2byte	0x319
-	.4byte	0x74
-	.4byte	.LFB292
-	.4byte	.LFE292-.LFB292
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xa335
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x3
-	.2byte	0x319
-	.4byte	0x3a
-	.4byte	.LLST319
-	.uleb128 0x6d
-	.ascii	"dir\000"
-	.byte	0x3
-	.2byte	0x319
-	.4byte	0x3a
-	.4byte	.LLST320
-	.uleb128 0x5c
-	.4byte	.LASF1393
-	.byte	0x3
-	.2byte	0x319
-	.4byte	0x3a
-	.4byte	.LLST321
-	.uleb128 0x5c
-	.4byte	.LASF17
-	.byte	0x3
-	.2byte	0x319
-	.4byte	0x8b6
-	.4byte	.LLST322
-	.uleb128 0x5c
-	.4byte	.LASF18
-	.byte	0x3
-	.2byte	0x319
-	.4byte	0x8b6
-	.4byte	.LLST323
-	.uleb128 0x5e
-	.4byte	.LASF15
-	.byte	0x3
-	.2byte	0x31b
-	.4byte	0x74
-	.4byte	.LLST324
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x3
-	.2byte	0x31c
-	.4byte	0x74
-	.4byte	.LLST325
-	.uleb128 0x38
-	.4byte	.LASF271
-	.byte	0x3
-	.2byte	0x31d
-	.4byte	0x73e
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -96
-	.uleb128 0x38
-	.4byte	.LASF1394
-	.byte	0x3
-	.2byte	0x31e
-	.4byte	0x139d
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -100
-	.uleb128 0x5e
-	.4byte	.LASF1395
-	.byte	0x3
-	.2byte	0x31f
-	.4byte	0x74
-	.4byte	.LLST326
-	.uleb128 0x38
-	.4byte	.LASF20
-	.byte	0x3
-	.2byte	0x320
-	.4byte	0x180a
-	.uleb128 0x1
-	.byte	0x55
-	.uleb128 0x6b
-	.4byte	.Ldebug_ranges0+0x220
-	.4byte	0xa145
-	.uleb128 0x5e
-	.4byte	.LASF1396
-	.byte	0x3
-	.2byte	0x331
-	.4byte	0x74
-	.4byte	.LLST327
-	.uleb128 0x5e
-	.4byte	.LASF1397
-	.byte	0x3
-	.2byte	0x332
-	.4byte	0x74
-	.4byte	.LLST328
-	.uleb128 0x5e
-	.4byte	.LASF1398
-	.byte	0x3
-	.2byte	0x333
-	.4byte	0x8b6
-	.4byte	.LLST329
-	.byte	0
-	.uleb128 0x6b
-	.4byte	.Ldebug_ranges0+0x238
-	.4byte	0xa15f
-	.uleb128 0x5d
-	.ascii	"tmp\000"
-	.byte	0x3
-	.2byte	0x345
-	.4byte	0x74
-	.4byte	.LLST330
-	.byte	0
-	.uleb128 0x6f
-	.4byte	.LBB306
-	.4byte	.LBE306-.LBB306
-	.4byte	0xa179
-	.uleb128 0x57
-	.ascii	"tmp\000"
-	.byte	0x3
-	.2byte	0x372
-	.4byte	0x74
-	.byte	0
-	.uleb128 0x6f
-	.4byte	.LBB302
-	.4byte	.LBE302-.LBB302
-	.4byte	0xa197
-	.uleb128 0x5e
-	.4byte	.LASF1399
-	.byte	0x3
-	.2byte	0x387
-	.4byte	0xd6d
-	.4byte	.LLST331
-	.byte	0
-	.uleb128 0x7f
-	.4byte	0xa1a9
-	.uleb128 0x56
-	.4byte	.LASF1400
-	.byte	0x3
-	.2byte	0x395
-	.4byte	0x116f
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL949
-	.4byte	0x530b
-	.4byte	0xa1c9
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x40
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL950
-	.4byte	0xa514
-	.4byte	0xa1ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x91
-	.sleb128 -116
-	.byte	0x94
-	.byte	0x1
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 4
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL951
-	.4byte	0xa45d
-	.4byte	0xa213
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL983
-	.4byte	0xa335
-	.4byte	0xa239
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL985
-	.4byte	0xa514
-	.4byte	0xa269
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x32
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 4
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL986
-	.4byte	0xa45d
-	.4byte	0xa27d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL990
-	.4byte	0xa514
-	.4byte	0xa2aa
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x32
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 4
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL993
-	.4byte	0xa45d
-	.4byte	0xa2be
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL994
-	.4byte	0xa514
-	.4byte	0xa2f0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x32
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x4
-	.byte	0x74
-	.sleb128 0
-	.byte	0x33
-	.byte	0x1a
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 4
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL997
-	.4byte	0xa335
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x4
-	.byte	0x74
-	.sleb128 -2
-	.byte	0x33
-	.byte	0x1a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1a
-	.byte	0x30
-	.byte	0x7b
-	.sleb128 -1024
-	.byte	0x91
-	.sleb128 -112
-	.byte	0x6
-	.byte	0x77
-	.sleb128 0
-	.byte	0x30
-	.byte	0x2e
-	.byte	0x28
-	.2byte	0x1
-	.byte	0x16
-	.byte	0x13
-	.byte	0x77
-	.sleb128 0
-	.byte	0x30
-	.byte	0x29
-	.byte	0x28
-	.2byte	0x1
-	.byte	0x16
-	.byte	0x13
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -112
-	.byte	0x6
-	.byte	0
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1401
-	.byte	0x3
-	.2byte	0x2eb
-	.4byte	.LFB291
-	.4byte	.LFE291-.LFB291
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xa45d
-	.uleb128 0x5c
-	.4byte	.LASF20
-	.byte	0x3
-	.2byte	0x2eb
-	.4byte	0x180a
-	.4byte	.LLST311
-	.uleb128 0x6d
-	.ascii	"dir\000"
-	.byte	0x3
-	.2byte	0x2eb
-	.4byte	0x3a
-	.4byte	.LLST312
-	.uleb128 0x5c
-	.4byte	.LASF1402
-	.byte	0x3
-	.2byte	0x2eb
-	.4byte	0x3a
-	.4byte	.LLST313
-	.uleb128 0x5c
-	.4byte	.LASF17
-	.byte	0x3
-	.2byte	0x2eb
-	.4byte	0x8b6
-	.4byte	.LLST314
-	.uleb128 0x5c
-	.4byte	.LASF18
-	.byte	0x3
-	.2byte	0x2eb
-	.4byte	0x8b6
-	.4byte	.LLST315
-	.uleb128 0x5e
-	.4byte	.LASF1403
-	.byte	0x3
-	.2byte	0x2ed
-	.4byte	0x13e
-	.4byte	.LLST316
-	.uleb128 0x38
-	.4byte	.LASF1404
-	.byte	0x3
-	.2byte	0x2ee
-	.4byte	0x13e
-	.uleb128 0x1
-	.byte	0x56
-	.uleb128 0x5d
-	.ascii	"tmp\000"
-	.byte	0x3
-	.2byte	0x2ef
-	.4byte	0x74
-	.4byte	.LLST317
-	.uleb128 0x5e
-	.4byte	.LASF1290
-	.byte	0x3
-	.2byte	0x2f0
-	.4byte	0x8b6
-	.4byte	.LLST318
-	.uleb128 0x44
-	.4byte	.LVL923
-	.4byte	0x5255
-	.4byte	0xa3f9
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x72
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL928
-	.4byte	0x52a5
-	.4byte	0xa415
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x400
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL932
-	.4byte	0x5255
-	.4byte	0xa435
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x72
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL939
-	.4byte	0x52a5
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0xb
-	.byte	0x74
-	.sleb128 0
-	.byte	0x39
-	.byte	0x24
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x1000
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x400
-	.byte	0
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1405
-	.byte	0x3
-	.2byte	0x27b
-	.4byte	.LFB290
-	.4byte	.LFE290-.LFB290
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xa508
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x3
-	.2byte	0x27b
-	.4byte	0x3a
-	.4byte	.LLST156
-	.uleb128 0x38
-	.4byte	.LASF1406
-	.byte	0x3
-	.2byte	0x27d
-	.4byte	0xfd3
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -16
-	.uleb128 0x38
-	.4byte	.LASF20
-	.byte	0x3
-	.2byte	0x27e
-	.4byte	0x180a
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x38
-	.4byte	.LASF1407
-	.byte	0x3
-	.2byte	0x280
-	.4byte	0xa508
-	.uleb128 0x3
-	.byte	0x71
-	.sleb128 16
-	.byte	0x9f
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x178
-	.uleb128 0x5e
-	.4byte	.LASF1408
-	.byte	0x3
-	.2byte	0x28a
-	.4byte	0xa50e
-	.4byte	.LLST157
-	.uleb128 0x6f
-	.4byte	.LBB238
-	.4byte	.LBE238-.LBB238
-	.4byte	0xa4e2
-	.uleb128 0x38
-	.4byte	.LASF1399
-	.byte	0x3
-	.2byte	0x296
-	.4byte	0xd78
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -12
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL367
-	.4byte	0xa672
-	.4byte	0xa4f6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL368
-	.4byte	0xa63e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x14ea
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x1552
-	.uleb128 0x69
-	.4byte	.LASF1409
-	.byte	0x3
-	.2byte	0x208
-	.4byte	.LFB289
-	.4byte	.LFE289-.LFB289
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xa63e
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x3
-	.2byte	0x208
-	.4byte	0x3a
-	.4byte	.LLST142
-	.uleb128 0x6d
-	.ascii	"dir\000"
-	.byte	0x3
-	.2byte	0x208
-	.4byte	0x3a
-	.4byte	.LLST143
-	.uleb128 0x5c
-	.4byte	.LASF1393
-	.byte	0x3
-	.2byte	0x208
-	.4byte	0x3a
-	.4byte	.LLST144
-	.uleb128 0x5c
-	.4byte	.LASF1402
-	.byte	0x3
-	.2byte	0x208
-	.4byte	0x3a
-	.4byte	.LLST145
-	.uleb128 0x5c
-	.4byte	.LASF17
-	.byte	0x3
-	.2byte	0x208
-	.4byte	0x8b6
-	.4byte	.LLST146
-	.uleb128 0x5c
-	.4byte	.LASF18
-	.byte	0x3
-	.2byte	0x208
-	.4byte	0x8b6
-	.4byte	.LLST147
-	.uleb128 0x5e
-	.4byte	.LASF1400
-	.byte	0x3
-	.2byte	0x20a
-	.4byte	0x116f
-	.4byte	.LLST148
-	.uleb128 0x5e
-	.4byte	.LASF1406
-	.byte	0x3
-	.2byte	0x20b
-	.4byte	0xfc8
-	.4byte	.LLST149
-	.uleb128 0x5e
-	.4byte	.LASF1410
-	.byte	0x3
-	.2byte	0x20c
-	.4byte	0x3a
-	.4byte	.LLST150
-	.uleb128 0x5e
-	.4byte	.LASF20
-	.byte	0x3
-	.2byte	0x20d
-	.4byte	0x180a
-	.4byte	.LLST151
-	.uleb128 0x5e
-	.4byte	.LASF1411
-	.byte	0x3
-	.2byte	0x20e
-	.4byte	0x19b3
-	.4byte	.LLST152
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x160
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x3
-	.2byte	0x227
-	.4byte	0x74
-	.4byte	.LLST153
-	.uleb128 0x38
-	.4byte	.LASF1407
-	.byte	0x3
-	.2byte	0x228
-	.4byte	0x14ea
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x5e
-	.4byte	.LASF1412
-	.byte	0x3
-	.2byte	0x229
-	.4byte	0x293a
-	.4byte	.LLST154
-	.uleb128 0x6f
-	.4byte	.LBB235
-	.4byte	.LBE235-.LBB235
-	.4byte	0xa62a
-	.uleb128 0x5e
-	.4byte	.LASF1396
-	.byte	0x3
-	.2byte	0x232
-	.4byte	0x74
-	.4byte	.LLST155
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL347
-	.4byte	0x10462
-	.uleb128 0x48
-	.4byte	.LVL350
-	.4byte	0x10462
-	.byte	0
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1413
-	.byte	0x3
-	.2byte	0x200
-	.4byte	.LFB288
-	.4byte	.LFE288-.LFB288
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xa672
-	.uleb128 0x70
-	.4byte	.LASF20
-	.byte	0x3
-	.2byte	0x200
-	.4byte	0x180a
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x38
-	.4byte	.LASF1406
-	.byte	0x3
-	.2byte	0x202
-	.4byte	0xfd3
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -4
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1414
-	.byte	0x3
-	.2byte	0x1e9
-	.4byte	.LFB287
-	.4byte	.LFE287-.LFB287
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xa6b6
-	.uleb128 0x70
-	.4byte	.LASF20
-	.byte	0x3
-	.2byte	0x1e9
-	.4byte	0x180a
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5e
-	.4byte	.LASF1406
-	.byte	0x3
-	.2byte	0x1eb
-	.4byte	0xfc8
-	.4byte	.LLST141
-	.uleb128 0x38
-	.4byte	.LASF1407
-	.byte	0x3
-	.2byte	0x1ec
-	.4byte	0x14ea
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -4
-	.byte	0
-	.uleb128 0x6e
-	.4byte	.LASF1415
-	.byte	0x3
-	.2byte	0x1e1
-	.byte	0x1
-	.4byte	0xa6d0
-	.uleb128 0x55
-	.4byte	.LASF1416
-	.byte	0x3
-	.2byte	0x1e1
-	.4byte	0x1aea
-	.byte	0
-	.uleb128 0x6e
-	.4byte	.LASF1417
-	.byte	0x3
-	.2byte	0x1cf
-	.byte	0x1
-	.4byte	0xa6ea
-	.uleb128 0x55
-	.4byte	.LASF20
-	.byte	0x3
-	.2byte	0x1cf
-	.4byte	0x180a
-	.byte	0
-	.uleb128 0x80
-	.4byte	.LASF1421
-	.byte	0x3
-	.2byte	0x1c9
-	.4byte	0xa710
-	.uleb128 0x55
-	.4byte	.LASF1416
-	.byte	0x3
-	.2byte	0x1c9
-	.4byte	0x1aea
-	.uleb128 0x56
-	.4byte	.LASF20
-	.byte	0x3
-	.2byte	0x1cb
-	.4byte	0x180a
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1418
-	.byte	0x3
-	.2byte	0x1c3
-	.4byte	0x74
-	.4byte	.LFB283
-	.4byte	.LFE283-.LFB283
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xa74b
-	.uleb128 0x5c
-	.4byte	.LASF1416
-	.byte	0x3
-	.2byte	0x1c3
-	.4byte	0x1aea
-	.4byte	.LLST139
-	.uleb128 0x5e
-	.4byte	.LASF20
-	.byte	0x3
-	.2byte	0x1c5
-	.4byte	0x180a
-	.4byte	.LLST140
-	.byte	0
-	.uleb128 0x6e
-	.4byte	.LASF1419
-	.byte	0x3
-	.2byte	0x1bb
-	.byte	0x1
-	.4byte	0xa771
-	.uleb128 0x55
-	.4byte	.LASF20
-	.byte	0x3
-	.2byte	0x1bb
-	.4byte	0x180a
-	.uleb128 0x55
-	.4byte	.LASF1420
-	.byte	0x3
-	.2byte	0x1bb
-	.4byte	0xbc2
-	.byte	0
-	.uleb128 0x80
-	.4byte	.LASF1422
-	.byte	0x3
-	.2byte	0x1b3
-	.4byte	0xa797
-	.uleb128 0x55
-	.4byte	.LASF20
-	.byte	0x3
-	.2byte	0x1b3
-	.4byte	0x180a
-	.uleb128 0x55
-	.4byte	.LASF1420
-	.byte	0x3
-	.2byte	0x1b3
-	.4byte	0xbc2
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1423
-	.byte	0x3
-	.2byte	0x18f
-	.4byte	.LFB280
-	.4byte	.LFE280-.LFB280
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xa7dc
-	.uleb128 0x70
-	.4byte	.LASF1424
-	.byte	0x3
-	.2byte	0x18f
-	.4byte	0x3a
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5d
-	.ascii	"tmp\000"
-	.byte	0x3
-	.2byte	0x191
-	.4byte	0x116f
-	.4byte	.LLST137
-	.uleb128 0x5e
-	.4byte	.LASF1406
-	.byte	0x3
-	.2byte	0x192
-	.4byte	0xfc8
-	.4byte	.LLST138
-	.byte	0
-	.uleb128 0x6e
-	.4byte	.LASF1425
-	.byte	0x3
-	.2byte	0x15c
-	.byte	0x1
-	.4byte	0xa801
-	.uleb128 0x66
-	.ascii	"ns\000"
-	.byte	0x3
-	.2byte	0x15c
-	.4byte	0x74
-	.uleb128 0x56
-	.4byte	.LASF1426
-	.byte	0x3
-	.2byte	0x15e
-	.4byte	0x8f
-	.byte	0
-	.uleb128 0x6e
-	.4byte	.LASF1427
-	.byte	0x3
-	.2byte	0x152
-	.byte	0x1
-	.4byte	0xa835
-	.uleb128 0x55
-	.4byte	.LASF1392
-	.byte	0x3
-	.2byte	0x152
-	.4byte	0x3a
-	.uleb128 0x55
-	.4byte	.LASF1428
-	.byte	0x3
-	.2byte	0x152
-	.4byte	0x74
-	.uleb128 0x68
-	.uleb128 0x56
-	.4byte	.LASF20
-	.byte	0x3
-	.2byte	0x156
-	.4byte	0x180a
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1429
-	.byte	0x3
-	.2byte	0x136
-	.4byte	0x74
-	.4byte	.LFB277
-	.4byte	.LFE277-.LFB277
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xa8c4
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x3
-	.2byte	0x136
-	.4byte	0x3a
-	.4byte	.LLST101
-	.uleb128 0x71
-	.ascii	"tmp\000"
-	.byte	0x3
-	.2byte	0x138
-	.4byte	0xd78
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -20
-	.uleb128 0x81
-	.4byte	.LASF15
-	.byte	0x3
-	.2byte	0x139
-	.4byte	0x74
-	.byte	0
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x3
-	.2byte	0x13a
-	.4byte	0x74
-	.4byte	.LLST102
-	.uleb128 0x38
-	.4byte	.LASF20
-	.byte	0x3
-	.2byte	0x13b
-	.4byte	0x180a
-	.uleb128 0x1
-	.byte	0x55
-	.uleb128 0x82
-	.4byte	0xa8c4
-	.4byte	.LBB211
-	.4byte	.LBE211-.LBB211
-	.byte	0x3
-	.2byte	0x141
-	.uleb128 0x4f
-	.4byte	0xa8d5
-	.4byte	.LLST103
-	.uleb128 0x45
-	.4byte	.LVL197
-	.4byte	0x1046f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x64
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x54
-	.4byte	.LASF1430
-	.byte	0x3
-	.2byte	0x130
-	.4byte	0x74
-	.byte	0x1
-	.4byte	0xa8e2
-	.uleb128 0x55
-	.4byte	.LASF602
-	.byte	0x3
-	.2byte	0x130
-	.4byte	0x74
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1431
-	.byte	0x3
-	.2byte	0x121
-	.4byte	.LFB275
-	.4byte	.LFE275-.LFB275
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xa925
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x3
-	.2byte	0x121
-	.4byte	0x3a
-	.4byte	.LLST85
-	.uleb128 0x71
-	.ascii	"tmp\000"
-	.byte	0x3
-	.2byte	0x123
-	.4byte	0xd6d
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x38
-	.4byte	.LASF20
-	.byte	0x3
-	.2byte	0x124
-	.4byte	0x180a
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1432
-	.byte	0x3
-	.2byte	0x112
-	.4byte	.LFB274
-	.4byte	.LFE274-.LFB274
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xa968
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x3
-	.2byte	0x112
-	.4byte	0x3a
-	.4byte	.LLST84
-	.uleb128 0x71
-	.ascii	"tmp\000"
-	.byte	0x3
-	.2byte	0x114
-	.4byte	0xd6d
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x38
-	.4byte	.LASF20
-	.byte	0x3
-	.2byte	0x115
-	.4byte	0x180a
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0
-	.uleb128 0x4b
-	.4byte	.LASF1433
-	.byte	0x3
-	.byte	0xa9
-	.4byte	0x8f
-	.4byte	.LFB273
-	.4byte	.LFE273-.LFB273
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xa9ad
-	.uleb128 0x40
-	.4byte	.LASF923
-	.byte	0x3
-	.byte	0xa9
-	.4byte	0x3a
-	.4byte	.LLST82
-	.uleb128 0x83
-	.4byte	.LASF1434
-	.byte	0x3
-	.byte	0xac
-	.4byte	0x8f
-	.byte	0
-	.uleb128 0x41
-	.ascii	"tmp\000"
-	.byte	0x3
-	.byte	0xad
-	.4byte	0xd6d
-	.4byte	.LLST83
-	.byte	0
-	.uleb128 0x3e
-	.4byte	.LASF1435
-	.byte	0x3
-	.byte	0x93
-	.4byte	.LFB272
-	.4byte	.LFE272-.LFB272
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xa9df
-	.uleb128 0x52
-	.4byte	.LASF1436
-	.byte	0x3
-	.byte	0x93
-	.4byte	0x8f
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x41
-	.ascii	"tmp\000"
-	.byte	0x3
-	.byte	0x95
-	.4byte	0xd6d
-	.4byte	.LLST81
-	.byte	0
-	.uleb128 0x3e
-	.4byte	.LASF1437
-	.byte	0x3
-	.byte	0x8e
-	.4byte	.LFB271
-	.4byte	.LFE271-.LFB271
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xaa04
-	.uleb128 0x3f
-	.ascii	"div\000"
-	.byte	0x3
-	.byte	0x8e
-	.4byte	0x3a
-	.4byte	.LLST80
-	.byte	0
-	.uleb128 0x3e
-	.4byte	.LASF1438
-	.byte	0x3
-	.byte	0x82
-	.4byte	.LFB270
-	.4byte	.LFE270-.LFB270
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xaa29
-	.uleb128 0x40
-	.4byte	.LASF1439
-	.byte	0x3
-	.byte	0x82
-	.4byte	0x3a
-	.4byte	.LLST79
-	.byte	0
-	.uleb128 0x50
-	.4byte	.LASF1440
-	.byte	0x3
-	.byte	0x77
-	.4byte	0x15bc
-	.byte	0x1
-	.4byte	0xaa5b
-	.uleb128 0x51
-	.4byte	.LASF1392
-	.byte	0x3
-	.byte	0x77
-	.4byte	0x3a
-	.uleb128 0x7c
-	.ascii	"tmp\000"
-	.byte	0x3
-	.byte	0x79
-	.4byte	0x15bc
-	.uleb128 0x7d
-	.4byte	.LASF20
-	.byte	0x3
-	.byte	0x7a
-	.4byte	0x180a
-	.byte	0
-	.uleb128 0x76
-	.4byte	.LASF1441
-	.byte	0x3
-	.byte	0x6e
-	.byte	0x1
-	.4byte	0xaa73
-	.uleb128 0x84
-	.ascii	"en\000"
-	.byte	0x3
-	.byte	0x6e
-	.4byte	0x3a
-	.byte	0
-	.uleb128 0x3e
-	.4byte	.LASF1442
-	.byte	0x3
-	.byte	0xf
-	.4byte	.LFB267
-	.4byte	.LFE267-.LFB267
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xab08
-	.uleb128 0x40
-	.4byte	.LASF1443
-	.byte	0x3
-	.byte	0xf
-	.4byte	0x13e
-	.4byte	.LLST424
-	.uleb128 0x41
-	.ascii	"i\000"
-	.byte	0x3
-	.byte	0x11
-	.4byte	0x74
-	.4byte	.LLST425
-	.uleb128 0x61
-	.4byte	.LASF1444
-	.byte	0x3
-	.byte	0x12
-	.4byte	0xd6d
-	.4byte	.LLST426
-	.uleb128 0x85
-	.4byte	0xa7dc
-	.4byte	.LBB343
-	.4byte	.Ldebug_ranges0+0x318
-	.byte	0x3
-	.byte	0x48
-	.4byte	0xaaf6
-	.uleb128 0x4f
-	.4byte	0xa7e9
-	.4byte	.LLST427
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x318
-	.uleb128 0x74
-	.4byte	0xe852
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x318
-	.uleb128 0x4f
-	.4byte	0xa7e9
-	.4byte	.LLST427
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x318
-	.uleb128 0x74
-	.4byte	0xe852
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1319
-	.4byte	0x5194
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x9000
-	.byte	0
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1445
-	.byte	0x2
-	.2byte	0xd0e
-	.4byte	.LFB266
-	.4byte	.LFE266-.LFB266
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xab78
-	.uleb128 0x6d
-	.ascii	"buf\000"
-	.byte	0x2
-	.2byte	0xd0e
-	.4byte	0x1aea
-	.4byte	.LLST284
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0xd10
-	.4byte	0x3a
-	.4byte	.LLST285
-	.uleb128 0x5e
-	.4byte	.LASF1446
-	.byte	0x2
-	.2byte	0xd11
-	.4byte	0x7cb
-	.4byte	.LLST286
-	.uleb128 0x86
-	.4byte	0x8eb5
-	.4byte	.LBB297
-	.4byte	.LBE297-.LBB297
-	.byte	0x2
-	.2byte	0xd17
-	.uleb128 0x45
-	.4byte	.LVL811
-	.4byte	0x530b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x3b
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1447
-	.byte	0x2
-	.2byte	0xcf7
-	.4byte	0x84
-	.4byte	.LFB265
-	.4byte	.LFE265-.LFB265
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xac06
-	.uleb128 0x5c
-	.4byte	.LASF1448
-	.byte	0x2
-	.2byte	0xcf7
-	.4byte	0x293a
-	.4byte	.LLST790
-	.uleb128 0x6d
-	.ascii	"die\000"
-	.byte	0x2
-	.2byte	0xcf7
-	.4byte	0x74
-	.4byte	.LLST791
-	.uleb128 0x5e
-	.4byte	.LASF1449
-	.byte	0x2
-	.2byte	0xcf9
-	.4byte	0x57
-	.4byte	.LLST792
-	.uleb128 0x71
-	.ascii	"blk\000"
-	.byte	0x2
-	.2byte	0xcfa
-	.4byte	0x57
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x56
-	.4byte	.LASF1450
-	.byte	0x2
-	.2byte	0xcfb
-	.4byte	0x57
-	.uleb128 0x5e
-	.4byte	.LASF15
-	.byte	0x2
-	.2byte	0xcfc
-	.4byte	0x84
-	.4byte	.LLST793
-	.uleb128 0x45
-	.4byte	.LVL3135
-	.4byte	0xac06
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x4
-	.byte	0x74
-	.sleb128 7
-	.byte	0x33
-	.byte	0x26
-	.byte	0
-	.byte	0
-	.uleb128 0x54
-	.4byte	.LASF1451
-	.byte	0x2
-	.2byte	0xcd7
-	.4byte	0x84
-	.byte	0x1
-	.4byte	0xac82
-	.uleb128 0x55
-	.4byte	.LASF1452
-	.byte	0x2
-	.2byte	0xcd7
-	.4byte	0x8b6
-	.uleb128 0x66
-	.ascii	"die\000"
-	.byte	0x2
-	.2byte	0xcd7
-	.4byte	0x74
-	.uleb128 0x66
-	.ascii	"len\000"
-	.byte	0x2
-	.2byte	0xcd7
-	.4byte	0x74
-	.uleb128 0x56
-	.4byte	.LASF15
-	.byte	0x2
-	.2byte	0xcd9
-	.4byte	0x84
-	.uleb128 0x56
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0xcda
-	.4byte	0x74
-	.uleb128 0x57
-	.ascii	"blk\000"
-	.byte	0x2
-	.2byte	0xcdb
-	.4byte	0x57
-	.uleb128 0x57
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0xcdb
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1178
-	.byte	0x2
-	.2byte	0xcdc
-	.4byte	0xc5
-	.uleb128 0x56
-	.4byte	.LASF1450
-	.byte	0x2
-	.2byte	0xcdd
-	.4byte	0x57
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1453
-	.byte	0x2
-	.2byte	0xc96
-	.4byte	0x84
-	.4byte	.LFB263
-	.4byte	.LFE263-.LFB263
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xae0d
-	.uleb128 0x6d
-	.ascii	"req\000"
-	.byte	0x2
-	.2byte	0xc96
-	.4byte	0x1aea
-	.4byte	.LLST122
-	.uleb128 0x5c
-	.4byte	.LASF1355
-	.byte	0x2
-	.2byte	0xc96
-	.4byte	0x74
-	.4byte	.LLST123
-	.uleb128 0x5c
-	.4byte	.LASF1153
-	.byte	0x2
-	.2byte	0xc96
-	.4byte	0x74
-	.4byte	.LLST124
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0xc98
-	.4byte	0x74
-	.4byte	.LLST125
-	.uleb128 0x38
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0xc99
-	.4byte	0x74
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -40
-	.uleb128 0x5e
-	.4byte	.LASF1454
-	.byte	0x2
-	.2byte	0xc9a
-	.4byte	0x676
-	.4byte	.LLST122
-	.uleb128 0x38
-	.4byte	.LASF1455
-	.byte	0x2
-	.2byte	0xc9b
-	.4byte	0x74
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x5e
-	.4byte	.LASF923
-	.byte	0x2
-	.2byte	0xc9c
-	.4byte	0x74
-	.4byte	.LLST127
-	.uleb128 0x5e
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0xc9d
-	.4byte	0x3a
-	.4byte	.LLST128
-	.uleb128 0x44
-	.4byte	.LVL259
-	.4byte	0xb575
-	.4byte	0xad3c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL261
-	.4byte	0xbdec
-	.4byte	0xad6c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -44
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -40
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x5
-	.byte	0x77
-	.sleb128 0
-	.byte	0x74
-	.sleb128 0
-	.byte	0x1c
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL266
-	.4byte	0xbc12
-	.uleb128 0x44
-	.4byte	.LVL268
-	.4byte	0xa925
-	.4byte	0xad89
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL269
-	.4byte	0xe19b
-	.4byte	0xad9d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL271
-	.4byte	0xbcab
-	.4byte	0xadb1
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL272
-	.4byte	0xe067
-	.4byte	0xadcb
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL273
-	.4byte	0xa8e2
-	.4byte	0xaddf
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL274
-	.4byte	0xe175
-	.uleb128 0x44
-	.4byte	.LVL276
-	.4byte	0xbc12
-	.4byte	0xadfc
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL277
-	.4byte	0xe175
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1456
-	.byte	0x2
-	.2byte	0xc23
-	.4byte	0x84
-	.4byte	.LFB262
-	.4byte	.LFE262-.LFB262
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xb17b
-	.uleb128 0x6d
-	.ascii	"req\000"
-	.byte	0x2
-	.2byte	0xc23
-	.4byte	0x1aea
-	.4byte	.LLST516
-	.uleb128 0x5c
-	.4byte	.LASF1153
-	.byte	0x2
-	.2byte	0xc23
-	.4byte	0x74
-	.4byte	.LLST517
-	.uleb128 0x5c
-	.4byte	.LASF1355
-	.byte	0x2
-	.2byte	0xc23
-	.4byte	0x74
-	.4byte	.LLST518
-	.uleb128 0x5c
-	.4byte	.LASF1457
-	.byte	0x2
-	.2byte	0xc23
-	.4byte	0x74
-	.4byte	.LLST519
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0xc25
-	.4byte	0x74
-	.4byte	.LLST520
-	.uleb128 0x38
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0xc26
-	.4byte	0x74
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -76
-	.uleb128 0x5e
-	.4byte	.LASF1454
-	.byte	0x2
-	.2byte	0xc27
-	.4byte	0x676
-	.4byte	.LLST521
-	.uleb128 0x38
-	.4byte	.LASF1455
-	.byte	0x2
-	.2byte	0xc28
-	.4byte	0x74
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -72
-	.uleb128 0x5e
-	.4byte	.LASF923
-	.byte	0x2
-	.2byte	0xc29
-	.4byte	0x74
-	.4byte	.LLST522
-	.uleb128 0x5e
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0xc2a
-	.4byte	0x3a
-	.4byte	.LLST523
-	.uleb128 0x5e
-	.4byte	.LASF65
-	.byte	0x2
-	.2byte	0xc2b
-	.4byte	0x74
-	.4byte	.LLST524
-	.uleb128 0x5e
-	.4byte	.LASF58
-	.byte	0x2
-	.2byte	0xc2c
-	.4byte	0x74
-	.4byte	.LLST525
-	.uleb128 0x6b
-	.4byte	.Ldebug_ranges0+0x4a8
-	.4byte	0xafaa
-	.uleb128 0x38
-	.4byte	.LASF1458
-	.byte	0x2
-	.2byte	0xc74
-	.4byte	0xc5
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -68
-	.uleb128 0x44
-	.4byte	.LVL1797
-	.4byte	0x103ff
-	.4byte	0xaf15
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC27
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1799
-	.4byte	0xbdec
-	.4byte	0xaf49
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -76
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -72
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x7
-	.byte	0x91
-	.sleb128 -96
-	.byte	0x6
-	.byte	0x76
-	.sleb128 0
-	.byte	0x1c
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1800
-	.4byte	0xb17b
-	.4byte	0xaf68
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 -32
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1801
-	.4byte	0x103ff
-	.4byte	0xaf7f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC28
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1802
-	.4byte	0x103ff
-	.4byte	0xaf96
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC29
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1803
-	.4byte	0x103ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC30
-	.byte	0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1766
-	.4byte	0xb70a
-	.uleb128 0x44
-	.4byte	.LVL1768
-	.4byte	0xbdec
-	.4byte	0xafe7
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -76
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -72
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x7
-	.byte	0x91
-	.sleb128 -96
-	.byte	0x6
-	.byte	0x77
-	.sleb128 0
-	.byte	0x1c
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1773
-	.4byte	0xbc12
-	.uleb128 0x44
-	.4byte	.LVL1775
-	.4byte	0xa835
-	.4byte	0xb004
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1776
-	.4byte	0xc7c8
-	.4byte	0xb026
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR20+4
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1777
-	.4byte	0xa925
-	.4byte	0xb03a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1778
-	.4byte	0xe19b
-	.4byte	0xb04e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1779
-	.4byte	0xe0ed
-	.4byte	0xb068
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1780
-	.4byte	0xa045
-	.4byte	0xb08a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x5
-	.byte	0x91
-	.sleb128 -92
-	.byte	0x94
-	.byte	0x1
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1781
-	.4byte	0xdefd
-	.4byte	0xb09e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1782
-	.4byte	0xbcab
-	.4byte	0xb0b2
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1783
-	.4byte	0xdfdf
-	.4byte	0xb0cc
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1784
-	.4byte	0xa045
-	.4byte	0xb0ee
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x5
-	.byte	0x91
-	.sleb128 -92
-	.byte	0x94
-	.byte	0x1
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1785
-	.4byte	0xdf6d
-	.4byte	0xb108
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1787
-	.4byte	0xa8e2
-	.4byte	0xb11c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1788
-	.4byte	0xa925
-	.uleb128 0x44
-	.4byte	.LVL1789
-	.4byte	0xbcab
-	.4byte	0xb139
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1790
-	.4byte	0xa8e2
-	.4byte	0xb14d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1791
-	.4byte	0xe175
-	.uleb128 0x44
-	.4byte	.LVL1793
-	.4byte	0xbc12
-	.4byte	0xb16a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1794
-	.4byte	0xe175
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1459
-	.byte	0x2
-	.2byte	0xb7c
-	.4byte	0x84
-	.4byte	.LFB261
-	.4byte	.LFE261-.LFB261
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xb575
-	.uleb128 0x6d
-	.ascii	"req\000"
-	.byte	0x2
-	.2byte	0xb7c
-	.4byte	0x1aea
-	.4byte	.LLST493
-	.uleb128 0x5c
-	.4byte	.LASF1153
-	.byte	0x2
-	.2byte	0xb7c
-	.4byte	0x74
-	.4byte	.LLST494
-	.uleb128 0x5c
-	.4byte	.LASF1355
-	.byte	0x2
-	.2byte	0xb7c
-	.4byte	0x74
-	.4byte	.LLST495
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0xb7e
-	.4byte	0x74
-	.4byte	.LLST496
-	.uleb128 0x5e
-	.4byte	.LASF1454
-	.byte	0x2
-	.2byte	0xb7f
-	.4byte	0x676
-	.4byte	.LLST493
-	.uleb128 0x38
-	.4byte	.LASF1455
-	.byte	0x2
-	.2byte	0xb80
-	.4byte	0x74
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -40
-	.uleb128 0x38
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0xb81
-	.4byte	0x74
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x56
-	.4byte	.LASF1460
-	.byte	0x2
-	.2byte	0xb81
-	.4byte	0x74
-	.uleb128 0x5e
-	.4byte	.LASF923
-	.byte	0x2
-	.2byte	0xb82
-	.4byte	0x74
-	.4byte	.LLST498
-	.uleb128 0x81
-	.4byte	.LASF1461
-	.byte	0x2
-	.2byte	0xb82
-	.4byte	0x74
-	.byte	0
-	.uleb128 0x38
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0xb83
-	.4byte	0x3a
-	.uleb128 0x1
-	.byte	0x54
-	.uleb128 0x5e
-	.4byte	.LASF1462
-	.byte	0x2
-	.2byte	0xb83
-	.4byte	0x3a
-	.4byte	.LLST499
-	.uleb128 0x5e
-	.4byte	.LASF58
-	.byte	0x2
-	.2byte	0xb84
-	.4byte	0x74
-	.4byte	.LLST500
-	.uleb128 0x5e
-	.4byte	.LASF1463
-	.byte	0x2
-	.2byte	0xb85
-	.4byte	0x3a
-	.4byte	.LLST501
-	.uleb128 0x5e
-	.4byte	.LASF1464
-	.byte	0x2
-	.2byte	0xb86
-	.4byte	0x74
-	.4byte	.LLST502
-	.uleb128 0x5e
-	.4byte	.LASF1465
-	.byte	0x2
-	.2byte	0xb87
-	.4byte	0x74
-	.4byte	.LLST503
-	.uleb128 0x5e
-	.4byte	.LASF1466
-	.byte	0x2
-	.2byte	0xb88
-	.4byte	0x74
-	.4byte	.LLST504
-	.uleb128 0x5e
-	.4byte	.LASF72
-	.byte	0x2
-	.2byte	0xb89
-	.4byte	0x74
-	.4byte	.LLST505
-	.uleb128 0x58
-	.4byte	.LASF1467
-	.byte	0x2
-	.2byte	0xbac
-	.uleb128 0x6f
-	.4byte	.LBB411
-	.4byte	.LBE411-.LBB411
-	.4byte	0xb2e8
-	.uleb128 0x5e
-	.4byte	.LASF79
-	.byte	0x2
-	.2byte	0xb9f
-	.4byte	0x3a
-	.4byte	.LLST506
-	.uleb128 0x45
-	.4byte	.LVL1668
-	.4byte	0xc7c8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR20+4
-	.byte	0
-	.byte	0
-	.uleb128 0x6b
-	.4byte	.Ldebug_ranges0+0x470
-	.4byte	0xb332
-	.uleb128 0x5e
-	.4byte	.LASF1468
-	.byte	0x2
-	.2byte	0xbd0
-	.4byte	0x74
-	.4byte	.LLST507
-	.uleb128 0x44
-	.4byte	.LVL1696
-	.4byte	0xd687
-	.4byte	0xb31b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1699
-	.4byte	0xaa04
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x8
-	.byte	0x75
-	.sleb128 0
-	.byte	0x9
-	.byte	0xf4
-	.byte	0x24
-	.byte	0x9
-	.byte	0xfc
-	.byte	0x25
-	.byte	0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1651
-	.4byte	0xba02
-	.uleb128 0x44
-	.4byte	.LVL1657
-	.4byte	0xbdec
-	.4byte	0xb36e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -60
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -40
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x7
-	.byte	0x91
-	.sleb128 -48
-	.byte	0x6
-	.byte	0x91
-	.sleb128 -64
-	.byte	0x6
-	.byte	0x1c
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1665
-	.4byte	0xa835
-	.4byte	0xb382
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1669
-	.4byte	0xa925
-	.4byte	0xb396
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1670
-	.4byte	0xe19b
-	.4byte	0xb3aa
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1672
-	.4byte	0xe1c1
-	.4byte	0xb3c4
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 -1
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1673
-	.4byte	0xa835
-	.4byte	0xb3d8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1675
-	.4byte	0xe266
-	.4byte	0xb3f2
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1676
-	.4byte	0xa045
-	.4byte	0xb413
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -52
-	.byte	0x94
-	.byte	0x1
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1681
-	.4byte	0xe175
-	.4byte	0xb427
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1683
-	.4byte	0xe2e2
-	.4byte	0xb43b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1687
-	.4byte	0xe266
-	.4byte	0xb455
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1688
-	.4byte	0xa045
-	.4byte	0xb476
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -52
-	.byte	0x94
-	.byte	0x1
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1691
-	.4byte	0xa8e2
-	.4byte	0xb48a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1693
-	.4byte	0xdd4c
-	.4byte	0xb49e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x87
-	.4byte	.LVL1703
-	.4byte	0xb4af
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1706
-	.4byte	0xc7c8
-	.4byte	0xb4d1
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR20+4
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1707
-	.4byte	0xdd4c
-	.4byte	0xb4e5
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1710
-	.4byte	0x103ff
-	.4byte	0xb502
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC26
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1711
-	.4byte	0xe19b
-	.uleb128 0x88
-	.4byte	.LVL1712
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.4byte	0xb51f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1715
-	.4byte	0x103ff
-	.4byte	0xb536
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC23
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1716
-	.4byte	0x4d68
-	.4byte	0xb557
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC25
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x34
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x34
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1720
-	.4byte	0xe175
-	.4byte	0xb56b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1722
-	.4byte	0xe175
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1469
-	.byte	0x2
-	.2byte	0xb54
-	.4byte	0x84
-	.4byte	.LFB260
-	.4byte	.LFE260-.LFB260
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xb70a
-	.uleb128 0x6d
-	.ascii	"req\000"
-	.byte	0x2
-	.2byte	0xb54
-	.4byte	0x1aea
-	.4byte	.LLST117
-	.uleb128 0x5c
-	.4byte	.LASF1153
-	.byte	0x2
-	.2byte	0xb54
-	.4byte	0x74
-	.4byte	.LLST118
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0xb56
-	.4byte	0x74
-	.4byte	.LLST119
-	.uleb128 0x38
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0xb57
-	.4byte	0x74
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -40
-	.uleb128 0x5e
-	.4byte	.LASF1454
-	.byte	0x2
-	.2byte	0xb58
-	.4byte	0x676
-	.4byte	.LLST120
-	.uleb128 0x38
-	.4byte	.LASF1455
-	.byte	0x2
-	.2byte	0xb59
-	.4byte	0x74
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x38
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0xb5a
-	.4byte	0x3a
-	.uleb128 0x1
-	.byte	0x54
-	.uleb128 0x5e
-	.4byte	.LASF15
-	.byte	0x2
-	.2byte	0xb5b
-	.4byte	0x74
-	.4byte	.LLST121
-	.uleb128 0x44
-	.4byte	.LVL237
-	.4byte	0xbdec
-	.4byte	0xb638
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -40
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x5
-	.byte	0x77
-	.sleb128 0
-	.byte	0x76
-	.sleb128 0
-	.byte	0x1c
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL240
-	.4byte	0xa835
-	.4byte	0xb64c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL241
-	.4byte	0xa925
-	.4byte	0xb660
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL242
-	.4byte	0xe067
-	.4byte	0xb679
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL243
-	.4byte	0xa835
-	.4byte	0xb68d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL244
-	.4byte	0xde59
-	.4byte	0xb6a1
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL246
-	.4byte	0xe067
-	.4byte	0xb6ba
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL247
-	.4byte	0xa835
-	.4byte	0xb6ce
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL248
-	.4byte	0xde59
-	.4byte	0xb6e2
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL250
-	.4byte	0x103ff
-	.4byte	0xb6f9
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL251
-	.4byte	0xa8e2
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1470
-	.byte	0x2
-	.2byte	0xb01
-	.4byte	0x84
-	.4byte	.LFB259
-	.4byte	.LFE259-.LFB259
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xba02
-	.uleb128 0x6d
-	.ascii	"req\000"
-	.byte	0x2
-	.2byte	0xb01
-	.4byte	0x1aea
-	.4byte	.LLST508
-	.uleb128 0x5c
-	.4byte	.LASF1153
-	.byte	0x2
-	.2byte	0xb01
-	.4byte	0x74
-	.4byte	.LLST509
-	.uleb128 0x5c
-	.4byte	.LASF1355
-	.byte	0x2
-	.2byte	0xb01
-	.4byte	0x74
-	.4byte	.LLST510
-	.uleb128 0x5c
-	.4byte	.LASF1457
-	.byte	0x2
-	.2byte	0xb01
-	.4byte	0x74
-	.4byte	.LLST511
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0xb03
-	.4byte	0x74
-	.4byte	.LLST512
-	.uleb128 0x5e
-	.4byte	.LASF15
-	.byte	0x2
-	.2byte	0xb04
-	.4byte	0x74
-	.4byte	.LLST513
-	.uleb128 0x38
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0xb05
-	.4byte	0x74
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -76
-	.uleb128 0x5e
-	.4byte	.LASF1454
-	.byte	0x2
-	.2byte	0xb06
-	.4byte	0x676
-	.4byte	.LLST514
-	.uleb128 0x38
-	.4byte	.LASF1455
-	.byte	0x2
-	.2byte	0xb07
-	.4byte	0x74
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -72
-	.uleb128 0x5e
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0xb08
-	.4byte	0x3a
-	.4byte	.LLST515
-	.uleb128 0x38
-	.4byte	.LASF58
-	.byte	0x2
-	.2byte	0xb09
-	.4byte	0x74
-	.uleb128 0x9
-	.byte	0x91
-	.sleb128 -88
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.uleb128 0x6b
-	.4byte	.Ldebug_ranges0+0x488
-	.4byte	0xb89b
-	.uleb128 0x38
-	.4byte	.LASF1458
-	.byte	0x2
-	.2byte	0xb34
-	.4byte	0xc5
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -68
-	.uleb128 0x44
-	.4byte	.LVL1748
-	.4byte	0x103ff
-	.4byte	0xb808
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC27
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1751
-	.4byte	0xbdec
-	.4byte	0xb83a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -76
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -72
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x5
-	.byte	0x77
-	.sleb128 0
-	.byte	0x76
-	.sleb128 0
-	.byte	0x1c
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1752
-	.4byte	0xb17b
-	.4byte	0xb859
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 -32
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1753
-	.4byte	0x103ff
-	.4byte	0xb870
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC28
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1754
-	.4byte	0x103ff
-	.4byte	0xb887
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC29
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1755
-	.4byte	0x103ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC30
-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1729
-	.4byte	0xbdec
-	.4byte	0xb8cd
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -76
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -72
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x5
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x77
-	.sleb128 0
-	.byte	0x1c
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1732
-	.4byte	0xa835
-	.4byte	0xb8e1
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1733
-	.4byte	0xa925
-	.4byte	0xb8f5
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1734
-	.4byte	0xe0ed
-	.4byte	0xb90f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1735
-	.4byte	0xa045
-	.4byte	0xb931
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x5
-	.byte	0x91
-	.sleb128 -88
-	.byte	0x94
-	.byte	0x1
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1736
-	.4byte	0xdf6d
-	.4byte	0xb94b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1737
-	.4byte	0xa835
-	.4byte	0xb95f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1738
-	.4byte	0xde59
-	.4byte	0xb973
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1740
-	.4byte	0xe0ed
-	.4byte	0xb98d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1741
-	.4byte	0xa045
-	.4byte	0xb9af
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x5
-	.byte	0x91
-	.sleb128 -88
-	.byte	0x94
-	.byte	0x1
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1742
-	.4byte	0xdf6d
-	.4byte	0xb9c9
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1743
-	.4byte	0xa835
-	.4byte	0xb9dd
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1744
-	.4byte	0xde59
-	.4byte	0xb9f1
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1746
-	.4byte	0xa8e2
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1471
-	.byte	0x2
-	.2byte	0xac8
-	.4byte	0x84
-	.4byte	.LFB258
-	.4byte	.LFE258-.LFB258
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xbc12
-	.uleb128 0x6d
-	.ascii	"req\000"
-	.byte	0x2
-	.2byte	0xac8
-	.4byte	0x1aea
-	.4byte	.LLST486
-	.uleb128 0x5c
-	.4byte	.LASF1153
-	.byte	0x2
-	.2byte	0xac8
-	.4byte	0x74
-	.4byte	.LLST487
-	.uleb128 0x5c
-	.4byte	.LASF1355
-	.byte	0x2
-	.2byte	0xac8
-	.4byte	0x74
-	.4byte	.LLST488
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0xaca
-	.4byte	0x74
-	.4byte	.LLST489
-	.uleb128 0x5e
-	.4byte	.LASF1454
-	.byte	0x2
-	.2byte	0xacb
-	.4byte	0x676
-	.4byte	.LLST490
-	.uleb128 0x38
-	.4byte	.LASF1455
-	.byte	0x2
-	.2byte	0xacc
-	.4byte	0x74
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -40
-	.uleb128 0x38
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0xacd
-	.4byte	0x74
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x38
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0xace
-	.4byte	0x3a
-	.uleb128 0x1
-	.byte	0x55
-	.uleb128 0x38
-	.4byte	.LASF58
-	.byte	0x2
-	.2byte	0xacf
-	.4byte	0x74
-	.uleb128 0x6
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.uleb128 0x5e
-	.4byte	.LASF1465
-	.byte	0x2
-	.2byte	0xad0
-	.4byte	0x74
-	.4byte	.LLST491
-	.uleb128 0x5e
-	.4byte	.LASF1466
-	.byte	0x2
-	.2byte	0xad1
-	.4byte	0x74
-	.4byte	.LLST492
-	.uleb128 0x44
-	.4byte	.LVL1626
-	.4byte	0xbdec
-	.4byte	0xbafa
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -44
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -40
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x5
-	.byte	0x78
-	.sleb128 0
-	.byte	0x77
-	.sleb128 0
-	.byte	0x1c
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1629
-	.4byte	0xa835
-	.4byte	0xbb0e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1630
-	.4byte	0xa925
-	.4byte	0xbb22
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1631
-	.4byte	0xe2e2
-	.4byte	0xbb3c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1632
-	.4byte	0xa835
-	.4byte	0xbb50
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1633
-	.4byte	0xa045
-	.4byte	0xbb6f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1636
-	.4byte	0xe2e2
-	.4byte	0xbb89
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1637
-	.4byte	0xa045
-	.4byte	0xbba8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1640
-	.4byte	0xa8e2
-	.4byte	0xbbbc
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1643
-	.4byte	0x103ff
-	.4byte	0xbbd3
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC23
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1644
-	.4byte	0x4d68
-	.4byte	0xbbf4
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC24
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x34
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x38
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1645
-	.4byte	0x4d68
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC25
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x34
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x34
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1472
-	.byte	0x2
-	.2byte	0xab0
-	.4byte	0x74
-	.4byte	.LFB257
-	.4byte	.LFE257-.LFB257
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xbca5
-	.uleb128 0x5c
-	.4byte	.LASF1455
-	.byte	0x2
-	.2byte	0xab0
-	.4byte	0x3a
-	.4byte	.LLST96
-	.uleb128 0x5e
-	.4byte	.LASF1473
-	.byte	0x2
-	.2byte	0xab2
-	.4byte	0xbca5
-	.4byte	.LLST97
-	.uleb128 0x5e
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0xab3
-	.4byte	0x3a
-	.4byte	.LLST98
-	.uleb128 0x5e
-	.4byte	.LASF15
-	.byte	0x2
-	.2byte	0xab4
-	.4byte	0x74
-	.4byte	.LLST99
-	.uleb128 0x44
-	.4byte	.LVL185
-	.4byte	0xa925
-	.4byte	0xbc80
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL186
-	.4byte	0xbcab
-	.4byte	0xbc94
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL189
-	.4byte	0xa8e2
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x621
-	.uleb128 0x5b
-	.4byte	.LASF1474
-	.byte	0x2
-	.2byte	0xaa2
-	.4byte	0x74
-	.4byte	.LFB256
-	.4byte	.LFE256-.LFB256
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xbd20
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0xaa2
-	.4byte	0x3a
-	.4byte	.LLST73
-	.uleb128 0x5c
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0xaa2
-	.4byte	0x74
-	.4byte	.LLST74
-	.uleb128 0x5c
-	.4byte	.LASF1475
-	.byte	0x2
-	.2byte	0xaa2
-	.4byte	0x3a
-	.4byte	.LLST75
-	.uleb128 0x38
-	.4byte	.LASF15
-	.byte	0x2
-	.2byte	0xaa4
-	.4byte	0x74
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x45
-	.4byte	.LVL126
-	.4byte	0xbd20
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1476
-	.byte	0x2
-	.2byte	0xa8a
-	.4byte	0x74
-	.4byte	.LFB255
-	.4byte	.LFE255-.LFB255
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xbdec
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0xa8a
-	.4byte	0x3a
-	.4byte	.LLST66
-	.uleb128 0x5c
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0xa8a
-	.4byte	0x74
-	.4byte	.LLST67
-	.uleb128 0x5c
-	.4byte	.LASF1475
-	.byte	0x2
-	.2byte	0xa8a
-	.4byte	0x3a
-	.4byte	.LLST68
-	.uleb128 0x56
-	.4byte	.LASF273
-	.byte	0x2
-	.2byte	0xa8c
-	.4byte	0x15bc
-	.uleb128 0x6b
-	.4byte	.Ldebug_ranges0+0xb0
-	.4byte	0xbd8e
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0xa96
-	.4byte	0x74
-	.4byte	.LLST71
-	.byte	0
-	.uleb128 0x72
-	.4byte	0xaa29
-	.4byte	.LBB188
-	.4byte	.Ldebug_ranges0+0x98
-	.byte	0x2
-	.2byte	0xa8d
-	.4byte	0xbdc0
-	.uleb128 0x4f
-	.4byte	0xaa39
-	.4byte	.LLST69
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x98
-	.uleb128 0x74
-	.4byte	0xaa44
-	.uleb128 0x73
-	.4byte	0xaa4f
-	.4byte	.LLST70
-	.byte	0
-	.byte	0
-	.uleb128 0x82
-	.4byte	0xa8c4
-	.4byte	.LBB194
-	.4byte	.LBE194-.LBB194
-	.byte	0x2
-	.2byte	0xa9e
-	.uleb128 0x4f
-	.4byte	0xa8d5
-	.4byte	.LLST72
-	.uleb128 0x45
-	.4byte	.LVL117
-	.4byte	0x1046f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x50
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x67
-	.4byte	.LASF1477
-	.byte	0x2
-	.2byte	0xa6c
-	.4byte	0x74
-	.4byte	.LFB254
-	.4byte	.LFE254-.LFB254
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xbed1
-	.uleb128 0x5c
-	.4byte	.LASF1454
-	.byte	0x2
-	.2byte	0xa6c
-	.4byte	0x676
-	.4byte	.LLST56
-	.uleb128 0x5c
-	.4byte	.LASF1355
-	.byte	0x2
-	.2byte	0xa6c
-	.4byte	0x74
-	.4byte	.LLST57
-	.uleb128 0x5c
-	.4byte	.LASF1478
-	.byte	0x2
-	.2byte	0xa6c
-	.4byte	0x13e
-	.4byte	.LLST58
-	.uleb128 0x5c
-	.4byte	.LASF1479
-	.byte	0x2
-	.2byte	0xa6c
-	.4byte	0x13e
-	.4byte	.LLST59
-	.uleb128 0x5c
-	.4byte	.LASF1135
-	.byte	0x2
-	.2byte	0xa6c
-	.4byte	0x3a
-	.4byte	.LLST60
-	.uleb128 0x5e
-	.4byte	.LASF1480
-	.byte	0x2
-	.2byte	0xa6e
-	.4byte	0x57
-	.4byte	.LLST61
-	.uleb128 0x5e
-	.4byte	.LASF1481
-	.byte	0x2
-	.2byte	0xa6e
-	.4byte	0x57
-	.4byte	.LLST62
-	.uleb128 0x5e
-	.4byte	.LASF1482
-	.byte	0x2
-	.2byte	0xa6e
-	.4byte	0x57
-	.4byte	.LLST63
-	.uleb128 0x38
-	.4byte	.LASF1483
-	.byte	0x2
-	.2byte	0xa6f
-	.4byte	0x57
-	.uleb128 0x1
-	.byte	0x54
-	.uleb128 0x38
-	.4byte	.LASF1455
-	.byte	0x2
-	.2byte	0xa70
-	.4byte	0x74
-	.uleb128 0x1
-	.byte	0x5a
-	.uleb128 0x5e
-	.4byte	.LASF923
-	.byte	0x2
-	.2byte	0xa71
-	.4byte	0x74
-	.4byte	.LLST64
-	.uleb128 0x5e
-	.4byte	.LASF1484
-	.byte	0x2
-	.2byte	0xa72
-	.4byte	0x74
-	.4byte	.LLST65
-	.uleb128 0x38
-	.4byte	.LASF1314
-	.byte	0x2
-	.2byte	0xa73
-	.4byte	0x57
-	.uleb128 0x1
-	.byte	0x5b
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1485
-	.byte	0x2
-	.2byte	0xa5f
-	.4byte	0x74
-	.4byte	.LFB253
-	.4byte	.LFE253-.LFB253
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xbf65
-	.uleb128 0x89
-	.4byte	0xa801
-	.4byte	.LBB227
-	.4byte	.LBE227-.LBB227
-	.byte	0x2
-	.2byte	0xa68
-	.4byte	0xbf26
-	.uleb128 0x4f
-	.4byte	0xa81a
-	.4byte	.LLST133
-	.uleb128 0x4f
-	.4byte	0xa80e
-	.4byte	.LLST133
-	.uleb128 0x7a
-	.4byte	.LBB228
-	.4byte	.LBE228-.LBB228
-	.uleb128 0x73
-	.4byte	0xa827
-	.4byte	.LLST135
-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL290
-	.4byte	0xa835
-	.4byte	0xbf39
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL291
-	.4byte	0xc6a1
-	.uleb128 0x44
-	.4byte	.LVL292
-	.4byte	0xd8d7
-	.4byte	0xbf55
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL293
-	.4byte	0xa968
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x67
-	.4byte	.LASF1486
-	.byte	0x2
-	.2byte	0x890
-	.4byte	0x74
-	.4byte	.LFB252
-	.4byte	.LFE252-.LFB252
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xc328
-	.uleb128 0x5c
-	.4byte	.LASF286
-	.byte	0x2
-	.2byte	0x890
-	.4byte	0x13e
-	.4byte	.LLST474
-	.uleb128 0x5e
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x892
-	.4byte	0x74
-	.4byte	.LLST475
-	.uleb128 0x5d
-	.ascii	"ret\000"
-	.byte	0x2
-	.2byte	0x893
-	.4byte	0x74
-	.4byte	.LLST476
-	.uleb128 0x6b
-	.4byte	.Ldebug_ranges0+0x438
-	.4byte	0xbff7
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x935
-	.4byte	0x74
-	.4byte	.LLST482
-	.uleb128 0x5d
-	.ascii	"j\000"
-	.byte	0x2
-	.2byte	0x935
-	.4byte	0x74
-	.4byte	.LLST483
-	.uleb128 0x5e
-	.4byte	.LASF80
-	.byte	0x2
-	.2byte	0x936
-	.4byte	0xc328
-	.4byte	.LLST484
-	.uleb128 0x48
-	.4byte	.LVL1606
-	.4byte	0xced6
-	.uleb128 0x48
-	.4byte	.LVL1607
-	.4byte	0xd2cb
-	.byte	0
-	.uleb128 0x6b
-	.4byte	.Ldebug_ranges0+0x450
-	.4byte	0xc011
-	.uleb128 0x5e
-	.4byte	.LASF1487
-	.byte	0x2
-	.2byte	0x9f6
-	.4byte	0xc32e
-	.4byte	.LLST485
-	.byte	0
-	.uleb128 0x72
-	.4byte	0xe3cf
-	.4byte	.LBB392
-	.4byte	.Ldebug_ranges0+0x3e8
-	.byte	0x2
-	.2byte	0x8a9
-	.4byte	0xc0fd
-	.uleb128 0x4f
-	.4byte	0xe3e9
-	.4byte	.LLST477
-	.uleb128 0x4f
-	.4byte	0xe3dd
-	.4byte	.LLST478
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x3e8
-	.uleb128 0x73
-	.4byte	0xe3f5
-	.4byte	.LLST479
-	.uleb128 0x74
-	.4byte	0xe401
-	.uleb128 0x72
-	.4byte	0xaa29
-	.4byte	.LBB394
-	.4byte	.Ldebug_ranges0+0x400
-	.byte	0x2
-	.2byte	0x11b
-	.4byte	0xc078
-	.uleb128 0x4f
-	.4byte	0xaa39
-	.4byte	.LLST480
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x400
-	.uleb128 0x74
-	.4byte	0xe76b
-	.uleb128 0x74
-	.4byte	0xe774
-	.byte	0
-	.byte	0
-	.uleb128 0x72
-	.4byte	0xa8c4
-	.4byte	.LBB400
-	.4byte	.Ldebug_ranges0+0x420
-	.byte	0x2
-	.2byte	0x11f
-	.4byte	0xc0a6
-	.uleb128 0x4f
-	.4byte	0xa8d5
-	.4byte	.LLST481
-	.uleb128 0x45
-	.4byte	.LVL1577
-	.4byte	0x1046f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xc8
-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1572
-	.4byte	0xe40e
-	.4byte	0xc0ba
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1575
-	.4byte	0xa925
-	.4byte	0xc0ce
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1578
-	.4byte	0xa8e2
-	.4byte	0xc0e2
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1579
-	.4byte	0x103ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC21
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 1
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1563
-	.4byte	0x5194
-	.4byte	0xc112
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x8000
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1564
-	.4byte	0x5194
-	.4byte	0xc127
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x8000
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1565
-	.4byte	0x5194
-	.4byte	0xc13c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x1000
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1566
-	.4byte	0x5194
-	.4byte	0xc151
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x8000
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1567
-	.4byte	0x5194
-	.4byte	0xc166
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x1000
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1569
-	.4byte	0xaa73
-	.4byte	0xc17b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1582
-	.4byte	0xa9ad
-	.4byte	0xc18f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1583
-	.4byte	0x530b
-	.4byte	0xc1b2
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR20
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x354
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1586
-	.4byte	0x52a5
-	.4byte	0xc1d8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR7
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR140+32
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x20
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1587
-	.4byte	0x52a5
-	.4byte	0xc1fe
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR197
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x20
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1588
-	.4byte	0xc334
-	.uleb128 0x48
-	.4byte	.LVL1589
-	.4byte	0xd8d7
-	.uleb128 0x48
-	.4byte	.LVL1590
-	.4byte	0xa968
-	.uleb128 0x48
-	.4byte	.LVL1591
-	.4byte	0xd49d
-	.uleb128 0x44
-	.4byte	.LVL1593
-	.4byte	0x103ff
-	.4byte	0xc239
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC22
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1594
-	.4byte	0xc334
-	.uleb128 0x48
-	.4byte	.LVL1595
-	.4byte	0xc54f
-	.uleb128 0x48
-	.4byte	.LVL1596
-	.4byte	0xced6
-	.uleb128 0x48
-	.4byte	.LVL1597
-	.4byte	0xd2cb
-	.uleb128 0x44
-	.4byte	.LVL1598
-	.4byte	0xd651
-	.4byte	0xc270
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1599
-	.4byte	0xd2cb
-	.uleb128 0x48
-	.4byte	.LVL1601
-	.4byte	0xd242
-	.uleb128 0x48
-	.4byte	.LVL1602
-	.4byte	0xc54f
-	.uleb128 0x44
-	.4byte	.LVL1608
-	.4byte	0xd8d7
-	.4byte	0xc29e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1609
-	.4byte	0xa968
-	.4byte	0xc2b1
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1610
-	.4byte	0xe19b
-	.4byte	0xc2c5
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1611
-	.4byte	0xd651
-	.4byte	0xc2d8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1612
-	.4byte	0xe175
-	.4byte	0xc2ec
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1613
-	.4byte	0xe3a1
-	.4byte	0xc300
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1614
-	.4byte	0xc415
-	.4byte	0xc317
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR138
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1617
-	.4byte	0xe3a1
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x45
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x144
-	.uleb128 0x5b
-	.4byte	.LASF1488
-	.byte	0x2
-	.2byte	0x860
-	.4byte	0x74
-	.4byte	.LFB251
-	.4byte	.LFE251-.LFB251
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xc3c9
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x862
-	.4byte	0x74
-	.4byte	.LLST308
-	.uleb128 0x5e
-	.4byte	.LASF1489
-	.byte	0x2
-	.2byte	0x863
-	.4byte	0xab0
-	.4byte	.LLST309
-	.uleb128 0x44
-	.4byte	.LVL905
-	.4byte	0xe5c8
-	.4byte	0xc38c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x72
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL909
-	.4byte	0x52a5
-	.4byte	0xc3a9
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR7
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x20
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL910
-	.4byte	0x52a5
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x20
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1490
-	.byte	0x2
-	.2byte	0x85a
-	.4byte	0x74
-	.4byte	.LFB250
-	.4byte	.LFE250-.LFB250
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xc415
-	.uleb128 0x5c
-	.4byte	.LASF1491
-	.byte	0x2
-	.2byte	0x85a
-	.4byte	0x8b6
-	.4byte	.LLST307
-	.uleb128 0x45
-	.4byte	.LVL902
-	.4byte	0x52a5
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR138
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x800
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1492
-	.byte	0x2
-	.2byte	0x82a
-	.4byte	0x74
-	.4byte	.LFB249
-	.4byte	.LFE249-.LFB249
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xc54f
-	.uleb128 0x5c
-	.4byte	.LASF1491
-	.byte	0x2
-	.2byte	0x82a
-	.4byte	0x8b6
-	.4byte	.LLST413
-	.uleb128 0x71
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x82c
-	.4byte	0x74
-	.uleb128 0x1
-	.byte	0x54
-	.uleb128 0x71
-	.ascii	"j\000"
-	.byte	0x2
-	.2byte	0x82c
-	.4byte	0x74
-	.uleb128 0x1
-	.byte	0x56
-	.uleb128 0x38
-	.4byte	.LASF1493
-	.byte	0x2
-	.2byte	0x82f
-	.4byte	0x7dc
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x5e
-	.4byte	.LASF1249
-	.byte	0x2
-	.2byte	0x836
-	.4byte	0x74
-	.4byte	.LLST414
-	.uleb128 0x38
-	.4byte	.LASF1494
-	.byte	0x2
-	.2byte	0x837
-	.4byte	0x3a
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -52
-	.uleb128 0x44
-	.4byte	.LVL1272
-	.4byte	0xe19b
-	.4byte	0xc499
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1273
-	.4byte	0x530b
-	.4byte	0xc4b9
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x800
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1275
-	.4byte	0xe3a1
-	.4byte	0xc4cd
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1276
-	.4byte	0xe175
-	.4byte	0xc4e1
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1279
-	.4byte	0xe3a1
-	.4byte	0xc4f5
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1280
-	.4byte	0xdd4c
-	.4byte	0xc50d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1285
-	.4byte	0x103ff
-	.4byte	0xc52a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC15
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1286
-	.4byte	0x52a5
-	.4byte	0xc545
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x800
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1288
-	.4byte	0xd2cb
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1495
-	.byte	0x2
-	.2byte	0x7ff
-	.4byte	.LFB248
-	.4byte	.LFE248-.LFB248
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xc61a
-	.uleb128 0x5e
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x801
-	.4byte	0x74
-	.4byte	.LLST283
-	.uleb128 0x44
-	.4byte	.LVL796
-	.4byte	0x530b
-	.4byte	0xc597
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR26
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x38
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL797
-	.4byte	0x530b
-	.4byte	0xc5ba
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR17
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x20
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL798
-	.4byte	0x530b
-	.4byte	0xc5dd
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR23
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x80
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL801
-	.4byte	0xe5c8
-	.4byte	0xc5fd
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x72
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL807
-	.4byte	0xe5c8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x72
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1496
-	.byte	0x2
-	.2byte	0x7bf
-	.4byte	.LFB247
-	.4byte	.LFE247-.LFB247
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xc6a1
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x7bf
-	.4byte	0x3a
-	.4byte	.LLST415
-	.uleb128 0x5c
-	.4byte	.LASF1497
-	.byte	0x2
-	.2byte	0x7bf
-	.4byte	0x74
-	.4byte	.LLST416
-	.uleb128 0x5c
-	.4byte	.LASF1498
-	.byte	0x2
-	.2byte	0x7bf
-	.4byte	0x57
-	.4byte	.LLST417
-	.uleb128 0x5e
-	.4byte	.LASF923
-	.byte	0x2
-	.2byte	0x7c1
-	.4byte	0x3a
-	.4byte	.LLST418
-	.uleb128 0x44
-	.4byte	.LVL1294
-	.4byte	0x530b
-	.4byte	0xc68b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x8000
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1296
-	.4byte	0xda49
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.byte	0
-	.uleb128 0x6e
-	.4byte	.LASF1499
-	.byte	0x2
-	.2byte	0x7b1
-	.byte	0x1
-	.4byte	0xc6c7
-	.uleb128 0x56
-	.4byte	.LASF22
-	.byte	0x2
-	.2byte	0x7b3
-	.4byte	0x3a
-	.uleb128 0x56
-	.4byte	.LASF923
-	.byte	0x2
-	.2byte	0x7b4
-	.4byte	0x3a
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1500
-	.byte	0x2
-	.2byte	0x788
-	.4byte	0x74
-	.4byte	.LFB245
-	.4byte	.LFE245-.LFB245
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xc7c8
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x788
-	.4byte	0x3a
-	.4byte	.LLST397
-	.uleb128 0x5c
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0x788
-	.4byte	0x74
-	.4byte	.LLST398
-	.uleb128 0x5c
-	.4byte	.LASF17
-	.byte	0x2
-	.2byte	0x788
-	.4byte	0x8b6
-	.4byte	.LLST399
-	.uleb128 0x5c
-	.4byte	.LASF18
-	.byte	0x2
-	.2byte	0x788
-	.4byte	0x8b6
-	.4byte	.LLST400
-	.uleb128 0x5e
-	.4byte	.LASF15
-	.byte	0x2
-	.2byte	0x78a
-	.4byte	0x74
-	.4byte	.LLST401
-	.uleb128 0x5e
-	.4byte	.LASF1501
-	.byte	0x2
-	.2byte	0x78b
-	.4byte	0x74
-	.4byte	.LLST402
-	.uleb128 0x71
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x78c
-	.4byte	0x74
-	.uleb128 0x1
-	.byte	0x58
-	.uleb128 0x5e
-	.4byte	.LASF79
-	.byte	0x2
-	.2byte	0x78d
-	.4byte	0x3a
-	.4byte	.LLST403
-	.uleb128 0x5e
-	.4byte	.LASF77
-	.byte	0x2
-	.2byte	0x78e
-	.4byte	0x3a
-	.4byte	.LLST404
-	.uleb128 0x44
-	.4byte	.LVL1208
-	.4byte	0xa835
-	.4byte	0xc781
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1216
-	.4byte	0xc7c8
-	.4byte	0xc7a4
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR20+4
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1217
-	.4byte	0xdd4c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -36
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1502
-	.byte	0x2
-	.2byte	0x76c
-	.4byte	.LFB244
-	.4byte	.LFE244-.LFB244
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xc8cb
-	.uleb128 0x5c
-	.4byte	.LASF22
-	.byte	0x2
-	.2byte	0x76c
-	.4byte	0x3a
-	.4byte	.LLST86
-	.uleb128 0x5c
-	.4byte	.LASF76
-	.byte	0x2
-	.2byte	0x76c
-	.4byte	0x3a
-	.4byte	.LLST87
-	.uleb128 0x5c
-	.4byte	.LASF78
-	.byte	0x2
-	.2byte	0x76c
-	.4byte	0x8b6
-	.4byte	.LLST88
-	.uleb128 0x5c
-	.4byte	.LASF864
-	.byte	0x2
-	.2byte	0x76c
-	.4byte	0x3a
-	.4byte	.LLST89
-	.uleb128 0x56
-	.4byte	.LASF273
-	.byte	0x2
-	.2byte	0x76e
-	.4byte	0x15bc
-	.uleb128 0x5d
-	.ascii	"reg\000"
-	.byte	0x2
-	.2byte	0x76f
-	.4byte	0x3a
-	.4byte	.LLST90
-	.uleb128 0x5e
-	.4byte	.LASF80
-	.byte	0x2
-	.2byte	0x770
-	.4byte	0xc328
-	.4byte	.LLST91
-	.uleb128 0x72
-	.4byte	0xaa29
-	.4byte	.LBB197
-	.4byte	.Ldebug_ranges0+0xd0
-	.byte	0x2
-	.2byte	0x77b
-	.4byte	0xc878
-	.uleb128 0x4f
-	.4byte	0xaa39
-	.4byte	.LLST92
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0xd0
-	.uleb128 0x74
-	.4byte	0xe76b
-	.uleb128 0x74
-	.4byte	0xe774
-	.byte	0
-	.byte	0
-	.uleb128 0x72
-	.4byte	0xa8c4
-	.4byte	.LBB201
-	.4byte	.Ldebug_ranges0+0xe8
-	.byte	0x2
-	.2byte	0x780
-	.4byte	0xc8a6
-	.uleb128 0x4f
-	.4byte	0xa8d5
-	.4byte	.LLST93
-	.uleb128 0x45
-	.4byte	.LVL176
-	.4byte	0x1046f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xc8
-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL164
-	.4byte	0xa925
-	.4byte	0xc8ba
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL168
-	.4byte	0xa8e2
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1503
-	.byte	0x2
-	.2byte	0x73a
-	.4byte	0x74
-	.4byte	.LFB243
-	.4byte	.LFE243-.LFB243
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xca62
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x73a
-	.4byte	0x3a
-	.4byte	.LLST386
-	.uleb128 0x5c
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0x73a
-	.4byte	0x74
-	.4byte	.LLST387
-	.uleb128 0x5c
-	.4byte	.LASF17
-	.byte	0x2
-	.2byte	0x73a
-	.4byte	0x8b6
-	.4byte	.LLST388
-	.uleb128 0x5c
-	.4byte	.LASF18
-	.byte	0x2
-	.2byte	0x73a
-	.4byte	0x8b6
-	.4byte	.LLST389
-	.uleb128 0x5e
-	.4byte	.LASF15
-	.byte	0x2
-	.2byte	0x73c
-	.4byte	0x74
-	.4byte	.LLST390
-	.uleb128 0x5e
-	.4byte	.LASF1501
-	.byte	0x2
-	.2byte	0x73d
-	.4byte	0x74
-	.4byte	.LLST391
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x73e
-	.4byte	0x74
-	.4byte	.LLST392
-	.uleb128 0x56
-	.4byte	.LASF273
-	.byte	0x2
-	.2byte	0x73f
-	.4byte	0x15bc
-	.uleb128 0x5e
-	.4byte	.LASF1504
-	.byte	0x2
-	.2byte	0x740
-	.4byte	0x3a
-	.4byte	.LLST393
-	.uleb128 0x72
-	.4byte	0xaa29
-	.4byte	.LBB327
-	.4byte	.Ldebug_ranges0+0x2d0
-	.byte	0x2
-	.2byte	0x746
-	.4byte	0xc99d
-	.uleb128 0x4f
-	.4byte	0xaa39
-	.4byte	.LLST394
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x2d0
-	.uleb128 0x74
-	.4byte	0xe76b
-	.uleb128 0x74
-	.4byte	0xe774
-	.byte	0
-	.byte	0
-	.uleb128 0x72
-	.4byte	0xa8c4
-	.4byte	.LBB331
-	.4byte	.Ldebug_ranges0+0x2e8
-	.byte	0x2
-	.2byte	0x75e
-	.4byte	0xc9cb
-	.uleb128 0x4f
-	.4byte	0xa8d5
-	.4byte	.LLST395
-	.uleb128 0x45
-	.4byte	.LVL1186
-	.4byte	0x1046f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xc8
-	.byte	0
-	.byte	0
-	.uleb128 0x72
-	.4byte	0xa8c4
-	.4byte	.LBB335
-	.4byte	.Ldebug_ranges0+0x300
-	.byte	0x2
-	.2byte	0x74a
-	.4byte	0xc9f9
-	.uleb128 0x4f
-	.4byte	0xa8d5
-	.4byte	.LLST396
-	.uleb128 0x45
-	.4byte	.LVL1195
-	.4byte	0x1046f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xc8
-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1180
-	.4byte	0xa835
-	.4byte	0xca0d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1189
-	.4byte	0x103ff
-	.4byte	0xca3e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC14
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -48
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1196
-	.4byte	0xdd4c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -48
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1505
-	.byte	0x2
-	.2byte	0x71b
-	.4byte	0x74
-	.4byte	.LFB242
-	.4byte	.LFE242-.LFB242
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xcb8c
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x71b
-	.4byte	0x3a
-	.4byte	.LLST379
-	.uleb128 0x5c
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0x71b
-	.4byte	0x74
-	.4byte	.LLST380
-	.uleb128 0x5c
-	.4byte	.LASF17
-	.byte	0x2
-	.2byte	0x71b
-	.4byte	0x8b6
-	.4byte	.LLST381
-	.uleb128 0x5c
-	.4byte	.LASF18
-	.byte	0x2
-	.2byte	0x71b
-	.4byte	0x8b6
-	.4byte	.LLST382
-	.uleb128 0x5e
-	.4byte	.LASF15
-	.byte	0x2
-	.2byte	0x71d
-	.4byte	0x74
-	.4byte	.LLST383
-	.uleb128 0x5e
-	.4byte	.LASF1501
-	.byte	0x2
-	.2byte	0x71e
-	.4byte	0x74
-	.4byte	.LLST384
-	.uleb128 0x71
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x71f
-	.4byte	0x74
-	.uleb128 0x1
-	.byte	0x56
-	.uleb128 0x56
-	.4byte	.LASF273
-	.byte	0x2
-	.2byte	0x720
-	.4byte	0x15bc
-	.uleb128 0x72
-	.4byte	0xaa29
-	.4byte	.LBB323
-	.4byte	.Ldebug_ranges0+0x2b8
-	.byte	0x2
-	.2byte	0x723
-	.4byte	0xcb22
-	.uleb128 0x4f
-	.4byte	0xaa39
-	.4byte	.LLST385
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x2b8
-	.uleb128 0x74
-	.4byte	0xe76b
-	.uleb128 0x74
-	.4byte	0xe774
-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1161
-	.4byte	0xa835
-	.4byte	0xcb36
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1164
-	.4byte	0xcb8c
-	.4byte	0xcb4f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1167
-	.4byte	0xcb8c
-	.4byte	0xcb69
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1168
-	.4byte	0xdd4c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1506
-	.byte	0x2
-	.2byte	0x70e
-	.4byte	.LFB241
-	.4byte	.LFE241-.LFB241
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xcbff
-	.uleb128 0x5c
-	.4byte	.LASF273
-	.byte	0x2
-	.2byte	0x70e
-	.4byte	0x15bc
-	.4byte	.LLST52
-	.uleb128 0x5c
-	.4byte	.LASF864
-	.byte	0x2
-	.2byte	0x70e
-	.4byte	0x3a
-	.4byte	.LLST53
-	.uleb128 0x5d
-	.ascii	"reg\000"
-	.byte	0x2
-	.2byte	0x710
-	.4byte	0x74
-	.4byte	.LLST54
-	.uleb128 0x8a
-	.4byte	0xa8c4
-	.4byte	.LBB184
-	.4byte	.Ldebug_ranges0+0x80
-	.byte	0x2
-	.2byte	0x717
-	.uleb128 0x4f
-	.4byte	0xa8d5
-	.4byte	.LLST55
-	.uleb128 0x45
-	.4byte	.LVL89
-	.4byte	0x1046f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x12c
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1507
-	.byte	0x2
-	.2byte	0x6cc
-	.4byte	0x74
-	.4byte	.LFB240
-	.4byte	.LFE240-.LFB240
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xcddf
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x6cc
-	.4byte	0x3a
-	.4byte	.LLST370
-	.uleb128 0x5c
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0x6cc
-	.4byte	0x74
-	.4byte	.LLST371
-	.uleb128 0x5c
-	.4byte	.LASF17
-	.byte	0x2
-	.2byte	0x6cc
-	.4byte	0x8b6
-	.4byte	.LLST372
-	.uleb128 0x5c
-	.4byte	.LASF18
-	.byte	0x2
-	.2byte	0x6cc
-	.4byte	0x8b6
-	.4byte	.LLST373
-	.uleb128 0x5e
-	.4byte	.LASF15
-	.byte	0x2
-	.2byte	0x6ce
-	.4byte	0x74
-	.4byte	.LLST374
-	.uleb128 0x5e
-	.4byte	.LASF1501
-	.byte	0x2
-	.2byte	0x6cf
-	.4byte	0x74
-	.4byte	.LLST375
-	.uleb128 0x5e
-	.4byte	.LASF1508
-	.byte	0x2
-	.2byte	0x6d0
-	.4byte	0x74
-	.4byte	.LLST376
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x6d1
-	.4byte	0x74
-	.4byte	.LLST377
-	.uleb128 0x56
-	.4byte	.LASF273
-	.byte	0x2
-	.2byte	0x6d2
-	.4byte	0x15bc
-	.uleb128 0x72
-	.4byte	0xaa29
-	.4byte	.LBB315
-	.4byte	.Ldebug_ranges0+0x290
-	.byte	0x2
-	.2byte	0x6d5
-	.4byte	0xccd1
-	.uleb128 0x4f
-	.4byte	0xaa39
-	.4byte	.LLST378
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x290
-	.uleb128 0x74
-	.4byte	0xe76b
-	.uleb128 0x74
-	.4byte	0xe774
-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1128
-	.4byte	0xa835
-	.4byte	0xcce5
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1132
-	.4byte	0xa9ad
-	.4byte	0xccf9
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1139
-	.4byte	0xce51
-	.4byte	0xcd12
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1141
-	.4byte	0xa835
-	.4byte	0xcd26
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1142
-	.4byte	0xa9ad
-	.4byte	0xcd3a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1145
-	.4byte	0xce51
-	.4byte	0xcd54
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1146
-	.4byte	0xa9ad
-	.4byte	0xcd68
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1147
-	.4byte	0xdd4c
-	.4byte	0xcd90
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -36
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -44
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1150
-	.4byte	0xa9ad
-	.4byte	0xcda4
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1155
-	.4byte	0xcddf
-	.uleb128 0x44
-	.4byte	.LVL1156
-	.4byte	0xdd4c
-	.4byte	0xcdd5
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -36
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -44
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1159
-	.4byte	0xcddf
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1509
-	.byte	0x2
-	.2byte	0x6ba
-	.4byte	.LFB239
-	.4byte	.LFE239-.LFB239
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xce51
-	.uleb128 0x5c
-	.4byte	.LASF273
-	.byte	0x2
-	.2byte	0x6ba
-	.4byte	0x15bc
-	.4byte	.LLST48
-	.uleb128 0x5c
-	.4byte	.LASF864
-	.byte	0x2
-	.2byte	0x6ba
-	.4byte	0x3a
-	.4byte	.LLST49
-	.uleb128 0x5d
-	.ascii	"reg\000"
-	.byte	0x2
-	.2byte	0x6bc
-	.4byte	0x74
-	.4byte	.LLST50
-	.uleb128 0x8a
-	.4byte	0xa8c4
-	.4byte	.LBB180
-	.4byte	.Ldebug_ranges0+0x68
-	.byte	0x2
-	.2byte	0x6c1
-	.uleb128 0x4f
-	.4byte	0xa8d5
-	.4byte	.LLST51
-	.uleb128 0x45
-	.4byte	.LVL81
-	.4byte	0x1046f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xc8
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1510
-	.byte	0x2
-	.2byte	0x6a9
-	.4byte	.LFB238
-	.4byte	.LFE238-.LFB238
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xced6
-	.uleb128 0x5c
-	.4byte	.LASF273
-	.byte	0x2
-	.2byte	0x6a9
-	.4byte	0x15bc
-	.4byte	.LLST113
-	.uleb128 0x5c
-	.4byte	.LASF864
-	.byte	0x2
-	.2byte	0x6a9
-	.4byte	0x3a
-	.4byte	.LLST114
-	.uleb128 0x5d
-	.ascii	"reg\000"
-	.byte	0x2
-	.2byte	0x6ab
-	.4byte	0x74
-	.4byte	.LLST115
-	.uleb128 0x89
-	.4byte	0xa8c4
-	.4byte	.LBB221
-	.4byte	.LBE221-.LBB221
-	.byte	0x2
-	.2byte	0x6af
-	.4byte	0xcec6
-	.uleb128 0x4f
-	.4byte	0xa8d5
-	.4byte	.LLST116
-	.uleb128 0x45
-	.4byte	.LVL229
-	.4byte	0x1046f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xc8
-	.byte	0
-	.byte	0
-	.uleb128 0x4d
-	.4byte	.LVL232
-	.4byte	0xa835
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.byte	0
-	.uleb128 0x6e
-	.4byte	.LASF1511
-	.byte	0x2
-	.2byte	0x689
-	.byte	0x1
-	.4byte	0xcef0
-	.uleb128 0x55
-	.4byte	.LASF923
-	.byte	0x2
-	.2byte	0x689
-	.4byte	0x8f
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1512
-	.byte	0x2
-	.2byte	0x551
-	.4byte	.LFB236
-	.4byte	.LFE236-.LFB236
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xd1ee
-	.uleb128 0x5c
-	.4byte	.LASF923
-	.byte	0x2
-	.2byte	0x551
-	.4byte	0x8f
-	.4byte	.LLST452
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x553
-	.4byte	0x84
-	.4byte	.LLST453
-	.uleb128 0x5d
-	.ascii	"j\000"
-	.byte	0x2
-	.2byte	0x553
-	.4byte	0x84
-	.4byte	.LLST454
-	.uleb128 0x5d
-	.ascii	"reg\000"
-	.byte	0x2
-	.2byte	0x554
-	.4byte	0x3a
-	.4byte	.LLST455
-	.uleb128 0x5e
-	.4byte	.LASF22
-	.byte	0x2
-	.2byte	0x555
-	.4byte	0x3a
-	.4byte	.LLST456
-	.uleb128 0x5e
-	.4byte	.LASF1455
-	.byte	0x2
-	.2byte	0x556
-	.4byte	0x3a
-	.4byte	.LLST457
-	.uleb128 0x5e
-	.4byte	.LASF76
-	.byte	0x2
-	.2byte	0x557
-	.4byte	0x3a
-	.4byte	.LLST458
-	.uleb128 0x5e
-	.4byte	.LASF77
-	.byte	0x2
-	.2byte	0x558
-	.4byte	0x3a
-	.4byte	.LLST459
-	.uleb128 0x38
-	.4byte	.LASF78
-	.byte	0x2
-	.2byte	0x559
-	.4byte	0x8b6
-	.uleb128 0x6
-	.byte	0x3
-	.4byte	gReadRetryInfo+4
-	.byte	0x9f
-	.uleb128 0x56
-	.4byte	.LASF273
-	.byte	0x2
-	.2byte	0x55a
-	.4byte	0x15bc
-	.uleb128 0x5e
-	.4byte	.LASF1513
-	.byte	0x2
-	.2byte	0x55b
-	.4byte	0x8b6
-	.4byte	.LLST460
-	.uleb128 0x5e
-	.4byte	.LASF1514
-	.byte	0x2
-	.2byte	0x55c
-	.4byte	0x13e
-	.4byte	.LLST461
-	.uleb128 0x5e
-	.4byte	.LASF1515
-	.byte	0x2
-	.2byte	0x55d
-	.4byte	0x8f
-	.4byte	.LLST462
-	.uleb128 0x6f
-	.4byte	.LBB353
-	.4byte	.LBE353-.LBB353
-	.4byte	0xd045
-	.uleb128 0x5e
-	.4byte	.LASF80
-	.byte	0x2
-	.2byte	0x594
-	.4byte	0xc328
-	.4byte	.LLST463
-	.uleb128 0x72
-	.4byte	0xaa29
-	.4byte	.LBB354
-	.4byte	.Ldebug_ranges0+0x330
-	.byte	0x2
-	.2byte	0x597
-	.4byte	0xd019
-	.uleb128 0x8b
-	.4byte	0xaa39
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x330
-	.uleb128 0x74
-	.4byte	0xe76b
-	.uleb128 0x74
-	.4byte	0xe774
-	.byte	0
-	.byte	0
-	.uleb128 0x8a
-	.4byte	0xa8c4
-	.4byte	.LBB361
-	.4byte	.Ldebug_ranges0+0x358
-	.byte	0x2
-	.2byte	0x59c
-	.uleb128 0x4f
-	.4byte	0xa8d5
-	.4byte	.LLST464
-	.uleb128 0x45
-	.4byte	.LVL1459
-	.4byte	0x1046f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x50
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x7a
-	.4byte	.LBB366
-	.4byte	.LBE366-.LBB366
-	.uleb128 0x5e
-	.4byte	.LASF1516
-	.byte	0x2
-	.2byte	0x5af
-	.4byte	0x3a
-	.4byte	.LLST465
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x370
-	.uleb128 0x5e
-	.4byte	.LASF80
-	.byte	0x2
-	.2byte	0x5b2
-	.4byte	0xc328
-	.4byte	.LLST466
-	.uleb128 0x6f
-	.4byte	.LBB372
-	.4byte	.LBE372-.LBB372
-	.4byte	0xd08d
-	.uleb128 0x56
-	.4byte	.LASF864
-	.byte	0x2
-	.2byte	0x605
-	.4byte	0x8f
-	.byte	0
-	.uleb128 0x6b
-	.4byte	.Ldebug_ranges0+0x3a0
-	.4byte	0xd0dd
-	.uleb128 0x5e
-	.4byte	.LASF1517
-	.byte	0x2
-	.2byte	0x60b
-	.4byte	0x8f
-	.4byte	.LLST468
-	.uleb128 0x5d
-	.ascii	"mod\000"
-	.byte	0x2
-	.2byte	0x60c
-	.4byte	0x74
-	.4byte	.LLST469
-	.uleb128 0x5e
-	.4byte	.LASF243
-	.byte	0x2
-	.2byte	0x60d
-	.4byte	0x74
-	.4byte	.LLST470
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x3b8
-	.uleb128 0x5e
-	.4byte	.LASF1518
-	.byte	0x2
-	.2byte	0x610
-	.4byte	0x74
-	.4byte	.LLST471
-	.byte	0
-	.byte	0
-	.uleb128 0x72
-	.4byte	0xaa29
-	.4byte	.LBB368
-	.4byte	.Ldebug_ranges0+0x388
-	.byte	0x2
-	.2byte	0x5b6
-	.4byte	0xd10b
-	.uleb128 0x4f
-	.4byte	0xaa39
-	.4byte	.LLST467
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x388
-	.uleb128 0x74
-	.4byte	0xe76b
-	.uleb128 0x74
-	.4byte	0xe774
-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1474
-	.4byte	0xa835
-	.4byte	0xd11f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1480
-	.4byte	0xa835
-	.4byte	0xd133
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1491
-	.4byte	0x103ff
-	.4byte	0xd14f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC19
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1522
-	.4byte	0x4d68
-	.4byte	0xd172
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC20
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x400
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1523
-	.4byte	0x103ff
-	.4byte	0xd18e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC19
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1529
-	.4byte	0x103ff
-	.4byte	0xd1aa
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC19
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1541
-	.4byte	0xa835
-	.4byte	0xd1be
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1542
-	.4byte	0xe2e2
-	.4byte	0xd1db
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x91
-	.sleb128 -84
-	.byte	0x94
-	.byte	0x1
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1543
-	.4byte	0xa835
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x54
-	.4byte	.LASF1519
-	.byte	0x2
-	.2byte	0x41c
-	.4byte	0x84
-	.byte	0x1
-	.4byte	0xd239
-	.uleb128 0x55
-	.4byte	.LASF1322
-	.byte	0x2
-	.2byte	0x41c
-	.4byte	0x57
-	.uleb128 0x57
-	.ascii	"sts\000"
-	.byte	0x2
-	.2byte	0x41e
-	.4byte	0x84
-	.uleb128 0x56
-	.4byte	.LASF271
-	.byte	0x2
-	.2byte	0x41f
-	.4byte	0x73e
-	.uleb128 0x57
-	.ascii	"req\000"
-	.byte	0x2
-	.2byte	0x420
-	.4byte	0xc5
-	.uleb128 0x8c
-	.ascii	"out\000"
-	.byte	0x2
-	.2byte	0x431
-	.byte	0
-	.uleb128 0x60
-	.4byte	.LASF1520
-	.byte	0x2
-	.2byte	0x3d0
-	.byte	0x1
-	.uleb128 0x69
-	.4byte	.LASF1521
-	.byte	0x2
-	.2byte	0x3a1
-	.4byte	.LFB233
-	.4byte	.LFE233-.LFB233
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xd2b5
-	.uleb128 0x5c
-	.4byte	.LASF923
-	.byte	0x2
-	.2byte	0x3a1
-	.4byte	0x74
-	.4byte	.LLST279
-	.uleb128 0x5c
-	.4byte	.LASF1522
-	.byte	0x2
-	.2byte	0x3a1
-	.4byte	0x74
-	.4byte	.LLST280
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x3a3
-	.4byte	0x57
-	.4byte	.LLST281
-	.uleb128 0x5d
-	.ascii	"j\000"
-	.byte	0x2
-	.2byte	0x3a3
-	.4byte	0x57
-	.4byte	.LLST282
-	.uleb128 0x45
-	.4byte	.LVL751
-	.4byte	0x530b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR117
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x400
-	.byte	0
-	.byte	0
-	.uleb128 0x7e
-	.4byte	.LASF1523
-	.byte	0x2
-	.2byte	0x39c
-	.4byte	0x74
-	.4byte	.LFB232
-	.4byte	.LFE232-.LFB232
-	.uleb128 0x1
-	.byte	0x9c
-	.uleb128 0x5b
-	.4byte	.LASF1524
-	.byte	0x2
-	.2byte	0x365
-	.4byte	0x74
-	.4byte	.LFB231
-	.4byte	.LFE231-.LFB231
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xd49d
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x367
-	.4byte	0x74
-	.4byte	.LLST411
-	.uleb128 0x5e
-	.4byte	.LASF1525
-	.byte	0x2
-	.2byte	0x368
-	.4byte	0x74
-	.4byte	.LLST412
-	.uleb128 0x44
-	.4byte	.LVL1244
-	.4byte	0xe3a1
-	.4byte	0xd317
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1245
-	.4byte	0x530b
-	.4byte	0xd331
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x800
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1246
-	.4byte	0x52a5
-	.4byte	0xd34e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR22
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x20
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1247
-	.4byte	0x52a5
-	.4byte	0xd36a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR26
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x38
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1248
-	.4byte	0x52a5
-	.4byte	0xd387
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR17
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x20
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1249
-	.4byte	0x52a5
-	.4byte	0xd3a4
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x20
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1250
-	.4byte	0x52a5
-	.4byte	0xd3c1
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR7
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x20
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1251
-	.4byte	0x52a5
-	.4byte	0xd3df
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR20
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x354
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1252
-	.4byte	0xd5f8
-	.4byte	0xd3fa
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 12
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x7f4
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1253
-	.4byte	0xe19b
-	.4byte	0xd40e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1255
-	.4byte	0xd968
-	.4byte	0xd426
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1256
-	.4byte	0xda49
-	.4byte	0xd43e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1257
-	.4byte	0xda49
-	.4byte	0xd456
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1258
-	.4byte	0xdd4c
-	.4byte	0xd46e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1259
-	.4byte	0xd5f8
-	.4byte	0xd48c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x7d
-	.sleb128 0
-	.byte	0x6
-	.byte	0x23
-	.uleb128 0xc
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x7f4
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1265
-	.4byte	0xe175
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x67
-	.4byte	.LASF1526
-	.byte	0x2
-	.2byte	0x329
-	.4byte	0x74
-	.4byte	.LFB230
-	.4byte	.LFE230-.LFB230
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xd5f8
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x32b
-	.4byte	0x74
-	.4byte	.LLST365
-	.uleb128 0x5d
-	.ascii	"j\000"
-	.byte	0x2
-	.2byte	0x32c
-	.4byte	0x74
-	.4byte	.LLST366
-	.uleb128 0x5e
-	.4byte	.LASF15
-	.byte	0x2
-	.2byte	0x32d
-	.4byte	0x74
-	.4byte	.LLST367
-	.uleb128 0x5e
-	.4byte	.LASF1527
-	.byte	0x2
-	.2byte	0x32e
-	.4byte	0x74
-	.4byte	.LLST368
-	.uleb128 0x38
-	.4byte	.LASF1493
-	.byte	0x2
-	.2byte	0x331
-	.4byte	0x7dc
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x5e
-	.4byte	.LASF1528
-	.byte	0x2
-	.2byte	0x338
-	.4byte	0x74
-	.4byte	.LLST369
-	.uleb128 0x44
-	.4byte	.LVL1099
-	.4byte	0xe19b
-	.4byte	0xd526
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1102
-	.4byte	0xe3a1
-	.4byte	0xd53a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1103
-	.4byte	0xdd4c
-	.4byte	0xd558
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1106
-	.4byte	0xdd4c
-	.4byte	0xd577
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -48
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1111
-	.4byte	0xd5f8
-	.4byte	0xd592
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 12
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x7f4
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1112
-	.4byte	0x52a5
-	.4byte	0xd5b3
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x78
-	.sleb128 160
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x20
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1113
-	.4byte	0x52a5
-	.4byte	0xd5d0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR7
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x20
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1114
-	.4byte	0x52a5
-	.4byte	0xd5ee
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR20
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x354
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1125
-	.4byte	0xe175
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1529
-	.byte	0x2
-	.2byte	0x31f
-	.4byte	0x74
-	.4byte	.LFB229
-	.4byte	.LFE229-.LFB229
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xd651
-	.uleb128 0x6d
-	.ascii	"buf\000"
-	.byte	0x2
-	.2byte	0x31f
-	.4byte	0x8b6
-	.4byte	.LLST44
-	.uleb128 0x6d
-	.ascii	"len\000"
-	.byte	0x2
-	.2byte	0x31f
-	.4byte	0x74
-	.4byte	.LLST45
-	.uleb128 0x5e
-	.4byte	.LASF94
-	.byte	0x2
-	.2byte	0x321
-	.4byte	0x74
-	.4byte	.LLST46
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x322
-	.4byte	0x74
-	.4byte	.LLST47
-	.byte	0
-	.uleb128 0x54
-	.4byte	.LASF1530
-	.byte	0x2
-	.2byte	0x30c
-	.4byte	0x74
-	.byte	0x1
-	.4byte	0xd687
-	.uleb128 0x55
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x30c
-	.4byte	0x3a
-	.uleb128 0x55
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0x30c
-	.4byte	0x74
-	.uleb128 0x56
-	.4byte	.LASF15
-	.byte	0x2
-	.2byte	0x30e
-	.4byte	0x74
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1531
-	.byte	0x2
-	.2byte	0x2ac
-	.4byte	0x74
-	.4byte	.LFB227
-	.4byte	.LFE227-.LFB227
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xd8d7
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x2ac
-	.4byte	0x3a
-	.4byte	.LLST338
-	.uleb128 0x5c
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0x2ac
-	.4byte	0x74
-	.4byte	.LLST339
-	.uleb128 0x5c
-	.4byte	.LASF17
-	.byte	0x2
-	.2byte	0x2ac
-	.4byte	0x8b6
-	.4byte	.LLST340
-	.uleb128 0x5c
-	.4byte	.LASF18
-	.byte	0x2
-	.2byte	0x2ac
-	.4byte	0x8b6
-	.4byte	.LLST341
-	.uleb128 0x5c
-	.4byte	.LASF923
-	.byte	0x2
-	.2byte	0x2ac
-	.4byte	0x74
-	.4byte	.LLST342
-	.uleb128 0x5e
-	.4byte	.LASF15
-	.byte	0x2
-	.2byte	0x2ae
-	.4byte	0x74
-	.4byte	.LLST343
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x2af
-	.4byte	0x74
-	.4byte	.LLST344
-	.uleb128 0x5e
-	.4byte	.LASF1532
-	.byte	0x2
-	.2byte	0x2b0
-	.4byte	0x74
-	.4byte	.LLST345
-	.uleb128 0x5e
-	.4byte	.LASF1533
-	.byte	0x2
-	.2byte	0x2b1
-	.4byte	0x74
-	.4byte	.LLST346
-	.uleb128 0x5e
-	.4byte	.LASF1534
-	.byte	0x2
-	.2byte	0x2b2
-	.4byte	0x74
-	.4byte	.LLST347
-	.uleb128 0x5e
-	.4byte	.LASF1535
-	.byte	0x2
-	.2byte	0x2b3
-	.4byte	0x74
-	.4byte	.LLST348
-	.uleb128 0x5e
-	.4byte	.LASF1536
-	.byte	0x2
-	.2byte	0x2b4
-	.4byte	0x74
-	.4byte	.LLST349
-	.uleb128 0x5e
-	.4byte	.LASF1537
-	.byte	0x2
-	.2byte	0x2b5
-	.4byte	0x74
-	.4byte	.LLST350
-	.uleb128 0x5e
-	.4byte	.LASF1538
-	.byte	0x2
-	.2byte	0x2b6
-	.4byte	0x74
-	.4byte	.LLST351
-	.uleb128 0x5e
-	.4byte	.LASF1468
-	.byte	0x2
-	.2byte	0x2b7
-	.4byte	0x74
-	.4byte	.LLST352
-	.uleb128 0x44
-	.4byte	.LVL1021
-	.4byte	0xd8d7
-	.4byte	0xd7a2
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1022
-	.4byte	0xa968
-	.4byte	0xd7b5
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1023
-	.4byte	0xe40e
-	.4byte	0xd7cb
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -48
-	.byte	0x94
-	.byte	0x1
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1024
-	.4byte	0xdd4c
-	.4byte	0xd7f5
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -48
-	.byte	0x94
-	.byte	0x1
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -44
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -52
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1027
-	.4byte	0xd8d7
-	.uleb128 0x48
-	.4byte	.LVL1028
-	.4byte	0xa968
-	.uleb128 0x44
-	.4byte	.LVL1031
-	.4byte	0x103ff
-	.4byte	0xd82b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC10
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -44
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1035
-	.4byte	0xaa04
-	.4byte	0xd83f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1036
-	.4byte	0xdd4c
-	.4byte	0xd869
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -48
-	.byte	0x94
-	.byte	0x1
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -44
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -52
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1044
-	.4byte	0x103ff
-	.4byte	0xd886
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC11
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1045
-	.4byte	0xaa04
-	.4byte	0xd89a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1046
-	.4byte	0x103ff
-	.4byte	0xd8bf
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC12
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -48
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -44
-	.byte	0x6
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1047
-	.4byte	0xaa04
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x91
-	.sleb128 -36
-	.byte	0x6
-	.byte	0x9
-	.byte	0xf4
-	.byte	0x24
-	.byte	0x9
-	.byte	0xfc
-	.byte	0x25
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1539
-	.byte	0x2
-	.2byte	0x25d
-	.4byte	0x74
-	.4byte	.LFB226
-	.4byte	.LFE226-.LFB226
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xd968
-	.uleb128 0x5c
-	.4byte	.LASF923
-	.byte	0x2
-	.2byte	0x25d
-	.4byte	0x74
-	.4byte	.LLST110
-	.uleb128 0x5e
-	.4byte	.LASF22
-	.byte	0x2
-	.2byte	0x25f
-	.4byte	0x3a
-	.4byte	.LLST111
-	.uleb128 0x56
-	.4byte	.LASF273
-	.byte	0x2
-	.2byte	0x260
-	.4byte	0x15bc
-	.uleb128 0x5e
-	.4byte	.LASF1540
-	.byte	0x2
-	.2byte	0x261
-	.4byte	0x3a
-	.4byte	.LLST112
-	.uleb128 0x72
-	.4byte	0xaa29
-	.4byte	.LBB217
-	.4byte	.Ldebug_ranges0+0x130
-	.byte	0x2
-	.2byte	0x264
-	.4byte	0xd958
-	.uleb128 0x8b
-	.4byte	0xaa39
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x130
-	.uleb128 0x74
-	.4byte	0xe76b
-	.uleb128 0x74
-	.4byte	0xe774
-	.byte	0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL224
-	.4byte	0xa835
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1541
-	.byte	0x2
-	.2byte	0x24c
-	.4byte	0x74
-	.4byte	.LFB225
-	.4byte	.LFE225-.LFB225
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xda49
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x24c
-	.4byte	0x3a
-	.4byte	.LLST106
-	.uleb128 0x5c
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0x24c
-	.4byte	0x74
-	.4byte	.LLST107
-	.uleb128 0x5c
-	.4byte	.LASF923
-	.byte	0x2
-	.2byte	0x24c
-	.4byte	0x74
-	.4byte	.LLST108
-	.uleb128 0x5e
-	.4byte	.LASF15
-	.byte	0x2
-	.2byte	0x250
-	.4byte	0x74
-	.4byte	.LLST109
-	.uleb128 0x44
-	.4byte	.LVL209
-	.4byte	0xa835
-	.4byte	0xd9d6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL210
-	.4byte	0xa925
-	.4byte	0xd9ea
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL211
-	.4byte	0xe067
-	.4byte	0xda0a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL212
-	.4byte	0xa835
-	.4byte	0xda1e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL213
-	.4byte	0xde59
-	.4byte	0xda38
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL216
-	.4byte	0xa8e2
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1542
-	.byte	0x2
-	.2byte	0x231
-	.4byte	0x74
-	.4byte	.LFB224
-	.4byte	.LFE224-.LFB224
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xdb8a
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x231
-	.4byte	0x3a
-	.4byte	.LLST405
-	.uleb128 0x5c
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0x231
-	.4byte	0x74
-	.4byte	.LLST406
-	.uleb128 0x5c
-	.4byte	.LASF17
-	.byte	0x2
-	.2byte	0x231
-	.4byte	0x8b6
-	.4byte	.LLST407
-	.uleb128 0x5c
-	.4byte	.LASF18
-	.byte	0x2
-	.2byte	0x231
-	.4byte	0x8b6
-	.4byte	.LLST408
-	.uleb128 0x5e
-	.4byte	.LASF15
-	.byte	0x2
-	.2byte	0x235
-	.4byte	0x74
-	.4byte	.LLST409
-	.uleb128 0x5e
-	.4byte	.LASF58
-	.byte	0x2
-	.2byte	0x236
-	.4byte	0x74
-	.4byte	.LLST410
-	.uleb128 0x44
-	.4byte	.LVL1230
-	.4byte	0xa835
-	.4byte	0xdad7
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1231
-	.4byte	0xa925
-	.4byte	0xdaeb
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1232
-	.4byte	0xe0ed
-	.4byte	0xdb05
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1233
-	.4byte	0xa045
-	.4byte	0xdb31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1234
-	.4byte	0xdf6d
-	.4byte	0xdb4b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1235
-	.4byte	0xa835
-	.4byte	0xdb5f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1236
-	.4byte	0xde59
-	.4byte	0xdb79
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1239
-	.4byte	0xa8e2
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1543
-	.byte	0x2
-	.2byte	0x205
-	.4byte	0x74
-	.4byte	.LFB223
-	.4byte	.LFE223-.LFB223
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xdd4c
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x205
-	.4byte	0x3a
-	.4byte	.LLST353
-	.uleb128 0x5c
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0x205
-	.4byte	0x74
-	.4byte	.LLST354
-	.uleb128 0x5c
-	.4byte	.LASF17
-	.byte	0x2
-	.2byte	0x205
-	.4byte	0x8b6
-	.4byte	.LLST355
-	.uleb128 0x5c
-	.4byte	.LASF18
-	.byte	0x2
-	.2byte	0x205
-	.4byte	0x8b6
-	.4byte	.LLST356
-	.uleb128 0x5e
-	.4byte	.LASF15
-	.byte	0x2
-	.2byte	0x207
-	.4byte	0x74
-	.4byte	.LLST357
-	.uleb128 0x6b
-	.4byte	.Ldebug_ranges0+0x278
-	.4byte	0xdc30
-	.uleb128 0x5e
-	.4byte	.LASF1463
-	.byte	0x2
-	.2byte	0x20b
-	.4byte	0x3a
-	.4byte	.LLST359
-	.uleb128 0x45
-	.4byte	.LVL1068
-	.4byte	0xdd4c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x6b
-	.4byte	.Ldebug_ranges0+0x260
-	.4byte	0xdc8c
-	.uleb128 0x5e
-	.4byte	.LASF1468
-	.byte	0x2
-	.2byte	0x212
-	.4byte	0x74
-	.4byte	.LLST358
-	.uleb128 0x44
-	.4byte	.LVL1062
-	.4byte	0xd687
-	.4byte	0xdc75
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1065
-	.4byte	0xaa04
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x8
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x9
-	.byte	0xf4
-	.byte	0x24
-	.byte	0x9
-	.byte	0xfc
-	.byte	0x25
-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1058
-	.4byte	0xdd4c
-	.4byte	0xdcb2
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.uleb128 0x88
-	.4byte	.LVL1070
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.4byte	0xdcd8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1073
-	.4byte	0x103ff
-	.4byte	0xdd01
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC13
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1074
-	.4byte	0xe19b
-	.4byte	0xdd15
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x88
-	.4byte	.LVL1076
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.4byte	0xdd3b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1079
-	.4byte	0xe175
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1544
-	.byte	0x2
-	.2byte	0x1ea
-	.4byte	0x74
-	.4byte	.LFB222
-	.4byte	.LFE222-.LFB222
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xde59
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x1ea
-	.4byte	0x3a
-	.4byte	.LLST332
-	.uleb128 0x5c
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0x1ea
-	.4byte	0x74
-	.4byte	.LLST333
-	.uleb128 0x5c
-	.4byte	.LASF17
-	.byte	0x2
-	.2byte	0x1ea
-	.4byte	0x8b6
-	.4byte	.LLST334
-	.uleb128 0x5c
-	.4byte	.LASF18
-	.byte	0x2
-	.2byte	0x1ea
-	.4byte	0x8b6
-	.4byte	.LLST335
-	.uleb128 0x5e
-	.4byte	.LASF1545
-	.byte	0x2
-	.2byte	0x1ed
-	.4byte	0x74
-	.4byte	.LLST336
-	.uleb128 0x5e
-	.4byte	.LASF58
-	.byte	0x2
-	.2byte	0x1ee
-	.4byte	0x74
-	.4byte	.LLST337
-	.uleb128 0x44
-	.4byte	.LVL1006
-	.4byte	0xa835
-	.4byte	0xddda
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1007
-	.4byte	0xa925
-	.4byte	0xddee
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1008
-	.4byte	0xe2e2
-	.4byte	0xde08
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1009
-	.4byte	0xa835
-	.4byte	0xde1c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1010
-	.4byte	0xa045
-	.4byte	0xde48
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1013
-	.4byte	0xa8e2
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1546
-	.byte	0x2
-	.2byte	0x1df
-	.4byte	0x74
-	.4byte	.LFB221
-	.4byte	.LFE221-.LFB221
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xdefd
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x1df
-	.4byte	0x3a
-	.4byte	.LLST39
-	.uleb128 0x5c
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0x1df
-	.4byte	0x74
-	.4byte	.LLST40
-	.uleb128 0x56
-	.4byte	.LASF273
-	.byte	0x2
-	.2byte	0x1e1
-	.4byte	0x15bc
-	.uleb128 0x72
-	.4byte	0xaa29
-	.4byte	.LBB172
-	.4byte	.Ldebug_ranges0+0x38
-	.byte	0x2
-	.2byte	0x1e3
-	.4byte	0xded1
-	.uleb128 0x4f
-	.4byte	0xaa39
-	.4byte	.LLST41
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x38
-	.uleb128 0x74
-	.4byte	0xaa44
-	.uleb128 0x73
-	.4byte	0xaa4f
-	.4byte	.LLST42
-	.byte	0
-	.byte	0
-	.uleb128 0x8a
-	.4byte	0xa8c4
-	.4byte	.LBB175
-	.4byte	.Ldebug_ranges0+0x50
-	.byte	0x2
-	.2byte	0x1e5
-	.uleb128 0x4f
-	.4byte	0xa8d5
-	.4byte	.LLST43
-	.uleb128 0x45
-	.4byte	.LVL69
-	.4byte	0x1046f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x50
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1547
-	.byte	0x2
-	.2byte	0x1d7
-	.4byte	.LFB220
-	.4byte	.LFE220-.LFB220
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xdf6d
-	.uleb128 0x70
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x1d7
-	.4byte	0x3a
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5c
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0x1d7
-	.4byte	0x74
-	.4byte	.LLST36
-	.uleb128 0x56
-	.4byte	.LASF273
-	.byte	0x2
-	.2byte	0x1d9
-	.4byte	0x15bc
-	.uleb128 0x8a
-	.4byte	0xaa29
-	.4byte	.LBB166
-	.4byte	.Ldebug_ranges0+0x18
-	.byte	0x2
-	.2byte	0x1db
-	.uleb128 0x4f
-	.4byte	0xaa39
-	.4byte	.LLST37
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x18
-	.uleb128 0x74
-	.4byte	0xaa44
-	.uleb128 0x73
-	.4byte	0xaa4f
-	.4byte	.LLST38
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1548
-	.byte	0x2
-	.2byte	0x1cf
-	.4byte	.LFB219
-	.4byte	.LFE219-.LFB219
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xdfdf
-	.uleb128 0x70
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x1cf
-	.4byte	0x3a
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x70
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0x1cf
-	.4byte	0x74
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x56
-	.4byte	.LASF273
-	.byte	0x2
-	.2byte	0x1d1
-	.4byte	0x15bc
-	.uleb128 0x82
-	.4byte	0xaa29
-	.4byte	.LBB164
-	.4byte	.LBE164-.LBB164
-	.byte	0x2
-	.2byte	0x1d3
-	.uleb128 0x4f
-	.4byte	0xaa39
-	.4byte	.LLST34
-	.uleb128 0x7a
-	.4byte	.LBB165
-	.4byte	.LBE165-.LBB165
-	.uleb128 0x74
-	.4byte	0xaa44
-	.uleb128 0x73
-	.4byte	0xaa4f
-	.4byte	.LLST35
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1549
-	.byte	0x2
-	.2byte	0x1c1
-	.4byte	.LFB218
-	.4byte	.LFE218-.LFB218
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xe067
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x1c1
-	.4byte	0x3a
-	.4byte	.LLST31
-	.uleb128 0x70
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0x1c1
-	.4byte	0x74
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x56
-	.4byte	.LASF273
-	.byte	0x2
-	.2byte	0x1c3
-	.4byte	0x15bc
-	.uleb128 0x89
-	.4byte	0xaa29
-	.4byte	.LBB162
-	.4byte	.LBE162-.LBB162
-	.byte	0x2
-	.2byte	0x1c5
-	.4byte	0xe056
-	.uleb128 0x4f
-	.4byte	0xaa39
-	.4byte	.LLST32
-	.uleb128 0x7a
-	.4byte	.LBB163
-	.4byte	.LBE163-.LBB163
-	.uleb128 0x74
-	.4byte	0xaa44
-	.uleb128 0x73
-	.4byte	0xaa4f
-	.4byte	.LLST33
-	.byte	0
-	.byte	0
-	.uleb128 0x4d
-	.4byte	.LVL56
-	.4byte	0xe4a7
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1550
-	.byte	0x2
-	.2byte	0x1ae
-	.4byte	.LFB217
-	.4byte	.LFE217-.LFB217
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xe0ed
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x1ae
-	.4byte	0x3a
-	.4byte	.LLST26
-	.uleb128 0x5c
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0x1ae
-	.4byte	0x74
-	.4byte	.LLST27
-	.uleb128 0x5c
-	.4byte	.LASF923
-	.byte	0x2
-	.2byte	0x1ae
-	.4byte	0x74
-	.4byte	.LLST28
-	.uleb128 0x56
-	.4byte	.LASF273
-	.byte	0x2
-	.2byte	0x1b0
-	.4byte	0x15bc
-	.uleb128 0x82
-	.4byte	0xaa29
-	.4byte	.LBB160
-	.4byte	.LBE160-.LBB160
-	.byte	0x2
-	.2byte	0x1b2
-	.uleb128 0x4f
-	.4byte	0xaa39
-	.4byte	.LLST29
-	.uleb128 0x7a
-	.4byte	.LBB161
-	.4byte	.LBE161-.LBB161
-	.uleb128 0x74
-	.4byte	0xaa44
-	.uleb128 0x73
-	.4byte	0xaa4f
-	.4byte	.LLST30
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1551
-	.byte	0x2
-	.2byte	0x1a0
-	.4byte	.LFB216
-	.4byte	.LFE216-.LFB216
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xe175
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x1a0
-	.4byte	0x3a
-	.4byte	.LLST23
-	.uleb128 0x70
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0x1a0
-	.4byte	0x74
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x56
-	.4byte	.LASF273
-	.byte	0x2
-	.2byte	0x1a2
-	.4byte	0x15bc
-	.uleb128 0x89
-	.4byte	0xaa29
-	.4byte	.LBB158
-	.4byte	.LBE158-.LBB158
-	.byte	0x2
-	.2byte	0x1a4
-	.4byte	0xe164
-	.uleb128 0x4f
-	.4byte	0xaa39
-	.4byte	.LLST24
-	.uleb128 0x7a
-	.4byte	.LBB159
-	.4byte	.LBE159-.LBB159
-	.uleb128 0x74
-	.4byte	0xaa44
-	.uleb128 0x73
-	.4byte	0xaa4f
-	.4byte	.LLST25
-	.byte	0
-	.byte	0
-	.uleb128 0x4d
-	.4byte	.LVL46
-	.4byte	0xe4a7
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x6e
-	.4byte	.LASF1552
-	.byte	0x2
-	.2byte	0x197
-	.byte	0x1
-	.4byte	0xe19b
-	.uleb128 0x55
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x197
-	.4byte	0x3a
-	.uleb128 0x56
-	.4byte	.LASF273
-	.byte	0x2
-	.2byte	0x199
-	.4byte	0x15bc
-	.byte	0
-	.uleb128 0x6e
-	.4byte	.LASF1553
-	.byte	0x2
-	.2byte	0x18e
-	.byte	0x1
-	.4byte	0xe1c1
-	.uleb128 0x55
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x18e
-	.4byte	0x3a
-	.uleb128 0x56
-	.4byte	.LASF273
-	.byte	0x2
-	.2byte	0x190
-	.4byte	0x15bc
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1554
-	.byte	0x2
-	.2byte	0x16b
-	.4byte	.LFB213
-	.4byte	.LFE213-.LFB213
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xe266
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x16b
-	.4byte	0x3a
-	.4byte	.LLST129
-	.uleb128 0x5c
-	.4byte	.LASF1555
-	.byte	0x2
-	.2byte	0x16b
-	.4byte	0x74
-	.4byte	.LLST130
-	.uleb128 0x5c
-	.4byte	.LASF1556
-	.byte	0x2
-	.2byte	0x16b
-	.4byte	0x74
-	.4byte	.LLST131
-	.uleb128 0x56
-	.4byte	.LASF273
-	.byte	0x2
-	.2byte	0x16d
-	.4byte	0x15bc
-	.uleb128 0x72
-	.4byte	0xaa29
-	.4byte	.LBB223
-	.4byte	.Ldebug_ranges0+0x148
-	.byte	0x2
-	.2byte	0x16e
-	.4byte	0xe241
-	.uleb128 0x4f
-	.4byte	0xaa39
-	.4byte	.LLST132
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x148
-	.uleb128 0x74
-	.4byte	0xe76b
-	.uleb128 0x74
-	.4byte	0xe774
-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL286
-	.4byte	0xa835
-	.4byte	0xe255
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x4d
-	.4byte	.LVL289
-	.4byte	0xe4a7
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1557
-	.byte	0x2
-	.2byte	0x14f
-	.4byte	.LFB212
-	.4byte	.LFE212-.LFB212
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xe2e2
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x14f
-	.4byte	0x3a
-	.4byte	.LLST14
-	.uleb128 0x70
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0x14f
-	.4byte	0x74
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x56
-	.4byte	.LASF273
-	.byte	0x2
-	.2byte	0x151
-	.4byte	0x15bc
-	.uleb128 0x72
-	.4byte	0xaa29
-	.4byte	.LBB138
-	.4byte	.Ldebug_ranges0+0
-	.byte	0x2
-	.2byte	0x153
-	.4byte	0xe2d8
-	.uleb128 0x4f
-	.4byte	0xaa39
-	.4byte	.LLST15
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0
-	.uleb128 0x74
-	.4byte	0xaa44
-	.uleb128 0x73
-	.4byte	0xaa4f
-	.4byte	.LLST16
-	.byte	0
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LVL32
-	.4byte	0xe4a7
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1558
-	.byte	0x2
-	.2byte	0x141
-	.4byte	.LFB211
-	.4byte	.LFE211-.LFB211
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xe36a
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x141
-	.4byte	0x3a
-	.4byte	.LLST11
-	.uleb128 0x70
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0x141
-	.4byte	0x74
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x56
-	.4byte	.LASF273
-	.byte	0x2
-	.2byte	0x143
-	.4byte	0x15bc
-	.uleb128 0x89
-	.4byte	0xaa29
-	.4byte	.LBB136
-	.4byte	.LBE136-.LBB136
-	.byte	0x2
-	.2byte	0x144
-	.4byte	0xe359
-	.uleb128 0x4f
-	.4byte	0xaa39
-	.4byte	.LLST12
-	.uleb128 0x7a
-	.4byte	.LBB137
-	.4byte	.LBE137-.LBB137
-	.uleb128 0x74
-	.4byte	0xaa44
-	.uleb128 0x73
-	.4byte	0xaa4f
-	.4byte	.LLST13
-	.byte	0
-	.byte	0
-	.uleb128 0x4d
-	.4byte	.LVL28
-	.4byte	0xe4a7
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1559
-	.byte	0x2
-	.2byte	0x133
-	.4byte	.LFB210
-	.4byte	.LFE210-.LFB210
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xe3a1
-	.uleb128 0x5c
-	.4byte	.LASF1560
-	.byte	0x2
-	.2byte	0x133
-	.4byte	0x74
-	.4byte	.LLST136
-	.uleb128 0x4d
-	.4byte	.LVL303
-	.4byte	0xa7dc
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1561
-	.byte	0x2
-	.2byte	0x12d
-	.4byte	.LFB209
-	.4byte	.LFE209-.LFB209
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xe3cf
-	.uleb128 0x70
-	.4byte	.LASF1424
-	.byte	0x2
-	.2byte	0x12d
-	.4byte	0x3a
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x49
-	.4byte	.LVL317
-	.4byte	0xa797
-	.byte	0
-	.uleb128 0x8d
-	.4byte	.LASF1563
-	.byte	0x2
-	.2byte	0x115
-	.byte	0x1
-	.4byte	0xe40e
-	.uleb128 0x55
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x115
-	.4byte	0x3a
-	.uleb128 0x66
-	.ascii	"buf\000"
-	.byte	0x2
-	.2byte	0x115
-	.4byte	0x8b6
-	.uleb128 0x57
-	.ascii	"ptr\000"
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-	.2byte	0x117
-	.4byte	0x8b6
-	.uleb128 0x56
-	.4byte	.LASF273
-	.byte	0x2
-	.2byte	0x118
-	.4byte	0x15bc
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1564
-	.byte	0x2
-	.2byte	0x10a
-	.4byte	.LFB207
-	.4byte	.LFE207-.LFB207
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xe4a7
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x10a
-	.4byte	0x3a
-	.4byte	.LLST104
-	.uleb128 0x56
-	.4byte	.LASF273
-	.byte	0x2
-	.2byte	0x10c
-	.4byte	0x15bc
-	.uleb128 0x72
-	.4byte	0xaa29
-	.4byte	.LBB213
-	.4byte	.Ldebug_ranges0+0x118
-	.byte	0x2
-	.2byte	0x10e
-	.4byte	0xe46e
-	.uleb128 0x4f
-	.4byte	0xaa39
-	.4byte	.LLST105
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x118
-	.uleb128 0x74
-	.4byte	0xe76b
-	.uleb128 0x74
-	.4byte	0xe774
-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL205
-	.4byte	0xa925
-	.4byte	0xe482
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL206
-	.4byte	0xa835
-	.4byte	0xe496
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x4d
-	.4byte	.LVL207
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-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1565
-	.byte	0x2
-	.2byte	0x100
-	.4byte	.LFB206
-	.4byte	.LFE206-.LFB206
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xe53d
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x100
-	.4byte	0x3a
-	.4byte	.LLST6
-	.uleb128 0x70
-	.4byte	.LASF1566
-	.byte	0x2
-	.2byte	0x100
-	.4byte	0x74
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5e
-	.4byte	.LASF1428
-	.byte	0x2
-	.2byte	0x102
-	.4byte	0x74
-	.4byte	.LLST7
-	.uleb128 0x89
-	.4byte	0xa801
-	.4byte	.LBB134
-	.4byte	.LBE134-.LBB134
-	.byte	0x2
-	.2byte	0x107
-	.4byte	0xe526
-	.uleb128 0x4f
-	.4byte	0xa81a
-	.4byte	.LLST8
-	.uleb128 0x4f
-	.4byte	0xa80e
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-	.uleb128 0x7a
-	.4byte	.LBB135
-	.4byte	.LBE135-.LBB135
-	.uleb128 0x73
-	.4byte	0xa827
-	.4byte	.LLST10
-	.byte	0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL20
-	.4byte	0xe592
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x4b
-	.4byte	.LASF1567
-	.byte	0x2
-	.byte	0xf6
-	.4byte	0x74
-	.4byte	.LFB205
-	.4byte	.LFE205-.LFB205
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xe592
-	.uleb128 0x40
-	.4byte	.LASF1392
-	.byte	0x2
-	.byte	0xf6
-	.4byte	0x3a
-	.4byte	.LLST4
-	.uleb128 0x52
-	.4byte	.LASF1566
-	.byte	0x2
-	.byte	0xf6
-	.4byte	0x74
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x61
-	.4byte	.LASF1428
-	.byte	0x2
-	.byte	0xf8
-	.4byte	0x74
-	.4byte	.LLST5
-	.uleb128 0x45
-	.4byte	.LVL15
-	.4byte	0xe592
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x4b
-	.4byte	.LASF1568
-	.byte	0x2
-	.byte	0xee
-	.4byte	0x74
-	.4byte	.LFB204
-	.4byte	.LFE204-.LFB204
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xe5c8
-	.uleb128 0x40
-	.4byte	.LASF1392
-	.byte	0x2
-	.byte	0xee
-	.4byte	0x3a
-	.4byte	.LLST3
-	.uleb128 0x52
-	.4byte	.LASF1566
-	.byte	0x2
-	.byte	0xee
-	.4byte	0x74
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0
-	.uleb128 0x4b
-	.4byte	.LASF1569
-	.byte	0x2
-	.byte	0xcc
-	.4byte	0x74
-	.4byte	.LFB203
-	.4byte	.LFE203-.LFB203
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xe618
-	.uleb128 0x40
-	.4byte	.LASF1100
-	.byte	0x2
-	.byte	0xcc
-	.4byte	0x8b6
-	.4byte	.LLST1
-	.uleb128 0x52
-	.4byte	.LASF1101
-	.byte	0x2
-	.byte	0xcc
-	.4byte	0x8b6
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x65
-	.ascii	"len\000"
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-	.byte	0xcc
-	.4byte	0x74
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x41
-	.ascii	"i\000"
-	.byte	0x2
-	.byte	0xce
-	.4byte	0x74
-	.4byte	.LLST2
-	.byte	0
-	.uleb128 0x8e
-	.4byte	0x7349
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-	.4byte	.LFE507-.LFB507
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xe643
-	.uleb128 0x4f
-	.4byte	0x7356
-	.4byte	.LLST0
-	.uleb128 0x8f
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-	.uleb128 0x6
-	.byte	0xfa
-	.4byte	0x7362
-	.byte	0x9f
-	.byte	0
-	.uleb128 0x8e
-	.4byte	0xe19b
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-	.4byte	.LFE214-.LFB214
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xe6ba
-	.uleb128 0x8f
-	.4byte	0xe1a8
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x74
-	.4byte	0xe1b4
-	.uleb128 0x7a
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-	.4byte	.LBE146-.LBB146
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-	.uleb128 0x7a
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-	.uleb128 0x82
-	.4byte	0xaa29
-	.4byte	.LBB148
-	.4byte	.LBE148-.LBB148
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-	.uleb128 0x4f
-	.4byte	0xaa39
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-	.uleb128 0x7a
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-	.uleb128 0x73
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-	.4byte	.LLST19
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x8e
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-	.4byte	.LFE215-.LFB215
-	.uleb128 0x1
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-	.uleb128 0x8f
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-	.uleb128 0x1
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-	.uleb128 0x74
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-	.uleb128 0x7a
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-	.4byte	.LBE154-.LBB154
-	.uleb128 0x4f
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-	.uleb128 0x7a
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-	.4byte	.LBE155-.LBB155
-	.uleb128 0x74
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-	.uleb128 0x82
-	.4byte	0xaa29
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-	.4byte	.LBE156-.LBB156
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-	.uleb128 0x4f
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-	.uleb128 0x7a
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-	.uleb128 0x73
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-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x8e
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-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x8e
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-	.uleb128 0x1
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-	.uleb128 0x4f
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-	.uleb128 0x8e
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-	.uleb128 0x74
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-	.uleb128 0x2
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-	.uleb128 0x4f
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-	.uleb128 0x1
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-	.uleb128 0x1
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-	.byte	0
-	.uleb128 0x8e
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-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x43
-	.uleb128 0x1
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-	.byte	0
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-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x43
-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x43
-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xef72
-	.uleb128 0x4f
-	.4byte	0xcee3
-	.4byte	.LLST472
-	.uleb128 0x6b
-	.4byte	.Ldebug_ranges0+0x3d0
-	.4byte	0xef60
-	.uleb128 0x4f
-	.4byte	0xcee3
-	.4byte	.LLST473
-	.uleb128 0x4d
-	.4byte	.LVL1551
-	.4byte	0x52a5
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR20+4
-	.byte	0
-	.byte	0
-	.uleb128 0x4d
-	.4byte	.LVL1548
-	.4byte	0xcef0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0
-	.byte	0
-	.uleb128 0x8e
-	.4byte	0xd1ee
-	.4byte	.LFB235
-	.4byte	.LFE235-.LFB235
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xf079
-	.uleb128 0x4f
-	.4byte	0xd1ff
-	.4byte	.LLST526
-	.uleb128 0x91
-	.4byte	0xd20b
-	.byte	0
-	.uleb128 0x74
-	.4byte	0xd217
-	.uleb128 0x74
-	.4byte	0xd223
-	.uleb128 0x7a
-	.4byte	.LBB422
-	.4byte	.LBE422-.LBB422
-	.uleb128 0x4f
-	.4byte	0xd1ff
-	.4byte	.LLST527
-	.uleb128 0x7a
-	.4byte	.LBB423
-	.4byte	.LBE423-.LBB423
-	.uleb128 0x74
-	.4byte	0xef8f
-	.uleb128 0x90
-	.4byte	0xef96
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -80
-	.uleb128 0x90
-	.4byte	0xef9b
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -116
-	.uleb128 0x94
-	.4byte	0xd22f
-	.4byte	.LDL1
-	.uleb128 0x44
-	.4byte	.LVL1808
-	.4byte	0x530b
-	.4byte	0xefff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -80
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xa5
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x20
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1809
-	.4byte	0x530b
-	.4byte	0xf018
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x5a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x38
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1810
-	.4byte	0xac82
-	.4byte	0xf037
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -116
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1811
-	.4byte	0xae0d
-	.4byte	0xf05b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -116
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1813
-	.4byte	0xac82
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -116
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x8e
-	.4byte	0x8c64
-	.4byte	.LFB320
-	.4byte	.LFE320-.LFB320
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xf1bd
-	.uleb128 0x74
-	.4byte	0x8c74
-	.uleb128 0x91
-	.4byte	0x8c7d
-	.byte	0
-	.uleb128 0x74
-	.4byte	0x8c88
-	.uleb128 0x91
-	.4byte	0x8c93
-	.byte	0
-	.uleb128 0x74
-	.4byte	0x8ca5
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x4c8
-	.uleb128 0x73
-	.4byte	0xf08d
-	.4byte	.LLST539
-	.uleb128 0x74
-	.4byte	0xf092
-	.uleb128 0x73
-	.4byte	0xf099
-	.4byte	.LLST540
-	.uleb128 0x74
-	.4byte	0xf09e
-	.uleb128 0x95
-	.4byte	0x8c9e
-	.uleb128 0x74
-	.4byte	0xf0a5
-	.uleb128 0x44
-	.4byte	.LVL1876
-	.4byte	0x530b
-	.4byte	0xf0ea
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1879
-	.4byte	0x530b
-	.4byte	0xf109
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x40
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1881
-	.4byte	0x103ff
-	.4byte	0xf120
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1882
-	.4byte	0xae0d
-	.4byte	0xf143
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1883
-	.4byte	0xac82
-	.4byte	0xf15b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1884
-	.4byte	0xae0d
-	.4byte	0xf17e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1886
-	.4byte	0x103ff
-	.4byte	0xf195
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC32
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1887
-	.4byte	0x103ff
-	.4byte	0xf1b2
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC33
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1891
-	.4byte	0x52a5
-	.byte	0
-	.byte	0
-	.uleb128 0x96
-	.4byte	0x5ef1
-	.4byte	.LFB386
-	.4byte	.LFE386-.LFB386
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xf51b
-	.uleb128 0x4f
-	.4byte	0x5f02
-	.4byte	.LLST541
-	.uleb128 0x74
-	.4byte	0x5f0c
-	.uleb128 0x74
-	.4byte	0x5f18
-	.uleb128 0x74
-	.4byte	0x5f24
-	.uleb128 0x74
-	.4byte	0x5f30
-	.uleb128 0x74
-	.4byte	0x5f3a
-	.uleb128 0x74
-	.4byte	0x5f46
-	.uleb128 0x91
-	.4byte	0x5f52
-	.byte	0
-	.uleb128 0x74
-	.4byte	0x5f66
-	.uleb128 0x7a
-	.4byte	.LBB434
-	.4byte	.LBE434-.LBB434
-	.uleb128 0x8b
-	.4byte	0x5f02
-	.uleb128 0x7a
-	.4byte	.LBB435
-	.4byte	.LBE435-.LBB435
-	.uleb128 0x73
-	.4byte	0xf1da
-	.4byte	.LLST542
-	.uleb128 0x74
-	.4byte	0xf1df
-	.uleb128 0x73
-	.4byte	0xf1e4
-	.4byte	.LLST543
-	.uleb128 0x73
-	.4byte	0xf1e9
-	.4byte	.LLST544
-	.uleb128 0x74
-	.4byte	0xf1ee
-	.uleb128 0x73
-	.4byte	0xf1f3
-	.4byte	.LLST545
-	.uleb128 0x74
-	.4byte	0xf1f8
-	.uleb128 0x95
-	.4byte	0x5f5e
-	.uleb128 0x74
-	.4byte	0xf1ff
-	.uleb128 0x72
-	.4byte	0x7349
-	.4byte	.LBB436
-	.4byte	.Ldebug_ranges0+0x4e0
-	.byte	0x1
-	.2byte	0xb6e
-	.4byte	0xf299
-	.uleb128 0x4f
-	.4byte	0x7362
-	.4byte	.LLST546
-	.uleb128 0x4f
-	.4byte	0x7356
-	.4byte	.LLST547
-	.uleb128 0x45
-	.4byte	.LVL1934
-	.4byte	0xe618
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x93
-	.4byte	0x7362
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1896
-	.4byte	0x103ff
-	.4byte	0xf2c0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR200
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xb2d
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1897
-	.4byte	0x103ff
-	.4byte	0xf2e0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1905
-	.4byte	0x82fb
-	.4byte	0xf2f7
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR87
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1907
-	.4byte	0x103ff
-	.4byte	0xf31e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR200
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xb41
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1908
-	.4byte	0x103ff
-	.4byte	0xf33e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1909
-	.4byte	0x64a2
-	.4byte	0xf352
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1910
-	.4byte	0x103ff
-	.4byte	0xf379
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR200
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xb4d
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1911
-	.4byte	0x103ff
-	.4byte	0xf399
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1914
-	.4byte	0x103ff
-	.4byte	0xf3c0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR200
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xb50
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1915
-	.4byte	0x103ff
-	.4byte	0xf3e0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1917
-	.4byte	0x103ff
-	.4byte	0xf407
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR200
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xb5c
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1918
-	.4byte	0x103ff
-	.4byte	0xf427
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1919
-	.4byte	0x103ff
-	.4byte	0xf44e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR200
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xb63
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1920
-	.4byte	0x103ff
-	.4byte	0xf46e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1921
-	.4byte	0x7349
-	.4byte	0xf487
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1925
-	.4byte	0xac82
-	.4byte	0xf49b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1926
-	.4byte	0xac82
-	.4byte	0xf4af
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1928
-	.4byte	0x602b
-	.4byte	0xf4c3
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1929
-	.4byte	0x8c64
-	.uleb128 0x48
-	.4byte	.LVL1938
-	.4byte	0x8dc2
-	.uleb128 0x44
-	.4byte	.LVL1942
-	.4byte	0x103ff
-	.4byte	0xf4fc
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR200
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xb9e
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1943
-	.4byte	0x103ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x8e
-	.4byte	0x545d
-	.4byte	.LFB406
-	.4byte	.LFE406-.LFB406
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xf5bb
-	.uleb128 0x4f
-	.4byte	0x546e
-	.4byte	.LLST548
-	.uleb128 0x74
-	.4byte	0x547a
-	.uleb128 0x74
-	.4byte	0x5486
-	.uleb128 0x74
-	.4byte	0x5490
-	.uleb128 0x74
-	.4byte	0x549a
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x4f8
-	.uleb128 0x8b
-	.4byte	0x546e
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x4f8
-	.uleb128 0x73
-	.4byte	0xf538
-	.4byte	.LLST549
-	.uleb128 0x73
-	.4byte	0xf53d
-	.4byte	.LLST550
-	.uleb128 0x73
-	.4byte	0xf542
-	.4byte	.LLST551
-	.uleb128 0x74
-	.4byte	0xf547
-	.uleb128 0x48
-	.4byte	.LVL1947
-	.4byte	0x54a7
-	.uleb128 0x44
-	.4byte	.LVL1949
-	.4byte	0x89c8
-	.4byte	0xf599
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1955
-	.4byte	0x8dc2
-	.4byte	0xf5af
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -36
-	.byte	0x94
-	.byte	0x2
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1956
-	.4byte	0x8c64
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x8e
-	.4byte	0x5c12
-	.4byte	.LFB389
-	.4byte	.LFE389-.LFB389
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xf6dc
-	.uleb128 0x4f
-	.4byte	0x5c23
-	.4byte	.LLST552
-	.uleb128 0x74
-	.4byte	0x5c2f
-	.uleb128 0x6f
-	.4byte	.LBB450
-	.4byte	.LBE450-.LBB450
-	.4byte	0xf6d2
-	.uleb128 0x4f
-	.4byte	0x5c23
-	.4byte	.LLST553
-	.uleb128 0x7a
-	.4byte	.LBB451
-	.4byte	.LBE451-.LBB451
-	.uleb128 0x74
-	.4byte	0xf5d8
-	.uleb128 0x44
-	.4byte	.LVL1966
-	.4byte	0x838c
-	.4byte	0xf61e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR82
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1967
-	.4byte	0x103ff
-	.4byte	0xf645
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR203
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xc0d
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1968
-	.4byte	0x103ff
-	.4byte	0xf665
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1969
-	.4byte	0x5f89
-	.4byte	0xf679
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1970
-	.4byte	0x545d
-	.4byte	0xf68d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1971
-	.4byte	0x103ff
-	.4byte	0xf6b4
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR203
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xc10
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1972
-	.4byte	0x103ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1976
-	.4byte	0x8231
-	.byte	0
-	.uleb128 0x8e
-	.4byte	0x65df
-	.4byte	.LFB373
-	.4byte	.LFE373-.LFB373
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xf738
-	.uleb128 0x4f
-	.4byte	0x65ec
-	.4byte	.LLST556
-	.uleb128 0x74
-	.4byte	0x65f8
-	.uleb128 0x7a
-	.4byte	.LBB454
-	.4byte	.LBE454-.LBB454
-	.uleb128 0x4f
-	.4byte	0x65ec
-	.4byte	.LLST557
-	.uleb128 0x7a
-	.4byte	.LBB455
-	.4byte	.LBE455-.LBB455
-	.uleb128 0x73
-	.4byte	0xf6f9
-	.4byte	.LLST558
-	.uleb128 0x94
-	.4byte	0x6604
-	.4byte	.LDL2
-	.uleb128 0x48
-	.4byte	.LVL1993
-	.4byte	0x5b4d
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x8e
-	.4byte	0x75f4
-	.4byte	.LFB360
-	.4byte	.LFE360-.LFB360
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xf8c8
-	.uleb128 0x97
-	.4byte	0x7605
-	.sleb128 -1
-	.uleb128 0x74
-	.4byte	0x7611
-	.uleb128 0x91
-	.4byte	0x761d
-	.byte	0
-	.uleb128 0x74
-	.4byte	0x7631
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x518
-	.uleb128 0x74
-	.4byte	0xf74c
-	.uleb128 0x73
-	.4byte	0xf753
-	.4byte	.LLST562
-	.uleb128 0x74
-	.4byte	0xf758
-	.uleb128 0x95
-	.4byte	0x7629
-	.uleb128 0x74
-	.4byte	0xf75f
-	.uleb128 0x6f
-	.4byte	.LBB461
-	.4byte	.LBE461-.LBB461
-	.4byte	0xf7a7
-	.uleb128 0x73
-	.4byte	0x763f
-	.4byte	.LLST563
-	.uleb128 0x48
-	.4byte	.LVL2024
-	.4byte	0x52a5
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2018
-	.4byte	0x530b
-	.4byte	0xf7bb
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2019
-	.4byte	0x52a5
-	.4byte	0xf7d8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR80
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x30
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2020
-	.4byte	0x52a5
-	.uleb128 0x48
-	.4byte	.LVL2021
-	.4byte	0x52a5
-	.uleb128 0x44
-	.4byte	.LVL2025
-	.4byte	0x7735
-	.4byte	0xf7fe
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2027
-	.4byte	0xae0d
-	.4byte	0xf821
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2029
-	.4byte	0x858a
-	.uleb128 0x44
-	.4byte	.LVL2030
-	.4byte	0xae0d
-	.4byte	0xf84d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2031
-	.4byte	0x103ff
-	.4byte	0xf874
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR207
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x4bd
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2032
-	.4byte	0x103ff
-	.4byte	0xf894
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2035
-	.4byte	0x103ff
-	.4byte	0xf8b1
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC35
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2038
-	.4byte	0x8737
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x8e
-	.4byte	0x7d61
-	.4byte	.LFB350
-	.4byte	.LFE350-.LFB350
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xfa5b
-	.uleb128 0x4f
-	.4byte	0x7d72
-	.4byte	.LLST592
-	.uleb128 0x4f
-	.4byte	0x7d7e
-	.4byte	.LLST593
-	.uleb128 0x4f
-	.4byte	0x7d8a
-	.4byte	.LLST594
-	.uleb128 0x74
-	.4byte	0x7d96
-	.uleb128 0x74
-	.4byte	0x7da2
-	.uleb128 0x91
-	.4byte	0x7dae
-	.byte	0
-	.uleb128 0x74
-	.4byte	0x7dc2
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x530
-	.uleb128 0x8b
-	.4byte	0x7d8a
-	.uleb128 0x8b
-	.4byte	0x7d7e
-	.uleb128 0x8b
-	.4byte	0x7d72
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x530
-	.uleb128 0x73
-	.4byte	0xf8f7
-	.4byte	.LLST595
-	.uleb128 0x73
-	.4byte	0xf8fc
-	.4byte	.LLST596
-	.uleb128 0x74
-	.4byte	0xf901
-	.uleb128 0x95
-	.4byte	0x7dba
-	.uleb128 0x74
-	.4byte	0xf908
-	.uleb128 0x44
-	.4byte	.LVL2163
-	.4byte	0x7dd0
-	.4byte	0xf95f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2164
-	.4byte	0x103ff
-	.4byte	0xf986
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR211
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x2fc
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2165
-	.4byte	0x103ff
-	.4byte	0xf9a6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2166
-	.4byte	0x103ff
-	.4byte	0xf9cd
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR211
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x2fd
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2167
-	.4byte	0x103ff
-	.4byte	0xf9ed
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2169
-	.4byte	0x530b
-	.4byte	0xfa05
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x40
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2172
-	.4byte	0xae0d
-	.4byte	0xfa28
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2174
-	.4byte	0x103ff
-	.4byte	0xfa3f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC38
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2175
-	.4byte	0x103ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC39
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x8e
-	.4byte	0x6367
-	.4byte	.LFB377
-	.4byte	.LFE377-.LFB377
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xfa8d
-	.uleb128 0x4d
-	.4byte	.LVL2263
-	.4byte	0x78f1
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR135
-	.byte	0
-	.byte	0
-	.uleb128 0x8e
-	.4byte	0x98a8
-	.4byte	.LFB303
-	.4byte	.LFE303-.LFB303
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xfad0
-	.uleb128 0x48
-	.4byte	.LVL2338
-	.4byte	0x93da
-	.uleb128 0x48
-	.4byte	.LVL2339
-	.4byte	0x7c46
-	.uleb128 0x44
-	.4byte	.LVL2340
-	.4byte	0x7759
-	.4byte	0xfac6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2341
-	.4byte	0x75f4
-	.byte	0
-	.uleb128 0x8e
-	.4byte	0x736f
-	.4byte	.LFB362
-	.4byte	.LFE362-.LFB362
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xfb28
-	.uleb128 0x44
-	.4byte	.LVL2368
-	.4byte	0x77b1
-	.4byte	0xfaf8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x40
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2369
-	.4byte	0x103ff
-	.4byte	0xfb18
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC43
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2370
-	.4byte	0x530b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.byte	0
-	.uleb128 0x8e
-	.4byte	0x5569
-	.4byte	.LFB401
-	.4byte	.LFE401-.LFB401
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xfbc8
-	.uleb128 0x91
-	.4byte	0x557a
-	.byte	0
-	.uleb128 0x74
-	.4byte	0x5584
-	.uleb128 0x6b
-	.4byte	.Ldebug_ranges0+0x5f0
-	.4byte	0xfbb1
-	.uleb128 0x74
-	.4byte	0xfb3c
-	.uleb128 0x73
-	.4byte	0xfb43
-	.4byte	.LLST723
-	.uleb128 0x44
-	.4byte	.LVL2793
-	.4byte	0x5ade
-	.4byte	0xfb79
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2794
-	.4byte	0x57df
-	.4byte	0xfb8c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2796
-	.4byte	0x8dc2
-	.uleb128 0x48
-	.4byte	.LVL2797
-	.4byte	0x8c64
-	.uleb128 0x48
-	.4byte	.LVL2798
-	.4byte	0x5798
-	.uleb128 0x48
-	.4byte	.LVL2800
-	.4byte	0x59e7
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2792
-	.4byte	0xae0d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x8e
-	.4byte	0x5616
-	.4byte	.LFB399
-	.4byte	.LFE399-.LFB399
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xfc17
-	.uleb128 0x44
-	.4byte	.LVL2801
-	.4byte	0x561f
-	.4byte	0xfbf0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2802
-	.4byte	0x7653
-	.4byte	0xfc07
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR124
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2803
-	.4byte	0x57df
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.byte	0
-	.uleb128 0x8e
-	.4byte	0x60a3
-	.4byte	.LFB381
-	.4byte	.LFE381-.LFB381
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xfd33
-	.uleb128 0x91
-	.4byte	0x60b4
-	.byte	0
-	.uleb128 0x6f
-	.4byte	.LBB524
-	.4byte	.LBE524-.LBB524
-	.4byte	0xfcc9
-	.uleb128 0x74
-	.4byte	0xfc2b
-	.uleb128 0x6b
-	.4byte	.Ldebug_ranges0+0x610
-	.4byte	0xfc57
-	.uleb128 0x73
-	.4byte	0x60bf
-	.4byte	.LLST724
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2823
-	.4byte	0x60cd
-	.4byte	0xfc6b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2824
-	.4byte	0x60cd
-	.4byte	0xfc7f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2826
-	.4byte	0x7653
-	.4byte	0xfc96
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR124
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2827
-	.4byte	0x7653
-	.4byte	0xfcad
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR215
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2828
-	.4byte	0x7c46
-	.uleb128 0x48
-	.4byte	.LVL2829
-	.4byte	0x75f4
-	.uleb128 0x48
-	.4byte	.LVL2830
-	.4byte	0x75f4
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2810
-	.4byte	0x87ee
-	.uleb128 0x48
-	.4byte	.LVL2811
-	.4byte	0x737c
-	.uleb128 0x48
-	.4byte	.LVL2812
-	.4byte	0x7111
-	.uleb128 0x48
-	.4byte	.LVL2813
-	.4byte	0x6e14
-	.uleb128 0x48
-	.4byte	.LVL2814
-	.4byte	0x6e95
-	.uleb128 0x48
-	.4byte	.LVL2815
-	.4byte	0x62f6
-	.uleb128 0x48
-	.4byte	.LVL2816
-	.4byte	0x736f
-	.uleb128 0x48
-	.4byte	.LVL2817
-	.4byte	0x86e8
-	.uleb128 0x48
-	.4byte	.LVL2818
-	.4byte	0x6370
-	.uleb128 0x48
-	.4byte	.LVL2819
-	.4byte	0x6558
-	.uleb128 0x45
-	.4byte	.LVL2820
-	.4byte	0x7735
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x8e
-	.4byte	0x5383
-	.4byte	.LFB407
-	.4byte	.LFE407-.LFB407
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x1004a
-	.uleb128 0x4f
-	.4byte	0x5394
-	.4byte	.LLST725
-	.uleb128 0x4f
-	.4byte	0x53a0
-	.4byte	.LLST726
-	.uleb128 0x91
-	.4byte	0x53ac
-	.byte	0x1
-	.uleb128 0x74
-	.4byte	0x53b8
-	.uleb128 0x74
-	.4byte	0x53c4
-	.uleb128 0x97
-	.4byte	0x53d0
-	.sleb128 -1
-	.uleb128 0x74
-	.4byte	0x53dc
-	.uleb128 0x74
-	.4byte	0x53e8
-	.uleb128 0x74
-	.4byte	0x53f4
-	.uleb128 0x74
-	.4byte	0x5400
-	.uleb128 0x74
-	.4byte	0x540c
-	.uleb128 0x74
-	.4byte	0x5418
-	.uleb128 0x74
-	.4byte	0x5434
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x628
-	.uleb128 0x4f
-	.4byte	0x53a0
-	.4byte	.LLST727
-	.uleb128 0x4f
-	.4byte	0x5394
-	.4byte	.LLST728
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x628
-	.uleb128 0x74
-	.4byte	0xfd59
-	.uleb128 0x73
-	.4byte	0xfd60
-	.4byte	.LLST729
-	.uleb128 0x90
-	.4byte	0xfd65
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x74
-	.4byte	0xfd6a
-	.uleb128 0x73
-	.4byte	0xfd71
-	.4byte	.LLST730
-	.uleb128 0x73
-	.4byte	0xfd76
-	.4byte	.LLST731
-	.uleb128 0x73
-	.4byte	0xfd7b
-	.4byte	.LLST732
-	.uleb128 0x73
-	.4byte	0xfd80
-	.4byte	.LLST733
-	.uleb128 0x73
-	.4byte	0xfd85
-	.4byte	.LLST734
-	.uleb128 0x73
-	.4byte	0xfd8a
-	.4byte	.LLST735
-	.uleb128 0x95
-	.4byte	0x5424
-	.uleb128 0x95
-	.4byte	0x542c
-	.uleb128 0x74
-	.4byte	0xfd8f
-	.uleb128 0x48
-	.4byte	.LVL2849
-	.4byte	0x5a5c
-	.uleb128 0x48
-	.4byte	.LVL2850
-	.4byte	0x731e
-	.uleb128 0x44
-	.4byte	.LVL2851
-	.4byte	0x64a2
-	.4byte	0xfe39
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2852
-	.4byte	0x82b0
-	.4byte	0xfe4d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2857
-	.4byte	0x5a5c
-	.4byte	0xfe61
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2858
-	.4byte	0x5b4d
-	.4byte	0xfe75
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x9
-	.byte	0xff
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2859
-	.4byte	0x731e
-	.4byte	0xfe89
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2860
-	.4byte	0x103ff
-	.4byte	0xfeb0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR238
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x343
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2861
-	.4byte	0x103ff
-	.4byte	0xfed0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2862
-	.4byte	0x103ff
-	.4byte	0xfef7
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR238
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x344
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2863
-	.4byte	0x103ff
-	.4byte	0xff17
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2864
-	.4byte	0x103ff
-	.4byte	0xff3e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR238
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x345
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2865
-	.4byte	0x103ff
-	.4byte	0xff5e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2866
-	.4byte	0x64a2
-	.4byte	0xff72
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
+	.global	FtlWrite
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlWrite, %function
+FtlWrite:
+	@ args = 0, pretend = 0, frame = 80
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r10, r3
+	ldr	r3, .L3019
+	sub	sp, sp, #80
+	mov	r6, r1
+	str	r2, [sp, #12]
+	ldr	r3, [r3]
+	cmp	r3, #0
+	bne	.L3004
+	cmp	r0, #16
+	bne	.L2973
+	mov	r2, r10
+	ldr	r1, [sp, #12]
+	add	r0, r6, #256
+	bl	FtlVendorPartWrite
+.L2971:
+	add	sp, sp, #80
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2973:
+	ldr	r3, [sp, #12]
+	adds	r5, r1, r3
+	ldr	r3, .L3019+4
+	ldr	r3, [r3]
+	cmp	r5, r3
+	bhi	.L3005
+	ldr	r3, .L3019+8
+	ldr	r0, [r3]
+	adds	r4, r0, #1
+	beq	.L2971
+	ldr	r3, .L3019+12
+	mov	r2, #2048
+	mov	r0, r6
+	str	r2, [r3]
+	ldr	r3, .L3019+16
+	ldrh	r4, [r3]
+	mov	r1, r4
+	bl	__aeabi_uidiv
+	mov	r1, r4
+	mov	r8, r0
+	subs	r0, r5, #1
+	bl	__aeabi_uidiv
+	ldr	r2, .L3019+20
+	sub	r5, r0, r8
+	adds	r3, r5, #1
+	adds	r1, r5, #1
+	str	r3, [sp, #4]
+	ldr	r3, [r2]
+	str	r0, [sp, #16]
+	add	r3, r3, r1
+	str	r3, [r2]
+	ldr	r3, .L3019+24
+	ldr	fp, [r3]
+	cmp	fp, #0
+	beq	.L2975
+	ldr	r3, [fp, #16]
+	cmp	r8, r3
+	beq	.L2976
+	bl	FtlCacheWriteBack
+.L2975:
+	ldr	r7, .L3019+28
+	mov	r4, r8
+.L2977:
+	ldr	r3, [sp, #4]
+	cbnz	r3, .L3003
+	ldr	r3, [sp, #16]
+	ldr	r0, [sp, #4]
+	sub	r1, r3, r8
+	bl	rk_ftl_garbage_collect
+.L3004:
+	movs	r0, #0
+	b	.L2971
+.L2976:
+	ldr	r2, .L3019+32
+	mov	r1, r4
+	mov	r0, r6
+	ldr	r3, [r2]
+	adds	r3, r3, #1
+	str	r3, [r2]
+	bl	__aeabi_uidivmod
+	ldr	r2, [sp, #12]
+	subs	r4, r4, r1
+	ldr	r0, [fp, #8]
+	mov	r3, r1
+	mov	r1, r10
+	cmp	r4, r2
+	it	cs
+	movcs	r4, r2
+	lsls	r7, r4, #9
+	add	r0, r0, r3, lsl #9
+	mov	r2, r7
+	bl	ftl_memcpy
+	cmp	r5, #0
+	beq	.L3004
+	ldr	r3, [sp, #12]
+	add	r6, r6, r4
+	add	r10, r10, r7
+	add	r8, r8, #1
+	subs	r3, r3, r4
+	str	r3, [sp, #12]
+	bl	FtlCacheWriteBack
+	str	r5, [sp, #4]
+	b	.L2975
+.L3003:
+	ldr	r5, .L3019+36
+	ldrb	r2, [r7, #6]	@ zero_extendqisi2
+	ldrh	r3, [r5]
+	cmp	r2, r3
+	bcc	.L2978
+	ldr	r1, .L3019+40
+	movw	r2, #1668
+	ldr	r0, .L3019+44
+	bl	printf
+	ldr	r1, .L3019+48
+	ldr	r0, .L3019+52
+	bl	printf
+.L2978:
+	ldrh	r3, [r7, #4]
+	cbnz	r3, .L2979
+	bl	FtlCacheWriteBack
+	mov	r0, r7
+	bl	allocate_new_data_superblock
+.L2979:
+	ldrb	r3, [r7, #7]	@ zero_extendqisi2
+	ldrh	r2, [r7, #4]
+	lsls	r3, r3, #2
+	cmp	r3, r2
+	it	cs
+	movcs	r3, r2
+	ldr	r2, [sp, #4]
+	cmp	r3, r2
+	it	cs
+	movcs	r3, r2
+	ldrb	r2, [r7, #6]	@ zero_extendqisi2
+	str	r3, [sp, #36]
+	ldrh	r3, [r5]
+	cmp	r2, r3
+	bcc	.L2980
+	ldr	r1, .L3019+40
+	movw	r2, #1701
+	ldr	r0, .L3019+44
+	bl	printf
+	ldr	r1, .L3019+48
+	ldr	r0, .L3019+52
+	bl	printf
+.L2980:
+	movs	r3, #0
+.L3018:
+	str	r3, [sp, #8]
+	ldr	r3, [sp, #8]
+	ldr	r2, [sp, #36]
+	cmp	r3, r2
+	bne	.L3001
+.L2982:
+	ldr	r0, .L3019+56
+	mov	r3, r7
+	movs	r2, #0
+	ldr	r1, [sp, #8]
+	ldr	r0, [r0]
+	bl	FtlProgPages
+	ldr	r3, [sp, #4]
+	ldr	r2, [sp, #8]
+	cmp	r3, r2
+	bcs	.L3002
+	ldr	r1, .L3019+40
+	movw	r2, #1790
+	ldr	r0, .L3019+44
+	bl	printf
+	ldr	r1, .L3019+48
+	ldr	r0, .L3019+52
+	bl	printf
+.L3002:
+	ldr	r3, [sp, #4]
+	ldr	r2, [sp, #8]
+	subs	r3, r3, r2
+	str	r3, [sp, #4]
+	b	.L2977
+.L3001:
+	ldrh	r3, [r7, #4]
+	cmp	r3, #0
+	beq	.L2982
+	movs	r2, #0
+	add	r1, sp, #40
+	mov	r0, r4
+	movs	r5, #36
+	bl	log2phys
+	mov	r0, r7
+	bl	get_new_active_ppa
+	ldr	r3, [sp, #8]
+	ldr	r2, .L3019+60
+	muls	r5, r3, r5
+	ldr	r3, .L3019+56
+	ldrh	r2, [r2]
+	ldr	r1, [r3]
+	str	r3, [sp, #20]
+	ldr	r3, [sp, #8]
+	add	r1, r1, r5
+	str	r0, [r1, #4]
+	str	r4, [r1, #16]
+	mul	r0, r2, r3
+	bic	r3, r0, #3
+	ldr	r0, .L3019+64
+	str	r3, [sp, #28]
+	ldr	r3, [r0]
+	ldr	r0, [sp, #28]
+	str	r3, [sp, #32]
+	add	fp, r3, r0
+	str	fp, [r1, #12]
+	mov	r0, fp
+	movs	r1, #0
+	bl	ftl_memset
+	cmp	r4, r8
+	ldr	r1, .L3019+16
+	beq	.L2983
+	ldr	r3, [sp, #16]
+	cmp	r3, r4
+	ldr	r3, [sp, #20]
+	bne	.L3014
+	ldr	r3, [sp, #12]
+	adds	r2, r6, r3
+	ldrh	r3, [r1]
+	ldrh	r1, [sp, #16]
+	smulbb	r3, r3, r1
+	subs	r2, r2, r3
+	uxth	r3, r2
+	str	r3, [sp, #20]
+	movs	r3, #0
+	str	r3, [sp, #24]
+	b	.L2986
+.L2983:
+	ldrh	r2, [r1]
+	mov	r0, r6
+	mov	r1, r2
+	str	r2, [sp, #20]
+	bl	__aeabi_uidivmod
+	ldr	r2, [sp, #20]
+	str	r1, [sp, #24]
+	subs	r2, r2, r1
+	ldr	r1, [sp, #12]
+	mov	r3, r2
+	cmp	r2, r1
+	it	cs
+	movcs	r3, r1
+	str	r3, [sp, #20]
+.L2986:
+	ldr	r3, .L3019+16
+	ldr	r2, [sp, #20]
+	ldrh	r3, [r3]
+	cmp	r3, r2
+	ldr	r3, .L3019+56
+	ldr	r3, [r3]
+	bne	.L2987
+	cmp	r4, r8
+	add	r5, r5, r3
+	itett	ne
+	ldrne	r2, [sp, #20]
+	streq	r10, [r5, #8]
+	mulne	r2, r2, r4
+	subne	r2, r2, r6
+	itt	ne
+	addne	r2, r10, r2, lsl #9
+	strne	r2, [r5, #8]
+.L2989:
+	ldr	r3, .L3019+36
+	ldrb	r2, [r7, #6]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L2998
+	ldr	r1, .L3019+40
+	movw	r2, #1775
+	ldr	r0, .L3019+44
+	bl	printf
+	ldr	r1, .L3019+48
+	ldr	r0, .L3019+52
+	bl	printf
+.L2998:
+	ldr	r2, [sp, #32]
+	movw	r3, #61589
+	ldr	r1, [sp, #28]
+	strh	r3, [r2, r1]	@ movhi
+	ldr	r2, .L3019+68
+	str	r4, [fp, #8]
+	adds	r4, r4, #1
+	ldr	r3, [r2]
+	str	r3, [fp, #4]
+	adds	r3, r3, #1
+	adds	r1, r3, #1
+	it	eq
+	moveq	r3, #0
+	str	r3, [r2]
+	ldr	r3, [sp, #40]
+	str	r3, [fp, #12]
+	ldrh	r3, [r7]
+	strh	r3, [fp, #2]	@ movhi
+	ldr	r3, [sp, #8]
+	adds	r3, r3, #1
+	b	.L3018
+.L3020:
+	.align	2
+.L3019:
+	.word	.LANCHOR77
+	.word	.LANCHOR69
+	.word	.LANCHOR231
+	.word	.LANCHOR246
+	.word	.LANCHOR56
+	.word	.LANCHOR162
+	.word	.LANCHOR132
+	.word	.LANCHOR92
+	.word	.LANCHOR164
+	.word	.LANCHOR38
+	.word	.LANCHOR247
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LANCHOR182
+	.word	.LANCHOR59
+	.word	.LANCHOR189
+	.word	.LANCHOR160
+.L2987:
+	cmp	r4, r8
+	add	r3, r3, r5
+	ite	eq
+	ldreq	r2, .L3021
+	ldrne	r2, .L3021+4
+	ldr	r2, [r2]
+	str	r2, [r3, #8]
+	ldr	r2, [sp, #40]
+	ldr	r3, .L3021+8
+	adds	r0, r2, #1
+	beq	.L2992
+	ldr	r3, [r3]
+	movs	r1, #1
+	str	r2, [sp, #48]
+	add	r0, sp, #44
+	str	r4, [sp, #60]
+	add	r3, r3, r5
+	ldr	r2, [r3, #8]
+	ldr	r3, [r3, #12]
+	str	r2, [sp, #52]
+	movs	r2, #0
+	str	r3, [sp, #56]
+	bl	FlashReadPages
+	ldr	r3, [sp, #44]
+	adds	r3, r3, #1
+	bne	.L2993
+	ldr	r2, .L3021+12
+	ldr	r3, [r2, #72]
+	adds	r3, r3, #1
+	str	r3, [r2, #72]
+.L2996:
+	ldr	r2, [sp, #20]
+	cmp	r4, r8
+	ldr	r3, .L3021+8
+	lsl	r2, r2, #9
+	bne	.L2997
+	ldr	r3, [r3]
+	mov	r1, r10
+	add	r5, r5, r3
+	ldr	r3, [sp, #24]
+	ldr	r0, [r5, #8]
+	add	r0, r0, r3, lsl #9
+.L3016:
+	bl	ftl_memcpy
+	b	.L2989
+.L2993:
+	ldr	r1, [fp, #8]
+	cmp	r4, r1
+	beq	.L2995
+	ldr	r2, .L3021+12
+	ldr	r0, .L3021+16
+	ldr	r3, [r2, #72]
+	adds	r3, r3, #1
+	str	r3, [r2, #72]
+	mov	r2, r4
+	bl	printf
+.L2995:
+	ldr	r3, [fp, #8]
+	cmp	r4, r3
+	beq	.L2996
+	movw	r2, #1754
+	ldr	r1, .L3021+20
+	ldr	r0, .L3021+24
+	bl	printf
+	ldr	r1, .L3021+28
+	ldr	r0, .L3021+32
+	bl	printf
+	b	.L2996
+.L2992:
+	ldr	r3, [r3]
+	movs	r1, #0
+	ldr	r2, .L3021+36
+	add	r3, r3, r5
+	ldrh	r2, [r2]
+	ldr	r0, [r3, #8]
+	bl	ftl_memset
+	b	.L2996
+.L2997:
+	ldr	r1, .L3021+40
+	ldr	r3, [r3]
+	ldrh	r1, [r1]
+	add	r5, r5, r3
+	ldr	r0, [r5, #8]
+	muls	r1, r4, r1
+	subs	r1, r1, r6
+	add	r1, r10, r1, lsl #9
+	b	.L3016
+.L3014:
+	ldr	r3, [r3]
+	add	r5, r5, r3
+	ldrh	r3, [r1]
+	muls	r3, r4, r3
+	subs	r3, r3, r6
+	add	r3, r10, r3, lsl #9
+	str	r3, [r5, #8]
+	b	.L2989
+.L3005:
+	mov	r0, #-1
+	b	.L2971
+.L3022:
+	.align	2
+.L3021:
+	.word	.LANCHOR186
+	.word	.LANCHOR187
+	.word	.LANCHOR182
+	.word	.LANCHOR138
+	.word	.LC73
+	.word	.LANCHOR247
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LANCHOR58
+	.word	.LANCHOR56
+	.size	FtlWrite, .-FtlWrite
+	.section	.text.StorageSysDataStore,"ax",%progbits
+	.align	1
+	.global	StorageSysDataStore
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	StorageSysDataStore, %function
+StorageSysDataStore:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r3, r1
+	movs	r2, #1
+	add	r1, r0, #256
+	movs	r0, #16
+	b	FtlWrite
+	.size	StorageSysDataStore, .-StorageSysDataStore
+	.section	.text.FlashBootVendorWrite,"ax",%progbits
+	.align	1
+	.global	FlashBootVendorWrite
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashBootVendorWrite, %function
+FlashBootVendorWrite:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r3, r2
+	mov	r1, r0
+	movs	r2, #1
+	movs	r0, #16
+	b	FtlWrite
+	.size	FlashBootVendorWrite, .-FlashBootVendorWrite
+	.section	.text.ftl_write,"ax",%progbits
+	.align	1
+	.global	ftl_write
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_write, %function
+ftl_write:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r7, r1
+	mov	r4, r2
+	mov	r5, r3
+	mov	r6, r0
+	cbnz	r0, .L3026
+	mov	r3, r2
+	mov	r2, r5
+	bl	idb_write_data
+.L3026:
+	mov	r3, r5
+	mov	r2, r4
+	mov	r1, r7
+	mov	r0, r6
+	pop	{r4, r5, r6, r7, r8, lr}
+	b	FtlWrite
+	.size	ftl_write, .-ftl_write
+	.section	.text.FtlCheckVpc,"ax",%progbits
+	.align	1
+	.global	FtlCheckVpc
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlCheckVpc, %function
+FtlCheckVpc:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #0
+	ldr	r6, .L3051
+	ldr	r5, .L3051+4
+	ldr	r1, .L3051+8
+	ldr	r0, .L3051+12
+	bl	printf
+	mov	r2, #8192
+	movs	r1, #0
+	ldr	r0, .L3051+4
+	bl	memset
+.L3028:
+	ldr	r3, [r6]
+	cmp	r4, r3
+	bcc	.L3030
+	ldr	r7, .L3051+16
+	movs	r4, #0
+	ldr	r5, .L3051+20
+	movs	r2, #2
+	ldr	r10, .L3051+4
+	mov	r6, r4
+	ldr	fp, .L3051+60
+	mov	r8, r7
+	ldrh	r3, [r7]
+	ldr	r1, [r5]
+	ldr	r0, .L3051+24
+	bl	rknand_print_hex
+	ldrh	r3, [r7]
+	movs	r2, #2
+	ldr	r1, .L3051+4
+	ldr	r0, .L3051+28
+	bl	rknand_print_hex
+.L3031:
+	ldrh	r2, [r8]
+	uxth	r3, r4
+	cmp	r2, r3
+	bhi	.L3033
+	ldr	r3, .L3051+32
+	ldr	r4, [r3]
+	cbz	r4, .L3034
+	ldr	r3, .L3051+36
+	mov	r8, #0
+	ldr	r7, .L3051+40
+	ldr	fp, .L3051+64
+	ldrh	r10, [r3]
+	ldr	r3, [r7]
+	subs	r4, r4, r3
+	ldr	r3, .L3051+44
+	asrs	r4, r4, #1
+	muls	r4, r3, r4
+	uxth	r4, r4
+.L3035:
+	uxth	r3, r8
+	cmp	r10, r3
+	bls	.L3034
+	ldr	r3, [r5]
+	ldrh	r2, [r3, r4, lsl #1]
+	cbz	r2, .L3036
+	ldr	r3, .L3051+4
+	movs	r6, #1
+	mov	r1, r4
+	mov	r0, fp
+	ldrh	r3, [r3, r4, lsl #1]
+	bl	printf
+.L3036:
+	movs	r3, #6
+	ldr	r2, [r7]
+	muls	r4, r3, r4
+	movw	r3, #65535
+	add	r8, r8, #1
+	ldrh	r4, [r2, r4]
+	cmp	r4, r3
+	bne	.L3035
+.L3034:
+	cbz	r6, .L3027
+	ldr	r1, .L3051+8
+	mov	r2, #1680
+	ldr	r0, .L3051+48
+	bl	printf
+	ldr	r1, .L3051+52
+	ldr	r0, .L3051+56
+	bl	printf
+.L3027:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3030:
+	movs	r2, #0
+	add	r1, sp, #4
+	mov	r0, r4
+	bl	log2phys
+	ldr	r0, [sp, #4]
+	adds	r3, r0, #1
+	beq	.L3029
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	ldrh	r3, [r5, r0, lsl #1]
+	adds	r3, r3, #1
+	strh	r3, [r5, r0, lsl #1]	@ movhi
+.L3029:
+	adds	r4, r4, #1
+	b	.L3028
+.L3033:
+	ldr	r3, [r5]
+	uxth	r7, r4
+	ldrh	r2, [r3, r7, lsl #1]
+	ldrh	r3, [r10, r7, lsl #1]
+	cmp	r2, r3
+	beq	.L3032
+	mov	r1, r7
+	mov	r0, fp
+	bl	printf
+	ldr	r3, [r5]
+	movw	r2, #65535
+	ldrh	r3, [r3, r7, lsl #1]
+	cmp	r3, r2
+	beq	.L3032
+	ldrh	r2, [r10, r7, lsl #1]
+	cmp	r2, r3
+	it	hi
+	movhi	r6, #1
+.L3032:
+	adds	r4, r4, #1
+	b	.L3031
+.L3052:
+	.align	2
+.L3051:
+	.word	.LANCHOR73
+	.word	check_valid_page_count_table
+	.word	.LANCHOR248
+	.word	.LC46
+	.word	.LANCHOR40
+	.word	.LANCHOR84
+	.word	.LC74
+	.word	.LC75
+	.word	.LANCHOR88
+	.word	.LANCHOR89
+	.word	.LANCHOR82
+	.word	-1431655765
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LC76
+	.word	.LC77
+	.size	FtlCheckVpc, .-FtlCheckVpc
+	.section	.text.FtlDumpSysBlock,"ax",%progbits
+	.align	1
+	.global	FtlDumpSysBlock
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlDumpSysBlock, %function
+FtlDumpSysBlock:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	lsl	r10, r0, #10
+	ldr	r5, .L3060
+	sub	sp, sp, #24
+	mov	r7, r0
+	movs	r6, #0
+	ldr	r4, .L3060+4
+	ldr	r3, [r5]
+	ldr	r8, .L3060+20
+	mov	fp, r4
+	str	r3, [r4, #8]
+	ldr	r3, .L3060+8
+	ldr	r3, [r3]
+	str	r3, [r4, #12]
+.L3054:
+	ldrh	r2, [r8]
+	sxth	r3, r6
+	cmp	r3, r2
+	blt	.L3056
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3056:
+	movs	r2, #1
+	orr	r3, r3, r10
+	mov	r1, r2
+	mov	r0, fp
+	str	r3, [r4, #4]
+	bl	FlashReadPages
+	ldr	r2, [r4, #8]
+	mov	r1, r7
+	ldr	r3, [r4, #12]
+	ldr	r0, .L3060+12
+	ldr	r2, [r2]
+	str	r2, [sp, #16]
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #12]
+	ldr	r2, [r3, #8]
+	str	r2, [sp, #8]
+	ldr	r2, [r3, #4]
+	str	r2, [sp, #4]
+	ldr	r3, [r3]
+	str	r3, [sp]
+	ldm	r4, {r2, r3}
+	bl	printf
+	ldr	r3, [r4, #12]
+	ldr	r3, [r3]
+	adds	r3, r3, #1
+	beq	.L3055
+	mov	r3, #768
+	movs	r2, #4
+	ldr	r1, [r5]
+	ldr	r0, .L3060+16
+	bl	rknand_print_hex
+.L3055:
+	adds	r6, r6, #1
+	b	.L3054
+.L3061:
+	.align	2
+.L3060:
+	.word	.LANCHOR183
+	.word	.LANCHOR202
+	.word	.LANCHOR188
+	.word	.LC78
+	.word	.LC79
+	.word	.LANCHOR54
+	.size	FtlDumpSysBlock, .-FtlDumpSysBlock
+	.section	.text.dump_map_info,"ax",%progbits
+	.align	1
+	.global	dump_map_info
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	dump_map_info, %function
+dump_map_info:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L3076
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #40
+	ldr	r8, .L3076+72
+	ldrh	r5, [r3]
+.L3063:
+	ldr	r3, .L3076+4
+	ldrh	r3, [r3]
+	cmp	r3, r5
+	bhi	.L3070
+	ldr	r4, .L3076+8
+	movs	r7, #0
+.L3071:
+	ldr	r3, .L3076+12
+	sxth	r5, r7
+	ldrh	r3, [r3]
+	cmp	r5, r3
+	bge	.L3074
+	lsls	r5, r5, #1
+	movs	r6, #0
+	ldr	r8, .L3076+76
+	b	.L3075
+.L3065:
+	str	r3, [sp, #36]
+	mov	r1, r5
+	ldr	r3, .L3076+16
+	str	r2, [sp, #32]
+	ldrb	r0, [r3, r6]	@ zero_extendqisi2
+	bl	V2P_block
+	str	r0, [sp, #28]
+	bl	FtlBbmIsBadBlock
+	ldr	r2, [sp, #32]
+	ldr	r3, [sp, #36]
+	cbnz	r0, .L3064
+	ldr	r1, [sp, #28]
+	mla	r0, fp, r4, r7
+	lsls	r1, r1, #10
+	str	r3, [r0, #8]
+	str	r1, [r0, #4]
+	mul	r1, r10, r4
+	adds	r4, r4, #1
+	uxth	r4, r4
+	bic	ip, r1, #3
+	ldr	r1, [sp, #24]
+	add	r1, r1, ip
+	str	r1, [r0, #12]
+.L3064:
+	adds	r6, r6, #1
+.L3072:
+	uxth	r1, r6
+	cmp	r2, r1
+	bhi	.L3065
+	cbnz	r4, .L3066
+.L3069:
+	adds	r5, r5, #1
+	uxth	r5, r5
+	b	.L3063
+.L3066:
+	ldr	r10, .L3076+80
+	mov	r0, r7
+	movs	r6, #0
+	movs	r7, #36
+	movs	r2, #1
+	mov	r1, r4
+	bl	FlashReadPages
+.L3067:
+	uxth	r3, r6
+	cmp	r4, r3
+	bls	.L3069
+	ldr	r3, [r8]
+	mla	r3, r7, r6, r3
+	adds	r6, r6, #1
+	ldr	r1, [r3, #12]
+	ldr	r2, [r3, #4]
+	ldr	r3, [r3, #8]
+	ldr	r0, [r3, #4]
+	str	r0, [sp, #16]
+	mov	r0, r10
+	ldr	r3, [r3]
+	str	r3, [sp, #12]
+	ldr	r3, [r1, #12]
+	str	r3, [sp, #8]
+	ldr	r3, [r1, #8]
+	str	r3, [sp, #4]
+	ldr	r3, [r1, #4]
+	str	r3, [sp]
+	ldr	r3, [r1]
+	ubfx	r1, r2, #10, #16
+	bl	printf
+	b	.L3067
+.L3070:
+	ldr	r1, .L3076+20
+	movs	r6, #0
+	ldr	r3, .L3076+24
+	mov	r4, r6
+	ldr	r7, [r8]
+	mov	fp, #36
+	ldr	r1, [r1]
+	ldrh	r2, [r3]
+	ldr	r3, .L3076+28
+	str	r1, [sp, #24]
+	ldr	r1, .L3076+32
+	ldr	r3, [r3]
+	ldrh	r10, [r1]
+	b	.L3072
+.L3073:
+	ldr	r10, .L3076+44
+	mov	r0, r4
+	ldr	r2, [r10]
+	ldrh	r2, [r2, r5]
+	orr	r3, r3, r2, lsl #10
+	movs	r2, #1
+	mov	r1, r2
+	str	r3, [r4, #4]
+	bl	FlashReadPages
+	ldr	r2, [r4, #8]
+	ldr	r1, [r10]
+	ldr	r3, [r4, #12]
+	ldr	r0, [r2, #4]
+	ldrh	r1, [r1, r5]
+	str	r0, [sp, #20]
+	ldr	r2, [r2]
+	ldr	r0, .L3076+36
+	str	r2, [sp, #16]
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #12]
+	ldr	r2, [r3, #8]
+	str	r2, [sp, #8]
+	ldr	r2, [r3, #4]
+	str	r2, [sp, #4]
+	ldr	r3, [r3]
+	str	r3, [sp]
+	ldm	r4, {r2, r3}
+	bl	printf
+.L3075:
+	ldrh	r2, [r8]
+	sxth	r3, r6
+	adds	r6, r6, #1
+	cmp	r3, r2
+	blt	.L3073
+	adds	r7, r7, #1
+	b	.L3071
+.L3074:
+	ldr	r3, .L3076+40
+	movs	r2, #2
+	ldr	r1, .L3076+44
+	ldr	r0, .L3076+48
+	ldr	r3, [r3]
+	ldr	r1, [r1]
+	bl	rknand_print_hex
+	ldr	r4, .L3076+52
+	movs	r2, #4
+	ldr	r1, .L3076+56
+	ldr	r0, .L3076+60
+	ldrh	r3, [r4]
+	ldr	r1, [r1]
+	bl	rknand_print_hex
+	ldr	r1, .L3076+64
+	movs	r2, #4
+	ldrh	r3, [r4]
+	ldr	r0, .L3076+68
+	ldr	r1, [r1]
+	add	sp, sp, #40
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	rknand_print_hex
+.L3077:
+	.align	2
+.L3076:
+	.word	.LANCHOR40
+	.word	.LANCHOR41
+	.word	.LANCHOR202
+	.word	.LANCHOR128
+	.word	.LANCHOR47
+	.word	.LANCHOR106
+	.word	.LANCHOR38
+	.word	.LANCHOR105
+	.word	.LANCHOR59
+	.word	.LC49
+	.word	.LANCHOR65
+	.word	.LANCHOR129
+	.word	.LC81
+	.word	.LANCHOR67
+	.word	.LANCHOR131
+	.word	.LC82
+	.word	.LANCHOR195
+	.word	.LC83
+	.word	.LANCHOR180
+	.word	.LANCHOR54
+	.word	.LC80
+	.size	dump_map_info, .-dump_map_info
+	.global	FtlMallocOffset
+	.global	FtlMallocBuffer
+	.global	LastWritenPbaAddr
+	.global	gc_ink_free_return_value
+	.global	check_valid_page_count_table
+	.global	FtlUpdateVaildLpnCount
+	.global	g_ect_tbl_power_up_flush
+	.global	power_up_flag
+	.global	g_LowFormat
+	.global	gFtlInitStatus
+	.global	DeviceCapacity
+	.global	ToshibaRefValue
+	.global	Toshiba15RefValue
+	.global	ToshibaA19RefValue
+	.global	SamsungRefValue
+	.global	refValueDefault
+	.global	random_seed
+	.global	gSlcNandParaInfo
+	.global	gNandParaInfo
+	.global	g_page_map_check_enable
+	.global	g_power_lost_ecc_error_blk
+	.global	g_power_lost_recovery_flag
+	.global	c_mlc_erase_count_value
+	.global	g_recovery_ppa_tbl
+	.global	g_recovery_page_min_ver
+	.global	g_recovery_page_num
+	.global	g_cur_erase_blk
+	.global	g_gc_skip_write_count
+	.global	g_gc_head_data_block_count
+	.global	g_gc_head_data_block
+	.global	g_ftl_nand_free_count
+	.global	g_in_swl_replace
+	.global	g_in_gc_progress
+	.global	g_all_blk_used_slc_mode
+	.global	g_max_erase_count
+	.global	g_totle_sys_slc_erase_count
+	.global	g_totle_slc_erase_count
+	.global	g_min_erase_count
+	.global	g_totle_avg_erase_count
+	.global	g_totle_mlc_erase_count
+	.global	g_totle_l2p_write_count
+	.global	g_totle_cache_write_count
+	.global	g_tmp_data_superblock_id
+	.global	g_totle_read_page_count
+	.global	g_totle_discard_page_count
+	.global	g_totle_read_sector
+	.global	g_totle_write_sector
+	.global	g_totle_write_page_count
+	.global	g_totle_gc_page_count
+	.global	g_gc_blk_index
+	.global	g_gc_merge_free_blk_threshold
+	.global	g_gc_free_blk_threshold
+	.global	g_gc_refresh_block_temp_tbl
+	.global	g_free_slc_blk_num
+	.global	g_gc_refresh_block_temp_num
+	.global	g_gc_bad_block_temp_tbl
+	.global	g_gc_bad_block_gc_index
+	.global	g_gc_bad_block_temp_num
+	.global	g_gc_next_blk_3
+	.global	g_gc_next_blk_2
+	.global	g_gc_next_blk_1
+	.global	g_gc_next_blk
+	.global	g_gc_cur_blk_max_valid_pages
+	.global	g_gc_cur_blk_valid_pages
+	.global	g_gc_page_offset
+	.global	g_gc_blk_num
+	.global	p_gc_blk_tbl
+	.global	p_gc_page_info
+	.global	g_sys_ext_data
+	.global	g_sys_save_data
+	.global	gp_last_act_superblock
+	.global	g_gc_superblock
+	.global	g_gc_temp_superblock
+	.global	g_buffer_superblock
+	.global	g_active_superblock
+	.global	g_num_data_superblocks
+	.global	g_num_free_superblocks
+	.global	p_data_block_list_tail
+	.global	p_data_block_list_head
+	.global	p_free_data_block_list_head
+	.global	p_data_block_list_table
+	.global	g_l2p_last_update_region_id
+	.global	p_l2p_map_buf
+	.global	p_l2p_ram_map
+	.global	g_totle_vendor_block
+	.global	p_vendor_region_ppn_table
+	.global	p_vendor_block_ver_table
+	.global	p_vendor_block_valid_page_count
+	.global	p_vendor_block_table
+	.global	g_totle_map_block
+	.global	p_map_region_ppn_check_table
+	.global	p_map_region_ppn_table
+	.global	p_map_block_ver_table
+	.global	p_map_block_valid_page_count
+	.global	p_map_block_table
+	.global	p_blk_mode_table
+	.global	p_valid_page_count_check_table
+	.global	p_valid_page_count_table
+	.global	g_totle_swl_count
+	.global	p_swl_mul_table
+	.global	p_erase_count_table
+	.global	g_ect_tbl_info_size
+	.global	gp_ect_tbl_info
+	.global	g_gc_num_req
+	.global	c_gc_page_buf_num
+	.global	gp_gc_page_buf_info
+	.global	p_gc_data_buf
+	.global	p_gc_spare_buf
+	.global	p_io_spare_buf
+	.global	p_io_data_buf_1
+	.global	p_io_data_buf_0
+	.global	p_sys_spare_buf
+	.global	p_vendor_data_buf
+	.global	p_sys_data_buf_1
+	.global	p_sys_data_buf
+	.global	p_plane_order_table
+	.global	g_req_cache
+	.global	req_gc_dst
+	.global	req_gc
+	.global	req_erase
+	.global	req_prgm
+	.global	req_read
+	.global	req_sys
+	.global	gVendorBlkInfo
+	.global	gL2pMapInfo
+	.global	gSysFreeQueue
+	.global	gSysInfo
+	.global	gBbtInfo
+	.global	g_flash_read_only_en
+	.global	g_inkDie_check_enable
+	.global	g_SlcPartLbaEndSector
+	.global	g_MaxLbn
+	.global	g_VaildLpn
+	.global	g_MaxLpn
+	.global	g_MaxLbaSector
+	.global	g_GlobalDataVersion
+	.global	g_GlobalSysVersion
+	.global	ftl_gc_temp_power_lost_recovery_flag
+	.global	c_ftl_nand_max_data_blks
+	.global	c_ftl_nand_data_op_blks_per_plane
+	.global	c_ftl_nand_data_blks_per_plane
+	.global	c_ftl_nand_max_sys_blks
+	.global	c_ftl_nand_init_sys_blks_per_plane
+	.global	c_ftl_nand_sys_blks_per_plane
+	.global	c_ftl_vendor_part_size
+	.global	c_ftl_nand_max_vendor_blks
+	.global	c_ftl_nand_max_map_blks
+	.global	c_ftl_nand_map_blks_per_plane
+	.global	c_ftl_nand_vendor_region_num
+	.global	c_ftl_nand_l2pmap_ram_region_num
+	.global	c_ftl_nand_map_region_num
+	.global	c_ftl_nand_totle_phy_blks
+	.global	c_ftl_nand_reserved_blks
+	.global	c_ftl_nand_byte_pre_oob
+	.global	c_ftl_nand_byte_pre_page
+	.global	c_ftl_nand_sec_pre_page_shift
+	.global	c_ftl_nand_sec_pre_page
+	.global	c_ftl_nand_page_pre_super_blk
+	.global	c_ftl_nand_page_pre_slc_blk
+	.global	c_ftl_nand_page_pre_blk
+	.global	c_ftl_nand_bbm_buf_size
+	.global	c_ftl_nand_ext_blk_pre_plane
+	.global	c_ftl_nand_blk_pre_plane
+	.global	c_ftl_nand_planes_num
+	.global	c_ftl_nand_blks_per_die_shift
+	.global	c_ftl_nand_blks_per_die
+	.global	c_ftl_nand_planes_per_die
+	.global	c_ftl_nand_die_num
+	.global	c_ftl_nand_type
+	.global	gMasterTempBuf
+	.global	gMasterInfo
+	.global	gNandcDumpWriteEn
+	.global	gToggleModeClkDiv
+	.global	gBootDdrMode
+	.global	gNandcEccBits
+	.global	gpNandc1
+	.global	gpNandc
+	.global	g_nandc_version_data
+	.global	gNandcVer
+	.global	gNandChipMap
+	.global	gNandIDataBuf
+	.global	FlashDdrTunningReadCount
+	.global	FlashWaitBusyScheduleEn
+	.global	gNandPhyInfo
+	.global	gFlashProgCheckSpareBuffer
+	.global	gFlashProgCheckBuffer
+	.global	gFlashSpareBuffer
+	.global	gFlashPageBuffer1
+	.global	gFlashPageBuffer0
+	.global	gpFlashSaveInfo
+	.global	gReadRetryInfo
+	.global	gpNandParaInfo
+	.global	gNandOptPara
+	.global	g_slc2KBNand
+	.global	g_maxRetryCount
+	.global	g_maxRegNum
+	.global	g_retryMode
+	.global	gNandIDBResBlkNumSaveInFlash
+	.global	gNandIDBResBlkNum
+	.global	gNandFlashResEndPageAddr
+	.global	gNandFlashInfoBlockAddr
+	.global	gNandFlashIdbBlockAddr
+	.global	gNandFlashInfoBlockEcc
+	.global	gNandFlashIDBEccBits
+	.global	gNandFlashEccBits
+	.global	gNandRandomizer
+	.global	gBlockPageAlignSize
+	.global	gTotleBlock
+	.global	gNandMaxChip
+	.global	gNandMaxDie
+	.global	gFlashInterfaceMode
+	.global	gFlashSlcMode
+	.global	gFlashOnfiModeEn
+	.global	gFlashToggleModeEn
+	.global	gFlashSdrModeEn
+	.global	gMultiPageProgEn
+	.global	gMultiPageReadEn
+	.global	gpReadRetrial
+	.global	mlcPageToSlcPageTbl
+	.global	slcPageToMlcPageTbl
+	.global	DieAddrs
+	.global	gDieOp
+	.global	DieCsIndex
+	.global	IDByte
+	.global	read_retry_cur_offset
+	.section	.bss.DeviceCapacity,"aw",%nobits
+	.align	2
+	.set	.LANCHOR61,. + 0
+	.type	DeviceCapacity, %object
+	.size	DeviceCapacity, 4
+DeviceCapacity:
+	.space	4
+	.section	.bss.DieAddrs,"aw",%nobits
+	.align	2
+	.set	.LANCHOR17,. + 0
+	.type	DieAddrs, %object
+	.size	DieAddrs, 32
+DieAddrs:
+	.space	32
+	.section	.bss.DieCsIndex,"aw",%nobits
+	.align	2
+	.set	.LANCHOR26,. + 0
+	.type	DieCsIndex, %object
+	.size	DieCsIndex, 8
+DieCsIndex:
+	.space	8
+	.section	.bss.FlashDdrTunningReadCount,"aw",%nobits
+	.align	2
+	.set	.LANCHOR144,. + 0
+	.type	FlashDdrTunningReadCount, %object
+	.size	FlashDdrTunningReadCount, 4
+FlashDdrTunningReadCount:
+	.space	4
+	.section	.bss.FlashWaitBusyScheduleEn,"aw",%nobits
+	.align	2
+	.type	FlashWaitBusyScheduleEn, %object
+	.size	FlashWaitBusyScheduleEn, 4
+FlashWaitBusyScheduleEn:
+	.space	4
+	.section	.bss.FtlMallocBuffer,"aw",%nobits
+	.align	6
+	.type	FtlMallocBuffer, %object
+	.size	FtlMallocBuffer, 1310720
+FtlMallocBuffer:
+	.space	1310720
+	.section	.bss.FtlUpdateVaildLpnCount,"aw",%nobits
+	.align	1
+	.set	.LANCHOR100,. + 0
+	.type	FtlUpdateVaildLpnCount, %object
+	.size	FtlUpdateVaildLpnCount, 2
+FtlUpdateVaildLpnCount:
+	.space	2
+	.section	.bss.IDByte,"aw",%nobits
+	.align	2
+	.set	.LANCHOR22,. + 0
+	.type	IDByte, %object
+	.size	IDByte, 32
+IDByte:
+	.space	32
+	.section	.bss.c_ftl_nand_bbm_buf_size,"aw",%nobits
+	.align	1
+	.set	.LANCHOR123,. + 0
+	.type	c_ftl_nand_bbm_buf_size, %object
+	.size	c_ftl_nand_bbm_buf_size, 2
+c_ftl_nand_bbm_buf_size:
+	.space	2
+	.section	.bss.c_ftl_nand_blk_pre_plane,"aw",%nobits
+	.align	1
+	.set	.LANCHOR41,. + 0
+	.type	c_ftl_nand_blk_pre_plane, %object
+	.size	c_ftl_nand_blk_pre_plane, 2
+c_ftl_nand_blk_pre_plane:
+	.space	2
+	.section	.bss.c_ftl_nand_blks_per_die,"aw",%nobits
+	.align	1
+	.set	.LANCHOR51,. + 0
+	.type	c_ftl_nand_blks_per_die, %object
+	.size	c_ftl_nand_blks_per_die, 2
+c_ftl_nand_blks_per_die:
+	.space	2
+	.section	.bss.c_ftl_nand_blks_per_die_shift,"aw",%nobits
+	.align	1
+	.set	.LANCHOR52,. + 0
+	.type	c_ftl_nand_blks_per_die_shift, %object
+	.size	c_ftl_nand_blks_per_die_shift, 2
+c_ftl_nand_blks_per_die_shift:
+	.space	2
+	.section	.bss.c_ftl_nand_byte_pre_oob,"aw",%nobits
+	.align	1
+	.set	.LANCHOR59,. + 0
+	.type	c_ftl_nand_byte_pre_oob, %object
+	.size	c_ftl_nand_byte_pre_oob, 2
+c_ftl_nand_byte_pre_oob:
+	.space	2
+	.section	.bss.c_ftl_nand_byte_pre_page,"aw",%nobits
+	.align	1
+	.set	.LANCHOR58,. + 0
+	.type	c_ftl_nand_byte_pre_page, %object
+	.size	c_ftl_nand_byte_pre_page, 2
+c_ftl_nand_byte_pre_page:
+	.space	2
+	.section	.bss.c_ftl_nand_data_blks_per_plane,"aw",%nobits
+	.align	1
+	.set	.LANCHOR40,. + 0
+	.type	c_ftl_nand_data_blks_per_plane, %object
+	.size	c_ftl_nand_data_blks_per_plane, 2
+c_ftl_nand_data_blks_per_plane:
+	.space	2
+	.section	.bss.c_ftl_nand_data_op_blks_per_plane,"aw",%nobits
+	.align	1
+	.set	.LANCHOR223,. + 0
+	.type	c_ftl_nand_data_op_blks_per_plane, %object
+	.size	c_ftl_nand_data_op_blks_per_plane, 2
+c_ftl_nand_data_op_blks_per_plane:
+	.space	2
+	.section	.bss.c_ftl_nand_die_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR45,. + 0
+	.type	c_ftl_nand_die_num, %object
+	.size	c_ftl_nand_die_num, 2
+c_ftl_nand_die_num:
+	.space	2
+	.section	.bss.c_ftl_nand_ext_blk_pre_plane,"aw",%nobits
+	.align	1
+	.set	.LANCHOR49,. + 0
+	.type	c_ftl_nand_ext_blk_pre_plane, %object
+	.size	c_ftl_nand_ext_blk_pre_plane, 2
+c_ftl_nand_ext_blk_pre_plane:
+	.space	2
+	.section	.bss.c_ftl_nand_init_sys_blks_per_plane,"aw",%nobits
+	.align	2
+	.set	.LANCHOR66,. + 0
+	.type	c_ftl_nand_init_sys_blks_per_plane, %object
+	.size	c_ftl_nand_init_sys_blks_per_plane, 4
+c_ftl_nand_init_sys_blks_per_plane:
+	.space	4
+	.section	.bss.c_ftl_nand_l2pmap_ram_region_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR68,. + 0
+	.type	c_ftl_nand_l2pmap_ram_region_num, %object
+	.size	c_ftl_nand_l2pmap_ram_region_num, 2
+c_ftl_nand_l2pmap_ram_region_num:
+	.space	2
+	.section	.bss.c_ftl_nand_map_blks_per_plane,"aw",%nobits
+	.align	1
+	.set	.LANCHOR64,. + 0
+	.type	c_ftl_nand_map_blks_per_plane, %object
+	.size	c_ftl_nand_map_blks_per_plane, 2
+c_ftl_nand_map_blks_per_plane:
+	.space	2
+	.section	.bss.c_ftl_nand_map_region_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR67,. + 0
+	.type	c_ftl_nand_map_region_num, %object
+	.size	c_ftl_nand_map_region_num, 2
+c_ftl_nand_map_region_num:
+	.space	2
+	.section	.bss.c_ftl_nand_max_data_blks,"aw",%nobits
+	.align	2
+	.set	.LANCHOR42,. + 0
+	.type	c_ftl_nand_max_data_blks, %object
+	.size	c_ftl_nand_max_data_blks, 4
+c_ftl_nand_max_data_blks:
+	.space	4
+	.section	.bss.c_ftl_nand_max_map_blks,"aw",%nobits
+	.align	2
+	.set	.LANCHOR65,. + 0
+	.type	c_ftl_nand_max_map_blks, %object
+	.size	c_ftl_nand_max_map_blks, 4
+c_ftl_nand_max_map_blks:
+	.space	4
+	.section	.bss.c_ftl_nand_max_sys_blks,"aw",%nobits
+	.align	2
+	.set	.LANCHOR39,. + 0
+	.type	c_ftl_nand_max_sys_blks, %object
+	.size	c_ftl_nand_max_sys_blks, 4
+c_ftl_nand_max_sys_blks:
+	.space	4
+	.section	.bss.c_ftl_nand_max_vendor_blks,"aw",%nobits
+	.align	1
+	.set	.LANCHOR62,. + 0
+	.type	c_ftl_nand_max_vendor_blks, %object
+	.size	c_ftl_nand_max_vendor_blks, 2
+c_ftl_nand_max_vendor_blks:
+	.space	2
+	.section	.bss.c_ftl_nand_page_pre_blk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR53,. + 0
+	.type	c_ftl_nand_page_pre_blk, %object
+	.size	c_ftl_nand_page_pre_blk, 2
+c_ftl_nand_page_pre_blk:
+	.space	2
+	.section	.bss.c_ftl_nand_page_pre_slc_blk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR54,. + 0
+	.type	c_ftl_nand_page_pre_slc_blk, %object
+	.size	c_ftl_nand_page_pre_slc_blk, 2
+c_ftl_nand_page_pre_slc_blk:
+	.space	2
+	.section	.bss.c_ftl_nand_page_pre_super_blk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR55,. + 0
+	.type	c_ftl_nand_page_pre_super_blk, %object
+	.size	c_ftl_nand_page_pre_super_blk, 2
+c_ftl_nand_page_pre_super_blk:
+	.space	2
+	.section	.bss.c_ftl_nand_planes_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR38,. + 0
+	.type	c_ftl_nand_planes_num, %object
+	.size	c_ftl_nand_planes_num, 2
+c_ftl_nand_planes_num:
+	.space	2
+	.section	.bss.c_ftl_nand_planes_per_die,"aw",%nobits
+	.align	1
+	.set	.LANCHOR46,. + 0
+	.type	c_ftl_nand_planes_per_die, %object
+	.size	c_ftl_nand_planes_per_die, 2
+c_ftl_nand_planes_per_die:
+	.space	2
+	.section	.bss.c_ftl_nand_reserved_blks,"aw",%nobits
+	.align	1
+	.set	.LANCHOR60,. + 0
+	.type	c_ftl_nand_reserved_blks, %object
+	.size	c_ftl_nand_reserved_blks, 2
+c_ftl_nand_reserved_blks:
+	.space	2
+	.section	.bss.c_ftl_nand_sec_pre_page,"aw",%nobits
+	.align	1
+	.set	.LANCHOR56,. + 0
+	.type	c_ftl_nand_sec_pre_page, %object
+	.size	c_ftl_nand_sec_pre_page, 2
+c_ftl_nand_sec_pre_page:
+	.space	2
+	.section	.bss.c_ftl_nand_sec_pre_page_shift,"aw",%nobits
+	.align	1
+	.set	.LANCHOR57,. + 0
+	.type	c_ftl_nand_sec_pre_page_shift, %object
+	.size	c_ftl_nand_sec_pre_page_shift, 2
+c_ftl_nand_sec_pre_page_shift:
+	.space	2
+	.section	.bss.c_ftl_nand_sys_blks_per_plane,"aw",%nobits
+	.align	2
+	.set	.LANCHOR37,. + 0
+	.type	c_ftl_nand_sys_blks_per_plane, %object
+	.size	c_ftl_nand_sys_blks_per_plane, 4
+c_ftl_nand_sys_blks_per_plane:
+	.space	4
+	.section	.bss.c_ftl_nand_totle_phy_blks,"aw",%nobits
+	.align	2
+	.set	.LANCHOR43,. + 0
+	.type	c_ftl_nand_totle_phy_blks, %object
+	.size	c_ftl_nand_totle_phy_blks, 4
+c_ftl_nand_totle_phy_blks:
+	.space	4
+	.section	.bss.c_ftl_nand_type,"aw",%nobits
+	.align	1
+	.set	.LANCHOR44,. + 0
+	.type	c_ftl_nand_type, %object
+	.size	c_ftl_nand_type, 2
+c_ftl_nand_type:
+	.space	2
+	.section	.bss.c_ftl_nand_vendor_region_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR63,. + 0
+	.type	c_ftl_nand_vendor_region_num, %object
+	.size	c_ftl_nand_vendor_region_num, 2
+c_ftl_nand_vendor_region_num:
+	.space	2
+	.section	.bss.c_ftl_vendor_part_size,"aw",%nobits
+	.align	1
+	.set	.LANCHOR50,. + 0
+	.type	c_ftl_vendor_part_size, %object
+	.size	c_ftl_vendor_part_size, 2
+c_ftl_vendor_part_size:
+	.space	2
+	.section	.bss.c_gc_page_buf_num,"aw",%nobits
+	.align	2
+	.set	.LANCHOR108,. + 0
+	.type	c_gc_page_buf_num, %object
+	.size	c_gc_page_buf_num, 4
+c_gc_page_buf_num:
+	.space	4
+	.section	.bss.c_mlc_erase_count_value,"aw",%nobits
+	.align	1
+	.set	.LANCHOR48,. + 0
+	.type	c_mlc_erase_count_value, %object
+	.size	c_mlc_erase_count_value, 2
+c_mlc_erase_count_value:
+	.space	2
+	.section	.bss.check_valid_page_count_table,"aw",%nobits
+	.align	1
+	.type	check_valid_page_count_table, %object
+	.size	check_valid_page_count_table, 8192
+check_valid_page_count_table:
+	.space	8192
+	.section	.bss.ftl_gc_temp_power_lost_recovery_flag,"aw",%nobits
+	.align	2
+	.set	.LANCHOR135,. + 0
+	.type	ftl_gc_temp_power_lost_recovery_flag, %object
+	.size	ftl_gc_temp_power_lost_recovery_flag, 4
+ftl_gc_temp_power_lost_recovery_flag:
+	.space	4
+	.section	.bss.gBbtInfo,"aw",%nobits
+	.align	2
+	.set	.LANCHOR75,. + 0
+	.type	gBbtInfo, %object
+	.size	gBbtInfo, 60
+gBbtInfo:
+	.space	60
+	.section	.bss.gBlockPageAlignSize,"aw",%nobits
+	.align	2
+	.set	.LANCHOR3,. + 0
+	.type	gBlockPageAlignSize, %object
+	.size	gBlockPageAlignSize, 4
+gBlockPageAlignSize:
+	.space	4
+	.section	.bss.gBootDdrMode,"aw",%nobits
+	.align	2
+	.set	.LANCHOR155,. + 0
+	.type	gBootDdrMode, %object
+	.size	gBootDdrMode, 4
+gBootDdrMode:
+	.space	4
+	.section	.bss.gDieOp,"aw",%nobits
+	.align	2
+	.set	.LANCHOR23,. + 0
+	.type	gDieOp, %object
+	.size	gDieOp, 128
+gDieOp:
+	.space	128
+	.section	.bss.gFlashInterfaceMode,"aw",%nobits
+	.set	.LANCHOR24,. + 0
+	.type	gFlashInterfaceMode, %object
+	.size	gFlashInterfaceMode, 1
+gFlashInterfaceMode:
+	.space	1
+	.section	.bss.gFlashOnfiModeEn,"aw",%nobits
+	.type	gFlashOnfiModeEn, %object
+	.size	gFlashOnfiModeEn, 1
+gFlashOnfiModeEn:
+	.space	1
+	.section	.bss.gFlashPageBuffer0,"aw",%nobits
+	.align	2
+	.set	.LANCHOR147,. + 0
+	.type	gFlashPageBuffer0, %object
+	.size	gFlashPageBuffer0, 4
+gFlashPageBuffer0:
+	.space	4
+	.section	.bss.gFlashPageBuffer1,"aw",%nobits
+	.align	2
+	.set	.LANCHOR153,. + 0
+	.type	gFlashPageBuffer1, %object
+	.size	gFlashPageBuffer1, 4
+gFlashPageBuffer1:
+	.space	4
+	.section	.bss.gFlashProgCheckBuffer,"aw",%nobits
+	.align	2
+	.set	.LANCHOR198,. + 0
+	.type	gFlashProgCheckBuffer, %object
+	.size	gFlashProgCheckBuffer, 4
+gFlashProgCheckBuffer:
+	.space	4
+	.section	.bss.gFlashProgCheckSpareBuffer,"aw",%nobits
+	.align	2
+	.set	.LANCHOR199,. + 0
+	.type	gFlashProgCheckSpareBuffer, %object
+	.size	gFlashProgCheckSpareBuffer, 4
+gFlashProgCheckSpareBuffer:
+	.space	4
+	.section	.bss.gFlashSdrModeEn,"aw",%nobits
+	.type	gFlashSdrModeEn, %object
+	.size	gFlashSdrModeEn, 1
+gFlashSdrModeEn:
+	.space	1
+	.section	.bss.gFlashSlcMode,"aw",%nobits
+	.set	.LANCHOR8,. + 0
+	.type	gFlashSlcMode, %object
+	.size	gFlashSlcMode, 1
+gFlashSlcMode:
+	.space	1
+	.section	.bss.gFlashSpareBuffer,"aw",%nobits
+	.align	2
+	.set	.LANCHOR197,. + 0
+	.type	gFlashSpareBuffer, %object
+	.size	gFlashSpareBuffer, 4
+gFlashSpareBuffer:
+	.space	4
+	.section	.bss.gFlashToggleModeEn,"aw",%nobits
+	.set	.LANCHOR30,. + 0
+	.type	gFlashToggleModeEn, %object
+	.size	gFlashToggleModeEn, 1
+gFlashToggleModeEn:
+	.space	1
+	.section	.bss.gL2pMapInfo,"aw",%nobits
+	.align	2
+	.set	.LANCHOR127,. + 0
+	.type	gL2pMapInfo, %object
+	.size	gL2pMapInfo, 44
+gL2pMapInfo:
+	.space	44
+	.section	.bss.gMasterInfo,"aw",%nobits
+	.align	2
+	.set	.LANCHOR35,. + 0
+	.type	gMasterInfo, %object
+	.size	gMasterInfo, 32
+gMasterInfo:
+	.space	32
+	.section	.bss.gMasterTempBuf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR156,. + 0
+	.type	gMasterTempBuf, %object
+	.size	gMasterTempBuf, 4
+gMasterTempBuf:
+	.space	4
+	.section	.bss.gMultiPageProgEn,"aw",%nobits
+	.set	.LANCHOR27,. + 0
+	.type	gMultiPageProgEn, %object
+	.size	gMultiPageProgEn, 1
+gMultiPageProgEn:
+	.space	1
+	.section	.bss.gMultiPageReadEn,"aw",%nobits
+	.set	.LANCHOR201,. + 0
+	.type	gMultiPageReadEn, %object
+	.size	gMultiPageReadEn, 1
+gMultiPageReadEn:
+	.space	1
+	.section	.bss.gNandChipMap,"aw",%nobits
+	.align	2
+	.set	.LANCHOR6,. + 0
+	.type	gNandChipMap, %object
+	.size	gNandChipMap, 32
+gNandChipMap:
+	.space	32
+	.section	.bss.gNandFlashEccBits,"aw",%nobits
+	.set	.LANCHOR33,. + 0
+	.type	gNandFlashEccBits, %object
+	.size	gNandFlashEccBits, 1
+gNandFlashEccBits:
+	.space	1
+	.section	.bss.gNandFlashIDBEccBits,"aw",%nobits
+	.set	.LANCHOR152,. + 0
+	.type	gNandFlashIDBEccBits, %object
+	.size	gNandFlashIDBEccBits, 1
+gNandFlashIDBEccBits:
+	.space	1
+	.section	.bss.gNandFlashIdbBlockAddr,"aw",%nobits
+	.align	2
+	.set	.LANCHOR149,. + 0
+	.type	gNandFlashIdbBlockAddr, %object
+	.size	gNandFlashIdbBlockAddr, 4
+gNandFlashIdbBlockAddr:
+	.space	4
+	.section	.bss.gNandFlashInfoBlockAddr,"aw",%nobits
+	.align	2
+	.set	.LANCHOR148,. + 0
+	.type	gNandFlashInfoBlockAddr, %object
+	.size	gNandFlashInfoBlockAddr, 4
+gNandFlashInfoBlockAddr:
+	.space	4
+	.section	.bss.gNandFlashInfoBlockEcc,"aw",%nobits
+	.type	gNandFlashInfoBlockEcc, %object
+	.size	gNandFlashInfoBlockEcc, 1
+gNandFlashInfoBlockEcc:
+	.space	1
+	.section	.bss.gNandFlashResEndPageAddr,"aw",%nobits
+	.align	2
+	.type	gNandFlashResEndPageAddr, %object
+	.size	gNandFlashResEndPageAddr, 4
+gNandFlashResEndPageAddr:
+	.space	4
+	.section	.bss.gNandIDBResBlkNum,"aw",%nobits
+	.set	.LANCHOR2,. + 0
+	.type	gNandIDBResBlkNum, %object
+	.size	gNandIDBResBlkNum, 1
+gNandIDBResBlkNum:
+	.space	1
+	.section	.bss.gNandIDBResBlkNumSaveInFlash,"aw",%nobits
+	.set	.LANCHOR150,. + 0
+	.type	gNandIDBResBlkNumSaveInFlash, %object
+	.size	gNandIDBResBlkNumSaveInFlash, 1
+gNandIDBResBlkNumSaveInFlash:
+	.space	1
+	.section	.bss.gNandIDataBuf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR141,. + 0
+	.type	gNandIDataBuf, %object
+	.size	gNandIDataBuf, 2048
+gNandIDataBuf:
+	.space	2048
+	.section	.bss.gNandMaxChip,"aw",%nobits
+	.set	.LANCHOR121,. + 0
+	.type	gNandMaxChip, %object
+	.size	gNandMaxChip, 1
+gNandMaxChip:
+	.space	1
+	.section	.bss.gNandMaxDie,"aw",%nobits
+	.set	.LANCHOR25,. + 0
+	.type	gNandMaxDie, %object
+	.size	gNandMaxDie, 1
+gNandMaxDie:
+	.space	1
+	.section	.bss.gNandOptPara,"aw",%nobits
+	.set	.LANCHOR7,. + 0
+	.type	gNandOptPara, %object
+	.size	gNandOptPara, 32
+gNandOptPara:
+	.space	32
+	.section	.bss.gNandPhyInfo,"aw",%nobits
+	.align	2
+	.set	.LANCHOR15,. + 0
+	.type	gNandPhyInfo, %object
+	.size	gNandPhyInfo, 28
+gNandPhyInfo:
+	.space	28
+	.section	.bss.gNandRandomizer,"aw",%nobits
+	.set	.LANCHOR5,. + 0
+	.type	gNandRandomizer, %object
+	.size	gNandRandomizer, 1
+gNandRandomizer:
+	.space	1
+	.section	.bss.gNandcDumpWriteEn,"aw",%nobits
+	.align	2
+	.set	.LANCHOR36,. + 0
+	.type	gNandcDumpWriteEn, %object
+	.size	gNandcDumpWriteEn, 4
+gNandcDumpWriteEn:
+	.space	4
+	.section	.bss.gNandcEccBits,"aw",%nobits
+	.align	2
+	.set	.LANCHOR32,. + 0
+	.type	gNandcEccBits, %object
+	.size	gNandcEccBits, 4
+gNandcEccBits:
+	.space	4
+	.section	.bss.gNandcVer,"aw",%nobits
+	.align	2
+	.set	.LANCHOR34,. + 0
+	.type	gNandcVer, %object
+	.size	gNandcVer, 4
+gNandcVer:
+	.space	4
+	.section	.bss.gReadRetryInfo,"aw",%nobits
+	.set	.LANCHOR20,. + 0
+	.type	gReadRetryInfo, %object
+	.size	gReadRetryInfo, 852
+gReadRetryInfo:
+	.space	852
+	.section	.bss.gSysFreeQueue,"aw",%nobits
+	.align	1
+	.set	.LANCHOR76,. + 0
+	.type	gSysFreeQueue, %object
+	.size	gSysFreeQueue, 2056
+gSysFreeQueue:
+	.space	2056
+	.section	.bss.gSysInfo,"aw",%nobits
+	.align	2
+	.set	.LANCHOR209,. + 0
+	.type	gSysInfo, %object
+	.size	gSysInfo, 12
+gSysInfo:
+	.space	12
+	.section	.bss.gToggleModeClkDiv,"aw",%nobits
+	.align	2
+	.type	gToggleModeClkDiv, %object
+	.size	gToggleModeClkDiv, 4
+gToggleModeClkDiv:
+	.space	4
+	.section	.bss.gTotleBlock,"aw",%nobits
+	.align	1
+	.set	.LANCHOR122,. + 0
+	.type	gTotleBlock, %object
+	.size	gTotleBlock, 2
+gTotleBlock:
+	.space	2
+	.section	.bss.gVendorBlkInfo,"aw",%nobits
+	.align	2
+	.set	.LANCHOR215,. + 0
+	.type	gVendorBlkInfo, %object
+	.size	gVendorBlkInfo, 44
+gVendorBlkInfo:
+	.space	44
+	.section	.bss.g_GlobalDataVersion,"aw",%nobits
+	.align	2
+	.set	.LANCHOR160,. + 0
+	.type	g_GlobalDataVersion, %object
+	.size	g_GlobalDataVersion, 4
+g_GlobalDataVersion:
+	.space	4
+	.section	.bss.g_GlobalSysVersion,"aw",%nobits
+	.align	2
+	.set	.LANCHOR159,. + 0
+	.type	g_GlobalSysVersion, %object
+	.size	g_GlobalSysVersion, 4
+g_GlobalSysVersion:
+	.space	4
+	.section	.bss.g_LowFormat,"aw",%nobits
+	.align	2
+	.set	.LANCHOR244,. + 0
+	.type	g_LowFormat, %object
+	.size	g_LowFormat, 4
+g_LowFormat:
+	.space	4
+	.section	.bss.g_MaxLbaSector,"aw",%nobits
+	.align	2
+	.set	.LANCHOR69,. + 0
+	.type	g_MaxLbaSector, %object
+	.size	g_MaxLbaSector, 4
+g_MaxLbaSector:
+	.space	4
+	.section	.bss.g_MaxLbn,"aw",%nobits
+	.align	2
+	.set	.LANCHOR222,. + 0
+	.type	g_MaxLbn, %object
+	.size	g_MaxLbn, 4
+g_MaxLbn:
+	.space	4
+	.section	.bss.g_MaxLpn,"aw",%nobits
+	.align	2
+	.set	.LANCHOR73,. + 0
+	.type	g_MaxLpn, %object
+	.size	g_MaxLpn, 4
+g_MaxLpn:
+	.space	4
+	.section	.bss.g_SlcPartLbaEndSector,"aw",%nobits
+	.align	2
+	.set	.LANCHOR157,. + 0
+	.type	g_SlcPartLbaEndSector, %object
+	.size	g_SlcPartLbaEndSector, 4
+g_SlcPartLbaEndSector:
+	.space	4
+	.section	.bss.g_VaildLpn,"aw",%nobits
+	.align	2
+	.set	.LANCHOR101,. + 0
+	.type	g_VaildLpn, %object
+	.size	g_VaildLpn, 4
+g_VaildLpn:
+	.space	4
+	.section	.bss.g_active_superblock,"aw",%nobits
+	.align	2
+	.set	.LANCHOR92,. + 0
+	.type	g_active_superblock, %object
+	.size	g_active_superblock, 48
+g_active_superblock:
+	.space	48
+	.section	.bss.g_all_blk_used_slc_mode,"aw",%nobits
+	.align	2
+	.set	.LANCHOR158,. + 0
+	.type	g_all_blk_used_slc_mode, %object
+	.size	g_all_blk_used_slc_mode, 4
+g_all_blk_used_slc_mode:
+	.space	4
+	.section	.bss.g_buffer_superblock,"aw",%nobits
+	.align	2
+	.set	.LANCHOR93,. + 0
+	.type	g_buffer_superblock, %object
+	.size	g_buffer_superblock, 48
+g_buffer_superblock:
+	.space	48
+	.section	.bss.g_cur_erase_blk,"aw",%nobits
+	.align	2
+	.set	.LANCHOR74,. + 0
+	.type	g_cur_erase_blk, %object
+	.size	g_cur_erase_blk, 4
+g_cur_erase_blk:
+	.space	4
+	.section	.bss.g_ect_tbl_info_size,"aw",%nobits
+	.align	1
+	.set	.LANCHOR190,. + 0
+	.type	g_ect_tbl_info_size, %object
+	.size	g_ect_tbl_info_size, 2
+g_ect_tbl_info_size:
+	.space	2
+	.section	.bss.g_ect_tbl_power_up_flush,"aw",%nobits
+	.align	1
+	.set	.LANCHOR218,. + 0
+	.type	g_ect_tbl_power_up_flush, %object
+	.size	g_ect_tbl_power_up_flush, 2
+g_ect_tbl_power_up_flush:
+	.space	2
+	.section	.bss.g_flash_read_only_en,"aw",%nobits
+	.align	2
+	.set	.LANCHOR77,. + 0
+	.type	g_flash_read_only_en, %object
+	.size	g_flash_read_only_en, 4
+g_flash_read_only_en:
+	.space	4
+	.section	.bss.g_free_slc_blk_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR139,. + 0
+	.type	g_free_slc_blk_num, %object
+	.size	g_free_slc_blk_num, 2
+g_free_slc_blk_num:
+	.space	2
+	.section	.bss.g_ftl_nand_free_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR246,. + 0
+	.type	g_ftl_nand_free_count, %object
+	.size	g_ftl_nand_free_count, 4
+g_ftl_nand_free_count:
+	.space	4
+	.section	.bss.g_gc_bad_block_gc_index,"aw",%nobits
+	.align	1
+	.set	.LANCHOR119,. + 0
+	.type	g_gc_bad_block_gc_index, %object
+	.size	g_gc_bad_block_gc_index, 2
+g_gc_bad_block_gc_index:
+	.space	2
+	.section	.bss.g_gc_bad_block_temp_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR117,. + 0
+	.type	g_gc_bad_block_temp_num, %object
+	.size	g_gc_bad_block_temp_num, 2
+g_gc_bad_block_temp_num:
+	.space	2
+	.section	.bss.g_gc_bad_block_temp_tbl,"aw",%nobits
+	.align	1
+	.set	.LANCHOR118,. + 0
+	.type	g_gc_bad_block_temp_tbl, %object
+	.size	g_gc_bad_block_temp_tbl, 34
+g_gc_bad_block_temp_tbl:
+	.space	34
+	.section	.bss.g_gc_blk_index,"aw",%nobits
+	.align	1
+	.set	.LANCHOR178,. + 0
+	.type	g_gc_blk_index, %object
+	.size	g_gc_blk_index, 2
+g_gc_blk_index:
+	.space	2
+	.section	.bss.g_gc_blk_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR110,. + 0
+	.type	g_gc_blk_num, %object
+	.size	g_gc_blk_num, 2
+g_gc_blk_num:
+	.space	2
+	.section	.bss.g_gc_cur_blk_max_valid_pages,"aw",%nobits
+	.align	1
+	.set	.LANCHOR242,. + 0
+	.type	g_gc_cur_blk_max_valid_pages, %object
+	.size	g_gc_cur_blk_max_valid_pages, 2
+g_gc_cur_blk_max_valid_pages:
+	.space	2
+	.section	.bss.g_gc_cur_blk_valid_pages,"aw",%nobits
+	.align	1
+	.set	.LANCHOR241,. + 0
+	.type	g_gc_cur_blk_valid_pages, %object
+	.size	g_gc_cur_blk_valid_pages, 2
+g_gc_cur_blk_valid_pages:
+	.space	2
+	.section	.bss.g_gc_free_blk_threshold,"aw",%nobits
+	.align	1
+	.set	.LANCHOR176,. + 0
+	.type	g_gc_free_blk_threshold, %object
+	.size	g_gc_free_blk_threshold, 2
+g_gc_free_blk_threshold:
+	.space	2
+	.section	.bss.g_gc_head_data_block,"aw",%nobits
+	.align	2
+	.set	.LANCHOR173,. + 0
+	.type	g_gc_head_data_block, %object
+	.size	g_gc_head_data_block, 4
+g_gc_head_data_block:
+	.space	4
+	.section	.bss.g_gc_head_data_block_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR174,. + 0
+	.type	g_gc_head_data_block_count, %object
+	.size	g_gc_head_data_block_count, 4
+g_gc_head_data_block_count:
+	.space	4
+	.section	.bss.g_gc_merge_free_blk_threshold,"aw",%nobits
+	.align	1
+	.set	.LANCHOR177,. + 0
+	.type	g_gc_merge_free_blk_threshold, %object
+	.size	g_gc_merge_free_blk_threshold, 2
+g_gc_merge_free_blk_threshold:
+	.space	2
+	.section	.bss.g_gc_next_blk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR113,. + 0
+	.type	g_gc_next_blk, %object
+	.size	g_gc_next_blk, 2
+g_gc_next_blk:
+	.space	2
+	.section	.bss.g_gc_next_blk_1,"aw",%nobits
+	.align	1
+	.set	.LANCHOR114,. + 0
+	.type	g_gc_next_blk_1, %object
+	.size	g_gc_next_blk_1, 2
+g_gc_next_blk_1:
+	.space	2
+	.section	.bss.g_gc_next_blk_2,"aw",%nobits
+	.align	1
+	.set	.LANCHOR115,. + 0
+	.type	g_gc_next_blk_2, %object
+	.size	g_gc_next_blk_2, 2
+g_gc_next_blk_2:
+	.space	2
+	.section	.bss.g_gc_next_blk_3,"aw",%nobits
+	.align	1
+	.set	.LANCHOR116,. + 0
+	.type	g_gc_next_blk_3, %object
+	.size	g_gc_next_blk_3, 2
+g_gc_next_blk_3:
+	.space	2
+	.section	.bss.g_gc_num_req,"aw",%nobits
+	.align	2
+	.set	.LANCHOR103,. + 0
+	.type	g_gc_num_req, %object
+	.size	g_gc_num_req, 4
+g_gc_num_req:
+	.space	4
+	.section	.bss.g_gc_page_offset,"aw",%nobits
+	.align	1
+	.set	.LANCHOR111,. + 0
+	.type	g_gc_page_offset, %object
+	.size	g_gc_page_offset, 2
+g_gc_page_offset:
+	.space	2
+	.section	.bss.g_gc_refresh_block_temp_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR179,. + 0
+	.type	g_gc_refresh_block_temp_num, %object
+	.size	g_gc_refresh_block_temp_num, 2
+g_gc_refresh_block_temp_num:
+	.space	2
+	.section	.bss.g_gc_refresh_block_temp_tbl,"aw",%nobits
+	.align	1
+	.type	g_gc_refresh_block_temp_tbl, %object
+	.size	g_gc_refresh_block_temp_tbl, 34
+g_gc_refresh_block_temp_tbl:
+	.space	34
+	.section	.bss.g_gc_skip_write_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR175,. + 0
+	.type	g_gc_skip_write_count, %object
+	.size	g_gc_skip_write_count, 4
+g_gc_skip_write_count:
+	.space	4
+	.section	.bss.g_gc_superblock,"aw",%nobits
+	.align	2
+	.set	.LANCHOR204,. + 0
+	.type	g_gc_superblock, %object
+	.size	g_gc_superblock, 48
+g_gc_superblock:
+	.space	48
+	.section	.bss.g_gc_temp_superblock,"aw",%nobits
+	.align	2
+	.set	.LANCHOR94,. + 0
+	.type	g_gc_temp_superblock, %object
+	.size	g_gc_temp_superblock, 48
+g_gc_temp_superblock:
+	.space	48
+	.section	.bss.g_in_gc_progress,"aw",%nobits
+	.align	2
+	.set	.LANCHOR171,. + 0
+	.type	g_in_gc_progress, %object
+	.size	g_in_gc_progress, 4
+g_in_gc_progress:
+	.space	4
+	.section	.bss.g_in_swl_replace,"aw",%nobits
+	.align	2
+	.set	.LANCHOR172,. + 0
+	.type	g_in_swl_replace, %object
+	.size	g_in_swl_replace, 4
+g_in_swl_replace:
+	.space	4
+	.section	.bss.g_inkDie_check_enable,"aw",%nobits
+	.align	2
+	.set	.LANCHOR28,. + 0
+	.type	g_inkDie_check_enable, %object
+	.size	g_inkDie_check_enable, 4
+g_inkDie_check_enable:
+	.space	4
+	.section	.bss.g_l2p_last_update_region_id,"aw",%nobits
+	.align	1
+	.set	.LANCHOR98,. + 0
+	.type	g_l2p_last_update_region_id, %object
+	.size	g_l2p_last_update_region_id, 2
+g_l2p_last_update_region_id:
+	.space	2
+	.section	.bss.g_maxRegNum,"aw",%nobits
+	.set	.LANCHOR13,. + 0
+	.type	g_maxRegNum, %object
+	.size	g_maxRegNum, 1
+g_maxRegNum:
+	.space	1
+	.section	.bss.g_maxRetryCount,"aw",%nobits
+	.set	.LANCHOR151,. + 0
+	.type	g_maxRetryCount, %object
+	.size	g_maxRetryCount, 1
+g_maxRetryCount:
+	.space	1
+	.section	.bss.g_max_erase_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR169,. + 0
+	.type	g_max_erase_count, %object
+	.size	g_max_erase_count, 4
+g_max_erase_count:
+	.space	4
+	.section	.bss.g_min_erase_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR170,. + 0
+	.type	g_min_erase_count, %object
+	.size	g_min_erase_count, 4
+g_min_erase_count:
+	.space	4
+	.section	.bss.g_nandc_version_data,"aw",%nobits
+	.align	2
+	.set	.LANCHOR29,. + 0
+	.type	g_nandc_version_data, %object
+	.size	g_nandc_version_data, 4
+g_nandc_version_data:
+	.space	4
+	.section	.bss.g_num_data_superblocks,"aw",%nobits
+	.align	1
+	.set	.LANCHOR86,. + 0
+	.type	g_num_data_superblocks, %object
+	.size	g_num_data_superblocks, 2
+g_num_data_superblocks:
+	.space	2
+	.section	.bss.g_num_free_superblocks,"aw",%nobits
+	.align	1
+	.set	.LANCHOR89,. + 0
+	.type	g_num_free_superblocks, %object
+	.size	g_num_free_superblocks, 2
+g_num_free_superblocks:
+	.space	2
+	.section	.bss.g_page_map_check_enable,"aw",%nobits
+	.align	1
+	.set	.LANCHOR70,. + 0
+	.type	g_page_map_check_enable, %object
+	.size	g_page_map_check_enable, 2
+g_page_map_check_enable:
+	.space	2
+	.section	.bss.g_power_lost_ecc_error_blk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR235,. + 0
+	.type	g_power_lost_ecc_error_blk, %object
+	.size	g_power_lost_ecc_error_blk, 2
+g_power_lost_ecc_error_blk:
+	.space	2
+	.section	.bss.g_power_lost_recovery_flag,"aw",%nobits
+	.align	1
+	.set	.LANCHOR236,. + 0
+	.type	g_power_lost_recovery_flag, %object
+	.size	g_power_lost_recovery_flag, 2
+g_power_lost_recovery_flag:
+	.space	2
+	.section	.bss.g_recovery_page_min_ver,"aw",%nobits
+	.align	2
+	.set	.LANCHOR136,. + 0
+	.type	g_recovery_page_min_ver, %object
+	.size	g_recovery_page_min_ver, 4
+g_recovery_page_min_ver:
+	.space	4
+	.section	.bss.g_recovery_page_num,"aw",%nobits
+	.align	2
+	.set	.LANCHOR237,. + 0
+	.type	g_recovery_page_num, %object
+	.size	g_recovery_page_num, 4
+g_recovery_page_num:
+	.space	4
+	.section	.bss.g_recovery_ppa_tbl,"aw",%nobits
+	.align	2
+	.set	.LANCHOR238,. + 0
+	.type	g_recovery_ppa_tbl, %object
+	.size	g_recovery_ppa_tbl, 128
+g_recovery_ppa_tbl:
+	.space	128
+	.section	.bss.g_req_cache,"aw",%nobits
+	.align	2
+	.set	.LANCHOR132,. + 0
+	.type	g_req_cache, %object
+	.size	g_req_cache, 4
+g_req_cache:
+	.space	4
+	.section	.bss.g_retryMode,"aw",%nobits
+	.set	.LANCHOR10,. + 0
+	.type	g_retryMode, %object
+	.size	g_retryMode, 1
+g_retryMode:
+	.space	1
+	.section	.bss.g_slc2KBNand,"aw",%nobits
+	.set	.LANCHOR1,. + 0
+	.type	g_slc2KBNand, %object
+	.size	g_slc2KBNand, 1
+g_slc2KBNand:
+	.space	1
+	.section	.bss.g_sys_ext_data,"aw",%nobits
+	.align	2
+	.set	.LANCHOR138,. + 0
+	.type	g_sys_ext_data, %object
+	.size	g_sys_ext_data, 512
+g_sys_ext_data:
+	.space	512
+	.section	.bss.g_sys_save_data,"aw",%nobits
+	.align	2
+	.set	.LANCHOR81,. + 0
+	.type	g_sys_save_data, %object
+	.size	g_sys_save_data, 48
+g_sys_save_data:
+	.space	48
+	.section	.bss.g_tmp_data_superblock_id,"aw",%nobits
+	.align	1
+	.set	.LANCHOR133,. + 0
+	.type	g_tmp_data_superblock_id, %object
+	.size	g_tmp_data_superblock_id, 2
+g_tmp_data_superblock_id:
+	.space	2
+	.section	.bss.g_totle_avg_erase_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR205,. + 0
+	.type	g_totle_avg_erase_count, %object
+	.size	g_totle_avg_erase_count, 4
+g_totle_avg_erase_count:
+	.space	4
+	.section	.bss.g_totle_cache_write_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR164,. + 0
+	.type	g_totle_cache_write_count, %object
+	.size	g_totle_cache_write_count, 4
+g_totle_cache_write_count:
+	.space	4
+	.section	.bss.g_totle_discard_page_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR163,. + 0
+	.type	g_totle_discard_page_count, %object
+	.size	g_totle_discard_page_count, 4
+g_totle_discard_page_count:
+	.space	4
+	.section	.bss.g_totle_gc_page_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR161,. + 0
+	.type	g_totle_gc_page_count, %object
+	.size	g_totle_gc_page_count, 4
+g_totle_gc_page_count:
+	.space	4
+	.section	.bss.g_totle_l2p_write_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR165,. + 0
+	.type	g_totle_l2p_write_count, %object
+	.size	g_totle_l2p_write_count, 4
+g_totle_l2p_write_count:
+	.space	4
+	.section	.bss.g_totle_map_block,"aw",%nobits
+	.align	1
+	.set	.LANCHOR128,. + 0
+	.type	g_totle_map_block, %object
+	.size	g_totle_map_block, 2
+g_totle_map_block:
+	.space	2
+	.section	.bss.g_totle_mlc_erase_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR167,. + 0
+	.type	g_totle_mlc_erase_count, %object
+	.size	g_totle_mlc_erase_count, 4
+g_totle_mlc_erase_count:
+	.space	4
+	.section	.bss.g_totle_read_page_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR166,. + 0
+	.type	g_totle_read_page_count, %object
+	.size	g_totle_read_page_count, 4
+g_totle_read_page_count:
+	.space	4
+	.section	.bss.g_totle_read_sector,"aw",%nobits
+	.align	2
+	.set	.LANCHOR217,. + 0
+	.type	g_totle_read_sector, %object
+	.size	g_totle_read_sector, 4
+g_totle_read_sector:
+	.space	4
+	.section	.bss.g_totle_slc_erase_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR168,. + 0
+	.type	g_totle_slc_erase_count, %object
+	.size	g_totle_slc_erase_count, 4
+g_totle_slc_erase_count:
+	.space	4
+	.section	.bss.g_totle_swl_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR134,. + 0
+	.type	g_totle_swl_count, %object
+	.size	g_totle_swl_count, 4
+g_totle_swl_count:
+	.space	4
+	.section	.bss.g_totle_sys_slc_erase_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR80,. + 0
+	.type	g_totle_sys_slc_erase_count, %object
+	.size	g_totle_sys_slc_erase_count, 4
+g_totle_sys_slc_erase_count:
+	.space	4
+	.section	.bss.g_totle_vendor_block,"aw",%nobits
+	.align	1
+	.set	.LANCHOR71,. + 0
+	.type	g_totle_vendor_block, %object
+	.size	g_totle_vendor_block, 2
+g_totle_vendor_block:
+	.space	2
+	.section	.bss.g_totle_write_page_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR162,. + 0
+	.type	g_totle_write_page_count, %object
+	.size	g_totle_write_page_count, 4
+g_totle_write_page_count:
+	.space	4
+	.section	.bss.g_totle_write_sector,"aw",%nobits
+	.align	2
+	.set	.LANCHOR216,. + 0
+	.type	g_totle_write_sector, %object
+	.size	g_totle_write_sector, 4
+g_totle_write_sector:
+	.space	4
+	.section	.bss.gc_discard_updated,"aw",%nobits
+	.align	2
+	.set	.LANCHOR232,. + 0
+	.type	gc_discard_updated, %object
+	.size	gc_discard_updated, 4
+gc_discard_updated:
+	.space	4
+	.section	.bss.gc_ink_free_return_value,"aw",%nobits
+	.align	1
+	.set	.LANCHOR240,. + 0
+	.type	gc_ink_free_return_value, %object
+	.size	gc_ink_free_return_value, 2
+gc_ink_free_return_value:
+	.space	2
+	.section	.bss.gpFlashSaveInfo,"aw",%nobits
+	.align	2
+	.set	.LANCHOR146,. + 0
+	.type	gpFlashSaveInfo, %object
+	.size	gpFlashSaveInfo, 4
+gpFlashSaveInfo:
+	.space	4
+	.section	.bss.gpNandParaInfo,"aw",%nobits
+	.align	2
+	.set	.LANCHOR18,. + 0
+	.type	gpNandParaInfo, %object
+	.size	gpNandParaInfo, 4
+gpNandParaInfo:
+	.space	4
+	.section	.bss.gpNandc,"aw",%nobits
+	.align	2
+	.set	.LANCHOR19,. + 0
+	.type	gpNandc, %object
+	.size	gpNandc, 4
+gpNandc:
+	.space	4
+	.section	.bss.gpNandc1,"aw",%nobits
+	.align	2
+	.type	gpNandc1, %object
+	.size	gpNandc1, 4
+gpNandc1:
+	.space	4
+	.section	.bss.gpReadRetrial,"aw",%nobits
+	.align	2
+	.set	.LANCHOR145,. + 0
+	.type	gpReadRetrial, %object
+	.size	gpReadRetrial, 4
+gpReadRetrial:
+	.space	4
+	.section	.bss.gp_ect_tbl_info,"aw",%nobits
+	.align	2
+	.set	.LANCHOR191,. + 0
+	.type	gp_ect_tbl_info, %object
+	.size	gp_ect_tbl_info, 4
+gp_ect_tbl_info:
+	.space	4
+	.section	.bss.gp_flash_check_buf,"aw",%nobits
+	.align	2
+	.type	gp_flash_check_buf, %object
+	.size	gp_flash_check_buf, 262144
+gp_flash_check_buf:
+	.space	262144
+	.section	.bss.gp_gc_page_buf_info,"aw",%nobits
+	.align	2
+	.set	.LANCHOR104,. + 0
+	.type	gp_gc_page_buf_info, %object
+	.size	gp_gc_page_buf_info, 4
+gp_gc_page_buf_info:
+	.space	4
+	.section	.bss.gp_last_act_superblock,"aw",%nobits
+	.align	2
+	.set	.LANCHOR230,. + 0
+	.type	gp_last_act_superblock, %object
+	.size	gp_last_act_superblock, 4
+gp_last_act_superblock:
+	.space	4
+	.section	.bss.idb_buf,"aw",%nobits
+	.align	2
+	.type	idb_buf, %object
+	.size	idb_buf, 262144
+idb_buf:
+	.space	262144
+	.section	.bss.idb_need_write_back,"aw",%nobits
+	.align	2
+	.set	.LANCHOR154,. + 0
+	.type	idb_need_write_back, %object
+	.size	idb_need_write_back, 4
+idb_need_write_back:
+	.space	4
+	.section	.bss.mlcPageToSlcPageTbl,"aw",%nobits
+	.align	2
+	.set	.LANCHOR120,. + 0
+	.type	mlcPageToSlcPageTbl, %object
+	.size	mlcPageToSlcPageTbl, 1024
+mlcPageToSlcPageTbl:
+	.space	1024
+	.section	.bss.p_blk_mode_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR0,. + 0
+	.type	p_blk_mode_table, %object
+	.size	p_blk_mode_table, 4
+p_blk_mode_table:
+	.space	4
+	.section	.bss.p_data_block_list_head,"aw",%nobits
+	.align	2
+	.set	.LANCHOR83,. + 0
+	.type	p_data_block_list_head, %object
+	.size	p_data_block_list_head, 4
+p_data_block_list_head:
+	.space	4
+	.section	.bss.p_data_block_list_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR82,. + 0
+	.type	p_data_block_list_table, %object
+	.size	p_data_block_list_table, 4
+p_data_block_list_table:
+	.space	4
+	.section	.bss.p_data_block_list_tail,"aw",%nobits
+	.align	2
+	.set	.LANCHOR85,. + 0
+	.type	p_data_block_list_tail, %object
+	.size	p_data_block_list_tail, 4
+p_data_block_list_tail:
+	.space	4
+	.section	.bss.p_erase_count_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR79,. + 0
+	.type	p_erase_count_table, %object
+	.size	p_erase_count_table, 4
+p_erase_count_table:
+	.space	4
+	.section	.bss.p_free_data_block_list_head,"aw",%nobits
+	.align	2
+	.set	.LANCHOR88,. + 0
+	.type	p_free_data_block_list_head, %object
+	.size	p_free_data_block_list_head, 4
+p_free_data_block_list_head:
+	.space	4
+	.section	.bss.p_gc_blk_tbl,"aw",%nobits
+	.align	2
+	.set	.LANCHOR109,. + 0
+	.type	p_gc_blk_tbl, %object
+	.size	p_gc_blk_tbl, 4
+p_gc_blk_tbl:
+	.space	4
+	.section	.bss.p_gc_data_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR105,. + 0
+	.type	p_gc_data_buf, %object
+	.size	p_gc_data_buf, 4
+p_gc_data_buf:
+	.space	4
+	.section	.bss.p_gc_page_info,"aw",%nobits
+	.align	2
+	.set	.LANCHOR112,. + 0
+	.type	p_gc_page_info, %object
+	.size	p_gc_page_info, 4
+p_gc_page_info:
+	.space	4
+	.section	.bss.p_gc_spare_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR106,. + 0
+	.type	p_gc_spare_buf, %object
+	.size	p_gc_spare_buf, 4
+p_gc_spare_buf:
+	.space	4
+	.section	.bss.p_io_data_buf_0,"aw",%nobits
+	.align	2
+	.set	.LANCHOR186,. + 0
+	.type	p_io_data_buf_0, %object
+	.size	p_io_data_buf_0, 4
+p_io_data_buf_0:
+	.space	4
+	.section	.bss.p_io_data_buf_1,"aw",%nobits
+	.align	2
+	.set	.LANCHOR187,. + 0
+	.type	p_io_data_buf_1, %object
+	.size	p_io_data_buf_1, 4
+p_io_data_buf_1:
+	.space	4
+	.section	.bss.p_io_spare_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR189,. + 0
+	.type	p_io_spare_buf, %object
+	.size	p_io_spare_buf, 4
+p_io_spare_buf:
+	.space	4
+	.section	.bss.p_l2p_map_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR126,. + 0
+	.type	p_l2p_map_buf, %object
+	.size	p_l2p_map_buf, 4
+p_l2p_map_buf:
+	.space	4
+	.section	.bss.p_l2p_ram_map,"aw",%nobits
+	.align	2
+	.set	.LANCHOR97,. + 0
+	.type	p_l2p_ram_map, %object
+	.size	p_l2p_ram_map, 4
+p_l2p_ram_map:
+	.space	4
+	.section	.bss.p_map_block_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR129,. + 0
+	.type	p_map_block_table, %object
+	.size	p_map_block_table, 4
+p_map_block_table:
+	.space	4
+	.section	.bss.p_map_block_valid_page_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR125,. + 0
+	.type	p_map_block_valid_page_count, %object
+	.size	p_map_block_valid_page_count, 4
+p_map_block_valid_page_count:
+	.space	4
+	.section	.bss.p_map_block_ver_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR130,. + 0
+	.type	p_map_block_ver_table, %object
+	.size	p_map_block_ver_table, 4
+p_map_block_ver_table:
+	.space	4
+	.section	.bss.p_map_region_ppn_check_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR195,. + 0
+	.type	p_map_region_ppn_check_table, %object
+	.size	p_map_region_ppn_check_table, 4
+p_map_region_ppn_check_table:
+	.space	4
+	.section	.bss.p_map_region_ppn_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR131,. + 0
+	.type	p_map_region_ppn_table, %object
+	.size	p_map_region_ppn_table, 4
+p_map_region_ppn_table:
+	.space	4
+	.section	.bss.p_plane_order_table,"aw",%nobits
+	.set	.LANCHOR47,. + 0
+	.type	p_plane_order_table, %object
+	.size	p_plane_order_table, 32
+p_plane_order_table:
+	.space	32
+	.section	.bss.p_swl_mul_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR137,. + 0
+	.type	p_swl_mul_table, %object
+	.size	p_swl_mul_table, 4
+p_swl_mul_table:
+	.space	4
+	.section	.bss.p_sys_data_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR183,. + 0
+	.type	p_sys_data_buf, %object
+	.size	p_sys_data_buf, 4
+p_sys_data_buf:
+	.space	4
+	.section	.bss.p_sys_data_buf_1,"aw",%nobits
+	.align	2
+	.set	.LANCHOR184,. + 0
+	.type	p_sys_data_buf_1, %object
+	.size	p_sys_data_buf_1, 4
+p_sys_data_buf_1:
+	.space	4
+	.section	.bss.p_sys_spare_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR188,. + 0
+	.type	p_sys_spare_buf, %object
+	.size	p_sys_spare_buf, 4
+p_sys_spare_buf:
+	.space	4
+	.section	.bss.p_valid_page_count_check_table,"aw",%nobits
+	.align	2
+	.type	p_valid_page_count_check_table, %object
+	.size	p_valid_page_count_check_table, 4
+p_valid_page_count_check_table:
+	.space	4
+	.section	.bss.p_valid_page_count_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR84,. + 0
+	.type	p_valid_page_count_table, %object
+	.size	p_valid_page_count_table, 4
+p_valid_page_count_table:
+	.space	4
+	.section	.bss.p_vendor_block_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR72,. + 0
+	.type	p_vendor_block_table, %object
+	.size	p_vendor_block_table, 4
+p_vendor_block_table:
+	.space	4
+	.section	.bss.p_vendor_block_valid_page_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR192,. + 0
+	.type	p_vendor_block_valid_page_count, %object
+	.size	p_vendor_block_valid_page_count, 4
+p_vendor_block_valid_page_count:
+	.space	4
+	.section	.bss.p_vendor_block_ver_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR193,. + 0
+	.type	p_vendor_block_ver_table, %object
+	.size	p_vendor_block_ver_table, 4
+p_vendor_block_ver_table:
+	.space	4
+	.section	.bss.p_vendor_data_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR185,. + 0
+	.type	p_vendor_data_buf, %object
+	.size	p_vendor_data_buf, 4
+p_vendor_data_buf:
+	.space	4
+	.section	.bss.p_vendor_region_ppn_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR194,. + 0
+	.type	p_vendor_region_ppn_table, %object
+	.size	p_vendor_region_ppn_table, 4
+p_vendor_region_ppn_table:
+	.space	4
+	.section	.bss.read_retry_cur_offset,"aw",%nobits
+	.set	.LANCHOR21,. + 0
+	.type	read_retry_cur_offset, %object
+	.size	read_retry_cur_offset, 4
+read_retry_cur_offset:
+	.space	4
+	.section	.bss.req_erase,"aw",%nobits
+	.align	2
+	.set	.LANCHOR78,. + 0
+	.type	req_erase, %object
+	.size	req_erase, 4
+req_erase:
+	.space	4
+	.section	.bss.req_gc,"aw",%nobits
+	.align	2
+	.set	.LANCHOR107,. + 0
+	.type	req_gc, %object
+	.size	req_gc, 4
+req_gc:
+	.space	4
+	.section	.bss.req_gc_dst,"aw",%nobits
+	.align	2
+	.set	.LANCHOR181,. + 0
+	.type	req_gc_dst, %object
+	.size	req_gc_dst, 4
+req_gc_dst:
+	.space	4
+	.section	.bss.req_prgm,"aw",%nobits
+	.align	2
+	.set	.LANCHOR182,. + 0
+	.type	req_prgm, %object
+	.size	req_prgm, 4
+req_prgm:
+	.space	4
+	.section	.bss.req_read,"aw",%nobits
+	.align	2
+	.set	.LANCHOR180,. + 0
+	.type	req_read, %object
+	.size	req_read, 4
+req_read:
+	.space	4
+	.section	.bss.req_sys,"aw",%nobits
+	.align	2
+	.set	.LANCHOR202,. + 0
+	.type	req_sys, %object
+	.size	req_sys, 36
+req_sys:
+	.space	36
+	.section	.bss.slcPageToMlcPageTbl,"aw",%nobits
+	.align	2
+	.set	.LANCHOR16,. + 0
+	.type	slcPageToMlcPageTbl, %object
+	.size	slcPageToMlcPageTbl, 512
+slcPageToMlcPageTbl:
+	.space	512
+	.section	.data.FtlMallocOffset,"aw",%progbits
+	.align	2
+	.type	FtlMallocOffset, %object
+	.size	FtlMallocOffset, 4
+FtlMallocOffset:
+	.word	64
+	.section	.data.LastWritenPbaAddr,"aw",%progbits
+	.align	2
+	.type	LastWritenPbaAddr, %object
+	.size	LastWritenPbaAddr, 4
+LastWritenPbaAddr:
+	.word	-1
+	.section	.data.NandFlashParaTbl,"aw",%progbits
+	.align	1
+	.set	.LANCHOR142,. + 0
+	.type	NandFlashParaTbl, %object
+	.size	NandFlashParaTbl, 2464
+NandFlashParaTbl:
+	.byte	6
+	.byte	44
+	.byte	100
+	.byte	68
+	.byte	75
+	.byte	-87
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-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -68
-	.byte	0x6
+	.byte	4
+	.byte	1
+	.byte	16
+	.short	256
+	.byte	2
+	.byte	2
+	.short	2048
+	.short	479
+	.byte	3
+	.byte	17
+	.byte	40
+	.byte	32
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-	.uleb128 0x2
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-	.sleb128 0
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+	.byte	2
+	.byte	2
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-	.4byte	.LLST784
-	.uleb128 0x74
-	.4byte	0xac5f
-	.uleb128 0x90
-	.4byte	0xac69
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -68
-	.uleb128 0x73
-	.4byte	0xac75
-	.4byte	.LLST785
-	.uleb128 0x6b
-	.4byte	.Ldebug_ranges0+0x6a0
-	.4byte	0x1021c
-	.uleb128 0x4f
-	.4byte	0xac2f
-	.4byte	.LLST786
-	.uleb128 0x4f
-	.4byte	0xac23
-	.4byte	.LLST787
-	.uleb128 0x4f
-	.4byte	0xac17
-	.4byte	.LLST788
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x6a0
-	.uleb128 0x74
-	.4byte	0x1015f
-	.uleb128 0x74
-	.4byte	0x10168
-	.uleb128 0x74
-	.4byte	0x10171
-	.uleb128 0x73
-	.4byte	0x1017a
-	.4byte	.LLST789
-	.uleb128 0x74
-	.4byte	0x1017f
-	.uleb128 0x74
-	.4byte	0x10189
-	.uleb128 0x44
-	.4byte	.LVL3122
-	.4byte	0x52a5
-	.4byte	0x101f7
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
+	.byte	4
+	.byte	1
+	.byte	16
+	.short	256
+	.byte	2
+	.byte	2
+	.short	2048
+	.short	287
+	.byte	1
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL3123
-	.4byte	0x4d68
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC58
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x34
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x34
+	.byte	24
+	.byte	32
+	.byte	1
 	.byte	0
+	.byte	1
 	.byte	0
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL3116
-	.4byte	0xb17b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -68
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
 	.byte	0
+	.space	4
+	.byte	6
+	.byte	44
+	.byte	-88
+	.byte	5
+	.byte	-53
+	.byte	-87
 	.byte	0
-	.uleb128 0x8e
-	.4byte	0x8a0f
-	.4byte	.LFB324
-	.4byte	.LFE324-.LFB324
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x103ff
-	.uleb128 0x74
-	.4byte	0x8a20
-	.uleb128 0x74
-	.4byte	0x8a2c
-	.uleb128 0x74
-	.4byte	0x8a38
-	.uleb128 0x74
-	.4byte	0x8a44
-	.uleb128 0x7a
-	.4byte	.LBB557
-	.4byte	.LBE557-.LBB557
-	.uleb128 0x73
-	.4byte	0x1024c
-	.4byte	.LLST794
-	.uleb128 0x73
-	.4byte	0x10251
-	.4byte	.LLST795
-	.uleb128 0x73
-	.4byte	0x10256
-	.4byte	.LLST796
-	.uleb128 0x73
-	.4byte	0x1025b
-	.4byte	.LLST797
-	.uleb128 0x95
-	.4byte	0x8a50
-	.uleb128 0x48
-	.4byte	.LVL3144
-	.4byte	0x8bc4
-	.uleb128 0x48
-	.4byte	.LVL3145
-	.4byte	0x8bf8
-	.uleb128 0x44
-	.4byte	.LVL3148
-	.4byte	0x8d5f
-	.4byte	0x102b9
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
+	.byte	4
+	.byte	2
+	.byte	16
+	.short	256
+	.byte	2
+	.byte	2
+	.short	2048
+	.short	287
+	.byte	1
 	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3149
-	.4byte	0xd1ee
-	.4byte	0x102cd
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
+	.byte	24
+	.byte	32
+	.byte	1
 	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3150
-	.4byte	0x8dc2
-	.4byte	0x102e1
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
+	.byte	1
 	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3156
-	.4byte	0xb17b
-	.4byte	0x102ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
 	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL3157
-	.4byte	0x52a5
-	.uleb128 0x44
-	.4byte	.LVL3159
-	.4byte	0x8dc2
-	.4byte	0x1031c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
 	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3161
-	.4byte	0xab78
-	.4byte	0x10330
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
+	.space	4
+	.byte	6
+	.byte	44
+	.byte	104
+	.byte	4
+	.byte	70
+	.byte	-119
 	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL3162
-	.4byte	0x8cb3
-	.uleb128 0x48
-	.4byte	.LVL3164
-	.4byte	0x8d5f
-	.uleb128 0x44
-	.4byte	.LVL3165
-	.4byte	0x530b
-	.4byte	0x1035a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x40
+	.byte	4
+	.byte	1
+	.byte	8
+	.short	256
+	.byte	2
+	.byte	2
+	.short	2048
+	.short	287
+	.byte	1
 	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL3167
-	.4byte	0x52a5
-	.uleb128 0x44
-	.4byte	.LVL3168
-	.4byte	0xac82
-	.4byte	0x10381
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
+	.byte	24
+	.byte	32
+	.byte	1
 	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3169
-	.4byte	0xae0d
-	.4byte	0x103a4
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x31
+	.byte	1
 	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3170
-	.4byte	0x8dc2
-	.4byte	0x103b8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
 	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL3172
-	.4byte	0x8dc2
-	.uleb128 0x44
-	.4byte	.LVL3175
-	.4byte	0xac82
-	.4byte	0x103d9
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x32
 	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL3176
-	.4byte	0x8dc2
-	.uleb128 0x48
-	.4byte	.LVL3177
-	.4byte	0x8dc2
-	.uleb128 0x48
-	.4byte	.LVL3178
-	.4byte	0x8c64
-	.uleb128 0x48
-	.4byte	.LVL3180
-	.4byte	0x8c64
+	.space	4
+	.byte	6
+	.byte	44
+	.byte	72
+	.byte	4
+	.byte	74
+	.byte	-91
 	.byte	0
+	.byte	4
+	.byte	1
+	.byte	8
+	.short	256
+	.byte	2
+	.byte	2
+	.short	1024
+	.short	287
+	.byte	1
 	.byte	0
-	.uleb128 0x98
-	.4byte	.LASF1570
-	.4byte	.LASF1570
-	.byte	0x2a
-	.byte	0x12
-	.uleb128 0x98
-	.4byte	.LASF1571
-	.4byte	.LASF1571
-	.byte	0x21
-	.byte	0xfe
-	.uleb128 0x98
-	.4byte	.LASF1572
-	.4byte	.LASF1572
-	.byte	0x21
-	.byte	0xff
-	.uleb128 0x99
-	.4byte	.LASF1573
-	.4byte	.LASF1573
-	.byte	0x23
-	.2byte	0x16c
-	.uleb128 0x99
-	.4byte	.LASF1008
-	.4byte	.LASF1008
-	.byte	0x23
-	.2byte	0x399
-	.uleb128 0x98
-	.4byte	.LASF1574
-	.4byte	.LASF1574
-	.byte	0x8
-	.byte	0x35
-	.uleb128 0x98
-	.4byte	.LASF1575
-	.4byte	.LASF1575
-	.byte	0x12
-	.byte	0x72
-	.uleb128 0x99
-	.4byte	.LASF1576
-	.4byte	.LASF1576
-	.byte	0x23
-	.2byte	0x16d
-	.uleb128 0x99
-	.4byte	.LASF1577
-	.4byte	.LASF1577
-	.byte	0xd
-	.2byte	0x244
-	.uleb128 0x98
-	.4byte	.LASF1578
-	.4byte	.LASF1578
-	.byte	0x2b
-	.byte	0xb
+	.byte	24
+	.byte	32
+	.byte	1
 	.byte	0
-	.section	.debug_abbrev,"",%progbits
-.Ldebug_abbrev0:
-	.uleb128 0x1
-	.uleb128 0x11
-	.byte	0x1
-	.uleb128 0x25
-	.uleb128 0xe
-	.uleb128 0x13
-	.uleb128 0xb
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x1b
-	.uleb128 0xe
-	.uleb128 0x55
-	.uleb128 0x17
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x10
-	.uleb128 0x17
+	.byte	1
 	.byte	0
 	.byte	0
-	.uleb128 0x2
-	.uleb128 0x24
 	.byte	0
-	.uleb128 0xb
-	.uleb128 0xb
-	.uleb128 0x3e
-	.uleb128 0xb
-	.uleb128 0x3
-	.uleb128 0xe
+	.space	4
+	.byte	6
+	.byte	44
+	.byte	-124
+	.byte	100
+	.byte	60
+	.byte	-91
 	.byte	0
+	.byte	4
+	.byte	1
+	.byte	32
+	.short	512
+	.byte	2
+	.byte	2
+	.short	1024
+	.short	479
+	.byte	3
+	.byte	17
+	.byte	40
+	.byte	32
+	.byte	1
 	.byte	0
-	.uleb128 0x3
-	.uleb128 0x16
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-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4
-	.uleb128 0x26
+	.space	4
+	.byte	5
+	.byte	44
+	.byte	-124
+	.byte	100
+	.byte	84
+	.byte	-87
 	.byte	0
-	.uleb128 0x49
-	.uleb128 0x13
+	.byte	4
+	.byte	1
+	.byte	32
+	.short	512
+	.byte	2
+	.byte	2
+	.short	1024
+	.short	479
+	.byte	4
+	.byte	18
+	.byte	60
+	.byte	32
+	.byte	1
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+	.byte	1
 	.byte	0
-	.uleb128 0x5
-	.uleb128 0x24
 	.byte	0
-	.uleb128 0xb
-	.uleb128 0xb
-	.uleb128 0x3e
-	.uleb128 0xb
-	.uleb128 0x3
-	.uleb128 0x8
 	.byte	0
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+	.byte	6
+	.byte	44
+	.byte	-41
+	.byte	-108
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 	.byte	0
-	.uleb128 0x6
-	.uleb128 0x1
-	.byte	0x1
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x1
-	.uleb128 0x13
+	.byte	4
+	.byte	1
+	.byte	8
+	.short	128
+	.byte	2
+	.byte	2
+	.short	4096
+	.short	279
+	.byte	1
 	.byte	0
+	.byte	24
+	.byte	32
+	.byte	1
 	.byte	0
-	.uleb128 0x7
-	.uleb128 0x21
+	.byte	1
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x8
-	.uleb128 0x34
+	.space	4
+	.byte	6
+	.byte	44
+	.byte	72
+	.byte	4
+	.byte	70
+	.byte	-123
 	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x3f
-	.uleb128 0x19
-	.uleb128 0x3c
-	.uleb128 0x19
+	.byte	4
+	.byte	1
+	.byte	8
+	.short	256
+	.byte	2
+	.byte	2
+	.short	1024
+	.short	287
+	.byte	1
 	.byte	0
+	.byte	24
+	.byte	32
+	.byte	1
 	.byte	0
-	.uleb128 0x9
-	.uleb128 0x13
-	.byte	0x1
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0xb
-	.uleb128 0xb
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x1
-	.uleb128 0x13
+	.byte	1
 	.byte	0
 	.byte	0
-	.uleb128 0xa
-	.uleb128 0xd
 	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x38
-	.uleb128 0xb
+	.space	4
+	.byte	6
+	.byte	44
+	.byte	-120
+	.byte	5
+	.byte	-58
+	.byte	-119
 	.byte	0
+	.byte	4
+	.byte	2
+	.byte	8
+	.short	256
+	.byte	2
+	.byte	2
+	.short	2048
+	.short	287
+	.byte	1
 	.byte	0
-	.uleb128 0xb
-	.uleb128 0xd
+	.byte	24
+	.byte	32
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-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x38
-	.uleb128 0xb
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 	.byte	0
-	.uleb128 0xc
-	.uleb128 0xf
 	.byte	0
-	.uleb128 0xb
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
+	.space	4
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+	.byte	36
+	.byte	75
+	.byte	-87
 	.byte	0
+	.byte	4
+	.byte	1
+	.byte	16
+	.short	256
+	.byte	2
+	.byte	2
+	.short	2048
+	.short	287
+	.byte	1
 	.byte	0
-	.uleb128 0xd
-	.uleb128 0x21
+	.byte	24
+	.byte	32
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 	.byte	0
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x2f
-	.uleb128 0xb
+	.byte	1
 	.byte	0
 	.byte	0
-	.uleb128 0xe
-	.uleb128 0x13
-	.byte	0x1
-	.uleb128 0xb
-	.uleb128 0x5
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x1
-	.uleb128 0x13
 	.byte	0
+	.space	4
+	.byte	6
+	.byte	44
+	.byte	104
 	.byte	0
-	.uleb128 0xf
-	.uleb128 0xd
+	.byte	39
+	.byte	-87
 	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x38
-	.uleb128 0x5
+	.byte	4
+	.byte	1
+	.byte	16
+	.short	128
+	.byte	1
+	.byte	2
+	.short	2048
+	.short	287
 	.byte	0
 	.byte	0
-	.uleb128 0x10
-	.uleb128 0x13
-	.byte	0x1
-	.uleb128 0xb
-	.uleb128 0xb
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x1
-	.uleb128 0x13
+	.byte	24
+	.byte	32
+	.byte	1
 	.byte	0
+	.byte	1
 	.byte	0
-	.uleb128 0x11
-	.uleb128 0x17
-	.byte	0x1
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0xb
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+	.section	.data.ftl_gc_temp_block_bops_scan_page_addr,"aw",%progbits
+	.align	1
+	.set	.LANCHOR226,. + 0
+	.type	ftl_gc_temp_block_bops_scan_page_addr, %object
+	.size	ftl_gc_temp_block_bops_scan_page_addr, 2
+ftl_gc_temp_block_bops_scan_page_addr:
+	.short	-1
+	.section	.data.gFtlInitStatus,"aw",%progbits
+	.align	2
+	.set	.LANCHOR231,. + 0
+	.type	gFtlInitStatus, %object
+	.size	gFtlInitStatus, 4
+gFtlInitStatus:
+	.word	-1
+	.section	.data.gNandParaInfo,"aw",%progbits
+	.align	1
+	.set	.LANCHOR31,. + 0
+	.type	gNandParaInfo, %object
+	.size	gNandParaInfo, 32
+gNandParaInfo:
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-	.uleb128 0x34
+	.space	5
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-	.uleb128 0x1c
-	.uleb128 0xb
+	.byte	1
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+	.byte	1
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+	.byte	32
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-	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x93
-	.uleb128 0x410a
+	.space	4
+	.section	.data.gSlcNandParaInfo,"aw",%progbits
+	.align	1
+	.set	.LANCHOR200,. + 0
+	.type	gSlcNandParaInfo, %object
+	.size	gSlcNandParaInfo, 32
+gSlcNandParaInfo:
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+	.byte	-15
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-	.uleb128 0x1
+	.byte	1
+	.byte	1
+	.byte	4
+	.short	64
+	.byte	1
+	.byte	1
+	.short	1024
+	.short	256
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 	.byte	0
+	.space	4
+	.section	.data.power_up_flag,"aw",%progbits
+	.align	2
+	.type	power_up_flag, %object
+	.size	power_up_flag, 4
+power_up_flag:
+	.word	1
+	.section	.data.random_seed,"aw",%progbits
+	.align	1
+	.set	.LANCHOR4,. + 0
+	.type	random_seed, %object
+	.size	random_seed, 256
+random_seed:
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+	.section	.data.refValueDefault,"aw",%progbits
+	.set	.LANCHOR196,. + 0
+	.type	refValueDefault, %object
+	.size	refValueDefault, 28
+refValueDefault:
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+	.byte	6
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-	.byte	0x50
-	.4byte	.LVL1385-1
-	.4byte	.LFE486
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST423:
-	.4byte	.LVL1305
-	.4byte	.LVL1306-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1306-1
-	.4byte	.LFE485
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST419:
-	.4byte	.LVL1301
-	.4byte	.LVL1302-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1302-1
-	.4byte	.LFE483
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST420:
-	.4byte	.LVL1301
-	.4byte	.LVL1302-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1302-1
-	.4byte	.LFE483
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST421:
-	.4byte	.LVL1301
-	.4byte	.LVL1302-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1302-1
-	.4byte	.LFE483
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST310:
-	.4byte	.LVL914
-	.4byte	.LVL915
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL915
-	.4byte	.LFE482
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST304:
-	.4byte	.LVL899
-	.4byte	.LVL900-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL900-1
-	.4byte	.LFE481
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST305:
-	.4byte	.LVL899
-	.4byte	.LVL900-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL900-1
-	.4byte	.LFE481
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST306:
-	.4byte	.LVL899
-	.4byte	.LVL900-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL900-1
-	.4byte	.LFE481
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST276:
-	.4byte	.LVL743
-	.4byte	.LVL744-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL744-1
-	.4byte	.LFE480
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST277:
-	.4byte	.LVL743
-	.4byte	.LVL744-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL744-1
-	.4byte	.LFE480
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST278:
-	.4byte	.LVL743
-	.4byte	.LVL744-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL744-1
-	.4byte	.LFE480
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST273:
-	.4byte	.LVL730
-	.4byte	.LVL731-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL731-1
-	.4byte	.LFE404
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST274:
-	.4byte	.LVL734
-	.4byte	.LVL736
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL736
-	.4byte	.LVL737
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL737
-	.4byte	.LVL738
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL738
-	.4byte	.LVL739
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL739
-	.4byte	.LVL740
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST275:
-	.4byte	.LVL732
-	.4byte	.LVL735
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST272:
-	.4byte	.LVL727
-	.4byte	.LVL728
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL728
-	.4byte	.LVL729
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL729
-	.4byte	.LFE403
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST706:
-	.4byte	.LVL2708
-	.4byte	.LVL2710-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2710-1
-	.4byte	.LVL2711
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL2711
-	.4byte	.LVL2713
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2713
-	.4byte	.LFE398
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST707:
-	.4byte	.LVL2708
-	.4byte	.LVL2710-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2710-1
-	.4byte	.LVL2711
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	.LVL2711
-	.4byte	.LVL2713
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2713
-	.4byte	.LFE398
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST708:
-	.4byte	.LVL2722
-	.4byte	.LVL2723
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2723
-	.4byte	.LVL2724
-	.2byte	0x5
-	.byte	0x91
-	.sleb128 -52
-	.byte	0x6
-	.byte	0x32
-	.byte	0x1c
-	.4byte	0
-	.4byte	0
-.LLST709:
-	.4byte	.LVL2716
-	.4byte	.LVL2717
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2717
-	.4byte	.LVL2725
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2726
-	.4byte	.LVL2735
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2738
-	.4byte	.LFE398
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST710:
-	.4byte	.LVL2718
-	.4byte	.LVL2721
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2729
-	.4byte	.LVL2732
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2740
-	.4byte	.LFE398
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST711:
-	.4byte	.LVL2716
-	.4byte	.LVL2717
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2717
-	.4byte	.LVL2718-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2721
-	.4byte	.LVL2727
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2727
-	.4byte	.LVL2728
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST712:
-	.4byte	.LVL2715
-	.4byte	.LVL2718
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2720
-	.4byte	.LVL2729
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2731
-	.4byte	.LVL2736
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2738
-	.4byte	.LVL2739
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2741
-	.4byte	.LVL2742
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST713:
-	.4byte	.LVL2709
-	.4byte	.LVL2719
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2720
-	.4byte	.LVL2746
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2748
-	.4byte	.LFE398
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST714:
-	.4byte	.LVL2730
-	.4byte	.LVL2731-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2731-1
-	.4byte	.LVL2735
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -52
-	.4byte	.LVL2738
-	.4byte	.LVL2740-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2740-1
-	.4byte	.LVL2741
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -52
-	.4byte	.LVL2741
-	.4byte	.LVL2743
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2743
-	.4byte	.LFE398
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -52
-	.4byte	0
-	.4byte	0
-.LLST715:
-	.4byte	.LVL2708
-	.4byte	.LVL2714
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST716:
-	.4byte	.LVL2708
-	.4byte	.LVL2714
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST717:
-	.4byte	.LVL2733
-	.4byte	.LVL2734
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2734
-	.4byte	.LVL2735
-	.2byte	0x5
-	.byte	0x91
-	.sleb128 -44
-	.byte	0x6
-	.byte	0x23
-	.uleb128 0xc
-	.4byte	.LVL2738
-	.4byte	.LVL2740-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST718:
-	.4byte	.LVL2750
-	.4byte	.LVL2751
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2751
-	.4byte	.LVL2752
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL2752
-	.4byte	.LVL2753
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2753
-	.4byte	.LFE396
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST719:
-	.4byte	.LVL2760
-	.4byte	.LVL2764
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2764
-	.4byte	.LVL2768
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2771
-	.4byte	.LVL2780
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2780
-	.4byte	.LVL2781
-	.2byte	0x3
-	.byte	0x76
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL2782
-	.4byte	.LFE396
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST720:
-	.4byte	.LVL2754
-	.4byte	.LVL2759
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2777
-	.4byte	.LVL2779
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST721:
-	.4byte	.LVL2750
-	.4byte	.LVL2751
-	.2byte	0xc
-	.byte	0x3
-	.4byte	c_ftl_nand_page_pre_blk
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL2752
-	.4byte	.LVL2755-1
-	.2byte	0xc
-	.byte	0x3
-	.4byte	c_ftl_nand_page_pre_blk
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST722:
-	.4byte	.LVL2772
-	.4byte	.LVL2783
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST267:
-	.4byte	.LVL719
-	.4byte	.LVL720
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL720
-	.4byte	.LVL726
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL726
-	.4byte	.LFE395
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST268:
-	.4byte	.LVL719
-	.4byte	.LVL721-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL721-1
-	.4byte	.LVL726
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL726
-	.4byte	.LFE395
-	.2byte	0x2
-	.byte	0x71
-	.sleb128 4
-	.4byte	0
-	.4byte	0
-.LLST269:
-	.4byte	.LVL719
-	.4byte	.LVL721-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL721-1
-	.4byte	.LVL726
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL726
-	.4byte	.LFE395
-	.2byte	0x2
-	.byte	0x71
-	.sleb128 8
-	.4byte	0
-	.4byte	0
-.LLST270:
-	.4byte	.LVL721
-	.4byte	.LVL725
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST271:
-	.4byte	.LVL721
-	.4byte	.LVL722
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL723
-	.4byte	.LVL724
-	.2byte	0x1
-	.byte	0x5c
-	.4byte	0
-	.4byte	0
-.LLST265:
-	.4byte	.LVL714
-	.4byte	.LVL716
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL716
-	.4byte	.LVL717
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL717
-	.4byte	.LVL718
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL718
-	.4byte	.LFE394
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST266:
-	.4byte	.LVL714
-	.4byte	.LVL715
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST263:
-	.4byte	.LVL710
-	.4byte	.LVL711
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST264:
-	.4byte	.LVL708
-	.4byte	.LVL709
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL709
-	.4byte	.LVL712
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL712
-	.4byte	.LVL713
-	.2byte	0x3
-	.byte	0x72
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST261:
-	.4byte	.LVL702
-	.4byte	.LVL703
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST262:
-	.4byte	.LVL700
-	.4byte	.LVL701
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL701
-	.4byte	.LVL704
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL704
-	.4byte	.LVL705
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL706
-	.4byte	.LVL707
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL707
-	.4byte	.LFE392
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST260:
-	.4byte	.LVL692
-	.4byte	.LVL693
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL693
-	.4byte	.LVL694
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL694
-	.4byte	.LVL695
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL696
-	.4byte	.LVL697
-	.2byte	0x1
-	.byte	0x5e
-	.4byte	.LVL697
-	.4byte	.LVL698
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL699
-	.4byte	.LFE391
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST554:
-	.4byte	.LVL1977
-	.4byte	.LVL1978
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1978
-	.4byte	.LVL1985
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1985
-	.4byte	.LVL1986
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1986
-	.4byte	.LFE390
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST555:
-	.4byte	.LVL1977
-	.4byte	.LVL1980
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1981
-	.4byte	.LVL1982
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1985
-	.4byte	.LVL1988
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1988
-	.4byte	.LFE390
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST559:
-	.4byte	.LVL1999
-	.4byte	.LVL2000
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2000
-	.4byte	.LVL2015
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2015
-	.4byte	.LFE388
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST560:
-	.4byte	.LVL2007
-	.4byte	.LVL2008-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2009
-	.4byte	.LVL2011
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST561:
-	.4byte	.LVL1999
-	.4byte	.LVL2010
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL2010
-	.4byte	.LVL2015
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2015
-	.4byte	.LFE388
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST624:
-	.4byte	.LVL2273
-	.4byte	.LVL2275
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2275
-	.4byte	.LFE387
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST254:
-	.4byte	.LVL681
-	.4byte	.LVL682
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL682
-	.4byte	.LVL685
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL686
-	.4byte	.LVL688
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL688
-	.4byte	.LFE384
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST255:
-	.4byte	.LVL681
-	.4byte	.LVL685
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL685
-	.4byte	.LVL686
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL686
-	.4byte	.LVL688
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL688
-	.4byte	.LFE384
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST256:
-	.4byte	.LVL683
-	.4byte	.LVL687
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST257:
-	.4byte	.LVL683
-	.4byte	.LVL684
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST253:
-	.4byte	.LVL679
-	.4byte	.LVL680
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL680
-	.4byte	.LFE383
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST249:
-	.4byte	.LVL668
-	.4byte	.LVL669
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL669
-	.4byte	.LFE382
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST250:
-	.4byte	.LVL668
-	.4byte	.LVL669
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL669
-	.4byte	.LVL676
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL676
-	.4byte	.LVL677
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL678
-	.4byte	.LFE382
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST251:
-	.4byte	.LVL673
-	.4byte	.LVL674-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST252:
-	.4byte	.LVL668
-	.4byte	.LVL669
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL669
-	.4byte	.LVL670
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL670
-	.4byte	.LVL671
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL671
-	.4byte	.LVL672
-	.2byte	0x2
-	.byte	0x76
-	.sleb128 4
-	.4byte	.LVL672
-	.4byte	.LVL675
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL676
-	.4byte	.LFE382
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST564:
-	.4byte	.LVL2039
-	.4byte	.LVL2042
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2042
-	.4byte	.LVL2046
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2046
-	.4byte	.LVL2047
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2047
-	.4byte	.LFE380
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST565:
-	.4byte	.LVL2049
-	.4byte	.LVL2050
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST566:
-	.4byte	.LVL2039
-	.4byte	.LVL2041
-	.2byte	0x2
-	.byte	0x3c
-	.byte	0x9f
-	.4byte	.LVL2042
-	.4byte	.LVL2043
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2043
-	.4byte	.LVL2044
-	.2byte	0x3
-	.byte	0x76
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL2044
-	.4byte	.LVL2045
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2046
-	.4byte	.LVL2047
-	.2byte	0x2
-	.byte	0x3c
-	.byte	0x9f
-	.4byte	.LVL2047
-	.4byte	.LFE380
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST567:
-	.4byte	.LVL2039
-	.4byte	.LVL2040
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2040
-	.4byte	.LVL2041
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL2046
-	.4byte	.LVL2047
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST740:
-	.4byte	.LVL2931
-	.4byte	.LVL2938
-	.2byte	0x4
-	.byte	0xa
-	.2byte	0x1000
-	.byte	0x9f
-	.4byte	.LVL2938
-	.4byte	.LVL2939
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 -2
-	.byte	0x9f
-	.4byte	.LVL2939
-	.4byte	.LVL2940
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL2940
-	.4byte	.LVL2942
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 -2
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST741:
-	.4byte	.LVL2932
-	.4byte	.LVL2951
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL2952
-	.4byte	.LFE379
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST742:
-	.4byte	.LVL2944
-	.4byte	.LVL2950
-	.2byte	0x4
-	.byte	0x91
-	.sleb128 -80
-	.byte	0x9f
-	.4byte	.LVL2952
-	.4byte	.LFE379
-	.2byte	0x4
-	.byte	0x91
-	.sleb128 -80
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST743:
-	.4byte	.LVL2945
-	.4byte	.LVL2946
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2946
-	.4byte	.LVL2947
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2952
-	.4byte	.LVL2958
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2958
-	.4byte	.LVL2959
-	.2byte	0x3
-	.byte	0x72
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST744:
-	.4byte	.LVL2953
-	.4byte	.LVL2955
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2955
-	.4byte	.LVL2957
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 0
-	.4byte	0
-	.4byte	0
-.LLST745:
-	.4byte	.LVL2945
-	.4byte	.LVL2946
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2946
-	.4byte	.LVL2950
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2952
-	.4byte	.LVL2954
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2956
-	.4byte	.LFE379
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST298:
-	.4byte	.LVL867
-	.4byte	.LVL868
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL869
-	.4byte	.LVL884
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL884
-	.4byte	.LVL885
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL885
-	.4byte	.LVL886
-	.2byte	0x7
-	.byte	0x91
-	.sleb128 -44
-	.byte	0x94
-	.byte	0x2
-	.byte	0x23
-	.uleb128 0x1
-	.byte	0x9f
-	.4byte	.LVL886
-	.4byte	.LVL895
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST299:
-	.4byte	.LVL870
-	.4byte	.LVL871
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL871
-	.4byte	.LVL872
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL876
-	.4byte	.LVL877
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL877
-	.4byte	.LVL878
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL878
-	.4byte	.LVL879
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL886
-	.4byte	.LVL887
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST300:
-	.4byte	.LVL873
-	.4byte	.LVL874-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST301:
-	.4byte	.LVL870
-	.4byte	.LVL875
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL876
-	.4byte	.LVL891
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST302:
-	.4byte	.LVL867
-	.4byte	.LVL868
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL869
-	.4byte	.LVL888
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL889
-	.4byte	.LVL892
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL892
-	.4byte	.LVL893-1
-	.2byte	0x5
-	.byte	0x3
-	.4byte	g_num_data_superblocks
-	.4byte	0
-	.4byte	0
-.LLST303:
-	.4byte	.LVL867
-	.4byte	.LVL868
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL869
-	.4byte	.LVL882
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL883
-	.4byte	.LVL895
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST247:
-	.4byte	.LVL657
-	.4byte	.LVL658
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL658
-	.4byte	.LFE375
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST248:
-	.4byte	.LVL661
-	.4byte	.LVL666
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL666
-	.4byte	.LVL667
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST678:
-	.4byte	.LVL2548
-	.4byte	.LVL2551
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2551
-	.4byte	.LVL2553
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL2553
-	.4byte	.LVL2554
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2554
-	.4byte	.LFE372
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST679:
-	.4byte	.LVL2549
-	.4byte	.LVL2552
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -80
-	.4byte	.LVL2553
-	.4byte	.LFE372
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -80
-	.4byte	0
-	.4byte	0
-.LLST680:
-	.4byte	.LVL2550
-	.4byte	.LVL2552
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -64
-	.4byte	.LVL2553
-	.4byte	.LFE372
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -64
-	.4byte	0
-	.4byte	0
-.LLST681:
-	.4byte	.LVL2553
-	.4byte	.LVL2554
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2555
-	.4byte	.LVL2558
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL2559
-	.4byte	.LVL2560
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2560
-	.4byte	.LVL2562
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2575
-	.4byte	.LVL2577
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2577
-	.4byte	.LVL2581
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL2582
-	.4byte	.LVL2587
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL2587
-	.4byte	.LVL2593
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2593
-	.4byte	.LVL2594
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL2595
-	.4byte	.LVL2596
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2615
-	.4byte	.LVL2620
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2620
-	.4byte	.LVL2621
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL2621
-	.4byte	.LVL2622-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2633
-	.4byte	.LVL2634
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2634
-	.4byte	.LVL2635
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2635
-	.4byte	.LVL2636-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2641
-	.4byte	.LVL2642
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2642
-	.4byte	.LVL2644
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2646
-	.4byte	.LVL2650
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2650
-	.4byte	.LVL2651
-	.2byte	0x3
-	.byte	0x72
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST682:
-	.4byte	.LVL2632
-	.4byte	.LVL2633
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -64
-	.4byte	.LVL2653
-	.4byte	.LVL2656
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2659
-	.4byte	.LVL2662
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2703
-	.4byte	.LVL2704
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST683:
-	.4byte	.LVL2612
-	.4byte	.LVL2614
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -80
-	.4byte	.LVL2614
-	.4byte	.LVL2624
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2625
-	.4byte	.LVL2631
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2632
-	.4byte	.LVL2633
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -80
-	.4byte	.LVL2633
-	.4byte	.LVL2639
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL2640
-	.4byte	.LVL2645
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL2645
-	.4byte	.LVL2646
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2646
-	.4byte	.LFE372
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	0
-	.4byte	0
-.LLST684:
-	.4byte	.LVL2571
-	.4byte	.LVL2575
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -76
-	.4byte	.LVL2607
-	.4byte	.LFE372
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -76
-	.4byte	0
-	.4byte	0
-.LLST685:
-	.4byte	.LVL2568
-	.4byte	.LVL2575
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -84
-	.4byte	.LVL2601
-	.4byte	.LVL2603
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -84
-	.4byte	.LVL2607
-	.4byte	.LFE372
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -84
-	.4byte	0
-	.4byte	0
-.LLST686:
-	.4byte	.LVL2554
-	.4byte	.LVL2556-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2575
-	.4byte	.LVL2578-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2588
-	.4byte	.LVL2589
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2589
-	.4byte	.LVL2590
-	.2byte	0x5
-	.byte	0x7d
-	.sleb128 0
-	.byte	0x6
-	.byte	0x32
-	.byte	0x1c
-	.4byte	.LVL2616
-	.4byte	.LVL2618
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2618
-	.4byte	.LVL2620
-	.2byte	0x6
-	.byte	0x91
-	.sleb128 -72
-	.byte	0x6
-	.byte	0x32
-	.byte	0x1c
-	.4byte	.LVL2643
-	.4byte	.LVL2645
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2647
-	.4byte	.LVL2648
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2648
-	.4byte	.LVL2649
-	.2byte	0x2
-	.byte	0x71
-	.sleb128 -2
-	.4byte	0
-	.4byte	0
-.LLST687:
-	.4byte	.LVL2557
-	.4byte	.LVL2558
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2558
-	.4byte	.LVL2566
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2566
-	.4byte	.LVL2569
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL2579
-	.4byte	.LVL2580
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2580
-	.4byte	.LVL2582
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2587
-	.4byte	.LVL2607
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST688:
-	.4byte	.LVL2557
-	.4byte	.LVL2558
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2558
-	.4byte	.LVL2573
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL2579
-	.4byte	.LVL2580
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2580
-	.4byte	.LVL2582
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2587
-	.4byte	.LVL2610
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST689:
-	.4byte	.LVL2559
-	.4byte	.LVL2573
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2587
-	.4byte	.LVL2591
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2592
-	.4byte	.LVL2611
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2615
-	.4byte	.LVL2617
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL2619
-	.4byte	.LVL2623
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL2633
-	.4byte	.LVL2634
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2634
-	.4byte	.LVL2645
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -72
-	.4byte	.LVL2646
-	.4byte	.LFE372
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -72
-	.4byte	0
-	.4byte	0
-.LLST690:
-	.4byte	.LVL2565
-	.4byte	.LVL2567
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2567
-	.4byte	.LVL2569
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2596
-	.4byte	.LVL2597
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2597
-	.4byte	.LVL2602
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2603
-	.4byte	.LVL2605
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2605
-	.4byte	.LVL2606
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST691:
-	.4byte	.LVL2622
-	.4byte	.LVL2623
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2636
-	.4byte	.LVL2637
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2638
-	.4byte	.LVL2645
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -60
-	.4byte	.LVL2652
-	.4byte	.LVL2658
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -60
-	.4byte	.LVL2658
-	.4byte	.LVL2659
-	.2byte	0x7
-	.byte	0x91
-	.sleb128 -60
-	.byte	0x94
-	.byte	0x2
-	.byte	0x23
-	.uleb128 0x1
-	.byte	0x9f
-	.4byte	.LVL2659
-	.4byte	.LFE372
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -60
-	.4byte	0
-	.4byte	0
-.LLST692:
-	.4byte	.LVL2666
-	.4byte	.LVL2675
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2679
-	.4byte	.LVL2701
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST693:
-	.4byte	.LVL2654
-	.4byte	.LVL2657
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL2659
-	.4byte	.LVL2675
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL2675
-	.4byte	.LVL2676
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2679
-	.4byte	.LVL2701
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL2703
-	.4byte	.LVL2707
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST694:
-	.4byte	.LVL2654
-	.4byte	.LVL2657
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL2659
-	.4byte	.LVL2673
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL2679
-	.4byte	.LVL2693
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL2693
-	.4byte	.LVL2695
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2703
-	.4byte	.LVL2707
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST695:
-	.4byte	.LVL2564
-	.4byte	.LVL2575
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	.LVL2596
-	.4byte	.LVL2660
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	.LVL2660
-	.4byte	.LVL2661
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2661
-	.4byte	.LFE372
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	0
-	.4byte	0
-.LLST696:
-	.4byte	.LVL2548
-	.4byte	.LVL2551
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL2553
-	.4byte	.LVL2564
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL2575
-	.4byte	.LVL2596
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL2604
-	.4byte	.LVL2605
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL2609
-	.4byte	.LVL2631
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL2645
-	.4byte	.LVL2646
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST697:
-	.4byte	.LVL2598
-	.4byte	.LVL2600
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2626
-	.4byte	.LVL2627
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2627
-	.4byte	.LVL2629
-	.2byte	0x2
-	.byte	0x73
-	.sleb128 12
-	.4byte	.LVL2655
-	.4byte	.LVL2656
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2659
-	.4byte	.LVL2669
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2670
-	.4byte	.LVL2673
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2681
-	.4byte	.LVL2692
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2696
-	.4byte	.LVL2701
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST698:
-	.4byte	.LVL2548
-	.4byte	.LVL2551
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2553
-	.4byte	.LVL2561
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2561
-	.4byte	.LVL2563-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2563-1
-	.4byte	.LVL2575
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -56
-	.4byte	.LVL2575
-	.4byte	.LVL2596
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2596
-	.4byte	.LFE372
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -56
-	.4byte	0
-	.4byte	0
-.LLST699:
-	.4byte	.LVL2608
-	.4byte	.LVL2614
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL2628
-	.4byte	.LVL2630
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST700:
-	.4byte	.LVL2608
-	.4byte	.LVL2614
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL2614
-	.4byte	.LVL2631
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2645
-	.4byte	.LVL2646
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST701:
-	.4byte	.LVL2612
-	.4byte	.LVL2613
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2613
-	.4byte	.LVL2614
-	.2byte	0x5
-	.byte	0x3
-	.4byte	g_recovery_page_min_ver
-	.4byte	.LVL2614
-	.4byte	.LVL2631
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -60
-	.4byte	.LVL2645
-	.4byte	.LVL2646
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -60
-	.4byte	0
-	.4byte	0
-.LLST702:
-	.4byte	.LVL2671
-	.4byte	.LVL2672
-	.2byte	0x2
-	.byte	0x76
-	.sleb128 4
-	.4byte	.LVL2681
-	.4byte	.LVL2682-1
-	.2byte	0x2
-	.byte	0x76
-	.sleb128 4
-	.4byte	0
-	.4byte	0
-.LLST703:
-	.4byte	.LVL2686
-	.4byte	.LVL2689
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2689
-	.4byte	.LVL2690
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST704:
-	.4byte	.LVL2694
-	.4byte	.LVL2701
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	0
-	.4byte	0
-.LLST705:
-	.4byte	.LVL2697
-	.4byte	.LVL2698-1
-	.2byte	0x2
-	.byte	0x75
-	.sleb128 4
-	.4byte	.LVL2698-1
-	.4byte	.LVL2699
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST608:
-	.4byte	.LVL2221
-	.4byte	.LVL2222
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2222
-	.4byte	.LVL2239
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2239
-	.4byte	.LFE371
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST609:
-	.4byte	.LVL2221
-	.4byte	.LVL2223-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST610:
-	.4byte	.LVL2224
-	.4byte	.LVL2225
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST611:
-	.4byte	.LVL2227
-	.4byte	.LVL2229-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2234
-	.4byte	.LVL2236
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2236
-	.4byte	.LVL2237
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST612:
-	.4byte	.LVL2227
-	.4byte	.LVL2233
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2234
-	.4byte	.LVL2235
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST613:
-	.4byte	.LVL2226
-	.4byte	.LVL2228
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2228
-	.4byte	.LVL2229-1
-	.2byte	0x5
-	.byte	0x3
-	.4byte	g_num_free_superblocks
-	.4byte	.LVL2234
-	.4byte	.LVL2237
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST244:
-	.4byte	.LVL647
-	.4byte	.LVL650
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL650
-	.4byte	.LVL652
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	.LVL652
-	.4byte	.LVL655
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL655
-	.4byte	.LFE370
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST245:
-	.4byte	.LVL647
-	.4byte	.LVL649
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL649
-	.4byte	.LFE370
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST246:
-	.4byte	.LVL648
-	.4byte	.LVL651
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL651
-	.4byte	.LVL652
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL652
-	.4byte	.LVL653
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL654
-	.4byte	.LVL655
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL655
-	.4byte	.LVL656
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST297:
-	.4byte	.LVL852
-	.4byte	.LVL853
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL853
-	.4byte	.LVL854
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL854
-	.4byte	.LVL855
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL856
-	.4byte	.LVL857
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL858
-	.4byte	.LFE368
-	.2byte	0x1
-	.byte	0x5e
-	.4byte	0
-	.4byte	0
-.LLST665:
-	.4byte	.LVL2483
-	.4byte	.LVL2490
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2490
-	.4byte	.LFE366
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST666:
-	.4byte	.LVL2495
-	.4byte	.LVL2498
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL2498
-	.4byte	.LVL2499
-	.2byte	0x2
-	.byte	0x74
-	.sleb128 0
-	.4byte	.LVL2514
-	.4byte	.LVL2516
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL2516
-	.4byte	.LVL2521
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL2521
-	.4byte	.LVL2523
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL2523
-	.4byte	.LVL2524
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL2525
-	.4byte	.LVL2529
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL2537
-	.4byte	.LVL2538-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2541
-	.4byte	.LVL2542
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST667:
-	.4byte	.LVL2500
-	.4byte	.LVL2501
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2508
-	.4byte	.LVL2509
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2509
-	.4byte	.LVL2511
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL2511
-	.4byte	.LVL2512
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL2513
-	.4byte	.LVL2514
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL2517
-	.4byte	.LVL2519
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2519
-	.4byte	.LVL2520
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL2522
-	.4byte	.LVL2523
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2525
-	.4byte	.LVL2526
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2526
-	.4byte	.LVL2527
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2527
-	.4byte	.LVL2528
-	.2byte	0x3
-	.byte	0x71
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST668:
-	.4byte	.LVL2497
-	.4byte	.LVL2501
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL2508
-	.4byte	.LVL2514
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST669:
-	.4byte	.LVL2526
-	.4byte	.LVL2529
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST670:
-	.4byte	.LVL2484
-	.4byte	.LVL2485
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2485
-	.4byte	.LVL2490
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 24
-	.4byte	.LVL2490
-	.4byte	.LVL2492-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2492-1
-	.4byte	.LVL2502
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -52
-	.4byte	.LVL2508
-	.4byte	.LVL2529
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -52
-	.4byte	0
-	.4byte	0
-.LLST671:
-	.4byte	.LVL2486
-	.4byte	.LVL2487
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2487
-	.4byte	.LVL2490
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 12
-	.4byte	.LVL2490
-	.4byte	.LVL2492-1
-	.2byte	0x2
-	.byte	0x74
-	.sleb128 12
-	.4byte	.LVL2492-1
-	.4byte	.LFE366
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -60
-	.4byte	0
-	.4byte	0
-.LLST672:
-	.4byte	.LVL2488
-	.4byte	.LVL2489
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2489
-	.4byte	.LVL2490
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 16
-	.4byte	.LVL2490
-	.4byte	.LVL2492-1
-	.2byte	0x2
-	.byte	0x74
-	.sleb128 16
-	.4byte	.LVL2492-1
-	.4byte	.LFE366
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -44
-	.4byte	0
-	.4byte	0
-.LLST673:
-	.4byte	.LVL2488
-	.4byte	.LVL2502
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL2508
-	.4byte	.LVL2529
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	0
-	.4byte	0
-.LLST674:
-	.4byte	.LVL2493
-	.4byte	.LVL2502
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2508
-	.4byte	.LVL2529
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2530
-	.4byte	.LVL2534
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL2539
-	.4byte	.LVL2541
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST675:
-	.4byte	.LVL2502
-	.4byte	.LVL2503
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2529
-	.4byte	.LFE366
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST676:
-	.4byte	.LVL2531
-	.4byte	.LVL2532
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2532
-	.4byte	.LVL2533
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2539
-	.4byte	.LVL2540-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2540-1
-	.4byte	.LVL2541
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -52
-	.4byte	0
-	.4byte	0
-.LLST677:
-	.4byte	.LVL2536
-	.4byte	.LVL2538-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2541
-	.4byte	.LVL2543
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST663:
-	.4byte	.LVL2460
-	.4byte	.LVL2474
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2479
-	.4byte	.LVL2481
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2482
-	.4byte	.LFE365
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST664:
-	.4byte	.LVL2468
-	.4byte	.LVL2469
-	.2byte	0x12
-	.byte	0x71
-	.sleb128 0
-	.byte	0x33
-	.byte	0x25
-	.byte	0x71
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x23
-	.uleb128 0x18
-	.byte	0x31
-	.byte	0x24
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x4
-	.byte	0x9f
-	.4byte	.LVL2469
-	.4byte	.LVL2470-1
-	.2byte	0x1c
-	.byte	0x3
-	.4byte	c_ftl_nand_data_blks_per_plane
-	.byte	0x94
-	.byte	0x2
-	.byte	0x33
-	.byte	0x25
-	.byte	0x3
-	.4byte	c_ftl_nand_data_blks_per_plane
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x23
-	.uleb128 0x18
-	.byte	0x31
-	.byte	0x24
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x4
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST243:
-	.4byte	.LVL645
-	.4byte	.LVL646
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL646
-	.4byte	.LFE364
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST656:
-	.4byte	.LVL2397
-	.4byte	.LVL2403
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2403
-	.4byte	.LVL2404
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL2404
-	.4byte	.LVL2405
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2407
-	.4byte	.LVL2408
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2408
-	.4byte	.LVL2409
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2410
-	.4byte	.LVL2415
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -52
-	.4byte	.LVL2415
-	.4byte	.LVL2416
-	.2byte	0x7
-	.byte	0x91
-	.sleb128 -52
-	.byte	0x94
-	.byte	0x2
-	.byte	0x23
-	.uleb128 0x1
-	.byte	0x9f
-	.4byte	.LVL2416
-	.4byte	.LVL2426
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -52
-	.4byte	.LVL2427
-	.4byte	.LVL2444
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -52
-	.4byte	0
-	.4byte	0
-.LLST657:
-	.4byte	.LVL2396
-	.4byte	.LVL2405
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	.LVL2406
-	.4byte	.LVL2409
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	.LVL2444
-	.4byte	.LVL2447
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	.LVL2447
-	.4byte	.LVL2448
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -56
-	.4byte	.LVL2448
-	.4byte	.LFE361
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	0
-	.4byte	0
-.LLST658:
-	.4byte	.LVL2399
-	.4byte	.LVL2404
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -52
-	.4byte	.LVL2411
-	.4byte	.LVL2444
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST659:
-	.4byte	.LVL2397
-	.4byte	.LVL2401
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2402
-	.4byte	.LVL2444
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST660:
-	.4byte	.LVL2423
-	.4byte	.LVL2424
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2424
-	.4byte	.LVL2425
-	.2byte	0x1
-	.byte	0x5e
-	.4byte	.LVL2427
-	.4byte	.LVL2428
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2435
-	.4byte	.LVL2436
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2436
-	.4byte	.LVL2437
-	.2byte	0x1
-	.byte	0x5e
-	.4byte	.LVL2438
-	.4byte	.LVL2439
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2449
-	.4byte	.LVL2453
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2454
-	.4byte	.LVL2455
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2455
-	.4byte	.LFE361
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST661:
-	.4byte	.LVL2412
-	.4byte	.LVL2414
-	.2byte	0x5
-	.byte	0x40
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL2416
-	.4byte	.LVL2417
-	.2byte	0x5
-	.byte	0x40
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL2417
-	.4byte	.LVL2418
-	.2byte	0x5
-	.byte	0x41
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL2422
-	.4byte	.LVL2429
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2430
-	.4byte	.LVL2431
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2434
-	.4byte	.LVL2440
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2441
-	.4byte	.LVL2442
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2450
-	.4byte	.LVL2451
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2452
-	.4byte	.LVL2453
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2455
-	.4byte	.LVL2456
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2457
-	.4byte	.LFE361
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST662:
-	.4byte	.LVL2411
-	.4byte	.LVL2444
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST650:
-	.4byte	.LVL2375
-	.4byte	.LVL2378
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2378
-	.4byte	.LVL2383
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2383
-	.4byte	.LVL2384-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2384-1
-	.4byte	.LVL2384
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL2384
-	.4byte	.LVL2390
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2390
-	.4byte	.LFE359
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST651:
-	.4byte	.LVL2385
-	.4byte	.LVL2386-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2387
-	.4byte	.LVL2388
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2388
-	.4byte	.LVL2389-1
-	.2byte	0x5
-	.byte	0x3
-	.4byte	req_sys+4
-	.4byte	0
-	.4byte	0
-.LLST652:
-	.4byte	.LVL2375
-	.4byte	.LVL2376
-	.2byte	0x7
-	.byte	0x70
-	.sleb128 6
-	.byte	0x94
-	.byte	0x2
-	.byte	0x31
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL2390
-	.4byte	.LFE359
-	.2byte	0x7
-	.byte	0x70
-	.sleb128 6
-	.byte	0x94
-	.byte	0x2
-	.byte	0x31
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST653:
-	.4byte	.LVL2375
-	.4byte	.LVL2378
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 24
-	.4byte	.LVL2378
-	.4byte	.LVL2381-1
-	.2byte	0x2
-	.byte	0x74
-	.sleb128 24
-	.4byte	.LVL2390
-	.4byte	.LFE359
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 24
-	.4byte	0
-	.4byte	0
-.LLST654:
-	.4byte	.LVL2377
-	.4byte	.LVL2378
-	.2byte	0x13
-	.byte	0x72
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x31
-	.byte	0x24
-	.byte	0x70
-	.sleb128 12
-	.byte	0x6
-	.byte	0x22
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL2378
-	.4byte	.LVL2379
-	.2byte	0x13
-	.byte	0x72
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x31
-	.byte	0x24
-	.byte	0x74
-	.sleb128 12
-	.byte	0x6
-	.byte	0x22
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL2379
-	.4byte	.LVL2380
-	.2byte	0x15
-	.byte	0x74
-	.sleb128 0
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x31
-	.byte	0x24
-	.byte	0x74
-	.sleb128 12
-	.byte	0x6
-	.byte	0x22
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST655:
-	.4byte	.LVL2380
-	.4byte	.LVL2382
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST622:
-	.4byte	.LVL2264
-	.4byte	.LVL2268
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2268
-	.4byte	.LVL2272
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL2272
-	.4byte	.LFE357
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST623:
-	.4byte	.LVL2264
-	.4byte	.LVL2265
-	.2byte	0x3
-	.byte	0x8
-	.byte	0x20
-	.byte	0x9f
-	.4byte	.LVL2265
-	.4byte	.LVL2266
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2267
-	.4byte	.LVL2269
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2272
-	.4byte	.LFE357
-	.2byte	0x3
-	.byte	0x8
-	.byte	0x20
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST642:
-	.4byte	.LVL2346
-	.4byte	.LVL2348
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2348
-	.4byte	.LVL2367
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2367
-	.4byte	.LFE356
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST643:
-	.4byte	.LVL2346
-	.4byte	.LVL2348
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2348
-	.4byte	.LVL2367
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2367
-	.4byte	.LFE356
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST644:
-	.4byte	.LVL2346
-	.4byte	.LVL2347
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2347
-	.4byte	.LFE356
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST645:
-	.4byte	.LVL2353
-	.4byte	.LVL2367
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST646:
-	.4byte	.LVL2353
-	.4byte	.LVL2367
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -84
-	.4byte	0
-	.4byte	0
-.LLST647:
-	.4byte	.LVL2351
-	.4byte	.LVL2352-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2352-1
-	.4byte	.LVL2355
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -80
-	.4byte	.LVL2355
-	.4byte	.LVL2356-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2356-1
-	.4byte	.LVL2360
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -76
-	.4byte	.LVL2365
-	.4byte	.LVL2366-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST648:
-	.4byte	.LVL2346
-	.4byte	.LVL2348
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2348
-	.4byte	.LVL2349
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL2350
-	.4byte	.LVL2367
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL2367
-	.4byte	.LFE356
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST649:
-	.4byte	.LVL2346
-	.4byte	.LVL2348
-	.2byte	0xf
-	.byte	0x70
-	.sleb128 0
-	.byte	0x3
-	.4byte	c_ftl_nand_sec_pre_page_shift
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x25
-	.byte	0x9f
-	.4byte	.LVL2348
-	.4byte	.LVL2349
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL2350
-	.4byte	.LVL2367
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL2367
-	.4byte	.LFE356
-	.2byte	0xf
-	.byte	0x70
-	.sleb128 0
-	.byte	0x3
-	.4byte	c_ftl_nand_sec_pre_page_shift
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x25
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST614:
-	.4byte	.LVL2240
-	.4byte	.LVL2242
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2242
-	.4byte	.LVL2253
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2257
-	.4byte	.LVL2262
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2262
-	.4byte	.LFE355
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST615:
-	.4byte	.LVL2240
-	.4byte	.LVL2242
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2242
-	.4byte	.LVL2252
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL2257
-	.4byte	.LVL2262
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL2262
-	.4byte	.LFE355
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST616:
-	.4byte	.LVL2240
-	.4byte	.LVL2241
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2241
-	.4byte	.LVL2244
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	.LVL2244
-	.4byte	.LVL2245
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -88
-	.4byte	.LVL2245
-	.4byte	.LVL2258
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	.LVL2258
-	.4byte	.LVL2259
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2259
-	.4byte	.LFE355
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	0
-	.4byte	0
-.LLST617:
-	.4byte	.LVL2249
-	.4byte	.LVL2262
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST618:
-	.4byte	.LVL2248
-	.4byte	.LVL2262
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -84
-	.4byte	0
-	.4byte	0
-.LLST619:
-	.4byte	.LVL2246
-	.4byte	.LVL2247-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2247-1
-	.4byte	.LVL2259
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -76
-	.4byte	.LVL2259
-	.4byte	.LVL2260
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2260
-	.4byte	.LVL2262
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -76
-	.4byte	0
-	.4byte	0
-.LLST620:
-	.4byte	.LVL2240
-	.4byte	.LVL2242
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2242
-	.4byte	.LVL2243
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL2245
-	.4byte	.LVL2262
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL2262
-	.4byte	.LFE355
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST621:
-	.4byte	.LVL2240
-	.4byte	.LVL2242
-	.2byte	0xf
-	.byte	0x70
-	.sleb128 0
-	.byte	0x3
-	.4byte	c_ftl_nand_sec_pre_page_shift
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x25
-	.byte	0x9f
-	.4byte	.LVL2242
-	.4byte	.LVL2243
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2245
-	.4byte	.LVL2255
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2255
-	.4byte	.LVL2256-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2256-1
-	.4byte	.LVL2257
-	.2byte	0x3
-	.byte	0x76
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL2257
-	.4byte	.LVL2262
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2262
-	.4byte	.LFE355
-	.2byte	0xf
-	.byte	0x70
-	.sleb128 0
-	.byte	0x3
-	.4byte	c_ftl_nand_sec_pre_page_shift
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x25
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST600:
-	.4byte	.LVL2191
-	.4byte	.LVL2196
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2196
-	.4byte	.LFE354
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST601:
-	.4byte	.LVL2191
-	.4byte	.LVL2194
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2194
-	.4byte	.LFE354
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -44
-	.4byte	0
-	.4byte	0
-.LLST602:
-	.4byte	.LVL2191
-	.4byte	.LVL2195
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2195
-	.4byte	.LFE354
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -36
-	.4byte	0
-	.4byte	0
-.LLST603:
-	.4byte	.LVL2198
-	.4byte	.LVL2199
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2200
-	.4byte	.LVL2202
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL2202
-	.4byte	.LVL2203-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2208
-	.4byte	.LVL2210
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL2211
-	.4byte	.LVL2212
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST604:
-	.4byte	.LVL2203
-	.4byte	.LVL2208
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL2212
-	.4byte	.LFE354
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST605:
-	.4byte	.LVL2203
-	.4byte	.LVL2208
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL2212
-	.4byte	.LFE354
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST606:
-	.4byte	.LVL2214
-	.4byte	.LVL2215
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2215
-	.4byte	.LFE354
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -40
-	.4byte	0
-	.4byte	0
-.LLST607:
-	.4byte	.LVL2206
-	.4byte	.LVL2208
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2212
-	.4byte	.LVL2216
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2216
-	.4byte	.LVL2217-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST599:
-	.4byte	.LVL2184
-	.4byte	.LVL2185
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2186
-	.4byte	.LVL2187
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2187
-	.4byte	.LVL2188
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2188
-	.4byte	.LVL2189-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2189-1
-	.4byte	.LVL2189
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2189
-	.4byte	.LVL2190
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST236:
-	.4byte	.LVL617
-	.4byte	.LVL618
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL619
-	.4byte	.LVL620
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL620
-	.4byte	.LVL621
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL622
-	.4byte	.LVL623
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL624
-	.4byte	.LVL628
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL628
-	.4byte	.LVL629
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL630
-	.4byte	.LVL632
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL632
-	.4byte	.LVL633
-	.2byte	0x3
-	.byte	0x71
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL633
-	.4byte	.LVL634
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL634
-	.4byte	.LVL636
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL636
-	.4byte	.LVL637
-	.2byte	0x3
-	.byte	0x71
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL637
-	.4byte	.LFE352
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST237:
-	.4byte	.LVL624
-	.4byte	.LVL628
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL634
-	.4byte	.LFE352
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST238:
-	.4byte	.LVL622
-	.4byte	.LVL623
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL624
-	.4byte	.LVL625
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL630
-	.4byte	.LVL631
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL632
-	.4byte	.LVL634
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL634
-	.4byte	.LVL635
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL636
-	.4byte	.LFE352
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST597:
-	.4byte	.LVL2179
-	.4byte	.LVL2180
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2180
-	.4byte	.LFE351
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST598:
-	.4byte	.LVL2181
-	.4byte	.LVL2182
-	.2byte	0x9
-	.byte	0x72
-	.sleb128 0
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL2182
-	.4byte	.LVL2183-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST586:
-	.4byte	.LVL2139
-	.4byte	.LVL2140
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2140
-	.4byte	.LVL2144
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2144
-	.4byte	.LVL2148
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2148
-	.4byte	.LFE349
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST587:
-	.4byte	.LVL2149
-	.4byte	.LVL2150
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2150
-	.4byte	.LVL2151
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2151
-	.4byte	.LVL2153
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2156
-	.4byte	.LVL2159
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2159
-	.4byte	.LVL2160
-	.2byte	0x3
-	.byte	0x72
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST588:
-	.4byte	.LVL2149
-	.4byte	.LVL2150
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2150
-	.4byte	.LVL2152
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2156
-	.4byte	.LVL2157
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2158
-	.4byte	.LFE349
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST589:
-	.4byte	.LVL2139
-	.4byte	.LVL2140
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 12
-	.4byte	.LVL2140
-	.4byte	.LVL2141-1
-	.2byte	0x2
-	.byte	0x74
-	.sleb128 12
-	.4byte	.LVL2144
-	.4byte	.LVL2145
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 12
-	.4byte	0
-	.4byte	0
-.LLST590:
-	.4byte	.LVL2139
-	.4byte	.LVL2140
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 24
-	.4byte	.LVL2140
-	.4byte	.LVL2141-1
-	.2byte	0x2
-	.byte	0x74
-	.sleb128 24
-	.4byte	.LVL2144
-	.4byte	.LVL2146
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 24
-	.4byte	0
-	.4byte	0
-.LLST591:
-	.4byte	.LVL2145
-	.4byte	.LVL2147
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST579:
-	.4byte	.LVL2108
-	.4byte	.LVL2111-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2111-1
-	.4byte	.LFE348
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST580:
-	.4byte	.LVL2113
-	.4byte	.LVL2119
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL2128
-	.4byte	.LFE348
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST581:
-	.4byte	.LVL2111
-	.4byte	.LVL2114
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2121
-	.4byte	.LVL2124
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2124
-	.4byte	.LVL2127
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2127
-	.4byte	.LVL2128
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST582:
-	.4byte	.LVL2117
-	.4byte	.LVL2118-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2118-1
-	.4byte	.LVL2119
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2128
-	.4byte	.LVL2129
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2129
-	.4byte	.LVL2135
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -36
-	.4byte	.LVL2135
-	.4byte	.LVL2136
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL2136
-	.4byte	.LVL2137
-	.2byte	0x3
-	.byte	0x78
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL2137
-	.4byte	.LFE348
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -36
-	.4byte	0
-	.4byte	0
-.LLST583:
-	.4byte	.LVL2121
-	.4byte	.LVL2122
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2123
-	.4byte	.LVL2124
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2124
-	.4byte	.LVL2125
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST584:
-	.4byte	.LVL2109
-	.4byte	.LVL2116
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL2121
-	.4byte	.LVL2128
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST585:
-	.4byte	.LVL2130
-	.4byte	.LVL2131-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2131-1
-	.4byte	.LVL2135
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	.LVL2137
-	.4byte	.LFE348
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	0
-	.4byte	0
-.LLST290:
-	.4byte	.LVL827
-	.4byte	.LVL830
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL830
-	.4byte	.LFE346
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST291:
-	.4byte	.LVL829
-	.4byte	.LVL834
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL838
-	.4byte	.LVL845
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST292:
-	.4byte	.LVL839
-	.4byte	.LVL845
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST293:
-	.4byte	.LVL831
-	.4byte	.LVL832
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL832
-	.4byte	.LVL833
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL833
-	.4byte	.LVL835
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL838
-	.4byte	.LVL840
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL840
-	.4byte	.LVL841
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL842
-	.4byte	.LVL845
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST294:
-	.4byte	.LVL833
-	.4byte	.LVL836
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL837
-	.4byte	.LVL838
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL839
-	.4byte	.LVL843
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL843
-	.4byte	.LVL844
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL845
-	.4byte	.LVL847
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL847
-	.4byte	.LVL849
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL849
-	.4byte	.LVL850
-	.2byte	0x3
-	.byte	0x76
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL850
-	.4byte	.LFE346
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST295:
-	.4byte	.LVL833
-	.4byte	.LVL836
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL837
-	.4byte	.LVL838
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL845
-	.4byte	.LVL848-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL848-1
-	.4byte	.LVL849
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	0
-	.4byte	0
-.LLST296:
-	.4byte	.LVL833
-	.4byte	.LVL836
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST220:
-	.4byte	.LVL573
-	.4byte	.LVL576
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL577
-	.4byte	.LVL578
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL580
-	.4byte	.LVL582
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST221:
-	.4byte	.LVL573
-	.4byte	.LVL581
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL581
-	.4byte	.LVL583
-	.2byte	0x8
-	.byte	0x73
-	.sleb128 0
-	.byte	0x71
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x36
-	.byte	0x1b
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST222:
-	.4byte	.LVL574
-	.4byte	.LVL575
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL579
-	.4byte	.LVL583
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST214:
-	.4byte	.LVL560
-	.4byte	.LVL566-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL566-1
-	.4byte	.LVL567
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL567
-	.4byte	.LVL572
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL572
-	.4byte	.LFE342
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST215:
-	.4byte	.LVL560
-	.4byte	.LVL565
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL567
-	.4byte	.LVL568
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL570
-	.4byte	.LFE342
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST216:
-	.4byte	.LVL560
-	.4byte	.LVL561
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL561
-	.4byte	.LVL571
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	.LVL571
-	.4byte	.LFE342
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST217:
-	.4byte	.LVL560
-	.4byte	.LVL564
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL564
-	.4byte	.LVL567
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL567
-	.4byte	.LFE342
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST218:
-	.4byte	.LVL562
-	.4byte	.LVL563
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL567
-	.4byte	.LVL571
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST219:
-	.4byte	.LVL560
-	.4byte	.LVL562
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL571
-	.4byte	.LFE342
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST211:
-	.4byte	.LVL546
-	.4byte	.LVL549
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL549
-	.4byte	.LFE341
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST212:
-	.4byte	.LVL546
-	.4byte	.LVL548
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL548
-	.4byte	.LFE341
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST213:
-	.4byte	.LVL553
-	.4byte	.LVL554
-	.2byte	0x10
-	.byte	0x71
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x3
-	.4byte	p_data_block_list_table
-	.byte	0x6
-	.byte	0x22
-	.byte	0x9f
-	.4byte	.LVL554
-	.4byte	.LVL555
-	.2byte	0x12
-	.byte	0x75
-	.sleb128 2
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x3
-	.4byte	p_data_block_list_table
-	.byte	0x6
-	.byte	0x22
-	.byte	0x9f
-	.4byte	.LVL556
-	.4byte	.LVL557
-	.2byte	0x10
-	.byte	0x73
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x3
-	.4byte	p_data_block_list_table
-	.byte	0x6
-	.byte	0x22
-	.byte	0x9f
-	.4byte	.LVL558
-	.4byte	.LVL559
-	.2byte	0x12
-	.byte	0x75
-	.sleb128 2
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x3
-	.4byte	p_data_block_list_table
-	.byte	0x6
-	.byte	0x22
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST206:
-	.4byte	.LVL523
-	.4byte	.LVL526
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL526
-	.4byte	.LVL527
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL527
-	.4byte	.LFE340
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST207:
-	.4byte	.LVL524
-	.4byte	.LVL525
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL527
-	.4byte	.LVL539
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL539
-	.4byte	.LFE340
-	.2byte	0x6
-	.byte	0x77
-	.sleb128 0
-	.byte	0x76
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST208:
-	.4byte	.LVL529
-	.4byte	.LVL530
-	.2byte	0xb
-	.byte	0x72
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x31
-	.byte	0x24
-	.byte	0x78
-	.sleb128 0
-	.byte	0x22
-	.4byte	.LVL531
-	.4byte	.LVL533
-	.2byte	0xb
-	.byte	0x72
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x31
-	.byte	0x24
-	.byte	0x78
-	.sleb128 0
-	.byte	0x22
-	.4byte	.LVL534
-	.4byte	.LVL535
-	.2byte	0xb
-	.byte	0x72
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x31
-	.byte	0x24
-	.byte	0x78
-	.sleb128 0
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST209:
-	.4byte	.LVL529
-	.4byte	.LVL531
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL531
-	.4byte	.LVL534
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL534
-	.4byte	.LVL536
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL536
-	.4byte	.LVL537
-	.2byte	0x5
-	.byte	0x77
-	.sleb128 0
-	.byte	0x76
-	.sleb128 0
-	.byte	0x22
-	.4byte	.LVL538
-	.4byte	.LVL540
-	.2byte	0x5
-	.byte	0x77
-	.sleb128 0
-	.byte	0x76
-	.sleb128 0
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST194:
-	.4byte	.LVL468
-	.4byte	.LVL469
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL470
-	.4byte	.LVL477
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL479
-	.4byte	.LVL480
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL480
-	.4byte	.LFE336
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST195:
-	.4byte	.LVL472
-	.4byte	.LVL475
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST191:
-	.4byte	.LVL458
-	.4byte	.LVL459
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL459
-	.4byte	.LFE335
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST192:
-	.4byte	.LVL458
-	.4byte	.LVL463
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL463
-	.4byte	.LVL466
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL466
-	.4byte	.LFE335
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST193:
-	.4byte	.LVL460
-	.4byte	.LVL461
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL462
-	.4byte	.LVL465
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL466
-	.4byte	.LFE335
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST189:
-	.4byte	.LVL450
-	.4byte	.LVL451
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL451
-	.4byte	.LVL452
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL452
-	.4byte	.LVL454
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL456
-	.4byte	.LFE334
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST190:
-	.4byte	.LVL455
-	.4byte	.LVL457
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL457
-	.4byte	.LFE334
-	.2byte	0x7
-	.byte	0x74
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0x73
-	.sleb128 0
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST185:
-	.4byte	.LVL443
-	.4byte	.LVL445-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL445-1
-	.4byte	.LFE333
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST186:
-	.4byte	.LVL443
-	.4byte	.LVL445-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL445-1
-	.4byte	.LFE333
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST187:
-	.4byte	.LVL444
-	.4byte	.LVL449
-	.2byte	0x6
-	.byte	0x3
-	.4byte	gSysFreeQueue
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST188:
-	.4byte	.LVL446
-	.4byte	.LVL448
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST289:
-	.4byte	.LVL824
-	.4byte	.LVL825
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL825
-	.4byte	.LVL826-1
-	.2byte	0x5
-	.byte	0x3
-	.4byte	gSysFreeQueue
-	.4byte	.LVL826-1
-	.4byte	.LFE330
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST570:
-	.4byte	.LVL2063
-	.4byte	.LVL2065
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2065
-	.4byte	.LFE329
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST571:
-	.4byte	.LVL2063
-	.4byte	.LVL2064
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2064
-	.4byte	.LVL2070-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2070-1
-	.4byte	.LFE329
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST572:
-	.4byte	.LVL2067
-	.4byte	.LVL2071
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2071
-	.4byte	.LVL2072
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2073
-	.4byte	.LFE329
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST573:
-	.4byte	.LVL2074
-	.4byte	.LVL2076
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2076
-	.4byte	.LVL2078
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL2078
-	.4byte	.LVL2079
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2079
-	.4byte	.LFE329
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST574:
-	.4byte	.LVL2066
-	.4byte	.LVL2068
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL2068
-	.4byte	.LVL2069
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST183:
-	.4byte	.LVL438
-	.4byte	.LVL439
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL439
-	.4byte	.LVL440
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL440
-	.4byte	.LVL441
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL441
-	.4byte	.LFE328
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST184:
-	.4byte	.LVL438
-	.4byte	.LVL440
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL440
-	.4byte	.LVL442
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL442
-	.4byte	.LFE328
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST181:
-	.4byte	.LVL434
-	.4byte	.LVL435-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL435-1
-	.4byte	.LFE327
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST182:
-	.4byte	.LVL436
-	.4byte	.LVL437-1
-	.2byte	0x11
-	.byte	0x70
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x3
-	.4byte	c_ftl_nand_planes_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST179:
-	.4byte	.LVL430
-	.4byte	.LVL432-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL432-1
-	.4byte	.LFE326
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST180:
-	.4byte	.LVL431
-	.4byte	.LVL432-1
-	.2byte	0x1a
-	.byte	0x76
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x3
-	.4byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0x75
-	.sleb128 0
-	.byte	0x1e
-	.byte	0x76
-	.sleb128 0
-	.byte	0x75
-	.sleb128 0
-	.byte	0x1d
-	.byte	0x22
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST176:
-	.4byte	.LVL425
-	.4byte	.LVL428-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL428-1
-	.4byte	.LFE325
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST177:
-	.4byte	.LVL425
-	.4byte	.LVL427
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL427
-	.4byte	.LFE325
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST178:
-	.4byte	.LVL426
-	.4byte	.LVL428-1
-	.2byte	0x20
-	.byte	0x77
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x76
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0x3
-	.4byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0x1e
-	.byte	0x76
-	.sleb128 0
-	.byte	0x75
-	.sleb128 0
-	.byte	0x1e
-	.byte	0x77
-	.sleb128 0
-	.byte	0x76
-	.sleb128 0
-	.byte	0x1d
-	.byte	0x22
-	.byte	0x22
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST575:
-	.4byte	.LVL2095
-	.4byte	.LVL2096
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL2103
-	.4byte	.LVL2104
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL2104
-	.4byte	.LVL2105
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL2105
-	.4byte	.LVL2106
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST576:
-	.4byte	.LVL2083
-	.4byte	.LVL2086
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL2096
-	.4byte	.LVL2097
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL2098
-	.4byte	.LVL2099
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST577:
-	.4byte	.LVL2089
-	.4byte	.LVL2094
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2099
-	.4byte	.LVL2101
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2102
-	.4byte	.LVL2103
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST578:
-	.4byte	.LVL2081
-	.4byte	.LVL2093
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2096
-	.4byte	.LVL2103
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2106
-	.4byte	.LVL2107
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST568:
-	.4byte	.LVL2055
-	.4byte	.LVL2061
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2062
-	.4byte	.LFE321
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST569:
-	.4byte	.LVL2056
-	.4byte	.LVL2057
-	.2byte	0x13
-	.byte	0x73
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x76
-	.sleb128 0
-	.byte	0x1e
-	.byte	0x74
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x22
-	.byte	0x3a
-	.byte	0x24
-	.byte	0x9f
-	.4byte	.LVL2057
-	.4byte	.LVL2058
-	.2byte	0x13
-	.byte	0x72
-	.sleb128 15
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x76
-	.sleb128 0
-	.byte	0x1e
-	.byte	0x74
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x22
-	.byte	0x3a
-	.byte	0x24
-	.byte	0x9f
-	.4byte	.LVL2058
-	.4byte	.LVL2059-1
-	.2byte	0x18
-	.byte	0x3
-	.4byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x76
-	.sleb128 0
-	.byte	0x1e
-	.byte	0x74
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x22
-	.byte	0x3a
-	.byte	0x24
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST287:
-	.4byte	.LVL816
-	.4byte	.LVL818
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL818
-	.4byte	.LVL822
-	.2byte	0x4
-	.byte	0x75
-	.sleb128 -1022
-	.byte	0x9f
-	.4byte	.LVL822
-	.4byte	.LFE319
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST288:
-	.4byte	.LVL816
-	.4byte	.LVL817
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL817
-	.4byte	.LVL822
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL822
-	.4byte	.LFE319
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST171:
-	.4byte	.LVL418
-	.4byte	.LVL420-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL420-1
-	.4byte	.LFE317
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST172:
-	.4byte	.LVL419
-	.4byte	.LVL424
-	.2byte	0x10
-	.byte	0x76
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x75
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST173:
-	.4byte	.LVL421
-	.4byte	.LVL422-1
-	.2byte	0x32
-	.byte	0x74
-	.sleb128 0
-	.byte	0x35
-	.byte	0x25
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x32
-	.byte	0x24
-	.byte	0x76
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x75
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x23
-	.uleb128 0x6
-	.byte	0x32
-	.byte	0x24
-	.byte	0x3
-	.4byte	gBbtInfo+4
-	.byte	0x22
-	.byte	0x6
-	.byte	0x22
-	.byte	0x6
-	.byte	0x74
-	.sleb128 0
-	.byte	0x4f
-	.byte	0x1a
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x25
-	.byte	0x31
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST174:
-	.4byte	.LVL421
-	.4byte	.LVL422-1
-	.2byte	0x19
-	.byte	0x76
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x75
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x23
-	.uleb128 0x6
-	.byte	0x32
-	.byte	0x24
-	.byte	0x3
-	.4byte	gBbtInfo+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST175:
-	.4byte	.LVL421
-	.4byte	.LVL423
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST167:
-	.4byte	.LVL410
-	.4byte	.LVL411-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL411-1
-	.4byte	.LFE316
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST168:
-	.4byte	.LVL412
-	.4byte	.LVL417
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST169:
-	.4byte	.LVL414
-	.4byte	.LVL415
-	.2byte	0xa
-	.byte	0x76
-	.sleb128 6
-	.byte	0x32
-	.byte	0x24
-	.byte	0x3
-	.4byte	gBbtInfo+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST170:
-	.4byte	.LVL414
-	.4byte	.LVL416-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST635:
-	.4byte	.LVL2314
-	.4byte	.LVL2316
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2316
-	.4byte	.LVL2317
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL2317
-	.4byte	.LVL2318-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2318-1
-	.4byte	.LVL2336
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL2336
-	.4byte	.LVL2337
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2337
-	.4byte	.LFE309
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST636:
-	.4byte	.LVL2314
-	.4byte	.LVL2316
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2316
-	.4byte	.LVL2317
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	.LVL2317
-	.4byte	.LVL2318-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2318-1
-	.4byte	.LVL2321
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2321
-	.4byte	.LVL2336
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	.LVL2336
-	.4byte	.LFE309
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST637:
-	.4byte	.LVL2314
-	.4byte	.LVL2315
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2315
-	.4byte	.LFE309
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST638:
-	.4byte	.LVL2322
-	.4byte	.LVL2327
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST639:
-	.4byte	.LVL2323
-	.4byte	.LVL2324
-	.2byte	0x21
-	.byte	0x74
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x76
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1c
-	.byte	0x12
-	.byte	0x40
-	.byte	0x4b
-	.byte	0x24
-	.byte	0x22
-	.byte	0x75
-	.sleb128 0
-	.byte	0x16
-	.byte	0x14
-	.byte	0x40
-	.byte	0x4b
-	.byte	0x24
-	.byte	0x22
-	.byte	0x2d
-	.byte	0x28
-	.2byte	0x1
-	.byte	0x16
-	.byte	0x13
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST640:
-	.4byte	.LVL2320
-	.4byte	.LVL2325
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2325
-	.4byte	.LVL2336
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST641:
-	.4byte	.LVL2332
-	.4byte	.LVL2333-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST764:
-	.4byte	.LVL3020
-	.4byte	.LVL3023
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL3023
-	.4byte	.LVL3025
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL3025
-	.4byte	.LVL3027
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL3027
-	.4byte	.LVL3105
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL3105
-	.4byte	.LVL3106
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL3106
-	.4byte	.LFE308
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST765:
-	.4byte	.LVL3020
-	.4byte	.LVL3022
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL3022
-	.4byte	.LVL3025
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL3025
-	.4byte	.LVL3029
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL3029
-	.4byte	.LVL3061
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL3061
-	.4byte	.LVL3063
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	.LVL3063
-	.4byte	.LVL3105
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL3105
-	.4byte	.LVL3107
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL3107
-	.4byte	.LFE308
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST766:
-	.4byte	.LVL3020
-	.4byte	.LVL3021
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL3021
-	.4byte	.LVL3024
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -100
-	.4byte	.LVL3025
-	.4byte	.LVL3028
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL3028
-	.4byte	.LVL3036
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -100
-	.4byte	.LVL3053
-	.4byte	.LVL3063
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -100
-	.4byte	.LVL3063
-	.4byte	.LVL3064
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL3064
-	.4byte	.LVL3067
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -100
-	.4byte	.LVL3105
-	.4byte	.LVL3107
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL3107
-	.4byte	.LFE308
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -100
-	.4byte	0
-	.4byte	0
-.LLST767:
-	.4byte	.LVL3020
-	.4byte	.LVL3024-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL3024-1
-	.4byte	.LVL3024
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -108
-	.4byte	.LVL3025
-	.4byte	.LVL3026
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL3026
-	.4byte	.LVL3036
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -108
-	.4byte	.LVL3053
-	.4byte	.LVL3065
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -108
-	.4byte	.LVL3065
-	.4byte	.LVL3066-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL3066-1
-	.4byte	.LVL3067
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -108
-	.4byte	.LVL3105
-	.4byte	.LFE308
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -108
-	.4byte	0
-	.4byte	0
-.LLST768:
-	.4byte	.LVL3071
-	.4byte	.LVL3100
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	0
-	.4byte	0
-.LLST769:
-	.4byte	.LVL3035
-	.4byte	.LVL3036
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL3036
-	.4byte	.LVL3053
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL3067
-	.4byte	.LVL3105
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST770:
-	.4byte	.LVL3031
-	.4byte	.LVL3032
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL3032
-	.4byte	.LVL3062
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL3062
-	.4byte	.LVL3065
-	.2byte	0x3
-	.byte	0x7a
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL3065
-	.4byte	.LVL3105
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL3107
-	.4byte	.LFE308
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST771:
-	.4byte	.LVL3034
-	.4byte	.LVL3035-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL3035-1
-	.4byte	.LVL3036
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -92
-	.4byte	.LVL3053
-	.4byte	.LVL3055
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL3055
-	.4byte	.LVL3067
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -92
-	.4byte	.LVL3107
-	.4byte	.LFE308
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -92
-	.4byte	0
-	.4byte	0
-.LLST772:
-	.4byte	.LVL3069
-	.4byte	.LVL3070
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL3070
-	.4byte	.LVL3072
-	.2byte	0x2
-	.byte	0x71
-	.sleb128 4
-	.4byte	.LVL3072
-	.4byte	.LVL3073-1
-	.2byte	0xb
-	.byte	0x3
-	.4byte	req_prgm
-	.byte	0x6
-	.byte	0x76
-	.sleb128 0
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x4
-	.4byte	0
-	.4byte	0
-.LLST773:
-	.4byte	.LVL3045
-	.4byte	.LVL3048
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL3048
-	.4byte	.LVL3050
-	.2byte	0x3
-	.byte	0x78
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL3067
-	.4byte	.LVL3089
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL3089
-	.4byte	.LVL3090
-	.2byte	0x3
-	.byte	0x78
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL3090
-	.4byte	.LVL3100
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST774:
-	.4byte	.LVL3034
-	.4byte	.LVL3035-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL3035-1
-	.4byte	.LVL3045
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -104
-	.4byte	.LVL3049
-	.4byte	.LVL3051
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL3051
-	.4byte	.LVL3053
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -104
-	.4byte	.LVL3053
-	.4byte	.LVL3054
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL3054
-	.4byte	.LVL3060
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -104
-	.4byte	.LVL3060
-	.4byte	.LVL3067
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL3100
-	.4byte	.LVL3104
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -104
-	.4byte	.LVL3104
-	.4byte	.LVL3105
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL3107
-	.4byte	.LFE308
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST775:
-	.4byte	.LVL3040
-	.4byte	.LVL3041
-	.2byte	0x22
-	.byte	0x3
-	.4byte	g_active_superblock+7
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x32
-	.byte	0x24
-	.byte	0x12
-	.byte	0x40
-	.byte	0x4b
-	.byte	0x24
-	.byte	0x22
-	.byte	0x91
-	.sleb128 -104
-	.byte	0x6
-	.byte	0x16
-	.byte	0x14
-	.byte	0x40
-	.byte	0x4b
-	.byte	0x24
-	.byte	0x22
-	.byte	0x2d
-	.byte	0x28
-	.2byte	0x1
-	.byte	0x16
-	.byte	0x13
-	.byte	0x9f
-	.4byte	.LVL3041
-	.4byte	.LVL3042
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL3042
-	.4byte	.LVL3045
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -76
-	.4byte	.LVL3046
-	.4byte	.LVL3047
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL3047
-	.4byte	.LVL3048
-	.2byte	0x3
-	.byte	0x78
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL3048
-	.4byte	.LVL3050
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL3100
-	.4byte	.LVL3105
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST776:
-	.4byte	.LVL3035
-	.4byte	.LVL3036
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL3057
-	.4byte	.LVL3058
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL3058
-	.4byte	.LVL3060-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL3074
-	.4byte	.LVL3077
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL3079
-	.4byte	.LVL3081
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL3081
-	.4byte	.LVL3083
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -88
-	.4byte	.LVL3084
-	.4byte	.LVL3086
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -88
-	.4byte	.LVL3091
-	.4byte	.LVL3093
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -88
-	.4byte	0
-	.4byte	0
-.LLST777:
-	.4byte	.LVL3035
-	.4byte	.LVL3036
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL3057
-	.4byte	.LVL3067
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL3075
-	.4byte	.LVL3076
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL3076
-	.4byte	.LVL3077
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -96
-	.4byte	.LVL3079
-	.4byte	.LVL3080
-	.2byte	0x6
-	.byte	0x72
-	.sleb128 0
-	.byte	0x71
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL3080
-	.4byte	.LVL3082
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL3082
-	.4byte	.LVL3083
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -96
-	.4byte	.LVL3084
-	.4byte	.LVL3085
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL3085
-	.4byte	.LVL3086
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -96
-	.4byte	.LVL3091
-	.4byte	.LVL3092
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL3092
-	.4byte	.LVL3093
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -96
-	.4byte	.LVL3107
-	.4byte	.LFE308
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST778:
-	.4byte	.LVL3035
-	.4byte	.LVL3053
-	.2byte	0x6
-	.byte	0x3
-	.4byte	g_active_superblock
-	.byte	0x9f
-	.4byte	.LVL3067
-	.4byte	.LVL3105
-	.2byte	0x6
-	.byte	0x3
-	.4byte	g_active_superblock
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST625:
-	.4byte	.LVL2286
-	.4byte	.LVL2291
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2291
-	.4byte	.LVL2292
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL2292
-	.4byte	.LFE306
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST626:
-	.4byte	.LVL2286
-	.4byte	.LVL2290
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2290
-	.4byte	.LVL2312
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL2312
-	.4byte	.LFE306
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST627:
-	.4byte	.LVL2286
-	.4byte	.LVL2289
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2289
-	.4byte	.LFE306
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST628:
-	.4byte	.LVL2286
-	.4byte	.LVL2287
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2287
-	.4byte	.LVL2312
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2312
-	.4byte	.LFE306
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST629:
-	.4byte	.LVL2292
-	.4byte	.LVL2312
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST630:
-	.4byte	.LVL2302
-	.4byte	.LVL2303-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2303-1
-	.4byte	.LVL2309
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -44
-	.4byte	0
-	.4byte	0
-.LLST631:
-	.4byte	.LVL2293
-	.4byte	.LVL2294
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2304
-	.4byte	.LVL2305
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST632:
-	.4byte	.LVL2288
-	.4byte	.LVL2312
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST633:
-	.4byte	.LVL2301
-	.4byte	.LVL2303-1
-	.2byte	0x2
-	.byte	0x75
-	.sleb128 12
-	.4byte	0
-	.4byte	0
-.LLST634:
-	.4byte	.LVL2286
-	.4byte	.LVL2288
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2288
-	.4byte	.LVL2312
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST746:
-	.4byte	.LVL2960
-	.4byte	.LVL2963
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2963
-	.4byte	.LVL2966
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL2966
-	.4byte	.LVL2969
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2969
-	.4byte	.LVL3018
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL3018
-	.4byte	.LVL3019
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL3019
-	.4byte	.LFE305
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST747:
-	.4byte	.LVL2960
-	.4byte	.LVL2962
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2962
-	.4byte	.LVL2966
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2966
-	.4byte	.LVL2970-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2970-1
-	.4byte	.LVL3018
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL3018
-	.4byte	.LFE305
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST748:
-	.4byte	.LVL2960
-	.4byte	.LVL2961
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2961
-	.4byte	.LVL2966
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -68
-	.4byte	.LVL2966
-	.4byte	.LVL2968
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2968
-	.4byte	.LFE305
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -68
-	.4byte	0
-	.4byte	0
-.LLST749:
-	.4byte	.LVL2960
-	.4byte	.LVL2964-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2964-1
-	.4byte	.LVL2966
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2966
-	.4byte	.LVL2967
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2967
-	.4byte	.LFE305
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST750:
-	.4byte	.LVL2960
-	.4byte	.LVL2965
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2966
-	.4byte	.LVL2978
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL3018
-	.4byte	.LFE305
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST751:
-	.4byte	.LVL2972
-	.4byte	.LVL2973
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2973
-	.4byte	.LVL3018
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -80
-	.4byte	0
-	.4byte	0
-.LLST752:
-	.4byte	.LVL2975
-	.4byte	.LVL2978
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2978
-	.4byte	.LVL3018
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -76
-	.4byte	0
-	.4byte	0
-.LLST753:
-	.4byte	.LVL3001
-	.4byte	.LVL3002
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL3002
-	.4byte	.LVL3003-1
-	.2byte	0x12
-	.byte	0x3
-	.4byte	c_ftl_nand_sec_pre_page
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x74
-	.sleb128 0
-	.byte	0x1e
-	.byte	0x78
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST754:
-	.4byte	.LVL2976
-	.4byte	.LVL2978
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -80
-	.4byte	.LVL2978
-	.4byte	.LVL3018
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST755:
-	.4byte	.LVL2987
-	.4byte	.LVL2988
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2988
-	.4byte	.LVL3000
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL3014
-	.4byte	.LVL3018
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST756:
-	.4byte	.LVL2976
-	.4byte	.LVL2978
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2978
-	.4byte	.LVL2999
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL3000
-	.4byte	.LVL3018
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST757:
-	.4byte	.LVL2976
-	.4byte	.LVL2977
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2977
-	.4byte	.LVL2978
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2978
-	.4byte	.LVL2980
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -92
-	.4byte	.LVL2980
-	.4byte	.LVL2981-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2981-1
-	.4byte	.LVL2984
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -92
-	.4byte	.LVL2984
-	.4byte	.LVL2985
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL2985
-	.4byte	.LVL2986
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2986
-	.4byte	.LVL3018
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -92
-	.4byte	0
-	.4byte	0
-.LLST758:
-	.4byte	.LVL2978
-	.4byte	.LVL3007
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -64
-	.4byte	.LVL3007
-	.4byte	.LVL3010
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL3010
-	.4byte	.LVL3018
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -64
-	.4byte	0
-	.4byte	0
-.LLST759:
-	.4byte	.LVL2966
-	.4byte	.LVL2978
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2978
-	.4byte	.LVL3007
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -72
-	.4byte	.LVL3007
-	.4byte	.LVL3008
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL3008
-	.4byte	.LVL3009
-	.2byte	0x6
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x71
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL3009
-	.4byte	.LVL3010
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL3010
-	.4byte	.LVL3018
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -72
-	.4byte	.LVL3018
-	.4byte	.LFE305
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST760:
-	.4byte	.LVL2966
-	.4byte	.LVL2978
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2978
-	.4byte	.LVL3012
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	.LVL3012
-	.4byte	.LVL3013
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL3013
-	.4byte	.LVL3018
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	.LVL3018
-	.4byte	.LFE305
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST761:
-	.4byte	.LVL2982
-	.4byte	.LVL2983
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL3000
-	.4byte	.LVL3005
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST762:
-	.4byte	.LVL2993
-	.4byte	.LVL2994
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2994
-	.4byte	.LVL2995
-	.2byte	0x7
-	.byte	0xa
-	.2byte	0x802
-	.byte	0x73
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL2995
-	.4byte	.LVL2996
-	.2byte	0x7
-	.byte	0xa
-	.2byte	0x801
-	.byte	0x73
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL3015
-	.4byte	.LVL3016
-	.2byte	0x7
-	.byte	0xa
-	.2byte	0x801
-	.byte	0x73
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL3016
-	.4byte	.LVL3018
-	.2byte	0x8
-	.byte	0xa
-	.2byte	0x802
-	.byte	0x91
-	.sleb128 -48
-	.byte	0x6
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST763:
-	.4byte	.LVL2992
-	.4byte	.LVL2997
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL3015
-	.4byte	.LVL3018
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	0
-	.4byte	0
-.LLST798:
-	.4byte	.LVL3190
-	.4byte	.LVL3192
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL3194
-	.4byte	.LVL3195
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL3207
-	.4byte	.LVL3209
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL3212
-	.4byte	.LVL3213
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL3217
-	.4byte	.LVL3218
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL3220
-	.4byte	.LVL3221
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL3221
-	.4byte	.LVL3222-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL3224
-	.4byte	.LVL3225
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST799:
-	.4byte	.LVL3194
-	.4byte	.LVL3200
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL3221
-	.4byte	.LVL3223
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL3224
-	.4byte	.LVL3225
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST800:
-	.4byte	.LVL3188
-	.4byte	.LVL3191
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL3191
-	.4byte	.LVL3193
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL3207
-	.4byte	.LVL3210
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL3211
-	.4byte	.LVL3216
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL3216
-	.4byte	.LVL3217
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST801:
-	.4byte	.LVL3186
-	.4byte	.LVL3187
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL3187
-	.4byte	.LVL3189
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL3205
-	.4byte	.LVL3206
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL3206
-	.4byte	.LVL3207
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST528:
-	.4byte	.LVL1815
-	.4byte	.LVL1818
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1818
-	.4byte	.LVL1874
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1874
-	.4byte	.LFE300
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST529:
-	.4byte	.LVL1815
-	.4byte	.LVL1816
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1816
-	.4byte	.LVL1874
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	.LVL1874
-	.4byte	.LFE300
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST530:
-	.4byte	.LVL1817
-	.4byte	.LVL1821
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1821
-	.4byte	.LVL1837
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1838
-	.4byte	.LVL1848
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1849
-	.4byte	.LVL1851
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1852
-	.4byte	.LVL1867
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1868
-	.4byte	.LVL1874
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST531:
-	.4byte	.LVL1817
-	.4byte	.LVL1821
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1821
-	.4byte	.LVL1826
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1826
-	.4byte	.LVL1827
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1827
-	.4byte	.LVL1837
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1838
-	.4byte	.LVL1843
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1844
-	.4byte	.LVL1862
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1863
-	.4byte	.LVL1874
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST532:
-	.4byte	.LVL1820
-	.4byte	.LVL1821
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1821
-	.4byte	.LVL1822
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1824
-	.4byte	.LVL1826
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1826
-	.4byte	.LVL1827
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1827
-	.4byte	.LVL1828
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1828
-	.4byte	.LVL1829
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1831
-	.4byte	.LVL1832
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1832
-	.4byte	.LVL1835
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1836
-	.4byte	.LVL1837
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1838
-	.4byte	.LVL1845
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1845
-	.4byte	.LVL1846
-	.2byte	0x3
-	.byte	0x7a
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1847
-	.4byte	.LVL1850
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1850
-	.4byte	.LVL1853
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1853
-	.4byte	.LVL1854
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1855
-	.4byte	.LVL1857
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1857
-	.4byte	.LVL1864
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1864
-	.4byte	.LVL1865
-	.2byte	0x3
-	.byte	0x7b
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1866
-	.4byte	.LVL1869
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1869
-	.4byte	.LVL1870
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1871
-	.4byte	.LVL1872
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1872
-	.4byte	.LVL1873
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST533:
-	.4byte	.LVL1840
-	.4byte	.LVL1841-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1859
-	.4byte	.LVL1860-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST534:
-	.4byte	.LVL1815
-	.4byte	.LVL1825
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL1838
-	.4byte	.LVL1856
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL1856
-	.4byte	.LVL1857
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -44
-	.4byte	.LVL1874
-	.4byte	.LFE300
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST535:
-	.4byte	.LVL1815
-	.4byte	.LVL1826
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1826
-	.4byte	.LVL1833
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1834
-	.4byte	.LVL1836
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1838
-	.4byte	.LVL1857
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1857
-	.4byte	.LVL1871
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1874
-	.4byte	.LFE300
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST536:
-	.4byte	.LVL1815
-	.4byte	.LVL1825
-	.2byte	0x2
-	.byte	0x36
-	.byte	0x9f
-	.4byte	.LVL1838
-	.4byte	.LVL1856
-	.2byte	0x2
-	.byte	0x36
-	.byte	0x9f
-	.4byte	.LVL1856
-	.4byte	.LVL1857
-	.2byte	0x7
-	.byte	0x91
-	.sleb128 -44
-	.byte	0x94
-	.byte	0x2
-	.byte	0x32
-	.byte	0x25
-	.byte	0x9f
-	.4byte	.LVL1874
-	.4byte	.LFE300
-	.2byte	0x2
-	.byte	0x36
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST537:
-	.4byte	.LVL1815
-	.4byte	.LVL1819
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1819
-	.4byte	.LVL1825
-	.2byte	0xa
-	.byte	0x91
-	.sleb128 -44
-	.byte	0x94
-	.byte	0x1
-	.byte	0x30
-	.byte	0x2e
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL1838
-	.4byte	.LVL1855
-	.2byte	0xa
-	.byte	0x91
-	.sleb128 -44
-	.byte	0x94
-	.byte	0x1
-	.byte	0x30
-	.byte	0x2e
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL1855
-	.4byte	.LVL1857
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL1874
-	.4byte	.LFE300
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST538:
-	.4byte	.LVL1815
-	.4byte	.LVL1821
-	.2byte	0x5
-	.byte	0x3
-	.4byte	gMultiPageProgEn
-	.4byte	.LVL1821
-	.4byte	.LVL1837
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -36
-	.4byte	.LVL1838
-	.4byte	.LVL1874
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -36
-	.4byte	.LVL1874
-	.4byte	.LFE300
-	.2byte	0x5
-	.byte	0x3
-	.4byte	gMultiPageProgEn
-	.4byte	0
-	.4byte	0
-.LLST429:
-	.4byte	.LVL1378
-	.4byte	.LVL1379
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL1379
-	.4byte	.LVL1380
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1381
-	.4byte	.LVL1383
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST430:
-	.4byte	.LVL1322
-	.4byte	.LVL1328
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1328
-	.4byte	.LVL1336
-	.2byte	0x7
-	.byte	0x75
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL1337
-	.4byte	.LVL1339
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1344
-	.4byte	.LVL1345
-	.2byte	0xe
-	.byte	0x3
-	.4byte	c_ftl_nand_blk_pre_plane
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x31
-	.byte	0x24
-	.byte	0x9f
-	.4byte	.LVL1345
-	.4byte	.LVL1346-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1347
-	.4byte	.LVL1348
-	.2byte	0x9
-	.byte	0x3
-	.4byte	c_ftl_nand_max_map_blks
-	.byte	0x6
-	.byte	0x31
-	.byte	0x24
-	.byte	0x9f
-	.4byte	.LVL1348
-	.4byte	.LVL1351
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1357
-	.4byte	.LVL1358
-	.2byte	0xe
-	.byte	0x3
-	.4byte	c_ftl_nand_map_region_num
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x32
-	.byte	0x24
-	.byte	0x9f
-	.4byte	.LVL1358
-	.4byte	.LVL1361
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1362
-	.4byte	.LVL1363
-	.2byte	0x9
-	.byte	0x3
-	.4byte	c_ftl_nand_max_map_blks
-	.byte	0x6
-	.byte	0x32
-	.byte	0x24
-	.byte	0x9f
-	.4byte	.LVL1363
-	.4byte	.LVL1364-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1365
-	.4byte	.LVL1366
-	.2byte	0xe
-	.byte	0x3
-	.4byte	c_ftl_nand_l2pmap_ram_region_num
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x3c
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL1366
-	.4byte	.LVL1367-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1368
-	.4byte	.LVL1369
-	.2byte	0x18
-	.byte	0x3
-	.4byte	c_ftl_nand_l2pmap_ram_region_num
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x3
-	.4byte	c_ftl_nand_byte_pre_page
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL1369
-	.4byte	.LVL1370-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1371
-	.4byte	.LVL1372
-	.2byte	0xe
-	.byte	0x3
-	.4byte	c_ftl_nand_blk_pre_plane
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL1372
-	.4byte	.LVL1373-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1374
-	.4byte	.LVL1375
-	.2byte	0x11
-	.byte	0x3
-	.4byte	c_ftl_nand_die_num
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x70
-	.sleb128 0
-	.byte	0x1e
-	.byte	0x32
-	.byte	0x24
-	.byte	0x9f
-	.4byte	.LVL1375
-	.4byte	.LVL1376
-	.2byte	0x1e
-	.byte	0x3
-	.4byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x23
-	.uleb128 0x1f
-	.byte	0x35
-	.byte	0x26
-	.byte	0x3
-	.4byte	c_ftl_nand_die_num
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x32
-	.byte	0x24
-	.byte	0x9f
-	.4byte	.LVL1376
-	.4byte	.LVL1377-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST162:
-	.4byte	.LVL381
-	.4byte	.LVL382
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL382
-	.4byte	.LVL396
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL396
-	.4byte	.LFE296
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST163:
-	.4byte	.LVL383
-	.4byte	.LVL384
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL384
-	.4byte	.LVL386
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL387
-	.4byte	.LVL393
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL400
-	.4byte	.LVL401
-	.2byte	0x1f
-	.byte	0x70
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x23
-	.uleb128 0x18
-	.byte	0x31
-	.byte	0x24
-	.byte	0x73
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x32
-	.byte	0x24
-	.byte	0x22
-	.byte	0x70
-	.sleb128 0
-	.byte	0x33
-	.byte	0x25
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x4
-	.byte	0x9f
-	.4byte	.LVL401
-	.4byte	.LVL402
-	.2byte	0x29
-	.byte	0x3
-	.4byte	c_ftl_nand_data_blks_per_plane
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x23
-	.uleb128 0x18
-	.byte	0x31
-	.byte	0x24
-	.byte	0x73
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x32
-	.byte	0x24
-	.byte	0x22
-	.byte	0x3
-	.4byte	c_ftl_nand_data_blks_per_plane
-	.byte	0x94
-	.byte	0x2
-	.byte	0x33
-	.byte	0x25
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x4
-	.byte	0x9f
-	.4byte	.LVL402
-	.4byte	.LVL403
-	.2byte	0x2e
-	.byte	0x3
-	.4byte	c_ftl_nand_data_blks_per_plane
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x23
-	.uleb128 0x18
-	.byte	0x31
-	.byte	0x24
-	.byte	0x3
-	.4byte	c_ftl_nand_map_region_num
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x32
-	.byte	0x24
-	.byte	0x22
-	.byte	0x3
-	.4byte	c_ftl_nand_data_blks_per_plane
-	.byte	0x94
-	.byte	0x2
-	.byte	0x33
-	.byte	0x25
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x4
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST164:
-	.4byte	.LVL388
-	.4byte	.LVL392
-	.2byte	0x1
-	.byte	0x5c
-	.4byte	0
-	.4byte	0
-.LLST161:
-	.4byte	.LVL378
-	.4byte	.LVL379
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL379
-	.4byte	.LVL380
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL380
-	.4byte	.LFE295
-	.2byte	0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_sys_blks_per_plane
-	.4byte	0
-	.4byte	0
-.LLST158:
-	.4byte	.LVL370
-	.4byte	.LVL374
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL374
-	.4byte	.LVL375
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL375
-	.4byte	.LFE293
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST159:
-	.4byte	.LVL370
-	.4byte	.LVL371
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL372
-	.4byte	.LVL373
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL373
-	.4byte	.LVL375
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL375
-	.4byte	.LVL376
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL376
-	.4byte	.LFE293
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST160:
-	.4byte	.LVL370
-	.4byte	.LVL371
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL372
-	.4byte	.LFE293
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST319:
-	.4byte	.LVL940
-	.4byte	.LVL948
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL948
-	.4byte	.LVL979
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL979
-	.4byte	.LVL980
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL980
-	.4byte	.LVL987
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL987
-	.4byte	.LVL990-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL990-1
-	.4byte	.LFE292
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST320:
-	.4byte	.LVL940
-	.4byte	.LVL947
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL947
-	.4byte	.LVL979
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	.LVL979
-	.4byte	.LVL980
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL980
-	.4byte	.LVL987
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	.LVL987
-	.4byte	.LVL989
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL989
-	.4byte	.LFE292
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST321:
-	.4byte	.LVL940
-	.4byte	.LVL946
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL946
-	.4byte	.LVL979
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	.LVL979
-	.4byte	.LVL980
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL980
-	.4byte	.LVL987
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	.LVL987
-	.4byte	.LVL988
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL988
-	.4byte	.LFE292
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST322:
-	.4byte	.LVL940
-	.4byte	.LVL942
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL942
-	.4byte	.LVL952
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL952
-	.4byte	.LVL978
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.4byte	.LVL978
-	.4byte	.LFE292
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST323:
-	.4byte	.LVL940
-	.4byte	.LVL944
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 0
-	.4byte	.LVL944
-	.4byte	.LVL945
-	.2byte	0x4
-	.byte	0x91
-	.sleb128 -96
-	.byte	0x9f
-	.4byte	.LVL945
-	.4byte	.LVL954
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL978
-	.4byte	.LVL979
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL979
-	.4byte	.LFE292
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 0
-	.4byte	0
-	.4byte	0
-.LLST324:
-	.4byte	.LVL940
-	.4byte	.LVL957
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL957
-	.4byte	.LVL960
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL960
-	.4byte	.LVL962
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL963
-	.4byte	.LVL970
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL970
-	.4byte	.LVL977
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL978
-	.4byte	.LVL991
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL991
-	.4byte	.LVL999
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST325:
-	.4byte	.LVL953
-	.4byte	.LVL954
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL954
-	.4byte	.LVL957
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL957
-	.4byte	.LVL958
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL963
-	.4byte	.LVL964
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL964
-	.4byte	.LVL969
-	.2byte	0x3
-	.byte	0x71
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL969
-	.4byte	.LVL970
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL970
-	.4byte	.LVL978
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL980
-	.4byte	.LVL981
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL982
-	.4byte	.LVL984
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL984
-	.4byte	.LVL986
-	.2byte	0x3
-	.byte	0x78
-	.sleb128 -2
-	.byte	0x9f
-	.4byte	.LVL986
-	.4byte	.LVL987
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL990
-	.4byte	.LVL991
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL991
-	.4byte	.LVL992
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL992
-	.4byte	.LVL997
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 -2
-	.byte	0x9f
-	.4byte	.LVL997
-	.4byte	.LVL998
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL998
-	.4byte	.LFE292
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 -2
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST326:
-	.4byte	.LVL941
-	.4byte	.LVL942
-	.2byte	0xb
-	.byte	0x73
-	.sleb128 0
-	.byte	0x8
-	.byte	0x3f
-	.byte	0x1a
-	.byte	0x30
-	.byte	0x29
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL942
-	.4byte	.LVL952
-	.2byte	0xb
-	.byte	0x77
-	.sleb128 0
-	.byte	0x8
-	.byte	0x3f
-	.byte	0x1a
-	.byte	0x30
-	.byte	0x29
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL952
-	.4byte	.LVL978
-	.2byte	0xc
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x8
-	.byte	0x3f
-	.byte	0x1a
-	.byte	0x30
-	.byte	0x29
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL978
-	.4byte	.LFE292
-	.2byte	0xb
-	.byte	0x77
-	.sleb128 0
-	.byte	0x8
-	.byte	0x3f
-	.byte	0x1a
-	.byte	0x30
-	.byte	0x29
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST327:
-	.4byte	.LVL953
-	.4byte	.LVL957
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL963
-	.4byte	.LVL970
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST328:
-	.4byte	.LVL965
-	.4byte	.LVL968
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST329:
-	.4byte	.LVL953
-	.4byte	.LVL955
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL955
-	.4byte	.LVL956
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 -4
-	.byte	0x9f
-	.4byte	.LVL963
-	.4byte	.LVL965
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 -4
-	.byte	0x9f
-	.4byte	.LVL965
-	.4byte	.LVL966
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 -3
-	.byte	0x9f
-	.4byte	.LVL966
-	.4byte	.LVL967
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 -2
-	.byte	0x9f
-	.4byte	.LVL967
-	.4byte	.LVL969
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL969
-	.4byte	.LVL970
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST330:
-	.4byte	.LVL971
-	.4byte	.LVL972
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL972
-	.4byte	.LVL973
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL975
-	.4byte	.LVL976
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST331:
-	.4byte	.LVL961
-	.4byte	.LVL963
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST311:
-	.4byte	.LVL917
-	.4byte	.LVL921
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL921
-	.4byte	.LVL927
-	.2byte	0x4
-	.byte	0x76
-	.sleb128 -512
-	.byte	0x9f
-	.4byte	.LVL927
-	.4byte	.LFE291
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST312:
-	.4byte	.LVL917
-	.4byte	.LVL922
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL922
-	.4byte	.LVL929
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	.LVL929
-	.4byte	.LVL930
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL930
-	.4byte	.LVL936
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	.LVL936
-	.4byte	.LVL937
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL937
-	.4byte	.LFE291
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST313:
-	.4byte	.LVL917
-	.4byte	.LVL919
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL919
-	.4byte	.LFE291
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST314:
-	.4byte	.LVL917
-	.4byte	.LVL923-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL923-1
-	.4byte	.LVL923
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL923
-	.4byte	.LVL927
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.4byte	.LVL927
-	.4byte	.LVL928-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL928-1
-	.4byte	.LVL929
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.4byte	.LVL929
-	.4byte	.LVL932-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL932-1
-	.4byte	.LVL932
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL932
-	.4byte	.LVL936
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.4byte	.LVL936
-	.4byte	.LVL939-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL939-1
-	.4byte	.LFE291
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST315:
-	.4byte	.LVL917
-	.4byte	.LVL927
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 0
-	.4byte	.LVL927
-	.4byte	.LFE291
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 0
-	.4byte	0
-	.4byte	0
-.LLST316:
-	.4byte	.LVL919
-	.4byte	.LVL921
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL921
-	.4byte	.LVL923
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL923
-	.4byte	.LVL924
-	.2byte	0xb
-	.byte	0x74
-	.sleb128 0
-	.byte	0x39
-	.byte	0x24
-	.byte	0x76
-	.sleb128 0
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0xe00
-	.byte	0x9f
-	.4byte	.LVL927
-	.4byte	.LVL928-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL928-1
-	.4byte	.LVL929
-	.2byte	0xc
-	.byte	0x74
-	.sleb128 0
-	.byte	0x39
-	.byte	0x24
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x1000
-	.byte	0x9f
-	.4byte	.LVL929
-	.4byte	.LVL931
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL931
-	.4byte	.LVL932
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL932
-	.4byte	.LVL933
-	.2byte	0xc
-	.byte	0x74
-	.sleb128 0
-	.byte	0x39
-	.byte	0x24
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x1000
-	.byte	0x9f
-	.4byte	.LVL936
-	.4byte	.LVL938
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL938
-	.4byte	.LVL939-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL939-1
-	.4byte	.LFE291
-	.2byte	0xc
-	.byte	0x74
-	.sleb128 0
-	.byte	0x39
-	.byte	0x24
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x1000
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST317:
-	.4byte	.LVL925
-	.4byte	.LVL926
-	.2byte	0x30
-	.byte	0x91
-	.sleb128 0
-	.byte	0x6
-	.byte	0x23
-	.uleb128 0x2
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x40
-	.byte	0x24
-	.byte	0x91
-	.sleb128 0
-	.byte	0x6
-	.byte	0x23
-	.uleb128 0x1
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x38
-	.byte	0x24
-	.byte	0x21
-	.byte	0x91
-	.sleb128 0
-	.byte	0x6
-	.byte	0x23
-	.uleb128 0x3
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x48
-	.byte	0x24
-	.byte	0x21
-	.byte	0x91
-	.sleb128 0
-	.byte	0x6
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x21
-	.byte	0x9f
-	.4byte	.LVL934
-	.4byte	.LVL935
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST318:
-	.4byte	.LVL918
-	.4byte	.LVL927
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 0
-	.4byte	.LVL927
-	.4byte	.LFE291
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST156:
-	.4byte	.LVL361
-	.4byte	.LVL363
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL363
-	.4byte	.LFE290
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST157:
-	.4byte	.LVL364
-	.4byte	.LVL365
-	.2byte	0x3
-	.byte	0x71
-	.sleb128 28
-	.byte	0x9f
-	.4byte	.LVL366
-	.4byte	.LVL369
-	.2byte	0x3
-	.byte	0x71
-	.sleb128 28
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST142:
-	.4byte	.LVL329
-	.4byte	.LVL334
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL334
-	.4byte	.LVL336
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL336
-	.4byte	.LVL339
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL352
-	.4byte	.LVL353
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST143:
-	.4byte	.LVL329
-	.4byte	.LVL330
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL330
-	.4byte	.LFE289
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST144:
-	.4byte	.LVL329
-	.4byte	.LVL346
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL346
-	.4byte	.LVL352
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	.LVL352
-	.4byte	.LVL356
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL356
-	.4byte	.LFE289
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST145:
-	.4byte	.LVL329
-	.4byte	.LVL341
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL341
-	.4byte	.LVL352
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.4byte	.LVL352
-	.4byte	.LVL353
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL353
-	.4byte	.LFE289
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST146:
-	.4byte	.LVL329
-	.4byte	.LVL352
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 0
-	.4byte	.LVL352
-	.4byte	.LFE289
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 0
-	.4byte	0
-	.4byte	0
-.LLST147:
-	.4byte	.LVL329
-	.4byte	.LVL352
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 4
-	.4byte	.LVL352
-	.4byte	.LFE289
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 4
-	.4byte	0
-	.4byte	0
-.LLST148:
-	.4byte	.LVL335
-	.4byte	.LVL352
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL353
-	.4byte	.LFE289
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST149:
-	.4byte	.LVL337
-	.4byte	.LVL338
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL340
-	.4byte	.LVL343
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL344
-	.4byte	.LVL352
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL353
-	.4byte	.LFE289
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST150:
-	.4byte	.LVL331
-	.4byte	.LVL346
-	.2byte	0x1
-	.byte	0x5c
-	.4byte	.LVL353
-	.4byte	.LVL356
-	.2byte	0x1
-	.byte	0x5c
-	.4byte	0
-	.4byte	0
-.LLST151:
-	.4byte	.LVL333
-	.4byte	.LVL352
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL353
-	.4byte	.LFE289
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST152:
-	.4byte	.LVL348
-	.4byte	.LVL349
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL349
-	.4byte	.LVL350-1
-	.2byte	0x5
-	.byte	0x3
-	.4byte	gMasterInfo+20
-	.4byte	0
-	.4byte	0
-.LLST153:
-	.4byte	.LVL354
-	.4byte	.LVL356
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL356
-	.4byte	.LVL360
-	.2byte	0x1
-	.byte	0x5c
-	.4byte	0
-	.4byte	0
-.LLST154:
-	.4byte	.LVL345
-	.4byte	.LVL346
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 4
-	.4byte	.LVL353
-	.4byte	.LVL356
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 4
-	.4byte	.LVL356
-	.4byte	.LVL357
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL357
-	.4byte	.LVL358
-	.2byte	0x3
-	.byte	0x70
-	.sleb128 -4
-	.byte	0x9f
-	.4byte	.LVL358
-	.4byte	.LVL360
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST155:
-	.4byte	.LVL354
-	.4byte	.LVL355
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL355
-	.4byte	.LVL360
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -48
-	.4byte	0
-	.4byte	0
-.LLST141:
-	.4byte	.LVL324
-	.4byte	.LVL325
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL326
-	.4byte	.LFE287
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST139:
-	.4byte	.LVL319
-	.4byte	.LVL320
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL320
-	.4byte	.LFE283
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST140:
-	.4byte	.LVL319
-	.4byte	.LVL320
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL320
-	.4byte	.LFE283
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST137:
-	.4byte	.LVL310
-	.4byte	.LVL312
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL313
-	.4byte	.LVL315
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST138:
-	.4byte	.LVL306
-	.4byte	.LVL307
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL308
-	.4byte	.LFE280
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST101:
-	.4byte	.LVL195
-	.4byte	.LVL196
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL196
-	.4byte	.LFE277
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST102:
-	.4byte	.LVL196
-	.4byte	.LVL198
-	.2byte	0x9
-	.byte	0xc
-	.4byte	0x186a0
-	.byte	0x74
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL198
-	.4byte	.LVL199
-	.2byte	0x9
-	.byte	0xc
-	.4byte	0x186a1
-	.byte	0x74
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL199
-	.4byte	.LVL200
-	.2byte	0x9
-	.byte	0xc
-	.4byte	0x186a0
-	.byte	0x74
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL201
-	.4byte	.LFE277
-	.2byte	0x9
-	.byte	0xc
-	.4byte	0x186a0
-	.byte	0x74
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST103:
-	.4byte	.LVL196
-	.4byte	.LVL197
-	.2byte	0x3
-	.byte	0x8
-	.byte	0x64
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST85:
-	.4byte	.LVL152
-	.4byte	.LVL153
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL153
-	.4byte	.LVL155
-	.2byte	0xd
-	.byte	0x70
-	.sleb128 0
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST84:
-	.4byte	.LVL147
-	.4byte	.LVL149
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL149
-	.4byte	.LVL150
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 4
-	.4byte	.LVL150
-	.4byte	.LFE274
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST82:
-	.4byte	.LVL138
-	.4byte	.LVL145
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL145
-	.4byte	.LVL146
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL146
-	.4byte	.LFE273
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST83:
-	.4byte	.LVL139
-	.4byte	.LVL140
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL141
-	.4byte	.LVL143
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL144
-	.4byte	.LFE273
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST81:
-	.4byte	.LVL136
-	.4byte	.LVL137
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST80:
-	.4byte	.LVL133
-	.4byte	.LVL134
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL134
-	.4byte	.LFE271
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST79:
-	.4byte	.LVL131
-	.4byte	.LVL132
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL132
-	.4byte	.LFE270
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST424:
-	.4byte	.LVL1307
-	.4byte	.LVL1315
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1315
-	.4byte	.LFE267
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST425:
-	.4byte	.LVL1307
-	.4byte	.LVL1308
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1308
-	.4byte	.LVL1309
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL1309
-	.4byte	.LVL1310
-	.2byte	0x2
-	.byte	0x32
-	.byte	0x9f
-	.4byte	.LVL1310
-	.4byte	.LVL1311
-	.2byte	0x2
-	.byte	0x33
-	.byte	0x9f
-	.4byte	.LVL1311
-	.4byte	.LFE267
-	.2byte	0x2
-	.byte	0x34
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST426:
-	.4byte	.LVL1312
-	.4byte	.LVL1313
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1314
-	.4byte	.LVL1316
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST427:
-	.4byte	.LVL1317
-	.4byte	.LVL1318
-	.2byte	0x3
-	.byte	0x8
-	.byte	0x28
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST284:
-	.4byte	.LVL809
-	.4byte	.LVL811-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL811-1
-	.4byte	.LFE266
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST285:
-	.4byte	.LVL812
-	.4byte	.LVL813
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL813
-	.4byte	.LVL815
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST286:
-	.4byte	.LVL810
-	.4byte	.LVL811-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL811-1
-	.4byte	.LFE266
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST790:
-	.4byte	.LVL3133
-	.4byte	.LVL3134
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL3134
-	.4byte	.LFE265
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST791:
-	.4byte	.LVL3133
-	.4byte	.LVL3135-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL3135-1
-	.4byte	.LFE265
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST792:
-	.4byte	.LVL3133
-	.4byte	.LVL3137
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL3138
-	.4byte	.LVL3139
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL3139
-	.4byte	.LVL3140
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL3141
-	.4byte	.LVL3142
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL3142
-	.4byte	.LVL3143
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL3143
-	.4byte	.LFE265
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST793:
-	.4byte	.LVL3135
-	.4byte	.LVL3136
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL3136
-	.4byte	.LVL3137
-	.2byte	0x3
-	.byte	0x70
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL3139
-	.4byte	.LVL3140
-	.2byte	0x3
-	.byte	0x70
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST122:
-	.4byte	.LVL252
-	.4byte	.LVL253
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL253
-	.4byte	.LVL257
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL257
-	.4byte	.LVL259-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL259-1
-	.4byte	.LFE263
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST123:
-	.4byte	.LVL252
-	.4byte	.LVL253
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL253
-	.4byte	.LVL257
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL257
-	.4byte	.LVL258
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL258
-	.4byte	.LFE263
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	0
-	.4byte	0
-.LLST124:
-	.4byte	.LVL252
-	.4byte	.LVL253
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL253
-	.4byte	.LVL257
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL257
-	.4byte	.LVL259-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL259-1
-	.4byte	.LFE263
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST125:
-	.4byte	.LVL253
-	.4byte	.LVL254
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL255
-	.4byte	.LVL256
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL260
-	.4byte	.LVL270
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL273
-	.4byte	.LVL279
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL279
-	.4byte	.LFE263
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST127:
-	.4byte	.LVL262
-	.4byte	.LVL263
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL263
-	.4byte	.LVL275
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST128:
-	.4byte	.LVL267
-	.4byte	.LVL275
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST516:
-	.4byte	.LVL1758
-	.4byte	.LVL1762
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1762
-	.4byte	.LVL1764
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1764
-	.4byte	.LVL1765
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1765
-	.4byte	.LVL1766-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1766-1
-	.4byte	.LVL1766
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1766
-	.4byte	.LVL1767
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1767
-	.4byte	.LVL1796
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1796
-	.4byte	.LFE262
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST517:
-	.4byte	.LVL1758
-	.4byte	.LVL1762
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1762
-	.4byte	.LVL1765
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -96
-	.4byte	.LVL1765
-	.4byte	.LVL1766-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1766-1
-	.4byte	.LFE262
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -96
-	.4byte	0
-	.4byte	0
-.LLST518:
-	.4byte	.LVL1758
-	.4byte	.LVL1762
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1762
-	.4byte	.LVL1765
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1765
-	.4byte	.LVL1766-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1766-1
-	.4byte	.LFE262
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST519:
-	.4byte	.LVL1758
-	.4byte	.LVL1761
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1761
-	.4byte	.LVL1765
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -84
-	.4byte	.LVL1765
-	.4byte	.LVL1766-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1766-1
-	.4byte	.LFE262
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -84
-	.4byte	0
-	.4byte	0
-.LLST520:
-	.4byte	.LVL1762
-	.4byte	.LVL1763
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1763
-	.4byte	.LVL1764
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1767
-	.4byte	.LVL1786
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1787
-	.4byte	.LVL1792
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1792
-	.4byte	.LVL1796
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1796
-	.4byte	.LFE262
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST521:
-	.4byte	.LVL1758
-	.4byte	.LVL1762
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1762
-	.4byte	.LVL1764
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1764
-	.4byte	.LVL1765
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1765
-	.4byte	.LVL1766-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1766-1
-	.4byte	.LVL1766
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1766
-	.4byte	.LVL1767
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1767
-	.4byte	.LVL1796
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1796
-	.4byte	.LFE262
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST522:
-	.4byte	.LVL1769
-	.4byte	.LVL1770
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1770
-	.4byte	.LVL1792
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST523:
-	.4byte	.LVL1774
-	.4byte	.LVL1792
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST524:
-	.4byte	.LVL1759
-	.4byte	.LVL1760
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1760
-	.4byte	.LFE262
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -88
-	.4byte	0
-	.4byte	0
-.LLST525:
-	.4byte	.LVL1759
-	.4byte	.LVL1762
-	.2byte	0xb
-	.byte	0x3
-	.4byte	gNandParaInfo+9
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL1762
-	.4byte	.LVL1765
-	.2byte	0x9
-	.byte	0x91
-	.sleb128 -92
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL1765
-	.4byte	.LVL1766-1
-	.2byte	0xb
-	.byte	0x3
-	.4byte	gNandParaInfo+9
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL1767
-	.4byte	.LFE262
-	.2byte	0x9
-	.byte	0x91
-	.sleb128 -92
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST493:
-	.4byte	.LVL1647
-	.4byte	.LVL1649
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1649
-	.4byte	.LVL1650
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1650
-	.4byte	.LVL1651-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1651-1
-	.4byte	.LFE261
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST494:
-	.4byte	.LVL1647
-	.4byte	.LVL1649
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1649
-	.4byte	.LVL1650
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -48
-	.4byte	.LVL1650
-	.4byte	.LVL1651-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1651-1
-	.4byte	.LFE261
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -48
-	.4byte	0
-	.4byte	0
-.LLST495:
-	.4byte	.LVL1647
-	.4byte	.LVL1648
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1648
-	.4byte	.LVL1650
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -60
-	.4byte	.LVL1650
-	.4byte	.LVL1651-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1651-1
-	.4byte	.LFE261
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -60
-	.4byte	0
-	.4byte	0
-.LLST496:
-	.4byte	.LVL1649
-	.4byte	.LVL1650
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -64
-	.4byte	.LVL1652
-	.4byte	.LVL1653
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1653
-	.4byte	.LVL1660
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -64
-	.4byte	.LVL1660
-	.4byte	.LVL1661
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1661
-	.4byte	.LVL1718
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -64
-	.4byte	.LVL1718
-	.4byte	.LVL1719
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1719
-	.4byte	.LFE261
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -64
-	.4byte	0
-	.4byte	0
-.LLST498:
-	.4byte	.LVL1647
-	.4byte	.LVL1649
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1650
-	.4byte	.LVL1651
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1658
-	.4byte	.LVL1659
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1661
-	.4byte	.LVL1663
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1663
-	.4byte	.LVL1674
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1679
-	.4byte	.LVL1680
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1680
-	.4byte	.LVL1685
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1690
-	.4byte	.LVL1692
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1692
-	.4byte	.LVL1694
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1694
-	.4byte	.LVL1695
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1695
-	.4byte	.LVL1700
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1700
-	.4byte	.LVL1702
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1702
-	.4byte	.LVL1714
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1721
-	.4byte	.LVL1723
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1723
-	.4byte	.LFE261
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST499:
-	.4byte	.LVL1649
-	.4byte	.LVL1650
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1652
-	.4byte	.LFE261
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST500:
-	.4byte	.LVL1647
-	.4byte	.LVL1649
-	.2byte	0xb
-	.byte	0x3
-	.4byte	gNandParaInfo+9
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL1649
-	.4byte	.LVL1650
-	.2byte	0x8
-	.byte	0x91
-	.sleb128 -52
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL1650
-	.4byte	.LVL1651-1
-	.2byte	0xb
-	.byte	0x3
-	.4byte	gNandParaInfo+9
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL1652
-	.4byte	.LFE261
-	.2byte	0x8
-	.byte	0x91
-	.sleb128 -52
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST501:
-	.4byte	.LVL1647
-	.4byte	.LVL1649
-	.2byte	0x5
-	.byte	0x3
-	.4byte	gNandRandomizer
-	.4byte	.LVL1649
-	.4byte	.LVL1650
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -44
-	.4byte	.LVL1650
-	.4byte	.LVL1651-1
-	.2byte	0x5
-	.byte	0x3
-	.4byte	gNandRandomizer
-	.4byte	.LVL1652
-	.4byte	.LFE261
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -44
-	.4byte	0
-	.4byte	0
-.LLST502:
-	.4byte	.LVL1671
-	.4byte	.LVL1675
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1682
-	.4byte	.LVL1684
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST503:
-	.4byte	.LVL1647
-	.4byte	.LVL1649
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1650
-	.4byte	.LVL1651
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1677
-	.4byte	.LVL1678
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1678
-	.4byte	.LVL1680
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1686
-	.4byte	.LVL1692
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1694
-	.4byte	.LVL1697
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1697
-	.4byte	.LVL1698
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1698
-	.4byte	.LVL1701
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1704
-	.4byte	.LVL1705
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1705
-	.4byte	.LVL1708
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1708
-	.4byte	.LVL1709
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1709
-	.4byte	.LVL1710-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1710-1
-	.4byte	.LVL1712
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1713
-	.4byte	.LVL1714
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1721
-	.4byte	.LFE261
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST504:
-	.4byte	.LVL1647
-	.4byte	.LVL1649
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1649
-	.4byte	.LVL1650
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1650
-	.4byte	.LVL1651
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1652
-	.4byte	.LVL1689
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1689
-	.4byte	.LVL1690
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1690
-	.4byte	.LFE261
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST505:
-	.4byte	.LVL1654
-	.4byte	.LVL1655
-	.2byte	0x8
-	.byte	0x73
-	.sleb128 0
-	.byte	0x40
-	.byte	0x4b
-	.byte	0x24
-	.byte	0x1f
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL1655
-	.4byte	.LVL1656
-	.2byte	0x9
-	.byte	0x70
-	.sleb128 4
-	.byte	0x6
-	.byte	0x40
-	.byte	0x4b
-	.byte	0x24
-	.byte	0x1f
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL1656
-	.4byte	.LFE261
-	.2byte	0x9
-	.byte	0x91
-	.sleb128 -56
-	.byte	0x6
-	.byte	0x40
-	.byte	0x4b
-	.byte	0x24
-	.byte	0x1f
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST506:
-	.4byte	.LVL1666
-	.4byte	.LVL1668-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST507:
-	.4byte	.LVL1695
-	.4byte	.LVL1700
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST117:
-	.4byte	.LVL234
-	.4byte	.LVL235
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL235
-	.4byte	.LFE260
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST118:
-	.4byte	.LVL234
-	.4byte	.LVL235
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL235
-	.4byte	.LFE260
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST119:
-	.4byte	.LVL234
-	.4byte	.LVL235
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL235
-	.4byte	.LFE260
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST120:
-	.4byte	.LVL234
-	.4byte	.LVL235
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL235
-	.4byte	.LFE260
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST121:
-	.4byte	.LVL244
-	.4byte	.LVL245
-	.2byte	0x6
-	.byte	0x70
-	.sleb128 0
-	.byte	0x31
-	.byte	0x1a
-	.byte	0x1f
-	.byte	0x9f
-	.4byte	.LVL248
-	.4byte	.LVL249
-	.2byte	0x5
-	.byte	0x70
-	.sleb128 0
-	.byte	0x31
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST508:
-	.4byte	.LVL1724
-	.4byte	.LVL1726
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1726
-	.4byte	.LVL1727
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1727
-	.4byte	.LVL1728
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1728
-	.4byte	.LVL1747
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1747
-	.4byte	.LVL1756
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1756
-	.4byte	.LFE259
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST509:
-	.4byte	.LVL1724
-	.4byte	.LVL1726
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1726
-	.4byte	.LVL1727
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1727
-	.4byte	.LVL1728
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	.LVL1728
-	.4byte	.LVL1747
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1747
-	.4byte	.LVL1756
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	.LVL1756
-	.4byte	.LVL1757
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1757
-	.4byte	.LFE259
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST510:
-	.4byte	.LVL1724
-	.4byte	.LVL1726
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1726
-	.4byte	.LFE259
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST511:
-	.4byte	.LVL1724
-	.4byte	.LVL1725
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1725
-	.4byte	.LFE259
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -84
-	.4byte	0
-	.4byte	0
-.LLST512:
-	.4byte	.LVL1726
-	.4byte	.LVL1727
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1728
-	.4byte	.LVL1747
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1747
-	.4byte	.LVL1756
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1756
-	.4byte	.LFE259
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST513:
-	.4byte	.LVL1738
-	.4byte	.LVL1739
-	.2byte	0x6
-	.byte	0x70
-	.sleb128 0
-	.byte	0x31
-	.byte	0x1a
-	.byte	0x1f
-	.byte	0x9f
-	.4byte	.LVL1744
-	.4byte	.LVL1745
-	.2byte	0x5
-	.byte	0x70
-	.sleb128 0
-	.byte	0x31
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST514:
-	.4byte	.LVL1724
-	.4byte	.LVL1726
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1726
-	.4byte	.LVL1727
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1727
-	.4byte	.LVL1728
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1728
-	.4byte	.LVL1747
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1747
-	.4byte	.LVL1756
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1756
-	.4byte	.LFE259
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST515:
-	.4byte	.LVL1731
-	.4byte	.LVL1747
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST486:
-	.4byte	.LVL1622
-	.4byte	.LVL1624
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1624
-	.4byte	.LFE258
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST487:
-	.4byte	.LVL1622
-	.4byte	.LVL1624
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1624
-	.4byte	.LFE258
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST488:
-	.4byte	.LVL1622
-	.4byte	.LVL1624
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1624
-	.4byte	.LFE258
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -44
-	.4byte	0
-	.4byte	0
-.LLST489:
-	.4byte	.LVL1623
-	.4byte	.LVL1624
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1624
-	.4byte	.LFE258
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST490:
-	.4byte	.LVL1622
-	.4byte	.LVL1624
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1624
-	.4byte	.LFE258
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST491:
-	.4byte	.LVL1623
-	.4byte	.LVL1624
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1634
-	.4byte	.LVL1635
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1635
-	.4byte	.LVL1641
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST492:
-	.4byte	.LVL1623
-	.4byte	.LVL1624
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1638
-	.4byte	.LVL1639
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1639
-	.4byte	.LVL1642
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1646
-	.4byte	.LFE258
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST96:
-	.4byte	.LVL183
-	.4byte	.LVL184
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL184
-	.4byte	.LFE257
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST97:
-	.4byte	.LVL183
-	.4byte	.LVL184
-	.2byte	0xb
-	.byte	0x70
-	.sleb128 0
-	.byte	0x34
-	.byte	0x24
-	.byte	0x3
-	.4byte	gDieOp
-	.byte	0x22
-	.byte	0x9f
-	.4byte	.LVL184
-	.4byte	.LVL192
-	.2byte	0xb
-	.byte	0x76
-	.sleb128 0
-	.byte	0x34
-	.byte	0x24
-	.byte	0x3
-	.4byte	gDieOp
-	.byte	0x22
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST98:
-	.4byte	.LVL183
-	.4byte	.LVL184
-	.2byte	0xa
-	.byte	0x70
-	.sleb128 0
-	.byte	0x34
-	.byte	0x24
-	.byte	0x3
-	.4byte	gDieOp
-	.byte	0x22
-	.4byte	.LVL184
-	.4byte	.LVL185-1
-	.2byte	0xa
-	.byte	0x76
-	.sleb128 0
-	.byte	0x34
-	.byte	0x24
-	.byte	0x3
-	.4byte	gDieOp
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST99:
-	.4byte	.LVL187
-	.4byte	.LVL188
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL188
-	.4byte	.LVL189
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL189
-	.4byte	.LVL190
-	.2byte	0x5
-	.byte	0x71
-	.sleb128 0
-	.byte	0x31
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL190
-	.4byte	.LVL191
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST73:
-	.4byte	.LVL124
-	.4byte	.LVL125
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL125
-	.4byte	.LFE256
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST74:
-	.4byte	.LVL124
-	.4byte	.LVL125
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL125
-	.4byte	.LFE256
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST75:
-	.4byte	.LVL124
-	.4byte	.LVL125
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL125
-	.4byte	.LFE256
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST66:
-	.4byte	.LVL110
-	.4byte	.LVL113
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL113
-	.4byte	.LVL122
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL122
-	.4byte	.LFE255
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST67:
-	.4byte	.LVL110
-	.4byte	.LVL117-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL117-1
-	.4byte	.LVL118
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	.LVL118
-	.4byte	.LFE255
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST68:
-	.4byte	.LVL110
-	.4byte	.LVL114
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL114
-	.4byte	.LVL118
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	.LVL118
-	.4byte	.LVL119
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL119
-	.4byte	.LVL122
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	.LVL122
-	.4byte	.LVL123
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL123
-	.4byte	.LFE255
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST71:
-	.4byte	.LVL115
-	.4byte	.LVL116
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL120
-	.4byte	.LVL122
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST69:
-	.4byte	.LVL110
-	.4byte	.LVL111
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL111
-	.4byte	.LVL112
-	.2byte	0xa
-	.byte	0x70
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST70:
-	.4byte	.LVL111
-	.4byte	.LVL112
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST72:
-	.4byte	.LVL116
-	.4byte	.LVL117
-	.2byte	0x3
-	.byte	0x8
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST56:
-	.4byte	.LVL90
-	.4byte	.LVL96
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL96
-	.4byte	.LFE254
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST57:
-	.4byte	.LVL90
-	.4byte	.LVL93
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL93
-	.4byte	.LFE254
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST58:
-	.4byte	.LVL90
-	.4byte	.LVL94
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL94
-	.4byte	.LFE254
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST59:
-	.4byte	.LVL90
-	.4byte	.LVL91
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL91
-	.4byte	.LFE254
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST60:
-	.4byte	.LVL90
-	.4byte	.LVL109
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 0
-	.4byte	.LVL109
-	.4byte	.LFE254
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 0
-	.4byte	0
-	.4byte	0
-.LLST61:
-	.4byte	.LVL97
-	.4byte	.LVL98-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL98-1
-	.4byte	.LVL108
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	.LVL108
-	.4byte	.LVL109
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -40
-	.4byte	.LVL109
-	.4byte	.LFE254
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	0
-	.4byte	0
-.LLST62:
-	.4byte	.LVL102
-	.4byte	.LVL105
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST63:
-	.4byte	.LVL101
-	.4byte	.LVL104
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST64:
-	.4byte	.LVL106
-	.4byte	.LVL107
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL107
-	.4byte	.LVL109
-	.2byte	0x6
-	.byte	0x70
-	.sleb128 0
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL109
-	.4byte	.LFE254
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST65:
-	.4byte	.LVL95
-	.4byte	.LVL98-1
-	.2byte	0x9
-	.byte	0x73
-	.sleb128 0
-	.byte	0xc
-	.4byte	0x7fffffff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL98-1
-	.4byte	.LFE254
-	.2byte	0xa
-	.byte	0x91
-	.sleb128 -36
-	.byte	0x6
-	.byte	0xc
-	.4byte	0x7fffffff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST133:
-	.4byte	.LVL294
-	.4byte	.LVL296
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST135:
-	.4byte	.LVL295
-	.4byte	.LVL296
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST474:
-	.4byte	.LVL1561
-	.4byte	.LVL1562
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1562
-	.4byte	.LVL1568
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1568
-	.4byte	.LVL1569-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1569-1
-	.4byte	.LFE252
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST475:
-	.4byte	.LVL1569
-	.4byte	.LVL1570
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1570
-	.4byte	.LVL1585
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1621
-	.4byte	.LFE252
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST476:
-	.4byte	.LVL1591
-	.4byte	.LVL1592
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST482:
-	.4byte	.LVL1603
-	.4byte	.LVL1604
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST483:
-	.4byte	.LVL1603
-	.4byte	.LVL1604
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1604
-	.4byte	.LVL1606-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST484:
-	.4byte	.LVL1619
-	.4byte	.LVL1620
-	.2byte	0x6
-	.byte	0x3
-	.4byte	gReadRetryInfo+20
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST485:
-	.4byte	.LVL1615
-	.4byte	.LVL1618
-	.2byte	0x6
-	.byte	0x3
-	.4byte	gNandPhyInfo
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST477:
-	.4byte	.LVL1571
-	.4byte	.LVL1579
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST478:
-	.4byte	.LVL1571
-	.4byte	.LVL1579
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	0
-	.4byte	0
-.LLST479:
-	.4byte	.LVL1571
-	.4byte	.LVL1581
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1581
-	.4byte	.LVL1584
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 -8
-	.byte	0x9f
-	.4byte	.LVL1621
-	.4byte	.LFE252
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST480:
-	.4byte	.LVL1572
-	.4byte	.LVL1573
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1573
-	.4byte	.LVL1574
-	.2byte	0xa
-	.byte	0x75
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST481:
-	.4byte	.LVL1576
-	.4byte	.LVL1577
-	.2byte	0x3
-	.byte	0x8
-	.byte	0xc8
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST308:
-	.4byte	.LVL903
-	.4byte	.LVL904
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL904
-	.4byte	.LVL906
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL906
-	.4byte	.LVL907
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL907
-	.4byte	.LVL909-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL911
-	.4byte	.LVL913
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST309:
-	.4byte	.LVL903
-	.4byte	.LVL906
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL906
-	.4byte	.LVL911
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL911
-	.4byte	.LVL913
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST307:
-	.4byte	.LVL901
-	.4byte	.LVL902-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL902-1
-	.4byte	.LFE250
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST413:
-	.4byte	.LVL1268
-	.4byte	.LVL1271
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1271
-	.4byte	.LFE249
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST414:
-	.4byte	.LVL1269
-	.4byte	.LVL1273
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1274
-	.4byte	.LVL1277
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1283
-	.4byte	.LVL1284
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1287
-	.4byte	.LFE249
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST283:
-	.4byte	.LVL798
-	.4byte	.LVL799
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL800
-	.4byte	.LVL803
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL804
-	.4byte	.LVL805
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL806
-	.4byte	.LFE248
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST415:
-	.4byte	.LVL1289
-	.4byte	.LVL1293
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1293
-	.4byte	.LVL1297
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1297
-	.4byte	.LVL1299
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1299
-	.4byte	.LFE247
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST416:
-	.4byte	.LVL1289
-	.4byte	.LVL1291
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1291
-	.4byte	.LVL1300
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1300
-	.4byte	.LFE247
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST417:
-	.4byte	.LVL1289
-	.4byte	.LVL1290
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1290
-	.4byte	.LVL1293
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	.LVL1293
-	.4byte	.LVL1295
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1296
-	.4byte	.LVL1297
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1297
-	.4byte	.LVL1299
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST418:
-	.4byte	.LVL1290
-	.4byte	.LVL1292
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1292
-	.4byte	.LVL1293
-	.2byte	0x8
-	.byte	0x3
-	.4byte	gpNandParaInfo
-	.byte	0x6
-	.byte	0x23
-	.uleb128 0x13
-	.4byte	.LVL1297
-	.4byte	.LVL1298
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1298
-	.4byte	.LVL1299
-	.2byte	0x8
-	.byte	0x3
-	.4byte	gpNandParaInfo
-	.byte	0x6
-	.byte	0x23
-	.uleb128 0x13
-	.4byte	0
-	.4byte	0
-.LLST397:
-	.4byte	.LVL1202
-	.4byte	.LVL1208-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1208-1
-	.4byte	.LFE245
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST398:
-	.4byte	.LVL1202
-	.4byte	.LVL1208-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1208-1
-	.4byte	.LFE245
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -36
-	.4byte	0
-	.4byte	0
-.LLST399:
-	.4byte	.LVL1202
-	.4byte	.LVL1203
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1203
-	.4byte	.LVL1209
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1212
-	.4byte	.LVL1218
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1218
-	.4byte	.LVL1219
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1219
-	.4byte	.LVL1221
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1221
-	.4byte	.LFE245
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST400:
-	.4byte	.LVL1202
-	.4byte	.LVL1204
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1204
-	.4byte	.LVL1209
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1212
-	.4byte	.LVL1218
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1218
-	.4byte	.LVL1219
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1219
-	.4byte	.LVL1221
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1221
-	.4byte	.LFE245
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST401:
-	.4byte	.LVL1202
-	.4byte	.LVL1208
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1217
-	.4byte	.LFE245
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST402:
-	.4byte	.LVL1202
-	.4byte	.LVL1208
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1208
-	.4byte	.LVL1210
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1212
-	.4byte	.LVL1222
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST403:
-	.4byte	.LVL1205
-	.4byte	.LVL1213
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1214
-	.4byte	.LFE245
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST404:
-	.4byte	.LVL1206
-	.4byte	.LVL1211
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	.LVL1211
-	.4byte	.LVL1212
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -40
-	.4byte	.LVL1212
-	.4byte	.LFE245
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	0
-	.4byte	0
-.LLST86:
-	.4byte	.LVL156
-	.4byte	.LVL160
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL160
-	.4byte	.LVL169
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL169
-	.4byte	.LVL173
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL173
-	.4byte	.LFE244
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST87:
-	.4byte	.LVL156
-	.4byte	.LVL164-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL164-1
-	.4byte	.LVL169
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	.LVL169
-	.4byte	.LVL173
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL173
-	.4byte	.LFE244
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST88:
-	.4byte	.LVL156
-	.4byte	.LVL158
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL158
-	.4byte	.LVL166
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL166
-	.4byte	.LVL169
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	.LVL169
-	.4byte	.LVL170
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL170
-	.4byte	.LVL171
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL171
-	.4byte	.LVL173
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL173
-	.4byte	.LFE244
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST89:
-	.4byte	.LVL156
-	.4byte	.LVL157
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL157
-	.4byte	.LFE244
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST90:
-	.4byte	.LVL165
-	.4byte	.LVL166
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL166
-	.4byte	.LVL167
-	.2byte	0x9
-	.byte	0x73
-	.sleb128 0
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x31
-	.byte	0x1c
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL173
-	.4byte	.LVL174
-	.2byte	0x9
-	.byte	0x73
-	.sleb128 0
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x31
-	.byte	0x1c
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL177
-	.4byte	.LFE244
-	.2byte	0xb
-	.byte	0x91
-	.sleb128 -36
-	.byte	0x94
-	.byte	0x1
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x31
-	.byte	0x1c
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST91:
-	.4byte	.LVL159
-	.4byte	.LVL161
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL161
-	.4byte	.LVL166
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL172
-	.4byte	.LVL173
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST92:
-	.4byte	.LVL159
-	.4byte	.LVL162
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL162
-	.4byte	.LVL163
-	.2byte	0xa
-	.byte	0x70
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST93:
-	.4byte	.LVL175
-	.4byte	.LVL176
-	.2byte	0x3
-	.byte	0x8
-	.byte	0xc8
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST386:
-	.4byte	.LVL1174
-	.4byte	.LVL1179
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1179
-	.4byte	.LVL1190
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1190
-	.4byte	.LVL1193
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1193
-	.4byte	.LFE243
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST387:
-	.4byte	.LVL1174
-	.4byte	.LVL1180-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1180-1
-	.4byte	.LVL1190
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -48
-	.4byte	.LVL1190
-	.4byte	.LVL1193
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1193
-	.4byte	.LFE243
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -48
-	.4byte	0
-	.4byte	0
-.LLST388:
-	.4byte	.LVL1174
-	.4byte	.LVL1180-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1180-1
-	.4byte	.LVL1184
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1190
-	.4byte	.LVL1193
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1193
-	.4byte	.LVL1197
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1197
-	.4byte	.LVL1198
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1200
-	.4byte	.LFE243
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST389:
-	.4byte	.LVL1174
-	.4byte	.LVL1175
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1175
-	.4byte	.LVL1184
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1190
-	.4byte	.LVL1197
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1197
-	.4byte	.LVL1198
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1200
-	.4byte	.LFE243
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST390:
-	.4byte	.LVL1174
-	.4byte	.LVL1183
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1190
-	.4byte	.LVL1193
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1196
-	.4byte	.LFE243
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST391:
-	.4byte	.LVL1174
-	.4byte	.LVL1183
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1183
-	.4byte	.LVL1187
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1187
-	.4byte	.LVL1188
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL1190
-	.4byte	.LVL1193
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1193
-	.4byte	.LVL1201
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST392:
-	.4byte	.LVL1182
-	.4byte	.LVL1183
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1183
-	.4byte	.LVL1190
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1193
-	.4byte	.LVL1199
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1199
-	.4byte	.LVL1200
-	.2byte	0x6
-	.byte	0x91
-	.sleb128 -44
-	.byte	0x6
-	.byte	0x31
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL1200
-	.4byte	.LFE243
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST393:
-	.4byte	.LVL1176
-	.4byte	.LVL1177
-	.2byte	0x7
-	.byte	0x74
-	.sleb128 0
-	.byte	0x33
-	.byte	0x1e
-	.byte	0x32
-	.byte	0x26
-	.byte	0x9f
-	.4byte	.LVL1177
-	.4byte	.LVL1178
-	.2byte	0xf
-	.byte	0x3
-	.4byte	gNandFlashEccBits
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x33
-	.byte	0x1e
-	.byte	0x32
-	.byte	0x26
-	.byte	0x9f
-	.4byte	.LVL1178
-	.4byte	.LVL1190
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1190
-	.4byte	.LVL1191
-	.2byte	0x7
-	.byte	0x74
-	.sleb128 0
-	.byte	0x33
-	.byte	0x1e
-	.byte	0x32
-	.byte	0x26
-	.byte	0x9f
-	.4byte	.LVL1191
-	.4byte	.LVL1192
-	.2byte	0xf
-	.byte	0x3
-	.4byte	gNandFlashEccBits
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x33
-	.byte	0x1e
-	.byte	0x32
-	.byte	0x26
-	.byte	0x9f
-	.4byte	.LVL1192
-	.4byte	.LFE243
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST394:
-	.4byte	.LVL1180
-	.4byte	.LVL1181
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1181
-	.4byte	.LVL1182
-	.2byte	0xa
-	.byte	0x77
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST395:
-	.4byte	.LVL1185
-	.4byte	.LVL1186
-	.2byte	0x3
-	.byte	0x8
-	.byte	0xc8
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST396:
-	.4byte	.LVL1194
-	.4byte	.LVL1195
-	.2byte	0x3
-	.byte	0x8
-	.byte	0xc8
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST379:
-	.4byte	.LVL1160
-	.4byte	.LVL1161-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1161-1
-	.4byte	.LFE242
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST380:
-	.4byte	.LVL1160
-	.4byte	.LVL1161-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1161-1
-	.4byte	.LFE242
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	0
-	.4byte	0
-.LLST381:
-	.4byte	.LVL1160
-	.4byte	.LVL1161-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1161-1
-	.4byte	.LVL1163
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1166
-	.4byte	.LVL1169
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1169
-	.4byte	.LVL1170
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1170
-	.4byte	.LVL1172
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1172
-	.4byte	.LFE242
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST382:
-	.4byte	.LVL1160
-	.4byte	.LVL1161-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1161-1
-	.4byte	.LVL1163
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1166
-	.4byte	.LVL1169
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1169
-	.4byte	.LVL1170
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1170
-	.4byte	.LVL1172
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1172
-	.4byte	.LFE242
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST383:
-	.4byte	.LVL1160
-	.4byte	.LVL1162
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1168
-	.4byte	.LFE242
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST384:
-	.4byte	.LVL1160
-	.4byte	.LVL1162
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1162
-	.4byte	.LVL1165
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1166
-	.4byte	.LVL1173
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST385:
-	.4byte	.LVL1161
-	.4byte	.LVL1162
-	.2byte	0xa
-	.byte	0x77
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST52:
-	.4byte	.LVL83
-	.4byte	.LVL85
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL85
-	.4byte	.LFE241
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST53:
-	.4byte	.LVL83
-	.4byte	.LVL84
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL84
-	.4byte	.LFE241
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST54:
-	.4byte	.LVL83
-	.4byte	.LVL85
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL85
-	.4byte	.LVL87
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL87
-	.4byte	.LVL89
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL89
-	.4byte	.LFE241
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST55:
-	.4byte	.LVL88
-	.4byte	.LVL89
-	.2byte	0x4
-	.byte	0xa
-	.2byte	0x12c
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST370:
-	.4byte	.LVL1127
-	.4byte	.LVL1128-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1128-1
-	.4byte	.LFE240
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST371:
-	.4byte	.LVL1127
-	.4byte	.LVL1128-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1128-1
-	.4byte	.LFE240
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -36
-	.4byte	0
-	.4byte	0
-.LLST372:
-	.4byte	.LVL1127
-	.4byte	.LVL1128-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1128-1
-	.4byte	.LVL1138
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -44
-	.4byte	.LVL1143
-	.4byte	.LVL1151
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -44
-	.4byte	.LVL1151
-	.4byte	.LVL1152
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1152
-	.4byte	.LVL1158
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -44
-	.4byte	0
-	.4byte	0
-.LLST373:
-	.4byte	.LVL1127
-	.4byte	.LVL1128-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1128-1
-	.4byte	.LVL1138
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1143
-	.4byte	.LVL1151
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1151
-	.4byte	.LVL1152
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1152
-	.4byte	.LVL1158
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	0
-	.4byte	0
-.LLST374:
-	.4byte	.LVL1127
-	.4byte	.LVL1137
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1143
-	.4byte	.LVL1144
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1148
-	.4byte	.LVL1149
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1149
-	.4byte	.LVL1154
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1157
-	.4byte	.LVL1158
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST375:
-	.4byte	.LVL1127
-	.4byte	.LVL1137
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1137
-	.4byte	.LVL1138
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -52
-	.4byte	.LVL1138
-	.4byte	.LVL1143
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1143
-	.4byte	.LVL1144
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1144
-	.4byte	.LVL1151
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -52
-	.4byte	.LVL1151
-	.4byte	.LVL1152
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1152
-	.4byte	.LVL1158
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -52
-	.4byte	.LVL1158
-	.4byte	.LFE240
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST376:
-	.4byte	.LVL1127
-	.4byte	.LVL1131
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1131
-	.4byte	.LVL1133
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL1134
-	.4byte	.LVL1135
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1135
-	.4byte	.LVL1143
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -48
-	.4byte	.LVL1143
-	.4byte	.LVL1144
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1144
-	.4byte	.LFE240
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -48
-	.4byte	0
-	.4byte	0
-.LLST377:
-	.4byte	.LVL1136
-	.4byte	.LVL1137
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL1137
-	.4byte	.LVL1143
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1144
-	.4byte	.LFE240
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST378:
-	.4byte	.LVL1128
-	.4byte	.LVL1129
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1129
-	.4byte	.LVL1130
-	.2byte	0xa
-	.byte	0x76
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST48:
-	.4byte	.LVL77
-	.4byte	.LVL78
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL78
-	.4byte	.LFE239
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST49:
-	.4byte	.LVL77
-	.4byte	.LVL78
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL78
-	.4byte	.LFE239
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST50:
-	.4byte	.LVL77
-	.4byte	.LVL78
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL78
-	.4byte	.LFE239
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST51:
-	.4byte	.LVL80
-	.4byte	.LVL81
-	.2byte	0x3
-	.byte	0x8
-	.byte	0xc8
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST113:
-	.4byte	.LVL226
-	.4byte	.LVL228
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL228
-	.4byte	.LVL231
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL231
-	.4byte	.LVL232
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL232
-	.4byte	.LFE238
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST114:
-	.4byte	.LVL226
-	.4byte	.LVL229-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL229-1
-	.4byte	.LFE238
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST115:
-	.4byte	.LVL229
-	.4byte	.LVL230
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL230
-	.4byte	.LVL232-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL232
-	.4byte	.LFE238
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST116:
-	.4byte	.LVL227
-	.4byte	.LVL229
-	.2byte	0x3
-	.byte	0x8
-	.byte	0xc8
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST452:
-	.4byte	.LVL1417
-	.4byte	.LVL1430
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1430
-	.4byte	.LVL1432
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1432
-	.4byte	.LVL1434
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1434
-	.4byte	.LVL1436
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1436
-	.4byte	.LVL1437
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1437
-	.4byte	.LVL1452
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1452
-	.4byte	.LVL1469
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1469
-	.4byte	.LFE236
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST453:
-	.4byte	.LVL1418
-	.4byte	.LVL1419
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL1419
-	.4byte	.LVL1420
-	.2byte	0x2
-	.byte	0x32
-	.byte	0x9f
-	.4byte	.LVL1420
-	.4byte	.LVL1421
-	.2byte	0x2
-	.byte	0x33
-	.byte	0x9f
-	.4byte	.LVL1421
-	.4byte	.LVL1422
-	.2byte	0x2
-	.byte	0x34
-	.byte	0x9f
-	.4byte	.LVL1422
-	.4byte	.LVL1423
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1423
-	.4byte	.LVL1424
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL1424
-	.4byte	.LVL1425
-	.2byte	0x2
-	.byte	0x32
-	.byte	0x9f
-	.4byte	.LVL1425
-	.4byte	.LVL1426
-	.2byte	0x2
-	.byte	0x33
-	.byte	0x9f
-	.4byte	.LVL1426
-	.4byte	.LVL1427
-	.2byte	0x2
-	.byte	0x34
-	.byte	0x9f
-	.4byte	.LVL1427
-	.4byte	.LVL1428
-	.2byte	0x2
-	.byte	0x35
-	.byte	0x9f
-	.4byte	.LVL1428
-	.4byte	.LVL1429
-	.2byte	0x2
-	.byte	0x36
-	.byte	0x9f
-	.4byte	.LVL1429
-	.4byte	.LVL1430
-	.2byte	0x2
-	.byte	0x37
-	.byte	0x9f
-	.4byte	.LVL1434
-	.4byte	.LVL1443
-	.2byte	0x2
-	.byte	0x34
-	.byte	0x9f
-	.4byte	.LVL1443
-	.4byte	.LVL1444
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1444
-	.4byte	.LVL1445
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL1445
-	.4byte	.LVL1446
-	.2byte	0x2
-	.byte	0x32
-	.byte	0x9f
-	.4byte	.LVL1446
-	.4byte	.LVL1447
-	.2byte	0x2
-	.byte	0x33
-	.byte	0x9f
-	.4byte	.LVL1447
-	.4byte	.LVL1448
-	.2byte	0x2
-	.byte	0x34
-	.byte	0x9f
-	.4byte	.LVL1448
-	.4byte	.LVL1449
-	.2byte	0x2
-	.byte	0x35
-	.byte	0x9f
-	.4byte	.LVL1449
-	.4byte	.LVL1450
-	.2byte	0x2
-	.byte	0x36
-	.byte	0x9f
-	.4byte	.LVL1450
-	.4byte	.LVL1451
-	.2byte	0x2
-	.byte	0x37
-	.byte	0x9f
-	.4byte	.LVL1451
-	.4byte	.LVL1452
-	.2byte	0x2
-	.byte	0x38
-	.byte	0x9f
-	.4byte	.LVL1462
-	.4byte	.LVL1463
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL1463
-	.4byte	.LVL1467
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1496
-	.4byte	.LVL1497
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1497
-	.4byte	.LVL1498
-	.2byte	0x6
-	.byte	0x73
-	.sleb128 0
-	.byte	0x7e
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL1498
-	.4byte	.LVL1499
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1499
-	.4byte	.LVL1500
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1500
-	.4byte	.LVL1503
-	.2byte	0x5
-	.byte	0x38
-	.byte	0x73
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL1503
-	.4byte	.LVL1504
-	.2byte	0x5
-	.byte	0x39
-	.byte	0x73
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL1504
-	.4byte	.LVL1505
-	.2byte	0x5
-	.byte	0x38
-	.byte	0x73
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL1505
-	.4byte	.LVL1518
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1532
-	.4byte	.LVL1534
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1534
-	.4byte	.LVL1538
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1538
-	.4byte	.LVL1539
-	.2byte	0x3
-	.byte	0x70
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL1539
-	.4byte	.LVL1540
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST454:
-	.4byte	.LVL1500
-	.4byte	.LVL1501
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1501
-	.4byte	.LVL1505
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1507
-	.4byte	.LVL1509
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1509
-	.4byte	.LVL1510
-	.2byte	0x6
-	.byte	0x40
-	.byte	0x91
-	.sleb128 -56
-	.byte	0x6
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL1510
-	.4byte	.LVL1511
-	.2byte	0x6
-	.byte	0x41
-	.byte	0x91
-	.sleb128 -56
-	.byte	0x6
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL1511
-	.4byte	.LVL1512
-	.2byte	0x5
-	.byte	0x40
-	.byte	0x70
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL1512
-	.4byte	.LVL1519
-	.2byte	0x6
-	.byte	0x40
-	.byte	0x91
-	.sleb128 -56
-	.byte	0x6
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL1519
-	.4byte	.LVL1521
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1531
-	.4byte	.LVL1533
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1545
-	.4byte	.LVL1546
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST455:
-	.4byte	.LVL1456
-	.4byte	.LVL1457
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1457
-	.4byte	.LVL1460
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1460
-	.4byte	.LVL1461
-	.2byte	0x3
-	.byte	0x76
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1462
-	.4byte	.LVL1465
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1465
-	.4byte	.LVL1466
-	.2byte	0x3
-	.byte	0x72
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1482
-	.4byte	.LVL1484
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1484
-	.4byte	.LVL1486
-	.2byte	0x6
-	.byte	0x70
-	.sleb128 0
-	.byte	0x73
-	.sleb128 -1
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL1487
-	.4byte	.LVL1488
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1488
-	.4byte	.LVL1489
-	.2byte	0x3
-	.byte	0x72
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1489
-	.4byte	.LVL1490
-	.2byte	0x3
-	.byte	0x71
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1494
-	.4byte	.LVL1495
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1524
-	.4byte	.LVL1525
-	.2byte	0x6
-	.byte	0x70
-	.sleb128 0
-	.byte	0x73
-	.sleb128 -1
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL1525
-	.4byte	.LVL1526
-	.2byte	0x6
-	.byte	0x71
-	.sleb128 0
-	.byte	0x73
-	.sleb128 -8
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL1527
-	.4byte	.LVL1528
-	.2byte	0x6
-	.byte	0x71
-	.sleb128 0
-	.byte	0x73
-	.sleb128 -8
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL1534
-	.4byte	.LVL1535
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1535
-	.4byte	.LVL1536
-	.2byte	0x6
-	.byte	0x72
-	.sleb128 0
-	.byte	0x7e
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL1537
-	.4byte	.LVL1539
-	.2byte	0x6
-	.byte	0x72
-	.sleb128 0
-	.byte	0x7e
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST456:
-	.4byte	.LVL1453
-	.4byte	.LVL1454
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1454
-	.4byte	.LVL1457
-	.2byte	0xb
-	.byte	0x78
-	.sleb128 0
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x3
-	.4byte	.LANCHOR26
-	.byte	0x22
-	.4byte	.LVL1471
-	.4byte	.LFE236
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST457:
-	.4byte	.LVL1432
-	.4byte	.LVL1433
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1452
-	.4byte	.LVL1468
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1470
-	.4byte	.LVL1477
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -84
-	.4byte	.LVL1478
-	.4byte	.LVL1479
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -84
-	.4byte	.LVL1492
-	.4byte	.LVL1493
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -84
-	.4byte	.LVL1543
-	.4byte	.LVL1544
-	.2byte	0x8
-	.byte	0x91
-	.sleb128 -76
-	.byte	0x94
-	.byte	0x1
-	.byte	0x23
-	.uleb128 0x1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST458:
-	.4byte	.LVL1417
-	.4byte	.LVL1430
-	.2byte	0x2
-	.byte	0x34
-	.byte	0x9f
-	.4byte	.LVL1431
-	.4byte	.LVL1434
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1434
-	.4byte	.LVL1435
-	.2byte	0x2
-	.byte	0x34
-	.byte	0x9f
-	.4byte	.LVL1435
-	.4byte	.LVL1437
-	.2byte	0x2
-	.byte	0x38
-	.byte	0x9f
-	.4byte	.LVL1437
-	.4byte	.LVL1452
-	.2byte	0x2
-	.byte	0x34
-	.byte	0x9f
-	.4byte	.LVL1452
-	.4byte	.LFE236
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	0
-	.4byte	0
-.LLST459:
-	.4byte	.LVL1417
-	.4byte	.LVL1430
-	.2byte	0x2
-	.byte	0x37
-	.byte	0x9f
-	.4byte	.LVL1431
-	.4byte	.LVL1434
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1434
-	.4byte	.LVL1435
-	.2byte	0x2
-	.byte	0x37
-	.byte	0x9f
-	.4byte	.LVL1435
-	.4byte	.LVL1437
-	.2byte	0x2
-	.byte	0x38
-	.byte	0x9f
-	.4byte	.LVL1437
-	.4byte	.LVL1438
-	.2byte	0x2
-	.byte	0x37
-	.byte	0x9f
-	.4byte	.LVL1438
-	.4byte	.LVL1439
-	.2byte	0x2
-	.byte	0x38
-	.byte	0x9f
-	.4byte	.LVL1440
-	.4byte	.LVL1441
-	.2byte	0x2
-	.byte	0x37
-	.byte	0x9f
-	.4byte	.LVL1441
-	.4byte	.LVL1442
-	.2byte	0x2
-	.byte	0x3c
-	.byte	0x9f
-	.4byte	.LVL1442
-	.4byte	.LVL1452
-	.2byte	0x2
-	.byte	0x37
-	.byte	0x9f
-	.4byte	.LVL1452
-	.4byte	.LFE236
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST460:
-	.4byte	.LVL1482
-	.4byte	.LVL1491-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1494
-	.4byte	.LVL1495
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1496
-	.4byte	.LVL1522-1
-	.2byte	0x1
-	.byte	0x5e
-	.4byte	.LVL1524
-	.4byte	.LVL1525
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1525
-	.4byte	.LVL1529-1
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 -7
-	.byte	0x9f
-	.4byte	.LVL1530
-	.4byte	.LVL1535
-	.2byte	0x1
-	.byte	0x5e
-	.4byte	.LVL1535
-	.4byte	.LVL1536
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1536
-	.4byte	.LVL1537
-	.2byte	0x3
-	.byte	0x72
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL1537
-	.4byte	.LVL1539
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1539
-	.4byte	.LVL1541-1
-	.2byte	0x1
-	.byte	0x5e
-	.4byte	.LVL1545
-	.4byte	.LVL1546
-	.2byte	0x1
-	.byte	0x5e
-	.4byte	0
-	.4byte	0
-.LLST461:
-	.4byte	.LVL1499
-	.4byte	.LVL1500
-	.2byte	0x5
-	.byte	0x3
-	.4byte	gFlashPageBuffer0
-	.4byte	0
-	.4byte	0
-.LLST462:
-	.4byte	.LVL1495
-	.4byte	.LVL1524
-	.2byte	0x10
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x40
-	.byte	0x24
-	.byte	0x40
-	.byte	0x26
-	.byte	0x7b
-	.sleb128 0
-	.byte	0x40
-	.byte	0x24
-	.byte	0x40
-	.byte	0x26
-	.byte	0x1e
-	.byte	0x32
-	.byte	0x26
-	.byte	0x9f
-	.4byte	.LVL1530
-	.4byte	.LVL1531
-	.2byte	0x10
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x40
-	.byte	0x24
-	.byte	0x40
-	.byte	0x26
-	.byte	0x7b
-	.sleb128 0
-	.byte	0x40
-	.byte	0x24
-	.byte	0x40
-	.byte	0x26
-	.byte	0x1e
-	.byte	0x32
-	.byte	0x26
-	.byte	0x9f
-	.4byte	.LVL1531
-	.4byte	.LVL1532
-	.2byte	0x2
-	.byte	0x38
-	.byte	0x9f
-	.4byte	.LVL1532
-	.4byte	.LVL1541-1
-	.2byte	0x1
-	.byte	0x5c
-	.4byte	.LVL1545
-	.4byte	.LVL1546
-	.2byte	0x2
-	.byte	0x38
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST463:
-	.4byte	.LVL1455
-	.4byte	.LVL1469
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST464:
-	.4byte	.LVL1458
-	.4byte	.LVL1459
-	.2byte	0x3
-	.byte	0x8
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST465:
-	.4byte	.LVL1480
-	.4byte	.LVL1481
-	.2byte	0x2
-	.byte	0x32
-	.byte	0x9f
-	.4byte	.LVL1481
-	.4byte	.LVL1483
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1493
-	.4byte	.LVL1494
-	.2byte	0x2
-	.byte	0x32
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST466:
-	.4byte	.LVL1471
-	.4byte	.LVL1475
-	.2byte	0xe
-	.byte	0x77
-	.sleb128 0
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x24
-	.byte	0x3
-	.4byte	gReadRetryInfo+20
-	.byte	0x22
-	.byte	0x9f
-	.4byte	.LVL1475
-	.4byte	.LVL1476
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1476
-	.4byte	.LVL1477
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -68
-	.4byte	.LVL1478
-	.4byte	.LVL1479
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -68
-	.4byte	.LVL1492
-	.4byte	.LVL1493
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -68
-	.4byte	0
-	.4byte	0
-.LLST468:
-	.4byte	.LVL1505
-	.4byte	.LVL1506
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1506
-	.4byte	.LVL1513
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1513
-	.4byte	.LVL1514
-	.2byte	0x3
-	.byte	0x72
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL1514
-	.4byte	.LVL1515
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST469:
-	.4byte	.LVL1507
-	.4byte	.LVL1508
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1508
-	.4byte	.LVL1524
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -60
-	.4byte	.LVL1531
-	.4byte	.LFE236
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -60
-	.4byte	0
-	.4byte	0
-.LLST470:
-	.4byte	.LVL1505
-	.4byte	.LVL1506
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1506
-	.4byte	.LVL1517
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1517
-	.4byte	.LVL1519
-	.2byte	0x6
-	.byte	0x91
-	.sleb128 -52
-	.byte	0x6
-	.byte	0x70
-	.sleb128 0
-	.byte	0x22
-	.4byte	.LVL1519
-	.4byte	.LVL1522-1
-	.2byte	0x7
-	.byte	0x91
-	.sleb128 -52
-	.byte	0x6
-	.byte	0x91
-	.sleb128 -36
-	.byte	0x6
-	.byte	0x22
-	.4byte	.LVL1531
-	.4byte	.LVL1534
-	.2byte	0x7
-	.byte	0x91
-	.sleb128 -52
-	.byte	0x6
-	.byte	0x91
-	.sleb128 -36
-	.byte	0x6
-	.byte	0x22
-	.4byte	.LVL1545
-	.4byte	.LVL1546
-	.2byte	0x7
-	.byte	0x91
-	.sleb128 -52
-	.byte	0x6
-	.byte	0x91
-	.sleb128 -36
-	.byte	0x6
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST471:
-	.4byte	.LVL1506
-	.4byte	.LVL1509
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1509
-	.4byte	.LVL1524
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -80
-	.4byte	.LVL1531
-	.4byte	.LVL1534
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -80
-	.4byte	.LVL1545
-	.4byte	.LVL1546
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -80
-	.4byte	0
-	.4byte	0
-.LLST467:
-	.4byte	.LVL1471
-	.4byte	.LVL1472
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1472
-	.4byte	.LVL1473
-	.2byte	0xa
-	.byte	0x70
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST279:
-	.4byte	.LVL745
-	.4byte	.LVL746
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL746
-	.4byte	.LVL753
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL753
-	.4byte	.LVL755
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL755
-	.4byte	.LVL760
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL760
-	.4byte	.LVL768
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL768
-	.4byte	.LVL773
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL773
-	.4byte	.LVL788
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL788
-	.4byte	.LFE233
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST280:
-	.4byte	.LVL745
-	.4byte	.LVL749
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL749
-	.4byte	.LVL750
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL750
-	.4byte	.LVL753
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	.LVL753
-	.4byte	.LVL754
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL754
-	.4byte	.LVL760
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL760
-	.4byte	.LVL761
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL761
-	.4byte	.LVL766
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL766
-	.4byte	.LVL767
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL767
-	.4byte	.LVL773
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL773
-	.4byte	.LVL780
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL780
-	.4byte	.LVL783
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL783
-	.4byte	.LVL789
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL789
-	.4byte	.LVL794
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL794
-	.4byte	.LFE233
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST281:
-	.4byte	.LVL746
-	.4byte	.LVL747
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL747
-	.4byte	.LVL748
-	.2byte	0x3
-	.byte	0x70
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL748
-	.4byte	.LVL749
-	.2byte	0xc
-	.byte	0x70
-	.sleb128 -1
-	.byte	0x31
-	.byte	0x24
-	.byte	0x73
-	.sleb128 0
-	.byte	0x22
-	.byte	0x94
-	.byte	0x2
-	.byte	0x23
-	.uleb128 0x1
-	.byte	0x9f
-	.4byte	.LVL751
-	.4byte	.LVL752
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL752
-	.4byte	.LVL753
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL756
-	.4byte	.LVL757
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL757
-	.4byte	.LVL758
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL758
-	.4byte	.LVL759
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL762
-	.4byte	.LVL763
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL763
-	.4byte	.LVL764
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL764
-	.4byte	.LVL765
-	.2byte	0x3
-	.byte	0x72
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL769
-	.4byte	.LVL770
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL770
-	.4byte	.LVL771
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL771
-	.4byte	.LVL772
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL774
-	.4byte	.LVL775
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL775
-	.4byte	.LVL776
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL776
-	.4byte	.LVL777
-	.2byte	0x2
-	.byte	0x32
-	.byte	0x9f
-	.4byte	.LVL777
-	.4byte	.LVL778
-	.2byte	0x2
-	.byte	0x33
-	.byte	0x9f
-	.4byte	.LVL778
-	.4byte	.LVL779
-	.2byte	0x2
-	.byte	0x34
-	.byte	0x9f
-	.4byte	.LVL779
-	.4byte	.LVL780
-	.2byte	0x2
-	.byte	0x37
-	.byte	0x9f
-	.4byte	.LVL780
-	.4byte	.LVL781
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL782
-	.4byte	.LVL783
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL784
-	.4byte	.LVL785
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL785
-	.4byte	.LVL786
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL786
-	.4byte	.LVL787
-	.2byte	0xc
-	.byte	0x73
-	.sleb128 -1
-	.byte	0x31
-	.byte	0x24
-	.byte	0x72
-	.sleb128 0
-	.byte	0x22
-	.byte	0x94
-	.byte	0x2
-	.byte	0x23
-	.uleb128 0x1
-	.byte	0x9f
-	.4byte	.LVL790
-	.4byte	.LVL791
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL791
-	.4byte	.LVL792
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL792
-	.4byte	.LVL793
-	.2byte	0x3
-	.byte	0x71
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL794
-	.4byte	.LVL795
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST282:
-	.4byte	.LVL751
-	.4byte	.LVL753
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL794
-	.4byte	.LFE233
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST411:
-	.4byte	.LVL1253
-	.4byte	.LVL1254
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1254
-	.4byte	.LVL1260
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1260
-	.4byte	.LVL1263
-	.2byte	0x3
-	.byte	0x72
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL1263
-	.4byte	.LVL1264
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1266
-	.4byte	.LFE231
-	.2byte	0x3
-	.byte	0x72
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST412:
-	.4byte	.LVL1243
-	.4byte	.LVL1254
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1254
-	.4byte	.LVL1261
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1261
-	.4byte	.LVL1262
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1262
-	.4byte	.LVL1266
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1266
-	.4byte	.LVL1267
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST365:
-	.4byte	.LVL1099
-	.4byte	.LVL1100
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1100
-	.4byte	.LVL1109
-	.2byte	0x5
-	.byte	0x34
-	.byte	0x77
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL1109
-	.4byte	.LVL1110
-	.2byte	0x5
-	.byte	0x35
-	.byte	0x77
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL1110
-	.4byte	.LVL1124
-	.2byte	0x5
-	.byte	0x34
-	.byte	0x77
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST366:
-	.4byte	.LVL1100
-	.4byte	.LVL1101
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1101
-	.4byte	.LVL1109
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1121
-	.4byte	.LVL1122
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST367:
-	.4byte	.LVL1096
-	.4byte	.LVL1100
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1100
-	.4byte	.LVL1115
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1117
-	.4byte	.LVL1118
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1119
-	.4byte	.LVL1120
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1121
-	.4byte	.LVL1126
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1126
-	.4byte	.LFE230
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST368:
-	.4byte	.LVL1096
-	.4byte	.LVL1100
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1103
-	.4byte	.LVL1104
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1104
-	.4byte	.LVL1105
-	.2byte	0x3
-	.byte	0x70
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL1106
-	.4byte	.LVL1107
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1107
-	.4byte	.LVL1109
-	.2byte	0x3
-	.byte	0x70
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST369:
-	.4byte	.LVL1097
-	.4byte	.LVL1098
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1098
-	.4byte	.LVL1126
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -52
-	.4byte	.LVL1126
-	.4byte	.LFE230
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 -52
-	.4byte	0
-	.4byte	0
-.LLST44:
-	.4byte	.LVL70
-	.4byte	.LVL72
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL72
-	.4byte	.LFE229
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST45:
-	.4byte	.LVL70
-	.4byte	.LVL71
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL71
-	.4byte	.LFE229
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST46:
-	.4byte	.LVL70
-	.4byte	.LVL72
-	.2byte	0x6
-	.byte	0xc
-	.4byte	0x47c6a7e6
-	.byte	0x9f
-	.4byte	.LVL72
-	.4byte	.LFE229
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST47:
-	.4byte	.LVL70
-	.4byte	.LVL72
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL72
-	.4byte	.LVL73
-	.2byte	0x7
-	.byte	0x70
-	.sleb128 0
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL74
-	.4byte	.LVL75
-	.2byte	0x7
-	.byte	0x70
-	.sleb128 0
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL75
-	.4byte	.LVL76
-	.2byte	0x8
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x20
-	.byte	0x70
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.4byte	.LVL76
-	.4byte	.LFE229
-	.2byte	0x7
-	.byte	0x70
-	.sleb128 0
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST338:
-	.4byte	.LVL1015
-	.4byte	.LVL1020
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1020
-	.4byte	.LVL1048
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1048
-	.4byte	.LVL1049
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1049
-	.4byte	.LFE227
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST339:
-	.4byte	.LVL1015
-	.4byte	.LVL1021-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1021-1
-	.4byte	.LVL1048
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -44
-	.4byte	.LVL1048
-	.4byte	.LVL1049
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1049
-	.4byte	.LFE227
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -44
-	.4byte	0
-	.4byte	0
-.LLST340:
-	.4byte	.LVL1015
-	.4byte	.LVL1021-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1021-1
-	.4byte	.LVL1029
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -52
-	.4byte	.LVL1030
-	.4byte	.LVL1031
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -52
-	.4byte	.LVL1031
-	.4byte	.LVL1033
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1034
-	.4byte	.LVL1037
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -52
-	.4byte	.LVL1037
-	.4byte	.LVL1041
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1048
-	.4byte	.LVL1049
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1049
-	.4byte	.LVL1054
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -52
-	.4byte	.LVL1054
-	.4byte	.LVL1055
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1055
-	.4byte	.LFE227
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -52
-	.4byte	0
-	.4byte	0
-.LLST341:
-	.4byte	.LVL1015
-	.4byte	.LVL1016
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1016
-	.4byte	.LVL1029
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1030
-	.4byte	.LVL1031
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1031
-	.4byte	.LVL1033
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1034
-	.4byte	.LVL1037
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1037
-	.4byte	.LVL1041
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1048
-	.4byte	.LVL1054
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1054
-	.4byte	.LVL1055
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1055
-	.4byte	.LFE227
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST342:
-	.4byte	.LVL1015
-	.4byte	.LVL1030
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 0
-	.4byte	.LVL1030
-	.4byte	.LFE227
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 0
-	.4byte	0
-	.4byte	0
-.LLST343:
-	.4byte	.LVL1015
-	.4byte	.LVL1029
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1030
-	.4byte	.LVL1034
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1037
-	.4byte	.LVL1041
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1041
-	.4byte	.LVL1042
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1047
-	.4byte	.LVL1048
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1048
-	.4byte	.LVL1049
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1054
-	.4byte	.LVL1055
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST344:
-	.4byte	.LVL1034
-	.4byte	.LVL1048
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1049
-	.4byte	.LFE227
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	0
-	.4byte	0
-.LLST345:
-	.4byte	.LVL1015
-	.4byte	.LVL1029
-	.2byte	0x4
-	.byte	0xa
-	.2byte	0x400
-	.byte	0x9f
-	.4byte	.LVL1030
-	.4byte	.LVL1032
-	.2byte	0x4
-	.byte	0xa
-	.2byte	0x400
-	.byte	0x9f
-	.4byte	.LVL1032
-	.4byte	.LVL1033
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1034
-	.4byte	.LVL1037
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1037
-	.4byte	.LVL1041
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1041
-	.4byte	.LVL1048
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1048
-	.4byte	.LVL1049
-	.2byte	0x4
-	.byte	0xa
-	.2byte	0x400
-	.byte	0x9f
-	.4byte	.LVL1049
-	.4byte	.LVL1054
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1054
-	.4byte	.LVL1055
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1055
-	.4byte	.LFE227
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST346:
-	.4byte	.LVL1025
-	.4byte	.LVL1026
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1026
-	.4byte	.LVL1029
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1030
-	.4byte	.LVL1033
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1036
-	.4byte	.LVL1043
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1049
-	.4byte	.LFE227
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST347:
-	.4byte	.LVL1015
-	.4byte	.LVL1029
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1030
-	.4byte	.LVL1034
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1034
-	.4byte	.LVL1048
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1048
-	.4byte	.LVL1049
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1049
-	.4byte	.LVL1053
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1054
-	.4byte	.LFE227
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST348:
-	.4byte	.LVL1015
-	.4byte	.LVL1029
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1030
-	.4byte	.LVL1034
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1034
-	.4byte	.LVL1042
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -40
-	.4byte	.LVL1048
-	.4byte	.LVL1049
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1049
-	.4byte	.LVL1050
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -40
-	.4byte	.LVL1050
-	.4byte	.LVL1052
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1052
-	.4byte	.LFE227
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -40
-	.4byte	0
-	.4byte	0
-.LLST349:
-	.4byte	.LVL1015
-	.4byte	.LVL1029
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1030
-	.4byte	.LVL1034
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1041
-	.4byte	.LVL1042
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1048
-	.4byte	.LVL1049
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1051
-	.4byte	.LVL1052
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST350:
-	.4byte	.LVL1015
-	.4byte	.LVL1029
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1030
-	.4byte	.LVL1034
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1034
-	.4byte	.LVL1037
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1037
-	.4byte	.LVL1039
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1039
-	.4byte	.LVL1040
-	.2byte	0x6
-	.byte	0x7b
-	.sleb128 0
-	.byte	0x74
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL1040
-	.4byte	.LVL1048
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1048
-	.4byte	.LVL1049
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1049
-	.4byte	.LVL1054
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1054
-	.4byte	.LVL1055
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1055
-	.4byte	.LFE227
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST351:
-	.4byte	.LVL1015
-	.4byte	.LVL1019
-	.2byte	0x2
-	.byte	0x36
-	.byte	0x9f
-	.4byte	.LVL1019
-	.4byte	.LVL1029
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1030
-	.4byte	.LVL1034
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1048
-	.4byte	.LVL1049
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	0
-	.4byte	0
-.LLST352:
-	.4byte	.LVL1017
-	.4byte	.LVL1018
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1018
-	.4byte	.LFE227
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -36
-	.4byte	0
-	.4byte	0
-.LLST110:
-	.4byte	.LVL218
-	.4byte	.LVL223
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL223
-	.4byte	.LVL225
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL225
-	.4byte	.LFE226
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST111:
-	.4byte	.LVL218
-	.4byte	.LVL219
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST112:
-	.4byte	.LVL220
-	.4byte	.LVL221
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL221
-	.4byte	.LVL222
-	.2byte	0x8
-	.byte	0x75
-	.sleb128 0
-	.byte	0x3
-	.4byte	.LANCHOR22
-	.byte	0x22
-	.4byte	.LVL225
-	.4byte	.LFE226
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST106:
-	.4byte	.LVL208
-	.4byte	.LVL209-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL209-1
-	.4byte	.LFE225
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST107:
-	.4byte	.LVL208
-	.4byte	.LVL209-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL209-1
-	.4byte	.LFE225
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST108:
-	.4byte	.LVL208
-	.4byte	.LVL209-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL209-1
-	.4byte	.LFE225
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST109:
-	.4byte	.LVL214
-	.4byte	.LVL215
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL215
-	.4byte	.LVL216
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL216
-	.4byte	.LVL217
-	.2byte	0x5
-	.byte	0x71
-	.sleb128 0
-	.byte	0x31
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL217
-	.4byte	.LFE225
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST405:
-	.4byte	.LVL1223
-	.4byte	.LVL1229
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1229
-	.4byte	.LVL1241
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1241
-	.4byte	.LFE224
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST406:
-	.4byte	.LVL1223
-	.4byte	.LVL1227
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1227
-	.4byte	.LFE224
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST407:
-	.4byte	.LVL1223
-	.4byte	.LVL1226
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1226
-	.4byte	.LFE224
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST408:
-	.4byte	.LVL1223
-	.4byte	.LVL1224
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1224
-	.4byte	.LFE224
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST409:
-	.4byte	.LVL1237
-	.4byte	.LVL1238
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1238
-	.4byte	.LVL1239
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1239
-	.4byte	.LVL1240
-	.2byte	0x5
-	.byte	0x71
-	.sleb128 0
-	.byte	0x31
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL1240
-	.4byte	.LVL1241
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST410:
-	.4byte	.LVL1225
-	.4byte	.LVL1242
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1242
-	.4byte	.LFE224
-	.2byte	0xb
-	.byte	0x3
-	.4byte	gNandParaInfo+9
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST353:
-	.4byte	.LVL1057
-	.4byte	.LVL1058-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1058-1
-	.4byte	.LFE223
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST354:
-	.4byte	.LVL1057
-	.4byte	.LVL1058-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1058-1
-	.4byte	.LVL1080
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1080
-	.4byte	.LFE223
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST355:
-	.4byte	.LVL1057
-	.4byte	.LVL1058-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1058-1
-	.4byte	.LVL1080
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1080
-	.4byte	.LFE223
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST356:
-	.4byte	.LVL1057
-	.4byte	.LVL1058-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1058-1
-	.4byte	.LVL1080
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1080
-	.4byte	.LFE223
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST357:
-	.4byte	.LVL1059
-	.4byte	.LVL1060
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1063
-	.4byte	.LVL1064
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1064
-	.4byte	.LVL1066
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1066
-	.4byte	.LVL1067
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1067
-	.4byte	.LVL1068
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1068
-	.4byte	.LVL1069
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1069
-	.4byte	.LVL1071
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1071
-	.4byte	.LVL1072
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1072
-	.4byte	.LVL1073-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1073-1
-	.4byte	.LVL1075
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1077
-	.4byte	.LVL1078
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1078
-	.4byte	.LVL1080
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1080
-	.4byte	.LFE223
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST359:
-	.4byte	.LVL1066
-	.4byte	.LVL1069
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	0
-	.4byte	0
-.LLST358:
-	.4byte	.LVL1061
-	.4byte	.LVL1066
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST332:
-	.4byte	.LVL1000
-	.4byte	.LVL1004
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1004
-	.4byte	.LFE222
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST333:
-	.4byte	.LVL1000
-	.4byte	.LVL1006-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1006-1
-	.4byte	.LVL1014
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1014
-	.4byte	.LFE222
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST334:
-	.4byte	.LVL1000
-	.4byte	.LVL1003
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1003
-	.4byte	.LVL1014
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1014
-	.4byte	.LFE222
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST335:
-	.4byte	.LVL1000
-	.4byte	.LVL1001
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1001
-	.4byte	.LVL1014
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1014
-	.4byte	.LFE222
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST336:
-	.4byte	.LVL1011
-	.4byte	.LVL1012
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1012
-	.4byte	.LFE222
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST337:
-	.4byte	.LVL1002
-	.4byte	.LVL1014
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST39:
-	.4byte	.LVL64
-	.4byte	.LVL66
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL66
-	.4byte	.LFE221
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST40:
-	.4byte	.LVL64
-	.4byte	.LVL69-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL69-1
-	.4byte	.LFE221
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST41:
-	.4byte	.LVL64
-	.4byte	.LVL65
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL65
-	.4byte	.LVL66
-	.2byte	0xa
-	.byte	0x70
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST42:
-	.4byte	.LVL65
-	.4byte	.LVL67
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST43:
-	.4byte	.LVL68
-	.4byte	.LVL69
-	.2byte	0x3
-	.byte	0x8
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST36:
-	.4byte	.LVL60
-	.4byte	.LVL61
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL61
-	.4byte	.LFE220
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST37:
-	.4byte	.LVL60
-	.4byte	.LVL62
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL62
-	.4byte	.LVL63
-	.2byte	0xa
-	.byte	0x70
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST38:
-	.4byte	.LVL62
-	.4byte	.LVL63
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST34:
-	.4byte	.LVL57
-	.4byte	.LVL58
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL58
-	.4byte	.LVL59
-	.2byte	0xa
-	.byte	0x70
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST35:
-	.4byte	.LVL58
-	.4byte	.LVL59
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST31:
-	.4byte	.LVL53
-	.4byte	.LVL56-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL56-1
-	.4byte	.LFE218
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST32:
-	.4byte	.LVL53
-	.4byte	.LVL54
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL54
-	.4byte	.LVL55
-	.2byte	0xa
-	.byte	0x70
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST33:
-	.4byte	.LVL54
-	.4byte	.LVL55
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST26:
-	.4byte	.LVL47
-	.4byte	.LVL49
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL49
-	.4byte	.LFE217
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST27:
-	.4byte	.LVL47
-	.4byte	.LVL51
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL51
-	.4byte	.LVL52
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST28:
-	.4byte	.LVL47
-	.4byte	.LVL50
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL50
-	.4byte	.LFE217
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST29:
-	.4byte	.LVL47
-	.4byte	.LVL48
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL48
-	.4byte	.LVL49
-	.2byte	0xa
-	.byte	0x70
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST30:
-	.4byte	.LVL48
-	.4byte	.LVL49
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST23:
-	.4byte	.LVL43
-	.4byte	.LVL46-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL46-1
-	.4byte	.LFE216
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST24:
-	.4byte	.LVL43
-	.4byte	.LVL44
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL44
-	.4byte	.LVL45
-	.2byte	0xa
-	.byte	0x70
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST25:
-	.4byte	.LVL44
-	.4byte	.LVL45
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST129:
-	.4byte	.LVL281
-	.4byte	.LVL286-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL286-1
-	.4byte	.LVL289
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL289
-	.4byte	.LFE213
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST130:
-	.4byte	.LVL281
-	.4byte	.LVL282
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL282
-	.4byte	.LVL288
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL288
-	.4byte	.LVL289
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL289
-	.4byte	.LFE213
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST131:
-	.4byte	.LVL281
-	.4byte	.LVL285
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL285
-	.4byte	.LVL287
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL287
-	.4byte	.LVL289
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	.LVL289
-	.4byte	.LFE213
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST132:
-	.4byte	.LVL281
-	.4byte	.LVL283
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL283
-	.4byte	.LVL284
-	.2byte	0xa
-	.byte	0x70
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST14:
-	.4byte	.LVL29
-	.4byte	.LVL32-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL32-1
-	.4byte	.LVL32
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL32
-	.4byte	.LFE212
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST15:
-	.4byte	.LVL29
-	.4byte	.LVL30
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL30
-	.4byte	.LVL31
-	.2byte	0xa
-	.byte	0x70
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST16:
-	.4byte	.LVL30
-	.4byte	.LVL31
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST11:
-	.4byte	.LVL25
-	.4byte	.LVL28-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL28-1
-	.4byte	.LFE211
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST12:
-	.4byte	.LVL25
-	.4byte	.LVL26
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL26
-	.4byte	.LVL27
-	.2byte	0xa
-	.byte	0x70
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST13:
-	.4byte	.LVL26
-	.4byte	.LVL27
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST136:
-	.4byte	.LVL301
-	.4byte	.LVL302
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL302
-	.4byte	.LFE210
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST104:
-	.4byte	.LVL202
-	.4byte	.LVL205-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL205-1
-	.4byte	.LFE207
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST105:
-	.4byte	.LVL202
-	.4byte	.LVL203
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL203
-	.4byte	.LVL204
-	.2byte	0xa
-	.byte	0x70
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST6:
-	.4byte	.LVL18
-	.4byte	.LVL20-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL20-1
-	.4byte	.LFE206
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST7:
-	.4byte	.LVL19
-	.4byte	.LVL24
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST8:
-	.4byte	.LVL21
-	.4byte	.LVL23
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST9:
-	.4byte	.LVL21
-	.4byte	.LVL23
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST10:
-	.4byte	.LVL22
-	.4byte	.LVL23
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST4:
-	.4byte	.LVL13
-	.4byte	.LVL15-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL15-1
-	.4byte	.LFE205
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST5:
-	.4byte	.LVL14
-	.4byte	.LVL17
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL17
-	.4byte	.LFE205
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST3:
-	.4byte	.LVL9
-	.4byte	.LVL10
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL10
-	.4byte	.LVL11
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL11
-	.4byte	.LVL12
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL12
-	.4byte	.LFE204
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST1:
-	.4byte	.LVL2
-	.4byte	.LVL5
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL5
-	.4byte	.LVL6
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL6
-	.4byte	.LVL8
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL8
-	.4byte	.LFE203
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST2:
-	.4byte	.LVL3
-	.4byte	.LVL4
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL6
-	.4byte	.LVL7
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL7
-	.4byte	.LFE203
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST0:
-	.4byte	.LVL0
-	.4byte	.LVL1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1
-	.4byte	.LFE507
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST17:
-	.4byte	.LVL34
-	.4byte	.LVL37
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST18:
-	.4byte	.LVL34
-	.4byte	.LVL35
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL35
-	.4byte	.LVL36
-	.2byte	0xa
-	.byte	0x70
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST19:
-	.4byte	.LVL35
-	.4byte	.LVL36
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST20:
-	.4byte	.LVL39
-	.4byte	.LVL42
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST21:
-	.4byte	.LVL39
-	.4byte	.LVL40
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL40
-	.4byte	.LVL41
-	.2byte	0xa
-	.byte	0x70
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST22:
-	.4byte	.LVL40
-	.4byte	.LVL41
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST76:
-	.4byte	.LVL129
-	.4byte	.LVL129
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL129
-	.4byte	.LVL130
-	.2byte	0xa
-	.byte	0x70
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST77:
-	.4byte	.LVL129
-	.4byte	.LVL130
-	.2byte	0x1f
-	.byte	0x70
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap+4
-	.byte	0x22
-	.byte	0x6
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x23
-	.uleb128 0x8
-	.byte	0x38
-	.byte	0x24
-	.byte	0x70
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap
-	.byte	0x22
-	.byte	0x6
-	.byte	0x22
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST78:
-	.4byte	.LVL129
-	.4byte	.LVL130
-	.2byte	0xa
-	.byte	0x70
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST94:
-	.4byte	.LVL178
-	.4byte	.LVL179
-	.2byte	0x8
-	.byte	0x3
-	.4byte	gpNandParaInfo
-	.byte	0x6
-	.byte	0x23
-	.uleb128 0x13
-	.4byte	0
-	.4byte	0
-.LLST95:
-	.4byte	.LVL180
-	.4byte	.LVL181-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL181-1
-	.4byte	.LVL181
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL181
-	.4byte	.LVL182
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST100:
-	.4byte	.LVL193
-	.4byte	.LVL194-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL194-1
-	.4byte	.LFE276
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST165:
-	.4byte	.LVL404
-	.4byte	.LVL405
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL405
-	.4byte	.LVL406
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL406
-	.4byte	.LVL407
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL407
-	.4byte	.LFE299
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST166:
-	.4byte	.LVL408
-	.4byte	.LVL409
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL409
-	.4byte	.LFE312
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST196:
-	.4byte	.LVL481
-	.4byte	.LVL509
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL509
-	.4byte	.LVL510
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL510
-	.4byte	.LFE339
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST197:
-	.4byte	.LVL482
-	.4byte	.LVL508
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL510
-	.4byte	.LFE339
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST198:
-	.4byte	.LVL483
-	.4byte	.LVL508
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL510
-	.4byte	.LVL515
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL515
-	.4byte	.LVL516
-	.2byte	0x8
-	.byte	0x70
-	.sleb128 0
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x7c
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.4byte	.LVL516
-	.4byte	.LVL517
-	.2byte	0x9
-	.byte	0x72
-	.sleb128 0
-	.byte	0x70
-	.sleb128 0
-	.byte	0x1e
-	.byte	0x7c
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.4byte	.LVL517
-	.4byte	.LFE339
-	.2byte	0x8
-	.byte	0x70
-	.sleb128 0
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x7c
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST199:
-	.4byte	.LVL486
-	.4byte	.LVL500
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL502
-	.4byte	.LVL507
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL510
-	.4byte	.LVL511
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL513
-	.4byte	.LFE339
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST200:
-	.4byte	.LVL484
-	.4byte	.LVL485
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL485
-	.4byte	.LVL497
-	.2byte	0x7
-	.byte	0x70
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0x7e
-	.sleb128 0
-	.byte	0x22
-	.4byte	.LVL500
-	.4byte	.LVL501
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL501
-	.4byte	.LVL506
-	.2byte	0x7
-	.byte	0x70
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0x7e
-	.sleb128 0
-	.byte	0x22
-	.4byte	.LVL510
-	.4byte	.LVL514
-	.2byte	0x7
-	.byte	0x70
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0x7e
-	.sleb128 0
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST201:
-	.4byte	.LVL492
-	.4byte	.LVL495
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL495
-	.4byte	.LVL497
-	.2byte	0x7
-	.byte	0x72
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0x7e
-	.sleb128 0
-	.byte	0x22
-	.4byte	.LVL502
-	.4byte	.LVL504
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL504
-	.4byte	.LVL506
-	.2byte	0x7
-	.byte	0x72
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0x7e
-	.sleb128 0
-	.byte	0x22
-	.4byte	.LVL510
-	.4byte	.LVL512
-	.2byte	0x7
-	.byte	0x72
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0x7e
-	.sleb128 0
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST202:
-	.4byte	.LVL484
-	.4byte	.LVL485
-	.2byte	0xe
-	.byte	0x72
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x76
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL485
-	.4byte	.LVL486
-	.2byte	0x15
-	.byte	0x70
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0x7e
-	.sleb128 0
-	.byte	0x22
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x76
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL486
-	.4byte	.LVL487
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL487
-	.4byte	.LVL500
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -44
-	.4byte	.LVL500
-	.4byte	.LVL501
-	.2byte	0xe
-	.byte	0x72
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x76
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL501
-	.4byte	.LVL502
-	.2byte	0x15
-	.byte	0x70
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0x7e
-	.sleb128 0
-	.byte	0x22
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x76
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL502
-	.4byte	.LVL508
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -44
-	.4byte	.LVL510
-	.4byte	.LFE339
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -44
-	.4byte	0
-	.4byte	0
-.LLST203:
-	.4byte	.LVL493
-	.4byte	.LVL494
-	.2byte	0xe
-	.byte	0x76
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x77
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL494
-	.4byte	.LVL496
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL502
-	.4byte	.LVL503
-	.2byte	0xe
-	.byte	0x76
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x77
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL503
-	.4byte	.LVL504
-	.2byte	0x10
-	.byte	0x76
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x73
-	.sleb128 4
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL504
-	.4byte	.LVL505
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST204:
-	.4byte	.LVL488
-	.4byte	.LVL498
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL498
-	.4byte	.LVL499
-	.2byte	0x5
-	.byte	0x7c
-	.sleb128 0
-	.byte	0x74
-	.sleb128 0
-	.byte	0x22
-	.4byte	.LVL502
-	.4byte	.LVL508
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL510
-	.4byte	.LVL514
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST205:
-	.4byte	.LVL518
-	.4byte	.LVL519-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL519-1
-	.4byte	.LFE338
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST210:
-	.4byte	.LVL541
-	.4byte	.LVL542-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL542-1
-	.4byte	.LFE337
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST223:
-	.4byte	.LVL584
-	.4byte	.LVL590
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL590
-	.4byte	.LVL604
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL604
-	.4byte	.LVL606
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL606
-	.4byte	.LFE344
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST224:
-	.4byte	.LVL585
-	.4byte	.LVL590
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL590
-	.4byte	.LVL603
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL604
-	.4byte	.LVL606
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL606
-	.4byte	.LFE344
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST225:
-	.4byte	.LVL593
-	.4byte	.LVL595
-	.2byte	0x5
-	.byte	0x72
-	.sleb128 0
-	.byte	0x36
-	.byte	0x1b
-	.byte	0x9f
-	.4byte	.LVL595
-	.4byte	.LVL600-1
-	.2byte	0xd
-	.byte	0x7a
-	.sleb128 2
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x36
-	.byte	0x1b
-	.byte	0x9f
-	.4byte	.LVL606
-	.4byte	.LFE344
-	.2byte	0xd
-	.byte	0x7a
-	.sleb128 2
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x36
-	.byte	0x1b
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST226:
-	.4byte	.LVL587
-	.4byte	.LVL589
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL589
-	.4byte	.LVL590
-	.2byte	0xb
-	.byte	0x70
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0x3
-	.4byte	p_valid_page_count_table
-	.byte	0x6
-	.byte	0x22
-	.4byte	.LVL590
-	.4byte	.LVL591-1
-	.2byte	0xb
-	.byte	0x74
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0x3
-	.4byte	p_valid_page_count_table
-	.byte	0x6
-	.byte	0x22
-	.4byte	.LVL604
-	.4byte	.LVL606
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST227:
-	.4byte	.LVL587
-	.4byte	.LVL588
-	.2byte	0xe
-	.byte	0x72
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x75
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL588
-	.4byte	.LVL598
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL604
-	.4byte	.LVL605
-	.2byte	0xe
-	.byte	0x72
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x75
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL605
-	.4byte	.LVL606
-	.2byte	0x10
-	.byte	0x72
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x7a
-	.sleb128 4
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL606
-	.4byte	.LFE344
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST228:
-	.4byte	.LVL594
-	.4byte	.LVL599
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL599
-	.4byte	.LVL600-1
-	.2byte	0x1c
-	.byte	0x7a
-	.sleb128 2
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x31
-	.byte	0x26
-	.byte	0x11
-	.sleb128 -1431655765
-	.byte	0x1e
-	.byte	0x31
-	.byte	0x24
-	.byte	0x3
-	.4byte	p_valid_page_count_table
-	.byte	0x6
-	.byte	0x22
-	.4byte	.LVL606
-	.4byte	.LFE344
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST229:
-	.4byte	.LVL596
-	.4byte	.LVL597
-	.2byte	0xe
-	.byte	0x70
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x73
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL597
-	.4byte	.LVL600-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL606
-	.4byte	.LVL607
-	.2byte	0xe
-	.byte	0x70
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x73
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL607
-	.4byte	.LFE344
-	.2byte	0x10
-	.byte	0x70
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x72
-	.sleb128 4
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST230:
-	.4byte	.LVL586
-	.4byte	.LVL603
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL604
-	.4byte	.LFE344
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST231:
-	.4byte	.LVL593
-	.4byte	.LVL595
-	.2byte	0xa
-	.byte	0x3
-	.4byte	p_data_block_list_table
-	.byte	0x6
-	.byte	0x72
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.4byte	.LVL595
-	.4byte	.LVL600-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL606
-	.4byte	.LFE344
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST232:
-	.4byte	.LVL608
-	.4byte	.LVL611-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL611-1
-	.4byte	.LVL616
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL616
-	.4byte	.LFE347
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST233:
-	.4byte	.LVL608
-	.4byte	.LVL609
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL610
-	.4byte	.LVL616
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST234:
-	.4byte	.LVL608
-	.4byte	.LVL611-1
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 12
-	.4byte	0
-	.4byte	0
-.LLST235:
-	.4byte	.LVL613
-	.4byte	.LVL615
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST239:
-	.4byte	.LVL638
-	.4byte	.LVL640
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL640
-	.4byte	.LFE358
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST240:
-	.4byte	.LVL639
-	.4byte	.LVL640
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL640
-	.4byte	.LFE358
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST241:
-	.4byte	.LVL641
-	.4byte	.LVL642-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL642-1
-	.4byte	.LVL642
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL642
-	.4byte	.LVL643
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL643
-	.4byte	.LFE363
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST242:
-	.4byte	.LVL641
-	.4byte	.LVL642-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL642-1
-	.4byte	.LVL642
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	.LVL642
-	.4byte	.LVL644
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL644
-	.4byte	.LFE363
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST258:
-	.4byte	.LVL689
-	.4byte	.LVL691-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL691-1
-	.4byte	.LFE385
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST259:
-	.4byte	.LVL690
-	.4byte	.LVL691-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL691-1
-	.4byte	.LVL691
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST360:
-	.4byte	.LVL1081
-	.4byte	.LVL1083
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1083
-	.4byte	.LFE228
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST361:
-	.4byte	.LVL1081
-	.4byte	.LVL1084-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1084-1
-	.4byte	.LFE228
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST362:
-	.4byte	.LVL1082
-	.4byte	.LVL1087
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1087
-	.4byte	.LVL1088
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1088
-	.4byte	.LVL1090
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST363:
-	.4byte	.LVL1091
-	.4byte	.LVL1094
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST364:
-	.4byte	.LVL1091
-	.4byte	.LVL1094
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST422:
-	.4byte	.LVL1303
-	.4byte	.LVL1304
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1304
-	.4byte	.LFE484
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST472:
-	.4byte	.LVL1547
-	.4byte	.LVL1548-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1548-1
-	.4byte	.LVL1548
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1548
-	.4byte	.LVL1549
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1549
-	.4byte	.LVL1550
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1550
-	.4byte	.LVL1551
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1551
-	.4byte	.LVL1552
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1552
-	.4byte	.LVL1553
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1553
-	.4byte	.LVL1554
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1554
-	.4byte	.LVL1555
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1555
-	.4byte	.LVL1556
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1556
-	.4byte	.LVL1557
-	.2byte	0x4
-	.byte	0x72
-	.sleb128 65
-	.byte	0x9f
-	.4byte	.LVL1557
-	.4byte	.LVL1558
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1558
-	.4byte	.LVL1559
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1559
-	.4byte	.LVL1560
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1560
-	.4byte	.LFE237
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST473:
-	.4byte	.LVL1554
-	.4byte	.LVL1555
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1555
-	.4byte	.LVL1556
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1556
-	.4byte	.LVL1557
-	.2byte	0x4
-	.byte	0x72
-	.sleb128 65
-	.byte	0x9f
-	.4byte	.LVL1557
-	.4byte	.LVL1558
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1558
-	.4byte	.LVL1559
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1559
-	.4byte	.LVL1560
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST526:
-	.4byte	.LVL1804
-	.4byte	.LVL1806
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1806
-	.4byte	.LVL1814
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1814
-	.4byte	.LFE235
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST527:
-	.4byte	.LVL1805
-	.4byte	.LVL1807
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST539:
-	.4byte	.LVL1876
-	.4byte	.LVL1878
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1889
-	.4byte	.LVL1890
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1890
-	.4byte	.LVL1891
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL1891
-	.4byte	.LVL1892
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST540:
-	.4byte	.LVL1877
-	.4byte	.LVL1888
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1892
-	.4byte	.LFE320
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST541:
-	.4byte	.LVL1894
-	.4byte	.LVL1895
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1895
-	.4byte	.LVL1944
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1944
-	.4byte	.LFE386
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST542:
-	.4byte	.LVL1906
-	.4byte	.LVL1912
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1913
-	.4byte	.LVL1943
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST543:
-	.4byte	.LVL1916
-	.4byte	.LVL1931
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1932
-	.4byte	.LVL1943
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST544:
-	.4byte	.LVL1923
-	.4byte	.LVL1924
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1926
-	.4byte	.LVL1927
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1927
-	.4byte	.LVL1930
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1936
-	.4byte	.LVL1939
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1939
-	.4byte	.LVL1940
-	.2byte	0x3
-	.byte	0x7a
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1941
-	.4byte	.LVL1943
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST545:
-	.4byte	.LVL1926
-	.4byte	.LVL1927
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1927
-	.4byte	.LVL1930
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1936
-	.4byte	.LVL1943
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	0
-	.4byte	0
-.LLST546:
-	.4byte	.LVL1933
-	.4byte	.LVL1935
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST547:
-	.4byte	.LVL1933
-	.4byte	.LVL1935
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST548:
-	.4byte	.LVL1945
-	.4byte	.LVL1946
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1946
-	.4byte	.LFE406
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST549:
-	.4byte	.LVL1946
-	.4byte	.LVL1947
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1948
-	.4byte	.LVL1952
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1952
-	.4byte	.LVL1953
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1954
-	.4byte	.LFE406
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST550:
-	.4byte	.LVL1951
-	.4byte	.LVL1957
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1957
-	.4byte	.LVL1958
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1958
-	.4byte	.LVL1959
-	.2byte	0x3
-	.byte	0x7b
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1959
-	.4byte	.LVL1960
-	.2byte	0x3
-	.byte	0x76
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1960
-	.4byte	.LFE406
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	0
-	.4byte	0
-.LLST551:
-	.4byte	.LVL1956
-	.4byte	.LVL1958
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1960
-	.4byte	.LVL1961
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1962
-	.4byte	.LFE406
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST552:
-	.4byte	.LVL1963
-	.4byte	.LVL1965
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1965
-	.4byte	.LVL1973
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1973
-	.4byte	.LVL1974
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1974
-	.4byte	.LVL1975
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1975
-	.4byte	.LVL1976-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1976-1
-	.4byte	.LFE389
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST553:
-	.4byte	.LVL1964
-	.4byte	.LVL1973
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST556:
-	.4byte	.LVL1989
-	.4byte	.LVL1991
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1991
-	.4byte	.LVL1998
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1998
-	.4byte	.LFE373
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST557:
-	.4byte	.LVL1990
-	.4byte	.LVL1991
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1991
-	.4byte	.LVL1997
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST558:
-	.4byte	.LVL1991
-	.4byte	.LVL1992
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1995
-	.4byte	.LVL1996
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST562:
-	.4byte	.LVL2017
-	.4byte	.LVL2036
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2037
-	.4byte	.LFE360
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST563:
-	.4byte	.LVL2022
-	.4byte	.LVL2023
-	.2byte	0x12
-	.byte	0x70
-	.sleb128 0
-	.byte	0x33
-	.byte	0x25
-	.byte	0x70
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x23
-	.uleb128 0x18
-	.byte	0x31
-	.byte	0x24
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x4
-	.byte	0x9f
-	.4byte	.LVL2023
-	.4byte	.LVL2024-1
-	.2byte	0x1c
-	.byte	0x3
-	.4byte	c_ftl_nand_data_blks_per_plane
-	.byte	0x94
-	.byte	0x2
-	.byte	0x33
-	.byte	0x25
-	.byte	0x3
-	.4byte	c_ftl_nand_data_blks_per_plane
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x23
-	.uleb128 0x18
-	.byte	0x31
-	.byte	0x24
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x4
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST592:
-	.4byte	.LVL2161
-	.4byte	.LVL2162
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2162
-	.4byte	.LFE350
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST593:
-	.4byte	.LVL2161
-	.4byte	.LVL2162
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2162
-	.4byte	.LFE350
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST594:
-	.4byte	.LVL2161
-	.4byte	.LVL2162
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2162
-	.4byte	.LVL2177
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	.LVL2177
-	.4byte	.LVL2178
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -40
-	.4byte	.LVL2178
-	.4byte	.LFE350
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	0
-	.4byte	0
-.LLST595:
-	.4byte	.LVL2168
-	.4byte	.LVL2176
-	.2byte	0x7
-	.byte	0x77
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL2178
-	.4byte	.LFE350
-	.2byte	0x7
-	.byte	0x77
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST596:
-	.4byte	.LVL2170
-	.4byte	.LVL2171
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST723:
-	.4byte	.LVL2799
-	.4byte	.LVL2800-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST724:
-	.4byte	.LVL2824
-	.4byte	.LVL2825
-	.2byte	0x6
-	.byte	0x3
-	.4byte	g_active_superblock
-	.byte	0x9f
-	.4byte	.LVL2825
-	.4byte	.LVL2831
-	.2byte	0x6
-	.byte	0x3
-	.4byte	g_buffer_superblock
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST725:
-	.4byte	.LVL2833
-	.4byte	.LVL2837
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2837
-	.4byte	.LVL2840
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL2840
-	.4byte	.LVL2845
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2845
-	.4byte	.LVL2853
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL2853
-	.4byte	.LVL2854
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2854
-	.4byte	.LVL2906
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL2906
-	.4byte	.LVL2907
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2907
-	.4byte	.LVL2908
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL2908
-	.4byte	.LVL2909
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2909
-	.4byte	.LFE407
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST726:
-	.4byte	.LVL2833
-	.4byte	.LVL2835
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2835
-	.4byte	.LVL2906
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	.LVL2906
-	.4byte	.LFE407
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST727:
-	.4byte	.LVL2834
-	.4byte	.LVL2835
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2835
-	.4byte	.LVL2839
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	.LVL2840
-	.4byte	.LVL2905
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST728:
-	.4byte	.LVL2834
-	.4byte	.LVL2837
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2837
-	.4byte	.LVL2839
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL2840
-	.4byte	.LVL2845
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2845
-	.4byte	.LVL2853
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL2853
-	.4byte	.LVL2854
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2854
-	.4byte	.LVL2905
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST729:
-	.4byte	.LVL2886
-	.4byte	.LVL2890
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST730:
-	.4byte	.LVL2870
-	.4byte	.LVL2871
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2871
-	.4byte	.LVL2881
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -64
-	.4byte	.LVL2881
-	.4byte	.LVL2882
-	.2byte	0x7
-	.byte	0x91
-	.sleb128 -64
-	.byte	0x94
-	.byte	0x2
-	.byte	0x23
-	.uleb128 0x1
-	.byte	0x9f
-	.4byte	.LVL2883
-	.4byte	.LVL2905
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -64
-	.4byte	0
-	.4byte	0
-.LLST731:
-	.4byte	.LVL2872
-	.4byte	.LVL2876
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2876
-	.4byte	.LVL2877
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL2877
-	.4byte	.LVL2878-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2878
-	.4byte	.LVL2879
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2880
-	.4byte	.LVL2894
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -56
-	.4byte	.LVL2895
-	.4byte	.LVL2896
-	.2byte	0x7
-	.byte	0x91
-	.sleb128 -56
-	.byte	0x94
-	.byte	0x2
-	.byte	0x23
-	.uleb128 0x1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST732:
-	.4byte	.LVL2872
-	.4byte	.LVL2894
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -68
-	.4byte	.LVL2895
-	.4byte	.LVL2896
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -68
-	.4byte	0
-	.4byte	0
-.LLST733:
-	.4byte	.LVL2873
-	.4byte	.LVL2874
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2874
-	.4byte	.LVL2875
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -56
-	.byte	0x6
-	.4byte	0
-	.4byte	0
-.LLST734:
-	.4byte	.LVL2867
-	.4byte	.LVL2905
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -60
-	.4byte	0
-	.4byte	0
-.LLST735:
-	.4byte	.LVL2884
-	.4byte	.LVL2885
-	.2byte	0x2
-	.byte	0x72
-	.sleb128 12
-	.4byte	.LVL2885
-	.4byte	.LVL2894
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST736:
-	.4byte	.LVL2910
-	.4byte	.LVL2911
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2911
-	.4byte	.LFE302
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST737:
-	.4byte	.LVL2922
-	.4byte	.LVL2923
-	.2byte	0x7
-	.byte	0xa
-	.2byte	0x400
-	.byte	0x74
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL2923
-	.4byte	.LVL2924
-	.2byte	0x7
-	.byte	0xa
-	.2byte	0x401
-	.byte	0x74
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL2924
-	.4byte	.LFE302
-	.2byte	0x7
-	.byte	0xa
-	.2byte	0x400
-	.byte	0x74
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST779:
-	.4byte	.LVL3108
-	.4byte	.LVL3114
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL3114
-	.4byte	.LFE264
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST780:
-	.4byte	.LVL3108
-	.4byte	.LVL3113
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL3113
-	.4byte	.LVL3119
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL3119
-	.4byte	.LVL3128
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	.LVL3128
-	.4byte	.LFE264
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST781:
-	.4byte	.LVL3108
-	.4byte	.LVL3109
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL3109
-	.4byte	.LFE264
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	0
-	.4byte	0
-.LLST782:
-	.4byte	.LVL3108
-	.4byte	.LVL3117
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL3117
-	.4byte	.LVL3124
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL3125
-	.4byte	.LVL3128
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL3128
-	.4byte	.LVL3131
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL3131
-	.4byte	.LVL3132
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL3132
-	.4byte	.LFE264
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST783:
-	.4byte	.LVL3115
-	.4byte	.LVL3119
-	.2byte	0xc
-	.byte	0x75
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x22
-	.byte	0x3a
-	.byte	0x24
-	.byte	0x9f
-	.4byte	.LVL3128
-	.4byte	.LVL3129
-	.2byte	0xc
-	.byte	0x75
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x22
-	.byte	0x3a
-	.byte	0x24
-	.byte	0x9f
-	.4byte	.LVL3131
-	.4byte	.LFE264
-	.2byte	0xc
-	.byte	0x75
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x22
-	.byte	0x3a
-	.byte	0x24
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST784:
-	.4byte	.LVL3111
-	.4byte	.LVL3119
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL3128
-	.4byte	.LVL3129
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL3130
-	.4byte	.LFE264
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST785:
-	.4byte	.LVL3110
-	.4byte	.LVL3112
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL3112
-	.4byte	.LVL3114
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 15
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST786:
-	.4byte	.LVL3118
-	.4byte	.LVL3123
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL3125
-	.4byte	.LVL3128
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	0
-	.4byte	0
-.LLST787:
-	.4byte	.LVL3118
-	.4byte	.LVL3119
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL3119
-	.4byte	.LVL3123
-	.2byte	0x4
-	.byte	0xf3
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+	.ascii	"No.%d FLASH ID:%x %x %x %x %x %x\012\000"
+.LC24:
+	.ascii	"FlashLoadPhyInfo fail %x!!\012\000"
+	.section	.rodata.FlashProgSlc2KPages.str1.1,"aMS",%progbits,1
+.LC29:
+	.ascii	"prog error: = %x\012\000"
+.LC30:
+	.ascii	"prog read error: = %x\012\000"
+.LC31:
+	.ascii	"prog read s error: = %x %x %x\012\000"
+.LC32:
+	.ascii	"prog read d error: = %x %x %x\012\000"
+	.section	.rodata.FlashReadFacBbtData.str1.1,"aMS",%progbits,1
+.LC54:
+	.ascii	"BBT:\000"
+	.section	.rodata.FlashReadIdbDataRaw.str1.1,"aMS",%progbits,1
+.LC14:
+	.ascii	"ECC:%d\012\000"
+	.section	.rodata.FlashReadPage.str1.1,"aMS",%progbits,1
+.LC12:
+	.ascii	"read retry status %x %x %x\012\000"
+	.section	.rodata.FlashReadPages.str1.1,"aMS",%progbits,1
+.LC28:
+	.ascii	"ReadRetry pageadd=%x ecc=%x err=%x\012\000"
+	.section	.rodata.FlashReadSlc2KPages.str1.1,"aMS",%progbits,1
+.LC25:
+	.ascii	"Read pageadd=%x  ecc=%x err=%x\012\000"
+.LC26:
+	.ascii	"data:\000"
+.LC27:
+	.ascii	"spare:\000"
+	.section	.rodata.FtlBbmMapBadBlock.str1.1,"aMS",%progbits,1
+.LC2:
+	.ascii	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\012"
+	.ascii	"\000"
+	.section	.rodata.FtlBbmTblFlush.str1.1,"aMS",%progbits,1
+.LC33:
+	.ascii	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\012\000"
+.LC34:
+	.ascii	"FtlBbmTblFlush error:%x\012\000"
+.LC35:
+	.ascii	"FtlBbmTblFlush error = %x error count = %d\012\000"
+	.section	.rodata.FtlCheckVpc.str1.1,"aMS",%progbits,1
+.LC74:
+	.ascii	"vpc1\000"
+.LC75:
+	.ascii	"vpc2\000"
+.LC76:
+	.ascii	"FtlCheckVpc2 %x = %x  %x\012\000"
+.LC77:
+	.ascii	"free blk vpc error %x = %x  %x\012\000"
+	.section	.rodata.FtlDumpBlockInfo.str1.1,"aMS",%progbits,1
+.LC46:
+	.ascii	"...%s enter...\012\000"
+.LC47:
+	.ascii	"superBlkID = %x vpc=%x\012\000"
+.LC48:
+	.ascii	"flashmode = %x pagenum = %x %x\012\000"
+.LC49:
+	.ascii	"id = %x,%x addr= %x,spare= %x %x %x %x data=%x %x\012"
+	.ascii	"\000"
+	.section	.rodata.FtlDumpSysBlock.str1.1,"aMS",%progbits,1
+.LC78:
+	.ascii	"id = %x,%x addr= %x,spare= %x %x %x %x data = %x\012"
+	.ascii	"\000"
+.LC79:
+	.ascii	":\000"
+	.section	.rodata.FtlFreeSysBlkQueueOut.str1.1,"aMS",%progbits,1
+.LC3:
+	.ascii	"FtlFreeSysBlkQueueOut free count = %d\012\000"
+.LC4:
+	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\012"
+	.ascii	"\000"
+	.section	.rodata.FtlGcFreeTempBlock.str1.1,"aMS",%progbits,1
+.LC65:
+	.ascii	"GC des block %x done\012\000"
+	.section	.rodata.FtlGcScanTempBlk.str1.1,"aMS",%progbits,1
+.LC53:
+	.ascii	"FtlGcScanTempBlkError ID %x %x!!!!!!!\012\000"
+	.section	.rodata.FtlInit.str1.1,"aMS",%progbits,1
+.LC67:
+	.ascii	"FTL version: 5.0.49 20180810\000"
+.LC68:
+	.ascii	"...%s: no bad block mapping table, format device\012"
+	.ascii	"\000"
+.LC69:
+	.ascii	"...%s FtlSysBlkInit error ,format device!\012\000"
+	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",%progbits,1
+.LC44:
+	.ascii	"no ect\000"
+	.section	.rodata.FtlMapWritePage.str1.1,"aMS",%progbits,1
+.LC41:
+	.ascii	"FtlMapWritePage error = %x\012\000"
+.LC42:
+	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
+	.section	.rodata.FtlProgPages.str1.1,"aMS",%progbits,1
+.LC58:
+	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
+	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",%progbits,1
+.LC62:
+	.ascii	"RSB refresh addr %x\012\000"
+.LC63:
+	.ascii	"spuer block %x vpn is 0\012 \000"
+.LC64:
+	.ascii	"g_recovery_ppa %x ver %x\012 \000"
+	.section	.rodata.FtlScanAllBlock.str1.1,"aMS",%progbits,1
+.LC50:
+	.ascii	"blk = %x vpc=%x mode = %x\012\000"
+.LC51:
+	.ascii	"mlc id = %x,%x addr= %x,spare= %x %x %x %x data=%x "
+	.ascii	"%x\012\000"
+.LC52:
+	.ascii	"slc id = %x,%x addr= %x,spare= %x %x %x %x data=%x "
+	.ascii	"%x\012\000"
+	.section	.rodata.FtlVendorPartRead.str1.1,"aMS",%progbits,1
+.LC43:
+	.ascii	"FtlVendorPartRead refresh = %x phyAddr = %x\012\000"
+	.section	.rodata.FtlVpcTblFlush.str1.1,"aMS",%progbits,1
+.LC38:
+	.ascii	"FtlVpcTblFlush error = %x error count = %d\012\000"
+	.section	.rodata.FtlWrite.str1.1,"aMS",%progbits,1
+.LC73:
+	.ascii	"FtlWrite: lpa error:%x %x\012\000"
+	.section	.rodata.Ftl_load_ext_data.str1.1,"aMS",%progbits,1
+.LC45:
+	.ascii	"slc mode\000"
+	.section	.rodata.Ftlscanalldata.str1.1,"aMS",%progbits,1
+.LC59:
+	.ascii	"Ftlscanalldata = %x\012\000"
+.LC60:
+	.ascii	"scan lpa = %x ppa= %x\012\000"
+.LC61:
+	.ascii	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\012"
+	.ascii	"\000"
+	.section	.rodata.HynixGetReadRetryDefault.str1.1,"aMS",%progbits,1
+.LC21:
+	.ascii	"otp error! %d\000"
+.LC22:
+	.ascii	"rr\000"
+	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",%progbits,1
+.LC5:
+	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
+.LC6:
+	.ascii	"!!!!! FTL sys Error !!!!!\000"
+.LC7:
+	.ascii	"%s\012\000"
+	.section	.rodata.MicronReadRetrial.str1.1,"aMS",%progbits,1
+.LC13:
+	.ascii	"micron RR %d row=%x,count %d,status=%d\012\000"
+	.section	.rodata.__func__.10473,"a",%progbits
+	.set	.LANCHOR245,. + 0
+	.type	__func__.10473, %object
+	.size	__func__.10473, 8
+__func__.10473:
+	.ascii	"FtlInit\000"
+	.section	.rodata.__func__.10533,"a",%progbits
+	.set	.LANCHOR229,. + 0
+	.type	__func__.10533, %object
+	.size	__func__.10533, 13
+__func__.10533:
 	.ascii	"FtlProgPages\000"
-.LASF198:
-	.ascii	"powerDown\000"
-.LASF679:
-	.ascii	"c_ftl_nand_page_pre_blk\000"
-.LASF1303:
-	.ascii	"blk_Id\000"
-.LASF520:
-	.ascii	"UCLASS_KEY\000"
-.LASF1576:
-	.ascii	"memcpy\000"
-.LASF1467:
-	.ascii	"Randomizer_disable_reread\000"
-.LASF372:
-	.ascii	"_datarel_start_ofs\000"
-.LASF650:
-	.ascii	"List_Node\000"
-.LASF1148:
-	.ascii	"FtlGcUpdatePage\000"
-.LASF1006:
-	.ascii	"fm_work_scheduled\000"
-.LASF181:
-	.ascii	"intEn\000"
-.LASF772:
-	.ascii	"p_gc_blk_tbl\000"
-.LASF591:
-	.ascii	"in_gc_mode\000"
-.LASF241:
-	.ascii	"MTRANS_STAT\000"
-.LASF454:
-	.ascii	"UCLASS_ADC\000"
-.LASF185:
-	.ascii	"reserved18_19\000"
-.LASF221:
-	.ascii	"errBits1_5\000"
-.LASF615:
-	.ascii	"gcTempFlashMode\000"
-.LASF1296:
-	.ascii	"node_data_count\000"
-.LASF1528:
-	.ascii	"checkBlkSize\000"
-.LASF209:
-	.ascii	"errf0\000"
-.LASF214:
-	.ascii	"errf1\000"
-.LASF399:
-	.ascii	"ih_arch\000"
-.LASF1041:
-	.ascii	"vid_hdr_shift\000"
-.LASF264:
-	.ascii	"LLP_STAT\000"
-.LASF470:
-	.ascii	"UCLASS_IRQ\000"
-.LASF1534:
-	.ascii	"error_ecc0_count\000"
-.LASF154:
-	.ascii	"NC_IRQ_DMA\000"
-.LASF253:
-	.ascii	"BCHST\000"
-.LASF303:
-	.ascii	"__u8\000"
-.LASF1529:
-	.ascii	"JSHash\000"
-.LASF774:
-	.ascii	"g_gc_page_offset\000"
-.LASF1401:
-	.ascii	"NandcCopy1KB\000"
-.LASF546:
-	.ascii	"net_gateway\000"
-.LASF825:
-	.ascii	"Toshiba15RefValue\000"
-.LASF257:
-	.ascii	"DLL_OBS_REG0\000"
-.LASF1315:
-	.ascii	"ftl_cmp_data_ver\000"
-.LASF706:
-	.ascii	"g_VaildLpn\000"
-.LASF1512:
-	.ascii	"HynixGetReadRetryDefault\000"
-.LASF751:
-	.ascii	"p_vendor_block_valid_page_count\000"
-.LASF1554:
-	.ascii	"FlashReadDpCmd\000"
-.LASF1019:
-	.ascii	"works\000"
-.LASF1533:
-	.ascii	"cur_ecc\000"
-.LASF170:
-	.ascii	"reserved18_23\000"
-.LASF568:
-	.ascii	"net_ping_ip\000"
-.LASF112:
-	.ascii	"FlashMask\000"
-.LASF409:
-	.ascii	"type\000"
-.LASF347:
-	.ascii	"lmb_region\000"
-.LASF1153:
-	.ascii	"numREQ\000"
-.LASF108:
-	.ascii	"PageSize\000"
-.LASF341:
-	.ascii	"protect\000"
-.LASF1061:
-	.ascii	"dfs_chk_gen\000"
-.LASF1223:
-	.ascii	"blk_id\000"
-.LASF626:
-	.ascii	"GlobalDataVersion\000"
-.LASF1307:
-	.ascii	"erase_flag\000"
-.LASF1567:
-	.ascii	"FlashGetRandomizer\000"
-.LASF32:
-	.ascii	"pagePerSlcBlk\000"
-.LASF639:
-	.ascii	"last_refresh_data_times\000"
-.LASF192:
-	.ascii	"async_tog_mix\000"
-.LASF1226:
-	.ascii	"totleBlkNum\000"
-.LASF853:
-	.ascii	"cdev\000"
-.LASF1196:
-	.ascii	"saved_active_page\000"
-.LASF1546:
-	.ascii	"FlashReadStatus\000"
-.LASF1290:
-	.ascii	"pTmp\000"
-.LASF235:
-	.ascii	"tagMTRANS_CFG\000"
-.LASF186:
-	.ascii	"trRdy\000"
-.LASF957:
-	.ascii	"readers\000"
-.LASF485:
-	.ascii	"UCLASS_PCI\000"
-.LASF833:
-	.ascii	"ftl_gc_temp_block_bops_scan_page_addr\000"
-.LASF1416:
-	.ascii	"nandc_reg\000"
-.LASF847:
-	.ascii	"devt\000"
-.LASF1091:
-	.ascii	"FlashBootVendorWrite\000"
-.LASF1206:
-	.ascii	"recovery_flash_mode\000"
-.LASF445:
-	.ascii	"UCLASS_TEST\000"
-.LASF945:
-	.ascii	"ubi_fastmap_layout\000"
-.LASF765:
-	.ascii	"g_buffer_superblock\000"
-.LASF1188:
-	.ascii	"node_id\000"
-.LASF423:
-	.ascii	"fit_hdr_fdt\000"
-.LASF567:
-	.ascii	"net_boot_file_expected_size_in_blocks\000"
-.LASF328:
-	.ascii	"image_base\000"
-.LASF415:
-	.ascii	"legacy_hdr_valid\000"
-.LASF1462:
-	.ascii	"nextChipSel\000"
-.LASF510:
-	.ascii	"UCLASS_TPM\000"
-.LASF1062:
-	.ascii	"dfs_chk_io\000"
-.LASF1488:
-	.ascii	"FlashLoadPhyInfoInRam\000"
-.LASF1142:
-	.ascii	"FtlGcFreeTempBlock\000"
-.LASF711:
-	.ascii	"gBbtInfo\000"
-.LASF236:
-	.ascii	"MTRANS_CFG\000"
-.LASF476:
-	.ascii	"UCLASS_MISC\000"
-.LASF339:
-	.ascii	"sector_count\000"
-.LASF682:
-	.ascii	"c_ftl_nand_sec_pre_page\000"
-.LASF923:
-	.ascii	"mode\000"
-.LASF1047:
-	.ascii	"ckvol_mutex\000"
-.LASF1490:
-	.ascii	"FlashReadIdbData\000"
-.LASF1325:
-	.ascii	"FtlLoadBbt\000"
-.LASF313:
-	.ascii	"__kernel_loff_t\000"
-.LASF1104:
-	.ascii	"pvForm\000"
-.LASF600:
-	.ascii	"padding\000"
-.LASF129:
-	.ascii	"gNandFlashEccBits\000"
-.LASF1149:
-	.ascii	"src_ppa\000"
-.LASF1200:
-	.ascii	"detected_active_page\000"
-.LASF1524:
-	.ascii	"FlashSavePhyInfo\000"
-.LASF665:
-	.ascii	"ftl_gc_page_item\000"
-.LASF999:
-	.ascii	"fm_disabled\000"
-.LASF835:
-	.ascii	"mem_malloc_start\000"
-.LASF517:
-	.ascii	"UCLASS_VIDEO_CRTC\000"
-.LASF70:
-	.ascii	"badBlockMode\000"
-.LASF1202:
-	.ascii	"prev_ppa\000"
-.LASF403:
-	.ascii	"image_header_t\000"
-.LASF251:
-	.ascii	"MTRANS_SADDR0\000"
-.LASF252:
-	.ascii	"MTRANS_SADDR1\000"
-.LASF754:
-	.ascii	"g_totle_vendor_block\000"
-.LASF1144:
-	.ascii	"superblock_id\000"
-.LASF959:
-	.ascii	"exclusive\000"
-.LASF1114:
-	.ascii	"plane\000"
-.LASF307:
-	.ascii	"phys_addr_t\000"
-.LASF1012:
-	.ascii	"move_mutex\000"
-.LASF1486:
-	.ascii	"FlashInit\000"
-.LASF151:
-	.ascii	"FlashWaitBusyScheduleEn\000"
-.LASF400:
-	.ascii	"ih_type\000"
-.LASF2:
-	.ascii	"unsigned char\000"
-.LASF822:
-	.ascii	"refValueDefault\000"
-.LASF114:
-	.ascii	"read_retry_cur_offset\000"
-.LASF514:
-	.ascii	"UCLASS_VIDEO\000"
-.LASF1346:
-	.ascii	"ftl_write\000"
-.LASF1132:
-	.ascii	"FtlGcScanTempBlk\000"
-.LASF105:
-	.ascii	"_FLASH_INFO\000"
-.LASF414:
-	.ascii	"legacy_hdr_os_copy\000"
-.LASF1274:
-	.ascii	"vpcTbl\000"
-.LASF310:
-	.ascii	"__kernel_dev_t\000"
-.LASF1074:
-	.ascii	"ubi_ctrl_cdev_operations\000"
-.LASF483:
-	.ascii	"UCLASS_PANEL_BACKLIGHT\000"
-.LASF165:
-	.ascii	"reserved16_31\000"
-.LASF616:
-	.ascii	"activeSuperblockId\000"
-.LASF1400:
-	.ascii	"bchReg\000"
-.LASF1316:
-	.ascii	"ver1\000"
-.LASF24:
-	.ascii	"nand_phy_info\000"
-.LASF846:
-	.ascii	"class\000"
-.LASF1053:
-	.ascii	"emulate_bitflips\000"
-.LASF1493:
-	.ascii	"bchTbl\000"
-.LASF1124:
-	.ascii	"rk_ftl_get_capacity\000"
-.LASF784:
-	.ascii	"g_gc_refresh_block_temp_tbl\000"
-.LASF900:
-	.ascii	"_write_oob\000"
-.LASF1273:
-	.ascii	"ftl_free_no_use_map_blk\000"
-.LASF1318:
-	.ascii	"P2V_block_in_plane\000"
-.LASF1100:
-	.ascii	"str1\000"
-.LASF1101:
-	.ascii	"str2\000"
-.LASF1236:
-	.ascii	"pMapHeader\000"
-.LASF447:
-	.ascii	"UCLASS_TEST_BUS\000"
-.LASF1234:
-	.ascii	"FtlScanSysBlk\000"
-.LASF357:
-	.ascii	"bi_arm_freq\000"
-.LASF1214:
-	.ascii	"lookup_ppa_ver\000"
-.LASF1266:
-	.ascii	"region_num\000"
-.LASF927:
-	.ascii	"ooboffs\000"
-.LASF29:
-	.ascii	"planePreDie\000"
-.LASF1481:
-	.ascii	"PageIndex\000"
-.LASF674:
-	.ascii	"c_ftl_nand_blks_per_die_shift\000"
-.LASF1522:
-	.ascii	"slcPageNum\000"
-.LASF756:
-	.ascii	"p_l2p_map_buf\000"
-.LASF768:
-	.ascii	"gp_last_act_superblock\000"
-.LASF1389:
-	.ascii	"Ftl_log2\000"
-.LASF727:
-	.ascii	"p_sys_spare_buf\000"
-.LASF472:
-	.ascii	"UCLASS_LED\000"
-.LASF839:
-	.ascii	"p_current\000"
-.LASF1170:
-	.ascii	"get_new_id\000"
-.LASF559:
-	.ascii	"net_rx_packet_len\000"
-.LASF184:
-	.ascii	"spareSize\000"
-.LASF964:
-	.ascii	"used_bytes\000"
-.LASF831:
-	.ascii	"g_ect_tbl_power_up_flush\000"
-.LASF823:
-	.ascii	"SamsungRefValue\000"
-.LASF340:
-	.ascii	"flash_id\000"
-.LASF13:
-	.ascii	"mlcPageToSlcPageTbl\000"
-.LASF1561:
-	.ascii	"FlashBchSel\000"
-.LASF1388:
-	.ascii	"debug_flag\000"
-.LASF965:
-	.ascii	"upd_ebs\000"
-.LASF897:
-	.ascii	"_write\000"
-.LASF1156:
-	.ascii	"FtlGcBufInit\000"
-.LASF1398:
-	.ascii	"pSpareTemp\000"
-.LASF1357:
-	.ascii	"absolute_sector\000"
-.LASF529:
-	.ascii	"load_addr\000"
-.LASF624:
-	.ascii	"PowerLostTimes\000"
-.LASF781:
-	.ascii	"g_gc_bad_block_temp_tbl\000"
-.LASF977:
-	.ascii	"ubi_num\000"
-.LASF940:
-	.ascii	"upd_marker\000"
-.LASF743:
-	.ascii	"p_blk_mode_table\000"
-.LASF889:
-	.ascii	"ecclayout\000"
-.LASF284:
-	.ascii	"MASTER_INFO\000"
-.LASF920:
-	.ascii	"numblocks\000"
-.LASF893:
-	.ascii	"eraseregions\000"
-.LASF1403:
-	.ascii	"pDataAddr\000"
-.LASF764:
-	.ascii	"g_active_superblock\000"
-.LASF323:
-	.ascii	"uint64_t\000"
-.LASF716:
-	.ascii	"req_sys\000"
-.LASF657:
-	.ascii	"available_pages\000"
-.LASF1313:
-	.ascii	"high\000"
-.LASF1351:
-	.ascii	"nscts\000"
-.LASF686:
-	.ascii	"c_ftl_nand_reserved_blks\000"
-.LASF1219:
-	.ascii	"FtlL2PDataInit\000"
-.LASF537:
-	.ascii	"init\000"
-.LASF522:
-	.ascii	"UCLASS_CHARGE_DISPLAY\000"
-.LASF1470:
-	.ascii	"FlashProgSlc2KPages\000"
-.LASF969:
-	.ascii	"upd_buf\000"
-.LASF1452:
-	.ascii	"pBbt\000"
-.LASF1356:
-	.ascii	"ftl_read\000"
-.LASF197:
-	.ascii	"addrDontCare\000"
-.LASF1310:
-	.ascii	"FtlFreeSysBlkQueueInit\000"
-.LASF177:
-	.ascii	"stAddr\000"
-.LASF1030:
-	.ascii	"erroneous_peb_count\000"
-.LASF672:
-	.ascii	"c_ftl_nand_planes_per_die\000"
-.LASF681:
-	.ascii	"c_ftl_nand_page_pre_super_blk\000"
-.LASF83:
-	.ascii	"Hynix2\000"
-.LASF1246:
-	.ascii	"FtlVendorPartRead\000"
-.LASF1435:
-	.ascii	"NandcSetDdrMode\000"
-.LASF807:
-	.ascii	"g_gc_head_data_block\000"
-.LASF1001:
-	.ascii	"fm_wl_pool\000"
-.LASF992:
-	.ascii	"device_mutex\000"
-.LASF1571:
+	.section	.rodata.__func__.10559,"a",%progbits
+	.set	.LANCHOR247,. + 0
+	.type	__func__.10559, %object
+	.size	__func__.10559, 9
+__func__.10559:
 	.ascii	"FtlWrite\000"
-.LASF195:
-	.ascii	"FL_CTL\000"
-.LASF670:
-	.ascii	"c_ftl_nand_type\000"
-.LASF330:
-	.ascii	"_binary_u_boot_bin_end\000"
-.LASF489:
-	.ascii	"UCLASS_PINCTRL\000"
-.LASF1349:
-	.ascii	"num_lpa\000"
-.LASF984:
-	.ascii	"avail_pebs\000"
-.LASF1386:
-	.ascii	"blkNum\000"
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-	.ascii	"SlcPartLbaEndSector\000"
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-	.ascii	"update_map_block\000"
-.LASF584:
-	.ascii	"maxRegion\000"
-.LASF1198:
-	.ascii	"next_free_active_plane\000"
-.LASF36:
-	.ascii	"reservedBlk\000"
-.LASF771:
-	.ascii	"p_gc_page_info\000"
-.LASF1391:
-	.ascii	"NandcXferData\000"
-.LASF107:
-	.ascii	"BlockSize\000"
-.LASF851:
-	.ascii	"udevice\000"
-.LASF562:
-	.ascii	"net_our_vlan\000"
-.LASF638:
-	.ascii	"totle_power_on_run_times\000"
-.LASF1007:
-	.ascii	"erroneous\000"
-.LASF783:
-	.ascii	"g_free_slc_blk_num\000"
-.LASF113:
-	.ascii	"pFLASH_INFO\000"
-.LASF87:
-	.ascii	"die_op_info\000"
-.LASF398:
-	.ascii	"ih_os\000"
-.LASF1010:
-	.ascii	"pq_head\000"
-.LASF810:
-	.ascii	"g_cur_erase_blk\000"
-.LASF245:
-	.ascii	"CHIP_IF\000"
-.LASF1005:
-	.ascii	"fm_size\000"
-.LASF491:
-	.ascii	"UCLASS_PWM\000"
-.LASF1466:
-	.ascii	"req_status_1\000"
-.LASF1155:
-	.ascii	"FtlGcBufFree\000"
-.LASF1286:
-	.ascii	"List_pop_index_node\000"
-.LASF1344:
-	.ascii	"ftl_discard\000"
-.LASF1038:
-	.ascii	"vid_hdr_alsize\000"
-.LASF61:
-	.ascii	"PlanePerDie\000"
-.LASF158:
-	.ascii	"NC_IRQ_LLP\000"
-.LASF27:
-	.ascii	"nandType\000"
-.LASF1208:
-	.ascii	"scan_completed\000"
-.LASF1158:
-	.ascii	"update_vpc_list\000"
-.LASF477:
-	.ascii	"UCLASS_MMC\000"
-.LASF744:
-	.ascii	"p_map_block_table\000"
-.LASF832:
-	.ascii	"FtlUpdateVaildLpnCount\000"
-.LASF609:
-	.ascii	"res32_0\000"
-.LASF610:
-	.ascii	"res32_1\000"
-.LASF1242:
-	.ascii	"FtlUpdateVaildLpn\000"
-.LASF666:
-	.ascii	"scr_ppa\000"
-.LASF281:
-	.ascii	"pageBufPhyAddr\000"
-.LASF895:
-	.ascii	"_get_unmapped_area\000"
-.LASF531:
-	.ascii	"save_size\000"
-.LASF1441:
-	.ascii	"NandcReadDontCaseBusyEn\000"
-.LASF383:
-	.ascii	"version\000"
-.LASF1283:
-	.ascii	"pNode\000"
-.LASF1159:
+	.section	.rodata.__func__.11432,"a",%progbits
+	.set	.LANCHOR203,. + 0
+	.type	__func__.11432, %object
+	.size	__func__.11432, 25
+__func__.11432:
+	.ascii	"allocate_data_superblock\000"
+	.section	.rodata.__func__.11446,"a",%progbits
+	.set	.LANCHOR219,. + 0
+	.type	__func__.11446, %object
+	.size	__func__.11446, 29
+__func__.11446:
+	.ascii	"allocate_new_data_superblock\000"
+	.section	.rodata.__func__.11452,"a",%progbits
+	.set	.LANCHOR208,. + 0
+	.type	__func__.11452, %object
+	.size	__func__.11452, 19
+__func__.11452:
 	.ascii	"get_new_active_ppa\000"
-.LASF169:
-	.ascii	"flash_abort_clear\000"
-.LASF1574:
-	.ascii	"kmalloc\000"
-.LASF441:
-	.ascii	"_NANDC_IRQ_NUM\000"
-.LASF103:
-	.ascii	"toggle_enable\000"
-.LASF191:
-	.ascii	"low_power\000"
-.LASF1377:
-	.ascii	"multi_plane_en\000"
-.LASF1117:
-	.ascii	"max_gc_page_num\000"
-.LASF748:
-	.ascii	"p_map_region_ppn_check_table\000"
-.LASF824:
-	.ascii	"ToshibaA19RefValue\000"
-.LASF1:
-	.ascii	"unsigned int\000"
-.LASF987:
-	.ascii	"bad_peb_limit\000"
-.LASF1194:
-	.ascii	"FtlSlcSuperblockCheck\000"
-.LASF798:
-	.ascii	"g_totle_avg_erase_count\000"
-.LASF1355:
-	.ascii	"flashType\000"
-.LASF1305:
-	.ascii	"FtlFreeSysBLkSort\000"
-.LASF871:
-	.ascii	"fail_addr\000"
-.LASF269:
-	.ascii	"LLP_LLI\000"
-.LASF1373:
-	.ascii	"max_test_page_num\000"
-.LASF240:
-	.ascii	"tagMTRANS_STAT\000"
-.LASF388:
-	.ascii	"working_fdt\000"
-.LASF1381:
-	.ascii	"FtlVariablesInit\000"
-.LASF668:
-	.ascii	"ftl_gc_page_buffer\000"
-.LASF545:
-	.ascii	"push_packet\000"
-.LASF1227:
-	.ascii	"pMapBlkHeader\000"
-.LASF387:
-	.ascii	"size_dt_struct\000"
-.LASF1549:
-	.ascii	"FlashProgDpSecondCmd\000"
-.LASF753:
-	.ascii	"p_vendor_region_ppn_table\000"
-.LASF1535:
-	.ascii	"last_error_ecc0_count\000"
-.LASF226:
-	.ascii	"ahb_wr_st\000"
-.LASF1191:
-	.ascii	"make_superblock\000"
-.LASF402:
-	.ascii	"ih_name\000"
-.LASF493:
-	.ascii	"UCLASS_PWRSEQ\000"
-.LASF89:
-	.ascii	"cur_op\000"
-.LASF972:
-	.ascii	"corrupted\000"
-.LASF8:
-	.ascii	"short int\000"
-.LASF1079:
-	.ascii	"blocking_notifier_head\000"
-.LASF1184:
-	.ascii	"p_super_blk\000"
-.LASF379:
-	.ascii	"totalsize\000"
-.LASF1181:
-	.ascii	"time_out\000"
-.LASF1272:
-	.ascii	"ftl_map_blk_alloc_new_blk\000"
-.LASF106:
-	.ascii	"FlashSize\000"
-.LASF968:
-	.ascii	"upd_received\000"
-.LASF661:
-	.ascii	"check_en\000"
-.LASF721:
-	.ascii	"req_gc_dst\000"
-.LASF334:
-	.ascii	"prev\000"
-.LASF193:
-	.ascii	"reserved30_31\000"
-.LASF699:
-	.ascii	"c_ftl_nand_data_op_blks_per_plane\000"
-.LASF1077:
-	.ascii	"ubi_class\000"
-.LASF821:
-	.ascii	"random_seed\000"
-.LASF782:
-	.ascii	"g_gc_refresh_block_temp_num\000"
-.LASF664:
-	.ascii	"phyBlk\000"
-.LASF566:
-	.ascii	"net_boot_file_size\000"
-.LASF688:
-	.ascii	"c_ftl_nand_map_region_num\000"
-.LASF432:
-	.ascii	"ft_len\000"
-.LASF1243:
-	.ascii	"FtlEctTblFlush\000"
-.LASF1434:
-	.ascii	"dll_mode\000"
-.LASF277:
-	.ascii	"pageBuf\000"
-.LASF100:
-	.ascii	"NandParaInfo\000"
-.LASF495:
-	.ascii	"UCLASS_REGULATOR\000"
-.LASF588:
-	.ascii	"pBlkVerTbl\000"
-.LASF769:
-	.ascii	"g_sys_save_data\000"
-.LASF1075:
-	.ascii	"ubi_cdev_operations\000"
-.LASF77:
-	.ascii	"maxRetryCount\000"
-.LASF1281:
-	.ascii	"prev_valid_page_count\000"
-.LASF878:
-	.ascii	"flags\000"
-.LASF429:
-	.ascii	"rd_start\000"
-.LASF982:
-	.ascii	"image_seq\000"
-.LASF1580:
-	.ascii	"drivers/rknand/rkftl/rk_ftl_arm_v7.c\000"
-.LASF288:
-	.ascii	"CHIP_MAP_INFO\000"
-.LASF912:
-	.ascii	"_block_isbad\000"
+	.section	.rodata.__func__.11463,"a",%progbits
+	.set	.LANCHOR206,. + 0
+	.type	__func__.11463, %object
+	.size	__func__.11463, 16
+__func__.11463:
+	.ascii	"update_vpc_list\000"
+	.section	.rodata.__func__.11468,"a",%progbits
+	.set	.LANCHOR207,. + 0
+	.type	__func__.11468, %object
+	.size	__func__.11468, 20
+__func__.11468:
+	.ascii	"decrement_vpc_count\000"
+	.section	.rodata.__func__.11536,"a",%progbits
+	.set	.LANCHOR239,. + 0
+	.type	__func__.11536, %object
+	.size	__func__.11536, 19
+__func__.11536:
+	.ascii	"FtlGcFreeTempBlock\000"
+	.section	.rodata.__func__.11630,"a",%progbits
+	.set	.LANCHOR243,. + 0
+	.type	__func__.11630, %object
+	.size	__func__.11630, 23
+__func__.11630:
+	.ascii	"rk_ftl_garbage_collect\000"
+	.section	.rodata.decrement_vpc_count.str1.1,"aMS",%progbits,1
+.LC36:
+	.ascii	"decrement_vpc_count %x = %d\012\000"
+.LC37:
+	.ascii	"decrement_vpc_count %x = %d in free list\012\000"
+	.section	.rodata.dump_map_info.str1.1,"aMS",%progbits,1
+.LC80:
+	.ascii	"phyBlk = %x,addr= %x,spare= %x %x %x %x data=%x %x\012"
+	.ascii	"\000"
+.LC81:
+	.ascii	"Mblk:\000"
+.LC82:
+	.ascii	"L2P:\000"
+.LC83:
+	.ascii	"L2PC:\000"
+	.section	.rodata.ftl_fix_nand_power_lost_error.str1.1,"aMS",%progbits,1
+.LC71:
+	.ascii	"fix power lost blk = %x vpc=%x\012\000"
+.LC72:
+	.ascii	"erase power lost blk = %x vpc=%x\012\000"
+	.section	.rodata.ftl_map_blk_alloc_new_blk.str1.1,"aMS",%progbits,1
+.LC8:
+	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d\012\000"
+	.section	.rodata.ftl_map_blk_gc.str1.1,"aMS",%progbits,1
+.LC39:
+	.ascii	"ftl_map_blk_gc blk info: %x %x %x\012\000"
+.LC40:
+	.ascii	"page map lost: %x %x\012\000"
+	.section	.rodata.idb_write_data.str1.1,"aMS",%progbits,1
+.LC15:
+	.ascii	"1 write_idblock fix data %x %x %x\012\000"
+.LC16:
+	.ascii	"write_idblock fail! %x %x %x %x\012\000"
+.LC17:
+	.ascii	"write_idblock fail! %x\012\000"
+	.section	.rodata.log2phys.str1.1,"aMS",%progbits,1
+.LC55:
+	.ascii	"load_l2p_region refresh = %x phyAddr = %x\012\000"
+.LC56:
+	.ascii	"region_id = %x phyAddr = %x\012\000"
+.LC57:
+	.ascii	"map_ppn:\000"
+	.section	.rodata.rk_ftl_garbage_collect.str1.1,"aMS",%progbits,1
+.LC66:
+	.ascii	"g_gc_superblock_free %x %x %x %x %x\012\000"
+	.section	.rodata.rk_ftl_init.str1.1,"aMS",%progbits,1
+.LC70:
+	.ascii	"FtlInit %x\012\000"
+	.section	.rodata.rknand_print_hex.str1.1,"aMS",%progbits,1
+.LC18:
+	.ascii	"%s 0x%x:\000"
+.LC19:
+	.ascii	"%x \000"
+.LC20:
+	.ascii	"\000"
 	.hidden	free
diff --git a/drivers/rknand/rk_ftl_arm_v8.S b/drivers/rknand/rk_ftl_arm_v8.S
index 51dcc9aa25..6afa53b285 100644
--- a/drivers/rknand/rk_ftl_arm_v8.S
+++ b/drivers/rknand/rk_ftl_arm_v8.S
@@ -5,14 +5,14 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2018-04-08
+ * date: 2018-08-10
  */
 	.arch armv8-a
-	.file	"rk_ftl_arm_v8.S"
-	.section	.text.ftl_set_blk_mode.part.9,"ax",@progbits
+	.file	"rk_ftl_arm_v8.c"
+	.section	.text.ftl_set_blk_mode.part.10,"ax",@progbits
 	.align	2
-	.type	ftl_set_blk_mode.part.9, %function
-ftl_set_blk_mode.part.9:
+	.type	ftl_set_blk_mode.part.10, %function
+ftl_set_blk_mode.part.10:
 	and	w0, w0, 65535
 	adrp	x2, .LANCHOR0
 	ubfx	x1, x0, 5, 11
@@ -25,7 +25,7 @@ ftl_set_blk_mode.part.9:
 	orr	w0, w0, w2
 	str	w0, [x3, x1]
 	ret
-	.size	ftl_set_blk_mode.part.9, .-ftl_set_blk_mode.part.9
+	.size	ftl_set_blk_mode.part.10, .-ftl_set_blk_mode.part.10
 	.section	.text.FlashMemCmp8,"ax",@progbits
 	.align	2
 	.global	FlashMemCmp8
@@ -1243,6 +1243,39 @@ SandiskSetRRPara:
 	ldrsb	w5, [x2, x0]
 	b	.L186
 	.size	SandiskSetRRPara, .-SandiskSetRRPara
+	.section	.text.micron_auto_read_calibration_config,"ax",@progbits
+	.align	2
+	.global	micron_auto_read_calibration_config
+	.type	micron_auto_read_calibration_config, %function
+micron_auto_read_calibration_config:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w19, w0, 255
+	mov	w20, w1
+	mov	w0, w19
+	bl	NandcWaitFlashReady
+	sbfiz	x0, x19, 4, 32
+	adrp	x2, .LANCHOR6
+	add	x2, x2, :lo12:.LANCHOR6
+	add	x1, x2, x0
+	ldr	x0, [x2, x0]
+	ldrb	w19, [x1, 8]
+	add	x19, x0, x19, lsl 8
+	mov	w0, 239
+	str	w0, [x19, 2056]
+	mov	w0, 150
+	str	w0, [x19, 2052]
+	mov	x0, 200
+	bl	udelay
+	str	w20, [x19, 2048]
+	str	wzr, [x19, 2048]
+	str	wzr, [x19, 2048]
+	str	wzr, [x19, 2048]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	micron_auto_read_calibration_config, .-micron_auto_read_calibration_config
 	.section	.text.FlashEraseSLc2KBlocks,"ax",@progbits
 	.align	2
 	.global	FlashEraseSLc2KBlocks
@@ -1260,16 +1293,16 @@ FlashEraseSLc2KBlocks:
 	mov	x20, x0
 	add	x23, x23, :lo12:.LANCHOR25
 	adrp	x24, .LANCHOR26
-.L188:
+.L190:
 	cmp	x20, x22
-	bne	.L193
+	bne	.L195
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L193:
+.L195:
 	mov	w1, 0
 	mov	w4, w21
 	add	x3, x29, 76
@@ -1279,15 +1312,15 @@ FlashEraseSLc2KBlocks:
 	ldrb	w1, [x23]
 	ldr	w0, [x29, 76]
 	cmp	w1, w0
-	bhi	.L189
+	bhi	.L191
 	mov	w0, -1
 	str	w0, [x20]
-.L190:
+.L192:
 	sub	w21, w21, #1
 	add	x20, x20, 56
 	and	w21, w21, 255
-	b	.L188
-.L189:
+	b	.L190
+.L191:
 	uxtw	x0, w0
 	add	x1, x24, :lo12:.LANCHOR26
 	ldrb	w19, [x1, x0]
@@ -1323,21 +1356,21 @@ FlashEraseSLc2KBlocks:
 	ldr	w1, [x29, 72]
 	mov	w0, w19
 	bl	FlashReadStatus
-	tbz	x0, 0, .L191
+	tbz	x0, 0, .L193
 	mov	w0, -1
 	str	w0, [x20]
-.L191:
+.L193:
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L192
+	bne	.L194
 	ldr	w1, [x29, 72]
 	adrp	x0, .LC1
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L192:
+.L194:
 	mov	w0, w19
 	bl	NandcFlashDeCs
-	b	.L190
+	b	.L192
 	.size	FlashEraseSLc2KBlocks, .-FlashEraseSLc2KBlocks
 	.section	.text.FlashEraseBlocks,"ax",@progbits
 	.align	2
@@ -1354,42 +1387,42 @@ FlashEraseBlocks:
 	mov	w22, w2
 	ldrb	w1, [x1, #:lo12:.LANCHOR1]
 	stp	x25, x26, [sp, 64]
-	cbnz	w1, .L199
+	cbnz	w1, .L201
 	adrp	x25, .LANCHOR23
 	mov	x19, x0
 	add	x26, x25, :lo12:.LANCHOR23
 	mov	w20, 0
-.L200:
+.L202:
 	cmp	w20, w22
 	adrp	x13, .LANCHOR25
-	bcc	.L209
+	bcc	.L211
 	adrp	x21, .LANCHOR8
 	adrp	x23, .LANCHOR23
 	add	x25, x13, :lo12:.LANCHOR25
 	add	x21, x21, :lo12:.LANCHOR8
 	add	x23, x23, :lo12:.LANCHOR23
 	mov	x20, 0
-.L210:
+.L212:
 	ldrb	w0, [x25]
 	cmp	w0, w20
-	bhi	.L212
+	bhi	.L214
 	adrp	x0, .LANCHOR28
 	ldr	w0, [x0, #:lo12:.LANCHOR28]
-	cbnz	w0, .L213
-.L214:
+	cbnz	w0, .L215
+.L216:
 	mov	w0, 0
-	b	.L198
-.L199:
+	b	.L200
+.L201:
 	mov	w1, w2
 	bl	FlashEraseSLc2KBlocks
-.L198:
+.L200:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L209:
+.L211:
 	mov	w12, 56
 	mov	w1, 0
 	sub	w4, w22, w20
@@ -1403,13 +1436,13 @@ FlashEraseBlocks:
 	ldrb	w1, [x13, #:lo12:.LANCHOR25]
 	ldr	w0, [x29, 92]
 	cmp	w1, w0
-	bhi	.L202
+	bhi	.L204
 	mov	w0, -1
 	str	w0, [x19, x12]
-.L203:
+.L205:
 	add	w20, w20, 1
-	b	.L200
-.L202:
+	b	.L202
+.L204:
 	adrp	x1, .LANCHOR27
 	add	x2, x25, :lo12:.LANCHOR23
 	mov	x3, 24
@@ -1419,20 +1452,20 @@ FlashEraseBlocks:
 	csel	w23, w23, wzr, ne
 	madd	x1, x1, x3, x2
 	ldr	x1, [x1, 8]
-	cbz	x1, .L205
+	cbz	x1, .L207
 	bl	FlashWaitCmdDone
-.L205:
+.L207:
 	ldp	w2, w1, [x29, 88]
 	mov	x0, 24
 	madd	x0, x1, x0, x26
 	str	w2, [x0, 4]
 	stp	x21, xzr, [x0, 8]
-	cbz	w23, .L206
+	cbz	w23, .L208
 	add	w2, w20, 1
 	mov	w3, 56
 	umaddl	x2, w2, w3, x19
 	str	x2, [x0, 16]
-.L206:
+.L208:
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w21, [x0, x1]
@@ -1442,13 +1475,13 @@ FlashEraseBlocks:
 	strb	w21, [x26, x1]
 	bl	NandcFlashCs
 	cmp	w24, 1
-	bne	.L207
+	bne	.L209
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L207
+	cbz	w0, .L209
 	mov	w0, w21
 	bl	flash_enter_slc_mode
-.L208:
+.L210:
 	ldr	w1, [x29, 92]
 	adrp	x0, .LANCHOR17
 	add	x0, x0, :lo12:.LANCHOR17
@@ -1465,37 +1498,37 @@ FlashEraseBlocks:
 	bl	FlashEraseCmd
 	mov	w0, w21
 	bl	NandcFlashDeCs
-	b	.L203
-.L207:
+	b	.L205
+.L209:
 	mov	w0, w21
 	bl	flash_exit_slc_mode
-	b	.L208
-.L212:
+	b	.L210
+.L214:
 	mov	w0, w20
 	bl	FlashWaitCmdDone
 	cmp	w24, 1
-	bne	.L211
+	bne	.L213
 	ldrb	w0, [x21]
-	cbz	w0, .L211
+	cbz	w0, .L213
 	mov	x0, 24
 	mul	x0, x20, x0
 	ldrb	w0, [x0, x23]
 	bl	flash_exit_slc_mode
-.L211:
-	add	x20, x20, 1
-	b	.L210
 .L213:
+	add	x20, x20, 1
+	b	.L212
+.L215:
 	adrp	x0, .LANCHOR22
 	ldrb	w0, [x0, #:lo12:.LANCHOR22]
 	cmp	w0, 69
-	bne	.L214
+	bne	.L216
 	mov	w0, 56
 	umaddl	x22, w22, w0, x19
-.L215:
+.L217:
 	cmp	x22, x19
-	beq	.L214
+	beq	.L216
 	str	wzr, [x19], 56
-	b	.L215
+	b	.L217
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
 	.section	.text.FlashReadDpCmd,"ax",@progbits
 	.align	2
@@ -1529,7 +1562,7 @@ FlashReadDpCmd:
 	str	w5, [x19, 2056]
 	cmp	w1, 1
 	lsr	w1, w21, 16
-	bne	.L231
+	bne	.L233
 	str	wzr, [x19, 2052]
 	str	wzr, [x19, 2052]
 	str	w4, [x19, 2052]
@@ -1541,7 +1574,7 @@ FlashReadDpCmd:
 	str	wzr, [x19, 2056]
 	str	wzr, [x19, 2052]
 	str	wzr, [x19, 2052]
-.L234:
+.L236:
 	str	w24, [x19, 2052]
 	mov	w0, 48
 	str	w23, [x19, 2052]
@@ -1554,12 +1587,12 @@ FlashReadDpCmd:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	b	FlashSetRandomizer
-.L231:
+.L233:
 	str	w4, [x19, 2052]
 	str	w3, [x19, 2052]
 	str	w1, [x19, 2052]
 	str	w0, [x19, 2056]
-	b	.L234
+	b	.L236
 	.size	FlashReadDpCmd, .-FlashReadDpCmd
 	.section	.text.FlashDeInit,"ax",@progbits
 	.align	2
@@ -1571,19 +1604,28 @@ FlashDeInit:
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	bl	NandcWaitFlashReady
-	adrp	x19, .LANCHOR29
 	bl	FlashSetReadRetryDefault
-	ldrb	w0, [x19, #:lo12:.LANCHOR29]
-	cbz	w0, .L236
+	adrp	x0, .LANCHOR29
+	ldr	w1, [x0, #:lo12:.LANCHOR29]
+	mov	w0, 12336
+	movk	w0, 0x5638, lsl 16
+	cmp	w1, w0
+	bne	.L238
+	mov	w0, 0
+	bl	flash_enter_slc_mode
+.L238:
+	adrp	x19, .LANCHOR30
+	ldrb	w0, [x19, #:lo12:.LANCHOR30]
+	cbz	w0, .L239
 	adrp	x0, .LANCHOR24
 	ldrb	w0, [x0, #:lo12:.LANCHOR24]
-	tbz	x0, 0, .L236
+	tbz	x0, 0, .L239
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
 	bl	NandcSetMode
-	strb	wzr, [x19, #:lo12:.LANCHOR29]
-.L236:
+	strb	wzr, [x19, #:lo12:.LANCHOR30]
+.L239:
 	adrp	x0, .LANCHOR6
 	ldr	x0, [x0, #:lo12:.LANCHOR6]
 	str	wzr, [x0, 336]
@@ -1611,29 +1653,29 @@ NandcRandmzSel:
 NandcTimeCfg:
 	cmp	w0, 35
 	adrp	x1, .LANCHOR19
-	bhi	.L246
+	bhi	.L249
 	ldr	x0, [x1, #:lo12:.LANCHOR19]
 	mov	w1, 4193
-.L249:
+.L252:
 	str	w1, [x0, 4]
 	ret
-.L246:
+.L249:
 	cmp	w0, 99
 	ldr	x0, [x1, #:lo12:.LANCHOR19]
-	bls	.L248
+	bls	.L251
 	mov	w1, 8322
-	b	.L249
-.L248:
+	b	.L252
+.L251:
 	mov	w1, 4225
-	b	.L249
+	b	.L252
 	.size	NandcTimeCfg, .-NandcTimeCfg
 	.section	.text.FlashTimingCfg,"ax",@progbits
 	.align	2
 	.global	FlashTimingCfg
 	.type	FlashTimingCfg, %function
 FlashTimingCfg:
-	adrp	x0, .LANCHOR30+21
-	ldrb	w0, [x0, #:lo12:.LANCHOR30+21]
+	adrp	x0, .LANCHOR31+21
+	ldrb	w0, [x0, #:lo12:.LANCHOR31+21]
 	b	NandcTimeCfg
 	.size	FlashTimingCfg, .-FlashTimingCfg
 	.section	.text.NandcBchSel,"ax",@progbits
@@ -1647,36 +1689,36 @@ NandcBchSel:
 	ldr	x2, [x1, #:lo12:.LANCHOR19]
 	mov	w1, 1
 	str	w1, [x2, 8]
-	adrp	x1, .LANCHOR31
-	str	w0, [x1, #:lo12:.LANCHOR31]
+	adrp	x1, .LANCHOR32
+	str	w0, [x1, #:lo12:.LANCHOR32]
 	mov	w1, 4096
-	bne	.L252
-.L255:
+	bne	.L255
+.L258:
 	and	w1, w1, -17
-.L253:
+.L256:
 	orr	w1, w1, 1
 	str	w1, [x2, 12]
 	ret
-.L252:
+.L255:
 	cmp	w0, 24
-	bne	.L254
+	bne	.L257
 	orr	w1, w1, 16
-	b	.L253
-.L254:
+	b	.L256
+.L257:
 	orr	w1, w1, 262144
 	cmp	w0, 40
 	orr	w1, w1, 16
-	bne	.L253
-	b	.L255
+	bne	.L256
+	b	.L258
 	.size	NandcBchSel, .-NandcBchSel
 	.section	.text.FlashBchSel,"ax",@progbits
 	.align	2
 	.global	FlashBchSel
 	.type	FlashBchSel, %function
 FlashBchSel:
-	adrp	x1, .LANCHOR32
+	adrp	x1, .LANCHOR33
 	and	w0, w0, 255
-	strb	w0, [x1, #:lo12:.LANCHOR32]
+	strb	w0, [x1, #:lo12:.LANCHOR33]
 	b	NandcBchSel
 	.size	FlashBchSel, .-FlashBchSel
 	.section	.text.NandCIrqEnable,"ax",@progbits
@@ -1749,11 +1791,11 @@ NandcSendDumpDataStart:
 	.type	NandcSendDumpDataDone, %function
 NandcSendDumpDataDone:
 	sub	sp, sp, #16
-.L269:
+.L272:
 	ldr	w1, [x0, 8]
 	str	w1, [sp, 8]
 	ldr	w1, [sp, 8]
-	tbz	x1, 20, .L269
+	tbz	x1, 20, .L272
 	add	sp, sp, 16
 	ret
 	.size	NandcSendDumpDataDone, .-NandcSendDumpDataDone
@@ -1785,13 +1827,13 @@ NandcXferStart:
 	bfi	w22, w0, 5, 3
 	mov	w0, 1
 	bfi	w19, w0, 5, 2
-	adrp	x0, .LANCHOR33
+	adrp	x0, .LANCHOR34
 	orr	w19, w19, 536870912
 	orr	w19, w19, 1024
-	ldr	w0, [x0, #:lo12:.LANCHOR33]
+	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	bfi	w19, w3, 4, 1
 	cmp	w0, 3
-	bls	.L274
+	bls	.L277
 	ldr	w0, [x21, 16]
 	cmp	x5, 0
 	str	w0, [x29, 88]
@@ -1799,17 +1841,17 @@ NandcXferStart:
 	ldr	w0, [x29, 88]
 	and	w0, w0, -5
 	str	w0, [x29, 88]
-	beq	.L275
+	beq	.L278
 	and	w2, w2, 255
-	adrp	x20, .LANCHOR34
-	cbnz	w24, .L276
-.L284:
-	ldr	x0, [x20, #:lo12:.LANCHOR34]
+	adrp	x20, .LANCHOR35
+	cbnz	w24, .L279
+.L287:
+	ldr	x0, [x20, #:lo12:.LANCHOR35]
 	add	w2, w2, 1
 	cmp	x4, 0
 	asr	w2, w2, 1
 	csel	x0, x4, x0, ne
-	add	x20, x20, :lo12:.LANCHOR34
+	add	x20, x20, :lo12:.LANCHOR35
 	bfi	w19, w2, 22, 6
 	and	x2, x0, 4294967295
 	add	x2, x2, 63
@@ -1845,12 +1887,12 @@ NandcXferStart:
 	ldr	w0, [x29, 88]
 	orr	w0, w0, 448
 	str	w0, [x29, 88]
-	bne	.L285
+	bne	.L288
 	ldr	w0, [x29, 88]
 	mov	w1, 2
 	bfi	w0, w1, 3, 3
 	str	w0, [x29, 88]
-.L285:
+.L288:
 	ldr	w0, [x29, 88]
 	cmp	w24, 0
 	cset	w1, eq
@@ -1862,10 +1904,10 @@ NandcXferStart:
 	ldr	w0, [x29, 88]
 	orr	w0, w0, 1
 	str	w0, [x29, 88]
-.L275:
+.L278:
 	ldr	w0, [x29, 88]
 	str	w0, [x21, 16]
-.L274:
+.L277:
 	str	w22, [x21, 12]
 	str	w19, [x21, 8]
 	orr	w19, w19, 4
@@ -1876,38 +1918,38 @@ NandcXferStart:
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L276:
-	adrp	x0, .LANCHOR31
+.L279:
+	adrp	x0, .LANCHOR32
 	mov	w6, 64
 	lsr	w11, w2, 1
 	mov	x1, x5
-	ldr	w0, [x0, #:lo12:.LANCHOR31]
+	ldr	w0, [x0, #:lo12:.LANCHOR32]
 	mov	w7, 0
 	mov	w3, 0
 	mov	w12, -1
 	cmp	w0, 25
 	mov	w0, 128
 	csel	w6, w6, w0, cc
-	add	x0, x20, :lo12:.LANCHOR34
+	add	x0, x20, :lo12:.LANCHOR35
 	ldr	x10, [x0, 8]
-.L280:
+.L283:
 	cmp	w3, w11
-	bcs	.L284
+	bcs	.L287
 	lsr	w0, w7, 2
 	lsl	w0, w0, 2
-	cbz	x5, .L281
+	cbz	x5, .L284
 	ldrh	w13, [x1]
 	add	x1, x1, 4
 	ldrh	w8, [x1, -2]
 	orr	x8, x13, x8, lsl 16
 	str	w8, [x10, x0]
-.L282:
+.L285:
 	add	w3, w3, 1
 	add	w7, w7, w6
-	b	.L280
-.L281:
+	b	.L283
+.L284:
 	str	w12, [x10, x0]
-	b	.L282
+	b	.L285
 	.size	NandcXferStart, .-NandcXferStart
 	.section	.text.NandcXferComp,"ax",@progbits
 	.align	2
@@ -1920,60 +1962,60 @@ NandcXferComp:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	ldr	x3, [x1, x0]
-	adrp	x0, .LANCHOR33
-	ldr	w2, [x0, #:lo12:.LANCHOR33]
+	adrp	x0, .LANCHOR34
+	ldr	w2, [x0, #:lo12:.LANCHOR34]
 	cmp	w2, 3
-	bls	.L313
+	bls	.L316
 	ldr	w0, [x3, 16]
-	tbz	x0, 2, .L313
+	tbz	x0, 2, .L316
 	ldr	w0, [x3, 16]
-	tbz	x0, 1, .L301
+	tbz	x0, 1, .L304
 	ldr	w0, [x3, 8]
 	str	w0, [x29, 16]
-.L296:
+.L299:
 	ldr	w1, [x3, 28]
 	ldr	w0, [x29, 16]
 	ubfx	x1, x1, 16, 5
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0
-	bge	.L297
+	bge	.L300
 	cmp	w2, 5
-	bls	.L296
+	bls	.L299
 	ldr	w0, [x3]
 	str	w0, [x29, 24]
 	ldr	w0, [x29, 24]
-	tbz	x0, 13, .L296
+	tbz	x0, 13, .L299
 	ldr	w0, [x29, 24]
-	tbz	x0, 17, .L296
-.L297:
-	adrp	x0, .LANCHOR34+40
-	str	wzr, [x0, #:lo12:.LANCHOR34+40]
-.L292:
+	tbz	x0, 17, .L299
+.L300:
+	adrp	x0, .LANCHOR35+40
+	str	wzr, [x0, #:lo12:.LANCHOR35+40]
+.L295:
 	ldp	x29, x30, [sp], 32
 	ret
-.L301:
+.L304:
 	ldr	w0, [x3, 8]
 	str	w0, [x29, 16]
 	ldr	w0, [x29, 16]
-	tbz	x0, 20, .L301
-	adrp	x0, .LANCHOR35
+	tbz	x0, 20, .L304
+	adrp	x0, .LANCHOR36
 	mov	x4, x0
-	ldr	w1, [x0, #:lo12:.LANCHOR35]
-	cbz	w1, .L302
+	ldr	w1, [x0, #:lo12:.LANCHOR36]
+	cbz	w1, .L305
 	mov	x0, x3
 	bl	NandcSendDumpDataStart
-.L302:
-	ldr	w0, [x4, #:lo12:.LANCHOR35]
-	cbz	w0, .L297
+.L305:
+	ldr	w0, [x4, #:lo12:.LANCHOR36]
+	cbz	w0, .L300
 	mov	x0, x3
 	bl	NandcSendDumpDataDone
-	b	.L297
-.L313:
+	b	.L300
+.L316:
 	ldr	w0, [x3, 8]
 	str	w0, [x29, 16]
 	ldr	w0, [x29, 16]
-	tbz	x0, 20, .L313
-	b	.L292
+	tbz	x0, 20, .L316
+	b	.L295
 	.size	NandcXferComp, .-NandcXferComp
 	.section	.text.Ftl_log2,"ax",@progbits
 	.align	2
@@ -1982,16 +2024,16 @@ NandcXferComp:
 Ftl_log2:
 	mov	w2, 1
 	mov	w1, 0
-.L322:
+.L325:
 	cmp	w2, w0
-	bls	.L323
+	bls	.L326
 	sub	w0, w1, #1
 	ret
-.L323:
+.L326:
 	add	w1, w1, 1
 	lsl	w2, w2, 1
 	and	w1, w1, 65535
-	b	.L322
+	b	.L325
 	.size	Ftl_log2, .-Ftl_log2
 	.section	.text.FtlPrintInfo,"ax",@progbits
 	.align	2
@@ -2008,25 +2050,25 @@ FtlSysBlkNumInit:
 	and	w0, w0, 65535
 	mov	w1, 24
 	cmp	w0, 24
-	adrp	x2, .LANCHOR38
+	adrp	x2, .LANCHOR39
 	csel	w0, w0, w1, cs
-	adrp	x1, .LANCHOR36
-	and	w0, w0, 65535
-	str	w0, [x1, #:lo12:.LANCHOR36]
 	adrp	x1, .LANCHOR37
-	ldrh	w1, [x1, #:lo12:.LANCHOR37]
+	and	w0, w0, 65535
+	str	w0, [x1, #:lo12:.LANCHOR37]
+	adrp	x1, .LANCHOR38
+	ldrh	w1, [x1, #:lo12:.LANCHOR38]
 	mul	w1, w1, w0
-	str	w1, [x2, #:lo12:.LANCHOR38]
-	adrp	x2, .LANCHOR40
-	ldrh	w2, [x2, #:lo12:.LANCHOR40]
+	str	w1, [x2, #:lo12:.LANCHOR39]
+	adrp	x2, .LANCHOR41
+	ldrh	w2, [x2, #:lo12:.LANCHOR41]
 	sub	w0, w2, w0
-	adrp	x2, .LANCHOR39
-	strh	w0, [x2, #:lo12:.LANCHOR39]
-	adrp	x0, .LANCHOR42
-	ldr	w0, [x0, #:lo12:.LANCHOR42]
+	adrp	x2, .LANCHOR40
+	strh	w0, [x2, #:lo12:.LANCHOR40]
+	adrp	x0, .LANCHOR43
+	ldr	w0, [x0, #:lo12:.LANCHOR43]
 	sub	w1, w0, w1
-	adrp	x0, .LANCHOR41
-	str	w1, [x0, #:lo12:.LANCHOR41]
+	adrp	x0, .LANCHOR42
+	str	w1, [x0, #:lo12:.LANCHOR42]
 	mov	w0, 0
 	ret
 	.size	FtlSysBlkNumInit, .-FtlSysBlkNumInit
@@ -2037,45 +2079,45 @@ FtlSysBlkNumInit:
 FtlConstantsInit:
 	stp	x29, x30, [sp, -32]!
 	mov	x5, x0
-	adrp	x1, .LANCHOR45
-	adrp	x4, .LANCHOR44
+	adrp	x1, .LANCHOR46
+	adrp	x4, .LANCHOR45
 	add	x29, sp, 0
 	ldrh	w11, [x0, 8]
-	adrp	x0, .LANCHOR43
-	adrp	x6, .LANCHOR40
+	adrp	x0, .LANCHOR44
+	adrp	x6, .LANCHOR41
 	ldrh	w2, [x5, 10]
-	strh	w11, [x0, #:lo12:.LANCHOR43]
+	strh	w11, [x0, #:lo12:.LANCHOR44]
 	mov	x3, 0
 	ldrh	w0, [x5, 12]
 	ldrh	w8, [x5, 14]
-	strh	w0, [x1, #:lo12:.LANCHOR45]
-	adrp	x1, .LANCHOR46
-	add	x7, x1, :lo12:.LANCHOR46
-	strh	w2, [x4, #:lo12:.LANCHOR44]
-	strh	w8, [x6, #:lo12:.LANCHOR40]
+	strh	w0, [x1, #:lo12:.LANCHOR46]
+	adrp	x1, .LANCHOR47
+	add	x7, x1, :lo12:.LANCHOR47
+	strh	w2, [x4, #:lo12:.LANCHOR45]
+	strh	w8, [x6, #:lo12:.LANCHOR41]
 	str	x19, [sp, 16]
-.L327:
+.L330:
 	strb	w3, [x3, x7]
 	add	x3, x3, 1
 	cmp	x3, 32
-	bne	.L327
+	bne	.L330
 	ldrh	w7, [x5, 20]
 	ldrb	w3, [x5, 15]
 	cmp	w7, w3
-	bcs	.L328
+	bcs	.L331
 	and	w13, w0, 255
 	mul	w15, w0, w2
 	ubfiz	w14, w13, 1, 7
-	add	x1, x1, :lo12:.LANCHOR46
+	add	x1, x1, :lo12:.LANCHOR47
 	mov	w7, 0
-.L329:
+.L332:
 	cmp	w7, w0
-	bcs	.L331
+	bcs	.L334
 	and	w3, w7, 255
 	mov	w10, w7
 	mov	w12, 0
-	b	.L332
-.L330:
+	b	.L335
+.L333:
 	add	w16, w15, w10
 	strb	w3, [x1, w10, uxtw]
 	add	w17, w13, w3
@@ -2084,223 +2126,223 @@ FtlConstantsInit:
 	and	w3, w3, 255
 	add	w10, w10, w0
 	strb	w17, [x1, x16]
-.L332:
+.L335:
 	cmp	w12, w2
-	bcc	.L330
+	bcc	.L333
 	add	w7, w7, 1
-	b	.L329
-.L331:
+	b	.L332
+.L334:
 	ubfiz	w2, w2, 1, 15
 	lsr	w8, w8, 1
-	strh	w2, [x4, #:lo12:.LANCHOR44]
-	strh	w8, [x6, #:lo12:.LANCHOR40]
-.L328:
-	adrp	x1, .LANCHOR47
-	adrp	x13, .LANCHOR48
+	strh	w2, [x4, #:lo12:.LANCHOR45]
+	strh	w8, [x6, #:lo12:.LANCHOR41]
+.L331:
+	adrp	x1, .LANCHOR48
+	adrp	x13, .LANCHOR49
 	mov	w2, 5
 	cmp	w11, 1
-	strh	w2, [x1, #:lo12:.LANCHOR47]
-	strh	wzr, [x13, #:lo12:.LANCHOR48]
-	bne	.L333
-	strh	w11, [x1, #:lo12:.LANCHOR47]
-.L333:
-	adrp	x8, .LANCHOR49
+	strh	w2, [x1, #:lo12:.LANCHOR48]
+	strh	wzr, [x13, #:lo12:.LANCHOR49]
+	bne	.L336
+	strh	w11, [x1, #:lo12:.LANCHOR48]
+.L336:
+	adrp	x8, .LANCHOR50
 	mov	w1, 4352
-	strh	w1, [x8, #:lo12:.LANCHOR49]
+	strh	w1, [x8, #:lo12:.LANCHOR50]
 	adrp	x1, .LANCHOR1
 	ldrb	w11, [x1, #:lo12:.LANCHOR1]
-	cbz	w11, .L334
+	cbz	w11, .L337
 	mov	w1, 384
-	strh	w1, [x8, #:lo12:.LANCHOR49]
-.L334:
-	ldrh	w4, [x4, #:lo12:.LANCHOR44]
-	adrp	x1, .LANCHOR37
-	ldrh	w3, [x6, #:lo12:.LANCHOR40]
+	strh	w1, [x8, #:lo12:.LANCHOR50]
+.L337:
+	ldrh	w4, [x4, #:lo12:.LANCHOR45]
+	adrp	x1, .LANCHOR38
+	ldrh	w3, [x6, #:lo12:.LANCHOR41]
 	mul	w4, w0, w4
 	mul	w0, w0, w3
 	and	w4, w4, 65535
-	strh	w4, [x1, #:lo12:.LANCHOR37]
-	adrp	x1, .LANCHOR50
+	strh	w4, [x1, #:lo12:.LANCHOR38]
+	adrp	x1, .LANCHOR51
 	and	w0, w0, 65535
-	strh	w0, [x1, #:lo12:.LANCHOR50]
+	strh	w0, [x1, #:lo12:.LANCHOR51]
 	bl	Ftl_log2
 	ldrh	w19, [x5, 16]
-	adrp	x1, .LANCHOR51
+	adrp	x1, .LANCHOR52
 	ldrh	w10, [x5, 20]
-	adrp	x7, .LANCHOR52
-	strh	w0, [x1, #:lo12:.LANCHOR51]
-	adrp	x0, .LANCHOR53
+	adrp	x7, .LANCHOR53
+	strh	w0, [x1, #:lo12:.LANCHOR52]
+	adrp	x0, .LANCHOR54
 	ldrh	w14, [x5, 18]
-	adrp	x15, .LANCHOR55
+	adrp	x15, .LANCHOR56
 	mul	w1, w4, w19
-	strh	w14, [x0, #:lo12:.LANCHOR53]
-	adrp	x0, .LANCHOR54
-	strh	w19, [x7, #:lo12:.LANCHOR52]
-	strh	w10, [x15, #:lo12:.LANCHOR55]
-	strh	w1, [x0, #:lo12:.LANCHOR54]
+	strh	w14, [x0, #:lo12:.LANCHOR54]
+	adrp	x0, .LANCHOR55
+	strh	w19, [x7, #:lo12:.LANCHOR53]
+	strh	w10, [x15, #:lo12:.LANCHOR56]
+	strh	w1, [x0, #:lo12:.LANCHOR55]
 	mov	w0, w10
 	bl	Ftl_log2
 	and	w12, w0, 65535
-	adrp	x6, .LANCHOR56
+	adrp	x6, .LANCHOR57
 	ubfiz	w2, w10, 9, 7
 	ldrh	w1, [x5, 26]
 	cmp	w3, 1024
-	strh	w0, [x6, #:lo12:.LANCHOR56]
-	adrp	x0, .LANCHOR57
-	strh	w2, [x0, #:lo12:.LANCHOR57]
+	strh	w0, [x6, #:lo12:.LANCHOR57]
 	adrp	x0, .LANCHOR58
-	ubfx	w2, w2, 8, 8
 	strh	w2, [x0, #:lo12:.LANCHOR58]
 	adrp	x0, .LANCHOR59
-	strh	w1, [x0, #:lo12:.LANCHOR59]
-	adrp	x0, .LANCHOR42
+	ubfx	w2, w2, 8, 8
+	strh	w2, [x0, #:lo12:.LANCHOR59]
+	adrp	x0, .LANCHOR60
+	strh	w1, [x0, #:lo12:.LANCHOR60]
+	adrp	x0, .LANCHOR43
 	mul	w1, w4, w3
-	str	w1, [x0, #:lo12:.LANCHOR42]
-	bls	.L335
+	str	w1, [x0, #:lo12:.LANCHOR43]
+	bls	.L338
 	and	w0, w3, 255
-	strh	w0, [x13, #:lo12:.LANCHOR48]
-.L335:
-	ldrh	w0, [x13, #:lo12:.LANCHOR48]
-	adrp	x1, .LANCHOR60
+	strh	w0, [x13, #:lo12:.LANCHOR49]
+.L338:
+	ldrh	w0, [x13, #:lo12:.LANCHOR49]
+	adrp	x1, .LANCHOR61
 	sub	w0, w3, w0
 	mul	w0, w0, w4
 	mul	w0, w0, w10
 	mul	w0, w0, w19
 	asr	w0, w0, 11
-	str	w0, [x1, #:lo12:.LANCHOR60]
-	ldrh	w0, [x8, #:lo12:.LANCHOR49]
+	str	w0, [x1, #:lo12:.LANCHOR61]
+	ldrh	w0, [x8, #:lo12:.LANCHOR50]
 	mul	w1, w14, w10
-	adrp	x10, .LANCHOR61
+	adrp	x10, .LANCHOR62
 	lsl	w0, w0, 3
 	sdiv	w0, w0, w1
 	and	w0, w0, 65535
 	cmp	w0, 4
-	bls	.L336
-.L352:
-	strh	w0, [x10, #:lo12:.LANCHOR61]
-	cbz	w11, .L338
+	bls	.L339
+.L355:
+	strh	w0, [x10, #:lo12:.LANCHOR62]
+	cbz	w11, .L341
 	mov	w0, 640
-	strh	w0, [x8, #:lo12:.LANCHOR49]
-.L338:
-	ldrh	w0, [x8, #:lo12:.LANCHOR49]
-	adrp	x1, .LANCHOR62
+	strh	w0, [x8, #:lo12:.LANCHOR50]
+.L341:
+	ldrh	w0, [x8, #:lo12:.LANCHOR50]
+	adrp	x1, .LANCHOR63
 	lsl	w3, w3, 6
 	cmp	w4, 1
-	adrp	x8, .LANCHOR36
+	adrp	x8, .LANCHOR37
 	asr	w0, w0, w12
 	add	w0, w0, 2
-	strh	w0, [x1, #:lo12:.LANCHOR62]
+	strh	w0, [x1, #:lo12:.LANCHOR63]
 	add	w0, w12, 9
-	adrp	x1, .LANCHOR64
+	adrp	x1, .LANCHOR65
 	asr	w3, w3, w0
-	adrp	x0, .LANCHOR63
-	strh	w3, [x0, #:lo12:.LANCHOR63]
+	adrp	x0, .LANCHOR64
+	strh	w3, [x0, #:lo12:.LANCHOR64]
 	and	w3, w3, 65535
 	mul	w0, w4, w3
 	add	w3, w3, 8
-	str	w0, [x1, #:lo12:.LANCHOR64]
-	ldrh	w0, [x10, #:lo12:.LANCHOR61]
+	str	w0, [x1, #:lo12:.LANCHOR65]
+	ldrh	w0, [x10, #:lo12:.LANCHOR62]
 	udiv	w0, w0, w4
 	mov	x4, x1
 	add	w3, w0, w3
-	beq	.L339
-.L353:
-	str	w3, [x8, #:lo12:.LANCHOR36]
-	ldrh	w0, [x8, #:lo12:.LANCHOR36]
+	beq	.L342
+.L356:
+	str	w3, [x8, #:lo12:.LANCHOR37]
+	ldrh	w0, [x8, #:lo12:.LANCHOR37]
 	bl	FtlSysBlkNumInit
-	ldr	w1, [x8, #:lo12:.LANCHOR36]
-	adrp	x0, .LANCHOR65
+	ldr	w1, [x8, #:lo12:.LANCHOR37]
+	adrp	x0, .LANCHOR66
 	mov	w2, 24
-	str	w1, [x0, #:lo12:.LANCHOR65]
-	adrp	x0, .LANCHOR41
-	ldrh	w1, [x7, #:lo12:.LANCHOR52]
-	ldr	w0, [x0, #:lo12:.LANCHOR41]
+	str	w1, [x0, #:lo12:.LANCHOR66]
+	adrp	x0, .LANCHOR42
+	ldrh	w1, [x7, #:lo12:.LANCHOR53]
+	ldr	w0, [x0, #:lo12:.LANCHOR42]
 	lsl	w0, w0, 2
 	mul	w0, w0, w1
-	ldrh	w1, [x6, #:lo12:.LANCHOR56]
+	ldrh	w1, [x6, #:lo12:.LANCHOR57]
 	adrp	x6, .LANCHOR8
 	add	w1, w1, 9
 	ldrb	w6, [x6, #:lo12:.LANCHOR8]
 	lsr	w0, w0, w1
-	adrp	x1, .LANCHOR66
+	adrp	x1, .LANCHOR67
 	add	w0, w0, 2
 	and	w0, w0, 65535
-	strh	w0, [x1, #:lo12:.LANCHOR66]
-	adrp	x1, .LANCHOR67
-	strh	w2, [x1, #:lo12:.LANCHOR67]
+	strh	w0, [x1, #:lo12:.LANCHOR67]
 	adrp	x1, .LANCHOR68
-	ldrh	w2, [x10, #:lo12:.LANCHOR61]
-	str	wzr, [x1, #:lo12:.LANCHOR68]
+	strh	w2, [x1, #:lo12:.LANCHOR68]
+	adrp	x1, .LANCHOR69
+	ldrh	w2, [x10, #:lo12:.LANCHOR62]
+	str	wzr, [x1, #:lo12:.LANCHOR69]
 	add	w1, w2, 3
-	strh	w1, [x10, #:lo12:.LANCHOR61]
-	ldr	w1, [x4, #:lo12:.LANCHOR64]
+	strh	w1, [x10, #:lo12:.LANCHOR62]
+	ldr	w1, [x4, #:lo12:.LANCHOR65]
 	add	w3, w1, 3
-	str	w3, [x4, #:lo12:.LANCHOR64]
-	cbz	w6, .L341
+	str	w3, [x4, #:lo12:.LANCHOR65]
+	cbz	w6, .L344
 	add	w1, w1, 5
 	add	w2, w2, 4
-	strh	w2, [x10, #:lo12:.LANCHOR61]
-.L354:
-	str	w1, [x4, #:lo12:.LANCHOR64]
-.L342:
-	adrp	x1, .LANCHOR39
-	adrp	x3, .LANCHOR69
-	ldrh	w1, [x1, #:lo12:.LANCHOR39]
-	strh	wzr, [x3, #:lo12:.LANCHOR69]
+	strh	w2, [x10, #:lo12:.LANCHOR62]
+.L357:
+	str	w1, [x4, #:lo12:.LANCHOR65]
+.L345:
+	adrp	x1, .LANCHOR40
+	adrp	x3, .LANCHOR70
+	ldrh	w1, [x1, #:lo12:.LANCHOR40]
+	strh	wzr, [x3, #:lo12:.LANCHOR70]
 	lsl	w2, w1, 1
 	lsr	w1, w1, 3
 	add	w2, w2, 48
 	add	w1, w1, 4
 	add	w0, w2, w0, lsl 2
 	add	w0, w0, w1
-	ldrh	w1, [x15, #:lo12:.LANCHOR55]
+	ldrh	w1, [x15, #:lo12:.LANCHOR56]
 	cmp	w0, w1, lsl 9
-	bcs	.L343
+	bcs	.L346
 	mov	w0, 1
-	strh	w0, [x3, #:lo12:.LANCHOR69]
-.L343:
+	strh	w0, [x3, #:lo12:.LANCHOR70]
+.L346:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L336:
-	mov	w0, 4
-	b	.L352
 .L339:
+	mov	w0, 4
+	b	.L355
+.L342:
 	add	w3, w3, 4
-	b	.L353
-.L341:
+	b	.L356
+.L344:
 	cmp	w3, 7
-	bhi	.L342
+	bhi	.L345
 	mov	w1, 8
-	b	.L354
+	b	.L357
 	.size	FtlConstantsInit, .-FtlConstantsInit
 	.section	.text.IsBlkInVendorPart,"ax",@progbits
 	.align	2
 	.global	IsBlkInVendorPart
 	.type	IsBlkInVendorPart, %function
 IsBlkInVendorPart:
-	adrp	x1, .LANCHOR70
-	and	w0, w0, 65535
-	ldrh	w1, [x1, #:lo12:.LANCHOR70]
-	cbz	w1, .L359
-	adrp	x1, .LANCHOR61
-	ldrh	w2, [x1, #:lo12:.LANCHOR61]
 	adrp	x1, .LANCHOR71
-	ldr	x3, [x1, #:lo12:.LANCHOR71]
+	and	w0, w0, 65535
+	ldrh	w1, [x1, #:lo12:.LANCHOR71]
+	cbz	w1, .L362
+	adrp	x1, .LANCHOR62
+	ldrh	w2, [x1, #:lo12:.LANCHOR62]
+	adrp	x1, .LANCHOR72
+	ldr	x3, [x1, #:lo12:.LANCHOR72]
 	mov	x1, 0
-.L357:
+.L360:
 	cmp	w2, w1, uxth
-	bhi	.L358
-.L359:
+	bhi	.L361
+.L362:
 	mov	w0, 0
 	ret
-.L358:
+.L361:
 	add	x1, x1, 1
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w0
-	bne	.L357
+	bne	.L360
 	mov	w0, 1
 	ret
 	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
@@ -2309,8 +2351,8 @@ IsBlkInVendorPart:
 	.global	FtlGetCap
 	.type	FtlGetCap, %function
 FtlGetCap:
-	adrp	x0, .LANCHOR68
-	ldr	w0, [x0, #:lo12:.LANCHOR68]
+	adrp	x0, .LANCHOR69
+	ldr	w0, [x0, #:lo12:.LANCHOR69]
 	ret
 	.size	FtlGetCap, .-FtlGetCap
 	.section	.text.FtlGetCapacity,"ax",@progbits
@@ -2318,8 +2360,8 @@ FtlGetCap:
 	.global	FtlGetCapacity
 	.type	FtlGetCapacity, %function
 FtlGetCapacity:
-	adrp	x0, .LANCHOR68
-	ldr	w0, [x0, #:lo12:.LANCHOR68]
+	adrp	x0, .LANCHOR69
+	ldr	w0, [x0, #:lo12:.LANCHOR69]
 	ret
 	.size	FtlGetCapacity, .-FtlGetCapacity
 	.section	.text.ftl_get_density,"ax",@progbits
@@ -2327,8 +2369,8 @@ FtlGetCapacity:
 	.global	ftl_get_density
 	.type	ftl_get_density, %function
 ftl_get_density:
-	adrp	x0, .LANCHOR68
-	ldr	w0, [x0, #:lo12:.LANCHOR68]
+	adrp	x0, .LANCHOR69
+	ldr	w0, [x0, #:lo12:.LANCHOR69]
 	ret
 	.size	ftl_get_density, .-ftl_get_density
 	.section	.text.FtlGetLpn,"ax",@progbits
@@ -2336,8 +2378,8 @@ ftl_get_density:
 	.global	FtlGetLpn
 	.type	FtlGetLpn, %function
 FtlGetLpn:
-	adrp	x0, .LANCHOR72
-	ldr	w0, [x0, #:lo12:.LANCHOR72]
+	adrp	x0, .LANCHOR73
+	ldr	w0, [x0, #:lo12:.LANCHOR73]
 	ret
 	.size	FtlGetLpn, .-FtlGetLpn
 	.section	.text.FtlGetCurEraseBlock,"ax",@progbits
@@ -2345,10 +2387,10 @@ FtlGetLpn:
 	.global	FtlGetCurEraseBlock
 	.type	FtlGetCurEraseBlock, %function
 FtlGetCurEraseBlock:
-	adrp	x0, .LANCHOR37
-	ldrh	w1, [x0, #:lo12:.LANCHOR37]
-	adrp	x0, .LANCHOR73
-	ldr	w0, [x0, #:lo12:.LANCHOR73]
+	adrp	x0, .LANCHOR38
+	ldrh	w1, [x0, #:lo12:.LANCHOR38]
+	adrp	x0, .LANCHOR74
+	ldr	w0, [x0, #:lo12:.LANCHOR74]
 	mul	w0, w1, w0
 	ret
 	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
@@ -2357,10 +2399,10 @@ FtlGetCurEraseBlock:
 	.global	FtlGetAllBlockNum
 	.type	FtlGetAllBlockNum, %function
 FtlGetAllBlockNum:
-	adrp	x0, .LANCHOR40
-	ldrh	w1, [x0, #:lo12:.LANCHOR40]
-	adrp	x0, .LANCHOR37
-	ldrh	w0, [x0, #:lo12:.LANCHOR37]
+	adrp	x0, .LANCHOR41
+	ldrh	w1, [x0, #:lo12:.LANCHOR41]
+	adrp	x0, .LANCHOR38
+	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	mul	w0, w1, w0
 	ret
 	.size	FtlGetAllBlockNum, .-FtlGetAllBlockNum
@@ -2371,13 +2413,13 @@ FtlGetAllBlockNum:
 FtlBbmMapBadBlock:
 	stp	x29, x30, [sp, -32]!
 	and	w1, w0, 65535
-	adrp	x0, .LANCHOR50
+	adrp	x0, .LANCHOR51
 	mov	w4, 1
 	add	x29, sp, 0
-	ldrh	w0, [x0, #:lo12:.LANCHOR50]
+	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR74
-	add	x19, x19, :lo12:.LANCHOR74
+	adrp	x19, .LANCHOR75
+	add	x19, x19, :lo12:.LANCHOR75
 	udiv	w3, w1, w0
 	and	w2, w3, 65535
 	msub	w3, w3, w0, w1
@@ -2407,13 +2449,13 @@ FtlBbmMapBadBlock:
 	.global	FtlBbmIsBadBlock
 	.type	FtlBbmIsBadBlock, %function
 FtlBbmIsBadBlock:
-	adrp	x1, .LANCHOR50
+	adrp	x1, .LANCHOR51
 	and	w0, w0, 65535
-	ldrh	w1, [x1, #:lo12:.LANCHOR50]
+	ldrh	w1, [x1, #:lo12:.LANCHOR51]
 	udiv	w2, w0, w1
 	msub	w0, w2, w1, w0
-	adrp	x1, .LANCHOR74
-	add	x1, x1, :lo12:.LANCHOR74
+	adrp	x1, .LANCHOR75
+	add	x1, x1, :lo12:.LANCHOR75
 	add	x2, x1, x2, uxth 3
 	and	w0, w0, 65535
 	ubfx	x3, x0, 5, 11
@@ -2436,12 +2478,12 @@ FtlBbtInfoPrint:
 	.global	V2P_block
 	.type	V2P_block, %function
 V2P_block:
-	adrp	x2, .LANCHOR45
+	adrp	x2, .LANCHOR46
 	and	w0, w0, 65535
-	adrp	x4, .LANCHOR50
+	adrp	x4, .LANCHOR51
 	and	w1, w1, 65535
-	ldrh	w2, [x2, #:lo12:.LANCHOR45]
-	ldrh	w4, [x4, #:lo12:.LANCHOR50]
+	ldrh	w2, [x2, #:lo12:.LANCHOR46]
+	ldrh	w4, [x4, #:lo12:.LANCHOR51]
 	udiv	w3, w0, w2
 	msub	w0, w3, w2, w0
 	madd	w2, w2, w1, w0
@@ -2454,10 +2496,10 @@ V2P_block:
 	.type	P2V_plane, %function
 P2V_plane:
 	and	w3, w0, 65535
-	adrp	x0, .LANCHOR45
-	ldrh	w1, [x0, #:lo12:.LANCHOR45]
-	adrp	x0, .LANCHOR50
-	ldrh	w2, [x0, #:lo12:.LANCHOR50]
+	adrp	x0, .LANCHOR46
+	ldrh	w1, [x0, #:lo12:.LANCHOR46]
+	adrp	x0, .LANCHOR51
+	ldrh	w2, [x0, #:lo12:.LANCHOR51]
 	udiv	w0, w3, w1
 	udiv	w2, w3, w2
 	msub	w0, w0, w1, w3
@@ -2470,12 +2512,12 @@ P2V_plane:
 	.type	P2V_block_in_plane, %function
 P2V_block_in_plane:
 	and	w2, w0, 65535
-	adrp	x0, .LANCHOR50
-	ldrh	w1, [x0, #:lo12:.LANCHOR50]
+	adrp	x0, .LANCHOR51
+	ldrh	w1, [x0, #:lo12:.LANCHOR51]
 	udiv	w0, w2, w1
 	msub	w0, w0, w1, w2
-	adrp	x1, .LANCHOR45
-	ldrh	w1, [x1, #:lo12:.LANCHOR45]
+	adrp	x1, .LANCHOR46
+	ldrh	w1, [x1, #:lo12:.LANCHOR46]
 	and	w0, w0, 65535
 	udiv	w0, w0, w1
 	ret
@@ -2487,12 +2529,12 @@ P2V_block_in_plane:
 ftl_cmp_data_ver:
 	cmp	w0, w1
 	mov	w2, -2147483648
-	bls	.L375
+	bls	.L378
 	sub	w1, w0, w1
 	cmp	w1, w2
 	cset	w0, ls
 	ret
-.L375:
+.L378:
 	sub	w1, w1, w0
 	cmp	w1, w2
 	cset	w0, hi
@@ -2503,8 +2545,8 @@ ftl_cmp_data_ver:
 	.global	FtlFreeSysBlkQueueEmpty
 	.type	FtlFreeSysBlkQueueEmpty, %function
 FtlFreeSysBlkQueueEmpty:
-	adrp	x0, .LANCHOR75+6
-	ldrh	w0, [x0, #:lo12:.LANCHOR75+6]
+	adrp	x0, .LANCHOR76+6
+	ldrh	w0, [x0, #:lo12:.LANCHOR76+6]
 	cmp	w0, 0
 	cset	w0, eq
 	ret
@@ -2514,8 +2556,8 @@ FtlFreeSysBlkQueueEmpty:
 	.global	FtlFreeSysBlkQueueFull
 	.type	FtlFreeSysBlkQueueFull, %function
 FtlFreeSysBlkQueueFull:
-	adrp	x0, .LANCHOR75+6
-	ldrh	w0, [x0, #:lo12:.LANCHOR75+6]
+	adrp	x0, .LANCHOR76+6
+	ldrh	w0, [x0, #:lo12:.LANCHOR76+6]
 	cmp	w0, 1024
 	cset	w0, eq
 	ret
@@ -2527,42 +2569,46 @@ FtlFreeSysBlkQueueFull:
 FtlFreeSysBlkQueueIn:
 	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
-	str	x21, [sp, 32]
-	and	w21, w0, 65535
-	adrp	x0, .LANCHOR75
-	add	x2, x0, :lo12:.LANCHOR75
 	stp	x19, x20, [sp, 16]
+	and	w20, w0, 65535
+	str	x21, [sp, 32]
+	sub	w2, w20, #1
+	mov	w0, 65533
+	cmp	w0, w2, uxth
+	bcc	.L382
+	adrp	x0, .LANCHOR76
+	add	x2, x0, :lo12:.LANCHOR76
+	mov	x19, x0
 	ldrh	w2, [x2, 6]
 	cmp	w2, 1024
-	beq	.L379
+	beq	.L382
 	and	w1, w1, 65535
-	mov	x19, x0
-	cbz	w1, .L381
-	adrp	x0, .LANCHOR76
-	ldr	w0, [x0, #:lo12:.LANCHOR76]
-	cbnz	w0, .L381
-	mov	w0, w21
-	bl	P2V_block_in_plane
-	and	w20, w0, 65535
+	cbz	w1, .L384
 	adrp	x0, .LANCHOR77
-	lsl	w1, w21, 10
+	ldr	w0, [x0, #:lo12:.LANCHOR77]
+	cbnz	w0, .L384
+	mov	w0, w20
+	bl	P2V_block_in_plane
+	and	w21, w0, 65535
+	adrp	x0, .LANCHOR78
+	lsl	w1, w20, 10
 	mov	w2, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR77]
+	ldr	x0, [x0, #:lo12:.LANCHOR78]
 	str	w1, [x0, 4]
 	mov	w1, w2
 	bl	FlashEraseBlocks
-	adrp	x1, .LANCHOR78
-	ubfiz	x0, x20, 1, 16
-	ldr	x2, [x1, #:lo12:.LANCHOR78]
+	adrp	x1, .LANCHOR79
+	ubfiz	x0, x21, 1, 16
+	ldr	x2, [x1, #:lo12:.LANCHOR79]
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-	adrp	x1, .LANCHOR79
-	ldr	w0, [x1, #:lo12:.LANCHOR79]
+	adrp	x1, .LANCHOR80
+	ldr	w0, [x1, #:lo12:.LANCHOR80]
 	add	w0, w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR79]
-.L381:
-	add	x0, x19, :lo12:.LANCHOR75
+	str	w0, [x1, #:lo12:.LANCHOR80]
+.L384:
+	add	x0, x19, :lo12:.LANCHOR76
 	ldrh	w1, [x0, 6]
 	add	w1, w1, 1
 	strh	w1, [x0, 6]
@@ -2571,8 +2617,8 @@ FtlFreeSysBlkQueueIn:
 	add	w1, w1, 1
 	and	w1, w1, 1023
 	strh	w1, [x0, 4]
-	strh	w21, [x2, 8]
-.L379:
+	strh	w20, [x2, 8]
+.L382:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -2583,109 +2629,58 @@ FtlFreeSysBlkQueueIn:
 	.global	FtlFreeSysBLkSort
 	.type	FtlFreeSysBLkSort, %function
 FtlFreeSysBLkSort:
-	adrp	x0, .LANCHOR80+28
+	adrp	x0, .LANCHOR76
+	add	x1, x0, :lo12:.LANCHOR76
+	ldrh	w2, [x1, 6]
+	cbz	w2, .L392
+	adrp	x2, .LANCHOR81+28
+	ldrh	w3, [x1, 2]
 	mov	w6, 0
 	mov	w4, 0
-	ldrh	w5, [x0, #:lo12:.LANCHOR80+28]
-	adrp	x0, .LANCHOR75
-	add	x3, x0, :lo12:.LANCHOR75
+	ldrh	w5, [x2, #:lo12:.LANCHOR81+28]
+	ldrh	w2, [x1, 4]
 	and	w5, w5, 31
-	ldrh	w2, [x3, 2]
-	ldrh	w1, [x3, 4]
-.L390:
+.L394:
 	cmp	w5, w4
-	bgt	.L391
-	cbz	w6, .L389
-	add	x0, x0, :lo12:.LANCHOR75
-	strh	w2, [x0, 2]
-	strh	w1, [x0, 4]
-.L389:
+	bgt	.L395
+	cbz	w6, .L392
+	add	x0, x0, :lo12:.LANCHOR76
+	strh	w3, [x0, 2]
+	strh	w2, [x0, 4]
+.L392:
 	ret
-.L391:
-	add	x6, x3, x2, sxtw 1
+.L395:
+	add	x6, x1, x3, sxtw 1
 	add	w4, w4, 1
-	add	w2, w2, 1
+	add	w3, w3, 1
 	and	w4, w4, 65535
-	and	w2, w2, 1023
+	and	w3, w3, 1023
 	ldrh	w7, [x6, 8]
-	add	x6, x3, x1, sxtw 1
+	add	x6, x1, x2, sxtw 1
 	strh	w7, [x6, 8]
 	mov	w6, 1
-	add	w1, w1, w6
-	and	w1, w1, 1023
-	b	.L390
+	add	w2, w2, w6
+	and	w2, w2, 1023
+	b	.L394
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
-	.section	.text.remove_from_free_sys_Queue,"ax",@progbits
+	.section	.text.FtlFreeSysBlkQueueOut,"ax",@progbits
 	.align	2
-	.global	remove_from_free_sys_Queue
-	.type	remove_from_free_sys_Queue, %function
-remove_from_free_sys_Queue:
-	stp	x29, x30, [sp, -32]!
+	.global	FtlFreeSysBlkQueueOut
+	.type	FtlFreeSysBlkQueueOut, %function
+FtlFreeSysBlkQueueOut:
+	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR75
-	add	x19, x19, :lo12:.LANCHOR75
-	ldrh	w3, [x19, 6]
-	cbz	w3, .L401
-	and	w1, w0, 65535
-	ldrh	w0, [x19, 2]
-	mov	w20, 0
-.L398:
-	cmp	w20, w3
-	bcc	.L400
-.L401:
-	mov	w0, 0
-	b	.L396
-.L400:
-	add	w2, w20, w0
-	ubfiz	x2, x2, 1, 10
-	add	x2, x19, x2
-	ldrh	w2, [x2, 8]
-	cmp	w2, w1
-	bne	.L399
-	adrp	x0, .LC3
-	add	x0, x0, :lo12:.LC3
-	bl	printf
-	ldrh	w0, [x19, 2]
-	add	w20, w0, w20
-	add	x1, x19, x0, sxtw 1
-	add	w0, w0, 1
-	and	w0, w0, 1023
-	ubfiz	x20, x20, 1, 10
-	add	x20, x19, x20
-	strh	w0, [x19, 2]
-	ldrh	w0, [x19, 6]
-	ldrh	w1, [x1, 8]
-	sub	w0, w0, #1
-	strh	w1, [x20, 8]
-	strh	w0, [x19, 6]
-	mov	w0, 1
-.L396:
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	ret
-.L399:
-	add	w20, w20, 1
-	b	.L398
-	.size	remove_from_free_sys_Queue, .-remove_from_free_sys_Queue
-	.section	.text.FtlFreeSysBlkQueueOut,"ax",@progbits
-	.align	2
-	.global	FtlFreeSysBlkQueueOut
-	.type	FtlFreeSysBlkQueueOut, %function
-FtlFreeSysBlkQueueOut:
-	stp	x29, x30, [sp, -64]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR75
-	add	x19, x19, :lo12:.LANCHOR75
-	stp	x21, x22, [sp, 32]
-	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR76
-	mov	x23, x19
-	add	x22, x22, :lo12:.LANCHOR76
-.L404:
-	ldrh	w1, [x19, 6]
-	cbz	w1, .L405
+	adrp	x19, .LANCHOR76
+	add	x19, x19, :lo12:.LANCHOR76
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	adrp	x22, .LANCHOR77
+	mov	x23, x19
+	add	x22, x22, :lo12:.LANCHOR77
+.L402:
+	ldrh	w1, [x19, 6]
+	cbz	w1, .L403
 	ldrh	w0, [x19, 2]
 	sub	w1, w1, #1
 	strh	w1, [x19, 6]
@@ -2695,52 +2690,55 @@ FtlFreeSysBlkQueueOut:
 	strh	w0, [x19, 2]
 	ldr	w0, [x22]
 	ldrh	w20, [x2, 8]
-	cbnz	w0, .L406
+	cbnz	w0, .L404
 	mov	w0, w20
 	bl	P2V_block_in_plane
-	adrp	x1, .LANCHOR77
+	adrp	x1, .LANCHOR78
 	and	w21, w0, 65535
 	lsl	w2, w20, 10
 	mov	x24, x1
-	ldr	x0, [x1, #:lo12:.LANCHOR77]
+	ldr	x0, [x1, #:lo12:.LANCHOR78]
 	str	w2, [x0, 4]
 	adrp	x2, .LANCHOR8
 	ldrb	w2, [x2, #:lo12:.LANCHOR8]
-	cbz	w2, .L407
+	cbz	w2, .L405
 	mov	w2, 1
 	mov	w1, 0
 	bl	FlashEraseBlocks
-.L407:
-	ldr	x0, [x24, #:lo12:.LANCHOR77]
+.L405:
+	ldr	x0, [x24, #:lo12:.LANCHOR78]
 	mov	w2, 1
 	mov	w1, w2
 	bl	FlashEraseBlocks
-	adrp	x1, .LANCHOR78
+	adrp	x1, .LANCHOR79
 	ubfiz	x0, x21, 1, 16
-	ldr	x2, [x1, #:lo12:.LANCHOR78]
+	ldr	x2, [x1, #:lo12:.LANCHOR79]
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-	adrp	x1, .LANCHOR79
-	ldr	w0, [x1, #:lo12:.LANCHOR79]
+	adrp	x1, .LANCHOR80
+	ldr	w0, [x1, #:lo12:.LANCHOR80]
 	add	w0, w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR79]
-.L406:
-	cbnz	w20, .L409
+	str	w0, [x1, #:lo12:.LANCHOR80]
+.L404:
+	sub	w0, w20, #1
+	mov	w1, 65533
+	cmp	w1, w0, uxth
+	bcs	.L407
 	ldrh	w2, [x23, 6]
-	mov	w1, 0
-	adrp	x0, .LC5
-	add	x0, x0, :lo12:.LC5
-	bl	printf
-	b	.L404
-.L405:
+	mov	w1, w20
 	adrp	x0, .LC4
-	mov	w1, 0
 	add	x0, x0, :lo12:.LC4
 	bl	printf
-.L408:
-	b	.L408
-.L409:
+	b	.L402
+.L403:
+	adrp	x0, .LC3
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC3
+	bl	printf
+.L406:
+	b	.L406
+.L407:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -2748,39 +2746,71 @@ FtlFreeSysBlkQueueOut:
 	ldp	x29, x30, [sp], 64
 	ret
 	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
+	.section	.text.test_node_in_list,"ax",@progbits
+	.align	2
+	.global	test_node_in_list
+	.type	test_node_in_list, %function
+test_node_in_list:
+	ldr	x2, [x0]
+	adrp	x0, .LANCHOR82
+	mov	x4, -6148914691236517206
+	and	w1, w1, 65535
+	ldr	x3, [x0, #:lo12:.LANCHOR82]
+	movk	x4, 0xaaab, lsl 0
+	mov	w5, 65535
+	sub	x0, x2, x3
+	asr	x0, x0, 1
+	mul	x0, x0, x4
+	mov	w4, 6
+	and	w0, w0, 65535
+.L414:
+	cmp	w0, w1
+	beq	.L415
+	ldrh	w0, [x2]
+	cmp	w0, w5
+	beq	.L416
+	umaddl	x2, w0, w4, x3
+	b	.L414
+.L415:
+	mov	w0, 1
+	ret
+.L416:
+	mov	w0, 0
+	ret
+	.size	test_node_in_list, .-test_node_in_list
 	.section	.text.insert_data_list,"ax",@progbits
 	.align	2
 	.global	insert_data_list
 	.type	insert_data_list, %function
 insert_data_list:
-	adrp	x1, .LANCHOR39
+	adrp	x1, .LANCHOR40
 	and	w0, w0, 65535
-	ldrh	w14, [x1, #:lo12:.LANCHOR39]
+	ldrh	w14, [x1, #:lo12:.LANCHOR40]
 	cmp	w14, w0
-	bls	.L430
-	adrp	x1, .LANCHOR81
+	bls	.L433
+	adrp	x1, .LANCHOR82
 	mov	w3, 6
-	ldr	x6, [x1, #:lo12:.LANCHOR81]
+	ldr	x6, [x1, #:lo12:.LANCHOR82]
 	umull	x13, w0, w3
 	mov	w1, -1
 	add	x5, x6, x13
 	strh	w1, [x5, 2]
 	strh	w1, [x6, x13]
-	adrp	x1, .LANCHOR82
+	adrp	x1, .LANCHOR83
 	mov	x15, x1
-	ldr	x12, [x1, #:lo12:.LANCHOR82]
-	cbnz	x12, .L417
-	str	x5, [x1, #:lo12:.LANCHOR82]
-.L430:
+	ldr	x12, [x1, #:lo12:.LANCHOR83]
+	cbnz	x12, .L420
+	str	x5, [x1, #:lo12:.LANCHOR83]
+.L433:
 	mov	w0, 0
 	ret
-.L417:
+.L420:
 	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LANCHOR83
+	adrp	x1, .LANCHOR84
 	ubfiz	x2, x0, 1, 16
 	mov	x4, -6148914691236517206
 	add	x29, sp, 0
-	ldr	x16, [x1, #:lo12:.LANCHOR83]
+	ldr	x16, [x1, #:lo12:.LANCHOR84]
 	movk	x4, 0xaaab, lsl 0
 	ldrh	w1, [x5, 4]
 	mov	w8, -1
@@ -2795,19 +2825,19 @@ insert_data_list:
 	csel	w7, w7, w8, ne
 	mov	w8, w3
 	mul	x1, x1, x4
-	adrp	x4, .LANCHOR78
-	ldr	x17, [x4, #:lo12:.LANCHOR78]
+	adrp	x4, .LANCHOR79
+	ldr	x17, [x4, #:lo12:.LANCHOR79]
 	and	w1, w1, 65535
 	mov	x4, x12
 	add	x10, x17, x2
 	mov	w2, 0
-.L425:
+.L428:
 	add	w2, w2, 1
 	and	w2, w2, 65535
 	cmp	w14, w2
-	bcc	.L416
+	bcc	.L419
 	cmp	w1, w0
-	beq	.L416
+	beq	.L419
 	ubfiz	x30, x1, 1, 16
 	ldrh	w19, [x4, 4]
 	cmp	w19, 0
@@ -2815,46 +2845,46 @@ insert_data_list:
 	mul	w3, w3, w19
 	csel	w3, w3, w11, ne
 	cmp	w7, w3
-	bne	.L421
+	bne	.L424
 	ldrh	w19, [x17, x30]
 	ldrh	w3, [x10]
 	cmp	w19, w3
-	bcc	.L423
-.L422:
+	bcc	.L426
+.L425:
 	strh	w1, [x6, x13]
 	cmp	x4, x12
 	ldrh	w1, [x4, 2]
 	strh	w1, [x5, 2]
-	bne	.L426
+	bne	.L429
 	strh	w0, [x4, 2]
-	str	x5, [x15, #:lo12:.LANCHOR82]
-	b	.L416
-.L421:
-	bcc	.L422
-.L423:
+	str	x5, [x15, #:lo12:.LANCHOR83]
+	b	.L419
+.L424:
+	bcc	.L425
+.L426:
 	ldrh	w3, [x4]
 	cmp	w3, w20
-	bne	.L424
+	bne	.L427
 	strh	w1, [x5, 2]
 	strh	w0, [x4]
-	adrp	x0, .LANCHOR84
-	str	x5, [x0, #:lo12:.LANCHOR84]
-.L416:
+	adrp	x0, .LANCHOR85
+	str	x5, [x0, #:lo12:.LANCHOR85]
+.L419:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L424:
+.L427:
 	umaddl	x4, w3, w8, x6
 	mov	w1, w3
-	b	.L425
-.L426:
+	b	.L428
+.L429:
 	ldrh	w1, [x4, 2]
 	mov	w2, 6
 	umull	x1, w1, w2
 	strh	w0, [x6, x1]
 	strh	w0, [x4, 2]
-	b	.L416
+	b	.L419
 	.size	insert_data_list, .-insert_data_list
 	.section	.text.INSERT_DATA_LIST,"ax",@progbits
 	.align	2
@@ -2864,28 +2894,28 @@ INSERT_DATA_LIST:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	insert_data_list
-	adrp	x1, .LANCHOR85
-	ldrh	w0, [x1, #:lo12:.LANCHOR85]
+	adrp	x1, .LANCHOR86
+	ldrh	w0, [x1, #:lo12:.LANCHOR86]
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	strh	w0, [x1, #:lo12:.LANCHOR85]
-	adrp	x1, .LANCHOR39
-	ldrh	w1, [x1, #:lo12:.LANCHOR39]
+	strh	w0, [x1, #:lo12:.LANCHOR86]
+	adrp	x1, .LANCHOR40
+	ldrh	w1, [x1, #:lo12:.LANCHOR40]
 	cmp	w1, w0
-	bcs	.L432
-	mov	w2, 228
-	adrp	x1, .LANCHOR86
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR86
-	add	x0, x0, :lo12:.LC6
+	bcs	.L435
+	mov	w2, 210
+	adrp	x1, .LANCHOR87
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR87
+	add	x0, x0, :lo12:.LC5
 	bl	printf
 	ldp	x29, x30, [sp], 16
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	b	printf
-.L432:
+.L435:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
@@ -2897,28 +2927,28 @@ insert_free_list:
 	and	w0, w0, 65535
 	mov	w7, 65535
 	cmp	w0, w7
-	beq	.L436
-	adrp	x1, .LANCHOR81
+	beq	.L439
+	adrp	x1, .LANCHOR82
 	mov	w6, 6
-	ldr	x3, [x1, #:lo12:.LANCHOR81]
+	ldr	x3, [x1, #:lo12:.LANCHOR82]
 	umull	x8, w0, w6
 	mov	w1, -1
 	add	x4, x3, x8
 	strh	w1, [x4, 2]
 	strh	w1, [x3, x8]
-	adrp	x1, .LANCHOR87
+	adrp	x1, .LANCHOR88
 	mov	x12, x1
-	ldr	x5, [x1, #:lo12:.LANCHOR87]
-	cbnz	x5, .L437
-	str	x4, [x1, #:lo12:.LANCHOR87]
-.L436:
+	ldr	x5, [x1, #:lo12:.LANCHOR88]
+	cbnz	x5, .L440
+	str	x4, [x1, #:lo12:.LANCHOR88]
+.L439:
 	mov	w0, 0
 	ret
-.L437:
-	adrp	x1, .LANCHOR78
+.L440:
+	adrp	x1, .LANCHOR79
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
-	ldr	x11, [x1, #:lo12:.LANCHOR78]
+	ldr	x11, [x1, #:lo12:.LANCHOR79]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w13, [x11, x1]
 	sub	x1, x5, x3
@@ -2926,37 +2956,37 @@ insert_free_list:
 	mul	x1, x1, x2
 	mov	x2, x5
 	and	w1, w1, 65535
-.L440:
+.L443:
 	ubfiz	x10, x1, 1, 16
 	ldrh	w10, [x11, x10]
 	cmp	w10, w13
-	bcs	.L438
+	bcs	.L441
 	ldrh	w10, [x2]
 	cmp	w10, w7
-	bne	.L439
+	bne	.L442
 	strh	w1, [x4, 2]
 	strh	w0, [x2]
-	b	.L436
-.L439:
+	b	.L439
+.L442:
 	umaddl	x2, w10, w6, x3
 	mov	w1, w10
-	b	.L440
-.L438:
+	b	.L443
+.L441:
 	ldrh	w6, [x2, 2]
 	cmp	x2, x5
 	strh	w6, [x4, 2]
 	strh	w1, [x3, x8]
-	bne	.L441
+	bne	.L444
 	strh	w0, [x2, 2]
-	str	x4, [x12, #:lo12:.LANCHOR87]
-	b	.L436
-.L441:
+	str	x4, [x12, #:lo12:.LANCHOR88]
+	b	.L439
+.L444:
 	ldrh	w1, [x2, 2]
 	mov	w4, 6
 	umull	x1, w1, w4
 	strh	w0, [x3, x1]
 	strh	w0, [x2, 2]
-	b	.L436
+	b	.L439
 	.size	insert_free_list, .-insert_free_list
 	.section	.text.INSERT_FREE_LIST,"ax",@progbits
 	.align	2
@@ -2966,28 +2996,28 @@ INSERT_FREE_LIST:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	insert_free_list
-	adrp	x1, .LANCHOR88
-	ldrh	w0, [x1, #:lo12:.LANCHOR88]
+	adrp	x1, .LANCHOR89
+	ldrh	w0, [x1, #:lo12:.LANCHOR89]
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	strh	w0, [x1, #:lo12:.LANCHOR88]
-	adrp	x1, .LANCHOR39
-	ldrh	w1, [x1, #:lo12:.LANCHOR39]
+	strh	w0, [x1, #:lo12:.LANCHOR89]
+	adrp	x1, .LANCHOR40
+	ldrh	w1, [x1, #:lo12:.LANCHOR40]
 	cmp	w1, w0
-	bcs	.L442
-	mov	w2, 221
-	adrp	x1, .LANCHOR89
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR89
-	add	x0, x0, :lo12:.LC6
+	bcs	.L445
+	mov	w2, 203
+	adrp	x1, .LANCHOR90
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR90
+	add	x0, x0, :lo12:.LC5
 	bl	printf
 	ldp	x29, x30, [sp], 16
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	b	printf
-.L442:
+.L445:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
@@ -3000,42 +3030,42 @@ List_remove_node:
 	and	w1, w1, 65535
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR81
+	adrp	x20, .LANCHOR82
 	stp	x21, x22, [sp, 32]
 	mov	x22, x0
 	mov	w0, 6
 	str	x23, [sp, 48]
-	ldr	x23, [x20, #:lo12:.LANCHOR81]
+	ldr	x23, [x20, #:lo12:.LANCHOR82]
 	umull	x21, w1, w0
 	mov	w0, 65535
 	add	x19, x23, x21
 	ldrh	w1, [x19, 2]
 	cmp	w1, w0
-	bne	.L446
+	bne	.L449
 	ldr	x0, [x22]
 	cmp	x19, x0
-	beq	.L446
+	beq	.L449
 	mov	w2, 386
-	adrp	x1, .LANCHOR90
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR90
-	add	x0, x0, :lo12:.LC6
+	adrp	x1, .LANCHOR91
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR91
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L446:
+.L449:
 	ldr	x0, [x22]
 	mov	w1, 65535
 	cmp	x19, x0
 	ldrh	w0, [x23, x21]
-	bne	.L447
+	bne	.L450
 	cmp	w0, w1
-	bne	.L448
+	bne	.L451
 	str	xzr, [x22]
-.L449:
+.L452:
 	mov	w0, -1
 	strh	w0, [x23, x21]
 	strh	w0, [x19, 2]
@@ -3045,35 +3075,35 @@ List_remove_node:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L448:
-	ldr	x1, [x20, #:lo12:.LANCHOR81]
+.L451:
+	ldr	x1, [x20, #:lo12:.LANCHOR82]
 	mov	w2, 6
 	umaddl	x0, w0, w2, x1
 	mov	w1, -1
 	str	x0, [x22]
 	strh	w1, [x0, 2]
-	b	.L449
-.L447:
+	b	.L452
+.L450:
 	cmp	w0, w1
 	ldrh	w1, [x19, 2]
-	bne	.L450
+	bne	.L453
 	cmp	w1, w0
-	beq	.L449
+	beq	.L452
 	mov	w0, 6
 	mov	w2, -1
 	umull	x1, w1, w0
-	ldr	x0, [x20, #:lo12:.LANCHOR81]
+	ldr	x0, [x20, #:lo12:.LANCHOR82]
 	strh	w2, [x0, x1]
-	b	.L449
-.L450:
-	ldr	x2, [x20, #:lo12:.LANCHOR81]
+	b	.L452
+.L453:
+	ldr	x2, [x20, #:lo12:.LANCHOR82]
 	mov	w3, 6
 	umaddl	x4, w0, w3, x2
 	strh	w1, [x4, 2]
 	ldrh	w1, [x19, 2]
 	umull	x1, w1, w3
 	strh	w0, [x2, x1]
-	b	.L449
+	b	.L452
 	.size	List_remove_node, .-List_remove_node
 	.section	.text.List_pop_index_node,"ax",@progbits
 	.align	2
@@ -3081,18 +3111,18 @@ List_remove_node:
 	.type	List_pop_index_node, %function
 List_pop_index_node:
 	ldr	x2, [x0]
-	cbz	x2, .L458
+	cbz	x2, .L461
 	stp	x29, x30, [sp, -32]!
-	adrp	x3, .LANCHOR81
+	adrp	x3, .LANCHOR82
 	and	w1, w1, 65535
 	mov	w4, 65535
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	mov	w5, 6
-	ldr	x19, [x3, #:lo12:.LANCHOR81]
-.L454:
-	cbnz	w1, .L455
+	ldr	x19, [x3, #:lo12:.LANCHOR82]
 .L457:
+	cbnz	w1, .L458
+.L460:
 	sub	x19, x2, x19
 	mov	x2, -6148914691236517206
 	asr	x19, x19, 1
@@ -3105,15 +3135,15 @@ List_pop_index_node:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L455:
+.L458:
 	ldrh	w3, [x2]
 	cmp	w3, w4
-	beq	.L457
+	beq	.L460
 	sub	w1, w1, #1
 	umaddl	x2, w3, w5, x19
 	and	w1, w1, 65535
-	b	.L454
-.L458:
+	b	.L457
+.L461:
 	mov	w0, 65535
 	ret
 	.size	List_pop_index_node, .-List_pop_index_node
@@ -3123,28 +3153,28 @@ List_pop_index_node:
 	.type	List_get_gc_head_node, %function
 List_get_gc_head_node:
 	and	w2, w0, 65535
+	adrp	x0, .LANCHOR83
+	ldr	x1, [x0, #:lo12:.LANCHOR83]
+	cbz	x1, .L471
 	adrp	x0, .LANCHOR82
-	ldr	x1, [x0, #:lo12:.LANCHOR82]
-	cbz	x1, .L468
-	adrp	x0, .LANCHOR81
 	mov	w4, 6
-	ldr	x3, [x0, #:lo12:.LANCHOR81]
+	ldr	x3, [x0, #:lo12:.LANCHOR82]
 	mov	w0, 65535
-.L465:
-	cbz	w2, .L466
+.L468:
+	cbz	w2, .L469
 	ldrh	w1, [x1]
 	cmp	w1, w0
-	bne	.L467
+	bne	.L470
 	ret
-.L467:
+.L470:
 	sub	w2, w2, #1
 	umaddl	x1, w1, w4, x3
 	and	w2, w2, 65535
-	b	.L465
-.L468:
+	b	.L468
+.L471:
 	mov	w0, 65535
 	ret
-.L466:
+.L469:
 	sub	x0, x1, x3
 	mov	x1, -6148914691236517206
 	asr	x0, x0, 1
@@ -3162,35 +3192,35 @@ List_update_data_list:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w19, w0, 65535
-	adrp	x0, .LANCHOR91
+	adrp	x0, .LANCHOR92
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
-	stp	x25, x26, [sp, 64]
-	cmp	w0, w19
-	beq	.L471
-	adrp	x0, .LANCHOR92
 	ldrh	w0, [x0, #:lo12:.LANCHOR92]
+	stp	x25, x26, [sp, 64]
 	cmp	w0, w19
-	beq	.L471
+	beq	.L474
 	adrp	x0, .LANCHOR93
 	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w0, w19
-	beq	.L471
-	adrp	x0, .LANCHOR81
+	beq	.L474
+	adrp	x0, .LANCHOR94
+	ldrh	w0, [x0, #:lo12:.LANCHOR94]
+	cmp	w0, w19
+	beq	.L474
+	adrp	x0, .LANCHOR82
 	mov	w21, 6
-	adrp	x24, .LANCHOR82
+	adrp	x24, .LANCHOR83
 	mov	x26, x0
 	umull	x21, w19, w21
-	ldr	x23, [x0, #:lo12:.LANCHOR81]
-	ldr	x1, [x24, #:lo12:.LANCHOR82]
+	ldr	x23, [x0, #:lo12:.LANCHOR82]
+	ldr	x1, [x24, #:lo12:.LANCHOR83]
 	add	x22, x23, x21
 	cmp	x22, x1
-	beq	.L471
-	adrp	x1, .LANCHOR83
+	beq	.L474
+	adrp	x1, .LANCHOR84
 	ubfiz	x0, x19, 1, 16
 	mov	x25, x1
-	ldr	x2, [x1, #:lo12:.LANCHOR83]
+	ldr	x2, [x1, #:lo12:.LANCHOR84]
 	mov	w1, 65535
 	ldrh	w20, [x2, x0]
 	ldrh	w0, [x22, 4]
@@ -3199,70 +3229,70 @@ List_update_data_list:
 	ldrh	w0, [x22, 2]
 	csinv	w20, w20, wzr, ne
 	cmp	w0, w1
-	bne	.L474
+	bne	.L477
 	ldrh	w1, [x23, x21]
 	cmp	w1, w0
-	bne	.L474
+	bne	.L477
 	mov	w2, 504
-	adrp	x1, .LANCHOR94
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR94
-	add	x0, x0, :lo12:.LC6
+	adrp	x1, .LANCHOR95
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR95
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L474:
+.L477:
 	ldrh	w0, [x22, 2]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L475
+	bne	.L478
 	ldrh	w1, [x23, x21]
 	cmp	w1, w0
-	beq	.L471
-.L475:
+	beq	.L474
+.L478:
 	mov	w1, 6
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
 	umull	x0, w0, w1
 	asr	x1, x0, 1
 	mul	x1, x1, x2
-	ldr	x2, [x25, #:lo12:.LANCHOR83]
+	ldr	x2, [x25, #:lo12:.LANCHOR84]
 	ldrh	w1, [x2, x1, lsl 1]
-	ldr	x2, [x26, #:lo12:.LANCHOR81]
+	ldr	x2, [x26, #:lo12:.LANCHOR82]
 	add	x0, x2, x0
 	ldrh	w2, [x0, 4]
 	cmp	w2, 0
 	mul	w0, w1, w2
 	csinv	w0, w0, wzr, ne
 	cmp	w20, w0
-	bcs	.L471
-	adrp	x20, .LANCHOR85
+	bcs	.L474
+	adrp	x20, .LANCHOR86
 	mov	w1, w19
-	add	x0, x24, :lo12:.LANCHOR82
+	add	x0, x24, :lo12:.LANCHOR83
 	bl	List_remove_node
-	ldrh	w0, [x20, #:lo12:.LANCHOR85]
-	cbnz	w0, .L477
+	ldrh	w0, [x20, #:lo12:.LANCHOR86]
+	cbnz	w0, .L480
 	mov	w2, 515
-	adrp	x1, .LANCHOR94
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR94
-	add	x0, x0, :lo12:.LC6
+	adrp	x1, .LANCHOR95
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR95
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L477:
-	ldrh	w0, [x20, #:lo12:.LANCHOR85]
+.L480:
+	ldrh	w0, [x20, #:lo12:.LANCHOR86]
 	sub	w0, w0, #1
-	strh	w0, [x20, #:lo12:.LANCHOR85]
+	strh	w0, [x20, #:lo12:.LANCHOR86]
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-.L471:
+.L474:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -3284,27 +3314,27 @@ ftl_map_blk_alloc_new_blk:
 	mov	w20, 0
 	ldr	x0, [x0, 16]
 	str	x21, [sp, 32]
-.L482:
+.L485:
 	cmp	w20, w1
-	beq	.L486
+	beq	.L489
 	mov	x21, x0
 	ldrh	w2, [x0], 2
-	cbnz	w2, .L483
+	cbnz	w2, .L486
 	bl	FtlFreeSysBlkQueueOut
 	and	w1, w0, 65535
 	strh	w0, [x21]
 	sub	w2, w1, #1
 	mov	w0, 65533
 	cmp	w0, w2, uxth
-	bcs	.L484
-	adrp	x0, .LANCHOR75+6
-	ldrh	w2, [x0, #:lo12:.LANCHOR75+6]
-	adrp	x0, .LC9
-	add	x0, x0, :lo12:.LC9
+	bcs	.L487
+	adrp	x0, .LANCHOR76+6
+	ldrh	w2, [x0, #:lo12:.LANCHOR76+6]
+	adrp	x0, .LC8
+	add	x0, x0, :lo12:.LC8
 	bl	printf
-.L485:
-	b	.L485
-.L484:
+.L488:
+	b	.L488
+.L487:
 	ldr	w0, [x19, 48]
 	strh	wzr, [x19, 2]
 	add	w0, w0, 1
@@ -3313,31 +3343,31 @@ ftl_map_blk_alloc_new_blk:
 	strh	w20, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
-.L486:
+.L489:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L488
-	mov	w2, 627
-	adrp	x1, .LANCHOR95
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR95
-	add	x0, x0, :lo12:.LC6
+	bhi	.L491
+	mov	w2, 628
+	adrp	x1, .LANCHOR96
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR96
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L488:
+.L491:
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L483:
+.L486:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L482
+	b	.L485
 	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
 	.section	.text.select_l2p_ram_region,"ax",@progbits
 	.align	2
@@ -3345,128 +3375,128 @@ ftl_map_blk_alloc_new_blk:
 	.type	select_l2p_ram_region, %function
 select_l2p_ram_region:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR67
+	adrp	x0, .LANCHOR68
 	mov	x1, 0
 	mov	w3, 65535
 	add	x29, sp, 0
-	ldrh	w2, [x0, #:lo12:.LANCHOR67]
-	adrp	x0, .LANCHOR96
+	ldrh	w2, [x0, #:lo12:.LANCHOR68]
+	adrp	x0, .LANCHOR97
 	str	x19, [sp, 16]
-	ldr	x0, [x0, #:lo12:.LANCHOR96]
-.L491:
+	ldr	x0, [x0, #:lo12:.LANCHOR97]
+.L494:
 	and	w19, w1, 65535
 	cmp	w19, w2
-	bcc	.L493
+	bcc	.L496
 	add	x3, x0, 4
 	mov	w19, w2
 	mov	w5, -2147483648
 	mov	w1, 0
-.L494:
+.L497:
 	cmp	w1, w2
-	bne	.L496
+	bne	.L499
 	cmp	w19, w2
-	bcc	.L492
-	adrp	x1, .LANCHOR97
+	bcc	.L495
+	adrp	x1, .LANCHOR98
 	mov	w19, w2
 	mov	w3, -1
-	ldrh	w4, [x1, #:lo12:.LANCHOR97]
+	ldrh	w4, [x1, #:lo12:.LANCHOR98]
 	mov	w1, 0
-.L497:
+.L500:
 	cmp	w1, w2
-	bne	.L499
+	bne	.L502
 	cmp	w19, w1
-	bcc	.L492
-	mov	w2, 859
-	adrp	x1, .LANCHOR98
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR98
-	add	x0, x0, :lo12:.LC6
+	bcc	.L495
+	mov	w2, 863
+	adrp	x1, .LANCHOR99
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR99
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-	b	.L492
-.L493:
+	b	.L495
+.L496:
 	add	x1, x1, 1
 	add	x4, x0, x1, lsl 4
 	ldrh	w4, [x4, -16]
 	cmp	w4, w3
-	bne	.L491
-.L492:
+	bne	.L494
+.L495:
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L496:
+.L499:
 	ldr	w4, [x3]
-	tbnz	w4, #31, .L495
+	tbnz	w4, #31, .L498
 	cmp	w5, w4
-	bls	.L495
+	bls	.L498
 	mov	w5, w4
 	mov	w19, w1
-.L495:
+.L498:
 	add	w1, w1, 1
 	add	x3, x3, 16
 	and	w1, w1, 65535
-	b	.L494
-.L499:
+	b	.L497
+.L502:
 	ldr	w6, [x0, 4]
 	cmp	w3, w6
-	bls	.L498
+	bls	.L501
 	ldrh	w5, [x0]
 	cmp	w5, w4
 	csel	w3, w3, w6, eq
 	csel	w19, w19, w1, eq
-.L498:
+.L501:
 	add	w1, w1, 1
 	add	x0, x0, 16
 	and	w1, w1, 65535
-	b	.L497
+	b	.L500
 	.size	select_l2p_ram_region, .-select_l2p_ram_region
 	.section	.text.FtlUpdateVaildLpn,"ax",@progbits
 	.align	2
 	.global	FtlUpdateVaildLpn
 	.type	FtlUpdateVaildLpn, %function
 FtlUpdateVaildLpn:
-	adrp	x2, .LANCHOR99
+	adrp	x2, .LANCHOR100
 	mov	x3, x2
-	ldrh	w1, [x2, #:lo12:.LANCHOR99]
+	ldrh	w1, [x2, #:lo12:.LANCHOR100]
 	cmp	w1, 4
-	bhi	.L502
-	cbnz	w0, .L502
+	bhi	.L505
+	cbnz	w0, .L505
 	add	w1, w1, 1
-	strh	w1, [x2, #:lo12:.LANCHOR99]
+	strh	w1, [x2, #:lo12:.LANCHOR100]
 	ret
-.L502:
-	adrp	x1, .LANCHOR39
-	adrp	x0, .LANCHOR100
-	strh	wzr, [x3, #:lo12:.LANCHOR99]
+.L505:
+	adrp	x1, .LANCHOR40
+	adrp	x0, .LANCHOR101
+	strh	wzr, [x3, #:lo12:.LANCHOR100]
 	mov	w2, 0
-	ldrh	w5, [x1, #:lo12:.LANCHOR39]
-	adrp	x1, .LANCHOR83
-	str	wzr, [x0, #:lo12:.LANCHOR100]
+	ldrh	w5, [x1, #:lo12:.LANCHOR40]
+	adrp	x1, .LANCHOR84
+	str	wzr, [x0, #:lo12:.LANCHOR101]
 	mov	w3, 0
-	ldr	x6, [x1, #:lo12:.LANCHOR83]
+	ldr	x6, [x1, #:lo12:.LANCHOR84]
 	mov	w7, 65535
 	mov	x1, 0
-.L503:
+.L506:
 	cmp	w5, w1, uxth
-	bhi	.L505
-	cbz	w3, .L501
-	str	w2, [x0, #:lo12:.LANCHOR100]
-.L501:
+	bhi	.L508
+	cbz	w3, .L504
+	str	w2, [x0, #:lo12:.LANCHOR101]
+.L504:
 	ret
-.L505:
+.L508:
 	ldrh	w4, [x6, x1, lsl 1]
 	cmp	w4, w7
-	beq	.L504
+	beq	.L507
 	add	w2, w2, w4
 	mov	w3, 1
-.L504:
+.L507:
 	add	x1, x1, 1
-	b	.L503
+	b	.L506
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
 	.section	.text.ftl_set_blk_mode,"ax",@progbits
 	.align	2
@@ -3474,9 +3504,9 @@ FtlUpdateVaildLpn:
 	.type	ftl_set_blk_mode, %function
 ftl_set_blk_mode:
 	and	w0, w0, 65535
-	cbz	w1, .L512
-	b	ftl_set_blk_mode.part.9
-.L512:
+	cbz	w1, .L515
+	b	ftl_set_blk_mode.part.10
+.L515:
 	adrp	x1, .LANCHOR0
 	ubfx	x2, x0, 5, 11
 	lsl	x2, x2, 2
@@ -3512,51 +3542,51 @@ ftl_sb_update_avl_pages:
 	and	w2, w2, 65535
 	and	w6, w1, 65535
 	ubfiz	x4, x2, 1, 16
-	adrp	x1, .LANCHOR37
+	adrp	x1, .LANCHOR38
 	add	x4, x4, 16
 	strh	wzr, [x0, 4]
 	add	x4, x0, x4
-	ldrh	w3, [x1, #:lo12:.LANCHOR37]
+	ldrh	w3, [x1, #:lo12:.LANCHOR38]
 	mov	w1, 65535
-.L515:
+.L518:
 	cmp	w2, w3
-	bcc	.L517
-	adrp	x1, .LANCHOR52
+	bcc	.L520
+	adrp	x1, .LANCHOR53
 	ubfiz	x3, x3, 1, 16
 	add	x3, x3, 16
 	add	x2, x0, 16
-	ldrh	w1, [x1, #:lo12:.LANCHOR52]
+	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	add	x3, x0, x3
 	mov	w5, 65535
 	sub	w1, w1, #1
 	and	w1, w1, 65535
 	sub	w1, w1, w6
-.L518:
+.L521:
 	cmp	x2, x3
-	bne	.L520
+	bne	.L523
 	ret
-.L517:
+.L520:
 	ldrh	w5, [x4]
 	cmp	w5, w1
-	beq	.L516
+	beq	.L519
 	ldrh	w5, [x0, 4]
 	add	w5, w5, 1
 	strh	w5, [x0, 4]
-.L516:
+.L519:
 	add	w2, w2, 1
 	add	x4, x4, 2
 	and	w2, w2, 65535
-	b	.L515
-.L520:
+	b	.L518
+.L523:
 	ldrh	w4, [x2]
 	cmp	w4, w5
-	beq	.L519
+	beq	.L522
 	ldrh	w4, [x0, 4]
 	add	w4, w1, w4
 	strh	w4, [x0, 4]
-.L519:
+.L522:
 	add	x2, x2, 2
-	b	.L518
+	b	.L521
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
 	.section	.text.make_superblock,"ax",@progbits
 	.align	2
@@ -3568,78 +3598,78 @@ make_superblock:
 	ldrh	w1, [x0]
 	str	x19, [sp, 16]
 	mov	x19, x0
-	adrp	x0, .LANCHOR39
-	ldrh	w0, [x0, #:lo12:.LANCHOR39]
+	adrp	x0, .LANCHOR40
+	ldrh	w0, [x0, #:lo12:.LANCHOR40]
 	cmp	w1, w0
-	bcc	.L522
-	mov	w2, 2335
-	adrp	x1, .LANCHOR101
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR101
-	add	x0, x0, :lo12:.LC6
+	bcc	.L525
+	mov	w2, 2613
+	adrp	x1, .LANCHOR102
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR102
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L522:
-	adrp	x0, .LANCHOR37
-	adrp	x7, .LANCHOR46
+.L525:
+	adrp	x0, .LANCHOR38
+	adrp	x7, .LANCHOR47
 	add	x6, x19, 16
-	add	x7, x7, :lo12:.LANCHOR46
-	ldrh	w8, [x0, #:lo12:.LANCHOR37]
+	add	x7, x7, :lo12:.LANCHOR47
+	ldrh	w8, [x0, #:lo12:.LANCHOR38]
 	mov	x5, 0
 	strh	wzr, [x19, 4]
 	mov	w10, -1
 	strb	wzr, [x19, 7]
-.L523:
+.L526:
 	cmp	w8, w5, uxth
-	bhi	.L525
-	adrp	x1, .LANCHOR52
+	bhi	.L528
+	adrp	x1, .LANCHOR53
 	ldrb	w0, [x19, 7]
 	strb	wzr, [x19, 9]
-	ldrh	w1, [x1, #:lo12:.LANCHOR52]
+	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	mul	w0, w0, w1
 	strh	w0, [x19, 4]
 	adrp	x0, .LANCHOR28
 	ldr	w0, [x0, #:lo12:.LANCHOR28]
-	cbz	w0, .L526
-	adrp	x0, .LANCHOR78
+	cbz	w0, .L529
+	adrp	x0, .LANCHOR79
 	ldrh	w1, [x19]
-	ldr	x0, [x0, #:lo12:.LANCHOR78]
+	ldr	x0, [x0, #:lo12:.LANCHOR79]
 	ldrh	w0, [x0, x1, lsl 1]
-	cmp	w0, 59
-	bhi	.L526
+	cmp	w0, 79
+	bhi	.L529
 	mov	w0, 1
 	strb	w0, [x19, 9]
-.L526:
+.L529:
 	adrp	x0, .LANCHOR1
 	ldrb	w0, [x0, #:lo12:.LANCHOR1]
-	cbz	w0, .L527
+	cbz	w0, .L530
 	mov	w0, 1
 	strb	w0, [x19, 9]
-.L527:
+.L530:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L525:
+.L528:
 	ldrh	w1, [x19]
 	ldrb	w0, [x7, x5]
 	bl	V2P_block
 	mov	w4, w0
 	strh	w10, [x6]
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L524
+	cbnz	w0, .L527
 	strh	w4, [x6]
 	ldrb	w0, [x19, 7]
 	add	w0, w0, 1
 	strb	w0, [x19, 7]
-.L524:
+.L527:
 	add	x5, x5, 1
 	add	x6, x6, 2
-	b	.L523
+	b	.L526
 	.size	make_superblock, .-make_superblock
 	.section	.text.update_multiplier_value,"ax",@progbits
 	.align	2
@@ -3647,55 +3677,55 @@ make_superblock:
 	.type	update_multiplier_value, %function
 update_multiplier_value:
 	and	w6, w0, 65535
-	adrp	x0, .LANCHOR37
+	adrp	x0, .LANCHOR38
 	mov	x7, 0
-	adrp	x8, .LANCHOR46
-	ldrh	w10, [x0, #:lo12:.LANCHOR37]
-	adrp	x0, .LANCHOR52
+	adrp	x8, .LANCHOR47
+	ldrh	w10, [x0, #:lo12:.LANCHOR38]
+	adrp	x0, .LANCHOR53
 	mov	w5, 0
-	add	x8, x8, :lo12:.LANCHOR46
-	ldrh	w11, [x0, #:lo12:.LANCHOR52]
+	add	x8, x8, :lo12:.LANCHOR47
+	ldrh	w11, [x0, #:lo12:.LANCHOR53]
 	cmp	w10, w7, uxth
-	bhi	.L547
-	cbz	w5, .L545
+	bhi	.L550
+	cbz	w5, .L548
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.L546:
-	adrp	x0, .LANCHOR81
+.L549:
+	adrp	x0, .LANCHOR82
 	mov	w1, 6
-	ldr	x0, [x0, #:lo12:.LANCHOR81]
+	ldr	x0, [x0, #:lo12:.LANCHOR82]
 	umaddl	x6, w6, w1, x0
 	mov	w0, 0
 	strh	w5, [x6, 4]
 	ret
-.L540:
+.L543:
 	mov	w5, 0
-	b	.L539
-.L545:
+	b	.L542
+.L548:
 	mov	w5, 0
-	b	.L546
-.L547:
+	b	.L549
+.L550:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
-.L538:
+.L541:
 	ldrb	w0, [x8, x7]
 	mov	w1, w6
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L537
+	cbnz	w0, .L540
 	add	w5, w5, w11
 	and	w5, w5, 65535
-.L537:
+.L540:
 	add	x7, x7, 1
 	cmp	w10, w7, uxth
-	bhi	.L538
-	cbz	w5, .L540
+	bhi	.L541
+	cbz	w5, .L543
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.L539:
-	adrp	x0, .LANCHOR81
+.L542:
+	adrp	x0, .LANCHOR82
 	mov	w1, 6
-	ldr	x0, [x0, #:lo12:.LANCHOR81]
+	ldr	x0, [x0, #:lo12:.LANCHOR82]
 	umaddl	x6, w6, w1, x0
 	mov	w0, 0
 	strh	w5, [x6, 4]
@@ -3707,22 +3737,22 @@ update_multiplier_value:
 	.global	GetFreeBlockMinEraseCount
 	.type	GetFreeBlockMinEraseCount, %function
 GetFreeBlockMinEraseCount:
-	adrp	x0, .LANCHOR87
-	ldr	x0, [x0, #:lo12:.LANCHOR87]
-	cbz	x0, .L550
-	adrp	x1, .LANCHOR81
-	ldr	x1, [x1, #:lo12:.LANCHOR81]
+	adrp	x0, .LANCHOR88
+	ldr	x0, [x0, #:lo12:.LANCHOR88]
+	cbz	x0, .L553
+	adrp	x1, .LANCHOR82
+	ldr	x1, [x1, #:lo12:.LANCHOR82]
 	sub	x0, x0, x1
 	mov	x1, -6148914691236517206
 	asr	x0, x0, 1
 	movk	x1, 0xaaab, lsl 0
 	mul	x0, x0, x1
-	adrp	x1, .LANCHOR78
-	ldr	x1, [x1, #:lo12:.LANCHOR78]
+	adrp	x1, .LANCHOR79
+	ldr	x1, [x1, #:lo12:.LANCHOR79]
 	and	x0, x0, 65535
 	ldrh	w0, [x1, x0, lsl 1]
 	ret
-.L550:
+.L553:
 	mov	w0, 0
 	ret
 	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
@@ -3731,21 +3761,21 @@ GetFreeBlockMinEraseCount:
 	.global	GetFreeBlockMaxEraseCount
 	.type	GetFreeBlockMaxEraseCount, %function
 GetFreeBlockMaxEraseCount:
-	adrp	x1, .LANCHOR87
+	adrp	x1, .LANCHOR88
 	and	w0, w0, 65535
-	ldr	x1, [x1, #:lo12:.LANCHOR87]
-	cbz	x1, .L558
-	adrp	x2, .LANCHOR88
+	ldr	x1, [x1, #:lo12:.LANCHOR88]
+	cbz	x1, .L561
+	adrp	x2, .LANCHOR89
 	mov	w3, 7
 	mov	w5, 6
 	mov	w6, 65535
-	ldrh	w2, [x2, #:lo12:.LANCHOR88]
+	ldrh	w2, [x2, #:lo12:.LANCHOR89]
 	mul	w2, w2, w3
 	asr	w2, w2, 3
 	cmp	w0, w2
 	csel	w0, w2, w0, gt
-	adrp	x2, .LANCHOR81
-	ldr	x3, [x2, #:lo12:.LANCHOR81]
+	adrp	x2, .LANCHOR82
+	ldr	x3, [x2, #:lo12:.LANCHOR82]
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
 	sub	x1, x1, x3
@@ -3753,25 +3783,25 @@ GetFreeBlockMaxEraseCount:
 	mul	x1, x1, x2
 	mov	w2, 0
 	and	w1, w1, 65535
-.L554:
+.L557:
 	cmp	w0, w2
-	beq	.L557
+	beq	.L560
 	umull	x4, w1, w5
 	ldrh	w4, [x3, x4]
 	cmp	w4, w6
-	bne	.L555
-.L557:
-	adrp	x0, .LANCHOR78
+	bne	.L558
+.L560:
+	adrp	x0, .LANCHOR79
 	ubfiz	x1, x1, 1, 16
-	ldr	x0, [x0, #:lo12:.LANCHOR78]
+	ldr	x0, [x0, #:lo12:.LANCHOR79]
 	ldrh	w0, [x0, x1]
 	ret
-.L555:
+.L558:
 	add	w2, w2, 1
 	mov	w1, w4
 	and	w2, w2, 65535
-	b	.L554
-.L558:
+	b	.L557
+.L561:
 	mov	w0, 0
 	ret
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
@@ -3783,18 +3813,18 @@ free_data_superblock:
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L562
+	beq	.L565
 	stp	x29, x30, [sp, -16]!
-	adrp	x2, .LANCHOR83
+	adrp	x2, .LANCHOR84
 	ubfiz	x1, x0, 1, 16
 	add	x29, sp, 0
-	ldr	x2, [x2, #:lo12:.LANCHOR83]
+	ldr	x2, [x2, #:lo12:.LANCHOR84]
 	strh	wzr, [x2, x1]
 	bl	INSERT_FREE_LIST
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L562:
+.L565:
 	mov	w0, 0
 	ret
 	.size	free_data_superblock, .-free_data_superblock
@@ -3803,45 +3833,45 @@ free_data_superblock:
 	.global	FtlGcBufInit
 	.type	FtlGcBufInit, %function
 FtlGcBufInit:
-	adrp	x1, .LANCHOR103
-	adrp	x0, .LANCHOR102
-	adrp	x7, .LANCHOR104
-	adrp	x6, .LANCHOR105
-	ldr	x5, [x1, #:lo12:.LANCHOR103]
-	adrp	x1, .LANCHOR57
-	str	wzr, [x0, #:lo12:.LANCHOR102]
-	adrp	x0, .LANCHOR37
-	ldrh	w10, [x1, #:lo12:.LANCHOR57]
+	adrp	x1, .LANCHOR104
+	adrp	x0, .LANCHOR103
+	adrp	x7, .LANCHOR105
+	adrp	x6, .LANCHOR106
+	ldr	x5, [x1, #:lo12:.LANCHOR104]
 	adrp	x1, .LANCHOR58
-	ldrh	w0, [x0, #:lo12:.LANCHOR37]
+	str	wzr, [x0, #:lo12:.LANCHOR103]
+	adrp	x0, .LANCHOR38
+	ldrh	w10, [x1, #:lo12:.LANCHOR58]
+	adrp	x1, .LANCHOR59
+	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	mov	w8, 24
-	ldrh	w11, [x1, #:lo12:.LANCHOR58]
-	adrp	x1, .LANCHOR106
-	ldr	x14, [x7, #:lo12:.LANCHOR104]
+	ldrh	w11, [x1, #:lo12:.LANCHOR59]
+	adrp	x1, .LANCHOR107
+	ldr	x14, [x7, #:lo12:.LANCHOR105]
 	mov	x3, x5
-	ldr	x4, [x1, #:lo12:.LANCHOR106]
+	ldr	x4, [x1, #:lo12:.LANCHOR107]
 	mov	w2, 0
-	ldr	x15, [x6, #:lo12:.LANCHOR105]
+	ldr	x15, [x6, #:lo12:.LANCHOR106]
 	nop // between mem op and mult-accumulate
 	umaddl	x8, w0, w8, x5
 	add	x4, x4, 8
 	mov	w1, 0
 	mov	w16, 1
-.L566:
+.L569:
 	add	w13, w2, w10
 	add	w12, w1, w11
 	cmp	x3, x8
-	bne	.L567
-	adrp	x1, .LANCHOR107
-	ldr	x7, [x7, #:lo12:.LANCHOR104]
-	ldr	x6, [x6, #:lo12:.LANCHOR105]
+	bne	.L570
+	adrp	x1, .LANCHOR108
+	ldr	x7, [x7, #:lo12:.LANCHOR105]
+	ldr	x6, [x6, #:lo12:.LANCHOR106]
 	mov	w8, 24
-	ldr	w4, [x1, #:lo12:.LANCHOR107]
-.L568:
+	ldr	w4, [x1, #:lo12:.LANCHOR108]
+.L571:
 	cmp	w0, w4
-	bcc	.L569
+	bcc	.L572
 	ret
-.L567:
+.L570:
 	asr	w2, w2, 2
 	asr	w1, w1, 2
 	add	x2, x14, x2, sxtw 2
@@ -3853,8 +3883,8 @@ FtlGcBufInit:
 	add	x4, x4, 56
 	mov	w1, w12
 	mov	w2, w13
-	b	.L566
-.L569:
+	b	.L569
+.L572:
 	umull	x3, w0, w8
 	mul	w1, w10, w0
 	add	x2, x5, x3
@@ -3868,44 +3898,44 @@ FtlGcBufInit:
 	asr	w1, w1, 2
 	add	x1, x6, x1, sxtw 2
 	str	x1, [x2, 8]
-	b	.L568
+	b	.L571
 	.size	FtlGcBufInit, .-FtlGcBufInit
 	.section	.text.FtlGcBufFree,"ax",@progbits
 	.align	2
 	.global	FtlGcBufFree
 	.type	FtlGcBufFree, %function
 FtlGcBufFree:
-	adrp	x2, .LANCHOR107
+	adrp	x2, .LANCHOR108
 	mov	w3, 0
 	mov	w7, 56
 	mov	w10, 24
-	ldr	w8, [x2, #:lo12:.LANCHOR107]
-	adrp	x2, .LANCHOR103
-	ldr	x4, [x2, #:lo12:.LANCHOR103]
-.L571:
+	ldr	w8, [x2, #:lo12:.LANCHOR108]
+	adrp	x2, .LANCHOR104
+	ldr	x4, [x2, #:lo12:.LANCHOR104]
+.L574:
 	cmp	w3, w1
-	bcs	.L570
+	bcs	.L573
 	umaddl	x6, w3, w7, x0
 	mov	w2, 0
-	b	.L576
-.L572:
+	b	.L579
+.L575:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-.L576:
+.L579:
 	cmp	w2, w8
-	bcs	.L573
+	bcs	.L576
 	umull	x5, w2, w10
 	add	x11, x4, x5
 	ldr	x12, [x4, x5]
 	ldr	x5, [x6, 8]
 	cmp	x12, x5
-	bne	.L572
+	bne	.L575
 	str	wzr, [x11, 16]
-.L573:
+.L576:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L571
-.L570:
+	b	.L574
+.L573:
 	ret
 	.size	FtlGcBufFree, .-FtlGcBufFree
 	.section	.text.FtlGcBufAlloc,"ax",@progbits
@@ -3913,38 +3943,38 @@ FtlGcBufFree:
 	.global	FtlGcBufAlloc
 	.type	FtlGcBufAlloc, %function
 FtlGcBufAlloc:
-	adrp	x2, .LANCHOR107
+	adrp	x2, .LANCHOR108
 	mov	w3, 0
 	mov	w7, 24
 	mov	w8, 1
-	ldr	w5, [x2, #:lo12:.LANCHOR107]
-	adrp	x2, .LANCHOR103
+	ldr	w5, [x2, #:lo12:.LANCHOR108]
+	adrp	x2, .LANCHOR104
 	mov	w10, 56
-	ldr	x6, [x2, #:lo12:.LANCHOR103]
-.L578:
+	ldr	x6, [x2, #:lo12:.LANCHOR104]
+.L581:
 	cmp	w3, w1
-	bcs	.L577
+	bcs	.L580
 	mov	w2, 0
-	b	.L583
-.L579:
+	b	.L586
+.L582:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-.L583:
+.L586:
 	cmp	w2, w5
-	bcs	.L580
+	bcs	.L583
 	umaddl	x4, w2, w7, x6
 	ldr	w11, [x4, 16]
-	cbnz	w11, .L579
+	cbnz	w11, .L582
 	umaddl	x2, w3, w10, x0
 	ldr	x11, [x4]
 	str	w8, [x4, 16]
 	ldr	x4, [x4, 8]
 	stp	x11, x4, [x2, 8]
-.L580:
+.L583:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L578
-.L577:
+	b	.L581
+.L580:
 	ret
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
 	.section	.text.IsBlkInGcList,"ax",@progbits
@@ -3952,23 +3982,23 @@ FtlGcBufAlloc:
 	.global	IsBlkInGcList
 	.type	IsBlkInGcList, %function
 IsBlkInGcList:
-	adrp	x1, .LANCHOR108
-	and	w0, w0, 65535
-	ldrh	w2, [x1, #:lo12:.LANCHOR108]
 	adrp	x1, .LANCHOR109
-	ldr	x3, [x1, #:lo12:.LANCHOR109]
+	and	w0, w0, 65535
+	ldrh	w2, [x1, #:lo12:.LANCHOR109]
+	adrp	x1, .LANCHOR110
+	ldr	x3, [x1, #:lo12:.LANCHOR110]
 	mov	x1, 0
-.L585:
+.L588:
 	cmp	w2, w1, uxth
-	bhi	.L587
+	bhi	.L590
 	mov	w0, 0
 	ret
-.L587:
+.L590:
 	add	x1, x1, 1
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w0
-	bne	.L585
+	bne	.L588
 	mov	w0, 1
 	ret
 	.size	IsBlkInGcList, .-IsBlkInGcList
@@ -3985,40 +4015,40 @@ FtlGcUpdatePage:
 	add	x29, sp, 0
 	bl	P2V_block_in_plane
 	and	w7, w0, 65535
-	adrp	x4, .LANCHOR108
-	adrp	x2, .LANCHOR109
+	adrp	x4, .LANCHOR109
+	adrp	x2, .LANCHOR110
 	mov	x3, 0
-	ldrh	w1, [x4, #:lo12:.LANCHOR108]
-	ldr	x5, [x2, #:lo12:.LANCHOR109]
-.L590:
+	ldrh	w1, [x4, #:lo12:.LANCHOR109]
+	ldr	x5, [x2, #:lo12:.LANCHOR110]
+.L593:
 	and	w2, w3, 65535
 	cmp	w2, w1
-	bcc	.L592
-	bne	.L591
+	bcc	.L595
+	bne	.L594
 	and	x3, x3, 65535
 	strh	w0, [x5, x3, lsl 1]
-	ldrh	w0, [x4, #:lo12:.LANCHOR108]
+	ldrh	w0, [x4, #:lo12:.LANCHOR109]
 	add	w0, w0, 1
-	strh	w0, [x4, #:lo12:.LANCHOR108]
-	b	.L591
-.L592:
+	strh	w0, [x4, #:lo12:.LANCHOR109]
+	b	.L594
+.L595:
 	add	x3, x3, 1
 	add	x2, x5, x3, lsl 1
 	ldrh	w2, [x2, -2]
 	cmp	w2, w7
-	bne	.L590
-.L591:
-	adrp	x4, .LANCHOR110
-	adrp	x1, .LANCHOR111
+	bne	.L593
+.L594:
+	adrp	x4, .LANCHOR111
+	adrp	x1, .LANCHOR112
 	mov	w3, 12
-	ldrh	w0, [x4, #:lo12:.LANCHOR110]
-	ldr	x5, [x1, #:lo12:.LANCHOR111]
+	ldrh	w0, [x4, #:lo12:.LANCHOR111]
+	ldr	x5, [x1, #:lo12:.LANCHOR112]
 	umull	x3, w0, w3
 	add	w0, w0, 1
 	add	x7, x5, x3
 	stp	w10, w8, [x7, 4]
 	str	w6, [x5, x3]
-	strh	w0, [x4, #:lo12:.LANCHOR110]
+	strh	w0, [x4, #:lo12:.LANCHOR111]
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
@@ -4027,27 +4057,45 @@ FtlGcUpdatePage:
 	.global	FtlGcRefreshBlock
 	.type	FtlGcRefreshBlock, %function
 FtlGcRefreshBlock:
-	adrp	x4, .LANCHOR112
+	adrp	x8, .LANCHOR113
 	and	w0, w0, 65535
-	ldrh	w5, [x4, #:lo12:.LANCHOR112]
-	cmp	w5, w0
-	beq	.L595
-	adrp	x1, .LANCHOR113
-	ldrh	w3, [x1, #:lo12:.LANCHOR113]
+	ldrh	w10, [x8, #:lo12:.LANCHOR113]
+	cmp	w10, w0
+	beq	.L598
+	adrp	x6, .LANCHOR114
+	ldrh	w7, [x6, #:lo12:.LANCHOR114]
+	cmp	w0, w7
+	beq	.L598
+	adrp	x4, .LANCHOR115
+	ldrh	w5, [x4, #:lo12:.LANCHOR115]
+	cmp	w0, w5
+	beq	.L598
+	adrp	x2, .LANCHOR116
+	ldrh	w3, [x2, #:lo12:.LANCHOR116]
 	cmp	w0, w3
-	beq	.L595
-	mov	w2, 65535
-	cmp	w5, w2
-	bne	.L596
-	strh	w0, [x4, #:lo12:.LANCHOR112]
-.L595:
+	beq	.L598
+	mov	w1, 65535
+	cmp	w10, w1
+	bne	.L599
+	strh	w0, [x8, #:lo12:.LANCHOR113]
+.L598:
 	mov	w0, 0
 	ret
-.L596:
-	cmp	w3, w2
-	bne	.L595
-	strh	w0, [x1, #:lo12:.LANCHOR113]
-	b	.L595
+.L599:
+	cmp	w7, w1
+	bne	.L600
+	strh	w0, [x6, #:lo12:.LANCHOR114]
+	b	.L598
+.L600:
+	cmp	w5, w1
+	bne	.L601
+	strh	w0, [x4, #:lo12:.LANCHOR115]
+	b	.L598
+.L601:
+	cmp	w3, w1
+	bne	.L598
+	strh	w0, [x2, #:lo12:.LANCHOR116]
+	b	.L598
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
 	.section	.text.FtlGcRefreshOpenBlock,"ax",@progbits
 	.align	2
@@ -4061,48 +4109,48 @@ FtlGcRefreshOpenBlock:
 	.global	FtlGcMarkBadPhyBlk
 	.type	FtlGcMarkBadPhyBlk, %function
 FtlGcMarkBadPhyBlk:
-	and	w7, w0, 65535
+	and	w12, w0, 65535
 	stp	x29, x30, [sp, -16]!
-	mov	w0, w7
+	mov	w0, w12
 	add	x29, sp, 0
 	bl	P2V_block_in_plane
-	and	w6, w0, 65535
+	and	w11, w0, 65535
 	bl	FtlGcRefreshBlock
 	adrp	x0, .LANCHOR28
 	ldr	w0, [x0, #:lo12:.LANCHOR28]
-	cbz	w0, .L599
-	adrp	x1, .LANCHOR78
-	ubfiz	x0, x6, 1, 16
-	ldr	x2, [x1, #:lo12:.LANCHOR78]
+	cbz	w0, .L604
+	adrp	x1, .LANCHOR79
+	ubfiz	x0, x11, 1, 16
+	ldr	x2, [x1, #:lo12:.LANCHOR79]
 	ldrh	w1, [x2, x0]
-	cmp	w1, 29
-	bls	.L599
-	sub	w1, w1, #30
+	cmp	w1, 39
+	bls	.L604
+	sub	w1, w1, #40
 	strh	w1, [x2, x0]
-.L599:
-	adrp	x1, .LANCHOR114
-	adrp	x3, .LANCHOR115
-	add	x3, x3, :lo12:.LANCHOR115
+.L604:
+	adrp	x1, .LANCHOR117
+	adrp	x3, .LANCHOR118
+	add	x3, x3, :lo12:.LANCHOR118
 	mov	x2, 0
-	ldrh	w0, [x1, #:lo12:.LANCHOR114]
-.L600:
+	ldrh	w0, [x1, #:lo12:.LANCHOR117]
+.L605:
 	cmp	w0, w2, uxth
-	bhi	.L602
+	bhi	.L607
 	cmp	w0, 15
-	bhi	.L601
+	bhi	.L606
 	add	w2, w0, 1
-	strh	w2, [x1, #:lo12:.LANCHOR114]
-	adrp	x1, .LANCHOR115
-	add	x1, x1, :lo12:.LANCHOR115
-	strh	w7, [x1, w0, sxtw 1]
-	b	.L601
-.L602:
+	strh	w2, [x1, #:lo12:.LANCHOR117]
+	adrp	x1, .LANCHOR118
+	add	x1, x1, :lo12:.LANCHOR118
+	strh	w12, [x1, w0, sxtw 1]
+	b	.L606
+.L607:
 	add	x2, x2, 1
 	add	x4, x3, x2, lsl 1
 	ldrh	w4, [x4, -2]
-	cmp	w4, w7
-	bne	.L600
-.L601:
+	cmp	w4, w12
+	bne	.L605
+.L606:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
@@ -4112,38 +4160,93 @@ FtlGcMarkBadPhyBlk:
 	.global	FtlGcReFreshBadBlk
 	.type	FtlGcReFreshBadBlk, %function
 FtlGcReFreshBadBlk:
-	adrp	x0, .LANCHOR114
-	ldrh	w0, [x0, #:lo12:.LANCHOR114]
-	cbz	w0, .L614
-	adrp	x1, .LANCHOR112
-	ldrh	w2, [x1, #:lo12:.LANCHOR112]
+	adrp	x0, .LANCHOR117
+	ldrh	w0, [x0, #:lo12:.LANCHOR117]
+	cbz	w0, .L619
+	adrp	x1, .LANCHOR113
+	ldrh	w2, [x1, #:lo12:.LANCHOR113]
 	mov	w1, 65535
 	cmp	w2, w1
-	bne	.L614
+	bne	.L619
 	stp	x29, x30, [sp, -16]!
-	adrp	x6, .LANCHOR116
+	adrp	x11, .LANCHOR119
 	add	x29, sp, 0
-	ldrh	w1, [x6, #:lo12:.LANCHOR116]
+	ldrh	w1, [x11, #:lo12:.LANCHOR119]
 	cmp	w1, w0
-	bcc	.L609
-	strh	wzr, [x6, #:lo12:.LANCHOR116]
-.L609:
-	ldrh	w1, [x6, #:lo12:.LANCHOR116]
-	adrp	x0, .LANCHOR115
-	add	x0, x0, :lo12:.LANCHOR115
+	bcc	.L614
+	strh	wzr, [x11, #:lo12:.LANCHOR119]
+.L614:
+	ldrh	w1, [x11, #:lo12:.LANCHOR119]
+	adrp	x0, .LANCHOR118
+	add	x0, x0, :lo12:.LANCHOR118
 	ldrh	w0, [x0, x1, lsl 1]
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-	ldrh	w0, [x6, #:lo12:.LANCHOR116]
+	ldrh	w0, [x11, #:lo12:.LANCHOR119]
 	ldp	x29, x30, [sp], 16
 	add	w0, w0, 1
-	strh	w0, [x6, #:lo12:.LANCHOR116]
+	strh	w0, [x11, #:lo12:.LANCHOR119]
 	mov	w0, 0
 	ret
-.L614:
+.L619:
 	mov	w0, 0
 	ret
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
+	.section	.text.flash_boot_enter_slc_mode,"ax",@progbits
+	.align	2
+	.global	flash_boot_enter_slc_mode
+	.type	flash_boot_enter_slc_mode, %function
+flash_boot_enter_slc_mode:
+	adrp	x1, .LANCHOR29
+	and	w0, w0, 255
+	ldr	w2, [x1, #:lo12:.LANCHOR29]
+	mov	w1, 12336
+	movk	w1, 0x5638, lsl 16
+	cmp	w2, w1
+	bne	.L622
+	b	flash_enter_slc_mode
+.L622:
+	ret
+	.size	flash_boot_enter_slc_mode, .-flash_boot_enter_slc_mode
+	.section	.text.flash_boot_exit_slc_mode,"ax",@progbits
+	.align	2
+	.global	flash_boot_exit_slc_mode
+	.type	flash_boot_exit_slc_mode, %function
+flash_boot_exit_slc_mode:
+	adrp	x1, .LANCHOR29
+	and	w0, w0, 255
+	ldr	w2, [x1, #:lo12:.LANCHOR29]
+	mov	w1, 12336
+	movk	w1, 0x5638, lsl 16
+	cmp	w2, w1
+	bne	.L624
+	b	flash_exit_slc_mode
+.L624:
+	ret
+	.size	flash_boot_exit_slc_mode, .-flash_boot_exit_slc_mode
+	.section	.text.FW_FlashBlockErase.constprop.41,"ax",@progbits
+	.align	2
+	.type	FW_FlashBlockErase.constprop.41, %function
+FW_FlashBlockErase.constprop.41:
+	stp	x29, x30, [sp, -16]!
+	mov	w4, w0
+	adrp	x0, .LANCHOR18
+	add	x29, sp, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR18]
+	ldrb	w3, [x0, 9]
+	mov	w0, 0
+	bl	flash_boot_enter_slc_mode
+	udiv	w1, w4, w3
+	mov	w2, 0
+	mov	w0, 0
+	bl	FlashEraseBlock
+	mov	w3, w0
+	mov	w0, 0
+	bl	flash_boot_exit_slc_mode
+	and	w0, w3, 255
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	FW_FlashBlockErase.constprop.41, .-FW_FlashBlockErase.constprop.41
 	.section	.text.ftl_memset,"ax",@progbits
 	.align	2
 	.global	ftl_memset
@@ -4161,18 +4264,18 @@ BuildFlashLsbPageTable:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w20, w1
-	cbnz	w0, .L619
+	cbnz	w0, .L630
 	adrp	x1, .LANCHOR16
 	add	x1, x1, :lo12:.LANCHOR16
 	mov	x0, 0
-.L620:
+.L631:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 256
-	bne	.L620
-.L626:
-	adrp	x19, .LANCHOR117
-	add	x19, x19, :lo12:.LANCHOR117
+	bne	.L631
+.L637:
+	adrp	x19, .LANCHOR120
+	add	x19, x19, :lo12:.LANCHOR120
 	mov	w1, 255
 	mov	w2, 1024
 	mov	x0, x19
@@ -4181,41 +4284,41 @@ BuildFlashLsbPageTable:
 	and	w20, w20, 65535
 	add	x1, x1, :lo12:.LANCHOR16
 	mov	x0, 0
-.L621:
+.L632:
 	cmp	w20, w0, uxth
-	bhi	.L643
+	bhi	.L654
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L619:
+.L630:
 	cmp	w0, 1
-	bne	.L622
+	bne	.L633
 	adrp	x2, .LANCHOR16
 	add	x2, x2, :lo12:.LANCHOR16
 	mov	x1, 0
-.L625:
+.L636:
 	and	w0, w1, 65535
 	cmp	x1, 3
-	bls	.L623
+	bls	.L634
 	ubfiz	w3, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 2
 	sub	w0, w3, w0
 	and	w0, w0, 65535
-.L623:
+.L634:
 	strh	w0, [x2, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L625
-	b	.L626
-.L622:
+	bne	.L636
+	b	.L637
+.L633:
 	cmp	w0, 2
-	bne	.L627
+	bne	.L638
 	adrp	x2, .LANCHOR16
 	add	x2, x2, :lo12:.LANCHOR16
 	mov	w1, 65535
 	mov	x0, 0
-.L629:
+.L640:
 	cmp	x0, 2
 	and	w3, w0, 65535
 	csel	w3, w3, w1, cc
@@ -4224,32 +4327,32 @@ BuildFlashLsbPageTable:
 	add	x0, x0, 1
 	and	w1, w1, 65535
 	cmp	x0, 256
-	bne	.L629
-	b	.L626
-.L627:
+	bne	.L640
+	b	.L637
+.L638:
 	cmp	w0, 3
-	bne	.L630
+	bne	.L641
 	adrp	x2, .LANCHOR16
 	add	x2, x2, :lo12:.LANCHOR16
 	mov	x1, 0
-.L633:
+.L644:
 	and	w0, w1, 65535
 	cmp	x1, 5
-	bls	.L631
+	bls	.L642
 	ubfiz	w3, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 4
 	sub	w0, w3, w0
 	and	w0, w0, 65535
-.L631:
+.L642:
 	strh	w0, [x2, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L633
-	b	.L626
-.L630:
+	bne	.L644
+	b	.L637
+.L641:
 	cmp	w0, 4
-	bne	.L634
+	bne	.L645
 	adrp	x2, .LANCHOR16
 	add	x1, x2, :lo12:.LANCHOR16
 	add	x1, x1, 16
@@ -4268,7 +4371,7 @@ BuildFlashLsbPageTable:
 	strh	w2, [x1, -10]
 	strh	w0, [x1, -2]
 	mov	w0, 8
-.L636:
+.L647:
 	and	w3, w0, 1
 	ubfiz	w2, w0, 1, 15
 	add	w3, w3, 6
@@ -4277,57 +4380,57 @@ BuildFlashLsbPageTable:
 	strh	w2, [x1], 2
 	and	w0, w0, 65535
 	cmp	w0, 256
-	bne	.L636
-	b	.L626
-.L634:
+	bne	.L647
+	b	.L637
+.L645:
 	cmp	w0, 5
-	bne	.L637
+	bne	.L648
 	adrp	x1, .LANCHOR16
 	add	x1, x1, :lo12:.LANCHOR16
 	mov	x0, 0
-.L638:
+.L649:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 16
-	bne	.L638
+	bne	.L649
 	add	x1, x1, 32
-.L639:
+.L650:
 	strh	w0, [x1], 2
 	add	w0, w0, 2
 	and	w0, w0, 65535
 	cmp	w0, 496
-	bne	.L639
-	b	.L626
-.L637:
+	bne	.L650
+	b	.L637
+.L648:
 	cmp	w0, 6
-	bne	.L626
+	bne	.L637
 	adrp	x3, .LANCHOR16
 	add	x3, x3, :lo12:.LANCHOR16
 	mov	w1, 0
 	mov	x2, 0
 	mov	w4, 12
 	mov	w5, 10
-.L642:
+.L653:
 	and	w0, w2, 65535
 	cmp	x2, 5
-	bls	.L640
+	bls	.L651
 	tst	x0, 1
 	csel	w0, w4, w5, ne
 	sub	w0, w1, w0
 	and	w0, w0, 65535
-.L640:
+.L651:
 	strh	w0, [x3, x2, lsl 1]
 	add	w1, w1, 3
 	and	w1, w1, 65535
 	add	x2, x2, 1
 	cmp	w1, 768
-	bne	.L642
-	b	.L626
-.L643:
+	bne	.L653
+	b	.L637
+.L654:
 	ldrh	w2, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	strh	w2, [x19, w2, sxtw 1]
-	b	.L621
+	b	.L632
 	.size	BuildFlashLsbPageTable, .-BuildFlashLsbPageTable
 	.section	.text.FlashDieInfoInit,"ax",@progbits
 	.align	2
@@ -4335,22 +4438,22 @@ BuildFlashLsbPageTable:
 	.type	FlashDieInfoInit, %function
 FlashDieInfoInit:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR30+10
+	adrp	x0, .LANCHOR31+10
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR25
-	adrp	x20, .LANCHOR118
+	adrp	x20, .LANCHOR121
 	stp	x23, x24, [sp, 48]
-	ldrh	w0, [x0, #:lo12:.LANCHOR30+10]
+	ldrh	w0, [x0, #:lo12:.LANCHOR31+10]
 	adrp	x23, .LANCHOR3
 	stp	x21, x22, [sp, 32]
 	strb	wzr, [x19, #:lo12:.LANCHOR25]
 	cmp	w0, 256
-	strb	wzr, [x20, #:lo12:.LANCHOR118]
+	strb	wzr, [x20, #:lo12:.LANCHOR121]
 	str	x25, [sp, 64]
-	bls	.L659
+	bls	.L670
 	mov	w0, 512
-.L676:
+.L687:
 	adrp	x25, .LANCHOR26
 	add	x22, x25, :lo12:.LANCHOR26
 	str	w0, [x23, #:lo12:.LANCHOR3]
@@ -4377,27 +4480,27 @@ FlashDieInfoInit:
 	mov	x8, 0
 	add	x10, x7, 1
 	ldrb	w11, [x7]
-.L663:
+.L674:
 	mov	w2, w11
 	add	x1, x15, x8, lsl 3
 	mov	x0, x10
 	bl	FlashMemCmp8
-	cbnz	w0, .L662
+	cbnz	w0, .L673
 	ldrb	w1, [x14]
 	add	w0, w1, 1
 	strb	w0, [x14]
 	str	wzr, [x21, x1, lsl 2]
 	strb	w8, [x22, x1]
-.L662:
+.L673:
 	add	x8, x8, 1
 	cmp	x8, 4
-	bne	.L663
+	bne	.L674
 	ldrb	w0, [x19, #:lo12:.LANCHOR25]
-	strb	w0, [x20, #:lo12:.LANCHOR118]
+	strb	w0, [x20, #:lo12:.LANCHOR121]
 	ldrb	w0, [x7, 8]
 	cmp	w0, 2
-	beq	.L664
-.L668:
+	beq	.L675
+.L679:
 	ldrb	w0, [x19, #:lo12:.LANCHOR25]
 	ldrh	w1, [x7, 14]
 	ldp	x19, x20, [sp, 16]
@@ -4407,28 +4510,28 @@ FlashDieInfoInit:
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	mul	w0, w0, w1
-	adrp	x1, .LANCHOR119
+	adrp	x1, .LANCHOR122
 	ldp	x29, x30, [sp], 80
-	strh	w0, [x1, #:lo12:.LANCHOR119]
+	strh	w0, [x1, #:lo12:.LANCHOR122]
 	ret
-.L659:
+.L670:
 	cmp	w0, 128
-	bls	.L676
+	bls	.L687
 	mov	w0, 256
-	b	.L676
-.L664:
+	b	.L687
+.L675:
 	ldr	w20, [x23, #:lo12:.LANCHOR3]
 	add	x12, x12, :lo12:.LANCHOR22
 	add	x14, x19, :lo12:.LANCHOR25
 	add	x24, x24, :lo12:.LANCHOR17
 	add	x13, x25, :lo12:.LANCHOR26
 	mov	x15, 0
-.L667:
+.L678:
 	mov	w2, w11
 	add	x1, x12, x15, lsl 3
 	mov	x0, x10
 	bl	FlashMemCmp8
-	cbnz	w0, .L665
+	cbnz	w0, .L676
 	ldrb	w2, [x7, 13]
 	ldrh	w0, [x7, 14]
 	ldrb	w1, [x14]
@@ -4438,18 +4541,18 @@ FlashDieInfoInit:
 	sxtw	x2, w1
 	str	w0, [x24, x2, lsl 2]
 	ldrb	w3, [x7, 23]
-	cbz	w3, .L666
+	cbz	w3, .L677
 	lsl	w0, w0, 1
 	str	w0, [x24, x2, lsl 2]
-.L666:
+.L677:
 	add	w1, w1, 1
 	strb	w15, [x13, x2]
 	strb	w1, [x14]
-.L665:
+.L676:
 	add	x15, x15, 1
 	cmp	x15, 4
-	bne	.L667
-	b	.L668
+	bne	.L678
+	b	.L679
 	.size	FlashDieInfoInit, .-FlashDieInfoInit
 	.section	.text.ReadFlashInfo,"ax",@progbits
 	.align	2
@@ -4464,7 +4567,7 @@ ReadFlashInfo:
 	mov	x19, x0
 	bl	ftl_memset
 	adrp	x0, .LANCHOR18
-	adrp	x3, .LANCHOR68
+	adrp	x3, .LANCHOR69
 	mov	w4, 1
 	ldr	x1, [x0, #:lo12:.LANCHOR18]
 	adrp	x0, .LANCHOR3
@@ -4474,11 +4577,11 @@ ReadFlashInfo:
 	strb	w0, [x19, 4]
 	ubfx	x0, x0, 8, 8
 	strb	w0, [x19, 5]
-	adrp	x0, .LANCHOR32
-	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	adrp	x0, .LANCHOR33
+	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	strb	w0, [x19, 7]
-	add	x0, x3, :lo12:.LANCHOR68
-	ldrb	w3, [x3, #:lo12:.LANCHOR68]
+	add	x0, x3, :lo12:.LANCHOR69
+	ldrb	w3, [x3, #:lo12:.LANCHOR69]
 	strb	w3, [x19]
 	ldrb	w3, [x0, 1]
 	strb	w3, [x19, 1]
@@ -4497,20 +4600,20 @@ ReadFlashInfo:
 	adrp	x0, .LANCHOR25
 	strb	wzr, [x19, 10]
 	ldrb	w3, [x0, #:lo12:.LANCHOR25]
-.L678:
+.L689:
 	cmp	w3, w1, uxtb
-	bhi	.L679
+	bhi	.L690
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L679:
+.L690:
 	ldrb	w0, [x1, x2]
 	add	x1, x1, 1
 	ldrb	w5, [x19, 10]
 	lsl	w0, w4, w0
 	orr	w0, w0, w5
 	strb	w0, [x19, 10]
-	b	.L678
+	b	.L689
 	.size	ReadFlashInfo, .-ReadFlashInfo
 	.section	.text.FtlBbt2Bitmap,"ax",@progbits
 	.align	2
@@ -4521,13 +4624,13 @@ FtlBbt2Bitmap:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	mov	x21, x0
-	adrp	x0, .LANCHOR120
+	adrp	x0, .LANCHOR123
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR50
-	adrp	x23, .LANCHOR121
-	ldrh	w2, [x0, #:lo12:.LANCHOR120]
-	add	x22, x22, :lo12:.LANCHOR50
-	add	x23, x23, :lo12:.LANCHOR121
+	adrp	x22, .LANCHOR51
+	adrp	x23, .LANCHOR124
+	ldrh	w2, [x0, #:lo12:.LANCHOR123]
+	add	x22, x22, :lo12:.LANCHOR51
+	add	x23, x23, :lo12:.LANCHOR124
 	stp	x19, x20, [sp, 16]
 	mov	w24, 65535
 	mov	x19, 0
@@ -4536,24 +4639,24 @@ FtlBbt2Bitmap:
 	mov	w1, 0
 	mov	x0, x20
 	bl	ftl_memset
-.L684:
+.L695:
 	ldrh	w0, [x21, x19]
 	cmp	w0, w24
-	beq	.L681
+	beq	.L692
 	ldrh	w1, [x22]
 	cmp	w1, w0
-	bhi	.L683
+	bhi	.L694
 	mov	w2, 79
 	mov	x1, x23
-	adrp	x0, .LC6
-	add	x0, x0, :lo12:.LC6
+	adrp	x0, .LC5
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L683:
+.L694:
 	ldrh	w1, [x21, x19]
 	mov	w2, 1
 	add	x19, x19, 2
@@ -4565,8 +4668,8 @@ FtlBbt2Bitmap:
 	ldr	w1, [x20, x0]
 	orr	w1, w1, w2
 	str	w1, [x20, x0]
-	bne	.L684
-.L681:
+	bne	.L695
+.L692:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -4578,11 +4681,11 @@ FtlBbt2Bitmap:
 	.global	FtlBbtMemInit
 	.type	FtlBbtMemInit, %function
 FtlBbtMemInit:
-	adrp	x1, .LANCHOR74
-	add	x0, x1, :lo12:.LANCHOR74
+	adrp	x1, .LANCHOR75
+	add	x0, x1, :lo12:.LANCHOR75
 	mov	w2, -1
 	add	x0, x0, 12
-	strh	w2, [x1, #:lo12:.LANCHOR74]
+	strh	w2, [x1, #:lo12:.LANCHOR75]
 	mov	w2, 16
 	strh	wzr, [x0, -6]
 	mov	w1, 255
@@ -4594,11 +4697,11 @@ FtlBbtMemInit:
 	.type	FtlFreeSysBlkQueueInit, %function
 FtlFreeSysBlkQueueInit:
 	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR75
-	add	x3, x1, :lo12:.LANCHOR75
+	adrp	x1, .LANCHOR76
+	add	x3, x1, :lo12:.LANCHOR76
 	mov	w2, 2048
 	add	x29, sp, 0
-	strh	w0, [x1, #:lo12:.LANCHOR75]
+	strh	w0, [x1, #:lo12:.LANCHOR76]
 	mov	w1, 0
 	strh	wzr, [x3, 2]
 	add	x0, x3, 8
@@ -4629,19 +4732,19 @@ ftl_free_no_use_map_blk:
 	mov	x0, x21
 	bl	ftl_memset
 	mov	w0, 0
-.L692:
+.L703:
 	ldrh	w1, [x19, 6]
 	cmp	w1, w0
-	bhi	.L696
+	bhi	.L707
 	ldrh	w26, [x21]
-	adrp	x24, .LANCHOR53
-	add	x24, x24, :lo12:.LANCHOR53
+	adrp	x24, .LANCHOR54
+	add	x24, x24, :lo12:.LANCHOR54
 	mov	w25, 0
 	mov	w20, 0
-.L697:
+.L708:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L701
+	bhi	.L712
 	mov	w0, w25
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -4649,61 +4752,61 @@ ftl_free_no_use_map_blk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L696:
+.L707:
 	ubfiz	x1, x0, 2, 16
 	ldr	w2, [x20, x1]
 	mov	w1, 0
 	ubfx	x2, x2, 10, 16
-.L693:
+.L704:
 	ldrh	w3, [x19, 10]
 	cmp	w3, w1
-	bhi	.L695
+	bhi	.L706
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L692
-.L695:
+	b	.L703
+.L706:
 	ubfiz	x3, x1, 1, 16
 	ldrh	w4, [x23, x3]
 	cmp	w4, w2
-	bne	.L694
+	bne	.L705
 	ldrh	w4, [x21, x3]
 	add	w4, w4, 1
 	strh	w4, [x21, x3]
-.L694:
+.L705:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L693
-.L701:
+	b	.L704
+.L712:
 	ldrh	w0, [x19]
 	uxtw	x22, w20
 	cmp	w0, w20
-	bne	.L698
+	bne	.L709
 	ldrh	w0, [x24]
 	ldrh	w1, [x19, 2]
 	cmp	w1, w0
-	bcs	.L698
+	bcs	.L709
 	strh	w0, [x21, x22, lsl 1]
-.L698:
+.L709:
 	lsl	x22, x22, 1
 	ldrh	w0, [x21, x22]
 	cmp	w26, w0
-	bls	.L699
+	bls	.L710
 	mov	w25, w20
 	mov	w26, w0
-.L699:
-	cbnz	w0, .L700
+.L710:
+	cbnz	w0, .L711
 	ldrh	w0, [x23, x22]
-	cbz	w0, .L700
+	cbz	w0, .L711
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
 	strh	wzr, [x23, x22]
 	ldrh	w0, [x19, 8]
 	sub	w0, w0, #1
 	strh	w0, [x19, 8]
-.L700:
+.L711:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L697
+	b	.L708
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.section	.text.FtlL2PDataInit,"ax",@progbits
 	.align	2
@@ -4714,67 +4817,67 @@ FtlL2PDataInit:
 	mov	w1, 0
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR122
-	adrp	x20, .LANCHOR64
+	adrp	x19, .LANCHOR125
+	adrp	x20, .LANCHOR65
 	stp	x21, x22, [sp, 32]
-	ldr	x0, [x19, #:lo12:.LANCHOR122]
-	adrp	x22, .LANCHOR57
-	ldr	w2, [x20, #:lo12:.LANCHOR64]
-	adrp	x21, .LANCHOR67
+	ldr	x0, [x19, #:lo12:.LANCHOR125]
+	adrp	x22, .LANCHOR58
+	ldr	w2, [x20, #:lo12:.LANCHOR65]
+	adrp	x21, .LANCHOR68
 	str	x23, [sp, 48]
-	adrp	x23, .LANCHOR123
+	adrp	x23, .LANCHOR126
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	ldrh	w0, [x21, #:lo12:.LANCHOR67]
+	ldrh	w0, [x21, #:lo12:.LANCHOR68]
 	mov	w1, 255
-	ldrh	w2, [x22, #:lo12:.LANCHOR57]
+	ldrh	w2, [x22, #:lo12:.LANCHOR58]
 	mul	w2, w2, w0
-	ldr	x0, [x23, #:lo12:.LANCHOR123]
+	ldr	x0, [x23, #:lo12:.LANCHOR126]
 	bl	ftl_memset
-	adrp	x0, .LANCHOR96
-	ldrh	w3, [x21, #:lo12:.LANCHOR67]
-	ldr	x6, [x23, #:lo12:.LANCHOR123]
+	adrp	x0, .LANCHOR97
+	ldrh	w3, [x21, #:lo12:.LANCHOR68]
+	ldr	x6, [x23, #:lo12:.LANCHOR126]
 	mov	x1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR96]
+	ldr	x0, [x0, #:lo12:.LANCHOR97]
 	mov	w2, -1
-	ldrh	w5, [x22, #:lo12:.LANCHOR57]
+	ldrh	w5, [x22, #:lo12:.LANCHOR58]
 	add	x3, x0, x3, lsl 4
-.L707:
+.L718:
 	add	x4, x1, x5
 	cmp	x0, x3
-	bne	.L708
-	adrp	x1, .LANCHOR124
-	add	x0, x1, :lo12:.LANCHOR124
+	bne	.L719
+	adrp	x1, .LANCHOR127
+	add	x0, x1, :lo12:.LANCHOR127
 	ldp	x21, x22, [sp, 32]
-	strh	w2, [x1, #:lo12:.LANCHOR124]
-	ldr	w1, [x20, #:lo12:.LANCHOR64]
+	strh	w2, [x1, #:lo12:.LANCHOR127]
+	ldr	w1, [x20, #:lo12:.LANCHOR65]
 	strh	w1, [x0, 10]
 	mov	w1, -3902
 	strh	w1, [x0, 4]
-	adrp	x1, .LANCHOR125
+	adrp	x1, .LANCHOR128
 	ldr	x23, [sp, 48]
 	strh	w2, [x0, 2]
-	ldrh	w1, [x1, #:lo12:.LANCHOR125]
+	ldrh	w1, [x1, #:lo12:.LANCHOR128]
 	strh	w1, [x0, 8]
-	adrp	x1, .LANCHOR66
+	adrp	x1, .LANCHOR67
 	strh	w2, [x0, 60]
-	ldrh	w1, [x1, #:lo12:.LANCHOR66]
+	ldrh	w1, [x1, #:lo12:.LANCHOR67]
 	strh	w1, [x0, 6]
-	adrp	x1, .LANCHOR126
-	ldr	x1, [x1, #:lo12:.LANCHOR126]
+	adrp	x1, .LANCHOR129
+	ldr	x1, [x1, #:lo12:.LANCHOR129]
 	str	x1, [x0, 16]
-	adrp	x1, .LANCHOR127
-	ldr	x1, [x1, #:lo12:.LANCHOR127]
+	adrp	x1, .LANCHOR130
+	ldr	x1, [x1, #:lo12:.LANCHOR130]
 	str	x1, [x0, 24]
-	ldr	x1, [x19, #:lo12:.LANCHOR122]
+	ldr	x1, [x19, #:lo12:.LANCHOR125]
 	ldp	x19, x20, [sp, 16]
 	str	x1, [x0, 32]
-	adrp	x1, .LANCHOR128
-	ldr	x1, [x1, #:lo12:.LANCHOR128]
+	adrp	x1, .LANCHOR131
+	ldr	x1, [x1, #:lo12:.LANCHOR131]
 	str	x1, [x0, 40]
 	ldp	x29, x30, [sp], 64
 	ret
-.L708:
+.L719:
 	and	x1, x1, -4
 	strh	w2, [x0]
 	add	x1, x6, x1
@@ -4782,7 +4885,7 @@ FtlL2PDataInit:
 	str	x1, [x0, 8]
 	add	x0, x0, 16
 	mov	x1, x4
-	b	.L707
+	b	.L718
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
 	.section	.text.FtlVariablesInit,"ax",@progbits
 	.align	2
@@ -4790,53 +4893,53 @@ FtlL2PDataInit:
 	.type	FtlVariablesInit, %function
 FtlVariablesInit:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR129
+	adrp	x0, .LANCHOR132
 	mov	w1, -1
 	add	x29, sp, 0
-	str	xzr, [x0, #:lo12:.LANCHOR129]
-	adrp	x0, .LANCHOR130
+	str	xzr, [x0, #:lo12:.LANCHOR132]
+	adrp	x0, .LANCHOR133
 	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR40
-	strh	w1, [x0, #:lo12:.LANCHOR130]
-	adrp	x0, .LANCHOR131
+	adrp	x19, .LANCHOR41
+	strh	w1, [x0, #:lo12:.LANCHOR133]
+	adrp	x0, .LANCHOR134
 	mov	w1, -1
-	str	wzr, [x0, #:lo12:.LANCHOR131]
-	adrp	x0, .LANCHOR132
-	str	wzr, [x0, #:lo12:.LANCHOR132]
-	adrp	x0, .LANCHOR133
-	str	w1, [x0, #:lo12:.LANCHOR133]
+	str	wzr, [x0, #:lo12:.LANCHOR134]
+	adrp	x0, .LANCHOR135
+	str	wzr, [x0, #:lo12:.LANCHOR135]
+	adrp	x0, .LANCHOR136
+	str	w1, [x0, #:lo12:.LANCHOR136]
 	adrp	x0, .LANCHOR28
 	mov	w1, 0
 	str	wzr, [x0, #:lo12:.LANCHOR28]
-	adrp	x0, .LANCHOR70
-	strh	wzr, [x0, #:lo12:.LANCHOR70]
-	adrp	x0, .LANCHOR61
-	ldrh	w2, [x0, #:lo12:.LANCHOR61]
 	adrp	x0, .LANCHOR71
-	ldr	x0, [x0, #:lo12:.LANCHOR71]
+	strh	wzr, [x0, #:lo12:.LANCHOR71]
+	adrp	x0, .LANCHOR62
+	ldrh	w2, [x0, #:lo12:.LANCHOR62]
+	adrp	x0, .LANCHOR72
+	ldr	x0, [x0, #:lo12:.LANCHOR72]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	adrp	x0, .LANCHOR78
-	ldrh	w2, [x19, #:lo12:.LANCHOR40]
+	adrp	x0, .LANCHOR79
+	ldrh	w2, [x19, #:lo12:.LANCHOR41]
 	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR78]
+	ldr	x0, [x0, #:lo12:.LANCHOR79]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	adrp	x0, .LANCHOR134
-	ldrh	w2, [x19, #:lo12:.LANCHOR40]
+	adrp	x0, .LANCHOR137
+	ldrh	w2, [x19, #:lo12:.LANCHOR41]
 	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR134]
+	ldr	x0, [x0, #:lo12:.LANCHOR137]
 	lsl	w2, w2, 1
 	bl	ftl_memset
 	mov	w2, 48
 	mov	w1, 0
-	adrp	x0, .LANCHOR80
-	add	x0, x0, :lo12:.LANCHOR80
+	adrp	x0, .LANCHOR81
+	add	x0, x0, :lo12:.LANCHOR81
 	bl	ftl_memset
 	mov	w2, 512
 	mov	w1, 0
-	adrp	x0, .LANCHOR135
-	add	x0, x0, :lo12:.LANCHOR135
+	adrp	x0, .LANCHOR138
+	add	x0, x0, :lo12:.LANCHOR138
 	bl	ftl_memset
 	bl	FtlGcBufInit
 	bl	FtlL2PDataInit
@@ -4851,127 +4954,127 @@ FtlVariablesInit:
 	.type	SupperBlkListInit, %function
 SupperBlkListInit:
 	stp	x29, x30, [sp, -96]!
-	adrp	x0, .LANCHOR40
+	adrp	x0, .LANCHOR41
 	mov	w1, 0
 	add	x29, sp, 0
-	ldrh	w2, [x0, #:lo12:.LANCHOR40]
+	ldrh	w2, [x0, #:lo12:.LANCHOR41]
 	mov	w0, 6
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR81
+	adrp	x24, .LANCHOR82
 	stp	x19, x20, [sp, 16]
-	adrp	x23, .LANCHOR85
+	adrp	x23, .LANCHOR86
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR88
+	adrp	x22, .LANCHOR89
 	mul	w2, w2, w0
-	ldr	x0, [x24, #:lo12:.LANCHOR81]
+	ldr	x0, [x24, #:lo12:.LANCHOR82]
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR39
+	adrp	x25, .LANCHOR40
 	str	x27, [sp, 80]
-	adrp	x26, .LANCHOR46
-	add	x25, x25, :lo12:.LANCHOR39
-	add	x26, x26, :lo12:.LANCHOR46
+	adrp	x26, .LANCHOR47
+	add	x25, x25, :lo12:.LANCHOR40
+	add	x26, x26, :lo12:.LANCHOR47
 	bl	ftl_memset
 	mov	w21, 0
-	adrp	x0, .LANCHOR87
+	adrp	x0, .LANCHOR88
 	mov	w20, 0
 	mov	w19, 0
-	strh	wzr, [x23, #:lo12:.LANCHOR85]
-	str	xzr, [x0, #:lo12:.LANCHOR87]
-	adrp	x0, .LANCHOR82
-	strh	wzr, [x22, #:lo12:.LANCHOR88]
-	adrp	x27, .LANCHOR37
-	str	xzr, [x0, #:lo12:.LANCHOR82]
-	adrp	x0, .LANCHOR84
-	str	xzr, [x0, #:lo12:.LANCHOR84]
-	adrp	x0, .LANCHOR136
-	strh	wzr, [x0, #:lo12:.LANCHOR136]
-.L713:
+	strh	wzr, [x23, #:lo12:.LANCHOR86]
+	str	xzr, [x0, #:lo12:.LANCHOR88]
+	adrp	x0, .LANCHOR83
+	strh	wzr, [x22, #:lo12:.LANCHOR89]
+	adrp	x27, .LANCHOR38
+	str	xzr, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR85
+	str	xzr, [x0, #:lo12:.LANCHOR85]
+	adrp	x0, .LANCHOR139
+	strh	wzr, [x0, #:lo12:.LANCHOR139]
+.L724:
 	ldrh	w0, [x25]
 	cmp	w19, w0
-	bge	.L720
-	adrp	x0, .LANCHOR52
-	ldrh	w8, [x27, #:lo12:.LANCHOR37]
+	bge	.L731
+	adrp	x0, .LANCHOR53
+	ldrh	w8, [x27, #:lo12:.LANCHOR38]
 	mov	w5, 0
 	mov	w6, 0
-	ldrh	w7, [x0, #:lo12:.LANCHOR52]
-	b	.L721
-.L715:
+	ldrh	w7, [x0, #:lo12:.LANCHOR53]
+	b	.L732
+.L726:
 	ldrb	w0, [x26, w6, sxtw]
 	mov	w1, w19
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L714
+	cbnz	w0, .L725
 	add	w5, w7, w5
 	sxth	w5, w5
-.L714:
+.L725:
 	add	w6, w6, 1
 	sxth	w6, w6
-.L721:
+.L732:
 	cmp	w6, w8
-	blt	.L715
-	cbz	w5, .L716
+	blt	.L726
+	cbz	w5, .L727
 	mov	w0, 32768
 	sdiv	w5, w0, w5
 	sxth	w5, w5
-.L717:
-	ldr	x1, [x24, #:lo12:.LANCHOR81]
+.L728:
+	ldr	x1, [x24, #:lo12:.LANCHOR82]
 	mov	w0, 6
 	smaddl	x0, w19, w0, x1
 	strh	w5, [x0, 4]
-	adrp	x0, .LANCHOR91
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
-	cmp	w19, w0
-	beq	.L718
 	adrp	x0, .LANCHOR92
 	ldrh	w0, [x0, #:lo12:.LANCHOR92]
 	cmp	w19, w0
-	beq	.L718
+	beq	.L729
 	adrp	x0, .LANCHOR93
 	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w19, w0
-	beq	.L718
-	adrp	x0, .LANCHOR83
-	ldr	x0, [x0, #:lo12:.LANCHOR83]
+	beq	.L729
+	adrp	x0, .LANCHOR94
+	ldrh	w0, [x0, #:lo12:.LANCHOR94]
+	cmp	w19, w0
+	beq	.L729
+	adrp	x0, .LANCHOR84
+	ldr	x0, [x0, #:lo12:.LANCHOR84]
 	ldrh	w0, [x0, w19, sxtw 1]
-	cbnz	w0, .L719
+	cbnz	w0, .L730
 	add	w21, w21, 1
 	mov	w0, w19
 	and	w21, w21, 65535
 	bl	INSERT_FREE_LIST
-.L718:
+.L729:
 	add	w19, w19, 1
 	sxth	w19, w19
-	b	.L713
-.L716:
-	adrp	x0, .LANCHOR83
+	b	.L724
+.L727:
+	adrp	x0, .LANCHOR84
 	mov	w1, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR83]
+	ldr	x0, [x0, #:lo12:.LANCHOR84]
 	strh	w1, [x0, w19, sxtw 1]
-	b	.L717
-.L719:
+	b	.L728
+.L730:
 	add	w20, w20, 1
 	mov	w0, w19
 	and	w20, w20, 65535
 	bl	INSERT_DATA_LIST
-	b	.L718
-.L720:
-	strh	w20, [x23, #:lo12:.LANCHOR85]
+	b	.L729
+.L731:
+	strh	w20, [x23, #:lo12:.LANCHOR86]
 	add	w20, w20, w21
-	strh	w21, [x22, #:lo12:.LANCHOR88]
+	strh	w21, [x22, #:lo12:.LANCHOR89]
 	cmp	w0, w20
-	bge	.L722
-	mov	w2, 2405
-	adrp	x1, .LANCHOR137
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR137
-	add	x0, x0, :lo12:.LC6
+	bge	.L733
+	mov	w2, 2683
+	adrp	x1, .LANCHOR140
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR140
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L722:
+.L733:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -4987,30 +5090,46 @@ SupperBlkListInit:
 	.type	FtlGcPageVarInit, %function
 FtlGcPageVarInit:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR108
+	adrp	x0, .LANCHOR109
 	mov	w1, 255
 	add	x29, sp, 0
-	strh	wzr, [x0, #:lo12:.LANCHOR108]
-	adrp	x0, .LANCHOR110
+	strh	wzr, [x0, #:lo12:.LANCHOR109]
+	adrp	x0, .LANCHOR111
 	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR54
-	strh	wzr, [x0, #:lo12:.LANCHOR110]
-	adrp	x0, .LANCHOR109
-	ldrh	w2, [x19, #:lo12:.LANCHOR54]
-	ldr	x0, [x0, #:lo12:.LANCHOR109]
+	adrp	x19, .LANCHOR55
+	strh	wzr, [x0, #:lo12:.LANCHOR111]
+	adrp	x0, .LANCHOR110
+	ldrh	w2, [x19, #:lo12:.LANCHOR55]
+	ldr	x0, [x0, #:lo12:.LANCHOR110]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	ldrh	w2, [x19, #:lo12:.LANCHOR54]
+	ldrh	w2, [x19, #:lo12:.LANCHOR55]
 	mov	w0, 12
 	mov	w1, 255
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR111
-	ldr	x0, [x0, #:lo12:.LANCHOR111]
+	adrp	x0, .LANCHOR112
+	ldr	x0, [x0, #:lo12:.LANCHOR112]
 	bl	ftl_memset
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	FtlGcBufInit
 	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
+	.section	.text.idb_init,"ax",@progbits
+	.align	2
+	.global	idb_init
+	.type	idb_init, %function
+idb_init:
+	stp	x29, x30, [sp, -16]!
+	mov	w2, 262144
+	mov	w1, 0
+	adrp	x0, idb_buf
+	add	x29, sp, 0
+	add	x0, x0, :lo12:idb_buf
+	bl	ftl_memset
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	idb_init, .-idb_init
 	.section	.text.ftl_memcpy,"ax",@progbits
 	.align	2
 	.global	ftl_memcpy
@@ -5026,8 +5145,8 @@ ftl_memcpy:
 FlashReadIdbData:
 	stp	x29, x30, [sp, -16]!
 	mov	w2, 2048
-	adrp	x1, .LANCHOR138
-	add	x1, x1, :lo12:.LANCHOR138
+	adrp	x1, .LANCHOR141
+	add	x1, x1, :lo12:.LANCHOR141
 	add	x29, sp, 0
 	bl	ftl_memcpy
 	mov	w0, 0
@@ -5040,8 +5159,8 @@ FlashReadIdbData:
 	.type	FlashLoadPhyInfoInRam, %function
 FlashLoadPhyInfoInRam:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR139
-	add	x8, x0, :lo12:.LANCHOR139
+	adrp	x0, .LANCHOR142
+	add	x8, x0, :lo12:.LANCHOR142
 	adrp	x11, .LANCHOR22
 	add	x29, sp, 0
 	add	x8, x8, 1
@@ -5049,7 +5168,7 @@ FlashLoadPhyInfoInRam:
 	add	x11, x11, :lo12:.LANCHOR22
 	stp	x19, x20, [sp, 16]
 	mov	x10, 0
-.L732:
+.L745:
 	ldrb	w2, [x8, -1]
 	mov	w12, w10
 	lsl	x20, x10, 5
@@ -5057,28 +5176,28 @@ FlashLoadPhyInfoInRam:
 	mov	x0, x8
 	bl	FlashMemCmp8
 	mov	w19, w0
-	cbnz	w0, .L730
-	add	x0, x7, :lo12:.LANCHOR139
+	cbnz	w0, .L743
+	add	x0, x7, :lo12:.LANCHOR142
 	ubfiz	x12, x12, 5, 32
 	add	x20, x0, x20
 	add	x0, x0, x12
-	adrp	x1, .LANCHOR140
-	add	x4, x1, :lo12:.LANCHOR140
+	adrp	x1, .LANCHOR143
+	add	x4, x1, :lo12:.LANCHOR143
 	ldrb	w3, [x0, 22]
 	mov	x0, 0
-.L731:
+.L744:
 	lsl	x5, x0, 5
 	mov	w2, w0
 	ldrb	w5, [x5, x4]
 	cmp	w5, w3
-	beq	.L734
+	beq	.L747
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L731
+	bne	.L744
 	mov	w2, w0
-.L734:
+.L747:
 	ubfiz	x0, x2, 5, 32
-	add	x1, x1, :lo12:.LANCHOR140
+	add	x1, x1, :lo12:.LANCHOR143
 	add	x1, x1, x0
 	mov	w2, 32
 	adrp	x0, .LANCHOR7
@@ -5086,17 +5205,17 @@ FlashLoadPhyInfoInRam:
 	bl	ftl_memcpy
 	mov	w2, 32
 	mov	x1, x20
-	adrp	x0, .LANCHOR30
-	add	x0, x0, :lo12:.LANCHOR30
+	adrp	x0, .LANCHOR31
+	add	x0, x0, :lo12:.LANCHOR31
 	bl	ftl_memcpy
-	b	.L729
-.L730:
+	b	.L742
+.L743:
 	add	x10, x10, 1
 	add	x8, x8, 32
-	cmp	x10, 74
-	bne	.L732
+	cmp	x10, 77
+	bne	.L745
 	mov	w19, -1
-.L729:
+.L742:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -5108,15 +5227,15 @@ FlashLoadPhyInfoInRam:
 	.type	ftl_memcpy32, %function
 ftl_memcpy32:
 	mov	x3, 0
-.L739:
+.L752:
 	cmp	w2, w3
-	bhi	.L740
+	bhi	.L753
 	ret
-.L740:
+.L753:
 	ldr	w4, [x1, x3, lsl 2]
 	str	w4, [x0, x3, lsl 2]
 	add	x3, x3, 1
-	b	.L739
+	b	.L752
 	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.NandcCopy1KB,"ax",@progbits
 	.align	2
@@ -5135,15 +5254,15 @@ NandcCopy1KB:
 	ubfiz	x0, x19, 9, 8
 	mov	x20, x4
 	add	x0, x2, x0
-	bne	.L742
-	cbz	x3, .L743
+	bne	.L755
+	cbz	x3, .L756
 	tst	x3, 3
-	bne	.L744
+	bne	.L757
 	mov	w2, 256
 	mov	x1, x3
 	bl	ftl_memcpy32
-.L743:
-	cbz	x20, .L741
+.L756:
+	cbz	x20, .L754
 	ldrb	w0, [x20]
 	lsr	w19, w19, 1
 	ldrb	w1, [x20, 1]
@@ -5155,26 +5274,26 @@ NandcCopy1KB:
 	mov	w1, 12
 	mul	w19, w19, w1
 	str	w0, [x21, w19, sxtw 2]
-.L741:
+.L754:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L744:
+.L757:
 	mov	w2, 1024
 	mov	x1, x3
 	bl	ftl_memcpy
-	b	.L743
-.L742:
-	cbz	x3, .L747
+	b	.L756
+.L755:
+	cbz	x3, .L760
 	tst	x3, 3
-	bne	.L748
+	bne	.L761
 	mov	x1, x0
 	mov	w2, 256
 	mov	x0, x3
 	bl	ftl_memcpy32
-.L747:
-	cbz	x20, .L741
+.L760:
+	cbz	x20, .L754
 	lsr	w19, w19, 1
 	mov	w0, 12
 	mul	w19, w19, w0
@@ -5186,13 +5305,13 @@ NandcCopy1KB:
 	lsr	w0, w0, 24
 	strb	w1, [x20, 2]
 	strb	w0, [x20, 3]
-	b	.L741
-.L748:
+	b	.L754
+.L761:
 	mov	x1, x0
 	mov	w2, 1024
 	mov	x0, x3
 	bl	ftl_memcpy
-	b	.L747
+	b	.L760
 	.size	NandcCopy1KB, .-NandcCopy1KB
 	.section	.text.NandcXferData,"ax",@progbits
 	.align	2
@@ -5216,14 +5335,14 @@ NandcXferData:
 	and	w24, w2, 255
 	mov	x21, x4
 	ldr	x19, [x0, x1]
-	bne	.L761
-	cbnz	x4, .L762
+	bne	.L774
+	cbnz	x4, .L775
 	add	x21, x29, 128
 	mov	w2, 64
 	mov	w1, 255
 	add	x0, x29, 128
 	bl	ftl_memset
-.L762:
+.L775:
 	mov	x5, x21
 	mov	x4, x26
 	mov	w2, w24
@@ -5233,12 +5352,12 @@ NandcXferData:
 	bl	NandcXferStart
 	mov	w0, w25
 	bl	NandcXferComp
-	cbnz	w20, .L786
-	adrp	x0, .LANCHOR31
-	adrp	x4, .LANCHOR34
+	cbnz	w20, .L799
+	adrp	x0, .LANCHOR32
+	adrp	x4, .LANCHOR35
 	mov	x1, x0
-	add	x4, x4, :lo12:.LANCHOR34
-	ldr	w2, [x0, #:lo12:.LANCHOR31]
+	add	x4, x4, :lo12:.LANCHOR35
+	ldr	w2, [x0, #:lo12:.LANCHOR32]
 	mov	w0, 128
 	mov	w3, 64
 	cmp	w2, 25
@@ -5246,38 +5365,38 @@ NandcXferData:
 	add	x2, x21, x2, lsl 2
 	csel	w3, w3, w0, cc
 	mov	w0, 0
-.L765:
+.L778:
 	add	w5, w3, w0
 	cmp	x21, x2
-	bne	.L766
-	adrp	x0, .LANCHOR33
-	ldr	w4, [x1, #:lo12:.LANCHOR31]
+	bne	.L779
+	adrp	x0, .LANCHOR34
+	ldr	w4, [x1, #:lo12:.LANCHOR32]
 	lsr	w24, w24, 2
 	mov	w2, 0
-	ldr	w3, [x0, #:lo12:.LANCHOR33]
+	ldr	w3, [x0, #:lo12:.LANCHOR34]
 	mov	w22, 0
-.L767:
+.L780:
 	cmp	w2, w24
-	bcs	.L763
-	cbnz	w4, .L773
-.L763:
+	bcs	.L776
+	cbnz	w4, .L786
+.L776:
 	str	wzr, [x19, 16]
-.L774:
-	adrp	x0, .LANCHOR33
-	ldr	w0, [x0, #:lo12:.LANCHOR33]
+.L787:
+	adrp	x0, .LANCHOR34
+	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	cmp	w0, 5
-	bls	.L760
-	cbnz	w20, .L760
+	bls	.L773
+	cbnz	w20, .L773
 	ldr	w0, [x19]
 	mov	w1, 8192
 	movk	w1, 0x2, lsl 16
 	and	w1, w0, w1
 	cmp	w1, 139264
-	bne	.L760
+	bne	.L773
 	orr	w0, w0, 131072
 	mov	w22, -1
 	str	w0, [x19]
-.L760:
+.L773:
 	mov	w0, w22
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -5286,7 +5405,7 @@ NandcXferData:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L766:
+.L779:
 	ldr	x6, [x4, 8]
 	and	x0, x0, 4294967292
 	add	x21, x21, 4
@@ -5299,18 +5418,18 @@ NandcXferData:
 	lsr	w0, w0, 24
 	strb	w0, [x21, -1]
 	mov	w0, w5
-	b	.L765
-.L773:
+	b	.L778
+.L786:
 	uxtw	x0, w2
 	add	x0, x0, 8
 	ldr	w0, [x19, x0, lsl 2]
 	str	w0, [x29, 120]
 	ldr	w0, [x29, 120]
-	tbnz	x0, 2, .L789
+	tbnz	x0, 2, .L802
 	ldr	w0, [x29, 120]
-	tbnz	x0, 15, .L789
+	tbnz	x0, 15, .L802
 	cmp	w3, 5
-	bls	.L769
+	bls	.L782
 	ldr	w1, [x29, 120]
 	ubfx	x6, x1, 3, 5
 	ldr	w1, [x29, 120]
@@ -5323,26 +5442,26 @@ NandcXferData:
 	orr	w0, w5, w0, lsl 5
 	cmp	w1, w0
 	ldr	w0, [x29, 120]
-	bls	.L770
+	bls	.L783
 	ubfx	x1, x0, 3, 5
 	ldr	w0, [x29, 120]
 	ubfx	x0, x0, 27, 1
-.L795:
+.L808:
 	orr	w0, w1, w0, lsl 5
-.L771:
+.L784:
 	cmp	w22, w0
 	csel	w22, w22, w0, cs
-.L768:
+.L781:
 	add	w2, w2, 1
-	b	.L767
-.L770:
+	b	.L780
+.L783:
 	ubfx	x1, x0, 16, 5
 	ldr	w0, [x29, 120]
 	ubfx	x0, x0, 29, 1
-	b	.L795
-.L769:
+	b	.L808
+.L782:
 	cmp	w3, 3
-	bls	.L790
+	bls	.L803
 	ldr	w1, [x29, 120]
 	ubfx	x6, x1, 3, 5
 	ldr	w1, [x29, 120]
@@ -5355,45 +5474,45 @@ NandcXferData:
 	orr	w0, w5, w0, lsl 5
 	cmp	w1, w0
 	ldr	w0, [x29, 120]
-	bls	.L772
+	bls	.L785
 	ubfx	x1, x0, 3, 5
 	ldr	w0, [x29, 120]
 	ubfx	x0, x0, 28, 1
-	b	.L795
-.L772:
+	b	.L808
+.L785:
 	ubfx	x1, x0, 16, 5
 	ldr	w0, [x29, 120]
 	ubfx	x0, x0, 30, 1
-	b	.L795
-.L790:
+	b	.L808
+.L803:
 	mov	w0, 0
-	b	.L771
-.L789:
+	b	.L784
+.L802:
 	mov	w22, -1
-	b	.L768
-.L786:
+	b	.L781
+.L799:
 	mov	w22, 0
-	b	.L763
-.L761:
+	b	.L776
+.L774:
 	cmp	w20, 1
-	bne	.L775
+	bne	.L788
 	cmp	x4, 0
 	mov	w23, 2
 	csel	w23, w23, wzr, ne
 	mov	w27, 0
 	lsl	w23, w23, 1
 	mov	w22, 0
-.L776:
+.L789:
 	cmp	w22, w24
-	bcc	.L778
+	bcc	.L791
 	mov	w22, 0
-	b	.L774
-.L778:
+	b	.L787
+.L791:
 	and	w28, w22, 3
-	cbz	x26, .L791
+	cbz	x26, .L804
 	lsl	w3, w22, 9
 	add	x3, x26, x3
-.L777:
+.L790:
 	add	x4, x21, x27, uxtw
 	mov	w2, w28
 	mov	w1, 1
@@ -5410,11 +5529,11 @@ NandcXferData:
 	add	w27, w27, w23
 	mov	w0, w25
 	bl	NandcXferComp
-	b	.L776
-.L791:
+	b	.L789
+.L804:
 	mov	x3, 0
-	b	.L777
-.L775:
+	b	.L790
+.L788:
 	mov	w0, w25
 	mov	x5, 0
 	mov	x4, 0
@@ -5430,16 +5549,16 @@ NandcXferData:
 	lsl	w0, w27, 1
 	mov	w22, 0
 	str	w0, [x29, 108]
-.L779:
+.L792:
 	cmp	w24, w23
-	bls	.L774
+	bls	.L787
 	mov	w0, w25
 	bl	NandcXferComp
 	ldr	w0, [x19, 32]
 	add	w27, w23, 2
 	str	w0, [x29, 120]
 	cmp	w24, w27
-	bls	.L780
+	bls	.L793
 	mov	x5, 0
 	mov	x4, 0
 	and	w3, w27, 3
@@ -5447,9 +5566,9 @@ NandcXferData:
 	mov	w1, 0
 	mov	w0, w25
 	bl	NandcXferStart
-.L780:
+.L793:
 	ldr	w0, [x29, 120]
-	tbnz	x0, 2, .L792
+	tbnz	x0, 2, .L805
 	ldr	w0, [x29, 120]
 	ubfx	x1, x0, 3, 5
 	ldr	w0, [x29, 120]
@@ -5457,12 +5576,12 @@ NandcXferData:
 	orr	w0, w1, w0, lsl 5
 	cmp	w22, w0
 	csel	w22, w22, w0, cs
-.L781:
+.L794:
 	and	w2, w23, 3
-	cbz	x26, .L793
+	cbz	x26, .L806
 	lsl	w3, w23, 9
 	add	x3, x26, x3
-.L782:
+.L795:
 	add	x4, x21, x28, uxtw
 	mov	x0, x19
 	mov	w1, 0
@@ -5470,13 +5589,13 @@ NandcXferData:
 	ldr	w0, [x29, 108]
 	mov	w23, w27
 	add	w28, w28, w0
-	b	.L779
-.L792:
+	b	.L792
+.L805:
 	mov	w22, -1
-	b	.L781
-.L793:
+	b	.L794
+.L806:
 	mov	x3, 0
-	b	.L782
+	b	.L795
 	.size	NandcXferData, .-NandcXferData
 	.section	.text.FlashReadRawPage,"ax",@progbits
 	.align	2
@@ -5490,11 +5609,11 @@ FlashReadRawPage:
 	stp	x21, x22, [sp, 32]
 	mov	w21, w1
 	str	x23, [sp, 48]
-	adrp	x1, .LANCHOR30+9
+	adrp	x1, .LANCHOR31+9
 	mov	x22, x2
 	mov	x23, x3
-	ldrb	w20, [x1, #:lo12:.LANCHOR30+9]
-	bne	.L797
+	ldrb	w20, [x1, #:lo12:.LANCHOR31+9]
+	bne	.L810
 	adrp	x0, .LANCHOR2
 	adrp	x1, .LANCHOR3
 	ldrb	w0, [x0, #:lo12:.LANCHOR2]
@@ -5503,7 +5622,7 @@ FlashReadRawPage:
 	cmp	w0, w21
 	mov	w0, 4
 	csel	w20, w20, w0, ls
-.L797:
+.L810:
 	mov	w0, w19
 	bl	NandcWaitFlashReady
 	mov	w0, w19
@@ -5551,12 +5670,12 @@ FlashDdrTunningRead:
 	mov	w26, w4
 	ldr	w0, [x0, 304]
 	str	w0, [x29, 108]
-	adrp	x0, .LANCHOR33
-	ldr	w0, [x0, #:lo12:.LANCHOR33]
+	adrp	x0, .LANCHOR34
+	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	cmp	w0, 8
 	mov	w0, 12
 	csel	w22, w22, w0, cc
-	cbz	w4, .L813
+	cbz	w4, .L826
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
@@ -5575,10 +5694,10 @@ FlashDdrTunningRead:
 	ldrb	w0, [x19, #:lo12:.LANCHOR24]
 	bl	NandcSetMode
 	cmn	w21, #1
-	bne	.L802
-.L811:
+	bne	.L815
+.L824:
 	mov	w21, -1
-.L799:
+.L812:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -5587,30 +5706,30 @@ FlashDdrTunningRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L802:
+.L815:
 	mov	w1, w25
 	mov	w2, w21
-	adrp	x0, .LC10
-	add	x0, x0, :lo12:.LC10
+	adrp	x0, .LC9
+	add	x0, x0, :lo12:.LC9
 	bl	printf
-	adrp	x1, .LANCHOR141
-	ldr	w0, [x1, #:lo12:.LANCHOR141]
+	adrp	x1, .LANCHOR144
+	ldr	w0, [x1, #:lo12:.LANCHOR144]
 	add	w0, w0, 1
 	cmp	w0, 2047
-	bhi	.L804
-	str	w0, [x1, #:lo12:.LANCHOR141]
-	b	.L799
-.L804:
-	str	wzr, [x1, #:lo12:.LANCHOR141]
+	bhi	.L817
+	str	w0, [x1, #:lo12:.LANCHOR144]
+	b	.L812
+.L817:
+	str	wzr, [x1, #:lo12:.LANCHOR144]
 	mov	x28, 0
 	mov	x23, 0
-.L801:
+.L814:
 	mov	w5, 0
 	mov	w20, 0
 	mov	w6, 0
 	mov	w19, 0
 	mov	w27, -1
-.L809:
+.L822:
 	stp	w5, w6, [x29, 100]
 	mov	w0, w22
 	bl	NandcSetDdrPara
@@ -5622,65 +5741,65 @@ FlashDdrTunningRead:
 	add	w1, w21, 1
 	cmp	w0, w1
 	ldp	w5, w6, [x29, 100]
-	bhi	.L805
+	bhi	.L818
 	cmp	w0, 2
-	bhi	.L815
+	bhi	.L828
 	add	w19, w19, 1
 	cmp	w19, 9
-	bls	.L815
+	bls	.L828
 	mov	w1, w20
 	mov	w21, w0
 	sub	w20, w22, w19
 	mov	w27, 0
-.L807:
+.L820:
 	cmp	w19, w6
 	csel	w20, w20, w1, hi
-.L808:
-	cbz	w20, .L810
+.L821:
+	cbz	w20, .L823
 	mov	w1, w20
-	adrp	x0, .LC11
-	add	x0, x0, :lo12:.LC11
+	adrp	x0, .LC10
+	add	x0, x0, :lo12:.LC10
 	bl	printf
 	mov	w0, w20
 	bl	NandcSetDdrPara
-.L810:
-	cbz	w27, .L799
-	adrp	x0, .LC12
+.L823:
+	cbz	w27, .L812
+	adrp	x0, .LC11
 	mov	w2, w25
 	mov	w1, w24
-	add	x0, x0, :lo12:.LC12
+	add	x0, x0, :lo12:.LC11
 	bl	printf
-	cbz	w26, .L811
+	cbz	w26, .L824
 	ldr	w1, [x29, 108]
 	lsr	w0, w1, 8
 	bl	NandcSetDdrPara
-	b	.L799
-.L813:
+	b	.L812
+.L826:
 	mov	w21, 1024
-	b	.L801
-.L805:
+	b	.L814
+.L818:
 	cmp	w19, w6
-	bls	.L816
+	bls	.L829
 	sub	w20, w5, w19
 	cmp	w19, 7
-	bhi	.L808
+	bhi	.L821
 	mov	w6, w19
-.L816:
+.L829:
 	mov	w19, 0
-	b	.L806
-.L815:
+	b	.L819
+.L828:
 	mov	w5, w22
 	mov	w21, w0
 	mov	w27, 0
 	mov	x28, 0
 	mov	x23, 0
-.L806:
+.L819:
 	add	w22, w22, 2
 	cmp	w22, 69
-	bls	.L809
+	bls	.L822
 	mov	w1, w20
 	mov	w20, w5
-	b	.L807
+	b	.L820
 	.size	FlashDdrTunningRead, .-FlashDdrTunningRead
 	.section	.text.FlashReadPage,"ax",@progbits
 	.align	2
@@ -5701,14 +5820,14 @@ FlashReadPage:
 	bl	FlashReadRawPage
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L826
+	bne	.L839
 	adrp	x24, .LANCHOR5
 	ldrb	w25, [x24, #:lo12:.LANCHOR5]
-	cbnz	w25, .L827
-.L829:
-	adrp	x0, .LANCHOR29
-	ldrb	w0, [x0, #:lo12:.LANCHOR29]
-	cbz	w0, .L826
+	cbnz	w25, .L840
+.L842:
+	adrp	x0, .LANCHOR30
+	ldrb	w0, [x0, #:lo12:.LANCHOR30]
+	cbz	w0, .L839
 	adrp	x0, .LANCHOR19
 	mov	w4, 1
 	mov	x3, x23
@@ -5720,16 +5839,16 @@ FlashReadPage:
 	bl	FlashDdrTunningRead
 	mov	w19, w0
 	cmn	w0, #1
-	beq	.L830
-	adrp	x0, .LANCHOR32
-	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	beq	.L843
+	adrp	x0, .LANCHOR33
+	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	cmp	w19, w0, lsr 1
-	bls	.L826
-.L830:
+	bls	.L839
+.L843:
 	lsr	w0, w24, 8
 	bl	NandcSetDdrPara
-	b	.L826
-.L827:
+	b	.L839
+.L840:
 	strb	wzr, [x24, #:lo12:.LANCHOR5]
 	mov	x3, x23
 	mov	x2, x22
@@ -5738,14 +5857,14 @@ FlashReadPage:
 	bl	FlashReadRawPage
 	strb	w25, [x24, #:lo12:.LANCHOR5]
 	cmn	w0, #1
-	beq	.L829
+	beq	.L842
 	mov	w19, w0
-.L826:
-	adrp	x24, .LANCHOR142
-	ldr	x4, [x24, #:lo12:.LANCHOR142]
-	cbz	x4, .L825
+.L839:
+	adrp	x24, .LANCHOR145
+	ldr	x4, [x24, #:lo12:.LANCHOR145]
+	cbz	x4, .L838
 	cmn	w19, #1
-	bne	.L825
+	bne	.L838
 	mov	x3, x23
 	mov	x2, x22
 	mov	w1, w21
@@ -5755,17 +5874,17 @@ FlashReadPage:
 	mov	w1, w0
 	mov	w3, w21
 	mov	w2, w20
-	adrp	x0, .LC13
-	add	x0, x0, :lo12:.LC13
+	adrp	x0, .LC12
+	add	x0, x0, :lo12:.LC12
 	bl	printf
 	cmn	w19, #1
-	bne	.L825
+	bne	.L838
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L825
+	cbz	w0, .L838
 	mov	w0, w20
 	bl	flash_enter_slc_mode
-	ldr	x4, [x24, #:lo12:.LANCHOR142]
+	ldr	x4, [x24, #:lo12:.LANCHOR145]
 	mov	x3, x23
 	mov	x2, x22
 	mov	w1, w21
@@ -5774,7 +5893,7 @@ FlashReadPage:
 	mov	w19, w0
 	mov	w0, w20
 	bl	flash_exit_slc_mode
-.L825:
+.L838:
 	mov	w0, w19
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -5810,30 +5929,30 @@ FlashDdrParaScan:
 	mov	x2, 0
 	mov	w0, w20
 	mov	w1, w21
-	adrp	x20, .LANCHOR29
+	adrp	x20, .LANCHOR30
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	beq	.L846
+	beq	.L859
 	cmn	w22, #1
-	bne	.L847
-.L846:
+	bne	.L860
+.L859:
 	ldrb	w0, [x19, #:lo12:.LANCHOR24]
-	tbz	x0, 0, .L847
+	tbz	x0, 0, .L860
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
 	bl	NandcSetMode
-	strb	wzr, [x20, #:lo12:.LANCHOR29]
-.L848:
+	strb	wzr, [x20, #:lo12:.LANCHOR30]
+.L861:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L847:
+.L860:
 	mov	w0, 1
-	strb	w0, [x20, #:lo12:.LANCHOR29]
-	b	.L848
+	strb	w0, [x20, #:lo12:.LANCHOR30]
+	b	.L861
 	.size	FlashDdrParaScan, .-FlashDdrParaScan
 	.section	.text.FlashLoadPhyInfo,"ax",@progbits
 	.align	2
@@ -5844,9 +5963,9 @@ FlashLoadPhyInfo:
 	mov	w0, 60
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR30
+	adrp	x20, .LANCHOR31
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR144
+	adrp	x22, .LANCHOR147
 	strb	w0, [x29, 120]
 	mov	w0, 40
 	strb	w0, [x29, 121]
@@ -5854,116 +5973,116 @@ FlashLoadPhyInfo:
 	strb	w0, [x29, 122]
 	mov	w0, 16
 	strb	w0, [x29, 123]
-	add	x0, x20, :lo12:.LANCHOR30
+	add	x0, x20, :lo12:.LANCHOR31
 	stp	x23, x24, [sp, 48]
-	adrp	x21, .LANCHOR143
-	adrp	x24, .LANCHOR145
+	adrp	x21, .LANCHOR146
+	adrp	x24, .LANCHOR148
 	stp	x25, x26, [sp, 64]
 	ldrh	w0, [x0, 10]
 	adrp	x26, .LANCHOR7
 	str	w0, [x29, 108]
 	mov	w19, 0
-	ldr	x0, [x22, #:lo12:.LANCHOR144]
+	ldr	x0, [x22, #:lo12:.LANCHOR147]
 	mov	w25, 4
-	str	x0, [x21, #:lo12:.LANCHOR143]
+	str	x0, [x21, #:lo12:.LANCHOR146]
 	mov	w23, -1
 	stp	x27, x28, [sp, 80]
 	add	x26, x26, :lo12:.LANCHOR7
-	str	wzr, [x24, #:lo12:.LANCHOR145]
+	str	wzr, [x24, #:lo12:.LANCHOR148]
 	mov	w0, 0
 	bl	flash_enter_slc_mode
-.L857:
+.L870:
 	add	w28, w19, 1
 	mov	x27, 0
-.L859:
+.L872:
 	add	x0, x29, 120
 	ldrb	w0, [x0, x27]
 	bl	FlashBchSel
-	ldr	x2, [x22, #:lo12:.LANCHOR144]
+	ldr	x2, [x22, #:lo12:.LANCHOR147]
 	mov	x3, 0
 	mov	w1, w19
 	mov	w0, 0
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	bne	.L858
-	ldr	x2, [x22, #:lo12:.LANCHOR144]
+	bne	.L871
+	ldr	x2, [x22, #:lo12:.LANCHOR147]
 	mov	x3, 0
 	mov	w1, w28
 	mov	w0, 0
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	bne	.L858
+	bne	.L871
 	add	x27, x27, 1
 	cmp	x27, 4
-	bne	.L859
-.L860:
+	bne	.L872
+.L873:
 	ldr	w0, [x29, 108]
 	subs	w25, w25, #1
 	add	w19, w19, w0
-	bne	.L857
-	b	.L865
-.L861:
+	bne	.L870
+	b	.L878
+.L874:
 	mov	w1, 2036
 	add	x0, x6, 12
 	bl	JSHash
 	ldr	w1, [x6, 8]
 	cmp	w1, w0
-	bne	.L867
-	add	x23, x20, :lo12:.LANCHOR30
+	bne	.L880
+	add	x23, x20, :lo12:.LANCHOR31
 	add	x1, x6, 160
 	mov	w2, 32
 	mov	x0, x23
 	bl	ftl_memcpy
-	ldr	x1, [x21, #:lo12:.LANCHOR143]
+	ldr	x1, [x21, #:lo12:.LANCHOR146]
 	mov	w2, 32
 	mov	x0, x26
 	add	x1, x1, 192
 	bl	ftl_memcpy
-	ldr	x1, [x21, #:lo12:.LANCHOR143]
+	ldr	x1, [x21, #:lo12:.LANCHOR146]
 	mov	w2, 852
 	adrp	x0, .LANCHOR20
 	add	x0, x0, :lo12:.LANCHOR20
 	add	x1, x1, 224
 	bl	ftl_memcpy
-	ldr	x1, [x21, #:lo12:.LANCHOR143]
-	adrp	x0, .LANCHOR29
-	str	w19, [x24, #:lo12:.LANCHOR145]
+	ldr	x1, [x21, #:lo12:.LANCHOR146]
+	adrp	x0, .LANCHOR30
+	str	w19, [x24, #:lo12:.LANCHOR148]
 	ldr	w2, [x1, 1076]
-	strb	w2, [x0, #:lo12:.LANCHOR29]
+	strb	w2, [x0, #:lo12:.LANCHOR30]
 	ldrh	w0, [x23, 10]
-	adrp	x2, .LANCHOR146
+	adrp	x2, .LANCHOR149
 	udiv	w0, w19, w0
 	add	w3, w0, 1
-	cbz	w0, .L863
-	str	w3, [x2, #:lo12:.LANCHOR146]
-.L864:
-	adrp	x0, .LANCHOR147
+	cbz	w0, .L876
+	str	w3, [x2, #:lo12:.LANCHOR149]
+.L877:
+	adrp	x0, .LANCHOR150
 	ldrh	w1, [x1, 14]
 	mov	w23, 0
-	strb	w1, [x0, #:lo12:.LANCHOR147]
-	b	.L860
-.L863:
+	strb	w1, [x0, #:lo12:.LANCHOR150]
+	b	.L873
+.L876:
 	mov	w0, 2
-	str	w0, [x2, #:lo12:.LANCHOR146]
-	b	.L864
-.L867:
+	str	w0, [x2, #:lo12:.LANCHOR149]
+	b	.L877
+.L880:
 	mov	w23, -1
-	b	.L860
-.L858:
-	ldr	x6, [x21, #:lo12:.LANCHOR143]
+	b	.L873
+.L871:
+	ldr	x6, [x21, #:lo12:.LANCHOR146]
 	mov	w1, 20036
 	movk	w1, 0x4e41, lsl 16
 	ldr	w0, [x6]
 	cmp	w0, w1
-	bne	.L860
-	cbnz	w23, .L861
-	add	x20, x20, :lo12:.LANCHOR30
+	bne	.L873
+	cbnz	w23, .L874
+	add	x20, x20, :lo12:.LANCHOR31
 	ldrh	w0, [x20, 10]
 	udiv	w19, w19, w0
-	adrp	x0, .LANCHOR146
+	adrp	x0, .LANCHOR149
 	add	w19, w19, 1
-	str	w19, [x0, #:lo12:.LANCHOR146]
-.L865:
+	str	w19, [x0, #:lo12:.LANCHOR149]
+.L878:
 	mov	w0, 0
 	bl	flash_exit_slc_mode
 	mov	w0, w23
@@ -6008,34 +6127,34 @@ ToshibaReadRetrial:
 	and	w0, w0, 255
 	add	x19, x22, x19, lsl 8
 	cmp	w0, 1
-	bls	.L887
-	adrp	x0, .LANCHOR29
-	ldrb	w0, [x0, #:lo12:.LANCHOR29]
-	cbz	w0, .L888
+	bls	.L900
+	adrp	x0, .LANCHOR30
+	ldrb	w0, [x0, #:lo12:.LANCHOR30]
+	cbz	w0, .L901
 	mov	w23, 1
 	mov	w0, 0
 	bl	NandcSetDdrMode
-.L872:
+.L885:
 	add	x0, x22, x27, lsl 8
 	mov	w1, 92
 	str	w1, [x0, 2056]
 	mov	w1, 197
 	str	w1, [x0, 2056]
-.L871:
+.L884:
 	ldrsw	x0, [x29, 124]
 	mov	w20, 1
 	mov	w24, -1
 	add	x0, x0, 8
 	add	x0, x22, x0, lsl 8
 	str	x0, [x29, 104]
-.L873:
-	adrp	x0, .LANCHOR148
-	ldrb	w0, [x0, #:lo12:.LANCHOR148]
+.L886:
+	adrp	x0, .LANCHOR151
+	ldrb	w0, [x0, #:lo12:.LANCHOR151]
 	add	w0, w0, 1
 	cmp	w20, w0
-	bcc	.L882
+	bcc	.L895
 	mov	w28, w24
-.L881:
+.L894:
 	ldr	x0, [x29, 112]
 	mov	w1, 0
 	ldrb	w0, [x0, #:lo12:.LANCHOR11]
@@ -6043,29 +6162,29 @@ ToshibaReadRetrial:
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x19
-	bhi	.L883
+	bhi	.L896
 	bl	SandiskSetRRPara
-.L884:
+.L897:
 	ldrsw	x0, [x29, 124]
 	add	x0, x0, 8
 	add	x22, x22, x0, lsl 8
 	mov	w0, 255
 	str	w0, [x22, 8]
-	adrp	x0, .LANCHOR32
-	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	adrp	x0, .LANCHOR33
+	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L885
+	bcc	.L898
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L885:
+.L898:
 	mov	w0, w21
 	bl	NandcWaitFlashReady
-	cbz	w23, .L870
+	cbz	w23, .L883
 	mov	w0, 4
 	bl	NandcSetDdrMode
-.L870:
+.L883:
 	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6074,13 +6193,13 @@ ToshibaReadRetrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L888:
+.L901:
 	mov	w23, 0
-	b	.L872
-.L887:
+	b	.L885
+.L900:
 	mov	w23, 0
-	b	.L871
-.L882:
+	b	.L884
+.L895:
 	ldr	x0, [x29, 112]
 	mov	w1, w20
 	ldrb	w0, [x0, #:lo12:.LANCHOR11]
@@ -6088,28 +6207,28 @@ ToshibaReadRetrial:
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x19
-	bhi	.L874
+	bhi	.L887
 	bl	SandiskSetRRPara
-.L875:
+.L888:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0, #:lo12:.LANCHOR11]
 	cmp	w0, 34
-	bne	.L876
-	adrp	x0, .LANCHOR148
-	ldrb	w0, [x0, #:lo12:.LANCHOR148]
+	bne	.L889
+	adrp	x0, .LANCHOR151
+	ldrb	w0, [x0, #:lo12:.LANCHOR151]
 	sub	w0, w0, #3
 	cmp	w20, w0
-	bne	.L876
+	bne	.L889
 	ldr	x1, [x29, 104]
 	mov	w0, 179
 	str	w0, [x1, 8]
-.L876:
+.L889:
 	add	x0, x22, x27, lsl 8
 	mov	w1, 38
 	str	w1, [x0, 2056]
 	mov	w1, 93
 	str	w1, [x0, 2056]
-	cbz	w23, .L877
+	cbz	w23, .L890
 	mov	w0, 4
 	bl	NandcSetDdrMode
 	ldr	w1, [x29, 120]
@@ -6120,35 +6239,35 @@ ToshibaReadRetrial:
 	mov	w28, w0
 	mov	w0, 0
 	bl	NandcSetDdrMode
-.L878:
+.L891:
 	cmn	w28, #1
-	beq	.L879
-	adrp	x0, .LANCHOR32
+	beq	.L892
+	adrp	x0, .LANCHOR33
 	cmn	w24, #1
 	csel	w24, w24, w28, ne
-	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L881
+	bcc	.L894
 	mov	x26, 0
 	mov	x25, 0
-.L879:
+.L892:
 	add	w20, w20, 1
-	b	.L873
-.L874:
+	b	.L886
+.L887:
 	bl	ToshibaSetRRPara
-	b	.L875
-.L877:
+	b	.L888
+.L890:
 	ldr	w1, [x29, 120]
 	mov	x3, x26
 	mov	x2, x25
 	mov	w0, w21
 	bl	FlashReadRawPage
 	mov	w28, w0
-	b	.L878
-.L883:
+	b	.L891
+.L896:
 	bl	ToshibaSetRRPara
-	b	.L884
+	b	.L897
 	.size	ToshibaReadRetrial, .-ToshibaReadRetrial
 	.section	.text.SamsungReadRetrial,"ax",@progbits
 	.align	2
@@ -6168,38 +6287,38 @@ SamsungReadRetrial:
 	str	x27, [sp, 80]
 	mov	x25, x3
 	bl	NandcWaitFlashReady
-	adrp	x26, .LANCHOR148
+	adrp	x26, .LANCHOR151
 	sbfiz	x1, x22, 4, 32
 	adrp	x0, .LANCHOR6
 	add	x0, x0, :lo12:.LANCHOR6
-	adrp	x27, .LANCHOR32
+	adrp	x27, .LANCHOR33
 	add	x2, x0, x1
-	add	x26, x26, :lo12:.LANCHOR148
-	add	x27, x27, :lo12:.LANCHOR32
+	add	x26, x26, :lo12:.LANCHOR151
+	add	x27, x27, :lo12:.LANCHOR33
 	mov	w21, 1
 	ldr	x0, [x0, x1]
 	mov	w19, -1
 	ldrb	w20, [x2, 8]
 	add	x20, x20, 8
 	add	x20, x0, x20, lsl 8
-.L899:
+.L912:
 	ldrb	w0, [x26]
 	add	w0, w0, 1
 	cmp	w21, w0
-	bcc	.L903
-.L902:
+	bcc	.L916
+.L915:
 	mov	x0, x20
 	mov	w1, 0
 	bl	SamsungSetRRPara
-	adrp	x0, .LANCHOR32
-	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	adrp	x0, .LANCHOR33
+	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L898
+	bcc	.L911
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L898:
+.L911:
 	mov	w0, w19
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -6208,7 +6327,7 @@ SamsungReadRetrial:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L903:
+.L916:
 	mov	w1, w21
 	mov	x0, x20
 	bl	SamsungSetRRPara
@@ -6218,141 +6337,171 @@ SamsungReadRetrial:
 	mov	w0, w22
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	beq	.L900
+	beq	.L913
 	ldrb	w1, [x27]
 	cmn	w19, #1
 	csel	w19, w19, w0, ne
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L905
+	bcc	.L918
 	mov	x25, 0
 	mov	x24, 0
-.L900:
+.L913:
 	add	w21, w21, 1
-	b	.L899
-.L905:
+	b	.L912
+.L918:
 	mov	w19, w0
-	b	.L902
+	b	.L915
 	.size	SamsungReadRetrial, .-SamsungReadRetrial
 	.section	.text.MicronReadRetrial,"ax",@progbits
 	.align	2
 	.global	MicronReadRetrial
 	.type	MicronReadRetrial, %function
 MicronReadRetrial:
-	stp	x29, x30, [sp, -128]!
+	stp	x29, x30, [sp, -144]!
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	and	w23, w0, 255
-	adrp	x0, .LANCHOR32
 	stp	x19, x20, [sp, 16]
-	stp	x25, x26, [sp, 64]
-	mov	w24, w1
-	ldrb	w20, [x0, #:lo12:.LANCHOR32]
+	and	w20, w0, 255
+	adrp	x0, .LANCHOR33
+	stp	x23, x24, [sp, 48]
+	str	w1, [x29, 140]
+	mov	x24, x2
+	ldrb	w19, [x0, #:lo12:.LANCHOR33]
 	adrp	x0, .LANCHOR8
+	stp	x25, x26, [sp, 64]
+	mov	x25, x3
+	ldrb	w1, [x0, #:lo12:.LANCHOR8]
 	stp	x21, x22, [sp, 32]
-	mov	x25, x2
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	mov	x26, x3
 	stp	x27, x28, [sp, 80]
-	cbnz	w0, .L913
-	add	w20, w20, w20, lsl 1
-	asr	w20, w20, 2
-.L914:
-	mov	w0, w23
-	bl	NandcWaitFlashReady
-	sbfiz	x1, x23, 4, 32
-	adrp	x0, .LANCHOR6
-	add	x0, x0, :lo12:.LANCHOR6
-	adrp	x28, .LANCHOR148
-	add	x2, x0, x1
-	add	x28, x28, :lo12:.LANCHOR148
-	mov	w27, 0
-	mov	w19, -1
-	ldr	x4, [x0, x1]
-	mov	w6, 239
-	ldrb	w21, [x2, 8]
-	mov	w7, 137
-	add	x22, x4, x21, lsl 8
-.L915:
-	ldrb	w0, [x28]
-	cmp	w27, w0
-	bcc	.L919
-.L918:
-	add	x21, x4, x21, lsl 8
+	str	x0, [x29, 128]
+	cbnz	w1, .L926
+	add	w19, w19, w19, lsl 1
+	asr	w19, w19, 2
+.L927:
+	adrp	x21, .LANCHOR6
+	add	x21, x21, :lo12:.LANCHOR6
+	add	x21, x21, x20, sxtw 4
+	mov	w23, 0
+	mov	w28, 137
+.L937:
+	mov	w0, w20
+	bl	NandcWaitFlashReady
+	ldrb	w4, [x21, 8]
+	adrp	x7, .LANCHOR151
+	ldr	x8, [x21]
+	add	x7, x7, :lo12:.LANCHOR151
+	mov	w22, 0
+	mov	w26, -1
+	add	x27, x8, x4, lsl 8
+.L928:
+	ldrb	w0, [x7]
+	cmp	w22, w0
+	bcc	.L932
+.L931:
+	add	x4, x8, x4, lsl 8
 	mov	w0, 239
-	str	w0, [x21, 2056]
-	mov	w0, 137
-	str	w0, [x21, 2052]
+	str	x4, [x29, 120]
+	str	w0, [x4, 2056]
 	mov	x0, 200
+	str	w28, [x4, 2052]
 	bl	udelay
-	str	wzr, [x21, 2048]
-	str	wzr, [x21, 2048]
-	cmp	w19, w20
-	str	wzr, [x21, 2048]
-	str	wzr, [x21, 2048]
-	bcc	.L920
-	cmn	w19, #1
+	ldr	x4, [x29, 120]
+	cmp	w26, w19
+	str	wzr, [x4, 2048]
+	str	wzr, [x4, 2048]
+	str	wzr, [x4, 2048]
+	str	wzr, [x4, 2048]
+	bcc	.L933
+	cmn	w26, #1
 	mov	w0, 256
-	csel	w19, w19, w0, eq
-.L920:
-	cmp	w19, 256
-	ccmn	w19, #1, 4, ne
-	bne	.L912
-	adrp	x0, .LC14
-	mov	w4, w19
-	mov	w3, w27
-	mov	w2, w24
-	mov	w1, w27
-	add	x0, x0, :lo12:.LC14
+	csel	w26, w26, w0, eq
+.L933:
+	cmp	w26, 256
+	ccmn	w26, #1, 4, ne
+	bne	.L934
+	ldr	w2, [x29, 140]
+	adrp	x0, .LC13
+	mov	w4, w26
+	mov	w3, w22
+	mov	w1, w22
+	add	x0, x0, :lo12:.LC13
 	bl	printf
-.L912:
-	mov	w0, w19
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 128
-	ret
-.L913:
+	cbnz	w23, .L935
+	ldr	x0, [x29, 128]
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	cbz	w0, .L925
+	cmn	w26, #1
+	bne	.L925
+	mov	w1, 3
+	mov	w0, w20
+	mov	w23, 1
+	bl	micron_auto_read_calibration_config
+	b	.L937
+.L926:
 	mov	w0, 3
-	sdiv	w20, w20, w0
-	b	.L914
-.L919:
-	str	w6, [x22, 2056]
+	sdiv	w19, w19, w0
+	b	.L927
+.L932:
+	mov	w0, 239
+	str	w0, [x27, 2056]
+	str	w28, [x27, 2052]
 	mov	x0, 200
-	str	w7, [x22, 2052]
-	str	x4, [x29, 104]
-	stp	w6, w7, [x29, 116]
+	stp	x4, x7, [x29, 96]
+	str	x8, [x29, 112]
 	bl	udelay
-	add	w5, w27, 1
-	str	w5, [x22, 2048]
-	str	wzr, [x22, 2048]
-	mov	x3, x26
-	str	wzr, [x22, 2048]
-	mov	x2, x25
-	str	wzr, [x22, 2048]
-	mov	w1, w24
-	str	w5, [x29, 124]
-	mov	w0, w23
+	add	w10, w22, 1
+	str	w10, [x27, 2048]
+	str	wzr, [x27, 2048]
+	mov	x3, x25
+	ldr	w1, [x29, 140]
+	mov	x2, x24
+	str	wzr, [x27, 2048]
+	mov	w0, w20
+	str	wzr, [x27, 2048]
+	str	w10, [x29, 120]
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	ldp	w6, w7, [x29, 116]
-	ldr	w5, [x29, 124]
-	ldr	x4, [x29, 104]
-	beq	.L916
-	cmn	w19, #1
-	csel	w19, w19, w0, ne
-	cmp	w0, w20
-	bcc	.L922
-	mov	x26, 0
+	ldr	w10, [x29, 120]
+	ldp	x4, x7, [x29, 96]
+	ldr	x8, [x29, 112]
+	beq	.L929
+	cmn	w26, #1
+	csel	w26, w26, w0, ne
+	cmp	w0, w19
+	bcc	.L939
 	mov	x25, 0
-.L916:
-	mov	w27, w5
-	b	.L915
-.L922:
-	mov	w19, w0
-	b	.L918
+	mov	x24, 0
+.L929:
+	mov	w22, w10
+	b	.L928
+.L939:
+	mov	w26, w0
+	mov	x25, 0
+	mov	x24, 0
+	b	.L931
+.L935:
+	mov	w0, w20
+	mov	w1, 0
+	bl	micron_auto_read_calibration_config
+	cmn	w26, #1
+	mov	w0, 256
+	csel	w26, w26, w0, eq
+.L925:
+	mov	w0, w26
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 144
+	ret
+.L934:
+	cbz	w23, .L925
+	mov	w1, 0
+	mov	w0, w20
+	mov	w26, 256
+	bl	micron_auto_read_calibration_config
+	b	.L925
 	.size	MicronReadRetrial, .-MicronReadRetrial
 	.section	.text.HynixReadRetrial,"ax",@progbits
 	.align	2
@@ -6380,38 +6529,38 @@ HynixReadRetrial:
 	ldrb	w20, [x0, 12]
 	ldrb	w1, [x1, 19]
 	cmp	w1, 7
-	bne	.L933
+	bne	.L951
 	ldrb	w20, [x0, 20]
-.L933:
+.L951:
 	mov	w0, w23
 	bl	NandcWaitFlashReady
 	add	x6, x19, :lo12:.LANCHOR20
-	adrp	x5, .LANCHOR32
+	adrp	x5, .LANCHOR33
 	add	x7, x6, 4
-	add	x5, x5, :lo12:.LANCHOR32
+	add	x5, x5, :lo12:.LANCHOR33
 	mov	w4, 0
 	mov	w21, -1
-.L934:
+.L952:
 	cmp	w4, w24
-	bcc	.L939
-.L938:
+	bcc	.L957
+.L956:
 	ldr	x0, [x22, #:lo12:.LANCHOR18]
 	add	x19, x19, :lo12:.LANCHOR20
 	add	x19, x19, x28
 	ldrb	w0, [x0, 19]
 	cmp	w0, 7
-	bne	.L940
+	bne	.L958
 	strb	w20, [x19, 20]
-.L941:
-	adrp	x0, .LANCHOR32
-	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+.L959:
+	adrp	x0, .LANCHOR33
+	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w21, w0, lsr 2
-	bcc	.L932
+	bcc	.L950
 	cmn	w21, #1
 	mov	w0, 256
 	csel	w21, w21, w0, eq
-.L932:
+.L950:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6420,7 +6569,7 @@ HynixReadRetrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L939:
+.L957:
 	add	w20, w20, 1
 	ldrb	w1, [x6, 1]
 	and	w20, w20, 255
@@ -6442,24 +6591,24 @@ HynixReadRetrial:
 	ldr	w4, [x29, 108]
 	ldr	x5, [x29, 96]
 	ldp	x7, x6, [x29, 112]
-	beq	.L936
+	beq	.L954
 	ldrb	w1, [x5]
 	cmn	w21, #1
 	csel	w21, w21, w0, ne
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L943
+	bcc	.L961
 	mov	x27, 0
 	mov	x26, 0
-.L936:
+.L954:
 	add	w4, w4, 1
-	b	.L934
-.L943:
+	b	.L952
+.L961:
 	mov	w21, w0
-	b	.L938
-.L940:
+	b	.L956
+.L958:
 	strb	w20, [x19, 12]
-	b	.L941
+	b	.L959
 	.size	HynixReadRetrial, .-HynixReadRetrial
 	.section	.text.FlashProgPage,"ax",@progbits
 	.align	2
@@ -6471,25 +6620,25 @@ FlashProgPage:
 	stp	x19, x20, [sp, 16]
 	mov	w20, w1
 	stp	x21, x22, [sp, 32]
-	adrp	x1, .LANCHOR30+9
+	adrp	x1, .LANCHOR31+9
 	str	x23, [sp, 48]
 	mov	x22, x2
-	ldrb	w21, [x1, #:lo12:.LANCHOR30+9]
+	ldrb	w21, [x1, #:lo12:.LANCHOR31+9]
 	ands	w19, w0, 255
 	mov	x23, x3
-	bne	.L951
+	bne	.L969
 	adrp	x0, .LANCHOR2
 	adrp	x1, .LANCHOR3
 	ldrb	w0, [x0, #:lo12:.LANCHOR2]
 	ldr	w1, [x1, #:lo12:.LANCHOR3]
 	mul	w0, w0, w1
 	cmp	w0, w20
-	bls	.L951
+	bls	.L969
 	adrp	x0, .LANCHOR1
 	ldrb	w0, [x0, #:lo12:.LANCHOR1]
-	cbnz	w0, .L952
+	cbnz	w0, .L970
 	sub	w21, w21, #2
-.L951:
+.L969:
 	mov	w0, w19
 	bl	NandcWaitFlashReady
 	mov	w0, w19
@@ -6520,9 +6669,9 @@ FlashProgPage:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L952:
+.L970:
 	mov	w21, 4
-	b	.L951
+	b	.L969
 	.size	FlashProgPage, .-FlashProgPage
 	.section	.text.FlashSavePhyInfo,"ax",@progbits
 	.align	2
@@ -6532,30 +6681,30 @@ FlashSavePhyInfo:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR144
+	adrp	x22, .LANCHOR147
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR143
-	ldr	x0, [x22, #:lo12:.LANCHOR144]
+	adrp	x19, .LANCHOR146
+	ldr	x0, [x22, #:lo12:.LANCHOR147]
 	adrp	x21, .LANCHOR3
-	str	x0, [x19, #:lo12:.LANCHOR143]
+	str	x0, [x19, #:lo12:.LANCHOR146]
 	mov	w20, 0
-	adrp	x0, .LANCHOR149
+	adrp	x0, .LANCHOR152
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	mov	w25, 20036
-	ldrb	w0, [x0, #:lo12:.LANCHOR149]
+	ldrb	w0, [x0, #:lo12:.LANCHOR152]
 	movk	w25, 0x4e41, lsl 16
-	adrp	x24, .LANCHOR150
-	adrp	x26, .LANCHOR146
+	adrp	x24, .LANCHOR153
+	adrp	x26, .LANCHOR149
 	mov	w23, 0
 	add	x21, x21, :lo12:.LANCHOR3
-	add	x26, x26, :lo12:.LANCHOR146
+	add	x26, x26, :lo12:.LANCHOR149
 	bl	FlashBchSel
-	ldr	x0, [x22, #:lo12:.LANCHOR144]
+	ldr	x0, [x22, #:lo12:.LANCHOR147]
 	mov	w2, 2048
 	mov	w1, 0
 	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR143]
+	ldr	x0, [x19, #:lo12:.LANCHOR146]
 	adrp	x1, .LANCHOR25
 	mov	w2, 32
 	add	x0, x0, 16
@@ -6565,54 +6714,54 @@ FlashSavePhyInfo:
 	adrp	x1, .LANCHOR2
 	ldrb	w1, [x1, #:lo12:.LANCHOR2]
 	strh	w1, [x0, -2]
-	adrp	x1, .LANCHOR29
-	ldrb	w1, [x1, #:lo12:.LANCHOR29]
+	adrp	x1, .LANCHOR30
+	ldrb	w1, [x1, #:lo12:.LANCHOR30]
 	str	w1, [x0, 1060]
 	adrp	x1, .LANCHOR22
 	add	x1, x1, :lo12:.LANCHOR22
 	bl	ftl_memcpy
-	ldr	x0, [x19, #:lo12:.LANCHOR143]
+	ldr	x0, [x19, #:lo12:.LANCHOR146]
 	mov	w2, 8
 	adrp	x1, .LANCHOR26
 	add	x1, x1, :lo12:.LANCHOR26
 	add	x0, x0, 80
 	bl	ftl_memcpy
-	ldr	x0, [x19, #:lo12:.LANCHOR143]
+	ldr	x0, [x19, #:lo12:.LANCHOR146]
 	mov	w2, 32
 	adrp	x1, .LANCHOR17
 	add	x1, x1, :lo12:.LANCHOR17
 	add	x0, x0, 96
 	bl	ftl_memcpy
-	ldr	x0, [x19, #:lo12:.LANCHOR143]
+	ldr	x0, [x19, #:lo12:.LANCHOR146]
 	mov	w2, 32
-	adrp	x1, .LANCHOR30
-	add	x1, x1, :lo12:.LANCHOR30
+	adrp	x1, .LANCHOR31
+	add	x1, x1, :lo12:.LANCHOR31
 	add	x0, x0, 160
 	bl	ftl_memcpy
-	ldr	x0, [x19, #:lo12:.LANCHOR143]
+	ldr	x0, [x19, #:lo12:.LANCHOR146]
 	mov	w2, 32
 	adrp	x1, .LANCHOR7
 	add	x1, x1, :lo12:.LANCHOR7
 	add	x0, x0, 192
 	bl	ftl_memcpy
-	ldr	x0, [x19, #:lo12:.LANCHOR143]
+	ldr	x0, [x19, #:lo12:.LANCHOR146]
 	mov	w2, 852
 	adrp	x1, .LANCHOR20
 	add	x1, x1, :lo12:.LANCHOR20
 	add	x0, x0, 224
 	bl	ftl_memcpy
-	ldr	x6, [x19, #:lo12:.LANCHOR143]
+	ldr	x6, [x19, #:lo12:.LANCHOR146]
 	mov	w1, 2036
 	add	x0, x6, 12
 	bl	JSHash
 	str	w0, [x6, 8]
 	mov	w0, 1592
 	str	w0, [x6, 4]
-	ldr	x0, [x24, #:lo12:.LANCHOR150]
-	str	x0, [x19, #:lo12:.LANCHOR143]
+	ldr	x0, [x24, #:lo12:.LANCHOR153]
+	str	x0, [x19, #:lo12:.LANCHOR146]
 	mov	w0, 0
 	bl	flash_enter_slc_mode
-.L957:
+.L975:
 	ldr	w1, [x21]
 	mov	w2, 0
 	mov	w0, 0
@@ -6620,49 +6769,49 @@ FlashSavePhyInfo:
 	bl	FlashEraseBlock
 	ldr	w1, [x21]
 	mov	x3, 0
-	ldr	x2, [x22, #:lo12:.LANCHOR144]
+	ldr	x2, [x22, #:lo12:.LANCHOR147]
 	mov	w0, 0
 	mul	w1, w20, w1
 	bl	FlashProgPage
 	ldr	w1, [x21]
 	mov	x3, 0
-	ldr	x2, [x22, #:lo12:.LANCHOR144]
+	ldr	x2, [x22, #:lo12:.LANCHOR147]
 	mov	w0, 0
 	mul	w1, w20, w1
 	add	w1, w1, 1
 	bl	FlashProgPage
 	ldr	w1, [x21]
 	mov	x3, 0
-	ldr	x2, [x24, #:lo12:.LANCHOR150]
+	ldr	x2, [x24, #:lo12:.LANCHOR153]
 	mov	w0, 0
 	mul	w1, w20, w1
 	bl	FlashReadRawPage
 	cmn	w0, #1
 	add	w7, w20, 1
-	beq	.L955
-	ldr	x6, [x19, #:lo12:.LANCHOR143]
+	beq	.L973
+	ldr	x6, [x19, #:lo12:.LANCHOR146]
 	ldr	w0, [x6]
 	cmp	w0, w25
-	bne	.L955
+	bne	.L973
 	mov	w1, 2036
 	add	x0, x6, 12
 	bl	JSHash
 	ldr	w1, [x6, 8]
 	cmp	w1, w0
-	bne	.L955
+	bne	.L973
 	ldr	w0, [x21]
 	cmp	w23, 1
 	str	w7, [x26]
 	mul	w20, w0, w20
-	adrp	x0, .LANCHOR145
-	str	w20, [x0, #:lo12:.LANCHOR145]
-	beq	.L958
+	adrp	x0, .LANCHOR148
+	str	w20, [x0, #:lo12:.LANCHOR148]
+	beq	.L976
 	mov	w23, 1
-.L955:
+.L973:
 	mov	w20, w7
 	cmp	w7, 4
-	bne	.L957
-.L956:
+	bne	.L975
+.L974:
 	mov	w0, 0
 	bl	flash_exit_slc_mode
 	cmp	w23, 0
@@ -6673,9 +6822,9 @@ FlashSavePhyInfo:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L958:
+.L976:
 	mov	w23, 2
-	b	.L956
+	b	.L974
 	.size	FlashSavePhyInfo, .-FlashSavePhyInfo
 	.section	.text.FlashReadIdbDataRaw,"ax",@progbits
 	.align	2
@@ -6697,19 +6846,19 @@ FlashReadIdbDataRaw:
 	strb	w0, [x29, 138]
 	mov	w0, 16
 	strb	w0, [x29, 139]
-	adrp	x0, .LANCHOR32
+	adrp	x0, .LANCHOR33
 	stp	x19, x20, [sp, 16]
-	ldrb	w26, [x0, #:lo12:.LANCHOR32]
-	adrp	x0, .LANCHOR151
+	ldrb	w26, [x0, #:lo12:.LANCHOR33]
+	adrp	x0, .LANCHOR29
 	stp	x21, x22, [sp, 32]
-	ldr	w2, [x0, #:lo12:.LANCHOR151]
+	ldr	w2, [x0, #:lo12:.LANCHOR29]
 	stp	x27, x28, [sp, 80]
 	str	x0, [x29, 120]
 	cmp	w2, w1
-	bne	.L965
+	bne	.L983
 	mov	w0, 0
 	bl	flash_enter_slc_mode
-.L965:
+.L983:
 	adrp	x24, .LANCHOR2
 	adrp	x22, .LANCHOR3
 	add	x27, x29, 136
@@ -6721,22 +6870,22 @@ FlashReadIdbDataRaw:
 	mov	w1, 0
 	mov	x0, x23
 	bl	ftl_memset
-.L966:
+.L984:
 	ldrb	w0, [x24, #:lo12:.LANCHOR2]
 	cmp	w19, w0
-	bcc	.L971
-.L970:
+	bcc	.L989
+.L988:
 	mov	w0, w26
 	bl	FlashBchSel
 	ldr	x0, [x29, 120]
-	ldr	w1, [x0, #:lo12:.LANCHOR151]
+	ldr	w1, [x0, #:lo12:.LANCHOR29]
 	mov	w0, 12336
 	movk	w0, 0x5638, lsl 16
 	cmp	w1, w0
-	bne	.L964
+	bne	.L982
 	mov	w0, 0
 	bl	flash_exit_slc_mode
-.L964:
+.L982:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6745,45 +6894,45 @@ FlashReadIdbDataRaw:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L971:
+.L989:
 	mov	x4, 0
-	adrp	x25, .LANCHOR144
-.L968:
+	adrp	x25, .LANCHOR147
+.L986:
 	ldrb	w5, [x4, x27]
-	add	x21, x25, :lo12:.LANCHOR144
+	add	x21, x25, :lo12:.LANCHOR147
 	str	w5, [x29, 116]
 	mov	w0, w5
 	str	x4, [x29, 104]
 	bl	FlashBchSel
 	ldr	w1, [x22]
 	mov	x3, 0
-	ldr	x2, [x25, #:lo12:.LANCHOR144]
+	ldr	x2, [x25, #:lo12:.LANCHOR147]
 	mov	w0, 0
 	mul	w1, w19, w1
 	bl	FlashReadRawPage
 	cmn	w0, #1
 	ldr	w5, [x29, 116]
-	bne	.L967
+	bne	.L985
 	ldr	x4, [x29, 104]
 	add	x4, x4, 1
 	cmp	x4, 4
-	bne	.L968
-.L969:
+	bne	.L986
+.L987:
 	add	w19, w19, 1
-	b	.L966
-.L974:
+	b	.L984
+.L992:
 	mov	w20, 0
-	b	.L970
-.L967:
+	b	.L988
+.L985:
 	ldr	x0, [x21]
 	ldr	w1, [x0]
 	mov	w0, 35899
 	movk	w0, 0xfcdc, lsl 16
 	cmp	w1, w0
-	bne	.L969
+	bne	.L987
 	mov	w1, w5
-	adrp	x0, .LC15
-	add	x0, x0, :lo12:.LC15
+	adrp	x0, .LC14
+	add	x0, x0, :lo12:.LC14
 	bl	printf
 	ldr	x1, [x21]
 	mov	w2, 2048
@@ -6792,14 +6941,14 @@ FlashReadIdbDataRaw:
 	ldr	x0, [x21]
 	ldr	w0, [x0, 512]
 	strb	w0, [x28]
-	adrp	x0, .LANCHOR146
-	ldr	w1, [x0, #:lo12:.LANCHOR146]
+	adrp	x0, .LANCHOR149
+	ldr	w1, [x0, #:lo12:.LANCHOR149]
 	cmp	w19, w1
-	bcs	.L974
-	str	w19, [x0, #:lo12:.LANCHOR146]
+	bcs	.L992
+	str	w19, [x0, #:lo12:.LANCHOR149]
 	mov	w20, 0
 	bl	FlashSavePhyInfo
-	b	.L969
+	b	.L987
 	.size	FlashReadIdbDataRaw, .-FlashReadIdbDataRaw
 	.section	.text.FlashPageProgMsbFFData,"ax",@progbits
 	.align	2
@@ -6820,179 +6969,528 @@ FlashPageProgMsbFFData:
 	stp	x23, x24, [sp, 48]
 	str	x25, [sp, 64]
 	ldrb	w0, [x0, 19]
-	cbz	w3, .L978
-	adrp	x2, .LANCHOR151
-	ldr	w3, [x2, #:lo12:.LANCHOR151]
+	cbz	w3, .L996
+	adrp	x2, .LANCHOR29
+	ldr	w3, [x2, #:lo12:.LANCHOR29]
 	mov	w2, 12336
 	movk	w2, 0x5638, lsl 16
 	cmp	w3, w2
-	beq	.L977
-.L978:
+	beq	.L995
+.L996:
 	sub	w0, w0, #5
 	and	w0, w0, 255
 	cmp	w0, 63
-	bhi	.L977
+	bhi	.L995
 	mov	x2, 16391
 	movk	x2, 0x4000, lsl 16
 	movk	x2, 0x8000, lsl 48
 	lsr	x0, x2, x0
-	tbz	x0, 0, .L977
-	adrp	x20, .LANCHOR117
+	tbz	x0, 0, .L995
+	adrp	x20, .LANCHOR120
 	mov	w24, w1
-	add	x20, x20, :lo12:.LANCHOR117
+	add	x20, x20, :lo12:.LANCHOR120
 	mov	w23, 65535
-	adrp	x25, .LANCHOR150
-.L980:
+	adrp	x25, .LANCHOR153
+.L998:
 	ldr	x0, [x22, #:lo12:.LANCHOR18]
 	ldrh	w0, [x0, 10]
 	cmp	w0, w19
-	bhi	.L981
-.L977:
+	bhi	.L999
+.L995:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L981:
+.L999:
 	ldrh	w0, [x20, w19, sxtw 1]
 	cmp	w0, w23
-	bne	.L977
-	ldr	x0, [x25, #:lo12:.LANCHOR150]
+	bne	.L995
+	ldr	x0, [x25, #:lo12:.LANCHOR153]
 	mov	w2, 32768
 	mov	w1, 255
 	bl	ftl_memset
-	ldr	x2, [x25, #:lo12:.LANCHOR150]
+	ldr	x2, [x25, #:lo12:.LANCHOR153]
 	add	w1, w19, w24
 	add	w19, w19, 1
 	mov	x3, 0
 	mov	w0, w21
 	and	w19, w19, 65535
 	bl	FlashProgPage
-	b	.L980
+	b	.L998
 	.size	FlashPageProgMsbFFData, .-FlashPageProgMsbFFData
-	.section	.text.ftl_memcmp,"ax",@progbits
-	.align	2
-	.global	ftl_memcmp
-	.type	ftl_memcmp, %function
-ftl_memcmp:
-	uxtw	x2, w2
-	b	memcmp
-	.size	ftl_memcmp, .-ftl_memcmp
-	.section	.text.rknand_get_clk_rate,"ax",@progbits
-	.align	2
-	.global	rknand_get_clk_rate
-	.type	rknand_get_clk_rate, %function
-rknand_get_clk_rate:
-	mov	w0, 19712
-	movk	w0, 0x8d2, lsl 16
-	ret
-	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
-	.section	.text.ftl_malloc,"ax",@progbits
-	.align	2
-	.global	ftl_malloc
-	.type	ftl_malloc, %function
-ftl_malloc:
-	mov	w1, 0
-	sxtw	x0, w0
-	b	kmalloc
-	.size	ftl_malloc, .-ftl_malloc
-	.section	.text.NandcInit,"ax",@progbits
+	.section	.text.idb_write_data,"ax",@progbits
 	.align	2
-	.global	NandcInit
-	.type	NandcInit, %function
-NandcInit:
-	stp	x29, x30, [sp, -16]!
-	adrp	x2, .LANCHOR6
-	add	x1, x2, :lo12:.LANCHOR6
-	adrp	x4, .LANCHOR151
+	.global	idb_write_data
+	.type	idb_write_data, %function
+idb_write_data:
+	stp	x29, x30, [sp, -240]!
+	add	w0, w1, w3
+	mov	w4, w1
+	cmp	w0, 63
 	add	x29, sp, 0
-	str	x0, [x2, #:lo12:.LANCHOR6]
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	bls	.L1005
+	cmp	w1, 575
+	bhi	.L1006
+	adrp	x0, .LANCHOR154
+	mov	x1, x2
 	mov	w2, 1
-	str	w2, [x1, 24]
-	mov	w2, 2
-	str	wzr, [x1, 8]
-	str	w2, [x1, 40]
-	mov	w2, 3
-	str	x0, [x1, 16]
-	str	w2, [x1, 56]
-	adrp	x2, .LANCHOR152
-	str	x0, [x1, 32]
-	str	x0, [x1, 48]
-	adrp	x1, .LANCHOR19
-	str	x0, [x1, #:lo12:.LANCHOR19]
-	ldr	w1, [x0]
-	ubfx	x3, x1, 13, 1
-	str	w3, [x2, #:lo12:.LANCHOR152]
-	ldr	w2, [x0, 352]
-	adrp	x3, .LANCHOR33
-	and	w1, w1, 245760
-	orr	w1, w1, 256
-	ubfx	x2, x2, 16, 4
-	str	w2, [x3, #:lo12:.LANCHOR33]
-	ldr	w2, [x0, 352]
-	str	w2, [x4, #:lo12:.LANCHOR151]
-	cmp	w2, 2049
-	bne	.L990
-	mov	w2, 8
-	str	w2, [x3, #:lo12:.LANCHOR33]
-.L990:
-	str	w1, [x0]
-	mov	w1, 4225
-	str	wzr, [x0, 336]
-	str	w1, [x0, 4]
-	mov	w1, 8322
-	str	w1, [x0, 344]
-	mov	w1, 6657
-	movk	w1, 0x1a, lsl 16
-	str	w1, [x0, 304]
-	mov	w0, 36864
-	bl	ftl_malloc
-	adrp	x1, .LANCHOR153
-	adrp	x2, .LANCHOR34
-	str	x0, [x1, #:lo12:.LANCHOR153]
-	add	x1, x2, :lo12:.LANCHOR34
-	str	x0, [x2, #:lo12:.LANCHOR34]
-	add	x0, x0, 32768
-	str	wzr, [x1, 40]
-	str	x0, [x1, 8]
-	adrp	x0, .LANCHOR35
-	ldp	x29, x30, [sp], 16
-	str	wzr, [x0, #:lo12:.LANCHOR35]
+	cmp	w4, 64
+	str	w2, [x0, #:lo12:.LANCHOR154]
+	adrp	x0, idb_buf
+	bhi	.L1007
+	mov	w2, 64
+	sub	w4, w2, w4
+	sub	w2, w3, w4
+	ubfiz	x4, x4, 9, 25
+	lsl	w2, w2, 9
+	add	x1, x1, x4
+	add	x0, x0, :lo12:idb_buf
+.L1057:
+	bl	ftl_memcpy
+.L1040:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 240
 	ret
-	.size	NandcInit, .-NandcInit
-	.section	.text.FtlMemInit,"ax",@progbits
-	.align	2
-	.global	FtlMemInit
-	.type	FtlMemInit, %function
-FtlMemInit:
-	stp	x29, x30, [sp, -64]!
-	adrp	x0, .LANCHOR136
-	mov	w1, 65535
-	add	x29, sp, 0
-	strh	wzr, [x0, #:lo12:.LANCHOR136]
+.L1007:
+	mov	w2, 576
+	sub	w2, w2, w4
+	cmp	w3, w2
+	sub	w4, w4, #64
+	csel	w2, w3, w2, ls
+	ubfiz	x4, x4, 9, 25
+	add	x0, x0, :lo12:idb_buf
+	lsl	w2, w2, 9
+	add	x0, x0, x4
+	b	.L1057
+.L1005:
+	cmp	w1, 575
+	bls	.L1040
+.L1006:
 	adrp	x0, .LANCHOR154
-	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR54
-	str	wzr, [x0, #:lo12:.LANCHOR154]
-	adrp	x0, .LANCHOR155
-	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR37
-	str	wzr, [x0, #:lo12:.LANCHOR155]
-	adrp	x0, .LANCHOR156
-	str	x23, [sp, 48]
-	adrp	x21, .LANCHOR57
-	str	wzr, [x0, #:lo12:.LANCHOR156]
-	adrp	x0, .LANCHOR157
-	adrp	x23, .LANCHOR58
-	str	wzr, [x0, #:lo12:.LANCHOR157]
-	adrp	x0, .LANCHOR158
-	str	wzr, [x0, #:lo12:.LANCHOR158]
-	adrp	x0, .LANCHOR159
-	str	wzr, [x0, #:lo12:.LANCHOR159]
-	adrp	x0, .LANCHOR160
-	str	wzr, [x0, #:lo12:.LANCHOR160]
-	adrp	x0, .LANCHOR161
+	str	x0, [x29, 112]
+	ldr	w1, [x0, #:lo12:.LANCHOR154]
+	cbz	w1, .L1040
+	adrp	x21, .LANCHOR18
+	adrp	x1, idb_buf+262140
+	adrp	x25, idb_buf
+	add	x1, x1, :lo12:idb_buf+262140
+	ldr	x0, [x21, #:lo12:.LANCHOR18]
+	add	x5, x25, :lo12:idb_buf
+	mov	w2, 65535
+	mov	w3, 4097
+	ldrb	w20, [x0, 9]
+	ldrh	w0, [x0, 10]
+	mul	w20, w20, w0
+	and	w20, w20, 65535
+	add	w0, w20, 511
+	udiv	w0, w0, w20
+	str	w0, [x29, 172]
+	mov	w0, 0
+.L1011:
+	ldr	w4, [x1]
+	cbnz	w4, .L1009
+	ldr	w4, [x5, w0, uxtw 2]
+	add	w0, w0, 1
+	str	w4, [x1], -4
+	cmp	w0, w3
+	sub	w2, w2, #1
+	csel	w0, w0, wzr, cc
+	cmp	w2, 4096
+	bne	.L1011
+.L1009:
+	add	x0, x25, :lo12:idb_buf
+	mov	w3, 512
+	mov	w23, 0
+	ldr	w1, [x0, w2, uxtw 2]
+	adrp	x0, .LC15
+	add	x0, x0, :lo12:.LC15
+	bl	printf
+	adrp	x0, .LANCHOR149
+	ldr	w24, [x0, #:lo12:.LANCHOR149]
+	ldr	w0, [x29, 172]
+	mul	w19, w20, w24
+	mul	w0, w20, w0
+	str	w0, [x29, 120]
+	adrp	x0, .LANCHOR16
+	add	x0, x0, :lo12:.LANCHOR16
+	str	x0, [x29, 160]
+.L1012:
+	cmp	w24, 15
+	bls	.L1030
+	cbnz	w23, .L1032
+	adrp	x0, .LC17
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC17
+	bl	printf
+.L1032:
+	ldr	x0, [x29, 112]
+	str	wzr, [x0, #:lo12:.LANCHOR154]
+	b	.L1040
+.L1030:
+	adrp	x27, gp_flash_check_buf
+	mov	x2, 512
+	mov	w1, 0
+	add	x0, x27, :lo12:gp_flash_check_buf
+	bl	memset
+	ldr	x0, [x21, #:lo12:.LANCHOR18]
+	ldrb	w22, [x0, 9]
+	ldrh	w26, [x0, 10]
+	mov	w0, w19
+	bl	FW_FlashBlockErase.constprop.41
+	str	x27, [x29, 136]
+	mul	w26, w22, w26
+	and	w26, w26, 65535
+	cmp	w26, 511
+	bhi	.L1013
+	add	w0, w26, w19
+	bl	FW_FlashBlockErase.constprop.41
+.L1013:
+	udiv	w4, w19, w26
+	adrp	x5, .LANCHOR8
+	add	x5, x5, :lo12:.LANCHOR8
+	mov	x28, 0
+	msub	w4, w4, w26, w19
+	sub	w26, w19, w4
+.L1014:
+	add	x6, x25, :lo12:idb_buf
+	cmp	x28, 128
+	add	x6, x6, x28, lsl 11
+	bne	.L1018
+	ldr	x0, [x21, #:lo12:.LANCHOR18]
+	mov	w26, 0
+	ldr	x1, [x29, 136]
+	add	x27, x1, :lo12:gp_flash_check_buf
+	adrp	x1, .LANCHOR8
+	ldrb	w28, [x0, 9]
+	add	x1, x1, :lo12:.LANCHOR8
+	ldrh	w22, [x0, 10]
+	str	x1, [x29, 104]
+	mul	w22, w28, w22
+	and	w0, w22, 65535
+	udiv	w22, w19, w0
+	msub	w22, w22, w0, w19
+	sub	w0, w19, w22
+	str	w0, [x29, 128]
+	mul	w0, w22, w28
+	ubfx	x0, x0, 2, 2
+.L1019:
+	cmp	w26, 511
+	bhi	.L1026
+	ldr	x3, [x29, 104]
+	mov	w1, 4
+	sub	w1, w1, w0
+	add	w2, w22, w26
+	and	w1, w1, 65535
+	str	w1, [x29, 144]
+	ldr	x1, [x29, 160]
+	lsr	w2, w2, 2
+	ldrb	w3, [x3]
+	ldrh	w1, [x1, w2, sxtw 1]
+	cbz	w3, .L1020
+	adrp	x3, .LANCHOR29
+	mov	w4, 12336
+	movk	w4, 0x5638, lsl 16
+	ldr	w3, [x3, #:lo12:.LANCHOR29]
+	cmp	w3, w4
+	csel	w1, w1, w2, ne
+.L1020:
+	ldr	w2, [x29, 128]
+	add	w0, w0, w2
+	madd	w3, w28, w1, w0
+	adrp	x0, .LANCHOR33
+	adrp	x1, .LANCHOR3
+	ldrb	w0, [x0, #:lo12:.LANCHOR33]
+	str	w0, [x29, 124]
+	ldr	x0, [x21, #:lo12:.LANCHOR18]
+	ldr	w1, [x1, #:lo12:.LANCHOR3]
+	ldrb	w4, [x0, 9]
+	adrp	x0, .LANCHOR15+26
+	ldrh	w0, [x0, #:lo12:.LANCHOR15+26]
+	mul	w0, w0, w1
+	mul	w0, w0, w4
+	cmp	w3, w0
+	bcs	.L1021
+	adrp	x0, .LANCHOR152
+	ldrb	w0, [x0, #:lo12:.LANCHOR152]
+	bl	FlashBchSel
+.L1021:
+	mov	w0, 0
+	bl	flash_boot_enter_slc_mode
+	udiv	w1, w3, w4
+	add	x3, x29, 176
+	mov	x2, x27
+	mov	w0, 0
+	str	w1, [x29, 168]
+	bl	FlashReadPage
+	mov	w3, w0
+	cmn	w0, #1
+	bne	.L1022
+	adrp	x0, .LANCHOR152
+	ldrb	w0, [x0, #:lo12:.LANCHOR152]
+	cmp	w0, 40
+	beq	.L1022
+	mov	w0, 40
+	bl	FlashBchSel
+	ldr	w1, [x29, 168]
+	add	x3, x29, 176
+	mov	x2, x27
+	mov	w0, 0
+	bl	FlashReadPage
+	mov	w3, w0
+.L1022:
+	mov	w0, 0
+	bl	flash_boot_exit_slc_mode
+	ldrb	w0, [x29, 124]
+	bl	FlashBchSel
+	cmn	w3, #1
+	bne	.L1023
+.L1026:
+	ldr	x0, [x29, 136]
+	add	x1, x25, :lo12:idb_buf
+	mov	x22, 0
+	add	x26, x0, :lo12:gp_flash_check_buf
+.L1024:
+	lsl	x0, x22, 2
+	mov	w27, w22
+	add	x28, x0, x1
+	ldr	w2, [x0, x26]
+	ldr	w0, [x0, x1]
+	cmp	w2, w0
+	beq	.L1027
+	mov	x2, 512
+	mov	w1, 0
+	mov	x0, x26
+	bl	memset
+	ldr	w2, [x26, w27, uxtw 2]
+	mov	w4, w22
+	ldr	w3, [x28]
+	mov	w1, w19
+	adrp	x0, .LC16
+	add	x0, x0, :lo12:.LC16
+	bl	printf
+	mov	w0, w19
+	bl	FW_FlashBlockErase.constprop.41
+	ldr	w0, [x29, 172]
+	cmp	w0, 1
+	bls	.L1028
+	add	w0, w20, w19
+	bl	FW_FlashBlockErase.constprop.41
+.L1028:
+	ldr	w0, [x29, 172]
+	add	w24, w24, w0
+	ldr	w0, [x29, 120]
+	add	w19, w19, w0
+	b	.L1012
+.L1018:
+	add	w1, w4, w28, lsl 2
+	lsr	w1, w1, 2
+	cbz	w1, .L1015
+	ldr	x0, [x29, 160]
+	add	w2, w1, 1
+	ldrb	w3, [x5]
+	ldrh	w0, [x0, w2, sxtw 1]
+	cbz	w3, .L1016
+	adrp	x3, .LANCHOR29
+	mov	w7, 12336
+	movk	w7, 0x5638, lsl 16
+	ldr	w3, [x3, #:lo12:.LANCHOR29]
+	cmp	w3, w7
+	csel	w0, w0, w2, ne
+.L1016:
+	lsl	w0, w0, 2
+	sub	w0, w0, #4
+	str	w0, [x29, 176]
+.L1015:
+	mov	w0, 61424
+	str	w0, [x29, 180]
+	ldr	x0, [x29, 160]
+	ldrh	w27, [x0, w1, sxtw 1]
+	ldrb	w0, [x5]
+	cbz	w0, .L1017
+	adrp	x0, .LANCHOR29
+	mov	w2, 12336
+	movk	w2, 0x5638, lsl 16
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	cmp	w0, w2
+	csel	w27, w27, w1, ne
+.L1017:
+	adrp	x0, .LANCHOR33
+	madd	w8, w22, w27, w26
+	str	x5, [x29, 128]
+	add	x28, x28, 1
+	ldrb	w7, [x0, #:lo12:.LANCHOR33]
+	adrp	x0, .LANCHOR152
+	str	w4, [x29, 168]
+	ldrb	w0, [x0, #:lo12:.LANCHOR152]
+	str	w7, [x29, 144]
+	bl	FlashBchSel
+	mov	w0, 0
+	bl	flash_boot_enter_slc_mode
+	ldr	x0, [x21, #:lo12:.LANCHOR18]
+	mov	x2, x6
+	add	x3, x29, 176
+	ldrb	w1, [x0, 9]
+	mov	w0, 0
+	udiv	w1, w8, w1
+	bl	FlashProgPage
+	mov	w0, 0
+	bl	flash_boot_exit_slc_mode
+	ldr	w7, [x29, 144]
+	mov	w0, w7
+	bl	FlashBchSel
+	udiv	w1, w26, w22
+	add	w2, w27, 1
+	mov	w0, 0
+	bl	FlashPageProgMsbFFData
+	ldr	w4, [x29, 168]
+	ldr	x5, [x29, 128]
+	b	.L1014
+.L1023:
+	ldr	x0, [x29, 144]
+	ubfiz	x0, x0, 9, 16
+	add	x27, x27, x0
+	ldr	w0, [x29, 144]
+	add	w26, w0, w26
+	mov	w0, 0
+	and	w26, w26, 65535
+	b	.L1019
+.L1027:
+	add	x22, x22, 1
+	cmp	x22, 65536
+	bne	.L1024
+	add	w23, w23, 1
+	cmp	w23, 5
+	bls	.L1028
+	b	.L1032
+	.size	idb_write_data, .-idb_write_data
+	.section	.text.ftl_memcmp,"ax",@progbits
+	.align	2
+	.global	ftl_memcmp
+	.type	ftl_memcmp, %function
+ftl_memcmp:
+	uxtw	x2, w2
+	b	memcmp
+	.size	ftl_memcmp, .-ftl_memcmp
+	.section	.text.rknand_get_clk_rate,"ax",@progbits
+	.align	2
+	.global	rknand_get_clk_rate
+	.type	rknand_get_clk_rate, %function
+rknand_get_clk_rate:
+	mov	w0, 19712
+	movk	w0, 0x8d2, lsl 16
+	ret
+	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
+	.section	.text.ftl_malloc,"ax",@progbits
+	.align	2
+	.global	ftl_malloc
+	.type	ftl_malloc, %function
+ftl_malloc:
+	mov	w1, 0
+	sxtw	x0, w0
+	b	kmalloc
+	.size	ftl_malloc, .-ftl_malloc
+	.section	.text.NandcInit,"ax",@progbits
+	.align	2
+	.global	NandcInit
+	.type	NandcInit, %function
+NandcInit:
+	stp	x29, x30, [sp, -16]!
+	adrp	x2, .LANCHOR6
+	add	x1, x2, :lo12:.LANCHOR6
+	adrp	x4, .LANCHOR29
+	add	x29, sp, 0
+	str	x0, [x2, #:lo12:.LANCHOR6]
+	mov	w2, 1
+	str	w2, [x1, 24]
+	mov	w2, 2
+	str	wzr, [x1, 8]
+	str	w2, [x1, 40]
+	mov	w2, 3
+	str	x0, [x1, 16]
+	str	w2, [x1, 56]
+	adrp	x2, .LANCHOR155
+	str	x0, [x1, 32]
+	str	x0, [x1, 48]
+	adrp	x1, .LANCHOR19
+	str	x0, [x1, #:lo12:.LANCHOR19]
+	ldr	w1, [x0]
+	ubfx	x3, x1, 13, 1
+	str	w3, [x2, #:lo12:.LANCHOR155]
+	ldr	w2, [x0, 352]
+	adrp	x3, .LANCHOR34
+	and	w1, w1, 245760
+	orr	w1, w1, 256
+	ubfx	x2, x2, 16, 4
+	str	w2, [x3, #:lo12:.LANCHOR34]
+	ldr	w2, [x0, 352]
+	str	w2, [x4, #:lo12:.LANCHOR29]
+	cmp	w2, 2049
+	bne	.L1062
+	mov	w2, 8
+	str	w2, [x3, #:lo12:.LANCHOR34]
+.L1062:
+	str	w1, [x0]
+	mov	w1, 4225
+	str	wzr, [x0, 336]
+	str	w1, [x0, 4]
+	mov	w1, 8322
+	str	w1, [x0, 344]
+	mov	w1, 6657
+	movk	w1, 0x1a, lsl 16
+	str	w1, [x0, 304]
+	mov	w0, 36864
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR156
+	adrp	x2, .LANCHOR35
+	str	x0, [x1, #:lo12:.LANCHOR156]
+	add	x1, x2, :lo12:.LANCHOR35
+	str	x0, [x2, #:lo12:.LANCHOR35]
+	add	x0, x0, 32768
+	str	wzr, [x1, 40]
+	str	x0, [x1, 8]
+	adrp	x0, .LANCHOR36
+	ldp	x29, x30, [sp], 16
+	str	wzr, [x0, #:lo12:.LANCHOR36]
+	ret
+	.size	NandcInit, .-NandcInit
+	.section	.text.FtlMemInit,"ax",@progbits
+	.align	2
+	.global	FtlMemInit
+	.type	FtlMemInit, %function
+FtlMemInit:
+	stp	x29, x30, [sp, -64]!
+	adrp	x0, .LANCHOR139
+	mov	w1, 65535
+	add	x29, sp, 0
+	strh	wzr, [x0, #:lo12:.LANCHOR139]
+	adrp	x0, .LANCHOR157
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR55
+	str	wzr, [x0, #:lo12:.LANCHOR157]
+	adrp	x0, .LANCHOR158
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR38
+	str	wzr, [x0, #:lo12:.LANCHOR158]
+	adrp	x0, .LANCHOR159
+	str	x23, [sp, 48]
+	adrp	x21, .LANCHOR58
+	str	wzr, [x0, #:lo12:.LANCHOR159]
+	adrp	x0, .LANCHOR160
+	adrp	x23, .LANCHOR59
+	str	wzr, [x0, #:lo12:.LANCHOR160]
+	adrp	x0, .LANCHOR161
 	str	wzr, [x0, #:lo12:.LANCHOR161]
 	adrp	x0, .LANCHOR162
 	str	wzr, [x0, #:lo12:.LANCHOR162]
@@ -7002,283 +7500,293 @@ FtlMemInit:
 	str	wzr, [x0, #:lo12:.LANCHOR164]
 	adrp	x0, .LANCHOR165
 	str	wzr, [x0, #:lo12:.LANCHOR165]
-	adrp	x0, .LANCHOR79
-	str	wzr, [x0, #:lo12:.LANCHOR79]
 	adrp	x0, .LANCHOR166
 	str	wzr, [x0, #:lo12:.LANCHOR166]
 	adrp	x0, .LANCHOR167
 	str	wzr, [x0, #:lo12:.LANCHOR167]
 	adrp	x0, .LANCHOR168
 	str	wzr, [x0, #:lo12:.LANCHOR168]
+	adrp	x0, .LANCHOR80
+	str	wzr, [x0, #:lo12:.LANCHOR80]
 	adrp	x0, .LANCHOR169
 	str	wzr, [x0, #:lo12:.LANCHOR169]
 	adrp	x0, .LANCHOR170
-	str	w1, [x0, #:lo12:.LANCHOR170]
+	str	wzr, [x0, #:lo12:.LANCHOR170]
 	adrp	x0, .LANCHOR171
-	adrp	x1, .LANCHOR112
 	str	wzr, [x0, #:lo12:.LANCHOR171]
 	adrp	x0, .LANCHOR172
 	str	wzr, [x0, #:lo12:.LANCHOR172]
-	adrp	x0, .LANCHOR73
-	str	wzr, [x0, #:lo12:.LANCHOR73]
-	mov	w0, -1
-	strh	w0, [x1, #:lo12:.LANCHOR112]
-	adrp	x1, .LANCHOR113
-	strh	w0, [x1, #:lo12:.LANCHOR113]
 	adrp	x0, .LANCHOR173
-	mov	w1, 32
-	strh	w1, [x0, #:lo12:.LANCHOR173]
+	str	w1, [x0, #:lo12:.LANCHOR173]
 	adrp	x0, .LANCHOR174
-	mov	w1, 128
-	strh	w1, [x0, #:lo12:.LANCHOR174]
+	adrp	x1, .LANCHOR113
+	str	wzr, [x0, #:lo12:.LANCHOR174]
 	adrp	x0, .LANCHOR175
-	strh	wzr, [x0, #:lo12:.LANCHOR175]
-	adrp	x0, .LANCHOR114
-	strh	wzr, [x0, #:lo12:.LANCHOR114]
+	str	wzr, [x0, #:lo12:.LANCHOR175]
+	adrp	x0, .LANCHOR74
+	str	wzr, [x0, #:lo12:.LANCHOR74]
+	mov	w0, -1
+	strh	w0, [x1, #:lo12:.LANCHOR113]
+	adrp	x1, .LANCHOR114
+	strh	w0, [x1, #:lo12:.LANCHOR114]
+	adrp	x1, .LANCHOR115
+	strh	w0, [x1, #:lo12:.LANCHOR115]
+	adrp	x1, .LANCHOR116
+	strh	w0, [x1, #:lo12:.LANCHOR116]
 	adrp	x0, .LANCHOR176
-	strh	wzr, [x0, #:lo12:.LANCHOR176]
-	adrp	x0, .LANCHOR116
-	strh	wzr, [x0, #:lo12:.LANCHOR116]
-	ldrh	w0, [x19, #:lo12:.LANCHOR54]
+	mov	w1, 32
+	strh	w1, [x0, #:lo12:.LANCHOR176]
+	adrp	x0, .LANCHOR177
+	mov	w1, 128
+	strh	w1, [x0, #:lo12:.LANCHOR177]
+	adrp	x0, .LANCHOR178
+	strh	wzr, [x0, #:lo12:.LANCHOR178]
+	adrp	x0, .LANCHOR117
+	strh	wzr, [x0, #:lo12:.LANCHOR117]
+	adrp	x0, .LANCHOR179
+	strh	wzr, [x0, #:lo12:.LANCHOR179]
+	adrp	x0, .LANCHOR119
+	strh	wzr, [x0, #:lo12:.LANCHOR119]
+	ldrh	w0, [x19, #:lo12:.LANCHOR55]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR109
-	str	x0, [x1, #:lo12:.LANCHOR109]
+	adrp	x1, .LANCHOR110
+	str	x0, [x1, #:lo12:.LANCHOR110]
 	mov	w0, 12
-	ldrh	w1, [x19, #:lo12:.LANCHOR54]
+	ldrh	w1, [x19, #:lo12:.LANCHOR55]
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	ldrh	w19, [x22, #:lo12:.LANCHOR37]
-	adrp	x1, .LANCHOR111
-	str	x0, [x1, #:lo12:.LANCHOR111]
+	ldrh	w19, [x22, #:lo12:.LANCHOR38]
+	adrp	x1, .LANCHOR112
+	str	x0, [x1, #:lo12:.LANCHOR112]
 	mov	w0, 56
 	mul	w19, w19, w0
 	lsl	w20, w19, 2
 	mov	w0, w20
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR177
-	str	x0, [x1, #:lo12:.LANCHOR177]
+	adrp	x1, .LANCHOR180
+	str	x0, [x1, #:lo12:.LANCHOR180]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR178
-	str	x0, [x1, #:lo12:.LANCHOR178]
+	adrp	x1, .LANCHOR181
+	str	x0, [x1, #:lo12:.LANCHOR181]
 	mov	w0, w20
 	bl	ftl_malloc
-	adrp	x20, .LANCHOR107
-	adrp	x1, .LANCHOR179
-	str	x0, [x1, #:lo12:.LANCHOR179]
+	adrp	x20, .LANCHOR108
+	adrp	x1, .LANCHOR182
+	str	x0, [x1, #:lo12:.LANCHOR182]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR77
-	str	x0, [x1, #:lo12:.LANCHOR77]
+	adrp	x1, .LANCHOR78
+	str	x0, [x1, #:lo12:.LANCHOR78]
 	mov	w0, w19
 	bl	ftl_malloc
-	ldrh	w19, [x21, #:lo12:.LANCHOR57]
-	adrp	x1, .LANCHOR106
-	str	x0, [x1, #:lo12:.LANCHOR106]
-	ldrh	w0, [x22, #:lo12:.LANCHOR37]
+	ldrh	w19, [x21, #:lo12:.LANCHOR58]
+	adrp	x1, .LANCHOR107
+	str	x0, [x1, #:lo12:.LANCHOR107]
+	ldrh	w0, [x22, #:lo12:.LANCHOR38]
 	lsl	w0, w0, 1
 	add	w0, w0, 1
-	str	w0, [x20, #:lo12:.LANCHOR107]
+	str	w0, [x20, #:lo12:.LANCHOR108]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR180
-	str	x0, [x1, #:lo12:.LANCHOR180]
+	adrp	x1, .LANCHOR183
+	str	x0, [x1, #:lo12:.LANCHOR183]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR181
-	str	x0, [x1, #:lo12:.LANCHOR181]
+	adrp	x1, .LANCHOR184
+	str	x0, [x1, #:lo12:.LANCHOR184]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR182
-	str	x0, [x1, #:lo12:.LANCHOR182]
-	ldr	w0, [x20, #:lo12:.LANCHOR107]
+	adrp	x1, .LANCHOR185
+	str	x0, [x1, #:lo12:.LANCHOR185]
+	ldr	w0, [x20, #:lo12:.LANCHOR108]
 	mul	w0, w19, w0
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR104
-	str	x0, [x1, #:lo12:.LANCHOR104]
+	adrp	x1, .LANCHOR105
+	str	x0, [x1, #:lo12:.LANCHOR105]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR183
-	str	x0, [x1, #:lo12:.LANCHOR183]
+	adrp	x1, .LANCHOR186
+	str	x0, [x1, #:lo12:.LANCHOR186]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR184
-	str	x0, [x1, #:lo12:.LANCHOR184]
+	adrp	x1, .LANCHOR187
+	str	x0, [x1, #:lo12:.LANCHOR187]
 	mov	w0, 24
-	ldr	w1, [x20, #:lo12:.LANCHOR107]
+	ldr	w1, [x20, #:lo12:.LANCHOR108]
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	ldrh	w19, [x23, #:lo12:.LANCHOR58]
-	adrp	x1, .LANCHOR103
-	str	x0, [x1, #:lo12:.LANCHOR103]
-	ldrh	w0, [x22, #:lo12:.LANCHOR37]
-	adrp	x22, .LANCHOR64
+	ldrh	w19, [x23, #:lo12:.LANCHOR59]
+	adrp	x1, .LANCHOR104
+	str	x0, [x1, #:lo12:.LANCHOR104]
+	ldrh	w0, [x22, #:lo12:.LANCHOR38]
+	adrp	x22, .LANCHOR65
 	mul	w19, w19, w0
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR185
-	str	x0, [x1, #:lo12:.LANCHOR185]
+	adrp	x1, .LANCHOR188
+	str	x0, [x1, #:lo12:.LANCHOR188]
 	lsl	w0, w19, 2
 	bl	ftl_malloc
-	adrp	x19, .LANCHOR40
-	adrp	x1, .LANCHOR186
-	str	x0, [x1, #:lo12:.LANCHOR186]
-	ldrh	w1, [x23, #:lo12:.LANCHOR58]
-	ldr	w0, [x20, #:lo12:.LANCHOR107]
-	adrp	x20, .LANCHOR187
+	adrp	x19, .LANCHOR41
+	adrp	x1, .LANCHOR189
+	str	x0, [x1, #:lo12:.LANCHOR189]
+	ldrh	w1, [x23, #:lo12:.LANCHOR59]
+	ldr	w0, [x20, #:lo12:.LANCHOR108]
+	adrp	x20, .LANCHOR190
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR105
-	str	x0, [x1, #:lo12:.LANCHOR105]
-	ldrh	w0, [x19, #:lo12:.LANCHOR40]
+	adrp	x1, .LANCHOR106
+	str	x0, [x1, #:lo12:.LANCHOR106]
+	ldrh	w0, [x19, #:lo12:.LANCHOR41]
 	ubfiz	w0, w0, 1, 15
-	strh	w0, [x20, #:lo12:.LANCHOR187]
+	strh	w0, [x20, #:lo12:.LANCHOR190]
 	and	w0, w0, 65534
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR134
-	str	x0, [x1, #:lo12:.LANCHOR134]
-	ldrh	w0, [x20, #:lo12:.LANCHOR187]
+	adrp	x1, .LANCHOR137
+	str	x0, [x1, #:lo12:.LANCHOR137]
+	ldrh	w0, [x20, #:lo12:.LANCHOR190]
 	add	x0, x0, 547
 	lsr	x0, x0, 9
-	strh	w0, [x20, #:lo12:.LANCHOR187]
+	strh	w0, [x20, #:lo12:.LANCHOR190]
 	lsl	w0, w0, 9
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR188
-	str	x0, [x1, #:lo12:.LANCHOR188]
-	adrp	x1, .LANCHOR78
+	adrp	x1, .LANCHOR191
+	str	x0, [x1, #:lo12:.LANCHOR191]
+	adrp	x1, .LANCHOR79
 	add	x0, x0, 32
-	str	x0, [x1, #:lo12:.LANCHOR78]
-	ldrh	w0, [x19, #:lo12:.LANCHOR40]
+	str	x0, [x1, #:lo12:.LANCHOR79]
+	ldrh	w0, [x19, #:lo12:.LANCHOR41]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-	ldr	w20, [x22, #:lo12:.LANCHOR64]
-	adrp	x1, .LANCHOR83
-	str	x0, [x1, #:lo12:.LANCHOR83]
+	ldr	w20, [x22, #:lo12:.LANCHOR65]
+	adrp	x1, .LANCHOR84
+	str	x0, [x1, #:lo12:.LANCHOR84]
 	lsl	w20, w20, 1
 	mov	w0, w20
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR126
-	str	x0, [x1, #:lo12:.LANCHOR126]
+	adrp	x1, .LANCHOR129
+	str	x0, [x1, #:lo12:.LANCHOR129]
 	mov	w0, w20
 	bl	ftl_malloc
-	adrp	x20, .LANCHOR61
-	adrp	x1, .LANCHOR122
-	str	x0, [x1, #:lo12:.LANCHOR122]
-	ldrh	w0, [x19, #:lo12:.LANCHOR40]
+	adrp	x20, .LANCHOR62
+	adrp	x1, .LANCHOR125
+	str	x0, [x1, #:lo12:.LANCHOR125]
+	ldrh	w0, [x19, #:lo12:.LANCHOR41]
 	lsr	w0, w0, 3
 	add	w0, w0, 4
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR0
 	str	x0, [x1, #:lo12:.LANCHOR0]
-	ldrh	w0, [x20, #:lo12:.LANCHOR61]
+	ldrh	w0, [x20, #:lo12:.LANCHOR62]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR71
-	str	x0, [x1, #:lo12:.LANCHOR71]
-	ldrh	w0, [x20, #:lo12:.LANCHOR61]
+	adrp	x1, .LANCHOR72
+	str	x0, [x1, #:lo12:.LANCHOR72]
+	ldrh	w0, [x20, #:lo12:.LANCHOR62]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR189
-	str	x0, [x1, #:lo12:.LANCHOR189]
-	ldrh	w0, [x20, #:lo12:.LANCHOR61]
-	adrp	x20, .LANCHOR62
+	adrp	x1, .LANCHOR192
+	str	x0, [x1, #:lo12:.LANCHOR192]
+	ldrh	w0, [x20, #:lo12:.LANCHOR62]
+	adrp	x20, .LANCHOR63
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR190
-	str	x0, [x1, #:lo12:.LANCHOR190]
-	ldrh	w0, [x20, #:lo12:.LANCHOR62]
+	adrp	x1, .LANCHOR193
+	str	x0, [x1, #:lo12:.LANCHOR193]
+	ldrh	w0, [x20, #:lo12:.LANCHOR63]
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	ldrh	w2, [x20, #:lo12:.LANCHOR62]
-	adrp	x1, .LANCHOR191
-	str	x0, [x1, #:lo12:.LANCHOR191]
+	ldrh	w2, [x20, #:lo12:.LANCHOR63]
+	adrp	x1, .LANCHOR194
+	str	x0, [x1, #:lo12:.LANCHOR194]
 	mov	w1, 0
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	adrp	x0, .LANCHOR66
-	ldrh	w20, [x0, #:lo12:.LANCHOR66]
+	adrp	x0, .LANCHOR67
+	ldrh	w20, [x0, #:lo12:.LANCHOR67]
 	lsl	w20, w20, 2
 	mov	w0, w20
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR128
-	str	x0, [x1, #:lo12:.LANCHOR128]
+	adrp	x1, .LANCHOR131
+	str	x0, [x1, #:lo12:.LANCHOR131]
 	mov	w0, w20
 	bl	ftl_malloc
-	adrp	x20, .LANCHOR67
-	adrp	x1, .LANCHOR192
-	str	x0, [x1, #:lo12:.LANCHOR192]
-	ldr	w0, [x22, #:lo12:.LANCHOR64]
+	adrp	x20, .LANCHOR68
+	adrp	x1, .LANCHOR195
+	str	x0, [x1, #:lo12:.LANCHOR195]
+	ldr	w0, [x22, #:lo12:.LANCHOR65]
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR127
-	str	x0, [x1, #:lo12:.LANCHOR127]
-	ldrh	w0, [x20, #:lo12:.LANCHOR67]
+	adrp	x1, .LANCHOR130
+	str	x0, [x1, #:lo12:.LANCHOR130]
+	ldrh	w0, [x20, #:lo12:.LANCHOR68]
 	lsl	w0, w0, 4
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR96
-	str	x0, [x1, #:lo12:.LANCHOR96]
-	ldrh	w1, [x20, #:lo12:.LANCHOR67]
-	adrp	x20, .LANCHOR44
-	ldrh	w0, [x21, #:lo12:.LANCHOR57]
+	adrp	x1, .LANCHOR97
+	str	x0, [x1, #:lo12:.LANCHOR97]
+	ldrh	w1, [x20, #:lo12:.LANCHOR68]
+	adrp	x20, .LANCHOR45
+	ldrh	w0, [x21, #:lo12:.LANCHOR58]
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR123
-	str	x0, [x1, #:lo12:.LANCHOR123]
+	adrp	x1, .LANCHOR126
+	str	x0, [x1, #:lo12:.LANCHOR126]
 	mov	w0, 6
-	ldrh	w1, [x19, #:lo12:.LANCHOR40]
-	adrp	x19, .LANCHOR120
+	ldrh	w1, [x19, #:lo12:.LANCHOR41]
+	adrp	x19, .LANCHOR123
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR81
-	str	x0, [x1, #:lo12:.LANCHOR81]
-	adrp	x0, .LANCHOR50
-	ldrh	w1, [x20, #:lo12:.LANCHOR44]
-	ldrh	w0, [x0, #:lo12:.LANCHOR50]
+	adrp	x1, .LANCHOR82
+	str	x0, [x1, #:lo12:.LANCHOR82]
+	adrp	x0, .LANCHOR51
+	ldrh	w1, [x20, #:lo12:.LANCHOR45]
+	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	add	w0, w0, 31
 	asr	w0, w0, 5
-	strh	w0, [x19, #:lo12:.LANCHOR120]
+	strh	w0, [x19, #:lo12:.LANCHOR123]
 	mul	w0, w1, w0
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR74
-	ldrh	w5, [x19, #:lo12:.LANCHOR120]
-	add	x2, x1, :lo12:.LANCHOR74
-	ldrh	w7, [x20, #:lo12:.LANCHOR44]
+	adrp	x1, .LANCHOR75
+	ldrh	w5, [x19, #:lo12:.LANCHOR123]
+	add	x2, x1, :lo12:.LANCHOR75
+	ldrh	w7, [x20, #:lo12:.LANCHOR45]
 	add	x6, x2, 40
 	mov	w3, w5
 	str	x0, [x2, 32]
 	mov	x0, 1
-.L993:
+.L1065:
 	cmp	w0, w7
-	bcc	.L994
+	bcc	.L1066
 	mov	w2, 8
 	sub	w2, w2, w0
 	add	x2, x2, 1
-	add	x1, x1, :lo12:.LANCHOR74
+	add	x1, x1, :lo12:.LANCHOR75
 	mov	x3, 0
-.L995:
+.L1067:
 	add	x3, x3, 1
 	cmp	x2, x3
-	bne	.L996
+	bne	.L1068
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L994:
+.L1066:
 	ldr	x4, [x2, 32]
 	add	w0, w0, 1
 	add	x4, x4, x3, uxtw 2
 	add	w3, w3, w5
 	str	x4, [x6], 8
-	b	.L993
-.L996:
+	b	.L1065
+.L1068:
 	add	x4, x0, x3
 	add	x4, x1, x4, lsl 3
 	str	xzr, [x4, 24]
-	b	.L995
+	b	.L1067
 	.size	FtlMemInit, .-FtlMemInit
 	.section	.text.ftl_free,"ax",@progbits
 	.align	2
@@ -7309,17 +7817,6 @@ StorageSysDataLoad:
 	mov	w0, 16
 	b	FtlRead
 	.size	StorageSysDataLoad, .-StorageSysDataLoad
-	.section	.text.StorageSysDataStore,"ax",@progbits
-	.align	2
-	.global	StorageSysDataStore
-	.type	StorageSysDataStore, %function
-StorageSysDataStore:
-	mov	x3, x1
-	mov	w2, 1
-	add	w1, w0, 256
-	mov	w0, 16
-	b	FtlWrite
-	.size	StorageSysDataStore, .-StorageSysDataStore
 	.section	.text.FlashBootVendorRead,"ax",@progbits
 	.align	2
 	.global	FlashBootVendorRead
@@ -7331,17 +7828,6 @@ FlashBootVendorRead:
 	mov	w0, 16
 	b	FtlRead
 	.size	FlashBootVendorRead, .-FlashBootVendorRead
-	.section	.text.FlashBootVendorWrite,"ax",@progbits
-	.align	2
-	.global	FlashBootVendorWrite
-	.type	FlashBootVendorWrite, %function
-FlashBootVendorWrite:
-	mov	x3, x2
-	mov	w1, w0
-	mov	w2, 1
-	mov	w0, 16
-	b	FtlWrite
-	.size	FlashBootVendorWrite, .-FlashBootVendorWrite
 	.section	.text.FlashCs123Init,"ax",@progbits
 	.align	2
 	.global	FlashCs123Init
@@ -7361,8 +7847,8 @@ rk_nand_de_init:
 	.global	rk_ftl_get_capacity
 	.type	rk_ftl_get_capacity, %function
 rk_ftl_get_capacity:
-	adrp	x0, .LANCHOR68
-	ldr	w0, [x0, #:lo12:.LANCHOR68]
+	adrp	x0, .LANCHOR69
+	ldr	w0, [x0, #:lo12:.LANCHOR69]
 	ret
 	.size	rk_ftl_get_capacity, .-rk_ftl_get_capacity
 	.section	.text.rknand_print_hex,"ax",@progbits
@@ -7373,67 +7859,67 @@ rknand_print_hex:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LC17
+	adrp	x21, .LC19
 	stp	x23, x24, [sp, 48]
 	mov	x22, x1
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LC16
+	adrp	x23, .LC18
 	mov	x26, x0
 	mov	w24, w2
 	uxtw	x25, w3
-	add	x23, x23, :lo12:.LC16
-	add	x21, x21, :lo12:.LC17
+	add	x23, x23, :lo12:.LC18
+	add	x21, x21, :lo12:.LC19
 	stp	x19, x20, [sp, 16]
 	str	x27, [sp, 80]
 	mov	x19, 0
 	mov	w20, 0
-	adrp	x27, .LC18
-.L1008:
+	adrp	x27, .LC20
+.L1078:
 	cmp	x25, x19
-	bne	.L1014
+	bne	.L1084
 	ldp	x19, x20, [sp, 16]
-	adrp	x1, .LC18
+	adrp	x1, .LC20
 	ldp	x21, x22, [sp, 32]
-	add	x1, x1, :lo12:.LC18
+	add	x1, x1, :lo12:.LC20
 	ldp	x23, x24, [sp, 48]
-	adrp	x0, .LC8
+	adrp	x0, .LC7
 	ldp	x25, x26, [sp, 64]
-	add	x0, x0, :lo12:.LC8
+	add	x0, x0, :lo12:.LC7
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	printf
-.L1014:
-	cbnz	w20, .L1009
+.L1084:
+	cbnz	w20, .L1079
 	mov	w2, w19
 	mov	x1, x26
 	mov	x0, x23
 	bl	printf
-.L1009:
+.L1079:
 	cmp	w24, 4
-	bne	.L1010
+	bne	.L1080
 	ldr	w1, [x22, x19, lsl 2]
-.L1016:
+.L1086:
 	mov	x0, x21
 	add	w20, w20, 1
 	bl	printf
 	cmp	w20, 15
-	bls	.L1013
+	bls	.L1083
 	mov	w20, 0
-	add	x1, x27, :lo12:.LC18
-	adrp	x0, .LC8
-	add	x0, x0, :lo12:.LC8
+	add	x1, x27, :lo12:.LC20
+	adrp	x0, .LC7
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1013:
+.L1083:
 	add	x19, x19, 1
-	b	.L1008
-.L1010:
+	b	.L1078
+.L1080:
 	cmp	w24, 2
-	bne	.L1012
+	bne	.L1082
 	ldrsh	w1, [x22, x19, lsl 1]
-	b	.L1016
-.L1012:
+	b	.L1086
+.L1082:
 	ldrb	w1, [x22, x19]
-	b	.L1016
+	b	.L1086
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.HynixGetReadRetryDefault,"ax",@progbits
 	.align	2
@@ -7460,18 +7946,18 @@ HynixGetReadRetryDefault:
 	strb	w4, [x0, 5]
 	strb	w3, [x0, 6]
 	strb	w1, [x0, 7]
-	bne	.L1018
+	bne	.L1088
 	mov	w1, -89
 	strb	w1, [x0, 4]
-	adrp	x0, .LANCHOR193+17
+	adrp	x0, .LANCHOR196+17
 	mov	w1, -9
-	strb	w1, [x0, #:lo12:.LANCHOR193+17]
-.L1074:
+	strb	w1, [x0, #:lo12:.LANCHOR196+17]
+.L1144:
 	mov	w27, 7
-	b	.L1109
-.L1018:
+	b	.L1179
+.L1088:
 	cmp	w26, 3
-	bne	.L1020
+	bne	.L1090
 	mov	w1, -80
 	strb	w1, [x0, 4]
 	mov	w1, -79
@@ -7487,14 +7973,14 @@ HynixGetReadRetryDefault:
 	mov	w1, -74
 	strb	w1, [x0, 10]
 	mov	w1, -73
-.L1110:
+.L1180:
 	mov	w27, 8
 	mov	w28, w27
 	strb	w1, [x0, 11]
-.L1019:
+.L1089:
 	sub	w0, w26, #1
 	cmp	w0, 1
-	bhi	.L1024
+	bhi	.L1094
 	adrp	x26, .LANCHOR25
 	adrp	x0, .LANCHOR26
 	adrp	x25, .LANCHOR6
@@ -7502,11 +7988,11 @@ HynixGetReadRetryDefault:
 	add	x4, x0, :lo12:.LANCHOR26
 	add	x25, x25, :lo12:.LANCHOR6
 	mov	w24, 0
-.L1025:
+.L1095:
 	ldrb	w0, [x26]
 	cmp	w0, w24
-	bhi	.L1031
-.L1032:
+	bhi	.L1101
+.L1102:
 	add	x20, x20, :lo12:.LANCHOR20
 	ldp	x21, x22, [sp, 32]
 	strb	w28, [x20, 1]
@@ -7517,9 +8003,9 @@ HynixGetReadRetryDefault:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1020:
+.L1090:
 	cmp	w26, 4
-	bne	.L1021
+	bne	.L1091
 	mov	w5, -52
 	strb	w5, [x0, 4]
 	mov	w5, -65
@@ -7532,10 +8018,10 @@ HynixGetReadRetryDefault:
 	mov	w5, -51
 	strb	w3, [x0, 10]
 	strb	w5, [x0, 8]
-	b	.L1110
-.L1021:
+	b	.L1180
+.L1091:
 	cmp	w26, 5
-	bne	.L1022
+	bne	.L1092
 	mov	w1, 56
 	strb	w1, [x0, 4]
 	mov	w1, 57
@@ -7545,12 +8031,12 @@ HynixGetReadRetryDefault:
 	strb	w1, [x0, 6]
 	mov	w1, 59
 	strb	w1, [x0, 7]
-.L1109:
+.L1179:
 	mov	w28, 4
-	b	.L1019
-.L1022:
+	b	.L1089
+.L1092:
 	cmp	w26, 6
-	bne	.L1023
+	bne	.L1093
 	mov	w1, 14
 	strb	w1, [x0, 4]
 	mov	w1, 15
@@ -7560,10 +8046,10 @@ HynixGetReadRetryDefault:
 	strb	w1, [x0, 6]
 	mov	w1, 17
 	strb	w1, [x0, 7]
-	b	.L1109
-.L1023:
+	b	.L1179
+.L1093:
 	cmp	w26, 7
-	bne	.L1074
+	bne	.L1144
 	mov	w1, -80
 	strb	w1, [x0, 4]
 	mov	w1, -79
@@ -7586,8 +8072,8 @@ HynixGetReadRetryDefault:
 	mov	w28, 10
 	mov	w1, -43
 	strb	w1, [x0, 13]
-	b	.L1019
-.L1031:
+	b	.L1089
+.L1101:
 	ldrb	w1, [x4, w24, sxtw]
 	add	x0, x20, :lo12:.LANCHOR20
 	mov	x21, x0
@@ -7601,7 +8087,7 @@ HynixGetReadRetryDefault:
 	ldrb	w23, [x2, 8]
 	add	x23, x1, x23, lsl 8
 	mov	w1, 55
-.L1026:
+.L1096:
 	add	x0, x21, x22
 	str	w1, [x23, 2056]
 	str	x4, [x29, 128]
@@ -7616,15 +8102,15 @@ HynixGetReadRetryDefault:
 	cmp	w28, w22, uxtb
 	ldr	w1, [x29, 140]
 	ldr	x4, [x29, 128]
-	bhi	.L1026
-	adrp	x2, .LANCHOR193
-	add	x2, x2, :lo12:.LANCHOR193
+	bhi	.L1096
+	adrp	x2, .LANCHOR196
+	add	x2, x2, :lo12:.LANCHOR196
 	mov	x0, 0
-.L1029:
+.L1099:
 	add	x7, x19, x0
 	add	x6, x2, x0
 	mov	x1, 1
-.L1028:
+.L1098:
 	lsl	x3, x1, 2
 	lsl	x8, x1, 3
 	ldrb	w10, [x19, x0]
@@ -7633,10 +8119,10 @@ HynixGetReadRetryDefault:
 	ldrb	w3, [x6, x3]
 	add	w3, w3, w10
 	strb	w3, [x7, x8]
-	bne	.L1028
+	bne	.L1098
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L1029
+	bne	.L1099
 	add	w24, w24, 1
 	strb	wzr, [x19, 16]
 	strb	wzr, [x19, 24]
@@ -7646,11 +8132,11 @@ HynixGetReadRetryDefault:
 	strb	wzr, [x19, 48]
 	strb	wzr, [x19, 41]
 	strb	wzr, [x19, 49]
-	b	.L1025
-.L1024:
+	b	.L1095
+.L1094:
 	sub	w0, w26, #3
 	cmp	w0, 4
-	bhi	.L1032
+	bhi	.L1102
 	mul	w24, w27, w28
 	adrp	x25, .LANCHOR25
 	sub	w22, w28, #1
@@ -7667,11 +8153,11 @@ HynixGetReadRetryDefault:
 	str	x0, [x29, 120]
 	add	x0, x22, 1
 	str	x0, [x29, 112]
-.L1033:
+.L1103:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, w21
-	bls	.L1032
+	bls	.L1102
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w22, [x0, w21, sxtw]
@@ -7688,37 +8174,37 @@ HynixGetReadRetryDefault:
 	bl	NandcWaitFlashReady
 	add	x1, x20, :lo12:.LANCHOR20
 	cmp	w26, 7
-	beq	.L1034
+	beq	.L1104
 	ubfiz	x0, x22, 6, 8
 	add	x0, x0, 20
-.L1111:
+.L1181:
 	add	x3, x1, x0
 	mov	w0, 54
 	str	w0, [x19, 2056]
 	cmp	w26, 4
-	bne	.L1036
+	bne	.L1106
 	mov	w0, 255
 	str	w0, [x19, 2052]
 	mov	w0, 64
 	str	w0, [x19, 2048]
 	mov	w0, 204
-.L1112:
+.L1182:
 	str	w0, [x19, 2052]
 	mov	w0, 77
-	b	.L1113
-.L1034:
+	b	.L1183
+.L1104:
 	mov	x3, 28
 	mov	w0, 160
 	umaddl	x0, w0, w22, x3
-	b	.L1111
-.L1036:
+	b	.L1181
+.L1106:
 	cmp	w25, 1
-	bhi	.L1038
+	bhi	.L1108
 	add	x0, x20, :lo12:.LANCHOR20
 	ldrb	w0, [x0, 4]
 	str	w0, [x19, 2052]
 	mov	w0, 82
-.L1113:
+.L1183:
 	str	w0, [x19, 2048]
 	mov	w0, 22
 	str	w0, [x19, 2056]
@@ -7732,10 +8218,10 @@ HynixGetReadRetryDefault:
 	str	wzr, [x19, 2056]
 	str	wzr, [x19, 2052]
 	str	wzr, [x19, 2052]
-	bne	.L1039
+	bne	.L1109
 	mov	w0, 31
 	str	w0, [x19, 2052]
-.L1040:
+.L1110:
 	mov	w7, 2
 	str	w7, [x19, 2052]
 	str	wzr, [x19, 2052]
@@ -7747,187 +8233,187 @@ HynixGetReadRetryDefault:
 	bl	NandcWaitFlashReady
 	cmp	w25, 1
 	ldr	x3, [x29, 104]
-	bls	.L1075
+	bls	.L1145
 	ldr	w7, [x29, 136]
 	cmp	w26, 7
 	mov	w1, 32
 	csel	w1, w1, w7, eq
-.L1041:
-	adrp	x8, .LANCHOR144
+.L1111:
+	adrp	x8, .LANCHOR147
 	mov	x7, 0
-	ldr	x0, [x8, #:lo12:.LANCHOR144]
-.L1042:
+	ldr	x0, [x8, #:lo12:.LANCHOR147]
+.L1112:
 	ldr	w10, [x19, 2048]
 	strb	w10, [x0, x7]
 	add	x7, x7, 1
 	cmp	w1, w7, uxtb
-	bhi	.L1042
+	bhi	.L1112
 	cmp	w26, 7
-	bne	.L1043
+	bne	.L1113
 	mov	w1, 0
-.L1045:
+.L1115:
 	ldrb	w7, [x0]
 	cmp	w7, 12
-	beq	.L1044
+	beq	.L1114
 	ldrb	w7, [x0, 1]
 	cmp	w7, 10
-	beq	.L1044
+	beq	.L1114
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 255
 	cmp	w1, 8
-	bne	.L1045
-.L1046:
-	adrp	x0, .LC19
+	bne	.L1115
+.L1116:
+	adrp	x0, .LC21
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC19
+	add	x0, x0, :lo12:.LC21
 	bl	printf
-.L1048:
-	b	.L1048
-.L1038:
+.L1118:
+	b	.L1118
+.L1108:
 	mov	w0, 174
 	str	w0, [x19, 2052]
 	str	wzr, [x19, 2048]
 	mov	w0, 176
-	b	.L1112
-.L1039:
+	b	.L1182
+.L1109:
 	str	wzr, [x19, 2052]
-	b	.L1040
-.L1075:
+	b	.L1110
+.L1145:
 	mov	w1, 16
-	b	.L1041
-.L1044:
+	b	.L1111
+.L1114:
 	cmp	w1, 6
-	bhi	.L1046
-.L1047:
-	ldr	x7, [x8, #:lo12:.LANCHOR144]
+	bhi	.L1116
+.L1117:
+	ldr	x7, [x8, #:lo12:.LANCHOR147]
 	mov	x0, 0
-.L1052:
+.L1122:
 	ldr	w1, [x29, 128]
 	cmp	w1, w0
-	bgt	.L1053
-	ldr	x1, [x8, #:lo12:.LANCHOR144]
+	bgt	.L1123
+	ldr	x1, [x8, #:lo12:.LANCHOR147]
 	mov	w10, 8
 	add	x8, x1, x24
-.L1055:
+.L1125:
 	mov	x0, 0
-.L1054:
+.L1124:
 	ldr	w11, [x8, x0, lsl 2]
 	mvn	w11, w11
 	str	w11, [x8, x0, lsl 2]
 	add	x0, x0, 1
 	cmp	w23, w0
-	bgt	.L1054
+	bgt	.L1124
 	ldr	w0, [x29, 140]
 	subs	w10, w10, #1
 	add	x8, x8, x0, uxtw 2
-	bne	.L1055
+	bne	.L1125
 	mov	x11, x1
 	mov	w12, 0
 	mov	w16, 1
-.L1061:
+.L1131:
 	mov	w8, 0
 	mov	w0, 0
-.L1060:
+.L1130:
 	mov	x15, x11
 	lsl	w10, w16, w0
 	mov	w14, 16
 	mov	w13, 0
-.L1058:
+.L1128:
 	ldr	w17, [x15]
 	add	x15, x15, x24
 	bics	wzr, w10, w17
 	cinc	w13, w13, eq
 	subs	w14, w14, #1
-	bne	.L1058
+	bne	.L1128
 	cmp	w13, 9
 	orr	w10, w8, w10
 	add	w0, w0, 1
 	csel	w8, w10, w8, cs
 	cmp	w0, 32
-	bne	.L1060
+	bne	.L1130
 	str	w8, [x11], 4
 	add	w12, w12, 1
 	cmp	w23, w12
-	bgt	.L1061
+	bgt	.L1131
 	mov	x0, 0
 	mov	w8, 0
-.L1064:
+.L1134:
 	ldr	w10, [x1, x0]
 	add	x0, x0, 4
 	cmp	w10, 0
 	cinc	w8, w8, eq
 	cmp	x0, 32
-	bne	.L1064
+	bne	.L1134
 	cmp	w8, 7
-	ble	.L1065
+	ble	.L1135
 	mov	w3, 1024
 	mov	w2, 1
-	adrp	x0, .LC20
-	add	x0, x0, :lo12:.LC20
+	adrp	x0, .LC22
+	add	x0, x0, :lo12:.LC22
 	bl	rknand_print_hex
-	adrp	x0, .LC19
+	adrp	x0, .LC21
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC19
+	add	x0, x0, :lo12:.LC21
 	bl	printf
-.L1066:
-	b	.L1066
-.L1043:
+.L1136:
+	b	.L1136
+.L1113:
 	cmp	w26, 6
-	bne	.L1047
+	bne	.L1117
 	mov	x1, 0
-.L1049:
+.L1119:
 	ldrb	w7, [x0, x1]
 	cmp	w7, 12
-	beq	.L1047
+	beq	.L1117
 	add	x7, x0, x1
 	ldrb	w7, [x7, 8]
 	cmp	w7, 4
-	beq	.L1047
+	beq	.L1117
 	add	x1, x1, 1
 	cmp	x1, 8
-	bne	.L1049
-	adrp	x0, .LC19
+	bne	.L1119
+	adrp	x0, .LC21
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC19
+	add	x0, x0, :lo12:.LC21
 	bl	printf
-.L1051:
-	b	.L1051
-.L1053:
+.L1121:
+	b	.L1121
+.L1123:
 	ldr	w1, [x19, 2048]
 	strb	w1, [x7, x0]
 	add	x0, x0, 1
-	b	.L1052
-.L1065:
+	b	.L1122
+.L1135:
 	cmp	w26, 6
-	beq	.L1077
+	beq	.L1147
 	cmp	w26, 7
 	mov	x1, 8
 	mov	x0, 10
 	csel	x0, x0, x1, eq
-.L1067:
+.L1137:
 	mov	x1, x3
 	mov	w8, 0
-.L1068:
+.L1138:
 	mov	x3, 0
-.L1069:
+.L1139:
 	ldrb	w10, [x7, x3]
 	strb	w10, [x1, x3]
 	add	x3, x3, 1
 	cmp	w28, w3, uxtb
-	bhi	.L1069
+	bhi	.L1139
 	ldr	x2, [x29, 112]
 	add	w8, w8, 1
 	add	x1, x1, x0
 	cmp	w27, w8
 	add	x7, x7, x2
-	bgt	.L1068
+	bgt	.L1138
 	mov	w0, 255
 	str	w0, [x19, 2056]
 	mov	w0, w22
 	bl	NandcWaitFlashReady
 	cmp	w25, 1
-	bhi	.L1071
+	bhi	.L1141
 	mov	w0, 54
 	str	w0, [x19, 2056]
 	adrp	x0, .LANCHOR20+4
@@ -7939,19 +8425,19 @@ HynixGetReadRetryDefault:
 	str	w0, [x19, 2056]
 	mov	w0, w21
 	bl	FlashReadCmd
-.L1072:
+.L1142:
 	add	w21, w21, 1
 	mov	w0, w22
 	and	w21, w21, 255
 	bl	NandcWaitFlashReady
-	b	.L1033
-.L1077:
+	b	.L1103
+.L1147:
 	mov	x0, 4
-	b	.L1067
-.L1071:
+	b	.L1137
+.L1141:
 	mov	w0, 56
 	str	w0, [x19, 2056]
-	b	.L1072
+	b	.L1142
 	.size	HynixGetReadRetryDefault, .-HynixGetReadRetryDefault
 	.section	.text.FlashGetReadRetryDefault,"ax",@progbits
 	.align	2
@@ -7959,14 +8445,14 @@ HynixGetReadRetryDefault:
 	.type	FlashGetReadRetryDefault, %function
 FlashGetReadRetryDefault:
 	mov	w1, w0
-	cbz	w0, .L1114
+	cbz	w0, .L1184
 	sub	w2, w0, #1
 	cmp	w2, 6
-	bhi	.L1116
+	bhi	.L1186
 	b	HynixGetReadRetryDefault
-.L1116:
+.L1186:
 	cmp	w0, 49
-	bne	.L1117
+	bne	.L1187
 	adrp	x2, .LANCHOR20
 	add	x0, x2, :lo12:.LANCHOR20
 	strb	w1, [x2, #:lo12:.LANCHOR20]
@@ -7977,41 +8463,41 @@ FlashGetReadRetryDefault:
 	adrp	x1, .LANCHOR14
 	add	x1, x1, :lo12:.LANCHOR14
 	mov	w2, 64
-.L1126:
+.L1196:
 	add	x0, x0, 4
 	b	ftl_memcpy
-.L1117:
+.L1187:
 	sub	w0, w0, #65
 	cmp	w1, 33
 	ccmp	w0, 1, 0, ne
-	bhi	.L1118
+	bhi	.L1188
 	adrp	x2, .LANCHOR20
 	add	x0, x2, :lo12:.LANCHOR20
 	strb	w1, [x2, #:lo12:.LANCHOR20]
 	mov	w1, 4
-.L1127:
+.L1197:
 	strb	w1, [x0, 1]
 	mov	w1, 7
 	mov	w2, 45
 	strb	w1, [x0, 2]
 	adrp	x1, .LANCHOR10
 	add	x1, x1, :lo12:.LANCHOR10
-	b	.L1126
-.L1118:
+	b	.L1196
+.L1188:
 	cmp	w1, 34
 	mov	w0, 67
 	ccmp	w1, w0, 4, ne
-	bne	.L1119
+	bne	.L1189
 	adrp	x2, .LANCHOR20
 	add	x0, x2, :lo12:.LANCHOR20
 	strb	w1, [x2, #:lo12:.LANCHOR20]
 	mov	w1, 5
-	b	.L1127
-.L1119:
+	b	.L1197
+.L1189:
 	cmp	w1, 35
 	mov	w0, 68
 	ccmp	w1, w0, 4, ne
-	bne	.L1114
+	bne	.L1184
 	adrp	x2, .LANCHOR20
 	add	x0, x2, :lo12:.LANCHOR20
 	strb	w1, [x2, #:lo12:.LANCHOR20]
@@ -8022,8 +8508,8 @@ FlashGetReadRetryDefault:
 	strb	w1, [x0, 2]
 	adrp	x1, .LANCHOR9
 	add	x1, x1, :lo12:.LANCHOR9
-	b	.L1126
-.L1114:
+	b	.L1196
+.L1184:
 	ret
 	.size	FlashGetReadRetryDefault, .-FlashGetReadRetryDefault
 	.section	.text.FlashInit,"ax",@progbits
@@ -8040,56 +8526,56 @@ FlashInit:
 	stp	x23, x24, [sp, 48]
 	adrp	x23, .LANCHOR2
 	stp	x25, x26, [sp, 64]
-	adrp	x24, .LANCHOR149
+	adrp	x24, .LANCHOR152
 	stp	x27, x28, [sp, 80]
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR144
-	adrp	x21, .LANCHOR29
+	adrp	x1, .LANCHOR147
+	adrp	x21, .LANCHOR30
 	adrp	x22, .LANCHOR1
 	adrp	x20, .LANCHOR22
-	str	x0, [x1, #:lo12:.LANCHOR144]
+	str	x0, [x1, #:lo12:.LANCHOR147]
 	mov	w0, 32768
 	bl	ftl_malloc
 	adrp	x25, .LANCHOR6
-	adrp	x1, .LANCHOR150
+	adrp	x1, .LANCHOR153
 	add	x25, x25, :lo12:.LANCHOR6
-	adrp	x26, .LC21
+	adrp	x26, .LC23
 	mov	w28, 0
-	str	x0, [x1, #:lo12:.LANCHOR150]
+	str	x0, [x1, #:lo12:.LANCHOR153]
 	mov	w0, 4096
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR194
-	str	x0, [x1, #:lo12:.LANCHOR194]
+	adrp	x1, .LANCHOR197
+	str	x0, [x1, #:lo12:.LANCHOR197]
 	mov	w0, 32768
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR195
-	str	x0, [x1, #:lo12:.LANCHOR195]
+	adrp	x1, .LANCHOR198
+	str	x0, [x1, #:lo12:.LANCHOR198]
 	mov	w0, 4096
 	bl	ftl_malloc
-	strb	wzr, [x21, #:lo12:.LANCHOR29]
-	adrp	x1, .LANCHOR196
+	strb	wzr, [x21, #:lo12:.LANCHOR30]
+	adrp	x1, .LANCHOR199
 	strb	wzr, [x22, #:lo12:.LANCHOR1]
-	str	x0, [x1, #:lo12:.LANCHOR196]
-	adrp	x1, .LANCHOR147
+	str	x0, [x1, #:lo12:.LANCHOR199]
+	adrp	x1, .LANCHOR150
 	mov	w0, 50
 	strb	w0, [x23, #:lo12:.LANCHOR2]
-	strb	w0, [x1, #:lo12:.LANCHOR147]
-	adrp	x0, .LANCHOR146
+	strb	w0, [x1, #:lo12:.LANCHOR150]
+	adrp	x0, .LANCHOR149
 	mov	w1, 128
-	str	wzr, [x0, #:lo12:.LANCHOR146]
+	str	wzr, [x0, #:lo12:.LANCHOR149]
 	adrp	x0, .LANCHOR3
 	str	w1, [x0, #:lo12:.LANCHOR3]
-	adrp	x0, .LANCHOR141
-	str	wzr, [x0, #:lo12:.LANCHOR141]
+	adrp	x0, .LANCHOR144
+	str	wzr, [x0, #:lo12:.LANCHOR144]
 	mov	w0, 60
-	strb	w0, [x24, #:lo12:.LANCHOR149]
+	strb	w0, [x24, #:lo12:.LANCHOR152]
 	mov	x0, x19
 	add	x19, x20, :lo12:.LANCHOR22
 	bl	NandcInit
 	mov	x27, x19
-	add	x0, x26, :lo12:.LC21
+	add	x0, x26, :lo12:.LC23
 	str	x0, [x29, 104]
-.L1133:
+.L1203:
 	and	w26, w28, 255
 	mov	w0, w26
 	bl	FlashReset
@@ -8124,7 +8610,7 @@ FlashInit:
 	sub	w0, w2, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bhi	.L1129
+	bhi	.L1199
 	ldrb	w7, [x19, 5]
 	add	w1, w28, 1
 	ldrb	w6, [x19, 4]
@@ -8133,171 +8619,172 @@ FlashInit:
 	ldrb	w3, [x19, 1]
 	ldr	x0, [x29, 104]
 	bl	printf
-.L1129:
-	cbnz	w28, .L1130
+.L1199:
+	cbnz	w28, .L1200
 	ldrb	w0, [x27]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bhi	.L1171
+	bhi	.L1241
 	ldrb	w0, [x27, 1]
 	cmp	w0, 255
-	beq	.L1171
-.L1130:
+	beq	.L1241
+.L1200:
 	ldrb	w0, [x19]
 	cmp	w0, 181
-	bne	.L1132
+	bne	.L1202
 	mov	w0, 44
 	strb	w0, [x19]
-.L1132:
+.L1202:
 	add	w28, w28, 1
 	add	x25, x25, 16
 	add	x19, x19, 8
 	cmp	w28, 4
-	bne	.L1133
+	bne	.L1203
 	ldrb	w0, [x20, #:lo12:.LANCHOR22]
 	cmp	w0, 173
-	beq	.L1134
-	adrp	x0, .LANCHOR152
-	ldr	w0, [x0, #:lo12:.LANCHOR152]
+	beq	.L1204
+	adrp	x0, .LANCHOR155
+	ldr	w0, [x0, #:lo12:.LANCHOR155]
 	bl	NandcSetDdrMode
-.L1134:
+.L1204:
 	mov	w2, 852
 	adrp	x26, .LANCHOR20
 	mov	w1, 0
 	add	x0, x26, :lo12:.LANCHOR20
 	adrp	x19, .LANCHOR18
 	bl	ftl_memset
-	adrp	x28, .LANCHOR30
-	add	x0, x28, :lo12:.LANCHOR30
+	adrp	x28, .LANCHOR31
+	add	x0, x28, :lo12:.LANCHOR31
 	str	x0, [x19, #:lo12:.LANCHOR18]
 	add	x0, x20, :lo12:.LANCHOR22
 	adrp	x27, .LANCHOR5
 	ldrb	w2, [x0, 1]
 	strb	wzr, [x27, #:lo12:.LANCHOR5]
 	cmp	w2, 161
-	beq	.L1135
+	beq	.L1205
 	cmp	w2, 218
-	beq	.L1135
+	beq	.L1205
 	and	w1, w2, -33
 	cmp	w1, 209
-	beq	.L1135
+	beq	.L1205
 	cmp	w2, 220
-	bne	.L1136
+	bne	.L1206
 	ldrb	w0, [x0, 3]
 	cmp	w0, 149
-	bne	.L1136
-.L1135:
+	bne	.L1206
+.L1205:
 	mov	w0, 1
-	adrp	x25, .LANCHOR197
-	add	x1, x25, :lo12:.LANCHOR197
+	adrp	x25, .LANCHOR200
+	add	x1, x25, :lo12:.LANCHOR200
 	strb	w0, [x22, #:lo12:.LANCHOR1]
 	mov	w0, 16
 	strb	w0, [x23, #:lo12:.LANCHOR2]
-	strb	w0, [x24, #:lo12:.LANCHOR149]
+	strb	w0, [x24, #:lo12:.LANCHOR152]
 	add	x3, x20, :lo12:.LANCHOR22
 	ldrb	w0, [x20, #:lo12:.LANCHOR22]
 	strb	w0, [x1, 1]
 	strb	w2, [x1, 2]
 	cmp	w0, 152
-	bne	.L1137
+	bne	.L1207
 	ldrsb	w0, [x3, 4]
-	tbnz	w0, #31, .L1137
+	tbnz	w0, #31, .L1207
 	mov	w0, 24
-	strb	w0, [x24, #:lo12:.LANCHOR149]
-.L1137:
-	adrp	x0, .LANCHOR151
-	ldr	w1, [x0, #:lo12:.LANCHOR151]
-	mov	w0, 12336
-	movk	w0, 0x5638, lsl 16
-	cmp	w1, w0
-	bne	.L1138
+	strb	w0, [x24, #:lo12:.LANCHOR152]
+.L1207:
+	adrp	x0, .LANCHOR29
+	mov	w1, 12336
+	movk	w1, 0x5638, lsl 16
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	cmp	w0, 2049
+	ccmp	w0, w1, 4, ne
+	bne	.L1208
 	mov	w0, 16
-	strb	w0, [x24, #:lo12:.LANCHOR149]
-.L1138:
+	strb	w0, [x24, #:lo12:.LANCHOR152]
+.L1208:
 	cmp	w2, 218
-	bne	.L1139
-	add	x0, x25, :lo12:.LANCHOR197
+	bne	.L1209
+	add	x0, x25, :lo12:.LANCHOR200
 	mov	w1, 2048
 	strh	w1, [x0, 14]
 	mov	w1, -38
-.L1206:
+.L1279:
 	strb	w1, [x0, 2]
-.L1140:
-	adrp	x1, .LANCHOR140
-	add	x1, x1, :lo12:.LANCHOR140
+.L1210:
+	adrp	x1, .LANCHOR143
+	add	x1, x1, :lo12:.LANCHOR143
 	mov	w2, 32
 	add	x1, x1, 32
 	adrp	x0, .LANCHOR7
 	add	x0, x0, :lo12:.LANCHOR7
 	bl	ftl_memcpy
 	mov	w2, 32
-	add	x1, x25, :lo12:.LANCHOR197
-	add	x0, x28, :lo12:.LANCHOR30
+	add	x1, x25, :lo12:.LANCHOR200
+	add	x0, x28, :lo12:.LANCHOR31
 	bl	ftl_memcpy
-.L1136:
+.L1206:
 	ldrb	w0, [x22, #:lo12:.LANCHOR1]
 	adrp	x25, .LANCHOR8
-	cbnz	w0, .L1142
+	cbnz	w0, .L1212
 	bl	FlashLoadPhyInfoInRam
-	cbnz	w0, .L1144
+	cbnz	w0, .L1214
 	ldr	x0, [x19, #:lo12:.LANCHOR18]
 	adrp	x24, .LANCHOR24
 	ldrb	w1, [x0, 17]
 	and	w0, w1, 7
 	strb	w0, [x24, #:lo12:.LANCHOR24]
-	tbnz	x1, 0, .L1144
+	tbnz	x1, 0, .L1214
 	mov	w1, 1
-	strb	w1, [x21, #:lo12:.LANCHOR29]
+	strb	w1, [x21, #:lo12:.LANCHOR30]
 	bl	FlashSetInterfaceMode
 	ldrb	w0, [x24, #:lo12:.LANCHOR24]
 	bl	NandcSetMode
-.L1144:
+.L1214:
 	ldr	x0, [x19, #:lo12:.LANCHOR18]
 	ldrb	w0, [x0, 26]
 	strb	w0, [x25, #:lo12:.LANCHOR8]
 	bl	FlashLoadPhyInfo
-	cbz	w0, .L1142
+	cbz	w0, .L1212
 	ldr	x0, [x19, #:lo12:.LANCHOR18]
 	ldrh	w1, [x0, 14]
-	adrp	x0, .LC22
-	add	x0, x0, :lo12:.LC22
+	adrp	x0, .LC24
+	add	x0, x0, :lo12:.LC24
 	bl	printf
 	bl	FlashLoadPhyInfoInRam
 	cmn	w0, #1
-	beq	.L1128
+	beq	.L1198
 	bl	FlashDieInfoInit
 	ldr	x0, [x19, #:lo12:.LANCHOR18]
 	ldrb	w0, [x0, 19]
 	bl	FlashGetReadRetryDefault
 	ldr	x0, [x19, #:lo12:.LANCHOR18]
-	adrp	x1, .LANCHOR119
-	ldrh	w1, [x1, #:lo12:.LANCHOR119]
+	adrp	x1, .LANCHOR122
+	ldrh	w1, [x1, #:lo12:.LANCHOR122]
 	ldrb	w2, [x0, 9]
 	add	w1, w1, 4095
 	cmp	w2, w1, lsr 12
-	blt	.L1147
+	blt	.L1217
 	ldrh	w1, [x0, 14]
 	add	w1, w1, 255
 	cmp	w2, w1, lsr 8
-	bge	.L1148
-.L1147:
+	bge	.L1218
+.L1217:
 	ldrh	w1, [x0, 14]
 	and	w1, w1, -256
 	strh	w1, [x0, 14]
-.L1148:
+.L1218:
 	adrp	x0, .LANCHOR24
 	ldrb	w0, [x0, #:lo12:.LANCHOR24]
 	tst	w0, 6
-	beq	.L1149
+	beq	.L1219
 	bl	FlashSavePhyInfo
-	adrp	x0, .LANCHOR145
-	ldr	w1, [x0, #:lo12:.LANCHOR145]
+	adrp	x0, .LANCHOR148
+	ldr	w1, [x0, #:lo12:.LANCHOR148]
 	mov	w0, 0
 	bl	FlashDdrParaScan
-.L1149:
+.L1219:
 	bl	FlashSavePhyInfo
-.L1142:
+.L1212:
 	ldr	x2, [x19, #:lo12:.LANCHOR18]
 	adrp	x24, .LANCHOR24
 	ldrb	w0, [x2, 26]
@@ -8305,10 +8792,10 @@ FlashInit:
 	ldrh	w0, [x2, 16]
 	ubfx	x1, x0, 7, 1
 	strb	w1, [x27, #:lo12:.LANCHOR5]
-	adrp	x1, .LANCHOR198
+	adrp	x1, .LANCHOR201
 	ubfx	x3, x0, 3, 1
-	adrp	x27, .LANCHOR142
-	strb	w3, [x1, #:lo12:.LANCHOR198]
+	adrp	x27, .LANCHOR145
+	strb	w3, [x1, #:lo12:.LANCHOR201]
 	adrp	x1, .LANCHOR27
 	ubfx	x3, x0, 4, 1
 	ubfx	x0, x0, 8, 3
@@ -8316,14 +8803,14 @@ FlashInit:
 	strb	w0, [x24, #:lo12:.LANCHOR24]
 	ldrh	w1, [x2, 10]
 	ldrb	w0, [x2, 12]
-	str	xzr, [x27, #:lo12:.LANCHOR142]
+	str	xzr, [x27, #:lo12:.LANCHOR145]
 	sdiv	w1, w1, w0
 	ldrb	w0, [x2, 18]
 	bl	BuildFlashLsbPageTable
 	bl	FlashDieInfoInit
 	ldr	x0, [x19, #:lo12:.LANCHOR18]
 	ldrh	w1, [x0, 16]
-	tbz	x1, 6, .L1151
+	tbz	x1, 6, .L1221
 	adrp	x1, .LANCHOR11
 	ldrb	w0, [x0, 19]
 	adrp	x3, .LANCHOR13
@@ -8331,83 +8818,83 @@ FlashInit:
 	add	x1, x26, :lo12:.LANCHOR20
 	ldrb	w2, [x1, 1]
 	strb	w2, [x3, #:lo12:.LANCHOR13]
-	adrp	x2, .LANCHOR148
+	adrp	x2, .LANCHOR151
 	ldrb	w4, [x1, 2]
-	strb	w4, [x2, #:lo12:.LANCHOR148]
+	strb	w4, [x2, #:lo12:.LANCHOR151]
 	sub	w4, w0, #1
 	and	w4, w4, 255
 	cmp	w4, 6
 	mov	x4, x3
-	bhi	.L1152
+	bhi	.L1222
 	adrp	x2, HynixReadRetrial
 	add	x2, x2, :lo12:HynixReadRetrial
-	str	x2, [x27, #:lo12:.LANCHOR142]
+	str	x2, [x27, #:lo12:.LANCHOR145]
 	sub	w2, w0, #5
 	and	w2, w2, 255
 	cmp	w2, 1
-	bhi	.L1153
-	adrp	x2, .LANCHOR35
+	bhi	.L1223
+	adrp	x2, .LANCHOR36
 	add	x1, x1, 20
 	mov	w3, 1
-	str	w3, [x2, #:lo12:.LANCHOR35]
-.L1154:
+	str	w3, [x2, #:lo12:.LANCHOR36]
+.L1224:
 	mov	x2, 0
 	mov	w3, 0
-.L1156:
+.L1226:
 	ldrsb	w4, [x1, x2]
 	add	x2, x2, 1
 	cmp	w4, 0
 	cinc	w3, w3, eq
 	cmp	x2, 32
-	bne	.L1156
+	bne	.L1226
 	cmp	w3, 27
-	bls	.L1151
+	bls	.L1221
 	bl	FlashGetReadRetryDefault
 	bl	FlashSavePhyInfo
-.L1151:
-	adrp	x0, .LANCHOR151
-	ldr	w1, [x0, #:lo12:.LANCHOR151]
+.L1221:
+	adrp	x0, .LANCHOR29
+	ldr	w1, [x0, #:lo12:.LANCHOR29]
 	mov	w0, 12336
 	movk	w0, 0x5638, lsl 16
 	cmp	w1, w0
-	bne	.L1165
+	bne	.L1235
 	ldrb	w0, [x25, #:lo12:.LANCHOR8]
-	cbz	w0, .L1165
+	cbz	w0, .L1235
 	ldr	x0, [x19, #:lo12:.LANCHOR18]
 	strb	wzr, [x0, 18]
-.L1165:
+.L1235:
 	ldrb	w0, [x20, #:lo12:.LANCHOR22]
 	cmp	w0, 44
-	bne	.L1166
-	ldrb	w0, [x21, #:lo12:.LANCHOR29]
-	cbz	w0, .L1166
-	strb	wzr, [x21, #:lo12:.LANCHOR29]
+	bne	.L1236
+	ldrb	w0, [x21, #:lo12:.LANCHOR30]
+	cbz	w0, .L1236
+	strb	wzr, [x21, #:lo12:.LANCHOR30]
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
 	bl	NandcSetMode
-.L1166:
+.L1236:
 	mov	w0, 0
 	bl	flash_enter_slc_mode
 	ldrb	w0, [x24, #:lo12:.LANCHOR24]
 	tst	w0, 6
-	beq	.L1167
-	ldrb	w1, [x21, #:lo12:.LANCHOR29]
-	cbnz	w1, .L1168
-	tbnz	x0, 0, .L1167
-.L1168:
-	adrp	x0, .LANCHOR145
-	ldr	w1, [x0, #:lo12:.LANCHOR145]
+	beq	.L1237
+	ldrb	w1, [x21, #:lo12:.LANCHOR30]
+	cbnz	w1, .L1238
+	tbnz	x0, 0, .L1237
+.L1238:
+	adrp	x0, .LANCHOR148
+	ldr	w1, [x0, #:lo12:.LANCHOR148]
 	mov	w0, 0
 	bl	FlashDdrParaScan
-.L1167:
+.L1237:
 	mov	w0, 0
 	bl	flash_exit_slc_mode
 	ldr	x0, [x19, #:lo12:.LANCHOR18]
 	ldrb	w0, [x0, 20]
 	bl	FlashBchSel
-	adrp	x0, .LANCHOR138
-	add	x0, x0, :lo12:.LANCHOR138
+	adrp	x0, .LANCHOR141
+	add	x0, x0, :lo12:.LANCHOR141
 	bl	FlashReadIdbDataRaw
 	ldr	x2, [x19, #:lo12:.LANCHOR18]
 	mov	w0, 16
@@ -8443,7 +8930,7 @@ FlashInit:
 	strh	w1, [x0, 22]
 	ldrb	w5, [x22, #:lo12:.LANCHOR1]
 	cmp	w5, 1
-	bne	.L1169
+	bne	.L1239
 	ubfiz	w1, w1, 1, 15
 	lsr	w4, w4, 1
 	ubfiz	w3, w3, 1, 15
@@ -8452,11 +8939,11 @@ FlashInit:
 	mov	w1, 8
 	strh	w3, [x0, 20]
 	strh	w1, [x0, 26]
-.L1169:
+.L1239:
 	ldrb	w0, [x2, 20]
 	bl	FlashBchSel
 	mov	w0, 0
-.L1128:
+.L1198:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -8464,90 +8951,90 @@ FlashInit:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1139:
+.L1209:
 	cmp	w2, 220
-	bne	.L1140
-	add	x0, x25, :lo12:.LANCHOR197
+	bne	.L1210
+	add	x0, x25, :lo12:.LANCHOR200
 	mov	w1, 4096
 	strh	w1, [x0, 14]
 	mov	w1, -36
-	b	.L1206
-.L1153:
+	b	.L1279
+.L1223:
 	add	x2, x1, 20
 	cmp	w0, 7
 	add	x1, x1, 28
 	csel	x1, x1, x2, eq
-	b	.L1154
-.L1152:
+	b	.L1224
+.L1222:
 	sub	w1, w0, #17
 	and	w1, w1, 255
 	cmp	w1, 2
-	bhi	.L1158
+	bhi	.L1228
 	adrp	x1, MicronReadRetrial
 	add	x1, x1, :lo12:MicronReadRetrial
-	str	x1, [x27, #:lo12:.LANCHOR142]
+	str	x1, [x27, #:lo12:.LANCHOR145]
 	cmp	w0, 19
-	beq	.L1159
-.L1210:
+	beq	.L1229
+.L1283:
 	mov	w0, 7
-	b	.L1208
-.L1159:
+	b	.L1281
+.L1229:
 	mov	w0, 15
-.L1208:
-	strb	w0, [x2, #:lo12:.LANCHOR148]
-	b	.L1151
-.L1158:
+.L1281:
+	strb	w0, [x2, #:lo12:.LANCHOR151]
+	b	.L1221
+.L1228:
 	sub	w1, w0, #65
 	cmp	w0, 33
 	and	w1, w1, 255
 	ccmp	w1, 1, 0, ne
-	bhi	.L1160
+	bhi	.L1230
 	adrp	x0, ToshibaReadRetrial
 	add	x0, x0, :lo12:ToshibaReadRetrial
-	str	x0, [x27, #:lo12:.LANCHOR142]
+	str	x0, [x27, #:lo12:.LANCHOR145]
 	mov	w0, 4
 	strb	w0, [x3, #:lo12:.LANCHOR13]
-	b	.L1210
-.L1160:
+	b	.L1283
+.L1230:
 	sub	w3, w0, #34
 	sub	w1, w0, #67
 	and	w3, w3, 255
 	and	w1, w1, 255
 	cmp	w3, 1
 	ccmp	w1, 1, 0, hi
-	bhi	.L1161
+	bhi	.L1231
 	adrp	x3, ToshibaReadRetrial
 	add	x3, x3, :lo12:ToshibaReadRetrial
-	str	x3, [x27, #:lo12:.LANCHOR142]
+	str	x3, [x27, #:lo12:.LANCHOR145]
 	cmp	w0, 35
 	mov	w3, 68
 	ccmp	w0, w3, 4, ne
-	beq	.L1162
+	beq	.L1232
 	mov	w0, 7
-.L1207:
-	strb	w0, [x2, #:lo12:.LANCHOR148]
+.L1280:
+	strb	w0, [x2, #:lo12:.LANCHOR151]
 	cmp	w1, 1
-	bhi	.L1164
+	bhi	.L1234
 	mov	w0, 4
-.L1209:
+.L1282:
 	strb	w0, [x4, #:lo12:.LANCHOR13]
-	b	.L1151
-.L1162:
+	b	.L1221
+.L1232:
 	mov	w0, 17
-	b	.L1207
-.L1164:
+	b	.L1280
+.L1234:
 	mov	w0, 5
-	b	.L1209
-.L1161:
+	b	.L1282
+.L1231:
 	cmp	w0, 49
-	bne	.L1151
+	bne	.L1221
 	adrp	x0, SamsungReadRetrial
 	add	x0, x0, :lo12:SamsungReadRetrial
-	str	x0, [x27, #:lo12:.LANCHOR142]
-	b	.L1151
-.L1171:
+	str	x0, [x27, #:lo12:.LANCHOR145]
+	b	.L1221
+.L1241:
 	mov	w0, -2
-	b	.L1128
+	b	.L1198
 	.size	FlashInit, .-FlashInit
 	.section	.text.FlashReadSlc2KPages,"ax",@progbits
 	.align	2
@@ -8560,21 +9047,21 @@ FlashReadSlc2KPages:
 	mov	w22, 56
 	stp	x25, x26, [sp, 64]
 	mov	w25, w2
-	adrp	x2, .LANCHOR30+9
+	adrp	x2, .LANCHOR31+9
 	stp	x23, x24, [sp, 48]
 	nop // between mem op and mult-accumulate
 	umaddl	x22, w1, w22, x0
 	stp	x19, x20, [sp, 16]
-	ldrb	w24, [x2, #:lo12:.LANCHOR30+9]
+	ldrb	w24, [x2, #:lo12:.LANCHOR31+9]
 	adrp	x23, .LANCHOR25
 	mov	x19, x0
 	and	w21, w1, 255
 	add	x23, x23, :lo12:.LANCHOR25
 	adrp	x26, .LANCHOR26
 	str	x27, [sp, 80]
-.L1212:
+.L1285:
 	cmp	x22, x19
-	bne	.L1224
+	bne	.L1297
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -8583,7 +9070,7 @@ FlashReadSlc2KPages:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1224:
+.L1297:
 	mov	w1, w25
 	mov	w4, w21
 	add	x3, x29, 104
@@ -8593,15 +9080,15 @@ FlashReadSlc2KPages:
 	ldrb	w1, [x23]
 	ldr	w0, [x29, 104]
 	cmp	w1, w0
-	bhi	.L1213
+	bhi	.L1286
 	mov	w0, -1
 	str	w0, [x19]
-.L1214:
+.L1287:
 	sub	w21, w21, #1
 	add	x19, x19, 56
 	and	w21, w21, 255
-	b	.L1212
-.L1213:
+	b	.L1285
+.L1286:
 	add	x1, x26, :lo12:.LANCHOR26
 	ldrb	w27, [x1, w0, uxtw]
 	mov	w0, w27
@@ -8641,53 +9128,56 @@ FlashReadSlc2KPages:
 	mov	w0, w27
 	bl	NandcFlashDeCs
 	cmp	w20, w2
-	adrp	x1, .LANCHOR32
+	adrp	x1, .LANCHOR33
 	csel	w0, w20, w2, cs
-	ldrb	w2, [x1, #:lo12:.LANCHOR32]
+	ldrb	w2, [x1, #:lo12:.LANCHOR33]
 	add	w1, w2, w2, lsl 1
 	cmp	w0, w1, lsr 2
-	bls	.L1217
+	bls	.L1290
 	cmn	w0, #1
 	mov	w1, 256
 	csel	w0, w0, w1, eq
-.L1217:
+.L1290:
 	cmp	w0, 256
 	ccmn	w0, #1, 4, ne
 	csel	w0, w0, wzr, eq
 	str	w0, [x19]
 	ldr	x0, [x19, 16]
-	cbz	x0, .L1220
+	cbz	x0, .L1293
+	ldr	w1, [x0, 12]
+	cmn	w1, #1
+	bne	.L1293
 	ldr	w1, [x0, 8]
 	cmn	w1, #1
-	bne	.L1220
+	bne	.L1293
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L1220
+	beq	.L1293
 	str	w1, [x19]
-.L1220:
+.L1293:
 	ldr	w3, [x19]
 	cmn	w3, #1
-	bne	.L1214
+	bne	.L1287
 	ldr	w1, [x19, 4]
-	adrp	x0, .LC23
-	add	x0, x0, :lo12:.LC23
+	adrp	x0, .LC25
+	add	x0, x0, :lo12:.LC25
 	bl	printf
 	ldr	x1, [x19, 8]
-	cbz	x1, .L1222
-	adrp	x0, .LC24
+	cbz	x1, .L1295
+	adrp	x0, .LC26
 	mov	w3, 8
 	mov	w2, 4
-	add	x0, x0, :lo12:.LC24
+	add	x0, x0, :lo12:.LC26
 	bl	rknand_print_hex
-.L1222:
+.L1295:
 	ldr	x1, [x19, 16]
-	cbz	x1, .L1214
+	cbz	x1, .L1287
 	mov	w3, 4
-	adrp	x0, .LC25
+	adrp	x0, .LC27
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC25
+	add	x0, x0, :lo12:.LC27
 	bl	rknand_print_hex
-	b	.L1214
+	b	.L1287
 	.size	FlashReadSlc2KPages, .-FlashReadSlc2KPages
 	.section	.text.FlashReadPages,"ax",@progbits
 	.align	2
@@ -8704,12 +9194,12 @@ FlashReadPages:
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	stp	w2, w1, [x29, 148]
-	cbnz	w3, .L1243
+	cbnz	w3, .L1316
 	mov	x25, x0
-	adrp	x0, .LANCHOR30+9
+	adrp	x0, .LANCHOR31+9
 	adrp	x27, .LANCHOR20
 	mov	w23, 0
-	ldrb	w0, [x0, #:lo12:.LANCHOR30+9]
+	ldrb	w0, [x0, #:lo12:.LANCHOR31+9]
 	mov	w22, 0
 	str	w0, [x29, 156]
 	adrp	x0, .LANCHOR5
@@ -8720,15 +9210,15 @@ FlashReadPages:
 	str	x0, [x29, 104]
 	add	x0, x0, 4
 	str	x0, [x29, 96]
-.L1244:
+.L1317:
 	ldr	w0, [x29, 152]
 	cmp	w22, w0
-	bcc	.L1278
+	bcc	.L1351
 	mov	w0, 0
-	b	.L1242
-.L1243:
+	b	.L1315
+.L1316:
 	bl	FlashReadSlc2KPages
-.L1242:
+.L1315:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -8736,7 +9226,7 @@ FlashReadPages:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1278:
+.L1351:
 	mov	w26, 56
 	add	x3, x29, 168
 	ldp	w1, w0, [x29, 148]
@@ -8752,18 +9242,18 @@ FlashReadPages:
 	ldr	w1, [x29, 168]
 	ldrb	w0, [x0, #:lo12:.LANCHOR25]
 	cmp	w0, w1
-	bhi	.L1246
+	bhi	.L1319
 	mov	w0, -1
 	str	w0, [x25, x26]
-.L1247:
+.L1320:
 	add	w22, w22, 1
-	b	.L1244
-.L1246:
+	b	.L1317
+.L1319:
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w19, [x0, w1, uxtw]
-	adrp	x0, .LANCHOR198
-	ldrb	w0, [x0, #:lo12:.LANCHOR198]
+	adrp	x0, .LANCHOR201
+	ldrb	w0, [x0, #:lo12:.LANCHOR201]
 	cmp	w0, 0
 	mov	w0, w19
 	csel	w20, w20, wzr, ne
@@ -8775,65 +9265,65 @@ FlashReadPages:
 	sub	w0, w2, #1
 	and	w0, w0, 255
 	cmp	w0, 6
-	bhi	.L1249
+	bhi	.L1322
 	add	x0, x27, :lo12:.LANCHOR20
 	sxtw	x1, w19
 	add	x0, x0, x1
 	cmp	w2, 7
 	ldrb	w3, [x0, 12]
-	bne	.L1250
+	bne	.L1323
 	ldrb	w3, [x0, 20]
-.L1250:
+.L1323:
 	adrp	x0, .LANCHOR21
 	add	x0, x0, :lo12:.LANCHOR21
 	ldrb	w0, [x0, x1]
 	cmp	w0, w3
-	beq	.L1249
+	beq	.L1322
 	ldp	x2, x0, [x29, 96]
 	ldrb	w1, [x0, 1]
 	mov	w0, w19
 	bl	HynixSetRRPara
-.L1249:
+.L1322:
 	mov	w0, w19
 	bl	NandcFlashCs
 	ldr	w0, [x29, 148]
 	cmp	w0, 1
 	cset	w0, eq
 	orr	w24, w0, w24, lsr 31
-	cbz	w24, .L1251
+	cbz	w24, .L1324
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L1251
+	cbz	w0, .L1324
 	mov	w0, w19
 	bl	flash_enter_slc_mode
-.L1252:
+.L1325:
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
 	str	x0, [x29, 112]
 	ldr	x0, [x29, 128]
 	add	x0, x0, :lo12:.LANCHOR5
 	str	x0, [x29, 136]
-.L1258:
+.L1331:
 	ldr	w1, [x29, 172]
 	cmn	w1, #1
-	bne	.L1253
+	bne	.L1326
 	cmp	w19, 255
-	beq	.L1280
-.L1253:
-	cbz	w20, .L1255
+	beq	.L1353
+.L1326:
+	cbz	w20, .L1328
 	ldr	x0, [x29, 112]
 	ldr	w2, [x0]
 	mov	w0, w19
 	add	w2, w1, w2
 	bl	FlashReadDpCmd
-.L1256:
+.L1329:
 	mov	w0, w19
 	bl	NandcWaitFlashReady
-	cbz	w20, .L1254
+	cbz	w20, .L1327
 	ldr	w1, [x29, 172]
 	mov	w0, w19
 	bl	FlashReadDpDataOutCmd
-.L1254:
+.L1327:
 	ldrb	w2, [x29, 156]
 	mov	w1, 0
 	ldp	x3, x4, [x21, 8]
@@ -8842,26 +9332,26 @@ FlashReadPages:
 	mov	w28, w0
 	ldr	x0, [x29, 136]
 	ldrb	w0, [x0]
-	cbz	w0, .L1257
+	cbz	w0, .L1330
 	cmn	w28, #1
-	bne	.L1257
+	bne	.L1330
 	ldr	x0, [x29, 136]
 	mov	w20, 0
 	strb	wzr, [x0]
-	b	.L1258
-.L1251:
+	b	.L1331
+.L1324:
 	mov	w0, w19
 	bl	flash_exit_slc_mode
-	b	.L1252
-.L1255:
+	b	.L1325
+.L1328:
 	mov	w0, w19
 	bl	FlashReadCmd
-	b	.L1256
-.L1280:
+	b	.L1329
+.L1353:
 	mov	w20, 0
-	b	.L1254
-.L1257:
-	cbz	w20, .L1259
+	b	.L1327
+.L1330:
+	cbz	w20, .L1332
 	adrp	x0, .LANCHOR3
 	ldr	w1, [x29, 172]
 	ldr	w0, [x0, #:lo12:.LANCHOR3]
@@ -8880,27 +9370,27 @@ FlashReadPages:
 	cmn	w0, #1
 	mov	w23, w0
 	csel	w20, w20, wzr, ne
-.L1259:
+.L1332:
 	mov	w0, w19
 	bl	NandcFlashDeCs
 	ldr	x0, [x29, 128]
 	cmn	w28, #1
 	ldrb	w1, [x29, 144]
 	strb	w1, [x0, #:lo12:.LANCHOR5]
-	bne	.L1260
-	adrp	x0, .LANCHOR29
-	ldrb	w0, [x0, #:lo12:.LANCHOR29]
-	cbnz	w0, .L1261
-.L1265:
-	adrp	x20, .LANCHOR142
-	ldr	x4, [x20, #:lo12:.LANCHOR142]
-	cbnz	x4, .L1262
+	bne	.L1333
+	adrp	x0, .LANCHOR30
+	ldrb	w0, [x0, #:lo12:.LANCHOR30]
+	cbnz	w0, .L1334
+.L1338:
+	adrp	x20, .LANCHOR145
+	ldr	x4, [x20, #:lo12:.LANCHOR145]
+	cbnz	x4, .L1335
 	ldr	w1, [x29, 172]
 	mov	w0, w19
 	ldp	x2, x3, [x21, 8]
 	bl	FlashReadRawPage
-	b	.L1317
-.L1261:
+	b	.L1390
+.L1334:
 	adrp	x0, .LANCHOR19
 	ldr	w1, [x29, 172]
 	ldp	x2, x3, [x21, 8]
@@ -8911,62 +9401,62 @@ FlashReadPages:
 	bl	FlashDdrTunningRead
 	mov	w28, w0
 	cmn	w0, #1
-	beq	.L1264
-	adrp	x0, .LANCHOR32
-	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	beq	.L1337
+	adrp	x0, .LANCHOR33
+	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	cmp	w28, w0, lsr 1
-	bls	.L1281
-.L1264:
+	bls	.L1354
+.L1337:
 	lsr	w0, w20, 8
 	bl	NandcSetDdrPara
 	cmn	w28, #1
-	beq	.L1265
-.L1281:
+	beq	.L1338
+.L1354:
 	mov	w20, 0
-.L1260:
-	adrp	x0, .LANCHOR32
-	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+.L1333:
+	adrp	x0, .LANCHOR33
+	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bls	.L1266
-	adrp	x0, .LANCHOR142
-	ldr	x0, [x0, #:lo12:.LANCHOR142]
+	bls	.L1339
+	adrp	x0, .LANCHOR145
+	ldr	x0, [x0, #:lo12:.LANCHOR145]
 	cmp	x0, 0
 	mov	w0, 256
 	csel	w28, w28, w0, ne
-.L1266:
+.L1339:
 	cmp	w28, 256
 	ccmn	w28, #1, 4, ne
 	csel	w3, w28, wzr, eq
 	str	w3, [x25, x26]
 	cmn	w3, #1
-	bne	.L1273
-	adrp	x0, .LANCHOR32
+	bne	.L1346
+	adrp	x0, .LANCHOR33
 	ldr	w1, [x21, 4]
-	ldrb	w2, [x0, #:lo12:.LANCHOR32]
-	adrp	x0, .LC23
-	add	x0, x0, :lo12:.LC23
+	ldrb	w2, [x0, #:lo12:.LANCHOR33]
+	adrp	x0, .LC25
+	add	x0, x0, :lo12:.LC25
 	bl	printf
 	ldr	x1, [x21, 16]
-	cbz	x1, .L1273
+	cbz	x1, .L1346
 	mov	w3, 4
-	adrp	x0, .LC25
+	adrp	x0, .LC27
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC25
+	add	x0, x0, :lo12:.LC27
 	bl	rknand_print_hex
-.L1273:
-	cbz	w20, .L1275
-	adrp	x0, .LANCHOR32
-	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+.L1346:
+	cbz	w20, .L1348
+	adrp	x0, .LANCHOR33
+	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w23, w0, lsr 2
-	bls	.L1276
-	adrp	x0, .LANCHOR142
-	ldr	x0, [x0, #:lo12:.LANCHOR142]
+	bls	.L1349
+	adrp	x0, .LANCHOR145
+	ldr	x0, [x0, #:lo12:.LANCHOR145]
 	cmp	x0, 0
 	mov	w0, 256
 	csel	w23, w23, w0, ne
-.L1276:
+.L1349:
 	add	w0, w22, 1
 	mov	w1, 56
 	cmp	w23, 256
@@ -8974,71 +9464,71 @@ FlashReadPages:
 	umull	x0, w0, w1
 	csel	w1, w23, wzr, eq
 	str	w1, [x25, x0]
-.L1275:
+.L1348:
 	add	w22, w22, w20
-	cbz	w24, .L1247
+	cbz	w24, .L1320
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L1247
+	cbz	w0, .L1320
 	mov	w0, w19
 	bl	flash_exit_slc_mode
-	b	.L1247
-.L1262:
+	b	.L1320
+.L1335:
 	ldr	w1, [x29, 172]
 	mov	w0, w19
 	ldp	x2, x3, [x21, 8]
 	blr	x4
 	mov	w28, w0
 	cmn	w0, #1
-	bne	.L1284
+	bne	.L1357
 	ldr	x0, [x29, 120]
 	ldr	x0, [x0, #:lo12:.LANCHOR18]
 	ldrb	w0, [x0, 19]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 6
-	bhi	.L1267
+	bhi	.L1340
 	add	x0, x27, :lo12:.LANCHOR20
 	mov	w3, 0
 	add	x2, x0, 4
 	ldrb	w1, [x0, 1]
 	mov	w0, w19
 	bl	HynixSetRRPara
-.L1267:
+.L1340:
 	ldp	x2, x3, [x21, 8]
 	mov	w0, w19
 	ldr	w1, [x29, 172]
 	bl	FlashReadRawPage
 	mov	w28, w0
 	mov	w3, w0
-	adrp	x0, .LANCHOR32
+	adrp	x0, .LANCHOR33
 	ldr	w1, [x21, 4]
-	ldrb	w2, [x0, #:lo12:.LANCHOR32]
-	adrp	x0, .LC26
-	add	x0, x0, :lo12:.LC26
+	ldrb	w2, [x0, #:lo12:.LANCHOR33]
+	adrp	x0, .LC28
+	add	x0, x0, :lo12:.LC28
 	bl	printf
 	cmn	w28, #1
-	bne	.L1284
+	bne	.L1357
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L1284
+	cbz	w0, .L1357
 	mov	w0, w19
-	cbz	w24, .L1268
+	cbz	w24, .L1341
 	bl	flash_enter_slc_mode
-.L1269:
-	ldr	x4, [x20, #:lo12:.LANCHOR142]
+.L1342:
+	ldr	x4, [x20, #:lo12:.LANCHOR145]
 	mov	w0, w19
 	ldr	w1, [x29, 172]
 	ldp	x2, x3, [x21, 8]
 	blr	x4
-.L1317:
+.L1390:
 	mov	w28, w0
-.L1284:
+.L1357:
 	mov	w20, 0
-	b	.L1266
-.L1268:
+	b	.L1339
+.L1341:
 	bl	flash_exit_slc_mode
-	b	.L1269
+	b	.L1342
 	.size	FlashReadPages, .-FlashReadPages
 	.section	.text.FlashProgSlc2KPages,"ax",@progbits
 	.align	2
@@ -9050,13 +9540,13 @@ FlashProgSlc2KPages:
 	stp	x23, x24, [sp, 48]
 	mov	w24, w2
 	mov	w23, 56
-	adrp	x2, .LANCHOR30+9
+	adrp	x2, .LANCHOR31+9
 	stp	x21, x22, [sp, 32]
 	and	w21, w1, 255
 	stp	x25, x26, [sp, 64]
 	nop // between mem op and mult-accumulate
 	umaddl	x23, w1, w23, x0
-	ldrb	w25, [x2, #:lo12:.LANCHOR30+9]
+	ldrb	w25, [x2, #:lo12:.LANCHOR31+9]
 	adrp	x26, .LANCHOR3
 	stp	x27, x28, [sp, 80]
 	mov	w22, w21
@@ -9065,12 +9555,12 @@ FlashProgSlc2KPages:
 	mov	x20, x0
 	add	x28, x26, :lo12:.LANCHOR3
 	str	w3, [x29, 108]
-.L1319:
+.L1392:
 	cmp	x20, x23
-	bne	.L1325
+	bne	.L1398
 	ldr	w0, [x29, 108]
-	cbnz	w0, .L1326
-.L1345:
+	cbnz	w0, .L1399
+.L1418:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -9079,7 +9569,7 @@ FlashProgSlc2KPages:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1325:
+.L1398:
 	mov	w1, w24
 	mov	w4, w22
 	add	x3, x29, 116
@@ -9090,15 +9580,15 @@ FlashProgSlc2KPages:
 	ldr	w1, [x29, 116]
 	ldrb	w0, [x0, #:lo12:.LANCHOR25]
 	cmp	w0, w1
-	bhi	.L1320
+	bhi	.L1393
 	mov	w0, -1
 	str	w0, [x20]
-.L1321:
+.L1394:
 	sub	w22, w22, #1
 	add	x20, x20, 56
 	and	w22, w22, 255
-	b	.L1319
-.L1320:
+	b	.L1392
+.L1393:
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w19, [x0, w1, uxtw]
@@ -9151,39 +9641,39 @@ FlashProgSlc2KPages:
 	ldr	w1, [x29, 112]
 	mov	w0, w19
 	bl	FlashReadStatus
-	tbz	x0, 0, .L1324
+	tbz	x0, 0, .L1397
 	mov	w0, -1
 	str	w0, [x20]
-.L1324:
+.L1397:
 	mov	w0, w19
 	bl	NandcFlashDeCs
-	b	.L1321
-.L1332:
+	b	.L1394
+.L1405:
 	ldr	w0, [x27]
 	cmn	w0, #1
-	bne	.L1327
+	bne	.L1400
 	ldr	w1, [x27, 4]
-	adrp	x0, .LC27
-	add	x0, x0, :lo12:.LC27
+	adrp	x0, .LC29
+	add	x0, x0, :lo12:.LC29
 	bl	printf
-.L1328:
+.L1401:
 	sub	w21, w21, #1
 	add	x27, x27, 56
 	and	w21, w21, 255
-.L1346:
+.L1419:
 	cmp	x27, x20
-	bne	.L1332
-	b	.L1345
-.L1327:
-	adrp	x19, .LANCHOR196
+	bne	.L1405
+	b	.L1418
+.L1400:
+	adrp	x19, .LANCHOR199
 	mov	w4, w21
 	add	x3, x29, 116
 	add	x2, x29, 112
 	mov	w1, w24
 	mov	x0, x27
 	bl	LogAddr2PhyAddr
-	ldr	x26, [x22, #:lo12:.LANCHOR195]
-	ldr	x25, [x19, #:lo12:.LANCHOR196]
+	ldr	x26, [x22, #:lo12:.LANCHOR198]
+	ldr	x25, [x19, #:lo12:.LANCHOR199]
 	mov	x2, 56
 	mov	x1, x27
 	add	x0, x29, 120
@@ -9197,45 +9687,45 @@ FlashProgSlc2KPages:
 	bl	FlashReadPages
 	ldr	w25, [x29, 120]
 	cmn	w25, #1
-	bne	.L1329
+	bne	.L1402
 	ldr	w1, [x27, 4]
-	adrp	x0, .LC28
-	add	x0, x0, :lo12:.LC28
+	adrp	x0, .LC30
+	add	x0, x0, :lo12:.LC30
 	bl	printf
 	str	w25, [x27]
-.L1329:
+.L1402:
 	ldr	x0, [x27, 16]
-	cbz	x0, .L1330
+	cbz	x0, .L1403
 	ldr	w2, [x0]
-	ldr	x0, [x19, #:lo12:.LANCHOR196]
+	ldr	x0, [x19, #:lo12:.LANCHOR199]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1330
+	beq	.L1403
 	ldr	w1, [x27, 4]
-	adrp	x0, .LC29
-	add	x0, x0, :lo12:.LC29
+	adrp	x0, .LC31
+	add	x0, x0, :lo12:.LC31
 	bl	printf
 	mov	w0, -1
 	str	w0, [x27]
-.L1330:
+.L1403:
 	ldr	x0, [x27, 8]
-	cbz	x0, .L1328
+	cbz	x0, .L1401
 	ldr	w2, [x0]
-	ldr	x0, [x23, #:lo12:.LANCHOR195]
+	ldr	x0, [x23, #:lo12:.LANCHOR198]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1328
+	beq	.L1401
 	ldr	w1, [x27, 4]
-	adrp	x0, .LC30
-	add	x0, x0, :lo12:.LC30
+	adrp	x0, .LC32
+	add	x0, x0, :lo12:.LC32
 	bl	printf
 	mov	w0, -1
 	str	w0, [x27]
-	b	.L1328
-.L1326:
-	adrp	x22, .LANCHOR195
+	b	.L1401
+.L1399:
+	adrp	x22, .LANCHOR198
 	mov	x23, x22
-	b	.L1346
+	b	.L1419
 	.size	FlashProgSlc2KPages, .-FlashProgSlc2KPages
 	.section	.text.FlashProgPages,"ax",@progbits
 	.align	2
@@ -9255,38 +9745,38 @@ FlashProgPages:
 	stp	w3, w4, [x29, 100]
 	adrp	x4, .LANCHOR1
 	ldrb	w4, [x4, #:lo12:.LANCHOR1]
-	cbnz	w4, .L1349
+	cbnz	w4, .L1422
 	mov	x19, x0
-	adrp	x0, .LANCHOR30+9
+	adrp	x0, .LANCHOR31+9
 	adrp	x27, .LANCHOR23
 	mov	w24, w1
-	ldrb	w0, [x0, #:lo12:.LANCHOR30+9]
+	ldrb	w0, [x0, #:lo12:.LANCHOR31+9]
 	mov	w22, w2
 	add	x28, x27, :lo12:.LANCHOR23
 	mov	w21, 0
 	str	w0, [x29, 108]
-.L1350:
+.L1423:
 	cmp	w21, w24
 	adrp	x26, .LANCHOR25
-	bcc	.L1363
+	bcc	.L1436
 	adrp	x21, .LANCHOR8
 	adrp	x23, .LANCHOR23
 	add	x25, x26, :lo12:.LANCHOR25
 	add	x21, x21, :lo12:.LANCHOR8
 	add	x23, x23, :lo12:.LANCHOR23
 	mov	x20, 0
-.L1364:
+.L1437:
 	ldrb	w0, [x25]
 	cmp	w0, w20
-	bhi	.L1366
+	bhi	.L1439
 	ldr	w0, [x29, 100]
-	cbnz	w0, .L1367
-.L1375:
+	cbnz	w0, .L1440
+.L1448:
 	mov	w0, 0
-	b	.L1348
-.L1349:
+	b	.L1421
+.L1422:
 	bl	FlashProgSlc2KPages
-.L1348:
+.L1421:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9294,7 +9784,7 @@ FlashProgPages:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1363:
+.L1436:
 	mov	w12, 56
 	mov	w1, w22
 	sub	w4, w24, w21
@@ -9308,13 +9798,13 @@ FlashProgPages:
 	ldrb	w1, [x26, #:lo12:.LANCHOR25]
 	ldr	w0, [x29, 116]
 	cmp	w1, w0
-	bhi	.L1352
+	bhi	.L1425
 	mov	w0, -1
 	str	w0, [x19, x12]
-.L1353:
+.L1426:
 	add	w21, w21, 1
-	b	.L1350
-.L1352:
+	b	.L1423
+.L1425:
 	adrp	x1, .LANCHOR27
 	add	x2, x27, :lo12:.LANCHOR23
 	mov	x3, 24
@@ -9324,20 +9814,20 @@ FlashProgPages:
 	csel	w23, w23, wzr, ne
 	madd	x1, x1, x3, x2
 	ldr	x1, [x1, 8]
-	cbz	x1, .L1355
+	cbz	x1, .L1428
 	bl	FlashWaitCmdDone
-.L1355:
+.L1428:
 	ldp	w2, w1, [x29, 112]
 	mov	x0, 24
 	madd	x0, x1, x0, x28
 	str	w2, [x0, 4]
 	stp	x25, xzr, [x0, 8]
-	cbz	w23, .L1356
+	cbz	w23, .L1429
 	add	w2, w21, 1
 	mov	w3, 56
 	umaddl	x2, w2, w3, x19
 	str	x2, [x0, 16]
-.L1356:
+.L1429:
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w20, [x0, x1]
@@ -9347,17 +9837,17 @@ FlashProgPages:
 	cmp	w0, 1
 	mov	w0, w20
 	strb	w20, [x28, x1]
-	bne	.L1357
+	bne	.L1430
 	bl	NandcWaitFlashReady
-.L1358:
+.L1431:
 	ldr	w0, [x29, 104]
 	sub	w0, w0, #1
 	cmp	w0, 6
-	bhi	.L1359
+	bhi	.L1432
 	adrp	x0, .LANCHOR21
 	add	x0, x0, :lo12:.LANCHOR21
 	ldrb	w0, [x0, w20, sxtw]
-	cbz	w0, .L1359
+	cbz	w0, .L1432
 	adrp	x0, .LANCHOR20
 	add	x0, x0, :lo12:.LANCHOR20
 	add	x2, x0, 4
@@ -9365,17 +9855,17 @@ FlashProgPages:
 	ldrb	w1, [x0, 1]
 	mov	w0, w20
 	bl	HynixSetRRPara
-.L1359:
+.L1432:
 	mov	w0, w20
 	bl	NandcFlashCs
 	cmp	w22, 1
-	bne	.L1360
+	bne	.L1433
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L1360
+	cbz	w0, .L1433
 	mov	w0, w20
 	bl	flash_enter_slc_mode
-.L1361:
+.L1434:
 	ldr	w1, [x29, 112]
 	mov	w0, w20
 	bl	FlashProgFirstCmd
@@ -9384,7 +9874,7 @@ FlashProgPages:
 	ldp	x3, x4, [x25, 8]
 	mov	w0, w20
 	bl	NandcXferData
-	cbz	w23, .L1362
+	cbz	w23, .L1435
 	ldr	w1, [x29, 112]
 	mov	w0, w20
 	bl	FlashProgDpFirstCmd
@@ -9412,15 +9902,15 @@ FlashProgPages:
 	ldp	x3, x4, [x0, 8]
 	mov	w0, w20
 	bl	NandcXferData
-.L1362:
+.L1435:
 	ldr	w1, [x29, 112]
 	mov	w0, w20
 	add	w21, w21, w23
 	bl	FlashProgSecondCmd
 	mov	w0, w20
 	bl	NandcFlashDeCs
-	b	.L1353
-.L1357:
+	b	.L1426
+.L1430:
 	bl	NandcFlashCs
 	ldr	w1, [x29, 116]
 	adrp	x0, .LANCHOR17
@@ -9433,56 +9923,56 @@ FlashProgPages:
 	bl	FlashWaitReadyEN
 	mov	w0, w20
 	bl	NandcFlashDeCs
-	b	.L1358
-.L1360:
+	b	.L1431
+.L1433:
 	mov	w0, w20
 	bl	flash_exit_slc_mode
-	b	.L1361
-.L1366:
+	b	.L1434
+.L1439:
 	mov	w0, w20
 	bl	FlashWaitCmdDone
 	cmp	w22, 1
-	bne	.L1365
+	bne	.L1438
 	ldrb	w0, [x21]
-	cbz	w0, .L1365
+	cbz	w0, .L1438
 	mov	x0, 24
 	mul	x0, x20, x0
 	ldrb	w0, [x0, x23]
 	bl	flash_exit_slc_mode
-.L1365:
+.L1438:
 	add	x20, x20, 1
-	b	.L1364
-.L1367:
+	b	.L1437
+.L1440:
 	mov	w0, 56
 	and	w20, w24, 255
-	adrp	x23, .LANCHOR195
+	adrp	x23, .LANCHOR198
 	mov	x25, x23
 	umaddl	x24, w24, w0, x19
-.L1368:
+.L1441:
 	cmp	x24, x19
-	beq	.L1375
+	beq	.L1448
 	ldr	w0, [x19]
 	cmn	w0, #1
-	bne	.L1369
+	bne	.L1442
 	ldr	w1, [x19, 4]
-	adrp	x0, .LC27
-	add	x0, x0, :lo12:.LC27
+	adrp	x0, .LC29
+	add	x0, x0, :lo12:.LC29
 	bl	printf
-.L1370:
+.L1443:
 	sub	w20, w20, #1
 	add	x19, x19, 56
 	and	w20, w20, 255
-	b	.L1368
-.L1369:
-	adrp	x21, .LANCHOR196
+	b	.L1441
+.L1442:
+	adrp	x21, .LANCHOR199
 	mov	w4, w20
 	add	x3, x29, 116
 	add	x2, x29, 112
 	mov	w1, w22
 	mov	x0, x19
 	bl	LogAddr2PhyAddr
-	ldr	x27, [x23, #:lo12:.LANCHOR195]
-	ldr	x26, [x21, #:lo12:.LANCHOR196]
+	ldr	x27, [x23, #:lo12:.LANCHOR198]
+	ldr	x26, [x21, #:lo12:.LANCHOR199]
 	mov	x2, 56
 	mov	x1, x19
 	add	x0, x29, 120
@@ -9496,41 +9986,41 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	w26, [x29, 120]
 	cmn	w26, #1
-	bne	.L1371
+	bne	.L1444
 	ldr	w1, [x19, 4]
-	adrp	x0, .LC28
-	add	x0, x0, :lo12:.LC28
+	adrp	x0, .LC30
+	add	x0, x0, :lo12:.LC30
 	bl	printf
 	str	w26, [x19]
-.L1371:
+.L1444:
 	ldr	x0, [x19, 16]
-	cbz	x0, .L1372
+	cbz	x0, .L1445
 	ldr	w2, [x0]
-	ldr	x0, [x21, #:lo12:.LANCHOR196]
+	ldr	x0, [x21, #:lo12:.LANCHOR199]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1372
+	beq	.L1445
 	ldr	w1, [x19, 4]
-	adrp	x0, .LC29
-	add	x0, x0, :lo12:.LC29
+	adrp	x0, .LC31
+	add	x0, x0, :lo12:.LC31
 	bl	printf
 	mov	w0, -1
 	str	w0, [x19]
-.L1372:
+.L1445:
 	ldr	x0, [x19, 8]
-	cbz	x0, .L1370
+	cbz	x0, .L1443
 	ldr	w2, [x0]
-	ldr	x0, [x25, #:lo12:.LANCHOR195]
+	ldr	x0, [x25, #:lo12:.LANCHOR198]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1370
+	beq	.L1443
 	ldr	w1, [x19, 4]
-	adrp	x0, .LC30
-	add	x0, x0, :lo12:.LC30
+	adrp	x0, .LC32
+	add	x0, x0, :lo12:.LC32
 	bl	printf
 	mov	w0, -1
 	str	w0, [x19]
-	b	.L1370
+	b	.L1443
 	.size	FlashProgPages, .-FlashProgPages
 	.section	.text.FlashTestBlk,"ax",@progbits
 	.align	2
@@ -9541,20 +10031,20 @@ FlashTestBlk:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w19, w0, 65535
-	adrp	x0, .LANCHOR146
-	ldr	w0, [x0, #:lo12:.LANCHOR146]
+	adrp	x0, .LANCHOR149
+	ldr	w0, [x0, #:lo12:.LANCHOR149]
 	cmp	w19, w0
-	bcc	.L1403
-	adrp	x20, .LANCHOR150
+	bcc	.L1476
+	adrp	x20, .LANCHOR153
 	mov	w2, 32
 	mov	w1, 165
 	lsl	w19, w19, 10
-	ldr	x0, [x20, #:lo12:.LANCHOR150]
+	ldr	x0, [x20, #:lo12:.LANCHOR153]
 	str	x0, [x29, 48]
 	add	x0, x29, 96
 	str	x0, [x29, 56]
 	bl	ftl_memset
-	ldr	x0, [x20, #:lo12:.LANCHOR150]
+	ldr	x0, [x20, #:lo12:.LANCHOR153]
 	mov	w2, 8
 	mov	w1, 90
 	bl	ftl_memset
@@ -9575,14 +10065,14 @@ FlashTestBlk:
 	add	x0, x29, 40
 	csetm	w19, ne
 	bl	FlashEraseBlocks
-.L1401:
+.L1474:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 160
 	ret
-.L1403:
+.L1476:
 	mov	w19, 0
-	b	.L1401
+	b	.L1474
 	.size	FlashTestBlk, .-FlashTestBlk
 	.section	.text.FtlLowFormatEraseBlock,"ax",@progbits
 	.align	2
@@ -9593,42 +10083,42 @@ FtlLowFormatEraseBlock:
 	add	x29, sp, 0
 	stp	x25, x26, [sp, 64]
 	and	w26, w0, 65535
-	adrp	x0, .LANCHOR76
+	adrp	x0, .LANCHOR77
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	ldr	w0, [x0, #:lo12:.LANCHOR76]
+	ldr	w0, [x0, #:lo12:.LANCHOR77]
 	stp	x23, x24, [sp, 48]
 	stp	x27, x28, [sp, 80]
-	cbnz	w0, .L1428
+	cbnz	w0, .L1501
 	adrp	x23, .LANCHOR27
 	and	w25, w1, 255
 	adrp	x20, .LANCHOR8
-	adrp	x1, .LANCHOR37
+	adrp	x1, .LANCHOR38
 	ldrb	w0, [x23, #:lo12:.LANCHOR27]
-	adrp	x21, .LANCHOR77
+	adrp	x21, .LANCHOR78
 	str	w0, [x29, 136]
 	mov	x8, 56
-	adrp	x0, .LANCHOR73
+	adrp	x0, .LANCHOR74
 	ldrb	w10, [x20, #:lo12:.LANCHOR8]
-	ldrh	w11, [x1, #:lo12:.LANCHOR37]
-	adrp	x7, .LANCHOR46
-	str	w26, [x0, #:lo12:.LANCHOR73]
-	adrp	x0, .LANCHOR186
-	ldr	x6, [x21, #:lo12:.LANCHOR77]
-	add	x7, x7, :lo12:.LANCHOR46
-	ldr	x12, [x0, #:lo12:.LANCHOR186]
-	adrp	x0, .LANCHOR58
+	ldrh	w11, [x1, #:lo12:.LANCHOR38]
+	adrp	x7, .LANCHOR47
+	str	w26, [x0, #:lo12:.LANCHOR74]
+	adrp	x0, .LANCHOR189
+	ldr	x6, [x21, #:lo12:.LANCHOR78]
+	add	x7, x7, :lo12:.LANCHOR47
+	ldr	x12, [x0, #:lo12:.LANCHOR189]
+	adrp	x0, .LANCHOR59
 	mov	w14, w8
 	mov	x5, 0
-	ldrh	w13, [x0, #:lo12:.LANCHOR58]
+	ldrh	w13, [x0, #:lo12:.LANCHOR59]
 	mov	w24, 0
 	mov	w19, 0
 	str	x1, [x29, 128]
 	str	x0, [x29, 120]
-.L1407:
+.L1480:
 	cmp	w11, w5, uxth
-	bhi	.L1411
-	cbz	w24, .L1405
+	bhi	.L1484
+	cbz	w24, .L1478
 	cmp	w10, 0
 	mov	w2, w24
 	cset	w22, ne
@@ -9641,47 +10131,47 @@ FtlLowFormatEraseBlock:
 	strb	w0, [x23, #:lo12:.LANCHOR27]
 	mov	w0, 56
 	umull	x24, w24, w0
-.L1414:
-	ldr	x0, [x21, #:lo12:.LANCHOR77]
+.L1487:
+	ldr	x0, [x21, #:lo12:.LANCHOR78]
 	add	x1, x0, x27
 	ldr	w0, [x0, x27]
 	cmn	w0, #1
-	bne	.L1413
+	bne	.L1486
 	ldr	w0, [x1, 4]
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.L1413:
+.L1486:
 	add	x27, x27, 56
 	cmp	x27, x24
-	bne	.L1414
-	cbnz	w25, .L1415
+	bne	.L1487
+	cbnz	w25, .L1488
 	and	w22, w22, 65535
 	mov	w28, 6
 	mov	w27, 1
-.L1416:
-	adrp	x0, .LANCHOR46
+.L1489:
+	adrp	x0, .LANCHOR47
 	mov	w24, 0
-	add	x0, x0, :lo12:.LANCHOR46
+	add	x0, x0, :lo12:.LANCHOR47
 	str	x0, [x29, 112]
-.L1424:
+.L1497:
 	ldr	x0, [x29, 128]
 	mov	x5, 0
-	ldr	x6, [x21, #:lo12:.LANCHOR77]
+	ldr	x6, [x21, #:lo12:.LANCHOR78]
 	mov	w20, 0
 	mov	w12, 56
-	ldrh	w7, [x0, #:lo12:.LANCHOR37]
-	adrp	x0, .LANCHOR183
-	ldr	x8, [x0, #:lo12:.LANCHOR183]
-	adrp	x0, .LANCHOR184
-	ldr	x10, [x0, #:lo12:.LANCHOR184]
+	ldrh	w7, [x0, #:lo12:.LANCHOR38]
+	adrp	x0, .LANCHOR186
+	ldr	x8, [x0, #:lo12:.LANCHOR186]
+	adrp	x0, .LANCHOR187
+	ldr	x10, [x0, #:lo12:.LANCHOR187]
 	ldr	x0, [x29, 120]
-	ldrh	w11, [x0, #:lo12:.LANCHOR58]
-.L1417:
+	ldrh	w11, [x0, #:lo12:.LANCHOR59]
+.L1490:
 	cmp	w7, w5, uxth
-	bhi	.L1420
-	cbz	w20, .L1405
+	bhi	.L1493
+	cbz	w20, .L1478
 	mov	w2, w22
 	mov	w1, w20
 	strb	wzr, [x23, #:lo12:.LANCHOR27]
@@ -9693,11 +10183,11 @@ FtlLowFormatEraseBlock:
 	strb	w0, [x23, #:lo12:.LANCHOR27]
 	mov	x2, 0
 	umull	x1, w20, w1
-.L1423:
-	ldr	x0, [x21, #:lo12:.LANCHOR77]
+.L1496:
+	ldr	x0, [x21, #:lo12:.LANCHOR78]
 	add	x3, x0, x2
 	ldr	w0, [x0, x2]
-	cbz	w0, .L1422
+	cbz	w0, .L1495
 	ldr	w0, [x3, 4]
 	add	w19, w19, 1
 	stp	x2, x1, [x29, 96]
@@ -9705,39 +10195,39 @@ FtlLowFormatEraseBlock:
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
 	ldp	x2, x1, [x29, 96]
-.L1422:
+.L1495:
 	add	x2, x2, 56
 	cmp	x1, x2
-	bne	.L1423
+	bne	.L1496
 	add	w24, w24, w28
 	and	w24, w24, 65535
 	cmp	w27, w24
-	bhi	.L1424
+	bhi	.L1497
 	mov	x23, 0
-.L1426:
-	cbz	w25, .L1425
-	ldr	x0, [x21, #:lo12:.LANCHOR77]
+.L1499:
+	cbz	w25, .L1498
+	ldr	x0, [x21, #:lo12:.LANCHOR78]
 	add	x1, x0, x23
 	ldr	w0, [x0, x23]
-	cbnz	w0, .L1425
+	cbnz	w0, .L1498
 	ldr	w0, [x1, 4]
 	mov	w1, 1
 	str	x2, [x29, 136]
 	lsr	w0, w0, 10
 	bl	FtlFreeSysBlkQueueIn
 	ldr	x2, [x29, 136]
-.L1425:
+.L1498:
 	add	x23, x23, 56
 	cmp	x23, x2
-	bne	.L1426
+	bne	.L1499
 	cmp	w26, 63
 	ccmp	w25, 0, 0, hi
-	beq	.L1405
-	ldr	x0, [x21, #:lo12:.LANCHOR77]
+	beq	.L1478
+	ldr	x0, [x21, #:lo12:.LANCHOR78]
 	mov	w2, w20
 	mov	w1, w22
 	bl	FlashEraseBlocks
-.L1405:
+.L1478:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9746,7 +10236,7 @@ FtlLowFormatEraseBlock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1411:
+.L1484:
 	mul	x0, x5, x8
 	mov	w1, w26
 	str	wzr, [x6, x0]
@@ -9754,13 +10244,13 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	and	w15, w0, 65535
 	mov	w22, w15
-	cbz	w25, .L1408
+	cbz	w25, .L1481
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L1409
-.L1408:
+	cbnz	w0, .L1482
+.L1481:
 	mov	w0, w22
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L1410
+	cbnz	w0, .L1483
 	umaddl	x1, w24, w14, x6
 	lsl	w15, w15, 10
 	mul	w0, w24, w13
@@ -9770,26 +10260,26 @@ FtlLowFormatEraseBlock:
 	str	w15, [x1, 4]
 	add	x0, x12, x0, sxtw 2
 	stp	xzr, x0, [x1, 8]
-.L1409:
+.L1482:
 	add	x5, x5, 1
-	b	.L1407
-.L1410:
+	b	.L1480
+.L1483:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1409
-.L1415:
-	adrp	x0, .LANCHOR53
-	ldrh	w27, [x0, #:lo12:.LANCHOR53]
+	b	.L1482
+.L1488:
+	adrp	x0, .LANCHOR54
+	ldrh	w27, [x0, #:lo12:.LANCHOR54]
 	ldrb	w0, [x20, #:lo12:.LANCHOR8]
-	cbnz	w0, .L1429
+	cbnz	w0, .L1502
 	lsr	w28, w27, 2
 	mov	w22, 1
-	b	.L1416
-.L1429:
+	b	.L1489
+.L1502:
 	mov	w22, 1
 	mov	w28, w22
-	b	.L1416
-.L1420:
+	b	.L1489
+.L1493:
 	mov	x0, 56
 	mov	w1, w26
 	mul	x0, x5, x0
@@ -9799,13 +10289,13 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	and	w13, w0, 65535
 	mov	w14, w13
-	cbz	w25, .L1418
+	cbz	w25, .L1491
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L1419
-.L1418:
+	cbnz	w0, .L1492
+.L1491:
 	mov	w0, w14
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L1419
+	cbnz	w0, .L1492
 	umaddl	x1, w20, w12, x6
 	add	w13, w24, w13, lsl 10
 	mul	w0, w20, w11
@@ -9815,12 +10305,12 @@ FtlLowFormatEraseBlock:
 	str	w13, [x1, 4]
 	add	x0, x10, x0, sxtw 2
 	stp	x8, x0, [x1, 8]
-.L1419:
+.L1492:
 	add	x5, x5, 1
-	b	.L1417
-.L1428:
+	b	.L1490
+.L1501:
 	mov	w19, 0
-	b	.L1405
+	b	.L1478
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
 	.section	.text.FtlBbmTblFlush,"ax",@progbits
 	.align	2
@@ -9830,45 +10320,45 @@ FtlBbmTblFlush:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR76
+	adrp	x22, .LANCHOR77
 	stp	x19, x20, [sp, 16]
-	ldr	w0, [x22, #:lo12:.LANCHOR76]
+	ldr	w0, [x22, #:lo12:.LANCHOR77]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w0, .L1452
-	adrp	x24, .LANCHOR185
-	adrp	x23, .LANCHOR180
-	adrp	x19, .LANCHOR199
-	add	x20, x19, :lo12:.LANCHOR199
-	ldr	x1, [x24, #:lo12:.LANCHOR185]
-	adrp	x21, .LANCHOR74
-	ldr	x0, [x23, #:lo12:.LANCHOR180]
-	add	x26, x21, :lo12:.LANCHOR74
+	cbnz	w0, .L1525
+	adrp	x24, .LANCHOR188
+	adrp	x23, .LANCHOR183
+	adrp	x19, .LANCHOR202
+	add	x20, x19, :lo12:.LANCHOR202
+	ldr	x1, [x24, #:lo12:.LANCHOR188]
+	adrp	x21, .LANCHOR75
+	ldr	x0, [x23, #:lo12:.LANCHOR183]
+	add	x26, x21, :lo12:.LANCHOR75
 	stp	x0, x1, [x20, 8]
-	adrp	x1, .LANCHOR57
-	adrp	x27, .LANCHOR44
-	adrp	x28, .LANCHOR120
-	ldrh	w2, [x1, #:lo12:.LANCHOR57]
+	adrp	x1, .LANCHOR58
+	adrp	x27, .LANCHOR45
+	adrp	x28, .LANCHOR123
+	ldrh	w2, [x1, #:lo12:.LANCHOR58]
 	add	x26, x26, 32
 	mov	w25, 0
-	add	x27, x27, :lo12:.LANCHOR44
-	add	x28, x28, :lo12:.LANCHOR120
+	add	x27, x27, :lo12:.LANCHOR45
+	add	x28, x28, :lo12:.LANCHOR123
 	mov	w1, 0
 	bl	ftl_memset
-.L1453:
+.L1526:
 	ldrh	w0, [x27]
 	cmp	w25, w0
-	blt	.L1454
-	add	x19, x19, :lo12:.LANCHOR199
-	add	x20, x21, :lo12:.LANCHOR74
+	blt	.L1527
+	add	x19, x19, :lo12:.LANCHOR202
+	add	x20, x21, :lo12:.LANCHOR75
 	mov	w2, 16
 	mov	w1, 255
-	adrp	x25, .LC31
-	adrp	x27, .LANCHOR53
+	adrp	x25, .LC33
+	adrp	x27, .LANCHOR54
 	ldr	x28, [x19, 16]
-	add	x25, x25, :lo12:.LC31
-	add	x27, x27, :lo12:.LANCHOR53
+	add	x25, x25, :lo12:.LC33
+	add	x27, x27, :lo12:.LANCHOR54
 	mov	w26, 0
 	mov	x0, x28
 	bl	ftl_memset
@@ -9876,24 +10366,24 @@ FtlBbmTblFlush:
 	strh	w0, [x28]
 	ldr	w0, [x20, 8]
 	str	w0, [x28, 4]
-	ldrh	w0, [x21, #:lo12:.LANCHOR74]
+	ldrh	w0, [x21, #:lo12:.LANCHOR75]
 	mov	w21, 0
 	strh	w0, [x28, 2]
 	ldrh	w0, [x20, 4]
 	strh	w0, [x28, 8]
 	ldrh	w0, [x20, 6]
 	strh	w0, [x28, 10]
-	adrp	x0, .LANCHOR36
-	ldr	w0, [x0, #:lo12:.LANCHOR36]
+	adrp	x0, .LANCHOR37
+	ldr	w0, [x0, #:lo12:.LANCHOR37]
 	strh	w0, [x28, 12]
-.L1455:
+.L1528:
 	ldrh	w4, [x28, 10]
 	ldrh	w1, [x20]
 	ldrh	w2, [x20, 2]
 	ldrh	w3, [x20, 4]
-	ldr	x0, [x23, #:lo12:.LANCHOR180]
+	ldr	x0, [x23, #:lo12:.LANCHOR183]
 	str	x0, [x19, 8]
-	ldr	x0, [x24, #:lo12:.LANCHOR185]
+	ldr	x0, [x24, #:lo12:.LANCHOR188]
 	str	x0, [x19, 16]
 	orr	w0, w2, w1, lsl 10
 	str	wzr, [x19]
@@ -9909,7 +10399,7 @@ FtlBbmTblFlush:
 	ldrh	w1, [x20, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L1456
+	blt	.L1529
 	ldr	w0, [x20, 8]
 	mov	w2, 1
 	ldrh	w1, [x20, 4]
@@ -9919,10 +10409,10 @@ FtlBbmTblFlush:
 	ldrh	w0, [x20]
 	strh	w0, [x28, 8]
 	strh	w0, [x20, 4]
-	adrp	x0, .LANCHOR77
+	adrp	x0, .LANCHOR78
 	strh	w1, [x20]
 	lsl	w1, w1, 10
-	ldr	x0, [x0, #:lo12:.LANCHOR77]
+	ldr	x0, [x0, #:lo12:.LANCHOR78]
 	str	w1, [x19, 4]
 	strh	wzr, [x20, 2]
 	str	w1, [x0, 4]
@@ -9933,29 +10423,29 @@ FtlBbmTblFlush:
 	mov	w2, w3
 	mov	w1, w3
 	bl	FlashProgPages
-.L1456:
+.L1529:
 	ldrh	w0, [x20, 2]
 	add	w0, w0, 1
 	strh	w0, [x20, 2]
 	ldr	w0, [x19]
 	cmn	w0, #1
-	bne	.L1457
+	bne	.L1530
 	ldr	w1, [x19, 4]
 	add	w21, w21, 1
-	adrp	x0, .LC32
+	adrp	x0, .LC34
 	and	w21, w21, 65535
-	add	x0, x0, :lo12:.LC32
+	add	x0, x0, :lo12:.LC34
 	bl	printf
 	cmp	w21, 3
-	bls	.L1455
+	bls	.L1528
 	ldr	w1, [x19, 4]
 	mov	w2, w21
-	adrp	x0, .LC33
-	add	x0, x0, :lo12:.LC33
+	adrp	x0, .LC35
+	add	x0, x0, :lo12:.LC35
 	bl	printf
 	mov	w0, 1
-	str	w0, [x22, #:lo12:.LANCHOR76]
-.L1452:
+	str	w0, [x22, #:lo12:.LANCHOR77]
+.L1525:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9964,7 +10454,7 @@ FtlBbmTblFlush:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1454:
+.L1527:
 	ldrh	w2, [x28]
 	ldr	x1, [x26], 8
 	ldr	x0, [x20, 8]
@@ -9973,62 +10463,62 @@ FtlBbmTblFlush:
 	add	w25, w25, 1
 	add	x0, x0, x3, sxtw 2
 	bl	ftl_memcpy
-	b	.L1453
-.L1457:
-	cbnz	w26, .L1452
+	b	.L1526
+.L1530:
+	cbnz	w26, .L1525
 	mov	w26, 1
-	b	.L1455
+	b	.L1528
 	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
 	.section	.text.allocate_data_superblock,"ax",@progbits
 	.align	2
 	.global	allocate_data_superblock
 	.type	allocate_data_superblock, %function
 allocate_data_superblock:
-	adrp	x1, .LANCHOR76
-	ldr	w1, [x1, #:lo12:.LANCHOR76]
-	cbnz	w1, .L1525
+	adrp	x1, .LANCHOR77
+	ldr	w1, [x1, #:lo12:.LANCHOR77]
+	cbnz	w1, .L1598
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
 	stp	x27, x28, [sp, 80]
-	adrp	x27, .LANCHOR85
-	add	x0, x27, :lo12:.LANCHOR85
+	adrp	x27, .LANCHOR86
+	add	x0, x27, :lo12:.LANCHOR86
 	stp	x23, x24, [sp, 48]
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR88
-	add	x23, x0, :lo12:.LANCHOR88
+	adrp	x0, .LANCHOR89
+	add	x23, x0, :lo12:.LANCHOR89
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
-.L1516:
+.L1589:
 	ldr	x1, [x29, 120]
-	adrp	x0, .LANCHOR88
-	adrp	x25, .LANCHOR39
-	ldrh	w0, [x0, #:lo12:.LANCHOR88]
+	adrp	x0, .LANCHOR89
+	adrp	x25, .LANCHOR40
+	ldrh	w0, [x0, #:lo12:.LANCHOR89]
 	ldrh	w1, [x1]
 	add	w0, w0, w1
-	ldrh	w1, [x25, #:lo12:.LANCHOR39]
+	ldrh	w1, [x25, #:lo12:.LANCHOR40]
 	cmp	w0, w1
-	ble	.L1465
-	mov	w2, 2861
-	adrp	x1, .LANCHOR200
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR200
-	add	x0, x0, :lo12:.LC6
+	ble	.L1538
+	mov	w2, 3168
+	adrp	x1, .LANCHOR203
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR203
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1465:
-	adrp	x0, .LANCHOR93
-	add	x0, x0, :lo12:.LANCHOR93
+.L1538:
+	adrp	x0, .LANCHOR94
+	add	x0, x0, :lo12:.LANCHOR94
 	cmp	x19, x0
-	bne	.L1466
-	adrp	x1, .LANCHOR169
+	bne	.L1539
+	adrp	x1, .LANCHOR172
 	ldrh	w2, [x23]
-	ldr	w3, [x1, #:lo12:.LANCHOR169]
+	ldr	w3, [x1, #:lo12:.LANCHOR172]
 	lsr	w0, w2, 1
 	add	w4, w0, 1
 	mul	w1, w2, w3
@@ -10036,65 +10526,65 @@ allocate_data_superblock:
 	adrp	x4, .LANCHOR28
 	and	w1, w1, 65535
 	ldr	w4, [x4, #:lo12:.LANCHOR28]
-	cbz	w4, .L1467
-	adrp	x4, .LANCHOR167
-	ldr	w4, [x4, #:lo12:.LANCHOR167]
-	cmp	w4, 29
-	bhi	.L1467
+	cbz	w4, .L1540
+	adrp	x4, .LANCHOR170
+	ldr	w4, [x4, #:lo12:.LANCHOR170]
+	cmp	w4, 39
+	bhi	.L1540
 	cmp	w4, 2
-	bls	.L1500
-	tbz	x2, 0, .L1496
-	cbz	w3, .L1500
-.L1496:
+	bls	.L1573
+	tbz	x2, 0, .L1569
+	cbz	w3, .L1573
+.L1569:
 	mov	w1, w0
-	b	.L1467
-.L1466:
+	b	.L1540
+.L1539:
 	ldrb	w0, [x19, 8]
 	cmp	w0, 1
-	bne	.L1500
-	adrp	x0, .LANCHOR43
-	ldrh	w0, [x0, #:lo12:.LANCHOR43]
+	bne	.L1573
+	adrp	x0, .LANCHOR44
+	ldrh	w0, [x0, #:lo12:.LANCHOR44]
 	cmp	w0, 1
-	beq	.L1500
+	beq	.L1573
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbnz	w0, .L1500
+	cbnz	w0, .L1573
 	adrp	x2, .LANCHOR28
 	ldrh	w0, [x23]
 	ldr	w2, [x2, #:lo12:.LANCHOR28]
 	lsr	w1, w0, 3
-	cbz	w2, .L1467
-	adrp	x2, .LANCHOR167
-	ldr	w2, [x2, #:lo12:.LANCHOR167]
+	cbz	w2, .L1540
+	adrp	x2, .LANCHOR170
+	ldr	w2, [x2, #:lo12:.LANCHOR170]
 	cmp	w2, 1
-	bhi	.L1467
+	bhi	.L1540
 	mov	w1, 7
 	mul	w1, w0, w1
 	lsr	w1, w1, 3
-.L1467:
-	cbz	w1, .L1468
+.L1540:
+	cbz	w1, .L1541
 	sub	w1, w1, #1
 	and	w1, w1, 65535
-.L1468:
+.L1541:
 	ldrb	w2, [x19, 8]
-	adrp	x0, .LANCHOR87
-	add	x0, x0, :lo12:.LANCHOR87
+	adrp	x0, .LANCHOR88
+	add	x0, x0, :lo12:.LANCHOR88
 	bl	List_pop_index_node
 	and	w21, w0, 65535
 	ldrh	w0, [x23]
-	cbnz	w0, .L1469
-	mov	w2, 2881
-	adrp	x1, .LANCHOR200
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR200
-	add	x0, x0, :lo12:.LC6
+	cbnz	w0, .L1542
+	mov	w2, 3188
+	adrp	x1, .LANCHOR203
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR203
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1469:
+.L1542:
 	ldrh	w0, [x23]
 	sub	w0, w0, #1
 	strh	w0, [x23]
@@ -10102,241 +10592,241 @@ allocate_data_superblock:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L1470
-	adrp	x0, .LANCHOR83
+	cbnz	w0, .L1543
+	adrp	x0, .LANCHOR84
 	ubfiz	x21, x21, 1, 16
 	mov	w1, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR83]
+	ldr	x0, [x0, #:lo12:.LANCHOR84]
 	strh	w1, [x0, x21]
-	ldrh	w1, [x27, #:lo12:.LANCHOR85]
+	ldrh	w1, [x27, #:lo12:.LANCHOR86]
 	ldrh	w0, [x23]
 	add	w0, w0, w1
-	ldrh	w1, [x25, #:lo12:.LANCHOR39]
+	ldrh	w1, [x25, #:lo12:.LANCHOR40]
 	cmp	w0, w1
-	ble	.L1516
-	mov	w2, 2893
-	adrp	x1, .LANCHOR200
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR200
-	add	x0, x0, :lo12:.LC6
+	ble	.L1589
+	mov	w2, 3200
+	adrp	x1, .LANCHOR203
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR203
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-	b	.L1516
-.L1500:
+	b	.L1589
+.L1573:
 	mov	w1, 0
-	b	.L1468
-.L1470:
-	ldrh	w1, [x27, #:lo12:.LANCHOR85]
+	b	.L1541
+.L1543:
+	ldrh	w1, [x27, #:lo12:.LANCHOR86]
 	ldrh	w0, [x23]
 	add	w0, w0, w1
-	ldrh	w1, [x25, #:lo12:.LANCHOR39]
+	ldrh	w1, [x25, #:lo12:.LANCHOR40]
 	cmp	w0, w1
-	ble	.L1472
-	mov	w2, 2896
-	adrp	x1, .LANCHOR200
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR200
-	add	x0, x0, :lo12:.LC6
+	ble	.L1545
+	mov	w2, 3203
+	adrp	x1, .LANCHOR203
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR203
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1472:
-	adrp	x1, .LANCHOR37
-	adrp	x24, .LANCHOR77
+.L1545:
+	adrp	x1, .LANCHOR38
+	adrp	x24, .LANCHOR78
 	mov	w2, 56
 	mov	x3, 8
-	ldrh	w1, [x1, #:lo12:.LANCHOR37]
+	ldrh	w1, [x1, #:lo12:.LANCHOR38]
 	add	x26, x19, 16
-	ldr	x4, [x24, #:lo12:.LANCHOR77]
+	ldr	x4, [x24, #:lo12:.LANCHOR78]
 	mov	x5, x26
 	mov	w20, 0
 	mov	w6, 65535
 	add	x0, x4, 8
 	umaddl	x1, w2, w1, x3
 	add	x1, x4, x1
-.L1473:
+.L1546:
 	cmp	x1, x0
-	bne	.L1475
-	cbnz	w20, .L1476
-	mov	w2, 2908
-	adrp	x1, .LANCHOR200
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR200
-	add	x0, x0, :lo12:.LC6
+	bne	.L1548
+	cbnz	w20, .L1549
+	mov	w2, 3215
+	adrp	x1, .LANCHOR203
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR203
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1476:
+.L1549:
 	adrp	x0, .LANCHOR28
 	uxtw	x22, w21
-	adrp	x28, .LANCHOR78
+	adrp	x28, .LANCHOR79
 	ldr	w0, [x0, #:lo12:.LANCHOR28]
-	cbz	w0, .L1477
-	adrp	x0, .LANCHOR91
-	add	x0, x0, :lo12:.LANCHOR91
+	cbz	w0, .L1550
+	adrp	x0, .LANCHOR92
+	add	x0, x0, :lo12:.LANCHOR92
 	cmp	x19, x0
-	bne	.L1477
-	ldr	x0, [x28, #:lo12:.LANCHOR78]
+	bne	.L1550
+	ldr	x0, [x28, #:lo12:.LANCHOR79]
 	ldrh	w0, [x0, x22, lsl 1]
-	cmp	w0, 30
-	bls	.L1477
+	cmp	w0, 40
+	bls	.L1550
 	strb	wzr, [x19, 8]
-.L1477:
-	adrp	x0, .LANCHOR201
-	ldrh	w0, [x0, #:lo12:.LANCHOR201]
+.L1550:
+	adrp	x0, .LANCHOR204
+	ldrh	w0, [x0, #:lo12:.LANCHOR204]
 	cmp	w0, w21
-	bne	.L1478
-	mov	w2, 2915
-	adrp	x1, .LANCHOR200
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR200
-	add	x0, x0, :lo12:.LC6
+	bne	.L1551
+	mov	w2, 3222
+	adrp	x1, .LANCHOR203
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR203
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1478:
+.L1551:
 	ldrb	w0, [x19, 8]
-	adrp	x6, .LANCHOR47
-	adrp	x5, .LANCHOR164
-	adrp	x4, .LANCHOR165
-	cbnz	w0, .L1479
-	ldr	x2, [x28, #:lo12:.LANCHOR78]
+	adrp	x6, .LANCHOR48
+	adrp	x5, .LANCHOR167
+	adrp	x4, .LANCHOR168
+	cbnz	w0, .L1552
+	ldr	x2, [x28, #:lo12:.LANCHOR79]
 	lsl	x1, x22, 1
 	ldrh	w0, [x2, x1]
-	cbz	w0, .L1480
-	ldrh	w7, [x6, #:lo12:.LANCHOR47]
+	cbz	w0, .L1553
+	ldrh	w7, [x6, #:lo12:.LANCHOR48]
 	add	w0, w0, w7
-.L1528:
+.L1601:
 	strh	w0, [x2, x1]
 	mov	w1, 0
-	ldr	w0, [x5, #:lo12:.LANCHOR164]
+	ldr	w0, [x5, #:lo12:.LANCHOR167]
 	add	w0, w0, 1
-	str	w0, [x5, #:lo12:.LANCHOR164]
+	str	w0, [x5, #:lo12:.LANCHOR167]
 	mov	w0, w21
 	bl	ftl_set_blk_mode
-.L1482:
-	ldr	x0, [x28, #:lo12:.LANCHOR78]
+.L1555:
+	ldr	x0, [x28, #:lo12:.LANCHOR79]
 	lsl	x22, x22, 1
 	ldrh	w1, [x0, x22]
-	adrp	x0, .LANCHOR166
-	ldr	w2, [x0, #:lo12:.LANCHOR166]
+	adrp	x0, .LANCHOR169
+	ldr	w2, [x0, #:lo12:.LANCHOR169]
 	cmp	w1, w2
-	bls	.L1483
-	str	w1, [x0, #:lo12:.LANCHOR166]
-.L1483:
-	ldr	w2, [x5, #:lo12:.LANCHOR164]
+	bls	.L1556
+	str	w1, [x0, #:lo12:.LANCHOR169]
+.L1556:
+	ldr	w2, [x5, #:lo12:.LANCHOR167]
 	mov	x3, 4
-	ldr	w1, [x4, #:lo12:.LANCHOR165]
-	ldrh	w0, [x6, #:lo12:.LANCHOR47]
+	ldr	w1, [x4, #:lo12:.LANCHOR168]
+	ldrh	w0, [x6, #:lo12:.LANCHOR48]
 	madd	w0, w0, w2, w1
-	ldrh	w1, [x25, #:lo12:.LANCHOR39]
+	ldrh	w1, [x25, #:lo12:.LANCHOR40]
 	udiv	w0, w0, w1
-	adrp	x1, .LANCHOR202
-	str	w0, [x1, #:lo12:.LANCHOR202]
-	adrp	x0, .LANCHOR188
-	ldr	x1, [x0, #:lo12:.LANCHOR188]
+	adrp	x1, .LANCHOR205
+	str	w0, [x1, #:lo12:.LANCHOR205]
+	adrp	x0, .LANCHOR191
+	ldr	x1, [x0, #:lo12:.LANCHOR191]
 	ldr	w0, [x1, 16]
 	add	w0, w0, 1
 	str	w0, [x1, 16]
 	mov	w1, 56
-	ldr	x0, [x24, #:lo12:.LANCHOR77]
+	ldr	x0, [x24, #:lo12:.LANCHOR78]
 	nop // between mem op and mult-accumulate
 	umaddl	x1, w1, w20, x3
 	add	x2, x0, 4
 	add	x1, x0, x1
-.L1484:
+.L1557:
 	cmp	x1, x2
-	bne	.L1485
+	bne	.L1558
 	adrp	x1, .LANCHOR8
 	ldrb	w1, [x1, #:lo12:.LANCHOR8]
-	cbz	w1, .L1486
+	cbz	w1, .L1559
 	ldrb	w1, [x19, 8]
 	mov	w2, w20
 	cmp	w1, 1
-	bne	.L1487
+	bne	.L1560
 	mov	w1, 0
-.L1529:
+.L1602:
 	bl	FlashEraseBlocks
-.L1486:
+.L1559:
 	ldrb	w1, [x19, 8]
 	mov	w2, w20
-	ldr	x0, [x24, #:lo12:.LANCHOR77]
+	ldr	x0, [x24, #:lo12:.LANCHOR78]
 	mov	x25, 0
 	bl	FlashEraseBlocks
 	mov	w1, 0
 	mov	x3, 56
-.L1488:
+.L1561:
 	cmp	w20, w25, uxth
-	bhi	.L1490
-	cbz	w1, .L1491
+	bhi	.L1563
+	cbz	w1, .L1564
 	mov	w0, w21
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L1491:
+.L1564:
 	ldrb	w0, [x19, 7]
-	adrp	x2, .LANCHOR83
-	cbnz	w0, .L1492
-	ldr	x0, [x2, #:lo12:.LANCHOR83]
+	adrp	x2, .LANCHOR84
+	cbnz	w0, .L1565
+	ldr	x0, [x2, #:lo12:.LANCHOR84]
 	mov	w1, -1
 	strh	w1, [x0, x22]
-	b	.L1516
-.L1475:
+	b	.L1589
+.L1548:
 	ldrh	w3, [x5]
 	stp	xzr, xzr, [x0]
 	cmp	w3, w6
-	beq	.L1474
+	beq	.L1547
 	umaddl	x7, w20, w2, x4
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	lsl	w3, w3, 10
 	str	w3, [x7, 4]
-.L1474:
+.L1547:
 	add	x0, x0, 56
 	add	x5, x5, 2
-	b	.L1473
-.L1480:
+	b	.L1546
+.L1553:
 	mov	w0, 2
-	b	.L1528
-.L1479:
-	ldr	x2, [x28, #:lo12:.LANCHOR78]
+	b	.L1601
+.L1552:
+	ldr	x2, [x28, #:lo12:.LANCHOR79]
 	lsl	x0, x22, 1
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-	ldr	w0, [x4, #:lo12:.LANCHOR165]
+	ldr	w0, [x4, #:lo12:.LANCHOR168]
 	add	w0, w0, 1
-	str	w0, [x4, #:lo12:.LANCHOR165]
+	str	w0, [x4, #:lo12:.LANCHOR168]
 	mov	w0, w21
-	bl	ftl_set_blk_mode.part.9
-	b	.L1482
-.L1485:
+	bl	ftl_set_blk_mode.part.10
+	b	.L1555
+.L1558:
 	ldr	w3, [x2]
 	and	w3, w3, -1024
 	str	w3, [x2], 56
-	b	.L1484
-.L1487:
+	b	.L1557
+.L1560:
 	mov	w1, 1
-	b	.L1529
-.L1490:
+	b	.L1602
+.L1563:
 	mul	x0, x25, x3
-	ldr	x2, [x24, #:lo12:.LANCHOR77]
+	ldr	x2, [x24, #:lo12:.LANCHOR78]
 	add	x4, x2, x0
 	ldr	w2, [x2, x0]
 	cmn	w2, #1
-	bne	.L1489
+	bne	.L1562
 	add	w1, w1, 1
 	ldr	w0, [x4, 4]
 	str	x3, [x29, 104]
@@ -10349,43 +10839,43 @@ allocate_data_superblock:
 	ldrb	w0, [x19, 7]
 	sub	w0, w0, #1
 	strb	w0, [x19, 7]
-.L1489:
+.L1562:
 	add	x25, x25, 1
 	add	x26, x26, 2
-	b	.L1488
-.L1492:
-	adrp	x1, .LANCHOR52
-	adrp	x3, .LANCHOR156
+	b	.L1561
+.L1565:
+	adrp	x1, .LANCHOR53
+	adrp	x3, .LANCHOR159
 	strb	wzr, [x19, 6]
-	ldrh	w1, [x1, #:lo12:.LANCHOR52]
+	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	strh	wzr, [x19, 2]
 	strh	w21, [x19]
 	mul	w0, w0, w1
-	ldr	w1, [x3, #:lo12:.LANCHOR156]
+	ldr	w1, [x3, #:lo12:.LANCHOR159]
 	str	w1, [x19, 12]
 	add	w1, w1, 1
-	str	w1, [x3, #:lo12:.LANCHOR156]
-	ldr	x1, [x2, #:lo12:.LANCHOR83]
+	str	w1, [x3, #:lo12:.LANCHOR159]
+	ldr	x1, [x2, #:lo12:.LANCHOR84]
 	and	w0, w0, 65535
 	strh	w0, [x19, 4]
 	strh	w0, [x1, x22]
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1493
+	cbz	w0, .L1566
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L1464
-.L1493:
-	mov	w2, 2974
-	adrp	x1, .LANCHOR200
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR200
-	add	x0, x0, :lo12:.LC6
+	cbnz	w0, .L1537
+.L1566:
+	mov	w2, 3281
+	adrp	x1, .LANCHOR203
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR203
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1464:
+.L1537:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -10394,7 +10884,7 @@ allocate_data_superblock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1525:
+.L1598:
 	mov	w0, 0
 	ret
 	.size	allocate_data_superblock, .-allocate_data_superblock
@@ -10406,24 +10896,24 @@ FtlGcFreeBadSuperBlk:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR114
+	adrp	x21, .LANCHOR117
 	stp	x25, x26, [sp, 64]
 	and	w25, w0, 65535
-	ldrh	w0, [x21, #:lo12:.LANCHOR114]
+	ldrh	w0, [x21, #:lo12:.LANCHOR117]
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	str	x27, [sp, 80]
-	cbz	w0, .L1531
-	adrp	x23, .LANCHOR115
-	add	x24, x23, :lo12:.LANCHOR115
+	cbz	w0, .L1604
+	adrp	x23, .LANCHOR118
+	add	x24, x23, :lo12:.LANCHOR118
 	mov	w19, 0
-.L1532:
-	adrp	x0, .LANCHOR37
-	ldrh	w0, [x0, #:lo12:.LANCHOR37]
+.L1605:
+	adrp	x0, .LANCHOR38
+	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w0, w19
-	bhi	.L1538
+	bhi	.L1611
 	bl	FtlGcReFreshBadBlk
-.L1531:
+.L1604:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -10432,28 +10922,28 @@ FtlGcFreeBadSuperBlk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1538:
-	adrp	x0, .LANCHOR46
-	add	x0, x0, :lo12:.LANCHOR46
+.L1611:
+	adrp	x0, .LANCHOR47
+	add	x0, x0, :lo12:.LANCHOR47
 	mov	w1, w25
-	add	x22, x21, :lo12:.LANCHOR114
+	add	x22, x21, :lo12:.LANCHOR117
 	mov	w20, 0
 	ldrb	w0, [x0, w19, sxtw]
 	bl	V2P_block
 	and	w26, w0, 65535
-.L1533:
+.L1606:
 	ldrh	w0, [x22]
 	cmp	w0, w20
-	bhi	.L1537
+	bhi	.L1610
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1532
-.L1537:
-	add	x0, x23, :lo12:.LANCHOR115
+	b	.L1605
+.L1610:
+	add	x0, x23, :lo12:.LANCHOR118
 	add	w27, w20, 1
 	ldrh	w0, [x0, w20, sxtw 1]
 	cmp	w0, w26
-	bne	.L1534
+	bne	.L1607
 	mov	w0, w26
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
@@ -10461,22 +10951,22 @@ FtlGcFreeBadSuperBlk:
 	sxtw	x3, w27
 	and	x4, x20, 65535
 	mov	x0, 0
-.L1535:
+.L1608:
 	add	w2, w20, w0
 	cmp	w1, w2, uxth
-	bhi	.L1536
+	bhi	.L1609
 	sub	w1, w1, #1
 	strh	w1, [x22]
-.L1534:
+.L1607:
 	and	w20, w27, 65535
-	b	.L1533
-.L1536:
+	b	.L1606
+.L1609:
 	add	x2, x3, x0
 	ldrh	w5, [x24, x2, lsl 1]
 	add	x2, x4, x0
 	add	x0, x0, 1
 	strh	w5, [x24, x2, lsl 1]
-	b	.L1535
+	b	.L1608
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
 	.section	.text.update_vpc_list,"ax",@progbits
 	.align	2
@@ -10484,92 +10974,92 @@ FtlGcFreeBadSuperBlk:
 	.type	update_vpc_list, %function
 update_vpc_list:
 	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LANCHOR83
+	adrp	x1, .LANCHOR84
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w19, w0, 65535
-	ldr	x1, [x1, #:lo12:.LANCHOR83]
+	ldr	x1, [x1, #:lo12:.LANCHOR84]
 	ubfiz	x0, x19, 1, 16
 	ldrh	w0, [x1, x0]
-	cbnz	w0, .L1544
-	adrp	x0, .LANCHOR201
-	ldrh	w1, [x0, #:lo12:.LANCHOR201]
+	cbnz	w0, .L1617
+	adrp	x0, .LANCHOR204
+	ldrh	w1, [x0, #:lo12:.LANCHOR204]
 	cmp	w1, w19
-	bne	.L1545
+	bne	.L1618
 	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR201]
-.L1546:
-	adrp	x20, .LANCHOR85
+	strh	w1, [x0, #:lo12:.LANCHOR204]
+.L1619:
+	adrp	x20, .LANCHOR86
 	mov	w1, w19
-	adrp	x0, .LANCHOR82
-	add	x0, x0, :lo12:.LANCHOR82
+	adrp	x0, .LANCHOR83
+	add	x0, x0, :lo12:.LANCHOR83
 	bl	List_remove_node
-	ldrh	w0, [x20, #:lo12:.LANCHOR85]
-	cbnz	w0, .L1548
-	mov	w2, 3085
-	adrp	x1, .LANCHOR203
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR203
-	add	x0, x0, :lo12:.LC6
+	ldrh	w0, [x20, #:lo12:.LANCHOR86]
+	cbnz	w0, .L1621
+	mov	w2, 3392
+	adrp	x1, .LANCHOR206
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR206
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1548:
-	ldrh	w0, [x20, #:lo12:.LANCHOR85]
+.L1621:
+	ldrh	w0, [x20, #:lo12:.LANCHOR86]
 	sub	w0, w0, #1
-	strh	w0, [x20, #:lo12:.LANCHOR85]
+	strh	w0, [x20, #:lo12:.LANCHOR86]
 	mov	w0, w19
 	bl	free_data_superblock
 	mov	w0, w19
 	bl	FtlGcFreeBadSuperBlk
-	adrp	x0, .LANCHOR88
-	ldrh	w1, [x20, #:lo12:.LANCHOR85]
-	ldrh	w0, [x0, #:lo12:.LANCHOR88]
+	adrp	x0, .LANCHOR89
+	ldrh	w1, [x20, #:lo12:.LANCHOR86]
+	ldrh	w0, [x0, #:lo12:.LANCHOR89]
 	add	w0, w0, w1
-	adrp	x1, .LANCHOR39
-	ldrh	w1, [x1, #:lo12:.LANCHOR39]
+	adrp	x1, .LANCHOR40
+	ldrh	w1, [x1, #:lo12:.LANCHOR40]
 	cmp	w0, w1
-	ble	.L1552
-	mov	w2, 3088
-	adrp	x1, .LANCHOR203
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR203
-	add	x0, x0, :lo12:.LC6
+	ble	.L1625
+	mov	w2, 3395
+	adrp	x1, .LANCHOR206
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR206
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1552:
+.L1625:
 	mov	w0, 1
-	b	.L1543
-.L1545:
-	adrp	x0, .LANCHOR91
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
-	cmp	w0, w19
-	beq	.L1551
+	b	.L1616
+.L1618:
 	adrp	x0, .LANCHOR92
 	ldrh	w0, [x0, #:lo12:.LANCHOR92]
 	cmp	w0, w19
-	beq	.L1551
+	beq	.L1624
 	adrp	x0, .LANCHOR93
 	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w0, w19
-	bne	.L1546
-.L1551:
+	beq	.L1624
+	adrp	x0, .LANCHOR94
+	ldrh	w0, [x0, #:lo12:.LANCHOR94]
+	cmp	w0, w19
+	bne	.L1619
+.L1624:
 	mov	w0, 0
-.L1543:
+.L1616:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1544:
+.L1617:
 	mov	w0, w19
 	bl	List_update_data_list
-	b	.L1551
+	b	.L1624
 	.size	update_vpc_list, .-update_vpc_list
 	.section	.text.decrement_vpc_count,"ax",@progbits
 	.align	2
@@ -10580,90 +11070,130 @@ decrement_vpc_count:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w19, w0, 65535
-	str	x21, [sp, 32]
+	stp	x21, x22, [sp, 32]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1555
-	adrp	x21, .LANCHOR83
-	ubfiz	x20, x19, 1, 16
-	ldr	x1, [x21, #:lo12:.LANCHOR83]
-	ldrh	w0, [x1, x20]
-	cbnz	w0, .L1556
+	beq	.L1628
+	adrp	x20, .LANCHOR84
+	ubfiz	x21, x19, 1, 16
+	ldr	x1, [x20, #:lo12:.LANCHOR84]
+	ldrh	w0, [x1, x21]
+	cbnz	w0, .L1629
 	mov	w2, 0
 	mov	w1, w19
-	adrp	x0, .LC34
-	add	x0, x0, :lo12:.LC34
+	adrp	x0, .LC36
+	add	x0, x0, :lo12:.LC36
 	bl	printf
-	ldr	x0, [x21, #:lo12:.LANCHOR83]
-	ldrh	w0, [x0, x20]
-	cbz	w0, .L1557
-.L1562:
-	mov	w20, 0
-.L1554:
-	mov	w0, w20
-	ldr	x21, [sp, 32]
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
-	ret
-.L1557:
-	mov	w2, 3103
-	adrp	x1, .LANCHOR204
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR204
-	add	x0, x0, :lo12:.LC6
+	ldr	x0, [x20, #:lo12:.LANCHOR84]
+	ldrh	w0, [x0, x21]
+	cbnz	w0, .L1630
+	mov	w2, 3410
+	adrp	x1, .LANCHOR207
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR207
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-	b	.L1562
-.L1556:
+.L1630:
+	ldr	x0, [x20, #:lo12:.LANCHOR84]
+	adrp	x6, .LANCHOR88
+	add	x6, x6, :lo12:.LANCHOR88
+	mov	w1, 32
+	strh	w1, [x0, x21]
+	mov	w1, w19
+	mov	x0, x6
+	bl	test_node_in_list
+	cbz	w0, .L1631
+	adrp	x22, .LANCHOR89
+	mov	w1, w19
+	mov	x0, x6
+	bl	List_remove_node
+	ldrh	w0, [x22, #:lo12:.LANCHOR89]
+	cbnz	w0, .L1632
+	mov	w2, 3414
+	adrp	x1, .LANCHOR207
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR207
+	add	x0, x0, :lo12:.LC5
+	bl	printf
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
+	bl	printf
+.L1632:
+	ldrh	w0, [x22, #:lo12:.LANCHOR89]
 	sub	w0, w0, #1
-	strh	w0, [x1, x20]
-.L1555:
-	adrp	x21, .LANCHOR130
+	strh	w0, [x22, #:lo12:.LANCHOR89]
+	mov	w0, w19
+	bl	INSERT_DATA_LIST
+	ldr	x0, [x20, #:lo12:.LANCHOR84]
+	mov	w1, w19
+	ldrh	w2, [x0, x21]
+	adrp	x0, .LC37
+	add	x0, x0, :lo12:.LC37
+	bl	printf
+.L1631:
+	mov	w0, w19
+	bl	FtlGcRefreshBlock
+.L1635:
+	mov	w20, 0
+	b	.L1627
+.L1629:
+	sub	w0, w0, #1
+	strh	w0, [x1, x21]
+.L1628:
+	adrp	x21, .LANCHOR133
 	mov	w1, 65535
-	ldrh	w0, [x21, #:lo12:.LANCHOR130]
+	ldrh	w0, [x21, #:lo12:.LANCHOR133]
 	cmp	w0, w1
-	bne	.L1559
-	strh	w19, [x21, #:lo12:.LANCHOR130]
-	b	.L1562
-.L1559:
+	bne	.L1634
+	strh	w19, [x21, #:lo12:.LANCHOR133]
+	b	.L1635
+.L1634:
 	cmp	w19, w0
-	beq	.L1562
+	beq	.L1635
 	bl	update_vpc_list
 	cmp	w0, 0
-	adrp	x1, .LANCHOR81
-	adrp	x0, .LANCHOR82
-	strh	w19, [x21, #:lo12:.LANCHOR130]
+	adrp	x1, .LANCHOR82
+	adrp	x0, .LANCHOR83
+	strh	w19, [x21, #:lo12:.LANCHOR133]
 	cset	w20, ne
-	ldr	x1, [x1, #:lo12:.LANCHOR81]
-	ldr	x0, [x0, #:lo12:.LANCHOR82]
+	ldr	x1, [x1, #:lo12:.LANCHOR82]
+	ldr	x0, [x0, #:lo12:.LANCHOR83]
 	sub	x0, x0, x1
 	mov	x1, -6148914691236517206
 	asr	x0, x0, 1
 	movk	x1, 0xaaab, lsl 0
 	mul	x0, x0, x1
-	adrp	x1, .LANCHOR83
-	ldr	x1, [x1, #:lo12:.LANCHOR83]
+	adrp	x1, .LANCHOR84
+	ldr	x1, [x1, #:lo12:.LANCHOR84]
 	and	x2, x0, 65535
 	ldrh	w1, [x1, x2, lsl 1]
-	cbnz	w1, .L1554
+	cbnz	w1, .L1627
 	cmp	w19, w0, uxth
-	beq	.L1554
-	mov	w2, 3125
-	adrp	x1, .LANCHOR204
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR204
-	add	x0, x0, :lo12:.LC6
+	beq	.L1627
+	mov	w2, 3435
+	adrp	x1, .LANCHOR207
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR207
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-	b	.L1554
+.L1627:
+	mov	w0, w20
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
 	.size	decrement_vpc_count, .-decrement_vpc_count
 	.section	.text.FtlSlcSuperblockCheck,"ax",@progbits
 	.align	2
@@ -10671,7 +11201,7 @@ decrement_vpc_count:
 	.type	FtlSlcSuperblockCheck, %function
 FtlSlcSuperblockCheck:
 	ldrh	w1, [x0, 4]
-	cbz	w1, .L1575
+	cbz	w1, .L1652
 	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
@@ -10680,86 +11210,86 @@ FtlSlcSuperblockCheck:
 	stp	x21, x22, [sp, 32]
 	str	x23, [sp, 48]
 	cmp	w1, w20
-	beq	.L1563
+	beq	.L1640
 	mov	x19, x0
 	ldrb	w0, [x0, 6]
 	adrp	x22, .LANCHOR8
-	adrp	x21, .LANCHOR117
+	adrp	x21, .LANCHOR120
 	add	x0, x0, 8
 	add	x23, x22, :lo12:.LANCHOR8
-	add	x21, x21, :lo12:.LANCHOR117
+	add	x21, x21, :lo12:.LANCHOR120
 	ldrh	w0, [x19, x0, lsl 1]
-.L1567:
+.L1644:
 	cmp	w0, w20
-	beq	.L1569
+	beq	.L1646
 	ldrb	w0, [x19, 8]
 	cmp	w0, 1
-	bne	.L1570
+	bne	.L1647
 	ldrb	w1, [x23]
-	cbnz	w1, .L1570
+	cbnz	w1, .L1647
 	ldrh	w1, [x19, 2]
 	ldrh	w1, [x21, x1, lsl 1]
 	cmp	w1, w20
-	bne	.L1570
+	bne	.L1647
 	ldrh	w0, [x19, 4]
 	sub	w0, w0, #1
 	strh	w0, [x19, 4]
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1569
+	cbnz	w0, .L1646
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
-.L1578:
+.L1655:
 	strh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
-.L1563:
+.L1640:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1569:
+.L1646:
 	ldrb	w0, [x19, 6]
-	adrp	x1, .LANCHOR37
+	adrp	x1, .LANCHOR38
 	add	w0, w0, 1
-	ldrh	w1, [x1, #:lo12:.LANCHOR37]
+	ldrh	w1, [x1, #:lo12:.LANCHOR38]
 	and	w0, w0, 255
 	strb	w0, [x19, 6]
 	cmp	w1, w0
-	bne	.L1568
+	bne	.L1645
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L1568:
+.L1645:
 	ldrb	w0, [x19, 6]
 	add	x0, x0, 8
 	ldrh	w0, [x19, x0, lsl 1]
-	b	.L1567
-.L1570:
+	b	.L1644
+.L1647:
 	ldrb	w1, [x22, #:lo12:.LANCHOR8]
-	cbz	w1, .L1563
+	cbz	w1, .L1640
 	cmp	w0, 1
-	bne	.L1563
-	adrp	x0, .LANCHOR53
+	bne	.L1640
+	adrp	x0, .LANCHOR54
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+	ldrh	w0, [x0, #:lo12:.LANCHOR54]
 	cmp	w1, w0
-	bcc	.L1563
+	bcc	.L1640
 	ldrh	w0, [x19]
-	adrp	x1, .LANCHOR83
+	adrp	x1, .LANCHOR84
 	ldrh	w3, [x19, 4]
-	ldr	x2, [x1, #:lo12:.LANCHOR83]
+	ldr	x2, [x1, #:lo12:.LANCHOR84]
 	lsl	x0, x0, 1
 	ldrh	w1, [x2, x0]
 	sub	w1, w1, w3
 	strh	w1, [x2, x0]
-	adrp	x0, .LANCHOR52
+	adrp	x0, .LANCHOR53
 	strh	wzr, [x19, 4]
-	ldrh	w0, [x0, #:lo12:.LANCHOR52]
-	b	.L1578
-.L1575:
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+	b	.L1655
+.L1652:
 	ret
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
 	.section	.text.get_new_active_ppa,"ax",@progbits
@@ -10777,174 +11307,174 @@ get_new_active_ppa:
 	stp	x23, x24, [sp, 48]
 	cmp	w1, w0
 	str	x25, [sp, 64]
-	bne	.L1580
-	mov	w2, 3025
-	adrp	x1, .LANCHOR205
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR205
-	add	x0, x0, :lo12:.LC6
+	bne	.L1657
+	mov	w2, 3332
+	adrp	x1, .LANCHOR208
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR208
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1580:
-	adrp	x20, .LANCHOR52
+.L1657:
+	adrp	x20, .LANCHOR53
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x20, #:lo12:.LANCHOR52]
+	ldrh	w0, [x20, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L1581
-	mov	w2, 3026
-	adrp	x1, .LANCHOR205
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR205
-	add	x0, x0, :lo12:.LC6
+	bne	.L1658
+	mov	w2, 3333
+	adrp	x1, .LANCHOR208
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR208
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1581:
+.L1658:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1582
-	mov	w2, 3027
-	adrp	x1, .LANCHOR205
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR205
-	add	x0, x0, :lo12:.LC6
+	cbnz	w0, .L1659
+	mov	w2, 3334
+	adrp	x1, .LANCHOR208
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR208
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1582:
+.L1659:
 	ldrb	w0, [x19, 6]
-	adrp	x21, .LANCHOR37
+	adrp	x21, .LANCHOR38
 	strb	wzr, [x19, 10]
 	adrp	x23, .LANCHOR8
 	add	x0, x0, 8
-	adrp	x24, .LANCHOR117
+	adrp	x24, .LANCHOR120
 	add	x23, x23, :lo12:.LANCHOR8
-	add	x24, x24, :lo12:.LANCHOR117
-	add	x25, x21, :lo12:.LANCHOR37
+	add	x24, x24, :lo12:.LANCHOR120
+	add	x25, x21, :lo12:.LANCHOR38
 	ldrh	w22, [x19, x0, lsl 1]
-.L1583:
+.L1660:
 	mov	w2, 65535
 	cmp	w22, w2
-	beq	.L1584
+	beq	.L1661
 	ldrb	w0, [x19, 8]
 	ldrh	w1, [x19, 4]
 	cmp	w0, 1
 	ldrh	w0, [x19, 2]
-	bne	.L1586
+	bne	.L1663
 	ldrb	w3, [x23]
-	cbnz	w3, .L1586
+	cbnz	w3, .L1663
 	ldrh	w3, [x24, w0, sxtw 1]
 	cmp	w3, w2
-	bne	.L1586
+	bne	.L1663
 	ldrh	w0, [x19]
 	sub	w1, w1, #1
 	strh	w1, [x19, 4]
 	bl	decrement_vpc_count
-.L1584:
+.L1661:
 	ldrb	w0, [x19, 6]
 	ldrh	w1, [x25]
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x19, 6]
 	cmp	w1, w0
-	bne	.L1585
+	bne	.L1662
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L1585:
+.L1662:
 	ldrb	w0, [x19, 6]
 	add	x0, x0, 8
 	ldrh	w22, [x19, x0, lsl 1]
-	b	.L1583
-.L1586:
+	b	.L1660
+.L1663:
 	adrp	x23, .LANCHOR8
-	adrp	x24, .LANCHOR117
+	adrp	x24, .LANCHOR120
 	orr	w22, w0, w22, lsl 10
 	add	x23, x23, :lo12:.LANCHOR8
-	add	x24, x24, :lo12:.LANCHOR117
+	add	x24, x24, :lo12:.LANCHOR120
 	sub	w1, w1, #1
 	strh	w1, [x19, 4]
-.L1587:
+.L1664:
 	ldrb	w0, [x19, 6]
 	mov	w1, 65535
-	ldrh	w3, [x21, #:lo12:.LANCHOR37]
-.L1589:
+	ldrh	w3, [x21, #:lo12:.LANCHOR38]
+.L1666:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	cmp	w0, w3
-	bne	.L1588
+	bne	.L1665
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
 	mov	w0, 0
-.L1588:
+.L1665:
 	add	x2, x19, x0, sxtw 1
 	ldrh	w2, [x2, 16]
 	cmp	w2, w1
-	beq	.L1589
+	beq	.L1666
 	strb	w0, [x19, 6]
 	ldrb	w0, [x19, 8]
 	cmp	w0, 1
-	bne	.L1590
+	bne	.L1667
 	ldrb	w2, [x23]
 	ldrh	w0, [x19, 2]
-	cbnz	w2, .L1591
+	cbnz	w2, .L1668
 	ldrh	w0, [x24, w0, sxtw 1]
 	cmp	w0, w1
-	bne	.L1590
+	bne	.L1667
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1590
+	cbz	w0, .L1667
 	sub	w0, w0, #1
 	strh	w0, [x19, 4]
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-	b	.L1587
-.L1591:
-	adrp	x1, .LANCHOR53
-	ldrh	w1, [x1, #:lo12:.LANCHOR53]
+	b	.L1664
+.L1668:
+	adrp	x1, .LANCHOR54
+	ldrh	w1, [x1, #:lo12:.LANCHOR54]
 	cmp	w0, w1
-	bcc	.L1590
+	bcc	.L1667
 	ldrh	w0, [x19]
-	adrp	x1, .LANCHOR83
+	adrp	x1, .LANCHOR84
 	ldrh	w3, [x19, 4]
-	ldr	x2, [x1, #:lo12:.LANCHOR83]
+	ldr	x2, [x1, #:lo12:.LANCHOR84]
 	lsl	x0, x0, 1
 	ldrh	w1, [x2, x0]
 	sub	w1, w1, w3
 	strh	w1, [x2, x0]
 	strh	wzr, [x19, 4]
-	ldrh	w0, [x20, #:lo12:.LANCHOR52]
+	ldrh	w0, [x20, #:lo12:.LANCHOR53]
 	strh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
-.L1590:
+.L1667:
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x20, #:lo12:.LANCHOR52]
+	ldrh	w0, [x20, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L1579
+	bne	.L1656
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1579
-	mov	w2, 3071
-	adrp	x1, .LANCHOR205
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR205
-	add	x0, x0, :lo12:.LC6
+	cbz	w0, .L1656
+	mov	w2, 3378
+	adrp	x1, .LANCHOR208
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR208
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1579:
+.L1656:
 	mov	w0, w22
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -10961,48 +11491,48 @@ FtlVpcTblFlush:
 	stp	x29, x30, [sp, -112]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR76
+	adrp	x23, .LANCHOR77
 	stp	x19, x20, [sp, 16]
-	ldr	w0, [x23, #:lo12:.LANCHOR76]
+	ldr	w0, [x23, #:lo12:.LANCHOR77]
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	str	x23, [x29, 104]
-	cbnz	w0, .L1604
-	adrp	x25, .LANCHOR185
-	adrp	x28, .LANCHOR199
-	adrp	x27, .LANCHOR206
-	add	x21, x28, :lo12:.LANCHOR199
-	ldr	x20, [x25, #:lo12:.LANCHOR185]
-	adrp	x24, .LANCHOR180
-	ldrh	w2, [x27, #:lo12:.LANCHOR206]
-	add	x1, x27, :lo12:.LANCHOR206
-	ldr	x0, [x24, #:lo12:.LANCHOR180]
+	cbnz	w0, .L1681
+	adrp	x25, .LANCHOR188
+	adrp	x28, .LANCHOR202
+	adrp	x27, .LANCHOR209
+	add	x21, x28, :lo12:.LANCHOR202
+	ldr	x20, [x25, #:lo12:.LANCHOR188]
+	adrp	x24, .LANCHOR183
+	ldrh	w2, [x27, #:lo12:.LANCHOR209]
+	add	x1, x27, :lo12:.LANCHOR209
+	ldr	x0, [x24, #:lo12:.LANCHOR183]
 	mov	w3, 19539
 	stp	x0, x20, [x21, 8]
 	movk	w3, 0x4654, lsl 16
 	strh	w2, [x20, 2]
 	mov	w2, -3932
 	strh	w2, [x20]
-	adrp	x22, .LANCHOR156
+	adrp	x22, .LANCHOR159
 	ldr	w2, [x1, 8]
-	adrp	x26, .LANCHOR39
+	adrp	x26, .LANCHOR40
 	ldrh	w1, [x1, 6]
 	stp	w2, wzr, [x20, 4]
-	adrp	x2, .LANCHOR80
-	add	x19, x2, :lo12:.LANCHOR80
+	adrp	x2, .LANCHOR81
+	add	x19, x2, :lo12:.LANCHOR81
 	str	wzr, [x20, 12]
-	str	w3, [x2, #:lo12:.LANCHOR80]
-	mov	w2, 72
+	str	w3, [x2, #:lo12:.LANCHOR81]
+	mov	w2, 73
 	movk	w2, 0x5000, lsl 16
 	strh	w1, [x19, 8]
-	adrp	x1, .LANCHOR44
+	adrp	x1, .LANCHOR45
 	str	w2, [x19, 4]
-	adrp	x2, .LANCHOR91
-	ldrh	w1, [x1, #:lo12:.LANCHOR44]
+	adrp	x2, .LANCHOR92
+	ldrh	w1, [x1, #:lo12:.LANCHOR45]
 	strb	w1, [x19, 10]
-	add	x1, x2, :lo12:.LANCHOR91
-	ldrh	w2, [x2, #:lo12:.LANCHOR91]
+	add	x1, x2, :lo12:.LANCHOR92
+	ldrh	w2, [x2, #:lo12:.LANCHOR92]
 	strh	w2, [x19, 14]
 	ldrb	w3, [x1, 6]
 	ldrh	w2, [x1, 2]
@@ -11010,9 +11540,9 @@ FtlVpcTblFlush:
 	strb	w1, [x19, 11]
 	orr	w2, w3, w2, lsl 6
 	strh	w2, [x19, 16]
-	adrp	x2, .LANCHOR92
-	add	x1, x2, :lo12:.LANCHOR92
-	ldrh	w2, [x2, #:lo12:.LANCHOR92]
+	adrp	x2, .LANCHOR93
+	add	x1, x2, :lo12:.LANCHOR93
+	ldrh	w2, [x2, #:lo12:.LANCHOR93]
 	ldrb	w3, [x1, 6]
 	strh	w2, [x19, 18]
 	ldrh	w2, [x1, 2]
@@ -11020,26 +11550,32 @@ FtlVpcTblFlush:
 	strb	w1, [x19, 12]
 	orr	w2, w3, w2, lsl 6
 	strh	w2, [x19, 20]
-	adrp	x2, .LANCHOR93
-	add	x1, x2, :lo12:.LANCHOR93
-	ldrh	w2, [x2, #:lo12:.LANCHOR93]
+	adrp	x2, .LANCHOR94
+	add	x1, x2, :lo12:.LANCHOR94
+	ldrh	w2, [x2, #:lo12:.LANCHOR94]
 	strh	w2, [x19, 22]
 	ldrb	w3, [x1, 6]
 	ldrh	w2, [x1, 2]
 	ldrb	w1, [x1, 8]
 	strb	w1, [x19, 13]
-	adrp	x1, .LANCHOR164
+	adrp	x1, .LANCHOR167
 	orr	w2, w3, w2, lsl 6
 	strh	w2, [x19, 24]
-	ldr	w1, [x1, #:lo12:.LANCHOR164]
+	ldr	w1, [x1, #:lo12:.LANCHOR167]
 	str	w1, [x19, 32]
-	ldr	w1, [x22, #:lo12:.LANCHOR156]
+	ldr	w1, [x22, #:lo12:.LANCHOR159]
 	str	w1, [x19, 40]
-	adrp	x1, .LANCHOR157
-	ldr	w1, [x1, #:lo12:.LANCHOR157]
+	adrp	x1, .LANCHOR160
+	ldr	w1, [x1, #:lo12:.LANCHOR160]
 	str	w1, [x19, 36]
-	adrp	x1, .LANCHOR57
-	ldrh	w2, [x1, #:lo12:.LANCHOR57]
+	adrp	x1, .LANCHOR113
+	ldrh	w1, [x1, #:lo12:.LANCHOR113]
+	strh	w1, [x19, 44]
+	adrp	x1, .LANCHOR114
+	ldrh	w1, [x1, #:lo12:.LANCHOR114]
+	strh	w1, [x19, 46]
+	adrp	x1, .LANCHOR58
+	ldrh	w2, [x1, #:lo12:.LANCHOR58]
 	mov	w1, 255
 	bl	ftl_memset
 	ldr	x0, [x21, 8]
@@ -11047,14 +11583,14 @@ FtlVpcTblFlush:
 	mov	w2, 48
 	mov	x19, x28
 	bl	ftl_memcpy
-	adrp	x1, .LANCHOR83
-	ldrh	w2, [x26, #:lo12:.LANCHOR39]
+	adrp	x1, .LANCHOR84
+	ldrh	w2, [x26, #:lo12:.LANCHOR40]
 	ldr	x0, [x21, 8]
-	ldr	x1, [x1, #:lo12:.LANCHOR83]
+	ldr	x1, [x1, #:lo12:.LANCHOR84]
 	lsl	w2, w2, 1
 	add	x0, x0, 48
 	bl	ftl_memcpy
-	ldrh	w0, [x26, #:lo12:.LANCHOR39]
+	ldrh	w0, [x26, #:lo12:.LANCHOR40]
 	adrp	x1, .LANCHOR0
 	ldr	x3, [x21, 8]
 	ldr	x1, [x1, #:lo12:.LANCHOR0]
@@ -11065,38 +11601,38 @@ FtlVpcTblFlush:
 	and	x0, x0, -4
 	add	x0, x3, x0
 	bl	ftl_memcpy
-	adrp	x0, .LANCHOR69
-	ldrh	w0, [x0, #:lo12:.LANCHOR69]
-	cbz	w0, .L1605
-	ldrh	w0, [x26, #:lo12:.LANCHOR39]
-	adrp	x1, .LANCHOR66
+	adrp	x0, .LANCHOR70
+	ldrh	w0, [x0, #:lo12:.LANCHOR70]
+	cbz	w0, .L1682
+	ldrh	w0, [x26, #:lo12:.LANCHOR40]
+	adrp	x1, .LANCHOR67
 	ldr	x3, [x21, 8]
-	ldrh	w2, [x1, #:lo12:.LANCHOR66]
+	ldrh	w2, [x1, #:lo12:.LANCHOR67]
 	lsr	w1, w0, 3
 	add	w0, w1, w0, lsl 1
-	adrp	x1, .LANCHOR128
+	adrp	x1, .LANCHOR131
 	add	w0, w0, 52
 	lsl	w2, w2, 2
-	ldr	x1, [x1, #:lo12:.LANCHOR128]
+	ldr	x1, [x1, #:lo12:.LANCHOR131]
 	and	x0, x0, 65532
 	add	x0, x3, x0
 	bl	ftl_memcpy
-.L1605:
+.L1682:
 	mov	w0, 0
-	add	x28, x19, :lo12:.LANCHOR199
+	add	x28, x19, :lo12:.LANCHOR202
 	bl	FtlUpdateVaildLpn
-	add	x23, x27, :lo12:.LANCHOR206
+	add	x23, x27, :lo12:.LANCHOR209
 	mov	w21, 0
-	adrp	x27, .LANCHOR53
+	adrp	x27, .LANCHOR54
 	mov	w26, 65535
-	add	x0, x27, :lo12:.LANCHOR53
+	add	x0, x27, :lo12:.LANCHOR54
 	str	x0, [x29, 96]
-.L1606:
-	ldr	x0, [x24, #:lo12:.LANCHOR180]
+.L1683:
+	ldr	x0, [x24, #:lo12:.LANCHOR183]
 	mov	w3, 1
 	str	x0, [x28, 8]
 	mov	w2, w3
-	ldr	x0, [x25, #:lo12:.LANCHOR185]
+	ldr	x0, [x25, #:lo12:.LANCHOR188]
 	ldrh	w1, [x23, 2]
 	str	x0, [x28, 16]
 	ldrh	w0, [x23]
@@ -11105,22 +11641,22 @@ FtlVpcTblFlush:
 	str	w0, [x28, 4]
 	mov	x0, x28
 	bl	FlashProgPages
-	ldrh	w0, [x27, #:lo12:.LANCHOR53]
+	ldrh	w0, [x27, #:lo12:.LANCHOR54]
 	ldrh	w1, [x23, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L1607
+	blt	.L1684
 	ldrh	w0, [x23]
 	ldrh	w26, [x23, 4]
 	strh	wzr, [x23, 2]
 	strh	w0, [x23, 4]
 	bl	FtlFreeSysBlkQueueOut
 	strh	w0, [x23]
-	ldr	w1, [x22, #:lo12:.LANCHOR156]
+	ldr	w1, [x22, #:lo12:.LANCHOR159]
 	mov	w3, 1
 	str	w1, [x23, 8]
 	add	w2, w1, 1
-	str	w2, [x22, #:lo12:.LANCHOR156]
+	str	w2, [x22, #:lo12:.LANCHOR159]
 	ubfiz	w2, w0, 10, 16
 	str	w2, [x28, 4]
 	strh	w0, [x20, 2]
@@ -11129,50 +11665,50 @@ FtlVpcTblFlush:
 	mov	x0, x28
 	mov	w1, w3
 	bl	FlashProgPages
-.L1607:
+.L1684:
 	ldrh	w0, [x23, 2]
 	ldr	w1, [x28]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	strh	w0, [x23, 2]
 	cmn	w1, #1
-	bne	.L1608
+	bne	.L1685
 	cmp	w0, 1
-	bne	.L1609
-	mov	w2, 1213
-	adrp	x1, .LANCHOR207
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR207
-	add	x0, x0, :lo12:.LC6
+	bne	.L1686
+	mov	w2, 1219
+	adrp	x1, .LANCHOR210
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR210
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1609:
+.L1686:
 	ldrh	w0, [x23, 2]
 	cmp	w0, 1
-	bne	.L1610
+	bne	.L1687
 	ldr	x0, [x29, 96]
 	ldrh	w0, [x0]
 	sub	w0, w0, #1
 	strh	w0, [x23, 2]
-.L1610:
+.L1687:
 	add	w21, w21, 1
 	and	w21, w21, 65535
 	cmp	w21, 3
-	bls	.L1606
-	add	x19, x19, :lo12:.LANCHOR199
+	bls	.L1683
+	add	x19, x19, :lo12:.LANCHOR202
 	mov	w2, w21
-	adrp	x0, .LC35
-	add	x0, x0, :lo12:.LC35
+	adrp	x0, .LC38
+	add	x0, x0, :lo12:.LC38
 	ldr	w1, [x19, 4]
 	bl	printf
 	ldr	x1, [x29, 104]
 	mov	w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR76]
-.L1604:
+	str	w0, [x1, #:lo12:.LANCHOR77]
+.L1681:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -11181,18 +11717,18 @@ FtlVpcTblFlush:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1608:
+.L1685:
 	cmp	w0, 1
-	beq	.L1606
+	beq	.L1683
 	cmp	w1, 256
-	beq	.L1606
+	beq	.L1683
 	mov	w0, 65535
 	cmp	w26, w0
-	beq	.L1604
+	beq	.L1681
 	mov	w1, 1
 	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-	b	.L1604
+	b	.L1681
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
 	.section	.text.FtlSuperblockPowerLostFix,"ax",@progbits
 	.align	2
@@ -11200,82 +11736,94 @@ FtlVpcTblFlush:
 	.type	FtlSuperblockPowerLostFix, %function
 FtlSuperblockPowerLostFix:
 	stp	x29, x30, [sp, -128]!
+	adrp	x1, .LANCHOR77
 	add	x29, sp, 0
+	str	x23, [sp, 48]
+	ldr	w23, [x1, #:lo12:.LANCHOR77]
 	stp	x19, x20, [sp, 16]
-	mov	x19, x0
-	adrp	x0, .LANCHOR8
 	stp	x21, x22, [sp, 32]
-	stp	x23, x24, [sp, 48]
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L1632
-	ldrb	w20, [x19, 8]
-	cmp	w20, 1
-	bne	.L1632
-	ldrh	w21, [x19, 4]
-.L1624:
-	adrp	x22, .LANCHOR157
-	add	x22, x22, :lo12:.LANCHOR157
-	mov	w24, -1
-	adrp	x23, .LANCHOR180
-.L1625:
+	cbnz	w23, .L1700
+	adrp	x1, .LANCHOR8
+	ldrb	w1, [x1, #:lo12:.LANCHOR8]
+	cbz	w1, .L1711
+	ldrb	w1, [x0, 8]
+	cmp	w1, 1
+	bne	.L1711
+	ldrh	w21, [x0, 4]
+	mov	w23, w1
+.L1702:
+	adrp	x1, .LANCHOR188
+	mov	x19, x0
+	mov	w0, -1
+	str	w0, [x29, 96]
+	ldr	x20, [x1, #:lo12:.LANCHOR188]
+	adrp	x0, .LANCHOR183
+	str	x20, [x29, 88]
+	mov	w1, -3
+	ldr	x0, [x0, #:lo12:.LANCHOR183]
+	adrp	x22, .LANCHOR160
+	str	x0, [x29, 80]
+	add	x22, x22, :lo12:.LANCHOR160
+	str	w1, [x20, 8]
+	mov	w1, -2
+	str	w1, [x20, 12]
+	ldrh	w1, [x19]
+	strh	w1, [x20, 2]
+	strh	wzr, [x20]
+	mov	w1, 61589
+	str	w1, [x0]
+	mov	w1, 22136
+	movk	w1, 0x1234, lsl 16
+	str	w1, [x0, 4]
+.L1703:
 	sub	w21, w21, #1
 	cmn	w21, #1
-	beq	.L1627
+	beq	.L1706
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1626
-.L1627:
+	cbnz	w0, .L1704
+.L1706:
 	ldrh	w0, [x19]
-	adrp	x1, .LANCHOR83
+	adrp	x1, .LANCHOR84
 	ldrh	w3, [x19, 4]
-	ldr	x2, [x1, #:lo12:.LANCHOR83]
+	ldr	x2, [x1, #:lo12:.LANCHOR84]
 	lsl	x0, x0, 1
 	ldrh	w1, [x2, x0]
 	sub	w1, w1, w3
 	strh	w1, [x2, x0]
-	adrp	x0, .LANCHOR52
+	adrp	x0, .LANCHOR53
 	strb	wzr, [x19, 6]
 	strh	wzr, [x19, 4]
-	ldrh	w0, [x0, #:lo12:.LANCHOR52]
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	strh	w0, [x19, 2]
-	ldp	x21, x22, [sp, 32]
+.L1700:
 	ldp	x19, x20, [sp, 16]
-	ldp	x23, x24, [sp, 48]
+	ldp	x21, x22, [sp, 32]
+	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1632:
-	mov	w20, 0
+.L1711:
 	mov	w21, 12
-	b	.L1624
-.L1626:
+	b	.L1702
+.L1704:
 	mov	x0, x19
 	bl	get_new_active_ppa
 	str	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L1627
-	ldr	x0, [x23, #:lo12:.LANCHOR180]
-	mov	w3, 0
-	str	x0, [x29, 80]
-	mov	w2, w20
-	adrp	x0, .LANCHOR185
-	str	w24, [x29, 96]
-	ldr	x1, [x0, #:lo12:.LANCHOR185]
-	str	x1, [x29, 88]
-	ldrh	w0, [x19]
-	strh	w0, [x1, 2]
+	beq	.L1706
 	ldr	w0, [x22]
-	stp	w0, w24, [x1, 4]
+	mov	w3, 0
+	str	w0, [x20, 4]
+	mov	w2, w23
 	add	w0, w0, 1
-	strh	wzr, [x1]
+	mov	w1, 1
 	cmn	w0, #1
-	str	w24, [x1, 12]
 	csel	w0, w0, wzr, ne
-	mov	w1, 1
 	str	w0, [x22]
 	add	x0, x29, 72
 	bl	FlashProgPages
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-	b	.L1625
+	b	.L1703
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
 	.section	.text.FtlLoadFactoryBbt,"ax",@progbits
 	.align	2
@@ -11283,34 +11831,34 @@ FtlSuperblockPowerLostFix:
 	.type	FtlLoadFactoryBbt, %function
 FtlLoadFactoryBbt:
 	stp	x29, x30, [sp, -112]!
-	adrp	x2, .LANCHOR180
-	adrp	x0, .LANCHOR199
-	add	x1, x0, :lo12:.LANCHOR199
+	adrp	x2, .LANCHOR183
+	adrp	x0, .LANCHOR202
+	add	x1, x0, :lo12:.LANCHOR202
 	add	x29, sp, 0
-	ldr	x2, [x2, #:lo12:.LANCHOR180]
+	ldr	x2, [x2, #:lo12:.LANCHOR183]
 	stp	x21, x22, [sp, 32]
 	mov	x22, x0
 	stp	x25, x26, [sp, 64]
-	adrp	x26, .LANCHOR50
+	adrp	x26, .LANCHOR51
 	stp	x27, x28, [sp, 80]
-	add	x28, x26, :lo12:.LANCHOR50
+	add	x28, x26, :lo12:.LANCHOR51
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR74
+	adrp	x20, .LANCHOR75
 	stp	x23, x24, [sp, 48]
-	add	x20, x20, :lo12:.LANCHOR74
+	add	x20, x20, :lo12:.LANCHOR75
 	str	x2, [x1, 8]
-	adrp	x2, .LANCHOR185
-	adrp	x23, .LANCHOR44
+	adrp	x2, .LANCHOR188
+	adrp	x23, .LANCHOR45
 	add	x20, x20, 12
-	ldr	x25, [x2, #:lo12:.LANCHOR185]
-	add	x23, x23, :lo12:.LANCHOR44
+	ldr	x25, [x2, #:lo12:.LANCHOR188]
+	add	x23, x23, :lo12:.LANCHOR45
 	mov	w21, 0
 	mov	w27, -1
 	str	x25, [x1, 16]
-.L1639:
+.L1717:
 	ldrh	w0, [x23]
 	cmp	w21, w0
-	bcc	.L1644
+	bcc	.L1722
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -11319,18 +11867,18 @@ FtlLoadFactoryBbt:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1644:
-	ldrh	w19, [x26, #:lo12:.LANCHOR50]
-	add	x24, x22, :lo12:.LANCHOR199
+.L1722:
+	ldrh	w19, [x26, #:lo12:.LANCHOR51]
+	add	x24, x22, :lo12:.LANCHOR202
 	strh	w27, [x20]
 	mov	w3, 61664
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L1640:
+.L1718:
 	ldrh	w0, [x28]
 	sub	w1, w0, #15
 	cmp	w1, w19
-	bgt	.L1642
+	bgt	.L1720
 	madd	w0, w0, w21, w19
 	mov	w2, 1
 	str	w3, [x29, 108]
@@ -11342,19 +11890,19 @@ FtlLoadFactoryBbt:
 	ldr	w0, [x24]
 	ldr	w3, [x29, 108]
 	cmn	w0, #1
-	beq	.L1641
+	beq	.L1719
 	ldrh	w0, [x25]
 	cmp	w0, w3
-	bne	.L1641
+	bne	.L1719
 	strh	w19, [x20]
-.L1642:
+.L1720:
 	add	w21, w21, 1
 	add	x20, x20, 2
-	b	.L1639
-.L1641:
+	b	.L1717
+.L1719:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L1640
+	b	.L1718
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
 	.section	.text.FtlGetLastWrittenPage,"ax",@progbits
 	.align	2
@@ -11368,10 +11916,10 @@ FtlGetLastWrittenPage:
 	mov	w23, w1
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	bne	.L1650
-	adrp	x1, .LANCHOR53
-	ldrh	w19, [x1, #:lo12:.LANCHOR53]
-.L1651:
+	bne	.L1728
+	adrp	x1, .LANCHOR54
+	ldrh	w19, [x1, #:lo12:.LANCHOR54]
+.L1729:
 	sub	w19, w19, #1
 	lsl	w21, w0, 10
 	sxth	w19, w19
@@ -11385,24 +11933,24 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 128]
 	cmn	w0, #1
-	bne	.L1652
+	bne	.L1730
 	mov	w22, 0
 	mov	w24, 2
-.L1653:
+.L1731:
 	cmp	w22, w19
-	ble	.L1656
-.L1652:
+	ble	.L1734
+.L1730:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 192
 	ret
-.L1650:
-	adrp	x1, .LANCHOR52
-	ldrh	w19, [x1, #:lo12:.LANCHOR52]
-	b	.L1651
-.L1656:
+.L1728:
+	adrp	x1, .LANCHOR53
+	ldrh	w19, [x1, #:lo12:.LANCHOR53]
+	b	.L1729
+.L1734:
 	add	w20, w22, w19
 	mov	w2, w23
 	mov	w1, 1
@@ -11414,20 +11962,20 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 128]
 	cmn	w0, #1
-	bne	.L1654
+	bne	.L1732
 	ldr	w0, [x29, 132]
 	cmn	w0, #1
-	bne	.L1654
+	bne	.L1732
 	ldr	w0, [x29, 72]
 	cmn	w0, #1
-	beq	.L1654
+	beq	.L1732
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L1653
-.L1654:
+	b	.L1731
+.L1732:
 	add	w20, w20, 1
 	sxth	w22, w20
-	b	.L1653
+	b	.L1731
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
 	.section	.text.FtlLoadBbt,"ax",@progbits
 	.align	2
@@ -11437,29 +11985,29 @@ FtlLoadBbt:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR180
+	adrp	x23, .LANCHOR183
 	stp	x19, x20, [sp, 16]
-	adrp	x24, .LANCHOR50
+	adrp	x24, .LANCHOR51
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR199
-	add	x20, x22, :lo12:.LANCHOR199
-	ldr	x0, [x23, #:lo12:.LANCHOR180]
+	adrp	x22, .LANCHOR202
+	add	x20, x22, :lo12:.LANCHOR202
+	ldr	x0, [x23, #:lo12:.LANCHOR183]
 	str	x25, [sp, 64]
 	mov	w25, 61649
 	str	x0, [x20, 8]
-	adrp	x0, .LANCHOR185
-	ldr	x21, [x0, #:lo12:.LANCHOR185]
+	adrp	x0, .LANCHOR188
+	ldr	x21, [x0, #:lo12:.LANCHOR188]
 	str	x21, [x20, 16]
 	bl	FtlBbtMemInit
-	ldrh	w19, [x24, #:lo12:.LANCHOR50]
-	add	x24, x24, :lo12:.LANCHOR50
+	ldrh	w19, [x24, #:lo12:.LANCHOR51]
+	add	x24, x24, :lo12:.LANCHOR51
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L1662:
+.L1740:
 	ldrh	w0, [x24]
 	sub	w0, w0, #47
 	cmp	w0, w19
-	bgt	.L1665
+	bgt	.L1743
 	lsl	w0, w19, 10
 	mov	w2, 1
 	str	w0, [x20, 4]
@@ -11468,7 +12016,7 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L1663
+	bne	.L1741
 	ldr	w0, [x20, 4]
 	mov	w2, 1
 	mov	w1, w2
@@ -11476,141 +12024,141 @@ FtlLoadBbt:
 	str	w0, [x20, 4]
 	mov	x0, x20
 	bl	FlashReadPages
-.L1663:
+.L1741:
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L1664
+	beq	.L1742
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	bne	.L1664
-	adrp	x1, .LANCHOR74
-	add	x0, x1, :lo12:.LANCHOR74
-	strh	w19, [x1, #:lo12:.LANCHOR74]
+	bne	.L1742
+	adrp	x1, .LANCHOR75
+	add	x0, x1, :lo12:.LANCHOR75
+	strh	w19, [x1, #:lo12:.LANCHOR75]
 	ldr	w1, [x21, 4]
 	str	w1, [x0, 8]
 	ldrh	w1, [x21, 8]
 	strh	w1, [x0, 4]
-.L1665:
-	adrp	x19, .LANCHOR74
+.L1743:
+	adrp	x19, .LANCHOR75
 	mov	w0, 65535
-	add	x20, x19, :lo12:.LANCHOR74
-	ldrh	w1, [x19, #:lo12:.LANCHOR74]
+	add	x20, x19, :lo12:.LANCHOR75
+	ldrh	w1, [x19, #:lo12:.LANCHOR75]
 	cmp	w1, w0
-	beq	.L1679
+	beq	.L1757
 	ldrh	w1, [x20, 4]
 	cmp	w1, w0
-	beq	.L1669
-	add	x0, x22, :lo12:.LANCHOR199
+	beq	.L1747
+	add	x0, x22, :lo12:.LANCHOR202
 	lsl	w1, w1, 10
 	mov	w2, 1
 	str	w1, [x0, 4]
 	mov	w1, w2
 	bl	FlashReadPages
-	ldr	w0, [x22, #:lo12:.LANCHOR199]
+	ldr	w0, [x22, #:lo12:.LANCHOR202]
 	cmn	w0, #1
-	beq	.L1669
+	beq	.L1747
 	ldrh	w1, [x21]
 	mov	w0, 61649
 	cmp	w1, w0
-	bne	.L1669
+	bne	.L1747
 	ldr	w1, [x20, 8]
 	ldr	w0, [x21, 4]
 	cmp	w0, w1
-	bls	.L1669
+	bls	.L1747
 	ldrh	w1, [x20, 4]
 	str	w0, [x20, 8]
 	ldrh	w0, [x21, 8]
-	strh	w1, [x19, #:lo12:.LANCHOR74]
+	strh	w1, [x19, #:lo12:.LANCHOR75]
 	strh	w0, [x20, 4]
-.L1669:
-	ldrh	w0, [x19, #:lo12:.LANCHOR74]
-	add	x24, x19, :lo12:.LANCHOR74
+.L1747:
+	ldrh	w0, [x19, #:lo12:.LANCHOR75]
+	add	x24, x19, :lo12:.LANCHOR75
 	mov	w1, 1
 	mov	w25, 61649
 	bl	FtlGetLastWrittenPage
 	sxth	w20, w0
 	add	w0, w0, 1
 	strh	w0, [x24, 2]
-	add	x24, x22, :lo12:.LANCHOR199
-.L1671:
-	tbz	w20, #31, .L1674
+	add	x24, x22, :lo12:.LANCHOR202
+.L1749:
+	tbz	w20, #31, .L1752
 	mov	w2, 336
-	adrp	x1, .LANCHOR208
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR208
-	add	x0, x0, :lo12:.LC6
+	adrp	x1, .LANCHOR211
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR211
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1673:
-	add	x0, x19, :lo12:.LANCHOR74
+.L1751:
+	add	x0, x19, :lo12:.LANCHOR75
 	ldrh	w1, [x21, 10]
 	strh	w1, [x0, 6]
 	mov	w1, 65535
 	ldrh	w0, [x21, 12]
 	cmp	w0, w1
-	beq	.L1676
-	adrp	x1, .LANCHOR36
-	ldr	w2, [x1, #:lo12:.LANCHOR36]
+	beq	.L1754
+	adrp	x1, .LANCHOR37
+	ldr	w2, [x1, #:lo12:.LANCHOR37]
 	cmp	w0, w2
-	beq	.L1676
-	adrp	x1, .LANCHOR40
-	ldrh	w1, [x1, #:lo12:.LANCHOR40]
+	beq	.L1754
+	adrp	x1, .LANCHOR41
+	ldrh	w1, [x1, #:lo12:.LANCHOR41]
 	lsr	w1, w1, 2
 	cmp	w2, w1
-	bcs	.L1676
+	bcs	.L1754
 	cmp	w0, w1
-	bcs	.L1676
+	bcs	.L1754
 	bl	FtlSysBlkNumInit
-.L1676:
-	add	x19, x19, :lo12:.LANCHOR74
-	adrp	x21, .LANCHOR44
-	adrp	x23, .LANCHOR120
+.L1754:
+	add	x19, x19, :lo12:.LANCHOR75
+	adrp	x21, .LANCHOR45
+	adrp	x23, .LANCHOR123
 	add	x19, x19, 32
-	add	x21, x21, :lo12:.LANCHOR44
-	add	x23, x23, :lo12:.LANCHOR120
-	add	x22, x22, :lo12:.LANCHOR199
+	add	x21, x21, :lo12:.LANCHOR45
+	add	x23, x23, :lo12:.LANCHOR123
+	add	x22, x22, :lo12:.LANCHOR202
 	mov	w20, 0
-.L1677:
+.L1755:
 	ldrh	w0, [x21]
 	cmp	w20, w0
-	bcc	.L1678
+	bcc	.L1756
 	mov	w0, 0
-.L1661:
+.L1739:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1664:
+.L1742:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L1662
-.L1674:
-	ldrh	w0, [x19, #:lo12:.LANCHOR74]
+	b	.L1740
+.L1752:
+	ldrh	w0, [x19, #:lo12:.LANCHOR75]
 	mov	w2, 1
 	mov	w1, w2
 	orr	w0, w20, w0, lsl 10
 	str	w0, [x24, 4]
-	ldr	x0, [x23, #:lo12:.LANCHOR180]
+	ldr	x0, [x23, #:lo12:.LANCHOR183]
 	str	x0, [x24, 8]
 	mov	x0, x24
 	bl	FlashReadPages
 	ldr	w0, [x24]
 	cmn	w0, #1
-	beq	.L1672
+	beq	.L1750
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	beq	.L1673
-.L1672:
+	beq	.L1751
+.L1750:
 	sub	w20, w20, #1
 	sxth	w20, w20
-	b	.L1671
-.L1678:
+	b	.L1749
+.L1756:
 	ldrh	w2, [x23]
 	ldr	x0, [x22, 8]
 	mul	w1, w2, w20
@@ -11619,56 +12167,56 @@ FtlLoadBbt:
 	add	x1, x0, x1, lsl 2
 	ldr	x0, [x19], 8
 	bl	ftl_memcpy
-	b	.L1677
-.L1679:
+	b	.L1755
+.L1757:
 	mov	w0, -1
-	b	.L1661
+	b	.L1739
 	.size	FtlLoadBbt, .-FtlLoadBbt
 	.section	.text.ftl_map_blk_gc,"ax",@progbits
 	.align	2
 	.global	ftl_map_blk_gc
 	.type	ftl_map_blk_gc, %function
 ftl_map_blk_gc:
-	stp	x29, x30, [sp, -96]!
+	stp	x29, x30, [sp, -112]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR53
+	adrp	x21, .LANCHOR54
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	ldr	x20, [x0, 16]
-	ldr	x22, [x0, 40]
+	ldr	x23, [x0, 40]
 	bl	ftl_free_no_use_map_blk
 	ldrh	w4, [x19, 10]
 	ldrh	w2, [x19, 8]
 	sub	w1, w4, #4
 	cmp	w2, w1
 	ldrh	w1, [x19, 60]
-	bge	.L1692
+	bge	.L1770
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L1694
+	beq	.L1772
 	ldrh	w3, [x19, 2]
-	ldrh	w2, [x21, #:lo12:.LANCHOR53]
+	ldrh	w2, [x21, #:lo12:.LANCHOR54]
 	cmp	w3, w2
-	bcc	.L1695
-.L1692:
+	bcc	.L1773
+.L1770:
 	mov	w2, 65535
 	and	w0, w0, 65535
 	cmp	w1, w2
-	beq	.L1696
+	beq	.L1774
 	ldrh	w3, [x19, 2]
-	ldrh	w2, [x21, #:lo12:.LANCHOR53]
+	ldrh	w2, [x21, #:lo12:.LANCHOR54]
 	cmp	w2, w3
-	bls	.L1697
-.L1696:
+	bls	.L1775
+.L1774:
 	ubfiz	x0, x0, 1, 32
-	ldrh	w23, [x20, x0]
-	cbz	w23, .L1694
+	ldrh	w22, [x20, x0]
+	cbz	w22, .L1772
 	ldr	w1, [x19, 52]
-	cbnz	w1, .L1694
+	cbnz	w1, .L1772
 	mov	w1, 1
 	str	w1, [x19, 52]
 	strh	wzr, [x20, x0]
@@ -11676,126 +12224,138 @@ ftl_map_blk_gc:
 	ldrh	w1, [x19, 2]
 	sub	w0, w0, #1
 	strh	w0, [x19, 8]
-	ldrh	w0, [x21, #:lo12:.LANCHOR53]
+	ldrh	w0, [x21, #:lo12:.LANCHOR54]
 	cmp	w1, w0
-	bcc	.L1702
+	bcc	.L1780
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L1702:
-	adrp	x26, .LANCHOR199
-	adrp	x25, .LC37
-	add	x24, x26, :lo12:.LANCHOR199
-	add	x25, x25, :lo12:.LC37
+.L1780:
+	adrp	x24, .LANCHOR202
+	adrp	x26, .LANCHOR212
+	mov	x25, x24
+	add	x27, x24, :lo12:.LANCHOR202
+	add	x26, x26, :lo12:.LANCHOR212
 	mov	w20, 0
-.L1703:
+.L1781:
 	ldrh	w0, [x19, 6]
 	cmp	w0, w20
-	bhi	.L1707
+	bhi	.L1786
 	mov	w1, 1
-	mov	w0, w23
+	mov	w0, w22
 	bl	FtlFreeSysBlkQueueIn
 	str	wzr, [x19, 52]
-.L1694:
+.L1772:
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x21, #:lo12:.LANCHOR53]
+	ldrh	w0, [x21, #:lo12:.LANCHOR54]
 	cmp	w1, w0
-	bcc	.L1695
+	bcc	.L1773
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L1695:
-	mov	w0, 0
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 96
-	ret
-.L1700:
+	b	.L1773
+.L1778:
 	ldrh	w6, [x20, x2, lsl 1]
 	add	x5, x2, 1
 	cmp	w6, w1
-	beq	.L1698
+	beq	.L1776
 	mov	x2, x5
-.L1699:
-	and	w23, w2, 65535
-	cmp	w23, w4
-	bcc	.L1700
-	mov	w23, w0
-.L1698:
+.L1777:
+	and	w22, w2, 65535
+	cmp	w22, w4
+	bcc	.L1778
+	mov	w22, w0
+.L1776:
 	and	x2, x2, 65535
-	adrp	x0, .LC36
-	add	x0, x0, :lo12:.LC36
+	adrp	x0, .LC39
+	add	x0, x0, :lo12:.LC39
 	ldrh	w2, [x20, x2, lsl 1]
 	bl	printf
 	mov	w0, -1
 	strh	w0, [x19, 60]
-	mov	w0, w23
-	b	.L1696
-.L1697:
+	mov	w0, w22
+	b	.L1774
+.L1775:
 	mov	x2, 0
-	b	.L1699
-.L1707:
-	ubfiz	x27, x20, 2, 16
-	ldr	w1, [x22, x27]
-	cmp	w23, w1, lsr 10
-	bne	.L1704
-	adrp	x2, .LANCHOR181
-	add	x0, x26, :lo12:.LANCHOR199
-	ldr	x2, [x2, #:lo12:.LANCHOR181]
+	b	.L1777
+.L1786:
+	ubfiz	x0, x20, 2, 16
+	add	x1, x23, x0
+	str	x1, [x29, 104]
+	ldr	w1, [x23, x0]
+	cmp	w22, w1, lsr 10
+	bne	.L1782
+	adrp	x2, .LANCHOR184
+	add	x0, x24, :lo12:.LANCHOR202
+	ldr	x2, [x2, #:lo12:.LANCHOR184]
 	str	x2, [x0, 8]
-	adrp	x2, .LANCHOR185
+	adrp	x2, .LANCHOR188
 	str	w1, [x0, 4]
-	ldr	x28, [x2, #:lo12:.LANCHOR185]
+	ldr	x28, [x2, #:lo12:.LANCHOR188]
 	mov	w2, 1
 	str	x28, [x0, 16]
 	mov	w1, w2
 	bl	FlashReadPages
 	ldrh	w0, [x28, 8]
 	cmp	w0, w20
-	beq	.L1705
-	mov	w2, 671
-	adrp	x1, .LANCHOR209
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR209
-	add	x0, x0, :lo12:.LC6
+	beq	.L1783
+	mov	w2, 672
+	mov	x1, x26
+	adrp	x0, .LC5
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1705:
-	ldr	w0, [x24]
-	cmn	w0, #1
-	bne	.L1706
-	str	wzr, [x22, x27]
-	mov	x0, x25
+.L1783:
+	ldr	w0, [x27]
 	ldrh	w2, [x28, 8]
-	ldr	w1, [x24, 4]
+	cmn	w0, #1
+	bne	.L1784
+.L1785:
+	ldr	x0, [x29, 104]
+	add	x25, x25, :lo12:.LANCHOR202
+	str	wzr, [x0]
+	adrp	x0, .LC40
+	add	x0, x0, :lo12:.LC40
+	ldr	w1, [x25, 4]
 	bl	printf
-	adrp	x0, .LANCHOR76
+	adrp	x0, .LANCHOR77
 	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR76]
-.L1704:
-	add	w20, w20, 1
-	and	w20, w20, 65535
-	b	.L1703
-.L1706:
-	ldr	x2, [x24, 8]
+	str	w1, [x0, #:lo12:.LANCHOR77]
+.L1773:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L1784:
+	cmp	w2, w20
+	bne	.L1785
+	ldrh	w1, [x28]
+	ldrh	w0, [x19, 4]
+	cmp	w1, w0
+	bne	.L1785
+	ldr	x2, [x27, 8]
 	mov	w1, w20
 	mov	x0, x19
 	bl	FtlMapWritePage
-	b	.L1704
+.L1782:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L1781
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
 	.section	.text.Ftl_write_map_blk_to_last_page,"ax",@progbits
 	.align	2
 	.global	Ftl_write_map_blk_to_last_page
 	.type	Ftl_write_map_blk_to_last_page, %function
 Ftl_write_map_blk_to_last_page:
-	adrp	x1, .LANCHOR76
-	ldr	w1, [x1, #:lo12:.LANCHOR76]
-	cbnz	w1, .L1723
+	adrp	x1, .LANCHOR77
+	ldr	w1, [x1, #:lo12:.LANCHOR77]
+	cbnz	w1, .L1802
 	stp	x29, x30, [sp, -64]!
 	mov	w1, 65535
 	add	x29, sp, 0
@@ -11806,21 +12366,21 @@ Ftl_write_map_blk_to_last_page:
 	ldr	x20, [x19, 16]
 	str	x23, [sp, 48]
 	cmp	w0, w1
-	bne	.L1714
+	bne	.L1793
 	ldrh	w0, [x19, 8]
-	cbz	w0, .L1715
-	mov	w2, 703
-	adrp	x1, .LANCHOR210
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR210
-	add	x0, x0, :lo12:.LC6
+	cbz	w0, .L1794
+	mov	w2, 708
+	adrp	x1, .LANCHOR213
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR213
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1715:
+.L1794:
 	ldrh	w0, [x19, 8]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
@@ -11831,26 +12391,26 @@ Ftl_write_map_blk_to_last_page:
 	add	w0, w0, 1
 	strh	wzr, [x19]
 	str	w0, [x19, 48]
-.L1713:
+.L1792:
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1714:
+.L1793:
 	ubfiz	x0, x0, 1, 16
-	adrp	x1, .LANCHOR185
-	adrp	x23, .LANCHOR180
+	adrp	x1, .LANCHOR188
+	adrp	x23, .LANCHOR183
 	ldr	x22, [x19, 40]
-	ldr	x1, [x1, #:lo12:.LANCHOR185]
+	ldr	x1, [x1, #:lo12:.LANCHOR188]
 	ldrh	w21, [x20, x0]
-	adrp	x20, .LANCHOR199
+	adrp	x20, .LANCHOR202
 	ldrh	w0, [x19, 2]
-	add	x2, x20, :lo12:.LANCHOR199
+	add	x2, x20, :lo12:.LANCHOR202
 	orr	w0, w0, w21, lsl 10
 	str	w0, [x2, 4]
-	ldr	x0, [x23, #:lo12:.LANCHOR180]
+	ldr	x0, [x23, #:lo12:.LANCHOR183]
 	str	x1, [x2, 16]
 	str	x0, [x2, 8]
 	ldr	w2, [x19, 48]
@@ -11860,33 +12420,33 @@ Ftl_write_map_blk_to_last_page:
 	ldrh	w2, [x19, 4]
 	strh	w2, [x1]
 	strh	w21, [x1, 2]
-	adrp	x1, .LANCHOR53
-	ldrh	w2, [x1, #:lo12:.LANCHOR53]
+	adrp	x1, .LANCHOR54
+	ldrh	w2, [x1, #:lo12:.LANCHOR54]
 	mov	w1, 255
 	lsl	w2, w2, 3
 	bl	ftl_memset
 	ldrh	w4, [x19, 6]
 	mov	x1, 0
-	ldr	x3, [x23, #:lo12:.LANCHOR180]
+	ldr	x3, [x23, #:lo12:.LANCHOR183]
 	mov	w2, 0
-.L1716:
+.L1795:
 	cmp	w4, w1, uxth
-	bhi	.L1718
+	bhi	.L1797
 	mov	w2, 1
 	mov	w3, 0
 	mov	w1, w2
-	add	x0, x20, :lo12:.LANCHOR199
+	add	x0, x20, :lo12:.LANCHOR202
 	bl	FlashProgPages
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-	b	.L1713
-.L1718:
+	b	.L1792
+.L1797:
 	ldr	w0, [x22, x1, lsl 2]
 	cmp	w21, w0, lsr 10
-	bne	.L1717
+	bne	.L1796
 	add	w2, w2, 1
 	and	w2, w2, 65535
 	ubfiz	x0, x2, 1, 16
@@ -11894,10 +12454,10 @@ Ftl_write_map_blk_to_last_page:
 	add	x0, x0, 1
 	ldr	w5, [x22, x1, lsl 2]
 	str	w5, [x3, x0, lsl 2]
-.L1717:
+.L1796:
 	add	x1, x1, 1
-	b	.L1716
-.L1723:
+	b	.L1795
+.L1802:
 	mov	w0, 0
 	ret
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
@@ -11908,85 +12468,86 @@ Ftl_write_map_blk_to_last_page:
 FtlMapWritePage:
 	stp	x29, x30, [sp, -112]!
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR76
-	stp	x19, x20, [sp, 16]
-	ldr	w3, [x24, #:lo12:.LANCHOR76]
 	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR165
+	stp	x23, x24, [sp, 48]
+	add	x22, x22, :lo12:.LANCHOR165
 	stp	x25, x26, [sp, 64]
+	mov	w23, w1
 	stp	x27, x28, [sp, 80]
-	cbnz	w3, .L1741
-	adrp	x23, .LANCHOR162
-	adrp	x25, .LANCHOR211
-	mov	w22, w1
-	add	x23, x23, :lo12:.LANCHOR162
-	add	x25, x25, :lo12:.LANCHOR211
+	adrp	x25, .LANCHOR77
+	add	x27, x25, :lo12:.LANCHOR77
+	stp	x19, x20, [sp, 16]
+	adrp	x24, .LANCHOR54
 	mov	x19, x0
-	adrp	x27, .LANCHOR53
 	mov	w21, 0
-	add	x0, x27, :lo12:.LANCHOR53
-	stp	x2, x0, [x29, 96]
-.L1728:
-	ldr	w0, [x23]
+	add	x0, x24, :lo12:.LANCHOR54
+	stp	x0, x2, [x29, 96]
+.L1806:
+	ldr	w0, [x22]
 	ldrh	w1, [x19, 2]
 	add	w0, w0, 1
-	str	w0, [x23]
-	ldrh	w0, [x27, #:lo12:.LANCHOR53]
+	str	w0, [x22]
+	ldrh	w0, [x24, #:lo12:.LANCHOR54]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	bge	.L1729
+	bge	.L1807
 	ldrh	w1, [x19]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1730
-.L1729:
+	bne	.L1808
+.L1807:
 	mov	x0, x19
 	bl	Ftl_write_map_blk_to_last_page
-.L1730:
+.L1808:
+	ldr	w0, [x27]
+	cbnz	w0, .L1820
 	ldrh	w1, [x19]
 	ldr	x0, [x19, 16]
 	ldrh	w0, [x0, x1, lsl 1]
-	cbnz	w0, .L1731
-	mov	w2, 764
-	mov	x1, x25
-	adrp	x0, .LC6
-	add	x0, x0, :lo12:.LC6
+	cbnz	w0, .L1810
+	mov	w2, 768
+	adrp	x1, .LANCHOR214
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR214
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1731:
+.L1810:
 	ldrh	w1, [x19]
 	ldrh	w0, [x19, 10]
 	cmp	w1, w0
-	bcc	.L1732
-	mov	w2, 765
-	mov	x1, x25
-	adrp	x0, .LC6
-	add	x0, x0, :lo12:.LC6
+	bcc	.L1811
+	mov	w2, 769
+	adrp	x1, .LANCHOR214
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR214
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1732:
+.L1811:
 	ldrh	w1, [x19]
-	adrp	x20, .LANCHOR199
+	adrp	x20, .LANCHOR202
 	ldr	x0, [x19, 16]
-	add	x28, x20, :lo12:.LANCHOR199
+	add	x28, x20, :lo12:.LANCHOR202
 	mov	w2, 16
 	ldrh	w26, [x0, x1, lsl 1]
 	mov	w1, 0
 	ldrh	w0, [x19, 2]
 	orr	w0, w0, w26, lsl 10
 	str	w0, [x28, 4]
-	ldr	x0, [x29, 96]
+	ldr	x0, [x29, 104]
 	str	x0, [x28, 8]
-	adrp	x0, .LANCHOR185
-	ldr	x0, [x0, #:lo12:.LANCHOR185]
+	adrp	x0, .LANCHOR188
+	ldr	x0, [x0, #:lo12:.LANCHOR188]
 	str	x0, [x28, 16]
 	bl	ftl_memset
 	ldr	x0, [x28, 16]
@@ -11997,42 +12558,42 @@ FtlMapWritePage:
 	ldrh	w1, [x19, 4]
 	strh	w1, [x0]
 	mov	w1, w3
-	strh	w22, [x0, 8]
+	strh	w23, [x0, 8]
 	strh	w26, [x0, 2]
 	mov	x0, x28
 	bl	FlashProgPages
 	ldrh	w0, [x19, 2]
-	ldr	w1, [x20, #:lo12:.LANCHOR199]
+	ldr	w1, [x20, #:lo12:.LANCHOR202]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	strh	w0, [x19, 2]
 	cmn	w1, #1
-	bne	.L1733
+	bne	.L1812
 	ldr	w1, [x28, 4]
-	adrp	x0, .LC38
-	add	x0, x0, :lo12:.LC38
+	adrp	x0, .LC41
+	add	x0, x0, :lo12:.LC41
 	add	w21, w21, 1
 	and	w21, w21, 65535
 	bl	printf
 	ldrh	w0, [x19, 2]
 	cmp	w0, 2
-	bhi	.L1734
-	ldr	x0, [x29, 104]
+	bhi	.L1813
+	ldr	x0, [x29, 96]
 	ldrh	w0, [x0]
 	sub	w0, w0, #1
 	strh	w0, [x19, 2]
-.L1734:
+.L1813:
 	cmp	w21, 3
-	bls	.L1728
-	add	x20, x20, :lo12:.LANCHOR199
+	bls	.L1806
+	add	x20, x20, :lo12:.LANCHOR202
 	mov	w2, w21
-	adrp	x0, .LC39
-	add	x0, x0, :lo12:.LC39
+	adrp	x0, .LC42
+	add	x0, x0, :lo12:.LC42
 	ldr	w1, [x20, 4]
 	bl	printf
 	mov	w0, 1
-	str	w0, [x24, #:lo12:.LANCHOR76]
-.L1741:
+	str	w0, [x25, #:lo12:.LANCHOR77]
+.L1820:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -12041,22 +12602,22 @@ FtlMapWritePage:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1733:
-	cbz	w1, .L1736
+.L1812:
+	cbz	w1, .L1815
 	strh	w26, [x19, 60]
 	cmp	w0, 1
-	beq	.L1728
+	beq	.L1806
 	cmp	w1, 256
-.L1749:
-	beq	.L1728
-	add	x20, x20, :lo12:.LANCHOR199
+.L1828:
+	beq	.L1806
+	add	x20, x20, :lo12:.LANCHOR202
 	ldr	x0, [x19, 40]
 	ldr	w1, [x20, 4]
-	str	w1, [x0, w22, uxtw 2]
-	b	.L1741
-.L1736:
+	str	w1, [x0, w23, uxtw 2]
+	b	.L1820
+.L1815:
 	cmp	w0, 1
-	b	.L1749
+	b	.L1828
 	.size	FtlMapWritePage, .-FtlMapWritePage
 	.section	.text.flush_l2p_region,"ax",@progbits
 	.align	2
@@ -12066,16 +12627,16 @@ flush_l2p_region:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR96
+	adrp	x20, .LANCHOR97
 	ubfiz	x19, x0, 4, 16
-	ldr	x0, [x20, #:lo12:.LANCHOR96]
+	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	add	x1, x0, x19
 	ldr	x2, [x1, 8]
 	ldrh	w1, [x0, x19]
-	adrp	x0, .LANCHOR124
-	add	x0, x0, :lo12:.LANCHOR124
+	adrp	x0, .LANCHOR127
+	add	x0, x0, :lo12:.LANCHOR127
 	bl	FtlMapWritePage
-	ldr	x0, [x20, #:lo12:.LANCHOR96]
+	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	add	x0, x0, x19
 	ldp	x19, x20, [sp, 16]
 	ldr	w1, [x0, 4]
@@ -12093,346 +12654,64 @@ l2p_flush:
 	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR67
-	add	x20, x20, :lo12:.LANCHOR67
+	adrp	x20, .LANCHOR68
+	add	x20, x20, :lo12:.LANCHOR68
 	str	x21, [sp, 32]
 	mov	w19, 0
-	adrp	x21, .LANCHOR96
-.L1753:
+	adrp	x21, .LANCHOR97
+.L1832:
 	ldrh	w0, [x20]
 	cmp	w0, w19
-	bhi	.L1755
+	bhi	.L1834
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1755:
-	ldr	x1, [x21, #:lo12:.LANCHOR96]
+.L1834:
+	ldr	x1, [x21, #:lo12:.LANCHOR97]
 	ubfiz	x0, x19, 4, 16
 	add	x0, x1, x0
 	ldr	w0, [x0, 4]
-	tbz	w0, #31, .L1754
+	tbz	w0, #31, .L1833
 	mov	w0, w19
 	bl	flush_l2p_region
-.L1754:
+.L1833:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1753
+	b	.L1832
 	.size	l2p_flush, .-l2p_flush
-	.section	.text.log2phys,"ax",@progbits
+	.section	.text.FtlVendorPartWrite,"ax",@progbits
 	.align	2
-	.global	log2phys
-	.type	log2phys, %function
-log2phys:
-	stp	x29, x30, [sp, -112]!
-	add	x29, sp, 0
-	stp	x25, x26, [sp, 64]
-	mov	x25, x1
-	adrp	x1, .LANCHOR56
-	stp	x19, x20, [sp, 16]
-	stp	x23, x24, [sp, 48]
-	mov	w26, w2
-	ldrh	w20, [x1, #:lo12:.LANCHOR56]
-	stp	x21, x22, [sp, 32]
-	add	w1, w20, 7
-	mov	x20, 1
-	stp	x27, x28, [sp, 80]
-	lsr	w24, w0, w1
-	and	w23, w24, 65535
-	lsl	x20, x20, x1
-	adrp	x1, .LANCHOR72
-	sub	w20, w20, #1
-	ldr	w1, [x1, #:lo12:.LANCHOR72]
-	and	w20, w20, w0
-	and	x20, x20, 65535
-	cmp	w0, w1
-	bcc	.L1758
-	mov	w2, 884
-	adrp	x1, .LANCHOR212
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR212
-	add	x0, x0, :lo12:.LC6
-	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
-	bl	printf
-.L1758:
-	adrp	x19, .LANCHOR96
-	adrp	x0, .LANCHOR67
-	ldr	x2, [x19, #:lo12:.LANCHOR96]
-	ldrh	w1, [x0, #:lo12:.LANCHOR67]
-	mov	x0, 0
-.L1759:
-	and	x21, x0, 65535
-	cmp	w21, w1
-	bcc	.L1764
-	bl	select_l2p_ram_region
-	and	x21, x0, 65535
-	ldr	x1, [x19, #:lo12:.LANCHOR96]
-	ubfiz	x22, x21, 4, 16
-	add	x2, x1, x22
-	ldrh	w3, [x1, x22]
-	mov	w1, 65535
-	cmp	w3, w1
-	beq	.L1765
-	ldr	w1, [x2, 4]
-	tbz	w1, #31, .L1765
-	bl	flush_l2p_region
-.L1765:
-	adrp	x0, .LANCHOR66
-	ldrh	w0, [x0, #:lo12:.LANCHOR66]
-	cmp	w0, w23
-	bcs	.L1766
-	mov	w2, 526
-	adrp	x1, .LANCHOR213
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR213
-	add	x0, x0, :lo12:.LC6
-	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
-	bl	printf
-.L1766:
-	adrp	x1, .LANCHOR128
-	ubfiz	x0, x23, 2, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR128]
-	ldr	w27, [x1, x0]
-	cbnz	w27, .L1767
-	ldr	x0, [x19, #:lo12:.LANCHOR96]
-	adrp	x1, .LANCHOR57
-	add	x0, x0, x22
-	ldrh	w2, [x1, #:lo12:.LANCHOR57]
-	mov	w1, 255
-	ldr	x0, [x0, 8]
-	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR96]
-	add	x1, x0, x22
-	strh	w23, [x0, x22]
-	str	wzr, [x1, 4]
-	b	.L1760
-.L1764:
-	add	x0, x0, 1
-	add	x3, x2, x0, lsl 4
-	ldrh	w3, [x3, -16]
-	cmp	w3, w23
-	bne	.L1759
-.L1760:
-	ldr	x0, [x19, #:lo12:.LANCHOR96]
-	add	x0, x0, x21, lsl 4
-	cbnz	w26, .L1761
-	ldr	x0, [x0, 8]
-	ldr	w0, [x0, x20, lsl 2]
-	str	w0, [x25]
-.L1762:
-	ldr	x0, [x19, #:lo12:.LANCHOR96]
-	add	x21, x0, x21, lsl 4
-	ldr	w0, [x21, 4]
-	cmn	w0, #1
-	beq	.L1771
-	add	w0, w0, 1
-	str	w0, [x21, 4]
-.L1771:
-	ldp	x19, x20, [sp, 16]
-	mov	w0, 0
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 112
-	ret
-.L1761:
-	ldr	x1, [x0, 8]
-	ldr	w2, [x25]
-	str	w2, [x1, x20, lsl 2]
-	ldr	w1, [x0, 4]
-	orr	w1, w1, -2147483648
-	str	w1, [x0, 4]
-	adrp	x0, .LANCHOR97
-	strh	w23, [x0, #:lo12:.LANCHOR97]
-	b	.L1762
-.L1767:
-	ldr	x0, [x19, #:lo12:.LANCHOR96]
-	adrp	x3, .LANCHOR199
-	add	x28, x3, :lo12:.LANCHOR199
-	mov	w2, 1
-	add	x0, x0, x22
-	str	x3, [x29, 104]
-	mov	w1, w2
-	str	w27, [x28, 4]
-	ldr	x0, [x0, 8]
-	str	x0, [x28, 8]
-	adrp	x0, .LANCHOR185
-	ldr	x0, [x0, #:lo12:.LANCHOR185]
-	str	x0, [x28, 16]
-	mov	x0, x28
-	bl	FlashReadPages
-	ldr	x28, [x28, 16]
-	ldr	x3, [x29, 104]
-	ldr	w0, [x3, #:lo12:.LANCHOR199]
-	cmp	w0, 256
-	bne	.L1768
-	and	w24, w24, 65535
-	mov	w2, w27
-	mov	w1, w24
-	adrp	x0, .LC40
-	add	x0, x0, :lo12:.LC40
-	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR96]
-	adrp	x0, .LANCHOR124
-	add	x0, x0, :lo12:.LANCHOR124
-	lsr	w27, w27, 10
-	add	x1, x1, x22
-	strh	w27, [x0, 60]
-	ldr	x2, [x1, 8]
-	mov	w1, w24
-	bl	FtlMapWritePage
-.L1768:
-	ldrh	w0, [x28, 8]
-	cmp	w0, w23
-	beq	.L1769
-	mov	w2, 552
-	adrp	x1, .LANCHOR213
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR213
-	add	x0, x0, :lo12:.LC6
-	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
-	bl	printf
-.L1769:
-	ldr	x0, [x19, #:lo12:.LANCHOR96]
-	add	x1, x0, x22
-	str	wzr, [x1, 4]
-	strh	w23, [x0, x22]
-	b	.L1760
-	.size	log2phys, .-log2phys
-	.section	.text.FtlReUsePrevPpa,"ax",@progbits
-	.align	2
-	.global	FtlReUsePrevPpa
-	.type	FtlReUsePrevPpa, %function
-FtlReUsePrevPpa:
-	stp	x29, x30, [sp, -80]!
-	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR83
-	stp	x19, x20, [sp, 16]
-	mov	w21, w0
-	str	w1, [x29, 76]
-	lsr	w0, w1, 10
-	str	x23, [sp, 48]
-	bl	P2V_block_in_plane
-	ldr	x2, [x22, #:lo12:.LANCHOR83]
-	and	w3, w0, 65535
-	ubfiz	x20, x3, 1, 16
-	ldrh	w1, [x2, x20]
-	cbnz	w1, .L1777
-	adrp	x0, .LANCHOR87
-	ldr	x19, [x0, #:lo12:.LANCHOR87]
-	cbz	x19, .L1778
-	adrp	x2, .LANCHOR81
-	mov	x5, -6148914691236517206
-	movk	x5, 0xaaab, lsl 0
-	adrp	x23, .LANCHOR88
-	ldr	x2, [x2, #:lo12:.LANCHOR81]
-	mov	w6, 65535
-	ldrh	w4, [x23, #:lo12:.LANCHOR88]
-	sub	x19, x19, x2
-	asr	x19, x19, 1
-	mul	x19, x19, x5
-	mov	w5, 6
-	and	w19, w19, 65535
-.L1779:
-	cmp	w1, w4
-	beq	.L1778
-	cmp	w19, w3
-	bne	.L1780
-	mov	w1, w19
-	add	x0, x0, :lo12:.LANCHOR87
-	bl	List_remove_node
-	ldrh	w0, [x23, #:lo12:.LANCHOR88]
-	cbnz	w0, .L1781
-	mov	w2, 1862
-	adrp	x1, .LANCHOR214
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR214
-	add	x0, x0, :lo12:.LC6
-	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
-	bl	printf
-.L1781:
-	ldrh	w0, [x23, #:lo12:.LANCHOR88]
-	sub	w0, w0, #1
-	strh	w0, [x23, #:lo12:.LANCHOR88]
-	mov	w0, w19
-	bl	INSERT_DATA_LIST
-	ldr	x1, [x22, #:lo12:.LANCHOR83]
-	ldrh	w0, [x1, x20]
-	add	w0, w0, 1
-	strh	w0, [x1, x20]
-.L1778:
-	add	x1, x29, 76
-	mov	w2, 1
-	mov	w0, w21
-	bl	log2phys
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldr	x23, [sp, 48]
-	ldp	x29, x30, [sp], 80
-	ret
-.L1780:
-	umull	x19, w19, w5
-	ldrh	w19, [x2, x19]
-	cmp	w19, w6
-	beq	.L1778
-	add	w1, w1, 1
-	and	w1, w1, 65535
-	b	.L1779
-.L1777:
-	add	w1, w1, 1
-	strh	w1, [x2, x20]
-	b	.L1778
-	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
-	.section	.text.FtlVendorPartWrite,"ax",@progbits
-	.align	2
-	.global	FtlVendorPartWrite
-	.type	FtlVendorPartWrite, %function
-FtlVendorPartWrite:
-	stp	x29, x30, [sp, -176]!
+	.global	FtlVendorPartWrite
+	.type	FtlVendorPartWrite, %function
+FtlVendorPartWrite:
+	stp	x29, x30, [sp, -176]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w20, w1
 	stp	x21, x22, [sp, 32]
 	add	w1, w0, w1
 	mov	w22, w0
-	adrp	x0, .LANCHOR49
+	adrp	x0, .LANCHOR50
 	stp	x23, x24, [sp, 48]
-	ldrh	w0, [x0, #:lo12:.LANCHOR49]
+	ldrh	w0, [x0, #:lo12:.LANCHOR50]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	cmp	w1, w0
-	bhi	.L1795
-	adrp	x0, .LANCHOR56
-	adrp	x26, .LANCHOR55
-	adrp	x27, .LANCHOR57
+	bhi	.L1844
+	adrp	x0, .LANCHOR57
+	adrp	x26, .LANCHOR56
+	adrp	x27, .LANCHOR58
 	mov	x25, x2
-	ldrh	w21, [x0, #:lo12:.LANCHOR56]
-	add	x26, x26, :lo12:.LANCHOR55
-	add	x27, x27, :lo12:.LANCHOR57
+	ldrh	w21, [x0, #:lo12:.LANCHOR57]
+	add	x26, x26, :lo12:.LANCHOR56
+	add	x27, x27, :lo12:.LANCHOR58
 	mov	w24, 0
 	lsr	w21, w22, w21
-.L1789:
-	cbnz	w20, .L1794
-.L1787:
+.L1838:
+	cbnz	w20, .L1843
+.L1836:
 	mov	w0, w24
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -12441,11 +12720,11 @@ FtlVendorPartWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1794:
+.L1843:
 	ldrh	w1, [x26]
-	adrp	x0, .LANCHOR191
-	adrp	x28, .LANCHOR182
-	ldr	x0, [x0, #:lo12:.LANCHOR191]
+	adrp	x0, .LANCHOR194
+	adrp	x28, .LANCHOR185
+	ldr	x0, [x0, #:lo12:.LANCHOR194]
 	udiv	w23, w22, w1
 	ldr	w2, [x0, w21, uxtw 2]
 	and	w0, w20, 65535
@@ -12454,26 +12733,26 @@ FtlVendorPartWrite:
 	and	w19, w19, 65535
 	cmp	w20, w19
 	csel	w19, w0, w19, cc
-	cbz	w2, .L1791
+	cbz	w2, .L1840
 	cmp	w19, w1
-	beq	.L1791
-	ldr	x0, [x28, #:lo12:.LANCHOR182]
+	beq	.L1840
+	ldr	x0, [x28, #:lo12:.LANCHOR185]
 	str	w2, [x29, 124]
 	mov	w2, 1
 	stp	x0, xzr, [x29, 128]
 	mov	w1, w2
 	add	x0, x29, 120
 	bl	FlashReadPages
-.L1792:
+.L1841:
 	lsl	w3, w19, 9
-	ldr	x0, [x28, #:lo12:.LANCHOR182]
+	ldr	x0, [x28, #:lo12:.LANCHOR185]
 	lsl	w23, w23, 7
 	mov	w2, w3
 	mov	x1, x25
 	str	w3, [x29, 108]
 	add	x0, x0, x23, sxtw 2
 	bl	ftl_memcpy
-	ldr	x2, [x28, #:lo12:.LANCHOR182]
+	ldr	x2, [x28, #:lo12:.LANCHOR185]
 	mov	w1, w21
 	adrp	x0, .LANCHOR215
 	add	x0, x0, :lo12:.LANCHOR215
@@ -12485,30 +12764,30 @@ FtlVendorPartWrite:
 	ldr	w3, [x29, 108]
 	csinv	w24, w24, wzr, ne
 	add	x25, x25, x3, sxtw
-	b	.L1789
-.L1791:
+	b	.L1838
+.L1840:
 	ldrh	w2, [x27]
 	mov	w1, 0
-	ldr	x0, [x28, #:lo12:.LANCHOR182]
+	ldr	x0, [x28, #:lo12:.LANCHOR185]
 	bl	ftl_memset
-	b	.L1792
-.L1795:
+	b	.L1841
+.L1844:
 	mov	w24, -1
-	b	.L1787
+	b	.L1836
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.section	.text.Ftl_save_ext_data,"ax",@progbits
 	.align	2
 	.global	Ftl_save_ext_data
 	.type	Ftl_save_ext_data, %function
 Ftl_save_ext_data:
-	adrp	x0, .LANCHOR135
-	add	x2, x0, :lo12:.LANCHOR135
-	ldr	w1, [x0, #:lo12:.LANCHOR135]
+	adrp	x0, .LANCHOR138
+	add	x2, x0, :lo12:.LANCHOR138
+	ldr	w1, [x0, #:lo12:.LANCHOR138]
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1800
-	mov	w0, 72
+	bne	.L1849
+	mov	w0, 73
 	mov	w1, 1
 	movk	w0, 0x5000, lsl 16
 	str	w0, [x2, 4]
@@ -12518,45 +12797,45 @@ Ftl_save_ext_data:
 	adrp	x0, .LANCHOR217
 	ldr	w0, [x0, #:lo12:.LANCHOR217]
 	str	w0, [x2, 92]
-	adrp	x0, .LANCHOR158
-	ldr	w0, [x0, #:lo12:.LANCHOR158]
+	adrp	x0, .LANCHOR161
+	ldr	w0, [x0, #:lo12:.LANCHOR161]
 	str	w0, [x2, 8]
-	adrp	x0, .LANCHOR159
-	ldr	w0, [x0, #:lo12:.LANCHOR159]
-	str	w0, [x2, 12]
-	adrp	x0, .LANCHOR163
-	ldr	w0, [x0, #:lo12:.LANCHOR163]
-	str	w0, [x2, 16]
 	adrp	x0, .LANCHOR162
 	ldr	w0, [x0, #:lo12:.LANCHOR162]
-	str	w0, [x2, 20]
+	str	w0, [x2, 12]
+	adrp	x0, .LANCHOR166
+	ldr	w0, [x0, #:lo12:.LANCHOR166]
+	str	w0, [x2, 16]
 	adrp	x0, .LANCHOR165
 	ldr	w0, [x0, #:lo12:.LANCHOR165]
+	str	w0, [x2, 20]
+	adrp	x0, .LANCHOR168
+	ldr	w0, [x0, #:lo12:.LANCHOR168]
 	str	w0, [x2, 28]
-	adrp	x0, .LANCHOR79
-	ldr	w0, [x0, #:lo12:.LANCHOR79]
+	adrp	x0, .LANCHOR80
+	ldr	w0, [x0, #:lo12:.LANCHOR80]
 	str	w0, [x2, 32]
-	adrp	x0, .LANCHOR160
-	ldr	w0, [x0, #:lo12:.LANCHOR160]
+	adrp	x0, .LANCHOR163
+	ldr	w0, [x0, #:lo12:.LANCHOR163]
 	str	w0, [x2, 36]
-	adrp	x0, .LANCHOR161
-	ldr	w0, [x0, #:lo12:.LANCHOR161]
+	adrp	x0, .LANCHOR164
+	ldr	w0, [x0, #:lo12:.LANCHOR164]
 	str	w0, [x2, 40]
-	adrp	x0, .LANCHOR166
-	ldr	w0, [x0, #:lo12:.LANCHOR166]
+	adrp	x0, .LANCHOR169
+	ldr	w0, [x0, #:lo12:.LANCHOR169]
 	str	w0, [x2, 44]
-	adrp	x0, .LANCHOR167
-	ldr	w0, [x0, #:lo12:.LANCHOR167]
+	adrp	x0, .LANCHOR170
+	ldr	w0, [x0, #:lo12:.LANCHOR170]
 	str	w0, [x2, 48]
-	adrp	x0, .LANCHOR155
-	ldr	w0, [x0, #:lo12:.LANCHOR155]
+	adrp	x0, .LANCHOR158
+	ldr	w0, [x0, #:lo12:.LANCHOR158]
 	str	w0, [x2, 60]
-	adrp	x0, .LANCHOR154
-	ldr	w0, [x0, #:lo12:.LANCHOR154]
+	adrp	x0, .LANCHOR157
+	ldr	w0, [x0, #:lo12:.LANCHOR157]
 	str	w0, [x2, 64]
 	mov	w0, 0
 	b	FtlVendorPartWrite
-.L1800:
+.L1849:
 	ret
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
 	.section	.text.FtlEctTblFlush,"ax",@progbits
@@ -12566,42 +12845,42 @@ Ftl_save_ext_data:
 FtlEctTblFlush:
 	adrp	x1, .LANCHOR28
 	ldr	w1, [x1, #:lo12:.LANCHOR28]
-	cbz	w1, .L1807
-	adrp	x1, .LANCHOR167
+	cbz	w1, .L1856
+	adrp	x1, .LANCHOR170
 	mov	w2, 4
-	ldr	w1, [x1, #:lo12:.LANCHOR167]
-	cmp	w1, 29
+	ldr	w1, [x1, #:lo12:.LANCHOR170]
+	cmp	w1, 39
 	mov	w1, 32
 	csel	w1, w1, w2, hi
-.L1803:
+.L1852:
 	adrp	x3, .LANCHOR218
 	ldrh	w2, [x3, #:lo12:.LANCHOR218]
 	cmp	w2, 31
-	bhi	.L1804
+	bhi	.L1853
 	add	w2, w2, 1
 	mov	w1, 1
 	strh	w2, [x3, #:lo12:.LANCHOR218]
-.L1804:
-	adrp	x2, .LANCHOR188
-	cbnz	w0, .L1805
-	ldr	x0, [x2, #:lo12:.LANCHOR188]
+.L1853:
+	adrp	x2, .LANCHOR191
+	cbnz	w0, .L1854
+	ldr	x0, [x2, #:lo12:.LANCHOR191]
 	ldr	w3, [x0, 20]
 	ldr	w0, [x0, 16]
 	add	w1, w1, w3
 	cmp	w0, w1
-	bcc	.L1810
-.L1805:
+	bcc	.L1859
+.L1854:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
-	ldr	x2, [x2, #:lo12:.LANCHOR188]
+	ldr	x2, [x2, #:lo12:.LANCHOR191]
 	ldr	w0, [x2, 16]
 	str	w0, [x2, 20]
 	mov	w0, 17221
 	str	wzr, [x2, 4]
 	movk	w0, 0x4254, lsl 16
 	str	w0, [x2]
-	adrp	x0, .LANCHOR187
-	ldrh	w1, [x0, #:lo12:.LANCHOR187]
+	adrp	x0, .LANCHOR190
+	ldrh	w1, [x0, #:lo12:.LANCHOR190]
 	lsl	w0, w1, 9
 	str	w0, [x2, 12]
 	ldr	w0, [x2, 8]
@@ -12613,10 +12892,10 @@ FtlEctTblFlush:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1807:
+.L1856:
 	mov	w1, 32
-	b	.L1803
-.L1810:
+	b	.L1852
+.L1859:
 	mov	w0, 0
 	ret
 	.size	FtlEctTblFlush, .-FtlEctTblFlush
@@ -12630,440 +12909,116 @@ allocate_new_data_superblock:
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
 	ldrh	w20, [x0]
-	adrp	x0, .LANCHOR39
+	adrp	x0, .LANCHOR40
 	str	x21, [sp, 32]
-	ldrh	w0, [x0, #:lo12:.LANCHOR39]
+	ldrh	w0, [x0, #:lo12:.LANCHOR40]
 	cmp	w0, w20
-	bcs	.L1813
-	mov	w2, 2982
+	bcs	.L1862
+	mov	w2, 3289
 	adrp	x1, .LANCHOR219
-	adrp	x0, .LC6
+	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR219
-	add	x0, x0, :lo12:.LC6
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1813:
-	adrp	x0, .LANCHOR76
-	ldr	w0, [x0, #:lo12:.LANCHOR76]
-	cbnz	w0, .L1814
+.L1862:
+	adrp	x0, .LANCHOR77
+	ldr	w0, [x0, #:lo12:.LANCHOR77]
+	cbnz	w0, .L1863
 	mov	w0, 65535
 	cmp	w20, w0
-	beq	.L1815
-	adrp	x1, .LANCHOR83
+	beq	.L1864
+	adrp	x1, .LANCHOR84
 	ubfiz	x0, x20, 1, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR83]
+	ldr	x1, [x1, #:lo12:.LANCHOR84]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1816
+	cbz	w0, .L1865
 	mov	w0, w20
 	bl	INSERT_DATA_LIST
-.L1815:
+.L1864:
 	strb	wzr, [x19, 8]
-	adrp	x0, .LANCHOR92
-	add	x0, x0, :lo12:.LANCHOR92
+	adrp	x0, .LANCHOR93
+	add	x0, x0, :lo12:.LANCHOR93
 	cmp	x19, x0
-	beq	.L1817
-	adrp	x0, .LANCHOR43
-	ldrh	w1, [x0, #:lo12:.LANCHOR43]
+	beq	.L1866
+	adrp	x0, .LANCHOR44
+	ldrh	w1, [x0, #:lo12:.LANCHOR44]
 	cmp	w1, 1
-	beq	.L1817
+	beq	.L1866
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L1818
-.L1817:
+	cbz	w0, .L1867
+.L1866:
 	mov	w0, 1
 	strb	w0, [x19, 8]
-.L1819:
-	adrp	x1, .LANCHOR130
+.L1868:
+	adrp	x1, .LANCHOR133
 	mov	w2, 65535
 	mov	x21, x1
-	ldrh	w0, [x1, #:lo12:.LANCHOR130]
+	ldrh	w0, [x1, #:lo12:.LANCHOR133]
 	cmp	w0, w2
-	beq	.L1824
+	beq	.L1873
 	cmp	w20, w0
-	bne	.L1825
-	adrp	x2, .LANCHOR83
+	bne	.L1874
+	adrp	x2, .LANCHOR84
 	ubfiz	x1, x0, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR83]
+	ldr	x2, [x2, #:lo12:.LANCHOR84]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1826
-.L1825:
+	cbz	w1, .L1875
+.L1874:
 	bl	update_vpc_list
-.L1826:
+.L1875:
 	mov	w0, -1
-	strh	w0, [x21, #:lo12:.LANCHOR130]
-.L1824:
+	strh	w0, [x21, #:lo12:.LANCHOR133]
+.L1873:
 	mov	x0, x19
 	bl	allocate_data_superblock
 	bl	l2p_flush
 	mov	w0, 0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1814:
+.L1863:
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1816:
+.L1865:
 	mov	w0, w20
 	bl	INSERT_FREE_LIST
-	b	.L1815
-.L1818:
-	adrp	x0, .LANCHOR91
-	add	x2, x0, :lo12:.LANCHOR91
+	b	.L1864
+.L1867:
+	adrp	x0, .LANCHOR92
+	add	x2, x0, :lo12:.LANCHOR92
 	cmp	x19, x2
-	bne	.L1819
+	bne	.L1868
 	cmp	w1, 3
-	beq	.L1821
-	adrp	x1, .LANCHOR155
-	ldr	w1, [x1, #:lo12:.LANCHOR155]
+	beq	.L1870
+	adrp	x1, .LANCHOR158
+	ldr	w1, [x1, #:lo12:.LANCHOR158]
 	cmp	w1, 1
-	bne	.L1822
-.L1821:
-	add	x1, x0, :lo12:.LANCHOR91
+	bne	.L1871
+.L1870:
+	add	x1, x0, :lo12:.LANCHOR92
 	mov	w2, 1
 	strb	w2, [x1, 8]
-.L1822:
+.L1871:
 	adrp	x1, .LANCHOR28
 	ldr	w1, [x1, #:lo12:.LANCHOR28]
-	cbz	w1, .L1819
-	adrp	x1, .LANCHOR167
-	ldr	w1, [x1, #:lo12:.LANCHOR167]
-	cmp	w1, 29
-	bhi	.L1819
-	add	x0, x0, :lo12:.LANCHOR91
-	mov	w1, 1
+	cbz	w1, .L1868
+	adrp	x1, .LANCHOR170
+	ldr	w1, [x1, #:lo12:.LANCHOR170]
+	cmp	w1, 39
+	bhi	.L1868
+	add	x0, x0, :lo12:.LANCHOR92
+	mov	w1, 1
 	strb	w1, [x0, 8]
-	b	.L1819
+	b	.L1868
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
-	.section	.text.FtlProgPages,"ax",@progbits
-	.align	2
-	.global	FtlProgPages
-	.type	FtlProgPages, %function
-FtlProgPages:
-	stp	x29, x30, [sp, -96]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	x19, x0
-	adrp	x0, .LANCHOR8
-	stp	x21, x22, [sp, 32]
-	stp	x23, x24, [sp, 48]
-	mov	w21, w1
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	mov	x20, x3
-	str	x25, [sp, 64]
-	cbz	w0, .L1854
-	ldrb	w0, [x3, 8]
-	cmp	w0, 1
-	cset	w22, eq
-.L1841:
-	ldrb	w3, [x20, 9]
-	mov	w1, w21
-	mov	w2, w22
-	mov	x0, x19
-	adrp	x24, .LANCHOR52
-	adrp	x23, .LANCHOR135
-	add	x24, x24, :lo12:.LANCHOR52
-	add	x23, x23, :lo12:.LANCHOR135
-	bl	FlashProgPages
-	mov	w0, 56
-	umaddl	x21, w21, w0, x19
-.L1842:
-	cmp	x21, x19
-	beq	.L1851
-	adrp	x25, .LANCHOR83
-	b	.L1852
-.L1854:
-	mov	w22, 0
-	b	.L1841
-.L1845:
-	ldr	w0, [x19, 4]
-	lsr	w0, w0, 10
-	bl	P2V_block_in_plane
-	ldrh	w2, [x20]
-	cmp	w2, w0, uxth
-	bne	.L1843
-	ldr	x1, [x25, #:lo12:.LANCHOR83]
-	ubfiz	x2, x2, 1, 16
-	ldrh	w3, [x20, 4]
-	ldrh	w0, [x1, x2]
-	sub	w0, w0, w3
-	strh	w0, [x1, x2]
-	strb	wzr, [x20, 6]
-	ldrh	w0, [x24]
-	strh	w0, [x20, 2]
-	strh	wzr, [x20, 4]
-.L1843:
-	ldrh	w0, [x20, 4]
-	cbnz	w0, .L1844
-	mov	x0, x20
-	bl	allocate_new_data_superblock
-.L1844:
-	ldr	w0, [x23, 96]
-	add	w0, w0, 1
-	str	w0, [x23, 96]
-	ldr	w0, [x19, 4]
-	lsr	w0, w0, 10
-	bl	FtlGcMarkBadPhyBlk
-	mov	x0, x20
-	bl	get_new_active_ppa
-	str	w0, [x19, 4]
-	mov	w2, w22
-	str	w0, [x29, 92]
-	mov	w1, 1
-	ldrb	w3, [x20, 9]
-	mov	x0, x19
-	bl	FlashProgPages
-.L1852:
-	ldr	w0, [x19]
-	cmn	w0, #1
-	beq	.L1845
-	adrp	x0, .LANCHOR37
-	ldrb	w1, [x20, 6]
-	ldrh	w0, [x0, #:lo12:.LANCHOR37]
-	cmp	w1, w0
-	bcc	.L1846
-	mov	w2, 1564
-	adrp	x1, .LANCHOR220
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR220
-	add	x0, x0, :lo12:.LC6
-	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
-	bl	printf
-.L1846:
-	ldr	w0, [x19, 4]
-	cbnz	w22, .L1847
-.L1859:
-	str	w0, [x29, 92]
-	add	x1, x29, 92
-	ldr	w0, [x19, 24]
-	mov	w2, 1
-	bl	log2phys
-	ldr	x0, [x19, 16]
-	ldr	w3, [x0, 12]
-	lsr	w0, w3, 10
-	bl	P2V_block_in_plane
-	and	w1, w0, 65535
-	mov	w25, w1
-	cmn	w3, #1
-	beq	.L1849
-	adrp	x2, .LANCHOR83
-	ubfiz	x0, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR83]
-	ldrh	w0, [x2, x0]
-	cbnz	w0, .L1850
-	adrp	x0, .LC41
-	mov	w2, 0
-	add	x0, x0, :lo12:.LC41
-	bl	printf
-.L1850:
-	mov	w0, w25
-	bl	decrement_vpc_count
-.L1849:
-	add	x19, x19, 56
-	b	.L1842
-.L1847:
-	orr	w0, w0, -2147483648
-	b	.L1859
-.L1851:
-	adrp	x0, .LANCHOR37
-	ldrb	w1, [x20, 6]
-	ldrh	w0, [x0, #:lo12:.LANCHOR37]
-	cmp	w1, w0
-	bcc	.L1840
-	mov	w2, 1581
-	adrp	x1, .LANCHOR220
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR220
-	add	x0, x0, :lo12:.LC6
-	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
-	bl	printf
-.L1840:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldr	x25, [sp, 64]
-	ldp	x29, x30, [sp], 96
-	ret
-	.size	FtlProgPages, .-FtlProgPages
-	.section	.text.FtlCacheWriteBack,"ax",@progbits
-	.align	2
-	.global	FtlCacheWriteBack
-	.type	FtlCacheWriteBack, %function
-FtlCacheWriteBack:
-	stp	x29, x30, [sp, -32]!
-	add	x29, sp, 0
-	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR129
-	ldr	x0, [x19, #:lo12:.LANCHOR129]
-	cbz	x0, .L1861
-	adrp	x1, .LANCHOR221
-	mov	w2, 0
-	ldr	x3, [x1, #:lo12:.LANCHOR221]
-	mov	w1, 1
-	bl	FtlProgPages
-	str	xzr, [x19, #:lo12:.LANCHOR129]
-.L1861:
-	mov	w0, 0
-	ldr	x19, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	ret
-	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
-	.section	.text.ftl_discard,"ax",@progbits
-	.align	2
-	.global	ftl_discard
-	.type	ftl_discard, %function
-ftl_discard:
-	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR68
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	w20, w1
-	ldr	w0, [x0, #:lo12:.LANCHOR68]
-	add	w1, w1, w2
-	stp	x21, x22, [sp, 32]
-	str	x23, [sp, 48]
-	cmp	w1, w0
-	bhi	.L1874
-	mov	w19, w2
-	cmp	w2, 31
-	bhi	.L1868
-.L1882:
-	mov	w0, 0
-.L1866:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldr	x23, [sp, 48]
-	ldp	x29, x30, [sp], 80
-	ret
-.L1868:
-	adrp	x22, .LANCHOR55
-	bl	FtlCacheWriteBack
-	ldrh	w0, [x22, #:lo12:.LANCHOR55]
-	udiv	w21, w20, w0
-	msub	w20, w0, w21, w20
-	ands	w20, w20, 65535
-	beq	.L1869
-	sub	w0, w0, w20
-	add	w21, w21, 1
-	cmp	w0, w19
-	csel	w0, w0, w19, ls
-	sub	w19, w19, w0, uxth
-.L1869:
-	adrp	x20, .LANCHOR222
-	adrp	x23, .LANCHOR160
-	add	x20, x20, :lo12:.LANCHOR222
-	add	x23, x23, :lo12:.LANCHOR160
-	mov	w0, -1
-	str	w0, [x29, 76]
-.L1870:
-	ldrh	w0, [x22, #:lo12:.LANCHOR55]
-	cmp	w19, w0
-	bcs	.L1872
-	adrp	x0, .LANCHOR222
-	ldr	w1, [x0, #:lo12:.LANCHOR222]
-	cmp	w1, 32
-	bls	.L1882
-	str	wzr, [x0, #:lo12:.LANCHOR222]
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
-	b	.L1882
-.L1872:
-	mov	w2, 0
-	add	x1, x29, 72
-	mov	w0, w21
-	bl	log2phys
-	ldr	w0, [x29, 72]
-	cmn	w0, #1
-	beq	.L1871
-	ldr	w0, [x20]
-	mov	w2, 1
-	add	x1, x29, 76
-	add	w0, w0, 1
-	str	w0, [x20]
-	ldr	w0, [x23]
-	add	w0, w0, 1
-	str	w0, [x23]
-	mov	w0, w21
-	bl	log2phys
-	ldr	w0, [x29, 72]
-	lsr	w0, w0, 10
-	bl	P2V_block_in_plane
-	bl	decrement_vpc_count
-.L1871:
-	ldrh	w0, [x22, #:lo12:.LANCHOR55]
-	add	w21, w21, 1
-	sub	w19, w19, w0
-	b	.L1870
-.L1874:
-	mov	w0, -1
-	b	.L1866
-	.size	ftl_discard, .-ftl_discard
-	.section	.text.FtlSysFlush,"ax",@progbits
-	.align	2
-	.global	FtlSysFlush
-	.type	FtlSysFlush, %function
-FtlSysFlush:
-	adrp	x0, .LANCHOR76
-	ldr	w0, [x0, #:lo12:.LANCHOR76]
-	cbnz	w0, .L1886
-	stp	x29, x30, [sp, -16]!
-	add	x29, sp, 0
-	bl	FtlCacheWriteBack
-	bl	l2p_flush
-	mov	w0, 1
-	bl	FtlEctTblFlush
-	bl	FtlVpcTblFlush
-	mov	w0, 0
-	ldp	x29, x30, [sp], 16
-	ret
-.L1886:
-	mov	w0, 0
-	ret
-	.size	FtlSysFlush, .-FtlSysFlush
-	.section	.text.FtlDeInit,"ax",@progbits
-	.align	2
-	.global	FtlDeInit
-	.type	FtlDeInit, %function
-FtlDeInit:
-	adrp	x0, .LANCHOR223
-	ldr	w0, [x0, #:lo12:.LANCHOR223]
-	cmp	w0, 1
-	bne	.L1892
-	stp	x29, x30, [sp, -16]!
-	add	x29, sp, 0
-	bl	FtlSysFlush
-	mov	w0, 0
-	ldp	x29, x30, [sp], 16
-	ret
-.L1892:
-	mov	w0, 0
-	ret
-	.size	FtlDeInit, .-FtlDeInit
-	.section	.text.rk_ftl_de_init,"ax",@progbits
-	.align	2
-	.global	rk_ftl_de_init
-	.type	rk_ftl_de_init, %function
-rk_ftl_de_init:
-	stp	x29, x30, [sp, -16]!
-	add	x29, sp, 0
-	bl	FlashDeInit
-	bl	FtlDeInit
-	ldp	x29, x30, [sp], 16
-	b	FlashDeInit
-	.size	rk_ftl_de_init, .-rk_ftl_de_init
 	.section	.text.FtlVendorPartRead,"ax",@progbits
 	.align	2
 	.global	FtlVendorPartRead
@@ -13075,27 +13030,27 @@ FtlVendorPartRead:
 	mov	w22, w0
 	mov	w21, w1
 	add	w1, w0, w1
-	adrp	x0, .LANCHOR49
+	adrp	x0, .LANCHOR50
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
-	ldrh	w0, [x0, #:lo12:.LANCHOR49]
+	ldrh	w0, [x0, #:lo12:.LANCHOR50]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	cmp	w1, w0
-	bhi	.L1906
-	adrp	x0, .LANCHOR56
-	adrp	x26, .LANCHOR182
+	bhi	.L1898
+	adrp	x0, .LANCHOR57
+	adrp	x26, .LANCHOR185
 	mov	x25, x2
 	mov	x28, x26
-	ldrh	w20, [x0, #:lo12:.LANCHOR56]
+	ldrh	w20, [x0, #:lo12:.LANCHOR57]
 	mov	w24, 0
-	adrp	x0, .LANCHOR55
-	add	x0, x0, :lo12:.LANCHOR55
+	adrp	x0, .LANCHOR56
+	add	x0, x0, :lo12:.LANCHOR56
 	str	x0, [x29, 104]
 	lsr	w20, w22, w20
-.L1899:
-	cbnz	w21, .L1905
-.L1897:
+.L1891:
+	cbnz	w21, .L1897
+.L1889:
 	mov	w0, w24
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -13104,9 +13059,9 @@ FtlVendorPartRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1905:
-	adrp	x0, .LANCHOR191
-	ldr	x0, [x0, #:lo12:.LANCHOR191]
+.L1897:
+	adrp	x0, .LANCHOR194
+	ldr	x0, [x0, #:lo12:.LANCHOR194]
 	ldr	w3, [x0, w20, uxtw 2]
 	ldr	x0, [x29, 104]
 	ldrh	w19, [x0]
@@ -13118,8 +13073,8 @@ FtlVendorPartRead:
 	cmp	w21, w19
 	csel	w19, w0, w19, cc
 	lsl	w27, w19, 9
-	cbz	w3, .L1901
-	ldr	x0, [x26, #:lo12:.LANCHOR182]
+	cbz	w3, .L1893
+	ldr	x0, [x26, #:lo12:.LANCHOR185]
 	mov	w2, 1
 	str	w3, [x29, 100]
 	mov	w1, w2
@@ -13130,43 +13085,43 @@ FtlVendorPartRead:
 	ldr	w0, [x29, 120]
 	ldr	w3, [x29, 100]
 	cmn	w0, #1
-	adrp	x0, .LANCHOR199
+	adrp	x0, .LANCHOR202
 	csinv	w24, w24, wzr, ne
-	ldr	w0, [x0, #:lo12:.LANCHOR199]
+	ldr	w0, [x0, #:lo12:.LANCHOR202]
 	cmp	w0, 256
-	bne	.L1903
+	bne	.L1895
 	mov	w2, w3
 	mov	w1, w20
-	adrp	x0, .LC42
-	add	x0, x0, :lo12:.LC42
+	adrp	x0, .LC43
+	add	x0, x0, :lo12:.LC43
 	bl	printf
-	ldr	x2, [x26, #:lo12:.LANCHOR182]
+	ldr	x2, [x26, #:lo12:.LANCHOR185]
 	adrp	x0, .LANCHOR215
 	mov	w1, w20
 	add	x0, x0, :lo12:.LANCHOR215
 	bl	FtlMapWritePage
-.L1903:
-	ldr	x1, [x28, #:lo12:.LANCHOR182]
+.L1895:
+	ldr	x1, [x28, #:lo12:.LANCHOR185]
 	lsl	w23, w23, 7
 	mov	w2, w27
 	mov	x0, x25
 	add	x1, x1, x23, sxtw 2
 	bl	ftl_memcpy
-.L1904:
+.L1896:
 	add	w20, w20, 1
 	sub	w21, w21, w19
 	add	w22, w22, w19
 	add	x25, x25, x27, sxtw
-	b	.L1899
-.L1901:
+	b	.L1891
+.L1893:
 	mov	w2, w27
 	mov	w1, 0
 	mov	x0, x25
 	bl	ftl_memset
-	b	.L1904
-.L1906:
+	b	.L1896
+.L1898:
 	mov	w24, -1
-	b	.L1897
+	b	.L1889
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
 	.section	.text.FtlLoadEctTbl,"ax",@progbits
 	.align	2
@@ -13177,28 +13132,28 @@ FtlLoadEctTbl:
 	mov	w0, 64
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR188
-	adrp	x20, .LANCHOR187
-	ldr	x2, [x19, #:lo12:.LANCHOR188]
-	ldrh	w1, [x20, #:lo12:.LANCHOR187]
+	adrp	x19, .LANCHOR191
+	adrp	x20, .LANCHOR190
+	ldr	x2, [x19, #:lo12:.LANCHOR191]
+	ldrh	w1, [x20, #:lo12:.LANCHOR190]
 	bl	FtlVendorPartRead
-	ldr	x0, [x19, #:lo12:.LANCHOR188]
+	ldr	x0, [x19, #:lo12:.LANCHOR191]
 	ldr	w1, [x0]
 	mov	w0, 17221
 	movk	w0, 0x4254, lsl 16
 	cmp	w1, w0
-	beq	.L1909
-	adrp	x1, .LC43
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC43
-	add	x0, x0, :lo12:.LC8
+	beq	.L1901
+	adrp	x1, .LC44
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC44
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR188]
+	ldr	x0, [x19, #:lo12:.LANCHOR191]
 	mov	w1, 0
-	ldrh	w2, [x20, #:lo12:.LANCHOR187]
+	ldrh	w2, [x20, #:lo12:.LANCHOR190]
 	lsl	w2, w2, 9
 	bl	ftl_memset
-.L1909:
+.L1901:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -13214,96 +13169,96 @@ Ftl_load_ext_data:
 	mov	w0, 0
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR135
+	adrp	x19, .LANCHOR138
 	str	x21, [sp, 32]
-	add	x21, x19, :lo12:.LANCHOR135
+	add	x21, x19, :lo12:.LANCHOR138
 	mov	x2, x21
 	bl	FtlVendorPartRead
-	ldr	w0, [x19, #:lo12:.LANCHOR135]
+	ldr	w0, [x19, #:lo12:.LANCHOR138]
 	mov	w20, 19539
 	movk	w20, 0x4654, lsl 16
 	cmp	w0, w20
-	beq	.L1912
+	beq	.L1904
 	mov	w2, 512
 	mov	w1, 0
 	mov	x0, x21
 	bl	ftl_memset
-	str	w20, [x19, #:lo12:.LANCHOR135]
-.L1912:
-	ldr	w1, [x19, #:lo12:.LANCHOR135]
-	add	x0, x19, :lo12:.LANCHOR135
+	str	w20, [x19, #:lo12:.LANCHOR138]
+.L1904:
+	ldr	w1, [x19, #:lo12:.LANCHOR138]
+	add	x0, x19, :lo12:.LANCHOR138
 	cmp	w1, w20
-	adrp	x20, .LANCHOR165
-	bne	.L1913
+	adrp	x20, .LANCHOR168
+	bne	.L1905
 	adrp	x1, .LANCHOR216
 	ldr	w2, [x0, 88]
 	str	w2, [x1, #:lo12:.LANCHOR216]
 	adrp	x1, .LANCHOR217
 	ldr	w2, [x0, 92]
 	str	w2, [x1, #:lo12:.LANCHOR217]
-	adrp	x1, .LANCHOR158
+	adrp	x1, .LANCHOR161
 	ldr	w2, [x0, 8]
-	str	w2, [x1, #:lo12:.LANCHOR158]
-	adrp	x1, .LANCHOR159
+	str	w2, [x1, #:lo12:.LANCHOR161]
+	adrp	x1, .LANCHOR162
 	ldr	w2, [x0, 12]
-	str	w2, [x1, #:lo12:.LANCHOR159]
-	adrp	x1, .LANCHOR163
+	str	w2, [x1, #:lo12:.LANCHOR162]
+	adrp	x1, .LANCHOR166
 	ldr	w2, [x0, 16]
-	str	w2, [x1, #:lo12:.LANCHOR163]
-	adrp	x1, .LANCHOR162
+	str	w2, [x1, #:lo12:.LANCHOR166]
+	adrp	x1, .LANCHOR165
 	ldr	w2, [x0, 20]
-	str	w2, [x1, #:lo12:.LANCHOR162]
+	str	w2, [x1, #:lo12:.LANCHOR165]
 	ldp	w1, w2, [x0, 28]
-	str	w1, [x20, #:lo12:.LANCHOR165]
-	adrp	x1, .LANCHOR79
-	str	w2, [x1, #:lo12:.LANCHOR79]
-	adrp	x1, .LANCHOR160
+	str	w1, [x20, #:lo12:.LANCHOR168]
+	adrp	x1, .LANCHOR80
+	str	w2, [x1, #:lo12:.LANCHOR80]
+	adrp	x1, .LANCHOR163
 	ldr	w2, [x0, 36]
-	str	w2, [x1, #:lo12:.LANCHOR160]
-	adrp	x1, .LANCHOR161
+	str	w2, [x1, #:lo12:.LANCHOR163]
+	adrp	x1, .LANCHOR164
 	ldr	w2, [x0, 40]
-	str	w2, [x1, #:lo12:.LANCHOR161]
-	adrp	x1, .LANCHOR166
+	str	w2, [x1, #:lo12:.LANCHOR164]
+	adrp	x1, .LANCHOR169
 	ldr	w2, [x0, 44]
-	str	w2, [x1, #:lo12:.LANCHOR166]
-	adrp	x1, .LANCHOR167
+	str	w2, [x1, #:lo12:.LANCHOR169]
+	adrp	x1, .LANCHOR170
 	ldr	w2, [x0, 48]
-	str	w2, [x1, #:lo12:.LANCHOR167]
+	str	w2, [x1, #:lo12:.LANCHOR170]
 	ldr	w1, [x0, 60]
-	adrp	x0, .LANCHOR155
-	str	w1, [x0, #:lo12:.LANCHOR155]
-.L1913:
-	add	x19, x19, :lo12:.LANCHOR135
-	adrp	x0, .LANCHOR154
-	str	wzr, [x0, #:lo12:.LANCHOR154]
+	adrp	x0, .LANCHOR158
+	str	w1, [x0, #:lo12:.LANCHOR158]
+.L1905:
+	add	x19, x19, :lo12:.LANCHOR138
+	adrp	x0, .LANCHOR157
+	str	wzr, [x0, #:lo12:.LANCHOR157]
 	mov	w0, 34661
 	ldr	w1, [x19, 68]
 	movk	w0, 0x1234, lsl 16
 	cmp	w1, w0
-	bne	.L1914
+	bne	.L1906
 	adrp	x0, .LANCHOR28
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR28]
-	adrp	x1, .LC44
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC44
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC45
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC45
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1914:
-	adrp	x1, .LANCHOR164
-	adrp	x0, .LANCHOR47
+.L1906:
+	adrp	x1, .LANCHOR167
+	adrp	x0, .LANCHOR48
 	ldr	x21, [sp, 32]
-	ldr	w2, [x1, #:lo12:.LANCHOR164]
-	ldrh	w0, [x0, #:lo12:.LANCHOR47]
-	ldr	w1, [x20, #:lo12:.LANCHOR165]
+	ldr	w2, [x1, #:lo12:.LANCHOR167]
+	ldrh	w0, [x0, #:lo12:.LANCHOR48]
+	ldr	w1, [x20, #:lo12:.LANCHOR168]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	madd	w0, w0, w2, w1
-	adrp	x1, .LANCHOR39
-	ldrh	w1, [x1, #:lo12:.LANCHOR39]
+	adrp	x1, .LANCHOR40
+	ldrh	w1, [x1, #:lo12:.LANCHOR40]
 	udiv	w0, w0, w1
-	adrp	x1, .LANCHOR202
-	str	w0, [x1, #:lo12:.LANCHOR202]
+	adrp	x1, .LANCHOR205
+	str	w0, [x1, #:lo12:.LANCHOR205]
 	ret
 	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
 	.section	.text.FtlMapBlkWriteDumpData,"ax",@progbits
@@ -13312,11 +13267,11 @@ Ftl_load_ext_data:
 	.type	FtlMapBlkWriteDumpData, %function
 FtlMapBlkWriteDumpData:
 	ldr	w1, [x0, 56]
-	cbz	w1, .L1930
+	cbz	w1, .L1922
 	stp	x29, x30, [sp, -80]!
-	adrp	x1, .LANCHOR76
+	adrp	x1, .LANCHOR77
 	add	x29, sp, 0
-	ldr	w1, [x1, #:lo12:.LANCHOR76]
+	ldr	w1, [x1, #:lo12:.LANCHOR77]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
@@ -13324,28 +13279,28 @@ FtlMapBlkWriteDumpData:
 	str	x25, [sp, 64]
 	str	wzr, [x0, 56]
 	ldr	x25, [x0, 40]
-	cbnz	w1, .L1916
+	cbnz	w1, .L1908
 	mov	x19, x0
-	adrp	x0, .LANCHOR181
-	adrp	x23, .LANCHOR199
-	add	x21, x23, :lo12:.LANCHOR199
-	ldr	x0, [x0, #:lo12:.LANCHOR181]
+	adrp	x0, .LANCHOR184
+	adrp	x23, .LANCHOR202
+	add	x21, x23, :lo12:.LANCHOR202
+	ldr	x0, [x0, #:lo12:.LANCHOR184]
 	mov	x22, x23
 	str	x0, [x21, 8]
-	adrp	x0, .LANCHOR185
-	ldr	x24, [x0, #:lo12:.LANCHOR185]
+	adrp	x0, .LANCHOR188
+	ldr	x24, [x0, #:lo12:.LANCHOR188]
 	ldrh	w0, [x19, 2]
 	str	x24, [x21, 16]
-	cbz	w0, .L1920
-	adrp	x1, .LANCHOR53
-	ldrh	w1, [x1, #:lo12:.LANCHOR53]
+	cbz	w0, .L1912
+	adrp	x1, .LANCHOR54
+	ldrh	w1, [x1, #:lo12:.LANCHOR54]
 	sub	w1, w1, #1
 	cmp	w0, w1
-	bge	.L1920
+	bge	.L1912
 	ldrh	w1, [x19]
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L1920
+	beq	.L1912
 	ldr	x2, [x19, 16]
 	ubfiz	x1, x1, 1, 16
 	sub	w0, w0, #1
@@ -13356,18 +13311,18 @@ FtlMapBlkWriteDumpData:
 	str	w0, [x21, 4]
 	mov	x0, x21
 	bl	FlashReadPages
-	ldr	w0, [x23, #:lo12:.LANCHOR199]
+	ldr	w0, [x23, #:lo12:.LANCHOR202]
 	cmn	w0, #1
-	beq	.L1920
+	beq	.L1912
 	ldrh	w1, [x24, 8]
 	ldr	x2, [x19, 40]
 	ubfiz	x0, x1, 2, 16
 	ldr	w2, [x2, x0]
 	ldr	w0, [x21, 4]
 	cmp	w2, w0
-	bne	.L1920
+	bne	.L1912
 	ldr	x2, [x21, 8]
-.L1933:
+.L1925:
 	mov	x0, x19
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -13375,37 +13330,37 @@ FtlMapBlkWriteDumpData:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	b	FtlMapWritePage
-.L1920:
+.L1912:
 	sub	w20, w20, #1
 	and	w20, w20, 65535
 	ubfiz	x0, x20, 2, 16
 	ldr	w1, [x25, x0]
-	add	x0, x22, :lo12:.LANCHOR199
+	add	x0, x22, :lo12:.LANCHOR202
 	str	w1, [x0, 4]
-	cbz	w1, .L1921
+	cbz	w1, .L1913
 	mov	w2, 1
 	mov	w1, w2
 	bl	FlashReadPages
-.L1922:
-	add	x22, x22, :lo12:.LANCHOR199
+.L1914:
+	add	x22, x22, :lo12:.LANCHOR202
 	mov	w1, w20
 	ldr	x2, [x22, 8]
-	b	.L1933
-.L1921:
-	adrp	x1, .LANCHOR57
+	b	.L1925
+.L1913:
+	adrp	x1, .LANCHOR58
 	ldr	x0, [x0, 8]
-	ldrh	w2, [x1, #:lo12:.LANCHOR57]
+	ldrh	w2, [x1, #:lo12:.LANCHOR58]
 	mov	w1, 255
 	bl	ftl_memset
-	b	.L1922
-.L1916:
+	b	.L1914
+.L1908:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1930:
+.L1922:
 	ret
 	.size	FtlMapBlkWriteDumpData, .-FtlMapBlkWriteDumpData
 	.section	.text.FtlScanSysBlk,"ax",@progbits
@@ -13417,84 +13372,84 @@ FtlScanSysBlk:
 	mov	w1, 0
 	add	x29, sp, 0
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR127
+	adrp	x25, .LANCHOR130
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR64
-	ldr	x0, [x25, #:lo12:.LANCHOR127]
-	adrp	x22, .LANCHOR190
-	ldr	w2, [x21, #:lo12:.LANCHOR64]
+	adrp	x21, .LANCHOR65
+	ldr	x0, [x25, #:lo12:.LANCHOR130]
+	adrp	x22, .LANCHOR193
+	ldr	w2, [x21, #:lo12:.LANCHOR65]
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR125
+	adrp	x20, .LANCHOR128
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR70
+	adrp	x23, .LANCHOR71
 	stp	x27, x28, [sp, 80]
-	adrp	x27, .LANCHOR126
+	adrp	x27, .LANCHOR129
 	lsl	w2, w2, 2
-	strh	wzr, [x20, #:lo12:.LANCHOR125]
-	strh	wzr, [x23, #:lo12:.LANCHOR70]
+	strh	wzr, [x20, #:lo12:.LANCHOR128]
+	strh	wzr, [x23, #:lo12:.LANCHOR71]
 	bl	ftl_memset
-	ldr	x0, [x27, #:lo12:.LANCHOR126]
+	ldr	x0, [x27, #:lo12:.LANCHOR129]
 	mov	w1, 0
-	ldr	w2, [x21, #:lo12:.LANCHOR64]
-	adrp	x19, .LANCHOR61
-	adrp	x28, .LANCHOR71
-	adrp	x24, .LANCHOR206
+	ldr	w2, [x21, #:lo12:.LANCHOR65]
+	adrp	x19, .LANCHOR62
+	adrp	x28, .LANCHOR72
+	adrp	x24, .LANCHOR209
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	ldr	x0, [x22, #:lo12:.LANCHOR190]
+	ldr	x0, [x22, #:lo12:.LANCHOR193]
 	mov	w1, 0
-	ldrh	w2, [x19, #:lo12:.LANCHOR61]
+	ldrh	w2, [x19, #:lo12:.LANCHOR62]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	ldr	x0, [x28, #:lo12:.LANCHOR71]
+	ldr	x0, [x28, #:lo12:.LANCHOR72]
 	mov	w1, 0
-	ldrh	w2, [x19, #:lo12:.LANCHOR61]
+	ldrh	w2, [x19, #:lo12:.LANCHOR62]
 	lsl	w2, w2, 1
 	bl	ftl_memset
 	mov	w2, 12
 	mov	w1, 255
-	add	x0, x24, :lo12:.LANCHOR206
+	add	x0, x24, :lo12:.LANCHOR209
 	bl	ftl_memset
-	adrp	x0, .LANCHOR39
+	adrp	x0, .LANCHOR40
 	stp	x22, x25, [x29, 144]
 	str	x27, [x29, 160]
-	ldrh	w0, [x0, #:lo12:.LANCHOR39]
+	ldrh	w0, [x0, #:lo12:.LANCHOR40]
 	str	w0, [x29, 172]
-	adrp	x0, .LANCHOR40
-	add	x0, x0, :lo12:.LANCHOR40
+	adrp	x0, .LANCHOR41
+	add	x0, x0, :lo12:.LANCHOR41
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR156
-	add	x0, x0, :lo12:.LANCHOR156
+	adrp	x0, .LANCHOR159
+	add	x0, x0, :lo12:.LANCHOR159
 	str	x0, [x29, 112]
-.L1935:
+.L1927:
 	ldr	x0, [x29, 120]
 	ldr	w1, [x29, 172]
 	ldrh	w0, [x0]
 	cmp	w0, w1
-	bls	.L1976
-	adrp	x0, .LANCHOR37
-	adrp	x25, .LANCHOR177
-	adrp	x6, .LANCHOR46
+	bls	.L1968
+	adrp	x0, .LANCHOR38
+	adrp	x25, .LANCHOR180
+	adrp	x6, .LANCHOR47
 	mov	x5, 0
-	ldrh	w13, [x0, #:lo12:.LANCHOR37]
-	adrp	x0, .LANCHOR104
-	ldr	x7, [x25, #:lo12:.LANCHOR177]
-	mov	w22, 0
-	ldr	x12, [x0, #:lo12:.LANCHOR104]
+	ldrh	w13, [x0, #:lo12:.LANCHOR38]
 	adrp	x0, .LANCHOR105
-	add	x6, x6, :lo12:.LANCHOR46
+	ldr	x7, [x25, #:lo12:.LANCHOR180]
+	mov	w22, 0
+	ldr	x12, [x0, #:lo12:.LANCHOR105]
+	adrp	x0, .LANCHOR106
+	add	x6, x6, :lo12:.LANCHOR47
 	mov	w8, 56
-	ldr	x11, [x0, #:lo12:.LANCHOR105]
-	adrp	x0, .LANCHOR58
-	ldrh	w10, [x0, #:lo12:.LANCHOR58]
-	b	.L1977
-.L1937:
+	ldr	x11, [x0, #:lo12:.LANCHOR106]
+	adrp	x0, .LANCHOR59
+	ldrh	w10, [x0, #:lo12:.LANCHOR59]
+	b	.L1969
+.L1929:
 	ldrh	w1, [x29, 172]
 	ldrb	w0, [x6, x5]
 	bl	V2P_block
 	and	w4, w0, 65535
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L1936
+	cbnz	w0, .L1928
 	umaddl	x1, w22, w8, x7
 	lsl	w4, w4, 10
 	mul	w0, w22, w10
@@ -13504,19 +13459,19 @@ FtlScanSysBlk:
 	str	w4, [x1, 4]
 	add	x0, x11, x0, sxtw 2
 	stp	x12, x0, [x1, 8]
-.L1936:
+.L1928:
 	add	x5, x5, 1
-.L1977:
+.L1969:
 	cmp	w13, w5, uxth
-	bhi	.L1937
-	cbnz	w22, .L1938
-.L1975:
+	bhi	.L1929
+	cbnz	w22, .L1930
+.L1967:
 	ldr	w0, [x29, 172]
 	add	w26, w0, 1
 	and	w0, w26, 65535
 	str	w0, [x29, 172]
-	b	.L1935
-.L1938:
+	b	.L1927
+.L1930:
 	mov	w1, w22
 	mov	w2, 1
 	mov	x0, x7
@@ -13525,23 +13480,23 @@ FtlScanSysBlk:
 	umull	x0, w22, w0
 	mov	x22, 0
 	str	x0, [x29, 128]
-	adrp	x0, .LANCHOR224
-	add	x0, x0, :lo12:.LANCHOR224
+	adrp	x0, .LANCHOR220
+	add	x0, x0, :lo12:.LANCHOR220
 	str	x0, [x29, 136]
-.L1974:
-	ldr	x0, [x25, #:lo12:.LANCHOR177]
+.L1966:
+	ldr	x0, [x25, #:lo12:.LANCHOR180]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
 	ldr	w3, [x1, 4]
 	cmn	w0, #1
 	ldr	x27, [x1, 16]
 	ubfx	x26, x3, 10, 16
-	bne	.L1941
+	bne	.L1933
 	mov	w5, 16
 	mov	w7, 65535
-.L1943:
-	ldr	x0, [x25, #:lo12:.LANCHOR177]
-	add	x6, x25, :lo12:.LANCHOR177
+.L1935:
+	ldr	x0, [x25, #:lo12:.LANCHOR180]
+	add	x6, x25, :lo12:.LANCHOR180
 	mov	w2, 1
 	str	w7, [x29, 100]
 	add	x0, x0, x22
@@ -13557,137 +13512,137 @@ FtlScanSysBlk:
 	ldr	w5, [x29, 168]
 	cmp	w0, w7
 	ldr	x6, [x29, 104]
-	bne	.L1940
+	bne	.L1932
 	ldr	x0, [x6]
 	mov	w1, -1
 	str	w1, [x0, x22]
 	ldr	x0, [x6]
 	ldr	w0, [x0, x22]
 	cmp	w0, w1
-	beq	.L2013
-.L1941:
-	adrp	x0, .LANCHOR156
-	ldr	w1, [x0, #:lo12:.LANCHOR156]
+	beq	.L2005
+.L1933:
+	adrp	x0, .LANCHOR159
+	ldr	w1, [x0, #:lo12:.LANCHOR159]
 	ldr	w0, [x27, 4]
 	cmn	w1, #1
-	beq	.L1944
+	beq	.L1936
 	cmp	w1, w0
-	bhi	.L1945
-.L1944:
+	bhi	.L1937
+.L1936:
 	cmn	w0, #1
-	beq	.L1945
+	beq	.L1937
 	ldr	x2, [x29, 112]
 	add	w1, w0, 1
 	str	w1, [x2]
-.L1945:
+.L1937:
 	ldrh	w1, [x27]
 	mov	w2, 61604
 	cmp	w1, w2
-	beq	.L1947
-	bhi	.L1948
+	beq	.L1939
+	bhi	.L1940
 	mov	w0, 61574
 	cmp	w1, w0
-	beq	.L1949
-.L1946:
+	beq	.L1941
+.L1938:
 	ldr	x0, [x29, 128]
 	add	x22, x22, 56
 	cmp	x0, x22
-	bne	.L1974
-	b	.L1975
-.L1940:
-	ldr	x0, [x25, #:lo12:.LANCHOR177]
+	bne	.L1966
+	b	.L1967
+.L1932:
+	ldr	x0, [x25, #:lo12:.LANCHOR180]
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	bne	.L1941
+	bne	.L1933
 	sub	w5, w5, #1
 	ands	w5, w5, 65535
-	bne	.L1943
-.L2013:
+	bne	.L1935
+.L2005:
 	mov	w1, 0
 	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-	b	.L1946
-.L1948:
+	b	.L1938
+.L1940:
 	mov	w0, 61634
 	cmp	w1, w0
-	beq	.L1950
+	beq	.L1942
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L2013
-	b	.L1946
-.L1950:
-	ldrh	w1, [x20, #:lo12:.LANCHOR125]
-	ldr	w0, [x21, #:lo12:.LANCHOR64]
+	beq	.L2005
+	b	.L1938
+.L1942:
+	ldrh	w1, [x20, #:lo12:.LANCHOR128]
+	ldr	w0, [x21, #:lo12:.LANCHOR65]
 	cmp	w1, w0
-	bls	.L1952
+	bls	.L1944
 	ldr	x1, [x29, 136]
-	mov	w2, 1302
-	adrp	x0, .LC6
-	add	x0, x0, :lo12:.LC6
+	mov	w2, 1308
+	adrp	x0, .LC5
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1952:
-	ldr	w6, [x21, #:lo12:.LANCHOR64]
+.L1944:
+	ldr	w6, [x21, #:lo12:.LANCHOR65]
 	ldr	x3, [x29, 152]
-	ldrh	w1, [x20, #:lo12:.LANCHOR125]
+	ldrh	w1, [x20, #:lo12:.LANCHOR128]
 	and	w2, w6, 65535
 	sub	w0, w2, #1
 	sub	w2, w2, w1
 	sxth	x0, w0
 	sub	w2, w2, #1
-	ldr	x5, [x3, #:lo12:.LANCHOR127]
+	ldr	x5, [x3, #:lo12:.LANCHOR130]
 	sxth	w2, w2
-.L1953:
+.L1945:
 	cmp	w0, w2
-	bgt	.L1959
-	tbz	w0, #31, .L1994
-	b	.L1946
-.L1959:
+	bgt	.L1951
+	tbz	w0, #31, .L1986
+	b	.L1938
+.L1951:
 	sxtw	x8, w0
 	ldr	w11, [x27, 4]
 	lsl	x7, x8, 2
 	add	x10, x5, x7
 	ldr	w7, [x5, x7]
 	cmp	w11, w7
-	bls	.L1954
+	bls	.L1946
 	ldr	w2, [x5]
-	cbnz	w2, .L1955
+	cbnz	w2, .L1947
 	cmp	w6, w1
-	beq	.L1955
+	beq	.L1947
 	add	w1, w1, 1
-	strh	w1, [x20, #:lo12:.LANCHOR125]
-.L1955:
+	strh	w1, [x20, #:lo12:.LANCHOR128]
+.L1947:
 	ldr	x1, [x29, 160]
-	ldr	x6, [x1, #:lo12:.LANCHOR126]
+	ldr	x6, [x1, #:lo12:.LANCHOR129]
 	mov	w1, 0
-.L1956:
+.L1948:
 	cmp	w1, w0
-	bne	.L1957
+	bne	.L1949
 	ldr	w1, [x27, 4]
 	str	w1, [x10]
 	strh	w26, [x6, x8, lsl 1]
-	tbnz	w0, #31, .L1946
-	ldrh	w1, [x20, #:lo12:.LANCHOR125]
-	ldr	w2, [x21, #:lo12:.LANCHOR64]
+	tbnz	w0, #31, .L1938
+	ldrh	w1, [x20, #:lo12:.LANCHOR128]
+	ldr	w2, [x21, #:lo12:.LANCHOR65]
 	sub	w2, w2, w1
 	sub	w2, w2, #1
 	cmp	w0, w2, sxth
-	bgt	.L1946
-.L1994:
+	bgt	.L1938
+.L1986:
 	add	w1, w1, 1
-	strh	w1, [x20, #:lo12:.LANCHOR125]
+	strh	w1, [x20, #:lo12:.LANCHOR128]
 	ldr	w1, [x27, 4]
 	str	w1, [x5, x0, lsl 2]
 	ldr	x1, [x29, 160]
-	ldr	x1, [x1, #:lo12:.LANCHOR126]
-.L2012:
+	ldr	x1, [x1, #:lo12:.LANCHOR129]
+.L2004:
 	strh	w26, [x1, x0, lsl 1]
-	b	.L1946
-.L1957:
+	b	.L1938
+.L1949:
 	sxtw	x2, w1
 	add	w1, w1, 1
 	lsl	x7, x2, 2
@@ -13699,74 +13654,74 @@ FtlScanSysBlk:
 	add	x7, x6, x2
 	ldrh	w7, [x7, 2]
 	strh	w7, [x6, x2]
-	b	.L1956
-.L1954:
+	b	.L1948
+.L1946:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L1953
-.L1949:
-	ldrh	w1, [x23, #:lo12:.LANCHOR70]
-	ldrh	w0, [x19, #:lo12:.LANCHOR61]
+	b	.L1945
+.L1941:
+	ldrh	w1, [x23, #:lo12:.LANCHOR71]
+	ldrh	w0, [x19, #:lo12:.LANCHOR62]
 	cmp	w1, w0
-	bls	.L1962
+	bls	.L1954
 	ldr	x1, [x29, 136]
-	mov	w2, 1349
-	adrp	x0, .LC6
-	add	x0, x0, :lo12:.LC6
+	mov	w2, 1355
+	adrp	x0, .LC5
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1962:
-	ldrh	w6, [x19, #:lo12:.LANCHOR61]
-	ldrh	w2, [x23, #:lo12:.LANCHOR70]
+.L1954:
+	ldrh	w6, [x19, #:lo12:.LANCHOR62]
+	ldrh	w2, [x23, #:lo12:.LANCHOR71]
 	sub	w1, w6, #1
 	sxth	x0, w1
 	sub	w5, w1, w2
 	ldr	x1, [x29, 144]
-	ldr	x1, [x1, #:lo12:.LANCHOR190]
-.L1963:
+	ldr	x1, [x1, #:lo12:.LANCHOR193]
+.L1955:
 	cmp	w0, w5
-	ble	.L1968
+	ble	.L1960
 	sxtw	x7, w0
 	ldr	w11, [x27, 4]
 	lsl	x8, x7, 2
 	add	x10, x1, x8
 	ldr	w8, [x1, x8]
 	cmp	w11, w8
-	bls	.L1964
+	bls	.L1956
 	ldr	w5, [x1]
-	cbnz	w5, .L1965
+	cbnz	w5, .L1957
 	cmp	w6, w2
-	beq	.L1965
+	beq	.L1957
 	add	w2, w2, 1
-	strh	w2, [x23, #:lo12:.LANCHOR70]
-.L1965:
-	ldr	x6, [x28, #:lo12:.LANCHOR71]
+	strh	w2, [x23, #:lo12:.LANCHOR71]
+.L1957:
+	ldr	x6, [x28, #:lo12:.LANCHOR72]
 	mov	w2, 0
-.L1966:
+.L1958:
 	cmp	w2, w0
-	bne	.L1967
+	bne	.L1959
 	ldr	w2, [x27, 4]
 	str	w2, [x10]
 	strh	w26, [x6, x7, lsl 1]
-.L1968:
-	tbnz	w0, #31, .L1946
-	ldrh	w2, [x19, #:lo12:.LANCHOR61]
-	ldrh	w5, [x23, #:lo12:.LANCHOR70]
+.L1960:
+	tbnz	w0, #31, .L1938
+	ldrh	w2, [x19, #:lo12:.LANCHOR62]
+	ldrh	w5, [x23, #:lo12:.LANCHOR71]
 	sub	w2, w2, #1
 	sub	w2, w2, w5
 	cmp	w0, w2, sxth
-	bgt	.L1946
+	bgt	.L1938
 	add	w5, w5, 1
 	ldr	w2, [x27, 4]
-	strh	w5, [x23, #:lo12:.LANCHOR70]
+	strh	w5, [x23, #:lo12:.LANCHOR71]
 	str	w2, [x1, x0, lsl 2]
-	ldr	x1, [x28, #:lo12:.LANCHOR71]
-	b	.L2012
-.L1967:
+	ldr	x1, [x28, #:lo12:.LANCHOR72]
+	b	.L2004
+.L1959:
 	sxtw	x5, w2
 	add	w2, w2, 1
 	lsl	x8, x5, 2
@@ -13778,66 +13733,66 @@ FtlScanSysBlk:
 	add	x8, x6, x5
 	ldrh	w8, [x8, 2]
 	strh	w8, [x6, x5]
-	b	.L1966
-.L1964:
+	b	.L1958
+.L1956:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L1963
-.L1947:
-	ldrh	w5, [x24, #:lo12:.LANCHOR206]
+	b	.L1955
+.L1939:
+	ldrh	w5, [x24, #:lo12:.LANCHOR209]
 	mov	w1, 65535
-	add	x2, x24, :lo12:.LANCHOR206
+	add	x2, x24, :lo12:.LANCHOR209
 	cmp	w5, w1
-	bne	.L1970
-	strh	w26, [x24, #:lo12:.LANCHOR206]
+	bne	.L1962
+	strh	w26, [x24, #:lo12:.LANCHOR209]
 	str	w0, [x2, 8]
-	b	.L1946
-.L1970:
+	b	.L1938
+.L1962:
 	ldrh	w0, [x2, 4]
 	cmp	w0, w1
-	beq	.L1971
+	beq	.L1963
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.L1971:
-	add	x0, x24, :lo12:.LANCHOR206
+.L1963:
+	add	x0, x24, :lo12:.LANCHOR209
 	ldr	w1, [x27, 4]
 	ldr	w2, [x0, 8]
 	cmp	w2, w1
-	bcs	.L1972
-	ldrh	w2, [x24, #:lo12:.LANCHOR206]
+	bcs	.L1964
+	ldrh	w2, [x24, #:lo12:.LANCHOR209]
 	strh	w2, [x0, 4]
-	strh	w26, [x24, #:lo12:.LANCHOR206]
+	strh	w26, [x24, #:lo12:.LANCHOR209]
 	str	w1, [x0, 8]
-	b	.L1946
-.L1972:
+	b	.L1938
+.L1964:
 	strh	w26, [x0, 4]
-	b	.L1946
-.L1976:
+	b	.L1938
+.L1968:
 	ldr	x0, [x29, 160]
-	ldr	x2, [x0, #:lo12:.LANCHOR126]
+	ldr	x2, [x0, #:lo12:.LANCHOR129]
 	ldrh	w0, [x2]
-	cbz	w0, .L1978
-.L1981:
-	ldr	x1, [x28, #:lo12:.LANCHOR71]
+	cbz	w0, .L1970
+.L1973:
+	ldr	x1, [x28, #:lo12:.LANCHOR72]
 	ldrh	w0, [x1]
-	cbz	w0, .L1979
-.L1980:
-	ldrh	w1, [x20, #:lo12:.LANCHOR125]
-	ldr	w0, [x21, #:lo12:.LANCHOR64]
+	cbz	w0, .L1971
+.L1972:
+	ldrh	w1, [x20, #:lo12:.LANCHOR128]
+	ldr	w0, [x21, #:lo12:.LANCHOR65]
 	cmp	w1, w0
-	bls	.L2010
-	mov	w2, 1483
-	adrp	x1, .LANCHOR224
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR224
-	add	x0, x0, :lo12:.LC6
+	bls	.L2002
+	mov	w2, 1489
+	adrp	x1, .LANCHOR220
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR220
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2010:
+.L2002:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -13846,24 +13801,24 @@ FtlScanSysBlk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1978:
-	ldrh	w0, [x20, #:lo12:.LANCHOR125]
-	cbz	w0, .L1981
-	ldr	w1, [x21, #:lo12:.LANCHOR64]
+.L1970:
+	ldrh	w0, [x20, #:lo12:.LANCHOR128]
+	cbz	w0, .L1973
+	ldr	w1, [x21, #:lo12:.LANCHOR65]
 	mov	w0, 0
-.L1982:
+.L1974:
 	cmp	w0, w1
-	bcs	.L1981
+	bcs	.L1973
 	ldrh	w3, [x2, w0, sxtw 1]
-	cbz	w3, .L1983
+	cbz	w3, .L1975
 	ldr	x1, [x29, 152]
-	add	x7, x21, :lo12:.LANCHOR64
-	ldr	x4, [x1, #:lo12:.LANCHOR127]
+	add	x7, x21, :lo12:.LANCHOR65
+	ldr	x4, [x1, #:lo12:.LANCHOR130]
 	mov	w1, w0
-.L1984:
+.L1976:
 	ldr	w3, [x7]
 	cmp	w1, w3
-	bcs	.L1981
+	bcs	.L1973
 	sxtw	x6, w1
 	sub	w3, w1, w0
 	lsl	x5, x6, 1
@@ -13875,29 +13830,29 @@ FtlScanSysBlk:
 	strh	w8, [x2, x3, lsl 1]
 	str	w6, [x4, x3, lsl 2]
 	strh	wzr, [x2, x5]
-	b	.L1984
-.L1983:
+	b	.L1976
+.L1975:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L1982
-.L1979:
-	ldrh	w0, [x23, #:lo12:.LANCHOR70]
-	cbz	w0, .L1980
-	ldrh	w2, [x19, #:lo12:.LANCHOR61]
+	b	.L1974
+.L1971:
+	ldrh	w0, [x23, #:lo12:.LANCHOR71]
+	cbz	w0, .L1972
+	ldrh	w2, [x19, #:lo12:.LANCHOR62]
 	mov	w0, 0
-.L1989:
+.L1981:
 	mov	w6, w0
 	cmp	w0, w2
-	bge	.L1980
+	bge	.L1972
 	ldrh	w3, [x1, w0, sxtw 1]
-	cbz	w3, .L1990
+	cbz	w3, .L1982
 	ldr	x2, [x29, 144]
-	add	x19, x19, :lo12:.LANCHOR61
-	ldr	x3, [x2, #:lo12:.LANCHOR190]
-.L1991:
+	add	x19, x19, :lo12:.LANCHOR62
+	ldr	x3, [x2, #:lo12:.LANCHOR193]
+.L1983:
 	ldrh	w2, [x19]
 	cmp	w0, w2
-	bge	.L1980
+	bge	.L1972
 	sxtw	x5, w0
 	sub	w2, w0, w6
 	lsl	x4, x5, 1
@@ -13909,11 +13864,11 @@ FtlScanSysBlk:
 	strh	w7, [x1, x2, lsl 1]
 	str	w5, [x3, x2, lsl 2]
 	strh	wzr, [x1, x4]
-	b	.L1991
-.L1990:
+	b	.L1983
+.L1982:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L1989
+	b	.L1981
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
 	.section	.text.FtlLoadSysInfo,"ax",@progbits
 	.align	2
@@ -13924,29 +13879,32 @@ FtlLoadSysInfo:
 	mov	w1, 0
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR206
+	adrp	x19, .LANCHOR202
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR199
+	add	x20, x19, :lo12:.LANCHOR202
+	adrp	x24, .LANCHOR183
 	stp	x25, x26, [sp, 64]
-	add	x19, x23, :lo12:.LANCHOR199
-	adrp	x25, .LANCHOR185
-	adrp	x24, .LANCHOR83
+	adrp	x26, .LANCHOR188
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR39
-	ldr	x0, [x25, #:lo12:.LANCHOR185]
 	stp	x27, x28, [sp, 80]
-	stp	xzr, x0, [x19, 8]
-	ldr	x0, [x24, #:lo12:.LANCHOR83]
-	ldrh	w2, [x21, #:lo12:.LANCHOR39]
+	adrp	x25, .LANCHOR84
+	ldr	x0, [x24, #:lo12:.LANCHOR183]
+	adrp	x22, .LANCHOR40
+	str	x0, [x20, 8]
+	adrp	x21, .LANCHOR209
+	ldr	x0, [x26, #:lo12:.LANCHOR188]
+	str	x0, [x20, 16]
+	ldr	x0, [x25, #:lo12:.LANCHOR84]
+	ldrh	w2, [x22, #:lo12:.LANCHOR40]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	ldrh	w0, [x20, #:lo12:.LANCHOR206]
+	ldrh	w0, [x21, #:lo12:.LANCHOR209]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L2015
-.L2024:
+	bne	.L2007
+.L2016:
 	mov	w0, -1
-.L2014:
+.L2006:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -13954,63 +13912,62 @@ FtlLoadSysInfo:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2015:
-	add	x26, x20, :lo12:.LANCHOR206
-	mov	w27, 19539
+.L2007:
+	add	x27, x21, :lo12:.LANCHOR209
 	mov	w1, 1
-	movk	w27, 0x4654, lsl 16
 	bl	FtlGetLastWrittenPage
-	mov	w28, 61604
-	sxth	w22, w0
+	sxth	w23, w0
 	add	w0, w0, 1
-	strh	w0, [x26, 2]
-	adrp	x26, .LANCHOR180
-.L2017:
-	tbz	w22, #31, .L2020
-	mov	w2, 1543
-	adrp	x1, .LANCHOR225
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR225
-	add	x0, x0, :lo12:.LC6
+	mov	w28, 61604
+	strh	w0, [x27, 2]
+	mov	w27, 19539
+	movk	w27, 0x4654, lsl 16
+.L2009:
+	tbz	w23, #31, .L2012
+	mov	w2, 1549
+	adrp	x1, .LANCHOR221
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR221
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2019:
-	adrp	x1, .LANCHOR57
-	ldrh	w0, [x21, #:lo12:.LANCHOR39]
-	ldrh	w1, [x1, #:lo12:.LANCHOR57]
+.L2011:
+	adrp	x1, .LANCHOR58
+	ldrh	w0, [x22, #:lo12:.LANCHOR40]
+	ldrh	w1, [x1, #:lo12:.LANCHOR58]
 	add	x0, x0, 24
 	cmp	x1, x0, lsl 1
-	bcs	.L2022
-	mov	w2, 1545
-	adrp	x1, .LANCHOR225
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR225
-	add	x0, x0, :lo12:.LC6
+	bcs	.L2014
+	mov	w2, 1551
+	adrp	x1, .LANCHOR221
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR221
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2022:
-	add	x23, x23, :lo12:.LANCHOR199
+.L2014:
+	add	x19, x19, :lo12:.LANCHOR202
 	mov	w2, 48
-	adrp	x19, .LANCHOR80
-	add	x0, x19, :lo12:.LANCHOR80
-	ldr	x1, [x23, 8]
+	adrp	x20, .LANCHOR81
+	add	x0, x20, :lo12:.LANCHOR81
+	ldr	x1, [x19, 8]
 	bl	ftl_memcpy
-	ldr	x0, [x24, #:lo12:.LANCHOR83]
-	ldrh	w2, [x21, #:lo12:.LANCHOR39]
-	ldr	x1, [x23, 8]
+	ldr	x0, [x25, #:lo12:.LANCHOR84]
+	ldrh	w2, [x22, #:lo12:.LANCHOR40]
+	ldr	x1, [x19, 8]
 	lsl	w2, w2, 1
 	add	x1, x1, 48
 	bl	ftl_memcpy
-	ldrh	w1, [x21, #:lo12:.LANCHOR39]
-	ldr	x0, [x23, 8]
+	ldrh	w1, [x22, #:lo12:.LANCHOR40]
+	ldr	x0, [x19, 8]
 	lsr	w2, w1, 3
 	ubfiz	x1, x1, 1, 16
 	add	x1, x1, 48
@@ -14020,312 +13977,580 @@ FtlLoadSysInfo:
 	adrp	x0, .LANCHOR0
 	ldr	x0, [x0, #:lo12:.LANCHOR0]
 	bl	ftl_memcpy
-	adrp	x0, .LANCHOR69
-	ldrh	w0, [x0, #:lo12:.LANCHOR69]
-	cbz	w0, .L2023
-	ldrh	w1, [x21, #:lo12:.LANCHOR39]
-	adrp	x0, .LANCHOR66
-	ldrh	w2, [x0, #:lo12:.LANCHOR66]
+	adrp	x0, .LANCHOR70
+	ldrh	w0, [x0, #:lo12:.LANCHOR70]
+	cbz	w0, .L2015
+	ldrh	w1, [x22, #:lo12:.LANCHOR40]
+	adrp	x0, .LANCHOR67
+	ldrh	w2, [x0, #:lo12:.LANCHOR67]
 	lsr	w0, w1, 3
 	add	w1, w0, w1, lsl 1
-	ldr	x0, [x23, 8]
+	ldr	x0, [x19, 8]
 	add	w1, w1, 52
 	lsl	w2, w2, 2
 	and	x1, x1, 65532
 	add	x1, x0, x1
-	adrp	x0, .LANCHOR192
-	ldr	x0, [x0, #:lo12:.LANCHOR192]
+	adrp	x0, .LANCHOR195
+	ldr	x0, [x0, #:lo12:.LANCHOR195]
 	bl	ftl_memcpy
-.L2023:
-	ldr	w2, [x19, #:lo12:.LANCHOR80]
+.L2015:
+	ldr	w2, [x20, #:lo12:.LANCHOR81]
 	mov	w1, 19539
 	movk	w1, 0x4654, lsl 16
-	add	x0, x19, :lo12:.LANCHOR80
+	add	x0, x20, :lo12:.LANCHOR81
 	cmp	w2, w1
-	bne	.L2024
-	add	x20, x20, :lo12:.LANCHOR206
+	bne	.L2016
+	add	x21, x21, :lo12:.LANCHOR209
 	ldrh	w1, [x0, 8]
 	ldrb	w2, [x0, 10]
-	adrp	x0, .LANCHOR44
-	strh	w1, [x20, 6]
-	ldrh	w0, [x0, #:lo12:.LANCHOR44]
+	adrp	x0, .LANCHOR45
+	strh	w1, [x21, 6]
+	ldrh	w0, [x0, #:lo12:.LANCHOR45]
 	cmp	w2, w0
-	bne	.L2024
-	adrp	x0, .LANCHOR226
-	adrp	x2, .LANCHOR72
-	adrp	x3, .LANCHOR37
-	str	w1, [x0, #:lo12:.LANCHOR226]
-	adrp	x0, .LANCHOR52
-	ldrh	w3, [x3, #:lo12:.LANCHOR37]
-	ldrh	w0, [x0, #:lo12:.LANCHOR52]
+	bne	.L2016
+	adrp	x0, .LANCHOR222
+	adrp	x2, .LANCHOR73
+	adrp	x3, .LANCHOR38
+	str	w1, [x0, #:lo12:.LANCHOR222]
+	adrp	x0, .LANCHOR53
+	ldrh	w3, [x3, #:lo12:.LANCHOR38]
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	mul	w0, w0, w1
-	str	w0, [x2, #:lo12:.LANCHOR72]
-	adrp	x2, .LANCHOR55
-	ldrh	w2, [x2, #:lo12:.LANCHOR55]
+	str	w0, [x2, #:lo12:.LANCHOR73]
+	adrp	x2, .LANCHOR56
+	ldrh	w2, [x2, #:lo12:.LANCHOR56]
 	mul	w0, w2, w0
-	adrp	x2, .LANCHOR68
-	str	w0, [x2, #:lo12:.LANCHOR68]
-	adrp	x0, .LANCHOR41
-	ldr	w2, [x0, #:lo12:.LANCHOR41]
-	adrp	x0, .LANCHOR74+6
-	ldrh	w0, [x0, #:lo12:.LANCHOR74+6]
+	adrp	x2, .LANCHOR69
+	str	w0, [x2, #:lo12:.LANCHOR69]
+	adrp	x0, .LANCHOR42
+	ldr	w2, [x0, #:lo12:.LANCHOR42]
+	adrp	x0, .LANCHOR75+6
+	ldrh	w0, [x0, #:lo12:.LANCHOR75+6]
 	cmp	w1, w2
 	sub	w0, w2, w0
 	sub	w0, w0, w1
 	udiv	w0, w0, w3
-	adrp	x3, .LANCHOR227
-	strh	w0, [x3, #:lo12:.LANCHOR227]
-	bls	.L2025
-	mov	w2, 1572
-	adrp	x1, .LANCHOR225
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR225
-	add	x0, x0, :lo12:.LC6
+	adrp	x3, .LANCHOR223
+	strh	w0, [x3, #:lo12:.LANCHOR223]
+	bls	.L2017
+	mov	w2, 1578
+	adrp	x1, .LANCHOR221
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR221
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2025:
-	add	x1, x19, :lo12:.LANCHOR80
-	adrp	x0, .LANCHOR91
-	add	x3, x0, :lo12:.LANCHOR91
-	adrp	x5, .LANCHOR201
-	mov	x22, x5
+.L2017:
+	add	x1, x20, :lo12:.LANCHOR81
+	adrp	x0, .LANCHOR92
+	add	x3, x0, :lo12:.LANCHOR92
+	adrp	x19, .LANCHOR204
 	ldrh	w2, [x1, 16]
-	ldrh	w7, [x1, 14]
-	strh	w7, [x0, #:lo12:.LANCHOR91]
+	ldrh	w6, [x1, 14]
+	strh	w6, [x0, #:lo12:.LANCHOR92]
 	lsr	w4, w2, 6
 	and	w2, w2, 63
 	strb	w2, [x3, 6]
 	ldrb	w2, [x1, 11]
 	strb	w2, [x3, 8]
-	add	x2, x5, :lo12:.LANCHOR201
+	add	x2, x19, :lo12:.LANCHOR204
 	strh	w4, [x3, 2]
 	mov	w3, -1
-	strh	w3, [x5, #:lo12:.LANCHOR201]
+	strh	w3, [x19, #:lo12:.LANCHOR204]
 	strh	wzr, [x2, 2]
 	strb	wzr, [x2, 6]
 	strb	wzr, [x2, 8]
-	adrp	x2, .LANCHOR92
+	adrp	x2, .LANCHOR93
 	ldrh	w3, [x1, 18]
-	add	x4, x2, :lo12:.LANCHOR92
-	strh	w3, [x2, #:lo12:.LANCHOR92]
-	mov	x20, x2
+	add	x4, x2, :lo12:.LANCHOR93
+	strh	w3, [x2, #:lo12:.LANCHOR93]
+	mov	x21, x2
 	ldrh	w3, [x1, 20]
-	lsr	w6, w3, 6
+	lsr	w5, w3, 6
 	and	w3, w3, 63
 	strb	w3, [x4, 6]
 	ldrb	w3, [x1, 12]
-	strh	w6, [x4, 2]
+	strh	w5, [x4, 2]
 	strb	w3, [x4, 8]
-	adrp	x4, .LANCHOR93
+	adrp	x4, .LANCHOR94
 	ldrh	w3, [x1, 22]
-	add	x6, x4, :lo12:.LANCHOR93
-	strh	w3, [x4, #:lo12:.LANCHOR93]
-	mov	x21, x4
+	add	x5, x4, :lo12:.LANCHOR94
+	strh	w3, [x4, #:lo12:.LANCHOR94]
+	mov	x22, x4
 	ldrh	w3, [x1, 24]
-	lsr	w8, w3, 6
+	lsr	w7, w3, 6
 	and	w3, w3, 63
-	strb	w3, [x6, 6]
+	strb	w3, [x5, 6]
 	ldrb	w3, [x1, 13]
-	strb	w3, [x6, 8]
-	adrp	x3, .LANCHOR158
-	strh	w8, [x6, 2]
-	ldr	w6, [x1, 32]
-	str	wzr, [x3, #:lo12:.LANCHOR158]
-	adrp	x3, .LANCHOR159
-	str	wzr, [x3, #:lo12:.LANCHOR159]
-	adrp	x3, .LANCHOR163
-	str	wzr, [x3, #:lo12:.LANCHOR163]
+	strb	w3, [x5, 8]
+	adrp	x3, .LANCHOR161
+	strh	w7, [x5, 2]
+	ldr	w5, [x1, 32]
+	str	wzr, [x3, #:lo12:.LANCHOR161]
 	adrp	x3, .LANCHOR162
 	str	wzr, [x3, #:lo12:.LANCHOR162]
-	adrp	x3, .LANCHOR164
-	str	w6, [x3, #:lo12:.LANCHOR164]
-	adrp	x3, .LANCHOR165
-	str	wzr, [x3, #:lo12:.LANCHOR165]
 	adrp	x3, .LANCHOR166
 	str	wzr, [x3, #:lo12:.LANCHOR166]
-	adrp	x3, .LANCHOR161
-	str	wzr, [x3, #:lo12:.LANCHOR161]
+	adrp	x3, .LANCHOR165
+	str	wzr, [x3, #:lo12:.LANCHOR165]
+	adrp	x3, .LANCHOR167
+	str	w5, [x3, #:lo12:.LANCHOR167]
+	adrp	x3, .LANCHOR168
+	str	wzr, [x3, #:lo12:.LANCHOR168]
+	adrp	x3, .LANCHOR169
+	str	wzr, [x3, #:lo12:.LANCHOR169]
+	adrp	x3, .LANCHOR164
+	str	wzr, [x3, #:lo12:.LANCHOR164]
 	ldr	w3, [x1, 40]
-	adrp	x1, .LANCHOR156
-	ldr	w6, [x1, #:lo12:.LANCHOR156]
-	cmp	w3, w6
-	bls	.L2026
-	str	w3, [x1, #:lo12:.LANCHOR156]
-.L2026:
-	add	x19, x19, :lo12:.LANCHOR80
-	adrp	x1, .LANCHOR157
-	ldr	w3, [x1, #:lo12:.LANCHOR157]
-	ldr	w2, [x19, 36]
+	adrp	x1, .LANCHOR159
+	ldr	w5, [x1, #:lo12:.LANCHOR159]
+	cmp	w3, w5
+	bls	.L2018
+	str	w3, [x1, #:lo12:.LANCHOR159]
+.L2018:
+	add	x20, x20, :lo12:.LANCHOR81
+	adrp	x1, .LANCHOR160
+	ldr	w3, [x1, #:lo12:.LANCHOR160]
+	ldr	w2, [x20, 36]
 	cmp	w2, w3
-	bls	.L2027
-	str	w2, [x1, #:lo12:.LANCHOR157]
-.L2027:
+	bls	.L2019
+	str	w2, [x1, #:lo12:.LANCHOR160]
+.L2019:
 	mov	w1, 65535
-	cmp	w7, w1
-	beq	.L2028
-	add	x0, x0, :lo12:.LANCHOR91
+	cmp	w6, w1
+	beq	.L2020
+	add	x0, x0, :lo12:.LANCHOR92
 	bl	make_superblock
-.L2028:
-	ldrh	w2, [x20, #:lo12:.LANCHOR92]
+.L2020:
+	ldrh	w2, [x21, #:lo12:.LANCHOR93]
 	mov	w1, 65535
-	add	x0, x20, :lo12:.LANCHOR92
+	add	x0, x21, :lo12:.LANCHOR93
 	cmp	w2, w1
-	beq	.L2029
+	beq	.L2021
 	bl	make_superblock
-.L2029:
-	ldrh	w2, [x21, #:lo12:.LANCHOR93]
+.L2021:
+	ldrh	w2, [x22, #:lo12:.LANCHOR94]
 	mov	w1, 65535
-	add	x0, x21, :lo12:.LANCHOR93
+	add	x0, x22, :lo12:.LANCHOR94
 	cmp	w2, w1
-	beq	.L2030
+	beq	.L2022
 	bl	make_superblock
-.L2030:
-	ldrh	w2, [x22, #:lo12:.LANCHOR201]
+.L2022:
+	ldrh	w2, [x19, #:lo12:.LANCHOR204]
 	mov	w1, 65535
-	add	x0, x22, :lo12:.LANCHOR201
+	add	x0, x19, :lo12:.LANCHOR204
 	cmp	w2, w1
-	beq	.L2031
+	beq	.L2023
 	bl	make_superblock
-.L2031:
+.L2023:
 	mov	w0, 0
-	b	.L2014
-.L2020:
-	ldrh	w0, [x20, #:lo12:.LANCHOR206]
+	b	.L2006
+.L2012:
+	ldrh	w0, [x21, #:lo12:.LANCHOR209]
 	mov	w2, 1
 	mov	w1, w2
-	orr	w0, w22, w0, lsl 10
-	str	w0, [x19, 4]
-	ldr	x0, [x26, #:lo12:.LANCHOR180]
-	str	x0, [x19, 8]
-	mov	x0, x19
+	orr	w0, w23, w0, lsl 10
+	str	w0, [x20, 4]
+	ldr	x0, [x24, #:lo12:.LANCHOR183]
+	str	x0, [x20, 8]
+	mov	x0, x20
 	bl	FlashReadPages
-	ldr	w0, [x19]
+	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L2018
-	ldr	x0, [x26, #:lo12:.LANCHOR180]
+	beq	.L2010
+	ldr	x0, [x24, #:lo12:.LANCHOR183]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L2018
-	ldr	x0, [x25, #:lo12:.LANCHOR185]
+	bne	.L2010
+	ldr	x0, [x26, #:lo12:.LANCHOR188]
 	ldrh	w0, [x0]
 	cmp	w0, w28
-	beq	.L2019
-.L2018:
-	sub	w22, w22, #1
-	sxth	w22, w22
-	b	.L2017
+	beq	.L2011
+.L2010:
+	sub	w23, w23, #1
+	sxth	w23, w23
+	b	.L2009
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
+	.section	.text.FtlDumpBlockInfo,"ax",@progbits
+	.align	2
+	.global	FtlDumpBlockInfo
+	.type	FtlDumpBlockInfo, %function
+FtlDumpBlockInfo:
+	sub	sp, sp, #160
+	lsr	w0, w0, 10
+	stp	x29, x30, [sp, 16]
+	add	x29, sp, 16
+	stp	x19, x20, [sp, 32]
+	adrp	x19, .LANCHOR53
+	stp	x21, x22, [sp, 48]
+	and	w22, w1, 255
+	stp	x23, x24, [sp, 64]
+	add	x23, x29, 144
+	stp	x25, x26, [sp, 80]
+	str	x27, [sp, 96]
+	bl	P2V_block_in_plane
+	ldrh	w25, [x19, #:lo12:.LANCHOR53]
+	and	w21, w0, 65535
+	adrp	x1, .LANCHOR224
+	adrp	x0, .LC46
+	add	x1, x1, :lo12:.LANCHOR224
+	add	x0, x0, :lo12:.LC46
+	bl	printf
+	adrp	x1, .LANCHOR84
+	ubfiz	x0, x21, 1, 16
+	ldr	x1, [x1, #:lo12:.LANCHOR84]
+	ldrh	w2, [x1, x0]
+	mov	w1, w21
+	adrp	x0, .LC47
+	add	x0, x0, :lo12:.LC47
+	bl	printf
+	strh	w21, [x23, -48]!
+	mov	x0, x23
+	bl	make_superblock
+	adrp	x0, .LANCHOR8
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	cbz	w0, .L2042
+	cbnz	w22, .L2042
+	mov	w0, w21
+	bl	ftl_get_blk_mode
+	mov	w21, w0
+	cmp	w0, 1
+	bne	.L2033
+	adrp	x0, .LANCHOR54
+	ldrh	w25, [x0, #:lo12:.LANCHOR54]
+.L2033:
+	ldrh	w3, [x19, #:lo12:.LANCHOR53]
+	adrp	x26, .LC49
+	add	x26, x26, :lo12:.LC49
+	mov	w20, 0
+	mov	w27, 56
+	mov	w2, w25
+	mov	w1, w21
+	adrp	x0, .LC48
+	add	x0, x0, :lo12:.LC48
+	bl	printf
+.L2034:
+	adrp	x1, .LANCHOR105
+	adrp	x0, .LANCHOR38
+	adrp	x24, .LANCHOR180
+	add	x3, x23, 16
+	ldr	x6, [x1, #:lo12:.LANCHOR105]
+	adrp	x1, .LANCHOR58
+	ldrh	w5, [x0, #:lo12:.LANCHOR38]
+	mov	w19, 0
+	ldrh	w7, [x1, #:lo12:.LANCHOR58]
+	adrp	x1, .LANCHOR106
+	ldr	x0, [x24, #:lo12:.LANCHOR180]
+	mov	w11, 65535
+	ldr	x8, [x1, #:lo12:.LANCHOR106]
+	adrp	x1, .LANCHOR59
+	ldrh	w10, [x1, #:lo12:.LANCHOR59]
+	mov	w1, 0
+.L2035:
+	cmp	w1, w5
+	bne	.L2037
+	mov	w1, w19
+	umull	x19, w19, w27
+	mov	x22, 0
+	mov	w2, w21
+	bl	FlashReadPages
+.L2038:
+	cmp	x22, x19
+	bne	.L2039
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	cmp	w25, w20
+	bne	.L2034
+.L2040:
+	ldp	x19, x20, [sp, 32]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 48]
+	ldp	x23, x24, [sp, 64]
+	ldp	x25, x26, [sp, 80]
+	ldp	x29, x30, [sp, 16]
+	ldr	x27, [sp, 96]
+	add	sp, sp, 160
+	ret
+.L2042:
+	mov	w21, 0
+	b	.L2033
+.L2037:
+	ldrh	w2, [x3]
+	cmp	w2, w11
+	beq	.L2036
+	umaddl	x4, w19, w27, x0
+	orr	w2, w20, w2, lsl 10
+	str	w2, [x4, 4]
+	mul	w2, w19, w7
+	asr	w2, w2, 2
+	add	x2, x6, x2, sxtw 2
+	str	x2, [x4, 8]
+	mul	w2, w19, w10
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	asr	w2, w2, 2
+	add	x2, x8, x2, sxtw 2
+	str	x2, [x4, 16]
+.L2036:
+	add	w1, w1, 1
+	add	x3, x3, 2
+	and	w1, w1, 65535
+	b	.L2035
+.L2039:
+	ldr	x8, [x24, #:lo12:.LANCHOR180]
+	ldrh	w1, [x29, 96]
+	add	x2, x8, x22
+	ldp	x3, x0, [x2, 8]
+	ldr	w4, [x3, 4]
+	str	w4, [sp, 8]
+	ldr	w3, [x3]
+	str	w3, [sp]
+	ldp	w4, w5, [x0]
+	ldp	w6, w7, [x0, 8]
+	mov	x0, x26
+	ldr	w3, [x2, 4]
+	ldr	w2, [x8, x22]
+	add	x22, x22, 56
+	bl	printf
+	b	.L2038
+	.size	FtlDumpBlockInfo, .-FtlDumpBlockInfo
+	.section	.text.FtlScanAllBlock,"ax",@progbits
+	.align	2
+	.global	FtlScanAllBlock
+	.type	FtlScanAllBlock, %function
+FtlScanAllBlock:
+	sub	sp, sp, #144
+	adrp	x1, .LANCHOR225
+	adrp	x0, .LC46
+	add	x1, x1, :lo12:.LANCHOR225
+	add	x0, x0, :lo12:.LC46
+	stp	x29, x30, [sp, 16]
+	add	x29, sp, 16
+	stp	x23, x24, [sp, 64]
+	adrp	x23, .LANCHOR41
+	stp	x19, x20, [sp, 32]
+	adrp	x24, .LC51
+	stp	x21, x22, [sp, 48]
+	mov	w20, 0
+	add	x23, x23, :lo12:.LANCHOR41
+	add	x24, x24, :lo12:.LC51
+	str	x25, [sp, 80]
+	bl	printf
+.L2046:
+	ldrh	w0, [x23]
+	cmp	w0, w20
+	bhi	.L2054
+	ldp	x19, x20, [sp, 32]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 48]
+	ldp	x23, x24, [sp, 64]
+	ldp	x29, x30, [sp, 16]
+	ldr	x25, [sp, 80]
+	add	sp, sp, 144
+	ret
+.L2054:
+	strh	w20, [x29, 80]
+	mov	w0, w20
+	bl	ftl_get_blk_mode
+	mov	w3, w0
+	adrp	x2, .LANCHOR84
+	ubfiz	x1, x20, 1, 16
+	adrp	x0, .LC50
+	add	x0, x0, :lo12:.LC50
+	ldr	x2, [x2, #:lo12:.LANCHOR84]
+	adrp	x22, .LANCHOR180
+	mov	w19, 0
+	ldrh	w2, [x2, x1]
+	mov	w1, w20
+	bl	printf
+	add	x0, x29, 80
+	bl	make_superblock
+	adrp	x1, .LANCHOR105
+	adrp	x0, .LANCHOR38
+	add	x3, x29, 96
+	mov	w11, 65535
+	ldr	x6, [x1, #:lo12:.LANCHOR105]
+	adrp	x1, .LANCHOR58
+	ldrh	w5, [x0, #:lo12:.LANCHOR38]
+	mov	w12, 56
+	ldrh	w7, [x1, #:lo12:.LANCHOR58]
+	adrp	x1, .LANCHOR106
+	ldr	x0, [x22, #:lo12:.LANCHOR180]
+	ldr	x8, [x1, #:lo12:.LANCHOR106]
+	adrp	x1, .LANCHOR59
+	ldrh	w10, [x1, #:lo12:.LANCHOR59]
+	mov	w1, 0
+.L2047:
+	cmp	w1, w5
+	bne	.L2049
+	mov	w25, 56
+	mov	x21, 0
+	mov	w2, 0
+	mov	w1, w19
+	umull	x25, w19, w25
+	bl	FlashReadPages
+.L2050:
+	cmp	x21, x25
+	bne	.L2051
+	ldr	x0, [x22, #:lo12:.LANCHOR180]
+	adrp	x25, .LC52
+	add	x25, x25, :lo12:.LC52
+	mov	w1, w19
+	mov	x19, 0
+	mov	w2, 1
+	bl	FlashReadPages
+.L2052:
+	cmp	x21, x19
+	bne	.L2053
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L2046
+.L2049:
+	ldrh	w2, [x3]
+	cmp	w2, w11
+	beq	.L2048
+	umaddl	x4, w19, w12, x0
+	lsl	w2, w2, 10
+	str	w2, [x4, 4]
+	mul	w2, w19, w7
+	asr	w2, w2, 2
+	add	x2, x6, x2, sxtw 2
+	str	x2, [x4, 8]
+	mul	w2, w19, w10
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	asr	w2, w2, 2
+	add	x2, x8, x2, sxtw 2
+	str	x2, [x4, 16]
+.L2048:
+	add	w1, w1, 1
+	add	x3, x3, 2
+	and	w1, w1, 65535
+	b	.L2047
+.L2051:
+	ldr	x8, [x22, #:lo12:.LANCHOR180]
+	ldrh	w1, [x29, 80]
+	add	x2, x8, x21
+	ldp	x3, x0, [x2, 8]
+	ldr	w4, [x3, 4]
+	str	w4, [sp, 8]
+	ldr	w3, [x3]
+	str	w3, [sp]
+	ldp	w4, w5, [x0]
+	ldp	w6, w7, [x0, 8]
+	mov	x0, x24
+	ldr	w3, [x2, 4]
+	ldr	w2, [x8, x21]
+	add	x21, x21, 56
+	bl	printf
+	b	.L2050
+.L2053:
+	ldr	x8, [x22, #:lo12:.LANCHOR180]
+	ldrh	w1, [x29, 80]
+	add	x2, x8, x19
+	ldp	x3, x0, [x2, 8]
+	ldr	w4, [x3, 4]
+	str	w4, [sp, 8]
+	ldr	w3, [x3]
+	str	w3, [sp]
+	ldp	w4, w5, [x0]
+	ldp	w6, w7, [x0, 8]
+	mov	x0, x25
+	ldr	w3, [x2, 4]
+	ldr	w2, [x8, x19]
+	add	x19, x19, 56
+	bl	printf
+	b	.L2052
+	.size	FtlScanAllBlock, .-FtlScanAllBlock
 	.section	.text.FtlMapTblRecovery,"ax",@progbits
 	.align	2
 	.global	FtlMapTblRecovery
 	.type	FtlMapTblRecovery, %function
 FtlMapTblRecovery:
-	stp	x29, x30, [sp, -160]!
+	stp	x29, x30, [sp, -144]!
 	mov	w1, 0
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR180
 	stp	x23, x24, [sp, 48]
-	adrp	x20, .LANCHOR199
+	adrp	x20, .LANCHOR202
 	ldrh	w23, [x0, 6]
-	ldr	x22, [x0, 40]
-	ldr	x0, [x0, 16]
-	str	x0, [x29, 152]
+	adrp	x24, .LANCHOR54
+	stp	x21, x22, [sp, 32]
+	ldr	x21, [x0, 40]
+	ldr	x22, [x0, 16]
 	lsl	w2, w23, 2
-	ldr	x0, [x19, 24]
-	str	x0, [x29, 136]
+	ldr	x0, [x0, 24]
+	str	x0, [x29, 128]
 	ldrh	w0, [x19, 8]
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR53
 	stp	x27, x28, [sp, 80]
-	mov	w26, 0
-	str	w0, [x29, 144]
-	mov	x0, x22
+	mov	w27, 0
+	str	w0, [x29, 140]
+	mov	x0, x21
 	bl	ftl_memset
-	stp	wzr, wzr, [x19, 48]
-	add	x3, x20, :lo12:.LANCHOR199
-	ldr	x0, [x21, #:lo12:.LANCHOR180]
-	mov	w1, -1
-	mov	x24, x3
+	str	x20, [x29, 120]
+	adrp	x7, .LANCHOR183
+	add	x3, x20, :lo12:.LANCHOR202
+	mov	x26, x7
+	mov	x20, x3
+	ldr	x0, [x7, #:lo12:.LANCHOR183]
 	str	x0, [x3, 8]
-	adrp	x0, .LANCHOR185
-	str	x0, [x29, 128]
-	ldr	x27, [x0, #:lo12:.LANCHOR185]
-	ldr	w0, [x29, 144]
-	str	x27, [x3, 16]
+	adrp	x0, .LANCHOR188
+	stp	wzr, wzr, [x19, 48]
+	ldr	x25, [x0, #:lo12:.LANCHOR188]
+	mov	w0, -1
+	str	x25, [x3, 16]
+	strh	w0, [x19]
+	strh	w0, [x19, 2]
+	mov	w0, 1
+	str	w0, [x19, 56]
+	ldr	w0, [x29, 140]
 	sub	w0, w0, #1
-	strh	w1, [x19]
-	strh	w1, [x19, 2]
-	mov	w1, 1
-	str	w0, [x29, 120]
-	add	x0, x25, :lo12:.LANCHOR53
-	str	w1, [x19, 56]
+	str	w0, [x29, 136]
+	add	x0, x24, :lo12:.LANCHOR54
 	str	x0, [x29, 112]
-.L2041:
-	ldr	w0, [x29, 144]
-	cmp	w26, w0
-	bge	.L2059
-	ldr	w0, [x29, 120]
-	sxtw	x28, w26
-	cmp	w26, w0
-	bne	.L2042
-	ldr	x2, [x29, 152]
+.L2057:
+	ldr	w0, [x29, 140]
+	cmp	w27, w0
+	bge	.L2075
+	ldr	w0, [x29, 136]
+	sxtw	x28, w27
+	cmp	w27, w0
+	bne	.L2058
 	lsl	x0, x28, 1
-	ldr	x1, [x29, 152]
-	mov	w25, 0
-	add	x24, x1, x0
 	mov	w1, 1
-	ldrh	w0, [x2, x0]
+	add	x24, x22, x0
+	ldrh	w0, [x22, x0]
+	mov	w22, 0
 	bl	FtlGetLastWrittenPage
-	sxth	w3, w0
+	sxth	w26, w0
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-	ldr	x0, [x29, 136]
-	strh	w26, [x19]
-	add	x26, x20, :lo12:.LANCHOR199
+	ldr	x0, [x29, 128]
+	strh	w27, [x19]
 	ldr	w0, [x0, x28, lsl 2]
 	str	w0, [x19, 48]
-.L2043:
-	cmp	w25, w3
-	ble	.L2046
+	ldr	x0, [x29, 120]
+	add	x20, x0, :lo12:.LANCHOR202
 .L2059:
-	adrp	x23, .LANCHOR124
-	str	x23, [x29, 136]
-	add	x0, x23, :lo12:.LANCHOR124
-	cmp	x19, x0
-	bne	.L2048
-	adrp	x0, .LANCHOR69
-	ldrh	w0, [x0, #:lo12:.LANCHOR69]
-	cbz	w0, .L2048
-	adrp	x25, .LANCHOR125
-	add	x26, x25, :lo12:.LANCHOR125
-	adrp	x28, .LANCHOR66
-	mov	w22, 0
-	add	x0, x28, :lo12:.LANCHOR66
-	adrp	x24, .LANCHOR192
-	str	x0, [x29, 144]
-.L2062:
-	ldr	x0, [x29, 144]
-	ldrh	w0, [x0]
-	cmp	w22, w0
-	bcc	.L2070
-.L2048:
+	cmp	w22, w26
+	ble	.L2062
+.L2075:
 	mov	x0, x19
 	bl	ftl_free_no_use_map_blk
-	adrp	x0, .LANCHOR53
+	adrp	x0, .LANCHOR54
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+	ldrh	w0, [x0, #:lo12:.LANCHOR54]
 	cmp	w1, w0
-	bne	.L2061
+	bne	.L2064
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L2061:
+.L2064:
 	mov	x0, x19
 	bl	ftl_map_blk_gc
 	mov	x0, x19
@@ -14336,219 +14561,121 @@ FtlMapTblRecovery:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 160
+	ldp	x29, x30, [sp], 144
 	ret
-.L2046:
+.L2062:
 	ldrh	w0, [x24]
 	mov	w2, 1
-	str	w3, [x29, 144]
 	mov	w1, w2
-	orr	w0, w25, w0, lsl 10
-	str	w0, [x26, 4]
-	mov	x0, x26
+	orr	w0, w22, w0, lsl 10
+	str	w0, [x20, 4]
+	mov	x0, x20
 	bl	FlashReadPages
-	ldr	w0, [x26]
-	ldr	w3, [x29, 144]
+	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L2044
-	ldrh	w0, [x27, 8]
+	beq	.L2060
+	ldrh	w0, [x25, 8]
 	cmp	w23, w0
-	bls	.L2045
-	ldrh	w2, [x27]
+	bls	.L2061
+	ldrh	w2, [x25]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
-	bne	.L2045
+	bne	.L2061
 	ubfiz	x0, x0, 2, 16
-	ldr	w1, [x26, 4]
-	str	w1, [x22, x0]
-.L2045:
-	add	w25, w25, 1
-	sxth	w25, w25
-	b	.L2043
-.L2044:
+	ldr	w1, [x20, 4]
+	str	w1, [x21, x0]
+.L2061:
+	add	w22, w22, 1
+	sxth	w22, w22
+	b	.L2059
+.L2060:
 	ldrh	w0, [x24]
 	strh	w0, [x19, 60]
-	b	.L2045
-.L2042:
-	ldr	x1, [x29, 152]
+	b	.L2061
+.L2058:
+	ldr	x0, [x26, #:lo12:.LANCHOR183]
 	mov	w2, 1
-	ldr	x0, [x21, #:lo12:.LANCHOR180]
-	str	x0, [x24, 8]
+	str	x0, [x20, 8]
 	lsl	x0, x28, 1
-	add	x28, x1, x0
-	ldrh	w0, [x1, x0]
-	ldrh	w1, [x25, #:lo12:.LANCHOR53]
+	ldrh	w1, [x24, #:lo12:.LANCHOR54]
+	add	x28, x22, x0
+	ldrh	w0, [x22, x0]
 	sub	w1, w1, #1
 	orr	w0, w1, w0, lsl 10
 	mov	w1, w2
-	str	w0, [x24, 4]
-	mov	x0, x24
+	str	w0, [x20, 4]
+	mov	x0, x20
 	bl	FlashReadPages
-	ldr	w0, [x24]
+	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L2072
-	ldrh	w1, [x27]
+	beq	.L2077
+	ldrh	w1, [x25]
 	ldrh	w0, [x19, 4]
 	cmp	w1, w0
-	bne	.L2072
-	ldrh	w1, [x27, 8]
+	bne	.L2077
+	ldrh	w1, [x25, 8]
 	mov	w0, 64245
 	cmp	w1, w0
-	beq	.L2050
-.L2072:
-	mov	w6, 0
-.L2051:
+	beq	.L2066
+.L2077:
+	mov	w5, 0
+.L2067:
 	ldr	x0, [x29, 112]
 	ldrh	w0, [x0]
-	cmp	w6, w0
-	bge	.L2057
+	cmp	w5, w0
+	bge	.L2073
 	ldrh	w0, [x28]
 	mov	w2, 1
-	str	w6, [x29, 108]
+	str	w5, [x29, 108]
 	mov	w1, w2
-	orr	w0, w6, w0, lsl 10
-	str	w0, [x24, 4]
-	mov	x0, x24
+	orr	w0, w5, w0, lsl 10
+	str	w0, [x20, 4]
+	mov	x0, x20
 	bl	FlashReadPages
-	ldr	w0, [x24]
-	ldr	w6, [x29, 108]
+	ldr	w0, [x20]
+	ldr	w5, [x29, 108]
 	cmn	w0, #1
-	beq	.L2055
-	ldrh	w0, [x27, 8]
+	beq	.L2071
+	ldrh	w0, [x25, 8]
 	cmp	w23, w0
-	bls	.L2055
-	ldrh	w2, [x27]
+	bls	.L2071
+	ldrh	w2, [x25]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
-	bne	.L2055
+	bne	.L2071
 	ubfiz	x0, x0, 2, 16
-	ldr	w1, [x24, 4]
-	str	w1, [x22, x0]
-.L2055:
-	add	w6, w6, 1
-	sxth	w6, w6
-	b	.L2051
-.L2050:
-	ldrh	w6, [x25, #:lo12:.LANCHOR53]
+	ldr	w1, [x20, 4]
+	str	w1, [x21, x0]
+.L2071:
+	add	w5, w5, 1
+	sxth	w5, w5
+	b	.L2067
+.L2066:
+	ldrh	w5, [x24, #:lo12:.LANCHOR54]
 	mov	w0, 0
-	ldr	x10, [x21, #:lo12:.LANCHOR180]
-	sub	w6, w6, #1
-.L2052:
-	cmp	w0, w6
-	blt	.L2054
-.L2057:
-	add	w4, w26, 1
-	sxth	w26, w4
-	b	.L2041
-.L2054:
+	ldr	x10, [x26, #:lo12:.LANCHOR183]
+	sub	w5, w5, #1
+.L2068:
+	cmp	w0, w5
+	blt	.L2070
+.L2073:
+	add	w4, w27, 1
+	sxth	w27, w4
+	b	.L2057
+.L2070:
 	lsl	w2, w0, 1
 	sxtw	x2, w2
 	lsl	x1, x2, 2
 	ldrh	w1, [x10, x1]
 	cmp	w23, w1
-	bls	.L2053
+	bls	.L2069
 	add	x2, x2, 1
 	ubfiz	x1, x1, 2, 16
 	ldr	w2, [x10, x2, lsl 2]
-	str	w2, [x22, x1]
-.L2053:
+	str	w2, [x21, x1]
+.L2069:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L2052
-.L2070:
-	ldr	x0, [x24, #:lo12:.LANCHOR192]
-	ubfiz	x28, x22, 2, 32
-	ldr	w0, [x0, x28]
-	sub	w1, w0, #1
-	cmn	w1, #3
-	bhi	.L2064
-	adrp	x8, .LANCHOR128
-	str	x8, [x29, 112]
-	mov	x27, x8
-	ldr	x1, [x8, #:lo12:.LANCHOR128]
-	ldr	w1, [x1, x28]
-	cmp	w0, w1
-	beq	.L2064
-	add	x4, x20, :lo12:.LANCHOR199
-	ldr	x1, [x21, #:lo12:.LANCHOR180]
-	mov	w2, 1
-	str	x4, [x29, 120]
-	str	x1, [x4, 8]
-	ldr	x1, [x29, 128]
-	str	w0, [x4, 4]
-	mov	x0, x4
-	ldr	x23, [x1, #:lo12:.LANCHOR185]
-	mov	w1, w2
-	str	x23, [x4, 16]
-	bl	FlashReadPages
-	ldr	w0, [x20, #:lo12:.LANCHOR199]
-	cmn	w0, #1
-	beq	.L2064
-	ldr	x0, [x29, 136]
-	ldrh	w1, [x23]
-	add	x0, x0, :lo12:.LANCHOR124
-	ldp	x8, x4, [x29, 112]
-	ldrh	w0, [x0, 4]
-	cmp	w1, w0
-	bne	.L2064
-	ldr	x0, [x8, #:lo12:.LANCHOR128]
-	ldr	w3, [x23, 4]
-	ldr	w1, [x0, x28]
-	str	w1, [x4, 4]
-	ldr	w0, [x0, x28]
-	cbnz	w0, .L2066
-	str	wzr, [x23, 4]
-.L2067:
-	ldr	w4, [x23, 4]
-	cmp	w3, w4
-	bls	.L2064
-	ldr	x1, [x27, #:lo12:.LANCHOR128]
-	ldr	x0, [x24, #:lo12:.LANCHOR192]
-	ldr	w2, [x1, x28]
-	ldr	w1, [x0, x28]
-	adrp	x0, .LC45
-	add	x0, x0, :lo12:.LC45
-	bl	printf
-	ldr	x0, [x24, #:lo12:.LANCHOR192]
-	ldr	x1, [x27, #:lo12:.LANCHOR128]
-	ldr	w2, [x0, x28]
-	str	w2, [x1, x28]
-	mov	w1, 0
-	ldrh	w2, [x25, #:lo12:.LANCHOR125]
-	ldr	w0, [x0, x28]
-	ubfx	x0, x0, 10, 16
-.L2068:
-	cmp	w1, w2
-	blt	.L2069
-	adrp	x1, .LANCHOR64
-	ldr	w1, [x1, #:lo12:.LANCHOR64]
-	cmp	w2, w1
-	bcs	.L2064
-	ldr	x1, [x29, 152]
-	ubfiz	x2, x2, 1, 16
-	strh	w0, [x1, x2]
-	ldrh	w1, [x26]
-	add	w1, w1, 1
-	strh	w1, [x26]
-	bl	remove_from_free_sys_Queue
-.L2064:
-	add	w22, w22, 1
-	b	.L2062
-.L2066:
-	mov	w2, 1
-	str	w3, [x29, 120]
-	mov	w1, w2
-	mov	x0, x4
-	bl	FlashReadPages
-	ldr	w3, [x29, 120]
-	b	.L2067
-.L2069:
-	ldr	x3, [x29, 152]
-	ldrh	w3, [x3, w1, sxtw 1]
-	cmp	w3, w0
-	beq	.L2064
-	add	w1, w1, 1
-	sxth	w1, w1
 	b	.L2068
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
 	.section	.text.FtlLoadVonderInfo,"ax",@progbits
@@ -14557,31 +14684,31 @@ FtlMapTblRecovery:
 	.type	FtlLoadVonderInfo, %function
 FtlLoadVonderInfo:
 	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR61
+	adrp	x1, .LANCHOR62
 	adrp	x0, .LANCHOR215
 	add	x0, x0, :lo12:.LANCHOR215
 	add	x29, sp, 0
-	ldrh	w1, [x1, #:lo12:.LANCHOR61]
+	ldrh	w1, [x1, #:lo12:.LANCHOR62]
 	strh	w1, [x0, 10]
 	mov	w1, -3962
 	strh	w1, [x0, 4]
-	adrp	x1, .LANCHOR70
-	ldrh	w1, [x1, #:lo12:.LANCHOR70]
+	adrp	x1, .LANCHOR71
+	ldrh	w1, [x1, #:lo12:.LANCHOR71]
 	strh	w1, [x0, 8]
-	adrp	x1, .LANCHOR62
-	ldrh	w1, [x1, #:lo12:.LANCHOR62]
+	adrp	x1, .LANCHOR63
+	ldrh	w1, [x1, #:lo12:.LANCHOR63]
 	strh	w1, [x0, 6]
-	adrp	x1, .LANCHOR71
-	ldr	x1, [x1, #:lo12:.LANCHOR71]
+	adrp	x1, .LANCHOR72
+	ldr	x1, [x1, #:lo12:.LANCHOR72]
 	str	x1, [x0, 16]
-	adrp	x1, .LANCHOR190
-	ldr	x1, [x1, #:lo12:.LANCHOR190]
+	adrp	x1, .LANCHOR193
+	ldr	x1, [x1, #:lo12:.LANCHOR193]
 	str	x1, [x0, 24]
-	adrp	x1, .LANCHOR189
-	ldr	x1, [x1, #:lo12:.LANCHOR189]
+	adrp	x1, .LANCHOR192
+	ldr	x1, [x1, #:lo12:.LANCHOR192]
 	str	x1, [x0, 32]
-	adrp	x1, .LANCHOR191
-	ldr	x1, [x1, #:lo12:.LANCHOR191]
+	adrp	x1, .LANCHOR194
+	ldr	x1, [x1, #:lo12:.LANCHOR194]
 	str	x1, [x0, 40]
 	mov	w1, -1
 	strh	w1, [x0, 60]
@@ -14598,419 +14725,1688 @@ FtlLoadMapInfo:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	FtlL2PDataInit
-	adrp	x0, .LANCHOR124
-	add	x0, x0, :lo12:.LANCHOR124
+	adrp	x0, .LANCHOR127
+	add	x0, x0, :lo12:.LANCHOR127
 	bl	FtlMapTblRecovery
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
-	.section	.text.FtlRecoverySuperblock,"ax",@progbits
+	.section	.text.FtlGcScanTempBlk,"ax",@progbits
 	.align	2
-	.global	FtlRecoverySuperblock
-	.type	FtlRecoverySuperblock, %function
-FtlRecoverySuperblock:
-	stp	x29, x30, [sp, -208]!
-	mov	w1, 65535
+	.global	FtlGcScanTempBlk
+	.type	FtlGcScanTempBlk, %function
+FtlGcScanTempBlk:
+	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR226
 	stp	x19, x20, [sp, 16]
-	mov	x19, x0
+	mov	x20, x0
+	ldrh	w19, [x23, #:lo12:.LANCHOR226]
+	mov	w0, 65535
 	stp	x21, x22, [sp, 32]
-	ldrh	w0, [x0]
-	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	cmp	w0, w1
+	cmp	w19, w0
 	stp	x27, x28, [sp, 80]
-	beq	.L2246
-	ldrb	w0, [x19, 6]
-	str	w0, [x29, 180]
-	adrp	x0, .LANCHOR52
-	ldrh	w26, [x19, 2]
-	str	x0, [x29, 144]
-	ldrh	w2, [x0, #:lo12:.LANCHOR52]
-	cmp	w2, w26
-	bne	.L2090
-	strh	wzr, [x19, 4]
-.L2253:
-	strb	wzr, [x19, 6]
-.L2246:
+	beq	.L2104
+	cbnz	w19, .L2087
+.L2088:
+	bl	FtlGcPageVarInit
+	b	.L2089
+.L2104:
+	mov	w19, 0
+.L2087:
+	adrp	x0, .LANCHOR53
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+	cmp	w0, w1
+	beq	.L2088
+.L2089:
+	adrp	x25, .LANCHOR59
+	add	x25, x25, :lo12:.LANCHOR59
+	mov	w26, -1
+	mov	w24, 65535
+.L2101:
+	ldrh	w0, [x20]
+	strb	wzr, [x20, 8]
+	cmp	w0, w24
+	beq	.L2105
+	mov	w27, 56
+.L2103:
+	adrp	x1, .LANCHOR106
+	adrp	x22, .LANCHOR180
+	ldrh	w6, [x25]
+	add	x3, x20, 16
+	ldr	x5, [x1, #:lo12:.LANCHOR106]
+	adrp	x1, .LANCHOR38
+	ldr	x0, [x22, #:lo12:.LANCHOR180]
+	mov	w21, 0
+	ldrh	w1, [x1, #:lo12:.LANCHOR38]
+	add	x1, x1, 8
+	add	x1, x20, x1, lsl 1
+.L2091:
+	cmp	x3, x1
+	bne	.L2093
+	mov	w1, w21
+	umull	x21, w21, w27
+	mov	x28, 0
+	mov	w2, 0
+	bl	FlashReadPages
+.L2094:
+	cmp	x28, x21
+	bne	.L2102
+	adrp	x0, .LANCHOR53
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+	cmp	w0, w19
+	bhi	.L2103
+.L2105:
+	mov	w2, 0
+	b	.L2090
+.L2093:
+	ldrh	w2, [x3]
+	cmp	w2, w24
+	beq	.L2092
+	umaddl	x4, w21, w27, x0
+	orr	w2, w19, w2, lsl 10
+	str	w2, [x4, 4]
+	mul	w2, w21, w6
+	add	w21, w21, 1
+	str	xzr, [x4, 8]
+	and	w21, w21, 65535
+	asr	w2, w2, 2
+	add	x2, x5, x2, sxtw 2
+	str	x2, [x4, 16]
+.L2092:
+	add	x3, x3, 2
+	b	.L2091
+.L2102:
+	ldr	x6, [x22, #:lo12:.LANCHOR180]
+	add	x5, x6, x28
+	ldr	w4, [x5, 4]
+	lsr	w0, w4, 10
+	bl	P2V_plane
+	and	w2, w0, 65535
+	ldr	w0, [x6, x28]
+	cbnz	w0, .L2095
+	ldr	x0, [x5, 16]
+	add	x28, x28, 56
+	ldrh	w1, [x0]
+	cmp	w1, w24
+	bne	.L2096
+	adrp	x0, .LANCHOR135
+	mov	w1, 1
+	str	w1, [x0, #:lo12:.LANCHOR135]
+.L2090:
+	strb	w2, [x20, 6]
+	mov	w0, -1
+	strh	w19, [x20, 2]
+	mov	w1, w19
+	strh	w0, [x23, #:lo12:.LANCHOR226]
+	mov	x0, x20
+	bl	ftl_sb_update_avl_pages
+	mov	w0, w26
 	ldp	x19, x20, [sp, 16]
-	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 208
+	ldp	x29, x30, [sp], 96
 	ret
-.L2090:
-	ldrh	w0, [x19, 16]
-	mov	w21, 0
-.L2091:
-	cmp	w0, w1
-	beq	.L2092
-	ldrb	w1, [x19, 8]
-	cmp	w1, 1
-	bne	.L2093
-	bl	FtlGetLastWrittenPage
-	mov	w20, w0
-	cmn	w0, #1
-	beq	.L2094
-	adrp	x0, .LANCHOR8
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbnz	w0, .L2171
-	adrp	x0, .LANCHOR16
-	add	x0, x0, :lo12:.LANCHOR16
-	ldrh	w23, [x0, w20, sxtw 1]
-.L2095:
-	adrp	x1, .LANCHOR105
-	adrp	x2, .LANCHOR37
-	adrp	x22, .LANCHOR177
-	add	x4, x19, 16
-	ldr	x6, [x1, #:lo12:.LANCHOR105]
-	adrp	x1, .LANCHOR58
-	ldr	x0, [x22, #:lo12:.LANCHOR177]
-	mov	w27, 0
-	ldrh	w7, [x1, #:lo12:.LANCHOR58]
-	add	x1, x19, 16
-	str	x1, [x29, 184]
-	mov	w8, 65535
-	ldrh	w1, [x2, #:lo12:.LANCHOR37]
-	mov	w10, 56
-	str	x2, [x29, 160]
-	add	x1, x1, 8
-	add	x1, x19, x1, lsl 1
 .L2096:
-	cmp	x1, x4
-	bne	.L2100
-	ldrb	w1, [x19, 8]
-	cmp	w1, 1
-	bne	.L2172
+	ldp	w2, w0, [x0, 8]
+	mov	w1, w4
+	bl	FtlGcUpdatePage
+	b	.L2094
+.L2095:
+	ldrh	w1, [x20]
+	mov	w2, w4
+	adrp	x0, .LC53
+	add	x0, x0, :lo12:.LC53
+	bl	printf
+	adrp	x0, .LANCHOR28
+	ldr	w1, [x0, #:lo12:.LANCHOR28]
+	ldrh	w0, [x20]
+	cbnz	w1, .L2097
 	adrp	x1, .LANCHOR8
 	ldrb	w1, [x1, #:lo12:.LANCHOR8]
-	cmp	w1, 0
-	cset	w1, ne
-	str	w1, [x29, 176]
-.L2101:
-	ldr	w2, [x29, 176]
-	mov	w1, w27
-	adrp	x24, .LC46
-	adrp	x25, .LANCHOR229
-	add	x24, x24, :lo12:.LC46
-	add	x25, x25, :lo12:.LANCHOR229
-	mov	x28, 0
-	bl	FlashReadPages
-	adrp	x0, .LANCHOR157
-	mov	w5, 65535
-	str	x0, [x29, 168]
-	ldr	w21, [x0, #:lo12:.LANCHOR157]
-	sub	w21, w21, #1
-.L2102:
-	and	w0, w28, 65535
-	cmp	w27, w0
-	bhi	.L2107
-	bne	.L2105
-	ldr	x0, [x22, #:lo12:.LANCHOR177]
-	add	w20, w20, 1
-	and	w20, w20, 65535
-	ldr	w0, [x0, 4]
-.L2248:
-	lsr	w0, w0, 10
-	bl	P2V_plane
-	ldrb	w1, [x19, 8]
-	and	w27, w0, 65535
-	cmp	w1, 1
-	bne	.L2109
-	adrp	x0, .LANCHOR8
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbnz	w0, .L2109
-	adrp	x0, .LANCHOR16
-	add	x0, x0, :lo12:.LANCHOR16
-	ldrh	w20, [x0, w20, sxtw 1]
-.L2109:
-	ldr	x0, [x29, 144]
-	ldrh	w0, [x0, #:lo12:.LANCHOR52]
-	cmp	w0, w20
-	bne	.L2110
-	strh	w20, [x19, 2]
-	strb	wzr, [x19, 6]
-	strh	wzr, [x19, 4]
-.L2110:
-	ldr	w0, [x29, 180]
-	cmp	w20, w26
-	cset	w2, eq
-	cmp	w27, w0
-	cset	w0, eq
-	tst	w2, w0
-	beq	.L2111
-.L2254:
-	mov	w2, w27
-	mov	w1, w20
-	mov	x0, x19
-	bl	ftl_sb_update_avl_pages
-	b	.L2246
-.L2092:
-	add	w21, w21, 1
-	and	w21, w21, 65535
-	add	x0, x19, x21, sxtw 1
-	ldrh	w0, [x0, 16]
-	b	.L2091
-.L2093:
-	mov	w1, 0
-	bl	FtlGetLastWrittenPage
-	mov	w20, w0
-	cmn	w0, #1
-	beq	.L2094
-.L2171:
-	mov	w23, w20
-	b	.L2095
-.L2094:
-	cbz	w26, .L2097
-	mov	w2, 1933
-	adrp	x1, .LANCHOR228
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR228
-	add	x0, x0, :lo12:.LC6
-	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
-	bl	printf
+	cbz	w1, .L2098
 .L2097:
-	ldr	w0, [x29, 180]
-	cmp	w0, 0
-	ccmp	w21, w0, 4, ne
-	beq	.L2098
-	mov	w2, 1934
-	adrp	x1, .LANCHOR228
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR228
-	add	x0, x0, :lo12:.LC6
-	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
-	bl	printf
+	adrp	x2, .LANCHOR79
+	ubfiz	x1, x0, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR79]
+	ldrh	w1, [x2, x1]
+	cmp	w1, 159
+	bls	.L2099
 .L2098:
-	strh	wzr, [x19, 2]
-	b	.L2253
-.L2100:
-	ldrh	w2, [x4]
-	cmp	w2, w8
-	beq	.L2099
-	umaddl	x5, w27, w10, x0
-	orr	w2, w23, w2, lsl 10
-	add	w3, w27, 1
-	str	w2, [x5, 4]
-	mul	w2, w27, w7
-	and	w27, w3, 65535
-	str	xzr, [x5, 8]
-	asr	w2, w2, 2
-	add	x2, x6, x2, sxtw 2
-	str	x2, [x5, 16]
+	ldr	x1, [x22, #:lo12:.LANCHOR180]
+	ldr	w1, [x1, x28]
+	cmn	w1, #1
+	bne	.L2100
 .L2099:
-	add	x4, x4, 2
-	b	.L2096
-.L2172:
-	str	wzr, [x29, 176]
+	ldr	x1, [x22, #:lo12:.LANCHOR180]
+	add	x28, x1, x28
+	ldr	w26, [x28, 4]
+.L2100:
+	adrp	x1, .LANCHOR84
+	ubfiz	x0, x0, 1, 16
+	mov	w19, 0
+	ldr	x1, [x1, #:lo12:.LANCHOR84]
+	strh	wzr, [x1, x0]
+	ldrh	w0, [x20]
+	bl	INSERT_FREE_LIST
+	mov	w0, -1
+	strh	w0, [x20]
+	bl	FtlGcPageVarInit
 	b	.L2101
-.L2107:
-	mov	x0, 56
-	ldr	x2, [x22, #:lo12:.LANCHOR177]
-	mul	x0, x28, x0
-	add	x1, x2, x0
-	ldr	w0, [x2, x0]
-	cbnz	w0, .L2103
-	ldr	x6, [x1, 16]
-	ldr	w4, [x6, 4]
-	cmn	w4, #1
-	beq	.L2104
-	ldr	x0, [x29, 168]
-	ldr	w1, [x0, #:lo12:.LANCHOR157]
-	mov	w0, w4
-	bl	ftl_cmp_data_ver
-	cbz	w0, .L2104
-	ldr	x0, [x29, 168]
-	add	w4, w4, 1
-	str	w4, [x0, #:lo12:.LANCHOR157]
-.L2104:
-	ldr	w0, [x6]
-	cmn	w0, #1
-	bne	.L2106
-.L2105:
-	ldr	x0, [x22, #:lo12:.LANCHOR177]
-	and	x28, x28, 65535
-	mov	x1, 56
+	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
+	.section	.text.FlashReadFacBbtData,"ax",@progbits
+	.align	2
+	.global	FlashReadFacBbtData
+	.type	FlashReadFacBbtData, %function
+FlashReadFacBbtData:
+	stp	x29, x30, [sp, -160]!
+	add	x29, sp, 0
+	stp	x25, x26, [sp, 64]
+	mov	w25, w1
+	adrp	x1, .LANCHOR15
+	add	x1, x1, :lo12:.LANCHOR15
+	stp	x23, x24, [sp, 48]
+	mov	x23, x0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR147
+	ldrh	w0, [x1, 14]
+	mov	w24, w2
+	ldrh	w1, [x1, 12]
+	stp	x19, x20, [sp, 16]
+	str	x27, [sp, 80]
+	mov	w27, 61664
+	mul	w0, w0, w1
+	ldr	x1, [x21, #:lo12:.LANCHOR147]
+	str	x1, [x29, 112]
+	and	w0, w0, 65535
+	adrp	x1, .LANCHOR197
+	sub	w20, w0, #1
+	sub	w19, w0, #15
+	ldr	x2, [x1, #:lo12:.LANCHOR197]
 	and	w20, w20, 65535
-	madd	x28, x28, x1, x0
-	ldr	w0, [x28, 4]
-	b	.L2248
-.L2103:
-	ldr	w1, [x1, 4]
-	mov	x0, x24
-	bl	printf
-	ldrh	w0, [x19]
-	and	w5, w23, 65535
-	strh	w0, [x25]
-.L2106:
-	add	x28, x28, 1
-	b	.L2102
-.L2111:
-	mov	w0, 65535
-	cmp	w5, w0
-	bne	.L2112
-	cbnz	w1, .L2113
-.L2112:
-	adrp	x24, .LANCHOR133
-	and	w6, w23, 65535
-	ldr	w0, [x24, #:lo12:.LANCHOR133]
-	cmn	w0, #1
-	bne	.L2114
-	str	w21, [x24, #:lo12:.LANCHOR133]
-.L2114:
-	add	w0, w26, 7
-	ldr	w7, [x24, #:lo12:.LANCHOR133]
-	cmp	w0, w23, uxth
-	bge	.L2173
-	sub	w23, w6, #7
-	and	w23, w23, 65535
+	mul	w26, w0, w25
+	mov	x22, x1
+	str	x2, [x29, 120]
 .L2115:
-	mov	w3, -1
-	adrp	x5, .LANCHOR117
-	mov	w28, w3
-	add	x5, x5, :lo12:.LANCHOR117
-	mov	w4, 65535
-.L2116:
-	cmp	w23, w6
-	bhi	.L2131
-	ldr	x1, [x29, 160]
-	mov	w25, 0
-	ldr	x0, [x22, #:lo12:.LANCHOR177]
-	mov	w10, 56
-	ldr	x2, [x29, 184]
-	ldrh	w1, [x1, #:lo12:.LANCHOR37]
-	add	x1, x1, 8
-	add	x1, x19, x1, lsl 1
-	b	.L2132
-.L2173:
-	mov	w23, w26
-	b	.L2115
-.L2118:
-	ldrh	w8, [x2]
-	cmp	w8, w4
-	beq	.L2117
-	umaddl	x11, w25, w10, x0
-	add	w25, w25, 1
-	and	w25, w25, 65535
-	orr	w8, w23, w8, lsl 10
-	str	w8, [x11, 4]
-.L2117:
-	add	x2, x2, 2
-.L2132:
-	cmp	x2, x1
-	bne	.L2118
-	ldr	w2, [x29, 176]
-	mov	w1, w25
-	str	x5, [x29, 112]
-	str	w4, [x29, 120]
-	str	w7, [x29, 128]
-	str	w6, [x29, 136]
-	str	w3, [x29, 152]
-	bl	FlashReadPages
-	adrp	x1, .LANCHOR8
-	mov	w2, 56
-	ldr	w0, [x24, #:lo12:.LANCHOR133]
-	sxtw	x12, w23
-	ldrb	w10, [x1, #:lo12:.LANCHOR8]
-	mov	w11, 1
-	ldr	x1, [x22, #:lo12:.LANCHOR177]
-	ldr	w4, [x29, 120]
-	ldr	w7, [x29, 128]
-	ldr	w6, [x29, 136]
-	ldr	w3, [x29, 152]
-	nop // between mem op and mult-accumulate
-	umaddl	x25, w25, w2, x1
-	ldr	x5, [x29, 112]
-	mov	w2, 0
-.L2119:
-	cmp	x25, x1
-	bne	.L2129
-	cbz	w2, .L2130
-	str	w0, [x24, #:lo12:.LANCHOR133]
-.L2130:
-	add	w23, w23, 1
-	and	w23, w23, 65535
-	b	.L2116
-.L2129:
-	ldr	w8, [x1]
-	cbnz	w8, .L2120
-	ldr	x8, [x1, 16]
-	ldrh	w13, [x8]
-	cmp	w13, w4
-	beq	.L2175
-	ldr	w8, [x8, 4]
-	cmn	w8, #1
-	beq	.L2175
-	cmn	w3, #1
-	bne	.L2177
-	ldrh	w2, [x5, x12, lsl 1]
-	cmp	w2, w4
-	bne	.L2122
-	cbz	w10, .L2177
+	cmp	w19, w20
+	ble	.L2122
+	mov	w0, -1
+.L2114:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 160
+	ret
 .L2122:
-	cmp	w21, w0
-	mov	w2, w11
-	csel	w3, w3, w0, eq
+	add	w0, w20, w26
+	mov	w2, 1
+	lsl	w0, w0, 10
+	mov	w1, w2
+	str	w0, [x29, 108]
+	add	x0, x29, 104
+	bl	FlashReadPages
+	ldr	w0, [x29, 104]
+	cmn	w0, #1
+	beq	.L2116
+	ldr	x0, [x22, #:lo12:.LANCHOR197]
+	ldrh	w0, [x0]
+	cmp	w0, w27
+	bne	.L2116
+	cbz	x23, .L2123
+	cbz	w25, .L2118
 .L2121:
+	ldr	x1, [x21, #:lo12:.LANCHOR147]
+	mov	w2, w24
+	mov	x0, x23
+	bl	ftl_memcpy
+	mov	w3, 4
+	adrp	x0, .LC54
+	mov	w2, w3
+	mov	x1, x23
+	add	x0, x0, :lo12:.LC54
+	bl	rknand_print_hex
+.L2123:
+	mov	w0, 0
+	b	.L2114
+.L2118:
+	ldr	x5, [x21, #:lo12:.LANCHOR147]
+	adrp	x2, .LANCHOR149
+	add	x2, x2, :lo12:.LANCHOR149
+	mov	w0, 0
+	mov	w6, 1
+.L2119:
+	ldr	w1, [x2]
+	cmp	w0, w1
+	bcs	.L2121
+	ubfx	x1, x0, 5, 11
+	and	w3, w0, 31
+	lsl	x1, x1, 2
+	add	w0, w0, 1
+	lsl	w4, w6, w3
+	and	w0, w0, 65535
+	ldr	w3, [x5, x1]
+	orr	w3, w3, w4
+	str	w3, [x5, x1]
+	b	.L2119
+.L2116:
+	sub	w20, w20, #1
+	and	w20, w20, 65535
+	b	.L2115
+	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
+	.section	.text.FlashGetBadBlockList,"ax",@progbits
+	.align	2
+	.global	FlashGetBadBlockList
+	.type	FlashGetBadBlockList, %function
+FlashGetBadBlockList:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x20, x0
+	adrp	x0, .LANCHOR18
+	ldr	x0, [x0, #:lo12:.LANCHOR18]
+	ldrh	w19, [x0, 14]
+	str	x21, [sp, 32]
+	adrp	x21, .LANCHOR153
+	ldrb	w2, [x0, 13]
+	ldr	x0, [x21, #:lo12:.LANCHOR153]
+	mul	w19, w19, w2
+	and	w19, w19, 65535
+	add	w2, w19, 7
+	lsr	w2, w2, 3
+	bl	FlashReadFacBbtData
+	cmn	w0, #1
+	bne	.L2129
+.L2133:
+	mov	w0, 0
+.L2130:
+	ubfiz	x0, x0, 1, 16
+	mov	w1, -1
+	ldr	x21, [sp, 32]
+	strh	w1, [x20, x0]
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+.L2129:
+	ldr	x4, [x21, #:lo12:.LANCHOR153]
+	lsr	w5, w19, 4
+	sub	w19, w19, #1
+	mov	w1, 0
+	mov	w0, 0
+	mov	w6, 1
+.L2131:
+	cmp	w1, w19
+	bge	.L2130
+	ubfx	x3, x1, 5, 11
+	and	w2, w1, 31
+	lsl	w2, w6, w2
+	ldr	w3, [x4, x3, lsl 2]
+	tst	w2, w3
+	beq	.L2132
+	add	w2, w0, 1
+	ubfiz	x0, x0, 1, 16
+	strh	w1, [x20, x0]
+	and	w0, w2, 65535
+.L2132:
+	cmp	w0, w5
+	bcs	.L2133
+	add	w1, w1, 1
+	and	w1, w1, 65535
+	b	.L2131
+	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
+	.section	.text.FtlMakeBbt,"ax",@progbits
+	.align	2
+	.global	FtlMakeBbt
+	.type	FtlMakeBbt, %function
+FtlMakeBbt:
+	stp	x29, x30, [sp, -128]!
+	adrp	x0, .LANCHOR77
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	ldr	w21, [x0, #:lo12:.LANCHOR77]
+	stp	x19, x20, [sp, 16]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	cbnz	w21, .L2140
+	bl	FtlBbtMemInit
+	adrp	x20, .LANCHOR75
+	add	x22, x20, :lo12:.LANCHOR75
+	bl	FtlLoadFactoryBbt
+	add	x24, x22, 32
+	adrp	x28, .LANCHOR202
+	add	x22, x22, 12
+	add	x25, x28, :lo12:.LANCHOR202
+	adrp	x0, .LANCHOR45
+	add	x0, x0, :lo12:.LANCHOR45
+	str	x0, [x29, 120]
+.L2141:
+	ldr	x0, [x29, 120]
+	ldrh	w0, [x0]
+	cmp	w21, w0
+	bcc	.L2147
+	adrp	x21, .LANCHOR60
+	add	x21, x21, :lo12:.LANCHOR60
+	mov	w19, 0
+.L2148:
+	ldrh	w0, [x21]
+	cmp	w0, w19
+	bhi	.L2149
+	add	x21, x20, :lo12:.LANCHOR75
+	mov	w22, 65535
+	ldrh	w19, [x21, 12]
+	sub	w19, w19, #1
+	and	w19, w19, 65535
+.L2150:
+	ldrh	w0, [x21, 12]
+	sub	w0, w0, #47
+	cmp	w0, w19
+	bgt	.L2154
+	mov	w0, w19
+	bl	FtlBbmIsBadBlock
+	cmp	w0, 1
+	beq	.L2151
+	mov	w0, w19
+	bl	FlashTestBlk
+	cbz	w0, .L2152
+	mov	w0, w19
+	bl	FtlBbmMapBadBlock
+.L2151:
+	sub	w19, w19, #1
+	and	w19, w19, 65535
+	b	.L2150
+.L2147:
+	adrp	x2, .LANCHOR188
+	adrp	x0, .LANCHOR183
+	add	x19, x28, :lo12:.LANCHOR202
+	ldrh	w1, [x22]
+	ldr	x0, [x0, #:lo12:.LANCHOR183]
+	mov	w3, 65535
+	ldr	x26, [x2, #:lo12:.LANCHOR188]
+	cmp	w1, w3
+	stp	x0, x26, [x19, 8]
+	adrp	x23, .LANCHOR51
+	str	x2, [x29, 112]
+	beq	.L2142
+	ldrh	w4, [x23, #:lo12:.LANCHOR51]
+	mov	w2, 1
+	madd	w27, w4, w21, w1
+	mov	w1, w2
+	lsl	w0, w27, 10
+	str	w0, [x19, 4]
+	mov	x0, x19
+	bl	FlashReadPages
+	ldr	x1, [x19, 8]
+	ldr	x0, [x24]
+	ldrh	w2, [x23, #:lo12:.LANCHOR51]
+	add	w2, w2, 7
+	lsr	w2, w2, 3
+	bl	ftl_memcpy
+.L2143:
+	mov	w0, w27
+	add	w21, w21, 1
+	bl	FtlBbmMapBadBlock
+	add	x24, x24, 8
+	add	x22, x22, 2
+	b	.L2141
+.L2142:
+	mov	w1, w21
+	bl	FlashGetBadBlockList
+	ldr	x0, [x19, 8]
+	adrp	x27, .LANCHOR123
+	ldr	x1, [x24]
+	bl	FtlBbt2Bitmap
+	ldrh	w19, [x23, #:lo12:.LANCHOR51]
+	add	x23, x23, :lo12:.LANCHOR51
+	add	x0, x27, :lo12:.LANCHOR123
+	sub	w19, w19, #1
+	str	x0, [x29, 104]
+	and	w19, w19, 65535
+.L2144:
+	ldrh	w0, [x23]
+	madd	w0, w21, w0, w19
+	bl	FtlBbmIsBadBlock
+	cmp	w0, 1
+	beq	.L2145
+	ldr	x0, [x29, 112]
+	mov	w2, 16
+	strh	w19, [x22]
+	mov	w1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR188]
+	bl	ftl_memset
+	mov	w0, -3872
+	strh	w0, [x26]
+	ldrh	w4, [x23]
+	ldrh	w0, [x22]
+	strh	w0, [x26, 2]
+	ldr	x1, [x24]
+	str	wzr, [x26, 4]
+	madd	w27, w4, w21, w0
+	lsl	w0, w27, 10
+	str	w0, [x25, 4]
+	ldr	x0, [x29, 104]
+	ldrh	w2, [x0]
+	ldr	x0, [x25, 8]
+	lsl	w2, w2, 2
+	bl	ftl_memcpy
+	mov	w2, 1
+	mov	x0, x25
+	mov	w1, w2
+	bl	FlashEraseBlocks
+	mov	w3, 1
+	mov	x0, x25
+	mov	w2, w3
+	mov	w1, w3
+	bl	FlashProgPages
+	ldr	w0, [x25]
+	cmn	w0, #1
+	bne	.L2143
+	mov	w0, w27
+	bl	FtlBbmMapBadBlock
+	b	.L2144
+.L2145:
+	sub	w19, w19, #1
+	and	w19, w19, 65535
+	b	.L2144
+.L2149:
+	mov	w0, w19
+	add	w19, w19, 1
+	bl	FtlBbmMapBadBlock
+	and	w19, w19, 65535
+	b	.L2148
+.L2152:
+	ldrh	w0, [x21]
+	cmp	w0, w22
+	bne	.L2153
+	strh	w19, [x21]
+	b	.L2151
+.L2153:
+	strh	w19, [x21, 4]
+.L2154:
+	adrp	x0, .LANCHOR78
+	add	x19, x20, :lo12:.LANCHOR75
+	ldrh	w1, [x20, #:lo12:.LANCHOR75]
+	mov	w2, 2
+	ldr	x0, [x0, #:lo12:.LANCHOR78]
+	str	wzr, [x19, 8]
+	lsl	w1, w1, 10
+	strh	wzr, [x19, 2]
+	str	w1, [x0, 4]
+	ldrh	w1, [x19, 4]
+	lsl	w1, w1, 10
+	str	w1, [x0, 60]
+	mov	w1, 1
+	bl	FlashEraseBlocks
+	ldrh	w0, [x20, #:lo12:.LANCHOR75]
+	bl	FtlBbmMapBadBlock
+	ldrh	w0, [x19, 4]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	strh	wzr, [x19, 2]
+	ldr	w0, [x19, 8]
+	ldrh	w1, [x19, 4]
+	add	w0, w0, 1
+	str	w0, [x19, 8]
+	ldrh	w0, [x20, #:lo12:.LANCHOR75]
+	strh	w0, [x19, 4]
+	strh	w1, [x20, #:lo12:.LANCHOR75]
+	bl	FtlBbmTblFlush
+.L2140:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+	.size	FtlMakeBbt, .-FtlMakeBbt
+	.section	.text.log2phys,"ax",@progbits
+	.align	2
+	.global	log2phys
+	.type	log2phys, %function
+log2phys:
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x25, x26, [sp, 64]
+	mov	x26, x1
+	adrp	x1, .LANCHOR57
+	stp	x21, x22, [sp, 32]
+	str	w2, [x29, 120]
+	ldrh	w1, [x1, #:lo12:.LANCHOR57]
+	stp	x19, x20, [sp, 16]
+	add	w2, w1, 7
+	mov	x1, 1
+	stp	x23, x24, [sp, 48]
+	lsl	x1, x1, x2
+	sub	w1, w1, #1
+	and	w1, w1, w0
+	stp	x27, x28, [sp, 80]
+	and	w1, w1, 65535
+	str	w1, [x29, 124]
+	adrp	x1, .LANCHOR73
+	lsr	w25, w0, w2
+	and	w22, w25, 65535
+	ldr	w1, [x1, #:lo12:.LANCHOR73]
+	cmp	w0, w1
+	bcc	.L2161
+	mov	w2, 888
+	adrp	x1, .LANCHOR227
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR227
+	add	x0, x0, :lo12:.LC5
+	bl	printf
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
+	bl	printf
+.L2161:
+	adrp	x19, .LANCHOR97
+	adrp	x0, .LANCHOR68
+	ldr	x2, [x19, #:lo12:.LANCHOR97]
+	ldrh	w1, [x0, #:lo12:.LANCHOR68]
+	mov	x0, 0
+.L2162:
+	and	x20, x0, 65535
+	cmp	w20, w1
+	bcc	.L2167
+	bl	select_l2p_ram_region
+	and	x20, x0, 65535
+	ldr	x1, [x19, #:lo12:.LANCHOR97]
+	ubfiz	x21, x20, 4, 16
+	add	x2, x1, x21
+	ldrh	w3, [x1, x21]
+	mov	w1, 65535
+	cmp	w3, w1
+	beq	.L2168
+	ldr	w1, [x2, 4]
+	tbz	w1, #31, .L2168
+	bl	flush_l2p_region
+.L2168:
+	adrp	x24, .LANCHOR67
+	ldrh	w0, [x24, #:lo12:.LANCHOR67]
+	cmp	w0, w22
+	bcs	.L2169
+	mov	w2, 526
+	adrp	x1, .LANCHOR228
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR228
+	add	x0, x0, :lo12:.LC5
+	bl	printf
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
+	bl	printf
+.L2169:
+	adrp	x1, .LANCHOR131
+	ubfiz	x0, x22, 2, 16
+	str	x1, [x29, 112]
+	ldr	x2, [x1, #:lo12:.LANCHOR131]
+	ldr	w28, [x2, x0]
+	cbnz	w28, .L2170
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	adrp	x1, .LANCHOR58
+	add	x0, x0, x21
+	ldrh	w2, [x1, #:lo12:.LANCHOR58]
+	mov	w1, 255
+	ldr	x0, [x0, 8]
+	bl	ftl_memset
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	add	x1, x0, x21
+	strh	w22, [x0, x21]
+	str	wzr, [x1, 4]
+	b	.L2163
+.L2167:
+	add	x0, x0, 1
+	add	x3, x2, x0, lsl 4
+	ldrh	w3, [x3, -16]
+	cmp	w3, w22
+	bne	.L2162
+.L2163:
+	ldp	w0, w1, [x29, 120]
+	cbnz	w0, .L2164
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	add	x0, x0, x20, lsl 4
+	ldr	x0, [x0, 8]
+	ldr	w0, [x0, x1, lsl 2]
+	str	w0, [x26]
+.L2165:
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	add	x20, x0, x20, lsl 4
+	ldr	w0, [x20, 4]
+	cmn	w0, #1
+	beq	.L2175
+	add	w0, w0, 1
+	str	w0, [x20, 4]
+.L2175:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+.L2164:
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	ldr	w3, [x26]
+	add	x0, x0, x20, lsl 4
+	ldr	x2, [x0, 8]
+	str	w3, [x2, x1, lsl 2]
+	ldr	w1, [x0, 4]
+	orr	w1, w1, -2147483648
+	str	w1, [x0, 4]
+	adrp	x0, .LANCHOR98
+	strh	w22, [x0, #:lo12:.LANCHOR98]
+	b	.L2165
+.L2170:
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	adrp	x23, .LANCHOR202
+	add	x27, x23, :lo12:.LANCHOR202
+	mov	w2, 1
+	add	x0, x0, x21
+	mov	w1, w2
+	str	w28, [x27, 4]
+	ldr	x0, [x0, 8]
+	str	x0, [x27, 8]
+	adrp	x0, .LANCHOR188
+	ldr	x0, [x0, #:lo12:.LANCHOR188]
+	str	x0, [x27, 16]
+	mov	x0, x27
+	bl	FlashReadPages
+	ldr	x27, [x27, 16]
+	ldr	w0, [x23, #:lo12:.LANCHOR202]
+	cmp	w0, 256
+	bne	.L2171
+	and	w4, w25, 65535
+	mov	w2, w28
+	mov	w1, w4
+	str	w4, [x29, 108]
+	adrp	x0, .LC55
+	add	x0, x0, :lo12:.LC55
+	bl	printf
+	adrp	x0, .LANCHOR127
+	add	x0, x0, :lo12:.LANCHOR127
+	lsr	w1, w28, 10
+	ldr	w4, [x29, 108]
+	strh	w1, [x0, 60]
+	ldr	x1, [x19, #:lo12:.LANCHOR97]
+	add	x1, x1, x21
+	ldr	x2, [x1, 8]
+	mov	w1, w4
+	bl	FtlMapWritePage
+.L2171:
+	ldrh	w0, [x27, 8]
+	cmp	w0, w22
+	beq	.L2172
+	add	x23, x23, :lo12:.LANCHOR202
+	mov	w2, w28
+	and	w1, w25, 65535
+	adrp	x0, .LC56
+	add	x0, x0, :lo12:.LC56
+	bl	printf
+	ldr	x1, [x23, 16]
+	mov	w3, 4
+	adrp	x0, .LC27
+	mov	w2, w3
+	add	x0, x0, :lo12:.LC27
+	bl	rknand_print_hex
+	ldr	x0, [x29, 112]
+	mov	w2, 4
+	ldrh	w3, [x24, #:lo12:.LANCHOR67]
+	ldr	x1, [x0, #:lo12:.LANCHOR131]
+	adrp	x0, .LC57
+	add	x0, x0, :lo12:.LC57
+	bl	rknand_print_hex
+	adrp	x0, .LANCHOR77
+	mov	w1, 1
+	str	w1, [x0, #:lo12:.LANCHOR77]
+.L2172:
+	ldrh	w0, [x27, 8]
+	cmp	w0, w22
+	beq	.L2173
+	mov	w2, 553
+	adrp	x1, .LANCHOR228
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR228
+	add	x0, x0, :lo12:.LC5
+	bl	printf
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
+	bl	printf
+.L2173:
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	add	x1, x0, x21
+	str	wzr, [x1, 4]
+	strh	w22, [x0, x21]
+	b	.L2163
+	.size	log2phys, .-log2phys
+	.section	.text.FtlProgPages,"ax",@progbits
+	.align	2
+	.global	FtlProgPages
+	.type	FtlProgPages, %function
+FtlProgPages:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR77
+	stp	x19, x20, [sp, 16]
+	ldr	w2, [x23, #:lo12:.LANCHOR77]
+	stp	x21, x22, [sp, 32]
+	stp	x25, x26, [sp, 64]
+	cbnz	w2, .L2180
+	adrp	x2, .LANCHOR8
+	ldrb	w2, [x2, #:lo12:.LANCHOR8]
+	cbz	w2, .L2195
+	ldrb	w2, [x3, 8]
+	cmp	w2, 1
+	cset	w22, eq
+.L2182:
+	mov	x20, x3
+	ldrb	w3, [x3, 9]
+	mov	w21, w1
+	mov	x19, x0
+	mov	w2, w22
+	adrp	x25, .LANCHOR53
+	adrp	x24, .LANCHOR138
+	add	x25, x25, :lo12:.LANCHOR53
+	bl	FlashProgPages
+	add	x24, x24, :lo12:.LANCHOR138
+	mov	w1, 56
+	umaddl	x21, w21, w1, x19
+.L2183:
+	cmp	x19, x21
+	beq	.L2192
+	adrp	x26, .LANCHOR84
+	b	.L2193
+.L2195:
+	mov	w22, 0
+	b	.L2182
+.L2186:
+	ldr	w0, [x19, 4]
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+	ldrh	w1, [x20]
+	cmp	w1, w0, uxth
+	bne	.L2184
+	ldr	x2, [x26, #:lo12:.LANCHOR84]
+	ubfiz	x1, x1, 1, 16
+	ldrh	w3, [x20, 4]
+	ldrh	w0, [x2, x1]
+	sub	w0, w0, w3
+	strh	w0, [x2, x1]
+	strb	wzr, [x20, 6]
+	ldrh	w0, [x25]
+	strh	w0, [x20, 2]
+	strh	wzr, [x20, 4]
+.L2184:
+	ldrh	w0, [x20, 4]
+	cbnz	w0, .L2185
+	mov	x0, x20
+	bl	allocate_new_data_superblock
+.L2185:
+	ldr	w0, [x24, 96]
+	add	w0, w0, 1
+	str	w0, [x24, 96]
+	ldr	w0, [x19, 4]
+	lsr	w0, w0, 10
+	bl	FtlGcMarkBadPhyBlk
+	mov	x0, x20
+	bl	get_new_active_ppa
+	str	w0, [x19, 4]
+	mov	w2, w22
+	str	w0, [x29, 92]
+	mov	w1, 1
+	ldrb	w3, [x20, 9]
+	mov	x0, x19
+	bl	FlashProgPages
+	ldr	w0, [x23, #:lo12:.LANCHOR77]
+	cbnz	w0, .L2180
+.L2193:
+	ldr	w0, [x19]
+	cmn	w0, #1
+	beq	.L2186
+	adrp	x0, .LANCHOR38
+	ldrb	w1, [x20, 6]
+	ldrh	w0, [x0, #:lo12:.LANCHOR38]
+	cmp	w1, w0
+	bcc	.L2187
+	mov	w2, 1583
+	adrp	x1, .LANCHOR229
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR229
+	add	x0, x0, :lo12:.LC5
+	bl	printf
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
+	bl	printf
+.L2187:
+	ldr	w0, [x19, 4]
+	cbnz	w22, .L2188
+.L2200:
+	str	w0, [x29, 92]
+	add	x1, x29, 92
+	ldr	w0, [x19, 24]
+	mov	w2, 1
+	bl	log2phys
+	ldr	x0, [x19, 16]
+	ldr	w3, [x0, 12]
+	lsr	w0, w3, 10
+	bl	P2V_block_in_plane
+	and	w1, w0, 65535
+	mov	w26, w1
+	cmn	w3, #1
+	beq	.L2190
+	adrp	x2, .LANCHOR84
+	ubfiz	x0, x1, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR84]
+	ldrh	w0, [x2, x0]
+	cbnz	w0, .L2191
+	adrp	x0, .LC58
+	mov	w2, 0
+	add	x0, x0, :lo12:.LC58
+	bl	printf
+.L2191:
+	mov	w0, w26
+	bl	decrement_vpc_count
+.L2190:
+	add	x19, x19, 56
+	b	.L2183
+.L2188:
+	orr	w0, w0, -2147483648
+	b	.L2200
+.L2192:
+	adrp	x0, .LANCHOR38
+	ldrb	w1, [x20, 6]
+	ldrh	w0, [x0, #:lo12:.LANCHOR38]
+	cmp	w1, w0
+	bcc	.L2180
+	mov	w2, 1600
+	adrp	x1, .LANCHOR229
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR229
+	add	x0, x0, :lo12:.LC5
+	bl	printf
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
+	bl	printf
+.L2180:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	ret
+	.size	FtlProgPages, .-FtlProgPages
+	.section	.text.FtlCacheWriteBack,"ax",@progbits
+	.align	2
+	.global	FtlCacheWriteBack
+	.type	FtlCacheWriteBack, %function
+FtlCacheWriteBack:
+	adrp	x0, .LANCHOR77
+	ldr	w0, [x0, #:lo12:.LANCHOR77]
+	cbnz	w0, .L2207
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	adrp	x19, .LANCHOR132
+	ldr	x0, [x19, #:lo12:.LANCHOR132]
+	cbz	x0, .L2202
+	adrp	x1, .LANCHOR230
+	mov	w2, 0
+	ldr	x3, [x1, #:lo12:.LANCHOR230]
+	mov	w1, 1
+	bl	FtlProgPages
+	str	xzr, [x19, #:lo12:.LANCHOR132]
+.L2202:
+	mov	w0, 0
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L2207:
+	mov	w0, 0
+	ret
+	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
+	.section	.text.FtlSysFlush,"ax",@progbits
+	.align	2
+	.global	FtlSysFlush
+	.type	FtlSysFlush, %function
+FtlSysFlush:
+	adrp	x0, .LANCHOR77
+	ldr	w0, [x0, #:lo12:.LANCHOR77]
+	cbnz	w0, .L2213
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	bl	FtlCacheWriteBack
+	bl	l2p_flush
+	mov	w0, 1
+	bl	FtlEctTblFlush
+	bl	FtlVpcTblFlush
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+.L2213:
+	mov	w0, 0
+	ret
+	.size	FtlSysFlush, .-FtlSysFlush
+	.section	.text.FtlDeInit,"ax",@progbits
+	.align	2
+	.global	FtlDeInit
+	.type	FtlDeInit, %function
+FtlDeInit:
+	adrp	x0, .LANCHOR231
+	ldr	w0, [x0, #:lo12:.LANCHOR231]
+	cmp	w0, 1
+	bne	.L2219
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	bl	FtlSysFlush
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+.L2219:
+	mov	w0, 0
+	ret
+	.size	FtlDeInit, .-FtlDeInit
+	.section	.text.rk_ftl_de_init,"ax",@progbits
+	.align	2
+	.global	rk_ftl_de_init
+	.type	rk_ftl_de_init, %function
+rk_ftl_de_init:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	bl	FlashDeInit
+	bl	FtlDeInit
+	ldp	x29, x30, [sp], 16
+	b	FlashDeInit
+	.size	rk_ftl_de_init, .-rk_ftl_de_init
+	.section	.text.ftl_discard,"ax",@progbits
+	.align	2
+	.global	ftl_discard
+	.type	ftl_discard, %function
+ftl_discard:
+	stp	x29, x30, [sp, -80]!
+	adrp	x0, .LANCHOR69
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w20, w1
+	ldr	w0, [x0, #:lo12:.LANCHOR69]
+	add	w1, w1, w2
+	stp	x21, x22, [sp, 32]
+	str	x23, [sp, 48]
+	cmp	w1, w0
+	bhi	.L2232
+	mov	w19, w2
+	cmp	w2, 31
+	bhi	.L2226
+.L2240:
+	mov	w0, 0
+.L2224:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	ret
+.L2226:
+	adrp	x0, .LANCHOR77
+	ldr	w0, [x0, #:lo12:.LANCHOR77]
+	cbnz	w0, .L2240
+	adrp	x22, .LANCHOR56
+	bl	FtlCacheWriteBack
+	ldrh	w0, [x22, #:lo12:.LANCHOR56]
+	udiv	w21, w20, w0
+	msub	w20, w0, w21, w20
+	ands	w20, w20, 65535
+	beq	.L2228
+	sub	w0, w0, w20
+	add	w21, w21, 1
+	cmp	w0, w19
+	csel	w0, w0, w19, ls
+	sub	w19, w19, w0, uxth
+.L2228:
+	adrp	x20, .LANCHOR232
+	adrp	x23, .LANCHOR163
+	add	x20, x20, :lo12:.LANCHOR232
+	add	x23, x23, :lo12:.LANCHOR163
+	mov	w0, -1
+	str	w0, [x29, 76]
+.L2229:
+	ldrh	w0, [x22, #:lo12:.LANCHOR56]
+	cmp	w19, w0
+	bcs	.L2231
+	adrp	x0, .LANCHOR232
+	ldr	w1, [x0, #:lo12:.LANCHOR232]
+	cmp	w1, 32
+	bls	.L2240
+	str	wzr, [x0, #:lo12:.LANCHOR232]
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	b	.L2240
+.L2231:
+	mov	w2, 0
+	add	x1, x29, 72
+	mov	w0, w21
+	bl	log2phys
+	ldr	w0, [x29, 72]
+	cmn	w0, #1
+	beq	.L2230
+	ldr	w0, [x20]
+	mov	w2, 1
+	add	x1, x29, 76
+	add	w0, w0, 1
+	str	w0, [x20]
+	ldr	w0, [x23]
+	add	w0, w0, 1
+	str	w0, [x23]
+	mov	w0, w21
+	bl	log2phys
+	ldr	w0, [x29, 72]
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+	bl	decrement_vpc_count
+.L2230:
+	ldrh	w0, [x22, #:lo12:.LANCHOR56]
+	add	w21, w21, 1
+	sub	w19, w19, w0
+	b	.L2229
+.L2232:
+	mov	w0, -1
+	b	.L2224
+	.size	ftl_discard, .-ftl_discard
+	.section	.text.Ftlscanalldata,"ax",@progbits
+	.align	2
+	.global	Ftlscanalldata
+	.type	Ftlscanalldata, %function
+Ftlscanalldata:
+	sub	sp, sp, #96
+	adrp	x0, .LC59
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC59
+	stp	x29, x30, [sp, 16]
+	add	x29, sp, 16
+	stp	x19, x20, [sp, 32]
+	adrp	x20, .LANCHOR202
+	stp	x21, x22, [sp, 48]
+	mov	w19, 0
+	adrp	x21, .LANCHOR73
+	add	x22, x20, :lo12:.LANCHOR202
+	add	x21, x21, :lo12:.LANCHOR73
+	str	x23, [sp, 64]
+	bl	printf
+.L2242:
+	ldr	w0, [x21]
+	cmp	w19, w0
+	bcc	.L2248
+	ldp	x19, x20, [sp, 32]
+	ldp	x21, x22, [sp, 48]
+	ldp	x29, x30, [sp, 16]
+	ldr	x23, [sp, 64]
+	add	sp, sp, 96
+	ret
+.L2248:
+	mov	w2, 0
+	add	x1, x29, 76
+	mov	w0, w19
+	bl	log2phys
+	tst	x19, 2047
+	bne	.L2243
+	ldr	w2, [x29, 76]
+	adrp	x0, .LC60
+	mov	w1, w19
+	add	x0, x0, :lo12:.LC60
+	bl	printf
+.L2243:
+	ldr	w1, [x29, 76]
+	cmn	w1, #1
+	beq	.L2245
+	add	x0, x20, :lo12:.LANCHOR202
+	str	wzr, [x20, #:lo12:.LANCHOR202]
+	mov	w2, 0
+	str	w1, [x0, 4]
+	adrp	x1, .LANCHOR183
+	str	w19, [x0, 24]
+	ldr	x1, [x1, #:lo12:.LANCHOR183]
+	str	x1, [x0, 8]
+	adrp	x1, .LANCHOR188
+	ldr	x23, [x1, #:lo12:.LANCHOR188]
+	mov	w1, 1
+	str	x23, [x0, 16]
+	bl	FlashReadPages
+	ldr	w0, [x20, #:lo12:.LANCHOR202]
+	cmp	w0, 256
+	ccmn	w0, #1, 4, ne
+	beq	.L2246
+	ldr	w0, [x23, 8]
+	cmp	w19, w0
+	beq	.L2245
+.L2246:
+	ldp	x1, x0, [x22, 8]
+	ldr	w2, [x1, 4]
+	str	w2, [sp]
+	ldr	w2, [x22, 4]
+	ldp	w3, w4, [x0]
+	ldp	w5, w6, [x0, 8]
+	adrp	x0, .LC61
+	ldr	w7, [x1]
+	add	x0, x0, :lo12:.LC61
+	mov	w1, w19
+	bl	printf
+.L2245:
+	add	w19, w19, 1
+	b	.L2242
+	.size	Ftlscanalldata, .-Ftlscanalldata
+	.section	.text.FtlReUsePrevPpa,"ax",@progbits
+	.align	2
+	.global	FtlReUsePrevPpa
+	.type	FtlReUsePrevPpa, %function
+FtlReUsePrevPpa:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR84
+	stp	x19, x20, [sp, 16]
+	mov	w21, w0
+	str	w1, [x29, 76]
+	lsr	w0, w1, 10
+	str	x23, [sp, 48]
+	bl	P2V_block_in_plane
+	ldr	x2, [x22, #:lo12:.LANCHOR84]
+	and	w3, w0, 65535
+	ubfiz	x20, x3, 1, 16
+	ldrh	w1, [x2, x20]
+	cbnz	w1, .L2251
+	adrp	x0, .LANCHOR88
+	ldr	x19, [x0, #:lo12:.LANCHOR88]
+	cbz	x19, .L2252
+	adrp	x2, .LANCHOR82
+	mov	x5, -6148914691236517206
+	movk	x5, 0xaaab, lsl 0
+	adrp	x23, .LANCHOR89
+	ldr	x2, [x2, #:lo12:.LANCHOR82]
+	mov	w6, 65535
+	ldrh	w4, [x23, #:lo12:.LANCHOR89]
+	sub	x19, x19, x2
+	asr	x19, x19, 1
+	mul	x19, x19, x5
+	mov	w5, 6
+	and	w19, w19, 65535
+.L2253:
+	cmp	w1, w4
+	beq	.L2252
+	cmp	w19, w3
+	bne	.L2254
+	mov	w1, w19
+	add	x0, x0, :lo12:.LANCHOR88
+	bl	List_remove_node
+	ldrh	w0, [x23, #:lo12:.LANCHOR89]
+	cbnz	w0, .L2255
+	mov	w2, 2140
+	adrp	x1, .LANCHOR233
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR233
+	add	x0, x0, :lo12:.LC5
+	bl	printf
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
+	bl	printf
+.L2255:
+	ldrh	w0, [x23, #:lo12:.LANCHOR89]
+	sub	w0, w0, #1
+	strh	w0, [x23, #:lo12:.LANCHOR89]
+	mov	w0, w19
+	bl	INSERT_DATA_LIST
+	ldr	x1, [x22, #:lo12:.LANCHOR84]
+	ldrh	w0, [x1, x20]
+	add	w0, w0, 1
+	strh	w0, [x1, x20]
+.L2252:
+	add	x1, x29, 76
+	mov	w2, 1
+	mov	w0, w21
+	bl	log2phys
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	ret
+.L2254:
+	umull	x19, w19, w5
+	ldrh	w19, [x2, x19]
+	cmp	w19, w6
+	beq	.L2252
+	add	w1, w1, 1
+	and	w1, w1, 65535
+	b	.L2253
+.L2251:
+	add	w1, w1, 1
+	strh	w1, [x2, x20]
+	b	.L2252
+	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
+	.section	.text.FtlRecoverySuperblock,"ax",@progbits
+	.align	2
+	.global	FtlRecoverySuperblock
+	.type	FtlRecoverySuperblock, %function
+FtlRecoverySuperblock:
+	stp	x29, x30, [sp, -208]!
+	mov	w1, 65535
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	stp	x21, x22, [sp, 32]
+	ldrh	w0, [x0]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	cmp	w0, w1
+	stp	x27, x28, [sp, 80]
+	beq	.L2420
+	ldrb	w0, [x19, 6]
+	str	w0, [x29, 180]
+	adrp	x0, .LANCHOR53
+	ldrh	w26, [x19, 2]
+	str	x0, [x29, 144]
+	ldrh	w2, [x0, #:lo12:.LANCHOR53]
+	cmp	w2, w26
+	bne	.L2264
+	strh	wzr, [x19, 4]
+.L2427:
+	strb	wzr, [x19, 6]
+.L2420:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 208
+	ret
+.L2264:
+	ldrh	w0, [x19, 16]
+	mov	w21, 0
+.L2265:
+	cmp	w0, w1
+	beq	.L2266
+	ldrb	w1, [x19, 8]
+	cmp	w1, 1
+	bne	.L2267
+	bl	FtlGetLastWrittenPage
+	mov	w20, w0
+	cmn	w0, #1
+	beq	.L2268
+	adrp	x0, .LANCHOR8
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	cbnz	w0, .L2345
+	adrp	x0, .LANCHOR16
+	add	x0, x0, :lo12:.LANCHOR16
+	ldrh	w23, [x0, w20, sxtw 1]
+.L2269:
+	adrp	x1, .LANCHOR106
+	adrp	x2, .LANCHOR38
+	adrp	x22, .LANCHOR180
+	add	x4, x19, 16
+	ldr	x6, [x1, #:lo12:.LANCHOR106]
+	adrp	x1, .LANCHOR59
+	ldr	x0, [x22, #:lo12:.LANCHOR180]
+	mov	w27, 0
+	ldrh	w7, [x1, #:lo12:.LANCHOR59]
+	add	x1, x19, 16
+	str	x1, [x29, 184]
+	mov	w8, 65535
+	ldrh	w1, [x2, #:lo12:.LANCHOR38]
+	mov	w10, 56
+	str	x2, [x29, 160]
+	add	x1, x1, 8
+	add	x1, x19, x1, lsl 1
+.L2270:
+	cmp	x1, x4
+	bne	.L2274
+	ldrb	w1, [x19, 8]
+	cmp	w1, 1
+	bne	.L2346
+	adrp	x1, .LANCHOR8
+	ldrb	w1, [x1, #:lo12:.LANCHOR8]
+	cmp	w1, 0
+	cset	w1, ne
+	str	w1, [x29, 176]
+.L2275:
+	ldr	w2, [x29, 176]
+	mov	w1, w27
+	adrp	x24, .LC62
+	adrp	x25, .LANCHOR235
+	add	x24, x24, :lo12:.LC62
+	add	x25, x25, :lo12:.LANCHOR235
+	mov	x28, 0
+	bl	FlashReadPages
+	adrp	x0, .LANCHOR160
+	mov	w5, 65535
+	str	x0, [x29, 168]
+	ldr	w21, [x0, #:lo12:.LANCHOR160]
+	sub	w21, w21, #1
+.L2276:
+	and	w0, w28, 65535
+	cmp	w27, w0
+	bhi	.L2281
+	bne	.L2279
+	ldr	x0, [x22, #:lo12:.LANCHOR180]
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	ldr	w0, [x0, 4]
+.L2422:
+	lsr	w0, w0, 10
+	bl	P2V_plane
+	ldrb	w1, [x19, 8]
+	and	w27, w0, 65535
+	cmp	w1, 1
+	bne	.L2283
+	adrp	x0, .LANCHOR8
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	cbnz	w0, .L2283
+	adrp	x0, .LANCHOR16
+	add	x0, x0, :lo12:.LANCHOR16
+	ldrh	w20, [x0, w20, sxtw 1]
+.L2283:
+	ldr	x0, [x29, 144]
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+	cmp	w0, w20
+	bne	.L2284
+	strh	w20, [x19, 2]
+	strb	wzr, [x19, 6]
+	strh	wzr, [x19, 4]
+.L2284:
+	ldr	w0, [x29, 180]
+	cmp	w20, w26
+	cset	w2, eq
+	cmp	w27, w0
+	cset	w0, eq
+	tst	w2, w0
+	beq	.L2285
+.L2428:
+	mov	w2, w27
+	mov	w1, w20
+	mov	x0, x19
+	bl	ftl_sb_update_avl_pages
+	b	.L2420
+.L2266:
+	add	w21, w21, 1
+	and	w21, w21, 65535
+	add	x0, x19, x21, sxtw 1
+	ldrh	w0, [x0, 16]
+	b	.L2265
+.L2267:
+	mov	w1, 0
+	bl	FtlGetLastWrittenPage
+	mov	w20, w0
+	cmn	w0, #1
+	beq	.L2268
+.L2345:
+	mov	w23, w20
+	b	.L2269
+.L2268:
+	cbz	w26, .L2271
+	mov	w2, 2211
+	adrp	x1, .LANCHOR234
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR234
+	add	x0, x0, :lo12:.LC5
+	bl	printf
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
+	bl	printf
+.L2271:
+	ldr	w0, [x29, 180]
+	cmp	w0, 0
+	ccmp	w21, w0, 4, ne
+	beq	.L2272
+	mov	w2, 2212
+	adrp	x1, .LANCHOR234
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR234
+	add	x0, x0, :lo12:.LC5
+	bl	printf
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
+	bl	printf
+.L2272:
+	strh	wzr, [x19, 2]
+	b	.L2427
+.L2274:
+	ldrh	w2, [x4]
+	cmp	w2, w8
+	beq	.L2273
+	umaddl	x5, w27, w10, x0
+	orr	w2, w23, w2, lsl 10
+	add	w3, w27, 1
+	str	w2, [x5, 4]
+	mul	w2, w27, w7
+	and	w27, w3, 65535
+	str	xzr, [x5, 8]
+	asr	w2, w2, 2
+	add	x2, x6, x2, sxtw 2
+	str	x2, [x5, 16]
+.L2273:
+	add	x4, x4, 2
+	b	.L2270
+.L2346:
+	str	wzr, [x29, 176]
+	b	.L2275
+.L2281:
+	mov	x0, 56
+	ldr	x2, [x22, #:lo12:.LANCHOR180]
+	mul	x0, x28, x0
+	add	x1, x2, x0
+	ldr	w0, [x2, x0]
+	cbnz	w0, .L2277
+	ldr	x6, [x1, 16]
+	ldr	w4, [x6, 4]
+	cmn	w4, #1
+	beq	.L2278
+	ldr	x0, [x29, 168]
+	ldr	w1, [x0, #:lo12:.LANCHOR160]
+	mov	w0, w4
+	bl	ftl_cmp_data_ver
+	cbz	w0, .L2278
+	ldr	x0, [x29, 168]
+	add	w4, w4, 1
+	str	w4, [x0, #:lo12:.LANCHOR160]
+.L2278:
+	ldr	w0, [x6]
+	cmn	w0, #1
+	bne	.L2280
+.L2279:
+	ldr	x0, [x22, #:lo12:.LANCHOR180]
+	and	x28, x28, 65535
+	mov	x1, 56
+	and	w20, w20, 65535
+	madd	x28, x28, x1, x0
+	ldr	w0, [x28, 4]
+	b	.L2422
+.L2277:
+	ldr	w1, [x1, 4]
+	mov	x0, x24
+	bl	printf
+	ldrh	w0, [x19]
+	and	w5, w23, 65535
+	strh	w0, [x25]
+.L2280:
+	add	x28, x28, 1
+	b	.L2276
+.L2285:
+	mov	w0, 65535
+	cmp	w5, w0
+	bne	.L2286
+	cbnz	w1, .L2287
+.L2286:
+	adrp	x24, .LANCHOR136
+	and	w6, w23, 65535
+	ldr	w0, [x24, #:lo12:.LANCHOR136]
+	cmn	w0, #1
+	bne	.L2288
+	str	w21, [x24, #:lo12:.LANCHOR136]
+.L2288:
+	add	w0, w26, 7
+	ldr	w7, [x24, #:lo12:.LANCHOR136]
+	cmp	w0, w23, uxth
+	bge	.L2347
+	sub	w23, w6, #7
+	and	w23, w23, 65535
+.L2289:
+	mov	w3, -1
+	adrp	x5, .LANCHOR120
+	mov	w28, w3
+	add	x5, x5, :lo12:.LANCHOR120
+	mov	w4, 65535
+.L2290:
+	cmp	w23, w6
+	bhi	.L2305
+	ldr	x1, [x29, 160]
+	mov	w25, 0
+	ldr	x0, [x22, #:lo12:.LANCHOR180]
+	mov	w10, 56
+	ldr	x2, [x29, 184]
+	ldrh	w1, [x1, #:lo12:.LANCHOR38]
+	add	x1, x1, 8
+	add	x1, x19, x1, lsl 1
+	b	.L2306
+.L2347:
+	mov	w23, w26
+	b	.L2289
+.L2292:
+	ldrh	w8, [x2]
+	cmp	w8, w4
+	beq	.L2291
+	umaddl	x11, w25, w10, x0
+	add	w25, w25, 1
+	and	w25, w25, 65535
+	orr	w8, w23, w8, lsl 10
+	str	w8, [x11, 4]
+.L2291:
+	add	x2, x2, 2
+.L2306:
+	cmp	x2, x1
+	bne	.L2292
+	ldr	w2, [x29, 176]
+	mov	w1, w25
+	str	x5, [x29, 112]
+	str	w4, [x29, 120]
+	str	w7, [x29, 128]
+	str	w6, [x29, 136]
+	str	w3, [x29, 152]
+	bl	FlashReadPages
+	adrp	x1, .LANCHOR8
+	mov	w2, 56
+	ldr	w0, [x24, #:lo12:.LANCHOR136]
+	sxtw	x12, w23
+	ldrb	w10, [x1, #:lo12:.LANCHOR8]
+	mov	w11, 1
+	ldr	x1, [x22, #:lo12:.LANCHOR180]
+	ldr	w4, [x29, 120]
+	ldr	w7, [x29, 128]
+	ldr	w6, [x29, 136]
+	ldr	w3, [x29, 152]
+	nop // between mem op and mult-accumulate
+	umaddl	x25, w25, w2, x1
+	ldr	x5, [x29, 112]
+	mov	w2, 0
+.L2293:
+	cmp	x25, x1
+	bne	.L2303
+	cbz	w2, .L2304
+	str	w0, [x24, #:lo12:.LANCHOR136]
+.L2304:
+	add	w23, w23, 1
+	and	w23, w23, 65535
+	b	.L2290
+.L2303:
+	ldr	w8, [x1]
+	cbnz	w8, .L2294
+	ldr	x8, [x1, 16]
+	ldrh	w13, [x8]
+	cmp	w13, w4
+	beq	.L2349
+	ldr	w8, [x8, 4]
+	cmn	w8, #1
+	beq	.L2349
+	cmn	w3, #1
+	bne	.L2351
+	ldrh	w2, [x5, x12, lsl 1]
+	cmp	w2, w4
+	bne	.L2296
+	cbz	w10, .L2351
+.L2296:
+	cmp	w21, w0
+	mov	w2, w11
+	csel	w3, w3, w0, eq
+.L2295:
 	mov	w28, w0
 	add	x1, x1, 56
 	mov	w0, w8
-	b	.L2119
-.L2120:
-	cbz	w2, .L2123
-	str	w0, [x24, #:lo12:.LANCHOR133]
-.L2123:
-	adrp	x0, .LANCHOR229
+	b	.L2293
+.L2294:
+	cbz	w2, .L2297
+	str	w0, [x24, #:lo12:.LANCHOR136]
+.L2297:
+	adrp	x0, .LANCHOR235
 	ldrh	w1, [x19]
-	strh	w1, [x0, #:lo12:.LANCHOR229]
+	strh	w1, [x0, #:lo12:.LANCHOR235]
 	ldrb	w0, [x19, 8]
-	cbnz	w0, .L2113
-	adrp	x0, .LANCHOR117
-	add	x0, x0, :lo12:.LANCHOR117
+	cbnz	w0, .L2287
+	adrp	x0, .LANCHOR120
+	add	x0, x0, :lo12:.LANCHOR120
 	ldrh	w1, [x0, w23, sxtw 1]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2125
+	bne	.L2299
 	cmn	w3, #1
-	beq	.L2126
-	str	w3, [x24, #:lo12:.LANCHOR133]
-.L2113:
+	beq	.L2300
+	str	w3, [x24, #:lo12:.LANCHOR136]
+.L2287:
 	mov	w1, 1
-	adrp	x0, .LANCHOR230
+	adrp	x0, .LANCHOR236
 	mov	w23, w26
-	adrp	x28, .LANCHOR133
-	strh	w1, [x0, #:lo12:.LANCHOR230]
-	adrp	x0, .LANCHOR124
-	add	x0, x0, :lo12:.LANCHOR124
+	adrp	x28, .LANCHOR136
+	strh	w1, [x0, #:lo12:.LANCHOR236]
+	adrp	x0, .LANCHOR127
+	add	x0, x0, :lo12:.LANCHOR127
 	bl	FtlMapBlkWriteDumpData
-	add	x0, x28, :lo12:.LANCHOR133
+	add	x0, x28, :lo12:.LANCHOR136
 	str	x0, [x29, 112]
-.L2133:
+.L2307:
 	ldr	x2, [x29, 160]
 	adrp	x1, .LANCHOR8
-	ldr	x0, [x22, #:lo12:.LANCHOR177]
+	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	mov	w24, 0
 	ldrb	w5, [x1, #:lo12:.LANCHOR8]
 	mov	w6, 65535
 	ldr	x3, [x29, 184]
-	ldrh	w2, [x2, #:lo12:.LANCHOR37]
+	ldrh	w2, [x2, #:lo12:.LANCHOR38]
 	str	x1, [x29, 128]
 	add	x2, x2, 8
 	add	x2, x19, x2, lsl 1
-.L2134:
+.L2308:
 	cmp	x2, x3
-	bne	.L2137
+	bne	.L2311
 	ldr	w2, [x29, 176]
 	mov	w1, w24
 	mov	x25, 0
@@ -15018,104 +16414,104 @@ FtlRecoverySuperblock:
 	mov	w0, 56
 	umull	x0, w24, w0
 	str	x0, [x29, 136]
-	adrp	x0, .LANCHOR229
-	add	x0, x0, :lo12:.LANCHOR229
+	adrp	x0, .LANCHOR235
+	add	x0, x0, :lo12:.LANCHOR235
 	str	x0, [x29, 120]
-.L2138:
+.L2312:
 	ldr	x0, [x29, 136]
 	cmp	x25, x0
-	bne	.L2164
+	bne	.L2338
 	ldrb	w0, [x19, 8]
 	add	w23, w23, 1
 	and	w23, w23, 65535
 	cmp	w0, 1
-	bne	.L2165
+	bne	.L2339
 	ldr	x0, [x29, 128]
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L2165
-	adrp	x0, .LANCHOR53
-	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+	cbz	w0, .L2339
+	adrp	x0, .LANCHOR54
+	ldrh	w0, [x0, #:lo12:.LANCHOR54]
 	cmp	w0, w23
-	bne	.L2165
+	bne	.L2339
 	cmp	w20, w23
-	beq	.L2140
-.L2165:
+	beq	.L2314
+.L2339:
 	ldr	x0, [x29, 144]
-	ldrh	w0, [x0, #:lo12:.LANCHOR52]
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w23
-	bne	.L2133
+	bne	.L2307
 	ldr	x0, [x29, 160]
 	mov	w2, 65535
 	strh	w23, [x19, 2]
 	strh	wzr, [x19, 4]
-	ldrh	w1, [x0, #:lo12:.LANCHOR37]
+	ldrh	w1, [x0, #:lo12:.LANCHOR38]
 	mov	w0, 0
-.L2166:
+.L2340:
 	cmp	w0, w1
-	beq	.L2246
+	beq	.L2420
 	ldr	x4, [x29, 184]
 	ldrh	w3, [x4], 2
 	str	x4, [x29, 184]
 	cmp	w3, w2
-	beq	.L2167
+	beq	.L2341
 	strb	w0, [x19, 6]
-	b	.L2246
-.L2126:
+	b	.L2420
+.L2300:
 	cmp	w21, w7
-	beq	.L2127
-	str	w7, [x24, #:lo12:.LANCHOR133]
-	b	.L2113
-.L2127:
-	ldr	w0, [x24, #:lo12:.LANCHOR133]
-.L2255:
+	beq	.L2301
+	str	w7, [x24, #:lo12:.LANCHOR136]
+	b	.L2287
+.L2301:
+	ldr	w0, [x24, #:lo12:.LANCHOR136]
+.L2429:
 	sub	w0, w0, #1
-.L2249:
-	str	w0, [x24, #:lo12:.LANCHOR133]
-	b	.L2113
-.L2125:
+.L2423:
+	str	w0, [x24, #:lo12:.LANCHOR136]
+	b	.L2287
+.L2299:
 	cmp	w28, w21
-	beq	.L2128
+	beq	.L2302
 	cmn	w28, #1
-	beq	.L2113
-	str	w28, [x24, #:lo12:.LANCHOR133]
-	b	.L2113
-.L2128:
-	ldr	w0, [x24, #:lo12:.LANCHOR133]
+	beq	.L2287
+	str	w28, [x24, #:lo12:.LANCHOR136]
+	b	.L2287
+.L2302:
+	ldr	w0, [x24, #:lo12:.LANCHOR136]
 	cmp	w21, w0
-	bne	.L2255
-	b	.L2113
-.L2175:
+	bne	.L2429
+	b	.L2287
+.L2349:
 	mov	w8, w0
 	mov	w0, w28
-	b	.L2121
-.L2177:
+	b	.L2295
+.L2351:
 	mov	w2, 1
-	b	.L2121
-.L2131:
+	b	.L2295
+.L2305:
 	mov	w0, -1
-	b	.L2249
-.L2137:
+	b	.L2423
+.L2311:
 	ldrh	w1, [x3]
 	cmp	w1, w6
-	beq	.L2135
+	beq	.L2309
 	mov	w4, 56
 	orr	w1, w23, w1, lsl 10
 	umaddl	x4, w24, w4, x0
 	str	w1, [x4, 4]
 	ldrb	w7, [x19, 8]
 	cmp	w7, 1
-	bne	.L2136
-	cbz	w5, .L2136
+	bne	.L2310
+	cbz	w5, .L2310
 	orr	w1, w1, -2147483648
 	str	w1, [x4, 4]
-.L2136:
+.L2310:
 	add	w24, w24, 1
 	and	w24, w24, 65535
-.L2135:
+.L2309:
 	add	x3, x3, 2
-	b	.L2134
-.L2164:
-	ldr	x4, [x22, #:lo12:.LANCHOR177]
+	b	.L2308
+.L2338:
+	ldr	x4, [x22, #:lo12:.LANCHOR180]
 	add	x4, x4, x25
 	ldr	w5, [x4, 4]
 	str	w5, [x29, 204]
@@ -15123,57 +16519,57 @@ FtlRecoverySuperblock:
 	bl	P2V_plane
 	and	w0, w0, 65535
 	cmp	w23, w26
-	bcc	.L2139
+	bcc	.L2313
 	ldr	w1, [x29, 180]
 	ccmp	w1, w0, 0, eq
-	bhi	.L2139
+	bhi	.L2313
 	cmp	w23, w20
 	ccmp	w27, w0, 0, eq
-	beq	.L2140
+	beq	.L2314
 	ldr	w0, [x4]
 	cmn	w0, #1
-	beq	.L2141
+	beq	.L2315
 	ldr	x3, [x4, 16]
 	mov	w0, 61589
 	ldrh	w1, [x3]
 	cmp	w1, w0
-	beq	.L2142
-.L2148:
+	beq	.L2316
+.L2322:
 	ldrh	w0, [x19]
-.L2252:
+.L2426:
 	bl	decrement_vpc_count
-.L2139:
+.L2313:
 	add	x25, x25, 56
-	b	.L2138
-.L2142:
+	b	.L2312
+.L2316:
 	ldr	w21, [x3, 4]
 	cmn	w21, #1
-	beq	.L2143
+	beq	.L2317
 	ldr	x0, [x29, 168]
-	ldr	w1, [x0, #:lo12:.LANCHOR157]
+	ldr	w1, [x0, #:lo12:.LANCHOR160]
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2143
+	cbz	w0, .L2317
 	ldr	x1, [x29, 168]
 	add	w0, w21, 1
-	str	w0, [x1, #:lo12:.LANCHOR157]
-.L2143:
+	str	w0, [x1, #:lo12:.LANCHOR160]
+.L2317:
 	ldp	w24, w0, [x3, 8]
 	add	x1, x29, 200
 	str	w0, [x29, 196]
 	mov	w2, 0
 	mov	w0, w24
 	bl	log2phys
-	ldr	w1, [x28, #:lo12:.LANCHOR133]
+	ldr	w1, [x28, #:lo12:.LANCHOR136]
 	cmn	w1, #1
-	beq	.L2144
+	beq	.L2318
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2144
+	cbz	w0, .L2318
 	ldr	w1, [x29, 196]
 	cmn	w1, #1
-	beq	.L2145
-	ldr	x0, [x22, #:lo12:.LANCHOR177]
+	beq	.L2319
+	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	mov	w2, 0
 	add	x0, x0, x25
 	ldr	x3, [x0, 16]
@@ -15181,85 +16577,85 @@ FtlRecoverySuperblock:
 	mov	w1, 1
 	str	x3, [x29, 152]
 	bl	FlashReadPages
-	ldr	x0, [x22, #:lo12:.LANCHOR177]
+	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	ldr	x3, [x29, 152]
 	add	x4, x0, x25
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	bne	.L2146
-.L2147:
+	bne	.L2320
+.L2321:
 	mov	w0, -1
 	str	w0, [x29, 196]
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-.L2155:
+.L2329:
 	ldr	w3, [x29, 196]
 	cmn	w3, #1
-	beq	.L2139
-.L2170:
+	beq	.L2313
+.L2344:
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
 	and	w24, w0, 65535
-	adrp	x0, .LANCHOR39
+	adrp	x0, .LANCHOR40
 	mov	w3, w24
-	ldrh	w0, [x0, #:lo12:.LANCHOR39]
+	ldrh	w0, [x0, #:lo12:.LANCHOR40]
 	cmp	w0, w24
-	bhi	.L2160
-	mov	w2, 2216
-	adrp	x1, .LANCHOR228
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR228
-	add	x0, x0, :lo12:.LC6
+	bhi	.L2334
+	mov	w2, 2494
+	adrp	x1, .LANCHOR234
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR234
+	add	x0, x0, :lo12:.LC5
 	str	w24, [x29, 152]
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
 	ldr	w3, [x29, 152]
-.L2160:
-	adrp	x1, .LANCHOR83
+.L2334:
+	adrp	x1, .LANCHOR84
 	ubfiz	x0, x24, 1, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR83]
+	ldr	x1, [x1, #:lo12:.LANCHOR84]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L2161
+	cbz	w0, .L2335
 	mov	w0, w3
-	b	.L2252
-.L2145:
+	b	.L2426
+.L2319:
 	ldp	w1, w0, [x29, 200]
 	cmp	w1, w0
-	bne	.L2148
+	bne	.L2322
 	mov	w2, 1
 	add	x1, x29, 196
 	mov	w0, w24
 	bl	log2phys
-	b	.L2148
-.L2146:
+	b	.L2322
+.L2320:
 	ldr	w0, [x3, 8]
 	cmp	w24, w0
-	bne	.L2147
+	bne	.L2321
 	ldr	w0, [x3, 4]
 	str	w0, [x29, 152]
 	str	x3, [x29, 104]
 	uxtw	x1, w0
-	ldr	w0, [x28, #:lo12:.LANCHOR133]
+	ldr	w0, [x28, #:lo12:.LANCHOR136]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2147
+	cbz	w0, .L2321
 	ldp	w0, w1, [x29, 200]
 	ldr	x3, [x29, 104]
 	cmp	w0, w1
 	ldr	w1, [x29, 196]
-	bne	.L2150
-.L2250:
+	bne	.L2324
+.L2424:
 	mov	w0, w24
 	bl	FtlReUsePrevPpa
-	b	.L2147
-.L2150:
+	b	.L2321
+.L2324:
 	cmp	w0, w1
-	beq	.L2147
+	beq	.L2321
 	cmn	w0, #1
-	beq	.L2151
+	beq	.L2325
 	ldr	x3, [x4, 16]
 	mov	w2, 0
 	str	w0, [x4, 4]
@@ -15268,535 +16664,837 @@ FtlRecoverySuperblock:
 	mov	x0, x4
 	bl	FlashReadPages
 	ldr	x3, [x29, 104]
-.L2152:
-	ldr	x0, [x22, #:lo12:.LANCHOR177]
+.L2326:
+	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	beq	.L2153
+	beq	.L2327
 	ldr	x0, [x29, 112]
 	ldr	w3, [x3, 4]
 	mov	w1, w3
 	ldr	w0, [x0]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2153
+	cbz	w0, .L2327
 	ldr	w0, [x29, 152]
 	mov	w1, w3
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2147
-.L2153:
+	cbz	w0, .L2321
+.L2327:
 	ldr	w1, [x29, 196]
-	b	.L2250
-.L2151:
+	b	.L2424
+.L2325:
 	str	w0, [x4]
-	b	.L2152
-.L2144:
+	b	.L2326
+.L2318:
 	ldp	w1, w0, [x29, 200]
 	cmp	w1, w0
-	beq	.L2155
+	beq	.L2329
 	mov	w2, 1
 	add	x1, x29, 204
 	mov	w0, w24
 	bl	log2phys
 	ldr	w3, [x29, 200]
 	cmn	w3, #1
-	beq	.L2155
+	beq	.L2329
 	ldr	w0, [x29, 196]
 	cmp	w3, w0
-	beq	.L2170
+	beq	.L2344
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
-	adrp	x1, .LANCHOR91
-	and	w0, w0, 65535
-	ldrh	w1, [x1, #:lo12:.LANCHOR91]
-	cmp	w1, w0
-	beq	.L2159
 	adrp	x1, .LANCHOR92
+	and	w0, w0, 65535
 	ldrh	w1, [x1, #:lo12:.LANCHOR92]
 	cmp	w1, w0
-	beq	.L2159
+	beq	.L2333
 	adrp	x1, .LANCHOR93
 	ldrh	w1, [x1, #:lo12:.LANCHOR93]
 	cmp	w1, w0
-	bne	.L2155
-.L2159:
-	ldr	x0, [x22, #:lo12:.LANCHOR177]
+	beq	.L2333
+	adrp	x1, .LANCHOR94
+	ldrh	w1, [x1, #:lo12:.LANCHOR94]
+	cmp	w1, w0
+	bne	.L2329
+.L2333:
+	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	mov	w2, 0
 	mov	w1, 1
 	ldr	x4, [x0, 16]
 	str	w3, [x0, 4]
 	str	x4, [x29, 152]
 	bl	FlashReadPages
-	ldr	x0, [x22, #:lo12:.LANCHOR177]
+	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L2155
+	beq	.L2329
 	ldr	x4, [x29, 152]
 	mov	w0, w21
 	ldr	w1, [x4, 4]
 	bl	ftl_cmp_data_ver
-	cbnz	w0, .L2155
+	cbnz	w0, .L2329
 	mov	w2, 1
 	add	x1, x29, 200
 	mov	w0, w24
 	bl	log2phys
-	b	.L2155
-.L2161:
+	b	.L2329
+.L2335:
 	mov	w1, w24
-	adrp	x0, .LC47
-	add	x0, x0, :lo12:.LC47
+	adrp	x0, .LC63
+	add	x0, x0, :lo12:.LC63
 	bl	printf
-	b	.L2139
-.L2141:
+	b	.L2313
+.L2315:
 	ldr	x1, [x29, 120]
 	mov	w2, w21
 	ldrh	w0, [x19]
 	strh	w0, [x1]
 	mov	w1, w5
-	adrp	x0, .LC48
-	add	x0, x0, :lo12:.LC48
+	adrp	x0, .LC64
+	add	x0, x0, :lo12:.LC64
 	bl	printf
-	adrp	x2, .LANCHOR231
-	ldr	w0, [x2, #:lo12:.LANCHOR231]
+	adrp	x2, .LANCHOR237
+	ldr	w0, [x2, #:lo12:.LANCHOR237]
 	cmp	w0, 31
-	bhi	.L2162
-	adrp	x1, .LANCHOR232
-	add	x1, x1, :lo12:.LANCHOR232
+	bhi	.L2336
+	adrp	x1, .LANCHOR238
+	add	x1, x1, :lo12:.LANCHOR238
 	ldr	w3, [x29, 204]
 	str	w3, [x1, w0, uxtw 2]
 	add	w0, w0, 1
-	str	w0, [x2, #:lo12:.LANCHOR231]
-.L2162:
+	str	w0, [x2, #:lo12:.LANCHOR237]
+.L2336:
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-	ldr	w0, [x28, #:lo12:.LANCHOR133]
+	ldr	w0, [x28, #:lo12:.LANCHOR136]
 	cmn	w0, #1
-	bne	.L2163
-.L2251:
-	str	w21, [x28, #:lo12:.LANCHOR133]
-	b	.L2139
-.L2163:
+	bne	.L2337
+.L2425:
+	str	w21, [x28, #:lo12:.LANCHOR136]
+	b	.L2313
+.L2337:
 	cmp	w21, w0
-	bcs	.L2139
-	b	.L2251
-.L2167:
+	bcs	.L2313
+	b	.L2425
+.L2341:
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L2166
-.L2140:
+	b	.L2340
+.L2314:
 	strb	w27, [x19, 6]
 	strh	w20, [x19, 2]
-	b	.L2254
+	b	.L2428
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
-	.section	.text.FtlGcScanTempBlk,"ax",@progbits
+	.section	.text.FtlGcFreeTempBlock,"ax",@progbits
 	.align	2
-	.global	FtlGcScanTempBlk
-	.type	FtlGcScanTempBlk, %function
-FtlGcScanTempBlk:
-	stp	x29, x30, [sp, -96]!
+	.global	FtlGcFreeTempBlock
+	.type	FtlGcFreeTempBlock, %function
+FtlGcFreeTempBlock:
+	adrp	x0, .LANCHOR77
+	ldr	w0, [x0, #:lo12:.LANCHOR77]
+	cbz	w0, .L2431
+	mov	w0, 0
+	ret
+.L2431:
+	stp	x29, x30, [sp, -112]!
+	mov	w1, 65535
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR233
 	stp	x19, x20, [sp, 16]
-	mov	x20, x0
-	ldrh	w19, [x23, #:lo12:.LANCHOR233]
-	mov	w0, 65535
+	adrp	x19, .LANCHOR94
 	stp	x21, x22, [sp, 32]
+	add	x0, x19, :lo12:.LANCHOR94
+	ldrh	w20, [x19, #:lo12:.LANCHOR94]
+	adrp	x21, .LANCHOR135
+	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	cmp	w19, w0
-	stp	x27, x28, [sp, 80]
-	beq	.L2274
-	cbnz	w19, .L2257
-.L2258:
-	bl	FtlGcPageVarInit
-	b	.L2259
-.L2274:
-	mov	w19, 0
-.L2257:
-	adrp	x0, .LANCHOR52
-	ldrh	w0, [x0, #:lo12:.LANCHOR52]
-	cmp	w0, w1
-	beq	.L2258
-.L2259:
-	adrp	x25, .LANCHOR58
-	add	x25, x25, :lo12:.LANCHOR58
-	mov	w26, -1
-	mov	w24, 65535
-.L2271:
-	ldrh	w0, [x20]
-	strb	wzr, [x20, 8]
-	cmp	w0, w24
-	beq	.L2275
-	mov	w27, 56
-.L2273:
-	adrp	x1, .LANCHOR105
-	adrp	x22, .LANCHOR177
-	ldrh	w6, [x25]
-	add	x3, x20, 16
-	ldr	x5, [x1, #:lo12:.LANCHOR105]
-	adrp	x1, .LANCHOR37
-	ldr	x0, [x22, #:lo12:.LANCHOR177]
-	mov	w21, 0
-	ldrh	w1, [x1, #:lo12:.LANCHOR37]
-	add	x1, x1, 8
-	add	x1, x20, x1, lsl 1
-.L2261:
-	cmp	x3, x1
-	bne	.L2263
-	mov	w1, w21
-	umull	x21, w21, w27
-	mov	x28, 0
-	mov	w2, 0
-	bl	FlashReadPages
-.L2264:
-	cmp	x28, x21
-	bne	.L2272
-	adrp	x0, .LANCHOR52
-	add	w19, w19, 1
-	and	w19, w19, 65535
-	ldrh	w0, [x0, #:lo12:.LANCHOR52]
-	cmp	w0, w19
-	bhi	.L2273
-.L2275:
-	mov	w2, 0
-	b	.L2260
-.L2263:
-	ldrh	w2, [x3]
-	cmp	w2, w24
-	beq	.L2262
-	umaddl	x4, w21, w27, x0
-	orr	w2, w19, w2, lsl 10
-	str	w2, [x4, 4]
-	mul	w2, w21, w6
-	add	w21, w21, 1
-	str	xzr, [x4, 8]
-	and	w21, w21, 65535
-	asr	w2, w2, 2
-	add	x2, x5, x2, sxtw 2
-	str	x2, [x4, 16]
-.L2262:
-	add	x3, x3, 2
-	b	.L2261
-.L2272:
-	ldr	x6, [x22, #:lo12:.LANCHOR177]
-	add	x5, x6, x28
-	ldr	w4, [x5, 4]
-	lsr	w0, w4, 10
-	bl	P2V_plane
-	and	w2, w0, 65535
-	ldr	w0, [x6, x28]
-	cbnz	w0, .L2265
-	ldr	x0, [x5, 16]
-	add	x28, x28, 56
-	ldrh	w1, [x0]
-	cmp	w1, w24
-	bne	.L2266
-	adrp	x0, .LANCHOR132
-	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR132]
-.L2260:
-	strb	w2, [x20, 6]
-	mov	w0, -1
-	strh	w19, [x20, 2]
-	mov	w1, w19
-	strh	w0, [x23, #:lo12:.LANCHOR233]
-	mov	x0, x20
-	bl	ftl_sb_update_avl_pages
-	mov	w0, w26
+	cmp	w20, w1
+	str	x27, [sp, 80]
+	beq	.L2433
+	adrp	x1, .LANCHOR53
+	ldrh	w1, [x1, #:lo12:.LANCHOR53]
+	bl	FtlGcScanTempBlk
+	str	w0, [x29, 108]
+	cmn	w0, #1
+	beq	.L2433
+	adrp	x0, .LANCHOR79
+	ubfiz	x20, x20, 1, 16
+	ldr	x1, [x0, #:lo12:.LANCHOR79]
+	ldrh	w0, [x1, x20]
+	cmp	w0, 4
+	bls	.L2434
+	sub	w0, w0, #5
+	strh	w0, [x1, x20]
+	mov	w0, 1
+	bl	FtlEctTblFlush
+.L2434:
+	ldr	w0, [x21, #:lo12:.LANCHOR135]
+	cbnz	w0, .L2435
+	adrp	x0, .LANCHOR138
+	add	x0, x0, :lo12:.LANCHOR138
+	ldr	w1, [x0, 96]
+	add	w1, w1, 1
+	str	w1, [x0, 96]
+	ldr	w0, [x29, 108]
+	lsr	w0, w0, 10
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+.L2435:
+	str	wzr, [x21, #:lo12:.LANCHOR135]
+	mov	w0, 1
+.L2430:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 96
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 112
 	ret
-.L2266:
-	ldp	w2, w0, [x0, 8]
-	mov	w1, w4
-	bl	FtlGcUpdatePage
-	b	.L2264
-.L2265:
-	ldrh	w1, [x20]
-	mov	w2, w4
-	adrp	x0, .LC49
-	add	x0, x0, :lo12:.LC49
+.L2433:
+	str	wzr, [x21, #:lo12:.LANCHOR135]
+	mov	w0, 65535
+	ldrh	w1, [x19, #:lo12:.LANCHOR94]
+	add	x21, x19, :lo12:.LANCHOR94
+	cmp	w1, w0
+	beq	.L2456
+	bl	FtlCacheWriteBack
+	adrp	x20, .LANCHOR111
+	adrp	x0, .LANCHOR53
+	ldrb	w1, [x21, 7]
+	ldrh	w2, [x20, #:lo12:.LANCHOR111]
+	mov	x21, x0
+	ldrh	w3, [x0, #:lo12:.LANCHOR53]
+	mul	w1, w1, w3
+	cmp	w2, w1
+	beq	.L2437
+	mov	w2, 163
+	adrp	x1, .LANCHOR239
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR239
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x0, .LANCHOR28
-	ldr	w1, [x0, #:lo12:.LANCHOR28]
-	ldrh	w0, [x20]
-	cbnz	w1, .L2267
-	adrp	x1, .LANCHOR8
-	ldrb	w1, [x1, #:lo12:.LANCHOR8]
-	cbz	w1, .L2268
-.L2267:
-	adrp	x2, .LANCHOR78
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
+	bl	printf
+.L2437:
+	add	x0, x19, :lo12:.LANCHOR94
+	adrp	x23, .LANCHOR84
+	ldrh	w3, [x21, #:lo12:.LANCHOR53]
+	adrp	x25, .LANCHOR73
+	ldrh	w2, [x19, #:lo12:.LANCHOR94]
+	adrp	x26, .LANCHOR239
+	ldrb	w0, [x0, 7]
+	add	x25, x25, :lo12:.LANCHOR73
+	ldr	x1, [x23, #:lo12:.LANCHOR84]
+	add	x26, x26, :lo12:.LANCHOR239
+	mov	w21, 0
+	mul	w0, w0, w3
+	strh	w0, [x1, x2, lsl 1]
+	adrp	x1, .LANCHOR161
+	ldrh	w0, [x20, #:lo12:.LANCHOR111]
+	ldr	w2, [x1, #:lo12:.LANCHOR161]
+	add	w0, w0, w2
+	str	w0, [x1, #:lo12:.LANCHOR161]
+.L2438:
+	ldrh	w0, [x20, #:lo12:.LANCHOR111]
+	cmp	w0, w21
+	bhi	.L2442
+	mov	w0, -1
+	bl	decrement_vpc_count
+	adrp	x0, .LANCHOR8
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	cbz	w0, .L2443
+	ldrh	w1, [x19, #:lo12:.LANCHOR94]
+	adrp	x0, .LC65
+	add	x0, x0, :lo12:.LC65
+	bl	printf
+.L2443:
+	ldrh	w0, [x19, #:lo12:.LANCHOR94]
+	ldr	x2, [x23, #:lo12:.LANCHOR84]
 	ubfiz	x1, x0, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR78]
 	ldrh	w1, [x2, x1]
-	cmp	w1, 119
-	bls	.L2269
-.L2268:
-	ldr	x1, [x22, #:lo12:.LANCHOR177]
-	ldr	w1, [x1, x28]
-	cmn	w1, #1
-	bne	.L2270
-.L2269:
-	ldr	x1, [x22, #:lo12:.LANCHOR177]
-	add	x28, x1, x28
-	ldr	w26, [x28, 4]
-.L2270:
-	adrp	x1, .LANCHOR83
-	ubfiz	x0, x0, 1, 16
-	mov	w19, 0
-	ldr	x1, [x1, #:lo12:.LANCHOR83]
-	strh	wzr, [x1, x0]
-	ldrh	w0, [x20]
+	cbz	w1, .L2444
+	bl	INSERT_DATA_LIST
+.L2445:
+	adrp	x0, .LANCHOR109
+	mov	w21, -1
+	strh	wzr, [x20, #:lo12:.LANCHOR111]
+	strh	w21, [x19, #:lo12:.LANCHOR94]
+	strh	wzr, [x0, #:lo12:.LANCHOR109]
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	adrp	x0, .LANCHOR89
+	ldrh	w1, [x0, #:lo12:.LANCHOR89]
+	adrp	x0, .LANCHOR223
+	ldrh	w0, [x0, #:lo12:.LANCHOR223]
+	add	w0, w0, w0, lsl 1
+	cmp	w1, w0, lsr 2
+	ble	.L2456
+	adrp	x0, .LANCHOR204
+	mov	w1, 20
+	strh	w21, [x0, #:lo12:.LANCHOR204]
+	adrp	x0, .LANCHOR176
+	strh	w1, [x0, #:lo12:.LANCHOR176]
+.L2456:
+	mov	w0, 0
+	b	.L2430
+.L2442:
+	adrp	x0, .LANCHOR112
+	mov	w24, 12
+	ldr	x27, [x0, #:lo12:.LANCHOR112]
+	umull	x24, w21, w24
+	ldr	w0, [x25]
+	add	x22, x27, x24
+	ldr	w1, [x22, 8]
+	cmp	w1, w0
+	bcc	.L2439
+	mov	w2, 168
+	mov	x1, x26
+	adrp	x0, .LC5
+	add	x0, x0, :lo12:.LC5
+	bl	printf
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
+	bl	printf
+.L2439:
+	ldr	w0, [x22, 8]
+	add	x1, x29, 108
+	mov	w2, 0
+	bl	log2phys
+	ldr	w0, [x27, x24]
+	ldr	w1, [x29, 108]
+	cmp	w0, w1
+	bne	.L2440
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+	mov	w24, w0
+	ldr	w0, [x22, 8]
+	mov	w2, 1
+	add	x1, x22, 4
+	bl	log2phys
+	mov	w0, w24
+.L2455:
+	bl	decrement_vpc_count
+.L2441:
+	add	w21, w21, 1
+	and	w21, w21, 65535
+	b	.L2438
+.L2440:
+	ldr	w0, [x22, 4]
+	cmp	w1, w0
+	beq	.L2441
+	ldrh	w0, [x19, #:lo12:.LANCHOR94]
+	b	.L2455
+.L2444:
 	bl	INSERT_FREE_LIST
-	mov	w0, -1
-	strh	w0, [x20]
-	bl	FtlGcPageVarInit
-	b	.L2271
-	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
-	.section	.text.FtlGcFreeTempBlock,"ax",@progbits
+	b	.L2445
+	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
+	.section	.text.FtlGcPageRecovery,"ax",@progbits
 	.align	2
-	.global	FtlGcFreeTempBlock
-	.type	FtlGcFreeTempBlock, %function
-FtlGcFreeTempBlock:
-	adrp	x0, .LANCHOR76
-	ldr	w0, [x0, #:lo12:.LANCHOR76]
-	cbz	w0, .L2285
+	.global	FtlGcPageRecovery
+	.type	FtlGcPageRecovery, %function
+FtlGcPageRecovery:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR53
+	adrp	x19, .LANCHOR94
+	add	x19, x19, :lo12:.LANCHOR94
+	ldrh	w1, [x20, #:lo12:.LANCHOR53]
+	mov	x0, x19
+	bl	FtlGcScanTempBlk
+	ldrh	w1, [x19, 2]
+	ldrh	w0, [x20, #:lo12:.LANCHOR53]
+	cmp	w1, w0
+	bcc	.L2457
+	adrp	x0, .LANCHOR127
+	add	x0, x0, :lo12:.LANCHOR127
+	bl	FtlMapBlkWriteDumpData
 	mov	w0, 0
+	bl	FtlGcFreeTempBlock
+	adrp	x0, .LANCHOR135
+	str	wzr, [x0, #:lo12:.LANCHOR135]
+.L2457:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
 	ret
-.L2285:
-	stp	x29, x30, [sp, -112]!
-	mov	w1, 65535
+	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
+	.section	.text.FtlPowerLostRecovery,"ax",@progbits
+	.align	2
+	.global	FtlPowerLostRecovery
+	.type	FtlPowerLostRecovery, %function
+FtlPowerLostRecovery:
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR237
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	adrp	x19, .LANCHOR92
+	add	x19, x19, :lo12:.LANCHOR92
+	str	wzr, [x0, #:lo12:.LANCHOR237]
+	mov	x0, x19
+	bl	FtlRecoverySuperblock
+	mov	x0, x19
+	adrp	x19, .LANCHOR93
+	bl	FtlSlcSuperblockCheck
+	add	x19, x19, :lo12:.LANCHOR93
+	mov	x0, x19
+	bl	FtlRecoverySuperblock
+	mov	x0, x19
+	bl	FtlSlcSuperblockCheck
+	bl	FtlGcPageRecovery
+	mov	w0, -1
+	bl	decrement_vpc_count
+	mov	w0, 0
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
+	.section	.text.FtlSysBlkInit,"ax",@progbits
+	.align	2
+	.global	FtlSysBlkInit
+	.type	FtlSysBlkInit, %function
+FtlSysBlkInit:
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR235
+	mov	w1, -1
+	add	x29, sp, 0
+	strh	w1, [x0, #:lo12:.LANCHOR235]
+	adrp	x0, .LANCHOR39
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR236
+	ldrh	w0, [x0, #:lo12:.LANCHOR39]
+	strh	wzr, [x19, #:lo12:.LANCHOR236]
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlScanSysBlk
+	adrp	x0, .LANCHOR209
+	ldrh	w1, [x0, #:lo12:.LANCHOR209]
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L2463
+.L2465:
+	mov	w20, -1
+.L2462:
+	mov	w0, w20
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L2463:
+	bl	FtlLoadSysInfo
+	mov	w20, w0
+	cbnz	w0, .L2465
+	bl	FtlLoadMapInfo
+	bl	FtlLoadVonderInfo
+	bl	Ftl_load_ext_data
+	bl	FtlLoadEctTbl
+	bl	FtlFreeSysBLkSort
+	bl	SupperBlkListInit
+	bl	FtlPowerLostRecovery
+	mov	w0, 1
+	bl	FtlUpdateVaildLpn
+	adrp	x2, .LANCHOR68
+	adrp	x0, .LANCHOR97
+	mov	x3, 4
+	ldrh	w2, [x2, #:lo12:.LANCHOR68]
+	ldr	x0, [x0, #:lo12:.LANCHOR97]
+	add	x2, x3, x2, uxtw 4
+	add	x1, x0, 4
+	add	x0, x0, x2
+.L2466:
+	cmp	x1, x0
+	bne	.L2468
+	ldrh	w0, [x19, #:lo12:.LANCHOR236]
+	cbnz	w0, .L2467
+	b	.L2462
+.L2468:
+	ldr	w2, [x1], 16
+	tbz	w2, #31, .L2466
+.L2467:
+	adrp	x0, .LANCHOR84
+	adrp	x1, .LANCHOR92
+	ldr	x2, [x0, #:lo12:.LANCHOR84]
+	add	x0, x1, :lo12:.LANCHOR92
+	ldrh	w1, [x1, #:lo12:.LANCHOR92]
+	ldrh	w4, [x0, 4]
+	lsl	x1, x1, 1
+	ldrh	w3, [x2, x1]
+	sub	w3, w3, w4
+	adrp	x4, .LANCHOR53
+	strh	w3, [x2, x1]
+	strh	wzr, [x0, 4]
+	ldrh	w1, [x4, #:lo12:.LANCHOR53]
+	strh	w1, [x0, 2]
+	adrp	x1, .LANCHOR93
+	strb	wzr, [x0, 6]
+	add	x0, x1, :lo12:.LANCHOR93
+	ldrh	w1, [x1, #:lo12:.LANCHOR93]
+	ldrh	w5, [x0, 4]
+	lsl	x1, x1, 1
+	ldrh	w3, [x2, x1]
+	sub	w3, w3, w5
+	strh	w3, [x2, x1]
+	strb	wzr, [x0, 6]
+	ldrh	w1, [x4, #:lo12:.LANCHOR53]
+	strh	w1, [x0, 2]
+	strh	wzr, [x0, 4]
+	adrp	x0, .LANCHOR127
+	add	x0, x0, :lo12:.LANCHOR127
+	bl	FtlMapBlkWriteDumpData
+	adrp	x0, .LANCHOR215
+	add	x0, x0, :lo12:.LANCHOR215
+	bl	FtlMapBlkWriteDumpData
+	adrp	x0, .LANCHOR81
+	add	x0, x0, :lo12:.LANCHOR81
+	ldrh	w1, [x0, 30]
+	add	w1, w1, 1
+	strh	w1, [x0, 30]
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	bl	FtlVpcTblFlush
+	b	.L2462
+	.size	FtlSysBlkInit, .-FtlSysBlkInit
+	.section	.text.FtlLowFormat,"ax",@progbits
+	.align	2
+	.global	FtlLowFormat
+	.type	FtlLowFormat, %function
+FtlLowFormat:
+	adrp	x0, .LANCHOR77
+	ldr	w0, [x0, #:lo12:.LANCHOR77]
+	cbnz	w0, .L2505
+	stp	x29, x30, [sp, -80]!
+	adrp	x0, .LANCHOR195
+	mov	w1, 0
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR93
+	adrp	x19, .LANCHOR67
+	ldr	x0, [x0, #:lo12:.LANCHOR195]
+	adrp	x20, .LANCHOR159
+	ldrh	w2, [x19, #:lo12:.LANCHOR67]
+	stp	x25, x26, [sp, 64]
+	adrp	x25, .LANCHOR39
 	stp	x21, x22, [sp, 32]
-	add	x0, x19, :lo12:.LANCHOR93
-	ldrh	w20, [x19, #:lo12:.LANCHOR93]
-	adrp	x21, .LANCHOR132
 	stp	x23, x24, [sp, 48]
-	stp	x25, x26, [sp, 64]
-	cmp	w20, w1
-	str	x27, [sp, 80]
-	beq	.L2287
-	adrp	x1, .LANCHOR52
-	ldrh	w1, [x1, #:lo12:.LANCHOR52]
-	bl	FtlGcScanTempBlk
-	str	w0, [x29, 108]
-	cmn	w0, #1
-	beq	.L2287
-	adrp	x0, .LANCHOR78
-	ubfiz	x20, x20, 1, 16
-	ldr	x1, [x0, #:lo12:.LANCHOR78]
-	ldrh	w0, [x1, x20]
-	cmp	w0, 4
-	bls	.L2288
-	sub	w0, w0, #5
-	strh	w0, [x1, x20]
-	mov	w0, 1
-	bl	FtlEctTblFlush
-.L2288:
-	ldr	w0, [x21, #:lo12:.LANCHOR132]
-	cbnz	w0, .L2289
-	adrp	x0, .LANCHOR135
-	add	x0, x0, :lo12:.LANCHOR135
-	ldr	w1, [x0, 96]
-	add	w1, w1, 1
-	str	w1, [x0, 96]
-	ldr	w0, [x29, 108]
-	lsr	w0, w0, 10
-	bl	FtlBbmMapBadBlock
+	lsl	w2, w2, 2
+	bl	ftl_memset
+	adrp	x0, .LANCHOR131
+	ldrh	w2, [x19, #:lo12:.LANCHOR67]
+	mov	w1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR131]
+	lsl	w2, w2, 2
+	bl	ftl_memset
+	str	wzr, [x20, #:lo12:.LANCHOR159]
+	adrp	x0, .LANCHOR160
+	str	wzr, [x0, #:lo12:.LANCHOR160]
+	ldrh	w0, [x25, #:lo12:.LANCHOR39]
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlLoadBbt
+	cbz	w0, .L2476
+	bl	FtlMakeBbt
+.L2476:
+	adrp	x22, .LANCHOR56
+	adrp	x0, .LANCHOR186
+	mov	w6, 23752
+	ldrh	w1, [x22, #:lo12:.LANCHOR56]
+	movk	w6, 0xa0f, lsl 16
+	ldr	x4, [x0, #:lo12:.LANCHOR186]
+	adrp	x0, .LANCHOR187
+	lsl	w1, w1, 7
+	ldr	x5, [x0, #:lo12:.LANCHOR187]
+	mov	w0, 0
+.L2477:
+	cmp	w0, w1
+	blt	.L2478
+	adrp	x21, .LANCHOR40
+	adrp	x19, .LANCHOR41
+	add	x26, x19, :lo12:.LANCHOR41
+	mov	w23, 0
+	ldrh	w24, [x21, #:lo12:.LANCHOR40]
+.L2479:
+	ldrh	w0, [x26]
+	cmp	w0, w24
+	bhi	.L2480
+	adrp	x24, .LANCHOR38
+	sub	w1, w23, #2
+	ldrh	w0, [x24, #:lo12:.LANCHOR38]
+	cmp	w1, w0, lsl 1
+	bgt	.L2481
+.L2485:
+	add	x26, x21, :lo12:.LANCHOR40
+	mov	w23, 0
+	mov	w25, 0
+.L2482:
+	ldrh	w0, [x26]
+	cmp	w0, w25
+	bhi	.L2486
+	adrp	x0, .LANCHOR74
+	ldrh	w1, [x19, #:lo12:.LANCHOR41]
+	ldrh	w3, [x24, #:lo12:.LANCHOR38]
+	str	w1, [x0, #:lo12:.LANCHOR74]
+	adrp	x0, .LANCHOR42
+	adrp	x1, .LANCHOR223
+	ldr	w2, [x0, #:lo12:.LANCHOR42]
+	adrp	x0, .LANCHOR73
+	udiv	w6, w2, w3
+	ubfx	x5, x6, 5, 16
+	str	w6, [x0, #:lo12:.LANCHOR73]
+	add	w4, w5, 36
+	strh	w4, [x1, #:lo12:.LANCHOR223]
+	mov	w4, 24
+	mul	w4, w3, w4
+	cmp	w23, w4
+	ble	.L2487
+	sub	w2, w2, w23
+	udiv	w2, w2, w3
+	str	w2, [x0, #:lo12:.LANCHOR73]
+	lsr	w2, w2, 5
+	add	w2, w2, 24
+	strh	w2, [x1, #:lo12:.LANCHOR223]
+.L2487:
+	adrp	x2, .LANCHOR28
+	ldr	w2, [x2, #:lo12:.LANCHOR28]
+	cmp	w2, 1
+	bne	.L2488
+	udiv	w4, w23, w3
+	ldrh	w2, [x1, #:lo12:.LANCHOR223]
+	add	w4, w4, w2
+	add	w4, w2, w4, asr 2
+	strh	w4, [x1, #:lo12:.LANCHOR223]
+.L2488:
+	adrp	x2, .LANCHOR8
+	ldrb	w2, [x2, #:lo12:.LANCHOR8]
+	cbz	w2, .L2489
+	udiv	w4, w23, w3
+	ldrh	w2, [x1, #:lo12:.LANCHOR223]
+	add	w4, w4, w2
+	add	w4, w2, w4, asr 2
+	strh	w4, [x1, #:lo12:.LANCHOR223]
+.L2489:
+	adrp	x2, .LANCHOR49
+	ldrh	w2, [x2, #:lo12:.LANCHOR49]
+	cbz	w2, .L2491
+	ldrh	w4, [x1, #:lo12:.LANCHOR223]
+	add	w4, w4, w2, lsr 1
+	strh	w4, [x1, #:lo12:.LANCHOR223]
+	mul	w4, w2, w3
+	cmp	w23, w4
+	bge	.L2491
+	add	w2, w2, 32
+	str	w6, [x0, #:lo12:.LANCHOR73]
+	add	w2, w5, w2
+	strh	w2, [x1, #:lo12:.LANCHOR223]
+.L2491:
+	ldrh	w2, [x1, #:lo12:.LANCHOR223]
+	adrp	x25, .LANCHOR222
+	ldr	w1, [x0, #:lo12:.LANCHOR73]
+	adrp	x24, .LANCHOR84
+	mov	w23, -1
+	sub	w1, w1, w2
+	mul	w3, w1, w3
+	adrp	x1, .LANCHOR53
+	str	w3, [x25, #:lo12:.LANCHOR222]
+	ldrh	w1, [x1, #:lo12:.LANCHOR53]
+	mul	w3, w1, w3
+	str	w3, [x0, #:lo12:.LANCHOR73]
+	ldrh	w0, [x22, #:lo12:.LANCHOR56]
+	mul	w3, w0, w3
+	adrp	x0, .LANCHOR69
+	str	w3, [x0, #:lo12:.LANCHOR69]
 	bl	FtlBbmTblFlush
-.L2289:
-	str	wzr, [x21, #:lo12:.LANCHOR132]
+	ldr	x0, [x24, #:lo12:.LANCHOR84]
+	mov	w1, 0
+	ldrh	w2, [x19, #:lo12:.LANCHOR41]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	adrp	x0, .LANCHOR101
+	adrp	x1, .LANCHOR204
+	ldrh	w2, [x21, #:lo12:.LANCHOR40]
+	str	wzr, [x0, #:lo12:.LANCHOR101]
+	add	x0, x1, :lo12:.LANCHOR204
+	strh	w23, [x1, #:lo12:.LANCHOR204]
+	mov	w1, 255
+	lsr	w2, w2, 3
+	strh	wzr, [x0, 2]
+	strb	wzr, [x0, 6]
+	strb	wzr, [x0, 8]
+	adrp	x0, .LANCHOR92
+	add	x19, x0, :lo12:.LANCHOR92
+	strh	wzr, [x0, #:lo12:.LANCHOR92]
 	mov	w0, 1
-.L2284:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldr	x27, [sp, 80]
-	ldp	x29, x30, [sp], 112
-	ret
-.L2287:
-	str	wzr, [x21, #:lo12:.LANCHOR132]
-	mov	w0, 65535
-	ldrh	w1, [x19, #:lo12:.LANCHOR93]
-	add	x21, x19, :lo12:.LANCHOR93
-	cmp	w1, w0
-	beq	.L2310
-	bl	FtlCacheWriteBack
-	adrp	x20, .LANCHOR110
-	adrp	x0, .LANCHOR52
-	ldrb	w1, [x21, 7]
-	ldrh	w2, [x20, #:lo12:.LANCHOR110]
-	mov	x21, x0
-	ldrh	w3, [x0, #:lo12:.LANCHOR52]
-	mul	w1, w1, w3
-	cmp	w2, w1
-	beq	.L2291
-	mov	w2, 163
-	adrp	x1, .LANCHOR234
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR234
-	add	x0, x0, :lo12:.LC6
-	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
-	bl	printf
-.L2291:
-	add	x0, x19, :lo12:.LANCHOR93
-	adrp	x23, .LANCHOR83
-	ldrh	w3, [x21, #:lo12:.LANCHOR52]
-	adrp	x25, .LANCHOR72
-	ldrh	w2, [x19, #:lo12:.LANCHOR93]
-	adrp	x26, .LANCHOR234
-	ldrb	w0, [x0, 7]
-	add	x25, x25, :lo12:.LANCHOR72
-	ldr	x1, [x23, #:lo12:.LANCHOR83]
-	add	x26, x26, :lo12:.LANCHOR234
-	mov	w21, 0
-	mul	w0, w0, w3
-	strh	w0, [x1, x2, lsl 1]
-	adrp	x1, .LANCHOR158
-	ldrh	w0, [x20, #:lo12:.LANCHOR110]
-	ldr	w2, [x1, #:lo12:.LANCHOR158]
-	add	w0, w0, w2
-	str	w0, [x1, #:lo12:.LANCHOR158]
-.L2292:
-	ldrh	w0, [x20, #:lo12:.LANCHOR110]
-	cmp	w0, w21
-	bhi	.L2296
-	mov	w0, -1
-	bl	decrement_vpc_count
-	adrp	x0, .LANCHOR8
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L2297
-	ldrh	w1, [x19, #:lo12:.LANCHOR93]
-	adrp	x0, .LC50
-	add	x0, x0, :lo12:.LC50
-	bl	printf
-.L2297:
-	ldrh	w0, [x19, #:lo12:.LANCHOR93]
-	ldr	x2, [x23, #:lo12:.LANCHOR83]
-	ubfiz	x1, x0, 1, 16
-	ldrh	w1, [x2, x1]
-	cbz	w1, .L2298
-	bl	INSERT_DATA_LIST
-.L2299:
-	adrp	x0, .LANCHOR108
-	mov	w21, -1
-	strh	wzr, [x20, #:lo12:.LANCHOR110]
-	strh	w21, [x19, #:lo12:.LANCHOR93]
-	strh	wzr, [x0, #:lo12:.LANCHOR108]
-	bl	l2p_flush
+	strb	w0, [x19, 8]
+	adrp	x0, .LANCHOR0
+	strh	wzr, [x19, 2]
+	ldr	x0, [x0, #:lo12:.LANCHOR0]
+	strb	wzr, [x19, 6]
+	bl	ftl_memset
+.L2493:
+	mov	x0, x19
+	bl	make_superblock
+	ldrb	w1, [x19, 7]
+	ldrh	w0, [x19]
+	cbnz	w1, .L2494
+	ldr	x1, [x24, #:lo12:.LANCHOR84]
+	ubfiz	x0, x0, 1, 16
+	strh	w23, [x1, x0]
+	ldrh	w0, [x19]
+	add	w0, w0, 1
+	strh	w0, [x19]
+	b	.L2493
+.L2478:
+	ubfiz	x3, x0, 2, 16
+	mvn	w2, w0
+	orr	w2, w0, w2, lsl 16
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	str	w2, [x4, x3]
+	str	w6, [x5, x3]
+	b	.L2477
+.L2480:
+	mov	w0, w24
+	mov	w1, 1
+	add	w24, w24, 1
+	bl	FtlLowFormatEraseBlock
+	add	w23, w23, w0
+	and	w24, w24, 65535
+	and	w23, w23, 65535
+	b	.L2479
+.L2481:
+	udiv	w0, w23, w0
+	adrp	x1, .LANCHOR66
+	ldr	w23, [x1, #:lo12:.LANCHOR66]
+	add	w0, w0, w23
+	bl	FtlSysBlkNumInit
+	ldrh	w0, [x25, #:lo12:.LANCHOR39]
+	add	x25, x19, :lo12:.LANCHOR41
+	bl	FtlFreeSysBlkQueueInit
+	ldrh	w23, [x21, #:lo12:.LANCHOR40]
+.L2483:
+	ldrh	w0, [x25]
+	cmp	w0, w23
+	bls	.L2485
+	mov	w0, w23
+	add	w23, w23, 1
+	mov	w1, 1
+	and	w23, w23, 65535
+	bl	FtlLowFormatEraseBlock
+	b	.L2483
+.L2486:
+	mov	w0, w25
+	mov	w1, 0
+	add	w25, w25, 1
+	bl	FtlLowFormatEraseBlock
+	add	w23, w23, w0
+	and	w25, w25, 65535
+	and	w23, w23, 65535
+	b	.L2482
+.L2494:
+	ldr	w1, [x20, #:lo12:.LANCHOR159]
+	ubfiz	x0, x0, 1, 16
+	str	w1, [x19, 12]
+	mov	w23, -1
+	add	w1, w1, 1
+	str	w1, [x20, #:lo12:.LANCHOR159]
+	ldr	x1, [x24, #:lo12:.LANCHOR84]
+	ldrh	w2, [x19, 4]
+	strh	w2, [x1, x0]
+	adrp	x2, .LANCHOR93
+	add	x0, x2, :lo12:.LANCHOR93
+	ldrh	w1, [x19]
+	mov	x19, x0
+	add	w1, w1, 1
+	strh	wzr, [x0, 2]
+	strh	w1, [x2, #:lo12:.LANCHOR93]
+	mov	w1, 1
+	strb	wzr, [x0, 6]
+	strb	w1, [x0, 8]
+.L2495:
+	mov	x0, x19
+	bl	make_superblock
+	ldrb	w1, [x19, 7]
+	ldrh	w0, [x19]
+	cbnz	w1, .L2496
+	ldr	x1, [x24, #:lo12:.LANCHOR84]
+	ubfiz	x0, x0, 1, 16
+	strh	w23, [x1, x0]
+	ldrh	w0, [x19]
+	add	w0, w0, 1
+	strh	w0, [x19]
+	b	.L2495
+.L2496:
+	ldr	w1, [x20, #:lo12:.LANCHOR159]
+	ubfiz	x0, x0, 1, 16
+	str	w1, [x19, 12]
+	add	w1, w1, 1
+	str	w1, [x20, #:lo12:.LANCHOR159]
+	ldr	x1, [x24, #:lo12:.LANCHOR84]
+	ldrh	w2, [x19, 4]
+	mov	w19, -1
+	strh	w2, [x1, x0]
+	adrp	x0, .LANCHOR94
+	strh	w19, [x0, #:lo12:.LANCHOR94]
+	bl	FtlFreeSysBlkQueueOut
+	adrp	x2, .LANCHOR209
+	add	x1, x2, :lo12:.LANCHOR209
+	strh	w0, [x2, #:lo12:.LANCHOR209]
+	ldr	w0, [x25, #:lo12:.LANCHOR222]
+	strh	w0, [x1, 6]
+	ldr	w0, [x20, #:lo12:.LANCHOR159]
+	str	w0, [x1, 8]
+	add	w0, w0, 1
+	strh	wzr, [x1, 2]
+	strh	w19, [x1, 4]
+	str	w0, [x20, #:lo12:.LANCHOR159]
 	bl	FtlVpcTblFlush
-	adrp	x0, .LANCHOR88
-	ldrh	w1, [x0, #:lo12:.LANCHOR88]
-	adrp	x0, .LANCHOR227
-	ldrh	w0, [x0, #:lo12:.LANCHOR227]
-	add	w0, w0, w0, lsl 1
-	cmp	w1, w0, lsr 2
-	ble	.L2310
-	adrp	x0, .LANCHOR201
-	mov	w1, 20
-	strh	w21, [x0, #:lo12:.LANCHOR201]
-	adrp	x0, .LANCHOR173
-	strh	w1, [x0, #:lo12:.LANCHOR173]
-.L2310:
+	bl	FtlSysBlkInit
+	cbnz	w0, .L2475
+	adrp	x0, .LANCHOR231
+	mov	w1, 1
+	str	w1, [x0, #:lo12:.LANCHOR231]
+.L2475:
 	mov	w0, 0
-	b	.L2284
-.L2296:
-	adrp	x0, .LANCHOR111
-	mov	w24, 12
-	ldr	x27, [x0, #:lo12:.LANCHOR111]
-	umull	x24, w21, w24
-	ldr	w0, [x25]
-	add	x22, x27, x24
-	ldr	w1, [x22, 8]
-	cmp	w1, w0
-	bcc	.L2293
-	mov	w2, 168
-	mov	x1, x26
-	adrp	x0, .LC6
-	add	x0, x0, :lo12:.LC6
-	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
-	bl	printf
-.L2293:
-	ldr	w0, [x22, 8]
-	add	x1, x29, 108
-	mov	w2, 0
-	bl	log2phys
-	ldr	w0, [x27, x24]
-	ldr	w1, [x29, 108]
-	cmp	w0, w1
-	bne	.L2294
-	lsr	w0, w0, 10
-	bl	P2V_block_in_plane
-	mov	w24, w0
-	ldr	w0, [x22, 8]
-	mov	w2, 1
-	add	x1, x22, 4
-	bl	log2phys
-	mov	w0, w24
-.L2309:
-	bl	decrement_vpc_count
-.L2295:
-	add	w21, w21, 1
-	and	w21, w21, 65535
-	b	.L2292
-.L2294:
-	ldr	w0, [x22, 4]
-	cmp	w1, w0
-	beq	.L2295
-	ldrh	w0, [x19, #:lo12:.LANCHOR93]
-	b	.L2309
-.L2298:
-	bl	INSERT_FREE_LIST
-	b	.L2299
-	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L2505:
+	mov	w0, 0
+	ret
+	.size	FtlLowFormat, .-FtlLowFormat
 	.section	.text.Ftl_get_new_temp_ppa,"ax",@progbits
 	.align	2
 	.global	Ftl_get_new_temp_ppa
 	.type	Ftl_get_new_temp_ppa, %function
 Ftl_get_new_temp_ppa:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR93
+	adrp	x0, .LANCHOR94
 	mov	w2, 65535
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	mov	x19, x0
-	ldrh	w3, [x0, #:lo12:.LANCHOR93]
+	ldrh	w3, [x0, #:lo12:.LANCHOR94]
 	cmp	w3, w2
-	beq	.L2312
-	add	x1, x0, :lo12:.LANCHOR93
+	beq	.L2509
+	add	x1, x0, :lo12:.LANCHOR94
 	ldrh	w0, [x1, 4]
-	cbnz	w0, .L2313
-.L2312:
+	cbnz	w0, .L2510
+.L2509:
 	bl	FtlCacheWriteBack
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
-	add	x0, x19, :lo12:.LANCHOR93
+	add	x0, x19, :lo12:.LANCHOR94
 	strb	wzr, [x0, 8]
 	bl	allocate_data_superblock
-	adrp	x0, .LANCHOR108
-	strh	wzr, [x0, #:lo12:.LANCHOR108]
-	adrp	x0, .LANCHOR110
-	strh	wzr, [x0, #:lo12:.LANCHOR110]
+	adrp	x0, .LANCHOR109
+	strh	wzr, [x0, #:lo12:.LANCHOR109]
+	adrp	x0, .LANCHOR111
+	strh	wzr, [x0, #:lo12:.LANCHOR111]
 	bl	l2p_flush
 	mov	w0, 0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L2313:
-	add	x0, x19, :lo12:.LANCHOR93
+.L2510:
+	add	x0, x19, :lo12:.LANCHOR94
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	get_new_active_ppa
@@ -15806,62 +17504,68 @@ Ftl_get_new_temp_ppa:
 	.global	Ftl_gc_temp_data_write_back
 	.type	Ftl_gc_temp_data_write_back, %function
 Ftl_gc_temp_data_write_back:
+	adrp	x0, .LANCHOR77
+	ldr	w0, [x0, #:lo12:.LANCHOR77]
+	cbz	w0, .L2513
+	mov	w0, 0
+	ret
+.L2516:
+	mov	w0, 0
+.L2512:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L2513:
 	stp	x29, x30, [sp, -32]!
 	adrp	x0, .LANCHOR8
 	add	x29, sp, 0
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR102
-	cbz	w0, .L2316
-	ldr	w0, [x19, #:lo12:.LANCHOR102]
-	tbz	x0, 0, .L2316
-	adrp	x0, .LANCHOR93+4
-	ldrh	w0, [x0, #:lo12:.LANCHOR93+4]
-	cbz	w0, .L2316
-.L2321:
-	mov	w0, 0
-.L2315:
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	ret
-.L2316:
-	adrp	x20, .LANCHOR178
-	ldr	w1, [x19, #:lo12:.LANCHOR102]
+	adrp	x19, .LANCHOR103
+	cbz	w0, .L2515
+	ldr	w0, [x19, #:lo12:.LANCHOR103]
+	tbz	x0, 0, .L2515
+	adrp	x0, .LANCHOR94+4
+	ldrh	w0, [x0, #:lo12:.LANCHOR94+4]
+	cbnz	w0, .L2516
+.L2515:
+	adrp	x20, .LANCHOR181
+	ldr	w1, [x19, #:lo12:.LANCHOR103]
 	mov	w3, 0
 	mov	w2, 0
-	ldr	x0, [x20, #:lo12:.LANCHOR178]
-	add	x19, x19, :lo12:.LANCHOR102
+	ldr	x0, [x20, #:lo12:.LANCHOR181]
+	add	x19, x19, :lo12:.LANCHOR103
 	bl	FlashProgPages
 	mov	w11, 0
 	mov	w12, 56
-.L2318:
+.L2517:
 	ldr	w1, [x19]
 	cmp	w11, w1
-	bcc	.L2320
-	ldr	x0, [x20, #:lo12:.LANCHOR178]
+	bcc	.L2519
+	ldr	x0, [x20, #:lo12:.LANCHOR181]
 	bl	FtlGcBufFree
 	str	wzr, [x19]
-	adrp	x0, .LANCHOR93+4
-	ldrh	w0, [x0, #:lo12:.LANCHOR93+4]
-	cbnz	w0, .L2321
+	adrp	x0, .LANCHOR94+4
+	ldrh	w0, [x0, #:lo12:.LANCHOR94+4]
+	cbnz	w0, .L2516
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
-	b	.L2332
-.L2320:
+	b	.L2529
+.L2519:
 	umull	x0, w11, w12
-	ldr	x2, [x20, #:lo12:.LANCHOR178]
+	ldr	x2, [x20, #:lo12:.LANCHOR181]
 	add	x1, x2, x0
 	ldr	w2, [x2, x0]
 	cmn	w2, #1
-	bne	.L2319
-	adrp	x0, .LANCHOR93
-	adrp	x3, .LANCHOR83
-	ldrh	w4, [x0, #:lo12:.LANCHOR93]
-	ldr	x3, [x3, #:lo12:.LANCHOR83]
+	bne	.L2518
+	adrp	x0, .LANCHOR94
+	adrp	x3, .LANCHOR84
+	ldrh	w4, [x0, #:lo12:.LANCHOR94]
+	ldr	x3, [x3, #:lo12:.LANCHOR84]
 	strh	wzr, [x3, x4, lsl 1]
-	strh	w2, [x0, #:lo12:.LANCHOR93]
-	adrp	x0, .LANCHOR135
-	add	x0, x0, :lo12:.LANCHOR135
+	strh	w2, [x0, #:lo12:.LANCHOR94]
+	adrp	x0, .LANCHOR138
+	add	x0, x0, :lo12:.LANCHOR138
 	ldr	w2, [x0, 96]
 	add	w2, w2, 1
 	str	w2, [x0, 96]
@@ -15870,269 +17574,108 @@ Ftl_gc_temp_data_write_back:
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
 	bl	FtlGcPageVarInit
-.L2332:
+.L2529:
 	mov	w0, 1
-	b	.L2315
-.L2319:
+	b	.L2512
+.L2518:
 	ldr	x0, [x1, 16]
 	ldr	w1, [x1, 4]
 	ldp	w2, w0, [x0, 8]
 	bl	FtlGcUpdatePage
 	add	w11, w11, 1
 	and	w11, w11, 65535
-	b	.L2318
+	b	.L2517
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
-	.section	.text.FtlGcPageRecovery,"ax",@progbits
-	.align	2
-	.global	FtlGcPageRecovery
-	.type	FtlGcPageRecovery, %function
-FtlGcPageRecovery:
-	stp	x29, x30, [sp, -32]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR52
-	adrp	x19, .LANCHOR93
-	add	x19, x19, :lo12:.LANCHOR93
-	ldrh	w1, [x20, #:lo12:.LANCHOR52]
-	mov	x0, x19
-	bl	FtlGcScanTempBlk
-	ldrh	w1, [x19, 2]
-	ldrh	w0, [x20, #:lo12:.LANCHOR52]
-	cmp	w1, w0
-	bcc	.L2333
-	adrp	x0, .LANCHOR124
-	add	x0, x0, :lo12:.LANCHOR124
-	bl	FtlMapBlkWriteDumpData
-	mov	w0, 0
-	bl	FtlGcFreeTempBlock
-	adrp	x0, .LANCHOR132
-	str	wzr, [x0, #:lo12:.LANCHOR132]
-.L2333:
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	ret
-	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
-	.section	.text.FtlPowerLostRecovery,"ax",@progbits
-	.align	2
-	.global	FtlPowerLostRecovery
-	.type	FtlPowerLostRecovery, %function
-FtlPowerLostRecovery:
-	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR231
-	add	x29, sp, 0
-	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR91
-	add	x19, x19, :lo12:.LANCHOR91
-	str	wzr, [x0, #:lo12:.LANCHOR231]
-	mov	x0, x19
-	bl	FtlRecoverySuperblock
-	mov	x0, x19
-	adrp	x19, .LANCHOR92
-	bl	FtlSlcSuperblockCheck
-	add	x19, x19, :lo12:.LANCHOR92
-	mov	x0, x19
-	bl	FtlRecoverySuperblock
-	mov	x0, x19
-	bl	FtlSlcSuperblockCheck
-	bl	FtlGcPageRecovery
-	mov	w0, -1
-	bl	decrement_vpc_count
-	mov	w0, 0
-	ldr	x19, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	ret
-	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
-	.section	.text.FtlSysBlkInit,"ax",@progbits
-	.align	2
-	.global	FtlSysBlkInit
-	.type	FtlSysBlkInit, %function
-FtlSysBlkInit:
-	stp	x29, x30, [sp, -64]!
-	adrp	x0, .LANCHOR229
-	mov	w1, -1
-	add	x29, sp, 0
-	strh	w1, [x0, #:lo12:.LANCHOR229]
-	adrp	x0, .LANCHOR38
-	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR230
-	ldrh	w0, [x0, #:lo12:.LANCHOR38]
-	stp	x21, x22, [sp, 32]
-	strh	wzr, [x19, #:lo12:.LANCHOR230]
-	str	x23, [sp, 48]
-	bl	FtlFreeSysBlkQueueInit
-	bl	FtlScanSysBlk
-	adrp	x0, .LANCHOR206
-	ldrh	w1, [x0, #:lo12:.LANCHOR206]
-	mov	w0, 65535
-	cmp	w1, w0
-	bne	.L2339
-.L2341:
-	mov	w23, -1
-.L2338:
-	mov	w0, w23
-	ldr	x23, [sp, 48]
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 64
-	ret
-.L2339:
-	bl	FtlLoadSysInfo
-	mov	w23, w0
-	cbnz	w0, .L2341
-	bl	FtlLoadMapInfo
-	bl	FtlLoadVonderInfo
-	bl	Ftl_load_ext_data
-	bl	FtlLoadEctTbl
-	bl	FtlFreeSysBLkSort
-	bl	SupperBlkListInit
-	bl	FtlPowerLostRecovery
-	mov	w0, 1
-	bl	FtlUpdateVaildLpn
-	adrp	x2, .LANCHOR67
-	adrp	x0, .LANCHOR96
-	mov	x3, 4
-	ldrh	w2, [x2, #:lo12:.LANCHOR67]
-	ldr	x0, [x0, #:lo12:.LANCHOR96]
-	add	x2, x3, x2, uxtw 4
-	add	x1, x0, 4
-	add	x0, x0, x2
-.L2342:
-	cmp	x1, x0
-	bne	.L2344
-	ldrh	w0, [x19, #:lo12:.LANCHOR230]
-	cbnz	w0, .L2343
-	b	.L2338
-.L2344:
-	ldr	w2, [x1], 16
-	tbz	w2, #31, .L2342
-.L2343:
-	adrp	x22, .LANCHOR91
-	add	x20, x22, :lo12:.LANCHOR91
-	mov	x0, x20
-	adrp	x21, .LANCHOR92
-	bl	FtlSuperblockPowerLostFix
-	add	x19, x21, :lo12:.LANCHOR92
-	mov	x0, x19
-	bl	FtlSuperblockPowerLostFix
-	adrp	x0, .LANCHOR83
-	ldrh	w3, [x20, 4]
-	ldr	x1, [x0, #:lo12:.LANCHOR83]
-	ldrh	w0, [x22, #:lo12:.LANCHOR91]
-	lsl	x0, x0, 1
-	ldrh	w2, [x1, x0]
-	sub	w2, w2, w3
-	adrp	x3, .LANCHOR52
-	strh	w2, [x1, x0]
-	strb	wzr, [x20, 6]
-	ldrh	w0, [x3, #:lo12:.LANCHOR52]
-	strh	w0, [x20, 2]
-	ldrh	w0, [x21, #:lo12:.LANCHOR92]
-	strh	wzr, [x20, 4]
-	ldrh	w4, [x19, 4]
-	lsl	x0, x0, 1
-	ldrh	w2, [x1, x0]
-	sub	w2, w2, w4
-	strh	w2, [x1, x0]
-	strb	wzr, [x19, 6]
-	ldrh	w0, [x3, #:lo12:.LANCHOR52]
-	strh	w0, [x19, 2]
-	strh	wzr, [x19, 4]
-	adrp	x0, .LANCHOR124
-	add	x0, x0, :lo12:.LANCHOR124
-	bl	FtlMapBlkWriteDumpData
-	adrp	x0, .LANCHOR215
-	add	x0, x0, :lo12:.LANCHOR215
-	bl	FtlMapBlkWriteDumpData
-	adrp	x0, .LANCHOR80
-	add	x0, x0, :lo12:.LANCHOR80
-	ldrh	w1, [x0, 30]
-	add	w1, w1, 1
-	strh	w1, [x0, 30]
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
-	bl	FtlVpcTblFlush
-	b	.L2338
-	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.section	.text.rk_ftl_garbage_collect,"ax",@progbits
 	.align	2
 	.global	rk_ftl_garbage_collect
 	.type	rk_ftl_garbage_collect, %function
 rk_ftl_garbage_collect:
-	adrp	x1, .LANCHOR76
-	ldr	w1, [x1, #:lo12:.LANCHOR76]
-	cbnz	w1, .L2401
+	adrp	x1, .LANCHOR77
+	ldr	w1, [x1, #:lo12:.LANCHOR77]
+	cbnz	w1, .L2582
 	stp	x29, x30, [sp, -192]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR168
+	adrp	x21, .LANCHOR171
 	stp	x19, x20, [sp, 16]
-	ldr	w1, [x21, #:lo12:.LANCHOR168]
+	ldr	w1, [x21, #:lo12:.LANCHOR171]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w1, .L2403
-	adrp	x1, .LANCHOR85
-	ldrh	w1, [x1, #:lo12:.LANCHOR85]
+	cbnz	w1, .L2584
+	adrp	x1, .LANCHOR86
+	ldrh	w1, [x1, #:lo12:.LANCHOR86]
 	cmp	w1, 47
-	bls	.L2403
-	adrp	x1, .LANCHOR113
-	mov	w4, 65535
-	ldrh	w3, [x1, #:lo12:.LANCHOR113]
-	cmp	w3, w4
-	beq	.L2351
-	adrp	x2, .LANCHOR112
-	ldrh	w5, [x2, #:lo12:.LANCHOR112]
-	cmp	w5, w4
-	bne	.L2351
-	strh	w3, [x2, #:lo12:.LANCHOR112]
-	mov	w2, -1
-	strh	w2, [x1, #:lo12:.LANCHOR113]
-.L2351:
-	cbnz	w0, .L2404
-	adrp	x0, .LANCHOR88
-	ldrh	w0, [x0, #:lo12:.LANCHOR88]
+	bls	.L2584
+	adrp	x5, .LANCHOR114
+	mov	w2, 65535
+	ldrh	w8, [x5, #:lo12:.LANCHOR114]
+	cmp	w8, w2
+	beq	.L2532
+	adrp	x7, .LANCHOR113
+	ldrh	w1, [x7, #:lo12:.LANCHOR113]
+	cmp	w1, w2
+	bne	.L2532
+	adrp	x3, .LANCHOR115
+	ldrh	w6, [x3, #:lo12:.LANCHOR115]
+	cmp	w6, w1
+	beq	.L2532
+	adrp	x2, .LANCHOR116
+	ldrh	w4, [x2, #:lo12:.LANCHOR116]
+	cmp	w4, w1
+	beq	.L2532
+	mov	w1, -1
+	strh	w8, [x7, #:lo12:.LANCHOR113]
+	strh	w6, [x5, #:lo12:.LANCHOR114]
+	strh	w4, [x3, #:lo12:.LANCHOR115]
+	strh	w1, [x2, #:lo12:.LANCHOR116]
+.L2532:
+	cbnz	w0, .L2585
+	adrp	x0, .LANCHOR89
+	ldrh	w0, [x0, #:lo12:.LANCHOR89]
 	cmp	w0, 24
-	bhi	.L2405
-	adrp	x1, .LANCHOR52
+	bhi	.L2586
+	adrp	x1, .LANCHOR53
 	cmp	w0, 16
-	ldrh	w20, [x1, #:lo12:.LANCHOR52]
-	bls	.L2354
+	ldrh	w20, [x1, #:lo12:.LANCHOR53]
+	bls	.L2535
 	lsr	w20, w20, 5
-.L2353:
-	adrp	x2, .LANCHOR173
+.L2534:
+	adrp	x2, .LANCHOR176
 	mov	x3, x2
-	ldrh	w1, [x2, #:lo12:.LANCHOR173]
+	ldrh	w1, [x2, #:lo12:.LANCHOR176]
 	cmp	w1, w0
-	bcs	.L2357
-	adrp	x0, .LANCHOR93
+	bcs	.L2538
+	adrp	x0, .LANCHOR94
 	mov	w1, 65535
-	ldrh	w0, [x0, #:lo12:.LANCHOR93]
+	ldrh	w0, [x0, #:lo12:.LANCHOR94]
 	cmp	w0, w1
-	bne	.L2358
-	adrp	x1, .LANCHOR112
-	ldrh	w1, [x1, #:lo12:.LANCHOR112]
+	bne	.L2539
+	adrp	x1, .LANCHOR113
+	ldrh	w1, [x1, #:lo12:.LANCHOR113]
 	cmp	w1, w0
-	bne	.L2358
-	adrp	x0, .LANCHOR235
-	ldrh	w0, [x0, #:lo12:.LANCHOR235]
-	cbnz	w0, .L2359
-	adrp	x1, .LANCHOR72
-	adrp	x4, .LANCHOR100
-	ldr	w1, [x1, #:lo12:.LANCHOR72]
-	ldr	w4, [x4, #:lo12:.LANCHOR100]
+	bne	.L2539
+	adrp	x0, .LANCHOR240
+	ldrh	w0, [x0, #:lo12:.LANCHOR240]
+	cbnz	w0, .L2540
+	adrp	x1, .LANCHOR73
+	adrp	x4, .LANCHOR101
+	ldr	w1, [x1, #:lo12:.LANCHOR73]
+	ldr	w4, [x4, #:lo12:.LANCHOR101]
 	add	w1, w1, w1, lsl 1
 	cmp	w4, w1, lsr 2
-	bcs	.L2360
-.L2359:
-	adrp	x1, .LANCHOR227
-	ldrh	w1, [x1, #:lo12:.LANCHOR227]
+	bcs	.L2541
+.L2540:
+	adrp	x1, .LANCHOR223
+	ldrh	w1, [x1, #:lo12:.LANCHOR223]
 	add	w1, w1, w1, lsl 1
 	asr	w1, w1, 2
-	strh	w1, [x3, #:lo12:.LANCHOR173]
-.L2361:
-	adrp	x1, .LANCHOR169
-	str	wzr, [x1, #:lo12:.LANCHOR169]
-.L2349:
+	strh	w1, [x3, #:lo12:.LANCHOR176]
+.L2542:
+	adrp	x1, .LANCHOR172
+	str	wzr, [x1, #:lo12:.LANCHOR172]
+.L2530:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -16140,183 +17683,183 @@ rk_ftl_garbage_collect:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L2354:
+.L2535:
 	cmp	w0, 12
-	bls	.L2355
+	bls	.L2536
 	lsr	w20, w20, 4
-	b	.L2353
-.L2355:
+	b	.L2534
+.L2536:
 	cmp	w0, 8
-	bls	.L2353
+	bls	.L2534
 	lsr	w20, w20, 2
-	b	.L2353
-.L2405:
+	b	.L2534
+.L2586:
 	mov	w20, 1
-	b	.L2353
-.L2360:
+	b	.L2534
+.L2541:
 	mov	w1, 18
-	strh	w1, [x2, #:lo12:.LANCHOR173]
-	b	.L2361
-.L2358:
-	adrp	x0, .LANCHOR227
-	ldrh	w0, [x0, #:lo12:.LANCHOR227]
+	strh	w1, [x2, #:lo12:.LANCHOR176]
+	b	.L2542
+.L2539:
+	adrp	x0, .LANCHOR223
+	ldrh	w0, [x0, #:lo12:.LANCHOR223]
 	add	w0, w0, w0, lsl 1
 	asr	w0, w0, 2
-	strh	w0, [x3, #:lo12:.LANCHOR173]
-.L2357:
-	adrp	x0, .LANCHOR114
-	ldrh	w0, [x0, #:lo12:.LANCHOR114]
-	cbz	w0, .L2352
+	strh	w0, [x3, #:lo12:.LANCHOR176]
+.L2538:
+	adrp	x0, .LANCHOR117
+	ldrh	w0, [x0, #:lo12:.LANCHOR117]
+	cbz	w0, .L2533
 	add	w20, w20, 32
 	and	w20, w20, 65535
-.L2352:
-	adrp	x19, .LANCHOR201
+.L2533:
+	adrp	x19, .LANCHOR204
 	mov	w0, 65535
-	ldrh	w2, [x19, #:lo12:.LANCHOR201]
+	ldrh	w2, [x19, #:lo12:.LANCHOR204]
 	cmp	w2, w0
-	bne	.L2364
-	adrp	x0, .LANCHOR112
-	ldrh	w1, [x0, #:lo12:.LANCHOR112]
+	bne	.L2545
+	adrp	x0, .LANCHOR113
+	ldrh	w1, [x0, #:lo12:.LANCHOR113]
 	cmp	w1, w2
-	beq	.L2365
-	adrp	x2, .LANCHOR83
+	beq	.L2546
+	adrp	x2, .LANCHOR84
 	ubfiz	x1, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR83]
+	ldr	x2, [x2, #:lo12:.LANCHOR84]
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L2366
+	cbnz	w1, .L2547
 	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR112]
-.L2366:
-	ldrh	w1, [x0, #:lo12:.LANCHOR112]
-	strh	w1, [x19, #:lo12:.LANCHOR201]
+	strh	w1, [x0, #:lo12:.LANCHOR113]
+.L2547:
+	ldrh	w1, [x0, #:lo12:.LANCHOR113]
+	strh	w1, [x19, #:lo12:.LANCHOR204]
 	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR112]
-.L2365:
-	add	x0, x19, :lo12:.LANCHOR201
+	strh	w1, [x0, #:lo12:.LANCHOR113]
+.L2546:
+	add	x0, x19, :lo12:.LANCHOR204
 	mov	w1, 65535
 	strb	wzr, [x0, 8]
-	ldrh	w0, [x19, #:lo12:.LANCHOR201]
+	ldrh	w0, [x19, #:lo12:.LANCHOR204]
 	cmp	w0, w1
-	beq	.L2364
+	beq	.L2545
 	bl	IsBlkInGcList
-	cbz	w0, .L2368
+	cbz	w0, .L2549
 	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR201]
-.L2368:
+	strh	w0, [x19, #:lo12:.LANCHOR204]
+.L2549:
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L2369
-	ldrh	w0, [x19, #:lo12:.LANCHOR201]
-	add	x3, x19, :lo12:.LANCHOR201
+	cbz	w0, .L2550
+	ldrh	w0, [x19, #:lo12:.LANCHOR204]
+	add	x3, x19, :lo12:.LANCHOR204
 	bl	ftl_get_blk_mode
 	strb	w0, [x3, 8]
-.L2369:
-	ldrh	w1, [x19, #:lo12:.LANCHOR201]
+.L2550:
+	ldrh	w1, [x19, #:lo12:.LANCHOR204]
 	mov	w0, 65535
-	add	x22, x19, :lo12:.LANCHOR201
+	add	x22, x19, :lo12:.LANCHOR204
 	cmp	w1, w0
-	beq	.L2364
+	beq	.L2545
 	mov	x0, x22
 	bl	make_superblock
-	adrp	x0, .LANCHOR236
-	ldrh	w1, [x19, #:lo12:.LANCHOR201]
+	adrp	x0, .LANCHOR241
+	ldrh	w1, [x19, #:lo12:.LANCHOR204]
 	strh	wzr, [x22, 2]
-	strh	wzr, [x0, #:lo12:.LANCHOR236]
-	adrp	x0, .LANCHOR83
+	strh	wzr, [x0, #:lo12:.LANCHOR241]
+	adrp	x0, .LANCHOR84
 	strb	wzr, [x22, 6]
-	ldr	x0, [x0, #:lo12:.LANCHOR83]
+	ldr	x0, [x0, #:lo12:.LANCHOR84]
 	ldrh	w1, [x0, x1, lsl 1]
-	adrp	x0, .LANCHOR237
-	strh	w1, [x0, #:lo12:.LANCHOR237]
-.L2364:
-	adrp	x0, .LANCHOR91
-	ldrh	w1, [x19, #:lo12:.LANCHOR201]
+	adrp	x0, .LANCHOR242
+	strh	w1, [x0, #:lo12:.LANCHOR242]
+.L2545:
+	adrp	x0, .LANCHOR92
+	ldrh	w1, [x19, #:lo12:.LANCHOR204]
 	str	x0, [x29, 144]
-	ldrh	w2, [x0, #:lo12:.LANCHOR91]
+	ldrh	w2, [x0, #:lo12:.LANCHOR92]
 	cmp	w2, w1
-	beq	.L2370
-	adrp	x0, .LANCHOR92
+	beq	.L2551
+	adrp	x0, .LANCHOR93
 	str	x0, [x29, 136]
-	ldrh	w2, [x0, #:lo12:.LANCHOR92]
+	ldrh	w2, [x0, #:lo12:.LANCHOR93]
 	cmp	w2, w1
-	beq	.L2370
-	adrp	x23, .LANCHOR175
-	add	x0, x23, :lo12:.LANCHOR175
+	beq	.L2551
+	adrp	x23, .LANCHOR178
+	add	x0, x23, :lo12:.LANCHOR178
 	str	x0, [x29, 168]
-.L2371:
-	ldrh	w1, [x19, #:lo12:.LANCHOR201]
+.L2552:
+	ldrh	w1, [x19, #:lo12:.LANCHOR204]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2372
-	adrp	x0, .LANCHOR169
-	adrp	x22, .LANCHOR52
-	add	x22, x22, :lo12:.LANCHOR52
-	str	wzr, [x0, #:lo12:.LANCHOR169]
-.L2373:
-	ldrh	w5, [x23, #:lo12:.LANCHOR175]
-	add	x7, x23, :lo12:.LANCHOR175
+	bne	.L2553
+	adrp	x0, .LANCHOR172
+	adrp	x22, .LANCHOR53
+	add	x22, x22, :lo12:.LANCHOR53
+	str	wzr, [x0, #:lo12:.LANCHOR172]
+.L2554:
+	ldrh	w5, [x23, #:lo12:.LANCHOR178]
+	add	x7, x23, :lo12:.LANCHOR178
 	mov	w0, w5
 	bl	List_get_gc_head_node
 	and	w6, w0, 65535
-	strh	w6, [x19, #:lo12:.LANCHOR201]
+	strh	w6, [x19, #:lo12:.LANCHOR204]
 	mov	w0, 65535
 	cmp	w6, w0
-	bne	.L2374
+	bne	.L2555
 	strh	wzr, [x7]
 	mov	w0, 8
-	b	.L2349
-.L2404:
+	b	.L2530
+.L2585:
 	mov	w20, 1
-	b	.L2352
-.L2370:
+	b	.L2533
+.L2551:
 	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR201]
-.L2440:
-	adrp	x0, .LANCHOR235
-	ldrh	w0, [x0, #:lo12:.LANCHOR235]
-	b	.L2349
-.L2374:
+	strh	w0, [x19, #:lo12:.LANCHOR204]
+.L2621:
+	adrp	x0, .LANCHOR240
+	ldrh	w0, [x0, #:lo12:.LANCHOR240]
+	b	.L2530
+.L2555:
 	mov	w0, w6
 	bl	IsBlkInGcList
 	add	w5, w5, 1
-	cbz	w0, .L2375
-	strh	w5, [x23, #:lo12:.LANCHOR175]
-	b	.L2373
-.L2375:
-	adrp	x24, .LANCHOR83
-	adrp	x4, .LANCHOR37
+	cbz	w0, .L2556
+	strh	w5, [x23, #:lo12:.LANCHOR178]
+	b	.L2554
+.L2556:
+	adrp	x24, .LANCHOR84
+	adrp	x4, .LANCHOR38
 	ldrh	w0, [x22]
 	ubfiz	x1, x6, 1, 16
-	ldr	x2, [x24, #:lo12:.LANCHOR83]
+	ldr	x2, [x24, #:lo12:.LANCHOR84]
 	and	w5, w5, 65535
-	ldrh	w4, [x4, #:lo12:.LANCHOR37]
-	strh	w5, [x23, #:lo12:.LANCHOR175]
+	ldrh	w4, [x4, #:lo12:.LANCHOR38]
+	strh	w5, [x23, #:lo12:.LANCHOR178]
 	ldrh	w3, [x2, x1]
 	mul	w0, w0, w4
 	cmp	w3, w0, asr 1
-	bgt	.L2377
+	bgt	.L2558
 	cmp	w5, 48
-	bls	.L2378
+	bls	.L2559
 	cmp	w3, 8
-	bls	.L2378
-	adrp	x3, .LANCHOR108
-	ldrh	w3, [x3, #:lo12:.LANCHOR108]
+	bls	.L2559
+	adrp	x3, .LANCHOR109
+	ldrh	w3, [x3, #:lo12:.LANCHOR109]
 	cmp	w3, 35
-	bhi	.L2378
-.L2377:
+	bhi	.L2559
+.L2558:
 	ldr	x3, [x29, 168]
 	strh	wzr, [x3]
-.L2378:
+.L2559:
 	ldrh	w1, [x2, x1]
 	cmp	w0, w1
-	bgt	.L2379
+	bgt	.L2560
 	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR201]
-	adrp	x0, .LANCHOR175
-	strh	wzr, [x0, #:lo12:.LANCHOR175]
-	b	.L2440
-.L2379:
-	cbnz	w1, .L2380
+	strh	w0, [x19, #:lo12:.LANCHOR204]
+	adrp	x0, .LANCHOR178
+	strh	wzr, [x0, #:lo12:.LANCHOR178]
+	b	.L2621
+.L2560:
+	cbnz	w1, .L2561
 	mov	w0, -1
 	bl	decrement_vpc_count
 	ldr	x0, [x29, 168]
@@ -16324,142 +17867,142 @@ rk_ftl_garbage_collect:
 	ldrh	w0, [x0]
 	add	w0, w0, 1
 	strh	w0, [x1]
-	b	.L2373
-.L2380:
+	b	.L2554
+.L2561:
 	adrp	x0, .LANCHOR8
-	add	x3, x19, :lo12:.LANCHOR201
+	add	x3, x19, :lo12:.LANCHOR204
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
 	strb	wzr, [x3, 8]
-	cbz	w0, .L2381
+	cbz	w0, .L2562
 	mov	w0, w6
 	bl	ftl_get_blk_mode
 	strb	w0, [x3, 8]
-.L2381:
+.L2562:
 	ldr	x0, [x29, 144]
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	ldrh	w0, [x0, #:lo12:.LANCHOR92]
 	cmp	w0, w6
-	bne	.L2382
-	mov	w2, 835
-	adrp	x1, .LANCHOR238
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR238
-	add	x0, x0, :lo12:.LC6
+	bne	.L2563
+	mov	w2, 851
+	adrp	x1, .LANCHOR243
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR243
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2382:
+.L2563:
 	ldr	x0, [x29, 136]
-	ldrh	w1, [x19, #:lo12:.LANCHOR201]
-	ldrh	w0, [x0, #:lo12:.LANCHOR92]
+	ldrh	w1, [x19, #:lo12:.LANCHOR204]
+	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w1, w0
-	bne	.L2383
-	mov	w2, 836
-	adrp	x1, .LANCHOR238
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR238
-	add	x0, x0, :lo12:.LC6
+	bne	.L2564
+	mov	w2, 852
+	adrp	x1, .LANCHOR243
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR243
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2383:
-	adrp	x0, .LANCHOR93
-	ldrh	w1, [x19, #:lo12:.LANCHOR201]
-	ldrh	w0, [x0, #:lo12:.LANCHOR93]
+.L2564:
+	adrp	x0, .LANCHOR94
+	ldrh	w1, [x19, #:lo12:.LANCHOR204]
+	ldrh	w0, [x0, #:lo12:.LANCHOR94]
 	cmp	w1, w0
-	bne	.L2384
-	mov	w2, 837
-	adrp	x1, .LANCHOR238
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR238
-	add	x0, x0, :lo12:.LC6
+	bne	.L2565
+	mov	w2, 853
+	adrp	x1, .LANCHOR243
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR243
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2384:
-	add	x22, x19, :lo12:.LANCHOR201
+.L2565:
+	add	x22, x19, :lo12:.LANCHOR204
 	mov	x0, x22
 	bl	make_superblock
-	adrp	x0, .LANCHOR236
-	ldrh	w1, [x19, #:lo12:.LANCHOR201]
-	strh	wzr, [x0, #:lo12:.LANCHOR236]
-	ldr	x0, [x24, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR241
+	ldrh	w1, [x19, #:lo12:.LANCHOR204]
+	strh	wzr, [x0, #:lo12:.LANCHOR241]
+	ldr	x0, [x24, #:lo12:.LANCHOR84]
 	ldrh	w1, [x0, x1, lsl 1]
-	adrp	x0, .LANCHOR237
+	adrp	x0, .LANCHOR242
 	strh	wzr, [x22, 2]
-	strh	w1, [x0, #:lo12:.LANCHOR237]
+	strh	w1, [x0, #:lo12:.LANCHOR242]
 	strb	wzr, [x22, 6]
-.L2372:
+.L2553:
 	mov	w0, 1
-	str	w0, [x21, #:lo12:.LANCHOR168]
+	str	w0, [x21, #:lo12:.LANCHOR171]
 	adrp	x0, .LANCHOR8
-	adrp	x1, .LANCHOR52
+	adrp	x1, .LANCHOR53
 	stp	x0, x1, [x29, 120]
 	ldrb	w2, [x0, #:lo12:.LANCHOR8]
-	ldrh	w26, [x1, #:lo12:.LANCHOR52]
-	cbz	w2, .L2385
-	add	x0, x19, :lo12:.LANCHOR201
+	ldrh	w26, [x1, #:lo12:.LANCHOR53]
+	cbz	w2, .L2566
+	add	x0, x19, :lo12:.LANCHOR204
 	ldrb	w0, [x0, 8]
 	cmp	w0, 1
-	bne	.L2385
-	adrp	x0, .LANCHOR53
-	ldrh	w26, [x0, #:lo12:.LANCHOR53]
-.L2385:
-	add	x0, x19, :lo12:.LANCHOR201
+	bne	.L2566
+	adrp	x0, .LANCHOR54
+	ldrh	w26, [x0, #:lo12:.LANCHOR54]
+.L2566:
+	add	x0, x19, :lo12:.LANCHOR204
 	ldrh	w0, [x0, 2]
 	add	w1, w0, w20
 	cmp	w1, w26
-	ble	.L2386
+	ble	.L2567
 	sub	w20, w26, w0
 	and	w20, w20, 65535
-.L2386:
-	adrp	x0, .LANCHOR236
+.L2567:
+	adrp	x0, .LANCHOR241
 	mov	w27, 0
-	add	x0, x0, :lo12:.LANCHOR236
+	add	x0, x0, :lo12:.LANCHOR241
 	str	x0, [x29, 160]
-.L2387:
+.L2568:
 	cmp	w20, w27, uxth
-	bls	.L2395
-	add	x1, x19, :lo12:.LANCHOR201
-	adrp	x0, .LANCHOR37
-	adrp	x24, .LANCHOR106
+	bls	.L2576
+	add	x1, x19, :lo12:.LANCHOR204
+	adrp	x0, .LANCHOR38
+	adrp	x24, .LANCHOR107
 	add	x1, x1, 16
-	ldrh	w7, [x0, #:lo12:.LANCHOR37]
+	ldrh	w7, [x0, #:lo12:.LANCHOR38]
 	mov	w22, 0
 	ldrh	w4, [x1, -14]
 	mov	w2, 0
-	ldr	x0, [x24, #:lo12:.LANCHOR106]
+	ldr	x0, [x24, #:lo12:.LANCHOR107]
 	mov	w6, 65535
 	add	w4, w4, w27
 	mov	w5, 56
-	b	.L2396
-.L2389:
+	b	.L2577
+.L2570:
 	ldrh	w3, [x1]
 	cmp	w3, w6
-	beq	.L2388
+	beq	.L2569
 	umaddl	x8, w22, w5, x0
 	add	w22, w22, 1
 	and	w22, w22, 65535
 	orr	w3, w4, w3, lsl 10
 	str	w3, [x8, 4]
-.L2388:
+.L2569:
 	add	w2, w2, 1
 	add	x1, x1, 2
 	and	w2, w2, 65535
-.L2396:
+.L2577:
 	cmp	w2, w7
-	bne	.L2389
-	add	x1, x19, :lo12:.LANCHOR201
-	adrp	x25, .LANCHOR102
-	add	x25, x25, :lo12:.LANCHOR102
+	bne	.L2570
+	add	x1, x19, :lo12:.LANCHOR204
+	adrp	x25, .LANCHOR103
+	add	x25, x25, :lo12:.LANCHOR103
 	ldrb	w2, [x1, 8]
 	mov	w1, w22
 	bl	FlashReadPages
@@ -16467,55 +18010,55 @@ rk_ftl_garbage_collect:
 	umull	x0, w22, w0
 	mov	x22, 0
 	str	x0, [x29, 152]
-.L2390:
+.L2571:
 	ldr	x0, [x29, 152]
 	cmp	x22, x0
-	bne	.L2394
+	bne	.L2575
 	add	w27, w27, 1
-	b	.L2387
-.L2394:
-	ldr	x0, [x24, #:lo12:.LANCHOR106]
+	b	.L2568
+.L2575:
+	ldr	x0, [x24, #:lo12:.LANCHOR107]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	beq	.L2391
+	beq	.L2572
 	ldr	x28, [x1, 16]
 	mov	w0, 61589
 	ldrh	w1, [x28]
 	cmp	w1, w0
-	bne	.L2391
+	bne	.L2572
 	ldr	w4, [x28, 8]
 	cmn	w4, #1
-	bne	.L2392
-	mov	w2, 876
+	bne	.L2573
+	mov	w2, 892
 	str	w4, [x29, 112]
-	adrp	x1, .LANCHOR238
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR238
-	add	x0, x0, :lo12:.LC6
+	adrp	x1, .LANCHOR243
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR243
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
 	ldr	w4, [x29, 112]
-.L2392:
+.L2573:
 	mov	w2, 0
 	add	x1, x29, 188
 	mov	w0, w4
 	bl	log2phys
-	ldr	x0, [x24, #:lo12:.LANCHOR106]
+	ldr	x0, [x24, #:lo12:.LANCHOR107]
 	ldr	w1, [x29, 188]
 	add	x0, x0, x22
 	and	w1, w1, 2147483647
 	ldr	w2, [x0, 4]
 	cmp	w1, w2
-	bne	.L2391
+	bne	.L2572
 	ldr	x1, [x29, 160]
-	adrp	x4, .LANCHOR178
+	adrp	x4, .LANCHOR181
 	ldr	x2, [x29, 160]
-	ldr	x5, [x4, #:lo12:.LANCHOR178]
+	ldr	x5, [x4, #:lo12:.LANCHOR181]
 	ldr	w0, [x0, 24]
 	ldrh	w1, [x1]
 	str	x4, [x29, 96]
@@ -16533,10 +18076,10 @@ rk_ftl_garbage_collect:
 	ldr	x2, [x29, 112]
 	ldr	w1, [x29, 108]
 	str	w0, [x2, 4]
-	ldr	x0, [x4, #:lo12:.LANCHOR178]
+	ldr	x0, [x4, #:lo12:.LANCHOR181]
 	ldr	w2, [x25]
 	umaddl	x1, w2, w1, x0
-	ldr	x0, [x24, #:lo12:.LANCHOR106]
+	ldr	x0, [x24, #:lo12:.LANCHOR107]
 	add	w2, w2, 1
 	add	x0, x0, x22
 	ldr	x4, [x0, 8]
@@ -16545,84 +18088,94 @@ rk_ftl_garbage_collect:
 	str	x4, [x1, 16]
 	ldr	w1, [x29, 188]
 	str	w1, [x28, 12]
-	adrp	x1, .LANCHOR93
-	add	x12, x1, :lo12:.LANCHOR93
-	ldrh	w1, [x1, #:lo12:.LANCHOR93]
+	adrp	x1, .LANCHOR94
+	add	x12, x1, :lo12:.LANCHOR94
+	ldrh	w1, [x1, #:lo12:.LANCHOR94]
 	strh	w1, [x28, 2]
-	adrp	x1, .LANCHOR157
+	adrp	x1, .LANCHOR160
 	str	w2, [x25]
-	ldr	w1, [x1, #:lo12:.LANCHOR157]
+	ldr	w1, [x1, #:lo12:.LANCHOR160]
 	str	w1, [x28, 4]
 	mov	w1, 1
 	bl	FtlGcBufAlloc
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbnz	w0, .L2393
+	cbnz	w0, .L2574
 	ldrb	w1, [x12, 7]
 	ldr	w0, [x25]
 	cmp	w1, w0
-	beq	.L2393
+	beq	.L2574
 	ldrh	w0, [x12, 4]
-	cbnz	w0, .L2391
-.L2393:
+	cbnz	w0, .L2572
+.L2574:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	w0, .L2391
-.L2441:
-	str	wzr, [x21, #:lo12:.LANCHOR168]
-	b	.L2440
-.L2391:
+	cbz	w0, .L2572
+.L2622:
+	str	wzr, [x21, #:lo12:.LANCHOR171]
+	b	.L2621
+.L2572:
 	add	x22, x22, 56
-	b	.L2390
-.L2395:
-	add	x1, x19, :lo12:.LANCHOR201
+	b	.L2571
+.L2576:
+	add	x1, x19, :lo12:.LANCHOR204
 	ldrh	w0, [x1, 2]
 	add	w20, w20, w0
 	and	w20, w20, 65535
 	strh	w20, [x1, 2]
 	cmp	w26, w20
-	bhi	.L2397
-	adrp	x0, .LANCHOR102
-	ldr	w0, [x0, #:lo12:.LANCHOR102]
-	cbz	w0, .L2398
+	bhi	.L2578
+	adrp	x0, .LANCHOR103
+	ldr	w0, [x0, #:lo12:.LANCHOR103]
+	cbz	w0, .L2579
 	bl	Ftl_gc_temp_data_write_back
-	cbnz	w0, .L2441
-.L2398:
-	adrp	x0, .LANCHOR236
-	ldrh	w0, [x0, #:lo12:.LANCHOR236]
-	cbnz	w0, .L2399
-	ldrh	w0, [x19, #:lo12:.LANCHOR201]
-	adrp	x1, .LANCHOR83
-	ldr	x1, [x1, #:lo12:.LANCHOR83]
-	lsl	x0, x0, 1
-	ldrh	w2, [x1, x0]
-	cbz	w2, .L2399
-	strh	wzr, [x1, x0]
-	ldrh	w0, [x19, #:lo12:.LANCHOR201]
+	cbnz	w0, .L2622
+.L2579:
+	adrp	x0, .LANCHOR241
+	ldrh	w0, [x0, #:lo12:.LANCHOR241]
+	cbnz	w0, .L2580
+	ldrh	w1, [x19, #:lo12:.LANCHOR204]
+	adrp	x20, .LANCHOR84
+	add	x0, x19, :lo12:.LANCHOR204
+	ldr	x3, [x20, #:lo12:.LANCHOR84]
+	ubfiz	x2, x1, 1, 16
+	ldrh	w4, [x3, x2]
+	cbz	w4, .L2580
+	adrp	x2, .LANCHOR242
+	mov	w3, 0
+	ldrh	w5, [x2, #:lo12:.LANCHOR242]
+	ldrh	w2, [x0, 2]
+	adrp	x0, .LC66
+	add	x0, x0, :lo12:.LC66
+	bl	printf
+	ldrh	w1, [x19, #:lo12:.LANCHOR204]
+	ldr	x0, [x20, #:lo12:.LANCHOR84]
+	strh	wzr, [x0, x1, lsl 1]
+	ldrh	w0, [x19, #:lo12:.LANCHOR204]
 	bl	update_vpc_list
 	bl	FtlCacheWriteBack
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L2399:
+.L2580:
 	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR201]
-.L2397:
-	adrp	x0, .LANCHOR88
-	ldrh	w0, [x0, #:lo12:.LANCHOR88]
+	strh	w0, [x19, #:lo12:.LANCHOR204]
+.L2578:
+	adrp	x0, .LANCHOR89
+	ldrh	w0, [x0, #:lo12:.LANCHOR89]
 	cmp	w0, 2
-	bhi	.L2400
+	bhi	.L2581
 	ldr	x0, [x29, 128]
-	ldrh	w20, [x0, #:lo12:.LANCHOR52]
-	b	.L2371
-.L2400:
-	str	wzr, [x21, #:lo12:.LANCHOR168]
+	ldrh	w20, [x0, #:lo12:.LANCHOR53]
+	b	.L2552
+.L2581:
+	str	wzr, [x21, #:lo12:.LANCHOR171]
 	add	w0, w0, 1
-	b	.L2349
-.L2401:
+	b	.L2530
+.L2582:
 	mov	w0, 0
 	ret
-.L2403:
+.L2584:
 	mov	w0, 0
-	b	.L2349
+	b	.L2530
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
 	.section	.text.FtlInit,"ax",@progbits
 	.align	2
@@ -16630,65 +18183,65 @@ rk_ftl_garbage_collect:
 	.type	FtlInit, %function
 FtlInit:
 	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LC51
-	add	x1, x1, :lo12:.LC51
+	adrp	x1, .LC67
+	add	x1, x1, :lo12:.LC67
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR223
+	adrp	x19, .LANCHOR231
 	mov	x20, x0
 	mov	w0, -1
-	str	w0, [x19, #:lo12:.LANCHOR223]
-	adrp	x0, .LANCHOR239
-	str	wzr, [x0, #:lo12:.LANCHOR239]
-	adrp	x0, .LANCHOR76
-	str	wzr, [x0, #:lo12:.LANCHOR76]
-	adrp	x0, .LC8
-	add	x0, x0, :lo12:.LC8
+	str	w0, [x19, #:lo12:.LANCHOR231]
+	adrp	x0, .LANCHOR244
+	str	wzr, [x0, #:lo12:.LANCHOR244]
+	adrp	x0, .LANCHOR77
+	str	wzr, [x0, #:lo12:.LANCHOR77]
+	adrp	x0, .LC7
+	add	x0, x0, :lo12:.LC7
 	bl	printf
 	mov	x0, x20
 	bl	FtlConstantsInit
 	bl	FtlMemInit
 	bl	FtlVariablesInit
-	adrp	x0, .LANCHOR38
-	ldrh	w0, [x0, #:lo12:.LANCHOR38]
+	adrp	x0, .LANCHOR39
+	ldrh	w0, [x0, #:lo12:.LANCHOR39]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	w0, .L2443
-	adrp	x1, .LANCHOR240
-	adrp	x0, .LC52
-	add	x1, x1, :lo12:.LANCHOR240
-	add	x0, x0, :lo12:.LC52
-.L2451:
+	cbz	w0, .L2624
+	adrp	x1, .LANCHOR245
+	adrp	x0, .LC68
+	add	x1, x1, :lo12:.LANCHOR245
+	add	x0, x0, :lo12:.LC68
+.L2632:
 	bl	printf
-.L2444:
+.L2625:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2443:
+.L2624:
 	bl	FtlSysBlkInit
-	cbz	w0, .L2445
-	adrp	x1, .LANCHOR240
-	adrp	x0, .LC53
-	add	x1, x1, :lo12:.LANCHOR240
-	add	x0, x0, :lo12:.LC53
-	b	.L2451
-.L2445:
+	cbz	w0, .L2626
+	adrp	x1, .LANCHOR245
+	adrp	x0, .LC69
+	add	x1, x1, :lo12:.LANCHOR245
+	add	x0, x0, :lo12:.LC69
+	b	.L2632
+.L2626:
 	mov	w1, 1
-	str	w1, [x19, #:lo12:.LANCHOR223]
+	str	w1, [x19, #:lo12:.LANCHOR231]
 	bl	rk_ftl_garbage_collect
-	adrp	x0, .LANCHOR88
-	ldrh	w0, [x0, #:lo12:.LANCHOR88]
+	adrp	x0, .LANCHOR89
+	ldrh	w0, [x0, #:lo12:.LANCHOR89]
 	cmp	w0, 15
-	bhi	.L2444
+	bhi	.L2625
 	mov	w19, 1024
-.L2447:
+.L2628:
 	mov	w1, 1
 	mov	w0, w1
 	bl	rk_ftl_garbage_collect
 	subs	w19, w19, #1
-	bne	.L2447
-	b	.L2444
+	bne	.L2628
+	b	.L2625
 	.size	FtlInit, .-FtlInit
 	.section	.text.rk_ftl_init,"ax",@progbits
 	.align	2
@@ -16700,14 +18253,15 @@ rk_ftl_init:
 	str	x19, [sp, 16]
 	bl	FlashInit
 	mov	w19, w0
-	cbnz	w0, .L2453
+	cbnz	w0, .L2634
 	adrp	x0, .LANCHOR15
 	add	x0, x0, :lo12:.LANCHOR15
 	bl	FtlInit
-.L2453:
+.L2634:
+	bl	idb_init
 	mov	w1, w19
-	adrp	x0, .LC54
-	add	x0, x0, :lo12:.LC54
+	adrp	x0, .LC70
+	add	x0, x0, :lo12:.LC70
 	bl	printf
 	mov	w0, w19
 	ldr	x19, [sp, 16]
@@ -16721,108 +18275,108 @@ rk_ftl_init:
 ftl_fix_nand_power_lost_error:
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L2470
+	cbz	w0, .L2651
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
 	str	x25, [sp, 64]
-	adrp	x25, .LANCHOR229
+	adrp	x25, .LANCHOR235
 	stp	x23, x24, [sp, 48]
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR83
-	ldrh	w23, [x25, #:lo12:.LANCHOR229]
-	ldr	x0, [x21, #:lo12:.LANCHOR83]
+	adrp	x21, .LANCHOR84
+	ldrh	w23, [x25, #:lo12:.LANCHOR235]
+	ldr	x0, [x21, #:lo12:.LANCHOR84]
 	mov	w1, w23
 	stp	x19, x20, [sp, 16]
 	ubfiz	x24, x23, 1, 16
-	adrp	x19, .LC55
+	adrp	x19, .LC71
 	ldrh	w2, [x0, x24]
-	add	x0, x19, :lo12:.LC55
+	add	x0, x19, :lo12:.LC71
 	bl	printf
-	adrp	x0, .LANCHOR91
-	add	x6, x0, :lo12:.LANCHOR91
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
-	bl	FtlGcRefreshBlock
 	adrp	x0, .LANCHOR92
-	add	x20, x0, :lo12:.LANCHOR92
+	add	x11, x0, :lo12:.LANCHOR92
 	ldrh	w0, [x0, #:lo12:.LANCHOR92]
 	bl	FtlGcRefreshBlock
-	mov	x0, x6
+	adrp	x0, .LANCHOR93
+	add	x20, x0, :lo12:.LANCHOR93
+	ldrh	w0, [x0, #:lo12:.LANCHOR93]
+	bl	FtlGcRefreshBlock
+	mov	x0, x11
 	bl	allocate_new_data_superblock
 	mov	x0, x20
 	mov	w20, 4097
 	bl	allocate_new_data_superblock
-.L2457:
+.L2638:
 	subs	w20, w20, #1
-	beq	.L2461
+	beq	.L2642
 	mov	w1, 1
 	mov	w0, w1
 	bl	rk_ftl_garbage_collect
-	ldr	x0, [x21, #:lo12:.LANCHOR83]
+	ldr	x0, [x21, #:lo12:.LANCHOR84]
 	ldrh	w0, [x0, x24]
-	cbnz	w0, .L2457
-.L2461:
-	ldr	x0, [x21, #:lo12:.LANCHOR83]
+	cbnz	w0, .L2638
+.L2642:
+	ldr	x0, [x21, #:lo12:.LANCHOR84]
 	mov	w1, w23
 	ldrh	w2, [x0, x24]
-	add	x0, x19, :lo12:.LC55
+	add	x0, x19, :lo12:.LC71
 	bl	printf
-	ldr	x0, [x21, #:lo12:.LANCHOR83]
+	ldr	x0, [x21, #:lo12:.LANCHOR84]
 	ldrh	w19, [x0, x24]
-	cbnz	w19, .L2459
+	cbnz	w19, .L2640
 	add	x20, x29, 128
-	adrp	x22, .LANCHOR77
+	adrp	x22, .LANCHOR78
 	strh	w23, [x20, -48]!
 	mov	x0, x20
 	bl	make_superblock
-	adrp	x0, .LANCHOR37
-	ldr	x4, [x22, #:lo12:.LANCHOR77]
+	adrp	x0, .LANCHOR38
+	ldr	x4, [x22, #:lo12:.LANCHOR78]
 	add	x20, x20, 16
 	mov	w5, 65535
-	ldrh	w3, [x0, #:lo12:.LANCHOR37]
+	ldrh	w3, [x0, #:lo12:.LANCHOR38]
 	mov	w6, 56
 	mov	w0, 0
-.L2462:
+.L2643:
 	cmp	w0, w3
-	bne	.L2464
-	ldr	x0, [x21, #:lo12:.LANCHOR83]
+	bne	.L2645
+	ldr	x0, [x21, #:lo12:.LANCHOR84]
 	mov	w1, w23
 	ldrh	w2, [x0, x24]
-	adrp	x0, .LC56
-	add	x0, x0, :lo12:.LC56
+	adrp	x0, .LC72
+	add	x0, x0, :lo12:.LC72
 	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR77]
+	ldr	x0, [x22, #:lo12:.LANCHOR78]
 	mov	w2, w19
 	mov	w1, 0
 	bl	FlashEraseBlocks
-	ldr	x0, [x22, #:lo12:.LANCHOR77]
+	ldr	x0, [x22, #:lo12:.LANCHOR78]
 	mov	w2, w19
 	mov	w1, 1
 	bl	FlashEraseBlocks
-.L2459:
+.L2640:
 	mov	w0, -1
-	strh	w0, [x25, #:lo12:.LANCHOR229]
+	strh	w0, [x25, #:lo12:.LANCHOR235]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2464:
+.L2645:
 	ldrh	w1, [x20]
 	cmp	w1, w5
-	beq	.L2463
+	beq	.L2644
 	umaddl	x2, w19, w6, x4
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	lsl	w1, w1, 10
 	stp	xzr, xzr, [x2, 8]
 	str	w1, [x2, 4]
-.L2463:
+.L2644:
 	add	w0, w0, 1
 	add	x20, x20, 2
 	and	w0, w0, 65535
-	b	.L2462
-.L2470:
+	b	.L2643
+.L2651:
 	ret
 	.size	ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error
 	.section	.text.ftl_read,"ax",@progbits
@@ -16830,301 +18384,336 @@ ftl_fix_nand_power_lost_error:
 	.global	ftl_read
 	.type	ftl_read, %function
 ftl_read:
-	stp	x29, x30, [sp, -176]!
+	sub	sp, sp, #208
 	and	w0, w0, 255
 	cmp	w0, 16
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
+	stp	x29, x30, [sp, 16]
+	add	x29, sp, 16
+	stp	x19, x20, [sp, 32]
 	mov	w19, w1
-	stp	x23, x24, [sp, 48]
+	stp	x23, x24, [sp, 64]
 	mov	x23, x3
-	stp	x25, x26, [sp, 64]
-	mov	w26, w2
-	stp	x21, x22, [sp, 32]
-	stp	x27, x28, [sp, 80]
-	bne	.L2474
+	stp	x27, x28, [sp, 96]
+	mov	w27, w2
+	stp	x21, x22, [sp, 48]
+	stp	x25, x26, [sp, 80]
+	bne	.L2655
 	mov	x2, x3
-	mov	w1, w26
+	mov	w1, w27
 	add	w0, w19, 256
 	bl	FtlVendorPartRead
 	mov	w21, w0
-.L2473:
+.L2654:
 	mov	w0, w21
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 176
+	ldp	x19, x20, [sp, 32]
+	ldp	x21, x22, [sp, 48]
+	ldp	x23, x24, [sp, 64]
+	ldp	x25, x26, [sp, 80]
+	ldp	x27, x28, [sp, 96]
+	ldp	x29, x30, [sp, 16]
+	add	sp, sp, 208
 	ret
-.L2474:
+.L2655:
 	add	w0, w1, w2
-	str	w0, [x29, 136]
-	adrp	x0, .LANCHOR68
+	str	w0, [x29, 148]
+	adrp	x0, .LANCHOR69
 	add	w1, w1, w2
-	ldr	w0, [x0, #:lo12:.LANCHOR68]
+	ldr	w0, [x0, #:lo12:.LANCHOR69]
 	cmp	w1, w0
-	bhi	.L2496
-	adrp	x0, .LANCHOR223
-	ldr	w21, [x0, #:lo12:.LANCHOR223]
+	bhi	.L2678
+	adrp	x0, .LANCHOR231
+	ldr	w21, [x0, #:lo12:.LANCHOR231]
 	cmn	w21, #1
-	beq	.L2473
-	adrp	x22, .LANCHOR55
+	beq	.L2654
+	adrp	x22, .LANCHOR56
 	bl	FtlCacheWriteBack
-	mov	w25, 0
+	adrp	x25, .LANCHOR138
+	add	x25, x25, :lo12:.LANCHOR138
+	ldrh	w0, [x22, #:lo12:.LANCHOR56]
+	mov	w24, 0
 	mov	w21, 0
-	ldrh	w0, [x22, #:lo12:.LANCHOR55]
-	adrp	x27, .LANCHOR177
-	stp	wzr, wzr, [x29, 144]
+	adrp	x26, .LANCHOR180
+	stp	wzr, wzr, [x29, 156]
 	udiv	w1, w19, w0
-	str	w1, [x29, 152]
-	add	w1, w19, w26
-	sub	w24, w1, #1
-	adrp	x1, .LANCHOR163
-	ldr	w20, [x29, 152]
-	udiv	w24, w24, w0
-	ldr	w0, [x29, 152]
-	sub	w0, w24, w0
+	str	w1, [x29, 168]
+	add	w1, w19, w27
+	sub	w1, w1, #1
+	ldr	w20, [x29, 168]
+	udiv	w0, w1, w0
+	ldr	w1, [x29, 168]
+	str	w0, [x29, 164]
+	sub	w0, w0, w1
 	add	w0, w0, 1
-	str	w0, [x29, 156]
-	ldr	w0, [x1, #:lo12:.LANCHOR163]
-	ldr	w2, [x29, 156]
+	adrp	x1, .LANCHOR166
+	str	w0, [x29, 172]
+	ldr	w0, [x1, #:lo12:.LANCHOR166]
+	ldr	w2, [x29, 172]
 	add	w0, w0, w2
-	str	w0, [x1, #:lo12:.LANCHOR163]
-.L2476:
-	ldr	w0, [x29, 156]
-	cbnz	w0, .L2495
-	adrp	x0, .LANCHOR114
-	ldrh	w0, [x0, #:lo12:.LANCHOR114]
-	cbz	w0, .L2473
+	str	w0, [x1, #:lo12:.LANCHOR166]
+.L2657:
+	ldr	w0, [x29, 172]
+	cbnz	w0, .L2677
+	adrp	x0, .LANCHOR117
+	ldrh	w0, [x0, #:lo12:.LANCHOR117]
+	cbz	w0, .L2654
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-	b	.L2473
-.L2495:
-	add	x1, x29, 172
+	b	.L2654
+.L2677:
+	add	x1, x29, 188
 	mov	w2, 0
 	mov	w0, w20
 	bl	log2phys
-	ldr	w1, [x29, 172]
+	ldr	w1, [x29, 188]
 	cmn	w1, #1
-	bne	.L2477
-	add	x3, x22, :lo12:.LANCHOR55
+	bne	.L2658
+	add	x3, x22, :lo12:.LANCHOR56
 	mov	w28, 0
-.L2478:
+.L2659:
 	ldrh	w0, [x3]
 	cmp	w28, w0
-	bcc	.L2480
-.L2481:
-	ldr	w0, [x29, 156]
+	bcc	.L2661
+.L2662:
+	ldr	w0, [x29, 172]
 	add	w20, w20, 1
 	subs	w0, w0, #1
-	str	w0, [x29, 156]
-	beq	.L2485
-	adrp	x0, .LANCHOR37
-	ldrh	w0, [x0, #:lo12:.LANCHOR37]
-	cmp	w25, w0, lsl 2
-	bne	.L2476
-.L2485:
-	cbz	w25, .L2476
-	ldr	x0, [x27, #:lo12:.LANCHOR177]
-	mov	w1, w25
+	str	w0, [x29, 172]
+	beq	.L2666
+	adrp	x0, .LANCHOR38
+	ldrh	w0, [x0, #:lo12:.LANCHOR38]
+	cmp	w24, w0, lsl 2
+	bne	.L2657
+.L2666:
+	cbz	w24, .L2657
+	ldr	x0, [x26, #:lo12:.LANCHOR180]
+	mov	w1, w24
 	mov	w2, 0
+	adrp	x28, .LANCHOR187
 	bl	FlashReadPages
-	ldr	w0, [x29, 144]
+	ldr	w0, [x29, 156]
 	lsl	w0, w0, 9
-	str	w0, [x29, 120]
-	ldr	w0, [x29, 140]
+	str	w0, [x29, 132]
+	ldr	w0, [x29, 152]
 	lsl	w0, w0, 9
-	str	x0, [x29, 128]
-	ldr	w0, [x29, 148]
+	str	x0, [x29, 136]
+	ldr	w0, [x29, 160]
 	lsl	w0, w0, 9
-	str	w0, [x29, 124]
+	str	w0, [x29, 144]
 	mov	w0, 56
-	umull	x0, w25, w0
-	mov	x25, 0
-	str	x0, [x29, 104]
-	adrp	x0, .LANCHOR135
-	add	x28, x0, :lo12:.LANCHOR135
-.L2494:
-	ldr	x0, [x27, #:lo12:.LANCHOR177]
-	ldr	w2, [x29, 152]
-	add	x0, x0, x25
+	umull	x0, w24, w0
+	mov	x24, 0
+	str	x0, [x29, 120]
+	adrp	x0, .LC61
+	add	x0, x0, :lo12:.LC61
+	str	x0, [x29, 112]
+.L2676:
+	ldr	x0, [x26, #:lo12:.LANCHOR180]
+	ldr	w2, [x29, 168]
+	add	x0, x0, x24
 	ldr	w1, [x0, 24]
 	cmp	w2, w1
-	bne	.L2487
+	bne	.L2668
 	ldr	x1, [x0, 8]
-	adrp	x0, .LANCHOR183
-	ldr	x0, [x0, #:lo12:.LANCHOR183]
+	adrp	x0, .LANCHOR186
+	ldr	x0, [x0, #:lo12:.LANCHOR186]
 	cmp	x1, x0
-	bne	.L2488
-	ldr	x0, [x29, 128]
-	ldr	w2, [x29, 124]
+	bne	.L2669
+	ldr	x0, [x29, 136]
+	ldr	w2, [x29, 144]
 	add	x1, x1, x0
 	mov	x0, x23
-.L2511:
+.L2693:
 	bl	ftl_memcpy
-.L2488:
-	ldr	x0, [x27, #:lo12:.LANCHOR177]
-	add	x1, x0, x25
-	ldr	w0, [x0, x25]
+.L2669:
+	ldr	x0, [x26, #:lo12:.LANCHOR180]
+	add	x0, x0, x24
+	ldr	x2, [x0, 16]
+	ldr	w1, [x0, 24]
+	ldr	w3, [x2, 8]
+	cmp	w1, w3
+	beq	.L2670
+	ldr	w3, [x25, 72]
+	add	w3, w3, 1
+	str	w3, [x25, 72]
+	ldr	x3, [x0, 8]
+	ldr	w4, [x3, 4]
+	str	w4, [sp]
+	ldp	w4, w5, [x2, 4]
+	ldr	w6, [x2, 12]
+	ldr	w7, [x3]
+	ldr	w3, [x2]
+	ldr	w2, [x0, 4]
+	ldr	x0, [x29, 112]
+	bl	printf
+.L2670:
+	ldr	x0, [x26, #:lo12:.LANCHOR180]
+	add	x1, x0, x24
+	ldr	w0, [x0, x24]
 	cmn	w0, #1
-	bne	.L2489
-	ldr	w1, [x28, 72]
+	bne	.L2671
+	ldr	w1, [x25, 72]
 	mov	w21, w0
 	add	w1, w1, 1
-	str	w1, [x28, 72]
-.L2490:
-	ldr	x0, [x29, 104]
-	add	x25, x25, 56
-	cmp	x0, x25
-	bne	.L2494
-	mov	w25, 0
-	b	.L2476
-.L2480:
+	str	w1, [x25, 72]
+.L2672:
+	ldr	x0, [x29, 120]
+	add	x24, x24, 56
+	cmp	x0, x24
+	bne	.L2676
+	mov	w24, 0
+	b	.L2657
+.L2661:
 	madd	w0, w20, w0, w28
 	cmp	w19, w0
-	bhi	.L2479
-	ldr	w1, [x29, 136]
+	bhi	.L2660
+	ldr	w1, [x29, 148]
 	cmp	w1, w0
-	bls	.L2479
+	bls	.L2660
 	sub	w0, w0, w19
-	str	x3, [x29, 128]
+	str	x3, [x29, 136]
 	lsl	w0, w0, 9
 	mov	w2, 512
 	mov	w1, 0
 	add	x0, x23, x0
 	bl	ftl_memset
-	ldr	x3, [x29, 128]
-.L2479:
+	ldr	x3, [x29, 136]
+.L2660:
 	add	w28, w28, 1
-	b	.L2478
-.L2477:
-	ldr	x0, [x27, #:lo12:.LANCHOR177]
+	b	.L2659
+.L2658:
+	ldr	x0, [x26, #:lo12:.LANCHOR180]
 	mov	w2, 56
-	umaddl	x0, w25, w2, x0
+	umaddl	x0, w24, w2, x0
 	str	w1, [x0, 4]
-	ldr	w1, [x29, 152]
+	ldr	w1, [x29, 168]
 	cmp	w20, w1
-	bne	.L2482
-	adrp	x1, .LANCHOR183
-	ldr	x1, [x1, #:lo12:.LANCHOR183]
+	bne	.L2663
+	adrp	x1, .LANCHOR186
+	ldr	x1, [x1, #:lo12:.LANCHOR186]
 	str	x1, [x0, 8]
-	ldrh	w1, [x22, #:lo12:.LANCHOR55]
+	ldrh	w1, [x22, #:lo12:.LANCHOR56]
 	udiv	w2, w19, w1
 	msub	w2, w2, w1, w19
-	str	w2, [x29, 140]
+	str	w2, [x29, 152]
 	sub	w2, w1, w2
-	cmp	w26, w2
-	csel	w2, w26, w2, ls
-	str	w2, [x29, 148]
+	cmp	w27, w2
+	csel	w2, w27, w2, ls
+	str	w2, [x29, 160]
 	cmp	w1, w2
-	bne	.L2483
+	bne	.L2664
 	str	x23, [x0, 8]
-.L2483:
-	adrp	x1, .LANCHOR58
-	adrp	x2, .LANCHOR186
+.L2664:
+	adrp	x1, .LANCHOR59
+	adrp	x2, .LANCHOR189
 	str	w20, [x0, 24]
-	ldrh	w1, [x1, #:lo12:.LANCHOR58]
-	ldr	x2, [x2, #:lo12:.LANCHOR186]
-	mul	w1, w1, w25
-	add	w25, w25, 1
+	ldrh	w1, [x1, #:lo12:.LANCHOR59]
+	ldr	x2, [x2, #:lo12:.LANCHOR189]
+	mul	w1, w1, w24
+	add	w24, w24, 1
 	and	x1, x1, 4294967292
 	add	x1, x2, x1
 	str	x1, [x0, 16]
-	b	.L2481
-.L2482:
-	cmp	w20, w24
-	bne	.L2484
-	ldrh	w2, [x22, #:lo12:.LANCHOR55]
-	adrp	x1, .LANCHOR184
-	ldr	w3, [x29, 136]
-	ldr	x1, [x1, #:lo12:.LANCHOR184]
+	b	.L2662
+.L2663:
+	ldr	w1, [x29, 164]
+	cmp	w20, w1
+	bne	.L2665
+	ldrh	w2, [x22, #:lo12:.LANCHOR56]
+	adrp	x1, .LANCHOR187
+	ldr	w3, [x29, 148]
+	ldr	x1, [x1, #:lo12:.LANCHOR187]
 	str	x1, [x0, 8]
 	mul	w1, w20, w2
 	sub	w3, w3, w1
-	str	w3, [x29, 144]
+	str	w3, [x29, 156]
 	cmp	w2, w3
-	bne	.L2483
-.L2510:
+	bne	.L2664
+.L2692:
 	sub	w1, w1, w19
 	lsl	w1, w1, 9
 	add	x1, x23, x1
 	str	x1, [x0, 8]
-	b	.L2483
-.L2484:
-	ldrh	w1, [x22, #:lo12:.LANCHOR55]
+	b	.L2664
+.L2665:
+	ldrh	w1, [x22, #:lo12:.LANCHOR56]
 	mul	w1, w1, w20
-	b	.L2510
-.L2487:
-	cmp	w24, w1
-	bne	.L2488
+	b	.L2692
+.L2668:
+	ldr	w2, [x29, 164]
+	cmp	w2, w1
+	bne	.L2669
 	ldr	x1, [x0, 8]
-	adrp	x0, .LANCHOR184
-	ldr	x0, [x0, #:lo12:.LANCHOR184]
+	ldr	x0, [x28, #:lo12:.LANCHOR187]
 	cmp	x1, x0
-	bne	.L2488
-	ldrh	w0, [x22, #:lo12:.LANCHOR55]
-	ldr	w2, [x29, 120]
-	mul	w0, w0, w24
+	bne	.L2669
+	ldrh	w0, [x22, #:lo12:.LANCHOR56]
+	mul	w0, w0, w2
+	ldr	w2, [x29, 132]
 	sub	w0, w0, w19
 	lsl	w0, w0, 9
 	add	x0, x23, x0
-	b	.L2511
-.L2489:
+	b	.L2693
+.L2671:
 	cmp	w0, 256
-	bne	.L2490
+	bne	.L2672
 	ldr	w0, [x1, 4]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	and	w1, w0, 65535
-	str	w1, [x29, 116]
+	str	w1, [x29, 128]
 	bl	FtlGcRefreshBlock
 	mov	w2, 2049
-.L2492:
+	adrp	x3, .LANCHOR204
+.L2674:
 	subs	w2, w2, #1
-	bne	.L2491
-.L2493:
+	bne	.L2673
+.L2675:
 	bl	FtlSysFlush
-	b	.L2490
-.L2491:
+	b	.L2672
+.L2673:
 	mov	w1, 1
-	str	w2, [x29, 112]
+	str	x3, [x29, 96]
 	mov	w0, w1
+	str	w2, [x29, 108]
 	bl	rk_ftl_garbage_collect
-	adrp	x0, .LANCHOR201
-	ldp	w2, w1, [x29, 112]
-	ldrh	w0, [x0, #:lo12:.LANCHOR201]
+	ldr	x3, [x29, 96]
+	ldr	w1, [x29, 128]
+	ldr	w2, [x29, 108]
+	ldrh	w0, [x3, #:lo12:.LANCHOR204]
 	cmp	w0, w1
-	beq	.L2492
-	b	.L2493
-.L2496:
+	beq	.L2674
+	b	.L2675
+.L2678:
 	mov	w21, -1
-	b	.L2473
+	b	.L2654
 	.size	ftl_read, .-ftl_read
-	.section	.text.ftl_write,"ax",@progbits
+	.section	.text.FtlWrite,"ax",@progbits
 	.align	2
-	.global	ftl_write
-	.type	ftl_write, %function
-ftl_write:
+	.global	FtlWrite
+	.type	FtlWrite, %function
+FtlWrite:
 	stp	x29, x30, [sp, -240]!
-	and	w0, w0, 255
-	cmp	w0, 16
 	add	x29, sp, 0
-	stp	x25, x26, [sp, 64]
-	mov	w25, w2
 	stp	x21, x22, [sp, 32]
-	mov	x26, x3
+	mov	w21, w1
+	adrp	x1, .LANCHOR77
 	stp	x19, x20, [sp, 16]
-	mov	w22, w1
 	stp	x23, x24, [sp, 48]
+	ldr	w1, [x1, #:lo12:.LANCHOR77]
+	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	bne	.L2513
+	cbnz	w1, .L2726
+	and	w0, w0, 255
+	mov	w23, w2
+	mov	x24, x3
+	cmp	w0, 16
+	bne	.L2696
 	mov	x2, x3
-	mov	w1, w25
-	add	w0, w22, 256
+	mov	w1, w23
+	add	w0, w21, 256
 	bl	FtlVendorPartWrite
-.L2512:
+.L2694:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -17132,172 +18721,188 @@ ftl_write:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 240
 	ret
-.L2513:
-	adrp	x0, .LANCHOR68
-	add	w2, w1, w2
-	ldr	w0, [x0, #:lo12:.LANCHOR68]
+.L2696:
+	adrp	x0, .LANCHOR69
+	add	w2, w21, w2
+	ldr	w0, [x0, #:lo12:.LANCHOR69]
 	cmp	w2, w0
-	bhi	.L2547
-	adrp	x0, .LANCHOR223
-	ldr	w0, [x0, #:lo12:.LANCHOR223]
+	bhi	.L2727
+	adrp	x0, .LANCHOR231
+	ldr	w0, [x0, #:lo12:.LANCHOR231]
 	cmn	w0, #1
-	beq	.L2512
-	adrp	x0, .LANCHOR241
-	adrp	x3, .LANCHOR55
+	beq	.L2694
+	adrp	x0, .LANCHOR246
+	adrp	x26, .LANCHOR56
 	mov	w1, 2048
 	sub	w2, w2, #1
-	str	w1, [x0, #:lo12:.LANCHOR241]
-	ldrh	w1, [x3, #:lo12:.LANCHOR55]
-	str	x3, [x29, 160]
+	str	w1, [x0, #:lo12:.LANCHOR246]
+	ldrh	w1, [x26, #:lo12:.LANCHOR56]
+	str	x26, [x29, 160]
 	udiv	w0, w2, w1
-	adrp	x2, .LANCHOR159
-	udiv	w21, w22, w1
+	adrp	x2, .LANCHOR162
+	udiv	w20, w21, w1
 	str	w0, [x29, 152]
-	sub	w23, w0, w21
-	ldr	w0, [x2, #:lo12:.LANCHOR159]
-	add	w24, w23, 1
-	add	w0, w0, w24
-	str	w0, [x2, #:lo12:.LANCHOR159]
-	adrp	x0, .LANCHOR129
-	str	x0, [x29, 120]
-	ldr	x2, [x0, #:lo12:.LANCHOR129]
-	cbz	x2, .L2515
+	sub	w27, w0, w20
+	ldr	w0, [x2, #:lo12:.LANCHOR162]
+	add	w25, w27, 1
+	add	w0, w0, w25
+	str	w0, [x2, #:lo12:.LANCHOR162]
+	adrp	x0, .LANCHOR132
+	ldr	x2, [x0, #:lo12:.LANCHOR132]
+	cbz	x2, .L2698
 	ldr	w0, [x2, 24]
-	cmp	w21, w0
-	beq	.L2516
+	cmp	w20, w0
+	beq	.L2699
 	bl	FtlCacheWriteBack
-.L2515:
-	adrp	x0, .LANCHOR91
-	mov	w19, w21
-	add	x23, x0, :lo12:.LANCHOR91
-.L2517:
-	cbz	w24, .L2546
-	adrp	x0, .LANCHOR91
-	add	x0, x0, :lo12:.LANCHOR91
-	adrp	x1, .LANCHOR37
-	str	x1, [x29, 112]
+.L2698:
+	adrp	x0, .LANCHOR92
+	mov	w19, w20
+	add	x22, x0, :lo12:.LANCHOR92
+.L2700:
+	cbnz	w25, .L2725
+	ldr	w0, [x29, 152]
+	sub	w1, w0, w20
+	mov	w0, 0
+	bl	rk_ftl_garbage_collect
+.L2726:
+	mov	w0, 0
+	b	.L2694
+.L2699:
+	adrp	x3, .LANCHOR164
+	ldr	w0, [x3, #:lo12:.LANCHOR164]
+	add	w0, w0, 1
+	str	w0, [x3, #:lo12:.LANCHOR164]
+	msub	w0, w20, w1, w21
+	ldr	x3, [x2, 8]
+	sub	w1, w1, w0
+	cmp	w23, w1
+	lsl	w0, w0, 9
+	csel	w19, w23, w1, ls
+	add	x0, x3, x0
+	lsl	w22, w19, 9
+	mov	x1, x24
+	mov	w2, w22
+	bl	ftl_memcpy
+	cbz	w27, .L2726
+	sub	w23, w23, w19
+	add	w21, w21, w19
+	add	x24, x24, x22
+	add	w20, w20, 1
+	bl	FtlCacheWriteBack
+	mov	w25, w27
+	b	.L2698
+.L2725:
+	adrp	x0, .LANCHOR92
+	add	x0, x0, :lo12:.LANCHOR92
+	adrp	x1, .LANCHOR38
+	str	x1, [x29, 120]
 	ldrb	w2, [x0, 6]
-	ldrh	w0, [x1, #:lo12:.LANCHOR37]
+	ldrh	w0, [x1, #:lo12:.LANCHOR38]
 	cmp	w2, w0
-	bcc	.L2518
-	mov	w2, 1644
-	adrp	x1, .LANCHOR242
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR242
-	add	x0, x0, :lo12:.LC6
+	bcc	.L2701
+	mov	w2, 1668
+	adrp	x1, .LANCHOR247
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR247
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2518:
-	ldrh	w0, [x23, 4]
-	cbnz	w0, .L2519
+.L2701:
+	ldrh	w0, [x22, 4]
+	cbnz	w0, .L2702
 	bl	FtlCacheWriteBack
-	mov	x0, x23
+	mov	x0, x22
 	bl	allocate_new_data_superblock
-.L2519:
-	ldrb	w0, [x23, 7]
-	ldrh	w1, [x23, 4]
+.L2702:
+	ldrb	w0, [x22, 7]
+	ldrh	w1, [x22, 4]
 	lsl	w0, w0, 2
 	cmp	w0, w1
 	csel	w0, w0, w1, ls
-	ldrb	w1, [x23, 6]
-	cmp	w0, w24
-	csel	w0, w0, w24, ls
+	ldrb	w1, [x22, 6]
+	cmp	w0, w25
+	csel	w0, w0, w25, ls
 	str	w0, [x29, 144]
-	ldr	x0, [x29, 112]
-	ldrh	w0, [x0, #:lo12:.LANCHOR37]
+	ldr	x0, [x29, 120]
+	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w1, w0
-	bcc	.L2520
-	mov	w2, 1677
-	adrp	x1, .LANCHOR242
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR242
-	add	x0, x0, :lo12:.LC6
+	bcc	.L2703
+	mov	w2, 1701
+	adrp	x1, .LANCHOR247
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR247
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2520:
+.L2703:
+	adrp	x0, .LANCHOR59
+	add	x0, x0, :lo12:.LANCHOR59
+	str	xzr, [x29, 168]
+	str	x0, [x29, 112]
 	adrp	x0, .LANCHOR58
-	adrp	x28, .LANCHOR179
 	add	x0, x0, :lo12:.LANCHOR58
-	str	xzr, [x29, 168]
 	str	x0, [x29, 104]
-.L2521:
+.L2704:
 	ldr	w1, [x29, 144]
+	adrp	x28, .LANCHOR182
 	ldr	w27, [x29, 168]
 	cmp	w27, w1
-	bcc	.L2542
+	bcc	.L2723
 	mov	x27, x1
-.L2522:
-	ldr	x0, [x29, 120]
-	ldr	x0, [x0, #:lo12:.LANCHOR129]
-	cbz	x0, .L2543
-	sub	w24, w24, #1
-	subs	w27, w27, #1
-	bne	.L2543
-.L2546:
-	ldr	w0, [x29, 152]
-	sub	w1, w0, w21
-	mov	w0, 0
-	bl	rk_ftl_garbage_collect
-.L2549:
-	mov	w0, 0
-	b	.L2512
-.L2516:
-	adrp	x3, .LANCHOR161
-	ldr	w0, [x3, #:lo12:.LANCHOR161]
-	add	w0, w0, 1
-	str	w0, [x3, #:lo12:.LANCHOR161]
-	msub	w0, w21, w1, w22
-	ldr	x3, [x2, 8]
-	sub	w1, w1, w0
-	cmp	w25, w1
-	lsl	w0, w0, 9
-	csel	w19, w25, w1, ls
-	add	x0, x3, x0
-	lsl	w20, w19, 9
-	mov	x1, x26
-	mov	w2, w20
-	bl	ftl_memcpy
-	cbz	w23, .L2549
-	sub	w25, w25, w19
-	add	w22, w22, w19
-	add	x26, x26, x20
-	add	w21, w21, 1
-	bl	FtlCacheWriteBack
-	mov	w24, w23
-	b	.L2515
-.L2542:
-	ldrh	w0, [x23, 4]
-	cbz	w0, .L2522
+.L2705:
+	ldr	x0, [x28, #:lo12:.LANCHOR182]
+	mov	x3, x22
+	mov	w2, 0
+	mov	w1, w27
+	bl	FtlProgPages
+	cmp	w25, w27
+	bcs	.L2724
+	mov	w2, 1790
+	adrp	x1, .LANCHOR247
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR247
+	add	x0, x0, :lo12:.LC5
+	bl	printf
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
+	bl	printf
+.L2724:
+	sub	w25, w25, w27
+	b	.L2700
+.L2723:
+	ldrh	w0, [x22, 4]
+	cbz	w0, .L2705
 	add	x1, x29, 180
 	mov	w2, 0
 	mov	w0, w19
 	bl	log2phys
-	mov	x0, x23
-	mov	x20, 56
+	mov	x0, x22
 	bl	get_new_active_ppa
 	ldr	x1, [x29, 168]
-	mul	x20, x1, x20
-	adrp	x1, .LANCHOR179
-	ldr	x1, [x1, #:lo12:.LANCHOR179]
-	add	x1, x1, x20
+	mov	x3, 56
+	mul	x26, x1, x3
+	ldr	x1, [x28, #:lo12:.LANCHOR182]
+	add	x1, x1, x26
 	str	w0, [x1, 4]
-	ldr	x0, [x29, 104]
+	ldr	x0, [x29, 112]
 	str	w19, [x1, 24]
 	ldrh	w2, [x0]
 	mul	w27, w27, w2
 	and	x0, x27, 4294967292
 	str	x0, [x29, 136]
-	adrp	x0, .LANCHOR186
+	adrp	x0, .LANCHOR189
 	ldr	x3, [x29, 136]
-	ldr	x0, [x0, #:lo12:.LANCHOR186]
+	ldr	x0, [x0, #:lo12:.LANCHOR189]
 	str	x0, [x29, 128]
 	add	x27, x0, x3
 	str	x27, [x1, 16]
@@ -17305,102 +18910,102 @@ ftl_write:
 	mov	w1, 0
 	bl	ftl_memset
 	ldr	w0, [x29, 152]
-	cmp	w19, w21
-	ccmp	w19, w0, 4, ne
-	bne	.L2523
-	cmp	w19, w21
-	bne	.L2524
+	cmp	w19, w20
+	ccmp	w0, w19, 4, ne
+	bne	.L2706
+	cmp	w19, w20
+	bne	.L2707
 	ldr	x0, [x29, 160]
-	ldrh	w2, [x0, #:lo12:.LANCHOR55]
-	udiv	w0, w22, w2
-	msub	w0, w0, w2, w22
+	ldrh	w2, [x0, #:lo12:.LANCHOR56]
+	udiv	w0, w21, w2
+	msub	w0, w0, w2, w21
 	str	w0, [x29, 148]
 	sub	w2, w2, w0
-	cmp	w2, w25
-	csel	w0, w2, w25, ls
+	cmp	w2, w23
+	csel	w0, w2, w23, ls
 	str	w0, [x29, 156]
-.L2525:
+.L2708:
 	ldr	x0, [x29, 160]
 	ldr	w1, [x29, 156]
-	ldrh	w0, [x0, #:lo12:.LANCHOR55]
-	cmp	w1, w0
-	ldr	x0, [x28, #:lo12:.LANCHOR179]
-	bne	.L2526
-	add	x20, x0, x20
-	cmp	w19, w21
-	bne	.L2527
-	str	x26, [x20, 8]
-.L2528:
-	ldr	x0, [x29, 112]
-	ldrb	w1, [x23, 6]
-	ldrh	w0, [x0, #:lo12:.LANCHOR37]
+	ldrh	w0, [x0, #:lo12:.LANCHOR56]
+	cmp	w0, w1
+	ldr	x0, [x28, #:lo12:.LANCHOR182]
+	bne	.L2709
+	add	x3, x0, x26
+	cmp	w19, w20
+	bne	.L2710
+	str	x24, [x3, 8]
+.L2711:
+	ldr	x0, [x29, 120]
+	ldrb	w1, [x22, 6]
+	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w1, w0
-	bcc	.L2539
-	mov	w2, 1751
-	adrp	x1, .LANCHOR242
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR242
-	add	x0, x0, :lo12:.LC6
+	bcc	.L2720
+	mov	w2, 1775
+	adrp	x1, .LANCHOR247
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR247
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2539:
+.L2720:
 	ldp	x1, x2, [x29, 128]
 	mov	w0, -3947
 	strh	w0, [x1, x2]
-	adrp	x1, .LANCHOR157
-	ldr	w0, [x1, #:lo12:.LANCHOR157]
+	adrp	x1, .LANCHOR160
+	ldr	w0, [x1, #:lo12:.LANCHOR160]
 	stp	w0, w19, [x27, 4]
 	add	w19, w19, 1
 	add	w0, w0, 1
 	cmn	w0, #1
 	csel	w0, w0, wzr, ne
-	str	w0, [x1, #:lo12:.LANCHOR157]
+	str	w0, [x1, #:lo12:.LANCHOR160]
 	ldr	w0, [x29, 180]
 	str	w0, [x27, 12]
-	ldrh	w0, [x23]
+	ldrh	w0, [x22]
 	strh	w0, [x27, 2]
 	ldr	x0, [x29, 168]
 	add	x0, x0, 1
 	str	x0, [x29, 168]
-	b	.L2521
-.L2524:
+	b	.L2704
+.L2707:
 	ldr	x0, [x29, 160]
-	add	w2, w22, w25
+	add	w2, w21, w23
 	str	wzr, [x29, 148]
-	ldrh	w0, [x0, #:lo12:.LANCHOR55]
+	ldrh	w0, [x0, #:lo12:.LANCHOR56]
 	msub	w2, w19, w0, w2
 	and	w0, w2, 65535
 	str	w0, [x29, 156]
-	b	.L2525
-.L2527:
+	b	.L2708
+.L2710:
 	ldr	w0, [x29, 156]
-.L2564:
+.L2738:
 	mul	w0, w0, w19
-	sub	w0, w0, w22
+	sub	w0, w0, w21
 	lsl	w0, w0, 9
-	add	x0, x26, x0
-	str	x0, [x20, 8]
-	b	.L2528
-.L2526:
-	add	x0, x0, x20
-	cmp	w19, w21
-	bne	.L2529
-	adrp	x1, .LANCHOR183
-	ldr	x1, [x1, #:lo12:.LANCHOR183]
-.L2563:
+	add	x0, x24, x0
+	str	x0, [x3, 8]
+	b	.L2711
+.L2709:
+	add	x0, x0, x26
+	cmp	w19, w20
+	bne	.L2712
+	adrp	x1, .LANCHOR186
+	ldr	x1, [x1, #:lo12:.LANCHOR186]
+.L2737:
 	str	x1, [x0, 8]
 	ldr	w0, [x29, 180]
 	cmn	w0, #1
-	beq	.L2531
+	beq	.L2714
 	str	w0, [x29, 188]
 	mov	w2, 0
-	ldr	x0, [x28, #:lo12:.LANCHOR179]
+	ldr	x0, [x28, #:lo12:.LANCHOR182]
 	str	w19, [x29, 208]
-	add	x0, x0, x20
+	add	x0, x0, x26
 	ldp	x1, x0, [x0, 8]
 	stp	x1, x0, [x29, 192]
 	mov	w1, 1
@@ -17408,806 +19013,550 @@ ftl_write:
 	bl	FlashReadPages
 	ldr	w0, [x29, 184]
 	cmn	w0, #1
-	bne	.L2532
-	adrp	x0, .LANCHOR135
-	add	x0, x0, :lo12:.LANCHOR135
+	bne	.L2715
+	adrp	x0, .LANCHOR138
+	add	x0, x0, :lo12:.LANCHOR138
 	ldr	w1, [x0, 72]
 	add	w1, w1, 1
 	str	w1, [x0, 72]
-.L2535:
+.L2718:
 	ldr	w0, [x29, 156]
-	cmp	w19, w21
+	cmp	w19, w20
 	lsl	w2, w0, 9
-	bne	.L2536
-	ldr	x1, [x28, #:lo12:.LANCHOR179]
+	bne	.L2719
+	ldr	x0, [x28, #:lo12:.LANCHOR182]
+	mov	x1, x24
+	add	x3, x0, x26
 	ldr	w0, [x29, 148]
-	add	x1, x1, x20
+	ldr	x3, [x3, 8]
 	lsl	w0, w0, 9
-	ldr	x4, [x1, 8]
-	mov	x1, x26
-	add	x0, x4, x0
+	add	x0, x3, x0
+.L2739:
 	bl	ftl_memcpy
-	ldr	w0, [x29, 152]
-	cmp	w19, w0
-	bne	.L2528
-.L2537:
-	ldrh	w0, [x23, 4]
-	cbz	w0, .L2528
-	ldr	x0, [x28, #:lo12:.LANCHOR179]
-	add	x20, x0, x20
-	ldr	x0, [x29, 120]
-	str	x20, [x0, #:lo12:.LANCHOR129]
-	adrp	x0, .LANCHOR221
-	str	x23, [x0, #:lo12:.LANCHOR221]
-	b	.L2528
-.L2529:
-	adrp	x1, .LANCHOR184
-	ldr	x1, [x1, #:lo12:.LANCHOR184]
-	b	.L2563
-.L2532:
+	b	.L2711
+.L2712:
+	adrp	x1, .LANCHOR187
+	ldr	x1, [x1, #:lo12:.LANCHOR187]
+	b	.L2737
+.L2715:
 	ldr	w1, [x27, 8]
 	cmp	w19, w1
-	beq	.L2534
-	adrp	x0, .LANCHOR135
-	add	x0, x0, :lo12:.LANCHOR135
+	beq	.L2717
+	adrp	x0, .LANCHOR138
+	add	x0, x0, :lo12:.LANCHOR138
 	ldr	w2, [x0, 72]
 	add	w2, w2, 1
 	str	w2, [x0, 72]
-	adrp	x0, .LC57
+	adrp	x0, .LC73
 	mov	w2, w19
-	add	x0, x0, :lo12:.LC57
+	add	x0, x0, :lo12:.LC73
 	bl	printf
-.L2534:
+.L2717:
 	ldr	w0, [x27, 8]
 	cmp	w19, w0
-	beq	.L2535
-	mov	w2, 1730
-	adrp	x1, .LANCHOR242
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR242
-	add	x0, x0, :lo12:.LC6
+	beq	.L2718
+	mov	w2, 1754
+	adrp	x1, .LANCHOR247
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR247
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-	b	.L2535
-.L2531:
-	ldr	x0, [x28, #:lo12:.LANCHOR179]
-	adrp	x1, .LANCHOR57
-	add	x0, x0, x20
-	ldrh	w2, [x1, #:lo12:.LANCHOR57]
+	b	.L2718
+.L2714:
+	ldr	x0, [x28, #:lo12:.LANCHOR182]
+	ldr	x1, [x29, 104]
+	add	x0, x0, x26
+	ldrh	w2, [x1]
 	mov	w1, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	b	.L2535
-.L2536:
+	b	.L2718
+.L2719:
 	ldr	x0, [x29, 160]
-	ldrh	w1, [x0, #:lo12:.LANCHOR55]
-	ldr	x0, [x28, #:lo12:.LANCHOR179]
-	add	x0, x0, x20
+	ldrh	w1, [x0, #:lo12:.LANCHOR56]
+	ldr	x0, [x28, #:lo12:.LANCHOR182]
+	add	x3, x0, x26
 	mul	w1, w1, w19
-	ldr	x0, [x0, 8]
-	sub	w1, w1, w22
+	sub	w1, w1, w21
+	ldr	x0, [x3, 8]
 	lsl	w1, w1, 9
-	add	x1, x26, x1
-	bl	ftl_memcpy
-	b	.L2537
-.L2523:
-	adrp	x0, .LANCHOR179
-	ldr	x0, [x0, #:lo12:.LANCHOR179]
-	add	x20, x0, x20
+	add	x1, x24, x1
+	b	.L2739
+.L2706:
+	ldr	x0, [x28, #:lo12:.LANCHOR182]
+	add	x3, x0, x26
 	ldr	x0, [x29, 160]
-	ldrh	w0, [x0, #:lo12:.LANCHOR55]
-	b	.L2564
-.L2543:
-	adrp	x0, .LANCHOR179
-	mov	x3, x23
-	mov	w2, 0
-	mov	w1, w27
-	ldr	x0, [x0, #:lo12:.LANCHOR179]
-	bl	FtlProgPages
-	cmp	w24, w27
-	bcs	.L2544
-	mov	w2, 1766
-	adrp	x1, .LANCHOR242
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR242
-	add	x0, x0, :lo12:.LC6
-	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
-	bl	printf
-.L2544:
-	sub	w24, w24, w27
-	b	.L2517
-.L2547:
+	ldrh	w0, [x0, #:lo12:.LANCHOR56]
+	b	.L2738
+.L2727:
 	mov	w0, -1
-	b	.L2512
-	.size	ftl_write, .-ftl_write
-	.section	.text.FlashReadFacBbtData,"ax",@progbits
+	b	.L2694
+	.size	FtlWrite, .-FtlWrite
+	.section	.text.StorageSysDataStore,"ax",@progbits
 	.align	2
-	.global	FlashReadFacBbtData
-	.type	FlashReadFacBbtData, %function
-FlashReadFacBbtData:
-	stp	x29, x30, [sp, -160]!
-	add	x29, sp, 0
-	stp	x25, x26, [sp, 64]
-	mov	w25, w1
-	adrp	x1, .LANCHOR15
-	add	x1, x1, :lo12:.LANCHOR15
-	stp	x23, x24, [sp, 48]
-	mov	x23, x0
-	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR144
-	ldrh	w0, [x1, 14]
-	mov	w24, w2
-	ldrh	w1, [x1, 12]
-	stp	x19, x20, [sp, 16]
-	str	x27, [sp, 80]
-	mov	w27, 61664
-	mul	w0, w0, w1
-	ldr	x1, [x21, #:lo12:.LANCHOR144]
-	str	x1, [x29, 112]
-	and	w0, w0, 65535
-	adrp	x1, .LANCHOR194
-	sub	w20, w0, #1
-	sub	w19, w0, #15
-	ldr	x2, [x1, #:lo12:.LANCHOR194]
-	and	w20, w20, 65535
-	mul	w26, w0, w25
-	mov	x22, x1
-	str	x2, [x29, 120]
-.L2566:
-	cmp	w19, w20
-	ble	.L2573
-	mov	w0, -1
-.L2565:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldr	x27, [sp, 80]
-	ldp	x29, x30, [sp], 160
-	ret
-.L2573:
-	add	w0, w20, w26
+	.global	StorageSysDataStore
+	.type	StorageSysDataStore, %function
+StorageSysDataStore:
+	mov	x3, x1
 	mov	w2, 1
-	lsl	w0, w0, 10
-	mov	w1, w2
-	str	w0, [x29, 108]
-	add	x0, x29, 104
-	bl	FlashReadPages
-	ldr	w0, [x29, 104]
-	cmn	w0, #1
-	beq	.L2567
-	ldr	x0, [x22, #:lo12:.LANCHOR194]
-	ldrh	w0, [x0]
-	cmp	w0, w27
-	bne	.L2567
-	cbz	x23, .L2574
-	cbz	w25, .L2569
-.L2572:
-	ldr	x1, [x21, #:lo12:.LANCHOR144]
-	mov	w2, w24
-	mov	x0, x23
-	bl	ftl_memcpy
-	mov	w3, 4
-	adrp	x0, .LC58
-	mov	w2, w3
-	mov	x1, x23
-	add	x0, x0, :lo12:.LC58
-	bl	rknand_print_hex
-.L2574:
-	mov	w0, 0
-	b	.L2565
-.L2569:
-	ldr	x5, [x21, #:lo12:.LANCHOR144]
-	adrp	x2, .LANCHOR146
-	add	x2, x2, :lo12:.LANCHOR146
-	mov	w0, 0
-	mov	w6, 1
-.L2570:
-	ldr	w1, [x2]
-	cmp	w0, w1
-	bcs	.L2572
-	ubfx	x1, x0, 5, 11
-	and	w3, w0, 31
-	lsl	x1, x1, 2
-	add	w0, w0, 1
-	lsl	w4, w6, w3
-	and	w0, w0, 65535
-	ldr	w3, [x5, x1]
-	orr	w3, w3, w4
-	str	w3, [x5, x1]
-	b	.L2570
-.L2567:
-	sub	w20, w20, #1
-	and	w20, w20, 65535
-	b	.L2566
-	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
-	.section	.text.FlashGetBadBlockList,"ax",@progbits
+	add	w1, w0, 256
+	mov	w0, 16
+	b	FtlWrite
+	.size	StorageSysDataStore, .-StorageSysDataStore
+	.section	.text.FlashBootVendorWrite,"ax",@progbits
 	.align	2
-	.global	FlashGetBadBlockList
-	.type	FlashGetBadBlockList, %function
-FlashGetBadBlockList:
+	.global	FlashBootVendorWrite
+	.type	FlashBootVendorWrite, %function
+FlashBootVendorWrite:
+	mov	x3, x2
+	mov	w1, w0
+	mov	w2, 1
+	mov	w0, 16
+	b	FtlWrite
+	.size	FlashBootVendorWrite, .-FlashBootVendorWrite
+	.section	.text.ftl_write,"ax",@progbits
+	.align	2
+	.global	ftl_write
+	.type	ftl_write, %function
+ftl_write:
 	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	mov	x20, x0
-	adrp	x0, .LANCHOR18
-	ldr	x0, [x0, #:lo12:.LANCHOR18]
-	ldrh	w19, [x0, 14]
-	str	x21, [sp, 32]
-	adrp	x21, .LANCHOR150
-	ldrb	w2, [x0, 13]
-	ldr	x0, [x21, #:lo12:.LANCHOR150]
-	mul	w19, w19, w2
-	and	w19, w19, 65535
-	add	w2, w19, 7
-	lsr	w2, w2, 3
-	bl	FlashReadFacBbtData
-	cmn	w0, #1
-	bne	.L2580
-.L2584:
-	mov	w0, 0
-.L2581:
-	ubfiz	x0, x0, 1, 16
-	mov	w1, -1
-	ldr	x21, [sp, 32]
-	strh	w1, [x20, x0]
+	mov	w19, w2
+	stp	x21, x22, [sp, 32]
+	mov	x20, x3
+	mov	w22, w1
+	ands	w21, w0, 255
+	bne	.L2743
+	mov	w3, w2
 	mov	w0, 0
+	mov	x2, x20
+	bl	idb_write_data
+.L2743:
+	mov	x3, x20
+	mov	w2, w19
+	mov	w1, w22
+	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
-	ret
-.L2580:
-	ldr	x4, [x21, #:lo12:.LANCHOR150]
-	lsr	w5, w19, 4
-	sub	w19, w19, #1
-	mov	w1, 0
-	mov	w0, 0
-	mov	w6, 1
-.L2582:
-	cmp	w1, w19
-	bge	.L2581
-	ubfx	x3, x1, 5, 11
-	and	w2, w1, 31
-	lsl	w2, w6, w2
-	ldr	w3, [x4, x3, lsl 2]
-	tst	w2, w3
-	beq	.L2583
-	add	w2, w0, 1
-	ubfiz	x0, x0, 1, 16
-	strh	w1, [x20, x0]
-	and	w0, w2, 65535
-.L2583:
-	cmp	w0, w5
-	bcs	.L2584
-	add	w1, w1, 1
-	and	w1, w1, 65535
-	b	.L2582
-	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
-	.section	.text.FtlMakeBbt,"ax",@progbits
+	b	FtlWrite
+	.size	ftl_write, .-ftl_write
+	.section	.text.FtlCheckVpc,"ax",@progbits
 	.align	2
-	.global	FtlMakeBbt
-	.type	FtlMakeBbt, %function
-FtlMakeBbt:
+	.global	FtlCheckVpc
+	.type	FtlCheckVpc, %function
+FtlCheckVpc:
 	stp	x29, x30, [sp, -128]!
-	adrp	x0, .LANCHOR76
+	adrp	x0, .LC46
+	add	x0, x0, :lo12:.LC46
 	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR73
+	add	x23, x23, :lo12:.LANCHOR73
 	stp	x21, x22, [sp, 32]
-	ldr	w21, [x0, #:lo12:.LANCHOR76]
+	mov	w21, 0
 	stp	x19, x20, [sp, 16]
-	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
+	adrp	x22, .LANCHOR248
 	stp	x27, x28, [sp, 80]
-	cbnz	w21, .L2591
-	bl	FtlBbtMemInit
-	adrp	x20, .LANCHOR74
-	add	x22, x20, :lo12:.LANCHOR74
-	bl	FtlLoadFactoryBbt
-	add	x24, x22, 32
-	adrp	x28, .LANCHOR199
-	add	x22, x22, 12
-	add	x25, x28, :lo12:.LANCHOR199
-	adrp	x0, .LANCHOR44
-	add	x0, x0, :lo12:.LANCHOR44
-	str	x0, [x29, 120]
-.L2592:
-	ldr	x0, [x29, 120]
-	ldrh	w0, [x0]
-	cmp	w21, w0
-	bcc	.L2598
-	adrp	x21, .LANCHOR59
-	add	x21, x21, :lo12:.LANCHOR59
-	mov	w19, 0
-.L2599:
-	ldrh	w0, [x21]
-	cmp	w0, w19
-	bhi	.L2600
-	add	x21, x20, :lo12:.LANCHOR74
-	mov	w22, 65535
-	ldrh	w19, [x21, 12]
-	sub	w19, w19, #1
-	and	w19, w19, 65535
-.L2601:
-	ldrh	w0, [x21, 12]
-	sub	w0, w0, #47
-	cmp	w0, w19
-	bgt	.L2605
-	mov	w0, w19
-	bl	FtlBbmIsBadBlock
-	cmp	w0, 1
-	beq	.L2602
-	mov	w0, w19
-	bl	FlashTestBlk
-	cbz	w0, .L2603
-	mov	w0, w19
-	bl	FtlBbmMapBadBlock
-.L2602:
-	sub	w19, w19, #1
-	and	w19, w19, 65535
-	b	.L2601
-.L2598:
-	adrp	x2, .LANCHOR185
-	adrp	x0, .LANCHOR180
-	add	x19, x28, :lo12:.LANCHOR199
-	ldrh	w1, [x22]
-	ldr	x0, [x0, #:lo12:.LANCHOR180]
-	mov	w3, 65535
-	ldr	x26, [x2, #:lo12:.LANCHOR185]
-	cmp	w1, w3
-	stp	x0, x26, [x19, 8]
-	adrp	x23, .LANCHOR50
-	str	x2, [x29, 112]
-	beq	.L2593
-	ldrh	w4, [x23, #:lo12:.LANCHOR50]
-	mov	w2, 1
-	madd	w27, w4, w21, w1
-	mov	w1, w2
-	lsl	w0, w27, 10
-	str	w0, [x19, 4]
-	mov	x0, x19
-	bl	FlashReadPages
-	ldr	x1, [x19, 8]
-	ldr	x0, [x24]
-	ldrh	w2, [x23, #:lo12:.LANCHOR50]
-	add	w2, w2, 7
-	lsr	w2, w2, 3
-	bl	ftl_memcpy
-.L2594:
-	mov	w0, w27
-	add	w21, w21, 1
-	bl	FtlBbmMapBadBlock
-	add	x24, x24, 8
-	add	x22, x22, 2
-	b	.L2592
-.L2593:
-	mov	w1, w21
-	bl	FlashGetBadBlockList
-	ldr	x0, [x19, 8]
-	adrp	x27, .LANCHOR120
-	ldr	x1, [x24]
-	bl	FtlBbt2Bitmap
-	ldrh	w19, [x23, #:lo12:.LANCHOR50]
-	add	x23, x23, :lo12:.LANCHOR50
-	add	x0, x27, :lo12:.LANCHOR120
-	sub	w19, w19, #1
-	str	x0, [x29, 104]
-	and	w19, w19, 65535
-.L2595:
-	ldrh	w0, [x23]
-	madd	w0, w21, w0, w19
-	bl	FtlBbmIsBadBlock
-	cmp	w0, 1
-	beq	.L2596
-	ldr	x0, [x29, 112]
-	mov	w2, 16
-	strh	w19, [x22]
+	add	x1, x22, :lo12:.LANCHOR248
+	adrp	x20, check_valid_page_count_table
+	bl	printf
+	add	x19, x20, :lo12:check_valid_page_count_table
+	mov	x2, 8192
 	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR185]
-	bl	ftl_memset
-	mov	w0, -3872
-	strh	w0, [x26]
-	ldrh	w4, [x23]
-	ldrh	w0, [x22]
-	strh	w0, [x26, 2]
-	ldr	x1, [x24]
-	str	wzr, [x26, 4]
-	madd	w27, w4, w21, w0
-	lsl	w0, w27, 10
-	str	w0, [x25, 4]
-	ldr	x0, [x29, 104]
-	ldrh	w2, [x0]
-	ldr	x0, [x25, 8]
-	lsl	w2, w2, 2
-	bl	ftl_memcpy
-	mov	w2, 1
-	mov	x0, x25
-	mov	w1, w2
-	bl	FlashEraseBlocks
-	mov	w3, 1
-	mov	x0, x25
-	mov	w2, w3
-	mov	w1, w3
-	bl	FlashProgPages
-	ldr	w0, [x25]
-	cmn	w0, #1
-	bne	.L2594
-	mov	w0, w27
-	bl	FtlBbmMapBadBlock
-	b	.L2595
-.L2596:
-	sub	w19, w19, #1
-	and	w19, w19, 65535
-	b	.L2595
-.L2600:
-	mov	w0, w19
-	add	w19, w19, 1
-	bl	FtlBbmMapBadBlock
-	and	w19, w19, 65535
-	b	.L2599
-.L2603:
-	ldrh	w0, [x21]
-	cmp	w0, w22
-	bne	.L2604
-	strh	w19, [x21]
-	b	.L2602
-.L2604:
-	strh	w19, [x21, 4]
-.L2605:
-	adrp	x0, .LANCHOR77
-	add	x19, x20, :lo12:.LANCHOR74
-	ldrh	w1, [x20, #:lo12:.LANCHOR74]
-	mov	w2, 2
-	ldr	x0, [x0, #:lo12:.LANCHOR77]
-	str	wzr, [x19, 8]
-	lsl	w1, w1, 10
-	strh	wzr, [x19, 2]
-	str	w1, [x0, 4]
-	ldrh	w1, [x19, 4]
-	lsl	w1, w1, 10
-	str	w1, [x0, 60]
-	mov	w1, 1
-	bl	FlashEraseBlocks
-	ldrh	w0, [x20, #:lo12:.LANCHOR74]
-	bl	FtlBbmMapBadBlock
-	ldrh	w0, [x19, 4]
-	bl	FtlBbmMapBadBlock
-	bl	FtlBbmTblFlush
-	strh	wzr, [x19, 2]
-	ldr	w0, [x19, 8]
-	ldrh	w1, [x19, 4]
-	add	w0, w0, 1
-	str	w0, [x19, 8]
-	ldrh	w0, [x20, #:lo12:.LANCHOR74]
-	strh	w0, [x19, 4]
-	strh	w1, [x20, #:lo12:.LANCHOR74]
-	bl	FtlBbmTblFlush
-.L2591:
+	mov	x0, x19
+	bl	memset
+.L2746:
+	ldr	w0, [x23]
+	cmp	w21, w0
+	bcc	.L2748
+	adrp	x24, .LANCHOR40
+	adrp	x23, .LANCHOR84
+	mov	w2, 2
+	adrp	x0, .LC74
+	ldrh	w3, [x24, #:lo12:.LANCHOR40]
+	add	x0, x0, :lo12:.LC74
+	ldr	x1, [x23, #:lo12:.LANCHOR84]
+	add	x21, x20, :lo12:check_valid_page_count_table
+	adrp	x26, .LC76
+	add	x26, x26, :lo12:.LC76
+	mov	w25, 0
+	mov	w19, 0
+	bl	rknand_print_hex
+	ldrh	w3, [x24, #:lo12:.LANCHOR40]
+	mov	w2, 2
+	mov	x1, x21
+	adrp	x0, .LC75
+	add	x24, x24, :lo12:.LANCHOR40
+	add	x0, x0, :lo12:.LC75
+	bl	rknand_print_hex
+	mov	w4, 65535
+.L2749:
+	ldrh	w0, [x24]
+	cmp	w0, w19
+	bhi	.L2751
+	adrp	x0, .LANCHOR88
+	ldr	x19, [x0, #:lo12:.LANCHOR88]
+	cbz	x19, .L2752
+	adrp	x0, .LANCHOR89
+	adrp	x26, .LC77
+	add	x20, x20, :lo12:check_valid_page_count_table
+	add	x26, x26, :lo12:.LC77
+	ldrh	w27, [x0, #:lo12:.LANCHOR89]
+	adrp	x0, .LANCHOR82
+	mov	x24, x0
+	mov	w21, 0
+	ldr	x1, [x0, #:lo12:.LANCHOR82]
+	mov	w28, 6
+	mov	w4, 65535
+	sub	x19, x19, x1
+	mov	x1, -6148914691236517206
+	asr	x19, x19, 1
+	movk	x1, 0xaaab, lsl 0
+	mul	x19, x19, x1
+	and	w19, w19, 65535
+.L2753:
+	cmp	w21, w27
+	bne	.L2755
+.L2752:
+	cbz	w25, .L2745
+	mov	w2, 1680
+	add	x1, x22, :lo12:.LANCHOR248
+	adrp	x0, .LC5
+	add	x0, x0, :lo12:.LC5
+	bl	printf
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
+	bl	printf
+.L2745:
 	ldp	x19, x20, [sp, 16]
-	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-	.size	FtlMakeBbt, .-FtlMakeBbt
-	.section	.text.FtlLowFormat,"ax",@progbits
-	.align	2
-	.global	FtlLowFormat
-	.type	FtlLowFormat, %function
-FtlLowFormat:
-	adrp	x0, .LANCHOR76
-	ldr	w0, [x0, #:lo12:.LANCHOR76]
-	cbnz	w0, .L2643
-	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR192
-	mov	w1, 0
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR66
-	ldr	x0, [x0, #:lo12:.LANCHOR192]
-	adrp	x20, .LANCHOR156
-	ldrh	w2, [x19, #:lo12:.LANCHOR66]
-	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR38
-	stp	x21, x22, [sp, 32]
-	stp	x23, x24, [sp, 48]
-	lsl	w2, w2, 2
-	bl	ftl_memset
-	adrp	x0, .LANCHOR128
-	ldrh	w2, [x19, #:lo12:.LANCHOR66]
-	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR128]
-	lsl	w2, w2, 2
-	bl	ftl_memset
-	str	wzr, [x20, #:lo12:.LANCHOR156]
-	adrp	x0, .LANCHOR157
-	str	wzr, [x0, #:lo12:.LANCHOR157]
-	ldrh	w0, [x25, #:lo12:.LANCHOR38]
-	bl	FtlFreeSysBlkQueueInit
-	bl	FtlLoadBbt
-	cbz	w0, .L2614
-	bl	FtlMakeBbt
-.L2614:
-	adrp	x22, .LANCHOR55
+.L2748:
+	mov	w2, 0
+	add	x1, x29, 124
+	mov	w0, w21
+	bl	log2phys
+	ldr	w0, [x29, 124]
+	cmn	w0, #1
+	beq	.L2747
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+	and	x0, x0, 65535
+	ldrh	w1, [x19, x0, lsl 1]
+	add	w1, w1, 1
+	strh	w1, [x19, x0, lsl 1]
+.L2747:
+	add	w21, w21, 1
+	b	.L2746
+.L2751:
+	ldr	x0, [x23, #:lo12:.LANCHOR84]
+	ubfiz	x28, x19, 1, 16
+	sxtw	x27, w19
+	ldrh	w2, [x0, x28]
+	ldrh	w3, [x21, x27, lsl 1]
+	cmp	w2, w3
+	beq	.L2750
+	str	w4, [x29, 108]
+	mov	w1, w19
+	mov	x0, x26
+	bl	printf
+	ldr	x0, [x23, #:lo12:.LANCHOR84]
+	ldr	w4, [x29, 108]
+	ldrh	w0, [x0, x28]
+	cmp	w0, w4
+	beq	.L2750
+	ldrh	w1, [x21, x27, lsl 1]
+	cmp	w1, w0
+	csinc	w25, w25, wzr, ls
+.L2750:
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L2749
+.L2755:
+	ldr	x1, [x23, #:lo12:.LANCHOR84]
+	ubfiz	x0, x19, 1, 16
+	ldrh	w2, [x1, x0]
+	cbz	w2, .L2754
+	ldrh	w3, [x20, w19, sxtw 1]
+	mov	w1, w19
+	str	w4, [x29, 108]
+	mov	x0, x26
+	mov	w25, 1
+	bl	printf
+	ldr	w4, [x29, 108]
+.L2754:
+	umull	x19, w19, w28
+	ldr	x0, [x24, #:lo12:.LANCHOR82]
+	ldrh	w19, [x0, x19]
+	cmp	w19, w4
+	beq	.L2752
+	add	w21, w21, 1
+	and	w21, w21, 65535
+	b	.L2753
+	.size	FtlCheckVpc, .-FtlCheckVpc
+	.section	.text.FtlDumpSysBlock,"ax",@progbits
+	.align	2
+	.global	FtlDumpSysBlock
+	.type	FtlDumpSysBlock, %function
+FtlDumpSysBlock:
+	sub	sp, sp, #112
+	stp	x29, x30, [sp, 16]
+	add	x29, sp, 16
+	stp	x25, x26, [sp, 80]
+	and	w25, w0, 65535
 	adrp	x0, .LANCHOR183
-	mov	w6, 23752
-	ldrh	w1, [x22, #:lo12:.LANCHOR55]
-	movk	w6, 0xa0f, lsl 16
-	ldr	x4, [x0, #:lo12:.LANCHOR183]
-	adrp	x0, .LANCHOR184
-	lsl	w1, w1, 7
-	ldr	x5, [x0, #:lo12:.LANCHOR184]
-	mov	w0, 0
-.L2615:
-	cmp	w0, w1
-	blt	.L2616
-	adrp	x21, .LANCHOR39
-	adrp	x19, .LANCHOR40
-	add	x26, x19, :lo12:.LANCHOR40
-	mov	w23, 0
-	ldrh	w24, [x21, #:lo12:.LANCHOR39]
-.L2617:
-	ldrh	w0, [x26]
-	cmp	w0, w24
-	bhi	.L2618
-	adrp	x24, .LANCHOR37
-	sub	w1, w23, #2
-	ldrh	w0, [x24, #:lo12:.LANCHOR37]
-	cmp	w1, w0, lsl 1
-	bgt	.L2619
-.L2623:
-	add	x26, x21, :lo12:.LANCHOR39
-	mov	w23, 0
-	mov	w25, 0
-.L2620:
-	ldrh	w0, [x26]
-	cmp	w0, w25
-	bhi	.L2624
-	adrp	x0, .LANCHOR73
-	ldrh	w1, [x19, #:lo12:.LANCHOR40]
-	ldrh	w3, [x24, #:lo12:.LANCHOR37]
-	str	w1, [x0, #:lo12:.LANCHOR73]
-	adrp	x0, .LANCHOR41
-	adrp	x1, .LANCHOR227
-	ldr	w2, [x0, #:lo12:.LANCHOR41]
-	adrp	x0, .LANCHOR72
-	udiv	w6, w2, w3
-	ubfx	x5, x6, 5, 16
-	str	w6, [x0, #:lo12:.LANCHOR72]
-	add	w4, w5, 36
-	strh	w4, [x1, #:lo12:.LANCHOR227]
-	mov	w4, 24
-	mul	w4, w3, w4
-	cmp	w23, w4
-	ble	.L2625
-	sub	w2, w2, w23
-	udiv	w2, w2, w3
-	str	w2, [x0, #:lo12:.LANCHOR72]
-	lsr	w2, w2, 5
-	add	w2, w2, 24
-	strh	w2, [x1, #:lo12:.LANCHOR227]
-.L2625:
-	adrp	x2, .LANCHOR28
-	ldr	w2, [x2, #:lo12:.LANCHOR28]
-	cmp	w2, 1
-	bne	.L2626
-	udiv	w4, w23, w3
-	ldrh	w2, [x1, #:lo12:.LANCHOR227]
-	add	w4, w4, w2
-	add	w4, w2, w4, asr 2
-	strh	w4, [x1, #:lo12:.LANCHOR227]
-.L2626:
-	adrp	x2, .LANCHOR8
-	ldrb	w2, [x2, #:lo12:.LANCHOR8]
-	cbz	w2, .L2627
-	udiv	w4, w23, w3
-	ldrh	w2, [x1, #:lo12:.LANCHOR227]
-	add	w4, w4, w2
-	add	w4, w2, w4, asr 2
-	strh	w4, [x1, #:lo12:.LANCHOR227]
-.L2627:
-	adrp	x2, .LANCHOR48
-	ldrh	w2, [x2, #:lo12:.LANCHOR48]
-	cbz	w2, .L2629
-	ldrh	w4, [x1, #:lo12:.LANCHOR227]
-	add	w4, w4, w2, lsr 1
-	strh	w4, [x1, #:lo12:.LANCHOR227]
-	mul	w4, w2, w3
-	cmp	w23, w4
-	bge	.L2629
-	add	w2, w2, 32
-	str	w6, [x0, #:lo12:.LANCHOR72]
-	add	w2, w5, w2
-	strh	w2, [x1, #:lo12:.LANCHOR227]
-.L2629:
-	ldrh	w2, [x1, #:lo12:.LANCHOR227]
-	adrp	x25, .LANCHOR226
-	ldr	w1, [x0, #:lo12:.LANCHOR72]
-	adrp	x24, .LANCHOR83
-	mov	w23, -1
-	sub	w1, w1, w2
-	mul	w3, w1, w3
-	adrp	x1, .LANCHOR52
-	str	w3, [x25, #:lo12:.LANCHOR226]
-	ldrh	w1, [x1, #:lo12:.LANCHOR52]
-	mul	w3, w1, w3
-	str	w3, [x0, #:lo12:.LANCHOR72]
-	ldrh	w0, [x22, #:lo12:.LANCHOR55]
-	mul	w3, w0, w3
-	adrp	x0, .LANCHOR68
-	str	w3, [x0, #:lo12:.LANCHOR68]
-	bl	FtlBbmTblFlush
-	ldr	x0, [x24, #:lo12:.LANCHOR83]
-	mov	w1, 0
-	ldrh	w2, [x19, #:lo12:.LANCHOR40]
-	lsl	w2, w2, 1
-	bl	ftl_memset
-	adrp	x0, .LANCHOR100
-	adrp	x1, .LANCHOR201
-	ldrh	w2, [x21, #:lo12:.LANCHOR39]
-	str	wzr, [x0, #:lo12:.LANCHOR100]
-	add	x0, x1, :lo12:.LANCHOR201
-	strh	w23, [x1, #:lo12:.LANCHOR201]
-	mov	w1, 255
-	lsr	w2, w2, 3
-	strh	wzr, [x0, 2]
-	strb	wzr, [x0, 6]
-	strb	wzr, [x0, 8]
-	adrp	x0, .LANCHOR91
-	add	x19, x0, :lo12:.LANCHOR91
-	strh	wzr, [x0, #:lo12:.LANCHOR91]
-	mov	w0, 1
-	strb	w0, [x19, 8]
-	adrp	x0, .LANCHOR0
-	strh	wzr, [x19, 2]
-	ldr	x0, [x0, #:lo12:.LANCHOR0]
-	strb	wzr, [x19, 6]
-	bl	ftl_memset
-.L2631:
-	mov	x0, x19
-	bl	make_superblock
-	ldrb	w1, [x19, 7]
-	ldrh	w0, [x19]
-	cbnz	w1, .L2632
-	ldr	x1, [x24, #:lo12:.LANCHOR83]
-	ubfiz	x0, x0, 1, 16
-	strh	w23, [x1, x0]
-	ldrh	w0, [x19]
-	add	w0, w0, 1
-	strh	w0, [x19]
-	b	.L2631
-.L2616:
-	ubfiz	x3, x0, 2, 16
-	mvn	w2, w0
-	orr	w2, w0, w2, lsl 16
-	add	w0, w0, 1
-	and	w0, w0, 65535
-	str	w2, [x4, x3]
-	str	w6, [x5, x3]
-	b	.L2615
-.L2618:
-	mov	w0, w24
-	mov	w1, 1
-	add	w24, w24, 1
-	bl	FtlLowFormatEraseBlock
-	add	w23, w23, w0
-	and	w24, w24, 65535
-	and	w23, w23, 65535
-	b	.L2617
-.L2619:
-	udiv	w0, w23, w0
-	adrp	x1, .LANCHOR65
-	ldr	w23, [x1, #:lo12:.LANCHOR65]
-	add	w0, w0, w23
-	bl	FtlSysBlkNumInit
-	ldrh	w0, [x25, #:lo12:.LANCHOR38]
-	add	x25, x19, :lo12:.LANCHOR40
-	bl	FtlFreeSysBlkQueueInit
-	ldrh	w23, [x21, #:lo12:.LANCHOR39]
-.L2621:
+	stp	x21, x22, [sp, 48]
+	adrp	x21, .LANCHOR202
+	add	x1, x21, :lo12:.LANCHOR202
+	ldr	x2, [x0, #:lo12:.LANCHOR183]
+	adrp	x22, .LANCHOR54
+	stp	x23, x24, [sp, 64]
+	lsl	w26, w25, 10
+	stp	x19, x20, [sp, 32]
+	adrp	x23, .LC78
+	str	x27, [sp, 96]
+	adrp	x24, .LC79
+	str	x2, [x1, 8]
+	adrp	x2, .LANCHOR188
+	add	x22, x22, :lo12:.LANCHOR54
+	add	x23, x23, :lo12:.LC78
+	ldr	x2, [x2, #:lo12:.LANCHOR188]
+	add	x24, x24, :lo12:.LC79
+	mov	x27, x0
+	mov	w19, 0
+	str	x2, [x1, 16]
+.L2771:
+	ldrh	w0, [x22]
+	cmp	w19, w0
+	blt	.L2773
+	ldp	x19, x20, [sp, 32]
+	ldp	x21, x22, [sp, 48]
+	ldp	x23, x24, [sp, 64]
+	ldp	x25, x26, [sp, 80]
+	ldp	x29, x30, [sp, 16]
+	ldr	x27, [sp, 96]
+	add	sp, sp, 112
+	ret
+.L2773:
+	add	x20, x21, :lo12:.LANCHOR202
+	orr	w0, w19, w26
+	mov	w2, 1
+	mov	w1, w2
+	str	w0, [x20, 4]
+	mov	x0, x20
+	bl	FlashReadPages
+	ldp	x1, x0, [x20, 8]
+	ldr	w2, [x21, #:lo12:.LANCHOR202]
+	ldr	w3, [x20, 4]
+	ldr	w1, [x1]
+	str	w1, [sp]
+	mov	w1, w25
+	ldp	w4, w5, [x0]
+	ldp	w6, w7, [x0, 8]
+	mov	x0, x23
+	bl	printf
+	ldr	x0, [x20, 16]
+	ldr	w0, [x0]
+	cmn	w0, #1
+	beq	.L2772
+	ldr	x1, [x27, #:lo12:.LANCHOR183]
+	mov	w3, 768
+	mov	w2, 4
+	mov	x0, x24
+	bl	rknand_print_hex
+.L2772:
+	add	w19, w19, 1
+	sxth	w19, w19
+	b	.L2771
+	.size	FtlDumpSysBlock, .-FtlDumpSysBlock
+	.section	.text.dump_map_info,"ax",@progbits
+	.align	2
+	.global	dump_map_info
+	.type	dump_map_info, %function
+dump_map_info:
+	sub	sp, sp, #96
+	adrp	x0, .LANCHOR40
+	stp	x29, x30, [sp, 16]
+	add	x29, sp, 16
+	stp	x19, x20, [sp, 32]
+	ldrh	w20, [x0, #:lo12:.LANCHOR40]
+	stp	x23, x24, [sp, 64]
+	adrp	x23, .LANCHOR47
+	stp	x21, x22, [sp, 48]
+	add	x23, x23, :lo12:.LANCHOR47
+	adrp	x22, .LANCHOR41
+	add	x22, x22, :lo12:.LANCHOR41
+	stp	x25, x26, [sp, 80]
+	adrp	x24, .LANCHOR38
+.L2779:
+	ldrh	w0, [x22]
+	cmp	w0, w20
+	bhi	.L2785
+	adrp	x25, .LANCHOR128
+	adrp	x19, .LANCHOR202
+	add	x25, x25, :lo12:.LANCHOR128
+	add	x19, x19, :lo12:.LANCHOR202
+	mov	w26, 0
+.L2786:
 	ldrh	w0, [x25]
-	cmp	w0, w23
-	bls	.L2623
-	mov	w0, w23
-	add	w23, w23, 1
-	mov	w1, 1
-	and	w23, w23, 65535
-	bl	FtlLowFormatEraseBlock
-	b	.L2621
-.L2624:
-	mov	w0, w25
-	mov	w1, 0
-	add	w25, w25, 1
-	bl	FtlLowFormatEraseBlock
-	add	w23, w23, w0
-	and	w25, w25, 65535
-	and	w23, w23, 65535
-	b	.L2620
-.L2632:
-	ldr	w1, [x20, #:lo12:.LANCHOR156]
-	ubfiz	x0, x0, 1, 16
-	str	w1, [x19, 12]
-	mov	w23, -1
-	add	w1, w1, 1
-	str	w1, [x20, #:lo12:.LANCHOR156]
-	ldr	x1, [x24, #:lo12:.LANCHOR83]
-	ldrh	w2, [x19, 4]
-	strh	w2, [x1, x0]
-	adrp	x2, .LANCHOR92
-	add	x0, x2, :lo12:.LANCHOR92
-	ldrh	w1, [x19]
-	mov	x19, x0
-	add	w1, w1, 1
-	strh	wzr, [x0, 2]
-	strh	w1, [x2, #:lo12:.LANCHOR92]
-	mov	w1, 1
-	strb	wzr, [x0, 6]
-	strb	w1, [x0, 8]
-.L2633:
+	cmp	w26, w0
+	bge	.L2789
+	adrp	x21, .LANCHOR54
+	adrp	x0, .LC49
+	sbfiz	x23, x26, 1, 32
+	mov	w20, 0
+	add	x21, x21, :lo12:.LANCHOR54
+	add	x24, x0, :lo12:.LC49
+	b	.L2790
+.L2781:
+	ldrb	w0, [x23, x5]
+	mov	w1, w20
+	bl	V2P_block
+	and	w4, w0, 65535
+	bl	FtlBbmIsBadBlock
+	cbnz	w0, .L2780
+	umaddl	x1, w19, w7, x6
+	lsl	w4, w4, 10
+	mul	w0, w19, w8
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	asr	w0, w0, 2
+	str	w4, [x1, 4]
+	add	x0, x10, x0, sxtw 2
+	stp	x11, x0, [x1, 8]
+.L2780:
+	add	x5, x5, 1
+.L2787:
+	cmp	w12, w5, uxth
+	bhi	.L2781
+	cbnz	w19, .L2782
+.L2784:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L2779
+.L2782:
+	mov	w1, w19
+	mov	w2, 1
+	mov	x0, x6
+	bl	FlashReadPages
+	mov	w0, 56
+	adrp	x26, .LC80
+	add	x26, x26, :lo12:.LC80
+	mov	x25, 0
+	umull	x19, w19, w0
+.L2783:
+	ldr	x0, [x21, #:lo12:.LANCHOR180]
+	add	x0, x0, x25
+	add	x25, x25, 56
+	ldr	x1, [x0, 16]
+	ldr	w2, [x0, 4]
+	ldr	x0, [x0, 8]
+	ldr	w3, [x0, 4]
+	str	w3, [sp]
+	ldr	w7, [x0]
+	mov	x0, x26
+	ldp	w3, w4, [x1]
+	ldp	w5, w6, [x1, 8]
+	ubfx	x1, x2, 10, 16
+	bl	printf
+	cmp	x25, x19
+	bne	.L2783
+	b	.L2784
+.L2785:
+	adrp	x0, .LANCHOR105
+	adrp	x21, .LANCHOR180
+	ldrh	w12, [x24, #:lo12:.LANCHOR38]
+	mov	x5, 0
+	ldr	x11, [x0, #:lo12:.LANCHOR105]
+	adrp	x0, .LANCHOR106
+	ldr	x6, [x21, #:lo12:.LANCHOR180]
+	mov	w19, 0
+	ldr	x10, [x0, #:lo12:.LANCHOR106]
+	adrp	x0, .LANCHOR59
+	mov	w7, 56
+	ldrh	w8, [x0, #:lo12:.LANCHOR59]
+	b	.L2787
+.L2788:
+	adrp	x22, .LANCHOR129
+	mov	w2, 1
+	mov	w1, w2
+	ldr	x0, [x22, #:lo12:.LANCHOR129]
+	ldrh	w0, [x0, x23]
+	orr	w0, w20, w0, lsl 10
+	str	w0, [x19, 4]
 	mov	x0, x19
-	bl	make_superblock
-	ldrb	w1, [x19, 7]
-	ldrh	w0, [x19]
-	cbnz	w1, .L2634
-	ldr	x1, [x24, #:lo12:.LANCHOR83]
-	ubfiz	x0, x0, 1, 16
-	strh	w23, [x1, x0]
-	ldrh	w0, [x19]
-	add	w0, w0, 1
-	strh	w0, [x19]
-	b	.L2633
-.L2634:
-	ldr	w1, [x20, #:lo12:.LANCHOR156]
-	ubfiz	x0, x0, 1, 16
-	str	w1, [x19, 12]
-	add	w1, w1, 1
-	str	w1, [x20, #:lo12:.LANCHOR156]
-	ldr	x1, [x24, #:lo12:.LANCHOR83]
-	ldrh	w2, [x19, 4]
-	mov	w19, -1
-	strh	w2, [x1, x0]
-	adrp	x0, .LANCHOR93
-	strh	w19, [x0, #:lo12:.LANCHOR93]
-	bl	FtlFreeSysBlkQueueOut
-	adrp	x2, .LANCHOR206
-	add	x1, x2, :lo12:.LANCHOR206
-	strh	w0, [x2, #:lo12:.LANCHOR206]
-	ldr	w0, [x25, #:lo12:.LANCHOR226]
-	strh	w0, [x1, 6]
-	ldr	w0, [x20, #:lo12:.LANCHOR156]
-	str	w0, [x1, 8]
-	add	w0, w0, 1
-	strh	wzr, [x1, 2]
-	strh	w19, [x1, 4]
-	str	w0, [x20, #:lo12:.LANCHOR156]
-	bl	FtlVpcTblFlush
-	bl	FtlSysBlkInit
-	cbnz	w0, .L2613
-	adrp	x0, .LANCHOR223
-	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR223]
-.L2613:
-	mov	w0, 0
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
-	ret
-.L2643:
-	mov	w0, 0
-	ret
-	.size	FtlLowFormat, .-FtlLowFormat
+	bl	FlashReadPages
+	ldp	x2, x0, [x19, 8]
+	add	w20, w20, 1
+	ldr	x1, [x22, #:lo12:.LANCHOR129]
+	sxth	w20, w20
+	ldr	w3, [x2, 4]
+	ldrh	w1, [x1, x23]
+	str	w3, [sp, 8]
+	ldr	w2, [x2]
+	str	w2, [sp]
+	ldp	w4, w5, [x0]
+	ldp	w6, w7, [x0, 8]
+	mov	x0, x24
+	ldp	w2, w3, [x19]
+	bl	printf
+.L2790:
+	ldrh	w0, [x21]
+	cmp	w20, w0
+	blt	.L2788
+	add	w0, w26, 1
+	sxth	w26, w0
+	b	.L2786
+.L2789:
+	adrp	x0, .LANCHOR65
+	mov	w2, 2
+	adrp	x19, .LANCHOR67
+	ldr	w3, [x0, #:lo12:.LANCHOR65]
+	adrp	x0, .LANCHOR129
+	ldr	x1, [x0, #:lo12:.LANCHOR129]
+	adrp	x0, .LC81
+	add	x0, x0, :lo12:.LC81
+	bl	rknand_print_hex
+	adrp	x0, .LANCHOR131
+	ldrh	w3, [x19, #:lo12:.LANCHOR67]
+	mov	w2, 4
+	ldr	x1, [x0, #:lo12:.LANCHOR131]
+	adrp	x0, .LC82
+	add	x0, x0, :lo12:.LC82
+	bl	rknand_print_hex
+	adrp	x0, .LANCHOR195
+	ldrh	w3, [x19, #:lo12:.LANCHOR67]
+	ldp	x21, x22, [sp, 48]
+	mov	w2, 4
+	ldr	x1, [x0, #:lo12:.LANCHOR195]
+	adrp	x0, .LC83
+	ldp	x19, x20, [sp, 32]
+	add	x0, x0, :lo12:.LC83
+	ldp	x23, x24, [sp, 64]
+	ldp	x25, x26, [sp, 80]
+	ldp	x29, x30, [sp, 16]
+	add	sp, sp, 96
+	b	rknand_print_hex
+	.size	dump_map_info, .-dump_map_info
 	.global	FtlMallocOffset
 	.global	FtlMallocBuffer
+	.global	LastWritenPbaAddr
 	.global	gc_ink_free_return_value
+	.global	check_valid_page_count_table
 	.global	FtlUpdateVaildLpnCount
 	.global	g_ect_tbl_power_up_flush
 	.global	power_up_flag
@@ -18261,6 +19610,8 @@ FtlLowFormat:
 	.global	g_gc_bad_block_temp_tbl
 	.global	g_gc_bad_block_gc_index
 	.global	g_gc_bad_block_temp_num
+	.global	g_gc_next_blk_3
+	.global	g_gc_next_blk_2
 	.global	g_gc_next_blk_1
 	.global	g_gc_next_blk
 	.global	g_gc_cur_blk_max_valid_pages
@@ -18428,7 +19779,7 @@ FtlLowFormat:
 	.global	read_retry_cur_offset
 	.section	.bss.DeviceCapacity,"aw",@nobits
 	.align	2
-	.set	.LANCHOR60,. + 0
+	.set	.LANCHOR61,. + 0
 	.type	DeviceCapacity, %object
 	.size	DeviceCapacity, 4
 DeviceCapacity:
@@ -18449,7 +19800,7 @@ DieCsIndex:
 	.zero	8
 	.section	.bss.FlashDdrTunningReadCount,"aw",@nobits
 	.align	2
-	.set	.LANCHOR141,. + 0
+	.set	.LANCHOR144,. + 0
 	.type	FlashDdrTunningReadCount, %object
 	.size	FlashDdrTunningReadCount, 4
 FlashDdrTunningReadCount:
@@ -18468,7 +19819,7 @@ FtlMallocBuffer:
 	.zero	1310720
 	.section	.bss.FtlUpdateVaildLpnCount,"aw",@nobits
 	.align	1
-	.set	.LANCHOR99,. + 0
+	.set	.LANCHOR100,. + 0
 	.type	FtlUpdateVaildLpnCount, %object
 	.size	FtlUpdateVaildLpnCount, 2
 FtlUpdateVaildLpnCount:
@@ -18482,245 +19833,251 @@ IDByte:
 	.zero	32
 	.section	.bss.c_ftl_nand_bbm_buf_size,"aw",@nobits
 	.align	1
-	.set	.LANCHOR120,. + 0
+	.set	.LANCHOR123,. + 0
 	.type	c_ftl_nand_bbm_buf_size, %object
 	.size	c_ftl_nand_bbm_buf_size, 2
 c_ftl_nand_bbm_buf_size:
 	.zero	2
 	.section	.bss.c_ftl_nand_blk_pre_plane,"aw",@nobits
 	.align	1
-	.set	.LANCHOR40,. + 0
+	.set	.LANCHOR41,. + 0
 	.type	c_ftl_nand_blk_pre_plane, %object
 	.size	c_ftl_nand_blk_pre_plane, 2
 c_ftl_nand_blk_pre_plane:
 	.zero	2
 	.section	.bss.c_ftl_nand_blks_per_die,"aw",@nobits
 	.align	1
-	.set	.LANCHOR50,. + 0
+	.set	.LANCHOR51,. + 0
 	.type	c_ftl_nand_blks_per_die, %object
 	.size	c_ftl_nand_blks_per_die, 2
 c_ftl_nand_blks_per_die:
 	.zero	2
 	.section	.bss.c_ftl_nand_blks_per_die_shift,"aw",@nobits
 	.align	1
-	.set	.LANCHOR51,. + 0
+	.set	.LANCHOR52,. + 0
 	.type	c_ftl_nand_blks_per_die_shift, %object
 	.size	c_ftl_nand_blks_per_die_shift, 2
 c_ftl_nand_blks_per_die_shift:
 	.zero	2
 	.section	.bss.c_ftl_nand_byte_pre_oob,"aw",@nobits
 	.align	1
-	.set	.LANCHOR58,. + 0
+	.set	.LANCHOR59,. + 0
 	.type	c_ftl_nand_byte_pre_oob, %object
 	.size	c_ftl_nand_byte_pre_oob, 2
 c_ftl_nand_byte_pre_oob:
 	.zero	2
 	.section	.bss.c_ftl_nand_byte_pre_page,"aw",@nobits
 	.align	1
-	.set	.LANCHOR57,. + 0
+	.set	.LANCHOR58,. + 0
 	.type	c_ftl_nand_byte_pre_page, %object
 	.size	c_ftl_nand_byte_pre_page, 2
 c_ftl_nand_byte_pre_page:
 	.zero	2
 	.section	.bss.c_ftl_nand_data_blks_per_plane,"aw",@nobits
 	.align	1
-	.set	.LANCHOR39,. + 0
+	.set	.LANCHOR40,. + 0
 	.type	c_ftl_nand_data_blks_per_plane, %object
 	.size	c_ftl_nand_data_blks_per_plane, 2
 c_ftl_nand_data_blks_per_plane:
 	.zero	2
 	.section	.bss.c_ftl_nand_data_op_blks_per_plane,"aw",@nobits
 	.align	1
-	.set	.LANCHOR227,. + 0
+	.set	.LANCHOR223,. + 0
 	.type	c_ftl_nand_data_op_blks_per_plane, %object
 	.size	c_ftl_nand_data_op_blks_per_plane, 2
 c_ftl_nand_data_op_blks_per_plane:
 	.zero	2
 	.section	.bss.c_ftl_nand_die_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR44,. + 0
+	.set	.LANCHOR45,. + 0
 	.type	c_ftl_nand_die_num, %object
 	.size	c_ftl_nand_die_num, 2
 c_ftl_nand_die_num:
 	.zero	2
 	.section	.bss.c_ftl_nand_ext_blk_pre_plane,"aw",@nobits
 	.align	1
-	.set	.LANCHOR48,. + 0
+	.set	.LANCHOR49,. + 0
 	.type	c_ftl_nand_ext_blk_pre_plane, %object
 	.size	c_ftl_nand_ext_blk_pre_plane, 2
 c_ftl_nand_ext_blk_pre_plane:
 	.zero	2
 	.section	.bss.c_ftl_nand_init_sys_blks_per_plane,"aw",@nobits
 	.align	2
-	.set	.LANCHOR65,. + 0
+	.set	.LANCHOR66,. + 0
 	.type	c_ftl_nand_init_sys_blks_per_plane, %object
 	.size	c_ftl_nand_init_sys_blks_per_plane, 4
 c_ftl_nand_init_sys_blks_per_plane:
 	.zero	4
 	.section	.bss.c_ftl_nand_l2pmap_ram_region_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR67,. + 0
+	.set	.LANCHOR68,. + 0
 	.type	c_ftl_nand_l2pmap_ram_region_num, %object
 	.size	c_ftl_nand_l2pmap_ram_region_num, 2
 c_ftl_nand_l2pmap_ram_region_num:
 	.zero	2
 	.section	.bss.c_ftl_nand_map_blks_per_plane,"aw",@nobits
 	.align	1
-	.set	.LANCHOR63,. + 0
+	.set	.LANCHOR64,. + 0
 	.type	c_ftl_nand_map_blks_per_plane, %object
 	.size	c_ftl_nand_map_blks_per_plane, 2
 c_ftl_nand_map_blks_per_plane:
 	.zero	2
 	.section	.bss.c_ftl_nand_map_region_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR66,. + 0
+	.set	.LANCHOR67,. + 0
 	.type	c_ftl_nand_map_region_num, %object
 	.size	c_ftl_nand_map_region_num, 2
 c_ftl_nand_map_region_num:
 	.zero	2
 	.section	.bss.c_ftl_nand_max_data_blks,"aw",@nobits
 	.align	2
-	.set	.LANCHOR41,. + 0
+	.set	.LANCHOR42,. + 0
 	.type	c_ftl_nand_max_data_blks, %object
 	.size	c_ftl_nand_max_data_blks, 4
 c_ftl_nand_max_data_blks:
 	.zero	4
 	.section	.bss.c_ftl_nand_max_map_blks,"aw",@nobits
 	.align	2
-	.set	.LANCHOR64,. + 0
+	.set	.LANCHOR65,. + 0
 	.type	c_ftl_nand_max_map_blks, %object
 	.size	c_ftl_nand_max_map_blks, 4
 c_ftl_nand_max_map_blks:
 	.zero	4
 	.section	.bss.c_ftl_nand_max_sys_blks,"aw",@nobits
 	.align	2
-	.set	.LANCHOR38,. + 0
+	.set	.LANCHOR39,. + 0
 	.type	c_ftl_nand_max_sys_blks, %object
 	.size	c_ftl_nand_max_sys_blks, 4
 c_ftl_nand_max_sys_blks:
 	.zero	4
 	.section	.bss.c_ftl_nand_max_vendor_blks,"aw",@nobits
 	.align	1
-	.set	.LANCHOR61,. + 0
+	.set	.LANCHOR62,. + 0
 	.type	c_ftl_nand_max_vendor_blks, %object
 	.size	c_ftl_nand_max_vendor_blks, 2
 c_ftl_nand_max_vendor_blks:
 	.zero	2
 	.section	.bss.c_ftl_nand_page_pre_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR52,. + 0
+	.set	.LANCHOR53,. + 0
 	.type	c_ftl_nand_page_pre_blk, %object
 	.size	c_ftl_nand_page_pre_blk, 2
 c_ftl_nand_page_pre_blk:
 	.zero	2
 	.section	.bss.c_ftl_nand_page_pre_slc_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR53,. + 0
+	.set	.LANCHOR54,. + 0
 	.type	c_ftl_nand_page_pre_slc_blk, %object
 	.size	c_ftl_nand_page_pre_slc_blk, 2
 c_ftl_nand_page_pre_slc_blk:
 	.zero	2
 	.section	.bss.c_ftl_nand_page_pre_super_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR54,. + 0
+	.set	.LANCHOR55,. + 0
 	.type	c_ftl_nand_page_pre_super_blk, %object
 	.size	c_ftl_nand_page_pre_super_blk, 2
 c_ftl_nand_page_pre_super_blk:
 	.zero	2
 	.section	.bss.c_ftl_nand_planes_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR37,. + 0
+	.set	.LANCHOR38,. + 0
 	.type	c_ftl_nand_planes_num, %object
 	.size	c_ftl_nand_planes_num, 2
 c_ftl_nand_planes_num:
 	.zero	2
 	.section	.bss.c_ftl_nand_planes_per_die,"aw",@nobits
 	.align	1
-	.set	.LANCHOR45,. + 0
+	.set	.LANCHOR46,. + 0
 	.type	c_ftl_nand_planes_per_die, %object
 	.size	c_ftl_nand_planes_per_die, 2
 c_ftl_nand_planes_per_die:
 	.zero	2
 	.section	.bss.c_ftl_nand_reserved_blks,"aw",@nobits
 	.align	1
-	.set	.LANCHOR59,. + 0
+	.set	.LANCHOR60,. + 0
 	.type	c_ftl_nand_reserved_blks, %object
 	.size	c_ftl_nand_reserved_blks, 2
 c_ftl_nand_reserved_blks:
 	.zero	2
 	.section	.bss.c_ftl_nand_sec_pre_page,"aw",@nobits
 	.align	1
-	.set	.LANCHOR55,. + 0
+	.set	.LANCHOR56,. + 0
 	.type	c_ftl_nand_sec_pre_page, %object
 	.size	c_ftl_nand_sec_pre_page, 2
 c_ftl_nand_sec_pre_page:
 	.zero	2
 	.section	.bss.c_ftl_nand_sec_pre_page_shift,"aw",@nobits
 	.align	1
-	.set	.LANCHOR56,. + 0
+	.set	.LANCHOR57,. + 0
 	.type	c_ftl_nand_sec_pre_page_shift, %object
 	.size	c_ftl_nand_sec_pre_page_shift, 2
 c_ftl_nand_sec_pre_page_shift:
 	.zero	2
 	.section	.bss.c_ftl_nand_sys_blks_per_plane,"aw",@nobits
 	.align	2
-	.set	.LANCHOR36,. + 0
+	.set	.LANCHOR37,. + 0
 	.type	c_ftl_nand_sys_blks_per_plane, %object
 	.size	c_ftl_nand_sys_blks_per_plane, 4
 c_ftl_nand_sys_blks_per_plane:
 	.zero	4
 	.section	.bss.c_ftl_nand_totle_phy_blks,"aw",@nobits
 	.align	2
-	.set	.LANCHOR42,. + 0
+	.set	.LANCHOR43,. + 0
 	.type	c_ftl_nand_totle_phy_blks, %object
 	.size	c_ftl_nand_totle_phy_blks, 4
 c_ftl_nand_totle_phy_blks:
 	.zero	4
 	.section	.bss.c_ftl_nand_type,"aw",@nobits
 	.align	1
-	.set	.LANCHOR43,. + 0
+	.set	.LANCHOR44,. + 0
 	.type	c_ftl_nand_type, %object
 	.size	c_ftl_nand_type, 2
 c_ftl_nand_type:
 	.zero	2
 	.section	.bss.c_ftl_nand_vendor_region_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR62,. + 0
+	.set	.LANCHOR63,. + 0
 	.type	c_ftl_nand_vendor_region_num, %object
 	.size	c_ftl_nand_vendor_region_num, 2
 c_ftl_nand_vendor_region_num:
 	.zero	2
 	.section	.bss.c_ftl_vendor_part_size,"aw",@nobits
 	.align	1
-	.set	.LANCHOR49,. + 0
+	.set	.LANCHOR50,. + 0
 	.type	c_ftl_vendor_part_size, %object
 	.size	c_ftl_vendor_part_size, 2
 c_ftl_vendor_part_size:
 	.zero	2
 	.section	.bss.c_gc_page_buf_num,"aw",@nobits
 	.align	2
-	.set	.LANCHOR107,. + 0
+	.set	.LANCHOR108,. + 0
 	.type	c_gc_page_buf_num, %object
 	.size	c_gc_page_buf_num, 4
 c_gc_page_buf_num:
 	.zero	4
 	.section	.bss.c_mlc_erase_count_value,"aw",@nobits
 	.align	1
-	.set	.LANCHOR47,. + 0
+	.set	.LANCHOR48,. + 0
 	.type	c_mlc_erase_count_value, %object
 	.size	c_mlc_erase_count_value, 2
 c_mlc_erase_count_value:
 	.zero	2
+	.section	.bss.check_valid_page_count_table,"aw",@nobits
+	.align	3
+	.type	check_valid_page_count_table, %object
+	.size	check_valid_page_count_table, 8192
+check_valid_page_count_table:
+	.zero	8192
 	.section	.bss.ftl_gc_temp_power_lost_recovery_flag,"aw",@nobits
 	.align	2
-	.set	.LANCHOR132,. + 0
+	.set	.LANCHOR135,. + 0
 	.type	ftl_gc_temp_power_lost_recovery_flag, %object
 	.size	ftl_gc_temp_power_lost_recovery_flag, 4
 ftl_gc_temp_power_lost_recovery_flag:
 	.zero	4
 	.section	.bss.gBbtInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR74,. + 0
+	.set	.LANCHOR75,. + 0
 	.type	gBbtInfo, %object
 	.size	gBbtInfo, 96
 gBbtInfo:
@@ -18734,7 +20091,7 @@ gBlockPageAlignSize:
 	.zero	4
 	.section	.bss.gBootDdrMode,"aw",@nobits
 	.align	2
-	.set	.LANCHOR152,. + 0
+	.set	.LANCHOR155,. + 0
 	.type	gBootDdrMode, %object
 	.size	gBootDdrMode, 4
 gBootDdrMode:
@@ -18759,28 +20116,28 @@ gFlashOnfiModeEn:
 	.zero	1
 	.section	.bss.gFlashPageBuffer0,"aw",@nobits
 	.align	3
-	.set	.LANCHOR144,. + 0
+	.set	.LANCHOR147,. + 0
 	.type	gFlashPageBuffer0, %object
 	.size	gFlashPageBuffer0, 8
 gFlashPageBuffer0:
 	.zero	8
 	.section	.bss.gFlashPageBuffer1,"aw",@nobits
 	.align	3
-	.set	.LANCHOR150,. + 0
+	.set	.LANCHOR153,. + 0
 	.type	gFlashPageBuffer1, %object
 	.size	gFlashPageBuffer1, 8
 gFlashPageBuffer1:
 	.zero	8
 	.section	.bss.gFlashProgCheckBuffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR195,. + 0
+	.set	.LANCHOR198,. + 0
 	.type	gFlashProgCheckBuffer, %object
 	.size	gFlashProgCheckBuffer, 8
 gFlashProgCheckBuffer:
 	.zero	8
 	.section	.bss.gFlashProgCheckSpareBuffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR196,. + 0
+	.set	.LANCHOR199,. + 0
 	.type	gFlashProgCheckSpareBuffer, %object
 	.size	gFlashProgCheckSpareBuffer, 8
 gFlashProgCheckSpareBuffer:
@@ -18798,34 +20155,34 @@ gFlashSlcMode:
 	.zero	1
 	.section	.bss.gFlashSpareBuffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR194,. + 0
+	.set	.LANCHOR197,. + 0
 	.type	gFlashSpareBuffer, %object
 	.size	gFlashSpareBuffer, 8
 gFlashSpareBuffer:
 	.zero	8
 	.section	.bss.gFlashToggleModeEn,"aw",@nobits
-	.set	.LANCHOR29,. + 0
+	.set	.LANCHOR30,. + 0
 	.type	gFlashToggleModeEn, %object
 	.size	gFlashToggleModeEn, 1
 gFlashToggleModeEn:
 	.zero	1
 	.section	.bss.gL2pMapInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR124,. + 0
+	.set	.LANCHOR127,. + 0
 	.type	gL2pMapInfo, %object
 	.size	gL2pMapInfo, 64
 gL2pMapInfo:
 	.zero	64
 	.section	.bss.gMasterInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR34,. + 0
+	.set	.LANCHOR35,. + 0
 	.type	gMasterInfo, %object
 	.size	gMasterInfo, 48
 gMasterInfo:
 	.zero	48
 	.section	.bss.gMasterTempBuf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR153,. + 0
+	.set	.LANCHOR156,. + 0
 	.type	gMasterTempBuf, %object
 	.size	gMasterTempBuf, 8
 gMasterTempBuf:
@@ -18837,7 +20194,7 @@ gMasterTempBuf:
 gMultiPageProgEn:
 	.zero	1
 	.section	.bss.gMultiPageReadEn,"aw",@nobits
-	.set	.LANCHOR198,. + 0
+	.set	.LANCHOR201,. + 0
 	.type	gMultiPageReadEn, %object
 	.size	gMultiPageReadEn, 1
 gMultiPageReadEn:
@@ -18850,27 +20207,27 @@ gMultiPageReadEn:
 gNandChipMap:
 	.zero	64
 	.section	.bss.gNandFlashEccBits,"aw",@nobits
-	.set	.LANCHOR32,. + 0
+	.set	.LANCHOR33,. + 0
 	.type	gNandFlashEccBits, %object
 	.size	gNandFlashEccBits, 1
 gNandFlashEccBits:
 	.zero	1
 	.section	.bss.gNandFlashIDBEccBits,"aw",@nobits
-	.set	.LANCHOR149,. + 0
+	.set	.LANCHOR152,. + 0
 	.type	gNandFlashIDBEccBits, %object
 	.size	gNandFlashIDBEccBits, 1
 gNandFlashIDBEccBits:
 	.zero	1
 	.section	.bss.gNandFlashIdbBlockAddr,"aw",@nobits
 	.align	2
-	.set	.LANCHOR146,. + 0
+	.set	.LANCHOR149,. + 0
 	.type	gNandFlashIdbBlockAddr, %object
 	.size	gNandFlashIdbBlockAddr, 4
 gNandFlashIdbBlockAddr:
 	.zero	4
 	.section	.bss.gNandFlashInfoBlockAddr,"aw",@nobits
 	.align	2
-	.set	.LANCHOR145,. + 0
+	.set	.LANCHOR148,. + 0
 	.type	gNandFlashInfoBlockAddr, %object
 	.size	gNandFlashInfoBlockAddr, 4
 gNandFlashInfoBlockAddr:
@@ -18893,20 +20250,20 @@ gNandFlashResEndPageAddr:
 gNandIDBResBlkNum:
 	.zero	1
 	.section	.bss.gNandIDBResBlkNumSaveInFlash,"aw",@nobits
-	.set	.LANCHOR147,. + 0
+	.set	.LANCHOR150,. + 0
 	.type	gNandIDBResBlkNumSaveInFlash, %object
 	.size	gNandIDBResBlkNumSaveInFlash, 1
 gNandIDBResBlkNumSaveInFlash:
 	.zero	1
 	.section	.bss.gNandIDataBuf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR138,. + 0
+	.set	.LANCHOR141,. + 0
 	.type	gNandIDataBuf, %object
 	.size	gNandIDataBuf, 2048
 gNandIDataBuf:
 	.zero	2048
 	.section	.bss.gNandMaxChip,"aw",@nobits
-	.set	.LANCHOR118,. + 0
+	.set	.LANCHOR121,. + 0
 	.type	gNandMaxChip, %object
 	.size	gNandMaxChip, 1
 gNandMaxChip:
@@ -18939,21 +20296,21 @@ gNandRandomizer:
 	.zero	1
 	.section	.bss.gNandcDumpWriteEn,"aw",@nobits
 	.align	2
-	.set	.LANCHOR35,. + 0
+	.set	.LANCHOR36,. + 0
 	.type	gNandcDumpWriteEn, %object
 	.size	gNandcDumpWriteEn, 4
 gNandcDumpWriteEn:
 	.zero	4
 	.section	.bss.gNandcEccBits,"aw",@nobits
 	.align	2
-	.set	.LANCHOR31,. + 0
+	.set	.LANCHOR32,. + 0
 	.type	gNandcEccBits, %object
 	.size	gNandcEccBits, 4
 gNandcEccBits:
 	.zero	4
 	.section	.bss.gNandcVer,"aw",@nobits
 	.align	2
-	.set	.LANCHOR33,. + 0
+	.set	.LANCHOR34,. + 0
 	.type	gNandcVer, %object
 	.size	gNandcVer, 4
 gNandcVer:
@@ -18967,14 +20324,14 @@ gReadRetryInfo:
 	.zero	852
 	.section	.bss.gSysFreeQueue,"aw",@nobits
 	.align	3
-	.set	.LANCHOR75,. + 0
+	.set	.LANCHOR76,. + 0
 	.type	gSysFreeQueue, %object
 	.size	gSysFreeQueue, 2056
 gSysFreeQueue:
 	.zero	2056
 	.section	.bss.gSysInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR206,. + 0
+	.set	.LANCHOR209,. + 0
 	.type	gSysInfo, %object
 	.size	gSysInfo, 12
 gSysInfo:
@@ -18987,7 +20344,7 @@ gToggleModeClkDiv:
 	.zero	4
 	.section	.bss.gTotleBlock,"aw",@nobits
 	.align	1
-	.set	.LANCHOR119,. + 0
+	.set	.LANCHOR122,. + 0
 	.type	gTotleBlock, %object
 	.size	gTotleBlock, 2
 gTotleBlock:
@@ -19001,91 +20358,91 @@ gVendorBlkInfo:
 	.zero	64
 	.section	.bss.g_GlobalDataVersion,"aw",@nobits
 	.align	2
-	.set	.LANCHOR157,. + 0
+	.set	.LANCHOR160,. + 0
 	.type	g_GlobalDataVersion, %object
 	.size	g_GlobalDataVersion, 4
 g_GlobalDataVersion:
 	.zero	4
 	.section	.bss.g_GlobalSysVersion,"aw",@nobits
 	.align	2
-	.set	.LANCHOR156,. + 0
+	.set	.LANCHOR159,. + 0
 	.type	g_GlobalSysVersion, %object
 	.size	g_GlobalSysVersion, 4
 g_GlobalSysVersion:
 	.zero	4
 	.section	.bss.g_LowFormat,"aw",@nobits
 	.align	2
-	.set	.LANCHOR239,. + 0
+	.set	.LANCHOR244,. + 0
 	.type	g_LowFormat, %object
 	.size	g_LowFormat, 4
 g_LowFormat:
 	.zero	4
 	.section	.bss.g_MaxLbaSector,"aw",@nobits
 	.align	2
-	.set	.LANCHOR68,. + 0
+	.set	.LANCHOR69,. + 0
 	.type	g_MaxLbaSector, %object
 	.size	g_MaxLbaSector, 4
 g_MaxLbaSector:
 	.zero	4
 	.section	.bss.g_MaxLbn,"aw",@nobits
 	.align	2
-	.set	.LANCHOR226,. + 0
+	.set	.LANCHOR222,. + 0
 	.type	g_MaxLbn, %object
 	.size	g_MaxLbn, 4
 g_MaxLbn:
 	.zero	4
 	.section	.bss.g_MaxLpn,"aw",@nobits
 	.align	2
-	.set	.LANCHOR72,. + 0
+	.set	.LANCHOR73,. + 0
 	.type	g_MaxLpn, %object
 	.size	g_MaxLpn, 4
 g_MaxLpn:
 	.zero	4
 	.section	.bss.g_SlcPartLbaEndSector,"aw",@nobits
 	.align	2
-	.set	.LANCHOR154,. + 0
+	.set	.LANCHOR157,. + 0
 	.type	g_SlcPartLbaEndSector, %object
 	.size	g_SlcPartLbaEndSector, 4
 g_SlcPartLbaEndSector:
 	.zero	4
 	.section	.bss.g_VaildLpn,"aw",@nobits
 	.align	2
-	.set	.LANCHOR100,. + 0
+	.set	.LANCHOR101,. + 0
 	.type	g_VaildLpn, %object
 	.size	g_VaildLpn, 4
 g_VaildLpn:
 	.zero	4
 	.section	.bss.g_active_superblock,"aw",@nobits
 	.align	3
-	.set	.LANCHOR91,. + 0
+	.set	.LANCHOR92,. + 0
 	.type	g_active_superblock, %object
 	.size	g_active_superblock, 48
 g_active_superblock:
 	.zero	48
 	.section	.bss.g_all_blk_used_slc_mode,"aw",@nobits
 	.align	2
-	.set	.LANCHOR155,. + 0
+	.set	.LANCHOR158,. + 0
 	.type	g_all_blk_used_slc_mode, %object
 	.size	g_all_blk_used_slc_mode, 4
 g_all_blk_used_slc_mode:
 	.zero	4
 	.section	.bss.g_buffer_superblock,"aw",@nobits
 	.align	3
-	.set	.LANCHOR92,. + 0
+	.set	.LANCHOR93,. + 0
 	.type	g_buffer_superblock, %object
 	.size	g_buffer_superblock, 48
 g_buffer_superblock:
 	.zero	48
 	.section	.bss.g_cur_erase_blk,"aw",@nobits
 	.align	2
-	.set	.LANCHOR73,. + 0
+	.set	.LANCHOR74,. + 0
 	.type	g_cur_erase_blk, %object
 	.size	g_cur_erase_blk, 4
 g_cur_erase_blk:
 	.zero	4
 	.section	.bss.g_ect_tbl_info_size,"aw",@nobits
 	.align	1
-	.set	.LANCHOR187,. + 0
+	.set	.LANCHOR190,. + 0
 	.type	g_ect_tbl_info_size, %object
 	.size	g_ect_tbl_info_size, 2
 g_ect_tbl_info_size:
@@ -19099,133 +20456,147 @@ g_ect_tbl_power_up_flush:
 	.zero	2
 	.section	.bss.g_flash_read_only_en,"aw",@nobits
 	.align	2
-	.set	.LANCHOR76,. + 0
+	.set	.LANCHOR77,. + 0
 	.type	g_flash_read_only_en, %object
 	.size	g_flash_read_only_en, 4
 g_flash_read_only_en:
 	.zero	4
 	.section	.bss.g_free_slc_blk_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR136,. + 0
+	.set	.LANCHOR139,. + 0
 	.type	g_free_slc_blk_num, %object
 	.size	g_free_slc_blk_num, 2
 g_free_slc_blk_num:
 	.zero	2
 	.section	.bss.g_ftl_nand_free_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR241,. + 0
+	.set	.LANCHOR246,. + 0
 	.type	g_ftl_nand_free_count, %object
 	.size	g_ftl_nand_free_count, 4
 g_ftl_nand_free_count:
 	.zero	4
 	.section	.bss.g_gc_bad_block_gc_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR116,. + 0
+	.set	.LANCHOR119,. + 0
 	.type	g_gc_bad_block_gc_index, %object
 	.size	g_gc_bad_block_gc_index, 2
 g_gc_bad_block_gc_index:
 	.zero	2
 	.section	.bss.g_gc_bad_block_temp_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR114,. + 0
+	.set	.LANCHOR117,. + 0
 	.type	g_gc_bad_block_temp_num, %object
 	.size	g_gc_bad_block_temp_num, 2
 g_gc_bad_block_temp_num:
 	.zero	2
 	.section	.bss.g_gc_bad_block_temp_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR115,. + 0
+	.set	.LANCHOR118,. + 0
 	.type	g_gc_bad_block_temp_tbl, %object
 	.size	g_gc_bad_block_temp_tbl, 34
 g_gc_bad_block_temp_tbl:
 	.zero	34
 	.section	.bss.g_gc_blk_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR175,. + 0
+	.set	.LANCHOR178,. + 0
 	.type	g_gc_blk_index, %object
 	.size	g_gc_blk_index, 2
 g_gc_blk_index:
 	.zero	2
 	.section	.bss.g_gc_blk_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR108,. + 0
+	.set	.LANCHOR109,. + 0
 	.type	g_gc_blk_num, %object
 	.size	g_gc_blk_num, 2
 g_gc_blk_num:
 	.zero	2
 	.section	.bss.g_gc_cur_blk_max_valid_pages,"aw",@nobits
 	.align	1
-	.set	.LANCHOR237,. + 0
+	.set	.LANCHOR242,. + 0
 	.type	g_gc_cur_blk_max_valid_pages, %object
 	.size	g_gc_cur_blk_max_valid_pages, 2
 g_gc_cur_blk_max_valid_pages:
 	.zero	2
 	.section	.bss.g_gc_cur_blk_valid_pages,"aw",@nobits
 	.align	1
-	.set	.LANCHOR236,. + 0
+	.set	.LANCHOR241,. + 0
 	.type	g_gc_cur_blk_valid_pages, %object
 	.size	g_gc_cur_blk_valid_pages, 2
 g_gc_cur_blk_valid_pages:
 	.zero	2
 	.section	.bss.g_gc_free_blk_threshold,"aw",@nobits
 	.align	1
-	.set	.LANCHOR173,. + 0
+	.set	.LANCHOR176,. + 0
 	.type	g_gc_free_blk_threshold, %object
 	.size	g_gc_free_blk_threshold, 2
 g_gc_free_blk_threshold:
 	.zero	2
 	.section	.bss.g_gc_head_data_block,"aw",@nobits
 	.align	2
-	.set	.LANCHOR170,. + 0
+	.set	.LANCHOR173,. + 0
 	.type	g_gc_head_data_block, %object
 	.size	g_gc_head_data_block, 4
 g_gc_head_data_block:
 	.zero	4
 	.section	.bss.g_gc_head_data_block_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR171,. + 0
+	.set	.LANCHOR174,. + 0
 	.type	g_gc_head_data_block_count, %object
 	.size	g_gc_head_data_block_count, 4
 g_gc_head_data_block_count:
 	.zero	4
 	.section	.bss.g_gc_merge_free_blk_threshold,"aw",@nobits
 	.align	1
-	.set	.LANCHOR174,. + 0
+	.set	.LANCHOR177,. + 0
 	.type	g_gc_merge_free_blk_threshold, %object
 	.size	g_gc_merge_free_blk_threshold, 2
 g_gc_merge_free_blk_threshold:
 	.zero	2
 	.section	.bss.g_gc_next_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR112,. + 0
+	.set	.LANCHOR113,. + 0
 	.type	g_gc_next_blk, %object
 	.size	g_gc_next_blk, 2
 g_gc_next_blk:
 	.zero	2
 	.section	.bss.g_gc_next_blk_1,"aw",@nobits
 	.align	1
-	.set	.LANCHOR113,. + 0
+	.set	.LANCHOR114,. + 0
 	.type	g_gc_next_blk_1, %object
 	.size	g_gc_next_blk_1, 2
 g_gc_next_blk_1:
+	.zero	2
+	.section	.bss.g_gc_next_blk_2,"aw",@nobits
+	.align	1
+	.set	.LANCHOR115,. + 0
+	.type	g_gc_next_blk_2, %object
+	.size	g_gc_next_blk_2, 2
+g_gc_next_blk_2:
+	.zero	2
+	.section	.bss.g_gc_next_blk_3,"aw",@nobits
+	.align	1
+	.set	.LANCHOR116,. + 0
+	.type	g_gc_next_blk_3, %object
+	.size	g_gc_next_blk_3, 2
+g_gc_next_blk_3:
 	.zero	2
 	.section	.bss.g_gc_num_req,"aw",@nobits
 	.align	2
-	.set	.LANCHOR102,. + 0
+	.set	.LANCHOR103,. + 0
 	.type	g_gc_num_req, %object
 	.size	g_gc_num_req, 4
 g_gc_num_req:
 	.zero	4
 	.section	.bss.g_gc_page_offset,"aw",@nobits
 	.align	1
-	.set	.LANCHOR110,. + 0
+	.set	.LANCHOR111,. + 0
 	.type	g_gc_page_offset, %object
 	.size	g_gc_page_offset, 2
 g_gc_page_offset:
 	.zero	2
 	.section	.bss.g_gc_refresh_block_temp_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR176,. + 0
+	.set	.LANCHOR179,. + 0
 	.type	g_gc_refresh_block_temp_num, %object
 	.size	g_gc_refresh_block_temp_num, 2
 g_gc_refresh_block_temp_num:
@@ -19238,35 +20609,35 @@ g_gc_refresh_block_temp_tbl:
 	.zero	34
 	.section	.bss.g_gc_skip_write_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR172,. + 0
+	.set	.LANCHOR175,. + 0
 	.type	g_gc_skip_write_count, %object
 	.size	g_gc_skip_write_count, 4
 g_gc_skip_write_count:
 	.zero	4
 	.section	.bss.g_gc_superblock,"aw",@nobits
 	.align	3
-	.set	.LANCHOR201,. + 0
+	.set	.LANCHOR204,. + 0
 	.type	g_gc_superblock, %object
 	.size	g_gc_superblock, 48
 g_gc_superblock:
 	.zero	48
 	.section	.bss.g_gc_temp_superblock,"aw",@nobits
 	.align	3
-	.set	.LANCHOR93,. + 0
+	.set	.LANCHOR94,. + 0
 	.type	g_gc_temp_superblock, %object
 	.size	g_gc_temp_superblock, 48
 g_gc_temp_superblock:
 	.zero	48
 	.section	.bss.g_in_gc_progress,"aw",@nobits
 	.align	2
-	.set	.LANCHOR168,. + 0
+	.set	.LANCHOR171,. + 0
 	.type	g_in_gc_progress, %object
 	.size	g_in_gc_progress, 4
 g_in_gc_progress:
 	.zero	4
 	.section	.bss.g_in_swl_replace,"aw",@nobits
 	.align	2
-	.set	.LANCHOR169,. + 0
+	.set	.LANCHOR172,. + 0
 	.type	g_in_swl_replace, %object
 	.size	g_in_swl_replace, 4
 g_in_swl_replace:
@@ -19280,7 +20651,7 @@ g_inkDie_check_enable:
 	.zero	4
 	.section	.bss.g_l2p_last_update_region_id,"aw",@nobits
 	.align	1
-	.set	.LANCHOR97,. + 0
+	.set	.LANCHOR98,. + 0
 	.type	g_l2p_last_update_region_id, %object
 	.size	g_l2p_last_update_region_id, 2
 g_l2p_last_update_region_id:
@@ -19292,91 +20663,91 @@ g_l2p_last_update_region_id:
 g_maxRegNum:
 	.zero	1
 	.section	.bss.g_maxRetryCount,"aw",@nobits
-	.set	.LANCHOR148,. + 0
+	.set	.LANCHOR151,. + 0
 	.type	g_maxRetryCount, %object
 	.size	g_maxRetryCount, 1
 g_maxRetryCount:
 	.zero	1
 	.section	.bss.g_max_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR166,. + 0
+	.set	.LANCHOR169,. + 0
 	.type	g_max_erase_count, %object
 	.size	g_max_erase_count, 4
 g_max_erase_count:
 	.zero	4
 	.section	.bss.g_min_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR167,. + 0
+	.set	.LANCHOR170,. + 0
 	.type	g_min_erase_count, %object
 	.size	g_min_erase_count, 4
 g_min_erase_count:
 	.zero	4
 	.section	.bss.g_nandc_version_data,"aw",@nobits
 	.align	2
-	.set	.LANCHOR151,. + 0
+	.set	.LANCHOR29,. + 0
 	.type	g_nandc_version_data, %object
 	.size	g_nandc_version_data, 4
 g_nandc_version_data:
 	.zero	4
 	.section	.bss.g_num_data_superblocks,"aw",@nobits
 	.align	1
-	.set	.LANCHOR85,. + 0
+	.set	.LANCHOR86,. + 0
 	.type	g_num_data_superblocks, %object
 	.size	g_num_data_superblocks, 2
 g_num_data_superblocks:
 	.zero	2
 	.section	.bss.g_num_free_superblocks,"aw",@nobits
 	.align	1
-	.set	.LANCHOR88,. + 0
+	.set	.LANCHOR89,. + 0
 	.type	g_num_free_superblocks, %object
 	.size	g_num_free_superblocks, 2
 g_num_free_superblocks:
 	.zero	2
 	.section	.bss.g_page_map_check_enable,"aw",@nobits
 	.align	1
-	.set	.LANCHOR69,. + 0
+	.set	.LANCHOR70,. + 0
 	.type	g_page_map_check_enable, %object
 	.size	g_page_map_check_enable, 2
 g_page_map_check_enable:
 	.zero	2
 	.section	.bss.g_power_lost_ecc_error_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR229,. + 0
+	.set	.LANCHOR235,. + 0
 	.type	g_power_lost_ecc_error_blk, %object
 	.size	g_power_lost_ecc_error_blk, 2
 g_power_lost_ecc_error_blk:
 	.zero	2
 	.section	.bss.g_power_lost_recovery_flag,"aw",@nobits
 	.align	1
-	.set	.LANCHOR230,. + 0
+	.set	.LANCHOR236,. + 0
 	.type	g_power_lost_recovery_flag, %object
 	.size	g_power_lost_recovery_flag, 2
 g_power_lost_recovery_flag:
 	.zero	2
 	.section	.bss.g_recovery_page_min_ver,"aw",@nobits
 	.align	2
-	.set	.LANCHOR133,. + 0
+	.set	.LANCHOR136,. + 0
 	.type	g_recovery_page_min_ver, %object
 	.size	g_recovery_page_min_ver, 4
 g_recovery_page_min_ver:
 	.zero	4
 	.section	.bss.g_recovery_page_num,"aw",@nobits
 	.align	2
-	.set	.LANCHOR231,. + 0
+	.set	.LANCHOR237,. + 0
 	.type	g_recovery_page_num, %object
 	.size	g_recovery_page_num, 4
 g_recovery_page_num:
 	.zero	4
 	.section	.bss.g_recovery_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR232,. + 0
+	.set	.LANCHOR238,. + 0
 	.type	g_recovery_ppa_tbl, %object
 	.size	g_recovery_ppa_tbl, 128
 g_recovery_ppa_tbl:
 	.zero	128
 	.section	.bss.g_req_cache,"aw",@nobits
 	.align	3
-	.set	.LANCHOR129,. + 0
+	.set	.LANCHOR132,. + 0
 	.type	g_req_cache, %object
 	.size	g_req_cache, 8
 g_req_cache:
@@ -19395,77 +20766,77 @@ g_slc2KBNand:
 	.zero	1
 	.section	.bss.g_sys_ext_data,"aw",@nobits
 	.align	3
-	.set	.LANCHOR135,. + 0
+	.set	.LANCHOR138,. + 0
 	.type	g_sys_ext_data, %object
 	.size	g_sys_ext_data, 512
 g_sys_ext_data:
 	.zero	512
 	.section	.bss.g_sys_save_data,"aw",@nobits
 	.align	3
-	.set	.LANCHOR80,. + 0
+	.set	.LANCHOR81,. + 0
 	.type	g_sys_save_data, %object
 	.size	g_sys_save_data, 48
 g_sys_save_data:
 	.zero	48
 	.section	.bss.g_tmp_data_superblock_id,"aw",@nobits
 	.align	1
-	.set	.LANCHOR130,. + 0
+	.set	.LANCHOR133,. + 0
 	.type	g_tmp_data_superblock_id, %object
 	.size	g_tmp_data_superblock_id, 2
 g_tmp_data_superblock_id:
 	.zero	2
 	.section	.bss.g_totle_avg_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR202,. + 0
+	.set	.LANCHOR205,. + 0
 	.type	g_totle_avg_erase_count, %object
 	.size	g_totle_avg_erase_count, 4
 g_totle_avg_erase_count:
 	.zero	4
 	.section	.bss.g_totle_cache_write_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR161,. + 0
+	.set	.LANCHOR164,. + 0
 	.type	g_totle_cache_write_count, %object
 	.size	g_totle_cache_write_count, 4
 g_totle_cache_write_count:
 	.zero	4
 	.section	.bss.g_totle_discard_page_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR160,. + 0
+	.set	.LANCHOR163,. + 0
 	.type	g_totle_discard_page_count, %object
 	.size	g_totle_discard_page_count, 4
 g_totle_discard_page_count:
 	.zero	4
 	.section	.bss.g_totle_gc_page_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR158,. + 0
+	.set	.LANCHOR161,. + 0
 	.type	g_totle_gc_page_count, %object
 	.size	g_totle_gc_page_count, 4
 g_totle_gc_page_count:
 	.zero	4
 	.section	.bss.g_totle_l2p_write_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR162,. + 0
+	.set	.LANCHOR165,. + 0
 	.type	g_totle_l2p_write_count, %object
 	.size	g_totle_l2p_write_count, 4
 g_totle_l2p_write_count:
 	.zero	4
 	.section	.bss.g_totle_map_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR125,. + 0
+	.set	.LANCHOR128,. + 0
 	.type	g_totle_map_block, %object
 	.size	g_totle_map_block, 2
 g_totle_map_block:
 	.zero	2
 	.section	.bss.g_totle_mlc_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR164,. + 0
+	.set	.LANCHOR167,. + 0
 	.type	g_totle_mlc_erase_count, %object
 	.size	g_totle_mlc_erase_count, 4
 g_totle_mlc_erase_count:
 	.zero	4
 	.section	.bss.g_totle_read_page_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR163,. + 0
+	.set	.LANCHOR166,. + 0
 	.type	g_totle_read_page_count, %object
 	.size	g_totle_read_page_count, 4
 g_totle_read_page_count:
@@ -19479,35 +20850,35 @@ g_totle_read_sector:
 	.zero	4
 	.section	.bss.g_totle_slc_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR165,. + 0
+	.set	.LANCHOR168,. + 0
 	.type	g_totle_slc_erase_count, %object
 	.size	g_totle_slc_erase_count, 4
 g_totle_slc_erase_count:
 	.zero	4
 	.section	.bss.g_totle_swl_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR131,. + 0
+	.set	.LANCHOR134,. + 0
 	.type	g_totle_swl_count, %object
 	.size	g_totle_swl_count, 4
 g_totle_swl_count:
 	.zero	4
 	.section	.bss.g_totle_sys_slc_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR79,. + 0
+	.set	.LANCHOR80,. + 0
 	.type	g_totle_sys_slc_erase_count, %object
 	.size	g_totle_sys_slc_erase_count, 4
 g_totle_sys_slc_erase_count:
 	.zero	4
 	.section	.bss.g_totle_vendor_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR70,. + 0
+	.set	.LANCHOR71,. + 0
 	.type	g_totle_vendor_block, %object
 	.size	g_totle_vendor_block, 2
 g_totle_vendor_block:
 	.zero	2
 	.section	.bss.g_totle_write_page_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR159,. + 0
+	.set	.LANCHOR162,. + 0
 	.type	g_totle_write_page_count, %object
 	.size	g_totle_write_page_count, 4
 g_totle_write_page_count:
@@ -19521,21 +20892,21 @@ g_totle_write_sector:
 	.zero	4
 	.section	.bss.gc_discard_updated,"aw",@nobits
 	.align	2
-	.set	.LANCHOR222,. + 0
+	.set	.LANCHOR232,. + 0
 	.type	gc_discard_updated, %object
 	.size	gc_discard_updated, 4
 gc_discard_updated:
 	.zero	4
 	.section	.bss.gc_ink_free_return_value,"aw",@nobits
 	.align	1
-	.set	.LANCHOR235,. + 0
+	.set	.LANCHOR240,. + 0
 	.type	gc_ink_free_return_value, %object
 	.size	gc_ink_free_return_value, 2
 gc_ink_free_return_value:
 	.zero	2
 	.section	.bss.gpFlashSaveInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR143,. + 0
+	.set	.LANCHOR146,. + 0
 	.type	gpFlashSaveInfo, %object
 	.size	gpFlashSaveInfo, 8
 gpFlashSaveInfo:
@@ -19562,35 +20933,54 @@ gpNandc1:
 	.zero	8
 	.section	.bss.gpReadRetrial,"aw",@nobits
 	.align	3
-	.set	.LANCHOR142,. + 0
+	.set	.LANCHOR145,. + 0
 	.type	gpReadRetrial, %object
 	.size	gpReadRetrial, 8
 gpReadRetrial:
 	.zero	8
 	.section	.bss.gp_ect_tbl_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR188,. + 0
+	.set	.LANCHOR191,. + 0
 	.type	gp_ect_tbl_info, %object
 	.size	gp_ect_tbl_info, 8
 gp_ect_tbl_info:
 	.zero	8
+	.section	.bss.gp_flash_check_buf,"aw",@nobits
+	.align	3
+	.type	gp_flash_check_buf, %object
+	.size	gp_flash_check_buf, 262144
+gp_flash_check_buf:
+	.zero	262144
 	.section	.bss.gp_gc_page_buf_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR103,. + 0
+	.set	.LANCHOR104,. + 0
 	.type	gp_gc_page_buf_info, %object
 	.size	gp_gc_page_buf_info, 8
 gp_gc_page_buf_info:
 	.zero	8
 	.section	.bss.gp_last_act_superblock,"aw",@nobits
 	.align	3
-	.set	.LANCHOR221,. + 0
+	.set	.LANCHOR230,. + 0
 	.type	gp_last_act_superblock, %object
 	.size	gp_last_act_superblock, 8
 gp_last_act_superblock:
 	.zero	8
+	.section	.bss.idb_buf,"aw",@nobits
+	.align	3
+	.type	idb_buf, %object
+	.size	idb_buf, 262144
+idb_buf:
+	.zero	262144
+	.section	.bss.idb_need_write_back,"aw",@nobits
+	.align	2
+	.set	.LANCHOR154,. + 0
+	.type	idb_need_write_back, %object
+	.size	idb_need_write_back, 4
+idb_need_write_back:
+	.zero	4
 	.section	.bss.mlcPageToSlcPageTbl,"aw",@nobits
 	.align	2
-	.set	.LANCHOR117,. + 0
+	.set	.LANCHOR120,. + 0
 	.type	mlcPageToSlcPageTbl, %object
 	.size	mlcPageToSlcPageTbl, 1024
 mlcPageToSlcPageTbl:
@@ -19604,168 +20994,168 @@ p_blk_mode_table:
 	.zero	8
 	.section	.bss.p_data_block_list_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR82,. + 0
+	.set	.LANCHOR83,. + 0
 	.type	p_data_block_list_head, %object
 	.size	p_data_block_list_head, 8
 p_data_block_list_head:
 	.zero	8
 	.section	.bss.p_data_block_list_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR81,. + 0
+	.set	.LANCHOR82,. + 0
 	.type	p_data_block_list_table, %object
 	.size	p_data_block_list_table, 8
 p_data_block_list_table:
 	.zero	8
 	.section	.bss.p_data_block_list_tail,"aw",@nobits
 	.align	3
-	.set	.LANCHOR84,. + 0
+	.set	.LANCHOR85,. + 0
 	.type	p_data_block_list_tail, %object
 	.size	p_data_block_list_tail, 8
 p_data_block_list_tail:
 	.zero	8
 	.section	.bss.p_erase_count_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR78,. + 0
+	.set	.LANCHOR79,. + 0
 	.type	p_erase_count_table, %object
 	.size	p_erase_count_table, 8
 p_erase_count_table:
 	.zero	8
 	.section	.bss.p_free_data_block_list_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR87,. + 0
+	.set	.LANCHOR88,. + 0
 	.type	p_free_data_block_list_head, %object
 	.size	p_free_data_block_list_head, 8
 p_free_data_block_list_head:
 	.zero	8
 	.section	.bss.p_gc_blk_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR109,. + 0
+	.set	.LANCHOR110,. + 0
 	.type	p_gc_blk_tbl, %object
 	.size	p_gc_blk_tbl, 8
 p_gc_blk_tbl:
 	.zero	8
 	.section	.bss.p_gc_data_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR104,. + 0
+	.set	.LANCHOR105,. + 0
 	.type	p_gc_data_buf, %object
 	.size	p_gc_data_buf, 8
 p_gc_data_buf:
 	.zero	8
 	.section	.bss.p_gc_page_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR111,. + 0
+	.set	.LANCHOR112,. + 0
 	.type	p_gc_page_info, %object
 	.size	p_gc_page_info, 8
 p_gc_page_info:
 	.zero	8
 	.section	.bss.p_gc_spare_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR105,. + 0
+	.set	.LANCHOR106,. + 0
 	.type	p_gc_spare_buf, %object
 	.size	p_gc_spare_buf, 8
 p_gc_spare_buf:
 	.zero	8
 	.section	.bss.p_io_data_buf_0,"aw",@nobits
 	.align	3
-	.set	.LANCHOR183,. + 0
+	.set	.LANCHOR186,. + 0
 	.type	p_io_data_buf_0, %object
 	.size	p_io_data_buf_0, 8
 p_io_data_buf_0:
 	.zero	8
 	.section	.bss.p_io_data_buf_1,"aw",@nobits
 	.align	3
-	.set	.LANCHOR184,. + 0
+	.set	.LANCHOR187,. + 0
 	.type	p_io_data_buf_1, %object
 	.size	p_io_data_buf_1, 8
 p_io_data_buf_1:
 	.zero	8
 	.section	.bss.p_io_spare_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR186,. + 0
+	.set	.LANCHOR189,. + 0
 	.type	p_io_spare_buf, %object
 	.size	p_io_spare_buf, 8
 p_io_spare_buf:
 	.zero	8
 	.section	.bss.p_l2p_map_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR123,. + 0
+	.set	.LANCHOR126,. + 0
 	.type	p_l2p_map_buf, %object
 	.size	p_l2p_map_buf, 8
 p_l2p_map_buf:
 	.zero	8
 	.section	.bss.p_l2p_ram_map,"aw",@nobits
 	.align	3
-	.set	.LANCHOR96,. + 0
+	.set	.LANCHOR97,. + 0
 	.type	p_l2p_ram_map, %object
 	.size	p_l2p_ram_map, 8
 p_l2p_ram_map:
 	.zero	8
 	.section	.bss.p_map_block_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR126,. + 0
+	.set	.LANCHOR129,. + 0
 	.type	p_map_block_table, %object
 	.size	p_map_block_table, 8
 p_map_block_table:
 	.zero	8
 	.section	.bss.p_map_block_valid_page_count,"aw",@nobits
 	.align	3
-	.set	.LANCHOR122,. + 0
+	.set	.LANCHOR125,. + 0
 	.type	p_map_block_valid_page_count, %object
 	.size	p_map_block_valid_page_count, 8
 p_map_block_valid_page_count:
 	.zero	8
 	.section	.bss.p_map_block_ver_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR127,. + 0
+	.set	.LANCHOR130,. + 0
 	.type	p_map_block_ver_table, %object
 	.size	p_map_block_ver_table, 8
 p_map_block_ver_table:
 	.zero	8
 	.section	.bss.p_map_region_ppn_check_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR192,. + 0
+	.set	.LANCHOR195,. + 0
 	.type	p_map_region_ppn_check_table, %object
 	.size	p_map_region_ppn_check_table, 8
 p_map_region_ppn_check_table:
 	.zero	8
 	.section	.bss.p_map_region_ppn_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR128,. + 0
+	.set	.LANCHOR131,. + 0
 	.type	p_map_region_ppn_table, %object
 	.size	p_map_region_ppn_table, 8
 p_map_region_ppn_table:
 	.zero	8
 	.section	.bss.p_plane_order_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR46,. + 0
+	.set	.LANCHOR47,. + 0
 	.type	p_plane_order_table, %object
 	.size	p_plane_order_table, 32
 p_plane_order_table:
 	.zero	32
 	.section	.bss.p_swl_mul_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR134,. + 0
+	.set	.LANCHOR137,. + 0
 	.type	p_swl_mul_table, %object
 	.size	p_swl_mul_table, 8
 p_swl_mul_table:
 	.zero	8
 	.section	.bss.p_sys_data_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR180,. + 0
+	.set	.LANCHOR183,. + 0
 	.type	p_sys_data_buf, %object
 	.size	p_sys_data_buf, 8
 p_sys_data_buf:
 	.zero	8
 	.section	.bss.p_sys_data_buf_1,"aw",@nobits
 	.align	3
-	.set	.LANCHOR181,. + 0
+	.set	.LANCHOR184,. + 0
 	.type	p_sys_data_buf_1, %object
 	.size	p_sys_data_buf_1, 8
 p_sys_data_buf_1:
 	.zero	8
 	.section	.bss.p_sys_spare_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR185,. + 0
+	.set	.LANCHOR188,. + 0
 	.type	p_sys_spare_buf, %object
 	.size	p_sys_spare_buf, 8
 p_sys_spare_buf:
@@ -19778,42 +21168,42 @@ p_valid_page_count_check_table:
 	.zero	8
 	.section	.bss.p_valid_page_count_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR83,. + 0
+	.set	.LANCHOR84,. + 0
 	.type	p_valid_page_count_table, %object
 	.size	p_valid_page_count_table, 8
 p_valid_page_count_table:
 	.zero	8
 	.section	.bss.p_vendor_block_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR71,. + 0
+	.set	.LANCHOR72,. + 0
 	.type	p_vendor_block_table, %object
 	.size	p_vendor_block_table, 8
 p_vendor_block_table:
 	.zero	8
 	.section	.bss.p_vendor_block_valid_page_count,"aw",@nobits
 	.align	3
-	.set	.LANCHOR189,. + 0
+	.set	.LANCHOR192,. + 0
 	.type	p_vendor_block_valid_page_count, %object
 	.size	p_vendor_block_valid_page_count, 8
 p_vendor_block_valid_page_count:
 	.zero	8
 	.section	.bss.p_vendor_block_ver_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR190,. + 0
+	.set	.LANCHOR193,. + 0
 	.type	p_vendor_block_ver_table, %object
 	.size	p_vendor_block_ver_table, 8
 p_vendor_block_ver_table:
 	.zero	8
 	.section	.bss.p_vendor_data_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR182,. + 0
+	.set	.LANCHOR185,. + 0
 	.type	p_vendor_data_buf, %object
 	.size	p_vendor_data_buf, 8
 p_vendor_data_buf:
 	.zero	8
 	.section	.bss.p_vendor_region_ppn_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR191,. + 0
+	.set	.LANCHOR194,. + 0
 	.type	p_vendor_region_ppn_table, %object
 	.size	p_vendor_region_ppn_table, 8
 p_vendor_region_ppn_table:
@@ -19827,42 +21217,42 @@ read_retry_cur_offset:
 	.zero	4
 	.section	.bss.req_erase,"aw",@nobits
 	.align	3
-	.set	.LANCHOR77,. + 0
+	.set	.LANCHOR78,. + 0
 	.type	req_erase, %object
 	.size	req_erase, 8
 req_erase:
 	.zero	8
 	.section	.bss.req_gc,"aw",@nobits
 	.align	3
-	.set	.LANCHOR106,. + 0
+	.set	.LANCHOR107,. + 0
 	.type	req_gc, %object
 	.size	req_gc, 8
 req_gc:
 	.zero	8
 	.section	.bss.req_gc_dst,"aw",@nobits
 	.align	3
-	.set	.LANCHOR178,. + 0
+	.set	.LANCHOR181,. + 0
 	.type	req_gc_dst, %object
 	.size	req_gc_dst, 8
 req_gc_dst:
 	.zero	8
 	.section	.bss.req_prgm,"aw",@nobits
 	.align	3
-	.set	.LANCHOR179,. + 0
+	.set	.LANCHOR182,. + 0
 	.type	req_prgm, %object
 	.size	req_prgm, 8
 req_prgm:
 	.zero	8
 	.section	.bss.req_read,"aw",@nobits
 	.align	3
-	.set	.LANCHOR177,. + 0
+	.set	.LANCHOR180,. + 0
 	.type	req_read, %object
 	.size	req_read, 8
 req_read:
 	.zero	8
 	.section	.bss.req_sys,"aw",@nobits
 	.align	3
-	.set	.LANCHOR199,. + 0
+	.set	.LANCHOR202,. + 0
 	.type	req_sys, %object
 	.size	req_sys, 56
 req_sys:
@@ -19880,11 +21270,17 @@ slcPageToMlcPageTbl:
 	.size	FtlMallocOffset, 4
 FtlMallocOffset:
 	.word	64
+	.section	.data.LastWritenPbaAddr,"aw",@progbits
+	.align	2
+	.type	LastWritenPbaAddr, %object
+	.size	LastWritenPbaAddr, 4
+LastWritenPbaAddr:
+	.word	-1
 	.section	.data.NandFlashParaTbl,"aw",@progbits
 	.align	3
-	.set	.LANCHOR139,. + 0
+	.set	.LANCHOR142,. + 0
 	.type	NandFlashParaTbl, %object
-	.size	NandFlashParaTbl, 2368
+	.size	NandFlashParaTbl, 2464
 NandFlashParaTbl:
 	.byte	6
 	.byte	44
@@ -20383,8 +21779,86 @@ NandFlashParaTbl:
 	.byte	5
 	.byte	44
 	.byte	-124
-	.byte	68
-	.byte	50
+	.byte	68
+	.byte	50
+	.byte	-86
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	32
+	.hword	512
+	.byte	2
+	.byte	1
+	.hword	2184
+	.hword	1479
+	.byte	5
+	.byte	19
+	.byte	60
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.zero	4
+	.byte	5
+	.byte	44
+	.byte	100
+	.byte	68
+	.byte	50
+	.byte	-91
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	32
+	.hword	512
+	.byte	2
+	.byte	1
+	.hword	1048
+	.hword	1479
+	.byte	5
+	.byte	19
+	.byte	60
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.zero	4
+	.byte	5
+	.byte	44
+	.byte	100
+	.byte	100
+	.byte	60
+	.byte	-91
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	32
+	.hword	512
+	.byte	2
+	.byte	1
+	.hword	1044
+	.hword	479
+	.byte	3
+	.byte	17
+	.byte	40
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.zero	4
+	.byte	5
+	.byte	44
+	.byte	-124
+	.byte	-60
+	.byte	52
 	.byte	-86
 	.byte	0
 	.byte	4
@@ -20392,9 +21866,9 @@ NandFlashParaTbl:
 	.byte	32
 	.hword	512
 	.byte	2
-	.byte	2
-	.hword	1096
-	.hword	1503
+	.byte	1
+	.hword	2184
+	.hword	1479
 	.byte	5
 	.byte	19
 	.byte	60
@@ -20408,10 +21882,10 @@ NandFlashParaTbl:
 	.zero	4
 	.byte	5
 	.byte	44
-	.byte	100
+	.byte	-124
 	.byte	68
-	.byte	50
-	.byte	-91
+	.byte	52
+	.byte	-92
 	.byte	0
 	.byte	4
 	.byte	1
@@ -20419,8 +21893,8 @@ NandFlashParaTbl:
 	.hword	512
 	.byte	2
 	.byte	1
-	.hword	1048
-	.hword	1503
+	.hword	2184
+	.hword	1479
 	.byte	5
 	.byte	19
 	.byte	60
@@ -20432,32 +21906,6 @@ NandFlashParaTbl:
 	.byte	1
 	.byte	0
 	.zero	4
-	.byte	5
-	.byte	44
-	.byte	100
-	.byte	100
-	.byte	60
-	.byte	-91
-	.byte	0
-	.byte	4
-	.byte	1
-	.byte	32
-	.hword	512
-	.byte	2
-	.byte	1
-	.hword	1044
-	.hword	479
-	.byte	3
-	.byte	17
-	.byte	40
-	.byte	32
-	.byte	1
-	.byte	0
-	.byte	1
-	.byte	0
-	.byte	0
-	.byte	0
-	.zero	4
 	.byte	6
 	.byte	-83
 	.byte	-34
@@ -20978,6 +22426,32 @@ NandFlashParaTbl:
 	.byte	0
 	.byte	0
 	.zero	4
+	.byte	5
+	.byte	-119
+	.byte	100
+	.byte	100
+	.byte	60
+	.byte	-95
+	.byte	0
+	.byte	7
+	.byte	1
+	.byte	32
+	.hword	512
+	.byte	2
+	.byte	1
+	.hword	1024
+	.hword	455
+	.byte	3
+	.byte	17
+	.byte	40
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.zero	4
 	.byte	6
 	.byte	-104
 	.byte	-41
@@ -21812,7 +23286,7 @@ NandFlashParaTbl:
 	.zero	4
 	.section	.data.NandOptPara,"aw",@progbits
 	.align	3
-	.set	.LANCHOR140,. + 0
+	.set	.LANCHOR143,. + 0
 	.type	NandOptPara, %object
 	.size	NandOptPara, 128
 NandOptPara:
@@ -22130,21 +23604,21 @@ ToshibaRefValue:
 	.byte	112
 	.section	.data.ftl_gc_temp_block_bops_scan_page_addr,"aw",@progbits
 	.align	1
-	.set	.LANCHOR233,. + 0
+	.set	.LANCHOR226,. + 0
 	.type	ftl_gc_temp_block_bops_scan_page_addr, %object
 	.size	ftl_gc_temp_block_bops_scan_page_addr, 2
 ftl_gc_temp_block_bops_scan_page_addr:
 	.hword	-1
 	.section	.data.gFtlInitStatus,"aw",@progbits
 	.align	2
-	.set	.LANCHOR223,. + 0
+	.set	.LANCHOR231,. + 0
 	.type	gFtlInitStatus, %object
 	.size	gFtlInitStatus, 4
 gFtlInitStatus:
 	.word	-1
 	.section	.data.gNandParaInfo,"aw",@progbits
 	.align	3
-	.set	.LANCHOR30,. + 0
+	.set	.LANCHOR31,. + 0
 	.type	gNandParaInfo, %object
 	.size	gNandParaInfo, 32
 gNandParaInfo:
@@ -22172,7 +23646,7 @@ gNandParaInfo:
 	.zero	4
 	.section	.data.gSlcNandParaInfo,"aw",@progbits
 	.align	3
-	.set	.LANCHOR197,. + 0
+	.set	.LANCHOR200,. + 0
 	.type	gSlcNandParaInfo, %object
 	.size	gSlcNandParaInfo, 32
 gSlcNandParaInfo:
@@ -22344,7 +23818,7 @@ random_seed:
 	.hword	28087
 	.section	.data.refValueDefault,"aw",@progbits
 	.align	3
-	.set	.LANCHOR193,. + 0
+	.set	.LANCHOR196,. + 0
 	.type	refValueDefault, %object
 	.size	refValueDefault, 28
 refValueDefault:
@@ -22377,364 +23851,441 @@ refValueDefault:
 	.byte	-32
 	.byte	-37
 	.section	.rodata.FlashDdrTunningRead.str1.1,"aMS",@progbits,1
-.LC10:
+.LC9:
 	.string	"sdr read ok %x ecc=%d\n"
-.LC11:
+.LC10:
 	.string	"sync para %d\n"
-.LC12:
+.LC11:
 	.string	"TOG mode Read error %x %x\n"
 	.section	.rodata.FlashEraseSLc2KBlocks.str1.1,"aMS",@progbits,1
 .LC1:
 	.string	"FlashEraseBlocks pageAddr error %x\n"
 	.section	.rodata.FlashInit.str1.1,"aMS",@progbits,1
-.LC21:
+.LC23:
 	.string	"No.%d FLASH ID:%x %x %x %x %x %x\n"
-.LC22:
+.LC24:
 	.string	"FlashLoadPhyInfo fail %x!!\n"
 	.section	.rodata.FlashProgSlc2KPages.str1.1,"aMS",@progbits,1
-.LC27:
+.LC29:
 	.string	"prog error: = %x\n"
-.LC28:
+.LC30:
 	.string	"prog read error: = %x\n"
-.LC29:
+.LC31:
 	.string	"prog read s error: = %x %x %x\n"
-.LC30:
+.LC32:
 	.string	"prog read d error: = %x %x %x\n"
 	.section	.rodata.FlashReadFacBbtData.str1.1,"aMS",@progbits,1
-.LC58:
+.LC54:
 	.string	"BBT:"
 	.section	.rodata.FlashReadIdbDataRaw.str1.1,"aMS",@progbits,1
-.LC15:
+.LC14:
 	.string	"ECC:%d\n"
 	.section	.rodata.FlashReadPage.str1.1,"aMS",@progbits,1
-.LC13:
+.LC12:
 	.string	"read retry status %x %x %x\n"
 	.section	.rodata.FlashReadPages.str1.1,"aMS",@progbits,1
-.LC26:
+.LC28:
 	.string	"ReadRetry pageadd=%x ecc=%x err=%x\n"
 	.section	.rodata.FlashReadSlc2KPages.str1.1,"aMS",@progbits,1
-.LC23:
+.LC25:
 	.string	"Read pageadd=%x  ecc=%x err=%x\n"
-.LC24:
+.LC26:
 	.string	"data:"
-.LC25:
+.LC27:
 	.string	"spare:"
 	.section	.rodata.FtlBbmMapBadBlock.str1.1,"aMS",@progbits,1
 .LC2:
 	.string	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\n"
 	.section	.rodata.FtlBbmTblFlush.str1.1,"aMS",@progbits,1
-.LC31:
+.LC33:
 	.string	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\n"
-.LC32:
+.LC34:
 	.string	"FtlBbmTblFlush error:%x\n"
-.LC33:
+.LC35:
 	.string	"FtlBbmTblFlush error = %x error count = %d\n"
+	.section	.rodata.FtlCheckVpc.str1.1,"aMS",@progbits,1
+.LC74:
+	.string	"vpc1"
+.LC75:
+	.string	"vpc2"
+.LC76:
+	.string	"FtlCheckVpc2 %x = %x  %x\n"
+.LC77:
+	.string	"free blk vpc error %x = %x  %x\n"
+	.section	.rodata.FtlDumpBlockInfo.str1.1,"aMS",@progbits,1
+.LC46:
+	.string	"...%s enter...\n"
+.LC47:
+	.string	"superBlkID = %x vpc=%x\n"
+.LC48:
+	.string	"flashmode = %x pagenum = %x %x\n"
+.LC49:
+	.string	"id = %x,%x addr= %x,spare= %x %x %x %x data=%x %x\n"
+	.section	.rodata.FtlDumpSysBlock.str1.1,"aMS",@progbits,1
+.LC78:
+	.string	"id = %x,%x addr= %x,spare= %x %x %x %x data = %x\n"
+.LC79:
+	.string	":"
 	.section	.rodata.FtlFreeSysBlkQueueOut.str1.1,"aMS",@progbits,1
-.LC4:
+.LC3:
 	.string	"FtlFreeSysBlkQueueOut free count = %d\n"
-.LC5:
+.LC4:
 	.string	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\n"
 	.section	.rodata.FtlGcFreeTempBlock.str1.1,"aMS",@progbits,1
-.LC50:
+.LC65:
 	.string	"GC des block %x done\n"
 	.section	.rodata.FtlGcScanTempBlk.str1.1,"aMS",@progbits,1
-.LC49:
+.LC53:
 	.string	"FtlGcScanTempBlkError ID %x %x!!!!!!!\n"
 	.section	.rodata.FtlInit.str1.1,"aMS",@progbits,1
-.LC51:
-	.string	"FTL version: 5.0.48 20180408"
-.LC52:
+.LC67:
+	.string	"FTL version: 5.0.49 20180810"
+.LC68:
 	.string	"...%s: no bad block mapping table, format device\n"
-.LC53:
+.LC69:
 	.string	"...%s FtlSysBlkInit error ,format device!\n"
 	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",@progbits,1
-.LC43:
+.LC44:
 	.string	"no ect"
-	.section	.rodata.FtlMapTblRecovery.str1.1,"aMS",@progbits,1
-.LC45:
-	.string	"page map lost %x %x %x %x\n"
 	.section	.rodata.FtlMapWritePage.str1.1,"aMS",@progbits,1
-.LC38:
+.LC41:
 	.string	"FtlMapWritePage error = %x\n"
-.LC39:
+.LC42:
 	.string	"FtlMapWritePage error = %x error count = %d\n"
 	.section	.rodata.FtlProgPages.str1.1,"aMS",@progbits,1
-.LC41:
+.LC58:
 	.string	"Ftlwrite decrement_vpc_count %x = %d\n"
 	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",@progbits,1
-.LC46:
+.LC62:
 	.string	"RSB refresh addr %x\n"
-.LC47:
+.LC63:
 	.string	"spuer block %x vpn is 0\n "
-.LC48:
+.LC64:
 	.string	"g_recovery_ppa %x ver %x\n "
+	.section	.rodata.FtlScanAllBlock.str1.1,"aMS",@progbits,1
+.LC50:
+	.string	"blk = %x vpc=%x mode = %x\n"
+.LC51:
+	.string	"mlc id = %x,%x addr= %x,spare= %x %x %x %x data=%x %x\n"
+.LC52:
+	.string	"slc id = %x,%x addr= %x,spare= %x %x %x %x data=%x %x\n"
 	.section	.rodata.FtlVendorPartRead.str1.1,"aMS",@progbits,1
-.LC42:
+.LC43:
 	.string	"FtlVendorPartRead refresh = %x phyAddr = %x\n"
 	.section	.rodata.FtlVpcTblFlush.str1.1,"aMS",@progbits,1
-.LC35:
+.LC38:
 	.string	"FtlVpcTblFlush error = %x error count = %d\n"
+	.section	.rodata.FtlWrite.str1.1,"aMS",@progbits,1
+.LC73:
+	.string	"FtlWrite: lpa error:%x %x\n"
 	.section	.rodata.Ftl_load_ext_data.str1.1,"aMS",@progbits,1
-.LC44:
+.LC45:
 	.string	"slc mode"
+	.section	.rodata.Ftlscanalldata.str1.1,"aMS",@progbits,1
+.LC59:
+	.string	"Ftlscanalldata = %x\n"
+.LC60:
+	.string	"scan lpa = %x ppa= %x\n"
+.LC61:
+	.string	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\n"
 	.section	.rodata.HynixGetReadRetryDefault.str1.1,"aMS",@progbits,1
-.LC19:
+.LC21:
 	.string	"otp error! %d"
-.LC20:
+.LC22:
 	.string	"rr"
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",@progbits,1
-.LC6:
+.LC5:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
-.LC7:
+.LC6:
 	.string	"!!!!! FTL sys Error !!!!!"
-.LC8:
+.LC7:
 	.string	"%s\n"
 	.section	.rodata.MicronReadRetrial.str1.1,"aMS",@progbits,1
-.LC14:
+.LC13:
 	.string	"micron RR %d row=%x,count %d,status=%d\n"
+	.section	.rodata.__func__.10009,"a",@progbits
+	.align	3
+	.set	.LANCHOR248,. + 0
+	.type	__func__.10009, %object
+	.size	__func__.10009, 12
+__func__.10009:
+	.string	"FtlCheckVpc"
 	.section	.rodata.__func__.10041,"a",@progbits
 	.align	3
-	.set	.LANCHOR214,. + 0
+	.set	.LANCHOR224,. + 0
 	.type	__func__.10041, %object
-	.size	__func__.10041, 16
+	.size	__func__.10041, 17
 __func__.10041:
+	.string	"FtlDumpBlockInfo"
+	.section	.rodata.__func__.10060,"a",@progbits
+	.align	3
+	.set	.LANCHOR225,. + 0
+	.type	__func__.10060, %object
+	.size	__func__.10060, 16
+__func__.10060:
+	.string	"FtlScanAllBlock"
+	.section	.rodata.__func__.10165,"a",@progbits
+	.align	3
+	.set	.LANCHOR233,. + 0
+	.type	__func__.10165, %object
+	.size	__func__.10165, 16
+__func__.10165:
 	.string	"FtlReUsePrevPpa"
-	.section	.rodata.__func__.10074,"a",@progbits
+	.section	.rodata.__func__.10198,"a",@progbits
 	.align	3
-	.set	.LANCHOR228,. + 0
-	.type	__func__.10074, %object
-	.size	__func__.10074, 22
-__func__.10074:
+	.set	.LANCHOR234,. + 0
+	.type	__func__.10198, %object
+	.size	__func__.10198, 22
+__func__.10198:
 	.string	"FtlRecoverySuperblock"
-	.section	.rodata.__func__.10128,"a",@progbits
+	.section	.rodata.__func__.10252,"a",@progbits
 	.align	3
-	.set	.LANCHOR101,. + 0
-	.type	__func__.10128, %object
-	.size	__func__.10128, 16
-__func__.10128:
+	.set	.LANCHOR102,. + 0
+	.type	__func__.10252, %object
+	.size	__func__.10252, 16
+__func__.10252:
 	.string	"make_superblock"
-	.section	.rodata.__func__.10148,"a",@progbits
+	.section	.rodata.__func__.10272,"a",@progbits
 	.align	3
-	.set	.LANCHOR137,. + 0
-	.type	__func__.10148, %object
-	.size	__func__.10148, 18
-__func__.10148:
+	.set	.LANCHOR140,. + 0
+	.type	__func__.10272, %object
+	.size	__func__.10272, 18
+__func__.10272:
 	.string	"SupperBlkListInit"
-	.section	.rodata.__func__.10225,"a",@progbits
+	.section	.rodata.__func__.10349,"a",@progbits
 	.align	3
-	.set	.LANCHOR200,. + 0
-	.type	__func__.10225, %object
-	.size	__func__.10225, 25
-__func__.10225:
+	.set	.LANCHOR203,. + 0
+	.type	__func__.10349, %object
+	.size	__func__.10349, 25
+__func__.10349:
 	.string	"allocate_data_superblock"
-	.section	.rodata.__func__.10239,"a",@progbits
+	.section	.rodata.__func__.10363,"a",@progbits
 	.align	3
 	.set	.LANCHOR219,. + 0
-	.type	__func__.10239, %object
-	.size	__func__.10239, 29
-__func__.10239:
+	.type	__func__.10363, %object
+	.size	__func__.10363, 29
+__func__.10363:
 	.string	"allocate_new_data_superblock"
-	.section	.rodata.__func__.10245,"a",@progbits
+	.section	.rodata.__func__.10369,"a",@progbits
 	.align	3
-	.set	.LANCHOR205,. + 0
-	.type	__func__.10245, %object
-	.size	__func__.10245, 19
-__func__.10245:
+	.set	.LANCHOR208,. + 0
+	.type	__func__.10369, %object
+	.size	__func__.10369, 19
+__func__.10369:
 	.string	"get_new_active_ppa"
-	.section	.rodata.__func__.10256,"a",@progbits
+	.section	.rodata.__func__.10380,"a",@progbits
 	.align	3
-	.set	.LANCHOR203,. + 0
-	.type	__func__.10256, %object
-	.size	__func__.10256, 16
-__func__.10256:
+	.set	.LANCHOR206,. + 0
+	.type	__func__.10380, %object
+	.size	__func__.10380, 16
+__func__.10380:
 	.string	"update_vpc_list"
-	.section	.rodata.__func__.10261,"a",@progbits
+	.section	.rodata.__func__.10385,"a",@progbits
 	.align	3
-	.set	.LANCHOR204,. + 0
-	.type	__func__.10261, %object
-	.size	__func__.10261, 20
-__func__.10261:
+	.set	.LANCHOR207,. + 0
+	.type	__func__.10385, %object
+	.size	__func__.10385, 20
+__func__.10385:
 	.string	"decrement_vpc_count"
-	.section	.rodata.__func__.10329,"a",@progbits
+	.section	.rodata.__func__.10453,"a",@progbits
 	.align	3
-	.set	.LANCHOR234,. + 0
-	.type	__func__.10329, %object
-	.size	__func__.10329, 19
-__func__.10329:
+	.set	.LANCHOR239,. + 0
+	.type	__func__.10453, %object
+	.size	__func__.10453, 19
+__func__.10453:
 	.string	"FtlGcFreeTempBlock"
-	.section	.rodata.__func__.10423,"a",@progbits
+	.section	.rodata.__func__.10547,"a",@progbits
 	.align	3
-	.set	.LANCHOR238,. + 0
-	.type	__func__.10423, %object
-	.size	__func__.10423, 23
-__func__.10423:
+	.set	.LANCHOR243,. + 0
+	.type	__func__.10547, %object
+	.size	__func__.10547, 23
+__func__.10547:
 	.string	"rk_ftl_garbage_collect"
-	.section	.rodata.__func__.9361,"a",@progbits
+	.section	.rodata.__func__.9390,"a",@progbits
 	.align	3
-	.set	.LANCHOR240,. + 0
-	.type	__func__.9361, %object
-	.size	__func__.9361, 8
-__func__.9361:
+	.set	.LANCHOR245,. + 0
+	.type	__func__.9390, %object
+	.size	__func__.9390, 8
+__func__.9390:
 	.string	"FtlInit"
-	.section	.rodata.__func__.9421,"a",@progbits
+	.section	.rodata.__func__.9450,"a",@progbits
 	.align	3
-	.set	.LANCHOR220,. + 0
-	.type	__func__.9421, %object
-	.size	__func__.9421, 13
-__func__.9421:
+	.set	.LANCHOR229,. + 0
+	.type	__func__.9450, %object
+	.size	__func__.9450, 13
+__func__.9450:
 	.string	"FtlProgPages"
-	.section	.rodata.__func__.9447,"a",@progbits
+	.section	.rodata.__func__.9476,"a",@progbits
 	.align	3
-	.set	.LANCHOR242,. + 0
-	.type	__func__.9447, %object
-	.size	__func__.9447, 10
-__func__.9447:
-	.string	"ftl_write"
-	.section	.rodata.__func__.9510,"a",@progbits
+	.set	.LANCHOR247,. + 0
+	.type	__func__.9476, %object
+	.size	__func__.9476, 9
+__func__.9476:
+	.string	"FtlWrite"
+	.section	.rodata.__func__.9539,"a",@progbits
 	.align	3
-	.set	.LANCHOR121,. + 0
-	.type	__func__.9510, %object
-	.size	__func__.9510, 14
-__func__.9510:
+	.set	.LANCHOR124,. + 0
+	.type	__func__.9539, %object
+	.size	__func__.9539, 14
+__func__.9539:
 	.string	"FtlBbt2Bitmap"
-	.section	.rodata.__func__.9556,"a",@progbits
+	.section	.rodata.__func__.9585,"a",@progbits
 	.align	3
-	.set	.LANCHOR208,. + 0
-	.type	__func__.9556, %object
-	.size	__func__.9556, 11
-__func__.9556:
+	.set	.LANCHOR211,. + 0
+	.type	__func__.9585, %object
+	.size	__func__.9585, 11
+__func__.9585:
 	.string	"FtlLoadBbt"
-	.section	.rodata.__func__.9658,"a",@progbits
+	.section	.rodata.__func__.9678,"a",@progbits
 	.align	3
-	.set	.LANCHOR89,. + 0
-	.type	__func__.9658, %object
-	.size	__func__.9658, 17
-__func__.9658:
+	.set	.LANCHOR90,. + 0
+	.type	__func__.9678, %object
+	.size	__func__.9678, 17
+__func__.9678:
 	.string	"INSERT_FREE_LIST"
-	.section	.rodata.__func__.9662,"a",@progbits
+	.section	.rodata.__func__.9682,"a",@progbits
 	.align	3
-	.set	.LANCHOR86,. + 0
-	.type	__func__.9662, %object
-	.size	__func__.9662, 17
-__func__.9662:
+	.set	.LANCHOR87,. + 0
+	.type	__func__.9682, %object
+	.size	__func__.9682, 17
+__func__.9682:
 	.string	"INSERT_DATA_LIST"
-	.section	.rodata.__func__.9692,"a",@progbits
+	.section	.rodata.__func__.9719,"a",@progbits
 	.align	3
-	.set	.LANCHOR90,. + 0
-	.type	__func__.9692, %object
-	.size	__func__.9692, 17
-__func__.9692:
+	.set	.LANCHOR91,. + 0
+	.type	__func__.9719, %object
+	.size	__func__.9719, 17
+__func__.9719:
 	.string	"List_remove_node"
-	.section	.rodata.__func__.9722,"a",@progbits
+	.section	.rodata.__func__.9749,"a",@progbits
 	.align	3
-	.set	.LANCHOR94,. + 0
-	.type	__func__.9722, %object
-	.size	__func__.9722, 22
-__func__.9722:
+	.set	.LANCHOR95,. + 0
+	.type	__func__.9749, %object
+	.size	__func__.9749, 22
+__func__.9749:
 	.string	"List_update_data_list"
-	.section	.rodata.__func__.9729,"a",@progbits
+	.section	.rodata.__func__.9756,"a",@progbits
 	.align	3
-	.set	.LANCHOR213,. + 0
-	.type	__func__.9729, %object
-	.size	__func__.9729, 20
-__func__.9729:
+	.set	.LANCHOR228,. + 0
+	.type	__func__.9756, %object
+	.size	__func__.9756, 20
+__func__.9756:
 	.string	"ftl_load_l2p_region"
-	.section	.rodata.__func__.9760,"a",@progbits
+	.section	.rodata.__func__.9787,"a",@progbits
 	.align	3
-	.set	.LANCHOR95,. + 0
-	.type	__func__.9760, %object
-	.size	__func__.9760, 26
-__func__.9760:
+	.set	.LANCHOR96,. + 0
+	.type	__func__.9787, %object
+	.size	__func__.9787, 26
+__func__.9787:
 	.string	"ftl_map_blk_alloc_new_blk"
-	.section	.rodata.__func__.9774,"a",@progbits
+	.section	.rodata.__func__.9801,"a",@progbits
 	.align	3
-	.set	.LANCHOR209,. + 0
-	.type	__func__.9774, %object
-	.size	__func__.9774, 15
-__func__.9774:
+	.set	.LANCHOR212,. + 0
+	.type	__func__.9801, %object
+	.size	__func__.9801, 15
+__func__.9801:
 	.string	"ftl_map_blk_gc"
-	.section	.rodata.__func__.9787,"a",@progbits
+	.section	.rodata.__func__.9814,"a",@progbits
 	.align	3
-	.set	.LANCHOR210,. + 0
-	.type	__func__.9787, %object
-	.size	__func__.9787, 31
-__func__.9787:
+	.set	.LANCHOR213,. + 0
+	.type	__func__.9814, %object
+	.size	__func__.9814, 31
+__func__.9814:
 	.string	"Ftl_write_map_blk_to_last_page"
-	.section	.rodata.__func__.9800,"a",@progbits
+	.section	.rodata.__func__.9827,"a",@progbits
 	.align	3
-	.set	.LANCHOR211,. + 0
-	.type	__func__.9800, %object
-	.size	__func__.9800, 16
-__func__.9800:
+	.set	.LANCHOR214,. + 0
+	.type	__func__.9827, %object
+	.size	__func__.9827, 16
+__func__.9827:
 	.string	"FtlMapWritePage"
-	.section	.rodata.__func__.9820,"a",@progbits
+	.section	.rodata.__func__.9847,"a",@progbits
 	.align	3
-	.set	.LANCHOR98,. + 0
-	.type	__func__.9820, %object
-	.size	__func__.9820, 22
-__func__.9820:
+	.set	.LANCHOR99,. + 0
+	.type	__func__.9847, %object
+	.size	__func__.9847, 22
+__func__.9847:
 	.string	"select_l2p_ram_region"
-	.section	.rodata.__func__.9836,"a",@progbits
+	.section	.rodata.__func__.9863,"a",@progbits
 	.align	3
-	.set	.LANCHOR212,. + 0
-	.type	__func__.9836, %object
-	.size	__func__.9836, 9
-__func__.9836:
+	.set	.LANCHOR227,. + 0
+	.type	__func__.9863, %object
+	.size	__func__.9863, 9
+__func__.9863:
 	.string	"log2phys"
-	.section	.rodata.__func__.9898,"a",@progbits
+	.section	.rodata.__func__.9925,"a",@progbits
 	.align	3
-	.set	.LANCHOR207,. + 0
-	.type	__func__.9898, %object
-	.size	__func__.9898, 15
-__func__.9898:
+	.set	.LANCHOR210,. + 0
+	.type	__func__.9925, %object
+	.size	__func__.9925, 15
+__func__.9925:
 	.string	"FtlVpcTblFlush"
-	.section	.rodata.__func__.9917,"a",@progbits
+	.section	.rodata.__func__.9944,"a",@progbits
 	.align	3
-	.set	.LANCHOR224,. + 0
-	.type	__func__.9917, %object
-	.size	__func__.9917, 14
-__func__.9917:
+	.set	.LANCHOR220,. + 0
+	.type	__func__.9944, %object
+	.size	__func__.9944, 14
+__func__.9944:
 	.string	"FtlScanSysBlk"
-	.section	.rodata.__func__.9971,"a",@progbits
+	.section	.rodata.__func__.9998,"a",@progbits
 	.align	3
-	.set	.LANCHOR225,. + 0
-	.type	__func__.9971, %object
-	.size	__func__.9971, 15
-__func__.9971:
+	.set	.LANCHOR221,. + 0
+	.type	__func__.9998, %object
+	.size	__func__.9998, 15
+__func__.9998:
 	.string	"FtlLoadSysInfo"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",@progbits,1
-.LC34:
+.LC36:
 	.string	"decrement_vpc_count %x = %d\n"
+.LC37:
+	.string	"decrement_vpc_count %x = %d in free list\n"
+	.section	.rodata.dump_map_info.str1.1,"aMS",@progbits,1
+.LC80:
+	.string	"phyBlk = %x,addr= %x,spare= %x %x %x %x data=%x %x\n"
+.LC81:
+	.string	"Mblk:"
+.LC82:
+	.string	"L2P:"
+.LC83:
+	.string	"L2PC:"
 	.section	.rodata.ftl_fix_nand_power_lost_error.str1.1,"aMS",@progbits,1
-.LC55:
+.LC71:
 	.string	"fix power lost blk = %x vpc=%x\n"
-.LC56:
+.LC72:
 	.string	"erase power lost blk = %x vpc=%x\n"
 	.section	.rodata.ftl_map_blk_alloc_new_blk.str1.1,"aMS",@progbits,1
-.LC9:
+.LC8:
 	.string	"FtlFreeSysBlkQueueOut = %x, free count = %d\n"
 	.section	.rodata.ftl_map_blk_gc.str1.1,"aMS",@progbits,1
-.LC36:
+.LC39:
 	.string	"ftl_map_blk_gc blk info: %x %x %x\n"
-.LC37:
+.LC40:
 	.string	"page map lost: %x %x\n"
-	.section	.rodata.ftl_write.str1.1,"aMS",@progbits,1
-.LC57:
-	.string	"FtlWrite: lpa error:%x %x\n"
+	.section	.rodata.idb_write_data.str1.1,"aMS",@progbits,1
+.LC15:
+	.string	"1 write_idblock fix data %x %x %x\n"
+.LC16:
+	.string	"write_idblock fail! %x %x %x %x\n"
+.LC17:
+	.string	"write_idblock fail! %x\n"
 	.section	.rodata.log2phys.str1.1,"aMS",@progbits,1
-.LC40:
+.LC55:
 	.string	"load_l2p_region refresh = %x phyAddr = %x\n"
-	.section	.rodata.remove_from_free_sys_Queue.str1.1,"aMS",@progbits,1
-.LC3:
-	.string	"remove_from_free_sys_Queue %x\n"
+.LC56:
+	.string	"region_id = %x phyAddr = %x\n"
+.LC57:
+	.string	"map_ppn:"
+	.section	.rodata.rk_ftl_garbage_collect.str1.1,"aMS",@progbits,1
+.LC66:
+	.string	"g_gc_superblock_free %x %x %x %x %x\n"
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",@progbits,1
-.LC54:
+.LC70:
 	.string	"FtlInit %x\n"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
-.LC16:
+.LC18:
 	.string	"%s 0x%x:"
-.LC17:
+.LC19:
 	.string	"%x "
-.LC18:
+.LC20:
 	.string	""
 	.hidden	free

commit 8b8d0fb0cb94a76abebe0b7999fad535e7be9423
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Aug 13 16:49:46 2018 +0800

    rockchip: dts: rk3288: remove the vmmc-supply
    
    There is no need to initialize the vmmc since it is
    initialized by the pre-loader. And the power initialization
    framework is not ready when initialize the mmc device, this
    will make the mmc unusable.
    
    Change-Id: I97775f99b2c6154de3c50acc11587986712ac3dd
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/dts/rk3288-evb.dtsi b/arch/arm/dts/rk3288-evb.dtsi
index e03cddbddb..00d3b1d490 100644
--- a/arch/arm/dts/rk3288-evb.dtsi
+++ b/arch/arm/dts/rk3288-evb.dtsi
@@ -191,7 +191,6 @@
 	num-slots = <1>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_pwr>, <&emmc_bus8>;
-	vmmc-supply = <&vcc_io>;
 	vqmmc-supply = <&vcc_flash>;
 	status = "okay";
 };

commit dc3aa58f81cdda1f07bf4d95f447766029ac2c6e
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Aug 7 11:20:10 2018 +0800

    android: add verify state to cmdline
    
    When we use avb, we will add the verify result to cmdline.
    The format is "androidboot.verifiedbootstate=green, yellow
    orange, or red".
    
    Change-Id: I0059fbd7e73225f580bb5bf0b5e4b04faeb22f45
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
old mode 100755
new mode 100644
index 4c9a694713..5f23df7169
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -30,6 +30,7 @@
 #define ANDROID_ARG_SLOT_SUFFIX "androidboot.slot_suffix="
 #define ANDROID_ARG_ROOT "root="
 #define ANDROID_ARG_SERIALNO "androidboot.serialno="
+#define ANDROID_VERIFY_STATE "androidboot.verifiedbootstate="
 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
 #define ANDROID_ARG_FDT_FILENAME "rk-kernel.dtb"
 #define BOOTLOADER_MESSAGE_OFFSET_IN_MISC	(16 * 1024)
@@ -407,6 +408,7 @@ static AvbSlotVerifyResult android_slot_verify(char *boot_partname,
 	AvbSlotVerifyResult verify_result;
 	AvbABData ab_data, ab_data_orig;
 	size_t slot_index_to_boot = 0;
+	char verify_state[38] = {0};
 
 	requested_partitions[0] = boot_partname;
 	ops = avb_ops_user_new();
@@ -445,22 +447,52 @@ static AvbSlotVerifyResult android_slot_verify(char *boot_partname,
 			AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE,
 			&slot_data[0]);
 
-	if (verify_result != AVB_SLOT_VERIFY_RESULT_OK && !(unlocked & LOCK_MASK)) {
-		slot_set_unbootable(&ab_data.slots[slot_index_to_boot]);
-		goto out;
+	strcat(verify_state, ANDROID_VERIFY_STATE);
+	switch (verify_result) {
+	case AVB_SLOT_VERIFY_RESULT_OK:
+		if (unlocked & LOCK_MASK)
+			strcat(verify_state, "orange");
+		else
+			strcat(verify_state, "green");
+		break;
+	case AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED:
+		if (unlocked & LOCK_MASK)
+			strcat(verify_state, "orange");
+		else
+			strcat(verify_state, "yellow");
+		break;
+	case AVB_SLOT_VERIFY_RESULT_ERROR_OOM:
+	case AVB_SLOT_VERIFY_RESULT_ERROR_IO:
+	case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA:
+	case AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION:
+	case AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION:
+	case AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX:
+	default:
+		if (unlocked & LOCK_MASK)
+			strcat(verify_state, "orange");
+		else
+			strcat(verify_state, "red");
+		break;
 	}
 
-	memcpy((uint8_t*)load_address,
-	       slot_data[0]->loaded_partitions->data,
-	       slot_data[0]->loaded_partitions->data_size);
-	env_set("bootargs", slot_data[0]->cmdline);
+	if (verify_result == AVB_SLOT_VERIFY_RESULT_OK ||
+	    verify_result == AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED ||
+	    (unlocked & LOCK_MASK)) {
+		memcpy((uint8_t *)load_address,
+		       slot_data[0]->loaded_partitions->data,
+		       slot_data[0]->loaded_partitions->data_size);
+		env_set("bootargs", slot_data[0]->cmdline);
 
-	/* ... and decrement tries remaining, if applicable. */
-	if (!ab_data.slots[slot_index_to_boot].successful_boot &&
-		ab_data.slots[slot_index_to_boot].tries_remaining > 0) {
-		ab_data.slots[slot_index_to_boot].tries_remaining -= 1;
+		/* ... and decrement tries remaining, if applicable. */
+		if (!ab_data.slots[slot_index_to_boot].successful_boot &&
+		    ab_data.slots[slot_index_to_boot].tries_remaining > 0) {
+			ab_data.slots[slot_index_to_boot].tries_remaining -= 1;
+		}
+	} else {
+		slot_set_unbootable(&ab_data.slots[slot_index_to_boot]);
 	}
-out:
+
+	env_update("bootargs", verify_state);
 	if (save_metadata_if_changed(ops->ab_ops, &ab_data, &ab_data_orig)) {
 		printf("Can not save metadata\n");
 		verify_result = AVB_SLOT_VERIFY_RESULT_ERROR_IO;

commit 0d0c32481d923c7b54cf109b518348a94f67d906
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Thu Aug 9 14:37:48 2018 +0800

    usb: gadget: rockusb: add vendor storage r/w cmd support
    
    At present the vendor storage partition is small than 64K in the
    design, so vendor storage r/w commands do not take multi-packet
    into consideration, if it is needed, the codes should do a little
    change in future. Besides, the RPMB r/w support need to be added
    when its APIs get ready.
    
    Change-Id: I621604c99b44c69eb3aff3e01b28a18f35303040
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index ee31daa884..cbf2f743f3 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -8,6 +8,11 @@
 #include <asm/io.h>
 #include <asm/arch/boot_mode.h>
 #include <asm/arch/chip_info.h>
+
+#ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
+#include <asm/arch/vendor.h>
+#endif
+
 #include <rockusb.h>
 
 #define ROCKUSB_INTERFACE_CLASS	0xff
@@ -274,6 +279,157 @@ out:
 	return rc;
 }
 
+#ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
+static int rkusb_do_vs_write(struct fsg_common *common)
+{
+	struct fsg_lun		*curlun = &common->luns[common->lun];
+	u16			type = get_unaligned_be16(&common->cmnd[4]);
+	struct vendor_item	*vhead;
+	struct fsg_buffhd	*bh;
+	void			*data;
+	int			rc;
+
+	if (common->data_size >= (u32)65536) {
+		/* _MUST_ small than 64K */
+		curlun->sense_data = SS_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE;
+		return -EINVAL;
+	}
+
+	common->residue         = common->data_size;
+	common->usb_amount_left = common->data_size;
+
+	/* Carry out the file writes */
+	if (unlikely(common->data_size == 0))
+		return -EIO; /* No data to write */
+
+	for (;;) {
+		if (common->usb_amount_left > 0) {
+			/* Wait for the next buffer to become available */
+			bh = common->next_buffhd_to_fill;
+			if (bh->state != BUF_STATE_EMPTY)
+				goto wait;
+
+			/* Request the next buffer */
+			common->usb_amount_left      -= common->data_size;
+			bh->outreq->length	     = common->data_size;
+			bh->bulk_out_intended_length = common->data_size;
+			bh->outreq->short_not_ok     = 1;
+
+			START_TRANSFER_OR(common, bulk_out, bh->outreq,
+					  &bh->outreq_busy, &bh->state)
+				/*
+				 * Don't know what to do if
+				 * common->fsg is NULL
+				 */
+				return -EIO;
+			common->next_buffhd_to_fill = bh->next;
+		} else {
+			/* Then, wait for the data to become available */
+			bh = common->next_buffhd_to_drain;
+			if (bh->state != BUF_STATE_FULL)
+				goto wait;
+
+			common->next_buffhd_to_drain = bh->next;
+			bh->state = BUF_STATE_EMPTY;
+
+			/* Did something go wrong with the transfer? */
+			if (bh->outreq->status != 0) {
+				curlun->sense_data = SS_COMMUNICATION_FAILURE;
+				curlun->info_valid = 1;
+				break;
+			}
+
+			/* Perform the write */
+			vhead = (struct vendor_item *)bh->buf;
+			data  = bh->buf + sizeof(struct vendor_item);
+
+			if (!type) {
+				/* Vendor storage */
+				rc = vendor_storage_write(vhead->id,
+							  (char __user *)data,
+							  vhead->size);
+				if (rc < 0)
+					return -EIO;
+			} else {
+				/* RPMB */
+			}
+
+			common->residue -= common->data_size;
+
+			/* Did the host decide to stop early? */
+			if (bh->outreq->actual != bh->outreq->length)
+				common->short_packet_received = 1;
+			break; /* Command done */
+		}
+wait:
+		/* Wait for something to happen */
+		rc = sleep_thread(common);
+		if (rc)
+			return rc;
+	}
+
+	return -EIO; /* No default reply */
+}
+
+static int rkusb_do_vs_read(struct fsg_common *common)
+{
+	struct fsg_lun		*curlun = &common->luns[common->lun];
+	u16			type = get_unaligned_be16(&common->cmnd[4]);
+	struct vendor_item	*vhead;
+	struct fsg_buffhd	*bh;
+	void			*data;
+	int			rc;
+
+	if (common->data_size >= (u32)65536) {
+		/* _MUST_ small than 64K */
+		curlun->sense_data = SS_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE;
+		return -EINVAL;
+	}
+
+	common->residue         = common->data_size;
+	common->usb_amount_left = common->data_size;
+
+	/* Carry out the file reads */
+	if (unlikely(common->data_size == 0))
+		return -EIO; /* No default reply */
+
+	for (;;) {
+		/* Wait for the next buffer to become available */
+		bh = common->next_buffhd_to_fill;
+		while (bh->state != BUF_STATE_EMPTY) {
+			rc = sleep_thread(common);
+			if (rc)
+				return rc;
+		}
+
+		memset(bh->buf, 0, FSG_BUFLEN);
+		vhead = (struct vendor_item *)bh->buf;
+		data  = bh->buf + sizeof(struct vendor_item);
+		vhead->id = get_unaligned_be16(&common->cmnd[2]);
+
+		if (!type) {
+			/* Vendor storage */
+			rc = vendor_storage_read(vhead->id,
+						 (char __user *)data,
+						 common->data_size);
+			if (!rc)
+				return -EIO;
+			vhead->size = rc;
+		} else {
+			/* RPMB */
+		}
+
+		common->residue   -= common->data_size;
+		bh->inreq->length = common->data_size;
+		bh->state         = BUF_STATE_FULL;
+
+		break; /* No more left to read */
+	}
+
+	return -EIO; /* No default reply */
+}
+#endif
+
 static int rkusb_do_read_capacity(struct fsg_common *common,
 				    struct fsg_buffhd *bh)
 {
@@ -283,12 +439,17 @@ static int rkusb_do_read_capacity(struct fsg_common *common,
 
 	/*
 	 * bit[0]: Direct LBA, 0: Disabled;
-	 * bit[1]: Vendor Storage API, 0: default;
+	 * bit[1]: Vendor Storage API, 0: Disabed (default);
 	 * bit[2]: First 4M Access, 0: Disabled;
-	 * bit[3:63}: Reserved.
+	 * bit[3]: Read LBA On, 0: Disabed (default);
+	 * bit[4]: New Vendor Storage API, 0: Disabed;
+	 * bit[5:63}: Reserved.
 	 */
 	memset((void *)&buf[0], 0, len);
-	buf[0] = (type == IF_TYPE_MMC) ? (BIT(2) | BIT(0)) : BIT(0);
+	if (type == IF_TYPE_MMC)
+		buf[0] = BIT(0) | BIT(2) | BIT(4);
+	else
+		buf[0] = BIT(0) | BIT(4);
 
 	/* Set data xfer size */
 	common->residue = common->data_size_from_cmnd = len;
@@ -380,6 +541,18 @@ static int rkusb_cmd_process(struct fsg_common *common,
 		rc = RKUSB_RC_FINISHED;
 		break;
 
+#ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
+	case RKUSB_VS_WRITE:
+		*reply = rkusb_do_vs_write(common);
+		rc = RKUSB_RC_FINISHED;
+		break;
+
+	case RKUSB_VS_READ:
+		*reply = rkusb_do_vs_read(common);
+		rc = RKUSB_RC_FINISHED;
+		break;
+#endif
+
 	case RKUSB_READ_CAPACITY:
 		*reply = rkusb_do_read_capacity(common, bh);
 		rc = RKUSB_RC_FINISHED;
diff --git a/include/rockusb.h b/include/rockusb.h
index fefe24c98c..48eb9d6152 100644
--- a/include/rockusb.h
+++ b/include/rockusb.h
@@ -37,6 +37,8 @@ enum rkusb_cmd {
 	RKUSB_SPI_READ_10	= 0x21,
 	RKUSB_SPI_WRITE_10	= 0x22,
 	RKUSB_LBA_ERASE		= 0x25,
+	RKUSB_VS_WRITE		= 0x26,
+	RKUSB_VS_READ		= 0x27,
 	RKUSB_SESSION		= 0x30,
 	RKUSB_READ_CAPACITY	= 0xAA,
 	RKUSB_RESET		= 0xFF,

commit a6a1f5f85880c92c2c95b2ea76429e6aeff2379d
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jul 23 21:50:06 2018 +0800

    mmc: add mmc_can_trim flag
    
    The emmc support several erase mode, we add mmc_can_trim
    flag hear to support trim.
    
    Change-Id: Iaee154eb0ef5edb95783aa3753421afd7c058263
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 2749c24d13..b9a1795f91 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -1730,6 +1730,8 @@ static int mmc_startup(struct mmc *mmc)
 		if (part_completed &&
 		    (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & ENHNCD_SUPPORT))
 			mmc->part_attr = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE];
+		if (ext_csd[EXT_CSD_SEC_FEATURE_SUPPORT] & EXT_CSD_SEC_GB_CL_EN)
+			mmc->esr.mmc_can_trim = 1;
 
 		mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17;
 
diff --git a/include/mmc.h b/include/mmc.h
index 492b0434e7..9fb43b6a8c 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -196,6 +196,7 @@
 #define EXT_CSD_HC_WP_GRP_SIZE		221	/* RO */
 #define EXT_CSD_HC_ERASE_GRP_SIZE	224	/* RO */
 #define EXT_CSD_BOOT_MULT		226	/* RO */
+#define EXT_CSD_SEC_FEATURE_SUPPORT     231     /* RO */
 #define EXT_CSD_BKOPS_SUPPORT		502	/* RO */
 
 /*
@@ -273,6 +274,11 @@
 #define MMC_RSP_BUSY	(1 << 3)		/* card may send busy */
 #define MMC_RSP_OPCODE	(1 << 4)		/* response contains opcode */
 
+#define EXT_CSD_SEC_ER_EN      BIT(0)
+#define EXT_CSD_SEC_BD_BLK_EN  BIT(2)
+#define EXT_CSD_SEC_GB_CL_EN   BIT(4)
+#define EXT_CSD_SEC_SANITIZE   BIT(6)  /* v4.5 only */
+
 #define MMC_RSP_NONE	(0)
 #define MMC_RSP_R1	(MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
 #define MMC_RSP_R1b	(MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE| \
@@ -351,6 +357,10 @@ struct mmc_uclass_priv {
 	struct mmc *mmc;
 };
 
+struct emmc_esr {
+	unsigned int mmc_can_trim;
+};
+
 /**
  * mmc_get_mmc_dev() - get the MMC struct pointer for a device
  *
@@ -557,6 +567,7 @@ struct mmc {
 	uint erase_grp_size;	/* in 512-byte sectors */
 	uint hc_wp_grp_size;	/* in 512-byte sectors */
 	struct sd_ssr	ssr;	/* SD status register */
+	struct emmc_esr esr;    /* emmc status register */
 	u64 capacity;
 	u64 capacity_user;
 	u64 capacity_boot;

commit c9d7fcc61d9d32506eed2385297ee1cbdedb93aa
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Mar 5 22:22:25 2018 +0800

    fastboot: get mmc erase group size for fastboot
    
    Change-Id: I2b3502bffc26c762ff10c55414b18037aed291cd
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/fb_mmc.c b/common/fb_mmc.c
index 4fdafabe53..e083daa0e4 100755
--- a/common/fb_mmc.c
+++ b/common/fb_mmc.c
@@ -459,3 +459,19 @@ void fb_mmc_erase(const char *cmd, char *response)
 	       blks_size * info.blksz, cmd);
 	fastboot_okay("", response);
 }
+
+lbaint_t fb_mmc_get_erase_grp_size(void)
+{
+	lbaint_t grp_size;
+
+	struct mmc *mmc = find_mmc_device(CONFIG_FASTBOOT_FLASH_MMC_DEV);
+
+	if (!mmc) {
+		pr_err("invalid mmc device");
+		return -1;
+	}
+
+	grp_size = mmc->erase_grp_size << 9;
+
+	return  grp_size;
+}
diff --git a/include/fb_mmc.h b/include/fb_mmc.h
index 402ba9b1b4..8df6593686 100644
--- a/include/fb_mmc.h
+++ b/include/fb_mmc.h
@@ -4,6 +4,12 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
+#ifndef _FB_MMC_H_
+#define _FB_MMC_H_
 void fb_mmc_flash_write(const char *cmd, void *download_buffer,
 			unsigned int download_bytes, char *response);
 void fb_mmc_erase(const char *cmd, char *response);
+
+lbaint_t fb_mmc_get_erase_grp_size(void);
+
+#endif

commit 46a8a26905fc68e6683b93c97adae0dd9a4e37ba
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Aug 6 10:27:06 2018 +0800

    fastboot: add RK_AVB_LIBAVB_ENABLE_ATH_UNLOCK config
    
    add RK_AVB_LIBAVB_ENABLE_ATH_UNLOCK config so we can
    disable authenticated unlock function when we debug
    and unlock devices quickly.
    
    Change-Id: Id60be9ae6c17b59e107709a8041e8940743e5725
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 502d936088..99d62a650f 100755
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -1362,7 +1362,7 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 	} else if (strncmp("at-unlock-vboot", cmd + 4, 15) == 0) {
 #ifdef CONFIG_RK_AVB_LIBAVB_USER
 		uint8_t lock_state;
-		char out_is_trusted;
+		bool out_is_trusted = true;
 
 		if (rk_avb_read_lock_state(&lock_state))
 			fastboot_tx_write_str("FAILlock sate read failure");
@@ -1370,12 +1370,14 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 			fastboot_tx_write_str("FAILThe vboot is disable!");
 		} else {
 			lock_state = 1;
+#ifdef CONFIG_RK_AVB_LIBAVB_ENABLE_ATH_UNLOCK
 			if (rk_auth_unlock((void *)CONFIG_FASTBOOT_BUF_ADDR,
 					   &out_is_trusted)) {
 				printf("rk_auth_unlock ops error!\n");
 				fastboot_tx_write_str("FAILrk_auth_unlock ops error!");
 				return;
 			}
+#endif
 			if (out_is_trusted == true) {
 				if (rk_avb_write_lock_state(lock_state))
 					fastboot_tx_write_str("FAILwrite lock state failed");

commit b268d7308c0b7937d9814c19b3f1f095d08ee453
Author: Bian Jin chen <kenjc.bian@rock-chips.com>
Date:   Sat Aug 11 18:40:05 2018 +0800

    configs: rockchip: rk3326: Fdt overlay enabled by default.
    
    Change-Id: I62c829fca08bc06db5584ddd28ccda70afa76a0f
    Signed-off-by: Bian Jin chen <kenjc.bian@rock-chips.com>

diff --git a/configs/rk3326_defconfig b/configs/rk3326_defconfig
index 7c00807384..0465f23cad 100644
--- a/configs/rk3326_defconfig
+++ b/configs/rk3326_defconfig
@@ -31,6 +31,7 @@ CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_FASTBOOT_OEM_UNLOCK=y
+CONFIG_CMD_DTIMG=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
 CONFIG_CMD_LOAD_ANDROID=y
@@ -103,6 +104,7 @@ CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
+CONFIG_OF_LIBFDT_OVERLAY=y
 CONFIG_AVB_LIBAVB=y
 CONFIG_AVB_LIBAVB_AB=y
 CONFIG_AVB_LIBAVB_ATX=y

commit 6b7a2b7d6ae1d8342c483e742e51725062604cf6
Author: Bian Jin chen <kenjc.bian@rock-chips.com>
Date:   Fri Aug 10 14:37:11 2018 +0800

    configs: rockchip: rk3326: Update rk3326_defconfig and enable avb.
    
    Change-Id: I0dcbdb26f3cfdab6c7e009efe92672b92582e019
    Signed-off-by: Bian Jin chen <kenjc.bian@rock-chips.com>

diff --git a/configs/rk3326_defconfig b/configs/rk3326_defconfig
index 956fb9f91d..7c00807384 100644
--- a/configs/rk3326_defconfig
+++ b/configs/rk3326_defconfig
@@ -7,10 +7,11 @@ CONFIG_ROCKCHIP_PX30=y
 CONFIG_ROCKCHIP_RK3326=y
 CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
-CONFIG_SPL_STACK_R_ADDR=0x600000
 CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_TARGET_EVB_PX30=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
 CONFIG_DEFAULT_DEVICE_TREE="rk3326-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
@@ -20,14 +21,16 @@ CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_ANDROID_AVB=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
-CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_OEM_UNLOCK=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
 CONFIG_CMD_LOAD_ANDROID=y
@@ -40,7 +43,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y
 CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y
@@ -76,7 +79,6 @@ CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF160000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
@@ -93,17 +95,19 @@ CONFIG_G_DNL_VENDOR_NUM=0x2207
 CONFIG_G_DNL_PRODUCT_NUM=0x330d
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
-CONFIG_DISPLAY_ROCKCHIP_MIPI=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
-CONFIG_DRM_ROCKCHIP_PANEL=y
-CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
+CONFIG_AVB_LIBAVB=y
+CONFIG_AVB_LIBAVB_AB=y
+CONFIG_AVB_LIBAVB_ATX=y
+CONFIG_AVB_LIBAVB_USER=y
+CONFIG_RK_AVB_LIBAVB_USER=y
 CONFIG_OPTEE_CLIENT=y
 CONFIG_OPTEE_V2=y
 CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y

commit d416f4c092ad8581301eb73e227aae81da9e2907
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Fri Aug 10 10:04:56 2018 +0800

    rk3368: mcu: changing mcu sram start address to 8K offset
    
    Because of new atf code need 8k sram size(from 0-8KB).Sram space
    using by mcu change from 4KB-12KB to 8KB-16KB.
    
    Change-Id: Idae42349f25899216af9f641670c47dde06de95e
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3368/rk3368.c b/arch/arm/mach-rockchip/rk3368/rk3368.c
index 03c1b9b48f..0978b66b7f 100644
--- a/arch/arm/mach-rockchip/rk3368/rk3368.c
+++ b/arch/arm/mach-rockchip/rk3368/rk3368.c
@@ -18,8 +18,8 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #define IMEM_BASE                  0xFF8C0000
 
-/* Max MCU's SRAM value is 8K, begin at (IMEM_BASE + 4K) */
-#define MCU_SRAM_BASE			(IMEM_BASE + 1024 * 4)
+/* Max MCU's SRAM value is 8K, begin at (IMEM_BASE + 8K) */
+#define MCU_SRAM_BASE			(IMEM_BASE + 1024 * 8)
 #define MCU_SRAM_BASE_BIT31_BIT28	((MCU_SRAM_BASE & GENMASK(31, 28)) >> 28)
 #define MCU_SRAM_BASE_BIT27_BIT12	((MCU_SRAM_BASE & GENMASK(27, 12)) >> 12)
 /* exsram may using by mcu to accessing dram(0x0-0x20000000) */

commit 133266d48d3a04c9cca8b63f86a3bae25de1a3be
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Thu Aug 2 14:59:46 2018 +0800

    cmd: add memtester code
    
    Enable memtester by config CONFIG_CMD_MEMTESTER=y
    
    Change-Id: I02c873a8b3be5ee3c9a1cf347b7e3e75cb5336f0
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/cmd/Kconfig b/cmd/Kconfig
index cf6454c9b9..5aeedebee5 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1106,6 +1106,11 @@ config CMD_ETHSW
 
 endmenu
 
+config CMD_MEMTESTER
+	bool "Enable memtester for ddr"
+	help
+	  This enables memtester for ddr.
+
 menu "Misc commands"
 
 config CMD_BMP
diff --git a/cmd/Makefile b/cmd/Makefile
index 7ca3bbd09b..d4ceacf98e 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -86,6 +86,7 @@ obj-$(CONFIG_CMD_LOG) += log.o
 obj-$(CONFIG_ID_EEPROM) += mac.o
 obj-$(CONFIG_CMD_MD5SUM) += md5sum.o
 obj-$(CONFIG_CMD_MEMORY) += mem.o
+obj-$(CONFIG_CMD_MEMTESTER) += memtester/
 obj-$(CONFIG_CMD_IO) += io.o
 obj-$(CONFIG_CMD_MFSL) += mfsl.o
 obj-$(CONFIG_CMD_MII) += mii.o
diff --git a/cmd/memtester/Makefile b/cmd/memtester/Makefile
new file mode 100644
index 0000000000..4608e92fb0
--- /dev/null
+++ b/cmd/memtester/Makefile
@@ -0,0 +1,2 @@
+obj-$(CONFIG_CMD_MEMTESTER) += tests.o
+obj-$(CONFIG_CMD_MEMTESTER) += memtester.o
\ No newline at end of file
diff --git a/cmd/memtester/memtester.c b/cmd/memtester/memtester.c
new file mode 100644
index 0000000000..996cb9ba33
--- /dev/null
+++ b/cmd/memtester/memtester.c
@@ -0,0 +1,234 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * memtester version 4
+ *
+ * Very simple but very effective user-space memory tester.
+ * Originally by Simon Kirby <sim@stormix.com> <sim@neato.org>
+ * Version 2 by Charles Cazabon <charlesc-memtester@pyropus.ca>
+ * Version 3 not publicly released.
+ * Version 4 rewrite:
+ * Copyright (C) 2004-2012 Charles Cazabon <charlesc-memtester@pyropus.ca>
+ * Licensed under the terms of the GNU General Public License version 2 (only).
+ * See the file COPYING for details.
+ *
+ */
+
+#define __version__ "4.3.0"
+
+#include <common.h>
+#include <console.h>
+#include "sizes.h"
+#include "types.h"
+#include "tests.h"
+
+#define EXIT_FAIL_NONSTARTER    0x01
+#define EXIT_FAIL_ADDRESSLINES  0x02
+#define EXIT_FAIL_OTHERTEST     0x04
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* reserved sp size 1MB */
+#define RESERVED_SP_SIZE	0x100000
+
+struct test tests[] = {
+	{"Random Value", test_random_value},
+	{"Compare XOR", test_xor_comparison},
+	{"Compare SUB", test_sub_comparison},
+	{"Compare MUL", test_mul_comparison},
+	{"Compare DIV", test_div_comparison},
+	{"Compare OR", test_or_comparison},
+	{"Compare AND", test_and_comparison},
+	{"Sequential Increment", test_seqinc_comparison},
+	{"Solid Bits", test_solidbits_comparison},
+	{"Block Sequential", test_blockseq_comparison},
+	{"Checkerboard", test_checkerboard_comparison},
+	{"Bit Spread", test_bitspread_comparison},
+	{"Bit Flip", test_bitflip_comparison},
+	{"Walking Ones", test_walkbits1_comparison},
+	{"Walking Zeroes", test_walkbits0_comparison},
+#ifdef TEST_NARROW_WRITES
+	{"8-bit Writes", test_8bit_wide_random},
+	{"16-bit Writes", test_16bit_wide_random},
+#endif
+	{NULL, NULL}
+};
+
+int use_phys;
+off_t physaddrbase;
+
+static int do_memtester(cmd_tbl_t *cmdtp, int flag, int argc,
+			char *const argv[])
+{
+	ul loop, i, j;
+	ul buf_start;
+	ul start_adr[2], length[2];
+	ulv * bufa[2], *bufb[2];
+	ul count[2];
+	ul bufsize = 0;
+	ul loops = 0;
+	ul testenable = 0;
+	int exit_code = 0;
+	int abort = 0;
+
+	printf("memtester version " __version__ " (%d-bit)\n", UL_LEN);
+	printf("Copyright (C) 2001-2012 Charles Cazabon.\n");
+	printf("Licensed under the GNU General Public License version 2 (only).\n");
+	printf("\n");
+
+	start_adr[0] = (size_t)gd->bd->bi_dram[0].start;
+	if (gd->bd->bi_dram[1].start) {
+		length[0] = (size_t)gd->bd->bi_dram[0].size;
+		start_adr[1] = (size_t)gd->bd->bi_dram[1].start;
+		length[1] = gd->start_addr_sp - RESERVED_SP_SIZE - start_adr[1];
+		length[1] &= ~0xfff;
+	} else {
+		length[0] = gd->start_addr_sp - RESERVED_SP_SIZE - start_adr[0];
+		length[0] &= ~0xfff;
+		start_adr[1] = 0;
+		length[1] = 0;
+	}
+
+	printf("available memory for test:\n");
+	printf("	start		 end	length\n");
+	printf("	0x%08lx - 0x%08lx 0x%08lx\n",
+	       start_adr[0], start_adr[0] + length[0], length[0]);
+	if (start_adr[1])
+		printf("	0x%08lx - 0x%08lx 0x%08lx\n",
+		       start_adr[1], start_adr[1] + length[1], length[1]);
+
+	if (argc < 2)
+		return CMD_RET_USAGE;
+
+	if (strict_strtoul(argv[1], 0, &buf_start) < 0)
+		return CMD_RET_USAGE;
+
+	if (argc > 2)
+		if (strict_strtoul(argv[2], 0, &bufsize) < 0)
+			return CMD_RET_USAGE;
+
+	if (argc > 3)
+		if (strict_strtoul(argv[3], 0, &testenable) < 0)
+			return CMD_RET_USAGE;
+
+	if (argc > 4)
+		if (strict_strtoul(argv[4], 0, &loops) < 0)
+			return CMD_RET_USAGE;
+
+	if (!bufsize) {
+		/* test all memory */
+		for (i = 0; i < 2; i++) {
+			bufa[i] = (ulv *)start_adr[i];
+			bufb[i] = (ulv *)(start_adr[i] + length[i] / 2);
+			count[i] = length[i] / 2 / sizeof(ul);
+		}
+	} else {
+		bufa[0] = (ulv *)buf_start;
+		bufb[0] = (ulv *)(buf_start + bufsize / 2);
+		count[0] = bufsize / 2 / sizeof(ul);
+		bufa[1] = 0;
+		if (start_adr[1]) {
+			if (buf_start < start_adr[0] ||
+			    (buf_start >= start_adr[0] + length[0] &&
+			     buf_start < start_adr[1]) ||
+			    ((buf_start + bufsize >
+			      start_adr[0] + length[0]) &&
+			     buf_start + bufsize < start_adr[1]) ||
+			    (buf_start + bufsize >
+			    start_adr[1] + length[1])) {
+				printf("unavailable memory space\n");
+				return CMD_RET_FAILURE;
+			}
+		} else {
+			if (buf_start < start_adr[0] ||
+			    (buf_start + bufsize >
+			    start_adr[0] + length[0])) {
+				printf("unavailable memory space\n");
+				return CMD_RET_FAILURE;
+			}
+		}
+	}
+
+	for (loop = 1; ((!loops) || loop <= loops); loop++) {
+		for (j = 0; j < 2; j++) {
+			if (!bufa[j])
+				continue;
+			printf("testing:0x%lx - 0x%lx\n", (ul)bufa[j],
+			       (ul)bufa[j] + count[j] * 2 * sizeof(ul));
+			printf("Loop %lu", loop);
+			if (loops)
+				printf("/%lu", loops);
+			printf(":\n");
+			printf("  %-20s: ", "Stuck Address");
+			if (!test_stuck_address(bufa[j], count[j] * 2))
+				printf("ok\n");
+			else
+				exit_code |= EXIT_FAIL_ADDRESSLINES;
+			for (i = 0;; i++) {
+				if (!tests[i].name)
+					break;
+				/* If using a custom testenable, only run this
+				 * test if the bit corresponding to this test
+				 * was set by the user.
+				 */
+				if (testenable && (!((1 << i) & testenable)))
+					continue;
+				printf("  %-20s: ", tests[i].name);
+				if (!tests[i].fp(bufa[j], bufb[j], count[j]))
+					printf("ok\n");
+				else
+					exit_code |= EXIT_FAIL_OTHERTEST;
+				if (ctrlc()) {
+					abort = 1;
+					break;
+				}
+			}
+			printf("\n");
+			if (abort)
+				break;
+		}
+		if (abort)
+			break;
+	}
+	if (exit_code & EXIT_FAIL_NONSTARTER)
+		printf("Fail: EXIT_FAIL_NONSTARTER\n");
+	if (exit_code & EXIT_FAIL_ADDRESSLINES)
+		printf("Fail: EXIT_FAIL_ADDRESSLINES\n");
+	if (exit_code & EXIT_FAIL_OTHERTEST)
+		printf("Fail: EXIT_FAIL_OTHERTEST\n");
+
+	printf("Done.\n");
+	return 0;
+}
+
+U_BOOT_CMD(memtester, 5, 1, do_memtester,
+	   "do memtester",
+	   "[start length [testenable [loop]]]\n"
+	   "start: start address, should be 4k align\n"
+	   "length: test length, should be 4k align, if 0 testing full space\n"
+	   "testenable[option]: enable pattern by set bit to 1, null or 0"
+	   " enable all pattern\n"
+	   "	bit0: Random Value\n"
+	   "	bit1: Compare XOR\n"
+	   "	bit2: Compare SUB\n"
+	   "	bit3: Compare MUL\n"
+	   "	bit4: Compare DIV\n"
+	   "	bit5: Compare OR\n"
+	   "	bit6: Compare AND\n"
+	   "	bit7: Sequential Increment\n"
+	   "	bit8: Solid Bits\n"
+	   "	bit9: Block Sequential\n"
+	   "	bit10: Checkerboard\n"
+	   "	bit11: Bit Spread\n"
+	   "	bit12: Bit Flip\n"
+	   "	bit13: Walking Ones\n"
+	   "	bit14: Walking Zeroes\n"
+	   "	bit15: 8-bit Writes\n"
+	   "	bit16: 16-bit Writes\n"
+	   "	example: testenable=0x1000,enable Bit Flip only\n"
+	   "loop[option]: testing loop, if 0 or null endless loop\n"
+	   "example:\n"
+	   "	memtester 0x200000 0x1000000: start address: 0x200000 length:"
+	   "0x1000000, enable all pattern, endless loop\n"
+	   "	memtester 0x200000 0x1000000 0x1000 100: start address:0x200000"
+	   " length:0x1000000, Bit Flip only, loop 100 times\n"
+	   "	memtester 0 0: testing full space\n");
diff --git a/cmd/memtester/memtester.h b/cmd/memtester/memtester.h
new file mode 100644
index 0000000000..d388b2567d
--- /dev/null
+++ b/cmd/memtester/memtester.h
@@ -0,0 +1,22 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Very simple (yet, for some reason, very effective) memory tester.
+ * Originally by Simon Kirby <sim@stormix.com> <sim@neato.org>
+ * Version 2 by Charles Cazabon <charlesc-memtester@pyropus.ca>
+ * Version 3 not publicly released.
+ * Version 4 rewrite:
+ * Copyright (C) 2004-2012 Charles Cazabon <charlesc-memtester@pyropus.ca>
+ * Licensed under the terms of the GNU General Public License version 2 (only).
+ * See the file COPYING for details.
+ *
+ * This file contains the declarations for external variables from the main file.
+ * See other comments in that file.
+ *
+ */
+
+#include <linux/types.h>
+
+/* extern declarations. */
+
+extern int use_phys;
+extern off_t physaddrbase;
diff --git a/cmd/memtester/sizes.h b/cmd/memtester/sizes.h
new file mode 100644
index 0000000000..79eba1b699
--- /dev/null
+++ b/cmd/memtester/sizes.h
@@ -0,0 +1,40 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Very simple but very effective user-space memory tester.
+ * Originally by Simon Kirby <sim@stormix.com> <sim@neato.org>
+ * Version 2 by Charles Cazabon <charlesc-memtester@pyropus.ca>
+ * Version 3 not publicly released.
+ * Version 4 rewrite:
+ * Copyright (C) 2004-2012 Charles Cazabon <charlesc-memtester@pyropus.ca>
+ * Licensed under the terms of the GNU General Public License version 2 (only).
+ * See the file COPYING for details.
+ *
+ * This file contains some macro definitions for handling 32/64 bit platforms.
+ *
+ */
+#ifndef __MEMTESTER_SIZES_H
+#define __MEMTESTER_SIZES_H
+
+#include <common.h>
+
+#define rand32() ((unsigned int)rand() | ((unsigned int)rand() << 16))
+
+#ifndef CONFIG_ARM64
+#define rand_ul() rand32()
+#define UL_ONEBITS 0xffffffff
+#define UL_LEN 32
+#define CHECKERBOARD1 0x55555555
+#define CHECKERBOARD2 0xaaaaaaaa
+#define UL_BYTE(x) ((x | x << 8 | x << 16 | x << 24))
+#else
+#define rand64() (((ul)rand32()) << 32 | ((ul)rand32()))
+#define rand_ul() rand64()
+#define UL_ONEBITS 0xffffffffffffffffUL
+#define UL_LEN 64
+#define CHECKERBOARD1 0x5555555555555555
+#define CHECKERBOARD2 0xaaaaaaaaaaaaaaaa
+#define UL_BYTE(x) (((ul)x | (ul)x << 8 | (ul)x << 16 | (ul)x << 24 |	\
+		    (ul)x << 32 | (ul)x << 40 | (ul)x << 48 | (ul)x << 56))
+#endif
+
+#endif /* __MEMTESTER_SIZES_H */
diff --git a/cmd/memtester/tests.c b/cmd/memtester/tests.c
new file mode 100644
index 0000000000..327f983619
--- /dev/null
+++ b/cmd/memtester/tests.c
@@ -0,0 +1,541 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Very simple but very effective user-space memory tester.
+ * Originally by Simon Kirby <sim@stormix.com> <sim@neato.org>
+ * Version 2 by Charles Cazabon <charlesc-memtester@pyropus.ca>
+ * Version 3 not publicly released.
+ * Version 4 rewrite:
+ * Copyright (C) 2004-2012 Charles Cazabon <charlesc-memtester@pyropus.ca>
+ * Licensed under the terms of the GNU General Public License version 2 (only).
+ * See the file COPYING for details.
+ *
+ * This file contains the functions for the actual tests, called from the
+ * main routine in memtester.c.  See other comments in that file.
+ *
+ */
+
+#include "memtester.h"
+#include "sizes.h"
+#include "types.h"
+
+union {
+	unsigned char bytes[UL_LEN / 8];
+	ul val;
+} mword8;
+
+union {
+	unsigned short u16s[UL_LEN / 16];
+	ul val;
+} mword16;
+
+char progress[] = "-\\|/";
+#define PROGRESSLEN 4
+#define PROGRESSOFTEN 2500
+#define ONE 0x00000001L
+
+#define fflush(n)
+
+/* Function definitions. */
+int compare_regions(ulv *bufa, ulv *bufb, size_t count)
+{
+	int r = 0;
+	size_t i;
+	ulv *p1 = bufa;
+	ulv *p2 = bufb;
+	off_t physaddr;
+
+	for (i = 0; i < count; i++, p1++, p2++) {
+		if (*p1 != *p2) {
+			if (use_phys) {
+				physaddr = physaddrbase + (i * sizeof(ul));
+				fprintf(stderr,
+					"FAILURE: 0x%08lx != 0x%08lx at physical address "
+					"0x%08lx.\n",
+					(ul)*p1, (ul)*p2, physaddr);
+			} else {
+				fprintf(stderr,
+					"FAILURE: 0x%08lx != 0x%08lx at offset 0x%08lx.\n",
+					(ul)*p1, (ul)*p2,
+					(ul)(i * sizeof(ul)));
+			}
+			/* printf("Skipping to next test..."); */
+			r = -1;
+		}
+	}
+	return r;
+}
+
+int test_stuck_address(ulv *bufa, size_t count)
+{
+	ulv *p1 = bufa;
+	unsigned int j;
+	size_t i;
+	off_t physaddr;
+
+	printf("           ");
+	fflush(stdout);
+	for (j = 0; j < 16; j++) {
+		printf("\b\b\b\b\b\b\b\b\b\b\b");
+		p1 = (ulv *)bufa;
+		printf("setting %3u", j);
+		fflush(stdout);
+		for (i = 0; i < count; i++) {
+			*p1 = ((j + i) % 2) == 0 ? (ul)p1 : ~((ul)p1);
+			*p1++;
+		}
+		printf("\b\b\b\b\b\b\b\b\b\b\b");
+		printf("testing %3u", j);
+		fflush(stdout);
+		p1 = (ulv *)bufa;
+		for (i = 0; i < count; i++, p1++) {
+			if (*p1 !=
+				(((j + i) % 2) == 0 ? (ul)p1 : ~((ul)p1))) {
+				if (use_phys) {
+					physaddr =
+					    physaddrbase + (i * sizeof(ul));
+					fprintf(stderr,
+						"FAILURE: possible bad address line at physical "
+						"address 0x%08lx.\n", physaddr);
+				} else {
+					fprintf(stderr,
+						"FAILURE: possible bad address line at offset "
+						"0x%08lx.\n",
+						(ul)(i * sizeof(ul)));
+				}
+				printf("Skipping to next test...\n");
+				fflush(stdout);
+				return -1;
+			}
+		}
+	}
+	printf("\b\b\b\b\b\b\b\b\b\b\b           \b\b\b\b\b\b\b\b\b\b\b");
+	fflush(stdout);
+	return 0;
+}
+
+int test_random_value(ulv *bufa, ulv *bufb, size_t count)
+{
+	ulv *p1 = bufa;
+	ulv *p2 = bufb;
+	ul j = 0;
+	size_t i;
+
+	putc(' ');
+	fflush(stdout);
+	for (i = 0; i < count; i++) {
+		*p1++ = *p2++ = rand_ul();
+		if (!(i % PROGRESSOFTEN)) {
+			putc('\b');
+			putc(progress[++j % PROGRESSLEN]);
+			fflush(stdout);
+		}
+	}
+	printf("\b \b");
+	fflush(stdout);
+	return compare_regions(bufa, bufb, count);
+}
+
+int test_xor_comparison(ulv *bufa, ulv *bufb, size_t count)
+{
+	ulv *p1 = bufa;
+	ulv *p2 = bufb;
+	size_t i;
+	ul q = rand_ul();
+
+	for (i = 0; i < count; i++) {
+		*p1++ ^= q;
+		*p2++ ^= q;
+	}
+	return compare_regions(bufa, bufb, count);
+}
+
+int test_sub_comparison(ulv *bufa, ulv *bufb, size_t count)
+{
+	ulv *p1 = bufa;
+	ulv *p2 = bufb;
+	size_t i;
+	ul q = rand_ul();
+
+	for (i = 0; i < count; i++) {
+		*p1++ -= q;
+		*p2++ -= q;
+	}
+	return compare_regions(bufa, bufb, count);
+}
+
+int test_mul_comparison(ulv *bufa, ulv *bufb, size_t count)
+{
+	ulv *p1 = bufa;
+	ulv *p2 = bufb;
+	size_t i;
+	ul q = rand_ul();
+
+	for (i = 0; i < count; i++) {
+		*p1++ *= q;
+		*p2++ *= q;
+	}
+	return compare_regions(bufa, bufb, count);
+}
+
+int test_div_comparison(ulv *bufa, ulv *bufb, size_t count)
+{
+	ulv *p1 = bufa;
+	ulv *p2 = bufb;
+	size_t i;
+	ul q = rand_ul();
+
+	for (i = 0; i < count; i++) {
+		if (!q)
+			q++;
+		*p1++ /= q;
+		*p2++ /= q;
+	}
+	return compare_regions(bufa, bufb, count);
+}
+
+int test_or_comparison(ulv *bufa, ulv *bufb, size_t count)
+{
+	ulv *p1 = bufa;
+	ulv *p2 = bufb;
+	size_t i;
+	ul q = rand_ul();
+
+	for (i = 0; i < count; i++) {
+		*p1++ |= q;
+		*p2++ |= q;
+	}
+	return compare_regions(bufa, bufb, count);
+}
+
+int test_and_comparison(ulv *bufa, ulv *bufb, size_t count)
+{
+	ulv *p1 = bufa;
+	ulv *p2 = bufb;
+	size_t i;
+	ul q = rand_ul();
+
+	for (i = 0; i < count; i++) {
+		*p1++ &= q;
+		*p2++ &= q;
+	}
+	return compare_regions(bufa, bufb, count);
+}
+
+int test_seqinc_comparison(ulv *bufa, ulv *bufb, size_t count)
+{
+	ulv *p1 = bufa;
+	ulv *p2 = bufb;
+	size_t i;
+	ul q = rand_ul();
+
+	for (i = 0; i < count; i++)
+		*p1++ = *p2++ = (i + q);
+	return compare_regions(bufa, bufb, count);
+}
+
+int test_solidbits_comparison(ulv *bufa, ulv *bufb, size_t count)
+{
+	ulv *p1 = bufa;
+	ulv *p2 = bufb;
+	unsigned int j;
+	ul q;
+	size_t i;
+
+	printf("           ");
+	fflush(stdout);
+	for (j = 0; j < 64; j++) {
+		printf("\b\b\b\b\b\b\b\b\b\b\b");
+		q = (j % 2) == 0 ? UL_ONEBITS : 0;
+		printf("setting %3u", j);
+		fflush(stdout);
+		p1 = (ulv *)bufa;
+		p2 = (ulv *)bufb;
+		for (i = 0; i < count; i++)
+			*p1++ = *p2++ = (i % 2) == 0 ? q : ~q;
+		printf("\b\b\b\b\b\b\b\b\b\b\b");
+		printf("testing %3u", j);
+		fflush(stdout);
+		if (compare_regions(bufa, bufb, count))
+			return -1;
+	}
+	printf("\b\b\b\b\b\b\b\b\b\b\b           \b\b\b\b\b\b\b\b\b\b\b");
+	fflush(stdout);
+	return 0;
+}
+
+int test_checkerboard_comparison(ulv *bufa, ulv *bufb, size_t count)
+{
+	ulv *p1 = bufa;
+	ulv *p2 = bufb;
+	unsigned int j;
+	ul q;
+	size_t i;
+
+	printf("           ");
+	fflush(stdout);
+	for (j = 0; j < 64; j++) {
+		printf("\b\b\b\b\b\b\b\b\b\b\b");
+		q = (j % 2) == 0 ? CHECKERBOARD1 : CHECKERBOARD2;
+		printf("setting %3u", j);
+		fflush(stdout);
+		p1 = (ulv *)bufa;
+		p2 = (ulv *)bufb;
+		for (i = 0; i < count; i++)
+			*p1++ = *p2++ = (i % 2) == 0 ? q : ~q;
+		printf("\b\b\b\b\b\b\b\b\b\b\b");
+		printf("testing %3u", j);
+		fflush(stdout);
+		if (compare_regions(bufa, bufb, count))
+			return -1;
+	}
+	printf("\b\b\b\b\b\b\b\b\b\b\b           \b\b\b\b\b\b\b\b\b\b\b");
+	fflush(stdout);
+	return 0;
+}
+
+int test_blockseq_comparison(ulv *bufa, ulv *bufb, size_t count)
+{
+	ulv *p1 = bufa;
+	ulv *p2 = bufb;
+	unsigned int j;
+	size_t i;
+
+	printf("           ");
+	fflush(stdout);
+	for (j = 0; j < 256; j++) {
+		printf("\b\b\b\b\b\b\b\b\b\b\b");
+		p1 = (ulv *)bufa;
+		p2 = (ulv *)bufb;
+		printf("setting %3u", j);
+		fflush(stdout);
+		for (i = 0; i < count; i++)
+			*p1++ = *p2++ = (ul)UL_BYTE(j);
+		printf("\b\b\b\b\b\b\b\b\b\b\b");
+		printf("testing %3u", j);
+		fflush(stdout);
+		if (compare_regions(bufa, bufb, count))
+			return -1;
+	}
+	printf("\b\b\b\b\b\b\b\b\b\b\b           \b\b\b\b\b\b\b\b\b\b\b");
+	fflush(stdout);
+	return 0;
+}
+
+int test_walkbits0_comparison(ulv *bufa, ulv *bufb, size_t count)
+{
+	ulv *p1 = bufa;
+	ulv *p2 = bufb;
+	unsigned int j;
+	size_t i;
+
+	printf("           ");
+	fflush(stdout);
+	for (j = 0; j < UL_LEN * 2; j++) {
+		printf("\b\b\b\b\b\b\b\b\b\b\b");
+		p1 = (ulv *)bufa;
+		p2 = (ulv *)bufb;
+		printf("setting %3u", j);
+		fflush(stdout);
+		for (i = 0; i < count; i++) {
+			if (j < UL_LEN) {	/* Walk it up. */
+				*p1++ = *p2++ = ONE << j;
+			} else {	/* Walk it back down. */
+				*p1++ = *p2++ = ONE << (UL_LEN * 2 - j - 1);
+			}
+		}
+		printf("\b\b\b\b\b\b\b\b\b\b\b");
+		printf("testing %3u", j);
+		fflush(stdout);
+		if (compare_regions(bufa, bufb, count))
+			return -1;
+	}
+	printf("\b\b\b\b\b\b\b\b\b\b\b           \b\b\b\b\b\b\b\b\b\b\b");
+	fflush(stdout);
+	return 0;
+}
+
+int test_walkbits1_comparison(ulv *bufa, ulv *bufb, size_t count)
+{
+	ulv *p1 = bufa;
+	ulv *p2 = bufb;
+	unsigned int j;
+	size_t i;
+
+	printf("           ");
+	fflush(stdout);
+	for (j = 0; j < UL_LEN * 2; j++) {
+		printf("\b\b\b\b\b\b\b\b\b\b\b");
+		p1 = (ulv *)bufa;
+		p2 = (ulv *)bufb;
+		printf("setting %3u", j);
+		fflush(stdout);
+		for (i = 0; i < count; i++) {
+			if (j < UL_LEN) {	/* Walk it up. */
+				*p1++ = *p2++ = UL_ONEBITS ^ (ONE << j);
+			} else {	/* Walk it back down. */
+				*p1++ = *p2++ =
+				    UL_ONEBITS ^ (ONE << (UL_LEN * 2 - j - 1));
+			}
+		}
+		printf("\b\b\b\b\b\b\b\b\b\b\b");
+		printf("testing %3u", j);
+		fflush(stdout);
+		if (compare_regions(bufa, bufb, count))
+			return -1;
+	}
+	printf("\b\b\b\b\b\b\b\b\b\b\b           \b\b\b\b\b\b\b\b\b\b\b");
+	fflush(stdout);
+	return 0;
+}
+
+int test_bitspread_comparison(ulv *bufa, ulv *bufb, size_t count)
+{
+	ulv *p1 = bufa;
+	ulv *p2 = bufb;
+	unsigned int j;
+	size_t i;
+
+	printf("           ");
+	fflush(stdout);
+	for (j = 0; j < UL_LEN * 2; j++) {
+		printf("\b\b\b\b\b\b\b\b\b\b\b");
+		p1 = (ulv *)bufa;
+		p2 = (ulv *)bufb;
+		printf("setting %3u", j);
+		fflush(stdout);
+		for (i = 0; i < count; i++) {
+			if (j < UL_LEN) {	/* Walk it up. */
+				*p1++ = *p2++ = (i % 2 == 0)
+				    ? (ONE << j) | (ONE << (j + 2))
+				    : UL_ONEBITS ^ ((ONE << j)
+						    | (ONE << (j + 2)));
+			} else {	/* Walk it back down. */
+				*p1++ = *p2++ = (i % 2 == 0)
+				    ? (ONE << (UL_LEN * 2 - 1 - j)) | (ONE <<
+								       (UL_LEN *
+									2 + 1 -
+									j))
+				    : UL_ONEBITS ^ (ONE << (UL_LEN * 2 - 1 - j)
+						    | (ONE <<
+						       (UL_LEN * 2 + 1 - j)));
+			}
+		}
+		printf("\b\b\b\b\b\b\b\b\b\b\b");
+		printf("testing %3u", j);
+		fflush(stdout);
+		if (compare_regions(bufa, bufb, count))
+			return -1;
+	}
+	printf("\b\b\b\b\b\b\b\b\b\b\b           \b\b\b\b\b\b\b\b\b\b\b");
+	fflush(stdout);
+	return 0;
+}
+
+int test_bitflip_comparison(ulv *bufa, ulv *bufb, size_t count)
+{
+	ulv *p1 = bufa;
+	ulv *p2 = bufb;
+	unsigned int j, k;
+	ul q;
+	size_t i;
+
+	printf("           ");
+	fflush(stdout);
+	for (k = 0; k < UL_LEN; k++) {
+		q = ONE << k;
+		for (j = 0; j < 8; j++) {
+			printf("\b\b\b\b\b\b\b\b\b\b\b");
+			q = ~q;
+			printf("setting %3u", k * 8 + j);
+			fflush(stdout);
+			p1 = (ulv *)bufa;
+			p2 = (ulv *)bufb;
+			for (i = 0; i < count; i++)
+				*p1++ = *p2++ = (i % 2) == 0 ? q : ~q;
+			printf("\b\b\b\b\b\b\b\b\b\b\b");
+			printf("testing %3u", k * 8 + j);
+			fflush(stdout);
+			if (compare_regions(bufa, bufb, count))
+				return -1;
+		}
+	}
+	printf("\b\b\b\b\b\b\b\b\b\b\b           \b\b\b\b\b\b\b\b\b\b\b");
+	fflush(stdout);
+	return 0;
+}
+
+#ifdef TEST_NARROW_WRITES
+int test_8bit_wide_random(ulv *bufa, ulv *bufb, size_t count)
+{
+	u8v *p1, *t;
+	ulv *p2;
+	int attempt;
+	unsigned int b, j = 0;
+	size_t i;
+
+	putc(' ');
+	fflush(stdout);
+	for (attempt = 0; attempt < 2; attempt++) {
+		if (attempt & 1) {
+			p1 = (u8v *)bufa;
+			p2 = bufb;
+		} else {
+			p1 = (u8v *)bufb;
+			p2 = bufa;
+		}
+		for (i = 0; i < count; i++) {
+			t = mword8.bytes;
+			*p2++ = mword8.val = rand_ul();
+			for (b = 0; b < UL_LEN / 8; b++)
+				*p1++ = *t++;
+			if (!(i % PROGRESSOFTEN)) {
+				putc('\b');
+				putc(progress[++j % PROGRESSLEN]);
+				fflush(stdout);
+			}
+		}
+		if (compare_regions(bufa, bufb, count))
+			return -1;
+	}
+	printf("\b \b");
+	fflush(stdout);
+	return 0;
+}
+
+int test_16bit_wide_random(ulv *bufa, ulv *bufb, size_t count)
+{
+	u16v *p1, *t;
+	ulv *p2;
+	int attempt;
+	unsigned int b, j = 0;
+	size_t i;
+
+	putc(' ');
+	fflush(stdout);
+	for (attempt = 0; attempt < 2; attempt++) {
+		if (attempt & 1) {
+			p1 = (u16v *)bufa;
+			p2 = bufb;
+		} else {
+			p1 = (u16v *)bufb;
+			p2 = bufa;
+		}
+		for (i = 0; i < count; i++) {
+			t = mword16.u16s;
+			*p2++ = mword16.val = rand_ul();
+			for (b = 0; b < UL_LEN / 16; b++)
+				*p1++ = *t++;
+			if (!(i % PROGRESSOFTEN)) {
+				putc('\b');
+				putc(progress[++j % PROGRESSLEN]);
+				fflush(stdout);
+			}
+		}
+		if (compare_regions(bufa, bufb, count))
+			return -1;
+	}
+	printf("\b \b");
+	fflush(stdout);
+	return 0;
+}
+#endif
diff --git a/cmd/memtester/tests.h b/cmd/memtester/tests.h
new file mode 100644
index 0000000000..cf43f3f3b8
--- /dev/null
+++ b/cmd/memtester/tests.h
@@ -0,0 +1,56 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Very simple yet very effective memory tester.
+ * Originally by Simon Kirby <sim@stormix.com> <sim@neato.org>
+ * Version 2 by Charles Cazabon <charlesc-memtester@pyropus.ca>
+ * Version 3 not publicly released.
+ * Version 4 rewrite:
+ * Copyright (C) 2004-2012 Charles Cazabon <charlesc-memtester@pyropus.ca>
+ * Licensed under the terms of the GNU General Public License version 2 (only).
+ * See the file COPYING for details.
+ *
+ * This file contains the declarations for the functions for the actual tests,
+ * called from the main routine in memtester.c.  See other comments in that
+ * file.
+ *
+ */
+
+/* Function declaration. */
+
+int test_stuck_address(ulv *bufa, size_t count);
+int test_random_value(ulv *bufa,
+		      ulv *bufb, size_t count);
+int test_xor_comparison(ulv *bufa,
+			ulv *bufb, size_t count);
+int test_sub_comparison(ulv *bufa,
+			ulv *bufb, size_t count);
+int test_mul_comparison(ulv *bufa,
+			ulv *bufb, size_t count);
+int test_div_comparison(ulv *bufa,
+			ulv *bufb, size_t count);
+int test_or_comparison(ulv *bufa,
+		       ulv *bufb, size_t count);
+int test_and_comparison(ulv *bufa,
+			ulv *bufb, size_t count);
+int test_seqinc_comparison(ulv *bufa,
+			   ulv *bufb, size_t count);
+int test_solidbits_comparison(ulv *bufa,
+			      ulv *bufb, size_t count);
+int test_checkerboard_comparison(ulv *bufa,
+				 ulv *bufb, size_t count);
+int test_blockseq_comparison(ulv *bufa,
+			     ulv *bufb, size_t count);
+int test_walkbits0_comparison(ulv *bufa,
+			      ulv *bufb, size_t count);
+int test_walkbits1_comparison(ulv *bufa,
+			      ulv *bufb, size_t count);
+int test_bitspread_comparison(ulv *bufa,
+			      ulv *bufb, size_t count);
+int test_bitflip_comparison(ulv *bufa,
+			    ulv *bufb, size_t count);
+#ifdef TEST_NARROW_WRITES
+int test_8bit_wide_random(ulv *bufa,
+			  ulv *bufb, size_t count);
+int test_16bit_wide_random(ulv *bufa,
+			   ulv *bufb, size_t count);
+#endif
diff --git a/cmd/memtester/types.h b/cmd/memtester/types.h
new file mode 100644
index 0000000000..e25864d26c
--- /dev/null
+++ b/cmd/memtester/types.h
@@ -0,0 +1,29 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Very simple but very effective user-space memory tester.
+ * Originally by Simon Kirby <sim@stormix.com> <sim@neato.org>
+ * Version 2 by Charles Cazabon <charlesc-memtester@pyropus.ca>
+ * Version 3 not publicly released.
+ * Version 4 rewrite:
+ * Copyright (C) 2004-2010 Charles Cazabon <charlesc-memtester@pyropus.ca>
+ * Licensed under the terms of the GNU General Public License version 2 (only).
+ * See the file COPYING for details.
+ *
+ * This file contains typedefs, structure, and union definitions.
+ *
+ */
+#ifndef __MEMTESTER_TYPES_H
+#define __MEMTESTER_TYPES_H
+
+typedef unsigned long ul;
+typedef unsigned long long ull;
+typedef unsigned long volatile ulv;
+typedef unsigned char volatile u8v;
+typedef unsigned short volatile u16v;
+
+struct test {
+	char *name;
+	int (*fp)(ulv *bufa, ulv *bufb, size_t count);
+};
+
+#endif /* __MEMTESTER_TYPES_H */

commit 7b1b253904b591995ce23dd574481e2ea651b739
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Fri Aug 10 14:11:03 2018 +0800

    rockchip: vendor: export vendor_item structure
    
    Export vendor_item structure into head file that other
    moudules may quote directly.
    
    Change-Id: If791f5da8ac45f46f872a8f872af9bf9e2365a37
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/vendor.h b/arch/arm/include/asm/arch-rockchip/vendor.h
index ea82e0abd8..83c487d92e 100644
--- a/arch/arm/include/asm/arch-rockchip/vendor.h
+++ b/arch/arm/include/asm/arch-rockchip/vendor.h
@@ -11,6 +11,13 @@
 #define VENDOR_LAN_MAC_ID	3 /* lan mac */
 #define VENDOR_BLUETOOTH_ID	4 /* bluetooth mac */
 
+struct vendor_item {
+	u16  id;
+	u16  offset;
+	u16  size;
+	u16  flag;
+};
+
 int vendor_storage_test(void);
 int vendor_storage_read(u16 id, void *pbuf, u16 size);
 int vendor_storage_write(u16 id, void *pbuf, u16 size);
diff --git a/arch/arm/mach-rockchip/vendor.c b/arch/arm/mach-rockchip/vendor.c
old mode 100755
new mode 100644
index d9a598de6a..db17a61375
--- a/arch/arm/mach-rockchip/vendor.c
+++ b/arch/arm/mach-rockchip/vendor.c
@@ -42,13 +42,6 @@
 /* Vendor uinit test define */
 int vendor_storage_test(void);
 
-struct vendor_item {
-	u16  id;
-	u16  offset;
-	u16  size;
-	u16  flag;
-};
-
 struct vendor_hdr {
 	u32	tag;
 	u32	version;

commit 93925a65464e49bfe40be92257ff9469e7365d91
Author: Bian Jin chen <kenjc.bian@rock-chips.com>
Date:   Thu Aug 9 10:42:49 2018 +0800

    rockchip: px30: Increase the size of CONFIG_SYS_MALLOC_LEN to 192M.
    
    If vbmeta does not have signature information, avb will load all
    data in the vbmeta partition, which requires more malloc size.
    
    Change-Id: I605801f2d995a217d4dee2f6f5ff0a3680ea247e
    Signed-off-by: Bian Jin chen <kenjc.bian@rock-chips.com>

diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index a948c5df24..425659eac4 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -9,7 +9,7 @@
 
 #include "rockchip-common.h"
 
-#define CONFIG_SYS_MALLOC_LEN		(64 << 20) /* 64M */
+#define CONFIG_SYS_MALLOC_LEN		(192 << 20) /* 192M */
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
 

commit 404256445eb51fc76a0107d1b954283851b5150d
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Tue Aug 7 22:44:34 2018 +0800

    drivers: rkflash: add new spi flash
    
    1.SPI nand including HYF, MXIC, XTX
    2.SPI nor including XMC, ESMT, MXIC
    
    Change-Id: Id64a567009696dfa6128370e1ce9567d32edba9f
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/sfc_nand.c b/drivers/rkflash/sfc_nand.c
index f2d394929a..72eeebe705 100644
--- a/drivers/rkflash/sfc_nand.c
+++ b/drivers/rkflash/sfc_nand.c
@@ -23,6 +23,8 @@ static struct nand_info spi_nand_tbl[] = {
 	{0xC212, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 4, 0xB0, 0, 4, 8, &sfc_nand_ecc_status_sp1},
 	/* MX35LF2GE4AB */
 	{0xC222, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 4, 0xB0, 0, 4, 8, &sfc_nand_ecc_status_sp1},
+	/* MX66L1G45G */
+	{0x90AF, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x00, 18, 4, 0xB0, 0, 4, 8, &sfc_nand_ecc_status_sp1},
 	/* GD5F1GQ4UAYIG */
 	{0xC8F1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 8, 0xB0, 0, 4, 8, NULL},
 	/* MT29F1G01ZAC */
@@ -37,10 +39,20 @@ static struct nand_info spi_nand_tbl[] = {
 	{0xEFAA, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xFF, 0XFF, 4, 20, &sfc_nand_ecc_status_sp1},
 	/* HYF2GQ4UAACAE */
 	{0xC952, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 14, 0xB0, 0, 4, 36, NULL},
+	/* HYF2GQ4UAACAE */
+	{0xC952, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 14, 0xB0, 0, 4, 36, NULL},
 	/* HYF2GQ4UDACAE */
-	{0xC922, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 4, 0xB0, 0, 4, 20, NULL},
+	{0xC922, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 4, 0xB0, 0, 4, 20, NULL},
+	/* HYF2GQ4UHCCAE */
+	{0xC95A, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 14, 0xB0, 0, 4, 36, NULL},
 	/* HYF1GQ4UDACAE */
-	{0xC921, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 4, 0xB0, 0, 4, 20, NULL},
+	{0xC921, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 4, 0xB0, 0, 4, 20, NULL},
+	/* F50L1G41LB */
+	{0xC801, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xB0, 0xFF, 20, 36, NULL},
+	/* XT26G02A */
+	{0x0be2, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 1, 0xB0, 0x0, 8, 12, &sfc_nand_ecc_status_sp3},
+	/* XT26G01A */
+	{0x0be1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xB0, 0x0, 8, 12, &sfc_nand_ecc_status_sp3},
 };
 
 static u8 id_byte[8];
diff --git a/drivers/rkflash/sfc_nor.c b/drivers/rkflash/sfc_nor.c
index c3872e6bf8..db78567d78 100644
--- a/drivers/rkflash/sfc_nor.c
+++ b/drivers/rkflash/sfc_nor.c
@@ -35,6 +35,12 @@ static struct flash_info spi_flash_tbl[] = {
 	{0x207018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x00, 15, 0, 0},
 	/* MX25L25635E/F */
 	{0xc22019, 128, 8, 0x03, 0x02, 0x6B, 0x38, 0x20, 0xD8, 0x30, 16, 6, 0},
+	/* XM25QH64A */
+	{0x207017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 0, 0},
+	/* XM25QH128A */
+	{0x207018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 0, 0},
+	/* EN25QH128A */
+	{0x1c7018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 0, 0},
 };
 
 static const u8 sfnor_dev_code[] = {

commit 02104b86c5b3340de79d9b41ab60d129bf69f25e
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Aug 9 09:23:54 2018 +0800

    clk: rockchip: rk3368: fixup the bus and peri parent
    
    make the bus and peri parent to GPLL.
    
    Change-Id: I3956752c1191a6417d16fa9a9765574f38c7ab7b
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c
index d82dfd2b15..9446c9f8b1 100644
--- a/drivers/clk/rockchip/clk_rk3368.c
+++ b/drivers/clk/rockchip/clk_rk3368.c
@@ -588,7 +588,7 @@ static ulong rk3368_bus_set_clk(struct rk3368_cru *cru,
 		assert(src_clk_div - 1 < 31);
 		rk_clrsetreg(&cru->clksel_con[8],
 			     CLK_BUS_PLL_SEL_MASK | ACLK_BUS_DIV_CON_MASK,
-			     CLK_BUS_PLL_SEL_CPLL << CLK_BUS_PLL_SEL_SHIFT |
+			     CLK_BUS_PLL_SEL_GPLL << CLK_BUS_PLL_SEL_SHIFT |
 			     (src_clk_div - 1) << ACLK_BUS_DIV_CON_SHIFT);
 		break;
 	case HCLK_BUS:
@@ -662,7 +662,7 @@ static ulong rk3368_peri_set_clk(struct rk3368_cru *cru,
 		assert(src_clk_div - 1 < 31);
 		rk_clrsetreg(&cru->clksel_con[9],
 			     CLK_PERI_PLL_SEL_MASK | ACLK_PERI_DIV_CON_MASK,
-			     CLK_PERI_PLL_SEL_CPLL << CLK_PERI_PLL_SEL_SHIFT |
+			     CLK_PERI_PLL_SEL_GPLL << CLK_PERI_PLL_SEL_SHIFT |
 			     (src_clk_div - 1) << ACLK_PERI_DIV_CON_SHIFT);
 		break;
 	case HCLK_PERI:

commit f0aa0521c2e80e8d66dfe8ec7ae8d39356dfa8e8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Aug 3 20:09:35 2018 +0800

    make.sh: support rk3368h image pack
    
    Change-Id: Iaa7a3c117bd5cffd24febe06f0af2a8a7316f37e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index aeef535c48..319822127b 100755
--- a/make.sh
+++ b/make.sh
@@ -299,6 +299,8 @@ select_chip_info()
 
 	if [ $count -eq 1 ]; then
 		RKCHIP=${RKCHIP##*_}
+		grep '^CONFIG_ROCKCHIP_RK3368=y' ${OUTDIR}/.config >/dev/null \
+			&& RKCHIP=RK3368H
 	elif [ $count -gt 1 ]; then
 		# Grep the RK CHIP variant
 		grep '^CONFIG_ROCKCHIP_PX3SE=y' ${OUTDIR}/.config > /dev/null \

commit edac97f481a01100e3b84201a4da8d92561ece2d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 9 11:58:26 2018 +0800

    android: dtbo: enable depends on CONFIG_CMD_DTIMG
    
    Change-Id: I04ba7d39fed1b5c6950a3882f04de5420dfcff2e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 7fa5fa7587..39987927bc 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -598,7 +598,8 @@ int rockchip_read_dtb_file(void *fdt_addr)
 	if (ret < 0)
 		return ret;
 
-#if defined(CONFIG_OF_LIBFDT_OVERLAY) && defined(CONFIG_USING_KERNEL_DTB)
+#if defined(CONFIG_CMD_DTIMG) && \
+    defined(CONFIG_OF_LIBFDT_OVERLAY) && defined(CONFIG_USING_KERNEL_DTB)
 	android_fdt_overlay_apply((void *)fdt_addr);
 #endif
 
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index e4b373574d..4c9a694713 100755
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -476,7 +476,7 @@ out:
 }
 #endif
 
-#ifdef CONFIG_OF_LIBFDT_OVERLAY
+#if defined(CONFIG_CMD_DTIMG) && defined(CONFIG_OF_LIBFDT_OVERLAY)
 
 /*
  * Default return index 0.
@@ -841,7 +841,8 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
  * dtb and apply overlay in init_kernel_dtb(), so that we don't need to apply
  * again, we would pass the current fdt to kernel.
  */
-#if defined(CONFIG_OF_LIBFDT_OVERLAY) && !defined(CONFIG_USING_KERNEL_DTB)
+#if defined(CONFIG_CMD_DTIMG) && \
+    defined(CONFIG_OF_LIBFDT_OVERLAY) && !defined(CONFIG_USING_KERNEL_DTB)
 	android_fdt_overlay_apply((void *)fdt_addr);
 #endif
 #endif

commit 93cbd3c1e3d8f0017b10d8261741956bfb889133
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Aug 6 19:16:45 2018 +0800

    rockchip: rk3308: don't pass device serial number to kernel
    
    We want to generate the devices serail number from
    linux kernel itself.
    
    Change-Id: Idfc8461a703e314a626013a3ecb622069d2fd3db
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/configs/evb-aarch32-rk3308_defconfig b/configs/evb-aarch32-rk3308_defconfig
index bfb681e62c..5a2b43d056 100644
--- a/configs/evb-aarch32-rk3308_defconfig
+++ b/configs/evb-aarch32-rk3308_defconfig
@@ -13,6 +13,7 @@ CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 CONFIG_ANDROID_BOOT_IMAGE=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+# CONFIG_PASS_DEVICE_SERIAL_BY_FDT is not set
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index 9bddfec667..48ac5837a6 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -12,6 +12,7 @@ CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 CONFIG_ANDROID_BOOT_IMAGE=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+# CONFIG_PASS_DEVICE_SERIAL_BY_FDT is not set
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y

commit 5f08e86fd7afb2df9c4643676c4ae78997a919d1
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Aug 6 19:12:45 2018 +0800

    fdt: add config to enable/disable fdt_root function
    
    commit 10be5b5d3a8d ("fdt: Pass the device serial number through
    devicetree") introduce function fdt_root to pass a device serial
    number to kernel through devicetree. But sometimes we may want
    to generate the device serial number from kernel itself. So it's
    better to have a configuration to enable/disable this function.
    
    Change-Id: I9efd4fd63faca9ce5e44cade856993be251f4760
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/common/Kconfig b/common/Kconfig
index 4ec8cfd83c..8856c7d520 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -178,6 +178,13 @@ config SPI_BOOT
 
 endmenu
 
+config PASS_DEVICE_SERIAL_BY_FDT
+	bool "Pass the device serial number to kernel through devicetree"
+	default y
+	help
+	  Enabling this will pass a device serial number to kernel by devicetree
+	  "serial-number" properties.
+
 config BOOTDELAY
 	int "delay in seconds before automatically booting"
 	default 2
diff --git a/common/image-fdt.c b/common/image-fdt.c
index 9f87829f24..94e53d47b1 100644
--- a/common/image-fdt.c
+++ b/common/image-fdt.c
@@ -487,11 +487,12 @@ int image_setup_libfdt(bootm_headers_t *images, void *blob,
 	ulong *initrd_end = &images->initrd_end;
 	int ret = -EPERM;
 	int fdt_ret;
-
+#if defined(CONFIG_PASS_DEVICE_SERIAL_BY_FDT)
 	if (fdt_root(blob) < 0) {
 		printf("ERROR: root node setup failed\n");
 		goto err;
 	}
+#endif
 	if (fdt_chosen(blob) < 0) {
 		printf("ERROR: /chosen node create failed\n");
 		goto err;

commit 94058cdffdad7ca2cbb860135dcd898b0eb9a6cb
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Mon Aug 6 19:54:38 2018 +0800

    rockchip: clk: rk3308: Add clk_set_defaults()
    
    As clk_set_defaults() is removed in device core, so add it in clock
    driver.
    
    Change-Id: If09a9ddca27a3d1fc0747d8cafbeaacd8ef97d36
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index 1646d7c6ab..73b774dfed 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -82,13 +82,6 @@ static struct rockchip_pll_clock rk3308_pll_clks[] = {
 		      RK3308_MODE_CON, 6, 10, 0, NULL),
 };
 
-static ulong rk3308_bus_set_clk(struct rk3308_clk_priv *priv, ulong clk_id,
-				ulong hz);
-static ulong rk3308_peri_set_clk(struct rk3308_clk_priv *priv, ulong clk_id,
-				 ulong hz);
-static ulong rk3308_audio_set_clk(struct rk3308_clk_priv *priv,
-				  ulong clk_id, ulong hz);
-
 static ulong rk3308_armclk_set_clk(struct rk3308_clk_priv *priv, ulong hz)
 {
 	struct rk3308_cru *cru = priv->cru;
@@ -148,34 +141,6 @@ static void rk3308_clk_get_pll_rate(struct rk3308_clk_priv *priv)
 						       priv->cru, VPLL1);
 }
 
-static void rkclk_init(struct udevice *dev)
-{
-	struct rk3308_clk_priv *priv = dev_get_priv(dev);
-	int ret;
-
-	if (rockchip_pll_get_rate(&rk3308_pll_clks[APLL],
-				  priv->cru, APLL) != APLL_HZ) {
-		ret = rk3308_armclk_set_clk(priv, APLL_HZ);
-		if (ret < 0)
-			printf("%s failed to set armclk rate\n", __func__);
-	}
-
-#ifndef CONFIG_USING_KERNEL_DTB
-	rk3308_clk_get_pll_rate(priv);
-
-	rk3308_bus_set_clk(priv, ACLK_BUS, BUS_ACLK_HZ);
-	rk3308_bus_set_clk(priv, HCLK_BUS, BUS_HCLK_HZ);
-	rk3308_bus_set_clk(priv, PCLK_BUS, BUS_PCLK_HZ);
-
-	rk3308_peri_set_clk(priv, ACLK_PERI, PERI_ACLK_HZ);
-	rk3308_peri_set_clk(priv, HCLK_PERI, PERI_HCLK_HZ);
-	rk3308_peri_set_clk(priv, PCLK_PERI, PERI_PCLK_HZ);
-
-	rk3308_audio_set_clk(priv, HCLK_AUDIO, AUDIO_HCLK_HZ);
-	rk3308_audio_set_clk(priv, PCLK_AUDIO, AUDIO_PCLK_HZ);
-#endif
-}
-
 static ulong rk3308_i2c_get_clk(struct clk *clk)
 {
 	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
@@ -707,8 +672,6 @@ static ulong rk3308_clk_get_rate(struct clk *clk)
 	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
 	ulong rate = 0;
 
-	rk3308_clk_get_pll_rate(priv);
-
 	debug("%s id:%ld\n", __func__, clk->id);
 
 	switch (clk->id) {
@@ -781,8 +744,6 @@ static ulong rk3308_clk_set_rate(struct clk *clk, ulong rate)
 	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
 	ulong ret = 0;
 
-	rk3308_clk_get_pll_rate(priv);
-
 	debug("%s %ld %ld\n", __func__, clk->id, rate);
 
 	switch (clk->id) {
@@ -973,9 +934,42 @@ static struct clk_ops rk3308_clk_ops = {
 	.set_phase	= rk3308_clk_set_phase,
 };
 
+static void rk3308_clk_init(struct udevice *dev)
+{
+	struct rk3308_clk_priv *priv = dev_get_priv(dev);
+	int ret;
+
+	if (rockchip_pll_get_rate(&rk3308_pll_clks[APLL],
+				  priv->cru, APLL) != APLL_HZ) {
+		ret = rk3308_armclk_set_clk(priv, APLL_HZ);
+		if (ret < 0)
+			printf("%s failed to set armclk rate\n", __func__);
+	}
+
+	rk3308_clk_get_pll_rate(priv);
+
+	rk3308_bus_set_clk(priv, ACLK_BUS, BUS_ACLK_HZ);
+	rk3308_bus_set_clk(priv, HCLK_BUS, BUS_HCLK_HZ);
+	rk3308_bus_set_clk(priv, PCLK_BUS, BUS_PCLK_HZ);
+
+	rk3308_peri_set_clk(priv, ACLK_PERI, PERI_ACLK_HZ);
+	rk3308_peri_set_clk(priv, HCLK_PERI, PERI_HCLK_HZ);
+	rk3308_peri_set_clk(priv, PCLK_PERI, PERI_PCLK_HZ);
+
+	rk3308_audio_set_clk(priv, HCLK_AUDIO, AUDIO_HCLK_HZ);
+	rk3308_audio_set_clk(priv, PCLK_AUDIO, AUDIO_PCLK_HZ);
+}
+
 static int rk3308_clk_probe(struct udevice *dev)
 {
-	rkclk_init(dev);
+	int ret;
+
+	rk3308_clk_init(dev);
+
+	/* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
+	ret = clk_set_defaults(dev);
+	if (ret)
+		debug("%s clk_set_defaults failed %d\n", __func__, ret);
 
 	return 0;
 }

commit 03a6c0298940781f1b9a2599a8e2c3e5aa2189dc
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Mon Aug 6 19:22:08 2018 +0800

    rockchip: clk: rk3308: Add support to set and get armclk rate
    
    Change-Id: I2f4bbed7d6c43f340892968ce8e2ed417f975e97
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
index 708d8bd4b2..ba331115b3 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
@@ -47,7 +47,7 @@ struct rk3308_clk_info {
 /* Private data for the clock driver - used by rockchip_get_cru() */
 struct rk3308_clk_priv {
 	struct rk3308_cru *cru;
-	ulong apll_hz;
+	ulong armclk_hz;;
 	ulong dpll_hz;
 	ulong vpll0_hz;
 	ulong vpll1_hz;
diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index 3421d786d5..1646d7c6ab 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -34,6 +34,13 @@ enum {
 	.name = _name,				\
 }
 
+#define RK3308_CPUCLK_RATE(_rate, _aclk_div, _pclk_div)		\
+{								\
+	.rate	= _rate##U,					\
+	.aclk_div = _aclk_div,					\
+	.pclk_div = _pclk_div,					\
+}
+
 static struct rockchip_pll_rate_table rk3308_pll_rates[] = {
 	/* _mhz, _refdiv, _fbdiv, _postdiv1, _postdiv2, _dsmpd, _frac */
 	RK3036_PLL_RATE(1300000000, 6, 325, 1, 1, 1, 0),
@@ -42,6 +49,13 @@ static struct rockchip_pll_rate_table rk3308_pll_rates[] = {
 	RK3036_PLL_RATE(748000000, 2, 187, 3, 1, 1, 0),
 };
 
+static struct rockchip_cpu_rate_table rk3308_cpu_rates[] = {
+	RK3308_CPUCLK_RATE(1200000000, 1, 5),
+	RK3308_CPUCLK_RATE(1008000000, 1, 5),
+	RK3308_CPUCLK_RATE(816000000, 1, 3),
+	RK3308_CPUCLK_RATE(600000000, 1, 3),
+};
+
 static const struct rk3308_clk_info clks_dump[] = {
 	RK3308_CLK_DUMP(PLL_APLL, "apll"),
 	RK3308_CLK_DUMP(PLL_DPLL, "dpll"),
@@ -75,6 +89,52 @@ static ulong rk3308_peri_set_clk(struct rk3308_clk_priv *priv, ulong clk_id,
 static ulong rk3308_audio_set_clk(struct rk3308_clk_priv *priv,
 				  ulong clk_id, ulong hz);
 
+static ulong rk3308_armclk_set_clk(struct rk3308_clk_priv *priv, ulong hz)
+{
+	struct rk3308_cru *cru = priv->cru;
+	const struct rockchip_cpu_rate_table *rate;
+	ulong old_rate;
+
+	rate = rockchip_get_cpu_settings(rk3308_cpu_rates, hz);
+	if (!rate) {
+		printf("%s unsupport rate\n", __func__);
+		return -EINVAL;
+	}
+
+	/*
+	 * select apll as cpu/core clock pll source and
+	 * set up dependent divisors for PERI and ACLK clocks.
+	 * core hz : apll = 1:1
+	 */
+	old_rate = rockchip_pll_get_rate(&rk3308_pll_clks[APLL],
+					 priv->cru, APLL);
+	if (old_rate > hz) {
+		if (rockchip_pll_set_rate(&rk3308_pll_clks[APLL],
+					  priv->cru, APLL, hz))
+			return -EINVAL;
+		rk_clrsetreg(&cru->clksel_con[0],
+			     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK |
+			     CORE_ACLK_DIV_MASK | CORE_DBG_DIV_MASK,
+			     rate->aclk_div << CORE_ACLK_DIV_SHIFT |
+			     rate->pclk_div << CORE_DBG_DIV_SHIFT |
+			     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
+			     0 << CORE_DIV_CON_SHIFT);
+	} else if (old_rate < hz) {
+		rk_clrsetreg(&cru->clksel_con[0],
+			     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK |
+			     CORE_ACLK_DIV_MASK | CORE_DBG_DIV_MASK,
+			     rate->aclk_div << CORE_ACLK_DIV_SHIFT |
+			     rate->pclk_div << CORE_DBG_DIV_SHIFT |
+			     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
+			     0 << CORE_DIV_CON_SHIFT);
+		if (rockchip_pll_set_rate(&rk3308_pll_clks[APLL],
+					  priv->cru, APLL, hz))
+			return -EINVAL;
+	}
+
+	return rockchip_pll_get_rate(&rk3308_pll_clks[APLL], priv->cru, APLL);
+}
+
 static void rk3308_clk_get_pll_rate(struct rk3308_clk_priv *priv)
 {
 	if (!priv->dpll_hz)
@@ -91,30 +151,14 @@ static void rk3308_clk_get_pll_rate(struct rk3308_clk_priv *priv)
 static void rkclk_init(struct udevice *dev)
 {
 	struct rk3308_clk_priv *priv = dev_get_priv(dev);
-	struct rk3308_cru *cru = priv->cru;
-	u32 aclk_div, pclk_div;
-
-	/* init pll */
-	if (rockchip_pll_set_rate(&rk3308_pll_clks[APLL], priv->cru, APLL,
-				  APLL_HZ))
-		printf("%s set apll unsuccessfully\n", __func__);
+	int ret;
 
-	/*
-	 * select apll as cpu/core clock pll source and
-	 * set up dependent divisors for PCLK and ACLK clocks.
-	 * core hz : apll = 1:1
-	 */
-	priv->apll_hz = rockchip_pll_get_rate(&rk3308_pll_clks[APLL],
-					      priv->cru, APLL);
-	aclk_div = priv->apll_hz / CORE_ACLK_HZ - 1;
-	pclk_div = priv->apll_hz / CORE_DBG_HZ - 1;
-	rk_clrsetreg(&cru->clksel_con[0],
-		     CORE_ACLK_DIV_MASK | CORE_DBG_DIV_MASK |
-		     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK,
-		     aclk_div << CORE_ACLK_DIV_SHIFT |
-		     pclk_div << CORE_DBG_DIV_SHIFT |
-		     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
-		     0 << CORE_DIV_CON_SHIFT);
+	if (rockchip_pll_get_rate(&rk3308_pll_clks[APLL],
+				  priv->cru, APLL) != APLL_HZ) {
+		ret = rk3308_armclk_set_clk(priv, APLL_HZ);
+		if (ret < 0)
+			printf("%s failed to set armclk rate\n", __func__);
+	}
 
 #ifndef CONFIG_USING_KERNEL_DTB
 	rk3308_clk_get_pll_rate(priv);
@@ -669,6 +713,7 @@ static ulong rk3308_clk_get_rate(struct clk *clk)
 
 	switch (clk->id) {
 	case PLL_APLL:
+	case ARMCLK:
 		rate = rockchip_pll_get_rate(&rk3308_pll_clks[APLL],
 					     priv->cru, APLL);
 		break;
@@ -747,6 +792,11 @@ static ulong rk3308_clk_set_rate(struct clk *clk, ulong rate)
 		priv->dpll_hz = rockchip_pll_get_rate(&rk3308_pll_clks[DPLL],
 						      priv->cru, DPLL);
 		break;
+	case ARMCLK:
+		if (priv->armclk_hz)
+			rk3308_armclk_set_clk(priv, rate);
+		priv->armclk_hz = rate;
+		break;
 	case HCLK_SDMMC:
 	case HCLK_EMMC:
 	case SCLK_SDMMC:

commit 27ee7641c93d0473a4fa1648bcd6106e65b6ba31
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Mon Aug 6 18:01:00 2018 +0800

    rockchip: clk: rk3308: Use common apis for setting and getting pll rate
    
    Change-Id: Id60ebe239148c7fa7bb8ca1abb411570596c6e28
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
index ca74a833d7..708d8bd4b2 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
@@ -27,6 +27,9 @@
 #define AUDIO_HCLK_HZ	100000000
 #define AUDIO_PCLK_HZ	100000000
 
+#define RK3308_PLL_CON(x)	((x) * 0x4)
+#define RK3308_MODE_CON		0xa0
+
 /* RK3308 pll id */
 enum rk3308_pll_id {
 	APLL,
@@ -41,16 +44,6 @@ struct rk3308_clk_info {
 	char *name;
 };
 
-struct pll_rate_table {
-	unsigned long rate;
-	unsigned int fbdiv;
-	unsigned int postdiv1;
-	unsigned int refdiv;
-	unsigned int postdiv2;
-	unsigned int dsmpd;
-	unsigned int frac;
-};
-
 /* Private data for the clock driver - used by rockchip_get_cru() */
 struct rk3308_clk_priv {
 	struct rk3308_cru *cru;
diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index 93e4e7d6fb..3421d786d5 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -34,34 +34,12 @@ enum {
 	.name = _name,				\
 }
 
-#define RK3308_PLL_RATE(_rate, _refdiv, _fbdiv, _postdiv1,	\
-			_postdiv2, _dsmpd, _frac)		\
-{								\
-	.rate	= _rate##U,					\
-	.fbdiv = _fbdiv,					\
-	.postdiv1 = _postdiv1,					\
-	.refdiv = _refdiv,					\
-	.postdiv2 = _postdiv2,					\
-	.dsmpd = _dsmpd,					\
-	.frac = _frac,						\
-}
-
-static struct pll_rate_table rk3308_pll_rates[] = {
+static struct rockchip_pll_rate_table rk3308_pll_rates[] = {
 	/* _mhz, _refdiv, _fbdiv, _postdiv1, _postdiv2, _dsmpd, _frac */
-	RK3308_PLL_RATE(1300000000, 6, 325, 1, 1, 1, 0),
-	RK3308_PLL_RATE(1200000000, 1, 50, 1, 1, 1, 0),
-	RK3308_PLL_RATE(816000000, 1, 68, 2, 1, 1, 0),
-	RK3308_PLL_RATE(748000000, 2, 187, 3, 1, 1, 0),
-};
-
-static u8 pll_mode_shift[PLL_COUNT] = {
-	APLL_MODE_SHIFT, DPLL_MODE_SHIFT, VPLL0_MODE_SHIFT,
-	VPLL1_MODE_SHIFT
-};
-
-static u32 pll_mode_mask[PLL_COUNT] = {
-	APLL_MODE_MASK, DPLL_MODE_MASK, VPLL0_MODE_MASK,
-	VPLL1_MODE_MASK
+	RK3036_PLL_RATE(1300000000, 6, 325, 1, 1, 1, 0),
+	RK3036_PLL_RATE(1200000000, 1, 50, 1, 1, 1, 0),
+	RK3036_PLL_RATE(816000000, 1, 68, 2, 1, 1, 0),
+	RK3036_PLL_RATE(748000000, 2, 187, 3, 1, 1, 0),
 };
 
 static const struct rk3308_clk_info clks_dump[] = {
@@ -79,6 +57,17 @@ static const struct rk3308_clk_info clks_dump[] = {
 	RK3308_CLK_DUMP(PCLK_AUDIO, "pclk_audio"),
 };
 
+static struct rockchip_pll_clock rk3308_pll_clks[] = {
+	[APLL] = PLL(pll_rk3328, PLL_APLL, RK3308_PLL_CON(0),
+		     RK3308_MODE_CON, 0, 10, 0, rk3308_pll_rates),
+	[DPLL] = PLL(pll_rk3328, PLL_DPLL, RK3308_PLL_CON(8),
+		     RK3308_MODE_CON, 2, 10, 0, NULL),
+	[VPLL0] = PLL(pll_rk3328, PLL_VPLL0, RK3308_PLL_CON(16),
+		      RK3308_MODE_CON, 4, 10, 0, NULL),
+	[VPLL1] = PLL(pll_rk3328, PLL_VPLL1, RK3308_PLL_CON(24),
+		      RK3308_MODE_CON, 6, 10, 0, NULL),
+};
+
 static ulong rk3308_bus_set_clk(struct rk3308_clk_priv *priv, ulong clk_id,
 				ulong hz);
 static ulong rk3308_peri_set_clk(struct rk3308_clk_priv *priv, ulong clk_id,
@@ -86,152 +75,17 @@ static ulong rk3308_peri_set_clk(struct rk3308_clk_priv *priv, ulong clk_id,
 static ulong rk3308_audio_set_clk(struct rk3308_clk_priv *priv,
 				  ulong clk_id, ulong hz);
 
-static const struct pll_rate_table *get_pll_settings(unsigned long rate)
-{
-	unsigned int rate_count = ARRAY_SIZE(rk3308_pll_rates);
-	int i;
-
-	for (i = 0; i < rate_count; i++) {
-		if (rate == rk3308_pll_rates[i].rate)
-			return &rk3308_pll_rates[i];
-	}
-
-	return NULL;
-}
-
-/*
- * How to calculate the PLL:
- * Formulas also embedded within the Fractional PLL Verilog model:
- * If DSMPD = 1 (DSM is disabled, "integer mode")
- * FOUTVCO = FREF / REFDIV * FBDIV
- * FOUTPOSTDIV = FOUTVCO / POSTDIV1 / POSTDIV2
- * Where:
- * FOUTVCO = Fractional PLL non-divided output frequency
- * FOUTPOSTDIV = Fractional PLL divided output frequency
- *               (output of second post divider)
- * FREF = Fractional PLL input reference frequency, (the OSC_HZ 24MHz input)
- * REFDIV = Fractional PLL input reference clock divider
- * FBDIV = Integer value programmed into feedback divide
- *
- */
-
-static int rkclk_set_pll(struct rk3308_clk_priv *priv,
-			 enum rk3308_pll_id pll_id,
-			 unsigned long drate)
-{
-	struct rk3308_cru *cru = priv->cru;
-	struct rk3308_pll *pll;
-	unsigned int *mode;
-	const struct pll_rate_table *rate;
-	uint vco_hz, output_hz;
-
-	rate = get_pll_settings(drate);
-	if (!rate) {
-		printf("%s unsupport rate\n", __func__);
-		return -EINVAL;
-	}
-
-	/* All PLLs have same VCO and output frequency range restrictions. */
-	vco_hz = OSC_HZ / 1000 * rate->fbdiv / rate->refdiv * 1000;
-	output_hz = vco_hz / rate->postdiv1 / rate->postdiv2;
-
-	pll = &cru->pll[pll_id];
-	mode = &cru->mode;
-
-	debug("PLL at %p: fb=%d, ref=%d, pst1=%d, pst2=%d, vco=%u Hz, output=%u Hz\n",
-	      pll, rate->fbdiv, rate->refdiv, rate->postdiv1,
-	      rate->postdiv2, vco_hz, output_hz);
-	assert(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ &&
-	       output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ);
-
-	/*
-	 * When power on or changing PLL setting,
-	 * we must force PLL into slow mode to ensure output stable clock.
-	 */
-	rk_clrsetreg(mode, pll_mode_mask[pll_id],
-		     PLLMUX_FROM_XIN24M << pll_mode_shift[pll_id]);
-
-	/* use integer mode */
-	rk_setreg(&pll->con1, 1 << PLL_DSMPD_SHIFT);
-	/* Power down */
-	rk_setreg(&pll->con1, 1 << PLL_PD_SHIFT);
-
-	rk_clrsetreg(&pll->con0,
-		     PLL_POSTDIV1_MASK | PLL_FBDIV_MASK,
-		     (rate->postdiv1 << PLL_POSTDIV1_SHIFT) | rate->fbdiv);
-	rk_clrsetreg(&pll->con1, PLL_POSTDIV2_MASK | PLL_REFDIV_MASK,
-		     (rate->postdiv2 << PLL_POSTDIV2_SHIFT |
-		     rate->refdiv << PLL_REFDIV_SHIFT));
-
-	/* Power Up */
-	rk_clrreg(&pll->con1, 1 << PLL_PD_SHIFT);
-
-	/* waiting for pll lock */
-	while (!(readl(&pll->con1) & (1 << PLL_LOCK_STATUS_SHIFT)))
-		udelay(1);
-
-	rk_clrsetreg(mode, pll_mode_mask[pll_id],
-		     PLLMUX_FROM_PLL << pll_mode_shift[pll_id]);
-
-	return 0;
-}
-
-static uint32_t rkclk_pll_get_rate(struct rk3308_clk_priv *priv,
-				   enum rk3308_pll_id pll_id)
-{
-	struct rk3308_cru *cru = priv->cru;
-	struct rk3308_pll *pll;
-	u32 con, refdiv, fbdiv, postdiv1, postdiv2, dsmpd, frac;
-	u32 rate = 0;
-	u64 frac_rate64 = 0;
-	uint shift;
-	uint mask;
-
-	pll = &cru->pll[pll_id];
-	con = readl(&cru->mode);
-
-	shift = pll_mode_shift[pll_id];
-	mask = pll_mode_mask[pll_id];
-
-	switch ((con & mask) >> shift) {
-	case PLLMUX_FROM_XIN24M:
-		return OSC_HZ;
-	case PLLMUX_FROM_PLL:
-		/* normal mode */
-		con = readl(&pll->con0);
-		postdiv1 = (con & PLL_POSTDIV1_MASK) >> PLL_POSTDIV1_SHIFT;
-		fbdiv = (con & PLL_FBDIV_MASK) >> PLL_FBDIV_SHIFT;
-		con = readl(&pll->con1);
-		postdiv2 = (con & PLL_POSTDIV2_MASK) >> PLL_POSTDIV2_SHIFT;
-		refdiv = (con & PLL_REFDIV_MASK) >> PLL_REFDIV_SHIFT;
-		dsmpd = (con & PLL_DSMPD_MASK) >> PLL_DSMPD_SHIFT;
-		con = readl(&pll->con2);
-		frac = con & PLL_FRAC_DIV;
-		rate = (24 * fbdiv / (refdiv * postdiv1 * postdiv2)) * 1000000;
-		if (dsmpd == 0) {
-			/* fractional mode */
-			frac_rate64 = 24000000 * (u64)frac;
-			do_div(frac_rate64, refdiv);
-			frac_rate64 >>= 24;
-			do_div(frac_rate64, postdiv1);
-			do_div(frac_rate64, postdiv2);
-			rate += (uint32_t)frac_rate64;
-		}
-		return rate;
-	case PLLMUX_FROM_RTC32K:
-	default:
-		return 32768;
-	}
-}
-
 static void rk3308_clk_get_pll_rate(struct rk3308_clk_priv *priv)
 {
 	if (!priv->dpll_hz)
-		priv->dpll_hz = rkclk_pll_get_rate(priv, DPLL);
+		priv->dpll_hz = rockchip_pll_get_rate(&rk3308_pll_clks[DPLL],
+						      priv->cru, DPLL);
 	if (!priv->vpll0_hz)
-		priv->vpll0_hz = rkclk_pll_get_rate(priv, VPLL0);
+		priv->vpll0_hz = rockchip_pll_get_rate(&rk3308_pll_clks[VPLL0],
+						       priv->cru, VPLL0);
 	if (!priv->vpll1_hz)
-		priv->vpll1_hz = rkclk_pll_get_rate(priv, VPLL1);
+		priv->vpll1_hz = rockchip_pll_get_rate(&rk3308_pll_clks[VPLL1],
+						       priv->cru, VPLL1);
 }
 
 static void rkclk_init(struct udevice *dev)
@@ -241,7 +95,8 @@ static void rkclk_init(struct udevice *dev)
 	u32 aclk_div, pclk_div;
 
 	/* init pll */
-	if (rkclk_set_pll(priv, APLL, APLL_HZ))
+	if (rockchip_pll_set_rate(&rk3308_pll_clks[APLL], priv->cru, APLL,
+				  APLL_HZ))
 		printf("%s set apll unsuccessfully\n", __func__);
 
 	/*
@@ -249,7 +104,8 @@ static void rkclk_init(struct udevice *dev)
 	 * set up dependent divisors for PCLK and ACLK clocks.
 	 * core hz : apll = 1:1
 	 */
-	priv->apll_hz = rkclk_pll_get_rate(priv, APLL);
+	priv->apll_hz = rockchip_pll_get_rate(&rk3308_pll_clks[APLL],
+					      priv->cru, APLL);
 	aclk_div = priv->apll_hz / CORE_ACLK_HZ - 1;
 	pclk_div = priv->apll_hz / CORE_DBG_HZ - 1;
 	rk_clrsetreg(&cru->clksel_con[0],
@@ -813,16 +669,20 @@ static ulong rk3308_clk_get_rate(struct clk *clk)
 
 	switch (clk->id) {
 	case PLL_APLL:
-		rate = rkclk_pll_get_rate(priv, APLL);
+		rate = rockchip_pll_get_rate(&rk3308_pll_clks[APLL],
+					     priv->cru, APLL);
 		break;
 	case PLL_DPLL:
-		rate = rkclk_pll_get_rate(priv, DPLL);
+		rate = rockchip_pll_get_rate(&rk3308_pll_clks[DPLL],
+					     priv->cru, DPLL);
 		break;
 	case PLL_VPLL0:
-		rate = rkclk_pll_get_rate(priv, VPLL0);
+		rate = rockchip_pll_get_rate(&rk3308_pll_clks[VPLL0],
+					     priv->cru, VPLL0);
 		break;
 	case PLL_VPLL1:
-		rate = rkclk_pll_get_rate(priv, VPLL1);
+		rate = rockchip_pll_get_rate(&rk3308_pll_clks[VPLL1],
+					     priv->cru, VPLL1);
 		break;
 	case HCLK_SDMMC:
 	case HCLK_EMMC:
@@ -882,8 +742,10 @@ static ulong rk3308_clk_set_rate(struct clk *clk, ulong rate)
 
 	switch (clk->id) {
 	case PLL_DPLL:
-		ret = rkclk_set_pll(priv, DPLL, rate);
-		priv->dpll_hz = rkclk_pll_get_rate(priv, DPLL);
+		ret = rockchip_pll_set_rate(&rk3308_pll_clks[DPLL], priv->cru,
+					    DPLL, rate);
+		priv->dpll_hz = rockchip_pll_get_rate(&rk3308_pll_clks[DPLL],
+						      priv->cru, DPLL);
 		break;
 	case HCLK_SDMMC:
 	case HCLK_EMMC:

commit c996ae8a4350d18091d4d3e23cf5a83a95be90e1
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Mon Aug 6 15:51:13 2018 +0800

    rockchip: clk: px30: Add support to get vopl aclk and dclk
    
    Change-Id: Id40cbddf780889e308839b7beb2cfb894d407914
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_px30.h b/arch/arm/include/asm/arch-rockchip/cru_px30.h
index 1e58d9082b..f94def58ca 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_px30.h
@@ -209,8 +209,8 @@ enum {
 	DCLK_VOPL_SEL_24M,
 	DCLK_VOPL_PLL_SEL_SHIFT	= 11,
 	DCLK_VOPL_PLL_SEL_MASK	= 0x1 << DCLK_VOPL_PLL_SEL_SHIFT,
-	DCLK_VOPL_PLL_SEL_CPLL	= 0,
-	DCLK_VOPL_PLL_SEL_NPLL,
+	DCLK_VOPL_PLL_SEL_NPLL	= 0,
+	DCLK_VOPL_PLL_SEL_CPLL,
 	DCLK_VOPL_DIV_SHIFT	= 0,
 	DCLK_VOPL_DIV_MASK	= 0xff,
 
diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index a2bb393b38..888dbd3697 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -611,6 +611,7 @@ static ulong px30_vop_get_clk(struct px30_clk_priv *priv, ulong clk_id)
 
 	switch (clk_id) {
 	case ACLK_VOPB:
+	case ACLK_VOPL:
 		con = readl(&cru->clksel_con[3]);
 		div = con & ACLK_VO_DIV_MASK;
 		parent = priv->gpll_hz;
@@ -620,6 +621,11 @@ static ulong px30_vop_get_clk(struct px30_clk_priv *priv, ulong clk_id)
 		div = con & DCLK_VOPB_DIV_MASK;
 		parent = rkclk_pll_get_rate(&cru->pll[CPLL], &cru->mode, CPLL);
 		break;
+	case DCLK_VOPL:
+		con = readl(&cru->clksel_con[8]);
+		div = con & DCLK_VOPL_DIV_MASK;
+		parent = rkclk_pll_get_rate(&cru->pll[NPLL], &cru->mode, NPLL);
+		break;
 	default:
 		return -ENOENT;
 	}
@@ -670,7 +676,7 @@ static ulong px30_vop_set_clk(struct px30_clk_priv *priv, ulong clk_id, uint hz)
 			assert(src_clk_div - 1 <= 255);
 			rkclk_set_pll(&cru->pll[NPLL], &cru->mode, NPLL, hz * src_clk_div);
 		}
-		rk_clrsetreg(&cru->clksel_con[5],
+		rk_clrsetreg(&cru->clksel_con[8],
 			     DCLK_VOPL_SEL_MASK | DCLK_VOPL_PLL_SEL_MASK |
 			     DCLK_VOPL_DIV_MASK,
 			     DCLK_VOPL_SEL_DIVOUT << DCLK_VOPL_SEL_SHIFT |

commit fe784db32b6550168a145425061e0406221c413b
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Mon Aug 6 11:59:29 2018 +0800

    rockchip: clk: px30: Add px30_clk_init()
    
    Add support to initialize gpll, bus and peri clock rate.
    
    Change-Id: I84f496094606ac2231ea27ad9072b079c45f9f94
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_px30.h b/arch/arm/include/asm/arch-rockchip/cru_px30.h
index 0120227587..1e58d9082b 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_px30.h
@@ -13,6 +13,13 @@
 #define OSC_HZ		(24 * MHz)
 
 #define APLL_HZ		(600 * MHz)
+#define GPLL_HZ		(1200 * MHz)
+#define ACLK_BUS_HZ	(200 * MHz)
+#define HCLK_BUS_HZ	(150 * MHz)
+#define PCLK_BUS_HZ	(100 * MHz)
+#define ACLK_PERI_HZ	(200 * MHz)
+#define HCLK_PERI_HZ	(150 * MHz)
+#define PCLK_PMU_HZ	(100 * MHz)
 
 /* PX30 pll id */
 enum px30_pll_id {
diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 2c1e05921b..a2bb393b38 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -1402,12 +1402,43 @@ static struct clk_ops px30_pmuclk_ops = {
 	.set_rate = px30_pmuclk_set_rate,
 };
 
+static void px30_clk_init(struct px30_pmuclk_priv *priv)
+{
+	struct udevice *cru_dev;
+	struct px30_clk_priv *cru_priv;
+	int ret;
+
+	priv->gpll_hz = px30_gpll_get_pmuclk(priv);
+	if (priv->gpll_hz != GPLL_HZ) {
+		ret = px30_gpll_set_pmuclk(priv, GPLL_HZ);
+		if (ret < 0)
+			printf("%s failed to set gpll rate\n", __func__);
+	}
+
+	ret = uclass_get_device_by_name(UCLASS_CLK,
+					"clock-controller@ff2b0000",
+					 &cru_dev);
+	if (ret) {
+		printf("%s failed to get cru device\n", __func__);
+		return;
+	}
+	cru_priv = dev_get_priv(cru_dev);
+	cru_priv->gpll_hz = priv->gpll_hz;
+
+	px30_bus_set_clk(cru_priv, ACLK_BUS_PRE, ACLK_BUS_HZ);
+	px30_bus_set_clk(cru_priv, HCLK_BUS_PRE, HCLK_BUS_HZ);
+	px30_bus_set_clk(cru_priv, PCLK_BUS_PRE, PCLK_BUS_HZ);
+	px30_peri_set_clk(cru_priv, ACLK_PERI_PRE, ACLK_PERI_HZ);
+	px30_peri_set_clk(cru_priv, HCLK_PERI_PRE, HCLK_PERI_HZ);
+	px30_pclk_pmu_set_pmuclk(priv, PCLK_PMU_HZ);
+}
+
 static int px30_pmuclk_probe(struct udevice *dev)
 {
 	struct px30_pmuclk_priv *priv = dev_get_priv(dev);
 	int ret;
 
-	priv->gpll_hz = px30_gpll_get_pmuclk(priv);
+	px30_clk_init(priv);
 
 	/* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
 	ret = clk_set_defaults(dev);

commit eab74a9212f9b2880013473bf3a1bfcbfd60b3f3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Aug 8 16:45:29 2018 +0800

    rockchip: sdram: reserve OP-TEE region when CONFIG_ARM64_BOOT_AARCH32 enabled.
    
    Because OP-TEE runs on AArch64 mode and enables dcache, U-Boot should also
    map its region cacheable.
    
    Change-Id: I3d3f1f869ecfe3c39c8ba56c1165e1d2fdac035a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
index 16e5c4eb28..f410fec514 100644
--- a/arch/arm/mach-rockchip/sdram_common.c
+++ b/arch/arm/mach-rockchip/sdram_common.c
@@ -62,7 +62,7 @@ int dram_init_banksize(void)
 	size_t top = min((unsigned long)(gd->ram_size + CONFIG_SYS_SDRAM_BASE),
 			 gd->ram_top);
 	struct tos_parameter_t *tos_parameter;
-	u32 checksum;
+	u32 checksum __maybe_unused;
 
 	tos_parameter = (struct tos_parameter_t *)(CONFIG_SYS_SDRAM_BASE +
 			TRUST_PARAMETER_OFFSET);
@@ -78,6 +78,40 @@ int dram_init_banksize(void)
 #endif
 	gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start;
 
+/*
+ * OP-TEE:
+ *	ARM64(AArch32) 64-bit: enable dcache; (U-boot: map region dcache cachable)
+ *	ARM 32-bit: disable dcache; (U-boot: map region dcache off)
+ */
+
+#if !defined(CONFIG_ARM64_BOOT_AARCH32)
+	if ((checksum == tos_parameter->checksum) &&
+	    (tos_parameter->tee_mem.flags == 1)) {
+		gd->bd->bi_dram[0].size = tos_parameter->tee_mem.phy_addr
+					- gd->bd->bi_dram[0].start;
+		gd->bd->bi_dram[1].start = tos_parameter->tee_mem.phy_addr +
+					tos_parameter->tee_mem.size;
+		gd->bd->bi_dram[1].size = top - gd->bd->bi_dram[1].start;
+	}
+#endif
+
+	return 0;
+}
+
+#if defined(CONFIG_ARM64_BOOT_AARCH32)
+int dram_initr_banksize(void)
+{
+	size_t top = min((unsigned long)(gd->ram_size + CONFIG_SYS_SDRAM_BASE),
+			 gd->ram_top);
+	struct tos_parameter_t *tos_parameter;
+	u32 checksum;
+
+	tos_parameter = (struct tos_parameter_t *)(CONFIG_SYS_SDRAM_BASE +
+			TRUST_PARAMETER_OFFSET);
+
+	checksum = trust_checksum((uint8_t *)(unsigned long)tos_parameter + 8,
+				  sizeof(struct tos_parameter_t) - 8);
+
 	if ((checksum == tos_parameter->checksum) &&
 	    (tos_parameter->tee_mem.flags == 1)) {
 		gd->bd->bi_dram[0].size = tos_parameter->tee_mem.phy_addr
@@ -90,6 +124,7 @@ int dram_init_banksize(void)
 	return 0;
 }
 #endif
+#endif
 
 size_t rockchip_sdram_size(phys_addr_t reg)
 {

commit 94fe42653b1cc4e47c28248aa7f2270b79fae32b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Aug 8 16:23:37 2018 +0800

    Revert "rockchip: sdram: implement dram_initr_banksize()"
    
    This reverts commit a678796b79736409196ef15a17e5d22cbbc0f4fd.
    
    Change-Id: Ideec712dbb37ce212f9667a3cee756887d60c9fe
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
index 548db9820a..16e5c4eb28 100644
--- a/arch/arm/mach-rockchip/sdram_common.c
+++ b/arch/arm/mach-rockchip/sdram_common.c
@@ -58,26 +58,6 @@ static uint16_t trust_checksum(const uint8_t *buf, uint16_t len)
 }
 
 int dram_init_banksize(void)
-{
-	size_t top = min((unsigned long)(gd->ram_size + CONFIG_SYS_SDRAM_BASE),
-			 gd->ram_top);
-
-#if defined(CONFIG_ARM64) || defined(CONFIG_ARM64_BOOT_AARCH32)
-	/* Reserve 0x200000 for ATF bl31 */
-	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE + 0x200000;
-#else
-	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
-#endif
-	gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start;
-
-	return 0;
-}
-
-/*
- * Resever firmware region after MMU set up, we need firmware region to be mapped
- * as cacheable to communication with firmware by share memory.
- */
-int dram_initr_banksize(void)
 {
 	size_t top = min((unsigned long)(gd->ram_size + CONFIG_SYS_SDRAM_BASE),
 			 gd->ram_top);
@@ -90,6 +70,14 @@ int dram_initr_banksize(void)
 	checksum = trust_checksum((uint8_t *)(unsigned long)tos_parameter + 8,
 				  sizeof(struct tos_parameter_t) - 8);
 
+#if defined(CONFIG_ARM64) || defined(CONFIG_ARM64_BOOT_AARCH32)
+	/* Reserve 0x200000 for ATF bl31 */
+	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE + 0x200000;
+#else
+	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+#endif
+	gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start;
+
 	if ((checksum == tos_parameter->checksum) &&
 	    (tos_parameter->tee_mem.flags == 1)) {
 		gd->bd->bi_dram[0].size = tos_parameter->tee_mem.phy_addr

commit f81a9e78e75a6b015adee7a446743fd346b03fa6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Aug 8 11:31:14 2018 +0800

    env: fix env_exist/append/update() words match issue
    
    solve some words match mistakes due to strstr().
    
    Change-Id: I79ca9bc9ed1e9aeb5472e158650890023afa3da3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/cmd/nvedit.c b/cmd/nvedit.c
index 96a4fab1c7..528b808c2b 100644
--- a/cmd/nvedit.c
+++ b/cmd/nvedit.c
@@ -301,23 +301,23 @@ static int env_append(const char *varname, const char *varvalue)
 	int len = 0;
 	char *oldvalue, *newvalue;
 
+	debug("%s: varvalue = %s\n", __func__, varvalue);
+
 	/* before import into hashtable */
 	if (!(gd->flags & GD_FLG_ENV_READY) || !varname)
 		return 1;
 
+	if (env_exist(varname, varvalue))
+		return 0;
+
+	debug("%s: reall append: %s\n", __func__, varvalue);
+
 	if (varvalue)
 		len += strlen(varvalue);
 
 	oldvalue = env_get(varname);
-	if (oldvalue) {
+	if (oldvalue)
 		len += strlen(oldvalue);
-		/* Exist ! */
-		if (strstr(oldvalue, varvalue)) {
-			debug("%s: '%s' is already exist in '%s'\n",
-			      __func__, varvalue, varname);
-			return 0;
-		}
-	}
 
 	newvalue = malloc(len + 2);
 	if (!newvalue) {
@@ -335,6 +335,7 @@ static int env_append(const char *varname, const char *varvalue)
 	if (varvalue)
 		strcat(newvalue, varvalue);
 
+	debug("%s: newvalue: %s\n", __func__, newvalue);
 	env_set(varname, newvalue);
 	free(newvalue);
 
@@ -423,7 +424,7 @@ int env_update_filter(const char *varname, const char *varvalue,
 	if (!varargs) {
 		env_set(varname, varvalue);
 		if (ignore && strstr(varvalue, ignore))
-			env_delete(varname, ignore);
+			env_delete(varname, ignore, 0);
 		return 0;
 	}
 
@@ -457,18 +458,23 @@ int env_update_filter(const char *varname, const char *varvalue,
 	 */
 	v_item = strtok(v_string_tok, " ");
 	while (v_item && j < ARGS_ITEM_NUM) {
-		debug("%s: <v_item %d>: %s\n", __func__, j, v_item);
+		debug("%s: <v_item %d>: %s ", __func__, j, v_item);
 
 		/* filter ignore string */
 		if (ignore && strstr(v_item, ignore)) {
 			v_item = strtok(NULL, " ");
+			debug("...ignore\n");
 			continue;
 		}
 
-		if (strstr(v_item, "="))
+		if (strstr(v_item, "=")) {
+			debug("\n");
 			v_items[j++] = v_item;
-		else
+		} else {
+			debug("... do append\n");
 			env_append(varname, v_item);
+		}
+
 		v_item = strtok(NULL, " ");
 	}
 
@@ -532,23 +538,69 @@ int env_update(const char *varname, const char *varvalue)
 	return env_update_filter(varname, varvalue, NULL);
 }
 
-int env_exist(const char *varname, const char *varvalue)
+#define VARVALUE_BUF_SIZE	512
+
+char *env_exist(const char *varname, const char *varvalue)
 {
-	char *value;
-	int ret = 0;
+	int len;
+	char *oldvalue, *p;
+	char buf[VARVALUE_BUF_SIZE];
 
 	/* before import into hashtable */
 	if (!(gd->flags & GD_FLG_ENV_READY) || !varname)
-		return 1;
+		return NULL;
 
-	value = env_get(varname);
-	if (value)
-		ret = strstr(value, varvalue) ? 1 : 0;
+	oldvalue = env_get(varname);
+	if (oldvalue) {
+		if (strlen(varvalue) > VARVALUE_BUF_SIZE) {
+			printf("%s: '%s' is too long than 512\n",
+			       __func__, varvalue);
+			return NULL;
+		}
 
-	return ret;
+		/* Match middle one ? */
+		snprintf(buf, VARVALUE_BUF_SIZE, " %s ", varvalue);
+		p = strstr(oldvalue, buf);
+		if (p) {
+			debug("%s: '%s' is already exist in '%s'(middle)\n",
+			      __func__, varvalue, varname);
+			return (p + 1);
+		} else {
+			debug("%s: not find in middle one\n", __func__);
+		}
+
+		/* Match last one ? */
+		snprintf(buf, VARVALUE_BUF_SIZE, " %s", varvalue);
+		p = strstr(oldvalue, buf);
+		if (p) {
+			if (*(p + strlen(varvalue) + 1) == '\0') {
+				debug("%s: '%s' is already exist in '%s'(last)\n",
+				      __func__, varvalue, varname);
+				return (p + 1);
+			}
+		} else {
+			debug("%s: not find in last one\n", __func__);
+		}
+
+		/* Match first one ? */
+		snprintf(buf, VARVALUE_BUF_SIZE, "%s ", varvalue);
+		p = strstr(oldvalue, buf);
+		if (p) {
+			len = strstr(p, " ") - oldvalue;
+			if (len == strlen(varvalue)) {
+				debug("%s: '%s' is already exist in '%s'(first)\n",
+				      __func__, varvalue, varname);
+				return p;
+			}
+		} else  {
+			debug("%s: not find in first one\n", __func__);
+		}
+	}
+
+	return NULL;
 }
 
-int env_delete(const char *varname, const char *varvalue)
+int env_delete(const char *varname, const char *varvalue, int complete_match)
 {
 	const char *str;
 	char *value, *start;
@@ -558,22 +610,25 @@ int env_delete(const char *varname, const char *varvalue)
 		return 1;
 
 	value = env_get(varname);
-	if (value) {
-		start = strstr(value, varvalue);
-		if (start) {
-			/* varvalue is not the last property */
-			str = strstr(start, " ");
-			if (str) {
-				/* Terminate, so cmdline can be dest for strcat() */
-				*start = '\0';
-				/* +1 to skip white space */
-				strcat((char *)value, (str + 1));
-			/* varvalue is the last property */
-			} else {
-				/* skip white space */
-				*(start - 1) = '\0';
-			}
-		}
+	if (!value)
+		return 0;
+
+	start = complete_match ?
+		env_exist(varname, varvalue) : strstr(value, varvalue);
+	if (!start)
+		return 0;
+
+	/* varvalue is not the last property */
+	str = strstr(start, " ");
+	if (str) {
+		/* Terminate, so cmdline can be dest for strcat() */
+		*start = '\0';
+		/* +1 to skip white space */
+		strcat((char *)value, (str + 1));
+	/* varvalue is the last property */
+	} else {
+		/* skip white space */
+		*(start - 1) = '\0';
 	}
 
 	return 0;
diff --git a/include/common.h b/include/common.h
index 911a6786bf..7c42b6453d 100644
--- a/include/common.h
+++ b/include/common.h
@@ -358,18 +358,19 @@ int env_update(const char *varname, const char *varvalue);
  *
  * @varname: Variable to look up
  * @value: Value to check
- * @return 1 if exist, 0 on error
+ * @return posItion of varvalue if exist, otherwise NULL
  */
-int env_exist(const char *varname, const char *varvalue);
+char *env_exist(const char *varname, const char *varvalue);
 
 /**
  * env_delete() - delete sub value of an environment variable
  *
  * @varname: Variable to look up
  * @value: Item head of value to delete
+ * @complete_match: complete match whole words
  * @return 0 if ok, 1 on error
  */
-int env_delete(const char *varname, const char *varvalue);
+int env_delete(const char *varname, const char *varvalue, int complete_match);
 
 /**
  * env_set_ulong() - set an environment variable to an integer

commit 7cef4c7ca2dc67fea175ca2b8721fdc30be96393
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Aug 8 11:35:19 2018 +0800

    fdt_support: add more debug info when merge bootargs
    
    Change-Id: Ib01c2b20bf2b71fe3079febcfb3b4e77e874026a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/fdt_support.c b/common/fdt_support.c
index df8e1a2b0d..fc588c3340 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -299,10 +299,12 @@ int fdt_chosen(void *fdt)
 #ifdef CONFIG_ARCH_ROCKCHIP
 		const char *bootargs;
 
+		debug("uboot bootargs: %s\n\n", str);
 		for (i = 0; i < ARRAY_SIZE(arr_bootargs); i++) {
 			bootargs = fdt_getprop(fdt, nodeoffset,
 					       arr_bootargs[i], NULL);
 			if (bootargs) {
+				debug("kernel %s: %s\n\n", arr_bootargs[i], bootargs);
 				/*
 				 * Append kernel bootargs
 				 * If use AB system, delete default "root=" which route
@@ -333,7 +335,7 @@ int fdt_chosen(void *fdt)
 		}
 	}
 
-	debug("bootargs = %s\n", env_get("bootargs"));
+	debug("merged bootargs: %s\n\n", env_get("bootargs"));
 
 	return fdt_fixup_stdout(fdt, nodeoffset);
 }

commit 4d5449372f42e3a60f56e04dbcfc47ea8dd56b93
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Aug 7 14:54:15 2018 +0800

    rk322x: enable CONFIG_SYS_CBSIZE to 2048
    
    Change-Id: I679763135529857f337d5fd7ccd34e8023ab6355
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h
index 5efc3aaf88..3d98be4e32 100644
--- a/include/configs/rk322x_common.h
+++ b/include/configs/rk322x_common.h
@@ -11,7 +11,7 @@
 
 #define CONFIG_SKIP_LOWLEVEL_INIT
 #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
-#define CONFIG_SYS_CBSIZE		1024
+#define CONFIG_SYS_CBSIZE		2048
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/*  64M */
 
 

commit 19f6a169245a0647f7a292b0d590bcc0a48e5203
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Aug 7 14:27:34 2018 +0800

    part: rkparm: add RKPARAM_ENTRY_NUMBERS definition
    
    rkparam shouldn't depends on GPT partition.
    
    Change-Id: Ifc235c4166facadfc2fe0eb6b08ce7fd8850738b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/disk/part_rkparm.c b/disk/part_rkparm.c
index 8e2f37163f..b4a4359f4f 100644
--- a/disk/part_rkparm.c
+++ b/disk/part_rkparm.c
@@ -213,7 +213,7 @@ static int part_test_rkparm(struct blk_desc *dev_desc)
 U_BOOT_PART_TYPE(b_rkparm) = {
 	.name		= "RKPARM",
 	.part_type	= PART_TYPE_RKPARM,
-	.max_entries	= GPT_ENTRY_NUMBERS,
+	.max_entries	= RKPARM_ENTRY_NUMBERS,
 	.get_info	= part_get_info_ptr(part_get_info_rkparm),
 	.print		= part_print_ptr(part_print_rkparm),
 	.test		= part_test_rkparm,
diff --git a/include/part.h b/include/part.h
index f8b04b08b0..5a42526d00 100644
--- a/include/part.h
+++ b/include/part.h
@@ -36,6 +36,7 @@ struct block_drvr {
 #define ISO_ENTRY_NUMBERS	64
 #define MAC_ENTRY_NUMBERS	64
 #define AMIGA_ENTRY_NUMBERS	8
+#define RKPARM_ENTRY_NUMBERS	128
 /*
  * Type string for U-Boot bootable partitions
  */

commit d156c9ff6fddc6358d6746127b8dc4e9ca224857
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Fri Jul 20 17:56:28 2018 +0800

    lib: optee_client: v2 client support compile to 32 bits
    
    Change-Id: I25cbbe486016cbe6fb1a6eff440bb7efab46a4c6
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/OpteeClientRPC.c b/lib/optee_clientApi/OpteeClientRPC.c
index 5f07f84d31..810665f3af 100644
--- a/lib/optee_clientApi/OpteeClientRPC.c
+++ b/lib/optee_clientApi/OpteeClientRPC.c
@@ -147,7 +147,7 @@ TEEC_Result OpteeRpcCmdLoadV2Ta(t_teesmc32_arg *TeeSmc32Arg)
 		debug("return size of TA, keymaster_size = 0x%x", keymaster_size);
 		TeeSmc32Param[1].u.memref.size = keymaster_size;
 	} else {
-		memcpy((void *)TeeSmc32Param[1].u.memref.buf_ptr,
+		memcpy((void *)(size_t)TeeSmc32Param[1].u.memref.buf_ptr,
 			(void *)keymaster_data, TeeSmc32Param[1].u.memref.size);
 		debug("memref.buf_ptr = 0x%llx; memref.size = 0x%llx",
 			TeeSmc32Param[1].u.memref.buf_ptr,
@@ -571,7 +571,7 @@ TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs)
 #endif
 #ifdef CONFIG_OPTEE_V2
 		t_teesmc32_arg *TeeSmc32Arg =
-			(t_teesmc32_arg *)((size_t)ArmSmcArgs->Arg1 << 32 | ArmSmcArgs->Arg2);
+			(t_teesmc32_arg *)(size_t)((uint64_t)ArmSmcArgs->Arg1 << 32 | ArmSmcArgs->Arg2);
 		debug("TeeSmc32Arg->cmd = 0x%x", TeeSmc32Arg->cmd);
 #endif
 		switch (TeeSmc32Arg->cmd) {
diff --git a/lib/optee_clientApi/OpteeClientRkFs-v2.c b/lib/optee_clientApi/OpteeClientRkFs-v2.c
index 53cb8f16cf..e5834d64db 100644
--- a/lib/optee_clientApi/OpteeClientRkFs-v2.c
+++ b/lib/optee_clientApi/OpteeClientRkFs-v2.c
@@ -724,7 +724,7 @@ static uint32_t ree_fs_new_open(size_t num_params,
 	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx \n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
 
-	filename = (char *)params[1].u.memref.shm_id;
+	filename = (char *)(size_t)params[1].u.memref.shm_id;
 	if (!filename)
 		return TEEC_ERROR_BAD_PARAMETERS;
 
@@ -733,7 +733,7 @@ static uint32_t ree_fs_new_open(size_t num_params,
 		return TEEC_ERROR_BAD_PARAMETERS;
 	}
 
-	debug("ree_fs_new_open open file: %s, len: %lu \n", filename, strlen(filename));
+	debug("ree_fs_new_open open file: %s, len: %zu \n", filename, strlen(filename));
 	fd = rkss_get_fileinfo_by_name(filename, &p);
 	if (fd < 0) {
 		debug("ree_fs_new_open : no such file. %s", filename);
@@ -756,7 +756,7 @@ static TEEC_Result ree_fs_new_create(size_t num_params,
 	/* file open flags: O_RDWR | O_CREAT | O_TRUNC
 	 * if file exists, we must remove it first.
 	 */
-	filename = (char *)params[1].u.memref.shm_id;
+	filename = (char *)(size_t)params[1].u.memref.shm_id;
 	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
 	if (!filename)
@@ -767,7 +767,7 @@ static TEEC_Result ree_fs_new_create(size_t num_params,
 		return TEEC_ERROR_BAD_PARAMETERS;
 	}
 
-	debug("ree_fs_new_create create file: %s, len: %lu \n", filename, strlen(filename));
+	debug("ree_fs_new_create create file: %s, len: %zu \n", filename, strlen(filename));
 	fd = rkss_get_fileinfo_by_name(filename, &p);
 	if (fd >= 0) {
 		debug("ree_fs_new_create : file exist, clear it. %s", filename);
@@ -832,7 +832,7 @@ static TEEC_Result ree_fs_new_read(size_t num_params,
 	fd = params[0].u.value.b;
 	offs = params[0].u.value.c;
 
-	data = (uint8_t *)params[1].u.memref.shm_id;
+	data = (uint8_t *)(size_t)params[1].u.memref.shm_id;
 	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
 
@@ -898,7 +898,7 @@ static TEEC_Result ree_fs_new_write(size_t num_params,
 	fd = params[0].u.value.b;
 	offs = params[0].u.value.c;
 
-	data = (uint8_t *)params[1].u.memref.shm_id;
+	data = (uint8_t *)(size_t)params[1].u.memref.shm_id;
 	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
 	if (!data)
@@ -1045,7 +1045,7 @@ static TEEC_Result ree_fs_new_remove(size_t num_params,
 	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx \n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
 
-	filename = (char *)params[1].u.memref.shm_id;
+	filename = (char *)(size_t)params[1].u.memref.shm_id;
 	if (!filename)
 		return TEEC_ERROR_BAD_PARAMETERS;
 
@@ -1092,13 +1092,13 @@ static TEEC_Result ree_fs_new_rename(size_t num_params,
 	struct rkss_file_info p = {0};
 	int ret;
 
-	old_fname = (char *)params[1].u.memref.shm_id;
+	old_fname = (char *)(size_t)params[1].u.memref.shm_id;
 	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
 	if (!old_fname)
 		return TEEC_ERROR_BAD_PARAMETERS;
 
-	new_fname = (char *)params[2].u.memref.shm_id;
+	new_fname = (char *)(size_t)params[2].u.memref.shm_id;
 	debug("params[2].u.memref.shm_id = 0x%llx params[2].u.memref.shm_offs = 0x%llx\n",
 		params[2].u.memref.shm_id, params[2].u.memref.shm_offs);
 	if (!new_fname)
@@ -1137,7 +1137,7 @@ static TEEC_Result ree_fs_new_opendir(size_t num_params,
 	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx \n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
 
-	dirname = (char *)params[1].u.memref.shm_id;
+	dirname = (char *)(size_t)params[1].u.memref.shm_id;
 	if (!dirname)
 		return TEEC_ERROR_BAD_PARAMETERS;
 
@@ -1173,7 +1173,7 @@ static TEEC_Result ree_fs_new_readdir(size_t num_params,
 	size_t len;
 	size_t dirname_len;
 
-	dirname = (char *) params[1].u.memref.shm_id;
+	dirname = (char *)(size_t)params[1].u.memref.shm_id;
 	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx \n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
 	if (!dirname)
diff --git a/lib/optee_clientApi/OpteeClientSMC.c b/lib/optee_clientApi/OpteeClientSMC.c
index 8e2aaffb34..a3848c576a 100644
--- a/lib/optee_clientApi/OpteeClientSMC.c
+++ b/lib/optee_clientApi/OpteeClientSMC.c
@@ -115,7 +115,7 @@ TEEC_Result TEEC_SMC_OpenSession(TEEC_Context *context,
 #endif
 
 #ifdef CONFIG_OPTEE_V2
-#ifdef CONFIG_ARM64
+#if defined CONFIG_ARM64 || defined CONFIG_ARM64_BOOT_AARCH32
 	uint8_t * session_uuid = (uint8_t *)&TeeSmcMetaSession->uuid;
 	tee_uuid_to_octets(session_uuid, destination);
 	memcpy((void *)&TeeSmc32Param[0].u.value, &TeeSmcMetaSession->uuid, sizeof(TeeSmcMetaSession->uuid));
@@ -307,7 +307,7 @@ void SetTeeSmc32Params(TEEC_Operation *operation,
 #endif
 
 #ifdef CONFIG_OPTEE_V2
-#ifdef CONFIG_ARM64
+#if defined CONFIG_ARM64 || defined CONFIG_ARM64_BOOT_AARCH32
 			attr += (OPTEE_MSG_ATTR_TYPE_TMEM_INPUT_V2 - TEEC_MEMREF_TEMP_INPUT);
 			debug(" OPTEE_OS_V2 ARCH64 attr %x\n", attr);
 #else
@@ -376,7 +376,7 @@ TEEC_Result OpteeSmcCall(t_teesmc32_arg *TeeSmc32Arg)
 
 	while (1) {
 		tee_smc_call(&ArmSmcArgs);
-		debug("arg0=0x%x arg1=0x%x arg2=0x%x arg3=0x%x",
+		debug("arg0=0x%x arg1=0x%x arg2=0x%x arg3=0x%x \n",
 			ArmSmcArgs.Arg0, ArmSmcArgs.Arg1, ArmSmcArgs.Arg2, ArmSmcArgs.Arg3);
 		if (TEESMC_RETURN_IS_RPC(ArmSmcArgs.Arg0)) {
 			(void) OpteeRpcCallback(&ArmSmcArgs);

commit a678796b79736409196ef15a17e5d22cbbc0f4fd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Aug 3 11:41:01 2018 +0800

    rockchip: sdram: implement dram_initr_banksize()
    
    We reserve firmware region after MMU is enabled and translation
    table set up, so that the region can be mapped as cacheable to
    communicate with firmware by share memory.
    
    Change-Id: I9ba6fc1bc5e8b794dcf5e693fbc2a29a8f2187d3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
index 16e5c4eb28..548db9820a 100644
--- a/arch/arm/mach-rockchip/sdram_common.c
+++ b/arch/arm/mach-rockchip/sdram_common.c
@@ -61,14 +61,6 @@ int dram_init_banksize(void)
 {
 	size_t top = min((unsigned long)(gd->ram_size + CONFIG_SYS_SDRAM_BASE),
 			 gd->ram_top);
-	struct tos_parameter_t *tos_parameter;
-	u32 checksum;
-
-	tos_parameter = (struct tos_parameter_t *)(CONFIG_SYS_SDRAM_BASE +
-			TRUST_PARAMETER_OFFSET);
-
-	checksum = trust_checksum((uint8_t *)(unsigned long)tos_parameter + 8,
-				  sizeof(struct tos_parameter_t) - 8);
 
 #if defined(CONFIG_ARM64) || defined(CONFIG_ARM64_BOOT_AARCH32)
 	/* Reserve 0x200000 for ATF bl31 */
@@ -78,6 +70,26 @@ int dram_init_banksize(void)
 #endif
 	gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start;
 
+	return 0;
+}
+
+/*
+ * Resever firmware region after MMU set up, we need firmware region to be mapped
+ * as cacheable to communication with firmware by share memory.
+ */
+int dram_initr_banksize(void)
+{
+	size_t top = min((unsigned long)(gd->ram_size + CONFIG_SYS_SDRAM_BASE),
+			 gd->ram_top);
+	struct tos_parameter_t *tos_parameter;
+	u32 checksum;
+
+	tos_parameter = (struct tos_parameter_t *)(CONFIG_SYS_SDRAM_BASE +
+			TRUST_PARAMETER_OFFSET);
+
+	checksum = trust_checksum((uint8_t *)(unsigned long)tos_parameter + 8,
+				  sizeof(struct tos_parameter_t) - 8);
+
 	if ((checksum == tos_parameter->checksum) &&
 	    (tos_parameter->tee_mem.flags == 1)) {
 		gd->bd->bi_dram[0].size = tos_parameter->tee_mem.phy_addr

commit f4d148502c88fff6c8ec8e0f911291ab658a47da
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Aug 3 11:40:08 2018 +0800

    board_r: add dram_initr_banksize()
    
    Some platform requires to reserve memory regions for some firmware
    to avoid kernel touches it, but U-Boot may have communication with
    firmware by share memory. So that we had better reserve firmware
    region after the initr_caches() which enables MMU and init
    translation table, we need firmware region to be mapped as cacheable
    like other regions, otherwise there would be dcache coherence issue
    between firmware and U-Boot.
    
    Change-Id: Icb986022b484c96dffcafc98972ae24362cb8e4b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/board_r.c b/common/board_r.c
index e8ca37294e..1e5847dda3 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -657,6 +657,11 @@ __weak int interrupt_debugger_init(void)
 	return 0;
 }
 
+__weak int dram_initr_banksize(void)
+{
+	return 0;
+}
+
 static int run_main_loop(void)
 {
 #ifdef CONFIG_SANDBOX
@@ -691,6 +696,18 @@ static init_fnc_t init_sequence_r[] = {
 	 */
 #endif
 	initr_reloc_global_data,
+
+	/*
+	 * Some platform requires to reserve memory regions for some firmware
+	 * to avoid kernel touches it, but U-Boot may have communication with
+	 * firmware by share memory. So that we had better reserve firmware
+	 * region after the initr_caches() which enables MMU and init
+	 * translation table, we need firmware region to be mapped as cacheable
+	 * like other regions, otherwise there would be dcache coherence issue
+	 * between firmware and U-Boot.
+	 */
+	dram_initr_banksize,
+
 #if defined(CONFIG_SYS_INIT_RAM_LOCK) && defined(CONFIG_E500)
 	initr_unlock_ram_in_cache,
 #endif

commit bb14c03be03fe8c37fbc0cddcb6ff570f927ae86
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Aug 7 10:20:20 2018 +0800

    rockchip: rk3328: increase spl size
    
    Since we have TPL, the SPL is actually running in SDRAM and there
    should be no size limit by sram size.
    
    Change-Id: Ic466777c51e75c9ac83c1cc7be926a0f2c0cacaa
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index 537bdea9c9..3e41d4d9b6 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -20,7 +20,7 @@
 #define CONFIG_SYS_LOAD_ADDR		0x00800800
 #define CONFIG_SPL_STACK		0x00400000
 #define CONFIG_SPL_TEXT_BASE		0x00000000
-#define CONFIG_SPL_MAX_SIZE             0x10000
+#define CONFIG_SPL_MAX_SIZE             0x100000
 #define CONFIG_SPL_BSS_START_ADDR	0x00400000
 #define CONFIG_SPL_BSS_MAX_SIZE         0x2000
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */

commit f7c0370c61e0bddb75b6c77373ebbacae1e904ab
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Jul 26 11:30:17 2018 +0800

    mmc: dw_mmc: fix timeout error
    
    If data error, we will reset the controller and wait when it is
    ready. But the timeout data type is u32, it is never less than
    zero. So change judgement data to one.
    
    Change-Id: If049da06ecfe42fd31cca344bf87f69f7850dbe2
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 1603f15f07..5f894297ed 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -157,6 +157,7 @@ static void dwmci_prepare_data(struct dwmci_host *host,
 static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data)
 {
 	int ret = 0;
+	int reset_timeout = 100;
 	u32 timeout = 240000;
 	u32 status, ctrl, mask, size, i, len = 0;
 	u32 *buf = NULL;
@@ -185,8 +186,9 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data)
 
 			do {
 				status = dwmci_readl(host, DWMCI_CMD);
-				if (timeout-- < 0)
-					ret = -ETIMEDOUT;
+				if (reset_timeout-- < 0)
+					break;
+				udelay(100);
 			} while (status & DWMCI_CMD_START);
 
 			if (!host->fifo_mode) {

commit 8e2239d5ebe4ccd10f3de593a1236b21d7cc1a61
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Fri Aug 3 09:49:25 2018 +0800

    clk: rockchip: rk3328: replenish some CLK settings
    
    Change-Id: I33e6ff57c2d616c933a458dade9a751460d0bc9a
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c
index 1df4312f7c..15711ba844 100644
--- a/drivers/clk/rockchip/clk_rk3328.c
+++ b/drivers/clk/rockchip/clk_rk3328.c
@@ -37,15 +37,15 @@ static struct rockchip_pll_rate_table rk3328_pll_rates[] = {
 	/* _mhz, _refdiv, _fbdiv, _postdiv1, _postdiv2, _dsmpd, _frac */
 	RK3036_PLL_RATE(1200000000, 1, 50, 1, 1, 1, 0),
 #ifndef CONFIG_SPL_BUILD
-	RK3036_PLL_RATE(1188000000, 2, 99, 1, 1, 1, 0),
+	RK3036_PLL_RATE(1188000000, 1, 99, 2, 1, 1, 0),
 	RK3036_PLL_RATE(1008000000, 1, 84, 2, 1, 1, 0),
 #endif
 	RK3036_PLL_RATE(816000000, 1, 68, 2, 1, 1, 0),
-	RK3036_PLL_RATE(800000000, 6, 400, 2, 1, 1, 0),
+	RK3036_PLL_RATE(800000000, 1, 200, 6, 1, 1, 0),
 	RK3036_PLL_RATE(600000000, 1, 75, 3, 1, 1, 0),
 #ifndef CONFIG_SPL_BUILD
-	RK3036_PLL_RATE(594000000, 2, 99, 2, 1, 1, 0),
-	RK3036_PLL_RATE(500000000, 6, 250, 2, 1, 1, 0),
+	RK3036_PLL_RATE(594000000, 1, 99, 4, 1, 1, 0),
+	RK3036_PLL_RATE(500000000, 1, 125, 6, 1, 1, 0),
 #endif
 	{ /* sentinel */ },
 };
@@ -123,7 +123,7 @@ static ulong rk3328_armclk_set_clk(struct rk3328_clk_priv *priv, ulong hz)
 
 	rate = rockchip_get_cpu_settings(rk3328_cpu_rates, hz);
 	if (!rate) {
-		printf("%s unsupport rate\n", __func__);
+		printf("%s unsupported rate\n", __func__);
 		return -EINVAL;
 	}
 
@@ -406,16 +406,19 @@ static ulong rk3328_vop_get_clk(struct rk3328_clk_priv *priv, ulong clk_id)
 
 	switch (clk_id) {
 	case ACLK_VOP_PRE:
+	case ACLK_VOP:
 		con = readl(&cru->clksel_con[39]);
 		div = (con & ACLK_VOP_DIV_CON_MASK) >> ACLK_VOP_DIV_CON_SHIFT;
 		parent = priv->cpll_hz;
 		break;
 	case ACLK_VIO_PRE:
+	case ACLK_VIO:
 		con = readl(&cru->clksel_con[37]);
 		div = (con & ACLK_VIO_DIV_CON_MASK) >> ACLK_VIO_DIV_CON_SHIFT;
 		parent = priv->cpll_hz;
 		break;
 	case HCLK_VIO_PRE:
+	case HCLK_VIO:
 		parent = rk3328_vop_get_clk(priv, ACLK_VIO_PRE);
 		con = readl(&cru->clksel_con[37]);
 		div = (con & HCLK_VIO_DIV_CON_MASK) >> HCLK_VIO_DIV_CON_SHIFT;
@@ -439,18 +442,21 @@ static ulong rk3328_vop_set_clk(struct rk3328_clk_priv *priv,
 
 	switch (clk_id) {
 	case ACLK_VOP_PRE:
+	case ACLK_VOP:
 		rk_clrsetreg(&cru->clksel_con[39],
 			     ACLK_VOP_PLL_SEL_MASK | ACLK_VOP_DIV_CON_MASK,
 			     ACLK_VOP_PLL_SEL_CPLL << ACLK_VOP_PLL_SEL_SHIFT |
 			     (src_clk_div - 1) << ACLK_VOP_DIV_CON_SHIFT);
 		break;
 	case ACLK_VIO_PRE:
+	case ACLK_VIO:
 		rk_clrsetreg(&cru->clksel_con[37],
 			     ACLK_VIO_PLL_SEL_MASK | ACLK_VIO_DIV_CON_MASK,
 			     ACLK_VIO_PLL_SEL_CPLL << ACLK_VIO_PLL_SEL_SHIFT |
 			     (src_clk_div - 1) << ACLK_VIO_DIV_CON_SHIFT);
 		break;
 	case HCLK_VIO_PRE:
+	case HCLK_VIO:
 		src_clk_div = DIV_ROUND_UP(rk3328_vop_get_clk(priv,
 							      ACLK_VIO_PRE),
 					   hz);
@@ -693,6 +699,9 @@ static ulong rk3328_clk_get_rate(struct clk *clk)
 	case ACLK_VOP_PRE:
 	case ACLK_VIO_PRE:
 	case HCLK_VIO_PRE:
+	case ACLK_VOP:
+	case ACLK_VIO:
+	case HCLK_VIO:
 		rate = rk3328_vop_get_clk(priv, clk->id);
 		break;
 #endif
@@ -764,6 +773,9 @@ static ulong rk3328_clk_set_rate(struct clk *clk, ulong rate)
 	case ACLK_VOP_PRE:
 	case ACLK_VIO_PRE:
 	case HCLK_VIO_PRE:
+	case ACLK_VOP:
+	case ACLK_VIO:
+	case HCLK_VIO:
 		rate = rk3328_vop_set_clk(priv, clk->id, rate);
 		break;
 #endif
@@ -932,6 +944,20 @@ static void rkclk_init(struct rk3328_clk_priv *priv)
 				  priv->cru, NPLL) != APLL_HZ)
 		rk3328_armclk_set_clk(priv, APLL_HZ);
 
+	priv->gpll_hz = rockchip_pll_get_rate(&rk3328_pll_clks[GPLL],
+					      priv->cru, GPLL);
+	priv->cpll_hz = rockchip_pll_get_rate(&rk3328_pll_clks[CPLL],
+					      priv->cru, CPLL);
+
+	/* before set pll set child div first */
+	rk_clrsetreg(&priv->cru->clksel_con[24], (0x3f << 8) | (0x3f << 0),
+		     (0x17 << 8) | (0x17 << 0));
+	rk_clrsetreg(&priv->cru->clksel_con[27], (0x1f << 8) | (0x1f << 0),
+		     (0x17 << 8) | (0x17 << 0));
+	rk_clrsetreg(&priv->cru->clksel_con[31], 0xff << 0, 0xb << 0);
+	rk_clrsetreg(&priv->cru->clksel_con[43], 0xff << 0, 0xb << 0);
+	rk_clrsetreg(&priv->cru->clksel_con[52], 0x1f << 8, 0x5 << 8);
+
 	rockchip_pll_set_rate(&rk3328_pll_clks[GPLL],
 			      priv->cru, GPLL, GPLL_HZ);
 	priv->gpll_hz = GPLL_HZ;

commit 5e347bef3ecba3479ac200d8f13b730b96ab2f06
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Jul 10 15:38:28 2018 +0800

    regulator: rk816: support rk816 ES2 chip
    
    Change-Id: Idaba0e148b520e2d43d2185461acaab3ff9cb16d
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/power/regulator/rk8xx.c b/drivers/power/regulator/rk8xx.c
index 498597c047..966243934e 100644
--- a/drivers/power/regulator/rk8xx.c
+++ b/drivers/power/regulator/rk8xx.c
@@ -275,6 +275,7 @@ static const struct rk8xx_reg_info *get_buck_reg(struct udevice *pmic,
 static int _buck_set_value(struct udevice *pmic, int buck, int uvolt)
 {
 	const struct rk8xx_reg_info *info = get_buck_reg(pmic, buck, uvolt);
+	struct rk8xx_priv *priv = dev_get_priv(pmic);
 	int mask = info->vsel_mask;
 	int val;
 
@@ -289,7 +290,12 @@ static int _buck_set_value(struct udevice *pmic, int buck, int uvolt)
 	debug("%s: volt=%d, buck=%d, reg=0x%x, mask=0x%x, val=0x%x\n",
 	      __func__, uvolt, buck+1, info->vsel_reg, mask, val);
 
-	return pmic_clrsetbits(pmic, info->vsel_reg, mask, val);
+	if (priv->variant == RK816_ID) {
+		pmic_clrsetbits(pmic, info->vsel_reg, mask, val);
+		return pmic_clrsetbits(pmic, RK816_REG_DCDC_EN2, 1 << 7, 1 << 7);
+	} else {
+		return pmic_clrsetbits(pmic, info->vsel_reg, mask, val);
+	}
 }
 
 static int _buck_set_enable(struct udevice *pmic, int buck, bool enable)

commit 7150785e4468c4225757a3bc39c3a50fe0fdeec9
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Fri Aug 3 17:40:53 2018 +0800

    rockchip: clk: rk3368: support more clks to set and get rate
    
    Make clock ids consistent with kernel.
    Support more clks to set and get rate.
    Add clk dump.
    
    Change-Id: I348c98ce81ce76af9c492a30480fcb495da7ed79
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3368.h b/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
index 6a6fe4775d..fa4e472302 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
@@ -20,6 +20,12 @@ enum rk3368_pll_id {
 	PLL_COUNT,
 };
 
+struct rk3368_clk_info {
+	unsigned long id;
+	char *name;
+	bool is_cru;
+};
+
 struct rk3368_cru {
 	struct rk3368_pll {
 		unsigned int con0;
@@ -79,6 +85,43 @@ enum {
 	PLL_RESET			= 1,
 	PLL_RESET_MASK			= GENMASK(5, 5),
 
+	/* CLKSEL1CON */
+	CORE_ACLK_DIV_SHIFT		= 0,
+	CORE_ACLK_DIV_MASK		= 0x1f << CORE_ACLK_DIV_SHIFT,
+	CORE_DBG_DIV_SHIFT		= 8,
+	CORE_DBG_DIV_MASK		= 0x1f << CORE_DBG_DIV_SHIFT,
+
+	CORE_CLK_PLL_SEL_SHIFT		= 7,
+	CORE_CLK_PLL_SEL_MASK		= 1 << CORE_CLK_PLL_SEL_SHIFT,
+	CORE_CLK_PLL_SEL_APLL		= 0,
+	CORE_CLK_PLL_SEL_GPLL,
+	CORE_DIV_CON_SHIFT		= 0,
+	CORE_DIV_CON_MASK		= 0x1f << CORE_DIV_CON_SHIFT,
+
+	/* CLKSEL8CON */
+	PCLK_BUS_DIV_CON_SHIFT		= 12,
+	PCLK_BUS_DIV_CON_MASK		= 0x7 << PCLK_BUS_DIV_CON_SHIFT,
+	HCLK_BUS_DIV_CON_SHIFT		= 8,
+	HCLK_BUS_DIV_CON_MASK		= 0x3 << HCLK_BUS_DIV_CON_SHIFT,
+	CLK_BUS_PLL_SEL_CPLL		= 0,
+	CLK_BUS_PLL_SEL_GPLL		= 1,
+	CLK_BUS_PLL_SEL_SHIFT		= 7,
+	CLK_BUS_PLL_SEL_MASK		= 1 << CLK_BUS_PLL_SEL_SHIFT,
+	ACLK_BUS_DIV_CON_SHIFT		= 0,
+	ACLK_BUS_DIV_CON_MASK		= 0x1f << ACLK_BUS_DIV_CON_SHIFT,
+
+	/* CLKSEL9CON */
+	PCLK_PERI_DIV_CON_SHIFT		= 12,
+	PCLK_PERI_DIV_CON_MASK		= 0x3 << PCLK_PERI_DIV_CON_SHIFT,
+	HCLK_PERI_DIV_CON_SHIFT		= 8,
+	HCLK_PERI_DIV_CON_MASK		= 3 << HCLK_PERI_DIV_CON_SHIFT,
+	CLK_PERI_PLL_SEL_CPLL		= 0,
+	CLK_PERI_PLL_SEL_GPLL,
+	CLK_PERI_PLL_SEL_SHIFT		= 7,
+	CLK_PERI_PLL_SEL_MASK		= 1 << CLK_PERI_PLL_SEL_SHIFT,
+	ACLK_PERI_DIV_CON_SHIFT		= 0,
+	ACLK_PERI_DIV_CON_MASK		= 0x1f,
+
 	/* CLKSEL12_CON */
 	MCU_STCLK_DIV_SHIFT		= 8,
 	MCU_STCLK_DIV_MASK		= GENMASK(10, 8),
@@ -89,6 +132,23 @@ enum {
 	MCU_CLK_DIV_SHIFT		= 0,
 	MCU_CLK_DIV_MASK		= GENMASK(4, 0),
 
+	/* CLKSEL19_CON */
+	ACLK_VOP_PLL_SEL_SHIFT		= 6,
+	ACLK_VOP_PLL_SEL_MASK		= GENMASK(7, 6),
+	ACLK_VOP_PLL_SEL_CPLL		= 0,
+	ACLK_VOP_PLL_SEL_GPLL		= 1,
+	ACLK_VOP_DIV_SHIFT		= 0,
+	ACLK_VOP_DIV_MASK		= GENMASK(4, 0),
+
+	/* CLKSEL20_CON */
+	DCLK_VOP_PLL_SEL_SHIFT		= 8,
+	DCLK_VOP_PLL_SEL_MASK		= GENMASK(9, 8),
+	DCLK_VOP_PLL_SEL_CPLL		= 0,
+	DCLK_VOP_PLL_SEL_GPLL		= 1,
+	DCLK_VOP_PLL_SEL_NPLL		= 2,
+	DCLK_VOP_DIV_SHIFT		= 0,
+	DCLK_VOP_DIV_MASK		= GENMASK(7, 0),
+
 	/* CLKSEL_CON25 */
 	CLK_SARADC_DIV_CON_SHIFT	= 8,
 	CLK_SARADC_DIV_CON_MASK		= GENMASK(15, 8),
diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c
index 37b1a41ccd..d82dfd2b15 100644
--- a/drivers/clk/rockchip/clk_rk3368.c
+++ b/drivers/clk/rockchip/clk_rk3368.c
@@ -42,6 +42,48 @@ struct pll_div {
 
 #define DIV_TO_RATE(input_rate, div)    ((input_rate) / ((div) + 1))
 
+#if !defined(CONFIG_SPL_BUILD)
+#define RK3368_CLK_DUMP(_id, _name, _iscru)	\
+{						\
+	.id = _id,				\
+	.name = _name,				\
+	.is_cru = _iscru,			\
+}
+
+static const struct rk3368_clk_info clks_dump[] = {
+	RK3368_CLK_DUMP(PLL_APLLB, "apllb", true),
+	RK3368_CLK_DUMP(PLL_APLLL, "aplll", true),
+	RK3368_CLK_DUMP(PLL_DPLL, "dpll", true),
+	RK3368_CLK_DUMP(PLL_CPLL, "cpll", true),
+	RK3368_CLK_DUMP(PLL_GPLL, "gpll", true),
+	RK3368_CLK_DUMP(PLL_NPLL, "npll", true),
+	RK3368_CLK_DUMP(ARMCLKB, "armclkb", true),
+	RK3368_CLK_DUMP(ARMCLKL, "armclkl", true),
+	RK3368_CLK_DUMP(ACLK_BUS, "aclk_bus", true),
+	RK3368_CLK_DUMP(HCLK_BUS, "hclk_bus", true),
+	RK3368_CLK_DUMP(PCLK_BUS, "pclk_Bus", true),
+	RK3368_CLK_DUMP(ACLK_PERI, "aclk_peri", true),
+	RK3368_CLK_DUMP(HCLK_PERI, "hclk_peri", true),
+	RK3368_CLK_DUMP(PCLK_PERI, "pclk_peri", true),
+};
+#endif
+
+#define RK3368_CPUCLK_RATE(_rate, _aclk_div, _pclk_div)		\
+{								\
+	.rate	= _rate##U,					\
+	.aclk_div = _aclk_div,					\
+	.pclk_div = _pclk_div,					\
+}
+
+static struct rockchip_cpu_rate_table rk3368_cpu_rates[] = {
+#if !defined(CONFIG_SPL_BUILD)
+	RK3368_CPUCLK_RATE(1200000000, 1, 5),
+	RK3368_CPUCLK_RATE(1008000000, 1, 5),
+#endif
+	RK3368_CPUCLK_RATE(816000000, 1, 3),
+	RK3368_CPUCLK_RATE(600000000, 1, 3),
+};
+
 #define PLL_DIVISORS(hz, _nr, _no) { \
 	.nr = _nr, .nf = (u32)((u64)hz * _nr * _no / OSC_HZ), .no = _no}; \
 	_Static_assert(((u64)hz * _nr * _no / OSC_HZ) * OSC_HZ /\
@@ -59,6 +101,83 @@ static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 1, 6);
 
 static ulong rk3368_clk_get_rate(struct clk *clk);
 
+#define VCO_MAX_KHZ	2200000
+#define VCO_MIN_KHZ	440000
+#define FREF_MAX_KHZ	2200000
+#define FREF_MIN_KHZ	269
+#define PLL_LIMIT_FREQ	400000000
+
+static int pll_para_config(ulong freq_hz, struct pll_div *div, uint *ext_div)
+{
+	uint ref_khz = OSC_HZ / 1000, nr, nf = 0;
+	uint fref_khz;
+	uint diff_khz, best_diff_khz;
+	const uint max_nr = 1 << 6, max_nf = 1 << 12, max_no = 1 << 4;
+	uint vco_khz;
+	uint no = 1;
+	uint freq_khz = freq_hz / 1000;
+
+	if (!freq_hz) {
+		printf("%s: the frequency can not be 0 Hz\n", __func__);
+		return -EINVAL;
+	}
+
+	no = DIV_ROUND_UP(VCO_MIN_KHZ, freq_khz);
+	if (ext_div) {
+		*ext_div = DIV_ROUND_UP(PLL_LIMIT_FREQ, freq_hz);
+		no = DIV_ROUND_UP(no, *ext_div);
+	}
+
+	/* only even divisors (and 1) are supported */
+	if (no > 1)
+		no = DIV_ROUND_UP(no, 2) * 2;
+
+	vco_khz = freq_khz * no;
+	if (ext_div)
+		vco_khz *= *ext_div;
+
+	if (vco_khz < VCO_MIN_KHZ || vco_khz > VCO_MAX_KHZ || no > max_no) {
+		printf("%s: Cannot find out VCO for Frequency (%luHz).\n",
+		       __func__, freq_hz);
+		return -1;
+	}
+
+	div->no = no;
+
+	best_diff_khz = vco_khz;
+	for (nr = 1; nr < max_nr && best_diff_khz; nr++) {
+		fref_khz = ref_khz / nr;
+		if (fref_khz < FREF_MIN_KHZ)
+			break;
+		if (fref_khz > FREF_MAX_KHZ)
+			continue;
+
+		nf = vco_khz / fref_khz;
+		if (nf >= max_nf)
+			continue;
+		diff_khz = vco_khz - nf * fref_khz;
+		if (nf + 1 < max_nf && diff_khz > fref_khz / 2) {
+			nf++;
+			diff_khz = fref_khz - diff_khz;
+		}
+
+		if (diff_khz >= best_diff_khz)
+			continue;
+
+		best_diff_khz = diff_khz;
+		div->nr = nr;
+		div->nf = nf;
+	}
+
+	if (best_diff_khz > 4 * 1000) {
+		printf("%s:Fail to match output freq %lu,best_is %u Hz\n",
+		       __func__, freq_hz, best_diff_khz * 1000);
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
 /* Get pll rate by id */
 static uint32_t rkclk_pll_get_rate(struct rk3368_cru *cru,
 				   enum rk3368_pll_id pll_id)
@@ -86,7 +205,6 @@ static uint32_t rkclk_pll_get_rate(struct rk3368_cru *cru,
 	}
 }
 
-#if IS_ENABLED(CONFIG_SPL_BUILD) || IS_ENABLED(CONFIG_TPL_BUILD)
 static int rkclk_set_pll(struct rk3368_cru *cru, enum rk3368_pll_id pll_id,
 			 const struct pll_div *div)
 {
@@ -116,6 +234,7 @@ static int rkclk_set_pll(struct rk3368_cru *cru, enum rk3368_pll_id pll_id,
 
 	/* return from reset */
 	rk_clrreg(&pll->con3, PLL_RESET_MASK);
+	rk_clrreg(&pll->con3, 0xf << 0);
 
 	/* waiting for pll lock */
 	while (!(readl(&pll->con1) & PLL_LOCK_STA))
@@ -126,34 +245,6 @@ static int rkclk_set_pll(struct rk3368_cru *cru, enum rk3368_pll_id pll_id,
 
 	return 0;
 }
-#endif
-
-#if IS_ENABLED(CONFIG_SPL_BUILD) || IS_ENABLED(CONFIG_TPL_BUILD)
-static void rkclk_init(struct rk3368_cru *cru)
-{
-	u32 apllb, aplll, dpll, cpll, gpll;
-
-	rkclk_set_pll(cru, APLLB, &apll_b_init_cfg);
-	rkclk_set_pll(cru, APLLL, &apll_l_init_cfg);
-#if !defined(CONFIG_TPL_BUILD)
-	/*
-	 * If we plan to return to the boot ROM, we can't increase the
-	 * GPLL rate from the SPL stage.
-	 */
-	rkclk_set_pll(cru, GPLL, &gpll_init_cfg);
-	rkclk_set_pll(cru, CPLL, &cpll_init_cfg);
-#endif
-
-	apllb = rkclk_pll_get_rate(cru, APLLB);
-	aplll = rkclk_pll_get_rate(cru, APLLL);
-	dpll = rkclk_pll_get_rate(cru, DPLL);
-	cpll = rkclk_pll_get_rate(cru, CPLL);
-	gpll = rkclk_pll_get_rate(cru, GPLL);
-
-	debug("%s apllb(%d) apll(%d) dpll(%d) cpll(%d) gpll(%d)\n",
-	       __func__, apllb, aplll, dpll, cpll, gpll);
-}
-#endif
 
 #if !IS_ENABLED(CONFIG_SPL_BUILD) || CONFIG_IS_ENABLED(MMC_SUPPORT)
 static ulong rk3368_mmc_get_clk(struct rk3368_cru *cru, uint clk_id)
@@ -451,6 +542,301 @@ static ulong rk3368_saradc_set_clk(struct rk3368_cru *cru, uint hz)
 	return rk3368_saradc_get_clk(cru);
 }
 
+static ulong rk3368_bus_get_clk(struct rk3368_cru *cru, ulong clk_id)
+{
+	u32 div, con, parent;
+
+	switch (clk_id) {
+	case ACLK_BUS:
+		con = readl(&cru->clksel_con[8]);
+		div = (con & ACLK_BUS_DIV_CON_MASK) >> ACLK_BUS_DIV_CON_SHIFT;
+		parent = rkclk_pll_get_rate(cru, GPLL);
+		break;
+	case HCLK_BUS:
+		con = readl(&cru->clksel_con[8]);
+		div = (con & HCLK_BUS_DIV_CON_MASK) >> HCLK_BUS_DIV_CON_SHIFT;
+		parent = rk3368_bus_get_clk(cru, ACLK_BUS);
+		break;
+	case PCLK_BUS:
+	case PCLK_PWM0:
+	case PCLK_PWM1:
+	case PCLK_I2C0:
+	case PCLK_I2C1:
+		con = readl(&cru->clksel_con[8]);
+		div = (con & PCLK_BUS_DIV_CON_MASK) >> PCLK_BUS_DIV_CON_SHIFT;
+		parent = rk3368_bus_get_clk(cru, ACLK_BUS);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rk3368_bus_set_clk(struct rk3368_cru *cru,
+				ulong clk_id, ulong hz)
+{
+	int src_clk_div;
+
+	/*
+	 * select gpll as pd_bus bus clock source and
+	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
+	 */
+	switch (clk_id) {
+	case ACLK_BUS:
+		src_clk_div = DIV_ROUND_UP(rkclk_pll_get_rate(cru, GPLL), hz);
+		assert(src_clk_div - 1 < 31);
+		rk_clrsetreg(&cru->clksel_con[8],
+			     CLK_BUS_PLL_SEL_MASK | ACLK_BUS_DIV_CON_MASK,
+			     CLK_BUS_PLL_SEL_CPLL << CLK_BUS_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << ACLK_BUS_DIV_CON_SHIFT);
+		break;
+	case HCLK_BUS:
+		src_clk_div = DIV_ROUND_UP(rk3368_bus_get_clk(cru,
+							      ACLK_BUS),
+					   hz);
+		assert(src_clk_div - 1 < 3);
+		rk_clrsetreg(&cru->clksel_con[8],
+			     HCLK_BUS_DIV_CON_MASK,
+			     (src_clk_div - 1) << HCLK_BUS_DIV_CON_SHIFT);
+		break;
+	case PCLK_BUS:
+		src_clk_div = DIV_ROUND_UP(rk3368_bus_get_clk(cru,
+							      ACLK_BUS),
+					   hz);
+		assert(src_clk_div - 1 < 3);
+		rk_clrsetreg(&cru->clksel_con[8],
+			     PCLK_BUS_DIV_CON_MASK,
+			     (src_clk_div - 1) << PCLK_BUS_DIV_CON_SHIFT);
+		break;
+	default:
+		printf("do not support this bus freq\n");
+		return -EINVAL;
+	}
+	return rk3368_bus_get_clk(cru, clk_id);
+}
+
+static ulong rk3368_peri_get_clk(struct rk3368_cru *cru, ulong clk_id)
+{
+	u32 div, con, parent;
+
+	switch (clk_id) {
+	case ACLK_PERI:
+		con = readl(&cru->clksel_con[9]);
+		div = (con & ACLK_PERI_DIV_CON_MASK) >> ACLK_PERI_DIV_CON_SHIFT;
+		parent = rkclk_pll_get_rate(cru, GPLL);
+		break;
+	case HCLK_PERI:
+		con = readl(&cru->clksel_con[9]);
+		div = (con & HCLK_PERI_DIV_CON_MASK) >> HCLK_PERI_DIV_CON_SHIFT;
+		parent = rk3368_peri_get_clk(cru, ACLK_PERI);
+		break;
+	case PCLK_PERI:
+	case PCLK_I2C2:
+	case PCLK_I2C3:
+	case PCLK_I2C4:
+	case PCLK_I2C5:
+		con = readl(&cru->clksel_con[9]);
+		div = (con & PCLK_PERI_DIV_CON_MASK) >> PCLK_PERI_DIV_CON_SHIFT;
+		parent = rk3368_peri_get_clk(cru, ACLK_PERI);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rk3368_peri_set_clk(struct rk3368_cru *cru,
+				 ulong clk_id, ulong hz)
+{
+	int src_clk_div;
+
+	/*
+	 * select gpll as pd_bus bus clock source and
+	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
+	 */
+	switch (clk_id) {
+	case ACLK_PERI:
+		src_clk_div = DIV_ROUND_UP(rkclk_pll_get_rate(cru, GPLL), hz);
+		assert(src_clk_div - 1 < 31);
+		rk_clrsetreg(&cru->clksel_con[9],
+			     CLK_PERI_PLL_SEL_MASK | ACLK_PERI_DIV_CON_MASK,
+			     CLK_PERI_PLL_SEL_CPLL << CLK_PERI_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << ACLK_PERI_DIV_CON_SHIFT);
+		break;
+	case HCLK_PERI:
+		src_clk_div = DIV_ROUND_UP(rk3368_peri_get_clk(cru,
+							       ACLK_PERI),
+					   hz);
+		assert(src_clk_div - 1 < 3);
+		rk_clrsetreg(&cru->clksel_con[9],
+			     HCLK_PERI_DIV_CON_MASK,
+			     (src_clk_div - 1) << HCLK_PERI_DIV_CON_SHIFT);
+		break;
+	case PCLK_PERI:
+		src_clk_div = DIV_ROUND_UP(rk3368_peri_get_clk(cru,
+							       ACLK_PERI),
+					   hz);
+		assert(src_clk_div - 1 < 3);
+		rk_clrsetreg(&cru->clksel_con[9],
+			     PCLK_PERI_DIV_CON_MASK,
+			     (src_clk_div - 1) << PCLK_PERI_DIV_CON_SHIFT);
+		break;
+	default:
+		printf("do not support this bus freq\n");
+		return -EINVAL;
+	}
+
+	return rk3368_peri_get_clk(cru, clk_id);
+}
+
+#if !defined(CONFIG_SPL_BUILD)
+static ulong rk3368_vop_get_clk(struct rk3368_cru *cru,  int clk_id)
+{
+	u32 div, con, parent, sel;
+
+	switch (clk_id) {
+	case DCLK_VOP:
+		con = readl(&cru->clksel_con[20]);
+		div = con & DCLK_VOP_DIV_MASK;
+		parent = rkclk_pll_get_rate(cru, NPLL);
+		break;
+	case ACLK_VOP:
+		con = readl(&cru->clksel_con[19]);
+		div = con & ACLK_VOP_DIV_MASK;
+		sel =  (con & (ACLK_VOP_PLL_SEL_MASK <<
+			ACLK_VOP_PLL_SEL_SHIFT)) >>
+			ACLK_VOP_PLL_SEL_SHIFT;
+		if (sel == ACLK_VOP_PLL_SEL_CPLL)
+			parent = rkclk_pll_get_rate(cru, CPLL);
+		else if (ACLK_VOP_PLL_SEL_GPLL)
+			parent = rkclk_pll_get_rate(cru, GPLL);
+		else
+			parent = 480000000;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rk3368_vop_set_clk(struct rk3368_cru *cru, int clk_id, uint hz)
+{
+	struct pll_div npll_config = {0};
+	u32 lcdc_div;
+	int ret;
+
+	switch (clk_id) {
+	case DCLK_VOP:
+		ret = pll_para_config(hz, &npll_config, &lcdc_div);
+		if (ret)
+			return ret;
+
+		rkclk_set_pll(cru, NPLL, &npll_config);
+
+		/* vop dclk source clk: npll,dclk_div: 1 */
+		rk_clrsetreg(&cru->clksel_con[20],
+			     (DCLK_VOP_PLL_SEL_MASK << DCLK_VOP_PLL_SEL_SHIFT) |
+			     (DCLK_VOP_DIV_MASK << DCLK_VOP_DIV_SHIFT),
+			     (DCLK_VOP_PLL_SEL_NPLL << DCLK_VOP_PLL_SEL_SHIFT) |
+			     (lcdc_div - 1) << DCLK_VOP_DIV_SHIFT);
+		break;
+	case ACLK_VOP:
+		if ((rkclk_pll_get_rate(cru, CPLL) % hz) == 0) {
+			lcdc_div = rkclk_pll_get_rate(cru, CPLL) / hz;
+			rk_clrsetreg(&cru->clksel_con[19],
+				     (ACLK_VOP_PLL_SEL_MASK <<
+				     ACLK_VOP_PLL_SEL_SHIFT) |
+				     (ACLK_VOP_DIV_MASK <<
+				     ACLK_VOP_DIV_SHIFT),
+				     (ACLK_VOP_PLL_SEL_CPLL <<
+				     ACLK_VOP_PLL_SEL_SHIFT) |
+				     (lcdc_div - 1) <<
+				     ACLK_VOP_DIV_SHIFT);
+		} else {
+			lcdc_div = rkclk_pll_get_rate(cru, GPLL) / hz;
+			rk_clrsetreg(&cru->clksel_con[19],
+				     (ACLK_VOP_PLL_SEL_MASK <<
+				     ACLK_VOP_PLL_SEL_SHIFT) |
+				     (ACLK_VOP_DIV_MASK <<
+				     ACLK_VOP_DIV_SHIFT),
+				     (ACLK_VOP_PLL_SEL_GPLL <<
+				     ACLK_VOP_PLL_SEL_SHIFT) |
+				     (lcdc_div - 1) <<
+				     ACLK_VOP_DIV_SHIFT);
+		}
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return 0;
+}
+#endif
+
+static ulong rk3368_armclk_set_clk(struct rk3368_clk_priv *priv,
+				   int clk_id, ulong hz)
+{
+	struct rk3368_cru *cru = priv->cru;
+	const struct rockchip_cpu_rate_table *rate;
+	struct pll_div pll_config = {0};
+	ulong old_rate;
+	u32 pll_div, pll_id, con_id;
+	int ret;
+
+	rate = rockchip_get_cpu_settings(rk3368_cpu_rates, hz);
+	if (!rate) {
+		printf("%s unsupported rate\n", __func__);
+		return -EINVAL;
+	}
+
+	/*
+	 * select apll as cpu/core clock pll source and
+	 * set up dependent divisors for PERI and ACLK clocks.
+	 * core hz : apll = 1:1
+	 */
+
+	ret = pll_para_config(hz, &pll_config, &pll_div);
+	if (ret)
+		return ret;
+
+	if (clk_id == ARMCLKB) {
+		old_rate = rkclk_pll_get_rate(priv->cru, APLLB);
+		pll_id = APLLB;
+		con_id = 0;
+	} else {
+		old_rate = rkclk_pll_get_rate(priv->cru, APLLL);
+		pll_id = APLLL;
+		con_id = 2;
+	}
+
+	if (old_rate > hz) {
+		ret = rkclk_set_pll(priv->cru, pll_id, &pll_config);
+		rk_clrsetreg(&cru->clksel_con[con_id],
+			     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK,
+			     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
+			     0 << CORE_DIV_CON_SHIFT);
+		rk_clrsetreg(&cru->clksel_con[con_id + 1],
+			     CORE_ACLK_DIV_MASK | CORE_DBG_DIV_MASK,
+			     rate->aclk_div << CORE_ACLK_DIV_SHIFT |
+			     rate->pclk_div << CORE_DBG_DIV_SHIFT);
+	} else if (old_rate < hz) {
+		rk_clrsetreg(&cru->clksel_con[con_id],
+			     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK,
+			     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
+			     0 << CORE_DIV_CON_SHIFT);
+		rk_clrsetreg(&cru->clksel_con[con_id + 1],
+			     CORE_ACLK_DIV_MASK | CORE_DBG_DIV_MASK,
+			     rate->aclk_div << CORE_ACLK_DIV_SHIFT |
+			     rate->pclk_div << CORE_DBG_DIV_SHIFT);
+		ret = rkclk_set_pll(priv->cru, pll_id, &pll_config);
+	}
+
+	return rkclk_pll_get_rate(priv->cru, pll_id);
+}
+
 static ulong rk3368_clk_get_rate(struct clk *clk)
 {
 	struct rk3368_clk_priv *priv = dev_get_priv(clk->dev);
@@ -458,15 +844,41 @@ static ulong rk3368_clk_get_rate(struct clk *clk)
 
 	debug("%s: id %ld\n", __func__, clk->id);
 	switch (clk->id) {
+	case PLL_APLLB:
+	case PLL_APLLL:
+	case PLL_DPLL:
 	case PLL_CPLL:
-		rate = rkclk_pll_get_rate(priv->cru, CPLL);
-		break;
 	case PLL_GPLL:
-		rate = rkclk_pll_get_rate(priv->cru, GPLL);
+	case PLL_NPLL:
+		rate = rkclk_pll_get_rate(priv->cru, clk->id - 1);
+		break;
+	case ARMCLKB:
+		rate = rkclk_pll_get_rate(priv->cru, APLLB);
+		break;
+	case ARMCLKL:
+		rate = rkclk_pll_get_rate(priv->cru, APLLL);
 		break;
 	case SCLK_SPI0 ... SCLK_SPI2:
 		rate = rk3368_spi_get_clk(priv->cru, clk->id);
 		break;
+	case ACLK_BUS:
+	case HCLK_BUS:
+	case PCLK_BUS:
+	case PCLK_PWM0:
+	case PCLK_PWM1:
+	case PCLK_I2C0:
+	case PCLK_I2C1:
+		rate = rk3368_bus_get_clk(priv->cru, clk->id);
+		break;
+	case ACLK_PERI:
+	case HCLK_PERI:
+	case PCLK_PERI:
+	case PCLK_I2C2:
+	case PCLK_I2C3:
+	case PCLK_I2C4:
+	case PCLK_I2C5:
+		rate = rk3368_peri_get_clk(priv->cru, clk->id);
+		break;
 #if !IS_ENABLED(CONFIG_SPL_BUILD) || CONFIG_IS_ENABLED(MMC_SUPPORT)
 	case HCLK_SDMMC:
 	case HCLK_EMMC:
@@ -476,28 +888,59 @@ static ulong rk3368_clk_get_rate(struct clk *clk)
 	case SCLK_SARADC:
 		rate = rk3368_saradc_get_clk(priv->cru);
 		break;
+#if !defined(CONFIG_SPL_BUILD)
+	case ACLK_VOP:
+	case DCLK_VOP:
+		rate =  rk3368_vop_get_clk(priv->cru, clk->id);
+		break;
+#endif
 	default:
 		return -ENOENT;
 	}
-
 	return rate;
 }
 
 static ulong rk3368_clk_set_rate(struct clk *clk, ulong rate)
 {
 	__maybe_unused struct rk3368_clk_priv *priv = dev_get_priv(clk->dev);
+	struct pll_div pll_config = {0};
+	u32 pll_div;
 	ulong ret = 0;
 
-	debug("%s id:%ld rate:%ld\n", __func__, clk->id, rate);
 	switch (clk->id) {
+	case PLL_APLLB:
+	case PLL_APLLL:
+	case PLL_CPLL:
+	case PLL_GPLL:
+	case PLL_NPLL:
+		ret = pll_para_config(rate, &pll_config, &pll_div);
+		if (ret)
+			return ret;
+
+		ret = rkclk_set_pll(priv->cru, clk->id - 1, &pll_config);
+		break;
+	case ARMCLKB:
+	case ARMCLKL:
+		ret = rk3368_armclk_set_clk(priv, clk->id, rate);
+		break;
 	case SCLK_SPI0 ... SCLK_SPI2:
 		ret = rk3368_spi_set_clk(priv->cru, clk->id, rate);
 		break;
 #if IS_ENABLED(CONFIG_TPL_BUILD)
-	case CLK_DDR:
+	case SCLK_DDRCLK:
 		ret = rk3368_ddr_set_clk(priv->cru, rate);
 		break;
 #endif
+	case ACLK_BUS:
+	case HCLK_BUS:
+	case PCLK_BUS:
+		rate = rk3368_bus_set_clk(priv->cru, clk->id, rate);
+		break;
+	case ACLK_PERI:
+	case HCLK_PERI:
+	case PCLK_PERI:
+		rate = rk3368_peri_set_clk(priv->cru, clk->id, rate);
+		break;
 #if !IS_ENABLED(CONFIG_SPL_BUILD) || CONFIG_IS_ENABLED(MMC_SUPPORT)
 	case HCLK_SDMMC:
 	case HCLK_EMMC:
@@ -513,6 +956,15 @@ static ulong rk3368_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_SARADC:
 		ret =  rk3368_saradc_set_clk(priv->cru, rate);
 		break;
+#if !defined(CONFIG_SPL_BUILD)
+	case ACLK_VOP:
+	case DCLK_VOP:
+		ret =  rk3368_vop_set_clk(priv->cru, clk->id, rate);
+		break;
+	case ACLK_CCI_PRE:
+		ret =  0;
+		break;
+#endif
 	default:
 		return -ENOENT;
 	}
@@ -576,9 +1028,37 @@ static struct clk_ops rk3368_clk_ops = {
 #endif
 };
 
+#if IS_ENABLED(CONFIG_SPL_BUILD) || IS_ENABLED(CONFIG_TPL_BUILD)
+static void rkclk_init(struct rk3368_cru *cru)
+{
+	u32 apllb, aplll, dpll, cpll, gpll;
+
+	rkclk_set_pll(cru, APLLB, &apll_b_init_cfg);
+	rkclk_set_pll(cru, APLLL, &apll_l_init_cfg);
+#if !defined(CONFIG_TPL_BUILD)
+	/*
+	 * If we plan to return to the boot ROM, we can't increase the
+	 * GPLL rate from the SPL stage.
+	 */
+	rkclk_set_pll(cru, GPLL, &gpll_init_cfg);
+	rkclk_set_pll(cru, CPLL, &cpll_init_cfg);
+#endif
+rk_clrsetreg(&cru->clksel_con[37],  (1 << 8), 1 << 8);
+	apllb = rkclk_pll_get_rate(cru, APLLB);
+	aplll = rkclk_pll_get_rate(cru, APLLL);
+	dpll = rkclk_pll_get_rate(cru, DPLL);
+	cpll = rkclk_pll_get_rate(cru, CPLL);
+	gpll = rkclk_pll_get_rate(cru, GPLL);
+
+	debug("%s apllb(%d) apll(%d) dpll(%d) cpll(%d) gpll(%d)\n",
+	      __func__, apllb, aplll, dpll, cpll, gpll);
+}
+#endif
+
 static int rk3368_clk_probe(struct udevice *dev)
 {
 	struct rk3368_clk_priv __maybe_unused *priv = dev_get_priv(dev);
+	int ret;
 #if CONFIG_IS_ENABLED(OF_PLATDATA)
 	struct rk3368_clk_plat *plat = dev_get_platdata(dev);
 
@@ -587,7 +1067,10 @@ static int rk3368_clk_probe(struct udevice *dev)
 #if IS_ENABLED(CONFIG_SPL_BUILD) || IS_ENABLED(CONFIG_TPL_BUILD)
 	rkclk_init(priv->cru);
 #endif
-
+	/* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
+	ret = clk_set_defaults(dev);
+	if (ret)
+		debug("%s clk_set_defaults failed %d\n", __func__, ret);
 	return 0;
 }
 
@@ -656,3 +1139,61 @@ U_BOOT_DRIVER(rockchip_rk3368_cru) = {
 	.bind		= rk3368_clk_bind,
 	.probe		= rk3368_clk_probe,
 };
+
+#if !defined(CONFIG_SPL_BUILD)
+/**
+ * soc_clk_dump() - Print clock frequencies
+ * Returns zero on success
+ *
+ * Implementation for the clk dump command.
+ */
+int soc_clk_dump(void)
+{
+	struct udevice *cru_dev;
+	const struct rk3368_clk_info *clk_dump;
+	struct clk clk;
+	unsigned long clk_count = ARRAY_SIZE(clks_dump);
+	unsigned long rate;
+	int i, ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_CLK,
+					  DM_GET_DRIVER(rockchip_rk3368_cru),
+					  &cru_dev);
+	if (ret) {
+		printf("%s failed to get cru device\n", __func__);
+		return ret;
+	}
+
+	printf("CLK:");
+	for (i = 0; i < clk_count; i++) {
+		clk_dump = &clks_dump[i];
+		if (clk_dump->name) {
+			clk.id = clk_dump->id;
+			if (clk_dump->is_cru)
+				ret = clk_request(cru_dev, &clk);
+			if (ret < 0)
+				return ret;
+
+			rate = clk_get_rate(&clk);
+			clk_free(&clk);
+			if (i == 0) {
+				if (rate < 0)
+					printf("%10s%20s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("%10s%20lu Hz\n", clk_dump->name,
+					       rate);
+			} else {
+				if (rate < 0)
+					printf("%14s%20s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("%14s%20lu Hz\n", clk_dump->name,
+					       rate);
+			}
+		}
+	}
+
+	return 0;
+}
+#endif
diff --git a/include/dt-bindings/clock/rk3368-cru.h b/include/dt-bindings/clock/rk3368-cru.h
index 9c5dd9ba2f..5d35316867 100644
--- a/include/dt-bindings/clock/rk3368-cru.h
+++ b/include/dt-bindings/clock/rk3368-cru.h
@@ -44,13 +44,12 @@
 #define SCLK_I2S_8CH		82
 #define SCLK_SPDIF_8CH		83
 #define SCLK_I2S_2CH		84
-#define SCLK_TIMER0		85
-#define SCLK_TIMER1		86
-#define SCLK_TIMER2		87
-#define SCLK_TIMER3		88
-#define SCLK_TIMER4		89
-#define SCLK_TIMER5		90
-#define SCLK_TIMER6		91
+#define SCLK_TIMER00		85
+#define SCLK_TIMER01		86
+#define SCLK_TIMER02		87
+#define SCLK_TIMER03		88
+#define SCLK_TIMER04		89
+#define SCLK_TIMER05		90
 #define SCLK_OTGPHY0		93
 #define SCLK_OTG_ADP		96
 #define SCLK_HSICPHY480M	97
@@ -82,6 +81,19 @@
 #define SCLK_SFC		126
 #define SCLK_MAC		127
 #define SCLK_MACREF_OUT		128
+#define SCLK_MIPIDSI_24M	129
+#define SCLK_CRYPTO		130
+#define SCLK_VIP_SRC		131
+#define SCLK_VIP_OUT		132
+#define SCLK_TIMER10		133
+#define SCLK_TIMER11		134
+#define SCLK_TIMER12		135
+#define SCLK_TIMER13		136
+#define SCLK_TIMER14		137
+#define SCLK_TIMER15		138
+#define SCLK_DDRCLK		139
+#define SCLK_TSP		140
+#define SCLK_HSADC_TSP		141
 
 #define DCLK_VOP		190
 #define MCLK_CRYPTO		191
@@ -105,6 +117,7 @@
 #define ACLK_VIDEO		208
 #define ACLK_BUS		209
 #define ACLK_PERI		210
+#define ACLK_CCI_PRE		211
 
 /* pclk gates */
 #define PCLK_GPIO0		320
@@ -151,8 +164,13 @@
 #define PCLK_ISP		366
 #define PCLK_VIP		367
 #define PCLK_WDT		368
+#define PCLK_DPHYRX		369
+#define PCLK_DPHYTX0		370
+#define PCLK_EFUSE256		371
+#define PCLK_EFUSE1024		372
 
 /* hclk gates */
+#define HCLK_USB_PERI		447
 #define HCLK_SFC		448
 #define HCLK_OTG0		449
 #define HCLK_HOST0		450

commit 3ee2bc3c6632c34a4758594e252a365449f74ae5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 2 21:41:19 2018 +0800

    configs: rk3328: enable rockchip efuse
    
    Change-Id: Ie1a307f5a680f962f7dcc07bf9e63c97a6f4f734
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index e9af89c26b..843879ba5e 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -63,6 +63,8 @@ CONFIG_DM_KEY=y
 CONFIG_ADC_KEY=y
 CONFIG_GPIO_KEY=y
 CONFIG_RK_KEY=y
+CONFIG_MISC=y
+CONFIG_ROCKCHIP_EFUSE=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_DM_ETH=y

commit 59a83996bc5a7e2dcbfe446ec23e17b5c26b01d7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 2 20:33:16 2018 +0800

    rockchip: efuse: support rk3328 non-secure efuse
    
    Change-Id: Ie74764ef946b79c2e9f73e9082c1cb8bbc288abb
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c
index f2fb736275..d23e091940 100644
--- a/drivers/misc/rockchip-efuse.c
+++ b/drivers/misc/rockchip-efuse.c
@@ -37,6 +37,13 @@
 #define RK3288_STROBE           BIT(1)
 #define RK3288_CSB              BIT(0)
 
+#define RK3328_INT_STATUS	0x0018
+#define RK3328_DOUT		0x0020
+#define RK3328_AUTO_CTRL	0x0024
+#define RK3328_INT_FINISH	BIT(0)
+#define RK3328_AUTO_ENB		BIT(0)
+#define RK3328_AUTO_RD		BIT(1)
+
 typedef int (*EFUSE_READ)(struct udevice *dev, int offset, void *buf, int size);
 
 struct rockchip_efuse_regs {
@@ -47,6 +54,10 @@ struct rockchip_efuse_regs {
 	u32 jtag_pass; /* 0x10  JTAG password */
 	u32 strobe_finish_ctrl;
 		       /* 0x14	efuse strobe finish control register */
+	u32 int_status;/* 0x18 */
+	u32 reserved;  /* 0x1c */
+	u32 dout2;     /* 0x20 */
+	u32 auto_ctrl; /* 0x24 */
 };
 
 struct rockchip_efuse_platdata {
@@ -182,6 +193,57 @@ static int rockchip_rk3288_efuse_read(struct udevice *dev, int offset,
 	return 0;
 }
 
+static int rockchip_rk3328_efuse_read(struct udevice *dev, int offset,
+				      void *buf, int size)
+{
+	struct rockchip_efuse_platdata *plat = dev_get_platdata(dev);
+	struct rockchip_efuse_regs *efuse =
+		(struct rockchip_efuse_regs *)plat->base;
+	unsigned int addr_start, addr_end, addr_offset, addr_len;
+	u32 out_value, status;
+	u8 *buffer;
+	int ret = 0, i = 0, j = 0;
+
+	/* Max non-secure Byte */
+	if (size > 32)
+		size = 32;
+
+	/* 128 Byte efuse, 96 Byte for secure, 32 Byte for non-secure */
+	offset += 96;
+	addr_start = rounddown(offset, RK3399_BYTES_PER_FUSE) /
+						RK3399_BYTES_PER_FUSE;
+	addr_end = roundup(offset + size, RK3399_BYTES_PER_FUSE) /
+						RK3399_BYTES_PER_FUSE;
+	addr_offset = offset % RK3399_BYTES_PER_FUSE;
+	addr_len = addr_end - addr_start;
+
+	buffer = calloc(1, sizeof(*buffer) * addr_len * RK3399_BYTES_PER_FUSE);
+	if (!buffer)
+		return -ENOMEM;
+
+	for (j = 0; j < addr_len; j++) {
+		writel(RK3328_AUTO_RD | RK3328_AUTO_ENB |
+		       ((addr_start++ & RK3399_A_MASK) << RK3399_A_SHIFT),
+		         &efuse->auto_ctrl);
+		udelay(5);
+		status = readl(&efuse->int_status);
+		if (!(status & RK3328_INT_FINISH)) {
+			ret = -EIO;
+			goto err;
+		}
+		out_value = readl(&efuse->dout2);
+		writel(RK3328_INT_FINISH, &efuse->int_status);
+
+		memcpy(&buffer[i], &out_value, RK3399_BYTES_PER_FUSE);
+		i += RK3399_BYTES_PER_FUSE;
+	}
+	memcpy(buf, buffer + addr_offset, size);
+err:
+	free(buffer);
+
+	return ret;
+}
+
 static int rockchip_efuse_read(struct udevice *dev, int offset,
 			       void *buf, int size)
 {
@@ -223,6 +285,10 @@ static const struct udevice_id rockchip_efuse_ids[] = {
 		.compatible = "rockchip,rk322x-efuse",
 		.data = (ulong)&rockchip_rk3288_efuse_read,
 	},
+	{
+		.compatible = "rockchip,rk3328-efuse",
+		.data = (ulong)&rockchip_rk3328_efuse_read,
+	},
 	{
 		.compatible = "rockchip,rk3399-efuse",
 		.data = (ulong)&rockchip_rk3399_efuse_read,

commit a2df55e58d01052015da4edc8efc6943fdc03b0a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 2 20:20:59 2018 +0800

    configs: rk3128x: enable rockchip efuse
    
    Change-Id: I2e77ee1c487762e6d6e27e9d75ec55d4217251a2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3128x_defconfig b/configs/rk3128x_defconfig
index 22853ff301..0eb3ab4916 100644
--- a/configs/rk3128x_defconfig
+++ b/configs/rk3128x_defconfig
@@ -67,6 +67,8 @@ CONFIG_DM_KEY=y
 CONFIG_ADC_KEY=y
 CONFIG_GPIO_KEY=y
 CONFIG_RK_KEY=y
+CONFIG_MISC=y
+CONFIG_ROCKCHIP_EFUSE=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_DM_ETH=y

commit b4a94719783446259d49e4fa173dda68360077b7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 2 19:10:11 2018 +0800

    rockchip: add fdt overlay after read kernel dtb
    
    Change-Id: If8d6f9d8efa735514e9152dd9d4cda43436f7d18
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index e4c58ece41..7fa5fa7587 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -570,6 +570,7 @@ int rockchip_read_dtb_file(void *fdt_addr)
 	struct resource_file *file;
 	struct list_head *node;
 	char *dtb_name = DTB_FILE;
+	int ret;
 
 	if (list_empty(&entrys_head))
 		init_resource_list(NULL);
@@ -593,5 +594,13 @@ int rockchip_read_dtb_file(void *fdt_addr)
 
 	printf("DTB: %s\n", dtb_name);
 
-	return rockchip_read_resource_file((void *)fdt_addr, dtb_name, 0, 0);
+	ret = rockchip_read_resource_file((void *)fdt_addr, dtb_name, 0, 0);
+	if (ret < 0)
+		return ret;
+
+#if defined(CONFIG_OF_LIBFDT_OVERLAY) && defined(CONFIG_USING_KERNEL_DTB)
+	android_fdt_overlay_apply((void *)fdt_addr);
+#endif
+
+	return ret;
 }

commit f8dbe861166f347342d5f52426dda0ae5da118c7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Aug 1 11:57:50 2018 +0800

    android: support dtb overlay
    
    - read dtbo from recovery or dtbo partition;
    - append "androidboot.dtbo_idx" to cmdline;
    - apply dtb overlay when first read kernel dtb;
    - pass dtb that first time read to kernel;
    
    Change-Id: Iba5c02c1307d3dad69ef96d3b3b0927fb507be8f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 090da46998..e4b373574d 100755
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -9,14 +9,17 @@
 #include <android_avb/avb_slot_verify.h>
 #include <android_avb/avb_ops_user.h>
 #include <android_avb/rk_avb_ops_user.h>
-
+#include <android_image.h>
 #include <cli.h>
 #include <common.h>
+#include <dt_table.h>
+#include <image-android-dt.h>
 #include <malloc.h>
 #include <fs.h>
 #include <boot_rkimg.h>
 #include <attestation_key.h>
 #include <optee_include/OpteeClientInterface.h>
+#include <linux/libfdt_env.h>
 
 #define ANDROID_PARTITION_BOOT "boot"
 #define ANDROID_PARTITION_MISC "misc"
@@ -473,6 +476,229 @@ out:
 }
 #endif
 
+#ifdef CONFIG_OF_LIBFDT_OVERLAY
+
+/*
+ * Default return index 0.
+ */
+__weak int board_select_fdt_index(ulong dt_table_hdr)
+{
+/*
+ * User can use "dt_for_each_entry(entry, hdr, idx)" to iterate
+ * over all dt entry of DT image and pick up which they want.
+ *
+ * Example:
+ *	struct dt_table_entry *entry;
+ *	int index;
+ *
+ *	dt_for_each_entry(entry, dt_table_hdr, index) {
+ *
+ *		.... (use entry)
+ *	}
+ *
+ *	return index;
+ */
+	return 0;
+}
+
+static int android_get_dtbo(ulong *fdt_dtbo,
+			    const struct andr_img_hdr *hdr,
+			    int *index)
+{
+	struct dt_table_header *dt_hdr = NULL;
+	struct blk_desc *dev_desc;
+	const char *part_name;
+	disk_partition_t part_info;
+	u32 blk_offset, blk_cnt;
+	void *buf;
+	ulong e_addr;
+	u32 e_size;
+	int e_idx;
+	int ret;
+
+	/* Get partition according to boot mode */
+	if (rockchip_get_boot_mode() == BOOT_MODE_RECOVERY)
+		part_name = PART_RECOVERY;
+	else
+		part_name = PART_DTBO;
+
+	/* Get partition info */
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -ENODEV;
+	}
+
+	ret = part_get_info_by_name(dev_desc, part_name, &part_info);
+	if (ret < 0) {
+		printf("%s: failed to get %s part info, ret=%d\n",
+		       __func__, part_name, ret);
+		return ret;
+	}
+
+	/* Check dt table header */
+	if (!strcmp(part_name, PART_RECOVERY))
+		blk_offset = part_info.start +
+			     (hdr->recovery_dtbo_offset / part_info.blksz);
+	else
+		blk_offset = part_info.start;
+
+	dt_hdr = memalign(ARCH_DMA_MINALIGN, part_info.blksz);
+	if (!dt_hdr) {
+		printf("%s: out of memory for dt header!\n", __func__);
+		return -ENOMEM;
+	}
+
+	ret = blk_dread(dev_desc, blk_offset, 1, dt_hdr);
+	if (ret != 1) {
+		printf("%s: failed to read dt table header\n",
+		       __func__);
+		goto out1;
+	}
+
+	if (!android_dt_check_header((ulong)dt_hdr)) {
+		printf("%s: Error: invalid dt table header: 0x%x\n",
+		       __func__, dt_hdr->magic);
+		ret = -EINVAL;
+		goto out1;
+	}
+
+#ifdef DEBUG
+	android_dt_print_contents((ulong)dt_hdr);
+#endif
+
+	blk_cnt = DIV_ROUND_UP(fdt32_to_cpu(dt_hdr->total_size),
+			       part_info.blksz);
+	/* Read all DT Image */
+	buf = memalign(ARCH_DMA_MINALIGN, part_info.blksz * blk_cnt);
+	if (!buf) {
+		printf("%s: out of memory for %s part!\n", __func__, part_name);
+		ret = -ENOMEM;
+		goto out1;
+	}
+
+	ret = blk_dread(dev_desc, blk_offset, blk_cnt, buf);
+	if (ret != blk_cnt) {
+		printf("%s: failed to read dtbo, blk_cnt=%d, ret=%d\n",
+		       __func__, blk_cnt, ret);
+		goto out2;
+	}
+
+	e_idx = board_select_fdt_index((ulong)buf);
+	if (e_idx < 0) {
+		printf("%s: failed to select board fdt index\n", __func__);
+		ret = -EINVAL;
+		goto out2;
+	}
+
+	ret = android_dt_get_fdt_by_index((ulong)buf, e_idx, &e_addr, &e_size);
+	if (!ret) {
+		printf("%s: failed to get fdt, index=%d\n", __func__, e_idx);
+		ret = -EINVAL;
+		goto out2;
+	}
+
+	if (fdt_dtbo)
+		*fdt_dtbo = e_addr;
+	if (index)
+		*index = e_idx;
+
+	free(dt_hdr);
+	debug("ANDROID: Loading dt entry to 0x%lx size 0x%x idx %d from \"%s\" part\n",
+	      e_addr, e_size, e_idx, part_name);
+
+	return 0;
+
+out2:
+	free(buf);
+out1:
+	free(dt_hdr);
+
+	return ret;
+}
+
+int android_fdt_overlay_apply(void *fdt_addr)
+{
+	struct andr_img_hdr *hdr;
+	struct blk_desc *dev_desc;
+	const char *part_name;
+	disk_partition_t part_info;
+	char buf[32] = {0};
+	u32 blk_cnt;
+	ulong fdt_dtbo = -1;
+	int index = -1;
+	int ret;
+
+	/* Get partition according to boot mode */
+	if (rockchip_get_boot_mode() == BOOT_MODE_RECOVERY)
+		part_name = PART_RECOVERY;
+	else
+		part_name = PART_BOOT;
+
+	/* Get partition info */
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -ENODEV;
+	}
+
+	ret = part_get_info_by_name(dev_desc, part_name, &part_info);
+	if (ret < 0) {
+		printf("%s: failed to get %s part info, ret=%d\n",
+		       __func__, part_name, ret);
+		return ret;
+	}
+
+	blk_cnt = DIV_ROUND_UP(sizeof(*hdr), part_info.blksz);
+	hdr = memalign(ARCH_DMA_MINALIGN, part_info.blksz * blk_cnt);
+	if (!hdr) {
+		printf("%s: out of memory!\n", __func__);
+		return -ENOMEM;
+	}
+
+	ret = blk_dread(dev_desc, part_info.start, blk_cnt, hdr);
+	if (ret != blk_cnt) {
+		printf("%s: failed to read %s hdr!\n", __func__, part_name);
+		goto out;
+	}
+
+#ifdef DEBUG
+	android_print_contents(hdr);
+#endif
+
+	if (android_image_check_header(hdr)) {
+		printf("%s: Invalid Android header %s\n", __func__, hdr->magic);
+		return -EINVAL;
+	}
+
+	/* Check header version */
+	if (!hdr->header_version) {
+		printf("Android header version 0\n");
+		ret = -EINVAL;
+		goto out;
+	}
+
+	ret = android_get_dtbo(&fdt_dtbo, (void *)hdr, &index);
+	if (!ret) {
+		/* Must incease size before overlay */
+		fdt_increase_size(fdt_addr, fdt_totalsize((void *)fdt_dtbo));
+		ret = fdt_overlay_apply(fdt_addr, (void *)fdt_dtbo);
+		if (!ret) {
+			snprintf(buf, 32, "%s%d", "androidboot.dtbo_", index);
+			env_update("bootargs", buf);
+			printf("ANDROID: fdt overlay OK\n");
+		} else {
+			printf("ANDROID: fdt overlay failed, ret=%d\n", ret);
+		}
+	}
+
+out:
+	free(hdr);
+
+	return 0;
+}
+#endif
+
 int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 				 unsigned long load_address)
 {
@@ -609,6 +835,15 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	ret = android_image_get_fdt((void *)load_address, &fdt_addr);
 	if (!ret)
 		env_set_hex("fdt_addr", fdt_addr);
+
+/*
+ * Actually if CONFIG_USING_KERNEL_DTB is enbled, we have already read kernel
+ * dtb and apply overlay in init_kernel_dtb(), so that we don't need to apply
+ * again, we would pass the current fdt to kernel.
+ */
+#if defined(CONFIG_OF_LIBFDT_OVERLAY) && !defined(CONFIG_USING_KERNEL_DTB)
+	android_fdt_overlay_apply((void *)fdt_addr);
+#endif
 #endif
 	android_bootloader_boot_kernel(load_address);
 
diff --git a/common/image-android.c b/common/image-android.c
index 6a6475c8e1..c15efb23d3 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -14,6 +14,8 @@
 #include <asm/arch/resource_img.h>
 #endif
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #define ANDROID_IMAGE_DEFAULT_KERNEL_ADDR	0x10008000
 #define ANDROID_ARG_FDT_FILENAME "rk-kernel.dtb"
 
@@ -191,7 +193,15 @@ int android_image_get_fdt(const struct andr_img_hdr *hdr,
 
 	printf("FDT load addr 0x%08x size %u KiB\n",
 	       hdr->second_addr, DIV_ROUND_UP(hdr->second_size, 1024));
-
+/*
+ * Actually we have read kernel dtb in init_kernel_dtb() and do overlay
+ * when CONFIG_USING_KERNEL_DTB is enbled, and we also didn't update it at all.
+ * So that we pass current fdt blob to kernel, otherwise we have to do overlay
+ * again which wastes time.
+ */
+#if defined(CONFIG_OF_LIBFDT_OVERLAY) && defined(CONFIG_USING_KERNEL_DTB)
+	*rd_data = (ulong)gd->fdt_blob;
+#else
 	*rd_data = (unsigned long)hdr;
 	*rd_data += hdr->page_size;
 	*rd_data += ALIGN(hdr->kernel_size, hdr->page_size);
@@ -201,6 +211,8 @@ int android_image_get_fdt(const struct andr_img_hdr *hdr,
 		     ANDROID_ARG_FDT_FILENAME))
 			* 512;
 #endif
+#endif
+
 	return 0;
 }
 
diff --git a/include/android_bootloader.h b/include/android_bootloader.h
index 19854c8bce..15498b7fe3 100644
--- a/include/android_bootloader.h
+++ b/include/android_bootloader.h
@@ -86,4 +86,12 @@ int android_boot_flow(unsigned long kernel_address);
  */
 char *android_str_append(char *base_name, char *slot_suffix);
 
+/** anrdroid_fdt_overlay_apply- apply fdt overlay.
+ *
+ * @fdt_addr: fdt blob.
+ *
+ * @return 0 on success, otherwise failed.
+ */
+int android_fdt_overlay_apply(void *fdt_addr);
+
 #endif  /* __ANDROID_BOOTLOADER_H */
diff --git a/include/boot_rkimg.h b/include/boot_rkimg.h
index 7a094be074..e88375159f 100644
--- a/include/boot_rkimg.h
+++ b/include/boot_rkimg.h
@@ -23,6 +23,7 @@ enum _boot_mode {
 #define PART_KERNEL			"kernel"
 #define PART_BOOT			"boot"
 #define PART_RECOVERY			"recovery"
+#define PART_DTBO			"dtbo"
 
 #define RK_BLK_SIZE 512
 

commit b11786b4f0e9ced2a8ad506c8ba9ccf14c36bb2a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 2 19:03:13 2018 +0800

    input: rk key: fix missing register key into dm input uclass
    
    Change-Id: I3237923ed14724e838a8b79a40db4ac45dde5f16
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/rk_key.c b/drivers/input/rk_key.c
index 8a58e1b0e1..44f2b5d4a7 100644
--- a/drivers/input/rk_key.c
+++ b/drivers/input/rk_key.c
@@ -71,6 +71,7 @@ static int rk_keys_ofdata_to_platdata(struct udevice *dev)
 				free(key);
 				continue;
 			}
+			key_add(key);
 		/* This is a GPIO key */
 		} else {
 			key->parent = dev;

commit c67b8746fb5c458adabef731dad3ca8ad95a56b6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 2 10:37:38 2018 +0800

    image: android: use debug to print cmdline
    
    if cmdline is too long, it wastes time.
    
    Change-Id: Ie8658fca11c3706df50d1eaae2ee479af6e8de08
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/image-android.c b/common/image-android.c
index ab877016fc..6a6475c8e1 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -90,7 +90,7 @@ int android_image_get_kernel(const struct andr_img_hdr *hdr, int verify,
 
 	int len = 0;
 	if (*hdr->cmdline) {
-		printf("Kernel command line: %s\n", hdr->cmdline);
+		debug("Kernel command line: %s\n", hdr->cmdline);
 		len += strlen(hdr->cmdline);
 	}
 

commit bcd21a1f01d7dfe99bc763a28a796bb5cad0815c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Aug 1 15:43:32 2018 +0800

    image: android-dt: add dt_for_each_entry() to iterate over all dt entry of DT image
    
    Change-Id: I4db1e1da0d55701798bb8c296dd58e26592ef3c8
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/image-android-dt.c b/common/image-android-dt.c
index ccef164e20..c3d424a7b6 100644
--- a/common/image-android-dt.c
+++ b/common/image-android-dt.c
@@ -155,3 +155,20 @@ void android_dt_print_contents(ulong hdr_addr)
 	}
 }
 #endif
+
+/**
+ * Get dt entry count of DT image structure.
+ *
+ * @param hdr_addr Start address of DT image
+ */
+int android_dt_get_count(ulong hdr_addr)
+{
+	const struct dt_table_header *hdr;
+	int count;
+
+	hdr = map_sysmem(hdr_addr, sizeof(*hdr));
+	count = fdt32_to_cpu(hdr->dt_entry_count);
+	unmap_sysmem(hdr);
+
+	return count;
+}
diff --git a/include/image-android-dt.h b/include/image-android-dt.h
index 08b810d461..fdf7945cda 100644
--- a/include/image-android-dt.h
+++ b/include/image-android-dt.h
@@ -13,9 +13,36 @@
 bool android_dt_check_header(ulong hdr_addr);
 bool android_dt_get_fdt_by_index(ulong hdr_addr, u32 index, ulong *addr,
 				 u32 *size);
+int android_dt_get_count(ulong hdr_addr);
 
 #if !defined(CONFIG_SPL_BUILD)
 void android_dt_print_contents(ulong hdr_addr);
 #endif
 
+/**
+ * dt_for_each_entry() - iterate over all dt entry of DT image
+ *
+ * @entry:   struct dt_table_entry pointing to entry address
+ * @hdr:     struct dt_table_header pointing to hdr address
+ * @idx:     temporary index variant
+ *
+ * This is a wrapper around a for loop and is used like so:
+ *
+ *	struct dt_table_header *hdr;
+ *	struct dt_table_entry *entry;
+ *	int index;
+ *
+ *	......
+ *
+ *	dt_for_each_entry(entry, hdr, index) {
+ *		Use entry
+ *		...
+ *	}
+ *
+ */
+#define dt_for_each_entry(entry, hdr, idx) \
+	for (idx = 0, android_dt_get_fdt_by_index((ulong)hdr, idx, (ulong *)&entry, NULL); \
+	     idx < android_dt_get_count((ulong)hdr); \
+	     idx++, android_dt_get_fdt_by_index((ulong)hdr, idx, (ulong *)&entry, NULL))
+
 #endif /* IMAGE_ANDROID_DT_H */

commit c673757f56637a61c76a208b0ba55770c69e39a8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Aug 1 11:29:42 2018 +0800

    common: fdt_support: support "bootargs_ext" merge into "bootargs"
    
    When DTBO is enabled, dtbo may provide "bootargs_ext" to append
    cmdline base on "bootargs".
    
    Change-Id: I4abf554591a3983c5f41494ecadf5614b8f6404b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/fdt_support.c b/common/fdt_support.c
index 667b7e06fa..df8e1a2b0d 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -274,8 +274,13 @@ int fdt_initrd(void *fdt, ulong initrd_start, ulong initrd_end)
 
 int fdt_chosen(void *fdt)
 {
+	/*
+	 * "bootargs_ext" is used when dtbo is applied.
+	 */
+	const char *arr_bootargs[] = { "bootargs", "bootargs_ext" };
 	int   nodeoffset;
 	int   err;
+	int   i;
 	char  *str;		/* used to set string properties */
 
 	err = fdt_check_header(fdt);
@@ -294,28 +299,31 @@ int fdt_chosen(void *fdt)
 #ifdef CONFIG_ARCH_ROCKCHIP
 		const char *bootargs;
 
-		bootargs = fdt_getprop(fdt, nodeoffset, "bootargs", NULL);
-		if (bootargs) {
-			/*
-			 * Append kernel bootargs
-			 * If use AB system, delete default "root=" which route
-			 * to rootfs. Then the ab bootctl will choose the
-			 * high priority system to boot and add its UUID
-			 * to cmdline. The format is "roo=PARTUUID=xxxx...".
-			 */
+		for (i = 0; i < ARRAY_SIZE(arr_bootargs); i++) {
+			bootargs = fdt_getprop(fdt, nodeoffset,
+					       arr_bootargs[i], NULL);
+			if (bootargs) {
+				/*
+				 * Append kernel bootargs
+				 * If use AB system, delete default "root=" which route
+				 * to rootfs. Then the ab bootctl will choose the
+				 * high priority system to boot and add its UUID
+				 * to cmdline. The format is "roo=PARTUUID=xxxx...".
+				 */
 #ifdef CONFIG_ANDROID_AB
-			env_update_filter("bootargs", bootargs, "root=");
+				env_update_filter("bootargs", bootargs, "root=");
 #else
-			/*
-			 * Initrd fixup: remove unused "initrd=0x...,0x...",
-			 * this for compatible with legacy parameter.txt
-			 */
-			env_update_filter("bootargs", bootargs, "initrd=");
+				/*
+				 * Initrd fixup: remove unused "initrd=0x...,0x...",
+				 * this for compatible with legacy parameter.txt
+				 */
+				env_update_filter("bootargs", bootargs, "initrd=");
 #endif
-
-			str = env_get("bootargs");
-		}
+			}
 #endif
+		}
+
+		str = env_get("bootargs");
 		err = fdt_setprop(fdt, nodeoffset, "bootargs", str,
 				  strlen(str) + 1);
 		if (err < 0) {

commit 09f4e561ace5897aa7294ad9c23f5a48a94e3fdf
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jul 25 16:22:38 2018 +0800

    android: update android image header to support new version
    
    mainly to support android P.
    
    Change-Id: I34a49e4eedcde06a9e40792c7c908737dc10b426
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/image-android.c b/common/image-android.c
index a61d37177e..ab877016fc 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -141,6 +141,9 @@ ulong android_image_get_end(const struct andr_img_hdr *hdr)
 	end += ALIGN(hdr->ramdisk_size, hdr->page_size);
 	end += ALIGN(hdr->second_size, hdr->page_size);
 
+	if (hdr->header_version >= 1)
+		end += ALIGN(hdr->recovery_dtbo_size, hdr->page_size);
+
 	return end;
 }
 
@@ -300,6 +303,7 @@ void android_print_contents(const struct andr_img_hdr *hdr)
 	/* os_version = ver << 11 | lvl */
 	u32 os_ver = hdr->os_version >> 11;
 	u32 os_lvl = hdr->os_version & ((1U << 11) - 1);
+	u32 header_version = hdr->header_version;
 
 	printf("%skernel size:      %x\n", p, hdr->kernel_size);
 	printf("%skernel address:   %x\n", p, hdr->kernel_addr);
@@ -309,6 +313,7 @@ void android_print_contents(const struct andr_img_hdr *hdr)
 	printf("%ssecond address:   %x\n", p, hdr->second_addr);
 	printf("%stags address:     %x\n", p, hdr->tags_addr);
 	printf("%spage size:        %x\n", p, hdr->page_size);
+	printf("%sheader_version:   %x\n", p, header_version);
 	/* ver = A << 14 | B << 7 | C         (7 bits for each of A, B, C)
 	 * lvl = ((Y - 2000) & 127) << 4 | M  (7 bits for Y, 4 bits for M) */
 	printf("%sos_version:       %x (ver: %u.%u.%u, level: %u.%u)\n",
@@ -317,5 +322,11 @@ void android_print_contents(const struct andr_img_hdr *hdr)
 	       (os_lvl >> 4) + 2000, os_lvl & 0x0F);
 	printf("%sname:             %s\n", p, hdr->name);
 	printf("%scmdline:          %s\n", p, hdr->cmdline);
+
+	if (header_version >= 1) {
+		printf("%srecovery dtbo size:    %x\n", p, hdr->recovery_dtbo_size);
+		printf("%srecovery dtbo offset:  %llx\n", p, hdr->recovery_dtbo_offset);
+		printf("%sheader size:           %x\n", p, hdr->header_size);
+	}
 }
 #endif
diff --git a/include/android_image.h b/include/android_image.h
index dfd4d9d72c..3c3319765b 100644
--- a/include/android_image.h
+++ b/include/android_image.h
@@ -34,7 +34,8 @@ struct andr_img_hdr {
 
 	u32 tags_addr;		/* physical addr for kernel tags */
 	u32 page_size;		/* flash page size we assume */
-	u32 unused;		/* reserved for future expansion: MUST be 0 */
+
+	u32 header_version;
 
 	/* operating system version and security patch level; for
 	 * version "A.B.C" and patch level "Y-M-D":
@@ -52,6 +53,10 @@ struct andr_img_hdr {
 	/* Supplemental command line data; kept here to maintain
 	 * binary compatibility with older versions of mkbootimg */
 	char extra_cmdline[ANDR_BOOT_EXTRA_ARGS_SIZE];
+
+	uint32_t recovery_dtbo_size;	/* size of recovery dtbo image */
+	uint64_t recovery_dtbo_offset;	/* offset in boot image */
+	uint32_t header_size;		/* size of boot image header in bytes */
 } __attribute__((packed));
 
 /*

commit 9322063530546bd762ec823fb123303de3b74d96
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Tue Jul 31 08:44:59 2018 +0800

    configs: rk3128x_defconfig: enable CONFIG_OF_LIBFDT_OVERLAY
    
    Change-Id: I4474350c7ab45412f05ff3ef79f3f6363e68712b
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/configs/rk3128x_defconfig b/configs/rk3128x_defconfig
index 66fcd10c62..22853ff301 100644
--- a/configs/rk3128x_defconfig
+++ b/configs/rk3128x_defconfig
@@ -109,4 +109,5 @@ CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_TPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
+CONFIG_OF_LIBFDT_OVERLAY=y
 CONFIG_TEST_ROCKCHIP=y

commit aa1c055a6ed4112dac1c167f35b57270e9f44cfa
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Tue Jul 31 08:41:45 2018 +0800

    configs: rk3128x_defconfig: enable CONFIG_CMD_DTIMG
    
    Change-Id: Ia088c543b001219db6c85792620c1a57f233e491
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/configs/rk3128x_defconfig b/configs/rk3128x_defconfig
index eabbbc1307..66fcd10c62 100644
--- a/configs/rk3128x_defconfig
+++ b/configs/rk3128x_defconfig
@@ -34,6 +34,7 @@ CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_CMD_DTIMG=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
 CONFIG_CMD_LOAD_ANDROID=y

commit df8be4b672e36d21dc069ea4e393cf5e773b9d23
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Tue Jul 31 08:35:24 2018 +0800

    rockchip: rk3128x: update with save defconfig
    
    Change-Id: I2f6a904c0462c25be0bd705bfa83dc4f3334ed8c
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/configs/rk3128x_defconfig b/configs/rk3128x_defconfig
index 63fa63940e..eabbbc1307 100644
--- a/configs/rk3128x_defconfig
+++ b/configs/rk3128x_defconfig
@@ -3,11 +3,11 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x800
-CONFIG_ROCKCHIP_RK322X=y
-CONFIG_ROCKCHIP_RK3128X=y
 CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl.lds"
 CONFIG_TPL_TEXT_BASE=0x10081000
 CONFIG_TPL_MAX_SIZE=28672
+CONFIG_ROCKCHIP_RK322X=y
+CONFIG_ROCKCHIP_RK3128X=y
 CONFIG_TPL_STACK=0x10088000
 CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0

commit 2967d2f74db644dda815e738c9d9c068c50768c1
Author: Sam Protsenko <semen.protsenko@linaro.org>
Date:   Wed Jun 6 17:06:54 2018 +0300

    FROMLIST: cmd: Add dtimg command
    
    dtimg command allows user to work with Android DTB/DTBO image format.
    Such as, getting the address of desired DTB/DTBO file, printing the dump
    of the image in U-Boot shell, etc.
    
    This command is needed to provide Android boot with new Android DT image
    format further.
    
    Change-Id: I2a626f333f604b6f0424aa03feaddab4e8506a3f
    Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
    (am from http://patchwork.ozlabs.org/patch/925871/)

diff --git a/cmd/Kconfig b/cmd/Kconfig
index bfd78ddd8c..cf6454c9b9 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -231,6 +231,14 @@ config CMD_BOOTMENU
 	help
 	  Add an ANSI terminal boot menu command.
 
+config CMD_DTIMG
+	bool "dtimg"
+	help
+	  Android DTB/DTBO image manipulation commands. Read dtb/dtbo files from
+	  image into RAM, dump image structure information, etc. Those dtb/dtbo
+	  files should be merged in one dtb further, which needs to be passed to
+	  the kernel, as part of a boot process.
+
 config CMD_ELF
 	bool "bootelf, bootvx"
 	default y
diff --git a/cmd/Makefile b/cmd/Makefile
index 4f12f6fdbe..7ca3bbd09b 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -46,6 +46,7 @@ ifdef CONFIG_POST
 obj-$(CONFIG_CMD_DIAG) += diag.o
 endif
 obj-$(CONFIG_CMD_DISPLAY) += display.o
+obj-$(CONFIG_CMD_DTIMG) += dtimg.o
 obj-$(CONFIG_CMD_ECHO) += echo.o
 obj-$(CONFIG_ENV_IS_IN_EEPROM) += eeprom.o
 obj-$(CONFIG_CMD_EEPROM) += eeprom.o
diff --git a/cmd/dtimg.c b/cmd/dtimg.c
new file mode 100644
index 0000000000..5295a341ad
--- /dev/null
+++ b/cmd/dtimg.c
@@ -0,0 +1,142 @@
+/*
+ * (C) Copyright 2018 Linaro Ltd.
+ * Sam Protsenko <semen.protsenko@linaro.org>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <image-android-dt.h>
+#include <common.h>
+
+enum cmd_dtimg_info {
+	CMD_DTIMG_START = 0,
+	CMD_DTIMG_SIZE,
+};
+
+static int do_dtimg_dump(cmd_tbl_t *cmdtp, int flag, int argc,
+			 char * const argv[])
+{
+	char *endp;
+	ulong hdr_addr;
+
+	if (argc != 2)
+		return CMD_RET_USAGE;
+
+	hdr_addr = simple_strtoul(argv[1], &endp, 16);
+	if (*endp != '\0') {
+		printf("Error: Wrong image address\n");
+		return CMD_RET_FAILURE;
+	}
+
+	if (!android_dt_check_header(hdr_addr)) {
+		printf("Error: DT image header is incorrect\n");
+		return CMD_RET_FAILURE;
+	}
+
+	android_dt_print_contents(hdr_addr);
+
+	return CMD_RET_SUCCESS;
+}
+
+static int dtimg_get_fdt(int argc, char * const argv[], enum cmd_dtimg_info cmd)
+{
+	ulong hdr_addr;
+	u32 index;
+	char *endp;
+	ulong fdt_addr;
+	u32 fdt_size;
+	char buf[65];
+
+	if (argc != 4)
+		return CMD_RET_USAGE;
+
+	hdr_addr = simple_strtoul(argv[1], &endp, 16);
+	if (*endp != '\0') {
+		printf("Error: Wrong image address\n");
+		return CMD_RET_FAILURE;
+	}
+
+	if (!android_dt_check_header(hdr_addr)) {
+		printf("Error: DT image header is incorrect\n");
+		return CMD_RET_FAILURE;
+	}
+
+	index = simple_strtoul(argv[2], &endp, 0);
+	if (*endp != '\0') {
+		printf("Error: Wrong index\n");
+		return CMD_RET_FAILURE;
+	}
+
+	if (!android_dt_get_fdt_by_index(hdr_addr, index, &fdt_addr, &fdt_size))
+		return CMD_RET_FAILURE;
+
+	switch (cmd) {
+	case CMD_DTIMG_START:
+		snprintf(buf, sizeof(buf), "%lx", fdt_addr);
+		break;
+	case CMD_DTIMG_SIZE:
+		snprintf(buf, sizeof(buf), "%x", fdt_size);
+		break;
+	default:
+		printf("Error: Unknown cmd_dtimg_info value: %d\n", cmd);
+		return CMD_RET_FAILURE;
+	}
+
+	env_set(argv[3], buf);
+
+	return CMD_RET_SUCCESS;
+}
+
+static int do_dtimg_start(cmd_tbl_t *cmdtp, int flag, int argc,
+			  char * const argv[])
+{
+	return dtimg_get_fdt(argc, argv, CMD_DTIMG_START);
+}
+
+static int do_dtimg_size(cmd_tbl_t *cmdtp, int flag, int argc,
+			 char * const argv[])
+{
+	return dtimg_get_fdt(argc, argv, CMD_DTIMG_SIZE);
+}
+
+static cmd_tbl_t cmd_dtimg_sub[] = {
+	U_BOOT_CMD_MKENT(dump, 2, 0, do_dtimg_dump, "", ""),
+	U_BOOT_CMD_MKENT(start, 4, 0, do_dtimg_start, "", ""),
+	U_BOOT_CMD_MKENT(size, 4, 0, do_dtimg_size, "", ""),
+};
+
+static int do_dtimg(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+	cmd_tbl_t *cp;
+
+	cp = find_cmd_tbl(argv[1], cmd_dtimg_sub, ARRAY_SIZE(cmd_dtimg_sub));
+
+	/* Strip off leading 'dtimg' command argument */
+	argc--;
+	argv++;
+
+	if (!cp || argc > cp->maxargs)
+		return CMD_RET_USAGE;
+	if (flag == CMD_FLAG_REPEAT && !cp->repeatable)
+		return CMD_RET_SUCCESS;
+
+	return cp->cmd(cmdtp, flag, argc, argv);
+}
+
+U_BOOT_CMD(
+	dtimg, CONFIG_SYS_MAXARGS, 0, do_dtimg,
+	"manipulate dtb/dtbo Android image",
+	"dump <addr>\n"
+	"    - parse specified image and print its structure info\n"
+	"      <addr>: image address in RAM, in hex\n"
+	"dtimg start <addr> <index> <varname>\n"
+	"    - get address (hex) of FDT in the image, by index\n"
+	"      <addr>: image address in RAM, in hex\n"
+	"      <index>: index of desired FDT in the image\n"
+	"      <varname>: name of variable where to store address of FDT\n"
+	"dtimg size <addr> <index> <varname>\n"
+	"    - get size (hex, bytes) of FDT in the image, by index\n"
+	"      <addr>: image address in RAM, in hex\n"
+	"      <index>: index of desired FDT in the image\n"
+	"      <varname>: name of variable where to store size of FDT"
+);
diff --git a/common/Makefile b/common/Makefile
index 49b434923d..47e291daa1 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -110,6 +110,11 @@ obj-$(CONFIG_$(SPL_TPL_)FIT_SIGNATURE) += image-sig.o
 obj-$(CONFIG_IO_TRACE) += iotrace.o
 obj-y += memsize.o
 obj-y += stdio.o
+
+ifdef CONFIG_CMD_DTIMG
+obj-y += image-android-dt.o
+endif
+
 obj-$(CONFIG_RKIMG_BOOTLOADER) += boot_rkimg.o
 # This option is not just y/n - it can have a numeric value
 ifdef CONFIG_FASTBOOT_FLASH

commit e91b3373a9bad04a313764685949e4e553445872
Author: Sam Protsenko <semen.protsenko@linaro.org>
Date:   Wed Jun 6 17:06:53 2018 +0300

    FROMLIST: common: Add support for Android DT image
    
    Android documentation recommends new image format for storing DTB/DTBO
    files: [1]. To support that format, this patch adds helper functions for
    Android DTB/DTBO format. In image-android-dt.* files you can find helper
    functions to work with Android DT image format, such us routines for:
        - printing the dump of image structure
        - getting the address and size of desired dtb/dtbo file
    
    This patch uses dt_table.h file, that was added in 643cefa4d848 ("Import
    Android's dt_table.h for DT image format") by Alex Deymo.
    
    [1] https://source.android.com/devices/architecture/dto/partitions
    
    Change-Id: I78f6750af6c4fecb80d331bc06bc5cbe98da5825
    Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
    (am from http://patchwork.ozlabs.org/patch/925870/)

diff --git a/common/image-android-dt.c b/common/image-android-dt.c
new file mode 100644
index 0000000000..ccef164e20
--- /dev/null
+++ b/common/image-android-dt.c
@@ -0,0 +1,157 @@
+/*
+ * (C) Copyright 2018 Linaro Ltd.
+ * Sam Protsenko <semen.protsenko@linaro.org>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <image-android-dt.h>
+#include <dt_table.h>
+#include <common.h>
+#include <linux/libfdt.h>
+#include <mapmem.h>
+
+/**
+ * Check if image header is correct.
+ *
+ * @param hdr_addr Start address of DT image
+ * @return true if header is correct or false if header is incorrect
+ */
+bool android_dt_check_header(ulong hdr_addr)
+{
+	const struct dt_table_header *hdr;
+	u32 magic;
+
+	hdr = map_sysmem(hdr_addr, sizeof(*hdr));
+	magic = fdt32_to_cpu(hdr->magic);
+	unmap_sysmem(hdr);
+
+	return magic == DT_TABLE_MAGIC;
+}
+
+/**
+ * Get the address of FDT (dtb or dtbo) in memory by its index in image.
+ *
+ * @param hdr_addr Start address of DT image
+ * @param index Index of desired FDT in image (starting from 0)
+ * @param[out] addr If not NULL, will contain address to specified FDT
+ * @param[out] size If not NULL, will contain size of specified FDT
+ *
+ * @return true on success or false on error
+ */
+bool android_dt_get_fdt_by_index(ulong hdr_addr, u32 index, ulong *addr,
+				 u32 *size)
+{
+	const struct dt_table_header *hdr;
+	const struct dt_table_entry *e;
+	u32 entry_count, entries_offset, entry_size;
+	ulong e_addr;
+	u32 dt_offset, dt_size;
+
+	hdr = map_sysmem(hdr_addr, sizeof(*hdr));
+	entry_count = fdt32_to_cpu(hdr->dt_entry_count);
+	entries_offset = fdt32_to_cpu(hdr->dt_entries_offset);
+	entry_size = fdt32_to_cpu(hdr->dt_entry_size);
+	unmap_sysmem(hdr);
+
+	if (index > entry_count) {
+		printf("Error: index > dt_entry_count (%u > %u)\n", index,
+		       entry_count);
+		return false;
+	}
+
+	e_addr = hdr_addr + entries_offset + index * entry_size;
+	e = map_sysmem(e_addr, sizeof(*e));
+	dt_offset = fdt32_to_cpu(e->dt_offset);
+	dt_size = fdt32_to_cpu(e->dt_size);
+	unmap_sysmem(e);
+
+	if (addr)
+		*addr = hdr_addr + dt_offset;
+	if (size)
+		*size = dt_size;
+
+	return true;
+}
+
+#if !defined(CONFIG_SPL_BUILD)
+static void android_dt_print_fdt_info(const struct fdt_header *fdt)
+{
+	u32 fdt_size;
+	int root_node_off;
+	const char *compatible = NULL;
+
+	fdt_size = fdt_totalsize(fdt);
+	root_node_off = fdt_path_offset(fdt, "/");
+	if (root_node_off < 0) {
+		printf("Error: Root node not found\n");
+	} else {
+		compatible = fdt_getprop(fdt, root_node_off, "compatible",
+					 NULL);
+	}
+
+	printf("           (FDT)size = %d\n", fdt_size);
+	printf("     (FDT)compatible = %s\n",
+	       compatible ? compatible : "(unknown)");
+}
+
+/**
+ * Print information about DT image structure.
+ *
+ * @param hdr_addr Start address of DT image
+ */
+void android_dt_print_contents(ulong hdr_addr)
+{
+	const struct dt_table_header *hdr;
+	u32 entry_count, entries_offset, entry_size;
+	u32 i;
+
+	hdr = map_sysmem(hdr_addr, sizeof(*hdr));
+	entry_count = fdt32_to_cpu(hdr->dt_entry_count);
+	entries_offset = fdt32_to_cpu(hdr->dt_entries_offset);
+	entry_size = fdt32_to_cpu(hdr->dt_entry_size);
+
+	/* Print image header info */
+	printf("dt_table_header:\n");
+	printf("               magic = %08x\n", fdt32_to_cpu(hdr->magic));
+	printf("          total_size = %d\n", fdt32_to_cpu(hdr->total_size));
+	printf("         header_size = %d\n", fdt32_to_cpu(hdr->header_size));
+	printf("       dt_entry_size = %d\n", entry_size);
+	printf("      dt_entry_count = %d\n", entry_count);
+	printf("   dt_entries_offset = %d\n", entries_offset);
+	printf("           page_size = %d\n", fdt32_to_cpu(hdr->page_size));
+	printf("             version = %08x\n", fdt32_to_cpu(hdr->version));
+
+	unmap_sysmem(hdr);
+
+	/* Print image entries info */
+	for (i = 0; i < entry_count; ++i) {
+		const ulong e_addr = hdr_addr + entries_offset + i * entry_size;
+		const struct dt_table_entry *e;
+		const struct fdt_header *fdt;
+		u32 dt_offset, dt_size;
+		u32 j;
+
+		e = map_sysmem(e_addr, sizeof(*e));
+		dt_offset = fdt32_to_cpu(e->dt_offset);
+		dt_size = fdt32_to_cpu(e->dt_size);
+
+		printf("dt_table_entry[%d]:\n", i);
+		printf("             dt_size = %d\n", dt_size);
+		printf("           dt_offset = %d\n", dt_offset);
+		printf("                  id = %08x\n", fdt32_to_cpu(e->id));
+		printf("                 rev = %08x\n", fdt32_to_cpu(e->rev));
+		for (j = 0; j < 4; ++j) {
+			printf("           custom[%d] = %08x\n", j,
+			       fdt32_to_cpu(e->custom[j]));
+		}
+
+		unmap_sysmem(e);
+
+		/* Print FDT info for this entry */
+		fdt = map_sysmem(hdr_addr + dt_offset, sizeof(*fdt));
+		android_dt_print_fdt_info(fdt);
+		unmap_sysmem(fdt);
+	}
+}
+#endif
diff --git a/include/image-android-dt.h b/include/image-android-dt.h
new file mode 100644
index 0000000000..08b810d461
--- /dev/null
+++ b/include/image-android-dt.h
@@ -0,0 +1,21 @@
+/*
+ * (C) Copyright 2018 Linaro Ltd.
+ * Sam Protsenko <semen.protsenko@linaro.org>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef IMAGE_ANDROID_DT_H
+#define IMAGE_ANDROID_DT_H
+
+#include <linux/types.h>
+
+bool android_dt_check_header(ulong hdr_addr);
+bool android_dt_get_fdt_by_index(ulong hdr_addr, u32 index, ulong *addr,
+				 u32 *size);
+
+#if !defined(CONFIG_SPL_BUILD)
+void android_dt_print_contents(ulong hdr_addr);
+#endif
+
+#endif /* IMAGE_ANDROID_DT_H */

commit 7ec0ac2b36e8be69bf24bbcab547b519093ace05
Author: Alex Deymo <deymo@google.com>
Date:   Mon May 28 17:19:35 2018 +0200

    UPSTREAM: Import Android's dt_table.h for DT image format
    
    Android documentation defines the recommended image format for storing
    DTB/DTBO files in a single dtbo.img image. This patch includes the
    latest header file with the struct definitions for this format from
    AOSP.
    
    The header was adapted to U-Boot's coding style and the function
    declarations were removed.
    
    Change-Id: I4d3a452b600a6908f4b720b6e6c926c918be5630
    Signed-off-by: Alex Deymo <deymo@google.com>
    [trini: Change SDPX tag location]
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
    (cherry picked from commit 643cefa4d848a9358951caab42b5f9cd15e4fb5f)

diff --git a/include/dt_table.h b/include/dt_table.h
new file mode 100644
index 0000000000..7fb16e900c
--- /dev/null
+++ b/include/dt_table.h
@@ -0,0 +1,49 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+/*
+ * This is from the Android Project,
+ * Repository: https://android.googlesource.com/platform/system/libufdt
+ * File: utils/src/dt_table.h
+ * Commit: 2626d8b9e4d8e8c6cc67ceb1dc4e05a47779785c
+ * Copyright (C) 2017 The Android Open Source Project
+ */
+
+#ifndef DT_TABLE_H
+#define DT_TABLE_H
+
+#include <linux/types.h>
+
+#define DT_TABLE_MAGIC			0xd7b7ab1e
+#define DT_TABLE_DEFAULT_PAGE_SIZE	2048
+#define DT_TABLE_DEFAULT_VERSION	0
+
+struct dt_table_header {
+	u32 magic;		/* DT_TABLE_MAGIC */
+	u32 total_size;		/* includes dt_table_header + all dt_table_entry
+				 * and all dtb/dtbo
+				 */
+	u32 header_size;	/* sizeof(dt_table_header) */
+
+	u32 dt_entry_size;	/* sizeof(dt_table_entry) */
+	u32 dt_entry_count;	/* number of dt_table_entry */
+	u32 dt_entries_offset;	/* offset to the first dt_table_entry
+				 * from head of dt_table_header.
+				 * The value will be equal to header_size if
+				 * no padding is appended
+				 */
+	u32 page_size;		/* flash page size we assume */
+	u32 version;            /* DTBO image version, the current version is 0.
+				 * The version will be incremented when the
+				 * dt_table_header struct is updated.
+				 */
+};
+
+struct dt_table_entry {
+	u32 dt_size;
+	u32 dt_offset;		/* offset from head of dt_table_header */
+
+	u32 id;			/* optional, must be zero if unused */
+	u32 rev;		/* optional, must be zero if unused */
+	u32 custom[4];		/* optional, must be zero if unused */
+};
+
+#endif

commit d101530a8a47a7b6b0c000f115e50e626ee5ab21
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Fri Aug 3 18:39:23 2018 +0800

    rockchip: clk: px30: Add support to set vopl aclk and dclk rate
    
    Change-Id: I31376ebb8d1d40d46ad4e2b6421b65ac7fae096d
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_px30.h b/arch/arm/include/asm/arch-rockchip/cru_px30.h
index 1cadbe4b54..0120227587 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_px30.h
@@ -194,6 +194,19 @@ enum {
 	DCLK_VOPB_DIV_SHIFT	= 0,
 	DCLK_VOPB_DIV_MASK	= 0xff,
 
+	/* CRU_CLK_SEL8_CON */
+	DCLK_VOPL_SEL_SHIFT	= 14,
+	DCLK_VOPL_SEL_MASK	= 0x3 << DCLK_VOPL_SEL_SHIFT,
+	DCLK_VOPL_SEL_DIVOUT	= 0,
+	DCLK_VOPL_SEL_FRACOUT,
+	DCLK_VOPL_SEL_24M,
+	DCLK_VOPL_PLL_SEL_SHIFT	= 11,
+	DCLK_VOPL_PLL_SEL_MASK	= 0x1 << DCLK_VOPL_PLL_SEL_SHIFT,
+	DCLK_VOPL_PLL_SEL_CPLL	= 0,
+	DCLK_VOPL_PLL_SEL_NPLL,
+	DCLK_VOPL_DIV_SHIFT	= 0,
+	DCLK_VOPL_DIV_MASK	= 0xff,
+
 	/* CRU_CLK_SEL14_CON */
 	PERI_PLL_SEL_SHIFT	=15,
 	PERI_PLL_SEL_MASK	= 3 << PERI_PLL_SEL_SHIFT,
diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index cfb000a6f8..2c1e05921b 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -99,6 +99,9 @@ static u32 pll_mode_mask[PLL_COUNT] = {
 
 static struct pll_rate_table auto_table;
 
+static ulong px30_clk_get_pll_rate(struct px30_clk_priv *priv,
+				   enum px30_pll_id pll_id);
+
 static struct pll_rate_table *pll_clk_set_by_auto(u32 drate)
 {
 	struct pll_rate_table *rate = &auto_table;
@@ -627,10 +630,12 @@ static ulong px30_vop_get_clk(struct px30_clk_priv *priv, ulong clk_id)
 static ulong px30_vop_set_clk(struct px30_clk_priv *priv, ulong clk_id, uint hz)
 {
 	struct px30_cru *cru = priv->cru;
+	ulong npll_hz;
 	int src_clk_div;
 
 	switch (clk_id) {
 	case ACLK_VOPB:
+	case ACLK_VOPL:
 		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
 		assert(src_clk_div - 1 <= 31);
 		rk_clrsetreg(&cru->clksel_con[3],
@@ -652,6 +657,26 @@ static ulong px30_vop_set_clk(struct px30_clk_priv *priv, ulong clk_id, uint hz)
 			     DCLK_VOPB_PLL_SEL_CPLL << DCLK_VOPB_PLL_SEL_SHIFT |
 			     (src_clk_div - 1) << DCLK_VOPB_DIV_SHIFT);
 		break;
+	case DCLK_VOPL:
+		npll_hz = px30_clk_get_pll_rate(priv, NPLL);
+		if (npll_hz >= PX30_VOP_PLL_LIMIT && npll_hz >= hz && npll_hz % hz == 0) {
+			src_clk_div = npll_hz / hz;
+			assert(src_clk_div - 1 <= 255);
+		} else {
+			if (hz < PX30_VOP_PLL_LIMIT)
+				src_clk_div = DIV_ROUND_UP(PX30_VOP_PLL_LIMIT, hz);
+			else
+				src_clk_div = 1;
+			assert(src_clk_div - 1 <= 255);
+			rkclk_set_pll(&cru->pll[NPLL], &cru->mode, NPLL, hz * src_clk_div);
+		}
+		rk_clrsetreg(&cru->clksel_con[5],
+			     DCLK_VOPL_SEL_MASK | DCLK_VOPL_PLL_SEL_MASK |
+			     DCLK_VOPL_DIV_MASK,
+			     DCLK_VOPL_SEL_DIVOUT << DCLK_VOPL_SEL_SHIFT |
+			     DCLK_VOPL_PLL_SEL_NPLL << DCLK_VOPL_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << DCLK_VOPL_DIV_SHIFT);
+		break;
 	default:
 		printf("do not support this vop freq\n");
 		return -EINVAL;
@@ -920,7 +945,9 @@ static ulong px30_clk_get_rate(struct clk *clk)
 		rate = px30_spi_get_clk(priv, clk->id);
 		break;
 	case ACLK_VOPB:
+	case ACLK_VOPL:
 	case DCLK_VOPB:
+	case DCLK_VOPL:
 		rate = px30_vop_get_clk(priv, clk->id);
 		break;
 	case ACLK_BUS_PRE:
@@ -983,7 +1010,9 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate)
 		ret = px30_spi_set_clk(priv, clk->id, rate);
 		break;
 	case ACLK_VOPB:
+	case ACLK_VOPL:
 	case DCLK_VOPB:
+	case DCLK_VOPL:
 		ret = px30_vop_set_clk(priv, clk->id, rate);
 		break;
 	case ACLK_BUS_PRE:

commit f909d4a8c942dccbf2cb7d34d2b1d8e4bca0bfa6
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Fri Aug 3 17:43:46 2018 +0800

    rockchip: clk: px30: Add support to limit minimum rate for vop dclk
    
    Change-Id: Ieff359603b1b6dede4377b1a17daf3eb803e2552
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index a4a5d4da25..cfb000a6f8 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -26,6 +26,8 @@ enum {
 	OUTPUT_MIN_HZ	= 24 * 1000000,
 };
 
+#define PX30_VOP_PLL_LIMIT			600000000
+
 #define PX30_PLL_RATE(_rate, _refdiv, _fbdiv, _postdiv1,	\
 			_postdiv2, _dsmpd, _frac)		\
 {								\
@@ -627,29 +629,28 @@ static ulong px30_vop_set_clk(struct px30_clk_priv *priv, ulong clk_id, uint hz)
 	struct px30_cru *cru = priv->cru;
 	int src_clk_div;
 
-	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
-	assert(src_clk_div - 1 <= 31);
-
 	switch (clk_id) {
 	case ACLK_VOPB:
+		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+		assert(src_clk_div - 1 <= 31);
 		rk_clrsetreg(&cru->clksel_con[3],
 			     ACLK_VO_PLL_MASK | ACLK_VO_DIV_MASK,
 			     ACLK_VO_SEL_GPLL << ACLK_VO_PLL_SHIFT |
 			     (src_clk_div - 1) << ACLK_VO_DIV_SHIFT);
 		break;
 	case DCLK_VOPB:
-		/*
-		 * vopb dclk source from cpll, and equals to
-		 * cpll(means div == 1)
-		 */
-		rkclk_set_pll(&cru->pll[CPLL], &cru->mode, CPLL, hz);
-
+		if (hz < PX30_VOP_PLL_LIMIT)
+			src_clk_div = DIV_ROUND_UP(PX30_VOP_PLL_LIMIT, hz);
+		else
+			src_clk_div = 1;
+		assert(src_clk_div - 1 <= 255);
+		rkclk_set_pll(&cru->pll[CPLL], &cru->mode, CPLL, hz * src_clk_div);
 		rk_clrsetreg(&cru->clksel_con[5],
 			     DCLK_VOPB_SEL_MASK | DCLK_VOPB_PLL_SEL_MASK |
 			     DCLK_VOPB_DIV_MASK,
 			     DCLK_VOPB_SEL_DIVOUT << DCLK_VOPB_SEL_SHIFT |
 			     DCLK_VOPB_PLL_SEL_CPLL << DCLK_VOPB_PLL_SEL_SHIFT |
-			     (1 - 1) << DCLK_VOPB_DIV_SHIFT);
+			     (src_clk_div - 1) << DCLK_VOPB_DIV_SHIFT);
 		break;
 	default:
 		printf("do not support this vop freq\n");

commit bf97d0d67a4cbb963e8ed23bc26c3296a9c0ae4c
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Wed Aug 1 15:11:58 2018 +0800

    rockchip: clk: px30: Avoid setting gpll rate repeatedly
    
    Change-Id: I24a062bf17f2552b94c9421b52ee930890fefcb6
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index e49abeeee4..a4a5d4da25 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -1271,6 +1271,10 @@ static ulong px30_gpll_set_pmuclk(struct px30_pmuclk_priv *priv, ulong hz)
 		return ret;
 	}
 	cru_priv = dev_get_priv(cru_dev);
+
+	if (priv->gpll_hz == hz)
+		return priv->gpll_hz;
+
 	cru_priv->gpll_hz = priv->gpll_hz;
 	div = DIV_ROUND_UP(hz, priv->gpll_hz);
 

commit eb46e717871223129ed3a414912fa148c8c898db
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Wed Aug 1 11:48:51 2018 +0800

    rockchip: clk: px30: restore bus and peri rate when change gpll rate
    
    Change-Id: I208196e11e7c4fa5db26a02abdd41ecfa610d5bd
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 07c14e13de..e49abeeee4 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -1093,6 +1093,7 @@ int rockchip_mmc_set_phase(struct clk *clk, u32 degrees)
 static int px30_clk_get_phase(struct clk *clk)
 {
 	int ret;
+
 	debug("%s %ld\n", __func__, clk->id);
 	switch (clk->id) {
 	case SCLK_EMMC_SAMPLE:
@@ -1258,10 +1259,10 @@ static ulong px30_gpll_set_pmuclk(struct px30_pmuclk_priv *priv, ulong hz)
 	struct px30_pmucru *pmucru = priv->pmucru;
 	u32 div;
 	ulong emmc_rate, sdmmc_rate, nandc_rate;
+	ulong aclk_bus_rate, hclk_bus_rate, pclk_bus_rate;
+	ulong aclk_peri_rate, hclk_peri_rate, pclk_pmu_rate;
 	int ret;
 
-	priv->gpll_hz = px30_gpll_get_pmuclk(priv);
-
 	ret = uclass_get_device_by_name(UCLASS_CLK,
 					"clock-controller@ff2b0000",
 					 &cru_dev);
@@ -1271,44 +1272,50 @@ static ulong px30_gpll_set_pmuclk(struct px30_pmuclk_priv *priv, ulong hz)
 	}
 	cru_priv = dev_get_priv(cru_dev);
 	cru_priv->gpll_hz = priv->gpll_hz;
-
 	div = DIV_ROUND_UP(hz, priv->gpll_hz);
 
-	/*
-	 * avoid bus and peri clock rate too large, reduce rate first.
-	 * they will be assigned by clk_set_defaults.
-	 */
-	px30_bus_set_clk(cru_priv, ACLK_BUS_PRE,
-			 px30_bus_get_clk(cru_priv, ACLK_BUS_PRE) / div);
-	px30_bus_set_clk(cru_priv, HCLK_BUS_PRE,
-			 px30_bus_get_clk(cru_priv, HCLK_BUS_PRE) / div);
-	px30_bus_set_clk(cru_priv, PCLK_BUS_PRE,
-			 px30_bus_get_clk(cru_priv, PCLK_BUS_PRE) / div);
-	px30_peri_set_clk(cru_priv, ACLK_PERI_PRE,
-			  px30_bus_get_clk(cru_priv, ACLK_PERI_PRE) / div);
-	px30_peri_set_clk(cru_priv, HCLK_PERI_PRE,
-			  px30_bus_get_clk(cru_priv, HCLK_PERI_PRE) / div);
-	px30_pclk_pmu_set_pmuclk(priv, px30_pclk_pmu_get_pmuclk(priv) / div);
-
-	/*
-	 * save emmc, sdmmc and nandc clock rate,
-	 * nandc clock rate should less than or equal to 150Mhz.
-	 */
+	/* save clock rate */
+	aclk_bus_rate = px30_bus_get_clk(cru_priv, ACLK_BUS_PRE);
+	hclk_bus_rate = px30_bus_get_clk(cru_priv, HCLK_BUS_PRE);
+	pclk_bus_rate = px30_bus_get_clk(cru_priv, PCLK_BUS_PRE);
+	aclk_peri_rate = px30_peri_get_clk(cru_priv, ACLK_PERI_PRE);
+	hclk_peri_rate = px30_peri_get_clk(cru_priv, HCLK_PERI_PRE);
+	pclk_pmu_rate = px30_pclk_pmu_get_pmuclk(priv);
+	debug("%s aclk_bus=%lu, hclk_bus=%lu, pclk_bus=%lu\n", __func__,
+	      aclk_bus_rate, hclk_bus_rate, pclk_bus_rate);
+	debug("%s aclk_peri=%lu, hclk_peri=%lu, pclk_pmu=%lu\n", __func__,
+	      aclk_peri_rate, hclk_peri_rate, pclk_pmu_rate);
 	emmc_rate = px30_mmc_get_clk(cru_priv, SCLK_EMMC);
 	sdmmc_rate = px30_mmc_get_clk(cru_priv, SCLK_SDMMC);
 	nandc_rate = px30_nandc_get_clk(cru_priv);
-	debug("%s emmc=%lu, sdmmc=%lu, nandc=%lu\n", __func__, emmc_rate,
-	      sdmmc_rate, nandc_rate);
+	debug("%s emmc=%lu, sdmmc=%lu, nandc=%lu\n", __func__,
+	      emmc_rate, sdmmc_rate, nandc_rate);
+
 	/* avoid rate too large, reduce rate first */
+	px30_bus_set_clk(cru_priv, ACLK_BUS_PRE, aclk_bus_rate / div);
+	px30_bus_set_clk(cru_priv, HCLK_BUS_PRE, hclk_bus_rate / div);
+	px30_bus_set_clk(cru_priv, PCLK_BUS_PRE, pclk_bus_rate / div);
+	px30_peri_set_clk(cru_priv, ACLK_PERI_PRE, aclk_peri_rate / div);
+	px30_peri_set_clk(cru_priv, HCLK_PERI_PRE, hclk_peri_rate / div);
+	px30_pclk_pmu_set_pmuclk(priv, pclk_pmu_rate / div);
+
 	px30_mmc_set_clk(cru_priv, SCLK_EMMC, emmc_rate / div);
 	px30_mmc_set_clk(cru_priv, SCLK_SDMMC, sdmmc_rate / div);
 	px30_nandc_set_clk(cru_priv, nandc_rate / div);
 
+	/* change gpll rate */
 	rkclk_set_pll(&pmucru->pll, &pmucru->pmu_mode, GPLL, hz);
 	priv->gpll_hz = px30_gpll_get_pmuclk(priv);
 	cru_priv->gpll_hz = priv->gpll_hz;
 
-	/* restore emmc, sdmmc and nandc clock rate */
+	/* restore clock rate */
+	px30_bus_set_clk(cru_priv, ACLK_BUS_PRE, aclk_bus_rate);
+	px30_bus_set_clk(cru_priv, HCLK_BUS_PRE, hclk_bus_rate);
+	px30_bus_set_clk(cru_priv, PCLK_BUS_PRE, pclk_bus_rate);
+	px30_peri_set_clk(cru_priv, ACLK_PERI_PRE, aclk_peri_rate);
+	px30_peri_set_clk(cru_priv, HCLK_PERI_PRE, hclk_peri_rate);
+	px30_pclk_pmu_set_pmuclk(priv, pclk_pmu_rate);
+
 	px30_mmc_set_clk(cru_priv, SCLK_EMMC, emmc_rate);
 	px30_mmc_set_clk(cru_priv, SCLK_SDMMC, sdmmc_rate);
 	px30_nandc_set_clk(cru_priv, nandc_rate);

commit a221d6e67e054c65d2bfc136c9930bcbd9135ef9
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Wed Aug 1 11:43:54 2018 +0800

    rockchip: clk: px30: Add support to set npll rate
    
    Change-Id: Ida62e70610bd28d4c7d327e0431f09b0e4de6b2e
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index f40756a753..07c14e13de 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -814,6 +814,16 @@ static ulong px30_clk_get_pll_rate(struct px30_clk_priv *priv,
 	return rkclk_pll_get_rate(&cru->pll[pll_id], &cru->mode, pll_id);
 }
 
+static ulong px30_clk_set_pll_rate(struct px30_clk_priv *priv,
+				   enum px30_pll_id pll_id, ulong hz)
+{
+	struct px30_cru *cru = priv->cru;
+
+	if (rkclk_set_pll(&cru->pll[pll_id], &cru->mode, pll_id, hz))
+		return -EINVAL;
+	return rkclk_pll_get_rate(&cru->pll[pll_id], &cru->mode, pll_id);
+}
+
 static ulong px30_armclk_set_clk(struct px30_clk_priv *priv, ulong hz)
 {
 	struct px30_cru *cru = priv->cru;
@@ -940,6 +950,9 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate)
 
 	debug("%s %ld %ld\n", __func__, clk->id, rate);
 	switch (clk->id) {
+	case PLL_NPLL:
+		ret = px30_clk_set_pll_rate(priv, NPLL, rate);
+		break;
 	case ARMCLK:
 		if (priv->armclk_hz)
 			px30_armclk_set_clk(priv, rate);

commit c4d4e4dc26d16a5754169ba8a630b5ff337179ed
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Wed Aug 1 11:18:11 2018 +0800

    rockchip: clk: px30: Add clk_set_defaults()
    
    As clk_set_defaults() is removed in device core, so add it in clock
    driver.
    
    Change-Id: Ib5b9a7f81c738c65f2cb3e0ca74a410cda2ca1e2
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index a7e52b449b..f40756a753 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -791,7 +791,6 @@ static int px30_clk_get_gpll_rate(ulong *rate)
 {
 	struct udevice *pmucru_dev;
 	struct px30_pmuclk_priv *priv;
-	struct px30_pmucru *pmucru;
 	int ret;
 
 	ret = uclass_get_device_by_driver(UCLASS_CLK,
@@ -802,8 +801,7 @@ static int px30_clk_get_gpll_rate(ulong *rate)
 		return ret;
 	}
 	priv = dev_get_priv(pmucru_dev);
-	pmucru = priv->pmucru;
-	*rate =  rkclk_pll_get_rate(&pmucru->pll, &pmucru->pmu_mode, GPLL);
+	*rate =  priv->gpll_hz;
 
 	return 0;
 }
@@ -863,15 +861,10 @@ static ulong px30_clk_get_rate(struct clk *clk)
 {
 	struct px30_clk_priv *priv = dev_get_priv(clk->dev);
 	ulong rate = 0;
-	int ret;
 
-	if (!priv->gpll_hz) {
-		ret = px30_clk_get_gpll_rate(&priv->gpll_hz);
-		if (ret) {
-			printf("%s failed to get gpll rate\n", __func__);
-			return ret;
-		}
-		debug("%s gpll=%lu\n", __func__, priv->gpll_hz);
+	if (!priv->gpll_hz && clk->id > ARMCLK) {
+		printf("%s gpll=%lu\n", __func__, priv->gpll_hz);
+		return -ENOENT;
 	}
 
 	debug("%s %ld\n", __func__, clk->id);
@@ -940,13 +933,9 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate)
 	struct px30_clk_priv *priv = dev_get_priv(clk->dev);
 	ulong ret = 0;
 
-	if (!priv->gpll_hz) {
-		ret = px30_clk_get_gpll_rate(&priv->gpll_hz);
-		if (ret) {
-			printf("%s failed to get gpll rate\n", __func__);
-			return ret;
-		}
-		debug("%s gpll=%lu\n", __func__, priv->gpll_hz);
+	if (!priv->gpll_hz && clk->id > ARMCLK) {
+		printf("%s gpll=%lu\n", __func__, priv->gpll_hz);
+		return -ENOENT;
 	}
 
 	debug("%s %ld %ld\n", __func__, clk->id, rate);
@@ -1131,12 +1120,26 @@ static struct clk_ops px30_clk_ops = {
 static int px30_clk_probe(struct udevice *dev)
 {
 	struct px30_clk_priv *priv = dev_get_priv(dev);
+	int ret;
 
-	if (px30_clk_get_pll_rate(priv, APLL) == APLL_HZ)
-		return 0;
+	if (px30_clk_get_pll_rate(priv, APLL) != APLL_HZ) {
+		ret = px30_armclk_set_clk(priv, APLL_HZ);
+		if (ret < 0)
+			printf("%s failed to set armclk rate\n", __func__);
+	}
 
-	if (px30_armclk_set_clk(priv, APLL_HZ))
-		return -EINVAL;
+	/* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
+	ret = clk_set_defaults(dev);
+	if (ret)
+		debug("%s clk_set_defaults failed %d\n", __func__, ret);
+
+	if (!priv->gpll_hz) {
+		ret = px30_clk_get_gpll_rate(&priv->gpll_hz);
+		if (ret) {
+			printf("%s failed to get gpll rate\n", __func__);
+			return ret;
+		}
+	}
 
 	return 0;
 }
@@ -1347,6 +1350,16 @@ static struct clk_ops px30_pmuclk_ops = {
 
 static int px30_pmuclk_probe(struct udevice *dev)
 {
+	struct px30_pmuclk_priv *priv = dev_get_priv(dev);
+	int ret;
+
+	priv->gpll_hz = px30_gpll_get_pmuclk(priv);
+
+	/* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
+	ret = clk_set_defaults(dev);
+	if (ret)
+		debug("%s clk_set_defaults failed %d\n", __func__, ret);
+
 	return 0;
 }
 

commit 56dd66cf7956d3334c2a080c901780b34c3ceded
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Mon Jul 30 20:17:28 2018 +0800

    rockchip: clk: px30: Modify the print format of clk
    
    The new print format can reduce startup time.
    
    Change-Id: I7ea53e07b8245fe4b5ef1fa15dd1f6efb176db47
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 087664a419..a7e52b449b 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -1405,7 +1405,7 @@ int soc_clk_dump(void)
 		return ret;
 	}
 
-	printf("CLK:");
+	printf("CLK:\n");
 	for (i = 0; i < clk_count; i++) {
 		clk_dump = &clks_dump[i];
 		if (clk_dump->name) {
@@ -1421,18 +1421,18 @@ int soc_clk_dump(void)
 			clk_free(&clk);
 			if (i == 0) {
 				if (rate < 0)
-					printf("%10s%20s\n", clk_dump->name,
+					printf("%s %s\n", clk_dump->name,
 					       "unknown");
 				else
-					printf("%10s%20lu Hz\n", clk_dump->name,
-					       rate);
+					printf("%s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
 			} else {
 				if (rate < 0)
-					printf("%14s%20s\n", clk_dump->name,
+					printf("%s %s\n", clk_dump->name,
 					       "unknown");
 				else
-					printf("%14s%20lu Hz\n", clk_dump->name,
-					       rate);
+					printf("%s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
 			}
 		}
 	}

commit e83e4aa5e71c510b3fd4f3de8efc844ae2e44dd1
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Fri Aug 3 11:01:10 2018 +0800

    drivers: rkflash: add 25Q64JVSSIQ and 25Q64FWSSIG nor devices
    
    Change-Id: I642a3db7a69e3b44c72ee965f1595078837bfa8e
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/sfc_nor.c b/drivers/rkflash/sfc_nor.c
index 4d074d5789..c3872e6bf8 100644
--- a/drivers/rkflash/sfc_nor.c
+++ b/drivers/rkflash/sfc_nor.c
@@ -23,10 +23,14 @@ static struct flash_info spi_flash_tbl[] = {
 	{0xc84019, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x1C, 16, 6, 0},
 	/* GD25Q512MC */
 	{0xc84020, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x1C, 17, 6, 0},
+	/* 25Q64JVSSIQ */
+	{0xef4017, 128, 8, 0x13, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0},
 	/* 25Q128FV */
 	{0xef4018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 9, 0},
 	/* 25Q256FV */
 	{0xef4019, 128, 8, 0x13, 0x02, 0x6C, 0x32, 0x20, 0xD8, 0x3C, 16, 9, 0},
+	/* 25Q64FWSSIG */
+	{0xef6017, 128, 8, 0x13, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0},
 	/* XT25F128A */
 	{0x207018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x00, 15, 0, 0},
 	/* MX25L25635E/F */

commit 18f2475d9f01caf2576d203396d154247d3e6dcd
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Aug 1 10:36:25 2018 +0800

    rockchip: px30: scan sub-nodes of the syscon node
    
    Change-Id: Iab8f77f9bc52e9268df2f0c4accb5b0903e92af1
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/px30/syscon_px30.c b/arch/arm/mach-rockchip/px30/syscon_px30.c
index 47a5b3ded3..680d681fec 100644
--- a/arch/arm/mach-rockchip/px30/syscon_px30.c
+++ b/arch/arm/mach-rockchip/px30/syscon_px30.c
@@ -20,4 +20,7 @@ U_BOOT_DRIVER(syscon_px30) = {
 	.name = "px30_syscon",
 	.id = UCLASS_SYSCON,
 	.of_match = px30_syscon_ids,
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	.bind = dm_scan_fdt_dev,
+#endif
 };

commit e869504af3cb1e0f8d8dab351c956f7b597a09b2
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Fri Jul 13 11:18:46 2018 +0800

    rockchip: dts: rk3288-fennec: add edp display support
    
    Change-Id: Icda290e83f8356f3bc80ee1ffc5bd8faab4e7dea
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3288-fennec.dtsi b/arch/arm/dts/rk3288-fennec.dtsi
index 9c9ac163d6..3e52a5483c 100644
--- a/arch/arm/dts/rk3288-fennec.dtsi
+++ b/arch/arm/dts/rk3288-fennec.dtsi
@@ -74,12 +74,89 @@
 		regulator-always-on;
 		regulator-boot-on;
 	};
+
+	backlight: backlight {
+		compatible = "pwm-backlight";
+		power-supply = <&vcc_sys>;
+		enable-gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
+		brightness-levels = <
+			  0   1   2   3   4   5   6   7
+			  8   9  10  11  12  13  14  15
+			 16  17  18  19  20  21  22  23
+			 24  25  26  27  28  29  30  31
+			 32  33  34  35  36  37  38  39
+			 40  41  42  43  44  45  46  47
+			 48  49  50  51  52  53  54  55
+			 56  57  58  59  60  61  62  63
+			 64  65  66  67  68  69  70  71
+			 72  73  74  75  76  77  78  79
+			 80  81  82  83  84  85  86  87
+			 88  89  90  91  92  93  94  95
+			 96  97  98  99 100 101 102 103
+			104 105 106 107 108 109 110 111
+			112 113 114 115 116 117 118 119
+			120 121 122 123 124 125 126 127
+			128 129 130 131 132 133 134 135
+			136 137 138 139 140 141 142 143
+			144 145 146 147 148 149 150 151
+			152 153 154 155 156 157 158 159
+			160 161 162 163 164 165 166 167
+			168 169 170 171 172 173 174 175
+			176 177 178 179 180 181 182 183
+			184 185 186 187 188 189 190 191
+			192 193 194 195 196 197 198 199
+			200 201 202 203 204 205 206 207
+			208 209 210 211 212 213 214 215
+			216 217 218 219 220 221 222 223
+			224 225 226 227 228 229 230 231
+			232 233 234 235 236 237 238 239
+			240 241 242 243 244 245 246 247
+			248 249 250 251 252 253 254 255>;
+		default-brightness-level = <50>;
+		pwms = <&pwm0 0 25000 0>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwm0_pin>;
+		pwm-delay-us = <10000>;
+		status = "okay";
+	};
+
+	edp_panel: edp-panel {
+		compatible ="lg,lp079qx1-sp0v", "simple-panel";
+		backlight = <&backlight>;
+		power-supply = <&vcc_io>;
+		enable-gpios = <&gpio7 4 GPIO_ACTIVE_HIGH>;
+		prepare-delay-ms = <20>;
+		enable-delay-ms = <20>;
+
+		ports {
+			panel_in: endpoint {
+				remote-endpoint = <&edp_out>;
+			};
+		};
+	};
 };
 
 &cpu0 {
 	cpu0-supply = <&vdd_cpu>;
 };
 
+&display_subsystem {
+	status = "okay";
+};
+
+&edp {
+	status = "okay";
+
+	ports {
+		port@1 {
+			reg = <1>;
+			edp_out: endpoint {
+				remote-endpoint = <&panel_in>;
+			};
+		};
+	};
+};
+
 &emmc {
 	bus-width = <8>;
 	cap-mmc-highspeed;
@@ -91,6 +168,14 @@
 	status = "okay";
 };
 
+&pwm0 {
+	status = "okay";
+};
+
+&route_edp {
+	status = "okay";
+};
+
 &saradc {
 	vref-supply = <&vcc_18>;
 	status = "okay";
@@ -418,22 +503,10 @@
 	status = "okay";
 };
 
-&vopb {
-	status = "okay";
-};
-
-&vopb_mmu {
-	status = "okay";
-};
-
 &vopl {
 	status = "okay";
 };
 
-&vopl_mmu {
-	status = "okay";
-};
-
 &vpu {
 	status = "okay";
 };

commit a60b58c4d9445f9f08bb77b3bca617d7b3833a69
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Aug 1 09:31:54 2018 +0800

    video/drm: lvds: Reverse sample clock direction on px30
    
    Fix display corruption when vdd_log equals 0.95v.
    
    Change-Id: I808a40ec7fdc2866f6b34a97ad77a7b1f9c01fd4
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index 4d221bdf5f..e02f8d3813 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -316,6 +316,9 @@ static void px30_output_lvds(struct display_state *state)
 
 	lvds_writel(lvds, MIPIPHY_REGE8, 0xfc);
 
+	lvds_msk_reg(lvds, MIPIPHY_REG8,
+		     m_SAMPLE_CLK_DIR, v_SAMPLE_CLK_DIR_REVERSE);
+
 	/* set lvds mode and reset phy config */
 	lvds_msk_reg(lvds, MIPIPHY_REGE0,
 		     m_MSB_SEL | m_DIG_INTER_RST,
diff --git a/drivers/video/drm/rockchip_lvds.h b/drivers/video/drm/rockchip_lvds.h
index a77db720e7..813b8288da 100644
--- a/drivers/video/drm/rockchip_lvds.h
+++ b/drivers/video/drm/rockchip_lvds.h
@@ -187,6 +187,10 @@ enum {
 #define MIPIPHY_REG4		0x0010
 #define v_FBDIV_LSB(x)          BITS_MASK(x, 0xff, 0)
 
+#define MIPIPHY_REG8			0x0020
+#define m_SAMPLE_CLK_DIR		BIT(4)
+#define v_SAMPLE_CLK_DIR_REVERSE	BIT(4)
+
 #define MIPIPHY_REGE0		0x0380
 #define m_MSB_SEL               BITS(1, 0)
 #define m_DIG_INTER_RST         BITS(1, 2)

commit 09e1ca434067bdf1e23f6313b8d4d23dce86d151
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Aug 2 11:52:47 2018 +0800

    clk: rockchip: rk3399: fix up the pll setting
    
    If the gpll and npll freq is no change,don't set pll once again.
    
    Change-Id: Ib16a0a1ff56560997b6ed4b487fc2d56928c14ec
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 3ab48a0f17..f7b1760054 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -1158,6 +1158,12 @@ static void rkclk_init(struct rk3399_cru *cru)
 	 * reset/default values described in TRM to avoid confusion in kernel.
 	 * Please consider these three lines as a fix of bootrom bug.
 	 */
+	if (rkclk_pll_get_rate(&cru->npll_con[0]) != NPLL_HZ)
+		rkclk_set_pll(&cru->npll_con[0], &npll_init_cfg);
+
+	if (rkclk_pll_get_rate(&cru->gpll_con[0]) == GPLL_HZ)
+		return;
+
 	rk_clrsetreg(&cru->clksel_con[12], 0xffff, 0x4101);
 	rk_clrsetreg(&cru->clksel_con[19], 0xffff, 0x033f);
 	rk_clrsetreg(&cru->clksel_con[56], 0x0003, 0x0003);
@@ -1218,8 +1224,13 @@ static void rkclk_init(struct rk3399_cru *cru)
 		     hclk_div << HCLK_PERILP1_DIV_CON_SHIFT |
 		     HCLK_PERILP1_PLL_SEL_GPLL << HCLK_PERILP1_PLL_SEL_SHIFT);
 
+	rk_clrsetreg(&cru->clksel_con[21],
+		     ACLK_EMMC_PLL_SEL_MASK | ACLK_EMMC_DIV_CON_MASK,
+		     ACLK_EMMC_PLL_SEL_GPLL << ACLK_EMMC_PLL_SEL_SHIFT |
+		     (4 - 1) << ACLK_EMMC_DIV_CON_SHIFT);
+	rk_clrsetreg(&cru->clksel_con[22], 0x3f << 0, 7 << 0);
+
 	rkclk_set_pll(&cru->gpll_con[0], &gpll_init_cfg);
-	rkclk_set_pll(&cru->npll_con[0], &npll_init_cfg);
 }
 
 static int rk3399_clk_probe(struct udevice *dev)

commit efb944b698be1d109a471428576a7f8e83e59d3d
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Jul 26 15:58:27 2018 +0800

    rockchip: clk: rk3128: support more clks to set and get rate
    
    Make clock ids consistent with kernel.
    support more clks to set and get rate.
    add clk init.
    
    Change-Id: I1e6b5734887e0bd5d845f1286f10eb0e3e42bc08
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/dts/rk3128.dtsi b/arch/arm/dts/rk3128.dtsi
index a10937e044..e0b43c1b03 100644
--- a/arch/arm/dts/rk3128.dtsi
+++ b/arch/arm/dts/rk3128.dtsi
@@ -174,7 +174,7 @@
                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
                                      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
                         #dma-cells = <1>;
-                        clocks = <&cru ACLK_DMAC2>;
+			clocks = <&cru ACLK_DMAC>;
                         clock-names = "apb_pclk";
                 };
 	};
@@ -367,7 +367,7 @@
 		reg = <0x1010e000 0x100>, <0x1010ec00 0x400>;
 		reg-names = "regs", "gamma_lut";
 		interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru ACLK_VIO0>, <&cru DCLK_LCDC>, <&cru HCLK_LCDC>;
+		clocks = <&cru ACLK_LCDC0>, <&cru DCLK_VOP>, <&cru HCLK_LCDC0>;
 		clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
 		status = "disabled";
 
diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3128.h b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
index 9bd6409a1e..b0d85824ef 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
@@ -14,22 +14,13 @@
 
 #define APLL_HZ		(600 * MHz)
 #define GPLL_HZ		(594 * MHz)
-
-#define CORE_PERI_HZ	150000000
-#define CORE_ACLK_HZ	300000000
-
-#define BUS_ACLK_HZ	148500000
-#define BUS_HCLK_HZ	148500000
-#define BUS_PCLK_HZ	74250000
-
-#define PERI_ACLK_HZ	148500000
-#define PERI_HCLK_HZ	148500000
-#define PERI_PCLK_HZ	74250000
+#define ACLK_BUS_HZ	(148500000)
+#define ACLK_PERI_HZ	(148500000)
 
 /* Private data for the clock driver - used by rockchip_get_cru() */
 struct rk3128_clk_priv {
 	struct rk3128_cru *cru;
-	ulong rate;
+	ulong gpll_hz;
 };
 
 struct rk3128_cru {
@@ -62,62 +53,33 @@ struct rk3128_cru {
 };
 check_member(rk3128_cru, cru_pll_prg_en, 0x01f0);
 
-struct pll_div {
-	u32 refdiv;
-	u32 fbdiv;
-	u32 postdiv1;
-	u32 postdiv2;
-	u32 frac;
+enum rk3128_pll_id {
+	APLL,
+	DPLL,
+	CPLL,
+	GPLL,
+	PLL_COUNT,
 };
 
-enum {
-	/* PLLCON0*/
-	PLL_POSTDIV1_SHIFT	= 12,
-	PLL_POSTDIV1_MASK	= 7 << PLL_POSTDIV1_SHIFT,
-	PLL_FBDIV_SHIFT		= 0,
-	PLL_FBDIV_MASK		= 0xfff,
-
-	/* PLLCON1 */
-	PLL_RST_SHIFT		= 14,
-	PLL_PD_SHIFT		= 13,
-	PLL_PD_MASK		= 1 << PLL_PD_SHIFT,
-	PLL_DSMPD_SHIFT		= 12,
-	PLL_DSMPD_MASK		= 1 << PLL_DSMPD_SHIFT,
-	PLL_LOCK_STATUS_SHIFT	= 10,
-	PLL_LOCK_STATUS_MASK	= 1 << PLL_LOCK_STATUS_SHIFT,
-	PLL_POSTDIV2_SHIFT	= 6,
-	PLL_POSTDIV2_MASK	= 7 << PLL_POSTDIV2_SHIFT,
-	PLL_REFDIV_SHIFT	= 0,
-	PLL_REFDIV_MASK		= 0x3f,
-
-	/* CRU_MODE */
-	GPLL_MODE_SHIFT		= 12,
-	GPLL_MODE_MASK		= 3 << GPLL_MODE_SHIFT,
-	GPLL_MODE_SLOW		= 0,
-	GPLL_MODE_NORM,
-	GPLL_MODE_DEEP,
-	CPLL_MODE_SHIFT		= 8,
-	CPLL_MODE_MASK		= 1 << CPLL_MODE_SHIFT,
-	CPLL_MODE_SLOW		= 0,
-	CPLL_MODE_NORM,
-	DPLL_MODE_SHIFT		= 4,
-	DPLL_MODE_MASK		= 1 << DPLL_MODE_SHIFT,
-	DPLL_MODE_SLOW		= 0,
-	DPLL_MODE_NORM,
-	APLL_MODE_SHIFT		= 0,
-	APLL_MODE_MASK		= 1 << APLL_MODE_SHIFT,
-	APLL_MODE_SLOW		= 0,
-	APLL_MODE_NORM,
+struct rk3128_clk_info {
+	unsigned long id;
+	char *name;
+	bool is_cru;
+};
+
+#define RK2928_PLL_CON(x)	((x) * 0x4)
+#define RK2928_MODE_CON		0x40
 
+enum {
 	/* CRU_CLK_SEL0_CON */
-	BUS_ACLK_PLL_SEL_SHIFT	= 14,
-	BUS_ACLK_PLL_SEL_MASK	= 3 << BUS_ACLK_PLL_SEL_SHIFT,
-	BUS_ACLK_PLL_SEL_CPLL	= 0,
-	BUS_ACLK_PLL_SEL_GPLL,
-	BUS_ACLK_PLL_SEL_GPLL_DIV2,
-	BUS_ACLK_PLL_SEL_GPLL_DIV3,
-	BUS_ACLK_DIV_SHIFT	= 8,
-	BUS_ACLK_DIV_MASK	= 0x1f << BUS_ACLK_DIV_SHIFT,
+	BUS_PLL_SEL_SHIFT	= 13,
+	BUS_PLL_SEL_MASK	= 3 << BUS_PLL_SEL_SHIFT,
+	BUS_PLL_SEL_CPLL	= 0,
+	BUS_PLL_SEL_GPLL,
+	BUS_PLL_SEL_GPLL_DIV2,
+	BUS_PLL_SEL_GPLL_DIV3,
+	ACLK_BUS_DIV_SHIFT	= 8,
+	ACLK_BUS_DIV_MASK	= 0x1f << ACLK_BUS_DIV_SHIFT,
 	CORE_CLK_PLL_SEL_SHIFT	= 7,
 	CORE_CLK_PLL_SEL_MASK	= 1 << CORE_CLK_PLL_SEL_SHIFT,
 	CORE_CLK_PLL_SEL_APLL	= 0,
@@ -126,14 +88,14 @@ enum {
 	CORE_DIV_CON_MASK	= 0x1f << CORE_DIV_CON_SHIFT,
 
 	/* CRU_CLK_SEL1_CON */
-	BUS_PCLK_DIV_SHIFT	= 12,
-	BUS_PCLK_DIV_MASK	= 7 << BUS_PCLK_DIV_SHIFT,
-	BUS_HCLK_DIV_SHIFT	= 8,
-	BUS_HCLK_DIV_MASK	= 3 << BUS_HCLK_DIV_SHIFT,
+	PCLK_BUS_DIV_SHIFT	= 12,
+	PCLK_BUS_DIV_MASK	= 7 << PCLK_BUS_DIV_SHIFT,
+	HCLK_BUS_DIV_SHIFT	= 8,
+	HCLK_BUS_DIV_MASK	= 3 << HCLK_BUS_DIV_SHIFT,
 	CORE_ACLK_DIV_SHIFT	= 4,
-	CORE_ACLK_DIV_MASK	= 7 << CORE_ACLK_DIV_SHIFT,
-	CORE_PERI_DIV_SHIFT	= 0,
-	CORE_PERI_DIV_MASK	= 0xf << CORE_PERI_DIV_SHIFT,
+	CORE_ACLK_DIV_MASK	= 0x07 << CORE_ACLK_DIV_SHIFT,
+	CORE_DBG_DIV_SHIFT	= 0,
+	CORE_DBG_DIV_MASK	= 0x0f << CORE_DBG_DIV_SHIFT,
 
 	/* CRU_CLK_SEL2_CON */
 	NANDC_PLL_SEL_SHIFT	= 14,
@@ -147,16 +109,17 @@ enum {
 
 	/* CRU_CLKSEL10_CON */
 	PERI_PLL_SEL_SHIFT	= 14,
-	PERI_PLL_SEL_MASK	= 1 << PERI_PLL_SEL_SHIFT,
-	PERI_PLL_APLL		= 0,
-	PERI_PLL_DPLL,
-	PERI_PLL_GPLL,
-	PERI_PCLK_DIV_SHIFT	= 12,
-	PERI_PCLK_DIV_MASK	= 3 << PERI_PCLK_DIV_SHIFT,
-	PERI_HCLK_DIV_SHIFT	= 8,
-	PERI_HCLK_DIV_MASK	= 3 << PERI_HCLK_DIV_SHIFT,
-	PERI_ACLK_DIV_SHIFT	= 0,
-	PERI_ACLK_DIV_MASK	= 0x1f << PERI_ACLK_DIV_SHIFT,
+	PERI_PLL_SEL_MASK	= 3 << PERI_PLL_SEL_SHIFT,
+	PERI_PLL_SEL_GPLL	= 0,
+	PERI_PLL_SEL_CPLL,
+	PERI_PLL_SEL_GPLL_DIV2,
+	PERI_PLL_SEL_GPLL_DIV3,
+	PCLK_PERI_DIV_SHIFT	= 12,
+	PCLK_PERI_DIV_MASK	= 3 << PCLK_PERI_DIV_SHIFT,
+	HCLK_PERI_DIV_SHIFT	= 8,
+	HCLK_PERI_DIV_MASK	= 3 << HCLK_PERI_DIV_SHIFT,
+	ACLK_PERI_DIV_SHIFT	= 0,
+	ACLK_PERI_DIV_MASK	= 0x1f << ACLK_PERI_DIV_SHIFT,
 
 	/* CRU_CLKSEL11_CON */
 	MMC0_PLL_SHIFT		= 6,
@@ -177,6 +140,14 @@ enum {
 	EMMC_SEL_24M,
 	EMMC_DIV_SHIFT		= 8,
 	EMMC_DIV_MASK		= 0x3f << EMMC_DIV_SHIFT,
+	SDIO_PLL_SHIFT		= 6,
+	SDIO_PLL_MASK		= 3 << SDIO_PLL_SHIFT,
+	SDIO_SEL_APLL		= 0,
+	SDIO_SEL_GPLL,
+	SDIO_SEL_GPLL_DIV2,
+	SDIO_SEL_24M,
+	SDIO_DIV_SHIFT		= 0,
+	SDIO_DIV_MASK		= 0x3f << SDIO_DIV_SHIFT,
 
 	/* CLKSEL_CON24 */
 	SARADC_DIV_CON_SHIFT	= 8,
@@ -184,11 +155,11 @@ enum {
 	SARADC_DIV_CON_WIDTH	= 8,
 
 	/* CRU_CLKSEL27_CON*/
-	DCLK_VOP_SEL_SHIFT         = 0,
-	DCLK_VOP_SEL_MASK          = 1 << DCLK_VOP_SEL_SHIFT,
-	DCLK_VOP_PLL_SEL_CPLL           = 0,
-	DCLK_VOP_DIV_CON_SHIFT          = 8,
-	DCLK_VOP_DIV_CON_MASK           = 0xff << DCLK_VOP_DIV_CON_SHIFT,
+	DCLK_VOP_SEL_SHIFT	= 0,
+	DCLK_VOP_SEL_MASK	= 1 << DCLK_VOP_SEL_SHIFT,
+	DCLK_VOP_PLL_SEL_CPLL	= 0,
+	DCLK_VOP_DIV_CON_SHIFT	= 8,
+	DCLK_VOP_DIV_CON_MASK	= 0xff << DCLK_VOP_DIV_CON_SHIFT,
 
 	/* CRU_CLKSEL31_CON */
 	VIO0_PLL_SHIFT		= 5,
diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c
index 795b46bab5..312f9d26d2 100644
--- a/drivers/clk/rockchip/clk_rk3128.c
+++ b/drivers/clk/rockchip/clk_rk3128.c
@@ -20,268 +20,125 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-enum {
-	VCO_MAX_HZ	= 2400U * 1000000,
-	VCO_MIN_HZ	= 600 * 1000000,
-	OUTPUT_MAX_HZ	= 2400U * 1000000,
-	OUTPUT_MIN_HZ	= 24 * 1000000,
-};
-
 #define DIV_TO_RATE(input_rate, div)	((input_rate) / ((div) + 1))
 
-#define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\
-	.refdiv = _refdiv,\
-	.fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ),\
-	.postdiv1 = _postdiv1, .postdiv2 = _postdiv2};
-
-/* use integer mode*/
-static const struct pll_div apll_init_cfg = PLL_DIVISORS(APLL_HZ, 1, 3, 1);
-static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 2, 1);
-
-static int rkclk_set_pll(struct rk3128_cru *cru, enum rk_clk_id clk_id,
-			 const struct pll_div *div)
-{
-	int pll_id = rk_pll_id(clk_id);
-	struct rk3128_pll *pll = &cru->pll[pll_id];
-
-	/* All PLLs have same VCO and output frequency range restrictions. */
-	uint vco_hz = OSC_HZ / 1000 * div->fbdiv / div->refdiv * 1000;
-	uint output_hz = vco_hz / div->postdiv1 / div->postdiv2;
-
-	debug("PLL at %p:fd=%d,rd=%d,pd1=%d,pd2=%d,vco=%uHz,output=%uHz\n",
-	      pll, div->fbdiv, div->refdiv, div->postdiv1,
-	      div->postdiv2, vco_hz, output_hz);
-	assert(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ &&
-	       output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ);
-
-	/* use integer mode */
-	rk_setreg(&pll->con1, 1 << PLL_DSMPD_SHIFT);
-	/* Power down */
-	rk_setreg(&pll->con1, 1 << PLL_PD_SHIFT);
-
-	rk_clrsetreg(&pll->con0,
-		     PLL_POSTDIV1_MASK | PLL_FBDIV_MASK,
-		     (div->postdiv1 << PLL_POSTDIV1_SHIFT) | div->fbdiv);
-	rk_clrsetreg(&pll->con1, PLL_POSTDIV2_MASK | PLL_REFDIV_MASK,
-		     (div->postdiv2 << PLL_POSTDIV2_SHIFT |
-		     div->refdiv << PLL_REFDIV_SHIFT));
-
-	/* Power Up */
-	rk_clrreg(&pll->con1, 1 << PLL_PD_SHIFT);
-
-	/* waiting for pll lock */
-	while (readl(&pll->con1) & (1 << PLL_LOCK_STATUS_SHIFT))
-		udelay(1);
-
-	return 0;
+#ifndef CONFIG_SPL_BUILD
+#define RK3128_CLK_DUMP(_id, _name, _iscru)	\
+{						\
+	.id = _id,				\
+	.name = _name,				\
+	.is_cru = _iscru,			\
 }
+#endif
+
+static struct rockchip_pll_rate_table rk3128_pll_rates[] = {
+	/* _mhz, _refdiv, _fbdiv, _postdiv1, _postdiv2, _dsmpd, _frac */
+#ifndef CONFIG_SPL_BUILD
+	RK3036_PLL_RATE(1200000000, 1, 50, 1, 1, 1, 0),
+	RK3036_PLL_RATE(1188000000, 1, 99, 2, 1, 1, 0),
+	RK3036_PLL_RATE(1008000000, 1, 84, 2, 1, 1, 0),
+#endif
+	RK3036_PLL_RATE(816000000, 1, 68, 2, 1, 1, 0),
+	RK3036_PLL_RATE(800000000, 1, 200, 6, 1, 1, 0),
+	RK3036_PLL_RATE(600000000, 1, 75, 3, 1, 1, 0),
+	RK3036_PLL_RATE(594000000, 1, 99, 4, 1, 1, 0),
+	RK3036_PLL_RATE(500000000, 1, 125, 6, 1, 1, 0),
+	{ /* sentinel */ },
+};
 
-static int pll_para_config(u32 freq_hz, struct pll_div *div)
-{
-	u32 ref_khz = OSC_HZ / 1000, refdiv, fbdiv = 0;
-	u32 postdiv1, postdiv2 = 1;
-	u32 fref_khz;
-	u32 diff_khz, best_diff_khz;
-	const u32 max_refdiv = 63, max_fbdiv = 3200, min_fbdiv = 16;
-	const u32 max_postdiv1 = 7, max_postdiv2 = 7;
-	u32 vco_khz;
-	u32 freq_khz = freq_hz / 1000;
-
-	if (!freq_hz) {
-		printf("%s: the frequency can't be 0 Hz\n", __func__);
-		return -1;
-	}
-
-	postdiv1 = DIV_ROUND_UP(VCO_MIN_HZ / 1000, freq_khz);
-	if (postdiv1 > max_postdiv1) {
-		postdiv2 = DIV_ROUND_UP(postdiv1, max_postdiv1);
-		postdiv1 = DIV_ROUND_UP(postdiv1, postdiv2);
-	}
-
-	vco_khz = freq_khz * postdiv1 * postdiv2;
-
-	if (vco_khz < (VCO_MIN_HZ / 1000) || vco_khz > (VCO_MAX_HZ / 1000) ||
-	    postdiv2 > max_postdiv2) {
-		printf("%s: Cannot find out a supported VCO for Freq (%uHz)\n",
-		       __func__, freq_hz);
-		return -1;
-	}
-
-	div->postdiv1 = postdiv1;
-	div->postdiv2 = postdiv2;
-
-	best_diff_khz = vco_khz;
-	for (refdiv = 1; refdiv < max_refdiv && best_diff_khz; refdiv++) {
-		fref_khz = ref_khz / refdiv;
-
-		fbdiv = vco_khz / fref_khz;
-		if ((fbdiv >= max_fbdiv) || (fbdiv <= min_fbdiv))
-			continue;
-		diff_khz = vco_khz - fbdiv * fref_khz;
-		if (fbdiv + 1 < max_fbdiv && diff_khz > fref_khz / 2) {
-			fbdiv++;
-			diff_khz = fref_khz - diff_khz;
-		}
-
-		if (diff_khz >= best_diff_khz)
-			continue;
+#define RK3128_CPUCLK_RATE(_rate, _aclk_div, _pclk_div)		\
+{								\
+	.rate	= _rate##U,					\
+	.aclk_div = _aclk_div,					\
+	.pclk_div = _pclk_div,					\
+}
 
-		best_diff_khz = diff_khz;
-		div->refdiv = refdiv;
-		div->fbdiv = fbdiv;
-	}
+static struct rockchip_cpu_rate_table rk3128_cpu_rates[] = {
+	RK3128_CPUCLK_RATE(1200000000, 1, 5),
+	RK3128_CPUCLK_RATE(1008000000, 1, 5),
+	RK3128_CPUCLK_RATE(816000000, 1, 3),
+	RK3128_CPUCLK_RATE(600000000, 1, 3),
+};
 
-	if (best_diff_khz > 4 * (1000)) {
-		printf("%s: Failed to match output frequency %u bestis %u Hz\n",
-		       __func__, freq_hz,
-		       best_diff_khz * 1000);
-		return -1;
-	}
-	return 0;
-}
+#ifndef CONFIG_SPL_BUILD
+static const struct rk3128_clk_info clks_dump[] = {
+	RK3128_CLK_DUMP(PLL_APLL, "apll", true),
+	RK3128_CLK_DUMP(PLL_DPLL, "dpll", true),
+	RK3128_CLK_DUMP(PLL_CPLL, "cpll", true),
+	RK3128_CLK_DUMP(PLL_GPLL, "gpll", true),
+	RK3128_CLK_DUMP(ARMCLK, "armclk", true),
+	RK3128_CLK_DUMP(ACLK_CPU, "aclk_cpu", true),
+	RK3128_CLK_DUMP(HCLK_CPU, "hclk_cpu", true),
+	RK3128_CLK_DUMP(PCLK_CPU, "pclk_cpu", true),
+	RK3128_CLK_DUMP(ACLK_PERI, "aclk_peri", true),
+	RK3128_CLK_DUMP(HCLK_PERI, "hclk_peri", true),
+	RK3128_CLK_DUMP(PCLK_PERI, "pclk_peri", true),
+};
+#endif
+
+static struct rockchip_pll_clock rk3128_pll_clks[] = {
+	[APLL] = PLL(pll_rk3036, PLL_APLL, RK2928_PLL_CON(0),
+		     RK2928_MODE_CON, 0, 10, 0, rk3128_pll_rates),
+	[DPLL] = PLL(pll_rk3036, PLL_DPLL, RK2928_PLL_CON(4),
+		     RK2928_MODE_CON, 4, 10, 0, NULL),
+	[CPLL] = PLL(pll_rk3036, PLL_CPLL, RK2928_PLL_CON(8),
+		    RK2928_MODE_CON, 8, 10, 0, rk3128_pll_rates),
+	[GPLL] = PLL(pll_rk3036, PLL_GPLL, RK2928_PLL_CON(12),
+		     RK2928_MODE_CON, 12, 10, 0, rk3128_pll_rates),
+};
 
-static void rkclk_init(struct rk3128_cru *cru)
+static ulong rk3128_armclk_set_clk(struct rk3128_clk_priv *priv, ulong hz)
 {
-	u32 aclk_div;
-	u32 hclk_div;
-	u32 pclk_div;
-
-	/* pll enter slow-mode */
-	rk_clrsetreg(&cru->cru_mode_con,
-		     GPLL_MODE_MASK | APLL_MODE_MASK,
-		     GPLL_MODE_SLOW << GPLL_MODE_SHIFT |
-		     APLL_MODE_SLOW << APLL_MODE_SHIFT);
+	struct rk3128_cru *cru = priv->cru;
+	const struct rockchip_cpu_rate_table *rate;
+	ulong old_rate;
 
-	/* init pll */
-	rkclk_set_pll(cru, CLK_ARM, &apll_init_cfg);
-	rkclk_set_pll(cru, CLK_GENERAL, &gpll_init_cfg);
+	rate = rockchip_get_cpu_settings(rk3128_cpu_rates, hz);
+	if (!rate) {
+		printf("%s unsupported rate\n", __func__);
+		return -EINVAL;
+	}
 
 	/*
 	 * select apll as cpu/core clock pll source and
 	 * set up dependent divisors for PERI and ACLK clocks.
 	 * core hz : apll = 1:1
 	 */
-	aclk_div = APLL_HZ / CORE_ACLK_HZ - 1;
-	assert((aclk_div + 1) * CORE_ACLK_HZ == APLL_HZ && aclk_div < 0x7);
-
-	pclk_div = APLL_HZ / CORE_PERI_HZ - 1;
-	assert((pclk_div + 1) * CORE_PERI_HZ == APLL_HZ && pclk_div < 0xf);
-
-	rk_clrsetreg(&cru->cru_clksel_con[0],
-		     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK,
-		     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
-		     0 << CORE_DIV_CON_SHIFT);
-
-	rk_clrsetreg(&cru->cru_clksel_con[1],
-		     CORE_ACLK_DIV_MASK | CORE_PERI_DIV_MASK,
-		     aclk_div << CORE_ACLK_DIV_SHIFT |
-		     pclk_div << CORE_PERI_DIV_SHIFT);
-
-	/*
-	 * select gpll as pd_bus bus clock source and
-	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
-	 */
-	aclk_div = GPLL_HZ / BUS_ACLK_HZ - 1;
-	assert((aclk_div + 1) * BUS_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
-
-	pclk_div = BUS_ACLK_HZ / BUS_PCLK_HZ - 1;
-	assert((pclk_div + 1) * BUS_PCLK_HZ == BUS_ACLK_HZ && pclk_div <= 0x7);
-
-	hclk_div = BUS_ACLK_HZ / BUS_HCLK_HZ - 1;
-	assert((hclk_div + 1) * BUS_HCLK_HZ == BUS_ACLK_HZ && hclk_div <= 0x3);
-
-	rk_clrsetreg(&cru->cru_clksel_con[0],
-		     BUS_ACLK_PLL_SEL_MASK | BUS_ACLK_DIV_MASK,
-		     BUS_ACLK_PLL_SEL_GPLL << BUS_ACLK_PLL_SEL_SHIFT |
-		     aclk_div << BUS_ACLK_DIV_SHIFT);
-
-	rk_clrsetreg(&cru->cru_clksel_con[1],
-		     BUS_PCLK_DIV_MASK | BUS_HCLK_DIV_MASK,
-		     pclk_div << BUS_PCLK_DIV_SHIFT |
-		     hclk_div << BUS_HCLK_DIV_SHIFT);
-
-	/*
-	 * select gpll as pd_peri bus clock source and
-	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
-	 */
-	aclk_div = GPLL_HZ / PERI_ACLK_HZ - 1;
-	assert((aclk_div + 1) * PERI_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f);
-
-	hclk_div = ilog2(PERI_ACLK_HZ / PERI_HCLK_HZ);
-	assert((1 << hclk_div) * PERI_HCLK_HZ ==
-		PERI_ACLK_HZ && (hclk_div < 0x4));
-
-	pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ);
-	assert((1 << pclk_div) * PERI_PCLK_HZ ==
-		PERI_ACLK_HZ && pclk_div < 0x8);
-
-	rk_clrsetreg(&cru->cru_clksel_con[10],
-		     PERI_PLL_SEL_MASK | PERI_PCLK_DIV_MASK |
-		     PERI_HCLK_DIV_MASK | PERI_ACLK_DIV_MASK,
-		     PERI_PLL_GPLL << PERI_PLL_SEL_SHIFT |
-		     pclk_div << PERI_PCLK_DIV_SHIFT |
-		     hclk_div << PERI_HCLK_DIV_SHIFT |
-		     aclk_div << PERI_ACLK_DIV_SHIFT);
-
-	/* PLL enter normal-mode */
-	rk_clrsetreg(&cru->cru_mode_con,
-		     GPLL_MODE_MASK | APLL_MODE_MASK | CPLL_MODE_MASK,
-		     GPLL_MODE_NORM << GPLL_MODE_SHIFT |
-		     APLL_MODE_NORM << APLL_MODE_SHIFT |
-		     CPLL_MODE_NORM << CPLL_MODE_SHIFT);
-
-	/*fix NAND controller  working clock max to 150Mhz */
-	rk_clrsetreg(&cru->cru_clksel_con[2],
-		     NANDC_PLL_SEL_MASK | NANDC_CLK_DIV_MASK,
-		     NANDC_PLL_SEL_GPLL << NANDC_PLL_SEL_SHIFT |
-		     3 << NANDC_CLK_DIV_SHIFT);
-}
-
-/* Get pll rate by id */
-static uint32_t rkclk_pll_get_rate(struct rk3128_cru *cru,
-				   enum rk_clk_id clk_id)
-{
-	uint32_t refdiv, fbdiv, postdiv1, postdiv2;
-	uint32_t con;
-	int pll_id = rk_pll_id(clk_id);
-	struct rk3128_pll *pll = &cru->pll[pll_id];
-	static u8 clk_shift[CLK_COUNT] = {
-		0xff, APLL_MODE_SHIFT, DPLL_MODE_SHIFT, CPLL_MODE_SHIFT,
-		GPLL_MODE_SHIFT, 0xff
-	};
-	static u32 clk_mask[CLK_COUNT] = {
-		0xff, APLL_MODE_MASK, DPLL_MODE_MASK, CPLL_MODE_MASK,
-		GPLL_MODE_MASK, 0xff
-	};
-	uint shift;
-	uint mask;
-
-	con = readl(&cru->cru_mode_con);
-	shift = clk_shift[clk_id];
-	mask = clk_mask[clk_id];
-
-	switch ((con & mask) >> shift) {
-	case GPLL_MODE_SLOW:
-		return OSC_HZ;
-	case GPLL_MODE_NORM:
-
-		/* normal mode */
-		con = readl(&pll->con0);
-		postdiv1 = (con & PLL_POSTDIV1_MASK) >> PLL_POSTDIV1_SHIFT;
-		fbdiv = (con & PLL_FBDIV_MASK) >> PLL_FBDIV_SHIFT;
-		con = readl(&pll->con1);
-		postdiv2 = (con & PLL_POSTDIV2_MASK) >> PLL_POSTDIV2_SHIFT;
-		refdiv = (con & PLL_REFDIV_MASK) >> PLL_REFDIV_SHIFT;
-		return (24 * fbdiv / (refdiv * postdiv1 * postdiv2)) * 1000000;
-	case GPLL_MODE_DEEP:
-	default:
-		return 32768;
+	old_rate = rockchip_pll_get_rate(&rk3128_pll_clks[APLL],
+					 priv->cru, APLL);
+	if (old_rate > hz) {
+		if (rockchip_pll_set_rate(&rk3128_pll_clks[APLL],
+					  priv->cru, APLL, hz))
+			return -EINVAL;
+		rk_clrsetreg(&cru->cru_clksel_con[0],
+			     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK,
+			     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
+			     0 << CORE_DIV_CON_SHIFT);
+		rk_clrsetreg(&cru->cru_clksel_con[1],
+			     CORE_ACLK_DIV_MASK | CORE_DBG_DIV_MASK,
+			     rate->aclk_div << CORE_ACLK_DIV_SHIFT |
+			     rate->pclk_div << CORE_DBG_DIV_SHIFT);
+	} else if (old_rate < hz) {
+		rk_clrsetreg(&cru->cru_clksel_con[1],
+			     CORE_ACLK_DIV_MASK | CORE_DBG_DIV_MASK,
+			     rate->aclk_div << CORE_ACLK_DIV_SHIFT |
+			     rate->pclk_div << CORE_DBG_DIV_SHIFT);
+		rk_clrsetreg(&cru->cru_clksel_con[0],
+			     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK,
+			     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
+			     0 << CORE_DIV_CON_SHIFT);
+		if (rockchip_pll_set_rate(&rk3128_pll_clks[APLL],
+					  priv->cru, APLL, hz))
+			return -EINVAL;
 	}
+
+	return rockchip_pll_get_rate(&rk3128_pll_clks[APLL], priv->cru, APLL);
 }
 
-static ulong rockchip_mmc_get_clk(struct rk3128_cru *cru, uint clk_general_rate,
+static ulong rockchip_mmc_get_clk(struct rk3128_clk_priv *priv,
 				  int periph)
 {
+	struct rk3128_cru *cru = priv->cru;
 	uint src_rate;
 	uint div, mux;
 	u32 con;
@@ -296,28 +153,35 @@ static ulong rockchip_mmc_get_clk(struct rk3128_cru *cru, uint clk_general_rate,
 		break;
 	case HCLK_SDMMC:
 	case SCLK_SDMMC:
+	case SCLK_SDMMC_SAMPLE:
 		con = readl(&cru->cru_clksel_con[11]);
 		mux = (con & MMC0_PLL_MASK) >> MMC0_PLL_SHIFT;
 		div = (con & MMC0_DIV_MASK) >> MMC0_DIV_SHIFT;
 		break;
+	case HCLK_SDIO:
+	case SCLK_SDIO:
+	case SCLK_SDIO_SAMPLE:
+		con = readl(&cru->cru_clksel_con[12]);
+		mux = (con & SDIO_PLL_MASK) >> SDIO_PLL_SHIFT;
+		div = (con & SDIO_DIV_MASK) >> SDIO_DIV_SHIFT;
+		break;
 	default:
 		return -EINVAL;
 	}
 
-	src_rate = mux == EMMC_SEL_24M ? OSC_HZ : clk_general_rate;
+	src_rate = mux == EMMC_SEL_24M ? OSC_HZ : priv->gpll_hz;
 	return DIV_TO_RATE(src_rate, div);
 }
 
-static ulong rockchip_mmc_set_clk(struct rk3128_cru *cru, uint clk_general_rate,
+static ulong rockchip_mmc_set_clk(struct rk3128_clk_priv *priv,
 				  int periph, uint freq)
 {
+	struct rk3128_cru *cru = priv->cru;
 	int src_clk_div;
 	int mux;
 
-	debug("%s: clk_general_rate=%u\n", __func__, clk_general_rate);
-
 	/* mmc clock defaulg div 2 internal, need provide double in cru */
-	src_clk_div = DIV_ROUND_UP(clk_general_rate / 2, freq);
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz / 2, freq);
 
 	if (src_clk_div > 128) {
 		src_clk_div = DIV_ROUND_UP(OSC_HZ / 2, freq);
@@ -328,6 +192,7 @@ static ulong rockchip_mmc_set_clk(struct rk3128_cru *cru, uint clk_general_rate,
 
 	switch (periph) {
 	case HCLK_EMMC:
+	case SCLK_EMMC:
 		rk_clrsetreg(&cru->cru_clksel_con[12],
 			     EMMC_PLL_MASK | EMMC_DIV_MASK,
 			     mux << EMMC_PLL_SHIFT |
@@ -340,60 +205,174 @@ static ulong rockchip_mmc_set_clk(struct rk3128_cru *cru, uint clk_general_rate,
 			     mux << MMC0_PLL_SHIFT |
 			     (src_clk_div - 1) << MMC0_DIV_SHIFT);
 		break;
+	case HCLK_SDIO:
+	case SCLK_SDIO:
+		rk_clrsetreg(&cru->cru_clksel_con[12],
+			     SDIO_PLL_MASK | SDIO_DIV_MASK,
+			     mux << SDIO_PLL_SHIFT |
+			     (src_clk_div - 1) << SDIO_DIV_SHIFT);
+		break;
 	default:
 		return -EINVAL;
 	}
 
-	return rockchip_mmc_get_clk(cru, clk_general_rate, periph);
+	return rockchip_mmc_get_clk(priv, periph);
 }
 
-static ulong rk3128_peri_get_pclk(struct rk3128_cru *cru, ulong clk_id)
+static ulong rk3128_peri_get_clk(struct rk3128_clk_priv *priv, ulong clk_id)
 {
-	u32 div, con;
+	struct rk3128_cru *cru = priv->cru;
+	u32 div, con, parent;
 
 	switch (clk_id) {
+	case ACLK_PERI:
+		con = readl(&cru->cru_clksel_con[10]);
+		div = (con & ACLK_PERI_DIV_MASK) >> ACLK_PERI_DIV_SHIFT;
+		parent = priv->gpll_hz;
+		break;
+	case PCLK_PERI:
 	case PCLK_I2C0:
 	case PCLK_I2C1:
 	case PCLK_I2C2:
 	case PCLK_I2C3:
 	case PCLK_PWM:
 		con = readl(&cru->cru_clksel_con[10]);
-		div = con >> 12 & 0x3;
+		div = (con & PCLK_PERI_DIV_MASK) >> PCLK_PERI_DIV_SHIFT;
+		parent = rk3128_peri_get_clk(priv, ACLK_PERI);
+		break;
+	case HCLK_PERI:
+		con = readl(&cru->cru_clksel_con[10]);
+		div = (con & HCLK_PERI_DIV_MASK) >> HCLK_PERI_DIV_SHIFT;
+		parent = rk3128_peri_get_clk(priv, ACLK_PERI);
 		break;
 	default:
 		printf("do not support this peripheral bus\n");
 		return -EINVAL;
 	}
 
-	return DIV_TO_RATE(PERI_ACLK_HZ, div);
+	return DIV_TO_RATE(parent, div);
 }
 
-static ulong rk3128_peri_set_pclk(struct rk3128_cru *cru, ulong clk_id, uint hz)
+static ulong rk3128_peri_set_clk(struct rk3128_clk_priv *priv,
+				 ulong clk_id, uint hz)
 {
+	struct rk3128_cru *cru = priv->cru;
 	int src_clk_div;
 
-	src_clk_div = PERI_ACLK_HZ / hz;
-	assert(src_clk_div - 1 < 4);
-
 	switch (clk_id) {
+	case ACLK_PERI:
+		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+		assert(src_clk_div - 1 < 32);
+		rk_clrsetreg(&cru->cru_clksel_con[10],
+			     PERI_PLL_SEL_MASK | ACLK_PERI_DIV_MASK,
+			     PERI_PLL_SEL_GPLL << PERI_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << ACLK_PERI_DIV_SHIFT);
+		break;
 	case PCLK_I2C0:
 	case PCLK_I2C1:
 	case PCLK_I2C2:
 	case PCLK_I2C3:
 	case PCLK_PWM:
-		rk_setreg(&cru->cru_clksel_con[10],
-			  ((src_clk_div - 1) << 12));
+	case PCLK_PERI:
+		src_clk_div = DIV_ROUND_UP(rk3128_peri_get_clk(priv,
+							       ACLK_PERI),
+					   hz);
+		assert(src_clk_div - 1 < 3);
+		rk_clrsetreg(&cru->cru_clksel_con[10],
+			     PCLK_PERI_DIV_MASK,
+			     (src_clk_div - 1) << PCLK_PERI_DIV_SHIFT);
+		break;
+	case HCLK_PERI:
+		src_clk_div = DIV_ROUND_UP(rk3128_peri_get_clk(priv,
+							       ACLK_PERI),
+					   hz);
+		assert(src_clk_div - 1 < 7);
+		rk_clrsetreg(&cru->cru_clksel_con[10],
+			     HCLK_PERI_DIV_MASK,
+			     (src_clk_div - 1) << HCLK_PERI_DIV_SHIFT);
+		break;
+	default:
+		printf("do not support this peripheral bus\n");
+		return -EINVAL;
+	}
+
+	return rk3128_peri_get_clk(priv, clk_id);
+}
+
+static ulong rk3128_bus_get_clk(struct rk3128_clk_priv *priv, ulong clk_id)
+{
+	struct rk3128_cru *cru = priv->cru;
+	u32 div, con, parent;
+
+	switch (clk_id) {
+	case ACLK_CPU:
+		con = readl(&cru->cru_clksel_con[0]);
+		div = (con & ACLK_BUS_DIV_MASK) >> ACLK_BUS_DIV_SHIFT;
+		parent = priv->gpll_hz;
+		break;
+	case PCLK_CPU:
+		con = readl(&cru->cru_clksel_con[1]);
+		div = (con & PCLK_BUS_DIV_MASK) >> PCLK_BUS_DIV_SHIFT;
+		parent = rk3128_bus_get_clk(priv, ACLK_CPU);
+		break;
+	case HCLK_CPU:
+		con = readl(&cru->cru_clksel_con[1]);
+		div = (con & HCLK_BUS_DIV_MASK) >> HCLK_BUS_DIV_SHIFT;
+		parent = rk3128_bus_get_clk(priv, ACLK_CPU);
 		break;
 	default:
 		printf("do not support this peripheral bus\n");
 		return -EINVAL;
 	}
 
-	return DIV_TO_RATE(PERI_ACLK_HZ, src_clk_div);
+	return DIV_TO_RATE(parent, div);
 }
 
-static ulong rk3128_saradc_get_clk(struct rk3128_cru *cru)
+static ulong rk3128_bus_set_clk(struct rk3128_clk_priv *priv,
+				ulong clk_id, uint hz)
 {
+	struct rk3128_cru *cru = priv->cru;
+	int src_clk_div;
+
+	switch (clk_id) {
+	case ACLK_CPU:
+		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+		assert(src_clk_div - 1 < 32);
+		rk_clrsetreg(&cru->cru_clksel_con[0],
+			     BUS_PLL_SEL_MASK | ACLK_BUS_DIV_MASK,
+			     BUS_PLL_SEL_GPLL << BUS_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << ACLK_BUS_DIV_SHIFT);
+		break;
+	case PCLK_CPU:
+		src_clk_div = DIV_ROUND_UP(rk3128_bus_get_clk(priv,
+							      ACLK_CPU),
+					   hz);
+		assert(src_clk_div - 1 < 3);
+		rk_clrsetreg(&cru->cru_clksel_con[1],
+			     PCLK_BUS_DIV_MASK,
+			     (src_clk_div - 1) << PCLK_BUS_DIV_SHIFT);
+		break;
+	case HCLK_CPU:
+		src_clk_div = DIV_ROUND_UP(rk3128_bus_get_clk(priv,
+							      ACLK_CPU),
+					   hz);
+		assert(src_clk_div - 1 < 7);
+		rk_clrsetreg(&cru->cru_clksel_con[1],
+			     HCLK_BUS_DIV_MASK,
+			     (src_clk_div - 1) << HCLK_BUS_DIV_SHIFT);
+		break;
+	default:
+		printf("do not support this peripheral bus\n");
+		return -EINVAL;
+	}
+
+	return rk3128_bus_get_clk(priv, clk_id);
+}
+
+#ifndef CONFIG_SPL_BUILD
+static ulong rk3128_saradc_get_clk(struct rk3128_clk_priv *priv)
+{
+	struct rk3128_cru *cru = priv->cru;
 	u32 div, val;
 
 	val = readl(&cru->cru_clksel_con[24]);
@@ -403,8 +382,9 @@ static ulong rk3128_saradc_get_clk(struct rk3128_cru *cru)
 	return DIV_TO_RATE(OSC_HZ, div);
 }
 
-static ulong rk3128_saradc_set_clk(struct rk3128_cru *cru, uint hz)
+static ulong rk3128_saradc_set_clk(struct rk3128_clk_priv *priv, uint hz)
 {
+	struct rk3128_cru *cru = priv->cru;
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1;
@@ -414,18 +394,22 @@ static ulong rk3128_saradc_set_clk(struct rk3128_cru *cru, uint hz)
 		     SARADC_DIV_CON_MASK,
 		     src_clk_div << SARADC_DIV_CON_SHIFT);
 
-	return rk3128_saradc_get_clk(cru);
+	return rk3128_saradc_get_clk(priv);
 }
 
-static ulong rk3128_vop_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz)
+#define RK3128_LCDC_PLL_LIMIT			600000000
+
+static ulong rk3128_vop_set_clk(struct rk3128_clk_priv *priv,
+				ulong clk_id, uint hz)
 {
+	struct rk3128_cru *cru = priv->cru;
 	int src_clk_div;
-	struct pll_div cpll_config = {0};
 
 	src_clk_div = GPLL_HZ / hz;
 	assert(src_clk_div - 1 < 31);
 
 	switch (clk_id) {
+	case ACLK_LCDC0:
 	case ACLK_VIO0:
 		rk_clrsetreg(&cru->cru_clksel_con[31],
 			     VIO0_PLL_MASK | VIO0_DIV_MASK,
@@ -438,15 +422,14 @@ static ulong rk3128_vop_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz)
 			     VIO1_SEL_GPLL << VIO1_PLL_SHIFT |
 			     (src_clk_div - 1) << VIO1_DIV_SHIFT);
 		break;
-	case DCLK_LCDC:
-		if (pll_para_config(hz, &cpll_config))
-			return -1;
-		rkclk_set_pll(cru, CLK_CODEC, &cpll_config);
-
+	case DCLK_VOP:
+		src_clk_div = DIV_ROUND_UP(RK3128_LCDC_PLL_LIMIT, hz);
+		rockchip_pll_set_rate(&rk3128_pll_clks[CPLL],
+				      priv->cru, CPLL, src_clk_div * hz);
 		rk_clrsetreg(&cru->cru_clksel_con[27],
-			     DCLK_VOP_SEL_MASK | DCLK_VOP_DIV_CON_MASK,
+			      DCLK_VOP_SEL_MASK | DCLK_VOP_DIV_CON_MASK,
 			     DCLK_VOP_PLL_SEL_CPLL << DCLK_VOP_SEL_SHIFT |
-			     (1 - 1) << DCLK_VOP_DIV_CON_SHIFT);
+			     (src_clk_div - 1) << DCLK_VOP_DIV_CON_SHIFT);
 		break;
 	default:
 		printf("do not support this vop freq\n");
@@ -456,11 +439,13 @@ static ulong rk3128_vop_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz)
 	return hz;
 }
 
-static ulong rk3128_vop_get_rate(struct rk3128_cru *cru, ulong clk_id)
+static ulong rk3128_vop_get_rate(struct rk3128_clk_priv *priv, ulong clk_id)
 {
+	struct rk3128_cru *cru = priv->cru;
 	u32 div, con, parent;
 
 	switch (clk_id) {
+	case ACLK_LCDC0:
 	case ACLK_VIO0:
 		con = readl(&cru->cru_clksel_con[31]);
 		div = con  & 0x1f;
@@ -471,75 +456,136 @@ static ulong rk3128_vop_get_rate(struct rk3128_cru *cru, ulong clk_id)
 		div = (con >> 8) & 0x1f;
 		parent = GPLL_HZ;
 		break;
-	case DCLK_LCDC:
+	case DCLK_VOP:
 		con = readl(&cru->cru_clksel_con[27]);
-		div = (con >> 8) & 0xfff;
-		parent = rkclk_pll_get_rate(cru, CLK_CODEC);
+		div = (con & DCLK_VOP_DIV_CON_MASK) >> DCLK_VOP_DIV_CON_SHIFT;
+		parent = rockchip_pll_get_rate(&rk3128_pll_clks[CPLL],
+					       priv->cru, CPLL);
 		break;
 	default:
 		return -ENOENT;
 	}
 	return DIV_TO_RATE(parent, div);
 }
+#endif
 
 static ulong rk3128_clk_get_rate(struct clk *clk)
 {
 	struct rk3128_clk_priv *priv = dev_get_priv(clk->dev);
+	ulong rate = 0;
 
 	switch (clk->id) {
-	case 0 ... 63:
-		return rkclk_pll_get_rate(priv->cru, clk->id);
+	case PLL_APLL:
+	case PLL_DPLL:
+	case PLL_CPLL:
+	case PLL_GPLL:
+		rate =  rockchip_pll_get_rate(&rk3128_pll_clks[clk->id - 1],
+					      priv->cru, clk->id - 1);
+		break;
+	case ARMCLK:
+		rate = rockchip_pll_get_rate(&rk3128_pll_clks[APLL],
+					     priv->cru, APLL);
+		break;
+	case HCLK_EMMC:
+	case SCLK_EMMC:
+	case HCLK_SDMMC:
+	case SCLK_SDMMC:
+	case HCLK_SDIO:
+	case SCLK_SDIO:
+		rate = rockchip_mmc_get_clk(priv, clk->id);
+		break;
+	case ACLK_PERI:
+	case HCLK_PERI:
+	case PCLK_PERI:
 	case PCLK_I2C0:
 	case PCLK_I2C1:
 	case PCLK_I2C2:
 	case PCLK_I2C3:
 	case PCLK_PWM:
-		return rk3128_peri_get_pclk(priv->cru, clk->id);
+		rate = rk3128_peri_get_clk(priv, clk->id);
+		break;
+	case ACLK_CPU:
+	case HCLK_CPU:
+	case PCLK_CPU:
+		rate = rk3128_bus_get_clk(priv, clk->id);
+		break;
+#ifndef CONFIG_SPL_BUILD
 	case SCLK_SARADC:
-                return rk3128_saradc_get_clk(priv->cru);
-	case DCLK_LCDC:
+		rate = rk3128_saradc_get_clk(priv);
+		break;
+	case DCLK_VOP:
 	case ACLK_VIO0:
 	case ACLK_VIO1:
-		return rk3128_vop_get_rate(priv->cru, clk->id);
+	case ACLK_LCDC0:
+		rate = rk3128_vop_get_rate(priv, clk->id);
+		break;
+#endif
 	default:
 		return -ENOENT;
 	}
+	return rate;
 }
 
 static ulong rk3128_clk_set_rate(struct clk *clk, ulong rate)
 {
 	struct rk3128_clk_priv *priv = dev_get_priv(clk->dev);
-	ulong new_rate, gclk_rate;
+	ulong ret;
 
-	gclk_rate = rkclk_pll_get_rate(priv->cru, CLK_GENERAL);
 	switch (clk->id) {
-	case 0 ... 63:
-		return 0;
-	case DCLK_LCDC:
-	case ACLK_VIO0:
-	case ACLK_VIO1:
-		new_rate = rk3128_vop_set_clk(priv->cru,
-						clk->id, rate);
+	case PLL_APLL:
+	case PLL_DPLL:
+	case PLL_CPLL:
+		ret = rockchip_pll_set_rate(&rk3128_pll_clks[clk->id - 1],
+					    priv->cru, clk->id - 1, rate);
+	case PLL_GPLL:
+		ret = rockchip_pll_set_rate(&rk3128_pll_clks[GPLL],
+					    priv->cru, GPLL, rate);
+		priv->gpll_hz = rate;
+		break;
+	case ARMCLK:
+		ret = rk3128_armclk_set_clk(priv, rate);
 		break;
 	case HCLK_EMMC:
-		new_rate = rockchip_mmc_set_clk(priv->cru, gclk_rate,
-						clk->id, rate);
+	case SCLK_EMMC:
+	case SCLK_EMMC_SAMPLE:
+	case HCLK_SDMMC:
+	case SCLK_SDMMC:
+	case SCLK_SDMMC_SAMPLE:
+	case HCLK_SDIO:
+	case SCLK_SDIO:
+	case SCLK_SDIO_SAMPLE:
+		ret = rockchip_mmc_set_clk(priv, clk->id, rate);
 		break;
+	case ACLK_PERI:
+	case PCLK_PERI:
+	case HCLK_PERI:
 	case PCLK_I2C0:
 	case PCLK_I2C1:
 	case PCLK_I2C2:
 	case PCLK_I2C3:
 	case PCLK_PWM:
-		new_rate = rk3128_peri_set_pclk(priv->cru, clk->id, rate);
+		ret = rk3128_peri_set_clk(priv, clk->id, rate);
+		break;
+	case ACLK_CPU:
+	case HCLK_CPU:
+	case PCLK_CPU:
+		ret = rk3128_bus_set_clk(priv, clk->id, rate);
 		break;
+#ifndef CONFIG_SPL_BUILD
 	case SCLK_SARADC:
-		new_rate = rk3128_saradc_set_clk(priv->cru, rate);
+		ret = rk3128_saradc_set_clk(priv, rate);
 		break;
+	case DCLK_VOP:
+	case ACLK_VIO0:
+	case ACLK_VIO1:
+	case ACLK_LCDC0:
+		ret = rk3128_vop_set_clk(priv, clk->id, rate);
+		break;
+#endif
 	default:
 		return -ENOENT;
 	}
-
-	return new_rate;
+	return ret;
 }
 
 static struct clk_ops rk3128_clk_ops = {
@@ -556,11 +602,36 @@ static int rk3128_clk_ofdata_to_platdata(struct udevice *dev)
 	return 0;
 }
 
+static void rkclk_init(struct rk3128_clk_priv *priv)
+{
+	if (rockchip_pll_get_rate(&rk3128_pll_clks[APLL],
+				  priv->cru, APLL) != APLL_HZ)
+		rk3128_armclk_set_clk(priv, APLL_HZ);
+
+	priv->gpll_hz = rockchip_pll_get_rate(&rk3128_pll_clks[GPLL],
+					      priv->cru, GPLL);
+	rk3128_bus_set_clk(priv, ACLK_CPU, ACLK_BUS_HZ / 2);
+	rk3128_peri_set_clk(priv, ACLK_PERI, ACLK_PERI_HZ / 2);
+	rockchip_pll_set_rate(&rk3128_pll_clks[GPLL],
+			      priv->cru, GPLL, GPLL_HZ);
+	priv->gpll_hz = GPLL_HZ;
+	rk_clrsetreg(&priv->cru->cru_clksel_con[2],
+		     NANDC_PLL_SEL_MASK | NANDC_CLK_DIV_MASK,
+		     NANDC_PLL_SEL_GPLL << NANDC_PLL_SEL_SHIFT |
+		     3 << NANDC_CLK_DIV_SHIFT);
+	rk3128_bus_set_clk(priv, ACLK_CPU, ACLK_BUS_HZ);
+	rk3128_bus_set_clk(priv, HCLK_CPU, ACLK_BUS_HZ / 2);
+	rk3128_bus_set_clk(priv, PCLK_CPU, ACLK_BUS_HZ / 2);
+	rk3128_peri_set_clk(priv, ACLK_PERI, ACLK_PERI_HZ);
+	rk3128_peri_set_clk(priv, HCLK_PERI, ACLK_PERI_HZ / 2);
+	rk3128_peri_set_clk(priv, PCLK_PERI, ACLK_PERI_HZ / 2);
+}
+
 static int rk3128_clk_probe(struct udevice *dev)
 {
 	struct rk3128_clk_priv *priv = dev_get_priv(dev);
 
-	rkclk_init(priv->cru);
+	rkclk_init(priv);
 
 	return 0;
 }
@@ -617,3 +688,62 @@ U_BOOT_DRIVER(rockchip_rk3128_cru) = {
 	.bind		= rk3128_clk_bind,
 	.probe		= rk3128_clk_probe,
 };
+
+#ifndef CONFIG_SPL_BUILD
+/**
+ * soc_clk_dump() - Print clock frequencies
+ * Returns zero on success
+ *
+ * Implementation for the clk dump command.
+ */
+int soc_clk_dump(void)
+{
+	struct udevice *cru_dev;
+	const struct rk3128_clk_info *clk_dump;
+	struct clk clk;
+	unsigned long clk_count = ARRAY_SIZE(clks_dump);
+	unsigned long rate;
+	int i, ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_CLK,
+					  DM_GET_DRIVER(rockchip_rk3128_cru),
+					  &cru_dev);
+	if (ret) {
+		printf("%s failed to get cru device\n", __func__);
+		return ret;
+	}
+
+	printf("CLK:");
+	for (i = 0; i < clk_count; i++) {
+		clk_dump = &clks_dump[i];
+		if (clk_dump->name) {
+			clk.id = clk_dump->id;
+			if (clk_dump->is_cru)
+				ret = clk_request(cru_dev, &clk);
+			if (ret < 0)
+				return ret;
+
+			rate = clk_get_rate(&clk);
+			clk_free(&clk);
+			if (i == 0) {
+				if (rate < 0)
+					printf("%10s%20s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("%10s%20lu Hz\n", clk_dump->name,
+					       rate);
+			} else {
+				if (rate < 0)
+					printf("%14s%20s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("%14s%20lu Hz\n", clk_dump->name,
+					       rate);
+			}
+		}
+	}
+
+	return 0;
+}
+#endif
+
diff --git a/include/dt-bindings/clock/rk3128-cru.h b/include/dt-bindings/clock/rk3128-cru.h
index 7ab50902c7..95efd48eb4 100644
--- a/include/dt-bindings/clock/rk3128-cru.h
+++ b/include/dt-bindings/clock/rk3128-cru.h
@@ -10,30 +10,31 @@
 /* core clocks */
 #define PLL_APLL		1
 #define PLL_DPLL		2
-#define PLL_GPLL		3
-#define ARMCLK			4
+#define PLL_CPLL		3
+#define PLL_GPLL		4
+#define ARMCLK			5
+#define PLL_GPLL_DIV2		6
+#define PLL_GPLL_DIV3		7
 
 /* sclk gates (special clocks) */
-#define SCLK_GPU		64
-#define SCLK_SPI		65
+#define SCLK_SPI0		65
+#define SCLK_NANDC		67
 #define SCLK_SDMMC		68
 #define SCLK_SDIO		69
 #define SCLK_EMMC		71
-#define SCLK_NANDC		76
 #define SCLK_UART0		77
 #define SCLK_UART1		78
 #define SCLK_UART2		79
-#define SCLK_I2S		82
+#define SCLK_I2S0		80
+#define SCLK_I2S1		81
 #define SCLK_SPDIF		83
 #define SCLK_TIMER0		85
 #define SCLK_TIMER1		86
 #define SCLK_TIMER2		87
 #define SCLK_TIMER3		88
+#define SCLK_TIMER4		89
+#define SCLK_TIMER5		90
 #define SCLK_SARADC		91
-#define SCLK_OTGPHY0		93
-#define SCLK_LCDC		100
-#define SCLK_HDMI		109
-#define SCLK_HEVC		111
 #define SCLK_I2S_OUT		113
 #define SCLK_SDMMC_DRV		114
 #define SCLK_SDIO_DRV		115
@@ -41,120 +42,175 @@
 #define SCLK_SDMMC_SAMPLE	118
 #define SCLK_SDIO_SAMPLE	119
 #define SCLK_EMMC_SAMPLE	121
-#define SCLK_PVTM_CORE          123
-#define SCLK_PVTM_GPU           124
-#define SCLK_PVTM_VIDEO         125
-#define SCLK_MIPI_24M           148
-#define SCLK_MAC		151
-#define SCLK_MACREF		152
-#define SCLK_SFC		160
+#define SCLK_VOP		122
+#define SCLK_MAC_SRC		124
+#define SCLK_MAC		126
+#define SCLK_MAC_REFOUT		127
+#define SCLK_MAC_REF		128
+#define SCLK_MAC_RX		129
+#define SCLK_MAC_TX		130
+#define SCLK_HEVC_CORE		134
+#define SCLK_RGA		135
+#define SCLK_CRYPTO		138
+#define SCLK_TSP		139
+#define SCLK_OTGPHY0		142
+#define SCLK_OTGPHY1		143
+#define SCLK_DDRC		144
+#define SCLK_PVTM_FUNC		145
+#define SCLK_PVTM_CORE		146
+#define SCLK_PVTM_GPU		147
+#define SCLK_MIPI_24M		148
+#define SCLK_PVTM		149
+#define SCLK_CIF_SRC		150
+#define SCLK_CIF_OUT_SRC	151
+#define SCLK_CIF_OUT		152
+#define SCLK_SFC		153
+#define SCLK_USB480M		154
+#define SCLK_HSADC_TSP		155
 
-#define DCLK_LCDC		190
+/* dclk gates */
+#define DCLK_VOP		190
+#define DCLK_EBC		191
 
 /* aclk gates */
-#define ACLK_DMAC2		194
-#define ACLK_VIO0		197
-#define ACLK_VIO1		203
-#define ACLK_VCODEC		208
-#define ACLK_CPU		209
+#define ACLK_VIO0		192
+#define ACLK_VIO1		193
+#define ACLK_DMAC		194
+#define ACLK_CPU		195
+#define ACLK_VEPU		196
+#define ACLK_VDPU		197
+#define ACLK_CIF		198
+#define ACLK_IEP		199
+#define ACLK_LCDC0		204
+#define ACLK_RGA		205
 #define ACLK_PERI		210
+#define ACLK_VOP		211
+#define ACLK_GMAC		212
+#define ACLK_GPU		213
 
 /* pclk gates */
 #define PCLK_SARADC		318
+#define PCLK_WDT		319
 #define PCLK_GPIO0		320
 #define PCLK_GPIO1		321
 #define PCLK_GPIO2		322
 #define PCLK_GPIO3		323
-#define PCLK_MIPI               325
+#define PCLK_VIO_H2P		324
+#define PCLK_MIPI		325
+#define PCLK_EFUSE		326
+#define PCLK_HDMI		327
+#define PCLK_ACODEC		328
 #define PCLK_GRF		329
 #define PCLK_I2C0		332
 #define PCLK_I2C1		333
 #define PCLK_I2C2		334
 #define PCLK_I2C3		335
-#define PCLK_SPI		338
+#define PCLK_SPI0		338
 #define PCLK_UART0		341
 #define PCLK_UART1		342
 #define PCLK_UART2		343
+#define PCLK_TSADC		344
 #define PCLK_PWM		350
 #define PCLK_TIMER		353
-#define PCLK_HDMI		360
-#define PCLK_CPU		362
+#define PCLK_CPU		354
 #define PCLK_PERI		363
-#define PCLK_DDRUPCTL		364
-#define PCLK_WDT		368
-#define PCLK_MIPIPHY            370
+#define PCLK_GMAC		367
+#define PCLK_PMU_PRE		368
+#define PCLK_SIM_CARD		369
+#define PCLK_MIPIPHY		370
 
 /* hclk gates */
-#define HCLK_OTG0		449
-#define HCLK_OTG1		450
+#define HCLK_SPDIF		440
+#define HCLK_GPS		441
+#define HCLK_USBHOST		442
+#define HCLK_I2S_8CH		443
+#define HCLK_I2S_2CH		444
+#define HCLK_VOP		452
 #define HCLK_NANDC		453
 #define HCLK_SDMMC		456
 #define HCLK_SDIO		457
 #define HCLK_EMMC		459
-#define HCLK_I2S		462
-#define HCLK_LCDC		465
-#define HCLK_ROM		467
-#define HCLK_VIO_H2P            469
-#define HCLK_VIO_BUS		472
-#define HCLK_VCODEC		476
-#define HCLK_CPU		477
+#define HCLK_CPU		460
+#define HCLK_VEPU		461
+#define HCLK_VDPU		462
+#define HCLK_LCDC0		463
+#define HCLK_EBC		465
+#define HCLK_VIO		466
+#define HCLK_RGA		467
+#define HCLK_IEP		468
+#define HCLK_VIO_H2P		469
+#define HCLK_CIF		470
+#define HCLK_HOST2		473
+#define HCLK_OTG		474
+#define HCLK_TSP		475
+#define HCLK_CRYPTO		476
 #define HCLK_PERI		478
 
 #define CLK_NR_CLKS		(HCLK_PERI + 1)
 
 /* soft-reset indices */
-#define SRST_CORE0		0
-#define SRST_CORE1		1
-#define SRST_CORE0_DBG		4
-#define SRST_CORE1_DBG		5
-#define SRST_CORE0_POR		8
-#define SRST_CORE1_POR		9
-#define SRST_L2C		12
-#define SRST_TOPDBG		13
+#define SRST_CORE0_PO		0
+#define SRST_CORE1_PO		1
+#define SRST_CORE2_PO		2
+#define SRST_CORE3_PO		3
+#define SRST_CORE0		4
+#define SRST_CORE1		5
+#define SRST_CORE2		6
+#define SRST_CORE3		7
+#define SRST_CORE0_DBG		8
+#define SRST_CORE1_DBG		9
+#define SRST_CORE2_DBG		10
+#define SRST_CORE3_DBG		11
+#define SRST_TOPDBG		12
+#define SRST_ACLK_CORE		13
 #define SRST_STRC_SYS_A		14
-#define SRST_PD_CORE_NIU	15
+#define SRST_L2C		15
 
-#define SRST_TIMER2		16
-#define SRST_CPUSYS_H		17
-#define SRST_AHB2APB_H		19
-#define SRST_TIMER3		20
+#define SRST_CPUSYS_H		18
+#define SRST_AHB2APBSYS_H	19
+#define SRST_SPDIF		20
 #define SRST_INTMEM		21
 #define SRST_ROM		22
 #define SRST_PERI_NIU		23
-#define SRST_I2S		24
-#define SRST_DDR_PLL		25
-#define SRST_GPU_DLL		26
-#define SRST_TIMER0		27
-#define SRST_TIMER1		28
-#define SRST_CORE_DLL		29
+#define SRST_I2S_2CH		24
+#define SRST_I2S_8CH		25
+#define SRST_GPU_PVTM		26
+#define SRST_FUNC_PVTM		27
+#define SRST_CORE_PVTM		29
 #define SRST_EFUSE_P		30
 #define SRST_ACODEC_P		31
 
 #define SRST_GPIO0		32
 #define SRST_GPIO1		33
 #define SRST_GPIO2		34
-#define SRST_MIPIPHY_P          36
+#define SRST_GPIO3		35
+#define SRST_MIPIPHY_P		36
 #define SRST_UART0		39
 #define SRST_UART1		40
 #define SRST_UART2		41
 #define SRST_I2C0		43
 #define SRST_I2C1		44
 #define SRST_I2C2		45
+#define SRST_I2C3		46
 #define SRST_SFC		47
 
-#define SRST_PWM0		48
+#define SRST_PWM		48
+#define SRST_DAP_PO		50
 #define SRST_DAP		51
 #define SRST_DAP_SYS		52
+#define SRST_CRYPTO		53
 #define SRST_GRF		55
-#define SRST_PERIPHSYS_A	57
-#define SRST_PERIPHSYS_H	58
-#define SRST_PERIPHSYS_P	59
+#define SRST_GMAC		56
+#define SRST_PERIPH_SYS_A	57
+#define SRST_PERIPH_SYS_H	58
+#define SRST_PERIPH_SYS_P       59
+#define SRST_SMART_CARD		60
 #define SRST_CPU_PERI		61
 #define SRST_EMEM_PERI		62
 #define SRST_USB_PERI		63
 
-#define SRST_DMA2		64
-#define SRST_MAC		66
+#define SRST_DMA		64
+#define SRST_GPS		67
 #define SRST_NANDC		68
 #define SRST_USBOTG0		69
 #define SRST_OTGC0		71
@@ -162,35 +218,58 @@
 #define SRST_OTGC1		74
 #define SRST_DDRMSCH		79
 
-#define SRST_MMC0		81
+#define SRST_SDMMC		81
 #define SRST_SDIO		82
 #define SRST_EMMC		83
-#define SRST_SPI0		84
+#define SRST_SPI		84
 #define SRST_WDT		86
 #define SRST_SARADC		87
 #define SRST_DDRPHY		88
 #define SRST_DDRPHY_P		89
 #define SRST_DDRCTRL		90
 #define SRST_DDRCTRL_P		91
+#define SRST_TSP		92
+#define SRST_TSP_CLKIN		93
+#define SRST_HOST0_ECHI		94
 
 #define SRST_HDMI_P		96
+#define SRST_VIO_ARBI_H		97
+#define SRST_VIO0_A		98
 #define SRST_VIO_BUS_H		99
+#define SRST_VOP_A		100
+#define SRST_VOP_H		101
+#define SRST_VOP_D		102
 #define SRST_UTMI0		103
 #define SRST_UTMI1		104
 #define SRST_USBPOR		105
+#define SRST_IEP_A		106
+#define SRST_IEP_H		107
+#define SRST_RGA_A		108
+#define SRST_RGA_H		109
+#define SRST_CIF0		110
+#define SRST_PMU		111
 
 #define SRST_VCODEC_A		112
 #define SRST_VCODEC_H		113
 #define SRST_VIO1_A		114
-#define SRST_HEVC		115
+#define SRST_HEVC_CORE		115
 #define SRST_VCODEC_NIU_A	116
-#define SRST_LCDC1_A		117
-#define SRST_LCDC1_H		118
-#define SRST_LCDC1_D		119
+#define SRST_PMU_NIU_P		117
+#define SRST_LCDC0_S		119
 #define SRST_GPU		120
 #define SRST_GPU_NIU_A		122
+#define SRST_EBC_A		123
+#define SRST_EBC_H		124
 
-#define SRST_DBG_P		131
-#define SRST_VIO_MIPI_DSI       137
+#define SRST_CORE_DBG		128
+#define SRST_DBG_P		129
+#define SRST_TIMER0		130
+#define SRST_TIMER1		131
+#define SRST_TIMER2		132
+#define SRST_TIMER3		133
+#define SRST_TIMER4		134
+#define SRST_TIMER5		135
+#define SRST_VIO_H2P		136
+#define SRST_VIO_MIPI_DSI	137
 
 #endif

commit 809e91fd3879f1c64709ce2d7402f43f11b68b44
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Wed Jul 25 16:13:22 2018 +0800

    rockchip: clk: rk322x: support more clks to set and get rate
    
    Change-Id: Ibed40f1826469263a8015d8af2dea4d3567a08e6
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk322x.h b/arch/arm/include/asm/arch-rockchip/cru_rk322x.h
index a7999ca5af..98bda7548f 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk322x.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk322x.h
@@ -8,27 +8,19 @@
 
 #include <common.h>
 
-#define MHz		1000000
-#define OSC_HZ		(24 * MHz)
-
-#define APLL_HZ		(600 * MHz)
-#define GPLL_HZ		(594 * MHz)
-
-#define CORE_PERI_HZ	150000000
-#define CORE_ACLK_HZ	300000000
-
-#define BUS_ACLK_HZ	148500000
-#define BUS_HCLK_HZ	148500000
-#define BUS_PCLK_HZ	74250000
-
-#define PERI_ACLK_HZ	148500000
-#define PERI_HCLK_HZ	148500000
-#define PERI_PCLK_HZ	74250000
+#define MHz				1000 * 1000
+#define OSC_HZ				(24 * MHz)
+#define APLL_HZ				(600 * MHz)
+#define GPLL_HZ				(1200 * MHz)
+#define CPLL_HZ				(500 * MHz)
+#define ACLK_BUS_HZ			(150 * MHz)
+#define ACLK_PERI_HZ			(150 * MHz)
 
 /* Private data for the clock driver - used by rockchip_get_cru() */
 struct rk322x_clk_priv {
 	struct rk322x_cru *cru;
-	ulong rate;
+	ulong gpll_hz;
+	ulong cpll_hz;
 };
 
 struct rk322x_cru {
@@ -59,57 +51,29 @@ struct rk322x_cru {
 };
 check_member(rk322x_cru, cru_pll_mask_con, 0x01f8);
 
-struct pll_div {
-	u32 refdiv;
-	u32 fbdiv;
-	u32 postdiv1;
-	u32 postdiv2;
-	u32 frac;
+enum rk322x_pll_id {
+	APLL,
+	DPLL,
+	CPLL,
+	GPLL,
+	NPLL,
+	PLL_COUNT,
 };
 
-enum {
-	/* PLLCON0*/
-	PLL_BP_SHIFT		= 15,
-	PLL_POSTDIV1_SHIFT	= 12,
-	PLL_POSTDIV1_MASK	= 7 << PLL_POSTDIV1_SHIFT,
-	PLL_FBDIV_SHIFT		= 0,
-	PLL_FBDIV_MASK		= 0xfff,
-
-	/* PLLCON1 */
-	PLL_RST_SHIFT		= 14,
-	PLL_PD_SHIFT		= 13,
-	PLL_PD_MASK		= 1 << PLL_PD_SHIFT,
-	PLL_DSMPD_SHIFT		= 12,
-	PLL_DSMPD_MASK		= 1 << PLL_DSMPD_SHIFT,
-	PLL_LOCK_STATUS_SHIFT	= 10,
-	PLL_LOCK_STATUS_MASK	= 1 << PLL_LOCK_STATUS_SHIFT,
-	PLL_POSTDIV2_SHIFT	= 6,
-	PLL_POSTDIV2_MASK	= 7 << PLL_POSTDIV2_SHIFT,
-	PLL_REFDIV_SHIFT	= 0,
-	PLL_REFDIV_MASK		= 0x3f,
-
-	/* CRU_MODE */
-	GPLL_MODE_SHIFT		= 12,
-	GPLL_MODE_MASK		= 1 << GPLL_MODE_SHIFT,
-	GPLL_MODE_SLOW		= 0,
-	GPLL_MODE_NORM,
-	CPLL_MODE_SHIFT		= 8,
-	CPLL_MODE_MASK		= 1 << CPLL_MODE_SHIFT,
-	CPLL_MODE_SLOW		= 0,
-	CPLL_MODE_NORM,
-	DPLL_MODE_SHIFT		= 4,
-	DPLL_MODE_MASK		= 1 << DPLL_MODE_SHIFT,
-	DPLL_MODE_SLOW		= 0,
-	DPLL_MODE_NORM,
-	APLL_MODE_SHIFT		= 0,
-	APLL_MODE_MASK		= 1 << APLL_MODE_SHIFT,
-	APLL_MODE_SLOW		= 0,
-	APLL_MODE_NORM,
+struct rk322x_clk_info {
+	unsigned long id;
+	char *name;
+	bool is_cru;
+};
+
+#define RK2928_PLL_CON(x)		((x) * 0x4)
+#define RK2928_MODE_CON		0x40
 
+enum {
 	/* CRU_CLK_SEL0_CON */
 	BUS_ACLK_PLL_SEL_SHIFT	= 13,
 	BUS_ACLK_PLL_SEL_MASK	= 3 << BUS_ACLK_PLL_SEL_SHIFT,
-	BUS_ACLK_PLL_SEL_APLL	= 0,
+	BUS_ACLK_PLL_SEL_CPLL	= 0,
 	BUS_ACLK_PLL_SEL_GPLL,
 	BUS_ACLK_PLL_SEL_HDMIPLL,
 	BUS_ACLK_DIV_SHIFT	= 8,
@@ -194,15 +158,30 @@ enum {
 	DDR_DIV_SEL_MASK	= 3 << DDR_DIV_SEL_SHIFT,
 
 	/* CRU_CLKSEL27_CON */
-	VOP_DCLK_DIV_SHIFT	= 8,
-	VOP_DCLK_DIV_MASK	= 0xff << VOP_DCLK_DIV_SHIFT,
-	VOP_PLL_SEL_SHIFT	= 1,
-	VOP_PLL_SEL_MASK	= 1 << VOP_PLL_SEL_SHIFT,
+	DCLK_LCDC_PLL_SEL_GPLL		= 0,
+	DCLK_LCDC_PLL_SEL_CPLL		= 1,
+	DCLK_LCDC_PLL_SEL_SHIFT		= 0,
+	DCLK_LCDC_PLL_SEL_MASK		= 1 << DCLK_LCDC_PLL_SEL_SHIFT,
+	DCLK_LCDC_SEL_HDMIPHY		= 0,
+	DCLK_LCDC_SEL_PLL		= 1,
+	DCLK_LCDC_SEL_SHIFT		= 1,
+	DCLK_LCDC_SEL_MASK		= 1 << DCLK_LCDC_SEL_SHIFT,
+	DCLK_LCDC_DIV_CON_SHIFT		= 8,
+	DCLK_LCDC_DIV_CON_MASK		= 0xFf << DCLK_LCDC_DIV_CON_SHIFT,
 
 	/* CRU_CLKSEL29_CON */
 	GMAC_CLK_SRC_SHIFT	= 12,
 	GMAC_CLK_SRC_MASK	= 1 << GMAC_CLK_SRC_SHIFT,
 
+	/* CRU_CLKSEL33_CON */
+	ACLK_VOP_PLL_SEL_SHIFT		= 5,
+	ACLK_VOP_PLL_SEL_MASK		= 0x3 << ACLK_VOP_PLL_SEL_SHIFT,
+	ACLK_VOP_PLL_SEL_CPLL		= 0,
+	ACLK_VOP_PLL_SEL_GPLL		= 1,
+	ACLK_VOP_PLL_SEL_HDMIPHY		= 2,
+	ACLK_VOP_DIV_CON_SHIFT		= 0,
+	ACLK_VOP_DIV_CON_MASK		= 0x1f << ACLK_VOP_DIV_CON_SHIFT,
+
 	/* CRU_SOFTRST5_CON */
 	DDRCTRL_PSRST_SHIFT	= 11,
 	DDRCTRL_SRST_SHIFT	= 10,
diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c
index 54b53c4d34..9716801b7a 100644
--- a/drivers/clk/rockchip/clk_rk322x.c
+++ b/drivers/clk/rockchip/clk_rk322x.c
@@ -19,198 +19,128 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-enum {
-	VCO_MAX_HZ	= 3200U * 1000000,
-	VCO_MIN_HZ	= 800 * 1000000,
-	OUTPUT_MAX_HZ	= 3200U * 1000000,
-	OUTPUT_MIN_HZ	= 24 * 1000000,
-};
-
 #define DIV_TO_RATE(input_rate, div)	((input_rate) / ((div) + 1))
 
-#define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\
-	.refdiv = _refdiv,\
-	.fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ), \
-	.postdiv1 = _postdiv1, .postdiv2 = _postdiv2};\
-	_Static_assert(((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ) * \
-			 OSC_HZ / (_refdiv * _postdiv1 * _postdiv2) == hz, \
-			 #hz "Hz cannot be hit with PLL "\
-			 "divisors on line " __stringify(__LINE__));
-
-/* use integer mode*/
-static const struct pll_div apll_init_cfg = PLL_DIVISORS(APLL_HZ, 1, 3, 1);
-static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 2, 1);
-
-static int rkclk_set_pll(struct rk322x_cru *cru, enum rk_clk_id clk_id,
-			 const struct pll_div *div)
-{
-	int pll_id = rk_pll_id(clk_id);
-	struct rk322x_pll *pll = &cru->pll[pll_id];
-
-	/* All PLLs have same VCO and output frequency range restrictions. */
-	uint vco_hz = OSC_HZ / 1000 * div->fbdiv / div->refdiv * 1000;
-	uint output_hz = vco_hz / div->postdiv1 / div->postdiv2;
-
-	debug("PLL at %p: fb=%d, ref=%d, pst1=%d, pst2=%d, vco=%u Hz, output=%u Hz\n",
-	      pll, div->fbdiv, div->refdiv, div->postdiv1,
-	      div->postdiv2, vco_hz, output_hz);
-	assert(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ &&
-	       output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ);
-
-	/* use integer mode */
-	rk_setreg(&pll->con1, 1 << PLL_DSMPD_SHIFT);
-	/* Power down */
-	rk_setreg(&pll->con1, 1 << PLL_PD_SHIFT);
-
-	rk_clrsetreg(&pll->con0,
-		     PLL_POSTDIV1_MASK | PLL_FBDIV_MASK,
-		     (div->postdiv1 << PLL_POSTDIV1_SHIFT) | div->fbdiv);
-	rk_clrsetreg(&pll->con1, PLL_POSTDIV2_MASK | PLL_REFDIV_MASK,
-		     (div->postdiv2 << PLL_POSTDIV2_SHIFT |
-		     div->refdiv << PLL_REFDIV_SHIFT));
-
-	/* Power Up */
-	rk_clrreg(&pll->con1, 1 << PLL_PD_SHIFT);
-
-	/* waiting for pll lock */
-	while (readl(&pll->con1) & (1 << PLL_LOCK_STATUS_SHIFT))
-		udelay(1);
+#ifndef CONFIG_SPL_BUILD
+#define RK322x_CLK_DUMP(_id, _name, _iscru)	\
+{						\
+	.id = _id,				\
+	.name = _name,				\
+	.is_cru = _iscru,			\
+}
+#endif
+
+static struct rockchip_pll_rate_table rk322x_pll_rates[] = {
+	/* _mhz, _refdiv, _fbdiv, _postdiv1, _postdiv2, _dsmpd, _frac */
+	RK3036_PLL_RATE(1200000000, 1, 50, 1, 1, 1, 0),
+#ifndef CONFIG_SPL_BUILD
+	RK3036_PLL_RATE(1188000000, 1, 99, 2, 1, 1, 0),
+	RK3036_PLL_RATE(1008000000, 1, 84, 2, 1, 1, 0),
+#endif
+	RK3036_PLL_RATE(816000000, 1, 68, 2, 1, 1, 0),
+	RK3036_PLL_RATE(800000000, 1, 100, 3, 1, 1, 0),
+	RK3036_PLL_RATE(600000000, 1, 75, 3, 1, 1, 0),
+#ifndef CONFIG_SPL_BUILD
+	RK3036_PLL_RATE(594000000, 2, 99, 2, 1, 1, 0),
+	RK3036_PLL_RATE(500000000, 1, 125, 6, 1, 1, 0),
+	RK3036_PLL_RATE(400000000, 1, 50, 3, 1, 1, 0),
+#endif
+	{ /* sentinel */ },
+};
 
-	return 0;
+#define RK322x_CPUCLK_RATE(_rate, _aclk_div, _pclk_div)		\
+{								\
+	.rate	= _rate##U,					\
+	.aclk_div = _aclk_div,					\
+	.pclk_div = _pclk_div,					\
 }
 
-static void rkclk_init(struct rk322x_cru *cru)
-{
-	u32 aclk_div;
-	u32 hclk_div;
-	u32 pclk_div;
+static struct rockchip_cpu_rate_table rk322x_cpu_rates[] = {
+	RK322x_CPUCLK_RATE(1200000000, 1, 5),
+	RK322x_CPUCLK_RATE(1008000000, 1, 5),
+	RK322x_CPUCLK_RATE(816000000, 1, 3),
+	RK322x_CPUCLK_RATE(600000000, 1, 3),
+};
 
-	/* pll enter slow-mode */
-	rk_clrsetreg(&cru->cru_mode_con,
-		     GPLL_MODE_MASK | APLL_MODE_MASK,
-		     GPLL_MODE_SLOW << GPLL_MODE_SHIFT |
-		     APLL_MODE_SLOW << APLL_MODE_SHIFT);
+#ifndef CONFIG_SPL_BUILD
+static const struct rk322x_clk_info clks_dump[] = {
+	RK322x_CLK_DUMP(PLL_APLL, "apll", true),
+	RK322x_CLK_DUMP(PLL_DPLL, "dpll", true),
+	RK322x_CLK_DUMP(PLL_CPLL, "cpll", true),
+	RK322x_CLK_DUMP(PLL_GPLL, "gpll", true),
+	RK322x_CLK_DUMP(ARMCLK, "armclk", true),
+	RK322x_CLK_DUMP(ACLK_CPU, "aclk_bus", true),
+	RK322x_CLK_DUMP(HCLK_CPU, "hclk_bus", true),
+	RK322x_CLK_DUMP(PCLK_CPU, "pclk_bus", true),
+	RK322x_CLK_DUMP(ACLK_PERI, "aclk_peri", true),
+	RK322x_CLK_DUMP(HCLK_PERI, "hclk_peri", true),
+	RK322x_CLK_DUMP(PCLK_PERI, "pclk_peri", true),
+};
+#endif
+
+static struct rockchip_pll_clock rk322x_pll_clks[] = {
+	[APLL] = PLL(pll_rk3036, PLL_APLL, RK2928_PLL_CON(0),
+		     RK2928_MODE_CON, 0, 10, 0, rk322x_pll_rates),
+	[DPLL] = PLL(pll_rk3036, PLL_DPLL, RK2928_PLL_CON(3),
+		     RK2928_MODE_CON, 4, 10, 0, rk322x_pll_rates),
+	[CPLL] = PLL(pll_rk3036, PLL_CPLL, RK2928_PLL_CON(6),
+		    RK2928_MODE_CON, 8, 10, 0, rk322x_pll_rates),
+	[GPLL] = PLL(pll_rk3036, PLL_GPLL, RK2928_PLL_CON(9),
+		     RK2928_MODE_CON, 12, 10, 0, rk322x_pll_rates),
+};
 
-	/* init pll */
-	rkclk_set_pll(cru, CLK_ARM, &apll_init_cfg);
-	rkclk_set_pll(cru, CLK_GENERAL, &gpll_init_cfg);
+static ulong rk322x_armclk_set_clk(struct rk322x_clk_priv *priv, ulong hz)
+{
+	struct rk322x_cru *cru = priv->cru;
+	const struct rockchip_cpu_rate_table *rate;
+	ulong old_rate;
+
+	rate = rockchip_get_cpu_settings(rk322x_cpu_rates, hz);
+	if (!rate) {
+		printf("%s unsupported rate\n", __func__);
+		return -EINVAL;
+	}
 
 	/*
 	 * select apll as cpu/core clock pll source and
 	 * set up dependent divisors for PERI and ACLK clocks.
 	 * core hz : apll = 1:1
 	 */
-	aclk_div = APLL_HZ / CORE_ACLK_HZ - 1;
-	assert((aclk_div + 1) * CORE_ACLK_HZ == APLL_HZ && aclk_div < 0x7);
-
-	pclk_div = APLL_HZ / CORE_PERI_HZ - 1;
-	assert((pclk_div + 1) * CORE_PERI_HZ == APLL_HZ && pclk_div < 0xf);
-
-	rk_clrsetreg(&cru->cru_clksel_con[0],
-		     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK,
-		     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
-		     0 << CORE_DIV_CON_SHIFT);
-
-	rk_clrsetreg(&cru->cru_clksel_con[1],
-		     CORE_ACLK_DIV_MASK | CORE_PERI_DIV_MASK,
-		     aclk_div << CORE_ACLK_DIV_SHIFT |
-		     pclk_div << CORE_PERI_DIV_SHIFT);
-
-	/*
-	 * select gpll as pd_bus bus clock source and
-	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
-	 */
-	aclk_div = GPLL_HZ / BUS_ACLK_HZ - 1;
-	assert((aclk_div + 1) * BUS_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
-
-	pclk_div = BUS_ACLK_HZ / BUS_PCLK_HZ - 1;
-
-	hclk_div = BUS_ACLK_HZ / BUS_HCLK_HZ - 1;
-
-	rk_clrsetreg(&cru->cru_clksel_con[0],
-		     BUS_ACLK_PLL_SEL_MASK | BUS_ACLK_DIV_MASK,
-		     BUS_ACLK_PLL_SEL_GPLL << BUS_ACLK_PLL_SEL_SHIFT |
-		     aclk_div << BUS_ACLK_DIV_SHIFT);
-
-	rk_clrsetreg(&cru->cru_clksel_con[1],
-		     BUS_PCLK_DIV_MASK | BUS_HCLK_DIV_MASK,
-		     pclk_div << BUS_PCLK_DIV_SHIFT |
-		     hclk_div << BUS_HCLK_DIV_SHIFT);
-
-	/*
-	 * select gpll as pd_peri bus clock source and
-	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
-	 */
-	aclk_div = GPLL_HZ / PERI_ACLK_HZ - 1;
-	assert((aclk_div + 1) * PERI_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f);
-
-	hclk_div = ilog2(PERI_ACLK_HZ / PERI_HCLK_HZ);
-	assert((1 << hclk_div) * PERI_HCLK_HZ ==
-		PERI_ACLK_HZ && (hclk_div < 0x4));
-
-	pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ);
-	assert((1 << pclk_div) * PERI_PCLK_HZ ==
-		PERI_ACLK_HZ && pclk_div < 0x8);
-
-	rk_clrsetreg(&cru->cru_clksel_con[10],
-		     PERI_PLL_SEL_MASK | PERI_PCLK_DIV_MASK |
-		     PERI_HCLK_DIV_MASK | PERI_ACLK_DIV_MASK,
-		     PERI_PLL_GPLL << PERI_PLL_SEL_SHIFT |
-		     pclk_div << PERI_PCLK_DIV_SHIFT |
-		     hclk_div << PERI_HCLK_DIV_SHIFT |
-		     aclk_div << PERI_ACLK_DIV_SHIFT);
-
-	/* PLL enter normal-mode */
-	rk_clrsetreg(&cru->cru_mode_con,
-		     GPLL_MODE_MASK | APLL_MODE_MASK,
-		     GPLL_MODE_NORM << GPLL_MODE_SHIFT |
-		     APLL_MODE_NORM << APLL_MODE_SHIFT);
-}
-
-/* Get pll rate by id */
-static uint32_t rkclk_pll_get_rate(struct rk322x_cru *cru,
-				   enum rk_clk_id clk_id)
-{
-	uint32_t refdiv, fbdiv, postdiv1, postdiv2;
-	uint32_t con;
-	int pll_id = rk_pll_id(clk_id);
-	struct rk322x_pll *pll = &cru->pll[pll_id];
-	static u8 clk_shift[CLK_COUNT] = {
-		0xff, APLL_MODE_SHIFT, DPLL_MODE_SHIFT, 0xff,
-		GPLL_MODE_SHIFT, 0xff
-	};
-	static u32 clk_mask[CLK_COUNT] = {
-		0xff, APLL_MODE_MASK, DPLL_MODE_MASK, 0xff,
-		GPLL_MODE_MASK, 0xff
-	};
-	uint shift;
-	uint mask;
-
-	con = readl(&cru->cru_mode_con);
-	shift = clk_shift[clk_id];
-	mask = clk_mask[clk_id];
-
-	switch ((con & mask) >> shift) {
-	case GPLL_MODE_SLOW:
-		return OSC_HZ;
-	case GPLL_MODE_NORM:
-
-		/* normal mode */
-		con = readl(&pll->con0);
-		postdiv1 = (con & PLL_POSTDIV1_MASK) >> PLL_POSTDIV1_SHIFT;
-		fbdiv = (con & PLL_FBDIV_MASK) >> PLL_FBDIV_SHIFT;
-		con = readl(&pll->con1);
-		postdiv2 = (con & PLL_POSTDIV2_MASK) >> PLL_POSTDIV2_SHIFT;
-		refdiv = (con & PLL_REFDIV_MASK) >> PLL_REFDIV_SHIFT;
-		return (24 * fbdiv / (refdiv * postdiv1 * postdiv2)) * 1000000;
-	default:
-		return 32768;
+	old_rate = rockchip_pll_get_rate(&rk322x_pll_clks[APLL],
+					 priv->cru, APLL);
+	if (old_rate > hz) {
+		if (rockchip_pll_set_rate(&rk322x_pll_clks[APLL],
+					  priv->cru, APLL, hz))
+			return -EINVAL;
+		rk_clrsetreg(&cru->cru_clksel_con[0],
+			     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK,
+			     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
+			     0 << CORE_DIV_CON_SHIFT);
+		rk_clrsetreg(&cru->cru_clksel_con[1],
+			     CORE_ACLK_DIV_MASK | CORE_PERI_DIV_MASK,
+			     rate->aclk_div << CORE_ACLK_DIV_SHIFT |
+			     rate->pclk_div << CORE_PERI_DIV_SHIFT);
+	} else if (old_rate < hz) {
+		rk_clrsetreg(&cru->cru_clksel_con[1],
+			     CORE_ACLK_DIV_MASK | CORE_PERI_DIV_MASK,
+			     rate->aclk_div << CORE_ACLK_DIV_SHIFT |
+			     rate->pclk_div << CORE_PERI_DIV_SHIFT);
+		rk_clrsetreg(&cru->cru_clksel_con[0],
+			     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK,
+			     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
+			     0 << CORE_DIV_CON_SHIFT);
+		if (rockchip_pll_set_rate(&rk322x_pll_clks[APLL],
+					  priv->cru, APLL, hz))
+			return -EINVAL;
 	}
+
+	return rockchip_pll_get_rate(&rk322x_pll_clks[APLL], priv->cru, APLL);
 }
 
-static ulong rockchip_mmc_get_clk(struct rk322x_cru *cru, uint clk_general_rate,
-				  int periph)
+static ulong rk322x_mmc_get_clk(struct rk322x_clk_priv *priv,
+				int periph)
 {
+	struct rk322x_cru *cru = priv->cru;
 	uint src_rate;
 	uint div, mux;
 	u32 con;
@@ -226,20 +156,30 @@ static ulong rockchip_mmc_get_clk(struct rk322x_cru *cru, uint clk_general_rate,
 		break;
 	case HCLK_SDMMC:
 	case SCLK_SDMMC:
+	case SCLK_SDMMC_SAMPLE:
 		con = readl(&cru->cru_clksel_con[11]);
 		mux = (con & MMC0_PLL_MASK) >> MMC0_PLL_SHIFT;
 		div = (con & MMC0_DIV_MASK) >> MMC0_DIV_SHIFT;
 		break;
+	case SCLK_SDIO:
+	case SCLK_SDIO_SAMPLE:
+		con = readl(&cru->cru_clksel_con[11]);
+		mux = (con & SDIO_PLL_MASK) >> SDIO_PLL_SHIFT;
+		con = readl(&cru->cru_clksel_con[12]);
+		div = (con & SDIO_DIV_MASK) >> SDIO_DIV_SHIFT;
+		break;
 	default:
 		return -EINVAL;
 	}
 
-	src_rate = mux == EMMC_SEL_24M ? OSC_HZ : clk_general_rate;
+	src_rate = mux == EMMC_SEL_24M ? OSC_HZ : priv->gpll_hz;
 	return DIV_TO_RATE(src_rate, div) / 2;
 }
 
-static ulong rk322x_mac_set_clk(struct rk322x_cru *cru, uint freq)
+#ifndef CONFIG_SPL_BUILD
+static ulong rk322x_mac_set_clk(struct rk322x_clk_priv *priv, uint freq)
 {
+	struct rk322x_cru *cru = priv->cru;
 	ulong ret;
 
 	/*
@@ -255,7 +195,7 @@ static ulong rk322x_mac_set_clk(struct rk322x_cru *cru, uint freq)
 		u8 div;
 
 		if ((con >> MAC_PLL_SEL_SHIFT) & MAC_PLL_SEL_MASK)
-			pll_rate = GPLL_HZ;
+			pll_rate = priv->gpll_hz;
 		else
 			/* CPLL is not set */
 			return -EPERM;
@@ -272,17 +212,17 @@ static ulong rk322x_mac_set_clk(struct rk322x_cru *cru, uint freq)
 
 	return ret;
 }
+#endif
 
-static ulong rockchip_mmc_set_clk(struct rk322x_cru *cru, uint clk_general_rate,
-				  int periph, uint freq)
+static ulong rk322x_mmc_set_clk(struct rk322x_clk_priv *priv,
+				int periph, uint freq)
 {
+	struct rk322x_cru *cru = priv->cru;
 	int src_clk_div;
 	int mux;
 
-	debug("%s: clk_general_rate=%u\n", __func__, clk_general_rate);
-
 	/* mmc clock defaulg div 2 internal, need provide double in cru */
-	src_clk_div = DIV_ROUND_UP(clk_general_rate / 2, freq);
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz / 2, freq);
 
 	if (src_clk_div > 128) {
 		src_clk_div = DIV_ROUND_UP(OSC_HZ / 2, freq);
@@ -305,90 +245,310 @@ static ulong rockchip_mmc_set_clk(struct rk322x_cru *cru, uint clk_general_rate,
 		break;
 	case HCLK_SDMMC:
 	case SCLK_SDMMC:
+	case SCLK_SDMMC_SAMPLE:
 		rk_clrsetreg(&cru->cru_clksel_con[11],
 			     MMC0_PLL_MASK | MMC0_DIV_MASK,
 			     mux << MMC0_PLL_SHIFT |
 			     (src_clk_div - 1) << MMC0_DIV_SHIFT);
 		break;
+	case SCLK_SDIO:
+	case SCLK_SDIO_SAMPLE:
+		rk_clrsetreg(&cru->cru_clksel_con[11],
+			     SDIO_PLL_MASK,
+			     mux << SDIO_PLL_SHIFT);
+		rk_clrsetreg(&cru->cru_clksel_con[12],
+			     SDIO_DIV_MASK,
+			     (src_clk_div - 1) << SDIO_DIV_SHIFT);
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return rk322x_mmc_get_clk(priv, periph);
+}
+
+static ulong rk322x_bus_get_clk(struct rk322x_clk_priv *priv, ulong clk_id)
+{
+	struct rk322x_cru *cru = priv->cru;
+	u32 div, con, parent;
+
+	switch (clk_id) {
+	case ACLK_CPU:
+		con = readl(&cru->cru_clksel_con[0]);
+		div = (con & BUS_ACLK_DIV_MASK) >> BUS_ACLK_DIV_SHIFT;
+		parent = priv->gpll_hz;
+		break;
+	case HCLK_CPU:
+		con = readl(&cru->cru_clksel_con[1]);
+		div = (con & BUS_HCLK_DIV_MASK) >> BUS_HCLK_DIV_SHIFT;
+		parent = rk322x_bus_get_clk(priv, ACLK_CPU);
+		break;
+	case PCLK_CPU:
+	case PCLK_I2C0:
+	case PCLK_I2C1:
+	case PCLK_I2C2:
+	case PCLK_I2C3:
+	case PCLK_PWM:
+		con = readl(&cru->cru_clksel_con[1]);
+		div = (con & BUS_PCLK_DIV_MASK) >> BUS_PCLK_DIV_SHIFT;
+		parent = rk322x_bus_get_clk(priv, ACLK_CPU);
+		break;
 	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rk322x_bus_set_clk(struct rk322x_clk_priv *priv,
+				ulong clk_id, ulong hz)
+{
+	struct rk322x_cru *cru = priv->cru;
+	int src_clk_div;
+
+	/*
+	 * select gpll as pd_bus bus clock source and
+	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
+	 */
+	switch (clk_id) {
+	case ACLK_CPU:
+		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+		assert(src_clk_div - 1 < 31);
+		rk_clrsetreg(&cru->cru_clksel_con[0],
+			     BUS_ACLK_PLL_SEL_MASK | BUS_ACLK_DIV_MASK,
+			     BUS_ACLK_PLL_SEL_GPLL << BUS_ACLK_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << BUS_ACLK_DIV_SHIFT);
+		break;
+	case HCLK_CPU:
+		src_clk_div = DIV_ROUND_UP(rk322x_bus_get_clk(priv,
+							      ACLK_CPU),
+					   hz);
+		assert(src_clk_div - 1 < 3);
+		rk_clrsetreg(&cru->cru_clksel_con[1],
+			     BUS_HCLK_DIV_MASK,
+			     (src_clk_div - 1) << BUS_HCLK_DIV_SHIFT);
+		break;
+	case PCLK_CPU:
+		src_clk_div = DIV_ROUND_UP(rk322x_bus_get_clk(priv,
+							      ACLK_CPU),
+					   hz);
+		assert(src_clk_div - 1 < 7);
+		rk_clrsetreg(&cru->cru_clksel_con[1],
+			     BUS_PCLK_DIV_MASK,
+			     (src_clk_div - 1) << BUS_PCLK_DIV_SHIFT);
+		break;
+	default:
+		printf("do not support this bus freq\n");
 		return -EINVAL;
 	}
 
-	return rockchip_mmc_get_clk(cru, clk_general_rate, periph);
+	return rk322x_bus_get_clk(priv, clk_id);
 }
 
-static int rk322x_ddr_set_clk(struct rk322x_cru *cru, unsigned int set_rate)
+static ulong rk322x_peri_get_clk(struct rk322x_clk_priv *priv, ulong clk_id)
 {
-	struct pll_div dpll_cfg;
+	struct rk322x_cru *cru = priv->cru;
+	u32 div, con, parent;
 
-	/*  clk_ddrc == DPLL = 24MHz / refdiv * fbdiv / postdiv1 / postdiv2 */
-	switch (set_rate) {
-	case 400*MHz:
-		dpll_cfg = (struct pll_div)
-		{.refdiv = 1, .fbdiv = 50, .postdiv1 = 3, .postdiv2 = 1};
+	switch (clk_id) {
+	case ACLK_PERI:
+		con = readl(&cru->cru_clksel_con[10]);
+		div = (con & PERI_ACLK_DIV_MASK) >> PERI_ACLK_DIV_SHIFT;
+		parent = priv->gpll_hz;
 		break;
-	case 600*MHz:
-		dpll_cfg = (struct pll_div)
-		{.refdiv = 1, .fbdiv = 75, .postdiv1 = 3, .postdiv2 = 1};
+	case HCLK_PERI:
+		con = readl(&cru->cru_clksel_con[10]);
+		div = (con & PERI_HCLK_DIV_MASK) >> PERI_HCLK_DIV_SHIFT;
+		parent = rk322x_peri_get_clk(priv, ACLK_PERI);
 		break;
-	case 800*MHz:
-		dpll_cfg = (struct pll_div)
-		{.refdiv = 1, .fbdiv = 100, .postdiv1 = 3, .postdiv2 = 1};
+	case PCLK_PERI:
+		con = readl(&cru->cru_clksel_con[10]);
+		div = (con & PERI_PCLK_DIV_MASK) >> PERI_PCLK_DIV_SHIFT;
+		parent = rk322x_peri_get_clk(priv, ACLK_PERI);
 		break;
+	default:
+		return -ENOENT;
 	}
 
-	/* pll enter slow-mode */
-	rk_clrsetreg(&cru->cru_mode_con, DPLL_MODE_MASK,
-		     DPLL_MODE_SLOW << DPLL_MODE_SHIFT);
-	rkclk_set_pll(cru, CLK_DDR, &dpll_cfg);
-	/* PLL enter normal-mode */
-	rk_clrsetreg(&cru->cru_mode_con, DPLL_MODE_MASK,
-		     DPLL_MODE_NORM << DPLL_MODE_SHIFT);
+	return DIV_TO_RATE(parent, div);
+}
 
-	return set_rate;
+static ulong rk322x_peri_set_clk(struct rk322x_clk_priv *priv,
+				 ulong clk_id, ulong hz)
+{
+	struct rk322x_cru *cru = priv->cru;
+	int src_clk_div;
+
+	/*
+	 * select gpll as pd_bus bus clock source and
+	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
+	 */
+	switch (clk_id) {
+	case ACLK_PERI:
+		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+		assert(src_clk_div - 1 < 31);
+		rk_clrsetreg(&cru->cru_clksel_con[10],
+			     PERI_PLL_SEL_MASK | PERI_ACLK_DIV_MASK,
+			     PERI_PLL_GPLL << PERI_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << PERI_ACLK_DIV_SHIFT);
+		break;
+	case HCLK_PERI:
+		src_clk_div = DIV_ROUND_UP(rk322x_peri_get_clk(priv,
+							       ACLK_PERI),
+					   hz);
+		assert(src_clk_div - 1 < 3);
+		rk_clrsetreg(&cru->cru_clksel_con[10],
+			     PERI_HCLK_DIV_MASK,
+			     (src_clk_div - 1) << PERI_HCLK_DIV_SHIFT);
+		break;
+	case PCLK_PERI:
+		src_clk_div = DIV_ROUND_UP(rk322x_peri_get_clk(priv,
+							       ACLK_PERI),
+					   hz);
+		assert(src_clk_div - 1 < 7);
+		rk_clrsetreg(&cru->cru_clksel_con[10],
+			     PERI_PCLK_DIV_MASK,
+			     (src_clk_div - 1) << PERI_PCLK_DIV_SHIFT);
+		break;
+	default:
+		printf("do not support this bus freq\n");
+		return -EINVAL;
+	}
+
+	return rk322x_peri_get_clk(priv, clk_id);
 }
 
-static ulong rk322x_get_bus_aclk(struct rk322x_cru *cru, ulong gclk_rate)
+#ifndef CONFIG_SPL_BUILD
+static ulong rk322x_vop_get_clk(struct rk322x_clk_priv *priv, ulong clk_id)
 {
-	u32 con;
-	u32 aclk_div;
+	struct rk322x_cru *cru = priv->cru;
+	u32 div, con, sel, parent;
 
-	con = readl(&cru->cru_clksel_con[0]);
-	aclk_div = ((con & BUS_ACLK_DIV_MASK) >> BUS_ACLK_DIV_SHIFT) + 1;
+	switch (clk_id) {
+	case ACLK_VOP:
+		con = readl(&cru->cru_clksel_con[33]);
+		div = (con & ACLK_VOP_DIV_CON_MASK) >> ACLK_VOP_DIV_CON_SHIFT;
+		parent = priv->gpll_hz;
+		break;
+	case DCLK_VOP:
+		con = readl(&cru->cru_clksel_con[27]);
+		con = (con & DCLK_LCDC_SEL_MASK) >> DCLK_LCDC_SEL_SHIFT;
+		if (con) {
+			sel = readl(&cru->cru_clksel_con[27]);
+			sel = (sel & DCLK_LCDC_PLL_SEL_MASK) >>
+				 DCLK_LCDC_PLL_SEL_SHIFT;
+			if (sel)
+				parent = priv->cpll_hz;
+			else
+				parent = priv->gpll_hz;
+
+			con = readl(&cru->cru_clksel_con[27]);
+			div = (con & DCLK_LCDC_DIV_CON_MASK) >>
+			      DCLK_LCDC_DIV_CON_SHIFT;
+		} else {
+			parent = priv->cpll_hz;
+			div = 1;
+		}
+		break;
+	default:
+		return -ENOENT;
+	}
 
-	return gclk_rate / aclk_div;
+	return DIV_TO_RATE(parent, div);
 }
 
-static ulong rk322x_get_bus_pclk(struct rk322x_cru *cru, ulong gclk_rate)
+static ulong rk322x_vop_set_clk(struct rk322x_clk_priv *priv,
+				ulong clk_id, uint hz)
 {
-	u32 con;
-	u32 pclk_div;
+	struct rk322x_cru *cru = priv->cru;
+	int src_clk_div;
+	u32 con, parent;
+
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+	assert(src_clk_div - 1 < 31);
 
-	con = readl(&cru->cru_clksel_con[1]);
-	pclk_div = ((con & BUS_PCLK_DIV_MASK) >> BUS_PCLK_DIV_SHIFT) + 1;
+	switch (clk_id) {
+	case ACLK_VOP:
+		rk_clrsetreg(&cru->cru_clksel_con[33],
+			     ACLK_VOP_PLL_SEL_MASK | ACLK_VOP_DIV_CON_MASK,
+			     ACLK_VOP_PLL_SEL_GPLL << ACLK_VOP_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << ACLK_VOP_DIV_CON_SHIFT);
+		break;
+	case DCLK_VOP:
+		con = readl(&cru->cru_clksel_con[27]);
+		con = (con & DCLK_LCDC_SEL_MASK) >> DCLK_LCDC_SEL_SHIFT;
+		if (con) {
+			parent = readl(&cru->cru_clksel_con[27]);
+			parent = (parent & DCLK_LCDC_PLL_SEL_MASK) >>
+				 DCLK_LCDC_PLL_SEL_SHIFT;
+			if (parent)
+				src_clk_div = DIV_ROUND_UP(priv->cpll_hz, hz);
+			else
+				src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+
+			rk_clrsetreg(&cru->cru_clksel_con[27],
+				     DCLK_LCDC_DIV_CON_MASK,
+				     (src_clk_div - 1) <<
+				     DCLK_LCDC_DIV_CON_SHIFT);
+		}
+		break;
+	default:
+		printf("do not support this vop freq\n");
+		return -EINVAL;
+	}
 
-	return rk322x_get_bus_aclk(cru, gclk_rate) / pclk_div;
+	return rk322x_vop_get_clk(priv, clk_id);
 }
+#endif
 
 static ulong rk322x_clk_get_rate(struct clk *clk)
 {
 	struct rk322x_clk_priv *priv = dev_get_priv(clk->dev);
-	ulong rate, gclk_rate;
+	ulong rate;
 
-	gclk_rate = rkclk_pll_get_rate(priv->cru, CLK_GENERAL);
 	switch (clk->id) {
-	case 0 ... 63:
-		rate = rkclk_pll_get_rate(priv->cru, clk->id);
+	case PLL_APLL:
+	case PLL_DPLL:
+	case PLL_CPLL:
+	case PLL_GPLL:
+		rate = rockchip_pll_get_rate(&rk322x_pll_clks[clk->id - 1],
+					     priv->cru, clk->id - 1);
+		break;
+	case ARMCLK:
+		rate = rockchip_pll_get_rate(&rk322x_pll_clks[APLL],
+					     priv->cru, APLL);
 		break;
 	case HCLK_EMMC:
 	case SCLK_EMMC:
+	case SCLK_EMMC_SAMPLE:
 	case HCLK_SDMMC:
 	case SCLK_SDMMC:
-		rate = rockchip_mmc_get_clk(priv->cru, gclk_rate, clk->id);
+	case SCLK_SDMMC_SAMPLE:
+	case SCLK_SDIO:
+	case SCLK_SDIO_SAMPLE:
+		rate = rk322x_mmc_get_clk(priv, clk->id);
 		break;
-	case PCLK_GPIO0 ... PCLK_TIMER:
-		rate = rk322x_get_bus_pclk(priv->cru, gclk_rate);
+	case ACLK_CPU:
+	case HCLK_CPU:
+	case PCLK_CPU:
+	case PCLK_I2C0:
+	case PCLK_I2C1:
+	case PCLK_I2C2:
+	case PCLK_I2C3:
+	case PCLK_PWM:
+		rate = rk322x_bus_get_clk(priv, clk->id);
 		break;
+	case ACLK_PERI:
+	case HCLK_PERI:
+	case PCLK_PERI:
+		rate = rk322x_peri_get_clk(priv, clk->id);
+		break;
+#ifndef CONFIG_SPL_BUILD
+	case DCLK_VOP:
+	case ACLK_VOP:
+		rate = rk322x_vop_get_clk(priv, clk->id);
+		break;
+#endif
 	default:
 		return -ENOENT;
 	}
@@ -399,32 +559,68 @@ static ulong rk322x_clk_get_rate(struct clk *clk)
 static ulong rk322x_clk_set_rate(struct clk *clk, ulong rate)
 {
 	struct rk322x_clk_priv *priv = dev_get_priv(clk->dev);
-	ulong new_rate, gclk_rate;
+	ulong ret;
 
-	gclk_rate = rkclk_pll_get_rate(priv->cru, CLK_GENERAL);
 	switch (clk->id) {
+	case PLL_APLL:
+	case PLL_DPLL:
+		ret = rockchip_pll_set_rate(&rk322x_pll_clks[clk->id - 1],
+					    priv->cru, clk->id - 1, rate);
+		break;
+	case PLL_CPLL:
+		ret = rockchip_pll_set_rate(&rk322x_pll_clks[CPLL],
+					    priv->cru, CPLL, rate);
+		priv->cpll_hz = rate;
+		break;
+	case PLL_GPLL:
+		ret = rockchip_pll_set_rate(&rk322x_pll_clks[GPLL],
+					    priv->cru, GPLL, rate);
+		priv->gpll_hz = rate;
+		break;
+	case ARMCLK:
+		ret = rk322x_armclk_set_clk(priv, rate);
+		break;
 	case HCLK_EMMC:
 	case SCLK_EMMC:
+	case SCLK_EMMC_SAMPLE:
 	case HCLK_SDMMC:
 	case SCLK_SDMMC:
-		new_rate = rockchip_mmc_set_clk(priv->cru, gclk_rate,
-						clk->id, rate);
+	case SCLK_SDMMC_SAMPLE:
+	case SCLK_SDIO:
+	case SCLK_SDIO_SAMPLE:
+		ret = rk322x_mmc_set_clk(priv, clk->id, rate);
+		break;
+	case SCLK_DDRC:
+		ret = rockchip_pll_set_rate(&rk322x_pll_clks[DPLL],
+					    priv->cru, DPLL, rate);
+		break;
+	case ACLK_CPU:
+	case HCLK_CPU:
+	case PCLK_CPU:
+		ret = rk322x_bus_set_clk(priv, clk->id, rate);
 		break;
-	case CLK_DDR:
-		new_rate = rk322x_ddr_set_clk(priv->cru, rate);
+	case ACLK_PERI:
+	case HCLK_PERI:
+	case PCLK_PERI:
+		ret = rk322x_peri_set_clk(priv, clk->id, rate);
 		break;
+#ifndef CONFIG_SPL_BUILD
 	case SCLK_MAC:
-		new_rate = rk322x_mac_set_clk(priv->cru, rate);
+		ret = rk322x_mac_set_clk(priv, rate);
 		break;
-	case PLL_GPLL:
-		return 0;
+	case DCLK_VOP:
+	case ACLK_VOP:
+		ret = rk322x_vop_set_clk(priv, clk->id, rate);
+		break;
+#endif
 	default:
 		return -ENOENT;
 	}
 
-	return new_rate;
+	return ret;
 }
 
+#ifndef CONFIG_SPL_BUILD
 static int rk322x_gmac_set_parent(struct clk *clk, struct clk *parent)
 {
 	struct rk322x_clk_priv *priv = dev_get_priv(clk->dev);
@@ -478,23 +674,183 @@ static int rk322x_gmac_extclk_set_parent(struct clk *clk, struct clk *parent)
 	return -EINVAL;
 }
 
+static int rk322x_lcdc_set_parent(struct clk *clk, struct clk *parent)
+{
+	struct rk322x_clk_priv *priv = dev_get_priv(clk->dev);
+
+	if (parent->id == HDMIPHY)
+		rk_clrsetreg(&priv->cru->cru_clksel_con[27],
+			     DCLK_LCDC_SEL_MASK,
+			     DCLK_LCDC_SEL_HDMIPHY << DCLK_LCDC_SEL_SHIFT);
+	else if (parent->id == PLL_CPLL)
+		rk_clrsetreg(&priv->cru->cru_clksel_con[27],
+			     DCLK_LCDC_SEL_MASK | DCLK_LCDC_PLL_SEL_MASK,
+			     (DCLK_LCDC_SEL_PLL << DCLK_LCDC_SEL_SHIFT) |
+			     (DCLK_LCDC_PLL_SEL_CPLL <<
+			     DCLK_LCDC_PLL_SEL_SHIFT));
+	else
+		rk_clrsetreg(&priv->cru->cru_clksel_con[27],
+			     DCLK_LCDC_SEL_MASK | DCLK_LCDC_PLL_SEL_MASK,
+			     (DCLK_LCDC_SEL_PLL << DCLK_LCDC_SEL_SHIFT) |
+			     (DCLK_LCDC_PLL_SEL_GPLL <<
+			     DCLK_LCDC_PLL_SEL_SHIFT));
+
+	return 0;
+}
+#endif
+
 static int rk322x_clk_set_parent(struct clk *clk, struct clk *parent)
 {
 	switch (clk->id) {
+#ifndef CONFIG_SPL_BUILD
 	case SCLK_MAC:
 		return rk322x_gmac_set_parent(clk, parent);
 	case SCLK_MAC_EXTCLK:
 		return rk322x_gmac_extclk_set_parent(clk, parent);
+	case DCLK_VOP:
+		return rk322x_lcdc_set_parent(clk, parent);
+#endif
 	}
 
 	debug("%s: unsupported clk %ld\n", __func__, clk->id);
 	return -ENOENT;
 }
 
+#define ROCKCHIP_MMC_DELAY_SEL		BIT(10)
+#define ROCKCHIP_MMC_DEGREE_MASK	0x3
+#define ROCKCHIP_MMC_DELAYNUM_OFFSET	2
+#define ROCKCHIP_MMC_DELAYNUM_MASK	(0xff << ROCKCHIP_MMC_DELAYNUM_OFFSET)
+
+#define PSECS_PER_SEC 1000000000000LL
+/*
+ * Each fine delay is between 44ps-77ps. Assume each fine delay is 60ps to
+ * simplify calculations. So 45degs could be anywhere between 33deg and 57.8deg.
+ */
+#define ROCKCHIP_MMC_DELAY_ELEMENT_PSEC 60
+
+int rk322x_mmc_get_phase(struct clk *clk)
+{
+	struct rk322x_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk322x_cru *cru = priv->cru;
+	u32 raw_value, delay_num;
+	u16 degrees = 0;
+	ulong rate;
+
+	rate = rk322x_clk_get_rate(clk);
+
+	if (rate < 0)
+		return rate;
+
+	if (clk->id == SCLK_EMMC_SAMPLE)
+		raw_value = readl(&cru->cru_emmc_con[1]);
+	else if (clk->id == SCLK_SDMMC_SAMPLE)
+		raw_value = readl(&cru->cru_sdmmc_con[1]);
+	else
+		raw_value = readl(&cru->cru_sdio_con[1]);
+
+	raw_value >>= 1;
+	degrees = (raw_value & ROCKCHIP_MMC_DEGREE_MASK) * 90;
+
+	if (raw_value & ROCKCHIP_MMC_DELAY_SEL) {
+		/* degrees/delaynum * 10000 */
+		unsigned long factor = (ROCKCHIP_MMC_DELAY_ELEMENT_PSEC / 10) *
+					36 * (rate / 1000000);
+
+		delay_num = (raw_value & ROCKCHIP_MMC_DELAYNUM_MASK);
+		delay_num >>= ROCKCHIP_MMC_DELAYNUM_OFFSET;
+		degrees += DIV_ROUND_CLOSEST(delay_num * factor, 10000);
+	}
+
+	return degrees % 360;
+}
+
+int rk322x_mmc_set_phase(struct clk *clk, u32 degrees)
+{
+	struct rk322x_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk322x_cru *cru = priv->cru;
+	u8 nineties, remainder, delay_num;
+	u32 raw_value, delay;
+	ulong rate;
+
+	rate = rk322x_clk_get_rate(clk);
+
+	if (rate < 0)
+		return rate;
+
+	nineties = degrees / 90;
+	remainder = (degrees % 90);
+
+	/*
+	 * Convert to delay; do a little extra work to make sure we
+	 * don't overflow 32-bit / 64-bit numbers.
+	 */
+	delay = 10000000; /* PSECS_PER_SEC / 10000 / 10 */
+	delay *= remainder;
+	delay = DIV_ROUND_CLOSEST(delay, (rate / 1000) * 36 *
+				(ROCKCHIP_MMC_DELAY_ELEMENT_PSEC / 10));
+
+	delay_num = (u8)min_t(u32, delay, 255);
+
+	raw_value = delay_num ? ROCKCHIP_MMC_DELAY_SEL : 0;
+	raw_value |= delay_num << ROCKCHIP_MMC_DELAYNUM_OFFSET;
+	raw_value |= nineties;
+
+	raw_value <<= 1;
+	if (clk->id == SCLK_EMMC_SAMPLE)
+		writel(raw_value | 0xffff0000, &cru->cru_emmc_con[1]);
+	else if (clk->id == SCLK_SDMMC_SAMPLE)
+		writel(raw_value | 0xffff0000, &cru->cru_sdmmc_con[1]);
+	else
+		writel(raw_value | 0xffff0000, &cru->cru_sdio_con[1]);
+
+	debug("mmc set_phase(%d) delay_nums=%u reg=%#x actual_degrees=%d\n",
+	      degrees, delay_num, raw_value, rk322x_mmc_get_phase(clk));
+
+	return 0;
+}
+
+static int rk322x_clk_get_phase(struct clk *clk)
+{
+	int ret;
+
+	debug("%s %ld\n", __func__, clk->id);
+	switch (clk->id) {
+	case SCLK_EMMC_SAMPLE:
+	case SCLK_SDMMC_SAMPLE:
+	case SCLK_SDIO_SAMPLE:
+		ret = rk322x_mmc_get_phase(clk);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+}
+
+static int rk322x_clk_set_phase(struct clk *clk, int degrees)
+{
+	int ret;
+
+	debug("%s %ld\n", __func__, clk->id);
+	switch (clk->id) {
+	case SCLK_EMMC_SAMPLE:
+	case SCLK_SDMMC_SAMPLE:
+	case SCLK_SDIO_SAMPLE:
+		ret = rk322x_mmc_set_phase(clk, degrees);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+}
+
 static struct clk_ops rk322x_clk_ops = {
 	.get_rate	= rk322x_clk_get_rate,
 	.set_rate	= rk322x_clk_set_rate,
 	.set_parent	= rk322x_clk_set_parent,
+	.get_phase	= rk322x_clk_get_phase,
+	.set_phase	= rk322x_clk_set_phase,
 };
 
 static int rk322x_clk_ofdata_to_platdata(struct udevice *dev)
@@ -506,11 +862,71 @@ static int rk322x_clk_ofdata_to_platdata(struct udevice *dev)
 	return 0;
 }
 
+static void rkclk_init(struct rk322x_clk_priv *priv)
+{
+	struct rk322x_cru *cru = priv->cru;
+
+	if (rockchip_pll_get_rate(&rk322x_pll_clks[APLL],
+				  priv->cru, APLL) != APLL_HZ)
+		rk322x_armclk_set_clk(priv, APLL_HZ);
+
+	priv->gpll_hz = rockchip_pll_get_rate(&rk322x_pll_clks[GPLL],
+					      priv->cru, GPLL);
+	priv->cpll_hz = rockchip_pll_get_rate(&rk322x_pll_clks[CPLL],
+					      priv->cru, CPLL);
+
+	/* before set pll set child div first */
+	rk322x_bus_set_clk(priv, ACLK_CPU, ACLK_BUS_HZ / 4);
+	rk322x_peri_set_clk(priv, ACLK_PERI, ACLK_PERI_HZ / 4);
+	rk322x_mmc_set_clk(priv, SCLK_EMMC, 50000000);
+	rk322x_mmc_set_clk(priv, SCLK_SDMMC, 50000000);
+	rk322x_mmc_set_clk(priv, SCLK_SDIO, 50000000);
+	rk_clrsetreg(&cru->cru_clksel_con[2], (0x1 << 14) |
+		     (0x1f << 8), (1 << 14) | (0xb << 8));
+	rk_clrsetreg(&cru->cru_clksel_con[23], (0x1f << 0) | (0x1f << 8),
+		     (0x1f << 0) | (5 << 8));
+	rk_clrsetreg(&cru->cru_clksel_con[33],
+		     ACLK_VOP_PLL_SEL_MASK | ACLK_VOP_DIV_CON_MASK,
+		     ACLK_VOP_PLL_SEL_GPLL << ACLK_VOP_PLL_SEL_SHIFT |
+		     3 << ACLK_VOP_DIV_CON_SHIFT);
+	rk_clrsetreg(&cru->cru_clksel_con[22], 0x1f << 0, 5 << 0);
+	rk_clrsetreg(&cru->cru_clksel_con[24], 0x1f << 0, 0xb << 0);
+	rk_clrsetreg(&cru->cru_clksel_con[28], (0x1f << 8) | (0x1f << 0),
+		     (5 << 8) | (5 << 0));
+	rk_clrsetreg(&cru->cru_clksel_con[31], (0x1f << 8) | (0x1f << 0),
+		     (5 << 8) | (5 << 0));
+	rk_clrsetreg(&cru->cru_clksel_con[32], 0x1f << 0, 5 << 0);
+	rk_clrsetreg(&cru->cru_clksel_con[33], (0x1f << 8) | (0x1f << 0),
+		     (5 << 8) | (5 << 0));
+	rk_clrsetreg(&cru->cru_clksel_con[34], (0x1f << 8) | (0x1f << 0),
+		     (5 << 8) | (3 << 0));
+
+	rockchip_pll_set_rate(&rk322x_pll_clks[GPLL],
+			      priv->cru, GPLL, GPLL_HZ);
+	priv->gpll_hz = GPLL_HZ;
+
+	rockchip_pll_set_rate(&rk322x_pll_clks[CPLL],
+			      priv->cru, CPLL, CPLL_HZ);
+	priv->cpll_hz = CPLL_HZ;
+
+	rk322x_bus_set_clk(priv, ACLK_CPU, ACLK_BUS_HZ);
+	rk322x_bus_set_clk(priv, HCLK_CPU, ACLK_BUS_HZ / 2);
+	rk322x_bus_set_clk(priv, PCLK_CPU, ACLK_BUS_HZ / 2);
+	rk322x_peri_set_clk(priv, ACLK_PERI, ACLK_PERI_HZ);
+	rk322x_peri_set_clk(priv, HCLK_PERI, ACLK_PERI_HZ / 2);
+	rk322x_peri_set_clk(priv, PCLK_PERI, ACLK_PERI_HZ / 2);
+	/*rk322x_mmc_set_clk(priv, SCLK_EMMC, rate);*/
+
+	/* set usbphy and hdmiphy from phy */
+	rk_clrsetreg(&cru->cru_misc_con, (0x1 << 13) |
+		     (0x1 << 15), (0 << 15) | (0 << 13));
+}
+
 static int rk322x_clk_probe(struct udevice *dev)
 {
 	struct rk322x_clk_priv *priv = dev_get_priv(dev);
 
-	rkclk_init(priv->cru);
+	rkclk_init(priv);
 
 	return 0;
 }
@@ -566,3 +982,62 @@ U_BOOT_DRIVER(rockchip_rk322x_cru) = {
 	.bind		= rk322x_clk_bind,
 	.probe		= rk322x_clk_probe,
 };
+
+#ifndef CONFIG_SPL_BUILD
+/**
+ * soc_clk_dump() - Print clock frequencies
+ * Returns zero on success
+ *
+ * Implementation for the clk dump command.
+ */
+int soc_clk_dump(void)
+{
+	struct udevice *cru_dev;
+	const struct rk322x_clk_info *clk_dump;
+	struct clk clk;
+	unsigned long clk_count = ARRAY_SIZE(clks_dump);
+	unsigned long rate;
+	int i, ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_CLK,
+					  DM_GET_DRIVER(rockchip_rk322x_cru),
+					  &cru_dev);
+	if (ret) {
+		printf("%s failed to get cru device\n", __func__);
+		return ret;
+	}
+
+	printf("CLK:");
+	for (i = 0; i < clk_count; i++) {
+		clk_dump = &clks_dump[i];
+		if (clk_dump->name) {
+			clk.id = clk_dump->id;
+			if (clk_dump->is_cru)
+				ret = clk_request(cru_dev, &clk);
+			if (ret < 0)
+				return ret;
+
+			rate = clk_get_rate(&clk);
+			clk_free(&clk);
+			if (i == 0) {
+				if (rate < 0)
+					printf("%10s%20s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("%10s%20lu Hz\n", clk_dump->name,
+					       rate);
+			} else {
+				if (rate < 0)
+					printf("%14s%20s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("%14s%20lu Hz\n", clk_dump->name,
+					       rate);
+			}
+		}
+	}
+
+	return 0;
+}
+#endif
+
diff --git a/include/dt-bindings/clock/rk3228-cru.h b/include/dt-bindings/clock/rk3228-cru.h
index 1aa9e7c720..9e5e7273e5 100644
--- a/include/dt-bindings/clock/rk3228-cru.h
+++ b/include/dt-bindings/clock/rk3228-cru.h
@@ -40,6 +40,7 @@
 #define SCLK_EMMC_DRV		117
 #define SCLK_SDMMC_SAMPLE	118
 #define SCLK_SDIO_SAMPLE	119
+#define SCLK_SDIO_SRC		120
 #define SCLK_EMMC_SAMPLE	121
 #define SCLK_VOP		122
 #define SCLK_HDMI_HDCP		123
@@ -52,22 +53,52 @@
 #define SCLK_MAC_TX		130
 #define SCLK_MAC_PHY		131
 #define SCLK_MAC_OUT		132
+#define SCLK_VDEC_CABAC		133
+#define SCLK_VDEC_CORE		134
+#define SCLK_RGA		135
+#define SCLK_HDCP		136
+#define SCLK_HDMI_CEC		137
+#define SCLK_CRYPTO		138
+#define SCLK_TSP		139
+#define SCLK_HSADC		140
+#define SCLK_WIFI		141
+#define SCLK_OTGPHY0		142
+#define SCLK_OTGPHY1		143
+#define SCLK_DDRC		144
 
 /* dclk gates */
 #define DCLK_VOP		190
 #define DCLK_HDMI_PHY		191
+#define HDMIPHY			192
 
 /* aclk gates */
 #define ACLK_DMAC		194
+#define ACLK_CPU		195
+#define ACLK_VPU_PRE		196
+#define ACLK_RKVDEC_PRE		197
+#define ACLK_RGA_PRE		198
+#define ACLK_IEP_PRE		199
+#define ACLK_HDCP_PRE		200
+#define ACLK_VOP_PRE		201
+#define ACLK_VPU		202
+#define ACLK_RKVDEC		203
+#define ACLK_IEP		204
+#define ACLK_RGA		205
+#define ACLK_HDCP		206
 #define ACLK_PERI		210
 #define ACLK_VOP		211
 #define ACLK_GMAC		212
+#define ACLK_GPU		213
 
 /* pclk gates */
 #define PCLK_GPIO0		320
 #define PCLK_GPIO1		321
 #define PCLK_GPIO2		322
 #define PCLK_GPIO3		323
+#define PCLK_VIO_H2P		324
+#define PCLK_HDCP		325
+#define PCLK_EFUSE_1024		326
+#define PCLK_EFUSE_256		327
 #define PCLK_GRF		329
 #define PCLK_I2C0		332
 #define PCLK_I2C1		333
@@ -80,10 +111,12 @@
 #define PCLK_TSADC		344
 #define PCLK_PWM		350
 #define PCLK_TIMER		353
+#define PCLK_CPU		354
 #define PCLK_PERI		363
 #define PCLK_HDMI_CTRL		364
 #define PCLK_HDMI_PHY		365
 #define PCLK_GMAC		367
+#define PCLK_ACODECPHY		368
 
 /* hclk gates */
 #define HCLK_I2S0_8CH		442
@@ -95,12 +128,28 @@
 #define HCLK_SDMMC		456
 #define HCLK_SDIO		457
 #define HCLK_EMMC		459
+#define HCLK_CPU		460
+#define HCLK_VPU_PRE		461
+#define HCLK_RKVDEC_PRE		462
+#define HCLK_VIO_PRE		463
+#define HCLK_VPU		464
+#define HCLK_RKVDEC		465
+#define HCLK_VIO		466
+#define HCLK_RGA		467
+#define HCLK_IEP		468
+#define HCLK_VIO_H2P		469
+#define HCLK_HDCP_MMU		470
+#define HCLK_HOST0		471
+#define HCLK_HOST1		472
+#define HCLK_HOST2		473
+#define HCLK_OTG		474
+#define HCLK_TSP		475
+#define HCLK_M_CRYPTO		476
+#define HCLK_S_CRYPTO		477
 #define HCLK_PERI		478
 
 #define CLK_NR_CLKS		(HCLK_PERI + 1)
 
-#define PCLK_EFUSE_256		327
-
 /* soft-reset indices */
 #define SRST_CORE0_PO		0
 #define SRST_CORE1_PO		1

commit 0b7db90f1974a2549dfa101a2b5e6b41a411bb27
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Fri Jul 20 15:13:56 2018 +0800

    rockchip: clk: rk3328: support more clks to set and get rate
    
    Change-Id: Ic231b7701c6eb23b0e9db21c1d28fb4d08c4debf
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3328.h b/arch/arm/include/asm/arch-rockchip/cru_rk3328.h
index 948706e9a3..2608bba3c5 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3328.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3328.h
@@ -12,6 +12,8 @@
 struct rk3328_clk_priv {
 	struct rk3328_cru *cru;
 	ulong rate;
+	ulong cpll_hz;
+	ulong gpll_hz;
 };
 
 struct rk3328_cru {
@@ -45,26 +47,179 @@ struct rk3328_cru {
 	u32 sdmmc_ext_con[2];
 };
 check_member(rk3328_cru, sdmmc_ext_con[1], 0x39c);
-#define MHz		1000000
-#define KHz		1000
-#define OSC_HZ		(24 * MHz)
-#define APLL_HZ		(600 * MHz)
-#define GPLL_HZ		(576 * MHz)
-#define CPLL_HZ		(594 * MHz)
-
-#define CLK_CORE_HZ	(600 * MHz)
-#define ACLKM_CORE_HZ	(300 * MHz)
-#define PCLK_DBG_HZ	(300 * MHz)
-
-#define PERIHP_ACLK_HZ	(144000 * KHz)
-#define PERIHP_HCLK_HZ	(72000 * KHz)
-#define PERIHP_PCLK_HZ	(72000 * KHz)
-
-#define PWM_CLOCK_HZ    (74 * MHz)
-
-enum apll_frequencies {
-	APLL_816_MHZ,
-	APLL_600_MHZ,
+
+/* PX30 pll id */
+enum rk3328_pll_id {
+	APLL,
+	DPLL,
+	CPLL,
+	GPLL,
+	NPLL,
+	PLL_COUNT,
+};
+
+struct rk3328_clk_info {
+	unsigned long id;
+	char *name;
+	bool is_cru;
+};
+
+#define MHz				1000 * 1000
+#define OSC_HZ				(24 * MHz)
+#define APLL_HZ				(600 * MHz)
+#define GPLL_HZ				491520000
+#define CPLL_HZ				(1200 * MHz)
+#define ACLK_BUS_HZ			(150 * MHz)
+#define ACLK_PERI_HZ			(150 * MHz)
+#define PWM_CLOCK_HZ			(74 * MHz)
+
+#define RK3328_PLL_CON(x)		((x) * 0x4)
+#define RK3328_CLKSEL_CON(x)		((x) * 0x4 + 0x100)
+#define RK3328_CLKGATE_CON(x)		((x) * 0x4 + 0x200)
+#define RK3328_MODE_CON			0x80
+
+enum {
+	/* CLKSEL_CON0 */
+	CLK_BUS_PLL_SEL_CPLL		= 0,
+	CLK_BUS_PLL_SEL_GPLL		= 1,
+	CLK_BUS_PLL_SEL_SHIFT		= 13,
+	CLK_BUS_PLL_SEL_MASK		= 3 << CLK_BUS_PLL_SEL_SHIFT,
+	ACLK_BUS_DIV_CON_SHIFT		= 8,
+	ACLK_BUS_DIV_CON_MASK		= 0x1f << ACLK_BUS_DIV_CON_SHIFT,
+	CORE_CLK_PLL_SEL_SHIFT		= 6,
+	CORE_CLK_PLL_SEL_MASK		= 3 << CORE_CLK_PLL_SEL_SHIFT,
+	CORE_CLK_PLL_SEL_APLL		= 0,
+	CORE_CLK_PLL_SEL_GPLL,
+	CORE_CLK_PLL_SEL_NPLL		= 3,
+	CORE_DIV_CON_SHIFT		= 0,
+	CORE_DIV_CON_MASK		= 0x1f << CORE_DIV_CON_SHIFT,
+
+	/* CLKSEL_CON1 */
+	PCLK_BUS_DIV_CON_SHIFT		= 12,
+	PCLK_BUS_DIV_CON_MASK		= 0x7 << PCLK_BUS_DIV_CON_SHIFT,
+	HCLK_BUS_DIV_CON_SHIFT		= 8,
+	HCLK_BUS_DIV_CON_MASK		= 0x3 << HCLK_BUS_DIV_CON_SHIFT,
+	CORE_ACLK_DIV_SHIFT		= 4,
+	CORE_ACLK_DIV_MASK		= 0x07 << CORE_ACLK_DIV_SHIFT,
+	CORE_DBG_DIV_SHIFT		= 0,
+	CORE_DBG_DIV_MASK		= 0x0f << CORE_DBG_DIV_SHIFT,
+
+	/* CLKSEL_CON27 */
+	GMAC2IO_PLL_SEL_SHIFT		= 7,
+	GMAC2IO_PLL_SEL_MASK		= 1 << GMAC2IO_PLL_SEL_SHIFT,
+	GMAC2IO_PLL_SEL_CPLL		= 0,
+	GMAC2IO_PLL_SEL_GPLL		= 1,
+	GMAC2IO_CLK_DIV_MASK		= 0x1f,
+	GMAC2IO_CLK_DIV_SHIFT		= 0,
+
+	/* CLKSEL_CON28 */
+	CLK_PERI_PLL_SEL_CPLL		= 0,
+	CLK_PERI_PLL_SEL_GPLL,
+	CLK_PERI_PLL_SEL_HDMIPHY,
+	CLK_PERI_PLL_SEL_SHIFT		= 6,
+	CLK_PERI_PLL_SEL_MASK		= 3 << CLK_PERI_PLL_SEL_SHIFT,
+	ACLK_PERI_DIV_CON_SHIFT		= 0,
+	ACLK_PERI_DIV_CON_MASK		= 0x1f,
+
+	/* CLKSEL_CON29 */
+	PCLK_PERI_DIV_CON_SHIFT		= 4,
+	PCLK_PERI_DIV_CON_MASK		= 0x7 << PCLK_PERI_DIV_CON_SHIFT,
+	HCLK_PERI_DIV_CON_SHIFT		= 0,
+	HCLK_PERI_DIV_CON_MASK		= 3 << HCLK_PERI_DIV_CON_SHIFT,
+
+	/* CLKSEL_CON22 */
+	CLK_TSADC_DIV_CON_SHIFT		= 0,
+	CLK_TSADC_DIV_CON_MASK		= 0x3ff,
+
+	/* CLKSEL_CON23 */
+	CLK_SARADC_DIV_CON_SHIFT	= 0,
+	CLK_SARADC_DIV_CON_MASK		= GENMASK(9, 0),
+	CLK_SARADC_DIV_CON_WIDTH	= 10,
+
+	/* CLKSEL_CON24 */
+	CLK_PWM_PLL_SEL_CPLL		= 0,
+	CLK_PWM_PLL_SEL_GPLL,
+	CLK_PWM_PLL_SEL_SHIFT		= 15,
+	CLK_PWM_PLL_SEL_MASK		= 1 << CLK_PWM_PLL_SEL_SHIFT,
+	CLK_PWM_DIV_CON_SHIFT		= 8,
+	CLK_PWM_DIV_CON_MASK		= 0x7f << CLK_PWM_DIV_CON_SHIFT,
+
+	CLK_SPI_PLL_SEL_CPLL		= 0,
+	CLK_SPI_PLL_SEL_GPLL,
+	CLK_SPI_PLL_SEL_SHIFT		= 7,
+	CLK_SPI_PLL_SEL_MASK		= 1 << CLK_SPI_PLL_SEL_SHIFT,
+	CLK_SPI_DIV_CON_SHIFT		= 0,
+	CLK_SPI_DIV_CON_MASK		= 0x7f << CLK_SPI_DIV_CON_SHIFT,
+
+	/* CLKSEL_CON30 */
+	CLK_SDMMC_PLL_SEL_CPLL		= 0,
+	CLK_SDMMC_PLL_SEL_GPLL,
+	CLK_SDMMC_PLL_SEL_24M,
+	CLK_SDMMC_PLL_SEL_USBPHY,
+	CLK_SDMMC_PLL_SHIFT		= 8,
+	CLK_SDMMC_PLL_MASK		= 0x3 << CLK_SDMMC_PLL_SHIFT,
+	CLK_SDMMC_DIV_CON_SHIFT          = 0,
+	CLK_SDMMC_DIV_CON_MASK           = 0xff << CLK_SDMMC_DIV_CON_SHIFT,
+
+	/* CLKSEL_CON32 */
+	CLK_EMMC_PLL_SEL_CPLL		= 0,
+	CLK_EMMC_PLL_SEL_GPLL,
+	CLK_EMMC_PLL_SEL_24M,
+	CLK_EMMC_PLL_SEL_USBPHY,
+	CLK_EMMC_PLL_SHIFT		= 8,
+	CLK_EMMC_PLL_MASK		= 0x3 << CLK_EMMC_PLL_SHIFT,
+	CLK_EMMC_DIV_CON_SHIFT          = 0,
+	CLK_EMMC_DIV_CON_MASK           = 0xff << CLK_EMMC_DIV_CON_SHIFT,
+
+	/* CLKSEL_CON34 */
+	CLK_I2C_PLL_SEL_CPLL		= 0,
+	CLK_I2C_PLL_SEL_GPLL,
+	CLK_I2C_DIV_CON_MASK		= 0x7f,
+	CLK_I2C_PLL_SEL_MASK		= 1,
+	CLK_I2C1_PLL_SEL_SHIFT		= 15,
+	CLK_I2C1_DIV_CON_SHIFT		= 8,
+	CLK_I2C0_PLL_SEL_SHIFT		= 7,
+	CLK_I2C0_DIV_CON_SHIFT		= 0,
+
+	/* CLKSEL_CON35 */
+	CLK_I2C3_PLL_SEL_SHIFT		= 15,
+	CLK_I2C3_DIV_CON_SHIFT		= 8,
+	CLK_I2C2_PLL_SEL_SHIFT		= 7,
+	CLK_I2C2_DIV_CON_SHIFT		= 0,
+
+	/* CRU_CLK_SEL37_CON */
+	ACLK_VIO_PLL_SEL_CPLL		= 0,
+	ACLK_VIO_PLL_SEL_GPLL		= 1,
+	ACLK_VIO_PLL_SEL_HDMIPHY	= 2,
+	ACLK_VIO_PLL_SEL_USB480M	= 3,
+	ACLK_VIO_PLL_SEL_SHIFT		= 6,
+	ACLK_VIO_PLL_SEL_MASK		= 3 << ACLK_VIO_PLL_SEL_SHIFT,
+	ACLK_VIO_DIV_CON_SHIFT		= 0,
+	ACLK_VIO_DIV_CON_MASK		= 0x1f << ACLK_VIO_DIV_CON_SHIFT,
+	HCLK_VIO_DIV_CON_SHIFT		= 8,
+	HCLK_VIO_DIV_CON_MASK		= 0x1f << HCLK_VIO_DIV_CON_SHIFT,
+
+	/* CRU_CLK_SEL39_CON */
+	ACLK_VOP_PLL_SEL_CPLL		= 0,
+	ACLK_VOP_PLL_SEL_GPLL		= 1,
+	ACLK_VOP_PLL_SEL_HDMIPHY	= 2,
+	ACLK_VOP_PLL_SEL_USB480M	= 3,
+	ACLK_VOP_PLL_SEL_SHIFT		= 6,
+	ACLK_VOP_PLL_SEL_MASK		= 3 << ACLK_VOP_PLL_SEL_SHIFT,
+	ACLK_VOP_DIV_CON_SHIFT		= 0,
+	ACLK_VOP_DIV_CON_MASK		= 0x1f << ACLK_VOP_DIV_CON_SHIFT,
+
+	/* CRU_CLK_SEL40_CON */
+	DCLK_LCDC_PLL_SEL_GPLL		= 0,
+	DCLK_LCDC_PLL_SEL_CPLL		= 1,
+	DCLK_LCDC_PLL_SEL_SHIFT		= 0,
+	DCLK_LCDC_PLL_SEL_MASK		= 1 << DCLK_LCDC_PLL_SEL_SHIFT,
+	DCLK_LCDC_SEL_HDMIPHY		= 0,
+	DCLK_LCDC_SEL_PLL		= 1,
+	DCLK_LCDC_SEL_SHIFT		= 1,
+	DCLK_LCDC_SEL_MASK		= 1 << DCLK_LCDC_SEL_SHIFT,
+	DCLK_LCDC_DIV_CON_SHIFT		= 8,
+	DCLK_LCDC_DIV_CON_MASK		= 0xFf << DCLK_LCDC_DIV_CON_SHIFT,
 };
 
 #endif	/* __ASM_ARCH_CRU_RK3328_H_ */
diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c
index c0cfcf1f19..1df4312f7c 100644
--- a/drivers/clk/rockchip/clk_rk3328.c
+++ b/drivers/clk/rockchip/clk_rk3328.c
@@ -20,317 +20,153 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-struct pll_div {
-	u32 refdiv;
-	u32 fbdiv;
-	u32 postdiv1;
-	u32 postdiv2;
-	u32 frac;
-};
-
 #define RATE_TO_DIV(input_rate, output_rate) \
 	((input_rate) / (output_rate) - 1);
 #define DIV_TO_RATE(input_rate, div)    ((input_rate) / ((div) + 1))
 
-#define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\
-	.refdiv = _refdiv,\
-	.fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ),\
-	.postdiv1 = _postdiv1, .postdiv2 = _postdiv2};
+#ifndef CONFIG_SPL_BUILD
+#define RK3328_CLK_DUMP(_id, _name, _iscru)	\
+{						\
+	.id = _id,				\
+	.name = _name,				\
+	.is_cru = _iscru,			\
+}
+#endif
+
+static struct rockchip_pll_rate_table rk3328_pll_rates[] = {
+	/* _mhz, _refdiv, _fbdiv, _postdiv1, _postdiv2, _dsmpd, _frac */
+	RK3036_PLL_RATE(1200000000, 1, 50, 1, 1, 1, 0),
+#ifndef CONFIG_SPL_BUILD
+	RK3036_PLL_RATE(1188000000, 2, 99, 1, 1, 1, 0),
+	RK3036_PLL_RATE(1008000000, 1, 84, 2, 1, 1, 0),
+#endif
+	RK3036_PLL_RATE(816000000, 1, 68, 2, 1, 1, 0),
+	RK3036_PLL_RATE(800000000, 6, 400, 2, 1, 1, 0),
+	RK3036_PLL_RATE(600000000, 1, 75, 3, 1, 1, 0),
+#ifndef CONFIG_SPL_BUILD
+	RK3036_PLL_RATE(594000000, 2, 99, 2, 1, 1, 0),
+	RK3036_PLL_RATE(500000000, 6, 250, 2, 1, 1, 0),
+#endif
+	{ /* sentinel */ },
+};
 
-static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 1, 4, 1);
-static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 2, 2, 1);
+static struct rockchip_pll_rate_table rk3328_pll_frac_rates[] = {
+	/* _mhz, _refdiv, _fbdiv, _postdiv1, _postdiv2, _dsmpd, _frac */
+#ifndef CONFIG_SPL_BUILD
+	RK3036_PLL_RATE(1016064000, 3, 127, 1, 1, 0, 134217),
+	/* vco = 1016064000 */
+	RK3036_PLL_RATE(983040000, 24, 983, 1, 1, 0, 671088),
+	/* vco = 983040000 */
+#endif
+	RK3036_PLL_RATE(491520000, 24, 983, 2, 1, 0, 671088),
+	/* vco = 983040000 */
+#ifndef CONFIG_SPL_BUILD
+	RK3036_PLL_RATE(61440000, 6, 215, 7, 2, 0, 671088),
+	/* vco = 860156000 */
+	RK3036_PLL_RATE(56448000, 12, 451, 4, 4, 0, 9797894),
+	/* vco = 903168000 */
+	RK3036_PLL_RATE(40960000, 12, 409, 4, 5, 0, 10066329),
+	/* vco = 819200000 */
+#endif
+	{ /* sentinel */ },
+};
 
-static const struct pll_div apll_816_cfg = PLL_DIVISORS(816 * MHz, 1, 2, 1);
-static const struct pll_div apll_600_cfg = PLL_DIVISORS(600 * MHz, 1, 3, 1);
+#define RK3328_CPUCLK_RATE(_rate, _aclk_div, _pclk_div)		\
+{								\
+	.rate	= _rate##U,					\
+	.aclk_div = _aclk_div,					\
+	.pclk_div = _pclk_div,					\
+}
 
-static const struct pll_div *apll_cfgs[] = {
-	[APLL_816_MHZ] = &apll_816_cfg,
-	[APLL_600_MHZ] = &apll_600_cfg,
+static struct rockchip_cpu_rate_table rk3328_cpu_rates[] = {
+	RK3328_CPUCLK_RATE(1200000000, 1, 5),
+	RK3328_CPUCLK_RATE(1008000000, 1, 5),
+	RK3328_CPUCLK_RATE(816000000, 1, 3),
+	RK3328_CPUCLK_RATE(600000000, 1, 3),
 };
 
-enum {
-	/* PLL_CON0 */
-	PLL_POSTDIV1_SHIFT		= 12,
-	PLL_POSTDIV1_MASK		= 0x7 << PLL_POSTDIV1_SHIFT,
-	PLL_FBDIV_SHIFT			= 0,
-	PLL_FBDIV_MASK			= 0xfff,
-
-	/* PLL_CON1 */
-	PLL_DSMPD_SHIFT			= 12,
-	PLL_DSMPD_MASK			= 1 << PLL_DSMPD_SHIFT,
-	PLL_INTEGER_MODE		= 1,
-	PLL_LOCK_STATUS_SHIFT		= 10,
-	PLL_LOCK_STATUS_MASK		= 1 << PLL_LOCK_STATUS_SHIFT,
-	PLL_POSTDIV2_SHIFT		= 6,
-	PLL_POSTDIV2_MASK		= 0x7 << PLL_POSTDIV2_SHIFT,
-	PLL_REFDIV_SHIFT		= 0,
-	PLL_REFDIV_MASK			= 0x3f,
-
-	/* PLL_CON2 */
-	PLL_FRACDIV_SHIFT		= 0,
-	PLL_FRACDIV_MASK		= 0xffffff,
-
-	/* MODE_CON */
-	APLL_MODE_SHIFT			= 0,
-	NPLL_MODE_SHIFT			= 1,
-	DPLL_MODE_SHIFT			= 4,
-	CPLL_MODE_SHIFT			= 8,
-	GPLL_MODE_SHIFT			= 12,
-	PLL_MODE_SLOW			= 0,
-	PLL_MODE_NORM,
-
-	/* CLKSEL_CON0 */
-	CLK_CORE_PLL_SEL_APLL		= 0,
-	CLK_CORE_PLL_SEL_GPLL,
-	CLK_CORE_PLL_SEL_DPLL,
-	CLK_CORE_PLL_SEL_NPLL,
-	CLK_CORE_PLL_SEL_SHIFT		= 6,
-	CLK_CORE_PLL_SEL_MASK		= 3 << CLK_CORE_PLL_SEL_SHIFT,
-	CLK_CORE_DIV_SHIFT		= 0,
-	CLK_CORE_DIV_MASK		= 0x1f,
-
-	/* CLKSEL_CON1 */
-	ACLKM_CORE_DIV_SHIFT		= 4,
-	ACLKM_CORE_DIV_MASK		= 0x7 << ACLKM_CORE_DIV_SHIFT,
-	PCLK_DBG_DIV_SHIFT		= 0,
-	PCLK_DBG_DIV_MASK		= 0xF << PCLK_DBG_DIV_SHIFT,
-
-	/* CLKSEL_CON27 */
-	GMAC2IO_PLL_SEL_SHIFT		= 7,
-	GMAC2IO_PLL_SEL_MASK		= 1 << GMAC2IO_PLL_SEL_SHIFT,
-	GMAC2IO_PLL_SEL_CPLL		= 0,
-	GMAC2IO_PLL_SEL_GPLL		= 1,
-	GMAC2IO_CLK_DIV_MASK		= 0x1f,
-	GMAC2IO_CLK_DIV_SHIFT		= 0,
-
-	/* CLKSEL_CON28 */
-	ACLK_PERIHP_PLL_SEL_CPLL	= 0,
-	ACLK_PERIHP_PLL_SEL_GPLL,
-	ACLK_PERIHP_PLL_SEL_HDMIPHY,
-	ACLK_PERIHP_PLL_SEL_SHIFT	= 6,
-	ACLK_PERIHP_PLL_SEL_MASK	= 3 << ACLK_PERIHP_PLL_SEL_SHIFT,
-	ACLK_PERIHP_DIV_CON_SHIFT	= 0,
-	ACLK_PERIHP_DIV_CON_MASK	= 0x1f,
-
-	/* CLKSEL_CON29 */
-	PCLK_PERIHP_DIV_CON_SHIFT	= 4,
-	PCLK_PERIHP_DIV_CON_MASK	= 0x7 << PCLK_PERIHP_DIV_CON_SHIFT,
-	HCLK_PERIHP_DIV_CON_SHIFT	= 0,
-	HCLK_PERIHP_DIV_CON_MASK	= 3 << HCLK_PERIHP_DIV_CON_SHIFT,
-
-	/* CLKSEL_CON22 */
-	CLK_TSADC_DIV_CON_SHIFT		= 0,
-	CLK_TSADC_DIV_CON_MASK		= 0x3ff,
-
-	/* CLKSEL_CON23 */
-	CLK_SARADC_DIV_CON_SHIFT	= 0,
-	CLK_SARADC_DIV_CON_MASK		= GENMASK(9, 0),
-	CLK_SARADC_DIV_CON_WIDTH	= 10,
-
-	/* CLKSEL_CON24 */
-	CLK_PWM_PLL_SEL_CPLL		= 0,
-	CLK_PWM_PLL_SEL_GPLL,
-	CLK_PWM_PLL_SEL_SHIFT		= 15,
-	CLK_PWM_PLL_SEL_MASK		= 1 << CLK_PWM_PLL_SEL_SHIFT,
-	CLK_PWM_DIV_CON_SHIFT		= 8,
-	CLK_PWM_DIV_CON_MASK		= 0x7f << CLK_PWM_DIV_CON_SHIFT,
-
-	CLK_SPI_PLL_SEL_CPLL		= 0,
-	CLK_SPI_PLL_SEL_GPLL,
-	CLK_SPI_PLL_SEL_SHIFT		= 7,
-	CLK_SPI_PLL_SEL_MASK		= 1 << CLK_SPI_PLL_SEL_SHIFT,
-	CLK_SPI_DIV_CON_SHIFT		= 0,
-	CLK_SPI_DIV_CON_MASK		= 0x7f << CLK_SPI_DIV_CON_SHIFT,
-
-	/* CLKSEL_CON30 */
-	CLK_SDMMC_PLL_SEL_CPLL		= 0,
-	CLK_SDMMC_PLL_SEL_GPLL,
-	CLK_SDMMC_PLL_SEL_24M,
-	CLK_SDMMC_PLL_SEL_USBPHY,
-	CLK_SDMMC_PLL_SHIFT		= 8,
-	CLK_SDMMC_PLL_MASK		= 0x3 << CLK_SDMMC_PLL_SHIFT,
-	CLK_SDMMC_DIV_CON_SHIFT          = 0,
-	CLK_SDMMC_DIV_CON_MASK           = 0xff << CLK_SDMMC_DIV_CON_SHIFT,
-
-	/* CLKSEL_CON32 */
-	CLK_EMMC_PLL_SEL_CPLL		= 0,
-	CLK_EMMC_PLL_SEL_GPLL,
-	CLK_EMMC_PLL_SEL_24M,
-	CLK_EMMC_PLL_SEL_USBPHY,
-	CLK_EMMC_PLL_SHIFT		= 8,
-	CLK_EMMC_PLL_MASK		= 0x3 << CLK_EMMC_PLL_SHIFT,
-	CLK_EMMC_DIV_CON_SHIFT          = 0,
-	CLK_EMMC_DIV_CON_MASK           = 0xff << CLK_EMMC_DIV_CON_SHIFT,
-
-	/* CLKSEL_CON34 */
-	CLK_I2C_PLL_SEL_CPLL		= 0,
-	CLK_I2C_PLL_SEL_GPLL,
-	CLK_I2C_DIV_CON_MASK		= 0x7f,
-	CLK_I2C_PLL_SEL_MASK		= 1,
-	CLK_I2C1_PLL_SEL_SHIFT		= 15,
-	CLK_I2C1_DIV_CON_SHIFT		= 8,
-	CLK_I2C0_PLL_SEL_SHIFT		= 7,
-	CLK_I2C0_DIV_CON_SHIFT		= 0,
-
-	/* CLKSEL_CON35 */
-	CLK_I2C3_PLL_SEL_SHIFT		= 15,
-	CLK_I2C3_DIV_CON_SHIFT		= 8,
-	CLK_I2C2_PLL_SEL_SHIFT		= 7,
-	CLK_I2C2_DIV_CON_SHIFT		= 0,
+#ifndef CONFIG_SPL_BUILD
+static const struct rk3328_clk_info clks_dump[] = {
+	RK3328_CLK_DUMP(PLL_APLL, "apll", true),
+	RK3328_CLK_DUMP(PLL_DPLL, "dpll", true),
+	RK3328_CLK_DUMP(PLL_CPLL, "cpll", true),
+	RK3328_CLK_DUMP(PLL_GPLL, "gpll", true),
+	RK3328_CLK_DUMP(PLL_NPLL, "npll", true),
+	RK3328_CLK_DUMP(ARMCLK, "armclk", true),
+	RK3328_CLK_DUMP(ACLK_BUS_PRE, "aclk_bus", true),
+	RK3328_CLK_DUMP(HCLK_BUS_PRE, "hclk_bus", true),
+	RK3328_CLK_DUMP(PCLK_BUS_PRE, "pclk_bus", true),
+	RK3328_CLK_DUMP(ACLK_PERI_PRE, "aclk_peri", true),
+	RK3328_CLK_DUMP(HCLK_PERI, "hclk_peri", true),
+	RK3328_CLK_DUMP(PCLK_PERI, "pclk_peri", true),
+};
+#endif
+
+static struct rockchip_pll_clock rk3328_pll_clks[] = {
+	[APLL] = PLL(pll_rk3328, PLL_APLL, RK3328_PLL_CON(0),
+		     RK3328_MODE_CON, 0, 10, 0, rk3328_pll_frac_rates),
+	[DPLL] = PLL(pll_rk3328, PLL_DPLL, RK3328_PLL_CON(8),
+		     RK3328_MODE_CON, 4, 10, 0, NULL),
+	[CPLL] = PLL(pll_rk3328, PLL_CPLL, RK3328_PLL_CON(16),
+		    RK3328_MODE_CON, 8, 10, 0, rk3328_pll_rates),
+	[GPLL] = PLL(pll_rk3328, PLL_GPLL, RK3328_PLL_CON(24),
+		     RK3328_MODE_CON, 12, 10, 0, rk3328_pll_frac_rates),
+	[NPLL] = PLL(pll_rk3328, PLL_NPLL, RK3328_PLL_CON(40),
+		     RK3328_MODE_CON, 1, 10, 0, rk3328_pll_rates),
 };
 
-#define VCO_MAX_KHZ	(3200 * (MHz / KHz))
-#define VCO_MIN_KHZ	(800 * (MHz / KHz))
-#define OUTPUT_MAX_KHZ	(3200 * (MHz / KHz))
-#define OUTPUT_MIN_KHZ	(16 * (MHz / KHz))
-
-/*
- *  the div restructions of pll in integer mode, these are defined in
- *  * CRU_*PLL_CON0 or PMUCRU_*PLL_CON0
- */
-#define PLL_DIV_MIN	16
-#define PLL_DIV_MAX	3200
-
-/*
- * How to calculate the PLL(from TRM V0.3 Part 1 Page 63):
- * Formulas also embedded within the Fractional PLL Verilog model:
- * If DSMPD = 1 (DSM is disabled, "integer mode")
- * FOUTVCO = FREF / REFDIV * FBDIV
- * FOUTPOSTDIV = FOUTVCO / POSTDIV1 / POSTDIV2
- * Where:
- * FOUTVCO = Fractional PLL non-divided output frequency
- * FOUTPOSTDIV = Fractional PLL divided output frequency
- *               (output of second post divider)
- * FREF = Fractional PLL input reference frequency, (the OSC_HZ 24MHz input)
- * REFDIV = Fractional PLL input reference clock divider
- * FBDIV = Integer value programmed into feedback divide
- *
- */
-static void rkclk_set_pll(struct rk3328_cru *cru, enum rk_clk_id clk_id,
-			const struct pll_div *div)
+static ulong rk3328_armclk_set_clk(struct rk3328_clk_priv *priv, ulong hz)
 {
-	u32 *pll_con;
-	u32 mode_shift, mode_mask;
+	struct rk3328_cru *cru = priv->cru;
+	const struct rockchip_cpu_rate_table *rate;
+	ulong old_rate;
 
-	pll_con = NULL;
-	mode_shift = 0;
-	switch (clk_id) {
-	case CLK_ARM:
-		pll_con = cru->apll_con;
-		mode_shift = APLL_MODE_SHIFT;
-		break;
-	case CLK_DDR:
-		pll_con = cru->dpll_con;
-		mode_shift = DPLL_MODE_SHIFT;
-		break;
-	case CLK_CODEC:
-		pll_con = cru->cpll_con;
-		mode_shift = CPLL_MODE_SHIFT;
-		break;
-	case CLK_GENERAL:
-		pll_con = cru->gpll_con;
-		mode_shift = GPLL_MODE_SHIFT;
-		break;
-	case CLK_NEW:
-		pll_con = cru->npll_con;
-		mode_shift = NPLL_MODE_SHIFT;
-		break;
-	default:
-		break;
+	rate = rockchip_get_cpu_settings(rk3328_cpu_rates, hz);
+	if (!rate) {
+		printf("%s unsupport rate\n", __func__);
+		return -EINVAL;
 	}
-	mode_mask = 1 << mode_shift;
-
-	/* All 8 PLLs have same VCO and output frequency range restrictions. */
-	u32 vco_khz = OSC_HZ / 1000 * div->fbdiv / div->refdiv;
-	u32 output_khz = vco_khz / div->postdiv1 / div->postdiv2;
-
-	debug("PLL at %p: fbdiv=%d, refdiv=%d, postdiv1=%d, \
-	      postdiv2=%d, vco=%u khz, output=%u khz\n",
-	      pll_con, div->fbdiv, div->refdiv, div->postdiv1,
-	      div->postdiv2, vco_khz, output_khz);
-	assert(vco_khz >= VCO_MIN_KHZ && vco_khz <= VCO_MAX_KHZ &&
-	       output_khz >= OUTPUT_MIN_KHZ && output_khz <= OUTPUT_MAX_KHZ &&
-	       div->fbdiv >= PLL_DIV_MIN && div->fbdiv <= PLL_DIV_MAX);
 
 	/*
-	 * When power on or changing PLL setting,
-	 * we must force PLL into slow mode to ensure output stable clock.
+	 * select apll as cpu/core clock pll source and
+	 * set up dependent divisors for PERI and ACLK clocks.
+	 * core hz : apll = 1:1
 	 */
-	rk_clrsetreg(&cru->mode_con, mode_mask, PLL_MODE_SLOW << mode_shift);
-
-	/* use integer mode */
-	rk_clrsetreg(&pll_con[1], PLL_DSMPD_MASK,
-		     PLL_INTEGER_MODE << PLL_DSMPD_SHIFT);
-
-	rk_clrsetreg(&pll_con[0],
-		     PLL_FBDIV_MASK | PLL_POSTDIV1_MASK,
-		     (div->fbdiv << PLL_FBDIV_SHIFT) |
-		     (div->postdiv1 << PLL_POSTDIV1_SHIFT));
-	rk_clrsetreg(&pll_con[1],
-		     PLL_POSTDIV2_MASK | PLL_REFDIV_MASK,
-		     (div->postdiv2 << PLL_POSTDIV2_SHIFT) |
-		     (div->refdiv << PLL_REFDIV_SHIFT));
-
-	/* waiting for pll lock */
-	while (!(readl(&pll_con[1]) & (1 << PLL_LOCK_STATUS_SHIFT)))
-		udelay(1);
-
-	/* pll enter normal mode */
-	rk_clrsetreg(&cru->mode_con, mode_mask, PLL_MODE_NORM << mode_shift);
-}
-
-static void rkclk_init(struct rk3328_cru *cru)
-{
-	u32 aclk_div;
-	u32 hclk_div;
-	u32 pclk_div;
-
-	/* configure gpll cpll */
-	rkclk_set_pll(cru, CLK_GENERAL, &gpll_init_cfg);
-	rkclk_set_pll(cru, CLK_CODEC, &cpll_init_cfg);
-
-	/* configure perihp aclk, hclk, pclk */
-	aclk_div = GPLL_HZ / PERIHP_ACLK_HZ - 1;
-	hclk_div = PERIHP_ACLK_HZ / PERIHP_HCLK_HZ - 1;
-	pclk_div = PERIHP_ACLK_HZ / PERIHP_PCLK_HZ - 1;
-
-	rk_clrsetreg(&cru->clksel_con[28],
-		     ACLK_PERIHP_PLL_SEL_MASK | ACLK_PERIHP_DIV_CON_MASK,
-		     ACLK_PERIHP_PLL_SEL_GPLL << ACLK_PERIHP_PLL_SEL_SHIFT |
-		     aclk_div << ACLK_PERIHP_DIV_CON_SHIFT);
-	rk_clrsetreg(&cru->clksel_con[29],
-		     PCLK_PERIHP_DIV_CON_MASK | HCLK_PERIHP_DIV_CON_MASK,
-		     pclk_div << PCLK_PERIHP_DIV_CON_SHIFT |
-		     hclk_div << HCLK_PERIHP_DIV_CON_SHIFT);
-}
-
-void rk3328_configure_cpu(struct rk3328_cru *cru,
-			  enum apll_frequencies apll_freq)
-{
-	u32 clk_core_div;
-	u32 aclkm_div;
-	u32 pclk_dbg_div;
-
-	rkclk_set_pll(cru, CLK_ARM, apll_cfgs[apll_freq]);
-
-	clk_core_div = APLL_HZ / CLK_CORE_HZ - 1;
-	aclkm_div = APLL_HZ / ACLKM_CORE_HZ / (clk_core_div + 1) - 1;
-	pclk_dbg_div = APLL_HZ / PCLK_DBG_HZ / (clk_core_div + 1) - 1;
-
-	rk_clrsetreg(&cru->clksel_con[0],
-		     CLK_CORE_PLL_SEL_MASK | CLK_CORE_DIV_MASK,
-		     CLK_CORE_PLL_SEL_APLL << CLK_CORE_PLL_SEL_SHIFT |
-		     clk_core_div << CLK_CORE_DIV_SHIFT);
+	old_rate = rockchip_pll_get_rate(&rk3328_pll_clks[NPLL],
+					 priv->cru, NPLL);
+	if (old_rate > hz) {
+		if (rockchip_pll_set_rate(&rk3328_pll_clks[NPLL],
+					  priv->cru, NPLL, hz))
+			return -EINVAL;
+		rk_clrsetreg(&cru->clksel_con[0],
+			     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK,
+			     CORE_CLK_PLL_SEL_NPLL << CORE_CLK_PLL_SEL_SHIFT |
+			     0 << CORE_DIV_CON_SHIFT);
+		rk_clrsetreg(&cru->clksel_con[1],
+			     CORE_ACLK_DIV_MASK | CORE_DBG_DIV_MASK,
+			     rate->aclk_div << CORE_ACLK_DIV_SHIFT |
+			     rate->pclk_div << CORE_DBG_DIV_SHIFT);
+	} else if (old_rate < hz) {
+		rk_clrsetreg(&cru->clksel_con[1],
+			     CORE_ACLK_DIV_MASK | CORE_DBG_DIV_MASK,
+			     rate->aclk_div << CORE_ACLK_DIV_SHIFT |
+			     rate->pclk_div << CORE_DBG_DIV_SHIFT);
+		rk_clrsetreg(&cru->clksel_con[0],
+			     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK,
+			     CORE_CLK_PLL_SEL_NPLL << CORE_CLK_PLL_SEL_SHIFT |
+			     0 << CORE_DIV_CON_SHIFT);
+		if (rockchip_pll_set_rate(&rk3328_pll_clks[NPLL],
+					  priv->cru, NPLL, hz))
+			return -EINVAL;
+	}
 
-	rk_clrsetreg(&cru->clksel_con[1],
-		     PCLK_DBG_DIV_MASK | ACLKM_CORE_DIV_MASK,
-		     pclk_dbg_div << PCLK_DBG_DIV_SHIFT |
-		     aclkm_div << ACLKM_CORE_DIV_SHIFT);
+	return rockchip_pll_get_rate(&rk3328_pll_clks[NPLL], priv->cru, NPLL);
 }
 
-
-static ulong rk3328_i2c_get_clk(struct rk3328_cru *cru, ulong clk_id)
+#ifndef CONFIG_SPL_BUILD
+static ulong rk3328_i2c_get_clk(struct rk3328_clk_priv *priv, ulong clk_id)
 {
+	struct rk3328_cru *cru = priv->cru;
 	u32 div, con;
 
 	switch (clk_id) {
@@ -355,14 +191,16 @@ static ulong rk3328_i2c_get_clk(struct rk3328_cru *cru, ulong clk_id)
 		return -EINVAL;
 	}
 
-	return DIV_TO_RATE(GPLL_HZ, div);
+	return DIV_TO_RATE(priv->gpll_hz, div);
 }
 
-static ulong rk3328_i2c_set_clk(struct rk3328_cru *cru, ulong clk_id, uint hz)
+static ulong rk3328_i2c_set_clk(struct rk3328_clk_priv *priv,
+				ulong clk_id, uint hz)
 {
+	struct rk3328_cru *cru = priv->cru;
 	int src_clk_div;
 
-	src_clk_div = GPLL_HZ / hz;
+	src_clk_div = priv->gpll_hz / hz;
 	assert(src_clk_div - 1 < 127);
 
 	switch (clk_id) {
@@ -399,11 +237,12 @@ static ulong rk3328_i2c_set_clk(struct rk3328_cru *cru, ulong clk_id, uint hz)
 		return -EINVAL;
 	}
 
-	return DIV_TO_RATE(GPLL_HZ, src_clk_div);
+	return DIV_TO_RATE(priv->gpll_hz, src_clk_div);
 }
 
-static ulong rk3328_gmac2io_set_clk(struct rk3328_cru *cru, ulong rate)
+static ulong rk3328_gmac2io_set_clk(struct rk3328_clk_priv *priv, ulong rate)
 {
+	struct rk3328_cru *cru = priv->cru;
 	struct rk3328_grf_regs *grf;
 	ulong ret;
 
@@ -423,9 +262,9 @@ static ulong rk3328_gmac2io_set_clk(struct rk3328_cru *cru, ulong rate)
 		u8 div;
 
 		if ((con >> GMAC2IO_PLL_SEL_SHIFT) & GMAC2IO_PLL_SEL_GPLL)
-			pll_rate = GPLL_HZ;
+			pll_rate = priv->gpll_hz;
 		else
-			pll_rate = CPLL_HZ;
+			pll_rate = priv->cpll_hz;
 
 		div = DIV_ROUND_UP(pll_rate, rate) - 1;
 		if (div <= 0x1f)
@@ -439,9 +278,11 @@ static ulong rk3328_gmac2io_set_clk(struct rk3328_cru *cru, ulong rate)
 
 	return ret;
 }
+#endif
 
-static ulong rk3328_mmc_get_clk(struct rk3328_cru *cru, uint clk_id)
+static ulong rk3328_mmc_get_clk(struct rk3328_clk_priv *priv, uint clk_id)
 {
+	struct rk3328_cru *cru = priv->cru;
 	u32 div, con, con_id;
 
 	switch (clk_id) {
@@ -463,12 +304,13 @@ static ulong rk3328_mmc_get_clk(struct rk3328_cru *cru, uint clk_id)
 	    == CLK_EMMC_PLL_SEL_24M)
 		return DIV_TO_RATE(OSC_HZ, div) / 2;
 	else
-		return DIV_TO_RATE(GPLL_HZ, div) / 2;
+		return DIV_TO_RATE(priv->gpll_hz, div) / 2;
 }
 
-static ulong rk3328_mmc_set_clk(struct rk3328_cru *cru,
+static ulong rk3328_mmc_set_clk(struct rk3328_clk_priv *priv,
 				ulong clk_id, ulong set_rate)
 {
+	struct rk3328_cru *cru = priv->cru;
 	int src_clk_div;
 	u32 con_id;
 
@@ -486,7 +328,7 @@ static ulong rk3328_mmc_set_clk(struct rk3328_cru *cru,
 	}
 	/* Select clk_sdmmc/emmc source from GPLL by default */
 	/* mmc clock defaulg div 2 internal, need provide double in cru */
-	src_clk_div = DIV_ROUND_UP(GPLL_HZ / 2, set_rate);
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz / 2, set_rate);
 
 	if (src_clk_div > 127) {
 		/* use 24MHz source for 400KHz clock */
@@ -502,33 +344,37 @@ static ulong rk3328_mmc_set_clk(struct rk3328_cru *cru,
 			     (src_clk_div - 1) << CLK_EMMC_DIV_CON_SHIFT);
 	}
 
-	return rk3328_mmc_get_clk(cru, clk_id);
+	return rk3328_mmc_get_clk(priv, clk_id);
 }
 
-static ulong rk3328_pwm_get_clk(struct rk3328_cru *cru)
+#ifndef CONFIG_SPL_BUILD
+static ulong rk3328_pwm_get_clk(struct rk3328_clk_priv *priv)
 {
+	struct rk3328_cru *cru = priv->cru;
 	u32 div, con;
 
 	con = readl(&cru->clksel_con[24]);
 	div = (con & CLK_PWM_DIV_CON_MASK) >> CLK_PWM_DIV_CON_SHIFT;
 
-	return DIV_TO_RATE(GPLL_HZ, div);
+	return DIV_TO_RATE(priv->gpll_hz, div);
 }
 
-static ulong rk3328_pwm_set_clk(struct rk3328_cru *cru, uint hz)
+static ulong rk3328_pwm_set_clk(struct rk3328_clk_priv *priv, uint hz)
 {
-	u32 div = GPLL_HZ / hz;
+	struct rk3328_cru *cru = priv->cru;
+	u32 div = priv->gpll_hz / hz;
 
 	rk_clrsetreg(&cru->clksel_con[24],
 		     CLK_PWM_PLL_SEL_MASK | CLK_PWM_DIV_CON_MASK,
 		     CLK_PWM_PLL_SEL_GPLL << CLK_PWM_PLL_SEL_SHIFT |
 		     (div - 1) << CLK_PWM_DIV_CON_SHIFT);
 
-	return DIV_TO_RATE(GPLL_HZ, div);
+	return DIV_TO_RATE(priv->gpll_hz, div);
 }
 
-static ulong rk3328_saradc_get_clk(struct rk3328_cru *cru)
+static ulong rk3328_saradc_get_clk(struct rk3328_clk_priv *priv)
 {
+	struct rk3328_cru *cru = priv->cru;
 	u32 div, val;
 
 	val = readl(&cru->clksel_con[23]);
@@ -538,8 +384,9 @@ static ulong rk3328_saradc_get_clk(struct rk3328_cru *cru)
 	return DIV_TO_RATE(OSC_HZ, div);
 }
 
-static ulong rk3328_saradc_set_clk(struct rk3328_cru *cru, uint hz)
+static ulong rk3328_saradc_set_clk(struct rk3328_clk_priv *priv, uint hz)
 {
+	struct rk3328_cru *cru = priv->cru;
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1;
@@ -549,7 +396,238 @@ static ulong rk3328_saradc_set_clk(struct rk3328_cru *cru, uint hz)
 		     CLK_SARADC_DIV_CON_MASK,
 		     src_clk_div << CLK_SARADC_DIV_CON_SHIFT);
 
-	return rk3328_saradc_get_clk(cru);
+	return rk3328_saradc_get_clk(priv);
+}
+
+static ulong rk3328_vop_get_clk(struct rk3328_clk_priv *priv, ulong clk_id)
+{
+	struct rk3328_cru *cru = priv->cru;
+	u32 div, con, parent;
+
+	switch (clk_id) {
+	case ACLK_VOP_PRE:
+		con = readl(&cru->clksel_con[39]);
+		div = (con & ACLK_VOP_DIV_CON_MASK) >> ACLK_VOP_DIV_CON_SHIFT;
+		parent = priv->cpll_hz;
+		break;
+	case ACLK_VIO_PRE:
+		con = readl(&cru->clksel_con[37]);
+		div = (con & ACLK_VIO_DIV_CON_MASK) >> ACLK_VIO_DIV_CON_SHIFT;
+		parent = priv->cpll_hz;
+		break;
+	case HCLK_VIO_PRE:
+		parent = rk3328_vop_get_clk(priv, ACLK_VIO_PRE);
+		con = readl(&cru->clksel_con[37]);
+		div = (con & HCLK_VIO_DIV_CON_MASK) >> HCLK_VIO_DIV_CON_SHIFT;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rk3328_vop_set_clk(struct rk3328_clk_priv *priv,
+				ulong clk_id, uint hz)
+{
+	struct rk3328_cru *cru = priv->cru;
+	int src_clk_div;
+	u32 con, parent;
+
+	src_clk_div = DIV_ROUND_UP(priv->cpll_hz, hz);
+	assert(src_clk_div - 1 < 31);
+
+	switch (clk_id) {
+	case ACLK_VOP_PRE:
+		rk_clrsetreg(&cru->clksel_con[39],
+			     ACLK_VOP_PLL_SEL_MASK | ACLK_VOP_DIV_CON_MASK,
+			     ACLK_VOP_PLL_SEL_CPLL << ACLK_VOP_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << ACLK_VOP_DIV_CON_SHIFT);
+		break;
+	case ACLK_VIO_PRE:
+		rk_clrsetreg(&cru->clksel_con[37],
+			     ACLK_VIO_PLL_SEL_MASK | ACLK_VIO_DIV_CON_MASK,
+			     ACLK_VIO_PLL_SEL_CPLL << ACLK_VIO_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << ACLK_VIO_DIV_CON_SHIFT);
+		break;
+	case HCLK_VIO_PRE:
+		src_clk_div = DIV_ROUND_UP(rk3328_vop_get_clk(priv,
+							      ACLK_VIO_PRE),
+					   hz);
+		rk_clrsetreg(&cru->clksel_con[37],
+			     HCLK_VIO_DIV_CON_MASK,
+			     (src_clk_div - 1) << HCLK_VIO_DIV_CON_SHIFT);
+		break;
+	case DCLK_LCDC:
+		con = readl(&cru->clksel_con[40]);
+		con = (con & DCLK_LCDC_SEL_MASK) >> DCLK_LCDC_SEL_SHIFT;
+		if (con) {
+			parent = readl(&cru->clksel_con[40]);
+			parent = (parent & DCLK_LCDC_PLL_SEL_MASK) >>
+				 DCLK_LCDC_PLL_SEL_SHIFT;
+			if (parent)
+				src_clk_div = DIV_ROUND_UP(priv->cpll_hz, hz);
+			else
+				src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+
+			rk_clrsetreg(&cru->clksel_con[40],
+				     DCLK_LCDC_DIV_CON_MASK,
+				     (src_clk_div - 1) <<
+				     DCLK_LCDC_DIV_CON_SHIFT);
+		}
+		break;
+	default:
+		printf("do not support this vop freq\n");
+		return -EINVAL;
+	}
+
+	return rk3328_vop_get_clk(priv, clk_id);
+}
+#endif
+
+static ulong rk3328_bus_get_clk(struct rk3328_clk_priv *priv, ulong clk_id)
+{
+	struct rk3328_cru *cru = priv->cru;
+	u32 div, con, parent;
+
+	switch (clk_id) {
+	case ACLK_BUS_PRE:
+		con = readl(&cru->clksel_con[0]);
+		div = (con & ACLK_BUS_DIV_CON_MASK) >> ACLK_BUS_DIV_CON_SHIFT;
+		parent = priv->cpll_hz;
+		break;
+	case HCLK_BUS_PRE:
+		con = readl(&cru->clksel_con[1]);
+		div = (con & HCLK_BUS_DIV_CON_MASK) >> HCLK_BUS_DIV_CON_SHIFT;
+		parent = rk3328_bus_get_clk(priv, ACLK_BUS_PRE);
+		break;
+	case PCLK_BUS_PRE:
+		con = readl(&cru->clksel_con[1]);
+		div = (con & PCLK_BUS_DIV_CON_MASK) >> PCLK_BUS_DIV_CON_SHIFT;
+		parent = rk3328_bus_get_clk(priv, ACLK_BUS_PRE);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rk3328_bus_set_clk(struct rk3328_clk_priv *priv,
+				ulong clk_id, ulong hz)
+{
+	struct rk3328_cru *cru = priv->cru;
+	int src_clk_div;
+
+	/*
+	 * select gpll as pd_bus bus clock source and
+	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
+	 */
+	switch (clk_id) {
+	case ACLK_BUS_PRE:
+		src_clk_div = DIV_ROUND_UP(priv->cpll_hz, hz);
+		assert(src_clk_div - 1 < 31);
+		rk_clrsetreg(&cru->clksel_con[0],
+			     CLK_BUS_PLL_SEL_MASK | ACLK_BUS_DIV_CON_MASK,
+			     CLK_BUS_PLL_SEL_CPLL << CLK_BUS_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << ACLK_BUS_DIV_CON_SHIFT);
+		break;
+	case HCLK_BUS_PRE:
+		src_clk_div = DIV_ROUND_UP(rk3328_bus_get_clk(priv,
+							      ACLK_BUS_PRE),
+					   hz);
+		assert(src_clk_div - 1 < 3);
+		rk_clrsetreg(&cru->clksel_con[1],
+			     HCLK_BUS_DIV_CON_MASK,
+			     (src_clk_div - 1) << HCLK_BUS_DIV_CON_SHIFT);
+		break;
+	case PCLK_BUS_PRE:
+		src_clk_div = DIV_ROUND_UP(rk3328_bus_get_clk(priv,
+							      ACLK_BUS_PRE),
+					   hz);
+		assert(src_clk_div - 1 < 7);
+		rk_clrsetreg(&cru->clksel_con[1],
+			     PCLK_BUS_DIV_CON_MASK,
+			     (src_clk_div - 1) << PCLK_BUS_DIV_CON_SHIFT);
+		break;
+	default:
+		printf("do not support this bus freq\n");
+		return -EINVAL;
+	}
+	return rk3328_bus_get_clk(priv, clk_id);
+}
+
+static ulong rk3328_peri_get_clk(struct rk3328_clk_priv *priv, ulong clk_id)
+{
+	struct rk3328_cru *cru = priv->cru;
+	u32 div, con, parent;
+
+	switch (clk_id) {
+	case ACLK_PERI_PRE:
+		con = readl(&cru->clksel_con[28]);
+		div = (con & ACLK_PERI_DIV_CON_MASK) >> ACLK_PERI_DIV_CON_SHIFT;
+		parent = priv->cpll_hz;
+		break;
+	case HCLK_PERI:
+		con = readl(&cru->clksel_con[29]);
+		div = (con & HCLK_PERI_DIV_CON_MASK) >> HCLK_PERI_DIV_CON_SHIFT;
+		parent = rk3328_peri_get_clk(priv, ACLK_PERI_PRE);
+		break;
+	case PCLK_PERI:
+		con = readl(&cru->clksel_con[29]);
+		div = (con & PCLK_PERI_DIV_CON_MASK) >> PCLK_PERI_DIV_CON_SHIFT;
+		parent = rk3328_peri_get_clk(priv, ACLK_PERI_PRE);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rk3328_peri_set_clk(struct rk3328_clk_priv *priv,
+				 ulong clk_id, ulong hz)
+{
+	struct rk3328_cru *cru = priv->cru;
+	int src_clk_div;
+
+	/*
+	 * select gpll as pd_bus bus clock source and
+	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
+	 */
+	switch (clk_id) {
+	case ACLK_PERI_PRE:
+		src_clk_div = DIV_ROUND_UP(priv->cpll_hz, hz);
+		assert(src_clk_div - 1 < 31);
+		rk_clrsetreg(&cru->clksel_con[28],
+			     CLK_PERI_PLL_SEL_MASK | ACLK_PERI_DIV_CON_MASK,
+			     CLK_PERI_PLL_SEL_CPLL << CLK_PERI_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << ACLK_PERI_DIV_CON_SHIFT);
+		break;
+	case HCLK_PERI:
+		src_clk_div = DIV_ROUND_UP(rk3328_peri_get_clk(priv,
+							       ACLK_PERI_PRE),
+					   hz);
+		assert(src_clk_div - 1 < 3);
+		rk_clrsetreg(&cru->clksel_con[29],
+			     HCLK_PERI_DIV_CON_MASK,
+			     (src_clk_div - 1) << HCLK_PERI_DIV_CON_SHIFT);
+		break;
+	case PCLK_PERI:
+		src_clk_div = DIV_ROUND_UP(rk3328_peri_get_clk(priv,
+							       ACLK_PERI_PRE),
+					   hz);
+		assert(src_clk_div - 1 < 7);
+		rk_clrsetreg(&cru->clksel_con[29],
+			     PCLK_PERI_DIV_CON_MASK,
+			     (src_clk_div - 1) << PCLK_PERI_DIV_CON_SHIFT);
+		break;
+	default:
+		printf("do not support this bus freq\n");
+		return -EINVAL;
+	}
+
+	return rk3328_peri_get_clk(priv, clk_id);
 }
 
 static ulong rk3328_clk_get_rate(struct clk *clk)
@@ -557,27 +635,67 @@ static ulong rk3328_clk_get_rate(struct clk *clk)
 	struct rk3328_clk_priv *priv = dev_get_priv(clk->dev);
 	ulong rate = 0;
 
+#ifndef CONFIG_SPL_BUILD
+	if (!priv->gpll_hz) {
+		priv->gpll_hz = rockchip_pll_get_rate(&rk3328_pll_clks[GPLL],
+						      priv->cru, GPLL);
+		debug("%s gpll=%lu\n", __func__, priv->gpll_hz);
+	}
+	if (!priv->cpll_hz) {
+		priv->cpll_hz = rockchip_pll_get_rate(&rk3328_pll_clks[CPLL],
+						      priv->cru, CPLL);
+		debug("%s cpll=%lu\n", __func__, priv->cpll_hz);
+	}
+#endif
+
 	switch (clk->id) {
-	case 0 ... 29:
-		return 0;
+	case PLL_APLL:
+	case PLL_DPLL:
+	case PLL_CPLL:
+	case PLL_GPLL:
+	case PLL_NPLL:
+		rate = rockchip_pll_get_rate(&rk3328_pll_clks[clk->id - 1],
+					     priv->cru, clk->id - 1);
+		break;
+	case ARMCLK:
+		rate = rockchip_pll_get_rate(&rk3328_pll_clks[NPLL],
+					     priv->cru, NPLL);
+		break;
+	case ACLK_BUS_PRE:
+	case HCLK_BUS_PRE:
+	case PCLK_BUS_PRE:
+		rate = rk3328_bus_get_clk(priv, clk->id);
+		break;
+	case ACLK_PERI_PRE:
+	case HCLK_PERI:
+	case PCLK_PERI:
+		rate = rk3328_peri_get_clk(priv, clk->id);
+		break;
 	case HCLK_SDMMC:
 	case HCLK_EMMC:
 	case SCLK_SDMMC:
 	case SCLK_EMMC:
-		rate = rk3328_mmc_get_clk(priv->cru, clk->id);
+		rate = rk3328_mmc_get_clk(priv, clk->id);
 		break;
+#ifndef CONFIG_SPL_BUILD
 	case SCLK_I2C0:
 	case SCLK_I2C1:
 	case SCLK_I2C2:
 	case SCLK_I2C3:
-		rate = rk3328_i2c_get_clk(priv->cru, clk->id);
+		rate = rk3328_i2c_get_clk(priv, clk->id);
 		break;
 	case SCLK_PWM:
-		rate = rk3328_pwm_get_clk(priv->cru);
+		rate = rk3328_pwm_get_clk(priv);
 		break;
 	case SCLK_SARADC:
-		rate = rk3328_saradc_get_clk(priv->cru);
+		rate = rk3328_saradc_get_clk(priv);
+		break;
+	case ACLK_VOP_PRE:
+	case ACLK_VIO_PRE:
+	case HCLK_VIO_PRE:
+		rate = rk3328_vop_get_clk(priv, clk->id);
 		break;
+#endif
 	default:
 		return -ENOENT;
 	}
@@ -591,30 +709,64 @@ static ulong rk3328_clk_set_rate(struct clk *clk, ulong rate)
 	ulong ret = 0;
 
 	switch (clk->id) {
-	case 0 ... 29:
-		return 0;
+	case PLL_APLL:
+	case PLL_DPLL:
+	case PLL_NPLL:
+		ret = rockchip_pll_set_rate(&rk3328_pll_clks[clk->id - 1],
+					    priv->cru, clk->id - 1, rate);
+		break;
+	case PLL_CPLL:
+		ret = rockchip_pll_set_rate(&rk3328_pll_clks[CPLL],
+					    priv->cru, CPLL, rate);
+		priv->cpll_hz = rate;
+		break;
+	case PLL_GPLL:
+		ret = rockchip_pll_set_rate(&rk3328_pll_clks[GPLL],
+					    priv->cru, GPLL, rate);
+		priv->gpll_hz = rate;
+		break;
+	case ARMCLK:
+		ret = rk3328_armclk_set_clk(priv, rate);
+		break;
+	case ACLK_BUS_PRE:
+	case HCLK_BUS_PRE:
+	case PCLK_BUS_PRE:
+		rate = rk3328_bus_set_clk(priv, clk->id, rate);
+		break;
+	case ACLK_PERI_PRE:
+	case HCLK_PERI:
+	case PCLK_PERI:
+		rate = rk3328_peri_set_clk(priv, clk->id, rate);
+		break;
 	case HCLK_SDMMC:
 	case HCLK_EMMC:
 	case SCLK_SDMMC:
 	case SCLK_EMMC:
-		ret = rk3328_mmc_set_clk(priv->cru, clk->id, rate);
+		ret = rk3328_mmc_set_clk(priv, clk->id, rate);
 		break;
+#ifndef CONFIG_SPL_BUILD
 	case SCLK_I2C0:
 	case SCLK_I2C1:
 	case SCLK_I2C2:
 	case SCLK_I2C3:
-		ret = rk3328_i2c_set_clk(priv->cru, clk->id, rate);
+		ret = rk3328_i2c_set_clk(priv, clk->id, rate);
 		break;
 	case SCLK_MAC2IO:
-		ret = rk3328_gmac2io_set_clk(priv->cru, rate);
+		ret = rk3328_gmac2io_set_clk(priv, rate);
 		break;
 	case SCLK_PWM:
-		ret = rk3328_pwm_set_clk(priv->cru, rate);
+		ret = rk3328_pwm_set_clk(priv, rate);
 		break;
 	case SCLK_SARADC:
-		ret = rk3328_saradc_set_clk(priv->cru, rate);
+		ret = rk3328_saradc_set_clk(priv, rate);
 		break;
 	case DCLK_LCDC:
+	case ACLK_VOP_PRE:
+	case ACLK_VIO_PRE:
+	case HCLK_VIO_PRE:
+		rate = rk3328_vop_set_clk(priv, clk->id, rate);
+		break;
+#endif
 	case SCLK_PDM:
 	case SCLK_RTC32K:
 	case SCLK_UART0:
@@ -623,17 +775,8 @@ static ulong rk3328_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_SDIO:
 	case SCLK_TSP:
 	case SCLK_WIFI:
-	case ACLK_BUS_PRE:
-	case HCLK_BUS_PRE:
-	case PCLK_BUS_PRE:
-	case ACLK_PERI_PRE:
-	case HCLK_PERI:
-	case PCLK_PERI:
-	case ACLK_VIO_PRE:
-	case HCLK_VIO_PRE:
 	case ACLK_RGA_PRE:
 	case SCLK_RGA:
-	case ACLK_VOP_PRE:
 	case ACLK_RKVDEC_PRE:
 	case ACLK_RKVENC:
 	case ACLK_VPU_PRE:
@@ -654,6 +797,7 @@ static ulong rk3328_clk_set_rate(struct clk *clk, ulong rate)
 	return ret;
 }
 
+#ifndef CONFIG_SPL_BUILD
 static int rk3328_gmac2io_set_parent(struct clk *clk, struct clk *parent)
 {
 	struct rk3328_grf_regs *grf;
@@ -728,14 +872,42 @@ static int rk3328_gmac2io_ext_set_parent(struct clk *clk, struct clk *parent)
 	return -EINVAL;
 }
 
+static int rk3328_lcdc_set_parent(struct clk *clk, struct clk *parent)
+{
+	struct rk3328_clk_priv *priv = dev_get_priv(clk->dev);
+
+	if (parent->id == HDMIPHY)
+		rk_clrsetreg(&priv->cru->clksel_con[40],
+			     DCLK_LCDC_SEL_MASK,
+			     DCLK_LCDC_SEL_HDMIPHY << DCLK_LCDC_SEL_SHIFT);
+	else if (parent->id == PLL_CPLL)
+		rk_clrsetreg(&priv->cru->clksel_con[40],
+			     DCLK_LCDC_SEL_MASK | DCLK_LCDC_PLL_SEL_MASK,
+			     (DCLK_LCDC_SEL_PLL << DCLK_LCDC_SEL_SHIFT) |
+			     (DCLK_LCDC_PLL_SEL_CPLL <<
+			     DCLK_LCDC_PLL_SEL_SHIFT));
+	else
+		rk_clrsetreg(&priv->cru->clksel_con[40],
+			     DCLK_LCDC_SEL_MASK | DCLK_LCDC_PLL_SEL_MASK,
+			     (DCLK_LCDC_SEL_PLL << DCLK_LCDC_SEL_SHIFT) |
+			     (DCLK_LCDC_PLL_SEL_GPLL <<
+			     DCLK_LCDC_PLL_SEL_SHIFT));
+
+	return 0;
+}
+#endif
+
 static int rk3328_clk_set_parent(struct clk *clk, struct clk *parent)
 {
 	switch (clk->id) {
+#ifndef CONFIG_SPL_BUILD
 	case SCLK_MAC2IO:
 		return rk3328_gmac2io_set_parent(clk, parent);
 	case SCLK_MAC2IO_EXT:
 		return rk3328_gmac2io_ext_set_parent(clk, parent);
 	case DCLK_LCDC:
+		return rk3328_lcdc_set_parent(clk, parent);
+#endif
 	case SCLK_PDM:
 	case SCLK_RTC32K:
 	case SCLK_UART0:
@@ -754,11 +926,38 @@ static struct clk_ops rk3328_clk_ops = {
 	.set_parent = rk3328_clk_set_parent,
 };
 
+static void rkclk_init(struct rk3328_clk_priv *priv)
+{
+	if (rockchip_pll_get_rate(&rk3328_pll_clks[NPLL],
+				  priv->cru, NPLL) != APLL_HZ)
+		rk3328_armclk_set_clk(priv, APLL_HZ);
+
+	rockchip_pll_set_rate(&rk3328_pll_clks[GPLL],
+			      priv->cru, GPLL, GPLL_HZ);
+	priv->gpll_hz = GPLL_HZ;
+
+	rockchip_pll_set_rate(&rk3328_pll_clks[CPLL],
+			      priv->cru, CPLL, CPLL_HZ);
+	priv->cpll_hz = CPLL_HZ;
+
+	rk3328_bus_set_clk(priv, ACLK_BUS_PRE, ACLK_BUS_HZ);
+	rk3328_bus_set_clk(priv, HCLK_BUS_PRE, ACLK_BUS_HZ / 2);
+	rk3328_bus_set_clk(priv, PCLK_BUS_PRE, ACLK_BUS_HZ / 2);
+	rk3328_peri_set_clk(priv, ACLK_PERI_PRE, ACLK_PERI_HZ);
+	rk3328_peri_set_clk(priv, HCLK_PERI, ACLK_PERI_HZ / 2);
+	rk3328_peri_set_clk(priv, PCLK_PERI, ACLK_PERI_HZ / 2);
+	/*rk3328_mmc_set_clk(priv, SCLK_EMMC, rate);*/
+
+	/* set usbphy and hdmiphy from phy */
+	rk_clrsetreg(&priv->cru->misc, (0x1 << 13) |
+		     (0x1 << 15), (0 << 15) | (0 << 13));
+}
+
 static int rk3328_clk_probe(struct udevice *dev)
 {
 	struct rk3328_clk_priv *priv = dev_get_priv(dev);
 
-	rkclk_init(priv->cru);
+	rkclk_init(priv);
 
 	return 0;
 }
@@ -823,3 +1022,61 @@ U_BOOT_DRIVER(rockchip_rk3328_cru) = {
 	.bind		= rk3328_clk_bind,
 	.probe		= rk3328_clk_probe,
 };
+
+#ifndef CONFIG_SPL_BUILD
+/**
+ * soc_clk_dump() - Print clock frequencies
+ * Returns zero on success
+ *
+ * Implementation for the clk dump command.
+ */
+int soc_clk_dump(void)
+{
+	struct udevice *cru_dev;
+	const struct rk3328_clk_info *clk_dump;
+	struct clk clk;
+	unsigned long clk_count = ARRAY_SIZE(clks_dump);
+	unsigned long rate;
+	int i, ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_CLK,
+					  DM_GET_DRIVER(rockchip_rk3328_cru),
+					  &cru_dev);
+	if (ret) {
+		printf("%s failed to get cru device\n", __func__);
+		return ret;
+	}
+
+	printf("CLK:");
+	for (i = 0; i < clk_count; i++) {
+		clk_dump = &clks_dump[i];
+		if (clk_dump->name) {
+			clk.id = clk_dump->id;
+			if (clk_dump->is_cru)
+				ret = clk_request(cru_dev, &clk);
+			if (ret < 0)
+				return ret;
+
+			rate = clk_get_rate(&clk);
+			clk_free(&clk);
+			if (i == 0) {
+				if (rate < 0)
+					printf("%10s%20s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("%10s%20lu Hz\n", clk_dump->name,
+					       rate);
+			} else {
+				if (rate < 0)
+					printf("%14s%20s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("%14s%20lu Hz\n", clk_dump->name,
+					       rate);
+			}
+		}
+	}
+
+	return 0;
+}
+#endif
diff --git a/include/dt-bindings/clock/rk3328-cru.h b/include/dt-bindings/clock/rk3328-cru.h
index cdc0b338aa..9d56d93e32 100644
--- a/include/dt-bindings/clock/rk3328-cru.h
+++ b/include/dt-bindings/clock/rk3328-cru.h
@@ -91,119 +91,118 @@
 #define SCLK_MAC2IO_EXT		102
 
 /* dclk gates */
-#define DCLK_LCDC		180
-#define DCLK_HDMIPHY		181
-#define HDMIPHY			182
-#define USB480M			183
-#define DCLK_LCDC_SRC		184
+#define DCLK_LCDC		120
+#define DCLK_HDMIPHY		121
+#define HDMIPHY			122
+#define USB480M			123
+#define DCLK_LCDC_SRC		124
 
 /* aclk gates */
-#define ACLK_AXISRAM		190
-#define ACLK_VOP_PRE		191
-#define ACLK_USB3OTG		192
-#define ACLK_RGA_PRE		193
-#define ACLK_DMAC		194
-#define ACLK_GPU		195
-#define ACLK_BUS_PRE		196
-#define ACLK_PERI_PRE		197
-#define ACLK_RKVDEC_PRE		198
-#define ACLK_RKVDEC		199
-#define ACLK_RKVENC		200
-#define ACLK_VPU_PRE		201
-#define ACLK_VIO_PRE		202
-#define ACLK_VPU		203
-#define ACLK_VIO		204
-#define ACLK_VOP		205
-#define ACLK_GMAC		206
-#define ACLK_H265		207
-#define ACLK_H264		208
-#define ACLK_MAC2PHY		209
-#define ACLK_MAC2IO		210
-#define ACLK_DCF		211
-#define ACLK_TSP		212
-#define ACLK_PERI		213
-#define ACLK_RGA		214
-#define ACLK_IEP		215
-#define ACLK_CIF		216
-#define ACLK_HDCP		217
+#define ACLK_AXISRAM		130
+#define ACLK_VOP_PRE		131
+#define ACLK_USB3OTG		132
+#define ACLK_RGA_PRE		133
+#define ACLK_DMAC		134
+#define ACLK_GPU		135
+#define ACLK_BUS_PRE		136
+#define ACLK_PERI_PRE		137
+#define ACLK_RKVDEC_PRE		138
+#define ACLK_RKVDEC		139
+#define ACLK_RKVENC		140
+#define ACLK_VPU_PRE		141
+#define ACLK_VIO_PRE		142
+#define ACLK_VPU		143
+#define ACLK_VIO		144
+#define ACLK_VOP		145
+#define ACLK_GMAC		146
+#define ACLK_H265		147
+#define ACLK_H264		148
+#define ACLK_MAC2PHY		149
+#define ACLK_MAC2IO		150
+#define ACLK_DCF		151
+#define ACLK_TSP		152
+#define ACLK_PERI		153
+#define ACLK_RGA		154
+#define ACLK_IEP		155
+#define ACLK_CIF		156
+#define ACLK_HDCP		157
 
 /* pclk gates */
-#define PCLK_GPIO0		300
-#define PCLK_GPIO1		301
-#define PCLK_GPIO2		302
-#define PCLK_GPIO3		303
-#define PCLK_GRF		304
-#define PCLK_I2C0		305
-#define PCLK_I2C1		306
-#define PCLK_I2C2		307
-#define PCLK_I2C3		308
-#define PCLK_SPI		309
-#define PCLK_UART0		310
-#define PCLK_UART1		311
-#define PCLK_UART2		312
-#define PCLK_TSADC		313
-#define PCLK_PWM		314
-#define PCLK_TIMER		315
-#define PCLK_BUS_PRE		316
-#define PCLK_PERI_PRE		317
-#define PCLK_HDMI_CTRL		318
-#define PCLK_HDMI_PHY		319
-#define PCLK_GMAC		320
-#define PCLK_H265		321
-#define PCLK_MAC2PHY		322
-#define PCLK_MAC2IO		323
-#define PCLK_USB3PHY_OTG	324
-#define PCLK_USB3PHY_PIPE	325
-#define PCLK_USB3_GRF		326
-#define PCLK_USB2_GRF		327
-#define PCLK_HDMIPHY		328
-#define PCLK_DDR		329
-#define PCLK_PERI		330
-#define PCLK_HDMI		331
-#define PCLK_HDCP		332
-#define PCLK_DCF		333
-#define PCLK_SARADC		334
+#define PCLK_GPIO0		200
+#define PCLK_GPIO1		201
+#define PCLK_GPIO2		202
+#define PCLK_GPIO3		203
+#define PCLK_GRF		204
+#define PCLK_I2C0		205
+#define PCLK_I2C1		206
+#define PCLK_I2C2		207
+#define PCLK_I2C3		208
+#define PCLK_SPI		209
+#define PCLK_UART0		210
+#define PCLK_UART1		211
+#define PCLK_UART2		212
+#define PCLK_TSADC		213
+#define PCLK_PWM		214
+#define PCLK_TIMER		215
+#define PCLK_BUS_PRE		216
+#define PCLK_PERI_PRE		217
+#define PCLK_HDMI_CTRL		218
+#define PCLK_HDMI_PHY		219
+#define PCLK_GMAC		220
+#define PCLK_H265		221
+#define PCLK_MAC2PHY		222
+#define PCLK_MAC2IO		223
+#define PCLK_USB3PHY_OTG	224
+#define PCLK_USB3PHY_PIPE	225
+#define PCLK_USB3_GRF		226
+#define PCLK_USB2_GRF		227
+#define PCLK_HDMIPHY		228
+#define PCLK_DDR		229
+#define PCLK_PERI		230
+#define PCLK_HDMI		231
+#define PCLK_HDCP		232
+#define PCLK_DCF		233
+#define PCLK_SARADC		234
+#define PCLK_ACODEC		235
 
 /* hclk gates */
-#define HCLK_PERI		408
-#define HCLK_TSP		409
-#define HCLK_GMAC		410
-#define HCLK_I2S0_8CH		411
-#define HCLK_I2S1_8CH		413
-#define HCLK_I2S2_2CH		413
-#define HCLK_SPDIF_8CH		414
-#define HCLK_VOP		415
-#define HCLK_NANDC		416
-#define HCLK_SDMMC		417
-#define HCLK_SDIO		418
-#define HCLK_EMMC		419
-#define HCLK_SDMMC_EXT		420
-#define HCLK_RKVDEC_PRE		421
-#define HCLK_RKVDEC		422
-#define HCLK_RKVENC		423
-#define HCLK_VPU_PRE		424
-#define HCLK_VIO_PRE		425
-#define HCLK_VPU		426
-#define HCLK_VIO		427
-#define HCLK_BUS_PRE		428
-#define HCLK_PERI_PRE		429
-#define HCLK_H264		430
-#define HCLK_CIF		431
-#define HCLK_OTG_PMU		432
-#define HCLK_OTG		433
-#define HCLK_HOST0		434
-#define HCLK_HOST0_ARB		435
-#define HCLK_CRYPTO_MST		436
-#define HCLK_CRYPTO_SLV		437
-#define HCLK_PDM		438
-#define HCLK_IEP		439
-#define HCLK_RGA		440
-#define HCLK_HDCP		441
+#define HCLK_PERI		308
+#define HCLK_TSP		309
+#define HCLK_GMAC		310
+#define HCLK_I2S0_8CH		311
+#define HCLK_I2S1_8CH		312
+#define HCLK_I2S2_2CH		313
+#define HCLK_SPDIF_8CH		314
+#define HCLK_VOP		315
+#define HCLK_NANDC		316
+#define HCLK_SDMMC		317
+#define HCLK_SDIO		318
+#define HCLK_EMMC		319
+#define HCLK_SDMMC_EXT		320
+#define HCLK_RKVDEC_PRE		321
+#define HCLK_RKVDEC		322
+#define HCLK_RKVENC		323
+#define HCLK_VPU_PRE		324
+#define HCLK_VIO_PRE		325
+#define HCLK_VPU		326
+#define HCLK_VIO		327
+#define HCLK_BUS_PRE		328
+#define HCLK_PERI_PRE		329
+#define HCLK_H264		330
+#define HCLK_CIF		331
+#define HCLK_OTG_PMU		332
+#define HCLK_OTG		333
+#define HCLK_HOST0		334
+#define HCLK_HOST0_ARB		335
+#define HCLK_CRYPTO_MST		336
+#define HCLK_CRYPTO_SLV		337
+#define HCLK_PDM		338
+#define HCLK_IEP		339
+#define HCLK_RGA		340
+#define HCLK_HDCP		341
 
 #define CLK_NR_CLKS		(HCLK_HDCP + 1)
 
-#define CLKGRF_NR_CLKS		(SCLK_MAC2PHY + 1)
-
 /* soft-reset indices */
 #define SRST_CORE0_PO		0
 #define SRST_CORE1_PO		1

commit 2f0a72b1f21043d9f7ed7e506710073649872673
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Fri Jul 20 15:11:01 2018 +0800

    rockchip: clk: pll: add common pll setting funcs
    
    Change-Id: I99887338a4f84aead905938eee066b460c4c1b9f
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/clock.h b/arch/arm/include/asm/arch-rockchip/clock.h
index 783f6f29a1..8b002616ad 100644
--- a/arch/arm/include/asm/arch-rockchip/clock.h
+++ b/arch/arm/include/asm/arch-rockchip/clock.h
@@ -10,6 +10,7 @@
 /* define pll mode */
 #define RKCLK_PLL_MODE_SLOW		0
 #define RKCLK_PLL_MODE_NORMAL		1
+#define RKCLK_PLL_MODE_DEEP		2
 
 enum {
 	ROCKCHIP_SYSCON_NOC,
@@ -35,6 +36,81 @@ enum rk_clk_id {
 	CLK_COUNT,
 };
 
+#define PLL(_type, _id, _con, _mode, _mshift,			\
+		 _lshift, _pflags, _rtable)			\
+	{							\
+		.id		= _id,				\
+		.type		= _type,			\
+		.con_offset	= _con,				\
+		.mode_offset	= _mode,			\
+		.mode_shift	= _mshift,			\
+		.lock_shift	= _lshift,			\
+		.pll_flags	= _pflags,			\
+		.rate_table	= _rtable,			\
+	}
+
+#define RK3036_PLL_RATE(_rate, _refdiv, _fbdiv, _postdiv1,	\
+			_postdiv2, _dsmpd, _frac)		\
+{								\
+	.rate	= _rate##U,					\
+	.fbdiv = _fbdiv,					\
+	.postdiv1 = _postdiv1,					\
+	.refdiv = _refdiv,					\
+	.postdiv2 = _postdiv2,					\
+	.dsmpd = _dsmpd,					\
+	.frac = _frac,						\
+}
+
+struct rockchip_pll_rate_table {
+	unsigned long rate;
+	unsigned int nr;
+	unsigned int nf;
+	unsigned int no;
+	unsigned int nb;
+	/* for RK3036/RK3399 */
+	unsigned int fbdiv;
+	unsigned int postdiv1;
+	unsigned int refdiv;
+	unsigned int postdiv2;
+	unsigned int dsmpd;
+	unsigned int frac;
+};
+
+enum rockchip_pll_type {
+	pll_rk3036,
+	pll_rk3066,
+	pll_rk3328,
+	pll_rk3366,
+	pll_rk3399,
+};
+
+struct rockchip_pll_clock {
+	unsigned int			id;
+	unsigned int			con_offset;
+	unsigned int			mode_offset;
+	unsigned int			mode_shift;
+	unsigned int			lock_shift;
+	enum rockchip_pll_type		type;
+	unsigned int			pll_flags;
+	struct rockchip_pll_rate_table *rate_table;
+	unsigned int			mode_mask;
+};
+
+struct rockchip_cpu_rate_table {
+	unsigned long rate;
+	unsigned int aclk_div;
+	unsigned int pclk_div;
+};
+
+int rockchip_pll_set_rate(struct rockchip_pll_clock *pll,
+			  void __iomem *base, ulong clk_id,
+			  ulong drate);
+ulong rockchip_pll_get_rate(struct rockchip_pll_clock *pll,
+			    void __iomem *base, ulong clk_id);
+const struct rockchip_cpu_rate_table *
+rockchip_get_cpu_settings(struct rockchip_cpu_rate_table *cpu_table,
+			  ulong rate);
+
 static inline int rk_pll_id(enum rk_clk_id clk_id)
 {
 	return clk_id - 1;
diff --git a/drivers/clk/rockchip/Makefile b/drivers/clk/rockchip/Makefile
index 4091abc09b..f91a365523 100644
--- a/drivers/clk/rockchip/Makefile
+++ b/drivers/clk/rockchip/Makefile
@@ -4,7 +4,9 @@
 # SPDX-License-Identifier:      GPL-2.0+
 #
 
+obj-y += clk_pll.o
 obj-$(CONFIG_ROCKCHIP_PX30) += clk_px30.o
+#obj-y += clk_rk1808.o
 obj-$(CONFIG_ROCKCHIP_RK3036) += clk_rk3036.o
 obj-$(CONFIG_ROCKCHIP_RK3066) += clk_rk3066.o
 obj-$(CONFIG_ROCKCHIP_RK3128) += clk_rk3128.o
diff --git a/drivers/clk/rockchip/clk_pll.c b/drivers/clk/rockchip/clk_pll.c
new file mode 100644
index 0000000000..706b645623
--- /dev/null
+++ b/drivers/clk/rockchip/clk_pll.c
@@ -0,0 +1,364 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+ #include <common.h>
+#include <bitfield.h>
+#include <clk-uclass.h>
+#include <dm.h>
+#include <errno.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/hardware.h>
+#include <div64.h>
+
+static struct rockchip_pll_rate_table rockchip_auto_table;
+
+#define PLL_MODE_MASK				0x3
+#define PLL_RK3328_MODE_MASK			0x1
+
+#define RK3036_PLLCON0_FBDIV_MASK		0xfff
+#define RK3036_PLLCON0_FBDIV_SHIFT		0
+#define RK3036_PLLCON0_POSTDIV1_MASK		0x7 << 12
+#define RK3036_PLLCON0_POSTDIV1_SHIFT		12
+#define RK3036_PLLCON1_REFDIV_MASK		0x3f
+#define RK3036_PLLCON1_REFDIV_SHIFT		0
+#define RK3036_PLLCON1_POSTDIV2_MASK		0x7 << 6
+#define RK3036_PLLCON1_POSTDIV2_SHIFT		6
+#define RK3036_PLLCON1_DSMPD_MASK		0x1 << 12
+#define RK3036_PLLCON1_DSMPD_SHIFT		12
+#define RK3036_PLLCON2_FRAC_MASK		0xffffff
+#define RK3036_PLLCON2_FRAC_SHIFT		0
+#define RK3036_PLLCON1_PWRDOWN_SHIT		13
+
+#define MHZ		1000000
+#define KHZ		1000
+enum {
+	OSC_HZ			= 24 * 1000000,
+	VCO_MAX_HZ	= 3200U * 1000000,
+	VCO_MIN_HZ	= 800 * 1000000,
+	OUTPUT_MAX_HZ	= 3200U * 1000000,
+	OUTPUT_MIN_HZ	= 24 * 1000000,
+};
+
+#define MIN_FOUTVCO_FREQ	(800 * MHZ)
+#define MAX_FOUTVCO_FREQ	(2000 * MHZ)
+
+int gcd(int m, int n)
+{
+	int t;
+
+	while (m > 0) {
+		if (n > m) {
+			t = m;
+			m = n;
+			n = t;
+		} /* swap */
+		m -= n;
+	}
+	return n;
+}
+
+/*
+ * How to calculate the PLL(from TRM V0.3 Part 1 Page 63):
+ * Formulas also embedded within the Fractional PLL Verilog model:
+ * If DSMPD = 1 (DSM is disabled, "integer mode")
+ * FOUTVCO = FREF / REFDIV * FBDIV
+ * FOUTPOSTDIV = FOUTVCO / POSTDIV1 / POSTDIV2
+ * Where:
+ * FOUTVCO = Fractional PLL non-divided output frequency
+ * FOUTPOSTDIV = Fractional PLL divided output frequency
+ *               (output of second post divider)
+ * FREF = Fractional PLL input reference frequency, (the OSC_HZ 24MHz input)
+ * REFDIV = Fractional PLL input reference clock divider
+ * FBDIV = Integer value programmed into feedback divide
+ *
+ */
+
+static int rockchip_pll_clk_set_postdiv(ulong fout_hz,
+					u32 *postdiv1,
+					u32 *postdiv2,
+					u32 *foutvco)
+{
+	ulong freq;
+
+	if (fout_hz < MIN_FOUTVCO_FREQ) {
+		for (*postdiv1 = 1; *postdiv1 <= 7; (*postdiv1)++) {
+			for (*postdiv2 = 1; *postdiv2 <= 7; (*postdiv2)++) {
+				freq = fout_hz * (*postdiv1) * (*postdiv2);
+				if (freq >= MIN_FOUTVCO_FREQ &&
+				    freq <= MAX_FOUTVCO_FREQ) {
+					*foutvco = freq;
+					return 0;
+				}
+			}
+		}
+		printf("Can't FIND postdiv1/2 to make fout=%lu in 800~2000M.\n",
+		       fout_hz);
+	} else {
+		*postdiv1 = 1;
+		*postdiv2 = 1;
+	}
+	return 0;
+}
+
+static struct rockchip_pll_rate_table *
+rockchip_pll_clk_set_by_auto(ulong fin_hz,
+			     ulong fout_hz)
+{
+	struct rockchip_pll_rate_table *rate_table = &rockchip_auto_table;
+	/* FIXME set postdiv1/2 always 1*/
+	u32 foutvco = fout_hz;
+	ulong fin_64, frac_64;
+	u32 f_frac, postdiv1, postdiv2;
+	ulong clk_gcd = 0;
+
+	if (fin_hz == 0 || fout_hz == 0 || fout_hz == fin_hz)
+		return NULL;
+
+	rockchip_pll_clk_set_postdiv(fout_hz, &postdiv1, &postdiv2, &foutvco);
+	rate_table->postdiv1 = postdiv1;
+	rate_table->postdiv2 = postdiv2;
+	rate_table->dsmpd = 1;
+
+	if (fin_hz / MHZ * MHZ == fin_hz && fout_hz / MHZ * MHZ == fout_hz) {
+		fin_hz /= MHZ;
+		foutvco /= MHZ;
+		clk_gcd = gcd(fin_hz, foutvco);
+		rate_table->refdiv = fin_hz / clk_gcd;
+		rate_table->fbdiv = foutvco / clk_gcd;
+
+		rate_table->frac = 0;
+
+		debug("fin = %ld, fout = %ld, clk_gcd = %ld,\n",
+		      fin_hz, fout_hz, clk_gcd);
+		debug("refdiv= %d,fbdiv= %d,postdiv1= %d,postdiv2= %d\n",
+		      rate_table->refdiv,
+		      rate_table->fbdiv, rate_table->postdiv1,
+		      rate_table->postdiv2);
+	} else {
+		debug("frac div,fin_hz = %ld,fout_hz = %ld\n",
+		      fin_hz, fout_hz);
+		debug("frac get postdiv1 = %d,  postdiv2 = %d, foutvco = %d\n",
+		      rate_table->postdiv1, rate_table->postdiv2, foutvco);
+		clk_gcd = gcd(fin_hz / MHZ, foutvco / MHZ);
+		rate_table->refdiv = fin_hz / MHZ / clk_gcd;
+		rate_table->fbdiv = foutvco / MHZ / clk_gcd;
+		debug("frac get refdiv = %d,  fbdiv = %d\n",
+		      rate_table->refdiv, rate_table->fbdiv);
+
+		rate_table->frac = 0;
+
+		f_frac = (foutvco % MHZ);
+		fin_64 = fin_hz;
+		fin_64 = fin_64 / rate_table->refdiv;
+		frac_64 = f_frac << 24;
+		frac_64 = frac_64 / fin_64;
+		rate_table->frac = frac_64;
+		if (rate_table->frac > 0)
+			rate_table->dsmpd = 0;
+		debug("frac = %x\n", rate_table->frac);
+	}
+	return rate_table;
+}
+
+static const struct rockchip_pll_rate_table *
+rockchip_get_pll_settings(struct rockchip_pll_clock *pll, ulong rate)
+{
+	struct rockchip_pll_rate_table  *rate_table = pll->rate_table;
+
+	while (rate_table->rate) {
+		if (rate_table->rate == rate)
+			break;
+		rate_table++;
+	}
+	if (rate_table->rate != rate)
+		return rockchip_pll_clk_set_by_auto(24 * MHZ, rate);
+	else
+		return rate_table;
+}
+
+static int rk3036_pll_set_rate(struct rockchip_pll_clock *pll,
+			       void __iomem *base, ulong pll_id,
+			       ulong drate)
+{
+	const struct rockchip_pll_rate_table *rate;
+
+	rate = rockchip_get_pll_settings(pll, drate);
+	if (!rate) {
+		printf("%s unsupport rate\n", __func__);
+		return -EINVAL;
+	}
+
+	debug("%s: rate settings for %lu fbdiv: %d, postdiv1: %d, refdiv: %d\n",
+	      __func__, rate->rate, rate->fbdiv, rate->postdiv1, rate->refdiv);
+	debug("%s: rate settings for %lu postdiv2: %d, dsmpd: %d, frac: %d\n",
+	      __func__, rate->rate, rate->postdiv2, rate->dsmpd, rate->frac);
+
+	/*
+	 * When power on or changing PLL setting,
+	 * we must force PLL into slow mode to ensure output stable clock.
+	 */
+	rk_clrsetreg(base + pll->mode_offset,
+		     pll->mode_mask << pll->mode_shift,
+		     RKCLK_PLL_MODE_SLOW << pll->mode_shift);
+
+	/* Power down */
+	rk_setreg(base + pll->con_offset + 0x4,
+		  1 << RK3036_PLLCON1_PWRDOWN_SHIT);
+
+	rk_clrsetreg(base + pll->con_offset,
+		     (RK3036_PLLCON0_POSTDIV1_MASK |
+		     RK3036_PLLCON0_FBDIV_MASK),
+		     (rate->postdiv1 << RK3036_PLLCON0_POSTDIV1_SHIFT) |
+		     rate->fbdiv);
+	rk_clrsetreg(base + pll->con_offset + 0x4,
+		     (RK3036_PLLCON1_POSTDIV2_MASK |
+		     RK3036_PLLCON1_REFDIV_MASK),
+		     (rate->postdiv2 << RK3036_PLLCON1_POSTDIV2_SHIFT |
+		     rate->refdiv << RK3036_PLLCON1_REFDIV_SHIFT));
+	if (!rate->dsmpd) {
+		rk_clrsetreg(base + pll->con_offset + 0x4,
+			     RK3036_PLLCON1_DSMPD_MASK,
+			     rate->dsmpd << RK3036_PLLCON1_DSMPD_SHIFT);
+		writel((readl(base + pll->con_offset + 0x8) &
+			(~RK3036_PLLCON2_FRAC_MASK)) |
+			    (rate->frac << RK3036_PLLCON2_FRAC_SHIFT),
+			    base + pll->con_offset + 0x8);
+	}
+
+	/* Power Up */
+	rk_clrreg(base + pll->con_offset + 0x4,
+		  1 << RK3036_PLLCON1_PWRDOWN_SHIT);
+
+	/* waiting for pll lock */
+	while (!(readl(base + pll->con_offset + 0x4) & (1 << pll->lock_shift)))
+		udelay(1);
+
+	rk_clrsetreg(base + pll->mode_offset, pll->mode_mask << pll->mode_shift,
+		     RKCLK_PLL_MODE_NORMAL << pll->mode_shift);
+	debug("PLL at %p: con0=%x con1= %x con2= %x mode= %x\n",
+	      pll, readl(base + pll->con_offset),
+	      readl(base + pll->con_offset + 0x4),
+	      readl(base + pll->con_offset + 0x8),
+	      readl(base + pll->mode_offset));
+
+	return 0;
+}
+
+static ulong rk3036_pll_get_rate(struct rockchip_pll_clock *pll,
+				 void __iomem *base, ulong pll_id)
+{
+	u32 refdiv, fbdiv, postdiv1, postdiv2, dsmpd, frac;
+	u32 con = 0, shift, mask;
+	ulong rate = OSC_HZ;
+
+	con = readl(base + pll->mode_offset);
+	shift = pll->mode_shift;
+	mask = pll->mode_mask << shift;
+
+	switch ((con & mask) >> shift) {
+	case RKCLK_PLL_MODE_SLOW:
+		return OSC_HZ;
+	case RKCLK_PLL_MODE_NORMAL:
+		/* normal mode */
+		con = readl(base + pll->con_offset);
+		postdiv1 = (con & RK3036_PLLCON0_POSTDIV1_MASK) >>
+			   RK3036_PLLCON0_POSTDIV1_SHIFT;
+		fbdiv = (con & RK3036_PLLCON0_FBDIV_MASK) >>
+			RK3036_PLLCON0_FBDIV_SHIFT;
+		con = readl(base + pll->con_offset + 0x4);
+		postdiv2 = (con & RK3036_PLLCON1_POSTDIV2_MASK) >>
+			   RK3036_PLLCON1_POSTDIV2_SHIFT;
+		refdiv = (con & RK3036_PLLCON1_REFDIV_MASK) >>
+			 RK3036_PLLCON1_REFDIV_SHIFT;
+		dsmpd = (con & RK3036_PLLCON1_DSMPD_MASK) >>
+			RK3036_PLLCON1_DSMPD_SHIFT;
+		con = readl(base + pll->con_offset + 0x8);
+		frac = (con & RK3036_PLLCON2_FRAC_MASK) >>
+			RK3036_PLLCON2_FRAC_SHIFT;
+		rate *= fbdiv;
+		rate = rate / refdiv;
+		if (dsmpd == 0) {
+			ulong frac_rate = OSC_HZ;
+
+			frac_rate = frac_rate  >> 12;
+			frac_rate = frac_rate * frac;
+			frac_rate = frac_rate  >> 12;
+			frac_rate = frac_rate / refdiv;
+			rate += frac_rate;
+		}
+		rate = rate / (postdiv1 * postdiv2);
+
+		return rate;
+	case RKCLK_PLL_MODE_DEEP:
+	default:
+		return 32768;
+	}
+}
+
+ulong rockchip_pll_get_rate(struct rockchip_pll_clock *pll,
+			    void __iomem *base,
+			    ulong pll_id)
+{
+	ulong rate = 0;
+
+	switch (pll->type) {
+	case pll_rk3036:
+		pll->mode_mask = PLL_MODE_MASK;
+		rate = rk3036_pll_get_rate(pll, base, pll_id);
+		break;
+	case pll_rk3328:
+		pll->mode_mask = PLL_RK3328_MODE_MASK;
+		rate = rk3036_pll_get_rate(pll, base, pll_id);
+		break;
+	default:
+		printf("%s: Unknown pll type for pll clk %ld\n",
+		       __func__, pll_id);
+	}
+	return rate;
+}
+
+int rockchip_pll_set_rate(struct rockchip_pll_clock *pll,
+			  void __iomem *base, ulong pll_id,
+			  ulong drate)
+{
+	int ret = 0;
+
+	if (rockchip_pll_get_rate(pll, base, pll_id) == drate)
+		return 0;
+
+	switch (pll->type) {
+	case pll_rk3036:
+		pll->mode_mask = PLL_MODE_MASK;
+		ret = rk3036_pll_set_rate(pll, base, pll_id, drate);
+		break;
+	case pll_rk3328:
+		pll->mode_mask = PLL_RK3328_MODE_MASK;
+		ret = rk3036_pll_set_rate(pll, base, pll_id, drate);
+		break;
+	default:
+		printf("%s: Unknown pll type for pll clk %ld\n",
+		       __func__, pll_id);
+	}
+	return ret;
+}
+
+const struct rockchip_cpu_rate_table *
+rockchip_get_cpu_settings(struct rockchip_cpu_rate_table *cpu_table,
+			  ulong rate)
+{
+	struct rockchip_cpu_rate_table *ps = cpu_table;
+
+	while (ps->rate) {
+		if (ps->rate == rate)
+			break;
+		ps++;
+	}
+	if (ps->rate != rate)
+		return NULL;
+	else
+		return ps;
+}
+

commit dc71f496cd246668bd8a971e6e3ca304d479e71b
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Tue Jul 24 10:09:46 2018 +0800

    drm/rockchip: 3229 vop: fix mistake fild when in interlace mode
    
    set frame effect to fix mistake fild when in interlace mode.
    
    Change-Id: Ic4e7b7134bd54aa65d31264a3e4625eebdc229c5
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index eed6d5b8b2..8784138cbf 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -88,6 +88,7 @@ static const struct vop_ctrl rk3288_ctrl_data = {
 	.standby = VOP_REG(RK3288_SYS_CTRL, 0x1, 22),
 	.axi_outstanding_max_num = VOP_REG(RK3288_SYS_CTRL1, 0x1f, 13),
 	.axi_max_outstanding_en = VOP_REG(RK3288_SYS_CTRL1, 0x1, 12),
+	.reg_done_frm = VOP_REG_VER(RK3288_SYS_CTRL1, 0x1, 24, 3, 7, -1),
 	.htotal_pw = VOP_REG(RK3288_DSP_HTOTAL_HS_END, 0x1fff1fff, 0),
 	.hact_st_end = VOP_REG(RK3288_DSP_HACT_ST_END, 0x1fff1fff, 0),
 	.vtotal_pw = VOP_REG(RK3288_DSP_VTOTAL_VS_END, 0x1fff1fff, 0),

commit b498696e7385e977f09b56735866258a58789dfc
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jul 26 10:36:22 2018 +0800

    rockchip: resource: add more quote
    
    Change-Id: I4a9a25cacd032977f952956af83e4c1d91e239a9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 1d972941bf..e4c58ece41 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -163,6 +163,12 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 	int resource_found = 0;
 	struct blk_desc *dev_desc;
 	disk_partition_t part_info;
+
+/*
+ * Primary detect AOSP format image, try to get resource image from
+ * boot/recovery partition. If not, it's an RK format image and try
+ * to get from resource partition.
+ */
 #ifdef CONFIG_ANDROID_BOOT_IMAGE
 	struct andr_img_hdr *andr_hdr;
 	char *boot_partname = PART_BOOT;
@@ -194,6 +200,7 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 	/* Get boot mode from misc */
 	if (rockchip_get_boot_mode() == BOOT_MODE_RECOVERY)
 		boot_partname = PART_RECOVERY;
+
 	/* Read boot/recovery and chenc if this is an AOSP img */
 #ifdef CONFIG_ANDROID_AB
 	char slot_suffix[3] = {0};
@@ -204,13 +211,17 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 	if (boot_partname == NULL)
 		goto out;
 #endif
-	ret = part_get_info_by_name(dev_desc, boot_partname,
-					 &part_info);
+	ret = part_get_info_by_name(dev_desc, boot_partname, &part_info);
 	if (ret < 0) {
 		printf("fail to get %s part\n", boot_partname);
 		/* RKIMG can support part table without 'boot' */
 		goto next;
 	}
+
+	/*
+	 * Only read header and check magic, is a AOSP format image?
+	 * If so, get resource image from second part.
+	 */
 	andr_hdr = (void *)hdr;
 	ret = blk_dread(dev_desc, part_info.start, 1, andr_hdr);
 	if (ret != 1) {
@@ -232,10 +243,13 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 	}
 next:
 #endif
+	/*
+	 * If not found resource image in AOSP format images(boot/recovery part),
+	 * try to read RK format images(resource part).
+	 */
 	if (!resource_found) {
 		/* Read resource from Rockchip Resource partition */
-		ret = part_get_info_by_name(dev_desc, PART_RESOURCE,
-					 &part_info);
+		ret = part_get_info_by_name(dev_desc, PART_RESOURCE, &part_info);
 		if (ret < 0) {
 			printf("fail to get %s part\n", PART_RESOURCE);
 			goto out;
@@ -244,18 +258,23 @@ next:
 		debug("%s Load resource from %s\n", __func__, part_info.name);
 	}
 
+	/* Only read header and check magic */
 	ret = blk_dread(dev_desc, offset, 1, hdr);
 	if (ret != 1)
 		goto out;
+
 	ret = resource_image_check_header(hdr);
 	if (ret < 0)
 		goto out;
+
 	content = memalign(ARCH_DMA_MINALIGN,
 			   hdr->e_blks * hdr->e_nums * RK_BLK_SIZE);
 	if (!content) {
 		printf("alloc memory for content failed\n");
 		goto out;
 	}
+
+	/* Real read whole resource image */
 	ret = blk_dread(dev_desc, offset + hdr->c_offset,
 			hdr->e_blks * hdr->e_nums, content);
 	if (ret != (hdr->e_blks * hdr->e_nums))

commit 09509cd539aa1097808b28f8ce02cfdc337872a5
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Thu Aug 2 10:21:39 2018 +0800

    drivers: rkflash: support IDBlock updating in loader mode for nand devices
    
    SPI Nand and Nand flash devices are supported
    
    Change-Id: Ic4dbd5cf38bd46be474bb410224a9082bce1b5f2
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/rk_sftl_arm_v7.S b/drivers/rkflash/rk_sftl_arm_v7.S
index 8affd2d8dc..749f0077e0 100644
--- a/drivers/rkflash/rk_sftl_arm_v7.S
+++ b/drivers/rkflash/rk_sftl_arm_v7.S
@@ -2,7 +2,7 @@
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:	GPL-2.0
- * date: 2018-07-21
+ * date: 2018-08-02
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -13059,6 +13059,7 @@ FtlWrite:
 	.word	.LANCHOR83
 	.word	.LANCHOR82
 	.size	FtlWrite, .-FtlWrite
+	.global	__aeabi_idivmod
 	.section	.text.sftl_write,"ax",%progbits
 	.align	1
 	.global	sftl_write
@@ -13068,14 +13069,297 @@ FtlWrite:
 	.fpu softvfp
 	.type	sftl_write, %function
 sftl_write:
-	@ args = 0, pretend = 0, frame = 0
+	@ args = 0, pretend = 0, frame = 112
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	mov	r3, r2
-	mov	r2, r1
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	adds	r4, r0, r1
+	subs	r5, r4, #1
+	sub	sp, sp, #120
+	cmp	r5, #63
+	str	r0, [sp, #8]
+	str	r1, [sp, #16]
+	str	r2, [sp, #36]
+	ldr	r6, .L1762
+	bls	.L1731
+	cmp	r0, #576
+	bls	.L1732
+.L1731:
+	ldr	r3, [r6]
+	cmp	r3, #0
+	beq	.L1733
+	ldr	r2, .L1762+4
+	mov	r0, #512
+	ldrh	r3, [r2, #14]
+	str	r3, [sp, #20]
+	ldrh	r3, [r2, #10]
+	ldrb	r1, [sp, #20]	@ zero_extendqisi2
+	smulbb	r3, r3, r1
+	uxth	r3, r3
+	mov	r1, r3
+	str	r3, [sp, #24]
+	bl	__aeabi_uidiv
+	ldr	r2, .L1762+8
+	movs	r3, #0
+	ldr	r1, .L1762+12
+	str	r0, [sp, #12]
+	sub	r4, r2, #262144
+.L1737:
+	ldr	r0, [r2, #-4]
+	cmp	r0, #0
+	beq	.L1734
+.L1738:
+	ldr	r3, [sp, #12]
+	movs	r4, #0
+	ldr	r2, [sp, #24]
+	ldr	r6, .L1762+16
+	str	r4, [sp, #28]
+	muls	r3, r2, r3
+	str	r3, [sp, #48]
+	ldr	r3, [sp, #12]
+	str	r3, [sp, #32]
+.L1735:
+	mov	r2, #512
+	movs	r1, #0
+	ldr	r0, .L1762+20
+	bl	memset
+	ldr	r3, .L1762+4
+	mov	r0, r4
+	ldrh	r7, [r3, #14]
+	mov	r1, r7
+	uxtb	r8, r7
+	uxth	r3, r8
+	str	r3, [sp, #40]
+	ldr	r3, .L1762+4
+	ldrh	r5, [r3, #10]
+	ldrh	r3, [sp, #40]
+	smulbb	r5, r5, r3
+	bl	__aeabi_uidiv
+	uxth	r5, r5
+	mov	r1, r0
+	ldr	r3, [r6, #4]
+	movs	r0, #0
+	blx	r3
+	cmp	r5, #512
+	bcs	.L1739
+	mov	r1, r7
+	adds	r0, r5, r4
+	bl	__aeabi_uidiv
+	ldr	r3, [r6, #4]
+	mov	r1, r0
+	movs	r0, #0
+	blx	r3
+.L1739:
+	mov	r1, r5
+	mov	r0, r4
+	bl	__aeabi_uidivmod
+	movs	r5, #0
+	mov	r10, r1
+	subs	r3, r4, r1
+	str	r3, [sp, #44]
+.L1740:
+	cmp	r5, #512
+	bcc	.L1741
+	ldr	r3, .L1762+4
+	mov	r0, r4
+	movs	r5, #0
+	ldrb	r8, [r3, #14]	@ zero_extendqisi2
+	uxth	r3, r8
+	str	r3, [sp, #40]
+	ldr	r3, .L1762+4
+	ldrh	r1, [r3, #10]
+	ldrh	r3, [sp, #40]
+	smulbb	r1, r1, r3
+	uxth	r1, r1
+	bl	__aeabi_uidivmod
+	mov	fp, r1
+	subs	r3, r4, r1
+	uxth	r0, fp
+	mov	r1, r8
+	str	r3, [sp, #44]
+	bl	__aeabi_idivmod
+	uxth	r7, r1
+.L1742:
+	cmp	r5, #512
+	bcs	.L1746
+	ldr	r3, [sp, #40]
+	mov	r1, r8
+	add	r0, fp, r5
+	sub	r10, r3, r7
+	ldr	r3, .L1762+20
+	uxth	r10, r10
+	add	r2, r3, r5, lsl #9
+	str	r2, [sp, #52]
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #44]
+	uxth	r0, r0
+	mov	r1, r8
+	add	r7, r7, r3
+	mla	r0, r8, r0, r7
+	bl	__aeabi_uidiv
+	ldr	r7, [r6, #12]
 	mov	r1, r0
+	add	r3, sp, #56
+	ldr	r2, [sp, #52]
+	movs	r0, #0
+	blx	r7
+	adds	r0, r0, #1
+	bne	.L1743
+.L1746:
+	ldr	r3, .L1762+24
+	movs	r5, #0
+.L1744:
+	ldr	r2, .L1762+20
+	mov	r7, r3
+	adds	r3, r3, #4
+	ldr	r1, [r2, r5, lsl #2]
+	ldr	r2, [r7]
+	cmp	r1, r2
+	beq	.L1747
+	mov	r2, #512
+	movs	r1, #0
+	ldr	r0, .L1762+20
+	bl	memset
+	ldr	r2, .L1762+20
+	mov	r1, r4
+	str	r5, [sp]
+	ldr	r3, [r7]
+	ldr	r2, [r2, r5, lsl #2]
+	ldr	r0, .L1762+28
+	bl	printf
+	ldr	r1, [sp, #20]
+	mov	r0, r4
+	bl	__aeabi_uidiv
+	ldr	r3, [r6, #4]
+	mov	r1, r0
+	movs	r0, #0
+	blx	r3
+	ldr	r3, [sp, #12]
+	cmp	r3, #1
+	bls	.L1748
+	ldr	r3, [sp, #24]
+	ldr	r1, [sp, #20]
+	adds	r0, r3, r4
+	bl	__aeabi_uidiv
+	ldr	r3, [r6, #4]
+	mov	r1, r0
+	movs	r0, #0
+	blx	r3
+.L1748:
+	ldr	r2, [sp, #32]
+	ldr	r3, [sp, #12]
+	add	r3, r3, r2
+	ldr	r2, [sp, #48]
+	add	r4, r4, r2
+	ldr	r2, [sp, #32]
+	cmp	r2, #15
+	bls	.L1754
+.L1753:
+	ldr	r3, .L1762
+	movs	r2, #0
+	str	r2, [r3]
+.L1733:
+	ldr	r3, [sp, #36]
+	movs	r0, #0
+	ldr	r2, [sp, #16]
+	ldr	r1, [sp, #8]
+	bl	FtlWrite
+	add	sp, sp, #120
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1734:
+	ldr	r0, [r4, r3, lsl #2]
+	adds	r3, r3, #1
+	cmp	r3, #4096
+	it	hi
+	movhi	r3, #0
+	str	r0, [r2, #-4]!
+	cmp	r1, r2
+	bne	.L1737
+	b	.L1738
+.L1754:
+	str	r3, [sp, #32]
+	b	.L1735
+.L1741:
+	mov	r1, r8
+	add	r0, r10, r5
+	bl	__aeabi_uidiv
+	uxth	fp, r0
+	mov	r1, r8
+	ldr	r0, [sp, #44]
+	mul	r3, r8, fp
+	str	r3, [sp, #56]
+	movw	r3, #61424
+	str	r3, [sp, #60]
+	ldr	r3, .L1762+24
+	add	r2, r3, r5, lsl #9
+	str	r2, [sp, #52]
+	bl	__aeabi_uidiv
+	add	r3, sp, #56
+	add	r1, r0, fp
+	ldr	r2, [sp, #52]
 	movs	r0, #0
-	b	FtlWrite
+	ldr	r7, [r6, #8]
+	blx	r7
+	ldr	r3, [sp, #40]
+	add	r5, r5, r3
+	uxth	r5, r5
+	b	.L1740
+.L1743:
+	add	r5, r5, r10
+	movs	r7, #0
+	uxth	r5, r5
+	b	.L1742
+.L1747:
+	adds	r5, r5, #1
+	cmp	r5, #65536
+	bne	.L1744
+	ldr	r3, [sp, #28]
+	adds	r3, r3, #1
+	cmp	r3, #5
+	str	r3, [sp, #28]
+	bls	.L1748
+	b	.L1753
+.L1732:
+	ldr	r3, [sp, #8]
+	ldr	r0, .L1762+24
+	cmp	r3, #63
+	bhi	.L1750
+	rsb	r1, r3, #64
+	ldr	r3, [sp, #16]
+	subs	r2, r3, r1
+	ldr	r3, [sp, #36]
+	add	r1, r3, r1, lsl #9
+.L1751:
+	movs	r3, #1
+	cmp	r5, #576
+	str	r3, [r6]
+	ittt	hi
+	subhi	r2, r2, r4
+	mvnhi	r3, #446
+	addhi	r2, r2, r3
+	lsls	r2, r2, #9
+	bl	memcpy
+	b	.L1733
+.L1750:
+	ldr	r2, [sp, #8]
+	ldr	r3, .L1762+32
+	ldr	r1, [sp, #36]
+	add	r3, r3, r2
+	ldr	r2, [sp, #16]
+	add	r0, r0, r3, lsl #9
+	b	.L1751
+.L1763:
+	.align	2
+.L1762:
+	.word	.LANCHOR179
+	.word	.LANCHOR0
+	.word	idb_buf+262144
+	.word	idb_buf+16388
+	.word	.LANCHOR105
+	.word	gp_flash_check_buf
+	.word	idb_buf
+	.word	.LC109
+	.word	8388544
 	.size	sftl_write, .-sftl_write
 	.section	.text.FtlLoadSysInfo,"ax",%progbits
 	.align	1
@@ -13090,15 +13374,15 @@ FtlLoadSysInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r1, #0
-	ldr	r8, .L1752+136
-	ldr	r5, .L1752
+	ldr	r8, .L1785+136
+	ldr	r5, .L1785
 	ldr	r3, [r8]
-	ldr	r4, .L1752+4
-	ldr	r10, .L1752+140
+	ldr	r4, .L1785+4
+	ldr	r10, .L1785+140
 	ldrh	r2, [r5]
-	ldr	r7, .L1752+8
+	ldr	r7, .L1785+8
 	str	r3, [r4, #8]
-	ldr	r6, .L1752+12
+	ldr	r6, .L1785+12
 	ldr	r3, [r10]
 	lsls	r2, r2, #1
 	ldr	r0, [r7]
@@ -13108,41 +13392,41 @@ FtlLoadSysInfo:
 	movw	r3, #65535
 	str	r7, [sp]
 	cmp	r0, r3
-	bne	.L1732
-.L1740:
+	bne	.L1765
+.L1773:
 	mov	r0, #-1
-.L1731:
+.L1764:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1732:
+.L1765:
 	movs	r1, #1
 	mov	fp, r4
 	bl	FtlGetLastWrittenPage
-	ldr	r3, .L1752+16
+	ldr	r3, .L1785+16
 	sxth	r7, r0
 	adds	r0, r0, #1
 	strh	r0, [r6, #2]	@ movhi
-.L1734:
+.L1767:
 	cmp	r7, #0
-	bge	.L1737
+	bge	.L1770
 	movw	r2, #1437
-	ldr	r1, .L1752+20
-	ldr	r0, .L1752+24
+	ldr	r1, .L1785+20
+	ldr	r0, .L1785+24
 	bl	printf
-.L1736:
-	ldr	r2, .L1752+28
+.L1769:
+	ldr	r2, .L1785+28
 	ldrh	r3, [r5]
 	ldrh	r2, [r2]
 	adds	r3, r3, #24
 	cmp	r2, r3, lsl #1
-	bcs	.L1739
+	bcs	.L1772
 	movw	r2, #1439
-	ldr	r1, .L1752+20
-	ldr	r0, .L1752+24
+	ldr	r1, .L1785+20
+	ldr	r0, .L1785+24
 	bl	printf
-.L1739:
-	ldr	r7, .L1752+32
+.L1772:
+	ldr	r7, .L1785+32
 	movs	r2, #48
 	ldr	r1, [r4, #8]
 	mov	r0, r7
@@ -13163,60 +13447,60 @@ FtlLoadSysInfo:
 	adds	r2, r2, #4
 	bic	r1, r1, #3
 	add	r1, r1, r3
-	ldr	r3, .L1752+36
+	ldr	r3, .L1785+36
 	ldr	r0, [r3]
 	bl	ftl_memcpy
 	ldr	r2, [r7]
-	ldr	r3, .L1752+16
+	ldr	r3, .L1785+16
 	cmp	r2, r3
-	bne	.L1740
-	ldr	r3, .L1752+40
+	bne	.L1773
+	ldr	r3, .L1785+40
 	ldrb	r2, [r7, #10]	@ zero_extendqisi2
 	ldrh	r5, [r7, #8]
 	ldrh	r3, [r3]
 	strh	r5, [r6, #6]	@ movhi
 	cmp	r2, r3
-	bne	.L1740
-	ldr	r3, .L1752+44
-	ldr	r2, .L1752+48
+	bne	.L1773
+	ldr	r3, .L1785+44
+	ldr	r2, .L1785+48
 	str	r5, [r3]
-	ldr	r3, .L1752+52
+	ldr	r3, .L1785+52
 	ldrh	r3, [r3]
 	muls	r3, r5, r3
 	str	r3, [r2]
-	ldr	r2, .L1752+56
+	ldr	r2, .L1785+56
 	ldrh	r2, [r2]
 	muls	r3, r2, r3
-	ldr	r2, .L1752+60
+	ldr	r2, .L1785+60
 	str	r3, [r2]
-	ldr	r3, .L1752+64
+	ldr	r3, .L1785+64
 	ldr	r6, [r3]
-	ldr	r3, .L1752+68
+	ldr	r3, .L1785+68
 	ldrh	r0, [r3, #6]
-	ldr	r3, .L1752+72
+	ldr	r3, .L1785+72
 	subs	r0, r6, r0
 	ldrh	r1, [r3]
 	subs	r0, r0, r5
 	bl	__aeabi_uidiv
-	ldr	r3, .L1752+76
+	ldr	r3, .L1785+76
 	cmp	r5, r6
 	strh	r0, [r3]	@ movhi
-	bls	.L1741
+	bls	.L1774
 	movw	r2, #1461
-	ldr	r1, .L1752+20
-	ldr	r0, .L1752+24
+	ldr	r1, .L1785+20
+	ldr	r0, .L1785+24
 	bl	printf
-.L1741:
+.L1774:
 	ldrh	r2, [r4, #16]
-	ldr	r3, .L1752+80
+	ldr	r3, .L1785+80
 	ldrh	ip, [r4, #14]
-	ldr	r7, .L1752+84
+	ldr	r7, .L1785+84
 	lsrs	r1, r2, #6
 	and	r2, r2, #63
 	strb	r2, [r3, #6]
 	ldrb	r2, [r4, #11]	@ zero_extendqisi2
 	strh	r1, [r3, #2]	@ movhi
-	ldr	r1, .L1752+88
+	ldr	r1, .L1785+88
 	strb	r2, [r3, #8]
 	ldrh	r2, [r4, #18]
 	strh	ip, [r3]	@ movhi
@@ -13235,7 +13519,7 @@ FtlLoadSysInfo:
 	strh	r5, [r1, #2]	@ movhi
 	ldrh	r5, [r4, #22]
 	strb	r2, [r1, #8]
-	ldr	r2, .L1752+92
+	ldr	r2, .L1785+92
 	strh	r5, [r2]	@ movhi
 	ldrh	r5, [r4, #24]
 	lsrs	r6, r5, #6
@@ -13245,31 +13529,31 @@ FtlLoadSysInfo:
 	strh	r6, [r2, #2]	@ movhi
 	ldr	r6, [r4, #32]
 	strb	r5, [r2, #8]
-	ldr	r5, .L1752+96
+	ldr	r5, .L1785+96
 	str	r3, [r5]
-	ldr	r5, .L1752+100
+	ldr	r5, .L1785+100
 	str	r3, [r5]
-	ldr	r5, .L1752+104
+	ldr	r5, .L1785+104
 	str	r3, [r5]
-	ldr	r5, .L1752+108
+	ldr	r5, .L1785+108
 	str	r3, [r5]
-	ldr	r5, .L1752+112
+	ldr	r5, .L1785+112
 	str	r6, [r5]
 	mov	r6, r1
-	ldr	r5, .L1752+116
+	ldr	r5, .L1785+116
 	str	r3, [r5]
-	ldr	r5, .L1752+120
+	ldr	r5, .L1785+120
 	str	r3, [r5]
-	ldr	r5, .L1752+124
+	ldr	r5, .L1785+124
 	ldr	lr, [r4, #40]
 	str	r3, [r5]
-	ldr	r3, .L1752+128
+	ldr	r3, .L1785+128
 	ldr	r5, [r3]
 	cmp	lr, r5
 	mov	r5, r2
 	it	hi
 	strhi	lr, [r3]
-	ldr	r3, .L1752+132
+	ldr	r3, .L1785+132
 	ldr	r2, [r4, #36]
 	ldr	r1, [r3]
 	cmp	r2, r1
@@ -13277,34 +13561,34 @@ FtlLoadSysInfo:
 	strhi	r2, [r3]
 	movw	r3, #65535
 	cmp	ip, r3
-	beq	.L1744
-	ldr	r0, .L1752+80
+	beq	.L1777
+	ldr	r0, .L1785+80
 	bl	make_superblock
-.L1744:
+.L1777:
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1745
-	ldr	r0, .L1752+88
+	beq	.L1778
+	ldr	r0, .L1785+88
 	bl	make_superblock
-.L1745:
+.L1778:
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1746
-	ldr	r0, .L1752+92
+	beq	.L1779
+	ldr	r0, .L1785+92
 	bl	make_superblock
-.L1746:
+.L1779:
 	ldrh	r2, [r7]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1747
-	ldr	r0, .L1752+84
+	beq	.L1780
+	ldr	r0, .L1785+84
 	bl	make_superblock
-.L1747:
+.L1780:
 	movs	r0, #0
-	b	.L1731
-.L1737:
+	b	.L1764
+.L1770:
 	ldrh	r2, [r6]
 	mov	r0, fp
 	str	r3, [sp, #4]
@@ -13318,35 +13602,35 @@ FtlLoadSysInfo:
 	ldr	r2, [r4]
 	ldr	r3, [sp, #4]
 	adds	r2, r2, #1
-	beq	.L1735
+	beq	.L1768
 	ldr	r2, [r8]
 	ldr	r2, [r2]
 	cmp	r2, r3
-	bne	.L1735
+	bne	.L1768
 	ldr	r2, [r10]
 	ldrh	r1, [r2]
 	movw	r2, #61604
 	cmp	r1, r2
-	beq	.L1736
-.L1735:
+	beq	.L1769
+.L1768:
 	subs	r7, r7, #1
 	sxth	r7, r7
-	b	.L1734
-.L1753:
+	b	.L1767
+.L1786:
 	.align	2
-.L1752:
+.L1785:
 	.word	.LANCHOR5
 	.word	.LANCHOR106
 	.word	.LANCHOR42
 	.word	.LANCHOR79
 	.word	1179929683
-	.word	.LANCHOR179
+	.word	.LANCHOR180
 	.word	.LC1
 	.word	.LANCHOR23
 	.word	.LANCHOR39
 	.word	.LANCHOR1
 	.word	.LANCHOR10
-	.word	.LANCHOR180
+	.word	.LANCHOR181
 	.word	.LANCHOR61
 	.word	.LANCHOR19
 	.word	.LANCHOR12
@@ -13385,27 +13669,27 @@ FtlSysBlkInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r3, #0
-	ldr	r6, .L1769
+	ldr	r6, .L1802
 	strh	r3, [r6]	@ movhi
-	ldr	r3, .L1769+4
+	ldr	r3, .L1802+4
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlScanSysBlk
-	ldr	r3, .L1769+8
+	ldr	r3, .L1802+8
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1755
-.L1757:
+	bne	.L1788
+.L1790:
 	mov	r7, #-1
-.L1754:
+.L1787:
 	mov	r0, r7
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1755:
+.L1788:
 	bl	FtlLoadSysInfo
 	mov	r7, r0
 	cmp	r0, #0
-	bne	.L1757
+	bne	.L1790
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -13415,40 +13699,40 @@ FtlSysBlkInit:
 	bl	FtlPowerLostRecovery
 	movs	r0, #1
 	bl	FtlUpdateVaildLpn
-	ldr	r3, .L1769+12
+	ldr	r3, .L1802+12
 	movs	r0, #12
 	ldrh	r1, [r3]
-	ldr	r3, .L1769+16
+	ldr	r3, .L1802+16
 	ldr	r2, [r3]
 	mov	r3, r7
-.L1758:
+.L1791:
 	cmp	r3, r1
-	bge	.L1763
+	bge	.L1796
 	mla	r4, r0, r3, r2
 	ldr	r4, [r4, #4]
 	cmp	r4, #0
-	bge	.L1759
-.L1763:
-	ldr	r4, .L1769+20
+	bge	.L1792
+.L1796:
+	ldr	r4, .L1802+20
 	cmp	r3, r1
-	ldr	r5, .L1769+24
+	ldr	r5, .L1802+24
 	ldrh	r2, [r4, #28]
 	add	r2, r2, #1
 	strh	r2, [r4, #28]	@ movhi
-	bge	.L1767
-.L1760:
-	ldr	r6, .L1769+28
-	ldr	r0, .L1769+24
+	bge	.L1800
+.L1793:
+	ldr	r6, .L1802+28
+	ldr	r0, .L1802+24
 	bl	FtlSuperblockPowerLostFix
 	mov	r0, r6
 	bl	FtlSuperblockPowerLostFix
-	ldr	r3, .L1769+32
+	ldr	r3, .L1802+32
 	ldrh	r1, [r5]
 	ldrh	r0, [r5, #4]
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
-	ldr	r0, .L1769+36
+	ldr	r0, .L1802+36
 	strh	r3, [r2, r1, lsl #1]	@ movhi
 	ldrh	ip, [r6]
 	ldrh	r3, [r0]
@@ -13461,54 +13745,54 @@ FtlSysBlkInit:
 	sub	r1, r1, lr
 	strh	r1, [r2, ip, lsl #1]	@ movhi
 	ldrh	r2, [r0]
-	ldr	r0, .L1769+40
+	ldr	r0, .L1802+40
 	strb	r3, [r6, #6]
 	strh	r2, [r6, #2]	@ movhi
 	strh	r3, [r6, #4]	@ movhi
 	bl	FtlMapBlkWriteDump_data
-	ldr	r0, .L1769+44
+	ldr	r0, .L1802+44
 	bl	FtlMapBlkWriteDump_data
 	ldrh	r3, [r4, #30]
 	adds	r3, r3, #1
 	strh	r3, [r4, #30]	@ movhi
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1768:
+.L1801:
 	bl	FtlVpcTblFlush
 	ldrh	r0, [r5]
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1766
+	beq	.L1799
 	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1766
-	ldr	r5, .L1769+28
+	cbnz	r3, .L1799
+	ldr	r5, .L1802+28
 	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1766
+	cbnz	r3, .L1799
 	bl	FtlGcRefreshBlock
 	ldrh	r0, [r5]
 	bl	FtlGcRefreshBlock
-	ldr	r0, .L1769+24
+	ldr	r0, .L1802+24
 	bl	allocate_new_data_superblock
 	mov	r0, r5
 	bl	allocate_new_data_superblock
-.L1766:
+.L1799:
 	ldrh	r3, [r4, #28]
 	lsls	r3, r3, #27
-	bne	.L1754
+	bne	.L1787
 	bl	FtlVpcCheckAndModify
-	b	.L1754
-.L1759:
+	b	.L1787
+.L1792:
 	adds	r3, r3, #1
-	b	.L1758
-.L1767:
+	b	.L1791
+.L1800:
 	ldrh	r3, [r6]
 	cmp	r3, #0
-	bne	.L1760
+	bne	.L1793
 	bl	l2p_flush
-	b	.L1768
-.L1770:
+	b	.L1801
+.L1803:
 	.align	2
-.L1769:
+.L1802:
 	.word	.LANCHOR161
 	.word	.LANCHOR4
 	.word	.LANCHOR79
@@ -13535,62 +13819,62 @@ ftl_low_format:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #0
-	ldr	r6, .L1795
-	ldr	r2, .L1795+4
-	ldr	r5, .L1795+8
+	ldr	r6, .L1828
+	ldr	r2, .L1828+4
+	ldr	r5, .L1828+8
 	ldrh	r0, [r6]
 	str	r3, [r2]
 	str	r3, [r5]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	r0, .L1772
+	cbz	r0, .L1805
 	bl	FtlMakeBbt
-.L1772:
-	ldr	r3, .L1795+12
-	ldr	r2, .L1795+16
-	ldr	ip, .L1795+100
+.L1805:
+	ldr	r3, .L1828+12
+	ldr	r2, .L1828+16
+	ldr	ip, .L1828+100
 	ldrh	r1, [r3]
 	ldr	r4, [r2]
-	ldr	r2, .L1795+20
+	ldr	r2, .L1828+20
 	str	r3, [sp, #4]
 	lsls	r1, r1, #7
 	ldr	r7, [r2]
 	movs	r2, #0
-.L1773:
+.L1806:
 	uxth	r3, r2
 	adds	r2, r2, #1
 	cmp	r3, r1
-	blt	.L1774
-	ldr	r3, .L1795+24
+	blt	.L1807
+	ldr	r3, .L1828+24
 	movs	r7, #0
-	ldr	r10, .L1795+104
+	ldr	r10, .L1828+104
 	ldrh	r4, [r3]
 	mov	r8, r3
 	mov	fp, r10
-.L1775:
+.L1808:
 	ldrh	r3, [r10]
 	cmp	r3, r4
-	bhi	.L1776
-	ldr	r4, .L1795+28
+	bhi	.L1809
+	ldr	r4, .L1828+28
 	subs	r3, r7, #2
 	ldrh	r1, [r4]
 	cmp	r3, r1, lsl #1
-	bgt	.L1777
-.L1781:
+	bgt	.L1810
+.L1814:
 	movs	r6, #0
 	mov	r7, r6
-.L1778:
+.L1811:
 	ldrh	r3, [r8]
 	uxth	r0, r6
 	adds	r6, r6, #1
 	cmp	r3, r0
-	bhi	.L1782
+	bhi	.L1815
 	ldrh	r2, [fp]
-	ldr	r3, .L1795+32
+	ldr	r3, .L1828+32
 	ldrh	r4, [r4]
-	ldr	r6, .L1795+36
+	ldr	r6, .L1828+36
 	str	r2, [r3]
-	ldr	r3, .L1795+40
+	ldr	r3, .L1828+40
 	mov	r1, r4
 	ldr	r2, [r3]
 	mov	r0, r2
@@ -13600,13 +13884,13 @@ ftl_low_format:
 	mov	r3, r0
 	str	r0, [r6]
 	add	r1, r10, #36
-	ldr	r0, .L1795+44
+	ldr	r0, .L1828+44
 	strh	r1, [r0]	@ movhi
 	movs	r1, #24
 	muls	r1, r4, r1
 	str	r0, [sp]
 	cmp	r7, r1
-	ble	.L1783
+	ble	.L1816
 	ldr	r2, [sp, #12]
 	mov	r1, r4
 	str	r3, [sp, #8]
@@ -13618,11 +13902,11 @@ ftl_low_format:
 	adds	r0, r0, #24
 	strh	r0, [r3]	@ movhi
 	ldr	r3, [sp, #8]
-.L1783:
-	ldr	r2, .L1795+48
+.L1816:
+	ldr	r2, .L1828+48
 	ldrh	r2, [r2]
-	cbz	r2, .L1785
-	ldr	r1, .L1795+44
+	cbz	r2, .L1818
+	ldr	r1, .L1828+44
 	ldrh	r0, [r1]
 	add	r0, r0, r2, lsr #1
 	strh	r0, [r1]	@ movhi
@@ -13633,24 +13917,24 @@ ftl_low_format:
 	strlt	r3, [r6]
 	addlt	r2, r2, r10
 	strhlt	r2, [r1]	@ movhi
-.L1785:
+.L1818:
 	ldr	r3, [sp]
-	ldr	r7, .L1795+52
-	ldr	r10, .L1795+108
+	ldr	r7, .L1828+52
+	ldr	r10, .L1828+108
 	ldrh	r2, [r3]
 	ldr	r3, [r6]
 	subs	r3, r3, r2
 	muls	r4, r3, r4
-	ldr	r3, .L1795+56
+	ldr	r3, .L1828+56
 	ldrh	r3, [r3]
 	str	r4, [r7]
 	muls	r4, r3, r4
 	ldr	r3, [sp, #4]
 	ldrh	r3, [r3]
 	str	r4, [r6]
-	ldr	r6, .L1795+60
+	ldr	r6, .L1828+60
 	muls	r4, r3, r4
-	ldr	r3, .L1795+64
+	ldr	r3, .L1828+64
 	str	r4, [r3]
 	movw	r4, #65535
 	bl	FtlBbmTblFlush
@@ -13659,13 +13943,13 @@ ftl_low_format:
 	ldr	r0, [r10]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-	ldr	r2, .L1795+68
+	ldr	r2, .L1828+68
 	movs	r3, #0
 	strh	r3, [r6, #2]	@ movhi
 	movs	r1, #255
 	strb	r3, [r6, #6]
 	str	r3, [r2]
-	ldr	r2, .L1795+72
+	ldr	r2, .L1828+72
 	strh	r3, [r6]	@ movhi
 	strh	r3, [r2, #2]	@ movhi
 	strb	r3, [r2, #6]
@@ -13676,30 +13960,30 @@ ftl_low_format:
 	mov	r8, r10
 	strb	r3, [r6, #8]
 	mov	r10, r6
-	ldr	r3, .L1795+76
+	ldr	r3, .L1828+76
 	lsrs	r2, r2, #3
 	ldr	r0, [r3]
 	bl	ftl_memset
-.L1787:
+.L1820:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r6, #7]	@ zero_extendqisi2
 	ldrh	r2, [r6]
 	cmp	r3, #0
-	bne	.L1788
+	bne	.L1821
 	ldr	r3, [r8]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r6]
 	adds	r3, r3, #1
 	strh	r3, [r6]	@ movhi
-	b	.L1787
-.L1774:
+	b	.L1820
+.L1807:
 	mvns	r0, r3
 	orr	r0, r3, r0, lsl #16
 	str	r0, [r4, r3, lsl #2]
 	str	ip, [r7, r3, lsl #2]
-	b	.L1773
-.L1776:
+	b	.L1806
+.L1809:
 	mov	r0, r4
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
@@ -13707,11 +13991,11 @@ ftl_low_format:
 	add	r7, r7, r0
 	uxth	r7, r7
 	uxth	r4, r4
-	b	.L1775
-.L1777:
+	b	.L1808
+.L1810:
 	mov	r0, r7
 	bl	__aeabi_uidiv
-	ldr	r3, .L1795+80
+	ldr	r3, .L1828+80
 	ldr	r3, [r3]
 	add	r0, r0, r3
 	uxth	r0, r0
@@ -13719,26 +14003,26 @@ ftl_low_format:
 	ldrh	r0, [r6]
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	r6, [r8]
-.L1779:
+.L1812:
 	ldrh	r3, [fp]
 	cmp	r3, r6
-	bls	.L1781
+	bls	.L1814
 	mov	r0, r6
 	movs	r1, #1
 	adds	r6, r6, #1
 	bl	FtlLowFormatEraseBlock
 	uxth	r6, r6
-	b	.L1779
-.L1782:
+	b	.L1812
+.L1815:
 	movs	r1, #0
 	bl	FtlLowFormatEraseBlock
 	add	r7, r7, r0
 	uxth	r7, r7
-	b	.L1778
-.L1788:
+	b	.L1811
+.L1821:
 	ldr	r3, [r5]
 	ldrh	r1, [r6, #4]
-	ldr	r4, .L1795+84
+	ldr	r4, .L1828+84
 	str	r3, [r6, #12]
 	adds	r3, r3, #1
 	str	r3, [r5]
@@ -13754,19 +14038,19 @@ ftl_low_format:
 	strh	r3, [r4]	@ movhi
 	movs	r3, #1
 	strb	r3, [r4, #8]
-.L1789:
+.L1822:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r4]
-	cbnz	r3, .L1790
+	cbnz	r3, .L1823
 	ldr	r3, [r8]
 	strh	r6, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	b	.L1789
-.L1790:
+	b	.L1822
+.L1823:
 	ldr	r3, [r5]
 	ldrh	r1, [r4, #4]
 	str	r3, [r4, #12]
@@ -13775,10 +14059,10 @@ ftl_low_format:
 	movw	r4, #65535
 	ldr	r3, [r8]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L1795+88
+	ldr	r3, .L1828+88
 	strh	r4, [r3]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L1795+92
+	ldr	r3, .L1828+92
 	movs	r2, #0
 	strh	r2, [r3, #2]	@ movhi
 	ldr	r2, [r7]
@@ -13791,18 +14075,18 @@ ftl_low_format:
 	str	r2, [r5]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	r0, .L1791
-	ldr	r3, .L1795+96
+	cbnz	r0, .L1824
+	ldr	r3, .L1828+96
 	movs	r2, #1
 	str	r2, [r3]
-.L1791:
+.L1824:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1796:
+.L1829:
 	.align	2
-.L1795:
+.L1828:
 	.word	.LANCHOR4
 	.word	.LANCHOR71
 	.word	.LANCHOR70
@@ -13816,7 +14100,7 @@ ftl_low_format:
 	.word	.LANCHOR7
 	.word	.LANCHOR78
 	.word	.LANCHOR15
-	.word	.LANCHOR180
+	.word	.LANCHOR181
 	.word	.LANCHOR19
 	.word	.LANCHOR51
 	.word	.LANCHOR34
@@ -13845,41 +14129,41 @@ sftl_init:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
 	mov	r3, #-1
-	ldr	r4, .L1803
-	ldr	r1, .L1803+4
-	ldr	r0, .L1803+8
+	ldr	r4, .L1836
+	ldr	r1, .L1836+4
+	ldr	r0, .L1836+8
 	str	r3, [r4]
 	bl	printf
-	ldr	r0, .L1803+12
+	ldr	r0, .L1836+12
 	bl	FtlConstantsInit
 	bl	FtlMemInit
 	bl	FtlVariablesInit
-	ldr	r3, .L1803+16
+	ldr	r3, .L1836+16
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbnz	r0, .L1801
+	cbnz	r0, .L1834
 	bl	FtlSysBlkInit
-	cbnz	r0, .L1801
+	cbnz	r0, .L1834
 	movs	r3, #1
 	str	r3, [r4]
-	ldr	r3, .L1803+20
+	ldr	r3, .L1836+20
 	ldrh	r3, [r3]
 	cmp	r3, #15
-	bhi	.L1801
+	bhi	.L1834
 	movw	r4, #8129
-.L1800:
+.L1833:
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
 	subs	r4, r4, #1
-	bne	.L1800
-.L1801:
+	bne	.L1833
+.L1834:
 	movs	r0, #0
 	pop	{r4, pc}
-.L1804:
+.L1837:
 	.align	2
-.L1803:
+.L1836:
 	.word	.LANCHOR86
 	.word	.LC70
 	.word	.LC71
@@ -14383,7 +14667,7 @@ g_MaxLbaSector:
 	.space	4
 	.section	.bss.g_MaxLbn,"aw",%nobits
 	.align	2
-	.set	.LANCHOR180,. + 0
+	.set	.LANCHOR181,. + 0
 	.type	g_MaxLbn, %object
 	.size	g_MaxLbn, 4
 g_MaxLbn:
@@ -14808,6 +15092,12 @@ gc_ink_free_return_value:
 	.size	gp_ect_tbl_info, 4
 gp_ect_tbl_info:
 	.space	4
+	.section	.bss.gp_flash_check_buf,"aw",%nobits
+	.align	2
+	.type	gp_flash_check_buf, %object
+	.size	gp_flash_check_buf, 262144
+gp_flash_check_buf:
+	.space	262144
 	.section	.bss.gp_gc_page_buf_info,"aw",%nobits
 	.align	2
 	.set	.LANCHOR90,. + 0
@@ -14820,6 +15110,19 @@ gp_gc_page_buf_info:
 	.type	gp_last_act_superblock, %object
 	.size	gp_last_act_superblock, 4
 gp_last_act_superblock:
+	.space	4
+	.section	.bss.idb_buf,"aw",%nobits
+	.align	2
+	.type	idb_buf, %object
+	.size	idb_buf, 262144
+idb_buf:
+	.space	262144
+	.section	.bss.idb_need_write_back,"aw",%nobits
+	.align	2
+	.set	.LANCHOR179,. + 0
+	.type	idb_need_write_back, %object
+	.size	idb_need_write_back, 4
+idb_need_write_back:
 	.space	4
 	.section	.bss.p_blk_mode_table,"aw",%nobits
 	.align	2
@@ -15303,210 +15606,210 @@ power_up_flag:
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",%progbits,1
 .LC1:
 	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
-	.section	.rodata.__func__.10051,"a",%progbits
+	.section	.rodata.__func__.10016,"a",%progbits
+	.set	.LANCHOR171,. + 0
+	.type	__func__.10016, %object
+	.size	__func__.10016, 19
+__func__.10016:
+	.ascii	"FtlGcFreeTempBlock\000"
+	.section	.rodata.__func__.10122,"a",%progbits
 	.set	.LANCHOR175,. + 0
-	.type	__func__.10051, %object
-	.size	__func__.10051, 23
-__func__.10051:
+	.type	__func__.10122, %object
+	.size	__func__.10122, 23
+__func__.10122:
 	.ascii	"rk_ftl_garbage_collect\000"
-	.section	.rodata.__func__.10318,"a",%progbits
+	.section	.rodata.__func__.10389,"a",%progbits
 	.set	.LANCHOR104,. + 0
-	.type	__func__.10318, %object
-	.size	__func__.10318, 15
-__func__.10318:
+	.type	__func__.10389, %object
+	.size	__func__.10389, 15
+__func__.10389:
 	.ascii	"FlashReadPages\000"
-	.section	.rodata.__func__.10335,"a",%progbits
+	.section	.rodata.__func__.10406,"a",%progbits
 	.set	.LANCHOR109,. + 0
-	.type	__func__.10335, %object
-	.size	__func__.10335, 15
-__func__.10335:
+	.type	__func__.10406, %object
+	.size	__func__.10406, 15
+__func__.10406:
 	.ascii	"FlashProgPages\000"
-	.section	.rodata.__func__.8797,"a",%progbits
+	.section	.rodata.__func__.8796,"a",%progbits
 	.set	.LANCHOR138,. + 0
-	.type	__func__.8797, %object
-	.size	__func__.8797, 11
-__func__.8797:
+	.type	__func__.8796, %object
+	.size	__func__.8796, 11
+__func__.8796:
 	.ascii	"FtlMemInit\000"
-	.section	.rodata.__func__.8921,"a",%progbits
+	.section	.rodata.__func__.8920,"a",%progbits
 	.set	.LANCHOR170,. + 0
-	.type	__func__.8921, %object
-	.size	__func__.8921, 13
-__func__.8921:
+	.type	__func__.8920, %object
+	.size	__func__.8920, 13
+__func__.8920:
 	.ascii	"FtlProgPages\000"
-	.section	.rodata.__func__.8949,"a",%progbits
+	.section	.rodata.__func__.8948,"a",%progbits
 	.set	.LANCHOR178,. + 0
-	.type	__func__.8949, %object
-	.size	__func__.8949, 9
-__func__.8949:
+	.type	__func__.8948, %object
+	.size	__func__.8948, 9
+__func__.8948:
 	.ascii	"FtlWrite\000"
-	.section	.rodata.__func__.9023,"a",%progbits
+	.section	.rodata.__func__.9094,"a",%progbits
 	.set	.LANCHOR139,. + 0
-	.type	__func__.9023, %object
-	.size	__func__.9023, 14
-__func__.9023:
+	.type	__func__.9094, %object
+	.size	__func__.9094, 14
+__func__.9094:
 	.ascii	"FtlBbt2Bitmap\000"
-	.section	.rodata.__func__.9066,"a",%progbits
+	.section	.rodata.__func__.9137,"a",%progbits
 	.set	.LANCHOR164,. + 0
-	.type	__func__.9066, %object
-	.size	__func__.9066, 11
-__func__.9066:
+	.type	__func__.9137, %object
+	.size	__func__.9137, 11
+__func__.9137:
 	.ascii	"FtlLoadBbt\000"
-	.section	.rodata.__func__.9183,"a",%progbits
+	.section	.rodata.__func__.9254,"a",%progbits
 	.set	.LANCHOR49,. + 0
-	.type	__func__.9183, %object
-	.size	__func__.9183, 17
-__func__.9183:
+	.type	__func__.9254, %object
+	.size	__func__.9254, 17
+__func__.9254:
 	.ascii	"INSERT_FREE_LIST\000"
-	.section	.rodata.__func__.9188,"a",%progbits
+	.section	.rodata.__func__.9259,"a",%progbits
 	.set	.LANCHOR46,. + 0
-	.type	__func__.9188, %object
-	.size	__func__.9188, 17
-__func__.9188:
+	.type	__func__.9259, %object
+	.size	__func__.9259, 17
+__func__.9259:
 	.ascii	"INSERT_DATA_LIST\000"
-	.section	.rodata.__func__.9219,"a",%progbits
+	.section	.rodata.__func__.9290,"a",%progbits
 	.set	.LANCHOR50,. + 0
-	.type	__func__.9219, %object
-	.size	__func__.9219, 17
-__func__.9219:
+	.type	__func__.9290, %object
+	.size	__func__.9290, 17
+__func__.9290:
 	.ascii	"List_remove_node\000"
-	.section	.rodata.__func__.9251,"a",%progbits
+	.section	.rodata.__func__.9322,"a",%progbits
 	.set	.LANCHOR54,. + 0
-	.type	__func__.9251, %object
-	.size	__func__.9251, 22
-__func__.9251:
+	.type	__func__.9322, %object
+	.size	__func__.9322, 22
+__func__.9322:
 	.ascii	"List_update_data_list\000"
-	.section	.rodata.__func__.9260,"a",%progbits
+	.section	.rodata.__func__.9331,"a",%progbits
 	.set	.LANCHOR140,. + 0
-	.type	__func__.9260, %object
-	.size	__func__.9260, 16
-__func__.9260:
+	.type	__func__.9331, %object
+	.size	__func__.9331, 16
+__func__.9331:
 	.ascii	"load_l2p_region\000"
-	.section	.rodata.__func__.9293,"a",%progbits
+	.section	.rodata.__func__.9364,"a",%progbits
 	.set	.LANCHOR116,. + 0
-	.type	__func__.9293, %object
-	.size	__func__.9293, 26
-__func__.9293:
+	.type	__func__.9364, %object
+	.size	__func__.9364, 26
+__func__.9364:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.section	.rodata.__func__.9304,"a",%progbits
+	.section	.rodata.__func__.9375,"a",%progbits
 	.set	.LANCHOR143,. + 0
-	.type	__func__.9304, %object
-	.size	__func__.9304, 15
-__func__.9304:
+	.type	__func__.9375, %object
+	.size	__func__.9375, 15
+__func__.9375:
 	.ascii	"ftl_map_blk_gc\000"
-	.section	.rodata.__func__.9318,"a",%progbits
+	.section	.rodata.__func__.9389,"a",%progbits
 	.set	.LANCHOR141,. + 0
-	.type	__func__.9318, %object
-	.size	__func__.9318, 31
-__func__.9318:
+	.type	__func__.9389, %object
+	.size	__func__.9389, 31
+__func__.9389:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.section	.rodata.__func__.9332,"a",%progbits
+	.section	.rodata.__func__.9403,"a",%progbits
 	.set	.LANCHOR142,. + 0
-	.type	__func__.9332, %object
-	.size	__func__.9332, 16
-__func__.9332:
+	.type	__func__.9403, %object
+	.size	__func__.9403, 16
+__func__.9403:
 	.ascii	"FtlMapWritePage\000"
-	.section	.rodata.__func__.9357,"a",%progbits
+	.section	.rodata.__func__.9428,"a",%progbits
 	.set	.LANCHOR57,. + 0
-	.type	__func__.9357, %object
-	.size	__func__.9357, 22
-__func__.9357:
+	.type	__func__.9428, %object
+	.size	__func__.9428, 22
+__func__.9428:
 	.ascii	"select_l2p_ram_region\000"
-	.section	.rodata.__func__.9374,"a",%progbits
+	.section	.rodata.__func__.9445,"a",%progbits
 	.set	.LANCHOR145,. + 0
-	.type	__func__.9374, %object
-	.size	__func__.9374, 9
-__func__.9374:
+	.type	__func__.9445, %object
+	.size	__func__.9445, 9
+__func__.9445:
 	.ascii	"log2phys\000"
-	.section	.rodata.__func__.9447,"a",%progbits
+	.section	.rodata.__func__.9518,"a",%progbits
 	.set	.LANCHOR166,. + 0
-	.type	__func__.9447, %object
-	.size	__func__.9447, 15
-__func__.9447:
+	.type	__func__.9518, %object
+	.size	__func__.9518, 15
+__func__.9518:
 	.ascii	"FtlVpcTblFlush\000"
-	.section	.rodata.__func__.9469,"a",%progbits
+	.section	.rodata.__func__.9540,"a",%progbits
 	.set	.LANCHOR148,. + 0
-	.type	__func__.9469, %object
-	.size	__func__.9469, 14
-__func__.9469:
+	.type	__func__.9540, %object
+	.size	__func__.9540, 14
+__func__.9540:
 	.ascii	"FtlScanSysBlk\000"
-	.section	.rodata.__func__.9526,"a",%progbits
-	.set	.LANCHOR179,. + 0
-	.type	__func__.9526, %object
-	.size	__func__.9526, 15
-__func__.9526:
+	.section	.rodata.__func__.9597,"a",%progbits
+	.set	.LANCHOR180,. + 0
+	.type	__func__.9597, %object
+	.size	__func__.9597, 15
+__func__.9597:
 	.ascii	"FtlLoadSysInfo\000"
-	.section	.rodata.__func__.9589,"a",%progbits
+	.section	.rodata.__func__.9660,"a",%progbits
 	.set	.LANCHOR146,. + 0
-	.type	__func__.9589, %object
-	.size	__func__.9589, 16
-__func__.9589:
+	.type	__func__.9660, %object
+	.size	__func__.9660, 16
+__func__.9660:
 	.ascii	"FtlReUsePrevPpa\000"
-	.section	.rodata.__func__.9623,"a",%progbits
+	.section	.rodata.__func__.9694,"a",%progbits
 	.set	.LANCHOR160,. + 0
-	.type	__func__.9623, %object
-	.size	__func__.9623, 22
-__func__.9623:
+	.type	__func__.9694, %object
+	.size	__func__.9694, 22
+__func__.9694:
 	.ascii	"FtlRecoverySuperblock\000"
-	.section	.rodata.__func__.9680,"a",%progbits
+	.section	.rodata.__func__.9751,"a",%progbits
 	.set	.LANCHOR60,. + 0
-	.type	__func__.9680, %object
-	.size	__func__.9680, 16
-__func__.9680:
+	.type	__func__.9751, %object
+	.size	__func__.9751, 16
+__func__.9751:
 	.ascii	"make_superblock\000"
-	.section	.rodata.__func__.9701,"a",%progbits
+	.section	.rodata.__func__.9772,"a",%progbits
 	.set	.LANCHOR154,. + 0
-	.type	__func__.9701, %object
-	.size	__func__.9701, 18
-__func__.9701:
+	.type	__func__.9772, %object
+	.size	__func__.9772, 18
+__func__.9772:
 	.ascii	"SupperBlkListInit\000"
-	.section	.rodata.__func__.9726,"a",%progbits
+	.section	.rodata.__func__.9797,"a",%progbits
 	.set	.LANCHOR168,. + 0
-	.type	__func__.9726, %object
-	.size	__func__.9726, 21
-__func__.9726:
+	.type	__func__.9797, %object
+	.size	__func__.9797, 21
+__func__.9797:
 	.ascii	"FtlVpcCheckAndModify\000"
-	.section	.rodata.__func__.9742,"a",%progbits
+	.section	.rodata.__func__.9813,"a",%progbits
 	.set	.LANCHOR155,. + 0
-	.type	__func__.9742, %object
-	.size	__func__.9742, 14
-__func__.9742:
+	.type	__func__.9813, %object
+	.size	__func__.9813, 14
+__func__.9813:
 	.ascii	"ftl_check_vpc\000"
-	.section	.rodata.__func__.9827,"a",%progbits
+	.section	.rodata.__func__.9898,"a",%progbits
 	.set	.LANCHOR157,. + 0
-	.type	__func__.9827, %object
-	.size	__func__.9827, 25
-__func__.9827:
+	.type	__func__.9898, %object
+	.size	__func__.9898, 25
+__func__.9898:
 	.ascii	"allocate_data_superblock\000"
-	.section	.rodata.__func__.9848,"a",%progbits
+	.section	.rodata.__func__.9919,"a",%progbits
 	.set	.LANCHOR169,. + 0
-	.type	__func__.9848, %object
-	.size	__func__.9848, 29
-__func__.9848:
+	.type	__func__.9919, %object
+	.size	__func__.9919, 29
+__func__.9919:
 	.ascii	"allocate_new_data_superblock\000"
-	.section	.rodata.__func__.9855,"a",%progbits
+	.section	.rodata.__func__.9926,"a",%progbits
 	.set	.LANCHOR88,. + 0
-	.type	__func__.9855, %object
-	.size	__func__.9855, 19
-__func__.9855:
+	.type	__func__.9926, %object
+	.size	__func__.9926, 19
+__func__.9926:
 	.ascii	"get_new_active_ppa\000"
-	.section	.rodata.__func__.9868,"a",%progbits
+	.section	.rodata.__func__.9939,"a",%progbits
 	.set	.LANCHOR158,. + 0
-	.type	__func__.9868, %object
-	.size	__func__.9868, 16
-__func__.9868:
+	.type	__func__.9939, %object
+	.size	__func__.9939, 16
+__func__.9939:
 	.ascii	"update_vpc_list\000"
-	.section	.rodata.__func__.9875,"a",%progbits
+	.section	.rodata.__func__.9946,"a",%progbits
 	.set	.LANCHOR159,. + 0
-	.type	__func__.9875, %object
-	.size	__func__.9875, 20
-__func__.9875:
+	.type	__func__.9946, %object
+	.size	__func__.9946, 20
+__func__.9946:
 	.ascii	"decrement_vpc_count\000"
-	.section	.rodata.__func__.9945,"a",%progbits
-	.set	.LANCHOR171,. + 0
-	.type	__func__.9945, %object
-	.size	__func__.9945, 19
-__func__.9945:
-	.ascii	"FtlGcFreeTempBlock\000"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",%progbits,1
 .LC101:
 	.ascii	"decrement_vpc_count %x = %d\012\000"
@@ -15552,4 +15855,7 @@ __func__.9945:
 	.ascii	"SFTL version: 5.0.44 20180713\000"
 .LC71:
 	.ascii	"%s\012\000"
+	.section	.rodata.sftl_write.str1.1,"aMS",%progbits,1
+.LC109:
+	.ascii	"write_idblock fail! %x %x %x %x\012\000"
 	.hidden	free
diff --git a/drivers/rkflash/rk_sftl_arm_v8.S b/drivers/rkflash/rk_sftl_arm_v8.S
index 087e6f9c3a..4211de05f7 100644
--- a/drivers/rkflash/rk_sftl_arm_v8.S
+++ b/drivers/rkflash/rk_sftl_arm_v8.S
@@ -2,7 +2,7 @@
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:	GPL-2.0
- * date: 2018-07-21
+ * date: 2018-08-02
  */
 	.arch armv8-a+nosimd
 	.file	"rk_sftl.c"
@@ -11494,11 +11494,287 @@ FtlWrite:
 	.global	sftl_write
 	.type	sftl_write, %function
 sftl_write:
-	mov	x3, x2
-	mov	w2, w1
-	mov	w1, w0
+	stp	x29, x30, [sp, -240]!
+	add	w4, w0, w1
+	sub	w5, w4, #1
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	cmp	w5, 63
+	stp	x21, x22, [sp, 32]
+	mov	w20, w0
+	stp	x23, x24, [sp, 48]
+	mov	w22, w1
+	stp	x25, x26, [sp, 64]
+	mov	x24, x2
+	stp	x27, x28, [sp, 80]
+	adrp	x25, .LANCHOR179
+	bls	.L1568
+	cmp	w0, 576
+	bls	.L1569
+.L1568:
+	ldr	w0, [x25, #:lo12:.LANCHOR179]
+	cbz	w0, .L1570
+	adrp	x2, .LANCHOR0
+	add	x1, x2, :lo12:.LANCHOR0
+	mov	w21, 512
+	adrp	x3, idb_buf
+	mov	x4, -49148
+	stp	x3, x2, [x29, 144]
+	ldrh	w0, [x1, 14]
+	add	x2, x3, :lo12:idb_buf
+	ldrh	w1, [x1, 10]
+	mov	x7, 262140
+	str	w0, [x29, 172]
+	and	w0, w0, 255
+	mov	w5, 4097
+	movk	x4, 0xfffc, lsl 16
+	mul	w0, w0, w1
+	mov	x1, 0
+	and	w0, w0, 65535
+	str	w0, [x29, 168]
+	udiv	w21, w21, w0
+	mov	w0, 0
+.L1574:
+	add	x3, x1, x7
+	ldr	w6, [x3, x2]
+	cbz	w6, .L1571
+.L1575:
+	ldr	w0, [x29, 168]
+	mov	w19, 0
+	mov	w26, 0
+	mul	w0, w0, w21
+	stp	w0, wzr, [x29, 160]
+	adrp	x0, .LANCHOR105
+	add	x23, x0, :lo12:.LANCHOR105
+.L1572:
+	adrp	x5, gp_flash_check_buf
+	mov	x2, 512
+	mov	w1, 0
+	add	x0, x5, :lo12:gp_flash_check_buf
+	str	x5, [x29, 136]
+	bl	memset
+	ldr	x0, [x29, 152]
+	add	x0, x0, :lo12:.LANCHOR0
+	ldrh	w3, [x0, 14]
+	ldrh	w2, [x0, 10]
+	adrp	x0, .LANCHOR105
+	and	w27, w3, 255
+	add	x4, x0, :lo12:.LANCHOR105
+	str	w3, [x29, 120]
+	mov	w0, 0
+	udiv	w1, w19, w3
+	str	x4, [x29, 112]
+	mul	w2, w27, w2
+	ldr	x6, [x4, 8]
+	str	w27, [x29, 128]
+	and	w28, w2, 65535
+	blr	x6
+	cmp	w28, 511
+	ldr	w3, [x29, 120]
+	ldr	x4, [x29, 112]
+	bhi	.L1576
+	add	w1, w28, w19
+	ldr	x4, [x4, 8]
+	mov	w0, 0
+	udiv	w1, w1, w3
+	blr	x4
+.L1576:
+	udiv	w5, w19, w28
+	ldr	x0, [x29, 144]
+	mov	w4, 0
+	mov	w7, 61424
+	add	x8, x0, :lo12:idb_buf
+	msub	w5, w5, w28, w19
+	sub	w6, w19, w5
+.L1577:
+	cmp	w4, 511
+	bls	.L1578
+	ldr	x0, [x29, 152]
+	mov	w27, 0
+	add	x0, x0, :lo12:.LANCHOR0
+	ldrh	w4, [x0, 14]
+	ldrh	w5, [x0, 10]
+	and	w28, w4, 255
+	mov	w4, w28
+	mul	w5, w28, w5
+	and	w0, w5, 65535
+	udiv	w5, w19, w0
+	msub	w5, w5, w0, w19
+	and	w1, w5, 65535
+	sub	w6, w19, w5
+	sdiv	w0, w1, w28
+	msub	w0, w0, w28, w1
+	ldr	x1, [x29, 136]
+	and	w0, w0, 65535
+	add	x8, x1, :lo12:gp_flash_check_buf
+.L1579:
+	cmp	w27, 511
+	bhi	.L1583
+	add	w1, w5, w27
+	sub	w7, w4, w0
+	add	w0, w0, w6
+	ldr	x10, [x23, 24]
+	and	w7, w7, 65535
+	ubfiz	x2, x27, 9, 16
+	udiv	w1, w1, w28
+	add	x2, x8, x2
+	stp	w4, w7, [x29, 104]
+	add	x3, x29, 176
+	str	w5, [x29, 112]
+	str	w6, [x29, 120]
+	and	w1, w1, 65535
+	str	x8, [x29, 128]
+	madd	w1, w1, w28, w0
+	mov	w0, 0
+	udiv	w1, w1, w28
+	blr	x10
+	cmn	w0, #1
+	ldp	w4, w7, [x29, 104]
+	ldr	w5, [x29, 112]
+	ldr	w6, [x29, 120]
+	ldr	x8, [x29, 128]
+	bne	.L1580
+.L1583:
+	ldr	x0, [x29, 144]
+	mov	x27, 0
+	add	x1, x0, :lo12:idb_buf
+	ldr	x0, [x29, 136]
+	add	x28, x0, :lo12:gp_flash_check_buf
+.L1581:
+	lsl	x0, x27, 2
+	add	x3, x0, x1
+	ldr	w2, [x0, x28]
+	ldr	w0, [x0, x1]
+	cmp	w2, w0
+	beq	.L1584
+	mov	x2, 512
+	mov	w1, 0
+	str	x3, [x29, 128]
+	mov	x0, x28
+	str	w27, [x29, 136]
+	bl	memset
+	ldr	w5, [x29, 136]
+	mov	w4, w27
+	ldr	x3, [x29, 128]
+	mov	w1, w19
+	adrp	x0, .LC109
+	add	x0, x0, :lo12:.LC109
+	ldr	w2, [x28, w5, uxtw 2]
+	ldr	w3, [x3]
+	bl	printf
+	ldr	w0, [x29, 172]
+	ldr	x2, [x23, 8]
+	udiv	w1, w19, w0
+	mov	w0, 0
+	blr	x2
+	cmp	w21, 1
+	bls	.L1585
+	ldr	w0, [x29, 168]
+	ldr	x2, [x23, 8]
+	add	w1, w0, w19
+	ldr	w0, [x29, 172]
+	udiv	w1, w1, w0
+	mov	w0, 0
+	blr	x2
+.L1585:
+	ldr	w0, [x29, 160]
+	add	w26, w26, w21
+	cmp	w26, 15
+	add	w19, w19, w0
+	bls	.L1572
+.L1590:
+	str	wzr, [x25, #:lo12:.LANCHOR179]
+.L1570:
+	mov	x3, x24
+	mov	w2, w22
+	mov	w1, w20
+	mov	w0, 0
+	bl	FtlWrite
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 240
+	ret
+.L1571:
+	ldr	w6, [x2, w0, uxtw 2]
+	add	w0, w0, 1
+	str	w6, [x3, x2]
+	cmp	w0, w5
+	sub	x1, x1, #4
+	csel	w0, w0, wzr, cc
+	cmp	x1, x4
+	bne	.L1574
+	b	.L1575
+.L1578:
+	add	w0, w5, w4
+	ldr	x10, [x23, 16]
+	ubfiz	x2, x4, 9, 16
+	stp	w5, w7, [x29, 100]
+	add	x2, x8, x2
+	stp	w4, w6, [x29, 108]
+	udiv	w0, w0, w27
+	str	x8, [x29, 120]
+	add	x3, x29, 176
+	and	w0, w0, 65535
+	mul	w1, w0, w27
+	stp	w1, w7, [x29, 176]
+	udiv	w1, w6, w27
+	add	w1, w1, w0
 	mov	w0, 0
-	b	FtlWrite
+	blr	x10
+	ldp	w4, w6, [x29, 108]
+	ldr	w0, [x29, 128]
+	ldp	w5, w7, [x29, 100]
+	add	w4, w0, w4
+	and	w4, w4, 65535
+	ldr	x8, [x29, 120]
+	b	.L1577
+.L1580:
+	add	w27, w7, w27
+	mov	w0, 0
+	and	w27, w27, 65535
+	b	.L1579
+.L1584:
+	add	x27, x27, 1
+	cmp	x27, 65536
+	bne	.L1581
+	ldr	w0, [x29, 164]
+	add	w0, w0, 1
+	str	w0, [x29, 164]
+	cmp	w0, 5
+	bls	.L1585
+	b	.L1590
+.L1569:
+	cmp	w0, 63
+	adrp	x3, idb_buf
+	bhi	.L1587
+	mov	w1, 64
+	sub	w1, w1, w0
+	sub	w2, w22, w1
+	ubfiz	x1, x1, 9, 25
+	add	x1, x24, x1
+	add	x0, x3, :lo12:idb_buf
+.L1588:
+	mov	w3, 1
+	str	w3, [x25, #:lo12:.LANCHOR179]
+	cmp	w5, 576
+	bls	.L1589
+	sub	w2, w2, w4
+	sub	w2, w2, #447
+.L1589:
+	lsl	w2, w2, 9
+	bl	memcpy
+	b	.L1570
+.L1587:
+	lsl	w0, w0, 7
+	add	x3, x3, :lo12:idb_buf
+	sub	w0, w0, #8192
+	mov	x1, x2
+	add	x0, x3, x0, lsl 2
+	mov	w2, w22
+	b	.L1588
 	.size	sftl_write, .-sftl_write
 	.section	.text.FtlLoadSysInfo,"ax",@progbits
 	.align	2
@@ -11531,10 +11807,10 @@ FtlLoadSysInfo:
 	ldrh	w0, [x20, #:lo12:.LANCHOR79]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L1569
-.L1577:
+	bne	.L1601
+.L1609:
 	mov	w0, -1
-.L1568:
+.L1600:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -11542,7 +11818,7 @@ FtlLoadSysInfo:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1569:
+.L1601:
 	add	x27, x20, :lo12:.LANCHOR79
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
@@ -11552,28 +11828,28 @@ FtlLoadSysInfo:
 	strh	w0, [x27, 2]
 	mov	w27, 19539
 	movk	w27, 0x4654, lsl 16
-.L1571:
-	tbz	w22, #31, .L1574
-	adrp	x1, .LANCHOR179
+.L1603:
+	tbz	w22, #31, .L1606
+	adrp	x1, .LANCHOR180
 	adrp	x0, .LC1
 	mov	w2, 1437
-	add	x1, x1, :lo12:.LANCHOR179
+	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1573:
+.L1605:
 	adrp	x1, .LANCHOR23
 	ldrh	w0, [x24, #:lo12:.LANCHOR5]
 	ldrh	w1, [x1, #:lo12:.LANCHOR23]
 	add	x0, x0, 24
 	cmp	x1, x0, lsl 1
-	bcs	.L1576
-	adrp	x1, .LANCHOR179
+	bcs	.L1608
+	adrp	x1, .LANCHOR180
 	adrp	x0, .LC1
 	mov	w2, 1439
-	add	x1, x1, :lo12:.LANCHOR179
+	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1576:
+.L1608:
 	add	x22, x19, :lo12:.LANCHOR106
 	adrp	x19, .LANCHOR39
 	add	x21, x19, :lo12:.LANCHOR39
@@ -11602,7 +11878,7 @@ FtlLoadSysInfo:
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1577
+	bne	.L1609
 	add	x20, x20, :lo12:.LANCHOR79
 	adrp	x0, .LANCHOR10
 	ldrh	w1, [x21, 8]
@@ -11610,11 +11886,11 @@ FtlLoadSysInfo:
 	ldrh	w0, [x0, #:lo12:.LANCHOR10]
 	strh	w1, [x20, 6]
 	cmp	w2, w0
-	bne	.L1577
-	adrp	x0, .LANCHOR180
+	bne	.L1609
+	adrp	x0, .LANCHOR181
 	adrp	x2, .LANCHOR61
 	adrp	x3, .LANCHOR3
-	str	w1, [x0, #:lo12:.LANCHOR180]
+	str	w1, [x0, #:lo12:.LANCHOR181]
 	adrp	x0, .LANCHOR19
 	ldrh	w3, [x3, #:lo12:.LANCHOR3]
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
@@ -11635,14 +11911,14 @@ FtlLoadSysInfo:
 	udiv	w0, w0, w3
 	adrp	x3, .LANCHOR78
 	strh	w0, [x3, #:lo12:.LANCHOR78]
-	bls	.L1578
-	adrp	x1, .LANCHOR179
+	bls	.L1610
+	adrp	x1, .LANCHOR180
 	adrp	x0, .LC1
 	mov	w2, 1461
-	add	x1, x1, :lo12:.LANCHOR179
+	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1578:
+.L1610:
 	add	x1, x19, :lo12:.LANCHOR39
 	adrp	x0, .LANCHOR51
 	add	x3, x0, :lo12:.LANCHOR51
@@ -11707,47 +11983,47 @@ FtlLoadSysInfo:
 	adrp	x1, .LANCHOR70
 	ldr	w5, [x1, #:lo12:.LANCHOR70]
 	cmp	w3, w5
-	bls	.L1579
+	bls	.L1611
 	str	w3, [x1, #:lo12:.LANCHOR70]
-.L1579:
+.L1611:
 	add	x19, x19, :lo12:.LANCHOR39
 	adrp	x1, .LANCHOR71
 	ldr	w3, [x1, #:lo12:.LANCHOR71]
 	ldr	w2, [x19, 36]
 	cmp	w2, w3
-	bls	.L1580
+	bls	.L1612
 	str	w2, [x1, #:lo12:.LANCHOR71]
-.L1580:
+.L1612:
 	mov	w1, 65535
 	cmp	w6, w1
-	beq	.L1581
+	beq	.L1613
 	add	x0, x0, :lo12:.LANCHOR51
 	bl	make_superblock
-.L1581:
+.L1613:
 	ldrh	w2, [x21, #:lo12:.LANCHOR52]
 	mov	w1, 65535
 	add	x0, x21, :lo12:.LANCHOR52
 	cmp	w2, w1
-	beq	.L1582
+	beq	.L1614
 	bl	make_superblock
-.L1582:
+.L1614:
 	ldrh	w2, [x22, #:lo12:.LANCHOR53]
 	mov	w1, 65535
 	add	x0, x22, :lo12:.LANCHOR53
 	cmp	w2, w1
-	beq	.L1583
+	beq	.L1615
 	bl	make_superblock
-.L1583:
+.L1615:
 	ldrh	w2, [x20, #:lo12:.LANCHOR80]
 	mov	w1, 65535
 	add	x0, x20, :lo12:.LANCHOR80
 	cmp	w2, w1
-	beq	.L1584
+	beq	.L1616
 	bl	make_superblock
-.L1584:
+.L1616:
 	mov	w0, 0
-	b	.L1568
-.L1574:
+	b	.L1600
+.L1606:
 	ldrh	w0, [x20, #:lo12:.LANCHOR79]
 	mov	w2, 1
 	mov	w1, w2
@@ -11759,19 +12035,19 @@ FtlLoadSysInfo:
 	bl	FlashReadPages
 	ldr	w0, [x21]
 	cmn	w0, #1
-	beq	.L1572
+	beq	.L1604
 	ldr	x0, [x23, #:lo12:.LANCHOR107]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L1572
+	bne	.L1604
 	ldr	x0, [x26, #:lo12:.LANCHOR108]
 	ldrh	w0, [x0]
 	cmp	w0, w28
-	beq	.L1573
-.L1572:
+	beq	.L1605
+.L1604:
 	sub	w22, w22, #1
 	sxth	w22, w22
-	b	.L1571
+	b	.L1603
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
 	.section	.text.FtlSysBlkInit,"ax",@progbits
 	.align	2
@@ -11793,20 +12069,20 @@ FtlSysBlkInit:
 	ldrh	w1, [x0, #:lo12:.LANCHOR79]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1591
-.L1593:
+	bne	.L1623
+.L1625:
 	mov	w23, -1
-.L1590:
+.L1622:
 	mov	w0, w23
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1591:
+.L1623:
 	bl	FtlLoadSysInfo
 	mov	w23, w0
-	cbnz	w0, .L1593
+	cbnz	w0, .L1625
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -11822,12 +12098,12 @@ FtlSysBlkInit:
 	ldr	x1, [x0, #:lo12:.LANCHOR55]
 	mov	w0, 0
 	add	x1, x1, 4
-.L1594:
+.L1626:
 	cmp	w0, w2
-	bge	.L1599
+	bge	.L1631
 	ldr	w3, [x1], 16
-	tbz	w3, #31, .L1595
-.L1599:
+	tbz	w3, #31, .L1627
+.L1631:
 	adrp	x19, .LANCHOR39
 	add	x3, x19, :lo12:.LANCHOR39
 	cmp	w0, w2
@@ -11835,8 +12111,8 @@ FtlSysBlkInit:
 	ldrh	w1, [x3, 28]
 	add	w1, w1, 1
 	strh	w1, [x3, 28]
-	bge	.L1603
-.L1596:
+	bge	.L1635
+.L1628:
 	add	x21, x22, :lo12:.LANCHOR51
 	adrp	x24, .LANCHOR52
 	mov	x0, x21
@@ -11879,19 +12155,19 @@ FtlSysBlkInit:
 	strh	w0, [x1, 30]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1605:
+.L1637:
 	bl	FtlVpcTblFlush
 	add	x21, x22, :lo12:.LANCHOR51
 	ldrh	w0, [x22, #:lo12:.LANCHOR51]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L1602
+	beq	.L1634
 	ldrh	w1, [x21, 4]
-	cbnz	w1, .L1602
+	cbnz	w1, .L1634
 	adrp	x22, .LANCHOR52
 	add	x20, x22, :lo12:.LANCHOR52
 	ldrh	w1, [x20, 4]
-	cbnz	w1, .L1602
+	cbnz	w1, .L1634
 	bl	FtlGcRefreshBlock
 	ldrh	w0, [x22, #:lo12:.LANCHOR52]
 	bl	FtlGcRefreshBlock
@@ -11899,21 +12175,21 @@ FtlSysBlkInit:
 	bl	allocate_new_data_superblock
 	mov	x0, x20
 	bl	allocate_new_data_superblock
-.L1602:
+.L1634:
 	add	x19, x19, :lo12:.LANCHOR39
 	ldrh	w0, [x19, 28]
 	tst	x0, 31
-	bne	.L1590
+	bne	.L1622
 	bl	FtlVpcCheckAndModify
-	b	.L1590
-.L1595:
+	b	.L1622
+.L1627:
 	add	w0, w0, 1
-	b	.L1594
-.L1603:
+	b	.L1626
+.L1635:
 	ldrh	w0, [x20, #:lo12:.LANCHOR161]
-	cbnz	w0, .L1596
+	cbnz	w0, .L1628
 	bl	l2p_flush
-	b	.L1605
+	b	.L1637
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.section	.text.ftl_low_format,"ax",@progbits
 	.align	2
@@ -11934,9 +12210,9 @@ ftl_low_format:
 	str	wzr, [x20, #:lo12:.LANCHOR70]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	w0, .L1607
+	cbz	w0, .L1639
 	bl	FtlMakeBbt
-.L1607:
+.L1639:
 	adrp	x23, .LANCHOR12
 	adrp	x0, .LANCHOR115
 	mov	w6, 23752
@@ -11947,31 +12223,31 @@ ftl_low_format:
 	lsl	w1, w1, 7
 	ldr	x5, [x0, #:lo12:.LANCHOR113]
 	mov	w0, 0
-.L1608:
+.L1640:
 	cmp	w0, w1
-	blt	.L1609
+	blt	.L1641
 	adrp	x21, .LANCHOR5
 	adrp	x22, .LANCHOR6
 	add	x26, x22, :lo12:.LANCHOR6
 	mov	w19, 0
 	ldrh	w25, [x21, #:lo12:.LANCHOR5]
-.L1610:
+.L1642:
 	ldrh	w0, [x26]
 	cmp	w0, w25
-	bhi	.L1611
+	bhi	.L1643
 	adrp	x25, .LANCHOR3
 	sub	w1, w19, #2
 	ldrh	w0, [x25, #:lo12:.LANCHOR3]
 	cmp	w1, w0, lsl 1
-	bgt	.L1612
-.L1616:
+	bgt	.L1644
+.L1648:
 	add	x26, x21, :lo12:.LANCHOR5
 	mov	w19, 0
 	mov	w24, 0
-.L1613:
+.L1645:
 	ldrh	w0, [x26]
 	cmp	w0, w24
-	bhi	.L1617
+	bhi	.L1649
 	adrp	x0, .LANCHOR112
 	ldrh	w1, [x22, #:lo12:.LANCHOR6]
 	ldrh	w4, [x25, #:lo12:.LANCHOR3]
@@ -11988,37 +12264,37 @@ ftl_low_format:
 	mov	w6, 24
 	mul	w6, w4, w6
 	cmp	w19, w6
-	ble	.L1618
+	ble	.L1650
 	sub	w1, w1, w19
 	udiv	w1, w1, w4
 	str	w1, [x3, #:lo12:.LANCHOR61]
 	lsr	w1, w1, 5
 	add	w1, w1, 24
 	strh	w1, [x2, #:lo12:.LANCHOR78]
-.L1618:
+.L1650:
 	adrp	x1, .LANCHOR15
 	ldrh	w1, [x1, #:lo12:.LANCHOR15]
-	cbz	w1, .L1620
+	cbz	w1, .L1652
 	ldrh	w6, [x2, #:lo12:.LANCHOR78]
 	add	w6, w6, w1, lsr 1
 	strh	w6, [x2, #:lo12:.LANCHOR78]
 	mul	w6, w1, w4
 	cmp	w19, w6
-	bge	.L1620
+	bge	.L1652
 	add	w1, w1, 32
 	str	w5, [x3, #:lo12:.LANCHOR61]
 	add	w1, w0, w1
 	strh	w1, [x2, #:lo12:.LANCHOR78]
-.L1620:
+.L1652:
 	ldrh	w1, [x2, #:lo12:.LANCHOR78]
-	adrp	x25, .LANCHOR180
+	adrp	x25, .LANCHOR181
 	ldr	w0, [x3, #:lo12:.LANCHOR61]
 	adrp	x24, .LANCHOR42
 	sub	w0, w0, w1
 	adrp	x1, .LANCHOR19
 	ldrh	w1, [x1, #:lo12:.LANCHOR19]
 	mul	w0, w0, w4
-	str	w0, [x25, #:lo12:.LANCHOR180]
+	str	w0, [x25, #:lo12:.LANCHOR181]
 	mul	w0, w1, w0
 	ldrh	w1, [x23, #:lo12:.LANCHOR12]
 	str	w0, [x3, #:lo12:.LANCHOR61]
@@ -12053,20 +12329,20 @@ ftl_low_format:
 	ldr	x0, [x0, #:lo12:.LANCHOR1]
 	strb	wzr, [x19, 6]
 	bl	ftl_memset
-.L1622:
+.L1654:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1623
+	cbnz	w1, .L1655
 	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L1622
-.L1609:
+	b	.L1654
+.L1641:
 	ubfiz	x3, x0, 2, 16
 	mvn	w2, w0
 	orr	w2, w0, w2, lsl 16
@@ -12074,8 +12350,8 @@ ftl_low_format:
 	and	w0, w0, 65535
 	str	w2, [x4, x3]
 	str	w6, [x5, x3]
-	b	.L1608
-.L1611:
+	b	.L1640
+.L1643:
 	mov	w0, w25
 	mov	w1, 1
 	add	w25, w25, 1
@@ -12083,8 +12359,8 @@ ftl_low_format:
 	add	w19, w19, w0
 	and	w25, w25, 65535
 	and	w19, w19, 65535
-	b	.L1610
-.L1612:
+	b	.L1642
+.L1644:
 	udiv	w0, w19, w0
 	adrp	x1, .LANCHOR31
 	ldr	w19, [x1, #:lo12:.LANCHOR31]
@@ -12094,17 +12370,17 @@ ftl_low_format:
 	add	x24, x22, :lo12:.LANCHOR6
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	w19, [x21, #:lo12:.LANCHOR5]
-.L1614:
+.L1646:
 	ldrh	w0, [x24]
 	cmp	w0, w19
-	bls	.L1616
+	bls	.L1648
 	mov	w0, w19
 	add	w19, w19, 1
 	mov	w1, 1
 	and	w19, w19, 65535
 	bl	FtlLowFormatEraseBlock
-	b	.L1614
-.L1617:
+	b	.L1646
+.L1649:
 	mov	w0, w24
 	mov	w1, 0
 	add	w24, w24, 1
@@ -12112,8 +12388,8 @@ ftl_low_format:
 	add	w19, w19, w0
 	and	w24, w24, 65535
 	and	w19, w19, 65535
-	b	.L1613
-.L1623:
+	b	.L1645
+.L1655:
 	ldr	w1, [x20, #:lo12:.LANCHOR70]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
@@ -12133,20 +12409,20 @@ ftl_low_format:
 	mov	w1, 1
 	strb	wzr, [x0, 6]
 	strb	w1, [x0, 8]
-.L1624:
+.L1656:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1625
+	cbnz	w1, .L1657
 	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L1624
-.L1625:
+	b	.L1656
+.L1657:
 	ldr	w1, [x20, #:lo12:.LANCHOR70]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
@@ -12162,7 +12438,7 @@ ftl_low_format:
 	adrp	x2, .LANCHOR79
 	add	x1, x2, :lo12:.LANCHOR79
 	strh	w0, [x2, #:lo12:.LANCHOR79]
-	ldr	w0, [x25, #:lo12:.LANCHOR180]
+	ldr	w0, [x25, #:lo12:.LANCHOR181]
 	strh	w0, [x1, 6]
 	ldr	w0, [x20, #:lo12:.LANCHOR70]
 	str	w0, [x1, 8]
@@ -12172,11 +12448,11 @@ ftl_low_format:
 	str	w0, [x20, #:lo12:.LANCHOR70]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	w0, .L1626
+	cbnz	w0, .L1658
 	adrp	x0, .LANCHOR86
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR86]
-.L1626:
+.L1658:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -12210,23 +12486,23 @@ sftl_init:
 	ldrh	w0, [x0, #:lo12:.LANCHOR4]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbnz	w0, .L1635
+	cbnz	w0, .L1667
 	bl	FtlSysBlkInit
-	cbnz	w0, .L1635
+	cbnz	w0, .L1667
 	mov	w0, 1
 	str	w0, [x19, #:lo12:.LANCHOR86]
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 15
-	bhi	.L1635
+	bhi	.L1667
 	mov	w19, 8129
-.L1634:
+.L1666:
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
 	subs	w19, w19, #1
-	bne	.L1634
-.L1635:
+	bne	.L1666
+.L1667:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -12722,7 +12998,7 @@ g_MaxLbaSector:
 	.zero	4
 	.section	.bss.g_MaxLbn,"aw",@nobits
 	.align	2
-	.set	.LANCHOR180,. + 0
+	.set	.LANCHOR181,. + 0
 	.type	g_MaxLbn, %object
 	.size	g_MaxLbn, 4
 g_MaxLbn:
@@ -13147,6 +13423,12 @@ gc_ink_free_return_value:
 	.size	gp_ect_tbl_info, 8
 gp_ect_tbl_info:
 	.zero	8
+	.section	.bss.gp_flash_check_buf,"aw",@nobits
+	.align	3
+	.type	gp_flash_check_buf, %object
+	.size	gp_flash_check_buf, 262144
+gp_flash_check_buf:
+	.zero	262144
 	.section	.bss.gp_gc_page_buf_info,"aw",@nobits
 	.align	3
 	.set	.LANCHOR90,. + 0
@@ -13160,6 +13442,19 @@ gp_gc_page_buf_info:
 	.size	gp_last_act_superblock, 8
 gp_last_act_superblock:
 	.zero	8
+	.section	.bss.idb_buf,"aw",@nobits
+	.align	3
+	.type	idb_buf, %object
+	.size	idb_buf, 262144
+idb_buf:
+	.zero	262144
+	.section	.bss.idb_need_write_back,"aw",@nobits
+	.align	2
+	.set	.LANCHOR179,. + 0
+	.type	idb_need_write_back, %object
+	.size	idb_need_write_back, 4
+idb_need_write_back:
+	.zero	4
 	.section	.bss.p_blk_mode_table,"aw",@nobits
 	.align	3
 	.set	.LANCHOR1,. + 0
@@ -13640,243 +13935,243 @@ power_up_flag:
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",@progbits,1
 .LC1:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
-	.section	.rodata.__func__.6058,"a",@progbits
+	.section	.rodata.__func__.6109,"a",@progbits
 	.align	3
 	.set	.LANCHOR138,. + 0
-	.type	__func__.6058, %object
-	.size	__func__.6058, 11
-__func__.6058:
+	.type	__func__.6109, %object
+	.size	__func__.6109, 11
+__func__.6109:
 	.string	"FtlMemInit"
-	.section	.rodata.__func__.6182,"a",@progbits
+	.section	.rodata.__func__.6233,"a",@progbits
 	.align	3
 	.set	.LANCHOR170,. + 0
-	.type	__func__.6182, %object
-	.size	__func__.6182, 13
-__func__.6182:
+	.type	__func__.6233, %object
+	.size	__func__.6233, 13
+__func__.6233:
 	.string	"FtlProgPages"
-	.section	.rodata.__func__.6210,"a",@progbits
+	.section	.rodata.__func__.6261,"a",@progbits
 	.align	3
 	.set	.LANCHOR178,. + 0
-	.type	__func__.6210, %object
-	.size	__func__.6210, 9
-__func__.6210:
+	.type	__func__.6261, %object
+	.size	__func__.6261, 9
+__func__.6261:
 	.string	"FtlWrite"
-	.section	.rodata.__func__.6284,"a",@progbits
+	.section	.rodata.__func__.6407,"a",@progbits
 	.align	3
 	.set	.LANCHOR139,. + 0
-	.type	__func__.6284, %object
-	.size	__func__.6284, 14
-__func__.6284:
+	.type	__func__.6407, %object
+	.size	__func__.6407, 14
+__func__.6407:
 	.string	"FtlBbt2Bitmap"
-	.section	.rodata.__func__.6327,"a",@progbits
+	.section	.rodata.__func__.6450,"a",@progbits
 	.align	3
 	.set	.LANCHOR164,. + 0
-	.type	__func__.6327, %object
-	.size	__func__.6327, 11
-__func__.6327:
+	.type	__func__.6450, %object
+	.size	__func__.6450, 11
+__func__.6450:
 	.string	"FtlLoadBbt"
-	.section	.rodata.__func__.6444,"a",@progbits
+	.section	.rodata.__func__.6567,"a",@progbits
 	.align	3
 	.set	.LANCHOR49,. + 0
-	.type	__func__.6444, %object
-	.size	__func__.6444, 17
-__func__.6444:
+	.type	__func__.6567, %object
+	.size	__func__.6567, 17
+__func__.6567:
 	.string	"INSERT_FREE_LIST"
-	.section	.rodata.__func__.6449,"a",@progbits
+	.section	.rodata.__func__.6572,"a",@progbits
 	.align	3
 	.set	.LANCHOR46,. + 0
-	.type	__func__.6449, %object
-	.size	__func__.6449, 17
-__func__.6449:
+	.type	__func__.6572, %object
+	.size	__func__.6572, 17
+__func__.6572:
 	.string	"INSERT_DATA_LIST"
-	.section	.rodata.__func__.6480,"a",@progbits
+	.section	.rodata.__func__.6603,"a",@progbits
 	.align	3
 	.set	.LANCHOR50,. + 0
-	.type	__func__.6480, %object
-	.size	__func__.6480, 17
-__func__.6480:
+	.type	__func__.6603, %object
+	.size	__func__.6603, 17
+__func__.6603:
 	.string	"List_remove_node"
-	.section	.rodata.__func__.6512,"a",@progbits
+	.section	.rodata.__func__.6635,"a",@progbits
 	.align	3
 	.set	.LANCHOR54,. + 0
-	.type	__func__.6512, %object
-	.size	__func__.6512, 22
-__func__.6512:
+	.type	__func__.6635, %object
+	.size	__func__.6635, 22
+__func__.6635:
 	.string	"List_update_data_list"
-	.section	.rodata.__func__.6521,"a",@progbits
+	.section	.rodata.__func__.6644,"a",@progbits
 	.align	3
 	.set	.LANCHOR140,. + 0
-	.type	__func__.6521, %object
-	.size	__func__.6521, 16
-__func__.6521:
+	.type	__func__.6644, %object
+	.size	__func__.6644, 16
+__func__.6644:
 	.string	"load_l2p_region"
-	.section	.rodata.__func__.6554,"a",@progbits
+	.section	.rodata.__func__.6677,"a",@progbits
 	.align	3
 	.set	.LANCHOR116,. + 0
-	.type	__func__.6554, %object
-	.size	__func__.6554, 26
-__func__.6554:
+	.type	__func__.6677, %object
+	.size	__func__.6677, 26
+__func__.6677:
 	.string	"ftl_map_blk_alloc_new_blk"
-	.section	.rodata.__func__.6565,"a",@progbits
+	.section	.rodata.__func__.6688,"a",@progbits
 	.align	3
 	.set	.LANCHOR143,. + 0
-	.type	__func__.6565, %object
-	.size	__func__.6565, 15
-__func__.6565:
+	.type	__func__.6688, %object
+	.size	__func__.6688, 15
+__func__.6688:
 	.string	"ftl_map_blk_gc"
-	.section	.rodata.__func__.6579,"a",@progbits
+	.section	.rodata.__func__.6702,"a",@progbits
 	.align	3
 	.set	.LANCHOR141,. + 0
-	.type	__func__.6579, %object
-	.size	__func__.6579, 31
-__func__.6579:
+	.type	__func__.6702, %object
+	.size	__func__.6702, 31
+__func__.6702:
 	.string	"Ftl_write_map_blk_to_last_page"
-	.section	.rodata.__func__.6593,"a",@progbits
+	.section	.rodata.__func__.6716,"a",@progbits
 	.align	3
 	.set	.LANCHOR142,. + 0
-	.type	__func__.6593, %object
-	.size	__func__.6593, 16
-__func__.6593:
+	.type	__func__.6716, %object
+	.size	__func__.6716, 16
+__func__.6716:
 	.string	"FtlMapWritePage"
-	.section	.rodata.__func__.6618,"a",@progbits
+	.section	.rodata.__func__.6741,"a",@progbits
 	.align	3
 	.set	.LANCHOR57,. + 0
-	.type	__func__.6618, %object
-	.size	__func__.6618, 22
-__func__.6618:
+	.type	__func__.6741, %object
+	.size	__func__.6741, 22
+__func__.6741:
 	.string	"select_l2p_ram_region"
-	.section	.rodata.__func__.6635,"a",@progbits
+	.section	.rodata.__func__.6758,"a",@progbits
 	.align	3
 	.set	.LANCHOR145,. + 0
-	.type	__func__.6635, %object
-	.size	__func__.6635, 9
-__func__.6635:
+	.type	__func__.6758, %object
+	.size	__func__.6758, 9
+__func__.6758:
 	.string	"log2phys"
-	.section	.rodata.__func__.6708,"a",@progbits
+	.section	.rodata.__func__.6831,"a",@progbits
 	.align	3
 	.set	.LANCHOR166,. + 0
-	.type	__func__.6708, %object
-	.size	__func__.6708, 15
-__func__.6708:
+	.type	__func__.6831, %object
+	.size	__func__.6831, 15
+__func__.6831:
 	.string	"FtlVpcTblFlush"
-	.section	.rodata.__func__.6730,"a",@progbits
+	.section	.rodata.__func__.6853,"a",@progbits
 	.align	3
 	.set	.LANCHOR148,. + 0
-	.type	__func__.6730, %object
-	.size	__func__.6730, 14
-__func__.6730:
+	.type	__func__.6853, %object
+	.size	__func__.6853, 14
+__func__.6853:
 	.string	"FtlScanSysBlk"
-	.section	.rodata.__func__.6787,"a",@progbits
+	.section	.rodata.__func__.6910,"a",@progbits
 	.align	3
-	.set	.LANCHOR179,. + 0
-	.type	__func__.6787, %object
-	.size	__func__.6787, 15
-__func__.6787:
+	.set	.LANCHOR180,. + 0
+	.type	__func__.6910, %object
+	.size	__func__.6910, 15
+__func__.6910:
 	.string	"FtlLoadSysInfo"
-	.section	.rodata.__func__.6850,"a",@progbits
+	.section	.rodata.__func__.6973,"a",@progbits
 	.align	3
 	.set	.LANCHOR146,. + 0
-	.type	__func__.6850, %object
-	.size	__func__.6850, 16
-__func__.6850:
+	.type	__func__.6973, %object
+	.size	__func__.6973, 16
+__func__.6973:
 	.string	"FtlReUsePrevPpa"
-	.section	.rodata.__func__.6884,"a",@progbits
+	.section	.rodata.__func__.7007,"a",@progbits
 	.align	3
 	.set	.LANCHOR160,. + 0
-	.type	__func__.6884, %object
-	.size	__func__.6884, 22
-__func__.6884:
+	.type	__func__.7007, %object
+	.size	__func__.7007, 22
+__func__.7007:
 	.string	"FtlRecoverySuperblock"
-	.section	.rodata.__func__.6941,"a",@progbits
+	.section	.rodata.__func__.7064,"a",@progbits
 	.align	3
 	.set	.LANCHOR60,. + 0
-	.type	__func__.6941, %object
-	.size	__func__.6941, 16
-__func__.6941:
+	.type	__func__.7064, %object
+	.size	__func__.7064, 16
+__func__.7064:
 	.string	"make_superblock"
-	.section	.rodata.__func__.6962,"a",@progbits
+	.section	.rodata.__func__.7085,"a",@progbits
 	.align	3
 	.set	.LANCHOR154,. + 0
-	.type	__func__.6962, %object
-	.size	__func__.6962, 18
-__func__.6962:
+	.type	__func__.7085, %object
+	.size	__func__.7085, 18
+__func__.7085:
 	.string	"SupperBlkListInit"
-	.section	.rodata.__func__.6987,"a",@progbits
+	.section	.rodata.__func__.7110,"a",@progbits
 	.align	3
 	.set	.LANCHOR168,. + 0
-	.type	__func__.6987, %object
-	.size	__func__.6987, 21
-__func__.6987:
+	.type	__func__.7110, %object
+	.size	__func__.7110, 21
+__func__.7110:
 	.string	"FtlVpcCheckAndModify"
-	.section	.rodata.__func__.7003,"a",@progbits
+	.section	.rodata.__func__.7126,"a",@progbits
 	.align	3
 	.set	.LANCHOR155,. + 0
-	.type	__func__.7003, %object
-	.size	__func__.7003, 14
-__func__.7003:
+	.type	__func__.7126, %object
+	.size	__func__.7126, 14
+__func__.7126:
 	.string	"ftl_check_vpc"
-	.section	.rodata.__func__.7088,"a",@progbits
+	.section	.rodata.__func__.7211,"a",@progbits
 	.align	3
 	.set	.LANCHOR157,. + 0
-	.type	__func__.7088, %object
-	.size	__func__.7088, 25
-__func__.7088:
+	.type	__func__.7211, %object
+	.size	__func__.7211, 25
+__func__.7211:
 	.string	"allocate_data_superblock"
-	.section	.rodata.__func__.7109,"a",@progbits
+	.section	.rodata.__func__.7232,"a",@progbits
 	.align	3
 	.set	.LANCHOR169,. + 0
-	.type	__func__.7109, %object
-	.size	__func__.7109, 29
-__func__.7109:
+	.type	__func__.7232, %object
+	.size	__func__.7232, 29
+__func__.7232:
 	.string	"allocate_new_data_superblock"
-	.section	.rodata.__func__.7116,"a",@progbits
+	.section	.rodata.__func__.7239,"a",@progbits
 	.align	3
 	.set	.LANCHOR88,. + 0
-	.type	__func__.7116, %object
-	.size	__func__.7116, 19
-__func__.7116:
+	.type	__func__.7239, %object
+	.size	__func__.7239, 19
+__func__.7239:
 	.string	"get_new_active_ppa"
-	.section	.rodata.__func__.7129,"a",@progbits
+	.section	.rodata.__func__.7252,"a",@progbits
 	.align	3
 	.set	.LANCHOR158,. + 0
-	.type	__func__.7129, %object
-	.size	__func__.7129, 16
-__func__.7129:
+	.type	__func__.7252, %object
+	.size	__func__.7252, 16
+__func__.7252:
 	.string	"update_vpc_list"
-	.section	.rodata.__func__.7136,"a",@progbits
+	.section	.rodata.__func__.7259,"a",@progbits
 	.align	3
 	.set	.LANCHOR159,. + 0
-	.type	__func__.7136, %object
-	.size	__func__.7136, 20
-__func__.7136:
+	.type	__func__.7259, %object
+	.size	__func__.7259, 20
+__func__.7259:
 	.string	"decrement_vpc_count"
-	.section	.rodata.__func__.7206,"a",@progbits
+	.section	.rodata.__func__.7329,"a",@progbits
 	.align	3
 	.set	.LANCHOR171,. + 0
-	.type	__func__.7206, %object
-	.size	__func__.7206, 19
-__func__.7206:
+	.type	__func__.7329, %object
+	.size	__func__.7329, 19
+__func__.7329:
 	.string	"FtlGcFreeTempBlock"
-	.section	.rodata.__func__.7312,"a",@progbits
+	.section	.rodata.__func__.7435,"a",@progbits
 	.align	3
 	.set	.LANCHOR175,. + 0
-	.type	__func__.7312, %object
-	.size	__func__.7312, 23
-__func__.7312:
+	.type	__func__.7435, %object
+	.size	__func__.7435, 23
+__func__.7435:
 	.string	"rk_ftl_garbage_collect"
-	.section	.rodata.__func__.7579,"a",@progbits
+	.section	.rodata.__func__.7702,"a",@progbits
 	.align	3
 	.set	.LANCHOR104,. + 0
-	.type	__func__.7579, %object
-	.size	__func__.7579, 15
-__func__.7579:
+	.type	__func__.7702, %object
+	.size	__func__.7702, 15
+__func__.7702:
 	.string	"FlashReadPages"
-	.section	.rodata.__func__.7596,"a",@progbits
+	.section	.rodata.__func__.7719,"a",@progbits
 	.align	3
 	.set	.LANCHOR109,. + 0
-	.type	__func__.7596, %object
-	.size	__func__.7596, 15
-__func__.7596:
+	.type	__func__.7719, %object
+	.size	__func__.7719, 15
+__func__.7719:
 	.string	"FlashProgPages"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",@progbits,1
 .LC101:
@@ -13922,4 +14217,7 @@ __func__.7596:
 	.string	"SFTL version: 5.0.44 20180713"
 .LC71:
 	.string	"%s\n"
+	.section	.rodata.sftl_write.str1.1,"aMS",@progbits,1
+.LC109:
+	.string	"write_idblock fail! %x %x %x %x\n"
 	.hidden	free

commit b2a78faeb5940f1cb1d7351ca568a4b20a1cc6df
Author: chenfen <chenfen@rock-chips.com>
Date:   Tue Jul 31 17:59:43 2018 +0800

    rockchip: clock: rk3399: support 400KHZ output for emmc initialization.
    
    support 400KHz output for emmc initialization
    
    Change-Id: I4f2182981f587688c777f64c30d0eeb59f69b0ea
    Signed-off-by: chenfen <chenfen@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 4d76d66052..3ab48a0f17 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -758,7 +758,7 @@ static ulong rk3399_mmc_get_clk(struct rk3399_cru *cru, uint clk_id)
 		div = 2;
 		break;
 	case SCLK_EMMC:
-		con = readl(&cru->clksel_con[21]);
+		con = readl(&cru->clksel_con[22]);
 		div = 1;
 		break;
 	default:
@@ -813,12 +813,20 @@ static ulong rk3399_mmc_set_clk(struct rk3399_cru *cru,
 
 		/* Select clk_emmc source from GPLL too */
 		src_clk_div = DIV_ROUND_UP(GPLL_HZ, set_rate);
-		assert(src_clk_div - 1 < 128);
-
-		rk_clrsetreg(&cru->clksel_con[22],
-			     CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK,
-			     CLK_EMMC_PLL_SEL_GPLL << CLK_EMMC_PLL_SHIFT |
-			     (src_clk_div - 1) << CLK_EMMC_DIV_CON_SHIFT);
+		if (src_clk_div > 128) {
+			/* use 24MHz source for 400KHz clock */
+			src_clk_div = DIV_ROUND_UP(OSC_HZ, set_rate);
+			assert(src_clk_div - 1 < 128);
+			rk_clrsetreg(&cru->clksel_con[22],
+				     CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK,
+				     CLK_EMMC_PLL_SEL_24M << CLK_EMMC_PLL_SHIFT |
+				     (src_clk_div - 1) << CLK_EMMC_DIV_CON_SHIFT);
+		} else {
+			rk_clrsetreg(&cru->clksel_con[22],
+				     CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK,
+				     CLK_EMMC_PLL_SEL_GPLL << CLK_EMMC_PLL_SHIFT |
+				     (src_clk_div - 1) << CLK_EMMC_DIV_CON_SHIFT);
+		}
 		break;
 	default:
 		return -EINVAL;

commit 850fcf3e04de36b6347fb51bf9727f3f9ed0ccbd
Author: chenfen <chenfen@rock-chips.com>
Date:   Tue Jul 31 17:28:44 2018 +0800

    mmc: sdhci: config controller MMC_TIMING_MMC_HS
    
    If emmc driver config MMC_TIMING_MMC_HS, need config
    
    controller SDHCI_HOST_CONTROL2 register SDHCI_CTRL_UHS_SDR50.
    
    It will affect emmc phy work mode.
    
    Change-Id: Ib45f30eb6b70bde6f1beb4612ded17ee2b24b5fe
    Signed-off-by: chenfen <chenfen@rock-chips.com>

diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index f5ae3a6bdc..4d472b78b3 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -450,7 +450,8 @@ static void sdhci_set_uhs_signaling(struct sdhci_host *host)
 		ctrl_2 |= SDHCI_CTRL_UHS_SDR12;
 	else if (timing == MMC_TIMING_UHS_SDR25)
 		ctrl_2 |= SDHCI_CTRL_UHS_SDR25;
-	else if (timing == MMC_TIMING_UHS_SDR50)
+	else if ((timing == MMC_TIMING_UHS_SDR50) ||
+		(timing == MMC_TIMING_MMC_HS))
 		ctrl_2 |= SDHCI_CTRL_UHS_SDR50;
 	else if ((timing == MMC_TIMING_UHS_DDR50) ||
 		 (timing == MMC_TIMING_MMC_DDR52))

commit cc0bf5ed98c1049466aae2214aeac8e9daedfcb4
Author: chenfen <chenfen@rock-chips.com>
Date:   Tue Jul 31 17:07:16 2018 +0800

    rockchip: emmc: rk3399: priority to use cru division.
    
    Priority to use cru division is better timing than use controller
    
    division.
    
    Change-Id: I8b7b9a9c99f09407f209fda8df6460136a3105e9
    Signed-off-by: chenfen <chenfen@rock-chips.com>

diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index 8de9865ebd..63b5ddddfd 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -41,6 +41,7 @@ struct rockchip_sdhc {
 	struct sdhci_host host;
 	void *base;
 	struct rockchip_emmc_phy *phy;
+	struct clk emmc_clk;
 };
 
 #define PHYCTRL_CALDONE_MASK		0x1
@@ -66,7 +67,7 @@ static void rk3399_emmc_phy_power_on(struct rockchip_emmc_phy *phy, u32 clock)
 
 	writel(RK_CLRSETBITS(7 << 4, 0), &phy->emmcphy_con[6]);
 	writel(RK_CLRSETBITS(1 << 11, 1 << 11), &phy->emmcphy_con[0]);
-	writel(RK_CLRSETBITS(0xf << 7, 4 << 7), &phy->emmcphy_con[0]);
+	writel(RK_CLRSETBITS(0xf << 7, 6 << 7), &phy->emmcphy_con[0]);
 
 	/*
 	 * According to the user manual, calpad calibration
@@ -122,6 +123,100 @@ static void rk3399_emmc_phy_power_off(struct rockchip_emmc_phy *phy)
 	writel(RK_CLRSETBITS(1 << 1, 0), &phy->emmcphy_con[6]);
 }
 
+static int rk3399_sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
+{
+	unsigned int div, clk = 0, timeout;
+	unsigned int input_clk;
+	struct rockchip_sdhc *priv =
+			container_of(host, struct rockchip_sdhc, host);
+
+	/* Wait max 20 ms */
+	timeout = 200;
+	while (sdhci_readl(host, SDHCI_PRESENT_STATE) &
+			   (SDHCI_CMD_INHIBIT | SDHCI_DATA_INHIBIT)) {
+		if (timeout == 0) {
+			printf("%s: Timeout to wait cmd & data inhibit\n",
+			       __func__);
+			return -EBUSY;
+		}
+
+		timeout--;
+		udelay(100);
+	}
+	sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
+
+	if (clock == 0)
+		return 0;
+
+	input_clk = clk_set_rate(&priv->emmc_clk, clock);
+	if (IS_ERR_VALUE(input_clk))
+		input_clk = host->max_clk;
+
+	if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) {
+		/*
+		 * Check if the Host Controller supports Programmable Clock
+		 * Mode.
+		 */
+		if (host->clk_mul) {
+			for (div = 1; div <= 1024; div++) {
+				if ((input_clk / div) <= clock)
+					break;
+			}
+
+			/*
+			 * Set Programmable Clock Mode in the Clock
+			 * Control register.
+			 */
+			clk = SDHCI_PROG_CLOCK_MODE;
+			div--;
+		} else {
+			/* Version 3.00 divisors must be a multiple of 2. */
+			if (input_clk <= clock) {
+				div = 1;
+			} else {
+				for (div = 2;
+				     div < SDHCI_MAX_DIV_SPEC_300;
+				     div += 2) {
+					if ((input_clk / div) <= clock)
+						break;
+				}
+			}
+			div >>= 1;
+		}
+	} else {
+		/* Version 2.00 divisors must be a power of 2. */
+		for (div = 1; div < SDHCI_MAX_DIV_SPEC_200; div *= 2) {
+			if ((input_clk / div) <= clock)
+				break;
+		}
+		div >>= 1;
+	}
+
+	clk |= (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT;
+	clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN)
+		<< SDHCI_DIVIDER_HI_SHIFT;
+	clk |= SDHCI_CLOCK_INT_EN;
+	sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
+
+	/* Wait max 20 ms */
+	timeout = 20;
+	while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL))
+		& SDHCI_CLOCK_INT_STABLE)) {
+		if (timeout == 0) {
+			printf("%s: Internal clock never stabilised.\n",
+			       __func__);
+			return -EBUSY;
+		}
+		timeout--;
+		udelay(1000);
+	}
+	clk |= SDHCI_CLOCK_CARD_EN;
+	sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
+	host->clock = clock;
+
+	return 0;
+}
+
 static int arasan_sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
 {
 	struct rockchip_sdhc *priv =
@@ -132,7 +227,7 @@ static int arasan_sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
 	if (cycle_phy)
 		rk3399_emmc_phy_power_off(priv->phy);
 
-	sdhci_set_clock(host, clock);
+	rk3399_sdhci_set_clock(host, clock);
 
 	if (cycle_phy)
 		rk3399_emmc_phy_power_on(priv->phy, clock);
@@ -214,6 +309,7 @@ static int arasan_sdhci_probe(struct udevice *dev)
 		printf("%s fail to get clk\n", __func__);
 	}
 
+	prv->emmc_clk = clk;
 	ret = arasan_get_phy(dev);
 	if (ret)
 		return ret;

commit cd67f373aa7dbe6b86cb2074d2522ce604ab55d7
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Sat Jul 21 21:18:18 2018 +0800

    drivers: rkflash: add vendor ops api for nand devices
    
    1.Add vendor ops api for nand devices;
    2.Remove unused headfile.
    3.Make rkflash block driver reachable by other devices
    
    Change-Id: I26129cb94382b0714b9c35f4dc6113ddb752251c
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/Makefile b/drivers/rkflash/Makefile
index 6330c86e93..e8e3a8d16d 100644
--- a/drivers/rkflash/Makefile
+++ b/drivers/rkflash/Makefile
@@ -4,9 +4,10 @@
 # SPDX-License-Identifier:	GPL-2.0
 #
 
-obj-$(CONFIG_RKNANDC_NAND) += rksftl.o rkflash_blk.o rknandc_base.o rkflash_api.o rkflash_debug.o flash.o nandc.o
-obj-$(CONFIG_RKSFC_NAND) += rksftl.o rkflash_blk.o rksfc_base.o  rkflash_api.o rkflash_debug.o sfc_nand.o sfc.o
-obj-$(CONFIG_RKSFC_NOR) += rkflash_blk.o rksfc_base.o rkflash_api.o rkflash_debug.o sfc_nor.o sfc.o
+obj-y += rkflash_blk.o rkflash_debug.o
+obj-$(CONFIG_RKNANDC_NAND) += rksftl.o rknandc_base.o rkflash_api.o flash.o nandc.o
+obj-$(CONFIG_RKSFC_NAND) += rksftl.o rksfc_base.o  rkflash_api.o sfc_nand.o sfc.o
+obj-$(CONFIG_RKSFC_NOR) += rksfc_base.o rkflash_api.o sfc_nor.o sfc.o
 
 ifneq (, $(CONFIG_RKNANDC_NAND)$(CONFIG_RKSFC_NAND))
 
diff --git a/drivers/rkflash/flash.c b/drivers/rkflash/flash.c
index a3f9e89f3d..974ad80493 100644
--- a/drivers/rkflash/flash.c
+++ b/drivers/rkflash/flash.c
@@ -10,7 +10,6 @@
 #include "flash.h"
 #include "flash_com.h"
 #include "nandc.h"
-#include "typedef.h"
 #include "rkflash_debug.h"
 
 #define FLASH_STRESS_TEST_EN		0
diff --git a/drivers/rkflash/flash.h b/drivers/rkflash/flash.h
index d7e44d7e9f..abc3fe14da 100644
--- a/drivers/rkflash/flash.h
+++ b/drivers/rkflash/flash.h
@@ -7,8 +7,6 @@
 #ifndef __FLASH_H
 #define __FLASH_H
 
-#include "typedef.h"
-
 #ifndef BIT
 #define BIT(nr)			(1 << (nr))
 #endif
diff --git a/drivers/rkflash/nandc.c b/drivers/rkflash/nandc.c
index 8f5c87c283..36452367ce 100644
--- a/drivers/rkflash/nandc.c
+++ b/drivers/rkflash/nandc.c
@@ -11,7 +11,7 @@
 #include "flash.h"
 #include "flash_com.h"
 #include "nandc.h"
-#include "typedef.h"
+#include "rk_sftl.h"
 
 #define     CPU_DELAY_NS(n)	ndelay(n)
 
diff --git a/drivers/rkflash/rk_sftl.h b/drivers/rkflash/rk_sftl.h
index e2d596b358..ad1502ef78 100644
--- a/drivers/rkflash/rk_sftl.h
+++ b/drivers/rkflash/rk_sftl.h
@@ -14,5 +14,13 @@ int sftl_read(u32 index, u32 count, u8 *buf);
 int sftl_write(u32 index, u32 count, u8 *buf);
 u32 sftl_get_density(void);
 s32 sftl_gc(void);
+int sftl_vendor_read(u32 index, u32 count, u8 *buf);
+int sftl_vendor_write(u32 index, u32 count, u8 *buf);
 
+void *ftl_malloc(int n_size);
+void ftl_free(void *p);
+void *ftl_memset(void *s, int c, unsigned int n);
+void *ftl_memcpy(void *pv_to,
+		 const void *pv_from,
+		 unsigned int size);
 #endif
diff --git a/drivers/rkflash/rk_sftl_arm_v7.S b/drivers/rkflash/rk_sftl_arm_v7.S
index 722a608011..8affd2d8dc 100644
--- a/drivers/rkflash/rk_sftl_arm_v7.S
+++ b/drivers/rkflash/rk_sftl_arm_v7.S
@@ -2,7 +2,7 @@
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:	GPL-2.0
- * date: 2018-07-13
+ * date: 2018-07-21
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -15,9 +15,6 @@
 	.eabi_attribute 34, 0
 	.eabi_attribute 18, 2
 	.file	"rk_sftl.c"
-	.text
-.Ltext0:
-	.cfi_sections	.debug_frame
 	.global	__aeabi_uidiv
 	.section	.text.l2p_addr_tran.isra.0,"ax",%progbits
 	.align	1
@@ -27,85 +24,39 @@
 	.fpu softvfp
 	.type	l2p_addr_tran.isra.0, %function
 l2p_addr_tran.isra.0:
-.LFB352:
-	.file 1 "drivers/rkflash/rksftl/sftl_flash.c"
-	.loc 1 58 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL0:
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 3, -32
-	.cfi_offset 4, -28
-	.cfi_offset 5, -24
-	.cfi_offset 6, -20
-	.cfi_offset 7, -16
-	.cfi_offset 8, -12
-	.cfi_offset 10, -8
-	.cfi_offset 14, -4
-	.loc 1 74 0
 	lsrs	r7, r0, #10
-	.loc 1 66 0
 	ldr	r3, .L3
-	.loc 1 58 0
 	mov	r8, r1
 	mov	r6, r0
-	.loc 1 75 0
 	uxth	r0, r7
-	.loc 1 58 0
 	mov	r10, r2
-	.loc 1 76 0
 	uxth	r7, r7
-	.loc 1 66 0
 	ldrh	r4, [r3, #8]
-.LVL1:
-	.loc 1 78 0
 	ubfx	r6, r6, #0, #10
-	.loc 1 67 0
 	ldrh	r5, [r3, #10]
-.LVL2:
-	.loc 1 68 0
 	ldrh	r3, [r3, #14]
 	cmp	r3, #4
-	.loc 1 69 0
 	itt	eq
 	lsreq	r4, r4, #1
-.LVL3:
-	.loc 1 70 0
 	lsleq	r5, r5, #1
-.LVL4:
-	.loc 1 75 0
 	mov	r1, r4
-.LVL5:
-	.loc 1 70 0
 	it	eq
 	uxtheq	r5, r5
-.LVL6:
-	.loc 1 75 0
 	bl	__aeabi_uidiv
-.LVL7:
 	uxth	r0, r0
-.LVL8:
-	.loc 1 76 0
 	mls	r4, r0, r4, r7
-.LVL9:
-	.loc 1 78 0
 	mla	r4, r5, r4, r6
 	str	r4, [r8]
-	.loc 1 79 0
 	str	r0, [r10]
-	.loc 1 82 0
 	movs	r0, #0
-.LVL10:
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.LVL11:
 .L4:
 	.align	2
 .L3:
 	.word	.LANCHOR0
-	.cfi_endproc
-.LFE352:
 	.size	l2p_addr_tran.isra.0, .-l2p_addr_tran.isra.0
 	.section	.text.ftl_set_blk_mode.part.6,"ax",%progbits
 	.align	1
@@ -115,19 +66,12 @@ l2p_addr_tran.isra.0:
 	.fpu softvfp
 	.type	ftl_set_blk_mode.part.6, %function
 ftl_set_blk_mode.part.6:
-.LFB358:
-	.file 2 "drivers/rkflash/rksftl/sftl_sys.c"
-	.loc 2 1395 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL12:
-	.loc 2 1398 0
 	ldr	r3, .L6
 	lsrs	r1, r0, #5
 	and	r0, r0, #31
-.LVL13:
 	ldr	r2, [r3]
 	movs	r3, #1
 	lsl	r0, r3, r0
@@ -139,8 +83,6 @@ ftl_set_blk_mode.part.6:
 	.align	2
 .L6:
 	.word	.LANCHOR1
-	.cfi_endproc
-.LFE358:
 	.size	ftl_set_blk_mode.part.6, .-ftl_set_blk_mode.part.6
 	.section	.text.Ftl_log2,"ax",%progbits
 	.align	1
@@ -151,41 +93,22 @@ ftl_set_blk_mode.part.6:
 	.fpu softvfp
 	.type	Ftl_log2, %function
 Ftl_log2:
-.LFB205:
-	.file 3 "drivers/rkflash/rksftl/sftl_plat.c"
-	.loc 3 128 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL14:
-	.loc 3 132 0
 	movs	r1, #0
-	.loc 3 130 0
 	movs	r2, #1
-.LVL15:
 .L9:
-	.loc 3 132 0 discriminator 1
 	cmp	r2, r0
 	uxth	r3, r1
-.LVL16:
 	add	r1, r1, #1
 	bls	.L10
-.LVL17:
-	.loc 3 134 0
 	subs	r0, r3, #1
-.LVL18:
-	.loc 3 136 0
 	uxth	r0, r0
 	bx	lr
-.LVL19:
 .L10:
-	.loc 3 133 0 discriminator 3
 	lsls	r2, r2, #1
-.LVL20:
 	b	.L9
-	.cfi_endproc
-.LFE205:
 	.size	Ftl_log2, .-Ftl_log2
 	.section	.text.FtlPrintInfo,"ax",%progbits
 	.align	1
@@ -196,16 +119,10 @@ Ftl_log2:
 	.fpu softvfp
 	.type	FtlPrintInfo, %function
 FtlPrintInfo:
-.LFB206:
-	.loc 3 160 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL21:
 	bx	lr
-	.cfi_endproc
-.LFE206:
 	.size	FtlPrintInfo, .-FtlPrintInfo
 	.section	.text.FtlSysBlkNumInit,"ax",%progbits
 	.align	1
@@ -216,44 +133,30 @@ FtlPrintInfo:
 	.fpu softvfp
 	.type	FtlSysBlkNumInit, %function
 FtlSysBlkNumInit:
-.LFB207:
-	.loc 3 166 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL22:
-	.loc 3 169 0
 	ldr	r3, .L13
 	cmp	r0, #24
 	it	cc
 	movcc	r0, #24
-.LVL23:
-	.loc 3 170 0
 	ldr	r2, .L13+4
-	.loc 3 169 0
 	str	r0, [r3]
-	.loc 3 170 0
 	ldr	r3, .L13+8
 	ldrh	r3, [r3]
 	muls	r3, r0, r3
 	str	r3, [r2]
-	.loc 3 171 0
 	ldr	r2, .L13+12
 	ldrh	r2, [r2]
 	subs	r0, r2, r0
-.LVL24:
 	ldr	r2, .L13+16
 	strh	r0, [r2]	@ movhi
-	.loc 3 175 0
 	movs	r0, #0
-	.loc 3 172 0
 	ldr	r2, .L13+20
 	ldr	r2, [r2]
 	subs	r3, r2, r3
 	ldr	r2, .L13+24
 	str	r3, [r2]
-	.loc 3 175 0
 	bx	lr
 .L14:
 	.align	2
@@ -265,8 +168,6 @@ FtlSysBlkNumInit:
 	.word	.LANCHOR5
 	.word	.LANCHOR8
 	.word	.LANCHOR7
-	.cfi_endproc
-.LFE207:
 	.size	FtlSysBlkNumInit, .-FtlSysBlkNumInit
 	.global	__aeabi_idiv
 	.section	.text.FtlConstantsInit,"ax",%progbits
@@ -278,239 +179,136 @@ FtlSysBlkNumInit:
 	.fpu softvfp
 	.type	FtlConstantsInit, %function
 FtlConstantsInit:
-.LFB208:
-	.loc 3 184 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL25:
-	.loc 3 189 0
 	ldrh	r1, [r0]
 	ldr	r2, .L25
-	.loc 3 184 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 3 184 0
 	mov	r7, r0
-	.loc 3 190 0
 	ldrh	r5, [r0, #2]
-	.loc 3 189 0
 	strh	r1, [r2]	@ movhi
-	.loc 3 190 0
 	ldr	r2, .L25+4
-	.loc 3 191 0
 	ldrh	r0, [r0, #4]
-.LVL26:
-	.loc 3 190 0
 	strh	r5, [r2]	@ movhi
-	.loc 3 191 0
 	ldr	r2, .L25+8
 	strh	r0, [r2]	@ movhi
-	.loc 3 192 0
 	ldrh	r2, [r7, #14]
 	cmp	r2, #4
 	bne	.L16
-	.loc 3 193 0
 	ldrh	r2, [r7, #6]
 	ldr	r4, .L25+12
 	lsrs	r2, r2, #1
 	strh	r2, [r4]	@ movhi
-	.loc 3 194 0
 	movs	r4, #8
 	ldr	r2, .L25+16
 	strh	r4, [r2]	@ movhi
 .L16:
-	.loc 3 198 0 discriminator 3
 	ldr	r4, .L25+20
-	.loc 3 184 0 discriminator 3
 	movs	r2, #0
 .L17:
-.LVL27:
-	.loc 3 198 0 discriminator 3
 	strb	r2, [r2, r4]
-	.loc 3 197 0 discriminator 3
 	adds	r2, r2, #1
-.LVL28:
 	cmp	r2, #32
 	bne	.L17
-	.loc 3 199 0
 	ldr	r2, .L25+24
-.LVL29:
-	.loc 3 201 0
 	cmp	r1, #1
-	.loc 3 199 0
 	mov	r4, #5
-	.loc 3 205 0
 	smulbb	r5, r5, r0
-	.loc 3 200 0
 	mov	r6, #0
-	.loc 3 199 0
 	strh	r4, [r2]	@ movhi
-	.loc 3 202 0
 	it	eq
 	strheq	r1, [r2]	@ movhi
-	.loc 3 203 0
 	mov	r1, #640
 	ldr	r2, .L25+28
-	.loc 3 205 0
 	uxth	r5, r5
-	.loc 3 200 0
 	ldr	r4, .L25+32
-	.loc 3 203 0
 	strh	r1, [r2]	@ movhi
-	.loc 3 205 0
 	ldr	r2, .L25+36
-	.loc 3 200 0
 	strh	r6, [r4]	@ movhi
-	.loc 3 211 0
 	ldr	r6, .L25+40
-	.loc 3 205 0
 	strh	r5, [r2]	@ movhi
-	.loc 3 206 0
 	ldr	r2, .L25+12
 	ldrh	r4, [r2]
 	ldr	r2, .L25+44
 	smulbb	r0, r0, r4
 	uxth	r0, r0
 	strh	r0, [r2]	@ movhi
-	.loc 3 207 0
 	bl	Ftl_log2
-.LVL30:
 	ldr	r2, .L25+48
-	.loc 3 208 0
 	ldrh	r8, [r7, #12]
 	ldr	r3, .L25+52
-	.loc 3 207 0
 	strh	r0, [r2]	@ movhi
-	.loc 3 209 0
 	ldr	r2, .L25+56
-	.loc 3 210 0
 	smulbb	r1, r5, r8
-	.loc 3 208 0
 	strh	r8, [r3]	@ movhi
-	.loc 3 209 0
 	strh	r8, [r2]	@ movhi
-	.loc 3 210 0
 	ldr	r2, .L25+60
 	strh	r1, [r2]	@ movhi
-	.loc 3 211 0
 	ldr	r2, .L25+16
 	ldrh	fp, [r2]
 	mov	r0, fp
 	bl	Ftl_log2
-.LVL31:
-	.loc 3 213 0
 	lsl	r2, fp, #9
 	ldr	r1, .L25+64
-	.loc 3 215 0
 	ldr	r3, .L25+68
-	.loc 3 211 0
 	mov	r10, r0
-	.loc 3 213 0
 	uxth	r2, r2
-	.loc 3 211 0
 	strh	r0, [r6]	@ movhi
-	.loc 3 219 0
 	mov	r0, #5120
-	.loc 3 213 0
 	strh	r2, [r1]	@ movhi
-	.loc 3 214 0
 	lsrs	r2, r2, #8
 	ldr	r1, .L25+72
 	strh	r2, [r1]	@ movhi
-	.loc 3 219 0
 	mul	r1, r8, fp
-	.loc 3 215 0
 	ldrh	r2, [r7, #20]
 	ldr	r7, .L25+52
-.LVL32:
 	strh	r2, [r3]	@ movhi
-	.loc 3 217 0
 	mul	r3, r4, r5
 	ldr	r2, .L25+76
-	.loc 3 224 0
 	lsls	r4, r4, #6
-	.loc 3 217 0
 	str	r3, [r2]
-	.loc 3 218 0
 	mul	r3, fp, r3
 	ldr	r2, .L25+80
 	mul	r3, r8, r3
 	ldr	r8, .L25+116
 	asrs	r3, r3, #11
 	str	r3, [r2]
-	.loc 3 219 0
 	bl	__aeabi_idiv
-.LVL33:
 	uxth	r0, r0
-	.loc 3 222 0
 	ldr	r2, .L25+84
-	.loc 3 227 0
 	mov	r1, r5
-	.loc 3 220 0
 	cmp	r0, #4
-	.loc 3 221 0
 	itet	ls
 	movls	r3, #4
-	.loc 3 219 0
 	strhhi	r0, [r8]	@ movhi
-	.loc 3 221 0
 	strhls	r3, [r8]	@ movhi
-	.loc 3 222 0
 	mov	r3, #640
 	asr	r3, r3, r10
-	.loc 3 224 0
 	add	r10, r10, #9
 	asr	r4, r4, r10
-	.loc 3 225 0
 	ldr	r10, .L25+120
-	.loc 3 222 0
 	adds	r3, r3, #2
-	.loc 3 227 0
 	ldrh	r0, [r8]
-	.loc 3 222 0
 	strh	r3, [r2]	@ movhi
-	.loc 3 224 0
 	ldr	r3, .L25+88
 	strh	r4, [r3]	@ movhi
 	uxth	r4, r4
-	.loc 3 225 0
 	mul	r3, r5, r4
-	.loc 3 227 0
 	adds	r4, r4, #8
-	.loc 3 225 0
 	str	r3, [r10]
-	.loc 3 227 0
 	bl	__aeabi_uidiv
-.LVL34:
 	uxtah	r0, r4, r0
 	ldr	r4, .L25+92
-	.loc 3 228 0
 	cmp	r5, #1
-	.loc 3 229 0
 	it	eq
 	addeq	r0, r0, #4
 	str	r0, [r4]
-	.loc 3 232 0
 	ldrh	r0, [r4]
 	bl	FtlSysBlkNumInit
-.LVL35:
-	.loc 3 233 0
 	ldr	r2, [r4]
-	.loc 3 237 0
 	movs	r0, #0
-	.loc 3 233 0
 	ldr	r3, .L25+96
 	str	r2, [r3]
-	.loc 3 235 0
 	ldr	r3, .L25+100
 	ldr	r2, [r3]
 	ldrh	r3, [r7]
@@ -522,22 +320,17 @@ FtlConstantsInit:
 	ldr	r2, .L25+104
 	adds	r3, r3, #2
 	strh	r3, [r2]	@ movhi
-	.loc 3 236 0
 	movs	r2, #32
 	ldr	r3, .L25+108
 	strh	r2, [r3]	@ movhi
-	.loc 3 237 0
 	ldr	r3, .L25+112
 	str	r0, [r3]
-	.loc 3 238 0
 	ldrh	r3, [r8]
 	adds	r3, r3, #3
 	strh	r3, [r8]	@ movhi
-	.loc 3 239 0
 	ldr	r3, [r10]
 	adds	r3, r3, #3
 	str	r3, [r10]
-	.loc 3 264 0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
 .L26:
 	.align	2
@@ -573,8 +366,6 @@ FtlConstantsInit:
 	.word	.LANCHOR34
 	.word	.LANCHOR27
 	.word	.LANCHOR30
-	.cfi_endproc
-.LFE208:
 	.size	FtlConstantsInit, .-FtlConstantsInit
 	.section	.text.IsBlkInVendorPart,"ax",%progbits
 	.align	1
@@ -585,52 +376,28 @@ FtlConstantsInit:
 	.fpu softvfp
 	.type	IsBlkInVendorPart, %function
 IsBlkInVendorPart:
-.LFB211:
-	.loc 3 514 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL36:
-	.loc 3 517 0
 	ldr	r3, .L34
 	ldrh	r3, [r3]
 	cbz	r3, .L33
-.LBB185:
-.LBB186:
-	.loc 3 519 0
 	ldr	r3, .L34+4
-	.loc 3 518 0
 	ldr	r2, .L34+8
-	.loc 3 519 0
 	ldr	r3, [r3]
 	ldrh	r2, [r2]
 	add	r2, r3, r2, lsl #1
 .L29:
-	.loc 3 518 0
 	cmp	r3, r2
 	bne	.L30
 .L33:
-.LBE186:
-.LBE185:
-	.loc 3 524 0
 	movs	r0, #0
-.LVL37:
 	bx	lr
-.LVL38:
 .L30:
-.LBB188:
-.LBB187:
-	.loc 3 519 0
 	ldrh	r1, [r3], #2
 	cmp	r0, r1
 	bne	.L29
-	.loc 3 520 0
 	movs	r0, #1
-.LVL39:
-.LBE187:
-.LBE188:
-	.loc 3 525 0
 	bx	lr
 .L35:
 	.align	2
@@ -638,8 +405,6 @@ IsBlkInVendorPart:
 	.word	.LANCHOR35
 	.word	.LANCHOR36
 	.word	.LANCHOR27
-	.cfi_endproc
-.LFE211:
 	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
 	.section	.text.FtlCacheWriteBack,"ax",%progbits
 	.align	1
@@ -650,17 +415,11 @@ IsBlkInVendorPart:
 	.fpu softvfp
 	.type	FtlCacheWriteBack, %function
 FtlCacheWriteBack:
-.LFB219:
-	.loc 3 952 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	.loc 3 954 0
 	movs	r0, #0
 	bx	lr
-	.cfi_endproc
-.LFE219:
 	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
 	.section	.text.sftl_get_density,"ax",%progbits
 	.align	1
@@ -671,13 +430,9 @@ FtlCacheWriteBack:
 	.fpu softvfp
 	.type	sftl_get_density, %function
 sftl_get_density:
-.LFB224:
-	.loc 3 1178 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	.loc 3 1180 0
 	ldr	r3, .L38
 	ldr	r0, [r3]
 	bx	lr
@@ -685,8 +440,6 @@ sftl_get_density:
 	.align	2
 .L38:
 	.word	.LANCHOR34
-	.cfi_endproc
-.LFE224:
 	.size	sftl_get_density, .-sftl_get_density
 	.global	__aeabi_uidivmod
 	.section	.text.FtlBbmMapBadBlock,"ax",%progbits
@@ -698,44 +451,21 @@ sftl_get_density:
 	.fpu softvfp
 	.type	FtlBbmMapBadBlock, %function
 FtlBbmMapBadBlock:
-.LFB225:
-	.file 4 "drivers/rkflash/rksftl/sftl_bbm.c"
-	.loc 4 5 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL40:
-	.loc 4 10 0
 	ldr	r3, .L41
-	.loc 4 5 0
 	push	{r0, r1, r2, r4, r5, r6, r7, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -20
-	.cfi_offset 5, -16
-	.cfi_offset 6, -12
-	.cfi_offset 7, -8
-	.cfi_offset 14, -4
-	.loc 4 5 0
 	mov	r5, r0
-	.loc 4 10 0
 	ldrh	r4, [r3]
 	mov	r1, r4
 	bl	__aeabi_uidiv
-.LVL41:
 	mov	r1, r4
-	.loc 4 13 0
 	ldr	r4, .L41+4
-	.loc 4 10 0
 	uxth	r6, r0
-.LVL42:
 	mov	r0, r5
 	bl	__aeabi_uidivmod
-.LVL43:
-	.loc 4 13 0
 	add	r2, r4, r6, lsl #2
 	uxth	r3, r1
-.LVL44:
-	.loc 4 15 0
 	ldr	r2, [r2, #28]
 	lsrs	r1, r3, #5
 	and	r7, r3, #31
@@ -744,34 +474,24 @@ FtlBbmMapBadBlock:
 	ldr	r7, [r2, r1, lsl #2]
 	orrs	r0, r0, r7
 	str	r0, [r2, r1, lsl #2]
-	.loc 4 16 0
 	mov	r2, r6
 	str	r0, [sp]
 	mov	r1, r5
 	ldr	r0, .L41+8
 	bl	printf
-.LVL45:
-	.loc 4 17 0
 	ldrh	r3, [r4, #6]
-	.loc 4 19 0
 	movs	r0, #0
-	.loc 4 17 0
 	adds	r3, r3, #1
 	strh	r3, [r4, #6]	@ movhi
-	.loc 4 19 0
 	add	sp, sp, #12
-	.cfi_def_cfa_offset 20
 	@ sp needed
 	pop	{r4, r5, r6, r7, pc}
-.LVL46:
 .L42:
 	.align	2
 .L41:
 	.word	.LANCHOR17
 	.word	.LANCHOR37
 	.word	.LC0
-	.cfi_endproc
-.LFE225:
 	.size	FtlBbmMapBadBlock, .-FtlBbmMapBadBlock
 	.section	.text.FtlBbmIsBadBlock,"ax",%progbits
 	.align	1
@@ -782,64 +502,33 @@ FtlBbmMapBadBlock:
 	.fpu softvfp
 	.type	FtlBbmIsBadBlock, %function
 FtlBbmIsBadBlock:
-.LFB226:
-	.loc 4 24 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL47:
-	.loc 4 30 0
 	ldr	r3, .L44
-	.loc 4 24 0
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 4 24 0
 	mov	r6, r0
-	.loc 4 30 0
 	ldrh	r5, [r3]
-.LVL48:
-	.loc 4 31 0
 	mov	r1, r5
 	bl	__aeabi_uidivmod
-.LVL49:
-	.loc 4 30 0
 	mov	r0, r6
-	.loc 4 31 0
 	uxth	r4, r1
-.LVL50:
-	.loc 4 30 0
 	mov	r1, r5
 	bl	__aeabi_uidiv
-.LVL51:
-	.loc 4 33 0
 	ldr	r3, .L44+4
-	.loc 4 30 0
 	uxth	r0, r0
-	.loc 4 34 0
 	lsrs	r2, r4, #5
 	and	r4, r4, #31
-.LVL52:
-	.loc 4 33 0
 	add	r0, r3, r0, lsl #2
-	.loc 4 34 0
 	ldr	r3, [r0, #28]
 	ldr	r0, [r3, r2, lsl #2]
 	lsrs	r0, r0, r4
-	.loc 4 36 0
 	and	r0, r0, #1
 	pop	{r4, r5, r6, pc}
-.LVL53:
 .L45:
 	.align	2
 .L44:
 	.word	.LANCHOR17
 	.word	.LANCHOR37
-	.cfi_endproc
-.LFE226:
 	.size	FtlBbmIsBadBlock, .-FtlBbmIsBadBlock
 	.section	.text.FtlBbtInfoPrint,"ax",%progbits
 	.align	1
@@ -850,15 +539,10 @@ FtlBbmIsBadBlock:
 	.fpu softvfp
 	.type	FtlBbtInfoPrint, %function
 FtlBbtInfoPrint:
-.LFB227:
-	.loc 4 39 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	bx	lr
-	.cfi_endproc
-.LFE227:
 	.size	FtlBbtInfoPrint, .-FtlBbtInfoPrint
 	.section	.text.FtlBbtCalcTotleCnt,"ax",%progbits
 	.align	1
@@ -869,63 +553,35 @@ FtlBbtInfoPrint:
 	.fpu softvfp
 	.type	FtlBbtCalcTotleCnt, %function
 FtlBbtCalcTotleCnt:
-.LFB231:
-	.loc 4 157 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL54:
-	.loc 4 160 0
 	ldr	r3, .L54
 	ldr	r2, .L54+4
-	.loc 4 157 0
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 4 160 0
 	movs	r5, #0
 	ldrh	r3, [r3]
-	.loc 4 159 0
 	mov	r4, r5
-	.loc 4 160 0
 	ldrh	r6, [r2]
 	muls	r6, r3, r6
-.LVL55:
 .L48:
 	uxth	r0, r5
-.LVL56:
-	.loc 4 160 0 is_stmt 0 discriminator 1
 	cmp	r0, r6
 	blt	.L50
-	.loc 4 169 0 is_stmt 1
 	mov	r0, r4
-.LVL57:
 	pop	{r4, r5, r6, pc}
-.LVL58:
 .L50:
-	.loc 4 162 0
 	bl	FtlBbmIsBadBlock
-.LVL59:
 	cbz	r0, .L49
-	.loc 4 164 0
 	adds	r4, r4, #1
-.LVL60:
 	uxth	r4, r4
-.LVL61:
 .L49:
 	adds	r5, r5, #1
-.LVL62:
 	b	.L48
 .L55:
 	.align	2
 .L54:
 	.word	.LANCHOR17
 	.word	.LANCHOR10
-	.cfi_endproc
-.LFE231:
 	.size	FtlBbtCalcTotleCnt, .-FtlBbtCalcTotleCnt
 	.section	.text.V2P_block,"ax",%progbits
 	.align	1
@@ -936,33 +592,15 @@ FtlBbtCalcTotleCnt:
 	.fpu softvfp
 	.type	V2P_block, %function
 V2P_block:
-.LFB235:
-	.loc 2 5 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL63:
 	push	{r3, r4, r5, r6, r7, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 3, -24
-	.cfi_offset 4, -20
-	.cfi_offset 5, -16
-	.cfi_offset 6, -12
-	.cfi_offset 7, -8
-	.cfi_offset 14, -4
-	.loc 2 5 0
 	mov	r5, r1
-	.loc 2 8 0
 	ldr	r3, .L57
-	.loc 2 5 0
 	mov	r7, r0
-	.loc 2 8 0
 	ldrh	r6, [r3]
-.LVL64:
 	mov	r1, r6
-.LVL65:
 	bl	__aeabi_uidiv
-.LVL66:
 	ldr	r3, .L57+4
 	smulbb	r5, r6, r5
 	mov	r1, r6
@@ -970,10 +608,8 @@ V2P_block:
 	smulbb	r4, r4, r0
 	mov	r0, r7
 	bl	__aeabi_uidivmod
-.LVL67:
 	adds	r0, r5, r1
 	add	r0, r0, r4
-	.loc 2 10 0
 	uxth	r0, r0
 	pop	{r3, r4, r5, r6, r7, pc}
 .L58:
@@ -981,8 +617,6 @@ V2P_block:
 .L57:
 	.word	.LANCHOR11
 	.word	.LANCHOR17
-	.cfi_endproc
-.LFE235:
 	.size	V2P_block, .-V2P_block
 	.section	.text.P2V_plane,"ax",%progbits
 	.align	1
@@ -993,37 +627,20 @@ V2P_block:
 	.fpu softvfp
 	.type	P2V_plane, %function
 P2V_plane:
-.LFB236:
-	.loc 2 13 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL68:
-	.loc 2 16 0
 	ldr	r3, .L60
-	.loc 2 13 0
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 2 13 0
 	mov	r6, r0
-	.loc 2 16 0
 	ldrh	r5, [r3]
-.LVL69:
 	ldr	r3, .L60+4
 	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
-.LVL70:
 	smulbb	r4, r0, r5
 	mov	r1, r5
 	mov	r0, r6
 	bl	__aeabi_uidivmod
-.LVL71:
 	add	r1, r1, r4
-	.loc 2 18 0
 	uxth	r0, r1
 	pop	{r4, r5, r6, pc}
 .L61:
@@ -1031,8 +648,6 @@ P2V_plane:
 .L60:
 	.word	.LANCHOR11
 	.word	.LANCHOR17
-	.cfi_endproc
-.LFE236:
 	.size	P2V_plane, .-P2V_plane
 	.section	.text.P2V_block_in_plane,"ax",%progbits
 	.align	1
@@ -1043,31 +658,16 @@ P2V_plane:
 	.fpu softvfp
 	.type	P2V_block_in_plane, %function
 P2V_block_in_plane:
-.LFB237:
-	.loc 2 21 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL72:
 	push	{r3, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 3, -8
-	.cfi_offset 14, -4
-	.loc 2 24 0
 	ldr	r3, .L63
 	ldrh	r1, [r3]
 	bl	__aeabi_uidivmod
-.LVL73:
-	.loc 2 25 0
 	ldr	r3, .L63+4
-	.loc 2 24 0
 	uxth	r0, r1
-.LVL74:
-	.loc 2 25 0
 	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
-.LVL75:
-	.loc 2 27 0
 	uxth	r0, r0
 	pop	{r3, pc}
 .L64:
@@ -1075,8 +675,6 @@ P2V_block_in_plane:
 .L63:
 	.word	.LANCHOR17
 	.word	.LANCHOR11
-	.cfi_endproc
-.LFE237:
 	.size	P2V_block_in_plane, .-P2V_block_in_plane
 	.section	.text.ftl_cmp_data_ver,"ax",%progbits
 	.align	1
@@ -1087,38 +685,24 @@ P2V_block_in_plane:
 	.fpu softvfp
 	.type	ftl_cmp_data_ver, %function
 ftl_cmp_data_ver:
-.LFB238:
-	.loc 2 31 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL76:
-	.loc 2 34 0
 	cmp	r0, r1
 	bls	.L66
-	.loc 2 36 0
 	subs	r0, r0, r1
-.LVL77:
 	cmp	r0, #-2147483648
 	ite	hi
 	movhi	r0, #0
 	movls	r0, #1
 	bx	lr
-.LVL78:
 .L66:
-	.loc 2 40 0
 	subs	r0, r1, r0
-.LVL79:
 	cmp	r0, #-2147483648
 	ite	ls
 	movls	r0, #0
 	movhi	r0, #1
-.LVL80:
-	.loc 2 44 0
 	bx	lr
-	.cfi_endproc
-.LFE238:
 	.size	ftl_cmp_data_ver, .-ftl_cmp_data_ver
 	.section	.text.FtlFreeSysBlkQueueEmpty,"ax",%progbits
 	.align	1
@@ -1129,16 +713,11 @@ ftl_cmp_data_ver:
 	.fpu softvfp
 	.type	FtlFreeSysBlkQueueEmpty, %function
 FtlFreeSysBlkQueueEmpty:
-.LFB241:
-	.loc 2 88 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	.loc 2 89 0
 	ldr	r3, .L69
 	ldrh	r0, [r3, #6]
-	.loc 2 90 0
 	clz	r0, r0
 	lsrs	r0, r0, #5
 	bx	lr
@@ -1146,8 +725,6 @@ FtlFreeSysBlkQueueEmpty:
 	.align	2
 .L69:
 	.word	.LANCHOR38
-	.cfi_endproc
-.LFE241:
 	.size	FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty
 	.section	.text.FtlFreeSysBlkQueueFull,"ax",%progbits
 	.align	1
@@ -1158,16 +735,11 @@ FtlFreeSysBlkQueueEmpty:
 	.fpu softvfp
 	.type	FtlFreeSysBlkQueueFull, %function
 FtlFreeSysBlkQueueFull:
-.LFB242:
-	.loc 2 93 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	.loc 2 94 0
 	ldr	r3, .L72
 	ldrh	r0, [r3, #6]
-	.loc 2 95 0
 	sub	r3, r0, #1024
 	rsbs	r0, r3, #0
 	adcs	r0, r0, r3
@@ -1176,8 +748,6 @@ FtlFreeSysBlkQueueFull:
 	.align	2
 .L72:
 	.word	.LANCHOR38
-	.cfi_endproc
-.LFE242:
 	.size	FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull
 	.section	.text.FtlFreeSysBLkSort,"ax",%progbits
 	.align	1
@@ -1188,25 +758,12 @@ FtlFreeSysBlkQueueFull:
 	.fpu softvfp
 	.type	FtlFreeSysBLkSort, %function
 FtlFreeSysBLkSort:
-.LFB244:
-	.loc 2 118 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL81:
-	.loc 2 123 0
 	ldr	r3, .L83
-	.loc 2 118 0
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 2 123 0
 	ldrh	r2, [r3, #6]
 	cbz	r2, .L74
-	.loc 2 119 0
 	ldr	r2, .L83+4
 	movs	r6, #0
 	ldrh	r1, [r3, #2]
@@ -1215,39 +772,23 @@ FtlFreeSysBLkSort:
 	ldrh	r2, [r3, #4]
 	and	r4, r4, #31
 .L76:
-.LVL82:
-	.loc 2 124 0 discriminator 1
 	uxth	r0, r6
 	adds	r6, r6, #1
-.LVL83:
 	cmp	r4, r0
 	bgt	.L77
 	cbz	r5, .L74
 	strh	r1, [r3, #2]	@ movhi
 	strh	r2, [r3, #4]	@ movhi
-.LVL84:
 .L74:
 	pop	{r4, r5, r6, pc}
-.LVL85:
 .L77:
-	.loc 2 125 0 discriminator 3
 	adds	r0, r1, #4
-.LVL86:
-	.loc 2 126 0 discriminator 3
 	adds	r1, r1, #1
-	.loc 2 125 0 discriminator 3
 	ldrh	r5, [r3, r0, lsl #1]
-.LVL87:
-	.loc 2 127 0 discriminator 3
 	adds	r0, r2, #4
-	.loc 2 126 0 discriminator 3
 	ubfx	r1, r1, #0, #10
-	.loc 2 127 0 discriminator 3
 	strh	r5, [r3, r0, lsl #1]	@ movhi
-.LVL88:
 	movs	r5, #1
-.LVL89:
-	.loc 2 128 0 discriminator 3
 	add	r2, r2, r5
 	ubfx	r2, r2, #0, #10
 	b	.L76
@@ -1256,8 +797,6 @@ FtlFreeSysBLkSort:
 .L83:
 	.word	.LANCHOR38
 	.word	.LANCHOR39
-	.cfi_endproc
-.LFE244:
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
 	.section	.text.IsInFreeQueue,"ax",%progbits
 	.align	1
@@ -1268,72 +807,37 @@ FtlFreeSysBLkSort:
 	.fpu softvfp
 	.type	IsInFreeQueue, %function
 IsInFreeQueue:
-.LFB245:
-	.loc 2 163 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL90:
-.LBB189:
-.LBB190:
-	.loc 2 94 0
 	ldr	r3, .L91
-.LBE190:
-.LBE189:
-	.loc 2 163 0
 	push	{r4, r5, lr}
-	.cfi_def_cfa_offset 12
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-.LBB192:
-.LBB191:
-	.loc 2 94 0
 	ldrh	r4, [r3, #6]
-.LBE191:
-.LBE192:
-	.loc 2 168 0
 	cmp	r4, #1024
 	beq	.L89
-	.loc 2 171 0
 	ldrh	r5, [r3, #2]
 	movs	r1, #0
 .L87:
-.LVL91:
-	.loc 2 170 0 discriminator 1
 	cmp	r1, r4
 	bcc	.L88
-.LVL92:
 .L89:
-	.loc 2 164 0
 	movs	r0, #0
-.LVL93:
 	pop	{r4, r5, pc}
-.LVL94:
 .L88:
-	.loc 2 171 0
 	adds	r2, r1, r5
 	ubfx	r2, r2, #0, #10
 	adds	r2, r2, #4
 	ldrh	r2, [r3, r2, lsl #1]
 	cmp	r2, r0
 	beq	.L90
-	.loc 2 170 0 discriminator 2
 	adds	r1, r1, #1
-.LVL95:
 	b	.L87
 .L90:
-	.loc 2 172 0
 	movs	r0, #1
-.LVL96:
-	.loc 2 178 0
 	pop	{r4, r5, pc}
 .L92:
 	.align	2
 .L91:
 	.word	.LANCHOR38
-	.cfi_endproc
-.LFE245:
 	.size	IsInFreeQueue, .-IsInFreeQueue
 	.section	.text.insert_data_list,"ax",%progbits
 	.align	1
@@ -1344,205 +848,114 @@ IsInFreeQueue:
 	.fpu softvfp
 	.type	insert_data_list, %function
 insert_data_list:
-.LFB249:
-	.loc 2 249 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL97:
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 48
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 260 0
 	ldr	r3, .L109
 	ldrh	lr, [r3]
 	cmp	lr, r0
 	bls	.L95
-	.loc 2 265 0
 	ldr	r3, .L109+4
 	movs	r5, #6
 	ldr	r4, [r3]
 	mul	r3, r5, r0
 	str	r3, [sp, #4]
 	adds	r1, r4, r3
-.LVL98:
-	.loc 2 266 0
 	ldr	r2, [sp, #4]
 	movw	r3, #65535
 	strh	r3, [r1, #2]	@ movhi
 	strh	r3, [r4, r2]	@ movhi
-	.loc 2 268 0
 	ldr	r3, .L109+8
 	ldr	ip, [r3]
 	cmp	ip, #0
 	bne	.L96
-.LVL99:
 .L108:
-	.loc 2 317 0
 	str	r1, [r3]
-.LVL100:
 .L95:
-	.loc 2 323 0
 	movs	r0, #0
-.LVL101:
 	add	sp, sp, #16
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL102:
 .L96:
-	.cfi_restore_state
-	.loc 2 273 0
 	ldr	r3, .L109+12
 	lsls	r2, r0, #1
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
 	ldrh	r6, [r3, r0, lsl #1]
-.LVL103:
-	.loc 2 274 0
 	ldrh	r3, [r1, #4]
-.LVL104:
-	.loc 2 275 0
 	cbz	r3, .L106
-	.loc 2 274 0
 	mul	fp, r3, r6
 .L97:
-.LVL105:
-	.loc 2 279 0
 	sub	r3, ip, r4
 	asrs	r6, r3, #1
-.LVL106:
 	ldr	r3, .L109+16
 	muls	r3, r6, r3
-	.loc 2 294 0
 	ldr	r6, .L109+20
 	ldr	r8, [r6]
-	.loc 2 256 0
 	movs	r6, #0
-	.loc 2 279 0
 	uxth	r3, r3
-.LVL107:
-	.loc 2 294 0
 	add	r2, r8, r2
 	str	r2, [sp, #12]
 	mov	r2, ip
-.LVL108:
 .L104:
-	.loc 2 281 0
 	adds	r6, r6, #1
-.LVL109:
 	uxth	r6, r6
-.LVL110:
-	.loc 2 282 0
 	cmp	lr, r6
 	bcc	.L95
-	.loc 2 285 0
 	cmp	r3, r0
 	beq	.L95
-	.loc 2 288 0
 	ldr	r7, [sp, #8]
 	lsl	r10, r3, #1
 	ldrh	r7, [r7, r3, lsl #1]
 	mov	r5, r7
-.LVL111:
-	.loc 2 289 0
 	ldrh	r7, [r2, #4]
-.LVL112:
-	.loc 2 290 0
 	cbz	r7, .L107
-	.loc 2 289 0
 	muls	r7, r5, r7
-.LVL113:
 .L99:
-	.loc 2 293 0
 	cmp	fp, r7
 	bne	.L100
-	.loc 2 294 0
 	ldr	r5, [sp, #12]
-.LVL114:
 	ldrh	r10, [r8, r10]
 	ldrh	r7, [r5]
-.LVL115:
 	cmp	r10, r7
 	bcc	.L102
 .L101:
-	.loc 2 312 0
 	ldr	r5, [sp, #4]
-	.loc 2 315 0
 	cmp	r2, ip
-	.loc 2 312 0
 	strh	r3, [r4, r5]	@ movhi
-.LVL116:
-	.loc 2 313 0
 	ldrh	r3, [r2, #2]
-.LVL117:
 	strh	r3, [r1, #2]	@ movhi
-	.loc 2 315 0
 	bne	.L105
-	.loc 2 316 0
 	strh	r0, [r2, #2]	@ movhi
-	.loc 2 317 0
 	ldr	r3, .L109+8
 	b	.L108
-.LVL118:
 .L106:
-	.loc 2 276 0
 	mov	fp, #-1
 	b	.L97
-.LVL119:
 .L107:
-	.loc 2 291 0
 	mov	r7, #-1
-.LVL120:
 	b	.L99
-.LVL121:
 .L100:
-	.loc 2 298 0
 	bcc	.L101
-.LVL122:
 .L102:
-	.loc 2 301 0
 	ldrh	r7, [r2]
 	movw	r5, #65535
 	cmp	r7, r5
 	bne	.L103
-	.loc 2 302 0
 	strh	r3, [r1, #2]	@ movhi
-.LVL123:
-	.loc 2 303 0
 	strh	r0, [r2]	@ movhi
-	.loc 2 304 0
 	ldr	r3, .L109+24
-.LVL124:
 	b	.L108
-.LVL125:
 .L103:
-	.loc 2 309 0
 	movs	r3, #6
-.LVL126:
 	mla	r2, r3, r7, r4
-.LVL127:
-	.loc 2 281 0
 	mov	r3, r7
 	b	.L104
-.LVL128:
 .L105:
-	.loc 2 319 0
 	ldrh	r1, [r2, #2]
-.LVL129:
 	movs	r3, #6
 	muls	r3, r1, r3
 	strh	r0, [r4, r3]	@ movhi
-.LVL130:
-	.loc 2 320 0
 	strh	r0, [r2, #2]	@ movhi
 	b	.L95
 .L110:
@@ -1555,8 +968,6 @@ insert_data_list:
 	.word	-1431655765
 	.word	.LANCHOR43
 	.word	.LANCHOR44
-	.cfi_endproc
-.LFE249:
 	.size	insert_data_list, .-insert_data_list
 	.section	.text.INSERT_DATA_LIST,"ax",%progbits
 	.align	1
@@ -1567,51 +978,25 @@ insert_data_list:
 	.fpu softvfp
 	.type	INSERT_DATA_LIST, %function
 INSERT_DATA_LIST:
-.LFB248:
-	.loc 2 218 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL131:
 	push	{r3, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 3, -8
-	.cfi_offset 14, -4
-	.loc 2 219 0
 	bl	insert_data_list
-.LVL132:
-	.loc 2 220 0
 	ldr	r2, .L113
 	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	.loc 2 221 0
 	ldr	r2, .L113+4
 	ldrh	r2, [r2]
 	cmp	r2, r3
 	bcs	.L111
-.LVL133:
-.LBB195:
-.LBB196:
 	movs	r2, #221
 	ldr	r1, .L113+8
 	ldr	r0, .L113+12
-.LBE196:
-.LBE195:
-	.loc 2 222 0
 	pop	{r3, lr}
-	.cfi_remember_state
-	.cfi_restore 14
-	.cfi_restore 3
-	.cfi_def_cfa_offset 0
-.LBB198:
-.LBB197:
-	.loc 2 221 0
 	b	printf
-.LVL134:
 .L111:
-	.cfi_restore_state
 	pop	{r3, pc}
 .L114:
 	.align	2
@@ -1620,10 +1005,6 @@ INSERT_DATA_LIST:
 	.word	.LANCHOR5
 	.word	.LANCHOR46
 	.word	.LC1
-.LBE197:
-.LBE198:
-	.cfi_endproc
-.LFE248:
 	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
 	.section	.text.insert_free_list,"ax",%progbits
 	.align	1
@@ -1634,128 +1015,66 @@ INSERT_DATA_LIST:
 	.fpu softvfp
 	.type	insert_free_list, %function
 insert_free_list:
-.LFB250:
-	.loc 2 326 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL135:
-	.loc 2 332 0
 	movw	r1, #65535
-	.loc 2 326 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 332 0
 	cmp	r0, r1
 	beq	.L116
-	.loc 2 335 0
 	ldr	r3, .L122
 	mov	r10, #6
 	mul	r7, r10, r0
 	ldr	r4, [r3]
-	.loc 2 338 0
 	ldr	r3, .L122+4
-	.loc 2 335 0
 	adds	r5, r4, r7
-.LVL136:
-	.loc 2 338 0
 	ldr	r6, [r3]
 	mov	lr, r3
-	.loc 2 336 0
 	strh	r1, [r5, #2]	@ movhi
 	strh	r1, [r4, r7]	@ movhi
-	.loc 2 338 0
 	cbnz	r6, .L117
-	.loc 2 339 0
 	str	r5, [r3]
-.LVL137:
 .L116:
-	.loc 2 372 0
 	movs	r0, #0
-.LVL138:
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL139:
 .L117:
-	.loc 2 343 0
 	ldr	r3, .L122+8
-	.loc 2 345 0
 	subs	r2, r6, r4
-	.loc 2 352 0
 	mov	fp, r1
-	.loc 2 343 0
 	ldr	ip, [r3]
-	.loc 2 345 0
 	asrs	r3, r2, #1
 	ldr	r2, .L122+12
-	.loc 2 343 0
 	ldrh	r8, [ip, r0, lsl #1]
-.LVL140:
-	.loc 2 345 0
 	muls	r2, r3, r2
 	mov	r3, r6
 	uxth	r2, r2
-.LVL141:
 .L120:
-	.loc 2 349 0
 	ldrh	r1, [ip, r2, lsl #1]
 	cmp	r1, r8
 	bcs	.L118
-	.loc 2 352 0
 	ldrh	r1, [r3]
 	cmp	r1, fp
 	bne	.L119
-	.loc 2 353 0
 	strh	r2, [r5, #2]	@ movhi
-.LVL142:
-	.loc 2 354 0
 	strh	r0, [r3]	@ movhi
-	.loc 2 355 0
 	b	.L116
-.LVL143:
 .L119:
-	.loc 2 358 0
 	mla	r3, r10, r1, r4
-.LVL144:
-	.loc 2 348 0
 	mov	r2, r1
-.LVL145:
 	b	.L120
-.LVL146:
 .L118:
-	.loc 2 361 0
 	ldrh	r1, [r3, #2]
-	.loc 2 364 0
 	cmp	r3, r6
-	.loc 2 361 0
 	strh	r1, [r5, #2]	@ movhi
-.LVL147:
-	.loc 2 368 0
 	it	ne
 	ldrhne	r1, [r3, #2]
-	.loc 2 362 0
 	strh	r2, [r4, r7]	@ movhi
-	.loc 2 368 0
 	iteet	ne
 	movne	r2, #6
-.LVL148:
-	.loc 2 365 0
 	strheq	r0, [r3, #2]	@ movhi
-	.loc 2 366 0
 	streq	r5, [lr]
-	.loc 2 368 0
 	mulne	r2, r2, r1
 	itt	ne
 	strhne	r0, [r4, r2]	@ movhi
-.LVL149:
-	.loc 2 369 0
 	strhne	r0, [r3, #2]	@ movhi
 	b	.L116
 .L123:
@@ -1765,8 +1084,6 @@ insert_free_list:
 	.word	.LANCHOR47
 	.word	.LANCHOR43
 	.word	-1431655765
-	.cfi_endproc
-.LFE250:
 	.size	insert_free_list, .-insert_free_list
 	.section	.text.INSERT_FREE_LIST,"ax",%progbits
 	.align	1
@@ -1777,51 +1094,25 @@ insert_free_list:
 	.fpu softvfp
 	.type	INSERT_FREE_LIST, %function
 INSERT_FREE_LIST:
-.LFB247:
-	.loc 2 211 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL150:
 	push	{r3, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 3, -8
-	.cfi_offset 14, -4
-	.loc 2 212 0
 	bl	insert_free_list
-.LVL151:
-	.loc 2 213 0
 	ldr	r2, .L126
 	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	.loc 2 214 0
 	ldr	r2, .L126+4
 	ldrh	r2, [r2]
 	cmp	r2, r3
 	bcs	.L124
-.LVL152:
-.LBB201:
-.LBB202:
 	movs	r2, #214
 	ldr	r1, .L126+8
 	ldr	r0, .L126+12
-.LBE202:
-.LBE201:
-	.loc 2 215 0
 	pop	{r3, lr}
-	.cfi_remember_state
-	.cfi_restore 14
-	.cfi_restore 3
-	.cfi_def_cfa_offset 0
-.LBB204:
-.LBB203:
-	.loc 2 214 0
 	b	printf
-.LVL153:
 .L124:
-	.cfi_restore_state
 	pop	{r3, pc}
 .L127:
 	.align	2
@@ -1830,10 +1121,6 @@ INSERT_FREE_LIST:
 	.word	.LANCHOR5
 	.word	.LANCHOR49
 	.word	.LC1
-.LBE203:
-.LBE204:
-	.cfi_endproc
-.LFE247:
 	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
 	.section	.text.List_remove_node,"ax",%progbits
 	.align	1
@@ -1844,110 +1131,65 @@ INSERT_FREE_LIST:
 	.fpu softvfp
 	.type	List_remove_node, %function
 List_remove_node:
-.LFB251:
-	.loc 2 375 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL154:
 	push	{r4, r5, r6, r7, r8, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 4, -24
-	.cfi_offset 5, -20
-	.cfi_offset 6, -16
-	.cfi_offset 7, -12
-	.cfi_offset 8, -8
-	.cfi_offset 14, -4
-	.loc 2 378 0
 	movs	r6, #6
 	ldr	r5, .L134
 	muls	r6, r1, r6
-	.loc 2 379 0
 	movw	r3, #65535
-	.loc 2 375 0
 	mov	r8, r0
-	.loc 2 378 0
 	ldr	r7, [r5]
 	adds	r4, r7, r6
-.LVL155:
-	.loc 2 379 0
 	ldrh	r2, [r4, #2]
 	cmp	r2, r3
 	bne	.L129
-	.loc 2 379 0 is_stmt 0 discriminator 1
 	ldr	r3, [r0]
 	cmp	r4, r3
 	beq	.L129
-	.loc 2 379 0 discriminator 2
 	movw	r2, #379
 	ldr	r1, .L134+4
-.LVL156:
 	ldr	r0, .L134+8
-.LVL157:
 	bl	printf
-.LVL158:
 .L129:
-	.loc 2 381 0 is_stmt 1
 	ldr	r3, [r8]
 	movw	r1, #65535
 	cmp	r4, r3
 	ldrh	r3, [r7, r6]
 	bne	.L130
-	.loc 2 382 0
 	cmp	r3, r1
-	.loc 2 385 0
 	ittee	ne
 	ldrne	r0, [r5]
 	movne	r2, #6
-	.loc 2 383 0
 	moveq	r3, #0
 	streq	r3, [r8]
-	.loc 2 385 0
 	ittt	ne
 	mlane	r3, r2, r3, r0
 	strne	r3, [r8]
-	.loc 2 386 0
 	strhne	r1, [r3, #2]	@ movhi
 .L132:
-	.loc 2 399 0
 	movw	r3, #65535
-	.loc 2 401 0
 	movs	r0, #0
-	.loc 2 399 0
 	strh	r3, [r7, r6]	@ movhi
 	strh	r3, [r4, #2]	@ movhi
-	.loc 2 401 0
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL159:
 .L130:
-	.loc 2 388 0
 	cmp	r3, r1
 	ldrh	r1, [r4, #2]
 	bne	.L133
-	.loc 2 389 0
 	cmp	r1, r3
 	beq	.L132
-.LVL160:
-	.loc 2 391 0
 	movs	r2, #6
 	ldr	r0, [r5]
 	muls	r1, r2, r1
-.LVL161:
 	strh	r3, [r0, r1]	@ movhi
 	b	.L132
-.LVL162:
 .L133:
-	.loc 2 394 0
 	ldr	r0, [r5]
-.LVL163:
-	.loc 2 395 0
 	movs	r2, #6
 	mla	r5, r2, r3, r0
 	strh	r1, [r5, #2]	@ movhi
-.LVL164:
-	.loc 2 396 0
 	ldrh	r1, [r4, #2]
-	.loc 2 397 0
 	muls	r2, r1, r2
 	strh	r3, [r0, r2]	@ movhi
 	b	.L132
@@ -1957,8 +1199,6 @@ List_remove_node:
 	.word	.LANCHOR40
 	.word	.LANCHOR50
 	.word	.LC1
-	.cfi_endproc
-.LFE251:
 	.size	List_remove_node, .-List_remove_node
 	.section	.text.List_pop_index_node,"ax",%progbits
 	.align	1
@@ -1969,80 +1209,42 @@ List_remove_node:
 	.fpu softvfp
 	.type	List_pop_index_node, %function
 List_pop_index_node:
-.LFB252:
-	.loc 2 404 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL165:
-	.loc 2 408 0
 	ldr	r3, [r0]
-	.loc 2 404 0
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 2 408 0
 	cbz	r3, .L142
-	.loc 2 413 0
 	ldr	r2, .L143
-	.loc 2 412 0
 	movw	r5, #65535
-	.loc 2 413 0
 	movs	r6, #6
 	ldr	r2, [r2]
 .L138:
-.LVL166:
-	.loc 2 412 0
 	cbnz	r1, .L139
 .L141:
-	.loc 2 416 0
 	ldr	r4, .L143+4
 	subs	r3, r3, r2
-.LVL167:
 	asrs	r3, r3, #1
 	muls	r4, r3, r4
-.LVL168:
-	.loc 2 417 0
 	uxth	r1, r4
-.LVL169:
 	bl	List_remove_node
-.LVL170:
 	uxth	r0, r4
-	.loc 2 419 0
 	pop	{r4, r5, r6, pc}
-.LVL171:
 .L139:
-	.loc 2 412 0 discriminator 1
 	ldrh	r4, [r3]
 	cmp	r4, r5
 	beq	.L141
-	.loc 2 414 0
 	subs	r1, r1, #1
-.LVL172:
-	.loc 2 413 0
 	mla	r3, r6, r4, r2
-.LVL173:
-	.loc 2 414 0
 	uxth	r1, r1
-.LVL174:
 	b	.L138
-.LVL175:
 .L142:
-	.loc 2 409 0
 	movw	r0, #65535
-.LVL176:
-	.loc 2 420 0
 	pop	{r4, r5, r6, pc}
 .L144:
 	.align	2
 .L143:
 	.word	.LANCHOR40
 	.word	-1431655765
-	.cfi_endproc
-.LFE252:
 	.size	List_pop_index_node, .-List_pop_index_node
 	.section	.text.List_pop_head_node,"ax",%progbits
 	.align	1
@@ -2053,19 +1255,11 @@ List_pop_index_node:
 	.fpu softvfp
 	.type	List_pop_head_node, %function
 List_pop_head_node:
-.LFB253:
-	.loc 2 423 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL177:
-	.loc 2 424 0
 	movs	r1, #0
 	b	List_pop_index_node
-.LVL178:
-	.cfi_endproc
-.LFE253:
 	.size	List_pop_head_node, .-List_pop_head_node
 	.section	.text.List_get_gc_head_node,"ax",%progbits
 	.align	1
@@ -2076,64 +1270,35 @@ List_pop_head_node:
 	.fpu softvfp
 	.type	List_get_gc_head_node, %function
 List_get_gc_head_node:
-.LFB254:
-	.loc 2 428 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL179:
-	.loc 2 432 0
 	ldr	r3, .L152
-	.loc 2 428 0
 	push	{r4, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 4, -8
-	.cfi_offset 14, -4
-	.loc 2 432 0
 	ldr	r3, [r3]
 	cbz	r3, .L151
-	.loc 2 437 0
 	ldr	r2, .L152+4
 	movs	r4, #6
 	ldr	r1, [r2]
-	.loc 2 436 0
 	movw	r2, #65535
 .L148:
-.LVL180:
 	cbz	r0, .L149
-	.loc 2 436 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r3]
-.LVL181:
 	cmp	r3, r2
 	bne	.L150
 .L151:
-	.loc 2 433 0 is_stmt 1
 	movw	r0, #65535
-.LVL182:
 	pop	{r4, pc}
-.LVL183:
 .L150:
-	.loc 2 438 0
 	subs	r0, r0, #1
-.LVL184:
-	.loc 2 437 0
 	mla	r3, r4, r3, r1
-.LVL185:
-	.loc 2 438 0
 	uxth	r0, r0
-.LVL186:
 	b	.L148
 .L149:
-.LVL187:
-	.loc 2 442 0
 	ldr	r0, .L152+8
-.LVL188:
 	subs	r3, r3, r1
-.LVL189:
 	asrs	r3, r3, #1
 	muls	r3, r0, r3
 	uxth	r0, r3
-	.loc 2 445 0
 	pop	{r4, pc}
 .L153:
 	.align	2
@@ -2141,8 +1306,6 @@ List_get_gc_head_node:
 	.word	.LANCHOR41
 	.word	.LANCHOR40
 	.word	-1431655765
-	.cfi_endproc
-.LFE254:
 	.size	List_get_gc_head_node, .-List_get_gc_head_node
 	.section	.text.List_update_data_list,"ax",%progbits
 	.align	1
@@ -2153,80 +1316,42 @@ List_get_gc_head_node:
 	.fpu softvfp
 	.type	List_update_data_list, %function
 List_update_data_list:
-.LFB255:
-	.loc 2 448 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL190:
-	.loc 2 457 0
 	ldr	r3, .L165
-	.loc 2 448 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 448 0
 	mov	r4, r0
-	.loc 2 457 0
 	ldrh	r3, [r3]
 	cmp	r3, r0
 	beq	.L156
-	.loc 2 457 0 is_stmt 0 discriminator 1
 	ldr	r3, .L165+4
 	ldrh	r3, [r3]
 	cmp	r3, r0
 	beq	.L156
-	.loc 2 457 0 discriminator 2
 	ldr	r3, .L165+8
 	ldrh	r3, [r3]
 	cmp	r3, r0
 	beq	.L156
-.LVL191:
-.LBB207:
-.LBB208:
-	.loc 2 460 0 is_stmt 1
 	ldr	r7, .L165+12
 	movs	r6, #6
-	.loc 2 462 0
 	ldr	r3, .L165+16
-	.loc 2 460 0
 	muls	r6, r0, r6
 	ldr	fp, [r7]
-	.loc 2 462 0
 	ldr	r3, [r3]
-	.loc 2 460 0
 	add	r10, fp, r6
-.LVL192:
-	.loc 2 462 0
 	cmp	r10, r3
 	beq	.L156
-	.loc 2 465 0
 	ldr	r3, .L165+20
-	.loc 2 466 0
 	ldrh	r5, [r10, #4]
-	.loc 2 465 0
 	ldr	r2, [r3]
 	mov	r8, r3
 	ldrh	r2, [r2, r0, lsl #1]
-.LVL193:
-	.loc 2 467 0
 	cmp	r5, #0
 	beq	.L163
-	.loc 2 466 0
 	muls	r5, r2, r5
-.LVL194:
 .L158:
-	.loc 2 470 0
 	ldrh	r3, [r10, #2]
 	movw	r2, #65535
-.LVL195:
 	cmp	r3, r2
 	bne	.L159
 	ldrh	r2, [fp, r6]
@@ -2235,11 +1360,8 @@ List_update_data_list:
 	mov	r2, #470
 	ldr	r1, .L165+24
 	ldr	r0, .L165+28
-.LVL196:
 	bl	printf
-.LVL197:
 .L159:
-	.loc 2 471 0
 	ldrh	r3, [r10, #2]
 	movw	r2, #65535
 	cmp	r3, r2
@@ -2248,77 +1370,45 @@ List_update_data_list:
 	cmp	r2, r3
 	beq	.L156
 .L160:
-	.loc 2 473 0
 	movs	r2, #6
 	muls	r2, r3, r2
-.LVL198:
-	.loc 2 474 0
 	ldr	r3, .L165+32
 	asrs	r1, r2, #1
 	muls	r3, r1, r3
-	.loc 2 475 0
 	ldr	r1, [r8]
 	ldrh	r0, [r1, r3, lsl #1]
-.LVL199:
-	.loc 2 476 0
 	ldr	r1, [r7]
 	add	r2, r2, r1
-.LVL200:
 	ldrh	r3, [r2, #4]
-.LVL201:
-	.loc 2 477 0
 	cbz	r3, .L164
-	.loc 2 476 0
 	muls	r3, r0, r3
-.LVL202:
 .L161:
-	.loc 2 480 0
 	cmp	r5, r3
 	bcs	.L156
-	.loc 2 481 0
 	ldr	r5, .L165+36
-.LVL203:
 	mov	r1, r4
 	ldr	r0, .L165+16
-.LVL204:
 	bl	List_remove_node
-.LVL205:
 	ldrh	r3, [r5]
 	cbnz	r3, .L162
 	movw	r2, #481
 	ldr	r1, .L165+24
 	ldr	r0, .L165+28
 	bl	printf
-.LVL206:
 .L162:
 	ldrh	r3, [r5]
-	.loc 2 482 0
 	mov	r0, r4
-	.loc 2 481 0
 	subs	r3, r3, #1
 	strh	r3, [r5]	@ movhi
-	.loc 2 482 0
 	bl	INSERT_DATA_LIST
-.LVL207:
 .L156:
-.LBE208:
-.LBE207:
-	.loc 2 485 0
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL208:
 .L163:
-.LBB210:
-.LBB209:
-	.loc 2 468 0
 	mov	r5, #-1
-.LVL209:
 	b	.L158
-.LVL210:
 .L164:
-	.loc 2 478 0
 	mov	r3, #-1
-.LVL211:
 	b	.L161
 .L166:
 	.align	2
@@ -2333,10 +1423,6 @@ List_update_data_list:
 	.word	.LC1
 	.word	-1431655765
 	.word	.LANCHOR45
-.LBE209:
-.LBE210:
-	.cfi_endproc
-.LFE255:
 	.size	List_update_data_list, .-List_update_data_list
 	.section	.text.select_l2p_ram_region,"ax",%progbits
 	.align	1
@@ -2347,126 +1433,78 @@ List_update_data_list:
 	.fpu softvfp
 	.type	select_l2p_ram_region, %function
 select_l2p_ram_region:
-.LFB263:
-	.loc 2 749 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL212:
 	push	{r3, r4, r5, r6, r7, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 3, -24
-	.cfi_offset 4, -20
-	.cfi_offset 5, -16
-	.cfi_offset 6, -12
-	.cfi_offset 7, -8
-	.cfi_offset 14, -4
-	.loc 2 754 0
 	movs	r1, #0
 	ldr	r3, .L177
-	.loc 2 755 0
 	movs	r0, #12
 	movw	r5, #65535
-	.loc 2 754 0
 	ldrh	r2, [r3]
-	.loc 2 755 0
 	ldr	r3, .L177+4
 	ldr	r3, [r3]
-.LVL213:
 .L168:
 	uxth	r4, r1
-.LVL214:
-	.loc 2 754 0 discriminator 1
 	cmp	r4, r2
 	bcc	.L170
 	mov	r4, r2
-.LVL215:
 	movs	r1, #0
-.LVL216:
 	mov	r6, #-2147483648
-	.loc 2 765 0
 	movs	r7, #12
 .L171:
 	uxth	r5, r1
-.LVL217:
-	.loc 2 764 0 discriminator 1
 	cmp	r5, r2
 	bcc	.L173
-	.loc 2 773 0
 	cmp	r4, r2
 	bcc	.L169
-	.loc 2 779 0
 	ldr	r1, .L177+8
 	mov	r4, r2
 	mov	r0, #-1
 	ldrh	r7, [r1]
 	movs	r1, #0
-.LVL218:
 .L174:
 	uxth	r5, r1
-.LVL219:
-	.loc 2 778 0 discriminator 1
 	cmp	r5, r2
 	bcc	.L176
-	.loc 2 784 0
 	cmp	r4, r2
 	bcc	.L169
-	.loc 2 784 0 is_stmt 0 discriminator 1
 	mov	r2, #784
 	ldr	r1, .L177+12
 	ldr	r0, .L177+16
-.LVL220:
 	bl	printf
-.LVL221:
 	b	.L169
-.LVL222:
 .L170:
 	adds	r1, r1, #1
-	.loc 2 755 0 is_stmt 1
 	mla	r6, r0, r1, r3
 	ldrh	r6, [r6, #-12]
 	cmp	r6, r5
 	bne	.L168
-.LVL223:
 .L169:
-	.loc 2 786 0
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, pc}
-.LVL224:
 .L173:
-	.loc 2 765 0
 	mla	r0, r7, r1, r3
 	ldr	r0, [r0, #4]
 	cmp	r0, #0
 	blt	.L172
-	.loc 2 766 0
 	cmp	r6, r0
 	itt	hi
 	movhi	r6, r0
-.LVL225:
 	movhi	r4, r5
 .L172:
-.LVL226:
 	adds	r1, r1, #1
-.LVL227:
 	b	.L171
-.LVL228:
 .L176:
-	.loc 2 779 0
 	ldr	r6, [r3, #4]
 	cmp	r0, r6
 	bls	.L175
-	.loc 2 779 0 is_stmt 0 discriminator 1
 	ldrh	ip, [r3]
 	cmp	ip, r7
 	itt	ne
 	movne	r0, r6
-.LVL229:
 	movne	r4, r5
-.LVL230:
 .L175:
 	adds	r1, r1, #1
-.LVL231:
 	adds	r3, r3, #12
 	b	.L174
 .L178:
@@ -2477,8 +1515,6 @@ select_l2p_ram_region:
 	.word	.LANCHOR56
 	.word	.LANCHOR57
 	.word	.LC1
-	.cfi_endproc
-.LFE263:
 	.size	select_l2p_ram_region, .-select_l2p_ram_region
 	.section	.text.FtlUpdateVaildLpn,"ax",%progbits
 	.align	1
@@ -2489,70 +1525,31 @@ select_l2p_ram_region:
 	.fpu softvfp
 	.type	FtlUpdateVaildLpn, %function
 FtlUpdateVaildLpn:
-.LFB269:
-	.loc 2 931 0 is_stmt 1
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL232:
-	.loc 2 934 0
 	ldr	r2, .L189
-	.loc 2 931 0
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
 	mov	r1, r2
-	.loc 2 934 0
 	ldrh	r3, [r2]
 	cmp	r3, #4
 	bhi	.L180
-	.loc 2 934 0 is_stmt 0 discriminator 1
 	cbnz	r0, .L180
-	.loc 2 934 0
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
-	.loc 2 943 0 is_stmt 1
 	pop	{r4, r5, r6, pc}
 .L180:
-	.loc 2 935 0
 	movs	r3, #0
-.LBB213:
-.LBB214:
-	.loc 2 937 0
 	ldr	r0, .L189+4
-.LVL233:
-.LBE214:
-.LBE213:
-	.loc 2 935 0
 	strh	r3, [r1]	@ movhi
-.LBB218:
-.LBB215:
-	.loc 2 939 0
 	movw	r6, #65535
 	ldr	r1, .L189+8
 	ldrh	r4, [r0]
 	mov	r0, r3
-.LBE215:
-.LBE218:
-	.loc 2 936 0
 	ldr	r2, .L189+12
-.LBB219:
-.LBB216:
-	.loc 2 939 0
 	ldr	r1, [r1]
-.LBE216:
-.LBE219:
-	.loc 2 936 0
 	str	r3, [r2]
-.LVL234:
 	add	r4, r1, r4, lsl #1
 .L181:
-.LBB220:
-.LBB217:
-	.loc 2 937 0
 	cmp	r1, r4
 	bne	.L183
 	cbz	r3, .L179
@@ -2560,10 +1557,8 @@ FtlUpdateVaildLpn:
 .L179:
 	pop	{r4, r5, r6, pc}
 .L183:
-	.loc 2 939 0
 	ldrh	r5, [r1], #2
 	cmp	r5, r6
-	.loc 2 940 0
 	itt	ne
 	addne	r0, r0, r5
 	movne	r3, #1
@@ -2575,10 +1570,6 @@ FtlUpdateVaildLpn:
 	.word	.LANCHOR5
 	.word	.LANCHOR42
 	.word	.LANCHOR59
-.LBE217:
-.LBE220:
-	.cfi_endproc
-.LFE269:
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
 	.section	.text.ftl_set_blk_mode,"ax",%progbits
 	.align	1
@@ -2589,27 +1580,17 @@ FtlUpdateVaildLpn:
 	.fpu softvfp
 	.type	ftl_set_blk_mode, %function
 ftl_set_blk_mode:
-.LFB275:
-	.loc 2 1396 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL235:
-	.loc 2 1396 0
 	mov	r3, r0
-	.loc 2 1397 0
 	cbz	r1, .L192
 	b	ftl_set_blk_mode.part.6
-.LVL236:
 .L192:
-	.loc 2 1400 0
 	ldr	r2, .L193
 	lsrs	r0, r0, #5
-.LVL237:
 	and	r3, r3, #31
 	ldr	r1, [r2]
-.LVL238:
 	movs	r2, #1
 	lsl	r3, r2, r3
 	ldr	r2, [r1, r0, lsl #2]
@@ -2620,8 +1601,6 @@ ftl_set_blk_mode:
 	.align	2
 .L193:
 	.word	.LANCHOR1
-	.cfi_endproc
-.LFE275:
 	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
 	.section	.text.ftl_get_blk_mode,"ax",%progbits
 	.align	1
@@ -2632,30 +1611,21 @@ ftl_set_blk_mode:
 	.fpu softvfp
 	.type	ftl_get_blk_mode, %function
 ftl_get_blk_mode:
-.LFB276:
-	.loc 2 1404 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL239:
-	.loc 2 1405 0
 	ldr	r3, .L196
 	lsrs	r2, r0, #5
 	and	r0, r0, #31
-.LVL240:
 	ldr	r3, [r3]
 	ldr	r3, [r3, r2, lsl #2]
 	lsr	r0, r3, r0
-	.loc 2 1406 0
 	and	r0, r0, #1
 	bx	lr
 .L197:
 	.align	2
 .L196:
 	.word	.LANCHOR1
-	.cfi_endproc
-.LFE276:
 	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
 	.section	.text.ftl_sb_update_avl_pages,"ax",%progbits
 	.align	1
@@ -2666,81 +1636,46 @@ ftl_get_blk_mode:
 	.fpu softvfp
 	.type	ftl_sb_update_avl_pages, %function
 ftl_sb_update_avl_pages:
-.LFB282:
-	.loc 2 1657 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL241:
-	.loc 2 1659 0
 	movs	r3, #0
-	.loc 2 1657 0
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 2 1659 0
 	strh	r3, [r0, #4]	@ movhi
-.LVL242:
-	.loc 2 1662 0
 	movw	r6, #65535
-	.loc 2 1660 0
 	ldr	r3, .L205
 	ldrh	r4, [r3]
 	add	r3, r0, r2, lsl #1
 	adds	r3, r3, #14
-.LVL243:
 .L199:
-	.loc 2 1660 0 is_stmt 0 discriminator 1
 	cmp	r2, r4
 	bcc	.L201
-	.loc 2 1671 0 is_stmt 1
 	ldr	r3, .L205+4
 	add	r5, r0, #16
-	.loc 2 1669 0
 	movw	r6, #65535
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	subs	r1, r3, r1
-.LVL244:
-	.loc 2 1671 0
 	movs	r3, #0
 	uxth	r1, r1
-.LVL245:
 .L202:
-	.loc 2 1667 0 discriminator 1
 	uxth	r2, r3
 	cmp	r4, r2
 	bhi	.L204
-	.loc 2 1674 0
 	pop	{r4, r5, r6, pc}
-.LVL246:
 .L201:
-	.loc 2 1662 0
 	ldrh	r5, [r3, #2]!
-	.loc 2 1660 0
 	adds	r2, r2, #1
-.LVL247:
 	uxth	r2, r2
-.LVL248:
-	.loc 2 1662 0
 	cmp	r5, r6
-	.loc 2 1664 0
 	ittt	ne
 	ldrhne	r5, [r0, #4]
 	addne	r5, r5, #1
 	strhne	r5, [r0, #4]	@ movhi
 	b	.L199
-.LVL249:
 .L204:
-	.loc 2 1669 0
 	ldrh	r2, [r5], #2
 	adds	r3, r3, #1
-.LVL250:
 	cmp	r2, r6
-	.loc 2 1671 0
 	ittt	ne
 	ldrhne	r2, [r0, #4]
 	addne	r2, r2, r1
@@ -2751,8 +1686,6 @@ ftl_sb_update_avl_pages:
 .L205:
 	.word	.LANCHOR3
 	.word	.LANCHOR19
-	.cfi_endproc
-.LFE282:
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
 	.section	.text.FtlSlcSuperblockCheck,"ax",%progbits
 	.align	1
@@ -2763,81 +1696,46 @@ ftl_sb_update_avl_pages:
 	.fpu softvfp
 	.type	FtlSlcSuperblockCheck, %function
 FtlSlcSuperblockCheck:
-.LFB285:
-	.loc 2 2062 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL251:
-	.loc 2 2065 0
 	ldrh	r3, [r0, #4]
-	.loc 2 2062 0
 	push	{r4, r5, lr}
-	.cfi_def_cfa_offset 12
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 2 2065 0
 	cbz	r3, .L207
-	.loc 2 2067 0
 	ldrh	r2, [r0]
 	movw	r3, #65535
 	cmp	r2, r3
 	beq	.L207
-.LVL252:
-.LBB223:
-.LBB224:
-	.loc 2 2069 0
 	ldrb	r2, [r0, #6]	@ zero_extendqisi2
-	.loc 2 2074 0
 	movs	r5, #0
-	.loc 2 2069 0
 	adds	r2, r2, #8
 	ldrh	r1, [r0, r2, lsl #1]
-.LVL253:
-	.loc 2 2072 0
 	ldr	r2, .L213
 	ldrh	r4, [r2]
-	.loc 2 2070 0
 	mov	r2, r3
 .L210:
 	cmp	r1, r2
 	beq	.L212
-.LVL254:
 .L207:
 	pop	{r4, r5, pc}
-.LVL255:
 .L212:
-	.loc 2 2071 0
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	uxtb	r3, r3
-	.loc 2 2072 0
 	cmp	r3, r4
-	.loc 2 2071 0
 	strb	r3, [r0, #6]
-	.loc 2 2073 0
 	itttt	eq
 	ldrheq	r3, [r0, #2]
-	.loc 2 2074 0
 	strbeq	r5, [r0, #6]
-	.loc 2 2073 0
 	addeq	r3, r3, #1
 	strheq	r3, [r0, #2]	@ movhi
-	.loc 2 2076 0
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r1, [r0, r3, lsl #1]
-.LVL256:
 	b	.L210
 .L214:
 	.align	2
 .L213:
 	.word	.LANCHOR3
-.LBE224:
-.LBE223:
-	.cfi_endproc
-.LFE285:
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
 	.section	.text.make_superblock,"ax",%progbits
 	.align	1
@@ -2848,101 +1746,55 @@ FtlSlcSuperblockCheck:
 	.fpu softvfp
 	.type	make_superblock, %function
 make_superblock:
-.LFB287:
-	.loc 2 2094 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL257:
-	.loc 2 2097 0
 	ldr	r3, .L220
 	ldrh	r2, [r0]
-	.loc 2 2094 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 2094 0
 	mov	r4, r0
-	.loc 2 2097 0
 	ldrh	r3, [r3]
 	cmp	r2, r3
 	bcc	.L216
-	.loc 2 2097 0 is_stmt 0 discriminator 1
 	movw	r2, #2097
 	ldr	r1, .L220+4
 	ldr	r0, .L220+8
-.LVL258:
 	bl	printf
-.LVL259:
 .L216:
-	.loc 2 2100 0 is_stmt 1
 	ldr	r3, .L220+12
 	add	r6, r4, #16
-	.loc 2 2101 0
 	ldr	r10, .L220+20
-	.loc 2 2102 0
 	movw	r7, #65535
-	.loc 2 2098 0
 	movs	r5, #0
-	.loc 2 2100 0
 	ldrh	r8, [r3]
-	.loc 2 2098 0
 	strh	r5, [r4, #4]	@ movhi
-	.loc 2 2099 0
 	strb	r5, [r4, #7]
-.LVL260:
 .L217:
-	.loc 2 2100 0 discriminator 1
 	uxth	r3, r5
 	cmp	r8, r3
 	bhi	.L219
-	.loc 2 2110 0
 	ldr	r2, .L220+16
-	.loc 2 2113 0
 	movs	r0, #0
-	.loc 2 2110 0
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r2]
 	smulbb	r3, r3, r2
 	strh	r3, [r4, #4]	@ movhi
-	.loc 2 2111 0
 	movs	r3, #1
 	strb	r3, [r4, #9]
-	.loc 2 2113 0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL261:
 .L219:
-	.loc 2 2101 0
 	ldrh	r1, [r4]
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL262:
-	.loc 2 2102 0
 	strh	r7, [r6]	@ movhi
-	.loc 2 2101 0
 	mov	fp, r0
-.LVL263:
-	.loc 2 2103 0
 	bl	FtlBbmIsBadBlock
-.LVL264:
 	cbnz	r0, .L218
-	.loc 2 2104 0
 	strh	fp, [r6]	@ movhi
-	.loc 2 2105 0
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	strb	r3, [r4, #7]
 .L218:
-.LVL265:
 	adds	r5, r5, #1
-.LVL266:
 	adds	r6, r6, #2
 	b	.L217
 .L221:
@@ -2954,8 +1806,6 @@ make_superblock:
 	.word	.LANCHOR3
 	.word	.LANCHOR19
 	.word	.LANCHOR13
-	.cfi_endproc
-.LFE287:
 	.size	make_superblock, .-make_superblock
 	.section	.text.update_multiplier_value,"ax",%progbits
 	.align	1
@@ -2966,81 +1816,44 @@ make_superblock:
 	.fpu softvfp
 	.type	update_multiplier_value, %function
 update_multiplier_value:
-.LFB296:
-	.loc 2 2454 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL267:
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 3, -32
-	.cfi_offset 4, -28
-	.cfi_offset 5, -24
-	.cfi_offset 6, -20
-	.cfi_offset 7, -16
-	.cfi_offset 8, -12
-	.cfi_offset 10, -8
-	.cfi_offset 14, -4
-	.loc 2 2458 0
 	movs	r5, #0
 	ldr	r3, .L228
-	.loc 2 2454 0
 	mov	r6, r0
-	.loc 2 2456 0
 	mov	r4, r5
-	.loc 2 2459 0
 	ldr	r10, .L228+12
-	.loc 2 2458 0
 	ldrh	r7, [r3]
-	.loc 2 2461 0
 	ldr	r3, .L228+4
 	ldrh	r8, [r3]
-.LVL268:
 .L223:
-	.loc 2 2458 0 discriminator 1
 	uxth	r3, r5
 	cmp	r7, r3
 	bhi	.L225
-	.loc 2 2463 0
 	cbz	r4, .L227
-	.loc 2 2464 0
 	mov	r1, r4
 	mov	r0, #32768
 	bl	__aeabi_idiv
-.LVL269:
 .L226:
-	.loc 2 2465 0
 	ldr	r3, .L228+8
 	movs	r2, #6
 	ldr	r3, [r3]
 	mla	r6, r2, r6, r3
 	strh	r0, [r6, #4]	@ movhi
-	.loc 2 2467 0
 	movs	r0, #0
-.LVL270:
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.LVL271:
 .L225:
-	.loc 2 2459 0
 	mov	r1, r6
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL272:
-	.loc 2 2460 0
 	bl	FtlBbmIsBadBlock
-.LVL273:
 	cbnz	r0, .L224
-	.loc 2 2461 0
 	add	r4, r4, r8
-.LVL274:
 	uxth	r4, r4
-.LVL275:
 .L224:
 	adds	r5, r5, #1
-.LVL276:
 	b	.L223
-.LVL277:
 .L227:
 	mov	r0, r4
 	b	.L226
@@ -3051,8 +1864,6 @@ update_multiplier_value:
 	.word	.LANCHOR19
 	.word	.LANCHOR40
 	.word	.LANCHOR13
-	.cfi_endproc
-.LFE296:
 	.size	update_multiplier_value, .-update_multiplier_value
 	.section	.text.GetFreeBlockMinEraseCount,"ax",%progbits
 	.align	1
@@ -3063,18 +1874,12 @@ update_multiplier_value:
 	.fpu softvfp
 	.type	GetFreeBlockMinEraseCount, %function
 GetFreeBlockMinEraseCount:
-.LFB297:
-	.loc 2 2470 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL278:
-	.loc 2 2473 0
 	ldr	r3, .L233
 	ldr	r0, [r3]
 	cbz	r0, .L231
-	.loc 2 2474 0
 	ldr	r3, .L233+4
 	ldr	r3, [r3]
 	subs	r0, r0, r3
@@ -3085,9 +1890,7 @@ GetFreeBlockMinEraseCount:
 	ldr	r3, [r3]
 	uxth	r0, r0
 	ldrh	r0, [r3, r0, lsl #1]
-.LVL279:
 .L231:
-	.loc 2 2476 0
 	bx	lr
 .L234:
 	.align	2
@@ -3096,8 +1899,6 @@ GetFreeBlockMinEraseCount:
 	.word	.LANCHOR40
 	.word	-1431655765
 	.word	.LANCHOR43
-	.cfi_endproc
-.LFE297:
 	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
 	.section	.text.GetFreeBlockMaxEraseCount,"ax",%progbits
 	.align	1
@@ -3108,79 +1909,48 @@ GetFreeBlockMinEraseCount:
 	.fpu softvfp
 	.type	GetFreeBlockMaxEraseCount, %function
 GetFreeBlockMaxEraseCount:
-.LFB298:
-	.loc 2 2479 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL280:
-	.loc 2 2484 0
 	ldr	r3, .L243
-	.loc 2 2479 0
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 2 2484 0
 	ldr	r3, [r3]
 	cbz	r3, .L241
-	.loc 2 2485 0
 	ldr	r2, .L243+4
-	.loc 2 2489 0
 	movs	r5, #6
 	movw	r6, #65535
-	.loc 2 2485 0
 	ldrh	r2, [r2]
 	rsb	r2, r2, r2, lsl #3
 	asrs	r2, r2, #3
 	cmp	r0, r2
-	.loc 2 2486 0
 	it	gt
 	uxthgt	r0, r2
-.LVL281:
-	.loc 2 2487 0
 	ldr	r2, .L243+8
 	ldr	r1, [r2]
 	ldr	r2, .L243+12
 	subs	r3, r3, r1
 	asrs	r3, r3, #1
 	muls	r3, r2, r3
-	.loc 2 2488 0
 	movs	r2, #0
-	.loc 2 2487 0
 	uxth	r3, r3
-.LVL282:
 .L238:
-	.loc 2 2488 0 discriminator 1
 	uxth	r4, r2
 	cmp	r0, r4
 	bls	.L240
-	.loc 2 2489 0
 	mul	r4, r5, r3
 	adds	r2, r2, #1
-.LVL283:
 	ldrh	r4, [r1, r4]
 	cmp	r4, r6
 	bne	.L242
 .L240:
-	.loc 2 2493 0
 	ldr	r2, .L243+16
 	ldr	r2, [r2]
 	ldrh	r0, [r2, r3, lsl #1]
-.LVL284:
 	pop	{r4, r5, r6, pc}
-.LVL285:
 .L242:
 	mov	r3, r4
-.LVL286:
 	b	.L238
 .L241:
-	.loc 2 2480 0
 	mov	r0, r3
-.LVL287:
-	.loc 2 2496 0
 	pop	{r4, r5, r6, pc}
 .L244:
 	.align	2
@@ -3190,8 +1960,6 @@ GetFreeBlockMaxEraseCount:
 	.word	.LANCHOR40
 	.word	-1431655765
 	.word	.LANCHOR43
-	.cfi_endproc
-.LFE298:
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
 	.section	.text.FtlPrintInfo2buf,"ax",%progbits
 	.align	1
@@ -3202,566 +1970,314 @@ GetFreeBlockMaxEraseCount:
 	.fpu softvfp
 	.type	FtlPrintInfo2buf, %function
 FtlPrintInfo2buf:
-.LFB203:
-	.loc 3 12 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL288:
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 48
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 3 12 0
 	mov	r8, r0
-.LVL289:
-	.loc 3 16 0
 	ldr	r1, .L257
 	bl	sprintf
-.LVL290:
-	.loc 3 17 0
 	ldr	r3, .L257+4
-	.loc 3 16 0
 	add	r5, r8, r0
-.LVL291:
-	.loc 3 17 0
 	ldr	r1, .L257+8
 	mov	r0, r5
-	.loc 3 31 0
 	ldr	r4, .L257+12
-	.loc 3 17 0
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL292:
 	add	r5, r5, r0
-.LVL293:
-	.loc 3 18 0
 	ldr	r1, .L257+16
 	mov	r0, r5
-	.loc 3 32 0
 	ldr	r10, .L257+352
-	.loc 3 18 0
 	bl	sprintf
-.LVL294:
-	.loc 3 19 0
 	ldr	r3, .L257+20
-	.loc 3 18 0
 	add	r5, r5, r0
-.LVL295:
-	.loc 3 19 0
 	ldr	r1, .L257+24
 	mov	r0, r5
-	.loc 3 39 0
 	ldr	r6, .L257+28
-	.loc 3 19 0
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL296:
-	.loc 3 20 0
 	ldr	r3, .L257+32
-	.loc 3 19 0
 	add	r5, r5, r0
-.LVL297:
-	.loc 3 20 0
 	ldr	r1, .L257+36
 	mov	r0, r5
-	.loc 3 67 0
 	ldr	r7, .L257+40
-	.loc 3 20 0
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL298:
-	.loc 3 21 0
 	ldr	r3, .L257+44
-	.loc 3 20 0
 	add	r5, r5, r0
-.LVL299:
-	.loc 3 21 0
 	ldr	r1, .L257+48
 	mov	r0, r5
-	.loc 3 72 0
 	ldr	fp, .L257+356
-	.loc 3 21 0
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL300:
-	.loc 3 22 0
 	ldr	r3, .L257+52
-	.loc 3 21 0
 	add	r5, r5, r0
-.LVL301:
-	.loc 3 22 0
 	ldr	r1, .L257+56
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL302:
-	.loc 3 23 0
 	ldr	r3, .L257+60
-	.loc 3 22 0
 	add	r5, r5, r0
-.LVL303:
-	.loc 3 23 0
 	ldr	r1, .L257+64
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL304:
-	.loc 3 24 0
 	ldr	r3, .L257+68
-	.loc 3 23 0
 	add	r5, r5, r0
-.LVL305:
-	.loc 3 24 0
 	ldr	r1, .L257+72
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL306:
-	.loc 3 25 0
 	ldr	r3, .L257+76
-	.loc 3 24 0
 	add	r5, r5, r0
-.LVL307:
-	.loc 3 25 0
 	ldr	r1, .L257+80
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL308:
-	.loc 3 26 0
 	ldr	r3, .L257+84
-	.loc 3 25 0
 	add	r5, r5, r0
-.LVL309:
-	.loc 3 26 0
 	ldr	r1, .L257+88
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL310:
-	.loc 3 27 0
 	ldr	r3, .L257+92
-	.loc 3 26 0
 	add	r5, r5, r0
-.LVL311:
-	.loc 3 27 0
 	ldr	r1, .L257+96
 	mov	r0, r5
 	ldr	r2, [r3]
 	lsrs	r2, r2, #11
 	bl	sprintf
-.LVL312:
-	.loc 3 28 0
 	ldr	r3, .L257+100
-	.loc 3 27 0
 	add	r5, r5, r0
-.LVL313:
-	.loc 3 28 0
 	ldr	r1, .L257+104
 	mov	r0, r5
 	ldr	r2, [r3]
 	lsrs	r2, r2, #11
 	bl	sprintf
-.LVL314:
-	.loc 3 29 0
 	ldr	r3, .L257+108
-	.loc 3 28 0
 	add	r5, r5, r0
-.LVL315:
-	.loc 3 29 0
 	ldr	r1, .L257+112
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL316:
-	.loc 3 30 0
 	ldr	r3, .L257+116
-	.loc 3 29 0
 	add	r5, r5, r0
-.LVL317:
-	.loc 3 30 0
 	ldr	r1, .L257+120
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL318:
 	add	r5, r5, r0
-.LVL319:
-	.loc 3 31 0
 	ldrh	r2, [r4, #6]
 	ldr	r1, .L257+124
 	mov	r0, r5
 	bl	sprintf
-.LVL320:
 	add	r5, r5, r0
-.LVL321:
-	.loc 3 32 0
 	ldrh	r2, [r10]
 	ldr	r1, .L257+128
 	mov	r0, r5
 	bl	sprintf
-.LVL322:
-	.loc 3 33 0
 	ldr	r3, .L257+132
-	.loc 3 32 0
 	add	r5, r5, r0
-.LVL323:
-	.loc 3 33 0
 	ldr	r1, .L257+136
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL324:
-	.loc 3 34 0
 	ldr	r3, .L257+140
-	.loc 3 33 0
 	add	r5, r5, r0
-.LVL325:
-	.loc 3 34 0
 	ldr	r1, .L257+144
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL326:
-	.loc 3 35 0
 	ldr	r3, .L257+148
-	.loc 3 34 0
 	add	r5, r5, r0
-.LVL327:
-	.loc 3 35 0
 	ldr	r1, .L257+152
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL328:
-	.loc 3 36 0
 	ldr	r3, .L257+156
-	.loc 3 35 0
 	add	r5, r5, r0
-.LVL329:
-	.loc 3 36 0
 	ldr	r1, .L257+160
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL330:
-	.loc 3 37 0
 	ldr	r3, .L257+164
-	.loc 3 36 0
 	add	r5, r5, r0
-.LVL331:
-	.loc 3 37 0
 	ldr	r1, .L257+168
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL332:
-	.loc 3 38 0
 	ldr	r3, .L257+172
-	.loc 3 37 0
 	add	r5, r5, r0
-.LVL333:
-	.loc 3 38 0
 	ldr	r1, .L257+176
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL334:
 	add	r5, r5, r0
-.LVL335:
-	.loc 3 39 0
 	ldrh	r2, [r6, #30]
 	ldr	r1, .L257+180
 	mov	r0, r5
 	bl	sprintf
-.LVL336:
 	add	r5, r5, r0
-.LVL337:
-	.loc 3 40 0
 	ldrh	r2, [r6, #28]
 	ldr	r1, .L257+184
 	mov	r0, r5
 	bl	sprintf
-.LVL338:
-	.loc 3 41 0
 	ldr	r3, .L257+188
-	.loc 3 40 0
 	add	r5, r5, r0
-.LVL339:
-	.loc 3 41 0
 	ldr	r1, .L257+192
 	mov	r0, r5
-	.loc 3 55 0
 	ldr	r6, .L257+196
-	.loc 3 41 0
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL340:
-	.loc 3 42 0
 	ldr	r3, .L257+200
-	.loc 3 41 0
 	add	r5, r5, r0
-.LVL341:
-	.loc 3 42 0
 	ldr	r1, .L257+204
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL342:
-	.loc 3 43 0
 	ldr	r3, .L257+208
-	.loc 3 42 0
 	add	r5, r5, r0
-.LVL343:
-	.loc 3 43 0
 	ldr	r1, .L257+212
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL344:
-	.loc 3 44 0
 	ldr	r3, .L257+216
-	.loc 3 43 0
 	add	r5, r5, r0
-.LVL345:
-	.loc 3 44 0
 	ldr	r1, .L257+220
 	mov	r0, r5
 	ldrh	r2, [r3, #6]
 	bl	sprintf
-.LVL346:
-	.loc 3 45 0
 	ldr	r3, .L257+224
-	.loc 3 44 0
 	add	r5, r5, r0
-.LVL347:
-	.loc 3 45 0
 	ldr	r1, .L257+228
 	mov	r0, r5
 	ldrh	r2, [r3]
 	bl	sprintf
-.LVL348:
-	.loc 3 46 0
 	ldr	r3, .L257+232
-	.loc 3 45 0
 	add	r5, r5, r0
-.LVL349:
-	.loc 3 46 0
 	ldr	r1, .L257+236
 	mov	r0, r5
 	ldrh	r2, [r3]
 	bl	sprintf
-.LVL350:
-	.loc 3 47 0
 	ldr	r3, .L257+240
-	.loc 3 46 0
 	add	r5, r5, r0
-.LVL351:
-	.loc 3 47 0
 	ldr	r1, .L257+244
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL352:
-	.loc 3 48 0
 	ldr	r3, .L257+248
-	.loc 3 47 0
 	add	r5, r5, r0
-.LVL353:
-	.loc 3 48 0
 	ldr	r1, .L257+252
 	mov	r0, r5
 	ldrh	r2, [r3]
 	bl	sprintf
-.LVL354:
-	.loc 3 49 0
 	ldrh	r2, [r4]
-	.loc 3 48 0
 	add	r5, r5, r0
-.LVL355:
-	.loc 3 50 0
 	ldr	r4, .L257+256
-	.loc 3 49 0
 	mov	r0, r5
 	ldr	r1, .L257+260
 	bl	sprintf
-.LVL356:
 	add	r5, r5, r0
-.LVL357:
-	.loc 3 50 0
 	ldrh	r2, [r4, #2]
 	ldr	r1, .L257+264
 	mov	r0, r5
 	bl	sprintf
-.LVL358:
 	add	r5, r5, r0
-.LVL359:
-	.loc 3 51 0
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldr	r1, .L257+268
 	mov	r0, r5
 	bl	sprintf
-.LVL360:
 	add	r5, r5, r0
-.LVL361:
-	.loc 3 52 0
 	ldrh	r2, [r4]
 	ldr	r1, .L257+272
 	mov	r0, r5
 	bl	sprintf
-.LVL362:
 	add	r5, r5, r0
-.LVL363:
-	.loc 3 53 0
 	ldrb	r2, [r4, #8]	@ zero_extendqisi2
 	ldr	r1, .L257+276
 	mov	r0, r5
 	bl	sprintf
-.LVL364:
 	add	r5, r5, r0
-.LVL365:
-	.loc 3 54 0
 	ldrh	r2, [r4, #4]
 	ldr	r1, .L257+280
 	mov	r0, r5
 	bl	sprintf
-.LVL366:
-	.loc 3 55 0
 	ldr	r3, [r6]
-	.loc 3 54 0
 	add	r5, r5, r0
-.LVL367:
-	.loc 3 55 0
 	ldrh	r2, [r4]
 	mov	r0, r5
-	.loc 3 56 0
 	ldr	r4, .L257+284
-	.loc 3 55 0
 	ldr	r1, .L257+288
 	ldrh	r2, [r3, r2, lsl #1]
 	bl	sprintf
-.LVL368:
 	add	r5, r5, r0
-.LVL369:
-	.loc 3 56 0
 	ldrh	r2, [r4, #2]
 	ldr	r1, .L257+292
 	mov	r0, r5
 	bl	sprintf
-.LVL370:
 	add	r5, r5, r0
-.LVL371:
-	.loc 3 57 0
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldr	r1, .L257+296
 	mov	r0, r5
 	bl	sprintf
-.LVL372:
 	add	r5, r5, r0
-.LVL373:
-	.loc 3 58 0
 	ldrh	r2, [r4]
 	ldr	r1, .L257+300
 	mov	r0, r5
 	bl	sprintf
-.LVL374:
 	add	r5, r5, r0
-.LVL375:
-	.loc 3 59 0
 	ldrb	r2, [r4, #8]	@ zero_extendqisi2
 	ldr	r1, .L257+304
 	mov	r0, r5
 	bl	sprintf
-.LVL376:
 	add	r5, r5, r0
-.LVL377:
-	.loc 3 60 0
 	ldrh	r2, [r4, #4]
 	ldr	r1, .L257+308
 	mov	r0, r5
 	bl	sprintf
-.LVL378:
-	.loc 3 61 0
 	ldr	r3, [r6]
-	.loc 3 60 0
 	add	r5, r5, r0
-.LVL379:
-	.loc 3 61 0
 	ldrh	r2, [r4]
 	mov	r0, r5
-	.loc 3 62 0
 	ldr	r4, .L257+312
-	.loc 3 61 0
 	ldr	r1, .L257+316
 	ldrh	r2, [r3, r2, lsl #1]
 	bl	sprintf
-.LVL380:
 	add	r5, r5, r0
-.LVL381:
-	.loc 3 62 0
 	ldrh	r2, [r4, #2]
 	ldr	r1, .L257+320
 	mov	r0, r5
 	bl	sprintf
-.LVL382:
 	add	r5, r5, r0
-.LVL383:
-	.loc 3 63 0
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldr	r1, .L257+324
 	mov	r0, r5
 	bl	sprintf
-.LVL384:
 	add	r5, r5, r0
-.LVL385:
-	.loc 3 64 0
 	ldrh	r2, [r4]
 	ldr	r1, .L257+328
 	mov	r0, r5
 	bl	sprintf
-.LVL386:
 	add	r5, r5, r0
-.LVL387:
-	.loc 3 65 0
 	ldrb	r2, [r4, #8]	@ zero_extendqisi2
 	ldr	r1, .L257+332
 	mov	r0, r5
 	bl	sprintf
-.LVL388:
 	add	r5, r5, r0
-.LVL389:
-	.loc 3 66 0
 	ldrh	r2, [r4, #4]
 	ldr	r1, .L257+336
 	mov	r0, r5
 	bl	sprintf
-.LVL390:
 	add	r5, r5, r0
-.LVL391:
-	.loc 3 67 0
 	ldrh	r2, [r7, #2]
 	ldr	r1, .L257+340
 	mov	r0, r5
 	bl	sprintf
-.LVL392:
 	add	r5, r5, r0
-.LVL393:
-	.loc 3 68 0
 	ldrb	r2, [r7, #6]	@ zero_extendqisi2
 	ldr	r1, .L257+344
 	mov	r0, r5
 	bl	sprintf
-.LVL394:
 	add	r5, r5, r0
-.LVL395:
-	.loc 3 69 0
 	ldrh	r2, [r7]
 	ldr	r1, .L257+348
 	mov	r0, r5
@@ -3861,172 +2377,103 @@ FtlPrintInfo2buf:
 	.word	.LANCHOR81
 .L258:
 	bl	sprintf
-.LVL396:
 	add	r5, r5, r0
-.LVL397:
-	.loc 3 70 0
 	ldrb	r2, [r7, #8]	@ zero_extendqisi2
 	ldr	r1, .L260
 	mov	r0, r5
 	bl	sprintf
-.LVL398:
 	add	r5, r5, r0
-.LVL399:
-	.loc 3 71 0
 	ldrh	r2, [r7, #4]
 	ldr	r1, .L260+4
 	mov	r0, r5
 	bl	sprintf
-.LVL400:
-	.loc 3 72 0
 	ldr	r3, [fp, #76]
-	.loc 3 71 0
 	add	r5, r5, r0
-.LVL401:
-	.loc 3 72 0
 	ldr	r1, .L260+8
 	mov	r0, r5
 	str	r3, [sp]
 	ldr	r3, [fp, #84]
 	ldr	r2, [fp, #80]
 	bl	sprintf
-.LVL402:
 	adds	r4, r5, r0
-.LVL403:
-	.loc 3 73 0
 	ldr	r2, [fp, #72]
 	ldr	r1, .L260+12
 	mov	r0, r4
 	bl	sprintf
-.LVL404:
 	add	r4, r4, r0
-.LVL405:
-	.loc 3 74 0
 	ldr	r2, [fp, #96]
 	ldr	r1, .L260+16
 	mov	r0, r4
 	bl	sprintf
-.LVL406:
-	.loc 3 75 0
 	ldr	r3, .L260+20
-	.loc 3 74 0
 	add	r4, r4, r0
-.LVL407:
-	.loc 3 75 0
 	ldr	r1, .L260+24
 	mov	r0, r4
 	ldrh	r2, [r3]
 	bl	sprintf
-.LVL408:
-	.loc 3 76 0
 	ldr	r3, .L260+28
-	.loc 3 75 0
 	add	r4, r4, r0
-.LVL409:
-	.loc 3 76 0
 	ldr	r1, .L260+32
 	mov	r0, r4
 	ldrh	r2, [r3]
 	bl	sprintf
-.LVL410:
-	.loc 3 77 0
 	ldr	r3, .L260+36
-	.loc 3 76 0
 	add	r4, r4, r0
-.LVL411:
-	.loc 3 77 0
 	ldr	r1, .L260+40
 	mov	r0, r4
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL412:
-	.loc 3 78 0
 	ldr	r3, .L260+44
-	.loc 3 77 0
 	add	r4, r4, r0
-.LVL413:
-	.loc 3 78 0
 	ldr	r1, .L260+48
 	mov	r0, r4
 	ldrh	r2, [r3]
 	bl	sprintf
-.LVL414:
 	add	r4, r4, r0
-.LVL415:
-	.loc 3 79 0
 	bl	GetFreeBlockMinEraseCount
-.LVL416:
 	ldr	r1, .L260+52
 	mov	r2, r0
 	mov	r0, r4
 	bl	sprintf
-.LVL417:
 	add	r4, r4, r0
-.LVL418:
-	.loc 3 80 0
 	ldrh	r0, [r10]
 	bl	GetFreeBlockMaxEraseCount
-.LVL419:
 	ldr	r1, .L260+56
 	mov	r2, r0
 	mov	r0, r4
 	bl	sprintf
-.LVL420:
-	.loc 3 81 0
 	ldr	r3, .L260+60
-	.loc 3 80 0
 	add	r4, r4, r0
-.LVL421:
-	.loc 3 81 0
 	ldr	r3, [r3]
 	cmp	r3, #1
 	beq	.L246
 .L251:
-	.loc 3 104 0
 	sub	r0, r4, r8
-	.loc 3 105 0
 	add	sp, sp, #16
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL422:
 .L246:
-	.cfi_restore_state
-	.loc 3 84 0
 	ldrh	r3, [r7]
 	movw	r2, #65535
 	cmp	r3, r2
 	beq	.L248
-	.loc 3 85 0
 	ldr	r2, [r6]
 	mov	r0, r4
 	ldr	r1, .L260+64
 	ldrh	r2, [r2, r3, lsl #1]
 	bl	sprintf
-.LVL423:
 	add	r4, r4, r0
-.LVL424:
 .L248:
-.LBB225:
-	.loc 3 87 0
 	movs	r0, #0
 	ldr	r5, .L260+68
-	.loc 3 91 0
 	ldr	fp, .L260+84
-	.loc 3 88 0
 	movs	r7, #0
-	.loc 3 87 0
 	bl	List_get_gc_head_node
-.LVL425:
 	uxth	r3, r0
-.LVL426:
 .L250:
-	.loc 3 89 0
 	movw	r2, #65535
 	cmp	r3, r2
 	beq	.L249
-	.loc 3 91 0 discriminator 2
 	ldr	r2, [fp]
 	mov	r10, #6
 	mul	r10, r10, r3
@@ -4043,52 +2490,28 @@ FtlPrintInfo2buf:
 	str	r2, [sp]
 	mov	r2, r7
 	bl	sprintf
-.LVL427:
-	.loc 3 88 0 discriminator 2
 	adds	r7, r7, #1
-.LVL428:
-	.loc 3 92 0 discriminator 2
 	ldr	r3, [r5]
-	.loc 3 88 0 discriminator 2
 	cmp	r7, #16
-	.loc 3 91 0 discriminator 2
 	add	r4, r4, r0
-.LVL429:
-	.loc 3 92 0 discriminator 2
 	ldrh	r3, [r3, r10]
-.LVL430:
-	.loc 3 88 0 discriminator 2
 	bne	.L250
 .L249:
-.LBE225:
-.LBB226:
-	.loc 3 96 0
 	ldr	r3, .L260+76
-.LVL431:
-	.loc 3 97 0
 	movs	r7, #0
-.LVL432:
-	.loc 3 96 0
 	ldr	r2, [r5]
-	.loc 3 100 0
 	ldr	r10, .L260+84
-	.loc 3 96 0
 	ldr	r3, [r3]
-	.loc 3 100 0
 	ldr	fp, .L260+88
-	.loc 3 96 0
 	subs	r3, r3, r2
 	ldr	r2, .L260+80
 	asrs	r3, r3, #1
 	muls	r3, r2, r3
 	uxth	r3, r3
-.LVL433:
 .L252:
-	.loc 3 98 0
 	movw	r2, #65535
 	cmp	r3, r2
 	beq	.L251
-	.loc 3 100 0 discriminator 2
 	ldr	r2, [r10]
 	movs	r6, #6
 	muls	r6, r3, r6
@@ -4101,20 +2524,11 @@ FtlPrintInfo2buf:
 	ldrh	r2, [r2, #4]
 	str	r2, [sp]
 	mov	r2, r7
-	.loc 3 97 0 discriminator 2
 	adds	r7, r7, #1
-.LVL434:
-	.loc 3 100 0 discriminator 2
 	bl	sprintf
-.LVL435:
-	.loc 3 97 0 discriminator 2
 	cmp	r7, #4
-	.loc 3 100 0 discriminator 2
 	add	r4, r4, r0
-.LVL436:
-	.loc 3 97 0 discriminator 2
 	beq	.L251
-	.loc 3 101 0
 	ldr	r3, [r5]
 	ldrh	r3, [r3, r6]
 	b	.L252
@@ -4144,9 +2558,6 @@ FtlPrintInfo2buf:
 	.word	-1431655765
 	.word	.LANCHOR43
 	.word	.LC69
-.LBE226:
-	.cfi_endproc
-.LFE203:
 	.size	FtlPrintInfo2buf, .-FtlPrintInfo2buf
 	.section	.text.rknand_proc_ftlread,"ax",%progbits
 	.align	1
@@ -4157,46 +2568,24 @@ FtlPrintInfo2buf:
 	.fpu softvfp
 	.type	rknand_proc_ftlread, %function
 rknand_proc_ftlread:
-.LFB204:
-	.loc 3 114 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL437:
 	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 3 114 0
 	mov	r5, r0
-.LVL438:
-	.loc 3 120 0
 	ldr	r2, .L263
 	ldr	r1, .L263+4
 	bl	sprintf
-.LVL439:
 	adds	r4, r5, r0
-.LVL440:
-	.loc 3 122 0
 	mov	r0, r4
 	bl	FtlPrintInfo2buf
-.LVL441:
 	add	r0, r0, r4
-.LVL442:
-	.loc 3 124 0
 	subs	r0, r0, r5
-.LVL443:
 	pop	{r3, r4, r5, pc}
-.LVL444:
 .L264:
 	.align	2
 .L263:
 	.word	.LC70
 	.word	.LC71
-	.cfi_endproc
-.LFE204:
 	.size	rknand_proc_ftlread, .-rknand_proc_ftlread
 	.section	.text.GetSwlReplaceBlock,"ax",%progbits
 	.align	1
@@ -4207,25 +2596,10 @@ rknand_proc_ftlread:
 	.fpu softvfp
 	.type	GetSwlReplaceBlock, %function
 GetSwlReplaceBlock:
-.LFB299:
-	.loc 2 2500 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL445:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
 	sub	sp, sp, #24
-	.cfi_def_cfa_offset 56
-	.loc 2 2510 0
 	ldr	r3, .L293
 	ldr	r6, .L293+4
 	ldr	r5, [r3]
@@ -4233,208 +2607,134 @@ GetSwlReplaceBlock:
 	ldr	r1, [r6]
 	cmp	r1, r5
 	bcs	.L266
-	.loc 2 2513 0
 	ldr	r2, .L293+8
-	.loc 2 2512 0
 	movs	r3, #0
 	ldr	r4, .L293+12
-	.loc 2 2513 0
 	mov	r0, r3
 	ldrh	r1, [r2]
-	.loc 2 2514 0
 	ldr	r2, .L293+16
-	.loc 2 2512 0
 	str	r3, [r4]
-.LVL446:
-	.loc 2 2514 0
 	ldr	r7, [r2]
-	.loc 2 2513 0
 	mov	r2, r3
-.LVL447:
 .L267:
-	.loc 2 2513 0 is_stmt 0 discriminator 1
 	cmp	r2, r1
 	bcc	.L268
 	cbz	r3, .L269
 	str	r0, [r4]
 .L269:
-	.loc 2 2515 0 is_stmt 1
 	ldr	r7, [r4]
 	mov	r0, r7
 	bl	__aeabi_uidiv
-.LVL448:
-	.loc 2 2516 0
 	ldr	r3, .L293+20
-	.loc 2 2515 0
 	str	r0, [r6]
-	.loc 2 2516 0
 	ldr	r0, [r3]
 	ldr	r3, .L293+24
 	subs	r0, r7, r0
 	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
-.LVL449:
 	str	r0, [r4]
 .L270:
-	.loc 2 2522 0
 	ldr	r6, [r6]
 	add	r3, r5, #256
 	cmp	r3, r6
 	bls	.L275
-	.loc 2 2522 0 is_stmt 0 discriminator 1
 	ldr	r2, .L293+28
 	add	r3, r5, #768
 	ldr	r2, [r2]
 	cmp	r3, r2
 	bls	.L275
-.LVL450:
 .L277:
-	.loc 2 2523 0 is_stmt 1
 	movw	r4, #65535
 .L276:
-	.loc 2 2569 0
 	mov	r0, r4
 	add	sp, sp, #24
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL451:
 .L268:
-	.cfi_restore_state
-	.loc 2 2514 0 discriminator 3
 	ldrh	r3, [r7, r2, lsl #1]
-	.loc 2 2513 0 discriminator 3
 	adds	r2, r2, #1
-.LVL452:
-	.loc 2 2514 0 discriminator 3
 	add	r0, r0, r3
 	movs	r3, #1
 	b	.L267
-.LVL453:
 .L266:
-	.loc 2 2517 0
 	ldr	r2, .L293+28
 	ldr	r3, [r2]
 	cmp	r1, r3
 	bls	.L270
-	.loc 2 2518 0
 	adds	r3, r3, #1
-	.loc 2 2519 0
 	ldr	r0, .L293+8
-	.loc 2 2518 0
 	str	r3, [r2]
-.LVL454:
-	.loc 2 2519 0
 	movs	r2, #0
-	.loc 2 2520 0
 	ldr	r3, .L293+16
 	ldr	r3, [r3]
 	subs	r3, r3, #2
-.LVL455:
 .L272:
-	.loc 2 2519 0 discriminator 1
 	ldrh	r1, [r0]
 	cmp	r2, r1
 	bcs	.L270
-	.loc 2 2520 0 discriminator 3
 	ldrh	r1, [r3, #2]
-	.loc 2 2519 0 discriminator 3
 	adds	r2, r2, #1
-.LVL456:
-	.loc 2 2520 0 discriminator 3
 	adds	r1, r1, #1
 	strh	r1, [r3, #2]!	@ movhi
 	b	.L272
-.LVL457:
 .L275:
-	.loc 2 2525 0
 	ldr	r3, .L293+32
 	ldrh	r0, [r3]
 	add	r0, r0, r0, lsl #1
 	ubfx	r0, r0, #2, #16
 	bl	GetFreeBlockMaxEraseCount
-.LVL458:
-	.loc 2 2526 0
 	add	r3, r5, #64
-	.loc 2 2525 0
 	mov	r2, r0
-.LVL459:
-	.loc 2 2526 0
 	cmp	r0, r3
 	bcc	.L277
-	.loc 2 2529 0
 	ldr	r3, .L293+36
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L277
-	.loc 2 2533 0
 	ldr	r1, .L293+8
-	.loc 2 2537 0
 	movs	r0, #0
-.LVL460:
-	.loc 2 2546 0
 	mov	fp, #6
-	.loc 2 2533 0
 	ldrh	r1, [r1]
 	str	r1, [sp, #20]
-	.loc 2 2536 0
 	ldr	r1, .L293+40
 	ldr	r8, [r1]
-	.loc 2 2537 0
 	ldr	r1, .L293+16
 	ldr	r7, [r1]
 	movw	r1, #65535
 	mov	ip, r1
-.LVL461:
 .L278:
-	.loc 2 2531 0
 	ldrh	lr, [r3]
 	movw	r4, #65535
 	cmp	lr, r4
 	bne	.L281
 	mov	r4, ip
-.LVL462:
 .L280:
-	.loc 2 2549 0
 	movw	r3, #65535
 	cmp	r4, r3
 	beq	.L277
-	.loc 2 2551 0
 	ldrh	r7, [r7, r4, lsl #1]
-.LVL463:
 	lsl	r8, r4, #1
-	.loc 2 2552 0
 	cmp	r5, r7
 	bcs	.L282
-	.loc 2 2554 0
 	bl	GetFreeBlockMinEraseCount
-.LVL464:
 	cmp	r5, r0
-	.loc 2 2555 0
 	it	cc
 	strcc	r1, [r10]
 .L282:
-	.loc 2 2557 0
 	cmp	r6, r7
 	bls	.L277
-	.loc 2 2557 0 is_stmt 0 discriminator 1
 	add	r3, r7, #128
 	cmp	r2, r3
 	ble	.L277
-	.loc 2 2559 0 is_stmt 1
 	add	r3, r7, #256
 	ldr	r0, .L293+28
 	cmp	r6, r3
 	bhi	.L283
-	.loc 2 2559 0 is_stmt 0 discriminator 1
 	ldr	r1, [r0]
-.LVL465:
 	add	r3, r7, #768
 	cmp	r3, r1
 	bcs	.L277
 .L283:
-	.loc 2 2561 0 is_stmt 1
 	ldr	r3, .L293+44
 	mov	r1, r4
 	str	r2, [sp, #8]
@@ -4446,53 +2746,32 @@ GetSwlReplaceBlock:
 	ldr	r3, [r0]
 	ldr	r0, .L293+48
 	bl	printf
-.LVL466:
-	.loc 2 2562 0
 	ldr	r3, .L293+52
 	movs	r2, #1
 	str	r2, [r3]
-	.loc 2 2563 0
 	b	.L276
-.LVL467:
 .L281:
-	.loc 2 2532 0
 	adds	r0, r0, #1
-.LVL468:
-	.loc 2 2533 0
 	ldr	r4, [sp, #20]
-	.loc 2 2532 0
 	uxth	r0, r0
-.LVL469:
-	.loc 2 2533 0
 	cmp	r0, r4
 	bhi	.L277
-	.loc 2 2535 0
 	ldrh	r4, [r3, #4]
 	cbz	r4, .L279
-	.loc 2 2536 0
 	ldr	r4, .L293+56
 	sub	r3, r3, r8
-.LVL470:
 	asrs	r3, r3, #1
 	muls	r3, r4, r3
 	uxth	r4, r3
-.LVL471:
-	.loc 2 2537 0
 	ldrh	r3, [r7, r4, lsl #1]
 	cmp	r5, r3
 	bcs	.L280
-	.loc 2 2541 0
 	cmp	r1, r3
 	itt	hi
 	movhi	r1, r3
-.LVL472:
-	.loc 2 2536 0
 	movhi	ip, r4
-.LVL473:
 .L279:
-	.loc 2 2546 0
 	mla	r3, fp, lr, r8
-.LVL474:
 	b	.L278
 .L294:
 	.align	2
@@ -4512,8 +2791,6 @@ GetSwlReplaceBlock:
 	.word	.LC72
 	.word	.LANCHOR87
 	.word	-1431655765
-	.cfi_endproc
-.LFE299:
 	.size	GetSwlReplaceBlock, .-GetSwlReplaceBlock
 	.section	.text.free_data_superblock,"ax",%progbits
 	.align	1
@@ -4524,45 +2801,24 @@ GetSwlReplaceBlock:
 	.fpu softvfp
 	.type	free_data_superblock, %function
 free_data_superblock:
-.LFB300:
-	.loc 2 2573 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL475:
-	.loc 2 2574 0
 	movw	r2, #65535
-	.loc 2 2573 0
 	push	{r3, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 3, -8
-	.cfi_offset 14, -4
-	.loc 2 2574 0
 	cmp	r0, r2
 	beq	.L296
-.LVL476:
-.LBB229:
-.LBB230:
-	.loc 2 2576 0
 	ldr	r2, .L297
 	movs	r1, #0
 	ldr	r2, [r2]
 	strh	r1, [r2, r0, lsl #1]	@ movhi
-	.loc 2 2577 0
 	bl	INSERT_FREE_LIST
-.LVL477:
 .L296:
-.LBE230:
-.LBE229:
-	.loc 2 2579 0
 	movs	r0, #0
 	pop	{r3, pc}
 .L298:
 	.align	2
 .L297:
 	.word	.LANCHOR42
-	.cfi_endproc
-.LFE300:
 	.size	free_data_superblock, .-free_data_superblock
 	.section	.text.get_new_active_ppa,"ax",%progbits
 	.align	1
@@ -4573,155 +2829,95 @@ free_data_superblock:
 	.fpu softvfp
 	.type	get_new_active_ppa, %function
 get_new_active_ppa:
-.LFB303:
-	.loc 2 2706 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL478:
-	.loc 2 2710 0
 	ldrh	r2, [r0]
-	.loc 2 2706 0
 	push	{r3, r4, r5, r6, r7, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 3, -24
-	.cfi_offset 4, -20
-	.cfi_offset 5, -16
-	.cfi_offset 6, -12
-	.cfi_offset 7, -8
-	.cfi_offset 14, -4
-	.loc 2 2710 0
 	movw	r3, #65535
-	.loc 2 2706 0
 	mov	r4, r0
-	.loc 2 2710 0
 	cmp	r2, r3
 	bne	.L300
-	.loc 2 2710 0 is_stmt 0 discriminator 1
 	movw	r2, #2710
 	ldr	r1, .L313
 	ldr	r0, .L313+4
-.LVL479:
 	bl	printf
-.LVL480:
 .L300:
-	.loc 2 2711 0 is_stmt 1
 	ldr	r5, .L313+8
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5]
 	cmp	r2, r3
 	bne	.L301
-	.loc 2 2711 0 is_stmt 0 discriminator 1
 	movw	r2, #2711
 	ldr	r1, .L313
 	ldr	r0, .L313+4
 	bl	printf
-.LVL481:
 .L301:
-	.loc 2 2712 0 is_stmt 1
 	ldrh	r3, [r4, #4]
 	cbnz	r3, .L302
-	.loc 2 2712 0 is_stmt 0 discriminator 1
 	movw	r2, #2712
 	ldr	r1, .L313
 	ldr	r0, .L313+4
 	bl	printf
-.LVL482:
 .L302:
-	.loc 2 2714 0 is_stmt 1
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-	.loc 2 2713 0
 	movs	r3, #0
 	strb	r3, [r4, #10]
-	.loc 2 2715 0
 	movw	r6, #65535
-	.loc 2 2714 0
 	adds	r2, r2, #8
 	ldrh	r0, [r4, r2, lsl #1]
-.LVL483:
-	.loc 2 2717 0
 	ldr	r2, .L313+12
 	ldrh	r1, [r2]
-	.loc 2 2719 0
 	mov	r2, r3
 .L303:
-	.loc 2 2715 0
 	cmp	r0, r6
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	beq	.L305
-	.loc 2 2724 0
 	ldrh	r2, [r4, #4]
-	.loc 2 2723 0
 	ldrh	r6, [r4, #2]
-	.loc 2 2724 0
 	subs	r2, r2, #1
 	uxth	r2, r2
-	.loc 2 2723 0
 	orr	r6, r6, r0, lsl #10
-.LVL484:
-	.loc 2 2731 0
 	movw	r0, #65535
-.LVL485:
-	.loc 2 2724 0
 	strh	r2, [r4, #4]	@ movhi
 .L307:
-	.loc 2 2726 0
 	adds	r3, r3, #1
 	uxtb	r3, r3
-	.loc 2 2727 0
 	cmp	r1, r3
-	.loc 2 2728 0
 	itttt	eq
 	ldrheq	r3, [r4, #2]
 	addeq	r3, r3, #1
 	strheq	r3, [r4, #2]	@ movhi
-	.loc 2 2729 0
 	moveq	r3, #0
-	.loc 2 2731 0
 	add	r7, r3, #8
 	ldrh	r7, [r4, r7, lsl #1]
 	cmp	r7, r0
 	beq	.L307
 	strb	r3, [r4, #6]
-	.loc 2 2733 0
 	ldrh	r1, [r4, #2]
 	ldrh	r3, [r5]
 	cmp	r1, r3
 	bne	.L299
-	.loc 2 2733 0 is_stmt 0 discriminator 1
 	cbz	r2, .L299
-	.loc 2 2733 0 discriminator 2
 	movw	r2, #2733
 	ldr	r1, .L313
 	ldr	r0, .L313+4
 	bl	printf
-.LVL486:
 .L299:
-	.loc 2 2735 0 is_stmt 1
 	mov	r0, r6
 	pop	{r3, r4, r5, r6, r7, pc}
-.LVL487:
 .L305:
-	.loc 2 2716 0
 	adds	r3, r3, #1
 	uxtb	r3, r3
-	.loc 2 2717 0
 	cmp	r3, r1
-	.loc 2 2716 0
 	strb	r3, [r4, #6]
-	.loc 2 2718 0
 	itttt	eq
 	ldrheq	r3, [r4, #2]
-	.loc 2 2719 0
 	strbeq	r2, [r4, #6]
-	.loc 2 2718 0
 	addeq	r3, r3, #1
 	strheq	r3, [r4, #2]	@ movhi
-	.loc 2 2721 0
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r0, [r4, r3, lsl #1]
-.LVL488:
 	b	.L303
 .L314:
 	.align	2
@@ -4730,8 +2926,6 @@ get_new_active_ppa:
 	.word	.LC1
 	.word	.LANCHOR19
 	.word	.LANCHOR3
-	.cfi_endproc
-.LFE303:
 	.size	get_new_active_ppa, .-get_new_active_ppa
 	.section	.text.FtlGcBufInit,"ax",%progbits
 	.align	1
@@ -4742,147 +2936,84 @@ get_new_active_ppa:
 	.fpu softvfp
 	.type	FtlGcBufInit, %function
 FtlGcBufInit:
-.LFB306:
-	.file 5 "drivers/rkflash/rksftl/sftl_gc.c"
-	.loc 5 22 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 5 25 0
 	movs	r3, #0
-	.loc 5 27 0
 	ldr	r1, .L320
 	mov	fp, #1
-	.loc 5 25 0
 	ldr	r2, .L320+4
-	.loc 5 27 0
 	ldr	r5, [r1]
-	.loc 5 28 0
 	ldr	r1, .L320+8
-	.loc 5 25 0
 	str	r3, [r2]
-.LVL489:
-	.loc 5 26 0
 	ldr	r2, .L320+12
 	mov	r0, r5
-	.loc 5 28 0
 	ldr	r1, [r1]
-	.loc 5 26 0
 	ldrh	r2, [r2]
-	.loc 5 28 0
 	str	r1, [sp, #4]
 	ldr	r1, .L320+16
 	ldrh	r1, [r1]
 	str	r1, [sp]
-	.loc 5 29 0
 	ldr	r1, .L320+20
 	ldr	r10, [r1]
 	ldr	r1, .L320+24
 	ldrh	r7, [r1]
-	.loc 5 30 0
 	ldr	r1, .L320+28
 	ldr	r4, [r1]
 	movs	r1, #12
 	mla	r1, r2, r1, r1
 	adds	r4, r4, #8
 	add	r8, r5, r1
-	.loc 5 26 0
 	mov	r1, r3
-.LVL490:
 .L316:
 	adds	r0, r0, #12
 	ldr	r6, [sp]
-	.loc 5 26 0 is_stmt 0 discriminator 1
 	cmp	r0, r8
 	add	ip, r3, r7
 	add	r4, r4, #20
 	add	lr, r1, r6
 	bne	.L317
-	.loc 5 34 0 is_stmt 1
 	ldr	r3, .L320+32
-	.loc 5 35 0
 	mov	lr, #12
 	mov	r8, #0
-	.loc 5 34 0
 	ldr	r0, [r3]
-	.loc 5 36 0
 	ldr	r3, .L320+8
 	ldr	r4, [r3]
-	.loc 5 37 0
 	ldr	r3, .L320+20
 	ldr	ip, [r3]
 .L318:
-.LVL491:
-	.loc 5 34 0 discriminator 1
 	cmp	r2, r0
 	bcc	.L319
-	.loc 5 39 0
 	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL492:
 .L317:
-	.cfi_restore_state
-	.loc 5 28 0 discriminator 3
 	bic	r1, r1, #3
-	.loc 5 29 0 discriminator 3
 	bic	r3, r3, #3
-	.loc 5 28 0 discriminator 3
 	mov	r6, r1
 	ldr	r1, [sp, #4]
-	.loc 5 29 0 discriminator 3
 	add	r3, r3, r10
-	.loc 5 27 0 discriminator 3
 	str	fp, [r0, #-4]
-	.loc 5 29 0 discriminator 3
 	str	r3, [r0, #-8]
-	.loc 5 28 0 discriminator 3
 	add	r6, r6, r1
-	.loc 5 31 0 discriminator 3
 	mov	r1, lr
-	.loc 5 28 0 discriminator 3
 	str	r6, [r0, #-12]
-	.loc 5 31 0 discriminator 3
 	str	r3, [r4, #-16]
 	mov	r3, ip
-	.loc 5 30 0 discriminator 3
 	str	r6, [r4, #-20]
 	b	.L316
-.LVL493:
 .L319:
-	.loc 5 36 0 discriminator 3
 	ldr	r3, [sp]
-	.loc 5 35 0 discriminator 3
 	mul	r10, lr, r2
-	.loc 5 36 0 discriminator 3
 	muls	r3, r2, r3
-	.loc 5 35 0 discriminator 3
 	add	r1, r5, r10
 	str	r8, [r1, #8]
-	.loc 5 36 0 discriminator 3
 	bic	r3, r3, #3
 	add	r3, r3, r4
 	str	r3, [r5, r10]
-	.loc 5 37 0 discriminator 3
 	mul	r3, r2, r7
-	.loc 5 34 0 discriminator 3
 	adds	r2, r2, #1
-.LVL494:
 	uxth	r2, r2
-.LVL495:
-	.loc 5 37 0 discriminator 3
 	bic	r3, r3, #3
 	add	r3, r3, ip
 	str	r3, [r1, #4]
@@ -4899,8 +3030,6 @@ FtlGcBufInit:
 	.word	.LANCHOR24
 	.word	.LANCHOR93
 	.word	.LANCHOR94
-	.cfi_endproc
-.LFE306:
 	.size	FtlGcBufInit, .-FtlGcBufInit
 	.section	.text.FtlGcBufFree,"ax",%progbits
 	.align	1
@@ -4911,80 +3040,45 @@ FtlGcBufInit:
 	.fpu softvfp
 	.type	FtlGcBufFree, %function
 FtlGcBufFree:
-.LFB307:
-	.loc 5 42 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL496:
-	.loc 5 47 0
 	ldr	r3, .L329
-	.loc 5 48 0
 	mov	ip, #12
-	.loc 5 42 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 5 46 0
 	movs	r4, #0
-	.loc 5 48 0
 	mov	fp, #20
-	.loc 5 49 0
 	mov	lr, r4
-	.loc 5 47 0
 	ldr	r7, [r3]
-	.loc 5 48 0
 	ldr	r3, .L329+4
 	ldr	r5, [r3]
-.LVL497:
 .L323:
 	uxth	r3, r4
-	.loc 5 46 0 discriminator 1
 	cmp	r1, r3
 	bls	.L322
-	.loc 5 48 0
 	mla	r8, fp, r3, r0
 	movs	r2, #0
 .L324:
-.LVL498:
 	uxth	r3, r2
-	.loc 5 47 0 discriminator 1
 	cmp	r7, r3
 	bls	.L325
-	.loc 5 48 0
 	mul	r3, ip, r3
 	ldr	r6, [r8, #8]
 	adds	r2, r2, #1
-.LVL499:
 	add	r10, r5, r3
 	ldr	r3, [r5, r3]
 	cmp	r3, r6
 	bne	.L324
-	.loc 5 49 0
 	str	lr, [r10, #8]
 .L325:
-.LVL500:
 	adds	r4, r4, #1
-.LVL501:
 	b	.L323
-.LVL502:
 .L322:
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL503:
 .L330:
 	.align	2
 .L329:
 	.word	.LANCHOR94
 	.word	.LANCHOR90
-	.cfi_endproc
-.LFE307:
 	.size	FtlGcBufFree, .-FtlGcBufFree
 	.section	.text.FtlGcBufAlloc,"ax",%progbits
 	.align	1
@@ -4995,84 +3089,47 @@ FtlGcBufFree:
 	.fpu softvfp
 	.type	FtlGcBufAlloc, %function
 FtlGcBufAlloc:
-.LFB308:
-	.loc 5 57 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL504:
-	.loc 5 62 0
 	ldr	r3, .L338
-	.loc 5 61 0
 	movs	r2, #0
-	.loc 5 57 0
 	push	{r4, r5, r6, r7, r8, r10, lr}
-	.cfi_def_cfa_offset 28
-	.cfi_offset 4, -28
-	.cfi_offset 5, -24
-	.cfi_offset 6, -20
-	.cfi_offset 7, -16
-	.cfi_offset 8, -12
-	.cfi_offset 10, -8
-	.cfi_offset 14, -4
-	.loc 5 63 0
 	mov	ip, #12
-	.loc 5 64 0
 	movs	r7, #1
-	.loc 5 65 0
 	mov	lr, #20
-	.loc 5 62 0
 	ldr	r4, [r3]
-	.loc 5 63 0
 	ldr	r3, .L338+4
 	ldr	r5, [r3]
-.LVL505:
 .L332:
 	uxth	r8, r2
-	.loc 5 61 0 discriminator 1
 	cmp	r1, r8
 	bhi	.L336
-	.loc 5 71 0
 	pop	{r4, r5, r6, r7, r8, r10, pc}
 .L336:
 	mov	r10, #0
 .L333:
-.LVL506:
 	uxth	r3, r10
-	.loc 5 62 0 discriminator 1
 	cmp	r4, r3
 	bls	.L334
-	.loc 5 63 0
 	mla	r3, ip, r3, r5
 	add	r10, r10, #1
-.LVL507:
 	ldr	r6, [r3, #8]
 	cmp	r6, #0
 	bne	.L333
-	.loc 5 65 0
 	mla	r8, lr, r8, r0
-	.loc 5 64 0
 	str	r7, [r3, #8]
-	.loc 5 65 0
 	ldr	r6, [r3]
-	.loc 5 66 0
 	ldr	r3, [r3, #4]
-	.loc 5 65 0
 	str	r6, [r8, #8]
-	.loc 5 66 0
 	str	r3, [r8, #12]
 .L334:
-.LVL508:
 	adds	r2, r2, #1
-.LVL509:
 	b	.L332
 .L339:
 	.align	2
 .L338:
 	.word	.LANCHOR94
 	.word	.LANCHOR90
-	.cfi_endproc
-.LFE308:
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
 	.section	.text.IsBlkInGcList,"ax",%progbits
 	.align	1
@@ -5083,48 +3140,30 @@ FtlGcBufAlloc:
 	.fpu softvfp
 	.type	IsBlkInGcList, %function
 IsBlkInGcList:
-.LFB309:
-	.loc 5 74 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL510:
-	.loc 5 78 0
 	ldr	r3, .L345
-	.loc 5 77 0
 	ldr	r2, .L345+4
-	.loc 5 78 0
 	ldr	r3, [r3]
 	ldrh	r2, [r2]
 	add	r2, r3, r2, lsl #1
-.LVL511:
 .L341:
-	.loc 5 77 0 discriminator 1
 	cmp	r3, r2
 	bne	.L343
-	.loc 5 81 0
 	movs	r0, #0
-.LVL512:
 	bx	lr
-.LVL513:
 .L343:
-	.loc 5 78 0
 	ldrh	r1, [r3], #2
 	cmp	r1, r0
 	bne	.L341
-	.loc 5 79 0
 	movs	r0, #1
-.LVL514:
-	.loc 5 82 0
 	bx	lr
 .L346:
 	.align	2
 .L345:
 	.word	.LANCHOR95
 	.word	.LANCHOR96
-	.cfi_endproc
-.LFE309:
 	.size	IsBlkInGcList, .-IsBlkInGcList
 	.section	.text.FtlGcUpdatePage,"ax",%progbits
 	.align	1
@@ -5135,87 +3174,49 @@ IsBlkInGcList:
 	.fpu softvfp
 	.type	FtlGcUpdatePage, %function
 FtlGcUpdatePage:
-.LFB310:
-	.loc 5 85 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL515:
 	push	{r3, r4, r5, r6, r7, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 3, -24
-	.cfi_offset 4, -20
-	.cfi_offset 5, -16
-	.cfi_offset 6, -12
-	.cfi_offset 7, -8
-	.cfi_offset 14, -4
-	.loc 5 85 0
 	mov	r5, r0
-	.loc 5 91 0
 	ldr	r4, .L351
-	.loc 5 88 0
 	ubfx	r0, r0, #10, #16
-.LVL516:
-	.loc 5 85 0
 	mov	r6, r1
 	mov	r7, r2
-	.loc 5 88 0
 	bl	P2V_block_in_plane
-.LVL517:
-	.loc 5 92 0
 	ldr	r3, .L351+4
-	.loc 5 91 0
 	ldrh	r1, [r4]
-	.loc 5 92 0
 	ldr	r2, [r3]
-	.loc 5 91 0
 	movs	r3, #0
-.LVL518:
 .L348:
 	uxth	ip, r3
-.LVL519:
-	.loc 5 91 0 is_stmt 0 discriminator 1
 	cmp	ip, r1
 	bcc	.L350
-	.loc 5 96 0 is_stmt 1
 	bne	.L349
-	.loc 5 97 0
 	strh	r0, [r2, ip, lsl #1]	@ movhi
-	.loc 5 98 0
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
 	b	.L349
 .L350:
 	adds	r3, r3, #1
-	.loc 5 92 0
 	add	ip, r2, r3, lsl #1
-.LVL520:
 	ldrh	ip, [ip, #-2]
 	cmp	ip, r0
 	bne	.L348
 .L349:
-	.loc 5 101 0
 	ldr	r2, .L351+8
 	movs	r0, #12
-.LVL521:
 	ldr	r1, .L351+12
 	ldrh	r3, [r2]
 	ldr	r1, [r1]
 	muls	r0, r3, r0
-	.loc 5 107 0
 	adds	r3, r3, #1
-	.loc 5 101 0
 	adds	r4, r1, r0
 	str	r6, [r4, #4]
-	.loc 5 102 0
 	str	r7, [r4, #8]
-	.loc 5 103 0
 	str	r5, [r1, r0]
-	.loc 5 107 0
 	strh	r3, [r2]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.LVL522:
 .L352:
 	.align	2
 .L351:
@@ -5223,8 +3224,6 @@ FtlGcUpdatePage:
 	.word	.LANCHOR95
 	.word	.LANCHOR97
 	.word	.LANCHOR98
-	.cfi_endproc
-.LFE310:
 	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
 	.section	.text.FtlGcRefreshBlock,"ax",%progbits
 	.align	1
@@ -5235,51 +3234,30 @@ FtlGcUpdatePage:
 	.fpu softvfp
 	.type	FtlGcRefreshBlock, %function
 FtlGcRefreshBlock:
-.LFB317:
-	.loc 5 345 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL523:
 	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 5 347 0
 	mov	r1, r0
-	.loc 5 345 0
 	mov	r4, r0
-	.loc 5 347 0
 	ldr	r0, .L356
-.LVL524:
 	bl	printf
-.LVL525:
-	.loc 5 349 0
 	ldr	r0, .L356+4
 	ldrh	r5, [r0]
 	cmp	r4, r5
 	beq	.L354
-	.loc 5 349 0 is_stmt 0 discriminator 1
 	ldr	r3, .L356+8
 	ldrh	r1, [r3]
 	cmp	r4, r1
 	beq	.L354
-	.loc 5 351 0 is_stmt 1
 	movw	r2, #65535
 	cmp	r5, r2
 	bne	.L355
-	.loc 5 352 0
 	strh	r4, [r0]	@ movhi
 .L354:
-	.loc 5 356 0
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
 .L355:
-	.loc 5 353 0
 	cmp	r1, r2
-	.loc 5 354 0
 	it	eq
 	strheq	r4, [r3]	@ movhi
 	b	.L354
@@ -5289,8 +3267,6 @@ FtlGcRefreshBlock:
 	.word	.LC73
 	.word	.LANCHOR99
 	.word	.LANCHOR100
-	.cfi_endproc
-.LFE317:
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
 	.section	.text.FtlGcMarkBadPhyBlk,"ax",%progbits
 	.align	1
@@ -5301,83 +3277,48 @@ FtlGcRefreshBlock:
 	.fpu softvfp
 	.type	FtlGcMarkBadPhyBlk, %function
 FtlGcMarkBadPhyBlk:
-.LFB318:
-	.loc 5 359 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL526:
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 5 359 0
 	mov	r5, r0
-	.loc 5 364 0
 	ldr	r4, .L362
-	.loc 5 361 0
 	bl	P2V_block_in_plane
-.LVL527:
-	.loc 5 364 0
 	mov	r2, r5
-	.loc 5 361 0
 	mov	r6, r0
-.LVL528:
-	.loc 5 364 0
 	ldrh	r1, [r4]
 	ldr	r0, .L362+4
 	bl	printf
-.LVL529:
-	.loc 5 366 0
 	mov	r0, r6
 	bl	FtlGcRefreshBlock
-.LVL530:
-	.loc 5 368 0
 	ldrh	r3, [r4]
 	movs	r2, #0
-	.loc 5 369 0
 	ldr	r0, .L362+8
-.LVL531:
 .L359:
-	.loc 5 368 0 discriminator 1
 	uxth	r1, r2
 	cmp	r3, r1
 	bhi	.L361
-	.loc 5 372 0
 	cmp	r3, #15
-	.loc 5 373 0
 	itttt	ls
 	addls	r2, r3, #1
-.LVL532:
 	strhls	r2, [r4]	@ movhi
 	ldrls	r2, .L362+8
 	strhls	r5, [r2, r3, lsl #1]	@ movhi
 	b	.L360
-.LVL533:
 .L361:
 	adds	r2, r2, #1
-.LVL534:
-	.loc 5 369 0
 	add	r1, r0, r2, lsl #1
-.LVL535:
 	ldrh	r1, [r1, #-2]
 	cmp	r1, r5
 	bne	.L359
 .L360:
-	.loc 5 375 0
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.LVL536:
 .L363:
 	.align	2
 .L362:
 	.word	.LANCHOR101
 	.word	.LC74
 	.word	.LANCHOR102
-	.cfi_endproc
-.LFE318:
 	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
 	.section	.text.FtlGcReFreshBadBlk,"ax",%progbits
 	.align	1
@@ -5388,53 +3329,32 @@ FtlGcMarkBadPhyBlk:
 	.fpu softvfp
 	.type	FtlGcReFreshBadBlk, %function
 FtlGcReFreshBadBlk:
-.LFB319:
-	.loc 5 379 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	.loc 5 380 0
 	ldr	r3, .L370
-	.loc 5 379 0
 	push	{r4, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 4, -8
-	.cfi_offset 14, -4
-	.loc 5 380 0
 	ldrh	r3, [r3]
 	cbz	r3, .L365
-	.loc 5 380 0 is_stmt 0 discriminator 1
 	ldr	r2, .L370+4
 	ldrh	r1, [r2]
 	movw	r2, #65535
 	cmp	r1, r2
 	bne	.L365
-	.loc 5 381 0 is_stmt 1
 	ldr	r4, .L370+8
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	.loc 5 382 0
 	itt	cs
 	movcs	r3, #0
 	strhcs	r3, [r4]	@ movhi
-.LBB233:
-.LBB234:
-	.loc 5 383 0
 	ldr	r3, .L370+12
 	ldrh	r2, [r4]
 	ldrh	r0, [r3, r2, lsl #1]
 	bl	P2V_block_in_plane
-.LVL537:
 	bl	FtlGcRefreshBlock
-.LVL538:
-	.loc 5 384 0
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
 .L365:
-.LBE234:
-.LBE233:
-	.loc 5 387 0
 	movs	r0, #0
 	pop	{r4, pc}
 .L371:
@@ -5444,59 +3364,36 @@ FtlGcReFreshBadBlk:
 	.word	.LANCHOR99
 	.word	.LANCHOR103
 	.word	.LANCHOR102
-	.cfi_endproc
-.LFE319:
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
-	.section	.text.ftl_free,"ax",%progbits
+	.section	.text.ftl_malloc,"ax",%progbits
 	.align	1
-	.global	ftl_free
+	.global	ftl_malloc
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_free, %function
-ftl_free:
-.LFB340:
-	.loc 1 24 0
-	.cfi_startproc
+	.type	ftl_malloc, %function
+ftl_malloc:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL539:
-.LBB235:
-.LBB236:
-	.file 6 "include/linux/compat.h"
-	.loc 6 80 0
-	b	free
-.LVL540:
-.LBE236:
-.LBE235:
-	.cfi_endproc
-.LFE340:
-	.size	ftl_free, .-ftl_free
-	.section	.text.ftl_malloc,"ax",%progbits
+	movs	r1, #0
+	b	kmalloc
+	.size	ftl_malloc, .-ftl_malloc
+	.section	.text.ftl_free,"ax",%progbits
 	.align	1
-	.global	ftl_malloc
+	.global	ftl_free
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_malloc, %function
-ftl_malloc:
-.LFB341:
-	.loc 1 28 0
-	.cfi_startproc
+	.type	ftl_free, %function
+ftl_free:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL541:
-	.loc 1 29 0
-	movs	r1, #0
-	b	kmalloc
-.LVL542:
-	.cfi_endproc
-.LFE341:
-	.size	ftl_malloc, .-ftl_malloc
+	b	free
+	.size	ftl_free, .-ftl_free
 	.section	.text.rknand_print_hex,"ax",%progbits
 	.align	1
 	.global	rknand_print_hex
@@ -5506,108 +3403,52 @@ ftl_malloc:
 	.fpu softvfp
 	.type	rknand_print_hex, %function
 rknand_print_hex:
-.LFB342:
-	.loc 1 33 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL543:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 1 40 0
 	movs	r6, #0
-	.loc 1 33 0
 	mov	fp, r0
 	mov	r7, r1
-.LVL544:
 	mov	r8, r2
 	mov	r10, r3
-	.loc 1 39 0
 	mov	r5, r6
-	.loc 1 40 0
 	mov	r4, r6
-.LVL545:
 .L375:
-	.loc 1 40 0 is_stmt 0 discriminator 1
 	cmp	r4, r10
 	bcc	.L381
-	.loc 1 55 0 is_stmt 1
 	ldr	r0, .L384
-	.loc 1 56 0
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_remember_state
-	.cfi_restore 14
-	.cfi_restore 11
-	.cfi_restore 10
-	.cfi_restore 8
-	.cfi_restore 7
-	.cfi_restore 6
-	.cfi_restore 5
-	.cfi_restore 4
-	.cfi_def_cfa_offset 0
-.LVL546:
-	.loc 1 55 0
 	b	printf
-.LVL547:
 .L381:
-	.cfi_restore_state
-	.loc 1 41 0
 	cbnz	r5, .L376
-	.loc 1 42 0
 	mov	r2, r6
 	mov	r1, fp
 	ldr	r0, .L384+4
 	bl	printf
-.LVL548:
 .L376:
-	.loc 1 44 0
 	cmp	r8, #4
 	bne	.L377
-	.loc 1 45 0
 	ldr	r1, [r7, r4, lsl #2]
 .L383:
-	.loc 1 47 0
 	ldr	r0, .L384+8
 .L382:
-	.loc 1 50 0
 	adds	r5, r5, #1
-.LVL549:
-	.loc 1 49 0
 	bl	printf
-.LVL550:
-	.loc 1 50 0
 	cmp	r5, #15
 	bls	.L380
-.LVL551:
-	.loc 1 51 0
 	movs	r5, #0
-	.loc 1 52 0
 	ldr	r0, .L384
 	bl	printf
-.LVL552:
 .L380:
-	.loc 1 40 0 discriminator 2
 	adds	r4, r4, #1
-.LVL553:
 	add	r6, r6, r8
 	b	.L375
 .L377:
-	.loc 1 46 0
 	cmp	r8, #2
 	bne	.L379
-	.loc 1 47 0
 	ldrsh	r1, [r7, r4, lsl #1]
 	b	.L383
 .L379:
-	.loc 1 49 0
 	ldrb	r1, [r7, r4]	@ zero_extendqisi2
 	ldr	r0, .L384+12
 	b	.L382
@@ -5618,8 +3459,6 @@ rknand_print_hex:
 	.word	.LC75
 	.word	.LC76
 	.word	.LC77
-	.cfi_endproc
-.LFE342:
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.FlashReadPages,"ax",%progbits
 	.align	1
@@ -5630,91 +3469,51 @@ rknand_print_hex:
 	.fpu softvfp
 	.type	FlashReadPages, %function
 FlashReadPages:
-.LFB344:
-	.loc 1 85 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL554:
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 48
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 1 85 0
 	mov	r8, r1
-	.loc 1 87 0
 	ldr	r3, .L404
 	mov	r4, r0
-	.loc 1 91 0
 	movs	r5, #0
-	.loc 1 92 0
 	ldr	fp, .L404+12
-	.loc 1 87 0
 	ldrh	r2, [r3, #12]
-.LVL555:
 	mov	r10, r3
 	str	r2, [sp, #4]
-.LVL556:
 .L387:
-	.loc 1 91 0 discriminator 1
 	cmp	r5, r8
 	bne	.L394
-	.loc 1 112 0
 	movs	r0, #0
 	add	sp, sp, #16
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL557:
 .L394:
-	.cfi_restore_state
-	.loc 1 92 0
 	ldr	r3, [r4, #8]
 	cbz	r3, .L388
-	.loc 1 92 0 is_stmt 0 discriminator 2
 	ldr	r3, [r4, #12]
 	cbnz	r3, .L389
 .L388:
-	.loc 1 92 0 discriminator 3
-	movs	r2, #92
+	movs	r2, #96
 	ldr	r1, .L404+4
 	mov	r0, fp
 	bl	printf
-.LVL558:
 .L389:
-	.loc 1 94 0 is_stmt 1
 	ldr	r6, .L404+8
-	.loc 1 93 0
 	add	r2, sp, #8
 	add	r1, sp, #12
 	ldr	r0, [r4, #4]
 	bl	l2p_addr_tran.isra.0
-.LVL559:
-	.loc 1 94 0
 	ldr	r3, [r4, #12]
 	ldr	r2, [r4, #8]
 	ldr	r1, [sp, #12]
 	ldrb	r0, [sp, #8]	@ zero_extendqisi2
 	ldr	r7, [r6, #12]
 	blx	r7
-.LVL560:
-	.loc 1 99 0
 	ldrh	r3, [r10, #14]
-	.loc 1 98 0
 	str	r0, [r4]
-	.loc 1 99 0
 	cmp	r3, #4
 	bne	.L391
-	.loc 1 100 0
 	ldr	r0, [sp, #4]
-.LVL561:
 	ldr	r3, [r4, #12]
 	ldr	r2, [r4, #8]
 	ldr	r1, [sp, #12]
@@ -5724,34 +3523,23 @@ FlashReadPages:
 	add	r1, r1, r0
 	ldrb	r0, [sp, #8]	@ zero_extendqisi2
 	blx	r6
-.LVL562:
-	.loc 1 104 0
 	adds	r0, r0, #1
-.LVL563:
 	beq	.L392
-	.loc 1 105 0 discriminator 1
 	ldr	r3, [r4, #12]
-	.loc 1 104 0 discriminator 1
 	ldr	r2, [r3, #12]
 	adds	r2, r2, #1
 	bne	.L391
-	.loc 1 105 0
 	ldr	r2, [r3, #8]
 	adds	r2, r2, #1
 	bne	.L391
-	.loc 1 106 0
 	ldr	r3, [r3]
 	adds	r3, r3, #1
 	beq	.L391
 .L392:
-	.loc 1 108 0
 	mov	r3, #-1
 	str	r3, [r4]
-.LVL564:
 .L391:
-	.loc 1 91 0 discriminator 2
 	adds	r5, r5, #1
-.LVL565:
 	adds	r4, r4, #20
 	b	.L387
 .L405:
@@ -5761,8 +3549,6 @@ FlashReadPages:
 	.word	.LANCHOR104
 	.word	.LANCHOR105
 	.word	.LC1
-	.cfi_endproc
-.LFE344:
 	.size	FlashReadPages, .-FlashReadPages
 	.section	.text.FtlLoadFactoryBbt,"ax",%progbits
 	.align	1
@@ -5773,106 +3559,59 @@ FlashReadPages:
 	.fpu softvfp
 	.type	FtlLoadFactoryBbt, %function
 FtlLoadFactoryBbt:
-.LFB233:
-	.loc 4 279 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	.loc 4 286 0
 	ldr	r3, .L416
-	.loc 4 279 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 4 289 0
 	movs	r6, #0
-	.loc 4 286 0
 	ldr	r5, .L416+4
 	ldr	r3, [r3]
 	ldr	r7, .L416+8
-	.loc 4 291 0
 	ldr	r10, .L416+20
-	.loc 4 286 0
 	str	r3, [r5, #8]
-	.loc 4 287 0
 	ldr	r3, .L416+12
 	ldr	r8, [r3]
 	str	r8, [r5, #12]
-.LVL566:
 .L407:
-	.loc 4 289 0 discriminator 1
 	ldr	r3, .L416+16
 	ldrh	r3, [r3]
 	cmp	r6, r3
 	bcc	.L412
-	.loc 4 314 0
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL567:
 .L412:
-	.loc 4 291 0
 	ldrh	r4, [r10]
-	.loc 4 290 0
 	movw	r3, #65535
-	.loc 4 294 0
 	ldr	fp, .L416+4
-	.loc 4 290 0
 	strh	r3, [r7, #2]!	@ movhi
-	.loc 4 291 0
 	subs	r4, r4, #1
 	uxth	r4, r4
-.LVL568:
 .L408:
-	.loc 4 291 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r10]
 	sub	r2, r3, #15
 	cmp	r2, r4
 	bgt	.L410
-.LVL569:
-	.loc 4 292 0 is_stmt 1
 	mla	r3, r6, r3, r4
-.LVL570:
-	.loc 4 294 0
 	movs	r2, #1
-.LVL571:
 	mov	r1, r2
 	mov	r0, fp
-	.loc 4 292 0
 	lsls	r3, r3, #10
-	.loc 4 293 0
 	str	r3, [r5, #4]
-	.loc 4 294 0
 	bl	FlashReadPages
-.LVL572:
-	.loc 4 295 0
 	ldr	r3, [r5]
 	adds	r3, r3, #1
 	beq	.L409
-	.loc 4 301 0
 	ldrh	r2, [r8]
 	movw	r3, #61664
 	cmp	r2, r3
 	bne	.L409
-	.loc 4 303 0
 	strh	r4, [r7]	@ movhi
 .L410:
-	.loc 4 289 0 discriminator 2
 	adds	r6, r6, #1
-.LVL573:
 	b	.L407
 .L409:
-	.loc 4 291 0 discriminator 2
 	subs	r4, r4, #1
-.LVL574:
 	uxth	r4, r4
-.LVL575:
 	b	.L408
 .L417:
 	.align	2
@@ -5883,8 +3622,6 @@ FtlLoadFactoryBbt:
 	.word	.LANCHOR108
 	.word	.LANCHOR10
 	.word	.LANCHOR17
-	.cfi_endproc
-.LFE233:
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
 	.section	.text.FtlGetLastWrittenPage,"ax",%progbits
 	.align	1
@@ -5895,127 +3632,65 @@ FtlLoadFactoryBbt:
 	.fpu softvfp
 	.type	FtlGetLastWrittenPage, %function
 FtlGetLastWrittenPage:
-.LFB239:
-	.loc 2 47 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL576:
-	.loc 2 51 0
 	cmp	r1, #1
-	.loc 2 47 0
 	push	{r4, r5, r6, r7, r8, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 4, -24
-	.cfi_offset 5, -20
-	.cfi_offset 6, -16
-	.cfi_offset 7, -12
-	.cfi_offset 8, -8
-	.cfi_offset 14, -4
-	.loc 2 51 0
 	it	eq
 	ldreq	r3, .L427
-	.loc 2 47 0
 	sub	sp, sp, #88
-	.cfi_def_cfa_offset 112
-	.loc 2 57 0
 	lsl	r7, r0, #10
-	.loc 2 58 0
 	mov	r2, r1
-	.loc 2 51 0
 	it	ne
 	ldrne	r3, .L427+4
-	.loc 2 47 0
 	mov	r6, r1
-	.loc 2 58 0
 	add	r0, sp, #4
-.LVL577:
 	movs	r1, #1
-.LVL578:
-	.loc 2 51 0
 	ldrh	r5, [r3]
-.LVL579:
-	.loc 2 53 0
 	ldr	r3, .L427+8
-	.loc 2 56 0
 	subs	r5, r5, #1
-.LVL580:
 	sxth	r5, r5
-.LVL581:
-	.loc 2 53 0
 	str	r3, [sp, #12]
-	.loc 2 54 0
 	add	r3, sp, #24
 	str	r3, [sp, #16]
-.LVL582:
-	.loc 2 57 0
 	orr	r3, r5, r7
 	str	r3, [sp, #8]
-	.loc 2 58 0
 	bl	FlashReadPages
-.LVL583:
-	.loc 2 59 0
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
 	bne	.L421
 	mov	r8, #0
-.LVL584:
 .L422:
-	.loc 2 60 0
 	cmp	r8, r5
 	ble	.L425
-.LVL585:
 .L421:
-	.loc 2 73 0
 	mov	r0, r5
 	add	sp, sp, #88
-	.cfi_remember_state
-	.cfi_def_cfa_offset 24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL586:
 .L425:
-	.cfi_restore_state
-	.loc 2 61 0
 	add	r3, r8, r5
-	.loc 2 63 0
 	mov	r2, r6
-	.loc 2 61 0
 	add	r3, r3, r3, lsr #31
-	.loc 2 63 0
 	movs	r1, #1
 	add	r0, sp, #4
-	.loc 2 61 0
 	asrs	r4, r3, #1
-.LVL587:
-	.loc 2 62 0
 	sxth	r3, r4
 	orrs	r3, r3, r7
 	str	r3, [sp, #8]
-	.loc 2 63 0
 	bl	FlashReadPages
-.LVL588:
-	.loc 2 65 0
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
 	bne	.L423
-	.loc 2 65 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
 	bne	.L423
-	.loc 2 66 0 is_stmt 1
 	subs	r4, r4, #1
-.LVL589:
 	sxth	r5, r4
-.LVL590:
 	b	.L422
-.LVL591:
 .L423:
-	.loc 2 68 0
 	adds	r4, r4, #1
-.LVL592:
 	sxth	r8, r4
-.LVL593:
 	b	.L422
 .L428:
 	.align	2
@@ -6023,8 +3698,6 @@ FtlGetLastWrittenPage:
 	.word	.LANCHOR20
 	.word	.LANCHOR19
 	.word	ftl_temp_buf
-	.cfi_endproc
-.LFE239:
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
 	.section	.text.FlashProgPages,"ax",%progbits
 	.align	1
@@ -6035,82 +3708,45 @@ FtlGetLastWrittenPage:
 	.fpu softvfp
 	.type	FlashProgPages, %function
 FlashProgPages:
-.LFB345:
-	.loc 1 115 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL594:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
 	sub	sp, sp, #40
-	.cfi_def_cfa_offset 72
-	.loc 1 115 0
 	str	r3, [sp]
 	mov	r10, r1
 	mov	r7, r2
 	mov	r4, r0
-	.loc 1 117 0
 	ldr	r3, .L459
-.LVL595:
-	.loc 1 121 0
 	mov	r5, r0
 	movs	r6, #0
-	.loc 1 117 0
 	ldrh	r8, [r3, #12]
-.LVL596:
 	str	r3, [sp, #4]
-.LVL597:
 .L430:
-	.loc 1 121 0 discriminator 1
 	cmp	r6, r10
 	bne	.L438
-	.loc 1 142 0
 	ldr	r3, [sp]
 	cmp	r3, #0
 	bne	.L445
-.LVL598:
 .L458:
-	.loc 1 172 0
 	movs	r0, #0
 	add	sp, sp, #40
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-.LVL599:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL600:
 .L438:
-	.cfi_restore_state
-	.loc 1 122 0
 	ldr	r3, [r5, #8]
 	cbz	r3, .L431
-	.loc 1 122 0 is_stmt 0 discriminator 2
 	ldr	r3, [r5, #12]
 	cbnz	r3, .L432
 .L431:
-	.loc 1 122 0 discriminator 3
-	movs	r2, #122
+	movs	r2, #126
 	ldr	r1, .L459+4
 	ldr	r0, .L459+8
 	bl	printf
-.LVL601:
 .L432:
-	.loc 1 123 0 is_stmt 1
 	add	r2, sp, #12
 	add	r1, sp, #16
 	ldr	r0, [r5, #4]
 	bl	l2p_addr_tran.isra.0
-.LVL602:
-	.loc 1 124 0
 	ldr	r3, .L459+12
 	ldr	r2, [r5, #8]
 	ldr	r1, [sp, #16]
@@ -6118,18 +3754,13 @@ FlashProgPages:
 	ldrb	r0, [sp, #12]	@ zero_extendqisi2
 	ldr	r3, [r5, #12]
 	blx	fp
-.LVL603:
-	.loc 1 129 0
 	cbnz	r0, .L433
-	.loc 1 128 0
 	str	r0, [r5]
 .L434:
-	.loc 1 132 0
 	ldr	r3, [sp, #4]
 	ldrh	r3, [r3, #14]
 	cmp	r3, #4
 	bne	.L436
-	.loc 1 133 0
 	ldr	r1, .L459+12
 	ldr	r3, [r5, #12]
 	ldr	r2, [r5, #8]
@@ -6138,119 +3769,73 @@ FlashProgPages:
 	adds	r3, r3, #8
 	add	r2, r2, #2048
 	ldrb	r0, [sp, #12]	@ zero_extendqisi2
-.LVL604:
 	add	r1, r1, r8
 	blx	fp
-.LVL605:
-	.loc 1 137 0
 	cbz	r0, .L436
-	.loc 1 138 0
 	mov	r3, #-1
 	str	r3, [r5]
 .L436:
-	.loc 1 121 0 discriminator 2
 	adds	r6, r6, #1
-.LVL606:
 	adds	r5, r5, #20
 	b	.L430
 .L433:
-	.loc 1 130 0
 	mov	r3, #-1
 	str	r3, [r5]
 	b	.L434
-.LVL607:
 .L443:
-.LBB237:
-	.loc 1 147 0
 	movs	r3, #0
-	.loc 1 153 0
 	mov	r2, r7
-	.loc 1 147 0
 	str	r3, [r8]
-	.loc 1 153 0
 	movs	r1, #1
-	.loc 1 148 0
 	str	r3, [r10]
-	.loc 1 153 0
 	add	r0, sp, #20
-	.loc 1 149 0
 	ldr	r3, [r4, #4]
-	.loc 1 150 0
 	str	r8, [sp, #28]
-	.loc 1 151 0
 	str	r10, [sp, #32]
-	.loc 1 149 0
 	str	r3, [sp, #24]
-	.loc 1 153 0
 	bl	FlashReadPages
-.LVL608:
-	.loc 1 154 0
 	ldr	fp, [sp, #20]
 	cmp	fp, #-1
 	bne	.L440
-	.loc 1 155 0
 	ldr	r1, [r4, #4]
 	ldr	r0, .L459+16
 	bl	printf
-.LVL609:
-	.loc 1 156 0
 	str	fp, [r4]
 .L440:
-	.loc 1 158 0
 	ldr	r3, [r4, #12]
 	cbz	r3, .L441
-	.loc 1 159 0
 	ldr	r2, [r3]
 	ldr	r3, [r10]
 	cmp	r2, r3
 	beq	.L441
-	.loc 1 160 0
 	ldr	r1, [r4, #4]
 	ldr	r0, .L459+20
 	bl	printf
-.LVL610:
-	.loc 1 161 0
 	mov	r3, #-1
 	str	r3, [r4]
 .L441:
-	.loc 1 164 0
 	ldr	r3, [r4, #8]
 	cbz	r3, .L442
-	.loc 1 165 0
 	ldr	r2, [r3]
 	ldr	r3, [r8]
 	cmp	r2, r3
 	beq	.L442
-	.loc 1 166 0
 	ldr	r1, [r4, #4]
 	ldr	r0, .L459+24
 	bl	printf
-.LVL611:
-	.loc 1 167 0
 	mov	r3, #-1
 	str	r3, [r4]
 .L442:
-.LBE237:
-	.loc 1 144 0 discriminator 2
 	adds	r5, r5, #1
-.LVL612:
 	adds	r4, r4, #20
-.LVL613:
 .L439:
-	.loc 1 144 0 is_stmt 0 discriminator 1
 	cmp	r6, r5
 	bne	.L443
 	b	.L458
-.LVL614:
 .L445:
 	movs	r5, #0
-.LBB238:
-	.loc 1 147 0 is_stmt 1
 	ldr	r8, .L459+28
-.LVL615:
-	.loc 1 148 0
 	ldr	r10, .L459+32
-.LVL616:
 	b	.L439
 .L460:
 	.align	2
@@ -6264,9 +3849,6 @@ FlashProgPages:
 	.word	.LC81
 	.word	check_buf
 	.word	.LANCHOR110
-.LBE238:
-	.cfi_endproc
-.LFE345:
 	.size	FlashProgPages, .-FlashProgPages
 	.section	.text.FlashEraseBlocks,"ax",%progbits
 	.align	1
@@ -6277,89 +3859,50 @@ FlashProgPages:
 	.fpu softvfp
 	.type	FlashEraseBlocks, %function
 FlashEraseBlocks:
-.LFB346:
-	.loc 1 175 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL617:
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -28
-	.cfi_offset 5, -24
-	.cfi_offset 6, -20
-	.cfi_offset 7, -16
-	.cfi_offset 8, -12
-	.cfi_offset 10, -8
-	.cfi_offset 14, -4
-	.loc 1 175 0
 	mov	r7, r2
-	.loc 1 178 0
 	ldr	r5, .L472
 	adds	r4, r0, #4
-	.loc 1 181 0
 	movs	r6, #0
-	.loc 1 183 0
 	ldr	r10, .L472+4
-	.loc 1 178 0
 	ldrh	r8, [r5, #12]
-.LVL618:
 .L462:
-	.loc 1 181 0 discriminator 1
 	cmp	r6, r7
 	bne	.L468
-	.loc 1 194 0
 	movs	r0, #0
 	add	sp, sp, #12
-	.cfi_remember_state
-	.cfi_def_cfa_offset 28
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.LVL619:
 .L468:
-	.cfi_restore_state
-	.loc 1 182 0
 	add	r1, sp, #4
 	mov	r2, sp
 	ldr	r0, [r4]
 	bl	l2p_addr_tran.isra.0
-.LVL620:
-	.loc 1 183 0
 	ldr	r3, [r10, #4]
 	ldr	r1, [sp, #4]
 	ldrb	r0, [sp]	@ zero_extendqisi2
 	blx	r3
-.LVL621:
-	.loc 1 185 0
 	cbnz	r0, .L463
-	.loc 1 184 0
 	str	r0, [r4, #-4]
 .L464:
-	.loc 1 187 0
 	ldrh	r3, [r5, #14]
 	cmp	r3, #4
 	bne	.L466
-	.loc 1 188 0
 	ldr	r1, [sp, #4]
 	ldr	r3, [r10, #4]
 	ldrb	r0, [sp]	@ zero_extendqisi2
-.LVL622:
 	add	r1, r1, r8
 	blx	r3
-.LVL623:
-	.loc 1 189 0
 	cbz	r0, .L466
-	.loc 1 190 0
 	mov	r3, #-1
 	str	r3, [r4, #-4]
 .L466:
-	.loc 1 181 0 discriminator 2
 	adds	r6, r6, #1
-.LVL624:
 	adds	r4, r4, #20
 	b	.L462
 .L463:
-	.loc 1 186 0
 	mov	r3, #-1
 	str	r3, [r4, #-4]
 	b	.L464
@@ -6368,8 +3911,6 @@ FlashEraseBlocks:
 .L472:
 	.word	.LANCHOR0
 	.word	.LANCHOR105
-	.cfi_endproc
-.LFE346:
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
 	.section	.text.FtlFreeSysBlkQueueIn,"ax",%progbits
 	.align	1
@@ -6380,91 +3921,48 @@ FlashEraseBlocks:
 	.fpu softvfp
 	.type	FtlFreeSysBlkQueueIn, %function
 FtlFreeSysBlkQueueIn:
-.LFB243:
-	.loc 2 98 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL625:
-	.loc 2 99 0
 	subs	r3, r0, #1
 	movw	r2, #65533
 	uxth	r3, r3
-	.loc 2 98 0
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 2 98 0
 	mov	r5, r0
-	.loc 2 99 0
 	cmp	r3, r2
 	bhi	.L474
-.LBB247:
-.LBB248:
-	.loc 2 94 0
 	ldr	r4, .L483
-.LBE248:
-.LBE247:
-	.loc 2 101 0
 	ldrh	r3, [r4, #6]
 	cmp	r3, #1024
 	beq	.L474
-.LVL626:
-.LBB249:
-.LBB250:
-	.loc 2 103 0
 	cbz	r1, .L476
-.LBB251:
-	.loc 2 104 0
 	bl	P2V_block_in_plane
-.LVL627:
-	.loc 2 105 0
 	ldr	r3, .L483+4
-	.loc 2 104 0
 	mov	r6, r0
-.LVL628:
-	.loc 2 106 0
 	movs	r2, #1
 	mov	r1, r2
-	.loc 2 105 0
 	ldr	r0, [r3]
 	lsls	r3, r5, #10
 	str	r3, [r0, #4]
-	.loc 2 106 0
 	bl	FlashEraseBlocks
-.LVL629:
-	.loc 2 107 0
 	ldr	r3, .L483+8
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r6, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r6, lsl #1]	@ movhi
-	.loc 2 108 0
 	ldr	r2, .L483+12
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
-.LVL630:
 .L476:
-.LBE251:
-	.loc 2 110 0
 	ldrh	r3, [r4, #6]
 	adds	r3, r3, #1
 	strh	r3, [r4, #6]	@ movhi
-	.loc 2 111 0
 	ldrh	r3, [r4, #4]
 	adds	r2, r3, #4
-	.loc 2 112 0
 	adds	r3, r3, #1
 	ubfx	r3, r3, #0, #10
-	.loc 2 111 0
 	strh	r5, [r4, r2, lsl #1]	@ movhi
-	.loc 2 112 0
 	strh	r3, [r4, #4]	@ movhi
-.LVL631:
 .L474:
 	pop	{r4, r5, r6, pc}
 .L484:
@@ -6474,10 +3972,6 @@ FtlFreeSysBlkQueueIn:
 	.word	.LANCHOR111
 	.word	.LANCHOR43
 	.word	.LANCHOR75
-.LBE250:
-.LBE249:
-	.cfi_endproc
-.LFE243:
 	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
 	.section	.text.FtlLowFormatEraseBlock,"ax",%progbits
 	.align	1
@@ -6488,418 +3982,249 @@ FtlFreeSysBlkQueueIn:
 	.fpu softvfp
 	.type	FtlLowFormatEraseBlock, %function
 FtlLowFormatEraseBlock:
-.LFB212:
-	.loc 3 528 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL632:
-	.loc 3 538 0
 	ldr	r3, .L528
-	.loc 3 528 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
 	sub	sp, sp, #32
-	.cfi_def_cfa_offset 64
-	.loc 3 540 0
 	ldr	r6, .L528+4
-	.loc 3 539 0
 	mov	fp, #0
-	.loc 3 536 0
 	mov	r5, fp
-	.loc 3 537 0
 	mov	r4, fp
-	.loc 3 538 0
 	str	r0, [r3]
-.LVL633:
-	.loc 3 540 0
 	mov	r10, #20
-	.loc 3 539 0
 	ldr	r3, .L528+8
-	.loc 3 540 0
 	ldr	r8, [r6]
-	.loc 3 528 0
 	str	r0, [sp, #4]
-	.loc 3 539 0
 	ldrh	r3, [r3]
-	.loc 3 528 0
 	str	r1, [sp]
-	.loc 3 539 0
 	str	r3, [sp, #8]
-	.loc 3 550 0
 	ldr	r3, .L528+12
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	.loc 3 551 0
 	ldr	r3, .L528+16
 	ldr	r3, [r3]
 	str	r3, [sp, #16]
 	ldr	r3, .L528+20
 	ldrh	r3, [r3]
 	str	r3, [sp, #20]
-.LVL634:
 .L486:
-	.loc 3 539 0 discriminator 1
 	ldr	r3, [sp, #8]
 	uxth	r2, fp
 	cmp	r3, r2
 	bhi	.L490
-	.loc 3 559 0
 	cmp	r5, #0
 	beq	.L485
-	.loc 3 562 0
 	mov	r0, r8
-	.loc 3 563 0
 	movs	r7, #0
-	.loc 3 564 0
 	mov	r8, #20
-	.loc 3 562 0
 	mov	r2, r5
 	movs	r1, #0
 	bl	FlashEraseBlocks
-.LVL635:
 .L493:
-	.loc 3 563 0 discriminator 1
 	uxth	r3, r7
 	cmp	r5, r3
 	bhi	.L495
-	.loc 3 571 0
 	ldr	r3, [sp]
 	cmp	r3, #0
 	beq	.L511
-.LVL636:
-	.loc 3 573 0
 	ldr	r3, .L528+24
-	.loc 3 572 0
 	mov	r8, #1
-	.loc 3 573 0
 	ldrh	r10, [r3]
-.LVL637:
-	.loc 3 574 0
 	lsr	r3, r10, #2
 	str	r3, [sp, #12]
-.LVL638:
 .L496:
 	movs	r6, #0
-.LVL639:
 .L505:
-	.loc 3 578 0
 	ldr	r3, .L528+8
 	mov	fp, #0
-	.loc 3 577 0
 	mov	r5, fp
-	.loc 3 578 0
 	ldrh	r3, [r3]
 	str	r3, [sp, #16]
-	.loc 3 579 0
 	ldr	r3, .L528+4
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
-	.loc 3 587 0
 	ldr	r3, .L528+28
 	ldr	r3, [r3]
 	str	r3, [sp, #20]
-	.loc 3 588 0
 	ldr	r3, .L528+12
 	ldr	r3, [r3]
 	str	r3, [sp, #24]
 	ldr	r3, .L528+20
 	ldrh	r3, [r3]
 	str	r3, [sp, #28]
-.LVL640:
 .L497:
-	.loc 3 578 0 discriminator 1
 	ldr	r3, [sp, #16]
 	uxth	r2, fp
 	cmp	r3, r2
 	bhi	.L500
-	.loc 3 593 0
 	cbz	r5, .L485
-	.loc 3 598 0
 	ldr	fp, .L528+4
-.LVL641:
-	.loc 3 596 0
 	movs	r3, #1
 	mov	r2, r8
-.LVL642:
 	mov	r1, r5
 	ldr	r0, [sp, #8]
-	.loc 3 597 0
 	movs	r7, #0
-	.loc 3 596 0
 	bl	FlashProgPages
-.LVL643:
-	.loc 3 598 0
 	movs	r3, #20
-.LVL644:
 .L502:
-	.loc 3 597 0 discriminator 1
 	uxth	r2, r7
 	cmp	r5, r2
 	bhi	.L504
-	.loc 3 604 0
 	ldr	r3, [sp, #12]
 	add	r6, r6, r3
-.LVL645:
 	uxth	r6, r6
-.LVL646:
-	.loc 3 605 0
 	cmp	r10, r6
 	bhi	.L505
-	.loc 3 611 0 discriminator 1
 	ldr	r7, .L528+4
-.LVL647:
 	movs	r6, #0
-.LVL648:
 	mov	r10, #20
-.LVL649:
 .L506:
-	.loc 3 610 0 discriminator 1
 	uxth	r3, r6
 	cmp	r5, r3
 	bhi	.L508
-	.loc 3 615 0
 	ldr	r3, [sp, #4]
 	cmp	r3, #63
 	bls	.L509
-	.loc 3 615 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp]
 	cbz	r3, .L485
 .L509:
-	.loc 3 616 0 is_stmt 1
 	ldr	r3, .L528+4
 	mov	r2, r5
 	mov	r1, r8
 	ldr	r0, [r3]
 	bl	FlashEraseBlocks
-.LVL650:
 .L485:
-	.loc 3 619 0
 	mov	r0, r4
 	add	sp, sp, #32
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL651:
 .L490:
-	.cfi_restore_state
-	.loc 3 540 0
 	mul	r2, r10, fp
 	movs	r3, #0
-	.loc 3 541 0
 	ldr	r1, [sp, #4]
-	.loc 3 540 0
 	str	r3, [r8, r2]
-	.loc 3 541 0
 	ldr	r3, .L528+32
 	ldrb	r0, [r3, fp]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL652:
-	.loc 3 543 0
 	ldr	r3, [sp]
-	.loc 3 541 0
 	mov	r7, r0
-.LVL653:
-	.loc 3 543 0
 	cbz	r3, .L487
-	.loc 3 544 0
 	bl	IsBlkInVendorPart
-.LVL654:
 	cbnz	r0, .L488
 .L487:
-	.loc 3 548 0
 	mov	r0, r7
 	bl	FtlBbmIsBadBlock
-.LVL655:
 	cbnz	r0, .L489
-	.loc 3 549 0
 	mla	r1, r10, r5, r8
-	.loc 3 550 0
 	ldr	r3, [sp, #12]
-	.loc 3 549 0
 	lsls	r7, r7, #10
-	.loc 3 550 0
 	str	r3, [r1, #8]
-	.loc 3 551 0
 	ldr	r3, [sp, #20]
-	.loc 3 549 0
 	str	r7, [r1, #4]
-	.loc 3 551 0
 	mul	r2, r3, r5
 	ldr	r3, [sp, #16]
-	.loc 3 552 0
 	adds	r5, r5, #1
-.LVL656:
 	uxth	r5, r5
-.LVL657:
-	.loc 3 551 0
 	bic	r2, r2, #3
 	add	r2, r2, r3
 	str	r2, [r1, #12]
 .L488:
-.LVL658:
 	add	fp, fp, #1
-.LVL659:
 	b	.L486
-.LVL660:
 .L489:
-	.loc 3 554 0
 	adds	r4, r4, #1
-.LVL661:
 	uxth	r4, r4
-.LVL662:
 	b	.L488
-.LVL663:
 .L495:
-	.loc 3 564 0
 	mul	r3, r8, r7
 	ldr	r2, [r6]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
 	adds	r3, r3, #1
 	bne	.L494
-	.loc 3 566 0
 	ldr	r0, [r1, #4]
-	.loc 3 565 0
 	adds	r4, r4, #1
-.LVL664:
 	uxth	r4, r4
-.LVL665:
-	.loc 3 566 0
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.LVL666:
 .L494:
 	adds	r7, r7, #1
-.LVL667:
 	b	.L493
-.LVL668:
 .L511:
-	.loc 3 533 0
 	movs	r3, #6
-	.loc 3 534 0
 	ldr	r8, [sp]
-	.loc 3 533 0
 	str	r3, [sp, #12]
-	.loc 3 531 0
 	mov	r10, #1
 	b	.L496
-.LVL669:
 .L500:
-	.loc 3 579 0
 	movs	r3, #20
 	mul	r2, r3, fp
 	ldr	r3, [sp, #8]
 	mov	r1, r3
 	movs	r3, #0
 	str	r3, [r1, r2]
-	.loc 3 580 0
 	ldr	r3, .L528+32
 	ldr	r1, [sp, #4]
 	ldrb	r0, [r3, fp]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL670:
-	.loc 3 581 0
 	ldr	r3, [sp]
-	.loc 3 580 0
 	mov	r7, r0
-.LVL671:
-	.loc 3 581 0
 	cbz	r3, .L498
-	.loc 3 582 0
 	bl	IsBlkInVendorPart
-.LVL672:
 	cbnz	r0, .L499
 .L498:
-	.loc 3 585 0
 	mov	r0, r7
 	bl	FtlBbmIsBadBlock
-.LVL673:
 	cbnz	r0, .L499
-	.loc 3 586 0
 	ldr	r3, [sp, #8]
 	movs	r2, #20
 	add	r7, r6, r7, lsl #10
 	mla	r1, r2, r5, r3
-	.loc 3 587 0
 	ldr	r3, [sp, #20]
 	str	r3, [r1, #8]
-	.loc 3 588 0
 	ldr	r3, [sp, #28]
-	.loc 3 586 0
 	str	r7, [r1, #4]
-	.loc 3 588 0
 	mul	r2, r3, r5
 	ldr	r3, [sp, #24]
-	.loc 3 589 0
 	adds	r5, r5, #1
-.LVL674:
 	uxth	r5, r5
-.LVL675:
-	.loc 3 588 0
 	bic	r2, r2, #3
 	add	r2, r2, r3
 	str	r2, [r1, #12]
 .L499:
-.LVL676:
 	add	fp, fp, #1
-.LVL677:
 	b	.L497
-.LVL678:
 .L504:
-	.loc 3 598 0
 	mul	r2, r3, r7
 	ldr	r1, [fp]
 	adds	r0, r1, r2
 	ldr	r2, [r1, r2]
 	cbz	r2, .L503
-	.loc 3 600 0
 	ldr	r0, [r0, #4]
-	.loc 3 599 0
 	adds	r4, r4, #1
-.LVL679:
 	str	r3, [sp, #8]
 	uxth	r4, r4
-.LVL680:
-	.loc 3 600 0
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.LVL681:
 	ldr	r3, [sp, #8]
 .L503:
-.LVL682:
 	adds	r7, r7, #1
-.LVL683:
 	b	.L502
-.LVL684:
 .L508:
-	.loc 3 611 0
 	ldr	r3, [sp]
 	cbz	r3, .L507
-	.loc 3 611 0 is_stmt 0 discriminator 1
 	mul	r3, r10, r6
 	ldr	r2, [r7]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
 	cbnz	r3, .L507
-	.loc 3 612 0 is_stmt 1
 	ldr	r0, [r1, #4]
 	movs	r1, #1
 	ubfx	r0, r0, #10, #16
 	bl	FtlFreeSysBlkQueueIn
-.LVL685:
 .L507:
 	adds	r6, r6, #1
-.LVL686:
 	b	.L506
 .L529:
 	.align	2
@@ -6913,8 +4238,6 @@ FtlLowFormatEraseBlock:
 	.word	.LANCHOR20
 	.word	.LANCHOR115
 	.word	.LANCHOR13
-	.cfi_endproc
-.LFE212:
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
 	.section	.text.FtlFreeSysBlkQueueOut,"ax",%progbits
 	.align	1
@@ -6925,111 +4248,57 @@ FtlLowFormatEraseBlock:
 	.fpu softvfp
 	.type	FtlFreeSysBlkQueueOut, %function
 FtlFreeSysBlkQueueOut:
-.LFB246:
-	.loc 2 181 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL687:
 	push	{r3, r4, r5, r6, r7, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 3, -24
-	.cfi_offset 4, -20
-	.cfi_offset 5, -16
-	.cfi_offset 6, -12
-	.cfi_offset 7, -8
-	.cfi_offset 14, -4
-.LBB252:
-.LBB253:
-	.loc 2 89 0
 	ldr	r4, .L537
-.LBE253:
-.LBE252:
-.LBB255:
-	.loc 2 192 0
 	ldr	r6, .L537+4
-.LVL688:
 .L531:
-.LBE255:
-.LBB256:
-.LBB254:
-	.loc 2 89 0
 	ldrh	r1, [r4, #6]
-.LBE254:
-.LBE256:
-	.loc 2 186 0
 	cbz	r1, .L532
-	.loc 2 187 0
 	ldrh	r3, [r4, #2]
-	.loc 2 188 0
 	subs	r1, r1, #1
 	strh	r1, [r4, #6]	@ movhi
-	.loc 2 187 0
 	adds	r2, r3, #4
-	.loc 2 189 0
 	adds	r3, r3, #1
-	.loc 2 187 0
 	ldrh	r5, [r4, r2, lsl #1]
-.LVL689:
-	.loc 2 189 0
 	ubfx	r3, r3, #0, #10
 	strh	r3, [r4, #2]	@ movhi
-.LBB257:
-	.loc 2 191 0
 	mov	r0, r5
 	bl	P2V_block_in_plane
-.LVL690:
 	mov	r7, r0
-.LVL691:
-	.loc 2 192 0
 	ldr	r0, [r6]
 	lsls	r3, r5, #10
-	.loc 2 193 0
 	movs	r2, #1
 	mov	r1, r2
-	.loc 2 192 0
 	str	r3, [r0, #4]
-	.loc 2 193 0
 	bl	FlashEraseBlocks
-.LVL692:
-	.loc 2 194 0
 	ldr	r3, .L537+8
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r7, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r7, lsl #1]	@ movhi
-	.loc 2 195 0
 	ldr	r2, .L537+12
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
-.LBE257:
-	.loc 2 202 0
 	subs	r3, r5, #1
 	uxth	r3, r3
 	movw	r2, #65533
 	cmp	r3, r2
 	bhi	.L533
-	.loc 2 208 0
 	mov	r0, r5
 	pop	{r3, r4, r5, r6, r7, pc}
-.LVL693:
 .L532:
-	.loc 2 199 0
 	ldr	r0, .L537+16
 	bl	printf
-.LVL694:
 .L535:
 	b	.L535
-.LVL695:
 .L533:
-	.loc 2 203 0
 	ldrh	r2, [r4, #6]
 	mov	r1, r5
 	ldr	r0, .L537+20
 	bl	printf
-.LVL696:
-	.loc 2 205 0
 	b	.L531
 .L538:
 	.align	2
@@ -7040,8 +4309,6 @@ FtlFreeSysBlkQueueOut:
 	.word	.LANCHOR75
 	.word	.LC82
 	.word	.LC83
-	.cfi_endproc
-.LFE246:
 	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
 	.section	.text.ftl_map_blk_alloc_new_blk,"ax",%progbits
 	.align	1
@@ -7052,97 +4319,57 @@ FtlFreeSysBlkQueueOut:
 	.fpu softvfp
 	.type	ftl_map_blk_alloc_new_blk, %function
 ftl_map_blk_alloc_new_blk:
-.LFB258:
-	.loc 2 562 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL697:
-	.loc 2 566 0
 	ldrh	r1, [r0, #10]
 	ldr	r2, [r0, #12]
-	.loc 2 562 0
 	push	{r3, r4, r5, r6, r7, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 3, -24
-	.cfi_offset 4, -20
-	.cfi_offset 5, -16
-	.cfi_offset 6, -12
-	.cfi_offset 7, -8
-	.cfi_offset 14, -4
-	.loc 2 562 0
 	mov	r4, r0
-	.loc 2 566 0
 	movs	r3, #0
-.LVL698:
 .L540:
 	uxth	r5, r3
-.LVL699:
-	.loc 2 566 0 is_stmt 0 discriminator 1
 	cmp	r5, r1
 	bcs	.L543
-	.loc 2 567 0 is_stmt 1
 	mov	r7, r2
 	adds	r3, r3, #1
 	ldrh	r6, [r7]
 	adds	r2, r2, #2
 	cmp	r6, #0
 	bne	.L540
-	.loc 2 568 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL700:
-	.loc 2 569 0
 	subs	r3, r0, #1
 	movw	r2, #65533
 	uxth	r3, r3
-	.loc 2 568 0
 	mov	r1, r0
 	strh	r0, [r7]	@ movhi
-	.loc 2 569 0
 	cmp	r3, r2
 	bls	.L541
-	.loc 2 570 0
 	ldr	r3, .L547
 	ldr	r0, .L547+4
 	ldrh	r2, [r3, #6]
 	bl	printf
-.LVL701:
 .L542:
 	b	.L542
 .L541:
-	.loc 2 576 0
 	ldr	r3, [r4, #28]
-	.loc 2 574 0
 	strh	r6, [r4, #2]	@ movhi
-	.loc 2 575 0
 	strh	r5, [r4]	@ movhi
-	.loc 2 576 0
 	adds	r3, r3, #1
 	str	r3, [r4, #28]
-	.loc 2 577 0
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
 .L543:
-	.loc 2 581 0
 	ldrh	r3, [r4, #10]
 	cmp	r3, r5
 	bhi	.L545
-.LVL702:
-.LBB260:
-.LBB261:
 	movw	r2, #581
 	ldr	r1, .L547+8
 	ldr	r0, .L547+12
 	bl	printf
-.LVL703:
 .L545:
-.LBE261:
-.LBE260:
-	.loc 2 583 0
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.LVL704:
 .L548:
 	.align	2
 .L547:
@@ -7150,8 +4377,6 @@ ftl_map_blk_alloc_new_blk:
 	.word	.LC84
 	.word	.LANCHOR116
 	.word	.LC1
-	.cfi_endproc
-.LFE258:
 	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
 	.section	.text.ftl_memset,"ax",%progbits
 	.align	1
@@ -7162,18 +4387,10 @@ ftl_map_blk_alloc_new_blk:
 	.fpu softvfp
 	.type	ftl_memset, %function
 ftl_memset:
-.LFB349:
-	.loc 1 242 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL705:
-	.loc 1 243 0
 	b	memset
-.LVL706:
-	.cfi_endproc
-.LFE349:
 	.size	ftl_memset, .-ftl_memset
 	.section	.text.FtlMemInit,"ax",%progbits
 	.align	1
@@ -7184,488 +4401,283 @@ ftl_memset:
 	.fpu softvfp
 	.type	FtlMemInit, %function
 FtlMemInit:
-.LFB209:
-	.loc 3 280 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 48
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 3 283 0
 	movs	r1, #0
 	ldr	r3, .L651
-	.loc 3 312 0
 	mov	r8, #12
-	.loc 3 298 0
 	ldr	r2, .L651+4
-	.loc 3 283 0
 	str	r1, [r3]
-	.loc 3 284 0
 	ldr	r3, .L651+8
-	.loc 3 311 0
 	ldr	r4, .L651+12
-	.loc 3 308 0
 	str	r1, [sp, #4]
-	.loc 3 284 0
 	str	r1, [r3]
-	.loc 3 285 0
 	ldr	r3, .L651+16
-	.loc 3 311 0
 	ldrh	r0, [r4]
-	.loc 3 313 0
 	ldr	fp, .L651+288
-	.loc 3 285 0
 	str	r1, [r3]
-	.loc 3 286 0
 	ldr	r3, .L651+20
-	.loc 3 311 0
 	lsls	r0, r0, #1
-	.loc 3 317 0
 	ldr	r10, .L651+292
-	.loc 3 321 0
 	ldr	r5, .L651+24
-	.loc 3 286 0
 	str	r1, [r3]
-	.loc 3 287 0
 	ldr	r3, .L651+28
-	.loc 3 324 0
 	ldr	r7, .L651+32
-	.loc 3 287 0
 	str	r1, [r3]
-	.loc 3 288 0
 	ldr	r3, .L651+36
 	str	r1, [r3]
-	.loc 3 289 0
 	ldr	r3, .L651+40
 	str	r1, [r3]
-	.loc 3 290 0
 	ldr	r3, .L651+44
 	str	r1, [r3]
-	.loc 3 291 0
 	ldr	r3, .L651+48
 	str	r1, [r3]
-	.loc 3 292 0
 	ldr	r3, .L651+52
 	str	r1, [r3]
-	.loc 3 293 0
 	ldr	r3, .L651+56
 	str	r1, [r3]
-	.loc 3 294 0
 	ldr	r3, .L651+60
 	str	r1, [r3]
-	.loc 3 295 0
 	ldr	r3, .L651+64
 	str	r1, [r3]
-	.loc 3 296 0
 	ldr	r3, .L651+68
 	str	r1, [r3]
-	.loc 3 297 0
 	ldr	r3, .L651+72
 	str	r1, [r3]
-	.loc 3 298 0
 	movw	r3, #65535
 	str	r3, [r2]
-	.loc 3 299 0
 	ldr	r2, .L651+76
 	str	r1, [r2]
-	.loc 3 300 0
 	ldr	r2, .L651+80
 	str	r1, [r2]
-	.loc 3 301 0
 	ldr	r2, .L651+84
 	str	r1, [r2]
-	.loc 3 302 0
 	ldr	r2, .L651+88
 	strh	r3, [r2]	@ movhi
-	.loc 3 303 0
 	ldr	r2, .L651+92
 	strh	r3, [r2]	@ movhi
-	.loc 3 304 0
 	movs	r2, #32
 	ldr	r3, .L651+96
 	strh	r2, [r3]	@ movhi
-	.loc 3 305 0
 	movs	r2, #128
 	ldr	r3, .L651+100
 	strh	r2, [r3]	@ movhi
-	.loc 3 306 0
 	ldr	r3, .L651+104
 	strh	r1, [r3]	@ movhi
-	.loc 3 307 0
 	ldr	r3, .L651+108
 	strh	r1, [r3]	@ movhi
-	.loc 3 308 0
 	ldr	r3, .L651+112
 	strh	r1, [r3]	@ movhi
-	.loc 3 311 0
 	bl	ftl_malloc
-.LVL707:
 	ldr	r3, .L651+116
 	str	r0, [r3]
-	.loc 3 312 0
 	ldrh	r0, [r4]
-	.loc 3 313 0
 	movs	r4, #20
-	.loc 3 312 0
 	mul	r0, r8, r0
 	bl	ftl_malloc
-.LVL708:
-	.loc 3 313 0
 	ldrh	r2, [fp]
-	.loc 3 312 0
 	ldr	r3, .L651+120
-	.loc 3 313 0
 	muls	r4, r2, r4
-.LVL709:
-	.loc 3 312 0
 	str	r0, [r3]
-	.loc 3 314 0
 	lsls	r6, r4, #2
 	mov	r0, r6
 	bl	ftl_malloc
-.LVL710:
 	ldr	r3, .L651+124
 	str	r0, [r3]
-	.loc 3 315 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL711:
 	ldr	r3, .L651+128
 	str	r0, [r3]
-	.loc 3 316 0
 	mov	r0, r6
 	bl	ftl_malloc
-.LVL712:
 	ldr	r3, .L651+132
-	.loc 3 325 0
 	ldr	r6, .L651+136
-	.loc 3 316 0
 	str	r0, [r3]
-	.loc 3 317 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL713:
 	str	r0, [r10]
-	.loc 3 318 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL714:
 	ldr	r3, .L651+140
-	.loc 3 321 0
 	ldrh	r2, [fp]
-	.loc 3 318 0
 	str	r0, [r3]
-	.loc 3 320 0
 	ldr	r3, .L651+144
-	.loc 3 321 0
 	lsls	r2, r2, #1
-	.loc 3 320 0
 	ldrh	r4, [r3]
-.LVL715:
-	.loc 3 321 0
 	adds	r2, r2, #1
 	str	r2, [r5]
-	.loc 3 322 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL716:
 	ldr	r3, .L651+148
 	str	r0, [r3]
-	.loc 3 323 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL717:
 	ldr	r3, .L651+152
 	str	r0, [r3]
-	.loc 3 324 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL718:
 	str	r0, [r7]
-	.loc 3 325 0
 	ldr	r0, [r5]
 	muls	r0, r4, r0
 	bl	ftl_malloc
-.LVL719:
 	str	r0, [r6]
-	.loc 3 326 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL720:
 	ldr	r2, .L651+156
 	str	r0, [r2]
-	.loc 3 327 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL721:
 	ldr	r2, .L651+160
-	.loc 3 330 0
 	ldr	r4, .L651+164
-.LVL722:
-	.loc 3 327 0
 	str	r0, [r2]
-	.loc 3 328 0
 	ldr	r0, [r5]
 	mul	r0, r8, r0
 	bl	ftl_malloc
-.LVL723:
 	ldr	r2, .L651+168
-	.loc 3 330 0
 	ldrh	r3, [fp]
-	.loc 3 328 0
 	str	r0, [r2]
-	.loc 3 330 0
 	ldrh	r2, [r4]
 	mul	fp, r3, r2
-.LVL724:
-	.loc 3 331 0
 	mov	r0, fp
 	bl	ftl_malloc
-.LVL725:
 	ldr	r2, .L651+172
 	str	r0, [r2]
-	.loc 3 332 0
 	lsl	r0, fp, #2
 	bl	ftl_malloc
-.LVL726:
 	ldr	r3, .L651+176
 	str	r0, [r3]
-	.loc 3 333 0
 	ldrh	r3, [r4]
 	ldr	r0, [r5]
-	.loc 3 336 0
 	ldr	r4, .L651+180
 	ldr	r5, .L651+184
-	.loc 3 333 0
 	muls	r0, r3, r0
 	bl	ftl_malloc
-.LVL727:
 	ldr	r3, .L651+188
 	str	r0, [r3]
-	.loc 3 336 0
 	ldrh	r0, [r4]
 	lsls	r0, r0, #1
 	uxth	r0, r0
 	strh	r0, [r5]	@ movhi
-	.loc 3 337 0
 	bl	ftl_malloc
-.LVL728:
 	ldr	r3, .L651+192
 	str	r0, [r3]
-	.loc 3 338 0
 	ldrh	r3, [r5]
-	.loc 3 339 0
 	ldr	r0, .L651+196
-	.loc 3 338 0
 	addw	r3, r3, #547
 	lsrs	r3, r3, #9
-	.loc 3 339 0
 	and	r0, r0, r3, lsl #9
-	.loc 3 338 0
 	strh	r3, [r5]	@ movhi
-	.loc 3 339 0
 	bl	ftl_malloc
-.LVL729:
-	.loc 3 346 0
 	ldrh	fp, [r4]
-.LVL730:
-	.loc 3 339 0
 	ldr	r3, .L651+200
 	str	r0, [r3]
-	.loc 3 346 0
 	lsl	fp, fp, #1
-	.loc 3 340 0
 	ldr	r3, .L651+204
 	adds	r0, r0, #32
 	str	r0, [r3]
-.LVL731:
-	.loc 3 348 0
 	mov	r0, fp
 	bl	ftl_malloc
-.LVL732:
 	ldr	r3, .L651+208
 	str	r0, [r3]
-	.loc 3 350 0
 	mov	r0, fp
 	bl	ftl_malloc
-.LVL733:
-	.loc 3 351 0
 	ldr	fp, .L651+296
-.LVL734:
-	.loc 3 350 0
 	ldr	r3, .L651+212
 	str	r0, [r3]
-.LVL735:
-	.loc 3 351 0
 	ldr	r3, [fp]
 	lsls	r5, r3, #1
-.LVL736:
-	.loc 3 352 0
 	mov	r0, r5
 	bl	ftl_malloc
-.LVL737:
 	ldr	r2, .L651+216
 	str	r0, [r2]
-	.loc 3 353 0
 	mov	r0, r5
 	bl	ftl_malloc
-.LVL738:
 	ldr	r3, .L651+220
-	.loc 3 355 0
 	ldr	r5, .L651+224
-.LVL739:
-	.loc 3 353 0
 	str	r0, [r3]
-	.loc 3 354 0
 	ldrh	r0, [r4]
 	lsrs	r0, r0, #3
 	adds	r0, r0, #4
 	bl	ftl_malloc
-.LVL740:
 	ldr	r3, .L651+228
 	str	r0, [r3]
-	.loc 3 355 0
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-.LVL741:
 	ldr	r2, .L651+232
 	str	r0, [r2]
-	.loc 3 356 0
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-.LVL742:
 	ldr	r2, .L651+236
 	str	r0, [r2]
-	.loc 3 357 0
 	ldrh	r0, [r5]
 	ldr	r5, .L651+120
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-.LVL743:
 	ldr	r3, .L651+240
 	str	r0, [r3]
-	.loc 3 358 0
 	ldr	r3, .L651+244
 	ldrh	r0, [r3]
 	str	r3, [sp]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-.LVL744:
-	.loc 3 359 0
 	ldr	r3, [sp]
-	.loc 3 358 0
 	ldr	r2, .L651+248
-	.loc 3 359 0
 	ldr	r1, [sp, #4]
-	.loc 3 358 0
 	str	r0, [r2]
-	.loc 3 359 0
 	ldrh	r2, [r3]
 	lsls	r2, r2, #2
 	bl	ftl_memset
-.LVL745:
-	.loc 3 361 0
 	ldr	r3, .L651+252
 	ldrh	r0, [r3]
-	.loc 3 362 0
 	lsls	r0, r0, #2
-.LVL746:
 	bl	ftl_malloc
-.LVL747:
 	ldr	r3, .L651+256
 	str	r0, [r3]
-.LVL748:
-	.loc 3 363 0
 	ldr	r0, [fp]
-	.loc 3 365 0
 	ldr	fp, .L651+300
-	.loc 3 364 0
 	lsls	r0, r0, #2
-.LVL749:
 	bl	ftl_malloc
-.LVL750:
 	ldr	r3, .L651+260
 	str	r0, [r3]
-.LVL751:
-	.loc 3 365 0
 	ldrh	r0, [fp]
-	.loc 3 366 0
 	mul	r0, r8, r0
-.LVL752:
-	.loc 3 372 0
 	ldr	r8, .L651+304
-	.loc 3 366 0
 	bl	ftl_malloc
-.LVL753:
-	.loc 3 367 0
 	ldr	r2, .L651+144
-	.loc 3 366 0
 	ldr	r3, .L651+264
 	str	r0, [r3]
-.LVL754:
-	.loc 3 367 0
 	ldrh	r0, [r2]
 	ldrh	r3, [fp]
 	ldr	fp, .L651+132
-	.loc 3 368 0
 	muls	r0, r3, r0
-.LVL755:
 	bl	ftl_malloc
-.LVL756:
 	ldr	r3, .L651+268
 	str	r0, [r3]
-.LVL757:
-	.loc 3 370 0
 	movs	r0, #6
-	.loc 3 369 0
 	ldrh	r3, [r4]
-	.loc 3 371 0
 	ldr	r4, .L651+272
-	.loc 3 370 0
 	muls	r0, r3, r0
-.LVL758:
 	bl	ftl_malloc
-.LVL759:
 	ldr	r3, .L651+276
 	str	r0, [r3]
-	.loc 3 371 0
 	ldr	r3, .L651+280
 	ldrh	r0, [r3]
-	.loc 3 372 0
 	ldrh	r3, [r8]
-	.loc 3 371 0
 	adds	r0, r0, #31
 	asrs	r0, r0, #5
 	strh	r0, [r4]	@ movhi
-.LVL760:
-	.loc 3 372 0
 	muls	r0, r3, r0
-.LVL761:
-	.loc 3 373 0
 	lsls	r0, r0, #2
-.LVL762:
 	bl	ftl_malloc
-.LVL763:
 	ldr	r2, .L651+284
 	str	r5, [sp, #4]
 	ldr	r5, .L651+124
 	mov	r1, r2
-	.loc 3 374 0
 	ldrh	r3, [r8]
-	.loc 3 373 0
 	str	r0, [r1, #28]!
-.LVL764:
-	.loc 3 375 0
 	ldrh	r0, [r4]
 	ldr	r8, .L651+140
 	ldr	lr, .L651+148
@@ -7755,213 +4767,160 @@ FtlMemInit:
 	lsls	r0, r0, #2
 	str	r5, [sp, #8]
 	ldr	r5, .L654
-	.loc 3 374 0
 	str	r3, [sp]
 	mov	r4, r0
 	movs	r3, #1
 	str	r5, [sp, #12]
-.LVL765:
 .L551:
-	.loc 3 374 0 is_stmt 0 discriminator 1
 	ldr	r5, [sp]
 	cmp	r3, r5
 	bcc	.L552
 	add	r3, r2, r3, lsl #2
-.LVL766:
 	ldr	r1, .L654+4
-	.loc 3 380 0 is_stmt 1
 	movs	r0, #0
 	adds	r3, r3, #24
 .L553:
-	.loc 3 378 0 discriminator 1
 	cmp	r1, r3
 	bne	.L554
-	.loc 3 384 0
 	ldr	r3, .L654+8
 	ldr	r3, [r3]
 	cbnz	r3, .L555
 .L557:
-	.loc 3 386 0
 	ldr	r1, .L654+12
 	ldr	r0, .L654+16
 	bl	printf
-.LVL767:
-	.loc 3 387 0
 	mov	r0, #-1
 .L550:
-	.loc 3 485 0
 	add	sp, sp, #16
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL768:
 .L552:
-	.cfi_restore_state
-	.loc 3 375 0 discriminator 3
 	ldr	r5, [r2, #28]
-	.loc 3 374 0 discriminator 3
 	adds	r3, r3, #1
-.LVL769:
-	.loc 3 375 0 discriminator 3
 	add	r5, r5, r4
 	add	r4, r4, r0
 	str	r5, [r1, #4]!
 	b	.L551
-.LVL770:
 .L554:
-	.loc 3 380 0 discriminator 2
 	str	r0, [r3, #4]!
 	b	.L553
 .L555:
-	.loc 3 389 0
 	ldr	r3, .L654+20
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 394 0
 	ldr	r3, .L654+24
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 399 0
 	ldr	r3, .L654+28
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 405 0
 	ldr	r3, .L654+32
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 410 0
 	ldr	r3, .L654+36
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 415 0
 	ldr	r3, .L654+40
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 420 0
 	ldr	r3, [r2, #28]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 426 0
 	ldr	r3, .L654+44
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 431 0
 	ldr	r3, .L654+48
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 431 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #4]
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 436 0 is_stmt 1
 	ldr	r3, [sp, #8]
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 436 0 is_stmt 0 discriminator 1
 	ldr	r3, [fp]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 436 0 discriminator 2
 	ldr	r3, [r10]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 436 0 discriminator 3
 	ldr	r3, [r8]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 436 0 discriminator 4
 	ldr	r3, [sp, #12]
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 441 0 is_stmt 1
 	ldr	r3, [lr]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 441 0 is_stmt 0 discriminator 1
 	ldr	r3, [ip]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 441 0 discriminator 2
 	ldr	r3, [r7]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 441 0 discriminator 3
 	ldr	r3, [r6]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 442 0 is_stmt 1
 	ldr	r3, .L654+52
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 442 0 is_stmt 0 discriminator 1
 	ldr	r3, .L654+56
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 442 0 discriminator 2
 	ldr	r3, .L654+60
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 447 0 is_stmt 1
 	ldr	r3, .L654+64
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 447 0 is_stmt 0 discriminator 1
 	ldr	r3, .L654+68
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 447 0 discriminator 2
 	ldr	r3, .L654+72
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 453 0 is_stmt 1
 	ldr	r3, .L654+76
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 453 0 is_stmt 0 discriminator 1
 	ldr	r3, .L654+80
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 459 0 is_stmt 1
 	ldr	r3, .L654+84
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 465 0
 	ldr	r3, .L654+88
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 471 0
 	ldr	r3, .L654+92
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 477 0
 	ldr	r3, .L654+96
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 484 0
 	movs	r0, #0
 	b	.L550
 .L655:
@@ -7993,8 +4952,6 @@ FtlMemInit:
 	.word	.LANCHOR132
 	.word	.LANCHOR133
 	.word	.LANCHOR123
-	.cfi_endproc
-.LFE209:
 	.size	FtlMemInit, .-FtlMemInit
 	.section	.text.FtlBbt2Bitmap,"ax",%progbits
 	.align	1
@@ -8005,77 +4962,46 @@ FtlMemInit:
 	.fpu softvfp
 	.type	FtlBbt2Bitmap, %function
 FtlBbt2Bitmap:
-.LFB228:
-	.loc 4 66 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL771:
-	.loc 4 69 0
 	ldr	r3, .L662
-	.loc 4 66 0
 	push	{r4, r5, r6, r7, r8, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 4, -24
-	.cfi_offset 5, -20
-	.cfi_offset 6, -16
-	.cfi_offset 7, -12
-	.cfi_offset 8, -8
-	.cfi_offset 14, -4
-	.loc 4 66 0
 	mov	r5, r0
-	.loc 4 74 0
 	ldr	r7, .L662+4
-	.loc 4 66 0
 	mov	r6, r1
 	subs	r4, r5, #2
 	addw	r5, r5, #1022
-	.loc 4 69 0
 	ldrh	r2, [r3]
 	movs	r1, #0
-.LVL772:
-	.loc 4 74 0
 	ldr	r8, .L662+12
-	.loc 4 69 0
 	mov	r0, r6
-.LVL773:
 	lsls	r2, r2, #2
 	bl	ftl_memset
-.LVL774:
 .L659:
-	.loc 4 72 0
 	ldrh	r3, [r4, #2]
 	movw	r2, #65535
 	cmp	r3, r2
 	beq	.L656
-	.loc 4 74 0
 	ldrh	r2, [r7]
 	cmp	r2, r3
 	bhi	.L658
-	.loc 4 74 0 is_stmt 0 discriminator 1
 	movs	r2, #74
 	mov	r1, r8
 	ldr	r0, .L662+8
 	bl	printf
-.LVL775:
 .L658:
-	.loc 4 75 0 is_stmt 1 discriminator 2
 	ldrh	r3, [r4, #2]!
 	movs	r2, #1
-	.loc 4 70 0 discriminator 2
 	cmp	r5, r4
-	.loc 4 75 0 discriminator 2
 	lsr	r1, r3, #5
 	and	r3, r3, #31
 	lsl	r3, r2, r3
 	ldr	r2, [r6, r1, lsl #2]
 	orr	r2, r2, r3
 	str	r2, [r6, r1, lsl #2]
-	.loc 4 70 0 discriminator 2
 	bne	.L659
 .L656:
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL776:
 .L663:
 	.align	2
 .L662:
@@ -8083,8 +5009,6 @@ FtlBbt2Bitmap:
 	.word	.LANCHOR17
 	.word	.LC1
 	.word	.LANCHOR139
-	.cfi_endproc
-.LFE228:
 	.size	FtlBbt2Bitmap, .-FtlBbt2Bitmap
 	.section	.text.FtlBbtMemInit,"ax",%progbits
 	.align	1
@@ -8095,33 +5019,22 @@ FtlBbt2Bitmap:
 	.fpu softvfp
 	.type	FtlBbtMemInit, %function
 FtlBbtMemInit:
-.LFB230:
-	.loc 4 149 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	.loc 4 150 0
 	ldr	r0, .L665
 	movw	r3, #65535
-	.loc 4 152 0
 	movs	r2, #16
 	movs	r1, #255
-	.loc 4 150 0
 	strh	r3, [r0]	@ movhi
-	.loc 4 151 0
 	movs	r3, #0
 	strh	r3, [r0, #6]	@ movhi
-	.loc 4 152 0
 	adds	r0, r0, #12
 	b	ftl_memset
-.LVL777:
 .L666:
 	.align	2
 .L665:
 	.word	.LANCHOR37
-	.cfi_endproc
-.LFE230:
 	.size	FtlBbtMemInit, .-FtlBbtMemInit
 	.section	.text.FtlFreeSysBlkQueueInit,"ax",%progbits
 	.align	1
@@ -8132,47 +5045,25 @@ FtlBbtMemInit:
 	.fpu softvfp
 	.type	FtlFreeSysBlkQueueInit, %function
 FtlFreeSysBlkQueueInit:
-.LFB240:
-	.loc 2 76 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL778:
-	.loc 2 79 0
 	ldr	r3, .L668
-	.loc 2 83 0
 	mov	r2, #2048
-	.loc 2 76 0
 	push	{r4, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 4, -8
-	.cfi_offset 14, -4
-	.loc 2 79 0
 	movs	r4, #0
-	.loc 2 83 0
 	mov	r1, r4
-	.loc 2 79 0
 	strh	r4, [r3, #2]	@ movhi
-	.loc 2 80 0
 	strh	r4, [r3, #4]	@ movhi
-	.loc 2 81 0
 	strh	r4, [r3, #6]	@ movhi
-	.loc 2 82 0
 	strh	r0, [r3], #8	@ movhi
-	.loc 2 83 0
 	mov	r0, r3
-.LVL779:
 	bl	ftl_memset
-.LVL780:
-	.loc 2 85 0
 	mov	r0, r4
 	pop	{r4, pc}
 .L669:
 	.align	2
 .L668:
 	.word	.LANCHOR38
-	.cfi_endproc
-.LFE240:
 	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
 	.section	.text.load_l2p_region,"ax",%progbits
 	.align	1
@@ -8183,53 +5074,28 @@ FtlFreeSysBlkQueueInit:
 	.fpu softvfp
 	.type	load_l2p_region, %function
 load_l2p_region:
-.LFB256:
-	.loc 2 488 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL781:
-	.loc 2 492 0
 	ldr	r3, .L676
-	.loc 2 488 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 488 0
 	mov	r5, r0
 	mov	r10, r1
-	.loc 2 492 0
 	ldrh	r2, [r3]
 	str	r3, [sp, #4]
 	cmp	r2, r0
 	bcs	.L671
-	.loc 2 492 0 is_stmt 0 discriminator 1
 	mov	r2, #492
 	ldr	r1, .L676+4
-.LVL782:
 	ldr	r0, .L676+8
-.LVL783:
 	bl	printf
-.LVL784:
 .L671:
-	.loc 2 493 0 is_stmt 1
 	ldr	fp, .L676+40
 	movs	r4, #12
 	ldr	r7, .L676+12
 	ldr	r3, [fp]
 	ldr	r8, [r3, r5, lsl #2]
-.LVL785:
-	.loc 2 495 0
 	cmp	r8, #0
 	bne	.L672
-	.loc 2 496 0
 	mul	r4, r4, r10
 	ldr	r2, [r7]
 	movs	r1, #255
@@ -8238,96 +5104,63 @@ load_l2p_region:
 	ldr	r0, [r0, #8]
 	ldrh	r2, [r2]
 	bl	ftl_memset
-.LVL786:
-	.loc 2 497 0
 	ldr	r2, [r7]
 	adds	r1, r2, r4
 	strh	r5, [r2, r4]	@ movhi
-	.loc 2 498 0
 	str	r8, [r1, #4]
 .L673:
-	.loc 2 519 0
 	movs	r0, #0
 	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL787:
 .L672:
-	.cfi_restore_state
-	.loc 2 502 0
 	mul	r4, r4, r10
 	ldr	r2, [r7]
-	.loc 2 501 0
 	ldr	r6, .L676+20
-	.loc 2 502 0
 	add	r2, r2, r4
-	.loc 2 504 0
 	mov	r0, r6
-	.loc 2 502 0
 	ldr	r2, [r2, #8]
-	.loc 2 501 0
 	str	r8, [r6, #4]
-	.loc 2 502 0
 	str	r2, [r6, #8]
-	.loc 2 503 0
 	ldr	r2, .L676+24
 	ldr	r2, [r2]
 	str	r2, [r6, #12]
-	.loc 2 504 0
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL788:
-	.loc 2 505 0
 	ldr	r10, [r6, #12]
-.LVL789:
-	.loc 2 507 0
 	ldrh	r2, [r10, #8]
 	cmp	r2, r5
 	beq	.L674
-	.loc 2 508 0
 	mov	r2, r8
 	mov	r1, r5
 	ldr	r0, .L676+28
 	bl	printf
-.LVL790:
-	.loc 2 509 0
 	movs	r3, #4
 	ldr	r1, [r6, #12]
 	mov	r2, r3
 	ldr	r0, .L676+32
 	bl	rknand_print_hex
-.LVL791:
-	.loc 2 510 0
 	ldr	r3, [sp, #4]
 	movs	r2, #4
 	ldr	r1, [fp]
 	ldr	r0, .L676+36
 	ldrh	r3, [r3]
 	bl	rknand_print_hex
-.LVL792:
 .L674:
-	.loc 2 513 0
 	ldrh	r3, [r10, #8]
 	cmp	r3, r5
 	beq	.L675
-	.loc 2 513 0 is_stmt 0 discriminator 1
 	movw	r2, #513
 	ldr	r1, .L676+4
 	ldr	r0, .L676+8
 	bl	printf
-.LVL793:
 .L675:
-	.loc 2 516 0 is_stmt 1
 	ldr	r3, [r7]
 	movs	r1, #0
 	adds	r2, r3, r4
 	str	r1, [r2, #4]
-	.loc 2 517 0
 	strh	r5, [r3, r4]	@ movhi
-	.loc 2 518 0
 	b	.L673
 .L677:
 	.align	2
@@ -8343,8 +5176,6 @@ load_l2p_region:
 	.word	.LC87
 	.word	.LC88
 	.word	.LANCHOR134
-	.cfi_endproc
-.LFE256:
 	.size	load_l2p_region, .-load_l2p_region
 	.section	.text.ftl_free_no_use_map_blk,"ax",%progbits
 	.align	1
@@ -8355,169 +5186,96 @@ load_l2p_region:
 	.fpu softvfp
 	.type	ftl_free_no_use_map_blk, %function
 ftl_free_no_use_map_blk:
-.LFB257:
-	.loc 2 522 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL794:
-	.loc 2 531 0
 	ldrh	r2, [r0, #10]
-	.loc 2 522 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 522 0
 	mov	r4, r0
-	.loc 2 525 0
 	ldr	r5, [r0, #20]
-	.loc 2 531 0
 	movs	r1, #0
-	.loc 2 523 0
 	ldr	r10, [r0, #12]
-.LVL795:
-	.loc 2 531 0
 	lsls	r2, r2, #1
-	.loc 2 524 0
 	ldr	r6, [r0, #24]
-.LVL796:
-	.loc 2 531 0
 	mov	r0, r5
-.LVL797:
 	bl	ftl_memset
-.LVL798:
-	.loc 2 532 0
 	movs	r3, #0
-.LVL799:
 .L679:
-	.loc 2 532 0 is_stmt 0 discriminator 1
 	ldrh	r1, [r4, #6]
 	uxth	r2, r3
 	cmp	r1, r2
 	bhi	.L683
-	.loc 2 540 0 is_stmt 1
 	ldrh	r3, [r5]
-.LVL800:
-	.loc 2 543 0
 	movs	r6, #0
-.LVL801:
-	.loc 2 544 0
 	ldr	r2, .L692
-.LVL802:
-	.loc 2 541 0
 	mov	fp, r6
-.LVL803:
 .L684:
-	.loc 2 543 0 discriminator 1
 	ldrh	r0, [r4, #10]
 	uxth	r1, r6
-.LVL804:
 	cmp	r0, r1
 	bhi	.L688
-	.loc 2 559 0
 	mov	r0, fp
 	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL805:
 .L683:
-	.cfi_restore_state
-	.loc 2 533 0
 	uxth	r2, r3
 	ldr	r1, [r6, r2, lsl #2]
-	.loc 2 534 0
 	movs	r2, #0
-	.loc 2 533 0
 	ubfx	r1, r1, #10, #16
-.LVL806:
 .L680:
-	.loc 2 534 0 discriminator 1
 	ldrh	r7, [r4, #10]
 	uxth	r0, r2
 	cmp	r7, r0
 	bhi	.L682
-.LVL807:
 	adds	r3, r3, #1
-.LVL808:
 	b	.L679
-.LVL809:
 .L682:
-	.loc 2 535 0
 	uxth	r0, r2
 	adds	r2, r2, #1
-.LVL810:
 	ldrh	r7, [r10, r0, lsl #1]
 	cmp	r7, r1
-	.loc 2 536 0
 	ittt	eq
 	ldrheq	r7, [r5, r0, lsl #1]
 	addeq	r7, r7, #1
 	strheq	r7, [r5, r0, lsl #1]	@ movhi
-.LVL811:
 	b	.L680
-.LVL812:
 .L688:
-	.loc 2 544 0
 	ldrh	r0, [r4]
 	uxth	r7, r6
 	cmp	r0, r1
 	bne	.L685
-	.loc 2 544 0 is_stmt 0 discriminator 1
 	ldrh	r0, [r2]
 	ldrh	ip, [r4, #2]
 	cmp	ip, r0
-	.loc 2 545 0 is_stmt 1 discriminator 1
 	it	cc
 	strhcc	r0, [r5, r7, lsl #1]	@ movhi
 .L685:
-	.loc 2 546 0
 	ldrh	r8, [r5, r7, lsl #1]
 	cmp	r3, r8
 	itt	hi
 	movhi	fp, r1
 	movhi	r3, r8
-.LVL813:
-	.loc 2 550 0
 	cmp	r8, #0
 	bne	.L687
-	.loc 2 550 0 is_stmt 0 discriminator 1
 	ldrh	r0, [r10, r7, lsl #1]
 	cbz	r0, .L687
-	.loc 2 552 0 is_stmt 1
 	movs	r1, #1
-.LVL814:
 	str	r2, [sp, #4]
 	str	r3, [sp]
 	bl	FtlFreeSysBlkQueueIn
-.LVL815:
-	.loc 2 553 0
 	strh	r8, [r10, r7, lsl #1]	@ movhi
-	.loc 2 554 0
 	ldr	r2, [sp, #4]
 	ldrh	r1, [r4, #8]
 	ldr	r3, [sp]
 	subs	r1, r1, #1
 	strh	r1, [r4, #8]	@ movhi
-.LVL816:
 .L687:
 	adds	r6, r6, #1
-.LVL817:
 	b	.L684
 .L693:
 	.align	2
 .L692:
 	.word	.LANCHOR20
-	.cfi_endproc
-.LFE257:
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.section	.text.Ftl_write_map_blk_to_last_page,"ax",%progbits
 	.align	1
@@ -8528,170 +5286,92 @@ ftl_free_no_use_map_blk:
 	.fpu softvfp
 	.type	Ftl_write_map_blk_to_last_page, %function
 Ftl_write_map_blk_to_last_page:
-.LFB260:
-	.loc 2 632 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL818:
 	push	{r3, r4, r5, r6, r7, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 3, -24
-	.cfi_offset 4, -20
-	.cfi_offset 5, -16
-	.cfi_offset 6, -12
-	.cfi_offset 7, -8
-	.cfi_offset 14, -4
-	.loc 2 640 0
 	movw	r2, #65535
 	ldrh	r3, [r0]
-	.loc 2 632 0
 	mov	r4, r0
-	.loc 2 635 0
 	ldr	r5, [r0, #12]
-.LVL819:
-	.loc 2 640 0
 	cmp	r3, r2
 	bne	.L695
-	.loc 2 641 0
 	ldrh	r3, [r0, #8]
 	cbz	r3, .L696
-	.loc 2 641 0 is_stmt 0 discriminator 1
 	movw	r2, #641
 	ldr	r1, .L704
 	ldr	r0, .L704+4
-.LVL820:
 	bl	printf
-.LVL821:
 .L696:
-	.loc 2 642 0 is_stmt 1
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	.loc 2 643 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL822:
-	.loc 2 644 0
 	movs	r3, #0
-	.loc 2 643 0
 	strh	r0, [r5]	@ movhi
-	.loc 2 644 0
 	strh	r3, [r4, #2]	@ movhi
-	.loc 2 645 0
 	strh	r3, [r4]	@ movhi
-	.loc 2 646 0
 	ldr	r3, [r4, #28]
 	adds	r3, r3, #1
 	str	r3, [r4, #28]
-.LVL823:
 .L697:
-	.loc 2 677 0
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.LVL824:
 .L695:
-	.loc 2 650 0
 	ldrh	r5, [r5, r3, lsl #1]
-.LVL825:
-	.loc 2 661 0
 	movs	r1, #255
-	.loc 2 651 0
 	ldrh	r3, [r0, #2]
 	ldr	r2, .L704+8
-	.loc 2 652 0
 	ldr	r7, .L704+12
-	.loc 2 636 0
 	ldr	r6, [r0, #24]
-	.loc 2 651 0
 	orr	r3, r3, r5, lsl #10
-	.loc 2 652 0
 	ldr	r0, [r7]
-.LVL826:
-	.loc 2 651 0
 	str	r3, [r2, #4]
-	.loc 2 653 0
 	ldr	r3, .L704+16
-	.loc 2 652 0
 	str	r0, [r2, #8]
-	.loc 2 653 0
 	ldr	r3, [r3]
 	str	r3, [r2, #12]
-.LVL827:
-	.loc 2 656 0
 	ldr	r2, [r4, #28]
 	str	r2, [r3, #4]
-	.loc 2 657 0
 	movw	r2, #64245
 	strh	r2, [r3, #8]	@ movhi
-	.loc 2 658 0
 	ldrh	r2, [r4, #4]
-	.loc 2 659 0
 	strh	r5, [r3, #2]	@ movhi
-	.loc 2 658 0
 	strh	r2, [r3]	@ movhi
-	.loc 2 661 0
 	ldr	r3, .L704+20
-.LVL828:
 	ldrh	r2, [r3]
 	lsls	r2, r2, #3
 	bl	ftl_memset
-.LVL829:
-	.loc 2 663 0
 	ldrh	ip, [r4, #6]
 	movs	r3, #0
-	.loc 2 666 0
 	ldr	r1, [r7]
-	.loc 2 662 0
 	mov	r2, r3
-.LVL830:
 .L698:
-	.loc 2 663 0 discriminator 1
 	uxth	r0, r3
 	cmp	ip, r0
 	bhi	.L700
-	.loc 2 670 0
 	movs	r2, #1
-.LVL831:
 	movs	r3, #0
-.LVL832:
 	mov	r1, r2
 	ldr	r0, .L704+8
-.LVL833:
 	bl	FlashProgPages
-.LVL834:
-	.loc 2 671 0
 	ldrh	r3, [r4, #2]
-	.loc 2 675 0
 	mov	r0, r4
-	.loc 2 671 0
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
-	.loc 2 675 0
 	bl	ftl_map_blk_gc
-.LVL835:
-	.loc 2 676 0
 	b	.L697
-.LVL836:
 .L700:
-	.loc 2 664 0
 	ldr	r0, [r6, r3, lsl #2]
 	cmp	r5, r0, lsr #10
 	bne	.L699
-	.loc 2 665 0
 	adds	r2, r2, #1
-.LVL837:
 	uxth	r2, r2
-.LVL838:
-	.loc 2 666 0
 	str	r3, [r1, r2, lsl #3]
-	.loc 2 667 0
 	add	r7, r1, r2, lsl #3
 	ldr	r0, [r6, r3, lsl #2]
 	str	r0, [r7, #4]
 .L699:
-.LVL839:
 	adds	r3, r3, #1
-.LVL840:
 	b	.L698
 .L705:
 	.align	2
@@ -8702,8 +5382,6 @@ Ftl_write_map_blk_to_last_page:
 	.word	.LANCHOR107
 	.word	.LANCHOR108
 	.word	.LANCHOR20
-	.cfi_endproc
-.LFE260:
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
 	.section	.text.FtlMapWritePage,"ax",%progbits
 	.align	1
@@ -8714,205 +5392,120 @@ Ftl_write_map_blk_to_last_page:
 	.fpu softvfp
 	.type	FtlMapWritePage, %function
 FtlMapWritePage:
-.LFB261:
-	.loc 2 680 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL841:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 680 0
 	mov	r4, r0
-	.loc 2 687 0
 	ldr	r8, .L725+28
-	.loc 2 680 0
 	mov	r7, r1
-	.loc 2 683 0
 	movs	r6, #0
-	.loc 2 680 0
 	str	r2, [sp, #4]
 	mov	fp, r8
-.LVL842:
 .L707:
-	.loc 2 686 0
 	ldr	r2, .L725
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
-	.loc 2 687 0
 	ldrh	r3, [r8]
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
 	cmp	r2, r3
 	bge	.L708
-	.loc 2 687 0 is_stmt 0 discriminator 1
 	ldrh	r2, [r4]
 	movw	r3, #65535
 	cmp	r2, r3
 	bne	.L709
 .L708:
-	.loc 2 688 0 is_stmt 1
 	mov	r0, r4
 	bl	Ftl_write_map_blk_to_last_page
-.LVL843:
 .L709:
-	.loc 2 699 0
 	ldrh	r2, [r4]
 	ldr	r3, [r4, #12]
 	ldrh	r3, [r3, r2, lsl #1]
 	cbnz	r3, .L710
-	.loc 2 699 0 is_stmt 0 discriminator 1
 	movw	r2, #699
 	ldr	r1, .L725+4
 	ldr	r0, .L725+8
 	bl	printf
-.LVL844:
 .L710:
-	.loc 2 700 0 is_stmt 1
 	ldrh	r2, [r4]
 	ldrh	r3, [r4, #10]
 	cmp	r2, r3
 	bcc	.L711
-	.loc 2 700 0 is_stmt 0 discriminator 1
 	mov	r2, #700
 	ldr	r1, .L725+4
 	ldr	r0, .L725+8
 	bl	printf
-.LVL845:
 .L711:
-	.loc 2 701 0 is_stmt 1
 	ldrh	r2, [r4]
-	.loc 2 707 0
 	movs	r1, #0
-	.loc 2 701 0
 	ldr	r3, [r4, #12]
-	.loc 2 703 0
 	ldr	r5, .L725+12
-	.loc 2 701 0
 	ldrh	r10, [r3, r2, lsl #1]
-.LVL846:
-	.loc 2 703 0
 	ldrh	r2, [r4, #2]
-	.loc 2 704 0
 	ldr	r3, [sp, #4]
-	.loc 2 703 0
 	orr	r2, r2, r10, lsl #10
-	.loc 2 704 0
 	str	r3, [r5, #8]
-	.loc 2 703 0
 	str	r2, [r5, #4]
-	.loc 2 705 0
 	ldr	r2, .L725+16
 	ldr	r0, [r2]
-	.loc 2 707 0
 	movs	r2, #16
-	.loc 2 705 0
 	str	r0, [r5, #12]
-	.loc 2 707 0
 	bl	ftl_memset
-.LVL847:
-	.loc 2 708 0
 	ldr	r2, [r5, #12]
-.LVL848:
-	.loc 2 713 0
 	movs	r3, #1
-	.loc 2 709 0
 	ldr	r1, [r4, #28]
-	.loc 2 713 0
 	mov	r0, r5
-	.loc 2 710 0
 	strh	r7, [r2, #8]	@ movhi
-	.loc 2 709 0
 	str	r1, [r2, #4]
-	.loc 2 711 0
 	ldrh	r1, [r4, #4]
-	.loc 2 712 0
 	strh	r10, [r2, #2]	@ movhi
-	.loc 2 711 0
 	strh	r1, [r2]	@ movhi
-	.loc 2 713 0
 	mov	r2, r3
-.LVL849:
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL850:
-	.loc 2 714 0
 	ldrh	r2, [r4, #2]
-	.loc 2 716 0
 	ldr	r3, [r5]
-	.loc 2 714 0
 	adds	r2, r2, #1
 	uxth	r2, r2
-	.loc 2 716 0
 	adds	r3, r3, #1
-	.loc 2 714 0
 	strh	r2, [r4, #2]	@ movhi
-	.loc 2 716 0
 	bne	.L712
-	.loc 2 717 0
 	ldr	r1, [r5, #4]
-	.loc 2 718 0
 	adds	r6, r6, #1
-.LVL851:
-	.loc 2 717 0
 	ldr	r0, .L725+20
-	.loc 2 718 0
 	uxth	r6, r6
-	.loc 2 717 0
 	bl	printf
-.LVL852:
-	.loc 2 719 0
 	ldrh	r2, [r4, #2]
 	cmp	r2, #2
-	.loc 2 720 0
 	ittt	ls
 	ldrhls	r2, [fp]
 	addls	r2, r2, #-1
 	strhls	r2, [r4, #2]	@ movhi
-	.loc 2 722 0
 	cmp	r6, #3
 	bls	.L714
-	.loc 2 723 0
 	mov	r2, r6
 	ldr	r1, [r5, #4]
 	ldr	r0, .L725+24
 	bl	printf
-.LVL853:
 .L715:
 	b	.L715
 .L714:
-	.loc 2 727 0
 	ldr	r3, [r4, #32]
 	cmp	r3, #0
 	beq	.L707
 .L724:
 	b	.L724
 .L712:
-	.loc 2 731 0
 	cmp	r2, #1
 	beq	.L707
-	.loc 2 734 0
 	ldr	r2, [r5, #4]
-	.loc 2 736 0
 	movs	r0, #0
-	.loc 2 734 0
 	ldr	r3, [r4, #24]
 	str	r2, [r3, r7, lsl #2]
-	.loc 2 736 0
 	add	sp, sp, #8
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL854:
 .L726:
 	.align	2
 .L725:
@@ -8924,8 +5517,6 @@ FtlMapWritePage:
 	.word	.LC89
 	.word	.LC90
 	.word	.LANCHOR20
-	.cfi_endproc
-.LFE261:
 	.size	FtlMapWritePage, .-FtlMapWritePage
 	.section	.text.ftl_map_blk_gc,"ax",%progbits
 	.align	1
@@ -8936,179 +5527,104 @@ FtlMapWritePage:
 	.fpu softvfp
 	.type	ftl_map_blk_gc, %function
 ftl_map_blk_gc:
-.LFB259:
-	.loc 2 586 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL855:
-	.loc 2 591 0
 	ldr	r3, [r0, #24]
-	.loc 2 586 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 586 0
 	mov	r4, r0
-	.loc 2 590 0
 	ldr	r5, [r0, #12]
-.LVL856:
-	.loc 2 591 0
 	str	r3, [sp]
-.LVL857:
-	.loc 2 594 0
 	bl	ftl_free_no_use_map_blk
-.LVL858:
-	.loc 2 596 0
 	ldrh	r3, [r4, #10]
 	ldrh	r2, [r4, #8]
 	subs	r3, r3, #4
 	cmp	r2, r3
 	blt	.L728
-	.loc 2 597 0
 	uxth	r0, r0
 	ldrh	r7, [r5, r0, lsl #1]
-.LVL859:
-	.loc 2 598 0
 	cbz	r7, .L728
-	.loc 2 598 0 is_stmt 0 discriminator 1
 	ldr	r3, [r4, #32]
 	cbnz	r3, .L728
-	.loc 2 599 0 is_stmt 1
 	movs	r2, #1
 	str	r2, [r4, #32]
-	.loc 2 600 0
 	strh	r3, [r5, r0, lsl #1]	@ movhi
-	.loc 2 601 0
 	ldrh	r3, [r4, #8]
-	.loc 2 602 0
 	ldrh	r2, [r4, #2]
-	.loc 2 601 0
 	subs	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	.loc 2 602 0
 	ldr	r3, .L739
 	ldrh	r3, [r3]
 	cmp	r2, r3
 	bcc	.L729
-	.loc 2 603 0
 	mov	r0, r4
-.LVL860:
 	bl	ftl_map_blk_alloc_new_blk
-.LVL861:
 .L729:
-	.loc 2 607 0 discriminator 1
 	ldr	r5, .L739+4
-.LVL862:
-	.loc 2 586 0 discriminator 1
 	movs	r6, #0
-	.loc 2 607 0 discriminator 1
 	ldr	fp, .L739+20
 .L730:
-	.loc 2 605 0 discriminator 1
 	ldrh	r3, [r4, #6]
 	uxth	r10, r6
-.LVL863:
 	cmp	r3, r10
 	bhi	.L734
-	.loc 2 621 0
 	movs	r1, #1
 	mov	r0, r7
 	bl	FtlFreeSysBlkQueueIn
-.LVL864:
-	.loc 2 622 0
 	movs	r3, #0
 	str	r3, [r4, #32]
-.LVL865:
 .L728:
-	.loc 2 626 0
 	ldr	r3, .L739
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
 	bcc	.L735
-	.loc 2 627 0
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.LVL866:
 .L735:
-	.loc 2 629 0
 	movs	r0, #0
 	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-.LVL867:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL868:
 .L734:
-	.cfi_restore_state
-	.loc 2 606 0
 	ldr	r3, [sp]
 	uxth	r8, r6
 	ldr	r2, [r3, r8, lsl #2]
 	cmp	r7, r2, lsr #10
 	bne	.L731
-	.loc 2 607 0
 	ldr	r3, [fp]
-	.loc 2 609 0
 	str	r2, [r5, #4]
-.LVL869:
-	.loc 2 611 0
 	movs	r2, #1
 	mov	r1, r2
 	ldr	r0, .L739+4
-	.loc 2 607 0
 	str	r3, [r5, #8]
-	.loc 2 608 0
 	ldr	r3, .L739+8
 	ldr	r3, [r3]
 	str	r3, [r5, #12]
 	str	r3, [sp, #4]
-.LVL870:
-	.loc 2 611 0
 	bl	FlashReadPages
-.LVL871:
-	.loc 2 613 0
 	ldr	r3, [sp, #4]
 	ldrh	r3, [r3, #8]
 	cmp	r3, r10
 	beq	.L732
-	.loc 2 613 0 is_stmt 0 discriminator 1
 	movw	r2, #613
 	ldr	r1, .L739+12
 	ldr	r0, .L739+16
 	bl	printf
-.LVL872:
 .L732:
-	.loc 2 614 0 is_stmt 1
 	ldr	r3, [r5]
 	adds	r3, r3, #1
 	bne	.L733
-	.loc 2 615 0
 	ldr	r2, [sp]
 	movs	r3, #0
 	str	r3, [r2, r8, lsl #2]
 .L731:
-.LVL873:
 	adds	r6, r6, #1
-.LVL874:
 	b	.L730
-.LVL875:
 .L733:
-	.loc 2 617 0
 	ldr	r2, [r5, #8]
 	mov	r1, r8
 	mov	r0, r4
 	bl	FtlMapWritePage
-.LVL876:
 	b	.L731
 .L740:
 	.align	2
@@ -9119,8 +5635,6 @@ ftl_map_blk_gc:
 	.word	.LANCHOR143
 	.word	.LC1
 	.word	.LANCHOR123
-	.cfi_endproc
-.LFE259:
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
 	.section	.text.flush_l2p_region,"ax",%progbits
 	.align	1
@@ -9131,53 +5645,30 @@ ftl_map_blk_gc:
 	.fpu softvfp
 	.type	flush_l2p_region, %function
 flush_l2p_region:
-.LFB262:
-	.loc 2 739 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL877:
 	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 2 742 0
 	movs	r4, #12
 	ldr	r5, .L742
 	muls	r4, r0, r4
-	.loc 2 743 0
 	ldr	r0, .L742+4
-.LVL878:
-	.loc 2 742 0
 	ldr	r3, [r5]
 	adds	r2, r3, r4
-.LVL879:
-	.loc 2 743 0
 	ldrh	r1, [r3, r4]
-.LVL880:
 	ldr	r2, [r2, #8]
 	bl	FtlMapWritePage
-.LVL881:
-	.loc 2 744 0
 	ldr	r3, [r5]
-	.loc 2 746 0
 	movs	r0, #0
-	.loc 2 744 0
 	add	r4, r4, r3
 	ldr	r3, [r4, #4]
 	bic	r3, r3, #-2147483648
 	str	r3, [r4, #4]
-	.loc 2 746 0
 	pop	{r3, r4, r5, pc}
 .L743:
 	.align	2
 .L742:
 	.word	.LANCHOR55
 	.word	.LANCHOR144
-	.cfi_endproc
-.LFE262:
 	.size	flush_l2p_region, .-flush_l2p_region
 	.section	.text.log2phys,"ax",%progbits
 	.align	1
@@ -9188,159 +5679,92 @@ flush_l2p_region:
 	.fpu softvfp
 	.type	log2phys, %function
 log2phys:
-.LFB265:
-	.loc 2 802 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL882:
-	.loc 2 805 0
 	ldr	r3, .L758
-	.loc 2 802 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 802 0
 	mov	r7, r1
 	mov	r10, r2
-	.loc 2 805 0
 	ldrh	r4, [r3]
 	adds	r3, r4, #7
-	.loc 2 806 0
 	movs	r4, #1
-	.loc 2 805 0
 	lsr	r8, r0, r3
-	.loc 2 806 0
 	lsls	r4, r4, r3
-	.loc 2 808 0
 	ldr	r3, .L758+4
-	.loc 2 806 0
 	subs	r4, r4, #1
-	.loc 2 805 0
 	uxth	r8, r8
-.LVL883:
-	.loc 2 806 0
 	ands	r4, r4, r0
-	.loc 2 808 0
 	ldr	r3, [r3]
-	.loc 2 806 0
 	uxth	r4, r4
-.LVL884:
-	.loc 2 808 0
 	cmp	r0, r3
 	bcc	.L745
-	.loc 2 808 0 is_stmt 0 discriminator 1
 	mov	r2, #808
-.LVL885:
 	ldr	r1, .L758+8
-.LVL886:
 	ldr	r0, .L758+12
-.LVL887:
 	bl	printf
-.LVL888:
 .L745:
-	.loc 2 811 0 is_stmt 1
 	ldr	r6, .L758+16
 	mov	fp, #12
-	.loc 2 810 0
 	ldr	r3, .L758+20
-	.loc 2 811 0
 	ldr	r1, [r6]
-	.loc 2 810 0
 	ldrh	r2, [r3]
 	movs	r3, #0
-.LVL889:
 .L746:
 	uxth	r5, r3
-.LVL890:
-	.loc 2 810 0 is_stmt 0 discriminator 1
 	cmp	r5, r2
 	bcc	.L751
-	.loc 2 825 0 is_stmt 1
 	bl	select_l2p_ram_region
-.LVL891:
-	.loc 2 826 0
 	mul	fp, fp, r0
 	ldr	r3, [r6]
-	.loc 2 825 0
 	mov	r5, r0
-.LVL892:
-	.loc 2 826 0
 	ldrh	r1, [r3, fp]
 	add	r2, r3, fp
 	movw	r3, #65535
 	cmp	r1, r3
 	beq	.L752
-	.loc 2 826 0 is_stmt 0 discriminator 1
 	ldr	r3, [r2, #4]
 	cmp	r3, #0
 	bge	.L752
-	.loc 2 827 0 is_stmt 1
 	bl	flush_l2p_region
-.LVL893:
 .L752:
-	.loc 2 830 0
 	mov	r1, r5
 	mov	r0, r8
 	bl	load_l2p_region
-.LVL894:
-	.loc 2 831 0
 	b	.L747
-.LVL895:
 .L751:
 	adds	r3, r3, #1
-	.loc 2 811 0
 	mla	r0, fp, r3, r1
 	ldrh	r0, [r0, #-12]
 	cmp	r0, r8
 	bne	.L746
-.LVL896:
 .L747:
-	.loc 2 814 0
 	ldr	r2, [r6]
 	movs	r3, #12
 	mla	r3, r3, r5, r2
-	.loc 2 813 0
 	cmp	r10, #0
 	bne	.L748
-	.loc 2 814 0
 	ldr	r3, [r3, #8]
 	ldr	r3, [r3, r4, lsl #2]
 	str	r3, [r7]
 .L749:
-	.loc 2 820 0
 	ldr	r2, [r6]
 	movs	r3, #12
 	mla	r5, r3, r5, r2
-.LVL897:
 	ldr	r3, [r5, #4]
 	adds	r2, r3, #1
 	beq	.L755
-	.loc 2 821 0
 	adds	r3, r3, #1
 	str	r3, [r5, #4]
 .L755:
-	.loc 2 832 0
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL898:
 .L748:
-	.loc 2 816 0
 	ldr	r1, [r7]
 	ldr	r2, [r3, #8]
 	str	r1, [r2, r4, lsl #2]
-	.loc 2 817 0
 	ldr	r2, [r3, #4]
 	orr	r2, r2, #-2147483648
 	str	r2, [r3, #4]
-	.loc 2 818 0
 	ldr	r3, .L758+24
 	strh	r8, [r3]	@ movhi
 	b	.L749
@@ -9354,8 +5778,6 @@ log2phys:
 	.word	.LANCHOR55
 	.word	.LANCHOR33
 	.word	.LANCHOR56
-	.cfi_endproc
-.LFE265:
 	.size	log2phys, .-log2phys
 	.section	.text.FtlReUsePrevPpa,"ax",%progbits
 	.align	1
@@ -9366,139 +5788,75 @@ log2phys:
 	.fpu softvfp
 	.type	FtlReUsePrevPpa, %function
 FtlReUsePrevPpa:
-.LFB283:
-	.loc 2 1677 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL899:
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -24
-	.cfi_offset 5, -20
-	.cfi_offset 6, -16
-	.cfi_offset 7, -12
-	.cfi_offset 8, -8
-	.cfi_offset 14, -4
-	.loc 2 1677 0
 	mov	r6, r0
-	.loc 2 1680 0
 	ldr	r5, .L770
-	.loc 2 1678 0
 	ubfx	r0, r1, #10, #16
-.LVL900:
-	.loc 2 1677 0
 	str	r1, [sp, #4]
-	.loc 2 1678 0
 	bl	P2V_block_in_plane
-.LVL901:
-	.loc 2 1680 0
 	ldr	r2, [r5]
-	.loc 2 1678 0
 	mov	r7, r0
-.LVL902:
-	.loc 2 1680 0
 	ldrh	r3, [r2, r0, lsl #1]
 	cbnz	r3, .L761
-	.loc 2 1681 0
 	ldr	r2, .L770+4
 	ldr	r4, [r2]
 	cmp	r4, #0
 	beq	.L762
-.LBB262:
-	.loc 2 1685 0
 	ldr	r2, .L770+8
-	.loc 2 1693 0
 	movw	lr, #65535
-	.loc 2 1685 0
 	ldr	ip, .L770+24
-	.loc 2 1684 0
 	ldr	r0, .L770+12
-.LVL903:
-	.loc 2 1685 0
 	ldr	r2, [r2]
-	.loc 2 1684 0
 	ldrh	r1, [r0]
-.LVL904:
 	mov	r8, r0
-	.loc 2 1685 0
 	subs	r4, r4, r2
 	asrs	r4, r4, #1
 	mul	r4, ip, r4
-	.loc 2 1693 0
 	mov	ip, #6
-	.loc 2 1685 0
 	uxth	r4, r4
-.LVL905:
 .L763:
-	.loc 2 1686 0 discriminator 1
 	uxth	r0, r3
 	cmp	r1, r0
 	bls	.L762
-	.loc 2 1687 0
 	cmp	r4, r7
 	bne	.L764
-	.loc 2 1688 0
 	mov	r1, r4
-.LVL906:
 	ldr	r0, .L770+4
 	bl	List_remove_node
-.LVL907:
 	ldrh	r3, [r8]
 	cbnz	r3, .L765
-	.loc 2 1688 0 is_stmt 0 discriminator 1
 	mov	r2, #1688
 	ldr	r1, .L770+16
 	ldr	r0, .L770+20
 	bl	printf
-.LVL908:
 .L765:
-	.loc 2 1688 0 discriminator 3
 	ldrh	r3, [r8]
-	.loc 2 1689 0 is_stmt 1 discriminator 3
 	mov	r0, r4
-	.loc 2 1688 0 discriminator 3
 	subs	r3, r3, #1
 	strh	r3, [r8]	@ movhi
-	.loc 2 1689 0 discriminator 3
 	bl	INSERT_DATA_LIST
-.LVL909:
-	.loc 2 1690 0 discriminator 3
 	ldr	r2, [r5]
 	ldrh	r3, [r2, r7, lsl #1]
-.LVL910:
 .L761:
-.LBE262:
-	.loc 2 1699 0
 	adds	r3, r3, #1
 	strh	r3, [r2, r7, lsl #1]	@ movhi
 	b	.L762
-.LVL911:
 .L764:
-.LBB263:
-	.loc 2 1693 0
 	mul	r4, ip, r4
-.LVL912:
 	adds	r3, r3, #1
-.LVL913:
 	ldrh	r4, [r2, r4]
 	cmp	r4, lr
 	bne	.L763
-.LVL914:
 .L762:
-.LBE263:
-	.loc 2 1701 0
 	movs	r2, #1
 	add	r1, sp, #4
 	mov	r0, r6
 	bl	log2phys
-.LVL915:
-	.loc 2 1702 0
 	add	sp, sp, #8
-	.cfi_def_cfa_offset 24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL916:
 .L771:
 	.align	2
 .L770:
@@ -9509,8 +5867,6 @@ FtlReUsePrevPpa:
 	.word	.LANCHOR146
 	.word	.LC1
 	.word	-1431655765
-	.cfi_endproc
-.LFE283:
 	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
 	.section	.text.ftl_scan_all_data,"ax",%progbits
 	.align	1
@@ -9521,107 +5877,61 @@ FtlReUsePrevPpa:
 	.fpu softvfp
 	.type	ftl_scan_all_data, %function
 ftl_scan_all_data:
-.LFB294:
-	.loc 2 2325 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 4, -24
-	.cfi_offset 5, -20
-	.cfi_offset 6, -16
-	.cfi_offset 7, -12
-	.cfi_offset 8, -8
-	.cfi_offset 14, -4
-	.loc 2 2331 0
 	movs	r5, #0
 	ldr	r7, .L786
-	.loc 2 2325 0
 	sub	sp, sp, #32
-	.cfi_def_cfa_offset 56
-	.loc 2 2330 0
 	movs	r1, #0
-	.loc 2 2334 0
 	ldr	r8, .L786+24
-	.loc 2 2330 0
 	ldr	r0, .L786+4
 	bl	printf
-.LVL917:
 .L773:
-	.loc 2 2331 0 discriminator 1
 	ldr	r3, [r7]
 	cmp	r5, r3
 	bcc	.L779
-	.loc 2 2353 0
 	add	sp, sp, #32
-	.cfi_remember_state
-	.cfi_def_cfa_offset 24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL918:
 .L779:
-	.cfi_restore_state
-	.loc 2 2332 0
 	movs	r2, #0
 	add	r1, sp, #28
 	mov	r0, r5
 	bl	log2phys
-.LVL919:
-	.loc 2 2333 0
 	ubfx	r3, r5, #0, #11
 	cbnz	r3, .L774
-	.loc 2 2334 0
 	ldr	r2, [sp, #28]
 	mov	r1, r5
 	mov	r0, r8
 	bl	printf
-.LVL920:
 .L774:
-	.loc 2 2335 0
 	ldr	r3, [sp, #28]
 	adds	r2, r3, #1
 	beq	.L776
-	.loc 2 2336 0
 	ldr	r4, .L786+8
-	.loc 2 2340 0
 	movs	r2, #0
-	.loc 2 2342 0
 	movs	r1, #1
-	.loc 2 2336 0
 	str	r3, [r4, #4]
-	.loc 2 2342 0
 	mov	r0, r4
-	.loc 2 2338 0
 	ldr	r3, .L786+12
-	.loc 2 2337 0
 	str	r5, [r4, #16]
-	.loc 2 2340 0
 	str	r2, [r4]
-	.loc 2 2338 0
 	ldr	r3, [r3]
 	str	r3, [r4, #8]
-	.loc 2 2339 0
 	ldr	r3, .L786+16
 	ldr	r6, [r3]
-.LVL921:
 	str	r6, [r4, #12]
-	.loc 2 2342 0
 	bl	FlashReadPages
-.LVL922:
-	.loc 2 2343 0
 	ldr	r3, [r4]
 	cmp	r3, #256
 	beq	.L777
-	.loc 2 2343 0 is_stmt 0 discriminator 1
 	adds	r3, r3, #1
 	beq	.L777
-	.loc 2 2344 0 is_stmt 1
 	ldr	r3, [r6, #8]
 	cmp	r5, r3
 	beq	.L776
 .L777:
-	.loc 2 2347 0
 	ldr	r2, [r4, #8]
 	ldr	r3, [r4, #12]
 	ldr	r0, .L786+20
@@ -9639,11 +5949,8 @@ ftl_scan_all_data:
 	ldr	r2, [r4, #4]
 	ldr	r3, [r3]
 	bl	printf
-.LVL923:
 .L776:
-	.loc 2 2331 0 discriminator 2
 	adds	r5, r5, #1
-.LVL924:
 	b	.L773
 .L787:
 	.align	2
@@ -9655,8 +5962,6 @@ ftl_scan_all_data:
 	.word	.LANCHOR108
 	.word	.LC93
 	.word	.LC92
-	.cfi_endproc
-.LFE294:
 	.size	ftl_scan_all_data, .-ftl_scan_all_data
 	.section	.text.FtlReadRefresh,"ax",%progbits
 	.align	1
@@ -9667,29 +5972,15 @@ ftl_scan_all_data:
 	.fpu softvfp
 	.type	FtlReadRefresh, %function
 FtlReadRefresh:
-.LFB321:
-	.loc 5 419 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL925:
-	.loc 5 425 0
 	ldr	r3, .L801
-	.loc 5 419 0
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
 	sub	sp, sp, #88
-	.cfi_def_cfa_offset 104
 	mov	r4, r3
-	.loc 5 425 0
 	ldr	r0, [r3, #80]
 	cmp	r0, #0
 	beq	.L789
-	.loc 5 426 0
 	ldr	r6, .L801+4
 	ldr	r0, [r3, #84]
 	ldr	r1, [r6]
@@ -9697,135 +5988,79 @@ FtlReadRefresh:
 	bcs	.L790
 	mov	r5, #2048
 .L795:
-.LVL926:
-.LBB269:
-.LBB270:
-	.loc 5 428 0
 	ldr	r0, [r4, #84]
 	ldr	r3, [r6]
 	cmp	r0, r3
 	bcs	.L792
-	.loc 5 430 0
 	movs	r2, #0
 	mov	r1, sp
 	bl	log2phys
-.LVL927:
-	.loc 5 432 0
 	ldr	r2, [sp]
-	.loc 5 431 0
 	ldr	r3, [r4, #84]
-	.loc 5 432 0
 	adds	r1, r2, #1
-	.loc 5 431 0
 	add	r3, r3, #1
 	str	r3, [r4, #84]
-	.loc 5 432 0
 	beq	.L793
-.LBB271:
-	.loc 5 435 0
 	str	r3, [sp, #20]
-	.loc 5 438 0
 	add	r0, sp, #88
-	.loc 5 436 0
 	ldr	r3, .L801+8
-	.loc 5 439 0
 	movs	r1, #1
-	.loc 5 434 0
 	str	r2, [sp, #8]
-	.loc 5 438 0
 	movs	r2, #0
 	str	r2, [r0, #-84]!
-	.loc 5 436 0
 	str	r3, [sp, #12]
-	.loc 5 437 0
 	add	r3, sp, #24
 	str	r3, [sp, #16]
-	.loc 5 439 0
 	bl	FlashReadPages
-.LVL928:
-	.loc 5 440 0
 	ldr	r3, [sp, #4]
 	cmp	r3, #256
 	bne	.L792
-	.loc 5 442 0
 	ldr	r0, [sp]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL929:
 	bl	FtlGcRefreshBlock
-.LVL930:
 .L792:
-.LBE271:
 	mov	r0, #-1
 .L788:
-.LBE270:
-.LBE269:
-	.loc 5 466 0
 	add	sp, sp, #88
-	.cfi_remember_state
-	.cfi_def_cfa_offset 16
 	@ sp needed
 	pop	{r4, r5, r6, pc}
-.LVL931:
 .L793:
-	.cfi_restore_state
-.LBB273:
-.LBB272:
-	.loc 5 427 0
 	subs	r5, r5, #1
-.LVL932:
 	bne	.L795
 	b	.L792
-.LVL933:
 .L790:
-.LBE272:
-.LBE273:
-	.loc 5 451 0
 	ldr	r2, .L801+12
-	.loc 5 449 0
 	movs	r0, #0
 	str	r0, [r3, #80]
-	.loc 5 450 0
 	str	r0, [r3, #84]
-	.loc 5 451 0
 	ldr	r2, [r2]
 	str	r2, [r3, #76]
 	b	.L788
 .L789:
-.LVL934:
-.LBB274:
-	.loc 5 456 0
 	ldr	r1, [r3, #76]
 	ldr	r3, .L801+12
 	ldr	r5, [r3]
 	add	r3, r5, #1048576
 	cmp	r1, r3
 	bhi	.L798
-	.loc 5 454 0
 	ldr	r3, .L801+16
 	ldr	r2, [r3]
 	mov	r3, #33554432
 	lsrs	r2, r2, #10
 	asrs	r3, r3, r2
-	.loc 5 457 0
 	add	r3, r3, r1
 	cmp	r5, r3
 	bhi	.L798
-	.loc 5 458 0
 	ldr	r3, .L801+20
 	ldrb	r3, [r3, #28]	@ zero_extendqisi2
 	cmp	r3, #0
 	bne	.L788
 .L798:
-	.loc 5 460 0
 	movs	r3, #1
-	.loc 5 461 0
 	movs	r0, #0
-	.loc 5 460 0
 	str	r3, [r4, #80]
-	.loc 5 461 0
 	str	r0, [r4, #84]
-	.loc 5 462 0
 	str	r5, [r4, #76]
 	b	.L788
 .L802:
@@ -9837,9 +6072,6 @@ FtlReadRefresh:
 	.word	.LANCHOR62
 	.word	.LANCHOR76
 	.word	.LANCHOR39
-.LBE274:
-	.cfi_endproc
-.LFE321:
 	.size	FtlReadRefresh, .-FtlReadRefresh
 	.section	.text.FtlMapBlkWriteDump_data,"ax",%progbits
 	.align	1
@@ -9850,94 +6082,44 @@ FtlReadRefresh:
 	.fpu softvfp
 	.type	FtlMapBlkWriteDump_data, %function
 FtlMapBlkWriteDump_data:
-.LFB270:
-	.loc 2 946 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL935:
-	.loc 2 952 0
 	ldr	r3, [r0, #36]
-	.loc 2 946 0
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 2 946 0
 	mov	r6, r0
-	.loc 2 952 0
 	cbz	r3, .L803
-	.loc 2 948 0
 	ldrh	r5, [r0, #6]
-	.loc 2 954 0
 	movs	r3, #0
-	.loc 2 949 0
 	ldr	r2, [r0, #24]
-	.loc 2 954 0
 	str	r3, [r0, #36]
-	.loc 2 948 0
 	subs	r5, r5, #1
-	.loc 2 956 0
 	ldr	r3, .L807
-	.loc 2 957 0
 	ldr	r1, .L807+4
-	.loc 2 979 0
 	uxth	r5, r5
-	.loc 2 956 0
 	ldr	r4, .L807+8
-	.loc 2 979 0
 	ldr	r2, [r2, r5, lsl #2]
-.LVL936:
-	.loc 2 956 0
 	ldr	r0, [r3]
-.LVL937:
-	.loc 2 957 0
 	ldr	r1, [r1]
-	.loc 2 980 0
 	str	r2, [r4, #4]
-	.loc 2 956 0
 	str	r0, [r4, #8]
-	.loc 2 957 0
 	str	r1, [r4, #12]
-	.loc 2 981 0
 	cbz	r2, .L805
-	.loc 2 983 0
 	movs	r2, #1
-.LVL938:
 	mov	r0, r4
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL939:
 .L806:
-	.loc 2 990 0
 	ldr	r2, [r4, #8]
 	mov	r1, r5
 	mov	r0, r6
-	.loc 2 992 0
 	pop	{r4, r5, r6, lr}
-	.cfi_remember_state
-	.cfi_restore 14
-	.cfi_restore 6
-	.cfi_restore 5
-	.cfi_restore 4
-	.cfi_def_cfa_offset 0
-.LVL940:
-	.loc 2 990 0
 	b	FtlMapWritePage
-.LVL941:
 .L805:
-	.cfi_restore_state
-	.loc 2 987 0
 	ldr	r3, .L807+12
 	movs	r1, #255
 	ldrh	r2, [r3]
-.LVL942:
 	bl	ftl_memset
-.LVL943:
 	b	.L806
-.LVL944:
 .L803:
 	pop	{r4, r5, r6, pc}
 .L808:
@@ -9947,8 +6129,6 @@ FtlMapBlkWriteDump_data:
 	.word	.LANCHOR108
 	.word	.LANCHOR106
 	.word	.LANCHOR23
-	.cfi_endproc
-.LFE270:
 	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
 	.section	.text.FtlScanSysBlk,"ax",%progbits
 	.align	1
@@ -9959,288 +6139,183 @@ FtlMapBlkWriteDump_data:
 	.fpu softvfp
 	.type	FtlScanSysBlk, %function
 FtlScanSysBlk:
-.LFB273:
-	.loc 2 1144 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 1150 0
 	movs	r4, #0
-	.loc 2 1152 0
 	ldr	r5, .L889
-	.loc 2 1144 0
 	sub	sp, sp, #32
-	.cfi_def_cfa_offset 64
-	.loc 2 1152 0
 	mov	r1, r4
-	.loc 2 1151 0
 	ldr	r3, .L889+4
-	.loc 2 1152 0
 	ldr	r2, [r5]
-	.loc 2 1150 0
 	ldr	r6, .L889+8
-	.loc 2 1151 0
 	strh	r4, [r3]	@ movhi
-	.loc 2 1152 0
 	ldr	r3, .L889+12
 	lsls	r2, r2, #2
-	.loc 2 1150 0
 	strh	r4, [r6]	@ movhi
-	.loc 2 1154 0
 	ldr	r7, .L889+16
-	.loc 2 1152 0
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL945:
-	.loc 2 1153 0
 	ldr	r2, [r5]
 	mov	r1, r4
 	ldr	r3, .L889+20
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL946:
-	.loc 2 1154 0
 	ldrh	r2, [r7]
 	mov	r1, r4
 	ldr	r3, .L889+24
 	lsls	r2, r2, #2
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL947:
-	.loc 2 1155 0
 	ldrh	r2, [r7]
 	mov	r1, r4
 	ldr	r3, .L889+28
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL948:
-	.loc 2 1156 0
 	movs	r2, #12
 	movs	r1, #255
 	ldr	r0, .L889+32
 	bl	ftl_memset
-.LVL949:
-	.loc 2 1158 0
 	ldr	r3, .L889+36
 	str	r6, [sp, #12]
 	str	r5, [sp, #16]
 	ldrh	r3, [r3]
 	str	r3, [sp, #4]
-.LVL950:
 .L810:
-	.loc 2 1158 0 is_stmt 0 discriminator 1
 	ldr	r3, .L889+40
 	ldr	r2, [sp, #4]
 	ldrh	r3, [r3]
 	cmp	r3, r2
 	bls	.L851
-	.loc 2 1162 0 is_stmt 1 discriminator 1
 	ldr	r3, .L889+44
-	.loc 2 1169 0 discriminator 1
 	movs	r5, #0
 	ldr	r1, .L889+48
 	mov	fp, r5
-	.loc 2 1167 0 discriminator 1
 	movs	r7, #20
-	.loc 2 1162 0 discriminator 1
 	ldrh	r8, [r3]
-	.loc 2 1167 0 discriminator 1
 	ldr	r3, .L889+52
-	.loc 2 1169 0 discriminator 1
 	ldr	r2, [r1]
 	ldr	r1, .L889+56
-	.loc 2 1167 0 discriminator 1
 	ldr	r6, [r3]
-	.loc 2 1168 0 discriminator 1
 	ldr	r3, .L889+60
-	.loc 2 1169 0 discriminator 1
 	str	r2, [sp, #8]
 	ldrh	r10, [r1]
-	.loc 2 1168 0 discriminator 1
 	ldr	r3, [r3]
-	.loc 2 1164 0 discriminator 1
 	ldr	r2, .L889+64
 	b	.L852
-.LVL951:
 .L812:
-	.loc 2 1164 0 is_stmt 0
 	ldrb	r0, [r2, r5]	@ zero_extendqisi2
 	ldr	r1, [sp, #4]
 	str	r3, [sp, #28]
 	str	r2, [sp, #24]
 	bl	V2P_block
-.LVL952:
 	str	r0, [sp, #20]
-.LVL953:
-	.loc 2 1165 0 is_stmt 1
 	bl	FtlBbmIsBadBlock
-.LVL954:
 	ldr	r2, [sp, #24]
 	ldr	r3, [sp, #28]
 	cbnz	r0, .L811
-	.loc 2 1167 0
 	ldr	r1, [sp, #20]
 	mla	r0, r7, fp, r6
-	.loc 2 1169 0
 	ldr	r4, [sp, #8]
-	.loc 2 1167 0
 	lsls	r1, r1, #10
-	.loc 2 1168 0
 	str	r3, [r0, #8]
-	.loc 2 1167 0
 	str	r1, [r0, #4]
-	.loc 2 1169 0
 	mul	r1, r10, fp
 	bic	r1, r1, #3
 	add	r1, r1, r4
 	str	r1, [r0, #12]
-	.loc 2 1170 0
 	add	r1, fp, #1
 	uxth	fp, r1
-.LVL955:
 .L811:
 	adds	r5, r5, #1
-.LVL956:
 .L852:
-	.loc 2 1162 0 discriminator 1
 	uxth	r1, r5
 	cmp	r8, r1
 	bhi	.L812
-	.loc 2 1173 0
 	cmp	fp, #0
 	bne	.L813
-.LVL957:
 .L850:
-	.loc 2 1158 0
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	str	r3, [sp, #4]
-.LVL958:
 	b	.L810
-.LVL959:
 .L813:
-	.loc 2 1177 0
 	movs	r7, #0
-	.loc 2 1176 0
 	movs	r2, #1
 	mov	r1, fp
 	mov	r0, r6
 	bl	FlashReadPages
-.LVL960:
 .L814:
-	.loc 2 1177 0 discriminator 1
 	uxth	r3, r7
 	cmp	fp, r3
 	bls	.L850
-	.loc 2 1178 0
 	ldr	r3, .L889+52
 	mov	r8, #20
 	mul	r8, r8, r7
 	ldr	r3, [r3]
 	add	r2, r3, r8
-	.loc 2 1181 0
 	ldr	r3, [r3, r8]
-	.loc 2 1178 0
 	ldr	r5, [r2, #4]
-	.loc 2 1179 0
 	ldr	r6, [r2, #12]
-	.loc 2 1181 0
 	adds	r3, r3, #1
-	.loc 2 1178 0
 	ubfx	r5, r5, #10, #16
-.LVL961:
-	.loc 2 1181 0
 	bne	.L817
 	mov	r10, #16
 .L819:
-.LVL962:
-	.loc 2 1183 0
 	ldr	r3, .L889+52
-	.loc 2 1184 0
 	movs	r2, #1
 	mov	r1, r2
-	.loc 2 1183 0
 	ldr	r0, [r3]
 	add	r0, r0, r8
 	ldr	r3, [r0, #4]
 	adds	r3, r3, #1
 	str	r3, [r0, #4]
-	.loc 2 1184 0
 	bl	FlashReadPages
-.LVL963:
-	.loc 2 1185 0
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	.loc 2 1186 0
 	ldr	r3, .L889+52
 	ldr	r3, [r3]
-	.loc 2 1185 0
 	bne	.L816
-	.loc 2 1186 0
 	mov	r2, #-1
 	str	r2, [r3, r8]
-	.loc 2 1194 0
 	ldr	r3, .L889+52
 	ldr	r3, [r3]
 	ldr	r3, [r3, r8]
 	cmp	r3, r2
 	bne	.L817
-.LVL964:
 .L818:
-	.loc 2 1336 0
 	movs	r1, #0
 	mov	r0, r5
 	bl	FtlFreeSysBlkQueueIn
-.LVL965:
 	b	.L822
-.LVL966:
 .L816:
-	.loc 2 1188 0
 	ldr	r3, [r3, r8]
 	adds	r3, r3, #1
 	bne	.L817
-.LVL967:
 	add	r10, r10, #-1
-.LVL968:
 	uxth	r10, r10
-	.loc 2 1182 0 discriminator 2
 	cmp	r10, #0
 	bne	.L819
 	b	.L818
 .L817:
-	.loc 2 1196 0
 	ldr	r3, .L889+68
 	ldr	r2, [r3]
 	ldr	r3, [r6, #4]
 	adds	r1, r2, #1
 	beq	.L820
-	.loc 2 1196 0 is_stmt 0 discriminator 1
 	cmp	r2, r3
 	bhi	.L821
 .L820:
-	.loc 2 1198 0 is_stmt 1
 	adds	r2, r3, #1
-	.loc 2 1201 0
 	ittt	ne
 	ldrne	r1, .L889+68
 	addne	r2, r3, #1
 	strne	r2, [r1]
 .L821:
-	.loc 2 1206 0
 	ldrh	r2, [r6]
 	movw	r1, #61604
 	cmp	r2, r1
@@ -10250,11 +6325,8 @@ FtlScanSysBlk:
 	cmp	r2, r3
 	beq	.L825
 .L822:
-.LVL969:
 	adds	r7, r7, #1
-.LVL970:
 	b	.L814
-.LVL971:
 .L824:
 	movw	r3, #61634
 	cmp	r2, r3
@@ -10264,89 +6336,63 @@ FtlScanSysBlk:
 	beq	.L818
 	b	.L822
 .L826:
-	.loc 2 1211 0
 	ldr	r3, .L889+8
 	ldrh	r2, [r3]
 	ldr	r3, .L889
 	ldr	r3, [r3]
 	cmp	r2, r3
 	bls	.L828
-	.loc 2 1211 0 is_stmt 0 discriminator 1
 	movw	r2, #1211
 	ldr	r1, .L889+72
 	ldr	r0, .L889+76
 	bl	printf
-.LVL972:
 .L828:
-	.loc 2 1212 0 is_stmt 1
 	ldr	r3, [sp, #16]
 	ldr	r2, [sp, #12]
 	ldr	r1, [r3]
 	ldrh	r0, [r2]
-	.loc 2 1214 0
 	ldr	r2, .L889+12
-	.loc 2 1212 0
 	uxth	r10, r1
-	.loc 2 1214 0
 	ldr	ip, [r2]
-	.loc 2 1212 0
 	add	r3, r10, #-1
 	sub	r10, r10, r0
 	add	r10, r10, #-1
 	sxth	r3, r3
-.LVL973:
 	sxth	r10, r10
 .L829:
-	.loc 2 1212 0 is_stmt 0 discriminator 1
 	cmp	r3, r10
 	bgt	.L835
-	.loc 2 1235 0 is_stmt 1
 	cmp	r3, #0
 	bge	.L867
 	b	.L822
 .L835:
-	.loc 2 1214 0
 	ldr	r2, [ip, r3, lsl #2]
 	add	r8, ip, r3, lsl #2
 	ldr	r4, [r6, #4]
 	cmp	r4, r2
 	bls	.L830
-	.loc 2 1216 0
 	ldr	r2, [ip]
 	cbnz	r2, .L831
-	.loc 2 1216 0 is_stmt 0 discriminator 1
 	cmp	r1, r0
-	.loc 2 1221 0 is_stmt 1 discriminator 1
 	ittt	ne
 	ldrne	r2, .L889+8
 	addne	r0, r0, #1
 	strhne	r0, [r2]	@ movhi
 .L831:
-	.loc 2 1227 0 discriminator 1
 	ldr	r2, .L889+20
-	.loc 2 1224 0 discriminator 1
 	uxth	r10, r3
-	.loc 2 1227 0 discriminator 1
 	ldr	r0, [r2]
 	movs	r2, #0
 .L832:
-	.loc 2 1224 0 discriminator 1
 	uxth	lr, r2
 	sxth	r1, r2
-.LVL974:
 	cmp	r10, lr
 	bhi	.L833
-	.loc 2 1229 0
 	ldr	r2, [r6, #4]
-	.loc 2 1235 0
 	cmp	r3, #0
-	.loc 2 1229 0
 	str	r2, [r8]
-	.loc 2 1230 0
 	strh	r5, [r0, r3, lsl #1]	@ movhi
-	.loc 2 1235 0
 	blt	.L822
-	.loc 2 1242 0
 	ldr	r2, .L889+8
 	ldrh	r0, [r2]
 	ldr	r2, .L889
@@ -10356,42 +6402,29 @@ FtlScanSysBlk:
 	sxth	r2, r2
 	cmp	r3, r2
 	bgt	.L822
-.LVL975:
 .L867:
-	.loc 2 1244 0
 	ldr	r2, .L889+8
 	adds	r0, r0, #1
 	strh	r0, [r2]	@ movhi
-	.loc 2 1245 0
 	ldr	r2, [r6, #4]
 	str	r2, [ip, r3, lsl #2]
-	.loc 2 1246 0
 	ldr	r2, .L889+20
 .L887:
-	.loc 2 1290 0
 	ldr	r2, [r2]
 	strh	r5, [r2, r3, lsl #1]	@ movhi
 	b	.L822
-.LVL976:
 .L833:
-	.loc 2 1226 0 discriminator 3
 	add	lr, ip, r1, lsl #2
 	adds	r2, r2, #1
 	ldr	r4, [lr, #4]
-	.loc 2 1227 0 discriminator 3
 	add	lr, r0, r1, lsl #1
 	ldrh	lr, [lr, #2]
-	.loc 2 1226 0 discriminator 3
 	str	r4, [ip, r1, lsl #2]
-	.loc 2 1227 0 discriminator 3
 	strh	lr, [r0, r1, lsl #1]	@ movhi
-.LVL977:
 	b	.L832
 .L830:
 	subs	r3, r3, #1
-.LVL978:
 	sxth	r3, r3
-.LVL979:
 	b	.L829
 .L890:
 	.align	2
@@ -10416,80 +6449,56 @@ FtlScanSysBlk:
 	.word	.LANCHOR70
 	.word	.LANCHOR148
 	.word	.LC1
-.LVL980:
 .L825:
-	.loc 2 1252 0
 	ldr	r8, .L891+12
 	ldr	r10, .L891+20
 	ldrh	r2, [r8]
 	ldrh	r3, [r10]
 	cmp	r2, r3
 	bls	.L838
-	.loc 2 1252 0 is_stmt 0 discriminator 1
 	movw	r2, #1252
 	ldr	r1, .L891
 	ldr	r0, .L891+4
 	bl	printf
-.LVL981:
 .L838:
-	.loc 2 1255 0 is_stmt 1
 	ldr	r2, .L891+8
-	.loc 2 1253 0
 	ldrh	lr, [r10]
 	ldrh	ip, [r8]
-	.loc 2 1255 0
 	ldr	r0, [r2]
-	.loc 2 1253 0
 	add	r10, lr, #-1
 	sxth	r3, r10
-.LVL982:
 	sub	r10, r10, ip
 .L839:
-	.loc 2 1253 0 is_stmt 0 discriminator 1
 	cmp	r3, r10
 	ble	.L844
-	.loc 2 1255 0 is_stmt 1
 	ldr	r1, [r6, #4]
 	add	r8, r0, r3, lsl #2
 	ldr	r2, [r0, r3, lsl #2]
 	cmp	r1, r2
 	bls	.L840
-	.loc 2 1257 0
 	ldr	r2, [r0]
 	cbnz	r2, .L841
-	.loc 2 1257 0 is_stmt 0 discriminator 1
 	cmp	lr, ip
-	.loc 2 1265 0 is_stmt 1 discriminator 1
 	ittt	ne
 	ldrne	r2, .L891+12
 	addne	ip, ip, #1
 	strhne	ip, [r2]	@ movhi
 .L841:
-	.loc 2 1270 0 discriminator 1
 	ldr	r2, .L891+16
-	.loc 2 1267 0 discriminator 1
 	uxth	r10, r3
-	.loc 2 1270 0 discriminator 1
 	ldr	ip, [r2]
 	movs	r2, #0
 .L842:
-	.loc 2 1267 0 discriminator 1
 	uxth	lr, r2
 	sxth	r1, r2
-.LVL983:
 	cmp	r10, lr
 	bhi	.L843
-	.loc 2 1272 0
 	ldr	r2, [r6, #4]
 	str	r2, [r8]
-	.loc 2 1273 0
 	strh	r5, [ip, r3, lsl #1]	@ movhi
-.LVL984:
 .L844:
-	.loc 2 1278 0
 	cmp	r3, #0
 	blt	.L822
-	.loc 2 1286 0
 	ldr	r2, .L891+20
 	ldr	ip, .L891+12
 	ldrh	r2, [r2]
@@ -10499,203 +6508,142 @@ FtlScanSysBlk:
 	sxth	r2, r2
 	cmp	r3, r2
 	bgt	.L822
-	.loc 2 1289 0
 	ldr	r2, [r6, #4]
-	.loc 2 1288 0
 	adds	r1, r1, #1
 	strh	r1, [ip]	@ movhi
-	.loc 2 1289 0
 	str	r2, [r0, r3, lsl #2]
-	.loc 2 1290 0
 	ldr	r2, .L891+16
 	b	.L887
-.LVL985:
 .L843:
-	.loc 2 1269 0 discriminator 3
 	add	lr, r0, r1, lsl #2
 	adds	r2, r2, #1
 	ldr	r4, [lr, #4]
-	.loc 2 1270 0 discriminator 3
 	add	lr, ip, r1, lsl #1
 	ldrh	lr, [lr, #2]
-	.loc 2 1269 0 discriminator 3
 	str	r4, [r0, r1, lsl #2]
-	.loc 2 1270 0 discriminator 3
 	strh	lr, [ip, r1, lsl #1]	@ movhi
-.LVL986:
 	b	.L842
 .L840:
 	subs	r3, r3, #1
-.LVL987:
 	sxth	r3, r3
-.LVL988:
 	b	.L839
-.LVL989:
 .L823:
-	.loc 2 1297 0
 	ldr	r8, .L891+40
 	movw	r2, #65535
 	ldrh	r1, [r8]
 	cmp	r1, r2
 	bne	.L846
 .L888:
-	.loc 2 1309 0
 	strh	r5, [r8]	@ movhi
-	.loc 2 1310 0
 	str	r3, [r8, #8]
 	b	.L822
 .L846:
-	.loc 2 1304 0
 	ldrh	r0, [r8, #4]
 	cmp	r0, r2
 	beq	.L847
-	.loc 2 1305 0
 	movs	r1, #1
 	bl	FtlFreeSysBlkQueueIn
-.LVL990:
 .L847:
-	.loc 2 1306 0
 	ldr	r3, [r6, #4]
 	ldr	r2, [r8, #8]
 	cmp	r2, r3
 	bcs	.L848
-	.loc 2 1308 0
 	ldrh	r2, [r8]
 	strh	r2, [r8, #4]	@ movhi
 	b	.L888
 .L848:
-	.loc 2 1314 0
 	strh	r5, [r8, #4]	@ movhi
 	b	.L822
-.LVL991:
 .L851:
-	.loc 2 1341 0
 	ldr	r3, .L891+24
 	ldr	r2, [r3]
 	ldrh	r3, [r2]
 	cbz	r3, .L853
 .L856:
-	.loc 2 1359 0
 	ldr	r3, .L891+16
 	ldr	r4, [r3]
 	ldrh	r2, [r4]
 	cmp	r2, #0
 	beq	.L854
 .L855:
-	.loc 2 1377 0
 	ldr	r3, .L891+28
 	ldrh	r2, [r3]
 	ldr	r3, .L891+32
 	ldr	r3, [r3]
 	cmp	r2, r3
 	bls	.L886
-	.loc 2 1377 0 is_stmt 0 discriminator 1
 	movw	r2, #1377
 	ldr	r1, .L891
 	ldr	r0, .L891+4
 	bl	printf
-.LVL992:
 .L886:
-	.loc 2 1379 0 is_stmt 1
 	movs	r0, #0
 	add	sp, sp, #32
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL993:
 .L853:
-	.cfi_restore_state
-	.loc 2 1341 0 discriminator 1
 	ldr	r1, .L891+28
 	ldrh	r1, [r1]
 	cmp	r1, #0
 	beq	.L856
-	.loc 2 1343 0 discriminator 1
 	ldr	r5, .L891+32
 	ldr	r0, [r5]
 .L857:
 	sxth	r1, r3
-.LVL994:
 	cmp	r1, r0
 	bcs	.L856
-	.loc 2 1345 0
 	ldrh	r4, [r2, r1, lsl #1]
 	adds	r3, r3, #1
 	cmp	r4, #0
 	beq	.L857
-	.loc 2 1350 0
 	ldr	r3, .L891+36
-	.loc 2 1351 0
 	movs	r6, #0
-	.loc 2 1350 0
 	ldr	r0, [r3]
 	mov	r3, r1
 .L858:
-.LVL995:
-	.loc 2 1347 0 discriminator 1
 	ldr	r4, [r5]
 	cmp	r3, r4
 	bcs	.L856
-	.loc 2 1349 0 discriminator 3
 	ldrh	r7, [r2, r3, lsl #1]
 	subs	r4, r3, r1
 	strh	r7, [r2, r4, lsl #1]	@ movhi
-	.loc 2 1350 0 discriminator 3
 	ldr	r7, [r0, r3, lsl #2]
 	str	r7, [r0, r4, lsl #2]
-	.loc 2 1351 0 discriminator 3
 	strh	r6, [r2, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
-.LVL996:
 	sxth	r3, r3
-.LVL997:
 	b	.L858
-.LVL998:
 .L854:
-	.loc 2 1359 0 discriminator 1
 	ldr	r3, .L891+12
 	ldrh	r3, [r3]
 	cmp	r3, #0
 	beq	.L855
-	.loc 2 1361 0 discriminator 1
 	ldr	r5, .L891+20
 	ldrh	r1, [r5]
 .L863:
 	sxth	r3, r2
-.LVL999:
 	cmp	r3, r1
 	mov	r6, r3
 	bge	.L855
-	.loc 2 1363 0
 	ldrh	r0, [r4, r3, lsl #1]
 	adds	r2, r2, #1
 	cmp	r0, #0
 	beq	.L863
-	.loc 2 1368 0
 	ldr	r2, .L891+8
-	.loc 2 1369 0
 	movs	r0, #0
-	.loc 2 1368 0
 	ldr	r2, [r2]
-.LVL1000:
 .L864:
-	.loc 2 1365 0 discriminator 1
 	ldrh	r1, [r5]
 	cmp	r3, r1
 	bge	.L855
-	.loc 2 1367 0 discriminator 3
 	ldrh	r7, [r4, r3, lsl #1]
 	subs	r1, r3, r6
 	strh	r7, [r4, r1, lsl #1]	@ movhi
-	.loc 2 1368 0 discriminator 3
 	ldr	r7, [r2, r3, lsl #2]
 	str	r7, [r2, r1, lsl #2]
 	adds	r1, r3, #1
-	.loc 2 1369 0 discriminator 3
 	strh	r0, [r4, r3, lsl #1]	@ movhi
 	sxth	r3, r1
-.LVL1001:
 	b	.L864
 .L892:
 	.align	2
@@ -10711,8 +6659,6 @@ FtlScanSysBlk:
 	.word	.LANCHOR30
 	.word	.LANCHOR135
 	.word	.LANCHOR79
-	.cfi_endproc
-.LFE273:
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
 	.section	.text.FtlMapTblRecovery,"ax",%progbits
 	.align	1
@@ -10723,244 +6669,137 @@ FtlScanSysBlk:
 	.fpu softvfp
 	.type	FtlMapTblRecovery, %function
 FtlMapTblRecovery:
-.LFB278:
-	.loc 2 1515 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1002:
-	.loc 2 1521 0
 	ldr	r3, [r0, #16]
-	.loc 2 1526 0
 	movs	r1, #0
-	.loc 2 1515 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
 	sub	sp, sp, #24
-	.cfi_def_cfa_offset 56
-	.loc 2 1522 0
 	ldrh	fp, [r0, #6]
-	.loc 2 1515 0
 	mov	r4, r0
-	.loc 2 1532 0
 	movs	r6, #0
-	.loc 2 1519 0
 	ldr	r8, [r0, #24]
-.LVL1003:
-	.loc 2 1521 0
 	str	r3, [sp, #12]
-	.loc 2 1523 0
 	ldrh	r3, [r0, #8]
-	.loc 2 1526 0
 	lsl	r2, fp, #2
-	.loc 2 1520 0
 	ldr	r10, [r0, #12]
-.LVL1004:
-	.loc 2 1526 0
 	mov	r0, r8
-.LVL1005:
-	.loc 2 1527 0
 	ldr	r5, .L920
-	.loc 2 1523 0
 	str	r3, [sp, #4]
-.LVL1006:
-	.loc 2 1526 0
 	bl	ftl_memset
-.LVL1007:
-	.loc 2 1527 0
 	ldr	r3, .L920+4
-	.loc 2 1532 0
 	str	r6, [r4, #32]
-	.loc 2 1533 0
 	str	r6, [r4, #28]
-	.loc 2 1527 0
 	ldr	r2, [r3]
-	.loc 2 1559 0
 	str	r3, [sp, #8]
-	.loc 2 1527 0
 	str	r2, [r5, #8]
-	.loc 2 1528 0
 	ldr	r2, .L920+8
 	ldr	r7, [r2]
-	.loc 2 1530 0
 	movw	r2, #65535
-	.loc 2 1528 0
 	str	r7, [r5, #12]
-.LVL1008:
-	.loc 2 1530 0
 	strh	r2, [r4]	@ movhi
-	.loc 2 1531 0
 	strh	r2, [r4, #2]	@ movhi
-	.loc 2 1534 0
 	movs	r2, #1
 	str	r2, [r4, #36]
-.LVL1009:
 .L894:
-	.loc 2 1535 0 discriminator 1
 	ldr	r2, [sp, #4]
 	sxth	r3, r6
-.LVL1010:
 	cmp	r3, r2
 	bge	.L911
-	.loc 2 1537 0
 	ldr	r2, [sp, #4]
 	subs	r2, r2, #1
 	cmp	r3, r2
 	lsl	r2, r3, #1
 	bne	.L895
-	.loc 2 1539 0
 	ldrh	r0, [r10, r3, lsl #1]
 	movs	r1, #1
 	add	r5, r10, r2
 	str	r3, [sp, #4]
-.LVL1011:
 	bl	FtlGetLastWrittenPage
-.LVL1012:
-	.loc 2 1542 0
 	ldr	r3, [sp, #12]
-	.loc 2 1539 0
 	sxth	r10, r0
-.LVL1013:
-	.loc 2 1541 0
 	strh	r6, [r4]	@ movhi
-	.loc 2 1543 0
 	movs	r6, #0
-	.loc 2 1540 0
 	adds	r0, r0, #1
-	.loc 2 1542 0
 	mov	r2, r3
 	ldr	r3, [sp, #4]
-	.loc 2 1540 0
 	strh	r0, [r4, #2]	@ movhi
-	.loc 2 1542 0
 	ldr	r3, [r2, r3, lsl #2]
 	str	r3, [r4, #28]
-.LVL1014:
-	.loc 2 1545 0
 	ldr	r3, .L920
-.LVL1015:
 .L896:
 	sxth	r2, r6
-.LVL1016:
-	.loc 2 1543 0 discriminator 1
 	cmp	r2, r10
 	ble	.L898
-.LVL1017:
 .L911:
-	.loc 2 1596 0
 	mov	r0, r4
 	bl	ftl_free_no_use_map_blk
-.LVL1018:
-	.loc 2 1597 0
 	ldr	r3, .L920+12
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
 	bne	.L900
-	.loc 2 1599 0
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.LVL1019:
 .L900:
-	.loc 2 1602 0
 	mov	r0, r4
 	bl	ftl_map_blk_gc
-.LVL1020:
-	.loc 2 1604 0
 	mov	r0, r4
 	bl	ftl_map_blk_gc
-.LVL1021:
-	.loc 2 1606 0
 	movs	r0, #0
 	add	sp, sp, #24
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1022:
 .L898:
-	.cfi_restore_state
-	.loc 2 1545 0
 	ldrh	r1, [r5]
-	.loc 2 1546 0
 	ldr	r0, .L920
-	.loc 2 1545 0
 	str	r3, [sp, #4]
 	orr	r2, r2, r1, lsl #10
-.LVL1023:
 	str	r2, [r3, #4]
-	.loc 2 1546 0
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL1024:
-	.loc 2 1549 0
 	ldr	r3, [sp, #4]
 	ldr	r2, [r3]
 	adds	r2, r2, #1
 	beq	.L897
-	.loc 2 1551 0
 	ldrh	r2, [r7, #8]
 	cmp	fp, r2
 	bls	.L897
-	.loc 2 1551 0 is_stmt 0 discriminator 1
 	ldrh	r1, [r4, #4]
 	ldrh	r0, [r7]
 	cmp	r0, r1
-	.loc 2 1553 0 is_stmt 1 discriminator 1
 	itt	eq
 	ldreq	r1, [r3, #4]
 	streq	r1, [r8, r2, lsl #2]
 .L897:
-.LVL1025:
 	adds	r6, r6, #1
-.LVL1026:
 	b	.L896
-.LVL1027:
 .L895:
-	.loc 2 1559 0
 	ldr	r1, [sp, #8]
-	.loc 2 1560 0
 	add	r2, r10, r2
 	str	r2, [sp, #16]
-	.loc 2 1561 0
 	ldr	r0, .L920
-	.loc 2 1559 0
 	ldr	r1, [r1]
 	str	r1, [r5, #8]
-	.loc 2 1560 0
 	ldrh	r1, [r10, r3, lsl #1]
 	ldr	r3, .L920+12
-.LVL1028:
 	ldrh	r2, [r3]
 	str	r3, [sp, #20]
 	subs	r2, r2, #1
 	orr	r2, r2, r1, lsl #10
 	str	r2, [r5, #4]
-	.loc 2 1561 0
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL1029:
-	.loc 2 1564 0
 	ldr	r2, [r5]
 	adds	r2, r2, #1
 	beq	.L913
-	.loc 2 1564 0 is_stmt 0 discriminator 1
 	ldrh	r1, [r7]
 	ldrh	r2, [r4, #4]
 	ldr	r3, [sp, #20]
 	cmp	r1, r2
 	bne	.L913
-	.loc 2 1564 0 discriminator 2
 	ldrh	r1, [r7, #8]
 	movw	r2, #64245
 	cmp	r1, r2
@@ -10968,88 +6807,58 @@ FtlMapTblRecovery:
 .L913:
 	movs	r3, #0
 .L903:
-.LVL1030:
-	.loc 2 1579 0 is_stmt 1 discriminator 1
 	ldr	r1, .L920+12
 	sxth	r2, r3
 	ldrh	r1, [r1]
 	cmp	r2, r1
 	bge	.L909
 	str	r3, [sp, #20]
-	.loc 2 1581 0
 	ldr	r3, [sp, #16]
-.LVL1031:
-	.loc 2 1582 0
 	ldr	r0, .L920
-	.loc 2 1581 0
 	ldrh	r1, [r3]
 	orr	r2, r2, r1, lsl #10
-.LVL1032:
 	str	r2, [r5, #4]
-	.loc 2 1582 0
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL1033:
-	.loc 2 1585 0
 	ldr	r2, [r5]
 	ldr	r3, [sp, #20]
 	adds	r2, r2, #1
 	beq	.L907
-	.loc 2 1587 0
 	ldrh	r2, [r7, #8]
 	cmp	fp, r2
 	bls	.L907
-	.loc 2 1587 0 is_stmt 0 discriminator 1
 	ldrh	r1, [r4, #4]
 	ldrh	r0, [r7]
 	cmp	r0, r1
-	.loc 2 1589 0 is_stmt 1 discriminator 1
 	itt	eq
 	ldreq	r1, [r5, #4]
 	streq	r1, [r8, r2, lsl #2]
 .L907:
-.LVL1034:
 	adds	r3, r3, #1
-.LVL1035:
 	b	.L903
 .L902:
-	.loc 2 1567 0 discriminator 1
 	ldrh	r2, [r3]
-	.loc 2 1569 0 discriminator 1
 	movs	r1, #0
 	ldr	r3, [sp, #8]
-	.loc 2 1567 0 discriminator 1
 	subs	r2, r2, #1
-	.loc 2 1569 0 discriminator 1
 	ldr	ip, [r3]
 .L904:
 	sxth	r3, r1
-.LVL1036:
-	.loc 2 1567 0 discriminator 1
 	cmp	r3, r2
 	blt	.L906
 .L909:
-.LVL1037:
 	adds	r6, r6, #1
-.LVL1038:
 	b	.L894
-.LVL1039:
 .L906:
-	.loc 2 1569 0
 	lsls	r0, r3, #3
 	ldr	r3, [ip, r3, lsl #3]
-.LVL1040:
 	adds	r1, r1, #1
-.LVL1041:
-	.loc 2 1570 0
 	uxth	lr, r3
 	cmp	fp, lr
-	.loc 2 1572 0
 	itttt	hi
 	addhi	r0, r0, ip
 	movhi	r3, lr
-.LVL1042:
 	ldrhi	r0, [r0, #4]
 	strhi	r0, [r8, r3, lsl #2]
 	b	.L904
@@ -11060,8 +6869,6 @@ FtlMapTblRecovery:
 	.word	.LANCHOR107
 	.word	.LANCHOR108
 	.word	.LANCHOR20
-	.cfi_endproc
-.LFE278:
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
 	.section	.text.FtlLoadVonderInfo,"ax",%progbits
 	.align	1
@@ -11072,51 +6879,34 @@ FtlMapTblRecovery:
 	.fpu softvfp
 	.type	FtlLoadVonderInfo, %function
 FtlLoadVonderInfo:
-.LFB279:
-	.loc 2 1609 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 3, -8
-	.cfi_offset 14, -4
-	.loc 2 1610 0
 	ldr	r3, .L923
 	ldr	r0, .L923+4
 	ldrh	r3, [r3]
 	strh	r3, [r0, #10]	@ movhi
-	.loc 2 1611 0
 	movw	r3, #61574
 	strh	r3, [r0, #4]	@ movhi
-	.loc 2 1612 0
 	ldr	r3, .L923+8
 	ldrh	r3, [r3]
 	strh	r3, [r0, #8]	@ movhi
-	.loc 2 1613 0
 	ldr	r3, .L923+12
 	ldrh	r3, [r3]
 	strh	r3, [r0, #6]	@ movhi
-	.loc 2 1614 0
 	ldr	r3, .L923+16
 	ldr	r3, [r3]
 	str	r3, [r0, #12]
-	.loc 2 1615 0
 	ldr	r3, .L923+20
 	ldr	r3, [r3]
 	str	r3, [r0, #16]
-	.loc 2 1616 0
 	ldr	r3, .L923+24
 	ldr	r3, [r3]
 	str	r3, [r0, #20]
-	.loc 2 1617 0
 	ldr	r3, .L923+28
 	ldr	r3, [r3]
 	str	r3, [r0, #24]
-	.loc 2 1619 0
 	bl	FtlMapTblRecovery
-.LVL1043:
-	.loc 2 1622 0
 	movs	r0, #0
 	pop	{r3, pc}
 .L924:
@@ -11130,8 +6920,6 @@ FtlLoadVonderInfo:
 	.word	.LANCHOR132
 	.word	.LANCHOR131
 	.word	.LANCHOR133
-	.cfi_endproc
-.LFE279:
 	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
 	.section	.text.FtlL2PDataInit,"ax",%progbits
 	.align	1
@@ -11142,112 +6930,71 @@ FtlLoadVonderInfo:
 	.fpu softvfp
 	.type	FtlL2PDataInit, %function
 FtlL2PDataInit:
-.LFB280:
-	.loc 2 1625 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 4, -24
-	.cfi_offset 5, -20
-	.cfi_offset 6, -16
-	.cfi_offset 7, -12
-	.cfi_offset 8, -8
-	.cfi_offset 14, -4
-	.loc 2 1627 0
 	movs	r1, #0
 	ldr	r5, .L928
 	ldr	r4, .L928+4
 	ldr	r2, [r5]
-	.loc 2 1628 0
 	ldr	r7, .L928+8
 	ldr	r6, .L928+12
-	.loc 2 1627 0
 	ldr	r0, [r4]
 	lsls	r2, r2, #1
-	.loc 2 1628 0
 	ldr	r8, .L928+44
-	.loc 2 1627 0
 	bl	ftl_memset
-.LVL1044:
-	.loc 2 1628 0
 	ldrh	r3, [r7]
 	movs	r1, #255
 	ldrh	r2, [r6]
 	ldr	r0, [r8]
 	muls	r2, r3, r2
 	bl	ftl_memset
-.LVL1045:
 	ldr	r3, .L928+16
 	movw	r0, #65535
 	ldrh	r1, [r6]
-	.loc 2 1633 0
 	ldr	ip, [r8]
 	ldr	r2, [r3]
 	movs	r3, #12
 	ldrh	r7, [r7]
 	mla	r3, r1, r3, r3
 	adds	r1, r2, r3
-	.loc 2 1629 0
 	movs	r3, #0
-	.loc 2 1631 0
 	mov	lr, r3
-.LVL1046:
 .L926:
 	adds	r2, r2, #12
 	adds	r6, r3, r7
-	.loc 2 1629 0 discriminator 1
 	cmp	r2, r1
 	bne	.L927
-	.loc 2 1635 0
 	ldr	r3, .L928+20
-	.loc 2 1637 0
 	ldr	r2, [r5]
-	.loc 2 1635 0
 	strh	r0, [r3, #2]	@ movhi
-	.loc 2 1637 0
 	strh	r2, [r3, #10]	@ movhi
-	.loc 2 1638 0
 	movw	r2, #61634
 	strh	r2, [r3, #4]	@ movhi
-	.loc 2 1639 0
 	ldr	r2, .L928+24
-	.loc 2 1636 0
 	strh	r0, [r3]	@ movhi
-	.loc 2 1639 0
 	ldrh	r2, [r2]
 	strh	r2, [r3, #8]	@ movhi
-	.loc 2 1640 0
 	ldr	r2, .L928+28
 	ldrh	r2, [r2]
 	strh	r2, [r3, #6]	@ movhi
-	.loc 2 1641 0
 	ldr	r2, .L928+32
 	ldr	r2, [r2]
 	str	r2, [r3, #12]
-	.loc 2 1642 0
 	ldr	r2, .L928+36
 	ldr	r2, [r2]
 	str	r2, [r3, #16]
-	.loc 2 1643 0
 	ldr	r2, [r4]
 	str	r2, [r3, #20]
-	.loc 2 1644 0
 	ldr	r2, .L928+40
 	ldr	r2, [r2]
 	str	r2, [r3, #24]
 	pop	{r4, r5, r6, r7, r8, pc}
 .L927:
-	.loc 2 1633 0 discriminator 3
 	bic	r3, r3, #3
-	.loc 2 1631 0 discriminator 3
 	str	lr, [r2, #-8]
-	.loc 2 1633 0 discriminator 3
 	add	r3, r3, ip
-	.loc 2 1632 0 discriminator 3
 	strh	r0, [r2, #-12]	@ movhi
-	.loc 2 1633 0 discriminator 3
 	str	r3, [r2, #-4]
 	mov	r3, r6
 	b	.L926
@@ -11266,8 +7013,6 @@ FtlL2PDataInit:
 	.word	.LANCHOR135
 	.word	.LANCHOR134
 	.word	.LANCHOR136
-	.cfi_endproc
-.LFE280:
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
 	.section	.text.FtlLoadMapInfo,"ax",%progbits
 	.align	1
@@ -11278,31 +7023,18 @@ FtlL2PDataInit:
 	.fpu softvfp
 	.type	FtlLoadMapInfo, %function
 FtlLoadMapInfo:
-.LFB281:
-	.loc 2 1648 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 3, -8
-	.cfi_offset 14, -4
-	.loc 2 1649 0
 	bl	FtlL2PDataInit
-.LVL1047:
-	.loc 2 1651 0
 	ldr	r0, .L931
 	bl	FtlMapTblRecovery
-.LVL1048:
-	.loc 2 1654 0
 	movs	r0, #0
 	pop	{r3, pc}
 .L932:
 	.align	2
 .L931:
 	.word	.LANCHOR144
-	.cfi_endproc
-.LFE281:
 	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
 	.section	.text.FtlVariablesInit,"ax",%progbits
 	.align	1
@@ -11313,85 +7045,52 @@ FtlLoadMapInfo:
 	.fpu softvfp
 	.type	FtlVariablesInit, %function
 FtlVariablesInit:
-.LFB210:
-	.loc 3 494 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 3 497 0
 	movw	r2, #65535
 	ldr	r3, .L934
-	.loc 3 498 0
 	movs	r4, #0
-	.loc 3 502 0
 	mov	r1, r4
-	.loc 3 503 0
 	ldr	r5, .L934+4
-	.loc 3 497 0
 	strh	r2, [r3]	@ movhi
-	.loc 3 500 0
 	mov	r2, #-1
-	.loc 3 498 0
 	ldr	r3, .L934+8
 	str	r4, [r3]
-	.loc 3 499 0
 	ldr	r3, .L934+12
 	str	r4, [r3]
-	.loc 3 500 0
 	ldr	r3, .L934+16
 	str	r2, [r3]
-	.loc 3 501 0
 	ldr	r3, .L934+20
 	strh	r4, [r3]	@ movhi
-	.loc 3 502 0
 	ldr	r3, .L934+24
 	ldrh	r2, [r3]
 	ldr	r3, .L934+28
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL1049:
-	.loc 3 503 0
 	ldrh	r2, [r5]
 	mov	r1, r4
 	ldr	r3, .L934+32
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL1050:
-	.loc 3 504 0
 	ldrh	r2, [r5]
 	mov	r1, r4
 	ldr	r3, .L934+36
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL1051:
-	.loc 3 505 0
 	mov	r1, r4
 	movs	r2, #48
 	ldr	r0, .L934+40
 	bl	ftl_memset
-.LVL1052:
-	.loc 3 506 0
 	mov	r2, #512
 	mov	r1, r4
 	ldr	r0, .L934+44
 	bl	ftl_memset
-.LVL1053:
-	.loc 3 507 0
 	bl	FtlGcBufInit
-.LVL1054:
-	.loc 3 508 0
 	bl	FtlL2PDataInit
-.LVL1055:
-	.loc 3 510 0
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
 .L935:
@@ -11409,8 +7108,6 @@ FtlVariablesInit:
 	.word	.LANCHOR126
 	.word	.LANCHOR39
 	.word	.LANCHOR81
-	.cfi_endproc
-.LFE210:
 	.size	FtlVariablesInit, .-FtlVariablesInit
 	.section	.text.SupperBlkListInit,"ax",%progbits
 	.align	1
@@ -11421,207 +7118,125 @@ FtlVariablesInit:
 	.fpu softvfp
 	.type	SupperBlkListInit, %function
 SupperBlkListInit:
-.LFB288:
-	.loc 2 2116 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 48
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 2120 0
 	movs	r2, #6
 	ldr	r3, .L947
 	movs	r1, #0
-	.loc 2 2121 0
 	movs	r4, #0
-	.loc 2 2120 0
 	ldr	r5, .L947+4
-	.loc 2 2126 0
 	mov	r8, r4
-	.loc 2 2120 0
 	ldrh	r3, [r3]
-	.loc 2 2126 0
 	mov	r6, r4
-	.loc 2 2120 0
 	ldr	r0, [r5]
 	mov	r10, r5
 	muls	r2, r3, r2
 	bl	ftl_memset
-.LVL1056:
-	.loc 2 2121 0
 	ldr	r3, .L947+8
-	.loc 2 2124 0
 	ldr	r2, .L947+12
-	.loc 2 2121 0
 	str	r4, [r3]
-	.loc 2 2122 0
 	ldr	r3, .L947+16
-	.loc 2 2124 0
 	strh	r4, [r2]	@ movhi
 	str	r2, [sp, #4]
-	.loc 2 2122 0
 	str	r4, [r3]
-	.loc 2 2123 0
 	ldr	r3, .L947+20
 	str	r4, [r3]
-	.loc 2 2125 0
 	ldr	r3, .L947+24
 	mov	fp, r3
 	strh	r4, [r3]	@ movhi
-.LVL1057:
 .L937:
-	.loc 2 2128 0 discriminator 1
 	ldr	r3, .L947+28
 	uxth	r7, r4
-.LVL1058:
 	ldrh	r3, [r3]
 	cmp	r7, r3
 	bcs	.L943
-	.loc 2 2130 0
 	ldr	r3, .L947+32
 	ldrh	r2, [r3]
-	.loc 2 2133 0
 	ldr	r3, .L947+36
 	ldrh	r3, [r3]
 	str	r3, [sp]
 	movs	r3, #0
 	mov	r5, r3
 	b	.L944
-.LVL1059:
 .L939:
 	str	r2, [sp, #12]
-	.loc 2 2131 0
 	mov	r1, r7
 	ldr	r2, .L947+40
 	str	r3, [sp, #8]
 	ldrb	r0, [r2, r3]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL1060:
-	.loc 2 2132 0
 	bl	FtlBbmIsBadBlock
-.LVL1061:
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #12]
 	cbnz	r0, .L938
-	.loc 2 2133 0
 	ldr	r1, [sp]
 	add	r5, r5, r1
-.LVL1062:
 	uxth	r5, r5
-.LVL1063:
 .L938:
 	adds	r3, r3, #1
-.LVL1064:
 .L944:
-	.loc 2 2130 0 discriminator 1
 	uxth	r1, r3
 	cmp	r2, r1
 	bhi	.L939
-	.loc 2 2135 0
 	cbz	r5, .L946
-	.loc 2 2136 0
 	mov	r1, r5
 	mov	r0, #32768
 	bl	__aeabi_idiv
-.LVL1065:
 .L940:
-	.loc 2 2137 0
 	ldr	r1, [r10]
 	uxth	r2, r4
 	movs	r3, #6
 	mla	r3, r3, r2, r1
 	strh	r0, [r3, #4]	@ movhi
-	.loc 2 2139 0
 	ldr	r3, .L947+44
 	ldrh	r3, [r3]
 	cmp	r3, r7
 	beq	.L941
-	.loc 2 2140 0 discriminator 1
 	ldr	r3, .L947+48
-	.loc 2 2139 0 discriminator 1
 	ldrh	r3, [r3]
 	cmp	r3, r7
 	beq	.L941
-	.loc 2 2141 0
 	ldr	r3, .L947+52
-	.loc 2 2140 0
 	ldrh	r3, [r3]
 	cmp	r3, r7
 	beq	.L941
-	.loc 2 2143 0
 	ldr	r3, .L947+56
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r2, lsl #1]
 	cbnz	r3, .L942
-	.loc 2 2144 0
 	add	r8, r8, #1
-.LVL1066:
-	.loc 2 2145 0
 	mov	r0, r7
-.LVL1067:
-	.loc 2 2144 0
 	uxth	r8, r8
-.LVL1068:
-	.loc 2 2145 0
 	bl	INSERT_FREE_LIST
-.LVL1069:
 .L941:
 	adds	r4, r4, #1
-.LVL1070:
 	b	.L937
-.LVL1071:
 .L946:
 	mov	r0, r5
 	b	.L940
-.LVL1072:
 .L942:
-	.loc 2 2147 0
 	adds	r6, r6, #1
-.LVL1073:
-	.loc 2 2148 0
 	mov	r0, r7
-.LVL1074:
-	.loc 2 2147 0
 	uxth	r6, r6
-.LVL1075:
-	.loc 2 2148 0
 	bl	INSERT_DATA_LIST
-.LVL1076:
 	b	.L941
 .L943:
-	.loc 2 2152 0
 	ldr	r2, [sp, #4]
-	.loc 2 2153 0
 	strh	r8, [fp]	@ movhi
-	.loc 2 2152 0
 	strh	r6, [r2]	@ movhi
-	.loc 2 2154 0
 	add	r6, r6, r8
-.LVL1077:
 	cmp	r6, r3
 	ble	.L945
-	.loc 2 2154 0 is_stmt 0 discriminator 1
 	movw	r2, #2154
 	ldr	r1, .L947+60
 	ldr	r0, .L947+64
 	bl	printf
-.LVL1078:
 .L945:
-	.loc 2 2156 0 is_stmt 1
 	movs	r0, #0
 	add	sp, sp, #16
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1079:
 .L948:
 	.align	2
 .L947:
@@ -11642,8 +7257,6 @@ SupperBlkListInit:
 	.word	.LANCHOR42
 	.word	.LANCHOR154
 	.word	.LC1
-	.cfi_endproc
-.LFE288:
 	.size	SupperBlkListInit, .-SupperBlkListInit
 	.section	.text.ftl_check_vpc,"ax",%progbits
 	.align	1
@@ -11654,163 +7267,95 @@ SupperBlkListInit:
 	.fpu softvfp
 	.type	ftl_check_vpc, %function
 ftl_check_vpc:
-.LFB293:
-	.loc 2 2273 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1080:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 2282 0
 	movs	r4, #0
 	ldr	r6, .L973
-	.loc 2 2288 0
 	ldr	r5, .L973+4
-	.loc 2 2279 0
 	ldr	r1, .L973+8
 	ldr	r0, .L973+12
 	bl	printf
-.LVL1081:
-	.loc 2 2281 0
 	mov	r2, #8192
 	movs	r1, #0
 	ldr	r0, .L973+4
 	bl	ftl_memset
-.LVL1082:
 .L950:
-	.loc 2 2282 0 discriminator 1
 	ldr	r3, [r6]
 	cmp	r4, r3
 	bcc	.L952
-	.loc 2 2293 0 discriminator 1
 	ldr	r10, .L973+48
 	movs	r4, #0
-.LVL1083:
-	.loc 2 2295 0 discriminator 1
 	ldr	r7, .L973+16
 	mov	r6, r4
-.LVL1084:
 .L953:
-	.loc 2 2293 0 discriminator 1
 	ldrh	r2, [r10]
 	uxth	r3, r4
 	cmp	r2, r3
 	bhi	.L955
-	.loc 2 2305 0
 	ldr	r3, .L973+20
 	ldr	r4, [r3]
-.LVL1085:
 	cbz	r4, .L956
-.LBB275:
-	.loc 2 2307 0
 	ldr	r3, .L973+24
-	.loc 2 2309 0
 	mov	r8, #0
-	.loc 2 2308 0
 	ldr	r5, .L973+28
-	.loc 2 2311 0
 	ldr	r10, .L973+16
-	.loc 2 2307 0
 	ldrh	r7, [r3]
-.LVL1086:
-	.loc 2 2308 0
 	ldr	r3, [r5]
-	.loc 2 2313 0
 	ldr	fp, .L973+4
-	.loc 2 2308 0
 	subs	r4, r4, r3
 	ldr	r3, .L973+32
 	asrs	r4, r4, #1
 	muls	r4, r3, r4
 	uxth	r4, r4
-.LVL1087:
 .L957:
-	.loc 2 2309 0 discriminator 1
 	uxth	r3, r8
 	cmp	r7, r3
 	bls	.L956
-	.loc 2 2311 0
 	ldr	r3, [r10]
 	ldrh	r2, [r3, r4, lsl #1]
 	cbz	r2, .L958
-	.loc 2 2314 0
 	movs	r6, #1
-	.loc 2 2313 0
 	ldrh	r3, [fp, r4, lsl #1]
 	mov	r1, r4
 	ldr	r0, .L973+36
 	bl	printf
-.LVL1088:
 .L958:
-	.loc 2 2316 0
 	movs	r3, #6
 	ldr	r2, [r5]
 	muls	r4, r3, r4
-.LVL1089:
 	movw	r3, #65535
 	add	r8, r8, #1
-.LVL1090:
 	ldrh	r4, [r2, r4]
 	cmp	r4, r3
 	bne	.L957
-.LVL1091:
 .L956:
-.LBE275:
-	.loc 2 2321 0
 	cbz	r6, .L949
-.LVL1092:
-	.loc 2 2321 0 is_stmt 0 discriminator 1
 	movw	r2, #2321
 	ldr	r1, .L973+8
 	ldr	r0, .L973+40
 	bl	printf
-.LVL1093:
 .L949:
-	.loc 2 2322 0 is_stmt 1
 	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1094:
 .L952:
-	.cfi_restore_state
-	.loc 2 2284 0
 	movs	r2, #0
 	add	r1, sp, #4
 	mov	r0, r4
 	bl	log2phys
-.LVL1095:
-	.loc 2 2285 0
 	ldr	r0, [sp, #4]
 	adds	r3, r0, #1
 	beq	.L951
-	.loc 2 2287 0
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1096:
-	.loc 2 2288 0
 	ldrh	r3, [r5, r0, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r5, r0, lsl #1]	@ movhi
-.LVL1097:
 .L951:
-	.loc 2 2282 0 discriminator 2
 	adds	r4, r4, #1
-.LVL1098:
 	b	.L950
-.LVL1099:
 .L955:
-	.loc 2 2295 0
 	ldr	r3, [r7]
 	uxth	r5, r4
 	ldr	r8, .L973+4
@@ -11818,27 +7363,20 @@ ftl_check_vpc:
 	ldrh	r3, [r8, r5, lsl #1]
 	cmp	r2, r3
 	beq	.L954
-	.loc 2 2297 0
 	mov	r1, r5
 	ldr	r0, .L973+44
 	bl	printf
-.LVL1100:
-	.loc 2 2298 0
 	ldr	r3, [r7]
 	movw	r2, #65535
 	ldrh	r3, [r3, r5, lsl #1]
 	cmp	r3, r2
 	beq	.L954
-	.loc 2 2298 0 is_stmt 0 discriminator 1
 	ldrh	r2, [r8, r5, lsl #1]
-	.loc 2 2300 0 is_stmt 1 discriminator 1
 	cmp	r2, r3
 	it	hi
 	movhi	r6, #1
-.LVL1101:
 .L954:
 	adds	r4, r4, #1
-.LVL1102:
 	b	.L953
 .L974:
 	.align	2
@@ -11856,8 +7394,6 @@ ftl_check_vpc:
 	.word	.LC1
 	.word	.LC95
 	.word	.LANCHOR5
-	.cfi_endproc
-.LFE293:
 	.size	ftl_check_vpc, .-ftl_check_vpc
 	.section	.text.FtlGcPageVarInit,"ax",%progbits
 	.align	1
@@ -11868,35 +7404,21 @@ ftl_check_vpc:
 	.fpu softvfp
 	.type	FtlGcPageVarInit, %function
 FtlGcPageVarInit:
-.LFB312:
-	.loc 5 202 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	.loc 5 203 0
 	ldr	r2, .L976
 	movs	r3, #0
-	.loc 5 202 0
 	push	{r4, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 4, -8
-	.cfi_offset 14, -4
-	.loc 5 205 0
 	movs	r1, #255
 	ldr	r4, .L976+4
-	.loc 5 203 0
 	strh	r3, [r2]	@ movhi
-	.loc 5 204 0
 	ldr	r2, .L976+8
 	strh	r3, [r2]	@ movhi
-	.loc 5 205 0
 	ldrh	r2, [r4]
 	ldr	r3, .L976+12
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL1103:
-	.loc 5 206 0
 	ldrh	r3, [r4]
 	movs	r2, #12
 	movs	r1, #255
@@ -11904,15 +7426,8 @@ FtlGcPageVarInit:
 	ldr	r3, .L976+16
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL1104:
-	.loc 5 208 0
 	pop	{r4, lr}
-	.cfi_restore 14
-	.cfi_restore 4
-	.cfi_def_cfa_offset 0
-	.loc 5 207 0
 	b	FtlGcBufInit
-.LVL1105:
 .L977:
 	.align	2
 .L976:
@@ -11921,8 +7436,6 @@ FtlGcPageVarInit:
 	.word	.LANCHOR97
 	.word	.LANCHOR95
 	.word	.LANCHOR98
-	.cfi_endproc
-.LFE312:
 	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
 	.section	.text.FtlGcScanTempBlk,"ax",%progbits
 	.align	1
@@ -11933,192 +7446,112 @@ FtlGcPageVarInit:
 	.fpu softvfp
 	.type	FtlGcScanTempBlk, %function
 FtlGcScanTempBlk:
-.LFB313:
-	.loc 5 211 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1106:
-	.loc 5 220 0
 	ldr	r3, .L1001
-	.loc 5 211 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
 	sub	sp, sp, #24
-	.cfi_def_cfa_offset 56
-	.loc 5 211 0
 	mov	r5, r0
 	str	r1, [sp, #8]
-	.loc 5 220 0
 	ldrh	r4, [r3]
-.LVL1107:
-	.loc 5 221 0
 	movw	r3, #65535
 	cmp	r4, r3
 	beq	.L995
-	.loc 5 223 0
 	cbnz	r4, .L979
 .L980:
-	.loc 5 224 0
 	bl	FtlGcPageVarInit
-.LVL1108:
 	b	.L981
-.LVL1109:
 .L995:
-	.loc 5 222 0
 	movs	r4, #0
-.LVL1110:
 .L979:
-	.loc 5 223 0 discriminator 1
 	ldr	r3, .L1001+4
 	ldr	r2, [sp, #8]
 	ldrh	r3, [r3]
 	cmp	r3, r2
 	beq	.L980
-.LVL1111:
 .L981:
-	.loc 5 222 0
 	movs	r7, #0
-.LVL1112:
 .L989:
-	.loc 5 228 0
 	ldrh	r2, [r5]
 	movw	r3, #65535
-	.loc 5 226 0
 	movs	r0, #0
 	strb	r0, [r5, #8]
-.LVL1113:
-	.loc 5 228 0
 	cmp	r2, r3
 	beq	.L982
 .L992:
-.LVL1114:
-	.loc 5 231 0
 	ldr	r3, .L1001+8
 	movs	r2, #0
 	add	ip, r5, #16
-	.loc 5 230 0
 	mov	r6, r2
-	.loc 5 233 0
 	movw	lr, #65535
-	.loc 5 234 0
 	mov	r8, #20
-	.loc 5 231 0
 	ldrh	fp, [r3]
-	.loc 5 234 0
 	ldr	r3, .L1001+12
 	ldr	r3, [r3]
 	str	r3, [sp, #4]
-	.loc 5 235 0
 	ldr	r3, .L1001+16
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
 	ldr	r3, .L1001+20
 	ldrh	r3, [r3]
 	str	r3, [sp, #16]
-	.loc 5 236 0
 	ldr	r3, .L1001+24
 	ldr	r3, [r3]
 	str	r3, [sp, #20]
 	ldr	r3, .L1001+28
 	ldrh	r10, [r3]
-.LVL1115:
 .L983:
-	.loc 5 231 0 discriminator 1
 	uxth	r3, r2
 	cmp	fp, r3
 	bhi	.L985
-	.loc 5 241 0
 	mov	r8, #0
-	.loc 5 242 0
 	mov	fp, #20
-	.loc 5 240 0
 	movs	r2, #0
-.LVL1116:
 	mov	r1, r6
 	ldr	r0, [sp, #4]
 	bl	FlashReadPages
-.LVL1117:
 .L986:
-	.loc 5 241 0 discriminator 1
 	uxth	r3, r8
 	cmp	r6, r3
 	bhi	.L990
-	.loc 5 268 0
 	ldr	r3, [sp, #8]
-	.loc 5 266 0
 	adds	r7, r7, #1
-.LVL1118:
-	.loc 5 264 0
 	adds	r4, r4, #1
-.LVL1119:
 	ldr	r2, .L1001+4
 	uxth	r4, r4
-.LVL1120:
-	.loc 5 268 0
 	cmp	r3, r7
 	bls	.L991
 .L993:
-	.loc 5 274 0
 	ldrh	r3, [r2]
 	cmp	r3, r4
 	bhi	.L992
-	.loc 5 265 0
 	movs	r0, #0
 	b	.L982
-.LVL1121:
 .L985:
-	.loc 5 232 0
 	ldrh	r3, [ip], #2
-.LVL1122:
-	.loc 5 233 0
 	cmp	r3, lr
 	beq	.L984
-	.loc 5 234 0
 	ldr	r1, [sp, #4]
 	orr	r3, r4, r3, lsl #10
-.LVL1123:
-	.loc 5 235 0
 	ldr	r0, [sp, #12]
-	.loc 5 234 0
 	mla	r1, r8, r6, r1
 	str	r3, [r1, #4]
-	.loc 5 235 0
 	ldr	r3, [sp, #16]
 	muls	r3, r6, r3
 	bic	r3, r3, #3
 	add	r3, r3, r0
-	.loc 5 236 0
 	ldr	r0, [sp, #20]
-	.loc 5 235 0
 	str	r3, [r1, #8]
-	.loc 5 236 0
 	mul	r3, r10, r6
-	.loc 5 237 0
 	adds	r6, r6, #1
-.LVL1124:
 	uxth	r6, r6
-.LVL1125:
-	.loc 5 236 0
 	bic	r3, r3, #3
 	add	r3, r3, r0
 	str	r3, [r1, #12]
 .L984:
-.LVL1126:
 	adds	r2, r2, #1
-.LVL1127:
 	b	.L983
-.LVL1128:
 .L990:
-	.loc 5 242 0
 	ldr	r3, .L1001+12
 	mul	r10, fp, r8
 	ldr	r2, [r3]
@@ -12126,112 +7559,67 @@ FtlGcScanTempBlk:
 	str	r2, [sp, #16]
 	ldr	r1, [r3, #4]
 	str	r3, [sp, #12]
-.LVL1129:
-	.loc 5 243 0
 	ubfx	r0, r1, #10, #16
 	str	r1, [sp, #4]
 	bl	P2V_plane
-.LVL1130:
-	.loc 5 245 0
 	ldr	r2, [sp, #16]
 	ldr	r2, [r2, r10]
 	cbnz	r2, .L987
-	.loc 5 247 0
 	ldr	r3, [sp, #12]
-	.loc 5 248 0
 	movw	r2, #65535
 	add	r8, r8, #1
-.LVL1131:
 	ldr	r1, [sp, #4]
-	.loc 5 247 0
 	ldr	r3, [r3, #12]
-.LVL1132:
-	.loc 5 248 0
 	ldrh	ip, [r3]
 	cmp	ip, r2
 	bne	.L988
-	.loc 5 249 0
 	ldr	r3, .L1001+32
-.LVL1133:
 	movs	r2, #1
 	str	r2, [r3]
-.LVL1134:
 .L982:
-	.loc 5 281 0
 	ldr	r3, .L1001
 	movw	r2, #65535
-	.loc 5 283 0
 	strb	r0, [r5, #6]
-	.loc 5 284 0
 	mov	r1, r4
-	.loc 5 282 0
 	strh	r4, [r5, #2]	@ movhi
-	.loc 5 281 0
 	strh	r2, [r3]	@ movhi
-	.loc 5 284 0
 	mov	r2, r0
 	mov	r0, r5
-.LVL1135:
 	bl	ftl_sb_update_avl_pages
-.LVL1136:
-	.loc 5 285 0
 	b	.L994
-.LVL1137:
 .L988:
-	.loc 5 252 0
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
-.LVL1138:
 	bl	FtlGcUpdatePage
-.LVL1139:
 	b	.L986
-.LVL1140:
 .L987:
-	.loc 5 256 0
 	ldr	r3, .L1001+36
 	movs	r4, #0
-.LVL1141:
 	ldrh	r2, [r5]
 	ldr	r3, [r3]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
-	.loc 5 257 0
 	ldrh	r0, [r5]
-.LVL1142:
 	bl	INSERT_FREE_LIST
-.LVL1143:
-	.loc 5 258 0
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.LVL1144:
-	.loc 5 260 0
 	bl	FtlGcPageVarInit
-.LVL1145:
-	.loc 5 261 0
 	b	.L989
-.LVL1146:
 .L991:
-	.loc 5 268 0 discriminator 1
 	ldr	r1, .L1001
 	movw	r0, #65535
 	ldrh	r3, [r1]
 	cmp	r3, r0
 	beq	.L993
-	.loc 5 269 0
 	add	r3, r3, r7
 	strh	r3, [r1]	@ movhi
-	.loc 5 270 0
 	ldrh	r3, [r2]
 	cmp	r3, r4
 	bls	.L993
-.LVL1147:
 .L994:
-	.loc 5 286 0
 	mov	r0, #-1
 	add	sp, sp, #24
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1148:
 .L1002:
 	.align	2
 .L1001:
@@ -12245,8 +7633,6 @@ FtlGcScanTempBlk:
 	.word	.LANCHOR24
 	.word	.LANCHOR152
 	.word	.LANCHOR42
-	.cfi_endproc
-.LFE313:
 	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
 	.section	.text.FlashTestBlk,"ax",%progbits
 	.align	1
@@ -12257,106 +7643,56 @@ FtlGcScanTempBlk:
 	.fpu softvfp
 	.type	FlashTestBlk, %function
 FlashTestBlk:
-.LFB347:
-	.loc 1 197 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1149:
-	.loc 1 202 0
 	cmp	r0, #11
-	.loc 1 197 0
 	push	{r4, r5, lr}
-	.cfi_def_cfa_offset 12
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
 	mov	r4, r0
 	sub	sp, sp, #92
-	.cfi_def_cfa_offset 104
-	.loc 1 202 0
 	bls	.L1005
-.LVL1150:
-.LBB278:
-.LBB279:
-	.loc 1 206 0
 	ldr	r5, .L1006
-	.loc 1 207 0
 	add	r0, sp, #24
-.LVL1151:
-	.loc 1 208 0
 	movs	r2, #32
 	movs	r1, #165
-	.loc 1 207 0
 	str	r0, [sp, #16]
-	.loc 1 210 0
 	lsls	r4, r4, #10
-.LVL1152:
-	.loc 1 206 0
 	str	r5, [sp, #12]
-	.loc 1 208 0
 	bl	ftl_memset
-.LVL1153:
-	.loc 1 209 0
 	movs	r2, #8
 	movs	r1, #90
 	mov	r0, r5
 	bl	ftl_memset
-.LVL1154:
-	.loc 1 211 0
 	movs	r2, #1
 	add	r0, sp, #4
 	mov	r1, r2
-	.loc 1 210 0
 	str	r4, [sp, #8]
-	.loc 1 211 0
 	bl	FlashEraseBlocks
-.LVL1155:
-	.loc 1 212 0
 	movs	r3, #1
 	add	r0, sp, #4
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL1156:
-	.loc 1 213 0
 	ldr	r4, [sp, #4]
-	.loc 1 219 0
 	movs	r2, #1
 	movs	r1, #0
 	add	r0, sp, #4
-	.loc 1 213 0
 	adds	r4, r4, #0
 	it	ne
 	movne	r4, #1
 	negs	r4, r4
-.LDL1:
-.LVL1157:
-	.loc 1 219 0
 	bl	FlashEraseBlocks
-.LVL1158:
 .L1003:
-.LBE279:
-.LBE278:
-	.loc 1 221 0
 	mov	r0, r4
 	add	sp, sp, #92
-	.cfi_remember_state
-	.cfi_def_cfa_offset 12
 	@ sp needed
 	pop	{r4, r5, pc}
-.LVL1159:
 .L1005:
-	.cfi_restore_state
-	.loc 1 203 0
 	movs	r4, #0
 	b	.L1003
 .L1007:
 	.align	2
 .L1006:
 	.word	ftl_temp_buf
-	.cfi_endproc
-.LFE347:
 	.size	FlashTestBlk, .-FlashTestBlk
 	.section	.text.FlashGetBadBlockList,"ax",%progbits
 	.align	1
@@ -12367,54 +7703,28 @@ FlashTestBlk:
 	.fpu softvfp
 	.type	FlashGetBadBlockList, %function
 FlashGetBadBlockList:
-.LFB348:
-	.loc 1 224 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1160:
 	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 1 227 0
 	mov	r2, #256
-	.loc 1 224 0
 	mov	r5, r1
-	.loc 1 227 0
 	movs	r1, #255
-.LVL1161:
-	.loc 1 224 0
 	mov	r4, r0
-	.loc 1 227 0
 	bl	ftl_memset
-.LVL1162:
-	.loc 1 228 0
 	ldr	r3, .L1015
 	mov	r1, r5
 	mov	r0, r4
 	ldr	r3, [r3]
 	blx	r3
-.LVL1163:
 	uxth	r0, r0
-.LVL1164:
-	.loc 1 229 0
 	cmp	r0, #50
 	bls	.L1009
-	.loc 1 230 0
 	mov	r2, #256
 	movs	r1, #255
 	mov	r0, r4
-.LVL1165:
 	bl	ftl_memset
-.LVL1166:
-	.loc 1 231 0
 	movs	r0, #0
-.LVL1167:
 .L1009:
-	.loc 1 233 0
 	ldr	r3, .L1015+4
 	ldrh	r3, [r3, #14]
 	cmp	r3, #4
@@ -12422,15 +7732,11 @@ FlashGetBadBlockList:
 	add	r1, r4, r0, lsl #1
 	mov	r3, r4
 .L1011:
-	.loc 1 234 0 discriminator 1
 	cmp	r3, r1
 	bne	.L1012
 .L1014:
-	.loc 1 239 0
 	pop	{r3, r4, r5, pc}
-.LVL1168:
 .L1012:
-	.loc 1 235 0 discriminator 3
 	ldrh	r2, [r3]
 	lsrs	r2, r2, #1
 	strh	r2, [r3], #2	@ movhi
@@ -12440,8 +7746,6 @@ FlashGetBadBlockList:
 .L1015:
 	.word	.LANCHOR105
 	.word	.LANCHOR0
-	.cfi_endproc
-.LFE348:
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
 	.section	.text.ftl_memcpy,"ax",%progbits
 	.align	1
@@ -12452,18 +7756,10 @@ FlashGetBadBlockList:
 	.fpu softvfp
 	.type	ftl_memcpy, %function
 ftl_memcpy:
-.LFB350:
-	.loc 1 247 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL1169:
-	.loc 1 248 0
 	b	memcpy
-.LVL1170:
-	.cfi_endproc
-.LFE350:
 	.size	ftl_memcpy, .-ftl_memcpy
 	.section	.text.FtlBbmTblFlush,"ax",%progbits
 	.align	1
@@ -12474,250 +7770,144 @@ ftl_memcpy:
 	.fpu softvfp
 	.type	FtlBbmTblFlush, %function
 FtlBbmTblFlush:
-.LFB229:
-	.loc 4 80 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1171:
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 48
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 4 91 0
 	movs	r4, #0
-	.loc 4 88 0
 	ldr	r7, .L1027
-	.loc 4 89 0
 	movs	r1, #0
-	.loc 4 87 0
 	ldr	r5, .L1027+4
-	.loc 4 88 0
 	ldr	r3, [r7]
 	mov	fp, r7
-	.loc 4 87 0
 	ldr	r8, .L1027+48
 	ldr	r6, .L1027+8
-	.loc 4 88 0
 	str	r3, [r5, #12]
-	.loc 4 91 0
 	ldr	r7, .L1027+12
-	.loc 4 89 0
 	ldr	r3, .L1027+16
-	.loc 4 92 0
 	ldr	r10, .L1027+52
-	.loc 4 87 0
 	ldr	r0, [r8]
-	.loc 4 89 0
 	ldrh	r2, [r3]
-	.loc 4 87 0
 	str	r0, [r5, #8]
-	.loc 4 89 0
 	bl	ftl_memset
-.LVL1172:
 .L1019:
-	.loc 4 91 0 discriminator 1
 	ldrh	r3, [r7]
 	cmp	r4, r3
 	blt	.L1020
-	.loc 4 94 0
 	ldr	r6, [r5, #12]
-.LVL1173:
-	.loc 4 95 0
 	movs	r2, #16
-	.loc 4 98 0
 	ldr	r4, .L1027+20
-.LVL1174:
-	.loc 4 95 0
 	movs	r1, #255
-	.loc 4 84 0
 	movs	r7, #0
-	.loc 4 95 0
 	mov	r0, r6
 	bl	ftl_memset
-.LVL1175:
-	.loc 4 97 0
 	movw	r3, #61649
 	mov	r10, r4
 	strh	r3, [r6]	@ movhi
-	.loc 4 98 0
 	ldr	r3, [r4, #8]
-	.loc 4 82 0
 	str	r7, [sp, #12]
-	.loc 4 98 0
 	str	r3, [r6, #4]
-	.loc 4 99 0
 	ldrh	r3, [r4]
 	strh	r3, [r6, #2]	@ movhi
-	.loc 4 100 0
 	ldrh	r3, [r4, #4]
 	strh	r3, [r6, #8]	@ movhi
-	.loc 4 101 0
 	ldrh	r3, [r4, #6]
 	strh	r3, [r6, #10]	@ movhi
-	.loc 4 102 0
 	ldr	r3, .L1027+24
 	ldr	r3, [r3]
 	strh	r3, [r6, #12]	@ movhi
-.LVL1176:
 .L1021:
-	.loc 4 104 0
 	ldr	r3, [r8]
-	.loc 4 107 0
 	ldrh	r1, [r4]
 	ldrh	r2, [r4, #2]
-	.loc 4 104 0
 	str	r3, [r5, #8]
-	.loc 4 105 0
 	ldr	r3, [fp]
-	.loc 4 108 0
 	ldrh	r0, [r6, #10]
-	.loc 4 105 0
 	str	r3, [r5, #12]
-	.loc 4 106 0
 	movs	r3, #0
 	str	r3, [r5]
-	.loc 4 107 0
 	orr	r3, r2, r1, lsl #10
 	str	r3, [r5, #4]
-	.loc 4 108 0
 	ldrh	r3, [r4, #4]
 	str	r0, [sp]
 	ldr	r0, .L1027+28
 	bl	printf
-.LVL1177:
-	.loc 4 109 0
 	movs	r3, #1
 	ldr	r0, .L1027+4
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL1178:
-	.loc 4 110 0
 	ldr	r3, .L1027+32
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r2, r3
 	blt	.L1022
-	.loc 4 113 0
 	ldr	r3, [r4, #8]
-	.loc 4 117 0
 	mov	r1, #0	@ movhi
-	.loc 4 115 0
 	ldrh	r2, [r4]
-	.loc 4 117 0
 	strh	r1, [r4, #2]	@ movhi
-	.loc 4 113 0
 	adds	r3, r3, #1
 	str	r3, [r4, #8]
-	.loc 4 114 0
 	str	r3, [r6, #4]
-	.loc 4 115 0
 	strh	r2, [r6, #8]	@ movhi
-	.loc 4 116 0
 	ldrh	r3, [r4, #4]
-	.loc 4 118 0
 	strh	r2, [r4, #4]	@ movhi
-	.loc 4 121 0
 	ldr	r2, .L1027+36
-	.loc 4 116 0
 	strh	r3, [r4]	@ movhi
-	.loc 4 119 0
 	lsls	r3, r3, #10
-	.loc 4 121 0
 	ldr	r0, [r2]
-	.loc 4 122 0
 	movs	r2, #1
-	.loc 4 119 0
 	str	r3, [r5, #4]
-	.loc 4 122 0
 	mov	r1, r2
-	.loc 4 121 0
 	str	r3, [r0, #4]
-	.loc 4 122 0
 	bl	FlashEraseBlocks
-.LVL1179:
-	.loc 4 123 0
 	movs	r3, #1
 	ldr	r0, .L1027+4
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL1180:
 .L1022:
-	.loc 4 126 0
 	ldrh	r3, [r10, #2]
 	adds	r3, r3, #1
 	strh	r3, [r10, #2]	@ movhi
-	.loc 4 127 0
 	ldr	r3, [r5]
 	adds	r3, r3, #1
 	bne	.L1023
-	.loc 4 130 0
 	adds	r7, r7, #1
-.LVL1181:
-	.loc 4 129 0
 	ldr	r1, [r5, #4]
-	.loc 4 130 0
 	uxth	r7, r7
-	.loc 4 129 0
 	ldr	r0, .L1027+40
 	bl	printf
-.LVL1182:
-	.loc 4 131 0
 	cmp	r7, #3
 	bls	.L1021
-	.loc 4 132 0
 	mov	r2, r7
 	ldr	r1, [r5, #4]
 	ldr	r0, .L1027+44
 	bl	printf
-.LVL1183:
 .L1025:
 	b	.L1025
-.LVL1184:
 .L1020:
-	.loc 4 92 0 discriminator 3
 	ldrh	r2, [r10]
 	ldr	r3, [r5, #8]
 	ldr	r1, [r6, #4]!
 	mul	r0, r2, r4
 	lsls	r2, r2, #2
-	.loc 4 91 0 discriminator 3
 	adds	r4, r4, #1
-.LVL1185:
-	.loc 4 92 0 discriminator 3
 	add	r0, r3, r0, lsl #2
 	bl	ftl_memcpy
-.LVL1186:
 	b	.L1019
-.LVL1187:
 .L1026:
 	movs	r3, #1
-.LVL1188:
 	str	r3, [sp, #12]
-.LVL1189:
 	b	.L1021
-.LVL1190:
 .L1023:
-	.loc 4 139 0
 	ldr	r3, [sp, #12]
 	cmp	r3, #0
 	beq	.L1026
-	.loc 4 146 0
 	movs	r0, #0
 	add	sp, sp, #16
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1191:
 .L1028:
 	.align	2
 .L1027:
@@ -12735,8 +7925,6 @@ FtlBbmTblFlush:
 	.word	.LC99
 	.word	.LANCHOR107
 	.word	.LANCHOR137
-	.cfi_endproc
-.LFE229:
 	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
 	.section	.text.allocate_data_superblock,"ax",%progbits
 	.align	1
@@ -12747,28 +7935,12 @@ FtlBbmTblFlush:
 	.fpu softvfp
 	.type	allocate_data_superblock, %function
 allocate_data_superblock:
-.LFB301:
-	.loc 2 2582 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1192:
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 48
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 2582 0
 	mov	r4, r0
 	ldr	r8, .L1067
-.LVL1193:
 .L1030:
-	.loc 2 2588 0
 	ldr	r3, .L1067
 	ldr	r6, .L1067+4
 	ldr	fp, .L1067+76
@@ -12778,18 +7950,14 @@ allocate_data_superblock:
 	ldrh	r2, [fp]
 	cmp	r3, r2
 	ble	.L1031
-	.loc 2 2588 0 is_stmt 0 discriminator 1
 	movw	r2, #2588
 	ldr	r1, .L1067+8
 	ldr	r0, .L1067+12
 	bl	printf
-.LVL1194:
 .L1031:
-	.loc 2 2590 0 is_stmt 1
 	ldr	r3, .L1067+16
 	cmp	r4, r3
 	bne	.L1056
-	.loc 2 2591 0
 	ldr	r2, .L1067+20
 	ldrh	r3, [r8]
 	ldr	r2, [r2]
@@ -12798,139 +7966,94 @@ allocate_data_superblock:
 	adds	r1, r1, #1
 	add	r1, r1, r2, lsr #2
 	uxth	r1, r1
-.LVL1195:
-	.loc 2 2595 0
 	cbz	r1, .L1032
-	.loc 2 2596 0
 	subs	r1, r1, #1
-.LVL1196:
 	uxth	r1, r1
-.LVL1197:
 .L1032:
-	.loc 2 2597 0
 	ldr	r0, .L1067+24
 	bl	List_pop_index_node
-.LVL1198:
 	ldrh	r3, [r8]
 	mov	r5, r0
 	uxth	r7, r0
-.LVL1199:
 	cbnz	r3, .L1033
-	.loc 2 2597 0 is_stmt 0 discriminator 1
 	movw	r2, #2597
 	ldr	r1, .L1067+8
 	ldr	r0, .L1067+12
 	bl	printf
-.LVL1200:
 .L1033:
-	.loc 2 2597 0 discriminator 3
 	ldrh	r3, [r8]
-	.loc 2 2601 0 is_stmt 1 discriminator 3
 	mov	r0, r4
-	.loc 2 2597 0 discriminator 3
 	subs	r3, r3, #1
 	strh	r3, [r8]	@ movhi
-	.loc 2 2600 0 discriminator 3
 	strh	r7, [r4]	@ movhi
-	.loc 2 2601 0 discriminator 3
 	bl	make_superblock
-.LVL1201:
-	.loc 2 2602 0 discriminator 3
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	cbnz	r3, .L1034
-	.loc 2 2606 0
 	ldr	r3, .L1067+28
 	uxth	r5, r5
 	movw	r2, #65535
-	.loc 2 2607 0
 	mov	r0, r7
-	.loc 2 2606 0
 	ldr	r3, [r3]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
-	.loc 2 2607 0
 	bl	INSERT_DATA_LIST
-.LVL1202:
-	.loc 2 2608 0
 	ldrh	r2, [r6]
 	ldrh	r3, [r8]
 	add	r3, r3, r2
 	ldrh	r2, [fp]
 	cmp	r3, r2
 	ble	.L1030
-	.loc 2 2608 0 is_stmt 0 discriminator 1
 	mov	r2, #2608
 	ldr	r1, .L1067+8
 	ldr	r0, .L1067+12
 	bl	printf
-.LVL1203:
 	b	.L1030
-.LVL1204:
 .L1056:
 	movs	r1, #0
 	b	.L1032
-.LVL1205:
 .L1034:
-	.loc 2 2611 0 is_stmt 1
 	ldrh	r2, [r6]
 	ldrh	r3, [r8]
 	add	r3, r3, r2
 	ldrh	r2, [fp]
 	cmp	r3, r2
 	ble	.L1036
-	.loc 2 2611 0 is_stmt 0 discriminator 1
 	movw	r2, #2611
 	ldr	r1, .L1067+8
 	ldr	r0, .L1067+12
 	bl	printf
-.LVL1206:
 .L1036:
-	.loc 2 2615 0 is_stmt 1 discriminator 1
 	ldr	r3, .L1067+32
 	movs	r6, #0
-	.loc 2 2614 0 discriminator 1
 	ldr	r2, .L1067+36
 	add	ip, r4, #16
-	.loc 2 2615 0 discriminator 1
 	mov	lr, r6
-	.loc 2 2617 0 discriminator 1
 	movw	r10, #65535
-	.loc 2 2615 0 discriminator 1
 	ldr	r0, [r3]
 	ldrh	r1, [r2]
 	movs	r2, #20
-	.loc 2 2618 0 discriminator 1
 	str	r2, [sp, #4]
 	mov	r3, r0
 	mla	r1, r2, r1, r0
 	str	r1, [sp]
 .L1037:
-.LVL1207:
-	.loc 2 2614 0 discriminator 1
 	ldr	r2, [sp]
 	cmp	r2, r3
 	bne	.L1039
-	.loc 2 2622 0
 	cbnz	r6, .L1040
-	.loc 2 2622 0 is_stmt 0 discriminator 1
 	movw	r2, #2622
 	ldr	r1, .L1067+8
 	ldr	r0, .L1067+12
 	bl	printf
-.LVL1208:
 .L1040:
-	.loc 2 2624 0 is_stmt 1
 	ldr	r3, .L1067+40
 	ldrh	r3, [r3]
 	cmp	r3, r7
 	bne	.L1041
-	.loc 2 2624 0 is_stmt 0 discriminator 1
 	mov	r2, #2624
 	ldr	r1, .L1067+8
 	ldr	r0, .L1067+12
 	bl	printf
-.LVL1209:
 .L1041:
-	.loc 2 2625 0 is_stmt 1
 	ldrb	r1, [r4, #8]	@ zero_extendqisi2
 	uxth	r5, r5
 	ldr	r2, .L1067+44
@@ -12938,34 +8061,26 @@ allocate_data_superblock:
 	ldr	r10, .L1067+80
 	cmp	r1, #0
 	bne	.L1042
-	.loc 2 2626 0
 	ldr	r0, [r2]
 	ldrh	lr, [r0, r5, lsl #1]
 	cmp	lr, #0
 	beq	.L1043
-	.loc 2 2627 0
 	ldr	r1, .L1067+52
 	ldrh	ip, [r1]
 	add	r1, lr, ip
 .L1066:
-	.loc 2 2629 0
 	strh	r1, [r0, r5, lsl #1]	@ movhi
-	.loc 2 2631 0
 	mov	r0, r7
-	.loc 2 2630 0
 	ldr	r1, [r3]
 	str	r2, [sp, #4]
 	str	r3, [sp]
 	adds	r1, r1, #1
 	str	r1, [r3]
-	.loc 2 2631 0
 	movs	r1, #0
 	bl	ftl_set_blk_mode
-.LVL1210:
 	ldr	r3, [sp]
 	ldr	r2, [sp, #4]
 .L1045:
-	.loc 2 2638 0
 	ldr	r2, [r2]
 	lsls	r1, r5, #1
 	str	r1, [sp]
@@ -12973,154 +8088,96 @@ allocate_data_superblock:
 	ldr	r2, .L1067+56
 	ldr	r1, [r2]
 	cmp	r0, r1
-	.loc 2 2641 0
 	ldrh	r1, [fp]
-	.loc 2 2639 0
 	it	hi
 	strhi	r0, [r2]
-	.loc 2 2641 0
 	ldr	r2, .L1067+52
 	ldr	r0, [r3]
 	ldr	r3, [r10]
 	ldrh	r2, [r2]
 	mla	r0, r0, r2, r3
 	bl	__aeabi_uidiv
-.LVL1211:
 	ldr	r3, .L1067+60
-	.loc 2 2645 0
 	ldr	ip, .L1067+84
-	.loc 2 2641 0
 	str	r0, [r3]
-	.loc 2 2642 0
 	ldr	r3, .L1067+64
 	ldr	r2, [r3]
 	ldr	r3, [r2, #16]
 	adds	r3, r3, #1
 	str	r3, [r2, #16]
-.LVL1212:
 	movs	r2, #20
-	.loc 2 2645 0
 	ldr	r3, .L1067+32
 	ldr	r0, [r3]
 	adds	r3, r0, #4
 	mla	r2, r2, r6, r0
 	adds	r2, r2, #24
-.LVL1213:
 .L1047:
 	adds	r3, r3, #20
-	.loc 2 2644 0 discriminator 1
 	cmp	r2, r3
 	bne	.L1048
-	.loc 2 2646 0
 	ldrb	r1, [r4, #8]	@ zero_extendqisi2
 	mov	r2, r6
-	.loc 2 2648 0
 	mov	r10, #0
-	.loc 2 2646 0
 	bl	FlashEraseBlocks
-.LVL1214:
-	.loc 2 2647 0
 	mov	r3, r10
-	.loc 2 2649 0
 	movs	r1, #20
-.LVL1215:
 .L1049:
-	.loc 2 2648 0 discriminator 1
 	uxth	r2, r10
 	cmp	r6, r2
 	bhi	.L1051
-	.loc 2 2659 0
 	cbz	r3, .L1052
-	.loc 2 2660 0
 	mov	r0, r7
 	bl	update_multiplier_value
-.LVL1216:
-	.loc 2 2661 0
 	bl	FtlBbmTblFlush
-.LVL1217:
 .L1052:
-	.loc 2 2664 0
 	ldrb	r2, [r4, #7]	@ zero_extendqisi2
 	ldr	r1, .L1067+28
 	cmp	r2, #0
 	bne	.L1053
-	.loc 2 2666 0
 	ldr	r3, [r1]
 	movw	r2, #65535
-	.loc 2 2667 0
 	mov	r0, r7
-	.loc 2 2666 0
 	strh	r2, [r3, r5, lsl #1]	@ movhi
-	.loc 2 2667 0
 	bl	INSERT_DATA_LIST
-.LVL1218:
-	.loc 2 2668 0
 	b	.L1030
-.LVL1219:
 .L1039:
-	.loc 2 2617 0
 	ldrh	r1, [ip], #2
-	.loc 2 2615 0
 	str	lr, [r3, #8]
-	.loc 2 2616 0
 	str	lr, [r3, #12]
-	.loc 2 2617 0
 	cmp	r1, r10
 	beq	.L1038
-	.loc 2 2618 0
 	ldr	r2, [sp, #4]
 	lsls	r1, r1, #10
 	mla	r2, r2, r6, r0
-	.loc 2 2619 0
 	adds	r6, r6, #1
-.LVL1220:
 	uxth	r6, r6
-.LVL1221:
-	.loc 2 2618 0
 	str	r1, [r2, #4]
 .L1038:
 	adds	r3, r3, #20
 	b	.L1037
 .L1043:
-	.loc 2 2629 0
 	movs	r1, #2
 	b	.L1066
 .L1042:
-	.loc 2 2633 0
 	ldr	r0, [r2]
 	str	r3, [sp, #4]
 	str	r2, [sp]
 	ldrh	r1, [r0, r5, lsl #1]
 	adds	r1, r1, #1
 	strh	r1, [r0, r5, lsl #1]	@ movhi
-.LBB280:
-.LBB281:
 	mov	r0, r7
-.LBE281:
-.LBE280:
-	.loc 2 2634 0
 	ldr	r1, [r10]
 	adds	r1, r1, #1
 	str	r1, [r10]
-.LVL1222:
-.LBB283:
-.LBB282:
 	bl	ftl_set_blk_mode.part.6
-.LVL1223:
 	ldm	sp, {r2, r3}
 	b	.L1045
-.LVL1224:
 .L1048:
-.LBE282:
-.LBE283:
-	.loc 2 2645 0 discriminator 3
 	ldr	r1, [r3, #-20]
 	and	r1, r1, ip
 	str	r1, [r3, #-20]
 	b	.L1047
-.LVL1225:
 .L1051:
-	.loc 2 2649 0
 	ldr	r0, .L1067+32
 	mul	r2, r1, r10
 	ldr	r0, [r0]
@@ -13128,89 +8185,56 @@ allocate_data_superblock:
 	ldr	r2, [r0, r2]
 	adds	r0, r2, #1
 	bne	.L1050
-	.loc 2 2651 0
 	ldr	r0, [ip, #4]
-	.loc 2 2650 0
 	adds	r3, r3, #1
-.LVL1226:
 	str	r1, [sp, #12]
 	str	r2, [sp, #8]
-	.loc 2 2652 0
 	ubfx	r0, r0, #10, #16
-	.loc 2 2650 0
 	str	r3, [sp, #4]
-.LVL1227:
-	.loc 2 2652 0
 	bl	FtlBbmMapBadBlock
-.LVL1228:
-	.loc 2 2653 0
 	ldr	r2, [sp, #8]
 	add	r0, r4, r10, lsl #1
-	.loc 2 2654 0
 	ldr	r1, [sp, #12]
 	ldr	r3, [sp, #4]
-	.loc 2 2653 0
 	strh	r2, [r0, #16]	@ movhi
-	.loc 2 2654 0
 	ldrb	r2, [r4, #7]	@ zero_extendqisi2
 	subs	r2, r2, #1
 	strb	r2, [r4, #7]
-.LVL1229:
 .L1050:
 	add	r10, r10, #1
-.LVL1230:
 	b	.L1049
-.LVL1231:
 .L1053:
-	.loc 2 2671 0
 	ldr	r3, .L1067+68
-	.loc 2 2675 0
 	ldr	r0, .L1067+72
-	.loc 2 2671 0
 	ldrh	r3, [r3]
-	.loc 2 2672 0
 	strh	r7, [r4]	@ movhi
-	.loc 2 2671 0
 	smulbb	r3, r3, r2
-	.loc 2 2673 0
 	movs	r2, #0
 	strh	r2, [r4, #2]	@ movhi
-	.loc 2 2674 0
 	strb	r2, [r4, #6]
-	.loc 2 2675 0
 	ldr	r2, [r0]
-	.loc 2 2671 0
 	uxth	r3, r3
 	strh	r3, [r4, #4]	@ movhi
-	.loc 2 2675 0
 	str	r2, [r4, #12]
 	adds	r2, r2, #1
 	str	r2, [r0]
-	.loc 2 2676 0
 	ldr	r2, [r1]
 	ldr	r1, [sp]
 	strh	r3, [r2, r1]	@ movhi
-	.loc 2 2677 0
 	ldrh	r3, [r4, #4]
 	cbz	r3, .L1054
-	.loc 2 2677 0 is_stmt 0 discriminator 2
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	cbnz	r3, .L1055
 .L1054:
-	.loc 2 2677 0 discriminator 3
 	movw	r2, #2677
 	ldr	r1, .L1067+8
 	ldr	r0, .L1067+12
 	bl	printf
-.LVL1232:
 .L1055:
-	.loc 2 2679 0 is_stmt 1
 	movs	r0, #0
 	add	sp, sp, #16
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1233:
 .L1068:
 	.align	2
 .L1067:
@@ -13236,8 +8260,6 @@ allocate_data_superblock:
 	.word	.LANCHOR5
 	.word	.LANCHOR73
 	.word	-1024
-	.cfi_endproc
-.LFE301:
 	.size	allocate_data_superblock, .-allocate_data_superblock
 	.section	.text.FtlGcFreeBadSuperBlk,"ax",%progbits
 	.align	1
@@ -13248,135 +8270,72 @@ allocate_data_superblock:
 	.fpu softvfp
 	.type	FtlGcFreeBadSuperBlk, %function
 FtlGcFreeBadSuperBlk:
-.LFB320:
-	.loc 5 390 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1234:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 5 390 0
 	mov	r10, r0
-	.loc 5 395 0
 	ldr	r4, .L1081
 	ldrh	r3, [r4]
 	cbz	r3, .L1070
-.LBB286:
-.LBB287:
-	.loc 5 399 0
 	ldr	r8, .L1081+16
-.LBE287:
-.LBE286:
 	movs	r6, #0
-.LVL1235:
 .L1071:
-.LBB290:
-.LBB288:
-	.loc 5 396 0
 	ldr	r3, .L1081+4
 	ldrh	r2, [r3]
 	uxth	r3, r6
 	cmp	r2, r3
 	bhi	.L1077
-	.loc 5 412 0
 	bl	FtlGcReFreshBadBlk
-.LVL1236:
 .L1070:
-.LBE288:
-.LBE290:
-	.loc 5 415 0
 	movs	r0, #0
 	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1237:
 .L1077:
-	.cfi_restore_state
-.LBB291:
-.LBB289:
-	.loc 5 397 0
 	ldr	r2, .L1081+8
 	uxth	r3, r6
 	mov	r1, r10
 	movs	r7, #0
 	ldrb	r0, [r2, r3]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL1238:
-	.loc 5 401 0
 	ldr	r2, .L1081+12
-	.loc 5 397 0
 	mov	fp, r0
-.LVL1239:
 .L1072:
-	.loc 5 398 0
 	ldrh	r3, [r4]
 	uxth	r5, r7
-.LVL1240:
 	cmp	r3, r5
 	bhi	.L1076
-.LVL1241:
 	adds	r6, r6, #1
-.LVL1242:
 	b	.L1071
-.LVL1243:
 .L1076:
-	.loc 5 399 0
 	uxth	r3, r7
 	ldrh	r1, [r8, r3, lsl #1]
 	cmp	r1, fp
 	bne	.L1073
-	.loc 5 401 0
 	mov	r1, fp
 	mov	r0, r2
 	str	r3, [sp, #4]
 	str	r2, [sp]
 	bl	printf
-.LVL1244:
-	.loc 5 403 0
 	mov	r0, fp
 	bl	FtlBbmMapBadBlock
-.LVL1245:
-	.loc 5 404 0
 	bl	FtlBbmTblFlush
-.LVL1246:
 	ldr	r3, [sp, #4]
-	.loc 5 405 0
 	ldrh	r1, [r4]
 	ldr	r2, [sp]
 	add	r3, r8, r3, lsl #1
-.LVL1247:
 .L1074:
 	cmp	r5, r1
 	bcc	.L1075
-	.loc 5 407 0
 	subs	r1, r1, #1
 	strh	r1, [r4]	@ movhi
-.LVL1248:
 .L1073:
 	adds	r7, r7, #1
-.LVL1249:
 	b	.L1072
-.LVL1250:
 .L1075:
-	.loc 5 406 0
 	ldrh	r0, [r3, #2]!
-	.loc 5 405 0
 	adds	r5, r5, #1
-.LVL1251:
 	uxth	r5, r5
-.LVL1252:
-	.loc 5 406 0
 	strh	r0, [r3, #-2]	@ movhi
 	b	.L1074
 .L1082:
@@ -13387,10 +8346,6 @@ FtlGcFreeBadSuperBlk:
 	.word	.LANCHOR13
 	.word	.LC100
 	.word	.LANCHOR102
-.LBE289:
-.LBE291:
-	.cfi_endproc
-.LFE320:
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
 	.section	.text.update_vpc_list,"ax",%progbits
 	.align	1
@@ -13401,67 +8356,40 @@ FtlGcFreeBadSuperBlk:
 	.fpu softvfp
 	.type	update_vpc_list, %function
 update_vpc_list:
-.LFB304:
-	.loc 2 2738 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1253:
 	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 2 2738 0
 	mov	r4, r0
-	.loc 2 2739 0
 	ldr	r3, .L1093
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
 	bne	.L1084
-	.loc 2 2740 0
 	ldr	r2, .L1093+4
 	ldrh	r1, [r2]
 	cmp	r1, r0
 	bne	.L1085
-	.loc 2 2742 0
 	movw	r3, #65535
 	strh	r3, [r2]	@ movhi
 .L1086:
-.LVL1254:
-.LBB294:
-.LBB295:
-	.loc 2 2747 0
 	ldr	r5, .L1093+8
 	mov	r1, r4
 	ldr	r0, .L1093+12
-.LVL1255:
 	bl	List_remove_node
-.LVL1256:
 	ldrh	r3, [r5]
 	cbnz	r3, .L1088
 	movw	r2, #2747
 	ldr	r1, .L1093+16
 	ldr	r0, .L1093+20
 	bl	printf
-.LVL1257:
 .L1088:
 	ldrh	r3, [r5]
-	.loc 2 2748 0
 	mov	r0, r4
-	.loc 2 2747 0
 	subs	r3, r3, #1
 	strh	r3, [r5]	@ movhi
-	.loc 2 2748 0
 	bl	free_data_superblock
-.LVL1258:
-	.loc 2 2749 0
 	mov	r0, r4
 	bl	FtlGcFreeBadSuperBlk
-.LVL1259:
-	.loc 2 2750 0
 	ldr	r3, .L1093+24
 	ldrh	r2, [r5]
 	ldrh	r3, [r3]
@@ -13474,40 +8402,27 @@ update_vpc_list:
 	ldr	r1, .L1093+16
 	ldr	r0, .L1093+20
 	bl	printf
-.LVL1260:
 .L1092:
 	movs	r3, #1
 	b	.L1083
-.LVL1261:
 .L1085:
-.LBE295:
-.LBE294:
-	.loc 2 2743 0
 	ldr	r2, .L1093+32
 	ldrh	r2, [r2]
 	cmp	r2, r0
 	beq	.L1083
-	.loc 2 2743 0 is_stmt 0 discriminator 1
 	ldr	r2, .L1093+36
 	ldrh	r2, [r2]
 	cmp	r2, r0
 	beq	.L1083
-	.loc 2 2743 0 discriminator 2
 	ldr	r2, .L1093+40
 	ldrh	r2, [r2]
 	cmp	r2, r0
 	bne	.L1086
-.LVL1262:
 .L1083:
-	.loc 2 2756 0 is_stmt 1
 	mov	r0, r3
 	pop	{r3, r4, r5, pc}
-.LVL1263:
 .L1084:
-	.loc 2 2753 0
 	bl	List_update_data_list
-.LVL1264:
-	.loc 2 2755 0
 	movs	r3, #0
 	b	.L1083
 .L1094:
@@ -13524,8 +8439,6 @@ update_vpc_list:
 	.word	.LANCHOR51
 	.word	.LANCHOR52
 	.word	.LANCHOR53
-	.cfi_endproc
-.LFE304:
 	.size	update_vpc_list, .-update_vpc_list
 	.section	.text.decrement_vpc_count,"ax",%progbits
 	.align	1
@@ -13536,98 +8449,56 @@ update_vpc_list:
 	.fpu softvfp
 	.type	decrement_vpc_count, %function
 decrement_vpc_count:
-.LFB305:
-	.loc 2 2759 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1265:
-	.loc 2 2762 0
 	movw	r3, #65535
-	.loc 2 2759 0
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 2 2762 0
 	cmp	r0, r3
-	.loc 2 2759 0
 	mov	r4, r0
-	.loc 2 2762 0
 	beq	.L1096
-	.loc 2 2763 0
 	ldr	r5, .L1104
 	ldr	r3, [r5]
 	ldrh	r2, [r3, r0, lsl #1]
 	cbnz	r2, .L1097
-	.loc 2 2764 0
 	mov	r1, r0
 	ldr	r0, .L1104+4
-.LVL1266:
 	bl	printf
-.LVL1267:
-	.loc 2 2765 0
 	ldr	r3, [r5]
 	ldrh	r5, [r3, r4, lsl #1]
 	cbz	r5, .L1098
 .L1102:
-	.loc 2 2774 0
 	movs	r5, #0
-.LVL1268:
 .L1095:
-	.loc 2 2784 0
 	mov	r0, r5
 	pop	{r4, r5, r6, pc}
-.LVL1269:
 .L1098:
-	.loc 2 2765 0 discriminator 1
 	movw	r2, #2765
-.LVL1270:
 .L1103:
-	.loc 2 2781 0 discriminator 2
 	ldr	r1, .L1104+8
 	ldr	r0, .L1104+12
 	bl	printf
-.LVL1271:
 	b	.L1095
-.LVL1272:
 .L1097:
-	.loc 2 2768 0
 	subs	r2, r2, #1
 	strh	r2, [r3, r0, lsl #1]	@ movhi
 .L1096:
-	.loc 2 2772 0
 	ldr	r6, .L1104+16
 	movw	r3, #65535
 	ldrh	r0, [r6]
-.LVL1273:
 	cmp	r0, r3
 	bne	.L1100
-	.loc 2 2773 0
 	strh	r4, [r6]	@ movhi
 	b	.L1102
 .L1100:
-	.loc 2 2775 0
 	cmp	r4, r0
 	beq	.L1102
-	.loc 2 2778 0
 	bl	update_vpc_list
-.LVL1274:
-	.loc 2 2781 0
 	ldr	r3, .L1104+20
-	.loc 2 2778 0
 	adds	r5, r0, #0
-	.loc 2 2781 0
 	ldr	r2, .L1104+24
-	.loc 2 2778 0
 	it	ne
 	movne	r5, #1
-.LVL1275:
-	.loc 2 2780 0
 	strh	r4, [r6]	@ movhi
-	.loc 2 2781 0
 	ldr	r3, [r3]
 	ldr	r2, [r2]
 	subs	r3, r3, r2
@@ -13640,10 +8511,8 @@ decrement_vpc_count:
 	ldrh	r2, [r2, r1, lsl #1]
 	cmp	r2, #0
 	bne	.L1095
-	.loc 2 2781 0 is_stmt 0 discriminator 1
 	cmp	r4, r1
 	beq	.L1095
-	.loc 2 2781 0 discriminator 2
 	movw	r2, #2781
 	b	.L1103
 .L1105:
@@ -13657,8 +8526,6 @@ decrement_vpc_count:
 	.word	.LANCHOR41
 	.word	.LANCHOR40
 	.word	-1431655765
-	.cfi_endproc
-.LFE305:
 	.size	decrement_vpc_count, .-decrement_vpc_count
 	.section	.text.FtlWriteDump_data,"ax",%progbits
 	.align	1
@@ -13669,188 +8536,103 @@ decrement_vpc_count:
 	.fpu softvfp
 	.type	FtlWriteDump_data, %function
 FtlWriteDump_data:
-.LFB271:
-	.loc 2 996 0 is_stmt 1
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
 	sub	sp, sp, #24
-	.cfi_def_cfa_offset 56
-	.loc 2 997 0
 	ldr	r4, .L1125
 	ldrh	r2, [r4, #4]
 	cmp	r2, #0
 	beq	.L1107
-	.loc 2 997 0 is_stmt 0 discriminator 1
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #0
 	bne	.L1107
-	.loc 2 998 0 is_stmt 1
 	ldr	r3, .L1125+4
 	ldrb	r1, [r4, #7]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	muls	r3, r1, r3
 	cmp	r2, r3
 	beq	.L1107
-.LVL1276:
-.LBB299:
-.LBB300:
-	.loc 2 1005 0
 	ldrb	r7, [r4, #10]	@ zero_extendqisi2
 	cbnz	r7, .L1106
-	.loc 2 1000 0
 	ldr	r3, .L1125+8
-	.loc 2 1007 0
 	mov	r2, r7
 	mov	r1, sp
-	.loc 2 1000 0
 	ldr	r6, [r3]
-	.loc 2 1002 0
 	ldr	r3, .L1125+12
-	.loc 2 1000 0
 	subs	r6, r6, #1
-	.loc 2 1007 0
 	mov	r0, r6
-	.loc 2 1002 0
 	ldrh	r8, [r3]
-	.loc 2 1007 0
 	bl	log2phys
-.LVL1277:
-	.loc 2 1012 0
 	ldr	r2, .L1125+16
-	.loc 2 1010 0
 	ldr	r3, [sp]
-	.loc 2 1011 0
 	str	r6, [sp, #20]
-	.loc 2 1012 0
 	ldr	r0, [r2]
-	.loc 2 1013 0
 	ldr	r2, .L1125+20
-	.loc 2 1010 0
 	str	r3, [sp, #8]
-	.loc 2 1016 0
 	adds	r3, r3, #1
-	.loc 2 1012 0
 	str	r0, [sp, #12]
-	.loc 2 1013 0
 	ldr	r5, [r2]
 	str	r5, [sp, #16]
-.LVL1278:
-	.loc 2 1015 0
 	str	r7, [r5, #4]
-	.loc 2 1016 0
 	beq	.L1109
-	.loc 2 1018 0
 	mov	r2, r7
 	movs	r1, #1
 	add	r0, sp, #4
 	bl	FlashReadPages
-.LVL1279:
 .L1110:
-	.loc 2 1035 0
 	ldr	fp, .L1125
-	.loc 2 1002 0
 	lsl	r8, r8, #2
-.LVL1280:
-	.loc 2 1036 0
 	ldr	r10, .L1125+28
-	.loc 2 1024 0
 	movs	r7, #0
 	movw	r3, #61589
 	strh	r3, [r5]	@ movhi
 .L1111:
-	.loc 2 1025 0
 	cmp	r8, r7
 	bne	.L1115
 .L1112:
-	.loc 2 1041 0
 	movs	r3, #1
-.LVL1281:
 .L1124:
-.LBE300:
-.LBE299:
-	.loc 2 1047 0
 	strb	r3, [r4, #10]
 .L1106:
-	.loc 2 1049 0
 	add	sp, sp, #24
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1282:
 .L1109:
-	.cfi_restore_state
-.LBB302:
-.LBB301:
-	.loc 2 1022 0
 	ldr	r3, .L1125+24
 	movs	r1, #255
 	ldrh	r2, [r3]
 	bl	ftl_memset
-.LVL1283:
 	b	.L1110
-.LVL1284:
 .L1115:
-	.loc 2 1027 0
 	ldrh	r3, [r4, #4]
 	cmp	r3, #0
 	beq	.L1112
-	.loc 2 1032 0
 	ldr	r3, [sp, #8]
-	.loc 2 1035 0
 	mov	r0, fp
-	.loc 2 1031 0
 	str	r6, [r5, #8]
 	adds	r7, r7, #1
-	.loc 2 1032 0
 	str	r3, [r5, #12]
-	.loc 2 1033 0
 	ldrh	r3, [r4]
 	strh	r3, [r5, #2]	@ movhi
-	.loc 2 1035 0
 	bl	get_new_active_ppa
-.LVL1285:
-	.loc 2 1036 0
 	ldr	r3, [r10]
-	.loc 2 1037 0
 	movs	r1, #1
-	.loc 2 1035 0
 	str	r0, [sp, #8]
-	.loc 2 1037 0
 	add	r0, sp, #4
-	.loc 2 1036 0
 	str	r3, [r5, #4]
 	adds	r3, r3, #1
 	adds	r2, r3, #1
 	it	eq
 	moveq	r3, #0
 	str	r3, [r10]
-	.loc 2 1037 0
 	movs	r3, #0
 	mov	r2, r3
 	bl	FlashProgPages
-.LVL1286:
-	.loc 2 1039 0
 	ldrh	r0, [r4]
 	bl	decrement_vpc_count
-.LVL1287:
 	b	.L1111
-.LVL1288:
 .L1107:
-.LBE301:
-.LBE302:
-	.loc 2 1047 0
 	movs	r3, #0
 	b	.L1124
 .L1126:
@@ -13864,8 +8646,6 @@ FtlWriteDump_data:
 	.word	.LANCHOR108
 	.word	.LANCHOR23
 	.word	.LANCHOR71
-	.cfi_endproc
-.LFE271:
 	.size	FtlWriteDump_data, .-FtlWriteDump_data
 	.section	.text.l2p_flush,"ax",%progbits
 	.align	1
@@ -13876,39 +8656,21 @@ FtlWriteDump_data:
 	.fpu softvfp
 	.type	l2p_flush, %function
 l2p_flush:
-.LFB264:
-	.loc 2 789 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 2 795 0
 	movs	r4, #0
 	ldr	r5, .L1131
-	.loc 2 796 0
 	ldr	r6, .L1131+4
-	.loc 2 793 0
 	bl	FtlWriteDump_data
-.LVL1289:
 .L1128:
-	.loc 2 795 0 discriminator 1
 	ldrh	r3, [r5]
 	uxth	r0, r4
-.LVL1290:
 	cmp	r3, r0
 	bhi	.L1130
-	.loc 2 799 0
 	movs	r0, #0
-.LVL1291:
 	pop	{r4, r5, r6, pc}
-.LVL1292:
 .L1130:
-	.loc 2 796 0
 	ldr	r2, [r6]
 	uxth	r3, r4
 	movs	r1, #12
@@ -13916,20 +8678,15 @@ l2p_flush:
 	ldr	r3, [r3, #4]
 	cmp	r3, #0
 	bge	.L1129
-	.loc 2 797 0
 	bl	flush_l2p_region
-.LVL1293:
 .L1129:
 	adds	r4, r4, #1
-.LVL1294:
 	b	.L1128
 .L1132:
 	.align	2
 .L1131:
 	.word	.LANCHOR33
 	.word	.LANCHOR55
-	.cfi_endproc
-.LFE264:
 	.size	l2p_flush, .-l2p_flush
 	.section	.text.FtlRecoverySuperblock,"ax",%progbits
 	.align	1
@@ -13940,109 +8697,58 @@ l2p_flush:
 	.fpu softvfp
 	.type	FtlRecoverySuperblock, %function
 FtlRecoverySuperblock:
-.LFB284:
-	.loc 2 1705 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 48
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1295:
-	.loc 2 1719 0
 	ldrh	r3, [r0]
 	movw	r2, #65535
-	.loc 2 1705 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
 	mov	r8, r0
 	sub	sp, sp, #48
-	.cfi_def_cfa_offset 80
-	.loc 2 1719 0
 	cmp	r3, r2
 	beq	.L1262
-	.loc 2 1724 0
 	ldrh	r3, [r0, #2]
 	str	r3, [sp, #4]
-.LVL1296:
-	.loc 2 1725 0
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
-	.loc 2 1730 0
 	ldr	r1, [sp, #4]
-	.loc 2 1725 0
 	str	r3, [sp, #20]
-.LVL1297:
-	.loc 2 1730 0
 	ldr	r3, .L1270
 	ldrh	r3, [r3]
 	cmp	r3, r1
 	mov	r3, #0
 	bne	.L1136
-	.loc 2 1731 0
 	strh	r3, [r0, #4]	@ movhi
-.LVL1298:
 .L1268:
-	.loc 2 2038 0
 	strb	r3, [r8, #6]
-.LVL1299:
 .L1262:
-	.loc 2 2059 0
 	movs	r0, #0
 	add	sp, sp, #48
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1300:
 .L1136:
-	.cfi_restore_state
-	.loc 2 1738 0
 	ldrh	r0, [r0, #16]
-.LVL1301:
 .L1137:
-	.loc 2 1739 0
 	cmp	r0, r2
 	uxth	r5, r3
-.LVL1302:
 	add	r3, r3, #1
 	beq	.L1138
-	.loc 2 1746 0
 	movs	r1, #1
 	bl	FtlGetLastWrittenPage
-.LVL1303:
 	mov	r4, r0
-.LVL1304:
-	.loc 2 1754 0
 	adds	r0, r0, #1
-.LVL1305:
 	beq	.L1139
-	.loc 2 1766 0
 	ldr	r3, .L1270+4
-	.loc 2 1771 0
 	movs	r2, #0
 	mov	r5, r2
-.LVL1306:
-	.loc 2 1768 0
 	movw	fp, #65535
-	.loc 2 1769 0
 	mov	r10, #20
-	.loc 2 1766 0
 	ldrh	ip, [r3]
-	.loc 2 1769 0
 	ldr	r3, .L1270+8
 	ldr	r0, [r3]
-	.loc 2 1770 0
 	ldr	r3, .L1270+12
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
 	ldr	r3, .L1270+16
 	ldrh	r7, [r3]
-	.loc 2 1771 0
 	ldr	r3, .L1270+20
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
@@ -14052,353 +8758,214 @@ FtlRecoverySuperblock:
 	str	r3, [sp, #16]
 	str	r3, [sp]
 .L1140:
-.LVL1307:
-	.loc 2 1766 0 discriminator 1
 	uxth	r3, r2
 	cmp	ip, r3
 	bhi	.L1144
-	.loc 2 1776 0
 	movs	r2, #0
-.LVL1308:
 	mov	r1, r5
 	bl	FlashReadPages
-.LVL1309:
-	.loc 2 1777 0
 	ldr	r2, .L1270+28
-	.loc 2 1791 0
 	uxth	r1, r4
-	.loc 2 1715 0
 	movw	fp, #65535
-	.loc 2 1791 0
 	str	r1, [sp, #12]
-	.loc 2 1777 0
 	ldr	r3, [r2]
 	subs	r3, r3, #1
 	str	r3, [sp]
-.LVL1310:
-	.loc 2 1779 0
 	ldr	r3, .L1270+8
-.LVL1311:
 	ldr	r10, [r3]
-	.loc 2 1778 0
 	movs	r3, #0
 	mov	r7, r10
-.LVL1312:
 .L1145:
 	uxth	r1, r3
-.LVL1313:
-	.loc 2 1778 0 is_stmt 0 discriminator 1
 	cmp	r5, r1
 	bhi	.L1150
-	.loc 2 1794 0 is_stmt 1
 	bne	.L1148
-	.loc 2 1796 0
 	adds	r3, r4, #1
 	uxth	r3, r3
 	str	r3, [sp, #8]
-.LVL1314:
 .L1263:
-	.loc 2 1802 0
 	ldr	r0, [r10, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_plane
-.LVL1315:
-	.loc 2 1807 0
 	ldr	r3, .L1270
-	.loc 2 1802 0
 	mov	r10, r0
-.LVL1316:
-	.loc 2 1807 0
 	ldr	r2, [sp, #8]
 	ldrh	r3, [r3]
 	cmp	r3, r2
 	bne	.L1152
-	.loc 2 1808 0
 	ldrh	r3, [sp, #8]
 	strh	r3, [r8, #2]	@ movhi
-	.loc 2 1809 0
 	movs	r3, #0
 	strb	r3, [r8, #6]
-	.loc 2 1810 0
 	strh	r3, [r8, #4]	@ movhi
 .L1152:
-	.loc 2 1813 0
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #4]
 	cmp	r3, r2
 	bne	.L1153
-	.loc 2 1813 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #20]
 	cmp	r10, r3
 	bne	.L1153
-	.loc 2 1814 0 is_stmt 1
 	ldr	r1, [sp, #8]
 	mov	r2, r10
-.LVL1317:
 .L1269:
-	.loc 2 2053 0
 	mov	r0, r8
 	bl	ftl_sb_update_avl_pages
-.LVL1318:
 	b	.L1262
-.LVL1319:
 .L1138:
-	.loc 2 1741 0
 	uxth	r1, r3
 	adds	r1, r1, #8
 	ldrh	r0, [r8, r1, lsl #1]
-.LVL1320:
 	b	.L1137
-.LVL1321:
 .L1139:
-	.loc 2 1755 0
 	ldr	r3, [sp, #4]
 	cbz	r3, .L1141
-	.loc 2 1755 0 is_stmt 0 discriminator 1
 	movw	r2, #1755
 	ldr	r1, .L1270+32
 	ldr	r0, .L1270+36
 	bl	printf
-.LVL1322:
 .L1141:
-	.loc 2 1756 0 is_stmt 1
 	ldr	r3, [sp, #20]
 	cbz	r3, .L1142
-	.loc 2 1756 0 is_stmt 0 discriminator 1
 	cmp	r5, r3
 	beq	.L1142
-	.loc 2 1756 0 discriminator 2
 	movw	r2, #1756
 	ldr	r1, .L1270+32
 	ldr	r0, .L1270+36
 	bl	printf
-.LVL1323:
 .L1142:
-	.loc 2 1757 0 is_stmt 1
 	movs	r3, #0
 	strh	r3, [r8, #2]	@ movhi
 	b	.L1268
-.LVL1324:
 .L1144:
-	.loc 2 1767 0
 	ldr	r1, [sp]
 	ldrh	r3, [r1], #2
-	.loc 2 1768 0
 	cmp	r3, fp
-	.loc 2 1767 0
 	str	r1, [sp]
-.LVL1325:
-	.loc 2 1768 0
 	beq	.L1143
-	.loc 2 1769 0
 	mla	r1, r10, r5, r0
-	.loc 2 1770 0
 	ldr	r6, [sp, #8]
-	.loc 2 1769 0
 	orr	r3, r4, r3, lsl #10
-.LVL1326:
 	str	r3, [r1, #4]
-	.loc 2 1770 0
 	mul	r3, r7, r5
 	bic	r3, r3, #3
 	add	r3, r3, r6
-	.loc 2 1771 0
 	ldr	r6, [sp, #12]
-	.loc 2 1770 0
 	str	r3, [r1, #8]
-	.loc 2 1771 0
 	mul	r3, lr, r5
-	.loc 2 1772 0
 	adds	r5, r5, #1
-.LVL1327:
 	uxth	r5, r5
-.LVL1328:
-	.loc 2 1771 0
 	bic	r3, r3, #3
 	add	r3, r3, r6
 	str	r3, [r1, #12]
 .L1143:
-.LVL1329:
 	adds	r2, r2, #1
-.LVL1330:
 	b	.L1140
-.LVL1331:
 .L1150:
-	.loc 2 1779 0
 	ldr	r1, [r7]
-.LVL1332:
 	cbnz	r1, .L1146
-	.loc 2 1780 0
 	ldr	r1, [r7, #12]
-	.loc 2 1781 0
 	ldr	r6, [r1, #4]
-	.loc 2 1780 0
 	str	r1, [sp, #8]
-.LVL1333:
-	.loc 2 1781 0
 	adds	r1, r6, #1
-.LVL1334:
 	beq	.L1147
-	.loc 2 1782 0
 	ldr	r1, [r2]
 	mov	r0, r6
 	bl	ftl_cmp_data_ver
-.LVL1335:
 	cbz	r0, .L1147
-	.loc 2 1784 0
 	adds	r6, r6, #1
 	str	r6, [r2]
 .L1147:
-	.loc 2 1787 0
 	ldr	r1, [sp, #8]
 	ldr	r1, [r1]
 	adds	r1, r1, #1
 	bne	.L1149
-.LVL1336:
 .L1148:
-	.loc 2 1801 0
 	uxth	r2, r4
-	.loc 2 1802 0
 	uxth	r3, r3
-	.loc 2 1801 0
 	str	r2, [sp, #8]
-.LVL1337:
-	.loc 2 1802 0
 	movs	r2, #20
 	mla	r10, r2, r3, r10
 	b	.L1263
-.LVL1338:
 .L1146:
-	.loc 2 1791 0
 	ldr	fp, [sp, #12]
-.LVL1339:
 .L1149:
 	adds	r3, r3, #1
-.LVL1340:
 	adds	r7, r7, #20
 	b	.L1145
-.LVL1341:
 .L1153:
-	.loc 2 1819 0
 	movw	r3, #65535
 	cmp	fp, r3
 	bne	.L1154
-	.loc 2 1819 0 is_stmt 0 discriminator 1
 	ldrb	r3, [r8, #8]	@ zero_extendqisi2
 	cmp	r3, #0
 	bne	.L1155
 .L1154:
-.LVL1342:
-.LBB303:
-	.loc 2 1824 0 is_stmt 1
 	ldr	r3, .L1270+40
-	.loc 2 1823 0
 	uxth	r6, r4
-.LVL1343:
-	.loc 2 1827 0
 	uxth	r4, r4
-.LVL1344:
-	.loc 2 1834 0
 	ldr	r7, .L1270+8
-	.loc 2 1824 0
 	ldr	r2, [r3]
 	adds	r2, r2, #1
-	.loc 2 1825 0
 	itt	eq
 	ldreq	r2, [sp]
 	streq	r2, [r3]
-.LVL1345:
-	.loc 2 1827 0
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #7
 	cmp	r4, r3
-	.loc 2 1828 0
 	itet	gt
 	subgt	r4, r6, #7
 	ldrle	r4, [sp, #4]
 	uxthgt	r4, r4
-.LVL1346:
 .L1158:
-	.loc 2 1829 0 discriminator 1
 	cmp	r4, r6
 	bhi	.L1168
-	.loc 2 1831 0
 	ldr	r3, .L1270+4
-	.loc 2 1833 0
 	movw	lr, #65535
-	.loc 2 1834 0
 	ldr	r0, [r7]
 	mov	ip, #20
-	.loc 2 1831 0
 	ldrh	fp, [r3]
-	.loc 2 1834 0
 	ldr	r3, [sp, #16]
 	str	r3, [sp, #12]
 	movs	r3, #0
 	mov	r5, r3
 	b	.L1169
-.LVL1347:
 .L1160:
-	.loc 2 1832 0
 	ldr	r1, [sp, #12]
 	ldrh	r2, [r1], #2
-	.loc 2 1833 0
 	cmp	r2, lr
-	.loc 2 1832 0
 	str	r1, [sp, #12]
-.LVL1348:
-	.loc 2 1833 0
 	beq	.L1159
-	.loc 2 1834 0
 	mla	r1, ip, r5, r0
-	.loc 2 1835 0
 	adds	r5, r5, #1
-.LVL1349:
-	.loc 2 1834 0
 	orr	r2, r4, r2, lsl #10
-.LVL1350:
-	.loc 2 1835 0
 	uxth	r5, r5
-.LVL1351:
-	.loc 2 1834 0
 	str	r2, [r1, #4]
 .L1159:
-.LVL1352:
 	adds	r3, r3, #1
-.LVL1353:
 .L1169:
-	.loc 2 1831 0 discriminator 1
 	uxth	r2, r3
 	cmp	fp, r2
 	bhi	.L1160
-	.loc 2 1838 0
 	mov	r1, r5
 	movs	r2, #0
 	bl	FlashReadPages
-.LVL1354:
 	ldr	r3, .L1270+40
 	movs	r1, #20
-	.loc 2 1839 0
 	movs	r0, #0
-	.loc 2 1842 0
 	movw	ip, #65535
 	ldr	r2, [r3]
 	ldr	r3, [r7]
 	mla	r5, r1, r5, r3
-.LVL1355:
 .L1161:
-	.loc 2 1839 0 discriminator 1
 	cmp	r3, r5
 	bne	.L1166
 	cbz	r0, .L1167
 	ldr	r3, .L1270+40
 	str	r2, [r3]
 .L1167:
-	.loc 2 1829 0
 	adds	r4, r4, #1
-.LVL1356:
 	uxth	r4, r4
-.LVL1357:
 	b	.L1158
 .L1271:
 	.align	2
@@ -14415,450 +8982,275 @@ FtlRecoverySuperblock:
 	.word	.LC1
 	.word	.LANCHOR153
 .L1166:
-	.loc 2 1840 0
 	ldr	r1, [r3]
 	cmp	r1, #0
 	beq	.L1162
 	cbz	r0, .L1155
 .L1264:
-	.loc 2 1858 0
 	ldr	r3, .L1272
 	str	r2, [r3]
-.LVL1358:
 .L1155:
-.LBE303:
-	.loc 2 1863 0
 	ldr	r3, .L1272+4
 	movs	r2, #1
-	.loc 2 1864 0
 	ldr	r0, .L1272+8
-	.loc 2 1873 0
 	ldr	r6, .L1272+12
-	.loc 2 1863 0
 	strh	r2, [r3]	@ movhi
-	.loc 2 1864 0
 	bl	FtlMapBlkWriteDump_data
-.LVL1359:
 	ldr	fp, [sp, #4]
-.LVL1360:
 .L1170:
-	.loc 2 1870 0
 	ldr	r3, .L1272+16
-	.loc 2 1872 0
 	movw	lr, #65535
-	.loc 2 1873 0
 	ldr	r0, [r6]
 	movs	r7, #20
-	.loc 2 1870 0
 	ldr	r1, [sp, #16]
 	ldrh	r4, [r3]
 	movs	r3, #0
-	.loc 2 1869 0
 	str	r3, [sp, #12]
-.LVL1361:
 .L1171:
-	.loc 2 1870 0 discriminator 1
 	uxth	r2, r3
 	cmp	r2, r4
 	bcc	.L1173
-	.loc 2 1877 0
 	movs	r2, #0
 	ldr	r1, [sp, #12]
 	bl	FlashReadPages
-.LVL1362:
-	.loc 2 1878 0
 	movs	r3, #0
-.LVL1363:
 .L1267:
 	str	r3, [sp, #24]
-.LVL1364:
-	.loc 2 1878 0 is_stmt 0 discriminator 2
 	ldr	r2, [sp, #12]
 	ldrh	r3, [sp, #24]
 	cmp	r2, r3
 	bhi	.L1202
-	.loc 2 2032 0 is_stmt 1
 	ldr	r3, .L1272+20
-	.loc 2 2031 0
 	add	fp, fp, #1
-.LVL1365:
 	uxth	fp, fp
-.LVL1366:
-	.loc 2 2032 0
 	ldrh	r3, [r3]
 	cmp	r3, fp
 	bne	.L1170
-	.loc 2 2035 0
 	ldr	r2, .L1272+16
-	.loc 2 2037 0
 	movw	r0, #65535
-	.loc 2 2034 0
 	movs	r3, #0
-	.loc 2 2033 0
 	strh	fp, [r8, #2]	@ movhi
-	.loc 2 2034 0
 	strh	r3, [r8, #4]	@ movhi
-.LVL1367:
-	.loc 2 2035 0
 	ldrh	r2, [r2]
-.LVL1368:
 .L1203:
-	.loc 2 2035 0 is_stmt 0 discriminator 1
 	uxth	r1, r3
 	cmp	r1, r2
 	bcs	.L1262
-	.loc 2 2036 0 is_stmt 1
 	ldr	r1, [sp, #16]
 	ldrh	r4, [r1], #2
-	.loc 2 2037 0
 	cmp	r4, r0
-	.loc 2 2036 0
 	str	r1, [sp, #16]
-.LVL1369:
 	add	r1, r3, #1
-	.loc 2 2037 0
 	bne	.L1268
 	mov	r3, r1
-.LVL1370:
 	b	.L1203
-.LVL1371:
 .L1162:
-.LBB304:
-	.loc 2 1841 0
 	ldr	r1, [r3, #12]
-.LVL1372:
-	.loc 2 1842 0
 	ldrh	lr, [r1]
 	cmp	lr, ip
 	beq	.L1165
-	.loc 2 1844 0
 	ldr	r1, [r1, #4]
-.LVL1373:
 	cmp	r1, #-1
 	itt	ne
 	movne	r2, r1
 	movne	r0, #1
 .L1165:
 	adds	r3, r3, #20
-.LVL1374:
 	b	.L1161
-.LVL1375:
 .L1168:
-	.loc 2 1858 0
 	mov	r2, #-1
 	b	.L1264
-.LVL1376:
 .L1173:
-.LBE304:
-	.loc 2 1871 0
 	ldrh	r2, [r1], #2
-.LVL1377:
-	.loc 2 1872 0
 	cmp	r2, lr
 	beq	.L1172
-	.loc 2 1873 0
 	ldr	r5, [sp, #12]
 	orr	r2, fp, r2, lsl #10
-.LVL1378:
 	mla	ip, r7, r5, r0
 	str	r2, [ip, #4]
-	.loc 2 1874 0
 	mov	r2, r5
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r2, [sp, #12]
-.LVL1379:
 .L1172:
 	adds	r3, r3, #1
-.LVL1380:
 	b	.L1171
-.LVL1381:
 .L1202:
 	ldr	r3, [sp, #24]
 	movs	r5, #20
 	muls	r5, r3, r5
-	.loc 2 1879 0
 	ldr	r3, [r6]
 	str	r3, [sp, #28]
 	adds	r7, r3, r5
 	ldr	r4, [r7, #4]
-	.loc 2 1880 0
 	ubfx	r0, r4, #10, #16
-	.loc 2 1879 0
 	str	r4, [sp, #44]
-	.loc 2 1880 0
 	bl	P2V_plane
-.LVL1382:
-	.loc 2 1882 0
 	ldr	r3, [sp, #4]
 	cmp	fp, r3
 	bcc	.L1175
-	.loc 2 1882 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #28]
 	bne	.L1176
-	.loc 2 1883 0 is_stmt 1
 	ldr	r2, [sp, #20]
 	cmp	r2, r0
 	bhi	.L1175
 .L1176:
-	.loc 2 1886 0
 	ldr	r2, [sp, #8]
 	cmp	fp, r2
 	bne	.L1177
-	.loc 2 1886 0 is_stmt 0 discriminator 1
 	cmp	r10, r0
 	beq	.L1178
 .L1177:
-.LVL1383:
-	.loc 2 1890 0 is_stmt 1
 	ldr	r3, [r3, r5]
 	adds	r3, r3, #1
 	beq	.L1179
-	.loc 2 1891 0
 	ldr	r3, [r7, #12]
-.LVL1384:
-	.loc 2 1892 0
 	movw	r2, #61589
 	ldrh	r1, [r3]
 	cmp	r1, r2
 	beq	.L1180
-.LVL1385:
 .L1186:
-.LBB305:
-	.loc 2 1925 0
 	ldrh	r0, [r8]
-.LVL1386:
 .L1266:
-.LBE305:
-	.loc 2 2009 0
 	bl	decrement_vpc_count
-.LVL1387:
 .L1175:
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
 	b	.L1267
-.LVL1388:
 .L1180:
-	.loc 2 1898 0
 	ldr	r2, [r3, #4]
 	str	r2, [sp]
-.LVL1389:
-	.loc 2 1899 0
 	adds	r2, r2, #1
-.LVL1390:
 	beq	.L1181
-	.loc 2 1900 0 discriminator 1
 	ldr	r2, .L1272+24
 	ldr	r0, [sp]
-.LVL1391:
 	ldr	r1, [r2]
 	bl	ftl_cmp_data_ver
-.LVL1392:
-	.loc 2 1899 0 discriminator 1
 	cbz	r0, .L1181
-	.loc 2 1902 0
 	ldr	r1, [sp]
 	adds	r1, r1, #1
 	str	r1, [r2]
 .L1181:
-	.loc 2 1906 0
 	ldr	r4, [r3, #8]
-.LVL1393:
-	.loc 2 1908 0
 	add	r1, sp, #40
-	.loc 2 1907 0
 	ldr	r3, [r3, #12]
-.LVL1394:
-	.loc 2 1908 0
 	movs	r2, #0
 	mov	r0, r4
-	.loc 2 1907 0
 	str	r3, [sp, #36]
-	.loc 2 1908 0
 	bl	log2phys
-.LVL1395:
-	.loc 2 1909 0
 	ldr	r3, .L1272
 	ldr	r1, [r3]
 	adds	r3, r1, #1
 	beq	.L1182
-	.loc 2 1910 0 discriminator 1
 	ldr	r0, [sp]
 	bl	ftl_cmp_data_ver
-.LVL1396:
-	.loc 2 1909 0 discriminator 1
 	cmp	r0, #0
 	beq	.L1182
-.LBB306:
-	.loc 2 1914 0
 	ldr	r3, [sp, #36]
 	adds	r7, r3, #1
 	beq	.L1183
-	.loc 2 1915 0
 	ldr	r0, [r6]
-	.loc 2 1917 0
 	movs	r2, #0
 	movs	r1, #1
-	.loc 2 1915 0
 	add	r0, r0, r5
-	.loc 2 1916 0
 	str	r3, [r0, #4]
-	.loc 2 1915 0
 	ldr	r7, [r0, #12]
-.LVL1397:
-	.loc 2 1917 0
 	bl	FlashReadPages
-.LVL1398:
-	.loc 2 1930 0
 	ldr	r2, [r6]
 	ldr	r1, [r2, r5]
 	adds	r3, r2, r5
 	adds	r1, r1, #1
 	bne	.L1184
-.LVL1399:
 .L1185:
-	.loc 2 1962 0
 	mov	r3, #-1
-	.loc 2 1963 0
 	ldrh	r0, [r8]
-	.loc 2 1962 0
 	str	r3, [sp, #36]
-	.loc 2 1963 0
 	bl	decrement_vpc_count
-.LVL1400:
 .L1193:
-.LBE306:
-	.loc 2 2003 0
 	ldr	r7, [sp, #36]
 	adds	r0, r7, #1
 	beq	.L1175
 .L1206:
-	.loc 2 2005 0
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-.LVL1401:
-	.loc 2 2006 0
 	ldr	r3, .L1272+28
-	.loc 2 2005 0
 	mov	r4, r0
-.LVL1402:
-	.loc 2 2006 0
 	ldrh	r3, [r3]
 	cmp	r3, r0
 	bhi	.L1198
-	.loc 2 2006 0 is_stmt 0 discriminator 1
 	movw	r2, #2006
 	ldr	r1, .L1272+32
 	ldr	r0, .L1272+36
-.LVL1403:
 	bl	printf
-.LVL1404:
 .L1198:
-	.loc 2 2007 0 is_stmt 1
 	ldr	r3, .L1272+40
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
 	cmp	r3, #0
 	beq	.L1199
-	.loc 2 2009 0
 	mov	r0, r4
 	b	.L1266
-.LVL1405:
 .L1183:
-.LBB307:
-	.loc 2 1921 0
 	ldr	r3, [sp, #44]
 	ldr	r2, [sp, #40]
 	cmp	r2, r3
 	bne	.L1186
-	.loc 2 1922 0
 	movs	r2, #1
 	add	r1, sp, #36
 	mov	r0, r4
 	bl	log2phys
-.LVL1406:
 	b	.L1186
-.LVL1407:
 .L1184:
-	.loc 2 1930 0 discriminator 1
 	ldr	r1, [r7, #8]
 	cmp	r4, r1
 	bne	.L1185
-	.loc 2 1931 0 discriminator 2
 	ldr	r0, .L1272
-	.loc 2 1918 0 discriminator 2
 	ldr	r1, [r7, #4]
-	.loc 2 1931 0 discriminator 2
 	ldr	r0, [r0]
-	.loc 2 1918 0 discriminator 2
 	str	r1, [sp, #28]
-	.loc 2 1931 0 discriminator 2
 	bl	ftl_cmp_data_ver
-.LVL1408:
-	.loc 2 1930 0 discriminator 2
 	cmp	r0, #0
 	beq	.L1185
-	.loc 2 1932 0
 	ldr	r1, [sp, #40]
 	ldr	r0, [sp, #44]
 	cmp	r1, r0
 	bne	.L1188
 .L1191:
-	.loc 2 1958 0
 	ldr	r1, [sp, #36]
 	mov	r0, r4
 	bl	FtlReUsePrevPpa
-.LVL1409:
 	b	.L1185
 .L1188:
-	.loc 2 1935 0
 	ldr	r0, [sp, #36]
 	cmp	r1, r0
 	beq	.L1185
-	.loc 2 1936 0
 	adds	r0, r1, #1
 	beq	.L1189
-.LVL1410:
-	.loc 2 1938 0
 	str	r1, [r3, #4]
-	.loc 2 1939 0
 	movs	r2, #0
 	movs	r1, #1
 	mov	r0, r3
-	.loc 2 1937 0
 	ldr	r7, [r3, #12]
-	.loc 2 1939 0
 	bl	FlashReadPages
-.LVL1411:
 .L1190:
-	.loc 2 1944 0
 	ldr	r3, [r6]
 	ldr	r3, [r3, r5]
 	adds	r3, r3, #1
 	beq	.L1191
-	.loc 2 1945 0
 	ldr	r3, [r7, #4]
-.LVL1412:
-	.loc 2 1946 0
 	ldr	r2, .L1272
 	mov	r1, r3
 	ldr	r0, [r2]
 	bl	ftl_cmp_data_ver
-.LVL1413:
 	cmp	r0, #0
 	beq	.L1191
-	.loc 2 1947 0
 	mov	r1, r3
 	ldr	r0, [sp, #28]
 	bl	ftl_cmp_data_ver
-.LVL1414:
 	cmp	r0, #0
 	beq	.L1185
-.LVL1415:
 	b	.L1191
-.LVL1416:
 .L1189:
-	.loc 2 1941 0
 	str	r1, [r2, r5]
 	b	.L1190
 .L1273:
@@ -14875,143 +9267,92 @@ FtlRecoverySuperblock:
 	.word	.LANCHOR160
 	.word	.LC1
 	.word	.LANCHOR42
-.LVL1417:
 .L1182:
-.LBE307:
-	.loc 2 1964 0
 	ldr	r3, [sp, #44]
 	ldr	r2, [sp, #40]
 	cmp	r2, r3
 	beq	.L1193
-	.loc 2 1966 0
 	movs	r2, #1
 	add	r1, sp, #44
 	mov	r0, r4
 	bl	log2phys
-.LVL1418:
-	.loc 2 1967 0
 	ldr	r7, [sp, #40]
 	adds	r5, r7, #1
 	beq	.L1193
-	.loc 2 1967 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #36]
 	cmp	r7, r3
 	beq	.L1206
-	.loc 2 1968 0 is_stmt 1
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-.LVL1419:
-	.loc 2 1970 0
 	ldr	r3, .L1274
 	ldrh	r3, [r3]
 	cmp	r3, r0
 	beq	.L1197
-	.loc 2 1971 0 discriminator 1
 	ldr	r3, .L1274+4
-	.loc 2 1970 0 discriminator 1
 	ldrh	r3, [r3]
 	cmp	r3, r0
 	beq	.L1197
-	.loc 2 1972 0
 	ldr	r3, .L1274+8
-	.loc 2 1971 0
 	ldrh	r3, [r3]
 	cmp	r3, r0
 	bne	.L1193
 .L1197:
-.LVL1420:
-.LBB308:
-	.loc 2 1976 0
 	ldr	r0, [r6]
-.LVL1421:
-	.loc 2 1979 0
 	movs	r2, #0
 	movs	r1, #1
-	.loc 2 1978 0
 	str	r7, [r0, #4]
-	.loc 2 1976 0
 	ldr	r5, [r0, #12]
-.LVL1422:
-	.loc 2 1979 0
 	bl	FlashReadPages
-.LVL1423:
-	.loc 2 1982 0
 	ldr	r3, [r6]
 	ldr	r3, [r3]
 	adds	r3, r3, #1
 	beq	.L1193
-	.loc 2 1983 0
 	ldr	r1, [r5, #4]
 	ldr	r0, [sp]
 	bl	ftl_cmp_data_ver
-.LVL1424:
 	cmp	r0, #0
 	bne	.L1193
-	.loc 2 1990 0
 	movs	r2, #1
 	add	r1, sp, #40
-.LVL1425:
 	mov	r0, r4
 	bl	log2phys
-.LVL1426:
 	b	.L1193
-.LVL1427:
 .L1199:
-.LBE308:
-	.loc 2 2011 0
 	mov	r1, r4
 	ldr	r0, .L1274+12
 	bl	printf
-.LVL1428:
 	b	.L1175
-.LVL1429:
 .L1179:
-	.loc 2 2018 0
 	ldr	r3, .L1274+16
 	ldr	r3, [r3]
 	cmp	r3, #31
 	bhi	.L1200
-	.loc 2 2019 0
 	ldr	r2, .L1274+20
 	str	r4, [r2, r3, lsl #2]
-	.loc 2 2020 0
 	adds	r3, r3, #1
 	ldr	r2, .L1274+16
 	str	r3, [r2]
 .L1200:
-	.loc 2 2022 0
 	ldrh	r0, [r8]
-.LVL1430:
 	bl	decrement_vpc_count
-.LVL1431:
-	.loc 2 2024 0
 	ldr	r3, .L1274+24
 	ldr	r2, [r3]
 	adds	r1, r2, #1
 	bne	.L1201
-	.loc 2 2025 0
 	ldr	r2, [sp]
 .L1265:
-	.loc 2 2027 0
 	str	r2, [r3]
 	b	.L1175
 .L1201:
-	.loc 2 2026 0
 	ldr	r1, [sp]
 	cmp	r1, r2
 	bcs	.L1175
-	.loc 2 2027 0
 	mov	r2, r1
 	b	.L1265
-.LVL1432:
 .L1178:
-	.loc 2 2051 0
 	strb	r10, [r8, #6]
-	.loc 2 2053 0
 	mov	r2, r10
-	.loc 2 2052 0
 	strh	fp, [r8, #2]	@ movhi
-	.loc 2 2053 0
 	mov	r1, fp
 	b	.L1269
 .L1275:
@@ -15024,8 +9365,6 @@ FtlRecoverySuperblock:
 	.word	.LANCHOR162
 	.word	.LANCHOR163
 	.word	.LANCHOR153
-	.cfi_endproc
-.LFE284:
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
 	.section	.text.FtlSuperblockPowerLostFix,"ax",%progbits
 	.align	1
@@ -15036,82 +9375,41 @@ FtlRecoverySuperblock:
 	.fpu softvfp
 	.type	FtlSuperblockPowerLostFix, %function
 FtlSuperblockPowerLostFix:
-.LFB291:
-	.loc 2 2205 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1433:
 	push	{r4, r5, r6, r7, r8, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 4, -24
-	.cfi_offset 5, -20
-	.cfi_offset 6, -16
-	.cfi_offset 7, -12
-	.cfi_offset 8, -8
-	.cfi_offset 14, -4
-	.loc 2 2211 0
 	mov	r3, #-1
-	.loc 2 2205 0
 	sub	sp, sp, #24
-	.cfi_def_cfa_offset 48
-	.loc 2 2213 0
 	ldr	r2, .L1287
-	.loc 2 2219 0
 	movs	r6, #0
-	.loc 2 2205 0
 	mov	r4, r0
-	.loc 2 2211 0
 	str	r3, [sp, #20]
-	.loc 2 2223 0
 	movs	r7, #7
-	.loc 2 2212 0
 	ldr	r3, .L1287+4
-	.loc 2 2213 0
 	ldr	r5, [r2]
-	.loc 2 2216 0
 	mvn	r2, #2
-	.loc 2 2229 0
 	ldr	r8, .L1287+16
-	.loc 2 2212 0
 	ldr	r3, [r3]
-	.loc 2 2213 0
 	str	r5, [sp, #16]
-.LVL1434:
-	.loc 2 2212 0
 	str	r3, [sp, #12]
-	.loc 2 2216 0
 	str	r2, [r5, #8]
-	.loc 2 2217 0
 	mvn	r2, #1
 	str	r2, [r5, #12]
-	.loc 2 2218 0
 	ldrh	r2, [r0]
-	.loc 2 2219 0
 	strh	r6, [r5]	@ movhi
-	.loc 2 2218 0
 	strh	r2, [r5, #2]	@ movhi
-	.loc 2 2220 0
 	movw	r2, #61589
 	str	r2, [r3]
-	.loc 2 2221 0
 	add	r2, r2, #304087040
 	add	r2, r2, #1269760
 	addw	r2, r2, #1507
 	str	r2, [r3, #4]
-.LVL1435:
 .L1277:
-	.loc 2 2223 0
 	subs	r7, r7, #1
-.LVL1436:
 	beq	.L1279
-.LVL1437:
-	.loc 2 2224 0
 	ldrh	r3, [r4, #4]
 	cbnz	r3, .L1278
-.LVL1438:
 .L1279:
-	.loc 2 2234 0
 	ldr	r3, .L1287+8
 	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
@@ -15119,53 +9417,35 @@ FtlSuperblockPowerLostFix:
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
-	.loc 2 2235 0
 	ldr	r3, .L1287+12
 	ldrh	r3, [r3]
 	strh	r3, [r4, #2]	@ movhi
-	.loc 2 2236 0
 	movs	r3, #0
 	strb	r3, [r4, #6]
-	.loc 2 2237 0
 	strh	r3, [r4, #4]	@ movhi
-	.loc 2 2238 0
 	add	sp, sp, #24
-	.cfi_remember_state
-	.cfi_def_cfa_offset 24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL1439:
 .L1278:
-	.cfi_restore_state
-	.loc 2 2226 0
 	mov	r0, r4
 	bl	get_new_active_ppa
-.LVL1440:
 	str	r0, [sp, #8]
-	.loc 2 2227 0
 	adds	r0, r0, #1
 	beq	.L1279
-	.loc 2 2229 0
 	ldr	r3, [r8]
-	.loc 2 2230 0
 	movs	r1, #1
 	add	r0, sp, #4
-	.loc 2 2229 0
 	str	r3, [r5, #4]
 	adds	r3, r3, #1
 	adds	r2, r3, #1
 	it	eq
 	moveq	r3, r6
 	str	r3, [r8]
-	.loc 2 2230 0
 	movs	r3, #0
 	mov	r2, r3
 	bl	FlashProgPages
-.LVL1441:
-	.loc 2 2231 0
 	ldrh	r0, [r4]
 	bl	decrement_vpc_count
-.LVL1442:
 	b	.L1277
 .L1288:
 	.align	2
@@ -15175,8 +9455,6 @@ FtlSuperblockPowerLostFix:
 	.word	.LANCHOR42
 	.word	.LANCHOR19
 	.word	.LANCHOR71
-	.cfi_endproc
-.LFE291:
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
 	.section	.text.FtlLoadBbt,"ax",%progbits
 	.align	1
@@ -15187,276 +9465,170 @@ FtlSuperblockPowerLostFix:
 	.fpu softvfp
 	.type	FtlLoadBbt, %function
 FtlLoadBbt:
-.LFB232:
-	.loc 4 173 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 3, -32
-	.cfi_offset 4, -28
-	.cfi_offset 5, -24
-	.cfi_offset 6, -20
-	.cfi_offset 7, -16
-	.cfi_offset 8, -12
-	.cfi_offset 10, -8
-	.cfi_offset 14, -4
-	.loc 4 180 0
 	ldr	r8, .L1318+40
 	ldr	r4, .L1318
 	ldr	r3, [r8]
-	.loc 4 184 0
 	ldr	r7, .L1318+4
-	.loc 4 186 0
 	mov	r10, r4
-	.loc 4 180 0
 	str	r3, [r4, #8]
-	.loc 4 181 0
 	ldr	r3, .L1318+8
 	ldr	r6, [r3]
 	str	r6, [r4, #12]
-.LVL1443:
-	.loc 4 183 0
 	bl	FtlBbtMemInit
-.LVL1444:
-	.loc 4 184 0
 	ldrh	r5, [r7]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.LVL1445:
 .L1290:
-	.loc 4 184 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r7]
 	subs	r3, r3, #15
 	cmp	r3, r5
 	bgt	.L1293
-	.loc 4 185 0 is_stmt 1
 	lsls	r3, r5, #10
-	.loc 4 186 0
 	movs	r2, #1
 	mov	r1, r2
 	mov	r0, r10
-	.loc 4 185 0
 	str	r3, [r4, #4]
-	.loc 4 186 0
 	bl	FlashReadPages
-.LVL1446:
-	.loc 4 187 0
 	ldr	r3, [r4]
 	adds	r3, r3, #1
 	bne	.L1291
-	.loc 4 188 0
 	ldr	r3, [r4, #4]
-	.loc 4 189 0
 	movs	r2, #1
 	mov	r1, r2
 	mov	r0, r10
-	.loc 4 188 0
 	adds	r3, r3, #1
 	str	r3, [r4, #4]
-	.loc 4 189 0
 	bl	FlashReadPages
-.LVL1447:
 .L1291:
-	.loc 4 191 0
 	ldr	r3, [r4]
 	adds	r3, r3, #1
 	beq	.L1292
-	.loc 4 196 0
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
 	bne	.L1292
-	.loc 4 198 0
 	ldr	r3, .L1318+12
-	.loc 4 199 0
 	ldr	r2, [r6, #4]
-	.loc 4 198 0
 	strh	r5, [r3]	@ movhi
-	.loc 4 199 0
 	str	r2, [r3, #8]
-	.loc 4 200 0
 	ldrh	r2, [r6, #8]
 	strh	r2, [r3, #4]	@ movhi
 .L1293:
-	.loc 4 216 0
 	ldr	r5, .L1318+12
-.LVL1448:
 	movw	r2, #65535
 	ldrh	r3, [r5]
 	cmp	r3, r2
 	beq	.L1307
-	.loc 4 222 0
 	ldrh	r3, [r5, #4]
 	cmp	r3, r2
 	beq	.L1297
-	.loc 4 224 0
 	lsls	r3, r3, #10
-	.loc 4 225 0
 	movs	r2, #1
 	mov	r1, r2
 	ldr	r0, .L1318
-	.loc 4 224 0
 	str	r3, [r4, #4]
-	.loc 4 225 0
 	bl	FlashReadPages
-.LVL1449:
-	.loc 4 226 0
 	ldr	r3, [r4]
 	adds	r3, r3, #1
 	beq	.L1297
-	.loc 4 229 0
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
 	bne	.L1297
-	.loc 4 229 0 is_stmt 0 discriminator 1
 	ldr	r3, [r6, #4]
 	ldr	r2, [r5, #8]
 	cmp	r3, r2
 	bls	.L1297
-	.loc 4 231 0 is_stmt 1
 	ldrh	r2, [r5, #4]
-	.loc 4 232 0
 	str	r3, [r5, #8]
-	.loc 4 233 0
 	ldrh	r3, [r6, #8]
-	.loc 4 231 0
 	strh	r2, [r5]	@ movhi
-	.loc 4 233 0
 	strh	r3, [r5, #4]	@ movhi
 .L1297:
-	.loc 4 245 0
 	ldr	r10, .L1318
-	.loc 4 238 0
 	movs	r1, #1
 	ldrh	r0, [r5]
 	bl	FtlGetLastWrittenPage
-.LVL1450:
 	sxth	r7, r0
-.LVL1451:
-	.loc 4 239 0
 	adds	r0, r0, #1
 	strh	r0, [r5, #2]	@ movhi
 .L1299:
-	.loc 4 241 0
 	cmp	r7, #0
 	bge	.L1302
-	.loc 4 254 0
 	movs	r2, #254
 	ldr	r1, .L1318+16
 	ldr	r0, .L1318+20
 	bl	printf
-.LVL1452:
 .L1301:
-	.loc 4 255 0
 	ldrh	r3, [r6, #10]
-	.loc 4 257 0
 	ldrh	r0, [r6, #12]
-	.loc 4 255 0
 	strh	r3, [r5, #6]	@ movhi
-	.loc 4 257 0
 	movw	r3, #65535
 	cmp	r0, r3
 	beq	.L1304
-	.loc 4 259 0
 	ldr	r3, .L1318+24
 	ldr	r2, [r3]
 	cmp	r0, r2
 	beq	.L1304
-	.loc 4 259 0 is_stmt 0 discriminator 1
 	ldr	r3, .L1318+28
 	ldrh	r3, [r3]
 	lsrs	r3, r3, #2
 	cmp	r2, r3
 	bcs	.L1304
-	.loc 4 261 0 is_stmt 1
 	cmp	r0, r3
 	bcs	.L1304
-	.loc 4 263 0
 	bl	FtlSysBlkNumInit
-.LVL1453:
 .L1304:
 	ldr	r6, .L1318+32
-.LVL1454:
-	.loc 4 173 0 discriminator 1
 	movs	r5, #0
-	.loc 4 268 0 discriminator 1
 	ldr	r7, .L1318+36
-.LVL1455:
-	.loc 4 269 0 discriminator 1
 	ldr	r8, .L1318+44
 .L1305:
-.LVL1456:
-	.loc 4 268 0 discriminator 1
 	ldrh	r3, [r7]
 	cmp	r5, r3
 	bcc	.L1306
-	.loc 4 275 0
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.LVL1457:
 .L1292:
-	.loc 4 184 0 discriminator 2
 	subs	r5, r5, #1
-.LVL1458:
 	uxth	r5, r5
-.LVL1459:
 	b	.L1290
-.LVL1460:
 .L1302:
-	.loc 4 243 0
 	ldrh	r3, [r5]
-	.loc 4 245 0
 	movs	r2, #1
 	mov	r1, r2
 	mov	r0, r10
-	.loc 4 243 0
 	orr	r3, r7, r3, lsl #10
 	str	r3, [r4, #4]
-	.loc 4 244 0
 	ldr	r3, [r8]
 	str	r3, [r4, #8]
-	.loc 4 245 0
 	bl	FlashReadPages
-.LVL1461:
-	.loc 4 247 0
 	ldr	r3, [r4]
 	adds	r3, r3, #1
 	beq	.L1300
-	.loc 4 247 0 is_stmt 0 discriminator 1
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
 	beq	.L1301
 .L1300:
 	subs	r7, r7, #1
-.LVL1462:
 	sxth	r7, r7
-.LVL1463:
 	b	.L1299
-.LVL1464:
 .L1306:
-	.loc 4 269 0 is_stmt 1 discriminator 3
 	ldrh	r2, [r8]
 	ldr	r1, [r4, #8]
 	ldr	r0, [r6, #4]!
 	lsls	r2, r2, #2
 	mla	r1, r5, r2, r1
-	.loc 4 268 0 discriminator 3
 	adds	r5, r5, #1
-.LVL1465:
-	.loc 4 269 0 discriminator 3
 	bl	ftl_memcpy
-.LVL1466:
 	b	.L1305
-.LVL1467:
 .L1307:
-	.loc 4 218 0
 	mov	r0, #-1
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.LVL1468:
 .L1319:
 	.align	2
 .L1318:
@@ -15472,8 +9644,6 @@ FtlLoadBbt:
 	.word	.LANCHOR10
 	.word	.LANCHOR107
 	.word	.LANCHOR137
-	.cfi_endproc
-.LFE232:
 	.size	FtlLoadBbt, .-FtlLoadBbt
 	.section	.text.FtlMakeBbt,"ax",%progbits
 	.align	1
@@ -15484,129 +9654,74 @@ FtlLoadBbt:
 	.fpu softvfp
 	.type	FtlMakeBbt, %function
 FtlMakeBbt:
-.LFB234:
-	.loc 4 317 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 4 327 0
 	movs	r6, #0
 	ldr	r7, .L1339
-	.loc 4 325 0
 	bl	FtlBbtMemInit
-.LVL1469:
 	sub	r8, r7, #18
-	.loc 4 326 0
 	bl	FtlLoadFactoryBbt
-.LVL1470:
 .L1321:
-	.loc 4 327 0 discriminator 1
 	ldr	r3, .L1339+4
 	ldrh	r3, [r3]
 	cmp	r6, r3
 	bcc	.L1327
-	.loc 4 381 0 discriminator 1
 	ldr	r5, .L1339+8
 	movs	r4, #0
 .L1328:
 	ldrh	r3, [r5]
 	uxth	r0, r4
-.LVL1471:
 	adds	r4, r4, #1
 	cmp	r3, r0
 	bhi	.L1329
-	.loc 4 387 0
 	ldr	r4, .L1339+12
-	.loc 4 396 0
 	movw	r6, #65535
-.LVL1472:
-	.loc 4 387 0
 	ldrh	r5, [r4, #12]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.LVL1473:
 .L1330:
-	.loc 4 387 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r4, #12]
 	subs	r3, r3, #47
 	cmp	r3, r5
 	bgt	.L1334
-	.loc 4 389 0 is_stmt 1
 	mov	r0, r5
 	bl	FtlBbmIsBadBlock
-.LVL1474:
 	cmp	r0, #1
 	beq	.L1331
-	.loc 4 391 0
 	mov	r0, r5
 	bl	FlashTestBlk
-.LVL1475:
 	cmp	r0, #0
 	beq	.L1332
-	.loc 4 393 0
 	mov	r0, r5
 	bl	FtlBbmMapBadBlock
-.LVL1476:
 .L1331:
-	.loc 4 387 0 discriminator 2
 	subs	r5, r5, #1
-.LVL1477:
 	uxth	r5, r5
-.LVL1478:
 	b	.L1330
-.LVL1479:
 .L1327:
-	.loc 4 328 0
 	ldr	r3, .L1339+16
-	.loc 4 329 0
 	ldr	r5, .L1339+20
-	.loc 4 331 0
 	ldrh	r2, [r8, #2]!
-	.loc 4 328 0
 	ldr	r4, .L1339+24
 	ldr	r0, [r3]
-	.loc 4 331 0
 	movw	r3, #65535
-	.loc 4 329 0
 	ldr	r10, [r5]
-	.loc 4 331 0
 	cmp	r2, r3
 	mov	fp, r4
 	ldr	r3, .L1339+28
-	.loc 4 328 0
 	str	r0, [r4, #8]
-	.loc 4 329 0
 	str	r10, [r4, #12]
-.LVL1480:
-	.loc 4 331 0
 	beq	.L1322
-	.loc 4 333 0
 	ldrh	r5, [r3]
-	.loc 4 335 0
 	mov	r0, r4
-	.loc 4 333 0
 	str	r3, [sp]
 	mla	r5, r6, r5, r2
-.LVL1481:
-	.loc 4 334 0
 	lsls	r2, r5, #10
 	str	r2, [r4, #4]
-	.loc 4 335 0
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL1482:
-	.loc 4 336 0
 	ldr	r3, [sp]
 	ldr	r1, [r4, #8]
 	ldr	r0, [r7]
@@ -15614,203 +9729,121 @@ FtlMakeBbt:
 	adds	r2, r2, #7
 	asrs	r2, r2, #3
 	bl	ftl_memcpy
-.LVL1483:
 .L1323:
-	.loc 4 376 0 discriminator 2
 	uxth	r0, r5
-	.loc 4 327 0 discriminator 2
 	adds	r6, r6, #1
-.LVL1484:
 	adds	r7, r7, #4
-	.loc 4 376 0 discriminator 2
 	bl	FtlBbmMapBadBlock
-.LVL1485:
 	b	.L1321
-.LVL1486:
 .L1322:
-	.loc 4 340 0
 	mov	r1, r6
 	str	r3, [sp]
 	bl	FlashGetBadBlockList
-.LVL1487:
-	.loc 4 341 0
 	ldr	r0, [r4, #8]
 	ldr	r1, [r7]
 	bl	FtlBbt2Bitmap
-.LVL1488:
-	.loc 4 343 0
 	ldr	r3, [sp]
-	.loc 4 350 0
 	str	r5, [sp, #4]
-	.loc 4 343 0
 	ldrh	r4, [r3]
 	subs	r4, r4, #1
 	uxth	r4, r4
-.LVL1489:
 .L1324:
-	.loc 4 345 0
 	ldr	r3, [sp]
 	ldrh	r0, [r3]
 	smlabb	r0, r0, r6, r4
 	uxth	r0, r0
 	bl	FtlBbmIsBadBlock
-.LVL1490:
 	cmp	r0, #1
 	beq	.L1325
-	.loc 4 350 0
 	ldr	r3, [sp, #4]
 	movs	r2, #16
 	movs	r1, #0
-	.loc 4 349 0
 	strh	r4, [r8]	@ movhi
-	.loc 4 350 0
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL1491:
-	.loc 4 351 0
 	ldr	r3, .L1339+16
 	mov	r2, #4096
 	movs	r1, #0
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL1492:
-	.loc 4 355 0
 	ldr	r2, [sp]
-	.loc 4 352 0
 	movw	r3, #61664
 	strh	r3, [r10]	@ movhi
-	.loc 4 353 0
 	movs	r3, #0
 	str	r3, [r10, #4]
-	.loc 4 355 0
 	ldrh	r5, [r2]
-	.loc 4 354 0
 	ldrh	r3, [r8]
-	.loc 4 357 0
 	ldr	r1, [r7]
 	ldr	r0, [fp, #8]
-	.loc 4 354 0
 	strh	r3, [r10, #2]	@ movhi
-	.loc 4 355 0
 	mla	r5, r6, r5, r3
-.LVL1493:
-	.loc 4 356 0
 	lsls	r3, r5, #10
 	str	r3, [fp, #4]
-	.loc 4 357 0
 	ldr	r3, .L1339+32
 	ldrh	r2, [r3]
 	lsls	r2, r2, #2
 	bl	ftl_memcpy
-.LVL1494:
-	.loc 4 358 0
 	movs	r2, #1
 	ldr	r0, .L1339+24
 	mov	r1, r2
 	bl	FlashEraseBlocks
-.LVL1495:
-	.loc 4 359 0
 	movs	r3, #1
 	ldr	r0, .L1339+24
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL1496:
-	.loc 4 360 0
 	ldr	r3, [fp]
 	adds	r3, r3, #1
 	bne	.L1323
-	.loc 4 362 0
 	uxth	r0, r5
 	bl	FtlBbmMapBadBlock
-.LVL1497:
-	.loc 4 363 0
 	b	.L1324
-.LVL1498:
 .L1325:
-	.loc 4 347 0
 	subs	r4, r4, #1
-.LVL1499:
 	uxth	r4, r4
-.LVL1500:
 	b	.L1324
-.LVL1501:
 .L1329:
-	.loc 4 383 0 discriminator 3
 	bl	FtlBbmMapBadBlock
-.LVL1502:
 	b	.L1328
-.LVL1503:
 .L1332:
-	.loc 4 396 0
 	ldrh	r3, [r4]
 	cmp	r3, r6
 	bne	.L1333
-	.loc 4 398 0
 	strh	r5, [r4]	@ movhi
 	b	.L1331
 .L1333:
-	.loc 4 402 0
 	strh	r5, [r4, #4]	@ movhi
 .L1334:
-	.loc 4 414 0
 	ldr	r3, .L1339+36
-	.loc 4 411 0
 	movs	r5, #0
-.LVL1504:
-	.loc 4 413 0
 	str	r5, [r4, #8]
-	.loc 4 416 0
 	movs	r1, #1
 	movs	r2, #2
-	.loc 4 411 0
 	strh	r5, [r4, #2]	@ movhi
-	.loc 4 414 0
 	ldr	r0, [r3]
 	ldrh	r3, [r4]
 	lsls	r3, r3, #10
 	str	r3, [r0, #4]
-	.loc 4 415 0
 	ldrh	r3, [r4, #4]
 	lsls	r3, r3, #10
 	str	r3, [r0, #24]
-	.loc 4 416 0
 	bl	FlashEraseBlocks
-.LVL1505:
-	.loc 4 418 0
 	ldrh	r0, [r4]
 	bl	FtlBbmMapBadBlock
-.LVL1506:
-	.loc 4 419 0
 	ldrh	r0, [r4, #4]
 	bl	FtlBbmMapBadBlock
-.LVL1507:
-	.loc 4 421 0
 	bl	FtlBbmTblFlush
-.LVL1508:
-	.loc 4 422 0
 	ldr	r3, [r4, #8]
-	.loc 4 425 0
 	ldrh	r2, [r4, #4]
-	.loc 4 426 0
 	strh	r5, [r4, #2]	@ movhi
-	.loc 4 422 0
 	adds	r3, r3, #1
 	str	r3, [r4, #8]
-	.loc 4 424 0
 	ldrh	r3, [r4]
-.LVL1509:
-	.loc 4 425 0
 	strh	r2, [r4]	@ movhi
-	.loc 4 427 0
 	strh	r3, [r4, #4]	@ movhi
-	.loc 4 429 0
 	bl	FtlBbmTblFlush
-.LVL1510:
-	.loc 4 432 0
 	mov	r0, r5
 	add	sp, sp, #8
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
 .L1340:
@@ -15826,8 +9859,6 @@ FtlMakeBbt:
 	.word	.LANCHOR17
 	.word	.LANCHOR137
 	.word	.LANCHOR111
-	.cfi_endproc
-.LFE234:
 	.size	FtlMakeBbt, .-FtlMakeBbt
 	.section	.text.FtlVendorPartWrite,"ax",%progbits
 	.align	1
@@ -15838,177 +9869,95 @@ FtlMakeBbt:
 	.fpu softvfp
 	.type	FtlVendorPartWrite, %function
 FtlVendorPartWrite:
-.LFB266:
-	.loc 2 835 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1511:
-	.loc 2 843 0
 	ldr	r3, .L1353
-	.loc 2 835 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
 	sub	sp, sp, #104
-	.cfi_def_cfa_offset 136
-	.loc 2 835 0
 	str	r2, [sp]
-	.loc 2 843 0
 	adds	r2, r0, r1
-.LVL1512:
-	.loc 2 835 0
 	mov	r7, r0
 	mov	r5, r1
-	.loc 2 843 0
 	ldrh	r3, [r3]
 	cmp	r2, r3
 	bhi	.L1349
-	.loc 2 840 0
 	ldr	r3, .L1353+4
 	mov	r8, #0
 	ldrh	r6, [r3]
 	lsr	r6, r0, r6
 	lsl	fp, r6, #2
-.LVL1513:
 .L1343:
-	.loc 2 846 0
 	cbnz	r5, .L1348
-.LVL1514:
 .L1341:
-	.loc 2 869 0
 	mov	r0, r8
 	add	sp, sp, #104
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-.LVL1515:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1516:
 .L1348:
-	.cfi_restore_state
-	.loc 2 847 0
 	ldr	r3, .L1353+8
-	.loc 2 848 0
 	mov	r0, r7
 	ldr	r10, .L1353+24
-	.loc 2 847 0
 	ldr	r3, [r3]
 	ldr	r2, [r3, fp]
-	.loc 2 848 0
 	ldr	r3, .L1353+12
-	.loc 2 847 0
 	str	r2, [sp, #12]
-.LVL1517:
-	.loc 2 848 0
 	ldrh	r3, [r3]
 	mov	r1, r3
 	str	r3, [sp, #8]
 	bl	__aeabi_uidivmod
-.LVL1518:
-	.loc 2 849 0
 	ldr	r3, [sp, #8]
-	.loc 2 850 0
 	ldr	r2, [sp, #12]
-	.loc 2 848 0
 	str	r1, [sp, #4]
-.LVL1519:
-	.loc 2 849 0
 	subs	r4, r3, r1
 	uxth	r4, r4
-.LVL1520:
-	.loc 2 850 0
 	cmp	r5, r4
-	.loc 2 851 0
 	it	cc
 	uxthcc	r4, r5
-.LVL1521:
-	.loc 2 852 0
 	cbz	r2, .L1345
-	.loc 2 852 0 is_stmt 0 discriminator 1
 	cmp	r4, r3
 	beq	.L1345
-	.loc 2 854 0 is_stmt 1
 	ldr	r3, [r10]
-	.loc 2 856 0
 	add	r0, sp, #20
-	.loc 2 853 0
 	str	r2, [sp, #24]
-	.loc 2 856 0
 	movs	r2, #1
 	mov	r1, r2
-	.loc 2 854 0
 	str	r3, [sp, #28]
-	.loc 2 855 0
 	add	r3, sp, #40
 	str	r3, [sp, #32]
-	.loc 2 856 0
 	bl	FlashReadPages
-.LVL1522:
 .L1346:
-	.loc 2 860 0
 	lsls	r3, r4, #9
 	ldr	r0, [r10]
-	.loc 2 864 0
 	subs	r5, r5, r4
-.LVL1523:
-	.loc 2 860 0
 	mov	r2, r3
 	str	r3, [sp, #8]
 	ldm	sp, {r1, r3}
-	.loc 2 865 0
 	add	r7, r7, r4
-.LVL1524:
 	add	fp, fp, #4
-	.loc 2 860 0
 	add	r0, r0, r3, lsl #9
 	bl	ftl_memcpy
-.LVL1525:
-	.loc 2 861 0
 	ldr	r2, [r10]
 	mov	r1, r6
 	ldr	r0, .L1353+16
-	.loc 2 863 0
 	adds	r6, r6, #1
-.LVL1526:
-	.loc 2 861 0
 	bl	FtlMapWritePage
-.LVL1527:
-	.loc 2 866 0
 	ldr	r3, [sp]
-	.loc 2 862 0
 	adds	r0, r0, #1
 	it	eq
 	moveq	r8, #-1
-.LVL1528:
-	.loc 2 866 0
 	mov	r2, r3
 	ldr	r3, [sp, #8]
 	add	r2, r2, r3
 	str	r2, [sp]
-.LVL1529:
 	b	.L1343
-.LVL1530:
 .L1345:
-	.loc 2 858 0
 	ldr	r3, .L1353+20
 	movs	r1, #0
 	ldr	r0, [r10]
 	ldrh	r2, [r3]
-.LVL1531:
 	bl	ftl_memset
-.LVL1532:
 	b	.L1346
-.LVL1533:
 .L1349:
-	.loc 2 844 0
 	mov	r8, #-1
 	b	.L1341
 .L1354:
@@ -16021,8 +9970,6 @@ FtlVendorPartWrite:
 	.word	.LANCHOR149
 	.word	.LANCHOR23
 	.word	.LANCHOR124
-	.cfi_endproc
-.LFE266:
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.section	.text.Ftl_save_ext_data,"ax",%progbits
 	.align	1
@@ -16033,78 +9980,55 @@ FtlVendorPartWrite:
 	.fpu softvfp
 	.type	Ftl_save_ext_data, %function
 Ftl_save_ext_data:
-.LFB289:
-	.loc 2 2159 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	.loc 2 2160 0
 	ldr	r2, .L1357
 	ldr	r3, .L1357+4
 	ldr	r1, [r2]
 	cmp	r1, r3
 	bne	.L1355
-.LBB311:
-.LBB312:
-	.loc 2 2161 0
 	ldr	r3, .L1357+8
-	.loc 2 2174 0
 	movs	r1, #1
 	movs	r0, #0
-	.loc 2 2161 0
 	str	r3, [r2, #4]
-	.loc 2 2162 0
 	ldr	r3, .L1357+12
 	ldr	r3, [r3]
 	str	r3, [r2, #88]
-	.loc 2 2163 0
 	ldr	r3, .L1357+16
 	ldr	r3, [r3]
 	str	r3, [r2, #92]
-	.loc 2 2164 0
 	ldr	r3, .L1357+20
 	ldr	r3, [r3]
 	str	r3, [r2, #8]
-	.loc 2 2165 0
 	ldr	r3, .L1357+24
 	ldr	r3, [r3]
 	str	r3, [r2, #12]
-	.loc 2 2166 0
 	ldr	r3, .L1357+28
 	ldr	r3, [r3]
 	str	r3, [r2, #16]
-	.loc 2 2167 0
 	ldr	r3, .L1357+32
 	ldr	r3, [r3]
 	str	r3, [r2, #20]
-	.loc 2 2168 0
 	ldr	r3, .L1357+36
 	ldr	r3, [r3]
 	str	r3, [r2, #28]
-	.loc 2 2169 0
 	ldr	r3, .L1357+40
 	ldr	r3, [r3]
 	str	r3, [r2, #32]
-	.loc 2 2170 0
 	ldr	r3, .L1357+44
 	ldr	r3, [r3]
 	str	r3, [r2, #36]
-	.loc 2 2171 0
 	ldr	r3, .L1357+48
 	ldr	r3, [r3]
 	str	r3, [r2, #40]
-	.loc 2 2172 0
 	ldr	r3, .L1357+52
 	ldr	r3, [r3]
 	str	r3, [r2, #44]
-	.loc 2 2173 0
 	ldr	r3, .L1357+56
 	ldr	r3, [r3]
 	str	r3, [r2, #48]
-	.loc 2 2174 0
 	b	FtlVendorPartWrite
-.LVL1534:
 .L1355:
 	bx	lr
 .L1358:
@@ -16125,10 +10049,6 @@ Ftl_save_ext_data:
 	.word	.LANCHOR65
 	.word	.LANCHOR76
 	.word	.LANCHOR77
-.LBE312:
-.LBE311:
-	.cfi_endproc
-.LFE289:
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
 	.section	.text.FtlEctTblFlush,"ax",%progbits
 	.align	1
@@ -16139,76 +10059,44 @@ Ftl_save_ext_data:
 	.fpu softvfp
 	.type	FtlEctTblFlush, %function
 FtlEctTblFlush:
-.LFB268:
-	.loc 2 910 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1535:
-	.loc 2 913 0
 	ldr	r2, .L1364
-	.loc 2 910 0
 	push	{r3, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 3, -8
-	.cfi_offset 14, -4
-	.loc 2 913 0
 	ldrh	r3, [r2]
 	cmp	r3, #31
-	.loc 2 914 0
 	itett	ls
 	addls	r3, r3, #1
-	.loc 2 911 0
 	movhi	r3, #32
-	.loc 2 914 0
 	strhls	r3, [r2]	@ movhi
-.LVL1536:
-	.loc 2 915 0
 	movls	r3, #1
-.LVL1537:
 	ldr	r2, .L1364+4
-	.loc 2 917 0
 	cbnz	r0, .L1361
-	.loc 2 917 0 is_stmt 0 discriminator 1
 	ldr	r1, [r2]
 	ldr	r0, [r1, #20]
-.LVL1538:
 	ldr	r1, [r1, #16]
 	add	r3, r3, r0
-.LVL1539:
 	cmp	r1, r3
 	bcc	.L1362
 .L1361:
-	.loc 2 919 0 is_stmt 1
 	ldr	r2, [r2]
-	.loc 2 924 0
 	movs	r0, #64
-	.loc 2 919 0
 	ldr	r3, [r2, #16]
 	str	r3, [r2, #20]
-	.loc 2 920 0
 	ldr	r3, .L1364+8
 	str	r3, [r2]
-	.loc 2 921 0
 	ldr	r3, .L1364+12
 	ldrh	r1, [r3]
 	lsls	r3, r1, #9
 	str	r3, [r2, #12]
-	.loc 2 922 0
 	ldr	r3, [r2, #8]
 	adds	r3, r3, #1
 	str	r3, [r2, #8]
-	.loc 2 923 0
 	movs	r3, #0
 	str	r3, [r2, #4]
-	.loc 2 924 0
 	bl	FtlVendorPartWrite
-.LVL1540:
-	.loc 2 925 0
 	bl	Ftl_save_ext_data
-.LVL1541:
 .L1362:
-	.loc 2 927 0
 	movs	r0, #0
 	pop	{r3, pc}
 .L1365:
@@ -16218,9 +10106,22 @@ FtlEctTblFlush:
 	.word	.LANCHOR127
 	.word	1112818501
 	.word	.LANCHOR125
-	.cfi_endproc
-.LFE268:
 	.size	FtlEctTblFlush, .-FtlEctTblFlush
+	.section	.text.sftl_vendor_write,"ax",%progbits
+	.align	1
+	.global	sftl_vendor_write
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sftl_vendor_write, %function
+sftl_vendor_write:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	add	r0, r0, #256
+	b	FtlVendorPartWrite
+	.size	sftl_vendor_write, .-sftl_vendor_write
 	.section	.text.FtlVendorPartRead,"ax",%progbits
 	.align	1
 	.global	FtlVendorPartRead
@@ -16230,174 +10131,96 @@ FtlEctTblFlush:
 	.fpu softvfp
 	.type	FtlVendorPartRead, %function
 FtlVendorPartRead:
-.LFB267:
-	.loc 2 872 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1542:
-	.loc 2 881 0
-	ldr	r3, .L1375
-	.loc 2 872 0
+	ldr	r3, .L1376
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
 	mov	r8, r2
-	.loc 2 881 0
 	adds	r2, r0, r1
-.LVL1543:
-	.loc 2 872 0
 	sub	sp, sp, #104
-	.cfi_def_cfa_offset 136
-	.loc 2 872 0
 	mov	r6, r0
 	mov	r5, r1
-	.loc 2 881 0
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1374
-	.loc 2 877 0
-	ldr	r3, .L1375+4
+	bhi	.L1375
+	ldr	r3, .L1376+4
 	movs	r7, #0
-	.loc 2 891 0
-	ldr	fp, .L1375+16
-	.loc 2 877 0
+	ldr	fp, .L1376+16
 	ldrh	r3, [r3]
 	lsr	r3, r0, r3
 	lsls	r3, r3, #2
 	str	r3, [sp, #4]
-.LVL1544:
-.L1368:
-	.loc 2 883 0
-	cbnz	r5, .L1373
-.LVL1545:
-.L1366:
-	.loc 2 906 0
+.L1369:
+	cbnz	r5, .L1374
+.L1367:
 	mov	r0, r7
 	add	sp, sp, #104
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1546:
-.L1373:
-	.cfi_restore_state
-	.loc 2 884 0
-	ldr	r3, .L1375+8
-	.loc 2 885 0
+.L1374:
+	ldr	r3, .L1376+8
 	mov	r0, r6
-	.loc 2 884 0
 	ldr	r2, [sp, #4]
 	ldr	r3, [r3]
 	ldr	r3, [r3, r2]
-	.loc 2 885 0
-	ldr	r2, .L1375+12
-	.loc 2 884 0
+	ldr	r2, .L1376+12
 	str	r3, [sp, #12]
-.LVL1547:
-	.loc 2 885 0
 	ldrh	r4, [r2]
 	mov	r1, r4
 	bl	__aeabi_uidivmod
-.LVL1548:
-	.loc 2 886 0
 	subs	r4, r4, r1
-	.loc 2 887 0
 	ldr	r3, [sp, #12]
-	.loc 2 886 0
 	uxth	r4, r4
-	.loc 2 885 0
 	str	r1, [sp, #8]
-.LVL1549:
-	.loc 2 887 0
 	cmp	r5, r4
-	.loc 2 888 0
 	it	cc
 	uxthcc	r4, r5
-.LVL1550:
 	lsl	r10, r4, #9
-	.loc 2 889 0
-	cbz	r3, .L1370
-	.loc 2 890 0
+	cbz	r3, .L1371
 	str	r3, [sp, #24]
-	.loc 2 893 0
 	movs	r2, #1
-	.loc 2 891 0
 	ldr	r3, [fp]
-	.loc 2 893 0
 	mov	r1, r2
 	add	r0, sp, #20
-	.loc 2 891 0
 	str	r3, [sp, #28]
-	.loc 2 892 0
 	add	r3, sp, #40
 	str	r3, [sp, #32]
-	.loc 2 893 0
 	bl	FlashReadPages
-.LVL1551:
-	.loc 2 894 0
 	ldr	r3, [sp, #20]
-	.loc 2 896 0
 	mov	r2, r10
 	ldr	r1, [fp]
 	mov	r0, r8
-	.loc 2 895 0
 	adds	r3, r3, #1
-	.loc 2 896 0
 	ldr	r3, [sp, #8]
-	.loc 2 895 0
 	it	eq
 	moveq	r7, #-1
-.LVL1552:
-	.loc 2 896 0
 	add	r1, r1, r3, lsl #9
 	bl	ftl_memcpy
-.LVL1553:
-.L1372:
+.L1373:
 	ldr	r3, [sp, #4]
-	.loc 2 901 0
 	subs	r5, r5, r4
-.LVL1554:
-	.loc 2 902 0
 	add	r6, r6, r4
-.LVL1555:
-	.loc 2 903 0
 	add	r8, r8, r10
-.LVL1556:
 	adds	r3, r3, #4
 	str	r3, [sp, #4]
-	b	.L1368
-.LVL1557:
-.L1370:
-	.loc 2 898 0
+	b	.L1369
+.L1371:
 	mov	r2, r10
 	mov	r1, r3
 	mov	r0, r8
 	bl	ftl_memset
-.LVL1558:
-	b	.L1372
-.LVL1559:
-.L1374:
-	.loc 2 882 0
+	b	.L1373
+.L1375:
 	mov	r7, #-1
-	b	.L1366
-.L1376:
+	b	.L1367
+.L1377:
 	.align	2
-.L1375:
+.L1376:
 	.word	.LANCHOR16
 	.word	.LANCHOR22
 	.word	.LANCHOR133
 	.word	.LANCHOR12
 	.word	.LANCHOR124
-	.cfi_endproc
-.LFE267:
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
 	.section	.text.FtlLoadEctTbl,"ax",%progbits
 	.align	1
@@ -16408,61 +10231,39 @@ FtlVendorPartRead:
 	.fpu softvfp
 	.type	FtlLoadEctTbl, %function
 FtlLoadEctTbl:
-.LFB274:
-	.loc 2 1383 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 2 1384 0
 	movs	r0, #64
-	ldr	r4, .L1379
-	ldr	r5, .L1379+4
+	ldr	r4, .L1380
+	ldr	r5, .L1380+4
 	ldr	r2, [r4]
 	ldrh	r1, [r5]
 	bl	FtlVendorPartRead
-.LVL1560:
-	.loc 2 1385 0
 	ldr	r3, [r4]
 	ldr	r2, [r3]
-	ldr	r3, .L1379+8
+	ldr	r3, .L1380+8
 	cmp	r2, r3
-	beq	.L1378
-.LBB315:
-.LBB316:
-	.loc 2 1387 0
-	ldr	r1, .L1379+12
-	ldr	r0, .L1379+16
+	beq	.L1379
+	ldr	r1, .L1380+12
+	ldr	r0, .L1380+16
 	bl	printf
-.LVL1561:
-	.loc 2 1388 0
 	ldrh	r2, [r5]
 	movs	r1, #0
 	ldr	r0, [r4]
 	lsls	r2, r2, #9
 	bl	ftl_memset
-.LVL1562:
-.L1378:
-.LBE316:
-.LBE315:
-	.loc 2 1393 0
+.L1379:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L1380:
+.L1381:
 	.align	2
-.L1379:
+.L1380:
 	.word	.LANCHOR127
 	.word	.LANCHOR125
 	.word	1112818501
 	.word	.LC103
 	.word	.LC71
-	.cfi_endproc
-.LFE274:
 	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
 	.section	.text.Ftl_load_ext_data,"ax",%progbits
 	.align	1
@@ -16473,112 +10274,79 @@ FtlLoadEctTbl:
 	.fpu softvfp
 	.type	Ftl_load_ext_data, %function
 Ftl_load_ext_data:
-.LFB290:
-	.loc 2 2179 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 2 2180 0
 	movs	r1, #1
-	ldr	r4, .L1384
+	ldr	r4, .L1385
 	movs	r0, #0
-	.loc 2 2181 0
-	ldr	r5, .L1384+4
-	.loc 2 2180 0
+	ldr	r5, .L1385+4
 	mov	r2, r4
 	bl	FtlVendorPartRead
-.LVL1563:
-	.loc 2 2181 0
 	ldr	r3, [r4]
 	cmp	r3, r5
-	beq	.L1382
-	.loc 2 2182 0
+	beq	.L1383
 	mov	r2, #512
 	movs	r1, #0
 	mov	r0, r4
 	bl	ftl_memset
-.LVL1564:
-	.loc 2 2183 0
 	str	r5, [r4]
-.L1382:
-	.loc 2 2186 0
+.L1383:
 	ldr	r3, [r4]
 	cmp	r3, r5
-	ldr	r3, .L1384+8
-	bne	.L1383
-	.loc 2 2187 0
+	ldr	r3, .L1385+8
+	bne	.L1384
 	ldr	r1, [r4, #88]
-	ldr	r2, .L1384+12
+	ldr	r2, .L1385+12
 	str	r1, [r2]
-	.loc 2 2188 0
 	ldr	r1, [r4, #92]
-	ldr	r2, .L1384+16
+	ldr	r2, .L1385+16
 	str	r1, [r2]
-	.loc 2 2189 0
 	ldr	r1, [r4, #8]
-	ldr	r2, .L1384+20
+	ldr	r2, .L1385+20
 	str	r1, [r2]
-	.loc 2 2190 0
 	ldr	r1, [r4, #12]
-	ldr	r2, .L1384+24
+	ldr	r2, .L1385+24
 	str	r1, [r2]
-	.loc 2 2191 0
 	ldr	r1, [r4, #16]
-	ldr	r2, .L1384+28
+	ldr	r2, .L1385+28
 	str	r1, [r2]
-	.loc 2 2192 0
 	ldr	r1, [r4, #20]
-	ldr	r2, .L1384+32
+	ldr	r2, .L1385+32
 	str	r1, [r2]
-	.loc 2 2193 0
 	ldr	r2, [r4, #28]
-	.loc 2 2194 0
 	ldr	r1, [r4, #32]
-	.loc 2 2193 0
 	str	r2, [r3]
-	.loc 2 2194 0
-	ldr	r2, .L1384+36
+	ldr	r2, .L1385+36
 	str	r1, [r2]
-	.loc 2 2195 0
 	ldr	r1, [r4, #36]
-	ldr	r2, .L1384+40
+	ldr	r2, .L1385+40
 	str	r1, [r2]
-	.loc 2 2196 0
 	ldr	r1, [r4, #40]
-	ldr	r2, .L1384+44
+	ldr	r2, .L1385+44
 	str	r1, [r2]
-	.loc 2 2197 0
 	ldr	r1, [r4, #44]
-	ldr	r2, .L1384+48
+	ldr	r2, .L1385+48
 	str	r1, [r2]
-	.loc 2 2198 0
 	ldr	r1, [r4, #48]
-	ldr	r2, .L1384+52
+	ldr	r2, .L1385+52
 	str	r1, [r2]
-.L1383:
-	.loc 2 2201 0
-	ldr	r1, .L1384+56
-	ldr	r2, .L1384+60
+.L1384:
+	ldr	r1, .L1385+56
+	ldr	r2, .L1385+60
 	ldr	r3, [r3]
 	ldr	r0, [r1]
 	ldrh	r2, [r2]
-	ldr	r1, .L1384+64
+	ldr	r1, .L1385+64
 	mla	r0, r0, r2, r3
 	ldrh	r1, [r1]
 	bl	__aeabi_uidiv
-.LVL1565:
-	ldr	r3, .L1384+68
+	ldr	r3, .L1385+68
 	str	r0, [r3]
 	pop	{r3, r4, r5, pc}
-.L1385:
+.L1386:
 	.align	2
-.L1384:
+.L1385:
 	.word	.LANCHOR81
 	.word	1179929683
 	.word	.LANCHOR73
@@ -16597,9 +10365,22 @@ Ftl_load_ext_data:
 	.word	.LANCHOR14
 	.word	.LANCHOR5
 	.word	.LANCHOR74
-	.cfi_endproc
-.LFE290:
 	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
+	.section	.text.sftl_vendor_read,"ax",%progbits
+	.align	1
+	.global	sftl_vendor_read
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sftl_vendor_read, %function
+sftl_vendor_read:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	add	r0, r0, #256
+	b	FtlVendorPartRead
+	.size	sftl_vendor_read, .-sftl_vendor_read
 	.section	.text.FtlVpcTblFlush,"ax",%progbits
 	.align	1
 	.global	FtlVpcTblFlush
@@ -16609,165 +10390,91 @@ Ftl_load_ext_data:
 	.fpu softvfp
 	.type	FtlVpcTblFlush, %function
 FtlVpcTblFlush:
-.LFB272:
-	.loc 2 1053 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1566:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 1065 0
 	movs	r6, #0
-	.loc 2 1062 0
-	ldr	r3, .L1398
-	.loc 2 1054 0
+	ldr	r3, .L1400
 	movw	fp, #65535
-	.loc 2 1059 0
-	ldr	r8, .L1398+80
-	.loc 2 1060 0
-	ldr	r10, .L1398+84
-	.loc 2 1062 0
+	ldr	r8, .L1400+80
+	ldr	r10, .L1400+84
 	ldrh	r2, [r3]
-	.loc 2 1059 0
 	ldr	r0, [r8]
-	.loc 2 1060 0
 	ldr	r7, [r10]
-	.loc 2 1059 0
-	ldr	r5, .L1398+4
-	.loc 2 1068 0
-	ldr	r4, .L1398+8
-	.loc 2 1069 0
-	ldr	r1, .L1398+12
-	.loc 2 1059 0
+	ldr	r5, .L1400+4
+	ldr	r4, .L1400+8
+	ldr	r1, .L1400+12
 	str	r0, [r5, #8]
-	.loc 2 1060 0
 	str	r7, [r5, #12]
-.LVL1567:
-	.loc 2 1062 0
 	strh	r2, [r7, #2]	@ movhi
-	.loc 2 1063 0
 	movw	r2, #61604
 	strh	r2, [r7]	@ movhi
-	.loc 2 1064 0
 	ldr	r2, [r3, #8]
-	.loc 2 1065 0
 	str	r6, [r7, #8]
-	.loc 2 1066 0
 	str	r6, [r7, #12]
-	.loc 2 1064 0
 	str	r2, [r7, #4]
-	.loc 2 1069 0
-	ldr	r2, .L1398+16
-	.loc 2 1070 0
+	ldr	r2, .L1400+16
 	str	r3, [sp, #4]
-	.loc 2 1069 0
 	stm	r4, {r1, r2}
-	.loc 2 1070 0
 	ldrh	r2, [r3, #6]
 	strh	r2, [r4, #8]	@ movhi
-	.loc 2 1071 0
-	ldr	r2, .L1398+20
+	ldr	r2, .L1400+20
 	ldrh	r2, [r2]
 	strb	r2, [r4, #10]
-	.loc 2 1073 0
-	ldr	r2, .L1398+24
+	ldr	r2, .L1400+24
 	ldrh	r1, [r2]
-	.loc 2 1074 0
 	ldrh	ip, [r2, #2]
-	.loc 2 1073 0
 	strh	r1, [r4, #14]	@ movhi
-	.loc 2 1074 0
 	ldrb	r1, [r2, #6]	@ zero_extendqisi2
-	.loc 2 1075 0
 	ldrb	r2, [r2, #8]	@ zero_extendqisi2
 	strb	r2, [r4, #11]
-	.loc 2 1074 0
 	orr	r1, r1, ip, lsl #6
-	.loc 2 1077 0
-	ldr	r2, .L1398+28
-	.loc 2 1074 0
+	ldr	r2, .L1400+28
 	strh	r1, [r4, #16]	@ movhi
-	.loc 2 1077 0
 	ldrh	r1, [r2]
-	.loc 2 1078 0
 	ldrh	ip, [r2, #2]
-	.loc 2 1077 0
 	strh	r1, [r4, #18]	@ movhi
-	.loc 2 1078 0
 	ldrb	r1, [r2, #6]	@ zero_extendqisi2
-	.loc 2 1079 0
 	ldrb	r2, [r2, #8]	@ zero_extendqisi2
-	.loc 2 1078 0
 	orr	r1, r1, ip, lsl #6
 	strh	r1, [r4, #20]	@ movhi
-	.loc 2 1079 0
 	strb	r2, [r4, #12]
-	.loc 2 1081 0
-	ldr	r2, .L1398+32
+	ldr	r2, .L1400+32
 	ldrh	r1, [r2]
-	.loc 2 1082 0
 	ldrh	ip, [r2, #2]
-	.loc 2 1081 0
 	strh	r1, [r4, #22]	@ movhi
-	.loc 2 1082 0
 	ldrb	r1, [r2, #6]	@ zero_extendqisi2
-	.loc 2 1083 0
 	ldrb	r2, [r2, #8]	@ zero_extendqisi2
 	strb	r2, [r4, #13]
-	.loc 2 1082 0
 	orr	r1, r1, ip, lsl #6
-	.loc 2 1085 0
-	ldr	r2, .L1398+36
-	.loc 2 1082 0
+	ldr	r2, .L1400+36
 	strh	r1, [r4, #24]	@ movhi
-	.loc 2 1096 0
 	movs	r1, #255
-	.loc 2 1085 0
 	ldr	r2, [r2]
 	str	r2, [r4, #32]
-	.loc 2 1090 0
-	ldr	r2, .L1398+40
+	ldr	r2, .L1400+40
 	ldr	r2, [r2]
 	str	r2, [r4, #40]
-	.loc 2 1091 0
-	ldr	r2, .L1398+44
+	ldr	r2, .L1400+44
 	ldr	r2, [r2]
 	str	r2, [r4, #36]
-	.loc 2 1096 0
-	ldr	r2, .L1398+48
+	ldr	r2, .L1400+48
 	ldrh	r2, [r2]
 	bl	ftl_memset
-.LVL1568:
-	.loc 2 1097 0
 	mov	r1, r4
-	.loc 2 1098 0
-	ldr	r4, .L1398+52
-	.loc 2 1097 0
+	ldr	r4, .L1400+52
 	movs	r2, #48
 	ldr	r0, [r5, #8]
 	bl	ftl_memcpy
-.LVL1569:
-	.loc 2 1098 0
 	ldrh	r2, [r4]
 	ldr	r0, [r5, #8]
-	ldr	r1, .L1398+56
+	ldr	r1, .L1400+56
 	lsls	r2, r2, #1
 	adds	r0, r0, #48
 	ldr	r1, [r1]
 	bl	ftl_memcpy
-.LVL1570:
-	.loc 2 1099 0
 	ldrh	r0, [r4]
-	ldr	r1, .L1398+60
+	ldr	r1, .L1400+60
 	ldr	r4, [r5, #8]
 	lsrs	r2, r0, #3
 	adds	r0, r0, #24
@@ -16777,154 +10484,100 @@ FtlVpcTblFlush:
 	bic	r0, r0, #3
 	add	r0, r0, r4
 	bl	ftl_memcpy
-.LVL1571:
-	.loc 2 1100 0
 	mov	r0, r6
 	bl	FtlUpdateVaildLpn
-.LVL1572:
 	ldr	r3, [sp, #4]
 	mov	r4, r3
-.LVL1573:
-.L1387:
-	.loc 2 1102 0
+.L1389:
 	ldr	r3, [r8]
-	.loc 2 1104 0
 	ldrh	r2, [r4]
-	.loc 2 1105 0
-	ldr	r0, .L1398+4
-	.loc 2 1102 0
+	ldr	r0, .L1400+4
 	str	r3, [r5, #8]
-	.loc 2 1103 0
 	ldr	r3, [r10]
 	str	r3, [r5, #12]
-	.loc 2 1104 0
 	ldrh	r3, [r4, #2]
 	orr	r3, r3, r2, lsl #10
 	str	r3, [r5, #4]
-	.loc 2 1105 0
 	movs	r3, #1
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL1574:
-	.loc 2 1106 0
-	ldr	r3, .L1398+64
+	ldr	r3, .L1400+64
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1388
-	.loc 2 1108 0
+	blt	.L1390
 	ldrh	r3, [r4]
-	.loc 2 1107 0
 	ldrh	fp, [r4, #4]
-.LVL1575:
-	.loc 2 1108 0
 	strh	r3, [r4, #4]	@ movhi
-	.loc 2 1109 0
 	movs	r3, #0
 	strh	r3, [r4, #2]	@ movhi
-	.loc 2 1110 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL1576:
-	.loc 2 1115 0
-	ldr	r2, .L1398+40
-	.loc 2 1110 0
+	ldr	r2, .L1400+40
 	strh	r0, [r4]	@ movhi
-	.loc 2 1115 0
 	ldr	r3, [r2]
 	adds	r1, r3, #1
 	str	r3, [r4, #8]
 	str	r1, [r2]
-	.loc 2 1116 0
 	lsls	r2, r0, #10
 	str	r2, [r5, #4]
-	.loc 2 1117 0
 	str	r3, [r7, #4]
-	.loc 2 1119 0
 	movs	r3, #1
-	.loc 2 1118 0
 	strh	r0, [r7, #2]	@ movhi
-	.loc 2 1119 0
 	mov	r2, r3
 	mov	r1, r3
-	ldr	r0, .L1398+4
+	ldr	r0, .L1400+4
 	bl	FlashProgPages
-.LVL1577:
-.L1388:
-	.loc 2 1121 0
+.L1390:
 	ldrh	r3, [r4, #2]
-	.loc 2 1122 0
 	ldr	r2, [r5]
-	.loc 2 1121 0
 	adds	r3, r3, #1
 	uxth	r3, r3
-	.loc 2 1122 0
 	adds	r2, r2, #1
-	.loc 2 1121 0
 	strh	r3, [r4, #2]	@ movhi
-	.loc 2 1122 0
-	bne	.L1389
-	.loc 2 1124 0
+	bne	.L1391
 	cmp	r3, #1
-	bne	.L1390
-	.loc 2 1124 0 is_stmt 0 discriminator 1
+	bne	.L1392
 	movw	r2, #1124
-	ldr	r1, .L1398+68
-	ldr	r0, .L1398+72
+	ldr	r1, .L1400+68
+	ldr	r0, .L1400+72
 	bl	printf
-.LVL1578:
-.L1390:
-	.loc 2 1125 0 is_stmt 1
+.L1392:
 	ldrh	r3, [r4, #2]
-	.loc 2 1127 0
 	adds	r6, r6, #1
-.LVL1579:
 	uxth	r6, r6
-.LVL1580:
-	.loc 2 1125 0
 	cmp	r3, #1
-	.loc 2 1126 0
 	itttt	eq
-	ldreq	r3, .L1398+64
+	ldreq	r3, .L1400+64
 	ldrheq	r3, [r3]
 	addeq	r3, r3, #-1
 	strheq	r3, [r4, #2]	@ movhi
-	.loc 2 1128 0
 	cmp	r6, #3
-	bls	.L1387
-	.loc 2 1129 0
+	bls	.L1389
 	mov	r2, r6
 	ldr	r1, [r5, #4]
-	ldr	r0, .L1398+76
+	ldr	r0, .L1400+76
 	bl	printf
-.LVL1581:
-.L1393:
-	b	.L1393
-.L1389:
-	.loc 2 1135 0
+.L1395:
+	b	.L1395
+.L1391:
 	cmp	r3, #1
-	beq	.L1387
-	.loc 2 1138 0
+	beq	.L1389
 	movw	r3, #65535
 	cmp	fp, r3
-	beq	.L1394
-	.loc 2 1139 0
+	beq	.L1396
 	movs	r1, #1
 	mov	r0, fp
 	bl	FtlFreeSysBlkQueueIn
-.LVL1582:
-.L1394:
-	.loc 2 1141 0
+.L1396:
 	movs	r0, #0
 	add	sp, sp, #8
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1583:
-.L1399:
+.L1401:
 	.align	2
-.L1398:
+.L1400:
 	.word	.LANCHOR79
 	.word	.LANCHOR106
 	.word	.LANCHOR39
@@ -16947,8 +10600,6 @@ FtlVpcTblFlush:
 	.word	.LC104
 	.word	.LANCHOR107
 	.word	.LANCHOR108
-	.cfi_endproc
-.LFE272:
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
 	.section	.text.FtlSysFlush,"ax",%progbits
 	.align	1
@@ -16959,30 +10610,15 @@ FtlVpcTblFlush:
 	.fpu softvfp
 	.type	FtlSysFlush, %function
 FtlSysFlush:
-.LFB215:
-	.loc 3 797 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 3, -8
-	.cfi_offset 14, -4
-	.loc 3 799 0
 	bl	l2p_flush
-.LVL1584:
-	.loc 3 800 0
 	movs	r0, #1
 	bl	FtlEctTblFlush
-.LVL1585:
-	.loc 3 801 0
 	bl	FtlVpcTblFlush
-.LVL1586:
-	.loc 3 803 0
 	movs	r0, #0
 	pop	{r3, pc}
-	.cfi_endproc
-.LFE215:
 	.size	FtlSysFlush, .-FtlSysFlush
 	.section	.text.sftl_deinit,"ax",%progbits
 	.align	1
@@ -16993,33 +10629,21 @@ FtlSysFlush:
 	.fpu softvfp
 	.type	sftl_deinit, %function
 sftl_deinit:
-.LFB216:
-	.loc 3 806 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 3, -8
-	.cfi_offset 14, -4
-	.loc 3 807 0
-	ldr	r3, .L1403
+	ldr	r3, .L1405
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L1402
-	.loc 3 808 0
+	bne	.L1404
 	bl	FtlSysFlush
-.LVL1587:
-.L1402:
-	.loc 3 810 0
+.L1404:
 	movs	r0, #0
 	pop	{r3, pc}
-.L1404:
+.L1406:
 	.align	2
-.L1403:
+.L1405:
 	.word	.LANCHOR86
-	.cfi_endproc
-.LFE216:
 	.size	sftl_deinit, .-sftl_deinit
 	.section	.text.FtlDiscard,"ax",%progbits
 	.align	1
@@ -17030,172 +10654,96 @@ sftl_deinit:
 	.fpu softvfp
 	.type	FtlDiscard, %function
 FtlDiscard:
-.LFB221:
-	.loc 3 1121 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1588:
-	.loc 3 1128 0
-	ldr	r3, .L1420
+	ldr	r3, .L1422
 	adds	r2, r0, r1
-	.loc 3 1121 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -24
-	.cfi_offset 5, -20
-	.cfi_offset 6, -16
-	.cfi_offset 7, -12
-	.cfi_offset 8, -8
-	.cfi_offset 14, -4
-	.loc 3 1121 0
 	mov	r7, r0
 	mov	r5, r1
-	.loc 3 1128 0
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1413
-	.loc 3 1131 0
+	bhi	.L1415
 	cmp	r1, #31
-	bhi	.L1407
-.LVL1589:
-.L1412:
-	.loc 3 1132 0
+	bhi	.L1409
+.L1414:
 	movs	r0, #0
-.L1405:
-	.loc 3 1165 0
+.L1407:
 	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL1590:
-.L1407:
-	.cfi_restore_state
-	.loc 3 1136 0
-	ldr	r8, .L1420+12
+.L1409:
+	ldr	r8, .L1422+12
 	ldrh	r4, [r8]
 	mov	r1, r4
-.LVL1591:
 	bl	__aeabi_uidiv
-.LVL1592:
-	.loc 3 1137 0
 	smulbb	r3, r0, r4
-	.loc 3 1136 0
 	mov	r6, r0
-.LVL1593:
-	.loc 3 1137 0
 	subs	r7, r7, r3
-.LVL1594:
 	uxth	r7, r7
-.LVL1595:
-	.loc 3 1138 0
-	cbz	r7, .L1408
-.LVL1596:
-	.loc 3 1139 0
+	cbz	r7, .L1410
 	subs	r4, r4, r7
-.LVL1597:
-	.loc 3 1140 0
 	adds	r6, r6, #1
-.LVL1598:
-	.loc 3 1139 0
 	cmp	r4, r5
 	it	cs
 	movcs	r4, r5
 	uxth	r4, r4
-	.loc 3 1141 0
 	subs	r5, r5, r4
-.LVL1599:
-.L1408:
-	.loc 3 1148 0
-	ldr	r4, .L1420+4
-	.loc 3 1144 0
+.L1410:
+	ldr	r4, .L1422+4
 	mov	r3, #-1
-	.loc 3 1149 0
-	ldr	r7, .L1420+8
-.LVL1600:
-	.loc 3 1144 0
+	ldr	r7, .L1422+8
 	str	r3, [sp, #4]
-.L1409:
-	.loc 3 1145 0
+.L1411:
 	ldrh	r3, [r8]
 	cmp	r5, r3
-	bcs	.L1411
-	.loc 3 1158 0
-	ldr	r3, .L1420+4
+	bcs	.L1413
+	ldr	r3, .L1422+4
 	ldr	r2, [r3]
 	cmp	r2, #32
-	bls	.L1412
-	.loc 3 1160 0
+	bls	.L1414
 	movs	r4, #0
 	str	r4, [r3]
-	.loc 3 1161 0
 	bl	l2p_flush
-.LVL1601:
-	.loc 3 1162 0
 	bl	FtlVpcTblFlush
-.LVL1602:
-	b	.L1412
-.L1411:
-	.loc 3 1146 0
+	b	.L1414
+.L1413:
 	movs	r2, #0
 	mov	r1, sp
 	mov	r0, r6
 	bl	log2phys
-.LVL1603:
-	.loc 3 1147 0
 	ldr	r3, [sp]
 	adds	r3, r3, #1
-	beq	.L1410
-	.loc 3 1148 0
+	beq	.L1412
 	ldr	r3, [r4]
-	.loc 3 1150 0
 	movs	r2, #1
 	add	r1, sp, #4
 	mov	r0, r6
-	.loc 3 1148 0
 	adds	r3, r3, #1
 	str	r3, [r4]
-	.loc 3 1149 0
 	ldr	r3, [r7]
 	adds	r3, r3, #1
 	str	r3, [r7]
-	.loc 3 1150 0
 	bl	log2phys
-.LVL1604:
-	.loc 3 1151 0
 	ldr	r0, [sp]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1605:
-	.loc 3 1152 0
 	bl	decrement_vpc_count
-.LVL1606:
-.L1410:
-	.loc 3 1155 0
+.L1412:
 	ldrh	r3, [r8]
-	.loc 3 1154 0
 	adds	r6, r6, #1
-.LVL1607:
-	.loc 3 1155 0
 	subs	r5, r5, r3
-.LVL1608:
-	b	.L1409
-.LVL1609:
-.L1413:
-	.loc 3 1129 0
+	b	.L1411
+.L1415:
 	mov	r0, #-1
-.LVL1610:
-	b	.L1405
-.L1421:
+	b	.L1407
+.L1423:
 	.align	2
-.L1420:
+.L1422:
 	.word	.LANCHOR34
 	.word	.LANCHOR167
 	.word	.LANCHOR63
 	.word	.LANCHOR12
-	.cfi_endproc
-.LFE221:
 	.size	FtlDiscard, .-FtlDiscard
 	.section	.text.FtlVpcCheckAndModify,"ax",%progbits
 	.align	1
@@ -17206,149 +10754,93 @@ FtlDiscard:
 	.fpu softvfp
 	.type	FtlVpcCheckAndModify, %function
 FtlVpcCheckAndModify:
-.LFB292:
-	.loc 2 2242 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -28
-	.cfi_offset 5, -24
-	.cfi_offset 6, -20
-	.cfi_offset 7, -16
-	.cfi_offset 8, -12
-	.cfi_offset 10, -8
-	.cfi_offset 14, -4
-	.loc 2 2249 0
 	movs	r5, #0
-	.loc 2 2247 0
-	ldr	r1, .L1434
-	ldr	r0, .L1434+4
+	ldr	r1, .L1436
+	ldr	r0, .L1436+4
 	bl	printf
-.LVL1611:
-	.loc 2 2248 0
-	ldr	r3, .L1434+8
+	ldr	r3, .L1436+8
 	movs	r1, #0
-	ldr	r4, .L1434+12
-	.loc 2 2249 0
-	ldr	r6, .L1434+16
-	.loc 2 2248 0
+	ldr	r4, .L1436+12
+	ldr	r6, .L1436+16
 	ldrh	r2, [r3]
 	ldr	r0, [r4]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-.LVL1612:
-.L1423:
-	.loc 2 2249 0 discriminator 1
+.L1425:
 	ldr	r3, [r6]
 	cmp	r5, r3
-	bcc	.L1425
-	.loc 2 2256 0 discriminator 1
-	ldr	r10, .L1434+36
+	bcc	.L1427
+	ldr	r10, .L1436+36
 	movs	r7, #0
-	.loc 2 2257 0 discriminator 1
-	ldr	r8, .L1434+40
-.LVL1613:
-.L1426:
-	.loc 2 2256 0 discriminator 1
+	ldr	r8, .L1436+40
+.L1428:
 	ldrh	r3, [r10]
 	uxth	r5, r7
-.LVL1614:
 	cmp	r3, r5
-	bhi	.L1430
-	.loc 2 2268 0
+	bhi	.L1432
 	add	sp, sp, #12
-	.cfi_remember_state
-	.cfi_def_cfa_offset 28
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.LVL1615:
-.L1425:
-	.cfi_restore_state
-	.loc 2 2250 0
+.L1427:
 	movs	r2, #0
 	add	r1, sp, #4
 	mov	r0, r5
 	bl	log2phys
-.LVL1616:
-	.loc 2 2251 0
 	ldr	r0, [sp, #4]
 	adds	r3, r0, #1
-	beq	.L1424
-	.loc 2 2252 0
+	beq	.L1426
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1617:
-	.loc 2 2253 0
 	ldr	r2, [r4]
 	ldrh	r3, [r2, r0, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r0, lsl #1]	@ movhi
-.LVL1618:
-.L1424:
-	.loc 2 2249 0 discriminator 2
+.L1426:
 	adds	r5, r5, #1
-.LVL1619:
-	b	.L1423
-.LVL1620:
-.L1430:
-	.loc 2 2257 0
+	b	.L1425
+.L1432:
 	ldr	r3, [r8]
 	uxth	r6, r7
 	ldrh	r2, [r3, r6, lsl #1]
 	ldr	r3, [r4]
 	ldrh	r3, [r3, r6, lsl #1]
 	cmp	r2, r3
-	beq	.L1428
-	.loc 2 2257 0 is_stmt 0 discriminator 1
+	beq	.L1430
 	movw	r1, #65535
 	cmp	r2, r1
-	beq	.L1428
-	.loc 2 2259 0 is_stmt 1
+	beq	.L1430
 	mov	r1, r6
-	ldr	r0, .L1434+20
+	ldr	r0, .L1436+20
 	bl	printf
-.LVL1621:
-	.loc 2 2260 0
-	ldr	r3, .L1434+24
+	ldr	r3, .L1436+24
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	beq	.L1428
-	.loc 2 2260 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1434+28
+	beq	.L1430
+	ldr	r3, .L1436+28
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	beq	.L1428
-	.loc 2 2260 0 discriminator 2
-	ldr	r3, .L1434+32
+	beq	.L1430
+	ldr	r3, .L1436+32
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	beq	.L1428
-	.loc 2 2261 0 is_stmt 1
+	beq	.L1430
 	ldr	r3, [r4]
-	.loc 2 2262 0
 	mov	r0, r5
-	.loc 2 2261 0
 	ldrh	r2, [r3, r6, lsl #1]
 	ldr	r3, [r8]
 	strh	r2, [r3, r6, lsl #1]	@ movhi
-	.loc 2 2262 0
 	bl	update_vpc_list
-.LVL1622:
-	.loc 2 2263 0
 	bl	l2p_flush
-.LVL1623:
-	.loc 2 2264 0
 	bl	FtlVpcTblFlush
-.LVL1624:
-.L1428:
+.L1430:
 	adds	r7, r7, #1
-.LVL1625:
-	b	.L1426
-.L1435:
+	b	.L1428
+.L1437:
 	.align	2
-.L1434:
+.L1436:
 	.word	.LANCHOR168
 	.word	.LC94
 	.word	.LANCHOR6
@@ -17360,8 +10852,6 @@ FtlVpcCheckAndModify:
 	.word	.LANCHOR52
 	.word	.LANCHOR5
 	.word	.LANCHOR42
-	.cfi_endproc
-.LFE292:
 	.size	FtlVpcCheckAndModify, .-FtlVpcCheckAndModify
 	.section	.text.allocate_new_data_superblock,"ax",%progbits
 	.align	1
@@ -17372,114 +10862,68 @@ FtlVpcCheckAndModify:
 	.fpu softvfp
 	.type	allocate_new_data_superblock, %function
 allocate_new_data_superblock:
-.LFB302:
-	.loc 2 2682 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1626:
-	.loc 2 2684 0
-	ldr	r3, .L1446
-	.loc 2 2682 0
+	ldr	r3, .L1448
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 2 2682 0
 	mov	r6, r0
-	.loc 2 2683 0
 	ldrh	r4, [r0]
-.LVL1627:
-	.loc 2 2684 0
 	ldrh	r3, [r3]
 	cmp	r3, r4
-	bcs	.L1437
-	.loc 2 2684 0 is_stmt 0 discriminator 1
+	bcs	.L1439
 	movw	r2, #2684
-	ldr	r1, .L1446+4
-	ldr	r0, .L1446+8
-.LVL1628:
+	ldr	r1, .L1448+4
+	ldr	r0, .L1448+8
 	bl	printf
-.LVL1629:
-.L1437:
-	.loc 2 2686 0 is_stmt 1
+.L1439:
 	movw	r3, #65535
 	cmp	r4, r3
-	beq	.L1438
-	.loc 2 2687 0
-	ldr	r3, .L1446+12
-	.loc 2 2688 0
+	beq	.L1440
+	ldr	r3, .L1448+12
 	mov	r0, r4
-	.loc 2 2687 0
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
-	cbz	r3, .L1439
-	.loc 2 2688 0
+	cbz	r3, .L1441
 	bl	INSERT_DATA_LIST
-.LVL1630:
-.L1438:
-	.loc 2 2693 0
-	ldr	r5, .L1446+16
+.L1440:
+	ldr	r5, .L1448+16
 	movw	r2, #65535
-	.loc 2 2692 0
 	movs	r3, #1
 	strb	r3, [r6, #8]
-	.loc 2 2693 0
 	ldrh	r0, [r5]
 	cmp	r0, r2
-	beq	.L1440
-	.loc 2 2694 0
+	beq	.L1442
 	cmp	r4, r0
-	bne	.L1441
-	.loc 2 2694 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1446+12
+	bne	.L1443
+	ldr	r3, .L1448+12
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L1442
-.L1441:
-	.loc 2 2695 0 is_stmt 1
+	cbz	r3, .L1444
+.L1443:
 	bl	update_vpc_list
-.LVL1631:
-.L1442:
-	.loc 2 2696 0
+.L1444:
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.L1440:
-	.loc 2 2698 0
+.L1442:
 	mov	r0, r6
 	bl	allocate_data_superblock
-.LVL1632:
-	.loc 2 2699 0
 	bl	l2p_flush
-.LVL1633:
-	.loc 2 2700 0
 	movs	r0, #0
 	bl	FtlEctTblFlush
-.LVL1634:
-	.loc 2 2701 0
 	bl	FtlVpcTblFlush
-.LVL1635:
-	.loc 2 2703 0
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.LVL1636:
-.L1439:
-	.loc 2 2690 0
+.L1441:
 	bl	INSERT_FREE_LIST
-.LVL1637:
-	b	.L1438
-.L1447:
+	b	.L1440
+.L1449:
 	.align	2
-.L1446:
+.L1448:
 	.word	.LANCHOR5
 	.word	.LANCHOR169
 	.word	.LC1
 	.word	.LANCHOR42
 	.word	.LANCHOR150
-	.cfi_endproc
-.LFE302:
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
 	.section	.text.FtlProgPages,"ax",%progbits
 	.align	1
@@ -17490,197 +10934,118 @@ allocate_new_data_superblock:
 	.fpu softvfp
 	.type	FtlProgPages, %function
 FtlProgPages:
-.LFB218:
-	.loc 3 904 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1638:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 3 913 0
 	movs	r6, #0
-	.loc 3 917 0
-	ldr	r8, .L1462+24
-	.loc 3 904 0
+	ldr	r8, .L1464+24
 	mov	r4, r3
-	.loc 3 911 0
 	movs	r2, #0
-.LVL1639:
-	.loc 3 904 0
 	mov	r5, r0
-	.loc 3 911 0
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
-.LVL1640:
-	.loc 3 904 0
 	mov	r10, r1
-	.loc 3 911 0
 	bl	FlashProgPages
-.LVL1641:
-.L1449:
-	.loc 3 913 0 discriminator 1
+.L1451:
 	cmp	r6, r10
-	beq	.L1456
-	.loc 3 918 0
-	ldr	r7, .L1462
-	b	.L1457
-.L1452:
-	.loc 3 915 0
+	beq	.L1458
+	ldr	r7, .L1464
+	b	.L1459
+.L1454:
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1642:
-	.loc 3 916 0
 	ldrh	r3, [r4]
 	cmp	r3, r0
-	bne	.L1450
-	.loc 3 917 0
+	bne	.L1452
 	ldr	r1, [r8]
 	ldrh	r0, [r4, #4]
-.LVL1643:
 	ldrh	r2, [r1, r3, lsl #1]
 	subs	r2, r2, r0
 	strh	r2, [r1, r3, lsl #1]	@ movhi
-	.loc 3 918 0
 	ldrh	r3, [r7]
 	strh	r3, [r4, #2]	@ movhi
-	.loc 3 919 0
 	movs	r3, #0
 	strb	r3, [r4, #6]
-	.loc 3 920 0
 	strh	r3, [r4, #4]	@ movhi
-.L1450:
-	.loc 3 922 0
+.L1452:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1451
-	.loc 3 923 0
+	cbnz	r3, .L1453
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-.LVL1644:
-.L1451:
-	.loc 3 926 0
-	ldr	r2, .L1462+4
+.L1453:
+	ldr	r2, .L1464+4
 	ldr	r3, [r2, #96]
 	adds	r3, r3, #1
 	str	r3, [r2, #96]
-	.loc 3 927 0
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	FtlGcMarkBadPhyBlk
-.LVL1645:
-	.loc 3 928 0
 	mov	r0, r4
 	bl	get_new_active_ppa
-.LVL1646:
-	.loc 3 930 0
 	movs	r2, #0
-	.loc 3 929 0
 	str	r0, [r5, #4]
-	.loc 3 928 0
 	str	r0, [sp, #4]
-	.loc 3 930 0
 	movs	r1, #1
 	ldrb	r3, [r4, #9]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	FlashProgPages
-.LVL1647:
-.L1457:
-	.loc 3 914 0
+.L1459:
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L1452
-	.loc 3 933 0
-	ldr	r3, .L1462+8
+	beq	.L1454
+	ldr	r3, .L1464+8
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1453
-	.loc 3 933 0 is_stmt 0 discriminator 1
+	bcc	.L1455
 	movw	r2, #933
-	ldr	r1, .L1462+12
-	ldr	r0, .L1462+16
+	ldr	r1, .L1464+12
+	ldr	r0, .L1464+16
 	bl	printf
-.LVL1648:
-.L1453:
-	.loc 3 934 0 is_stmt 1
+.L1455:
 	ldr	r3, [r5, #4]
 	add	r1, sp, #8
-	.loc 3 935 0
 	movs	r2, #1
 	ldr	r0, [r5, #16]
-	.loc 3 934 0
 	str	r3, [r1, #-4]!
-	.loc 3 935 0
 	bl	log2phys
-.LVL1649:
-	.loc 3 937 0
 	ldr	r3, [r5, #12]
 	ldr	fp, [r3, #12]
-.LVL1650:
-	.loc 3 939 0
 	ubfx	r0, fp, #10, #16
 	bl	P2V_block_in_plane
-.LVL1651:
-	.loc 3 940 0
 	cmp	fp, #-1
-	.loc 3 939 0
 	mov	r7, r0
-.LVL1652:
-	.loc 3 940 0
-	beq	.L1454
-	.loc 3 942 0
+	beq	.L1456
 	ldr	r3, [r8]
 	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L1455
-	.loc 3 943 0
+	cbnz	r2, .L1457
 	mov	r1, r0
-	ldr	r0, .L1462+20
-.LVL1653:
+	ldr	r0, .L1464+20
 	bl	printf
-.LVL1654:
-.L1455:
-	.loc 3 944 0
+.L1457:
 	mov	r0, r7
 	bl	decrement_vpc_count
-.LVL1655:
-.L1454:
-	.loc 3 913 0 discriminator 2
+.L1456:
 	adds	r6, r6, #1
-.LVL1656:
 	adds	r5, r5, #20
-	b	.L1449
-.LVL1657:
-.L1456:
-	.loc 3 948 0
-	ldr	r3, .L1462+8
+	b	.L1451
+.L1458:
+	ldr	r3, .L1464+8
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1448
-	.loc 3 948 0 is_stmt 0 discriminator 1
+	bcc	.L1450
 	mov	r2, #948
-	ldr	r1, .L1462+12
-	ldr	r0, .L1462+16
+	ldr	r1, .L1464+12
+	ldr	r0, .L1464+16
 	bl	printf
-.LVL1658:
-.L1448:
-	.loc 3 949 0 is_stmt 1
+.L1450:
 	add	sp, sp, #8
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1659:
-.L1463:
+.L1465:
 	.align	2
-.L1462:
+.L1464:
 	.word	.LANCHOR19
 	.word	.LANCHOR81
 	.word	.LANCHOR3
@@ -17688,8 +11053,6 @@ FtlProgPages:
 	.word	.LC1
 	.word	.LC106
 	.word	.LANCHOR42
-	.cfi_endproc
-.LFE218:
 	.size	FtlProgPages, .-FtlProgPages
 	.section	.text.FtlGcFreeTempBlock,"ax",%progbits
 	.align	1
@@ -17700,319 +11063,199 @@ FtlProgPages:
 	.fpu softvfp
 	.type	FtlGcFreeTempBlock, %function
 FtlGcFreeTempBlock:
-.LFB311:
-	.loc 5 112 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1660:
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 48
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 5 119 0
 	movw	r2, #65535
-	ldr	r4, .L1490
-	.loc 5 115 0
-	ldr	r6, .L1490+4
-	.loc 5 119 0
+	ldr	r4, .L1492
+	ldr	r6, .L1492+4
 	ldrh	r5, [r4]
-	.loc 5 115 0
 	ldrh	r1, [r6]
-.LVL1661:
-	.loc 5 119 0
 	cmp	r5, r2
-	bne	.L1465
-.LVL1662:
-.L1475:
-	.loc 5 152 0
-	ldr	r3, .L1490+8
+	bne	.L1467
+.L1477:
+	ldr	r3, .L1492+8
 	movs	r2, #0
 	str	r2, [r3]
-	.loc 5 153 0
 	movw	r3, #65535
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	bne	.L1488
-.L1466:
-	.loc 5 154 0
+	bne	.L1490
+.L1468:
 	movs	r0, #0
-.L1464:
-	.loc 5 199 0
+.L1466:
 	add	sp, sp, #16
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1663:
-.L1465:
-	.cfi_restore_state
-	.loc 5 121 0
-	cbz	r0, .L1468
-.LVL1664:
-	.loc 5 123 0
-	ldr	r3, .L1490+12
+.L1467:
+	cbz	r0, .L1470
+	ldr	r3, .L1492+12
 	ldrh	r0, [r3]
-.LVL1665:
 	cmp	r0, r2
-	beq	.L1469
-.L1470:
-	.loc 5 122 0
+	beq	.L1471
+.L1472:
 	movs	r1, #2
-.LVL1666:
-.L1468:
-	.loc 5 131 0
-	ldr	r0, .L1490
+.L1470:
+	ldr	r0, .L1492
 	bl	FtlGcScanTempBlk
-.LVL1667:
 	str	r0, [sp, #12]
-	.loc 5 132 0
 	adds	r0, r0, #1
-	beq	.L1471
-	.loc 5 135 0
-	ldr	r3, .L1490+16
+	beq	.L1473
+	ldr	r3, .L1492+16
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r5, lsl #1]
 	cmp	r3, #4
-	bls	.L1472
-	.loc 5 136 0
+	bls	.L1474
 	subs	r3, r3, #5
-	.loc 5 137 0
 	movs	r0, #1
-	.loc 5 136 0
 	strh	r3, [r2, r5, lsl #1]	@ movhi
-	.loc 5 137 0
 	bl	FtlEctTblFlush
-.LVL1668:
-.L1472:
-	.loc 5 139 0
-	ldr	r4, .L1490+8
+.L1474:
+	ldr	r4, .L1492+8
 	ldr	r2, [r4]
-	cbnz	r2, .L1473
-	.loc 5 140 0
-	ldr	r2, .L1490+20
-	.loc 5 141 0
+	cbnz	r2, .L1475
+	ldr	r2, .L1492+20
 	ldr	r0, [sp, #12]
-	.loc 5 140 0
 	ldr	r3, [r2, #96]
-	.loc 5 141 0
 	ubfx	r0, r0, #10, #16
-	.loc 5 140 0
 	adds	r3, r3, #1
 	str	r3, [r2, #96]
-	.loc 5 141 0
 	bl	FtlBbmMapBadBlock
-.LVL1669:
-	.loc 5 142 0
 	bl	FtlBbmTblFlush
-.LVL1670:
-.L1473:
-	.loc 5 144 0
+.L1475:
 	movs	r3, #0
 	str	r3, [r4]
-.L1484:
-	.loc 5 149 0
+.L1486:
 	movs	r0, #1
-	b	.L1464
-.LVL1671:
-.L1469:
-	.loc 5 124 0
+	b	.L1466
+.L1471:
 	movs	r2, #0
 	strh	r2, [r3]	@ movhi
-	.loc 5 125 0
-	ldr	r3, .L1490+24
+	ldr	r3, .L1492+24
 	ldrh	r3, [r3]
 	cmp	r3, #17
-	bhi	.L1470
-	b	.L1468
-.LVL1672:
-.L1471:
-	.loc 5 148 0
-	ldr	r3, .L1490+12
+	bhi	.L1472
+	b	.L1470
+.L1473:
+	ldr	r3, .L1492+12
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1484
-	b	.L1475
-.LVL1673:
-.L1488:
-	.loc 5 162 0
+	bne	.L1486
+	b	.L1477
+.L1490:
 	ldrb	r1, [r4, #7]	@ zero_extendqisi2
 	ldrh	r3, [r6]
-	ldr	r5, .L1490+28
+	ldr	r5, .L1492+28
 	muls	r3, r1, r3
 	ldrh	r2, [r5]
 	cmp	r2, r3
-	beq	.L1476
-	.loc 5 162 0 is_stmt 0 discriminator 1
+	beq	.L1478
 	movs	r2, #162
-	ldr	r1, .L1490+32
-	ldr	r0, .L1490+36
+	ldr	r1, .L1492+32
+	ldr	r0, .L1492+36
 	bl	printf
-.LVL1674:
-.L1476:
-	.loc 5 163 0 is_stmt 1
+.L1478:
 	ldrh	r6, [r6]
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	ldr	r2, .L1490+40
+	ldr	r2, .L1492+40
 	ldrh	r0, [r4]
-	.loc 5 168 0
-	ldr	fp, .L1490+68
-	.loc 5 163 0
+	ldr	fp, .L1492+68
 	smulbb	r3, r3, r6
 	ldr	r1, [r2]
-	.loc 5 165 0
 	movs	r6, #0
 	str	r2, [sp, #4]
-	.loc 5 163 0
 	strh	r3, [r1, r0, lsl #1]	@ movhi
-	.loc 5 164 0
-	ldr	r1, .L1490+44
+	ldr	r1, .L1492+44
 	ldrh	r3, [r5]
 	ldr	r0, [r1]
 	add	r3, r3, r0
 	str	r3, [r1]
-.LVL1675:
-.L1477:
-	.loc 5 165 0 discriminator 1
+.L1479:
 	ldrh	r2, [r5]
 	uxth	r3, r6
 	cmp	r2, r3
-	bhi	.L1481
-	.loc 5 181 0
+	bhi	.L1483
 	movw	r0, #65535
 	bl	decrement_vpc_count
-.LVL1676:
-	.loc 5 182 0
 	ldr	r3, [sp, #4]
 	ldrh	r0, [r4]
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	beq	.L1482
-	.loc 5 183 0
+	beq	.L1484
 	bl	INSERT_DATA_LIST
-.LVL1677:
-.L1483:
-	.loc 5 188 0
-	ldr	r3, .L1490+48
-	.loc 5 186 0
+.L1485:
+	ldr	r3, .L1492+48
 	movw	r6, #65535
-.LVL1678:
 	strh	r6, [r4]	@ movhi
-	.loc 5 187 0
 	movs	r4, #0
 	strh	r4, [r5]	@ movhi
-	.loc 5 188 0
 	strh	r4, [r3]	@ movhi
-	.loc 5 189 0
 	bl	l2p_flush
-.LVL1679:
-	.loc 5 190 0
 	bl	FtlVpcTblFlush
-.LVL1680:
-	.loc 5 191 0
-	ldr	r3, .L1490+24
+	ldr	r3, .L1492+24
 	ldrh	r2, [r3]
-	ldr	r3, .L1490+52
+	ldr	r3, .L1492+52
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, asr #2
-	ble	.L1466
-	.loc 5 192 0
-	ldr	r3, .L1490+56
-	.loc 5 193 0
+	ble	.L1468
+	ldr	r3, .L1492+56
 	movs	r2, #20
-	.loc 5 192 0
 	strh	r6, [r3]	@ movhi
-	.loc 5 193 0
-	ldr	r3, .L1490+60
+	ldr	r3, .L1492+60
 	strh	r2, [r3]	@ movhi
-	b	.L1466
-.LVL1681:
-.L1481:
-	.loc 5 166 0
+	b	.L1468
+.L1483:
 	uxth	r3, r6
 	movs	r7, #12
-	.loc 5 168 0
 	ldr	r2, [fp]
-	.loc 5 166 0
 	muls	r7, r3, r7
-	ldr	r3, .L1490+64
+	ldr	r3, .L1492+64
 	ldr	r8, [r3]
 	add	r10, r8, r7
-.LVL1682:
-	.loc 5 168 0
 	ldr	r1, [r10, #8]
 	cmp	r1, r2
-	bcc	.L1478
-	.loc 5 168 0 is_stmt 0 discriminator 1
+	bcc	.L1480
 	movs	r2, #168
-	ldr	r1, .L1490+32
-	ldr	r0, .L1490+36
+	ldr	r1, .L1492+32
+	ldr	r0, .L1492+36
 	bl	printf
-.LVL1683:
-.L1478:
-	.loc 5 169 0 is_stmt 1
+.L1480:
 	movs	r2, #0
 	add	r1, sp, #12
 	ldr	r0, [r10, #8]
 	bl	log2phys
-.LVL1684:
-	.loc 5 170 0
 	ldr	r2, [sp, #12]
 	ldr	r0, [r8, r7]
 	cmp	r0, r2
-	bne	.L1479
-	.loc 5 171 0
+	bne	.L1481
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1685:
-	.loc 5 172 0
 	movs	r2, #1
-	.loc 5 171 0
 	mov	r7, r0
-.LVL1686:
-	.loc 5 172 0
 	add	r1, r10, #4
 	ldr	r0, [r10, #8]
 	bl	log2phys
-.LVL1687:
-	.loc 5 173 0
 	mov	r0, r7
-.LVL1688:
-.L1489:
-	.loc 5 177 0
+.L1491:
 	bl	decrement_vpc_count
-.LVL1689:
-.L1480:
+.L1482:
 	adds	r6, r6, #1
-.LVL1690:
-	b	.L1477
-.LVL1691:
-.L1479:
-	.loc 5 175 0
+	b	.L1479
+.L1481:
 	ldr	r3, [r10, #4]
 	cmp	r2, r3
-	beq	.L1480
-	.loc 5 177 0
+	beq	.L1482
 	ldrh	r0, [r4]
-	b	.L1489
-.LVL1692:
-.L1482:
-	.loc 5 185 0
+	b	.L1491
+.L1484:
 	bl	INSERT_FREE_LIST
-.LVL1693:
-	b	.L1483
-.L1491:
+	b	.L1485
+.L1493:
 	.align	2
-.L1490:
+.L1492:
 	.word	.LANCHOR53
 	.word	.LANCHOR19
 	.word	.LANCHOR152
@@ -18031,8 +11274,6 @@ FtlGcFreeTempBlock:
 	.word	.LANCHOR82
 	.word	.LANCHOR98
 	.word	.LANCHOR61
-	.cfi_endproc
-.LFE311:
 	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
 	.section	.text.FtlGcPageRecovery,"ax",%progbits
 	.align	1
@@ -18043,56 +11284,34 @@ FtlGcFreeTempBlock:
 	.fpu softvfp
 	.type	FtlGcPageRecovery, %function
 FtlGcPageRecovery:
-.LFB314:
-	.loc 5 289 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 5 290 0
-	ldr	r4, .L1494
-	ldr	r5, .L1494+4
+	ldr	r4, .L1496
+	ldr	r5, .L1496+4
 	ldrh	r1, [r4]
 	mov	r0, r5
 	bl	FtlGcScanTempBlk
-.LVL1694:
-	.loc 5 291 0
 	ldrh	r2, [r5, #2]
 	ldrh	r3, [r4]
 	cmp	r2, r3
-	bcc	.L1492
-.LBB319:
-.LBB320:
-	.loc 5 293 0
-	ldr	r0, .L1494+8
+	bcc	.L1494
+	ldr	r0, .L1496+8
 	bl	FtlMapBlkWriteDump_data
-.LVL1695:
-	.loc 5 294 0
 	movs	r0, #0
 	bl	FtlGcFreeTempBlock
-.LVL1696:
-	.loc 5 295 0
-	ldr	r3, .L1494+12
+	ldr	r3, .L1496+12
 	movs	r2, #0
 	str	r2, [r3]
-.L1492:
+.L1494:
 	pop	{r3, r4, r5, pc}
-.L1495:
+.L1497:
 	.align	2
-.L1494:
+.L1496:
 	.word	.LANCHOR19
 	.word	.LANCHOR53
 	.word	.LANCHOR144
 	.word	.LANCHOR152
-.LBE320:
-.LBE319:
-	.cfi_endproc
-.LFE314:
 	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
 	.section	.text.FtlPowerLostRecovery,"ax",%progbits
 	.align	1
@@ -18103,63 +11322,33 @@ FtlGcPageRecovery:
 	.fpu softvfp
 	.type	FtlPowerLostRecovery, %function
 FtlPowerLostRecovery:
-.LFB286:
-	.loc 2 2081 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 2 2082 0
 	movs	r4, #0
-	.loc 2 2084 0
-	ldr	r5, .L1497
-	.loc 2 2082 0
-	ldr	r3, .L1497+4
-	.loc 2 2084 0
+	ldr	r5, .L1499
+	ldr	r3, .L1499+4
 	mov	r0, r5
-	.loc 2 2082 0
 	str	r4, [r3]
-	.loc 2 2084 0
 	bl	FtlRecoverySuperblock
-.LVL1697:
-	.loc 2 2085 0
 	mov	r0, r5
-	.loc 2 2086 0
-	ldr	r5, .L1497+8
-	.loc 2 2085 0
+	ldr	r5, .L1499+8
 	bl	FtlSlcSuperblockCheck
-.LVL1698:
-	.loc 2 2086 0
 	mov	r0, r5
 	bl	FtlRecoverySuperblock
-.LVL1699:
-	.loc 2 2087 0
 	mov	r0, r5
 	bl	FtlSlcSuperblockCheck
-.LVL1700:
-	.loc 2 2088 0
 	bl	FtlGcPageRecovery
-.LVL1701:
-	.loc 2 2089 0
 	movw	r0, #65535
 	bl	decrement_vpc_count
-.LVL1702:
-	.loc 2 2091 0
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L1498:
+.L1500:
 	.align	2
-.L1497:
+.L1499:
 	.word	.LANCHOR51
 	.word	.LANCHOR162
 	.word	.LANCHOR52
-	.cfi_endproc
-.LFE286:
 	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
 	.section	.text.Ftl_gc_temp_data_write_back,"ax",%progbits
 	.align	1
@@ -18170,122 +11359,76 @@ FtlPowerLostRecovery:
 	.fpu softvfp
 	.type	Ftl_gc_temp_data_write_back, %function
 Ftl_gc_temp_data_write_back:
-.LFB316:
-	.loc 5 316 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 3, -24
-	.cfi_offset 4, -20
-	.cfi_offset 5, -16
-	.cfi_offset 6, -12
-	.cfi_offset 7, -8
-	.cfi_offset 14, -4
-	.loc 5 320 0
 	movs	r3, #0
-	ldr	r4, .L1506
-	.loc 5 321 0
+	ldr	r4, .L1508
 	movs	r6, #0
-	.loc 5 322 0
 	movs	r7, #20
-	.loc 5 320 0
 	mov	r2, r3
-	ldr	r5, .L1506+4
+	ldr	r5, .L1508+4
 	ldr	r1, [r4]
 	ldr	r0, [r5]
 	bl	FlashProgPages
-.LVL1703:
-.L1500:
-	.loc 5 321 0 discriminator 1
+.L1502:
 	ldr	r1, [r4]
 	uxth	r3, r6
 	cmp	r1, r3
-	bhi	.L1503
-	.loc 5 335 0
+	bhi	.L1505
 	ldr	r0, [r5]
 	bl	FtlGcBufFree
-.LVL1704:
-	.loc 5 337 0
-	ldr	r3, .L1506+8
-	.loc 5 336 0
+	ldr	r3, .L1508+8
 	movs	r0, #0
 	str	r0, [r4]
-	.loc 5 337 0
 	ldrh	r3, [r3, #4]
-	cbnz	r3, .L1499
-	.loc 5 338 0
+	cbnz	r3, .L1501
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
-.LVL1705:
-	b	.L1505
-.L1503:
-	.loc 5 322 0
+	b	.L1507
+.L1505:
 	muls	r3, r7, r3
 	ldr	r2, [r5]
 	adds	r6, r6, #1
-.LVL1706:
 	adds	r1, r2, r3
 	ldr	r2, [r2, r3]
 	adds	r3, r2, #1
-	bne	.L1501
-	.loc 5 323 0
-	ldr	r3, .L1506+8
+	bne	.L1503
+	ldr	r3, .L1508+8
 	movs	r5, #0
-	ldr	r0, .L1506+12
+	ldr	r0, .L1508+12
 	ldrh	r4, [r3]
 	ldr	r0, [r0]
 	strh	r5, [r0, r4, lsl #1]	@ movhi
-	.loc 5 324 0
 	strh	r2, [r3]	@ movhi
-	.loc 5 325 0
-	ldr	r2, .L1506+16
-	.loc 5 326 0
+	ldr	r2, .L1508+16
 	ldr	r0, [r1, #4]
-	.loc 5 325 0
 	ldr	r3, [r2, #96]
-	.loc 5 326 0
 	ubfx	r0, r0, #10, #16
-	.loc 5 325 0
 	adds	r3, r3, #1
 	str	r3, [r2, #96]
-	.loc 5 326 0
 	bl	FtlBbmMapBadBlock
-.LVL1707:
-	.loc 5 327 0
 	bl	FtlBbmTblFlush
-.LVL1708:
-	.loc 5 328 0
 	bl	FtlGcPageVarInit
-.LVL1709:
-.L1505:
-	.loc 5 339 0
+.L1507:
 	movs	r0, #1
-.L1499:
-	.loc 5 342 0
-	pop	{r3, r4, r5, r6, r7, pc}
 .L1501:
-	.loc 5 331 0 discriminator 2
+	pop	{r3, r4, r5, r6, r7, pc}
+.L1503:
 	ldr	r3, [r1, #12]
-.LVL1710:
-	.loc 5 332 0 discriminator 2
 	ldr	r1, [r1, #4]
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
 	bl	FtlGcUpdatePage
-.LVL1711:
-	b	.L1500
-.L1507:
+	b	.L1502
+.L1509:
 	.align	2
-.L1506:
+.L1508:
 	.word	.LANCHOR89
 	.word	.LANCHOR121
 	.word	.LANCHOR53
 	.word	.LANCHOR42
 	.word	.LANCHOR81
-	.cfi_endproc
-.LFE316:
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
 	.section	.text.Ftl_get_new_temp_ppa,"ax",%progbits
 	.align	1
@@ -18296,78 +11439,41 @@ Ftl_gc_temp_data_write_back:
 	.fpu softvfp
 	.type	Ftl_get_new_temp_ppa, %function
 Ftl_get_new_temp_ppa:
-.LFB315:
-	.loc 5 300 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 5 301 0
 	movw	r3, #65535
-	ldr	r4, .L1511
+	ldr	r4, .L1513
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	beq	.L1509
-	.loc 5 301 0 is_stmt 0 discriminator 1
+	beq	.L1511
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1510
-.L1509:
-	.loc 5 303 0 is_stmt 1
+	cbnz	r3, .L1512
+.L1511:
 	movs	r0, #0
-	.loc 5 304 0
 	movs	r5, #0
-	.loc 5 303 0
 	bl	FtlGcFreeTempBlock
-.LVL1712:
-	.loc 5 305 0
-	ldr	r0, .L1511
-	.loc 5 304 0
+	ldr	r0, .L1513
 	strb	r5, [r4, #8]
-	.loc 5 305 0
 	bl	allocate_data_superblock
-.LVL1713:
-	.loc 5 306 0
-	ldr	r3, .L1511+4
+	ldr	r3, .L1513+4
 	strh	r5, [r3]	@ movhi
-	.loc 5 307 0
-	ldr	r3, .L1511+8
+	ldr	r3, .L1513+8
 	strh	r5, [r3]	@ movhi
-	.loc 5 308 0
 	bl	l2p_flush
-.LVL1714:
-	.loc 5 309 0
 	mov	r0, r5
 	bl	FtlEctTblFlush
-.LVL1715:
-	.loc 5 310 0
 	bl	FtlVpcTblFlush
-.LVL1716:
-.L1510:
-	.loc 5 312 0
-	ldr	r0, .L1511
-	.loc 5 313 0
+.L1512:
+	ldr	r0, .L1513
 	pop	{r3, r4, r5, lr}
-	.cfi_restore 14
-	.cfi_restore 5
-	.cfi_restore 4
-	.cfi_restore 3
-	.cfi_def_cfa_offset 0
-	.loc 5 312 0
 	b	get_new_active_ppa
-.LVL1717:
-.L1512:
+.L1514:
 	.align	2
-.L1511:
+.L1513:
 	.word	.LANCHOR53
 	.word	.LANCHOR96
 	.word	.LANCHOR97
-	.cfi_endproc
-.LFE315:
 	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
 	.section	.text.rk_ftl_garbage_collect,"ax",%progbits
 	.align	1
@@ -18378,83 +11484,50 @@ Ftl_get_new_temp_ppa:
 	.fpu softvfp
 	.type	rk_ftl_garbage_collect, %function
 rk_ftl_garbage_collect:
-.LFB322:
-	.loc 5 470 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1718:
-	.loc 5 478 0
-	ldr	r3, .L1631
-	.loc 5 470 0
+	ldr	r3, .L1633
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
 	mov	r7, r0
 	sub	sp, sp, #48
-	.cfi_def_cfa_offset 80
-	.loc 5 478 0
 	ldr	r0, [r3]
-.LVL1719:
 	cmp	r0, #0
-	bne	.L1588
-	.loc 5 481 0
-	ldr	r3, .L1631+4
+	bne	.L1590
+	ldr	r3, .L1633+4
 	ldrh	r3, [r3]
 	cmp	r3, #47
-	bls	.L1513
-	.loc 5 485 0
-	ldr	r3, .L1631+8
+	bls	.L1515
+	ldr	r3, .L1633+8
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1515
-.LVL1720:
-.L1518:
-.LBB324:
-.LBB325:
-	.loc 5 489 0
-	ldr	r3, .L1631+12
+	bne	.L1517
+.L1520:
+	ldr	r3, .L1633+12
 	movw	r4, #65535
 	ldrh	r0, [r3]
 	cmp	r0, r4
-	bne	.L1516
-.L1517:
-	.loc 5 496 0
-	ldr	r2, .L1631+16
-	.loc 5 497 0
+	bne	.L1518
+.L1519:
+	ldr	r2, .L1633+16
 	movw	r5, #65535
-	ldr	r6, .L1631+20
-	.loc 5 496 0
+	ldr	r6, .L1633+20
 	ldr	r3, [r2]
-	.loc 5 497 0
 	ldrh	r0, [r6]
-	.loc 5 496 0
 	adds	r3, r3, #1
 	add	r3, r3, r7, lsl #7
-	.loc 5 497 0
 	cmp	r0, r5
-	.loc 5 496 0
 	str	r3, [r2]
-	.loc 5 497 0
-	bne	.L1519
-	ldr	r1, .L1631+24
+	bne	.L1521
+	ldr	r1, .L1633+24
 	ldrh	r1, [r1]
 	cmp	r1, r0
-	bne	.L1520
-	ldr	r0, .L1631+28
+	bne	.L1522
+	ldr	r0, .L1633+28
 	ldrh	r10, [r0]
 	cmp	r10, r1
-	bne	.L1521
-	.loc 5 498 0
-	ldr	r1, .L1631+32
+	bne	.L1523
+	ldr	r1, .L1633+32
 	ldrh	r0, [r1]
 	mov	r8, r1
 	cmp	r0, #24
@@ -18462,404 +11535,275 @@ rk_ftl_garbage_collect:
 	movcc	r1, #5120
 	movcs	r1, #1024
 	cmp	r3, r1
-	bls	.L1521
-.LBB326:
-	.loc 5 502 0
-	ldr	r3, .L1631+36
-	.loc 5 501 0
+	bls	.L1523
+	ldr	r3, .L1633+36
 	movs	r4, #0
 	str	r4, [r2]
-	.loc 5 502 0
 	strh	r4, [r3]	@ movhi
-	.loc 5 503 0
 	bl	GetSwlReplaceBlock
-.LVL1721:
-	.loc 5 504 0
 	cmp	r0, r10
-	.loc 5 503 0
 	mov	r5, r0
-.LVL1722:
-	.loc 5 504 0
-	bne	.L1592
-	.loc 5 505 0
-	ldr	r10, .L1631+96
+	bne	.L1594
+	ldr	r10, .L1633+96
 	ldrh	r2, [r8]
 	ldrh	r3, [r10]
 	cmp	r2, r3
-	bcs	.L1524
-	.loc 5 506 0
+	bcs	.L1526
 	movs	r0, #64
-.LVL1723:
 	bl	List_get_gc_head_node
-.LVL1724:
-	.loc 5 507 0
 	uxth	r3, r0
 	cmp	r3, r5
-	beq	.L1526
-	.loc 5 508 0
+	beq	.L1528
 	mov	r0, r3
-	ldr	r3, .L1631+40
+	ldr	r3, .L1633+40
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #7
-	bhi	.L1527
-	.loc 5 509 0
+	bhi	.L1529
 	mov	r0, r4
-.LVL1725:
 	bl	List_get_gc_head_node
-.LVL1726:
 	uxth	r4, r0
-.LVL1727:
-	.loc 5 510 0
 	movs	r3, #128
 	strh	r3, [r10]	@ movhi
-	.loc 5 520 0
 	cmp	r4, r5
-	bne	.L1523
-.LVL1728:
-.L1526:
-	.loc 5 523 0
+	bne	.L1525
+.L1528:
 	bl	FtlGcReFreshBadBlk
-.LVL1729:
-.LBE326:
-	.loc 5 527 0
 	cmp	r7, #0
-	bne	.L1529
+	bne	.L1531
 	movw	r3, #65535
 	cmp	r5, r3
-	bne	.L1529
-.LVL1730:
-.L1586:
-	.loc 5 528 0
-	ldr	r3, .L1631+32
+	bne	.L1531
+.L1588:
+	ldr	r3, .L1633+32
 	ldrh	r3, [r3]
 	cmp	r3, #24
-	bhi	.L1593
-	ldr	r2, .L1631+44
-	.loc 5 530 0
+	bhi	.L1595
+	ldr	r2, .L1633+44
 	cmp	r3, #16
-	.loc 5 531 0
 	ldrh	r4, [r2]
-	.loc 5 530 0
-	bls	.L1531
-	.loc 5 531 0
+	bls	.L1533
 	lsrs	r4, r4, #5
-.LVL1731:
-.L1530:
-	.loc 5 539 0
-	ldr	r2, .L1631+48
+.L1532:
+	ldr	r2, .L1633+48
 	ldrh	r1, [r2]
 	cmp	r1, r3
 	mov	r1, r2
-	bcs	.L1534
-	.loc 5 540 0
-	ldr	r3, .L1631+24
+	bcs	.L1536
+	ldr	r3, .L1633+24
 	movw	r0, #65535
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L1535
-	ldr	r0, .L1631+28
+	bne	.L1537
+	ldr	r0, .L1633+28
 	ldrh	r0, [r0]
 	cmp	r0, r3
-	bne	.L1535
-	.loc 5 542 0
-	ldr	r3, .L1631+36
+	bne	.L1537
+	ldr	r3, .L1633+36
 	ldrh	r0, [r3]
-	cbnz	r0, .L1536
-	ldr	r3, .L1631+52
-	ldr	r4, .L1631+56
-.LVL1732:
+	cbnz	r0, .L1538
+	ldr	r3, .L1633+52
+	ldr	r4, .L1633+56
 	ldr	r3, [r3]
 	ldr	r4, [r4]
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, lsr #2
-	bcs	.L1537
-.L1536:
-	.loc 5 543 0
-	ldr	r3, .L1631+60
+	bcs	.L1539
+.L1538:
+	ldr	r3, .L1633+60
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r1]	@ movhi
-.L1538:
-	.loc 5 546 0
-	ldr	r3, .L1631+64
+.L1540:
+	ldr	r3, .L1633+64
 	movs	r2, #0
 	str	r2, [r3]
-.LVL1733:
-.L1513:
-.LBE325:
-.LBE324:
-	.loc 5 754 0
+.L1515:
 	add	sp, sp, #48
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1734:
-.L1515:
-	.cfi_restore_state
-	.loc 5 485 0 discriminator 1
-	ldr	r2, .L1631+24
+.L1517:
+	ldr	r2, .L1633+24
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L1518
-	.loc 5 486 0
+	beq	.L1520
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
-.LVL1735:
 	cmp	r0, #0
-	beq	.L1518
-	.loc 5 487 0
+	beq	.L1520
 	movs	r0, #1
-	b	.L1513
-.LVL1736:
-.L1516:
-.LBB330:
-.LBB328:
-	.loc 5 489 0
-	ldr	r1, .L1631+28
+	b	.L1515
+.L1518:
+	ldr	r1, .L1633+28
 	ldrh	r2, [r1]
 	cmp	r2, r4
-	.loc 5 490 0
 	itt	eq
 	strheq	r0, [r1]	@ movhi
-	.loc 5 491 0
 	strheq	r2, [r3]	@ movhi
-	b	.L1517
-.LVL1737:
-.L1527:
-.LBB327:
-	.loc 5 512 0
+	b	.L1519
+.L1529:
 	movs	r3, #64
-.LVL1738:
-.L1625:
-	.loc 5 516 0
+.L1627:
 	strh	r3, [r10]	@ movhi
-	b	.L1526
-.LVL1739:
-.L1524:
+	b	.L1528
+.L1526:
 	movs	r3, #80
-	b	.L1625
-.L1592:
-	.loc 5 504 0
+	b	.L1627
+.L1594:
 	mov	r4, r0
-.LVL1740:
-.L1523:
-	.loc 5 521 0
-	ldr	r3, .L1631+40
+.L1525:
+	ldr	r3, .L1633+40
 	mov	r5, r4
-	ldr	r1, .L1631+48
+	ldr	r1, .L1633+48
 	ldrh	r2, [r8]
 	ldr	r3, [r3]
 	ldrh	r1, [r1]
-	ldr	r0, .L1631+68
+	ldr	r0, .L1633+68
 	ldrh	r3, [r3, r4, lsl #1]
 	str	r1, [sp, #4]
-	ldr	r1, .L1631+72
+	ldr	r1, .L1633+72
 	ldr	r1, [r1]
 	ldrh	r1, [r1, r4, lsl #1]
 	str	r1, [sp]
 	mov	r1, r4
 	bl	printf
-.LVL1741:
-	b	.L1526
-.LVL1742:
-.L1531:
-.LBE327:
-	.loc 5 532 0
+	b	.L1528
+.L1533:
 	cmp	r3, #12
-	bls	.L1532
-	.loc 5 533 0
+	bls	.L1534
 	lsrs	r4, r4, #4
-.LVL1743:
-	b	.L1530
-.LVL1744:
-.L1532:
-	.loc 5 534 0
+	b	.L1532
+.L1534:
 	cmp	r3, #8
-	bls	.L1530
-	.loc 5 535 0
+	bls	.L1532
 	lsrs	r4, r4, #2
-.LVL1745:
-	b	.L1530
-.LVL1746:
-.L1593:
-	.loc 5 529 0
+	b	.L1532
+.L1595:
 	movs	r4, #1
-	b	.L1530
-.L1537:
-	.loc 5 545 0
+	b	.L1532
+.L1539:
 	movs	r3, #18
 	strh	r3, [r2]	@ movhi
-	b	.L1538
-.LVL1747:
-.L1535:
-	.loc 5 549 0
-	ldr	r3, .L1631+60
+	b	.L1540
+.L1537:
+	ldr	r3, .L1633+60
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r1]	@ movhi
-.L1534:
-	.loc 5 551 0
-	ldr	r3, .L1631+76
+.L1536:
+	ldr	r3, .L1633+76
 	ldrh	r3, [r3]
-	cbz	r3, .L1594
-	.loc 5 552 0
+	cbz	r3, .L1596
 	adds	r4, r4, #32
-.LVL1748:
 	uxth	r4, r4
-.LVL1749:
-.L1594:
-	.loc 5 551 0
+.L1596:
 	movw	r5, #65535
-.LVL1750:
-.L1540:
-	.loc 5 595 0
+.L1542:
 	ldrh	r3, [r6]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1549
-	.loc 5 596 0
+	bne	.L1551
 	cmp	r5, r3
-	beq	.L1550
-	.loc 5 597 0
+	beq	.L1552
 	strh	r5, [r6]	@ movhi
-.LVL1751:
-.L1551:
-	.loc 5 607 0
+.L1553:
 	ldrh	r0, [r6]
 	movw	r7, #65535
-	.loc 5 606 0
 	movs	r3, #0
 	strb	r3, [r6, #8]
-	.loc 5 607 0
 	cmp	r0, r7
-	beq	.L1549
-	.loc 5 608 0
+	beq	.L1551
 	bl	IsBlkInGcList
-.LVL1752:
-	cbz	r0, .L1554
-	.loc 5 609 0
+	cbz	r0, .L1556
 	strh	r7, [r6]	@ movhi
-.L1554:
-	.loc 5 611 0
+.L1556:
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1549
-	.loc 5 612 0
-	ldr	r0, .L1631+20
+	beq	.L1551
+	ldr	r0, .L1633+20
 	bl	make_superblock
-.LVL1753:
-	.loc 5 615 0
-	ldr	r2, .L1631+80
-	.loc 5 613 0
+	ldr	r2, .L1633+80
 	movs	r3, #0
 	strh	r3, [r6, #2]	@ movhi
-	.loc 5 614 0
 	strb	r3, [r6, #6]
-	.loc 5 615 0
 	strh	r3, [r2]	@ movhi
-	.loc 5 616 0
-	ldr	r3, .L1631+40
+	ldr	r3, .L1633+40
 	ldrh	r2, [r6]
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r2, lsl #1]
-	ldr	r3, .L1631+84
+	ldr	r3, .L1633+84
 	strh	r2, [r3]	@ movhi
-.L1549:
-	.loc 5 621 0
-	ldr	r2, .L1631+88
+.L1551:
+	ldr	r2, .L1633+88
 	ldrh	r3, [r6]
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L1555
-	ldr	r2, .L1631+92
+	beq	.L1557
+	ldr	r2, .L1633+92
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L1555
-	.loc 5 627 0
-	ldr	r6, .L1631+20
+	beq	.L1557
+	ldr	r6, .L1633+20
 	mov	fp, r6
-.L1556:
+.L1558:
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1557
-	.loc 5 631 0
-	ldr	r8, .L1631+100
-	.loc 5 628 0
+	bne	.L1559
+	ldr	r8, .L1633+100
 	movs	r2, #0
-	ldr	r3, .L1631+64
+	ldr	r3, .L1633+64
 	str	r2, [r3]
-.L1558:
-	.loc 5 631 0
+.L1560:
 	ldrh	r7, [r8]
 	mov	r0, r7
 	bl	List_get_gc_head_node
-.LVL1754:
 	uxth	r3, r0
-	.loc 5 632 0
 	movw	r1, #65535
 	cmp	r3, r1
-	.loc 5 631 0
 	strh	r3, [fp]	@ movhi
-	.loc 5 632 0
-	bne	.L1559
-	.loc 5 633 0
+	bne	.L1561
 	movs	r3, #0
-	.loc 5 634 0
 	movs	r0, #8
-	.loc 5 633 0
 	strh	r3, [r8]	@ movhi
-	b	.L1513
-.LVL1755:
-.L1541:
-	.loc 5 558 0
-	ldr	r3, .L1631+64
+	b	.L1515
+.L1543:
+	ldr	r3, .L1633+64
 	movs	r2, #0
-	.loc 5 560 0
-	ldr	r1, .L1631+48
-	ldr	r4, .L1631+32
-	.loc 5 558 0
+	ldr	r1, .L1633+48
+	ldr	r4, .L1633+32
 	str	r2, [r3]
-	.loc 5 560 0
 	ldrh	r3, [r1]
 	mov	r2, r1
 	ldrh	r8, [r4]
-	ldr	r5, .L1631+36
+	ldr	r5, .L1633+36
 	cmp	r3, r8
-	bcs	.L1542
-	.loc 5 561 0
+	bcs	.L1544
 	ldrh	r3, [r5]
-	cbnz	r3, .L1543
-	ldr	r3, .L1631+52
-	ldr	r0, .L1631+56
+	cbnz	r3, .L1545
+	ldr	r3, .L1633+52
+	ldr	r0, .L1633+56
 	ldr	r3, [r3]
 	ldr	r0, [r0]
 	add	r3, r3, r3, lsl #1
 	cmp	r0, r3, lsr #2
-	bcs	.L1544
-.L1543:
-	.loc 5 562 0
-	ldr	r3, .L1631+60
+	bcs	.L1546
+.L1545:
+	ldr	r3, .L1633+60
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r2]	@ movhi
-.LVL1756:
-.L1628:
-	.loc 5 578 0
+.L1630:
 	bl	FtlReadRefresh
-.LVL1757:
-	.loc 5 579 0
 	ldrh	r0, [r5]
-	b	.L1513
-.L1632:
+	b	.L1515
+.L1634:
 	.align	2
-.L1631:
+.L1633:
 	.word	.LANCHOR117
 	.word	.LANCHOR45
 	.word	.LANCHOR156
@@ -18886,332 +11830,238 @@ rk_ftl_garbage_collect:
 	.word	.LANCHOR52
 	.word	.LANCHOR83
 	.word	.LANCHOR85
-.LVL1758:
-.L1544:
-	.loc 5 564 0
+.L1546:
 	movs	r3, #18
 	strh	r3, [r1]	@ movhi
-	b	.L1628
-.L1542:
-	.loc 5 572 0
+	b	.L1630
+.L1544:
 	ldrh	r0, [r5]
 	cmp	r0, #0
-	bne	.L1546
-	.loc 5 573 0
-	ldr	r3, .L1633
+	bne	.L1548
+	ldr	r3, .L1635
 	ldrh	r7, [r3]
-.LVL1759:
 	add	r2, r7, r7, lsl #1
 	asrs	r2, r2, #2
 	strh	r2, [r1]	@ movhi
-	.loc 5 574 0
 	bl	List_get_gc_head_node
-.LVL1760:
-	.loc 5 575 0
-	ldr	r3, .L1633+4
+	ldr	r3, .L1635+4
 	uxth	r0, r0
-	ldr	r2, .L1633+8
+	ldr	r2, .L1635+8
 	ldr	r3, [r3]
 	ldrh	r2, [r2]
 	ldrh	r1, [r3, r0, lsl #1]
-	ldr	r3, .L1633+12
+	ldr	r3, .L1635+12
 	ldrh	r3, [r3]
 	muls	r2, r3, r2
 	cmp	r1, r2, asr #1
-	ble	.L1547
-	.loc 5 576 0
+	ble	.L1549
 	subs	r3, r7, #1
-	.loc 5 575 0
 	cmp	r8, r3
-	bge	.L1628
-.L1547:
-	.loc 5 584 0
+	bge	.L1630
+.L1549:
 	cmp	r1, #0
-	bne	.L1546
-	.loc 5 585 0
+	bne	.L1548
 	movw	r0, #65535
-.LVL1761:
 	bl	decrement_vpc_count
-.LVL1762:
-	.loc 5 586 0
 	ldrh	r0, [r4]
 	adds	r0, r0, #1
-	b	.L1513
-.LVL1763:
-.L1550:
-	.loc 5 598 0
-	ldr	r3, .L1633+16
+	b	.L1515
+.L1552:
+	ldr	r3, .L1635+16
 	ldrh	r2, [r3]
 	cmp	r2, r5
-	beq	.L1551
-	.loc 5 600 0
-	ldr	r1, .L1633+4
+	beq	.L1553
+	ldr	r1, .L1635+4
 	ldr	r1, [r1]
 	ldrh	r2, [r1, r2, lsl #1]
-	cbnz	r2, .L1552
-	.loc 5 601 0
+	cbnz	r2, .L1554
 	strh	r5, [r3]	@ movhi
-.L1552:
-	.loc 5 602 0
+.L1554:
 	ldrh	r2, [r3]
 	strh	r2, [r6]	@ movhi
-	.loc 5 603 0
 	movw	r2, #65535
 	strh	r2, [r3]	@ movhi
-	b	.L1551
-.LVL1764:
-.L1555:
-	.loc 5 622 0
+	b	.L1553
+.L1557:
 	movw	r3, #65535
 	strh	r3, [r6]	@ movhi
-.LVL1765:
-.L1629:
-	.loc 5 648 0
-	ldr	r3, .L1633+20
+.L1631:
+	ldr	r3, .L1635+20
 	ldrh	r0, [r3]
-	b	.L1513
-.LVL1766:
-.L1559:
+	b	.L1515
+.L1561:
 	str	r0, [sp, #16]
-	.loc 5 636 0
 	mov	r0, r3
 	str	r3, [sp, #12]
 	adds	r7, r7, #1
 	bl	IsBlkInGcList
-.LVL1767:
 	ldr	r3, [sp, #12]
 	ldr	r2, [sp, #16]
-	cbz	r0, .L1560
-	.loc 5 637 0
+	cbz	r0, .L1562
 	strh	r7, [r8]	@ movhi
-	b	.L1558
-.L1560:
-	.loc 5 641 0
+	b	.L1560
+.L1562:
 	uxth	r0, r2
-	ldr	r2, .L1633+24
-	ldr	r10, .L1633+4
-	.loc 5 640 0
+	ldr	r2, .L1635+24
+	ldr	r10, .L1635+4
 	uxth	r7, r7
-	.loc 5 641 0
 	ldrh	lr, [r2]
-	ldr	r2, .L1633+8
+	ldr	r2, .L1635+8
 	ldr	r1, [r10]
-	.loc 5 640 0
 	strh	r7, [r8]	@ movhi
-	.loc 5 641 0
 	ldrh	r2, [r2]
 	ldrh	ip, [r1, r0, lsl #1]
 	mul	lr, r2, lr
 	cmp	ip, lr, asr #1
-	bgt	.L1562
-	.loc 5 642 0
+	bgt	.L1564
 	cmp	r7, #48
-	bls	.L1563
+	bls	.L1565
 	cmp	ip, #8
-	bls	.L1563
-	ldr	r7, .L1633+28
+	bls	.L1565
+	ldr	r7, .L1635+28
 	ldrh	r7, [r7]
 	cmp	r7, #35
-	bhi	.L1563
-.L1562:
-	.loc 5 643 0
-	ldr	r2, .L1633+32
+	bhi	.L1565
+.L1564:
+	ldr	r2, .L1635+32
 	movs	r7, #0
 	strh	r7, [r2]	@ movhi
-.L1563:
-	.loc 5 645 0
+.L1565:
 	ldrh	r1, [r1, r0, lsl #1]
 	cmp	lr, r1
-	bgt	.L1564
+	bgt	.L1566
 	movw	r2, #65535
 	cmp	r5, r2
-	bne	.L1564
-	.loc 5 647 0
-	ldr	r2, .L1633+32
+	bne	.L1566
+	ldr	r2, .L1635+32
 	movs	r3, #0
-	.loc 5 646 0
 	strh	r5, [fp]	@ movhi
-	.loc 5 647 0
 	strh	r3, [r2]	@ movhi
-	b	.L1629
-.L1564:
-	.loc 5 651 0
-	cbnz	r1, .L1565
-	.loc 5 652 0
+	b	.L1631
+.L1566:
+	cbnz	r1, .L1567
 	movw	r0, #65535
 	bl	decrement_vpc_count
-.LVL1768:
-	.loc 5 653 0
-	ldr	r3, .L1633+32
-	ldr	r2, .L1633+32
+	ldr	r3, .L1635+32
+	ldr	r2, .L1635+32
 	ldrh	r3, [r3]
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
-	b	.L1558
-.L1565:
-	.loc 5 656 0
+	b	.L1560
+.L1567:
 	movs	r2, #0
 	strb	r2, [fp, #8]
-	.loc 5 658 0
-	ldr	r2, .L1633+36
+	ldr	r2, .L1635+36
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bne	.L1566
+	bne	.L1568
 	movw	r2, #658
-	ldr	r1, .L1633+40
-	ldr	r0, .L1633+44
+	ldr	r1, .L1635+40
+	ldr	r0, .L1635+44
 	bl	printf
-.LVL1769:
-.L1566:
-	.loc 5 659 0
-	ldr	r3, .L1633+48
+.L1568:
+	ldr	r3, .L1635+48
 	ldrh	r2, [fp]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1567
+	bne	.L1569
 	movw	r2, #659
-	ldr	r1, .L1633+40
-	ldr	r0, .L1633+44
+	ldr	r1, .L1635+40
+	ldr	r0, .L1635+44
 	bl	printf
-.LVL1770:
-.L1567:
-	.loc 5 660 0
-	ldr	r3, .L1633+52
+.L1569:
+	ldr	r3, .L1635+52
 	ldrh	r2, [fp]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1568
+	bne	.L1570
 	mov	r2, #660
-	ldr	r1, .L1633+40
-	ldr	r0, .L1633+44
+	ldr	r1, .L1635+40
+	ldr	r0, .L1635+44
 	bl	printf
-.LVL1771:
-.L1568:
-	.loc 5 661 0
+.L1570:
 	mov	r0, r6
 	bl	make_superblock
-.LVL1772:
-	.loc 5 662 0
-	ldr	r2, .L1633+56
+	ldr	r2, .L1635+56
 	movs	r3, #0
-	.loc 5 663 0
 	ldrh	r1, [fp]
-	.loc 5 662 0
 	strh	r3, [r2]	@ movhi
-	.loc 5 663 0
 	ldr	r2, [r10]
 	ldrh	r1, [r2, r1, lsl #1]
-	ldr	r2, .L1633+60
-	.loc 5 664 0
+	ldr	r2, .L1635+60
 	strh	r3, [fp, #2]	@ movhi
-	.loc 5 665 0
 	strb	r3, [fp, #6]
-	.loc 5 663 0
 	strh	r1, [r2]	@ movhi
-.L1557:
-	.loc 5 671 0
+.L1559:
 	bl	FtlReadRefresh
-.LVL1773:
-	.loc 5 674 0
-	ldr	r3, .L1633+64
+	ldr	r3, .L1635+64
 	movs	r2, #1
 	str	r2, [r3]
-	.loc 5 675 0
-	ldr	r3, .L1633+24
+	ldr	r3, .L1635+24
 	ldrh	r3, [r3]
 	str	r3, [sp, #28]
-.LVL1774:
-	.loc 5 676 0
 	ldrh	r3, [fp, #2]
 	ldr	r1, [sp, #28]
 	adds	r2, r3, r4
 	cmp	r2, r1
-	.loc 5 677 0
 	itt	gt
 	movgt	r2, r1
 	subgt	r4, r2, r3
-.LVL1775:
-	.loc 5 689 0
 	mov	r3, #0
-	.loc 5 677 0
 	it	gt
 	uxthgt	r4, r4
-.LVL1776:
-.L1627:
+.L1629:
 	str	r3, [sp, #24]
-.LVL1777:
-	.loc 5 679 0
 	ldrh	r3, [sp, #24]
 	cmp	r4, r3
-	bls	.L1578
-	.loc 5 681 0
-	ldr	r3, .L1633+8
-	.loc 5 683 0
+	bls	.L1580
+	ldr	r3, .L1635+8
 	movw	r10, #65535
-	.loc 5 684 0
 	ldrh	r8, [r6, #2]
-	ldr	r1, .L1633+68
-	.loc 5 681 0
+	ldr	r1, .L1635+68
 	ldrh	ip, [r3]
-	.loc 5 684 0
-	ldr	r3, .L1633+72
+	ldr	r3, .L1635+72
 	ldr	r0, [r3]
 	ldr	r3, [sp, #24]
 	add	r8, r8, r3
 	movs	r3, #0
 	str	r3, [sp, #12]
-	b	.L1579
-.LVL1778:
-.L1572:
-	.loc 5 682 0
+	b	.L1581
+.L1574:
 	ldrh	r2, [r1, #2]!
-.LVL1779:
-	.loc 5 683 0
 	cmp	r2, r10
-	beq	.L1571
-	.loc 5 684 0
+	beq	.L1573
 	ldr	r7, [sp, #12]
 	mov	lr, #20
 	orr	r2, r8, r2, lsl #10
-.LVL1780:
 	mla	lr, lr, r7, r0
 	str	r2, [lr, #4]
-	.loc 5 685 0
 	mov	r2, r7
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r2, [sp, #12]
-.LVL1781:
-.L1571:
+.L1573:
 	adds	r3, r3, #1
-.LVL1782:
-.L1579:
-	.loc 5 681 0
+.L1581:
 	uxth	r2, r3
 	cmp	ip, r2
-	bhi	.L1572
-	.loc 5 689 0
+	bhi	.L1574
 	ldrb	r2, [r6, #8]	@ zero_extendqisi2
 	ldr	r1, [sp, #12]
 	bl	FlashReadPages
-.LVL1783:
 	movs	r3, #0
-.LVL1784:
-.L1626:
+.L1628:
 	str	r3, [sp, #20]
-.LVL1785:
-	.loc 5 691 0
 	ldr	r2, [sp, #12]
 	ldrh	r3, [sp, #20]
 	cmp	r2, r3
-	bhi	.L1577
-.LVL1786:
+	bhi	.L1579
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	b	.L1627
-.L1634:
+	b	.L1629
+.L1636:
 	.align	2
-.L1633:
+.L1635:
 	.word	.LANCHOR78
 	.word	.LANCHOR42
 	.word	.LANCHOR3
@@ -19231,287 +12081,197 @@ rk_ftl_garbage_collect:
 	.word	.LANCHOR117
 	.word	.LANCHOR80+14
 	.word	.LANCHOR93
-.LVL1787:
-.L1577:
+.L1579:
 	ldr	r3, [sp, #20]
 	movs	r7, #20
 	muls	r7, r3, r7
-	.loc 5 692 0
-	ldr	r3, .L1635
+	ldr	r3, .L1637
 	ldr	r3, [r3]
 	adds	r2, r3, r7
-.LVL1788:
-	.loc 5 693 0
 	ldr	r3, [r3, r7]
 	adds	r3, r3, #1
-	beq	.L1574
-	.loc 5 692 0
+	beq	.L1576
 	ldr	r3, [r2, #12]
-	.loc 5 693 0
 	ldrh	r2, [r3]
-.LVL1789:
-	.loc 5 692 0
 	str	r3, [sp, #16]
-	.loc 5 693 0
 	movw	r3, #61589
-.LVL1790:
 	cmp	r2, r3
-	bne	.L1574
-	.loc 5 695 0
+	bne	.L1576
 	ldr	r3, [sp, #16]
 	ldr	r8, [r3, #8]
-.LVL1791:
-	.loc 5 696 0
 	cmp	r8, #-1
-	bne	.L1575
+	bne	.L1577
 	mov	r2, #696
-	ldr	r1, .L1635+4
-	ldr	r0, .L1635+8
+	ldr	r1, .L1637+4
+	ldr	r0, .L1637+8
 	bl	printf
-.LVL1792:
-.L1575:
-	.loc 5 697 0
+.L1577:
 	movs	r2, #0
 	add	r1, sp, #44
 	mov	r0, r8
 	bl	log2phys
-.LVL1793:
-	.loc 5 698 0
-	ldr	r3, .L1635
+	ldr	r3, .L1637
 	ldr	r1, [r3]
 	ldr	r3, [sp, #44]
 	add	r1, r1, r7
 	ldr	r2, [r1, #4]
 	cmp	r2, r3
-	bne	.L1574
-	.loc 5 700 0
-	ldr	r2, .L1635+12
-	.loc 5 701 0
+	bne	.L1576
+	ldr	r2, .L1637+12
 	mov	r10, #20
-	ldr	r8, .L1635+36
-.LVL1794:
+	ldr	r8, .L1637+36
 	ldr	r1, [r1, #16]
-	.loc 5 700 0
 	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
-	.loc 5 701 0
-	ldr	r2, .L1635+16
+	ldr	r2, .L1637+16
 	ldr	r3, [r8]
 	ldr	r0, [r2]
 	str	r2, [sp, #36]
 	mla	r3, r10, r3, r0
 	str	r1, [r3, #16]
 	str	r3, [sp, #32]
-	.loc 5 702 0
 	bl	Ftl_get_new_temp_ppa
-.LVL1795:
 	ldr	r3, [sp, #32]
-	.loc 5 703 0
 	ldr	r2, [sp, #36]
-	.loc 5 705 0
 	ldr	r1, [sp, #16]
-	.loc 5 702 0
 	str	r0, [r3, #4]
-	.loc 5 703 0
 	ldr	r2, [r2]
 	ldr	r3, [r8]
 	mla	r10, r10, r3, r2
-	ldr	r2, .L1635
-	.loc 5 711 0
+	ldr	r2, .L1637
 	adds	r3, r3, #1
-	.loc 5 703 0
 	ldr	r0, [r2]
 	add	r0, r0, r7
-	.loc 5 706 0
-	ldr	r7, .L1635+20
-	.loc 5 703 0
+	ldr	r7, .L1637+20
 	ldr	r2, [r0, #8]
 	str	r2, [r10, #8]
-	.loc 5 704 0
 	ldr	r2, [r0, #12]
 	str	r2, [r10, #12]
-	.loc 5 705 0
 	ldr	r2, [sp, #44]
 	str	r2, [r1, #12]
-	.loc 5 706 0
 	ldrh	r2, [r7]
 	strh	r2, [r1, #2]	@ movhi
-	.loc 5 709 0
-	ldr	r2, .L1635+24
-	.loc 5 711 0
+	ldr	r2, .L1637+24
 	str	r3, [r8]
-	.loc 5 709 0
 	ldr	r2, [r2]
 	str	r2, [r1, #4]
-	.loc 5 712 0
 	movs	r1, #1
 	bl	FtlGcBufAlloc
-.LVL1796:
-	.loc 5 713 0
 	ldrb	r2, [r7, #7]	@ zero_extendqisi2
 	ldr	r3, [r8]
 	cmp	r2, r3
-	beq	.L1576
+	beq	.L1578
 	ldrh	r3, [r7, #4]
-	cbnz	r3, .L1574
-.L1576:
-	.loc 5 714 0
+	cbnz	r3, .L1576
+.L1578:
 	bl	Ftl_gc_temp_data_write_back
-.LVL1797:
-	cbz	r0, .L1574
-.LVL1798:
-.L1630:
-	.loc 5 729 0
-	ldr	r3, .L1635+28
+	cbz	r0, .L1576
+.L1632:
+	ldr	r3, .L1637+28
 	movs	r2, #0
 	str	r2, [r3]
-	b	.L1629
-.LVL1799:
-.L1574:
+	b	.L1631
+.L1576:
 	ldr	r3, [sp, #20]
 	adds	r3, r3, #1
-	b	.L1626
-.LVL1800:
-.L1578:
-	.loc 5 723 0
+	b	.L1628
+.L1580:
 	ldrh	r3, [r6, #2]
 	add	r4, r4, r3
-.LVL1801:
-	.loc 5 725 0
 	ldr	r3, [sp, #28]
-	.loc 5 723 0
 	uxth	r4, r4
-	.loc 5 725 0
 	cmp	r3, r4
-	.loc 5 723 0
 	strh	r4, [r6, #2]	@ movhi
-	.loc 5 725 0
-	bls	.L1580
-	ldr	r3, .L1635+12
+	bls	.L1582
+	ldr	r3, .L1637+12
 	ldrh	r2, [r3]
-	ldr	r3, .L1635+32
+	ldr	r3, .L1637+32
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1581
-.L1580:
-	.loc 5 727 0
-	ldr	r3, .L1635+36
+	bne	.L1583
+.L1582:
+	ldr	r3, .L1637+36
 	ldr	r3, [r3]
-	cbz	r3, .L1582
-	.loc 5 728 0
+	cbz	r3, .L1584
 	bl	Ftl_gc_temp_data_write_back
-.LVL1802:
 	cmp	r0, #0
-	bne	.L1630
-.L1582:
-	.loc 5 733 0
-	ldr	r3, .L1635+12
+	bne	.L1632
+.L1584:
+	ldr	r3, .L1637+12
 	ldrh	r1, [r3]
-	cbnz	r1, .L1583
-	ldr	r3, .L1635+40
+	cbnz	r1, .L1585
+	ldr	r3, .L1637+40
 	ldrh	r2, [r6]
 	ldr	r3, [r3]
 	ldrh	r0, [r3, r2, lsl #1]
-	cbz	r0, .L1583
-	.loc 5 735 0
+	cbz	r0, .L1585
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	.loc 5 736 0
 	ldrh	r0, [r6]
 	bl	update_vpc_list
-.LVL1803:
-	.loc 5 738 0
 	bl	l2p_flush
-.LVL1804:
-	.loc 5 739 0
 	bl	FtlVpcTblFlush
-.LVL1805:
-.L1583:
-	.loc 5 741 0
+.L1585:
 	movw	r3, #65535
 	strh	r3, [r6]	@ movhi
-.L1581:
-	.loc 5 743 0
-	ldr	r3, .L1635+44
+.L1583:
+	ldr	r3, .L1637+44
 	ldrh	r3, [r3]
 	cmp	r3, #2
-	bhi	.L1584
-	.loc 5 745 0
-	ldr	r3, .L1635+48
+	bhi	.L1586
+	ldr	r3, .L1637+48
 	ldrh	r4, [r3]
-.LVL1806:
-	b	.L1556
-.LVL1807:
-.L1584:
-	.loc 5 748 0
-	ldr	r2, .L1635+28
+	b	.L1558
+.L1586:
+	ldr	r2, .L1637+28
 	movs	r1, #0
 	str	r1, [r2]
-	.loc 5 750 0
-	ldr	r2, .L1635+52
+	ldr	r2, .L1637+52
 	ldrh	r0, [r2]
 	cmp	r0, #0
-	bne	.L1513
-	.loc 5 753 0
+	bne	.L1515
 	adds	r0, r3, #1
-.LVL1808:
-	b	.L1513
-.LVL1809:
-.L1588:
-.LBE328:
-.LBE330:
-	.loc 5 479 0
+	b	.L1515
+.L1590:
 	movs	r0, #0
-	b	.L1513
-.LVL1810:
-.L1519:
-.LBB331:
-.LBB329:
-	.loc 5 527 0
+	b	.L1515
+.L1521:
 	cmp	r7, #0
-	beq	.L1586
-.LVL1811:
-.L1529:
-	.loc 5 557 0
-	ldr	r3, .L1635+20
+	beq	.L1588
+.L1531:
+	ldr	r3, .L1637+20
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1597
-.LVL1812:
-.L1587:
-	ldr	r3, .L1635+56
+	bne	.L1599
+.L1589:
+	ldr	r3, .L1637+56
 	movw	r2, #65535
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bne	.L1597
+	bne	.L1599
 	cmp	r5, r3
-	bne	.L1597
+	bne	.L1599
 	ldrh	r3, [r6]
 	cmp	r3, r5
-	beq	.L1541
-.LVL1813:
-.L1546:
-	.loc 5 556 0
+	beq	.L1543
+.L1548:
 	movw	r5, #65535
-.L1597:
+.L1599:
 	movs	r4, #1
-	b	.L1540
-.LVL1814:
-.L1521:
-	.loc 5 527 0
+	b	.L1542
+.L1523:
 	cmp	r7, #0
-	beq	.L1586
+	beq	.L1588
 	movw	r5, #65535
-	b	.L1587
-.LVL1815:
-.L1520:
+	b	.L1589
+.L1522:
 	cmp	r7, #0
-	bne	.L1546
-	b	.L1586
-.L1636:
+	bne	.L1548
+	b	.L1588
+.L1638:
 	.align	2
-.L1635:
+.L1637:
 	.word	.LANCHOR93
 	.word	.LANCHOR175
 	.word	.LC1
@@ -19527,10 +12287,6 @@ rk_ftl_garbage_collect:
 	.word	.LANCHOR19
 	.word	.LANCHOR172
 	.word	.LANCHOR99
-.LBE329:
-.LBE331:
-	.cfi_endproc
-.LFE322:
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
 	.section	.text.sftl_gc,"ax",%progbits
 	.align	1
@@ -19541,19 +12297,12 @@ rk_ftl_garbage_collect:
 	.fpu softvfp
 	.type	sftl_gc, %function
 sftl_gc:
-.LFB323:
-	.loc 5 757 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	.loc 5 758 0
 	movs	r1, #1
 	mov	r0, r1
 	b	rk_ftl_garbage_collect
-.LVL1816:
-	.cfi_endproc
-.LFE323:
 	.size	sftl_gc, .-sftl_gc
 	.section	.text.FtlRead,"ax",%progbits
 	.align	1
@@ -19564,427 +12313,268 @@ sftl_gc:
 	.fpu softvfp
 	.type	FtlRead, %function
 FtlRead:
-.LFB217:
-	.loc 3 814 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1817:
-	.loc 3 824 0
 	cmp	r0, #16
-	.loc 3 814 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
 	sub	sp, sp, #56
-	.cfi_def_cfa_offset 88
-	.loc 3 814 0
 	mov	r6, r1
 	mov	r8, r3
 	str	r2, [sp, #32]
-	.loc 3 824 0
-	bne	.L1639
-	.loc 3 825 0
+	bne	.L1641
 	mov	r2, r3
-.LVL1818:
 	ldr	r1, [sp, #32]
-.LVL1819:
 	add	r0, r6, #256
-.LVL1820:
 	bl	FtlVendorPartRead
-.LVL1821:
 	str	r0, [sp, #4]
-.LVL1822:
-.L1638:
-	.loc 3 901 0
+.L1640:
 	ldr	r0, [sp, #4]
 	add	sp, sp, #56
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1823:
-.L1639:
-	.cfi_restore_state
-	.loc 3 830 0
+.L1641:
 	ldr	r3, [sp, #32]
-.LVL1824:
 	adds	r3, r1, r3
 	str	r3, [sp, #12]
-	ldr	r3, .L1670
+	ldr	r3, .L1672
 	ldr	r2, [sp, #12]
-.LVL1825:
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1659
-	.loc 3 830 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1670+4
+	bhi	.L1661
+	ldr	r3, .L1672+4
 	ldr	r3, [r3]
 	adds	r0, r3, #1
-.LVL1826:
-	beq	.L1660
-	.loc 3 835 0 is_stmt 1
-	ldr	r3, .L1670+8
+	beq	.L1662
+	ldr	r3, .L1672+8
 	mov	r0, r6
-	.loc 3 828 0
 	movs	r7, #0
-	.loc 3 840 0
 	mov	r5, r7
-	.loc 3 835 0
 	ldrh	r4, [r3]
 	mov	r1, r4
-.LVL1827:
 	bl	__aeabi_uidiv
-.LVL1828:
-	.loc 3 836 0
 	ldr	r3, [sp, #12]
 	mov	r1, r4
-	.loc 3 835 0
 	str	r0, [sp, #16]
-.LVL1829:
-	.loc 3 836 0
 	subs	r0, r3, #1
-.LVL1830:
 	bl	__aeabi_uidiv
-.LVL1831:
-	.loc 3 837 0
 	ldr	r3, [sp, #16]
-	.loc 3 841 0
-	ldr	r2, .L1670+12
-	.loc 3 835 0
+	ldr	r2, .L1672+12
 	ldr	r4, [sp, #16]
-	.loc 3 837 0
 	rsb	r3, r3, #1
-	.loc 3 836 0
 	str	r0, [sp, #20]
-.LVL1832:
-	.loc 3 837 0
 	add	r3, r3, r0
-	.loc 3 828 0
 	str	r7, [sp, #28]
-	.loc 3 837 0
 	str	r3, [sp, #8]
-.LVL1833:
-	.loc 3 841 0
 	ldr	r1, [sp, #8]
 	ldr	r3, [r2]
-.LVL1834:
-	.loc 3 820 0
 	str	r7, [sp, #24]
-	.loc 3 815 0
 	str	r7, [sp, #4]
-	.loc 3 841 0
 	add	r3, r3, r1
 	str	r3, [r2]
-.LVL1835:
-.L1641:
-	.loc 3 842 0
+.L1643:
 	ldr	r3, [sp, #8]
-	cbnz	r3, .L1657
-	.loc 3 898 0
-	ldr	r3, .L1670+16
+	cbnz	r3, .L1659
+	ldr	r3, .L1672+16
 	ldrh	r3, [r3]
-	cbnz	r3, .L1658
-	.loc 3 898 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1670+20
+	cbnz	r3, .L1660
+	ldr	r3, .L1672+20
 	ldrh	r3, [r3]
 	cmp	r3, #31
-	bhi	.L1638
-.L1658:
-	.loc 3 899 0 is_stmt 1
+	bhi	.L1640
+.L1660:
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
-.LVL1836:
-	b	.L1638
-.LVL1837:
-.L1657:
-	.loc 3 843 0
+	b	.L1640
+.L1659:
 	add	r1, sp, #52
 	movs	r2, #0
 	mov	r0, r4
 	bl	log2phys
-.LVL1838:
-	.loc 3 844 0
 	ldr	r3, [sp, #52]
 	adds	r1, r3, #1
-	bne	.L1642
-	.loc 3 845 0 discriminator 1
-	ldr	fp, .L1670+8
+	bne	.L1644
+	ldr	fp, .L1672+8
 	mov	r10, #0
-.L1643:
-.LVL1839:
+.L1645:
 	ldrh	r0, [fp]
 	cmp	r10, r0
-	bcc	.L1645
-.LVL1840:
-.L1646:
-	.loc 3 874 0
+	bcc	.L1647
+.L1648:
 	ldr	r3, [sp, #8]
-	.loc 3 872 0
 	adds	r4, r4, #1
-.LVL1841:
-	.loc 3 874 0
 	subs	r3, r3, #1
-.LVL1842:
 	str	r3, [sp, #8]
-	beq	.L1650
-	.loc 3 874 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1670+24
-.LVL1843:
+	beq	.L1652
+	ldr	r3, .L1672+24
 	ldrh	r3, [r3]
 	cmp	r5, r3, lsl #2
-	bne	.L1641
-.L1650:
-	.loc 3 875 0 is_stmt 1
+	bne	.L1643
+.L1652:
 	cmp	r5, #0
-	beq	.L1641
-	.loc 3 876 0
-	ldr	r3, .L1670+28
+	beq	.L1643
+	ldr	r3, .L1672+28
 	movs	r2, #0
 	mov	r1, r5
-	.loc 3 877 0
 	mov	r10, #0
-	.loc 3 876 0
 	ldr	r0, [r3]
 	bl	FlashReadPages
-.LVL1844:
-	.loc 3 883 0
 	lsls	r3, r7, #9
 	str	r3, [sp, #44]
-	.loc 3 880 0
 	ldr	r3, [sp, #24]
 	lsls	r3, r3, #9
 	str	r3, [sp, #36]
 	ldr	r3, [sp, #28]
 	lsls	r3, r3, #9
 	str	r3, [sp, #40]
-.LVL1845:
-.L1656:
+.L1658:
 	movs	r3, #20
 	mul	fp, r3, r10
-	.loc 3 878 0
-	ldr	r3, .L1670+28
+	ldr	r3, .L1672+28
 	ldr	r2, [r3]
 	ldr	r3, [sp, #16]
 	add	r2, r2, fp
 	ldr	r1, [r2, #16]
 	cmp	r3, r1
-	bne	.L1652
-	.loc 3 879 0
+	bne	.L1654
 	ldr	r1, [r2, #8]
-	ldr	r2, .L1670+32
+	ldr	r2, .L1672+32
 	ldr	r2, [r2]
 	cmp	r1, r2
-	bne	.L1653
-	.loc 3 880 0
+	bne	.L1655
 	ldr	r3, [sp, #36]
 	mov	r0, r8
 	ldr	r2, [sp, #40]
 	add	r1, r1, r3
-.L1669:
-	.loc 3 883 0
+.L1671:
 	bl	ftl_memcpy
-.LVL1846:
-.L1653:
-	.loc 3 885 0
-	ldr	r3, .L1670+28
+.L1655:
+	ldr	r3, .L1672+28
 	ldr	r2, [r3]
 	ldr	r3, [r2, fp]
 	add	r1, r2, fp
 	adds	r2, r3, #1
-	bne	.L1654
-	.loc 3 886 0
-	ldr	r1, .L1670+36
-	.loc 3 887 0
+	bne	.L1656
+	ldr	r1, .L1672+36
 	str	r3, [sp, #4]
-	.loc 3 886 0
 	ldr	r2, [r1, #72]
 	adds	r2, r2, #1
 	str	r2, [r1, #72]
-.LVL1847:
-.L1655:
-	.loc 3 877 0 discriminator 2
+.L1657:
 	add	r10, r10, #1
-.LVL1848:
 	cmp	r5, r10
-	bne	.L1656
-	.loc 3 894 0
+	bne	.L1658
 	movs	r5, #0
-.LVL1849:
-	b	.L1641
-.LVL1850:
-.L1645:
-	.loc 3 846 0
+	b	.L1643
+.L1647:
 	mla	r0, r0, r4, r10
-.LVL1851:
-	.loc 3 847 0
 	cmp	r6, r0
-	bhi	.L1644
-	.loc 3 847 0 is_stmt 0 discriminator 1
+	bhi	.L1646
 	ldr	r3, [sp, #12]
 	cmp	r3, r0
-	bls	.L1644
-	.loc 3 848 0 is_stmt 1
+	bls	.L1646
 	subs	r0, r0, r6
-.LVL1852:
 	mov	r2, #512
 	movs	r1, #0
 	add	r0, r8, r0, lsl #9
 	bl	ftl_memset
-.LVL1853:
-.L1644:
-	.loc 3 845 0 discriminator 2
+.L1646:
 	add	r10, r10, #1
-.LVL1854:
-	b	.L1643
-.LVL1855:
-.L1642:
-	.loc 3 851 0
-	ldr	r2, .L1670+28
+	b	.L1645
+.L1644:
+	ldr	r2, .L1672+28
 	mov	r10, #20
 	ldr	r2, [r2]
 	mla	r10, r10, r5, r2
 	str	r3, [r10, #4]
-	.loc 3 852 0
 	ldr	r3, [sp, #16]
 	cmp	r4, r3
-	ldr	r3, .L1670+8
-	bne	.L1647
-	.loc 3 853 0
-	ldr	r2, .L1670+32
-	.loc 3 854 0
+	ldr	r3, .L1672+8
+	bne	.L1649
+	ldr	r2, .L1672+32
 	mov	r0, r6
 	ldrh	fp, [r3]
-	.loc 3 853 0
 	ldr	r2, [r2]
-	.loc 3 854 0
 	mov	r1, fp
-	.loc 3 853 0
 	str	r2, [r10, #8]
-	.loc 3 854 0
 	bl	__aeabi_uidivmod
-.LVL1856:
 	ldr	r2, [sp, #32]
-	.loc 3 855 0
 	sub	r3, fp, r1
-	.loc 3 854 0
 	str	r1, [sp, #24]
-.LVL1857:
 	cmp	r3, r2
 	it	cs
 	movcs	r3, r2
-.LVL1858:
-	.loc 3 857 0
 	cmp	fp, r3
 	str	r3, [sp, #28]
-.LVL1859:
-	bne	.L1648
-	.loc 3 858 0
+	bne	.L1650
 	str	r8, [r10, #8]
-.LVL1860:
-.L1648:
-	.loc 3 867 0
-	ldr	r3, .L1670+40
-	ldr	r2, .L1670+44
-	.loc 3 868 0
+.L1650:
+	ldr	r3, .L1672+40
+	ldr	r2, .L1672+44
 	str	r4, [r10, #16]
-	.loc 3 867 0
 	ldrh	r3, [r3]
 	ldr	r2, [r2]
 	muls	r3, r5, r3
-	.loc 3 869 0
 	adds	r5, r5, #1
-.LVL1861:
-	.loc 3 867 0
 	bic	r3, r3, #3
 	add	r3, r3, r2
 	str	r3, [r10, #12]
-	b	.L1646
-.L1647:
-	.loc 3 859 0
+	b	.L1648
+.L1649:
 	ldr	r2, [sp, #20]
 	cmp	r4, r2
-	bne	.L1649
-	.loc 3 860 0
-	ldr	r2, .L1670+48
-	.loc 3 861 0
+	bne	.L1651
+	ldr	r2, .L1672+48
 	ldr	r1, [sp, #12]
-	.loc 3 860 0
 	ldr	r2, [r2]
 	str	r2, [r10, #8]
-	.loc 3 861 0
 	ldrh	r2, [r3]
 	mul	r3, r2, r4
 	subs	r7, r1, r3
-.LVL1862:
-	.loc 3 862 0
 	cmp	r2, r7
-	bne	.L1648
-.L1668:
-	.loc 3 865 0
+	bne	.L1650
+.L1670:
 	subs	r3, r3, r6
 	add	r3, r8, r3, lsl #9
 	str	r3, [r10, #8]
-	b	.L1648
-.L1649:
+	b	.L1650
+.L1651:
 	ldrh	r3, [r3]
 	muls	r3, r4, r3
-	b	.L1668
-.LVL1863:
-.L1652:
-	.loc 3 881 0
+	b	.L1670
+.L1654:
 	ldr	r3, [sp, #20]
 	cmp	r3, r1
-	bne	.L1653
-	.loc 3 882 0
-	ldr	r3, .L1670+48
+	bne	.L1655
+	ldr	r3, .L1672+48
 	ldr	r1, [r2, #8]
 	ldr	r2, [r3]
 	cmp	r1, r2
-	bne	.L1653
-	.loc 3 883 0
-	ldr	r2, .L1670+8
+	bne	.L1655
+	ldr	r2, .L1672+8
 	ldr	r3, [sp, #20]
 	ldrh	r0, [r2]
 	ldr	r2, [sp, #44]
 	muls	r0, r3, r0
 	subs	r0, r0, r6
 	add	r0, r8, r0, lsl #9
-	b	.L1669
-.L1654:
-	.loc 3 889 0
+	b	.L1671
+.L1656:
 	cmp	r3, #256
-	bne	.L1655
-.LBB332:
-	.loc 3 890 0
+	bne	.L1657
 	ldr	r0, [r1, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1864:
-	.loc 3 891 0
 	bl	FtlGcRefreshBlock
-.LVL1865:
-	b	.L1655
-.LVL1866:
-.L1659:
-.LBE332:
-	.loc 3 831 0
+	b	.L1657
+.L1661:
 	mov	r3, #-1
-.LVL1867:
-.L1660:
+.L1662:
 	str	r3, [sp, #4]
-	b	.L1638
-.L1671:
+	b	.L1640
+.L1673:
 	.align	2
-.L1670:
+.L1672:
 	.word	.LANCHOR34
 	.word	.LANCHOR86
 	.word	.LANCHOR12
@@ -19998,8 +12588,6 @@ FtlRead:
 	.word	.LANCHOR24
 	.word	.LANCHOR114
 	.word	.LANCHOR113
-	.cfi_endproc
-.LFE217:
 	.size	FtlRead, .-FtlRead
 	.section	.text.sftl_read,"ax",%progbits
 	.align	1
@@ -20010,25 +12598,14 @@ FtlRead:
 	.fpu softvfp
 	.type	sftl_read, %function
 sftl_read:
-.LFB222:
-	.loc 3 1168 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL1868:
-	.loc 3 1169 0
 	mov	r3, r2
 	mov	r2, r1
-.LVL1869:
 	mov	r1, r0
-.LVL1870:
 	movs	r0, #0
-.LVL1871:
 	b	FtlRead
-.LVL1872:
-	.cfi_endproc
-.LFE222:
 	.size	sftl_read, .-sftl_read
 	.section	.text.FtlWrite,"ax",%progbits
 	.align	1
@@ -20039,215 +12616,123 @@ sftl_read:
 	.fpu softvfp
 	.type	FtlWrite, %function
 FtlWrite:
-.LFB220:
-	.loc 3 958 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 72
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1873:
-	.loc 3 966 0
 	cmp	r0, #16
-	.loc 3 958 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
 	sub	sp, sp, #72
-	.cfi_def_cfa_offset 104
-	.loc 3 958 0
 	str	r1, [sp, #4]
 	str	r2, [sp, #20]
 	str	r3, [sp, #16]
-	.loc 3 966 0
-	bne	.L1674
-	.loc 3 967 0
+	bne	.L1676
 	mov	r2, r3
-.LVL1874:
 	ldr	r3, [sp, #4]
-.LVL1875:
 	ldr	r1, [sp, #20]
-.LVL1876:
 	add	r0, r3, #256
-.LVL1877:
 	bl	FtlVendorPartWrite
-.LVL1878:
-.L1673:
-	.loc 3 1117 0
+.L1675:
 	add	sp, sp, #72
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1879:
-.L1674:
-	.cfi_restore_state
-	.loc 3 970 0
+.L1676:
 	ldr	r3, [sp, #4]
-.LVL1880:
 	ldr	r2, [sp, #20]
-.LVL1881:
 	adds	r4, r3, r2
-	ldr	r3, .L1724
+	ldr	r3, .L1726
 	ldr	r3, [r3]
 	cmp	r4, r3
-	bhi	.L1710
-	.loc 3 970 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1724+4
+	bhi	.L1712
+	ldr	r3, .L1726+4
 	ldr	r0, [r3]
-.LVL1882:
 	adds	r5, r0, #1
-	beq	.L1673
-	.loc 3 973 0 is_stmt 1
-	ldr	r3, .L1724+8
+	beq	.L1675
+	ldr	r3, .L1726+8
 	mov	r2, #2048
-	.loc 3 974 0
 	ldr	r0, [sp, #4]
-	.loc 3 973 0
 	str	r2, [r3]
-	.loc 3 974 0
-	ldr	r3, .L1724+12
+	ldr	r3, .L1726+12
 	ldrh	r5, [r3]
 	mov	r1, r5
-.LVL1883:
 	bl	__aeabi_uidiv
-.LVL1884:
-	.loc 3 975 0
 	mov	r1, r5
-	.loc 3 974 0
 	str	r0, [sp, #12]
-.LVL1885:
-	.loc 3 975 0
 	subs	r0, r4, #1
-.LVL1886:
-	ldr	r5, .L1724+16
+	ldr	r5, .L1726+16
 	bl	__aeabi_uidiv
-.LVL1887:
-	.loc 3 976 0
 	ldr	r2, [sp, #12]
-	.loc 3 975 0
 	str	r0, [sp, #28]
-.LVL1888:
-	.loc 3 976 0
 	subs	r3, r0, r2
-	.loc 3 978 0
-	ldr	r2, .L1724+20
-	.loc 3 976 0
+	ldr	r2, .L1726+20
 	str	r3, [sp, #32]
 	adds	r3, r3, #1
 	str	r3, [sp, #8]
-.LVL1889:
-	.loc 3 978 0
 	ldr	r1, [sp, #8]
 	ldr	r3, [r2]
-.LVL1890:
 	add	r3, r3, r1
 	str	r3, [r2]
-.LVL1891:
-	.loc 3 984 0
-	ldr	r3, .L1724+24
+	ldr	r3, .L1726+24
 	ldr	r3, [r3]
-	cbz	r3, .L1676
-	.loc 3 984 0 is_stmt 0 discriminator 1
+	cbz	r3, .L1678
 	ldrh	r2, [r5, #4]
-	.loc 3 985 0 is_stmt 1 discriminator 1
-	ldr	r3, .L1724+28
+	ldr	r3, .L1726+28
 	cmp	r2, #0
 	it	eq
 	moveq	r5, r3
-.L1676:
-	.loc 3 974 0
+.L1678:
 	ldr	r6, [sp, #12]
-.LVL1892:
-.L1677:
-	.loc 3 987 0
+.L1679:
 	ldr	r3, [sp, #8]
-	cbnz	r3, .L1706
-	.loc 3 1103 0
-	ldr	r4, .L1724+32
-	.loc 3 1101 0
+	cbnz	r3, .L1708
+	ldr	r4, .L1726+32
 	mov	r0, r3
 	ldr	r1, [sp, #32]
 	bl	rk_ftl_garbage_collect
-.LVL1893:
-	.loc 3 1103 0
 	ldrh	r2, [r4]
 	cmp	r2, #15
-	bls	.L1707
-.LVL1894:
-.L1709:
-	.loc 3 1116 0
+	bls	.L1709
+.L1711:
 	movs	r0, #0
-	b	.L1673
-.LVL1895:
-.L1706:
-	.loc 3 988 0
-	ldr	r3, .L1724+36
-.LVL1896:
+	b	.L1675
+.L1708:
+	ldr	r3, .L1726+36
 	ldrb	r2, [r5, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1678
-	.loc 3 988 0 is_stmt 0 discriminator 1
+	bcc	.L1680
 	mov	r2, #988
-	ldr	r1, .L1724+40
-	ldr	r0, .L1724+44
+	ldr	r1, .L1726+40
+	ldr	r0, .L1726+44
 	bl	printf
-.LVL1897:
-.L1678:
-	.loc 3 989 0 is_stmt 1
+.L1680:
 	ldrh	r2, [r5, #4]
-	cbnz	r2, .L1679
-	.loc 3 992 0
-	ldr	r3, .L1724+16
-	ldr	r4, .L1724+24
+	cbnz	r2, .L1681
+	ldr	r3, .L1726+16
+	ldr	r4, .L1726+24
 	cmp	r5, r3
-	bne	.L1680
-	.loc 3 993 0
-	ldr	r0, .L1724+28
+	bne	.L1682
+	ldr	r0, .L1726+28
 	ldrh	r5, [r0, #4]
-.LVL1898:
-	cbnz	r5, .L1681
-	.loc 3 994 0
+	cbnz	r5, .L1683
 	bl	allocate_new_data_superblock
-.LVL1899:
-	.loc 3 995 0
 	str	r5, [r4]
-.L1681:
-	.loc 3 997 0
-	ldr	r0, .L1724+16
+.L1683:
+	ldr	r0, .L1726+16
 	bl	allocate_new_data_superblock
-.LVL1900:
-	.loc 3 999 0
-	ldr	r5, .L1724+16
-	.loc 3 998 0
+	ldr	r5, .L1726+16
 	ldr	r2, [r4]
-	.loc 3 999 0
-	ldr	r3, .L1724+28
+	ldr	r3, .L1726+28
 	cmp	r2, #0
 	it	ne
 	movne	r5, r3
-.L1682:
-.LVL1901:
-	.loc 3 1009 0
+.L1684:
 	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1679
-	.loc 3 1010 0
+	cbnz	r3, .L1681
 	mov	r0, r5
 	bl	allocate_new_data_superblock
-.LVL1902:
-.L1679:
-	.loc 3 1017 0
+.L1681:
 	ldrb	r2, [r5, #7]	@ zero_extendqisi2
-	.loc 3 1019 0
 	ldrh	r3, [r5, #4]
 	ldr	r1, [sp, #8]
-	.loc 3 1017 0
 	lsls	r2, r2, #2
 	cmp	r3, r1
 	it	cs
@@ -20255,230 +12740,148 @@ FtlWrite:
 	cmp	r2, r3
 	it	cs
 	movcs	r2, r3
-	.loc 3 1021 0
-	ldr	r3, .L1724+36
+	ldr	r3, .L1726+36
 	str	r2, [sp, #44]
-.LVL1903:
 	ldrb	r2, [r5, #6]	@ zero_extendqisi2
-.LVL1904:
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1683
-	.loc 3 1021 0 is_stmt 0 discriminator 1
+	bcc	.L1685
 	movw	r2, #1021
-	ldr	r1, .L1724+40
-	ldr	r0, .L1724+44
+	ldr	r1, .L1726+40
+	ldr	r0, .L1726+44
 	bl	printf
-.LVL1905:
-.L1683:
-	.loc 3 1030 0 is_stmt 1 discriminator 1
-	ldr	r8, .L1724+48
-	.loc 3 1044 0 discriminator 1
+.L1685:
+	ldr	r8, .L1726+48
 	mov	fp, #0
-.L1684:
-.LVL1906:
-	.loc 3 1022 0 discriminator 1
+.L1686:
 	ldr	r3, [sp, #44]
 	cmp	fp, r3
-	bne	.L1704
-.L1685:
-.LVL1907:
-	.loc 3 1097 0
-	ldr	r0, .L1724+48
+	bne	.L1706
+.L1687:
+	ldr	r0, .L1726+48
 	mov	r3, r5
 	movs	r2, #0
 	mov	r1, fp
 	ldr	r0, [r0]
 	bl	FtlProgPages
-.LVL1908:
-	.loc 3 1098 0
 	ldr	r3, [sp, #8]
 	cmp	fp, r3
-	bls	.L1705
-	.loc 3 1098 0 is_stmt 0 discriminator 1
+	bls	.L1707
 	movw	r2, #1098
-	ldr	r1, .L1724+40
-	ldr	r0, .L1724+44
+	ldr	r1, .L1726+40
+	ldr	r0, .L1726+44
 	bl	printf
-.LVL1909:
-.L1705:
-	.loc 3 1099 0 is_stmt 1
+.L1707:
 	ldr	r3, [sp, #8]
 	sub	r3, r3, fp
 	str	r3, [sp, #8]
-.LVL1910:
-	b	.L1677
-.LVL1911:
-.L1680:
-	.loc 3 1003 0
+	b	.L1679
+.L1682:
 	str	r2, [r4]
-	.loc 3 1004 0
 	ldrh	r2, [r3, #4]
-	cbnz	r2, .L1715
-	.loc 3 1005 0
+	cbnz	r2, .L1717
 	mov	r0, r5
 	bl	allocate_new_data_superblock
-.LVL1912:
-	b	.L1682
-.L1715:
+	b	.L1684
+.L1717:
 	mov	r5, r3
-.LVL1913:
-	b	.L1679
-.LVL1914:
-.L1704:
-	.loc 3 1023 0
+	b	.L1681
+.L1706:
 	ldrh	r2, [r5, #4]
 	cmp	r2, #0
-	beq	.L1685
-	.loc 3 1027 0
+	beq	.L1687
 	movs	r2, #0
 	add	r1, sp, #48
 	mov	r0, r6
 	movs	r7, #20
 	bl	log2phys
-.LVL1915:
-	.loc 3 1028 0
 	mov	r0, r5
 	mul	r7, r7, fp
 	bl	get_new_active_ppa
-.LVL1916:
-	.loc 3 1031 0
-	ldr	r3, .L1724+52
-	.loc 3 1030 0
+	ldr	r3, .L1726+52
 	ldr	r1, [r8]
-	.loc 3 1031 0
 	ldrh	r2, [r3]
-	.loc 3 1030 0
 	add	r1, r1, r7
 	str	r0, [r1, #4]
-	.loc 3 1032 0
 	str	r6, [r1, #16]
-	.loc 3 1031 0
 	mul	r0, r2, fp
-.LVL1917:
 	bic	r3, r0, #3
-	ldr	r0, .L1724+56
+	ldr	r0, .L1726+56
 	str	r3, [sp, #36]
 	ldr	r3, [r0]
 	ldr	r0, [sp, #36]
 	str	r3, [sp, #40]
 	add	r10, r3, r0
-.LVL1918:
 	str	r10, [r1, #12]
-	.loc 3 1035 0
 	mov	r0, r10
 	movs	r1, #0
-.LVL1919:
 	bl	ftl_memset
-.LVL1920:
-	.loc 3 1037 0
 	ldr	r3, [sp, #12]
-	ldr	r2, .L1724+12
+	ldr	r2, .L1726+12
 	cmp	r6, r3
-	beq	.L1686
-	.loc 3 1037 0 is_stmt 0 discriminator 1
+	beq	.L1688
 	ldr	r3, [sp, #28]
 	cmp	r6, r3
-	bne	.L1719
-.LVL1921:
-	.loc 3 1045 0 is_stmt 1
+	bne	.L1721
 	ldrh	r2, [r2]
 	ldr	r3, [sp, #4]
 	ldr	r1, [sp, #20]
 	smulbb	r2, r2, r6
 	adds	r4, r3, r1
-	.loc 3 1044 0
 	movs	r3, #0
-	.loc 3 1045 0
 	subs	r4, r4, r2
-	.loc 3 1044 0
 	str	r3, [sp, #24]
-	.loc 3 1045 0
 	uxth	r4, r4
-.LVL1922:
-	b	.L1689
-.LVL1923:
-.L1686:
-	.loc 3 1039 0
+	b	.L1691
+.L1688:
 	ldrh	r4, [r2]
 	ldr	r0, [sp, #4]
 	mov	r1, r4
 	bl	__aeabi_uidivmod
-.LVL1924:
 	ldr	r3, [sp, #20]
-	.loc 3 1040 0
 	subs	r4, r4, r1
-	.loc 3 1039 0
 	str	r1, [sp, #24]
-.LVL1925:
 	cmp	r4, r3
 	it	cs
 	movcs	r4, r3
-.LVL1926:
-.L1689:
-	.loc 3 1048 0
-	ldr	r2, .L1724+12
-	.loc 3 1049 0
+.L1691:
+	ldr	r2, .L1726+12
 	ldr	r3, [sp, #12]
-	.loc 3 1048 0
 	ldrh	r2, [r2]
 	cmp	r4, r2
-	.loc 3 1050 0
 	ldr	r2, [r8]
-	.loc 3 1048 0
-	bne	.L1690
-	.loc 3 1049 0
+	bne	.L1692
 	cmp	r6, r3
-	.loc 3 1050 0
 	add	r7, r7, r2
-	.loc 3 1052 0
 	ittet	ne
 	mulne	r4, r4, r6
-.LVL1927:
 	ldrne	r3, [sp, #4]
-	.loc 3 1050 0
 	ldreq	r3, [sp, #16]
-	.loc 3 1052 0
 	subne	r4, r4, r3
 	itett	ne
 	ldrne	r3, [sp, #16]
-	.loc 3 1050 0
 	streq	r3, [r7, #8]
-	.loc 3 1052 0
 	addne	r4, r3, r4, lsl #9
 	strne	r4, [r7, #8]
-.LVL1928:
-.L1692:
-	.loc 3 1089 0
-	ldr	r3, .L1724+36
+.L1694:
+	ldr	r3, .L1726+36
 	ldrb	r1, [r5, #6]	@ zero_extendqisi2
 	ldrh	r2, [r3]
 	cmp	r1, r2
-	bcc	.L1701
-	.loc 3 1089 0 is_stmt 0 discriminator 1
+	bcc	.L1703
 	movw	r2, #1089
-	ldr	r1, .L1724+40
-	ldr	r0, .L1724+44
+	ldr	r1, .L1726+40
+	ldr	r0, .L1726+44
 	bl	printf
-.LVL1929:
-.L1701:
-	.loc 3 1090 0 is_stmt 1
+.L1703:
 	ldr	r3, [sp, #40]
 	movw	r2, #61589
 	ldr	r1, [sp, #36]
-	.loc 3 1022 0
 	add	fp, fp, #1
-.LVL1930:
-	.loc 3 1090 0
 	strh	r2, [r3, r1]	@ movhi
-	.loc 3 1091 0
-	ldr	r1, .L1724+60
-	.loc 3 1092 0
+	ldr	r1, .L1726+60
 	str	r6, [r10, #8]
-	.loc 3 1095 0
 	adds	r6, r6, #1
-.LVL1931:
-	.loc 3 1091 0
 	ldr	r2, [r1]
 	str	r2, [r10, #4]
 	adds	r2, r2, #1
@@ -20486,16 +12889,14 @@ FtlWrite:
 	it	eq
 	moveq	r2, #0
 	str	r2, [r1]
-	.loc 3 1093 0
 	ldr	r2, [sp, #48]
 	str	r2, [r10, #12]
-	.loc 3 1094 0
 	ldrh	r2, [r5]
 	strh	r2, [r10, #2]	@ movhi
-	b	.L1684
-.L1725:
+	b	.L1686
+.L1727:
 	.align	2
-.L1724:
+.L1726:
 	.word	.LANCHOR34
 	.word	.LANCHOR86
 	.word	.LANCHOR176
@@ -20512,118 +12913,81 @@ FtlWrite:
 	.word	.LANCHOR24
 	.word	.LANCHOR114
 	.word	.LANCHOR71
-.LVL1932:
-.L1690:
-	.loc 3 1055 0
+.L1692:
 	cmp	r6, r3
-	.loc 3 1056 0
 	add	r2, r2, r7
 	ite	eq
-	ldreq	r1, .L1726
-	.loc 3 1058 0
-	ldrne	r1, .L1726+4
+	ldreq	r1, .L1728
+	ldrne	r1, .L1728+4
 	ldr	r1, [r1]
 	str	r1, [r2, #8]
-	.loc 3 1060 0
 	ldr	r2, [sp, #48]
 	adds	r1, r2, #1
-	beq	.L1695
-.LBB333:
-	.loc 3 1062 0
+	beq	.L1697
 	str	r2, [sp, #56]
-	.loc 3 1066 0
 	add	r0, sp, #52
-	.loc 3 1064 0
 	ldr	r2, [r8]
-	.loc 3 1063 0
 	str	r6, [sp, #68]
-	.loc 3 1064 0
 	add	r2, r2, r7
 	ldr	r1, [r2, #8]
-	.loc 3 1065 0
 	ldr	r2, [r2, #12]
-	.loc 3 1064 0
 	str	r1, [sp, #60]
-	.loc 3 1066 0
 	movs	r1, #1
-	.loc 3 1065 0
 	str	r2, [sp, #64]
-	.loc 3 1066 0
 	movs	r2, #0
 	bl	FlashReadPages
-.LVL1933:
-	.loc 3 1067 0
 	ldr	r2, [sp, #52]
 	adds	r2, r2, #1
-	bne	.L1696
-	.loc 3 1068 0
-	ldr	r1, .L1726+8
+	bne	.L1698
+	ldr	r1, .L1728+8
 	ldr	r2, [r1, #72]
 	adds	r2, r2, #1
 	str	r2, [r1, #72]
-.L1699:
-.LBE333:
-	.loc 3 1080 0
+.L1701:
 	ldr	r3, [sp, #12]
 	lsls	r2, r4, #9
 	cmp	r6, r3
-	bne	.L1700
-	.loc 3 1081 0
+	bne	.L1702
 	ldr	r1, [r8]
 	ldr	r3, [sp, #24]
 	add	r7, r7, r1
 	ldr	r1, [sp, #16]
 	ldr	r0, [r7, #8]
 	add	r0, r0, r3, lsl #9
-.L1722:
-	.loc 3 1083 0
+.L1724:
 	bl	ftl_memcpy
-.LVL1934:
-	b	.L1692
-.L1696:
-.LBB334:
-	.loc 3 1070 0
+	b	.L1694
+.L1698:
 	ldr	r1, [r10, #8]
 	cmp	r6, r1
-	beq	.L1698
-	.loc 3 1071 0
-	ldr	r0, .L1726+8
+	beq	.L1700
+	ldr	r0, .L1728+8
 	ldr	r2, [r0, #72]
 	adds	r2, r2, #1
 	str	r2, [r0, #72]
-	.loc 3 1072 0
 	mov	r2, r6
-	ldr	r0, .L1726+12
+	ldr	r0, .L1728+12
 	bl	printf
-.LVL1935:
-.L1698:
-	.loc 3 1074 0
+.L1700:
 	ldr	r2, [r10, #8]
 	cmp	r6, r2
-	beq	.L1699
-	.loc 3 1074 0 is_stmt 0 discriminator 1
+	beq	.L1701
 	movw	r2, #1074
-	ldr	r1, .L1726+16
-	ldr	r0, .L1726+20
+	ldr	r1, .L1728+16
+	ldr	r0, .L1728+20
 	bl	printf
-.LVL1936:
-	b	.L1699
-.LVL1937:
-.L1695:
-.LBE334:
-	.loc 3 1077 0 is_stmt 1
+	b	.L1701
+.L1697:
 	ldr	r2, [r8]
 	movs	r1, #0
 	adds	r0, r2, r7
-	ldr	r2, .L1726+24
+	ldr	r2, .L1728+24
 	ldr	r0, [r0, #8]
 	ldrh	r2, [r2]
 	bl	ftl_memset
-.LVL1938:
-	b	.L1699
-.L1700:
-	.loc 3 1083 0
-	ldr	r1, .L1726+28
+	b	.L1701
+.L1702:
+	ldr	r1, .L1728+28
 	ldr	r3, [sp, #4]
 	ldr	r0, [r8]
 	ldrh	r1, [r1]
@@ -20633,10 +12997,8 @@ FtlWrite:
 	subs	r1, r1, r3
 	ldr	r3, [sp, #16]
 	add	r1, r3, r1, lsl #9
-	b	.L1722
-.LVL1939:
-.L1719:
-	.loc 3 1087 0
+	b	.L1724
+.L1721:
 	ldrh	r2, [r2]
 	ldr	r3, [sp, #4]
 	ldr	r1, [r8]
@@ -20646,64 +13008,44 @@ FtlWrite:
 	ldr	r3, [sp, #16]
 	add	r2, r3, r2, lsl #9
 	str	r2, [r7, #8]
-	b	.L1692
-.LVL1940:
-.L1707:
-	.loc 3 1105 0
-	ldr	r5, .L1726+32
-.LVL1941:
-	ldr	r6, .L1726+36
-.LVL1942:
-.L1720:
+	b	.L1694
+.L1709:
+	ldr	r5, .L1728+32
+	ldr	r6, .L1728+36
+.L1722:
 	ldrh	r3, [r5]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1708
-	.loc 3 1105 0 is_stmt 0 discriminator 1
+	bne	.L1710
 	ldrh	r2, [r6]
 	cmp	r2, r3
-	bne	.L1708
-	.loc 3 1106 0 is_stmt 1
+	bne	.L1710
 	movs	r0, #0
 	bl	List_get_gc_head_node
-.LVL1943:
 	uxth	r0, r0
 	bl	FtlGcRefreshBlock
-.LVL1944:
-.L1708:
-	.loc 3 1107 0
-	ldr	r2, .L1726+40
+.L1710:
+	ldr	r2, .L1728+40
 	movs	r3, #128
-	.loc 3 1109 0
 	movs	r1, #1
 	mov	r0, r1
-	.loc 3 1107 0
 	strh	r3, [r2]	@ movhi
-	.loc 3 1108 0
-	ldr	r2, .L1726+44
+	ldr	r2, .L1728+44
 	strh	r3, [r2]	@ movhi
-	.loc 3 1109 0
 	bl	rk_ftl_garbage_collect
-.LVL1945:
-	.loc 3 1110 0
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
-.LVL1946:
-	.loc 3 1111 0
 	ldrh	r3, [r4]
 	cmp	r3, #8
-	bls	.L1720
-	b	.L1709
-.LVL1947:
-.L1710:
-	.loc 3 971 0
+	bls	.L1722
+	b	.L1711
+.L1712:
 	mov	r0, #-1
-.LVL1948:
-	b	.L1673
-.L1727:
+	b	.L1675
+.L1729:
 	.align	2
-.L1726:
+.L1728:
 	.word	.LANCHOR115
 	.word	.LANCHOR113
 	.word	.LANCHOR81
@@ -20716,8 +13058,6 @@ FtlWrite:
 	.word	.LANCHOR99
 	.word	.LANCHOR83
 	.word	.LANCHOR82
-	.cfi_endproc
-.LFE220:
 	.size	FtlWrite, .-FtlWrite
 	.section	.text.sftl_write,"ax",%progbits
 	.align	1
@@ -20728,25 +13068,14 @@ FtlWrite:
 	.fpu softvfp
 	.type	sftl_write, %function
 sftl_write:
-.LFB223:
-	.loc 3 1173 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL1949:
-	.loc 3 1174 0
 	mov	r3, r2
 	mov	r2, r1
-.LVL1950:
 	mov	r1, r0
-.LVL1951:
 	movs	r0, #0
-.LVL1952:
 	b	FtlWrite
-.LVL1953:
-	.cfi_endproc
-.LFE223:
 	.size	sftl_write, .-sftl_write
 	.section	.text.FtlLoadSysInfo,"ax",%progbits
 	.align	1
@@ -20757,116 +13086,67 @@ sftl_write:
 	.fpu softvfp
 	.type	FtlLoadSysInfo, %function
 FtlLoadSysInfo:
-.LFB277:
-	.loc 2 1409 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 1417 0
 	movs	r1, #0
-	.loc 2 1414 0
-	ldr	r8, .L1750+136
-	.loc 2 1417 0
-	ldr	r5, .L1750
-	.loc 2 1414 0
+	ldr	r8, .L1752+136
+	ldr	r5, .L1752
 	ldr	r3, [r8]
-	ldr	r4, .L1750+4
-	.loc 2 1415 0
-	ldr	r10, .L1750+140
-	.loc 2 1417 0
+	ldr	r4, .L1752+4
+	ldr	r10, .L1752+140
 	ldrh	r2, [r5]
-	ldr	r7, .L1750+8
-	.loc 2 1414 0
+	ldr	r7, .L1752+8
 	str	r3, [r4, #8]
-	.loc 2 1418 0
-	ldr	r6, .L1750+12
-	.loc 2 1415 0
+	ldr	r6, .L1752+12
 	ldr	r3, [r10]
-	.loc 2 1417 0
 	lsls	r2, r2, #1
 	ldr	r0, [r7]
-	.loc 2 1415 0
 	str	r3, [r4, #12]
-	.loc 2 1417 0
 	bl	ftl_memset
-.LVL1954:
-	.loc 2 1418 0
 	ldrh	r0, [r6]
 	movw	r3, #65535
 	str	r7, [sp]
 	cmp	r0, r3
-	bne	.L1730
-.L1738:
-	.loc 2 1419 0
+	bne	.L1732
+.L1740:
 	mov	r0, #-1
-.L1729:
-	.loc 2 1512 0
+.L1731:
 	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1730:
-	.cfi_restore_state
-	.loc 2 1421 0
+.L1732:
 	movs	r1, #1
-	.loc 2 1427 0
 	mov	fp, r4
-	.loc 2 1421 0
 	bl	FtlGetLastWrittenPage
-.LVL1955:
-	.loc 2 1430 0
-	ldr	r3, .L1750+16
-	.loc 2 1421 0
+	ldr	r3, .L1752+16
 	sxth	r7, r0
-.LVL1956:
-	.loc 2 1422 0
 	adds	r0, r0, #1
 	strh	r0, [r6, #2]	@ movhi
-.L1732:
-	.loc 2 1424 0
+.L1734:
 	cmp	r7, #0
-	bge	.L1735
-	.loc 2 1437 0
+	bge	.L1737
 	movw	r2, #1437
-	ldr	r1, .L1750+20
-	ldr	r0, .L1750+24
+	ldr	r1, .L1752+20
+	ldr	r0, .L1752+24
 	bl	printf
-.LVL1957:
-.L1734:
-	.loc 2 1439 0
-	ldr	r2, .L1750+28
+.L1736:
+	ldr	r2, .L1752+28
 	ldrh	r3, [r5]
 	ldrh	r2, [r2]
 	adds	r3, r3, #24
 	cmp	r2, r3, lsl #1
-	bcs	.L1737
-	.loc 2 1439 0 is_stmt 0 discriminator 1
+	bcs	.L1739
 	movw	r2, #1439
-	ldr	r1, .L1750+20
-	ldr	r0, .L1750+24
+	ldr	r1, .L1752+20
+	ldr	r0, .L1752+24
 	bl	printf
-.LVL1958:
-.L1737:
-	.loc 2 1441 0 is_stmt 1
-	ldr	r7, .L1750+32
-.LVL1959:
+.L1739:
+	ldr	r7, .L1752+32
 	movs	r2, #48
 	ldr	r1, [r4, #8]
 	mov	r0, r7
 	bl	ftl_memcpy
-.LVL1960:
-	.loc 2 1442 0
 	ldrh	r2, [r5]
 	ldr	r1, [r4, #8]
 	ldr	r3, [sp]
@@ -20874,8 +13154,6 @@ FtlLoadSysInfo:
 	adds	r1, r1, #48
 	ldr	r0, [r3]
 	bl	ftl_memcpy
-.LVL1961:
-	.loc 2 1443 0
 	ldrh	r1, [r5]
 	ldr	r3, [r4, #8]
 	mov	r4, r7
@@ -20885,269 +13163,178 @@ FtlLoadSysInfo:
 	adds	r2, r2, #4
 	bic	r1, r1, #3
 	add	r1, r1, r3
-	ldr	r3, .L1750+36
+	ldr	r3, .L1752+36
 	ldr	r0, [r3]
 	bl	ftl_memcpy
-.LVL1962:
-	.loc 2 1445 0
 	ldr	r2, [r7]
-	ldr	r3, .L1750+16
+	ldr	r3, .L1752+16
 	cmp	r2, r3
-	bne	.L1738
-	.loc 2 1449 0
-	ldr	r3, .L1750+40
+	bne	.L1740
+	ldr	r3, .L1752+40
 	ldrb	r2, [r7, #10]	@ zero_extendqisi2
-	.loc 2 1448 0
 	ldrh	r5, [r7, #8]
-	.loc 2 1449 0
 	ldrh	r3, [r3]
-	.loc 2 1448 0
 	strh	r5, [r6, #6]	@ movhi
-	.loc 2 1449 0
 	cmp	r2, r3
-	bne	.L1738
-	.loc 2 1452 0
-	ldr	r3, .L1750+44
-	.loc 2 1453 0
-	ldr	r2, .L1750+48
-	.loc 2 1452 0
+	bne	.L1740
+	ldr	r3, .L1752+44
+	ldr	r2, .L1752+48
 	str	r5, [r3]
-	.loc 2 1453 0
-	ldr	r3, .L1750+52
+	ldr	r3, .L1752+52
 	ldrh	r3, [r3]
 	muls	r3, r5, r3
 	str	r3, [r2]
-	.loc 2 1454 0
-	ldr	r2, .L1750+56
+	ldr	r2, .L1752+56
 	ldrh	r2, [r2]
 	muls	r3, r2, r3
-	ldr	r2, .L1750+60
+	ldr	r2, .L1752+60
 	str	r3, [r2]
-	.loc 2 1455 0
-	ldr	r3, .L1750+64
+	ldr	r3, .L1752+64
 	ldr	r6, [r3]
-	ldr	r3, .L1750+68
+	ldr	r3, .L1752+68
 	ldrh	r0, [r3, #6]
-	ldr	r3, .L1750+72
+	ldr	r3, .L1752+72
 	subs	r0, r6, r0
 	ldrh	r1, [r3]
 	subs	r0, r0, r5
 	bl	__aeabi_uidiv
-.LVL1963:
-	ldr	r3, .L1750+76
-	.loc 2 1461 0
+	ldr	r3, .L1752+76
 	cmp	r5, r6
-	.loc 2 1455 0
 	strh	r0, [r3]	@ movhi
-	.loc 2 1461 0
-	bls	.L1739
-	.loc 2 1461 0 is_stmt 0 discriminator 1
+	bls	.L1741
 	movw	r2, #1461
-	ldr	r1, .L1750+20
-	ldr	r0, .L1750+24
+	ldr	r1, .L1752+20
+	ldr	r0, .L1752+24
 	bl	printf
-.LVL1964:
-.L1739:
-	.loc 2 1464 0 is_stmt 1
+.L1741:
 	ldrh	r2, [r4, #16]
-	.loc 2 1463 0
-	ldr	r3, .L1750+80
+	ldr	r3, .L1752+80
 	ldrh	ip, [r4, #14]
-	.loc 2 1468 0
-	ldr	r7, .L1750+84
-	.loc 2 1464 0
+	ldr	r7, .L1752+84
 	lsrs	r1, r2, #6
-	.loc 2 1465 0
 	and	r2, r2, #63
 	strb	r2, [r3, #6]
-	.loc 2 1466 0
 	ldrb	r2, [r4, #11]	@ zero_extendqisi2
-	.loc 2 1464 0
 	strh	r1, [r3, #2]	@ movhi
-	.loc 2 1473 0
-	ldr	r1, .L1750+88
-	.loc 2 1466 0
+	ldr	r1, .L1752+88
 	strb	r2, [r3, #8]
-	.loc 2 1473 0
 	ldrh	r2, [r4, #18]
-	.loc 2 1463 0
 	strh	ip, [r3]	@ movhi
-	.loc 2 1468 0
 	movw	r3, #65535
 	strh	r3, [r7]	@ movhi
-	.loc 2 1469 0
 	movs	r3, #0
-	.loc 2 1473 0
 	strh	r2, [r1]	@ movhi
-	.loc 2 1474 0
 	ldrh	r2, [r4, #20]
-	.loc 2 1469 0
 	strh	r3, [r7, #2]	@ movhi
-	.loc 2 1470 0
 	strb	r3, [r7, #6]
-	.loc 2 1471 0
 	strb	r3, [r7, #8]
-	.loc 2 1474 0
 	lsrs	r5, r2, #6
-	.loc 2 1475 0
 	and	r2, r2, #63
 	strb	r2, [r1, #6]
-	.loc 2 1476 0
 	ldrb	r2, [r4, #12]	@ zero_extendqisi2
-	.loc 2 1474 0
 	strh	r5, [r1, #2]	@ movhi
-	.loc 2 1478 0
 	ldrh	r5, [r4, #22]
-	.loc 2 1476 0
 	strb	r2, [r1, #8]
-	.loc 2 1478 0
-	ldr	r2, .L1750+92
+	ldr	r2, .L1752+92
 	strh	r5, [r2]	@ movhi
-	.loc 2 1479 0
 	ldrh	r5, [r4, #24]
 	lsrs	r6, r5, #6
-	.loc 2 1480 0
 	and	r5, r5, #63
 	strb	r5, [r2, #6]
-	.loc 2 1481 0
 	ldrb	r5, [r4, #13]	@ zero_extendqisi2
-	.loc 2 1479 0
 	strh	r6, [r2, #2]	@ movhi
-	.loc 2 1488 0
 	ldr	r6, [r4, #32]
-	.loc 2 1481 0
 	strb	r5, [r2, #8]
-	.loc 2 1483 0
-	ldr	r5, .L1750+96
+	ldr	r5, .L1752+96
 	str	r3, [r5]
-	.loc 2 1484 0
-	ldr	r5, .L1750+100
+	ldr	r5, .L1752+100
 	str	r3, [r5]
-	.loc 2 1485 0
-	ldr	r5, .L1750+104
+	ldr	r5, .L1752+104
 	str	r3, [r5]
-	.loc 2 1486 0
-	ldr	r5, .L1750+108
+	ldr	r5, .L1752+108
 	str	r3, [r5]
-	.loc 2 1488 0
-	ldr	r5, .L1750+112
+	ldr	r5, .L1752+112
 	str	r6, [r5]
 	mov	r6, r1
-	.loc 2 1489 0
-	ldr	r5, .L1750+116
+	ldr	r5, .L1752+116
 	str	r3, [r5]
-	.loc 2 1490 0
-	ldr	r5, .L1750+120
+	ldr	r5, .L1752+120
 	str	r3, [r5]
-	.loc 2 1491 0
-	ldr	r5, .L1750+124
-	.loc 2 1493 0
+	ldr	r5, .L1752+124
 	ldr	lr, [r4, #40]
-	.loc 2 1491 0
 	str	r3, [r5]
-	.loc 2 1493 0
-	ldr	r3, .L1750+128
+	ldr	r3, .L1752+128
 	ldr	r5, [r3]
 	cmp	lr, r5
 	mov	r5, r2
-	.loc 2 1494 0
 	it	hi
 	strhi	lr, [r3]
-	.loc 2 1496 0
-	ldr	r3, .L1750+132
+	ldr	r3, .L1752+132
 	ldr	r2, [r4, #36]
 	ldr	r1, [r3]
 	cmp	r2, r1
-	.loc 2 1497 0
 	it	hi
 	strhi	r2, [r3]
-	.loc 2 1499 0
 	movw	r3, #65535
 	cmp	ip, r3
-	beq	.L1742
-	.loc 2 1500 0
-	ldr	r0, .L1750+80
+	beq	.L1744
+	ldr	r0, .L1752+80
 	bl	make_superblock
-.LVL1965:
-.L1742:
-	.loc 2 1502 0
+.L1744:
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1743
-	.loc 2 1503 0
-	ldr	r0, .L1750+88
+	beq	.L1745
+	ldr	r0, .L1752+88
 	bl	make_superblock
-.LVL1966:
-.L1743:
-	.loc 2 1505 0
+.L1745:
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1744
-	.loc 2 1506 0
-	ldr	r0, .L1750+92
+	beq	.L1746
+	ldr	r0, .L1752+92
 	bl	make_superblock
-.LVL1967:
-.L1744:
-	.loc 2 1508 0
+.L1746:
 	ldrh	r2, [r7]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1745
-	.loc 2 1509 0
-	ldr	r0, .L1750+84
+	beq	.L1747
+	ldr	r0, .L1752+84
 	bl	make_superblock
-.LVL1968:
-.L1745:
-	.loc 2 1511 0
+.L1747:
 	movs	r0, #0
-	b	.L1729
-.LVL1969:
-.L1735:
-	.loc 2 1425 0
+	b	.L1731
+.L1737:
 	ldrh	r2, [r6]
-	.loc 2 1427 0
 	mov	r0, fp
 	str	r3, [sp, #4]
-	.loc 2 1425 0
 	orr	r2, r7, r2, lsl #10
 	str	r2, [r4, #4]
-	.loc 2 1426 0
 	ldr	r2, [r8]
 	str	r2, [r4, #8]
-	.loc 2 1427 0
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL1970:
-	.loc 2 1430 0
 	ldr	r2, [r4]
 	ldr	r3, [sp, #4]
 	adds	r2, r2, #1
-	beq	.L1733
-	.loc 2 1431 0 discriminator 1
+	beq	.L1735
 	ldr	r2, [r8]
-	.loc 2 1430 0 discriminator 1
 	ldr	r2, [r2]
 	cmp	r2, r3
-	bne	.L1733
-	.loc 2 1432 0
+	bne	.L1735
 	ldr	r2, [r10]
 	ldrh	r1, [r2]
-	.loc 2 1431 0
 	movw	r2, #61604
 	cmp	r1, r2
-	beq	.L1734
-.L1733:
+	beq	.L1736
+.L1735:
 	subs	r7, r7, #1
-.LVL1971:
 	sxth	r7, r7
-.LVL1972:
-	b	.L1732
-.L1751:
+	b	.L1734
+.L1753:
 	.align	2
-.L1750:
+.L1752:
 	.word	.LANCHOR5
 	.word	.LANCHOR106
 	.word	.LANCHOR42
@@ -21184,8 +13371,6 @@ FtlLoadSysInfo:
 	.word	.LANCHOR71
 	.word	.LANCHOR107
 	.word	.LANCHOR108
-	.cfi_endproc
-.LFE277:
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
 	.section	.text.FtlSysBlkInit,"ax",%progbits
 	.align	1
@@ -21196,241 +13381,134 @@ FtlLoadSysInfo:
 	.fpu softvfp
 	.type	FtlSysBlkInit, %function
 FtlSysBlkInit:
-.LFB295:
-	.loc 2 2356 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 3, -24
-	.cfi_offset 4, -20
-	.cfi_offset 5, -16
-	.cfi_offset 6, -12
-	.cfi_offset 7, -8
-	.cfi_offset 14, -4
-	.loc 2 2360 0
 	movs	r3, #0
-	ldr	r6, .L1767
+	ldr	r6, .L1769
 	strh	r3, [r6]	@ movhi
-	.loc 2 2362 0
-	ldr	r3, .L1767+4
+	ldr	r3, .L1769+4
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
-.LVL1973:
-	.loc 2 2363 0
 	bl	FtlScanSysBlk
-.LVL1974:
-	.loc 2 2364 0
-	ldr	r3, .L1767+8
+	ldr	r3, .L1769+8
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1753
-.L1755:
-	.loc 2 2365 0
+	bne	.L1755
+.L1757:
 	mov	r7, #-1
-.L1752:
-	.loc 2 2451 0
+.L1754:
 	mov	r0, r7
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1753:
-	.loc 2 2367 0
+.L1755:
 	bl	FtlLoadSysInfo
-.LVL1975:
 	mov	r7, r0
 	cmp	r0, #0
-	bne	.L1755
-	.loc 2 2370 0
+	bne	.L1757
 	bl	FtlLoadMapInfo
-.LVL1976:
-	.loc 2 2371 0
 	bl	FtlLoadVonderInfo
-.LVL1977:
-	.loc 2 2372 0
 	bl	Ftl_load_ext_data
-.LVL1978:
-	.loc 2 2374 0
 	bl	FtlLoadEctTbl
-.LVL1979:
-	.loc 2 2375 0
 	bl	FtlFreeSysBLkSort
-.LVL1980:
-	.loc 2 2377 0
 	bl	SupperBlkListInit
-.LVL1981:
-	.loc 2 2378 0
 	bl	FtlPowerLostRecovery
-.LVL1982:
-	.loc 2 2380 0
 	movs	r0, #1
 	bl	FtlUpdateVaildLpn
-.LVL1983:
-.LBB338:
-.LBB339:
-	.loc 2 2382 0
-	ldr	r3, .L1767+12
-	.loc 2 2383 0
+	ldr	r3, .L1769+12
 	movs	r0, #12
-	.loc 2 2382 0
 	ldrh	r1, [r3]
-	.loc 2 2383 0
-	ldr	r3, .L1767+16
+	ldr	r3, .L1769+16
 	ldr	r2, [r3]
-	.loc 2 2382 0
 	mov	r3, r7
-.L1756:
-.LVL1984:
+.L1758:
 	cmp	r3, r1
-	bge	.L1761
-	.loc 2 2383 0
+	bge	.L1763
 	mla	r4, r0, r3, r2
 	ldr	r4, [r4, #4]
 	cmp	r4, #0
-	bge	.L1757
-.L1761:
-	.loc 2 2386 0
-	ldr	r4, .L1767+20
-	.loc 2 2388 0
+	bge	.L1759
+.L1763:
+	ldr	r4, .L1769+20
 	cmp	r3, r1
-	ldr	r5, .L1767+24
-	.loc 2 2386 0
+	ldr	r5, .L1769+24
 	ldrh	r2, [r4, #28]
 	add	r2, r2, #1
 	strh	r2, [r4, #28]	@ movhi
-	.loc 2 2388 0
-	bge	.L1765
-.LVL1985:
-.L1758:
-	.loc 2 2390 0
-	ldr	r6, .L1767+28
-	.loc 2 2389 0
-	ldr	r0, .L1767+24
+	bge	.L1767
+.L1760:
+	ldr	r6, .L1769+28
+	ldr	r0, .L1769+24
 	bl	FtlSuperblockPowerLostFix
-.LVL1986:
-	.loc 2 2390 0
 	mov	r0, r6
 	bl	FtlSuperblockPowerLostFix
-.LVL1987:
-.LBB340:
-	.loc 2 2396 0
-	ldr	r3, .L1767+32
+	ldr	r3, .L1769+32
 	ldrh	r1, [r5]
 	ldrh	r0, [r5, #4]
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
-	.loc 2 2397 0
-	ldr	r0, .L1767+36
-	.loc 2 2396 0
+	ldr	r0, .L1769+36
 	strh	r3, [r2, r1, lsl #1]	@ movhi
-	.loc 2 2402 0
 	ldrh	ip, [r6]
-	.loc 2 2397 0
 	ldrh	r3, [r0]
-	.loc 2 2402 0
 	ldrh	lr, [r6, #4]
-	.loc 2 2397 0
 	strh	r3, [r5, #2]	@ movhi
-	.loc 2 2398 0
 	movs	r3, #0
 	strb	r3, [r5, #6]
-	.loc 2 2399 0
 	strh	r3, [r5, #4]	@ movhi
-.LVL1988:
-	.loc 2 2402 0
 	ldrh	r1, [r2, ip, lsl #1]
 	sub	r1, r1, lr
 	strh	r1, [r2, ip, lsl #1]	@ movhi
-	.loc 2 2403 0
 	ldrh	r2, [r0]
-.LBE340:
-	.loc 2 2409 0
-	ldr	r0, .L1767+40
-.LBB341:
-	.loc 2 2404 0
+	ldr	r0, .L1769+40
 	strb	r3, [r6, #6]
-	.loc 2 2403 0
 	strh	r2, [r6, #2]	@ movhi
-	.loc 2 2405 0
 	strh	r3, [r6, #4]	@ movhi
-.LBE341:
-	.loc 2 2409 0
 	bl	FtlMapBlkWriteDump_data
-.LVL1989:
-	.loc 2 2410 0
-	ldr	r0, .L1767+44
+	ldr	r0, .L1769+44
 	bl	FtlMapBlkWriteDump_data
-.LVL1990:
-	.loc 2 2422 0
 	ldrh	r3, [r4, #30]
 	adds	r3, r3, #1
 	strh	r3, [r4, #30]	@ movhi
-	.loc 2 2423 0
 	bl	l2p_flush
-.LVL1991:
-	.loc 2 2424 0
 	bl	FtlVpcTblFlush
-.LVL1992:
-.L1766:
-	.loc 2 2428 0
+.L1768:
 	bl	FtlVpcTblFlush
-.LVL1993:
-	.loc 2 2432 0
 	ldrh	r0, [r5]
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1764
+	beq	.L1766
 	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1764
-	.loc 2 2434 0
-	ldr	r5, .L1767+28
-	.loc 2 2433 0
+	cbnz	r3, .L1766
+	ldr	r5, .L1769+28
 	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1764
-	.loc 2 2435 0
+	cbnz	r3, .L1766
 	bl	FtlGcRefreshBlock
-.LVL1994:
-	.loc 2 2436 0
 	ldrh	r0, [r5]
 	bl	FtlGcRefreshBlock
-.LVL1995:
-	.loc 2 2437 0
-	ldr	r0, .L1767+24
+	ldr	r0, .L1769+24
 	bl	allocate_new_data_superblock
-.LVL1996:
-	.loc 2 2438 0
 	mov	r0, r5
 	bl	allocate_new_data_superblock
-.LVL1997:
-.L1764:
-	.loc 2 2443 0
+.L1766:
 	ldrh	r3, [r4, #28]
 	lsls	r3, r3, #27
-	bne	.L1752
-	.loc 2 2444 0
+	bne	.L1754
 	bl	FtlVpcCheckAndModify
-.LVL1998:
-	b	.L1752
-.LVL1999:
-.L1757:
-	.loc 2 2382 0
+	b	.L1754
+.L1759:
 	adds	r3, r3, #1
-.LVL2000:
-	b	.L1756
-.L1765:
-	.loc 2 2388 0
+	b	.L1758
+.L1767:
 	ldrh	r3, [r6]
-.LVL2001:
 	cmp	r3, #0
-	bne	.L1758
-	.loc 2 2427 0
+	bne	.L1760
 	bl	l2p_flush
-.LVL2002:
-	b	.L1766
-.L1768:
+	b	.L1768
+.L1770:
 	.align	2
-.L1767:
+.L1769:
 	.word	.LANCHOR161
 	.word	.LANCHOR4
 	.word	.LANCHOR79
@@ -21443,10 +13521,6 @@ FtlSysBlkInit:
 	.word	.LANCHOR19
 	.word	.LANCHOR144
 	.word	.LANCHOR149
-.LBE339:
-.LBE338:
-	.cfi_endproc
-.LFE295:
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.section	.text.ftl_low_format,"ax",%progbits
 	.align	1
@@ -21457,464 +13531,278 @@ FtlSysBlkInit:
 	.fpu softvfp
 	.type	ftl_low_format, %function
 ftl_low_format:
-.LFB213:
-	.loc 3 623 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 48
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 3 629 0
 	movs	r3, #0
-	.loc 3 631 0
-	ldr	r6, .L1793
-	.loc 3 630 0
-	ldr	r2, .L1793+4
-	.loc 3 629 0
-	ldr	r5, .L1793+8
-	.loc 3 631 0
+	ldr	r6, .L1795
+	ldr	r2, .L1795+4
+	ldr	r5, .L1795+8
 	ldrh	r0, [r6]
-	.loc 3 630 0
 	str	r3, [r2]
-	.loc 3 629 0
 	str	r3, [r5]
-	.loc 3 631 0
 	bl	FtlFreeSysBlkQueueInit
-.LVL2003:
-	.loc 3 632 0
 	bl	FtlLoadBbt
-.LVL2004:
-	cbz	r0, .L1770
-	.loc 3 633 0
+	cbz	r0, .L1772
 	bl	FtlMakeBbt
-.LVL2005:
-.L1770:
-	.loc 3 635 0 discriminator 1
-	ldr	r3, .L1793+12
-	.loc 3 636 0 discriminator 1
-	ldr	r2, .L1793+16
-	.loc 3 637 0 discriminator 1
-	ldr	ip, .L1793+100
-	.loc 3 635 0 discriminator 1
+.L1772:
+	ldr	r3, .L1795+12
+	ldr	r2, .L1795+16
+	ldr	ip, .L1795+100
 	ldrh	r1, [r3]
-	.loc 3 636 0 discriminator 1
 	ldr	r4, [r2]
-	.loc 3 637 0 discriminator 1
-	ldr	r2, .L1793+20
+	ldr	r2, .L1795+20
 	str	r3, [sp, #4]
-	.loc 3 635 0 discriminator 1
 	lsls	r1, r1, #7
-	.loc 3 637 0 discriminator 1
 	ldr	r7, [r2]
 	movs	r2, #0
-.L1771:
-.LVL2006:
-	.loc 3 635 0 discriminator 1
+.L1773:
 	uxth	r3, r2
 	adds	r2, r2, #1
-.LVL2007:
 	cmp	r3, r1
-	blt	.L1772
-.LVL2008:
-	.loc 3 642 0
-	ldr	r3, .L1793+24
-.LVL2009:
-	.loc 3 641 0
+	blt	.L1774
+	ldr	r3, .L1795+24
 	movs	r7, #0
-	.loc 3 642 0
-	ldr	r10, .L1793+104
+	ldr	r10, .L1795+104
 	ldrh	r4, [r3]
-.LVL2010:
 	mov	r8, r3
 	mov	fp, r10
-.LVL2011:
-.L1773:
-	.loc 3 642 0 is_stmt 0 discriminator 1
+.L1775:
 	ldrh	r3, [r10]
 	cmp	r3, r4
-	bhi	.L1774
-	.loc 3 645 0 is_stmt 1
-	ldr	r4, .L1793+28
-.LVL2012:
+	bhi	.L1776
+	ldr	r4, .L1795+28
 	subs	r3, r7, #2
 	ldrh	r1, [r4]
 	cmp	r3, r1, lsl #1
-	bgt	.L1775
-.LVL2013:
-.L1779:
-	.loc 3 641 0
+	bgt	.L1777
+.L1781:
 	movs	r6, #0
 	mov	r7, r6
-.L1776:
-	.loc 3 656 0 discriminator 1
+.L1778:
 	ldrh	r3, [r8]
 	uxth	r0, r6
-.LVL2014:
 	adds	r6, r6, #1
 	cmp	r3, r0
-	bhi	.L1780
-	.loc 3 658 0
+	bhi	.L1782
 	ldrh	r2, [fp]
-	ldr	r3, .L1793+32
-	.loc 3 661 0
+	ldr	r3, .L1795+32
 	ldrh	r4, [r4]
-	ldr	r6, .L1793+36
-	.loc 3 658 0
+	ldr	r6, .L1795+36
 	str	r2, [r3]
-	.loc 3 661 0
-	ldr	r3, .L1793+40
+	ldr	r3, .L1795+40
 	mov	r1, r4
 	ldr	r2, [r3]
 	mov	r0, r2
-.LVL2015:
 	str	r2, [sp, #12]
 	bl	__aeabi_uidiv
-.LVL2016:
-	.loc 3 662 0
 	ubfx	r10, r0, #5, #16
-	.loc 3 661 0
 	mov	r3, r0
 	str	r0, [r6]
-	.loc 3 662 0
 	add	r1, r10, #36
-	ldr	r0, .L1793+44
+	ldr	r0, .L1795+44
 	strh	r1, [r0]	@ movhi
-	.loc 3 663 0
 	movs	r1, #24
 	muls	r1, r4, r1
 	str	r0, [sp]
 	cmp	r7, r1
-	ble	.L1781
-	.loc 3 664 0
+	ble	.L1783
 	ldr	r2, [sp, #12]
 	mov	r1, r4
 	str	r3, [sp, #8]
 	subs	r0, r2, r7
 	bl	__aeabi_uidiv
-.LVL2017:
-	.loc 3 665 0
 	ldr	r3, [sp]
-	.loc 3 664 0
 	str	r0, [r6]
-	.loc 3 665 0
 	lsrs	r0, r0, #5
 	adds	r0, r0, #24
 	strh	r0, [r3]	@ movhi
 	ldr	r3, [sp, #8]
-.L1781:
-	.loc 3 668 0
-	ldr	r2, .L1793+48
+.L1783:
+	ldr	r2, .L1795+48
 	ldrh	r2, [r2]
-	cbz	r2, .L1783
-	.loc 3 669 0
-	ldr	r1, .L1793+44
+	cbz	r2, .L1785
+	ldr	r1, .L1795+44
 	ldrh	r0, [r1]
 	add	r0, r0, r2, lsr #1
 	strh	r0, [r1]	@ movhi
-	.loc 3 670 0
 	mul	r0, r4, r2
 	cmp	r7, r0
-	.loc 3 672 0
 	itttt	lt
 	addlt	r2, r2, #32
-	.loc 3 671 0
 	strlt	r3, [r6]
-	.loc 3 672 0
 	addlt	r2, r2, r10
 	strhlt	r2, [r1]	@ movhi
-.L1783:
-	.loc 3 677 0
+.L1785:
 	ldr	r3, [sp]
-	ldr	r7, .L1793+52
-.LVL2018:
-	.loc 3 687 0
-	ldr	r10, .L1793+108
-	.loc 3 677 0
+	ldr	r7, .L1795+52
+	ldr	r10, .L1795+108
 	ldrh	r2, [r3]
 	ldr	r3, [r6]
 	subs	r3, r3, r2
 	muls	r4, r3, r4
-	.loc 3 678 0
-	ldr	r3, .L1793+56
+	ldr	r3, .L1795+56
 	ldrh	r3, [r3]
-	.loc 3 677 0
 	str	r4, [r7]
-	.loc 3 678 0
 	muls	r4, r3, r4
-	.loc 3 679 0
 	ldr	r3, [sp, #4]
 	ldrh	r3, [r3]
-	.loc 3 678 0
 	str	r4, [r6]
-	.loc 3 694 0
-	ldr	r6, .L1793+60
-	.loc 3 679 0
+	ldr	r6, .L1795+60
 	muls	r4, r3, r4
-	ldr	r3, .L1793+64
+	ldr	r3, .L1795+64
 	str	r4, [r3]
-	.loc 3 689 0
 	movw	r4, #65535
-	.loc 3 684 0
 	bl	FtlBbmTblFlush
-.LVL2019:
-	.loc 3 687 0
 	ldrh	r2, [fp]
 	movs	r1, #0
 	ldr	r0, [r10]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-.LVL2020:
-	.loc 3 688 0
-	ldr	r2, .L1793+68
+	ldr	r2, .L1795+68
 	movs	r3, #0
-	.loc 3 694 0
 	strh	r3, [r6, #2]	@ movhi
-	.loc 3 698 0
 	movs	r1, #255
-	.loc 3 695 0
 	strb	r3, [r6, #6]
-	.loc 3 688 0
 	str	r3, [r2]
-	.loc 3 689 0
-	ldr	r2, .L1793+72
-	.loc 3 696 0
+	ldr	r2, .L1795+72
 	strh	r3, [r6]	@ movhi
-	.loc 3 690 0
 	strh	r3, [r2, #2]	@ movhi
-	.loc 3 691 0
 	strb	r3, [r2, #6]
-	.loc 3 692 0
 	strb	r3, [r2, #8]
-	.loc 3 697 0
 	movs	r3, #1
-	.loc 3 689 0
 	strh	r4, [r2]	@ movhi
-	.loc 3 698 0
 	ldrh	r2, [r8]
 	mov	r8, r10
-	.loc 3 697 0
 	strb	r3, [r6, #8]
-	.loc 3 701 0
 	mov	r10, r6
-	.loc 3 698 0
-	ldr	r3, .L1793+76
+	ldr	r3, .L1795+76
 	lsrs	r2, r2, #3
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL2021:
-.L1785:
-	.loc 3 701 0
+.L1787:
 	mov	r0, r10
 	bl	make_superblock
-.LVL2022:
-	.loc 3 702 0
 	ldrb	r3, [r6, #7]	@ zero_extendqisi2
 	ldrh	r2, [r6]
 	cmp	r3, #0
-	bne	.L1786
-	.loc 3 705 0
+	bne	.L1788
 	ldr	r3, [r8]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
-	.loc 3 706 0
 	ldrh	r3, [r6]
 	adds	r3, r3, #1
 	strh	r3, [r6]	@ movhi
-	.loc 3 707 0
-	b	.L1785
-.LVL2023:
-.L1772:
-	.loc 3 636 0 discriminator 3
+	b	.L1787
+.L1774:
 	mvns	r0, r3
 	orr	r0, r3, r0, lsl #16
 	str	r0, [r4, r3, lsl #2]
-	.loc 3 637 0 discriminator 3
 	str	ip, [r7, r3, lsl #2]
-.LVL2024:
-	b	.L1771
-.LVL2025:
-.L1774:
-	.loc 3 643 0 discriminator 3
+	b	.L1773
+.L1776:
 	mov	r0, r4
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
-.LVL2026:
-	.loc 3 642 0 discriminator 3
 	adds	r4, r4, #1
-.LVL2027:
-	.loc 3 643 0 discriminator 3
 	add	r7, r7, r0
-.LVL2028:
 	uxth	r7, r7
-.LVL2029:
-	.loc 3 642 0 discriminator 3
 	uxth	r4, r4
-.LVL2030:
-	b	.L1773
-.LVL2031:
-.L1775:
-	.loc 3 647 0
+	b	.L1775
+.L1777:
 	mov	r0, r7
 	bl	__aeabi_uidiv
-.LVL2032:
-	ldr	r3, .L1793+80
+	ldr	r3, .L1795+80
 	ldr	r3, [r3]
 	add	r0, r0, r3
 	uxth	r0, r0
 	bl	FtlSysBlkNumInit
-.LVL2033:
-	.loc 3 648 0
 	ldrh	r0, [r6]
 	bl	FtlFreeSysBlkQueueInit
-.LVL2034:
-	.loc 3 650 0
 	ldrh	r6, [r8]
-.LVL2035:
-.L1777:
-	.loc 3 650 0 is_stmt 0 discriminator 1
+.L1779:
 	ldrh	r3, [fp]
 	cmp	r3, r6
-	bls	.L1779
-	.loc 3 651 0 is_stmt 1 discriminator 3
+	bls	.L1781
 	mov	r0, r6
 	movs	r1, #1
-	.loc 3 650 0 discriminator 3
 	adds	r6, r6, #1
-.LVL2036:
-	.loc 3 651 0 discriminator 3
 	bl	FtlLowFormatEraseBlock
-.LVL2037:
-	.loc 3 650 0 discriminator 3
 	uxth	r6, r6
-.LVL2038:
-	b	.L1777
-.LVL2039:
-.L1780:
-	.loc 3 657 0 discriminator 3
+	b	.L1779
+.L1782:
 	movs	r1, #0
 	bl	FtlLowFormatEraseBlock
-.LVL2040:
 	add	r7, r7, r0
-.LVL2041:
 	uxth	r7, r7
-.LVL2042:
-	b	.L1776
-.LVL2043:
-.L1786:
-	.loc 3 709 0
+	b	.L1778
+.L1788:
 	ldr	r3, [r5]
-	.loc 3 710 0
 	ldrh	r1, [r6, #4]
-	.loc 3 712 0
-	ldr	r4, .L1793+84
-	.loc 3 709 0
+	ldr	r4, .L1795+84
 	str	r3, [r6, #12]
 	adds	r3, r3, #1
 	str	r3, [r5]
-	.loc 3 710 0
 	ldr	r3, [r8]
-	.loc 3 717 0
 	mov	r10, r4
-	.loc 3 710 0
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	.loc 3 712 0
 	movs	r3, #0
 	strh	r3, [r4, #2]	@ movhi
-	.loc 3 713 0
 	strb	r3, [r4, #6]
-	.loc 3 714 0
 	ldrh	r3, [r6]
-	.loc 3 721 0
 	movw	r6, #65535
-	.loc 3 714 0
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	.loc 3 715 0
 	movs	r3, #1
 	strb	r3, [r4, #8]
-.L1787:
-	.loc 3 717 0
+.L1789:
 	mov	r0, r10
 	bl	make_superblock
-.LVL2044:
-	.loc 3 718 0
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r4]
-	cbnz	r3, .L1788
-	.loc 3 721 0
+	cbnz	r3, .L1790
 	ldr	r3, [r8]
 	strh	r6, [r3, r2, lsl #1]	@ movhi
-	.loc 3 722 0
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	.loc 3 723 0
-	b	.L1787
-.L1788:
-	.loc 3 725 0
+	b	.L1789
+.L1790:
 	ldr	r3, [r5]
-	.loc 3 726 0
 	ldrh	r1, [r4, #4]
-	.loc 3 725 0
 	str	r3, [r4, #12]
 	adds	r3, r3, #1
 	str	r3, [r5]
-	.loc 3 727 0
 	movw	r4, #65535
-	.loc 3 726 0
 	ldr	r3, [r8]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	.loc 3 727 0
-	ldr	r3, .L1793+88
+	ldr	r3, .L1795+88
 	strh	r4, [r3]	@ movhi
-	.loc 3 730 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL2045:
-	ldr	r3, .L1793+92
-	.loc 3 731 0
+	ldr	r3, .L1795+92
 	movs	r2, #0
 	strh	r2, [r3, #2]	@ movhi
-	.loc 3 733 0
 	ldr	r2, [r7]
-	.loc 3 730 0
 	strh	r0, [r3]	@ movhi
-	.loc 3 732 0
 	strh	r4, [r3, #4]	@ movhi
-	.loc 3 733 0
 	strh	r2, [r3, #6]	@ movhi
-	.loc 3 734 0
 	ldr	r2, [r5]
 	str	r2, [r3, #8]
 	adds	r2, r2, #1
 	str	r2, [r5]
-	.loc 3 735 0
 	bl	FtlVpcTblFlush
-.LVL2046:
-	.loc 3 736 0
 	bl	FtlSysBlkInit
-.LVL2047:
-	cbnz	r0, .L1789
-	.loc 3 737 0
-	ldr	r3, .L1793+96
+	cbnz	r0, .L1791
+	ldr	r3, .L1795+96
 	movs	r2, #1
 	str	r2, [r3]
-.L1789:
-	.loc 3 739 0
+.L1791:
 	movs	r0, #0
 	add	sp, sp, #16
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1794:
+.L1796:
 	.align	2
-.L1793:
+.L1795:
 	.word	.LANCHOR4
 	.word	.LANCHOR71
 	.word	.LANCHOR70
@@ -21943,8 +13831,6 @@ ftl_low_format:
 	.word	168778952
 	.word	.LANCHOR6
 	.word	.LANCHOR42
-	.cfi_endproc
-.LFE213:
 	.size	ftl_low_format, .-ftl_low_format
 	.section	.text.sftl_init,"ax",%progbits
 	.align	1
@@ -21955,89 +13841,51 @@ ftl_low_format:
 	.fpu softvfp
 	.type	sftl_init, %function
 sftl_init:
-.LFB214:
-	.loc 3 743 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2048:
 	push	{r4, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 4, -8
-	.cfi_offset 14, -4
-	.loc 3 746 0
 	mov	r3, #-1
-	ldr	r4, .L1801
-	.loc 3 749 0
-	ldr	r1, .L1801+4
-	ldr	r0, .L1801+8
-	.loc 3 746 0
+	ldr	r4, .L1803
+	ldr	r1, .L1803+4
+	ldr	r0, .L1803+8
 	str	r3, [r4]
-	.loc 3 749 0
 	bl	printf
-.LVL2049:
-	.loc 3 750 0
-	ldr	r0, .L1801+12
+	ldr	r0, .L1803+12
 	bl	FtlConstantsInit
-.LVL2050:
-	.loc 3 751 0
 	bl	FtlMemInit
-.LVL2051:
-	.loc 3 752 0
 	bl	FtlVariablesInit
-.LVL2052:
-	.loc 3 753 0
-	ldr	r3, .L1801+16
+	ldr	r3, .L1803+16
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
-.LVL2053:
-.LDL2:
-	.loc 3 756 0
 	bl	FtlLoadBbt
-.LVL2054:
-	cbnz	r0, .L1799
-	.loc 3 767 0
+	cbnz	r0, .L1801
 	bl	FtlSysBlkInit
-.LVL2055:
-	cbnz	r0, .L1799
-	.loc 3 779 0
+	cbnz	r0, .L1801
 	movs	r3, #1
 	str	r3, [r4]
-	.loc 3 783 0
-	ldr	r3, .L1801+20
+	ldr	r3, .L1803+20
 	ldrh	r3, [r3]
 	cmp	r3, #15
-	bhi	.L1799
+	bhi	.L1801
 	movw	r4, #8129
-.L1798:
-.LVL2056:
-.LBB342:
-	.loc 3 786 0 discriminator 3
+.L1800:
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
-.LVL2057:
-	.loc 3 785 0 discriminator 3
 	subs	r4, r4, #1
-.LVL2058:
-	bne	.L1798
-.LVL2059:
-.L1799:
-.LBE342:
-	.loc 3 794 0
+	bne	.L1800
+.L1801:
 	movs	r0, #0
 	pop	{r4, pc}
-.L1802:
+.L1804:
 	.align	2
-.L1801:
+.L1803:
 	.word	.LANCHOR86
 	.word	.LC70
 	.word	.LC71
 	.word	.LANCHOR0
 	.word	.LANCHOR4
 	.word	.LANCHOR48
-	.cfi_endproc
-.LFE214:
 	.size	sftl_init, .-sftl_init
 	.section	.text.ftl_memcmp,"ax",%progbits
 	.align	1
@@ -22048,18 +13896,10 @@ sftl_init:
 	.fpu softvfp
 	.type	ftl_memcmp, %function
 ftl_memcmp:
-.LFB351:
-	.loc 1 252 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL2060:
-	.loc 1 253 0
 	b	memcmp
-.LVL2061:
-	.cfi_endproc
-.LFE351:
 	.size	ftl_memcmp, .-ftl_memcmp
 	.global	ftl_temp_buf
 	.global	g_nand_ops
@@ -23463,209 +15303,209 @@ power_up_flag:
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",%progbits,1
 .LC1:
 	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
-	.section	.rodata.__func__.10046,"a",%progbits
+	.section	.rodata.__func__.10051,"a",%progbits
 	.set	.LANCHOR175,. + 0
-	.type	__func__.10046, %object
-	.size	__func__.10046, 23
-__func__.10046:
+	.type	__func__.10051, %object
+	.size	__func__.10051, 23
+__func__.10051:
 	.ascii	"rk_ftl_garbage_collect\000"
-	.section	.rodata.__func__.10310,"a",%progbits
+	.section	.rodata.__func__.10318,"a",%progbits
 	.set	.LANCHOR104,. + 0
-	.type	__func__.10310, %object
-	.size	__func__.10310, 15
-__func__.10310:
+	.type	__func__.10318, %object
+	.size	__func__.10318, 15
+__func__.10318:
 	.ascii	"FlashReadPages\000"
-	.section	.rodata.__func__.10327,"a",%progbits
+	.section	.rodata.__func__.10335,"a",%progbits
 	.set	.LANCHOR109,. + 0
-	.type	__func__.10327, %object
-	.size	__func__.10327, 15
-__func__.10327:
+	.type	__func__.10335, %object
+	.size	__func__.10335, 15
+__func__.10335:
 	.ascii	"FlashProgPages\000"
-	.section	.rodata.__func__.8802,"a",%progbits
+	.section	.rodata.__func__.8797,"a",%progbits
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-	.2byte	0x80c
-	.byte	0
-	.uleb128 0xa
-	.4byte	0x107
-	.4byte	0x24f
-	.uleb128 0x15
-	.4byte	0xd6
-	.2byte	0x1ff
-	.byte	0
-	.uleb128 0xa
-	.4byte	0x2c
-	.4byte	0x260
-	.uleb128 0x15
-	.4byte	0xd6
-	.2byte	0x1ff
-	.byte	0
-	.uleb128 0x3
-	.4byte	.LASF35
-	.byte	0xf
-	.byte	0x32
-	.4byte	0x1f7
-	.uleb128 0xa
-	.4byte	0x260
-	.4byte	0x276
-	.uleb128 0xb
-	.byte	0
-	.uleb128 0x4
-	.4byte	.LASF36
-	.byte	0xf
-	.byte	0x34
-	.4byte	0x26b
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x4
-	.4byte	.LASF37
-	.uleb128 0xf
-	.4byte	.LASF38
-	.byte	0x8
-	.byte	0x10
-	.byte	0x10
-	.4byte	0x2ad
-	.uleb128 0x10
-	.4byte	.LASF39
-	.byte	0x10
-	.byte	0x11
-	.4byte	0xc0
-	.byte	0
-	.uleb128 0x10
-	.4byte	.LASF30
-	.byte	0x10
-	.byte	0x12
-	.4byte	0xcb
-	.byte	0x4
-	.byte	0
-	.uleb128 0xf
-	.4byte	.LASF40
-	.byte	0x50
-	.byte	0x10
-	.byte	0x15
-	.4byte	0x2de
-	.uleb128 0x16
-	.ascii	"cnt\000"
-	.byte	0x10
-	.byte	0x16
-	.4byte	0x3e
-	.byte	0
-	.uleb128 0x10
-	.4byte	.LASF30
-	.byte	0x10
-	.byte	0x17
-	.4byte	0xcb
-	.byte	0x4
-	.uleb128 0x10
-	.4byte	.LASF41
-	.byte	0x10
-	.byte	0x18
-	.4byte	0x2de
-	.byte	0x8
-	.byte	0
-	.uleb128 0xa
-	.4byte	0x288
-	.4byte	0x2ee
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0x8
-	.byte	0
-	.uleb128 0x17
-	.ascii	"lmb\000"
-	.byte	0xa0
-	.byte	0x10
-	.byte	0x1b
-	.4byte	0x313
-	.uleb128 0x10
-	.4byte	.LASF42
-	.byte	0x10
-	.byte	0x1c
-	.4byte	0x2ad
-	.byte	0
-	.uleb128 0x10
-	.4byte	.LASF43
-	.byte	0x10
-	.byte	0x1d
-	.4byte	0x2ad
-	.byte	0x50
-	.byte	0
-	.uleb128 0x18
-	.ascii	"lmb\000"
-	.byte	0x10
-	.byte	0x20
-	.4byte	0x2ee
-	.uleb128 0x19
-	.byte	0x8
-	.byte	0x11
-	.byte	0x5a
-	.4byte	0x33f
-	.uleb128 0x10
-	.4byte	.LASF33
-	.byte	0x11
-	.byte	0x5b
-	.4byte	0xc0
-	.byte	0
-	.uleb128 0x10
-	.4byte	.LASF30
-	.byte	0x11
-	.byte	0x5c
-	.4byte	0xcb
-	.byte	0x4
-	.byte	0
-	.uleb128 0xf
-	.4byte	.LASF44
-	.byte	0x58
-	.byte	0x11
-	.byte	0x1b
-	.4byte	0x430
-	.uleb128 0x10
-	.4byte	.LASF45
-	.byte	0x11
-	.byte	0x1c
-	.4byte	0x3e
-	.byte	0
-	.uleb128 0x10
-	.4byte	.LASF46
-	.byte	0x11
-	.byte	0x1d
-	.4byte	0xcb
-	.byte	0x4
-	.uleb128 0x10
-	.4byte	.LASF47
-	.byte	0x11
-	.byte	0x1e
-	.4byte	0x3e
-	.byte	0x8
-	.uleb128 0x10
-	.4byte	.LASF48
-	.byte	0x11
-	.byte	0x1f
-	.4byte	0x3e
-	.byte	0xc
-	.uleb128 0x10
-	.4byte	.LASF49
-	.byte	0x11
-	.byte	0x20
-	.4byte	0x3e
-	.byte	0x10
-	.uleb128 0x10
-	.4byte	.LASF50
-	.byte	0x11
-	.byte	0x21
-	.4byte	0x3e
-	.byte	0x14
-	.uleb128 0x10
-	.4byte	.LASF51
-	.byte	0x11
-	.byte	0x22
-	.4byte	0x3e
-	.byte	0x18
-	.uleb128 0x10
-	.4byte	.LASF52
-	.byte	0x11
-	.byte	0x24
-	.4byte	0x3e
-	.byte	0x1c
-	.uleb128 0x10
-	.4byte	.LASF53
-	.byte	0x11
-	.byte	0x25
-	.4byte	0x3e
-	.byte	0x20
-	.uleb128 0x10
-	.4byte	.LASF54
-	.byte	0x11
-	.byte	0x26
-	.4byte	0x3e
-	.byte	0x24
-	.uleb128 0x10
-	.4byte	.LASF55
-	.byte	0x11
-	.byte	0x31
-	.4byte	0x3e
-	.byte	0x28
-	.uleb128 0x10
-	.4byte	.LASF56
-	.byte	0x11
-	.byte	0x32
-	.4byte	0x3e
-	.byte	0x2c
-	.uleb128 0x10
-	.4byte	.LASF57
-	.byte	0x11
-	.byte	0x33
-	.4byte	0x188
-	.byte	0x30
-	.uleb128 0x10
-	.4byte	.LASF58
-	.byte	0x11
-	.byte	0x34
-	.4byte	0x25
-	.byte	0x36
-	.uleb128 0x10
-	.4byte	.LASF59
-	.byte	0x11
-	.byte	0x35
-	.4byte	0x3e
-	.byte	0x38
-	.uleb128 0x10
-	.4byte	.LASF60
-	.byte	0x11
-	.byte	0x36
-	.4byte	0x3e
-	.byte	0x3c
-	.uleb128 0x10
-	.4byte	.LASF61
-	.byte	0x11
-	.byte	0x57
-	.4byte	0x107
-	.byte	0x40
-	.uleb128 0x10
-	.4byte	.LASF62
-	.byte	0x11
-	.byte	0x58
-	.4byte	0x107
-	.byte	0x44
-	.uleb128 0x10
-	.4byte	.LASF63
-	.byte	0x11
-	.byte	0x5d
-	.4byte	0x430
-	.byte	0x48
-	.byte	0
-	.uleb128 0xa
-	.4byte	0x31e
-	.4byte	0x440
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0x1
-	.byte	0
-	.uleb128 0x3
-	.4byte	.LASF64
-	.byte	0x11
-	.byte	0x5f
-	.4byte	0x33f
-	.uleb128 0x4
-	.4byte	.LASF65
-	.byte	0x12
-	.byte	0x13
-	.4byte	0x107
-	.uleb128 0x4
-	.4byte	.LASF66
-	.byte	0x12
-	.byte	0x14
-	.4byte	0x107
-	.uleb128 0x4
-	.4byte	.LASF67
-	.byte	0x12
-	.byte	0x15
-	.4byte	0x107
-	.uleb128 0x4
-	.4byte	.LASF68
-	.byte	0x12
-	.byte	0x16
-	.4byte	0x107
-	.uleb128 0x4
-	.4byte	.LASF69
-	.byte	0x12
-	.byte	0x17
-	.4byte	0x107
-	.uleb128 0x4
-	.4byte	.LASF70
-	.byte	0x12
-	.byte	0x18
-	.4byte	0x107
-	.uleb128 0x4
-	.4byte	.LASF71
-	.byte	0x12
-	.byte	0x19
-	.4byte	0x107
-	.uleb128 0xf
-	.4byte	.LASF72
-	.byte	0x28
-	.byte	0x13
-	.byte	0x39
-	.4byte	0x51d
-	.uleb128 0x10
-	.4byte	.LASF73
-	.byte	0x13
-	.byte	0x3a
-	.4byte	0x52e
-	.byte	0
-	.uleb128 0x10
-	.4byte	.LASF74
-	.byte	0x13
-	.byte	0x3b
-	.4byte	0x52e
-	.byte	0x4
-	.uleb128 0x10
-	.4byte	.LASF75
-	.byte	0x13
-	.byte	0x3c
-	.4byte	0x52e
-	.byte	0x8
-	.uleb128 0x10
-	.4byte	.LASF76
-	.byte	0x13
-	.byte	0x3d
-	.4byte	0x52e
-	.byte	0xc
-	.uleb128 0x10
-	.4byte	.LASF77
-	.byte	0x13
-	.byte	0x3e
-	.4byte	0x52e
-	.byte	0x10
-	.uleb128 0x10
-	.4byte	.LASF78
-	.byte	0x13
-	.byte	0x3f
-	.4byte	0x52e
-	.byte	0x14
-	.uleb128 0x10
-	.4byte	.LASF79
-	.byte	0x13
-	.byte	0x40
-	.4byte	0x52e
-	.byte	0x18
-	.uleb128 0x10
-	.4byte	.LASF80
-	.byte	0x13
-	.byte	0x43
-	.4byte	0x52e
-	.byte	0x1c
-	.uleb128 0x10
-	.4byte	.LASF81
-	.byte	0x13
-	.byte	0x46
-	.4byte	0x52e
-	.byte	0x20
-	.uleb128 0x10
-	.4byte	.LASF82
-	.byte	0x13
-	.byte	0x49
-	.4byte	0x52e
-	.byte	0x24
-	.byte	0
-	.uleb128 0x4
-	.4byte	.LASF83
-	.byte	0x14
-	.byte	0xf
-	.4byte	0x528
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x498
-	.uleb128 0x3
-	.4byte	.LASF84
-	.byte	0x14
-	.byte	0x12
-	.4byte	0x11d
-	.uleb128 0x1a
-	.4byte	.LASF85
-	.byte	0x40
-	.byte	0x15
-	.2byte	0x133
-	.4byte	0x5e3
-	.uleb128 0x1b
-	.4byte	.LASF86
-	.byte	0x15
-	.2byte	0x134
-	.4byte	0x11d
-	.byte	0
-	.uleb128 0x1b
-	.4byte	.LASF87
-	.byte	0x15
-	.2byte	0x135
-	.4byte	0x11d
-	.byte	0x4
-	.uleb128 0x1b
-	.4byte	.LASF88
-	.byte	0x15
-	.2byte	0x136
-	.4byte	0x11d
-	.byte	0x8
-	.uleb128 0x1b
-	.4byte	.LASF89
-	.byte	0x15
-	.2byte	0x137
-	.4byte	0x11d
-	.byte	0xc
-	.uleb128 0x1b
-	.4byte	.LASF90
-	.byte	0x15
-	.2byte	0x138
-	.4byte	0x11d
-	.byte	0x10
-	.uleb128 0x1b
-	.4byte	.LASF91
-	.byte	0x15
-	.2byte	0x139
-	.4byte	0x11d
-	.byte	0x14
-	.uleb128 0x1b
-	.4byte	.LASF92
-	.byte	0x15
-	.2byte	0x13a
-	.4byte	0x11d
-	.byte	0x18
-	.uleb128 0x1b
-	.4byte	.LASF93
-	.byte	0x15
-	.2byte	0x13b
-	.4byte	0x112
-	.byte	0x1c
-	.uleb128 0x1b
-	.4byte	.LASF94
-	.byte	0x15
-	.2byte	0x13c
-	.4byte	0x112
-	.byte	0x1d
-	.uleb128 0x1b
-	.4byte	.LASF95
-	.byte	0x15
-	.2byte	0x13d
-	.4byte	0x112
-	.byte	0x1e
-	.uleb128 0x1b
-	.4byte	.LASF96
-	.byte	0x15
-	.2byte	0x13e
-	.4byte	0x112
-	.byte	0x1f
-	.uleb128 0x1b
-	.4byte	.LASF97
-	.byte	0x15
-	.2byte	0x13f
-	.4byte	0x5e3
-	.byte	0x20
-	.byte	0
-	.uleb128 0xa
-	.4byte	0x112
-	.4byte	0x5f3
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0x1f
-	.byte	0
-	.uleb128 0x1c
-	.4byte	.LASF98
-	.byte	0x15
-	.2byte	0x140
-	.4byte	0x539
-	.uleb128 0x1a
-	.4byte	.LASF99
-	.byte	0x18
-	.byte	0x15
-	.2byte	0x142
-	.4byte	0x681
-	.uleb128 0x1b
-	.4byte	.LASF33
-	.byte	0x15
-	.2byte	0x143
-	.4byte	0x107
-	.byte	0
-	.uleb128 0x1d
-	.ascii	"end\000"
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-	.2byte	0x143
-	.4byte	0x107
-	.byte	0x4
-	.uleb128 0x1b
-	.4byte	.LASF100
-	.byte	0x15
-	.2byte	0x144
-	.4byte	0x107
-	.byte	0x8
-	.uleb128 0x1b
-	.4byte	.LASF101
-	.byte	0x15
-	.2byte	0x144
-	.4byte	0x107
-	.byte	0xc
-	.uleb128 0x1b
-	.4byte	.LASF102
-	.byte	0x15
-	.2byte	0x145
-	.4byte	0x107
-	.byte	0x10
-	.uleb128 0x1b
-	.4byte	.LASF103
-	.byte	0x15
-	.2byte	0x146
-	.4byte	0x112
-	.byte	0x14
-	.uleb128 0x1b
-	.4byte	.LASF104
-	.byte	0x15
-	.2byte	0x146
-	.4byte	0x112
-	.byte	0x15
-	.uleb128 0x1d
-	.ascii	"os\000"
-	.byte	0x15
-	.2byte	0x146
-	.4byte	0x112
-	.byte	0x16
-	.uleb128 0x1b
-	.4byte	.LASF105
-	.byte	0x15
-	.2byte	0x147
-	.4byte	0x112
-	.byte	0x17
-	.byte	0
-	.uleb128 0x1c
-	.4byte	.LASF106
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-	.2byte	0x148
-	.4byte	0x5ff
-	.uleb128 0x1e
-	.4byte	.LASF107
-	.2byte	0x164
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-	.2byte	0x14e
-	.4byte	0x820
-	.uleb128 0x1b
-	.4byte	.LASF108
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-	.2byte	0x154
-	.4byte	0x820
-	.byte	0
-	.uleb128 0x1b
-	.4byte	.LASF109
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-	.4byte	0x5f3
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-	.uleb128 0x1b
-	.4byte	.LASF110
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-	.2byte	0x156
-	.4byte	0x107
-	.byte	0x44
-	.uleb128 0x1b
-	.4byte	.LASF111
-	.byte	0x15
-	.2byte	0x159
-	.4byte	0xdd
-	.byte	0x48
-	.uleb128 0x1b
-	.4byte	.LASF112
-	.byte	0x15
-	.2byte	0x15b
-	.4byte	0x128
-	.byte	0x4c
-	.uleb128 0x1b
-	.4byte	.LASF113
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-	.2byte	0x15c
-	.4byte	0xdd
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-	.uleb128 0x1b
-	.4byte	.LASF114
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-	.2byte	0x15d
-	.4byte	0x50
-	.byte	0x54
-	.uleb128 0x1b
-	.4byte	.LASF115
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-	.2byte	0x15f
-	.4byte	0x128
-	.byte	0x58
-	.uleb128 0x1b
-	.4byte	.LASF116
-	.byte	0x15
-	.2byte	0x160
-	.4byte	0xdd
-	.byte	0x5c
-	.uleb128 0x1b
-	.4byte	.LASF117
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-	.4byte	0x50
-	.byte	0x60
-	.uleb128 0x1b
-	.4byte	.LASF118
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-	.2byte	0x163
-	.4byte	0x128
-	.byte	0x64
-	.uleb128 0x1b
-	.4byte	.LASF119
-	.byte	0x15
-	.2byte	0x164
-	.4byte	0xdd
-	.byte	0x68
-	.uleb128 0x1b
-	.4byte	.LASF120
-	.byte	0x15
-	.2byte	0x165
-	.4byte	0x50
-	.byte	0x6c
-	.uleb128 0x1b
-	.4byte	.LASF121
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-	.4byte	0x128
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-	.uleb128 0x1b
-	.4byte	.LASF122
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-	.2byte	0x168
-	.4byte	0xdd
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-	.uleb128 0x1b
-	.4byte	.LASF123
-	.byte	0x15
-	.2byte	0x169
-	.4byte	0x50
-	.byte	0x78
-	.uleb128 0x1d
-	.ascii	"os\000"
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-	.4byte	0x681
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-	.uleb128 0x1d
-	.ascii	"ep\000"
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-	.uleb128 0x1b
-	.4byte	.LASF124
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-	.uleb128 0x1b
-	.4byte	.LASF125
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-	.4byte	0x107
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-	.uleb128 0x1b
-	.4byte	.LASF126
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-	.4byte	0xf6
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-	.uleb128 0x1b
-	.4byte	.LASF127
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-	.uleb128 0x1b
-	.4byte	.LASF128
-	.byte	0x15
-	.2byte	0x175
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-	.byte	0xa8
-	.uleb128 0x1b
-	.4byte	.LASF129
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-	.uleb128 0x1b
-	.4byte	.LASF130
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-	.uleb128 0x1b
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-	.byte	0xb4
-	.uleb128 0x1d
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-	.4byte	0x826
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-	.uleb128 0x1b
-	.4byte	.LASF132
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-	.4byte	0x50
-	.byte	0xbc
-	.uleb128 0x1b
-	.4byte	.LASF133
-	.byte	0x15
-	.2byte	0x189
-	.4byte	0x50
-	.byte	0xc0
-	.uleb128 0x1d
-	.ascii	"lmb\000"
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-	.uleb128 0x1c
-	.4byte	.LASF134
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-	.4byte	0x68d
-	.uleb128 0xc
-	.4byte	.LASF135
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-	.uleb128 0x1f
-	.4byte	.LASF263
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-	.4byte	0x50
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-	.byte	0xe
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-	.uleb128 0x20
-	.4byte	.LASF136
-	.byte	0
-	.uleb128 0x20
-	.4byte	.LASF137
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-	.uleb128 0x20
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-	.uleb128 0x20
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-	.uleb128 0x20
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-	.byte	0xf
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-	.uleb128 0x20
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-	.uleb128 0x20
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-	.uleb128 0x20
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-	.uleb128 0x20
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-	.byte	0x16
-	.uleb128 0x20
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-	.uleb128 0x20
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-	.uleb128 0x20
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-	.uleb128 0x20
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-	.uleb128 0x20
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-	.uleb128 0x20
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-	.uleb128 0x20
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-	.uleb128 0x20
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-	.uleb128 0x20
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-	.uleb128 0x20
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-	.uleb128 0x20
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-	.uleb128 0x20
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-	.uleb128 0x20
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-	.uleb128 0x20
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-	.byte	0x3d
-	.uleb128 0x20
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-	.uleb128 0x20
-	.4byte	.LASF199
-	.byte	0x3f
-	.uleb128 0x20
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-	.byte	0x40
-	.uleb128 0x20
-	.4byte	.LASF201
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-	.uleb128 0x20
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-	.uleb128 0x20
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-	.uleb128 0x20
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-	.byte	0x44
-	.uleb128 0x20
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-	.uleb128 0x20
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-	.uleb128 0x20
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-	.uleb128 0x20
-	.4byte	.LASF208
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-	.uleb128 0x20
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-	.uleb128 0x20
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-	.uleb128 0x20
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-	.byte	0x4f
-	.uleb128 0x20
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-	.uleb128 0xe
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-	.uleb128 0xb
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-	.uleb128 0x10
-	.4byte	.LASF291
-	.byte	0x19
-	.byte	0x37
-	.4byte	0x9f
-	.byte	0x14
-	.uleb128 0x10
-	.4byte	.LASF292
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-	.4byte	0xe35
-	.uleb128 0xf
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-	.uleb128 0x10
-	.4byte	.LASF294
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-	.byte	0x3c
-	.4byte	0xf2e
-	.byte	0
-	.uleb128 0x10
-	.4byte	.LASF295
-	.byte	0x19
-	.byte	0x3d
-	.4byte	0xf48
-	.byte	0x4
-	.uleb128 0x10
-	.4byte	.LASF296
-	.byte	0x19
-	.byte	0x3e
-	.4byte	0xf6c
-	.byte	0x8
-	.uleb128 0x10
-	.4byte	.LASF297
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-	.uleb128 0x11
-	.4byte	0xaa
-	.4byte	0xf28
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-	.4byte	0xf28
-	.uleb128 0x12
-	.4byte	0xb5
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-	.uleb128 0x8
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-	.uleb128 0x8
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-	.4byte	0x90
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-	.4byte	0xb5
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-	.uleb128 0x12
-	.4byte	0x90
-	.uleb128 0x12
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-	.uleb128 0x12
-	.4byte	0xe2f
-	.uleb128 0x12
-	.4byte	0xe2f
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-	.uleb128 0x10
-	.4byte	.LASF78
-	.byte	0x1a
-	.byte	0x31
-	.4byte	0xdc5
-	.byte	0x8
-	.uleb128 0x10
-	.4byte	.LASF301
-	.byte	0x1a
-	.byte	0x32
-	.4byte	0xfd2
-	.byte	0xc
-	.uleb128 0x10
-	.4byte	.LASF302
-	.byte	0x1a
-	.byte	0x33
-	.4byte	0xfe2
-	.byte	0x1c
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-	.uleb128 0xa
-	.4byte	0xff2
-	.4byte	0xff2
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0x7
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-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0xdc5
-	.uleb128 0xf
-	.4byte	.LASF303
-	.byte	0xc
-	.byte	0x1a
-	.byte	0x3f
-	.4byte	0x1040
-	.uleb128 0x16
-	.ascii	"id\000"
-	.byte	0x1a
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-	.4byte	0xdba
-	.byte	0
-	.uleb128 0x10
-	.4byte	.LASF299
-	.byte	0x1a
-	.byte	0x42
-	.4byte	0xdba
-	.byte	0x2
-	.uleb128 0x10
-	.4byte	.LASF300
-	.byte	0x1a
-	.byte	0x43
-	.4byte	0xdba
-	.byte	0x4
-	.uleb128 0x10
-	.4byte	.LASF304
-	.byte	0x1a
-	.byte	0x44
-	.4byte	0xdba
-	.byte	0x6
-	.uleb128 0x10
-	.4byte	.LASF78
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-	.4byte	0xdc5
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-	.byte	0
-	.uleb128 0xf
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-	.byte	0x28
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-	.byte	0x48
-	.4byte	0x10e9
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-	.4byte	.LASF236
-	.byte	0x1a
-	.byte	0x4a
-	.4byte	0xdba
-	.byte	0
-	.uleb128 0x10
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-	.4byte	0xdba
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-	.4byte	.LASF306
-	.byte	0x1a
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-	.4byte	0xdba
-	.byte	0x4
-	.uleb128 0x10
-	.4byte	.LASF307
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-	.uleb128 0x10
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-	.byte	0x1a
-	.byte	0x50
-	.4byte	0xdba
-	.byte	0x8
-	.uleb128 0x10
-	.4byte	.LASF309
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-	.uleb128 0x10
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-	.byte	0x53
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-	.uleb128 0x10
-	.4byte	.LASF311
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-	.4byte	0xff2
-	.byte	0x10
-	.uleb128 0x10
-	.4byte	.LASF312
-	.byte	0x1a
-	.byte	0x55
-	.4byte	0x10e9
-	.byte	0x14
-	.uleb128 0x10
-	.4byte	.LASF313
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-	.byte	0x56
-	.4byte	0xff2
-	.byte	0x18
-	.uleb128 0x10
-	.4byte	.LASF78
-	.byte	0x1a
-	.byte	0x58
-	.4byte	0xdc5
-	.byte	0x1c
-	.uleb128 0x10
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-	.byte	0x59
-	.4byte	0xdc5
-	.byte	0x20
-	.uleb128 0x10
-	.4byte	.LASF315
-	.byte	0x1a
-	.byte	0x5a
-	.4byte	0xdc5
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-	.byte	0x4
-	.4byte	0xdba
-	.uleb128 0xf
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-	.byte	0xc
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-	.4byte	0x112c
-	.uleb128 0x10
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-	.4byte	.LASF78
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-	.uleb128 0x10
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-	.uleb128 0xe
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-	.uleb128 0x16
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-	.byte	0x1a
-	.byte	0xca
-	.4byte	0xdc5
-	.byte	0x20
-	.uleb128 0x10
-	.4byte	.LASF358
-	.byte	0x1a
-	.byte	0xcb
-	.4byte	0xdc5
-	.byte	0x24
-	.uleb128 0x10
-	.4byte	.LASF345
-	.byte	0x1a
-	.byte	0xcd
-	.4byte	0xdc5
-	.byte	0x28
-	.uleb128 0x10
-	.4byte	.LASF359
-	.byte	0x1a
-	.byte	0xce
-	.4byte	0xdc5
-	.byte	0x2c
-	.uleb128 0x10
-	.4byte	.LASF360
-	.byte	0x1a
-	.byte	0xcf
-	.4byte	0xdc5
-	.byte	0x30
-	.uleb128 0x10
-	.4byte	.LASF361
-	.byte	0x1a
-	.byte	0xd0
-	.4byte	0xdc5
-	.byte	0x34
-	.uleb128 0x10
-	.4byte	.LASF362
-	.byte	0x1a
-	.byte	0xd2
-	.4byte	0xdc5
-	.byte	0x38
-	.uleb128 0x10
-	.4byte	.LASF363
-	.byte	0x1a
-	.byte	0xd3
-	.4byte	0xdc5
-	.byte	0x3c
-	.uleb128 0x10
-	.4byte	.LASF364
-	.byte	0x1a
-	.byte	0xd4
-	.4byte	0xdc5
-	.byte	0x40
-	.uleb128 0x10
-	.4byte	.LASF365
-	.byte	0x1a
-	.byte	0xd5
-	.4byte	0xdc5
-	.byte	0x44
-	.uleb128 0x10
-	.4byte	.LASF366
-	.byte	0x1a
-	.byte	0xd7
-	.4byte	0xdc5
-	.byte	0x48
-	.uleb128 0x10
-	.4byte	.LASF367
-	.byte	0x1a
-	.byte	0xd8
-	.4byte	0xdc5
-	.byte	0x4c
-	.uleb128 0x10
-	.4byte	.LASF368
-	.byte	0x1a
-	.byte	0xd9
-	.4byte	0xdc5
-	.byte	0x50
-	.uleb128 0x10
-	.4byte	.LASF369
-	.byte	0x1a
-	.byte	0xda
-	.4byte	0xdc5
-	.byte	0x54
-	.uleb128 0x10
-	.4byte	.LASF370
-	.byte	0x1a
-	.byte	0xdc
-	.4byte	0xdc5
-	.byte	0x58
-	.uleb128 0x10
-	.4byte	.LASF371
-	.byte	0x1a
-	.byte	0xdd
-	.4byte	0xdc5
-	.byte	0x5c
-	.uleb128 0x10
-	.4byte	.LASF372
-	.byte	0x1a
-	.byte	0xde
-	.4byte	0xdc5
-	.byte	0x60
-	.uleb128 0x10
-	.4byte	.LASF323
-	.byte	0x1a
-	.byte	0xe0
-	.4byte	0x1554
-	.byte	0x64
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xdc5
-	.4byte	0x1564
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0x66
-	.byte	0
-	.uleb128 0xf
-	.4byte	.LASF373
-	.byte	0x6
-	.byte	0x1a
-	.byte	0xe4
-	.4byte	0x1595
-	.uleb128 0x10
-	.4byte	.LASF235
-	.byte	0x1a
-	.byte	0xe6
-	.4byte	0xdba
-	.byte	0
-	.uleb128 0x10
-	.4byte	.LASF374
-	.byte	0x1a
-	.byte	0xe7
-	.4byte	0xdba
-	.byte	0x2
-	.uleb128 0x10
-	.4byte	.LASF375
-	.byte	0x1a
-	.byte	0xe8
-	.4byte	0xdba
-	.byte	0x4
-	.byte	0
-	.uleb128 0x25
-	.4byte	.LASF376
-	.2byte	0x808
-	.byte	0x1a
-	.byte	0xeb
-	.4byte	0x15df
-	.uleb128 0x16
-	.ascii	"max\000"
-	.byte	0x1a
-	.byte	0xed
-	.4byte	0xdba
-	.byte	0
-	.uleb128 0x10
-	.4byte	.LASF377
-	.byte	0x1a
-	.byte	0xee
-	.4byte	0xdba
-	.byte	0x2
-	.uleb128 0x10
-	.4byte	.LASF378
-	.byte	0x1a
-	.byte	0xef
-	.4byte	0xdba
-	.byte	0x4
-	.uleb128 0x10
-	.4byte	.LASF325
-	.byte	0x1a
-	.byte	0xf0
-	.4byte	0xdba
-	.byte	0x6
-	.uleb128 0x16
-	.ascii	"arr\000"
-	.byte	0x1a
-	.byte	0xf1
-	.4byte	0x15df
-	.byte	0x8
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xdba
-	.4byte	0x15f0
-	.uleb128 0x15
-	.4byte	0xd6
-	.2byte	0x3ff
-	.byte	0
-	.uleb128 0xf
-	.4byte	.LASF379
-	.byte	0x30
-	.byte	0x1a
-	.byte	0xf5
-	.4byte	0x1682
-	.uleb128 0x16
-	.ascii	"id\000"
-	.byte	0x1a
-	.byte	0xf7
-	.4byte	0xdba
-	.byte	0
-	.uleb128 0x10
-	.4byte	.LASF380
-	.byte	0x1a
-	.byte	0xf8
-	.4byte	0xdba
-	.byte	0x2
-	.uleb128 0x10
-	.4byte	.LASF381
-	.byte	0x1a
-	.byte	0xf9
-	.4byte	0xdba
-	.byte	0x4
-	.uleb128 0x10
-	.4byte	.LASF382
-	.byte	0x1a
-	.byte	0xfa
-	.4byte	0xdaf
-	.byte	0x6
-	.uleb128 0x10
-	.4byte	.LASF383
-	.byte	0x1a
-	.byte	0xfb
-	.4byte	0xdaf
-	.byte	0x7
-	.uleb128 0x10
-	.4byte	.LASF384
-	.byte	0x1a
-	.byte	0xfc
-	.4byte	0xdaf
-	.byte	0x8
-	.uleb128 0x10
-	.4byte	.LASF385
-	.byte	0x1a
-	.byte	0xfd
-	.4byte	0xdaf
-	.byte	0x9
-	.uleb128 0x10
-	.4byte	.LASF386
-	.byte	0x1a
-	.byte	0xfe
-	.4byte	0xdaf
-	.byte	0xa
-	.uleb128 0x10
-	.4byte	.LASF387
-	.byte	0x1a
-	.byte	0xff
-	.4byte	0xdaf
-	.byte	0xb
-	.uleb128 0x1b
-	.4byte	.LASF78
-	.byte	0x1a
-	.2byte	0x100
-	.4byte	0xdc5
-	.byte	0xc
-	.uleb128 0x1b
-	.4byte	.LASF388
-	.byte	0x1a
-	.2byte	0x101
-	.4byte	0x1682
-	.byte	0x10
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xdba
-	.4byte	0x1692
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0xf
-	.byte	0
-	.uleb128 0x1a
-	.4byte	.LASF389
-	.byte	0xc
-	.byte	0x1a
-	.2byte	0x105
-	.4byte	0x16c7
-	.uleb128 0x1b
-	.4byte	.LASF390
-	.byte	0x1a
-	.2byte	0x107
-	.4byte	0xdc5
-	.byte	0
-	.uleb128 0x1b
-	.4byte	.LASF391
-	.byte	0x1a
-	.2byte	0x108
-	.4byte	0xdc5
-	.byte	0x4
-	.uleb128 0x1d
-	.ascii	"lpa\000"
-	.byte	0x1a
-	.2byte	0x109
-	.4byte	0xdc5
-	.byte	0x8
-	.byte	0
-	.uleb128 0x1a
-	.4byte	.LASF392
-	.byte	0xc
-	.byte	0x1a
-	.2byte	0x10c
-	.4byte	0x16fc
-	.uleb128 0x1b
-	.4byte	.LASF278
-	.byte	0x1a
-	.2byte	0x10e
-	.4byte	0xff2
-	.byte	0
-	.uleb128 0x1b
-	.4byte	.LASF279
-	.byte	0x1a
-	.2byte	0x10f
-	.4byte	0xff2
-	.byte	0x4
-	.uleb128 0x1b
-	.4byte	.LASF393
-	.byte	0x1a
-	.2byte	0x110
-	.4byte	0xdc5
-	.byte	0x8
-	.byte	0
-	.uleb128 0x26
-	.4byte	.LASF394
-	.byte	0x1b
-	.byte	0x12
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_type
-	.uleb128 0x26
-	.4byte	.LASF395
-	.byte	0x1b
-	.byte	0x13
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_die_num
-	.uleb128 0x26
-	.4byte	.LASF396
-	.byte	0x1b
-	.byte	0x14
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_planes_per_die
-	.uleb128 0x26
-	.4byte	.LASF397
-	.byte	0x1b
-	.byte	0x15
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_blks_per_die
-	.uleb128 0x26
-	.4byte	.LASF398
-	.byte	0x1b
-	.byte	0x16
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_blks_per_die_shift
-	.uleb128 0x26
-	.4byte	.LASF399
-	.byte	0x1b
-	.byte	0x17
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_planes_num
-	.uleb128 0x26
-	.4byte	.LASF400
-	.byte	0x1b
-	.byte	0x18
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_blk_pre_plane
-	.uleb128 0x26
-	.4byte	.LASF401
-	.byte	0x1b
-	.byte	0x19
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_ext_blk_pre_plane
-	.uleb128 0x26
-	.4byte	.LASF402
-	.byte	0x1b
-	.byte	0x1a
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_bbm_buf_size
-	.uleb128 0x26
-	.4byte	.LASF403
-	.byte	0x1b
-	.byte	0x1c
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_page_pre_blk
-	.uleb128 0x26
-	.4byte	.LASF404
-	.byte	0x1b
-	.byte	0x1d
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_page_pre_slc_blk
-	.uleb128 0x26
-	.4byte	.LASF405
-	.byte	0x1b
-	.byte	0x1e
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_page_pre_super_blk
-	.uleb128 0x26
-	.4byte	.LASF406
-	.byte	0x1b
-	.byte	0x1f
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_sec_pre_page
-	.uleb128 0x26
-	.4byte	.LASF407
-	.byte	0x1b
-	.byte	0x20
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_sec_pre_page_shift
-	.uleb128 0x26
-	.4byte	.LASF408
-	.byte	0x1b
-	.byte	0x24
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_byte_pre_page
-	.uleb128 0x26
-	.4byte	.LASF409
-	.byte	0x1b
-	.byte	0x25
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_byte_pre_oob
-	.uleb128 0x26
-	.4byte	.LASF410
-	.byte	0x1b
-	.byte	0x26
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_reserved_blks
-	.uleb128 0x26
-	.4byte	.LASF411
-	.byte	0x1b
-	.byte	0x27
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_totle_phy_blks
-	.uleb128 0x26
-	.4byte	.LASF412
-	.byte	0x1b
-	.byte	0x29
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_map_region_num
-	.uleb128 0x26
-	.4byte	.LASF413
-	.byte	0x1b
-	.byte	0x2a
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_l2pmap_ram_region_num
-	.uleb128 0x26
-	.4byte	.LASF414
-	.byte	0x1b
-	.byte	0x2c
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_vendor_region_num
-	.uleb128 0x26
-	.4byte	.LASF415
-	.byte	0x1b
-	.byte	0x2e
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_map_blks_per_plane
-	.uleb128 0x26
-	.4byte	.LASF416
-	.byte	0x1b
-	.byte	0x2f
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_max_map_blks
-	.uleb128 0x26
-	.4byte	.LASF417
-	.byte	0x1b
-	.byte	0x30
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_max_vendor_blks
-	.uleb128 0x26
-	.4byte	.LASF418
-	.byte	0x1b
-	.byte	0x31
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_vendor_part_size
-	.uleb128 0x26
-	.4byte	.LASF419
-	.byte	0x1b
-	.byte	0x32
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_sys_blks_per_plane
-	.uleb128 0x26
-	.4byte	.LASF420
-	.byte	0x1b
-	.byte	0x33
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_init_sys_blks_per_plane
-	.uleb128 0x26
-	.4byte	.LASF421
-	.byte	0x1b
-	.byte	0x34
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_max_sys_blks
-	.uleb128 0x26
-	.4byte	.LASF422
-	.byte	0x1b
-	.byte	0x35
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_data_blks_per_plane
-	.uleb128 0x26
-	.4byte	.LASF423
-	.byte	0x1b
-	.byte	0x36
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_data_op_blks_per_plane
-	.uleb128 0x26
-	.4byte	.LASF424
-	.byte	0x1b
-	.byte	0x37
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_max_data_blks
-	.uleb128 0x26
-	.4byte	.LASF425
-	.byte	0x1b
-	.byte	0x38
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	ftl_gc_temp_power_lost_recovery_flag
-	.uleb128 0x26
-	.4byte	.LASF426
-	.byte	0x1b
-	.byte	0x3a
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_GlobalSysVersion
-	.uleb128 0x26
-	.4byte	.LASF427
-	.byte	0x1b
-	.byte	0x3b
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_GlobalDataVersion
-	.uleb128 0x26
-	.4byte	.LASF428
-	.byte	0x1b
-	.byte	0x3c
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_MaxLbaSector
-	.uleb128 0x26
-	.4byte	.LASF429
-	.byte	0x1b
-	.byte	0x3d
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_MaxLpn
-	.uleb128 0x26
-	.4byte	.LASF430
-	.byte	0x1b
-	.byte	0x3e
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_VaildLpn
-	.uleb128 0x26
-	.4byte	.LASF431
-	.byte	0x1b
-	.byte	0x3f
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_MaxLbn
-	.uleb128 0x26
-	.4byte	.LASF432
-	.byte	0x1b
-	.byte	0x41
-	.4byte	0xf72
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gBbtInfo
-	.uleb128 0x26
-	.4byte	.LASF433
-	.byte	0x1b
-	.byte	0x42
-	.4byte	0xff8
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gSysInfo
-	.uleb128 0x26
-	.4byte	.LASF434
-	.byte	0x1b
-	.byte	0x43
-	.4byte	0x1595
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gSysFreeQueue
-	.uleb128 0x26
-	.4byte	.LASF435
-	.byte	0x1b
-	.byte	0x44
-	.4byte	0x1040
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gL2pMapInfo
-	.uleb128 0x26
-	.4byte	.LASF436
-	.byte	0x1b
-	.byte	0x45
-	.4byte	0x1040
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gVendorBlkInfo
-	.uleb128 0x26
-	.4byte	.LASF437
-	.byte	0x1b
-	.byte	0x46
-	.4byte	0xde6
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	req_sys
-	.uleb128 0x26
-	.4byte	.LASF438
-	.byte	0x1b
-	.byte	0x47
-	.4byte	0x19f9
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	req_read
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0xde6
-	.uleb128 0x26
-	.4byte	.LASF439
-	.byte	0x1b
-	.byte	0x48
-	.4byte	0x19f9
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	req_prgm
-	.uleb128 0x26
-	.4byte	.LASF440
-	.byte	0x1b
-	.byte	0x49
-	.4byte	0x19f9
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	req_erase
-	.uleb128 0x26
-	.4byte	.LASF441
-	.byte	0x1b
-	.byte	0x4a
-	.4byte	0x19f9
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	req_gc
-	.uleb128 0x26
-	.4byte	.LASF442
-	.byte	0x1b
-	.byte	0x4b
-	.4byte	0x19f9
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	req_gc_dst
-	.uleb128 0xa
-	.4byte	0xdaf
-	.4byte	0x1a53
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0x1f
-	.byte	0
-	.uleb128 0x26
-	.4byte	.LASF443
-	.byte	0x1b
-	.byte	0x4d
-	.4byte	0x1a43
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_plane_order_table
-	.uleb128 0x26
-	.4byte	.LASF444
-	.byte	0x1b
-	.byte	0x4f
-	.4byte	0xff2
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_sys_data_buf
-	.uleb128 0x26
-	.4byte	.LASF445
-	.byte	0x1b
-	.byte	0x50
-	.4byte	0xff2
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_sys_data_buf_1
-	.uleb128 0x26
-	.4byte	.LASF446
-	.byte	0x1b
-	.byte	0x51
-	.4byte	0xff2
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_vendor_data_buf
-	.uleb128 0x26
-	.4byte	.LASF447
-	.byte	0x1b
-	.byte	0x52
-	.4byte	0xff2
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_sys_spare_buf
-	.uleb128 0x26
-	.4byte	.LASF448
-	.byte	0x1b
-	.byte	0x53
-	.4byte	0xff2
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_io_data_buf_0
-	.uleb128 0x26
-	.4byte	.LASF449
-	.byte	0x1b
-	.byte	0x54
-	.4byte	0xff2
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_io_data_buf_1
-	.uleb128 0x26
-	.4byte	.LASF450
-	.byte	0x1b
-	.byte	0x55
-	.4byte	0xff2
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_io_spare_buf
-	.uleb128 0x26
-	.4byte	.LASF451
-	.byte	0x1b
-	.byte	0x56
-	.4byte	0xff2
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_gc_spare_buf
-	.uleb128 0x26
-	.4byte	.LASF452
-	.byte	0x1b
-	.byte	0x57
-	.4byte	0xff2
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_gc_data_buf
-	.uleb128 0x26
-	.4byte	.LASF453
-	.byte	0x1b
-	.byte	0x58
-	.4byte	0x1b0e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gp_gc_page_buf_info
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x16c7
-	.uleb128 0x26
-	.4byte	.LASF454
-	.byte	0x1b
-	.byte	0x59
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_gc_page_buf_num
-	.uleb128 0x26
-	.4byte	.LASF455
-	.byte	0x1b
-	.byte	0x5a
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_num_req
-	.uleb128 0x26
-	.4byte	.LASF456
-	.byte	0x1b
-	.byte	0x5b
-	.4byte	0x1b47
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gp_ect_tbl_info
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x112c
-	.uleb128 0x26
-	.4byte	.LASF457
-	.byte	0x1b
-	.byte	0x5c
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_ect_tbl_info_size
-	.uleb128 0x26
-	.4byte	.LASF458
-	.byte	0x1b
-	.byte	0x5d
-	.4byte	0x10e9
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_erase_count_table
-	.uleb128 0x26
-	.4byte	.LASF459
-	.byte	0x1b
-	.byte	0x5f
-	.4byte	0x10e9
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_swl_mul_table
-	.uleb128 0x26
-	.4byte	.LASF460
-	.byte	0x1b
-	.byte	0x60
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_swl_count
-	.uleb128 0x26
-	.4byte	.LASF461
-	.byte	0x1b
-	.byte	0x61
-	.4byte	0x10e9
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_valid_page_count_table
-	.uleb128 0x26
-	.4byte	.LASF462
-	.byte	0x1b
-	.byte	0x62
-	.4byte	0x10e9
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_valid_page_count_check_table
-	.uleb128 0x26
-	.4byte	.LASF463
-	.byte	0x1b
-	.byte	0x63
-	.4byte	0xff2
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_blk_mode_table
-	.uleb128 0x26
-	.4byte	.LASF464
-	.byte	0x1b
-	.byte	0x65
-	.4byte	0x10e9
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_map_block_table
-	.uleb128 0x26
-	.4byte	.LASF465
-	.byte	0x1b
-	.byte	0x66
-	.4byte	0x10e9
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_map_block_valid_page_count
-	.uleb128 0x26
-	.4byte	.LASF466
-	.byte	0x1b
-	.byte	0x67
-	.4byte	0xff2
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_map_block_ver_table
-	.uleb128 0x26
-	.4byte	.LASF467
-	.byte	0x1b
-	.byte	0x68
-	.4byte	0xff2
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_map_region_ppn_table
-	.uleb128 0x26
-	.4byte	.LASF468
-	.byte	0x1b
-	.byte	0x69
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_map_block
-	.uleb128 0x26
-	.4byte	.LASF469
-	.byte	0x1b
-	.byte	0x6b
-	.4byte	0x10e9
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_vendor_block_table
-	.uleb128 0x26
-	.4byte	.LASF470
-	.byte	0x1b
-	.byte	0x6c
-	.4byte	0x10e9
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_vendor_block_valid_page_count
-	.uleb128 0x26
-	.4byte	.LASF471
-	.byte	0x1b
-	.byte	0x6d
-	.4byte	0xff2
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_vendor_block_ver_table
-	.uleb128 0x26
-	.4byte	.LASF472
-	.byte	0x1b
-	.byte	0x6e
-	.4byte	0xff2
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_vendor_region_ppn_table
-	.uleb128 0x26
-	.4byte	.LASF473
-	.byte	0x1b
-	.byte	0x6f
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_vendor_block
-	.uleb128 0x26
-	.4byte	.LASF474
-	.byte	0x1b
-	.byte	0x71
-	.4byte	0x1c7f
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_l2p_ram_map
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x10ef
-	.uleb128 0x26
-	.4byte	.LASF475
-	.byte	0x1b
-	.byte	0x72
-	.4byte	0xff2
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_l2p_map_buf
-	.uleb128 0x26
-	.4byte	.LASF476
-	.byte	0x1b
-	.byte	0x73
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_l2p_last_update_region_id
-	.uleb128 0x26
-	.4byte	.LASF477
-	.byte	0x1b
-	.byte	0x7a
-	.4byte	0x1cb8
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_data_block_list_table
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x1564
-	.uleb128 0x26
-	.4byte	.LASF478
-	.byte	0x1b
-	.byte	0x7b
-	.4byte	0x1cb8
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_free_data_block_list_head
-	.uleb128 0x26
-	.4byte	.LASF479
-	.byte	0x1b
-	.byte	0x7d
-	.4byte	0x1cb8
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_data_block_list_head
-	.uleb128 0x26
-	.4byte	.LASF480
-	.byte	0x1b
-	.byte	0x7e
-	.4byte	0x1cb8
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_data_block_list_tail
-	.uleb128 0x26
-	.4byte	.LASF481
-	.byte	0x1b
-	.byte	0x7f
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_num_free_superblocks
-	.uleb128 0x26
-	.4byte	.LASF482
-	.byte	0x1b
-	.byte	0x80
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_num_data_superblocks
-	.uleb128 0x26
-	.4byte	.LASF483
-	.byte	0x1b
-	.byte	0x81
-	.4byte	0x15f0
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_active_superblock
-	.uleb128 0x26
-	.4byte	.LASF484
-	.byte	0x1b
-	.byte	0x82
-	.4byte	0x15f0
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_buffer_superblock
-	.uleb128 0x26
-	.4byte	.LASF485
-	.byte	0x1b
-	.byte	0x83
-	.4byte	0x15f0
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_temp_superblock
-	.uleb128 0x26
-	.4byte	.LASF486
-	.byte	0x1b
-	.byte	0x84
-	.4byte	0x15f0
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_superblock
-	.uleb128 0x26
-	.4byte	.LASF487
-	.byte	0x1b
-	.byte	0x85
-	.4byte	0x1d68
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gp_last_act_superblock
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x15f0
-	.uleb128 0x26
-	.4byte	.LASF488
-	.byte	0x1b
-	.byte	0x86
-	.4byte	0x1311
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_sys_save_data
-	.uleb128 0x26
-	.4byte	.LASF489
-	.byte	0x1b
-	.byte	0x87
-	.4byte	0x140e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_sys_ext_data
-	.uleb128 0x26
-	.4byte	.LASF490
-	.byte	0x1b
-	.byte	0x89
-	.4byte	0x1da1
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_gc_page_info
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x1692
-	.uleb128 0x26
-	.4byte	.LASF491
-	.byte	0x1b
-	.byte	0x8a
-	.4byte	0x10e9
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_gc_blk_tbl
-	.uleb128 0x26
-	.4byte	.LASF492
-	.byte	0x1b
-	.byte	0x8b
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_blk_num
-	.uleb128 0x26
-	.4byte	.LASF493
-	.byte	0x1b
-	.byte	0x8c
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_page_offset
-	.uleb128 0x26
-	.4byte	.LASF494
-	.byte	0x1b
-	.byte	0x8d
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_cur_blk_valid_pages
-	.uleb128 0x26
-	.4byte	.LASF495
-	.byte	0x1b
-	.byte	0x8e
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_cur_blk_max_valid_pages
-	.uleb128 0x26
-	.4byte	.LASF496
-	.byte	0x1b
-	.byte	0x8f
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_next_blk
-	.uleb128 0x26
-	.4byte	.LASF497
-	.byte	0x1b
-	.byte	0x90
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_next_blk_1
-	.uleb128 0x26
-	.4byte	.LASF498
-	.byte	0x1b
-	.byte	0x91
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_bad_block_temp_num
-	.uleb128 0x26
-	.4byte	.LASF499
-	.byte	0x1b
-	.byte	0x92
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_bad_block_gc_index
-	.uleb128 0xa
-	.4byte	0xdba
-	.4byte	0x1e50
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0x10
-	.byte	0
-	.uleb128 0x26
-	.4byte	.LASF500
-	.byte	0x1b
-	.byte	0x93
-	.4byte	0x1e40
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_bad_block_temp_tbl
-	.uleb128 0x26
-	.4byte	.LASF501
-	.byte	0x1b
-	.byte	0x95
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_free_blk_threshold
-	.uleb128 0x26
-	.4byte	.LASF502
-	.byte	0x1b
-	.byte	0x96
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_merge_free_blk_threshold
-	.uleb128 0x26
-	.4byte	.LASF503
-	.byte	0x1b
-	.byte	0x97
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_blk_index
-	.uleb128 0x26
-	.4byte	.LASF504
-	.byte	0x1b
-	.byte	0x99
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_gc_page_count
-	.uleb128 0x26
-	.4byte	.LASF505
-	.byte	0x1b
-	.byte	0x9a
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_write_page_count
-	.uleb128 0x26
-	.4byte	.LASF506
-	.byte	0x1b
-	.byte	0x9b
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_write_sector
-	.uleb128 0x26
-	.4byte	.LASF507
-	.byte	0x1b
-	.byte	0x9c
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_read_sector
-	.uleb128 0x26
-	.4byte	.LASF508
-	.byte	0x1b
-	.byte	0x9e
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_discard_page_count
-	.uleb128 0x26
-	.4byte	.LASF509
-	.byte	0x1b
-	.byte	0x9f
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_read_page_count
-	.uleb128 0x26
-	.4byte	.LASF510
-	.byte	0x1b
-	.byte	0xa0
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_tmp_data_superblock_id
-	.uleb128 0x26
-	.4byte	.LASF511
-	.byte	0x1b
-	.byte	0xa1
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_cache_write_count
-	.uleb128 0x26
-	.4byte	.LASF512
-	.byte	0x1b
-	.byte	0xa2
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_l2p_write_count
-	.uleb128 0x26
-	.4byte	.LASF513
-	.byte	0x1b
-	.byte	0xa4
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_mlc_erase_count
-	.uleb128 0x26
-	.4byte	.LASF514
-	.byte	0x1b
-	.byte	0xa5
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_avg_erase_count
-	.uleb128 0x26
-	.4byte	.LASF515
-	.byte	0x1b
-	.byte	0xa6
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_min_erase_count
-	.uleb128 0x26
-	.4byte	.LASF516
-	.byte	0x1b
-	.byte	0xa7
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_slc_erase_count
-	.uleb128 0x26
-	.4byte	.LASF517
-	.byte	0x1b
-	.byte	0xa8
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_sys_slc_erase_count
-	.uleb128 0x26
-	.4byte	.LASF518
-	.byte	0x1b
-	.byte	0xa9
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_max_erase_count
-	.uleb128 0x26
-	.4byte	.LASF519
-	.byte	0x1b
-	.byte	0xaa
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_in_gc_progress
-	.uleb128 0x26
-	.4byte	.LASF520
-	.byte	0x1b
-	.byte	0xab
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_in_swl_replace
-	.uleb128 0x26
-	.4byte	.LASF521
-	.byte	0x1b
-	.byte	0xac
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_ftl_nand_free_count
-	.uleb128 0x26
-	.4byte	.LASF522
-	.byte	0x1b
-	.byte	0xad
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_head_data_block
-	.uleb128 0x26
-	.4byte	.LASF523
-	.byte	0x1b
-	.byte	0xae
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_head_data_block_count
-	.uleb128 0x26
-	.4byte	.LASF524
-	.byte	0x1b
-	.byte	0xaf
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_skip_write_count
-	.uleb128 0x26
-	.4byte	.LASF525
-	.byte	0x1b
-	.byte	0xb0
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_cur_erase_blk
-	.uleb128 0x26
-	.4byte	.LASF526
-	.byte	0x1b
-	.byte	0xb2
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_recovery_page_num
-	.uleb128 0x26
-	.4byte	.LASF527
-	.byte	0x1b
-	.byte	0xb3
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_recovery_page_min_ver
-	.uleb128 0xa
-	.4byte	0xdc5
-	.4byte	0x203c
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0x1f
-	.byte	0
-	.uleb128 0x26
-	.4byte	.LASF528
-	.byte	0x1b
-	.byte	0xb4
-	.4byte	0x202c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_recovery_ppa_tbl
-	.uleb128 0x26
-	.4byte	.LASF529
-	.byte	0x1b
-	.byte	0xb5
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_mlc_erase_count_value
-	.uleb128 0x26
-	.4byte	.LASF530
-	.byte	0x1b
-	.byte	0xb6
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_power_lost_recovery_flag
-	.uleb128 0x4
-	.4byte	.LASF531
-	.byte	0x18
-	.byte	0x14
-	.4byte	0xe35
-	.uleb128 0x4
-	.4byte	.LASF532
-	.byte	0x18
-	.byte	0x15
-	.4byte	0xe35
-	.uleb128 0x4
-	.4byte	.LASF533
-	.byte	0x18
-	.byte	0x16
-	.4byte	0xed7
-	.uleb128 0xa
-	.4byte	0xb5
-	.4byte	0x20a1
-	.uleb128 0x15
-	.4byte	0xd6
-	.2byte	0x3ff
-	.byte	0
-	.uleb128 0x4
-	.4byte	.LASF534
-	.byte	0x18
-	.byte	0x17
-	.4byte	0x2090
-	.uleb128 0x26
-	.4byte	.LASF535
-	.byte	0x3
-	.byte	0x6
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	DeviceCapacity
-	.uleb128 0x26
-	.4byte	.LASF536
-	.byte	0x3
-	.byte	0x7
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gFtlInitStatus
-	.uleb128 0x4
-	.4byte	.LASF537
-	.byte	0x3
-	.byte	0x6d
-	.4byte	0xdc5
-	.uleb128 0x4
-	.4byte	.LASF538
-	.byte	0x3
-	.byte	0x6e
-	.4byte	0xdc5
-	.uleb128 0x4
-	.4byte	.LASF539
-	.byte	0x3
-	.byte	0x6f
-	.4byte	0xdc5
-	.uleb128 0x4
-	.4byte	.LASF540
-	.byte	0x3
-	.byte	0x70
-	.4byte	0xdc5
-	.uleb128 0x27
-	.4byte	.LASF541
-	.byte	0x3
-	.2byte	0x3bc
-	.4byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	power_up_flag
-	.uleb128 0x28
-	.4byte	.LASF545
-	.byte	0x3
-	.2byte	0x45f
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gc_discard_updated
-	.uleb128 0x27
-	.4byte	.LASF542
-	.byte	0x2
-	.2byte	0x38c
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_ect_tbl_power_up_flush
-	.uleb128 0x27
-	.4byte	.LASF543
-	.byte	0x2
-	.2byte	0x3a1
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	FtlUpdateVaildLpnCount
-	.uleb128 0xa
-	.4byte	0xdba
-	.4byte	0x2153
-	.uleb128 0x15
-	.4byte	0xd6
-	.2byte	0x1fff
-	.byte	0
-	.uleb128 0x27
-	.4byte	.LASF544
-	.byte	0x2
-	.2byte	0x8df
-	.4byte	0x2142
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	check_vpc_table
-	.uleb128 0x29
-	.4byte	.LASF546
-	.byte	0x5
-	.byte	0x6d
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	ftl_gc_temp_block_bops_scan_page_addr
-	.uleb128 0x27
-	.4byte	.LASF547
-	.byte	0x5
-	.2byte	0x1d4
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gc_ink_free_return_value
-	.uleb128 0xc
-	.4byte	.LASF548
-	.byte	0x1c
-	.2byte	0x3ba
-	.4byte	0x107
-	.uleb128 0xc
-	.4byte	.LASF549
-	.byte	0x1c
-	.2byte	0x3bb
-	.4byte	0x107
-	.uleb128 0xc
-	.4byte	.LASF550
-	.byte	0x1c
-	.2byte	0x3bc
-	.4byte	0x107
-	.uleb128 0xf
-	.4byte	.LASF551
-	.byte	0x4
-	.byte	0x6
-	.byte	0xc
-	.4byte	0x21c5
-	.uleb128 0x16
-	.ascii	"pid\000"
-	.byte	0x6
-	.byte	0xd
-	.4byte	0x50
-	.byte	0
-	.byte	0
-	.uleb128 0x4
-	.4byte	.LASF552
-	.byte	0x6
-	.byte	0x10
-	.4byte	0x21d0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x21ac
-	.uleb128 0x2a
-	.4byte	0x207a
-	.byte	0x1
-	.byte	0x10
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_nand_phy_info
-	.uleb128 0x2a
-	.4byte	0x2085
-	.byte	0x1
-	.byte	0x11
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_nand_ops
-	.uleb128 0x29
-	.4byte	.LASF553
-	.byte	0x1
-	.byte	0x13
-	.4byte	0x2090
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	check_buf
-	.uleb128 0x2a
-	.4byte	0x20a1
-	.byte	0x1
-	.byte	0x14
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	ftl_temp_buf
-	.uleb128 0xa
-	.4byte	0xb5
-	.4byte	0x221e
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0x7f
-	.byte	0
-	.uleb128 0x29
-	.4byte	.LASF554
-	.byte	0x1
-	.byte	0x15
-	.4byte	0x220e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	check_spare_buf
-	.uleb128 0x2b
-	.4byte	.LASF557
-	.byte	0x1
-	.byte	0xfb
-	.4byte	0x50
-	.4byte	.LFB351
-	.4byte	.LFE351-.LFB351
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2295
-	.uleb128 0x2c
-	.4byte	.LASF555
-	.byte	0x1
-	.byte	0xfb
-	.4byte	0x128
-	.4byte	.LLST454
-	.uleb128 0x2c
-	.4byte	.LASF556
-	.byte	0x1
-	.byte	0xfb
-	.4byte	0x128
-	.4byte	.LLST455
-	.uleb128 0x2c
-	.4byte	.LASF325
-	.byte	0x1
-	.byte	0xfb
-	.4byte	0x7b
-	.4byte	.LLST456
-	.uleb128 0x2d
-	.4byte	.LVL2061
-	.4byte	0x9292
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0
-	.byte	0
-	.uleb128 0x2b
-	.4byte	.LASF558
-	.byte	0x1
-	.byte	0xf6
-	.4byte	0x128
-	.4byte	.LFB350
-	.4byte	.LFE350-.LFB350
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x22fb
-	.uleb128 0x2c
-	.4byte	.LASF559
-	.byte	0x1
-	.byte	0xf6
-	.4byte	0x128
-	.4byte	.LLST287
-	.uleb128 0x2c
-	.4byte	.LASF560
-	.byte	0x1
-	.byte	0xf6
-	.4byte	0x16b
-	.4byte	.LLST288
-	.uleb128 0x2c
-	.4byte	.LASF30
-	.byte	0x1
-	.byte	0xf6
-	.4byte	0x7b
-	.4byte	.LLST289
-	.uleb128 0x2d
-	.4byte	.LVL1170
-	.4byte	0x929d
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0
-	.byte	0
-	.uleb128 0x2b
-	.4byte	.LASF561
-	.byte	0x1
-	.byte	0xf1
-	.4byte	0x128
-	.4byte	.LFB349
-	.4byte	.LFE349-.LFB349
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x235b
-	.uleb128 0x2f
-	.ascii	"s\000"
-	.byte	0x1
-	.byte	0xf1
-	.4byte	0x128
-	.4byte	.LLST191
-	.uleb128 0x2f
-	.ascii	"c\000"
-	.byte	0x1
-	.byte	0xf1
-	.4byte	0x50
-	.4byte	.LLST192
-	.uleb128 0x2f
-	.ascii	"n\000"
-	.byte	0x1
-	.byte	0xf1
-	.4byte	0x7b
-	.4byte	.LLST193
-	.uleb128 0x2d
-	.4byte	.LVL706
-	.4byte	0x92a9
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0
-	.byte	0
-	.uleb128 0x2b
-	.4byte	.LASF562
-	.byte	0x1
-	.byte	0xdf
-	.4byte	0xaa
-	.4byte	.LFB348
-	.4byte	.LFE348-.LFB348
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x23ff
-	.uleb128 0x2c
-	.4byte	.LASF563
-	.byte	0x1
-	.byte	0xdf
-	.4byte	0xf28
-	.4byte	.LLST284
-	.uleb128 0x2f
-	.ascii	"die\000"
-	.byte	0x1
-	.byte	0xdf
-	.4byte	0xb5
-	.4byte	.LLST285
-	.uleb128 0x30
-	.4byte	.LASF325
-	.byte	0x1
-	.byte	0xe1
-	.4byte	0x9f
-	.4byte	.LLST286
-	.uleb128 0x31
-	.ascii	"i\000"
-	.byte	0x1
-	.byte	0xe1
-	.4byte	0x9f
-	.uleb128 0x32
-	.4byte	.LVL1162
-	.4byte	0x22fb
-	.4byte	0x23cb
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x100
-	.byte	0
-	.uleb128 0x33
-	.4byte	.LVL1163
-	.4byte	0x23e1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL1166
-	.4byte	0x22fb
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x100
-	.byte	0
-	.byte	0
-	.uleb128 0x35
-	.4byte	.LASF588
-	.byte	0x1
-	.byte	0xc4
-	.4byte	0xdd0
-	.byte	0x1
-	.4byte	0x2443
-	.uleb128 0x36
-	.4byte	.LASF576
-	.byte	0x1
-	.byte	0xc4
-	.4byte	0xdba
-	.uleb128 0x31
-	.ascii	"sts\000"
-	.byte	0x1
-	.byte	0xc6
-	.4byte	0xdd0
-	.uleb128 0x37
-	.4byte	.LASF564
-	.byte	0x1
-	.byte	0xc7
-	.4byte	0x2443
-	.uleb128 0x31
-	.ascii	"req\000"
-	.byte	0x1
-	.byte	0xc8
-	.4byte	0xde6
-	.uleb128 0x38
-	.ascii	"out\000"
-	.byte	0x1
-	.byte	0xda
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xdc5
-	.4byte	0x2453
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0xf
-	.byte	0
-	.uleb128 0x39
-	.4byte	.LASF565
-	.byte	0x1
-	.byte	0xae
-	.4byte	0xaa
-	.4byte	.LFB346
-	.4byte	.LFE346-.LFB346
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2509
-	.uleb128 0x2c
-	.4byte	.LASF566
-	.byte	0x1
-	.byte	0xae
-	.4byte	0x128
-	.4byte	.LLST164
-	.uleb128 0x2c
-	.4byte	.LASF567
-	.byte	0x1
-	.byte	0xae
-	.4byte	0xb5
-	.4byte	.LLST165
-	.uleb128 0x2c
-	.4byte	.LASF568
-	.byte	0x1
-	.byte	0xae
-	.4byte	0xb5
-	.4byte	.LLST166
-	.uleb128 0x3a
-	.ascii	"i\000"
-	.byte	0x1
-	.byte	0xb0
-	.4byte	0xb5
-	.uleb128 0x1
-	.byte	0x56
-	.uleb128 0x3a
-	.ascii	"cs\000"
-	.byte	0x1
-	.byte	0xb0
-	.4byte	0xb5
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -40
-	.uleb128 0x30
-	.4byte	.LASF276
-	.byte	0x1
-	.byte	0xb0
-	.4byte	0xb5
-	.4byte	.LLST167
-	.uleb128 0x29
-	.4byte	.LASF569
-	.byte	0x1
-	.byte	0xb0
-	.4byte	0xb5
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x3b
-	.ascii	"req\000"
-	.byte	0x1
-	.byte	0xb1
-	.4byte	0x19f9
-	.4byte	.LLST168
-	.uleb128 0x29
-	.4byte	.LASF570
-	.byte	0x1
-	.byte	0xb2
-	.4byte	0xb5
-	.uleb128 0x1
-	.byte	0x58
-	.uleb128 0x34
-	.4byte	.LVL620
-	.4byte	0x83a0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x3c
-	.4byte	0x27b6
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 -4
-	.byte	0
-	.byte	0
-	.uleb128 0x2b
-	.4byte	.LASF571
-	.byte	0x1
-	.byte	0x72
-	.4byte	0xaa
-	.4byte	.LFB345
-	.4byte	.LFE345-.LFB345
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2693
-	.uleb128 0x2c
-	.4byte	.LASF566
-	.byte	0x1
-	.byte	0x72
-	.4byte	0x128
-	.4byte	.LLST156
-	.uleb128 0x2c
-	.4byte	.LASF568
-	.byte	0x1
-	.byte	0x72
-	.4byte	0xb5
-	.4byte	.LLST157
-	.uleb128 0x2c
-	.4byte	.LASF567
-	.byte	0x1
-	.byte	0x72
-	.4byte	0xb5
-	.4byte	.LLST158
-	.uleb128 0x2c
-	.4byte	.LASF572
-	.byte	0x1
-	.byte	0x72
-	.4byte	0xb5
-	.4byte	.LLST159
-	.uleb128 0x3b
-	.ascii	"i\000"
-	.byte	0x1
-	.byte	0x74
-	.4byte	0xb5
-	.4byte	.LLST160
-	.uleb128 0x3a
-	.ascii	"cs\000"
-	.byte	0x1
-	.byte	0x74
-	.4byte	0xb5
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -60
-	.uleb128 0x30
-	.4byte	.LASF276
-	.byte	0x1
-	.byte	0x74
-	.4byte	0xb5
-	.4byte	.LLST161
-	.uleb128 0x29
-	.4byte	.LASF569
-	.byte	0x1
-	.byte	0x74
-	.4byte	0xb5
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -56
-	.uleb128 0x30
-	.4byte	.LASF570
-	.byte	0x1
-	.byte	0x75
-	.4byte	0xb5
-	.4byte	.LLST162
-	.uleb128 0x3b
-	.ascii	"req\000"
-	.byte	0x1
-	.byte	0x76
-	.4byte	0x19f9
-	.4byte	.LLST163
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x26a3
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.10327
-	.uleb128 0x3e
-	.4byte	.Ldebug_ranges0+0xa0
-	.4byte	0x263a
-	.uleb128 0x29
-	.4byte	.LASF574
-	.byte	0x1
-	.byte	0x91
-	.4byte	0xde6
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -52
-	.uleb128 0x32
-	.4byte	.LVL608
-	.4byte	0x26a8
-	.4byte	0x25f8
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -52
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL609
-	.4byte	0x92b5
-	.4byte	0x260f
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC79
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL610
-	.4byte	0x92b5
-	.4byte	0x2626
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC80
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL611
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC81
-	.byte	0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL601
-	.4byte	0x92b5
-	.4byte	0x2660
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR109
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x7a
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL602
-	.4byte	0x83a0
-	.4byte	0x2682
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -56
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -60
-	.uleb128 0x3c
-	.4byte	0x27b6
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x3f
-	.4byte	.LVL603
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.uleb128 0x3f
-	.4byte	.LVL605
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xea
-	.4byte	0x26a3
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0xe
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x2693
-	.uleb128 0x2b
-	.4byte	.LASF575
-	.byte	0x1
-	.byte	0x54
-	.4byte	0xaa
-	.4byte	.LFB344
-	.4byte	.LFE344-.LFB344
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x27a6
-	.uleb128 0x2c
-	.4byte	.LASF566
-	.byte	0x1
-	.byte	0x54
-	.4byte	0x128
-	.4byte	.LLST145
-	.uleb128 0x2c
-	.4byte	.LASF568
-	.byte	0x1
-	.byte	0x54
-	.4byte	0xb5
-	.4byte	.LLST146
-	.uleb128 0x2c
-	.4byte	.LASF567
-	.byte	0x1
-	.byte	0x54
-	.4byte	0xb5
-	.4byte	.LLST147
-	.uleb128 0x3a
-	.ascii	"i\000"
-	.byte	0x1
-	.byte	0x56
-	.4byte	0xb5
-	.uleb128 0x1
-	.byte	0x55
-	.uleb128 0x3a
-	.ascii	"cs\000"
-	.byte	0x1
-	.byte	0x56
-	.4byte	0xb5
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -40
-	.uleb128 0x30
-	.4byte	.LASF276
-	.byte	0x1
-	.byte	0x56
-	.4byte	0xb5
-	.4byte	.LLST148
-	.uleb128 0x29
-	.4byte	.LASF569
-	.byte	0x1
-	.byte	0x56
-	.4byte	0xb5
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x29
-	.4byte	.LASF570
-	.byte	0x1
-	.byte	0x57
-	.4byte	0xb5
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -44
-	.uleb128 0x3a
-	.ascii	"req\000"
-	.byte	0x1
-	.byte	0x58
-	.4byte	0x19f9
-	.uleb128 0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x26a3
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.10310
-	.uleb128 0x32
-	.4byte	.LVL558
-	.4byte	0x92b5
-	.4byte	0x2773
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR104
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x5c
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL559
-	.4byte	0x83a0
-	.4byte	0x2795
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -40
-	.uleb128 0x3c
-	.4byte	0x27b6
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x3f
-	.4byte	.LVL560
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x3f
-	.4byte	.LVL562
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x40
-	.4byte	.LASF883
-	.byte	0x1
-	.byte	0x3a
-	.4byte	0xb5
-	.byte	0x1
-	.4byte	0x2825
-	.uleb128 0x41
-	.ascii	"req\000"
-	.byte	0x1
-	.byte	0x3a
-	.4byte	0x19f9
-	.uleb128 0x36
-	.4byte	.LASF569
-	.byte	0x1
-	.byte	0x3a
-	.4byte	0xe2f
-	.uleb128 0x36
-	.4byte	.LASF577
-	.byte	0x1
-	.byte	0x3a
-	.4byte	0xe2f
-	.uleb128 0x37
-	.4byte	.LASF578
-	.byte	0x1
-	.byte	0x3c
-	.4byte	0x9f
-	.uleb128 0x37
-	.4byte	.LASF579
-	.byte	0x1
-	.byte	0x3c
-	.4byte	0x9f
-	.uleb128 0x37
-	.4byte	.LASF285
-	.byte	0x1
-	.byte	0x3d
-	.4byte	0x9f
-	.uleb128 0x37
-	.4byte	.LASF286
-	.byte	0x1
-	.byte	0x3d
-	.4byte	0x9f
-	.uleb128 0x37
-	.4byte	.LASF580
-	.byte	0x1
-	.byte	0x3e
-	.4byte	0xb5
-	.uleb128 0x37
-	.4byte	.LASF277
-	.byte	0x1
-	.byte	0x3f
-	.4byte	0xb5
-	.uleb128 0x37
-	.4byte	.LASF581
-	.byte	0x1
-	.byte	0x40
-	.4byte	0xb5
-	.byte	0
-	.uleb128 0x42
-	.4byte	.LASF584
-	.byte	0x1
-	.byte	0x20
-	.4byte	.LFB342
-	.4byte	.LFE342-.LFB342
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2911
-	.uleb128 0x2f
-	.ascii	"s\000"
-	.byte	0x1
-	.byte	0x20
-	.4byte	0xf6
-	.4byte	.LLST136
-	.uleb128 0x2f
-	.ascii	"buf\000"
-	.byte	0x1
-	.byte	0x20
-	.4byte	0x128
-	.4byte	.LLST137
-	.uleb128 0x2c
-	.4byte	.LASF582
-	.byte	0x1
-	.byte	0x20
-	.4byte	0x50
-	.4byte	.LLST138
-	.uleb128 0x2f
-	.ascii	"len\000"
-	.byte	0x1
-	.byte	0x20
-	.4byte	0x50
-	.4byte	.LLST139
-	.uleb128 0x3b
-	.ascii	"i\000"
-	.byte	0x1
-	.byte	0x22
-	.4byte	0xb5
-	.4byte	.LLST140
-	.uleb128 0x3b
-	.ascii	"j\000"
-	.byte	0x1
-	.byte	0x22
-	.4byte	0xb5
-	.4byte	.LLST141
-	.uleb128 0x3b
-	.ascii	"p8\000"
-	.byte	0x1
-	.byte	0x23
-	.4byte	0xf6
-	.4byte	.LLST142
-	.uleb128 0x3b
-	.ascii	"p16\000"
-	.byte	0x1
-	.byte	0x24
-	.4byte	0x2911
-	.4byte	.LLST143
-	.uleb128 0x3b
-	.ascii	"p32\000"
-	.byte	0x1
-	.byte	0x25
-	.4byte	0xe2f
-	.4byte	.LLST144
-	.uleb128 0x43
-	.4byte	.LVL547
-	.4byte	0x92b5
-	.4byte	0x28d1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC78
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL548
-	.4byte	0x92b5
-	.4byte	0x28f4
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC75
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL550
-	.4byte	0x92b5
-	.uleb128 0x34
-	.4byte	.LVL552
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC78
-	.byte	0
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x69
-	.uleb128 0x2b
-	.4byte	.LASF583
-	.byte	0x1
-	.byte	0x1b
-	.4byte	0x128
-	.4byte	.LFB341
-	.4byte	.LFE341-.LFB341
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2956
-	.uleb128 0x2c
-	.4byte	.LASF30
-	.byte	0x1
-	.byte	0x1b
-	.4byte	0x50
-	.4byte	.LLST135
-	.uleb128 0x2d
-	.4byte	.LVL542
-	.4byte	0x92c0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.byte	0
-	.uleb128 0x42
-	.4byte	.LASF585
-	.byte	0x1
-	.byte	0x17
-	.4byte	.LFB340
-	.4byte	.LFE340-.LFB340
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x29a5
-	.uleb128 0x2f
-	.ascii	"buf\000"
-	.byte	0x1
-	.byte	0x17
-	.4byte	0x128
-	.4byte	.LLST133
-	.uleb128 0x45
-	.4byte	0x29a5
-	.4byte	.LBB235
-	.4byte	.LBE235-.LBB235
-	.byte	0x1
-	.byte	0x19
-	.uleb128 0x46
-	.4byte	0x29b1
-	.4byte	.LLST134
-	.uleb128 0x2d
-	.4byte	.LVL540
-	.4byte	0x92cb
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x47
-	.4byte	.LASF884
-	.byte	0x6
-	.byte	0x4e
-	.byte	0x3
-	.4byte	0x29bd
-	.uleb128 0x36
-	.4byte	.LASF586
-	.byte	0x6
-	.byte	0x4e
-	.4byte	0x16b
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF587
-	.byte	0x5
-	.2byte	0x2f4
-	.4byte	0xb5
-	.4byte	.LFB323
-	.4byte	.LFE323-.LFB323
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x29ec
-	.uleb128 0x2d
-	.4byte	.LVL1816
-	.4byte	0x29ec
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF589
-	.byte	0x5
-	.2byte	0x1d5
-	.4byte	0x50
-	.byte	0x1
-	.4byte	0x2ab9
-	.uleb128 0x4a
-	.4byte	.LASF590
-	.byte	0x5
-	.2byte	0x1d5
-	.4byte	0xdc5
-	.uleb128 0x4a
-	.4byte	.LASF591
-	.byte	0x5
-	.2byte	0x1d5
-	.4byte	0xdc5
-	.uleb128 0x4b
-	.4byte	.LASF592
-	.byte	0x5
-	.2byte	0x1d7
-	.4byte	0xdba
-	.uleb128 0x4c
-	.ascii	"lpa\000"
-	.byte	0x5
-	.2byte	0x1d8
-	.4byte	0xdc5
-	.uleb128 0x4c
-	.ascii	"ppa\000"
-	.byte	0x5
-	.2byte	0x1d8
-	.4byte	0xdc5
-	.uleb128 0x4b
-	.4byte	.LASF593
-	.byte	0x5
-	.2byte	0x1d9
-	.4byte	0xdba
-	.uleb128 0x4b
-	.4byte	.LASF299
-	.byte	0x5
-	.2byte	0x1da
-	.4byte	0xdba
-	.uleb128 0x4b
-	.4byte	.LASF594
-	.byte	0x5
-	.2byte	0x1da
-	.4byte	0xdba
-	.uleb128 0x4b
-	.4byte	.LASF595
-	.byte	0x5
-	.2byte	0x1da
-	.4byte	0xdba
-	.uleb128 0x4b
-	.4byte	.LASF596
-	.byte	0x5
-	.2byte	0x1da
-	.4byte	0xdba
-	.uleb128 0x4b
-	.4byte	.LASF597
-	.byte	0x5
-	.2byte	0x1db
-	.4byte	0xdba
-	.uleb128 0x4b
-	.4byte	.LASF598
-	.byte	0x5
-	.2byte	0x1dc
-	.4byte	0x2ab9
-	.uleb128 0x4d
-	.4byte	.LASF599
-	.byte	0x5
-	.2byte	0x272
-	.uleb128 0x4d
-	.4byte	.LASF600
-	.byte	0x5
-	.2byte	0x275
-	.uleb128 0x4e
-	.4byte	.LASF573
-	.4byte	0x2acf
-	.4byte	.LASF589
-	.uleb128 0x4f
-	.uleb128 0x4b
-	.4byte	.LASF601
-	.byte	0x5
-	.2byte	0x1f3
-	.4byte	0xdba
-	.byte	0
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x1229
-	.uleb128 0xa
-	.4byte	0xea
-	.4byte	0x2acf
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0x16
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x2abf
-	.uleb128 0x49
-	.4byte	.LASF602
-	.byte	0x5
-	.2byte	0x1a2
-	.4byte	0x50
-	.byte	0x1
-	.4byte	0x2b34
-	.uleb128 0x4c
-	.ascii	"ret\000"
-	.byte	0x5
-	.2byte	0x1a4
-	.4byte	0x50
-	.uleb128 0x4c
-	.ascii	"i\000"
-	.byte	0x5
-	.2byte	0x1a5
-	.4byte	0x50
-	.uleb128 0x4c
-	.ascii	"ppa\000"
-	.byte	0x5
-	.2byte	0x1a6
-	.4byte	0xdc5
-	.uleb128 0x4b
-	.4byte	.LASF564
-	.byte	0x5
-	.2byte	0x1a7
-	.4byte	0x2443
-	.uleb128 0x50
-	.4byte	0x2b25
-	.uleb128 0x4b
-	.4byte	.LASF603
-	.byte	0x5
-	.2byte	0x1b1
-	.4byte	0xde6
-	.byte	0
-	.uleb128 0x4f
-	.uleb128 0x4b
-	.4byte	.LASF604
-	.byte	0x5
-	.2byte	0x1c6
-	.4byte	0xdc5
-	.byte	0
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF605
-	.byte	0x5
-	.2byte	0x185
-	.4byte	0x50
-	.byte	0x1
-	.4byte	0x2b7e
-	.uleb128 0x4a
-	.4byte	.LASF606
-	.byte	0x5
-	.2byte	0x185
-	.4byte	0xdba
-	.uleb128 0x4b
-	.4byte	.LASF594
-	.byte	0x5
-	.2byte	0x187
-	.4byte	0xdba
-	.uleb128 0x4c
-	.ascii	"i\000"
-	.byte	0x5
-	.2byte	0x188
-	.4byte	0xdba
-	.uleb128 0x4c
-	.ascii	"j\000"
-	.byte	0x5
-	.2byte	0x188
-	.4byte	0xdba
-	.uleb128 0x4b
-	.4byte	.LASF388
-	.byte	0x5
-	.2byte	0x189
-	.4byte	0xdba
-	.byte	0
-	.uleb128 0x51
-	.4byte	.LASF714
-	.byte	0x5
-	.2byte	0x17a
-	.4byte	0x50
-	.byte	0x1
-	.uleb128 0x48
-	.4byte	.LASF607
-	.byte	0x5
-	.2byte	0x166
-	.4byte	0x50
-	.4byte	.LFB318
-	.4byte	.LFE318-.LFB318
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2c15
-	.uleb128 0x52
-	.4byte	.LASF388
-	.byte	0x5
-	.2byte	0x166
-	.4byte	0xdba
-	.4byte	.LLST130
-	.uleb128 0x53
-	.ascii	"i\000"
-	.byte	0x5
-	.2byte	0x168
-	.4byte	0xdba
-	.4byte	.LLST131
-	.uleb128 0x54
-	.4byte	.LASF608
-	.byte	0x5
-	.2byte	0x169
-	.4byte	0xdba
-	.4byte	.LLST132
-	.uleb128 0x32
-	.4byte	.LVL527
-	.4byte	0x616f
-	.4byte	0x2be7
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL529
-	.4byte	0x92b5
-	.4byte	0x2c04
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC74
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL530
-	.4byte	0x2c15
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF609
-	.byte	0x5
-	.2byte	0x158
-	.4byte	0x50
-	.4byte	.LFB317
-	.4byte	.LFE317-.LFB317
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2c59
-	.uleb128 0x52
-	.4byte	.LASF586
-	.byte	0x5
-	.2byte	0x158
-	.4byte	0xdba
-	.4byte	.LLST129
-	.uleb128 0x34
-	.4byte	.LVL525
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC73
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF610
-	.byte	0x5
-	.2byte	0x13b
-	.4byte	0xdc5
-	.4byte	.LFB316
-	.4byte	.LFE316-.LFB316
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2cfd
-	.uleb128 0x53
-	.ascii	"i\000"
-	.byte	0x5
-	.2byte	0x13d
-	.4byte	0xdba
-	.4byte	.LLST395
-	.uleb128 0x54
-	.4byte	.LASF598
-	.byte	0x5
-	.2byte	0x13e
-	.4byte	0x2ab9
-	.4byte	.LLST396
-	.uleb128 0x32
-	.4byte	.LVL1703
-	.4byte	0x2509
-	.4byte	0x2cab
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1704
-	.4byte	0x31c7
-	.4byte	0x2cc5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1705
-	.4byte	0x2f28
-	.4byte	0x2cd8
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1707
-	.4byte	0x6875
-	.uleb128 0x44
-	.4byte	.LVL1708
-	.4byte	0x663d
-	.uleb128 0x44
-	.4byte	.LVL1709
-	.4byte	0x2ee1
-	.uleb128 0x44
-	.4byte	.LVL1711
-	.4byte	0x30d0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF611
-	.byte	0x5
-	.2byte	0x12b
-	.4byte	0xdc5
-	.4byte	.LFB315
-	.4byte	.LFE315-.LFB315
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2d79
-	.uleb128 0x32
-	.4byte	.LVL1712
-	.4byte	0x2f28
-	.4byte	0x2d2b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1713
-	.4byte	0x34f0
-	.4byte	0x2d3f
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1714
-	.4byte	0x536c
-	.uleb128 0x32
-	.4byte	.LVL1715
-	.4byte	0x4fd8
-	.4byte	0x2d5c
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1716
-	.4byte	0x4d67
-	.uleb128 0x2d
-	.4byte	.LVL1717
-	.4byte	0x331b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR53
-	.byte	0
-	.byte	0
-	.uleb128 0x55
-	.4byte	.LASF670
-	.byte	0x5
-	.2byte	0x120
-	.byte	0x1
-	.uleb128 0x2b
-	.4byte	.LASF612
-	.byte	0x5
-	.byte	0xd2
-	.4byte	0xdc5
-	.4byte	.LFB313
-	.4byte	.LFE313-.LFB313
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2ee1
-	.uleb128 0x2c
-	.4byte	.LASF613
-	.byte	0x5
-	.byte	0xd2
-	.4byte	0x1d68
-	.4byte	.LLST271
-	.uleb128 0x2c
-	.4byte	.LASF614
-	.byte	0x5
-	.byte	0xd2
-	.4byte	0xdc5
-	.4byte	.LLST272
-	.uleb128 0x30
-	.4byte	.LASF596
-	.byte	0x5
-	.byte	0xd4
-	.4byte	0xdba
-	.4byte	.LLST273
-	.uleb128 0x30
-	.4byte	.LASF568
-	.byte	0x5
-	.byte	0xd5
-	.4byte	0xdba
-	.4byte	.LLST274
-	.uleb128 0x3b
-	.ascii	"req\000"
-	.byte	0x5
-	.byte	0xd5
-	.4byte	0xdba
-	.4byte	.LLST275
-	.uleb128 0x30
-	.4byte	.LASF594
-	.byte	0x5
-	.byte	0xd6
-	.4byte	0xdba
-	.4byte	.LLST276
-	.uleb128 0x30
-	.4byte	.LASF382
-	.byte	0x5
-	.byte	0xd6
-	.4byte	0xdba
-	.4byte	.LLST277
-	.uleb128 0x30
-	.4byte	.LASF380
-	.byte	0x5
-	.byte	0xd6
-	.4byte	0xdba
-	.4byte	.LLST278
-	.uleb128 0x30
-	.4byte	.LASF615
-	.byte	0x5
-	.byte	0xd7
-	.4byte	0xdc5
-	.4byte	.LLST279
-	.uleb128 0x30
-	.4byte	.LASF616
-	.byte	0x5
-	.byte	0xd8
-	.4byte	0xdc5
-	.4byte	.LLST280
-	.uleb128 0x56
-	.4byte	.LASF617
-	.byte	0x5
-	.byte	0xd9
-	.4byte	0xdc5
-	.sleb128 -1
-	.uleb128 0x30
-	.4byte	.LASF598
-	.byte	0x5
-	.byte	0xda
-	.4byte	0x2ab9
-	.4byte	.LLST281
-	.uleb128 0x57
-	.4byte	.LASF618
-	.byte	0x5
-	.byte	0xe1
-	.uleb128 0x57
-	.4byte	.LASF619
-	.byte	0x5
-	.byte	0xe5
-	.uleb128 0x58
-	.4byte	.LASF688
-	.byte	0x5
-	.2byte	0x117
-	.4byte	.L982
-	.uleb128 0x44
-	.4byte	.LVL1108
-	.4byte	0x2ee1
-	.uleb128 0x32
-	.4byte	.LVL1117
-	.4byte	0x26a8
-	.4byte	0x2e90
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -52
-	.byte	0x6
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1130
-	.4byte	0x61a7
-	.4byte	0x2eab
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x91
-	.sleb128 -52
-	.byte	0x6
-	.byte	0x9
-	.byte	0xea
-	.byte	0x24
-	.byte	0x9
-	.byte	0xf4
-	.byte	0x25
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1136
-	.4byte	0x46e1
-	.4byte	0x2ec5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1139
-	.4byte	0x30d0
-	.uleb128 0x44
-	.4byte	.LVL1143
-	.4byte	0x5e03
-	.uleb128 0x44
-	.4byte	.LVL1145
-	.4byte	0x2ee1
-	.byte	0
-	.uleb128 0x42
-	.4byte	.LASF620
-	.byte	0x5
-	.byte	0xc9
-	.4byte	.LFB312
-	.4byte	.LFE312-.LFB312
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2f28
-	.uleb128 0x32
-	.4byte	.LVL1103
-	.4byte	0x22fb
-	.4byte	0x2f0a
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1104
-	.4byte	0x22fb
-	.4byte	0x2f1e
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.uleb128 0x59
-	.4byte	.LVL1105
-	.4byte	0x3213
-	.byte	0
-	.uleb128 0x2b
-	.4byte	.LASF621
-	.byte	0x5
-	.byte	0x6f
-	.4byte	0x50
-	.4byte	.LFB311
-	.4byte	.LFE311-.LFB311
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x30bb
-	.uleb128 0x2c
-	.4byte	.LASF622
-	.byte	0x5
-	.byte	0x6f
-	.4byte	0x50
-	.4byte	.LLST390
-	.uleb128 0x3b
-	.ascii	"i\000"
-	.byte	0x5
-	.byte	0x71
-	.4byte	0xdba
-	.4byte	.LLST391
-	.uleb128 0x30
-	.4byte	.LASF623
-	.byte	0x5
-	.byte	0x71
-	.4byte	0xdba
-	.4byte	.LLST392
-	.uleb128 0x29
-	.4byte	.LASF624
-	.byte	0x5
-	.byte	0x72
-	.4byte	0xdc5
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x30
-	.4byte	.LASF625
-	.byte	0x5
-	.byte	0x73
-	.4byte	0xdc5
-	.4byte	.LLST393
-	.uleb128 0x29
-	.4byte	.LASF613
-	.byte	0x5
-	.byte	0x74
-	.4byte	0x1d68
-	.uleb128 0x6
-	.byte	0x3
-	.4byte	g_gc_temp_superblock
-	.byte	0x9f
-	.uleb128 0x30
-	.4byte	.LASF626
-	.byte	0x5
-	.byte	0x75
-	.4byte	0x1da1
-	.4byte	.LLST394
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x30cb
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.9940
-	.uleb128 0x32
-	.4byte	.LVL1667
-	.4byte	0x2d82
-	.4byte	0x2fcd
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1668
-	.4byte	0x4fd8
-	.4byte	0x2fe0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1669
-	.4byte	0x6875
-	.uleb128 0x44
-	.4byte	.LVL1670
-	.4byte	0x663d
-	.uleb128 0x32
-	.4byte	.LVL1674
-	.4byte	0x92b5
-	.4byte	0x3018
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR171
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xa2
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1676
-	.4byte	0x3236
-	.4byte	0x302c
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x9
-	.byte	0xff
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1677
-	.4byte	0x5dde
-	.uleb128 0x44
-	.4byte	.LVL1679
-	.4byte	0x536c
-	.uleb128 0x44
-	.4byte	.LVL1680
-	.4byte	0x4d67
-	.uleb128 0x32
-	.4byte	.LVL1683
-	.4byte	0x92b5
-	.4byte	0x306d
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR171
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xa8
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1684
-	.4byte	0x526b
-	.4byte	0x3086
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1685
-	.4byte	0x616f
-	.uleb128 0x32
-	.4byte	.LVL1687
-	.4byte	0x526b
-	.4byte	0x30a8
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 4
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1689
-	.4byte	0x3236
-	.uleb128 0x44
-	.4byte	.LVL1693
-	.4byte	0x5e03
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xea
-	.4byte	0x30cb
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0x12
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x30bb
-	.uleb128 0x42
-	.4byte	.LASF627
-	.byte	0x5
-	.byte	0x54
-	.4byte	.LFB310
-	.4byte	.LFE310-.LFB310
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3145
-	.uleb128 0x2c
-	.4byte	.LASF628
-	.byte	0x5
-	.byte	0x54
-	.4byte	0xdc5
-	.4byte	.LLST124
-	.uleb128 0x2c
-	.4byte	.LASF391
-	.byte	0x5
-	.byte	0x54
-	.4byte	0xdc5
-	.4byte	.LLST125
-	.uleb128 0x2f
-	.ascii	"lpa\000"
-	.byte	0x5
-	.byte	0x54
-	.4byte	0xdc5
-	.4byte	.LLST126
-	.uleb128 0x30
-	.4byte	.LASF629
-	.byte	0x5
-	.byte	0x56
-	.4byte	0xdba
-	.4byte	.LLST127
-	.uleb128 0x3b
-	.ascii	"i\000"
-	.byte	0x5
-	.byte	0x57
-	.4byte	0xdba
-	.4byte	.LLST128
-	.uleb128 0x34
-	.4byte	.LVL517
-	.4byte	0x616f
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x8
-	.byte	0x75
-	.sleb128 0
-	.byte	0x9
-	.byte	0xea
-	.byte	0x24
-	.byte	0x9
-	.byte	0xf4
-	.byte	0x25
-	.byte	0
-	.byte	0
-	.uleb128 0x2b
-	.4byte	.LASF630
-	.byte	0x5
-	.byte	0x49
-	.4byte	0xdc5
-	.4byte	.LFB309
-	.4byte	.LFE309-.LFB309
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x317b
-	.uleb128 0x2f
-	.ascii	"blk\000"
-	.byte	0x5
-	.byte	0x49
-	.4byte	0xdba
-	.4byte	.LLST122
-	.uleb128 0x3b
-	.ascii	"i\000"
-	.byte	0x5
-	.byte	0x4b
-	.4byte	0xdba
-	.4byte	.LLST123
-	.byte	0
-	.uleb128 0x42
-	.4byte	.LASF631
-	.byte	0x5
-	.byte	0x38
-	.4byte	.LFB308
-	.4byte	.LFE308-.LFB308
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x31c7
-	.uleb128 0x5a
-	.ascii	"req\000"
-	.byte	0x5
-	.byte	0x38
-	.4byte	0x19f9
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5b
-	.4byte	.LASF632
-	.byte	0x5
-	.byte	0x38
-	.4byte	0xdc5
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3b
-	.ascii	"i\000"
-	.byte	0x5
-	.byte	0x3a
-	.4byte	0xdba
-	.4byte	.LLST120
-	.uleb128 0x30
-	.4byte	.LASF633
-	.byte	0x5
-	.byte	0x3b
-	.4byte	0xdba
-	.4byte	.LLST121
-	.byte	0
-	.uleb128 0x42
-	.4byte	.LASF634
-	.byte	0x5
-	.byte	0x29
-	.4byte	.LFB307
-	.4byte	.LFE307-.LFB307
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3213
-	.uleb128 0x5a
-	.ascii	"req\000"
-	.byte	0x5
-	.byte	0x29
-	.4byte	0x19f9
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5b
-	.4byte	.LASF632
-	.byte	0x5
-	.byte	0x29
-	.4byte	0xdc5
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3b
-	.ascii	"i\000"
-	.byte	0x5
-	.byte	0x2b
-	.4byte	0xdba
-	.4byte	.LLST118
-	.uleb128 0x30
-	.4byte	.LASF633
-	.byte	0x5
-	.byte	0x2c
-	.4byte	0xdba
-	.4byte	.LLST119
-	.byte	0
-	.uleb128 0x42
-	.4byte	.LASF635
-	.byte	0x5
-	.byte	0x15
-	.4byte	.LFB306
-	.4byte	.LFE306-.LFB306
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3236
-	.uleb128 0x3b
-	.ascii	"i\000"
-	.byte	0x5
-	.byte	0x17
-	.4byte	0xdba
-	.4byte	.LLST117
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF636
-	.byte	0x2
-	.2byte	0xac6
-	.4byte	0x50
-	.4byte	.LFB305
-	.4byte	.LFE305-.LFB305
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x32c6
-	.uleb128 0x52
-	.4byte	.LASF623
-	.byte	0x2
-	.2byte	0xac6
-	.4byte	0xdba
-	.4byte	.LLST309
-	.uleb128 0x53
-	.ascii	"ret\000"
-	.byte	0x2
-	.2byte	0xac8
-	.4byte	0x50
-	.4byte	.LLST310
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x32d6
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.9870
-	.uleb128 0x32
-	.4byte	.LVL1267
-	.4byte	0x92b5
-	.4byte	0x329c
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC101
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1271
-	.4byte	0x92b5
-	.4byte	0x32bc
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR159
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1274
-	.4byte	0x32db
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xea
-	.4byte	0x32d6
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0x13
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x32c6
-	.uleb128 0x49
-	.4byte	.LASF637
-	.byte	0x2
-	.2byte	0xab1
-	.4byte	0x50
-	.byte	0x1
-	.4byte	0x3306
-	.uleb128 0x4a
-	.4byte	.LASF623
-	.byte	0x2
-	.2byte	0xab1
-	.4byte	0xdba
-	.uleb128 0x4e
-	.4byte	.LASF573
-	.4byte	0x3316
-	.4byte	.LASF637
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xea
-	.4byte	0x3316
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0xf
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x3306
-	.uleb128 0x48
-	.4byte	.LASF638
-	.byte	0x2
-	.2byte	0xa91
-	.4byte	0xdc5
-	.4byte	.LFB303
-	.4byte	.LFE303-.LFB303
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x340d
-	.uleb128 0x52
-	.4byte	.LASF639
-	.byte	0x2
-	.2byte	0xa91
-	.4byte	0x1d68
-	.4byte	.LLST114
-	.uleb128 0x54
-	.4byte	.LASF596
-	.byte	0x2
-	.2byte	0xa93
-	.4byte	0xdba
-	.4byte	.LLST115
-	.uleb128 0x54
-	.4byte	.LASF640
-	.byte	0x2
-	.2byte	0xa94
-	.4byte	0xdc5
-	.4byte	.LLST116
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x30cb
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.9850
-	.uleb128 0x32
-	.4byte	.LVL480
-	.4byte	0x92b5
-	.4byte	0x339b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR88
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xa96
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL481
-	.4byte	0x92b5
-	.4byte	0x33c2
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR88
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xa97
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL482
-	.4byte	0x92b5
-	.4byte	0x33e9
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR88
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xa98
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL486
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR88
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xaad
-	.byte	0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF641
-	.byte	0x2
-	.2byte	0xa79
-	.4byte	0x50
-	.4byte	.LFB302
-	.4byte	.LFE302-.LFB302
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x34db
-	.uleb128 0x52
-	.4byte	.LASF639
-	.byte	0x2
-	.2byte	0xa79
-	.4byte	0x1d68
-	.4byte	.LLST381
-	.uleb128 0x28
-	.4byte	.LASF623
-	.byte	0x2
-	.2byte	0xa7b
-	.4byte	0xdba
-	.uleb128 0x1
-	.byte	0x54
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x34eb
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.9843
-	.uleb128 0x32
-	.4byte	.LVL1629
-	.4byte	0x92b5
-	.4byte	0x347b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR169
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xa7c
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1630
-	.4byte	0x5dde
-	.4byte	0x348f
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1631
-	.4byte	0x32db
-	.uleb128 0x32
-	.4byte	.LVL1632
-	.4byte	0x34f0
-	.4byte	0x34ac
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1633
-	.4byte	0x536c
-	.uleb128 0x32
-	.4byte	.LVL1634
-	.4byte	0x4fd8
-	.4byte	0x34c8
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1635
-	.4byte	0x4d67
-	.uleb128 0x44
-	.4byte	.LVL1637
-	.4byte	0x5e03
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xea
-	.4byte	0x34eb
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0x1c
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x34db
-	.uleb128 0x5c
-	.4byte	.LASF642
-	.byte	0x2
-	.2byte	0xa15
-	.4byte	0x50
-	.4byte	.LFB301
-	.4byte	.LFE301-.LFB301
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x378b
-	.uleb128 0x5d
-	.ascii	"p\000"
-	.byte	0x2
-	.2byte	0xa15
-	.4byte	0x1d68
-	.4byte	.LLST294
-	.uleb128 0x54
-	.4byte	.LASF643
-	.byte	0x2
-	.2byte	0xa17
-	.4byte	0xdba
-	.4byte	.LLST295
-	.uleb128 0x4b
-	.4byte	.LASF594
-	.byte	0x2
-	.2byte	0xa18
-	.4byte	0xdba
-	.uleb128 0x54
-	.4byte	.LASF568
-	.byte	0x2
-	.2byte	0xa18
-	.4byte	0xdba
-	.4byte	.LLST296
-	.uleb128 0x53
-	.ascii	"n\000"
-	.byte	0x2
-	.2byte	0xa18
-	.4byte	0xdba
-	.4byte	.LLST297
-	.uleb128 0x54
-	.4byte	.LASF596
-	.byte	0x2
-	.2byte	0xa18
-	.4byte	0xdba
-	.4byte	.LLST298
-	.uleb128 0x54
-	.4byte	.LASF644
-	.byte	0x2
-	.2byte	0xa19
-	.4byte	0x50
-	.4byte	.LLST299
-	.uleb128 0x54
-	.4byte	.LASF645
-	.byte	0x2
-	.2byte	0xa1a
-	.4byte	0xdba
-	.4byte	.LLST300
-	.uleb128 0x4d
-	.4byte	.LASF646
-	.byte	0x2
-	.2byte	0xa1b
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x379b
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.9822
-	.uleb128 0x5e
-	.4byte	0x4b2d
-	.4byte	.LBB280
-	.4byte	.Ldebug_ranges0+0x118
-	.byte	0x2
-	.2byte	0xa4b
-	.4byte	0x35d7
-	.uleb128 0x46
-	.4byte	0x4b46
-	.4byte	.LLST301
-	.uleb128 0x46
-	.4byte	0x4b3a
-	.4byte	.LLST302
-	.uleb128 0x34
-	.4byte	.LVL1223
-	.4byte	0x83fa
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x3c
-	.4byte	0x4b46
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1194
-	.4byte	0x92b5
-	.4byte	0x35fe
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR157
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xa1c
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1198
-	.4byte	0x5bb8
-	.4byte	0x3615
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR47
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1200
-	.4byte	0x92b5
-	.4byte	0x363c
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR157
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xa25
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1201
-	.4byte	0x3f1b
-	.4byte	0x3650
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1202
-	.4byte	0x5dde
-	.4byte	0x3664
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1203
-	.4byte	0x92b5
-	.4byte	0x368b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR157
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xa30
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1206
-	.4byte	0x92b5
-	.4byte	0x36b2
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR157
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xa33
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1208
-	.4byte	0x92b5
-	.4byte	0x36d9
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR157
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xa3e
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1209
-	.4byte	0x92b5
-	.4byte	0x3700
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR157
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xa40
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1210
-	.4byte	0x4b2d
-	.4byte	0x3719
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1214
-	.4byte	0x2453
-	.4byte	0x372d
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1216
-	.4byte	0x3913
-	.4byte	0x3741
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1217
-	.4byte	0x663d
-	.uleb128 0x32
-	.4byte	.LVL1218
-	.4byte	0x5dde
-	.4byte	0x375e
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1228
-	.4byte	0x6875
-	.uleb128 0x34
-	.4byte	.LVL1232
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR157
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xa75
-	.byte	0
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xea
-	.4byte	0x379b
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0x18
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x378b
-	.uleb128 0x49
-	.4byte	.LASF647
-	.byte	0x2
-	.2byte	0xa0c
-	.4byte	0x50
-	.byte	0x1
-	.4byte	0x37be
-	.uleb128 0x4a
-	.4byte	.LASF623
-	.byte	0x2
-	.2byte	0xa0c
-	.4byte	0xdba
-	.byte	0
-	.uleb128 0x5c
-	.4byte	.LASF648
-	.byte	0x2
-	.2byte	0x9c3
-	.4byte	0xdba
-	.4byte	.LFB299
-	.4byte	.LFE299-.LFB299
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x388f
-	.uleb128 0x54
-	.4byte	.LASF649
-	.byte	0x2
-	.2byte	0x9c5
-	.4byte	0xdba
-	.4byte	.LLST104
-	.uleb128 0x54
-	.4byte	.LASF650
-	.byte	0x2
-	.2byte	0x9c6
-	.4byte	0xdba
-	.4byte	.LLST105
-	.uleb128 0x54
-	.4byte	.LASF651
-	.byte	0x2
-	.2byte	0x9c7
-	.4byte	0xdba
-	.4byte	.LLST106
-	.uleb128 0x54
-	.4byte	.LASF652
-	.byte	0x2
-	.2byte	0x9c8
-	.4byte	0x1cb8
-	.4byte	.LLST107
-	.uleb128 0x54
-	.4byte	.LASF653
-	.byte	0x2
-	.2byte	0x9c9
-	.4byte	0xdba
-	.4byte	.LLST108
-	.uleb128 0x54
-	.4byte	.LASF654
-	.byte	0x2
-	.2byte	0x9ca
-	.4byte	0xdba
-	.4byte	.LLST109
-	.uleb128 0x53
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x9cb
-	.4byte	0xdc5
-	.4byte	.LLST110
-	.uleb128 0x54
-	.4byte	.LASF325
-	.byte	0x2
-	.2byte	0x9cc
-	.4byte	0xdba
-	.4byte	.LLST111
-	.uleb128 0x44
-	.4byte	.LVL458
-	.4byte	0x388f
-	.uleb128 0x44
-	.4byte	.LVL464
-	.4byte	0x38e8
-	.uleb128 0x34
-	.4byte	.LVL466
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC72
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 4
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF655
-	.byte	0x2
-	.2byte	0x9ae
-	.4byte	0xdba
-	.4byte	.LFB298
-	.4byte	.LFE298-.LFB298
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x38e8
-	.uleb128 0x52
-	.4byte	.LASF236
-	.byte	0x2
-	.2byte	0x9ae
-	.4byte	0xdba
-	.4byte	.LLST93
-	.uleb128 0x54
-	.4byte	.LASF656
-	.byte	0x2
-	.2byte	0x9b0
-	.4byte	0xdba
-	.4byte	.LLST94
-	.uleb128 0x54
-	.4byte	.LASF586
-	.byte	0x2
-	.2byte	0x9b1
-	.4byte	0xdba
-	.4byte	.LLST95
-	.uleb128 0x53
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x9b2
-	.4byte	0xdba
-	.4byte	.LLST96
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF657
-	.byte	0x2
-	.2byte	0x9a5
-	.4byte	0xdba
-	.4byte	.LFB297
-	.4byte	.LFE297-.LFB297
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3913
-	.uleb128 0x54
-	.4byte	.LASF651
-	.byte	0x2
-	.2byte	0x9a7
-	.4byte	0xdba
-	.4byte	.LLST92
-	.byte	0
-	.uleb128 0x5c
-	.4byte	.LASF658
-	.byte	0x2
-	.2byte	0x995
-	.4byte	0x50
-	.4byte	.LFB296
-	.4byte	.LFE296-.LFB296
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x398b
-	.uleb128 0x52
-	.4byte	.LASF623
-	.byte	0x2
-	.2byte	0x995
-	.4byte	0xdba
-	.4byte	.LLST88
-	.uleb128 0x54
-	.4byte	.LASF594
-	.byte	0x2
-	.2byte	0x997
-	.4byte	0xdba
-	.4byte	.LLST89
-	.uleb128 0x54
-	.4byte	.LASF596
-	.byte	0x2
-	.2byte	0x997
-	.4byte	0xdba
-	.4byte	.LLST90
-	.uleb128 0x54
-	.4byte	.LASF375
-	.byte	0x2
-	.2byte	0x998
-	.4byte	0xdba
-	.4byte	.LLST91
-	.uleb128 0x32
-	.4byte	.LVL272
-	.4byte	0x61df
-	.4byte	0x3981
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL273
-	.4byte	0x6812
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF659
-	.byte	0x2
-	.2byte	0x933
-	.4byte	0x50
-	.byte	0x1
-	.4byte	0x39b5
-	.uleb128 0x4c
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x935
-	.4byte	0x50
-	.uleb128 0x4f
-	.uleb128 0x4b
-	.4byte	.LASF613
-	.byte	0x2
-	.2byte	0x95a
-	.4byte	0x1d68
-	.byte	0
-	.byte	0
-	.uleb128 0x5f
-	.4byte	.LASF660
-	.byte	0x2
-	.2byte	0x914
-	.4byte	.LFB294
-	.4byte	.LFE294-.LFB294
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3a84
-	.uleb128 0x60
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x916
-	.4byte	0x50
-	.uleb128 0x1
-	.byte	0x55
-	.uleb128 0x60
-	.ascii	"ppa\000"
-	.byte	0x2
-	.2byte	0x917
-	.4byte	0xdc5
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -28
-	.uleb128 0x54
-	.4byte	.LASF661
-	.byte	0x2
-	.2byte	0x918
-	.4byte	0x2ab9
-	.4byte	.LLST239
-	.uleb128 0x32
-	.4byte	.LVL917
-	.4byte	0x92b5
-	.4byte	0x3a13
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC91
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL919
-	.4byte	0x526b
-	.4byte	0x3a32
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -28
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL920
-	.4byte	0x92b5
-	.4byte	0x3a4c
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL922
-	.4byte	0x26a8
-	.4byte	0x3a6a
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL923
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC93
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x5f
-	.4byte	.LASF662
-	.byte	0x2
-	.2byte	0x8e0
-	.4byte	.LFB293
-	.4byte	.LFE293-.LFB293
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3bd7
-	.uleb128 0x53
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x8e2
-	.4byte	0xdba
-	.4byte	.LLST266
-	.uleb128 0x53
-	.ascii	"lpn\000"
-	.byte	0x2
-	.2byte	0x8e3
-	.4byte	0xdc5
-	.4byte	.LLST267
-	.uleb128 0x28
-	.4byte	.LASF663
-	.byte	0x2
-	.2byte	0x8e4
-	.4byte	0xdc5
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x53
-	.ascii	"blk\000"
-	.byte	0x2
-	.2byte	0x8e5
-	.4byte	0xdba
-	.4byte	.LLST268
-	.uleb128 0x54
-	.4byte	.LASF664
-	.byte	0x2
-	.2byte	0x8e6
-	.4byte	0xdba
-	.4byte	.LLST269
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x3be7
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.9737
-	.uleb128 0x61
-	.4byte	.LBB275
-	.4byte	.LBE275-.LBB275
-	.4byte	0x3b2d
-	.uleb128 0x54
-	.4byte	.LASF236
-	.byte	0x2
-	.2byte	0x903
-	.4byte	0xdba
-	.4byte	.LLST270
-	.uleb128 0x34
-	.4byte	.LVL1088
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC96
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1081
-	.4byte	0x92b5
-	.4byte	0x3b4d
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC94
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR155
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1082
-	.4byte	0x22fb
-	.4byte	0x3b6e
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x2000
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1093
-	.4byte	0x92b5
-	.4byte	0x3b95
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR155
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x911
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1095
-	.4byte	0x526b
-	.4byte	0x3bb4
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1096
-	.4byte	0x616f
-	.uleb128 0x34
-	.4byte	.LVL1100
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC95
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xea
-	.4byte	0x3be7
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0xd
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x3bd7
-	.uleb128 0x5f
-	.4byte	.LASF665
-	.byte	0x2
-	.2byte	0x8c1
-	.4byte	.LFB292
-	.4byte	.LFE292-.LFB292
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3cee
-	.uleb128 0x53
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x8c3
-	.4byte	0xdba
-	.4byte	.LLST378
-	.uleb128 0x53
-	.ascii	"lpn\000"
-	.byte	0x2
-	.2byte	0x8c4
-	.4byte	0xdc5
-	.4byte	.LLST379
-	.uleb128 0x28
-	.4byte	.LASF663
-	.byte	0x2
-	.2byte	0x8c5
-	.4byte	0xdc5
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x53
-	.ascii	"blk\000"
-	.byte	0x2
-	.2byte	0x8c6
-	.4byte	0xdba
-	.4byte	.LLST380
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x3cfe
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.9721
-	.uleb128 0x32
-	.4byte	.LVL1611
-	.4byte	0x92b5
-	.4byte	0x3c6e
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC94
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR168
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1612
-	.4byte	0x22fb
-	.4byte	0x3c82
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1616
-	.4byte	0x526b
-	.4byte	0x3ca1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1617
-	.4byte	0x616f
-	.uleb128 0x32
-	.4byte	.LVL1621
-	.4byte	0x92b5
-	.4byte	0x3cc7
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC105
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1622
-	.4byte	0x32db
-	.4byte	0x3cdb
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1623
-	.4byte	0x536c
-	.uleb128 0x44
-	.4byte	.LVL1624
-	.4byte	0x4d67
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xea
-	.4byte	0x3cfe
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0x14
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x3cee
-	.uleb128 0x5f
-	.4byte	.LASF666
-	.byte	0x2
-	.2byte	0x89c
-	.4byte	.LFB291
-	.4byte	.LFE291-.LFB291
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3da6
-	.uleb128 0x52
-	.4byte	.LASF613
-	.byte	0x2
-	.2byte	0x89c
-	.4byte	0x1d68
-	.4byte	.LLST341
-	.uleb128 0x28
-	.4byte	.LASF667
-	.byte	0x2
-	.2byte	0x89e
-	.4byte	0xde6
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -44
-	.uleb128 0x28
-	.4byte	.LASF598
-	.byte	0x2
-	.2byte	0x89f
-	.4byte	0x2ab9
-	.uleb128 0x1
-	.byte	0x55
-	.uleb128 0x54
-	.4byte	.LASF668
-	.byte	0x2
-	.2byte	0x8a0
-	.4byte	0x50
-	.4byte	.LLST342
-	.uleb128 0x62
-	.4byte	.LASF384
-	.byte	0x2
-	.2byte	0x8a1
-	.4byte	0xdc5
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1440
-	.4byte	0x331b
-	.4byte	0x3d77
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1441
-	.4byte	0x2509
-	.4byte	0x3d9c
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -44
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1442
-	.4byte	0x3236
-	.byte	0
-	.uleb128 0x63
-	.4byte	.LASF669
-	.byte	0x2
-	.2byte	0x882
-	.4byte	.LFB290
-	.4byte	.LFE290-.LFB290
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3df7
-	.uleb128 0x32
-	.4byte	.LVL1563
-	.4byte	0x5030
-	.4byte	0x3dda
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL1564
-	.4byte	0x22fb
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x200
-	.byte	0
-	.byte	0
-	.uleb128 0x55
-	.4byte	.LASF671
-	.byte	0x2
-	.2byte	0x86e
-	.byte	0x1
-	.uleb128 0x5c
-	.4byte	.LASF672
-	.byte	0x2
-	.2byte	0x843
-	.4byte	0x50
-	.4byte	.LFB288
-	.4byte	.LFE288-.LFB288
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3f06
-	.uleb128 0x54
-	.4byte	.LASF649
-	.byte	0x2
-	.2byte	0x845
-	.4byte	0xdba
-	.4byte	.LLST260
-	.uleb128 0x54
-	.4byte	.LASF594
-	.byte	0x2
-	.2byte	0x845
-	.4byte	0xdba
-	.4byte	.LLST261
-	.uleb128 0x54
-	.4byte	.LASF596
-	.byte	0x2
-	.2byte	0x845
-	.4byte	0xdba
-	.4byte	.LLST262
-	.uleb128 0x54
-	.4byte	.LASF375
-	.byte	0x2
-	.2byte	0x845
-	.4byte	0xdba
-	.4byte	.LLST263
-	.uleb128 0x54
-	.4byte	.LASF673
-	.byte	0x2
-	.2byte	0x846
-	.4byte	0xdba
-	.4byte	.LLST264
-	.uleb128 0x54
-	.4byte	.LASF674
-	.byte	0x2
-	.2byte	0x846
-	.4byte	0xdba
-	.4byte	.LLST265
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x3f16
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.9696
-	.uleb128 0x32
-	.4byte	.LVL1056
-	.4byte	0x22fb
-	.4byte	0x3e9d
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1060
-	.4byte	0x61df
-	.4byte	0x3eb1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1061
-	.4byte	0x6812
-	.uleb128 0x32
-	.4byte	.LVL1069
-	.4byte	0x5e03
-	.4byte	0x3ece
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1076
-	.4byte	0x5dde
-	.4byte	0x3ee2
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL1078
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR154
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x86a
-	.byte	0
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xea
-	.4byte	0x3f16
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0x11
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x3f06
-	.uleb128 0x48
-	.4byte	.LASF675
-	.byte	0x2
-	.2byte	0x82d
-	.4byte	0x50
-	.4byte	.LFB287
-	.4byte	.LFE287-.LFB287
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3fb1
-	.uleb128 0x5d
-	.ascii	"p\000"
-	.byte	0x2
-	.2byte	0x82d
-	.4byte	0x1d68
-	.4byte	.LLST86
-	.uleb128 0x54
-	.4byte	.LASF594
-	.byte	0x2
-	.2byte	0x82f
-	.4byte	0xdba
-	.4byte	.LLST87
-	.uleb128 0x28
-	.4byte	.LASF596
-	.byte	0x2
-	.2byte	0x82f
-	.4byte	0xdba
-	.uleb128 0x1
-	.byte	0x5b
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x3316
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.9675
-	.uleb128 0x32
-	.4byte	.LVL259
-	.4byte	0x92b5
-	.4byte	0x3f97
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR60
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x831
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL262
-	.4byte	0x61df
-	.uleb128 0x34
-	.4byte	.LVL264
-	.4byte	0x6812
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF676
-	.byte	0x2
-	.2byte	0x820
-	.4byte	0x50
-	.4byte	.LFB286
-	.4byte	.LFE286-.LFB286
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4035
-	.uleb128 0x32
-	.4byte	.LVL1697
-	.4byte	0x405b
-	.4byte	0x3fdf
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1698
-	.4byte	0x4035
-	.4byte	0x3ff3
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1699
-	.4byte	0x405b
-	.4byte	0x4007
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1700
-	.4byte	0x4035
-	.4byte	0x401b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1701
-	.4byte	0x2d79
-	.uleb128 0x34
-	.4byte	.LVL1702
-	.4byte	0x3236
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x9
-	.byte	0xff
-	.byte	0
-	.byte	0
-	.uleb128 0x64
-	.4byte	.LASF712
-	.byte	0x2
-	.2byte	0x80d
-	.byte	0x1
-	.4byte	0x405b
-	.uleb128 0x4a
-	.4byte	.LASF639
-	.byte	0x2
-	.2byte	0x80d
-	.4byte	0x1d68
-	.uleb128 0x4b
-	.4byte	.LASF596
-	.byte	0x2
-	.2byte	0x80f
-	.4byte	0xdba
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF677
-	.byte	0x2
-	.2byte	0x6a8
-	.4byte	0x50
-	.4byte	.LFB284
-	.4byte	.LFE284-.LFB284
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x45b4
-	.uleb128 0x52
-	.4byte	.LASF613
-	.byte	0x2
-	.2byte	0x6a8
-	.4byte	0x1d68
-	.4byte	.LLST315
-	.uleb128 0x54
-	.4byte	.LASF678
-	.byte	0x2
-	.2byte	0x6aa
-	.4byte	0xdba
-	.4byte	.LLST316
-	.uleb128 0x54
-	.4byte	.LASF679
-	.byte	0x2
-	.2byte	0x6aa
-	.4byte	0xdba
-	.4byte	.LLST317
-	.uleb128 0x54
-	.4byte	.LASF594
-	.byte	0x2
-	.2byte	0x6ab
-	.4byte	0xdba
-	.4byte	.LLST318
-	.uleb128 0x54
-	.4byte	.LASF382
-	.byte	0x2
-	.2byte	0x6ab
-	.4byte	0xdba
-	.4byte	.LLST319
-	.uleb128 0x54
-	.4byte	.LASF380
-	.byte	0x2
-	.2byte	0x6ab
-	.4byte	0xdba
-	.4byte	.LLST320
-	.uleb128 0x54
-	.4byte	.LASF680
-	.byte	0x2
-	.2byte	0x6ac
-	.4byte	0xdba
-	.4byte	.LLST321
-	.uleb128 0x54
-	.4byte	.LASF681
-	.byte	0x2
-	.2byte	0x6ac
-	.4byte	0xdba
-	.4byte	.LLST322
-	.uleb128 0x54
-	.4byte	.LASF596
-	.byte	0x2
-	.2byte	0x6ad
-	.4byte	0xdba
-	.4byte	.LLST323
-	.uleb128 0x54
-	.4byte	.LASF682
-	.byte	0x2
-	.2byte	0x6ae
-	.4byte	0x50
-	.4byte	.LLST324
-	.uleb128 0x54
-	.4byte	.LASF683
-	.byte	0x2
-	.2byte	0x6ae
-	.4byte	0x50
-	.4byte	.LLST324
-	.uleb128 0x54
-	.4byte	.LASF568
-	.byte	0x2
-	.2byte	0x6af
-	.4byte	0xdba
-	.4byte	.LLST326
-	.uleb128 0x53
-	.ascii	"n\000"
-	.byte	0x2
-	.2byte	0x6af
-	.4byte	0xdba
-	.4byte	.LLST327
-	.uleb128 0x53
-	.ascii	"req\000"
-	.byte	0x2
-	.2byte	0x6af
-	.4byte	0xdba
-	.4byte	.LLST328
-	.uleb128 0x53
-	.ascii	"lpa\000"
-	.byte	0x2
-	.2byte	0x6b0
-	.4byte	0xdc5
-	.4byte	.LLST329
-	.uleb128 0x28
-	.4byte	.LASF663
-	.byte	0x2
-	.2byte	0x6b0
-	.4byte	0xdc5
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -44
-	.uleb128 0x28
-	.4byte	.LASF624
-	.byte	0x2
-	.2byte	0x6b0
-	.4byte	0xdc5
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -40
-	.uleb128 0x28
-	.4byte	.LASF615
-	.byte	0x2
-	.2byte	0x6b0
-	.4byte	0xdc5
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x54
-	.4byte	.LASF629
-	.byte	0x2
-	.2byte	0x6b1
-	.4byte	0xdba
-	.4byte	.LLST330
-	.uleb128 0x54
-	.4byte	.LASF684
-	.byte	0x2
-	.2byte	0x6b1
-	.4byte	0xdba
-	.4byte	.LLST331
-	.uleb128 0x54
-	.4byte	.LASF685
-	.byte	0x2
-	.2byte	0x6b2
-	.4byte	0xdc5
-	.4byte	.LLST332
-	.uleb128 0x54
-	.4byte	.LASF686
-	.byte	0x2
-	.2byte	0x6b3
-	.4byte	0xdba
-	.4byte	.LLST333
-	.uleb128 0x54
-	.4byte	.LASF598
-	.byte	0x2
-	.2byte	0x6b4
-	.4byte	0x2ab9
-	.4byte	.LLST334
-	.uleb128 0x62
-	.4byte	.LASF687
-	.byte	0x2
-	.2byte	0x6b5
-	.4byte	0xdc5
-	.byte	0
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x45c4
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.9618
-	.uleb128 0x58
-	.4byte	.LASF689
-	.byte	0x2
-	.2byte	0x744
-	.4byte	.L1155
-	.uleb128 0x58
-	.4byte	.LASF619
-	.byte	0x2
-	.2byte	0x74c
-	.4byte	.L1170
-	.uleb128 0x58
-	.4byte	.LASF690
-	.byte	0x2
-	.2byte	0x7ff
-	.4byte	.L1178
-	.uleb128 0x4d
-	.4byte	.LASF691
-	.byte	0x2
-	.2byte	0x809
-	.uleb128 0x3e
-	.4byte	.Ldebug_ranges0+0x168
-	.4byte	0x4267
-	.uleb128 0x54
-	.4byte	.LASF692
-	.byte	0x2
-	.2byte	0x71c
-	.4byte	0xdc5
-	.4byte	.LLST335
-	.uleb128 0x54
-	.4byte	.LASF693
-	.byte	0x2
-	.2byte	0x71d
-	.4byte	0xdc5
-	.4byte	.LLST336
-	.uleb128 0x34
-	.4byte	.LVL1354
-	.4byte	0x26a8
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.byte	0
-	.uleb128 0x3e
-	.4byte	.Ldebug_ranges0+0x180
-	.4byte	0x433c
-	.uleb128 0x54
-	.4byte	.LASF694
-	.byte	0x2
-	.2byte	0x777
-	.4byte	0xdc5
-	.4byte	.LLST337
-	.uleb128 0x54
-	.4byte	.LASF695
-	.byte	0x2
-	.2byte	0x778
-	.4byte	0xdc5
-	.4byte	.LLST338
-	.uleb128 0x32
-	.4byte	.LVL1398
-	.4byte	0x26a8
-	.4byte	0x42a8
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1400
-	.4byte	0x3236
-	.uleb128 0x32
-	.4byte	.LVL1406
-	.4byte	0x526b
-	.4byte	0x42d0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -44
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1408
-	.4byte	0x612a
-	.4byte	0x42e4
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1409
-	.4byte	0x45c9
-	.4byte	0x42f8
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1411
-	.4byte	0x26a8
-	.4byte	0x4310
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1413
-	.4byte	0x612a
-	.4byte	0x4324
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x73
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL1414
-	.4byte	0x612a
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -52
-	.byte	0x6
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x61
-	.4byte	.LBB308
-	.4byte	.LBE308-.LBB308
-	.4byte	0x43b8
-	.uleb128 0x54
-	.4byte	.LASF696
-	.byte	0x2
-	.2byte	0x7b6
-	.4byte	0xdc5
-	.4byte	.LLST339
-	.uleb128 0x54
-	.4byte	.LASF695
-	.byte	0x2
-	.2byte	0x7b7
-	.4byte	0xdc5
-	.4byte	.LLST340
-	.uleb128 0x32
-	.4byte	.LVL1423
-	.4byte	0x26a8
-	.4byte	0x4381
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1424
-	.4byte	0x612a
-	.4byte	0x439c
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x7d
-	.sleb128 0
-	.byte	0x6
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL1426
-	.4byte	0x526b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -40
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1303
-	.4byte	0x605e
-	.4byte	0x43cb
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1309
-	.4byte	0x26a8
-	.4byte	0x43e4
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1315
-	.4byte	0x61a7
-	.uleb128 0x32
-	.4byte	.LVL1318
-	.4byte	0x46e1
-	.4byte	0x4401
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1322
-	.4byte	0x92b5
-	.4byte	0x4428
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR160
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x6db
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1323
-	.4byte	0x92b5
-	.4byte	0x444f
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR160
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x6dc
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1335
-	.4byte	0x612a
-	.4byte	0x4469
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1359
-	.4byte	0x4f1a
-	.4byte	0x4480
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR144
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1362
-	.4byte	0x26a8
-	.4byte	0x449b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -68
-	.byte	0x6
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1382
-	.4byte	0x61a7
-	.4byte	0x44b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x8
-	.byte	0x74
-	.sleb128 0
-	.byte	0x9
-	.byte	0xea
-	.byte	0x24
-	.byte	0x9
-	.byte	0xf4
-	.byte	0x25
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1387
-	.4byte	0x3236
-	.uleb128 0x32
-	.4byte	.LVL1392
-	.4byte	0x612a
-	.4byte	0x44d9
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x7d
-	.sleb128 0
-	.byte	0x6
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1395
-	.4byte	0x526b
-	.4byte	0x44f8
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -40
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1396
-	.4byte	0x612a
-	.4byte	0x4513
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x7d
-	.sleb128 0
-	.byte	0x6
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1401
-	.4byte	0x616f
-	.4byte	0x452d
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x8
-	.byte	0x77
-	.sleb128 0
-	.byte	0x9
-	.byte	0xea
-	.byte	0x24
-	.byte	0x9
-	.byte	0xf4
-	.byte	0x25
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1404
-	.4byte	0x92b5
-	.4byte	0x4554
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR160
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x7d6
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1418
-	.4byte	0x526b
-	.4byte	0x4573
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1419
-	.4byte	0x616f
-	.4byte	0x458d
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x8
-	.byte	0x77
-	.sleb128 0
-	.byte	0x9
-	.byte	0xea
-	.byte	0x24
-	.byte	0x9
-	.byte	0xf4
-	.byte	0x25
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1428
-	.4byte	0x92b5
-	.4byte	0x45aa
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC102
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1431
-	.4byte	0x3236
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xea
-	.4byte	0x45c4
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0x15
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x45b4
-	.uleb128 0x5f
-	.4byte	.LASF697
-	.byte	0x2
-	.2byte	0x68c
-	.4byte	.LFB283
-	.4byte	.LFE283-.LFB283
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x46e1
-	.uleb128 0x5d
-	.ascii	"lpa\000"
-	.byte	0x2
-	.2byte	0x68c
-	.4byte	0xdc5
-	.4byte	.LLST233
-	.uleb128 0x52
-	.4byte	.LASF663
-	.byte	0x2
-	.2byte	0x68c
-	.4byte	0xdc5
-	.4byte	.LLST234
-	.uleb128 0x54
-	.4byte	.LASF629
-	.byte	0x2
-	.2byte	0x68e
-	.4byte	0xdba
-	.4byte	.LLST235
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x3316
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.9584
-	.uleb128 0x3e
-	.4byte	.Ldebug_ranges0+0xe8
-	.4byte	0x46aa
-	.uleb128 0x53
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x692
-	.4byte	0xdba
-	.4byte	.LLST236
-	.uleb128 0x54
-	.4byte	.LASF586
-	.byte	0x2
-	.2byte	0x693
-	.4byte	0xdba
-	.4byte	.LLST237
-	.uleb128 0x54
-	.4byte	.LASF236
-	.byte	0x2
-	.2byte	0x694
-	.4byte	0xdba
-	.4byte	.LLST238
-	.uleb128 0x32
-	.4byte	.LVL907
-	.4byte	0x5c23
-	.4byte	0x4672
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR47
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL908
-	.4byte	0x92b5
-	.4byte	0x4699
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR146
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x698
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL909
-	.4byte	0x5dde
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL901
-	.4byte	0x616f
-	.4byte	0x46c5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9
-	.byte	0xea
-	.byte	0x24
-	.byte	0x9
-	.byte	0xf4
-	.byte	0x25
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL915
-	.4byte	0x526b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -28
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x5f
-	.4byte	.LASF698
-	.byte	0x2
-	.2byte	0x678
-	.4byte	.LFB282
-	.4byte	.LFE282-.LFB282
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4736
-	.uleb128 0x65
-	.4byte	.LASF613
-	.byte	0x2
-	.2byte	0x678
-	.4byte	0x1d68
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x52
-	.4byte	.LASF380
-	.byte	0x2
-	.2byte	0x678
-	.4byte	0xdba
-	.4byte	.LLST81
-	.uleb128 0x52
-	.4byte	.LASF382
-	.byte	0x2
-	.2byte	0x678
-	.4byte	0xdba
-	.4byte	.LLST82
-	.uleb128 0x54
-	.4byte	.LASF594
-	.byte	0x2
-	.2byte	0x67a
-	.4byte	0xdba
-	.4byte	.LLST83
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF699
-	.byte	0x2
-	.2byte	0x66f
-	.4byte	0x50
-	.4byte	.LFB281
-	.4byte	.LFE281-.LFB281
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x476d
-	.uleb128 0x44
-	.4byte	.LVL1047
-	.4byte	0x476d
-	.uleb128 0x34
-	.4byte	.LVL1048
-	.4byte	0x47e5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR144
-	.byte	0
-	.byte	0
-	.uleb128 0x5f
-	.4byte	.LASF700
-	.byte	0x2
-	.2byte	0x658
-	.4byte	.LFB280
-	.4byte	.LFE280-.LFB280
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x47b7
-	.uleb128 0x54
-	.4byte	.LASF330
-	.byte	0x2
-	.2byte	0x65a
-	.4byte	0xdba
-	.4byte	.LLST259
-	.uleb128 0x32
-	.4byte	.LVL1044
-	.4byte	0x22fb
-	.4byte	0x47a6
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL1045
-	.4byte	0x22fb
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF701
-	.byte	0x2
-	.2byte	0x648
-	.4byte	0x50
-	.4byte	.LFB279
-	.4byte	.LFE279-.LFB279
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x47e5
-	.uleb128 0x34
-	.4byte	.LVL1043
-	.4byte	0x47e5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR149
-	.byte	0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF702
-	.byte	0x2
-	.2byte	0x5ea
-	.4byte	0x50
-	.4byte	.LFB278
-	.4byte	.LFE278-.LFB278
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4988
-	.uleb128 0x52
-	.4byte	.LASF703
-	.byte	0x2
-	.2byte	0x5ea
-	.4byte	0x4988
-	.4byte	.LLST251
-	.uleb128 0x54
-	.4byte	.LASF704
-	.byte	0x2
-	.2byte	0x5ec
-	.4byte	0xddb
-	.4byte	.LLST252
-	.uleb128 0x54
-	.4byte	.LASF299
-	.byte	0x2
-	.2byte	0x5ec
-	.4byte	0xddb
-	.4byte	.LLST253
-	.uleb128 0x54
-	.4byte	.LASF705
-	.byte	0x2
-	.2byte	0x5ed
-	.4byte	0xddb
-	.4byte	.LLST254
-	.uleb128 0x54
-	.4byte	.LASF330
-	.byte	0x2
-	.2byte	0x5ee
-	.4byte	0xdba
-	.4byte	.LLST255
-	.uleb128 0x28
-	.4byte	.LASF706
-	.byte	0x2
-	.2byte	0x5ef
-	.4byte	0xff2
-	.uleb128 0x1
-	.byte	0x58
-	.uleb128 0x54
-	.4byte	.LASF310
-	.byte	0x2
-	.2byte	0x5f0
-	.4byte	0x10e9
-	.4byte	.LLST256
-	.uleb128 0x54
-	.4byte	.LASF311
-	.byte	0x2
-	.2byte	0x5f1
-	.4byte	0xff2
-	.4byte	.LLST257
-	.uleb128 0x28
-	.4byte	.LASF307
-	.byte	0x2
-	.2byte	0x5f2
-	.4byte	0xdba
-	.uleb128 0x1
-	.byte	0x5b
-	.uleb128 0x54
-	.4byte	.LASF707
-	.byte	0x2
-	.2byte	0x5f3
-	.4byte	0xdba
-	.4byte	.LLST258
-	.uleb128 0x28
-	.4byte	.LASF708
-	.byte	0x2
-	.2byte	0x5f4
-	.4byte	0x498e
-	.uleb128 0x1
-	.byte	0x57
-	.uleb128 0x32
-	.4byte	.LVL1007
-	.4byte	0x22fb
-	.4byte	0x48cb
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x4
-	.byte	0x7b
-	.sleb128 0
-	.byte	0x32
-	.byte	0x24
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1012
-	.4byte	0x605e
-	.4byte	0x48de
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1018
-	.4byte	0x5896
-	.4byte	0x48f2
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1019
-	.4byte	0x583e
-	.4byte	0x4906
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1020
-	.4byte	0x56f4
-	.4byte	0x491a
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1021
-	.4byte	0x56f4
-	.4byte	0x492e
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1024
-	.4byte	0x26a8
-	.4byte	0x494f
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR106
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1029
-	.4byte	0x26a8
-	.4byte	0x496d
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL1033
-	.4byte	0x26a8
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x1040
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x1271
-	.uleb128 0x5c
-	.4byte	.LASF709
-	.byte	0x2
-	.2byte	0x580
-	.4byte	0x50
-	.4byte	.LFB277
-	.4byte	.LFE277-.LFB277
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4b02
-	.uleb128 0x54
-	.4byte	.LASF705
-	.byte	0x2
-	.2byte	0x582
-	.4byte	0xddb
-	.4byte	.LLST447
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x26a3
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.9521
-	.uleb128 0x32
-	.4byte	.LVL1954
-	.4byte	0x22fb
-	.4byte	0x49e0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1955
-	.4byte	0x605e
-	.4byte	0x49f3
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1957
-	.4byte	0x92b5
-	.4byte	0x4a1a
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR179
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x59d
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1958
-	.4byte	0x92b5
-	.4byte	0x4a41
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR179
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x59f
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1960
-	.4byte	0x2295
-	.4byte	0x4a5b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1961
-	.4byte	0x2295
-	.uleb128 0x44
-	.4byte	.LVL1962
-	.4byte	0x2295
-	.uleb128 0x32
-	.4byte	.LVL1964
-	.4byte	0x92b5
-	.4byte	0x4a94
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR179
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x5b5
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1965
-	.4byte	0x3f1b
-	.4byte	0x4aab
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR51
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1966
-	.4byte	0x3f1b
-	.4byte	0x4abf
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1967
-	.4byte	0x3f1b
-	.4byte	0x4ad3
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1968
-	.4byte	0x3f1b
-	.4byte	0x4ae7
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL1970
-	.4byte	0x26a8
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF710
-	.byte	0x2
-	.2byte	0x57b
-	.4byte	0x50
-	.4byte	.LFB276
-	.4byte	.LFE276-.LFB276
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4b2d
-	.uleb128 0x52
-	.4byte	.LASF711
-	.byte	0x2
-	.2byte	0x57b
-	.4byte	0xdba
-	.4byte	.LLST80
-	.byte	0
-	.uleb128 0x64
-	.4byte	.LASF713
-	.byte	0x2
-	.2byte	0x573
-	.byte	0x1
-	.4byte	0x4b53
-	.uleb128 0x4a
-	.4byte	.LASF711
-	.byte	0x2
-	.2byte	0x573
-	.4byte	0xdba
-	.uleb128 0x4a
-	.4byte	.LASF590
-	.byte	0x2
-	.2byte	0x573
-	.4byte	0x50
-	.byte	0
-	.uleb128 0x51
-	.4byte	.LASF715
-	.byte	0x2
-	.2byte	0x566
-	.4byte	0x50
-	.byte	0x1
-	.uleb128 0x48
-	.4byte	.LASF716
-	.byte	0x2
-	.2byte	0x477
-	.4byte	0x50
-	.4byte	.LFB273
-	.4byte	.LFE273-.LFB273
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4d67
-	.uleb128 0x54
-	.4byte	.LASF594
-	.byte	0x2
-	.2byte	0x479
-	.4byte	0xdba
-	.4byte	.LLST245
-	.uleb128 0x28
-	.4byte	.LASF717
-	.byte	0x2
-	.2byte	0x479
-	.4byte	0xdba
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -60
-	.uleb128 0x54
-	.4byte	.LASF388
-	.byte	0x2
-	.2byte	0x47a
-	.4byte	0xdba
-	.4byte	.LLST246
-	.uleb128 0x54
-	.4byte	.LASF568
-	.byte	0x2
-	.2byte	0x47a
-	.4byte	0xdba
-	.4byte	.LLST247
-	.uleb128 0x53
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x47b
-	.4byte	0xddb
-	.4byte	.LLST248
-	.uleb128 0x53
-	.ascii	"j\000"
-	.byte	0x2
-	.2byte	0x47b
-	.4byte	0xddb
-	.4byte	.LLST249
-	.uleb128 0x54
-	.4byte	.LASF718
-	.byte	0x2
-	.2byte	0x47c
-	.4byte	0x498e
-	.4byte	.LLST250
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x3be7
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.9464
-	.uleb128 0x32
-	.4byte	.LVL945
-	.4byte	0x22fb
-	.4byte	0x4c08
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL946
-	.4byte	0x22fb
-	.4byte	0x4c1c
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL947
-	.4byte	0x22fb
-	.4byte	0x4c30
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL948
-	.4byte	0x22fb
-	.4byte	0x4c44
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL949
-	.4byte	0x22fb
-	.4byte	0x4c66
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR79
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x3c
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL952
-	.4byte	0x61df
-	.4byte	0x4c7c
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -60
-	.byte	0x94
-	.byte	0x2
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL954
-	.4byte	0x6812
-	.4byte	0x4c92
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -44
-	.byte	0x94
-	.byte	0x2
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL960
-	.4byte	0x26a8
-	.4byte	0x4cb1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL963
-	.4byte	0x26a8
-	.4byte	0x4cc9
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL965
-	.4byte	0x5fb2
-	.4byte	0x4ce2
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL972
-	.4byte	0x92b5
-	.4byte	0x4d09
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR148
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x4bb
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL981
-	.4byte	0x92b5
-	.4byte	0x4d30
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR148
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x4e4
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL990
-	.4byte	0x5fb2
-	.4byte	0x4d43
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL992
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR148
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x561
-	.byte	0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF719
-	.byte	0x2
-	.2byte	0x41c
-	.4byte	0x50
-	.4byte	.LFB272
-	.4byte	.LFE272-.LFB272
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4ec8
-	.uleb128 0x54
-	.4byte	.LASF300
-	.byte	0x2
-	.2byte	0x41e
-	.4byte	0xdba
-	.4byte	.LLST369
-	.uleb128 0x54
-	.4byte	.LASF720
-	.byte	0x2
-	.2byte	0x41f
-	.4byte	0x4ec8
-	.4byte	.LLST370
-	.uleb128 0x54
-	.4byte	.LASF721
-	.byte	0x2
-	.2byte	0x420
-	.4byte	0xdba
-	.4byte	.LLST371
-	.uleb128 0x4d
-	.4byte	.LASF722
-	.byte	0x2
-	.2byte	0x44d
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x26a3
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.9442
-	.uleb128 0x32
-	.4byte	.LVL1568
-	.4byte	0x22fb
-	.4byte	0x4ddc
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1569
-	.4byte	0x2295
-	.4byte	0x4df9
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR39
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1570
-	.4byte	0x2295
-	.uleb128 0x44
-	.4byte	.LVL1571
-	.4byte	0x2295
-	.uleb128 0x32
-	.4byte	.LVL1572
-	.4byte	0x4fb4
-	.4byte	0x4e1f
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1574
-	.4byte	0x2509
-	.4byte	0x4e42
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1576
-	.4byte	0x5e28
-	.uleb128 0x32
-	.4byte	.LVL1577
-	.4byte	0x2509
-	.4byte	0x4e6e
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1578
-	.4byte	0x92b5
-	.4byte	0x4e95
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR166
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x464
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1581
-	.4byte	0x92b5
-	.4byte	0x4eb2
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC104
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL1582
-	.4byte	0x5fb2
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x12c9
-	.uleb128 0x64
-	.4byte	.LASF723
-	.byte	0x2
-	.2byte	0x3e3
-	.byte	0x1
-	.4byte	0x4f1a
-	.uleb128 0x4f
-	.uleb128 0x4c
-	.ascii	"lpa\000"
-	.byte	0x2
-	.2byte	0x3e8
-	.4byte	0xdc5
-	.uleb128 0x4c
-	.ascii	"ppa\000"
-	.byte	0x2
-	.2byte	0x3e9
-	.4byte	0xdc5
-	.uleb128 0x4b
-	.4byte	.LASF724
-	.byte	0x2
-	.2byte	0x3ea
-	.4byte	0xdc5
-	.uleb128 0x4b
-	.4byte	.LASF667
-	.byte	0x2
-	.2byte	0x3eb
-	.4byte	0xde6
-	.uleb128 0x4b
-	.4byte	.LASF598
-	.byte	0x2
-	.2byte	0x3ec
-	.4byte	0x2ab9
-	.byte	0
-	.byte	0
-	.uleb128 0x5f
-	.4byte	.LASF725
-	.byte	0x2
-	.2byte	0x3b1
-	.4byte	.LFB270
-	.4byte	.LFE270-.LFB270
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4fb4
-	.uleb128 0x52
-	.4byte	.LASF703
-	.byte	0x2
-	.2byte	0x3b1
-	.4byte	0x4988
-	.4byte	.LLST241
-	.uleb128 0x53
-	.ascii	"ppa\000"
-	.byte	0x2
-	.2byte	0x3b3
-	.4byte	0xdc5
-	.4byte	.LLST242
-	.uleb128 0x54
-	.4byte	.LASF317
-	.byte	0x2
-	.2byte	0x3b4
-	.4byte	0xdba
-	.4byte	.LLST243
-	.uleb128 0x54
-	.4byte	.LASF706
-	.byte	0x2
-	.2byte	0x3b5
-	.4byte	0xff2
-	.4byte	.LLST244
-	.uleb128 0x32
-	.4byte	.LVL939
-	.4byte	0x26a8
-	.4byte	0x4f8e
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x43
-	.4byte	.LVL941
-	.4byte	0x5470
-	.4byte	0x4fa3
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL943
-	.4byte	0x22fb
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.byte	0
-	.uleb128 0x64
-	.4byte	.LASF726
-	.byte	0x2
-	.2byte	0x3a2
-	.byte	0x1
-	.4byte	0x4fd8
-	.uleb128 0x4a
-	.4byte	.LASF393
-	.byte	0x2
-	.2byte	0x3a2
-	.4byte	0xdc5
-	.uleb128 0x4c
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x3a4
-	.4byte	0xdba
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF727
-	.byte	0x2
-	.2byte	0x38d
-	.4byte	0x50
-	.4byte	.LFB268
-	.4byte	.LFE268-.LFB268
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5030
-	.uleb128 0x52
-	.4byte	.LASF728
-	.byte	0x2
-	.2byte	0x38d
-	.4byte	0xdc5
-	.4byte	.LLST359
-	.uleb128 0x54
-	.4byte	.LASF729
-	.byte	0x2
-	.2byte	0x38f
-	.4byte	0xdc5
-	.4byte	.LLST360
-	.uleb128 0x32
-	.4byte	.LVL1540
-	.4byte	0x5148
-	.4byte	0x5026
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x40
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1541
-	.4byte	0x3df7
-	.byte	0
-	.uleb128 0x5c
-	.4byte	.LASF730
-	.byte	0x2
-	.2byte	0x367
-	.4byte	0xdc5
-	.4byte	.LFB267
-	.4byte	.LFE267-.LFB267
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5142
-	.uleb128 0x52
-	.4byte	.LASF731
-	.byte	0x2
-	.2byte	0x367
-	.4byte	0xdc5
-	.4byte	.LLST361
-	.uleb128 0x52
-	.4byte	.LASF732
-	.byte	0x2
-	.2byte	0x367
-	.4byte	0xdc5
-	.4byte	.LLST362
-	.uleb128 0x52
-	.4byte	.LASF733
-	.byte	0x2
-	.2byte	0x367
-	.4byte	0x5142
-	.4byte	.LLST363
-	.uleb128 0x53
-	.ascii	"len\000"
-	.byte	0x2
-	.2byte	0x369
-	.4byte	0xdba
-	.4byte	.LLST364
-	.uleb128 0x54
-	.4byte	.LASF734
-	.byte	0x2
-	.2byte	0x369
-	.4byte	0xdba
-	.4byte	.LLST365
-	.uleb128 0x53
-	.ascii	"ppn\000"
-	.byte	0x2
-	.2byte	0x36a
-	.4byte	0xdc5
-	.4byte	.LLST366
-	.uleb128 0x54
-	.4byte	.LASF735
-	.byte	0x2
-	.2byte	0x36b
-	.4byte	0xdc5
-	.4byte	.LLST367
-	.uleb128 0x60
-	.ascii	"req\000"
-	.byte	0x2
-	.2byte	0x36c
-	.4byte	0xde6
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -116
-	.uleb128 0x54
-	.4byte	.LASF736
-	.byte	0x2
-	.2byte	0x36d
-	.4byte	0xdc5
-	.4byte	.LLST368
-	.uleb128 0x28
-	.4byte	.LASF564
-	.byte	0x2
-	.2byte	0x36e
-	.4byte	0x2443
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -96
-	.uleb128 0x32
-	.4byte	.LVL1551
-	.4byte	0x26a8
-	.4byte	0x5109
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -116
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1553
-	.4byte	0x2295
-	.4byte	0x5123
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL1558
-	.4byte	0x22fb
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -124
-	.byte	0x6
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0xdaf
-	.uleb128 0x5c
-	.4byte	.LASF737
-	.byte	0x2
-	.2byte	0x342
-	.4byte	0xdc5
-	.4byte	.LFB266
-	.4byte	.LFE266-.LFB266
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x526b
-	.uleb128 0x52
-	.4byte	.LASF731
-	.byte	0x2
-	.2byte	0x342
-	.4byte	0xdc5
-	.4byte	.LLST351
-	.uleb128 0x52
-	.4byte	.LASF732
-	.byte	0x2
-	.2byte	0x342
-	.4byte	0xdc5
-	.4byte	.LLST352
-	.uleb128 0x52
-	.4byte	.LASF733
-	.byte	0x2
-	.2byte	0x342
-	.4byte	0x5142
-	.4byte	.LLST353
-	.uleb128 0x53
-	.ascii	"len\000"
-	.byte	0x2
-	.2byte	0x344
-	.4byte	0xdba
-	.4byte	.LLST354
-	.uleb128 0x54
-	.4byte	.LASF734
-	.byte	0x2
-	.2byte	0x344
-	.4byte	0xdba
-	.4byte	.LLST355
-	.uleb128 0x53
-	.ascii	"ppn\000"
-	.byte	0x2
-	.2byte	0x345
-	.4byte	0xdc5
-	.4byte	.LLST356
-	.uleb128 0x54
-	.4byte	.LASF735
-	.byte	0x2
-	.2byte	0x346
-	.4byte	0xdc5
-	.4byte	.LLST357
-	.uleb128 0x60
-	.ascii	"req\000"
-	.byte	0x2
-	.2byte	0x347
-	.4byte	0xde6
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -116
-	.uleb128 0x54
-	.4byte	.LASF736
-	.byte	0x2
-	.2byte	0x348
-	.4byte	0xdc5
-	.4byte	.LLST358
-	.uleb128 0x28
-	.4byte	.LASF564
-	.byte	0x2
-	.2byte	0x349
-	.4byte	0x2443
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -96
-	.uleb128 0x32
-	.4byte	.LVL1522
-	.4byte	0x26a8
-	.4byte	0x5221
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -116
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1525
-	.4byte	0x2295
-	.4byte	0x523e
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x7d
-	.sleb128 0
-	.byte	0x6
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -128
-	.byte	0x6
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1527
-	.4byte	0x5470
-	.4byte	0x525b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR149
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 -1
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL1532
-	.4byte	0x22fb
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF738
-	.byte	0x2
-	.2byte	0x321
-	.4byte	0x50
-	.4byte	.LFB265
-	.4byte	.LFE265-.LFB265
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5357
-	.uleb128 0x5d
-	.ascii	"lpn\000"
-	.byte	0x2
-	.2byte	0x321
-	.4byte	0xdc5
-	.4byte	.LLST229
-	.uleb128 0x5d
-	.ascii	"ppn\000"
-	.byte	0x2
-	.2byte	0x321
-	.4byte	0xff2
-	.4byte	.LLST230
-	.uleb128 0x52
-	.4byte	.LASF739
-	.byte	0x2
-	.2byte	0x321
-	.4byte	0x50
-	.4byte	.LLST231
-	.uleb128 0x54
-	.4byte	.LASF740
-	.byte	0x2
-	.2byte	0x323
-	.4byte	0xdba
-	.4byte	.LLST232
-	.uleb128 0x28
-	.4byte	.LASF741
-	.byte	0x2
-	.2byte	0x323
-	.4byte	0xdba
-	.uleb128 0x1
-	.byte	0x58
-	.uleb128 0x28
-	.4byte	.LASF742
-	.byte	0x2
-	.2byte	0x323
-	.4byte	0xdba
-	.uleb128 0x1
-	.byte	0x54
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x5367
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.9369
-	.uleb128 0x58
-	.4byte	.LASF743
-	.byte	0x2
-	.2byte	0x32c
-	.4byte	.L747
-	.uleb128 0x32
-	.4byte	.LVL888
-	.4byte	0x92b5
-	.4byte	0x5323
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR145
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x328
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL891
-	.4byte	0x53a7
-	.uleb128 0x32
-	.4byte	.LVL893
-	.4byte	0x5422
-	.4byte	0x5340
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL894
-	.4byte	0x5965
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xea
-	.4byte	0x5367
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0x8
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x5357
-	.uleb128 0x48
-	.4byte	.LASF744
-	.byte	0x2
-	.2byte	0x314
-	.4byte	0x50
-	.4byte	.LFB264
-	.4byte	.LFE264-.LFB264
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x53a7
-	.uleb128 0x53
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x316
-	.4byte	0xdba
-	.4byte	.LLST314
-	.uleb128 0x44
-	.4byte	.LVL1289
-	.4byte	0x4ece
-	.uleb128 0x44
-	.4byte	.LVL1293
-	.4byte	0x5422
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF745
-	.byte	0x2
-	.2byte	0x2ec
-	.4byte	0xdba
-	.4byte	.LFB263
-	.4byte	.LFE263-.LFB263
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5422
-	.uleb128 0x53
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x2ee
-	.4byte	0xdba
-	.4byte	.LLST74
-	.uleb128 0x54
-	.4byte	.LASF746
-	.byte	0x2
-	.2byte	0x2ef
-	.4byte	0xdba
-	.4byte	.LLST75
-	.uleb128 0x54
-	.4byte	.LASF747
-	.byte	0x2
-	.2byte	0x2f0
-	.4byte	0xdc5
-	.4byte	.LLST76
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x45c4
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.9352
-	.uleb128 0x34
-	.4byte	.LVL221
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR57
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x310
-	.byte	0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF748
-	.byte	0x2
-	.2byte	0x2e2
-	.4byte	0x50
-	.4byte	.LFB262
-	.4byte	.LFE262-.LFB262
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5470
-	.uleb128 0x52
-	.4byte	.LASF740
-	.byte	0x2
-	.2byte	0x2e2
-	.4byte	0xdba
-	.4byte	.LLST227
-	.uleb128 0x54
-	.4byte	.LASF317
-	.byte	0x2
-	.2byte	0x2e4
-	.4byte	0xdc5
-	.4byte	.LLST228
-	.uleb128 0x34
-	.4byte	.LVL881
-	.4byte	0x5470
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR144
-	.byte	0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF749
-	.byte	0x2
-	.2byte	0x2a7
-	.4byte	0x50
-	.4byte	.LFB261
-	.4byte	.LFE261-.LFB261
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x55cf
-	.uleb128 0x52
-	.4byte	.LASF703
-	.byte	0x2
-	.2byte	0x2a7
-	.4byte	0x4988
-	.4byte	.LLST214
-	.uleb128 0x52
-	.4byte	.LASF317
-	.byte	0x2
-	.2byte	0x2a7
-	.4byte	0xdc5
-	.4byte	.LLST215
-	.uleb128 0x52
-	.4byte	.LASF733
-	.byte	0x2
-	.2byte	0x2a7
-	.4byte	0xff2
-	.4byte	.LLST216
-	.uleb128 0x54
-	.4byte	.LASF388
-	.byte	0x2
-	.2byte	0x2a9
-	.4byte	0xdc5
-	.4byte	.LLST217
-	.uleb128 0x54
-	.4byte	.LASF708
-	.byte	0x2
-	.2byte	0x2aa
-	.4byte	0x498e
-	.4byte	.LLST218
-	.uleb128 0x54
-	.4byte	.LASF721
-	.byte	0x2
-	.2byte	0x2ab
-	.4byte	0xdba
-	.4byte	.LLST219
-	.uleb128 0x4d
-	.4byte	.LASF750
-	.byte	0x2
-	.2byte	0x2ad
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x3316
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.9327
-	.uleb128 0x32
-	.4byte	.LVL843
-	.4byte	0x55cf
-	.4byte	0x5515
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL844
-	.4byte	0x92b5
-	.4byte	0x553c
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR142
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x2bb
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL845
-	.4byte	0x92b5
-	.4byte	0x5563
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR142
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x2bc
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL847
-	.4byte	0x22fb
-	.4byte	0x557b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x40
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL850
-	.4byte	0x2509
-	.4byte	0x559e
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL852
-	.4byte	0x92b5
-	.4byte	0x55b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC89
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL853
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC90
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF751
-	.byte	0x2
-	.2byte	0x277
-	.4byte	0x50
-	.4byte	.LFB260
-	.4byte	.LFE260-.LFB260
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x56df
-	.uleb128 0x52
-	.4byte	.LASF703
-	.byte	0x2
-	.2byte	0x277
-	.4byte	0x4988
-	.4byte	.LLST208
-	.uleb128 0x4b
-	.4byte	.LASF388
-	.byte	0x2
-	.2byte	0x279
-	.4byte	0xdba
-	.uleb128 0x54
-	.4byte	.LASF330
-	.byte	0x2
-	.2byte	0x279
-	.4byte	0xdba
-	.4byte	.LLST209
-	.uleb128 0x54
-	.4byte	.LASF752
-	.byte	0x2
-	.2byte	0x27a
-	.4byte	0xdba
-	.4byte	.LLST210
-	.uleb128 0x54
-	.4byte	.LASF753
-	.byte	0x2
-	.2byte	0x27b
-	.4byte	0x10e9
-	.4byte	.LLST211
-	.uleb128 0x54
-	.4byte	.LASF706
-	.byte	0x2
-	.2byte	0x27c
-	.4byte	0xff2
-	.4byte	.LLST212
-	.uleb128 0x54
-	.4byte	.LASF708
-	.byte	0x2
-	.2byte	0x27d
-	.4byte	0x498e
-	.4byte	.LLST213
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x56ef
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.9313
-	.uleb128 0x32
-	.4byte	.LVL821
-	.4byte	0x92b5
-	.4byte	0x568b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR141
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x281
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL822
-	.4byte	0x5e28
-	.uleb128 0x32
-	.4byte	.LVL829
-	.4byte	0x22fb
-	.4byte	0x56a8
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL834
-	.4byte	0x2509
-	.4byte	0x56ce
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR106
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL835
-	.4byte	0x56f4
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xea
-	.4byte	0x56ef
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0x1e
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x56df
-	.uleb128 0x48
-	.4byte	.LASF754
-	.byte	0x2
-	.2byte	0x249
-	.4byte	0x50
-	.4byte	.LFB259
-	.4byte	.LFE259-.LFB259
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x583e
-	.uleb128 0x52
-	.4byte	.LASF703
-	.byte	0x2
-	.2byte	0x249
-	.4byte	0x4988
-	.4byte	.LLST220
-	.uleb128 0x54
-	.4byte	.LASF755
-	.byte	0x2
-	.2byte	0x24b
-	.4byte	0xdba
-	.4byte	.LLST221
-	.uleb128 0x54
-	.4byte	.LASF756
-	.byte	0x2
-	.2byte	0x24c
-	.4byte	0xdba
-	.4byte	.LLST222
-	.uleb128 0x54
-	.4byte	.LASF330
-	.byte	0x2
-	.2byte	0x24d
-	.4byte	0xdba
-	.4byte	.LLST223
-	.uleb128 0x54
-	.4byte	.LASF753
-	.byte	0x2
-	.2byte	0x24e
-	.4byte	0x10e9
-	.4byte	.LLST224
-	.uleb128 0x54
-	.4byte	.LASF706
-	.byte	0x2
-	.2byte	0x24f
-	.4byte	0xff2
-	.4byte	.LLST225
-	.uleb128 0x54
-	.4byte	.LASF708
-	.byte	0x2
-	.2byte	0x250
-	.4byte	0x498e
-	.4byte	.LLST226
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x26a3
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.9299
-	.uleb128 0x32
-	.4byte	.LVL858
-	.4byte	0x5896
-	.4byte	0x57a1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL861
-	.4byte	0x583e
-	.4byte	0x57b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL864
-	.4byte	0x5fb2
-	.4byte	0x57ce
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL866
-	.4byte	0x583e
-	.4byte	0x57e2
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL871
-	.4byte	0x26a8
-	.4byte	0x5800
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL872
-	.4byte	0x92b5
-	.4byte	0x5827
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR143
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x265
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL876
-	.4byte	0x5470
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF757
-	.byte	0x2
-	.2byte	0x231
-	.4byte	0x50
-	.byte	0x1
-	.4byte	0x5881
-	.uleb128 0x4a
-	.4byte	.LASF703
-	.byte	0x2
-	.2byte	0x231
-	.4byte	0x4988
-	.uleb128 0x4b
-	.4byte	.LASF758
-	.byte	0x2
-	.2byte	0x233
-	.4byte	0xdba
-	.uleb128 0x4b
-	.4byte	.LASF753
-	.byte	0x2
-	.2byte	0x234
-	.4byte	0x10e9
-	.uleb128 0x4e
-	.4byte	.LASF573
-	.4byte	0x5891
-	.4byte	.LASF757
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xea
-	.4byte	0x5891
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0x19
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x5881
-	.uleb128 0x48
-	.4byte	.LASF759
-	.byte	0x2
-	.2byte	0x209
-	.4byte	0x50
-	.4byte	.LFB257
-	.4byte	.LFE257-.LFB257
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5965
-	.uleb128 0x52
-	.4byte	.LASF703
-	.byte	0x2
-	.2byte	0x209
-	.4byte	0x4988
-	.4byte	.LLST201
-	.uleb128 0x28
-	.4byte	.LASF753
-	.byte	0x2
-	.2byte	0x20b
-	.4byte	0x10e9
-	.uleb128 0x1
-	.byte	0x5a
-	.uleb128 0x54
-	.4byte	.LASF706
-	.byte	0x2
-	.2byte	0x20c
-	.4byte	0xff2
-	.4byte	.LLST202
-	.uleb128 0x28
-	.4byte	.LASF760
-	.byte	0x2
-	.2byte	0x20d
-	.4byte	0x10e9
-	.uleb128 0x1
-	.byte	0x55
-	.uleb128 0x54
-	.4byte	.LASF388
-	.byte	0x2
-	.2byte	0x20e
-	.4byte	0xdba
-	.4byte	.LLST203
-	.uleb128 0x54
-	.4byte	.LASF330
-	.byte	0x2
-	.2byte	0x20e
-	.4byte	0xdba
-	.4byte	.LLST204
-	.uleb128 0x54
-	.4byte	.LASF758
-	.byte	0x2
-	.2byte	0x20f
-	.4byte	0xdba
-	.4byte	.LLST205
-	.uleb128 0x54
-	.4byte	.LASF761
-	.byte	0x2
-	.2byte	0x210
-	.4byte	0xdba
-	.4byte	.LLST206
-	.uleb128 0x54
-	.4byte	.LASF756
-	.byte	0x2
-	.2byte	0x211
-	.4byte	0xdba
-	.4byte	.LLST207
-	.uleb128 0x32
-	.4byte	.LVL798
-	.4byte	0x22fb
-	.4byte	0x5955
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL815
-	.4byte	0x5fb2
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF762
-	.byte	0x2
-	.2byte	0x1e7
-	.4byte	0x50
-	.4byte	.LFB256
-	.4byte	.LFE256-.LFB256
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5aa7
-	.uleb128 0x52
-	.4byte	.LASF317
-	.byte	0x2
-	.2byte	0x1e7
-	.4byte	0xdba
-	.4byte	.LLST199
-	.uleb128 0x52
-	.4byte	.LASF740
-	.byte	0x2
-	.2byte	0x1e7
-	.4byte	0xdba
-	.4byte	.LLST200
-	.uleb128 0x28
-	.4byte	.LASF708
-	.byte	0x2
-	.2byte	0x1e9
-	.4byte	0x498e
-	.uleb128 0x1
-	.byte	0x5a
-	.uleb128 0x28
-	.4byte	.LASF763
-	.byte	0x2
-	.2byte	0x1ea
-	.4byte	0xdc5
-	.uleb128 0x1
-	.byte	0x58
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x3316
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.9255
-	.uleb128 0x32
-	.4byte	.LVL784
-	.4byte	0x92b5
-	.4byte	0x59f1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR140
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x1ec
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL786
-	.4byte	0x22fb
-	.4byte	0x5a05
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL788
-	.4byte	0x26a8
-	.4byte	0x5a23
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL790
-	.4byte	0x92b5
-	.4byte	0x5a46
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC86
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL791
-	.4byte	0x2825
-	.4byte	0x5a67
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC87
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x34
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x34
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL792
-	.4byte	0x2825
-	.4byte	0x5a83
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC88
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x34
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL793
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR140
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x201
-	.byte	0
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF764
-	.byte	0x2
-	.2byte	0x1bf
-	.4byte	0x50
-	.byte	0x1
-	.4byte	0x5b26
-	.uleb128 0x4a
-	.4byte	.LASF649
-	.byte	0x2
-	.2byte	0x1bf
-	.4byte	0xdba
-	.uleb128 0x4b
-	.4byte	.LASF765
-	.byte	0x2
-	.2byte	0x1c1
-	.4byte	0xdba
-	.uleb128 0x4b
-	.4byte	.LASF766
-	.byte	0x2
-	.2byte	0x1c2
-	.4byte	0xdba
-	.uleb128 0x4b
-	.4byte	.LASF767
-	.byte	0x2
-	.2byte	0x1c3
-	.4byte	0xdc5
-	.uleb128 0x4b
-	.4byte	.LASF768
-	.byte	0x2
-	.2byte	0x1c5
-	.4byte	0xdba
-	.uleb128 0x4b
-	.4byte	.LASF769
-	.byte	0x2
-	.2byte	0x1c6
-	.4byte	0xdc5
-	.uleb128 0x4b
-	.4byte	.LASF652
-	.byte	0x2
-	.2byte	0x1c7
-	.4byte	0x1cb8
-	.uleb128 0x4b
-	.4byte	.LASF770
-	.byte	0x2
-	.2byte	0x1c7
-	.4byte	0x1cb8
-	.uleb128 0x4e
-	.4byte	.LASF573
-	.4byte	0x45c4
-	.4byte	.LASF764
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF771
-	.byte	0x2
-	.2byte	0x1ab
-	.4byte	0x50
-	.4byte	.LFB254
-	.4byte	.LFE254-.LFB254
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5b71
-	.uleb128 0x52
-	.4byte	.LASF236
-	.byte	0x2
-	.2byte	0x1ab
-	.4byte	0xdba
-	.4byte	.LLST62
-	.uleb128 0x54
-	.4byte	.LASF649
-	.byte	0x2
-	.2byte	0x1ad
-	.4byte	0xdba
-	.4byte	.LLST63
-	.uleb128 0x54
-	.4byte	.LASF652
-	.byte	0x2
-	.2byte	0x1ae
-	.4byte	0x1cb8
-	.4byte	.LLST64
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF772
-	.byte	0x2
-	.2byte	0x1a6
-	.4byte	0x50
-	.4byte	.LFB253
-	.4byte	.LFE253-.LFB253
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5bb2
-	.uleb128 0x52
-	.4byte	.LASF773
-	.byte	0x2
-	.2byte	0x1a6
-	.4byte	0x5bb2
-	.4byte	.LLST61
-	.uleb128 0x2d
-	.4byte	.LVL178
-	.4byte	0x5bb8
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x1cb8
-	.uleb128 0x48
-	.4byte	.LASF774
-	.byte	0x2
-	.2byte	0x193
-	.4byte	0x50
-	.4byte	.LFB252
-	.4byte	.LFE252-.LFB252
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5c23
-	.uleb128 0x52
-	.4byte	.LASF773
-	.byte	0x2
-	.2byte	0x193
-	.4byte	0x5bb2
-	.4byte	.LLST57
-	.uleb128 0x52
-	.4byte	.LASF236
-	.byte	0x2
-	.2byte	0x193
-	.4byte	0xdba
-	.4byte	.LLST58
-	.uleb128 0x54
-	.4byte	.LASF649
-	.byte	0x2
-	.2byte	0x195
-	.4byte	0xdba
-	.4byte	.LLST59
-	.uleb128 0x54
-	.4byte	.LASF652
-	.byte	0x2
-	.2byte	0x196
-	.4byte	0x1cb8
-	.4byte	.LLST60
-	.uleb128 0x34
-	.4byte	.LVL170
-	.4byte	0x5c23
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF775
-	.byte	0x2
-	.2byte	0x176
-	.4byte	0x50
-	.4byte	.LFB251
-	.4byte	.LFE251-.LFB251
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5cae
-	.uleb128 0x52
-	.4byte	.LASF773
-	.byte	0x2
-	.2byte	0x176
-	.4byte	0x5bb2
-	.4byte	.LLST54
-	.uleb128 0x52
-	.4byte	.LASF649
-	.byte	0x2
-	.2byte	0x176
-	.4byte	0xdba
-	.4byte	.LLST55
-	.uleb128 0x28
-	.4byte	.LASF652
-	.byte	0x2
-	.2byte	0x178
-	.4byte	0x1cb8
-	.uleb128 0x1
-	.byte	0x54
-	.uleb128 0x54
-	.4byte	.LASF776
-	.byte	0x2
-	.2byte	0x178
-	.4byte	0x1cb8
-	.4byte	.LLST56
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x5cbe
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.9214
-	.uleb128 0x34
-	.4byte	.LVL158
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR50
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x17b
-	.byte	0
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xea
-	.4byte	0x5cbe
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0x10
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x5cae
-	.uleb128 0x48
-	.4byte	.LASF777
-	.byte	0x2
-	.2byte	0x145
-	.4byte	0x50
-	.4byte	.LFB250
-	.4byte	.LFE250-.LFB250
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5d3c
-	.uleb128 0x52
-	.4byte	.LASF649
-	.byte	0x2
-	.2byte	0x145
-	.4byte	0xdba
-	.4byte	.LLST48
-	.uleb128 0x54
-	.4byte	.LASF652
-	.byte	0x2
-	.2byte	0x147
-	.4byte	0x1cb8
-	.4byte	.LLST49
-	.uleb128 0x54
-	.4byte	.LASF776
-	.byte	0x2
-	.2byte	0x147
-	.4byte	0x1cb8
-	.4byte	.LLST50
-	.uleb128 0x28
-	.4byte	.LASF778
-	.byte	0x2
-	.2byte	0x148
-	.4byte	0xdba
-	.uleb128 0x1
-	.byte	0x58
-	.uleb128 0x54
-	.4byte	.LASF779
-	.byte	0x2
-	.2byte	0x149
-	.4byte	0xdba
-	.4byte	.LLST51
-	.uleb128 0x54
-	.4byte	.LASF780
-	.byte	0x2
-	.2byte	0x14a
-	.4byte	0xdba
-	.4byte	.LLST52
-	.byte	0
-	.uleb128 0x2b
-	.4byte	.LASF781
-	.byte	0x2
-	.byte	0xf8
-	.4byte	0x50
-	.4byte	.LFB249
-	.4byte	.LFE249-.LFB249
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5dde
-	.uleb128 0x2c
-	.4byte	.LASF649
-	.byte	0x2
-	.byte	0xf8
-	.4byte	0xdba
-	.4byte	.LLST38
-	.uleb128 0x30
-	.4byte	.LASF652
-	.byte	0x2
-	.byte	0xfa
-	.4byte	0x1cb8
-	.4byte	.LLST39
-	.uleb128 0x30
-	.4byte	.LASF776
-	.byte	0x2
-	.byte	0xfa
-	.4byte	0x1cb8
-	.4byte	.LLST40
-	.uleb128 0x30
-	.4byte	.LASF782
-	.byte	0x2
-	.byte	0xfb
-	.4byte	0xdba
-	.4byte	.LLST41
-	.uleb128 0x30
-	.4byte	.LASF783
-	.byte	0x2
-	.byte	0xfc
-	.4byte	0xdba
-	.4byte	.LLST42
-	.uleb128 0x30
-	.4byte	.LASF767
-	.byte	0x2
-	.byte	0xfd
-	.4byte	0xdc5
-	.4byte	.LLST43
-	.uleb128 0x30
-	.4byte	.LASF784
-	.byte	0x2
-	.byte	0xfe
-	.4byte	0xdc5
-	.4byte	.LLST44
-	.uleb128 0x30
-	.4byte	.LASF780
-	.byte	0x2
-	.byte	0xff
-	.4byte	0xdba
-	.4byte	.LLST45
-	.uleb128 0x54
-	.4byte	.LASF325
-	.byte	0x2
-	.2byte	0x100
-	.4byte	0xdba
-	.4byte	.LLST46
-	.byte	0
-	.uleb128 0x66
-	.4byte	.LASF785
-	.byte	0x2
-	.byte	0xd9
-	.byte	0x1
-	.4byte	0x5e03
-	.uleb128 0x36
-	.4byte	.LASF649
-	.byte	0x2
-	.byte	0xd9
-	.4byte	0xdba
-	.uleb128 0x4e
-	.4byte	.LASF573
-	.4byte	0x5cbe
-	.4byte	.LASF785
-	.byte	0
-	.uleb128 0x66
-	.4byte	.LASF786
-	.byte	0x2
-	.byte	0xd2
-	.byte	0x1
-	.4byte	0x5e28
-	.uleb128 0x36
-	.4byte	.LASF649
-	.byte	0x2
-	.byte	0xd2
-	.4byte	0xdba
-	.uleb128 0x4e
-	.4byte	.LASF573
-	.4byte	0x5cbe
-	.4byte	.LASF786
-	.byte	0
-	.uleb128 0x2b
-	.4byte	.LASF787
-	.byte	0x2
-	.byte	0xb4
-	.4byte	0xdba
-	.4byte	.LFB246
-	.4byte	.LFE246-.LFB246
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5eec
-	.uleb128 0x3b
-	.ascii	"tmp\000"
-	.byte	0x2
-	.byte	0xb6
-	.4byte	0xdba
-	.4byte	.LLST185
-	.uleb128 0x3a
-	.ascii	"Q\000"
-	.byte	0x2
-	.byte	0xb7
-	.4byte	0x5eec
-	.uleb128 0x6
-	.byte	0x3
-	.4byte	gSysFreeQueue
-	.byte	0x9f
-	.uleb128 0x67
-	.4byte	.LASF788
-	.byte	0x2
-	.byte	0xb9
-	.4byte	.L531
-	.uleb128 0x3e
-	.4byte	.Ldebug_ranges0+0xd0
-	.4byte	0x5eac
-	.uleb128 0x30
-	.4byte	.LASF789
-	.byte	0x2
-	.byte	0xbf
-	.4byte	0xdba
-	.4byte	.LLST186
-	.uleb128 0x32
-	.4byte	.LVL690
-	.4byte	0x616f
-	.4byte	0x5e97
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL692
-	.4byte	0x2453
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x68
-	.4byte	0x5ff9
-	.4byte	.LBB252
-	.4byte	.Ldebug_ranges0+0xb8
-	.byte	0x2
-	.byte	0xba
-	.uleb128 0x32
-	.4byte	.LVL694
-	.4byte	0x92b5
-	.4byte	0x5ed2
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC82
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL696
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC83
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x1595
-	.uleb128 0x2b
-	.4byte	.LASF790
-	.byte	0x2
-	.byte	0xa2
-	.4byte	0x50
-	.4byte	.LFB245
-	.4byte	.LFE245-.LFB245
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5f56
-	.uleb128 0x2f
-	.ascii	"blk\000"
-	.byte	0x2
-	.byte	0xa2
-	.4byte	0xdba
-	.4byte	.LLST35
-	.uleb128 0x3b
-	.ascii	"ret\000"
-	.byte	0x2
-	.byte	0xa4
-	.4byte	0x50
-	.4byte	.LLST36
-	.uleb128 0x3b
-	.ascii	"i\000"
-	.byte	0x2
-	.byte	0xa5
-	.4byte	0xdc5
-	.4byte	.LLST37
-	.uleb128 0x3a
-	.ascii	"Q\000"
-	.byte	0x2
-	.byte	0xa6
-	.4byte	0x5eec
-	.uleb128 0x6
-	.byte	0x3
-	.4byte	gSysFreeQueue
-	.byte	0x9f
-	.uleb128 0x68
-	.4byte	0x5fed
-	.4byte	.LBB189
-	.4byte	.Ldebug_ranges0+0x18
-	.byte	0x2
-	.byte	0xa8
-	.byte	0
-	.uleb128 0x42
-	.4byte	.LASF791
-	.byte	0x2
-	.byte	0x75
-	.4byte	.LFB244
-	.4byte	.LFE244-.LFB244
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5fb2
-	.uleb128 0x29
-	.4byte	.LASF325
-	.byte	0x2
-	.byte	0x77
-	.4byte	0xdd0
-	.uleb128 0xe
-	.byte	0x3
-	.4byte	g_sys_save_data+28
-	.byte	0x94
-	.byte	0x2
-	.byte	0x4f
-	.byte	0x1a
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x9f
-	.uleb128 0x3b
-	.ascii	"i\000"
-	.byte	0x2
-	.byte	0x78
-	.4byte	0xdba
-	.4byte	.LLST33
-	.uleb128 0x3b
-	.ascii	"blk\000"
-	.byte	0x2
-	.byte	0x78
-	.4byte	0xdba
-	.4byte	.LLST34
-	.uleb128 0x3a
-	.ascii	"Q\000"
-	.byte	0x2
-	.byte	0x79
-	.4byte	0x5eec
-	.uleb128 0x6
-	.byte	0x3
-	.4byte	gSysFreeQueue
-	.byte	0x9f
-	.byte	0
-	.uleb128 0x66
-	.4byte	.LASF792
-	.byte	0x2
-	.byte	0x61
-	.byte	0x1
-	.4byte	0x5fed
-	.uleb128 0x41
-	.ascii	"blk\000"
-	.byte	0x2
-	.byte	0x61
-	.4byte	0xdba
-	.uleb128 0x36
-	.4byte	.LASF793
-	.byte	0x2
-	.byte	0x61
-	.4byte	0xdba
-	.uleb128 0x4f
-	.uleb128 0x31
-	.ascii	"Q\000"
-	.byte	0x2
-	.byte	0x66
-	.4byte	0x5eec
-	.uleb128 0x4f
-	.uleb128 0x37
-	.4byte	.LASF789
-	.byte	0x2
-	.byte	0x68
-	.4byte	0xdba
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF794
-	.byte	0x2
-	.byte	0x5c
-	.4byte	0xdba
-	.byte	0x1
-	.uleb128 0x69
-	.4byte	.LASF795
-	.byte	0x2
-	.byte	0x57
-	.4byte	0xdba
-	.byte	0x1
-	.uleb128 0x2b
-	.4byte	.LASF796
-	.byte	0x2
-	.byte	0x4b
-	.4byte	0xdba
-	.4byte	.LFB240
-	.4byte	.LFE240-.LFB240
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x605e
-	.uleb128 0x2f
-	.ascii	"max\000"
-	.byte	0x2
-	.byte	0x4b
-	.4byte	0xdba
-	.4byte	.LLST198
-	.uleb128 0x3a
-	.ascii	"Q\000"
-	.byte	0x2
-	.byte	0x4d
-	.4byte	0x5eec
-	.uleb128 0x6
-	.byte	0x3
-	.4byte	gSysFreeQueue
-	.byte	0x9f
-	.uleb128 0x34
-	.4byte	.LVL780
-	.4byte	0x22fb
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR38+8
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x800
-	.byte	0
-	.byte	0
-	.uleb128 0x2b
-	.4byte	.LASF797
-	.byte	0x2
-	.byte	0x2e
-	.4byte	0x50
-	.4byte	.LFB239
-	.4byte	.LFE239-.LFB239
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x612a
-	.uleb128 0x2c
-	.4byte	.LASF388
-	.byte	0x2
-	.byte	0x2e
-	.4byte	0xdc5
-	.4byte	.LLST151
-	.uleb128 0x2c
-	.4byte	.LASF567
-	.byte	0x2
-	.byte	0x2e
-	.4byte	0x50
-	.4byte	.LLST152
-	.uleb128 0x3a
-	.ascii	"req\000"
-	.byte	0x2
-	.byte	0x30
-	.4byte	0xde6
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -108
-	.uleb128 0x3b
-	.ascii	"low\000"
-	.byte	0x2
-	.byte	0x31
-	.4byte	0xddb
-	.4byte	.LLST153
-	.uleb128 0x29
-	.4byte	.LASF798
-	.byte	0x2
-	.byte	0x31
-	.4byte	0xddb
-	.uleb128 0x1
-	.byte	0x55
-	.uleb128 0x3b
-	.ascii	"mid\000"
-	.byte	0x2
-	.byte	0x31
-	.4byte	0xddb
-	.4byte	.LLST154
-	.uleb128 0x29
-	.4byte	.LASF799
-	.byte	0x2
-	.byte	0x32
-	.4byte	0x2443
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -88
-	.uleb128 0x30
-	.4byte	.LASF800
-	.byte	0x2
-	.byte	0x33
-	.4byte	0xdba
-	.4byte	.LLST155
-	.uleb128 0x32
-	.4byte	.LVL583
-	.4byte	0x26a8
-	.4byte	0x610d
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -108
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL588
-	.4byte	0x26a8
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -108
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x2b
-	.4byte	.LASF801
-	.byte	0x2
-	.byte	0x1e
-	.4byte	0xdc5
-	.4byte	.LFB238
-	.4byte	.LFE238-.LFB238
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x616f
-	.uleb128 0x2c
-	.4byte	.LASF802
-	.byte	0x2
-	.byte	0x1e
-	.4byte	0xdc5
-	.4byte	.LLST31
-	.uleb128 0x5b
-	.4byte	.LASF803
-	.byte	0x2
-	.byte	0x1e
-	.4byte	0xdc5
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3b
-	.ascii	"ret\000"
-	.byte	0x2
-	.byte	0x20
-	.4byte	0xdc5
-	.4byte	.LLST32
-	.byte	0
-	.uleb128 0x39
-	.4byte	.LASF804
-	.byte	0x2
-	.byte	0x14
-	.4byte	0xdba
-	.4byte	.LFB237
-	.4byte	.LFE237-.LFB237
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x61a7
-	.uleb128 0x2c
-	.4byte	.LASF596
-	.byte	0x2
-	.byte	0x14
-	.4byte	0xdba
-	.4byte	.LLST29
-	.uleb128 0x30
-	.4byte	.LASF717
-	.byte	0x2
-	.byte	0x16
-	.4byte	0xdba
-	.4byte	.LLST30
-	.byte	0
-	.uleb128 0x39
-	.4byte	.LASF805
-	.byte	0x2
-	.byte	0xc
-	.4byte	0xdba
-	.4byte	.LFB236
-	.4byte	.LFE236-.LFB236
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x61df
-	.uleb128 0x2c
-	.4byte	.LASF596
-	.byte	0x2
-	.byte	0xc
-	.4byte	0xdba
-	.4byte	.LLST27
-	.uleb128 0x30
-	.4byte	.LASF594
-	.byte	0x2
-	.byte	0xe
-	.4byte	0xdba
-	.4byte	.LLST28
-	.byte	0
-	.uleb128 0x39
-	.4byte	.LASF806
-	.byte	0x2
-	.byte	0x4
-	.4byte	0xdba
-	.4byte	.LFB235
-	.4byte	.LFE235-.LFB235
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6226
-	.uleb128 0x2c
-	.4byte	.LASF594
-	.byte	0x2
-	.byte	0x4
-	.4byte	0xdba
-	.4byte	.LLST24
-	.uleb128 0x2c
-	.4byte	.LASF717
-	.byte	0x2
-	.byte	0x4
-	.4byte	0xdba
-	.4byte	.LLST25
-	.uleb128 0x30
-	.4byte	.LASF586
-	.byte	0x2
-	.byte	0x6
-	.4byte	0xdba
-	.4byte	.LLST26
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF807
-	.byte	0x4
-	.2byte	0x13c
-	.4byte	0xdd0
-	.4byte	.LFB234
-	.4byte	.LFE234-.LFB234
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x640d
-	.uleb128 0x53
-	.ascii	"die\000"
-	.byte	0x4
-	.2byte	0x13e
-	.4byte	0xdc5
-	.4byte	.LLST347
-	.uleb128 0x53
-	.ascii	"blk\000"
-	.byte	0x4
-	.2byte	0x13f
-	.4byte	0xdba
-	.4byte	.LLST348
-	.uleb128 0x54
-	.4byte	.LASF576
-	.byte	0x4
-	.2byte	0x140
-	.4byte	0xdc5
-	.4byte	.LLST349
-	.uleb128 0x54
-	.4byte	.LASF808
-	.byte	0x4
-	.2byte	0x142
-	.4byte	0x640d
-	.4byte	.LLST350
-	.uleb128 0x4d
-	.4byte	.LASF809
-	.byte	0x4
-	.2byte	0x158
-	.uleb128 0x44
-	.4byte	.LVL1469
-	.4byte	0x6609
-	.uleb128 0x44
-	.4byte	.LVL1470
-	.4byte	0x6413
-	.uleb128 0x32
-	.4byte	.LVL1474
-	.4byte	0x6812
-	.4byte	0x62ae
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1475
-	.4byte	0x23ff
-	.4byte	0x62c2
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1476
-	.4byte	0x6875
-	.4byte	0x62d6
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1482
-	.4byte	0x26a8
-	.4byte	0x62f4
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1483
-	.4byte	0x2295
-	.uleb128 0x32
-	.4byte	.LVL1485
-	.4byte	0x6875
-	.4byte	0x6311
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1487
-	.4byte	0x235b
-	.4byte	0x6325
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1488
-	.4byte	0x6786
-	.uleb128 0x44
-	.4byte	.LVL1490
-	.4byte	0x6812
-	.uleb128 0x32
-	.4byte	.LVL1491
-	.4byte	0x22fb
-	.4byte	0x634f
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x40
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1492
-	.4byte	0x22fb
-	.4byte	0x6369
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x1000
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1494
-	.4byte	0x2295
-	.uleb128 0x32
-	.4byte	.LVL1495
-	.4byte	0x2453
-	.4byte	0x6390
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1496
-	.4byte	0x2509
-	.4byte	0x63b3
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1497
-	.4byte	0x6875
-	.4byte	0x63c7
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1502
-	.4byte	0x6875
-	.uleb128 0x32
-	.4byte	.LVL1505
-	.4byte	0x2453
-	.4byte	0x63e8
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x32
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1506
-	.4byte	0x6875
-	.uleb128 0x44
-	.4byte	.LVL1507
-	.4byte	0x6875
-	.uleb128 0x44
-	.4byte	.LVL1508
-	.4byte	0x663d
-	.uleb128 0x44
-	.4byte	.LVL1510
-	.4byte	0x663d
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x11b9
-	.uleb128 0x48
-	.4byte	.LASF810
-	.byte	0x4
-	.2byte	0x116
-	.4byte	0x50
-	.4byte	.LFB233
-	.4byte	.LFE233-.LFB233
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6484
-	.uleb128 0x60
-	.ascii	"die\000"
-	.byte	0x4
-	.2byte	0x118
-	.4byte	0xdc5
-	.uleb128 0x1
-	.byte	0x56
-	.uleb128 0x53
-	.ascii	"blk\000"
-	.byte	0x4
-	.2byte	0x119
-	.4byte	0xdba
-	.4byte	.LLST149
-	.uleb128 0x54
-	.4byte	.LASF811
-	.byte	0x4
-	.2byte	0x11a
-	.4byte	0xdc5
-	.4byte	.LLST150
-	.uleb128 0x28
-	.4byte	.LASF808
-	.byte	0x4
-	.2byte	0x11b
-	.4byte	0x640d
-	.uleb128 0x1
-	.byte	0x58
-	.uleb128 0x34
-	.4byte	.LVL572
-	.4byte	0x26a8
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x2b
-	.4byte	.LASF812
-	.byte	0x4
-	.byte	0xac
-	.4byte	0x50
-	.4byte	.LFB232
-	.4byte	.LFE232-.LFB232
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x65b3
-	.uleb128 0x3b
-	.ascii	"i\000"
-	.byte	0x4
-	.byte	0xae
-	.4byte	0xdc5
-	.4byte	.LLST343
-	.uleb128 0x3b
-	.ascii	"blk\000"
-	.byte	0x4
-	.byte	0xaf
-	.4byte	0xdba
-	.4byte	.LLST344
-	.uleb128 0x30
-	.4byte	.LASF705
-	.byte	0x4
-	.byte	0xb0
-	.4byte	0xddb
-	.4byte	.LLST345
-	.uleb128 0x30
-	.4byte	.LASF808
-	.byte	0x4
-	.byte	0xb1
-	.4byte	0x640d
-	.4byte	.LLST346
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x65c3
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.9061
-	.uleb128 0x44
-	.4byte	.LVL1444
-	.4byte	0x6609
-	.uleb128 0x32
-	.4byte	.LVL1446
-	.4byte	0x26a8
-	.4byte	0x650d
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1447
-	.4byte	0x26a8
-	.4byte	0x652b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1449
-	.4byte	0x26a8
-	.4byte	0x6549
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1450
-	.4byte	0x605e
-	.4byte	0x655c
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1452
-	.4byte	0x92b5
-	.4byte	0x6582
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR164
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xfe
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1453
-	.4byte	0x7a56
-	.uleb128 0x32
-	.4byte	.LVL1461
-	.4byte	0x26a8
-	.4byte	0x65a9
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1466
-	.4byte	0x2295
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xea
-	.4byte	0x65c3
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0xa
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x65b3
-	.uleb128 0x2b
-	.4byte	.LASF813
-	.byte	0x4
-	.byte	0x9c
-	.4byte	0xdba
-	.4byte	.LFB231
-	.4byte	.LFE231-.LFB231
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6609
-	.uleb128 0x3b
-	.ascii	"blk\000"
-	.byte	0x4
-	.byte	0x9e
-	.4byte	0xdba
-	.4byte	.LLST22
-	.uleb128 0x30
-	.4byte	.LASF814
-	.byte	0x4
-	.byte	0x9f
-	.4byte	0xdba
-	.4byte	.LLST23
-	.uleb128 0x44
-	.4byte	.LVL59
-	.4byte	0x6812
-	.byte	0
-	.uleb128 0x42
-	.4byte	.LASF815
-	.byte	0x4
-	.byte	0x94
-	.4byte	.LFB230
-	.4byte	.LFE230-.LFB230
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x663d
-	.uleb128 0x2d
-	.4byte	.LVL777
-	.4byte	0x22fb
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR37+12
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x40
-	.byte	0
-	.byte	0
-	.uleb128 0x2b
-	.4byte	.LASF816
-	.byte	0x4
-	.byte	0x4f
-	.4byte	0x50
-	.4byte	.LFB229
-	.4byte	.LFE229-.LFB229
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6786
-	.uleb128 0x3b
-	.ascii	"i\000"
-	.byte	0x4
-	.byte	0x51
-	.4byte	0x50
-	.4byte	.LLST290
-	.uleb128 0x30
-	.4byte	.LASF817
-	.byte	0x4
-	.byte	0x52
-	.4byte	0x50
-	.4byte	.LLST291
-	.uleb128 0x30
-	.4byte	.LASF808
-	.byte	0x4
-	.byte	0x53
-	.4byte	0x640d
-	.4byte	.LLST292
-	.uleb128 0x30
-	.4byte	.LASF721
-	.byte	0x4
-	.byte	0x54
-	.4byte	0xdba
-	.4byte	.LLST293
-	.uleb128 0x57
-	.4byte	.LASF818
-	.byte	0x4
-	.byte	0x67
-	.uleb128 0x6a
-	.4byte	.LASF573
-	.4byte	0x26a3
-	.uleb128 0x32
-	.4byte	.LVL1172
-	.4byte	0x22fb
-	.4byte	0x66b4
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1175
-	.4byte	0x22fb
-	.4byte	0x66d3
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x40
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1177
-	.4byte	0x92b5
-	.4byte	0x66ea
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC97
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1178
-	.4byte	0x2509
-	.4byte	0x670d
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1179
-	.4byte	0x2453
-	.4byte	0x6725
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1180
-	.4byte	0x2509
-	.4byte	0x6748
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1182
-	.4byte	0x92b5
-	.4byte	0x675f
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC98
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1183
-	.4byte	0x92b5
-	.4byte	0x677c
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC99
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1186
-	.4byte	0x2295
-	.byte	0
-	.uleb128 0x42
-	.4byte	.LASF819
-	.byte	0x4
-	.byte	0x41
-	.4byte	.LFB228
-	.4byte	.LFE228-.LFB228
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x680a
-	.uleb128 0x2c
-	.4byte	.LASF753
-	.byte	0x4
-	.byte	0x41
-	.4byte	0x10e9
-	.4byte	.LLST196
-	.uleb128 0x2c
-	.4byte	.LASF820
-	.byte	0x4
-	.byte	0x41
-	.4byte	0xff2
-	.4byte	.LLST197
-	.uleb128 0x31
-	.ascii	"i\000"
-	.byte	0x4
-	.byte	0x43
-	.4byte	0xdc5
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x3be7
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.9018
-	.uleb128 0x32
-	.4byte	.LVL774
-	.4byte	0x22fb
-	.4byte	0x67ea
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL775
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x4a
-	.byte	0
-	.byte	0
-	.uleb128 0x6b
-	.4byte	.LASF821
-	.byte	0x4
-	.byte	0x26
-	.byte	0x1
-	.uleb128 0x39
-	.4byte	.LASF822
-	.byte	0x4
-	.byte	0x17
-	.4byte	0x50
-	.4byte	.LFB226
-	.4byte	.LFE226-.LFB226
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6875
-	.uleb128 0x2c
-	.4byte	.LASF388
-	.byte	0x4
-	.byte	0x17
-	.4byte	0xdba
-	.4byte	.LLST17
-	.uleb128 0x3b
-	.ascii	"die\000"
-	.byte	0x4
-	.byte	0x19
-	.4byte	0xdc5
-	.4byte	.LLST18
-	.uleb128 0x3b
-	.ascii	"i\000"
-	.byte	0x4
-	.byte	0x1a
-	.4byte	0xdc5
-	.4byte	.LLST19
-	.uleb128 0x30
-	.4byte	.LASF820
-	.byte	0x4
-	.byte	0x1b
-	.4byte	0xff2
-	.4byte	.LLST20
-	.uleb128 0x30
-	.4byte	.LASF581
-	.byte	0x4
-	.byte	0x1c
-	.4byte	0xdba
-	.4byte	.LLST21
-	.byte	0
-	.uleb128 0x39
-	.4byte	.LASF823
-	.byte	0x4
-	.byte	0x4
-	.4byte	0x50
-	.4byte	.LFB225
-	.4byte	.LFE225-.LFB225
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x68ea
-	.uleb128 0x2c
-	.4byte	.LASF388
-	.byte	0x4
-	.byte	0x4
-	.4byte	0xdba
-	.4byte	.LLST13
-	.uleb128 0x3b
-	.ascii	"die\000"
-	.byte	0x4
-	.byte	0x6
-	.4byte	0xdc5
-	.4byte	.LLST14
-	.uleb128 0x30
-	.4byte	.LASF820
-	.byte	0x4
-	.byte	0x7
-	.4byte	0xff2
-	.4byte	.LLST15
-	.uleb128 0x30
-	.4byte	.LASF581
-	.byte	0x4
-	.byte	0x8
-	.4byte	0xdba
-	.4byte	.LLST16
-	.uleb128 0x34
-	.4byte	.LVL45
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x6c
-	.4byte	.LASF885
-	.byte	0x3
-	.2byte	0x499
-	.4byte	0xdc5
-	.4byte	.LFB224
-	.4byte	.LFE224-.LFB224
-	.uleb128 0x1
-	.byte	0x9c
-	.uleb128 0x48
-	.4byte	.LASF824
-	.byte	0x3
-	.2byte	0x494
-	.4byte	0x50
-	.4byte	.LFB223
-	.4byte	.LFE223-.LFB223
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x696f
-	.uleb128 0x52
-	.4byte	.LASF236
-	.byte	0x3
-	.2byte	0x494
-	.4byte	0xb5
-	.4byte	.LLST444
-	.uleb128 0x52
-	.4byte	.LASF325
-	.byte	0x3
-	.2byte	0x494
-	.4byte	0xb5
-	.4byte	.LLST445
-	.uleb128 0x5d
-	.ascii	"buf\000"
-	.byte	0x3
-	.2byte	0x494
-	.4byte	0x696f
-	.4byte	.LLST446
-	.uleb128 0x2d
-	.4byte	.LVL1953
-	.4byte	0x6adf
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x90
-	.uleb128 0x48
-	.4byte	.LASF825
-	.byte	0x3
-	.2byte	0x48f
-	.4byte	0x50
-	.4byte	.LFB222
-	.4byte	.LFE222-.LFB222
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x69e4
-	.uleb128 0x52
-	.4byte	.LASF236
-	.byte	0x3
-	.2byte	0x48f
-	.4byte	0xb5
-	.4byte	.LLST426
-	.uleb128 0x52
-	.4byte	.LASF325
-	.byte	0x3
-	.2byte	0x48f
-	.4byte	0xb5
-	.4byte	.LLST427
-	.uleb128 0x5d
-	.ascii	"buf\000"
-	.byte	0x3
-	.2byte	0x48f
-	.4byte	0x696f
-	.4byte	.LLST428
-	.uleb128 0x2d
-	.4byte	.LVL1872
-	.4byte	0x708d
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0
-	.byte	0
-	.uleb128 0x5c
-	.4byte	.LASF826
-	.byte	0x3
-	.2byte	0x460
-	.4byte	0x50
-	.4byte	.LFB221
-	.4byte	.LFE221-.LFB221
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6adf
-	.uleb128 0x52
-	.4byte	.LASF731
-	.byte	0x3
-	.2byte	0x460
-	.4byte	0xdc5
-	.4byte	.LLST372
-	.uleb128 0x52
-	.4byte	.LASF732
-	.byte	0x3
-	.2byte	0x460
-	.4byte	0xdc5
-	.4byte	.LLST373
-	.uleb128 0x54
-	.4byte	.LASF734
-	.byte	0x3
-	.2byte	0x462
-	.4byte	0xdba
-	.4byte	.LLST374
-	.uleb128 0x53
-	.ascii	"tmp\000"
-	.byte	0x3
-	.2byte	0x463
-	.4byte	0xdba
-	.4byte	.LLST375
-	.uleb128 0x53
-	.ascii	"lpa\000"
-	.byte	0x3
-	.2byte	0x464
-	.4byte	0xdc5
-	.4byte	.LLST376
-	.uleb128 0x28
-	.4byte	.LASF663
-	.byte	0x3
-	.2byte	0x465
-	.4byte	0xdc5
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -32
-	.uleb128 0x28
-	.4byte	.LASF640
-	.byte	0x3
-	.2byte	0x465
-	.4byte	0xdc5
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -28
-	.uleb128 0x54
-	.4byte	.LASF629
-	.byte	0x3
-	.2byte	0x466
-	.4byte	0xdba
-	.4byte	.LLST377
-	.uleb128 0x44
-	.4byte	.LVL1601
-	.4byte	0x536c
-	.uleb128 0x44
-	.4byte	.LVL1602
-	.4byte	0x4d67
-	.uleb128 0x32
-	.4byte	.LVL1603
-	.4byte	0x526b
-	.4byte	0x6aad
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1604
-	.4byte	0x526b
-	.4byte	0x6acc
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -28
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1605
-	.4byte	0x616f
-	.uleb128 0x44
-	.4byte	.LVL1606
-	.4byte	0x3236
-	.byte	0
-	.uleb128 0x5c
-	.4byte	.LASF827
-	.byte	0x3
-	.2byte	0x3bd
-	.4byte	0x50
-	.4byte	.LFB220
-	.4byte	.LFE220-.LFB220
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6e85
-	.uleb128 0x5d
-	.ascii	"LUN\000"
-	.byte	0x3
-	.2byte	0x3bd
-	.4byte	0xdaf
-	.4byte	.LLST429
-	.uleb128 0x52
-	.4byte	.LASF731
-	.byte	0x3
-	.2byte	0x3bd
-	.4byte	0xdc5
-	.4byte	.LLST430
-	.uleb128 0x52
-	.4byte	.LASF732
-	.byte	0x3
-	.2byte	0x3bd
-	.4byte	0xdc5
-	.4byte	.LLST431
-	.uleb128 0x52
-	.4byte	.LASF733
-	.byte	0x3
-	.2byte	0x3bd
-	.4byte	0x5142
-	.4byte	.LLST432
-	.uleb128 0x54
-	.4byte	.LASF598
-	.byte	0x3
-	.2byte	0x3bf
-	.4byte	0x2ab9
-	.4byte	.LLST433
-	.uleb128 0x53
-	.ascii	"lpa\000"
-	.byte	0x3
-	.2byte	0x3c0
-	.4byte	0xdc5
-	.4byte	.LLST434
-	.uleb128 0x54
-	.4byte	.LASF828
-	.byte	0x3
-	.2byte	0x3c0
-	.4byte	0xdc5
-	.4byte	.LLST435
-	.uleb128 0x54
-	.4byte	.LASF829
-	.byte	0x3
-	.2byte	0x3c0
-	.4byte	0xdc5
-	.4byte	.LLST436
-	.uleb128 0x28
-	.4byte	.LASF663
-	.byte	0x3
-	.2byte	0x3c1
-	.4byte	0xdc5
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -56
-	.uleb128 0x53
-	.ascii	"ppa\000"
-	.byte	0x3
-	.2byte	0x3c1
-	.4byte	0xdc5
-	.4byte	.LLST437
-	.uleb128 0x53
-	.ascii	"i\000"
-	.byte	0x3
-	.2byte	0x3c2
-	.4byte	0xdc5
-	.4byte	.LLST438
-	.uleb128 0x54
-	.4byte	.LASF830
-	.byte	0x3
-	.2byte	0x3c2
-	.4byte	0xdc5
-	.4byte	.LLST439
-	.uleb128 0x54
-	.4byte	.LASF595
-	.byte	0x3
-	.2byte	0x3c2
-	.4byte	0xdc5
-	.4byte	.LLST440
-	.uleb128 0x54
-	.4byte	.LASF831
-	.byte	0x3
-	.2byte	0x3c3
-	.4byte	0xdc5
-	.4byte	.LLST441
-	.uleb128 0x54
-	.4byte	.LASF832
-	.byte	0x3
-	.2byte	0x3c3
-	.4byte	0xdc5
-	.4byte	.LLST442
-	.uleb128 0x54
-	.4byte	.LASF639
-	.byte	0x3
-	.2byte	0x3c4
-	.4byte	0x1d68
-	.4byte	.LLST443
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x5367
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.8954
-	.uleb128 0x3e
-	.4byte	.Ldebug_ranges0+0x1d8
-	.4byte	0x6c7c
-	.uleb128 0x28
-	.4byte	.LASF603
-	.byte	0x3
-	.2byte	0x425
-	.4byte	0xde6
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -52
-	.uleb128 0x32
-	.4byte	.LVL1933
-	.4byte	0x26a8
-	.4byte	0x6c3b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -52
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1935
-	.4byte	0x92b5
-	.4byte	0x6c58
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC108
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL1936
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR178
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x432
-	.byte	0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1878
-	.4byte	0x5148
-	.4byte	0x6ca5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x7
-	.byte	0x91
-	.sleb128 -100
-	.byte	0x6
-	.byte	0x23
-	.uleb128 0x100
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -84
-	.byte	0x6
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -88
-	.byte	0x6
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1893
-	.4byte	0x29ec
-	.4byte	0x6cc3
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -96
-	.byte	0x6
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -72
-	.byte	0x6
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1897
-	.4byte	0x92b5
-	.4byte	0x6cea
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR178
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x3dc
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1899
-	.4byte	0x340d
-	.4byte	0x6d01
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR52
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1900
-	.4byte	0x340d
-	.4byte	0x6d18
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR51
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1902
-	.4byte	0x340d
-	.4byte	0x6d2c
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1905
-	.4byte	0x92b5
-	.4byte	0x6d53
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR178
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x3fd
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1908
-	.4byte	0x6e92
-	.4byte	0x6d72
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1909
-	.4byte	0x92b5
-	.4byte	0x6d99
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR178
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x44a
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1912
-	.4byte	0x340d
-	.4byte	0x6dad
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1915
-	.4byte	0x526b
-	.4byte	0x6dcc
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -56
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1916
-	.4byte	0x331b
-	.4byte	0x6de0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1920
-	.4byte	0x22fb
-	.4byte	0x6df9
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1929
-	.4byte	0x92b5
-	.4byte	0x6e20
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR178
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x441
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1934
-	.4byte	0x2295
-	.uleb128 0x32
-	.4byte	.LVL1938
-	.4byte	0x22fb
-	.4byte	0x6e3c
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1943
-	.4byte	0x5b26
-	.4byte	0x6e4f
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1944
-	.4byte	0x2c15
-	.uleb128 0x32
-	.4byte	.LVL1945
-	.4byte	0x29ec
-	.4byte	0x6e70
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL1946
-	.4byte	0x29ec
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x51
-	.4byte	.LASF833
-	.byte	0x3
-	.2byte	0x3b7
-	.4byte	0x50
-	.byte	0x1
-	.uleb128 0x5f
-	.4byte	.LASF834
-	.byte	0x3
-	.2byte	0x387
-	.4byte	.LFB218
-	.4byte	.LFE218-.LFB218
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7078
-	.uleb128 0x5d
-	.ascii	"req\000"
-	.byte	0x3
-	.2byte	0x387
-	.4byte	0x19f9
-	.4byte	.LLST382
-	.uleb128 0x52
-	.4byte	.LASF595
-	.byte	0x3
-	.2byte	0x387
-	.4byte	0xdc5
-	.4byte	.LLST383
-	.uleb128 0x52
-	.4byte	.LASF835
-	.byte	0x3
-	.2byte	0x387
-	.4byte	0xdc5
-	.4byte	.LLST384
-	.uleb128 0x52
-	.4byte	.LASF639
-	.byte	0x3
-	.2byte	0x387
-	.4byte	0x1d68
-	.4byte	.LLST385
-	.uleb128 0x53
-	.ascii	"i\000"
-	.byte	0x3
-	.2byte	0x389
-	.4byte	0xdc5
-	.4byte	.LLST386
-	.uleb128 0x60
-	.ascii	"ppa\000"
-	.byte	0x3
-	.2byte	0x38a
-	.4byte	0xdc5
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x54
-	.4byte	.LASF663
-	.byte	0x3
-	.2byte	0x38a
-	.4byte	0xdc5
-	.4byte	.LLST387
-	.uleb128 0x54
-	.4byte	.LASF623
-	.byte	0x3
-	.2byte	0x38b
-	.4byte	0xdba
-	.4byte	.LLST388
-	.uleb128 0x54
-	.4byte	.LASF598
-	.byte	0x3
-	.2byte	0x38c
-	.4byte	0x2ab9
-	.4byte	.LLST389
-	.uleb128 0x62
-	.4byte	.LASF687
-	.byte	0x3
-	.2byte	0x38d
-	.4byte	0xdc5
-	.byte	0
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x7088
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.8926
-	.uleb128 0x32
-	.4byte	.LVL1641
-	.4byte	0x2509
-	.4byte	0x6f71
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1642
-	.4byte	0x616f
-	.uleb128 0x32
-	.4byte	.LVL1644
-	.4byte	0x340d
-	.4byte	0x6f8e
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1645
-	.4byte	0x2b8b
-	.uleb128 0x32
-	.4byte	.LVL1646
-	.4byte	0x331b
-	.4byte	0x6fab
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1647
-	.4byte	0x2509
-	.4byte	0x6fc9
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1648
-	.4byte	0x92b5
-	.4byte	0x6ff0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR170
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x3a5
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1649
-	.4byte	0x526b
-	.4byte	0x7009
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1651
-	.4byte	0x616f
-	.4byte	0x7023
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x8
-	.byte	0x7b
-	.sleb128 0
-	.byte	0x9
-	.byte	0xea
-	.byte	0x24
-	.byte	0x9
-	.byte	0xf4
-	.byte	0x25
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1654
-	.4byte	0x92b5
-	.4byte	0x7040
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC106
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1655
-	.4byte	0x3236
-	.4byte	0x7054
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL1658
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR170
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x3b4
-	.byte	0
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xea
-	.4byte	0x7088
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0xc
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x7078
-	.uleb128 0x5c
-	.4byte	.LASF836
-	.byte	0x3
-	.2byte	0x32d
-	.4byte	0x50
-	.4byte	.LFB217
-	.4byte	.LFE217-.LFB217
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7277
-	.uleb128 0x5d
-	.ascii	"LUN\000"
-	.byte	0x3
-	.2byte	0x32d
-	.4byte	0xdaf
-	.4byte	.LLST409
-	.uleb128 0x52
-	.4byte	.LASF731
-	.byte	0x3
-	.2byte	0x32d
-	.4byte	0xdc5
-	.4byte	.LLST410
-	.uleb128 0x52
-	.4byte	.LASF732
-	.byte	0x3
-	.2byte	0x32d
-	.4byte	0xdc5
-	.4byte	.LLST411
-	.uleb128 0x52
-	.4byte	.LASF733
-	.byte	0x3
-	.2byte	0x32d
-	.4byte	0x5142
-	.4byte	.LLST412
-	.uleb128 0x53
-	.ascii	"ret\000"
-	.byte	0x3
-	.2byte	0x32f
-	.4byte	0x50
-	.4byte	.LLST413
-	.uleb128 0x54
-	.4byte	.LASF828
-	.byte	0x3
-	.2byte	0x330
-	.4byte	0xdc5
-	.4byte	.LLST414
-	.uleb128 0x54
-	.4byte	.LASF829
-	.byte	0x3
-	.2byte	0x330
-	.4byte	0xdc5
-	.4byte	.LLST415
-	.uleb128 0x54
-	.4byte	.LASF837
-	.byte	0x3
-	.2byte	0x330
-	.4byte	0xdc5
-	.4byte	.LLST416
-	.uleb128 0x53
-	.ascii	"lpa\000"
-	.byte	0x3
-	.2byte	0x331
-	.4byte	0xdc5
-	.4byte	.LLST417
-	.uleb128 0x60
-	.ascii	"ppa\000"
-	.byte	0x3
-	.2byte	0x331
-	.4byte	0xdc5
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x53
-	.ascii	"n\000"
-	.byte	0x3
-	.2byte	0x333
-	.4byte	0xdc5
-	.4byte	.LLST418
-	.uleb128 0x54
-	.4byte	.LASF595
-	.byte	0x3
-	.2byte	0x333
-	.4byte	0xdc5
-	.4byte	.LLST419
-	.uleb128 0x54
-	.4byte	.LASF830
-	.byte	0x3
-	.2byte	0x333
-	.4byte	0xdc5
-	.4byte	.LLST420
-	.uleb128 0x54
-	.4byte	.LASF838
-	.byte	0x3
-	.2byte	0x334
-	.4byte	0xdc5
-	.4byte	.LLST421
-	.uleb128 0x54
-	.4byte	.LASF839
-	.byte	0x3
-	.2byte	0x334
-	.4byte	0xdc5
-	.4byte	.LLST422
-	.uleb128 0x54
-	.4byte	.LASF840
-	.byte	0x3
-	.2byte	0x335
-	.4byte	0xdc5
-	.4byte	.LLST423
-	.uleb128 0x54
-	.4byte	.LASF841
-	.byte	0x3
-	.2byte	0x336
-	.4byte	0xdc5
-	.4byte	.LLST424
-	.uleb128 0x61
-	.4byte	.LBB332
-	.4byte	.LBE332-.LBB332
-	.4byte	0x71e4
-	.uleb128 0x54
-	.4byte	.LASF586
-	.byte	0x3
-	.2byte	0x37a
-	.4byte	0xdba
-	.4byte	.LLST425
-	.uleb128 0x44
-	.4byte	.LVL1864
-	.4byte	0x616f
-	.uleb128 0x44
-	.4byte	.LVL1865
-	.4byte	0x2c15
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1821
-	.4byte	0x5030
-	.4byte	0x7206
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x76
-	.sleb128 256
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -56
-	.byte	0x6
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1836
-	.4byte	0x29ec
-	.4byte	0x721e
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1838
-	.4byte	0x526b
-	.4byte	0x723d
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1844
-	.4byte	0x26a8
-	.4byte	0x7257
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1846
-	.4byte	0x2295
-	.uleb128 0x34
-	.4byte	.LVL1853
-	.4byte	0x22fb
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x200
-	.byte	0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF842
-	.byte	0x3
-	.2byte	0x325
-	.4byte	0x50
-	.4byte	.LFB216
-	.4byte	.LFE216-.LFB216
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x729b
-	.uleb128 0x44
-	.4byte	.LVL1587
-	.4byte	0x729b
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF843
-	.byte	0x3
-	.2byte	0x31c
-	.4byte	0x50
-	.4byte	.LFB215
-	.4byte	.LFE215-.LFB215
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x72db
-	.uleb128 0x44
-	.4byte	.LVL1584
-	.4byte	0x536c
-	.uleb128 0x32
-	.4byte	.LVL1585
-	.4byte	0x4fd8
-	.4byte	0x72d1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1586
-	.4byte	0x4d67
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF844
-	.byte	0x3
-	.2byte	0x2e6
-	.4byte	0x50
-	.4byte	.LFB214
-	.4byte	.LFE214-.LFB214
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x73a9
-	.uleb128 0x28
-	.4byte	.LASF845
-	.byte	0x3
-	.2byte	0x2e8
-	.4byte	0x73a9
-	.uleb128 0x6
-	.byte	0x3
-	.4byte	g_nand_phy_info
-	.byte	0x9f
-	.uleb128 0x58
-	.4byte	.LASF846
-	.byte	0x3
-	.2byte	0x2f3
-	.4byte	.LDL2
-	.uleb128 0x61
-	.4byte	.LBB342
-	.4byte	.LBE342-.LBB342
-	.4byte	0x7344
-	.uleb128 0x53
-	.ascii	"i\000"
-	.byte	0x3
-	.2byte	0x310
-	.4byte	0xdc5
-	.4byte	.LLST453
-	.uleb128 0x34
-	.4byte	.LVL2057
-	.4byte	0x29ec
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL2049
-	.4byte	0x92b5
-	.4byte	0x7364
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC71
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC70
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL2050
-	.4byte	0x79fa
-	.4byte	0x737b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2051
-	.4byte	0x779d
-	.uleb128 0x44
-	.4byte	.LVL2052
-	.4byte	0x76ed
-	.uleb128 0x44
-	.4byte	.LVL2053
-	.4byte	0x6005
-	.uleb128 0x44
-	.4byte	.LVL2054
-	.4byte	0x6484
-	.uleb128 0x44
-	.4byte	.LVL2055
-	.4byte	0x398b
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0xed2
-	.uleb128 0x5c
-	.4byte	.LASF847
-	.byte	0x3
-	.2byte	0x26e
-	.4byte	0x50
-	.4byte	.LFB213
-	.4byte	.LFE213-.LFB213
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7505
-	.uleb128 0x54
-	.4byte	.LASF717
-	.byte	0x3
-	.2byte	0x270
-	.4byte	0xdba
-	.4byte	.LLST449
-	.uleb128 0x54
-	.4byte	.LASF848
-	.byte	0x3
-	.2byte	0x270
-	.4byte	0xdba
-	.4byte	.LLST450
-	.uleb128 0x54
-	.4byte	.LASF849
-	.byte	0x3
-	.2byte	0x271
-	.4byte	0xdba
-	.4byte	.LLST451
-	.uleb128 0x53
-	.ascii	"i\000"
-	.byte	0x3
-	.2byte	0x272
-	.4byte	0xdba
-	.4byte	.LLST452
-	.uleb128 0x58
-	.4byte	.LASF850
-	.byte	0x3
-	.2byte	0x2bc
-	.4byte	.L1785
-	.uleb128 0x58
-	.4byte	.LASF851
-	.byte	0x3
-	.2byte	0x2cc
-	.4byte	.L1787
-	.uleb128 0x44
-	.4byte	.LVL2003
-	.4byte	0x6005
-	.uleb128 0x44
-	.4byte	.LVL2004
-	.4byte	0x6484
-	.uleb128 0x44
-	.4byte	.LVL2005
-	.4byte	0x6226
-	.uleb128 0x44
-	.4byte	.LVL2019
-	.4byte	0x663d
-	.uleb128 0x32
-	.4byte	.LVL2020
-	.4byte	0x22fb
-	.4byte	0x7456
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL2021
-	.4byte	0x22fb
-	.4byte	0x746a
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL2022
-	.4byte	0x3f1b
-	.4byte	0x747e
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL2026
-	.4byte	0x7505
-	.4byte	0x7497
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2033
-	.4byte	0x7a56
-	.uleb128 0x44
-	.4byte	.LVL2034
-	.4byte	0x6005
-	.uleb128 0x32
-	.4byte	.LVL2037
-	.4byte	0x7505
-	.4byte	0x74c2
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 -1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL2040
-	.4byte	0x7505
-	.4byte	0x74d5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL2044
-	.4byte	0x3f1b
-	.4byte	0x74e9
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2045
-	.4byte	0x5e28
-	.uleb128 0x44
-	.4byte	.LVL2046
-	.4byte	0x4d67
-	.uleb128 0x44
-	.4byte	.LVL2047
-	.4byte	0x398b
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF852
-	.byte	0x3
-	.2byte	0x20f
-	.4byte	0x50
-	.4byte	.LFB212
-	.4byte	.LFE212-.LFB212
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x76c3
-	.uleb128 0x52
-	.4byte	.LASF717
-	.byte	0x3
-	.2byte	0x20f
-	.4byte	0xdba
-	.4byte	.LLST175
-	.uleb128 0x52
-	.4byte	.LASF853
-	.byte	0x3
-	.2byte	0x20f
-	.4byte	0xdaf
-	.4byte	.LLST176
-	.uleb128 0x54
-	.4byte	.LASF848
-	.byte	0x3
-	.2byte	0x211
-	.4byte	0xdba
-	.4byte	.LLST177
-	.uleb128 0x54
-	.4byte	.LASF568
-	.byte	0x3
-	.2byte	0x211
-	.4byte	0xdba
-	.4byte	.LLST178
-	.uleb128 0x54
-	.4byte	.LASF594
-	.byte	0x3
-	.2byte	0x212
-	.4byte	0xdba
-	.4byte	.LLST179
-	.uleb128 0x54
-	.4byte	.LASF388
-	.byte	0x3
-	.2byte	0x212
-	.4byte	0xdba
-	.4byte	.LLST180
-	.uleb128 0x54
-	.4byte	.LASF854
-	.byte	0x3
-	.2byte	0x213
-	.4byte	0xdba
-	.4byte	.LLST181
-	.uleb128 0x54
-	.4byte	.LASF855
-	.byte	0x3
-	.2byte	0x214
-	.4byte	0xdba
-	.4byte	.LLST182
-	.uleb128 0x54
-	.4byte	.LASF856
-	.byte	0x3
-	.2byte	0x215
-	.4byte	0xdba
-	.4byte	.LLST183
-	.uleb128 0x54
-	.4byte	.LASF857
-	.byte	0x3
-	.2byte	0x216
-	.4byte	0xdba
-	.4byte	.LLST184
-	.uleb128 0x58
-	.4byte	.LASF858
-	.byte	0x3
-	.2byte	0x240
-	.4byte	.L496
-	.uleb128 0x32
-	.4byte	.LVL635
-	.4byte	0x2453
-	.4byte	0x75e5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL643
-	.4byte	0x2509
-	.4byte	0x760b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -56
-	.byte	0x6
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL650
-	.4byte	0x2453
-	.4byte	0x7625
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL652
-	.4byte	0x61df
-	.4byte	0x763b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -60
-	.byte	0x94
-	.byte	0x2
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL654
-	.4byte	0x76c3
-	.4byte	0x764f
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL655
-	.4byte	0x6812
-	.4byte	0x7663
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL666
-	.4byte	0x6875
-	.uleb128 0x32
-	.4byte	.LVL670
-	.4byte	0x61df
-	.4byte	0x7682
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -60
-	.byte	0x94
-	.byte	0x2
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL672
-	.4byte	0x76c3
-	.4byte	0x7696
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL673
-	.4byte	0x6812
-	.4byte	0x76aa
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL681
-	.4byte	0x6875
-	.uleb128 0x34
-	.4byte	.LVL685
-	.4byte	0x5fb2
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF859
-	.byte	0x3
-	.2byte	0x201
-	.4byte	0x50
-	.byte	0x1
-	.4byte	0x76ed
-	.uleb128 0x4a
-	.4byte	.LASF388
-	.byte	0x3
-	.2byte	0x201
-	.4byte	0xdba
-	.uleb128 0x4b
-	.4byte	.LASF860
-	.byte	0x3
-	.2byte	0x203
-	.4byte	0xdba
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF861
-	.byte	0x3
-	.2byte	0x1ed
-	.4byte	0x50
-	.4byte	.LFB210
-	.4byte	.LFE210-.LFB210
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x779d
-	.uleb128 0x32
-	.4byte	.LVL1049
-	.4byte	0x22fb
-	.4byte	0x771b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1050
-	.4byte	0x22fb
-	.4byte	0x772f
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1051
-	.4byte	0x22fb
-	.4byte	0x7743
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1052
-	.4byte	0x22fb
-	.4byte	0x7766
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR39
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x30
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1053
-	.4byte	0x22fb
-	.4byte	0x778a
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR81
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x200
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1054
-	.4byte	0x3213
-	.uleb128 0x44
-	.4byte	.LVL1055
-	.4byte	0x476d
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF862
-	.byte	0x3
-	.2byte	0x117
-	.4byte	0x50
-	.4byte	.LFB209
-	.4byte	.LFE209-.LFB209
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x79fa
-	.uleb128 0x53
-	.ascii	"i\000"
-	.byte	0x3
-	.2byte	0x119
-	.4byte	0xdc5
-	.4byte	.LLST194
-	.uleb128 0x54
-	.4byte	.LASF863
-	.byte	0x3
-	.2byte	0x11a
-	.4byte	0xdc5
-	.4byte	.LLST195
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x65c3
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.8802
-	.uleb128 0x44
-	.4byte	.LVL707
-	.4byte	0x2917
-	.uleb128 0x44
-	.4byte	.LVL708
-	.4byte	0x2917
-	.uleb128 0x32
-	.4byte	.LVL710
-	.4byte	0x2917
-	.4byte	0x780a
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL711
-	.4byte	0x2917
-	.4byte	0x781e
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL712
-	.4byte	0x2917
-	.4byte	0x7832
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL713
-	.4byte	0x2917
-	.4byte	0x7846
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL714
-	.4byte	0x2917
-	.4byte	0x785a
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL716
-	.4byte	0x2917
-	.4byte	0x786e
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL717
-	.4byte	0x2917
-	.4byte	0x7882
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL718
-	.4byte	0x2917
-	.4byte	0x7896
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL719
-	.4byte	0x2917
-	.uleb128 0x32
-	.4byte	.LVL720
-	.4byte	0x2917
-	.4byte	0x78b3
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL721
-	.4byte	0x2917
-	.4byte	0x78c7
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL723
-	.4byte	0x2917
-	.uleb128 0x32
-	.4byte	.LVL725
-	.4byte	0x2917
-	.4byte	0x78e4
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL726
-	.4byte	0x2917
-	.4byte	0x78fa
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x4
-	.byte	0x7b
-	.sleb128 0
-	.byte	0x32
-	.byte	0x24
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL727
-	.4byte	0x2917
-	.uleb128 0x44
-	.4byte	.LVL728
-	.4byte	0x2917
-	.uleb128 0x44
-	.4byte	.LVL729
-	.4byte	0x2917
-	.uleb128 0x32
-	.4byte	.LVL732
-	.4byte	0x2917
-	.4byte	0x7929
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL733
-	.4byte	0x2917
-	.4byte	0x793d
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL737
-	.4byte	0x2917
-	.4byte	0x7951
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL738
-	.4byte	0x2917
-	.4byte	0x7965
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL740
-	.4byte	0x2917
-	.uleb128 0x44
-	.4byte	.LVL741
-	.4byte	0x2917
-	.uleb128 0x44
-	.4byte	.LVL742
-	.4byte	0x2917
-	.uleb128 0x44
-	.4byte	.LVL743
-	.4byte	0x2917
-	.uleb128 0x44
-	.4byte	.LVL744
-	.4byte	0x2917
-	.uleb128 0x32
-	.4byte	.LVL745
-	.4byte	0x22fb
-	.4byte	0x79a7
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -44
-	.byte	0x6
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL747
-	.4byte	0x2917
-	.uleb128 0x44
-	.4byte	.LVL750
-	.4byte	0x2917
-	.uleb128 0x44
-	.4byte	.LVL753
-	.4byte	0x2917
-	.uleb128 0x44
-	.4byte	.LVL756
-	.4byte	0x2917
-	.uleb128 0x44
-	.4byte	.LVL759
-	.4byte	0x2917
-	.uleb128 0x44
-	.4byte	.LVL763
-	.4byte	0x2917
-	.uleb128 0x34
-	.4byte	.LVL767
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC85
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR138
-	.byte	0
-	.byte	0
-	.uleb128 0x39
-	.4byte	.LASF864
-	.byte	0x3
-	.byte	0xb7
-	.4byte	0x50
-	.4byte	.LFB208
-	.4byte	.LFE208-.LFB208
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7a56
-	.uleb128 0x2c
-	.4byte	.LASF845
-	.byte	0x3
-	.byte	0xb7
-	.4byte	0x73a9
-	.4byte	.LLST10
-	.uleb128 0x3b
-	.ascii	"i\000"
-	.byte	0x3
-	.byte	0xb9
-	.4byte	0xdc5
-	.4byte	.LLST11
-	.uleb128 0x44
-	.4byte	.LVL30
-	.4byte	0x7a97
-	.uleb128 0x32
-	.4byte	.LVL31
-	.4byte	0x7a97
-	.4byte	0x7a4c
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL35
-	.4byte	0x7a56
-	.byte	0
-	.uleb128 0x2b
-	.4byte	.LASF865
-	.byte	0x3
-	.byte	0xa5
-	.4byte	0x50
-	.4byte	.LFB207
-	.4byte	.LFE207-.LFB207
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7a7f
-	.uleb128 0x2c
-	.4byte	.LASF866
-	.byte	0x3
-	.byte	0xa5
-	.4byte	0xdba
-	.4byte	.LLST9
-	.byte	0
-	.uleb128 0x66
-	.4byte	.LASF867
-	.byte	0x3
-	.byte	0x9f
-	.byte	0x1
-	.4byte	0x7a97
-	.uleb128 0x36
-	.4byte	.LASF868
-	.byte	0x3
-	.byte	0x9f
-	.4byte	0xdc5
-	.byte	0
-	.uleb128 0x2b
-	.4byte	.LASF869
-	.byte	0x3
-	.byte	0x7f
-	.4byte	0xdba
-	.4byte	.LFB205
-	.4byte	.LFE205-.LFB205
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7adc
-	.uleb128 0x2f
-	.ascii	"num\000"
-	.byte	0x3
-	.byte	0x7f
-	.4byte	0xdc5
-	.4byte	.LLST6
-	.uleb128 0x3b
-	.ascii	"i\000"
-	.byte	0x3
-	.byte	0x81
-	.4byte	0xdba
-	.4byte	.LLST7
-	.uleb128 0x30
-	.4byte	.LASF870
-	.byte	0x3
-	.byte	0x82
-	.4byte	0xdc5
-	.4byte	.LLST8
-	.byte	0
-	.uleb128 0x2b
-	.4byte	.LASF871
-	.byte	0x3
-	.byte	0x71
-	.4byte	0x50
-	.4byte	.LFB204
-	.4byte	.LFE204-.LFB204
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7b4a
-	.uleb128 0x2c
-	.4byte	.LASF299
-	.byte	0x3
-	.byte	0x71
-	.4byte	0xf6
-	.4byte	.LLST102
-	.uleb128 0x3b
-	.ascii	"buf\000"
-	.byte	0x3
-	.byte	0x73
-	.4byte	0xf6
-	.4byte	.LLST103
-	.uleb128 0x32
-	.4byte	.LVL439
-	.4byte	0x92d7
-	.4byte	0x7b39
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC71
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC70
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL441
-	.4byte	0x7b4a
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x2b
-	.4byte	.LASF872
-	.byte	0x3
-	.byte	0xb
-	.4byte	0x50
-	.4byte	.LFB203
-	.4byte	.LFE203-.LFB203
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x83a0
-	.uleb128 0x2c
-	.4byte	.LASF299
-	.byte	0x3
-	.byte	0xb
-	.4byte	0xf6
-	.4byte	.LLST97
-	.uleb128 0x3b
-	.ascii	"i\000"
-	.byte	0x3
-	.byte	0xd
-	.4byte	0x50
-	.4byte	.LLST98
-	.uleb128 0x3b
-	.ascii	"buf\000"
-	.byte	0x3
-	.byte	0xe
-	.4byte	0xf6
-	.4byte	.LLST99
-	.uleb128 0x61
-	.4byte	.LBB225
-	.4byte	.LBE225-.LBB225
-	.4byte	0x7bde
-	.uleb128 0x30
-	.4byte	.LASF586
-	.byte	0x3
-	.byte	0x57
-	.4byte	0xdba
-	.4byte	.LLST100
-	.uleb128 0x32
-	.4byte	.LVL425
-	.4byte	0x5b26
-	.4byte	0x7bbe
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL427
-	.4byte	0x92d7
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC68
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x61
-	.4byte	.LBB226
-	.4byte	.LBE226-.LBB226
-	.4byte	0x7c17
-	.uleb128 0x30
-	.4byte	.LASF586
-	.byte	0x3
-	.byte	0x60
-	.4byte	0xdba
-	.4byte	.LLST101
-	.uleb128 0x34
-	.4byte	.LVL435
-	.4byte	0x92d7
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 -1
-	.byte	0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL290
-	.4byte	0x92d7
-	.4byte	0x7c34
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC2
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL292
-	.4byte	0x92d7
-	.4byte	0x7c51
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC3
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL294
-	.4byte	0x92d7
-	.4byte	0x7c6e
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC4
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL296
-	.4byte	0x92d7
-	.4byte	0x7c8b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC5
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL298
-	.4byte	0x92d7
-	.4byte	0x7ca8
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL300
-	.4byte	0x92d7
-	.4byte	0x7cc5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL302
-	.4byte	0x92d7
-	.4byte	0x7ce2
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL304
-	.4byte	0x92d7
-	.4byte	0x7cff
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC9
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL306
-	.4byte	0x92d7
-	.4byte	0x7d1c
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC10
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL308
-	.4byte	0x92d7
-	.4byte	0x7d39
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC11
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL310
-	.4byte	0x92d7
-	.4byte	0x7d56
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC12
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL312
-	.4byte	0x92d7
-	.4byte	0x7d73
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC13
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL314
-	.4byte	0x92d7
-	.4byte	0x7d90
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC14
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL316
-	.4byte	0x92d7
-	.4byte	0x7dad
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC15
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL318
-	.4byte	0x92d7
-	.4byte	0x7dca
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC16
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL320
-	.4byte	0x92d7
-	.4byte	0x7de7
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC17
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL322
-	.4byte	0x92d7
-	.4byte	0x7e04
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC18
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL324
-	.4byte	0x92d7
-	.4byte	0x7e21
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC19
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL326
-	.4byte	0x92d7
-	.4byte	0x7e3e
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC20
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL328
-	.4byte	0x92d7
-	.4byte	0x7e5b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC21
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL330
-	.4byte	0x92d7
-	.4byte	0x7e78
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC22
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL332
-	.4byte	0x92d7
-	.4byte	0x7e95
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC23
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL334
-	.4byte	0x92d7
-	.4byte	0x7eb2
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC24
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL336
-	.4byte	0x92d7
-	.4byte	0x7ecf
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC25
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL338
-	.4byte	0x92d7
-	.4byte	0x7eec
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC26
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL340
-	.4byte	0x92d7
-	.4byte	0x7f09
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC27
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL342
-	.4byte	0x92d7
-	.4byte	0x7f26
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC28
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL344
-	.4byte	0x92d7
-	.4byte	0x7f43
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC29
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL346
-	.4byte	0x92d7
-	.4byte	0x7f60
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC30
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL348
-	.4byte	0x92d7
-	.4byte	0x7f7d
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL350
-	.4byte	0x92d7
-	.4byte	0x7f9a
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC32
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL352
-	.4byte	0x92d7
-	.4byte	0x7fb7
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC33
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL354
-	.4byte	0x92d7
-	.4byte	0x7fd4
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC34
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL356
-	.4byte	0x92d7
-	.4byte	0x7ff1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC35
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL358
-	.4byte	0x92d7
-	.4byte	0x800e
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC36
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL360
-	.4byte	0x92d7
-	.4byte	0x802b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC37
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL362
-	.4byte	0x92d7
-	.4byte	0x8048
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC38
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL364
-	.4byte	0x92d7
-	.4byte	0x8065
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC39
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL366
-	.4byte	0x92d7
-	.4byte	0x8082
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC40
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL368
-	.4byte	0x92d7
-	.4byte	0x809f
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC41
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL370
-	.4byte	0x92d7
-	.4byte	0x80bc
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC42
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL372
-	.4byte	0x92d7
-	.4byte	0x80d9
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC43
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL374
-	.4byte	0x92d7
-	.4byte	0x80f6
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC44
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL376
-	.4byte	0x92d7
-	.4byte	0x8113
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC45
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL378
-	.4byte	0x92d7
-	.4byte	0x8130
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC46
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL380
-	.4byte	0x92d7
-	.4byte	0x814d
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC47
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL382
-	.4byte	0x92d7
-	.4byte	0x816a
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC48
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL384
-	.4byte	0x92d7
-	.4byte	0x8187
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC49
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL386
-	.4byte	0x92d7
-	.4byte	0x81a4
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC50
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL388
-	.4byte	0x92d7
-	.4byte	0x81c1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC51
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL390
-	.4byte	0x92d7
-	.4byte	0x81de
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC52
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL392
-	.4byte	0x92d7
-	.4byte	0x81fb
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC53
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL394
-	.4byte	0x92d7
-	.4byte	0x8218
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC54
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL396
-	.4byte	0x92d7
-	.4byte	0x8235
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC55
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL398
-	.4byte	0x92d7
-	.4byte	0x8252
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC56
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL400
-	.4byte	0x92d7
-	.4byte	0x826f
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC57
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL402
-	.4byte	0x92d7
-	.4byte	0x828c
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC58
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL404
-	.4byte	0x92d7
-	.4byte	0x82a9
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC59
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL406
-	.4byte	0x92d7
-	.4byte	0x82c6
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC60
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL408
-	.4byte	0x92d7
-	.4byte	0x82e3
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC61
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL410
-	.4byte	0x92d7
-	.4byte	0x8300
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC62
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL412
-	.4byte	0x92d7
-	.4byte	0x831d
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC63
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL414
-	.4byte	0x92d7
-	.4byte	0x833a
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC64
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL416
-	.4byte	0x38e8
-	.uleb128 0x32
-	.4byte	.LVL417
-	.4byte	0x92d7
-	.4byte	0x8360
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC65
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL419
-	.4byte	0x388f
-	.uleb128 0x32
-	.4byte	.LVL420
-	.4byte	0x92d7
-	.4byte	0x8386
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC66
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL423
-	.4byte	0x92d7
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC67
-	.byte	0
-	.byte	0
-	.uleb128 0x6d
-	.4byte	0x27a6
-	.4byte	.LFB352
-	.4byte	.LFE352-.LFB352
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x83fa
-	.uleb128 0x46
-	.4byte	0x27c1
-	.4byte	.LLST0
-	.uleb128 0x46
-	.4byte	0x27cc
-	.4byte	.LLST1
-	.uleb128 0x6e
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-	.uleb128 0x6f
-	.4byte	0x27d7
-	.uleb128 0x6f
-	.4byte	0x27e2
-	.uleb128 0x70
-	.4byte	0x27ed
-	.4byte	.LLST2
-	.uleb128 0x70
-	.4byte	0x27f8
-	.4byte	.LLST3
-	.uleb128 0x70
-	.4byte	0x2803
-	.4byte	.LLST4
-	.uleb128 0x6f
-	.4byte	0x280e
-	.uleb128 0x6f
-	.4byte	0x2819
-	.byte	0
-	.uleb128 0x71
-	.4byte	0x4b2d
-	.4byte	.LFB358
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-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8423
-	.uleb128 0x46
-	.4byte	0x4b3a
-	.4byte	.LLST5
-	.uleb128 0x72
-	.4byte	0x4b46
-	.uleb128 0x6
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-	.4byte	0x4b46
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-	.byte	0
-	.uleb128 0x71
-	.4byte	0x7a7f
-	.4byte	.LFB206
-	.4byte	.LFE206-.LFB206
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x843e
-	.uleb128 0x72
-	.4byte	0x7a8b
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0
-	.uleb128 0x71
-	.4byte	0x76c3
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-	.4byte	0x8476
-	.uleb128 0x46
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-	.4byte	.LLST12
-	.uleb128 0x6f
-	.4byte	0x76e0
-	.uleb128 0x73
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-	.uleb128 0x6e
-	.4byte	0x76d4
-	.uleb128 0x73
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-	.uleb128 0x6f
-	.4byte	0x845a
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x74
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-	.4byte	.LFE219-.LFB219
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-	.byte	0x9c
-	.uleb128 0x74
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-	.byte	0x9c
-	.uleb128 0x74
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-	.4byte	.LFE241-.LFB241
-	.uleb128 0x1
-	.byte	0x9c
-	.uleb128 0x74
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-	.4byte	.LFE242-.LFB242
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-	.byte	0x9c
-	.uleb128 0x71
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-	.4byte	.LFE248-.LFB248
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-	.byte	0x9c
-	.4byte	0x8519
-	.uleb128 0x46
-	.4byte	0x5dea
-	.4byte	.LLST47
-	.uleb128 0x6f
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-	.uleb128 0x3e
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-	.uleb128 0x6e
-	.4byte	0x5dea
-	.uleb128 0x73
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-	.uleb128 0x2d
-	.4byte	.LVL134
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-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR46
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-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xdd
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-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL132
-	.4byte	0x5d3c
-	.byte	0
-	.uleb128 0x71
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-	.4byte	.LFE247-.LFB247
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8580
-	.uleb128 0x46
-	.4byte	0x5e0f
-	.4byte	.LLST53
-	.uleb128 0x6f
-	.4byte	0x5e1a
-	.uleb128 0x3e
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-	.uleb128 0x6e
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-	.uleb128 0x73
-	.4byte	.Ldebug_ranges0+0x48
-	.uleb128 0x6f
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-	.uleb128 0x2d
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-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR49
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
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-	.byte	0
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-	.uleb128 0x44
-	.4byte	.LVL151
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-	.byte	0
-	.uleb128 0x71
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-	.4byte	.LFE255-.LFB255
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8699
-	.uleb128 0x46
-	.4byte	0x5ab8
-	.4byte	.LLST65
-	.uleb128 0x6f
-	.4byte	0x5ac4
-	.uleb128 0x6f
-	.4byte	0x5ad0
-	.uleb128 0x6f
-	.4byte	0x5adc
-	.uleb128 0x6f
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-	.uleb128 0x6f
-	.4byte	0x5af4
-	.uleb128 0x6f
-	.4byte	0x5b00
-	.uleb128 0x6f
-	.4byte	0x5b0c
-	.uleb128 0x6f
-	.4byte	0x5b18
-	.uleb128 0x73
-	.4byte	.Ldebug_ranges0+0x60
-	.uleb128 0x46
-	.4byte	0x5ab8
-	.4byte	.LLST66
-	.uleb128 0x73
-	.4byte	.Ldebug_ranges0+0x60
-	.uleb128 0x70
-	.4byte	0x859c
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-	.uleb128 0x70
-	.4byte	0x85a1
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-	.uleb128 0x70
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-	.uleb128 0x70
-	.4byte	0x85ab
-	.4byte	.LLST70
-	.uleb128 0x70
-	.4byte	0x85b0
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-	.uleb128 0x70
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-	.uleb128 0x70
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-	.uleb128 0x6f
-	.4byte	0x85bf
-	.uleb128 0x32
-	.4byte	.LVL197
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-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR54
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-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x1d6
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-	.uleb128 0x32
-	.4byte	.LVL205
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-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR41
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
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-	.uleb128 0x32
-	.4byte	.LVL206
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-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR54
-	.uleb128 0x2e
-	.uleb128 0x1
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-	.uleb128 0x3
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-	.uleb128 0x34
-	.4byte	.LVL207
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-	.uleb128 0x2e
-	.uleb128 0x1
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-	.uleb128 0x2
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-	.byte	0
-	.byte	0
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-	.4byte	0x4fb4
-	.4byte	.LFB269
-	.4byte	.LFE269-.LFB269
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x86d7
-	.uleb128 0x46
-	.4byte	0x4fc1
-	.4byte	.LLST77
-	.uleb128 0x75
-	.4byte	0x4fcd
-	.byte	0
-	.uleb128 0x73
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-	.uleb128 0x72
-	.4byte	0x4fc1
-	.uleb128 0x4
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-	.uleb128 0x1
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-	.byte	0
-	.byte	0
-	.byte	0
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-	.4byte	.LFE275-.LFB275
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-	.4byte	0x8710
-	.uleb128 0x46
-	.4byte	0x4b3a
-	.4byte	.LLST78
-	.uleb128 0x46
-	.4byte	0x4b46
-	.4byte	.LLST79
-	.uleb128 0x2d
-	.4byte	.LVL236
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-	.uleb128 0x3c
-	.4byte	0x4b46
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
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-	.byte	0
-	.byte	0
-	.uleb128 0x71
-	.4byte	0x4035
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-	.4byte	.LFE285-.LFB285
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-	.byte	0x9c
-	.4byte	0x8756
-	.uleb128 0x72
-	.4byte	0x4042
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x6f
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-	.uleb128 0x76
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-	.4byte	.LBE223-.LBB223
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-	.4byte	0x4042
-	.4byte	.LLST84
-	.uleb128 0x76
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-	.4byte	.LBE224-.LBB224
-	.uleb128 0x70
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-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x71
-	.4byte	0x37a0
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-	.4byte	.LFE300-.LFB300
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-	.uleb128 0x46
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-	.uleb128 0x76
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-	.uleb128 0x44
-	.4byte	.LVL477
-	.4byte	0x5e03
-	.byte	0
-	.byte	0
-	.uleb128 0x71
-	.4byte	0x2b7e
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-	.4byte	.LFE319-.LFB319
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x87b5
-	.uleb128 0x44
-	.4byte	.LVL537
-	.4byte	0x616f
-	.uleb128 0x44
-	.4byte	.LVL538
-	.4byte	0x2c15
-	.byte	0
-	.uleb128 0x71
-	.4byte	0x5fb2
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-	.4byte	.LFE243-.LFB243
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8854
-	.uleb128 0x46
-	.4byte	0x5fbe
-	.4byte	.LLST169
-	.uleb128 0x46
-	.4byte	0x5fc9
-	.4byte	.LLST170
-	.uleb128 0x77
-	.4byte	0x5fed
-	.4byte	.LBB247
-	.4byte	.LBE247-.LBB247
-	.byte	0x2
-	.byte	0x65
-	.uleb128 0x76
-	.4byte	.LBB249
-	.4byte	.LBE249-.LBB249
-	.uleb128 0x46
-	.4byte	0x5fc9
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-	.uleb128 0x46
-	.4byte	0x5fbe
-	.4byte	.LLST172
-	.uleb128 0x76
-	.4byte	.LBB250
-	.4byte	.LBE250-.LBB250
-	.uleb128 0x70
-	.4byte	0x5fd5
-	.4byte	.LLST173
-	.uleb128 0x76
-	.4byte	.LBB251
-	.4byte	.LBE251-.LBB251
-	.uleb128 0x70
-	.4byte	0x5fdf
-	.4byte	.LLST174
-	.uleb128 0x32
-	.4byte	.LVL627
-	.4byte	0x616f
-	.4byte	0x883c
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL629
-	.4byte	0x2453
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x71
-	.4byte	0x583e
-	.4byte	.LFB258
-	.4byte	.LFE258-.LFB258
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x88f7
-	.uleb128 0x46
-	.4byte	0x584f
-	.4byte	.LLST187
-	.uleb128 0x70
-	.4byte	0x585b
-	.4byte	.LLST188
-	.uleb128 0x70
-	.4byte	0x5867
-	.4byte	.LLST189
-	.uleb128 0x6f
-	.4byte	0x5873
-	.uleb128 0x61
-	.4byte	.LBB260
-	.4byte	.LBE260-.LBB260
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-	.uleb128 0x46
-	.4byte	0x584f
-	.4byte	.LLST190
-	.uleb128 0x76
-	.4byte	.LBB261
-	.4byte	.LBE261-.LBB261
-	.uleb128 0x6f
-	.4byte	0x8870
-	.uleb128 0x6f
-	.4byte	0x8879
-	.uleb128 0x6f
-	.4byte	0x8882
-	.uleb128 0x34
-	.4byte	.LVL703
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR116
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x245
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL700
-	.4byte	0x5e28
-	.uleb128 0x34
-	.4byte	.LVL701
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC84
-	.byte	0
-	.byte	0
-	.uleb128 0x71
-	.4byte	0x2ad4
-	.4byte	.LFB321
-	.4byte	.LFE321-.LFB321
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x89c4
-	.uleb128 0x75
-	.4byte	0x2ae5
-	.byte	0
-	.uleb128 0x6f
-	.4byte	0x2af1
-	.uleb128 0x6f
-	.4byte	0x2afb
-	.uleb128 0x6f
-	.4byte	0x2b07
-	.uleb128 0x3e
-	.4byte	.Ldebug_ranges0+0x100
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-	.uleb128 0x6f
-	.4byte	0x890a
-	.uleb128 0x70
-	.4byte	0x8910
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-	.uleb128 0x78
-	.4byte	0x8915
-	.uleb128 0x3
-	.byte	0x91
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-	.uleb128 0x78
-	.4byte	0x891a
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -80
-	.uleb128 0x61
-	.4byte	.LBB271
-	.4byte	.LBE271-.LBB271
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-	.uleb128 0x78
-	.4byte	0x2b18
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -100
-	.uleb128 0x32
-	.4byte	.LVL928
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-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
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-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
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-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
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-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL929
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-	.uleb128 0x44
-	.4byte	.LVL930
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-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL927
-	.4byte	0x526b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.byte	0
-	.uleb128 0x76
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-	.4byte	0x2b26
-	.uleb128 0xd
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-	.byte	0x24
-	.byte	0x3
-	.4byte	g_max_erase_count
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-	.byte	0x3a
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-	.byte	0
-	.byte	0
-	.uleb128 0x71
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-	.byte	0x9c
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-	.uleb128 0x46
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-	.4byte	.LLST282
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-	.uleb128 0x6f
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-	.uleb128 0x3
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-	.uleb128 0x78
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-	.uleb128 0x3
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-	.uleb128 0x79
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-	.4byte	.LDL1
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-	.4byte	.LVL1153
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-	.uleb128 0x1
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-	.uleb128 0x3
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-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
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-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
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-	.byte	0
-	.uleb128 0x32
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-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
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-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
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-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
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-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1155
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-	.4byte	0x8a8a
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-	.uleb128 0x1
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-	.uleb128 0x3
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-	.uleb128 0x2e
-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x2e
-	.uleb128 0x1
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-	.uleb128 0x1
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-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1156
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-	.uleb128 0x2e
-	.uleb128 0x1
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-	.uleb128 0x3
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-	.uleb128 0x2e
-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x2e
-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x2e
-	.uleb128 0x1
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-	.uleb128 0x1
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-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL1158
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-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
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-	.uleb128 0x2e
-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x2e
-	.uleb128 0x1
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-	.uleb128 0x1
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-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x71
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-	.4byte	.LFE320-.LFB320
-	.uleb128 0x1
-	.byte	0x9c
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-	.uleb128 0x46
-	.4byte	0x2b45
-	.4byte	.LLST303
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-	.uleb128 0x6f
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-	.uleb128 0x6f
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-	.uleb128 0x6e
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-	.uleb128 0x73
-	.4byte	.Ldebug_ranges0+0x130
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-	.4byte	0x8af7
-	.uleb128 0x1
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-	.4byte	.LVL1236
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-	.4byte	.LVL1238
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-	.uleb128 0x1
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-	.uleb128 0x2
-	.byte	0x7a
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-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1244
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-	.uleb128 0x1
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-	.uleb128 0x3
-	.byte	0x7d
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-	.uleb128 0x2e
-	.uleb128 0x1
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-	.uleb128 0x2
-	.byte	0x7b
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-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1245
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-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1246
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-	.byte	0
-	.byte	0
-	.byte	0
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-	.uleb128 0x46
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-	.4byte	.LLST307
-	.uleb128 0x6f
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-	.uleb128 0x61
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-	.4byte	0x8ba1
-	.uleb128 0x32
-	.4byte	.LVL1256
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-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR41
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-	.uleb128 0x1
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-	.uleb128 0x2
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-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1257
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-	.uleb128 0x1
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-	.uleb128 0x5
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-	.uleb128 0x1
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-	.uleb128 0x5
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-	.uleb128 0x1
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-	.uleb128 0x3
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-	.uleb128 0x1
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-	.uleb128 0x2
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-	.uleb128 0x1
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-	.uleb128 0x2e
-	.uleb128 0x1
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-	.uleb128 0x5
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-	.uleb128 0x1
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-	.uleb128 0x1
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-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1264
-	.4byte	0x5aa7
-	.byte	0
-	.uleb128 0x71
-	.4byte	0x4ece
-	.4byte	.LFB271
-	.4byte	.LFE271-.LFB271
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8d3d
-	.uleb128 0x73
-	.4byte	.Ldebug_ranges0+0x150
-	.uleb128 0x70
-	.4byte	0x4edc
-	.4byte	.LLST311
-	.uleb128 0x78
-	.4byte	0x4ee8
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -56
-	.uleb128 0x70
-	.4byte	0x4ef4
-	.4byte	.LLST312
-	.uleb128 0x78
-	.4byte	0x4f00
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -52
-	.uleb128 0x70
-	.4byte	0x4f0c
-	.4byte	.LLST313
-	.uleb128 0x32
-	.4byte	.LVL1277
-	.4byte	0x526b
-	.4byte	0x8cc8
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1279
-	.4byte	0x26a8
-	.4byte	0x8ce7
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -52
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1283
-	.4byte	0x22fb
-	.4byte	0x8cfb
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1285
-	.4byte	0x331b
-	.4byte	0x8d0f
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1286
-	.4byte	0x2509
-	.4byte	0x8d32
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -52
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1287
-	.4byte	0x3236
-	.byte	0
-	.byte	0
-	.uleb128 0x71
-	.4byte	0x3df7
-	.4byte	.LFB289
-	.4byte	.LFE289-.LFB289
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8d6e
-	.uleb128 0x2d
-	.4byte	.LVL1534
-	.4byte	0x5148
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR81
-	.byte	0
-	.byte	0
-	.uleb128 0x71
-	.4byte	0x4b53
-	.4byte	.LFB274
-	.4byte	.LFE274-.LFB274
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8dc5
-	.uleb128 0x32
-	.4byte	.LVL1560
-	.4byte	0x5030
-	.4byte	0x8d95
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x40
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1561
-	.4byte	0x92b5
-	.4byte	0x8db5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC71
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC103
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL1562
-	.4byte	0x22fb
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.byte	0
-	.uleb128 0x71
-	.4byte	0x2d79
-	.4byte	.LFB314
-	.4byte	.LFE314-.LFB314
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8e13
-	.uleb128 0x32
-	.4byte	.LVL1694
-	.4byte	0x2d82
-	.4byte	0x8dec
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1695
-	.4byte	0x4f1a
-	.4byte	0x8e03
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR144
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL1696
-	.4byte	0x2f28
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.byte	0
-	.uleb128 0x71
-	.4byte	0x29ec
-	.4byte	.LFB322
-	.4byte	.LFE322-.LFB322
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x9129
-	.uleb128 0x46
-	.4byte	0x29fd
-	.4byte	.LLST397
-	.uleb128 0x46
-	.4byte	0x2a09
-	.4byte	.LLST398
-	.uleb128 0x75
-	.4byte	0x2a15
-	.byte	0x1
-	.uleb128 0x6f
-	.4byte	0x2a21
-	.uleb128 0x6f
-	.4byte	0x2a2d
-	.uleb128 0x7a
-	.4byte	0x2a39
-	.sleb128 -1
-	.uleb128 0x6f
-	.4byte	0x2a45
-	.uleb128 0x6f
-	.4byte	0x2a51
-	.uleb128 0x6f
-	.4byte	0x2a5d
-	.uleb128 0x6f
-	.4byte	0x2a69
-	.uleb128 0x6f
-	.4byte	0x2a75
-	.uleb128 0x6f
-	.4byte	0x2a81
-	.uleb128 0x6f
-	.4byte	0x2a9d
-	.uleb128 0x3e
-	.4byte	.Ldebug_ranges0+0x1a0
-	.4byte	0x9119
-	.uleb128 0x46
-	.4byte	0x2a09
-	.4byte	.LLST399
-	.uleb128 0x46
-	.4byte	0x29fd
-	.4byte	.LLST400
-	.uleb128 0x73
-	.4byte	.Ldebug_ranges0+0x1a0
-	.uleb128 0x6f
-	.4byte	0x8e38
-	.uleb128 0x70
-	.4byte	0x8e3e
-	.4byte	.LLST401
-	.uleb128 0x78
-	.4byte	0x8e43
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x6f
-	.4byte	0x8e48
-	.uleb128 0x70
-	.4byte	0x8e4e
-	.4byte	.LLST402
-	.uleb128 0x70
-	.4byte	0x8e53
-	.4byte	.LLST403
-	.uleb128 0x70
-	.4byte	0x8e58
-	.4byte	.LLST404
-	.uleb128 0x70
-	.4byte	0x8e5d
-	.4byte	.LLST405
-	.uleb128 0x70
-	.4byte	0x8e62
-	.4byte	.LLST406
-	.uleb128 0x70
-	.4byte	0x8e67
-	.4byte	.LLST407
-	.uleb128 0x7b
-	.4byte	0x2a8d
-	.uleb128 0x7b
-	.4byte	0x2a95
-	.uleb128 0x6f
-	.4byte	0x8e6c
-	.uleb128 0x3e
-	.4byte	.Ldebug_ranges0+0x1c0
-	.4byte	0x8f57
-	.uleb128 0x70
-	.4byte	0x2aab
-	.4byte	.LLST408
-	.uleb128 0x44
-	.4byte	.LVL1721
-	.4byte	0x37be
-	.uleb128 0x32
-	.4byte	.LVL1724
-	.4byte	0x5b26
-	.4byte	0x8f20
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x40
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1726
-	.4byte	0x5b26
-	.4byte	0x8f34
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1729
-	.4byte	0x2b7e
-	.uleb128 0x34
-	.4byte	.LVL1741
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC107
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1752
-	.4byte	0x3145
-	.uleb128 0x32
-	.4byte	.LVL1753
-	.4byte	0x3f1b
-	.4byte	0x8f74
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1754
-	.4byte	0x5b26
-	.4byte	0x8f88
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1757
-	.4byte	0x2ad4
-	.uleb128 0x44
-	.4byte	.LVL1760
-	.4byte	0x5b26
-	.uleb128 0x32
-	.4byte	.LVL1762
-	.4byte	0x3236
-	.4byte	0x8fae
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x9
-	.byte	0xff
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1767
-	.4byte	0x3145
-	.4byte	0x8fc5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x91
-	.sleb128 -68
-	.byte	0x94
-	.byte	0x2
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1768
-	.4byte	0x3236
-	.4byte	0x8fd9
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x9
-	.byte	0xff
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1769
-	.4byte	0x92b5
-	.4byte	0x9000
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR175
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x292
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1770
-	.4byte	0x92b5
-	.4byte	0x9027
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR175
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x293
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1771
-	.4byte	0x92b5
-	.4byte	0x904e
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR175
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x294
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1772
-	.4byte	0x3f1b
-	.4byte	0x9062
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1773
-	.4byte	0x2ad4
-	.uleb128 0x32
-	.4byte	.LVL1783
-	.4byte	0x26a8
-	.4byte	0x9081
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -68
-	.byte	0x6
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1792
-	.4byte	0x92b5
-	.4byte	0x90a8
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR175
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x2b8
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1793
-	.4byte	0x526b
-	.4byte	0x90c7
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1795
-	.4byte	0x2cfd
-	.uleb128 0x32
-	.4byte	.LVL1796
-	.4byte	0x317b
-	.4byte	0x90ea
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1797
-	.4byte	0x2c59
-	.uleb128 0x44
-	.4byte	.LVL1802
-	.4byte	0x2c59
-	.uleb128 0x44
-	.4byte	.LVL1803
-	.4byte	0x32db
-	.uleb128 0x44
-	.4byte	.LVL1804
-	.4byte	0x536c
-	.uleb128 0x44
-	.4byte	.LVL1805
-	.4byte	0x4d67
-	.byte	0
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL1735
-	.4byte	0x2f28
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x71
-	.4byte	0x398b
-	.4byte	.LFB295
-	.4byte	.LFE295-.LFB295
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x9292
-	.uleb128 0x75
-	.4byte	0x399c
-	.byte	0
-	.uleb128 0x61
-	.4byte	.LBB339
-	.4byte	.LBE339-.LBB339
-	.4byte	0x9228
-	.uleb128 0x6f
-	.4byte	0x913c
-	.uleb128 0x3e
-	.4byte	.Ldebug_ranges0+0x1f0
-	.4byte	0x9167
-	.uleb128 0x70
-	.4byte	0x39a7
-	.4byte	.LLST448
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1986
-	.4byte	0x3d03
-	.4byte	0x917b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1987
-	.4byte	0x3d03
-	.4byte	0x918f
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1989
-	.4byte	0x4f1a
-	.4byte	0x91a6
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR144
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1990
-	.4byte	0x4f1a
-	.4byte	0x91bd
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR149
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1991
-	.4byte	0x536c
-	.uleb128 0x44
-	.4byte	.LVL1992
-	.4byte	0x4d67
-	.uleb128 0x44
-	.4byte	.LVL1993
-	.4byte	0x4d67
-	.uleb128 0x44
-	.4byte	.LVL1994
-	.4byte	0x2c15
-	.uleb128 0x44
-	.4byte	.LVL1995
-	.4byte	0x2c15
-	.uleb128 0x32
-	.4byte	.LVL1996
-	.4byte	0x340d
-	.4byte	0x9201
-	.uleb128 0x2e
-	.uleb128 0x1
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-	.4byte	.LVL543
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-	.4byte	.LVL543
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-	.4byte	.LVL543
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-	.uleb128 0x1
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-	.4byte	.LVL544
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-	.4byte	.LVL544
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-	.4byte	.LVL544
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-	.4byte	.LVL544
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-	.4byte	.LVL544
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-	.4byte	.LVL541
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-	.2byte	0x1
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-	.uleb128 0x1
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-	.4byte	.LVL539
-	.4byte	.LVL540-1
-	.2byte	0x1
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-	.4byte	.LFE340
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-	.4byte	.LVL539
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-	.2byte	0x1
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-	.4byte	.LVL526
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-	.2byte	0x1
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-	.4byte	.LVL530
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-	.2byte	0x2
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-	.2byte	0x1
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-	.4byte	.LVL528
-	.4byte	.LVL536
-	.2byte	0x1
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-	.4byte	.LVL523
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-	.uleb128 0x1
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-	.4byte	.LVL1703
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-	.2byte	0x1
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-	.4byte	.LVL1710
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-	.4byte	.LVL1106
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-	.4byte	.LVL1111
-	.4byte	.LVL1148
-	.2byte	0x1
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-	.uleb128 0x1
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-	.4byte	.LVL1106
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-	.sleb128 -48
-	.4byte	.LVL1109
-	.4byte	.LVL1111
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-	.sleb128 -48
-	.4byte	.LVL1148
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-	.sleb128 -48
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-	.4byte	.LVL1122
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-	.2byte	0x2
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-	.sleb128 -2
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-	.4byte	.LVL1114
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-	.4byte	.LVL1124
-	.2byte	0x1
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-	.4byte	.LVL1134
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-	.4byte	.LVL1147
-	.2byte	0x1
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-	.4byte	.LVL1117
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-	.2byte	0x1
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-	.4byte	.LVL1131
-	.2byte	0x1
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-	.2byte	0x1
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-	.4byte	.LVL1114
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-	.2byte	0x1
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-	.2byte	0x3
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-	.sleb128 1
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-	.4byte	.LVL1113
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-	.4byte	0
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-	.4byte	.LVL1107
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-	.2byte	0x1
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-	.4byte	0
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-	.4byte	.LVL1129
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-	.sleb128 -52
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-	.sleb128 -52
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-	.4byte	.LVL1106
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-	.sleb128 -1
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-	.4byte	.LVL1132
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-	.4byte	0
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-	.4byte	.LVL1660
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-	.2byte	0x1
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-	.4byte	.LFE311
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-	.4byte	.LVL1673
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-	.2byte	0x2
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-	.4byte	.LVL1678
-	.2byte	0x1
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-	.4byte	.LVL1689
-	.2byte	0x1
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-	.4byte	.LVL1690
-	.2byte	0x3
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-	.sleb128 1
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-	.2byte	0x1
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-	.4byte	0
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-	.4byte	.LVL1666
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-	.2byte	0x1
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-	.4byte	.LVL1673
-	.2byte	0x1
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-	.4byte	.LVL1688
-	.2byte	0x1
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-	.4byte	0
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-	.4byte	.LVL1661
-	.4byte	.LVL1662
-	.2byte	0x1
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-	.4byte	.LVL1664
-	.2byte	0x1
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-	.4byte	.LVL1664
-	.4byte	.LVL1666
-	.2byte	0x2
-	.byte	0x32
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-	.4byte	.LVL1666
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-	.2byte	0x1
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-	.2byte	0x2
-	.byte	0x32
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-	.4byte	0
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-	.4byte	.LVL1682
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-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
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-	.4byte	.LVL515
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-	.2byte	0x1
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-	.2byte	0x1
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-	.2byte	0x5
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-	.sleb128 0
-	.byte	0x70
-	.sleb128 0
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST125:
-	.4byte	.LVL515
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-	.2byte	0x1
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-	.4byte	.LVL517-1
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-	.2byte	0x1
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-	.4byte	.LFE310
-	.2byte	0x7
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-	.sleb128 0
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-	.sleb128 0
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-	.uleb128 0x4
-	.4byte	0
-	.4byte	0
-.LLST126:
-	.4byte	.LVL515
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-	.2byte	0x1
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-	.2byte	0x1
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-	.4byte	.LVL522
-	.4byte	.LFE310
-	.2byte	0x7
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-	.sleb128 0
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-	.sleb128 0
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-	.uleb128 0x8
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-	.4byte	0
-.LLST127:
-	.4byte	.LVL517
-	.4byte	.LVL521
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST128:
-	.4byte	.LVL517
-	.4byte	.LVL518
-	.2byte	0x2
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-	.4byte	.LVL519
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-.LLST122:
-	.4byte	.LVL510
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-	.2byte	0x1
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-	.uleb128 0x1
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-	.uleb128 0x1
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-	.4byte	0
-.LLST123:
-	.4byte	.LVL510
-	.4byte	.LVL511
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST120:
-	.4byte	.LVL506
-	.4byte	.LVL507
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST121:
-	.4byte	.LVL504
-	.4byte	.LVL505
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL505
-	.4byte	.LVL508
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL508
-	.4byte	.LVL509
-	.2byte	0x3
-	.byte	0x72
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST118:
-	.4byte	.LVL498
-	.4byte	.LVL499
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST119:
-	.4byte	.LVL496
-	.4byte	.LVL497
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL497
-	.4byte	.LVL500
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL500
-	.4byte	.LVL501
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL502
-	.4byte	.LVL503
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL503
-	.4byte	.LFE307
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST117:
-	.4byte	.LVL489
-	.4byte	.LVL490
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL491
-	.4byte	.LVL492
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL493
-	.4byte	.LVL494
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL495
-	.4byte	.LFE306
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST309:
-	.4byte	.LVL1265
-	.4byte	.LVL1266
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1266
-	.4byte	.LVL1272
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1272
-	.4byte	.LVL1273
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1273
-	.4byte	.LFE305
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST310:
-	.4byte	.LVL1265
-	.4byte	.LVL1268
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1269
-	.4byte	.LVL1270
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1272
-	.4byte	.LVL1275
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1275
-	.4byte	.LFE305
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST114:
-	.4byte	.LVL478
-	.4byte	.LVL479
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL479
-	.4byte	.LFE303
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST115:
-	.4byte	.LVL483
-	.4byte	.LVL485
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL487
-	.4byte	.LFE303
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST116:
-	.4byte	.LVL478
-	.4byte	.LVL484
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL484
-	.4byte	.LVL487
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL487
-	.4byte	.LFE303
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST381:
-	.4byte	.LVL1626
-	.4byte	.LVL1628
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1628
-	.4byte	.LFE302
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST294:
-	.4byte	.LVL1192
-	.4byte	.LVL1193
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1193
-	.4byte	.LVL1233
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1233
-	.4byte	.LFE301
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST295:
-	.4byte	.LVL1199
-	.4byte	.LVL1204
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1205
-	.4byte	.LVL1233
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST296:
-	.4byte	.LVL1207
-	.4byte	.LVL1220
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1221
-	.4byte	.LVL1233
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST297:
-	.4byte	.LVL1212
-	.4byte	.LVL1213
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1214
-	.4byte	.LVL1215
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1215
-	.4byte	.LVL1219
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1225
-	.4byte	.LVL1229
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1229
-	.4byte	.LVL1230
-	.2byte	0x3
-	.byte	0x7a
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1231
-	.4byte	.LVL1233
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST298:
-	.4byte	.LVL1227
-	.4byte	.LVL1228-1
-	.2byte	0x6
-	.byte	0x7c
-	.sleb128 4
-	.byte	0x6
-	.byte	0x3a
-	.byte	0x25
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST299:
-	.4byte	.LVL1214
-	.4byte	.LVL1215
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1215
-	.4byte	.LVL1216-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1225
-	.4byte	.LVL1226
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1226
-	.4byte	.LVL1227
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL1227
-	.4byte	.LVL1228-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1228-1
-	.4byte	.LVL1229
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -44
-	.4byte	.LVL1229
-	.4byte	.LVL1231
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST300:
-	.4byte	.LVL1192
-	.4byte	.LVL1193
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1195
-	.4byte	.LVL1196
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1196
-	.4byte	.LVL1197
-	.2byte	0x3
-	.byte	0x71
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1197
-	.4byte	.LVL1198-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST301:
-	.4byte	.LVL1222
-	.4byte	.LVL1224
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST302:
-	.4byte	.LVL1222
-	.4byte	.LVL1224
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST104:
-	.4byte	.LVL445
-	.4byte	.LVL450
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL451
-	.4byte	.LVL461
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL471
-	.4byte	.LVL473
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST105:
-	.4byte	.LVL445
-	.4byte	.LVL450
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL451
-	.4byte	.LVL461
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL462
-	.4byte	.LVL467
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST106:
-	.4byte	.LVL445
-	.4byte	.LVL450
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL451
-	.4byte	.LVL461
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL461
-	.4byte	.LVL465
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL467
-	.4byte	.LVL472
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL473
-	.4byte	.LFE299
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST107:
-	.4byte	.LVL461
-	.4byte	.LVL462
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL467
-	.4byte	.LVL470
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL474
-	.4byte	.LFE299
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST108:
-	.4byte	.LVL459
-	.4byte	.LVL460
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST109:
-	.4byte	.LVL463
-	.4byte	.LVL467
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST110:
-	.4byte	.LVL446
-	.4byte	.LVL447
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL447
-	.4byte	.LVL448-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL451
-	.4byte	.LVL453
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL454
-	.4byte	.LVL455
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL455
-	.4byte	.LVL457
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST111:
-	.4byte	.LVL445
-	.4byte	.LVL450
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL451
-	.4byte	.LVL461
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL461
-	.4byte	.LVL464-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL467
-	.4byte	.LVL468
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL469
-	.4byte	.LFE299
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST93:
-	.4byte	.LVL280
-	.4byte	.LVL281
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL281
-	.4byte	.LVL284
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL285
-	.4byte	.LVL287
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL287
-	.4byte	.LFE298
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST94:
-	.4byte	.LVL280
-	.4byte	.LVL284
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL284
-	.4byte	.LVL285
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL285
-	.4byte	.LVL287
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL287
-	.4byte	.LFE298
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST95:
-	.4byte	.LVL282
-	.4byte	.LVL286
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST96:
-	.4byte	.LVL282
-	.4byte	.LVL283
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST92:
-	.4byte	.LVL278
-	.4byte	.LVL279
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL279
-	.4byte	.LFE297
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST88:
-	.4byte	.LVL267
-	.4byte	.LVL268
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL268
-	.4byte	.LFE296
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST89:
-	.4byte	.LVL267
-	.4byte	.LVL268
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL268
-	.4byte	.LVL275
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL275
-	.4byte	.LVL276
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL277
-	.4byte	.LFE296
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST90:
-	.4byte	.LVL272
-	.4byte	.LVL273-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST91:
-	.4byte	.LVL267
-	.4byte	.LVL268
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL268
-	.4byte	.LVL269
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL269
-	.4byte	.LVL270
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL270
-	.4byte	.LVL271
-	.2byte	0x2
-	.byte	0x76
-	.sleb128 4
-	.4byte	.LVL271
-	.4byte	.LVL274
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL275
-	.4byte	.LFE296
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST239:
-	.4byte	.LVL921
-	.4byte	.LVL923
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST266:
-	.4byte	.LVL1084
-	.4byte	.LVL1085
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1087
-	.4byte	.LVL1090
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1099
-	.4byte	.LVL1101
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1101
-	.4byte	.LVL1102
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1102
-	.4byte	.LFE293
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST267:
-	.4byte	.LVL1082
-	.4byte	.LVL1083
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1094
-	.4byte	.LVL1099
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST268:
-	.4byte	.LVL1087
-	.4byte	.LVL1089
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1096
-	.4byte	.LVL1097
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST269:
-	.4byte	.LVL1080
-	.4byte	.LVL1084
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1084
-	.4byte	.LVL1087
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1091
-	.4byte	.LVL1092
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1092
-	.4byte	.LVL1093
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL1094
-	.4byte	.LVL1099
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1099
-	.4byte	.LFE293
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST270:
-	.4byte	.LVL1086
-	.4byte	.LVL1091
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST378:
-	.4byte	.LVL1614
-	.4byte	.LVL1615
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1620
-	.4byte	.LVL1624
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1624
-	.4byte	.LVL1625
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1625
-	.4byte	.LFE292
-	.2byte	0x3
-	.byte	0x76
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST379:
-	.4byte	.LVL1612
-	.4byte	.LVL1613
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1615
-	.4byte	.LVL1620
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST380:
-	.4byte	.LVL1617
-	.4byte	.LVL1618
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST341:
-	.4byte	.LVL1433
-	.4byte	.LVL1435
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1435
-	.4byte	.LFE291
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST342:
-	.4byte	.LVL1433
-	.4byte	.LVL1435
-	.2byte	0x2
-	.byte	0x36
-	.byte	0x9f
-	.4byte	.LVL1435
-	.4byte	.LVL1436
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 -2
-	.byte	0x9f
-	.4byte	.LVL1436
-	.4byte	.LVL1437
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL1437
-	.4byte	.LVL1438
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 -2
-	.byte	0x9f
-	.4byte	.LVL1439
-	.4byte	.LFE291
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 -2
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST260:
-	.4byte	.LVL1058
-	.4byte	.LVL1069
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1069
-	.4byte	.LVL1070
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1070
-	.4byte	.LVL1071
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1071
-	.4byte	.LVL1079
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST261:
-	.4byte	.LVL1059
-	.4byte	.LVL1060-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1063
-	.4byte	.LVL1064
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1064
-	.4byte	.LVL1065-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1071
-	.4byte	.LVL1072
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST262:
-	.4byte	.LVL1060
-	.4byte	.LVL1061-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST263:
-	.4byte	.LVL1059
-	.4byte	.LVL1062
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1063
-	.4byte	.LVL1065
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1065
-	.4byte	.LVL1067
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1067
-	.4byte	.LVL1069-1
-	.2byte	0x9
-	.byte	0x72
-	.sleb128 0
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x71
-	.sleb128 0
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x4
-	.4byte	.LVL1071
-	.4byte	.LVL1072
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1072
-	.4byte	.LVL1074
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1074
-	.4byte	.LVL1076-1
-	.2byte	0x9
-	.byte	0x72
-	.sleb128 0
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x71
-	.sleb128 0
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x4
-	.4byte	0
-	.4byte	0
-.LLST264:
-	.4byte	.LVL1058
-	.4byte	.LVL1073
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1075
-	.4byte	.LVL1077
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1077
-	.4byte	.LVL1078-1
-	.2byte	0x5
-	.byte	0x3
-	.4byte	g_num_data_superblocks
-	.4byte	0
-	.4byte	0
-.LLST265:
-	.4byte	.LVL1058
-	.4byte	.LVL1066
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1068
-	.4byte	.LVL1079
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST86:
-	.4byte	.LVL257
-	.4byte	.LVL258
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL258
-	.4byte	.LFE287
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST87:
-	.4byte	.LVL260
-	.4byte	.LVL265
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL265
-	.4byte	.LVL266
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST315:
-	.4byte	.LVL1295
-	.4byte	.LVL1298
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1298
-	.4byte	.LVL1300
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1300
-	.4byte	.LVL1301
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1301
-	.4byte	.LFE284
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST316:
-	.4byte	.LVL1296
-	.4byte	.LVL1299
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -76
-	.4byte	.LVL1300
-	.4byte	.LFE284
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -76
-	.4byte	0
-	.4byte	0
-.LLST317:
-	.4byte	.LVL1297
-	.4byte	.LVL1299
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -60
-	.4byte	.LVL1300
-	.4byte	.LFE284
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -60
-	.4byte	0
-	.4byte	0
-.LLST318:
-	.4byte	.LVL1300
-	.4byte	.LVL1301
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1302
-	.4byte	.LVL1306
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1307
-	.4byte	.LVL1308
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1308
-	.4byte	.LVL1309-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1319
-	.4byte	.LVL1321
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1321
-	.4byte	.LVL1324
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1324
-	.4byte	.LVL1329
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1329
-	.4byte	.LVL1330
-	.2byte	0x3
-	.byte	0x72
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1347
-	.4byte	.LVL1352
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1352
-	.4byte	.LVL1353
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1353
-	.4byte	.LVL1354-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1360
-	.4byte	.LVL1361
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1361
-	.4byte	.LVL1362-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1367
-	.4byte	.LVL1368
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1368
-	.4byte	.LVL1370
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1376
-	.4byte	.LVL1379
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1379
-	.4byte	.LVL1380
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST319:
-	.4byte	.LVL1359
-	.4byte	.LVL1360
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -60
-	.4byte	.LVL1382
-	.4byte	.LVL1385
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1388
-	.4byte	.LVL1391
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1429
-	.4byte	.LVL1430
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1432
-	.4byte	.LFE284
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST320:
-	.4byte	.LVL1345
-	.4byte	.LVL1346
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -76
-	.4byte	.LVL1346
-	.4byte	.LVL1356
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1357
-	.4byte	.LVL1358
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1359
-	.4byte	.LVL1360
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -76
-	.4byte	.LVL1360
-	.4byte	.LVL1365
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1366
-	.4byte	.LVL1371
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1371
-	.4byte	.LVL1376
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1376
-	.4byte	.LFE284
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	0
-	.4byte	0
-.LLST321:
-	.4byte	.LVL1316
-	.4byte	.LVL1319
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1341
-	.4byte	.LFE284
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST322:
-	.4byte	.LVL1314
-	.4byte	.LVL1319
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -72
-	.4byte	.LVL1337
-	.4byte	.LVL1338
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -72
-	.4byte	.LVL1341
-	.4byte	.LFE284
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -72
-	.4byte	0
-	.4byte	0
-.LLST323:
-	.4byte	.LVL1301
-	.4byte	.LVL1303-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1319
-	.4byte	.LVL1321
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1325
-	.4byte	.LVL1326
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1326
-	.4byte	.LVL1331
-	.2byte	0x5
-	.byte	0x7d
-	.sleb128 0
-	.byte	0x6
-	.byte	0x32
-	.byte	0x1c
-	.4byte	.LVL1348
-	.4byte	.LVL1350
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1350
-	.4byte	.LVL1353
-	.2byte	0x6
-	.byte	0x91
-	.sleb128 -68
-	.byte	0x6
-	.byte	0x32
-	.byte	0x1c
-	.4byte	.LVL1369
-	.4byte	.LVL1371
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1377
-	.4byte	.LVL1378
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1378
-	.4byte	.LVL1381
-	.2byte	0x2
-	.byte	0x71
-	.sleb128 -2
-	.4byte	0
-	.4byte	0
-.LLST324:
-	.4byte	.LVL1304
-	.4byte	.LVL1305
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1305
-	.4byte	.LVL1317
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1321
-	.4byte	.LVL1344
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST326:
-	.4byte	.LVL1307
-	.4byte	.LVL1317
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1324
-	.4byte	.LVL1327
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1328
-	.4byte	.LVL1346
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1347
-	.4byte	.LVL1349
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1351
-	.4byte	.LVL1355
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1360
-	.4byte	.LVL1361
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1361
-	.4byte	.LVL1371
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -68
-	.4byte	.LVL1376
-	.4byte	.LFE284
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -68
-	.4byte	0
-	.4byte	0
-.LLST327:
-	.4byte	.LVL1310
-	.4byte	.LVL1312
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1313
-	.4byte	.LVL1314
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1331
-	.4byte	.LVL1332
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1332
-	.4byte	.LVL1339
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1339
-	.4byte	.LVL1340
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST328:
-	.4byte	.LVL1354
-	.4byte	.LVL1355
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1362
-	.4byte	.LVL1363
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1364
-	.4byte	.LVL1371
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -56
-	.4byte	.LVL1381
-	.4byte	.LVL1387
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -56
-	.4byte	.LVL1387
-	.4byte	.LVL1388
-	.2byte	0x7
-	.byte	0x91
-	.sleb128 -56
-	.byte	0x94
-	.byte	0x2
-	.byte	0x23
-	.uleb128 0x1
-	.byte	0x9f
-	.4byte	.LVL1388
-	.4byte	.LFE284
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -56
-	.4byte	0
-	.4byte	0
-.LLST329:
-	.4byte	.LVL1393
-	.4byte	.LVL1402
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1405
-	.4byte	.LVL1427
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST330:
-	.4byte	.LVL1383
-	.4byte	.LVL1386
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1388
-	.4byte	.LVL1402
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1402
-	.4byte	.LVL1403
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1405
-	.4byte	.LVL1427
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1429
-	.4byte	.LVL1432
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST331:
-	.4byte	.LVL1383
-	.4byte	.LVL1386
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1388
-	.4byte	.LVL1400
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1405
-	.4byte	.LVL1419
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1419
-	.4byte	.LVL1421
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1429
-	.4byte	.LVL1432
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST332:
-	.4byte	.LVL1310
-	.4byte	.LVL1311
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1311
-	.4byte	.LVL1319
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	.LVL1331
-	.4byte	.LVL1389
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	.LVL1389
-	.4byte	.LVL1390
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1390
-	.4byte	.LFE284
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	0
-	.4byte	0
-.LLST333:
-	.4byte	.LVL1295
-	.4byte	.LVL1298
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1300
-	.4byte	.LVL1312
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1319
-	.4byte	.LVL1331
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1343
-	.4byte	.LVL1358
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1371
-	.4byte	.LVL1376
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST334:
-	.4byte	.LVL1333
-	.4byte	.LVL1334
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1334
-	.4byte	.LVL1336
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -72
-	.4byte	.LVL1372
-	.4byte	.LVL1373
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1373
-	.4byte	.LVL1374
-	.2byte	0x2
-	.byte	0x73
-	.sleb128 12
-	.4byte	.LVL1374
-	.4byte	.LVL1375
-	.2byte	0x2
-	.byte	0x73
-	.sleb128 -8
-	.4byte	.LVL1384
-	.4byte	.LVL1385
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1388
-	.4byte	.LVL1394
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1397
-	.4byte	.LVL1400
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1407
-	.4byte	.LVL1410
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1410
-	.4byte	.LVL1411-1
-	.2byte	0x2
-	.byte	0x73
-	.sleb128 12
-	.4byte	.LVL1411-1
-	.4byte	.LVL1417
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1422
-	.4byte	.LVL1427
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST335:
-	.4byte	.LVL1342
-	.4byte	.LVL1358
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1371
-	.4byte	.LVL1376
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST336:
-	.4byte	.LVL1342
-	.4byte	.LVL1346
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST337:
-	.4byte	.LVL1398
-	.4byte	.LVL1399
-	.2byte	0x2
-	.byte	0x77
-	.sleb128 4
-	.4byte	.LVL1407
-	.4byte	.LVL1408-1
-	.2byte	0x2
-	.byte	0x77
-	.sleb128 4
-	.4byte	0
-	.4byte	0
-.LLST338:
-	.4byte	.LVL1412
-	.4byte	.LVL1415
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1415
-	.4byte	.LVL1416
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST339:
-	.4byte	.LVL1420
-	.4byte	.LVL1427
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	0
-	.4byte	0
-.LLST340:
-	.4byte	.LVL1423
-	.4byte	.LVL1424-1
-	.2byte	0x2
-	.byte	0x75
-	.sleb128 4
-	.4byte	.LVL1424-1
-	.4byte	.LVL1425
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST233:
-	.4byte	.LVL899
-	.4byte	.LVL900
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL900
-	.4byte	.LVL916
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL916
-	.4byte	.LFE283
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST234:
-	.4byte	.LVL899
-	.4byte	.LVL901-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST235:
-	.4byte	.LVL902
-	.4byte	.LVL903
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST236:
-	.4byte	.LVL905
-	.4byte	.LVL907-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL911
-	.4byte	.LVL913
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL913
-	.4byte	.LVL914
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST237:
-	.4byte	.LVL905
-	.4byte	.LVL910
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL911
-	.4byte	.LVL912
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST238:
-	.4byte	.LVL904
-	.4byte	.LVL906
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL906
-	.4byte	.LVL907-1
-	.2byte	0x5
-	.byte	0x3
-	.4byte	g_num_free_superblocks
-	.4byte	.LVL911
-	.4byte	.LVL914
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST81:
-	.4byte	.LVL241
-	.4byte	.LVL244
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL244
-	.4byte	.LVL246
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	.LVL246
-	.4byte	.LVL249
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL249
-	.4byte	.LFE282
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST82:
-	.4byte	.LVL241
-	.4byte	.LVL243
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL243
-	.4byte	.LFE282
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST83:
-	.4byte	.LVL242
-	.4byte	.LVL245
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL245
-	.4byte	.LVL246
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL246
-	.4byte	.LVL247
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL248
-	.4byte	.LVL249
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL249
-	.4byte	.LVL250
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST259:
-	.4byte	.LVL1045
-	.4byte	.LVL1046
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST251:
-	.4byte	.LVL1002
-	.4byte	.LVL1005
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1005
-	.4byte	.LFE278
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST252:
-	.4byte	.LVL1010
-	.4byte	.LVL1012-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1012-1
-	.4byte	.LVL1015
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -52
-	.4byte	.LVL1027
-	.4byte	.LVL1028
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1028
-	.4byte	.LVL1037
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1037
-	.4byte	.LVL1038
-	.2byte	0x3
-	.byte	0x76
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1039
-	.4byte	.LFE278
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST253:
-	.4byte	.LVL1014
-	.4byte	.LVL1015
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1016
-	.4byte	.LVL1017
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1022
-	.4byte	.LVL1023
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1023
-	.4byte	.LVL1025
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1025
-	.4byte	.LVL1026
-	.2byte	0x3
-	.byte	0x76
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1030
-	.4byte	.LVL1031
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1031
-	.4byte	.LVL1032
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1034
-	.4byte	.LVL1035
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1036
-	.4byte	.LVL1040
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1040
-	.4byte	.LVL1041
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST254:
-	.4byte	.LVL1013
-	.4byte	.LVL1017
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1022
-	.4byte	.LVL1027
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST255:
-	.4byte	.LVL1040
-	.4byte	.LVL1042
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1042
-	.4byte	.LFE278
-	.2byte	0x1
-	.byte	0x5e
-	.4byte	0
-	.4byte	0
-.LLST256:
-	.4byte	.LVL1004
-	.4byte	.LVL1013
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1027
-	.4byte	.LFE278
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST257:
-	.4byte	.LVL1004
-	.4byte	.LVL1005
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 16
-	.4byte	.LVL1005
-	.4byte	.LVL1007-1
-	.2byte	0x2
-	.byte	0x74
-	.sleb128 16
-	.4byte	.LVL1007-1
-	.4byte	.LFE278
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -44
-	.4byte	0
-	.4byte	0
-.LLST258:
-	.4byte	.LVL1006
-	.4byte	.LVL1011
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -52
-	.4byte	.LVL1027
-	.4byte	.LFE278
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -52
-	.4byte	0
-	.4byte	0
-.LLST447:
-	.4byte	.LVL1956
-	.4byte	.LVL1959
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1969
-	.4byte	.LVL1971
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1972
-	.4byte	.LFE277
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST80:
-	.4byte	.LVL239
-	.4byte	.LVL240
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL240
-	.4byte	.LFE276
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST245:
-	.4byte	.LVL951
-	.4byte	.LVL955
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL955
-	.4byte	.LVL956
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL956
-	.4byte	.LVL957
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL959
-	.4byte	.LVL960
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL960
-	.4byte	.LVL969
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL969
-	.4byte	.LVL970
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL971
-	.4byte	.LVL991
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST246:
-	.4byte	.LVL953
-	.4byte	.LVL956
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -44
-	.4byte	.LVL961
-	.4byte	.LVL991
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST247:
-	.4byte	.LVL951
-	.4byte	.LVL991
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	0
-	.4byte	0
-.LLST248:
-	.4byte	.LVL974
-	.4byte	.LVL975
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL976
-	.4byte	.LVL977
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL983
-	.4byte	.LVL984
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL985
-	.4byte	.LVL986
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL994
-	.4byte	.LVL998
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL999
-	.4byte	.LVL1000
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1000
-	.4byte	.LFE273
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST249:
-	.4byte	.LVL962
-	.4byte	.LVL964
-	.2byte	0x5
-	.byte	0x40
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL966
-	.4byte	.LVL967
-	.2byte	0x5
-	.byte	0x40
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL967
-	.4byte	.LVL968
-	.2byte	0x5
-	.byte	0x41
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL973
-	.4byte	.LVL978
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL979
-	.4byte	.LVL980
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL982
-	.4byte	.LVL987
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL988
-	.4byte	.LVL989
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL995
-	.4byte	.LVL996
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL997
-	.4byte	.LVL998
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1000
-	.4byte	.LFE273
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST250:
-	.4byte	.LVL961
-	.4byte	.LVL991
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST369:
-	.4byte	.LVL1566
-	.4byte	.LVL1573
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1575
-	.4byte	.LVL1577
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	0
-	.4byte	0
-.LLST370:
-	.4byte	.LVL1567
-	.4byte	.LVL1583
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST371:
-	.4byte	.LVL1566
-	.4byte	.LVL1573
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1573
-	.4byte	.LVL1579
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1580
-	.4byte	.LVL1583
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST241:
-	.4byte	.LVL935
-	.4byte	.LVL937
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL937
-	.4byte	.LVL940
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL940
-	.4byte	.LVL941-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL941-1
-	.4byte	.LVL941
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL941
-	.4byte	.LVL944
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL944
-	.4byte	.LFE270
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST242:
-	.4byte	.LVL936
-	.4byte	.LVL938
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL938
-	.4byte	.LVL939-1
-	.2byte	0x5
-	.byte	0x3
-	.4byte	req_sys+4
-	.4byte	.LVL941
-	.4byte	.LVL942
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL942
-	.4byte	.LVL943-1
-	.2byte	0x5
-	.byte	0x3
-	.4byte	req_sys+4
-	.4byte	0
-	.4byte	0
-.LLST243:
-	.4byte	.LVL935
-	.4byte	.LVL937
-	.2byte	0x7
-	.byte	0x70
-	.sleb128 6
-	.byte	0x94
-	.byte	0x2
-	.byte	0x31
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL937
-	.4byte	.LVL939-1
-	.2byte	0x7
-	.byte	0x76
-	.sleb128 6
-	.byte	0x94
-	.byte	0x2
-	.byte	0x31
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL941
-	.4byte	.LVL943-1
-	.2byte	0x7
-	.byte	0x76
-	.sleb128 6
-	.byte	0x94
-	.byte	0x2
-	.byte	0x31
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL944
-	.4byte	.LFE270
-	.2byte	0x7
-	.byte	0x70
-	.sleb128 6
-	.byte	0x94
-	.byte	0x2
-	.byte	0x31
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST244:
-	.4byte	.LVL935
-	.4byte	.LVL937
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 24
-	.4byte	.LVL937
-	.4byte	.LVL939-1
-	.2byte	0x2
-	.byte	0x76
-	.sleb128 24
-	.4byte	.LVL941
-	.4byte	.LVL943-1
-	.2byte	0x2
-	.byte	0x76
-	.sleb128 24
-	.4byte	.LVL944
-	.4byte	.LFE270
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 24
-	.4byte	0
-	.4byte	0
-.LLST359:
-	.4byte	.LVL1535
-	.4byte	.LVL1538
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1538
-	.4byte	.LFE268
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST360:
-	.4byte	.LVL1535
-	.4byte	.LVL1536
-	.2byte	0x3
-	.byte	0x8
-	.byte	0x20
-	.byte	0x9f
-	.4byte	.LVL1536
-	.4byte	.LVL1537
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL1537
-	.4byte	.LVL1539
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST361:
-	.4byte	.LVL1542
-	.4byte	.LVL1544
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1544
-	.4byte	.LVL1559
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1559
-	.4byte	.LFE267
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST362:
-	.4byte	.LVL1542
-	.4byte	.LVL1544
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1544
-	.4byte	.LVL1559
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1559
-	.4byte	.LFE267
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST363:
-	.4byte	.LVL1542
-	.4byte	.LVL1543
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1543
-	.4byte	.LFE267
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST364:
-	.4byte	.LVL1549
-	.4byte	.LVL1559
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST365:
-	.4byte	.LVL1549
-	.4byte	.LVL1559
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -128
-	.4byte	0
-	.4byte	0
-.LLST366:
-	.4byte	.LVL1547
-	.4byte	.LVL1548-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1548-1
-	.4byte	.LVL1557
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -124
-	.4byte	.LVL1557
-	.4byte	.LVL1558-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1558-1
-	.4byte	.LVL1559
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -124
-	.4byte	0
-	.4byte	0
-.LLST367:
-	.4byte	.LVL1542
-	.4byte	.LVL1544
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1544
-	.4byte	.LVL1545
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1546
-	.4byte	.LVL1559
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1559
-	.4byte	.LFE267
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST368:
-	.4byte	.LVL1542
-	.4byte	.LVL1544
-	.2byte	0xf
-	.byte	0x70
-	.sleb128 0
-	.byte	0x3
-	.4byte	c_ftl_nand_sec_pre_page_shift
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x25
-	.byte	0x9f
-	.4byte	.LVL1559
-	.4byte	.LFE267
-	.2byte	0xf
-	.byte	0x70
-	.sleb128 0
-	.byte	0x3
-	.4byte	c_ftl_nand_sec_pre_page_shift
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x25
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST351:
-	.4byte	.LVL1511
-	.4byte	.LVL1513
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1513
-	.4byte	.LVL1524
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1528
-	.4byte	.LVL1533
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1533
-	.4byte	.LFE266
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST352:
-	.4byte	.LVL1511
-	.4byte	.LVL1513
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1513
-	.4byte	.LVL1523
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1528
-	.4byte	.LVL1533
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1533
-	.4byte	.LFE266
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST353:
-	.4byte	.LVL1511
-	.4byte	.LVL1512
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1512
-	.4byte	.LVL1515
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	.LVL1515
-	.4byte	.LVL1516
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -136
-	.4byte	.LVL1516
-	.4byte	.LVL1529
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	.LVL1529
-	.4byte	.LVL1530
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1530
-	.4byte	.LFE266
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	0
-	.4byte	0
-.LLST354:
-	.4byte	.LVL1520
-	.4byte	.LVL1533
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST355:
-	.4byte	.LVL1519
-	.4byte	.LVL1533
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -132
-	.4byte	0
-	.4byte	0
-.LLST356:
-	.4byte	.LVL1517
-	.4byte	.LVL1518-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1518-1
-	.4byte	.LVL1530
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -124
-	.4byte	.LVL1530
-	.4byte	.LVL1531
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1531
-	.4byte	.LVL1533
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -124
-	.4byte	0
-	.4byte	0
-.LLST357:
-	.4byte	.LVL1511
-	.4byte	.LVL1513
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1513
-	.4byte	.LVL1514
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1516
-	.4byte	.LVL1533
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1533
-	.4byte	.LFE266
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST358:
-	.4byte	.LVL1511
-	.4byte	.LVL1513
-	.2byte	0xf
-	.byte	0x70
-	.sleb128 0
-	.byte	0x3
-	.4byte	c_ftl_nand_sec_pre_page_shift
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x25
-	.byte	0x9f
-	.4byte	.LVL1513
-	.4byte	.LVL1514
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1516
-	.4byte	.LVL1526
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1526
-	.4byte	.LVL1527-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1527-1
-	.4byte	.LVL1528
-	.2byte	0x3
-	.byte	0x76
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL1528
-	.4byte	.LVL1533
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1533
-	.4byte	.LFE266
-	.2byte	0xf
-	.byte	0x70
-	.sleb128 0
-	.byte	0x3
-	.4byte	c_ftl_nand_sec_pre_page_shift
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x25
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST229:
-	.4byte	.LVL882
-	.4byte	.LVL887
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL887
-	.4byte	.LFE265
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST230:
-	.4byte	.LVL882
-	.4byte	.LVL886
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL886
-	.4byte	.LFE265
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST231:
-	.4byte	.LVL882
-	.4byte	.LVL885
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL885
-	.4byte	.LFE265
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST232:
-	.4byte	.LVL888
-	.4byte	.LVL889
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL890
-	.4byte	.LVL892
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL892
-	.4byte	.LVL893-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL895
-	.4byte	.LVL897
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL898
-	.4byte	.LFE265
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST314:
-	.4byte	.LVL1290
-	.4byte	.LVL1291
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1291
-	.4byte	.LVL1292
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1292
-	.4byte	.LVL1293-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1293-1
-	.4byte	.LVL1293
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1293
-	.4byte	.LVL1294
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST74:
-	.4byte	.LVL212
-	.4byte	.LVL213
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL214
-	.4byte	.LVL215
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL215
-	.4byte	.LVL216
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL217
-	.4byte	.LVL218
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL219
-	.4byte	.LVL222
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL222
-	.4byte	.LVL223
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL224
-	.4byte	.LVL226
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL226
-	.4byte	.LVL227
-	.2byte	0x3
-	.byte	0x71
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL227
-	.4byte	.LVL228
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL228
-	.4byte	.LVL230
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL230
-	.4byte	.LVL231
-	.2byte	0x3
-	.byte	0x71
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL231
-	.4byte	.LFE263
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST75:
-	.4byte	.LVL219
-	.4byte	.LVL222
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL228
-	.4byte	.LFE263
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST76:
-	.4byte	.LVL217
-	.4byte	.LVL218
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL219
-	.4byte	.LVL220
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL224
-	.4byte	.LVL225
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL226
-	.4byte	.LVL228
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL228
-	.4byte	.LVL229
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL230
-	.4byte	.LFE263
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST227:
-	.4byte	.LVL877
-	.4byte	.LVL878
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL878
-	.4byte	.LFE262
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST228:
-	.4byte	.LVL879
-	.4byte	.LVL880
-	.2byte	0x9
-	.byte	0x72
-	.sleb128 0
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL880
-	.4byte	.LVL881-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST214:
-	.4byte	.LVL841
-	.4byte	.LVL842
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL842
-	.4byte	.LVL854
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL854
-	.4byte	.LFE261
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST215:
-	.4byte	.LVL841
-	.4byte	.LVL842
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL842
-	.4byte	.LVL854
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL854
-	.4byte	.LFE261
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST216:
-	.4byte	.LVL841
-	.4byte	.LVL842
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL842
-	.4byte	.LVL854
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -36
-	.4byte	.LVL854
-	.4byte	.LFE261
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 -36
-	.4byte	0
-	.4byte	0
-.LLST217:
-	.4byte	.LVL846
-	.4byte	.LVL854
-	.2byte	0x7
-	.byte	0x7a
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST218:
-	.4byte	.LVL848
-	.4byte	.LVL849
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL849
-	.4byte	.LVL850-1
-	.2byte	0x5
-	.byte	0x3
-	.4byte	req_sys+12
-	.4byte	0
-	.4byte	0
-.LLST219:
-	.4byte	.LVL841
-	.4byte	.LVL842
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL842
-	.4byte	.LVL851
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL852
-	.4byte	.LVL854
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST208:
-	.4byte	.LVL818
-	.4byte	.LVL820
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL820
-	.4byte	.LVL824
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL824
-	.4byte	.LVL826
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL826
-	.4byte	.LFE260
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST209:
-	.4byte	.LVL829
-	.4byte	.LVL830
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL830
-	.4byte	.LVL832
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL832
-	.4byte	.LVL833
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL836
-	.4byte	.LVL839
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL839
-	.4byte	.LVL840
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST210:
-	.4byte	.LVL829
-	.4byte	.LVL830
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL830
-	.4byte	.LVL831
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL836
-	.4byte	.LVL837
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL838
-	.4byte	.LFE260
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST211:
-	.4byte	.LVL819
-	.4byte	.LVL823
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL824
-	.4byte	.LVL825
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL825
-	.4byte	.LVL826
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 12
-	.4byte	.LVL826
-	.4byte	.LVL829-1
-	.2byte	0x2
-	.byte	0x74
-	.sleb128 12
-	.4byte	0
-	.4byte	0
-.LLST212:
-	.4byte	.LVL819
-	.4byte	.LVL820
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 24
-	.4byte	.LVL820
-	.4byte	.LVL821-1
-	.2byte	0x2
-	.byte	0x74
-	.sleb128 24
-	.4byte	.LVL824
-	.4byte	.LVL826
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 24
-	.4byte	.LVL826
-	.4byte	.LVL829-1
-	.2byte	0x2
-	.byte	0x74
-	.sleb128 24
-	.4byte	0
-	.4byte	0
-.LLST213:
-	.4byte	.LVL827
-	.4byte	.LVL828
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL828
-	.4byte	.LVL829-1
-	.2byte	0x5
-	.byte	0x3
-	.4byte	p_sys_spare_buf
-	.4byte	0
-	.4byte	0
-.LLST220:
-	.4byte	.LVL855
-	.4byte	.LVL858-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL858-1
-	.4byte	.LFE259
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST221:
-	.4byte	.LVL859
-	.4byte	.LVL865
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL868
-	.4byte	.LFE259
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST222:
-	.4byte	.LVL858
-	.4byte	.LVL860
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST223:
-	.4byte	.LVL863
-	.4byte	.LVL865
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL868
-	.4byte	.LVL873
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL873
-	.4byte	.LVL874
-	.2byte	0x3
-	.byte	0x76
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL874
-	.4byte	.LVL875
-	.2byte	0x3
-	.byte	0x78
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL875
-	.4byte	.LFE259
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST224:
-	.4byte	.LVL856
-	.4byte	.LVL862
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST225:
-	.4byte	.LVL857
-	.4byte	.LVL858-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL858-1
-	.4byte	.LVL867
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	.LVL867
-	.4byte	.LVL868
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -40
-	.4byte	.LVL868
-	.4byte	.LFE259
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	0
-	.4byte	0
-.LLST226:
-	.4byte	.LVL869
-	.4byte	.LVL870
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -36
-	.4byte	0
-	.4byte	0
-.LLST201:
-	.4byte	.LVL794
-	.4byte	.LVL797
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL797
-	.4byte	.LFE257
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST202:
-	.4byte	.LVL796
-	.4byte	.LVL801
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL805
-	.4byte	.LVL812
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST203:
-	.4byte	.LVL806
-	.4byte	.LVL812
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST204:
-	.4byte	.LVL798
-	.4byte	.LVL799
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL799
-	.4byte	.LVL800
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL800
-	.4byte	.LVL802
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL805
-	.4byte	.LVL807
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL807
-	.4byte	.LVL808
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL809
-	.4byte	.LVL812
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST205:
-	.4byte	.LVL800
-	.4byte	.LVL803
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL804
-	.4byte	.LVL805
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL806
-	.4byte	.LVL810
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL810
-	.4byte	.LVL811
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL812
-	.4byte	.LVL814
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL814
-	.4byte	.LVL816
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL816
-	.4byte	.LVL817
-	.2byte	0x3
-	.byte	0x76
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL817
-	.4byte	.LFE257
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST206:
-	.4byte	.LVL800
-	.4byte	.LVL803
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL804
-	.4byte	.LVL805
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL812
-	.4byte	.LVL815-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL815-1
-	.4byte	.LVL816
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	0
-	.4byte	0
-.LLST207:
-	.4byte	.LVL800
-	.4byte	.LVL803
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST199:
-	.4byte	.LVL781
-	.4byte	.LVL783
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL783
-	.4byte	.LFE256
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST200:
-	.4byte	.LVL781
-	.4byte	.LVL782
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL782
-	.4byte	.LFE256
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST62:
-	.4byte	.LVL179
-	.4byte	.LVL182
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL183
-	.4byte	.LVL184
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL186
-	.4byte	.LVL188
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST63:
-	.4byte	.LVL179
-	.4byte	.LVL187
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL187
-	.4byte	.LVL189
-	.2byte	0x8
-	.byte	0x73
-	.sleb128 0
-	.byte	0x71
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x36
-	.byte	0x1b
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST64:
-	.4byte	.LVL180
-	.4byte	.LVL181
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL185
-	.4byte	.LVL189
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST61:
-	.4byte	.LVL177
-	.4byte	.LVL178-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL178-1
-	.4byte	.LFE253
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST57:
-	.4byte	.LVL165
-	.4byte	.LVL170-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL170-1
-	.4byte	.LVL171
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL171
-	.4byte	.LVL176
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL176
-	.4byte	.LFE252
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST58:
-	.4byte	.LVL165
-	.4byte	.LVL169
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL171
-	.4byte	.LVL172
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL174
-	.4byte	.LFE252
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST59:
-	.4byte	.LVL165
-	.4byte	.LVL168
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL168
-	.4byte	.LVL171
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL171
-	.4byte	.LFE252
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST60:
-	.4byte	.LVL166
-	.4byte	.LVL167
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL171
-	.4byte	.LVL175
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST54:
-	.4byte	.LVL154
-	.4byte	.LVL157
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL157
-	.4byte	.LFE251
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST55:
-	.4byte	.LVL154
-	.4byte	.LVL156
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL156
-	.4byte	.LFE251
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST56:
-	.4byte	.LVL160
-	.4byte	.LVL161
-	.2byte	0x10
-	.byte	0x71
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x3
-	.4byte	p_data_block_list_table
-	.byte	0x6
-	.byte	0x22
-	.byte	0x9f
-	.4byte	.LVL161
-	.4byte	.LVL162
-	.2byte	0x12
-	.byte	0x74
-	.sleb128 2
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x3
-	.4byte	p_data_block_list_table
-	.byte	0x6
-	.byte	0x22
-	.byte	0x9f
-	.4byte	.LVL163
-	.4byte	.LVL164
-	.2byte	0xc
-	.byte	0x73
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x70
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.4byte	.LVL164
-	.4byte	.LFE251
-	.2byte	0xe
-	.byte	0x74
-	.sleb128 2
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x70
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST48:
-	.4byte	.LVL135
-	.4byte	.LVL138
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL138
-	.4byte	.LVL139
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL139
-	.4byte	.LFE250
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST49:
-	.4byte	.LVL136
-	.4byte	.LVL137
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL139
-	.4byte	.LFE250
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST50:
-	.4byte	.LVL140
-	.4byte	.LVL141
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL141
-	.4byte	.LFE250
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST51:
-	.4byte	.LVL141
-	.4byte	.LVL142
-	.2byte	0xb
-	.byte	0x72
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x31
-	.byte	0x24
-	.byte	0x7c
-	.sleb128 0
-	.byte	0x22
-	.4byte	.LVL143
-	.4byte	.LVL145
-	.2byte	0xb
-	.byte	0x72
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x31
-	.byte	0x24
-	.byte	0x7c
-	.sleb128 0
-	.byte	0x22
-	.4byte	.LVL146
-	.4byte	.LVL147
-	.2byte	0xb
-	.byte	0x72
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x31
-	.byte	0x24
-	.byte	0x7c
-	.sleb128 0
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST52:
-	.4byte	.LVL141
-	.4byte	.LVL143
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL143
-	.4byte	.LVL146
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL146
-	.4byte	.LVL148
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL148
-	.4byte	.LVL149
-	.2byte	0x5
-	.byte	0x74
-	.sleb128 0
-	.byte	0x77
-	.sleb128 0
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST38:
-	.4byte	.LVL97
-	.4byte	.LVL101
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL101
-	.4byte	.LVL102
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL102
-	.4byte	.LFE249
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST39:
-	.4byte	.LVL98
-	.4byte	.LVL100
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL102
-	.4byte	.LVL129
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL129
-	.4byte	.LFE249
-	.2byte	0x7
-	.byte	0x74
-	.sleb128 0
-	.byte	0x91
-	.sleb128 -44
-	.byte	0x6
-	.byte	0x22
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST40:
-	.4byte	.LVL105
-	.4byte	.LVL108
-	.2byte	0x1
-	.byte	0x5c
-	.4byte	.LVL108
-	.4byte	.LVL118
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL119
-	.4byte	.LFE249
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST41:
-	.4byte	.LVL103
-	.4byte	.LVL106
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL106
-	.4byte	.LVL116
-	.2byte	0xb
-	.byte	0x70
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0x3
-	.4byte	p_valid_page_count_table
-	.byte	0x6
-	.byte	0x22
-	.4byte	.LVL118
-	.4byte	.LVL119
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL119
-	.4byte	.LVL123
-	.2byte	0xb
-	.byte	0x70
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0x3
-	.4byte	p_valid_page_count_table
-	.byte	0x6
-	.byte	0x22
-	.4byte	.LVL125
-	.4byte	.LVL128
-	.2byte	0xb
-	.byte	0x70
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0x3
-	.4byte	p_valid_page_count_table
-	.byte	0x6
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST42:
-	.4byte	.LVL111
-	.4byte	.LVL114
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL114
-	.4byte	.LVL116
-	.2byte	0x8
-	.byte	0x73
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0x91
-	.sleb128 -40
-	.byte	0x6
-	.byte	0x22
-	.4byte	.LVL119
-	.4byte	.LVL122
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL122
-	.4byte	.LVL123
-	.2byte	0x8
-	.byte	0x73
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0x91
-	.sleb128 -40
-	.byte	0x6
-	.byte	0x22
-	.4byte	.LVL125
-	.4byte	.LVL126
-	.2byte	0x8
-	.byte	0x73
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0x91
-	.sleb128 -40
-	.byte	0x6
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST43:
-	.4byte	.LVL104
-	.4byte	.LVL105
-	.2byte	0xe
-	.byte	0x76
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x73
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL105
-	.4byte	.LVL118
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL118
-	.4byte	.LVL119
-	.2byte	0xe
-	.byte	0x76
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x73
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL119
-	.4byte	.LFE249
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	0
-	.4byte	0
-.LLST44:
-	.4byte	.LVL112
-	.4byte	.LVL113
-	.2byte	0xe
-	.byte	0x75
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x77
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL113
-	.4byte	.LVL115
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL119
-	.4byte	.LVL120
-	.2byte	0xe
-	.byte	0x75
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x77
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL120
-	.4byte	.LVL121
-	.2byte	0x10
-	.byte	0x75
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x72
-	.sleb128 4
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL121
-	.4byte	.LVL122
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST45:
-	.4byte	.LVL107
-	.4byte	.LVL117
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL117
-	.4byte	.LVL118
-	.2byte	0x5
-	.byte	0x74
-	.sleb128 0
-	.byte	0x75
-	.sleb128 0
-	.byte	0x22
-	.4byte	.LVL119
-	.4byte	.LVL124
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL124
-	.4byte	.LVL125
-	.2byte	0x2
-	.byte	0x71
-	.sleb128 2
-	.4byte	.LVL125
-	.4byte	.LVL128
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL128
-	.4byte	.LVL130
-	.2byte	0x5
-	.byte	0x74
-	.sleb128 0
-	.byte	0x75
-	.sleb128 0
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST46:
-	.4byte	.LVL97
-	.4byte	.LVL99
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL102
-	.4byte	.LVL108
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL108
-	.4byte	.LVL109
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL110
-	.4byte	.LVL118
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL118
-	.4byte	.LVL119
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL119
-	.4byte	.LFE249
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST185:
-	.4byte	.LVL687
-	.4byte	.LVL688
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL689
-	.4byte	.LVL693
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL695
-	.4byte	.LFE246
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST186:
-	.4byte	.LVL691
-	.4byte	.LVL693
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL695
-	.4byte	.LFE246
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST35:
-	.4byte	.LVL90
-	.4byte	.LVL93
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL93
-	.4byte	.LVL94
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL94
-	.4byte	.LVL96
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL96
-	.4byte	.LFE245
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST36:
-	.4byte	.LVL90
-	.4byte	.LVL96
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL96
-	.4byte	.LFE245
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST37:
-	.4byte	.LVL91
-	.4byte	.LVL92
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL94
-	.4byte	.LFE245
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST33:
-	.4byte	.LVL82
-	.4byte	.LVL83
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL83
-	.4byte	.LVL84
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL85
-	.4byte	.LVL86
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL88
-	.4byte	.LFE244
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST34:
-	.4byte	.LVL87
-	.4byte	.LVL89
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL89
-	.4byte	.LFE244
-	.2byte	0x7
-	.byte	0x70
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0x73
-	.sleb128 0
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST198:
-	.4byte	.LVL778
-	.4byte	.LVL779
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL779
-	.4byte	.LVL780-1
-	.2byte	0x5
-	.byte	0x3
-	.4byte	gSysFreeQueue
-	.4byte	.LVL780-1
-	.4byte	.LFE240
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST151:
-	.4byte	.LVL576
-	.4byte	.LVL577
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL577
-	.4byte	.LFE239
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST152:
-	.4byte	.LVL576
-	.4byte	.LVL578
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL578
-	.4byte	.LVL583-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL583-1
-	.4byte	.LFE239
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST153:
-	.4byte	.LVL582
-	.4byte	.LVL584
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL584
-	.4byte	.LVL585
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL586
-	.4byte	.LFE239
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST154:
-	.4byte	.LVL587
-	.4byte	.LVL589
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL589
-	.4byte	.LVL591
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL591
-	.4byte	.LVL592
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL592
-	.4byte	.LFE239
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST155:
-	.4byte	.LVL579
-	.4byte	.LVL580
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL580
-	.4byte	.LVL581
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST31:
-	.4byte	.LVL76
-	.4byte	.LVL77
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL77
-	.4byte	.LVL78
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL78
-	.4byte	.LVL79
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL79
-	.4byte	.LFE238
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST32:
-	.4byte	.LVL76
-	.4byte	.LVL78
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL78
-	.4byte	.LVL80
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL80
-	.4byte	.LFE238
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST29:
-	.4byte	.LVL72
-	.4byte	.LVL73-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL73-1
-	.4byte	.LFE237
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST30:
-	.4byte	.LVL74
-	.4byte	.LVL75-1
-	.2byte	0x11
-	.byte	0x70
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x3
-	.4byte	c_ftl_nand_planes_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST27:
-	.4byte	.LVL68
-	.4byte	.LVL70-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL70-1
-	.4byte	.LFE236
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST28:
-	.4byte	.LVL69
-	.4byte	.LVL70-1
-	.2byte	0x1a
-	.byte	0x76
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x3
-	.4byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0x75
-	.sleb128 0
-	.byte	0x1e
-	.byte	0x76
-	.sleb128 0
-	.byte	0x75
-	.sleb128 0
-	.byte	0x1d
-	.byte	0x22
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST24:
-	.4byte	.LVL63
-	.4byte	.LVL66-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL66-1
-	.4byte	.LFE235
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST25:
-	.4byte	.LVL63
-	.4byte	.LVL65
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL65
-	.4byte	.LFE235
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST26:
-	.4byte	.LVL64
-	.4byte	.LVL66-1
-	.2byte	0x20
-	.byte	0x77
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x76
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0x3
-	.4byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0x1e
-	.byte	0x76
-	.sleb128 0
-	.byte	0x75
-	.sleb128 0
-	.byte	0x1e
-	.byte	0x77
-	.sleb128 0
-	.byte	0x76
-	.sleb128 0
-	.byte	0x1d
-	.byte	0x22
-	.byte	0x22
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST347:
-	.4byte	.LVL1470
-	.4byte	.LVL1472
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1479
-	.4byte	.LVL1484
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1484
-	.4byte	.LVL1485
-	.2byte	0x3
-	.byte	0x76
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL1485
-	.4byte	.LVL1503
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST348:
-	.4byte	.LVL1471
-	.4byte	.LVL1473
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1473
-	.4byte	.LVL1477
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1478
-	.4byte	.LVL1479
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1489
-	.4byte	.LVL1499
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1500
-	.4byte	.LVL1501
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1501
-	.4byte	.LVL1502-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1502
-	.4byte	.LVL1503
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1503
-	.4byte	.LVL1504
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1509
-	.4byte	.LVL1510-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST349:
-	.4byte	.LVL1481
-	.4byte	.LVL1486
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1493
-	.4byte	.LVL1498
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST350:
-	.4byte	.LVL1480
-	.4byte	.LVL1501
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST149:
-	.4byte	.LVL568
-	.4byte	.LVL574
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL575
-	.4byte	.LFE233
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST150:
-	.4byte	.LVL569
-	.4byte	.LVL570
-	.2byte	0x13
-	.byte	0x73
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x76
-	.sleb128 0
-	.byte	0x1e
-	.byte	0x74
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x22
-	.byte	0x3a
-	.byte	0x24
-	.byte	0x9f
-	.4byte	.LVL570
-	.4byte	.LVL571
-	.2byte	0x13
-	.byte	0x72
-	.sleb128 15
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x76
-	.sleb128 0
-	.byte	0x1e
-	.byte	0x74
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x22
-	.byte	0x3a
-	.byte	0x24
-	.byte	0x9f
-	.4byte	.LVL571
-	.4byte	.LVL572-1
-	.2byte	0x18
-	.byte	0x3
-	.4byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x76
-	.sleb128 0
-	.byte	0x1e
-	.byte	0x74
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x22
-	.byte	0x3a
-	.byte	0x24
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST343:
-	.4byte	.LVL1456
-	.4byte	.LVL1457
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1464
-	.4byte	.LVL1465
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1465
-	.4byte	.LVL1466
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL1466
-	.4byte	.LVL1467
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST344:
-	.4byte	.LVL1445
-	.4byte	.LVL1448
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1457
-	.4byte	.LVL1458
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1459
-	.4byte	.LVL1460
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST345:
-	.4byte	.LVL1451
-	.4byte	.LVL1455
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1460
-	.4byte	.LVL1462
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1463
-	.4byte	.LVL1464
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST346:
-	.4byte	.LVL1443
-	.4byte	.LVL1454
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1457
-	.4byte	.LVL1464
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1467
-	.4byte	.LVL1468
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST22:
-	.4byte	.LVL54
-	.4byte	.LVL55
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL56
-	.4byte	.LVL57
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL57
-	.4byte	.LVL58
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL58
-	.4byte	.LVL59-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL59-1
-	.4byte	.LVL61
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL61
-	.4byte	.LVL62
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST23:
-	.4byte	.LVL54
-	.4byte	.LVL55
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL56
-	.4byte	.LVL60
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL61
-	.4byte	.LFE231
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST290:
-	.4byte	.LVL1172
-	.4byte	.LVL1174
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1184
-	.4byte	.LVL1185
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1185
-	.4byte	.LVL1186
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL1186
-	.4byte	.LVL1187
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST291:
-	.4byte	.LVL1171
-	.4byte	.LVL1176
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1176
-	.4byte	.LVL1184
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -36
-	.4byte	.LVL1184
-	.4byte	.LVL1187
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1187
-	.4byte	.LVL1188
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1188
-	.4byte	.LVL1189
-	.2byte	0x6
-	.byte	0x91
-	.sleb128 -36
-	.byte	0x6
-	.byte	0x23
-	.uleb128 0x1
-	.byte	0x9f
-	.4byte	.LVL1190
-	.4byte	.LVL1191
-	.2byte	0x6
-	.byte	0x91
-	.sleb128 -36
-	.byte	0x6
-	.byte	0x23
-	.uleb128 0x1
-	.byte	0x9f
-	.4byte	.LVL1191
-	.4byte	.LFE229
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST292:
-	.4byte	.LVL1173
-	.4byte	.LVL1184
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1187
-	.4byte	.LVL1191
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST293:
-	.4byte	.LVL1171
-	.4byte	.LVL1176
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1176
-	.4byte	.LVL1181
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1182
-	.4byte	.LVL1184
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1184
-	.4byte	.LVL1187
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1187
-	.4byte	.LVL1191
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST196:
-	.4byte	.LVL771
-	.4byte	.LVL773
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL773
-	.4byte	.LVL776
-	.2byte	0x4
-	.byte	0x75
-	.sleb128 -1022
-	.byte	0x9f
-	.4byte	.LVL776
-	.4byte	.LFE228
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST197:
-	.4byte	.LVL771
-	.4byte	.LVL772
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL772
-	.4byte	.LVL776
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL776
-	.4byte	.LFE228
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST17:
-	.4byte	.LVL47
-	.4byte	.LVL49-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL49-1
-	.4byte	.LFE226
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST18:
-	.4byte	.LVL48
-	.4byte	.LVL53
-	.2byte	0x10
-	.byte	0x76
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x75
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST19:
-	.4byte	.LVL50
-	.4byte	.LVL51-1
-	.2byte	0x32
-	.byte	0x74
-	.sleb128 0
-	.byte	0x35
-	.byte	0x25
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x32
-	.byte	0x24
-	.byte	0x76
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x75
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x23
-	.uleb128 0x6
-	.byte	0x32
-	.byte	0x24
-	.byte	0x3
-	.4byte	gBbtInfo+4
-	.byte	0x22
-	.byte	0x6
-	.byte	0x22
-	.byte	0x6
-	.byte	0x74
-	.sleb128 0
-	.byte	0x4f
-	.byte	0x1a
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x25
-	.byte	0x31
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST20:
-	.4byte	.LVL50
-	.4byte	.LVL51-1
-	.2byte	0x19
-	.byte	0x76
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x75
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x23
-	.uleb128 0x6
-	.byte	0x32
-	.byte	0x24
-	.byte	0x3
-	.4byte	gBbtInfo+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST21:
-	.4byte	.LVL50
-	.4byte	.LVL52
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST13:
-	.4byte	.LVL40
-	.4byte	.LVL41-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL41-1
-	.4byte	.LFE225
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST14:
-	.4byte	.LVL42
-	.4byte	.LVL46
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST15:
-	.4byte	.LVL44
-	.4byte	.LVL45-1
-	.2byte	0xa
-	.byte	0x76
-	.sleb128 6
-	.byte	0x32
-	.byte	0x24
-	.byte	0x3
-	.4byte	gBbtInfo+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST16:
-	.4byte	.LVL44
-	.4byte	.LVL45-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST444:
-	.4byte	.LVL1949
-	.4byte	.LVL1952
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1952
-	.4byte	.LVL1953-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1953-1
-	.4byte	.LFE223
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST445:
-	.4byte	.LVL1949
-	.4byte	.LVL1951
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1951
-	.4byte	.LVL1953-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1953-1
-	.4byte	.LFE223
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST446:
-	.4byte	.LVL1949
-	.4byte	.LVL1950
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1950
-	.4byte	.LVL1953-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1953-1
-	.4byte	.LFE223
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST426:
-	.4byte	.LVL1868
-	.4byte	.LVL1871
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1871
-	.4byte	.LVL1872-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1872-1
-	.4byte	.LFE222
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST427:
-	.4byte	.LVL1868
-	.4byte	.LVL1870
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1870
-	.4byte	.LVL1872-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1872-1
-	.4byte	.LFE222
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST428:
-	.4byte	.LVL1868
-	.4byte	.LVL1869
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1869
-	.4byte	.LVL1872-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1872-1
-	.4byte	.LFE222
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST372:
-	.4byte	.LVL1588
-	.4byte	.LVL1589
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1589
-	.4byte	.LVL1590
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1590
-	.4byte	.LVL1592-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1592-1
-	.4byte	.LVL1594
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1594
-	.4byte	.LVL1609
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1609
-	.4byte	.LVL1610
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1610
-	.4byte	.LFE221
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST373:
-	.4byte	.LVL1588
-	.4byte	.LVL1589
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1589
-	.4byte	.LVL1590
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1590
-	.4byte	.LVL1591
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1591
-	.4byte	.LVL1609
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1609
-	.4byte	.LFE221
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST374:
-	.4byte	.LVL1595
-	.4byte	.LVL1600
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST375:
-	.4byte	.LVL1596
-	.4byte	.LVL1597
-	.2byte	0x21
-	.byte	0x74
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x77
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1c
-	.byte	0x12
-	.byte	0x40
-	.byte	0x4b
-	.byte	0x24
-	.byte	0x22
-	.byte	0x75
-	.sleb128 0
-	.byte	0x16
-	.byte	0x14
-	.byte	0x40
-	.byte	0x4b
-	.byte	0x24
-	.byte	0x22
-	.byte	0x2d
-	.byte	0x28
-	.2byte	0x1
-	.byte	0x16
-	.byte	0x13
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST376:
-	.4byte	.LVL1593
-	.4byte	.LVL1598
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1598
-	.4byte	.LVL1609
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST377:
-	.4byte	.LVL1605
-	.4byte	.LVL1606-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST429:
-	.4byte	.LVL1873
-	.4byte	.LVL1877
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1877
-	.4byte	.LVL1879
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1879
-	.4byte	.LVL1882
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1882
-	.4byte	.LVL1947
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1947
-	.4byte	.LVL1948
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1948
-	.4byte	.LFE220
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST430:
-	.4byte	.LVL1873
-	.4byte	.LVL1876
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1876
-	.4byte	.LVL1878-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1878-1
-	.4byte	.LVL1879
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -100
-	.4byte	.LVL1879
-	.4byte	.LVL1883
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1883
-	.4byte	.LVL1947
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -100
-	.4byte	.LVL1947
-	.4byte	.LFE220
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST431:
-	.4byte	.LVL1873
-	.4byte	.LVL1874
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1874
-	.4byte	.LVL1879
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -84
-	.4byte	.LVL1879
-	.4byte	.LVL1881
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1881
-	.4byte	.LFE220
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -84
-	.4byte	0
-	.4byte	0
-.LLST432:
-	.4byte	.LVL1873
-	.4byte	.LVL1875
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1875
-	.4byte	.LVL1878-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1878-1
-	.4byte	.LVL1879
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -88
-	.4byte	.LVL1879
-	.4byte	.LVL1880
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1880
-	.4byte	.LFE220
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -88
-	.4byte	0
-	.4byte	0
-.LLST433:
-	.4byte	.LVL1918
-	.4byte	.LVL1940
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST434:
-	.4byte	.LVL1891
-	.4byte	.LVL1892
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -92
-	.4byte	.LVL1892
-	.4byte	.LVL1894
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1895
-	.4byte	.LVL1942
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST435:
-	.4byte	.LVL1885
-	.4byte	.LVL1886
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1886
-	.4byte	.LVL1947
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -92
-	.4byte	0
-	.4byte	0
-.LLST436:
-	.4byte	.LVL1888
-	.4byte	.LVL1892
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1892
-	.4byte	.LVL1947
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -76
-	.4byte	0
-	.4byte	0
-.LLST437:
-	.4byte	.LVL1916
-	.4byte	.LVL1917
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1917
-	.4byte	.LVL1919
-	.2byte	0x2
-	.byte	0x71
-	.sleb128 4
-	.4byte	.LVL1919
-	.4byte	.LVL1920-1
-	.2byte	0xb
-	.byte	0x3
-	.4byte	req_prgm
-	.byte	0x6
-	.byte	0x77
-	.sleb128 0
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x4
-	.4byte	0
-	.4byte	0
-.LLST438:
-	.4byte	.LVL1906
-	.4byte	.LVL1911
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1914
-	.4byte	.LVL1930
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1930
-	.4byte	.LVL1931
-	.2byte	0x3
-	.byte	0x7b
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL1931
-	.4byte	.LVL1940
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	0
-	.4byte	0
-.LLST439:
-	.4byte	.LVL1889
-	.4byte	.LVL1890
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1890
-	.4byte	.LVL1892
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1892
-	.4byte	.LVL1895
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -96
-	.4byte	.LVL1895
-	.4byte	.LVL1896
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1896
-	.4byte	.LVL1910
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -96
-	.4byte	.LVL1910
-	.4byte	.LVL1911
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1911
-	.4byte	.LVL1947
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -96
-	.4byte	0
-	.4byte	0
-.LLST440:
-	.4byte	.LVL1902
-	.4byte	.LVL1903
-	.2byte	0x1f
-	.byte	0x75
-	.sleb128 7
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x32
-	.byte	0x24
-	.byte	0x12
-	.byte	0x40
-	.byte	0x4b
-	.byte	0x24
-	.byte	0x22
-	.byte	0x91
-	.sleb128 -96
-	.byte	0x6
-	.byte	0x16
-	.byte	0x14
-	.byte	0x40
-	.byte	0x4b
-	.byte	0x24
-	.byte	0x22
-	.byte	0x2d
-	.byte	0x28
-	.2byte	0x1
-	.byte	0x16
-	.byte	0x13
-	.byte	0x9f
-	.4byte	.LVL1903
-	.4byte	.LVL1904
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1904
-	.4byte	.LVL1907
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -60
-	.4byte	.LVL1907
-	.4byte	.LVL1911
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1914
-	.4byte	.LVL1940
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -60
-	.4byte	0
-	.4byte	0
-.LLST441:
-	.4byte	.LVL1891
-	.4byte	.LVL1892
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1921
-	.4byte	.LVL1923
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1925
-	.4byte	.LVL1926
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1926
-	.4byte	.LVL1928
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -80
-	.4byte	.LVL1932
-	.4byte	.LVL1939
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -80
-	.4byte	0
-	.4byte	0
-.LLST442:
-	.4byte	.LVL1891
-	.4byte	.LVL1892
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1922
-	.4byte	.LVL1923
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1926
-	.4byte	.LVL1927
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1932
-	.4byte	.LVL1939
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST443:
-	.4byte	.LVL1891
-	.4byte	.LVL1892
-	.2byte	0x6
-	.byte	0x3
-	.4byte	g_active_superblock
-	.byte	0x9f
-	.4byte	.LVL1892
-	.4byte	.LVL1894
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1895
-	.4byte	.LVL1898
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1901
-	.4byte	.LVL1913
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1914
-	.4byte	.LVL1941
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST382:
-	.4byte	.LVL1638
-	.4byte	.LVL1641-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1641-1
-	.4byte	.LVL1641
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1641
-	.4byte	.LFE218
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST383:
-	.4byte	.LVL1638
-	.4byte	.LVL1641-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1641-1
-	.4byte	.LVL1659
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1659
-	.4byte	.LFE218
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST384:
-	.4byte	.LVL1638
-	.4byte	.LVL1639
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1639
-	.4byte	.LFE218
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST385:
-	.4byte	.LVL1638
-	.4byte	.LVL1640
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1640
-	.4byte	.LVL1659
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1659
-	.4byte	.LFE218
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST386:
-	.4byte	.LVL1641
-	.4byte	.LVL1659
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST387:
-	.4byte	.LVL1650
-	.4byte	.LVL1657
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	0
-	.4byte	0
-.LLST388:
-	.4byte	.LVL1642
-	.4byte	.LVL1643
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1652
-	.4byte	.LVL1653
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST389:
-	.4byte	.LVL1649
-	.4byte	.LVL1651-1
-	.2byte	0x2
-	.byte	0x75
-	.sleb128 12
-	.4byte	0
-	.4byte	0
-.LLST409:
-	.4byte	.LVL1817
-	.4byte	.LVL1820
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1820
-	.4byte	.LVL1823
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1823
-	.4byte	.LVL1826
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1826
-	.4byte	.LVL1866
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1866
-	.4byte	.LVL1867
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1867
-	.4byte	.LFE217
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST410:
-	.4byte	.LVL1817
-	.4byte	.LVL1819
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1819
-	.4byte	.LVL1823
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1823
-	.4byte	.LVL1827
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1827
-	.4byte	.LVL1866
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1866
-	.4byte	.LFE217
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST411:
-	.4byte	.LVL1817
-	.4byte	.LVL1818
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1818
-	.4byte	.LVL1823
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -56
-	.4byte	.LVL1823
-	.4byte	.LVL1825
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1825
-	.4byte	.LFE217
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -56
-	.4byte	0
-	.4byte	0
-.LLST412:
-	.4byte	.LVL1817
-	.4byte	.LVL1821-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1821-1
-	.4byte	.LVL1823
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1823
-	.4byte	.LVL1824
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1824
-	.4byte	.LFE217
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST413:
-	.4byte	.LVL1817
-	.4byte	.LVL1822
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1823
-	.4byte	.LVL1835
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1866
-	.4byte	.LFE217
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST414:
-	.4byte	.LVL1829
-	.4byte	.LVL1830
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1830
-	.4byte	.LVL1866
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -72
-	.4byte	0
-	.4byte	0
-.LLST415:
-	.4byte	.LVL1832
-	.4byte	.LVL1835
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1835
-	.4byte	.LVL1866
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -68
-	.4byte	0
-	.4byte	0
-.LLST416:
-	.4byte	.LVL1851
-	.4byte	.LVL1852
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1852
-	.4byte	.LVL1853-1
-	.2byte	0x12
-	.byte	0x3
-	.4byte	c_ftl_nand_sec_pre_page
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x74
-	.sleb128 0
-	.byte	0x1e
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST417:
-	.4byte	.LVL1833
-	.4byte	.LVL1835
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -72
-	.4byte	.LVL1835
-	.4byte	.LVL1866
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST418:
-	.4byte	.LVL1844
-	.4byte	.LVL1845
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1845
-	.4byte	.LVL1850
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1863
-	.4byte	.LVL1866
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST419:
-	.4byte	.LVL1833
-	.4byte	.LVL1835
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1835
-	.4byte	.LVL1849
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1850
-	.4byte	.LVL1866
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST420:
-	.4byte	.LVL1833
-	.4byte	.LVL1834
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1834
-	.4byte	.LVL1835
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1835
-	.4byte	.LVL1837
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -80
-	.4byte	.LVL1837
-	.4byte	.LVL1838-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1838-1
-	.4byte	.LVL1841
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -80
-	.4byte	.LVL1841
-	.4byte	.LVL1842
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL1842
-	.4byte	.LVL1843
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1843
-	.4byte	.LVL1866
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -80
-	.4byte	0
-	.4byte	0
-.LLST421:
-	.4byte	.LVL1817
-	.4byte	.LVL1822
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1823
-	.4byte	.LVL1835
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1835
-	.4byte	.LVL1857
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -64
-	.4byte	.LVL1857
-	.4byte	.LVL1860
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1860
-	.4byte	.LVL1866
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -64
-	.4byte	.LVL1866
-	.4byte	.LFE217
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST422:
-	.4byte	.LVL1823
-	.4byte	.LVL1835
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1835
-	.4byte	.LVL1857
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -60
-	.4byte	.LVL1857
-	.4byte	.LVL1858
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1858
-	.4byte	.LVL1859
-	.2byte	0x6
-	.byte	0x7b
-	.sleb128 0
-	.byte	0x71
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL1859
-	.4byte	.LVL1860
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1860
-	.4byte	.LVL1866
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -60
-	.4byte	.LVL1866
-	.4byte	.LFE217
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST423:
-	.4byte	.LVL1823
-	.4byte	.LVL1835
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1835
-	.4byte	.LVL1866
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1866
-	.4byte	.LFE217
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST424:
-	.4byte	.LVL1839
-	.4byte	.LVL1840
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1850
-	.4byte	.LVL1855
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST425:
-	.4byte	.LVL1864
-	.4byte	.LVL1865-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST453:
-	.4byte	.LVL2056
-	.4byte	.LVL2057
-	.2byte	0x7
-	.byte	0xa
-	.2byte	0x1fc1
-	.byte	0x74
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL2057
-	.4byte	.LVL2058
-	.2byte	0x7
-	.byte	0xa
-	.2byte	0x1fc2
-	.byte	0x74
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL2058
-	.4byte	.LVL2059
-	.2byte	0x7
-	.byte	0xa
-	.2byte	0x1fc1
-	.byte	0x74
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST449:
-	.4byte	.LVL2010
-	.4byte	.LVL2012
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2014
-	.4byte	.LVL2015
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2025
-	.4byte	.LVL2027
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2030
-	.4byte	.LVL2031
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2035
-	.4byte	.LVL2036
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2038
-	.4byte	.LVL2039
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2039
-	.4byte	.LVL2040-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2042
-	.4byte	.LVL2043
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST450:
-	.4byte	.LVL2014
-	.4byte	.LVL2018
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2039
-	.4byte	.LVL2041
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2042
-	.4byte	.LVL2043
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST451:
-	.4byte	.LVL2008
-	.4byte	.LVL2011
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2011
-	.4byte	.LVL2013
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2025
-	.4byte	.LVL2028
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2029
-	.4byte	.LVL2034
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2034
-	.4byte	.LVL2035
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST452:
-	.4byte	.LVL2006
-	.4byte	.LVL2007
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2007
-	.4byte	.LVL2009
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2023
-	.4byte	.LVL2024
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2024
-	.4byte	.LVL2025
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST175:
-	.4byte	.LVL632
-	.4byte	.LVL634
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL634
-	.4byte	.LFE212
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST176:
-	.4byte	.LVL632
-	.4byte	.LVL634
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL634
-	.4byte	.LFE212
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST177:
-	.4byte	.LVL632
-	.4byte	.LVL634
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL634
-	.4byte	.LVL661
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL662
-	.4byte	.LVL664
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL665
-	.4byte	.LVL679
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL680
-	.4byte	.LFE212
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST178:
-	.4byte	.LVL632
-	.4byte	.LVL634
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL634
-	.4byte	.LVL639
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL639
-	.4byte	.LVL640
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL640
-	.4byte	.LVL656
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL657
-	.4byte	.LVL674
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL675
-	.4byte	.LFE212
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST179:
-	.4byte	.LVL633
-	.4byte	.LVL634
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL634
-	.4byte	.LVL635
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL635
-	.4byte	.LVL639
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL639
-	.4byte	.LVL640
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL640
-	.4byte	.LVL641
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL641
-	.4byte	.LVL642
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL643
-	.4byte	.LVL644
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL644
-	.4byte	.LVL647
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL647
-	.4byte	.LVL649
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL649
-	.4byte	.LVL650
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL651
-	.4byte	.LVL658
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL658
-	.4byte	.LVL659
-	.2byte	0x3
-	.byte	0x7b
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL660
-	.4byte	.LVL663
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL663
-	.4byte	.LVL666
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL666
-	.4byte	.LVL667
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL668
-	.4byte	.LVL669
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL669
-	.4byte	.LVL676
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL676
-	.4byte	.LVL677
-	.2byte	0x3
-	.byte	0x7b
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL678
-	.4byte	.LVL682
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL682
-	.4byte	.LVL683
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL684
-	.4byte	.LVL685
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL685
-	.4byte	.LVL686
-	.2byte	0x3
-	.byte	0x76
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST180:
-	.4byte	.LVL653
-	.4byte	.LVL654-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL671
-	.4byte	.LVL672-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST181:
-	.4byte	.LVL632
-	.4byte	.LVL637
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL637
-	.4byte	.LVL638
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL651
-	.4byte	.LVL669
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST182:
-	.4byte	.LVL632
-	.4byte	.LVL639
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL639
-	.4byte	.LVL645
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL646
-	.4byte	.LVL648
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL651
-	.4byte	.LVL669
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL669
-	.4byte	.LVL684
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST183:
-	.4byte	.LVL632
-	.4byte	.LVL638
-	.2byte	0x2
-	.byte	0x36
-	.byte	0x9f
-	.4byte	.LVL651
-	.4byte	.LVL669
-	.2byte	0x2
-	.byte	0x36
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST184:
-	.4byte	.LVL632
-	.4byte	.LVL636
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL636
-	.4byte	.LVL638
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL651
-	.4byte	.LVL669
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST194:
-	.4byte	.LVL764
-	.4byte	.LVL765
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL765
-	.4byte	.LVL766
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL768
-	.4byte	.LVL770
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST195:
-	.4byte	.LVL709
-	.4byte	.LVL715
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL715
-	.4byte	.LVL722
-	.2byte	0x7
-	.byte	0x74
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL724
-	.4byte	.LVL730
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL731
-	.4byte	.LVL734
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL735
-	.4byte	.LVL736
-	.2byte	0x9
-	.byte	0x3
-	.4byte	c_ftl_nand_max_map_blks
-	.byte	0x6
-	.byte	0x31
-	.byte	0x24
-	.byte	0x9f
-	.4byte	.LVL736
-	.4byte	.LVL739
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL745
-	.4byte	.LVL746
-	.2byte	0xe
-	.byte	0x3
-	.4byte	c_ftl_nand_map_region_num
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x32
-	.byte	0x24
-	.byte	0x9f
-	.4byte	.LVL746
-	.4byte	.LVL747-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL748
-	.4byte	.LVL749
-	.2byte	0x9
-	.byte	0x3
-	.4byte	c_ftl_nand_max_map_blks
-	.byte	0x6
-	.byte	0x32
-	.byte	0x24
-	.byte	0x9f
-	.4byte	.LVL749
-	.4byte	.LVL750-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL751
-	.4byte	.LVL752
-	.2byte	0xe
-	.byte	0x3
-	.4byte	c_ftl_nand_l2pmap_ram_region_num
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x3c
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL752
-	.4byte	.LVL753-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL754
-	.4byte	.LVL755
-	.2byte	0x18
-	.byte	0x3
-	.4byte	c_ftl_nand_l2pmap_ram_region_num
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x3
-	.4byte	c_ftl_nand_byte_pre_page
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL755
-	.4byte	.LVL756-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL757
-	.4byte	.LVL758
-	.2byte	0xe
-	.byte	0x3
-	.4byte	c_ftl_nand_blk_pre_plane
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL758
-	.4byte	.LVL759-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL760
-	.4byte	.LVL761
-	.2byte	0x11
-	.byte	0x3
-	.4byte	c_ftl_nand_die_num
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x70
-	.sleb128 0
-	.byte	0x1e
-	.byte	0x32
-	.byte	0x24
-	.byte	0x9f
-	.4byte	.LVL761
-	.4byte	.LVL762
-	.2byte	0x1e
-	.byte	0x3
-	.4byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x23
-	.uleb128 0x1f
-	.byte	0x35
-	.byte	0x26
-	.byte	0x3
-	.4byte	c_ftl_nand_die_num
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x32
-	.byte	0x24
-	.byte	0x9f
-	.4byte	.LVL762
-	.4byte	.LVL763-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST10:
-	.4byte	.LVL25
-	.4byte	.LVL26
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL26
-	.4byte	.LVL32
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL32
-	.4byte	.LFE208
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST11:
-	.4byte	.LVL27
-	.4byte	.LVL29
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST9:
-	.4byte	.LVL22
-	.4byte	.LVL23
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL23
-	.4byte	.LVL24
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL24
-	.4byte	.LFE207
-	.2byte	0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_sys_blks_per_plane
-	.4byte	0
-	.4byte	0
-.LLST6:
-	.4byte	.LVL14
-	.4byte	.LVL18
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL18
-	.4byte	.LVL19
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL19
-	.4byte	.LFE205
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST7:
-	.4byte	.LVL14
-	.4byte	.LVL15
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL16
-	.4byte	.LVL17
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL17
-	.4byte	.LVL19
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL19
-	.4byte	.LVL20
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL20
-	.4byte	.LFE205
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST8:
-	.4byte	.LVL14
-	.4byte	.LVL15
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL16
-	.4byte	.LFE205
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST102:
-	.4byte	.LVL437
-	.4byte	.LVL439-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL439-1
-	.4byte	.LVL444
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL444
-	.4byte	.LFE204
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST103:
-	.4byte	.LVL438
-	.4byte	.LVL439-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL439-1
-	.4byte	.LVL440
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL440
-	.4byte	.LVL441
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL441
-	.4byte	.LVL442
-	.2byte	0x6
-	.byte	0x74
-	.sleb128 0
-	.byte	0x70
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.4byte	.LVL442
-	.4byte	.LVL443
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST97:
-	.4byte	.LVL288
-	.4byte	.LVL290-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL290-1
-	.4byte	.LFE203
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST98:
-	.4byte	.LVL426
-	.4byte	.LVL428
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL428
-	.4byte	.LVL430
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL430
-	.4byte	.LVL432
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL433
-	.4byte	.LVL434
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL434
-	.4byte	.LVL435-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL435-1
-	.4byte	.LVL436
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL436
-	.4byte	.LFE203
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST99:
-	.4byte	.LVL289
-	.4byte	.LVL290-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL290-1
-	.4byte	.LVL291
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL291
-	.4byte	.LVL403
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL403
-	.4byte	.LFE203
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST100:
-	.4byte	.LVL426
-	.4byte	.LVL427-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL430
-	.4byte	.LVL431
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST101:
-	.4byte	.LVL433
-	.4byte	.LVL435-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL436
-	.4byte	.LFE203
-	.2byte	0x9
-	.byte	0x3
-	.4byte	p_data_block_list_table
-	.byte	0x6
-	.byte	0x76
-	.sleb128 0
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST0:
-	.4byte	.LVL0
-	.4byte	.LVL5
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL5
-	.4byte	.LVL11
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL11
-	.4byte	.LFE352
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST1:
-	.4byte	.LVL0
-	.4byte	.LVL7-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL7-1
-	.4byte	.LVL11
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL11
-	.4byte	.LFE352
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST2:
-	.4byte	.LVL1
-	.4byte	.LVL9
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST3:
-	.4byte	.LVL2
-	.4byte	.LVL4
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL4
-	.4byte	.LVL6
-	.2byte	0x5
-	.byte	0x3
-	.4byte	g_nand_phy_info+10
-	.4byte	.LVL6
-	.4byte	.LVL11
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST4:
-	.4byte	.LVL8
-	.4byte	.LVL10
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL10
-	.4byte	.LVL11
-	.2byte	0x2
-	.byte	0x7a
-	.sleb128 0
-	.4byte	.LVL11
-	.4byte	.LFE352
-	.2byte	0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST5:
-	.4byte	.LVL12
-	.4byte	.LVL13
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL13
-	.4byte	.LFE358
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST12:
-	.4byte	.LVL36
-	.4byte	.LVL37
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL37
-	.4byte	.LVL38
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL38
-	.4byte	.LVL39
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL39
-	.4byte	.LFE211
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST47:
-	.4byte	.LVL131
-	.4byte	.LVL132-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL132-1
-	.4byte	.LFE248
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST53:
-	.4byte	.LVL150
-	.4byte	.LVL151-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL151-1
-	.4byte	.LFE247
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST65:
-	.4byte	.LVL190
-	.4byte	.LVL196
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL196
-	.4byte	.LVL208
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL208
-	.4byte	.LVL210
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL210
-	.4byte	.LFE255
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST66:
-	.4byte	.LVL191
-	.4byte	.LVL196
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL196
-	.4byte	.LVL207
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL208
-	.4byte	.LVL210
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL210
-	.4byte	.LFE255
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST67:
-	.4byte	.LVL198
-	.4byte	.LVL200
-	.2byte	0x5
-	.byte	0x72
-	.sleb128 0
-	.byte	0x36
-	.byte	0x1b
-	.byte	0x9f
-	.4byte	.LVL200
-	.4byte	.LVL205-1
-	.2byte	0xd
-	.byte	0x7a
-	.sleb128 2
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x36
-	.byte	0x1b
-	.byte	0x9f
-	.4byte	.LVL210
-	.4byte	.LFE255
-	.2byte	0xd
-	.byte	0x7a
-	.sleb128 2
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x36
-	.byte	0x1b
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST68:
-	.4byte	.LVL193
-	.4byte	.LVL195
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL195
-	.4byte	.LVL196
-	.2byte	0xb
-	.byte	0x70
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0x3
-	.4byte	p_valid_page_count_table
-	.byte	0x6
-	.byte	0x22
-	.4byte	.LVL196
-	.4byte	.LVL197-1
-	.2byte	0xb
-	.byte	0x74
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0x3
-	.4byte	p_valid_page_count_table
-	.byte	0x6
-	.byte	0x22
-	.4byte	.LVL208
-	.4byte	.LVL210
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST69:
-	.4byte	.LVL193
-	.4byte	.LVL194
-	.2byte	0xe
-	.byte	0x72
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x75
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL194
-	.4byte	.LVL203
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL208
-	.4byte	.LVL209
-	.2byte	0xe
-	.byte	0x72
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x75
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL209
-	.4byte	.LVL210
-	.2byte	0x10
-	.byte	0x72
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x7a
-	.sleb128 4
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL210
-	.4byte	.LFE255
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST70:
-	.4byte	.LVL199
-	.4byte	.LVL204
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL204
-	.4byte	.LVL205-1
-	.2byte	0x1c
-	.byte	0x7a
-	.sleb128 2
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x31
-	.byte	0x26
-	.byte	0x11
-	.sleb128 -1431655765
-	.byte	0x1e
-	.byte	0x31
-	.byte	0x24
-	.byte	0x3
-	.4byte	p_valid_page_count_table
-	.byte	0x6
-	.byte	0x22
-	.4byte	.LVL210
-	.4byte	.LFE255
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST71:
-	.4byte	.LVL201
-	.4byte	.LVL202
-	.2byte	0xe
-	.byte	0x70
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x73
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL202
-	.4byte	.LVL205-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL210
-	.4byte	.LVL211
-	.2byte	0xe
-	.byte	0x70
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x73
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL211
-	.4byte	.LFE255
-	.2byte	0x10
-	.byte	0x70
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x72
-	.sleb128 4
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST72:
-	.4byte	.LVL192
-	.4byte	.LVL207
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL208
-	.4byte	.LFE255
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST73:
-	.4byte	.LVL198
-	.4byte	.LVL200
-	.2byte	0xa
-	.byte	0x3
-	.4byte	p_data_block_list_table
-	.byte	0x6
-	.byte	0x72
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.4byte	.LVL200
-	.4byte	.LVL205-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL210
-	.4byte	.LFE255
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST77:
-	.4byte	.LVL232
-	.4byte	.LVL233
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL233
-	.4byte	.LFE269
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST78:
-	.4byte	.LVL235
-	.4byte	.LVL236-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL236-1
-	.4byte	.LVL236
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL236
-	.4byte	.LVL237
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL237
-	.4byte	.LFE275
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST79:
-	.4byte	.LVL235
-	.4byte	.LVL236-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL236-1
-	.4byte	.LVL236
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	.LVL236
-	.4byte	.LVL238
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL238
-	.4byte	.LFE275
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST84:
-	.4byte	.LVL252
-	.4byte	.LVL254
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL255
-	.4byte	.LFE285
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST85:
-	.4byte	.LVL253
-	.4byte	.LVL254
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL255
-	.4byte	.LFE285
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST112:
-	.4byte	.LVL475
-	.4byte	.LVL477-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL477-1
-	.4byte	.LFE300
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST113:
-	.4byte	.LVL476
-	.4byte	.LVL477-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL477-1
-	.4byte	.LVL477
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST169:
-	.4byte	.LVL625
-	.4byte	.LVL627-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL627-1
-	.4byte	.LFE243
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST170:
-	.4byte	.LVL625
-	.4byte	.LVL627-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL627-1
-	.4byte	.LFE243
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST171:
-	.4byte	.LVL626
-	.4byte	.LVL627-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL627-1
-	.4byte	.LVL631
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST172:
-	.4byte	.LVL626
-	.4byte	.LVL627-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL627-1
-	.4byte	.LVL631
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST173:
-	.4byte	.LVL626
-	.4byte	.LVL631
-	.2byte	0x6
-	.byte	0x3
-	.4byte	gSysFreeQueue
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST174:
-	.4byte	.LVL628
-	.4byte	.LVL630
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST187:
-	.4byte	.LVL697
-	.4byte	.LVL700-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL700-1
-	.4byte	.LVL704
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL704
-	.4byte	.LFE258
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST188:
-	.4byte	.LVL697
-	.4byte	.LVL698
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL699
-	.4byte	.LVL704
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST189:
-	.4byte	.LVL697
-	.4byte	.LVL700-1
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 12
-	.4byte	0
-	.4byte	0
-.LLST190:
-	.4byte	.LVL702
-	.4byte	.LVL703
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST240:
-	.4byte	.LVL926
-	.4byte	.LVL930
-	.2byte	0x7
-	.byte	0xa
-	.2byte	0x800
-	.byte	0x75
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL931
-	.4byte	.LVL932
-	.2byte	0x7
-	.byte	0xa
-	.2byte	0x801
-	.byte	0x75
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL932
-	.4byte	.LVL933
-	.2byte	0x7
-	.byte	0xa
-	.2byte	0x800
-	.byte	0x75
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST282:
-	.4byte	.LVL1149
-	.4byte	.LVL1151
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1151
-	.4byte	.LVL1159
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1159
-	.4byte	.LFE347
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST283:
-	.4byte	.LVL1150
-	.4byte	.LVL1152
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST303:
-	.4byte	.LVL1234
-	.4byte	.LVL1235
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1235
-	.4byte	.LFE320
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST304:
-	.4byte	.LVL1235
-	.4byte	.LVL1236
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1237
-	.4byte	.LVL1241
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1241
-	.4byte	.LVL1242
-	.2byte	0x3
-	.byte	0x76
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1243
-	.4byte	.LFE320
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST305:
-	.4byte	.LVL1240
-	.4byte	.LVL1247
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1247
-	.4byte	.LVL1248
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1248
-	.4byte	.LVL1249
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1250
-	.4byte	.LFE320
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST306:
-	.4byte	.LVL1246
-	.4byte	.LVL1248
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1250
-	.4byte	.LVL1251
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1252
-	.4byte	.LFE320
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST307:
-	.4byte	.LVL1253
-	.4byte	.LVL1255
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1255
-	.4byte	.LVL1261
-	.2byte	0x4
-	.byte	0xf3
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-	.ascii	"pDataHeader\000"
-.LASF541:
-	.ascii	"power_up_flag\000"
-.LASF365:
-	.ascii	"inkDie_write_and_check_en\000"
-.LASF413:
-	.ascii	"c_ftl_nand_l2pmap_ram_region_num\000"
-.LASF842:
-	.ascii	"sftl_deinit\000"
-.LASF814:
-	.ascii	"totle_count\000"
-.LASF282:
-	.ascii	"die_num\000"
-.LASF750:
-	.ascii	"update_map_block\000"
-.LASF880:
-	.ascii	"GNU C11 6.3.1 20170404 -mthumb -mthumb-interwork -m"
-	.ascii	"abi=aapcs-linux -mword-relocations -mno-unaligned-a"
-	.ascii	"ccess -mfloat-abi=soft -march=armv7-a -mtune=cortex"
-	.ascii	"-a9 -mfpu=vfpv3-d16 -mtls-dialect=gnu -g -Os -fno-b"
-	.ascii	"uiltin -ffreestanding -fshort-wchar -fno-stack-prot"
-	.ascii	"ector -fno-delete-null-pointer-checks -fstack-usage"
-	.ascii	" -fno-pic -ffunction-sections -fdata-sections -fno-"
-	.ascii	"common -ffixed-r9\000"
-.LASF307:
-	.ascii	"maxRegion\000"
-.LASF680:
-	.ascii	"next_free_active_plane\000"
-.LASF490:
-	.ascii	"p_gc_page_info\000"
-.LASF256:
-	.ascii	"net_our_vlan\000"
-.LASF361:
-	.ascii	"totle_power_on_run_times\000"
-.LASF93:
-	.ascii	"ih_os\000"
-.LASF525:
-	.ascii	"g_cur_erase_blk\000"
-.LASF184:
-	.ascii	"UCLASS_PWM\000"
-.LASF634:
-	.ascii	"FtlGcBufFree\000"
-.LASF774:
-	.ascii	"List_pop_index_node\000"
-.LASF690:
-	.ascii	"scan_completed\000"
-.LASF637:
-	.ascii	"update_vpc_list\000"
-.LASF170:
-	.ascii	"UCLASS_MMC\000"
-.LASF464:
-	.ascii	"p_map_block_table\000"
-.LASF543:
-	.ascii	"FtlUpdateVaildLpnCount\000"
-.LASF332:
-	.ascii	"res32_0\000"
-.LASF333:
-	.ascii	"res32_1\000"
-.LASF726:
-	.ascii	"FtlUpdateVaildLpn\000"
-.LASF390:
-	.ascii	"scr_ppa\000"
-.LASF162:
-	.ascii	"UCLASS_IDE\000"
-.LASF224:
-	.ascii	"save_size\000"
-.LASF78:
-	.ascii	"version\000"
-.LASF652:
-	.ascii	"pNode\000"
-.LASF638:
-	.ascii	"get_new_active_ppa\000"
-.LASF877:
-	.ascii	"kmalloc\000"
-.LASF25:
-	.ascii	"_binary_u_boot_bin_end\000"
-.LASF597:
-	.ascii	"max_gc_page_num\000"
-.LASF8:
-	.ascii	"unsigned int\000"
-.LASF712:
-	.ascii	"FtlSlcSuperblockCheck\000"
-.LASF514:
-	.ascii	"g_totle_avg_erase_count\000"
-.LASF835:
-	.ascii	"flashType\000"
-.LASF791:
-	.ascii	"FtlFreeSysBLkSort\000"
-.LASF779:
-	.ascii	"tmp_erase_count\000"
-.LASF83:
-	.ascii	"working_fdt\000"
-.LASF861:
-	.ascii	"FtlVariablesInit\000"
-.LASF392:
-	.ascii	"ftl_gc_page_buffer\000"
-.LASF239:
-	.ascii	"push_packet\000"
-.LASF708:
-	.ascii	"pMapBlkHeader\000"
-.LASF82:
-	.ascii	"size_dt_struct\000"
-.LASF472:
-	.ascii	"p_vendor_region_ppn_table\000"
-.LASF675:
-	.ascii	"make_superblock\000"
-.LASF97:
-	.ascii	"ih_name\000"
-.LASF186:
-	.ascii	"UCLASS_PWRSEQ\000"
-.LASF337:
-	.ascii	"bufferFlashMode\000"
-.LASF6:
-	.ascii	"short int\000"
-.LASF836:
-	.ascii	"FtlRead\000"
-.LASF74:
-	.ascii	"totalsize\000"
-.LASF757:
-	.ascii	"ftl_map_blk_alloc_new_blk\000"
-.LASF385:
-	.ascii	"check_en\000"
-.LASF442:
-	.ascii	"req_gc_dst\000"
-.LASF374:
-	.ascii	"prev\000"
-.LASF423:
-	.ascii	"c_ftl_nand_data_op_blks_per_plane\000"
-.LASF650:
-	.ascii	"min_ec_id\000"
-.LASF388:
-	.ascii	"phyBlk\000"
-.LASF260:
-	.ascii	"net_boot_file_size\000"
-.LASF412:
-	.ascii	"c_ftl_nand_map_region_num\000"
-.LASF665:
-	.ascii	"FtlVpcCheckAndModify\000"
-.LASF127:
-	.ascii	"ft_len\000"
-.LASF188:
-	.ascii	"UCLASS_REGULATOR\000"
-.LASF311:
-	.ascii	"pBlkVerTbl\000"
-.LASF488:
-	.ascii	"g_sys_save_data\000"
-.LASF124:
-	.ascii	"rd_start\000"
 	.hidden	free
diff --git a/drivers/rkflash/rk_sftl_arm_v8.S b/drivers/rkflash/rk_sftl_arm_v8.S
index 6f23e5bfaa..087e6f9c3a 100644
--- a/drivers/rkflash/rk_sftl_arm_v8.S
+++ b/drivers/rkflash/rk_sftl_arm_v8.S
@@ -2,83 +2,41 @@
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:	GPL-2.0
- * date: 2018-07-13
+ * date: 2018-07-21
  */
 	.arch armv8-a+nosimd
 	.file	"rk_sftl.c"
-	.text
-.Ltext0:
-	.cfi_sections	.debug_frame
 	.section	.text.l2p_addr_tran.isra.0,"ax",@progbits
 	.align	2
 	.type	l2p_addr_tran.isra.0, %function
 l2p_addr_tran.isra.0:
-.LFB349:
-	.file 1 "drivers/rkflash/rksftl/sftl_flash.c"
-	.loc 1 58 0
-	.cfi_startproc
-.LVL0:
-	.loc 1 66 0
 	adrp	x4, .LANCHOR0
 	add	x4, x4, :lo12:.LANCHOR0
 	ldrh	w3, [x4, 8]
-.LVL1:
-	.loc 1 67 0
 	ldrh	w6, [x4, 10]
-.LVL2:
-	.loc 1 68 0
 	ldrh	w4, [x4, 14]
 	cmp	w4, 4
 	bne	.L2
-	.loc 1 69 0
 	lsr	w3, w3, 1
-.LVL3:
-	.loc 1 70 0
 	ubfiz	w6, w6, 1, 15
-.LVL4:
 .L2:
-	.loc 1 74 0
 	lsr	w5, w0, 10
-.LVL5:
-	.loc 1 78 0
 	and	w0, w0, 1023
-.LVL6:
-	.loc 1 75 0
 	and	w4, w5, 65535
-	.loc 1 76 0
 	and	w5, w5, 65535
-.LVL7:
-	.loc 1 75 0
 	udiv	w4, w4, w3
-.LVL8:
-	.loc 1 76 0
 	msub	w3, w3, w4, w5
-.LVL9:
-	.loc 1 78 0
 	madd	w3, w3, w6, w0
-	.loc 1 82 0
 	mov	w0, 0
-	.loc 1 78 0
 	str	w3, [x1]
-	.loc 1 79 0
 	str	w4, [x2]
-	.loc 1 82 0
 	ret
-	.cfi_endproc
-.LFE349:
 	.size	l2p_addr_tran.isra.0, .-l2p_addr_tran.isra.0
 	.section	.text.ftl_set_blk_mode.part.6,"ax",@progbits
 	.align	2
 	.type	ftl_set_blk_mode.part.6, %function
 ftl_set_blk_mode.part.6:
-.LFB355:
-	.file 2 "drivers/rkflash/rksftl/sftl_sys.c"
-	.loc 2 1395 0
-	.cfi_startproc
-.LVL10:
-	.loc 2 1395 0
 	and	w0, w0, 65535
-	.loc 2 1398 0
 	adrp	x2, .LANCHOR1
 	ubfx	x1, x0, 5, 11
 	ldr	x3, [x2, #:lo12:.LANCHOR1]
@@ -86,335 +44,198 @@ ftl_set_blk_mode.part.6:
 	mov	w2, 1
 	lsl	w2, w2, w0
 	ldr	w0, [x3, x1]
-.LVL11:
 	orr	w0, w0, w2
 	str	w0, [x3, x1]
 	ret
-	.cfi_endproc
-.LFE355:
 	.size	ftl_set_blk_mode.part.6, .-ftl_set_blk_mode.part.6
 	.section	.text.Ftl_log2,"ax",@progbits
 	.align	2
 	.global	Ftl_log2
 	.type	Ftl_log2, %function
 Ftl_log2:
-.LFB202:
-	.file 3 "drivers/rkflash/rksftl/sftl_plat.c"
-	.loc 3 128 0
-	.cfi_startproc
-.LVL12:
-	.loc 3 130 0
 	mov	w2, 1
-	.loc 3 132 0
 	mov	w1, 0
-.LVL13:
 .L5:
-	.loc 3 132 0 is_stmt 0 discriminator 1
 	cmp	w2, w0
 	bls	.L6
-.LVL14:
-	.loc 3 134 0 is_stmt 1
 	sub	w0, w1, #1
-.LVL15:
-	.loc 3 136 0
 	ret
-.LVL16:
 .L6:
-	.loc 3 132 0 discriminator 3
 	add	w1, w1, 1
-.LVL17:
-	.loc 3 133 0 discriminator 3
 	lsl	w2, w2, 1
-.LVL18:
-	.loc 3 132 0 discriminator 3
 	and	w1, w1, 65535
-.LVL19:
 	b	.L5
-	.cfi_endproc
-.LFE202:
 	.size	Ftl_log2, .-Ftl_log2
 	.section	.text.FtlPrintInfo,"ax",@progbits
 	.align	2
 	.global	FtlPrintInfo
 	.type	FtlPrintInfo, %function
 FtlPrintInfo:
-.LFB203:
-	.loc 3 160 0
-	.cfi_startproc
-.LVL20:
 	ret
-	.cfi_endproc
-.LFE203:
 	.size	FtlPrintInfo, .-FtlPrintInfo
 	.section	.text.FtlSysBlkNumInit,"ax",@progbits
 	.align	2
 	.global	FtlSysBlkNumInit
 	.type	FtlSysBlkNumInit, %function
 FtlSysBlkNumInit:
-.LFB204:
-	.loc 3 166 0
-	.cfi_startproc
-.LVL21:
-	.loc 3 166 0
 	and	w0, w0, 65535
 	mov	w1, 24
 	cmp	w0, 24
-	.loc 3 170 0
 	adrp	x2, .LANCHOR4
 	csel	w0, w0, w1, cs
-.LVL22:
-	.loc 3 169 0
 	adrp	x1, .LANCHOR2
 	and	w0, w0, 65535
-.LVL23:
 	str	w0, [x1, #:lo12:.LANCHOR2]
-	.loc 3 170 0
 	adrp	x1, .LANCHOR3
 	ldrh	w1, [x1, #:lo12:.LANCHOR3]
 	mul	w1, w1, w0
 	str	w1, [x2, #:lo12:.LANCHOR4]
-	.loc 3 171 0
 	adrp	x2, .LANCHOR6
 	ldrh	w2, [x2, #:lo12:.LANCHOR6]
 	sub	w0, w2, w0
-.LVL24:
 	adrp	x2, .LANCHOR5
 	strh	w0, [x2, #:lo12:.LANCHOR5]
-	.loc 3 172 0
 	adrp	x0, .LANCHOR8
 	ldr	w0, [x0, #:lo12:.LANCHOR8]
 	sub	w1, w0, w1
 	adrp	x0, .LANCHOR7
 	str	w1, [x0, #:lo12:.LANCHOR7]
-	.loc 3 175 0
 	mov	w0, 0
 	ret
-	.cfi_endproc
-.LFE204:
 	.size	FtlSysBlkNumInit, .-FtlSysBlkNumInit
 	.section	.text.FtlConstantsInit,"ax",@progbits
 	.align	2
 	.global	FtlConstantsInit
 	.type	FtlConstantsInit, %function
 FtlConstantsInit:
-.LFB205:
-	.loc 3 184 0
-	.cfi_startproc
-.LVL25:
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
 	mov	x5, x0
-	.loc 3 191 0
 	adrp	x1, .LANCHOR11
-	.loc 3 184 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 3 189 0
 	ldrh	w2, [x0]
 	adrp	x0, .LANCHOR9
-.LVL26:
-	.loc 3 190 0
 	ldrh	w4, [x5, 2]
-	.loc 3 189 0
 	strh	w2, [x0, #:lo12:.LANCHOR9]
-	.loc 3 190 0
 	adrp	x0, .LANCHOR10
 	strh	w4, [x0, #:lo12:.LANCHOR10]
-	.loc 3 191 0
 	ldrh	w0, [x5, 4]
 	strh	w0, [x1, #:lo12:.LANCHOR11]
-	.loc 3 192 0
 	ldrh	w1, [x5, 14]
 	cmp	w1, 4
 	bne	.L10
-	.loc 3 193 0
 	ldrh	w1, [x5, 6]
 	adrp	x3, .LANCHOR6
 	lsr	w1, w1, 1
 	strh	w1, [x3, #:lo12:.LANCHOR6]
-	.loc 3 194 0
 	adrp	x1, .LANCHOR12
 	mov	w3, 8
 	strh	w3, [x1, #:lo12:.LANCHOR12]
 .L10:
-	.loc 3 198 0 discriminator 3
 	adrp	x3, .LANCHOR13
 	add	x3, x3, :lo12:.LANCHOR13
-	.loc 3 184 0 discriminator 3
 	mov	x1, 0
 .L11:
-.LVL27:
-	.loc 3 198 0 discriminator 3
 	strb	w1, [x1, x3]
-.LVL28:
 	add	x1, x1, 1
-.LVL29:
-	.loc 3 197 0 discriminator 3
 	cmp	x1, 32
 	bne	.L11
-	.loc 3 199 0
 	adrp	x1, .LANCHOR14
 	mov	w3, 5
-	.loc 3 201 0
 	cmp	w2, 1
-	.loc 3 199 0
 	strh	w3, [x1, #:lo12:.LANCHOR14]
-	.loc 3 200 0
 	adrp	x3, .LANCHOR15
 	strh	wzr, [x3, #:lo12:.LANCHOR15]
-	.loc 3 201 0
 	bne	.L12
-	.loc 3 202 0
 	strh	w2, [x1, #:lo12:.LANCHOR14]
 .L12:
-	.loc 3 203 0
 	adrp	x1, .LANCHOR16
 	mov	w2, 640
-	.loc 3 205 0
 	mul	w4, w4, w0
-	.loc 3 203 0
 	strh	w2, [x1, #:lo12:.LANCHOR16]
-	.loc 3 205 0
 	adrp	x1, .LANCHOR3
 	and	w4, w4, 65535
 	strh	w4, [x1, #:lo12:.LANCHOR3]
-	.loc 3 206 0
 	adrp	x1, .LANCHOR6
 	ldrh	w3, [x1, #:lo12:.LANCHOR6]
 	adrp	x1, .LANCHOR17
 	mul	w0, w0, w3
 	and	w0, w0, 65535
 	strh	w0, [x1, #:lo12:.LANCHOR17]
-	.loc 3 207 0
 	bl	Ftl_log2
-.LVL30:
-	.loc 3 208 0
 	ldrh	w7, [x5, 12]
-	.loc 3 207 0
 	adrp	x1, .LANCHOR18
-	.loc 3 208 0
 	adrp	x8, .LANCHOR19
-	.loc 3 207 0
 	strh	w0, [x1, #:lo12:.LANCHOR18]
-	.loc 3 209 0
 	adrp	x0, .LANCHOR20
-	.loc 3 210 0
 	mul	w1, w4, w7
-	.loc 3 208 0
 	strh	w7, [x8, #:lo12:.LANCHOR19]
-	.loc 3 209 0
 	strh	w7, [x0, #:lo12:.LANCHOR20]
-	.loc 3 210 0
 	adrp	x0, .LANCHOR21
 	strh	w1, [x0, #:lo12:.LANCHOR21]
-	.loc 3 211 0
 	adrp	x0, .LANCHOR12
 	ldrh	w6, [x0, #:lo12:.LANCHOR12]
 	mov	w0, w6
 	bl	Ftl_log2
-.LVL31:
 	and	w1, w0, 65535
 	adrp	x2, .LANCHOR22
-	.loc 3 213 0
 	adrp	x10, .LANCHOR23
-	.loc 3 215 0
 	ldrh	w5, [x5, 20]
-.LVL32:
-	.loc 3 211 0
 	strh	w0, [x2, #:lo12:.LANCHOR22]
-	.loc 3 213 0
 	ubfiz	w0, w6, 9, 7
 	strh	w0, [x10, #:lo12:.LANCHOR23]
-	.loc 3 214 0
 	adrp	x10, .LANCHOR24
 	ubfx	w0, w0, 8, 8
 	strh	w0, [x10, #:lo12:.LANCHOR24]
-	.loc 3 215 0
 	adrp	x0, .LANCHOR25
 	strh	w5, [x0, #:lo12:.LANCHOR25]
-	.loc 3 217 0
 	mul	w0, w4, w3
 	adrp	x5, .LANCHOR8
 	str	w0, [x5, #:lo12:.LANCHOR8]
-	.loc 3 218 0
 	adrp	x5, .LANCHOR26
 	mul	w0, w0, w6
-	.loc 3 219 0
 	mul	w6, w6, w7
-	.loc 3 218 0
 	mul	w0, w0, w7
 	mov	x7, x2
 	asr	w0, w0, 11
 	str	w0, [x5, #:lo12:.LANCHOR26]
-	.loc 3 219 0
 	mov	w0, 5120
 	adrp	x5, .LANCHOR27
 	sdiv	w0, w0, w6
 	and	w0, w0, 65535
-	.loc 3 220 0
 	cmp	w0, 4
 	bls	.L13
 .L19:
-	.loc 3 221 0
 	strh	w0, [x5, #:lo12:.LANCHOR27]
-	.loc 3 222 0
 	adrp	x2, .LANCHOR28
 	mov	w0, 640
-	.loc 3 224 0
 	lsl	w3, w3, 6
-	.loc 3 222 0
 	asr	w0, w0, w1
 	add	w0, w0, 2
-	.loc 3 224 0
 	add	w1, w1, 9
-	.loc 3 222 0
 	strh	w0, [x2, #:lo12:.LANCHOR28]
-	.loc 3 224 0
 	adrp	x0, .LANCHOR29
-	.loc 3 228 0
 	cmp	w4, 1
-	.loc 3 224 0
 	asr	w3, w3, w1
-	.loc 3 225 0
 	adrp	x1, .LANCHOR30
-	.loc 3 224 0
 	strh	w3, [x0, #:lo12:.LANCHOR29]
 	and	w3, w3, 65535
 	adrp	x6, .LANCHOR2
-	.loc 3 225 0
 	mul	w0, w3, w4
-	.loc 3 227 0
 	add	w3, w3, 8
-	.loc 3 225 0
 	str	w0, [x1, #:lo12:.LANCHOR30]
-	.loc 3 227 0
 	ldrh	w0, [x5, #:lo12:.LANCHOR27]
 	udiv	w0, w0, w4
 	mov	x4, x1
 	add	w3, w0, w3
-	.loc 3 228 0
 	beq	.L15
 .L20:
-	.loc 3 229 0
 	str	w3, [x6, #:lo12:.LANCHOR2]
-	.loc 3 232 0
 	ldrh	w0, [x6, #:lo12:.LANCHOR2]
 	bl	FtlSysBlkNumInit
-.LVL33:
-	.loc 3 233 0
 	ldr	w1, [x6, #:lo12:.LANCHOR2]
 	adrp	x0, .LANCHOR31
-	.loc 3 264 0
 	ldp	x29, x30, [sp], 16
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
-	.loc 3 233 0
 	str	w1, [x0, #:lo12:.LANCHOR31]
-	.loc 3 235 0
 	adrp	x0, .LANCHOR7
 	ldrh	w1, [x8, #:lo12:.LANCHOR19]
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
@@ -426,164 +247,91 @@ FtlConstantsInit:
 	adrp	x1, .LANCHOR32
 	add	w0, w0, 2
 	strh	w0, [x1, #:lo12:.LANCHOR32]
-	.loc 3 236 0
 	adrp	x0, .LANCHOR33
 	mov	w1, 32
 	strh	w1, [x0, #:lo12:.LANCHOR33]
-	.loc 3 237 0
 	adrp	x0, .LANCHOR34
 	str	wzr, [x0, #:lo12:.LANCHOR34]
-	.loc 3 238 0
 	ldrh	w0, [x5, #:lo12:.LANCHOR27]
 	add	w0, w0, 3
 	strh	w0, [x5, #:lo12:.LANCHOR27]
-	.loc 3 239 0
 	ldr	w0, [x4, #:lo12:.LANCHOR30]
 	add	w0, w0, 3
 	str	w0, [x4, #:lo12:.LANCHOR30]
-	.loc 3 264 0
 	mov	w0, 0
 	ret
 .L13:
-	.cfi_restore_state
-	.loc 3 221 0
 	mov	w0, 4
 	b	.L19
 .L15:
-	.loc 3 229 0
 	add	w3, w3, 4
 	b	.L20
-	.cfi_endproc
-.LFE205:
 	.size	FtlConstantsInit, .-FtlConstantsInit
 	.section	.text.IsBlkInVendorPart,"ax",@progbits
 	.align	2
 	.global	IsBlkInVendorPart
 	.type	IsBlkInVendorPart, %function
 IsBlkInVendorPart:
-.LFB208:
-	.loc 3 514 0
-	.cfi_startproc
-.LVL34:
-	.loc 3 517 0
 	adrp	x1, .LANCHOR35
-	.loc 3 514 0
 	and	w0, w0, 65535
-	.loc 3 517 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR35]
 	cbz	w1, .L25
-.LBB185:
-.LBB186:
-	.loc 3 518 0
 	adrp	x1, .LANCHOR27
 	ldrh	w2, [x1, #:lo12:.LANCHOR27]
-	.loc 3 519 0
 	adrp	x1, .LANCHOR36
 	ldr	x3, [x1, #:lo12:.LANCHOR36]
 	mov	x1, 0
 .L23:
-.LVL35:
-	.loc 3 518 0
 	cmp	w2, w1, uxth
 	bhi	.L24
-.LVL36:
 .L25:
-.LBE186:
-.LBE185:
-	.loc 3 524 0
 	mov	w0, 0
-.LVL37:
 	ret
-.LVL38:
 .L24:
 	add	x1, x1, 1
-.LVL39:
-.LBB188:
-.LBB187:
-	.loc 3 519 0
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w0
 	bne	.L23
-	.loc 3 520 0
 	mov	w0, 1
-.LBE187:
-.LBE188:
-	.loc 3 525 0
 	ret
-	.cfi_endproc
-.LFE208:
 	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
 	.section	.text.FtlCacheWriteBack,"ax",@progbits
 	.align	2
 	.global	FtlCacheWriteBack
 	.type	FtlCacheWriteBack, %function
 FtlCacheWriteBack:
-.LFB216:
-	.loc 3 952 0
-	.cfi_startproc
-	.loc 3 954 0
 	mov	w0, 0
 	ret
-	.cfi_endproc
-.LFE216:
 	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
 	.section	.text.sftl_get_density,"ax",@progbits
 	.align	2
 	.global	sftl_get_density
 	.type	sftl_get_density, %function
 sftl_get_density:
-.LFB221:
-	.loc 3 1178 0
-	.cfi_startproc
-	.loc 3 1180 0
 	adrp	x0, .LANCHOR34
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	ret
-	.cfi_endproc
-.LFE221:
 	.size	sftl_get_density, .-sftl_get_density
 	.section	.text.FtlBbmMapBadBlock,"ax",@progbits
 	.align	2
 	.global	FtlBbmMapBadBlock
 	.type	FtlBbmMapBadBlock, %function
 FtlBbmMapBadBlock:
-.LFB222:
-	.file 4 "drivers/rkflash/rksftl/sftl_bbm.c"
-	.loc 4 5 0
-	.cfi_startproc
-.LVL40:
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
 	and	w1, w0, 65535
-	.loc 4 10 0
 	adrp	x0, .LANCHOR17
-.LVL41:
-	.loc 4 15 0
 	mov	w4, 1
-	.loc 4 5 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 4 10 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR17]
-	.loc 4 5 0
 	str	x19, [sp, 16]
-	.cfi_offset 19, -16
-	.loc 4 13 0
 	adrp	x19, .LANCHOR37
 	add	x19, x19, :lo12:.LANCHOR37
-	.loc 4 10 0
 	udiv	w3, w1, w0
 	and	w2, w3, 65535
-.LVL42:
 	msub	w3, w3, w0, w1
-	.loc 4 13 0
 	add	x0, x19, x2, uxth 3
 	and	w3, w3, 65535
-.LVL43:
-	.loc 4 15 0
 	ldr	x0, [x0, 32]
 	ubfx	x5, x3, 5, 11
 	lsl	x5, x5, 2
@@ -591,314 +339,177 @@ FtlBbmMapBadBlock:
 	ldr	w6, [x0, x5]
 	orr	w4, w4, w6
 	str	w4, [x0, x5]
-	.loc 4 16 0
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.LVL44:
-	.loc 4 17 0
 	ldrh	w0, [x19, 6]
 	add	w0, w0, 1
 	strh	w0, [x19, 6]
-	.loc 4 19 0
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE222:
 	.size	FtlBbmMapBadBlock, .-FtlBbmMapBadBlock
 	.section	.text.FtlBbmIsBadBlock,"ax",@progbits
 	.align	2
 	.global	FtlBbmIsBadBlock
 	.type	FtlBbmIsBadBlock, %function
 FtlBbmIsBadBlock:
-.LFB223:
-	.loc 4 24 0
-	.cfi_startproc
-.LVL45:
-	.loc 4 30 0
 	adrp	x1, .LANCHOR17
-	.loc 4 24 0
 	and	w0, w0, 65535
-	.loc 4 30 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR17]
-.LVL46:
-	.loc 4 31 0
 	udiv	w2, w0, w1
 	msub	w0, w2, w1, w0
-.LVL47:
-	.loc 4 33 0
 	adrp	x1, .LANCHOR37
-.LVL48:
 	add	x1, x1, :lo12:.LANCHOR37
 	add	x2, x1, x2, uxth 3
-	.loc 4 31 0
 	and	w0, w0, 65535
-.LVL49:
-	.loc 4 34 0
 	ubfx	x3, x0, 5, 11
 	ldr	x1, [x2, 32]
 	ldr	w1, [x1, x3, lsl 2]
 	lsr	w0, w1, w0
-.LVL50:
-	.loc 4 36 0
 	and	w0, w0, 1
 	ret
-	.cfi_endproc
-.LFE223:
 	.size	FtlBbmIsBadBlock, .-FtlBbmIsBadBlock
 	.section	.text.FtlBbtInfoPrint,"ax",@progbits
 	.align	2
 	.global	FtlBbtInfoPrint
 	.type	FtlBbtInfoPrint, %function
 FtlBbtInfoPrint:
-.LFB224:
-	.loc 4 39 0
-	.cfi_startproc
 	ret
-	.cfi_endproc
-.LFE224:
 	.size	FtlBbtInfoPrint, .-FtlBbtInfoPrint
 	.section	.text.FtlBbtCalcTotleCnt,"ax",@progbits
 	.align	2
 	.global	FtlBbtCalcTotleCnt
 	.type	FtlBbtCalcTotleCnt, %function
 FtlBbtCalcTotleCnt:
-.LFB228:
-	.loc 4 157 0
-	.cfi_startproc
-.LVL51:
-	.loc 4 160 0
 	adrp	x0, .LANCHOR17
 	mov	w4, 0
-	.loc 4 159 0
 	mov	w5, 0
-.LVL52:
-	.loc 4 160 0
 	ldrh	w6, [x0, #:lo12:.LANCHOR17]
 	adrp	x0, .LANCHOR10
 	ldrh	w0, [x0, #:lo12:.LANCHOR10]
 	mul	w6, w6, w0
 	cmp	w4, w6
 	blt	.L43
-	.loc 4 169 0
 	mov	w0, w5
 	ret
 .L43:
-	.loc 4 157 0
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 .L36:
-	.loc 4 162 0
 	mov	w0, w4
 	bl	FtlBbmIsBadBlock
-.LVL53:
 	cbz	w0, .L35
-	.loc 4 164 0
 	add	w5, w5, 1
-.LVL54:
 	and	w5, w5, 65535
-.LVL55:
 .L35:
-	.loc 4 160 0 discriminator 2
 	add	w4, w4, 1
-.LVL56:
 	and	w4, w4, 65535
-.LVL57:
 	cmp	w4, w6
 	blt	.L36
-	.loc 4 169 0
 	mov	w0, w5
 	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE228:
 	.size	FtlBbtCalcTotleCnt, .-FtlBbtCalcTotleCnt
 	.section	.text.V2P_block,"ax",@progbits
 	.align	2
 	.global	V2P_block
 	.type	V2P_block, %function
 V2P_block:
-.LFB232:
-	.loc 2 5 0
-	.cfi_startproc
-.LVL58:
-	.loc 2 8 0
 	adrp	x2, .LANCHOR11
-	.loc 2 5 0
 	and	w0, w0, 65535
-	.loc 2 8 0
 	adrp	x4, .LANCHOR17
-	.loc 2 5 0
 	and	w1, w1, 65535
-	.loc 2 8 0
 	ldrh	w2, [x2, #:lo12:.LANCHOR11]
-.LVL59:
 	ldrh	w4, [x4, #:lo12:.LANCHOR17]
 	udiv	w3, w0, w2
 	msub	w0, w3, w2, w0
-.LVL60:
 	madd	w2, w2, w1, w0
-.LVL61:
 	madd	w0, w3, w4, w2
-	.loc 2 10 0
 	ret
-	.cfi_endproc
-.LFE232:
 	.size	V2P_block, .-V2P_block
 	.section	.text.P2V_plane,"ax",@progbits
 	.align	2
 	.global	P2V_plane
 	.type	P2V_plane, %function
 P2V_plane:
-.LFB233:
-	.loc 2 13 0
-	.cfi_startproc
-.LVL62:
-	.loc 2 13 0
 	and	w3, w0, 65535
-	.loc 2 16 0
 	adrp	x0, .LANCHOR11
-.LVL63:
 	ldrh	w1, [x0, #:lo12:.LANCHOR11]
-.LVL64:
 	adrp	x0, .LANCHOR17
 	ldrh	w2, [x0, #:lo12:.LANCHOR17]
 	udiv	w0, w3, w1
 	udiv	w2, w3, w2
 	msub	w0, w0, w1, w3
 	madd	w0, w1, w2, w0
-	.loc 2 18 0
 	ret
-	.cfi_endproc
-.LFE233:
 	.size	P2V_plane, .-P2V_plane
 	.section	.text.P2V_block_in_plane,"ax",@progbits
 	.align	2
 	.global	P2V_block_in_plane
 	.type	P2V_block_in_plane, %function
 P2V_block_in_plane:
-.LFB234:
-	.loc 2 21 0
-	.cfi_startproc
-.LVL65:
-	.loc 2 21 0
 	and	w2, w0, 65535
-	.loc 2 24 0
 	adrp	x0, .LANCHOR17
-.LVL66:
 	ldrh	w1, [x0, #:lo12:.LANCHOR17]
 	udiv	w0, w2, w1
 	msub	w0, w0, w1, w2
-	.loc 2 25 0
 	adrp	x1, .LANCHOR11
 	ldrh	w1, [x1, #:lo12:.LANCHOR11]
-	.loc 2 24 0
 	and	w0, w0, 65535
-.LVL67:
-	.loc 2 27 0
 	udiv	w0, w0, w1
-.LVL68:
 	ret
-	.cfi_endproc
-.LFE234:
 	.size	P2V_block_in_plane, .-P2V_block_in_plane
 	.section	.text.ftl_cmp_data_ver,"ax",@progbits
 	.align	2
 	.global	ftl_cmp_data_ver
 	.type	ftl_cmp_data_ver, %function
 ftl_cmp_data_ver:
-.LFB235:
-	.loc 2 31 0
-	.cfi_startproc
-.LVL69:
-	.loc 2 34 0
 	cmp	w0, w1
 	mov	w2, -2147483648
 	bls	.L48
-	.loc 2 36 0
 	sub	w1, w0, w1
-.LVL70:
 	cmp	w1, w2
 	cset	w0, ls
-.LVL71:
 	ret
-.LVL72:
 .L48:
-	.loc 2 40 0
 	sub	w1, w1, w0
-.LVL73:
 	cmp	w1, w2
 	cset	w0, hi
-.LVL74:
-	.loc 2 44 0
 	ret
-	.cfi_endproc
-.LFE235:
 	.size	ftl_cmp_data_ver, .-ftl_cmp_data_ver
 	.section	.text.FtlFreeSysBlkQueueEmpty,"ax",@progbits
 	.align	2
 	.global	FtlFreeSysBlkQueueEmpty
 	.type	FtlFreeSysBlkQueueEmpty, %function
 FtlFreeSysBlkQueueEmpty:
-.LFB238:
-	.loc 2 88 0
-	.cfi_startproc
-	.loc 2 89 0
 	adrp	x0, .LANCHOR38+6
 	ldrh	w0, [x0, #:lo12:.LANCHOR38+6]
 	cmp	w0, 0
-	.loc 2 90 0
 	cset	w0, eq
 	ret
-	.cfi_endproc
-.LFE238:
 	.size	FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty
 	.section	.text.FtlFreeSysBlkQueueFull,"ax",@progbits
 	.align	2
 	.global	FtlFreeSysBlkQueueFull
 	.type	FtlFreeSysBlkQueueFull, %function
 FtlFreeSysBlkQueueFull:
-.LFB239:
-	.loc 2 93 0
-	.cfi_startproc
-	.loc 2 94 0
 	adrp	x0, .LANCHOR38+6
 	ldrh	w0, [x0, #:lo12:.LANCHOR38+6]
 	cmp	w0, 1024
-	.loc 2 95 0
 	cset	w0, eq
 	ret
-	.cfi_endproc
-.LFE239:
 	.size	FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull
 	.section	.text.FtlFreeSysBLkSort,"ax",@progbits
 	.align	2
 	.global	FtlFreeSysBLkSort
 	.type	FtlFreeSysBLkSort, %function
 FtlFreeSysBLkSort:
-.LFB241:
-	.loc 2 118 0
-	.cfi_startproc
-.LVL75:
-	.loc 2 123 0
 	adrp	x0, .LANCHOR38
 	add	x1, x0, :lo12:.LANCHOR38
 	ldrh	w2, [x1, 6]
 	cbz	w2, .L52
-	.loc 2 119 0
 	adrp	x2, .LANCHOR39+28
 	ldrh	w3, [x1, 2]
 	mov	w6, 0
@@ -907,962 +518,503 @@ FtlFreeSysBLkSort:
 	ldrh	w2, [x1, 4]
 	and	w5, w5, 31
 .L54:
-.LVL76:
-	.loc 2 124 0 discriminator 1
 	cmp	w5, w4
 	bgt	.L55
 	cbz	w6, .L52
 	add	x0, x0, :lo12:.LANCHOR38
 	strh	w3, [x0, 2]
 	strh	w2, [x0, 4]
-.LVL77:
 .L52:
 	ret
-.LVL78:
 .L55:
-	.loc 2 125 0 discriminator 3
 	add	x6, x1, x3, sxtw 1
-	.loc 2 124 0 discriminator 3
 	add	w4, w4, 1
-.LVL79:
-	.loc 2 126 0 discriminator 3
 	add	w3, w3, 1
-	.loc 2 124 0 discriminator 3
 	and	w4, w4, 65535
-	.loc 2 126 0 discriminator 3
 	and	w3, w3, 1023
-	.loc 2 125 0 discriminator 3
 	ldrh	w7, [x6, 8]
-.LVL80:
-	.loc 2 127 0 discriminator 3
 	add	x6, x1, x2, sxtw 1
 	strh	w7, [x6, 8]
 	mov	w6, 1
-	.loc 2 128 0 discriminator 3
 	add	w2, w2, w6
 	and	w2, w2, 1023
 	b	.L54
-	.cfi_endproc
-.LFE241:
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
 	.section	.text.IsInFreeQueue,"ax",@progbits
 	.align	2
 	.global	IsInFreeQueue
 	.type	IsInFreeQueue, %function
 IsInFreeQueue:
-.LFB242:
-	.loc 2 163 0
-	.cfi_startproc
-.LVL81:
-.LBB189:
-.LBB190:
-	.loc 2 94 0
 	adrp	x1, .LANCHOR38
 	add	x1, x1, :lo12:.LANCHOR38
-.LBE190:
-.LBE189:
-	.loc 2 163 0
 	and	w0, w0, 65535
-.LBB192:
-.LBB191:
-	.loc 2 94 0
 	ldrh	w4, [x1, 6]
-.LBE191:
-.LBE192:
-	.loc 2 168 0
 	cmp	w4, 1024
 	beq	.L65
-	.loc 2 171 0
 	ldrh	w5, [x1, 2]
 	mov	w3, 0
 .L63:
-.LVL82:
-	.loc 2 170 0 discriminator 1
 	cmp	w3, w4
 	bcc	.L64
-.LVL83:
 .L65:
-	.loc 2 164 0
 	mov	w0, 0
-.LVL84:
 	ret
-.LVL85:
 .L64:
-	.loc 2 171 0
 	add	w2, w3, w5
 	ubfiz	x2, x2, 1, 10
 	add	x2, x1, x2
 	ldrh	w2, [x2, 8]
 	cmp	w2, w0
 	beq	.L66
-	.loc 2 170 0 discriminator 2
 	add	w3, w3, 1
-.LVL86:
 	b	.L63
 .L66:
-	.loc 2 172 0
 	mov	w0, 1
-.LVL87:
-	.loc 2 178 0
 	ret
-	.cfi_endproc
-.LFE242:
 	.size	IsInFreeQueue, .-IsInFreeQueue
 	.section	.text.insert_data_list,"ax",@progbits
 	.align	2
 	.global	insert_data_list
 	.type	insert_data_list, %function
 insert_data_list:
-.LFB246:
-	.loc 2 249 0
-	.cfi_startproc
-.LVL88:
-	.loc 2 260 0
 	adrp	x1, .LANCHOR5
-	.loc 2 249 0
 	and	w0, w0, 65535
-	.loc 2 260 0
 	ldrh	w14, [x1, #:lo12:.LANCHOR5]
 	cmp	w14, w0
 	bls	.L83
-	.loc 2 265 0
 	adrp	x1, .LANCHOR40
 	mov	w3, 6
 	ldr	x6, [x1, #:lo12:.LANCHOR40]
 	umull	x13, w0, w3
-	.loc 2 266 0
 	mov	w1, -1
-	.loc 2 265 0
 	add	x5, x6, x13
-.LVL89:
-	.loc 2 266 0
 	strh	w1, [x5, 2]
 	strh	w1, [x6, x13]
-	.loc 2 268 0
 	adrp	x1, .LANCHOR41
 	mov	x15, x1
 	ldr	x12, [x1, #:lo12:.LANCHOR41]
 	cbnz	x12, .L70
-	.loc 2 269 0
 	str	x5, [x1, #:lo12:.LANCHOR41]
-.LVL90:
 .L83:
-	.loc 2 323 0
 	mov	w0, 0
-.LVL91:
 	ret
-.LVL92:
 .L70:
-	.loc 2 249 0
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 2 273 0
 	adrp	x1, .LANCHOR42
 	ubfiz	x2, x0, 1, 16
-	.loc 2 279 0
 	mov	x4, -6148914691236517206
-	.loc 2 249 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 2 273 0
 	ldr	x16, [x1, #:lo12:.LANCHOR42]
-	.loc 2 279 0
 	movk	x4, 0xaaab, lsl 0
-	.loc 2 274 0
 	ldrh	w1, [x5, 4]
 	mov	w8, -1
-	.loc 2 289 0
 	mov	w11, w8
-	.loc 2 249 0
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -16
-	.cfi_offset 20, -8
-	.loc 2 274 0
 	cmp	w1, 0
-	.loc 2 301 0
 	mov	w20, 65535
-	.loc 2 273 0
 	ldrh	w7, [x16, x2]
-.LVL93:
-	.loc 2 274 0
 	mul	w7, w7, w1
-.LVL94:
-	.loc 2 279 0
 	sub	x1, x12, x6
-.LVL95:
 	asr	x1, x1, 1
-	.loc 2 274 0
 	csel	w7, w7, w8, ne
-.LVL96:
-	.loc 2 309 0
 	mov	w8, w3
-	.loc 2 279 0
 	mul	x1, x1, x4
-	.loc 2 294 0
 	adrp	x4, .LANCHOR43
 	ldr	x17, [x4, #:lo12:.LANCHOR43]
-	.loc 2 279 0
 	and	w1, w1, 65535
-.LVL97:
-	.loc 2 294 0
 	mov	x4, x12
 	add	x10, x17, x2
-	.loc 2 256 0
 	mov	w2, 0
-.LVL98:
 .L78:
-	.loc 2 281 0
 	add	w2, w2, 1
-.LVL99:
 	and	w2, w2, 65535
-.LVL100:
-	.loc 2 282 0
 	cmp	w14, w2
 	bcc	.L69
-	.loc 2 285 0
 	cmp	w1, w0
 	beq	.L69
-	.loc 2 288 0
 	ubfiz	x30, x1, 1, 16
-	.loc 2 289 0
 	ldrh	w19, [x4, 4]
 	cmp	w19, 0
-	.loc 2 288 0
 	ldrh	w3, [x16, x30]
-.LVL101:
-	.loc 2 289 0
 	mul	w3, w3, w19
-.LVL102:
 	csel	w3, w3, w11, ne
-.LVL103:
-	.loc 2 293 0
 	cmp	w7, w3
 	bne	.L74
-	.loc 2 294 0
 	ldrh	w19, [x17, x30]
 	ldrh	w3, [x10]
-.LVL104:
 	cmp	w19, w3
 	bcc	.L76
 .L75:
-	.loc 2 312 0
 	strh	w1, [x6, x13]
-.LVL105:
-	.loc 2 315 0
 	cmp	x4, x12
-	.loc 2 313 0
 	ldrh	w1, [x4, 2]
-.LVL106:
 	strh	w1, [x5, 2]
-	.loc 2 315 0
 	bne	.L79
-	.loc 2 316 0
 	strh	w0, [x4, 2]
-	.loc 2 317 0
 	str	x5, [x15, #:lo12:.LANCHOR41]
 	b	.L69
-.LVL107:
 .L74:
-	.loc 2 298 0
 	bcc	.L75
-.LVL108:
 .L76:
-	.loc 2 301 0
 	ldrh	w3, [x4]
 	cmp	w3, w20
 	bne	.L77
-	.loc 2 302 0
 	strh	w1, [x5, 2]
-.LVL109:
-	.loc 2 303 0
 	strh	w0, [x4]
-	.loc 2 304 0
 	adrp	x0, .LANCHOR44
 	str	x5, [x0, #:lo12:.LANCHOR44]
-.LVL110:
 .L69:
-	.loc 2 323 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL111:
 .L77:
-	.cfi_restore_state
-	.loc 2 309 0
 	umaddl	x4, w3, w8, x6
-.LVL112:
-	.loc 2 281 0
 	mov	w1, w3
 	b	.L78
-.LVL113:
 .L79:
-	.loc 2 319 0
 	ldrh	w1, [x4, 2]
 	mov	w2, 6
-.LVL114:
 	umull	x1, w1, w2
 	strh	w0, [x6, x1]
-.LVL115:
-	.loc 2 320 0
 	strh	w0, [x4, 2]
 	b	.L69
-	.cfi_endproc
-.LFE246:
 	.size	insert_data_list, .-insert_data_list
 	.section	.text.INSERT_DATA_LIST,"ax",@progbits
 	.align	2
 	.global	INSERT_DATA_LIST
 	.type	INSERT_DATA_LIST, %function
 INSERT_DATA_LIST:
-.LFB245:
-	.loc 2 218 0
-	.cfi_startproc
-.LVL116:
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 2 219 0
 	bl	insert_data_list
-.LVL117:
-	.loc 2 220 0
 	adrp	x1, .LANCHOR45
 	ldrh	w0, [x1, #:lo12:.LANCHOR45]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	strh	w0, [x1, #:lo12:.LANCHOR45]
-	.loc 2 221 0
 	adrp	x1, .LANCHOR5
 	ldrh	w1, [x1, #:lo12:.LANCHOR5]
 	cmp	w1, w0
 	bcs	.L85
-.LVL118:
-	.loc 2 222 0
 	ldp	x29, x30, [sp], 16
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
-.LBB195:
-.LBB196:
-	.loc 2 221 0
 	mov	w2, 221
 	adrp	x1, .LANCHOR46
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR46
 	add	x0, x0, :lo12:.LC1
 	b	printf
-.LVL119:
 .L85:
-	.cfi_restore_state
-.LBE196:
-.LBE195:
-	.loc 2 222 0
 	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE245:
 	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
 	.section	.text.insert_free_list,"ax",@progbits
 	.align	2
 	.global	insert_free_list
 	.type	insert_free_list, %function
 insert_free_list:
-.LFB247:
-	.loc 2 326 0
-	.cfi_startproc
-.LVL120:
-	.loc 2 326 0
 	and	w0, w0, 65535
-	.loc 2 332 0
 	mov	w7, 65535
 	cmp	w0, w7
 	beq	.L89
-	.loc 2 335 0
 	adrp	x1, .LANCHOR40
 	mov	w6, 6
 	ldr	x3, [x1, #:lo12:.LANCHOR40]
 	umull	x8, w0, w6
-	.loc 2 336 0
 	mov	w1, -1
-	.loc 2 335 0
 	add	x4, x3, x8
-.LVL121:
-	.loc 2 336 0
 	strh	w1, [x4, 2]
 	strh	w1, [x3, x8]
-	.loc 2 338 0
 	adrp	x1, .LANCHOR47
 	mov	x12, x1
 	ldr	x5, [x1, #:lo12:.LANCHOR47]
 	cbnz	x5, .L90
-	.loc 2 339 0
 	str	x4, [x1, #:lo12:.LANCHOR47]
-.LVL122:
 .L89:
-	.loc 2 372 0
 	mov	w0, 0
-.LVL123:
 	ret
-.LVL124:
 .L90:
-	.loc 2 343 0
 	adrp	x1, .LANCHOR43
-	.loc 2 345 0
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
-	.loc 2 343 0
 	ldr	x11, [x1, #:lo12:.LANCHOR43]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w13, [x11, x1]
-.LVL125:
-	.loc 2 345 0
 	sub	x1, x5, x3
 	asr	x1, x1, 1
 	mul	x1, x1, x2
 	mov	x2, x5
 	and	w1, w1, 65535
-.LVL126:
 .L93:
-	.loc 2 348 0
 	ubfiz	x10, x1, 1, 16
-	.loc 2 349 0
 	ldrh	w10, [x11, x10]
 	cmp	w10, w13
 	bcs	.L91
-	.loc 2 352 0
 	ldrh	w10, [x2]
 	cmp	w10, w7
 	bne	.L92
-	.loc 2 353 0
 	strh	w1, [x4, 2]
-.LVL127:
-	.loc 2 354 0
 	strh	w0, [x2]
-	.loc 2 355 0
 	b	.L89
-.LVL128:
 .L92:
-	.loc 2 358 0
 	umaddl	x2, w10, w6, x3
-.LVL129:
-	.loc 2 348 0
 	mov	w1, w10
-.LVL130:
 	b	.L93
-.LVL131:
 .L91:
-	.loc 2 361 0
 	ldrh	w6, [x2, 2]
-	.loc 2 364 0
 	cmp	x2, x5
-	.loc 2 361 0
 	strh	w6, [x4, 2]
-.LVL132:
-	.loc 2 362 0
 	strh	w1, [x3, x8]
-	.loc 2 364 0
 	bne	.L94
-	.loc 2 365 0
 	strh	w0, [x2, 2]
-	.loc 2 366 0
 	str	x4, [x12, #:lo12:.LANCHOR47]
 	b	.L89
 .L94:
-	.loc 2 368 0
 	ldrh	w1, [x2, 2]
-.LVL133:
 	mov	w4, 6
-.LVL134:
 	umull	x1, w1, w4
 	strh	w0, [x3, x1]
-.LVL135:
-	.loc 2 369 0
 	strh	w0, [x2, 2]
 	b	.L89
-	.cfi_endproc
-.LFE247:
 	.size	insert_free_list, .-insert_free_list
 	.section	.text.INSERT_FREE_LIST,"ax",@progbits
 	.align	2
 	.global	INSERT_FREE_LIST
 	.type	INSERT_FREE_LIST, %function
 INSERT_FREE_LIST:
-.LFB244:
-	.loc 2 211 0
-	.cfi_startproc
-.LVL136:
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 2 212 0
 	bl	insert_free_list
-.LVL137:
-	.loc 2 213 0
 	adrp	x1, .LANCHOR48
 	ldrh	w0, [x1, #:lo12:.LANCHOR48]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	strh	w0, [x1, #:lo12:.LANCHOR48]
-	.loc 2 214 0
 	adrp	x1, .LANCHOR5
 	ldrh	w1, [x1, #:lo12:.LANCHOR5]
 	cmp	w1, w0
 	bcs	.L95
-.LVL138:
-	.loc 2 215 0
 	ldp	x29, x30, [sp], 16
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
-.LBB199:
-.LBB200:
-	.loc 2 214 0
 	mov	w2, 214
 	adrp	x1, .LANCHOR49
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR49
 	add	x0, x0, :lo12:.LC1
 	b	printf
-.LVL139:
 .L95:
-	.cfi_restore_state
-.LBE200:
-.LBE199:
-	.loc 2 215 0
 	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE244:
 	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
 	.section	.text.List_remove_node,"ax",@progbits
 	.align	2
 	.global	List_remove_node
 	.type	List_remove_node, %function
 List_remove_node:
-.LFB248:
-	.loc 2 375 0
-	.cfi_startproc
-.LVL140:
 	stp	x29, x30, [sp, -64]!
-	.cfi_def_cfa_offset 64
-	.cfi_offset 29, -64
-	.cfi_offset 30, -56
 	and	w1, w1, 65535
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -48
-	.cfi_offset 20, -40
-	.loc 2 378 0
 	adrp	x20, .LANCHOR40
-	.loc 2 375 0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -32
-	.cfi_offset 22, -24
 	mov	x22, x0
-	.loc 2 378 0
 	mov	w0, 6
-.LVL141:
-	.loc 2 375 0
 	str	x23, [sp, 48]
-	.cfi_offset 23, -16
-	.loc 2 378 0
 	ldr	x23, [x20, #:lo12:.LANCHOR40]
 	umull	x21, w1, w0
-	.loc 2 379 0
 	mov	w0, 65535
-	.loc 2 378 0
 	add	x19, x23, x21
-.LVL142:
-	.loc 2 379 0
 	ldrh	w1, [x19, 2]
-.LVL143:
 	cmp	w1, w0
 	bne	.L99
-	.loc 2 379 0 is_stmt 0 discriminator 1
 	ldr	x0, [x22]
 	cmp	x19, x0
 	beq	.L99
-	.loc 2 379 0 discriminator 2
 	adrp	x1, .LANCHOR50
 	adrp	x0, .LC1
 	mov	w2, 379
 	add	x1, x1, :lo12:.LANCHOR50
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL144:
 .L99:
-	.loc 2 381 0 is_stmt 1
 	ldr	x0, [x22]
 	mov	w1, 65535
 	cmp	x19, x0
 	ldrh	w0, [x23, x21]
 	bne	.L100
-	.loc 2 382 0
 	cmp	w0, w1
 	bne	.L101
-	.loc 2 383 0
 	str	xzr, [x22]
 .L102:
-	.loc 2 399 0
 	mov	w0, -1
 	strh	w0, [x23, x21]
 	strh	w0, [x19, 2]
-	.loc 2 401 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-.LVL145:
 	ldp	x21, x22, [sp, 32]
-.LVL146:
 	ldr	x23, [sp, 48]
-.LVL147:
 	ldp	x29, x30, [sp], 64
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 23
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL148:
 .L101:
-	.cfi_restore_state
-	.loc 2 385 0
 	ldr	x1, [x20, #:lo12:.LANCHOR40]
 	mov	w2, 6
 	umaddl	x0, w0, w2, x1
-	.loc 2 386 0
 	mov	w1, -1
-	.loc 2 385 0
 	str	x0, [x22]
-	.loc 2 386 0
 	strh	w1, [x0, 2]
 	b	.L102
 .L100:
-	.loc 2 388 0
 	cmp	w0, w1
 	ldrh	w1, [x19, 2]
 	bne	.L103
-	.loc 2 389 0
 	cmp	w1, w0
 	beq	.L102
-.LVL149:
-	.loc 2 390 0
 	mov	w0, 6
-	.loc 2 391 0
 	mov	w2, -1
-	.loc 2 390 0
 	umull	x1, w1, w0
-.LVL150:
-	.loc 2 391 0
 	ldr	x0, [x20, #:lo12:.LANCHOR40]
 	strh	w2, [x0, x1]
 	b	.L102
-.LVL151:
 .L103:
-	.loc 2 394 0
 	ldr	x2, [x20, #:lo12:.LANCHOR40]
-.LVL152:
 	mov	w3, 6
-	.loc 2 395 0
 	umaddl	x4, w0, w3, x2
 	strh	w1, [x4, 2]
-.LVL153:
-	.loc 2 396 0
 	ldrh	w1, [x19, 2]
 	umull	x1, w1, w3
-	.loc 2 397 0
 	strh	w0, [x2, x1]
 	b	.L102
-	.cfi_endproc
-.LFE248:
 	.size	List_remove_node, .-List_remove_node
 	.section	.text.List_pop_index_node,"ax",@progbits
 	.align	2
 	.global	List_pop_index_node
 	.type	List_pop_index_node, %function
 List_pop_index_node:
-.LFB249:
-	.loc 2 404 0
-	.cfi_startproc
-.LVL154:
-	.loc 2 408 0
 	ldr	x2, [x0]
 	cbz	x2, .L111
-	.loc 2 404 0
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 2 413 0
 	adrp	x3, .LANCHOR40
 	and	w1, w1, 65535
-	.loc 2 412 0
 	mov	w4, 65535
-	.loc 2 404 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	str	x19, [sp, 16]
-	.cfi_offset 19, -16
-	.loc 2 413 0
 	mov	w5, 6
 	ldr	x19, [x3, #:lo12:.LANCHOR40]
-.LVL155:
 .L107:
-	.loc 2 412 0
 	cbnz	w1, .L108
 .L110:
-	.loc 2 416 0
 	sub	x19, x2, x19
 	mov	x2, -6148914691236517206
-.LVL156:
 	asr	x19, x19, 1
 	movk	x2, 0xaaab, lsl 0
 	mul	x19, x19, x2
 	and	w19, w19, 65535
-.LVL157:
-	.loc 2 417 0
 	mov	w1, w19
-.LVL158:
 	bl	List_remove_node
-.LVL159:
-	.loc 2 419 0
 	mov	w0, w19
-	.loc 2 420 0
 	ldr	x19, [sp, 16]
-.LVL160:
 	ldp	x29, x30, [sp], 32
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_def_cfa 31, 0
 	ret
-.LVL161:
 .L108:
-	.cfi_restore_state
-	.loc 2 412 0 discriminator 1
 	ldrh	w3, [x2]
 	cmp	w3, w4
 	beq	.L110
-	.loc 2 414 0
 	sub	w1, w1, #1
-.LVL162:
-	.loc 2 413 0
 	umaddl	x2, w3, w5, x19
-.LVL163:
-	.loc 2 414 0
 	and	w1, w1, 65535
-.LVL164:
 	b	.L107
-.LVL165:
 .L111:
-	.cfi_def_cfa 31, 0
-	.cfi_restore 19
-	.cfi_restore 29
-	.cfi_restore 30
-	.loc 2 409 0
 	mov	w0, 65535
-.LVL166:
 	ret
-	.cfi_endproc
-.LFE249:
 	.size	List_pop_index_node, .-List_pop_index_node
 	.section	.text.List_pop_head_node,"ax",@progbits
 	.align	2
 	.global	List_pop_head_node
 	.type	List_pop_head_node, %function
 List_pop_head_node:
-.LFB250:
-	.loc 2 423 0
-	.cfi_startproc
-.LVL167:
-	.loc 2 424 0
 	mov	w1, 0
 	b	List_pop_index_node
-.LVL168:
-	.cfi_endproc
-.LFE250:
 	.size	List_pop_head_node, .-List_pop_head_node
 	.section	.text.List_get_gc_head_node,"ax",@progbits
 	.align	2
 	.global	List_get_gc_head_node
 	.type	List_get_gc_head_node, %function
 List_get_gc_head_node:
-.LFB251:
-	.loc 2 428 0
-	.cfi_startproc
-.LVL169:
-	.loc 2 428 0
 	and	w2, w0, 65535
-	.loc 2 432 0
 	adrp	x0, .LANCHOR41
-.LVL170:
 	ldr	x1, [x0, #:lo12:.LANCHOR41]
 	cbz	x1, .L122
-	.loc 2 437 0
 	adrp	x0, .LANCHOR40
 	mov	w4, 6
 	ldr	x3, [x0, #:lo12:.LANCHOR40]
-	.loc 2 436 0
 	mov	w0, 65535
-.LVL171:
 .L119:
 	cbz	w2, .L120
-	.loc 2 436 0 is_stmt 0 discriminator 1
 	ldrh	w1, [x1]
-.LVL172:
 	cmp	w1, w0
 	bne	.L121
 	ret
 .L121:
-	.loc 2 438 0 is_stmt 1
 	sub	w2, w2, #1
-.LVL173:
-	.loc 2 437 0
 	umaddl	x1, w1, w4, x3
-.LVL174:
-	.loc 2 438 0
 	and	w2, w2, 65535
-.LVL175:
 	b	.L119
-.LVL176:
 .L122:
-	.loc 2 433 0
 	mov	w0, 65535
 	ret
-.LVL177:
 .L120:
-	.loc 2 442 0
 	sub	x0, x1, x3
 	mov	x1, -6148914691236517206
-.LVL178:
 	asr	x0, x0, 1
 	movk	x1, 0xaaab, lsl 0
 	mul	x0, x0, x1
-	.loc 2 444 0
 	and	w0, w0, 65535
-	.loc 2 445 0
 	ret
-	.cfi_endproc
-.LFE251:
 	.size	List_get_gc_head_node, .-List_get_gc_head_node
 	.section	.text.List_update_data_list,"ax",@progbits
 	.align	2
 	.global	List_update_data_list
 	.type	List_update_data_list, %function
 List_update_data_list:
-.LFB252:
-	.loc 2 448 0
-	.cfi_startproc
-.LVL179:
 	stp	x29, x30, [sp, -80]!
-	.cfi_def_cfa_offset 80
-	.cfi_offset 29, -80
-	.cfi_offset 30, -72
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -64
-	.cfi_offset 20, -56
 	and	w19, w0, 65535
-	.loc 2 457 0
 	adrp	x0, .LANCHOR51
-.LVL180:
-	.loc 2 448 0
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	.loc 2 457 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
-	.loc 2 448 0
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 21, -48
-	.cfi_offset 22, -40
-	.cfi_offset 23, -32
-	.cfi_offset 24, -24
-	.cfi_offset 25, -16
-	.cfi_offset 26, -8
-	.loc 2 457 0
 	cmp	w0, w19
 	beq	.L125
-	.loc 2 457 0 is_stmt 0 discriminator 1
 	adrp	x0, .LANCHOR52
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
 	beq	.L125
-	.loc 2 457 0 discriminator 2
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w19
 	beq	.L125
-.LVL181:
-.LBB203:
-.LBB204:
-	.loc 2 460 0 is_stmt 1
 	adrp	x0, .LANCHOR40
 	mov	w21, 6
-	.loc 2 462 0
 	adrp	x24, .LANCHOR41
 	mov	x26, x0
-	.loc 2 460 0
 	umull	x21, w19, w21
 	ldr	x23, [x0, #:lo12:.LANCHOR40]
-	.loc 2 462 0
 	ldr	x1, [x24, #:lo12:.LANCHOR41]
-	.loc 2 460 0
 	add	x22, x23, x21
-.LVL182:
-	.loc 2 462 0
 	cmp	x22, x1
 	beq	.L125
-	.loc 2 465 0
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x19, 1, 16
 	mov	x25, x1
 	ldr	x2, [x1, #:lo12:.LANCHOR42]
-	.loc 2 470 0
 	mov	w1, 65535
-	.loc 2 465 0
 	ldrh	w20, [x2, x0]
-.LVL183:
-	.loc 2 466 0
 	ldrh	w0, [x22, 4]
-.LVL184:
 	cmp	w0, 0
 	mul	w20, w20, w0
-.LVL185:
-	.loc 2 470 0
 	ldrh	w0, [x22, 2]
-.LVL186:
-	.loc 2 466 0
 	csinv	w20, w20, wzr, ne
-.LVL187:
-	.loc 2 470 0
 	cmp	w0, w1
 	bne	.L128
 	ldrh	w1, [x23, x21]
@@ -1871,13 +1023,10 @@ List_update_data_list:
 	adrp	x1, .LANCHOR54
 	adrp	x0, .LC1
 	mov	w2, 470
-.LVL188:
 	add	x1, x1, :lo12:.LANCHOR54
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL189:
 .L128:
-	.loc 2 471 0
 	ldrh	w0, [x22, 2]
 	mov	w1, 65535
 	cmp	w0, w1
@@ -1886,44 +1035,26 @@ List_update_data_list:
 	cmp	w1, w0
 	beq	.L125
 .L129:
-	.loc 2 473 0
 	mov	w1, 6
-	.loc 2 474 0
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
-	.loc 2 473 0
 	umull	x0, w0, w1
-.LVL190:
-	.loc 2 474 0
 	asr	x1, x0, 1
 	mul	x1, x1, x2
-	.loc 2 475 0
 	ldr	x2, [x25, #:lo12:.LANCHOR42]
 	ldrh	w1, [x2, x1, lsl 1]
-.LVL191:
-	.loc 2 476 0
 	ldr	x2, [x26, #:lo12:.LANCHOR40]
 	add	x0, x2, x0
-.LVL192:
 	ldrh	w2, [x0, 4]
-.LVL193:
 	cmp	w2, 0
 	mul	w0, w1, w2
-.LVL194:
 	csinv	w0, w0, wzr, ne
-.LVL195:
-	.loc 2 480 0
 	cmp	w20, w0
 	bcs	.L125
-	.loc 2 481 0
 	adrp	x20, .LANCHOR45
-.LVL196:
 	mov	w1, w19
-.LVL197:
 	add	x0, x24, :lo12:.LANCHOR41
-.LVL198:
 	bl	List_remove_node
-.LVL199:
 	ldrh	w0, [x20, #:lo12:.LANCHOR45]
 	cbnz	w0, .L131
 	adrp	x1, .LANCHOR54
@@ -1932,240 +1063,129 @@ List_update_data_list:
 	add	x1, x1, :lo12:.LANCHOR54
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL200:
 .L131:
 	ldrh	w0, [x20, #:lo12:.LANCHOR45]
 	sub	w0, w0, #1
 	strh	w0, [x20, #:lo12:.LANCHOR45]
-	.loc 2 482 0
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-.LVL201:
 .L125:
-.LBE204:
-.LBE203:
-	.loc 2 485 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-.LVL202:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE252:
 	.size	List_update_data_list, .-List_update_data_list
 	.section	.text.select_l2p_ram_region,"ax",@progbits
 	.align	2
 	.global	select_l2p_ram_region
 	.type	select_l2p_ram_region, %function
 select_l2p_ram_region:
-.LFB260:
-	.loc 2 749 0
-	.cfi_startproc
-.LVL203:
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 2 754 0
 	adrp	x0, .LANCHOR33
 	mov	x1, 0
-	.loc 2 755 0
 	mov	w3, 65535
-	.loc 2 749 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 2 754 0
 	ldrh	w2, [x0, #:lo12:.LANCHOR33]
-	.loc 2 755 0
 	adrp	x0, .LANCHOR55
-	.loc 2 749 0
 	str	x19, [sp, 16]
-	.cfi_offset 19, -16
-	.loc 2 755 0
 	ldr	x0, [x0, #:lo12:.LANCHOR55]
-.LVL204:
 .L136:
 	and	w19, w1, 65535
-.LVL205:
-	.loc 2 754 0 discriminator 1
 	cmp	w19, w2
 	bcc	.L138
 	add	x3, x0, 4
-	.loc 2 754 0 is_stmt 0
 	mov	w19, w2
-.LVL206:
 	mov	w5, -2147483648
 	mov	w1, 0
-.LVL207:
 .L139:
-	.loc 2 764 0 is_stmt 1 discriminator 1
 	cmp	w1, w2
 	bne	.L141
-	.loc 2 773 0
 	cmp	w19, w2
 	bcc	.L137
-	.loc 2 779 0
 	adrp	x1, .LANCHOR56
-.LVL208:
 	mov	w19, w2
-.LVL209:
 	mov	w3, -1
 	ldrh	w4, [x1, #:lo12:.LANCHOR56]
 	mov	w1, 0
-.LVL210:
 .L142:
-	.loc 2 778 0 discriminator 1
 	cmp	w1, w2
 	bne	.L144
-	.loc 2 784 0
 	cmp	w19, w1
 	bcc	.L137
-	.loc 2 784 0 is_stmt 0 discriminator 1
 	mov	w2, 784
 	adrp	x1, .LANCHOR57
-.LVL211:
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR57
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL212:
 	b	.L137
-.LVL213:
 .L138:
 	add	x1, x1, 1
-	.loc 2 755 0 is_stmt 1
 	add	x4, x0, x1, lsl 4
 	ldrh	w4, [x4, -16]
 	cmp	w4, w3
 	bne	.L136
-.LVL214:
 .L137:
-	.loc 2 786 0
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_def_cfa 31, 0
 	ret
-.LVL215:
 .L141:
-	.cfi_restore_state
-	.loc 2 765 0
 	ldr	w4, [x3]
 	tbnz	w4, #31, .L140
-	.loc 2 766 0
 	cmp	w5, w4
 	bls	.L140
 	mov	w5, w4
-.LVL216:
 	mov	w19, w1
-.LVL217:
 .L140:
-	.loc 2 764 0 discriminator 2
 	add	w1, w1, 1
-.LVL218:
 	add	x3, x3, 16
 	and	w1, w1, 65535
-.LVL219:
 	b	.L139
-.LVL220:
 .L144:
-	.loc 2 779 0
 	ldr	w6, [x0, 4]
 	cmp	w3, w6
 	bls	.L143
-	.loc 2 779 0 is_stmt 0 discriminator 1
 	ldrh	w5, [x0]
 	cmp	w5, w4
 	csel	w3, w3, w6, eq
-.LVL221:
 	csel	w19, w19, w1, eq
-.LVL222:
 .L143:
-	.loc 2 778 0 is_stmt 1 discriminator 2
 	add	w1, w1, 1
-.LVL223:
 	add	x0, x0, 16
 	and	w1, w1, 65535
-.LVL224:
 	b	.L142
-	.cfi_endproc
-.LFE260:
 	.size	select_l2p_ram_region, .-select_l2p_ram_region
 	.section	.text.FtlUpdateVaildLpn,"ax",@progbits
 	.align	2
 	.global	FtlUpdateVaildLpn
 	.type	FtlUpdateVaildLpn, %function
 FtlUpdateVaildLpn:
-.LFB266:
-	.loc 2 931 0
-	.cfi_startproc
-.LVL225:
-	.loc 2 934 0
 	adrp	x2, .LANCHOR58
 	mov	x3, x2
 	ldrh	w1, [x2, #:lo12:.LANCHOR58]
 	cmp	w1, 4
 	bhi	.L147
-	.loc 2 934 0 is_stmt 0 discriminator 1
 	cbnz	w0, .L147
-	.loc 2 934 0
 	add	w1, w1, 1
 	strh	w1, [x2, #:lo12:.LANCHOR58]
-	.loc 2 943 0 is_stmt 1
 	ret
 .L147:
-.LBB207:
-.LBB208:
-	.loc 2 937 0
 	adrp	x1, .LANCHOR5
-.LBE208:
-.LBE207:
-	.loc 2 936 0
 	adrp	x0, .LANCHOR59
-.LVL226:
-	.loc 2 935 0
 	strh	wzr, [x3, #:lo12:.LANCHOR58]
-.LBB211:
-.LBB209:
-	.loc 2 939 0
 	mov	w2, 0
-	.loc 2 937 0
 	ldrh	w5, [x1, #:lo12:.LANCHOR5]
-	.loc 2 939 0
 	adrp	x1, .LANCHOR42
-.LBE209:
-.LBE211:
-	.loc 2 936 0
 	str	wzr, [x0, #:lo12:.LANCHOR59]
-.LVL227:
-.LBB212:
-.LBB210:
-	.loc 2 939 0
 	mov	w3, 0
 	ldr	x6, [x1, #:lo12:.LANCHOR42]
 	mov	w7, 65535
 	mov	x1, 0
 .L148:
-.LVL228:
-	.loc 2 937 0
 	cmp	w5, w1, uxth
 	bhi	.L150
 	cbz	w3, .L146
@@ -2173,42 +1193,25 @@ FtlUpdateVaildLpn:
 .L146:
 	ret
 .L150:
-	.loc 2 939 0
 	ldrh	w4, [x6, x1, lsl 1]
 	cmp	w4, w7
 	beq	.L149
-	.loc 2 940 0
 	add	w2, w2, w4
 	mov	w3, 1
 .L149:
-.LVL229:
 	add	x1, x1, 1
-.LVL230:
 	b	.L148
-.LBE210:
-.LBE212:
-	.cfi_endproc
-.LFE266:
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
 	.section	.text.ftl_set_blk_mode,"ax",@progbits
 	.align	2
 	.global	ftl_set_blk_mode
 	.type	ftl_set_blk_mode, %function
 ftl_set_blk_mode:
-.LFB272:
-	.loc 2 1396 0
-	.cfi_startproc
-.LVL231:
-	.loc 2 1396 0
 	and	w0, w0, 65535
-	.loc 2 1397 0
 	cbz	w1, .L157
 	b	ftl_set_blk_mode.part.6
-.LVL232:
 .L157:
-	.loc 2 1400 0
 	adrp	x1, .LANCHOR1
-.LVL233:
 	ubfx	x2, x0, 5, 11
 	lsl	x2, x2, 2
 	ldr	x3, [x1, #:lo12:.LANCHOR1]
@@ -2218,422 +1221,244 @@ ftl_set_blk_mode:
 	bic	w0, w1, w0
 	str	w0, [x3, x2]
 	ret
-	.cfi_endproc
-.LFE272:
 	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
 	.section	.text.ftl_get_blk_mode,"ax",@progbits
 	.align	2
 	.global	ftl_get_blk_mode
 	.type	ftl_get_blk_mode, %function
 ftl_get_blk_mode:
-.LFB273:
-	.loc 2 1404 0
-	.cfi_startproc
-.LVL234:
-	.loc 2 1404 0
 	and	w1, w0, 65535
-	.loc 2 1405 0
 	adrp	x0, .LANCHOR1
-.LVL235:
 	ldr	x0, [x0, #:lo12:.LANCHOR1]
 	ubfx	x2, x1, 5, 11
 	ldr	w0, [x0, x2, lsl 2]
 	lsr	w0, w0, w1
-	.loc 2 1406 0
 	and	w0, w0, 1
 	ret
-	.cfi_endproc
-.LFE273:
 	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
 	.section	.text.ftl_sb_update_avl_pages,"ax",@progbits
 	.align	2
 	.global	ftl_sb_update_avl_pages
 	.type	ftl_sb_update_avl_pages, %function
 ftl_sb_update_avl_pages:
-.LFB279:
-	.loc 2 1657 0
-	.cfi_startproc
-.LVL236:
-	.loc 2 1657 0
 	and	w2, w2, 65535
 	and	w6, w1, 65535
 	ubfiz	x4, x2, 1, 16
-	.loc 2 1660 0
 	adrp	x1, .LANCHOR3
-.LVL237:
 	add	x4, x4, 16
-	.loc 2 1659 0
 	strh	wzr, [x0, 4]
-.LVL238:
 	add	x4, x0, x4
-	.loc 2 1660 0
 	ldrh	w3, [x1, #:lo12:.LANCHOR3]
-	.loc 2 1662 0
 	mov	w1, 65535
-.LVL239:
 .L160:
-	.loc 2 1660 0 discriminator 1
 	cmp	w2, w3
 	bcc	.L162
-	.loc 2 1671 0
 	adrp	x1, .LANCHOR19
 	ubfiz	x3, x3, 1, 16
 	add	x3, x3, 16
 	add	x2, x0, 16
-.LVL240:
 	ldrh	w1, [x1, #:lo12:.LANCHOR19]
 	add	x3, x0, x3
-	.loc 2 1669 0
 	mov	w5, 65535
 	sub	w1, w1, #1
 	and	w1, w1, 65535
-	.loc 2 1671 0
 	sub	w1, w1, w6
 .L163:
-	.loc 2 1667 0 discriminator 1
 	cmp	x2, x3
 	bne	.L165
-	.loc 2 1674 0
 	ret
-.LVL241:
 .L162:
-	.loc 2 1662 0
 	ldrh	w5, [x4]
 	cmp	w5, w1
 	beq	.L161
-	.loc 2 1664 0
 	ldrh	w5, [x0, 4]
 	add	w5, w5, 1
 	strh	w5, [x0, 4]
 .L161:
-	.loc 2 1660 0 discriminator 2
 	add	w2, w2, 1
-.LVL242:
 	add	x4, x4, 2
 	and	w2, w2, 65535
-.LVL243:
 	b	.L160
-.LVL244:
 .L165:
-	.loc 2 1669 0
 	ldrh	w4, [x2]
 	cmp	w4, w5
 	beq	.L164
-	.loc 2 1671 0
 	ldrh	w4, [x0, 4]
 	add	w4, w1, w4
 	strh	w4, [x0, 4]
 .L164:
 	add	x2, x2, 2
 	b	.L163
-	.cfi_endproc
-.LFE279:
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
 	.section	.text.FtlSlcSuperblockCheck,"ax",@progbits
 	.align	2
 	.global	FtlSlcSuperblockCheck
 	.type	FtlSlcSuperblockCheck, %function
 FtlSlcSuperblockCheck:
-.LFB282:
-	.loc 2 2062 0
-	.cfi_startproc
-.LVL245:
-	.loc 2 2065 0
 	ldrh	w1, [x0, 4]
 	cbz	w1, .L166
-	.loc 2 2067 0
 	ldrh	w2, [x0]
 	mov	w1, 65535
 	cmp	w2, w1
 	beq	.L166
-.LVL246:
-.LBB215:
-.LBB216:
-	.loc 2 2069 0
 	ldrb	w2, [x0, 6]
 	add	x2, x2, 8
 	ldrh	w3, [x0, x2, lsl 1]
-.LVL247:
-	.loc 2 2072 0
 	adrp	x2, .LANCHOR3
 	ldrh	w4, [x2, #:lo12:.LANCHOR3]
-	.loc 2 2070 0
 	mov	w2, w1
 .L169:
 	cmp	w3, w2
 	beq	.L171
-.LVL248:
 .L166:
 	ret
-.LVL249:
 .L171:
-	.loc 2 2071 0
 	ldrb	w1, [x0, 6]
 	add	w1, w1, 1
 	and	w1, w1, 255
 	strb	w1, [x0, 6]
-	.loc 2 2072 0
 	cmp	w1, w4
 	bne	.L170
-	.loc 2 2073 0
 	ldrh	w1, [x0, 2]
-	.loc 2 2074 0
 	strb	wzr, [x0, 6]
-	.loc 2 2073 0
 	add	w1, w1, 1
 	strh	w1, [x0, 2]
 .L170:
-	.loc 2 2076 0
 	ldrb	w1, [x0, 6]
 	add	x1, x1, 8
 	ldrh	w3, [x0, x1, lsl 1]
-.LVL250:
 	b	.L169
-.LBE216:
-.LBE215:
-	.cfi_endproc
-.LFE282:
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
 	.section	.text.make_superblock,"ax",@progbits
 	.align	2
 	.global	make_superblock
 	.type	make_superblock, %function
 make_superblock:
-.LFB284:
-	.loc 2 2094 0
-	.cfi_startproc
-.LVL251:
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 2 2097 0
 	ldrh	w1, [x0]
-	.loc 2 2094 0
 	str	x19, [sp, 16]
-	.cfi_offset 19, -16
-	.loc 2 2094 0
 	mov	x19, x0
-	.loc 2 2097 0
 	adrp	x0, .LANCHOR5
-.LVL252:
 	ldrh	w0, [x0, #:lo12:.LANCHOR5]
 	cmp	w1, w0
 	bcc	.L173
-	.loc 2 2097 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR60
 	adrp	x0, .LC1
 	mov	w2, 2097
 	add	x1, x1, :lo12:.LANCHOR60
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL253:
 .L173:
-	.loc 2 2100 0 is_stmt 1
 	adrp	x0, .LANCHOR3
-	.loc 2 2101 0
 	adrp	x7, .LANCHOR13
 	add	x6, x19, 16
 	add	x7, x7, :lo12:.LANCHOR13
-	.loc 2 2100 0
 	ldrh	w8, [x0, #:lo12:.LANCHOR3]
 	mov	x5, 0
-	.loc 2 2098 0
 	strh	wzr, [x19, 4]
-	.loc 2 2102 0
 	mov	w10, -1
-	.loc 2 2099 0
 	strb	wzr, [x19, 7]
-.LVL254:
 .L174:
-	.loc 2 2100 0 discriminator 1
 	cmp	w8, w5, uxth
 	bhi	.L176
-	.loc 2 2110 0
 	adrp	x1, .LANCHOR19
 	ldrb	w0, [x19, 7]
 	ldrh	w1, [x1, #:lo12:.LANCHOR19]
 	mul	w0, w0, w1
 	strh	w0, [x19, 4]
-	.loc 2 2111 0
 	mov	w0, 1
 	strb	w0, [x19, 9]
-	.loc 2 2113 0
 	mov	w0, 0
 	ldr	x19, [sp, 16]
-.LVL255:
 	ldp	x29, x30, [sp], 32
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_def_cfa 31, 0
 	ret
-.LVL256:
 .L176:
-	.cfi_restore_state
-	.loc 2 2101 0
 	ldrh	w1, [x19]
 	ldrb	w0, [x7, x5]
 	bl	V2P_block
-.LVL257:
 	mov	w4, w0
-.LVL258:
-	.loc 2 2102 0
 	strh	w10, [x6]
-	.loc 2 2103 0
 	bl	FtlBbmIsBadBlock
-.LVL259:
 	cbnz	w0, .L175
-	.loc 2 2104 0
 	strh	w4, [x6]
-	.loc 2 2105 0
 	ldrb	w0, [x19, 7]
 	add	w0, w0, 1
 	strb	w0, [x19, 7]
 .L175:
-.LVL260:
 	add	x5, x5, 1
-.LVL261:
 	add	x6, x6, 2
 	b	.L174
-	.cfi_endproc
-.LFE284:
 	.size	make_superblock, .-make_superblock
 	.section	.text.update_multiplier_value,"ax",@progbits
 	.align	2
 	.global	update_multiplier_value
 	.type	update_multiplier_value, %function
 update_multiplier_value:
-.LFB293:
-	.loc 2 2454 0
-	.cfi_startproc
-.LVL262:
 	and	w6, w0, 65535
-	.loc 2 2458 0
 	adrp	x0, .LANCHOR3
-.LVL263:
 	mov	x7, 0
-	.loc 2 2459 0
 	adrp	x8, .LANCHOR13
-	.loc 2 2458 0
 	ldrh	w10, [x0, #:lo12:.LANCHOR3]
-	.loc 2 2461 0
 	adrp	x0, .LANCHOR19
-	.loc 2 2456 0
 	mov	w5, 0
-	.loc 2 2459 0
 	add	x8, x8, :lo12:.LANCHOR13
-.LVL264:
-	.loc 2 2461 0
 	ldrh	w11, [x0, #:lo12:.LANCHOR19]
-	.loc 2 2458 0
 	cmp	w10, w7, uxth
 	bhi	.L190
-	.loc 2 2463 0
 	cbz	w5, .L188
-	.loc 2 2464 0
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.LVL265:
 .L189:
-	.loc 2 2465 0
 	adrp	x0, .LANCHOR40
 	mov	w1, 6
 	ldr	x0, [x0, #:lo12:.LANCHOR40]
 	umaddl	x6, w6, w1, x0
-.LVL266:
-	.loc 2 2467 0
 	mov	w0, 0
-	.loc 2 2465 0
 	strh	w5, [x6, 4]
-	.loc 2 2467 0
 	ret
-.LVL267:
 .L183:
-	.cfi_def_cfa 29, 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
 	mov	w5, 0
-.LVL268:
 	b	.L182
-.LVL269:
 .L188:
-	.cfi_def_cfa 31, 0
-	.cfi_restore 29
-	.cfi_restore 30
 	mov	w5, 0
 	b	.L189
 .L190:
-	.loc 2 2454 0
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 .L181:
-	.loc 2 2459 0
 	ldrb	w0, [x8, x7]
 	mov	w1, w6
 	bl	V2P_block
-.LVL270:
-	.loc 2 2460 0
 	bl	FtlBbmIsBadBlock
-.LVL271:
 	cbnz	w0, .L180
-	.loc 2 2461 0
 	add	w5, w5, w11
-.LVL272:
 	and	w5, w5, 65535
-.LVL273:
 .L180:
 	add	x7, x7, 1
-.LVL274:
-	.loc 2 2458 0 discriminator 2
 	cmp	w10, w7, uxth
 	bhi	.L181
-	.loc 2 2463 0
 	cbz	w5, .L183
-	.loc 2 2464 0
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.LVL275:
 .L182:
-	.loc 2 2465 0
 	adrp	x0, .LANCHOR40
 	mov	w1, 6
 	ldr	x0, [x0, #:lo12:.LANCHOR40]
 	umaddl	x6, w6, w1, x0
-	.loc 2 2467 0
 	mov	w0, 0
-	.loc 2 2465 0
 	strh	w5, [x6, 4]
-	.loc 2 2467 0
 	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE293:
 	.size	update_multiplier_value, .-update_multiplier_value
 	.section	.text.GetFreeBlockMinEraseCount,"ax",@progbits
 	.align	2
 	.global	GetFreeBlockMinEraseCount
 	.type	GetFreeBlockMinEraseCount, %function
 GetFreeBlockMinEraseCount:
-.LFB294:
-	.loc 2 2470 0
-	.cfi_startproc
-.LVL276:
-	.loc 2 2473 0
 	adrp	x0, .LANCHOR47
 	ldr	x0, [x0, #:lo12:.LANCHOR47]
 	cbz	x0, .L193
-	.loc 2 2474 0
 	adrp	x1, .LANCHOR40
 	ldr	x1, [x1, #:lo12:.LANCHOR40]
 	sub	x0, x0, x1
@@ -2645,49 +1470,29 @@ GetFreeBlockMinEraseCount:
 	ldr	x1, [x1, #:lo12:.LANCHOR43]
 	and	x0, x0, 65535
 	ldrh	w0, [x1, x0, lsl 1]
-.LVL277:
 	ret
-.LVL278:
 .L193:
-	.loc 2 2471 0
 	mov	w0, 0
-.LVL279:
-	.loc 2 2476 0
 	ret
-	.cfi_endproc
-.LFE294:
 	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
 	.section	.text.GetFreeBlockMaxEraseCount,"ax",@progbits
 	.align	2
 	.global	GetFreeBlockMaxEraseCount
 	.type	GetFreeBlockMaxEraseCount, %function
 GetFreeBlockMaxEraseCount:
-.LFB295:
-	.loc 2 2479 0
-	.cfi_startproc
-.LVL280:
-	.loc 2 2484 0
 	adrp	x1, .LANCHOR47
-	.loc 2 2479 0
 	and	w0, w0, 65535
-	.loc 2 2484 0
 	ldr	x1, [x1, #:lo12:.LANCHOR47]
 	cbz	x1, .L201
-	.loc 2 2485 0
 	adrp	x2, .LANCHOR48
 	mov	w3, 7
-	.loc 2 2489 0
 	mov	w5, 6
 	mov	w6, 65535
-	.loc 2 2485 0
 	ldrh	w2, [x2, #:lo12:.LANCHOR48]
 	mul	w2, w2, w3
 	asr	w2, w2, 3
-	.loc 2 2486 0
 	cmp	w0, w2
 	csel	w0, w2, w0, gt
-.LVL281:
-	.loc 2 2487 0
 	adrp	x2, .LANCHOR40
 	ldr	x3, [x2, #:lo12:.LANCHOR40]
 	mov	x2, -6148914691236517206
@@ -2695,204 +1500,121 @@ GetFreeBlockMaxEraseCount:
 	sub	x1, x1, x3
 	asr	x1, x1, 1
 	mul	x1, x1, x2
-	.loc 2 2488 0
 	mov	w2, 0
-	.loc 2 2487 0
 	and	w1, w1, 65535
-.LVL282:
 .L197:
-	.loc 2 2488 0 discriminator 1
 	cmp	w0, w2
 	beq	.L200
-	.loc 2 2489 0
 	umull	x4, w1, w5
 	ldrh	w4, [x3, x4]
 	cmp	w4, w6
 	bne	.L198
 .L200:
-	.loc 2 2493 0
 	adrp	x0, .LANCHOR43
-.LVL283:
 	ubfiz	x1, x1, 1, 16
-.LVL284:
 	ldr	x0, [x0, #:lo12:.LANCHOR43]
 	ldrh	w0, [x0, x1]
-.LVL285:
 	ret
-.LVL286:
 .L198:
-	.loc 2 2488 0 discriminator 2
 	add	w2, w2, 1
-.LVL287:
 	mov	w1, w4
 	and	w2, w2, 65535
-.LVL288:
 	b	.L197
-.LVL289:
 .L201:
-	.loc 2 2480 0
 	mov	w0, 0
-.LVL290:
-	.loc 2 2496 0
 	ret
-	.cfi_endproc
-.LFE295:
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
 	.section	.text.FtlPrintInfo2buf,"ax",@progbits
 	.align	2
 	.global	FtlPrintInfo2buf
 	.type	FtlPrintInfo2buf, %function
 FtlPrintInfo2buf:
-.LFB200:
-	.loc 3 12 0
-	.cfi_startproc
-.LVL291:
 	stp	x29, x30, [sp, -96]!
-	.cfi_def_cfa_offset 96
-	.cfi_offset 29, -96
-	.cfi_offset 30, -88
-	.loc 3 16 0
 	adrp	x1, .LC2
 	add	x1, x1, :lo12:.LC2
-	.loc 3 12 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -80
-	.cfi_offset 20, -72
-	.loc 3 31 0
 	adrp	x19, .LANCHOR37
-	.loc 3 12 0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -64
-	.cfi_offset 22, -56
 	mov	x21, x0
-.LVL292:
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -48
-	.cfi_offset 24, -40
-	.loc 3 32 0
 	adrp	x23, .LANCHOR48
-	.loc 3 12 0
 	stp	x25, x26, [sp, 64]
-	.loc 3 39 0
 	adrp	x22, .LANCHOR39
-	.loc 3 12 0
 	str	x27, [sp, 80]
-	.cfi_offset 25, -32
-	.cfi_offset 26, -24
-	.cfi_offset 27, -16
-	.loc 3 16 0
 	bl	sprintf
-.LVL293:
 	add	x20, x21, x0, sxtw
-.LVL294:
-	.loc 3 17 0
 	adrp	x0, .LANCHOR26
 	adrp	x1, .LC3
 	add	x1, x1, :lo12:.LC3
 	ldr	w2, [x0, #:lo12:.LANCHOR26]
 	mov	x0, x20
-	.loc 3 39 0
 	add	x22, x22, :lo12:.LANCHOR39
-	.loc 3 50 0
 	adrp	x24, .LANCHOR51
-	.loc 3 67 0
 	adrp	x25, .LANCHOR80
-	.loc 3 17 0
 	bl	sprintf
-.LVL295:
 	add	x20, x20, x0, sxtw
-.LVL296:
-	.loc 3 18 0
 	mov	x0, x20
 	adrp	x1, .LC4
 	add	x1, x1, :lo12:.LC4
 	bl	sprintf
-.LVL297:
 	add	x20, x20, x0, sxtw
-.LVL298:
-	.loc 3 19 0
 	adrp	x0, .LANCHOR61
 	adrp	x1, .LC5
 	add	x1, x1, :lo12:.LC5
 	ldr	w2, [x0, #:lo12:.LANCHOR61]
 	mov	x0, x20
 	bl	sprintf
-.LVL299:
 	add	x20, x20, x0, sxtw
-.LVL300:
-	.loc 3 20 0
 	adrp	x0, .LANCHOR59
 	adrp	x1, .LC6
 	add	x1, x1, :lo12:.LC6
 	ldr	w2, [x0, #:lo12:.LANCHOR59]
 	mov	x0, x20
 	bl	sprintf
-.LVL301:
 	add	x20, x20, x0, sxtw
-.LVL302:
-	.loc 3 21 0
 	adrp	x0, .LANCHOR62
 	adrp	x1, .LC7
 	add	x1, x1, :lo12:.LC7
 	ldr	w2, [x0, #:lo12:.LANCHOR62]
 	mov	x0, x20
 	bl	sprintf
-.LVL303:
 	add	x20, x20, x0, sxtw
-.LVL304:
-	.loc 3 22 0
 	adrp	x0, .LANCHOR63
 	adrp	x1, .LC8
 	add	x1, x1, :lo12:.LC8
 	ldr	w2, [x0, #:lo12:.LANCHOR63]
 	mov	x0, x20
 	bl	sprintf
-.LVL305:
 	add	x20, x20, x0, sxtw
-.LVL306:
-	.loc 3 23 0
 	adrp	x0, .LANCHOR64
 	adrp	x1, .LC9
 	add	x1, x1, :lo12:.LC9
 	ldr	w2, [x0, #:lo12:.LANCHOR64]
 	mov	x0, x20
 	bl	sprintf
-.LVL307:
 	add	x20, x20, x0, sxtw
-.LVL308:
-	.loc 3 24 0
 	adrp	x0, .LANCHOR65
 	adrp	x1, .LC10
 	add	x1, x1, :lo12:.LC10
 	ldr	w2, [x0, #:lo12:.LANCHOR65]
 	mov	x0, x20
 	bl	sprintf
-.LVL309:
 	add	x20, x20, x0, sxtw
-.LVL310:
-	.loc 3 25 0
 	adrp	x0, .LANCHOR66
 	adrp	x1, .LC11
 	add	x1, x1, :lo12:.LC11
 	ldr	w2, [x0, #:lo12:.LANCHOR66]
 	mov	x0, x20
 	bl	sprintf
-.LVL311:
 	add	x20, x20, x0, sxtw
-.LVL312:
-	.loc 3 26 0
 	adrp	x0, .LANCHOR67
 	adrp	x1, .LC12
 	add	x1, x1, :lo12:.LC12
 	ldr	w2, [x0, #:lo12:.LANCHOR67]
 	mov	x0, x20
 	bl	sprintf
-.LVL313:
 	add	x20, x20, x0, sxtw
-.LVL314:
-	.loc 3 27 0
 	adrp	x0, .LANCHOR68
 	adrp	x1, .LC13
 	add	x1, x1, :lo12:.LC13
@@ -2900,10 +1622,7 @@ FtlPrintInfo2buf:
 	mov	x0, x20
 	lsr	w2, w2, 11
 	bl	sprintf
-.LVL315:
 	add	x20, x20, x0, sxtw
-.LVL316:
-	.loc 3 28 0
 	adrp	x0, .LANCHOR69
 	adrp	x1, .LC14
 	add	x1, x1, :lo12:.LC14
@@ -2911,573 +1630,375 @@ FtlPrintInfo2buf:
 	mov	x0, x20
 	lsr	w2, w2, 11
 	bl	sprintf
-.LVL317:
 	add	x20, x20, x0, sxtw
-.LVL318:
-	.loc 3 29 0
 	adrp	x0, .LANCHOR70
 	adrp	x1, .LC15
 	add	x1, x1, :lo12:.LC15
 	ldr	w2, [x0, #:lo12:.LANCHOR70]
 	mov	x0, x20
 	bl	sprintf
-.LVL319:
 	add	x20, x20, x0, sxtw
-.LVL320:
-	.loc 3 30 0
 	adrp	x0, .LANCHOR71
 	adrp	x1, .LC16
 	add	x1, x1, :lo12:.LC16
 	ldr	w2, [x0, #:lo12:.LANCHOR71]
 	mov	x0, x20
 	bl	sprintf
-.LVL321:
 	add	x20, x20, x0, sxtw
-.LVL322:
-	.loc 3 31 0
 	add	x0, x19, :lo12:.LANCHOR37
 	adrp	x1, .LC17
 	add	x1, x1, :lo12:.LC17
 	ldrh	w2, [x0, 6]
 	mov	x0, x20
 	bl	sprintf
-.LVL323:
 	add	x20, x20, x0, sxtw
-.LVL324:
-	.loc 3 32 0
 	ldrh	w2, [x23, #:lo12:.LANCHOR48]
 	mov	x0, x20
 	adrp	x1, .LC18
 	add	x1, x1, :lo12:.LC18
 	bl	sprintf
-.LVL325:
 	add	x20, x20, x0, sxtw
-.LVL326:
-	.loc 3 33 0
 	adrp	x0, .LANCHOR72
 	adrp	x1, .LC19
 	add	x1, x1, :lo12:.LC19
 	ldr	w2, [x0, #:lo12:.LANCHOR72]
 	mov	x0, x20
 	bl	sprintf
-.LVL327:
 	add	x20, x20, x0, sxtw
-.LVL328:
-	.loc 3 34 0
 	adrp	x0, .LANCHOR73
 	adrp	x1, .LC20
 	add	x1, x1, :lo12:.LC20
 	ldr	w2, [x0, #:lo12:.LANCHOR73]
 	mov	x0, x20
 	bl	sprintf
-.LVL329:
 	add	x20, x20, x0, sxtw
-.LVL330:
-	.loc 3 35 0
 	adrp	x0, .LANCHOR74
 	adrp	x1, .LC21
 	add	x1, x1, :lo12:.LC21
 	ldr	w2, [x0, #:lo12:.LANCHOR74]
 	mov	x0, x20
 	bl	sprintf
-.LVL331:
 	add	x20, x20, x0, sxtw
-.LVL332:
-	.loc 3 36 0
 	adrp	x0, .LANCHOR75
 	adrp	x1, .LC22
 	add	x1, x1, :lo12:.LC22
 	ldr	w2, [x0, #:lo12:.LANCHOR75]
 	mov	x0, x20
 	bl	sprintf
-.LVL333:
 	add	x20, x20, x0, sxtw
-.LVL334:
-	.loc 3 37 0
 	adrp	x0, .LANCHOR76
 	adrp	x1, .LC23
 	add	x1, x1, :lo12:.LC23
 	ldr	w2, [x0, #:lo12:.LANCHOR76]
 	mov	x0, x20
 	bl	sprintf
-.LVL335:
 	add	x20, x20, x0, sxtw
-.LVL336:
-	.loc 3 38 0
 	adrp	x0, .LANCHOR77
 	adrp	x1, .LC24
 	add	x1, x1, :lo12:.LC24
 	ldr	w2, [x0, #:lo12:.LANCHOR77]
 	mov	x0, x20
 	bl	sprintf
-.LVL337:
 	add	x20, x20, x0, sxtw
-.LVL338:
-	.loc 3 39 0
 	ldrh	w2, [x22, 30]
 	mov	x0, x20
 	adrp	x1, .LC25
 	add	x1, x1, :lo12:.LC25
 	bl	sprintf
-.LVL339:
 	add	x20, x20, x0, sxtw
-.LVL340:
-	.loc 3 40 0
 	ldrh	w2, [x22, 28]
 	mov	x0, x20
 	adrp	x1, .LC26
 	add	x1, x1, :lo12:.LC26
-	.loc 3 55 0
 	adrp	x22, .LANCHOR42
-	.loc 3 40 0
 	bl	sprintf
-.LVL341:
 	add	x20, x20, x0, sxtw
-.LVL342:
-	.loc 3 41 0
 	adrp	x0, .LANCHOR34
 	adrp	x1, .LC27
 	add	x1, x1, :lo12:.LC27
 	ldr	w2, [x0, #:lo12:.LANCHOR34]
 	mov	x0, x20
 	bl	sprintf
-.LVL343:
 	add	x20, x20, x0, sxtw
-.LVL344:
-	.loc 3 42 0
 	adrp	x0, .LANCHOR31
 	adrp	x1, .LC28
 	add	x1, x1, :lo12:.LC28
 	ldr	w2, [x0, #:lo12:.LANCHOR31]
 	mov	x0, x20
 	bl	sprintf
-.LVL345:
 	add	x20, x20, x0, sxtw
-.LVL346:
-	.loc 3 43 0
 	adrp	x0, .LANCHOR2
 	adrp	x1, .LC29
 	add	x1, x1, :lo12:.LC29
 	ldr	w2, [x0, #:lo12:.LANCHOR2]
 	mov	x0, x20
 	bl	sprintf
-.LVL347:
 	add	x20, x20, x0, sxtw
-.LVL348:
-	.loc 3 44 0
 	adrp	x0, .LANCHOR38+6
 	adrp	x1, .LC30
 	add	x1, x1, :lo12:.LC30
 	ldrh	w2, [x0, #:lo12:.LANCHOR38+6]
 	mov	x0, x20
 	bl	sprintf
-.LVL349:
 	add	x20, x20, x0, sxtw
-.LVL350:
-	.loc 3 45 0
 	adrp	x0, .LANCHOR5
 	adrp	x1, .LC31
 	add	x1, x1, :lo12:.LC31
 	ldrh	w2, [x0, #:lo12:.LANCHOR5]
 	mov	x0, x20
 	bl	sprintf
-.LVL351:
 	add	x20, x20, x0, sxtw
-.LVL352:
-	.loc 3 46 0
 	adrp	x0, .LANCHOR78
 	adrp	x1, .LC32
 	add	x1, x1, :lo12:.LC32
 	ldrh	w2, [x0, #:lo12:.LANCHOR78]
 	mov	x0, x20
 	bl	sprintf
-.LVL353:
 	add	x20, x20, x0, sxtw
-.LVL354:
-	.loc 3 47 0
 	adrp	x0, .LANCHOR7
 	adrp	x1, .LC33
 	add	x1, x1, :lo12:.LC33
 	ldr	w2, [x0, #:lo12:.LANCHOR7]
 	mov	x0, x20
 	bl	sprintf
-.LVL355:
 	add	x20, x20, x0, sxtw
-.LVL356:
-	.loc 3 48 0
 	adrp	x0, .LANCHOR79
 	adrp	x1, .LC34
 	add	x1, x1, :lo12:.LC34
 	ldrh	w2, [x0, #:lo12:.LANCHOR79]
 	mov	x0, x20
 	bl	sprintf
-.LVL357:
 	add	x20, x20, x0, sxtw
-.LVL358:
-	.loc 3 49 0
 	ldrh	w2, [x19, #:lo12:.LANCHOR37]
-	.loc 3 50 0
 	add	x19, x24, :lo12:.LANCHOR51
-	.loc 3 49 0
 	mov	x0, x20
 	adrp	x1, .LC35
 	add	x1, x1, :lo12:.LC35
 	bl	sprintf
-.LVL359:
 	add	x20, x20, x0, sxtw
-.LVL360:
-	.loc 3 50 0
 	ldrh	w2, [x19, 2]
 	mov	x0, x20
 	adrp	x1, .LC36
 	add	x1, x1, :lo12:.LC36
 	bl	sprintf
-.LVL361:
 	add	x20, x20, x0, sxtw
-.LVL362:
-	.loc 3 51 0
 	ldrb	w2, [x19, 6]
 	mov	x0, x20
 	adrp	x1, .LC37
 	add	x1, x1, :lo12:.LC37
 	bl	sprintf
-.LVL363:
 	add	x20, x20, x0, sxtw
-.LVL364:
-	.loc 3 52 0
 	ldrh	w2, [x24, #:lo12:.LANCHOR51]
 	mov	x0, x20
 	adrp	x1, .LC38
 	add	x1, x1, :lo12:.LC38
 	bl	sprintf
-.LVL365:
 	add	x20, x20, x0, sxtw
-.LVL366:
-	.loc 3 53 0
 	ldrb	w2, [x19, 8]
 	mov	x0, x20
 	adrp	x1, .LC39
 	add	x1, x1, :lo12:.LC39
 	bl	sprintf
-.LVL367:
 	add	x20, x20, x0, sxtw
-.LVL368:
-	.loc 3 54 0
 	ldrh	w2, [x19, 4]
 	mov	x0, x20
 	adrp	x1, .LC40
 	add	x1, x1, :lo12:.LC40
 	bl	sprintf
-.LVL369:
 	add	x20, x20, x0, sxtw
-.LVL370:
-	.loc 3 55 0
 	ldrh	w1, [x24, #:lo12:.LANCHOR51]
-	.loc 3 56 0
 	adrp	x24, .LANCHOR52
-	.loc 3 55 0
 	ldr	x0, [x22, #:lo12:.LANCHOR42]
-	.loc 3 56 0
 	add	x19, x24, :lo12:.LANCHOR52
-	.loc 3 55 0
 	ldrh	w2, [x0, x1, lsl 1]
 	mov	x0, x20
 	adrp	x1, .LC41
 	add	x1, x1, :lo12:.LC41
 	bl	sprintf
-.LVL371:
 	add	x20, x20, x0, sxtw
-.LVL372:
-	.loc 3 56 0
 	ldrh	w2, [x19, 2]
 	mov	x0, x20
 	adrp	x1, .LC42
 	add	x1, x1, :lo12:.LC42
 	bl	sprintf
-.LVL373:
 	add	x20, x20, x0, sxtw
-.LVL374:
-	.loc 3 57 0
 	ldrb	w2, [x19, 6]
 	mov	x0, x20
 	adrp	x1, .LC43
 	add	x1, x1, :lo12:.LC43
 	bl	sprintf
-.LVL375:
 	add	x20, x20, x0, sxtw
-.LVL376:
-	.loc 3 58 0
 	ldrh	w2, [x24, #:lo12:.LANCHOR52]
 	mov	x0, x20
 	adrp	x1, .LC44
 	add	x1, x1, :lo12:.LC44
 	bl	sprintf
-.LVL377:
 	add	x20, x20, x0, sxtw
-.LVL378:
-	.loc 3 59 0
 	ldrb	w2, [x19, 8]
 	mov	x0, x20
 	adrp	x1, .LC45
 	add	x1, x1, :lo12:.LC45
 	bl	sprintf
-.LVL379:
 	add	x20, x20, x0, sxtw
-.LVL380:
-	.loc 3 60 0
 	ldrh	w2, [x19, 4]
 	mov	x0, x20
 	adrp	x1, .LC46
 	add	x1, x1, :lo12:.LC46
 	bl	sprintf
-.LVL381:
 	add	x20, x20, x0, sxtw
-.LVL382:
-	.loc 3 61 0
 	ldrh	w1, [x24, #:lo12:.LANCHOR52]
-	.loc 3 62 0
 	adrp	x24, .LANCHOR53
-	.loc 3 61 0
 	ldr	x0, [x22, #:lo12:.LANCHOR42]
-	.loc 3 62 0
 	add	x19, x24, :lo12:.LANCHOR53
-	.loc 3 61 0
 	ldrh	w2, [x0, x1, lsl 1]
 	mov	x0, x20
 	adrp	x1, .LC47
 	add	x1, x1, :lo12:.LC47
 	bl	sprintf
-.LVL383:
 	add	x20, x20, x0, sxtw
-.LVL384:
-	.loc 3 62 0
 	ldrh	w2, [x19, 2]
 	mov	x0, x20
 	adrp	x1, .LC48
 	add	x1, x1, :lo12:.LC48
 	bl	sprintf
-.LVL385:
 	add	x20, x20, x0, sxtw
-.LVL386:
-	.loc 3 63 0
 	ldrb	w2, [x19, 6]
 	mov	x0, x20
 	adrp	x1, .LC49
 	add	x1, x1, :lo12:.LC49
 	bl	sprintf
-.LVL387:
 	add	x20, x20, x0, sxtw
-.LVL388:
-	.loc 3 64 0
 	ldrh	w2, [x24, #:lo12:.LANCHOR53]
 	mov	x0, x20
 	adrp	x1, .LC50
 	add	x1, x1, :lo12:.LC50
-	.loc 3 72 0
 	adrp	x24, .LANCHOR81
 	add	x24, x24, :lo12:.LANCHOR81
-	.loc 3 64 0
 	bl	sprintf
-.LVL389:
 	add	x20, x20, x0, sxtw
-.LVL390:
-	.loc 3 65 0
 	ldrb	w2, [x19, 8]
 	mov	x0, x20
 	adrp	x1, .LC51
 	add	x1, x1, :lo12:.LC51
 	bl	sprintf
-.LVL391:
 	add	x20, x20, x0, sxtw
-.LVL392:
-	.loc 3 66 0
 	ldrh	w2, [x19, 4]
-	.loc 3 67 0
 	add	x19, x25, :lo12:.LANCHOR80
-	.loc 3 66 0
 	mov	x0, x20
 	adrp	x1, .LC52
 	add	x1, x1, :lo12:.LC52
 	bl	sprintf
-.LVL393:
 	add	x20, x20, x0, sxtw
-.LVL394:
-	.loc 3 67 0
 	ldrh	w2, [x19, 2]
 	mov	x0, x20
 	adrp	x1, .LC53
 	add	x1, x1, :lo12:.LC53
 	bl	sprintf
-.LVL395:
 	add	x20, x20, x0, sxtw
-.LVL396:
-	.loc 3 68 0
 	ldrb	w2, [x19, 6]
 	mov	x0, x20
 	adrp	x1, .LC54
 	add	x1, x1, :lo12:.LC54
 	bl	sprintf
-.LVL397:
 	add	x20, x20, x0, sxtw
-.LVL398:
-	.loc 3 69 0
 	ldrh	w2, [x25, #:lo12:.LANCHOR80]
 	mov	x0, x20
 	adrp	x1, .LC55
 	add	x1, x1, :lo12:.LC55
 	bl	sprintf
-.LVL399:
 	add	x20, x20, x0, sxtw
-.LVL400:
-	.loc 3 70 0
 	ldrb	w2, [x19, 8]
 	mov	x0, x20
 	adrp	x1, .LC56
 	add	x1, x1, :lo12:.LC56
 	bl	sprintf
-.LVL401:
 	add	x20, x20, x0, sxtw
-.LVL402:
-	.loc 3 71 0
 	ldrh	w2, [x19, 4]
 	mov	x0, x20
 	adrp	x1, .LC57
 	add	x1, x1, :lo12:.LC57
 	bl	sprintf
-.LVL403:
 	add	x20, x20, x0, sxtw
-.LVL404:
-	.loc 3 72 0
 	ldp	w4, w2, [x24, 76]
 	adrp	x1, .LC58
 	ldr	w3, [x24, 84]
 	add	x1, x1, :lo12:.LC58
 	mov	x0, x20
 	bl	sprintf
-.LVL405:
 	add	x19, x20, x0, sxtw
-.LVL406:
-	.loc 3 73 0
 	ldr	w2, [x24, 72]
 	mov	x0, x19
 	adrp	x1, .LC59
 	add	x1, x1, :lo12:.LC59
 	bl	sprintf
-.LVL407:
 	add	x19, x19, x0, sxtw
-.LVL408:
-	.loc 3 74 0
 	ldr	w2, [x24, 96]
 	mov	x0, x19
 	adrp	x1, .LC60
 	add	x1, x1, :lo12:.LC60
 	bl	sprintf
-.LVL409:
 	add	x19, x19, x0, sxtw
-.LVL410:
-	.loc 3 75 0
 	adrp	x0, .LANCHOR82
 	adrp	x1, .LC61
 	add	x1, x1, :lo12:.LC61
 	ldrh	w2, [x0, #:lo12:.LANCHOR82]
 	mov	x0, x19
 	bl	sprintf
-.LVL411:
 	add	x19, x19, x0, sxtw
-.LVL412:
-	.loc 3 76 0
 	adrp	x0, .LANCHOR83
 	adrp	x1, .LC62
 	add	x1, x1, :lo12:.LC62
 	ldrh	w2, [x0, #:lo12:.LANCHOR83]
 	mov	x0, x19
 	bl	sprintf
-.LVL413:
 	add	x19, x19, x0, sxtw
-.LVL414:
-	.loc 3 77 0
 	adrp	x0, .LANCHOR84
 	adrp	x1, .LC63
 	add	x1, x1, :lo12:.LC63
 	ldr	w2, [x0, #:lo12:.LANCHOR84]
 	mov	x0, x19
 	bl	sprintf
-.LVL415:
 	add	x19, x19, x0, sxtw
-.LVL416:
-	.loc 3 78 0
 	adrp	x0, .LANCHOR85
 	adrp	x1, .LC64
 	add	x1, x1, :lo12:.LC64
 	ldrh	w2, [x0, #:lo12:.LANCHOR85]
 	mov	x0, x19
 	bl	sprintf
-.LVL417:
 	add	x19, x19, x0, sxtw
-.LVL418:
-	.loc 3 79 0
 	bl	GetFreeBlockMinEraseCount
-.LVL419:
 	and	w2, w0, 65535
 	adrp	x1, .LC65
 	mov	x0, x19
 	add	x1, x1, :lo12:.LC65
 	bl	sprintf
-.LVL420:
 	add	x19, x19, x0, sxtw
-.LVL421:
-	.loc 3 80 0
 	ldrh	w0, [x23, #:lo12:.LANCHOR48]
 	bl	GetFreeBlockMaxEraseCount
-.LVL422:
 	and	w2, w0, 65535
 	adrp	x1, .LC66
 	mov	x0, x19
 	add	x1, x1, :lo12:.LC66
 	bl	sprintf
-.LVL423:
 	add	x19, x19, x0, sxtw
-.LVL424:
-	.loc 3 81 0
 	adrp	x0, .LANCHOR86
 	ldr	w0, [x0, #:lo12:.LANCHOR86]
 	cmp	w0, 1
 	beq	.L203
 .L208:
-	.loc 3 104 0
 	sub	w0, w19, w21
-	.loc 3 105 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
-.LVL425:
 	ldp	x21, x22, [sp, 32]
-.LVL426:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL427:
 .L203:
-	.cfi_restore_state
-	.loc 3 84 0
 	ldrh	w0, [x25, #:lo12:.LANCHOR80]
 	mov	w1, 65535
 	cmp	w0, w1
 	beq	.L205
-	.loc 3 85 0
 	ldr	x1, [x22, #:lo12:.LANCHOR42]
 	ubfiz	x0, x0, 1, 16
 	ldrh	w2, [x1, x0]
@@ -3485,36 +2006,20 @@ FtlPrintInfo2buf:
 	adrp	x1, .LC67
 	add	x1, x1, :lo12:.LC67
 	bl	sprintf
-.LVL428:
 	add	x19, x19, x0, sxtw
-.LVL429:
 .L205:
-.LBB217:
-	.loc 3 87 0
 	mov	w0, 0
-	.loc 3 91 0
 	adrp	x24, .LC68
-	.loc 3 87 0
 	bl	List_get_gc_head_node
-.LVL430:
-	.loc 3 91 0
 	add	x24, x24, :lo12:.LC68
-	.loc 3 87 0
 	and	w3, w0, 65535
-.LVL431:
-	.loc 3 88 0
 	mov	w23, 0
-	.loc 3 89 0
 	mov	w27, 65535
 	adrp	x20, .LANCHOR40
-	.loc 3 91 0
 	mov	w26, 6
-.LVL432:
 .L207:
-	.loc 3 89 0
 	cmp	w3, w27
 	beq	.L206
-	.loc 3 91 0 discriminator 2
 	adrp	x0, .LANCHOR43
 	umull	x25, w3, w26
 	ldr	x2, [x22, #:lo12:.LANCHOR42]
@@ -3528,57 +2033,32 @@ FtlPrintInfo2buf:
 	ldrh	w5, [x0, 4]
 	mov	x1, x24
 	mov	x0, x19
-	.loc 3 88 0 discriminator 2
 	add	w23, w23, 1
-.LVL433:
-	.loc 3 91 0 discriminator 2
 	bl	sprintf
-.LVL434:
 	add	x19, x19, x0, sxtw
-.LVL435:
-	.loc 3 92 0 discriminator 2
 	ldr	x0, [x20, #:lo12:.LANCHOR40]
-	.loc 3 88 0 discriminator 2
 	cmp	w23, 16
-	.loc 3 92 0 discriminator 2
 	ldrh	w3, [x0, x25]
-.LVL436:
-	.loc 3 88 0 discriminator 2
 	bne	.L207
 .L206:
-.LBE217:
-.LBB218:
-	.loc 3 96 0
 	adrp	x0, .LANCHOR47
-	.loc 3 100 0
 	adrp	x23, .LC69
-.LVL437:
 	add	x23, x23, :lo12:.LC69
-	.loc 3 97 0
 	mov	w22, 0
-	.loc 3 96 0
 	ldr	x3, [x0, #:lo12:.LANCHOR47]
-.LVL438:
-	.loc 3 98 0
 	mov	w25, 65535
-	.loc 3 96 0
 	ldr	x0, [x20, #:lo12:.LANCHOR40]
-	.loc 3 100 0
 	mov	w26, 6
 	adrp	x27, .LANCHOR43
-	.loc 3 96 0
 	sub	x3, x3, x0
 	mov	x0, -6148914691236517206
 	asr	x3, x3, 1
 	movk	x0, 0xaaab, lsl 0
 	mul	x3, x3, x0
 	and	w3, w3, 65535
-.LVL439:
 .L209:
-	.loc 3 98 0
 	cmp	w3, w25
 	beq	.L208
-	.loc 3 100 0 discriminator 2
 	umull	x24, w3, w26
 	ldr	x0, [x20, #:lo12:.LANCHOR40]
 	ldr	x2, [x27, #:lo12:.LANCHOR43]
@@ -3589,137 +2069,70 @@ FtlPrintInfo2buf:
 	ldrh	w4, [x0, 4]
 	mov	x1, x23
 	mov	x0, x19
-	.loc 3 97 0 discriminator 2
 	add	w22, w22, 1
-.LVL440:
-	.loc 3 100 0 discriminator 2
 	bl	sprintf
-.LVL441:
 	add	x19, x19, x0, sxtw
-.LVL442:
-	.loc 3 97 0 discriminator 2
 	cmp	w22, 4
 	beq	.L208
-	.loc 3 101 0
 	ldr	x0, [x20, #:lo12:.LANCHOR40]
 	ldrh	w3, [x0, x24]
 	b	.L209
-.LBE218:
-	.cfi_endproc
-.LFE200:
 	.size	FtlPrintInfo2buf, .-FtlPrintInfo2buf
 	.section	.text.rknand_proc_ftlread,"ax",@progbits
 	.align	2
 	.global	rknand_proc_ftlread
 	.type	rknand_proc_ftlread, %function
 rknand_proc_ftlread:
-.LFB201:
-	.loc 3 114 0
-	.cfi_startproc
-.LVL443:
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 3 120 0
 	adrp	x2, .LC70
 	adrp	x1, .LC71
 	add	x2, x2, :lo12:.LC70
-	.loc 3 114 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 3 120 0
 	add	x1, x1, :lo12:.LC71
-	.loc 3 114 0
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -16
-	.cfi_offset 20, -8
-	.loc 3 114 0
 	mov	x20, x0
-.LVL444:
-	.loc 3 120 0
 	bl	sprintf
-.LVL445:
 	add	x19, x20, x0, sxtw
-.LVL446:
-	.loc 3 122 0
 	mov	x0, x19
 	bl	FtlPrintInfo2buf
-.LVL447:
 	add	x0, x19, x0, sxtw
-.LVL448:
-	.loc 3 124 0
 	sub	w0, w0, w20
-.LVL449:
 	ldp	x19, x20, [sp, 16]
-.LVL450:
 	ldp	x29, x30, [sp], 32
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE201:
 	.size	rknand_proc_ftlread, .-rknand_proc_ftlread
 	.section	.text.GetSwlReplaceBlock,"ax",@progbits
 	.align	2
 	.global	GetSwlReplaceBlock
 	.type	GetSwlReplaceBlock, %function
 GetSwlReplaceBlock:
-.LFB296:
-	.loc 2 2500 0
-	.cfi_startproc
-.LVL451:
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 2 2510 0
 	adrp	x2, .LANCHOR74
 	adrp	x8, .LANCHOR77
-	.loc 2 2500 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	str	x19, [sp, 16]
-	.cfi_offset 19, -16
-	.loc 2 2510 0
 	ldr	w3, [x2, #:lo12:.LANCHOR74]
 	ldr	w7, [x8, #:lo12:.LANCHOR77]
 	cmp	w3, w7
 	bcs	.L218
-	.loc 2 2513 0
 	adrp	x1, .LANCHOR5
-	.loc 2 2512 0
 	adrp	x0, .LANCHOR72
-	.loc 2 2513 0
 	mov	w5, 0
 	mov	w4, 0
 	ldrh	w3, [x1, #:lo12:.LANCHOR5]
-	.loc 2 2514 0
 	adrp	x1, .LANCHOR43
-	.loc 2 2512 0
 	str	wzr, [x0, #:lo12:.LANCHOR72]
-.LVL452:
-	.loc 2 2514 0
 	ldr	x6, [x1, #:lo12:.LANCHOR43]
-	.loc 2 2513 0
 	mov	x1, 0
-.LVL453:
 .L219:
-	.loc 2 2513 0 is_stmt 0 discriminator 1
 	cmp	w3, w1
 	bhi	.L220
 	cbz	w5, .L221
 	str	w4, [x0, #:lo12:.LANCHOR72]
 .L221:
-	.loc 2 2515 0 is_stmt 1
 	ldr	w1, [x0, #:lo12:.LANCHOR72]
-.LVL454:
 	udiv	w3, w1, w3
 	str	w3, [x2, #:lo12:.LANCHOR74]
-	.loc 2 2516 0
 	adrp	x3, .LANCHOR73
 	ldr	w3, [x3, #:lo12:.LANCHOR73]
 	sub	w1, w1, w3
@@ -3728,169 +2141,108 @@ GetSwlReplaceBlock:
 	udiv	w1, w1, w3
 	str	w1, [x0, #:lo12:.LANCHOR72]
 .L222:
-	.loc 2 2522 0
 	ldr	w10, [x2, #:lo12:.LANCHOR74]
 	add	w0, w7, 256
 	cmp	w0, w10
 	bls	.L227
-	.loc 2 2522 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR76
 	add	w0, w7, 768
 	ldr	w1, [x1, #:lo12:.LANCHOR76]
 	cmp	w0, w1
 	bls	.L227
-.LVL455:
 .L229:
-	.loc 2 2523 0 is_stmt 1
 	mov	w19, 65535
 .L228:
-	.loc 2 2569 0
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_def_cfa 31, 0
 	ret
-.LVL456:
 .L220:
-	.cfi_restore_state
-	.loc 2 2514 0 discriminator 3
 	ldrh	w5, [x6, x1, lsl 1]
 	add	x1, x1, 1
-.LVL457:
 	add	w4, w4, w5
 	mov	w5, 1
 	b	.L219
 .L218:
-	.loc 2 2517 0
 	adrp	x1, .LANCHOR76
 	ldr	w0, [x1, #:lo12:.LANCHOR76]
 	cmp	w3, w0
 	bls	.L222
-	.loc 2 2518 0
 	add	w0, w0, 1
 	str	w0, [x1, #:lo12:.LANCHOR76]
-.LVL458:
-	.loc 2 2520 0
 	adrp	x0, .LANCHOR43
-	.loc 2 2519 0
 	adrp	x1, .LANCHOR5
 	add	x1, x1, :lo12:.LANCHOR5
-	.loc 2 2520 0
 	ldr	x4, [x0, #:lo12:.LANCHOR43]
-	.loc 2 2519 0
 	mov	w0, 0
-.LVL459:
 .L224:
-	.loc 2 2519 0 is_stmt 0 discriminator 1
 	ldrh	w3, [x1]
 	cmp	w0, w3
 	bcs	.L222
-	.loc 2 2520 0 is_stmt 1 discriminator 3
 	ubfiz	x5, x0, 1, 32
-	.loc 2 2519 0 discriminator 3
 	add	w0, w0, 1
-.LVL460:
-	.loc 2 2520 0 discriminator 3
 	ldrh	w3, [x4, x5]
 	add	w3, w3, 1
 	strh	w3, [x4, x5]
 	b	.L224
-.LVL461:
 .L227:
-	.loc 2 2525 0
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	add	w0, w0, w0, lsl 1
 	lsr	w0, w0, 2
 	bl	GetFreeBlockMaxEraseCount
-.LVL462:
 	and	w6, w0, 65535
-.LVL463:
-	.loc 2 2526 0
 	add	w0, w7, 64
-.LVL464:
 	cmp	w6, w0
 	bcc	.L229
-	.loc 2 2529 0
 	adrp	x0, .LANCHOR41
 	ldr	x0, [x0, #:lo12:.LANCHOR41]
 	cbz	x0, .L229
-	.loc 2 2533 0
 	adrp	x1, .LANCHOR5
-	.loc 2 2537 0
 	mov	w3, 65535
-	.loc 2 2536 0
 	mov	x14, -6148914691236517206
-	.loc 2 2537 0
 	mov	w2, w3
-	.loc 2 2533 0
 	ldrh	w13, [x1, #:lo12:.LANCHOR5]
-	.loc 2 2536 0
 	adrp	x1, .LANCHOR40
-	.loc 2 2531 0
 	mov	w12, w3
-	.loc 2 2536 0
 	movk	x14, 0xaaab, lsl 0
 	ldr	x11, [x1, #:lo12:.LANCHOR40]
-	.loc 2 2537 0
 	adrp	x1, .LANCHOR43
-	.loc 2 2546 0
 	mov	w15, 6
-	.loc 2 2537 0
 	ldr	x4, [x1, #:lo12:.LANCHOR43]
 	mov	w1, 0
-.LVL465:
 .L230:
-	.loc 2 2531 0
 	ldrh	w5, [x0]
 	cmp	w5, w12
 	bne	.L233
 	mov	w19, w2
-.LVL466:
 .L232:
-	.loc 2 2549 0
 	mov	w0, 65535
 	cmp	w19, w0
 	beq	.L229
-	.loc 2 2551 0
 	ubfiz	x2, x19, 1, 32
 	ldrh	w5, [x4, x2]
-.LVL467:
-	.loc 2 2552 0
 	cmp	w7, w5
 	bcs	.L234
-	.loc 2 2554 0
 	bl	GetFreeBlockMinEraseCount
-.LVL468:
 	cmp	w7, w0, uxth
 	bcs	.L234
-	.loc 2 2555 0
 	str	w3, [x8, #:lo12:.LANCHOR77]
 .L234:
-	.loc 2 2557 0
 	cmp	w10, w5
 	bls	.L229
-	.loc 2 2557 0 is_stmt 0 discriminator 1
 	add	w0, w5, 128
 	cmp	w6, w0
 	ble	.L229
-	.loc 2 2559 0 is_stmt 1
 	add	w0, w5, 256
 	adrp	x1, .LANCHOR76
 	cmp	w10, w0
 	bhi	.L235
-	.loc 2 2559 0 is_stmt 0 discriminator 1
 	ldr	w3, [x1, #:lo12:.LANCHOR76]
-.LVL469:
 	add	w0, w5, 768
 	cmp	w0, w3
 	bcs	.L229
 .L235:
-	.loc 2 2561 0 is_stmt 1
 	adrp	x0, .LANCHOR42
 	ldr	w3, [x1, #:lo12:.LANCHOR76]
 	mov	w1, w19
@@ -3900,1210 +2252,659 @@ GetSwlReplaceBlock:
 	adrp	x0, .LC72
 	add	x0, x0, :lo12:.LC72
 	bl	printf
-.LVL470:
-	.loc 2 2562 0
 	adrp	x0, .LANCHOR87
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR87]
-	.loc 2 2563 0
 	b	.L228
-.LVL471:
 .L233:
-	.loc 2 2532 0
 	add	w1, w1, 1
-.LVL472:
 	and	w1, w1, 65535
-.LVL473:
-	.loc 2 2533 0
 	cmp	w1, w13
 	bhi	.L229
-	.loc 2 2535 0
 	ldrh	w16, [x0, 4]
 	cbz	w16, .L231
-	.loc 2 2536 0
 	sub	x0, x0, x11
-.LVL474:
 	asr	x0, x0, 1
 	mul	x0, x0, x14
 	and	w19, w0, 65535
-.LVL475:
-	.loc 2 2537 0
 	and	x0, x0, 65535
 	ldrh	w0, [x4, x0, lsl 1]
 	cmp	w7, w0
 	bcs	.L232
-	.loc 2 2541 0
 	cmp	w3, w0
 	bls	.L231
 	mov	w3, w0
-.LVL476:
-	.loc 2 2536 0
 	mov	w2, w19
-.LVL477:
 .L231:
-	.loc 2 2546 0
 	umaddl	x0, w5, w15, x11
-.LVL478:
 	b	.L230
-	.cfi_endproc
-.LFE296:
 	.size	GetSwlReplaceBlock, .-GetSwlReplaceBlock
 	.section	.text.free_data_superblock,"ax",@progbits
 	.align	2
 	.global	free_data_superblock
 	.type	free_data_superblock, %function
 free_data_superblock:
-.LFB297:
-	.loc 2 2573 0
-	.cfi_startproc
-.LVL479:
 	and	w0, w0, 65535
-	.loc 2 2574 0
 	mov	w1, 65535
 	cmp	w0, w1
 	beq	.L249
-.LVL480:
-	.loc 2 2573 0
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
-.LBB221:
-.LBB222:
-	.loc 2 2576 0
 	adrp	x2, .LANCHOR42
 	ubfiz	x1, x0, 1, 16
-.LBE222:
-.LBE221:
-	.loc 2 2573 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-.LBB224:
-.LBB223:
-	.loc 2 2576 0
 	ldr	x2, [x2, #:lo12:.LANCHOR42]
 	strh	wzr, [x2, x1]
-	.loc 2 2577 0
 	bl	INSERT_FREE_LIST
-.LVL481:
-.LBE223:
-.LBE224:
-	.loc 2 2579 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-.LVL482:
 .L249:
 	mov	w0, 0
 	ret
-	.cfi_endproc
-.LFE297:
 	.size	free_data_superblock, .-free_data_superblock
 	.section	.text.get_new_active_ppa,"ax",@progbits
 	.align	2
 	.global	get_new_active_ppa
 	.type	get_new_active_ppa, %function
 get_new_active_ppa:
-.LFB300:
-	.loc 2 2706 0
-	.cfi_startproc
-.LVL483:
 	stp	x29, x30, [sp, -48]!
-	.cfi_def_cfa_offset 48
-	.cfi_offset 29, -48
-	.cfi_offset 30, -40
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
 	mov	x19, x0
-	.loc 2 2710 0
 	ldrh	w1, [x0]
 	mov	w0, 65535
-.LVL484:
-	.loc 2 2706 0
 	str	x21, [sp, 32]
-	.cfi_offset 21, -16
-	.loc 2 2710 0
 	cmp	w1, w0
 	bne	.L253
-	.loc 2 2710 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR88
 	adrp	x0, .LC1
 	mov	w2, 2710
 	add	x1, x1, :lo12:.LANCHOR88
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL485:
 .L253:
-	.loc 2 2711 0 is_stmt 1
 	adrp	x20, .LANCHOR19
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR19]
 	cmp	w1, w0
 	bne	.L254
-	.loc 2 2711 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR88
 	adrp	x0, .LC1
 	mov	w2, 2711
 	add	x1, x1, :lo12:.LANCHOR88
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL486:
 .L254:
-	.loc 2 2712 0 is_stmt 1
 	ldrh	w0, [x19, 4]
 	cbnz	w0, .L255
-	.loc 2 2712 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR88
 	adrp	x0, .LC1
 	mov	w2, 2712
 	add	x1, x1, :lo12:.LANCHOR88
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL487:
 .L255:
-	.loc 2 2714 0 is_stmt 1
 	ldrb	w0, [x19, 6]
-	.loc 2 2717 0
 	adrp	x1, .LANCHOR3
-	.loc 2 2713 0
 	strb	wzr, [x19, 10]
-	.loc 2 2714 0
 	add	x0, x0, 8
-	.loc 2 2717 0
 	ldrh	w2, [x1, #:lo12:.LANCHOR3]
-	.loc 2 2715 0
 	mov	w1, 65535
-	.loc 2 2714 0
 	ldrh	w0, [x19, x0, lsl 1]
-.LVL488:
 .L256:
-	.loc 2 2715 0
 	cmp	w0, w1
 	beq	.L258
-	.loc 2 2723 0
 	ldrh	w21, [x19, 2]
-	.loc 2 2731 0
 	mov	w3, 65535
-	.loc 2 2724 0
 	ldrh	w1, [x19, 4]
-	.loc 2 2723 0
 	orr	w21, w21, w0, lsl 10
-.LVL489:
 	ldrb	w0, [x19, 6]
-.LVL490:
-	.loc 2 2724 0
 	sub	w1, w1, #1
 	and	w1, w1, 65535
 	strh	w1, [x19, 4]
 .L260:
-	.loc 2 2726 0
 	add	w0, w0, 1
 	and	w0, w0, 255
-	.loc 2 2727 0
 	cmp	w2, w0
 	bne	.L259
-	.loc 2 2728 0
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-	.loc 2 2729 0
 	mov	w0, 0
 .L259:
-	.loc 2 2731 0
 	add	x4, x19, x0, sxtw 1
 	ldrh	w4, [x4, 16]
 	cmp	w4, w3
 	beq	.L260
 	strb	w0, [x19, 6]
-	.loc 2 2733 0
 	ldrh	w2, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR19]
 	cmp	w2, w0
 	bne	.L252
-	.loc 2 2733 0 is_stmt 0 discriminator 1
 	cbz	w1, .L252
-	.loc 2 2733 0 discriminator 2
 	adrp	x1, .LANCHOR88
 	adrp	x0, .LC1
 	mov	w2, 2733
 	add	x1, x1, :lo12:.LANCHOR88
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL491:
 .L252:
-	.loc 2 2735 0 is_stmt 1
 	mov	w0, w21
 	ldr	x21, [sp, 32]
-.LVL492:
 	ldp	x19, x20, [sp, 16]
-.LVL493:
 	ldp	x29, x30, [sp], 48
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 21
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL494:
 .L258:
-	.cfi_restore_state
-	.loc 2 2716 0
 	ldrb	w0, [x19, 6]
-.LVL495:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x19, 6]
-	.loc 2 2717 0
 	cmp	w0, w2
 	bne	.L257
-	.loc 2 2718 0
 	ldrh	w0, [x19, 2]
-	.loc 2 2719 0
 	strb	wzr, [x19, 6]
-	.loc 2 2718 0
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
 .L257:
-	.loc 2 2721 0
 	ldrb	w0, [x19, 6]
 	add	x0, x0, 8
 	ldrh	w0, [x19, x0, lsl 1]
-.LVL496:
 	b	.L256
-	.cfi_endproc
-.LFE300:
 	.size	get_new_active_ppa, .-get_new_active_ppa
 	.section	.text.FtlGcBufInit,"ax",@progbits
 	.align	2
 	.global	FtlGcBufInit
 	.type	FtlGcBufInit, %function
 FtlGcBufInit:
-.LFB303:
-	.file 5 "drivers/rkflash/rksftl/sftl_gc.c"
-	.loc 5 22 0
-	.cfi_startproc
-	.loc 5 27 0
 	adrp	x1, .LANCHOR90
-	.loc 5 25 0
 	adrp	x0, .LANCHOR89
-	.loc 5 28 0
 	adrp	x7, .LANCHOR91
-	.loc 5 29 0
 	adrp	x6, .LANCHOR92
-	.loc 5 27 0
 	ldr	x5, [x1, #:lo12:.LANCHOR90]
-	.loc 5 28 0
 	adrp	x1, .LANCHOR23
-	.loc 5 25 0
 	str	wzr, [x0, #:lo12:.LANCHOR89]
-.LVL497:
-	.loc 5 26 0
 	adrp	x0, .LANCHOR3
-	.loc 5 28 0
 	ldrh	w10, [x1, #:lo12:.LANCHOR23]
-	.loc 5 29 0
 	adrp	x1, .LANCHOR24
-	.loc 5 26 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	mov	w8, 24
-	.loc 5 29 0
 	ldrh	w11, [x1, #:lo12:.LANCHOR24]
-	.loc 5 30 0
 	adrp	x1, .LANCHOR93
-	.loc 5 28 0
 	ldr	x14, [x7, #:lo12:.LANCHOR91]
 	mov	x3, x5
 	ldr	x4, [x1, #:lo12:.LANCHOR93]
-	.loc 5 26 0
 	mov	w2, 0
-	.loc 5 29 0
 	ldr	x15, [x6, #:lo12:.LANCHOR92]
 	nop // between mem op and mult-accumulate
 	umaddl	x8, w0, w8, x5
 	add	x4, x4, 8
-	.loc 5 26 0
 	mov	w1, 0
-	.loc 5 27 0
 	mov	w16, 1
-.LVL498:
 .L268:
 	add	w13, w2, w10
 	add	w12, w1, w11
-	.loc 5 26 0 discriminator 1
 	cmp	x3, x8
 	bne	.L269
-	.loc 5 34 0
 	adrp	x1, .LANCHOR94
-	.loc 5 36 0
 	ldr	x7, [x7, #:lo12:.LANCHOR91]
-	.loc 5 37 0
 	ldr	x6, [x6, #:lo12:.LANCHOR92]
-	.loc 5 35 0
 	mov	w8, 24
-	.loc 5 34 0
 	ldr	w4, [x1, #:lo12:.LANCHOR94]
 .L270:
-.LVL499:
-	.loc 5 34 0 is_stmt 0 discriminator 1
 	cmp	w0, w4
 	bcc	.L271
-	.loc 5 39 0 is_stmt 1
 	ret
-.LVL500:
 .L269:
-	.loc 5 28 0 discriminator 3
 	asr	w2, w2, 2
-	.loc 5 29 0 discriminator 3
 	asr	w1, w1, 2
-	.loc 5 28 0 discriminator 3
 	add	x2, x14, x2, sxtw 2
-	.loc 5 29 0 discriminator 3
 	add	x1, x15, x1, sxtw 2
-	.loc 5 27 0 discriminator 3
 	str	w16, [x3, 16]
-	.loc 5 29 0 discriminator 3
 	stp	x2, x1, [x3]
 	add	x3, x3, 24
-	.loc 5 31 0 discriminator 3
 	stp	x2, x1, [x4]
 	add	x4, x4, 32
 	mov	w1, w12
 	mov	w2, w13
 	b	.L268
-.LVL501:
 .L271:
-	.loc 5 35 0 discriminator 3
 	umull	x3, w0, w8
-	.loc 5 36 0 discriminator 3
 	mul	w1, w10, w0
-	.loc 5 35 0 discriminator 3
 	add	x2, x5, x3
-	.loc 5 36 0 discriminator 3
 	asr	w1, w1, 2
 	add	x1, x7, x1, sxtw 2
-	.loc 5 35 0 discriminator 3
 	str	wzr, [x2, 16]
-	.loc 5 36 0 discriminator 3
 	str	x1, [x5, x3]
-	.loc 5 37 0 discriminator 3
 	mul	w1, w11, w0
-	.loc 5 34 0 discriminator 3
 	add	w0, w0, 1
-.LVL502:
 	and	w0, w0, 65535
-.LVL503:
-	.loc 5 37 0 discriminator 3
 	asr	w1, w1, 2
 	add	x1, x6, x1, sxtw 2
 	str	x1, [x2, 8]
 	b	.L270
-	.cfi_endproc
-.LFE303:
 	.size	FtlGcBufInit, .-FtlGcBufInit
 	.section	.text.FtlGcBufFree,"ax",@progbits
 	.align	2
 	.global	FtlGcBufFree
 	.type	FtlGcBufFree, %function
 FtlGcBufFree:
-.LFB304:
-	.loc 5 42 0
-	.cfi_startproc
-.LVL504:
-	.loc 5 47 0
 	adrp	x2, .LANCHOR94
-	.loc 5 46 0
 	mov	w3, 0
-	.loc 5 48 0
 	mov	w8, 24
-	.loc 5 47 0
 	ldr	w7, [x2, #:lo12:.LANCHOR94]
-	.loc 5 48 0
 	adrp	x2, .LANCHOR90
 	ldr	x5, [x2, #:lo12:.LANCHOR90]
-.LVL505:
 .L273:
-	.loc 5 46 0 discriminator 1
 	cmp	w3, w1
 	bcs	.L272
-	.loc 5 48 0
 	ubfiz	x4, x3, 5, 16
 	mov	w2, 0
 	add	x4, x0, x4
 	b	.L278
-.LVL506:
 .L274:
-	.loc 5 47 0 discriminator 2
 	add	w2, w2, 1
-.LVL507:
 	and	w2, w2, 65535
-.LVL508:
 .L278:
-	.loc 5 47 0 is_stmt 0 discriminator 1
 	cmp	w2, w7
 	bcs	.L275
-	.loc 5 48 0 is_stmt 1
 	umull	x6, w2, w8
 	add	x10, x5, x6
 	ldr	x11, [x5, x6]
 	ldr	x6, [x4, 8]
 	cmp	x11, x6
 	bne	.L274
-	.loc 5 49 0
 	str	wzr, [x10, 16]
 .L275:
-	.loc 5 46 0 discriminator 2
 	add	w3, w3, 1
-.LVL509:
 	and	w3, w3, 65535
-.LVL510:
 	b	.L273
-.LVL511:
 .L272:
 	ret
-	.cfi_endproc
-.LFE304:
 	.size	FtlGcBufFree, .-FtlGcBufFree
 	.section	.text.FtlGcBufAlloc,"ax",@progbits
 	.align	2
 	.global	FtlGcBufAlloc
 	.type	FtlGcBufAlloc, %function
 FtlGcBufAlloc:
-.LFB305:
-	.loc 5 57 0
-	.cfi_startproc
-.LVL512:
-	.loc 5 62 0
 	adrp	x2, .LANCHOR94
-	.loc 5 61 0
 	mov	w3, 0
-	.loc 5 63 0
 	mov	w7, 24
-	.loc 5 64 0
 	mov	w8, 1
-	.loc 5 62 0
 	ldr	w5, [x2, #:lo12:.LANCHOR94]
-	.loc 5 63 0
 	adrp	x2, .LANCHOR90
 	ldr	x6, [x2, #:lo12:.LANCHOR90]
-.LVL513:
 .L280:
-	.loc 5 61 0 discriminator 1
 	cmp	w3, w1
 	bcs	.L279
 	mov	w2, 0
 	b	.L285
-.LVL514:
 .L281:
-	.loc 5 62 0 discriminator 2
 	add	w2, w2, 1
-.LVL515:
 	and	w2, w2, 65535
-.LVL516:
 .L285:
-	.loc 5 62 0 is_stmt 0 discriminator 1
 	cmp	w2, w5
 	bcs	.L282
-	.loc 5 63 0 is_stmt 1
 	umaddl	x4, w2, w7, x6
 	ldr	w10, [x4, 16]
 	cbnz	w10, .L281
-	.loc 5 65 0
 	ubfiz	x2, x3, 5, 16
-.LVL517:
 	ldr	x10, [x4]
 	add	x2, x0, x2
-	.loc 5 64 0
 	str	w8, [x4, 16]
-	.loc 5 66 0
 	ldr	x4, [x4, 8]
 	stp	x10, x4, [x2, 8]
 .L282:
-	.loc 5 61 0 discriminator 2
 	add	w3, w3, 1
-.LVL518:
 	and	w3, w3, 65535
-.LVL519:
 	b	.L280
 .L279:
 	ret
-	.cfi_endproc
-.LFE305:
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
 	.section	.text.IsBlkInGcList,"ax",@progbits
 	.align	2
 	.global	IsBlkInGcList
 	.type	IsBlkInGcList, %function
 IsBlkInGcList:
-.LFB306:
-	.loc 5 74 0
-	.cfi_startproc
-.LVL520:
-	.loc 5 77 0
 	adrp	x1, .LANCHOR95
-	.loc 5 74 0
 	and	w0, w0, 65535
-	.loc 5 77 0
 	ldrh	w2, [x1, #:lo12:.LANCHOR95]
-	.loc 5 78 0
 	adrp	x1, .LANCHOR96
 	ldr	x3, [x1, #:lo12:.LANCHOR96]
-	.loc 5 77 0
 	mov	x1, 0
-.LVL521:
 .L287:
-	.loc 5 77 0 is_stmt 0 discriminator 1
 	cmp	w2, w1, uxth
 	bhi	.L289
-	.loc 5 81 0 is_stmt 1
 	mov	w0, 0
-.LVL522:
 	ret
 .L289:
 	add	x1, x1, 1
-.LVL523:
-	.loc 5 78 0
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w0
 	bne	.L287
-	.loc 5 79 0
 	mov	w0, 1
-	.loc 5 82 0
 	ret
-	.cfi_endproc
-.LFE306:
 	.size	IsBlkInGcList, .-IsBlkInGcList
 	.section	.text.FtlGcUpdatePage,"ax",@progbits
 	.align	2
 	.global	FtlGcUpdatePage
 	.type	FtlGcUpdatePage, %function
 FtlGcUpdatePage:
-.LFB307:
-	.loc 5 85 0
-	.cfi_startproc
-.LVL524:
 	mov	w6, w0
 	mov	w10, w1
 	mov	w8, w2
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
-	.loc 5 88 0
 	lsr	w0, w0, 10
-.LVL525:
-	.loc 5 85 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 5 88 0
 	bl	P2V_block_in_plane
-.LVL526:
 	and	w7, w0, 65535
-.LVL527:
-	.loc 5 91 0
 	adrp	x4, .LANCHOR95
-	.loc 5 92 0
 	adrp	x2, .LANCHOR96
-	.loc 5 91 0
 	mov	x3, 0
 	ldrh	w1, [x4, #:lo12:.LANCHOR95]
-	.loc 5 92 0
 	ldr	x5, [x2, #:lo12:.LANCHOR96]
-.LVL528:
 .L292:
 	and	w2, w3, 65535
-.LVL529:
-	.loc 5 91 0 discriminator 1
 	cmp	w2, w1
 	bcc	.L294
-	.loc 5 96 0
 	bne	.L293
-	.loc 5 97 0
 	and	x3, x3, 65535
 	strh	w0, [x5, x3, lsl 1]
-	.loc 5 98 0
 	ldrh	w0, [x4, #:lo12:.LANCHOR95]
-.LVL530:
 	add	w0, w0, 1
 	strh	w0, [x4, #:lo12:.LANCHOR95]
-.LVL531:
 	b	.L293
-.LVL532:
 .L294:
 	add	x3, x3, 1
-	.loc 5 92 0
 	add	x2, x5, x3, lsl 1
-.LVL533:
 	ldrh	w2, [x2, -2]
 	cmp	w2, w7
 	bne	.L292
-.LVL534:
 .L293:
-	.loc 5 101 0
 	adrp	x4, .LANCHOR97
 	adrp	x1, .LANCHOR98
 	mov	w3, 12
 	ldrh	w0, [x4, #:lo12:.LANCHOR97]
 	ldr	x5, [x1, #:lo12:.LANCHOR98]
 	umull	x3, w0, w3
-	.loc 5 107 0
 	add	w0, w0, 1
-	.loc 5 101 0
 	add	x7, x5, x3
-.LVL535:
-	.loc 5 102 0
 	stp	w10, w8, [x7, 4]
-	.loc 5 103 0
 	str	w6, [x5, x3]
-	.loc 5 107 0
 	strh	w0, [x4, #:lo12:.LANCHOR97]
-	.loc 5 108 0
 	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE307:
 	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
 	.section	.text.FtlGcRefreshBlock,"ax",@progbits
 	.align	2
 	.global	FtlGcRefreshBlock
 	.type	FtlGcRefreshBlock, %function
 FtlGcRefreshBlock:
-.LFB314:
-	.loc 5 345 0
-	.cfi_startproc
-.LVL536:
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	str	x19, [sp, 16]
-	.cfi_offset 19, -16
-	.loc 5 345 0
 	and	w19, w0, 65535
-	.loc 5 347 0
 	mov	w1, w19
 	adrp	x0, .LC73
-.LVL537:
 	add	x0, x0, :lo12:.LC73
 	bl	printf
-.LVL538:
-	.loc 5 349 0
 	adrp	x3, .LANCHOR99
 	ldrh	w4, [x3, #:lo12:.LANCHOR99]
 	cmp	w19, w4
 	beq	.L297
-	.loc 5 349 0 is_stmt 0 discriminator 1
 	adrp	x0, .LANCHOR100
 	ldrh	w2, [x0, #:lo12:.LANCHOR100]
 	cmp	w19, w2
 	beq	.L297
-	.loc 5 351 0 is_stmt 1
 	mov	w1, 65535
 	cmp	w4, w1
 	bne	.L298
-	.loc 5 352 0
 	strh	w19, [x3, #:lo12:.LANCHOR99]
 .L297:
-	.loc 5 356 0
 	mov	w0, 0
 	ldr	x19, [sp, 16]
-.LVL539:
 	ldp	x29, x30, [sp], 32
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_def_cfa 31, 0
 	ret
 .L298:
-	.cfi_restore_state
-	.loc 5 353 0
 	cmp	w2, w1
 	bne	.L297
-	.loc 5 354 0
 	strh	w19, [x0, #:lo12:.LANCHOR100]
 	b	.L297
-	.cfi_endproc
-.LFE314:
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
 	.section	.text.FtlGcMarkBadPhyBlk,"ax",@progbits
 	.align	2
 	.global	FtlGcMarkBadPhyBlk
 	.type	FtlGcMarkBadPhyBlk, %function
 FtlGcMarkBadPhyBlk:
-.LFB315:
-	.loc 5 359 0
-	.cfi_startproc
-.LVL540:
 	stp	x29, x30, [sp, -48]!
-	.cfi_def_cfa_offset 48
-	.cfi_offset 29, -48
-	.cfi_offset 30, -40
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
 	and	w20, w0, 65535
-	.loc 5 364 0
 	adrp	x19, .LANCHOR101
-	.loc 5 359 0
 	str	x21, [sp, 32]
-	.cfi_offset 21, -16
-	.loc 5 361 0
 	mov	w0, w20
-.LVL541:
 	bl	P2V_block_in_plane
-.LVL542:
-	.loc 5 364 0
 	ldrh	w1, [x19, #:lo12:.LANCHOR101]
 	mov	w2, w20
-	.loc 5 361 0
 	mov	w21, w0
-.LVL543:
-	.loc 5 364 0
 	adrp	x0, .LC74
-.LVL544:
 	add	x0, x0, :lo12:.LC74
 	bl	printf
-.LVL545:
-	.loc 5 366 0
 	mov	w0, w21
 	bl	FtlGcRefreshBlock
-.LVL546:
-	.loc 5 368 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR101]
-	.loc 5 369 0
 	adrp	x2, .LANCHOR102
 	add	x2, x2, :lo12:.LANCHOR102
-	.loc 5 368 0
 	mov	x1, 0
-.LVL547:
 .L301:
-	.loc 5 368 0 is_stmt 0 discriminator 1
 	cmp	w0, w1, uxth
 	bhi	.L303
-	.loc 5 372 0 is_stmt 1
 	cmp	w0, 15
 	bhi	.L302
-	.loc 5 373 0
 	add	w1, w0, 1
-.LVL548:
 	strh	w1, [x19, #:lo12:.LANCHOR101]
 	adrp	x1, .LANCHOR102
 	add	x1, x1, :lo12:.LANCHOR102
 	strh	w20, [x1, w0, sxtw 1]
 	b	.L302
-.LVL549:
 .L303:
 	add	x1, x1, 1
-.LVL550:
-	.loc 5 369 0
 	add	x3, x2, x1, lsl 1
 	ldrh	w3, [x3, -2]
 	cmp	w3, w20
 	bne	.L301
 .L302:
-	.loc 5 375 0
 	mov	w0, 0
 	ldr	x21, [sp, 32]
-.LVL551:
 	ldp	x19, x20, [sp, 16]
-.LVL552:
 	ldp	x29, x30, [sp], 48
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 21
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE315:
 	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
 	.section	.text.FtlGcReFreshBadBlk,"ax",@progbits
 	.align	2
 	.global	FtlGcReFreshBadBlk
 	.type	FtlGcReFreshBadBlk, %function
 FtlGcReFreshBadBlk:
-.LFB316:
-	.loc 5 379 0
-	.cfi_startproc
-	.loc 5 380 0
 	adrp	x0, .LANCHOR101
 	ldrh	w0, [x0, #:lo12:.LANCHOR101]
 	cbz	w0, .L312
-	.loc 5 380 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR99
 	ldrh	w2, [x1, #:lo12:.LANCHOR99]
 	mov	w1, 65535
 	cmp	w2, w1
 	bne	.L312
-	.loc 5 379 0 is_stmt 1
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	str	x19, [sp, 16]
-	.cfi_offset 19, -16
-	.loc 5 381 0
 	adrp	x19, .LANCHOR103
 	ldrh	w1, [x19, #:lo12:.LANCHOR103]
 	cmp	w1, w0
 	bcc	.L307
-	.loc 5 382 0
 	strh	wzr, [x19, #:lo12:.LANCHOR103]
 .L307:
-.LBB227:
-.LBB228:
-	.loc 5 383 0
 	ldrh	w1, [x19, #:lo12:.LANCHOR103]
 	adrp	x0, .LANCHOR102
 	add	x0, x0, :lo12:.LANCHOR102
 	ldrh	w0, [x0, x1, lsl 1]
 	bl	P2V_block_in_plane
-.LVL553:
 	bl	FtlGcRefreshBlock
-.LVL554:
-	.loc 5 384 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR103]
 	add	w0, w0, 1
 	strh	w0, [x19, #:lo12:.LANCHOR103]
-.LBE228:
-.LBE227:
-	.loc 5 387 0
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_def_cfa 31, 0
 	ret
 .L312:
 	mov	w0, 0
 	ret
-	.cfi_endproc
-.LFE316:
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
-	.section	.text.ftl_free,"ax",@progbits
-	.align	2
-	.global	ftl_free
-	.type	ftl_free, %function
-ftl_free:
-.LFB337:
-	.loc 1 24 0
-	.cfi_startproc
-.LVL555:
-.LBB229:
-.LBB230:
-	.file 6 "include/linux/compat.h"
-	.loc 6 80 0
-	b	free
-.LVL556:
-.LBE230:
-.LBE229:
-	.cfi_endproc
-.LFE337:
-	.size	ftl_free, .-ftl_free
 	.section	.text.ftl_malloc,"ax",@progbits
 	.align	2
 	.global	ftl_malloc
 	.type	ftl_malloc, %function
 ftl_malloc:
-.LFB338:
-	.loc 1 28 0
-	.cfi_startproc
-.LVL557:
-	.loc 1 29 0
 	mov	w1, 0
 	sxtw	x0, w0
 	b	kmalloc
-.LVL558:
-	.cfi_endproc
-.LFE338:
 	.size	ftl_malloc, .-ftl_malloc
+	.section	.text.ftl_free,"ax",@progbits
+	.align	2
+	.global	ftl_free
+	.type	ftl_free, %function
+ftl_free:
+	b	free
+	.size	ftl_free, .-ftl_free
 	.section	.text.rknand_print_hex,"ax",@progbits
 	.align	2
 	.global	rknand_print_hex
 	.type	rknand_print_hex, %function
 rknand_print_hex:
-.LFB339:
-	.loc 1 33 0
-	.cfi_startproc
-.LVL559:
 	stp	x29, x30, [sp, -96]!
-	.cfi_def_cfa_offset 96
-	.cfi_offset 29, -96
-	.cfi_offset 30, -88
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -64
-	.cfi_offset 22, -56
 	mov	x22, x1
-.LVL560:
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -48
-	.cfi_offset 24, -40
-	.loc 1 42 0
 	adrp	x24, .LC75
-	.loc 1 33 0
 	stp	x25, x26, [sp, 64]
 	mov	w23, w2
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 25, -32
-	.cfi_offset 26, -24
-	.cfi_offset 27, -16
-	.cfi_offset 28, -8
-	.loc 1 49 0
 	adrp	x25, .LC77
-	.loc 1 33 0
 	mov	x28, x0
 	mov	w27, w3
-	.loc 1 42 0
 	add	x24, x24, :lo12:.LC75
-	.loc 1 49 0
 	add	x25, x25, :lo12:.LC77
-	.loc 1 33 0
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -80
-	.cfi_offset 20, -72
-	.loc 1 40 0
 	mov	w21, 0
 	mov	x19, 0
-	.loc 1 39 0
 	mov	w20, 0
-	.loc 1 47 0
 	adrp	x26, .LC76
-.LVL561:
 .L318:
-	.loc 1 40 0 discriminator 1
 	cmp	w27, w19
 	bhi	.L324
-	.loc 1 56 0
 	ldp	x19, x20, [sp, 16]
-.LVL562:
-	.loc 1 55 0
 	adrp	x0, .LC78
-	.loc 1 56 0
 	ldp	x21, x22, [sp, 32]
-.LVL563:
-	.loc 1 55 0
 	add	x0, x0, :lo12:.LC78
-	.loc 1 56 0
 	ldp	x23, x24, [sp, 48]
-.LVL564:
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-.LVL565:
 	ldp	x29, x30, [sp], 96
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
-	.loc 1 55 0
 	b	printf
-.LVL566:
 .L324:
-	.cfi_restore_state
-	.loc 1 41 0
 	cbnz	w20, .L319
-	.loc 1 42 0
 	mov	w2, w21
 	mov	x1, x28
 	mov	x0, x24
 	bl	printf
-.LVL567:
 .L319:
-	.loc 1 44 0
 	cmp	w23, 4
 	bne	.L320
-	.loc 1 45 0
 	ldr	w1, [x22, x19, lsl 2]
 .L327:
-	.loc 1 47 0
 	add	x0, x26, :lo12:.LC76
 .L326:
-	.loc 1 49 0
 	bl	printf
-.LVL568:
-	.loc 1 50 0
 	add	w20, w20, 1
-.LVL569:
 	cmp	w20, 15
 	bls	.L323
-.LVL570:
-	.loc 1 51 0
 	mov	w20, 0
-	.loc 1 52 0
 	adrp	x0, .LC78
 	add	x0, x0, :lo12:.LC78
 	bl	printf
-.LVL571:
 .L323:
 	add	x19, x19, 1
-.LVL572:
 	add	w21, w21, w23
 	b	.L318
-.LVL573:
 .L320:
-	.loc 1 46 0
 	cmp	w23, 2
 	bne	.L322
-	.loc 1 47 0
 	ldrsh	w1, [x22, x19, lsl 1]
 	b	.L327
 .L322:
-	.loc 1 49 0
 	ldrb	w1, [x22, x19]
 	mov	x0, x25
 	b	.L326
-	.cfi_endproc
-.LFE339:
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.FlashReadPages,"ax",@progbits
 	.align	2
 	.global	FlashReadPages
 	.type	FlashReadPages, %function
 FlashReadPages:
-.LFB341:
-	.loc 1 85 0
-	.cfi_startproc
-.LVL574:
 	stp	x29, x30, [sp, -96]!
-	.cfi_def_cfa_offset 96
-	.cfi_offset 29, -96
-	.cfi_offset 30, -88
-	.loc 1 87 0
 	adrp	x2, .LANCHOR0
-.LVL575:
 	add	x3, x2, :lo12:.LANCHOR0
 	ubfiz	x1, x1, 5, 32
-.LVL576:
-	.loc 1 85 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	str	x25, [sp, 64]
-	.cfi_offset 25, -32
-	.loc 1 87 0
 	ldrh	w25, [x3, 12]
-.LVL577:
-	.loc 1 85 0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -64
-	.cfi_offset 22, -56
-	.loc 1 92 0
 	adrp	x21, .LANCHOR104
-	.loc 1 85 0
 	stp	x23, x24, [sp, 48]
-	.loc 1 92 0
 	adrp	x22, .LC1
-	.loc 1 85 0
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 23, -48
-	.cfi_offset 24, -40
-	.cfi_offset 19, -80
-	.cfi_offset 20, -72
 	add	x24, x0, x1
 	mov	x19, x0
 	mov	x23, x2
-	.loc 1 92 0
 	add	x21, x21, :lo12:.LANCHOR104
 	add	x22, x22, :lo12:.LC1
-.LVL578:
 .L329:
-	.loc 1 91 0 discriminator 1
 	cmp	x19, x24
 	bne	.L336
-	.loc 1 112 0
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
-.LVL579:
 	ldp	x29, x30, [sp], 96
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 25
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL580:
 .L336:
-	.cfi_restore_state
-	.loc 1 92 0
 	ldr	x0, [x19, 8]
 	cbz	x0, .L330
-	.loc 1 92 0 is_stmt 0 discriminator 2
 	ldr	x0, [x19, 16]
 	cbnz	x0, .L331
 .L330:
-	.loc 1 92 0 discriminator 3
-	mov	w2, 92
+	mov	w2, 96
 	mov	x1, x21
 	mov	x0, x22
 	bl	printf
-.LVL581:
 .L331:
-	.loc 1 93 0 is_stmt 1
 	ldr	w0, [x19, 4]
-	.loc 1 94 0
 	adrp	x20, .LANCHOR105
 	add	x20, x20, :lo12:.LANCHOR105
-	.loc 1 93 0
 	add	x2, x29, 88
 	add	x1, x29, 92
 	bl	l2p_addr_tran.isra.0
-.LVL582:
-	.loc 1 94 0
 	ldrb	w0, [x29, 88]
 	ldr	w1, [x29, 92]
 	ldp	x2, x3, [x19, 8]
 	ldr	x4, [x20, 24]
 	blr	x4
-.LVL583:
-	.loc 1 98 0
 	str	w0, [x19]
-	.loc 1 99 0
 	add	x0, x23, :lo12:.LANCHOR0
-.LVL584:
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
 	bne	.L333
-	.loc 1 100 0
 	ldrb	w0, [x29, 88]
 	ldr	x4, [x20, 24]
 	ldp	x2, x3, [x19, 8]
@@ -5112,475 +2913,245 @@ FlashReadPages:
 	add	x2, x2, 2048
 	add	w1, w25, w1
 	blr	x4
-.LVL585:
-	.loc 1 104 0
 	cmn	w0, #1
 	beq	.L334
-	.loc 1 105 0 discriminator 1
 	ldr	x0, [x19, 16]
-.LVL586:
-	.loc 1 104 0 discriminator 1
 	ldr	w1, [x0, 12]
 	cmn	w1, #1
 	bne	.L333
-	.loc 1 105 0
 	ldr	w1, [x0, 8]
 	cmn	w1, #1
 	bne	.L333
-	.loc 1 106 0
 	ldr	w0, [x0]
 	cmn	w0, #1
 	beq	.L333
 .L334:
-	.loc 1 108 0
 	mov	w0, -1
 	str	w0, [x19]
 .L333:
 	add	x19, x19, 32
 	b	.L329
-	.cfi_endproc
-.LFE341:
 	.size	FlashReadPages, .-FlashReadPages
 	.section	.text.FtlLoadFactoryBbt,"ax",@progbits
 	.align	2
 	.global	FtlLoadFactoryBbt
 	.type	FtlLoadFactoryBbt, %function
 FtlLoadFactoryBbt:
-.LFB230:
-	.loc 4 279 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -112]!
-	.cfi_def_cfa_offset 112
-	.cfi_offset 29, -112
-	.cfi_offset 30, -104
-	.loc 4 286 0
 	adrp	x2, .LANCHOR107
 	adrp	x0, .LANCHOR106
 	add	x1, x0, :lo12:.LANCHOR106
-	.loc 4 279 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 4 286 0
 	ldr	x2, [x2, #:lo12:.LANCHOR107]
-	.loc 4 279 0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -80
-	.cfi_offset 22, -72
 	mov	x22, x0
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 25, -48
-	.cfi_offset 26, -40
-	.loc 4 291 0
 	adrp	x26, .LANCHOR17
-	.loc 4 279 0
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 27, -32
-	.cfi_offset 28, -24
-	.loc 4 291 0
 	add	x28, x26, :lo12:.LANCHOR17
-	.loc 4 279 0
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -96
-	.cfi_offset 20, -88
 	adrp	x20, .LANCHOR37
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -64
-	.cfi_offset 24, -56
 	add	x20, x20, :lo12:.LANCHOR37
-	.loc 4 286 0
 	str	x2, [x1, 8]
-	.loc 4 287 0
 	adrp	x2, .LANCHOR108
-	.loc 4 289 0
 	adrp	x23, .LANCHOR10
 	add	x20, x20, 12
-	.loc 4 287 0
 	ldr	x25, [x2, #:lo12:.LANCHOR108]
-	.loc 4 289 0
 	add	x23, x23, :lo12:.LANCHOR10
 	mov	w21, 0
-	.loc 4 290 0
 	mov	w27, -1
-	.loc 4 287 0
 	str	x25, [x1, 16]
-.LVL587:
 .L348:
-	.loc 4 289 0 discriminator 1
 	ldrh	w0, [x23]
 	cmp	w21, w0
 	bcc	.L353
-	.loc 4 314 0
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
-.LVL588:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-.LVL589:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL590:
 .L353:
-	.cfi_restore_state
-	.loc 4 291 0
 	ldrh	w19, [x26, #:lo12:.LANCHOR17]
-	.loc 4 293 0
 	add	x24, x22, :lo12:.LANCHOR106
-	.loc 4 290 0
 	strh	w27, [x20]
-	.loc 4 301 0
 	mov	w3, 61664
-	.loc 4 291 0
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.LVL591:
 .L349:
-	.loc 4 291 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x28]
 	sub	w1, w0, #15
 	cmp	w1, w19
 	bgt	.L351
-	.loc 4 292 0 is_stmt 1
 	madd	w0, w0, w21, w19
-	.loc 4 294 0
 	mov	w2, 1
 	str	w3, [x29, 108]
-.LVL592:
 	mov	w1, w2
-	.loc 4 292 0
 	lsl	w0, w0, 10
-	.loc 4 293 0
 	str	w0, [x24, 4]
-	.loc 4 294 0
 	mov	x0, x24
 	bl	FlashReadPages
-.LVL593:
-	.loc 4 295 0
 	ldr	w0, [x24]
 	ldr	w3, [x29, 108]
 	cmn	w0, #1
 	beq	.L350
-	.loc 4 301 0
 	ldrh	w0, [x25]
 	cmp	w0, w3
 	bne	.L350
-	.loc 4 303 0
 	strh	w19, [x20]
 .L351:
-	.loc 4 289 0 discriminator 2
 	add	w21, w21, 1
-.LVL594:
 	add	x20, x20, 2
 	b	.L348
 .L350:
-	.loc 4 291 0 discriminator 2
 	sub	w19, w19, #1
-.LVL595:
 	and	w19, w19, 65535
-.LVL596:
 	b	.L349
-	.cfi_endproc
-.LFE230:
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
 	.section	.text.FtlGetLastWrittenPage,"ax",@progbits
 	.align	2
 	.global	FtlGetLastWrittenPage
 	.type	FtlGetLastWrittenPage, %function
 FtlGetLastWrittenPage:
-.LFB236:
-	.loc 2 47 0
-	.cfi_startproc
-.LVL597:
 	stp	x29, x30, [sp, -160]!
-	.cfi_def_cfa_offset 160
-	.cfi_offset 29, -160
-	.cfi_offset 30, -152
-	.loc 2 51 0
 	cmp	w1, 1
-	.loc 2 47 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -112
-	.cfi_offset 24, -104
 	mov	w23, w1
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 19, -144
-	.cfi_offset 20, -136
-	.cfi_offset 21, -128
-	.cfi_offset 22, -120
-	.loc 2 51 0
 	bne	.L359
-	.loc 2 51 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR20
-.LVL598:
 	ldrh	w19, [x1, #:lo12:.LANCHOR20]
 .L360:
-.LVL599:
-	.loc 2 56 0 is_stmt 1 discriminator 4
 	sub	w19, w19, #1
-.LVL600:
-	.loc 2 53 0 discriminator 4
 	adrp	x1, ftl_temp_buf
-	.loc 2 56 0 discriminator 4
 	sxth	w19, w19
-	.loc 2 53 0 discriminator 4
 	add	x1, x1, :lo12:ftl_temp_buf
-	.loc 2 57 0 discriminator 4
 	lsl	w21, w0, 10
-	.loc 2 53 0 discriminator 4
 	str	x1, [x29, 72]
-	.loc 2 57 0 discriminator 4
 	orr	w0, w19, w21
-.LVL601:
-	.loc 2 54 0 discriminator 4
 	add	x1, x29, 96
-	.loc 2 57 0 discriminator 4
 	str	w0, [x29, 68]
-	.loc 2 58 0 discriminator 4
 	mov	w2, w23
-	.loc 2 54 0 discriminator 4
 	str	x1, [x29, 80]
-.LVL602:
-	.loc 2 58 0 discriminator 4
 	add	x0, x29, 64
 	mov	w1, 1
 	bl	FlashReadPages
-.LVL603:
-	.loc 2 59 0 discriminator 4
 	ldr	w0, [x29, 96]
 	cmn	w0, #1
 	bne	.L361
 	mov	w22, 0
-	.loc 2 61 0
 	mov	w24, 2
-.LVL604:
 .L362:
-	.loc 2 60 0
 	cmp	w22, w19
 	ble	.L365
-.LVL605:
 .L361:
-	.loc 2 73 0
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
-.LVL606:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL607:
 	ldp	x29, x30, [sp], 160
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL608:
 .L359:
-	.cfi_restore_state
-	.loc 2 51 0 discriminator 2
 	adrp	x1, .LANCHOR19
-.LVL609:
 	ldrh	w19, [x1, #:lo12:.LANCHOR19]
 	b	.L360
-.LVL610:
 .L365:
-	.loc 2 61 0
 	add	w20, w22, w19
-	.loc 2 63 0
 	mov	w2, w23
 	mov	w1, 1
-	.loc 2 61 0
 	sdiv	w20, w20, w24
-.LVL611:
-	.loc 2 62 0
 	sxth	w0, w20
 	orr	w0, w0, w21
 	str	w0, [x29, 68]
-	.loc 2 63 0
 	add	x0, x29, 64
 	bl	FlashReadPages
-.LVL612:
-	.loc 2 65 0
 	ldr	w0, [x29, 96]
 	cmn	w0, #1
 	bne	.L363
-	.loc 2 65 0 is_stmt 0 discriminator 1
 	ldr	w0, [x29, 100]
 	cmn	w0, #1
 	bne	.L363
-	.loc 2 66 0 is_stmt 1
 	sub	w19, w20, #1
-.LVL613:
 	sxth	w19, w19
-.LVL614:
 	b	.L362
 .L363:
-	.loc 2 68 0
 	add	w20, w20, 1
-.LVL615:
 	sxth	w22, w20
-.LVL616:
 	b	.L362
-	.cfi_endproc
-.LFE236:
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
 	.section	.text.FlashProgPages,"ax",@progbits
 	.align	2
 	.global	FlashProgPages
 	.type	FlashProgPages, %function
 FlashProgPages:
-.LFB342:
-	.loc 1 115 0
-	.cfi_startproc
-.LVL617:
 	stp	x29, x30, [sp, -144]!
-	.cfi_def_cfa_offset 144
-	.cfi_offset 29, -144
-	.cfi_offset 30, -136
 	ubfiz	x1, x1, 5, 32
-.LVL618:
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 25, -80
-	.cfi_offset 26, -72
 	mov	w25, w2
 	mov	w26, w3
-	.loc 1 117 0
 	adrp	x2, .LANCHOR0
-.LVL619:
 	add	x3, x2, :lo12:.LANCHOR0
-.LVL620:
-	.loc 1 115 0
 	stp	x27, x28, [sp, 80]
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 27, -64
-	.cfi_offset 28, -56
-	.cfi_offset 19, -128
-	.cfi_offset 20, -120
 	mov	x20, x0
 	stp	x21, x22, [sp, 32]
-	.loc 1 121 0
 	mov	x19, x0
-	.loc 1 117 0
 	ldrh	w27, [x3, 12]
-.LVL621:
-	.cfi_offset 21, -112
-	.cfi_offset 22, -104
-	.loc 1 122 0
 	adrp	x21, .LANCHOR109
-	.loc 1 115 0
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -96
-	.cfi_offset 24, -88
-	.loc 1 124 0
 	adrp	x22, .LANCHOR105
 	add	x24, x0, x1
 	mov	x23, x2
-	.loc 1 122 0
 	add	x21, x21, :lo12:.LANCHOR109
-	.loc 1 133 0
 	add	x28, x22, :lo12:.LANCHOR105
-.LVL622:
 .L368:
-	.loc 1 121 0 discriminator 1
 	cmp	x19, x24
 	bne	.L376
-	.loc 1 142 0
 	cbnz	w26, .L377
-.LVL623:
 .L395:
-	.loc 1 172 0
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-.LVL624:
 	ldp	x27, x28, [sp, 80]
-.LVL625:
 	ldp	x29, x30, [sp], 144
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL626:
 .L376:
-	.cfi_restore_state
-	.loc 1 122 0
 	ldr	x0, [x19, 8]
 	cbz	x0, .L369
-	.loc 1 122 0 is_stmt 0 discriminator 2
 	ldr	x0, [x19, 16]
 	cbnz	x0, .L370
 .L369:
-	.loc 1 122 0 discriminator 3
 	adrp	x0, .LC1
-	mov	w2, 122
+	mov	w2, 126
 	mov	x1, x21
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL627:
 .L370:
-	.loc 1 123 0 is_stmt 1
 	ldr	w0, [x19, 4]
 	add	x2, x29, 104
 	add	x1, x29, 108
 	bl	l2p_addr_tran.isra.0
-.LVL628:
-	.loc 1 124 0
 	add	x0, x22, :lo12:.LANCHOR105
 	ldr	w1, [x29, 108]
 	ldp	x2, x3, [x19, 8]
 	ldr	x4, [x0, 16]
 	ldrb	w0, [x29, 104]
 	blr	x4
-.LVL629:
-	.loc 1 129 0
 	cbnz	w0, .L371
-	.loc 1 128 0
 	str	wzr, [x19]
-.LVL630:
 .L372:
-	.loc 1 132 0
 	add	x0, x23, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
 	bne	.L374
-	.loc 1 133 0
 	ldrb	w0, [x29, 104]
 	ldr	x4, [x28, 16]
 	ldp	x2, x3, [x19, 8]
@@ -5589,3431 +3160,1889 @@ FlashProgPages:
 	add	x2, x2, 2048
 	add	w1, w27, w1
 	blr	x4
-.LVL631:
-	.loc 1 137 0
 	cbz	w0, .L374
-	.loc 1 138 0
 	mov	w0, -1
-.LVL632:
 	str	w0, [x19]
 .L374:
 	add	x19, x19, 32
 	b	.L368
-.LVL633:
 .L371:
-	.loc 1 130 0
 	mov	w0, -1
-.LVL634:
 	str	w0, [x19]
 	b	.L372
-.LVL635:
 .L381:
-.LBB231:
-	.loc 1 147 0
 	str	wzr, [x22]
-	.loc 1 153 0
 	mov	w2, w25
-	.loc 1 148 0
 	str	wzr, [x24]
-	.loc 1 153 0
 	mov	w1, 1
-	.loc 1 151 0
 	stp	x22, x24, [x29, 120]
-	.loc 1 149 0
 	ldr	w0, [x20, 4]
 	str	w0, [x29, 116]
-	.loc 1 153 0
 	add	x0, x29, 112
 	bl	FlashReadPages
-.LVL636:
-	.loc 1 154 0
 	ldr	w26, [x29, 112]
 	cmn	w26, #1
 	bne	.L378
-	.loc 1 155 0
 	ldr	w1, [x20, 4]
 	adrp	x0, .LC79
 	add	x0, x0, :lo12:.LC79
 	bl	printf
-.LVL637:
-	.loc 1 156 0
 	str	w26, [x20]
 .L378:
-	.loc 1 158 0
 	ldr	x0, [x20, 16]
 	cbz	x0, .L379
-	.loc 1 159 0
 	ldr	w3, [x23, #:lo12:.LANCHOR110]
 	ldr	w2, [x0]
 	cmp	w2, w3
 	beq	.L379
-	.loc 1 160 0
 	ldr	w1, [x20, 4]
 	adrp	x0, .LC80
 	add	x0, x0, :lo12:.LC80
 	bl	printf
-.LVL638:
-	.loc 1 161 0
 	mov	w0, -1
 	str	w0, [x20]
 .L379:
-	.loc 1 164 0
 	ldr	x0, [x20, 8]
 	cbz	x0, .L380
-	.loc 1 165 0
 	ldr	w3, [x21, #:lo12:check_buf]
 	ldr	w2, [x0]
 	cmp	w2, w3
 	beq	.L380
-	.loc 1 166 0
 	ldr	w1, [x20, 4]
 	adrp	x0, .LC81
 	add	x0, x0, :lo12:.LC81
 	bl	printf
-.LVL639:
-	.loc 1 167 0
 	mov	w0, -1
 	str	w0, [x20]
 .L380:
 	add	x20, x20, 32
 .L396:
-.LBE231:
-	.loc 1 144 0 discriminator 1
 	cmp	x20, x19
 	bne	.L381
 	b	.L395
-.LVL640:
 .L377:
-.LBB232:
-	.loc 1 147 0 discriminator 1
 	adrp	x21, check_buf
-	.loc 1 148 0 discriminator 1
 	adrp	x23, .LANCHOR110
-	.loc 1 147 0 discriminator 1
 	add	x22, x21, :lo12:check_buf
-	.loc 1 148 0 discriminator 1
 	add	x24, x23, :lo12:.LANCHOR110
 	b	.L396
-.LBE232:
-	.cfi_endproc
-.LFE342:
 	.size	FlashProgPages, .-FlashProgPages
 	.section	.text.FlashEraseBlocks,"ax",@progbits
 	.align	2
 	.global	FlashEraseBlocks
 	.type	FlashEraseBlocks, %function
 FlashEraseBlocks:
-.LFB343:
-	.loc 1 175 0
-	.cfi_startproc
-.LVL641:
 	stp	x29, x30, [sp, -80]!
-	.cfi_def_cfa_offset 80
-	.cfi_offset 29, -80
-	.cfi_offset 30, -72
-	.loc 1 178 0
 	adrp	x1, .LANCHOR0
-.LVL642:
 	add	x3, x1, :lo12:.LANCHOR0
 	ubfiz	x2, x2, 5, 32
-.LVL643:
-	.loc 1 175 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x23, x24, [sp, 48]
 	add	x2, x2, 4
-	.cfi_offset 23, -32
-	.cfi_offset 24, -24
-	.loc 1 178 0
 	ldrh	w23, [x3, 12]
-.LVL644:
-	.loc 1 175 0
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -64
-	.cfi_offset 20, -56
 	add	x19, x0, 4
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -48
-	.cfi_offset 22, -40
 	mov	x20, x1
-	.loc 1 183 0
 	adrp	x21, .LANCHOR105
 	add	x22, x0, x2
-	.loc 1 188 0
 	add	x24, x21, :lo12:.LANCHOR105
-.LVL645:
 .L399:
-	.loc 1 181 0 discriminator 1
 	cmp	x19, x22
 	bne	.L405
-	.loc 1 194 0
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL646:
 	ldp	x29, x30, [sp], 80
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL647:
 .L405:
-	.cfi_restore_state
-	.loc 1 182 0
 	ldr	w0, [x19]
 	add	x2, x29, 72
 	add	x1, x29, 76
 	bl	l2p_addr_tran.isra.0
-.LVL648:
-	.loc 1 183 0
 	add	x0, x21, :lo12:.LANCHOR105
 	ldr	w1, [x29, 76]
 	ldr	x2, [x0, 8]
 	ldrb	w0, [x29, 72]
 	blr	x2
-.LVL649:
-	.loc 1 185 0
 	cbnz	w0, .L400
-	.loc 1 184 0
 	str	wzr, [x19, -4]
-.LVL650:
 .L401:
-	.loc 1 187 0
 	add	x0, x20, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
 	bne	.L403
-	.loc 1 188 0
 	ldrb	w0, [x29, 72]
 	ldr	x2, [x24, 8]
 	ldr	w1, [x29, 76]
 	add	w1, w23, w1
 	blr	x2
-.LVL651:
-	.loc 1 189 0
 	cbz	w0, .L403
-	.loc 1 190 0
 	mov	w0, -1
-.LVL652:
 	str	w0, [x19, -4]
 .L403:
 	add	x19, x19, 32
 	b	.L399
-.LVL653:
 .L400:
-	.loc 1 186 0
 	mov	w0, -1
-.LVL654:
 	str	w0, [x19, -4]
 	b	.L401
-	.cfi_endproc
-.LFE343:
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
 	.section	.text.FtlFreeSysBlkQueueIn,"ax",@progbits
 	.align	2
 	.global	FtlFreeSysBlkQueueIn
 	.type	FtlFreeSysBlkQueueIn, %function
 FtlFreeSysBlkQueueIn:
-.LFB240:
-	.loc 2 98 0
-	.cfi_startproc
-.LVL655:
 	stp	x29, x30, [sp, -48]!
-	.cfi_def_cfa_offset 48
-	.cfi_offset 29, -48
-	.cfi_offset 30, -40
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
 	and	w20, w0, 65535
 	str	x21, [sp, 32]
-	.cfi_offset 21, -16
-	.loc 2 99 0
 	sub	w2, w20, #1
 	mov	w0, 65533
-.LVL656:
 	cmp	w0, w2, uxth
 	bcc	.L410
-.LBB241:
-.LBB242:
-	.loc 2 94 0
 	adrp	x0, .LANCHOR38
 	add	x2, x0, :lo12:.LANCHOR38
 	mov	x19, x0
-.LBE242:
-.LBE241:
-	.loc 2 101 0
 	ldrh	w2, [x2, 6]
 	cmp	w2, 1024
 	beq	.L410
 	and	w1, w1, 65535
-.LVL657:
-.LBB243:
-.LBB244:
-	.loc 2 103 0
 	cbz	w1, .L412
-.LBB245:
-	.loc 2 104 0
 	mov	w0, w20
 	bl	P2V_block_in_plane
-.LVL658:
 	and	w21, w0, 65535
-.LVL659:
-	.loc 2 105 0
 	adrp	x0, .LANCHOR111
-.LVL660:
 	lsl	w1, w20, 10
-	.loc 2 106 0
 	mov	w2, 1
-	.loc 2 105 0
 	ldr	x0, [x0, #:lo12:.LANCHOR111]
 	str	w1, [x0, 4]
-	.loc 2 106 0
 	mov	w1, w2
 	bl	FlashEraseBlocks
-.LVL661:
-	.loc 2 107 0
 	adrp	x1, .LANCHOR43
 	ubfiz	x0, x21, 1, 16
 	ldr	x2, [x1, #:lo12:.LANCHOR43]
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-	.loc 2 108 0
 	adrp	x1, .LANCHOR75
 	ldr	w0, [x1, #:lo12:.LANCHOR75]
 	add	w0, w0, 1
 	str	w0, [x1, #:lo12:.LANCHOR75]
-.LVL662:
 .L412:
-.LBE245:
-	.loc 2 110 0
 	add	x0, x19, :lo12:.LANCHOR38
 	ldrh	w1, [x0, 6]
 	add	w1, w1, 1
 	strh	w1, [x0, 6]
-	.loc 2 111 0
 	ldrh	w1, [x0, 4]
 	add	x2, x0, x1, sxtw 1
-	.loc 2 112 0
 	add	w1, w1, 1
 	and	w1, w1, 1023
 	strh	w1, [x0, 4]
-	.loc 2 111 0
 	strh	w20, [x2, 8]
-.LVL663:
 .L410:
-.LBE244:
-.LBE243:
-	.loc 2 115 0
 	ldp	x19, x20, [sp, 16]
-.LVL664:
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 21
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE240:
 	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
 	.section	.text.FtlLowFormatEraseBlock,"ax",@progbits
 	.align	2
 	.global	FtlLowFormatEraseBlock
 	.type	FtlLowFormatEraseBlock, %function
 FtlLowFormatEraseBlock:
-.LFB209:
-	.loc 3 528 0
-	.cfi_startproc
-.LVL665:
 	stp	x29, x30, [sp, -144]!
-	.cfi_def_cfa_offset 144
-	.cfi_offset 29, -144
-	.cfi_offset 30, -136
-	.loc 3 541 0
 	adrp	x7, .LANCHOR13
 	add	x7, x7, :lo12:.LANCHOR13
-	.loc 3 539 0
 	mov	x5, 0
-	.loc 3 528 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -96
-	.cfi_offset 24, -88
 	and	w24, w0, 65535
-	.loc 3 538 0
 	adrp	x0, .LANCHOR112
-.LVL666:
-	.loc 3 528 0
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	and	w23, w1, 255
-	.loc 3 538 0
 	str	w24, [x0, #:lo12:.LANCHOR112]
-.LVL667:
-	.loc 3 551 0
 	adrp	x0, .LANCHOR114
-	.loc 3 550 0
 	adrp	x1, .LANCHOR113
-.LVL668:
-	.cfi_offset 19, -128
-	.cfi_offset 20, -120
-	.cfi_offset 21, -112
-	.cfi_offset 22, -104
-	.loc 3 539 0
 	adrp	x20, .LANCHOR3
-	.loc 3 540 0
 	adrp	x21, .LANCHOR111
-	.loc 3 551 0
 	ldr	x11, [x0, #:lo12:.LANCHOR114]
 	adrp	x0, .LANCHOR24
-	.loc 3 539 0
 	ldrh	w8, [x20, #:lo12:.LANCHOR3]
-	.loc 3 540 0
 	ldr	x6, [x21, #:lo12:.LANCHOR111]
-	.loc 3 536 0
 	mov	w22, 0
-	.loc 3 550 0
 	ldr	x10, [x1, #:lo12:.LANCHOR113]
-	.loc 3 537 0
 	mov	w19, 0
-	.loc 3 551 0
 	ldrh	w12, [x0, #:lo12:.LANCHOR24]
-	.loc 3 528 0
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 25, -80
-	.cfi_offset 26, -72
-	.cfi_offset 27, -64
-	.cfi_offset 28, -56
 	stp	x0, x1, [x29, 120]
-.LVL669:
 .L421:
-	.loc 3 539 0 discriminator 1
 	cmp	w8, w5, uxth
 	bhi	.L425
-	.loc 3 559 0
 	cbz	w22, .L420
-	.loc 3 562 0
 	mov	w2, w22
 	ubfiz	x22, x22, 5, 16
-.LVL670:
 	mov	x25, 0
 	mov	w1, 0
 	mov	x0, x6
 	bl	FlashEraseBlocks
-.LVL671:
 .L429:
-	.loc 3 564 0
 	ldr	x0, [x21, #:lo12:.LANCHOR111]
 	add	x1, x0, x25
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
 	bne	.L428
-	.loc 3 566 0
 	ldr	w0, [x1, 4]
-	.loc 3 565 0
 	add	w19, w19, 1
-.LVL672:
 	and	w19, w19, 65535
-.LVL673:
-	.loc 3 566 0
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.LVL674:
 .L428:
 	add	x25, x25, 32
-	.loc 3 563 0 discriminator 2
 	cmp	x25, x22
 	bne	.L429
-	.loc 3 571 0
 	cbz	w23, .L442
-.LVL675:
-	.loc 3 573 0
 	adrp	x0, .LANCHOR20
-	.loc 3 572 0
 	mov	w25, 1
-	.loc 3 573 0
 	ldrh	w26, [x0, #:lo12:.LANCHOR20]
-.LVL676:
-	.loc 3 574 0
 	lsr	w28, w26, 2
-.LVL677:
 .L430:
-	.loc 3 578 0
 	add	x0, x20, :lo12:.LANCHOR3
-	.loc 3 580 0
 	adrp	x27, .LANCHOR13
-	.loc 3 578 0
 	str	x0, [x29, 136]
 	mov	w22, 0
-	.loc 3 580 0
 	add	x0, x27, :lo12:.LANCHOR13
 	str	x0, [x29, 112]
-.LVL678:
 .L438:
-	.loc 3 578 0
 	ldr	x0, [x29, 136]
 	mov	x5, 0
-	.loc 3 579 0
 	ldr	x6, [x21, #:lo12:.LANCHOR111]
-	.loc 3 577 0
 	mov	w20, 0
-	.loc 3 578 0
 	ldrh	w7, [x0]
-	.loc 3 587 0
 	adrp	x0, .LANCHOR115
 	ldr	x8, [x0, #:lo12:.LANCHOR115]
-	.loc 3 588 0
 	ldr	x0, [x29, 128]
 	ldr	x10, [x0, #:lo12:.LANCHOR113]
 	ldr	x0, [x29, 120]
 	ldrh	w11, [x0, #:lo12:.LANCHOR24]
-.LVL679:
 .L431:
-	.loc 3 578 0 discriminator 1
 	cmp	w7, w5, uxth
 	bhi	.L434
-	.loc 3 593 0
 	cbz	w20, .L420
-	.loc 3 596 0
 	mov	w1, w20
 	mov	w3, 1
 	mov	w2, w25
 	mov	x0, x6
 	bl	FlashProgPages
-.LVL680:
 	mov	x27, 0
 	ubfiz	x1, x20, 5, 16
-.LVL681:
 .L437:
-	.loc 3 598 0
 	ldr	x0, [x21, #:lo12:.LANCHOR111]
 	add	x3, x0, x27
 	ldr	w0, [x0, x27]
 	cbz	w0, .L436
-	.loc 3 600 0
 	ldr	w0, [x3, 4]
-	.loc 3 599 0
 	add	w19, w19, 1
-.LVL682:
 	str	x1, [x29, 104]
 	and	w19, w19, 65535
-.LVL683:
-	.loc 3 600 0
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.LVL684:
 	ldr	x1, [x29, 104]
 .L436:
 	add	x27, x27, 32
-	.loc 3 597 0 discriminator 2
 	cmp	x1, x27
 	bne	.L437
-	.loc 3 604 0
 	add	w22, w22, w28
-.LVL685:
 	and	w22, w22, 65535
-.LVL686:
-	.loc 3 605 0
 	cmp	w26, w22
 	bhi	.L438
 	mov	x22, 0
-.LVL687:
 .L440:
-	.loc 3 611 0
 	cbz	w23, .L439
-	.loc 3 611 0 is_stmt 0 discriminator 1
 	ldr	x0, [x21, #:lo12:.LANCHOR111]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
 	cbnz	w0, .L439
-	.loc 3 612 0 is_stmt 1
 	ldr	w0, [x1, 4]
 	mov	w1, 1
 	lsr	w0, w0, 10
 	bl	FtlFreeSysBlkQueueIn
-.LVL688:
 .L439:
 	add	x22, x22, 32
-	.loc 3 610 0 discriminator 2
 	cmp	x22, x27
 	bne	.L440
-	.loc 3 615 0
 	cmp	w24, 63
 	ccmp	w23, 0, 0, hi
 	beq	.L420
-	.loc 3 616 0
 	ldr	x0, [x21, #:lo12:.LANCHOR111]
 	mov	w2, w20
 	mov	w1, w25
 	bl	FlashEraseBlocks
-.LVL689:
 .L420:
-	.loc 3 619 0
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
-.LVL690:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL691:
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL692:
 .L425:
-	.cfi_restore_state
-	.loc 3 540 0
 	lsl	x0, x5, 5
-	.loc 3 541 0
 	mov	w1, w24
-	.loc 3 540 0
 	str	wzr, [x6, x0]
-	.loc 3 541 0
 	ldrb	w0, [x7, x5]
 	bl	V2P_block
-.LVL693:
 	and	w13, w0, 65535
 	mov	w14, w13
-.LVL694:
-	.loc 3 543 0
 	cbz	w23, .L422
-	.loc 3 544 0
 	bl	IsBlkInVendorPart
-.LVL695:
 	cbnz	w0, .L423
 .L422:
-	.loc 3 548 0
 	mov	w0, w14
 	bl	FtlBbmIsBadBlock
-.LVL696:
 	cbnz	w0, .L424
-	.loc 3 549 0
 	ubfiz	x0, x22, 5, 16
-	.loc 3 551 0
 	mul	w1, w22, w12
-	.loc 3 549 0
 	add	x0, x6, x0
-	.loc 3 552 0
 	add	w22, w22, 1
-.LVL697:
 	and	w22, w22, 65535
-.LVL698:
-	.loc 3 549 0
 	lsl	w13, w13, 10
-.LVL699:
-	.loc 3 551 0
 	asr	w1, w1, 2
 	add	x1, x11, x1, sxtw 2
-	.loc 3 549 0
 	str	w13, [x0, 4]
-	.loc 3 551 0
 	stp	x10, x1, [x0, 8]
 .L423:
-.LVL700:
 	add	x5, x5, 1
-.LVL701:
 	b	.L421
-.LVL702:
 .L424:
-	.loc 3 554 0
 	add	w19, w19, 1
-.LVL703:
 	and	w19, w19, 65535
-.LVL704:
 	b	.L423
-.LVL705:
 .L442:
-	.loc 3 534 0
 	mov	w25, 0
-	.loc 3 533 0
 	mov	w28, 6
-	.loc 3 531 0
 	mov	w26, 1
 	b	.L430
-.LVL706:
 .L434:
-	.loc 3 579 0
 	lsl	x0, x5, 5
-	.loc 3 580 0
 	mov	w1, w24
-	.loc 3 579 0
 	str	wzr, [x6, x0]
-	.loc 3 580 0
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0, x5]
 	bl	V2P_block
-.LVL707:
 	and	w12, w0, 65535
 	mov	w13, w12
-.LVL708:
-	.loc 3 581 0
 	cbz	w23, .L432
-	.loc 3 582 0
 	bl	IsBlkInVendorPart
-.LVL709:
 	cbnz	w0, .L433
 .L432:
-	.loc 3 585 0
 	mov	w0, w13
 	bl	FtlBbmIsBadBlock
-.LVL710:
 	cbnz	w0, .L433
-	.loc 3 586 0
 	ubfiz	x0, x20, 5, 16
-	.loc 3 588 0
 	mul	w1, w20, w11
-	.loc 3 586 0
 	add	x0, x6, x0
-	.loc 3 589 0
 	add	w20, w20, 1
-.LVL711:
 	and	w20, w20, 65535
-.LVL712:
-	.loc 3 586 0
 	add	w12, w22, w12, lsl 10
-.LVL713:
-	.loc 3 588 0
 	asr	w1, w1, 2
 	add	x1, x10, x1, sxtw 2
-	.loc 3 586 0
 	str	w12, [x0, 4]
-	.loc 3 588 0
 	stp	x8, x1, [x0, 8]
 .L433:
-.LVL714:
 	add	x5, x5, 1
-.LVL715:
 	b	.L431
-	.cfi_endproc
-.LFE209:
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
 	.section	.text.FtlFreeSysBlkQueueOut,"ax",@progbits
 	.align	2
 	.global	FtlFreeSysBlkQueueOut
 	.type	FtlFreeSysBlkQueueOut, %function
 FtlFreeSysBlkQueueOut:
-.LFB243:
-	.loc 2 181 0
-	.cfi_startproc
-.LVL716:
 	stp	x29, x30, [sp, -64]!
-	.cfi_def_cfa_offset 64
-	.cfi_offset 29, -64
-	.cfi_offset 30, -56
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -48
-	.cfi_offset 20, -40
-.LBB246:
-.LBB247:
-	.loc 2 89 0
 	adrp	x19, .LANCHOR38
-.LBE247:
-.LBE246:
-	.loc 2 181 0
 	stp	x21, x22, [sp, 32]
-.LBB250:
-.LBB248:
-	.loc 2 89 0
 	add	x19, x19, :lo12:.LANCHOR38
-	.cfi_offset 21, -32
-	.cfi_offset 22, -24
-.LBE248:
-.LBE250:
-.LBB251:
-	.loc 2 195 0
 	adrp	x21, .LANCHOR75
-.LBE251:
-	.loc 2 181 0
 	str	x23, [sp, 48]
-	.cfi_offset 23, -16
-.LBB252:
-	.loc 2 195 0
 	add	x21, x21, :lo12:.LANCHOR75
-.LBE252:
-	.loc 2 203 0
 	adrp	x23, .LC83
 	add	x23, x23, :lo12:.LC83
-.LVL717:
 .L464:
-.LBB253:
-.LBB249:
-	.loc 2 89 0
 	ldrh	w1, [x19, 6]
-.LBE249:
-.LBE253:
-	.loc 2 186 0
 	cbz	w1, .L465
-	.loc 2 187 0
 	ldrh	w0, [x19, 2]
-	.loc 2 188 0
 	sub	w1, w1, #1
 	strh	w1, [x19, 6]
-	.loc 2 187 0
 	add	x2, x19, x0, sxtw 1
-	.loc 2 189 0
 	add	w0, w0, 1
 	and	w0, w0, 1023
 	strh	w0, [x19, 2]
-	.loc 2 187 0
 	ldrh	w20, [x2, 8]
-.LVL718:
-.LBB254:
-	.loc 2 191 0
 	mov	w0, w20
 	bl	P2V_block_in_plane
-.LVL719:
 	and	w22, w0, 65535
-.LVL720:
-	.loc 2 192 0
 	adrp	x0, .LANCHOR111
-.LVL721:
 	lsl	w1, w20, 10
-	.loc 2 193 0
 	mov	w2, 1
-	.loc 2 192 0
 	ldr	x0, [x0, #:lo12:.LANCHOR111]
 	str	w1, [x0, 4]
-	.loc 2 193 0
 	mov	w1, w2
 	bl	FlashEraseBlocks
-.LVL722:
-	.loc 2 194 0
 	adrp	x1, .LANCHOR43
 	ubfiz	x0, x22, 1, 16
 	ldr	x2, [x1, #:lo12:.LANCHOR43]
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-	.loc 2 195 0
 	ldr	w0, [x21]
-.LBE254:
-	.loc 2 202 0
 	sub	w1, w20, #1
-.LBB255:
-	.loc 2 195 0
 	add	w0, w0, 1
 	str	w0, [x21]
-.LBE255:
-	.loc 2 202 0
 	mov	w0, 65533
 	cmp	w0, w1, uxth
 	bcc	.L466
-	.loc 2 208 0
 	mov	w0, w20
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
-.LVL723:
 	ldp	x21, x22, [sp, 32]
-.LVL724:
 	ldp	x29, x30, [sp], 64
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 23
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL725:
 .L465:
-	.cfi_restore_state
-	.loc 2 199 0
 	adrp	x0, .LC82
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC82
 	bl	printf
-.LVL726:
 .L468:
 	b	.L468
-.LVL727:
 .L466:
-	.loc 2 203 0
 	ldrh	w2, [x19, 6]
 	mov	w1, w20
 	mov	x0, x23
 	bl	printf
-.LVL728:
-	.loc 2 205 0
 	b	.L464
-	.cfi_endproc
-.LFE243:
 	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
 	.section	.text.ftl_map_blk_alloc_new_blk,"ax",@progbits
 	.align	2
 	.global	ftl_map_blk_alloc_new_blk
 	.type	ftl_map_blk_alloc_new_blk, %function
 ftl_map_blk_alloc_new_blk:
-.LFB255:
-	.loc 2 562 0
-	.cfi_startproc
-.LVL729:
 	stp	x29, x30, [sp, -48]!
-	.cfi_def_cfa_offset 48
-	.cfi_offset 29, -48
-	.cfi_offset 30, -40
-.LVL730:
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
 	mov	x19, x0
-	.loc 2 566 0
 	ldrh	w1, [x0, 10]
 	mov	w20, 0
 	ldr	x0, [x0, 16]
-.LVL731:
-	.loc 2 562 0
 	str	x21, [sp, 32]
-	.cfi_offset 21, -16
-.LVL732:
 .L472:
-	.loc 2 566 0 discriminator 1
 	cmp	w20, w1
 	beq	.L476
-	.loc 2 567 0
 	mov	x21, x0
 	ldrh	w2, [x0], 2
 	cbnz	w2, .L473
-	.loc 2 568 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL733:
 	and	w1, w0, 65535
 	strh	w0, [x21]
-	.loc 2 569 0
 	sub	w2, w1, #1
 	mov	w0, 65533
 	cmp	w0, w2, uxth
 	bcs	.L474
-	.loc 2 570 0
 	adrp	x0, .LANCHOR38+6
 	ldrh	w2, [x0, #:lo12:.LANCHOR38+6]
 	adrp	x0, .LC84
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.LVL734:
 .L475:
 	b	.L475
 .L474:
-	.loc 2 576 0
 	ldr	w0, [x19, 48]
-	.loc 2 574 0
 	strh	wzr, [x19, 2]
-	.loc 2 576 0
 	add	w0, w0, 1
 	str	w0, [x19, 48]
-	.loc 2 577 0
 	ldrh	w0, [x19, 8]
-	.loc 2 575 0
 	strh	w20, [x19]
-	.loc 2 577 0
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
 .L476:
-	.loc 2 581 0
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
 	bhi	.L478
-.LVL735:
-.LBB258:
-.LBB259:
 	adrp	x1, .LANCHOR116
 	adrp	x0, .LC1
 	mov	w2, 581
 	add	x1, x1, :lo12:.LANCHOR116
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL736:
 .L478:
-.LBE259:
-.LBE258:
-	.loc 2 583 0
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
-.LVL737:
 	ldp	x29, x30, [sp], 48
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 21
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL738:
 .L473:
-	.cfi_restore_state
-	.loc 2 566 0 discriminator 2
 	add	w20, w20, 1
-.LVL739:
 	and	w20, w20, 65535
-.LVL740:
 	b	.L472
-	.cfi_endproc
-.LFE255:
 	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
 	.section	.text.ftl_memset,"ax",@progbits
 	.align	2
 	.global	ftl_memset
 	.type	ftl_memset, %function
 ftl_memset:
-.LFB346:
-	.loc 1 242 0
-	.cfi_startproc
-.LVL741:
-	.loc 1 243 0
 	uxtw	x2, w2
 	b	memset
-.LVL742:
-	.cfi_endproc
-.LFE346:
 	.size	ftl_memset, .-ftl_memset
 	.section	.text.FtlMemInit,"ax",@progbits
 	.align	2
 	.global	FtlMemInit
 	.type	FtlMemInit, %function
 FtlMemInit:
-.LFB206:
-	.loc 3 280 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -208]!
-	.cfi_def_cfa_offset 208
-	.cfi_offset 29, -208
-	.cfi_offset 30, -200
-	.loc 3 283 0
 	adrp	x0, .LANCHOR70
-	.loc 3 298 0
 	mov	w1, 65535
-	.loc 3 280 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 3 283 0
 	str	wzr, [x0, #:lo12:.LANCHOR70]
-	.loc 3 284 0
 	adrp	x0, .LANCHOR71
-	.loc 3 280 0
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -192
-	.cfi_offset 20, -184
-	.loc 3 311 0
 	adrp	x19, .LANCHOR21
-	.loc 3 284 0
 	str	wzr, [x0, #:lo12:.LANCHOR71]
-	.loc 3 285 0
 	adrp	x0, .LANCHOR67
-	.loc 3 280 0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -176
-	.cfi_offset 22, -168
-	.loc 3 313 0
 	adrp	x22, .LANCHOR3
-	.loc 3 285 0
 	str	wzr, [x0, #:lo12:.LANCHOR67]
-	.loc 3 286 0
 	adrp	x0, .LANCHOR64
-	.loc 3 280 0
 	stp	x23, x24, [sp, 48]
-	.loc 3 320 0
 	adrp	x21, .LANCHOR23
-	.loc 3 286 0
 	str	wzr, [x0, #:lo12:.LANCHOR64]
-	.loc 3 287 0
 	adrp	x0, .LANCHOR63
-	.loc 3 280 0
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 23, -160
-	.cfi_offset 24, -152
-	.cfi_offset 25, -144
-	.cfi_offset 26, -136
-	.loc 3 331 0
 	adrp	x24, .LANCHOR108
-	.loc 3 287 0
 	str	wzr, [x0, #:lo12:.LANCHOR63]
-	.loc 3 288 0
 	adrp	x0, .LANCHOR65
-	.loc 3 280 0
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 27, -128
-	.cfi_offset 28, -120
-	.loc 3 332 0
 	adrp	x23, .LANCHOR114
-	.loc 3 288 0
 	str	wzr, [x0, #:lo12:.LANCHOR65]
-	.loc 3 289 0
 	adrp	x0, .LANCHOR66
-	.loc 3 350 0
 	adrp	x25, .LANCHOR42
-	.loc 3 352 0
 	adrp	x27, .LANCHOR129
-	.loc 3 289 0
 	str	wzr, [x0, #:lo12:.LANCHOR66]
-	.loc 3 290 0
 	adrp	x0, .LANCHOR62
-	.loc 3 353 0
 	adrp	x26, .LANCHOR130
-	.loc 3 290 0
 	str	wzr, [x0, #:lo12:.LANCHOR62]
-	.loc 3 291 0
 	adrp	x0, .LANCHOR72
 	str	wzr, [x0, #:lo12:.LANCHOR72]
-	.loc 3 292 0
 	adrp	x0, .LANCHOR73
 	str	wzr, [x0, #:lo12:.LANCHOR73]
-	.loc 3 293 0
 	adrp	x0, .LANCHOR75
 	str	wzr, [x0, #:lo12:.LANCHOR75]
-	.loc 3 294 0
 	adrp	x0, .LANCHOR76
 	str	wzr, [x0, #:lo12:.LANCHOR76]
-	.loc 3 295 0
 	adrp	x0, .LANCHOR77
 	str	wzr, [x0, #:lo12:.LANCHOR77]
-	.loc 3 296 0
 	adrp	x0, .LANCHOR117
 	str	wzr, [x0, #:lo12:.LANCHOR117]
-	.loc 3 297 0
 	adrp	x0, .LANCHOR87
 	str	wzr, [x0, #:lo12:.LANCHOR87]
-	.loc 3 298 0
 	adrp	x0, .LANCHOR118
 	str	w1, [x0, #:lo12:.LANCHOR118]
-	.loc 3 299 0
 	adrp	x0, .LANCHOR119
-	.loc 3 302 0
 	adrp	x1, .LANCHOR99
-	.loc 3 299 0
 	str	wzr, [x0, #:lo12:.LANCHOR119]
-	.loc 3 300 0
 	adrp	x0, .LANCHOR84
 	str	wzr, [x0, #:lo12:.LANCHOR84]
-	.loc 3 301 0
 	adrp	x0, .LANCHOR112
 	str	wzr, [x0, #:lo12:.LANCHOR112]
-	.loc 3 302 0
 	mov	w0, -1
 	strh	w0, [x1, #:lo12:.LANCHOR99]
-	.loc 3 303 0
 	adrp	x1, .LANCHOR100
 	strh	w0, [x1, #:lo12:.LANCHOR100]
-	.loc 3 304 0
 	adrp	x0, .LANCHOR82
 	mov	w1, 32
 	strh	w1, [x0, #:lo12:.LANCHOR82]
-	.loc 3 305 0
 	adrp	x0, .LANCHOR83
 	mov	w1, 128
 	strh	w1, [x0, #:lo12:.LANCHOR83]
-	.loc 3 306 0
 	adrp	x0, .LANCHOR85
 	strh	wzr, [x0, #:lo12:.LANCHOR85]
-	.loc 3 307 0
 	adrp	x0, .LANCHOR101
 	strh	wzr, [x0, #:lo12:.LANCHOR101]
-	.loc 3 308 0
 	adrp	x0, .LANCHOR103
 	strh	wzr, [x0, #:lo12:.LANCHOR103]
-	.loc 3 311 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR21]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-.LVL743:
 	adrp	x1, .LANCHOR96
 	str	x0, [x1, #:lo12:.LANCHOR96]
-	.loc 3 312 0
 	mov	w0, 12
 	ldrh	w1, [x19, #:lo12:.LANCHOR21]
 	mul	w0, w1, w0
 	bl	ftl_malloc
-.LVL744:
-	.loc 3 313 0
 	ldrh	w19, [x22, #:lo12:.LANCHOR3]
-	.loc 3 312 0
 	adrp	x3, .LANCHOR98
 	str	x3, [x29, 104]
-	.loc 3 313 0
 	lsl	w20, w19, 5
-.LVL745:
-	.loc 3 314 0
 	lsl	w19, w19, 7
-	.loc 3 312 0
 	str	x0, [x3, #:lo12:.LANCHOR98]
-	.loc 3 314 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL746:
 	adrp	x15, .LANCHOR120
 	str	x15, [x29, 112]
 	str	x0, [x15, #:lo12:.LANCHOR120]
-	.loc 3 315 0
 	mov	w0, w20
 	bl	ftl_malloc
-.LVL747:
 	adrp	x11, .LANCHOR121
 	str	x11, [x29, 120]
 	str	x0, [x11, #:lo12:.LANCHOR121]
-	.loc 3 316 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL748:
 	adrp	x14, .LANCHOR122
 	str	x14, [x29, 128]
 	str	x0, [x14, #:lo12:.LANCHOR122]
-	.loc 3 317 0
 	mov	w0, w20
 	bl	ftl_malloc
-.LVL749:
 	adrp	x13, .LANCHOR111
 	str	x13, [x29, 136]
 	str	x0, [x13, #:lo12:.LANCHOR111]
-	.loc 3 318 0
 	mov	w0, w20
 	bl	ftl_malloc
-.LVL750:
-	.loc 3 321 0
 	adrp	x20, .LANCHOR94
-.LVL751:
-	.loc 3 318 0
 	adrp	x12, .LANCHOR93
-	.loc 3 320 0
 	ldrh	w19, [x21, #:lo12:.LANCHOR23]
-.LVL752:
-	.loc 3 318 0
 	str	x12, [x29, 144]
 	str	x0, [x12, #:lo12:.LANCHOR93]
-	.loc 3 321 0
 	ldrh	w0, [x22, #:lo12:.LANCHOR3]
 	lsl	w0, w0, 1
 	add	w0, w0, 1
 	str	w0, [x20, #:lo12:.LANCHOR94]
-	.loc 3 322 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL753:
 	adrp	x10, .LANCHOR107
 	str	x10, [x29, 152]
 	str	x0, [x10, #:lo12:.LANCHOR107]
-	.loc 3 323 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL754:
 	adrp	x8, .LANCHOR123
 	str	x8, [x29, 160]
 	str	x0, [x8, #:lo12:.LANCHOR123]
-	.loc 3 324 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL755:
 	adrp	x7, .LANCHOR124
 	str	x7, [x29, 168]
 	str	x0, [x7, #:lo12:.LANCHOR124]
-	.loc 3 325 0
 	ldr	w0, [x20, #:lo12:.LANCHOR94]
 	mul	w0, w19, w0
 	bl	ftl_malloc
-.LVL756:
 	adrp	x6, .LANCHOR91
 	str	x6, [x29, 176]
 	str	x0, [x6, #:lo12:.LANCHOR91]
-	.loc 3 326 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL757:
 	adrp	x5, .LANCHOR115
 	str	x5, [x29, 184]
 	str	x0, [x5, #:lo12:.LANCHOR115]
-	.loc 3 327 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL758:
-	.loc 3 330 0
 	adrp	x19, .LANCHOR24
-.LVL759:
-	.loc 3 327 0
 	adrp	x4, .LANCHOR113
-	.loc 3 328 0
 	ldr	w2, [x20, #:lo12:.LANCHOR94]
-	.loc 3 327 0
 	str	x4, [x29, 192]
 	str	x0, [x4, #:lo12:.LANCHOR113]
-	.loc 3 328 0
 	mov	w0, 24
 	mul	w0, w2, w0
 	bl	ftl_malloc
-.LVL760:
-	.loc 3 330 0
 	ldrh	w28, [x19, #:lo12:.LANCHOR24]
-	.loc 3 328 0
 	adrp	x1, .LANCHOR90
 	str	x0, [x1, #:lo12:.LANCHOR90]
-	.loc 3 330 0
 	ldrh	w0, [x22, #:lo12:.LANCHOR3]
-	.loc 3 333 0
 	adrp	x22, .LANCHOR92
-	.loc 3 330 0
 	mul	w28, w28, w0
-.LVL761:
-	.loc 3 331 0
 	mov	w0, w28
 	bl	ftl_malloc
-.LVL762:
 	str	x0, [x24, #:lo12:.LANCHOR108]
-	.loc 3 332 0
 	lsl	w0, w28, 2
 	bl	ftl_malloc
-.LVL763:
 	str	x0, [x23, #:lo12:.LANCHOR114]
-	.loc 3 333 0
 	ldrh	w1, [x19, #:lo12:.LANCHOR24]
-	.loc 3 336 0
 	adrp	x28, .LANCHOR125
-.LVL764:
-	.loc 3 333 0
 	ldr	w0, [x20, #:lo12:.LANCHOR94]
-	.loc 3 336 0
 	adrp	x20, .LANCHOR6
-	.loc 3 333 0
 	mul	w0, w1, w0
 	bl	ftl_malloc
-.LVL765:
 	str	x0, [x22, #:lo12:.LANCHOR92]
-	.loc 3 336 0
 	ldrh	w0, [x20, #:lo12:.LANCHOR6]
 	ubfiz	w0, w0, 1, 15
 	strh	w0, [x28, #:lo12:.LANCHOR125]
-	.loc 3 337 0
 	and	w0, w0, 65534
 	bl	ftl_malloc
-.LVL766:
 	adrp	x1, .LANCHOR126
 	str	x0, [x1, #:lo12:.LANCHOR126]
-	.loc 3 338 0
 	ldrh	w0, [x28, #:lo12:.LANCHOR125]
 	add	x0, x0, 547
 	lsr	x0, x0, 9
 	strh	w0, [x28, #:lo12:.LANCHOR125]
-	.loc 3 339 0
 	lsl	w0, w0, 9
 	bl	ftl_malloc
-.LVL767:
 	adrp	x1, .LANCHOR127
-	.loc 3 346 0
 	ldrh	w28, [x20, #:lo12:.LANCHOR6]
-	.loc 3 339 0
 	str	x0, [x1, #:lo12:.LANCHOR127]
-	.loc 3 340 0
 	adrp	x1, .LANCHOR43
-	.loc 3 346 0
 	lsl	w28, w28, 1
-	.loc 3 340 0
 	add	x0, x0, 32
 	str	x0, [x1, #:lo12:.LANCHOR43]
-.LVL768:
-	.loc 3 348 0
 	mov	w0, w28
 	bl	ftl_malloc
-.LVL769:
 	adrp	x1, .LANCHOR128
 	str	x0, [x1, #:lo12:.LANCHOR128]
-	.loc 3 350 0
 	mov	w0, w28
-	.loc 3 351 0
 	adrp	x28, .LANCHOR30
-.LVL770:
-	.loc 3 350 0
 	bl	ftl_malloc
-.LVL771:
 	str	x0, [x25, #:lo12:.LANCHOR42]
-.LVL772:
-	.loc 3 351 0
 	ldr	w1, [x28, #:lo12:.LANCHOR30]
 	lsl	w19, w1, 1
-	.loc 3 352 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL773:
 	str	x0, [x27, #:lo12:.LANCHOR129]
-	.loc 3 353 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL774:
 	str	x0, [x26, #:lo12:.LANCHOR130]
-	.loc 3 354 0
 	ldrh	w0, [x20, #:lo12:.LANCHOR6]
-	.loc 3 355 0
 	adrp	x19, .LANCHOR27
-	.loc 3 354 0
 	lsr	w0, w0, 3
 	add	w0, w0, 4
 	bl	ftl_malloc
-.LVL775:
 	adrp	x1, .LANCHOR1
 	str	x0, [x1, #:lo12:.LANCHOR1]
-	.loc 3 355 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR27]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-.LVL776:
 	adrp	x2, .LANCHOR36
 	str	x0, [x2, #:lo12:.LANCHOR36]
-	.loc 3 356 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR27]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-.LVL777:
 	adrp	x2, .LANCHOR131
 	str	x0, [x2, #:lo12:.LANCHOR131]
-	.loc 3 357 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR27]
 	adrp	x19, .LANCHOR43
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-.LVL778:
 	adrp	x1, .LANCHOR132
 	str	x0, [x1, #:lo12:.LANCHOR132]
-	.loc 3 358 0
 	adrp	x1, .LANCHOR28
 	str	x1, [x29, 200]
 	ldrh	w0, [x1, #:lo12:.LANCHOR28]
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-.LVL779:
-	.loc 3 359 0
 	ldr	x1, [x29, 200]
-	.loc 3 358 0
 	adrp	x2, .LANCHOR133
 	str	x0, [x2, #:lo12:.LANCHOR133]
-	.loc 3 359 0
 	ldrh	w2, [x1, #:lo12:.LANCHOR28]
 	mov	w1, 0
 	lsl	w2, w2, 2
 	bl	ftl_memset
-.LVL780:
-	.loc 3 361 0
 	adrp	x0, .LANCHOR32
 	ldrh	w0, [x0, #:lo12:.LANCHOR32]
-	.loc 3 362 0
 	lsl	w0, w0, 2
-.LVL781:
 	bl	ftl_malloc
-.LVL782:
 	adrp	x1, .LANCHOR134
 	str	x0, [x1, #:lo12:.LANCHOR134]
-.LVL783:
-	.loc 3 363 0
 	ldr	w0, [x28, #:lo12:.LANCHOR30]
-	.loc 3 365 0
 	adrp	x28, .LANCHOR33
-	.loc 3 364 0
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-.LVL784:
 	adrp	x1, .LANCHOR135
 	str	x0, [x1, #:lo12:.LANCHOR135]
-.LVL785:
-	.loc 3 365 0
 	ldrh	w0, [x28, #:lo12:.LANCHOR33]
-	.loc 3 366 0
 	lsl	w0, w0, 4
-.LVL786:
 	bl	ftl_malloc
-.LVL787:
 	adrp	x1, .LANCHOR55
 	str	x0, [x1, #:lo12:.LANCHOR55]
-.LVL788:
-	.loc 3 367 0
 	ldrh	w1, [x28, #:lo12:.LANCHOR33]
 	ldrh	w0, [x21, #:lo12:.LANCHOR23]
-	.loc 3 372 0
 	adrp	x21, .LANCHOR10
-	.loc 3 368 0
 	mul	w0, w1, w0
-.LVL789:
 	bl	ftl_malloc
-.LVL790:
 	adrp	x1, .LANCHOR136
 	str	x0, [x1, #:lo12:.LANCHOR136]
-.LVL791:
-	.loc 3 370 0
 	mov	w0, 6
-	.loc 3 369 0
 	ldrh	w1, [x20, #:lo12:.LANCHOR6]
-	.loc 3 371 0
 	adrp	x20, .LANCHOR137
-	.loc 3 370 0
 	mul	w0, w1, w0
-.LVL792:
 	bl	ftl_malloc
-.LVL793:
 	adrp	x1, .LANCHOR40
 	str	x0, [x1, #:lo12:.LANCHOR40]
-	.loc 3 371 0
 	adrp	x0, .LANCHOR17
-	.loc 3 372 0
 	ldrh	w1, [x21, #:lo12:.LANCHOR10]
-	.loc 3 371 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR17]
 	add	w0, w0, 31
 	asr	w0, w0, 5
 	strh	w0, [x20, #:lo12:.LANCHOR137]
-.LVL794:
-	.loc 3 372 0
 	mul	w0, w1, w0
-.LVL795:
-	.loc 3 373 0
 	lsl	w0, w0, 2
-.LVL796:
 	bl	ftl_malloc
-.LVL797:
 	ldp	x3, x15, [x29, 104]
 	adrp	x1, .LANCHOR37
-	.loc 3 375 0
 	ldrh	w20, [x20, #:lo12:.LANCHOR137]
-	.loc 3 373 0
 	add	x2, x1, :lo12:.LANCHOR37
 	ldp	x11, x14, [x29, 120]
-	.loc 3 374 0
 	mov	w30, w20
 	ldp	x13, x12, [x29, 136]
 	mov	x16, x3
 	ldp	x10, x8, [x29, 152]
-	.loc 3 373 0
 	str	x0, [x2, 32]
-.LVL798:
 	ldp	x7, x6, [x29, 168]
 	adrp	x17, .LANCHOR96
 	ldp	x5, x4, [x29, 184]
 	adrp	x3, .LANCHOR90
-	.loc 3 374 0
 	ldrh	w28, [x21, #:lo12:.LANCHOR10]
 	add	x21, x2, 40
 	mov	x0, 1
 	str	x19, [x29, 200]
-.LVL799:
 .L482:
-	.loc 3 374 0 is_stmt 0 discriminator 1
 	cmp	w0, w28
 	bcc	.L483
 	mov	w2, 8
 	sub	w2, w2, w0
 	add	x2, x2, 1
-	.loc 3 380 0 is_stmt 1
 	add	x1, x1, :lo12:.LANCHOR37
-	.loc 3 374 0
 	mov	x19, 0
 .L484:
 	add	x19, x19, 1
-	.loc 3 378 0 discriminator 1
 	cmp	x19, x2
 	bne	.L485
-	.loc 3 384 0
 	ldr	x0, [x27, #:lo12:.LANCHOR129]
 	cbnz	x0, .L486
 .L488:
-	.loc 3 386 0
 	adrp	x1, .LANCHOR138
 	adrp	x0, .LC85
 	add	x1, x1, :lo12:.LANCHOR138
 	add	x0, x0, :lo12:.LC85
 	bl	printf
-.LVL800:
-	.loc 3 387 0
 	mov	w0, -1
 .L481:
-	.loc 3 485 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 208
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
 .L483:
-	.cfi_restore_state
-	.loc 3 375 0 discriminator 3
 	ldr	x19, [x2, 32]
-	.loc 3 374 0 discriminator 3
 	add	w0, w0, 1
-	.loc 3 375 0 discriminator 3
 	add	x19, x19, x30, uxtw 2
 	add	w30, w30, w20
 	str	x19, [x21], 8
 	b	.L482
 .L485:
-	.loc 3 380 0 discriminator 2
 	add	x20, x0, x19
 	add	x20, x1, x20, lsl 3
 	str	xzr, [x20, 24]
 	b	.L484
 .L486:
-	.loc 3 389 0
 	ldr	x0, [x26, #:lo12:.LANCHOR130]
 	cbz	x0, .L488
-	.loc 3 394 0
 	adrp	x0, .LANCHOR134
 	ldr	x0, [x0, #:lo12:.LANCHOR134]
 	cbz	x0, .L488
-	.loc 3 399 0
 	adrp	x0, .LANCHOR135
 	ldr	x0, [x0, #:lo12:.LANCHOR135]
 	cbz	x0, .L488
-	.loc 3 405 0
 	adrp	x0, .LANCHOR55
 	ldr	x0, [x0, #:lo12:.LANCHOR55]
 	cbz	x0, .L488
-	.loc 3 410 0
 	adrp	x0, .LANCHOR136
 	ldr	x0, [x0, #:lo12:.LANCHOR136]
 	cbz	x0, .L488
-	.loc 3 415 0
 	adrp	x0, .LANCHOR40
 	ldr	x0, [x0, #:lo12:.LANCHOR40]
 	cbz	x0, .L488
-	.loc 3 420 0
 	adrp	x0, .LANCHOR37+32
 	ldr	x0, [x0, #:lo12:.LANCHOR37+32]
 	cbz	x0, .L488
-	.loc 3 426 0
 	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	cbz	x0, .L488
-	.loc 3 431 0
 	ldr	x0, [x17, #:lo12:.LANCHOR96]
 	cbz	x0, .L488
-	.loc 3 431 0 is_stmt 0 discriminator 1
 	ldr	x0, [x16, #:lo12:.LANCHOR98]
 	cbz	x0, .L488
-	.loc 3 436 0 is_stmt 1
 	ldr	x0, [x15, #:lo12:.LANCHOR120]
 	cbz	x0, .L488
-	.loc 3 436 0 is_stmt 0 discriminator 1
 	ldr	x0, [x14, #:lo12:.LANCHOR122]
 	cbz	x0, .L488
-	.loc 3 436 0 discriminator 2
 	ldr	x0, [x13, #:lo12:.LANCHOR111]
 	cbz	x0, .L488
-	.loc 3 436 0 discriminator 3
 	ldr	x0, [x12, #:lo12:.LANCHOR93]
 	cbz	x0, .L488
-	.loc 3 436 0 discriminator 4
 	ldr	x0, [x11, #:lo12:.LANCHOR121]
 	cbz	x0, .L488
-	.loc 3 441 0 is_stmt 1
 	ldr	x0, [x10, #:lo12:.LANCHOR107]
 	cbz	x0, .L488
-	.loc 3 441 0 is_stmt 0 discriminator 1
 	ldr	x0, [x8, #:lo12:.LANCHOR123]
 	cbz	x0, .L488
-	.loc 3 441 0 discriminator 2
 	ldr	x0, [x7, #:lo12:.LANCHOR124]
 	cbz	x0, .L488
-	.loc 3 441 0 discriminator 3
 	ldr	x0, [x6, #:lo12:.LANCHOR91]
 	cbz	x0, .L488
-	.loc 3 442 0 is_stmt 1
 	ldr	x0, [x5, #:lo12:.LANCHOR115]
 	cbz	x0, .L488
-	.loc 3 442 0 is_stmt 0 discriminator 1
 	ldr	x0, [x4, #:lo12:.LANCHOR113]
 	cbz	x0, .L488
-	.loc 3 442 0 discriminator 2
 	ldr	x0, [x3, #:lo12:.LANCHOR90]
 	cbz	x0, .L488
-	.loc 3 447 0 is_stmt 1
 	ldr	x0, [x24, #:lo12:.LANCHOR108]
 	cbz	x0, .L488
-	.loc 3 447 0 is_stmt 0 discriminator 1
 	ldr	x0, [x23, #:lo12:.LANCHOR114]
 	cbz	x0, .L488
-	.loc 3 447 0 discriminator 2
 	ldr	x0, [x22, #:lo12:.LANCHOR92]
 	cbz	x0, .L488
-	.loc 3 453 0 is_stmt 1
 	ldr	x0, [x29, 200]
 	ldr	x0, [x0, #:lo12:.LANCHOR43]
 	cbz	x0, .L488
-	.loc 3 453 0 is_stmt 0 discriminator 1
 	adrp	x0, .LANCHOR126
 	ldr	x0, [x0, #:lo12:.LANCHOR126]
 	cbz	x0, .L488
-	.loc 3 459 0 is_stmt 1
 	adrp	x0, .LANCHOR36
 	ldr	x0, [x0, #:lo12:.LANCHOR36]
 	cbz	x0, .L488
-	.loc 3 465 0
 	adrp	x0, .LANCHOR131
 	ldr	x0, [x0, #:lo12:.LANCHOR131]
 	cbz	x0, .L488
-	.loc 3 471 0
 	adrp	x0, .LANCHOR132
 	ldr	x0, [x0, #:lo12:.LANCHOR132]
 	cbz	x0, .L488
-	.loc 3 477 0
 	adrp	x0, .LANCHOR133
 	ldr	x0, [x0, #:lo12:.LANCHOR133]
 	cbz	x0, .L488
-	.loc 3 484 0
 	mov	w0, 0
 	b	.L481
-	.cfi_endproc
-.LFE206:
 	.size	FtlMemInit, .-FtlMemInit
 	.section	.text.FtlBbt2Bitmap,"ax",@progbits
 	.align	2
 	.global	FtlBbt2Bitmap
 	.type	FtlBbt2Bitmap, %function
 FtlBbt2Bitmap:
-.LFB225:
-	.loc 4 66 0
-	.cfi_startproc
-.LVL801:
 	stp	x29, x30, [sp, -64]!
-	.cfi_def_cfa_offset 64
-	.cfi_offset 29, -64
-	.cfi_offset 30, -56
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -32
-	.cfi_offset 22, -24
 	mov	x22, x0
-	.loc 4 69 0
 	adrp	x0, .LANCHOR137
-.LVL802:
-	.loc 4 66 0
 	stp	x23, x24, [sp, 48]
-	.loc 4 74 0
 	adrp	x21, .LANCHOR17
-	.cfi_offset 23, -16
-	.cfi_offset 24, -8
 	adrp	x23, .LANCHOR139
-	.loc 4 69 0
 	ldrh	w2, [x0, #:lo12:.LANCHOR137]
-	.loc 4 74 0
 	add	x21, x21, :lo12:.LANCHOR17
 	add	x23, x23, :lo12:.LANCHOR139
-	.loc 4 66 0
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -48
-	.cfi_offset 20, -40
-	.loc 4 72 0
 	mov	w24, 65535
-	.loc 4 69 0
 	mov	x19, 0
-	.loc 4 66 0
 	mov	x20, x1
-	.loc 4 69 0
 	lsl	w2, w2, 2
 	mov	w1, 0
-.LVL803:
 	mov	x0, x20
 	bl	ftl_memset
-.LVL804:
 .L586:
-	.loc 4 72 0
 	ldrh	w0, [x22, x19]
 	cmp	w0, w24
 	beq	.L583
-	.loc 4 74 0
 	ldrh	w1, [x21]
 	cmp	w1, w0
 	bhi	.L585
-	.loc 4 74 0 is_stmt 0 discriminator 1
 	adrp	x0, .LC1
 	mov	w2, 74
 	mov	x1, x23
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL805:
 .L585:
-	.loc 4 75 0 is_stmt 1 discriminator 2
 	ldrh	w2, [x22, x19]
 	mov	w1, 1
 	add	x19, x19, 2
-	.loc 4 70 0 discriminator 2
 	cmp	x19, 1024
-	.loc 4 75 0 discriminator 2
 	ubfx	x0, x2, 5, 11
 	lsl	w2, w1, w2
 	lsl	x0, x0, 2
 	ldr	w1, [x20, x0]
 	orr	w1, w1, w2
 	str	w1, [x20, x0]
-	.loc 4 70 0 discriminator 2
 	bne	.L586
 .L583:
-	.loc 4 77 0
 	ldp	x19, x20, [sp, 16]
-.LVL806:
 	ldp	x21, x22, [sp, 32]
-.LVL807:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE225:
 	.size	FtlBbt2Bitmap, .-FtlBbt2Bitmap
 	.section	.text.FtlBbtMemInit,"ax",@progbits
 	.align	2
 	.global	FtlBbtMemInit
 	.type	FtlBbtMemInit, %function
 FtlBbtMemInit:
-.LFB227:
-	.loc 4 149 0
-	.cfi_startproc
-	.loc 4 150 0
 	adrp	x1, .LANCHOR37
 	add	x0, x1, :lo12:.LANCHOR37
 	mov	w2, -1
-	.loc 4 152 0
 	add	x0, x0, 12
-	.loc 4 150 0
 	strh	w2, [x1, #:lo12:.LANCHOR37]
-	.loc 4 152 0
 	mov	w2, 16
-	.loc 4 151 0
 	strh	wzr, [x0, -6]
-	.loc 4 152 0
 	mov	w1, 255
 	b	ftl_memset
-.LVL808:
-	.cfi_endproc
-.LFE227:
 	.size	FtlBbtMemInit, .-FtlBbtMemInit
 	.section	.text.FtlFreeSysBlkQueueInit,"ax",@progbits
 	.align	2
 	.global	FtlFreeSysBlkQueueInit
 	.type	FtlFreeSysBlkQueueInit, %function
 FtlFreeSysBlkQueueInit:
-.LFB237:
-	.loc 2 76 0
-	.cfi_startproc
-.LVL809:
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
-	.loc 2 79 0
 	adrp	x1, .LANCHOR38
 	add	x3, x1, :lo12:.LANCHOR38
-	.loc 2 83 0
 	mov	w2, 2048
-	.loc 2 76 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 2 82 0
 	strh	w0, [x1, #:lo12:.LANCHOR38]
-	.loc 2 83 0
 	mov	w1, 0
-	.loc 2 79 0
 	strh	wzr, [x3, 2]
-	.loc 2 83 0
 	add	x0, x3, 8
-.LVL810:
-	.loc 2 80 0
 	strh	wzr, [x3, 4]
-	.loc 2 81 0
 	strh	wzr, [x3, 6]
-	.loc 2 83 0
 	bl	ftl_memset
-.LVL811:
-	.loc 2 85 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE237:
 	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
 	.section	.text.load_l2p_region,"ax",@progbits
 	.align	2
 	.global	load_l2p_region
 	.type	load_l2p_region, %function
 load_l2p_region:
-.LFB253:
-	.loc 2 488 0
-	.cfi_startproc
-.LVL812:
 	stp	x29, x30, [sp, -80]!
-	.cfi_def_cfa_offset 80
-	.cfi_offset 29, -80
-	.cfi_offset 30, -72
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -32
-	.cfi_offset 24, -24
-	.loc 2 492 0
 	adrp	x23, .LANCHOR32
-	.loc 2 488 0
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -64
-	.cfi_offset 20, -56
 	and	x19, x1, 65535
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -48
-	.cfi_offset 22, -40
 	and	w21, w0, 65535
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 25, -16
-	.cfi_offset 26, -8
-	.loc 2 492 0
 	ldrh	w0, [x23, #:lo12:.LANCHOR32]
-.LVL813:
 	cmp	w0, w21
 	bcs	.L594
-	.loc 2 492 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR140
-.LVL814:
 	adrp	x0, .LC1
 	mov	w2, 492
 	add	x1, x1, :lo12:.LANCHOR140
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL815:
 .L594:
-	.loc 2 493 0 is_stmt 1
 	adrp	x26, .LANCHOR134
 	ubfiz	x0, x21, 2, 16
 	adrp	x22, .LANCHOR55
 	ldr	x1, [x26, #:lo12:.LANCHOR134]
 	ldr	w24, [x1, x0]
-.LVL816:
-	.loc 2 495 0
 	cbnz	w24, .L595
-	.loc 2 496 0
 	ldr	x0, [x22, #:lo12:.LANCHOR55]
 	lsl	x19, x19, 4
-.LVL817:
 	adrp	x1, .LANCHOR23
 	add	x0, x0, x19
 	ldrh	w2, [x1, #:lo12:.LANCHOR23]
 	mov	w1, 255
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-.LVL818:
-	.loc 2 497 0
 	ldr	x0, [x22, #:lo12:.LANCHOR55]
 	add	x1, x0, x19
 	strh	w21, [x0, x19]
-	.loc 2 498 0
 	str	wzr, [x1, 4]
 .L596:
-	.loc 2 519 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-.LVL819:
 	ldp	x23, x24, [sp, 48]
-.LVL820:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL821:
 .L595:
-	.cfi_restore_state
-	.loc 2 502 0
 	ldr	x0, [x22, #:lo12:.LANCHOR55]
 	lsl	x19, x19, 4
-	.loc 2 501 0
 	adrp	x20, .LANCHOR106
 	add	x20, x20, :lo12:.LANCHOR106
-	.loc 2 502 0
 	add	x0, x0, x19
-	.loc 2 504 0
 	mov	w2, 1
 	mov	w1, w2
-	.loc 2 501 0
 	str	w24, [x20, 4]
-	.loc 2 502 0
 	ldr	x0, [x0, 8]
 	str	x0, [x20, 8]
-	.loc 2 503 0
 	adrp	x0, .LANCHOR108
 	ldr	x0, [x0, #:lo12:.LANCHOR108]
 	str	x0, [x20, 16]
-	.loc 2 504 0
 	mov	x0, x20
 	bl	FlashReadPages
-.LVL822:
-	.loc 2 505 0
 	ldr	x25, [x20, 16]
-.LVL823:
-	.loc 2 507 0
 	ldrh	w0, [x25, 8]
 	cmp	w0, w21
 	beq	.L597
-	.loc 2 508 0
 	mov	w2, w24
 	mov	w1, w21
 	adrp	x0, .LC86
 	add	x0, x0, :lo12:.LC86
 	bl	printf
-.LVL824:
-	.loc 2 509 0
 	ldr	x1, [x20, 16]
 	mov	w3, 4
 	adrp	x0, .LC87
 	mov	w2, w3
 	add	x0, x0, :lo12:.LC87
 	bl	rknand_print_hex
-.LVL825:
-	.loc 2 510 0
 	ldrh	w3, [x23, #:lo12:.LANCHOR32]
 	adrp	x0, .LC88
 	ldr	x1, [x26, #:lo12:.LANCHOR134]
 	mov	w2, 4
 	add	x0, x0, :lo12:.LC88
 	bl	rknand_print_hex
-.LVL826:
 .L597:
-	.loc 2 513 0
 	ldrh	w0, [x25, 8]
 	cmp	w0, w21
 	beq	.L598
-	.loc 2 513 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR140
 	adrp	x0, .LC1
 	mov	w2, 513
 	add	x1, x1, :lo12:.LANCHOR140
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL827:
 .L598:
-	.loc 2 516 0 is_stmt 1
 	ldr	x0, [x22, #:lo12:.LANCHOR55]
 	add	x1, x0, x19
 	str	wzr, [x1, 4]
-	.loc 2 517 0
 	strh	w21, [x0, x19]
-	.loc 2 518 0
 	b	.L596
-	.cfi_endproc
-.LFE253:
 	.size	load_l2p_region, .-load_l2p_region
 	.section	.text.ftl_free_no_use_map_blk,"ax",@progbits
 	.align	2
 	.global	ftl_free_no_use_map_blk
 	.type	ftl_free_no_use_map_blk, %function
 ftl_free_no_use_map_blk:
-.LFB254:
-	.loc 2 522 0
-	.cfi_startproc
-.LVL828:
 	stp	x29, x30, [sp, -80]!
-	.cfi_def_cfa_offset 80
-	.cfi_offset 29, -80
-	.cfi_offset 30, -72
-	.loc 2 531 0
 	mov	w1, 0
-	.loc 2 522 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -64
-	.cfi_offset 20, -56
 	mov	x19, x0
-	.loc 2 531 0
 	ldrh	w2, [x0, 10]
-	.loc 2 522 0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -48
-	.cfi_offset 22, -40
-	.loc 2 524 0
 	ldp	x21, x20, [x0, 32]
-	.loc 2 522 0
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 23, -32
-	.cfi_offset 24, -24
-	.cfi_offset 25, -16
-	.cfi_offset 26, -8
-	.loc 2 531 0
 	lsl	w2, w2, 1
-	.loc 2 523 0
 	ldr	x23, [x0, 16]
-.LVL829:
-	.loc 2 531 0
 	mov	x0, x21
-.LVL830:
 	bl	ftl_memset
-.LVL831:
-	.loc 2 532 0
 	mov	w0, 0
-.LVL832:
 .L601:
-	.loc 2 532 0 is_stmt 0 discriminator 1
 	ldrh	w1, [x19, 6]
 	cmp	w1, w0
 	bhi	.L605
-	.loc 2 540 0 is_stmt 1
 	ldrh	w26, [x21]
-.LVL833:
-	.loc 2 544 0
 	adrp	x24, .LANCHOR20
 	add	x24, x24, :lo12:.LANCHOR20
-	.loc 2 541 0
 	mov	w25, 0
-	.loc 2 543 0
 	mov	w20, 0
-.LVL834:
 .L606:
-	.loc 2 543 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
 	bhi	.L610
-	.loc 2 559 0 is_stmt 1
 	mov	w0, w25
 	ldp	x19, x20, [sp, 16]
-.LVL835:
 	ldp	x21, x22, [sp, 32]
-.LVL836:
 	ldp	x23, x24, [sp, 48]
-.LVL837:
 	ldp	x25, x26, [sp, 64]
-.LVL838:
 	ldp	x29, x30, [sp], 80
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL839:
 .L605:
-	.cfi_restore_state
-	.loc 2 533 0
 	ubfiz	x1, x0, 2, 16
 	ldr	w2, [x20, x1]
-	.loc 2 534 0
 	mov	w1, 0
-	.loc 2 533 0
 	ubfx	x2, x2, 10, 16
-.LVL840:
 .L602:
-	.loc 2 534 0 discriminator 1
 	ldrh	w3, [x19, 10]
 	cmp	w3, w1
 	bhi	.L604
-	.loc 2 532 0 discriminator 2
 	add	w0, w0, 1
-.LVL841:
 	and	w0, w0, 65535
-.LVL842:
 	b	.L601
 .L604:
-	.loc 2 535 0
 	ubfiz	x3, x1, 1, 16
 	ldrh	w4, [x23, x3]
 	cmp	w4, w2
 	bne	.L603
-	.loc 2 536 0
 	ldrh	w4, [x21, x3]
 	add	w4, w4, 1
 	strh	w4, [x21, x3]
 .L603:
-	.loc 2 534 0 discriminator 2
 	add	w1, w1, 1
-.LVL843:
 	and	w1, w1, 65535
-.LVL844:
 	b	.L602
-.LVL845:
 .L610:
-	.loc 2 544 0
 	ldrh	w0, [x19]
 	uxtw	x22, w20
 	cmp	w0, w20
 	bne	.L607
-	.loc 2 544 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x24]
 	ldrh	w1, [x19, 2]
 	cmp	w1, w0
 	bcs	.L607
-	.loc 2 545 0 is_stmt 1
 	strh	w0, [x21, x22, lsl 1]
 .L607:
-	.loc 2 546 0
 	lsl	x22, x22, 1
 	ldrh	w0, [x21, x22]
 	cmp	w26, w0
 	bls	.L608
 	mov	w25, w20
-.LVL846:
 	mov	w26, w0
-.LVL847:
 .L608:
-	.loc 2 550 0
 	cbnz	w0, .L609
-	.loc 2 550 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x23, x22]
 	cbz	w0, .L609
-	.loc 2 552 0 is_stmt 1
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.LVL848:
-	.loc 2 553 0
 	strh	wzr, [x23, x22]
-	.loc 2 554 0
 	ldrh	w0, [x19, 8]
 	sub	w0, w0, #1
 	strh	w0, [x19, 8]
 .L609:
-	.loc 2 543 0 discriminator 2
 	add	w20, w20, 1
-.LVL849:
 	and	w20, w20, 65535
-.LVL850:
 	b	.L606
-	.cfi_endproc
-.LFE254:
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.section	.text.Ftl_write_map_blk_to_last_page,"ax",@progbits
 	.align	2
 	.global	Ftl_write_map_blk_to_last_page
 	.type	Ftl_write_map_blk_to_last_page, %function
 Ftl_write_map_blk_to_last_page:
-.LFB257:
-	.loc 2 632 0
-	.cfi_startproc
-.LVL851:
 	stp	x29, x30, [sp, -64]!
-	.cfi_def_cfa_offset 64
-	.cfi_offset 29, -64
-	.cfi_offset 30, -56
-	.loc 2 640 0
 	mov	w1, 65535
-	.loc 2 632 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -48
-	.cfi_offset 20, -40
 	mov	x19, x0
-	.loc 2 635 0
 	ldr	x20, [x0, 16]
-.LVL852:
-	.loc 2 632 0
 	stp	x21, x22, [sp, 32]
-	.loc 2 640 0
 	ldrh	w0, [x0]
-.LVL853:
-	.loc 2 632 0
 	str	x23, [sp, 48]
-	.cfi_offset 21, -32
-	.cfi_offset 22, -24
-	.cfi_offset 23, -16
-	.loc 2 640 0
 	cmp	w0, w1
 	bne	.L616
-	.loc 2 641 0
 	ldrh	w0, [x19, 8]
 	cbz	w0, .L617
-	.loc 2 641 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR141
 	adrp	x0, .LC1
 	mov	w2, 641
 	add	x1, x1, :lo12:.LANCHOR141
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL854:
 .L617:
-	.loc 2 642 0 is_stmt 1
 	ldrh	w0, [x19, 8]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
-	.loc 2 643 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL855:
 	strh	w0, [x20]
-	.loc 2 646 0
 	ldr	w0, [x19, 48]
-	.loc 2 644 0
 	strh	wzr, [x19, 2]
-	.loc 2 646 0
 	add	w0, w0, 1
-	.loc 2 645 0
 	strh	wzr, [x19]
-	.loc 2 646 0
 	str	w0, [x19, 48]
-.LVL856:
 .L618:
-	.loc 2 677 0
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
-.LVL857:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 23
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL858:
 .L616:
-	.cfi_restore_state
-	.loc 2 650 0
 	ubfiz	x0, x0, 1, 16
-	.loc 2 653 0
 	adrp	x1, .LANCHOR108
-	.loc 2 652 0
 	adrp	x23, .LANCHOR107
-	.loc 2 636 0
 	ldr	x22, [x19, 40]
-	.loc 2 653 0
 	ldr	x1, [x1, #:lo12:.LANCHOR108]
-	.loc 2 650 0
 	ldrh	w21, [x20, x0]
-	.loc 2 651 0
 	adrp	x20, .LANCHOR106
-.LVL859:
 	ldrh	w0, [x19, 2]
 	add	x2, x20, :lo12:.LANCHOR106
 	orr	w0, w0, w21, lsl 10
 	str	w0, [x2, 4]
-	.loc 2 652 0
 	ldr	x0, [x23, #:lo12:.LANCHOR107]
-	.loc 2 653 0
 	str	x1, [x2, 16]
-.LVL860:
-	.loc 2 652 0
 	str	x0, [x2, 8]
-	.loc 2 656 0
 	ldr	w2, [x19, 48]
 	str	w2, [x1, 4]
-	.loc 2 657 0
 	mov	w2, -1291
 	strh	w2, [x1, 8]
-	.loc 2 658 0
 	ldrh	w2, [x19, 4]
 	strh	w2, [x1]
-	.loc 2 659 0
 	strh	w21, [x1, 2]
-	.loc 2 661 0
 	adrp	x1, .LANCHOR20
-.LVL861:
 	ldrh	w2, [x1, #:lo12:.LANCHOR20]
 	mov	w1, 255
 	lsl	w2, w2, 3
 	bl	ftl_memset
-.LVL862:
-	.loc 2 663 0
 	ldrh	w4, [x19, 6]
 	mov	x1, 0
-	.loc 2 666 0
 	ldr	x3, [x23, #:lo12:.LANCHOR107]
-	.loc 2 662 0
 	mov	w2, 0
-.LVL863:
 .L619:
-	.loc 2 663 0 discriminator 1
 	cmp	w4, w1, uxth
 	bhi	.L621
-	.loc 2 670 0
 	mov	w2, 1
-.LVL864:
 	mov	w3, 0
 	mov	w1, w2
-.LVL865:
 	add	x0, x20, :lo12:.LANCHOR106
 	bl	FlashProgPages
-.LVL866:
-	.loc 2 671 0
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-	.loc 2 675 0
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-.LVL867:
-	.loc 2 676 0
 	b	.L618
-.LVL868:
 .L621:
-	.loc 2 664 0
 	ldr	w0, [x22, x1, lsl 2]
 	cmp	w21, w0, lsr 10
 	bne	.L620
-	.loc 2 665 0
 	add	w2, w2, 1
-.LVL869:
 	and	w2, w2, 65535
-.LVL870:
-	.loc 2 666 0
 	ubfiz	x0, x2, 1, 16
 	str	w1, [x3, x0, lsl 2]
-	.loc 2 667 0
 	add	x0, x0, 1
 	ldr	w5, [x22, x1, lsl 2]
 	str	w5, [x3, x0, lsl 2]
 .L620:
-.LVL871:
 	add	x1, x1, 1
-.LVL872:
 	b	.L619
-	.cfi_endproc
-.LFE257:
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
 	.section	.text.FtlMapWritePage,"ax",@progbits
 	.align	2
 	.global	FtlMapWritePage
 	.type	FtlMapWritePage, %function
 FtlMapWritePage:
-.LFB258:
-	.loc 2 680 0
-	.cfi_startproc
-.LVL873:
 	stp	x29, x30, [sp, -112]!
-	.cfi_def_cfa_offset 112
-	.cfi_offset 29, -112
-	.cfi_offset 30, -104
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -64
-	.cfi_offset 24, -56
-	.loc 2 686 0
 	adrp	x23, .LANCHOR66
-	.loc 2 680 0
 	stp	x25, x26, [sp, 64]
-	.loc 2 699 0
 	adrp	x24, .LANCHOR142
-	.loc 2 680 0
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 25, -48
-	.cfi_offset 26, -40
-	.cfi_offset 27, -32
-	.cfi_offset 28, -24
-	.loc 2 687 0
 	adrp	x26, .LANCHOR20
-	.loc 2 680 0
 	stp	x19, x20, [sp, 16]
 	mov	w25, w1
-	.cfi_offset 19, -96
-	.cfi_offset 20, -88
 	mov	x19, x0
 	mov	x27, x2
-	.loc 2 686 0
 	add	x23, x23, :lo12:.LANCHOR66
-	.loc 2 699 0
 	add	x24, x24, :lo12:.LANCHOR142
-	.loc 2 720 0
 	add	x28, x26, :lo12:.LANCHOR20
-	.loc 2 680 0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -80
-	.cfi_offset 22, -72
-	.loc 2 683 0
 	mov	w22, 0
-.LVL874:
 .L627:
-	.loc 2 686 0
 	ldr	w0, [x23]
-	.loc 2 687 0
 	ldrh	w1, [x19, 2]
-	.loc 2 686 0
 	add	w0, w0, 1
 	str	w0, [x23]
-	.loc 2 687 0
 	ldrh	w0, [x26, #:lo12:.LANCHOR20]
 	sub	w0, w0, #1
 	cmp	w1, w0
 	bge	.L628
-	.loc 2 687 0 is_stmt 0 discriminator 1
 	ldrh	w1, [x19]
 	mov	w0, 65535
 	cmp	w1, w0
 	bne	.L629
 .L628:
-	.loc 2 688 0 is_stmt 1
 	mov	x0, x19
 	bl	Ftl_write_map_blk_to_last_page
-.LVL875:
 .L629:
-	.loc 2 699 0
 	ldrh	w1, [x19]
 	ldr	x0, [x19, 16]
 	ldrh	w0, [x0, x1, lsl 1]
 	cbnz	w0, .L630
-	.loc 2 699 0 is_stmt 0 discriminator 1
 	adrp	x0, .LC1
 	mov	w2, 699
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL876:
 .L630:
-	.loc 2 700 0 is_stmt 1
 	ldrh	w1, [x19]
 	ldrh	w0, [x19, 10]
 	cmp	w1, w0
 	bcc	.L631
-	.loc 2 700 0 is_stmt 0 discriminator 1
 	adrp	x0, .LC1
 	mov	w2, 700
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL877:
 .L631:
-	.loc 2 701 0 is_stmt 1
 	ldrh	w1, [x19]
-	.loc 2 703 0
 	adrp	x21, .LANCHOR106
-	.loc 2 701 0
 	ldr	x0, [x19, 16]
-	.loc 2 703 0
 	add	x20, x21, :lo12:.LANCHOR106
-	.loc 2 707 0
 	mov	w2, 16
-	.loc 2 701 0
 	ldrh	w3, [x0, x1, lsl 1]
-.LVL878:
-	.loc 2 707 0
 	mov	w1, 0
-	.loc 2 703 0
 	ldrh	w0, [x19, 2]
 	str	w3, [x29, 108]
-	.loc 2 704 0
 	str	x27, [x20, 8]
-	.loc 2 703 0
 	orr	w0, w0, w3, lsl 10
 	str	w0, [x20, 4]
-	.loc 2 705 0
 	adrp	x0, .LANCHOR108
 	ldr	x0, [x0, #:lo12:.LANCHOR108]
 	str	x0, [x20, 16]
-	.loc 2 707 0
 	bl	ftl_memset
-.LVL879:
-	.loc 2 708 0
 	ldr	x0, [x20, 16]
-.LVL880:
-	.loc 2 709 0
 	ldr	w1, [x19, 48]
-	.loc 2 712 0
 	ldr	w3, [x29, 108]
-	.loc 2 709 0
 	str	w1, [x0, 4]
-	.loc 2 711 0
 	ldrh	w1, [x19, 4]
 	strh	w1, [x0]
-	.loc 2 712 0
 	strh	w3, [x0, 2]
-	.loc 2 713 0
 	mov	w3, 1
-	.loc 2 710 0
 	strh	w25, [x0, 8]
-	.loc 2 713 0
 	mov	w1, w3
 	mov	w2, w3
 	mov	x0, x20
-.LVL881:
 	bl	FlashProgPages
-.LVL882:
-	.loc 2 714 0
 	ldrh	w0, [x19, 2]
-	.loc 2 716 0
 	ldr	w1, [x21, #:lo12:.LANCHOR106]
-	.loc 2 714 0
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	strh	w0, [x19, 2]
-	.loc 2 716 0
 	cmn	w1, #1
 	bne	.L632
-	.loc 2 717 0
 	ldr	w1, [x20, 4]
 	adrp	x0, .LC89
 	add	x0, x0, :lo12:.LC89
-	.loc 2 718 0
 	add	w22, w22, 1
-.LVL883:
 	and	w22, w22, 65535
-	.loc 2 717 0
 	bl	printf
-.LVL884:
-	.loc 2 719 0
 	ldrh	w0, [x19, 2]
 	cmp	w0, 2
 	bhi	.L633
-	.loc 2 720 0
 	ldrh	w0, [x28]
 	sub	w0, w0, #1
 	strh	w0, [x19, 2]
 .L633:
-	.loc 2 722 0
 	cmp	w22, 3
 	bls	.L634
-	.loc 2 723 0
 	add	x21, x21, :lo12:.LANCHOR106
 	adrp	x0, .LC90
 	mov	w2, w22
 	add	x0, x0, :lo12:.LC90
 	ldr	w1, [x21, 4]
 	bl	printf
-.LVL885:
 .L635:
 	b	.L635
 .L634:
-	.loc 2 727 0
 	ldr	w0, [x19, 52]
 	cbz	w0, .L627
 .L644:
 	b	.L644
 .L632:
-	.loc 2 731 0
 	cmp	w0, 1
 	beq	.L627
-	.loc 2 734 0
 	ldr	x0, [x19, 40]
 	ldr	w1, [x20, 4]
-	.loc 2 736 0
 	ldp	x21, x22, [sp, 32]
-.LVL886:
 	ldp	x23, x24, [sp, 48]
 	ldp	x27, x28, [sp, 80]
-.LVL887:
-	.loc 2 734 0
 	str	w1, [x0, w25, uxtw 2]
-	.loc 2 736 0
 	ldp	x19, x20, [sp, 16]
-.LVL888:
 	mov	w0, 0
 	ldp	x25, x26, [sp, 64]
-.LVL889:
 	ldp	x29, x30, [sp], 112
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
-.LVL890:
 	ret
-	.cfi_endproc
-.LFE258:
 	.size	FtlMapWritePage, .-FtlMapWritePage
 	.section	.text.ftl_map_blk_gc,"ax",@progbits
 	.align	2
 	.global	ftl_map_blk_gc
 	.type	ftl_map_blk_gc, %function
 ftl_map_blk_gc:
-.LFB256:
-	.loc 2 586 0
-	.cfi_startproc
-.LVL891:
 	stp	x29, x30, [sp, -96]!
-	.cfi_def_cfa_offset 96
-	.cfi_offset 29, -96
-	.cfi_offset 30, -88
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -80
-	.cfi_offset 20, -72
 	mov	x19, x0
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -48
-	.cfi_offset 24, -40
 	adrp	x23, .LANCHOR20
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 21, -64
-	.cfi_offset 22, -56
-	.cfi_offset 25, -32
-	.cfi_offset 26, -24
-	.cfi_offset 27, -16
-	.cfi_offset 28, -8
-	.loc 2 590 0
 	ldr	x20, [x0, 16]
-.LVL892:
-	.loc 2 591 0
 	ldr	x24, [x0, 40]
-.LVL893:
-	.loc 2 594 0
 	bl	ftl_free_no_use_map_blk
-.LVL894:
-	.loc 2 596 0
 	ldrh	w1, [x19, 10]
 	ldrh	w2, [x19, 8]
 	sub	w1, w1, #4
 	cmp	w2, w1
 	blt	.L647
-	.loc 2 597 0
 	ubfiz	x0, x0, 1, 16
-.LVL895:
 	ldrh	w21, [x20, x0]
-.LVL896:
-	.loc 2 598 0
 	cbz	w21, .L647
-	.loc 2 598 0 is_stmt 0 discriminator 1
 	ldr	w1, [x19, 52]
 	cbnz	w1, .L647
-	.loc 2 599 0 is_stmt 1
 	mov	w1, 1
 	str	w1, [x19, 52]
-	.loc 2 600 0
 	strh	wzr, [x20, x0]
-	.loc 2 601 0
 	ldrh	w0, [x19, 8]
-	.loc 2 602 0
 	ldrh	w1, [x19, 2]
-	.loc 2 601 0
 	sub	w0, w0, #1
 	strh	w0, [x19, 8]
-	.loc 2 602 0
 	ldrh	w0, [x23, #:lo12:.LANCHOR20]
 	cmp	w1, w0
 	bcc	.L648
-	.loc 2 603 0
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.LVL897:
 .L648:
-	.loc 2 607 0 discriminator 1
 	adrp	x25, .LANCHOR106
-	.loc 2 613 0 discriminator 1
 	adrp	x22, .LANCHOR143
-	.loc 2 614 0 discriminator 1
 	add	x26, x25, :lo12:.LANCHOR106
-	.loc 2 613 0 discriminator 1
 	add	x22, x22, :lo12:.LANCHOR143
-	.loc 2 586 0 discriminator 1
 	mov	w20, 0
-.LVL898:
 .L649:
-	.loc 2 605 0 discriminator 1
 	ldrh	w0, [x19, 6]
 	cmp	w0, w20
 	bhi	.L653
-	.loc 2 621 0
 	mov	w1, 1
 	mov	w0, w21
 	bl	FtlFreeSysBlkQueueIn
-.LVL899:
-	.loc 2 622 0
 	str	wzr, [x19, 52]
-.LVL900:
 .L647:
-	.loc 2 626 0
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x23, #:lo12:.LANCHOR20]
 	cmp	w1, w0
 	bcc	.L654
-	.loc 2 627 0
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.LVL901:
 .L654:
-	.loc 2 629 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-.LVL902:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL903:
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL904:
 .L653:
-	.cfi_restore_state
-	.loc 2 606 0
 	ubfiz	x27, x20, 2, 16
 	ldr	w1, [x24, x27]
 	cmp	w21, w1, lsr 10
 	bne	.L650
-	.loc 2 607 0
 	adrp	x2, .LANCHOR123
 	add	x0, x25, :lo12:.LANCHOR106
 	ldr	x2, [x2, #:lo12:.LANCHOR123]
 	str	x2, [x0, 8]
-	.loc 2 608 0
 	adrp	x2, .LANCHOR108
-	.loc 2 609 0
 	str	w1, [x0, 4]
-	.loc 2 608 0
 	ldr	x28, [x2, #:lo12:.LANCHOR108]
-.LVL905:
-	.loc 2 611 0
 	mov	w2, 1
-	.loc 2 608 0
 	str	x28, [x0, 16]
-	.loc 2 611 0
 	mov	w1, w2
 	bl	FlashReadPages
-.LVL906:
-	.loc 2 613 0
 	ldrh	w0, [x28, 8]
 	cmp	w0, w20
 	beq	.L651
-	.loc 2 613 0 is_stmt 0 discriminator 1
 	adrp	x0, .LC1
 	mov	w2, 613
 	mov	x1, x22
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL907:
 .L651:
-	.loc 2 614 0 is_stmt 1
 	ldr	w0, [x26]
 	cmn	w0, #1
 	bne	.L652
-	.loc 2 615 0
 	str	wzr, [x24, x27]
-.LVL908:
 .L650:
-	.loc 2 605 0 discriminator 2
 	add	w20, w20, 1
-.LVL909:
 	and	w20, w20, 65535
-.LVL910:
 	b	.L649
-.LVL911:
 .L652:
-	.loc 2 617 0
 	ldr	x2, [x26, 8]
 	mov	w1, w20
 	mov	x0, x19
 	bl	FtlMapWritePage
-.LVL912:
 	b	.L650
-	.cfi_endproc
-.LFE256:
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
 	.section	.text.flush_l2p_region,"ax",@progbits
 	.align	2
 	.global	flush_l2p_region
 	.type	flush_l2p_region, %function
 flush_l2p_region:
-.LFB259:
-	.loc 2 739 0
-	.cfi_startproc
-.LVL913:
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -16
-	.cfi_offset 20, -8
-	.loc 2 742 0
 	adrp	x20, .LANCHOR55
 	ubfiz	x19, x0, 4, 16
 	ldr	x0, [x20, #:lo12:.LANCHOR55]
-.LVL914:
 	add	x1, x0, x19
-.LVL915:
-	.loc 2 743 0
 	ldr	x2, [x1, 8]
 	ldrh	w1, [x0, x19]
-.LVL916:
 	adrp	x0, .LANCHOR144
 	add	x0, x0, :lo12:.LANCHOR144
 	bl	FtlMapWritePage
-.LVL917:
-	.loc 2 744 0
 	ldr	x0, [x20, #:lo12:.LANCHOR55]
 	add	x0, x0, x19
-	.loc 2 746 0
 	ldp	x19, x20, [sp, 16]
-	.loc 2 744 0
 	ldr	w1, [x0, 4]
 	and	w1, w1, 2147483647
 	str	w1, [x0, 4]
-	.loc 2 746 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 32
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE259:
 	.size	flush_l2p_region, .-flush_l2p_region
 	.section	.text.log2phys,"ax",@progbits
 	.align	2
 	.global	log2phys
 	.type	log2phys, %function
 log2phys:
-.LFB262:
-	.loc 2 802 0
-	.cfi_startproc
-.LVL918:
 	stp	x29, x30, [sp, -80]!
-	.cfi_def_cfa_offset 80
-	.cfi_offset 29, -80
-	.cfi_offset 30, -72
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -32
-	.cfi_offset 24, -24
 	mov	x23, x1
-	.loc 2 805 0
 	adrp	x1, .LANCHOR22
-.LVL919:
-	.loc 2 802 0
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	mov	w24, w2
-	.cfi_offset 19, -64
-	.cfi_offset 20, -56
-	.cfi_offset 21, -48
-	.cfi_offset 22, -40
-	.loc 2 805 0
 	ldrh	w19, [x1, #:lo12:.LANCHOR22]
-	.loc 2 802 0
 	str	x25, [sp, 64]
-	.cfi_offset 25, -16
-	.loc 2 805 0
 	add	w1, w19, 7
-	.loc 2 806 0
 	mov	x19, 1
-	.loc 2 805 0
 	lsr	w22, w0, w1
 	and	w22, w22, 65535
-.LVL920:
-	.loc 2 806 0
 	lsl	x19, x19, x1
-	.loc 2 808 0
 	adrp	x1, .LANCHOR61
-	.loc 2 806 0
 	sub	w19, w19, #1
-	.loc 2 808 0
 	ldr	w1, [x1, #:lo12:.LANCHOR61]
-	.loc 2 806 0
 	and	w19, w19, w0
 	and	x19, x19, 65535
-.LVL921:
-	.loc 2 808 0
 	cmp	w0, w1
 	bcc	.L662
-	.loc 2 808 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR145
 	adrp	x0, .LC1
-.LVL922:
 	mov	w2, 808
-.LVL923:
 	add	x1, x1, :lo12:.LANCHOR145
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL924:
 .L662:
-	.loc 2 811 0 is_stmt 1
 	adrp	x21, .LANCHOR55
-	.loc 2 810 0
 	adrp	x0, .LANCHOR33
-	.loc 2 811 0
 	ldr	x2, [x21, #:lo12:.LANCHOR55]
-	.loc 2 810 0
 	ldrh	w1, [x0, #:lo12:.LANCHOR33]
 	mov	x0, 0
-.LVL925:
 .L663:
 	and	x20, x0, 65535
-.LVL926:
-	.loc 2 810 0 is_stmt 0 discriminator 1
 	cmp	w20, w1
 	bcc	.L668
-	.loc 2 825 0 is_stmt 1
 	bl	select_l2p_ram_region
-.LVL927:
 	and	x20, x0, 65535
-.LVL928:
-	.loc 2 826 0
 	ldr	x2, [x21, #:lo12:.LANCHOR55]
 	ubfiz	x1, x20, 4, 16
-	.loc 2 825 0
 	mov	w25, w0
-	.loc 2 826 0
 	add	x3, x2, x1
 	ldrh	w2, [x2, x1]
 	mov	w1, 65535
 	cmp	w2, w1
 	beq	.L669
-	.loc 2 826 0 is_stmt 0 discriminator 1
 	ldr	w1, [x3, 4]
 	tbz	w1, #31, .L669
-	.loc 2 827 0 is_stmt 1
 	bl	flush_l2p_region
-.LVL929:
 .L669:
-	.loc 2 830 0
 	mov	w1, w25
 	mov	w0, w22
 	bl	load_l2p_region
-.LVL930:
-	.loc 2 831 0
 	b	.L664
-.LVL931:
 .L668:
 	add	x0, x0, 1
-	.loc 2 811 0
 	add	x3, x2, x0, lsl 4
 	ldrh	w3, [x3, -16]
 	cmp	w3, w22
 	bne	.L663
-.LVL932:
 .L664:
-	.loc 2 814 0
 	ldr	x0, [x21, #:lo12:.LANCHOR55]
 	add	x0, x0, x20, lsl 4
-	.loc 2 813 0
 	cbnz	w24, .L665
-	.loc 2 814 0
 	ldr	x0, [x0, 8]
 	ldr	w0, [x0, x19, lsl 2]
 	str	w0, [x23]
 .L666:
-	.loc 2 820 0
 	ldr	x0, [x21, #:lo12:.LANCHOR55]
 	add	x20, x0, x20, lsl 4
-.LVL933:
 	ldr	w0, [x20, 4]
 	cmn	w0, #1
 	beq	.L671
-	.loc 2 821 0
 	add	w0, w0, 1
 	str	w0, [x20, 4]
 .L671:
-	.loc 2 832 0
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
-.LVL934:
 	ldp	x21, x22, [sp, 32]
-.LVL935:
 	ldp	x23, x24, [sp, 48]
-.LVL936:
 	ldp	x29, x30, [sp], 80
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 25
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL937:
 .L665:
-	.cfi_restore_state
-	.loc 2 816 0
 	ldr	x1, [x0, 8]
 	ldr	w2, [x23]
 	str	w2, [x1, x19, lsl 2]
-	.loc 2 817 0
 	ldr	w1, [x0, 4]
 	orr	w1, w1, -2147483648
 	str	w1, [x0, 4]
-	.loc 2 818 0
 	adrp	x0, .LANCHOR56
 	strh	w22, [x0, #:lo12:.LANCHOR56]
 	b	.L666
-	.cfi_endproc
-.LFE262:
 	.size	log2phys, .-log2phys
 	.section	.text.FtlReUsePrevPpa,"ax",@progbits
 	.align	2
 	.global	FtlReUsePrevPpa
 	.type	FtlReUsePrevPpa, %function
 FtlReUsePrevPpa:
-.LFB280:
-	.loc 2 1677 0
-	.cfi_startproc
-.LVL938:
 	stp	x29, x30, [sp, -80]!
-	.cfi_def_cfa_offset 80
-	.cfi_offset 29, -80
-	.cfi_offset 30, -72
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -48
-	.cfi_offset 22, -40
-	.loc 2 1680 0
 	adrp	x22, .LANCHOR42
-	.loc 2 1677 0
 	stp	x19, x20, [sp, 16]
 	mov	w21, w0
 	str	w1, [x29, 76]
-	.loc 2 1678 0
 	lsr	w0, w1, 10
-.LVL939:
-	.loc 2 1677 0
 	str	x23, [sp, 48]
-	.cfi_offset 19, -64
-	.cfi_offset 20, -56
-	.cfi_offset 23, -32
-	.loc 2 1678 0
 	bl	P2V_block_in_plane
-.LVL940:
-	.loc 2 1680 0
 	ldr	x2, [x22, #:lo12:.LANCHOR42]
-	.loc 2 1678 0
 	and	w3, w0, 65535
-.LVL941:
-	.loc 2 1680 0
 	ubfiz	x20, x3, 1, 16
 	ldrh	w1, [x2, x20]
 	cbnz	w1, .L677
-	.loc 2 1681 0
 	adrp	x0, .LANCHOR47
-.LVL942:
 	ldr	x19, [x0, #:lo12:.LANCHOR47]
 	cbz	x19, .L678
-.LBB260:
-	.loc 2 1685 0
 	adrp	x2, .LANCHOR40
 	mov	x5, -6148914691236517206
 	movk	x5, 0xaaab, lsl 0
-	.loc 2 1684 0
 	adrp	x23, .LANCHOR48
-	.loc 2 1685 0
 	ldr	x2, [x2, #:lo12:.LANCHOR40]
-	.loc 2 1693 0
 	mov	w6, 65535
-	.loc 2 1684 0
 	ldrh	w4, [x23, #:lo12:.LANCHOR48]
-.LVL943:
-	.loc 2 1685 0
 	sub	x19, x19, x2
 	asr	x19, x19, 1
 	mul	x19, x19, x5
-	.loc 2 1693 0
 	mov	w5, 6
-	.loc 2 1685 0
 	and	w19, w19, 65535
-.LVL944:
 .L679:
-	.loc 2 1686 0 discriminator 1
 	cmp	w1, w4
 	beq	.L678
-	.loc 2 1687 0
 	cmp	w19, w3
 	bne	.L680
-	.loc 2 1688 0
 	mov	w1, w19
-.LVL945:
 	add	x0, x0, :lo12:.LANCHOR47
 	bl	List_remove_node
-.LVL946:
 	ldrh	w0, [x23, #:lo12:.LANCHOR48]
 	cbnz	w0, .L681
-	.loc 2 1688 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR146
 	adrp	x0, .LC1
 	mov	w2, 1688
 	add	x1, x1, :lo12:.LANCHOR146
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL947:
 .L681:
-	.loc 2 1688 0 discriminator 3
 	ldrh	w0, [x23, #:lo12:.LANCHOR48]
 	sub	w0, w0, #1
 	strh	w0, [x23, #:lo12:.LANCHOR48]
-	.loc 2 1689 0 is_stmt 1 discriminator 3
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-.LVL948:
-	.loc 2 1690 0 discriminator 3
 	ldr	x1, [x22, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x20]
 	add	w0, w0, 1
 	strh	w0, [x1, x20]
-.LVL949:
 .L678:
-.LBE260:
-	.loc 2 1701 0
 	add	x1, x29, 76
 	mov	w2, 1
 	mov	w0, w21
 	bl	log2phys
-.LVL950:
-	.loc 2 1702 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-.LVL951:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 23
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL952:
 .L680:
-	.cfi_restore_state
-.LBB261:
-	.loc 2 1693 0
 	umull	x19, w19, w5
-.LVL953:
 	ldrh	w19, [x2, x19]
 	cmp	w19, w6
 	beq	.L678
-.LVL954:
-	.loc 2 1686 0 discriminator 2
 	add	w1, w1, 1
-.LVL955:
 	and	w1, w1, 65535
-.LVL956:
 	b	.L679
-.LVL957:
 .L677:
-.LBE261:
-	.loc 2 1699 0
 	add	w1, w1, 1
 	strh	w1, [x2, x20]
 	b	.L678
-	.cfi_endproc
-.LFE280:
 	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
 	.section	.text.ftl_scan_all_data,"ax",@progbits
 	.align	2
 	.global	ftl_scan_all_data
 	.type	ftl_scan_all_data, %function
 ftl_scan_all_data:
-.LFB291:
-	.loc 2 2325 0
-	.cfi_startproc
 	sub	sp, sp, #96
-	.cfi_def_cfa_offset 96
-	.loc 2 2330 0
 	adrp	x0, .LC91
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC91
-	.loc 2 2325 0
 	stp	x29, x30, [sp, 16]
-	.cfi_offset 29, -80
-	.cfi_offset 30, -72
 	add	x29, sp, 16
-	.cfi_def_cfa 29, 80
 	stp	x19, x20, [sp, 32]
-	.cfi_offset 19, -64
-	.cfi_offset 20, -56
-	.loc 2 2336 0
 	adrp	x20, .LANCHOR106
-	.loc 2 2325 0
 	stp	x21, x22, [sp, 48]
-	.loc 2 2331 0
 	mov	w19, 0
-	.cfi_offset 21, -48
-	.cfi_offset 22, -40
 	adrp	x21, .LANCHOR61
-	.loc 2 2347 0
 	add	x22, x20, :lo12:.LANCHOR106
-	.loc 2 2331 0
 	add	x21, x21, :lo12:.LANCHOR61
-	.loc 2 2325 0
 	str	x23, [sp, 64]
-	.cfi_offset 23, -32
-	.loc 2 2330 0
 	bl	printf
-.LVL958:
 .L688:
-	.loc 2 2331 0 discriminator 1
 	ldr	w0, [x21]
 	cmp	w19, w0
 	bcc	.L694
-	.loc 2 2353 0
 	ldp	x19, x20, [sp, 32]
-.LVL959:
 	ldp	x21, x22, [sp, 48]
 	ldp	x29, x30, [sp, 16]
 	ldr	x23, [sp, 64]
 	add	sp, sp, 96
-	.cfi_remember_state
-	.cfi_restore 29
-	.cfi_restore 30
-	.cfi_restore 23
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL960:
 .L694:
-	.cfi_restore_state
-	.loc 2 2332 0
 	mov	w2, 0
 	add	x1, x29, 76
 	mov	w0, w19
 	bl	log2phys
-.LVL961:
-	.loc 2 2333 0
 	tst	x19, 2047
 	bne	.L689
-	.loc 2 2334 0
 	ldr	w2, [x29, 76]
 	adrp	x0, .LC92
 	mov	w1, w19
 	add	x0, x0, :lo12:.LC92
 	bl	printf
-.LVL962:
 .L689:
-	.loc 2 2335 0
 	ldr	w1, [x29, 76]
 	cmn	w1, #1
 	beq	.L691
-	.loc 2 2336 0
 	add	x0, x20, :lo12:.LANCHOR106
-	.loc 2 2340 0
 	str	wzr, [x20, #:lo12:.LANCHOR106]
-	.loc 2 2342 0
 	mov	w2, 0
-	.loc 2 2336 0
 	str	w1, [x0, 4]
-	.loc 2 2338 0
 	adrp	x1, .LANCHOR107
-	.loc 2 2337 0
 	str	w19, [x0, 24]
-	.loc 2 2338 0
 	ldr	x1, [x1, #:lo12:.LANCHOR107]
 	str	x1, [x0, 8]
-	.loc 2 2339 0
 	adrp	x1, .LANCHOR108
 	ldr	x23, [x1, #:lo12:.LANCHOR108]
-.LVL963:
-	.loc 2 2342 0
 	mov	w1, 1
-	.loc 2 2339 0
 	str	x23, [x0, 16]
-	.loc 2 2342 0
 	bl	FlashReadPages
-.LVL964:
-	.loc 2 2343 0
 	ldr	w0, [x20, #:lo12:.LANCHOR106]
 	cmp	w0, 256
 	ccmn	w0, #1, 4, ne
 	beq	.L692
-	.loc 2 2344 0
 	ldr	w0, [x23, 8]
 	cmp	w19, w0
 	beq	.L691
 .L692:
-	.loc 2 2347 0
 	ldp	x1, x0, [x22, 8]
 	ldr	w2, [x1, 4]
 	str	w2, [sp]
@@ -9025,627 +5054,343 @@ ftl_scan_all_data:
 	add	x0, x0, :lo12:.LC93
 	mov	w1, w19
 	bl	printf
-.LVL965:
 .L691:
-	.loc 2 2331 0 discriminator 2
 	add	w19, w19, 1
-.LVL966:
 	b	.L688
-	.cfi_endproc
-.LFE291:
 	.size	ftl_scan_all_data, .-ftl_scan_all_data
 	.section	.text.FtlReadRefresh,"ax",@progbits
 	.align	2
 	.global	FtlReadRefresh
 	.type	FtlReadRefresh, %function
 FtlReadRefresh:
-.LFB318:
-	.loc 5 419 0
-	.cfi_startproc
-.LVL967:
-	.loc 5 425 0
 	adrp	x1, .LANCHOR81
 	add	x0, x1, :lo12:.LANCHOR81
 	ldr	w2, [x0, 80]
 	cbz	w2, .L697
-	.loc 5 426 0
 	adrp	x1, .LANCHOR61
 	ldr	w3, [x0, 84]
 	ldr	w2, [x1, #:lo12:.LANCHOR61]
 	cmp	w3, w2
 	bcs	.L698
-	.loc 5 419 0
 	stp	x29, x30, [sp, -160]!
-	.cfi_def_cfa_offset 160
-	.cfi_offset 29, -160
-	.cfi_offset 30, -152
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -144
-	.cfi_offset 20, -136
-.LBB267:
-.LBB268:
-	.loc 5 428 0
 	mov	x19, x0
 	add	x20, x1, :lo12:.LANCHOR61
-.LBE268:
-.LBE267:
-	.loc 5 419 0
 	str	x21, [sp, 32]
-	.cfi_offset 21, -128
 	mov	w21, 2048
 .L703:
-.LVL968:
-.LBB273:
-.LBB270:
-	.loc 5 428 0
 	ldr	w0, [x19, 84]
 	ldr	w1, [x20]
 	cmp	w0, w1
 	bcs	.L700
-	.loc 5 430 0
 	add	x1, x29, 60
 	mov	w2, 0
 	bl	log2phys
-.LVL969:
-	.loc 5 431 0
 	ldr	w0, [x19, 84]
-	.loc 5 432 0
 	ldr	w1, [x29, 60]
-	.loc 5 431 0
 	add	w0, w0, 1
 	str	w0, [x19, 84]
-	.loc 5 432 0
 	cmn	w1, #1
 	beq	.L701
-.LBB269:
-	.loc 5 435 0
 	str	w0, [x29, 88]
-	.loc 5 436 0
 	adrp	x0, ftl_temp_buf
 	add	x0, x0, :lo12:ftl_temp_buf
 	str	x0, [x29, 72]
-	.loc 5 437 0
 	add	x0, x29, 96
 	str	x0, [x29, 80]
-	.loc 5 438 0
 	add	x0, x29, 160
-	.loc 5 434 0
 	str	w1, [x29, 68]
-	.loc 5 439 0
 	mov	w2, 0
 	mov	w1, 1
-	.loc 5 438 0
 	str	wzr, [x0, -96]!
-	.loc 5 439 0
 	bl	FlashReadPages
-.LVL970:
-	.loc 5 440 0
 	ldr	w0, [x29, 64]
 	cmp	w0, 256
 	bne	.L700
-	.loc 5 442 0
 	ldr	w0, [x29, 60]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL971:
 	bl	FtlGcRefreshBlock
-.LVL972:
 .L700:
-.LBE269:
-.LBE270:
-.LBE273:
-	.loc 5 466 0
 	ldp	x19, x20, [sp, 16]
-.LBB274:
-.LBB271:
 	mov	w0, -1
-.LBE271:
-.LBE274:
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 160
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 21
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL973:
 .L701:
-	.cfi_restore_state
-.LBB275:
-.LBB272:
-	.loc 5 427 0
 	subs	w21, w21, #1
-.LVL974:
 	bne	.L703
 	b	.L700
-.LVL975:
 .L698:
-	.cfi_def_cfa 31, 0
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_restore 21
-	.cfi_restore 29
-	.cfi_restore 30
-.LBE272:
-.LBE275:
-	.loc 5 451 0
 	adrp	x1, .LANCHOR62
-	.loc 5 450 0
 	str	wzr, [x0, 84]
-	.loc 5 451 0
 	ldr	w1, [x1, #:lo12:.LANCHOR62]
-	.loc 5 449 0
 	stp	w1, wzr, [x0, 76]
 .L707:
-	.loc 5 420 0
 	mov	w0, 0
-	.loc 5 465 0
 	ret
 .L697:
-.LVL976:
-.LBB276:
-	.loc 5 456 0
 	ldr	w4, [x0, 76]
 	adrp	x0, .LANCHOR62
 	ldr	w2, [x0, #:lo12:.LANCHOR62]
 	add	w0, w2, 1048576
 	cmp	w4, w0
 	bhi	.L706
-	.loc 5 454 0
 	adrp	x0, .LANCHOR76
 	ldr	w0, [x0, #:lo12:.LANCHOR76]
 	lsr	w3, w0, 10
 	mov	w0, 33554432
 	asr	w0, w0, w3
-	.loc 5 457 0
 	add	w0, w0, w4
 	cmp	w2, w0
 	bhi	.L706
-	.loc 5 458 0
 	adrp	x0, .LANCHOR39+28
 	ldrb	w0, [x0, #:lo12:.LANCHOR39+28]
 	cbnz	w0, .L707
 .L706:
-	.loc 5 460 0
 	add	x0, x1, :lo12:.LANCHOR81
 	mov	w1, 1
-	.loc 5 461 0
 	str	wzr, [x0, 84]
-	.loc 5 460 0
 	stp	w2, w1, [x0, 76]
 	b	.L707
-.LBE276:
-	.cfi_endproc
-.LFE318:
 	.size	FtlReadRefresh, .-FtlReadRefresh
 	.section	.text.FtlMapBlkWriteDump_data,"ax",@progbits
 	.align	2
 	.global	FtlMapBlkWriteDump_data
 	.type	FtlMapBlkWriteDump_data, %function
 FtlMapBlkWriteDump_data:
-.LFB267:
-	.loc 2 946 0
-	.cfi_startproc
-.LVL977:
-	.loc 2 952 0
 	ldr	w1, [x0, 56]
 	cbz	w1, .L713
-	.loc 2 946 0
 	stp	x29, x30, [sp, -48]!
-	.cfi_def_cfa_offset 48
-	.cfi_offset 29, -48
-	.cfi_offset 30, -40
-.LVL978:
-	.loc 2 956 0
 	adrp	x1, .LANCHOR106
-	.loc 2 957 0
 	adrp	x2, .LANCHOR108
-	.loc 2 946 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
 	mov	x19, x0
-	.loc 2 948 0
 	ldrh	w20, [x0, 6]
-	.loc 2 956 0
 	adrp	x0, .LANCHOR123
-.LVL979:
-	.loc 2 957 0
 	ldr	x2, [x2, #:lo12:.LANCHOR108]
-	.loc 2 956 0
 	ldr	x3, [x0, #:lo12:.LANCHOR123]
 	add	x0, x1, :lo12:.LANCHOR106
-	.loc 2 948 0
 	sub	w20, w20, #1
-	.loc 2 949 0
 	ldr	x4, [x19, 40]
-	.loc 2 948 0
 	and	w20, w20, 65535
-	.loc 2 946 0
 	str	x21, [sp, 32]
-	.cfi_offset 21, -16
-	.loc 2 957 0
 	stp	x3, x2, [x0, 8]
-	.loc 2 979 0
 	ubfiz	x2, x20, 2, 16
-	.loc 2 954 0
 	str	wzr, [x19, 56]
 	mov	x21, x1
-	.loc 2 979 0
 	ldr	w2, [x4, x2]
-.LVL980:
-	.loc 2 980 0
 	str	w2, [x0, 4]
-	.loc 2 981 0
 	cbz	w2, .L715
-	.loc 2 983 0
 	mov	w2, 1
-.LVL981:
 	mov	w1, w2
 	bl	FlashReadPages
-.LVL982:
 .L716:
-	.loc 2 990 0
 	add	x1, x21, :lo12:.LANCHOR106
 	mov	x0, x19
-	.loc 2 992 0
 	ldr	x21, [sp, 32]
-	.loc 2 990 0
 	ldr	x2, [x1, 8]
 	mov	w1, w20
-	.loc 2 992 0
 	ldp	x19, x20, [sp, 16]
-.LVL983:
 	ldp	x29, x30, [sp], 48
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 21
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
-	.loc 2 990 0
 	b	FtlMapWritePage
-.LVL984:
 .L715:
-	.cfi_restore_state
-	.loc 2 987 0
 	adrp	x0, .LANCHOR23
 	mov	w1, 255
 	ldrh	w2, [x0, #:lo12:.LANCHOR23]
-.LVL985:
 	mov	x0, x3
 	bl	ftl_memset
-.LVL986:
 	b	.L716
-.LVL987:
 .L713:
-	.cfi_def_cfa 31, 0
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_restore 21
-	.cfi_restore 29
-	.cfi_restore 30
 	ret
-	.cfi_endproc
-.LFE267:
 	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
 	.section	.text.FtlScanSysBlk,"ax",@progbits
 	.align	2
 	.global	FtlScanSysBlk
 	.type	FtlScanSysBlk, %function
 FtlScanSysBlk:
-.LFB270:
-	.loc 2 1144 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -176]!
-	.cfi_def_cfa_offset 176
-	.cfi_offset 29, -176
-	.cfi_offset 30, -168
-	.loc 2 1152 0
 	mov	w1, 0
-	.loc 2 1144 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 25, -112
-	.cfi_offset 26, -104
-	.loc 2 1152 0
 	adrp	x25, .LANCHOR135
-	.loc 2 1144 0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -144
-	.cfi_offset 22, -136
-	.loc 2 1152 0
 	adrp	x21, .LANCHOR30
 	ldr	x0, [x25, #:lo12:.LANCHOR135]
-	.loc 2 1154 0
 	adrp	x22, .LANCHOR132
-	.loc 2 1152 0
 	ldr	w2, [x21, #:lo12:.LANCHOR30]
-	.loc 2 1144 0
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -160
-	.cfi_offset 20, -152
-	.loc 2 1150 0
 	adrp	x20, .LANCHOR147
-	.loc 2 1144 0
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -128
-	.cfi_offset 24, -120
-	.loc 2 1151 0
 	adrp	x23, .LANCHOR35
-	.loc 2 1144 0
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 27, -96
-	.cfi_offset 28, -88
-	.loc 2 1153 0
 	adrp	x27, .LANCHOR129
-	.loc 2 1152 0
 	lsl	w2, w2, 2
-	.loc 2 1150 0
 	strh	wzr, [x20, #:lo12:.LANCHOR147]
-	.loc 2 1151 0
 	strh	wzr, [x23, #:lo12:.LANCHOR35]
-	.loc 2 1152 0
 	bl	ftl_memset
-.LVL988:
-	.loc 2 1153 0
 	ldr	x0, [x27, #:lo12:.LANCHOR129]
 	mov	w1, 0
 	ldr	w2, [x21, #:lo12:.LANCHOR30]
-	.loc 2 1154 0
 	adrp	x19, .LANCHOR27
-	.loc 2 1155 0
 	adrp	x28, .LANCHOR36
-	.loc 2 1156 0
 	adrp	x24, .LANCHOR79
-	.loc 2 1153 0
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL989:
-	.loc 2 1154 0
 	ldr	x0, [x22, #:lo12:.LANCHOR132]
 	mov	w1, 0
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-.LVL990:
-	.loc 2 1155 0
 	ldr	x0, [x28, #:lo12:.LANCHOR36]
 	mov	w1, 0
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL991:
-	.loc 2 1156 0
 	mov	w2, 12
 	mov	w1, 255
 	add	x0, x24, :lo12:.LANCHOR79
 	bl	ftl_memset
-.LVL992:
-	.loc 2 1158 0
 	adrp	x0, .LANCHOR5
 	stp	x22, x25, [x29, 144]
 	str	x27, [x29, 160]
 	ldrh	w0, [x0, #:lo12:.LANCHOR5]
 	str	w0, [x29, 172]
-.LVL993:
 	adrp	x0, .LANCHOR6
 	add	x0, x0, :lo12:.LANCHOR6
 	str	x0, [x29, 120]
-	.loc 2 1201 0
 	adrp	x0, .LANCHOR70
 	add	x0, x0, :lo12:.LANCHOR70
 	str	x0, [x29, 112]
 .L721:
-	.loc 2 1158 0 discriminator 1
 	ldr	x0, [x29, 120]
 	ldr	w1, [x29, 172]
 	ldrh	w0, [x0]
 	cmp	w0, w1
 	bls	.L761
-	.loc 2 1162 0 discriminator 1
 	adrp	x0, .LANCHOR3
-	.loc 2 1167 0 discriminator 1
 	adrp	x25, .LANCHOR120
-	.loc 2 1164 0 discriminator 1
 	adrp	x6, .LANCHOR13
-	.loc 2 1169 0 discriminator 1
 	mov	x5, 0
-	.loc 2 1162 0 discriminator 1
 	ldrh	w12, [x0, #:lo12:.LANCHOR3]
-	.loc 2 1168 0 discriminator 1
 	adrp	x0, .LANCHOR91
-	.loc 2 1167 0 discriminator 1
 	ldr	x7, [x25, #:lo12:.LANCHOR120]
-	.loc 2 1169 0 discriminator 1
 	mov	w22, 0
-	.loc 2 1168 0 discriminator 1
 	ldr	x11, [x0, #:lo12:.LANCHOR91]
-	.loc 2 1169 0 discriminator 1
 	adrp	x0, .LANCHOR92
-	.loc 2 1164 0 discriminator 1
 	add	x6, x6, :lo12:.LANCHOR13
-	.loc 2 1169 0 discriminator 1
 	ldr	x10, [x0, #:lo12:.LANCHOR92]
 	adrp	x0, .LANCHOR24
 	ldrh	w8, [x0, #:lo12:.LANCHOR24]
 	b	.L762
-.LVL994:
 .L723:
-	.loc 2 1164 0
 	ldrh	w1, [x29, 172]
 	ldrb	w0, [x6, x5]
 	bl	V2P_block
-.LVL995:
 	and	w4, w0, 65535
-.LVL996:
-	.loc 2 1165 0
 	bl	FtlBbmIsBadBlock
-.LVL997:
 	cbnz	w0, .L722
-	.loc 2 1167 0
 	ubfiz	x0, x22, 5, 16
-	.loc 2 1169 0
 	mul	w1, w22, w8
-	.loc 2 1167 0
 	add	x0, x7, x0
-	.loc 2 1170 0
 	add	w22, w22, 1
-.LVL998:
 	and	w22, w22, 65535
-.LVL999:
-	.loc 2 1167 0
 	lsl	w4, w4, 10
-.LVL1000:
-	.loc 2 1169 0
 	asr	w1, w1, 2
 	add	x1, x10, x1, sxtw 2
-	.loc 2 1167 0
 	str	w4, [x0, 4]
-	.loc 2 1169 0
 	stp	x11, x1, [x0, 8]
 .L722:
-.LVL1001:
 	add	x5, x5, 1
-.LVL1002:
 .L762:
-	.loc 2 1162 0 discriminator 1
 	cmp	w12, w5, uxth
 	bhi	.L723
-	.loc 2 1173 0
 	cbnz	w22, .L724
-.LVL1003:
 .L760:
-	.loc 2 1158 0
 	ldr	w0, [x29, 172]
 	add	w26, w0, 1
 	and	w0, w26, 65535
 	str	w0, [x29, 172]
-.LVL1004:
 	b	.L721
-.LVL1005:
 .L724:
-	.loc 2 1176 0
 	mov	w1, w22
 	mov	w2, 1
 	mov	x0, x7
 	bl	FlashReadPages
-.LVL1006:
 	ubfiz	x0, x22, 5, 16
 	mov	x22, 0
-.LVL1007:
 	str	x0, [x29, 128]
-.LVL1008:
-	.loc 2 1211 0
 	adrp	x0, .LANCHOR148
 	add	x0, x0, :lo12:.LANCHOR148
 	str	x0, [x29, 136]
 .L759:
-	.loc 2 1178 0
 	ldr	x0, [x25, #:lo12:.LANCHOR120]
 	add	x1, x0, x22
-	.loc 2 1181 0
 	ldr	w0, [x0, x22]
-	.loc 2 1178 0
 	ldr	w3, [x1, 4]
-	.loc 2 1181 0
 	cmn	w0, #1
-	.loc 2 1179 0
 	ldr	x27, [x1, 16]
-	.loc 2 1178 0
 	ubfx	x26, x3, 10, 16
-.LVL1009:
-	.loc 2 1181 0
 	bne	.L727
 	mov	w5, 16
-	.loc 2 1185 0
 	mov	w7, 65535
 .L729:
-	.loc 2 1183 0
 	ldr	x0, [x25, #:lo12:.LANCHOR120]
 	add	x6, x25, :lo12:.LANCHOR120
-	.loc 2 1184 0
 	mov	w2, 1
 	str	w7, [x29, 100]
-	.loc 2 1183 0
 	add	x0, x0, x22
 	str	x6, [x29, 104]
 	str	w5, [x29, 168]
-.LVL1010:
 	ldr	w1, [x0, 4]
 	add	w1, w1, 1
 	str	w1, [x0, 4]
-	.loc 2 1184 0
 	mov	w1, w2
 	bl	FlashReadPages
-.LVL1011:
-	.loc 2 1185 0
 	ldrh	w0, [x27]
 	ldr	w7, [x29, 100]
 	ldr	w5, [x29, 168]
 	cmp	w0, w7
 	ldr	x6, [x29, 104]
 	bne	.L726
-	.loc 2 1186 0
 	ldr	x0, [x6]
 	mov	w1, -1
 	str	w1, [x0, x22]
-	.loc 2 1194 0
 	ldr	x0, [x6]
 	ldr	w0, [x0, x22]
 	cmp	w0, w1
 	bne	.L727
-.LVL1012:
 .L728:
-	.loc 2 1336 0
 	mov	w1, 0
 	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-.LVL1013:
 	b	.L732
-.LVL1014:
 .L726:
-	.loc 2 1188 0
 	ldr	x0, [x25, #:lo12:.LANCHOR120]
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
 	bne	.L727
-.LVL1015:
 	sub	w5, w5, #1
-.LVL1016:
-	.loc 2 1182 0 discriminator 2
 	ands	w5, w5, 65535
 	bne	.L729
 	b	.L728
 .L727:
-	.loc 2 1196 0
 	adrp	x0, .LANCHOR70
 	ldr	w1, [x0, #:lo12:.LANCHOR70]
 	ldr	w0, [x27, 4]
 	cmn	w1, #1
 	beq	.L730
-	.loc 2 1196 0 is_stmt 0 discriminator 1
 	cmp	w1, w0
 	bhi	.L731
 .L730:
-	.loc 2 1198 0 is_stmt 1
 	cmn	w0, #1
 	beq	.L731
-	.loc 2 1201 0
 	ldr	x2, [x29, 112]
 	add	w1, w0, 1
 	str	w1, [x2]
 .L731:
-	.loc 2 1206 0
 	ldrh	w1, [x27]
 	mov	w2, 61604
 	cmp	w1, w2
@@ -9655,14 +5400,12 @@ FtlScanSysBlk:
 	cmp	w1, w0
 	beq	.L735
 .L732:
-	.loc 2 1177 0 discriminator 2
 	ldr	x0, [x29, 128]
 	add	x22, x22, 32
 	cmp	x0, x22
 	bne	.L759
 	b	.L760
 .L734:
-	.loc 2 1206 0
 	mov	w0, 61634
 	cmp	w1, w0
 	beq	.L736
@@ -9671,44 +5414,32 @@ FtlScanSysBlk:
 	beq	.L728
 	b	.L732
 .L736:
-	.loc 2 1211 0
 	ldrh	w1, [x20, #:lo12:.LANCHOR147]
 	ldr	w0, [x21, #:lo12:.LANCHOR30]
 	cmp	w1, w0
 	bls	.L738
-	.loc 2 1211 0 is_stmt 0 discriminator 1
 	ldr	x1, [x29, 136]
 	adrp	x0, .LC1
 	mov	w2, 1211
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1017:
 .L738:
-	.loc 2 1212 0 is_stmt 1
 	ldr	w6, [x21, #:lo12:.LANCHOR30]
-	.loc 2 1214 0
 	ldr	x3, [x29, 152]
-	.loc 2 1212 0
 	ldrh	w1, [x20, #:lo12:.LANCHOR147]
 	and	w2, w6, 65535
 	sub	w0, w2, #1
 	sub	w2, w2, w1
 	sxth	x0, w0
-.LVL1018:
 	sub	w2, w2, #1
-	.loc 2 1214 0
 	ldr	x5, [x3, #:lo12:.LANCHOR135]
-	.loc 2 1212 0
 	sxth	w2, w2
 .L739:
-	.loc 2 1212 0 is_stmt 0 discriminator 1
 	cmp	w0, w2
 	bgt	.L745
-	.loc 2 1235 0 is_stmt 1
 	tbz	w0, #31, .L779
 	b	.L732
 .L745:
-	.loc 2 1214 0
 	sxtw	x8, w0
 	ldr	w11, [x27, 4]
 	lsl	x7, x8, 2
@@ -9716,34 +5447,23 @@ FtlScanSysBlk:
 	ldr	w7, [x5, x7]
 	cmp	w11, w7
 	bls	.L740
-	.loc 2 1216 0
 	ldr	w2, [x5]
 	cbnz	w2, .L741
-	.loc 2 1216 0 is_stmt 0 discriminator 1
 	cmp	w6, w1
 	beq	.L741
-	.loc 2 1221 0 is_stmt 1
 	add	w1, w1, 1
 	strh	w1, [x20, #:lo12:.LANCHOR147]
 .L741:
-	.loc 2 1227 0 discriminator 1
 	ldr	x1, [x29, 160]
 	ldr	x6, [x1, #:lo12:.LANCHOR129]
 	mov	w1, 0
 .L742:
-.LVL1019:
-	.loc 2 1224 0 discriminator 1
 	cmp	w1, w0
 	bne	.L743
-	.loc 2 1229 0
 	ldr	w1, [x27, 4]
-.LVL1020:
 	str	w1, [x10]
-	.loc 2 1230 0
 	strh	w26, [x6, x8, lsl 1]
-	.loc 2 1235 0
 	tbnz	w0, #31, .L732
-	.loc 2 1242 0
 	ldrh	w1, [x20, #:lo12:.LANCHOR147]
 	ldr	w2, [x21, #:lo12:.LANCHOR30]
 	sub	w2, w2, w1
@@ -9751,76 +5471,53 @@ FtlScanSysBlk:
 	cmp	w0, w2, sxth
 	bgt	.L732
 .L779:
-	.loc 2 1244 0
 	add	w1, w1, 1
 	strh	w1, [x20, #:lo12:.LANCHOR147]
-	.loc 2 1245 0
 	ldr	w1, [x27, 4]
 	str	w1, [x5, x0, lsl 2]
-	.loc 2 1246 0
 	ldr	x1, [x29, 160]
 	ldr	x1, [x1, #:lo12:.LANCHOR129]
 .L797:
-	.loc 2 1290 0
 	strh	w26, [x1, x0, lsl 1]
 	b	.L732
-.LVL1021:
 .L743:
-	.loc 2 1226 0 discriminator 3
 	sxtw	x2, w1
 	add	w1, w1, 1
-.LVL1022:
 	lsl	x7, x2, 2
-	.loc 2 1227 0 discriminator 3
 	lsl	x2, x2, 1
-	.loc 2 1226 0 discriminator 3
 	add	x11, x5, x7
 	sxth	w1, w1
-.LVL1023:
 	ldr	w11, [x11, 4]
 	str	w11, [x5, x7]
-	.loc 2 1227 0 discriminator 3
 	add	x7, x6, x2
 	ldrh	w7, [x7, 2]
 	strh	w7, [x6, x2]
 	b	.L742
-.LVL1024:
 .L740:
 	sub	w0, w0, #1
-.LVL1025:
 	sxth	x0, w0
-.LVL1026:
 	b	.L739
-.LVL1027:
 .L735:
-	.loc 2 1252 0
 	ldrh	w1, [x23, #:lo12:.LANCHOR35]
 	ldrh	w0, [x19, #:lo12:.LANCHOR27]
 	cmp	w1, w0
 	bls	.L748
-	.loc 2 1252 0 is_stmt 0 discriminator 1
 	ldr	x1, [x29, 136]
 	adrp	x0, .LC1
 	mov	w2, 1252
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1028:
 .L748:
-	.loc 2 1253 0 is_stmt 1
 	ldrh	w6, [x19, #:lo12:.LANCHOR27]
 	ldrh	w2, [x23, #:lo12:.LANCHOR35]
 	sub	w1, w6, #1
 	sxth	x0, w1
-.LVL1029:
 	sub	w5, w1, w2
-	.loc 2 1255 0
 	ldr	x1, [x29, 144]
 	ldr	x1, [x1, #:lo12:.LANCHOR132]
 .L749:
-	.loc 2 1253 0 discriminator 1
 	cmp	w0, w5
 	ble	.L754
-	.loc 2 1255 0
 	sxtw	x7, w0
 	ldr	w11, [x27, 4]
 	lsl	x8, x7, 2
@@ -9828,147 +5525,102 @@ FtlScanSysBlk:
 	ldr	w8, [x1, x8]
 	cmp	w11, w8
 	bls	.L750
-	.loc 2 1257 0
 	ldr	w5, [x1]
 	cbnz	w5, .L751
-	.loc 2 1257 0 is_stmt 0 discriminator 1
 	cmp	w6, w2
 	beq	.L751
-	.loc 2 1265 0 is_stmt 1
 	add	w2, w2, 1
 	strh	w2, [x23, #:lo12:.LANCHOR35]
 .L751:
-	.loc 2 1270 0 discriminator 1
 	ldr	x6, [x28, #:lo12:.LANCHOR36]
 	mov	w2, 0
 .L752:
-.LVL1030:
-	.loc 2 1267 0 discriminator 1
 	cmp	w2, w0
 	bne	.L753
-	.loc 2 1272 0
 	ldr	w2, [x27, 4]
-.LVL1031:
 	str	w2, [x10]
-	.loc 2 1273 0
 	strh	w26, [x6, x7, lsl 1]
 .L754:
-	.loc 2 1278 0
 	tbnz	w0, #31, .L732
-	.loc 2 1286 0
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	ldrh	w5, [x23, #:lo12:.LANCHOR35]
 	sub	w2, w2, #1
 	sub	w2, w2, w5
 	cmp	w0, w2, sxth
 	bgt	.L732
-	.loc 2 1288 0
 	add	w5, w5, 1
-	.loc 2 1289 0
 	ldr	w2, [x27, 4]
-	.loc 2 1288 0
 	strh	w5, [x23, #:lo12:.LANCHOR35]
-	.loc 2 1289 0
 	str	w2, [x1, x0, lsl 2]
-	.loc 2 1290 0
 	ldr	x1, [x28, #:lo12:.LANCHOR36]
 	b	.L797
-.LVL1032:
 .L753:
-	.loc 2 1269 0 discriminator 3
 	sxtw	x5, w2
 	add	w2, w2, 1
-.LVL1033:
 	lsl	x8, x5, 2
-	.loc 2 1270 0 discriminator 3
 	lsl	x5, x5, 1
-	.loc 2 1269 0 discriminator 3
 	add	x11, x1, x8
 	sxth	w2, w2
-.LVL1034:
 	ldr	w11, [x11, 4]
 	str	w11, [x1, x8]
-	.loc 2 1270 0 discriminator 3
 	add	x8, x6, x5
 	ldrh	w8, [x8, 2]
 	strh	w8, [x6, x5]
 	b	.L752
-.LVL1035:
 .L750:
 	sub	w0, w0, #1
-.LVL1036:
 	sxth	x0, w0
-.LVL1037:
 	b	.L749
-.LVL1038:
 .L733:
-	.loc 2 1297 0
 	ldrh	w5, [x24, #:lo12:.LANCHOR79]
 	mov	w1, 65535
 	add	x2, x24, :lo12:.LANCHOR79
 	cmp	w5, w1
 	bne	.L756
-	.loc 2 1299 0
 	strh	w26, [x24, #:lo12:.LANCHOR79]
-	.loc 2 1300 0
 	str	w0, [x2, 8]
 	b	.L732
 .L756:
-	.loc 2 1304 0
 	ldrh	w0, [x2, 4]
 	cmp	w0, w1
 	beq	.L757
-	.loc 2 1305 0
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.LVL1039:
 .L757:
-	.loc 2 1306 0
 	add	x0, x24, :lo12:.LANCHOR79
 	ldr	w1, [x27, 4]
 	ldr	w2, [x0, 8]
 	cmp	w2, w1
 	bcs	.L758
-	.loc 2 1308 0
 	ldrh	w2, [x24, #:lo12:.LANCHOR79]
 	strh	w2, [x0, 4]
-	.loc 2 1309 0
 	strh	w26, [x24, #:lo12:.LANCHOR79]
-	.loc 2 1310 0
 	str	w1, [x0, 8]
 	b	.L732
 .L758:
-	.loc 2 1314 0
 	strh	w26, [x0, 4]
 	b	.L732
-.LVL1040:
 .L761:
-	.loc 2 1341 0
 	ldr	x0, [x29, 160]
 	ldr	x2, [x0, #:lo12:.LANCHOR129]
 	ldrh	w0, [x2]
 	cbz	w0, .L763
 .L766:
-	.loc 2 1359 0
 	ldr	x1, [x28, #:lo12:.LANCHOR36]
 	ldrh	w0, [x1]
 	cbz	w0, .L764
 .L765:
-	.loc 2 1377 0
 	ldrh	w1, [x20, #:lo12:.LANCHOR147]
 	ldr	w0, [x21, #:lo12:.LANCHOR30]
 	cmp	w1, w0
 	bls	.L795
-	.loc 2 1377 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR148
 	adrp	x0, .LC1
 	mov	w2, 1377
 	add	x1, x1, :lo12:.LANCHOR148
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1041:
 .L795:
-	.loc 2 1379 0 is_stmt 1
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -9976,405 +5628,219 @@ FtlScanSysBlk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
-.LVL1042:
 	ret
-.LVL1043:
 .L763:
-	.cfi_restore_state
-	.loc 2 1341 0 discriminator 1
 	ldrh	w0, [x20, #:lo12:.LANCHOR147]
 	cbz	w0, .L766
-	.loc 2 1343 0 discriminator 1
 	ldr	w1, [x21, #:lo12:.LANCHOR30]
 	mov	w0, 0
 .L767:
-.LVL1044:
 	cmp	w0, w1
 	bcs	.L766
-	.loc 2 1345 0
 	ldrh	w3, [x2, w0, sxtw 1]
 	cbz	w3, .L768
-	.loc 2 1350 0
 	ldr	x1, [x29, 152]
-	.loc 2 1347 0
 	add	x7, x21, :lo12:.LANCHOR30
-	.loc 2 1350 0
 	ldr	x4, [x1, #:lo12:.LANCHOR135]
 	mov	w1, w0
 .L769:
-.LVL1045:
-	.loc 2 1347 0 discriminator 1
 	ldr	w3, [x7]
 	cmp	w1, w3
 	bcs	.L766
-	.loc 2 1349 0 discriminator 3
 	sxtw	x6, w1
 	sub	w3, w1, w0
 	lsl	x5, x6, 1
 	sxtw	x3, w3
 	add	w1, w1, 1
-.LVL1046:
-	.loc 2 1350 0 discriminator 3
 	ldr	w6, [x4, x6, lsl 2]
 	sxth	w1, w1
-.LVL1047:
-	.loc 2 1349 0 discriminator 3
 	ldrh	w8, [x2, x5]
 	strh	w8, [x2, x3, lsl 1]
-	.loc 2 1350 0 discriminator 3
 	str	w6, [x4, x3, lsl 2]
-	.loc 2 1351 0 discriminator 3
 	strh	wzr, [x2, x5]
 	b	.L769
-.LVL1048:
 .L768:
 	add	w0, w0, 1
-.LVL1049:
 	sxth	w0, w0
-.LVL1050:
 	b	.L767
-.LVL1051:
 .L764:
-	.loc 2 1359 0 discriminator 1
 	ldrh	w0, [x23, #:lo12:.LANCHOR35]
 	cbz	w0, .L765
-	.loc 2 1361 0 discriminator 1
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	mov	w0, 0
 .L774:
-.LVL1052:
 	mov	w6, w0
 	cmp	w0, w2
 	bge	.L765
-	.loc 2 1363 0
 	ldrh	w3, [x1, w0, sxtw 1]
 	cbz	w3, .L775
-	.loc 2 1368 0
 	ldr	x2, [x29, 144]
-	.loc 2 1365 0
 	add	x19, x19, :lo12:.LANCHOR27
-	.loc 2 1368 0
 	ldr	x3, [x2, #:lo12:.LANCHOR132]
-.LVL1053:
 .L776:
-	.loc 2 1365 0 discriminator 1
 	ldrh	w2, [x19]
 	cmp	w0, w2
 	bge	.L765
-	.loc 2 1367 0 discriminator 3
 	sxtw	x5, w0
 	sub	w2, w0, w6
 	lsl	x4, x5, 1
 	sxtw	x2, w2
 	add	w0, w0, 1
-.LVL1054:
-	.loc 2 1368 0 discriminator 3
 	ldr	w5, [x3, x5, lsl 2]
 	sxth	w0, w0
-.LVL1055:
-	.loc 2 1367 0 discriminator 3
 	ldrh	w7, [x1, x4]
 	strh	w7, [x1, x2, lsl 1]
-	.loc 2 1368 0 discriminator 3
 	str	w5, [x3, x2, lsl 2]
-	.loc 2 1369 0 discriminator 3
 	strh	wzr, [x1, x4]
 	b	.L776
-.LVL1056:
 .L775:
 	add	w0, w0, 1
-.LVL1057:
 	sxth	w0, w0
-.LVL1058:
 	b	.L774
-	.cfi_endproc
-.LFE270:
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
 	.section	.text.FtlMapTblRecovery,"ax",@progbits
 	.align	2
 	.global	FtlMapTblRecovery
 	.type	FtlMapTblRecovery, %function
 FtlMapTblRecovery:
-.LFB275:
-	.loc 2 1515 0
-	.cfi_startproc
-.LVL1059:
 	stp	x29, x30, [sp, -144]!
-	.cfi_def_cfa_offset 144
-	.cfi_offset 29, -144
-	.cfi_offset 30, -136
-	.loc 2 1526 0
 	mov	w1, 0
-	.loc 2 1515 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -128
-	.cfi_offset 20, -120
 	mov	x19, x0
 	stp	x23, x24, [sp, 48]
-	.loc 2 1527 0
 	adrp	x20, .LANCHOR106
-	.cfi_offset 23, -96
-	.cfi_offset 24, -88
-	.loc 2 1522 0
 	ldrh	w23, [x0, 6]
-	.loc 2 1560 0
 	adrp	x24, .LANCHOR20
-	.loc 2 1515 0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -112
-	.cfi_offset 22, -104
-	.loc 2 1519 0
 	ldr	x21, [x0, 40]
-.LVL1060:
-	.loc 2 1520 0
 	ldr	x22, [x0, 16]
-.LVL1061:
-	.loc 2 1526 0
 	lsl	w2, w23, 2
-	.loc 2 1521 0
 	ldr	x0, [x0, 24]
-.LVL1062:
 	str	x0, [x29, 128]
-.LVL1063:
-	.loc 2 1523 0
 	ldrh	w0, [x19, 8]
-.LVL1064:
-	.loc 2 1515 0
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 25, -80
-	.cfi_offset 26, -72
-	.cfi_offset 27, -64
-	.cfi_offset 28, -56
-	.loc 2 1535 0
 	mov	w27, 0
-	.loc 2 1523 0
 	str	w0, [x29, 140]
-.LVL1065:
-	.loc 2 1526 0
 	mov	x0, x21
 	bl	ftl_memset
-.LVL1066:
 	str	x20, [x29, 120]
-	.loc 2 1527 0
 	adrp	x7, .LANCHOR107
 	add	x3, x20, :lo12:.LANCHOR106
 	mov	x26, x7
-	.loc 2 1559 0
 	mov	x20, x3
-	.loc 2 1527 0
 	ldr	x0, [x7, #:lo12:.LANCHOR107]
 	str	x0, [x3, 8]
-	.loc 2 1528 0
 	adrp	x0, .LANCHOR108
-	.loc 2 1532 0
 	stp	wzr, wzr, [x19, 48]
-	.loc 2 1528 0
 	ldr	x25, [x0, #:lo12:.LANCHOR108]
-	.loc 2 1530 0
 	mov	w0, -1
-	.loc 2 1528 0
 	str	x25, [x3, 16]
-.LVL1067:
-	.loc 2 1530 0
 	strh	w0, [x19]
-	.loc 2 1531 0
 	strh	w0, [x19, 2]
-	.loc 2 1534 0
 	mov	w0, 1
 	str	w0, [x19, 56]
-.LVL1068:
-	.loc 2 1537 0
 	ldr	w0, [x29, 140]
 	sub	w0, w0, #1
 	str	w0, [x29, 136]
-	.loc 2 1579 0
 	add	x0, x24, :lo12:.LANCHOR20
 	str	x0, [x29, 112]
-.LVL1069:
 .L799:
-	.loc 2 1535 0 discriminator 1
 	ldr	w0, [x29, 140]
 	cmp	w27, w0
 	bge	.L816
-	.loc 2 1537 0
 	ldr	w0, [x29, 136]
 	sxtw	x28, w27
 	cmp	w27, w0
 	bne	.L800
-	.loc 2 1539 0
 	lsl	x0, x28, 1
 	mov	w1, 1
 	add	x24, x22, x0
 	ldrh	w0, [x22, x0]
-	.loc 2 1543 0
 	mov	w22, 0
-.LVL1070:
-	.loc 2 1539 0
 	bl	FtlGetLastWrittenPage
-.LVL1071:
 	sxth	w26, w0
-.LVL1072:
-	.loc 2 1540 0
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-	.loc 2 1542 0
 	ldr	x0, [x29, 128]
-	.loc 2 1541 0
 	strh	w27, [x19]
-	.loc 2 1542 0
 	ldr	w0, [x0, x28, lsl 2]
 	str	w0, [x19, 48]
-.LVL1073:
-	.loc 2 1545 0
 	ldr	x0, [x29, 120]
 	add	x20, x0, :lo12:.LANCHOR106
-.LVL1074:
 .L801:
-	.loc 2 1543 0 discriminator 1
 	cmp	w22, w26
 	ble	.L803
-.LVL1075:
 .L816:
-	.loc 2 1596 0
 	mov	x0, x19
 	bl	ftl_free_no_use_map_blk
-.LVL1076:
-	.loc 2 1597 0
 	adrp	x0, .LANCHOR20
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x0, #:lo12:.LANCHOR20]
 	cmp	w1, w0
 	bne	.L805
-	.loc 2 1599 0
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.LVL1077:
 .L805:
-	.loc 2 1602 0
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-.LVL1078:
-	.loc 2 1604 0
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-.LVL1079:
-	.loc 2 1606 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-.LVL1080:
 	ldp	x21, x22, [sp, 32]
-.LVL1081:
 	ldp	x23, x24, [sp, 48]
-.LVL1082:
 	ldp	x25, x26, [sp, 64]
-.LVL1083:
 	ldp	x27, x28, [sp, 80]
-.LVL1084:
 	ldp	x29, x30, [sp], 144
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
-.LVL1085:
 	ret
-.LVL1086:
 .L803:
-	.cfi_restore_state
-	.loc 2 1545 0
 	ldrh	w0, [x24]
-	.loc 2 1546 0
 	mov	w2, 1
 	mov	w1, w2
-	.loc 2 1545 0
 	orr	w0, w22, w0, lsl 10
 	str	w0, [x20, 4]
-	.loc 2 1546 0
 	mov	x0, x20
 	bl	FlashReadPages
-.LVL1087:
-	.loc 2 1549 0
 	ldr	w0, [x20]
 	cmn	w0, #1
 	beq	.L802
-	.loc 2 1551 0
 	ldrh	w0, [x25, 8]
 	cmp	w23, w0
 	bls	.L802
-	.loc 2 1551 0 is_stmt 0 discriminator 1
 	ldrh	w2, [x25]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
 	bne	.L802
-	.loc 2 1553 0 is_stmt 1
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x20, 4]
 	str	w1, [x21, x0]
 .L802:
 	add	w22, w22, 1
-.LVL1088:
 	sxth	w22, w22
-.LVL1089:
 	b	.L801
-.LVL1090:
 .L800:
-	.loc 2 1559 0
 	ldr	x0, [x26, #:lo12:.LANCHOR107]
-	.loc 2 1561 0
 	mov	w2, 1
-	.loc 2 1559 0
 	str	x0, [x20, 8]
-	.loc 2 1560 0
 	lsl	x0, x28, 1
 	ldrh	w1, [x24, #:lo12:.LANCHOR20]
 	add	x28, x22, x0
 	ldrh	w0, [x22, x0]
 	sub	w1, w1, #1
 	orr	w0, w1, w0, lsl 10
-	.loc 2 1561 0
 	mov	w1, w2
-	.loc 2 1560 0
 	str	w0, [x20, 4]
-	.loc 2 1561 0
 	mov	x0, x20
 	bl	FlashReadPages
-.LVL1091:
-	.loc 2 1564 0
 	ldr	w0, [x20]
 	cmn	w0, #1
 	beq	.L818
-	.loc 2 1564 0 is_stmt 0 discriminator 1
 	ldrh	w1, [x25]
 	ldrh	w0, [x19, 4]
 	cmp	w1, w0
 	bne	.L818
-	.loc 2 1564 0 discriminator 2
 	ldrh	w1, [x25, 8]
 	mov	w0, 64245
 	cmp	w1, w0
@@ -10382,862 +5848,474 @@ FtlMapTblRecovery:
 .L818:
 	mov	w5, 0
 .L808:
-.LVL1092:
-	.loc 2 1579 0 is_stmt 1 discriminator 1
 	ldr	x0, [x29, 112]
 	ldrh	w0, [x0]
 	cmp	w5, w0
 	bge	.L814
-	.loc 2 1581 0
 	ldrh	w0, [x28]
-	.loc 2 1582 0
 	mov	w2, 1
-	.loc 2 1581 0
 	str	w5, [x29, 108]
-	.loc 2 1582 0
 	mov	w1, w2
-	.loc 2 1581 0
 	orr	w0, w5, w0, lsl 10
 	str	w0, [x20, 4]
-	.loc 2 1582 0
 	mov	x0, x20
 	bl	FlashReadPages
-.LVL1093:
-	.loc 2 1585 0
 	ldr	w0, [x20]
 	ldr	w5, [x29, 108]
 	cmn	w0, #1
 	beq	.L812
-	.loc 2 1587 0
 	ldrh	w0, [x25, 8]
 	cmp	w23, w0
 	bls	.L812
-	.loc 2 1587 0 is_stmt 0 discriminator 1
 	ldrh	w2, [x25]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
 	bne	.L812
-	.loc 2 1589 0 is_stmt 1
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x20, 4]
 	str	w1, [x21, x0]
 .L812:
 	add	w5, w5, 1
 	sxth	w5, w5
-.LVL1094:
 	b	.L808
-.LVL1095:
 .L807:
-	.loc 2 1567 0 discriminator 1
 	ldrh	w5, [x24, #:lo12:.LANCHOR20]
-	.loc 2 1569 0 discriminator 1
 	mov	w0, 0
 	ldr	x10, [x26, #:lo12:.LANCHOR107]
-	.loc 2 1567 0 discriminator 1
 	sub	w5, w5, #1
 .L809:
-.LVL1096:
 	cmp	w0, w5
 	blt	.L811
-.LVL1097:
 .L814:
 	add	w4, w27, 1
 	sxth	w27, w4
-.LVL1098:
 	b	.L799
-.LVL1099:
 .L811:
-	.loc 2 1569 0
 	lsl	w2, w0, 1
 	sxtw	x2, w2
 	lsl	x1, x2, 2
 	ldrh	w1, [x10, x1]
-.LVL1100:
-	.loc 2 1570 0
 	cmp	w23, w1
 	bls	.L810
-	.loc 2 1572 0
 	add	x2, x2, 1
 	ubfiz	x1, x1, 2, 16
-.LVL1101:
 	ldr	w2, [x10, x2, lsl 2]
-.LVL1102:
 	str	w2, [x21, x1]
-.LVL1103:
 .L810:
 	add	w0, w0, 1
-.LVL1104:
 	sxth	w0, w0
-.LVL1105:
 	b	.L809
-	.cfi_endproc
-.LFE275:
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
 	.section	.text.FtlLoadVonderInfo,"ax",@progbits
 	.align	2
 	.global	FtlLoadVonderInfo
 	.type	FtlLoadVonderInfo, %function
 FtlLoadVonderInfo:
-.LFB276:
-	.loc 2 1609 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
-	.loc 2 1610 0
 	adrp	x1, .LANCHOR27
 	adrp	x0, .LANCHOR149
 	add	x0, x0, :lo12:.LANCHOR149
-	.loc 2 1609 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 2 1610 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR27]
 	strh	w1, [x0, 10]
-	.loc 2 1611 0
 	mov	w1, -3962
 	strh	w1, [x0, 4]
-	.loc 2 1612 0
 	adrp	x1, .LANCHOR35
 	ldrh	w1, [x1, #:lo12:.LANCHOR35]
 	strh	w1, [x0, 8]
-	.loc 2 1613 0
 	adrp	x1, .LANCHOR28
 	ldrh	w1, [x1, #:lo12:.LANCHOR28]
 	strh	w1, [x0, 6]
-	.loc 2 1614 0
 	adrp	x1, .LANCHOR36
 	ldr	x1, [x1, #:lo12:.LANCHOR36]
 	str	x1, [x0, 16]
-	.loc 2 1615 0
 	adrp	x1, .LANCHOR132
 	ldr	x1, [x1, #:lo12:.LANCHOR132]
 	str	x1, [x0, 24]
-	.loc 2 1616 0
 	adrp	x1, .LANCHOR131
 	ldr	x1, [x1, #:lo12:.LANCHOR131]
 	str	x1, [x0, 32]
-	.loc 2 1617 0
 	adrp	x1, .LANCHOR133
 	ldr	x1, [x1, #:lo12:.LANCHOR133]
 	str	x1, [x0, 40]
-	.loc 2 1619 0
 	bl	FtlMapTblRecovery
-.LVL1106:
-	.loc 2 1622 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE276:
 	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
 	.section	.text.FtlL2PDataInit,"ax",@progbits
 	.align	2
 	.global	FtlL2PDataInit
 	.type	FtlL2PDataInit, %function
 FtlL2PDataInit:
-.LFB277:
-	.loc 2 1625 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -64]!
-	.cfi_def_cfa_offset 64
-	.cfi_offset 29, -64
-	.cfi_offset 30, -56
-	.loc 2 1627 0
 	mov	w1, 0
-	.loc 2 1625 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -48
-	.cfi_offset 20, -40
-	.loc 2 1627 0
 	adrp	x19, .LANCHOR130
 	adrp	x20, .LANCHOR30
-	.loc 2 1625 0
 	stp	x21, x22, [sp, 32]
-	.loc 2 1627 0
 	ldr	x0, [x19, #:lo12:.LANCHOR130]
-	.cfi_offset 21, -32
-	.cfi_offset 22, -24
-	.loc 2 1628 0
 	adrp	x22, .LANCHOR23
-	.loc 2 1627 0
 	ldr	w2, [x20, #:lo12:.LANCHOR30]
-	.loc 2 1628 0
 	adrp	x21, .LANCHOR33
-	.loc 2 1625 0
 	str	x23, [sp, 48]
-	.cfi_offset 23, -16
-	.loc 2 1628 0
 	adrp	x23, .LANCHOR136
-	.loc 2 1627 0
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL1107:
-	.loc 2 1628 0
 	ldrh	w0, [x21, #:lo12:.LANCHOR33]
 	mov	w1, 255
 	ldrh	w2, [x22, #:lo12:.LANCHOR23]
 	mul	w2, w2, w0
 	ldr	x0, [x23, #:lo12:.LANCHOR136]
 	bl	ftl_memset
-.LVL1108:
 	adrp	x0, .LANCHOR55
 	ldrh	w3, [x21, #:lo12:.LANCHOR33]
-	.loc 2 1633 0
 	ldr	x6, [x23, #:lo12:.LANCHOR136]
-	.loc 2 1629 0
 	mov	x1, 0
 	ldr	x0, [x0, #:lo12:.LANCHOR55]
 	mov	w2, -1
 	ldrh	w5, [x22, #:lo12:.LANCHOR23]
 	add	x3, x0, x3, lsl 4
-.LVL1109:
 .L829:
 	add	x4, x1, x5
-	.loc 2 1629 0 is_stmt 0 discriminator 1
 	cmp	x0, x3
 	bne	.L830
-	.loc 2 1635 0 is_stmt 1
 	adrp	x1, .LANCHOR144
 	add	x0, x1, :lo12:.LANCHOR144
-	.loc 2 1645 0
 	ldp	x21, x22, [sp, 32]
-	.loc 2 1636 0
 	strh	w2, [x1, #:lo12:.LANCHOR144]
-	.loc 2 1637 0
 	ldr	w1, [x20, #:lo12:.LANCHOR30]
 	strh	w1, [x0, 10]
-	.loc 2 1638 0
 	mov	w1, -3902
 	strh	w1, [x0, 4]
-	.loc 2 1639 0
 	adrp	x1, .LANCHOR147
-	.loc 2 1645 0
 	ldr	x23, [sp, 48]
-	.loc 2 1635 0
 	strh	w2, [x0, 2]
-	.loc 2 1639 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR147]
 	strh	w1, [x0, 8]
-	.loc 2 1640 0
 	adrp	x1, .LANCHOR32
 	ldrh	w1, [x1, #:lo12:.LANCHOR32]
 	strh	w1, [x0, 6]
-	.loc 2 1641 0
 	adrp	x1, .LANCHOR129
 	ldr	x1, [x1, #:lo12:.LANCHOR129]
 	str	x1, [x0, 16]
-	.loc 2 1642 0
 	adrp	x1, .LANCHOR135
 	ldr	x1, [x1, #:lo12:.LANCHOR135]
 	str	x1, [x0, 24]
-	.loc 2 1643 0
 	ldr	x1, [x19, #:lo12:.LANCHOR130]
-	.loc 2 1645 0
 	ldp	x19, x20, [sp, 16]
-	.loc 2 1643 0
 	str	x1, [x0, 32]
-	.loc 2 1644 0
 	adrp	x1, .LANCHOR134
 	ldr	x1, [x1, #:lo12:.LANCHOR134]
 	str	x1, [x0, 40]
-	.loc 2 1645 0
 	ldp	x29, x30, [sp], 64
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 23
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
 .L830:
-	.cfi_restore_state
-	.loc 2 1633 0 discriminator 3
 	and	x1, x1, -4
-	.loc 2 1632 0 discriminator 3
 	strh	w2, [x0]
-	.loc 2 1633 0 discriminator 3
 	add	x1, x6, x1
-	.loc 2 1631 0 discriminator 3
 	str	wzr, [x0, 4]
-	.loc 2 1633 0 discriminator 3
 	str	x1, [x0, 8]
 	add	x0, x0, 16
 	mov	x1, x4
 	b	.L829
-	.cfi_endproc
-.LFE277:
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
 	.section	.text.FtlLoadMapInfo,"ax",@progbits
 	.align	2
 	.global	FtlLoadMapInfo
 	.type	FtlLoadMapInfo, %function
 FtlLoadMapInfo:
-.LFB278:
-	.loc 2 1648 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 2 1649 0
 	bl	FtlL2PDataInit
-.LVL1110:
-	.loc 2 1651 0
 	adrp	x0, .LANCHOR144
 	add	x0, x0, :lo12:.LANCHOR144
 	bl	FtlMapTblRecovery
-.LVL1111:
-	.loc 2 1654 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE278:
 	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
 	.section	.text.FtlVariablesInit,"ax",@progbits
 	.align	2
 	.global	FtlVariablesInit
 	.type	FtlVariablesInit, %function
 FtlVariablesInit:
-.LFB207:
-	.loc 3 494 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 3 497 0
 	adrp	x0, .LANCHOR150
 	mov	w1, -1
-	.loc 3 494 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 3 497 0
 	strh	w1, [x0, #:lo12:.LANCHOR150]
-	.loc 3 498 0
 	adrp	x0, .LANCHOR151
-	.loc 3 500 0
 	mov	w1, -1
-	.loc 3 494 0
 	str	x19, [sp, 16]
-	.cfi_offset 19, -16
-	.loc 3 498 0
 	str	wzr, [x0, #:lo12:.LANCHOR151]
-	.loc 3 499 0
 	adrp	x0, .LANCHOR152
-	.loc 3 503 0
 	adrp	x19, .LANCHOR6
-	.loc 3 499 0
 	str	wzr, [x0, #:lo12:.LANCHOR152]
-	.loc 3 500 0
 	adrp	x0, .LANCHOR153
 	str	w1, [x0, #:lo12:.LANCHOR153]
-	.loc 3 501 0
 	adrp	x0, .LANCHOR35
-	.loc 3 502 0
 	mov	w1, 0
-	.loc 3 501 0
 	strh	wzr, [x0, #:lo12:.LANCHOR35]
-	.loc 3 502 0
 	adrp	x0, .LANCHOR27
 	ldrh	w2, [x0, #:lo12:.LANCHOR27]
 	adrp	x0, .LANCHOR36
 	ldr	x0, [x0, #:lo12:.LANCHOR36]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL1112:
-	.loc 3 503 0
 	adrp	x0, .LANCHOR43
 	ldrh	w2, [x19, #:lo12:.LANCHOR6]
 	mov	w1, 0
 	ldr	x0, [x0, #:lo12:.LANCHOR43]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL1113:
-	.loc 3 504 0
 	adrp	x0, .LANCHOR126
 	ldrh	w2, [x19, #:lo12:.LANCHOR6]
 	mov	w1, 0
 	ldr	x0, [x0, #:lo12:.LANCHOR126]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL1114:
-	.loc 3 505 0
 	mov	w2, 48
 	mov	w1, 0
 	adrp	x0, .LANCHOR39
 	add	x0, x0, :lo12:.LANCHOR39
 	bl	ftl_memset
-.LVL1115:
-	.loc 3 506 0
 	mov	w2, 512
 	mov	w1, 0
 	adrp	x0, .LANCHOR81
 	add	x0, x0, :lo12:.LANCHOR81
 	bl	ftl_memset
-.LVL1116:
-	.loc 3 507 0
 	bl	FtlGcBufInit
-.LVL1117:
-	.loc 3 508 0
 	bl	FtlL2PDataInit
-.LVL1118:
-	.loc 3 510 0
 	ldr	x19, [sp, 16]
 	mov	w0, 0
 	ldp	x29, x30, [sp], 32
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE207:
 	.size	FtlVariablesInit, .-FtlVariablesInit
 	.section	.text.SupperBlkListInit,"ax",@progbits
 	.align	2
 	.global	SupperBlkListInit
 	.type	SupperBlkListInit, %function
 SupperBlkListInit:
-.LFB285:
-	.loc 2 2116 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -96]!
-	.cfi_def_cfa_offset 96
-	.cfi_offset 29, -96
-	.cfi_offset 30, -88
-	.loc 2 2120 0
 	adrp	x0, .LANCHOR6
 	mov	w1, 0
-	.loc 2 2116 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 2 2120 0
 	ldrh	w2, [x0, #:lo12:.LANCHOR6]
 	mov	w0, 6
-	.loc 2 2116 0
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -48
-	.cfi_offset 24, -40
-	.loc 2 2120 0
 	adrp	x24, .LANCHOR40
-	.loc 2 2116 0
 	stp	x19, x20, [sp, 16]
-	.loc 2 2124 0
 	adrp	x23, .LANCHOR45
-	.loc 2 2116 0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 19, -80
-	.cfi_offset 20, -72
-	.cfi_offset 21, -64
-	.cfi_offset 22, -56
-	.loc 2 2125 0
 	adrp	x22, .LANCHOR48
-	.loc 2 2120 0
 	mul	w2, w2, w0
 	ldr	x0, [x24, #:lo12:.LANCHOR40]
-	.loc 2 2116 0
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 25, -32
-	.cfi_offset 26, -24
-	.loc 2 2128 0
 	adrp	x25, .LANCHOR5
-	.loc 2 2116 0
 	str	x27, [sp, 80]
-	.cfi_offset 27, -16
-	.loc 2 2131 0
 	adrp	x26, .LANCHOR13
-	.loc 2 2128 0
 	add	x25, x25, :lo12:.LANCHOR5
-	.loc 2 2131 0
 	add	x26, x26, :lo12:.LANCHOR13
-	.loc 2 2120 0
 	bl	ftl_memset
-.LVL1119:
-	.loc 2 2126 0
 	mov	w21, 0
-	.loc 2 2121 0
 	adrp	x0, .LANCHOR47
-	.loc 2 2126 0
 	mov	w20, 0
-	.loc 2 2128 0
 	mov	w19, 0
-	.loc 2 2124 0
 	strh	wzr, [x23, #:lo12:.LANCHOR45]
-	.loc 2 2121 0
 	str	xzr, [x0, #:lo12:.LANCHOR47]
-	.loc 2 2122 0
 	adrp	x0, .LANCHOR41
-	.loc 2 2125 0
 	strh	wzr, [x22, #:lo12:.LANCHOR48]
-.LVL1120:
-	.loc 2 2130 0
 	adrp	x27, .LANCHOR3
-	.loc 2 2122 0
 	str	xzr, [x0, #:lo12:.LANCHOR41]
-	.loc 2 2123 0
 	adrp	x0, .LANCHOR44
 	str	xzr, [x0, #:lo12:.LANCHOR44]
-.LVL1121:
 .L837:
-	.loc 2 2128 0 discriminator 1
 	ldrh	w0, [x25]
 	cmp	w19, w0
 	bcs	.L843
-	.loc 2 2133 0
 	adrp	x0, .LANCHOR19
-	.loc 2 2130 0
 	ldrh	w8, [x27, #:lo12:.LANCHOR3]
-	.loc 2 2133 0
 	mov	x6, 0
 	mov	w5, 0
 	ldrh	w7, [x0, #:lo12:.LANCHOR19]
 	b	.L844
-.LVL1122:
 .L839:
-	.loc 2 2131 0
 	ldrb	w0, [x26, x6]
 	mov	w1, w19
 	bl	V2P_block
-.LVL1123:
-	.loc 2 2132 0
 	bl	FtlBbmIsBadBlock
-.LVL1124:
 	cbnz	w0, .L838
-	.loc 2 2133 0
 	add	w5, w5, w7
-.LVL1125:
 	and	w5, w5, 65535
-.LVL1126:
 .L838:
 	add	x6, x6, 1
-.LVL1127:
 .L844:
-	.loc 2 2130 0 discriminator 1
 	cmp	w8, w6, uxth
 	bhi	.L839
-	.loc 2 2135 0
 	cbz	w5, .L846
-	.loc 2 2136 0
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.LVL1128:
 .L840:
-	.loc 2 2137 0
 	ldr	x1, [x24, #:lo12:.LANCHOR40]
 	mov	w0, 6
 	umaddl	x0, w19, w0, x1
 	strh	w5, [x0, 4]
-	.loc 2 2139 0
 	adrp	x0, .LANCHOR51
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w19
 	beq	.L841
-	.loc 2 2140 0 discriminator 1
 	adrp	x0, .LANCHOR52
-	.loc 2 2139 0 discriminator 1
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
 	beq	.L841
-	.loc 2 2141 0
 	adrp	x0, .LANCHOR53
-	.loc 2 2140 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w19
 	beq	.L841
-	.loc 2 2143 0
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x19, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x0]
 	cbnz	w0, .L842
-	.loc 2 2144 0
 	add	w21, w21, 1
-.LVL1129:
-	.loc 2 2145 0
 	mov	w0, w19
-	.loc 2 2144 0
 	and	w21, w21, 65535
-.LVL1130:
-	.loc 2 2145 0
 	bl	INSERT_FREE_LIST
-.LVL1131:
 .L841:
-	.loc 2 2128 0 discriminator 2
 	add	w19, w19, 1
-.LVL1132:
 	and	w19, w19, 65535
-.LVL1133:
 	b	.L837
-.LVL1134:
 .L846:
 	mov	w5, 0
-.LVL1135:
 	b	.L840
-.LVL1136:
 .L842:
-	.loc 2 2147 0
 	add	w20, w20, 1
-.LVL1137:
-	.loc 2 2148 0
 	mov	w0, w19
-	.loc 2 2147 0
 	and	w20, w20, 65535
-.LVL1138:
-	.loc 2 2148 0
 	bl	INSERT_DATA_LIST
-.LVL1139:
 	b	.L841
 .L843:
-	.loc 2 2152 0
 	strh	w20, [x23, #:lo12:.LANCHOR45]
-	.loc 2 2154 0
 	add	w20, w20, w21
-.LVL1140:
-	.loc 2 2153 0
 	strh	w21, [x22, #:lo12:.LANCHOR48]
-	.loc 2 2154 0
 	cmp	w20, w0
 	ble	.L845
-	.loc 2 2154 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR154
 	adrp	x0, .LC1
 	mov	w2, 2154
 	add	x1, x1, :lo12:.LANCHOR154
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1141:
 .L845:
-	.loc 2 2156 0 is_stmt 1
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
-.LVL1142:
 	ldp	x21, x22, [sp, 32]
-.LVL1143:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE285:
 	.size	SupperBlkListInit, .-SupperBlkListInit
 	.section	.text.ftl_check_vpc,"ax",@progbits
 	.align	2
 	.global	ftl_check_vpc
 	.type	ftl_check_vpc, %function
 ftl_check_vpc:
-.LFB290:
-	.loc 2 2273 0
-	.cfi_startproc
-.LVL1144:
 	stp	x29, x30, [sp, -112]!
-	.cfi_def_cfa_offset 112
-	.cfi_offset 29, -112
-	.cfi_offset 30, -104
-	.loc 2 2279 0
 	adrp	x0, .LC94
 	add	x0, x0, :lo12:.LC94
-	.loc 2 2273 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -64
-	.cfi_offset 24, -56
-	.loc 2 2282 0
 	adrp	x23, .LANCHOR61
 	add	x23, x23, :lo12:.LANCHOR61
-	.loc 2 2273 0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -80
-	.cfi_offset 22, -72
-	.loc 2 2282 0
 	mov	w22, 0
-	.loc 2 2273 0
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
-	.loc 2 2279 0
 	adrp	x21, .LANCHOR155
-	.loc 2 2273 0
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 19, -96
-	.cfi_offset 20, -88
-	.cfi_offset 25, -48
-	.cfi_offset 26, -40
-	.cfi_offset 27, -32
-	.cfi_offset 28, -24
-	.loc 2 2279 0
 	add	x1, x21, :lo12:.LANCHOR155
-	.loc 2 2281 0
 	adrp	x20, check_vpc_table
-	.loc 2 2279 0
 	bl	printf
-.LVL1145:
-	.loc 2 2281 0
 	add	x19, x20, :lo12:check_vpc_table
 	mov	w2, 8192
 	mov	w1, 0
 	mov	x0, x19
 	bl	ftl_memset
-.LVL1146:
 .L849:
-	.loc 2 2282 0 discriminator 1
 	ldr	w0, [x23]
 	cmp	w22, w0
 	bcc	.L851
-	.loc 2 2293 0 discriminator 1
 	adrp	x22, .LANCHOR5
-.LVL1147:
-	.loc 2 2297 0 discriminator 1
 	adrp	x24, .LC95
-	.loc 2 2293 0 discriminator 1
 	add	x22, x22, :lo12:.LANCHOR5
-	.loc 2 2295 0 discriminator 1
 	add	x26, x20, :lo12:check_vpc_table
-	.loc 2 2297 0 discriminator 1
 	add	x24, x24, :lo12:.LC95
 	mov	w23, 0
 	mov	w19, 0
-	.loc 2 2295 0 discriminator 1
 	adrp	x25, .LANCHOR42
-.LVL1148:
 .L852:
-	.loc 2 2293 0 discriminator 1
 	ldrh	w0, [x22]
 	cmp	w0, w19
 	bhi	.L854
-	.loc 2 2305 0
 	adrp	x0, .LANCHOR47
 	ldr	x19, [x0, #:lo12:.LANCHOR47]
-.LVL1149:
 	cbz	x19, .L855
-.LBB277:
-	.loc 2 2307 0
 	adrp	x0, .LANCHOR48
-	.loc 2 2313 0
 	adrp	x25, .LC96
 	add	x20, x20, :lo12:check_vpc_table
 	add	x25, x25, :lo12:.LC96
-	.loc 2 2307 0
 	ldrh	w26, [x0, #:lo12:.LANCHOR48]
-.LVL1150:
-	.loc 2 2308 0
 	adrp	x0, .LANCHOR40
 	mov	x24, x0
-	.loc 2 2309 0
 	mov	w22, 0
-	.loc 2 2308 0
 	ldr	x1, [x0, #:lo12:.LANCHOR40]
-	.loc 2 2311 0
 	adrp	x27, .LANCHOR42
-	.loc 2 2316 0
 	mov	w28, 6
-	.loc 2 2308 0
 	sub	x19, x19, x1
 	mov	x1, -6148914691236517206
 	asr	x19, x19, 1
 	movk	x1, 0xaaab, lsl 0
 	mul	x19, x19, x1
 	and	w19, w19, 65535
-.LVL1151:
 .L856:
-	.loc 2 2309 0 discriminator 1
 	cmp	w22, w26
 	bne	.L858
-.LVL1152:
 .L855:
-.LBE277:
-	.loc 2 2321 0
 	cbz	w23, .L848
-.LVL1153:
-	.loc 2 2321 0 is_stmt 0 discriminator 1
 	adrp	x0, .LC1
 	mov	w2, 2321
 	add	x1, x21, :lo12:.LANCHOR155
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1154:
 .L848:
-	.loc 2 2322 0 is_stmt 1
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1155:
 .L851:
-	.cfi_restore_state
-	.loc 2 2284 0
 	mov	w2, 0
 	add	x1, x29, 108
 	mov	w0, w22
 	bl	log2phys
-.LVL1156:
-	.loc 2 2285 0
 	ldr	w0, [x29, 108]
 	cmn	w0, #1
 	beq	.L850
-	.loc 2 2287 0
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL1157:
-	.loc 2 2288 0
 	and	x0, x0, 65535
 	ldrh	w1, [x19, x0, lsl 1]
 	add	w1, w1, 1
 	strh	w1, [x19, x0, lsl 1]
-.LVL1158:
 .L850:
-	.loc 2 2282 0 discriminator 2
 	add	w22, w22, 1
-.LVL1159:
 	b	.L849
-.LVL1160:
 .L854:
-	.loc 2 2295 0
 	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	ubfiz	x28, x19, 1, 16
 	sxtw	x27, w19
@@ -11245,106 +6323,61 @@ ftl_check_vpc:
 	ldrh	w3, [x26, x27, lsl 1]
 	cmp	w2, w3
 	beq	.L853
-	.loc 2 2297 0
 	mov	w1, w19
 	mov	x0, x24
 	bl	printf
-.LVL1161:
-	.loc 2 2298 0
 	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	mov	w1, 65535
 	ldrh	w0, [x0, x28]
 	cmp	w0, w1
 	beq	.L853
-	.loc 2 2298 0 is_stmt 0 discriminator 1
 	ldrh	w1, [x26, x27, lsl 1]
-	.loc 2 2300 0 is_stmt 1 discriminator 1
 	cmp	w1, w0
 	csinc	w23, w23, wzr, ls
-.LVL1162:
 .L853:
-	.loc 2 2293 0 discriminator 2
 	add	w19, w19, 1
-.LVL1163:
 	and	w19, w19, 65535
-.LVL1164:
 	b	.L852
-.LVL1165:
 .L858:
-.LBB278:
-	.loc 2 2311 0
 	ldr	x1, [x27, #:lo12:.LANCHOR42]
 	ubfiz	x0, x19, 1, 16
 	ldrh	w2, [x1, x0]
 	cbz	w2, .L857
-	.loc 2 2313 0
 	ldrh	w3, [x20, w19, sxtw 1]
-	.loc 2 2314 0
 	mov	w23, 1
-.LVL1166:
-	.loc 2 2313 0
 	mov	w1, w19
 	mov	x0, x25
 	bl	printf
-.LVL1167:
 .L857:
-	.loc 2 2316 0
 	ldr	x0, [x24, #:lo12:.LANCHOR40]
 	umull	x19, w19, w28
-.LVL1168:
 	ldrh	w19, [x0, x19]
 	mov	w0, 65535
 	cmp	w19, w0
 	beq	.L855
-.LVL1169:
-	.loc 2 2309 0 discriminator 2
 	add	w22, w22, 1
-.LVL1170:
 	and	w22, w22, 65535
-.LVL1171:
 	b	.L856
-.LBE278:
-	.cfi_endproc
-.LFE290:
 	.size	ftl_check_vpc, .-ftl_check_vpc
 	.section	.text.FtlGcPageVarInit,"ax",@progbits
 	.align	2
 	.global	FtlGcPageVarInit
 	.type	FtlGcPageVarInit, %function
 FtlGcPageVarInit:
-.LFB309:
-	.loc 5 202 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 5 203 0
 	adrp	x0, .LANCHOR95
-	.loc 5 205 0
 	mov	w1, 255
-	.loc 5 202 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 5 203 0
 	strh	wzr, [x0, #:lo12:.LANCHOR95]
-	.loc 5 204 0
 	adrp	x0, .LANCHOR97
-	.loc 5 202 0
 	str	x19, [sp, 16]
-	.cfi_offset 19, -16
-	.loc 5 205 0
 	adrp	x19, .LANCHOR21
-	.loc 5 204 0
 	strh	wzr, [x0, #:lo12:.LANCHOR97]
-	.loc 5 205 0
 	adrp	x0, .LANCHOR96
 	ldrh	w2, [x19, #:lo12:.LANCHOR21]
 	ldr	x0, [x0, #:lo12:.LANCHOR96]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL1172:
-	.loc 5 206 0
 	ldrh	w2, [x19, #:lo12:.LANCHOR21]
 	mov	w0, 12
 	mov	w1, 255
@@ -11352,870 +6385,452 @@ FtlGcPageVarInit:
 	adrp	x0, .LANCHOR98
 	ldr	x0, [x0, #:lo12:.LANCHOR98]
 	bl	ftl_memset
-.LVL1173:
-	.loc 5 208 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_def_cfa 31, 0
-	.loc 5 207 0
 	b	FtlGcBufInit
-.LVL1174:
-	.cfi_endproc
-.LFE309:
 	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
 	.section	.text.FtlGcScanTempBlk,"ax",@progbits
 	.align	2
 	.global	FtlGcScanTempBlk
 	.type	FtlGcScanTempBlk, %function
 FtlGcScanTempBlk:
-.LFB310:
-	.loc 5 211 0
-	.cfi_startproc
-.LVL1175:
 	stp	x29, x30, [sp, -112]!
-	.cfi_def_cfa_offset 112
-	.cfi_offset 29, -112
-	.cfi_offset 30, -104
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -80
-	.cfi_offset 22, -72
-	.loc 5 220 0
 	adrp	x21, .LANCHOR156
-	.loc 5 211 0
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -96
-	.cfi_offset 20, -88
 	mov	x20, x0
 	stp	x27, x28, [sp, 80]
-	.loc 5 221 0
 	mov	w0, 65535
-.LVL1176:
-	.loc 5 220 0
 	ldrh	w19, [x21, #:lo12:.LANCHOR156]
-.LVL1177:
-	.cfi_offset 27, -32
-	.cfi_offset 28, -24
-	.loc 5 211 0
 	mov	w28, w1
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 23, -64
-	.cfi_offset 24, -56
-	.cfi_offset 25, -48
-	.cfi_offset 26, -40
-	.loc 5 221 0
 	cmp	w19, w0
 	beq	.L892
-	.loc 5 223 0
 	cbnz	w19, .L876
 .L877:
-	.loc 5 224 0
 	bl	FtlGcPageVarInit
-.LVL1178:
 	b	.L878
-.LVL1179:
 .L892:
-	.loc 5 222 0
 	mov	w19, 0
-.LVL1180:
 .L876:
-	.loc 5 223 0 discriminator 1
 	adrp	x0, .LANCHOR19
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	cmp	w0, w28
 	beq	.L877
-.LVL1181:
 .L878:
-	.loc 5 235 0
 	adrp	x27, .LANCHOR23
 	add	x27, x27, :lo12:.LANCHOR23
-	.loc 5 222 0
 	mov	w22, 0
-	.loc 5 228 0
 	mov	w23, 65535
-.LVL1182:
 .L886:
 	ldrh	w0, [x20]
-	.loc 5 226 0
 	strb	wzr, [x20, 8]
-.LVL1183:
-	.loc 5 228 0
 	cmp	w0, w23
 	beq	.L893
-	.loc 5 236 0
 	adrp	x25, .LANCHOR24
-	.loc 5 231 0
 	adrp	x26, .LANCHOR3
-	.loc 5 236 0
 	add	x25, x25, :lo12:.LANCHOR24
-	.loc 5 231 0
 	add	x26, x26, :lo12:.LANCHOR3
 .L889:
-.LVL1184:
-	.loc 5 235 0
 	adrp	x1, .LANCHOR91
-	.loc 5 234 0
 	adrp	x24, .LANCHOR120
-	.loc 5 235 0
 	ldrh	w7, [x27]
 	add	x5, x20, 16
 	ldr	x6, [x1, #:lo12:.LANCHOR91]
-	.loc 5 236 0
 	adrp	x1, .LANCHOR92
-	.loc 5 234 0
 	ldr	x0, [x24, #:lo12:.LANCHOR120]
-	.loc 5 230 0
 	mov	w3, 0
-	.loc 5 236 0
 	ldr	x8, [x1, #:lo12:.LANCHOR92]
 	ldrh	w1, [x26]
 	ldrh	w10, [x25]
 	add	x1, x1, 8
 	add	x1, x20, x1, lsl 1
-.LVL1185:
 .L880:
-	.loc 5 231 0 discriminator 1
 	cmp	x1, x5
 	bne	.L882
-	.loc 5 240 0
 	mov	w1, w3
 	str	w3, [x29, 108]
 	mov	w2, 0
 	bl	FlashReadPages
-.LVL1186:
 	ldr	w3, [x29, 108]
-	.loc 5 241 0
 	mov	x11, 0
 	ubfiz	x12, x3, 5, 16
-.LVL1187:
 .L883:
-	.loc 5 241 0 is_stmt 0 discriminator 1
 	cmp	x11, x12
 	bne	.L887
-	.loc 5 264 0 is_stmt 1
 	add	w19, w19, 1
-.LVL1188:
-	.loc 5 266 0
 	add	w22, w22, 1
-.LVL1189:
-	.loc 5 264 0
 	and	w19, w19, 65535
-.LVL1190:
-	.loc 5 268 0
 	cmp	w28, w22
 	adrp	x1, .LANCHOR19
 	bls	.L888
 .L890:
-	.loc 5 274 0
 	ldrh	w0, [x1, #:lo12:.LANCHOR19]
 	cmp	w0, w19
 	bhi	.L889
 .L893:
-	.loc 5 227 0
 	mov	w2, 0
 	b	.L879
-.LVL1191:
 .L882:
-	.loc 5 232 0
 	ldrh	w4, [x5]
-.LVL1192:
-	.loc 5 233 0
 	cmp	w4, w23
 	beq	.L881
-	.loc 5 234 0
 	ubfiz	x2, x3, 5, 16
 	orr	w4, w19, w4, lsl 10
-.LVL1193:
 	add	x2, x0, x2
 	str	w4, [x2, 4]
-	.loc 5 235 0
 	mul	w4, w3, w7
 	asr	w4, w4, 2
 	add	x4, x6, x4, sxtw 2
 	str	x4, [x2, 8]
-	.loc 5 236 0
 	mul	w4, w3, w10
-	.loc 5 237 0
 	add	w3, w3, 1
-.LVL1194:
 	and	w3, w3, 65535
-.LVL1195:
-	.loc 5 236 0
 	asr	w4, w4, 2
 	add	x4, x8, x4, sxtw 2
 	str	x4, [x2, 16]
 .L881:
 	add	x5, x5, 2
-.LVL1196:
 	b	.L880
-.LVL1197:
 .L887:
-	.loc 5 242 0
 	ldr	x6, [x24, #:lo12:.LANCHOR120]
 	add	x5, x6, x11
 	ldr	w4, [x5, 4]
-.LVL1198:
-	.loc 5 243 0
 	lsr	w0, w4, 10
 	bl	P2V_plane
-.LVL1199:
 	and	w2, w0, 65535
-.LVL1200:
-	.loc 5 245 0
 	ldr	w0, [x6, x11]
-.LVL1201:
 	cbnz	w0, .L884
-	.loc 5 247 0
 	ldr	x0, [x5, 16]
-.LVL1202:
 	add	x11, x11, 32
-	.loc 5 248 0
 	ldrh	w1, [x0]
 	cmp	w1, w23
 	bne	.L885
-	.loc 5 249 0
 	adrp	x0, .LANCHOR152
-.LVL1203:
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR152]
-.LVL1204:
 .L879:
-	.loc 5 282 0
 	strh	w19, [x20, 2]
-	.loc 5 281 0
 	mov	w0, -1
-	.loc 5 283 0
 	strb	w2, [x20, 6]
-	.loc 5 284 0
 	mov	w1, w19
-	.loc 5 281 0
 	strh	w0, [x21, #:lo12:.LANCHOR156]
-	.loc 5 284 0
 	mov	x0, x20
 	bl	ftl_sb_update_avl_pages
-.LVL1205:
-	.loc 5 285 0
 	b	.L891
-.LVL1206:
 .L885:
-	.loc 5 252 0
 	ldp	w2, w0, [x0, 8]
-.LVL1207:
 	mov	w1, w4
 	bl	FtlGcUpdatePage
-.LVL1208:
 	b	.L883
-.LVL1209:
 .L884:
-	.loc 5 256 0
 	adrp	x0, .LANCHOR42
 	ldrh	w1, [x20]
-	.loc 5 259 0
 	mov	w19, 0
-.LVL1210:
-	.loc 5 256 0
 	ldr	x0, [x0, #:lo12:.LANCHOR42]
 	strh	wzr, [x0, x1, lsl 1]
-	.loc 5 257 0
 	ldrh	w0, [x20]
 	bl	INSERT_FREE_LIST
-.LVL1211:
-	.loc 5 258 0
 	mov	w0, -1
 	strh	w0, [x20]
-.LVL1212:
-	.loc 5 260 0
 	bl	FtlGcPageVarInit
-.LVL1213:
-	.loc 5 261 0
 	b	.L886
-.LVL1214:
 .L888:
-	.loc 5 268 0 discriminator 1
 	ldrh	w0, [x21, #:lo12:.LANCHOR156]
 	cmp	w0, w23
 	beq	.L890
-	.loc 5 269 0
 	add	w0, w0, w22
 	strh	w0, [x21, #:lo12:.LANCHOR156]
-	.loc 5 270 0
 	ldrh	w0, [x1, #:lo12:.LANCHOR19]
 	cmp	w0, w19
 	bls	.L890
-.LVL1215:
 .L891:
-	.loc 5 286 0
 	ldp	x19, x20, [sp, 16]
-.LVL1216:
 	mov	w0, -1
 	ldp	x21, x22, [sp, 32]
-.LVL1217:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-.LVL1218:
 	ldp	x29, x30, [sp], 112
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE310:
 	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
 	.section	.text.FlashTestBlk,"ax",@progbits
 	.align	2
 	.global	FlashTestBlk
 	.type	FlashTestBlk, %function
 FlashTestBlk:
-.LFB344:
-	.loc 1 197 0
-	.cfi_startproc
-.LVL1219:
 	stp	x29, x30, [sp, -128]!
-	.cfi_def_cfa_offset 128
-	.cfi_offset 29, -128
-	.cfi_offset 30, -120
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -112
-	.cfi_offset 20, -104
-	.loc 1 197 0
 	and	w19, w0, 65535
-	.loc 1 202 0
 	cmp	w19, 11
 	bls	.L901
-.LVL1220:
-.LBB281:
-.LBB282:
-	.loc 1 207 0
 	add	x0, x29, 64
-.LVL1221:
-	.loc 1 208 0
 	mov	w2, 32
 	mov	w1, 165
-	.loc 1 206 0
 	adrp	x20, ftl_temp_buf
 	add	x20, x20, :lo12:ftl_temp_buf
-	.loc 1 207 0
 	stp	x20, x0, [x29, 40]
-	.loc 1 208 0
 	bl	ftl_memset
-.LVL1222:
-	.loc 1 210 0
 	lsl	w19, w19, 10
-.LVL1223:
-	.loc 1 209 0
 	mov	w2, 8
 	mov	w1, 90
 	mov	x0, x20
 	bl	ftl_memset
-.LVL1224:
-	.loc 1 211 0
 	mov	w2, 1
-	.loc 1 210 0
 	str	w19, [x29, 36]
-	.loc 1 211 0
 	mov	w1, w2
 	add	x0, x29, 32
 	bl	FlashEraseBlocks
-.LVL1225:
-	.loc 1 212 0
 	mov	w3, 1
 	add	x0, x29, 32
 	mov	w2, w3
 	mov	w1, w3
 	bl	FlashProgPages
-.LVL1226:
-	.loc 1 213 0
 	ldr	w0, [x29, 32]
-	.loc 1 219 0
 	mov	w2, 1
 	mov	w1, 0
-	.loc 1 213 0
 	cmp	w0, 0
-	.loc 1 219 0
 	add	x0, x29, 32
-	.loc 1 213 0
 	csetm	w19, ne
-.LDL1:
-.LVL1227:
-	.loc 1 219 0
 	bl	FlashEraseBlocks
-.LVL1228:
 .L899:
-.LBE282:
-.LBE281:
-	.loc 1 221 0
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 128
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1229:
 .L901:
-	.cfi_restore_state
-	.loc 1 203 0
 	mov	w19, 0
 	b	.L899
-	.cfi_endproc
-.LFE344:
 	.size	FlashTestBlk, .-FlashTestBlk
 	.section	.text.FlashGetBadBlockList,"ax",@progbits
 	.align	2
 	.global	FlashGetBadBlockList
 	.type	FlashGetBadBlockList, %function
 FlashGetBadBlockList:
-.LFB345:
-	.loc 1 224 0
-	.cfi_startproc
-.LVL1230:
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 1 227 0
 	mov	w2, 256
-	.loc 1 224 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -16
-	.cfi_offset 20, -8
-	.loc 1 224 0
 	mov	x19, x0
 	mov	w20, w1
-	.loc 1 227 0
 	mov	w1, 255
-.LVL1231:
 	bl	ftl_memset
-.LVL1232:
-	.loc 1 228 0
 	adrp	x0, .LANCHOR105
 	mov	w1, w20
 	ldr	x2, [x0, #:lo12:.LANCHOR105]
 	mov	x0, x19
 	blr	x2
-.LVL1233:
 	and	w0, w0, 65535
-.LVL1234:
-	.loc 1 229 0
 	cmp	w0, 50
 	bls	.L904
-	.loc 1 230 0
 	mov	w2, 256
 	mov	w1, 255
 	mov	x0, x19
-.LVL1235:
 	bl	ftl_memset
-.LVL1236:
-	.loc 1 231 0
 	mov	w0, 0
-.LVL1237:
 .L904:
-	.loc 1 233 0
 	adrp	x1, .LANCHOR0+14
 	ldrh	w1, [x1, #:lo12:.LANCHOR0+14]
 	cmp	w1, 4
 	bne	.L908
 	mov	x1, 0
 .L906:
-.LVL1238:
-	.loc 1 234 0 discriminator 1
 	cmp	w0, w1, uxth
 	bhi	.L907
-.LVL1239:
 .L908:
-	.loc 1 239 0
 	ldp	x19, x20, [sp, 16]
-.LVL1240:
 	ldp	x29, x30, [sp], 32
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1241:
 .L907:
-	.cfi_restore_state
-	.loc 1 235 0 discriminator 3
 	ldrh	w2, [x19, x1, lsl 1]
 	lsr	w2, w2, 1
 	strh	w2, [x19, x1, lsl 1]
-.LVL1242:
 	add	x1, x1, 1
-.LVL1243:
 	b	.L906
-	.cfi_endproc
-.LFE345:
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
 	.section	.text.ftl_memcpy,"ax",@progbits
 	.align	2
 	.global	ftl_memcpy
 	.type	ftl_memcpy, %function
 ftl_memcpy:
-.LFB347:
-	.loc 1 247 0
-	.cfi_startproc
-.LVL1244:
-	.loc 1 248 0
 	uxtw	x2, w2
 	b	memcpy
-.LVL1245:
-	.cfi_endproc
-.LFE347:
 	.size	ftl_memcpy, .-ftl_memcpy
 	.section	.text.FtlBbmTblFlush,"ax",@progbits
 	.align	2
 	.global	FtlBbmTblFlush
 	.type	FtlBbmTblFlush, %function
 FtlBbmTblFlush:
-.LFB226:
-	.loc 4 80 0
-	.cfi_startproc
-.LVL1246:
 	stp	x29, x30, [sp, -96]!
-	.cfi_def_cfa_offset 96
-	.cfi_offset 29, -96
-	.cfi_offset 30, -88
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -48
-	.cfi_offset 24, -40
-	.loc 4 88 0
 	adrp	x23, .LANCHOR108
-	.loc 4 80 0
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -80
-	.cfi_offset 20, -72
-	.loc 4 87 0
 	adrp	x19, .LANCHOR106
-	.loc 4 80 0
 	stp	x21, x22, [sp, 32]
-	.loc 4 87 0
 	add	x20, x19, :lo12:.LANCHOR106
-	.cfi_offset 21, -64
-	.cfi_offset 22, -56
 	adrp	x22, .LANCHOR107
-	.loc 4 88 0
 	ldr	x1, [x23, #:lo12:.LANCHOR108]
-	.loc 4 80 0
 	stp	x25, x26, [sp, 64]
 	adrp	x21, .LANCHOR37
 	str	x27, [sp, 80]
-	.cfi_offset 25, -32
-	.cfi_offset 26, -24
-	.cfi_offset 27, -16
 	add	x25, x21, :lo12:.LANCHOR37
-	.loc 4 87 0
 	ldr	x0, [x22, #:lo12:.LANCHOR107]
-	.loc 4 91 0
 	adrp	x26, .LANCHOR10
-	.loc 4 88 0
 	stp	x0, x1, [x20, 8]
-	.loc 4 89 0
 	adrp	x1, .LANCHOR23
-	.loc 4 92 0
 	adrp	x27, .LANCHOR137
 	add	x25, x25, 32
-	.loc 4 89 0
 	ldrh	w2, [x1, #:lo12:.LANCHOR23]
-	.loc 4 91 0
 	mov	w24, 0
 	add	x26, x26, :lo12:.LANCHOR10
-	.loc 4 92 0
 	add	x27, x27, :lo12:.LANCHOR137
-	.loc 4 89 0
 	mov	w1, 0
 	bl	ftl_memset
-.LVL1247:
 .L912:
-	.loc 4 91 0 discriminator 1
 	ldrh	w0, [x26]
 	cmp	w24, w0
 	blt	.L913
-	.loc 4 94 0
 	add	x19, x19, :lo12:.LANCHOR106
-	.loc 4 98 0
 	add	x20, x21, :lo12:.LANCHOR37
-	.loc 4 95 0
 	mov	w2, 16
 	mov	w1, 255
-	.loc 4 108 0
 	adrp	x24, .LC97
-.LVL1248:
-	.loc 4 110 0
 	adrp	x26, .LANCHOR20
-	.loc 4 94 0
 	ldr	x27, [x19, 16]
-.LVL1249:
-	.loc 4 108 0
 	add	x24, x24, :lo12:.LC97
-	.loc 4 110 0
 	add	x26, x26, :lo12:.LANCHOR20
-	.loc 4 82 0
 	mov	w25, 0
-	.loc 4 95 0
 	mov	x0, x27
 	bl	ftl_memset
-.LVL1250:
-	.loc 4 97 0
 	mov	w0, -3887
 	strh	w0, [x27]
-	.loc 4 98 0
 	ldr	w0, [x20, 8]
 	str	w0, [x27, 4]
-	.loc 4 99 0
 	ldrh	w0, [x21, #:lo12:.LANCHOR37]
-	.loc 4 84 0
 	mov	w21, 0
-	.loc 4 99 0
 	strh	w0, [x27, 2]
-	.loc 4 100 0
 	ldrh	w0, [x20, 4]
 	strh	w0, [x27, 8]
-	.loc 4 101 0
 	ldrh	w0, [x20, 6]
 	strh	w0, [x27, 10]
-	.loc 4 102 0
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0, #:lo12:.LANCHOR2]
 	strh	w0, [x27, 12]
-.LVL1251:
 .L914:
-	.loc 4 108 0
 	ldrh	w4, [x27, 10]
-	.loc 4 107 0
 	ldrh	w1, [x20]
 	ldrh	w2, [x20, 2]
-	.loc 4 108 0
 	ldrh	w3, [x20, 4]
-	.loc 4 104 0
 	ldr	x0, [x22, #:lo12:.LANCHOR107]
 	str	x0, [x19, 8]
-	.loc 4 105 0
 	ldr	x0, [x23, #:lo12:.LANCHOR108]
 	str	x0, [x19, 16]
-	.loc 4 107 0
 	orr	w0, w2, w1, lsl 10
-	.loc 4 106 0
 	str	wzr, [x19]
-	.loc 4 107 0
 	str	w0, [x19, 4]
-	.loc 4 108 0
 	mov	x0, x24
 	bl	printf
-.LVL1252:
-	.loc 4 109 0
 	mov	w3, 1
 	mov	x0, x19
 	mov	w1, w3
 	mov	w2, w3
 	bl	FlashProgPages
-.LVL1253:
-	.loc 4 110 0
 	ldrh	w0, [x26]
 	ldrh	w1, [x20, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
 	blt	.L915
-	.loc 4 113 0
 	ldr	w0, [x20, 8]
-	.loc 4 122 0
 	mov	w2, 1
-	.loc 4 116 0
 	ldrh	w1, [x20, 4]
-	.loc 4 113 0
 	add	w0, w0, 1
 	str	w0, [x20, 8]
-	.loc 4 114 0
 	str	w0, [x27, 4]
-	.loc 4 115 0
 	ldrh	w0, [x20]
 	strh	w0, [x27, 8]
-	.loc 4 118 0
 	strh	w0, [x20, 4]
-	.loc 4 121 0
 	adrp	x0, .LANCHOR111
-	.loc 4 116 0
 	strh	w1, [x20]
-	.loc 4 119 0
 	lsl	w1, w1, 10
-	.loc 4 121 0
 	ldr	x0, [x0, #:lo12:.LANCHOR111]
-	.loc 4 119 0
 	str	w1, [x19, 4]
-	.loc 4 117 0
 	strh	wzr, [x20, 2]
-	.loc 4 121 0
 	str	w1, [x0, 4]
-	.loc 4 122 0
 	mov	w1, w2
 	bl	FlashEraseBlocks
-.LVL1254:
-	.loc 4 123 0
 	mov	w3, 1
 	mov	x0, x19
 	mov	w2, w3
 	mov	w1, w3
 	bl	FlashProgPages
-.LVL1255:
 .L915:
-	.loc 4 126 0
 	ldrh	w0, [x20, 2]
 	add	w0, w0, 1
 	strh	w0, [x20, 2]
-	.loc 4 127 0
 	ldr	w0, [x19]
 	cmn	w0, #1
 	bne	.L916
-	.loc 4 129 0
 	ldr	w1, [x19, 4]
-	.loc 4 130 0
 	add	w21, w21, 1
-.LVL1256:
-	.loc 4 129 0
 	adrp	x0, .LC98
-	.loc 4 130 0
 	and	w21, w21, 65535
-	.loc 4 129 0
 	add	x0, x0, :lo12:.LC98
 	bl	printf
-.LVL1257:
-	.loc 4 131 0
 	cmp	w21, 3
 	bls	.L914
-	.loc 4 132 0
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC99
 	mov	w2, w21
 	add	x0, x0, :lo12:.LC99
 	bl	printf
-.LVL1258:
 .L918:
 	b	.L918
-.LVL1259:
 .L913:
-	.loc 4 92 0 discriminator 3
 	ldrh	w2, [x27]
 	ldr	x1, [x25], 8
 	ldr	x0, [x20, 8]
 	mul	w3, w24, w2
 	lsl	w2, w2, 2
-	.loc 4 91 0 discriminator 3
 	add	w24, w24, 1
-.LVL1260:
-	.loc 4 92 0 discriminator 3
 	add	x0, x0, x3, sxtw 2
 	bl	ftl_memcpy
-.LVL1261:
 	b	.L912
-.LVL1262:
 .L919:
 	mov	w25, 1
-.LVL1263:
 	b	.L914
-.LVL1264:
 .L916:
-	.loc 4 139 0
 	cbz	w25, .L919
-	.loc 4 146 0
 	mov	w0, 0
 	ldr	x27, [sp, 80]
-.LVL1265:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-.LVL1266:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-.LVL1267:
 	ldp	x29, x30, [sp], 96
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE226:
 	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
 	.section	.text.allocate_data_superblock,"ax",@progbits
 	.align	2
 	.global	allocate_data_superblock
 	.type	allocate_data_superblock, %function
 allocate_data_superblock:
-.LFB298:
-	.loc 2 2582 0
-	.cfi_startproc
-.LVL1268:
 	stp	x29, x30, [sp, -112]!
-	.cfi_def_cfa_offset 112
-	.cfi_offset 29, -112
-	.cfi_offset 30, -104
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 27, -32
-	.cfi_offset 28, -24
-	.loc 2 2588 0
 	adrp	x28, .LANCHOR48
-	.loc 2 2582 0
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -64
-	.cfi_offset 24, -56
-	.loc 2 2591 0
 	add	x23, x28, :lo12:.LANCHOR48
-	.loc 2 2582 0
 	stp	x19, x20, [sp, 16]
-	.loc 2 2588 0
 	adrp	x27, .LANCHOR45
-	.cfi_offset 19, -96
-	.cfi_offset 20, -88
-	.loc 2 2582 0
 	mov	x19, x0
 	stp	x21, x22, [sp, 32]
-	.loc 2 2588 0
 	add	x0, x27, :lo12:.LANCHOR45
-.LVL1269:
-	.loc 2 2582 0
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 21, -80
-	.cfi_offset 22, -72
-	.cfi_offset 25, -48
-	.cfi_offset 26, -40
-	.loc 2 2588 0
 	str	x0, [x29, 104]
-.LVL1270:
 .L922:
 	ldr	x1, [x29, 104]
 	adrp	x24, .LANCHOR5
@@ -12225,21 +6840,17 @@ allocate_data_superblock:
 	ldrh	w1, [x24, #:lo12:.LANCHOR5]
 	cmp	w0, w1
 	ble	.L923
-	.loc 2 2588 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR157
 	adrp	x0, .LC1
 	mov	w2, 2588
 	add	x1, x1, :lo12:.LANCHOR157
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1271:
 .L923:
-	.loc 2 2590 0 is_stmt 1
 	adrp	x0, .LANCHOR53
 	add	x0, x0, :lo12:.LANCHOR53
 	cmp	x19, x0
 	bne	.L948
-	.loc 2 2591 0
 	adrp	x1, .LANCHOR87
 	ldrh	w0, [x23]
 	ldr	w1, [x1, #:lo12:.LANCHOR87]
@@ -12247,141 +6858,103 @@ allocate_data_superblock:
 	lsr	w0, w0, 1
 	add	w0, w0, 1
 	add	w1, w0, w1, lsr 2
-.LVL1272:
-	.loc 2 2595 0
 	ands	w1, w1, 65535
 	beq	.L924
-	.loc 2 2596 0
 	sub	w1, w1, #1
-.LVL1273:
 	and	w1, w1, 65535
-.LVL1274:
 .L924:
-	.loc 2 2597 0
 	adrp	x0, .LANCHOR47
 	add	x0, x0, :lo12:.LANCHOR47
 	bl	List_pop_index_node
-.LVL1275:
 	and	w20, w0, 65535
-.LVL1276:
 	ldrh	w0, [x23]
 	cbnz	w0, .L925
-	.loc 2 2597 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR157
 	adrp	x0, .LC1
 	mov	w2, 2597
 	add	x1, x1, :lo12:.LANCHOR157
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1277:
 .L925:
-	.loc 2 2597 0 discriminator 3
 	ldrh	w0, [x23]
 	sub	w0, w0, #1
 	strh	w0, [x23]
-	.loc 2 2600 0 is_stmt 1 discriminator 3
 	strh	w20, [x19]
-	.loc 2 2601 0 discriminator 3
 	mov	x0, x19
 	bl	make_superblock
-.LVL1278:
-	.loc 2 2602 0 discriminator 3
 	ldrb	w0, [x19, 7]
 	cbnz	w0, .L926
-	.loc 2 2606 0
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x20, 1, 16
 	mov	w2, -1
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	strh	w2, [x1, x0]
-	.loc 2 2607 0
 	mov	w0, w20
 	bl	INSERT_DATA_LIST
-.LVL1279:
-	.loc 2 2608 0
 	ldrh	w1, [x27, #:lo12:.LANCHOR45]
 	ldrh	w0, [x23]
 	add	w0, w0, w1
 	ldrh	w1, [x24, #:lo12:.LANCHOR5]
 	cmp	w0, w1
 	ble	.L922
-	.loc 2 2608 0 is_stmt 0 discriminator 1
 	mov	w2, 2608
 	adrp	x1, .LANCHOR157
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR157
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1280:
 	b	.L922
-.LVL1281:
 .L948:
 	mov	w1, 0
 	b	.L924
-.LVL1282:
 .L926:
-	.loc 2 2611 0 is_stmt 1
 	ldrh	w1, [x27, #:lo12:.LANCHOR45]
 	ldrh	w0, [x23]
 	add	w0, w0, w1
 	ldrh	w1, [x24, #:lo12:.LANCHOR5]
 	cmp	w0, w1
 	ble	.L928
-	.loc 2 2611 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR157
 	adrp	x0, .LC1
 	mov	w2, 2611
 	add	x1, x1, :lo12:.LANCHOR157
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1283:
 .L928:
-	.loc 2 2614 0 is_stmt 1 discriminator 1
 	adrp	x0, .LANCHOR3
-	.loc 2 2615 0 discriminator 1
 	adrp	x25, .LANCHOR111
 	add	x26, x19, 16
 	mov	w21, 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	mov	x4, x26
 	ldr	x3, [x25, #:lo12:.LANCHOR111]
-	.loc 2 2617 0 discriminator 1
 	mov	w6, 65535
 	ubfiz	x0, x0, 5, 16
 	add	x1, x3, 8
 	add	x0, x0, 8
 	add	x0, x3, x0
 .L929:
-.LVL1284:
-	.loc 2 2614 0 discriminator 1
 	cmp	x0, x1
 	bne	.L931
-	.loc 2 2622 0
 	cbnz	w21, .L932
-	.loc 2 2622 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR157
 	adrp	x0, .LC1
 	mov	w2, 2622
 	add	x1, x1, :lo12:.LANCHOR157
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1285:
 .L932:
-	.loc 2 2624 0 is_stmt 1
 	adrp	x0, .LANCHOR80
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w0, w20
 	bne	.L933
-	.loc 2 2624 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR157
 	adrp	x0, .LC1
 	mov	w2, 2624
 	add	x1, x1, :lo12:.LANCHOR157
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1286:
 .L933:
-	.loc 2 2625 0 is_stmt 1
 	ldrb	w0, [x19, 8]
 	uxtw	x22, w20
 	adrp	x6, .LANCHOR43
@@ -12389,29 +6962,21 @@ allocate_data_superblock:
 	adrp	x5, .LANCHOR72
 	adrp	x4, .LANCHOR73
 	cbnz	w0, .L934
-	.loc 2 2626 0
 	ldr	x2, [x6, #:lo12:.LANCHOR43]
 	lsl	x1, x22, 1
 	ldrh	w0, [x2, x1]
 	cbz	w0, .L935
-	.loc 2 2627 0
 	ldrh	w3, [x7, #:lo12:.LANCHOR14]
 	add	w0, w0, w3
 .L959:
-	.loc 2 2629 0
 	strh	w0, [x2, x1]
-	.loc 2 2631 0
 	mov	w1, 0
-	.loc 2 2630 0
 	ldr	w0, [x5, #:lo12:.LANCHOR72]
 	add	w0, w0, 1
 	str	w0, [x5, #:lo12:.LANCHOR72]
-	.loc 2 2631 0
 	mov	w0, w20
 	bl	ftl_set_blk_mode
-.LVL1287:
 .L937:
-	.loc 2 2638 0
 	ldr	x0, [x6, #:lo12:.LANCHOR43]
 	lsl	x22, x22, 1
 	ldrh	w1, [x0, x22]
@@ -12419,10 +6984,8 @@ allocate_data_superblock:
 	ldr	w2, [x0, #:lo12:.LANCHOR76]
 	cmp	w1, w2
 	bls	.L938
-	.loc 2 2639 0
 	str	w1, [x0, #:lo12:.LANCHOR76]
 .L938:
-	.loc 2 2641 0
 	ldr	w2, [x5, #:lo12:.LANCHOR72]
 	ldr	w1, [x4, #:lo12:.LANCHOR73]
 	ldrh	w0, [x7, #:lo12:.LANCHOR14]
@@ -12431,83 +6994,50 @@ allocate_data_superblock:
 	udiv	w0, w0, w1
 	adrp	x1, .LANCHOR74
 	str	w0, [x1, #:lo12:.LANCHOR74]
-	.loc 2 2642 0
 	adrp	x0, .LANCHOR127
 	ldr	x1, [x0, #:lo12:.LANCHOR127]
 	ldr	w0, [x1, 16]
 	add	w0, w0, 1
 	str	w0, [x1, 16]
-.LVL1288:
-	.loc 2 2645 0
 	ldr	x0, [x25, #:lo12:.LANCHOR111]
 	ubfiz	x1, x21, 5, 16
 	add	x1, x1, 4
 	add	x2, x0, 4
 	add	x1, x0, x1
-.LVL1289:
 .L939:
-	.loc 2 2644 0 discriminator 1
 	cmp	x1, x2
 	bne	.L940
-	.loc 2 2646 0
 	ldrb	w1, [x19, 8]
 	mov	w2, w21
-	.loc 2 2648 0
 	mov	x24, 0
-	.loc 2 2646 0
 	bl	FlashEraseBlocks
-.LVL1290:
-	.loc 2 2647 0
 	mov	w1, 0
-.LVL1291:
 .L941:
-	.loc 2 2648 0 discriminator 1
 	cmp	w21, w24, uxth
 	bhi	.L943
-	.loc 2 2659 0
 	cbz	w1, .L944
-	.loc 2 2660 0
 	mov	w0, w20
 	bl	update_multiplier_value
-.LVL1292:
-	.loc 2 2661 0
 	bl	FtlBbmTblFlush
-.LVL1293:
 .L944:
-	.loc 2 2664 0
 	ldrb	w0, [x19, 7]
 	adrp	x2, .LANCHOR42
 	cbnz	w0, .L945
-	.loc 2 2666 0
 	ldr	x0, [x2, #:lo12:.LANCHOR42]
 	mov	w1, -1
 	strh	w1, [x0, x22]
-	.loc 2 2667 0
 	mov	w0, w20
 	bl	INSERT_DATA_LIST
-.LVL1294:
-	.loc 2 2668 0
 	b	.L922
-.LVL1295:
 .L931:
-	.loc 2 2617 0
 	ldrh	w2, [x4]
-	.loc 2 2616 0
 	stp	xzr, xzr, [x1]
-	.loc 2 2617 0
 	cmp	w2, w6
 	beq	.L930
-	.loc 2 2618 0
 	ubfiz	x5, x21, 5, 16
-	.loc 2 2619 0
 	add	w21, w21, 1
-.LVL1296:
-	.loc 2 2618 0
 	add	x5, x3, x5
-	.loc 2 2619 0
 	and	w21, w21, 65535
-.LVL1297:
-	.loc 2 2618 0
 	lsl	w2, w2, 10
 	str	w2, [x5, 4]
 .L930:
@@ -12515,362 +7045,193 @@ allocate_data_superblock:
 	add	x4, x4, 2
 	b	.L929
 .L935:
-	.loc 2 2629 0
 	mov	w0, 2
 	b	.L959
 .L934:
-	.loc 2 2633 0
 	ldr	x2, [x6, #:lo12:.LANCHOR43]
 	lsl	x0, x22, 1
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-	.loc 2 2634 0
 	ldr	w0, [x4, #:lo12:.LANCHOR73]
 	add	w0, w0, 1
 	str	w0, [x4, #:lo12:.LANCHOR73]
-.LVL1298:
-.LBB283:
-.LBB284:
 	mov	w0, w20
 	bl	ftl_set_blk_mode.part.6
-.LVL1299:
 	b	.L937
-.LVL1300:
 .L940:
-.LBE284:
-.LBE283:
-	.loc 2 2645 0 discriminator 3
 	ldr	w3, [x2]
 	and	w3, w3, -1024
 	str	w3, [x2], 32
 	b	.L939
-.LVL1301:
 .L943:
-	.loc 2 2649 0
 	ldr	x2, [x25, #:lo12:.LANCHOR111]
 	lsl	x0, x24, 5
 	add	x3, x2, x0
 	ldr	w2, [x2, x0]
 	cmn	w2, #1
 	bne	.L942
-	.loc 2 2650 0
 	add	w1, w1, 1
-.LVL1302:
-	.loc 2 2651 0
 	ldr	w0, [x3, 4]
-	.loc 2 2650 0
 	stp	w2, w1, [x29, 96]
-.LVL1303:
-	.loc 2 2652 0
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.LVL1304:
-	.loc 2 2654 0
 	ldp	w2, w1, [x29, 96]
-	.loc 2 2653 0
 	strh	w2, [x26]
-	.loc 2 2654 0
 	ldrb	w0, [x19, 7]
 	sub	w0, w0, #1
 	strb	w0, [x19, 7]
-.LVL1305:
 .L942:
 	add	x24, x24, 1
-.LVL1306:
 	add	x26, x26, 2
 	b	.L941
-.LVL1307:
 .L945:
-	.loc 2 2671 0
 	adrp	x1, .LANCHOR19
-	.loc 2 2675 0
 	adrp	x3, .LANCHOR70
-	.loc 2 2674 0
 	strb	wzr, [x19, 6]
-	.loc 2 2671 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR19]
-	.loc 2 2673 0
 	strh	wzr, [x19, 2]
-	.loc 2 2672 0
 	strh	w20, [x19]
-	.loc 2 2671 0
 	mul	w0, w0, w1
-	.loc 2 2675 0
 	ldr	w1, [x3, #:lo12:.LANCHOR70]
 	str	w1, [x19, 12]
 	add	w1, w1, 1
 	str	w1, [x3, #:lo12:.LANCHOR70]
-	.loc 2 2676 0
 	ldr	x1, [x2, #:lo12:.LANCHOR42]
-	.loc 2 2671 0
 	and	w0, w0, 65535
 	strh	w0, [x19, 4]
-	.loc 2 2676 0
 	strh	w0, [x1, x22]
-	.loc 2 2677 0
 	ldrh	w0, [x19, 4]
 	cbz	w0, .L946
-	.loc 2 2677 0 is_stmt 0 discriminator 2
 	ldrb	w0, [x19, 7]
 	cbnz	w0, .L947
 .L946:
-	.loc 2 2677 0 discriminator 3
 	adrp	x1, .LANCHOR157
 	adrp	x0, .LC1
 	mov	w2, 2677
 	add	x1, x1, :lo12:.LANCHOR157
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1308:
 .L947:
-	.loc 2 2679 0 is_stmt 1
 	ldp	x19, x20, [sp, 16]
-.LVL1309:
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
-.LVL1310:
 	ldp	x23, x24, [sp, 48]
-.LVL1311:
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE298:
 	.size	allocate_data_superblock, .-allocate_data_superblock
 	.section	.text.FtlGcFreeBadSuperBlk,"ax",@progbits
 	.align	2
 	.global	FtlGcFreeBadSuperBlk
 	.type	FtlGcFreeBadSuperBlk, %function
 FtlGcFreeBadSuperBlk:
-.LFB317:
-	.loc 5 390 0
-	.cfi_startproc
-.LVL1312:
 	stp	x29, x30, [sp, -96]!
-	.cfi_def_cfa_offset 96
-	.cfi_offset 29, -96
-	.cfi_offset 30, -88
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -64
-	.cfi_offset 22, -56
-	.loc 5 395 0
 	adrp	x21, .LANCHOR101
-	.loc 5 390 0
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 25, -32
-	.cfi_offset 26, -24
 	and	w25, w0, 65535
-	.loc 5 395 0
 	ldrh	w0, [x21, #:lo12:.LANCHOR101]
-.LVL1313:
-	.loc 5 390 0
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	str	x27, [sp, 80]
-	.cfi_offset 19, -80
-	.cfi_offset 20, -72
-	.cfi_offset 23, -48
-	.cfi_offset 24, -40
-	.cfi_offset 27, -16
-	.loc 5 395 0
 	cbz	w0, .L961
-.LBB287:
-.LBB288:
-	.loc 5 399 0
 	adrp	x23, .LANCHOR102
-	.loc 5 406 0
 	add	x24, x23, :lo12:.LANCHOR102
-.LBE288:
-.LBE287:
 	mov	w19, 0
 .L962:
-.LVL1314:
-.LBB291:
-.LBB289:
-	.loc 5 396 0
 	adrp	x0, .LANCHOR3
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w0, w19
 	bhi	.L968
-	.loc 5 412 0
 	bl	FtlGcReFreshBadBlk
-.LVL1315:
 .L961:
-.LBE289:
-.LBE291:
-	.loc 5 415 0
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-.LVL1316:
 	ldp	x29, x30, [sp], 96
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1317:
 .L968:
-	.cfi_restore_state
-.LBB292:
-.LBB290:
-	.loc 5 397 0
 	adrp	x0, .LANCHOR13
 	add	x0, x0, :lo12:.LANCHOR13
 	mov	w1, w25
-	.loc 5 398 0
 	add	x22, x21, :lo12:.LANCHOR101
 	mov	w20, 0
-	.loc 5 397 0
 	ldrb	w0, [x0, w19, sxtw]
 	bl	V2P_block
-.LVL1318:
 	and	w26, w0, 65535
-.LVL1319:
 .L963:
-	.loc 5 398 0
 	ldrh	w0, [x22]
 	cmp	w0, w20
 	bhi	.L967
-	.loc 5 396 0
 	add	w19, w19, 1
-.LVL1320:
 	and	w19, w19, 65535
-.LVL1321:
 	b	.L962
 .L967:
-	.loc 5 399 0
 	add	x0, x23, :lo12:.LANCHOR102
 	add	w27, w20, 1
 	ldrh	w0, [x0, w20, sxtw 1]
 	cmp	w0, w26
 	bne	.L964
-	.loc 5 401 0
 	mov	w1, w26
 	adrp	x0, .LC100
 	add	x0, x0, :lo12:.LC100
 	bl	printf
-.LVL1322:
-	.loc 5 403 0
 	mov	w0, w26
 	bl	FtlBbmMapBadBlock
-.LVL1323:
-	.loc 5 404 0
 	bl	FtlBbmTblFlush
-.LVL1324:
-	.loc 5 405 0
 	ldrh	w1, [x22]
-	.loc 5 406 0
 	sxtw	x3, w27
 	and	x4, x20, 65535
-	.loc 5 405 0
 	mov	x0, 0
-.LVL1325:
 .L965:
 	add	w2, w20, w0
 	cmp	w1, w2, uxth
 	bhi	.L966
-	.loc 5 407 0
 	sub	w1, w1, #1
 	strh	w1, [x22]
-.LVL1326:
 .L964:
-	.loc 5 398 0
 	and	w20, w27, 65535
-.LVL1327:
 	b	.L963
-.LVL1328:
 .L966:
-	.loc 5 406 0
 	add	x2, x3, x0
 	ldrh	w5, [x24, x2, lsl 1]
 	add	x2, x4, x0
 	add	x0, x0, 1
-.LVL1329:
 	strh	w5, [x24, x2, lsl 1]
 	b	.L965
-.LBE290:
-.LBE292:
-	.cfi_endproc
-.LFE317:
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
 	.section	.text.update_vpc_list,"ax",@progbits
 	.align	2
 	.global	update_vpc_list
 	.type	update_vpc_list, %function
 update_vpc_list:
-.LFB301:
-	.loc 2 2738 0
-	.cfi_startproc
-.LVL1330:
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 2 2739 0
 	adrp	x1, .LANCHOR42
-	.loc 2 2738 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -16
-	.cfi_offset 20, -8
-	.loc 2 2738 0
 	and	w19, w0, 65535
-	.loc 2 2739 0
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ubfiz	x0, x19, 1, 16
-.LVL1331:
 	ldrh	w0, [x1, x0]
 	cbnz	w0, .L974
-	.loc 2 2740 0
 	adrp	x0, .LANCHOR80
 	ldrh	w1, [x0, #:lo12:.LANCHOR80]
 	cmp	w1, w19
 	bne	.L975
-	.loc 2 2742 0
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR80]
 .L976:
-.LVL1332:
-.LBB295:
-.LBB296:
-	.loc 2 2747 0
 	adrp	x20, .LANCHOR45
 	mov	w1, w19
 	adrp	x0, .LANCHOR41
 	add	x0, x0, :lo12:.LANCHOR41
 	bl	List_remove_node
-.LVL1333:
 	ldrh	w0, [x20, #:lo12:.LANCHOR45]
 	cbnz	w0, .L978
 	adrp	x1, .LANCHOR158
@@ -12879,20 +7240,14 @@ update_vpc_list:
 	add	x1, x1, :lo12:.LANCHOR158
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1334:
 .L978:
 	ldrh	w0, [x20, #:lo12:.LANCHOR45]
 	sub	w0, w0, #1
 	strh	w0, [x20, #:lo12:.LANCHOR45]
-	.loc 2 2748 0
 	mov	w0, w19
 	bl	free_data_superblock
-.LVL1335:
-	.loc 2 2749 0
 	mov	w0, w19
 	bl	FtlGcFreeBadSuperBlk
-.LVL1336:
-	.loc 2 2750 0
 	adrp	x0, .LANCHOR48
 	ldrh	w1, [x20, #:lo12:.LANCHOR45]
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
@@ -12907,160 +7262,95 @@ update_vpc_list:
 	add	x1, x1, :lo12:.LANCHOR158
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1337:
 .L982:
 	mov	w0, 1
 	b	.L973
-.LVL1338:
 .L975:
-.LBE296:
-.LBE295:
-	.loc 2 2743 0
 	adrp	x0, .LANCHOR51
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w19
 	beq	.L981
-	.loc 2 2743 0 is_stmt 0 discriminator 1
 	adrp	x0, .LANCHOR52
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
 	beq	.L981
-	.loc 2 2743 0 discriminator 2
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w19
 	bne	.L976
 .L981:
-	.loc 2 2745 0 is_stmt 1
 	mov	w0, 0
 .L973:
-	.loc 2 2756 0
 	ldp	x19, x20, [sp, 16]
-.LVL1339:
 	ldp	x29, x30, [sp], 32
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
 .L974:
-	.cfi_restore_state
-	.loc 2 2753 0
 	mov	w0, w19
 	bl	List_update_data_list
-.LVL1340:
 	b	.L981
-	.cfi_endproc
-.LFE301:
 	.size	update_vpc_list, .-update_vpc_list
 	.section	.text.decrement_vpc_count,"ax",@progbits
 	.align	2
 	.global	decrement_vpc_count
 	.type	decrement_vpc_count, %function
 decrement_vpc_count:
-.LFB302:
-	.loc 2 2759 0
-	.cfi_startproc
-.LVL1341:
 	stp	x29, x30, [sp, -48]!
-	.cfi_def_cfa_offset 48
-	.cfi_offset 29, -48
-	.cfi_offset 30, -40
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
 	and	w19, w0, 65535
 	str	x21, [sp, 32]
-	.cfi_offset 21, -16
-	.loc 2 2762 0
 	mov	w0, 65535
-.LVL1342:
 	cmp	w19, w0
 	beq	.L985
-	.loc 2 2763 0
 	adrp	x21, .LANCHOR42
 	ubfiz	x20, x19, 1, 16
 	ldr	x1, [x21, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x20]
 	cbnz	w0, .L986
-	.loc 2 2764 0
 	mov	w2, 0
 	mov	w1, w19
 	adrp	x0, .LC101
 	add	x0, x0, :lo12:.LC101
 	bl	printf
-.LVL1343:
-	.loc 2 2765 0
 	ldr	x0, [x21, #:lo12:.LANCHOR42]
 	ldrh	w0, [x0, x20]
 	cbz	w0, .L987
 .L992:
-.LVL1344:
-	.loc 2 2766 0 discriminator 1
 	mov	w20, 0
-.LVL1345:
 .L984:
-	.loc 2 2784 0
 	mov	w0, w20
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
-.LVL1346:
 	ldp	x29, x30, [sp], 48
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 21
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1347:
 .L987:
-	.cfi_restore_state
-	.loc 2 2765 0 discriminator 1
 	mov	w2, 2765
 	adrp	x1, .LANCHOR159
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR159
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1348:
 	b	.L992
 .L986:
-	.loc 2 2768 0
 	sub	w0, w0, #1
 	strh	w0, [x1, x20]
 .L985:
-	.loc 2 2772 0
 	adrp	x21, .LANCHOR150
 	mov	w1, 65535
 	ldrh	w0, [x21, #:lo12:.LANCHOR150]
 	cmp	w0, w1
 	bne	.L989
-	.loc 2 2773 0
 	strh	w19, [x21, #:lo12:.LANCHOR150]
 	b	.L992
 .L989:
-	.loc 2 2775 0
 	cmp	w19, w0
 	beq	.L992
-	.loc 2 2778 0
 	bl	update_vpc_list
-.LVL1349:
 	cmp	w0, 0
-	.loc 2 2781 0
 	adrp	x1, .LANCHOR40
 	adrp	x0, .LANCHOR41
-	.loc 2 2780 0
 	strh	w19, [x21, #:lo12:.LANCHOR150]
-	.loc 2 2778 0
 	cset	w20, ne
-.LVL1350:
-	.loc 2 2781 0
 	ldr	x1, [x1, #:lo12:.LANCHOR40]
 	ldr	x0, [x0, #:lo12:.LANCHOR41]
 	sub	x0, x0, x1
@@ -13073,435 +7363,219 @@ decrement_vpc_count:
 	and	x2, x0, 65535
 	ldrh	w1, [x1, x2, lsl 1]
 	cbnz	w1, .L984
-	.loc 2 2781 0 is_stmt 0 discriminator 1
 	cmp	w19, w0, uxth
 	beq	.L984
-	.loc 2 2781 0 discriminator 2
 	mov	w2, 2781
 	adrp	x1, .LANCHOR159
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR159
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1351:
 	b	.L984
-	.cfi_endproc
-.LFE302:
 	.size	decrement_vpc_count, .-decrement_vpc_count
 	.section	.text.FtlWriteDump_data,"ax",@progbits
 	.align	2
 	.global	FtlWriteDump_data
 	.type	FtlWriteDump_data, %function
 FtlWriteDump_data:
-.LFB268:
-	.loc 2 996 0 is_stmt 1
-	.cfi_startproc
 	stp	x29, x30, [sp, -128]!
-	.cfi_def_cfa_offset 128
-	.cfi_offset 29, -128
-	.cfi_offset 30, -120
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -112
-	.cfi_offset 20, -104
-	.loc 2 997 0
 	adrp	x19, .LANCHOR51
 	add	x0, x19, :lo12:.LANCHOR51
-	.loc 2 996 0
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	.loc 2 997 0
 	ldrh	w2, [x0, 4]
-	.loc 2 996 0
 	str	x25, [sp, 64]
-	.cfi_offset 21, -96
-	.cfi_offset 22, -88
-	.cfi_offset 23, -80
-	.cfi_offset 24, -72
-	.cfi_offset 25, -64
-	.loc 2 997 0
 	cbz	w2, .L994
-	.loc 2 997 0 is_stmt 0 discriminator 1
 	ldrb	w1, [x0, 8]
 	cbnz	w1, .L994
-	.loc 2 998 0 is_stmt 1
 	adrp	x3, .LANCHOR19
 	ldrb	w1, [x0, 7]
 	ldrh	w3, [x3, #:lo12:.LANCHOR19]
 	mul	w1, w1, w3
 	cmp	w2, w1
 	beq	.L994
-.LVL1352:
-.LBB300:
-.LBB301:
-	.loc 2 1005 0
 	ldrb	w0, [x0, 10]
 	cbnz	w0, .L993
-	.loc 2 1000 0
 	adrp	x0, .LANCHOR61
-	.loc 2 1007 0
 	mov	w2, 0
 	add	x1, x29, 92
-	.loc 2 1000 0
 	ldr	w21, [x0, #:lo12:.LANCHOR61]
-	.loc 2 1002 0
 	adrp	x0, .LANCHOR3
-	.loc 2 1000 0
 	sub	w21, w21, #1
-	.loc 2 1002 0
 	ldrh	w25, [x0, #:lo12:.LANCHOR3]
-	.loc 2 1007 0
 	mov	w0, w21
 	bl	log2phys
-.LVL1353:
-	.loc 2 1013 0
 	adrp	x2, .LANCHOR108
-	.loc 2 1012 0
 	adrp	x0, .LANCHOR107
-	.loc 2 1010 0
 	ldr	w1, [x29, 92]
-	.loc 2 1013 0
 	ldr	x20, [x2, #:lo12:.LANCHOR108]
-	.loc 2 1012 0
 	ldr	x0, [x0, #:lo12:.LANCHOR107]
-	.loc 2 1016 0
 	cmn	w1, #1
-	.loc 2 1010 0
 	str	w1, [x29, 100]
-	.loc 2 1013 0
 	stp	x0, x20, [x29, 104]
-.LVL1354:
-	.loc 2 1011 0
 	str	w21, [x29, 120]
-	.loc 2 1015 0
 	str	wzr, [x20, 4]
-	.loc 2 1016 0
 	beq	.L996
-	.loc 2 1018 0
 	mov	w2, 0
 	mov	w1, 1
 	add	x0, x29, 96
 	bl	FlashReadPages
-.LVL1355:
 .L997:
-	.loc 2 1036 0
 	adrp	x23, .LANCHOR71
-	.loc 2 1002 0
 	lsl	w25, w25, 2
-.LVL1356:
-	.loc 2 1027 0
 	add	x22, x19, :lo12:.LANCHOR51
-	.loc 2 1036 0
 	add	x23, x23, :lo12:.LANCHOR71
-	.loc 2 1024 0
 	mov	w0, -3947
 	mov	w24, 0
 	strh	w0, [x20]
 .L998:
-	.loc 2 1025 0
 	cmp	w25, w24
 	bne	.L1002
 .L999:
-	.loc 2 1041 0
 	add	x19, x19, :lo12:.LANCHOR51
 	mov	w0, 1
 	strb	w0, [x19, 10]
-.LVL1357:
 .L993:
-.LBE301:
-.LBE300:
-	.loc 2 1049 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 128
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 25
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1358:
 .L996:
-	.cfi_restore_state
-.LBB303:
-.LBB302:
-	.loc 2 1022 0
 	adrp	x1, .LANCHOR23
 	ldrh	w2, [x1, #:lo12:.LANCHOR23]
 	mov	w1, 255
 	bl	ftl_memset
-.LVL1359:
 	b	.L997
-.LVL1360:
 .L1002:
-	.loc 2 1027 0
 	ldrh	w0, [x22, 4]
 	cbz	w0, .L999
-	.loc 2 1032 0
 	ldr	w0, [x29, 100]
 	add	w24, w24, 1
 	stp	w21, w0, [x20, 8]
-	.loc 2 1033 0
 	ldrh	w0, [x22]
 	strh	w0, [x20, 2]
-	.loc 2 1035 0
 	mov	x0, x22
 	bl	get_new_active_ppa
-.LVL1361:
 	str	w0, [x29, 100]
-	.loc 2 1036 0
 	ldr	w0, [x23]
-	.loc 2 1037 0
 	mov	w3, 0
-	.loc 2 1036 0
 	str	w0, [x20, 4]
-	.loc 2 1037 0
 	mov	w2, 0
-	.loc 2 1036 0
 	add	w0, w0, 1
-	.loc 2 1037 0
 	mov	w1, 1
-	.loc 2 1036 0
 	cmn	w0, #1
 	csel	w0, w0, wzr, ne
 	str	w0, [x23]
-	.loc 2 1037 0
 	add	x0, x29, 96
 	bl	FlashProgPages
-.LVL1362:
-	.loc 2 1039 0
 	ldrh	w0, [x22]
 	bl	decrement_vpc_count
-.LVL1363:
 	b	.L998
-.LVL1364:
 .L994:
-.LBE302:
-.LBE303:
-	.loc 2 1047 0
 	add	x19, x19, :lo12:.LANCHOR51
 	strb	wzr, [x19, 10]
-	.loc 2 1049 0
 	b	.L993
-	.cfi_endproc
-.LFE268:
 	.size	FtlWriteDump_data, .-FtlWriteDump_data
 	.section	.text.l2p_flush,"ax",@progbits
 	.align	2
 	.global	l2p_flush
 	.type	l2p_flush, %function
 l2p_flush:
-.LFB261:
-	.loc 2 789 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -48]!
-	.cfi_def_cfa_offset 48
-	.cfi_offset 29, -48
-	.cfi_offset 30, -40
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
-	.loc 2 795 0
 	adrp	x20, .LANCHOR33
 	add	x20, x20, :lo12:.LANCHOR33
-	.loc 2 789 0
 	str	x21, [sp, 32]
-	.cfi_offset 21, -16
-	.loc 2 795 0
 	mov	w19, 0
-	.loc 2 796 0
 	adrp	x21, .LANCHOR55
-	.loc 2 793 0
 	bl	FtlWriteDump_data
-.LVL1365:
 .L1012:
-	.loc 2 795 0 discriminator 1
 	ldrh	w0, [x20]
 	cmp	w0, w19
 	bhi	.L1014
-	.loc 2 799 0
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
-.LVL1366:
 	ldp	x29, x30, [sp], 48
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 21
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1367:
 .L1014:
-	.cfi_restore_state
-	.loc 2 796 0
 	ldr	x1, [x21, #:lo12:.LANCHOR55]
 	ubfiz	x0, x19, 4, 16
 	add	x0, x1, x0
 	ldr	w0, [x0, 4]
 	tbz	w0, #31, .L1013
-	.loc 2 797 0
 	mov	w0, w19
 	bl	flush_l2p_region
-.LVL1368:
 .L1013:
-	.loc 2 795 0 discriminator 2
 	add	w19, w19, 1
-.LVL1369:
 	and	w19, w19, 65535
-.LVL1370:
 	b	.L1012
-	.cfi_endproc
-.LFE261:
 	.size	l2p_flush, .-l2p_flush
 	.section	.text.FtlRecoverySuperblock,"ax",@progbits
 	.align	2
 	.global	FtlRecoverySuperblock
 	.type	FtlRecoverySuperblock, %function
 FtlRecoverySuperblock:
-.LFB281:
-	.loc 2 1705 0
-	.cfi_startproc
-.LVL1371:
 	stp	x29, x30, [sp, -192]!
-	.cfi_def_cfa_offset 192
-	.cfi_offset 29, -192
-	.cfi_offset 30, -184
-	.loc 2 1719 0
 	mov	w1, 65535
-	.loc 2 1705 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -176
-	.cfi_offset 20, -168
 	mov	x19, x0
 	stp	x21, x22, [sp, 32]
-	.loc 2 1719 0
 	ldrh	w0, [x0]
-.LVL1372:
-	.loc 2 1705 0
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	.loc 2 1719 0
 	cmp	w0, w1
-	.loc 2 1705 0
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 21, -160
-	.cfi_offset 22, -152
-	.cfi_offset 23, -144
-	.cfi_offset 24, -136
-	.cfi_offset 25, -128
-	.cfi_offset 26, -120
-	.cfi_offset 27, -112
-	.cfi_offset 28, -104
-	.loc 2 1719 0
 	beq	.L1140
-	.loc 2 1725 0
 	ldrb	w0, [x19, 6]
 	str	w0, [x29, 164]
-	.loc 2 1730 0
 	adrp	x0, .LANCHOR19
-	.loc 2 1724 0
 	ldrh	w26, [x19, 2]
-.LVL1373:
 	str	x0, [x29, 128]
-	.loc 2 1730 0
 	ldrh	w2, [x0, #:lo12:.LANCHOR19]
 	cmp	w2, w26
 	bne	.L1019
-	.loc 2 1731 0
 	strh	wzr, [x19, 4]
-.LVL1374:
 .L1146:
-	.loc 2 1758 0
 	strb	wzr, [x19, 6]
-.LVL1375:
 .L1140:
-	.loc 2 2059 0
 	ldp	x19, x20, [sp, 16]
-.LVL1376:
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1377:
 .L1019:
-	.cfi_restore_state
-	.loc 2 1738 0
 	ldrh	w0, [x19, 16]
-.LVL1378:
-	.loc 2 1737 0
 	mov	w20, 0
-.LVL1379:
 .L1020:
-	.loc 2 1739 0
 	cmp	w0, w1
 	beq	.L1021
-	.loc 2 1746 0
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
-.LVL1380:
 	mov	w23, w0
-.LVL1381:
-	.loc 2 1754 0
 	cmn	w0, #1
 	beq	.L1022
-	.loc 2 1770 0
 	adrp	x1, .LANCHOR91
-	.loc 2 1766 0
 	adrp	x2, .LANCHOR3
-	.loc 2 1769 0
 	adrp	x20, .LANCHOR120
-.LVL1382:
-	.loc 2 1771 0
 	add	x4, x19, 16
-	.loc 2 1770 0
 	ldr	x5, [x1, #:lo12:.LANCHOR91]
 	adrp	x1, .LANCHOR23
-	.loc 2 1769 0
 	ldr	x0, [x20, #:lo12:.LANCHOR120]
-.LVL1383:
-	.loc 2 1771 0
 	mov	w22, 0
-	.loc 2 1770 0
 	ldrh	w6, [x1, #:lo12:.LANCHOR23]
-	.loc 2 1771 0
 	adrp	x1, .LANCHOR92
-	.loc 2 1768 0
 	mov	w10, 65535
 	str	x2, [x29, 152]
-	.loc 2 1771 0
 	ldr	x7, [x1, #:lo12:.LANCHOR92]
 	adrp	x1, .LANCHOR24
 	ldrh	w8, [x1, #:lo12:.LANCHOR24]
@@ -13511,67 +7585,39 @@ FtlRecoverySuperblock:
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
 .L1023:
-.LVL1384:
-	.loc 2 1766 0 discriminator 1
 	cmp	x4, x1
 	bne	.L1027
-	.loc 2 1776 0
 	mov	w2, 0
 	mov	w1, w22
 	bl	FlashReadPages
-.LVL1385:
-	.loc 2 1777 0
 	adrp	x0, .LANCHOR71
-	.loc 2 1779 0
 	ldr	x4, [x20, #:lo12:.LANCHOR120]
-	.loc 2 1791 0
 	and	w10, w23, 65535
-	.loc 2 1782 0
 	add	x7, x0, :lo12:.LANCHOR71
-	.loc 2 1777 0
 	ldr	w21, [x0, #:lo12:.LANCHOR71]
 	mov	x11, x4
-	.loc 2 1715 0
 	mov	w6, 65535
-	.loc 2 1778 0
 	mov	w3, 0
-	.loc 2 1777 0
 	sub	w21, w21, #1
-.LVL1386:
 	str	x0, [x29, 144]
-.LVL1387:
 .L1028:
-	.loc 2 1778 0 discriminator 1
 	cmp	w22, w3
 	bne	.L1033
-	.loc 2 1796 0
 	add	w22, w23, 1
-.LVL1388:
-	.loc 2 1798 0
 	ldr	w0, [x4, 4]
-	.loc 2 1796 0
 	and	w22, w22, 65535
-.LVL1389:
 .L1142:
-	.loc 2 1802 0
 	lsr	w0, w0, 10
 	bl	P2V_plane
-.LVL1390:
 	and	w27, w0, 65535
-.LVL1391:
-	.loc 2 1807 0
 	ldr	x0, [x29, 128]
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	cmp	w0, w22
 	bne	.L1035
-	.loc 2 1808 0
 	strh	w22, [x19, 2]
-	.loc 2 1809 0
 	strb	wzr, [x19, 6]
-	.loc 2 1810 0
 	strh	wzr, [x19, 4]
 .L1035:
-	.loc 2 1813 0
 	ldr	w0, [x29, 164]
 	cmp	w22, w26
 	cset	w1, eq
@@ -13579,578 +7625,350 @@ FtlRecoverySuperblock:
 	cset	w0, eq
 	tst	w1, w0
 	beq	.L1036
-.LVL1392:
 .L1147:
-	.loc 2 2053 0
 	mov	w2, w27
 	mov	w1, w22
 	mov	x0, x19
 	bl	ftl_sb_update_avl_pages
-.LVL1393:
 	b	.L1140
-.LVL1394:
 .L1021:
-	.loc 2 1740 0
 	add	w20, w20, 1
-.LVL1395:
 	and	w20, w20, 65535
-.LVL1396:
-	.loc 2 1741 0
 	add	x0, x19, x20, sxtw 1
-.LVL1397:
 	ldrh	w0, [x0, 16]
-.LVL1398:
 	b	.L1020
-.LVL1399:
 .L1022:
-	.loc 2 1755 0
 	cbz	w26, .L1024
-	.loc 2 1755 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR160
 	adrp	x0, .LC1
-.LVL1400:
 	mov	w2, 1755
 	add	x1, x1, :lo12:.LANCHOR160
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1401:
 .L1024:
-	.loc 2 1756 0 is_stmt 1
 	ldr	w0, [x29, 164]
 	cmp	w0, 0
 	ccmp	w20, w0, 4, ne
 	beq	.L1025
-	.loc 2 1756 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR160
 	adrp	x0, .LC1
 	mov	w2, 1756
 	add	x1, x1, :lo12:.LANCHOR160
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1402:
 .L1025:
-	.loc 2 1757 0 is_stmt 1
 	strh	wzr, [x19, 2]
 	b	.L1146
-.LVL1403:
 .L1027:
-	.loc 2 1767 0
 	ldrh	w3, [x4]
-.LVL1404:
-	.loc 2 1768 0
 	cmp	w3, w10
 	beq	.L1026
-	.loc 2 1769 0
 	ubfiz	x2, x22, 5, 16
 	orr	w3, w23, w3, lsl 10
-.LVL1405:
 	add	x2, x0, x2
 	str	w3, [x2, 4]
-	.loc 2 1770 0
 	mul	w3, w22, w6
 	asr	w3, w3, 2
 	add	x3, x5, x3, sxtw 2
 	str	x3, [x2, 8]
-	.loc 2 1771 0
 	mul	w3, w22, w8
-	.loc 2 1772 0
 	add	w22, w22, 1
-.LVL1406:
 	and	w22, w22, 65535
-.LVL1407:
-	.loc 2 1771 0
 	asr	w3, w3, 2
 	add	x3, x7, x3, sxtw 2
 	str	x3, [x2, 16]
 .L1026:
 	add	x4, x4, 2
-.LVL1408:
 	b	.L1023
-.LVL1409:
 .L1033:
-	.loc 2 1779 0
 	ldr	w0, [x11]
 	cbnz	w0, .L1029
-	.loc 2 1780 0
 	ldr	x8, [x11, 16]
-.LVL1410:
-	.loc 2 1781 0
 	ldr	w5, [x8, 4]
 	cmn	w5, #1
 	beq	.L1030
-	.loc 2 1782 0
 	ldr	w1, [x7]
 	mov	w0, w5
 	bl	ftl_cmp_data_ver
-.LVL1411:
 	cbz	w0, .L1030
-	.loc 2 1784 0
 	add	w5, w5, 1
 	str	w5, [x7]
 .L1030:
-	.loc 2 1787 0
 	ldr	w0, [x8]
 	cmn	w0, #1
 	bne	.L1032
-	.loc 2 1802 0
 	ubfiz	x3, x3, 5, 16
-.LVL1412:
-	.loc 2 1801 0
 	and	w22, w23, 65535
-.LVL1413:
-	.loc 2 1802 0
 	add	x3, x4, x3
 	ldr	w0, [x3, 4]
 	b	.L1142
-.LVL1414:
 .L1029:
-	.loc 2 1791 0
 	mov	w6, w10
-.LVL1415:
 .L1032:
-	.loc 2 1778 0 discriminator 2
 	add	w3, w3, 1
-.LVL1416:
 	add	x11, x11, 32
 	and	w3, w3, 65535
-.LVL1417:
 	b	.L1028
-.LVL1418:
 .L1036:
-	.loc 2 1819 0
 	mov	w0, 65535
 	cmp	w6, w0
 	bne	.L1037
-	.loc 2 1819 0 is_stmt 0 discriminator 1
 	ldrb	w0, [x19, 8]
 	cbnz	w0, .L1038
 .L1037:
-.LVL1419:
-.LBB304:
-	.loc 2 1824 0 is_stmt 1
 	adrp	x25, .LANCHOR153
-	.loc 2 1823 0
 	and	w28, w23, 65535
-.LVL1420:
-	.loc 2 1824 0
 	ldr	w0, [x25, #:lo12:.LANCHOR153]
 	cmn	w0, #1
 	bne	.L1039
-	.loc 2 1825 0
 	str	w21, [x25, #:lo12:.LANCHOR153]
 .L1039:
-.LVL1421:
-	.loc 2 1827 0
 	add	w0, w26, 7
 	cmp	w0, w23, uxth
 	bge	.L1089
-	.loc 2 1828 0
 	sub	w24, w28, #7
 	and	w24, w24, 65535
-.LVL1422:
 .L1040:
-	.loc 2 1831 0 discriminator 1
 	ldr	x0, [x29, 152]
-	.loc 2 1833 0 discriminator 1
 	mov	w3, 65535
 	mov	w5, 1
-	.loc 2 1831 0 discriminator 1
 	add	x4, x0, :lo12:.LANCHOR3
-.LVL1423:
 .L1041:
-	.loc 2 1829 0 discriminator 1
 	cmp	w24, w28
 	bhi	.L1051
 	ldrh	w1, [x4]
-	.loc 2 1834 0
 	mov	w23, 0
 	ldr	x0, [x20, #:lo12:.LANCHOR120]
 	add	x1, x1, 8
 	ldr	x2, [x29, 168]
 	add	x1, x19, x1, lsl 1
 	b	.L1052
-.LVL1424:
 .L1089:
 	mov	w24, w26
 	b	.L1040
-.LVL1425:
 .L1043:
-	.loc 2 1832 0
 	ldrh	w6, [x2]
-.LVL1426:
-	.loc 2 1833 0
 	cmp	w6, w3
 	beq	.L1042
-	.loc 2 1834 0
 	ubfiz	x7, x23, 5, 16
-	.loc 2 1835 0
 	add	w23, w23, 1
-.LVL1427:
-	.loc 2 1834 0
 	add	x7, x0, x7
-	.loc 2 1835 0
 	and	w23, w23, 65535
-.LVL1428:
-	.loc 2 1834 0
 	orr	w6, w24, w6, lsl 10
-.LVL1429:
 	str	w6, [x7, 4]
 .L1042:
 	add	x2, x2, 2
-.LVL1430:
 .L1052:
-	.loc 2 1831 0 discriminator 1
 	cmp	x2, x1
 	bne	.L1043
-	.loc 2 1838 0
 	mov	w1, w23
 	mov	w2, 0
 	str	w5, [x29, 112]
 	ubfiz	x23, x23, 5, 16
-.LVL1431:
 	str	w3, [x29, 120]
 	add	x23, x23, 16
 	str	x4, [x29, 136]
 	bl	FlashReadPages
-.LVL1432:
-	.loc 2 1840 0
 	ldr	x2, [x20, #:lo12:.LANCHOR120]
 	ldr	w1, [x25, #:lo12:.LANCHOR153]
-	.loc 2 1839 0
 	ldr	w5, [x29, 112]
 	add	x0, x2, 16
 	ldr	w3, [x29, 120]
 	add	x23, x2, x23
 	ldr	x4, [x29, 136]
 	mov	w2, 0
-.LVL1433:
 .L1044:
-	.loc 2 1839 0 is_stmt 0 discriminator 1
 	cmp	x23, x0
 	bne	.L1049
 	cbz	w2, .L1050
 	str	w1, [x25, #:lo12:.LANCHOR153]
 .L1050:
-	.loc 2 1829 0 is_stmt 1
 	add	w24, w24, 1
-.LVL1434:
 	and	w24, w24, 65535
-.LVL1435:
 	b	.L1041
 .L1049:
-	.loc 2 1840 0
 	ldr	w6, [x0, -16]
 	cbz	w6, .L1045
 	cbz	w2, .L1038
 	str	w1, [x25, #:lo12:.LANCHOR153]
-.LVL1436:
 .L1038:
-.LBE304:
-	.loc 2 1863 0
 	mov	w1, 1
 	adrp	x0, .LANCHOR161
-	.loc 2 1864 0
 	mov	w23, w26
-	.loc 2 2024 0
 	adrp	x28, .LANCHOR153
-	.loc 2 1863 0
 	strh	w1, [x0, #:lo12:.LANCHOR161]
-	.loc 2 1864 0
 	adrp	x0, .LANCHOR144
 	add	x0, x0, :lo12:.LANCHOR144
 	bl	FtlMapBlkWriteDump_data
-.LVL1437:
-.LBB305:
-	.loc 2 1946 0
 	add	x0, x28, :lo12:.LANCHOR153
 	str	x0, [x29, 104]
-.LVL1438:
 .L1053:
 	ldr	x1, [x29, 152]
-.LBE305:
-	.loc 2 1869 0
 	mov	w24, 0
-	.loc 2 1873 0
 	ldr	x0, [x20, #:lo12:.LANCHOR120]
-	.loc 2 1872 0
 	mov	w5, 65535
-	.loc 2 1870 0
 	ldr	x2, [x29, 168]
 	ldrh	w1, [x1, #:lo12:.LANCHOR3]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.LVL1439:
 .L1054:
-	.loc 2 1870 0 is_stmt 0 discriminator 1
 	cmp	x1, x2
 	bne	.L1056
-	.loc 2 1877 0 is_stmt 1
 	mov	w2, 0
 	mov	w1, w24
 	bl	FlashReadPages
-.LVL1440:
-	.loc 2 1878 0
 	mov	x25, 0
 	ubfiz	x0, x24, 5, 16
 	str	x0, [x29, 112]
-	.loc 2 2018 0
 	adrp	x0, .LANCHOR162
 	add	x0, x0, :lo12:.LANCHOR162
 	str	x0, [x29, 120]
-.LVL1441:
 .L1057:
-	.loc 2 1878 0 discriminator 1
 	ldr	x0, [x29, 112]
 	cmp	x25, x0
 	bne	.L1083
-	.loc 2 2032 0
 	ldr	x0, [x29, 128]
-	.loc 2 2031 0
 	add	w23, w23, 1
-.LVL1442:
 	and	w23, w23, 65535
-.LVL1443:
-	.loc 2 2032 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	cmp	w0, w23
 	bne	.L1053
-	.loc 2 2035 0
 	ldr	x0, [x29, 152]
-	.loc 2 2037 0
 	mov	w2, 65535
-	.loc 2 2033 0
 	strh	w23, [x19, 2]
-	.loc 2 2034 0
 	strh	wzr, [x19, 4]
-.LVL1444:
-	.loc 2 2035 0
 	ldrh	w1, [x0, #:lo12:.LANCHOR3]
 	mov	w0, 0
-.LVL1445:
 .L1084:
-	.loc 2 2035 0 is_stmt 0 discriminator 1
 	cmp	w0, w1
 	beq	.L1140
-.LVL1446:
-	.loc 2 2037 0 is_stmt 1
 	ldr	x4, [x29, 168]
 	ldrh	w3, [x4], 2
 	str	x4, [x29, 168]
-.LVL1447:
 	cmp	w3, w2
 	beq	.L1085
-	.loc 2 2038 0
 	strb	w0, [x19, 6]
-.LVL1448:
-	.loc 2 2039 0
 	b	.L1140
-.LVL1449:
 .L1045:
-.LBB306:
-	.loc 2 1841 0
 	ldr	x6, [x0]
-.LVL1450:
-	.loc 2 1842 0
 	ldrh	w7, [x6]
 	cmp	w7, w3
 	beq	.L1048
-	.loc 2 1844 0
 	ldr	w6, [x6, 4]
-.LVL1451:
 	cmn	w6, #1
 	csel	w1, w1, w6, eq
 	csel	w2, w2, w5, eq
 .L1048:
 	add	x0, x0, 32
-.LVL1452:
 	b	.L1044
-.LVL1453:
 .L1051:
-	.loc 2 1858 0
 	mov	w0, -1
 	str	w0, [x25, #:lo12:.LANCHOR153]
 	b	.L1038
-.LVL1454:
 .L1056:
-.LBE306:
-	.loc 2 1871 0
 	ldrh	w3, [x2]
-.LVL1455:
-	.loc 2 1872 0
 	cmp	w3, w5
 	beq	.L1055
-	.loc 2 1873 0
 	ubfiz	x4, x24, 5, 16
-	.loc 2 1874 0
 	add	w24, w24, 1
-.LVL1456:
-	.loc 2 1873 0
 	add	x4, x0, x4
-	.loc 2 1874 0
 	and	w24, w24, 65535
-.LVL1457:
-	.loc 2 1873 0
 	orr	w3, w23, w3, lsl 10
-.LVL1458:
 	str	w3, [x4, 4]
 .L1055:
 	add	x2, x2, 2
-.LVL1459:
 	b	.L1054
-.LVL1460:
 .L1083:
-	.loc 2 1879 0
 	ldr	x4, [x20, #:lo12:.LANCHOR120]
 	add	x4, x4, x25
 	ldr	w5, [x4, 4]
 	str	w5, [x29, 188]
-	.loc 2 1880 0
 	lsr	w0, w5, 10
 	bl	P2V_plane
-.LVL1461:
 	and	w0, w0, 65535
-.LVL1462:
-	.loc 2 1882 0
 	cmp	w23, w26
 	bcc	.L1058
-	.loc 2 1882 0 is_stmt 0 discriminator 1
 	ldr	w1, [x29, 164]
 	ccmp	w1, w0, 0, eq
 	bhi	.L1058
-	.loc 2 1886 0 is_stmt 1
 	cmp	w23, w22
 	ccmp	w27, w0, 0, eq
 	beq	.L1059
-.LVL1463:
-	.loc 2 1890 0
 	ldr	w0, [x4]
-.LVL1464:
 	cmn	w0, #1
 	beq	.L1060
-	.loc 2 1891 0
 	ldr	x3, [x4, 16]
-.LVL1465:
-	.loc 2 1892 0
 	mov	w0, 61589
 	ldrh	w1, [x3]
 	cmp	w1, w0
 	beq	.L1061
-.LVL1466:
 .L1067:
-.LBB307:
-	.loc 2 1925 0
 	ldrh	w0, [x19]
-.LVL1467:
 .L1145:
-.LBE307:
-	.loc 2 2009 0
 	bl	decrement_vpc_count
-.LVL1468:
 .L1058:
 	add	x25, x25, 32
 	b	.L1057
-.LVL1469:
 .L1061:
-	.loc 2 1898 0
 	ldr	w21, [x3, 4]
-.LVL1470:
-	.loc 2 1899 0
 	cmn	w21, #1
 	beq	.L1062
-	.loc 2 1900 0 discriminator 1
 	ldr	x0, [x29, 144]
 	ldr	w1, [x0, #:lo12:.LANCHOR71]
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-.LVL1471:
-	.loc 2 1899 0 discriminator 1
 	cbz	w0, .L1062
-	.loc 2 1902 0
 	ldr	x1, [x29, 144]
 	add	w0, w21, 1
 	str	w0, [x1, #:lo12:.LANCHOR71]
 .L1062:
-	.loc 2 1907 0
 	ldp	w24, w0, [x3, 8]
-	.loc 2 1908 0
 	add	x1, x29, 184
-	.loc 2 1907 0
 	str	w0, [x29, 180]
-	.loc 2 1908 0
 	mov	w2, 0
 	mov	w0, w24
 	bl	log2phys
-.LVL1472:
-	.loc 2 1909 0
 	ldr	w1, [x28, #:lo12:.LANCHOR153]
 	cmn	w1, #1
 	beq	.L1063
-	.loc 2 1910 0 discriminator 1
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-.LVL1473:
-	.loc 2 1909 0 discriminator 1
 	cbz	w0, .L1063
-.LBB308:
-	.loc 2 1914 0
 	ldr	w1, [x29, 180]
 	cmn	w1, #1
 	beq	.L1064
-	.loc 2 1915 0
 	ldr	x0, [x20, #:lo12:.LANCHOR120]
-	.loc 2 1917 0
 	mov	w2, 0
-	.loc 2 1915 0
 	add	x0, x0, x25
 	ldr	x3, [x0, 16]
-	.loc 2 1916 0
 	str	w1, [x0, 4]
-	.loc 2 1917 0
 	mov	w1, 1
-	.loc 2 1915 0
 	str	x3, [x29, 136]
-.LVL1474:
-	.loc 2 1917 0
 	bl	FlashReadPages
-.LVL1475:
-	.loc 2 1930 0
 	ldr	x0, [x20, #:lo12:.LANCHOR120]
 	ldr	x3, [x29, 136]
 	add	x4, x0, x25
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
 	bne	.L1065
-.LVL1476:
 .L1066:
-	.loc 2 1962 0
 	mov	w0, -1
 	str	w0, [x29, 180]
-	.loc 2 1963 0
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-.LVL1477:
 .L1074:
-.LBE308:
-	.loc 2 2003 0
 	ldr	w3, [x29, 180]
 	cmn	w3, #1
 	beq	.L1058
 .L1088:
-	.loc 2 2005 0
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
-.LVL1478:
 	and	w24, w0, 65535
-	.loc 2 2006 0
 	adrp	x0, .LANCHOR5
-	.loc 2 2005 0
 	mov	w3, w24
-.LVL1479:
-	.loc 2 2006 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR5]
 	cmp	w0, w24
 	bhi	.L1079
-	.loc 2 2006 0 is_stmt 0 discriminator 1
 	mov	w2, 2006
 	adrp	x1, .LANCHOR160
 	adrp	x0, .LC1
@@ -14158,345 +7976,207 @@ FtlRecoverySuperblock:
 	add	x0, x0, :lo12:.LC1
 	str	w24, [x29, 136]
 	bl	printf
-.LVL1480:
 	ldr	w3, [x29, 136]
-.LVL1481:
 .L1079:
-	.loc 2 2007 0 is_stmt 1
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x24, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x0]
 	cbz	w0, .L1080
-	.loc 2 2009 0
 	mov	w0, w3
 	b	.L1145
-.LVL1482:
 .L1064:
-.LBB309:
-	.loc 2 1921 0
 	ldp	w1, w0, [x29, 184]
 	cmp	w1, w0
 	bne	.L1067
-	.loc 2 1922 0
 	mov	w2, 1
 	add	x1, x29, 180
 	mov	w0, w24
 	bl	log2phys
-.LVL1483:
 	b	.L1067
-.LVL1484:
 .L1065:
-	.loc 2 1930 0 discriminator 1
 	ldr	w0, [x3, 8]
 	cmp	w24, w0
 	bne	.L1066
-	.loc 2 1918 0 discriminator 2
 	ldr	w0, [x3, 4]
 	str	w0, [x29, 136]
-.LVL1485:
 	str	x3, [x29, 96]
-	.loc 2 1931 0 discriminator 2
 	uxtw	x1, w0
 	ldr	w0, [x28, #:lo12:.LANCHOR153]
 	bl	ftl_cmp_data_ver
-.LVL1486:
-	.loc 2 1930 0 discriminator 2
 	cbz	w0, .L1066
-	.loc 2 1932 0
 	ldp	w0, w1, [x29, 184]
 	ldr	x3, [x29, 96]
 	cmp	w0, w1
-	.loc 2 1934 0
 	ldr	w1, [x29, 180]
-	.loc 2 1932 0
 	bne	.L1069
 .L1143:
-	.loc 2 1958 0
 	mov	w0, w24
 	bl	FtlReUsePrevPpa
-.LVL1487:
 	b	.L1066
 .L1069:
-	.loc 2 1935 0
 	cmp	w0, w1
 	beq	.L1066
-	.loc 2 1936 0
 	cmn	w0, #1
 	beq	.L1070
-.LVL1488:
-	.loc 2 1937 0
 	ldr	x3, [x4, 16]
-	.loc 2 1939 0
 	mov	w2, 0
-	.loc 2 1938 0
 	str	w0, [x4, 4]
-	.loc 2 1939 0
 	mov	w1, 1
-	.loc 2 1937 0
 	str	x3, [x29, 96]
-	.loc 2 1939 0
 	mov	x0, x4
 	bl	FlashReadPages
-.LVL1489:
 	ldr	x3, [x29, 96]
-.LVL1490:
 .L1071:
-	.loc 2 1944 0
 	ldr	x0, [x20, #:lo12:.LANCHOR120]
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
 	beq	.L1072
-	.loc 2 1946 0
 	ldr	x0, [x29, 104]
-	.loc 2 1945 0
 	ldr	w3, [x3, 4]
-.LVL1491:
-	.loc 2 1946 0
 	mov	w1, w3
 	ldr	w0, [x0]
 	bl	ftl_cmp_data_ver
-.LVL1492:
 	cbz	w0, .L1072
-	.loc 2 1947 0
 	ldr	w0, [x29, 136]
 	mov	w1, w3
 	bl	ftl_cmp_data_ver
-.LVL1493:
 	cbz	w0, .L1066
-.LVL1494:
 .L1072:
-	.loc 2 1958 0
 	ldr	w1, [x29, 180]
 	b	.L1143
 .L1070:
-	.loc 2 1941 0
 	str	w0, [x4]
 	b	.L1071
 .L1063:
-.LBE309:
-	.loc 2 1964 0
 	ldp	w1, w0, [x29, 184]
 	cmp	w1, w0
 	beq	.L1074
-	.loc 2 1966 0
 	mov	w2, 1
 	add	x1, x29, 188
 	mov	w0, w24
 	bl	log2phys
-.LVL1495:
-	.loc 2 1967 0
 	ldr	w3, [x29, 184]
 	cmn	w3, #1
 	beq	.L1074
-	.loc 2 1967 0 is_stmt 0 discriminator 1
 	ldr	w0, [x29, 180]
 	cmp	w3, w0
 	beq	.L1088
-	.loc 2 1968 0 is_stmt 1
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
-.LVL1496:
-	.loc 2 1970 0
 	adrp	x1, .LANCHOR51
-	.loc 2 1968 0
 	and	w0, w0, 65535
-.LVL1497:
-	.loc 2 1970 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR51]
 	cmp	w1, w0
 	beq	.L1078
-	.loc 2 1971 0 discriminator 1
 	adrp	x1, .LANCHOR52
-	.loc 2 1970 0 discriminator 1
 	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	cmp	w1, w0
 	beq	.L1078
-	.loc 2 1972 0
 	adrp	x1, .LANCHOR53
-	.loc 2 1971 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	cmp	w1, w0
 	bne	.L1074
 .L1078:
-.LVL1498:
-.LBB310:
-	.loc 2 1976 0
 	ldr	x0, [x20, #:lo12:.LANCHOR120]
-.LVL1499:
-	.loc 2 1979 0
 	mov	w2, 0
 	mov	w1, 1
-	.loc 2 1976 0
 	ldr	x4, [x0, 16]
-	.loc 2 1978 0
 	str	w3, [x0, 4]
-	.loc 2 1976 0
 	str	x4, [x29, 136]
-.LVL1500:
-	.loc 2 1979 0
 	bl	FlashReadPages
-.LVL1501:
-	.loc 2 1982 0
 	ldr	x0, [x20, #:lo12:.LANCHOR120]
 	ldr	w0, [x0]
 	cmn	w0, #1
 	beq	.L1074
-	.loc 2 1983 0
 	ldr	x4, [x29, 136]
 	mov	w0, w21
 	ldr	w1, [x4, 4]
 	bl	ftl_cmp_data_ver
-.LVL1502:
 	cbnz	w0, .L1074
-	.loc 2 1990 0
 	mov	w2, 1
 	add	x1, x29, 184
 	mov	w0, w24
 	bl	log2phys
-.LVL1503:
 	b	.L1074
-.LVL1504:
 .L1080:
-.LBE310:
-	.loc 2 2011 0
 	mov	w1, w24
 	adrp	x0, .LC102
 	add	x0, x0, :lo12:.LC102
 	bl	printf
-.LVL1505:
 	b	.L1058
-.LVL1506:
 .L1060:
-	.loc 2 2018 0
 	ldr	x0, [x29, 120]
 	ldr	w0, [x0]
 	cmp	w0, 31
 	bhi	.L1081
-	.loc 2 2019 0
 	adrp	x1, .LANCHOR163
 	add	x1, x1, :lo12:.LANCHOR163
 	str	w5, [x1, w0, uxtw 2]
-	.loc 2 2020 0
 	add	w0, w0, 1
 	ldr	x1, [x29, 120]
 	str	w0, [x1]
 .L1081:
-	.loc 2 2022 0
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-.LVL1507:
-	.loc 2 2024 0
 	ldr	w0, [x28, #:lo12:.LANCHOR153]
 	cmn	w0, #1
 	bne	.L1082
 .L1144:
-	.loc 2 2027 0
 	str	w21, [x28, #:lo12:.LANCHOR153]
 	b	.L1058
 .L1082:
-	.loc 2 2026 0
 	cmp	w21, w0
 	bcs	.L1058
 	b	.L1144
-.LVL1508:
 .L1085:
-	.loc 2 2035 0 discriminator 2
 	add	w0, w0, 1
-.LVL1509:
 	and	w0, w0, 65535
-.LVL1510:
 	b	.L1084
-.LVL1511:
 .L1059:
-	.loc 2 2051 0
 	strb	w27, [x19, 6]
-	.loc 2 2052 0
 	strh	w22, [x19, 2]
 	b	.L1147
-	.cfi_endproc
-.LFE281:
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
 	.section	.text.FtlSuperblockPowerLostFix,"ax",@progbits
 	.align	2
 	.global	FtlSuperblockPowerLostFix
 	.type	FtlSuperblockPowerLostFix, %function
 FtlSuperblockPowerLostFix:
-.LFB288:
-	.loc 2 2205 0
-	.cfi_startproc
-.LVL1512:
 	stp	x29, x30, [sp, -80]!
-	.cfi_def_cfa_offset 80
-	.cfi_offset 29, -80
-	.cfi_offset 30, -72
-	.loc 2 2213 0
 	adrp	x1, .LANCHOR108
-	.loc 2 2205 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -64
-	.cfi_offset 20, -56
 	mov	x19, x0
-	.loc 2 2211 0
 	mov	w0, -1
-.LVL1513:
-	.loc 2 2213 0
 	ldr	x20, [x1, #:lo12:.LANCHOR108]
-	.loc 2 2211 0
 	str	w0, [x29, 72]
-	.loc 2 2212 0
 	adrp	x0, .LANCHOR107
-	.loc 2 2205 0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -48
-	.cfi_offset 22, -40
-	.loc 2 2216 0
 	mov	w1, -3
-	.loc 2 2212 0
 	ldr	x0, [x0, #:lo12:.LANCHOR107]
-	.loc 2 2229 0
 	adrp	x21, .LANCHOR71
-	.loc 2 2213 0
 	str	x20, [x29, 64]
-.LVL1514:
-	.loc 2 2229 0
 	add	x21, x21, :lo12:.LANCHOR71
-	.loc 2 2212 0
 	str	x0, [x29, 56]
-	.loc 2 2223 0
 	mov	w22, 7
-	.loc 2 2216 0
 	str	w1, [x20, 8]
-	.loc 2 2217 0
 	mov	w1, -2
 	str	w1, [x20, 12]
-	.loc 2 2218 0
 	ldrh	w1, [x19]
 	strh	w1, [x20, 2]
-	.loc 2 2219 0
 	strh	wzr, [x20]
-	.loc 2 2220 0
 	mov	w1, 61589
 	str	w1, [x0]
-	.loc 2 2221 0
 	mov	w1, 22136
 	movk	w1, 0x1234, lsl 16
 	str	w1, [x0, 4]
-.LVL1515:
 .L1149:
-	.loc 2 2223 0
 	subs	w22, w22, #1
-.LVL1516:
 	beq	.L1151
-.LVL1517:
-	.loc 2 2224 0
 	ldrh	w0, [x19, 4]
 	cbnz	w0, .L1150
-.LVL1518:
 .L1151:
-	.loc 2 2234 0
 	ldrh	w0, [x19]
 	adrp	x1, .LANCHOR42
 	ldrh	w3, [x19, 4]
@@ -14505,741 +8185,426 @@ FtlSuperblockPowerLostFix:
 	ldrh	w1, [x2, x0]
 	sub	w1, w1, w3
 	strh	w1, [x2, x0]
-	.loc 2 2235 0
 	adrp	x0, .LANCHOR19
-	.loc 2 2236 0
 	strb	wzr, [x19, 6]
-	.loc 2 2237 0
 	strh	wzr, [x19, 4]
-	.loc 2 2235 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	strh	w0, [x19, 2]
-	.loc 2 2238 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x19, x20, [sp, 16]
-.LVL1519:
 	ldp	x29, x30, [sp], 80
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1520:
 .L1150:
-	.cfi_restore_state
-	.loc 2 2226 0
 	mov	x0, x19
 	bl	get_new_active_ppa
-.LVL1521:
 	str	w0, [x29, 52]
-	.loc 2 2227 0
 	cmn	w0, #1
 	beq	.L1151
-	.loc 2 2229 0
 	ldr	w0, [x21]
-	.loc 2 2230 0
 	mov	w3, 0
-	.loc 2 2229 0
 	str	w0, [x20, 4]
-	.loc 2 2230 0
 	mov	w2, 0
-	.loc 2 2229 0
 	add	w0, w0, 1
-	.loc 2 2230 0
 	mov	w1, 1
-	.loc 2 2229 0
 	cmn	w0, #1
 	csel	w0, w0, wzr, ne
 	str	w0, [x21]
-	.loc 2 2230 0
 	add	x0, x29, 48
 	bl	FlashProgPages
-.LVL1522:
-	.loc 2 2231 0
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-.LVL1523:
 	b	.L1149
-	.cfi_endproc
-.LFE288:
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
 	.section	.text.FtlLoadBbt,"ax",@progbits
 	.align	2
 	.global	FtlLoadBbt
 	.type	FtlLoadBbt, %function
 FtlLoadBbt:
-.LFB229:
-	.loc 4 173 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -80]!
-	.cfi_def_cfa_offset 80
-	.cfi_offset 29, -80
-	.cfi_offset 30, -72
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -32
-	.cfi_offset 24, -24
-	.loc 4 180 0
 	adrp	x23, .LANCHOR107
-	.loc 4 173 0
 	stp	x19, x20, [sp, 16]
-	.loc 4 184 0
 	adrp	x24, .LANCHOR17
-	.loc 4 173 0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 19, -64
-	.cfi_offset 20, -56
-	.cfi_offset 21, -48
-	.cfi_offset 22, -40
-	.loc 4 180 0
 	adrp	x22, .LANCHOR106
 	add	x20, x22, :lo12:.LANCHOR106
 	ldr	x0, [x23, #:lo12:.LANCHOR107]
-	.loc 4 173 0
 	str	x25, [sp, 64]
-	.cfi_offset 25, -16
-	.loc 4 196 0
 	mov	w25, 61649
-	.loc 4 180 0
 	str	x0, [x20, 8]
-	.loc 4 181 0
 	adrp	x0, .LANCHOR108
 	ldr	x21, [x0, #:lo12:.LANCHOR108]
 	str	x21, [x20, 16]
-.LVL1524:
-	.loc 4 183 0
 	bl	FtlBbtMemInit
-.LVL1525:
-	.loc 4 184 0
 	ldrh	w19, [x24, #:lo12:.LANCHOR17]
 	add	x24, x24, :lo12:.LANCHOR17
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.LVL1526:
 .L1161:
-	.loc 4 184 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x24]
 	sub	w0, w0, #15
 	cmp	w0, w19
 	bgt	.L1164
-	.loc 4 185 0 is_stmt 1
 	lsl	w0, w19, 10
-	.loc 4 186 0
 	mov	w2, 1
-	.loc 4 185 0
 	str	w0, [x20, 4]
-	.loc 4 186 0
 	mov	w1, w2
 	mov	x0, x20
 	bl	FlashReadPages
-.LVL1527:
-	.loc 4 187 0
 	ldr	w0, [x20]
 	cmn	w0, #1
 	bne	.L1162
-	.loc 4 188 0
 	ldr	w0, [x20, 4]
-	.loc 4 189 0
 	mov	w2, 1
 	mov	w1, w2
-	.loc 4 188 0
 	add	w0, w0, 1
 	str	w0, [x20, 4]
-	.loc 4 189 0
 	mov	x0, x20
 	bl	FlashReadPages
-.LVL1528:
 .L1162:
-	.loc 4 191 0
 	ldr	w0, [x20]
 	cmn	w0, #1
 	beq	.L1163
-	.loc 4 196 0
 	ldrh	w0, [x21]
 	cmp	w0, w25
 	bne	.L1163
-	.loc 4 198 0
 	adrp	x1, .LANCHOR37
 	add	x0, x1, :lo12:.LANCHOR37
 	strh	w19, [x1, #:lo12:.LANCHOR37]
-	.loc 4 199 0
 	ldr	w1, [x21, 4]
 	str	w1, [x0, 8]
-	.loc 4 200 0
 	ldrh	w1, [x21, 8]
 	strh	w1, [x0, 4]
 .L1164:
-	.loc 4 216 0
 	adrp	x19, .LANCHOR37
-.LVL1529:
 	mov	w0, 65535
 	add	x20, x19, :lo12:.LANCHOR37
 	ldrh	w1, [x19, #:lo12:.LANCHOR37]
 	cmp	w1, w0
 	beq	.L1178
-	.loc 4 222 0
 	ldrh	w1, [x20, 4]
 	cmp	w1, w0
 	beq	.L1168
-	.loc 4 224 0
 	add	x0, x22, :lo12:.LANCHOR106
 	lsl	w1, w1, 10
-	.loc 4 225 0
 	mov	w2, 1
-	.loc 4 224 0
 	str	w1, [x0, 4]
-	.loc 4 225 0
 	mov	w1, w2
 	bl	FlashReadPages
-.LVL1530:
-	.loc 4 226 0
 	ldr	w0, [x22, #:lo12:.LANCHOR106]
 	cmn	w0, #1
 	beq	.L1168
-	.loc 4 229 0
 	ldrh	w1, [x21]
 	mov	w0, 61649
 	cmp	w1, w0
 	bne	.L1168
-	.loc 4 229 0 is_stmt 0 discriminator 1
 	ldr	w1, [x20, 8]
 	ldr	w0, [x21, 4]
 	cmp	w0, w1
 	bls	.L1168
-	.loc 4 231 0 is_stmt 1
 	ldrh	w1, [x20, 4]
-	.loc 4 232 0
 	str	w0, [x20, 8]
-	.loc 4 233 0
 	ldrh	w0, [x21, 8]
-	.loc 4 231 0
 	strh	w1, [x19, #:lo12:.LANCHOR37]
-	.loc 4 233 0
 	strh	w0, [x20, 4]
 .L1168:
-	.loc 4 238 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR37]
 	add	x24, x19, :lo12:.LANCHOR37
 	mov	w1, 1
-	.loc 4 247 0
 	mov	w25, 61649
-	.loc 4 238 0
 	bl	FtlGetLastWrittenPage
-.LVL1531:
 	sxth	w20, w0
-.LVL1532:
-	.loc 4 239 0
 	add	w0, w0, 1
 	strh	w0, [x24, 2]
-	.loc 4 243 0
 	add	x24, x22, :lo12:.LANCHOR106
 .L1170:
-	.loc 4 241 0
 	tbz	w20, #31, .L1173
-	.loc 4 254 0
 	adrp	x1, .LANCHOR164
 	adrp	x0, .LC1
 	mov	w2, 254
 	add	x1, x1, :lo12:.LANCHOR164
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1533:
 .L1172:
-	.loc 4 255 0
 	add	x0, x19, :lo12:.LANCHOR37
 	ldrh	w1, [x21, 10]
 	strh	w1, [x0, 6]
-	.loc 4 257 0
 	mov	w1, 65535
 	ldrh	w0, [x21, 12]
 	cmp	w0, w1
 	beq	.L1175
-	.loc 4 259 0
 	adrp	x1, .LANCHOR2
 	ldr	w2, [x1, #:lo12:.LANCHOR2]
 	cmp	w0, w2
 	beq	.L1175
-	.loc 4 259 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR6
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	lsr	w1, w1, 2
 	cmp	w2, w1
 	bcs	.L1175
-	.loc 4 261 0 is_stmt 1
 	cmp	w0, w1
 	bcs	.L1175
-	.loc 4 263 0
 	bl	FtlSysBlkNumInit
-.LVL1534:
 .L1175:
 	add	x19, x19, :lo12:.LANCHOR37
-	.loc 4 268 0 discriminator 1
 	adrp	x21, .LANCHOR10
-.LVL1535:
-	.loc 4 269 0 discriminator 1
 	adrp	x23, .LANCHOR137
 	add	x19, x19, 32
-	.loc 4 268 0 discriminator 1
 	add	x21, x21, :lo12:.LANCHOR10
-	.loc 4 269 0 discriminator 1
 	add	x23, x23, :lo12:.LANCHOR137
 	add	x22, x22, :lo12:.LANCHOR106
-	.loc 4 173 0 discriminator 1
 	mov	w20, 0
-.LVL1536:
 .L1176:
-	.loc 4 268 0 discriminator 1
 	ldrh	w0, [x21]
 	cmp	w20, w0
 	bcc	.L1177
-	.loc 4 275 0
 	mov	w0, 0
-.LVL1537:
 .L1160:
-	.loc 4 276 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 25
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1538:
 .L1163:
-	.cfi_restore_state
-	.loc 4 184 0 discriminator 2
 	sub	w19, w19, #1
-.LVL1539:
 	and	w19, w19, 65535
-.LVL1540:
 	b	.L1161
-.LVL1541:
 .L1173:
-	.loc 4 243 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR37]
-	.loc 4 245 0
 	mov	w2, 1
 	mov	w1, w2
-	.loc 4 243 0
 	orr	w0, w20, w0, lsl 10
 	str	w0, [x24, 4]
-	.loc 4 244 0
 	ldr	x0, [x23, #:lo12:.LANCHOR107]
 	str	x0, [x24, 8]
-	.loc 4 245 0
 	mov	x0, x24
 	bl	FlashReadPages
-.LVL1542:
-	.loc 4 247 0
 	ldr	w0, [x24]
 	cmn	w0, #1
 	beq	.L1171
-	.loc 4 247 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x21]
 	cmp	w0, w25
 	beq	.L1172
 .L1171:
 	sub	w20, w20, #1
-.LVL1543:
 	sxth	w20, w20
-.LVL1544:
 	b	.L1170
-.LVL1545:
 .L1177:
-	.loc 4 269 0 is_stmt 1 discriminator 3
 	ldrh	w2, [x23]
 	ldr	x0, [x22, 8]
 	mul	w1, w2, w20
 	lsl	w2, w2, 2
-	.loc 4 268 0 discriminator 3
 	add	w20, w20, 1
-.LVL1546:
-	.loc 4 269 0 discriminator 3
 	add	x1, x0, x1, lsl 2
 	ldr	x0, [x19], 8
 	bl	ftl_memcpy
-.LVL1547:
 	b	.L1176
-.LVL1548:
 .L1178:
-	.loc 4 218 0
 	mov	w0, -1
 	b	.L1160
-	.cfi_endproc
-.LFE229:
 	.size	FtlLoadBbt, .-FtlLoadBbt
 	.section	.text.FtlMakeBbt,"ax",@progbits
 	.align	2
 	.global	FtlMakeBbt
 	.type	FtlMakeBbt, %function
 FtlMakeBbt:
-.LFB231:
-	.loc 4 317 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -128]!
-	.cfi_def_cfa_offset 128
-	.cfi_offset 29, -128
-	.cfi_offset 30, -120
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -96
-	.cfi_offset 22, -88
-	.loc 4 327 0
 	mov	w22, 0
-	.loc 4 317 0
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -112
-	.cfi_offset 20, -104
 	adrp	x20, .LANCHOR37
 	stp	x23, x24, [sp, 48]
 	add	x21, x20, :lo12:.LANCHOR37
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 23, -80
-	.cfi_offset 24, -72
-	.cfi_offset 25, -64
-	.cfi_offset 26, -56
 	add	x24, x21, 32
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 27, -48
-	.cfi_offset 28, -40
-	.loc 4 325 0
 	bl	FtlBbtMemInit
-.LVL1549:
-	.loc 4 326 0
 	bl	FtlLoadFactoryBbt
-.LVL1550:
-	.loc 4 328 0
 	adrp	x28, .LANCHOR106
 	add	x21, x21, 12
-	.loc 4 356 0
 	add	x25, x28, :lo12:.LANCHOR106
-	.loc 4 327 0
 	adrp	x0, .LANCHOR10
 	add	x0, x0, :lo12:.LANCHOR10
 	str	x0, [x29, 120]
-.LVL1551:
 .L1191:
-	.loc 4 327 0 is_stmt 0 discriminator 1
 	ldr	x0, [x29, 120]
 	ldrh	w0, [x0]
 	cmp	w22, w0
 	bcc	.L1197
-	.loc 4 381 0 is_stmt 1 discriminator 1
 	adrp	x21, .LANCHOR25
 	add	x21, x21, :lo12:.LANCHOR25
 	mov	w19, 0
 .L1198:
-.LVL1552:
 	ldrh	w0, [x21]
 	cmp	w0, w19
 	bhi	.L1199
-	.loc 4 387 0
 	add	x21, x20, :lo12:.LANCHOR37
-	.loc 4 396 0
 	mov	w22, 65535
-.LVL1553:
-	.loc 4 387 0
 	ldrh	w19, [x21, 12]
-.LVL1554:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.LVL1555:
 .L1200:
-	.loc 4 387 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x21, 12]
 	sub	w0, w0, #47
 	cmp	w0, w19
 	bgt	.L1204
-	.loc 4 389 0 is_stmt 1
 	mov	w0, w19
 	bl	FtlBbmIsBadBlock
-.LVL1556:
 	cmp	w0, 1
 	beq	.L1201
-	.loc 4 391 0
 	mov	w0, w19
 	bl	FlashTestBlk
-.LVL1557:
 	cbz	w0, .L1202
-	.loc 4 393 0
 	mov	w0, w19
 	bl	FtlBbmMapBadBlock
-.LVL1558:
 .L1201:
-	.loc 4 387 0 discriminator 2
 	sub	w19, w19, #1
-.LVL1559:
 	and	w19, w19, 65535
-.LVL1560:
 	b	.L1200
-.LVL1561:
 .L1197:
-	.loc 4 329 0
 	adrp	x2, .LANCHOR108
-	.loc 4 328 0
 	adrp	x0, .LANCHOR107
 	add	x19, x28, :lo12:.LANCHOR106
-	.loc 4 331 0
 	ldrh	w1, [x21]
-	.loc 4 328 0
 	ldr	x0, [x0, #:lo12:.LANCHOR107]
-	.loc 4 331 0
 	mov	w3, 65535
-	.loc 4 329 0
 	ldr	x26, [x2, #:lo12:.LANCHOR108]
-	.loc 4 331 0
 	cmp	w1, w3
-	.loc 4 329 0
 	stp	x0, x26, [x19, 8]
-.LVL1562:
 	adrp	x23, .LANCHOR17
 	str	x2, [x29, 112]
-	.loc 4 331 0
 	beq	.L1192
-	.loc 4 333 0
 	ldrh	w4, [x23, #:lo12:.LANCHOR17]
-	.loc 4 335 0
 	mov	w2, 1
-	.loc 4 333 0
 	madd	w27, w4, w22, w1
-.LVL1563:
-	.loc 4 335 0
 	mov	w1, w2
-	.loc 4 334 0
 	lsl	w0, w27, 10
 	str	w0, [x19, 4]
-	.loc 4 335 0
 	mov	x0, x19
 	bl	FlashReadPages
-.LVL1564:
-	.loc 4 336 0
 	ldr	x1, [x19, 8]
 	ldr	x0, [x24]
 	ldrh	w2, [x23, #:lo12:.LANCHOR17]
 	add	w2, w2, 7
 	lsr	w2, w2, 3
 	bl	ftl_memcpy
-.LVL1565:
 .L1193:
-	.loc 4 376 0 discriminator 2
 	mov	w0, w27
-	.loc 4 327 0 discriminator 2
 	add	w22, w22, 1
-.LVL1566:
-	.loc 4 376 0 discriminator 2
 	bl	FtlBbmMapBadBlock
-.LVL1567:
 	add	x24, x24, 8
 	add	x21, x21, 2
 	b	.L1191
-.LVL1568:
 .L1192:
-	.loc 4 340 0
 	mov	w1, w22
 	bl	FlashGetBadBlockList
-.LVL1569:
-	.loc 4 341 0
 	ldr	x0, [x19, 8]
 	ldr	x1, [x24]
 	bl	FtlBbt2Bitmap
-.LVL1570:
-	.loc 4 343 0
 	ldrh	w19, [x23, #:lo12:.LANCHOR17]
-	.loc 4 345 0
 	add	x23, x23, :lo12:.LANCHOR17
-	.loc 4 357 0
 	adrp	x0, .LANCHOR137
-	.loc 4 343 0
 	sub	w19, w19, #1
-	.loc 4 357 0
 	add	x0, x0, :lo12:.LANCHOR137
-	.loc 4 343 0
 	and	w19, w19, 65535
-.LVL1571:
-	.loc 4 357 0
 	str	x0, [x29, 104]
 .L1194:
-	.loc 4 345 0
 	ldrh	w0, [x23]
 	madd	w0, w22, w0, w19
 	bl	FtlBbmIsBadBlock
-.LVL1572:
 	cmp	w0, 1
 	beq	.L1195
-	.loc 4 350 0
 	ldr	x0, [x29, 112]
 	mov	w2, 16
-	.loc 4 349 0
 	strh	w19, [x21]
-	.loc 4 350 0
 	mov	w1, 0
 	ldr	x0, [x0, #:lo12:.LANCHOR108]
 	bl	ftl_memset
-.LVL1573:
-	.loc 4 351 0
 	adrp	x0, .LANCHOR107
 	mov	w2, 4096
 	mov	w1, 0
 	ldr	x0, [x0, #:lo12:.LANCHOR107]
 	bl	ftl_memset
-.LVL1574:
-	.loc 4 352 0
 	mov	w0, -3872
 	strh	w0, [x26]
-	.loc 4 355 0
 	ldrh	w4, [x23]
-	.loc 4 354 0
 	ldrh	w0, [x21]
 	strh	w0, [x26, 2]
-	.loc 4 357 0
 	ldr	x1, [x24]
-	.loc 4 353 0
 	str	wzr, [x26, 4]
-	.loc 4 355 0
 	madd	w27, w4, w22, w0
-.LVL1575:
-	.loc 4 356 0
 	lsl	w0, w27, 10
 	str	w0, [x25, 4]
-	.loc 4 357 0
 	ldr	x0, [x29, 104]
 	ldrh	w2, [x0]
 	ldr	x0, [x25, 8]
 	lsl	w2, w2, 2
 	bl	ftl_memcpy
-.LVL1576:
-	.loc 4 358 0
 	mov	w2, 1
 	mov	x0, x25
 	mov	w1, w2
 	bl	FlashEraseBlocks
-.LVL1577:
-	.loc 4 359 0
 	mov	w3, 1
 	mov	x0, x25
 	mov	w2, w3
 	mov	w1, w3
 	bl	FlashProgPages
-.LVL1578:
-	.loc 4 360 0
 	ldr	w0, [x25]
 	cmn	w0, #1
 	bne	.L1193
-	.loc 4 362 0
 	mov	w0, w27
 	bl	FtlBbmMapBadBlock
-.LVL1579:
-	.loc 4 363 0
 	b	.L1194
-.LVL1580:
 .L1195:
-	.loc 4 347 0
 	sub	w19, w19, #1
-.LVL1581:
 	and	w19, w19, 65535
-.LVL1582:
 	b	.L1194
-.LVL1583:
 .L1199:
-	.loc 4 383 0 discriminator 3
 	mov	w0, w19
-	.loc 4 381 0 discriminator 3
 	add	w19, w19, 1
-.LVL1584:
-	.loc 4 383 0 discriminator 3
 	bl	FtlBbmMapBadBlock
-.LVL1585:
-	.loc 4 381 0 discriminator 3
 	and	w19, w19, 65535
-.LVL1586:
 	b	.L1198
-.LVL1587:
 .L1202:
-	.loc 4 396 0
 	ldrh	w0, [x21]
 	cmp	w0, w22
 	bne	.L1203
-	.loc 4 398 0
 	strh	w19, [x21]
 	b	.L1201
 .L1203:
-	.loc 4 402 0
 	strh	w19, [x21, 4]
 .L1204:
-	.loc 4 414 0
 	adrp	x0, .LANCHOR111
-	.loc 4 411 0
 	add	x19, x20, :lo12:.LANCHOR37
-.LVL1588:
-	.loc 4 414 0
 	ldrh	w1, [x20, #:lo12:.LANCHOR37]
-	.loc 4 416 0
 	mov	w2, 2
-	.loc 4 414 0
 	ldr	x0, [x0, #:lo12:.LANCHOR111]
-	.loc 4 413 0
 	str	wzr, [x19, 8]
-	.loc 4 414 0
 	lsl	w1, w1, 10
-	.loc 4 411 0
 	strh	wzr, [x19, 2]
-	.loc 4 414 0
 	str	w1, [x0, 4]
-	.loc 4 415 0
 	ldrh	w1, [x19, 4]
 	lsl	w1, w1, 10
 	str	w1, [x0, 36]
-	.loc 4 416 0
 	mov	w1, 1
 	bl	FlashEraseBlocks
-.LVL1589:
-	.loc 4 418 0
 	ldrh	w0, [x20, #:lo12:.LANCHOR37]
 	bl	FtlBbmMapBadBlock
-.LVL1590:
-	.loc 4 419 0
 	ldrh	w0, [x19, 4]
 	bl	FtlBbmMapBadBlock
-.LVL1591:
-	.loc 4 421 0
 	bl	FtlBbmTblFlush
-.LVL1592:
-	.loc 4 426 0
 	strh	wzr, [x19, 2]
-	.loc 4 422 0
 	ldr	w0, [x19, 8]
-	.loc 4 425 0
 	ldrh	w1, [x19, 4]
-	.loc 4 422 0
 	add	w0, w0, 1
 	str	w0, [x19, 8]
-	.loc 4 424 0
 	ldrh	w0, [x20, #:lo12:.LANCHOR37]
-.LVL1593:
-	.loc 4 427 0
 	strh	w0, [x19, 4]
-	.loc 4 425 0
 	strh	w1, [x20, #:lo12:.LANCHOR37]
-	.loc 4 429 0
 	bl	FtlBbmTblFlush
-.LVL1594:
-	.loc 4 432 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -15247,234 +8612,109 @@ FtlMakeBbt:
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE231:
 	.size	FtlMakeBbt, .-FtlMakeBbt
 	.section	.text.FtlVendorPartWrite,"ax",@progbits
 	.align	2
 	.global	FtlVendorPartWrite
 	.type	FtlVendorPartWrite, %function
 FtlVendorPartWrite:
-.LFB263:
-	.loc 2 835 0
-	.cfi_startproc
-.LVL1595:
 	stp	x29, x30, [sp, -208]!
-	.cfi_def_cfa_offset 208
-	.cfi_offset 29, -208
-	.cfi_offset 30, -200
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -192
-	.cfi_offset 20, -184
 	mov	w20, w1
 	stp	x27, x28, [sp, 80]
-	.loc 2 843 0
 	add	w1, w0, w1
-.LVL1596:
-	.cfi_offset 27, -128
-	.cfi_offset 28, -120
-	.loc 2 835 0
 	mov	w28, w0
-.LVL1597:
-	.loc 2 843 0
 	adrp	x0, .LANCHOR16
-.LVL1598:
-	.loc 2 835 0
 	stp	x21, x22, [sp, 32]
-	.loc 2 843 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR16]
-	.loc 2 835 0
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 21, -176
-	.cfi_offset 22, -168
-	.cfi_offset 23, -160
-	.cfi_offset 24, -152
-	.cfi_offset 25, -144
-	.cfi_offset 26, -136
-	.loc 2 843 0
 	cmp	w1, w0
 	bhi	.L1218
-	.loc 2 840 0
 	adrp	x0, .LANCHOR22
-	.loc 2 848 0
 	adrp	x25, .LANCHOR12
-	.loc 2 858 0
 	adrp	x26, .LANCHOR23
 	mov	x24, x2
-	.loc 2 840 0
 	ldrh	w21, [x0, #:lo12:.LANCHOR22]
-	.loc 2 848 0
 	add	x25, x25, :lo12:.LANCHOR12
-	.loc 2 858 0
 	add	x26, x26, :lo12:.LANCHOR23
-	.loc 2 840 0
 	mov	w23, 0
 	lsr	w21, w28, w21
-.LVL1599:
 .L1212:
-	.loc 2 846 0
 	cbnz	w20, .L1217
-.LVL1600:
 .L1210:
-	.loc 2 869 0
 	mov	w0, w23
 	ldp	x19, x20, [sp, 16]
-.LVL1601:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-.LVL1602:
 	ldp	x29, x30, [sp], 208
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1603:
 .L1217:
-	.cfi_restore_state
-	.loc 2 848 0
 	ldrh	w1, [x25]
-	.loc 2 847 0
 	adrp	x0, .LANCHOR133
 	adrp	x27, .LANCHOR124
 	ldr	x0, [x0, #:lo12:.LANCHOR133]
-	.loc 2 848 0
 	udiv	w22, w28, w1
-	.loc 2 847 0
 	ldr	w2, [x0, w21, uxtw 2]
-.LVL1604:
-	.loc 2 851 0
 	and	w0, w20, 65535
-	.loc 2 848 0
 	msub	w22, w22, w1, w28
-.LVL1605:
-	.loc 2 849 0
 	sub	w19, w1, w22
 	and	w19, w19, 65535
-.LVL1606:
-	.loc 2 851 0
 	cmp	w20, w19
 	csel	w19, w0, w19, cc
-.LVL1607:
-	.loc 2 852 0
 	cbz	w2, .L1214
-	.loc 2 852 0 is_stmt 0 discriminator 1
 	cmp	w19, w1
 	beq	.L1214
-	.loc 2 854 0 is_stmt 1
 	ldr	x0, [x27, #:lo12:.LANCHOR124]
 	str	x0, [x29, 120]
-	.loc 2 855 0
 	add	x0, x29, 144
-	.loc 2 853 0
 	str	w2, [x29, 116]
-	.loc 2 856 0
 	mov	w2, 1
-.LVL1608:
-	.loc 2 855 0
 	str	x0, [x29, 128]
-	.loc 2 856 0
 	mov	w1, w2
 	add	x0, x29, 112
-.LVL1609:
 	bl	FlashReadPages
-.LVL1610:
 .L1215:
-	.loc 2 860 0
 	lsl	w4, w19, 9
 	ldr	x0, [x27, #:lo12:.LANCHOR124]
 	lsl	w22, w22, 7
-.LVL1611:
 	mov	w2, w4
 	mov	x1, x24
 	str	w4, [x29, 108]
 	add	x0, x0, x22, sxtw 2
 	bl	ftl_memcpy
-.LVL1612:
-	.loc 2 861 0
 	ldr	x2, [x27, #:lo12:.LANCHOR124]
 	mov	w1, w21
 	adrp	x0, .LANCHOR149
 	add	x0, x0, :lo12:.LANCHOR149
-	.loc 2 864 0
 	sub	w20, w20, w19
-.LVL1613:
-	.loc 2 865 0
 	add	w28, w28, w19
-.LVL1614:
-	.loc 2 863 0
 	add	w21, w21, 1
-.LVL1615:
-	.loc 2 861 0
 	bl	FtlMapWritePage
-.LVL1616:
-	.loc 2 862 0
 	cmn	w0, #1
-	.loc 2 866 0
 	ldr	w4, [x29, 108]
-	.loc 2 862 0
 	csinv	w23, w23, wzr, ne
-.LVL1617:
-	.loc 2 866 0
 	add	x24, x24, x4, sxtw
-.LVL1618:
 	b	.L1212
-.LVL1619:
 .L1214:
-	.loc 2 858 0
 	ldrh	w2, [x26]
-.LVL1620:
 	mov	w1, 0
 	ldr	x0, [x27, #:lo12:.LANCHOR124]
 	bl	ftl_memset
-.LVL1621:
 	b	.L1215
-.LVL1622:
 .L1218:
-	.loc 2 844 0
 	mov	w23, -1
 	b	.L1210
-	.cfi_endproc
-.LFE263:
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.section	.text.Ftl_save_ext_data,"ax",@progbits
 	.align	2
 	.global	Ftl_save_ext_data
 	.type	Ftl_save_ext_data, %function
 Ftl_save_ext_data:
-.LFB286:
-	.loc 2 2159 0
-	.cfi_startproc
-	.loc 2 2160 0
 	adrp	x0, .LANCHOR81
 	add	x2, x0, :lo12:.LANCHOR81
 	ldr	w1, [x0, #:lo12:.LANCHOR81]
@@ -15482,721 +8722,415 @@ Ftl_save_ext_data:
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
 	bne	.L1223
-.LBB313:
-.LBB314:
-	.loc 2 2161 0
 	mov	w0, 68
-	.loc 2 2174 0
 	mov	w1, 1
-	.loc 2 2161 0
 	movk	w0, 0x5000, lsl 16
 	str	w0, [x2, 4]
-	.loc 2 2162 0
 	adrp	x0, .LANCHOR68
 	ldr	w0, [x0, #:lo12:.LANCHOR68]
 	str	w0, [x2, 88]
-	.loc 2 2163 0
 	adrp	x0, .LANCHOR69
 	ldr	w0, [x0, #:lo12:.LANCHOR69]
 	str	w0, [x2, 92]
-	.loc 2 2164 0
 	adrp	x0, .LANCHOR67
 	ldr	w0, [x0, #:lo12:.LANCHOR67]
 	str	w0, [x2, 8]
-	.loc 2 2165 0
 	adrp	x0, .LANCHOR64
 	ldr	w0, [x0, #:lo12:.LANCHOR64]
 	str	w0, [x2, 12]
-	.loc 2 2166 0
 	adrp	x0, .LANCHOR62
 	ldr	w0, [x0, #:lo12:.LANCHOR62]
 	str	w0, [x2, 16]
-	.loc 2 2167 0
 	adrp	x0, .LANCHOR66
 	ldr	w0, [x0, #:lo12:.LANCHOR66]
 	str	w0, [x2, 20]
-	.loc 2 2168 0
 	adrp	x0, .LANCHOR73
 	ldr	w0, [x0, #:lo12:.LANCHOR73]
 	str	w0, [x2, 28]
-	.loc 2 2169 0
 	adrp	x0, .LANCHOR75
 	ldr	w0, [x0, #:lo12:.LANCHOR75]
 	str	w0, [x2, 32]
-	.loc 2 2170 0
 	adrp	x0, .LANCHOR63
 	ldr	w0, [x0, #:lo12:.LANCHOR63]
 	str	w0, [x2, 36]
-	.loc 2 2171 0
 	adrp	x0, .LANCHOR65
 	ldr	w0, [x0, #:lo12:.LANCHOR65]
 	str	w0, [x2, 40]
-	.loc 2 2172 0
 	adrp	x0, .LANCHOR76
 	ldr	w0, [x0, #:lo12:.LANCHOR76]
 	str	w0, [x2, 44]
-	.loc 2 2173 0
 	adrp	x0, .LANCHOR77
 	ldr	w0, [x0, #:lo12:.LANCHOR77]
 	str	w0, [x2, 48]
-	.loc 2 2174 0
 	mov	w0, 0
 	b	FtlVendorPartWrite
-.LVL1623:
 .L1223:
 	ret
-.LBE314:
-.LBE313:
-	.cfi_endproc
-.LFE286:
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
 	.section	.text.FtlEctTblFlush,"ax",@progbits
 	.align	2
 	.global	FtlEctTblFlush
 	.type	FtlEctTblFlush, %function
 FtlEctTblFlush:
-.LFB265:
-	.loc 2 910 0
-	.cfi_startproc
-.LVL1624:
-	.loc 2 913 0
 	adrp	x2, .LANCHOR165
 	ldrh	w1, [x2, #:lo12:.LANCHOR165]
 	cmp	w1, 31
 	bhi	.L1229
-	.loc 2 914 0
 	add	w1, w1, 1
 	strh	w1, [x2, #:lo12:.LANCHOR165]
-.LVL1625:
-	.loc 2 915 0
 	mov	w1, 1
-.LVL1626:
 .L1226:
 	adrp	x2, .LANCHOR127
-	.loc 2 917 0
 	cbnz	w0, .L1227
-	.loc 2 917 0 is_stmt 0 discriminator 1
 	ldr	x0, [x2, #:lo12:.LANCHOR127]
-.LVL1627:
 	ldr	w3, [x0, 20]
 	ldr	w0, [x0, 16]
 	add	w1, w1, w3
-.LVL1628:
 	cmp	w0, w1
 	bcc	.L1231
 .L1227:
-	.loc 2 910 0 is_stmt 1
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 2 919 0
 	ldr	x2, [x2, #:lo12:.LANCHOR127]
 	ldr	w0, [x2, 16]
 	str	w0, [x2, 20]
-	.loc 2 920 0
 	mov	w0, 17221
-	.loc 2 923 0
 	str	wzr, [x2, 4]
-	.loc 2 920 0
 	movk	w0, 0x4254, lsl 16
 	str	w0, [x2]
-	.loc 2 921 0
 	adrp	x0, .LANCHOR125
 	ldrh	w1, [x0, #:lo12:.LANCHOR125]
 	lsl	w0, w1, 9
 	str	w0, [x2, 12]
-	.loc 2 922 0
 	ldr	w0, [x2, 8]
 	add	w0, w0, 1
 	str	w0, [x2, 8]
-	.loc 2 924 0
 	mov	w0, 64
 	bl	FtlVendorPartWrite
-.LVL1629:
-	.loc 2 925 0
 	bl	Ftl_save_ext_data
-.LVL1630:
-	.loc 2 927 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1631:
 .L1229:
-	.loc 2 911 0
 	mov	w1, 32
 	b	.L1226
-.LVL1632:
 .L1231:
-	.loc 2 927 0
 	mov	w0, 0
 	ret
-	.cfi_endproc
-.LFE265:
 	.size	FtlEctTblFlush, .-FtlEctTblFlush
+	.section	.text.sftl_vendor_write,"ax",@progbits
+	.align	2
+	.global	sftl_vendor_write
+	.type	sftl_vendor_write, %function
+sftl_vendor_write:
+	add	w0, w0, 256
+	b	FtlVendorPartWrite
+	.size	sftl_vendor_write, .-sftl_vendor_write
 	.section	.text.FtlVendorPartRead,"ax",@progbits
 	.align	2
 	.global	FtlVendorPartRead
 	.type	FtlVendorPartRead, %function
 FtlVendorPartRead:
-.LFB264:
-	.loc 2 872 0
-	.cfi_startproc
-.LVL1633:
 	stp	x29, x30, [sp, -208]!
-	.cfi_def_cfa_offset 208
-	.cfi_offset 29, -208
-	.cfi_offset 30, -200
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -192
-	.cfi_offset 20, -184
 	mov	w20, w1
 	stp	x21, x22, [sp, 32]
-	.loc 2 881 0
 	add	w1, w0, w1
-.LVL1634:
-	.cfi_offset 21, -176
-	.cfi_offset 22, -168
-	.loc 2 872 0
 	mov	w21, w0
-.LVL1635:
-	.loc 2 881 0
 	adrp	x0, .LANCHOR16
-.LVL1636:
-	.loc 2 872 0
 	stp	x23, x24, [sp, 48]
-	.loc 2 881 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR16]
-	.loc 2 872 0
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 23, -160
-	.cfi_offset 24, -152
-	.cfi_offset 25, -144
-	.cfi_offset 26, -136
-	.cfi_offset 27, -128
-	.cfi_offset 28, -120
-	.loc 2 881 0
 	cmp	w1, w0
-	bhi	.L1241
-	.loc 2 877 0
+	bhi	.L1242
 	adrp	x0, .LANCHOR22
-	.loc 2 885 0
 	adrp	x24, .LANCHOR12
 	mov	x23, x2
 	add	x24, x24, :lo12:.LANCHOR12
-	.loc 2 877 0
 	ldrh	w3, [x0, #:lo12:.LANCHOR22]
 	mov	w22, 0
-	.loc 2 884 0
 	adrp	x25, .LANCHOR133
-	.loc 2 877 0
 	lsr	w26, w21, w3
-.LVL1637:
-.L1235:
-	.loc 2 883 0
-	cbnz	w20, .L1240
-.LVL1638:
-.L1233:
-	.loc 2 906 0
+.L1236:
+	cbnz	w20, .L1241
+.L1234:
 	mov	w0, w22
 	ldp	x19, x20, [sp, 16]
-.LVL1639:
 	ldp	x21, x22, [sp, 32]
-.LVL1640:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 208
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1641:
-.L1240:
-	.cfi_restore_state
-	.loc 2 885 0
+.L1241:
 	ldrh	w19, [x24]
-	.loc 2 884 0
 	ldr	x0, [x25, #:lo12:.LANCHOR133]
-	.loc 2 885 0
 	udiv	w27, w21, w19
-	.loc 2 884 0
 	ldr	w1, [x0, w26, uxtw 2]
-.LVL1642:
-	.loc 2 888 0
 	and	w0, w20, 65535
-	.loc 2 885 0
 	msub	w27, w27, w19, w21
-.LVL1643:
-	.loc 2 886 0
 	sub	w19, w19, w27
 	and	w19, w19, 65535
-.LVL1644:
-	.loc 2 888 0
 	cmp	w20, w19
 	csel	w19, w0, w19, cc
-.LVL1645:
 	lsl	w28, w19, 9
-	.loc 2 889 0
-	cbz	w1, .L1237
-	.loc 2 891 0
+	cbz	w1, .L1238
 	adrp	x4, .LANCHOR124
-	.loc 2 893 0
 	mov	w2, 1
-	.loc 2 891 0
 	str	x4, [x29, 104]
-	.loc 2 896 0
 	lsl	w27, w27, 7
-.LVL1646:
-	.loc 2 891 0
 	ldr	x0, [x4, #:lo12:.LANCHOR124]
 	str	x0, [x29, 120]
-	.loc 2 892 0
 	add	x0, x29, 144
-	.loc 2 890 0
 	str	w1, [x29, 116]
-	.loc 2 893 0
 	mov	w1, w2
-.LVL1647:
-	.loc 2 892 0
 	str	x0, [x29, 128]
-	.loc 2 893 0
 	add	x0, x29, 112
-.LVL1648:
 	bl	FlashReadPages
-.LVL1649:
-	.loc 2 896 0
 	ldr	x4, [x29, 104]
 	mov	w2, w28
-	.loc 2 895 0
 	ldr	w0, [x29, 112]
 	cmn	w0, #1
-	.loc 2 896 0
 	mov	x0, x23
 	ldr	x1, [x4, #:lo12:.LANCHOR124]
-	.loc 2 895 0
 	csinv	w22, w22, wzr, ne
-.LVL1650:
-	.loc 2 896 0
 	add	x1, x1, x27, sxtw 2
 	bl	ftl_memcpy
-.LVL1651:
-.L1239:
-	.loc 2 900 0
+.L1240:
 	add	w26, w26, 1
-.LVL1652:
-	.loc 2 901 0
 	sub	w20, w20, w19
-.LVL1653:
-	.loc 2 902 0
 	add	w21, w21, w19
-.LVL1654:
-	.loc 2 903 0
 	add	x23, x23, x28, sxtw
-.LVL1655:
-	b	.L1235
-.LVL1656:
-.L1237:
-	.loc 2 898 0
+	b	.L1236
+.L1238:
 	mov	w2, w28
 	mov	w1, 0
-.LVL1657:
 	mov	x0, x23
 	bl	ftl_memset
-.LVL1658:
-	b	.L1239
-.LVL1659:
-.L1241:
-	.loc 2 882 0
+	b	.L1240
+.L1242:
 	mov	w22, -1
-	b	.L1233
-	.cfi_endproc
-.LFE264:
+	b	.L1234
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
 	.section	.text.FtlLoadEctTbl,"ax",@progbits
 	.align	2
 	.global	FtlLoadEctTbl
 	.type	FtlLoadEctTbl, %function
 FtlLoadEctTbl:
-.LFB271:
-	.loc 2 1383 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 2 1384 0
 	mov	w0, 64
-	.loc 2 1383 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -16
-	.cfi_offset 20, -8
-	.loc 2 1384 0
 	adrp	x19, .LANCHOR127
 	adrp	x20, .LANCHOR125
 	ldr	x2, [x19, #:lo12:.LANCHOR127]
 	ldrh	w1, [x20, #:lo12:.LANCHOR125]
 	bl	FtlVendorPartRead
-.LVL1660:
-	.loc 2 1385 0
 	ldr	x0, [x19, #:lo12:.LANCHOR127]
 	ldr	w1, [x0]
 	mov	w0, 17221
 	movk	w0, 0x4254, lsl 16
 	cmp	w1, w0
-	beq	.L1244
-.LBB317:
-.LBB318:
-	.loc 2 1387 0
+	beq	.L1245
 	adrp	x1, .LC103
 	adrp	x0, .LC71
 	add	x1, x1, :lo12:.LC103
 	add	x0, x0, :lo12:.LC71
 	bl	printf
-.LVL1661:
-	.loc 2 1388 0
 	ldr	x0, [x19, #:lo12:.LANCHOR127]
 	mov	w1, 0
 	ldrh	w2, [x20, #:lo12:.LANCHOR125]
 	lsl	w2, w2, 9
 	bl	ftl_memset
-.LVL1662:
-.L1244:
-.LBE318:
-.LBE317:
-	.loc 2 1393 0
+.L1245:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE271:
 	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
 	.section	.text.Ftl_load_ext_data,"ax",@progbits
 	.align	2
 	.global	Ftl_load_ext_data
 	.type	Ftl_load_ext_data, %function
 Ftl_load_ext_data:
-.LFB287:
-	.loc 2 2179 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -48]!
-	.cfi_def_cfa_offset 48
-	.cfi_offset 29, -48
-	.cfi_offset 30, -40
-	.loc 2 2180 0
 	mov	w1, 1
 	mov	w0, 0
-	.loc 2 2179 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
-	.loc 2 2180 0
 	adrp	x19, .LANCHOR81
-	.loc 2 2179 0
 	str	x21, [sp, 32]
-	.cfi_offset 21, -16
-	.loc 2 2180 0
 	add	x21, x19, :lo12:.LANCHOR81
 	mov	x2, x21
 	bl	FtlVendorPartRead
-.LVL1663:
-	.loc 2 2181 0
 	ldr	w0, [x19, #:lo12:.LANCHOR81]
 	mov	w20, 19539
 	movk	w20, 0x4654, lsl 16
 	cmp	w0, w20
-	beq	.L1247
-	.loc 2 2182 0
+	beq	.L1248
 	mov	w2, 512
 	mov	w1, 0
 	mov	x0, x21
 	bl	ftl_memset
-.LVL1664:
-	.loc 2 2183 0
 	str	w20, [x19, #:lo12:.LANCHOR81]
-.L1247:
-	.loc 2 2186 0
+.L1248:
 	ldr	w1, [x19, #:lo12:.LANCHOR81]
 	add	x0, x19, :lo12:.LANCHOR81
 	cmp	w1, w20
 	adrp	x1, .LANCHOR73
-	bne	.L1248
-	.loc 2 2187 0
+	bne	.L1249
 	adrp	x2, .LANCHOR68
 	ldr	w3, [x0, 88]
 	str	w3, [x2, #:lo12:.LANCHOR68]
-	.loc 2 2188 0
 	adrp	x2, .LANCHOR69
 	ldr	w3, [x0, 92]
 	str	w3, [x2, #:lo12:.LANCHOR69]
-	.loc 2 2189 0
 	adrp	x2, .LANCHOR67
 	ldr	w3, [x0, 8]
 	str	w3, [x2, #:lo12:.LANCHOR67]
-	.loc 2 2190 0
 	adrp	x2, .LANCHOR64
 	ldr	w3, [x0, 12]
 	str	w3, [x2, #:lo12:.LANCHOR64]
-	.loc 2 2191 0
 	adrp	x2, .LANCHOR62
 	ldr	w3, [x0, 16]
 	str	w3, [x2, #:lo12:.LANCHOR62]
-	.loc 2 2192 0
 	adrp	x2, .LANCHOR66
 	ldr	w3, [x0, 20]
 	str	w3, [x2, #:lo12:.LANCHOR66]
-	.loc 2 2194 0
 	ldp	w2, w3, [x0, 28]
-	.loc 2 2193 0
 	str	w2, [x1, #:lo12:.LANCHOR73]
-	.loc 2 2194 0
 	adrp	x2, .LANCHOR75
 	str	w3, [x2, #:lo12:.LANCHOR75]
-	.loc 2 2195 0
 	adrp	x2, .LANCHOR63
 	ldr	w3, [x0, 36]
 	str	w3, [x2, #:lo12:.LANCHOR63]
-	.loc 2 2196 0
 	adrp	x2, .LANCHOR65
 	ldr	w3, [x0, 40]
 	str	w3, [x2, #:lo12:.LANCHOR65]
-	.loc 2 2197 0
 	adrp	x2, .LANCHOR76
 	ldr	w3, [x0, 44]
 	str	w3, [x2, #:lo12:.LANCHOR76]
-	.loc 2 2198 0
 	ldr	w2, [x0, 48]
 	adrp	x0, .LANCHOR77
 	str	w2, [x0, #:lo12:.LANCHOR77]
-.L1248:
-	.loc 2 2201 0
+.L1249:
 	adrp	x0, .LANCHOR14
 	adrp	x2, .LANCHOR72
 	ldr	w1, [x1, #:lo12:.LANCHOR73]
 	ldrh	w0, [x0, #:lo12:.LANCHOR14]
 	ldr	w2, [x2, #:lo12:.LANCHOR72]
-	.loc 2 2202 0
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
-	.loc 2 2201 0
 	madd	w0, w0, w2, w1
 	adrp	x1, .LANCHOR5
-	.loc 2 2202 0
 	ldp	x29, x30, [sp], 48
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 21
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
-	.loc 2 2201 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR5]
 	udiv	w0, w0, w1
 	adrp	x1, .LANCHOR74
 	str	w0, [x1, #:lo12:.LANCHOR74]
-	.loc 2 2202 0
 	ret
-	.cfi_endproc
-.LFE287:
 	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
+	.section	.text.sftl_vendor_read,"ax",@progbits
+	.align	2
+	.global	sftl_vendor_read
+	.type	sftl_vendor_read, %function
+sftl_vendor_read:
+	add	w0, w0, 256
+	b	FtlVendorPartRead
+	.size	sftl_vendor_read, .-sftl_vendor_read
 	.section	.text.FtlVpcTblFlush,"ax",@progbits
 	.align	2
 	.global	FtlVpcTblFlush
 	.type	FtlVpcTblFlush, %function
 FtlVpcTblFlush:
-.LFB269:
-	.loc 2 1053 0
-	.cfi_startproc
-.LVL1665:
 	stp	x29, x30, [sp, -112]!
-	.cfi_def_cfa_offset 112
-	.cfi_offset 29, -112
-	.cfi_offset 30, -104
-	.loc 2 1062 0
 	adrp	x1, .LANCHOR79
-	.loc 2 1068 0
 	mov	w2, 19539
-	.loc 2 1053 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 25, -48
-	.cfi_offset 26, -40
-	.loc 2 1060 0
 	adrp	x25, .LANCHOR108
-	.loc 2 1053 0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -80
-	.cfi_offset 22, -72
-	.loc 2 1059 0
 	adrp	x22, .LANCHOR106
-	.loc 2 1053 0
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -64
-	.cfi_offset 24, -56
-	.loc 2 1059 0
 	adrp	x24, .LANCHOR107
-	.loc 2 1053 0
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 27, -32
-	.cfi_offset 28, -24
-	.loc 2 1059 0
 	add	x28, x22, :lo12:.LANCHOR106
-	.loc 2 1060 0
 	ldr	x21, [x25, #:lo12:.LANCHOR108]
-	.loc 2 1068 0
 	movk	w2, 0x4654, lsl 16
-	.loc 2 1053 0
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -96
-	.cfi_offset 20, -88
-	.loc 2 1062 0
 	add	x19, x1, :lo12:.LANCHOR79
-	.loc 2 1059 0
 	ldr	x0, [x24, #:lo12:.LANCHOR107]
-	.loc 2 1090 0
 	adrp	x23, .LANCHOR70
-	.loc 2 1062 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR79]
-	.loc 2 1106 0
 	adrp	x27, .LANCHOR20
-	.loc 2 1060 0
 	stp	x0, x21, [x28, 8]
-.LVL1666:
-	.loc 2 1054 0
 	mov	w26, 65535
-	.loc 2 1062 0
 	strh	w1, [x21, 2]
-	.loc 2 1063 0
 	mov	w1, -3932
 	strh	w1, [x21]
-	.loc 2 1064 0
 	ldr	w1, [x19, 8]
-	.loc 2 1065 0
 	stp	w1, wzr, [x21, 4]
-	.loc 2 1068 0
 	adrp	x1, .LANCHOR39
 	add	x20, x1, :lo12:.LANCHOR39
-	.loc 2 1066 0
 	str	wzr, [x21, 12]
-	.loc 2 1068 0
 	str	w2, [x1, #:lo12:.LANCHOR39]
-	.loc 2 1069 0
 	mov	w1, 68
 	movk	w1, 0x5000, lsl 16
 	str	w1, [x20, 4]
-	.loc 2 1070 0
 	ldrh	w1, [x19, 6]
-	.loc 2 1073 0
 	adrp	x2, .LANCHOR51
-	.loc 2 1070 0
 	strh	w1, [x20, 8]
-	.loc 2 1071 0
 	adrp	x1, .LANCHOR10
 	ldrh	w1, [x1, #:lo12:.LANCHOR10]
 	strb	w1, [x20, 10]
-	.loc 2 1073 0
 	add	x1, x2, :lo12:.LANCHOR51
 	ldrh	w2, [x2, #:lo12:.LANCHOR51]
 	strh	w2, [x20, 14]
-	.loc 2 1074 0
 	ldrh	w2, [x1, 2]
 	ldrb	w3, [x1, 6]
-	.loc 2 1075 0
 	ldrb	w1, [x1, 8]
 	strb	w1, [x20, 11]
-	.loc 2 1074 0
 	orr	w2, w3, w2, lsl 6
 	strh	w2, [x20, 16]
-	.loc 2 1077 0
 	adrp	x2, .LANCHOR52
 	add	x1, x2, :lo12:.LANCHOR52
 	ldrh	w2, [x2, #:lo12:.LANCHOR52]
-	.loc 2 1078 0
 	ldrb	w3, [x1, 6]
-	.loc 2 1077 0
 	strh	w2, [x20, 18]
-	.loc 2 1078 0
 	ldrh	w2, [x1, 2]
-	.loc 2 1079 0
 	ldrb	w1, [x1, 8]
 	strb	w1, [x20, 12]
-	.loc 2 1078 0
 	orr	w2, w3, w2, lsl 6
 	strh	w2, [x20, 20]
-	.loc 2 1081 0
 	adrp	x2, .LANCHOR53
 	add	x1, x2, :lo12:.LANCHOR53
 	ldrh	w2, [x2, #:lo12:.LANCHOR53]
-	.loc 2 1082 0
 	ldrb	w3, [x1, 6]
-	.loc 2 1081 0
 	strh	w2, [x20, 22]
-	.loc 2 1082 0
 	ldrh	w2, [x1, 2]
-	.loc 2 1083 0
 	ldrb	w1, [x1, 8]
 	strb	w1, [x20, 13]
-	.loc 2 1085 0
 	adrp	x1, .LANCHOR72
-	.loc 2 1082 0
 	orr	w2, w3, w2, lsl 6
 	strh	w2, [x20, 24]
-	.loc 2 1085 0
 	ldr	w1, [x1, #:lo12:.LANCHOR72]
 	str	w1, [x20, 32]
-	.loc 2 1090 0
 	ldr	w1, [x23, #:lo12:.LANCHOR70]
 	str	w1, [x20, 40]
-	.loc 2 1091 0
 	adrp	x1, .LANCHOR71
 	ldr	w1, [x1, #:lo12:.LANCHOR71]
 	str	w1, [x20, 36]
-	.loc 2 1096 0
 	adrp	x1, .LANCHOR23
 	ldrh	w2, [x1, #:lo12:.LANCHOR23]
 	mov	w1, 255
 	bl	ftl_memset
-.LVL1667:
-	.loc 2 1097 0
 	ldr	x0, [x28, 8]
 	mov	x1, x20
 	mov	w2, 48
-	.loc 2 1098 0
 	adrp	x20, .LANCHOR5
-	.loc 2 1097 0
 	bl	ftl_memcpy
-.LVL1668:
-	.loc 2 1098 0
 	adrp	x1, .LANCHOR42
 	ldrh	w2, [x20, #:lo12:.LANCHOR5]
 	ldr	x0, [x28, 8]
@@ -16204,14 +9138,10 @@ FtlVpcTblFlush:
 	lsl	w2, w2, 1
 	add	x0, x0, 48
 	bl	ftl_memcpy
-.LVL1669:
-	.loc 2 1099 0
 	ldrh	w0, [x20, #:lo12:.LANCHOR5]
 	adrp	x1, .LANCHOR1
 	ldr	x3, [x28, 8]
-	.loc 2 1056 0
 	mov	w20, 0
-	.loc 2 1099 0
 	ldr	x1, [x1, #:lo12:.LANCHOR1]
 	lsr	w2, w0, 3
 	ubfiz	x0, x0, 1, 16
@@ -16220,1712 +9150,958 @@ FtlVpcTblFlush:
 	and	x0, x0, -4
 	add	x0, x3, x0
 	bl	ftl_memcpy
-.LVL1670:
-	.loc 2 1100 0
 	mov	w0, 0
 	bl	FtlUpdateVaildLpn
-.LVL1671:
-	.loc 2 1126 0
 	add	x0, x27, :lo12:.LANCHOR20
 	str	x0, [x29, 104]
-.LVL1672:
-.L1251:
-	.loc 2 1102 0
+.L1253:
 	ldr	x0, [x24, #:lo12:.LANCHOR107]
-	.loc 2 1105 0
 	mov	w3, 1
-	.loc 2 1102 0
 	str	x0, [x28, 8]
-	.loc 2 1105 0
 	mov	w2, w3
-	.loc 2 1103 0
 	ldr	x0, [x25, #:lo12:.LANCHOR108]
-	.loc 2 1104 0
 	ldrh	w1, [x19, 2]
-	.loc 2 1103 0
 	str	x0, [x28, 16]
-	.loc 2 1104 0
 	ldrh	w0, [x19]
 	orr	w0, w1, w0, lsl 10
-	.loc 2 1105 0
 	mov	w1, w3
-	.loc 2 1104 0
 	str	w0, [x28, 4]
-	.loc 2 1105 0
 	mov	x0, x28
 	bl	FlashProgPages
-.LVL1673:
-	.loc 2 1106 0
 	ldrh	w0, [x27, #:lo12:.LANCHOR20]
 	ldrh	w1, [x19, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L1252
-	.loc 2 1108 0
+	blt	.L1254
 	ldrh	w0, [x19]
-	.loc 2 1107 0
 	ldrh	w26, [x19, 4]
-.LVL1674:
-	.loc 2 1109 0
 	strh	wzr, [x19, 2]
-	.loc 2 1108 0
 	strh	w0, [x19, 4]
-	.loc 2 1110 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL1675:
 	strh	w0, [x19]
-	.loc 2 1115 0
 	ldr	w1, [x23, #:lo12:.LANCHOR70]
-	.loc 2 1119 0
 	mov	w3, 1
-	.loc 2 1115 0
 	str	w1, [x19, 8]
 	add	w2, w1, 1
 	str	w2, [x23, #:lo12:.LANCHOR70]
-	.loc 2 1116 0
 	ubfiz	w2, w0, 10, 16
 	str	w2, [x28, 4]
-	.loc 2 1118 0
 	strh	w0, [x21, 2]
-	.loc 2 1119 0
 	mov	w2, w3
-	.loc 2 1117 0
 	str	w1, [x21, 4]
-	.loc 2 1119 0
 	mov	x0, x28
 	mov	w1, w3
 	bl	FlashProgPages
-.LVL1676:
-.L1252:
-	.loc 2 1121 0
+.L1254:
 	ldrh	w0, [x19, 2]
-	.loc 2 1122 0
 	ldr	w1, [x28]
-	.loc 2 1121 0
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	strh	w0, [x19, 2]
-	.loc 2 1122 0
 	cmn	w1, #1
-	bne	.L1253
-	.loc 2 1124 0
+	bne	.L1255
 	cmp	w0, 1
-	bne	.L1254
-	.loc 2 1124 0 is_stmt 0 discriminator 1
+	bne	.L1256
 	adrp	x1, .LANCHOR166
 	adrp	x0, .LC1
 	mov	w2, 1124
 	add	x1, x1, :lo12:.LANCHOR166
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1677:
-.L1254:
-	.loc 2 1125 0 is_stmt 1
+.L1256:
 	ldrh	w0, [x19, 2]
 	cmp	w0, 1
-	bne	.L1255
-	.loc 2 1126 0
+	bne	.L1257
 	ldr	x0, [x29, 104]
 	ldrh	w0, [x0]
 	sub	w0, w0, #1
 	strh	w0, [x19, 2]
-.L1255:
-	.loc 2 1127 0
+.L1257:
 	add	w20, w20, 1
-.LVL1678:
 	and	w20, w20, 65535
-.LVL1679:
-	.loc 2 1128 0
 	cmp	w20, 3
-	bls	.L1251
-	.loc 2 1129 0
+	bls	.L1253
 	add	x22, x22, :lo12:.LANCHOR106
 	adrp	x0, .LC104
 	mov	w2, w20
 	add	x0, x0, :lo12:.LC104
 	ldr	w1, [x22, 4]
 	bl	printf
-.LVL1680:
-.L1257:
-	b	.L1257
-.L1253:
-	.loc 2 1135 0
+.L1259:
+	b	.L1259
+.L1255:
 	cmp	w0, 1
-	beq	.L1251
-	.loc 2 1138 0
+	beq	.L1253
 	mov	w0, 65535
 	cmp	w26, w0
-	beq	.L1258
-	.loc 2 1139 0
+	beq	.L1260
 	mov	w1, 1
 	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-.LVL1681:
-.L1258:
-	.loc 2 1141 0
+.L1260:
 	ldp	x19, x20, [sp, 16]
-.LVL1682:
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
-.LVL1683:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-.LVL1684:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE269:
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
 	.section	.text.FtlSysFlush,"ax",@progbits
 	.align	2
 	.global	FtlSysFlush
 	.type	FtlSysFlush, %function
 FtlSysFlush:
-.LFB212:
-	.loc 3 797 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 3 799 0
 	bl	l2p_flush
-.LVL1685:
-	.loc 3 800 0
 	mov	w0, 1
 	bl	FtlEctTblFlush
-.LVL1686:
-	.loc 3 801 0
 	bl	FtlVpcTblFlush
-.LVL1687:
-	.loc 3 803 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE212:
 	.size	FtlSysFlush, .-FtlSysFlush
 	.section	.text.sftl_deinit,"ax",@progbits
 	.align	2
 	.global	sftl_deinit
 	.type	sftl_deinit, %function
 sftl_deinit:
-.LFB213:
-	.loc 3 806 0
-	.cfi_startproc
-	.loc 3 807 0
 	adrp	x0, .LANCHOR86
 	ldr	w0, [x0, #:lo12:.LANCHOR86]
 	cmp	w0, 1
-	bne	.L1268
-	.loc 3 806 0
+	bne	.L1270
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 3 808 0
 	bl	FtlSysFlush
-.LVL1688:
-	.loc 3 810 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-.L1268:
+.L1270:
 	mov	w0, 0
 	ret
-	.cfi_endproc
-.LFE213:
 	.size	sftl_deinit, .-sftl_deinit
 	.section	.text.FtlDiscard,"ax",@progbits
 	.align	2
 	.global	FtlDiscard
 	.type	FtlDiscard, %function
 FtlDiscard:
-.LFB218:
-	.loc 3 1121 0
-	.cfi_startproc
-.LVL1689:
 	stp	x29, x30, [sp, -80]!
-	.cfi_def_cfa_offset 80
-	.cfi_offset 29, -80
-	.cfi_offset 30, -72
-	.loc 3 1128 0
 	add	w2, w0, w1
-	.loc 3 1121 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -64
-	.cfi_offset 20, -56
 	mov	w19, w1
-	.loc 3 1128 0
 	adrp	x1, .LANCHOR34
-.LVL1690:
-	.loc 3 1121 0
 	stp	x21, x22, [sp, 32]
 	str	x23, [sp, 48]
-	.cfi_offset 21, -48
-	.cfi_offset 22, -40
-	.cfi_offset 23, -32
-	.loc 3 1128 0
 	ldr	w1, [x1, #:lo12:.LANCHOR34]
 	cmp	w2, w1
-	bhi	.L1279
-	.loc 3 1131 0
+	bhi	.L1281
 	cmp	w19, 31
-	bhi	.L1273
-.LVL1691:
-.L1287:
-	.loc 3 1164 0
+	bhi	.L1275
+.L1289:
 	mov	w0, 0
-.L1271:
-	.loc 3 1165 0
+.L1273:
 	ldp	x19, x20, [sp, 16]
-.LVL1692:
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 23
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1693:
-.L1273:
-	.cfi_restore_state
-	.loc 3 1136 0
+.L1275:
 	adrp	x21, .LANCHOR12
 	ldrh	w1, [x21, #:lo12:.LANCHOR12]
 	udiv	w20, w0, w1
-.LVL1694:
-	.loc 3 1137 0
 	msub	w0, w1, w20, w0
-.LVL1695:
-	.loc 3 1138 0
 	ands	w0, w0, 65535
-	beq	.L1274
-.LVL1696:
-	.loc 3 1139 0
+	beq	.L1276
 	sub	w1, w1, w0
-.LVL1697:
-	.loc 3 1140 0
 	add	w20, w20, 1
-.LVL1698:
-	.loc 3 1139 0
 	cmp	w1, w19
 	csel	w1, w1, w19, ls
-	.loc 3 1141 0
 	sub	w19, w19, w1, uxth
-.LVL1699:
-.L1274:
-	.loc 3 1148 0
+.L1276:
 	adrp	x22, .LANCHOR167
-	.loc 3 1149 0
 	adrp	x23, .LANCHOR63
-	.loc 3 1148 0
 	add	x22, x22, :lo12:.LANCHOR167
-	.loc 3 1149 0
 	add	x23, x23, :lo12:.LANCHOR63
-	.loc 3 1144 0
 	mov	w0, -1
-.LVL1700:
 	str	w0, [x29, 76]
-.LVL1701:
-.L1275:
-	.loc 3 1145 0
+.L1277:
 	ldrh	w0, [x21, #:lo12:.LANCHOR12]
 	cmp	w19, w0
-	bcs	.L1277
-	.loc 3 1158 0
+	bcs	.L1279
 	adrp	x0, .LANCHOR167
 	ldr	w1, [x0, #:lo12:.LANCHOR167]
 	cmp	w1, 32
-	bls	.L1287
-	.loc 3 1160 0
+	bls	.L1289
 	str	wzr, [x0, #:lo12:.LANCHOR167]
-	.loc 3 1161 0
 	bl	l2p_flush
-.LVL1702:
-	.loc 3 1162 0
 	bl	FtlVpcTblFlush
-.LVL1703:
-	b	.L1287
-.L1277:
-	.loc 3 1146 0
+	b	.L1289
+.L1279:
 	mov	w2, 0
 	add	x1, x29, 72
 	mov	w0, w20
 	bl	log2phys
-.LVL1704:
-	.loc 3 1147 0
 	ldr	w0, [x29, 72]
 	cmn	w0, #1
-	beq	.L1276
-	.loc 3 1148 0
+	beq	.L1278
 	ldr	w0, [x22]
-	.loc 3 1150 0
 	mov	w2, 1
 	add	x1, x29, 76
-	.loc 3 1148 0
 	add	w0, w0, 1
 	str	w0, [x22]
-	.loc 3 1149 0
 	ldr	w0, [x23]
 	add	w0, w0, 1
 	str	w0, [x23]
-	.loc 3 1150 0
 	mov	w0, w20
 	bl	log2phys
-.LVL1705:
-	.loc 3 1151 0
 	ldr	w0, [x29, 72]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL1706:
-	.loc 3 1152 0
 	bl	decrement_vpc_count
-.LVL1707:
-.L1276:
-	.loc 3 1155 0
+.L1278:
 	ldrh	w0, [x21, #:lo12:.LANCHOR12]
-	.loc 3 1154 0
 	add	w20, w20, 1
-.LVL1708:
-	.loc 3 1155 0
 	sub	w19, w19, w0
-.LVL1709:
-	b	.L1275
-.LVL1710:
-.L1279:
-	.loc 3 1129 0
+	b	.L1277
+.L1281:
 	mov	w0, -1
-.LVL1711:
-	b	.L1271
-	.cfi_endproc
-.LFE218:
+	b	.L1273
 	.size	FtlDiscard, .-FtlDiscard
 	.section	.text.FtlVpcCheckAndModify,"ax",@progbits
 	.align	2
 	.global	FtlVpcCheckAndModify
 	.type	FtlVpcCheckAndModify, %function
 FtlVpcCheckAndModify:
-.LFB289:
-	.loc 2 2242 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -96]!
-	.cfi_def_cfa_offset 96
-	.cfi_offset 29, -96
-	.cfi_offset 30, -88
-	.loc 2 2247 0
 	adrp	x1, .LANCHOR168
 	adrp	x0, .LC94
 	add	x1, x1, :lo12:.LANCHOR168
-	.loc 2 2242 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.loc 2 2247 0
 	add	x0, x0, :lo12:.LC94
-	.loc 2 2242 0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 19, -80
-	.cfi_offset 20, -72
-	.cfi_offset 21, -64
-	.cfi_offset 22, -56
-	.loc 2 2248 0
 	adrp	x20, .LANCHOR128
-	.loc 2 2242 0
 	stp	x23, x24, [sp, 48]
-	.loc 2 2249 0
 	adrp	x21, .LANCHOR61
-	.loc 2 2242 0
 	str	x25, [sp, 64]
-	.cfi_offset 23, -48
-	.cfi_offset 24, -40
-	.cfi_offset 25, -32
-	.loc 2 2247 0
 	bl	printf
-.LVL1712:
-	.loc 2 2248 0
 	adrp	x0, .LANCHOR6
-	.loc 2 2249 0
 	mov	w19, 0
 	add	x21, x21, :lo12:.LANCHOR61
-	.loc 2 2248 0
 	mov	w1, 0
 	ldrh	w2, [x0, #:lo12:.LANCHOR6]
 	ldr	x0, [x20, #:lo12:.LANCHOR128]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL1713:
-.L1289:
-	.loc 2 2249 0 discriminator 1
+.L1291:
 	ldr	w0, [x21]
 	cmp	w19, w0
-	bcc	.L1291
-	.loc 2 2256 0 discriminator 1
+	bcc	.L1293
 	adrp	x22, .LANCHOR5
-	.loc 2 2259 0 discriminator 1
 	adrp	x23, .LC105
-	.loc 2 2256 0 discriminator 1
 	add	x22, x22, :lo12:.LANCHOR5
-	.loc 2 2259 0 discriminator 1
 	add	x23, x23, :lo12:.LC105
 	mov	w19, 0
-.LVL1714:
-	.loc 2 2257 0 discriminator 1
 	adrp	x25, .LANCHOR42
 	mov	w24, 65535
-.L1292:
-.LVL1715:
-	.loc 2 2256 0 discriminator 1
+.L1294:
 	ldrh	w0, [x22]
 	cmp	w0, w19
-	bhi	.L1296
-	.loc 2 2268 0
+	bhi	.L1298
 	ldp	x19, x20, [sp, 16]
-.LVL1716:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 96
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 25
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1717:
-.L1291:
-	.cfi_restore_state
-	.loc 2 2250 0
+.L1293:
 	mov	w2, 0
 	add	x1, x29, 92
 	mov	w0, w19
 	bl	log2phys
-.LVL1718:
-	.loc 2 2251 0
 	ldr	w0, [x29, 92]
 	cmn	w0, #1
-	beq	.L1290
-	.loc 2 2252 0
+	beq	.L1292
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL1719:
-	.loc 2 2253 0
 	ldr	x2, [x20, #:lo12:.LANCHOR128]
 	ubfiz	x0, x0, 1, 16
-.LVL1720:
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-.L1290:
-	.loc 2 2249 0 discriminator 2
+.L1292:
 	add	w19, w19, 1
-.LVL1721:
-	b	.L1289
-.LVL1722:
-.L1296:
-	.loc 2 2257 0
+	b	.L1291
+.L1298:
 	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	ubfiz	x21, x19, 1, 16
 	ldrh	w2, [x0, x21]
 	ldr	x0, [x20, #:lo12:.LANCHOR128]
 	ldrh	w3, [x0, x21]
 	cmp	w2, w3
-	beq	.L1294
-	.loc 2 2257 0 is_stmt 0 discriminator 1
+	beq	.L1296
 	cmp	w2, w24
-	beq	.L1294
-	.loc 2 2259 0 is_stmt 1
+	beq	.L1296
 	mov	w1, w19
 	mov	x0, x23
 	bl	printf
-.LVL1723:
-	.loc 2 2260 0
 	adrp	x0, .LANCHOR51
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w19
-	beq	.L1294
-	.loc 2 2260 0 is_stmt 0 discriminator 1
+	beq	.L1296
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w19
-	beq	.L1294
-	.loc 2 2260 0 discriminator 2
+	beq	.L1296
 	adrp	x0, .LANCHOR52
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
-	beq	.L1294
-	.loc 2 2261 0 is_stmt 1
+	beq	.L1296
 	ldr	x0, [x20, #:lo12:.LANCHOR128]
 	ldrh	w1, [x0, x21]
 	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	strh	w1, [x0, x21]
-	.loc 2 2262 0
 	mov	w0, w19
 	bl	update_vpc_list
-.LVL1724:
-	.loc 2 2263 0
 	bl	l2p_flush
-.LVL1725:
-	.loc 2 2264 0
 	bl	FtlVpcTblFlush
-.LVL1726:
-.L1294:
-	.loc 2 2256 0 discriminator 2
+.L1296:
 	add	w19, w19, 1
-.LVL1727:
 	and	w19, w19, 65535
-.LVL1728:
-	b	.L1292
-	.cfi_endproc
-.LFE289:
+	b	.L1294
 	.size	FtlVpcCheckAndModify, .-FtlVpcCheckAndModify
 	.section	.text.allocate_new_data_superblock,"ax",@progbits
 	.align	2
 	.global	allocate_new_data_superblock
 	.type	allocate_new_data_superblock, %function
 allocate_new_data_superblock:
-.LFB299:
-	.loc 2 2682 0
-	.cfi_startproc
-.LVL1729:
 	stp	x29, x30, [sp, -48]!
-	.cfi_def_cfa_offset 48
-	.cfi_offset 29, -48
-	.cfi_offset 30, -40
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
-	.loc 2 2683 0
 	ldrh	w19, [x0]
-.LVL1730:
-	.loc 2 2682 0
 	str	x21, [sp, 32]
-	.cfi_offset 21, -16
-	.loc 2 2682 0
 	mov	x21, x0
-	.loc 2 2684 0
 	adrp	x0, .LANCHOR5
-.LVL1731:
 	ldrh	w0, [x0, #:lo12:.LANCHOR5]
 	cmp	w0, w19
-	bcs	.L1302
-	.loc 2 2684 0 is_stmt 0 discriminator 1
+	bcs	.L1304
 	adrp	x1, .LANCHOR169
 	adrp	x0, .LC1
 	mov	w2, 2684
 	add	x1, x1, :lo12:.LANCHOR169
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1732:
-.L1302:
-	.loc 2 2686 0 is_stmt 1
+.L1304:
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1303
-	.loc 2 2687 0
+	beq	.L1305
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x19, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1304
-	.loc 2 2688 0
+	cbz	w0, .L1306
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-.LVL1733:
-.L1303:
-	.loc 2 2693 0
+.L1305:
 	adrp	x1, .LANCHOR150
-	.loc 2 2692 0
 	mov	w0, 1
 	strb	w0, [x21, 8]
-	.loc 2 2693 0
 	mov	w2, 65535
 	ldrh	w0, [x1, #:lo12:.LANCHOR150]
 	mov	x20, x1
 	cmp	w0, w2
-	beq	.L1305
-	.loc 2 2694 0
+	beq	.L1307
 	cmp	w19, w0
-	bne	.L1306
-	.loc 2 2694 0 is_stmt 0 discriminator 1
+	bne	.L1308
 	adrp	x2, .LANCHOR42
 	ubfiz	x1, x0, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR42]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1307
-.L1306:
-	.loc 2 2695 0 is_stmt 1
+	cbz	w1, .L1309
+.L1308:
 	bl	update_vpc_list
-.LVL1734:
-.L1307:
-	.loc 2 2696 0
+.L1309:
 	mov	w0, -1
 	strh	w0, [x20, #:lo12:.LANCHOR150]
-.L1305:
-	.loc 2 2698 0
+.L1307:
 	mov	x0, x21
 	bl	allocate_data_superblock
-.LVL1735:
-	.loc 2 2699 0
 	bl	l2p_flush
-.LVL1736:
-	.loc 2 2700 0
 	mov	w0, 0
 	bl	FtlEctTblFlush
-.LVL1737:
-	.loc 2 2701 0
 	bl	FtlVpcTblFlush
-.LVL1738:
-	.loc 2 2703 0
 	ldr	x21, [sp, 32]
-.LVL1739:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-.LVL1740:
 	ldp	x29, x30, [sp], 48
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 21
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1741:
-.L1304:
-	.cfi_restore_state
-	.loc 2 2690 0
+.L1306:
 	mov	w0, w19
 	bl	INSERT_FREE_LIST
-.LVL1742:
-	b	.L1303
-	.cfi_endproc
-.LFE299:
+	b	.L1305
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
 	.section	.text.FtlProgPages,"ax",@progbits
 	.align	2
 	.global	FtlProgPages
 	.type	FtlProgPages, %function
 FtlProgPages:
-.LFB215:
-	.loc 3 904 0
-	.cfi_startproc
-.LVL1743:
 	stp	x29, x30, [sp, -96]!
-	.cfi_def_cfa_offset 96
-	.cfi_offset 29, -96
-	.cfi_offset 30, -88
-	.loc 3 911 0
 	mov	w2, 0
-.LVL1744:
-	.loc 3 904 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -80
-	.cfi_offset 20, -72
 	mov	x19, x3
 	stp	x23, x24, [sp, 48]
 	add	x20, x0, 4
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 23, -48
-	.cfi_offset 24, -40
-	.cfi_offset 21, -64
-	.cfi_offset 22, -56
 	mov	w21, w1
 	str	x25, [sp, 64]
-	.cfi_offset 25, -32
 	ubfiz	x21, x21, 5, 32
 	add	x21, x21, 4
-	.loc 3 918 0
 	adrp	x24, .LANCHOR19
-	.loc 3 911 0
 	ldrb	w3, [x3, 9]
-.LVL1745:
-	.loc 3 926 0
 	adrp	x23, .LANCHOR81
 	add	x21, x0, x21
-	.loc 3 918 0
 	add	x24, x24, :lo12:.LANCHOR19
-	.loc 3 926 0
 	add	x23, x23, :lo12:.LANCHOR81
-	.loc 3 911 0
 	bl	FlashProgPages
-.LVL1746:
-.L1313:
-	.loc 3 913 0 discriminator 1
+.L1315:
 	cmp	x20, x21
-	beq	.L1320
+	beq	.L1322
 	sub	x22, x20, #4
-	.loc 3 917 0
 	adrp	x25, .LANCHOR42
-	b	.L1321
-.L1316:
-	.loc 3 915 0
+	b	.L1323
+.L1318:
 	ldr	w0, [x20]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL1747:
-	.loc 3 916 0
 	ldrh	w1, [x19]
 	cmp	w1, w0, uxth
-	bne	.L1314
-	.loc 3 917 0
+	bne	.L1316
 	ldr	x2, [x25, #:lo12:.LANCHOR42]
 	ubfiz	x1, x1, 1, 16
 	ldrh	w3, [x19, 4]
 	ldrh	w0, [x2, x1]
-.LVL1748:
 	sub	w0, w0, w3
 	strh	w0, [x2, x1]
-	.loc 3 919 0
 	strb	wzr, [x19, 6]
-	.loc 3 918 0
 	ldrh	w0, [x24]
 	strh	w0, [x19, 2]
-	.loc 3 920 0
 	strh	wzr, [x19, 4]
-.L1314:
-	.loc 3 922 0
+.L1316:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1315
-	.loc 3 923 0
+	cbnz	w0, .L1317
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.LVL1749:
-.L1315:
-	.loc 3 926 0
+.L1317:
 	ldr	w0, [x23, 96]
 	add	w0, w0, 1
 	str	w0, [x23, 96]
-	.loc 3 927 0
 	ldr	w0, [x20]
 	lsr	w0, w0, 10
 	bl	FtlGcMarkBadPhyBlk
-.LVL1750:
-	.loc 3 928 0
 	mov	x0, x19
 	bl	get_new_active_ppa
-.LVL1751:
-	.loc 3 929 0
 	str	w0, [x20]
-	.loc 3 930 0
 	mov	w2, 0
-	.loc 3 928 0
 	str	w0, [x29, 92]
-	.loc 3 930 0
 	mov	w1, 1
 	ldrb	w3, [x19, 9]
 	mov	x0, x22
 	bl	FlashProgPages
-.LVL1752:
-.L1321:
-	.loc 3 914 0
+.L1323:
 	ldr	w0, [x20, -4]
 	cmn	w0, #1
-	beq	.L1316
-	.loc 3 933 0
+	beq	.L1318
 	adrp	x0, .LANCHOR3
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1317
-	.loc 3 933 0 is_stmt 0 discriminator 1
+	bcc	.L1319
 	adrp	x1, .LANCHOR170
 	adrp	x0, .LC1
 	mov	w2, 933
 	add	x1, x1, :lo12:.LANCHOR170
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1753:
-.L1317:
-	.loc 3 934 0 is_stmt 1
+.L1319:
 	add	x1, x29, 96
 	ldr	w0, [x22, 4]
-	.loc 3 935 0
 	mov	w2, 1
-	.loc 3 934 0
 	str	w0, [x1, -4]!
-	.loc 3 935 0
 	ldr	w0, [x22, 24]
 	bl	log2phys
-.LVL1754:
-	.loc 3 937 0
 	ldr	x0, [x22, 16]
 	ldr	w3, [x0, 12]
-.LVL1755:
-	.loc 3 939 0
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
-.LVL1756:
 	and	w1, w0, 65535
 	mov	w22, w1
-.LVL1757:
-	.loc 3 940 0
 	cmn	w3, #1
-	beq	.L1318
-	.loc 3 942 0
+	beq	.L1320
 	adrp	x2, .LANCHOR42
 	ubfiz	x0, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR42]
 	ldrh	w0, [x2, x0]
-	cbnz	w0, .L1319
-	.loc 3 943 0
+	cbnz	w0, .L1321
 	adrp	x0, .LC106
 	mov	w2, 0
 	add	x0, x0, :lo12:.LC106
 	bl	printf
-.LVL1758:
-.L1319:
-	.loc 3 944 0
+.L1321:
 	mov	w0, w22
 	bl	decrement_vpc_count
-.LVL1759:
-.L1318:
-	add	x20, x20, 32
-	b	.L1313
-.LVL1760:
 .L1320:
-	.loc 3 948 0
+	add	x20, x20, 32
+	b	.L1315
+.L1322:
 	adrp	x0, .LANCHOR3
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1312
-	.loc 3 948 0 is_stmt 0 discriminator 1
+	bcc	.L1314
 	adrp	x1, .LANCHOR170
 	adrp	x0, .LC1
 	mov	w2, 948
 	add	x1, x1, :lo12:.LANCHOR170
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1761:
-.L1312:
-	.loc 3 949 0 is_stmt 1
+.L1314:
 	ldp	x19, x20, [sp, 16]
-.LVL1762:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 96
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 25
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE215:
 	.size	FtlProgPages, .-FtlProgPages
 	.section	.text.FtlGcFreeTempBlock,"ax",@progbits
 	.align	2
 	.global	FtlGcFreeTempBlock
 	.type	FtlGcFreeTempBlock, %function
 FtlGcFreeTempBlock:
-.LFB308:
-	.loc 5 112 0
-	.cfi_startproc
-.LVL1763:
 	stp	x29, x30, [sp, -112]!
-	.cfi_def_cfa_offset 112
-	.cfi_offset 29, -112
-	.cfi_offset 30, -104
-	.loc 5 119 0
 	mov	w2, 65535
-	.loc 5 112 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -96
-	.cfi_offset 20, -88
-	.loc 5 119 0
 	adrp	x19, .LANCHOR53
-	.loc 5 112 0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -80
-	.cfi_offset 22, -72
-	.loc 5 115 0
 	adrp	x21, .LANCHOR19
-	.loc 5 119 0
 	ldrh	w20, [x19, #:lo12:.LANCHOR53]
-	.loc 5 112 0
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	.loc 5 119 0
 	cmp	w20, w2
-	.loc 5 112 0
 	str	x27, [sp, 80]
-	.cfi_offset 23, -64
-	.cfi_offset 24, -56
-	.cfi_offset 25, -48
-	.cfi_offset 26, -40
-	.cfi_offset 27, -32
-	.loc 5 115 0
 	ldrh	w1, [x21, #:lo12:.LANCHOR19]
-.LVL1764:
-	.loc 5 119 0
-	bne	.L1328
-.LVL1765:
-.L1338:
-	.loc 5 152 0
+	bne	.L1330
+.L1340:
 	adrp	x0, .LANCHOR152
-	.loc 5 153 0
 	ldrh	w2, [x19, #:lo12:.LANCHOR53]
 	mov	w1, 65535
-	.loc 5 152 0
 	str	wzr, [x0, #:lo12:.LANCHOR152]
-	.loc 5 153 0
 	cmp	w2, w1
 	add	x0, x19, :lo12:.LANCHOR53
-	bne	.L1351
-.L1354:
-	.loc 5 198 0
+	bne	.L1353
+.L1356:
 	mov	w0, 0
-.L1327:
-	.loc 5 199 0
+.L1329:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 112
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1766:
-.L1328:
-	.cfi_restore_state
-	.loc 5 121 0
-	cbz	w0, .L1331
-.LVL1767:
-	.loc 5 123 0
+.L1330:
+	cbz	w0, .L1333
 	adrp	x0, .LANCHOR156
-.LVL1768:
 	ldrh	w3, [x0, #:lo12:.LANCHOR156]
 	cmp	w3, w2
-	beq	.L1332
-.L1333:
-	.loc 5 122 0
+	beq	.L1334
+.L1335:
 	mov	w1, 2
-.LVL1769:
-.L1331:
-	.loc 5 131 0
+.L1333:
 	add	x0, x19, :lo12:.LANCHOR53
 	bl	FtlGcScanTempBlk
-.LVL1770:
 	str	w0, [x29, 108]
-	.loc 5 132 0
 	cmn	w0, #1
-	beq	.L1334
-	.loc 5 135 0
+	beq	.L1336
 	adrp	x0, .LANCHOR43
 	ubfiz	x20, x20, 1, 16
-.LVL1771:
 	ldr	x1, [x0, #:lo12:.LANCHOR43]
 	ldrh	w0, [x1, x20]
 	cmp	w0, 4
-	bls	.L1335
-	.loc 5 136 0
+	bls	.L1337
 	sub	w0, w0, #5
 	strh	w0, [x1, x20]
-	.loc 5 137 0
 	mov	w0, 1
 	bl	FtlEctTblFlush
-.LVL1772:
-.L1335:
-	.loc 5 139 0
+.L1337:
 	adrp	x0, .LANCHOR152
 	mov	x19, x0
 	ldr	w1, [x0, #:lo12:.LANCHOR152]
-	cbnz	w1, .L1336
-	.loc 5 140 0
+	cbnz	w1, .L1338
 	adrp	x0, .LANCHOR81
 	add	x0, x0, :lo12:.LANCHOR81
 	ldr	w1, [x0, 96]
 	add	w1, w1, 1
 	str	w1, [x0, 96]
-	.loc 5 141 0
 	ldr	w0, [x29, 108]
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.LVL1773:
-	.loc 5 142 0
 	bl	FtlBbmTblFlush
-.LVL1774:
-.L1336:
-	.loc 5 144 0
+.L1338:
 	str	wzr, [x19, #:lo12:.LANCHOR152]
-.L1347:
-	.loc 5 149 0
+.L1349:
 	mov	w0, 1
-	b	.L1327
-.LVL1775:
-.L1332:
-	.loc 5 124 0
+	b	.L1329
+.L1334:
 	strh	wzr, [x0, #:lo12:.LANCHOR156]
-	.loc 5 125 0
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 17
-	bhi	.L1333
-	b	.L1331
-.LVL1776:
-.L1334:
-	.loc 5 148 0
+	bhi	.L1335
+	b	.L1333
+.L1336:
 	adrp	x0, .LANCHOR156
 	ldrh	w1, [x0, #:lo12:.LANCHOR156]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1347
-	b	.L1338
-.LVL1777:
-.L1351:
-	.loc 5 162 0
+	bne	.L1349
+	b	.L1340
+.L1353:
 	ldrb	w0, [x0, 7]
 	adrp	x20, .LANCHOR97
 	ldrh	w2, [x21, #:lo12:.LANCHOR19]
 	ldrh	w1, [x20, #:lo12:.LANCHOR97]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L1339
-	.loc 5 162 0 is_stmt 0 discriminator 1
+	beq	.L1341
 	adrp	x1, .LANCHOR171
 	adrp	x0, .LC1
 	mov	w2, 162
 	add	x1, x1, :lo12:.LANCHOR171
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1778:
-.L1339:
-	.loc 5 163 0 is_stmt 1
+.L1341:
 	add	x0, x19, :lo12:.LANCHOR53
 	adrp	x23, .LANCHOR42
 	ldrh	w3, [x21, #:lo12:.LANCHOR19]
-	.loc 5 168 0
 	adrp	x25, .LANCHOR61
-	.loc 5 163 0
 	ldrh	w2, [x19, #:lo12:.LANCHOR53]
-	.loc 5 168 0
 	adrp	x26, .LANCHOR171
-	.loc 5 163 0
 	ldrb	w0, [x0, 7]
-	.loc 5 168 0
 	add	x25, x25, :lo12:.LANCHOR61
-	.loc 5 163 0
 	ldr	x1, [x23, #:lo12:.LANCHOR42]
-	.loc 5 168 0
 	add	x26, x26, :lo12:.LANCHOR171
-	.loc 5 165 0
 	mov	w21, 0
-	.loc 5 163 0
 	mul	w0, w0, w3
 	strh	w0, [x1, x2, lsl 1]
-	.loc 5 164 0
 	adrp	x1, .LANCHOR67
 	ldrh	w0, [x20, #:lo12:.LANCHOR97]
 	ldr	w2, [x1, #:lo12:.LANCHOR67]
 	add	w0, w0, w2
 	str	w0, [x1, #:lo12:.LANCHOR67]
-.LVL1779:
-.L1340:
-	.loc 5 165 0 discriminator 1
+.L1342:
 	ldrh	w0, [x20, #:lo12:.LANCHOR97]
 	cmp	w0, w21
-	bhi	.L1344
-	.loc 5 181 0
+	bhi	.L1346
 	mov	w0, -1
 	bl	decrement_vpc_count
-.LVL1780:
-	.loc 5 182 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR53]
 	ldr	x2, [x23, #:lo12:.LANCHOR42]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1345
-	.loc 5 183 0
+	cbz	w1, .L1347
 	bl	INSERT_DATA_LIST
-.LVL1781:
-.L1346:
-	.loc 5 188 0
+.L1348:
 	adrp	x0, .LANCHOR95
-	.loc 5 186 0
 	mov	w21, -1
-.LVL1782:
-	.loc 5 187 0
 	strh	wzr, [x20, #:lo12:.LANCHOR97]
-	.loc 5 186 0
 	strh	w21, [x19, #:lo12:.LANCHOR53]
-	.loc 5 188 0
 	strh	wzr, [x0, #:lo12:.LANCHOR95]
-	.loc 5 189 0
 	bl	l2p_flush
-.LVL1783:
-	.loc 5 190 0
 	bl	FtlVpcTblFlush
-.LVL1784:
-	.loc 5 191 0
 	adrp	x0, .LANCHOR48
 	ldrh	w1, [x0, #:lo12:.LANCHOR48]
 	adrp	x0, .LANCHOR78
 	ldrh	w0, [x0, #:lo12:.LANCHOR78]
 	add	w0, w0, w0, lsl 1
 	cmp	w1, w0, lsr 2
-	ble	.L1354
-	.loc 5 192 0
+	ble	.L1356
 	adrp	x0, .LANCHOR80
-	.loc 5 193 0
 	mov	w1, 20
-	.loc 5 192 0
 	strh	w21, [x0, #:lo12:.LANCHOR80]
-	.loc 5 193 0
 	adrp	x0, .LANCHOR82
 	strh	w1, [x0, #:lo12:.LANCHOR82]
-	b	.L1354
-.LVL1785:
-.L1344:
-	.loc 5 166 0
+	b	.L1356
+.L1346:
 	adrp	x0, .LANCHOR98
 	mov	w24, 12
 	ldr	x27, [x0, #:lo12:.LANCHOR98]
 	umull	x24, w21, w24
-	.loc 5 168 0
 	ldr	w0, [x25]
-	.loc 5 166 0
 	add	x22, x27, x24
-.LVL1786:
-	.loc 5 168 0
 	ldr	w1, [x22, 8]
 	cmp	w1, w0
-	bcc	.L1341
-	.loc 5 168 0 is_stmt 0 discriminator 1
+	bcc	.L1343
 	adrp	x0, .LC1
 	mov	w2, 168
 	mov	x1, x26
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1787:
-.L1341:
-	.loc 5 169 0 is_stmt 1
+.L1343:
 	ldr	w0, [x22, 8]
 	add	x1, x29, 108
 	mov	w2, 0
 	bl	log2phys
-.LVL1788:
-	.loc 5 170 0
 	ldr	w0, [x27, x24]
 	ldr	w1, [x29, 108]
 	cmp	w0, w1
-	bne	.L1342
-	.loc 5 171 0
+	bne	.L1344
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL1789:
 	mov	w24, w0
-.LVL1790:
-	.loc 5 172 0
 	ldr	w0, [x22, 8]
-.LVL1791:
 	mov	w2, 1
 	add	x1, x22, 4
 	bl	log2phys
-.LVL1792:
-	.loc 5 173 0
 	mov	w0, w24
-.LVL1793:
-.L1353:
-	.loc 5 177 0
+.L1355:
 	bl	decrement_vpc_count
-.LVL1794:
-.L1343:
-	.loc 5 165 0 discriminator 2
+.L1345:
 	add	w21, w21, 1
-.LVL1795:
 	and	w21, w21, 65535
-.LVL1796:
-	b	.L1340
-.L1342:
-	.loc 5 175 0
+	b	.L1342
+.L1344:
 	ldr	w0, [x22, 4]
 	cmp	w1, w0
-	beq	.L1343
-	.loc 5 177 0
+	beq	.L1345
 	ldrh	w0, [x19, #:lo12:.LANCHOR53]
-	b	.L1353
-.LVL1797:
-.L1345:
-	.loc 5 185 0
+	b	.L1355
+.L1347:
 	bl	INSERT_FREE_LIST
-.LVL1798:
-	b	.L1346
-	.cfi_endproc
-.LFE308:
+	b	.L1348
 	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
 	.section	.text.FtlGcPageRecovery,"ax",@progbits
 	.align	2
 	.global	FtlGcPageRecovery
 	.type	FtlGcPageRecovery, %function
 FtlGcPageRecovery:
-.LFB311:
-	.loc 5 289 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -16
-	.cfi_offset 20, -8
-	.loc 5 290 0
 	adrp	x20, .LANCHOR19
 	adrp	x19, .LANCHOR53
 	add	x19, x19, :lo12:.LANCHOR53
 	ldrh	w1, [x20, #:lo12:.LANCHOR19]
 	mov	x0, x19
 	bl	FtlGcScanTempBlk
-.LVL1799:
-	.loc 5 291 0
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR19]
 	cmp	w1, w0
-	bcc	.L1355
-.LBB321:
-.LBB322:
-	.loc 5 293 0
+	bcc	.L1357
 	adrp	x0, .LANCHOR144
 	add	x0, x0, :lo12:.LANCHOR144
 	bl	FtlMapBlkWriteDump_data
-.LVL1800:
-	.loc 5 294 0
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
-.LVL1801:
-	.loc 5 295 0
 	adrp	x0, .LANCHOR152
 	str	wzr, [x0, #:lo12:.LANCHOR152]
-.L1355:
-.LBE322:
-.LBE321:
-	.loc 5 297 0
+.L1357:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE311:
 	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
 	.section	.text.FtlPowerLostRecovery,"ax",@progbits
 	.align	2
 	.global	FtlPowerLostRecovery
 	.type	FtlPowerLostRecovery, %function
 FtlPowerLostRecovery:
-.LFB283:
-	.loc 2 2081 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 2 2082 0
 	adrp	x0, .LANCHOR162
-	.loc 2 2081 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	str	x19, [sp, 16]
-	.cfi_offset 19, -16
-	.loc 2 2084 0
 	adrp	x19, .LANCHOR51
 	add	x19, x19, :lo12:.LANCHOR51
-	.loc 2 2082 0
 	str	wzr, [x0, #:lo12:.LANCHOR162]
-	.loc 2 2084 0
 	mov	x0, x19
 	bl	FtlRecoverySuperblock
-.LVL1802:
-	.loc 2 2085 0
 	mov	x0, x19
-	.loc 2 2086 0
 	adrp	x19, .LANCHOR52
-	.loc 2 2085 0
 	bl	FtlSlcSuperblockCheck
-.LVL1803:
-	.loc 2 2086 0
 	add	x19, x19, :lo12:.LANCHOR52
 	mov	x0, x19
 	bl	FtlRecoverySuperblock
-.LVL1804:
-	.loc 2 2087 0
 	mov	x0, x19
 	bl	FtlSlcSuperblockCheck
-.LVL1805:
-	.loc 2 2088 0
 	bl	FtlGcPageRecovery
-.LVL1806:
-	.loc 2 2089 0
 	mov	w0, -1
 	bl	decrement_vpc_count
-.LVL1807:
-	.loc 2 2091 0
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE283:
 	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
 	.section	.text.Ftl_gc_temp_data_write_back,"ax",@progbits
 	.align	2
 	.global	Ftl_gc_temp_data_write_back
 	.type	Ftl_gc_temp_data_write_back, %function
 Ftl_gc_temp_data_write_back:
-.LFB313:
-	.loc 5 316 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 5 320 0
 	mov	w3, 0
 	mov	w2, 0
-	.loc 5 316 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -16
-	.cfi_offset 20, -8
-	.loc 5 320 0
 	adrp	x19, .LANCHOR89
 	adrp	x20, .LANCHOR121
 	ldr	w1, [x19, #:lo12:.LANCHOR89]
-	.loc 5 321 0
 	add	x19, x19, :lo12:.LANCHOR89
-	.loc 5 320 0
 	ldr	x0, [x20, #:lo12:.LANCHOR121]
 	bl	FlashProgPages
-.LVL1808:
-	.loc 5 321 0
 	mov	w11, 0
-.LVL1809:
-.L1361:
-	.loc 5 321 0 is_stmt 0 discriminator 1
+.L1363:
 	ldr	w1, [x19]
 	cmp	w11, w1
-	bcc	.L1364
-	.loc 5 335 0 is_stmt 1
+	bcc	.L1366
 	ldr	x0, [x20, #:lo12:.LANCHOR121]
 	bl	FtlGcBufFree
-.LVL1810:
-	.loc 5 336 0
 	str	wzr, [x19]
-	.loc 5 337 0
 	adrp	x0, .LANCHOR53+4
 	ldrh	w0, [x0, #:lo12:.LANCHOR53+4]
-	cbnz	w0, .L1365
-	.loc 5 338 0
+	cbnz	w0, .L1367
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
-.LVL1811:
-	b	.L1367
-.LVL1812:
-.L1364:
-	.loc 5 322 0
+	b	.L1369
+.L1366:
 	ldr	x2, [x20, #:lo12:.LANCHOR121]
 	ubfiz	x0, x11, 5, 16
 	add	x1, x2, x0
 	ldr	w2, [x2, x0]
 	cmn	w2, #1
-	bne	.L1362
-	.loc 5 323 0
+	bne	.L1364
 	adrp	x0, .LANCHOR53
 	adrp	x3, .LANCHOR42
 	ldrh	w4, [x0, #:lo12:.LANCHOR53]
 	ldr	x3, [x3, #:lo12:.LANCHOR42]
 	strh	wzr, [x3, x4, lsl 1]
-	.loc 5 324 0
 	strh	w2, [x0, #:lo12:.LANCHOR53]
-	.loc 5 325 0
 	adrp	x0, .LANCHOR81
 	add	x0, x0, :lo12:.LANCHOR81
 	ldr	w2, [x0, 96]
 	add	w2, w2, 1
 	str	w2, [x0, 96]
-	.loc 5 326 0
 	ldr	w0, [x1, 4]
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.LVL1813:
-	.loc 5 327 0
 	bl	FtlBbmTblFlush
-.LVL1814:
-	.loc 5 328 0
 	bl	FtlGcPageVarInit
-.LVL1815:
-.L1367:
-	.loc 5 339 0
+.L1369:
 	mov	w0, 1
-.L1360:
-	.loc 5 342 0
+.L1362:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1816:
-.L1362:
-	.cfi_restore_state
-	.loc 5 331 0 discriminator 2
+.L1364:
 	ldr	x0, [x1, 16]
-.LVL1817:
-	.loc 5 332 0 discriminator 2
 	ldr	w1, [x1, 4]
 	ldp	w2, w0, [x0, 8]
-.LVL1818:
 	bl	FtlGcUpdatePage
-.LVL1819:
-	.loc 5 321 0 discriminator 2
 	add	w11, w11, 1
-.LVL1820:
 	and	w11, w11, 65535
-.LVL1821:
-	b	.L1361
-.LVL1822:
-.L1365:
-	.loc 5 341 0
+	b	.L1363
+.L1367:
 	mov	w0, 0
-	b	.L1360
-	.cfi_endproc
-.LFE313:
+	b	.L1362
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
 	.section	.text.Ftl_get_new_temp_ppa,"ax",@progbits
 	.align	2
 	.global	Ftl_get_new_temp_ppa
 	.type	Ftl_get_new_temp_ppa, %function
 Ftl_get_new_temp_ppa:
-.LFB312:
-	.loc 5 300 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 5 301 0
 	adrp	x0, .LANCHOR53
 	mov	w2, 65535
-	.loc 5 300 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	str	x19, [sp, 16]
-	.cfi_offset 19, -16
 	mov	x19, x0
-	.loc 5 301 0
 	ldrh	w3, [x0, #:lo12:.LANCHOR53]
 	cmp	w3, w2
-	beq	.L1369
+	beq	.L1371
 	add	x1, x0, :lo12:.LANCHOR53
-	.loc 5 301 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x1, 4]
-	cbnz	w0, .L1370
-.L1369:
-	.loc 5 303 0 is_stmt 1
+	cbnz	w0, .L1372
+.L1371:
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
-.LVL1823:
-	.loc 5 304 0
 	add	x0, x19, :lo12:.LANCHOR53
 	strb	wzr, [x0, 8]
-	.loc 5 305 0
 	bl	allocate_data_superblock
-.LVL1824:
-	.loc 5 306 0
 	adrp	x0, .LANCHOR95
 	strh	wzr, [x0, #:lo12:.LANCHOR95]
-	.loc 5 307 0
 	adrp	x0, .LANCHOR97
 	strh	wzr, [x0, #:lo12:.LANCHOR97]
-	.loc 5 308 0
 	bl	l2p_flush
-.LVL1825:
-	.loc 5 309 0
 	mov	w0, 0
 	bl	FtlEctTblFlush
-.LVL1826:
-	.loc 5 310 0
 	bl	FtlVpcTblFlush
-.LVL1827:
-.L1370:
-	.loc 5 312 0
+.L1372:
 	add	x0, x19, :lo12:.LANCHOR53
-	.loc 5 313 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_def_cfa 31, 0
-	.loc 5 312 0
 	b	get_new_active_ppa
-.LVL1828:
-	.cfi_endproc
-.LFE312:
 	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
 	.section	.text.rk_ftl_garbage_collect,"ax",@progbits
 	.align	2
 	.global	rk_ftl_garbage_collect
 	.type	rk_ftl_garbage_collect, %function
 rk_ftl_garbage_collect:
-.LFB319:
-	.loc 5 470 0
-	.cfi_startproc
-.LVL1829:
 	stp	x29, x30, [sp, -192]!
-	.cfi_def_cfa_offset 192
-	.cfi_offset 29, -192
-	.cfi_offset 30, -184
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -160
-	.cfi_offset 22, -152
-	.loc 5 478 0
 	adrp	x22, .LANCHOR117
-	.loc 5 470 0
 	stp	x19, x20, [sp, 16]
-	.loc 5 478 0
 	ldr	w1, [x22, #:lo12:.LANCHOR117]
-.LVL1830:
-	.loc 5 470 0
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 19, -176
-	.cfi_offset 20, -168
-	.cfi_offset 23, -144
-	.cfi_offset 24, -136
-	.cfi_offset 25, -128
-	.cfi_offset 26, -120
-	.cfi_offset 27, -112
-	.cfi_offset 28, -104
-	.loc 5 478 0
-	cbnz	w1, .L1444
-	.loc 5 481 0
+	cbnz	w1, .L1446
 	adrp	x1, .LANCHOR45
 	ldrh	w1, [x1, #:lo12:.LANCHOR45]
 	cmp	w1, 47
-	bls	.L1444
+	bls	.L1446
 	mov	w24, w0
-	.loc 5 485 0
 	adrp	x0, .LANCHOR156
-.LVL1831:
 	ldrh	w1, [x0, #:lo12:.LANCHOR156]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1374
-.L1377:
-.LVL1832:
-.LBB326:
-.LBB327:
-	.loc 5 489 0
+	bne	.L1376
+.L1379:
 	adrp	x0, .LANCHOR100
 	mov	w3, 65535
 	ldrh	w2, [x0, #:lo12:.LANCHOR100]
 	cmp	w2, w3
-	bne	.L1375
-.L1376:
-	.loc 5 496 0
+	bne	.L1377
+.L1378:
 	adrp	x2, .LANCHOR84
-	.loc 5 497 0
 	adrp	x19, .LANCHOR80
 	mov	w20, 65535
-	.loc 5 496 0
 	ldr	w1, [x2, #:lo12:.LANCHOR84]
-	.loc 5 497 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR80]
-	.loc 5 496 0
 	add	w1, w1, 1
 	add	w1, w1, w24, lsl 7
 	str	w1, [x2, #:lo12:.LANCHOR84]
-	.loc 5 497 0
 	cmp	w0, w20
-	bne	.L1378
+	bne	.L1380
 	adrp	x3, .LANCHOR53
 	ldrh	w20, [x3, #:lo12:.LANCHOR53]
 	cmp	w20, w0
-	bne	.L1447
+	bne	.L1449
 	adrp	x0, .LANCHOR99
 	ldrh	w21, [x0, #:lo12:.LANCHOR99]
 	cmp	w21, w20
-	bne	.L1378
-	.loc 5 498 0
+	bne	.L1380
 	adrp	x23, .LANCHOR48
 	mov	w3, 1024
 	ldrh	w0, [x23, #:lo12:.LANCHOR48]
@@ -17933,200 +10109,125 @@ rk_ftl_garbage_collect:
 	mov	w0, 5120
 	csel	w0, w0, w3, cc
 	cmp	w1, w0
-	bls	.L1450
-.LBB328:
-	.loc 5 502 0
+	bls	.L1452
 	adrp	x0, .LANCHOR172
-	.loc 5 501 0
 	str	wzr, [x2, #:lo12:.LANCHOR84]
-	.loc 5 502 0
 	strh	wzr, [x0, #:lo12:.LANCHOR172]
-	.loc 5 503 0
 	bl	GetSwlReplaceBlock
-.LVL1833:
 	and	w20, w0, 65535
-.LVL1834:
-	.loc 5 504 0
 	cmp	w20, w21
-	bne	.L1451
-	.loc 5 505 0
+	bne	.L1453
 	adrp	x5, .LANCHOR83
 	ldrh	w1, [x23, #:lo12:.LANCHOR48]
 	ldrh	w0, [x5, #:lo12:.LANCHOR83]
-.LVL1835:
 	cmp	w1, w0
-	bcs	.L1381
-	.loc 5 506 0
+	bcs	.L1383
 	mov	w0, 64
 	bl	List_get_gc_head_node
-.LVL1836:
 	and	w0, w0, 65535
-.LVL1837:
-	.loc 5 507 0
 	cmp	w0, w20
-	beq	.L1383
-	.loc 5 508 0
+	beq	.L1385
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x0, 1, 16
-.LVL1838:
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x0]
 	cmp	w0, 7
-	bhi	.L1384
-	.loc 5 509 0
+	bhi	.L1386
 	mov	w0, 0
 	bl	List_get_gc_head_node
-.LVL1839:
 	and	w21, w0, 65535
-.LVL1840:
-	.loc 5 510 0
 	mov	w0, 128
 	strh	w0, [x5, #:lo12:.LANCHOR83]
-	.loc 5 520 0
 	cmp	w21, w20
-	bne	.L1380
-.LVL1841:
-.L1383:
-	.loc 5 523 0
+	bne	.L1382
+.L1385:
 	bl	FtlGcReFreshBadBlk
-.LVL1842:
-.L1378:
-.LBE328:
-	.loc 5 527 0
+.L1380:
 	cmp	w24, 0
 	mov	w0, 65535
 	ccmp	w20, w0, 0, eq
-	bne	.L1386
-	.loc 5 528 0
+	bne	.L1388
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 24
-	bhi	.L1452
+	bhi	.L1454
 	adrp	x1, .LANCHOR19
-	.loc 5 530 0
 	cmp	w0, 16
-	.loc 5 531 0
 	ldrh	w21, [x1, #:lo12:.LANCHOR19]
-	.loc 5 530 0
-	bls	.L1388
-	.loc 5 531 0
+	bls	.L1390
 	lsr	w21, w21, 5
-.LVL1843:
-.L1387:
-	.loc 5 539 0
+.L1389:
 	adrp	x2, .LANCHOR82
 	mov	x3, x2
 	ldrh	w1, [x2, #:lo12:.LANCHOR82]
 	cmp	w1, w0
-	bcs	.L1391
-	.loc 5 540 0
+	bcs	.L1393
 	adrp	x0, .LANCHOR53
 	mov	w1, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w1
-	bne	.L1392
+	bne	.L1394
 	adrp	x1, .LANCHOR99
 	ldrh	w1, [x1, #:lo12:.LANCHOR99]
 	cmp	w1, w0
-	bne	.L1392
-	.loc 5 542 0
+	bne	.L1394
 	adrp	x0, .LANCHOR172
 	ldrh	w0, [x0, #:lo12:.LANCHOR172]
-	cbnz	w0, .L1393
+	cbnz	w0, .L1395
 	adrp	x1, .LANCHOR61
 	adrp	x4, .LANCHOR59
 	ldr	w1, [x1, #:lo12:.LANCHOR61]
 	ldr	w4, [x4, #:lo12:.LANCHOR59]
 	add	w1, w1, w1, lsl 1
 	cmp	w4, w1, lsr 2
-	bcs	.L1394
-.L1393:
-	.loc 5 543 0
+	bcs	.L1396
+.L1395:
 	adrp	x1, .LANCHOR78
 	ldrh	w1, [x1, #:lo12:.LANCHOR78]
 	add	w1, w1, w1, lsl 1
 	asr	w1, w1, 2
 	strh	w1, [x3, #:lo12:.LANCHOR82]
-.L1395:
-	.loc 5 546 0
+.L1397:
 	adrp	x1, .LANCHOR87
 	str	wzr, [x1, #:lo12:.LANCHOR87]
-.LVL1844:
-.L1372:
-.LBE327:
-.LBE326:
-	.loc 5 754 0
+.L1374:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1845:
-.L1374:
-	.cfi_restore_state
-	.loc 5 485 0 discriminator 1
+.L1376:
 	adrp	x1, .LANCHOR53
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	beq	.L1377
-	.loc 5 486 0
+	beq	.L1379
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
-.LVL1846:
-	cbz	w0, .L1377
-	.loc 5 487 0
+	cbz	w0, .L1379
 	mov	w0, 1
-	b	.L1372
-.LVL1847:
-.L1375:
-.LBB331:
-.LBB330:
-	.loc 5 489 0
+	b	.L1374
+.L1377:
 	adrp	x1, .LANCHOR99
 	ldrh	w4, [x1, #:lo12:.LANCHOR99]
 	cmp	w4, w3
-	bne	.L1376
-	.loc 5 490 0
+	bne	.L1378
 	strh	w2, [x1, #:lo12:.LANCHOR99]
-	.loc 5 491 0
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR100]
-	b	.L1376
-.LVL1848:
-.L1384:
-.LBB329:
-	.loc 5 512 0
+	b	.L1378
+.L1386:
 	mov	w0, 64
-.L1476:
-	.loc 5 516 0
+.L1478:
 	strh	w0, [x5, #:lo12:.LANCHOR83]
-	b	.L1383
-.L1381:
+	b	.L1385
+.L1383:
 	mov	w0, 80
-	b	.L1476
-.LVL1849:
-.L1451:
-	.loc 5 504 0
+	b	.L1478
+.L1453:
 	mov	w21, w20
-.LVL1850:
-.L1380:
-	.loc 5 521 0
+.L1382:
 	adrp	x1, .LANCHOR43
 	ubfiz	x0, x21, 1, 32
 	adrp	x3, .LANCHOR82
@@ -18142,261 +10243,179 @@ rk_ftl_garbage_collect:
 	adrp	x0, .LC107
 	add	x0, x0, :lo12:.LC107
 	bl	printf
-.LVL1851:
-	b	.L1383
-.LVL1852:
-.L1447:
-.LBE329:
-	.loc 5 473 0
+	b	.L1385
+.L1449:
 	mov	w20, w0
-	b	.L1378
-.L1450:
+	b	.L1380
+.L1452:
 	mov	w20, w21
-	b	.L1378
-.LVL1853:
-.L1388:
-	.loc 5 532 0
+	b	.L1380
+.L1390:
 	cmp	w0, 12
-	bls	.L1389
-	.loc 5 533 0
+	bls	.L1391
 	lsr	w21, w21, 4
-.LVL1854:
-	b	.L1387
-.LVL1855:
-.L1389:
-	.loc 5 534 0
+	b	.L1389
+.L1391:
 	cmp	w0, 8
-	bls	.L1387
-	.loc 5 535 0
+	bls	.L1389
 	lsr	w21, w21, 2
-.LVL1856:
-	b	.L1387
-.LVL1857:
-.L1452:
-	.loc 5 529 0
+	b	.L1389
+.L1454:
 	mov	w21, 1
-	b	.L1387
-.LVL1858:
-.L1394:
-	.loc 5 545 0
+	b	.L1389
+.L1396:
 	mov	w1, 18
 	strh	w1, [x2, #:lo12:.LANCHOR82]
-	b	.L1395
-.L1392:
-	.loc 5 549 0
+	b	.L1397
+.L1394:
 	adrp	x0, .LANCHOR78
 	ldrh	w0, [x0, #:lo12:.LANCHOR78]
 	add	w0, w0, w0, lsl 1
 	asr	w0, w0, 2
 	strh	w0, [x3, #:lo12:.LANCHOR82]
-.L1391:
-	.loc 5 551 0
+.L1393:
 	adrp	x0, .LANCHOR101
 	ldrh	w0, [x0, #:lo12:.LANCHOR101]
-	cbz	w0, .L1453
-	.loc 5 552 0
+	cbz	w0, .L1455
 	add	w21, w21, 32
-.LVL1859:
 	and	w21, w21, 65535
-.LVL1860:
-.L1453:
-	.loc 5 551 0
+.L1455:
 	mov	w20, 65535
-.LVL1861:
-.L1397:
-	.loc 5 595 0
+.L1399:
 	ldrh	w0, [x19, #:lo12:.LANCHOR80]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L1406
-	.loc 5 596 0
+	bne	.L1408
 	cmp	w20, w0
-	beq	.L1407
-	.loc 5 597 0
+	beq	.L1409
 	strh	w20, [x19, #:lo12:.LANCHOR80]
-.LVL1862:
-.L1408:
-	.loc 5 606 0
+.L1410:
 	add	x0, x19, :lo12:.LANCHOR80
-	.loc 5 607 0
 	mov	w1, 65535
-	.loc 5 606 0
 	strb	wzr, [x0, 8]
-	.loc 5 607 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR80]
 	cmp	w0, w1
-	beq	.L1406
-	.loc 5 608 0
+	beq	.L1408
 	bl	IsBlkInGcList
-.LVL1863:
-	cbz	w0, .L1411
-	.loc 5 609 0
+	cbz	w0, .L1413
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR80]
-.L1411:
-	.loc 5 611 0
+.L1413:
 	ldrh	w1, [x19, #:lo12:.LANCHOR80]
 	mov	w0, 65535
 	add	x23, x19, :lo12:.LANCHOR80
 	cmp	w1, w0
-	beq	.L1406
-	.loc 5 612 0
+	beq	.L1408
 	mov	x0, x23
 	bl	make_superblock
-.LVL1864:
-	.loc 5 615 0
 	adrp	x0, .LANCHOR173
-	.loc 5 616 0
 	ldrh	w1, [x19, #:lo12:.LANCHOR80]
-	.loc 5 613 0
 	strh	wzr, [x23, 2]
-	.loc 5 615 0
 	strh	wzr, [x0, #:lo12:.LANCHOR173]
-	.loc 5 616 0
 	adrp	x0, .LANCHOR42
-	.loc 5 614 0
 	strb	wzr, [x23, 6]
-	.loc 5 616 0
 	ldr	x0, [x0, #:lo12:.LANCHOR42]
 	ldrh	w1, [x0, x1, lsl 1]
 	adrp	x0, .LANCHOR174
 	strh	w1, [x0, #:lo12:.LANCHOR174]
-.L1406:
-	.loc 5 621 0
+.L1408:
 	adrp	x0, .LANCHOR51
 	ldrh	w1, [x19, #:lo12:.LANCHOR80]
 	str	x0, [x29, 136]
 	ldrh	w2, [x0, #:lo12:.LANCHOR51]
 	cmp	w2, w1
-	beq	.L1412
+	beq	.L1414
 	adrp	x0, .LANCHOR52
 	str	x0, [x29, 128]
 	ldrh	w2, [x0, #:lo12:.LANCHOR52]
 	cmp	w2, w1
-	beq	.L1412
-	.loc 5 631 0
+	beq	.L1414
 	adrp	x24, .LANCHOR85
-.LVL1865:
-	.loc 5 653 0
 	add	x0, x24, :lo12:.LANCHOR85
 	str	x0, [x29, 160]
-.L1413:
-	.loc 5 627 0
+.L1415:
 	ldrh	w1, [x19, #:lo12:.LANCHOR80]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1414
-	.loc 5 628 0
+	bne	.L1416
 	adrp	x0, .LANCHOR87
-	.loc 5 641 0
 	adrp	x25, .LANCHOR19
 	add	x25, x25, :lo12:.LANCHOR19
-	.loc 5 628 0
 	str	wzr, [x0, #:lo12:.LANCHOR87]
-.L1415:
-	.loc 5 631 0
+.L1417:
 	ldrh	w5, [x24, #:lo12:.LANCHOR85]
 	add	x7, x24, :lo12:.LANCHOR85
 	mov	w0, w5
 	bl	List_get_gc_head_node
-.LVL1866:
 	and	w6, w0, 65535
 	strh	w6, [x19, #:lo12:.LANCHOR80]
-	.loc 5 632 0
 	mov	w0, 65535
 	cmp	w6, w0
-	bne	.L1416
-	.loc 5 633 0
+	bne	.L1418
 	strh	wzr, [x7]
-	.loc 5 634 0
 	mov	w0, 8
-	b	.L1372
-.LVL1867:
-.L1386:
-	.loc 5 557 0
+	b	.L1374
+.L1388:
 	adrp	x1, .LANCHOR53
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L1456
+	bne	.L1458
 	adrp	x0, .LANCHOR99
 	ldrh	w0, [x0, #:lo12:.LANCHOR99]
 	cmp	w0, w1
-	bne	.L1456
+	bne	.L1458
 	cmp	w20, w0
-	bne	.L1456
+	bne	.L1458
 	ldrh	w0, [x19, #:lo12:.LANCHOR80]
 	cmp	w0, w20
-	beq	.L1398
-.LVL1868:
-.L1456:
-	.loc 5 556 0
+	beq	.L1400
+.L1458:
 	mov	w21, 1
-	b	.L1397
-.LVL1869:
-.L1398:
-	.loc 5 558 0
+	b	.L1399
+.L1400:
 	adrp	x0, .LANCHOR87
-	.loc 5 560 0
 	adrp	x21, .LANCHOR48
 	adrp	x23, .LANCHOR172
-	.loc 5 558 0
 	str	wzr, [x0, #:lo12:.LANCHOR87]
-	.loc 5 560 0
 	adrp	x0, .LANCHOR82
 	ldrh	w6, [x21, #:lo12:.LANCHOR48]
 	mov	x2, x0
 	ldrh	w1, [x0, #:lo12:.LANCHOR82]
 	cmp	w1, w6
-	.loc 5 561 0
 	ldrh	w1, [x23, #:lo12:.LANCHOR172]
-	.loc 5 560 0
-	bcs	.L1399
-	.loc 5 561 0
-	cbnz	w1, .L1400
+	bcs	.L1401
+	cbnz	w1, .L1402
 	adrp	x1, .LANCHOR61
 	adrp	x3, .LANCHOR59
 	ldr	w1, [x1, #:lo12:.LANCHOR61]
 	ldr	w3, [x3, #:lo12:.LANCHOR59]
 	add	w1, w1, w1, lsl 1
 	cmp	w3, w1, lsr 2
-	bcs	.L1401
-.L1400:
-	.loc 5 562 0
+	bcs	.L1403
+.L1402:
 	adrp	x0, .LANCHOR78
 	ldrh	w0, [x0, #:lo12:.LANCHOR78]
 	add	w0, w0, w0, lsl 1
 	asr	w0, w0, 2
 	strh	w0, [x2, #:lo12:.LANCHOR82]
-.LVL1870:
-.L1477:
-	.loc 5 578 0
+.L1479:
 	bl	FtlReadRefresh
-.LVL1871:
-	.loc 5 579 0
 	ldrh	w0, [x23, #:lo12:.LANCHOR172]
-	b	.L1372
-.LVL1872:
-.L1401:
-	.loc 5 564 0
+	b	.L1374
+.L1403:
 	mov	w1, 18
 	strh	w1, [x0, #:lo12:.LANCHOR82]
-	b	.L1477
-.L1399:
-	.loc 5 572 0
-	cbnz	w1, .L1456
-	.loc 5 573 0
+	b	.L1479
+.L1401:
+	cbnz	w1, .L1458
 	adrp	x1, .LANCHOR78
 	ldrh	w5, [x1, #:lo12:.LANCHOR78]
 	add	w1, w5, w5, lsl 1
 	asr	w1, w1, 2
 	strh	w1, [x0, #:lo12:.LANCHOR82]
-	.loc 5 574 0
 	mov	w0, 0
 	bl	List_get_gc_head_node
-.LVL1873:
-	.loc 5 575 0
 	ubfiz	x0, x0, 1, 16
-.LVL1874:
 	adrp	x1, .LANCHOR42
 	adrp	x2, .LANCHOR3
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
@@ -18406,335 +10425,227 @@ rk_ftl_garbage_collect:
 	ldrh	w0, [x0, #:lo12:.LANCHOR20]
 	mul	w0, w0, w2
 	cmp	w1, w0, asr 1
-	ble	.L1404
-	.loc 5 576 0
+	ble	.L1406
 	sub	w5, w5, #1
-	.loc 5 575 0
 	cmp	w6, w5
-	bge	.L1477
-.L1404:
-	.loc 5 584 0
-	cbnz	w1, .L1456
-	.loc 5 585 0
+	bge	.L1479
+.L1406:
+	cbnz	w1, .L1458
 	mov	w0, -1
 	bl	decrement_vpc_count
-.LVL1875:
-	.loc 5 586 0
 	ldrh	w0, [x21, #:lo12:.LANCHOR48]
 	add	w0, w0, 1
-	b	.L1372
-.LVL1876:
-.L1407:
-	.loc 5 598 0
+	b	.L1374
+.L1409:
 	adrp	x0, .LANCHOR99
 	ldrh	w1, [x0, #:lo12:.LANCHOR99]
 	cmp	w1, w20
-	beq	.L1408
-	.loc 5 600 0
+	beq	.L1410
 	adrp	x2, .LANCHOR42
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR42]
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L1409
-	.loc 5 601 0
+	cbnz	w1, .L1411
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR99]
-.L1409:
-	.loc 5 602 0
+.L1411:
 	ldrh	w1, [x0, #:lo12:.LANCHOR99]
 	strh	w1, [x19, #:lo12:.LANCHOR80]
-	.loc 5 603 0
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR99]
-	b	.L1408
-.LVL1877:
-.L1412:
-	.loc 5 622 0
+	b	.L1410
+.L1414:
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR80]
-.LVL1878:
-.L1478:
-	.loc 5 730 0
+.L1480:
 	adrp	x0, .LANCHOR172
 	ldrh	w0, [x0, #:lo12:.LANCHOR172]
-	b	.L1372
-.LVL1879:
-.L1416:
-	.loc 5 636 0
+	b	.L1374
+.L1418:
 	mov	w0, w6
 	bl	IsBlkInGcList
-.LVL1880:
 	add	w5, w5, 1
-	cbz	w0, .L1417
-	.loc 5 637 0
+	cbz	w0, .L1419
 	strh	w5, [x24, #:lo12:.LANCHOR85]
-	b	.L1415
-.L1417:
-	.loc 5 641 0
+	b	.L1417
+.L1419:
 	adrp	x23, .LANCHOR42
 	adrp	x4, .LANCHOR3
 	ldrh	w0, [x25]
 	ubfiz	x1, x6, 1, 16
 	ldr	x2, [x23, #:lo12:.LANCHOR42]
-	.loc 5 640 0
 	and	w5, w5, 65535
-	.loc 5 641 0
 	ldrh	w4, [x4, #:lo12:.LANCHOR3]
-	.loc 5 640 0
 	strh	w5, [x24, #:lo12:.LANCHOR85]
-	.loc 5 641 0
 	ldrh	w3, [x2, x1]
 	mul	w0, w0, w4
 	cmp	w3, w0, asr 1
-	bgt	.L1419
-	.loc 5 642 0
+	bgt	.L1421
 	cmp	w5, 48
-	bls	.L1420
+	bls	.L1422
 	cmp	w3, 8
-	bls	.L1420
+	bls	.L1422
 	adrp	x3, .LANCHOR95
 	ldrh	w3, [x3, #:lo12:.LANCHOR95]
 	cmp	w3, 35
-	bhi	.L1420
-.L1419:
-	.loc 5 643 0
+	bhi	.L1422
+.L1421:
 	ldr	x3, [x29, 160]
 	strh	wzr, [x3]
-.L1420:
-	.loc 5 645 0
+.L1422:
 	ldrh	w1, [x2, x1]
 	cmp	w0, w1
-	bgt	.L1421
+	bgt	.L1423
 	mov	w0, 65535
 	cmp	w20, w0
-	bne	.L1421
-	.loc 5 646 0
+	bne	.L1423
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR80]
-	.loc 5 647 0
 	adrp	x0, .LANCHOR85
 	strh	wzr, [x0, #:lo12:.LANCHOR85]
-	b	.L1478
-.L1421:
-	.loc 5 651 0
-	cbnz	w1, .L1422
-	.loc 5 652 0
+	b	.L1480
+.L1423:
+	cbnz	w1, .L1424
 	mov	w0, -1
 	bl	decrement_vpc_count
-.LVL1881:
-	.loc 5 653 0
 	ldr	x0, [x29, 160]
 	ldr	x1, [x29, 160]
 	ldrh	w0, [x0]
 	add	w0, w0, 1
 	strh	w0, [x1]
-	b	.L1415
-.L1422:
-	.loc 5 656 0
+	b	.L1417
+.L1424:
 	add	x0, x19, :lo12:.LANCHOR80
 	strb	wzr, [x0, 8]
-	.loc 5 658 0
 	ldr	x0, [x29, 136]
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w6
-	bne	.L1423
+	bne	.L1425
 	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
 	mov	w2, 658
 	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1882:
-.L1423:
-	.loc 5 659 0
+.L1425:
 	ldr	x0, [x29, 128]
 	ldrh	w1, [x19, #:lo12:.LANCHOR80]
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bne	.L1424
+	bne	.L1426
 	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
 	mov	w2, 659
 	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1883:
-.L1424:
-	.loc 5 660 0
+.L1426:
 	adrp	x0, .LANCHOR53
 	ldrh	w1, [x19, #:lo12:.LANCHOR80]
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L1425
+	bne	.L1427
 	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
 	mov	w2, 660
 	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1884:
-.L1425:
-	.loc 5 661 0
+.L1427:
 	add	x25, x19, :lo12:.LANCHOR80
 	mov	x0, x25
 	bl	make_superblock
-.LVL1885:
-	.loc 5 662 0
 	adrp	x0, .LANCHOR173
-	.loc 5 663 0
 	ldrh	w1, [x19, #:lo12:.LANCHOR80]
-	.loc 5 662 0
 	strh	wzr, [x0, #:lo12:.LANCHOR173]
-	.loc 5 663 0
 	ldr	x0, [x23, #:lo12:.LANCHOR42]
 	ldrh	w1, [x0, x1, lsl 1]
 	adrp	x0, .LANCHOR174
-	.loc 5 664 0
 	strh	wzr, [x25, 2]
-	.loc 5 663 0
 	strh	w1, [x0, #:lo12:.LANCHOR174]
-	.loc 5 665 0
 	strb	wzr, [x25, 6]
-.L1414:
-	.loc 5 671 0
+.L1416:
 	bl	FtlReadRefresh
-.LVL1886:
-	.loc 5 675 0
 	adrp	x1, .LANCHOR19
-	.loc 5 674 0
 	mov	w0, 1
 	str	w0, [x22, #:lo12:.LANCHOR117]
-	.loc 5 675 0
 	ldrh	w0, [x1, #:lo12:.LANCHOR19]
 	str	w0, [x29, 172]
-.LVL1887:
-	.loc 5 676 0
 	add	x0, x19, :lo12:.LANCHOR80
 	str	x1, [x29, 120]
 	ldr	w3, [x29, 172]
 	ldrh	w0, [x0, 2]
 	add	w2, w0, w21
 	cmp	w2, w3
-	ble	.L1426
-	.loc 5 677 0
+	ble	.L1428
 	sub	w21, w3, w0
-.LVL1888:
 	and	w21, w21, 65535
-.LVL1889:
-.L1426:
-	.loc 5 700 0
+.L1428:
 	adrp	x0, .LANCHOR173
-	.loc 5 689 0
 	mov	w27, 0
-	.loc 5 700 0
 	add	x0, x0, :lo12:.LANCHOR173
 	str	x0, [x29, 152]
-.LVL1890:
-.L1427:
-	.loc 5 679 0
+.L1429:
 	cmp	w21, w27, uxth
-	bls	.L1435
-	.loc 5 684 0
+	bls	.L1437
 	add	x1, x19, :lo12:.LANCHOR80
-	.loc 5 681 0
 	adrp	x0, .LANCHOR3
-	.loc 5 684 0
 	adrp	x25, .LANCHOR93
 	add	x1, x1, 16
-	.loc 5 681 0
 	ldrh	w7, [x0, #:lo12:.LANCHOR3]
-	.loc 5 684 0
 	mov	w23, 0
 	ldrh	w4, [x1, -14]
 	mov	w2, 0
 	ldr	x0, [x25, #:lo12:.LANCHOR93]
-	.loc 5 683 0
 	mov	w6, 65535
-	.loc 5 684 0
 	add	w4, w4, w27
-	b	.L1436
-.LVL1891:
-.L1429:
-	.loc 5 682 0
+	b	.L1438
+.L1431:
 	ldrh	w3, [x1]
-.LVL1892:
-	.loc 5 683 0
 	cmp	w3, w6
-	beq	.L1428
-	.loc 5 684 0
+	beq	.L1430
 	ubfiz	x5, x23, 5, 16
-	.loc 5 685 0
 	add	w23, w23, 1
-.LVL1893:
-	.loc 5 684 0
 	add	x5, x0, x5
-	.loc 5 685 0
 	and	w23, w23, 65535
-.LVL1894:
-	.loc 5 684 0
 	orr	w3, w4, w3, lsl 10
-.LVL1895:
 	str	w3, [x5, 4]
-.L1428:
-	.loc 5 681 0
+.L1430:
 	add	w2, w2, 1
-.LVL1896:
 	add	x1, x1, 2
-.LVL1897:
 	and	w2, w2, 65535
-.LVL1898:
-.L1436:
+.L1438:
 	cmp	w2, w7
-	bne	.L1429
-	.loc 5 689 0
+	bne	.L1431
 	add	x1, x19, :lo12:.LANCHOR80
-	.loc 5 701 0
 	adrp	x26, .LANCHOR89
 	add	x26, x26, :lo12:.LANCHOR89
-	.loc 5 689 0
 	ldrb	w2, [x1, 8]
-.LVL1899:
 	mov	w1, w23
 	bl	FlashReadPages
-.LVL1900:
 	ubfiz	x0, x23, 5, 16
 	mov	x23, 0
-.LVL1901:
 	str	x0, [x29, 144]
-.LVL1902:
-.L1430:
-	.loc 5 691 0
+.L1432:
 	ldr	x0, [x29, 144]
 	cmp	x0, x23
-	bne	.L1434
-.LVL1903:
+	bne	.L1436
 	add	w27, w27, 1
-.LVL1904:
-	b	.L1427
-.LVL1905:
-.L1434:
-	.loc 5 692 0
+	b	.L1429
+.L1436:
 	ldr	x0, [x25, #:lo12:.LANCHOR93]
 	add	x1, x0, x23
-.LVL1906:
-	.loc 5 693 0
 	ldr	w0, [x0, x23]
 	cmn	w0, #1
-	beq	.L1431
-	.loc 5 692 0
+	beq	.L1433
 	ldr	x28, [x1, 16]
-	.loc 5 693 0
 	mov	w0, 61589
 	ldrh	w1, [x28]
-.LVL1907:
 	cmp	w1, w0
-	bne	.L1431
-	.loc 5 695 0
+	bne	.L1433
 	ldr	w4, [x28, 8]
-.LVL1908:
-	.loc 5 696 0
 	cmn	w4, #1
-	bne	.L1432
+	bne	.L1434
 	str	w4, [x29, 112]
 	mov	w2, 696
 	adrp	x1, .LANCHOR175
@@ -18742,415 +10653,251 @@ rk_ftl_garbage_collect:
 	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1909:
 	ldr	w4, [x29, 112]
-.LVL1910:
-.L1432:
-	.loc 5 697 0
+.L1434:
 	mov	w2, 0
 	add	x1, x29, 188
 	mov	w0, w4
 	bl	log2phys
-.LVL1911:
-	.loc 5 698 0
 	ldr	x0, [x25, #:lo12:.LANCHOR93]
 	ldr	w1, [x29, 188]
 	add	x0, x0, x23
 	ldr	w2, [x0, 4]
 	cmp	w2, w1
-	bne	.L1431
-	.loc 5 700 0
+	bne	.L1433
 	ldr	x1, [x29, 152]
-	.loc 5 701 0
 	adrp	x4, .LANCHOR121
-	.loc 5 700 0
 	ldr	x2, [x29, 152]
-	.loc 5 701 0
 	ldr	w0, [x0, 24]
-	.loc 5 700 0
 	ldrh	w1, [x1]
 	add	w1, w1, 1
 	strh	w1, [x2]
-	.loc 5 701 0
 	ldr	x2, [x4, #:lo12:.LANCHOR121]
 	ldr	w1, [x26]
 	add	x1, x2, x1, lsl 5
 	stp	x4, x1, [x29, 104]
 	str	w0, [x1, 24]
-	.loc 5 702 0
 	bl	Ftl_get_new_temp_ppa
-.LVL1912:
 	ldp	x4, x1, [x29, 104]
-	.loc 5 703 0
 	ldr	x2, [x4, #:lo12:.LANCHOR121]
-	.loc 5 702 0
 	str	w0, [x1, 4]
-	.loc 5 703 0
 	ldr	w1, [x26]
 	ubfiz	x0, x1, 5, 32
-	.loc 5 711 0
 	add	w1, w1, 1
-	.loc 5 703 0
 	add	x2, x2, x0
 	ldr	x0, [x25, #:lo12:.LANCHOR93]
 	add	x0, x0, x23
 	ldr	x4, [x0, 8]
 	str	x4, [x2, 8]
-	.loc 5 704 0
 	ldr	x4, [x0, 16]
 	str	x4, [x2, 16]
-	.loc 5 705 0
 	ldr	w2, [x29, 188]
 	str	w2, [x28, 12]
-	.loc 5 706 0
 	adrp	x2, .LANCHOR53
 	add	x11, x2, :lo12:.LANCHOR53
 	ldrh	w2, [x2, #:lo12:.LANCHOR53]
 	strh	w2, [x28, 2]
-	.loc 5 709 0
 	adrp	x2, .LANCHOR71
-	.loc 5 711 0
 	str	w1, [x26]
-	.loc 5 712 0
 	mov	w1, 1
-	.loc 5 709 0
 	ldr	w2, [x2, #:lo12:.LANCHOR71]
 	str	w2, [x28, 4]
-	.loc 5 712 0
 	bl	FtlGcBufAlloc
-.LVL1913:
-	.loc 5 713 0
 	ldrb	w1, [x11, 7]
 	ldr	w0, [x26]
 	cmp	w1, w0
-	beq	.L1433
+	beq	.L1435
 	ldrh	w0, [x11, 4]
-	cbnz	w0, .L1431
-.L1433:
-	.loc 5 714 0
+	cbnz	w0, .L1433
+.L1435:
 	bl	Ftl_gc_temp_data_write_back
-.LVL1914:
-	cbz	w0, .L1431
-.LVL1915:
-.L1479:
-	.loc 5 729 0
+	cbz	w0, .L1433
+.L1481:
 	str	wzr, [x22, #:lo12:.LANCHOR117]
-	b	.L1478
-.LVL1916:
-.L1431:
+	b	.L1480
+.L1433:
 	add	x23, x23, 32
-	b	.L1430
-.L1435:
-	.loc 5 723 0
+	b	.L1432
+.L1437:
 	add	x1, x19, :lo12:.LANCHOR80
 	ldrh	w0, [x1, 2]
 	add	w21, w21, w0
-.LVL1917:
-	.loc 5 725 0
 	ldr	w0, [x29, 172]
-	.loc 5 723 0
 	and	w21, w21, 65535
 	strh	w21, [x1, 2]
-	.loc 5 725 0
 	cmp	w0, w21
-	bls	.L1437
+	bls	.L1439
 	adrp	x0, .LANCHOR173
 	ldrh	w1, [x0, #:lo12:.LANCHOR173]
 	adrp	x0, .LANCHOR174
 	ldrh	w0, [x0, #:lo12:.LANCHOR174]
 	cmp	w1, w0
-	bne	.L1438
-.L1437:
-	.loc 5 727 0
+	bne	.L1440
+.L1439:
 	adrp	x0, .LANCHOR89
 	ldr	w0, [x0, #:lo12:.LANCHOR89]
-	cbz	w0, .L1439
-	.loc 5 728 0
+	cbz	w0, .L1441
 	bl	Ftl_gc_temp_data_write_back
-.LVL1918:
-	cbnz	w0, .L1479
-.L1439:
-	.loc 5 733 0
+	cbnz	w0, .L1481
+.L1441:
 	adrp	x0, .LANCHOR173
 	ldrh	w0, [x0, #:lo12:.LANCHOR173]
-	cbnz	w0, .L1440
+	cbnz	w0, .L1442
 	ldrh	w0, [x19, #:lo12:.LANCHOR80]
 	adrp	x1, .LANCHOR42
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	lsl	x0, x0, 1
 	ldrh	w2, [x1, x0]
-	cbz	w2, .L1440
-	.loc 5 735 0
+	cbz	w2, .L1442
 	strh	wzr, [x1, x0]
-	.loc 5 736 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR80]
 	bl	update_vpc_list
-.LVL1919:
-	.loc 5 738 0
 	bl	l2p_flush
-.LVL1920:
-	.loc 5 739 0
 	bl	FtlVpcTblFlush
-.LVL1921:
-.L1440:
-	.loc 5 741 0
+.L1442:
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR80]
-.L1438:
-	.loc 5 743 0
+.L1440:
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 2
-	bhi	.L1441
-	.loc 5 745 0
+	bhi	.L1443
 	ldr	x0, [x29, 120]
 	ldrh	w21, [x0, #:lo12:.LANCHOR19]
-.LVL1922:
-	b	.L1413
-.LVL1923:
-.L1441:
-	.loc 5 750 0
+	b	.L1415
+.L1443:
 	adrp	x1, .LANCHOR172
-	.loc 5 748 0
 	str	wzr, [x22, #:lo12:.LANCHOR117]
-	.loc 5 750 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR172]
-	.loc 5 751 0
 	cmp	w1, 0
 	csinc	w0, w1, w0, ne
-	b	.L1372
-.LVL1924:
-.L1444:
-.LBE330:
-.LBE331:
-	.loc 5 479 0
+	b	.L1374
+.L1446:
 	mov	w0, 0
-.LVL1925:
-	b	.L1372
-	.cfi_endproc
-.LFE319:
+	b	.L1374
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
 	.section	.text.sftl_gc,"ax",@progbits
 	.align	2
 	.global	sftl_gc
 	.type	sftl_gc, %function
 sftl_gc:
-.LFB320:
-	.loc 5 757 0
-	.cfi_startproc
-	.loc 5 758 0
 	mov	w1, 1
 	mov	w0, w1
 	b	rk_ftl_garbage_collect
-.LVL1926:
-	.cfi_endproc
-.LFE320:
 	.size	sftl_gc, .-sftl_gc
 	.section	.text.FtlRead,"ax",@progbits
 	.align	2
 	.global	FtlRead
 	.type	FtlRead, %function
 FtlRead:
-.LFB214:
-	.loc 3 814 0
-	.cfi_startproc
-.LVL1927:
 	stp	x29, x30, [sp, -176]!
-	.cfi_def_cfa_offset 176
-	.cfi_offset 29, -176
-	.cfi_offset 30, -168
 	and	w0, w0, 255
-	.loc 3 824 0
 	cmp	w0, 16
-	.loc 3 814 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -160
-	.cfi_offset 20, -152
 	mov	w19, w1
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -128
-	.cfi_offset 24, -120
 	mov	x23, x3
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 27, -96
-	.cfi_offset 28, -88
 	mov	w27, w2
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 21, -144
-	.cfi_offset 22, -136
-	.cfi_offset 25, -112
-	.cfi_offset 26, -104
-	.loc 3 824 0
-	bne	.L1482
-	.loc 3 825 0
+	bne	.L1484
 	mov	x2, x3
-.LVL1928:
 	mov	w1, w27
-.LVL1929:
 	add	w0, w19, 256
-.LVL1930:
 	bl	FtlVendorPartRead
-.LVL1931:
 	mov	w21, w0
-.LVL1932:
-.L1481:
-	.loc 3 901 0
+.L1483:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
-.LVL1933:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL1934:
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-.LVL1935:
 	ldp	x29, x30, [sp], 176
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1936:
-.L1482:
-	.cfi_restore_state
-	.loc 3 830 0
+.L1484:
 	add	w0, w1, w2
 	str	w0, [x29, 140]
 	adrp	x0, .LANCHOR34
 	add	w1, w1, w2
-.LVL1937:
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	cmp	w1, w0
-	bhi	.L1502
-	.loc 3 830 0 is_stmt 0 discriminator 1
+	bhi	.L1504
 	adrp	x0, .LANCHOR86
 	ldr	w21, [x0, #:lo12:.LANCHOR86]
 	cmn	w21, #1
-	beq	.L1481
-	.loc 3 835 0 is_stmt 1
+	beq	.L1483
 	adrp	x22, .LANCHOR12
-	.loc 3 836 0
 	sub	w24, w1, #1
-	.loc 3 841 0
 	adrp	x1, .LANCHOR62
-	.loc 3 840 0
 	mov	w25, 0
-	.loc 3 835 0
 	ldrh	w0, [x22, #:lo12:.LANCHOR12]
-	.loc 3 815 0
 	mov	w21, 0
-	.loc 3 851 0
 	adrp	x28, .LANCHOR120
-	.loc 3 828 0
 	stp	wzr, wzr, [x29, 144]
-	.loc 3 835 0
 	udiv	w26, w19, w0
-.LVL1938:
-	.loc 3 836 0
 	udiv	w24, w24, w0
-.LVL1939:
-	.loc 3 835 0
 	mov	w20, w26
-	.loc 3 837 0
 	sub	w0, w24, w26
 	add	w0, w0, 1
 	stp	wzr, w0, [x29, 152]
-.LVL1940:
-	.loc 3 841 0
 	ldr	w0, [x1, #:lo12:.LANCHOR62]
-.LVL1941:
 	ldr	w2, [x29, 156]
-.LVL1942:
 	add	w0, w0, w2
 	str	w0, [x1, #:lo12:.LANCHOR62]
-	.loc 3 886 0
 	adrp	x0, .LANCHOR81
 	add	x0, x0, :lo12:.LANCHOR81
 	str	x0, [x29, 128]
-.LVL1943:
-.L1484:
-	.loc 3 842 0
+.L1486:
 	ldr	w0, [x29, 156]
-	cbnz	w0, .L1500
-	.loc 3 898 0
+	cbnz	w0, .L1502
 	adrp	x0, .LANCHOR101
 	ldrh	w0, [x0, #:lo12:.LANCHOR101]
-	cbnz	w0, .L1501
-	.loc 3 898 0 is_stmt 0 discriminator 1
+	cbnz	w0, .L1503
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 31
-	bhi	.L1481
-.L1501:
-	.loc 3 899 0 is_stmt 1
+	bhi	.L1483
+.L1503:
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-.LVL1944:
-	b	.L1481
-.L1500:
-	.loc 3 843 0
+	b	.L1483
+.L1502:
 	add	x1, x29, 172
 	mov	w2, 0
 	mov	w0, w20
 	bl	log2phys
-.LVL1945:
-	.loc 3 844 0
 	ldr	w1, [x29, 172]
 	cmn	w1, #1
-	bne	.L1485
-	.loc 3 845 0 discriminator 1
+	bne	.L1487
 	add	x5, x22, :lo12:.LANCHOR12
 	mov	w4, 0
-.L1486:
-.LVL1946:
+.L1488:
 	ldrh	w0, [x5]
 	cmp	w4, w0
-	bcc	.L1488
-.LVL1947:
-.L1489:
-	.loc 3 874 0
+	bcc	.L1490
+.L1491:
 	ldr	w0, [x29, 156]
-	.loc 3 872 0
 	add	w20, w20, 1
-.LVL1948:
-	.loc 3 874 0
 	subs	w0, w0, #1
 	str	w0, [x29, 156]
-.LVL1949:
-	beq	.L1493
-	.loc 3 874 0 is_stmt 0 discriminator 1
+	beq	.L1495
 	adrp	x0, .LANCHOR3
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w25, w0, lsl 2
-	bne	.L1484
-.L1493:
-	.loc 3 875 0 is_stmt 1
-	cbz	w25, .L1484
-	.loc 3 876 0
+	bne	.L1486
+.L1495:
+	cbz	w25, .L1486
 	ldr	x0, [x28, #:lo12:.LANCHOR120]
 	mov	w1, w25
 	mov	w2, 0
 	bl	FlashReadPages
-.LVL1950:
-	.loc 3 883 0
 	ldr	w0, [x29, 144]
 	lsl	w0, w0, 9
 	str	w0, [x29, 136]
-	.loc 3 880 0
 	ldr	w0, [x29, 152]
 	lsl	w0, w0, 9
 	str	x0, [x29, 120]
@@ -19159,77 +10906,53 @@ FtlRead:
 	str	w0, [x29, 112]
 	ubfiz	x0, x25, 5, 32
 	mov	x25, 0
-.LVL1951:
 	str	x0, [x29, 104]
-.LVL1952:
-	.loc 3 883 0
 	add	x0, x22, :lo12:.LANCHOR12
 	str	x0, [x29, 96]
-.L1499:
-	.loc 3 878 0
+.L1501:
 	ldr	x0, [x28, #:lo12:.LANCHOR120]
 	add	x0, x0, x25
 	ldr	w1, [x0, 24]
 	cmp	w26, w1
-	bne	.L1495
-	.loc 3 879 0
+	bne	.L1497
 	ldr	x1, [x0, 8]
 	adrp	x0, .LANCHOR115
 	ldr	x0, [x0, #:lo12:.LANCHOR115]
 	cmp	x1, x0
-	bne	.L1496
-	.loc 3 880 0
+	bne	.L1498
 	ldr	x0, [x29, 120]
 	ldr	w2, [x29, 112]
 	add	x1, x1, x0
 	mov	x0, x23
-.L1513:
-	.loc 3 883 0
+.L1515:
 	bl	ftl_memcpy
-.LVL1953:
-.L1496:
-	.loc 3 885 0
+.L1498:
 	ldr	x0, [x28, #:lo12:.LANCHOR120]
 	add	x1, x0, x25
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	bne	.L1497
-	.loc 3 886 0
+	bne	.L1499
 	ldr	x1, [x29, 128]
-	.loc 3 887 0
 	mov	w21, w0
-.LVL1954:
-	.loc 3 886 0
 	ldr	x2, [x29, 128]
 	ldr	w1, [x1, 72]
 	add	w1, w1, 1
 	str	w1, [x2, 72]
-.LVL1955:
-.L1498:
-	.loc 3 877 0 discriminator 2
+.L1500:
 	ldr	x0, [x29, 104]
 	add	x25, x25, 32
-.LVL1956:
 	cmp	x0, x25
-	bne	.L1499
-	.loc 3 894 0
+	bne	.L1501
 	mov	w25, 0
-	b	.L1484
-.LVL1957:
-.L1488:
-	.loc 3 846 0
+	b	.L1486
+.L1490:
 	madd	w0, w20, w0, w4
-.LVL1958:
-	.loc 3 847 0
 	cmp	w19, w0
-	bhi	.L1487
-	.loc 3 847 0 is_stmt 0 discriminator 1
+	bhi	.L1489
 	ldr	w1, [x29, 140]
 	cmp	w1, w0
-	bls	.L1487
-	.loc 3 848 0 is_stmt 1
+	bls	.L1489
 	sub	w0, w0, w19
-.LVL1959:
 	str	x5, [x29, 112]
 	lsl	w0, w0, 9
 	str	w4, [x29, 120]
@@ -19237,114 +10960,75 @@ FtlRead:
 	mov	w1, 0
 	add	x0, x23, x0
 	bl	ftl_memset
-.LVL1960:
 	ldr	w4, [x29, 120]
 	ldr	x5, [x29, 112]
-.LVL1961:
-.L1487:
-	.loc 3 845 0 discriminator 2
+.L1489:
 	add	w4, w4, 1
-.LVL1962:
-	b	.L1486
-.LVL1963:
-.L1485:
-	.loc 3 851 0
+	b	.L1488
+.L1487:
 	ldr	x2, [x28, #:lo12:.LANCHOR120]
 	ubfiz	x0, x25, 5, 32
-	.loc 3 852 0
 	cmp	w20, w26
-	.loc 3 851 0
 	add	x0, x2, x0
 	str	w1, [x0, 4]
-	.loc 3 852 0
-	bne	.L1490
-	.loc 3 853 0
+	bne	.L1492
 	adrp	x1, .LANCHOR115
 	ldr	x1, [x1, #:lo12:.LANCHOR115]
 	str	x1, [x0, 8]
-	.loc 3 854 0
 	ldrh	w1, [x22, #:lo12:.LANCHOR12]
 	udiv	w2, w19, w1
 	msub	w2, w2, w1, w19
 	str	w2, [x29, 152]
-.LVL1964:
-	.loc 3 855 0
 	sub	w2, w1, w2
-.LVL1965:
 	cmp	w27, w2
 	csel	w2, w27, w2, ls
-.LVL1966:
 	str	w2, [x29, 148]
-.LVL1967:
-	.loc 3 857 0
 	cmp	w1, w2
-	bne	.L1491
-	.loc 3 858 0
+	bne	.L1493
 	str	x23, [x0, 8]
-.LVL1968:
-.L1491:
-	.loc 3 867 0
+.L1493:
 	adrp	x1, .LANCHOR24
 	adrp	x2, .LANCHOR114
-	.loc 3 868 0
 	str	w20, [x0, 24]
-	.loc 3 867 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR24]
 	ldr	x2, [x2, #:lo12:.LANCHOR114]
 	mul	w1, w1, w25
-	.loc 3 869 0
 	add	w25, w25, 1
-.LVL1969:
-	.loc 3 867 0
 	and	x1, x1, 4294967292
 	add	x1, x2, x1
 	str	x1, [x0, 16]
-	b	.L1489
-.L1490:
-	.loc 3 859 0
+	b	.L1491
+.L1492:
 	cmp	w20, w24
-	bne	.L1492
-	.loc 3 861 0
+	bne	.L1494
 	ldrh	w2, [x22, #:lo12:.LANCHOR12]
-	.loc 3 860 0
 	adrp	x1, .LANCHOR113
-	.loc 3 861 0
 	ldr	w3, [x29, 140]
-	.loc 3 860 0
 	ldr	x1, [x1, #:lo12:.LANCHOR113]
 	str	x1, [x0, 8]
-	.loc 3 861 0
 	mul	w1, w20, w2
 	sub	w3, w3, w1
 	str	w3, [x29, 144]
-.LVL1970:
-	.loc 3 862 0
 	cmp	w2, w3
-	bne	.L1491
-.LVL1971:
-.L1512:
-	.loc 3 865 0
+	bne	.L1493
+.L1514:
 	sub	w1, w1, w19
 	lsl	w1, w1, 9
 	add	x1, x23, x1
 	str	x1, [x0, 8]
-	b	.L1491
-.L1492:
+	b	.L1493
+.L1494:
 	ldrh	w1, [x22, #:lo12:.LANCHOR12]
 	mul	w1, w1, w20
-	b	.L1512
-.LVL1972:
-.L1495:
-	.loc 3 881 0
+	b	.L1514
+.L1497:
 	cmp	w24, w1
-	bne	.L1496
-	.loc 3 882 0
+	bne	.L1498
 	ldr	x1, [x0, 8]
 	adrp	x0, .LANCHOR113
 	ldr	x0, [x0, #:lo12:.LANCHOR113]
 	cmp	x1, x0
-	bne	.L1496
-	.loc 3 883 0
+	bne	.L1498
 	ldr	x0, [x29, 96]
 	ldr	w2, [x29, 136]
 	ldrh	w0, [x0]
@@ -19352,282 +11036,162 @@ FtlRead:
 	sub	w0, w0, w19
 	lsl	w0, w0, 9
 	add	x0, x23, x0
-	b	.L1513
-.L1497:
-	.loc 3 889 0
+	b	.L1515
+.L1499:
 	cmp	w0, 256
-	bne	.L1498
-.LBB332:
-	.loc 3 890 0
+	bne	.L1500
 	ldr	w0, [x1, 4]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL1973:
-	.loc 3 891 0
 	bl	FtlGcRefreshBlock
-.LVL1974:
-	b	.L1498
-.LVL1975:
-.L1502:
-.LBE332:
-	.loc 3 831 0
+	b	.L1500
+.L1504:
 	mov	w21, -1
-	b	.L1481
-	.cfi_endproc
-.LFE214:
+	b	.L1483
 	.size	FtlRead, .-FtlRead
 	.section	.text.sftl_read,"ax",@progbits
 	.align	2
 	.global	sftl_read
 	.type	sftl_read, %function
 sftl_read:
-.LFB219:
-	.loc 3 1168 0
-	.cfi_startproc
-.LVL1976:
-	.loc 3 1169 0
 	mov	x3, x2
 	mov	w2, w1
-.LVL1977:
 	mov	w1, w0
-.LVL1978:
 	mov	w0, 0
-.LVL1979:
 	b	FtlRead
-.LVL1980:
-	.cfi_endproc
-.LFE219:
 	.size	sftl_read, .-sftl_read
 	.section	.text.FtlWrite,"ax",@progbits
 	.align	2
 	.global	FtlWrite
 	.type	FtlWrite, %function
 FtlWrite:
-.LFB217:
-	.loc 3 958 0
-	.cfi_startproc
-.LVL1981:
 	stp	x29, x30, [sp, -240]!
-	.cfi_def_cfa_offset 240
-	.cfi_offset 29, -240
-	.cfi_offset 30, -232
 	and	w0, w0, 255
-	.loc 3 966 0
 	cmp	w0, 16
-	.loc 3 958 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -208
-	.cfi_offset 22, -200
 	mov	w21, w1
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 25, -176
-	.cfi_offset 26, -168
 	mov	x26, x3
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 19, -224
-	.cfi_offset 20, -216
-	.cfi_offset 23, -192
-	.cfi_offset 24, -184
-	.cfi_offset 27, -160
-	.cfi_offset 28, -152
-	.loc 3 958 0
 	str	w2, [x29, 176]
-	.loc 3 966 0
-	bne	.L1516
-	.loc 3 967 0
+	bne	.L1518
 	add	w0, w1, 256
-.LVL1982:
 	ldr	w1, [x29, 176]
-.LVL1983:
 	mov	x2, x3
-.LVL1984:
 	bl	FtlVendorPartWrite
-.LVL1985:
-.L1515:
-	.loc 3 1117 0
+.L1517:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-.LVL1986:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 240
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
-.LVL1987:
 	ret
-.LVL1988:
-.L1516:
-	.cfi_restore_state
-	.loc 3 970 0
+.L1518:
 	ldr	w0, [x29, 176]
 	add	w0, w1, w0
 	str	w0, [x29, 168]
 	adrp	x0, .LANCHOR34
 	ldr	w1, [x29, 168]
-.LVL1989:
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	cmp	w1, w0
-	bhi	.L1551
-	.loc 3 970 0 is_stmt 0 discriminator 1
+	bhi	.L1553
 	adrp	x0, .LANCHOR86
 	ldr	w0, [x0, #:lo12:.LANCHOR86]
 	cmn	w0, #1
-	beq	.L1515
-	.loc 3 973 0 is_stmt 1
+	beq	.L1517
 	adrp	x0, .LANCHOR176
 	mov	w1, 2048
-	.loc 3 974 0
 	adrp	x22, .LANCHOR12
-	.loc 3 973 0
 	str	w1, [x0, #:lo12:.LANCHOR176]
-	.loc 3 975 0
 	ldr	w1, [x29, 168]
-	.loc 3 974 0
 	ldrh	w0, [x22, #:lo12:.LANCHOR12]
-	.loc 3 975 0
 	sub	w1, w1, #1
-	.loc 3 974 0
 	udiv	w25, w21, w0
-.LVL1990:
-	.loc 3 975 0
 	udiv	w0, w1, w0
-	.loc 3 978 0
 	adrp	x1, .LANCHOR64
-	.loc 3 975 0
 	str	w0, [x29, 156]
-.LVL1991:
-	.loc 3 976 0
 	sub	w0, w0, w25
-.LVL1992:
 	add	w24, w0, 1
-.LVL1993:
 	str	w0, [x29, 152]
-	.loc 3 978 0
 	ldr	w0, [x1, #:lo12:.LANCHOR64]
 	add	w0, w0, w24
 	str	w0, [x1, #:lo12:.LANCHOR64]
-.LVL1994:
-	.loc 3 984 0
 	adrp	x0, .LANCHOR177
 	str	x0, [x29, 160]
 	ldr	w1, [x0, #:lo12:.LANCHOR177]
 	adrp	x0, .LANCHOR51
 	add	x19, x0, :lo12:.LANCHOR51
-	cbz	w1, .L1518
-	.loc 3 984 0 is_stmt 0 discriminator 1
+	cbz	w1, .L1520
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1518
-	.loc 3 985 0 is_stmt 1
+	cbnz	w0, .L1520
 	adrp	x19, .LANCHOR52
 	add	x19, x19, :lo12:.LANCHOR52
-.L1518:
+.L1520:
 	mov	w20, w25
-	.loc 3 999 0
 	adrp	x0, .LANCHOR52
 	add	x0, x0, :lo12:.LANCHOR52
 	str	x0, [x29, 96]
-.LVL1995:
-.L1519:
-	.loc 3 987 0
-	cbnz	w24, .L1547
-	.loc 3 1101 0
+.L1521:
+	cbnz	w24, .L1549
 	ldr	w1, [x29, 152]
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-.LVL1996:
-	.loc 3 1103 0
 	adrp	x0, .LANCHOR48
 	mov	x22, x0
 	ldrh	w1, [x0, #:lo12:.LANCHOR48]
 	cmp	w1, 15
-	bls	.L1548
-.LVL1997:
-.L1550:
-	.loc 3 1116 0
+	bls	.L1550
+.L1552:
 	mov	w0, 0
-	b	.L1515
-.LVL1998:
-.L1547:
-	.loc 3 988 0
+	b	.L1517
+.L1549:
 	adrp	x0, .LANCHOR3
 	ldrb	w2, [x19, 6]
 	str	x0, [x29, 120]
 	ldrh	w1, [x0, #:lo12:.LANCHOR3]
 	cmp	w2, w1
-	bcc	.L1520
-	.loc 3 988 0 is_stmt 0 discriminator 1
+	bcc	.L1522
 	adrp	x1, .LANCHOR178
 	adrp	x0, .LC1
 	mov	w2, 988
 	add	x1, x1, :lo12:.LANCHOR178
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1999:
-.L1520:
-	.loc 3 989 0 is_stmt 1
+.L1522:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1521
-	.loc 3 992 0
+	cbnz	w0, .L1523
 	adrp	x0, .LANCHOR51
 	add	x0, x0, :lo12:.LANCHOR51
 	cmp	x19, x0
-	bne	.L1522
-	.loc 3 993 0
+	bne	.L1524
 	adrp	x0, .LANCHOR52
 	add	x0, x0, :lo12:.LANCHOR52
 	ldrh	w1, [x0, 4]
-	cbnz	w1, .L1523
-	.loc 3 994 0
+	cbnz	w1, .L1525
 	bl	allocate_new_data_superblock
-.LVL2000:
-	.loc 3 995 0
 	ldr	x0, [x29, 160]
 	str	wzr, [x0, #:lo12:.LANCHOR177]
-.L1523:
-	.loc 3 997 0
+.L1525:
 	adrp	x0, .LANCHOR51
 	add	x19, x0, :lo12:.LANCHOR51
-.LVL2001:
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.LVL2002:
-	.loc 3 998 0
 	ldr	x0, [x29, 160]
 	ldr	w0, [x0, #:lo12:.LANCHOR177]
-	.loc 3 999 0
 	cmp	w0, 0
 	ldr	x0, [x29, 96]
 	csel	x19, x0, x19, ne
-.L1524:
-.LVL2003:
-	.loc 3 1009 0
+.L1526:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1521
-	.loc 3 1010 0
+	cbnz	w0, .L1523
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.LVL2004:
-.L1521:
-	.loc 3 1019 0
+.L1523:
 	ldrh	w0, [x19, 4]
-	.loc 3 1017 0
 	ldrb	w1, [x19, 7]
 	cmp	w0, w24
 	csel	w0, w0, w24, ls
@@ -19635,112 +11199,76 @@ FtlWrite:
 	cmp	w1, w0
 	csel	w0, w1, w0, ls
 	str	w0, [x29, 148]
-.LVL2005:
-	.loc 3 1021 0
 	ldr	x0, [x29, 120]
-.LVL2006:
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1525
-	.loc 3 1021 0 is_stmt 0 discriminator 1
+	bcc	.L1527
 	adrp	x1, .LANCHOR178
 	adrp	x0, .LC1
 	mov	w2, 1021
 	add	x1, x1, :lo12:.LANCHOR178
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2007:
-.L1525:
-	.loc 3 1031 0 is_stmt 1 discriminator 1
+.L1527:
 	adrp	x0, .LANCHOR24
 	add	x0, x0, :lo12:.LANCHOR24
-	.loc 3 1044 0 discriminator 1
 	str	xzr, [x29, 184]
-	.loc 3 1031 0 discriminator 1
 	str	x0, [x29, 112]
-	.loc 3 1077 0 discriminator 1
 	adrp	x0, .LANCHOR23
 	add	x0, x0, :lo12:.LANCHOR23
 	str	x0, [x29, 104]
-.L1526:
-	.loc 3 1022 0 discriminator 1
+.L1528:
 	ldr	w1, [x29, 148]
 	adrp	x28, .LANCHOR122
 	ldr	w23, [x29, 184]
-.LVL2008:
 	cmp	w23, w1
-	bcc	.L1545
+	bcc	.L1547
 	mov	x23, x1
-.L1527:
-.LVL2009:
-	.loc 3 1097 0
+.L1529:
 	ldr	x0, [x28, #:lo12:.LANCHOR122]
 	mov	x3, x19
 	mov	w2, 0
 	mov	w1, w23
 	bl	FtlProgPages
-.LVL2010:
-	.loc 3 1098 0
 	cmp	w24, w23
-	bcs	.L1546
-	.loc 3 1098 0 is_stmt 0 discriminator 1
+	bcs	.L1548
 	adrp	x1, .LANCHOR178
 	adrp	x0, .LC1
 	mov	w2, 1098
 	add	x1, x1, :lo12:.LANCHOR178
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2011:
-.L1546:
-	.loc 3 1099 0 is_stmt 1
+.L1548:
 	sub	w24, w24, w23
-.LVL2012:
-	b	.L1519
-.LVL2013:
-.L1522:
-	.loc 3 1003 0
+	b	.L1521
+.L1524:
 	ldr	x1, [x29, 160]
 	str	wzr, [x1, #:lo12:.LANCHOR177]
-	.loc 3 1004 0
 	ldrh	w1, [x0, 4]
-	cbnz	w1, .L1556
-	.loc 3 1005 0
+	cbnz	w1, .L1558
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.LVL2014:
-	b	.L1524
-.L1556:
+	b	.L1526
+.L1558:
 	mov	x19, x0
-.LVL2015:
-	b	.L1521
-.LVL2016:
-.L1545:
-	.loc 3 1023 0
+	b	.L1523
+.L1547:
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1527
-	.loc 3 1027 0
+	cbz	w0, .L1529
 	add	x1, x29, 204
 	mov	w2, 0
 	mov	w0, w20
 	bl	log2phys
-.LVL2017:
-	.loc 3 1028 0
 	mov	x0, x19
 	bl	get_new_active_ppa
-.LVL2018:
 	ldr	x1, [x29, 184]
 	lsl	x27, x1, 5
-	.loc 3 1030 0
 	ldr	x1, [x28, #:lo12:.LANCHOR122]
 	add	x1, x1, x27
 	str	w0, [x1, 4]
-	.loc 3 1031 0
 	ldr	x0, [x29, 112]
-.LVL2019:
-	.loc 3 1032 0
 	str	w20, [x1, 24]
-	.loc 3 1031 0
 	ldrh	w2, [x0]
 	mul	w23, w23, w2
 	and	x0, x23, 4294967292
@@ -19750,176 +11278,118 @@ FtlWrite:
 	ldr	x0, [x0, #:lo12:.LANCHOR114]
 	str	x0, [x29, 128]
 	add	x23, x0, x3
-.LVL2020:
 	str	x23, [x1, 16]
-	.loc 3 1035 0
 	mov	x0, x23
 	mov	w1, 0
-.LVL2021:
 	bl	ftl_memset
-.LVL2022:
-	.loc 3 1037 0
 	ldr	w0, [x29, 156]
 	cmp	w20, w25
 	ccmp	w20, w0, 4, ne
-	bne	.L1528
-	.loc 3 1038 0
+	bne	.L1530
 	cmp	w20, w25
-	bne	.L1529
-	.loc 3 1039 0
+	bne	.L1531
 	ldrh	w2, [x22, #:lo12:.LANCHOR12]
 	udiv	w0, w21, w2
 	msub	w0, w0, w2, w21
 	str	w0, [x29, 172]
-.LVL2023:
-	.loc 3 1040 0
 	sub	w2, w2, w0
 	ldr	w0, [x29, 176]
-.LVL2024:
 	cmp	w2, w0
 	csel	w0, w2, w0, ls
 	str	w0, [x29, 180]
-.LVL2025:
-.L1530:
-	.loc 3 1048 0
+.L1532:
 	ldrh	w0, [x22, #:lo12:.LANCHOR12]
 	ldr	w1, [x29, 180]
 	cmp	w1, w0
-	.loc 3 1050 0
 	ldr	x0, [x28, #:lo12:.LANCHOR122]
-	.loc 3 1048 0
-	bne	.L1531
-	.loc 3 1050 0
+	bne	.L1533
 	add	x3, x0, x27
-	.loc 3 1049 0
 	cmp	w20, w25
-	bne	.L1532
-	.loc 3 1050 0
+	bne	.L1534
 	str	x26, [x3, 8]
-.LVL2026:
-.L1533:
-	.loc 3 1089 0
+.L1535:
 	ldr	x0, [x29, 120]
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1542
-	.loc 3 1089 0 is_stmt 0 discriminator 1
+	bcc	.L1544
 	adrp	x1, .LANCHOR178
 	adrp	x0, .LC1
 	mov	w2, 1089
 	add	x1, x1, :lo12:.LANCHOR178
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2027:
-.L1542:
-	.loc 3 1090 0 is_stmt 1
+.L1544:
 	ldp	x1, x2, [x29, 128]
 	mov	w0, -3947
 	strh	w0, [x1, x2]
-	.loc 3 1091 0
 	adrp	x1, .LANCHOR71
 	ldr	w0, [x1, #:lo12:.LANCHOR71]
-	.loc 3 1092 0
 	stp	w0, w20, [x23, 4]
-	.loc 3 1095 0
 	add	w20, w20, 1
-.LVL2028:
-	.loc 3 1091 0
 	add	w0, w0, 1
 	cmn	w0, #1
 	csel	w0, w0, wzr, ne
 	str	w0, [x1, #:lo12:.LANCHOR71]
-	.loc 3 1093 0
 	ldr	w0, [x29, 204]
 	str	w0, [x23, 12]
-	.loc 3 1094 0
 	ldrh	w0, [x19]
 	strh	w0, [x23, 2]
 	ldr	x0, [x29, 184]
 	add	x0, x0, 1
 	str	x0, [x29, 184]
-	b	.L1526
-.LVL2029:
-.L1529:
-	.loc 3 1045 0
+	b	.L1528
+.L1531:
 	ldr	w0, [x29, 168]
 	ldrh	w2, [x22, #:lo12:.LANCHOR12]
-	.loc 3 1044 0
 	str	wzr, [x29, 172]
-	.loc 3 1045 0
 	msub	w2, w20, w2, w0
 	and	w0, w2, 65535
 	str	w0, [x29, 180]
-.LVL2030:
-	b	.L1530
-.LVL2031:
-.L1532:
-	.loc 3 1052 0
+	b	.L1532
+.L1534:
 	ldr	w0, [x29, 180]
-.LVL2032:
-.L1563:
-	.loc 3 1087 0
+.L1565:
 	mul	w0, w0, w20
 	sub	w0, w0, w21
 	lsl	w0, w0, 9
 	add	x0, x26, x0
 	str	x0, [x3, 8]
-	b	.L1533
-.LVL2033:
-.L1531:
-	.loc 3 1056 0
+	b	.L1535
+.L1533:
 	add	x0, x0, x27
-	.loc 3 1055 0
 	cmp	w20, w25
-	bne	.L1534
-	.loc 3 1056 0
+	bne	.L1536
 	adrp	x1, .LANCHOR115
 	ldr	x1, [x1, #:lo12:.LANCHOR115]
-.L1562:
-	.loc 3 1058 0
+.L1564:
 	str	x1, [x0, 8]
-	.loc 3 1060 0
 	ldr	w0, [x29, 204]
 	cmn	w0, #1
-	beq	.L1536
-.LBB333:
-	.loc 3 1062 0
+	beq	.L1538
 	str	w0, [x29, 212]
-	.loc 3 1066 0
 	mov	w2, 0
-	.loc 3 1064 0
 	ldr	x0, [x28, #:lo12:.LANCHOR122]
-	.loc 3 1063 0
 	str	w20, [x29, 232]
-	.loc 3 1064 0
 	add	x0, x0, x27
-	.loc 3 1065 0
 	ldp	x1, x0, [x0, 8]
 	stp	x1, x0, [x29, 216]
-	.loc 3 1066 0
 	mov	w1, 1
 	add	x0, x29, 208
 	bl	FlashReadPages
-.LVL2034:
-	.loc 3 1067 0
 	ldr	w0, [x29, 208]
 	cmn	w0, #1
-	bne	.L1537
-	.loc 3 1068 0
+	bne	.L1539
 	adrp	x0, .LANCHOR81
 	add	x0, x0, :lo12:.LANCHOR81
 	ldr	w1, [x0, 72]
 	add	w1, w1, 1
 	str	w1, [x0, 72]
-.L1540:
+.L1542:
 	ldr	w0, [x29, 180]
-.LBE333:
-	.loc 3 1080 0
 	cmp	w20, w25
 	lsl	w2, w0, 9
-	bne	.L1541
-	.loc 3 1081 0
+	bne	.L1543
 	ldr	x0, [x28, #:lo12:.LANCHOR122]
 	mov	x1, x26
 	add	x3, x0, x27
@@ -19927,52 +11397,38 @@ FtlWrite:
 	ldr	x3, [x3, 8]
 	lsl	w0, w0, 9
 	add	x0, x3, x0
-.L1564:
-	.loc 3 1083 0
+.L1566:
 	bl	ftl_memcpy
-.LVL2035:
-	b	.L1533
-.L1534:
-	.loc 3 1058 0
+	b	.L1535
+.L1536:
 	adrp	x1, .LANCHOR113
 	ldr	x1, [x1, #:lo12:.LANCHOR113]
-	b	.L1562
-.L1537:
-.LBB334:
-	.loc 3 1070 0
+	b	.L1564
+.L1539:
 	ldr	w1, [x23, 8]
 	cmp	w20, w1
-	beq	.L1539
-	.loc 3 1071 0
+	beq	.L1541
 	adrp	x0, .LANCHOR81
 	add	x0, x0, :lo12:.LANCHOR81
 	ldr	w2, [x0, 72]
 	add	w2, w2, 1
 	str	w2, [x0, 72]
-	.loc 3 1072 0
 	adrp	x0, .LC108
 	mov	w2, w20
 	add	x0, x0, :lo12:.LC108
 	bl	printf
-.LVL2036:
-.L1539:
-	.loc 3 1074 0
+.L1541:
 	ldr	w0, [x23, 8]
 	cmp	w20, w0
-	beq	.L1540
-	.loc 3 1074 0 is_stmt 0 discriminator 1
+	beq	.L1542
 	mov	w2, 1074
 	adrp	x1, .LANCHOR178
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR178
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2037:
-	b	.L1540
-.LVL2038:
-.L1536:
-.LBE334:
-	.loc 3 1077 0 is_stmt 1
+	b	.L1542
+.L1538:
 	ldr	x0, [x28, #:lo12:.LANCHOR122]
 	ldr	x1, [x29, 104]
 	add	x0, x0, x27
@@ -19980,10 +11436,8 @@ FtlWrite:
 	mov	w1, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-.LVL2039:
-	b	.L1540
-.L1541:
-	.loc 3 1083 0
+	b	.L1542
+.L1543:
 	ldrh	w1, [x22, #:lo12:.LANCHOR12]
 	ldr	x0, [x28, #:lo12:.LANCHOR122]
 	add	x3, x0, x27
@@ -19992,260 +11446,147 @@ FtlWrite:
 	ldr	x0, [x3, 8]
 	lsl	w1, w1, 9
 	add	x1, x26, x1
-	b	.L1564
-.LVL2040:
-.L1528:
-	.loc 3 1087 0
+	b	.L1566
+.L1530:
 	ldr	x0, [x28, #:lo12:.LANCHOR122]
 	add	x3, x0, x27
 	ldrh	w0, [x22, #:lo12:.LANCHOR12]
-	b	.L1563
-.LVL2041:
-.L1548:
-	.loc 3 1105 0
+	b	.L1565
+.L1550:
 	adrp	x21, .LANCHOR99
-.LVL2042:
-	.loc 3 1107 0
 	adrp	x20, .LANCHOR83
-.LVL2043:
-	.loc 3 1108 0
 	adrp	x19, .LANCHOR82
-.LVL2044:
-	.loc 3 1105 0
 	add	x21, x21, :lo12:.LANCHOR99
-	.loc 3 1107 0
 	add	x20, x20, :lo12:.LANCHOR83
-	.loc 3 1108 0
 	add	x19, x19, :lo12:.LANCHOR82
-.L1560:
-	.loc 3 1105 0
+.L1562:
 	adrp	x0, .LANCHOR80
 	mov	w1, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w0, w1
-	bne	.L1549
-	.loc 3 1105 0 is_stmt 0 discriminator 1
+	bne	.L1551
 	ldrh	w1, [x21]
 	cmp	w1, w0
-	bne	.L1549
-	.loc 3 1106 0 is_stmt 1
+	bne	.L1551
 	mov	w0, 0
 	bl	List_get_gc_head_node
-.LVL2045:
 	bl	FtlGcRefreshBlock
-.LVL2046:
-.L1549:
-	.loc 3 1107 0
+.L1551:
 	mov	w0, 128
-	.loc 3 1109 0
 	mov	w1, 1
-	.loc 3 1107 0
 	strh	w0, [x20]
-	.loc 3 1108 0
 	strh	w0, [x19]
-	.loc 3 1109 0
 	mov	w0, w1
 	bl	rk_ftl_garbage_collect
-.LVL2047:
-	.loc 3 1110 0
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-.LVL2048:
-	.loc 3 1111 0
 	ldrh	w0, [x22, #:lo12:.LANCHOR48]
 	cmp	w0, 8
-	bls	.L1560
-	b	.L1550
-.LVL2049:
-.L1551:
-	.loc 3 971 0
+	bls	.L1562
+	b	.L1552
+.L1553:
 	mov	w0, -1
-	b	.L1515
-	.cfi_endproc
-.LFE217:
+	b	.L1517
 	.size	FtlWrite, .-FtlWrite
 	.section	.text.sftl_write,"ax",@progbits
 	.align	2
 	.global	sftl_write
 	.type	sftl_write, %function
 sftl_write:
-.LFB220:
-	.loc 3 1173 0
-	.cfi_startproc
-.LVL2050:
-	.loc 3 1174 0
 	mov	x3, x2
 	mov	w2, w1
-.LVL2051:
 	mov	w1, w0
-.LVL2052:
 	mov	w0, 0
-.LVL2053:
 	b	FtlWrite
-.LVL2054:
-	.cfi_endproc
-.LFE220:
 	.size	sftl_write, .-sftl_write
 	.section	.text.FtlLoadSysInfo,"ax",@progbits
 	.align	2
 	.global	FtlLoadSysInfo
 	.type	FtlLoadSysInfo, %function
 FtlLoadSysInfo:
-.LFB274:
-	.loc 2 1409 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -96]!
-	.cfi_def_cfa_offset 96
-	.cfi_offset 29, -96
-	.cfi_offset 30, -88
-	.loc 2 1417 0
 	mov	w1, 0
-	.loc 2 1409 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -80
-	.cfi_offset 20, -72
-	.loc 2 1414 0
 	adrp	x19, .LANCHOR106
-	.loc 2 1409 0
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -48
-	.cfi_offset 24, -40
-	.loc 2 1414 0
 	adrp	x23, .LANCHOR107
-	.loc 2 1409 0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -64
-	.cfi_offset 22, -56
-	.loc 2 1414 0
 	add	x21, x19, :lo12:.LANCHOR106
-	.loc 2 1409 0
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 25, -32
-	.cfi_offset 26, -24
-	.loc 2 1415 0
 	adrp	x26, .LANCHOR108
-	.loc 2 1409 0
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 27, -16
-	.cfi_offset 28, -8
-	.loc 2 1417 0
 	adrp	x25, .LANCHOR42
-	.loc 2 1414 0
 	ldr	x0, [x23, #:lo12:.LANCHOR107]
-	.loc 2 1417 0
 	adrp	x24, .LANCHOR5
-	.loc 2 1414 0
 	str	x0, [x21, 8]
-	.loc 2 1418 0
 	adrp	x20, .LANCHOR79
-	.loc 2 1415 0
 	ldr	x0, [x26, #:lo12:.LANCHOR108]
 	str	x0, [x21, 16]
-	.loc 2 1417 0
 	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	ldrh	w2, [x24, #:lo12:.LANCHOR5]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL2055:
-	.loc 2 1418 0
 	ldrh	w0, [x20, #:lo12:.LANCHOR79]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L1567
-.L1575:
-	.loc 2 1419 0
+	bne	.L1569
+.L1577:
 	mov	w0, -1
-.L1566:
-	.loc 2 1512 0
+.L1568:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.L1567:
-	.cfi_restore_state
+.L1569:
 	add	x27, x20, :lo12:.LANCHOR79
-	.loc 2 1421 0
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
-.LVL2056:
 	sxth	w22, w0
-.LVL2057:
-	.loc 2 1422 0
 	add	w0, w0, 1
-	.loc 2 1431 0
 	mov	w28, 61604
-	.loc 2 1422 0
 	strh	w0, [x27, 2]
-	.loc 2 1430 0
 	mov	w27, 19539
 	movk	w27, 0x4654, lsl 16
-.L1569:
-	.loc 2 1424 0
-	tbz	w22, #31, .L1572
-	.loc 2 1437 0
+.L1571:
+	tbz	w22, #31, .L1574
 	adrp	x1, .LANCHOR179
 	adrp	x0, .LC1
 	mov	w2, 1437
 	add	x1, x1, :lo12:.LANCHOR179
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2058:
-.L1571:
-	.loc 2 1439 0
+.L1573:
 	adrp	x1, .LANCHOR23
 	ldrh	w0, [x24, #:lo12:.LANCHOR5]
 	ldrh	w1, [x1, #:lo12:.LANCHOR23]
 	add	x0, x0, 24
 	cmp	x1, x0, lsl 1
-	bcs	.L1574
-	.loc 2 1439 0 is_stmt 0 discriminator 1
+	bcs	.L1576
 	adrp	x1, .LANCHOR179
 	adrp	x0, .LC1
 	mov	w2, 1439
 	add	x1, x1, :lo12:.LANCHOR179
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2059:
-.L1574:
-	.loc 2 1441 0 is_stmt 1
+.L1576:
 	add	x22, x19, :lo12:.LANCHOR106
-.LVL2060:
 	adrp	x19, .LANCHOR39
 	add	x21, x19, :lo12:.LANCHOR39
 	mov	w2, 48
 	mov	x0, x21
 	ldr	x1, [x22, 8]
 	bl	ftl_memcpy
-.LVL2061:
-	.loc 2 1442 0
 	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	ldrh	w2, [x24, #:lo12:.LANCHOR5]
 	ldr	x1, [x22, 8]
 	lsl	w2, w2, 1
 	add	x1, x1, 48
 	bl	ftl_memcpy
-.LVL2062:
-	.loc 2 1443 0
 	ldrh	w1, [x24, #:lo12:.LANCHOR5]
 	ldr	x0, [x22, 8]
 	lsr	w2, w1, 3
@@ -20257,419 +11598,252 @@ FtlLoadSysInfo:
 	adrp	x0, .LANCHOR1
 	ldr	x0, [x0, #:lo12:.LANCHOR1]
 	bl	ftl_memcpy
-.LVL2063:
-	.loc 2 1445 0
 	ldr	w1, [x19, #:lo12:.LANCHOR39]
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1575
-	.loc 2 1448 0
+	bne	.L1577
 	add	x20, x20, :lo12:.LANCHOR79
-	.loc 2 1449 0
 	adrp	x0, .LANCHOR10
-	.loc 2 1448 0
 	ldrh	w1, [x21, 8]
-	.loc 2 1449 0
 	ldrb	w2, [x21, 10]
 	ldrh	w0, [x0, #:lo12:.LANCHOR10]
-	.loc 2 1448 0
 	strh	w1, [x20, 6]
-	.loc 2 1449 0
 	cmp	w2, w0
-	bne	.L1575
-	.loc 2 1452 0
+	bne	.L1577
 	adrp	x0, .LANCHOR180
-	.loc 2 1453 0
 	adrp	x2, .LANCHOR61
-	.loc 2 1455 0
 	adrp	x3, .LANCHOR3
-	.loc 2 1452 0
 	str	w1, [x0, #:lo12:.LANCHOR180]
-	.loc 2 1453 0
 	adrp	x0, .LANCHOR19
-	.loc 2 1455 0
 	ldrh	w3, [x3, #:lo12:.LANCHOR3]
-	.loc 2 1453 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	mul	w0, w0, w1
 	str	w0, [x2, #:lo12:.LANCHOR61]
-	.loc 2 1454 0
 	adrp	x2, .LANCHOR12
 	ldrh	w2, [x2, #:lo12:.LANCHOR12]
 	mul	w0, w2, w0
 	adrp	x2, .LANCHOR34
 	str	w0, [x2, #:lo12:.LANCHOR34]
-	.loc 2 1455 0
 	adrp	x0, .LANCHOR7
 	ldr	w2, [x0, #:lo12:.LANCHOR7]
 	adrp	x0, .LANCHOR37+6
 	ldrh	w0, [x0, #:lo12:.LANCHOR37+6]
-	.loc 2 1461 0
 	cmp	w1, w2
-	.loc 2 1455 0
 	sub	w0, w2, w0
 	sub	w0, w0, w1
 	udiv	w0, w0, w3
 	adrp	x3, .LANCHOR78
 	strh	w0, [x3, #:lo12:.LANCHOR78]
-	.loc 2 1461 0
-	bls	.L1576
-	.loc 2 1461 0 is_stmt 0 discriminator 1
+	bls	.L1578
 	adrp	x1, .LANCHOR179
 	adrp	x0, .LC1
 	mov	w2, 1461
 	add	x1, x1, :lo12:.LANCHOR179
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2064:
-.L1576:
-	.loc 2 1463 0 is_stmt 1
+.L1578:
 	add	x1, x19, :lo12:.LANCHOR39
 	adrp	x0, .LANCHOR51
 	add	x3, x0, :lo12:.LANCHOR51
-	.loc 2 1468 0
 	adrp	x20, .LANCHOR80
-	.loc 2 1464 0
 	ldrh	w2, [x1, 16]
-	.loc 2 1463 0
 	ldrh	w6, [x1, 14]
 	strh	w6, [x0, #:lo12:.LANCHOR51]
-	.loc 2 1464 0
 	lsr	w4, w2, 6
-	.loc 2 1465 0
 	and	w2, w2, 63
 	strb	w2, [x3, 6]
-	.loc 2 1466 0
 	ldrb	w2, [x1, 11]
 	strb	w2, [x3, 8]
-	.loc 2 1468 0
 	add	x2, x20, :lo12:.LANCHOR80
-	.loc 2 1464 0
 	strh	w4, [x3, 2]
-	.loc 2 1468 0
 	mov	w3, -1
 	strh	w3, [x20, #:lo12:.LANCHOR80]
-	.loc 2 1469 0
 	strh	wzr, [x2, 2]
-	.loc 2 1470 0
 	strb	wzr, [x2, 6]
-	.loc 2 1471 0
 	strb	wzr, [x2, 8]
-	.loc 2 1473 0
 	adrp	x2, .LANCHOR52
 	ldrh	w3, [x1, 18]
 	add	x4, x2, :lo12:.LANCHOR52
 	strh	w3, [x2, #:lo12:.LANCHOR52]
 	mov	x21, x2
-	.loc 2 1474 0
 	ldrh	w3, [x1, 20]
 	lsr	w5, w3, 6
-	.loc 2 1475 0
 	and	w3, w3, 63
 	strb	w3, [x4, 6]
-	.loc 2 1476 0
 	ldrb	w3, [x1, 12]
-	.loc 2 1474 0
 	strh	w5, [x4, 2]
-	.loc 2 1476 0
 	strb	w3, [x4, 8]
-	.loc 2 1478 0
 	adrp	x4, .LANCHOR53
 	ldrh	w3, [x1, 22]
 	add	x5, x4, :lo12:.LANCHOR53
 	strh	w3, [x4, #:lo12:.LANCHOR53]
 	mov	x22, x4
-	.loc 2 1479 0
 	ldrh	w3, [x1, 24]
 	lsr	w7, w3, 6
-	.loc 2 1480 0
 	and	w3, w3, 63
 	strb	w3, [x5, 6]
-	.loc 2 1481 0
 	ldrb	w3, [x1, 13]
 	strb	w3, [x5, 8]
-	.loc 2 1483 0
 	adrp	x3, .LANCHOR67
-	.loc 2 1479 0
 	strh	w7, [x5, 2]
-	.loc 2 1488 0
 	ldr	w5, [x1, 32]
-	.loc 2 1483 0
 	str	wzr, [x3, #:lo12:.LANCHOR67]
-	.loc 2 1484 0
 	adrp	x3, .LANCHOR64
 	str	wzr, [x3, #:lo12:.LANCHOR64]
-	.loc 2 1485 0
 	adrp	x3, .LANCHOR62
 	str	wzr, [x3, #:lo12:.LANCHOR62]
-	.loc 2 1486 0
 	adrp	x3, .LANCHOR66
 	str	wzr, [x3, #:lo12:.LANCHOR66]
-	.loc 2 1488 0
 	adrp	x3, .LANCHOR72
 	str	w5, [x3, #:lo12:.LANCHOR72]
-	.loc 2 1489 0
 	adrp	x3, .LANCHOR73
 	str	wzr, [x3, #:lo12:.LANCHOR73]
-	.loc 2 1490 0
 	adrp	x3, .LANCHOR76
 	str	wzr, [x3, #:lo12:.LANCHOR76]
-	.loc 2 1491 0
 	adrp	x3, .LANCHOR65
 	str	wzr, [x3, #:lo12:.LANCHOR65]
-	.loc 2 1493 0
 	ldr	w3, [x1, 40]
 	adrp	x1, .LANCHOR70
 	ldr	w5, [x1, #:lo12:.LANCHOR70]
 	cmp	w3, w5
-	bls	.L1577
-	.loc 2 1494 0
+	bls	.L1579
 	str	w3, [x1, #:lo12:.LANCHOR70]
-.L1577:
-	.loc 2 1496 0
+.L1579:
 	add	x19, x19, :lo12:.LANCHOR39
 	adrp	x1, .LANCHOR71
 	ldr	w3, [x1, #:lo12:.LANCHOR71]
 	ldr	w2, [x19, 36]
 	cmp	w2, w3
-	bls	.L1578
-	.loc 2 1497 0
+	bls	.L1580
 	str	w2, [x1, #:lo12:.LANCHOR71]
-.L1578:
-	.loc 2 1499 0
+.L1580:
 	mov	w1, 65535
 	cmp	w6, w1
-	beq	.L1579
-	.loc 2 1500 0
+	beq	.L1581
 	add	x0, x0, :lo12:.LANCHOR51
 	bl	make_superblock
-.LVL2065:
-.L1579:
-	.loc 2 1502 0
+.L1581:
 	ldrh	w2, [x21, #:lo12:.LANCHOR52]
 	mov	w1, 65535
 	add	x0, x21, :lo12:.LANCHOR52
 	cmp	w2, w1
-	beq	.L1580
-	.loc 2 1503 0
+	beq	.L1582
 	bl	make_superblock
-.LVL2066:
-.L1580:
-	.loc 2 1505 0
+.L1582:
 	ldrh	w2, [x22, #:lo12:.LANCHOR53]
 	mov	w1, 65535
 	add	x0, x22, :lo12:.LANCHOR53
 	cmp	w2, w1
-	beq	.L1581
-	.loc 2 1506 0
+	beq	.L1583
 	bl	make_superblock
-.LVL2067:
-.L1581:
-	.loc 2 1508 0
+.L1583:
 	ldrh	w2, [x20, #:lo12:.LANCHOR80]
 	mov	w1, 65535
 	add	x0, x20, :lo12:.LANCHOR80
 	cmp	w2, w1
-	beq	.L1582
-	.loc 2 1509 0
+	beq	.L1584
 	bl	make_superblock
-.LVL2068:
-.L1582:
-	.loc 2 1511 0
+.L1584:
 	mov	w0, 0
-	b	.L1566
-.LVL2069:
-.L1572:
-	.loc 2 1425 0
+	b	.L1568
+.L1574:
 	ldrh	w0, [x20, #:lo12:.LANCHOR79]
-	.loc 2 1427 0
 	mov	w2, 1
 	mov	w1, w2
-	.loc 2 1425 0
 	orr	w0, w22, w0, lsl 10
 	str	w0, [x21, 4]
-	.loc 2 1426 0
 	ldr	x0, [x23, #:lo12:.LANCHOR107]
 	str	x0, [x21, 8]
-	.loc 2 1427 0
 	mov	x0, x21
 	bl	FlashReadPages
-.LVL2070:
-	.loc 2 1430 0
 	ldr	w0, [x21]
 	cmn	w0, #1
-	beq	.L1570
-	.loc 2 1431 0 discriminator 1
+	beq	.L1572
 	ldr	x0, [x23, #:lo12:.LANCHOR107]
-	.loc 2 1430 0 discriminator 1
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L1570
-	.loc 2 1432 0
+	bne	.L1572
 	ldr	x0, [x26, #:lo12:.LANCHOR108]
 	ldrh	w0, [x0]
-	.loc 2 1431 0
 	cmp	w0, w28
-	beq	.L1571
-.L1570:
+	beq	.L1573
+.L1572:
 	sub	w22, w22, #1
-.LVL2071:
 	sxth	w22, w22
-.LVL2072:
-	b	.L1569
-	.cfi_endproc
-.LFE274:
+	b	.L1571
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
 	.section	.text.FtlSysBlkInit,"ax",@progbits
 	.align	2
 	.global	FtlSysBlkInit
 	.type	FtlSysBlkInit, %function
 FtlSysBlkInit:
-.LFB292:
-	.loc 2 2356 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -64]!
-	.cfi_def_cfa_offset 64
-	.cfi_offset 29, -64
-	.cfi_offset 30, -56
-	.loc 2 2362 0
 	adrp	x0, .LANCHOR4
-	.loc 2 2356 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 2 2362 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR4]
-	.loc 2 2356 0
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -48
-	.cfi_offset 20, -40
-	.loc 2 2360 0
 	adrp	x20, .LANCHOR161
-	.loc 2 2356 0
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 21, -32
-	.cfi_offset 22, -24
-	.cfi_offset 23, -16
-	.cfi_offset 24, -8
-	.loc 2 2360 0
 	strh	wzr, [x20, #:lo12:.LANCHOR161]
-	.loc 2 2362 0
 	bl	FtlFreeSysBlkQueueInit
-.LVL2073:
-	.loc 2 2363 0
 	bl	FtlScanSysBlk
-.LVL2074:
-	.loc 2 2364 0
 	adrp	x0, .LANCHOR79
 	ldrh	w1, [x0, #:lo12:.LANCHOR79]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1589
-.L1591:
-	.loc 2 2365 0
+	bne	.L1591
+.L1593:
 	mov	w23, -1
-.L1588:
-	.loc 2 2451 0
+.L1590:
 	mov	w0, w23
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.L1589:
-	.cfi_restore_state
-	.loc 2 2367 0
+.L1591:
 	bl	FtlLoadSysInfo
-.LVL2075:
 	mov	w23, w0
-	cbnz	w0, .L1591
-	.loc 2 2370 0
+	cbnz	w0, .L1593
 	bl	FtlLoadMapInfo
-.LVL2076:
-	.loc 2 2371 0
 	bl	FtlLoadVonderInfo
-.LVL2077:
-	.loc 2 2372 0
 	bl	Ftl_load_ext_data
-.LVL2078:
-	.loc 2 2374 0
 	bl	FtlLoadEctTbl
-.LVL2079:
-	.loc 2 2375 0
 	bl	FtlFreeSysBLkSort
-.LVL2080:
-	.loc 2 2377 0
 	bl	SupperBlkListInit
-.LVL2081:
-	.loc 2 2378 0
 	bl	FtlPowerLostRecovery
-.LVL2082:
-	.loc 2 2380 0
 	mov	w0, 1
 	bl	FtlUpdateVaildLpn
-.LVL2083:
-.LBB338:
-.LBB339:
-	.loc 2 2382 0
 	adrp	x0, .LANCHOR33
 	ldrh	w2, [x0, #:lo12:.LANCHOR33]
-	.loc 2 2383 0
 	adrp	x0, .LANCHOR55
 	ldr	x1, [x0, #:lo12:.LANCHOR55]
-	.loc 2 2382 0
 	mov	w0, 0
 	add	x1, x1, 4
-.L1592:
-.LVL2084:
+.L1594:
 	cmp	w0, w2
-	bge	.L1597
-	.loc 2 2383 0
+	bge	.L1599
 	ldr	w3, [x1], 16
-	tbz	w3, #31, .L1593
-.L1597:
-	.loc 2 2386 0
+	tbz	w3, #31, .L1595
+.L1599:
 	adrp	x19, .LANCHOR39
 	add	x3, x19, :lo12:.LANCHOR39
-	.loc 2 2388 0
 	cmp	w0, w2
 	adrp	x22, .LANCHOR51
-	.loc 2 2386 0
 	ldrh	w1, [x3, 28]
 	add	w1, w1, 1
 	strh	w1, [x3, 28]
-	.loc 2 2388 0
-	bge	.L1601
-.LVL2085:
-.L1594:
-	.loc 2 2389 0
+	bge	.L1603
+.L1596:
 	add	x21, x22, :lo12:.LANCHOR51
-	.loc 2 2390 0
 	adrp	x24, .LANCHOR52
-	.loc 2 2389 0
 	mov	x0, x21
-	.loc 2 2390 0
 	add	x20, x24, :lo12:.LANCHOR52
-	.loc 2 2389 0
 	bl	FtlSuperblockPowerLostFix
-.LVL2086:
-	.loc 2 2390 0
 	mov	x0, x20
 	bl	FtlSuperblockPowerLostFix
-.LVL2087:
-.LBB340:
-	.loc 2 2396 0
 	adrp	x0, .LANCHOR42
 	ldrh	w3, [x21, 4]
 	ldr	x1, [x0, #:lo12:.LANCHOR42]
@@ -20677,706 +11851,394 @@ FtlSysBlkInit:
 	lsl	x0, x0, 1
 	ldrh	w2, [x1, x0]
 	sub	w2, w2, w3
-	.loc 2 2397 0
 	adrp	x3, .LANCHOR19
-	.loc 2 2396 0
 	strh	w2, [x1, x0]
-	.loc 2 2398 0
 	strb	wzr, [x21, 6]
-	.loc 2 2397 0
 	ldrh	w0, [x3, #:lo12:.LANCHOR19]
 	strh	w0, [x21, 2]
-	.loc 2 2402 0
 	ldrh	w0, [x24, #:lo12:.LANCHOR52]
-	.loc 2 2399 0
 	strh	wzr, [x21, 4]
-.LVL2088:
-	.loc 2 2402 0
 	ldrh	w4, [x20, 4]
 	lsl	x0, x0, 1
 	ldrh	w2, [x1, x0]
 	sub	w2, w2, w4
 	strh	w2, [x1, x0]
-	.loc 2 2404 0
 	strb	wzr, [x20, 6]
-	.loc 2 2403 0
 	ldrh	w0, [x3, #:lo12:.LANCHOR19]
 	strh	w0, [x20, 2]
-	.loc 2 2405 0
 	strh	wzr, [x20, 4]
-.LBE340:
-	.loc 2 2409 0
 	adrp	x0, .LANCHOR144
 	add	x0, x0, :lo12:.LANCHOR144
 	bl	FtlMapBlkWriteDump_data
-.LVL2089:
-	.loc 2 2410 0
 	adrp	x0, .LANCHOR149
 	add	x0, x0, :lo12:.LANCHOR149
 	bl	FtlMapBlkWriteDump_data
-.LVL2090:
-	.loc 2 2422 0
 	add	x1, x19, :lo12:.LANCHOR39
 	ldrh	w0, [x1, 30]
 	add	w0, w0, 1
 	strh	w0, [x1, 30]
-	.loc 2 2423 0
 	bl	l2p_flush
-.LVL2091:
-	.loc 2 2424 0
 	bl	FtlVpcTblFlush
-.LVL2092:
-.L1603:
-	.loc 2 2428 0
+.L1605:
 	bl	FtlVpcTblFlush
-.LVL2093:
-	.loc 2 2432 0
 	add	x21, x22, :lo12:.LANCHOR51
 	ldrh	w0, [x22, #:lo12:.LANCHOR51]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L1600
+	beq	.L1602
 	ldrh	w1, [x21, 4]
-	cbnz	w1, .L1600
-	.loc 2 2434 0
+	cbnz	w1, .L1602
 	adrp	x22, .LANCHOR52
 	add	x20, x22, :lo12:.LANCHOR52
-	.loc 2 2433 0
 	ldrh	w1, [x20, 4]
-	cbnz	w1, .L1600
-	.loc 2 2435 0
+	cbnz	w1, .L1602
 	bl	FtlGcRefreshBlock
-.LVL2094:
-	.loc 2 2436 0
 	ldrh	w0, [x22, #:lo12:.LANCHOR52]
 	bl	FtlGcRefreshBlock
-.LVL2095:
-	.loc 2 2437 0
 	mov	x0, x21
 	bl	allocate_new_data_superblock
-.LVL2096:
-	.loc 2 2438 0
 	mov	x0, x20
 	bl	allocate_new_data_superblock
-.LVL2097:
-.L1600:
-	.loc 2 2443 0
+.L1602:
 	add	x19, x19, :lo12:.LANCHOR39
 	ldrh	w0, [x19, 28]
 	tst	x0, 31
-	bne	.L1588
-	.loc 2 2444 0
+	bne	.L1590
 	bl	FtlVpcCheckAndModify
-.LVL2098:
-	b	.L1588
-.LVL2099:
-.L1593:
-	.loc 2 2382 0
+	b	.L1590
+.L1595:
 	add	w0, w0, 1
-.LVL2100:
-	b	.L1592
-.L1601:
-	.loc 2 2388 0
+	b	.L1594
+.L1603:
 	ldrh	w0, [x20, #:lo12:.LANCHOR161]
-.LVL2101:
-	cbnz	w0, .L1594
-	.loc 2 2427 0
+	cbnz	w0, .L1596
 	bl	l2p_flush
-.LVL2102:
-	b	.L1603
-.LBE339:
-.LBE338:
-	.cfi_endproc
-.LFE292:
+	b	.L1605
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.section	.text.ftl_low_format,"ax",@progbits
 	.align	2
 	.global	ftl_low_format
 	.type	ftl_low_format, %function
 ftl_low_format:
-.LFB210:
-	.loc 3 623 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -80]!
-	.cfi_def_cfa_offset 80
-	.cfi_offset 29, -80
-	.cfi_offset 30, -72
-	.loc 3 630 0
 	adrp	x0, .LANCHOR71
-	.loc 3 623 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -32
-	.cfi_offset 24, -24
-	.loc 3 631 0
 	adrp	x24, .LANCHOR4
-	.loc 3 630 0
 	str	wzr, [x0, #:lo12:.LANCHOR71]
-	.loc 3 631 0
 	ldrh	w0, [x24, #:lo12:.LANCHOR4]
-	.loc 3 623 0
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -64
-	.cfi_offset 20, -56
-	.loc 3 629 0
 	adrp	x20, .LANCHOR70
-	.loc 3 623 0
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 21, -48
-	.cfi_offset 22, -40
-	.cfi_offset 25, -16
-	.cfi_offset 26, -8
-	.loc 3 629 0
 	str	wzr, [x20, #:lo12:.LANCHOR70]
-	.loc 3 631 0
 	bl	FtlFreeSysBlkQueueInit
-.LVL2103:
-	.loc 3 632 0
 	bl	FtlLoadBbt
-.LVL2104:
-	cbz	w0, .L1605
-	.loc 3 633 0
+	cbz	w0, .L1607
 	bl	FtlMakeBbt
-.LVL2105:
-.L1605:
-	.loc 3 635 0 discriminator 1
+.L1607:
 	adrp	x23, .LANCHOR12
-	.loc 3 636 0 discriminator 1
 	adrp	x0, .LANCHOR115
-	.loc 3 637 0 discriminator 1
 	mov	w6, 23752
-	.loc 3 635 0 discriminator 1
 	ldrh	w1, [x23, #:lo12:.LANCHOR12]
-	.loc 3 637 0 discriminator 1
 	movk	w6, 0xa0f, lsl 16
-	.loc 3 636 0 discriminator 1
 	ldr	x4, [x0, #:lo12:.LANCHOR115]
-	.loc 3 637 0 discriminator 1
 	adrp	x0, .LANCHOR113
-	.loc 3 635 0 discriminator 1
 	lsl	w1, w1, 7
-	.loc 3 637 0 discriminator 1
 	ldr	x5, [x0, #:lo12:.LANCHOR113]
 	mov	w0, 0
-.L1606:
-.LVL2106:
-	.loc 3 635 0 discriminator 1
+.L1608:
 	cmp	w0, w1
-	blt	.L1607
-.LVL2107:
-	.loc 3 642 0
+	blt	.L1609
 	adrp	x21, .LANCHOR5
 	adrp	x22, .LANCHOR6
 	add	x26, x22, :lo12:.LANCHOR6
-	.loc 3 641 0
 	mov	w19, 0
-	.loc 3 642 0
 	ldrh	w25, [x21, #:lo12:.LANCHOR5]
-.LVL2108:
-.L1608:
-	.loc 3 642 0 is_stmt 0 discriminator 1
+.L1610:
 	ldrh	w0, [x26]
 	cmp	w0, w25
-	bhi	.L1609
-	.loc 3 645 0 is_stmt 1
+	bhi	.L1611
 	adrp	x25, .LANCHOR3
-.LVL2109:
 	sub	w1, w19, #2
 	ldrh	w0, [x25, #:lo12:.LANCHOR3]
 	cmp	w1, w0, lsl 1
-	bgt	.L1610
-.LVL2110:
-.L1614:
-	.loc 3 656 0
+	bgt	.L1612
+.L1616:
 	add	x26, x21, :lo12:.LANCHOR5
-	.loc 3 641 0
 	mov	w19, 0
 	mov	w24, 0
-.L1611:
-.LVL2111:
-	.loc 3 656 0 discriminator 1
+.L1613:
 	ldrh	w0, [x26]
 	cmp	w0, w24
-	bhi	.L1615
-	.loc 3 658 0
+	bhi	.L1617
 	adrp	x0, .LANCHOR112
 	ldrh	w1, [x22, #:lo12:.LANCHOR6]
-	.loc 3 661 0
 	ldrh	w4, [x25, #:lo12:.LANCHOR3]
-	.loc 3 662 0
 	adrp	x2, .LANCHOR78
-	.loc 3 658 0
 	str	w1, [x0, #:lo12:.LANCHOR112]
-	.loc 3 661 0
 	adrp	x0, .LANCHOR7
 	adrp	x3, .LANCHOR61
 	ldr	w1, [x0, #:lo12:.LANCHOR7]
 	udiv	w5, w1, w4
-	.loc 3 662 0
 	ubfx	x0, x5, 5, 16
-	.loc 3 661 0
 	str	w5, [x3, #:lo12:.LANCHOR61]
-	.loc 3 662 0
 	add	w6, w0, 36
 	strh	w6, [x2, #:lo12:.LANCHOR78]
-	.loc 3 663 0
 	mov	w6, 24
 	mul	w6, w4, w6
 	cmp	w19, w6
-	ble	.L1616
-	.loc 3 664 0
+	ble	.L1618
 	sub	w1, w1, w19
 	udiv	w1, w1, w4
 	str	w1, [x3, #:lo12:.LANCHOR61]
-	.loc 3 665 0
 	lsr	w1, w1, 5
 	add	w1, w1, 24
 	strh	w1, [x2, #:lo12:.LANCHOR78]
-.L1616:
-	.loc 3 668 0
+.L1618:
 	adrp	x1, .LANCHOR15
 	ldrh	w1, [x1, #:lo12:.LANCHOR15]
-	cbz	w1, .L1618
-	.loc 3 669 0
+	cbz	w1, .L1620
 	ldrh	w6, [x2, #:lo12:.LANCHOR78]
 	add	w6, w6, w1, lsr 1
 	strh	w6, [x2, #:lo12:.LANCHOR78]
-	.loc 3 670 0
 	mul	w6, w1, w4
 	cmp	w19, w6
-	bge	.L1618
-	.loc 3 672 0
+	bge	.L1620
 	add	w1, w1, 32
-	.loc 3 671 0
 	str	w5, [x3, #:lo12:.LANCHOR61]
-	.loc 3 672 0
 	add	w1, w0, w1
 	strh	w1, [x2, #:lo12:.LANCHOR78]
-.L1618:
-	.loc 3 677 0
+.L1620:
 	ldrh	w1, [x2, #:lo12:.LANCHOR78]
 	adrp	x25, .LANCHOR180
 	ldr	w0, [x3, #:lo12:.LANCHOR61]
-	.loc 3 687 0
 	adrp	x24, .LANCHOR42
-.LVL2112:
-	.loc 3 677 0
 	sub	w0, w0, w1
-	.loc 3 678 0
 	adrp	x1, .LANCHOR19
 	ldrh	w1, [x1, #:lo12:.LANCHOR19]
-	.loc 3 677 0
 	mul	w0, w0, w4
 	str	w0, [x25, #:lo12:.LANCHOR180]
-	.loc 3 678 0
 	mul	w0, w1, w0
-	.loc 3 679 0
 	ldrh	w1, [x23, #:lo12:.LANCHOR12]
-	.loc 3 678 0
 	str	w0, [x3, #:lo12:.LANCHOR61]
-	.loc 3 689 0
 	mov	w23, -1
-	.loc 3 679 0
 	mul	w0, w1, w0
 	adrp	x1, .LANCHOR34
 	str	w0, [x1, #:lo12:.LANCHOR34]
-	.loc 3 684 0
 	bl	FtlBbmTblFlush
-.LVL2113:
-	.loc 3 687 0
 	ldr	x0, [x24, #:lo12:.LANCHOR42]
 	mov	w1, 0
 	ldrh	w2, [x22, #:lo12:.LANCHOR6]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL2114:
-	.loc 3 688 0
 	adrp	x0, .LANCHOR59
-	.loc 3 689 0
 	adrp	x1, .LANCHOR80
-	.loc 3 698 0
 	ldrh	w2, [x21, #:lo12:.LANCHOR5]
-	.loc 3 688 0
 	str	wzr, [x0, #:lo12:.LANCHOR59]
-	.loc 3 689 0
 	add	x0, x1, :lo12:.LANCHOR80
 	strh	w23, [x1, #:lo12:.LANCHOR80]
-	.loc 3 698 0
 	mov	w1, 255
 	lsr	w2, w2, 3
-	.loc 3 690 0
 	strh	wzr, [x0, 2]
-	.loc 3 691 0
 	strb	wzr, [x0, 6]
-	.loc 3 692 0
 	strb	wzr, [x0, 8]
-	.loc 3 694 0
 	adrp	x0, .LANCHOR51
 	add	x19, x0, :lo12:.LANCHOR51
-.LVL2115:
-	.loc 3 696 0
 	strh	wzr, [x0, #:lo12:.LANCHOR51]
-	.loc 3 697 0
 	mov	w0, 1
 	strb	w0, [x19, 8]
-	.loc 3 698 0
 	adrp	x0, .LANCHOR1
-	.loc 3 694 0
 	strh	wzr, [x19, 2]
-	.loc 3 698 0
 	ldr	x0, [x0, #:lo12:.LANCHOR1]
-	.loc 3 695 0
 	strb	wzr, [x19, 6]
-	.loc 3 698 0
 	bl	ftl_memset
-.LVL2116:
-.L1620:
-	.loc 3 701 0
+.L1622:
 	mov	x0, x19
 	bl	make_superblock
-.LVL2117:
-	.loc 3 702 0
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1621
-	.loc 3 705 0
+	cbnz	w1, .L1623
 	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
-	.loc 3 706 0
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	.loc 3 707 0
-	b	.L1620
-.LVL2118:
-.L1607:
-	.loc 3 636 0 discriminator 3
+	b	.L1622
+.L1609:
 	ubfiz	x3, x0, 2, 16
 	mvn	w2, w0
 	orr	w2, w0, w2, lsl 16
-	.loc 3 635 0 discriminator 3
 	add	w0, w0, 1
-.LVL2119:
 	and	w0, w0, 65535
-.LVL2120:
-	.loc 3 636 0 discriminator 3
 	str	w2, [x4, x3]
-	.loc 3 637 0 discriminator 3
 	str	w6, [x5, x3]
-	b	.L1606
-.LVL2121:
-.L1609:
-	.loc 3 643 0 discriminator 3
+	b	.L1608
+.L1611:
 	mov	w0, w25
 	mov	w1, 1
-	.loc 3 642 0 discriminator 3
 	add	w25, w25, 1
-.LVL2122:
-	.loc 3 643 0 discriminator 3
 	bl	FtlLowFormatEraseBlock
-.LVL2123:
 	add	w19, w19, w0
-.LVL2124:
-	.loc 3 642 0 discriminator 3
 	and	w25, w25, 65535
-	.loc 3 643 0 discriminator 3
 	and	w19, w19, 65535
-.LVL2125:
-	b	.L1608
-.LVL2126:
-.L1610:
-	.loc 3 647 0
+	b	.L1610
+.L1612:
 	udiv	w0, w19, w0
 	adrp	x1, .LANCHOR31
 	ldr	w19, [x1, #:lo12:.LANCHOR31]
-.LVL2127:
 	add	w0, w0, w19
 	bl	FtlSysBlkNumInit
-.LVL2128:
-	.loc 3 648 0
 	ldrh	w0, [x24, #:lo12:.LANCHOR4]
-	.loc 3 650 0
 	add	x24, x22, :lo12:.LANCHOR6
-	.loc 3 648 0
 	bl	FtlFreeSysBlkQueueInit
-.LVL2129:
-	.loc 3 650 0
 	ldrh	w19, [x21, #:lo12:.LANCHOR5]
-.LVL2130:
-.L1612:
-	.loc 3 650 0 is_stmt 0 discriminator 1
+.L1614:
 	ldrh	w0, [x24]
 	cmp	w0, w19
-	bls	.L1614
-	.loc 3 651 0 is_stmt 1 discriminator 3
+	bls	.L1616
 	mov	w0, w19
-	.loc 3 650 0 discriminator 3
 	add	w19, w19, 1
-.LVL2131:
-	.loc 3 651 0 discriminator 3
 	mov	w1, 1
-	.loc 3 650 0 discriminator 3
 	and	w19, w19, 65535
-	.loc 3 651 0 discriminator 3
 	bl	FtlLowFormatEraseBlock
-.LVL2132:
-	b	.L1612
-.LVL2133:
-.L1615:
-	.loc 3 657 0 discriminator 3
+	b	.L1614
+.L1617:
 	mov	w0, w24
 	mov	w1, 0
-	.loc 3 656 0 discriminator 3
 	add	w24, w24, 1
-.LVL2134:
-	.loc 3 657 0 discriminator 3
 	bl	FtlLowFormatEraseBlock
-.LVL2135:
 	add	w19, w19, w0
-.LVL2136:
-	.loc 3 656 0 discriminator 3
 	and	w24, w24, 65535
-	.loc 3 657 0 discriminator 3
 	and	w19, w19, 65535
-.LVL2137:
-	b	.L1611
-.LVL2138:
-.L1621:
-	.loc 3 709 0
+	b	.L1613
+.L1623:
 	ldr	w1, [x20, #:lo12:.LANCHOR70]
-	.loc 3 710 0
 	ubfiz	x0, x0, 1, 16
-	.loc 3 709 0
 	str	w1, [x19, 12]
-	.loc 3 721 0
 	mov	w23, -1
-	.loc 3 709 0
 	add	w1, w1, 1
 	str	w1, [x20, #:lo12:.LANCHOR70]
-	.loc 3 710 0
 	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ldrh	w2, [x19, 4]
 	strh	w2, [x1, x0]
-	.loc 3 712 0
 	adrp	x2, .LANCHOR52
 	add	x0, x2, :lo12:.LANCHOR52
-	.loc 3 714 0
 	ldrh	w1, [x19]
-	.loc 3 717 0
 	mov	x19, x0
-	.loc 3 714 0
 	add	w1, w1, 1
-	.loc 3 712 0
 	strh	wzr, [x0, 2]
-	.loc 3 714 0
 	strh	w1, [x2, #:lo12:.LANCHOR52]
-	.loc 3 715 0
 	mov	w1, 1
-	.loc 3 713 0
 	strb	wzr, [x0, 6]
-	.loc 3 715 0
 	strb	w1, [x0, 8]
-.L1622:
-	.loc 3 717 0
+.L1624:
 	mov	x0, x19
 	bl	make_superblock
-.LVL2139:
-	.loc 3 718 0
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1623
-	.loc 3 721 0
+	cbnz	w1, .L1625
 	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
-	.loc 3 722 0
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	.loc 3 723 0
-	b	.L1622
-.L1623:
-	.loc 3 725 0
+	b	.L1624
+.L1625:
 	ldr	w1, [x20, #:lo12:.LANCHOR70]
-	.loc 3 726 0
 	ubfiz	x0, x0, 1, 16
-	.loc 3 725 0
 	str	w1, [x19, 12]
 	add	w1, w1, 1
 	str	w1, [x20, #:lo12:.LANCHOR70]
-	.loc 3 726 0
 	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ldrh	w2, [x19, 4]
-	.loc 3 727 0
 	mov	w19, -1
-	.loc 3 726 0
 	strh	w2, [x1, x0]
-	.loc 3 727 0
 	adrp	x0, .LANCHOR53
 	strh	w19, [x0, #:lo12:.LANCHOR53]
-	.loc 3 730 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL2140:
 	adrp	x2, .LANCHOR79
 	add	x1, x2, :lo12:.LANCHOR79
 	strh	w0, [x2, #:lo12:.LANCHOR79]
-	.loc 3 733 0
 	ldr	w0, [x25, #:lo12:.LANCHOR180]
 	strh	w0, [x1, 6]
-	.loc 3 734 0
 	ldr	w0, [x20, #:lo12:.LANCHOR70]
 	str	w0, [x1, 8]
 	add	w0, w0, 1
-	.loc 3 731 0
 	strh	wzr, [x1, 2]
-	.loc 3 732 0
 	strh	w19, [x1, 4]
-	.loc 3 734 0
 	str	w0, [x20, #:lo12:.LANCHOR70]
-	.loc 3 735 0
 	bl	FtlVpcTblFlush
-.LVL2141:
-	.loc 3 736 0
 	bl	FtlSysBlkInit
-.LVL2142:
-	cbnz	w0, .L1624
-	.loc 3 737 0
+	cbnz	w0, .L1626
 	adrp	x0, .LANCHOR86
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR86]
-.L1624:
-	.loc 3 739 0
+.L1626:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE210:
 	.size	ftl_low_format, .-ftl_low_format
 	.section	.text.sftl_init,"ax",@progbits
 	.align	2
 	.global	sftl_init
 	.type	sftl_init, %function
 sftl_init:
-.LFB211:
-	.loc 3 743 0
-	.cfi_startproc
-.LVL2143:
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 3 749 0
 	adrp	x1, .LC70
 	add	x1, x1, :lo12:.LC70
-	.loc 3 746 0
 	mov	w0, -1
-	.loc 3 743 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	str	x19, [sp, 16]
-	.cfi_offset 19, -16
-	.loc 3 746 0
 	adrp	x19, .LANCHOR86
 	str	w0, [x19, #:lo12:.LANCHOR86]
-	.loc 3 749 0
 	adrp	x0, .LC71
 	add	x0, x0, :lo12:.LC71
 	bl	printf
-.LVL2144:
-	.loc 3 750 0
 	adrp	x0, .LANCHOR0
 	add	x0, x0, :lo12:.LANCHOR0
 	bl	FtlConstantsInit
-.LVL2145:
-	.loc 3 751 0
 	bl	FtlMemInit
-.LVL2146:
-	.loc 3 752 0
 	bl	FtlVariablesInit
-.LVL2147:
-	.loc 3 753 0
 	adrp	x0, .LANCHOR4
 	ldrh	w0, [x0, #:lo12:.LANCHOR4]
 	bl	FtlFreeSysBlkQueueInit
-.LVL2148:
-.LDL2:
-	.loc 3 756 0
 	bl	FtlLoadBbt
-.LVL2149:
-	cbnz	w0, .L1633
-	.loc 3 767 0
+	cbnz	w0, .L1635
 	bl	FtlSysBlkInit
-.LVL2150:
-	cbnz	w0, .L1633
-	.loc 3 779 0
+	cbnz	w0, .L1635
 	mov	w0, 1
 	str	w0, [x19, #:lo12:.LANCHOR86]
-	.loc 3 783 0
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 15
-	bhi	.L1633
+	bhi	.L1635
 	mov	w19, 8129
-.L1632:
-.LVL2151:
-.LBB341:
-	.loc 3 786 0 discriminator 3
+.L1634:
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-.LVL2152:
-	.loc 3 785 0 discriminator 3
 	subs	w19, w19, #1
-.LVL2153:
-	bne	.L1632
-.LVL2154:
-.L1633:
-.LBE341:
-	.loc 3 794 0
+	bne	.L1634
+.L1635:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE211:
 	.size	sftl_init, .-sftl_init
 	.section	.text.ftl_memcmp,"ax",@progbits
 	.align	2
 	.global	ftl_memcmp
 	.type	ftl_memcmp, %function
 ftl_memcmp:
-.LFB348:
-	.loc 1 252 0
-	.cfi_startproc
-.LVL2155:
-	.loc 1 253 0
 	uxtw	x2, w2
 	b	memcmp
-.LVL2156:
-	.cfi_endproc
-.LFE348:
 	.size	ftl_memcmp, .-ftl_memcmp
 	.global	ftl_temp_buf
 	.global	g_nand_ops
@@ -22778,243 +13640,243 @@ power_up_flag:
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",@progbits,1
 .LC1:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
-	.section	.rodata.__func__.6107,"a",@progbits
+	.section	.rodata.__func__.6058,"a",@progbits
 	.align	3
 	.set	.LANCHOR138,. + 0
-	.type	__func__.6107, %object
-	.size	__func__.6107, 11
-__func__.6107:
+	.type	__func__.6058, %object
+	.size	__func__.6058, 11
+__func__.6058:
 	.string	"FtlMemInit"
-	.section	.rodata.__func__.6231,"a",@progbits
+	.section	.rodata.__func__.6182,"a",@progbits
 	.align	3
 	.set	.LANCHOR170,. + 0
-	.type	__func__.6231, %object
-	.size	__func__.6231, 13
-__func__.6231:
+	.type	__func__.6182, %object
+	.size	__func__.6182, 13
+__func__.6182:
 	.string	"FtlProgPages"
-	.section	.rodata.__func__.6259,"a",@progbits
+	.section	.rodata.__func__.6210,"a",@progbits
 	.align	3
 	.set	.LANCHOR178,. + 0
-	.type	__func__.6259, %object
-	.size	__func__.6259, 9
-__func__.6259:
+	.type	__func__.6210, %object
+	.size	__func__.6210, 9
+__func__.6210:
 	.string	"FtlWrite"
-	.section	.rodata.__func__.6323,"a",@progbits
+	.section	.rodata.__func__.6284,"a",@progbits
 	.align	3
 	.set	.LANCHOR139,. + 0
-	.type	__func__.6323, %object
-	.size	__func__.6323, 14
-__func__.6323:
+	.type	__func__.6284, %object
+	.size	__func__.6284, 14
+__func__.6284:
 	.string	"FtlBbt2Bitmap"
-	.section	.rodata.__func__.6366,"a",@progbits
+	.section	.rodata.__func__.6327,"a",@progbits
 	.align	3
 	.set	.LANCHOR164,. + 0
-	.type	__func__.6366, %object
-	.size	__func__.6366, 11
-__func__.6366:
+	.type	__func__.6327, %object
+	.size	__func__.6327, 11
+__func__.6327:
 	.string	"FtlLoadBbt"
-	.section	.rodata.__func__.6483,"a",@progbits
+	.section	.rodata.__func__.6444,"a",@progbits
 	.align	3
 	.set	.LANCHOR49,. + 0
-	.type	__func__.6483, %object
-	.size	__func__.6483, 17
-__func__.6483:
+	.type	__func__.6444, %object
+	.size	__func__.6444, 17
+__func__.6444:
 	.string	"INSERT_FREE_LIST"
-	.section	.rodata.__func__.6488,"a",@progbits
+	.section	.rodata.__func__.6449,"a",@progbits
 	.align	3
 	.set	.LANCHOR46,. + 0
-	.type	__func__.6488, %object
-	.size	__func__.6488, 17
-__func__.6488:
+	.type	__func__.6449, %object
+	.size	__func__.6449, 17
+__func__.6449:
 	.string	"INSERT_DATA_LIST"
-	.section	.rodata.__func__.6519,"a",@progbits
+	.section	.rodata.__func__.6480,"a",@progbits
 	.align	3
 	.set	.LANCHOR50,. + 0
-	.type	__func__.6519, %object
-	.size	__func__.6519, 17
-__func__.6519:
+	.type	__func__.6480, %object
+	.size	__func__.6480, 17
+__func__.6480:
 	.string	"List_remove_node"
-	.section	.rodata.__func__.6551,"a",@progbits
+	.section	.rodata.__func__.6512,"a",@progbits
 	.align	3
 	.set	.LANCHOR54,. + 0
-	.type	__func__.6551, %object
-	.size	__func__.6551, 22
-__func__.6551:
+	.type	__func__.6512, %object
+	.size	__func__.6512, 22
+__func__.6512:
 	.string	"List_update_data_list"
-	.section	.rodata.__func__.6560,"a",@progbits
+	.section	.rodata.__func__.6521,"a",@progbits
 	.align	3
 	.set	.LANCHOR140,. + 0
-	.type	__func__.6560, %object
-	.size	__func__.6560, 16
-__func__.6560:
+	.type	__func__.6521, %object
+	.size	__func__.6521, 16
+__func__.6521:
 	.string	"load_l2p_region"
-	.section	.rodata.__func__.6593,"a",@progbits
+	.section	.rodata.__func__.6554,"a",@progbits
 	.align	3
 	.set	.LANCHOR116,. + 0
-	.type	__func__.6593, %object
-	.size	__func__.6593, 26
-__func__.6593:
+	.type	__func__.6554, %object
+	.size	__func__.6554, 26
+__func__.6554:
 	.string	"ftl_map_blk_alloc_new_blk"
-	.section	.rodata.__func__.6604,"a",@progbits
+	.section	.rodata.__func__.6565,"a",@progbits
 	.align	3
 	.set	.LANCHOR143,. + 0
-	.type	__func__.6604, %object
-	.size	__func__.6604, 15
-__func__.6604:
+	.type	__func__.6565, %object
+	.size	__func__.6565, 15
+__func__.6565:
 	.string	"ftl_map_blk_gc"
-	.section	.rodata.__func__.6618,"a",@progbits
+	.section	.rodata.__func__.6579,"a",@progbits
 	.align	3
 	.set	.LANCHOR141,. + 0
-	.type	__func__.6618, %object
-	.size	__func__.6618, 31
-__func__.6618:
+	.type	__func__.6579, %object
+	.size	__func__.6579, 31
+__func__.6579:
 	.string	"Ftl_write_map_blk_to_last_page"
-	.section	.rodata.__func__.6632,"a",@progbits
+	.section	.rodata.__func__.6593,"a",@progbits
 	.align	3
 	.set	.LANCHOR142,. + 0
-	.type	__func__.6632, %object
-	.size	__func__.6632, 16
-__func__.6632:
+	.type	__func__.6593, %object
+	.size	__func__.6593, 16
+__func__.6593:
 	.string	"FtlMapWritePage"
-	.section	.rodata.__func__.6657,"a",@progbits
+	.section	.rodata.__func__.6618,"a",@progbits
 	.align	3
 	.set	.LANCHOR57,. + 0
-	.type	__func__.6657, %object
-	.size	__func__.6657, 22
-__func__.6657:
+	.type	__func__.6618, %object
+	.size	__func__.6618, 22
+__func__.6618:
 	.string	"select_l2p_ram_region"
-	.section	.rodata.__func__.6674,"a",@progbits
+	.section	.rodata.__func__.6635,"a",@progbits
 	.align	3
 	.set	.LANCHOR145,. + 0
-	.type	__func__.6674, %object
-	.size	__func__.6674, 9
-__func__.6674:
+	.type	__func__.6635, %object
+	.size	__func__.6635, 9
+__func__.6635:
 	.string	"log2phys"
-	.section	.rodata.__func__.6747,"a",@progbits
+	.section	.rodata.__func__.6708,"a",@progbits
 	.align	3
 	.set	.LANCHOR166,. + 0
-	.type	__func__.6747, %object
-	.size	__func__.6747, 15
-__func__.6747:
+	.type	__func__.6708, %object
+	.size	__func__.6708, 15
+__func__.6708:
 	.string	"FtlVpcTblFlush"
-	.section	.rodata.__func__.6769,"a",@progbits
+	.section	.rodata.__func__.6730,"a",@progbits
 	.align	3
 	.set	.LANCHOR148,. + 0
-	.type	__func__.6769, %object
-	.size	__func__.6769, 14
-__func__.6769:
+	.type	__func__.6730, %object
+	.size	__func__.6730, 14
+__func__.6730:
 	.string	"FtlScanSysBlk"
-	.section	.rodata.__func__.6826,"a",@progbits
+	.section	.rodata.__func__.6787,"a",@progbits
 	.align	3
 	.set	.LANCHOR179,. + 0
-	.type	__func__.6826, %object
-	.size	__func__.6826, 15
-__func__.6826:
+	.type	__func__.6787, %object
+	.size	__func__.6787, 15
+__func__.6787:
 	.string	"FtlLoadSysInfo"
-	.section	.rodata.__func__.6889,"a",@progbits
+	.section	.rodata.__func__.6850,"a",@progbits
 	.align	3
 	.set	.LANCHOR146,. + 0
-	.type	__func__.6889, %object
-	.size	__func__.6889, 16
-__func__.6889:
+	.type	__func__.6850, %object
+	.size	__func__.6850, 16
+__func__.6850:
 	.string	"FtlReUsePrevPpa"
-	.section	.rodata.__func__.6923,"a",@progbits
+	.section	.rodata.__func__.6884,"a",@progbits
 	.align	3
 	.set	.LANCHOR160,. + 0
-	.type	__func__.6923, %object
-	.size	__func__.6923, 22
-__func__.6923:
+	.type	__func__.6884, %object
+	.size	__func__.6884, 22
+__func__.6884:
 	.string	"FtlRecoverySuperblock"
-	.section	.rodata.__func__.6980,"a",@progbits
+	.section	.rodata.__func__.6941,"a",@progbits
 	.align	3
 	.set	.LANCHOR60,. + 0
-	.type	__func__.6980, %object
-	.size	__func__.6980, 16
-__func__.6980:
+	.type	__func__.6941, %object
+	.size	__func__.6941, 16
+__func__.6941:
 	.string	"make_superblock"
-	.section	.rodata.__func__.7001,"a",@progbits
+	.section	.rodata.__func__.6962,"a",@progbits
 	.align	3
 	.set	.LANCHOR154,. + 0
-	.type	__func__.7001, %object
-	.size	__func__.7001, 18
-__func__.7001:
+	.type	__func__.6962, %object
+	.size	__func__.6962, 18
+__func__.6962:
 	.string	"SupperBlkListInit"
-	.section	.rodata.__func__.7026,"a",@progbits
+	.section	.rodata.__func__.6987,"a",@progbits
 	.align	3
 	.set	.LANCHOR168,. + 0
-	.type	__func__.7026, %object
-	.size	__func__.7026, 21
-__func__.7026:
+	.type	__func__.6987, %object
+	.size	__func__.6987, 21
+__func__.6987:
 	.string	"FtlVpcCheckAndModify"
-	.section	.rodata.__func__.7042,"a",@progbits
+	.section	.rodata.__func__.7003,"a",@progbits
 	.align	3
 	.set	.LANCHOR155,. + 0
-	.type	__func__.7042, %object
-	.size	__func__.7042, 14
-__func__.7042:
+	.type	__func__.7003, %object
+	.size	__func__.7003, 14
+__func__.7003:
 	.string	"ftl_check_vpc"
-	.section	.rodata.__func__.7127,"a",@progbits
+	.section	.rodata.__func__.7088,"a",@progbits
 	.align	3
 	.set	.LANCHOR157,. + 0
-	.type	__func__.7127, %object
-	.size	__func__.7127, 25
-__func__.7127:
+	.type	__func__.7088, %object
+	.size	__func__.7088, 25
+__func__.7088:
 	.string	"allocate_data_superblock"
-	.section	.rodata.__func__.7148,"a",@progbits
+	.section	.rodata.__func__.7109,"a",@progbits
 	.align	3
 	.set	.LANCHOR169,. + 0
-	.type	__func__.7148, %object
-	.size	__func__.7148, 29
-__func__.7148:
+	.type	__func__.7109, %object
+	.size	__func__.7109, 29
+__func__.7109:
 	.string	"allocate_new_data_superblock"
-	.section	.rodata.__func__.7155,"a",@progbits
+	.section	.rodata.__func__.7116,"a",@progbits
 	.align	3
 	.set	.LANCHOR88,. + 0
-	.type	__func__.7155, %object
-	.size	__func__.7155, 19
-__func__.7155:
+	.type	__func__.7116, %object
+	.size	__func__.7116, 19
+__func__.7116:
 	.string	"get_new_active_ppa"
-	.section	.rodata.__func__.7168,"a",@progbits
+	.section	.rodata.__func__.7129,"a",@progbits
 	.align	3
 	.set	.LANCHOR158,. + 0
-	.type	__func__.7168, %object
-	.size	__func__.7168, 16
-__func__.7168:
+	.type	__func__.7129, %object
+	.size	__func__.7129, 16
+__func__.7129:
 	.string	"update_vpc_list"
-	.section	.rodata.__func__.7175,"a",@progbits
+	.section	.rodata.__func__.7136,"a",@progbits
 	.align	3
 	.set	.LANCHOR159,. + 0
-	.type	__func__.7175, %object
-	.size	__func__.7175, 20
-__func__.7175:
+	.type	__func__.7136, %object
+	.size	__func__.7136, 20
+__func__.7136:
 	.string	"decrement_vpc_count"
-	.section	.rodata.__func__.7245,"a",@progbits
+	.section	.rodata.__func__.7206,"a",@progbits
 	.align	3
 	.set	.LANCHOR171,. + 0
-	.type	__func__.7245, %object
-	.size	__func__.7245, 19
-__func__.7245:
+	.type	__func__.7206, %object
+	.size	__func__.7206, 19
+__func__.7206:
 	.string	"FtlGcFreeTempBlock"
-	.section	.rodata.__func__.7351,"a",@progbits
+	.section	.rodata.__func__.7312,"a",@progbits
 	.align	3
 	.set	.LANCHOR175,. + 0
-	.type	__func__.7351, %object
-	.size	__func__.7351, 23
-__func__.7351:
+	.type	__func__.7312, %object
+	.size	__func__.7312, 23
+__func__.7312:
 	.string	"rk_ftl_garbage_collect"
-	.section	.rodata.__func__.7615,"a",@progbits
+	.section	.rodata.__func__.7579,"a",@progbits
 	.align	3
 	.set	.LANCHOR104,. + 0
-	.type	__func__.7615, %object
-	.size	__func__.7615, 15
-__func__.7615:
+	.type	__func__.7579, %object
+	.size	__func__.7579, 15
+__func__.7579:
 	.string	"FlashReadPages"
-	.section	.rodata.__func__.7632,"a",@progbits
+	.section	.rodata.__func__.7596,"a",@progbits
 	.align	3
 	.set	.LANCHOR109,. + 0
-	.type	__func__.7632, %object
-	.size	__func__.7632, 15
-__func__.7632:
+	.type	__func__.7596, %object
+	.size	__func__.7596, 15
+__func__.7596:
 	.string	"FlashProgPages"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",@progbits,1
 .LC101:
@@ -23060,32521 +13922,4 @@ __func__.7632:
 	.string	"SFTL version: 5.0.44 20180713"
 .LC71:
 	.string	"%s\n"
-	.text
-.Letext0:
-	.file 7 "include/common.h"
-	.file 8 "./arch/arm/include/asm/types.h"
-	.file 9 "include/linux/types.h"
-	.file 10 "include/errno.h"
-	.file 11 "include/linux/string.h"
-	.file 12 "include/efi.h"
-	.file 13 "include/ide.h"
-	.file 14 "include/part.h"
-	.file 15 "include/flash.h"
-	.file 16 "include/lmb.h"
-	.file 17 "include/asm-generic/u-boot.h"
-	.file 18 "./arch/arm/include/asm/u-boot-arm.h"
-	.file 19 "include/../scripts/dtc/libfdt/fdt.h"
-	.file 20 "include/libfdt_env.h"
-	.file 21 "include/image.h"
-	.file 22 "include/net.h"
-	.file 23 "include/dm/uclass-id.h"
-	.file 24 "drivers/rkflash/rksftl/sftl_inc.h"
-	.file 25 "drivers/rkflash/rksftl/flash_com.h"
-	.file 26 "drivers/rkflash/rksftl/sftl_struct.h"
-	.file 27 "drivers/rkflash/rksftl/sftl_global.h"
-	.file 28 "include/malloc.h"
-	.file 29 "include/stdio.h"
-	.file 30 "include/vsprintf.h"
-	.file 31 "include/log.h"
-	.section	.debug_info,"",@progbits
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-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	c_ftl_nand_bbm_buf_size
-	.uleb128 0x28
-	.4byte	.LASF403
-	.byte	0x1b
-	.byte	0x1c
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	c_ftl_nand_page_pre_blk
-	.uleb128 0x28
-	.4byte	.LASF404
-	.byte	0x1b
-	.byte	0x1d
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	c_ftl_nand_page_pre_slc_blk
-	.uleb128 0x28
-	.4byte	.LASF405
-	.byte	0x1b
-	.byte	0x1e
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	c_ftl_nand_page_pre_super_blk
-	.uleb128 0x28
-	.4byte	.LASF406
-	.byte	0x1b
-	.byte	0x1f
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	c_ftl_nand_sec_pre_page
-	.uleb128 0x28
-	.4byte	.LASF407
-	.byte	0x1b
-	.byte	0x20
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	c_ftl_nand_sec_pre_page_shift
-	.uleb128 0x28
-	.4byte	.LASF408
-	.byte	0x1b
-	.byte	0x24
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	c_ftl_nand_byte_pre_page
-	.uleb128 0x28
-	.4byte	.LASF409
-	.byte	0x1b
-	.byte	0x25
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	c_ftl_nand_byte_pre_oob
-	.uleb128 0x28
-	.4byte	.LASF410
-	.byte	0x1b
-	.byte	0x26
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	c_ftl_nand_reserved_blks
-	.uleb128 0x28
-	.4byte	.LASF411
-	.byte	0x1b
-	.byte	0x27
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	c_ftl_nand_totle_phy_blks
-	.uleb128 0x28
-	.4byte	.LASF412
-	.byte	0x1b
-	.byte	0x29
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	c_ftl_nand_map_region_num
-	.uleb128 0x28
-	.4byte	.LASF413
-	.byte	0x1b
-	.byte	0x2a
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	c_ftl_nand_l2pmap_ram_region_num
-	.uleb128 0x28
-	.4byte	.LASF414
-	.byte	0x1b
-	.byte	0x2c
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	c_ftl_nand_vendor_region_num
-	.uleb128 0x28
-	.4byte	.LASF415
-	.byte	0x1b
-	.byte	0x2e
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	c_ftl_nand_map_blks_per_plane
-	.uleb128 0x28
-	.4byte	.LASF416
-	.byte	0x1b
-	.byte	0x2f
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	c_ftl_nand_max_map_blks
-	.uleb128 0x28
-	.4byte	.LASF417
-	.byte	0x1b
-	.byte	0x30
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	c_ftl_nand_max_vendor_blks
-	.uleb128 0x28
-	.4byte	.LASF418
-	.byte	0x1b
-	.byte	0x31
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	c_ftl_vendor_part_size
-	.uleb128 0x28
-	.4byte	.LASF419
-	.byte	0x1b
-	.byte	0x32
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	c_ftl_nand_sys_blks_per_plane
-	.uleb128 0x28
-	.4byte	.LASF420
-	.byte	0x1b
-	.byte	0x33
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	c_ftl_nand_init_sys_blks_per_plane
-	.uleb128 0x28
-	.4byte	.LASF421
-	.byte	0x1b
-	.byte	0x34
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	c_ftl_nand_max_sys_blks
-	.uleb128 0x28
-	.4byte	.LASF422
-	.byte	0x1b
-	.byte	0x35
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	c_ftl_nand_data_blks_per_plane
-	.uleb128 0x28
-	.4byte	.LASF423
-	.byte	0x1b
-	.byte	0x36
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	c_ftl_nand_data_op_blks_per_plane
-	.uleb128 0x28
-	.4byte	.LASF424
-	.byte	0x1b
-	.byte	0x37
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	c_ftl_nand_max_data_blks
-	.uleb128 0x28
-	.4byte	.LASF425
-	.byte	0x1b
-	.byte	0x38
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	ftl_gc_temp_power_lost_recovery_flag
-	.uleb128 0x28
-	.4byte	.LASF426
-	.byte	0x1b
-	.byte	0x3a
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_GlobalSysVersion
-	.uleb128 0x28
-	.4byte	.LASF427
-	.byte	0x1b
-	.byte	0x3b
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_GlobalDataVersion
-	.uleb128 0x28
-	.4byte	.LASF428
-	.byte	0x1b
-	.byte	0x3c
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_MaxLbaSector
-	.uleb128 0x28
-	.4byte	.LASF429
-	.byte	0x1b
-	.byte	0x3d
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_MaxLpn
-	.uleb128 0x28
-	.4byte	.LASF430
-	.byte	0x1b
-	.byte	0x3e
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_VaildLpn
-	.uleb128 0x28
-	.4byte	.LASF431
-	.byte	0x1b
-	.byte	0x3f
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_MaxLbn
-	.uleb128 0x28
-	.4byte	.LASF432
-	.byte	0x1b
-	.byte	0x41
-	.4byte	0xf81
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	gBbtInfo
-	.uleb128 0x28
-	.4byte	.LASF433
-	.byte	0x1b
-	.byte	0x42
-	.4byte	0x1007
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	gSysInfo
-	.uleb128 0x28
-	.4byte	.LASF434
-	.byte	0x1b
-	.byte	0x43
-	.4byte	0x15a4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	gSysFreeQueue
-	.uleb128 0x28
-	.4byte	.LASF435
-	.byte	0x1b
-	.byte	0x44
-	.4byte	0x104f
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	gL2pMapInfo
-	.uleb128 0x28
-	.4byte	.LASF436
-	.byte	0x1b
-	.byte	0x45
-	.4byte	0x104f
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	gVendorBlkInfo
-	.uleb128 0x28
-	.4byte	.LASF437
-	.byte	0x1b
-	.byte	0x46
-	.4byte	0xdf5
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	req_sys
-	.uleb128 0x28
-	.4byte	.LASF438
-	.byte	0x1b
-	.byte	0x47
-	.4byte	0x1abc
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	req_read
-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0xdf5
-	.uleb128 0x28
-	.4byte	.LASF439
-	.byte	0x1b
-	.byte	0x48
-	.4byte	0x1abc
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	req_prgm
-	.uleb128 0x28
-	.4byte	.LASF440
-	.byte	0x1b
-	.byte	0x49
-	.4byte	0x1abc
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	req_erase
-	.uleb128 0x28
-	.4byte	.LASF441
-	.byte	0x1b
-	.byte	0x4a
-	.4byte	0x1abc
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	req_gc
-	.uleb128 0x28
-	.4byte	.LASF442
-	.byte	0x1b
-	.byte	0x4b
-	.4byte	0x1abc
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	req_gc_dst
-	.uleb128 0xa
-	.4byte	0xdbe
-	.4byte	0x1b26
-	.uleb128 0xe
-	.4byte	0xda
-	.byte	0x1f
-	.byte	0
-	.uleb128 0x28
-	.4byte	.LASF443
-	.byte	0x1b
-	.byte	0x4d
-	.4byte	0x1b16
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_plane_order_table
-	.uleb128 0x28
-	.4byte	.LASF444
-	.byte	0x1b
-	.byte	0x4f
-	.4byte	0x1001
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_sys_data_buf
-	.uleb128 0x28
-	.4byte	.LASF445
-	.byte	0x1b
-	.byte	0x50
-	.4byte	0x1001
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_sys_data_buf_1
-	.uleb128 0x28
-	.4byte	.LASF446
-	.byte	0x1b
-	.byte	0x51
-	.4byte	0x1001
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_vendor_data_buf
-	.uleb128 0x28
-	.4byte	.LASF447
-	.byte	0x1b
-	.byte	0x52
-	.4byte	0x1001
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_sys_spare_buf
-	.uleb128 0x28
-	.4byte	.LASF448
-	.byte	0x1b
-	.byte	0x53
-	.4byte	0x1001
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_io_data_buf_0
-	.uleb128 0x28
-	.4byte	.LASF449
-	.byte	0x1b
-	.byte	0x54
-	.4byte	0x1001
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_io_data_buf_1
-	.uleb128 0x28
-	.4byte	.LASF450
-	.byte	0x1b
-	.byte	0x55
-	.4byte	0x1001
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_io_spare_buf
-	.uleb128 0x28
-	.4byte	.LASF451
-	.byte	0x1b
-	.byte	0x56
-	.4byte	0x1001
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_gc_spare_buf
-	.uleb128 0x28
-	.4byte	.LASF452
-	.byte	0x1b
-	.byte	0x57
-	.4byte	0x1001
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_gc_data_buf
-	.uleb128 0x28
-	.4byte	.LASF453
-	.byte	0x1b
-	.byte	0x58
-	.4byte	0x1c0d
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	gp_gc_page_buf_info
-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0x16d6
-	.uleb128 0x28
-	.4byte	.LASF454
-	.byte	0x1b
-	.byte	0x59
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	c_gc_page_buf_num
-	.uleb128 0x28
-	.4byte	.LASF455
-	.byte	0x1b
-	.byte	0x5a
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_num_req
-	.uleb128 0x28
-	.4byte	.LASF456
-	.byte	0x1b
-	.byte	0x5b
-	.4byte	0x1c52
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	gp_ect_tbl_info
-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0x113b
-	.uleb128 0x28
-	.4byte	.LASF457
-	.byte	0x1b
-	.byte	0x5c
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_ect_tbl_info_size
-	.uleb128 0x28
-	.4byte	.LASF458
-	.byte	0x1b
-	.byte	0x5d
-	.4byte	0x10f8
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_erase_count_table
-	.uleb128 0x28
-	.4byte	.LASF459
-	.byte	0x1b
-	.byte	0x5f
-	.4byte	0x10f8
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_swl_mul_table
-	.uleb128 0x28
-	.4byte	.LASF460
-	.byte	0x1b
-	.byte	0x60
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_totle_swl_count
-	.uleb128 0x28
-	.4byte	.LASF461
-	.byte	0x1b
-	.byte	0x61
-	.4byte	0x10f8
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_valid_page_count_table
-	.uleb128 0x28
-	.4byte	.LASF462
-	.byte	0x1b
-	.byte	0x62
-	.4byte	0x10f8
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_valid_page_count_check_table
-	.uleb128 0x28
-	.4byte	.LASF463
-	.byte	0x1b
-	.byte	0x63
-	.4byte	0x1001
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_blk_mode_table
-	.uleb128 0x28
-	.4byte	.LASF464
-	.byte	0x1b
-	.byte	0x65
-	.4byte	0x10f8
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_map_block_table
-	.uleb128 0x28
-	.4byte	.LASF465
-	.byte	0x1b
-	.byte	0x66
-	.4byte	0x10f8
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_map_block_valid_page_count
-	.uleb128 0x28
-	.4byte	.LASF466
-	.byte	0x1b
-	.byte	0x67
-	.4byte	0x1001
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_map_block_ver_table
-	.uleb128 0x28
-	.4byte	.LASF467
-	.byte	0x1b
-	.byte	0x68
-	.4byte	0x1001
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_map_region_ppn_table
-	.uleb128 0x28
-	.4byte	.LASF468
-	.byte	0x1b
-	.byte	0x69
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_totle_map_block
-	.uleb128 0x28
-	.4byte	.LASF469
-	.byte	0x1b
-	.byte	0x6b
-	.4byte	0x10f8
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_vendor_block_table
-	.uleb128 0x28
-	.4byte	.LASF470
-	.byte	0x1b
-	.byte	0x6c
-	.4byte	0x10f8
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_vendor_block_valid_page_count
-	.uleb128 0x28
-	.4byte	.LASF471
-	.byte	0x1b
-	.byte	0x6d
-	.4byte	0x1001
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_vendor_block_ver_table
-	.uleb128 0x28
-	.4byte	.LASF472
-	.byte	0x1b
-	.byte	0x6e
-	.4byte	0x1001
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_vendor_region_ppn_table
-	.uleb128 0x28
-	.4byte	.LASF473
-	.byte	0x1b
-	.byte	0x6f
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_totle_vendor_block
-	.uleb128 0x28
-	.4byte	.LASF474
-	.byte	0x1b
-	.byte	0x71
-	.4byte	0x1dd2
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_l2p_ram_map
-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0x10fe
-	.uleb128 0x28
-	.4byte	.LASF475
-	.byte	0x1b
-	.byte	0x72
-	.4byte	0x1001
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_l2p_map_buf
-	.uleb128 0x28
-	.4byte	.LASF476
-	.byte	0x1b
-	.byte	0x73
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_l2p_last_update_region_id
-	.uleb128 0x28
-	.4byte	.LASF477
-	.byte	0x1b
-	.byte	0x7a
-	.4byte	0x1e17
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_data_block_list_table
-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0x1573
-	.uleb128 0x28
-	.4byte	.LASF478
-	.byte	0x1b
-	.byte	0x7b
-	.4byte	0x1e17
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_free_data_block_list_head
-	.uleb128 0x28
-	.4byte	.LASF479
-	.byte	0x1b
-	.byte	0x7d
-	.4byte	0x1e17
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_data_block_list_head
-	.uleb128 0x28
-	.4byte	.LASF480
-	.byte	0x1b
-	.byte	0x7e
-	.4byte	0x1e17
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_data_block_list_tail
-	.uleb128 0x28
-	.4byte	.LASF481
-	.byte	0x1b
-	.byte	0x7f
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_num_free_superblocks
-	.uleb128 0x28
-	.4byte	.LASF482
-	.byte	0x1b
-	.byte	0x80
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_num_data_superblocks
-	.uleb128 0x28
-	.4byte	.LASF483
-	.byte	0x1b
-	.byte	0x81
-	.4byte	0x15ff
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_active_superblock
-	.uleb128 0x28
-	.4byte	.LASF484
-	.byte	0x1b
-	.byte	0x82
-	.4byte	0x15ff
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_buffer_superblock
-	.uleb128 0x28
-	.4byte	.LASF485
-	.byte	0x1b
-	.byte	0x83
-	.4byte	0x15ff
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_temp_superblock
-	.uleb128 0x28
-	.4byte	.LASF486
-	.byte	0x1b
-	.byte	0x84
-	.4byte	0x15ff
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_superblock
-	.uleb128 0x28
-	.4byte	.LASF487
-	.byte	0x1b
-	.byte	0x85
-	.4byte	0x1eef
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	gp_last_act_superblock
-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0x15ff
-	.uleb128 0x28
-	.4byte	.LASF488
-	.byte	0x1b
-	.byte	0x86
-	.4byte	0x1320
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_sys_save_data
-	.uleb128 0x28
-	.4byte	.LASF489
-	.byte	0x1b
-	.byte	0x87
-	.4byte	0x141d
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_sys_ext_data
-	.uleb128 0x28
-	.4byte	.LASF490
-	.byte	0x1b
-	.byte	0x89
-	.4byte	0x1f34
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_gc_page_info
-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0x16a1
-	.uleb128 0x28
-	.4byte	.LASF491
-	.byte	0x1b
-	.byte	0x8a
-	.4byte	0x10f8
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_gc_blk_tbl
-	.uleb128 0x28
-	.4byte	.LASF492
-	.byte	0x1b
-	.byte	0x8b
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_blk_num
-	.uleb128 0x28
-	.4byte	.LASF493
-	.byte	0x1b
-	.byte	0x8c
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_page_offset
-	.uleb128 0x28
-	.4byte	.LASF494
-	.byte	0x1b
-	.byte	0x8d
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_cur_blk_valid_pages
-	.uleb128 0x28
-	.4byte	.LASF495
-	.byte	0x1b
-	.byte	0x8e
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_cur_blk_max_valid_pages
-	.uleb128 0x28
-	.4byte	.LASF496
-	.byte	0x1b
-	.byte	0x8f
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_next_blk
-	.uleb128 0x28
-	.4byte	.LASF497
-	.byte	0x1b
-	.byte	0x90
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_next_blk_1
-	.uleb128 0x28
-	.4byte	.LASF498
-	.byte	0x1b
-	.byte	0x91
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_bad_block_temp_num
-	.uleb128 0x28
-	.4byte	.LASF499
-	.byte	0x1b
-	.byte	0x92
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_bad_block_gc_index
-	.uleb128 0xa
-	.4byte	0xdc9
-	.4byte	0x2007
-	.uleb128 0xe
-	.4byte	0xda
-	.byte	0x10
-	.byte	0
-	.uleb128 0x28
-	.4byte	.LASF500
-	.byte	0x1b
-	.byte	0x93
-	.4byte	0x1ff7
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_bad_block_temp_tbl
-	.uleb128 0x28
-	.4byte	.LASF501
-	.byte	0x1b
-	.byte	0x95
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_free_blk_threshold
-	.uleb128 0x28
-	.4byte	.LASF502
-	.byte	0x1b
-	.byte	0x96
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_merge_free_blk_threshold
-	.uleb128 0x28
-	.4byte	.LASF503
-	.byte	0x1b
-	.byte	0x97
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_blk_index
-	.uleb128 0x28
-	.4byte	.LASF504
-	.byte	0x1b
-	.byte	0x99
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_totle_gc_page_count
-	.uleb128 0x28
-	.4byte	.LASF505
-	.byte	0x1b
-	.byte	0x9a
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_totle_write_page_count
-	.uleb128 0x28
-	.4byte	.LASF506
-	.byte	0x1b
-	.byte	0x9b
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_totle_write_sector
-	.uleb128 0x28
-	.4byte	.LASF507
-	.byte	0x1b
-	.byte	0x9c
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_totle_read_sector
-	.uleb128 0x28
-	.4byte	.LASF508
-	.byte	0x1b
-	.byte	0x9e
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_totle_discard_page_count
-	.uleb128 0x28
-	.4byte	.LASF509
-	.byte	0x1b
-	.byte	0x9f
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_totle_read_page_count
-	.uleb128 0x28
-	.4byte	.LASF510
-	.byte	0x1b
-	.byte	0xa0
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_tmp_data_superblock_id
-	.uleb128 0x28
-	.4byte	.LASF511
-	.byte	0x1b
-	.byte	0xa1
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_totle_cache_write_count
-	.uleb128 0x28
-	.4byte	.LASF512
-	.byte	0x1b
-	.byte	0xa2
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_totle_l2p_write_count
-	.uleb128 0x28
-	.4byte	.LASF513
-	.byte	0x1b
-	.byte	0xa4
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_totle_mlc_erase_count
-	.uleb128 0x28
-	.4byte	.LASF514
-	.byte	0x1b
-	.byte	0xa5
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_totle_avg_erase_count
-	.uleb128 0x28
-	.4byte	.LASF515
-	.byte	0x1b
-	.byte	0xa6
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_min_erase_count
-	.uleb128 0x28
-	.4byte	.LASF516
-	.byte	0x1b
-	.byte	0xa7
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_totle_slc_erase_count
-	.uleb128 0x28
-	.4byte	.LASF517
-	.byte	0x1b
-	.byte	0xa8
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_totle_sys_slc_erase_count
-	.uleb128 0x28
-	.4byte	.LASF518
-	.byte	0x1b
-	.byte	0xa9
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_max_erase_count
-	.uleb128 0x28
-	.4byte	.LASF519
-	.byte	0x1b
-	.byte	0xaa
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_in_gc_progress
-	.uleb128 0x28
-	.4byte	.LASF520
-	.byte	0x1b
-	.byte	0xab
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_in_swl_replace
-	.uleb128 0x28
-	.4byte	.LASF521
-	.byte	0x1b
-	.byte	0xac
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_ftl_nand_free_count
-	.uleb128 0x28
-	.4byte	.LASF522
-	.byte	0x1b
-	.byte	0xad
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_head_data_block
-	.uleb128 0x28
-	.4byte	.LASF523
-	.byte	0x1b
-	.byte	0xae
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_head_data_block_count
-	.uleb128 0x28
-	.4byte	.LASF524
-	.byte	0x1b
-	.byte	0xaf
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_skip_write_count
-	.uleb128 0x28
-	.4byte	.LASF525
-	.byte	0x1b
-	.byte	0xb0
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_cur_erase_blk
-	.uleb128 0x28
-	.4byte	.LASF526
-	.byte	0x1b
-	.byte	0xb2
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_recovery_page_num
-	.uleb128 0x28
-	.4byte	.LASF527
-	.byte	0x1b
-	.byte	0xb3
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_recovery_page_min_ver
-	.uleb128 0xa
-	.4byte	0xdd4
-	.4byte	0x2263
-	.uleb128 0xe
-	.4byte	0xda
-	.byte	0x1f
-	.byte	0
-	.uleb128 0x28
-	.4byte	.LASF528
-	.byte	0x1b
-	.byte	0xb4
-	.4byte	0x2253
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_recovery_ppa_tbl
-	.uleb128 0x28
-	.4byte	.LASF529
-	.byte	0x1b
-	.byte	0xb5
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	c_mlc_erase_count_value
-	.uleb128 0x28
-	.4byte	.LASF530
-	.byte	0x1b
-	.byte	0xb6
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_power_lost_recovery_flag
-	.uleb128 0x4
-	.4byte	.LASF531
-	.byte	0x18
-	.byte	0x14
-	.4byte	0xe44
-	.uleb128 0x4
-	.4byte	.LASF532
-	.byte	0x18
-	.byte	0x15
-	.4byte	0xe44
-	.uleb128 0x4
-	.4byte	.LASF533
-	.byte	0x18
-	.byte	0x16
-	.4byte	0xee6
-	.uleb128 0xa
-	.4byte	0xb9
-	.4byte	0x22d4
-	.uleb128 0x15
-	.4byte	0xda
-	.2byte	0x3ff
-	.byte	0
-	.uleb128 0x4
-	.4byte	.LASF534
-	.byte	0x18
-	.byte	0x17
-	.4byte	0x22c3
-	.uleb128 0x28
-	.4byte	.LASF535
-	.byte	0x3
-	.byte	0x6
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	DeviceCapacity
-	.uleb128 0x28
-	.4byte	.LASF536
-	.byte	0x3
-	.byte	0x7
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	gFtlInitStatus
-	.uleb128 0x4
-	.4byte	.LASF537
-	.byte	0x3
-	.byte	0x6d
-	.4byte	0xdd4
-	.uleb128 0x4
-	.4byte	.LASF538
-	.byte	0x3
-	.byte	0x6e
-	.4byte	0xdd4
-	.uleb128 0x4
-	.4byte	.LASF539
-	.byte	0x3
-	.byte	0x6f
-	.4byte	0xdd4
-	.uleb128 0x4
-	.4byte	.LASF540
-	.byte	0x3
-	.byte	0x70
-	.4byte	0xdd4
-	.uleb128 0x29
-	.4byte	.LASF541
-	.byte	0x3
-	.2byte	0x3bc
-	.4byte	0x5b
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	power_up_flag
-	.uleb128 0x2a
-	.4byte	.LASF545
-	.byte	0x3
-	.2byte	0x45f
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	gc_discard_updated
-	.uleb128 0x29
-	.4byte	.LASF542
-	.byte	0x2
-	.2byte	0x38c
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_ect_tbl_power_up_flush
-	.uleb128 0x29
-	.4byte	.LASF543
-	.byte	0x2
-	.2byte	0x3a1
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	FtlUpdateVaildLpnCount
-	.uleb128 0xa
-	.4byte	0xdc9
-	.4byte	0x239e
-	.uleb128 0x15
-	.4byte	0xda
-	.2byte	0x1fff
-	.byte	0
-	.uleb128 0x29
-	.4byte	.LASF544
-	.byte	0x2
-	.2byte	0x8df
-	.4byte	0x238d
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	check_vpc_table
-	.uleb128 0x2b
-	.4byte	.LASF546
-	.byte	0x5
-	.byte	0x6d
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	ftl_gc_temp_block_bops_scan_page_addr
-	.uleb128 0x29
-	.4byte	.LASF547
-	.byte	0x5
-	.2byte	0x1d4
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	gc_ink_free_return_value
-	.uleb128 0xc
-	.4byte	.LASF548
-	.byte	0x1c
-	.2byte	0x3ba
-	.4byte	0x10b
-	.uleb128 0xc
-	.4byte	.LASF549
-	.byte	0x1c
-	.2byte	0x3bb
-	.4byte	0x10b
-	.uleb128 0xc
-	.4byte	.LASF550
-	.byte	0x1c
-	.2byte	0x3bc
-	.4byte	0x10b
-	.uleb128 0xf
-	.4byte	.LASF551
-	.byte	0x4
-	.byte	0x6
-	.byte	0xc
-	.4byte	0x241c
-	.uleb128 0x16
-	.string	"pid"
-	.byte	0x6
-	.byte	0xd
-	.4byte	0x5b
-	.byte	0
-	.byte	0
-	.uleb128 0x4
-	.4byte	.LASF552
-	.byte	0x6
-	.byte	0x10
-	.4byte	0x2427
-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0x2403
-	.uleb128 0x2c
-	.4byte	0x22ad
-	.byte	0x1
-	.byte	0x10
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_nand_phy_info
-	.uleb128 0x2c
-	.4byte	0x22b8
-	.byte	0x1
-	.byte	0x11
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_nand_ops
-	.uleb128 0x2b
-	.4byte	.LASF553
-	.byte	0x1
-	.byte	0x13
-	.4byte	0x22c3
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	check_buf
-	.uleb128 0x2c
-	.4byte	0x22d4
-	.byte	0x1
-	.byte	0x14
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	ftl_temp_buf
-	.uleb128 0xa
-	.4byte	0xb9
-	.4byte	0x2485
-	.uleb128 0xe
-	.4byte	0xda
-	.byte	0x7f
-	.byte	0
-	.uleb128 0x2b
-	.4byte	.LASF554
-	.byte	0x1
-	.byte	0x15
-	.4byte	0x2475
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	check_spare_buf
-	.uleb128 0x2d
-	.4byte	.LASF557
-	.byte	0x1
-	.byte	0xfb
-	.4byte	0x5b
-	.8byte	.LFB348
-	.8byte	.LFE348-.LFB348
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2512
-	.uleb128 0x2e
-	.4byte	.LASF555
-	.byte	0x1
-	.byte	0xfb
-	.4byte	0x12c
-	.4byte	.LLST469
-	.uleb128 0x2e
-	.4byte	.LASF556
-	.byte	0x1
-	.byte	0xfb
-	.4byte	0x12c
-	.4byte	.LLST470
-	.uleb128 0x2e
-	.4byte	.LASF325
-	.byte	0x1
-	.byte	0xfb
-	.4byte	0x30
-	.4byte	.LLST471
-	.uleb128 0x2f
-	.8byte	.LVL2156
-	.4byte	0xa92c
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x9
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0xc
-	.4byte	0xffffffff
-	.byte	0x1a
-	.byte	0
-	.byte	0
-	.uleb128 0x2d
-	.4byte	.LASF558
-	.byte	0x1
-	.byte	0xf6
-	.4byte	0x12c
-	.8byte	.LFB347
-	.8byte	.LFE347-.LFB347
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x258a
-	.uleb128 0x2e
-	.4byte	.LASF559
-	.byte	0x1
-	.byte	0xf6
-	.4byte	0x12c
-	.4byte	.LLST304
-	.uleb128 0x2e
-	.4byte	.LASF560
-	.byte	0x1
-	.byte	0xf6
-	.4byte	0x16f
-	.4byte	.LLST305
-	.uleb128 0x2e
-	.4byte	.LASF30
-	.byte	0x1
-	.byte	0xf6
-	.4byte	0x30
-	.4byte	.LLST306
-	.uleb128 0x2f
-	.8byte	.LVL1245
-	.4byte	0xa937
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x9
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0xc
-	.4byte	0xffffffff
-	.byte	0x1a
-	.byte	0
-	.byte	0
-	.uleb128 0x2d
-	.4byte	.LASF561
-	.byte	0x1
-	.byte	0xf1
-	.4byte	0x12c
-	.8byte	.LFB346
-	.8byte	.LFE346-.LFB346
-	.uleb128 0x1
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-	.uleb128 0x36
-	.8byte	.LVL571
-	.4byte	0xa94f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC78
-	.byte	0
-	.byte	0
-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0x74
-	.uleb128 0x2d
-	.4byte	.LASF583
-	.byte	0x1
-	.byte	0x1b
-	.4byte	0x12c
-	.8byte	.LFB338
-	.8byte	.LFE338-.LFB338
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2c67
-	.uleb128 0x2e
-	.4byte	.LASF30
-	.byte	0x1
-	.byte	0x1b
-	.4byte	0x5b
-	.4byte	.LLST135
-	.uleb128 0x2f
-	.8byte	.LVL558
-	.4byte	0xa95a
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x8
-	.byte	0x20
-	.byte	0x26
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.byte	0
-	.uleb128 0x43
-	.4byte	.LASF585
-	.byte	0x1
-	.byte	0x17
-	.8byte	.LFB337
-	.8byte	.LFE337-.LFB337
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2cca
-	.uleb128 0x31
-	.string	"buf"
-	.byte	0x1
-	.byte	0x17
-	.4byte	0x12c
-	.4byte	.LLST133
-	.uleb128 0x46
-	.4byte	0x2cca
-	.8byte	.LBB229
-	.8byte	.LBE229-.LBB229
-	.byte	0x1
-	.byte	0x19
-	.uleb128 0x47
-	.4byte	0x2cd6
-	.4byte	.LLST134
-	.uleb128 0x2f
-	.8byte	.LVL556
-	.4byte	0xa965
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF884
-	.byte	0x6
-	.byte	0x4e
-	.byte	0x3
-	.4byte	0x2ce2
-	.uleb128 0x38
-	.4byte	.LASF586
-	.byte	0x6
-	.byte	0x4e
-	.4byte	0x16f
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF587
-	.byte	0x5
-	.2byte	0x2f4
-	.4byte	0xb9
-	.8byte	.LFB320
-	.8byte	.LFE320-.LFB320
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2d1d
-	.uleb128 0x2f
-	.8byte	.LVL1926
-	.4byte	0x2d1d
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x4a
-	.4byte	.LASF589
-	.byte	0x5
-	.2byte	0x1d5
-	.4byte	0x5b
-	.byte	0x1
-	.4byte	0x2dea
-	.uleb128 0x4b
-	.4byte	.LASF590
-	.byte	0x5
-	.2byte	0x1d5
-	.4byte	0xdd4
-	.uleb128 0x4b
-	.4byte	.LASF591
-	.byte	0x5
-	.2byte	0x1d5
-	.4byte	0xdd4
-	.uleb128 0x4c
-	.4byte	.LASF592
-	.byte	0x5
-	.2byte	0x1d7
-	.4byte	0xdc9
-	.uleb128 0x4d
-	.string	"lpa"
-	.byte	0x5
-	.2byte	0x1d8
-	.4byte	0xdd4
-	.uleb128 0x4d
-	.string	"ppa"
-	.byte	0x5
-	.2byte	0x1d8
-	.4byte	0xdd4
-	.uleb128 0x4c
-	.4byte	.LASF593
-	.byte	0x5
-	.2byte	0x1d9
-	.4byte	0xdc9
-	.uleb128 0x4c
-	.4byte	.LASF299
-	.byte	0x5
-	.2byte	0x1da
-	.4byte	0xdc9
-	.uleb128 0x4c
-	.4byte	.LASF594
-	.byte	0x5
-	.2byte	0x1da
-	.4byte	0xdc9
-	.uleb128 0x4c
-	.4byte	.LASF595
-	.byte	0x5
-	.2byte	0x1da
-	.4byte	0xdc9
-	.uleb128 0x4c
-	.4byte	.LASF596
-	.byte	0x5
-	.2byte	0x1da
-	.4byte	0xdc9
-	.uleb128 0x4c
-	.4byte	.LASF597
-	.byte	0x5
-	.2byte	0x1db
-	.4byte	0xdc9
-	.uleb128 0x4c
-	.4byte	.LASF598
-	.byte	0x5
-	.2byte	0x1dc
-	.4byte	0x2dea
-	.uleb128 0x4e
-	.4byte	.LASF599
-	.byte	0x5
-	.2byte	0x272
-	.uleb128 0x4e
-	.4byte	.LASF600
-	.byte	0x5
-	.2byte	0x275
-	.uleb128 0x4f
-	.4byte	.LASF573
-	.4byte	0x2e00
-	.4byte	.LASF589
-	.uleb128 0x50
-	.uleb128 0x4c
-	.4byte	.LASF601
-	.byte	0x5
-	.2byte	0x1f3
-	.4byte	0xdc9
-	.byte	0
-	.byte	0
-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0x1238
-	.uleb128 0xa
-	.4byte	0xee
-	.4byte	0x2e00
-	.uleb128 0xe
-	.4byte	0xda
-	.byte	0x16
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x2df0
-	.uleb128 0x4a
-	.4byte	.LASF602
-	.byte	0x5
-	.2byte	0x1a2
-	.4byte	0x5b
-	.byte	0x1
-	.4byte	0x2e65
-	.uleb128 0x4d
-	.string	"ret"
-	.byte	0x5
-	.2byte	0x1a4
-	.4byte	0x5b
-	.uleb128 0x4d
-	.string	"i"
-	.byte	0x5
-	.2byte	0x1a5
-	.4byte	0x5b
-	.uleb128 0x4d
-	.string	"ppa"
-	.byte	0x5
-	.2byte	0x1a6
-	.4byte	0xdd4
-	.uleb128 0x4c
-	.4byte	.LASF564
-	.byte	0x5
-	.2byte	0x1a7
-	.4byte	0x26fc
-	.uleb128 0x51
-	.4byte	0x2e56
-	.uleb128 0x4c
-	.4byte	.LASF603
-	.byte	0x5
-	.2byte	0x1b1
-	.4byte	0xdf5
-	.byte	0
-	.uleb128 0x50
-	.uleb128 0x4c
-	.4byte	.LASF604
-	.byte	0x5
-	.2byte	0x1c6
-	.4byte	0xdd4
-	.byte	0
-	.byte	0
-	.uleb128 0x4a
-	.4byte	.LASF605
-	.byte	0x5
-	.2byte	0x185
-	.4byte	0x5b
-	.byte	0x1
-	.4byte	0x2eaf
-	.uleb128 0x4b
-	.4byte	.LASF606
-	.byte	0x5
-	.2byte	0x185
-	.4byte	0xdc9
-	.uleb128 0x4c
-	.4byte	.LASF594
-	.byte	0x5
-	.2byte	0x187
-	.4byte	0xdc9
-	.uleb128 0x4d
-	.string	"i"
-	.byte	0x5
-	.2byte	0x188
-	.4byte	0xdc9
-	.uleb128 0x4d
-	.string	"j"
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-	.2byte	0x188
-	.4byte	0xdc9
-	.uleb128 0x4c
-	.4byte	.LASF388
-	.byte	0x5
-	.2byte	0x189
-	.4byte	0xdc9
-	.byte	0
-	.uleb128 0x52
-	.4byte	.LASF714
-	.byte	0x5
-	.2byte	0x17a
-	.4byte	0x5b
-	.byte	0x1
-	.uleb128 0x49
-	.4byte	.LASF607
-	.byte	0x5
-	.2byte	0x166
-	.4byte	0x5b
-	.8byte	.LFB315
-	.8byte	.LFE315-.LFB315
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2f5e
-	.uleb128 0x53
-	.4byte	.LASF388
-	.byte	0x5
-	.2byte	0x166
-	.4byte	0xdc9
-	.4byte	.LLST130
-	.uleb128 0x54
-	.string	"i"
-	.byte	0x5
-	.2byte	0x168
-	.4byte	0xdc9
-	.4byte	.LLST131
-	.uleb128 0x55
-	.4byte	.LASF608
-	.byte	0x5
-	.2byte	0x169
-	.4byte	0xdc9
-	.4byte	.LLST132
-	.uleb128 0x34
-	.8byte	.LVL542
-	.4byte	0x6d33
-	.4byte	0x2f24
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL545
-	.4byte	0xa94f
-	.4byte	0x2f49
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC74
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL546
-	.4byte	0x2f5e
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF609
-	.byte	0x5
-	.2byte	0x158
-	.4byte	0x5b
-	.8byte	.LFB314
-	.8byte	.LFE314-.LFB314
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2fb2
-	.uleb128 0x53
-	.4byte	.LASF586
-	.byte	0x5
-	.2byte	0x158
-	.4byte	0xdc9
-	.4byte	.LLST129
-	.uleb128 0x36
-	.8byte	.LVL538
-	.4byte	0xa94f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC73
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF610
-	.byte	0x5
-	.2byte	0x13b
-	.4byte	0xdd4
-	.8byte	.LFB313
-	.8byte	.LFE313-.LFB313
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3078
-	.uleb128 0x54
-	.string	"i"
-	.byte	0x5
-	.2byte	0x13d
-	.4byte	0xdc9
-	.4byte	.LLST410
-	.uleb128 0x55
-	.4byte	.LASF598
-	.byte	0x5
-	.2byte	0x13e
-	.4byte	0x2dea
-	.4byte	.LLST411
-	.uleb128 0x34
-	.8byte	.LVL1808
-	.4byte	0x27d2
-	.4byte	0x300e
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1810
-	.4byte	0x3612
-	.4byte	0x302c
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1811
-	.4byte	0x32fe
-	.4byte	0x3043
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1813
-	.4byte	0x75b1
-	.uleb128 0x45
-	.8byte	.LVL1814
-	.4byte	0x7304
-	.uleb128 0x45
-	.8byte	.LVL1815
-	.4byte	0x32a3
-	.uleb128 0x45
-	.8byte	.LVL1819
-	.4byte	0x3503
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF611
-	.byte	0x5
-	.2byte	0x12b
-	.4byte	0xdd4
-	.8byte	.LFB312
-	.8byte	.LFE312-.LFB312
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x311d
-	.uleb128 0x34
-	.8byte	.LVL1823
-	.4byte	0x32fe
-	.4byte	0x30b1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1824
-	.4byte	0x3a23
-	.4byte	0x30d0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR53
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1825
-	.4byte	0x5d49
-	.uleb128 0x34
-	.8byte	.LVL1826
-	.4byte	0x594e
-	.4byte	0x30f4
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1827
-	.4byte	0x567a
-	.uleb128 0x2f
-	.8byte	.LVL1828
-	.4byte	0x37d5
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR53
-	.byte	0
-	.byte	0
-	.uleb128 0x56
-	.4byte	.LASF670
-	.byte	0x5
-	.2byte	0x120
-	.byte	0x1
-	.uleb128 0x2d
-	.4byte	.LASF612
-	.byte	0x5
-	.byte	0xd2
-	.4byte	0xdd4
-	.8byte	.LFB310
-	.8byte	.LFE310-.LFB310
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x32a3
-	.uleb128 0x2e
-	.4byte	.LASF613
-	.byte	0x5
-	.byte	0xd2
-	.4byte	0x1eef
-	.4byte	.LLST287
-	.uleb128 0x2e
-	.4byte	.LASF614
-	.byte	0x5
-	.byte	0xd2
-	.4byte	0xdd4
-	.4byte	.LLST288
-	.uleb128 0x32
-	.4byte	.LASF596
-	.byte	0x5
-	.byte	0xd4
-	.4byte	0xdc9
-	.4byte	.LLST289
-	.uleb128 0x32
-	.4byte	.LASF568
-	.byte	0x5
-	.byte	0xd5
-	.4byte	0xdc9
-	.4byte	.LLST290
-	.uleb128 0x33
-	.string	"req"
-	.byte	0x5
-	.byte	0xd5
-	.4byte	0xdc9
-	.4byte	.LLST291
-	.uleb128 0x32
-	.4byte	.LASF594
-	.byte	0x5
-	.byte	0xd6
-	.4byte	0xdc9
-	.4byte	.LLST292
-	.uleb128 0x32
-	.4byte	.LASF382
-	.byte	0x5
-	.byte	0xd6
-	.4byte	0xdc9
-	.4byte	.LLST293
-	.uleb128 0x32
-	.4byte	.LASF380
-	.byte	0x5
-	.byte	0xd6
-	.4byte	0xdc9
-	.4byte	.LLST294
-	.uleb128 0x32
-	.4byte	.LASF615
-	.byte	0x5
-	.byte	0xd7
-	.4byte	0xdd4
-	.4byte	.LLST295
-	.uleb128 0x32
-	.4byte	.LASF616
-	.byte	0x5
-	.byte	0xd8
-	.4byte	0xdd4
-	.4byte	.LLST296
-	.uleb128 0x57
-	.4byte	.LASF617
-	.byte	0x5
-	.byte	0xd9
-	.4byte	0xdd4
-	.sleb128 -1
-	.uleb128 0x32
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-	.4byte	0x2dea
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-	.byte	0xe1
-	.uleb128 0x58
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-	.byte	0x5
-	.byte	0xe5
-	.uleb128 0x59
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-	.8byte	.L879
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-	.8byte	.LVL1178
-	.4byte	0x32a3
-	.uleb128 0x34
-	.8byte	.LVL1186
-	.4byte	0x298f
-	.4byte	0x3243
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x8f
-	.sleb128 204
-	.byte	0x94
-	.byte	0x4
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1199
-	.4byte	0x6d73
-	.4byte	0x325d
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x4
-	.byte	0x74
-	.sleb128 0
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-	.byte	0x25
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1205
-	.4byte	0x4ec4
-	.4byte	0x327b
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
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-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1208
-	.4byte	0x3503
-	.uleb128 0x45
-	.8byte	.LVL1211
-	.4byte	0x6951
-	.uleb128 0x45
-	.8byte	.LVL1213
-	.4byte	0x32a3
-	.byte	0
-	.uleb128 0x43
-	.4byte	.LASF620
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-	.byte	0xc9
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-	.8byte	.LFE309-.LFB309
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x32fe
-	.uleb128 0x34
-	.8byte	.LVL1172
-	.4byte	0x258a
-	.4byte	0x32d8
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
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-	.uleb128 0x34
-	.8byte	.LVL1173
-	.4byte	0x258a
-	.4byte	0x32f0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.uleb128 0x5a
-	.8byte	.LVL1174
-	.4byte	0x3666
-	.byte	0
-	.uleb128 0x2d
-	.4byte	.LASF621
-	.byte	0x5
-	.byte	0x6f
-	.4byte	0x5b
-	.8byte	.LFB308
-	.8byte	.LFE308-.LFB308
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x34ee
-	.uleb128 0x2e
-	.4byte	.LASF622
-	.byte	0x5
-	.byte	0x6f
-	.4byte	0x5b
-	.4byte	.LLST405
-	.uleb128 0x33
-	.string	"i"
-	.byte	0x5
-	.byte	0x71
-	.4byte	0xdc9
-	.4byte	.LLST406
-	.uleb128 0x32
-	.4byte	.LASF623
-	.byte	0x5
-	.byte	0x71
-	.4byte	0xdc9
-	.4byte	.LLST407
-	.uleb128 0x2b
-	.4byte	.LASF624
-	.byte	0x5
-	.byte	0x72
-	.4byte	0xdd4
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -4
-	.uleb128 0x32
-	.4byte	.LASF625
-	.byte	0x5
-	.byte	0x73
-	.4byte	0xdd4
-	.4byte	.LLST408
-	.uleb128 0x2b
-	.4byte	.LASF613
-	.byte	0x5
-	.byte	0x74
-	.4byte	0x1eef
-	.uleb128 0xa
-	.byte	0x3
-	.8byte	g_gc_temp_superblock
-	.byte	0x9f
-	.uleb128 0x32
-	.4byte	.LASF626
-	.byte	0x5
-	.byte	0x75
-	.4byte	0x1f34
-	.4byte	.LLST409
-	.uleb128 0x3f
-	.4byte	.LASF573
-	.4byte	0x34fe
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.7245
-	.uleb128 0x34
-	.8byte	.LVL1770
-	.4byte	0x3126
-	.4byte	0x33be
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR53
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1772
-	.4byte	0x594e
-	.4byte	0x33d5
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1773
-	.4byte	0x75b1
-	.uleb128 0x45
-	.8byte	.LVL1774
-	.4byte	0x7304
-	.uleb128 0x34
-	.8byte	.LVL1778
-	.4byte	0xa94f
-	.4byte	0x3421
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR171
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xa2
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1780
-	.4byte	0x3691
-	.4byte	0x3439
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x9
-	.byte	0xff
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1781
-	.4byte	0x692c
-	.uleb128 0x45
-	.8byte	.LVL1783
-	.4byte	0x5d49
-	.uleb128 0x45
-	.8byte	.LVL1784
-	.4byte	0x567a
-	.uleb128 0x34
-	.8byte	.LVL1787
-	.4byte	0xa94f
-	.4byte	0x348b
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8a
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xa8
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1788
-	.4byte	0x5c1c
-	.4byte	0x34a9
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x8f
-	.sleb128 188
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1789
-	.4byte	0x6d33
-	.uleb128 0x34
-	.8byte	.LVL1792
-	.4byte	0x5c1c
-	.4byte	0x34d3
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x86
-	.sleb128 4
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1794
-	.4byte	0x3691
-	.uleb128 0x45
-	.8byte	.LVL1798
-	.4byte	0x6951
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xee
-	.4byte	0x34fe
-	.uleb128 0xe
-	.4byte	0xda
-	.byte	0x12
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x34ee
-	.uleb128 0x43
-	.4byte	.LASF627
-	.byte	0x5
-	.byte	0x54
-	.8byte	.LFB307
-	.8byte	.LFE307-.LFB307
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3580
-	.uleb128 0x2e
-	.4byte	.LASF628
-	.byte	0x5
-	.byte	0x54
-	.4byte	0xdd4
-	.4byte	.LLST124
-	.uleb128 0x2e
-	.4byte	.LASF391
-	.byte	0x5
-	.byte	0x54
-	.4byte	0xdd4
-	.4byte	.LLST125
-	.uleb128 0x31
-	.string	"lpa"
-	.byte	0x5
-	.byte	0x54
-	.4byte	0xdd4
-	.4byte	.LLST126
-	.uleb128 0x32
-	.4byte	.LASF629
-	.byte	0x5
-	.byte	0x56
-	.4byte	0xdc9
-	.4byte	.LLST127
-	.uleb128 0x33
-	.string	"i"
-	.byte	0x5
-	.byte	0x57
-	.4byte	0xdc9
-	.4byte	.LLST128
-	.uleb128 0x36
-	.8byte	.LVL526
-	.4byte	0x6d33
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x4
-	.byte	0x76
-	.sleb128 0
-	.byte	0x3a
-	.byte	0x25
-	.byte	0
-	.byte	0
-	.uleb128 0x2d
-	.4byte	.LASF630
-	.byte	0x5
-	.byte	0x49
-	.4byte	0xdd4
-	.8byte	.LFB306
-	.8byte	.LFE306-.LFB306
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x35be
-	.uleb128 0x31
-	.string	"blk"
-	.byte	0x5
-	.byte	0x49
-	.4byte	0xdc9
-	.4byte	.LLST122
-	.uleb128 0x33
-	.string	"i"
-	.byte	0x5
-	.byte	0x4b
-	.4byte	0xdc9
-	.4byte	.LLST123
-	.byte	0
-	.uleb128 0x43
-	.4byte	.LASF631
-	.byte	0x5
-	.byte	0x38
-	.8byte	.LFB305
-	.8byte	.LFE305-.LFB305
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3612
-	.uleb128 0x5b
-	.string	"req"
-	.byte	0x5
-	.byte	0x38
-	.4byte	0x1abc
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5c
-	.4byte	.LASF632
-	.byte	0x5
-	.byte	0x38
-	.4byte	0xdd4
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x33
-	.string	"i"
-	.byte	0x5
-	.byte	0x3a
-	.4byte	0xdc9
-	.4byte	.LLST120
-	.uleb128 0x32
-	.4byte	.LASF633
-	.byte	0x5
-	.byte	0x3b
-	.4byte	0xdc9
-	.4byte	.LLST121
-	.byte	0
-	.uleb128 0x43
-	.4byte	.LASF634
-	.byte	0x5
-	.byte	0x29
-	.8byte	.LFB304
-	.8byte	.LFE304-.LFB304
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3666
-	.uleb128 0x5b
-	.string	"req"
-	.byte	0x5
-	.byte	0x29
-	.4byte	0x1abc
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5c
-	.4byte	.LASF632
-	.byte	0x5
-	.byte	0x29
-	.4byte	0xdd4
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x33
-	.string	"i"
-	.byte	0x5
-	.byte	0x2b
-	.4byte	0xdc9
-	.4byte	.LLST118
-	.uleb128 0x32
-	.4byte	.LASF633
-	.byte	0x5
-	.byte	0x2c
-	.4byte	0xdc9
-	.4byte	.LLST119
-	.byte	0
-	.uleb128 0x43
-	.4byte	.LASF635
-	.byte	0x5
-	.byte	0x15
-	.8byte	.LFB303
-	.8byte	.LFE303-.LFB303
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3691
-	.uleb128 0x33
-	.string	"i"
-	.byte	0x5
-	.byte	0x17
-	.4byte	0xdc9
-	.4byte	.LLST117
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF636
-	.byte	0x2
-	.2byte	0xac6
-	.4byte	0x5b
-	.8byte	.LFB302
-	.8byte	.LFE302-.LFB302
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3780
-	.uleb128 0x53
-	.4byte	.LASF623
-	.byte	0x2
-	.2byte	0xac6
-	.4byte	0xdc9
-	.4byte	.LLST324
-	.uleb128 0x54
-	.string	"ret"
-	.byte	0x2
-	.2byte	0xac8
-	.4byte	0x5b
-	.4byte	.LLST325
-	.uleb128 0x3f
-	.4byte	.LASF573
-	.4byte	0x3790
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.7175
-	.uleb128 0x34
-	.8byte	.LVL1343
-	.4byte	0xa94f
-	.4byte	0x3710
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC101
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1348
-	.4byte	0xa94f
-	.4byte	0x3743
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR159
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xacd
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1349
-	.4byte	0x3795
-	.uleb128 0x36
-	.8byte	.LVL1351
-	.4byte	0xa94f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR159
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xadd
-	.byte	0
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xee
-	.4byte	0x3790
-	.uleb128 0xe
-	.4byte	0xda
-	.byte	0x13
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x3780
-	.uleb128 0x4a
-	.4byte	.LASF637
-	.byte	0x2
-	.2byte	0xab1
-	.4byte	0x5b
-	.byte	0x1
-	.4byte	0x37c0
-	.uleb128 0x4b
-	.4byte	.LASF623
-	.byte	0x2
-	.2byte	0xab1
-	.4byte	0xdc9
-	.uleb128 0x4f
-	.4byte	.LASF573
-	.4byte	0x37d0
-	.4byte	.LASF637
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xee
-	.4byte	0x37d0
-	.uleb128 0xe
-	.4byte	0xda
-	.byte	0xf
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x37c0
-	.uleb128 0x49
-	.4byte	.LASF638
-	.byte	0x2
-	.2byte	0xa91
-	.4byte	0xdd4
-	.8byte	.LFB300
-	.8byte	.LFE300-.LFB300
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3903
-	.uleb128 0x53
-	.4byte	.LASF639
-	.byte	0x2
-	.2byte	0xa91
-	.4byte	0x1eef
-	.4byte	.LLST114
-	.uleb128 0x55
-	.4byte	.LASF596
-	.byte	0x2
-	.2byte	0xa93
-	.4byte	0xdc9
-	.4byte	.LLST115
-	.uleb128 0x55
-	.4byte	.LASF640
-	.byte	0x2
-	.2byte	0xa94
-	.4byte	0xdd4
-	.4byte	.LLST116
-	.uleb128 0x3f
-	.4byte	.LASF573
-	.4byte	0x34fe
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.7155
-	.uleb128 0x34
-	.8byte	.LVL485
-	.4byte	0xa94f
-	.4byte	0x386d
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR88
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xa96
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL486
-	.4byte	0xa94f
-	.4byte	0x38a0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR88
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xa97
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL487
-	.4byte	0xa94f
-	.4byte	0x38d3
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR88
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xa98
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL491
-	.4byte	0xa94f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR88
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xaad
-	.byte	0
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF641
-	.byte	0x2
-	.2byte	0xa79
-	.4byte	0x5b
-	.8byte	.LFB299
-	.8byte	.LFE299-.LFB299
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3a0e
-	.uleb128 0x53
-	.4byte	.LASF639
-	.byte	0x2
-	.2byte	0xa79
-	.4byte	0x1eef
-	.4byte	.LLST396
-	.uleb128 0x55
-	.4byte	.LASF623
-	.byte	0x2
-	.2byte	0xa7b
-	.4byte	0xdc9
-	.4byte	.LLST397
-	.uleb128 0x3f
-	.4byte	.LASF573
-	.4byte	0x3a1e
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.7148
-	.uleb128 0x34
-	.8byte	.LVL1732
-	.4byte	0xa94f
-	.4byte	0x398b
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR169
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xa7c
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1733
-	.4byte	0x692c
-	.4byte	0x39a3
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1734
-	.4byte	0x3795
-	.uleb128 0x34
-	.8byte	.LVL1735
-	.4byte	0x3a23
-	.4byte	0x39c8
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1736
-	.4byte	0x5d49
-	.uleb128 0x34
-	.8byte	.LVL1737
-	.4byte	0x594e
-	.4byte	0x39ec
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1738
-	.4byte	0x567a
-	.uleb128 0x36
-	.8byte	.LVL1742
-	.4byte	0x6951
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xee
-	.4byte	0x3a1e
-	.uleb128 0xe
-	.4byte	0xda
-	.byte	0x1c
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x3a0e
-	.uleb128 0x49
-	.4byte	.LASF642
-	.byte	0x2
-	.2byte	0xa15
-	.4byte	0x5b
-	.8byte	.LFB298
-	.8byte	.LFE298-.LFB298
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3d4e
-	.uleb128 0x5d
-	.string	"p"
-	.byte	0x2
-	.2byte	0xa15
-	.4byte	0x1eef
-	.4byte	.LLST311
-	.uleb128 0x55
-	.4byte	.LASF643
-	.byte	0x2
-	.2byte	0xa17
-	.4byte	0xdc9
-	.4byte	.LLST312
-	.uleb128 0x4c
-	.4byte	.LASF594
-	.byte	0x2
-	.2byte	0xa18
-	.4byte	0xdc9
-	.uleb128 0x55
-	.4byte	.LASF568
-	.byte	0x2
-	.2byte	0xa18
-	.4byte	0xdc9
-	.4byte	.LLST313
-	.uleb128 0x54
-	.string	"n"
-	.byte	0x2
-	.2byte	0xa18
-	.4byte	0xdc9
-	.4byte	.LLST314
-	.uleb128 0x4c
-	.4byte	.LASF596
-	.byte	0x2
-	.2byte	0xa18
-	.4byte	0xdc9
-	.uleb128 0x55
-	.4byte	.LASF644
-	.byte	0x2
-	.2byte	0xa19
-	.4byte	0x5b
-	.4byte	.LLST315
-	.uleb128 0x55
-	.4byte	.LASF645
-	.byte	0x2
-	.2byte	0xa1a
-	.4byte	0xdc9
-	.4byte	.LLST316
-	.uleb128 0x4e
-	.4byte	.LASF646
-	.byte	0x2
-	.2byte	0xa1b
-	.uleb128 0x3f
-	.4byte	.LASF573
-	.4byte	0x3d5e
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.7127
-	.uleb128 0x5e
-	.4byte	0x53f4
-	.8byte	.LBB283
-	.8byte	.LBE283-.LBB283
-	.byte	0x2
-	.2byte	0xa4b
-	.4byte	0x3b1e
-	.uleb128 0x47
-	.4byte	0x540d
-	.4byte	.LLST317
-	.uleb128 0x47
-	.4byte	0x5401
-	.4byte	.LLST318
-	.uleb128 0x36
-	.8byte	.LVL1299
-	.4byte	0x96a0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x3e
-	.4byte	0x540d
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1271
-	.4byte	0xa94f
-	.4byte	0x3b51
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR157
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xa1c
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1275
-	.4byte	0x66d0
-	.4byte	0x3b70
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR47
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1277
-	.4byte	0xa94f
-	.4byte	0x3ba3
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR157
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xa25
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1278
-	.4byte	0x45ef
-	.4byte	0x3bbb
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1279
-	.4byte	0x692c
-	.4byte	0x3bd3
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1280
-	.4byte	0xa94f
-	.4byte	0x3c06
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR157
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xa30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1283
-	.4byte	0xa94f
-	.4byte	0x3c39
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR157
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xa33
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1285
-	.4byte	0xa94f
-	.4byte	0x3c6c
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR157
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xa3e
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1286
-	.4byte	0xa94f
-	.4byte	0x3c9f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR157
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xa40
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1287
-	.4byte	0x53f4
-	.4byte	0x3cbc
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1290
-	.4byte	0x270c
-	.4byte	0x3cd4
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1292
-	.4byte	0x3ef1
-	.4byte	0x3cec
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1293
-	.4byte	0x7304
-	.uleb128 0x34
-	.8byte	.LVL1294
-	.4byte	0x692c
-	.4byte	0x3d11
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1304
-	.4byte	0x75b1
-	.uleb128 0x36
-	.8byte	.LVL1308
-	.4byte	0xa94f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR157
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xa75
-	.byte	0
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xee
-	.4byte	0x3d5e
-	.uleb128 0xe
-	.4byte	0xda
-	.byte	0x18
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x3d4e
-	.uleb128 0x4a
-	.4byte	.LASF647
-	.byte	0x2
-	.2byte	0xa0c
-	.4byte	0x5b
-	.byte	0x1
-	.4byte	0x3d81
-	.uleb128 0x4b
-	.4byte	.LASF623
-	.byte	0x2
-	.2byte	0xa0c
-	.4byte	0xdc9
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF648
-	.byte	0x2
-	.2byte	0x9c3
-	.4byte	0xdc9
-	.8byte	.LFB296
-	.8byte	.LFE296-.LFB296
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3e5d
-	.uleb128 0x55
-	.4byte	.LASF649
-	.byte	0x2
-	.2byte	0x9c5
-	.4byte	0xdc9
-	.4byte	.LLST104
-	.uleb128 0x55
-	.4byte	.LASF650
-	.byte	0x2
-	.2byte	0x9c6
-	.4byte	0xdc9
-	.4byte	.LLST105
-	.uleb128 0x55
-	.4byte	.LASF651
-	.byte	0x2
-	.2byte	0x9c7
-	.4byte	0xdc9
-	.4byte	.LLST106
-	.uleb128 0x55
-	.4byte	.LASF652
-	.byte	0x2
-	.2byte	0x9c8
-	.4byte	0x1e17
-	.4byte	.LLST107
-	.uleb128 0x55
-	.4byte	.LASF653
-	.byte	0x2
-	.2byte	0x9c9
-	.4byte	0xdc9
-	.4byte	.LLST108
-	.uleb128 0x55
-	.4byte	.LASF654
-	.byte	0x2
-	.2byte	0x9ca
-	.4byte	0xdc9
-	.4byte	.LLST109
-	.uleb128 0x54
-	.string	"i"
-	.byte	0x2
-	.2byte	0x9cb
-	.4byte	0xdd4
-	.4byte	.LLST110
-	.uleb128 0x55
-	.4byte	.LASF325
-	.byte	0x2
-	.2byte	0x9cc
-	.4byte	0xdc9
-	.4byte	.LLST111
-	.uleb128 0x45
-	.8byte	.LVL462
-	.4byte	0x3e5d
-	.uleb128 0x45
-	.8byte	.LVL468
-	.4byte	0x3ebe
-	.uleb128 0x36
-	.8byte	.LVL470
-	.4byte	0xa94f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC72
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF655
-	.byte	0x2
-	.2byte	0x9ae
-	.4byte	0xdc9
-	.8byte	.LFB295
-	.8byte	.LFE295-.LFB295
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3ebe
-	.uleb128 0x53
-	.4byte	.LASF236
-	.byte	0x2
-	.2byte	0x9ae
-	.4byte	0xdc9
-	.4byte	.LLST93
-	.uleb128 0x55
-	.4byte	.LASF656
-	.byte	0x2
-	.2byte	0x9b0
-	.4byte	0xdc9
-	.4byte	.LLST94
-	.uleb128 0x55
-	.4byte	.LASF586
-	.byte	0x2
-	.2byte	0x9b1
-	.4byte	0xdc9
-	.4byte	.LLST95
-	.uleb128 0x54
-	.string	"i"
-	.byte	0x2
-	.2byte	0x9b2
-	.4byte	0xdc9
-	.4byte	.LLST96
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF657
-	.byte	0x2
-	.2byte	0x9a5
-	.4byte	0xdc9
-	.8byte	.LFB294
-	.8byte	.LFE294-.LFB294
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3ef1
-	.uleb128 0x55
-	.4byte	.LASF651
-	.byte	0x2
-	.2byte	0x9a7
-	.4byte	0xdc9
-	.4byte	.LLST92
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF658
-	.byte	0x2
-	.2byte	0x995
-	.4byte	0x5b
-	.8byte	.LFB293
-	.8byte	.LFE293-.LFB293
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3f79
-	.uleb128 0x53
-	.4byte	.LASF623
-	.byte	0x2
-	.2byte	0x995
-	.4byte	0xdc9
-	.4byte	.LLST88
-	.uleb128 0x55
-	.4byte	.LASF594
-	.byte	0x2
-	.2byte	0x997
-	.4byte	0xdc9
-	.4byte	.LLST89
-	.uleb128 0x55
-	.4byte	.LASF596
-	.byte	0x2
-	.2byte	0x997
-	.4byte	0xdc9
-	.4byte	.LLST90
-	.uleb128 0x55
-	.4byte	.LASF375
-	.byte	0x2
-	.2byte	0x998
-	.4byte	0xdc9
-	.4byte	.LLST91
-	.uleb128 0x34
-	.8byte	.LVL270
-	.4byte	0x6dce
-	.4byte	0x3f6b
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL271
-	.4byte	0x7522
-	.byte	0
-	.uleb128 0x4a
-	.4byte	.LASF659
-	.byte	0x2
-	.2byte	0x933
-	.4byte	0x5b
-	.byte	0x1
-	.4byte	0x3fa3
-	.uleb128 0x4d
-	.string	"i"
-	.byte	0x2
-	.2byte	0x935
-	.4byte	0x5b
-	.uleb128 0x50
-	.uleb128 0x4c
-	.4byte	.LASF613
-	.byte	0x2
-	.2byte	0x95a
-	.4byte	0x1eef
-	.byte	0
-	.byte	0
-	.uleb128 0x5f
-	.4byte	.LASF660
-	.byte	0x2
-	.2byte	0x914
-	.8byte	.LFB291
-	.8byte	.LFE291-.LFB291
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x40a7
-	.uleb128 0x54
-	.string	"i"
-	.byte	0x2
-	.2byte	0x916
-	.4byte	0x5b
-	.4byte	.LLST250
-	.uleb128 0x60
-	.string	"ppa"
-	.byte	0x2
-	.2byte	0x917
-	.4byte	0xdd4
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -4
-	.uleb128 0x55
-	.4byte	.LASF661
-	.byte	0x2
-	.2byte	0x918
-	.4byte	0x2dea
-	.4byte	.LLST251
-	.uleb128 0x34
-	.8byte	.LVL958
-	.4byte	0xa94f
-	.4byte	0x4013
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC91
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL961
-	.4byte	0x5c1c
-	.4byte	0x4037
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x8f
-	.sleb128 140
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL962
-	.4byte	0xa94f
-	.4byte	0x405c
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC92
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL964
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-	.4byte	0x4085
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR106
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-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
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-	.uleb128 0x30
-	.uleb128 0x1
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-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL965
-	.4byte	0xa94f
-	.uleb128 0x30
-	.uleb128 0x1
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-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC93
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-	.uleb128 0x1
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-	.uleb128 0x2
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-	.uleb128 0x1
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-	.uleb128 0x54
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-	.4byte	.LLST283
-	.uleb128 0x2a
-	.4byte	.LASF663
-	.byte	0x2
-	.2byte	0x8e4
-	.4byte	0xdd4
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -4
-	.uleb128 0x54
-	.string	"blk"
-	.byte	0x2
-	.2byte	0x8e5
-	.4byte	0xdc9
-	.4byte	.LLST284
-	.uleb128 0x55
-	.4byte	.LASF664
-	.byte	0x2
-	.2byte	0x8e6
-	.4byte	0xdc9
-	.4byte	.LLST285
-	.uleb128 0x3f
-	.4byte	.LASF573
-	.4byte	0x4239
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.7042
-	.uleb128 0x40
-	.4byte	.Ldebug_ranges0+0x210
-	.4byte	0x4159
-	.uleb128 0x55
-	.4byte	.LASF236
-	.byte	0x2
-	.2byte	0x903
-	.4byte	0xdc9
-	.4byte	.LLST286
-	.uleb128 0x36
-	.8byte	.LVL1167
-	.4byte	0xa94f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x89
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1145
-	.4byte	0xa94f
-	.4byte	0x4185
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC94
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR155
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1146
-	.4byte	0x258a
-	.4byte	0x41aa
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x86
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x2000
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1154
-	.4byte	0xa94f
-	.4byte	0x41dd
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR155
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x911
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1156
-	.4byte	0x5c1c
-	.4byte	0x4201
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x86
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x8f
-	.sleb128 188
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1157
-	.4byte	0x6d33
-	.uleb128 0x36
-	.8byte	.LVL1161
-	.4byte	0xa94f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xee
-	.4byte	0x4239
-	.uleb128 0xe
-	.4byte	0xda
-	.byte	0xd
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x4229
-	.uleb128 0x5f
-	.4byte	.LASF665
-	.byte	0x2
-	.2byte	0x8c1
-	.8byte	.LFB289
-	.8byte	.LFE289-.LFB289
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4372
-	.uleb128 0x54
-	.string	"i"
-	.byte	0x2
-	.2byte	0x8c3
-	.4byte	0xdc9
-	.4byte	.LLST393
-	.uleb128 0x54
-	.string	"lpn"
-	.byte	0x2
-	.2byte	0x8c4
-	.4byte	0xdd4
-	.4byte	.LLST394
-	.uleb128 0x2a
-	.4byte	.LASF663
-	.byte	0x2
-	.2byte	0x8c5
-	.4byte	0xdd4
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -4
-	.uleb128 0x54
-	.string	"blk"
-	.byte	0x2
-	.2byte	0x8c6
-	.4byte	0xdc9
-	.4byte	.LLST395
-	.uleb128 0x3f
-	.4byte	.LASF573
-	.4byte	0x4382
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.7026
-	.uleb128 0x34
-	.8byte	.LVL1712
-	.4byte	0xa94f
-	.4byte	0x42d8
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC94
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR168
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1713
-	.4byte	0x258a
-	.4byte	0x42f0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1718
-	.4byte	0x5c1c
-	.4byte	0x4314
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x8f
-	.sleb128 156
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1719
-	.4byte	0x6d33
-	.uleb128 0x34
-	.8byte	.LVL1723
-	.4byte	0xa94f
-	.4byte	0x433f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x87
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1724
-	.4byte	0x3795
-	.4byte	0x4357
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1725
-	.4byte	0x5d49
-	.uleb128 0x45
-	.8byte	.LVL1726
-	.4byte	0x567a
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xee
-	.4byte	0x4382
-	.uleb128 0xe
-	.4byte	0xda
-	.byte	0x14
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x4372
-	.uleb128 0x5f
-	.4byte	.LASF666
-	.byte	0x2
-	.2byte	0x89c
-	.8byte	.LFB288
-	.8byte	.LFE288-.LFB288
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x443f
-	.uleb128 0x53
-	.4byte	.LASF613
-	.byte	0x2
-	.2byte	0x89c
-	.4byte	0x1eef
-	.4byte	.LLST355
-	.uleb128 0x2a
-	.4byte	.LASF667
-	.byte	0x2
-	.2byte	0x89e
-	.4byte	0xdf5
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -32
-	.uleb128 0x55
-	.4byte	.LASF598
-	.byte	0x2
-	.2byte	0x89f
-	.4byte	0x2dea
-	.4byte	.LLST356
-	.uleb128 0x55
-	.4byte	.LASF668
-	.byte	0x2
-	.2byte	0x8a0
-	.4byte	0x5b
-	.4byte	.LLST357
-	.uleb128 0x61
-	.4byte	.LASF384
-	.byte	0x2
-	.2byte	0x8a1
-	.4byte	0xdd4
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1521
-	.4byte	0x37d5
-	.4byte	0x4409
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1522
-	.4byte	0x27d2
-	.4byte	0x4431
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x8f
-	.sleb128 80
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1523
-	.4byte	0x3691
-	.byte	0
-	.uleb128 0x5f
-	.4byte	.LASF669
-	.byte	0x2
-	.2byte	0x882
-	.8byte	.LFB287
-	.8byte	.LFE287-.LFB287
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x44a0
-	.uleb128 0x34
-	.8byte	.LVL1663
-	.4byte	0x59b6
-	.4byte	0x447f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL1664
-	.4byte	0x258a
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x200
-	.byte	0
-	.byte	0
-	.uleb128 0x56
-	.4byte	.LASF671
-	.byte	0x2
-	.2byte	0x86e
-	.byte	0x1
-	.uleb128 0x49
-	.4byte	.LASF672
-	.byte	0x2
-	.2byte	0x843
-	.4byte	0x5b
-	.8byte	.LFB285
-	.8byte	.LFE285-.LFB285
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x45da
-	.uleb128 0x55
-	.4byte	.LASF649
-	.byte	0x2
-	.2byte	0x845
-	.4byte	0xdc9
-	.4byte	.LLST276
-	.uleb128 0x55
-	.4byte	.LASF594
-	.byte	0x2
-	.2byte	0x845
-	.4byte	0xdc9
-	.4byte	.LLST277
-	.uleb128 0x55
-	.4byte	.LASF596
-	.byte	0x2
-	.2byte	0x845
-	.4byte	0xdc9
-	.4byte	.LLST278
-	.uleb128 0x55
-	.4byte	.LASF375
-	.byte	0x2
-	.2byte	0x845
-	.4byte	0xdc9
-	.4byte	.LLST279
-	.uleb128 0x55
-	.4byte	.LASF673
-	.byte	0x2
-	.2byte	0x846
-	.4byte	0xdc9
-	.4byte	.LLST280
-	.uleb128 0x55
-	.4byte	.LASF674
-	.byte	0x2
-	.2byte	0x846
-	.4byte	0xdc9
-	.4byte	.LLST281
-	.uleb128 0x3f
-	.4byte	.LASF573
-	.4byte	0x45ea
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.7001
-	.uleb128 0x34
-	.8byte	.LVL1119
-	.4byte	0x258a
-	.4byte	0x4555
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1123
-	.4byte	0x6dce
-	.4byte	0x456d
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1124
-	.4byte	0x7522
-	.uleb128 0x34
-	.8byte	.LVL1131
-	.4byte	0x6951
-	.4byte	0x4592
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1139
-	.4byte	0x692c
-	.4byte	0x45aa
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL1141
-	.4byte	0xa94f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR154
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x86a
-	.byte	0
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xee
-	.4byte	0x45ea
-	.uleb128 0xe
-	.4byte	0xda
-	.byte	0x11
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x45da
-	.uleb128 0x49
-	.4byte	.LASF675
-	.byte	0x2
-	.2byte	0x82d
-	.4byte	0x5b
-	.8byte	.LFB284
-	.8byte	.LFE284-.LFB284
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x46a7
-	.uleb128 0x5d
-	.string	"p"
-	.byte	0x2
-	.2byte	0x82d
-	.4byte	0x1eef
-	.4byte	.LLST85
-	.uleb128 0x55
-	.4byte	.LASF594
-	.byte	0x2
-	.2byte	0x82f
-	.4byte	0xdc9
-	.4byte	.LLST86
-	.uleb128 0x55
-	.4byte	.LASF596
-	.byte	0x2
-	.2byte	0x82f
-	.4byte	0xdc9
-	.4byte	.LLST87
-	.uleb128 0x3f
-	.4byte	.LASF573
-	.4byte	0x37d0
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.6980
-	.uleb128 0x34
-	.8byte	.LVL253
-	.4byte	0xa94f
-	.4byte	0x4685
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR60
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x831
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL257
-	.4byte	0x6dce
-	.uleb128 0x36
-	.8byte	.LVL259
-	.4byte	0x7522
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF676
-	.byte	0x2
-	.2byte	0x820
-	.4byte	0x5b
-	.8byte	.LFB283
-	.8byte	.LFE283-.LFB283
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x474b
-	.uleb128 0x34
-	.8byte	.LVL1802
-	.4byte	0x4771
-	.4byte	0x46e1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1803
-	.4byte	0x474b
-	.4byte	0x46f9
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1804
-	.4byte	0x4771
-	.4byte	0x4711
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1805
-	.4byte	0x474b
-	.4byte	0x4729
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1806
-	.4byte	0x311d
-	.uleb128 0x36
-	.8byte	.LVL1807
-	.4byte	0x3691
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x9
-	.byte	0xff
-	.byte	0
-	.byte	0
-	.uleb128 0x62
-	.4byte	.LASF712
-	.byte	0x2
-	.2byte	0x80d
-	.byte	0x1
-	.4byte	0x4771
-	.uleb128 0x4b
-	.4byte	.LASF639
-	.byte	0x2
-	.2byte	0x80d
-	.4byte	0x1eef
-	.uleb128 0x4c
-	.4byte	.LASF596
-	.byte	0x2
-	.2byte	0x80f
-	.4byte	0xdc9
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF677
-	.byte	0x2
-	.2byte	0x6a8
-	.4byte	0x5b
-	.8byte	.LFB281
-	.8byte	.LFE281-.LFB281
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4d6e
-	.uleb128 0x53
-	.4byte	.LASF613
-	.byte	0x2
-	.2byte	0x6a8
-	.4byte	0x1eef
-	.4byte	.LLST330
-	.uleb128 0x55
-	.4byte	.LASF678
-	.byte	0x2
-	.2byte	0x6aa
-	.4byte	0xdc9
-	.4byte	.LLST331
-	.uleb128 0x55
-	.4byte	.LASF679
-	.byte	0x2
-	.2byte	0x6aa
-	.4byte	0xdc9
-	.4byte	.LLST332
-	.uleb128 0x55
-	.4byte	.LASF594
-	.byte	0x2
-	.2byte	0x6ab
-	.4byte	0xdc9
-	.4byte	.LLST333
-	.uleb128 0x55
-	.4byte	.LASF382
-	.byte	0x2
-	.2byte	0x6ab
-	.4byte	0xdc9
-	.4byte	.LLST334
-	.uleb128 0x55
-	.4byte	.LASF380
-	.byte	0x2
-	.2byte	0x6ab
-	.4byte	0xdc9
-	.4byte	.LLST335
-	.uleb128 0x55
-	.4byte	.LASF680
-	.byte	0x2
-	.2byte	0x6ac
-	.4byte	0xdc9
-	.4byte	.LLST336
-	.uleb128 0x55
-	.4byte	.LASF681
-	.byte	0x2
-	.2byte	0x6ac
-	.4byte	0xdc9
-	.4byte	.LLST337
-	.uleb128 0x55
-	.4byte	.LASF596
-	.byte	0x2
-	.2byte	0x6ad
-	.4byte	0xdc9
-	.4byte	.LLST338
-	.uleb128 0x55
-	.4byte	.LASF682
-	.byte	0x2
-	.2byte	0x6ae
-	.4byte	0x5b
-	.4byte	.LLST339
-	.uleb128 0x55
-	.4byte	.LASF683
-	.byte	0x2
-	.2byte	0x6ae
-	.4byte	0x5b
-	.4byte	.LLST339
-	.uleb128 0x55
-	.4byte	.LASF568
-	.byte	0x2
-	.2byte	0x6af
-	.4byte	0xdc9
-	.4byte	.LLST341
-	.uleb128 0x54
-	.string	"n"
-	.byte	0x2
-	.2byte	0x6af
-	.4byte	0xdc9
-	.4byte	.LLST342
-	.uleb128 0x54
-	.string	"req"
-	.byte	0x2
-	.2byte	0x6af
-	.4byte	0xdc9
-	.4byte	.LLST343
-	.uleb128 0x60
-	.string	"lpa"
-	.byte	0x2
-	.2byte	0x6b0
-	.4byte	0xdd4
-	.uleb128 0x1
-	.byte	0x68
-	.uleb128 0x2a
-	.4byte	.LASF663
-	.byte	0x2
-	.2byte	0x6b0
-	.4byte	0xdd4
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -12
-	.uleb128 0x2a
-	.4byte	.LASF624
-	.byte	0x2
-	.2byte	0x6b0
-	.4byte	0xdd4
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -8
-	.uleb128 0x2a
-	.4byte	.LASF615
-	.byte	0x2
-	.2byte	0x6b0
-	.4byte	0xdd4
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -4
-	.uleb128 0x55
-	.4byte	.LASF629
-	.byte	0x2
-	.2byte	0x6b1
-	.4byte	0xdc9
-	.4byte	.LLST344
-	.uleb128 0x55
-	.4byte	.LASF684
-	.byte	0x2
-	.2byte	0x6b1
-	.4byte	0xdc9
-	.4byte	.LLST345
-	.uleb128 0x55
-	.4byte	.LASF685
-	.byte	0x2
-	.2byte	0x6b2
-	.4byte	0xdd4
-	.4byte	.LLST346
-	.uleb128 0x55
-	.4byte	.LASF686
-	.byte	0x2
-	.2byte	0x6b3
-	.4byte	0xdc9
-	.4byte	.LLST347
-	.uleb128 0x55
-	.4byte	.LASF598
-	.byte	0x2
-	.2byte	0x6b4
-	.4byte	0x2dea
-	.4byte	.LLST348
-	.uleb128 0x61
-	.4byte	.LASF687
-	.byte	0x2
-	.2byte	0x6b5
-	.4byte	0xdd4
-	.byte	0
-	.uleb128 0x3f
-	.4byte	.LASF573
-	.4byte	0x4d7e
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.6923
-	.uleb128 0x59
-	.4byte	.LASF689
-	.byte	0x2
-	.2byte	0x744
-	.8byte	.L1038
-	.uleb128 0x59
-	.4byte	.LASF619
-	.byte	0x2
-	.2byte	0x74c
-	.8byte	.L1053
-	.uleb128 0x59
-	.4byte	.LASF690
-	.byte	0x2
-	.2byte	0x7ff
-	.8byte	.L1059
-	.uleb128 0x4e
-	.4byte	.LASF691
-	.byte	0x2
-	.2byte	0x809
-	.uleb128 0x40
-	.4byte	.Ldebug_ranges0+0x2b0
-	.4byte	0x4991
-	.uleb128 0x55
-	.4byte	.LASF692
-	.byte	0x2
-	.2byte	0x71c
-	.4byte	0xdd4
-	.4byte	.LLST349
-	.uleb128 0x55
-	.4byte	.LASF693
-	.byte	0x2
-	.2byte	0x71d
-	.4byte	0xdd4
-	.4byte	.LLST350
-	.uleb128 0x36
-	.8byte	.LVL1432
-	.4byte	0x298f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.byte	0
-	.uleb128 0x40
-	.4byte	.Ldebug_ranges0+0x2e0
-	.4byte	0x4a8c
-	.uleb128 0x55
-	.4byte	.LASF694
-	.byte	0x2
-	.2byte	0x777
-	.4byte	0xdd4
-	.4byte	.LLST351
-	.uleb128 0x55
-	.4byte	.LASF695
-	.byte	0x2
-	.2byte	0x778
-	.4byte	0xdd4
-	.4byte	.LLST352
-	.uleb128 0x34
-	.8byte	.LVL1475
-	.4byte	0x298f
-	.4byte	0x49d6
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1477
-	.4byte	0x3691
-	.uleb128 0x34
-	.8byte	.LVL1483
-	.4byte	0x5c1c
-	.4byte	0x4a07
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x8f
-	.sleb128 340
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1486
-	.4byte	0x6ce4
-	.4byte	0x4a22
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x8f
-	.sleb128 296
-	.byte	0x94
-	.byte	0x4
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1487
-	.4byte	0x4d83
-	.4byte	0x4a3a
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1489
-	.4byte	0x298f
-	.4byte	0x4a56
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1492
-	.4byte	0x6ce4
-	.4byte	0x4a6e
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x73
-	.sleb128 0
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL1493
-	.4byte	0x6ce4
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x8f
-	.sleb128 296
-	.byte	0x94
-	.byte	0x4
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x73
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x63
-	.8byte	.LBB310
-	.8byte	.LBE310-.LBB310
-	.4byte	0x4b16
-	.uleb128 0x55
-	.4byte	.LASF696
-	.byte	0x2
-	.2byte	0x7b6
-	.4byte	0xdd4
-	.4byte	.LLST353
-	.uleb128 0x55
-	.4byte	.LASF695
-	.byte	0x2
-	.2byte	0x7b7
-	.4byte	0xdd4
-	.4byte	.LLST354
-	.uleb128 0x34
-	.8byte	.LVL1501
-	.4byte	0x298f
-	.4byte	0x4add
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1502
-	.4byte	0x6ce4
-	.4byte	0x4af5
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL1503
-	.4byte	0x5c1c
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x8f
-	.sleb128 344
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1380
-	.4byte	0x6c07
-	.4byte	0x4b2d
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1385
-	.4byte	0x298f
-	.4byte	0x4b4a
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x86
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1390
-	.4byte	0x6d73
-	.uleb128 0x34
-	.8byte	.LVL1393
-	.4byte	0x4ec4
-	.4byte	0x4b7b
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x86
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8b
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1401
-	.4byte	0xa94f
-	.4byte	0x4bae
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR160
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x6db
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1402
-	.4byte	0xa94f
-	.4byte	0x4be1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR160
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x6dc
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1411
-	.4byte	0x6ce4
-	.4byte	0x4bf9
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1437
-	.4byte	0x5875
-	.4byte	0x4c18
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR144
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1440
-	.4byte	0x298f
-	.4byte	0x4c35
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1461
-	.4byte	0x6d73
-	.4byte	0x4c4f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x4
-	.byte	0x75
-	.sleb128 0
-	.byte	0x3a
-	.byte	0x25
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1468
-	.4byte	0x3691
-	.uleb128 0x34
-	.8byte	.LVL1471
-	.4byte	0x6ce4
-	.4byte	0x4c74
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1472
-	.4byte	0x5c1c
-	.4byte	0x4c98
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x8f
-	.sleb128 344
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1473
-	.4byte	0x6ce4
-	.4byte	0x4cb0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1478
-	.4byte	0x6d33
-	.4byte	0x4cca
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x4
-	.byte	0x73
-	.sleb128 0
-	.byte	0x3a
-	.byte	0x25
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1480
-	.4byte	0xa94f
-	.4byte	0x4cfd
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR160
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x7d6
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1495
-	.4byte	0x5c1c
-	.4byte	0x4d21
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x8f
-	.sleb128 348
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1496
-	.4byte	0x6d33
-	.4byte	0x4d3b
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x4
-	.byte	0x73
-	.sleb128 0
-	.byte	0x3a
-	.byte	0x25
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1505
-	.4byte	0xa94f
-	.4byte	0x4d60
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC102
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1507
-	.4byte	0x3691
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xee
-	.4byte	0x4d7e
-	.uleb128 0xe
-	.4byte	0xda
-	.byte	0x15
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x4d6e
-	.uleb128 0x5f
-	.4byte	.LASF697
-	.byte	0x2
-	.2byte	0x68c
-	.8byte	.LFB280
-	.8byte	.LFE280-.LFB280
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4ec4
-	.uleb128 0x5d
-	.string	"lpa"
-	.byte	0x2
-	.2byte	0x68c
-	.4byte	0xdd4
-	.4byte	.LLST244
-	.uleb128 0x53
-	.4byte	.LASF663
-	.byte	0x2
-	.2byte	0x68c
-	.4byte	0xdd4
-	.4byte	.LLST245
-	.uleb128 0x55
-	.4byte	.LASF629
-	.byte	0x2
-	.2byte	0x68e
-	.4byte	0xdc9
-	.4byte	.LLST246
-	.uleb128 0x3f
-	.4byte	.LASF573
-	.4byte	0x37d0
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.6889
-	.uleb128 0x40
-	.4byte	.Ldebug_ranges0+0x190
-	.4byte	0x4e88
-	.uleb128 0x54
-	.string	"i"
-	.byte	0x2
-	.2byte	0x692
-	.4byte	0xdc9
-	.4byte	.LLST247
-	.uleb128 0x55
-	.4byte	.LASF586
-	.byte	0x2
-	.2byte	0x693
-	.4byte	0xdc9
-	.4byte	.LLST248
-	.uleb128 0x55
-	.4byte	.LASF236
-	.byte	0x2
-	.2byte	0x694
-	.4byte	0xdc9
-	.4byte	.LLST249
-	.uleb128 0x34
-	.8byte	.LVL946
-	.4byte	0x6747
-	.4byte	0x4e40
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR47
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL947
-	.4byte	0xa94f
-	.4byte	0x4e73
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR146
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x698
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL948
-	.4byte	0x692c
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL940
-	.4byte	0x6d33
-	.4byte	0x4ea3
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x3a
-	.byte	0x25
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL950
-	.4byte	0x5c1c
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x8f
-	.sleb128 124
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x5f
-	.4byte	.LASF698
-	.byte	0x2
-	.2byte	0x678
-	.8byte	.LFB279
-	.8byte	.LFE279-.LFB279
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4f21
-	.uleb128 0x64
-	.4byte	.LASF613
-	.byte	0x2
-	.2byte	0x678
-	.4byte	0x1eef
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x53
-	.4byte	.LASF380
-	.byte	0x2
-	.2byte	0x678
-	.4byte	0xdc9
-	.4byte	.LLST80
-	.uleb128 0x53
-	.4byte	.LASF382
-	.byte	0x2
-	.2byte	0x678
-	.4byte	0xdc9
-	.4byte	.LLST81
-	.uleb128 0x55
-	.4byte	.LASF594
-	.byte	0x2
-	.2byte	0x67a
-	.4byte	0xdc9
-	.4byte	.LLST82
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF699
-	.byte	0x2
-	.2byte	0x66f
-	.4byte	0x5b
-	.8byte	.LFB278
-	.8byte	.LFE278-.LFB278
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4f6c
-	.uleb128 0x45
-	.8byte	.LVL1110
-	.4byte	0x4f6c
-	.uleb128 0x36
-	.8byte	.LVL1111
-	.4byte	0x5004
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR144
-	.byte	0
-	.byte	0
-	.uleb128 0x5f
-	.4byte	.LASF700
-	.byte	0x2
-	.2byte	0x658
-	.8byte	.LFB277
-	.8byte	.LFE277-.LFB277
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4fc6
-	.uleb128 0x55
-	.4byte	.LASF330
-	.byte	0x2
-	.2byte	0x65a
-	.4byte	0xdc9
-	.4byte	.LLST275
-	.uleb128 0x34
-	.8byte	.LVL1107
-	.4byte	0x258a
-	.4byte	0x4fb1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL1108
-	.4byte	0x258a
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF701
-	.byte	0x2
-	.2byte	0x648
-	.4byte	0x5b
-	.8byte	.LFB276
-	.8byte	.LFE276-.LFB276
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5004
-	.uleb128 0x36
-	.8byte	.LVL1106
-	.4byte	0x5004
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR149
-	.byte	0
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF702
-	.byte	0x2
-	.2byte	0x5ea
-	.4byte	0x5b
-	.8byte	.LFB275
-	.8byte	.LFE275-.LFB275
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x51d6
-	.uleb128 0x53
-	.4byte	.LASF703
-	.byte	0x2
-	.2byte	0x5ea
-	.4byte	0x51d6
-	.4byte	.LLST264
-	.uleb128 0x55
-	.4byte	.LASF704
-	.byte	0x2
-	.2byte	0x5ec
-	.4byte	0xdea
-	.4byte	.LLST265
-	.uleb128 0x55
-	.4byte	.LASF299
-	.byte	0x2
-	.2byte	0x5ec
-	.4byte	0xdea
-	.4byte	.LLST266
-	.uleb128 0x55
-	.4byte	.LASF705
-	.byte	0x2
-	.2byte	0x5ed
-	.4byte	0xdea
-	.4byte	.LLST267
-	.uleb128 0x55
-	.4byte	.LASF330
-	.byte	0x2
-	.2byte	0x5ee
-	.4byte	0xdc9
-	.4byte	.LLST268
-	.uleb128 0x55
-	.4byte	.LASF706
-	.byte	0x2
-	.2byte	0x5ef
-	.4byte	0x1001
-	.4byte	.LLST269
-	.uleb128 0x55
-	.4byte	.LASF310
-	.byte	0x2
-	.2byte	0x5f0
-	.4byte	0x10f8
-	.4byte	.LLST270
-	.uleb128 0x55
-	.4byte	.LASF311
-	.byte	0x2
-	.2byte	0x5f1
-	.4byte	0x1001
-	.4byte	.LLST271
-	.uleb128 0x55
-	.4byte	.LASF307
-	.byte	0x2
-	.2byte	0x5f2
-	.4byte	0xdc9
-	.4byte	.LLST272
-	.uleb128 0x55
-	.4byte	.LASF707
-	.byte	0x2
-	.2byte	0x5f3
-	.4byte	0xdc9
-	.4byte	.LLST273
-	.uleb128 0x55
-	.4byte	.LASF708
-	.byte	0x2
-	.2byte	0x5f4
-	.4byte	0x51dc
-	.4byte	.LLST274
-	.uleb128 0x34
-	.8byte	.LVL1066
-	.4byte	0x258a
-	.4byte	0x50fc
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8b
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x4
-	.byte	0x87
-	.sleb128 0
-	.byte	0x32
-	.byte	0x24
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1071
-	.4byte	0x6c07
-	.4byte	0x5113
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1076
-	.4byte	0x6340
-	.4byte	0x512b
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1077
-	.4byte	0x62e8
-	.4byte	0x5143
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1078
-	.4byte	0x616e
-	.4byte	0x515b
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1079
-	.4byte	0x616e
-	.4byte	0x5173
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1087
-	.4byte	0x298f
-	.4byte	0x5195
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1091
-	.4byte	0x298f
-	.4byte	0x51b7
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL1093
-	.4byte	0x298f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0x104f
-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0x1280
-	.uleb128 0x49
-	.4byte	.LASF709
-	.byte	0x2
-	.2byte	0x580
-	.4byte	0x5b
-	.8byte	.LFB274
-	.8byte	.LFE274-.LFB274
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x53c1
-	.uleb128 0x55
-	.4byte	.LASF705
-	.byte	0x2
-	.2byte	0x582
-	.4byte	0xdea
-	.4byte	.LLST462
-	.uleb128 0x3f
-	.4byte	.LASF573
-	.4byte	0x298a
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.6826
-	.uleb128 0x34
-	.8byte	.LVL2055
-	.4byte	0x258a
-	.4byte	0x523e
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2056
-	.4byte	0x6c07
-	.4byte	0x5255
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2058
-	.4byte	0xa94f
-	.4byte	0x5288
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR179
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x59d
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2059
-	.4byte	0xa94f
-	.4byte	0x52bb
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR179
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x59f
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2061
-	.4byte	0x2512
-	.4byte	0x52d9
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x30
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL2062
-	.4byte	0x2512
-	.uleb128 0x45
-	.8byte	.LVL2063
-	.4byte	0x2512
-	.uleb128 0x34
-	.8byte	.LVL2064
-	.4byte	0xa94f
-	.4byte	0x5326
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR179
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x5b5
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2065
-	.4byte	0x45ef
-	.4byte	0x5345
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR51
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2066
-	.4byte	0x45ef
-	.4byte	0x5364
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR52
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2067
-	.4byte	0x45ef
-	.4byte	0x5383
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR53
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2068
-	.4byte	0x45ef
-	.4byte	0x53a2
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR80
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL2070
-	.4byte	0x298f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF710
-	.byte	0x2
-	.2byte	0x57b
-	.4byte	0x5b
-	.8byte	.LFB273
-	.8byte	.LFE273-.LFB273
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x53f4
-	.uleb128 0x53
-	.4byte	.LASF711
-	.byte	0x2
-	.2byte	0x57b
-	.4byte	0xdc9
-	.4byte	.LLST79
-	.byte	0
-	.uleb128 0x62
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-	.byte	0x2
-	.2byte	0x573
-	.byte	0x1
-	.4byte	0x541a
-	.uleb128 0x4b
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-	.2byte	0x573
-	.4byte	0xdc9
-	.uleb128 0x4b
-	.4byte	.LASF590
-	.byte	0x2
-	.2byte	0x573
-	.4byte	0x5b
-	.byte	0
-	.uleb128 0x52
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-	.2byte	0x566
-	.4byte	0x5b
-	.byte	0x1
-	.uleb128 0x49
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-	.byte	0x2
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-	.4byte	0x5b
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-	.8byte	.LFE270-.LFB270
-	.uleb128 0x1
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-	.4byte	0x567a
-	.uleb128 0x55
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-	.4byte	0xdc9
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-	.string	"i"
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-	.4byte	0x4239
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.6769
-	.uleb128 0x34
-	.8byte	.LVL988
-	.4byte	0x258a
-	.4byte	0x54df
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL989
-	.4byte	0x258a
-	.4byte	0x54f6
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL990
-	.4byte	0x258a
-	.4byte	0x550d
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL991
-	.4byte	0x258a
-	.4byte	0x5524
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL992
-	.4byte	0x258a
-	.4byte	0x554e
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR79
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x3c
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL995
-	.4byte	0x6dce
-	.4byte	0x5569
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x8f
-	.sleb128 332
-	.byte	0x94
-	.byte	0x2
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL997
-	.4byte	0x7522
-	.4byte	0x5581
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1006
-	.4byte	0x298f
-	.4byte	0x559e
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x86
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1011
-	.4byte	0x298f
-	.4byte	0x55ba
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1013
-	.4byte	0x6b48
-	.4byte	0x55d7
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8a
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1017
-	.4byte	0xa94f
-	.4byte	0x5605
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x4
-	.byte	0x8f
-	.sleb128 296
-	.byte	0x6
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x4bb
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1028
-	.4byte	0xa94f
-	.4byte	0x5633
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x4
-	.byte	0x8f
-	.sleb128 296
-	.byte	0x6
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x4e4
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1039
-	.4byte	0x6b48
-	.4byte	0x564a
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL1041
-	.4byte	0xa94f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR148
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x561
-	.byte	0
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF719
-	.byte	0x2
-	.2byte	0x41c
-	.4byte	0x5b
-	.8byte	.LFB269
-	.8byte	.LFE269-.LFB269
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5823
-	.uleb128 0x55
-	.4byte	.LASF300
-	.byte	0x2
-	.2byte	0x41e
-	.4byte	0xdc9
-	.4byte	.LLST384
-	.uleb128 0x55
-	.4byte	.LASF720
-	.byte	0x2
-	.2byte	0x41f
-	.4byte	0x5823
-	.4byte	.LLST385
-	.uleb128 0x55
-	.4byte	.LASF721
-	.byte	0x2
-	.2byte	0x420
-	.4byte	0xdc9
-	.4byte	.LLST386
-	.uleb128 0x4e
-	.4byte	.LASF722
-	.byte	0x2
-	.2byte	0x44d
-	.uleb128 0x3f
-	.4byte	.LASF573
-	.4byte	0x298a
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.6747
-	.uleb128 0x34
-	.8byte	.LVL1667
-	.4byte	0x258a
-	.4byte	0x56ff
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1668
-	.4byte	0x2512
-	.4byte	0x5724
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR39
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x30
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1669
-	.4byte	0x2512
-	.uleb128 0x45
-	.8byte	.LVL1670
-	.4byte	0x2512
-	.uleb128 0x34
-	.8byte	.LVL1671
-	.4byte	0x592a
-	.4byte	0x5756
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1673
-	.4byte	0x27d2
-	.4byte	0x577d
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8c
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1675
-	.4byte	0x6976
-	.uleb128 0x34
-	.8byte	.LVL1676
-	.4byte	0x27d2
-	.4byte	0x57b1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8c
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1677
-	.4byte	0xa94f
-	.4byte	0x57e4
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR166
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x464
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1680
-	.4byte	0xa94f
-	.4byte	0x5809
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC104
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL1681
-	.4byte	0x6b48
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8a
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0x12d8
-	.uleb128 0x62
-	.4byte	.LASF723
-	.byte	0x2
-	.2byte	0x3e3
-	.byte	0x1
-	.4byte	0x5875
-	.uleb128 0x50
-	.uleb128 0x4d
-	.string	"lpa"
-	.byte	0x2
-	.2byte	0x3e8
-	.4byte	0xdd4
-	.uleb128 0x4d
-	.string	"ppa"
-	.byte	0x2
-	.2byte	0x3e9
-	.4byte	0xdd4
-	.uleb128 0x4c
-	.4byte	.LASF724
-	.byte	0x2
-	.2byte	0x3ea
-	.4byte	0xdd4
-	.uleb128 0x4c
-	.4byte	.LASF667
-	.byte	0x2
-	.2byte	0x3eb
-	.4byte	0xdf5
-	.uleb128 0x4c
-	.4byte	.LASF598
-	.byte	0x2
-	.2byte	0x3ec
-	.4byte	0x2dea
-	.byte	0
-	.byte	0
-	.uleb128 0x5f
-	.4byte	.LASF725
-	.byte	0x2
-	.2byte	0x3b1
-	.8byte	.LFB267
-	.8byte	.LFE267-.LFB267
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x592a
-	.uleb128 0x53
-	.4byte	.LASF703
-	.byte	0x2
-	.2byte	0x3b1
-	.4byte	0x51d6
-	.4byte	.LLST253
-	.uleb128 0x54
-	.string	"ppa"
-	.byte	0x2
-	.2byte	0x3b3
-	.4byte	0xdd4
-	.4byte	.LLST254
-	.uleb128 0x55
-	.4byte	.LASF317
-	.byte	0x2
-	.2byte	0x3b4
-	.4byte	0xdc9
-	.4byte	.LLST255
-	.uleb128 0x55
-	.4byte	.LASF706
-	.byte	0x2
-	.2byte	0x3b5
-	.4byte	0x1001
-	.4byte	.LLST256
-	.uleb128 0x34
-	.8byte	.LVL982
-	.4byte	0x298f
-	.4byte	0x58fc
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR106
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.8byte	.LVL984
-	.4byte	0x5e8c
-	.4byte	0x5915
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL986
-	.4byte	0x258a
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.byte	0
-	.uleb128 0x62
-	.4byte	.LASF726
-	.byte	0x2
-	.2byte	0x3a2
-	.byte	0x1
-	.4byte	0x594e
-	.uleb128 0x4b
-	.4byte	.LASF393
-	.byte	0x2
-	.2byte	0x3a2
-	.4byte	0xdd4
-	.uleb128 0x4d
-	.string	"i"
-	.byte	0x2
-	.2byte	0x3a4
-	.4byte	0xdc9
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF727
-	.byte	0x2
-	.2byte	0x38d
-	.4byte	0x5b
-	.8byte	.LFB265
-	.8byte	.LFE265-.LFB265
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x59b6
-	.uleb128 0x53
-	.4byte	.LASF728
-	.byte	0x2
-	.2byte	0x38d
-	.4byte	0xdd4
-	.4byte	.LLST374
-	.uleb128 0x55
-	.4byte	.LASF729
-	.byte	0x2
-	.2byte	0x38f
-	.4byte	0xdd4
-	.4byte	.LLST375
-	.uleb128 0x34
-	.8byte	.LVL1629
-	.4byte	0x5ade
-	.4byte	0x59a8
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x40
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1630
-	.4byte	0x44a0
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF730
-	.byte	0x2
-	.2byte	0x367
-	.4byte	0xdd4
-	.8byte	.LFB264
-	.8byte	.LFE264-.LFB264
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5ad8
-	.uleb128 0x53
-	.4byte	.LASF731
-	.byte	0x2
-	.2byte	0x367
-	.4byte	0xdd4
-	.4byte	.LLST376
-	.uleb128 0x53
-	.4byte	.LASF732
-	.byte	0x2
-	.2byte	0x367
-	.4byte	0xdd4
-	.4byte	.LLST377
-	.uleb128 0x53
-	.4byte	.LASF733
-	.byte	0x2
-	.2byte	0x367
-	.4byte	0x5ad8
-	.4byte	.LLST378
-	.uleb128 0x54
-	.string	"len"
-	.byte	0x2
-	.2byte	0x369
-	.4byte	0xdc9
-	.4byte	.LLST379
-	.uleb128 0x55
-	.4byte	.LASF734
-	.byte	0x2
-	.2byte	0x369
-	.4byte	0xdc9
-	.4byte	.LLST380
-	.uleb128 0x54
-	.string	"ppn"
-	.byte	0x2
-	.2byte	0x36a
-	.4byte	0xdd4
-	.4byte	.LLST381
-	.uleb128 0x55
-	.4byte	.LASF735
-	.byte	0x2
-	.2byte	0x36b
-	.4byte	0xdd4
-	.4byte	.LLST382
-	.uleb128 0x60
-	.string	"req"
-	.byte	0x2
-	.2byte	0x36c
-	.4byte	0xdf5
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -96
-	.uleb128 0x55
-	.4byte	.LASF736
-	.byte	0x2
-	.2byte	0x36d
-	.4byte	0xdd4
-	.4byte	.LLST383
-	.uleb128 0x2a
-	.4byte	.LASF564
-	.byte	0x2
-	.2byte	0x36e
-	.4byte	0x26fc
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -64
-	.uleb128 0x34
-	.8byte	.LVL1649
-	.4byte	0x298f
-	.4byte	0x5a9a
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x8f
-	.sleb128 208
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1651
-	.4byte	0x2512
-	.4byte	0x5ab8
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x87
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8c
-	.sleb128 0
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL1658
-	.4byte	0x258a
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x87
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8c
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0xdbe
-	.uleb128 0x49
-	.4byte	.LASF737
-	.byte	0x2
-	.2byte	0x342
-	.4byte	0xdd4
-	.8byte	.LFB263
-	.8byte	.LFE263-.LFB263
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5c1c
-	.uleb128 0x53
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-	.4byte	0xdd4
-	.4byte	.LLST366
-	.uleb128 0x53
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-	.4byte	0xdd4
-	.4byte	.LLST367
-	.uleb128 0x53
-	.4byte	.LASF733
-	.byte	0x2
-	.2byte	0x342
-	.4byte	0x5ad8
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-	.uleb128 0x54
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-	.4byte	0xdc9
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-	.uleb128 0x55
-	.4byte	.LASF734
-	.byte	0x2
-	.2byte	0x344
-	.4byte	0xdc9
-	.4byte	.LLST370
-	.uleb128 0x54
-	.string	"ppn"
-	.byte	0x2
-	.2byte	0x345
-	.4byte	0xdd4
-	.4byte	.LLST371
-	.uleb128 0x55
-	.4byte	.LASF735
-	.byte	0x2
-	.2byte	0x346
-	.4byte	0xdd4
-	.4byte	.LLST372
-	.uleb128 0x60
-	.string	"req"
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-	.2byte	0x347
-	.4byte	0xdf5
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -96
-	.uleb128 0x55
-	.4byte	.LASF736
-	.byte	0x2
-	.2byte	0x348
-	.4byte	0xdd4
-	.4byte	.LLST373
-	.uleb128 0x2a
-	.4byte	.LASF564
-	.byte	0x2
-	.2byte	0x349
-	.4byte	0x26fc
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -64
-	.uleb128 0x34
-	.8byte	.LVL1610
-	.4byte	0x298f
-	.4byte	0x5bc2
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x8f
-	.sleb128 208
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
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-	.byte	0
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-	.8byte	.LVL1612
-	.4byte	0x2512
-	.4byte	0x5be3
-	.uleb128 0x30
-	.uleb128 0x1
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-	.byte	0x88
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x5
-	.byte	0x8f
-	.sleb128 204
-	.byte	0x94
-	.byte	0x4
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1616
-	.4byte	0x5e8c
-	.4byte	0x5c08
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
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-	.8byte	.LANCHOR149
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 -1
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL1621
-	.4byte	0x258a
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.byte	0
-	.uleb128 0x49
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-	.byte	0x2
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-	.4byte	0x5b
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-	.8byte	.LFE262-.LFB262
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5d34
-	.uleb128 0x5d
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-	.2byte	0x321
-	.4byte	0xdd4
-	.4byte	.LLST238
-	.uleb128 0x5d
-	.string	"ppn"
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-	.2byte	0x321
-	.4byte	0x1001
-	.4byte	.LLST239
-	.uleb128 0x53
-	.4byte	.LASF739
-	.byte	0x2
-	.2byte	0x321
-	.4byte	0x5b
-	.4byte	.LLST240
-	.uleb128 0x55
-	.4byte	.LASF740
-	.byte	0x2
-	.2byte	0x323
-	.4byte	0xdc9
-	.4byte	.LLST241
-	.uleb128 0x55
-	.4byte	.LASF741
-	.byte	0x2
-	.2byte	0x323
-	.4byte	0xdc9
-	.4byte	.LLST242
-	.uleb128 0x55
-	.4byte	.LASF742
-	.byte	0x2
-	.2byte	0x323
-	.4byte	0xdc9
-	.4byte	.LLST243
-	.uleb128 0x3f
-	.4byte	.LASF573
-	.4byte	0x5d44
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.6674
-	.uleb128 0x59
-	.4byte	.LASF743
-	.byte	0x2
-	.2byte	0x32c
-	.8byte	.L664
-	.uleb128 0x34
-	.8byte	.LVL924
-	.4byte	0xa94f
-	.4byte	0x5cf4
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR145
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x328
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL927
-	.4byte	0x5d9b
-	.uleb128 0x34
-	.8byte	.LVL929
-	.4byte	0x5e2e
-	.4byte	0x5d19
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x89
-	.sleb128 0
-	.byte	0
-	.uleb128 0x36
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-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x86
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x89
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xee
-	.4byte	0x5d44
-	.uleb128 0xe
-	.4byte	0xda
-	.byte	0x8
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x5d34
-	.uleb128 0x49
-	.4byte	.LASF744
-	.byte	0x2
-	.2byte	0x314
-	.4byte	0x5b
-	.8byte	.LFB261
-	.8byte	.LFE261-.LFB261
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5d9b
-	.uleb128 0x54
-	.string	"i"
-	.byte	0x2
-	.2byte	0x316
-	.4byte	0xdc9
-	.4byte	.LLST329
-	.uleb128 0x45
-	.8byte	.LVL1365
-	.4byte	0x5829
-	.uleb128 0x36
-	.8byte	.LVL1368
-	.4byte	0x5e2e
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.byte	0
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-	.byte	0x2
-	.2byte	0x2ec
-	.4byte	0xdc9
-	.8byte	.LFB260
-	.8byte	.LFE260-.LFB260
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5e2e
-	.uleb128 0x54
-	.string	"i"
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-	.2byte	0x2ee
-	.4byte	0xdc9
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-	.4byte	.LASF746
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-	.2byte	0x2ef
-	.4byte	0xdc9
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-	.8byte	__func__.6657
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-	.8byte	.LVL212
-	.4byte	0xa94f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
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-	.uleb128 0x1
-	.byte	0x51
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-	.8byte	.LANCHOR57
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-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x310
-	.byte	0
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF748
-	.byte	0x2
-	.2byte	0x2e2
-	.4byte	0x5b
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-	.8byte	.LFE259-.LFB259
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-	.byte	0x9c
-	.4byte	0x5e8c
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-	.2byte	0x2e2
-	.4byte	0xdc9
-	.4byte	.LLST236
-	.uleb128 0x55
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-	.byte	0x2
-	.2byte	0x2e4
-	.4byte	0xdd4
-	.4byte	.LLST237
-	.uleb128 0x36
-	.8byte	.LVL917
-	.4byte	0x5e8c
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR144
-	.byte	0
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF749
-	.byte	0x2
-	.2byte	0x2a7
-	.4byte	0x5b
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-	.8byte	.LFE258-.LFB258
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-	.byte	0x9c
-	.4byte	0x601d
-	.uleb128 0x53
-	.4byte	.LASF703
-	.byte	0x2
-	.2byte	0x2a7
-	.4byte	0x51d6
-	.4byte	.LLST223
-	.uleb128 0x53
-	.4byte	.LASF317
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-	.2byte	0x2a7
-	.4byte	0xdd4
-	.4byte	.LLST224
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-	.4byte	.LASF733
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-	.2byte	0x2a7
-	.4byte	0x1001
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-	.4byte	.LASF708
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-	.2byte	0x2aa
-	.4byte	0x51dc
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-	.4byte	.LASF721
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-	.8byte	__func__.6632
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-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
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-	.uleb128 0x1
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-	.uleb128 0x9
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-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x88
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-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x2bb
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL877
-	.4byte	0xa94f
-	.4byte	0x5f99
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
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-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x2bc
-	.byte	0
-	.uleb128 0x34
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-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x30
-	.uleb128 0x1
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-	.uleb128 0x1
-	.byte	0x40
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-	.uleb128 0x34
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-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
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-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC89
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-	.uleb128 0x36
-	.8byte	.LVL885
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-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC90
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x86
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF751
-	.byte	0x2
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-	.4byte	0x5b
-	.8byte	.LFB257
-	.8byte	.LFE257-.LFB257
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6159
-	.uleb128 0x53
-	.4byte	.LASF703
-	.byte	0x2
-	.2byte	0x277
-	.4byte	0x51d6
-	.4byte	.LLST217
-	.uleb128 0x4c
-	.4byte	.LASF388
-	.byte	0x2
-	.2byte	0x279
-	.4byte	0xdc9
-	.uleb128 0x55
-	.4byte	.LASF330
-	.byte	0x2
-	.2byte	0x279
-	.4byte	0xdc9
-	.4byte	.LLST218
-	.uleb128 0x55
-	.4byte	.LASF752
-	.byte	0x2
-	.2byte	0x27a
-	.4byte	0xdc9
-	.4byte	.LLST219
-	.uleb128 0x55
-	.4byte	.LASF753
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-	.4byte	0x10f8
-	.4byte	.LLST220
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-	.4byte	.LASF706
-	.byte	0x2
-	.2byte	0x27c
-	.4byte	0x1001
-	.4byte	.LLST221
-	.uleb128 0x55
-	.4byte	.LASF708
-	.byte	0x2
-	.2byte	0x27d
-	.4byte	0x51dc
-	.4byte	.LLST222
-	.uleb128 0x3f
-	.4byte	.LASF573
-	.4byte	0x6169
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.6618
-	.uleb128 0x34
-	.8byte	.LVL854
-	.4byte	0xa94f
-	.4byte	0x60f1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
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-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR141
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-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
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-	.byte	0
-	.uleb128 0x45
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-	.4byte	0x6976
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-	.8byte	.LVL862
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-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL866
-	.4byte	0x27d2
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-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR106
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-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL867
-	.4byte	0x616e
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0xa
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-	.4byte	0x6169
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-	.byte	0x1e
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x6159
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-	.4byte	.LASF754
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-	.4byte	0x5b
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-	.8byte	.LFE256-.LFB256
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x62e8
-	.uleb128 0x53
-	.4byte	.LASF703
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-	.4byte	0x51d6
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-	.2byte	0x250
-	.4byte	0x51dc
-	.4byte	.LLST235
-	.uleb128 0x3f
-	.4byte	.LASF573
-	.4byte	0x298a
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.6604
-	.uleb128 0x34
-	.8byte	.LVL894
-	.4byte	0x6340
-	.4byte	0x622b
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL897
-	.4byte	0x62e8
-	.4byte	0x6243
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL899
-	.4byte	0x6b48
-	.4byte	0x6260
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL901
-	.4byte	0x62e8
-	.4byte	0x6278
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL906
-	.4byte	0x298f
-	.4byte	0x62a1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR106
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL907
-	.4byte	0xa94f
-	.4byte	0x62cd
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x86
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x265
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL912
-	.4byte	0x5e8c
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x4a
-	.4byte	.LASF757
-	.byte	0x2
-	.2byte	0x231
-	.4byte	0x5b
-	.byte	0x1
-	.4byte	0x632b
-	.uleb128 0x4b
-	.4byte	.LASF703
-	.byte	0x2
-	.2byte	0x231
-	.4byte	0x51d6
-	.uleb128 0x4c
-	.4byte	.LASF758
-	.byte	0x2
-	.2byte	0x233
-	.4byte	0xdc9
-	.uleb128 0x4c
-	.4byte	.LASF753
-	.byte	0x2
-	.2byte	0x234
-	.4byte	0x10f8
-	.uleb128 0x4f
-	.4byte	.LASF573
-	.4byte	0x633b
-	.4byte	.LASF757
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xee
-	.4byte	0x633b
-	.uleb128 0xe
-	.4byte	0xda
-	.byte	0x19
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x632b
-	.uleb128 0x49
-	.4byte	.LASF759
-	.byte	0x2
-	.2byte	0x209
-	.4byte	0x5b
-	.8byte	.LFB254
-	.8byte	.LFE254-.LFB254
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6423
-	.uleb128 0x53
-	.4byte	.LASF703
-	.byte	0x2
-	.2byte	0x209
-	.4byte	0x51d6
-	.4byte	.LLST208
-	.uleb128 0x55
-	.4byte	.LASF753
-	.byte	0x2
-	.2byte	0x20b
-	.4byte	0x10f8
-	.4byte	.LLST209
-	.uleb128 0x55
-	.4byte	.LASF706
-	.byte	0x2
-	.2byte	0x20c
-	.4byte	0x1001
-	.4byte	.LLST210
-	.uleb128 0x55
-	.4byte	.LASF760
-	.byte	0x2
-	.2byte	0x20d
-	.4byte	0x10f8
-	.4byte	.LLST211
-	.uleb128 0x55
-	.4byte	.LASF388
-	.byte	0x2
-	.2byte	0x20e
-	.4byte	0xdc9
-	.4byte	.LLST212
-	.uleb128 0x55
-	.4byte	.LASF330
-	.byte	0x2
-	.2byte	0x20e
-	.4byte	0xdc9
-	.4byte	.LLST213
-	.uleb128 0x55
-	.4byte	.LASF758
-	.byte	0x2
-	.2byte	0x20f
-	.4byte	0xdc9
-	.4byte	.LLST214
-	.uleb128 0x55
-	.4byte	.LASF761
-	.byte	0x2
-	.2byte	0x210
-	.4byte	0xdc9
-	.4byte	.LLST215
-	.uleb128 0x55
-	.4byte	.LASF756
-	.byte	0x2
-	.2byte	0x211
-	.4byte	0xdc9
-	.4byte	.LLST216
-	.uleb128 0x34
-	.8byte	.LVL831
-	.4byte	0x258a
-	.4byte	0x640f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL848
-	.4byte	0x6b48
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF762
-	.byte	0x2
-	.2byte	0x1e7
-	.4byte	0x5b
-	.8byte	.LFB253
-	.8byte	.LFE253-.LFB253
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x65ab
-	.uleb128 0x53
-	.4byte	.LASF317
-	.byte	0x2
-	.2byte	0x1e7
-	.4byte	0xdc9
-	.4byte	.LLST205
-	.uleb128 0x53
-	.4byte	.LASF740
-	.byte	0x2
-	.2byte	0x1e7
-	.4byte	0xdc9
-	.4byte	.LLST206
-	.uleb128 0x2a
-	.4byte	.LASF708
-	.byte	0x2
-	.2byte	0x1e9
-	.4byte	0x51dc
-	.uleb128 0x1
-	.byte	0x69
-	.uleb128 0x55
-	.4byte	.LASF763
-	.byte	0x2
-	.2byte	0x1ea
-	.4byte	0xdd4
-	.4byte	.LLST207
-	.uleb128 0x3f
-	.4byte	.LASF573
-	.4byte	0x37d0
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.6560
-	.uleb128 0x34
-	.8byte	.LVL815
-	.4byte	0xa94f
-	.4byte	0x64c9
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR140
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x1ec
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL818
-	.4byte	0x258a
-	.4byte	0x64e1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL822
-	.4byte	0x298f
-	.4byte	0x6503
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL824
-	.4byte	0xa94f
-	.4byte	0x652e
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC86
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL825
-	.4byte	0x2b07
-	.4byte	0x6557
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC87
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x34
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x34
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL826
-	.4byte	0x2b07
-	.4byte	0x657b
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC88
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x34
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL827
-	.4byte	0xa94f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR140
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x201
-	.byte	0
-	.byte	0
-	.uleb128 0x4a
-	.4byte	.LASF764
-	.byte	0x2
-	.2byte	0x1bf
-	.4byte	0x5b
-	.byte	0x1
-	.4byte	0x662a
-	.uleb128 0x4b
-	.4byte	.LASF649
-	.byte	0x2
-	.2byte	0x1bf
-	.4byte	0xdc9
-	.uleb128 0x4c
-	.4byte	.LASF765
-	.byte	0x2
-	.2byte	0x1c1
-	.4byte	0xdc9
-	.uleb128 0x4c
-	.4byte	.LASF766
-	.byte	0x2
-	.2byte	0x1c2
-	.4byte	0xdc9
-	.uleb128 0x4c
-	.4byte	.LASF767
-	.byte	0x2
-	.2byte	0x1c3
-	.4byte	0xdd4
-	.uleb128 0x4c
-	.4byte	.LASF768
-	.byte	0x2
-	.2byte	0x1c5
-	.4byte	0xdc9
-	.uleb128 0x4c
-	.4byte	.LASF769
-	.byte	0x2
-	.2byte	0x1c6
-	.4byte	0xdd4
-	.uleb128 0x4c
-	.4byte	.LASF652
-	.byte	0x2
-	.2byte	0x1c7
-	.4byte	0x1e17
-	.uleb128 0x4c
-	.4byte	.LASF770
-	.byte	0x2
-	.2byte	0x1c7
-	.4byte	0x1e17
-	.uleb128 0x4f
-	.4byte	.LASF573
-	.4byte	0x4d7e
-	.4byte	.LASF764
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF771
-	.byte	0x2
-	.2byte	0x1ab
-	.4byte	0x5b
-	.8byte	.LFB251
-	.8byte	.LFE251-.LFB251
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x667d
-	.uleb128 0x53
-	.4byte	.LASF236
-	.byte	0x2
-	.2byte	0x1ab
-	.4byte	0xdc9
-	.4byte	.LLST61
-	.uleb128 0x55
-	.4byte	.LASF649
-	.byte	0x2
-	.2byte	0x1ad
-	.4byte	0xdc9
-	.4byte	.LLST62
-	.uleb128 0x55
-	.4byte	.LASF652
-	.byte	0x2
-	.2byte	0x1ae
-	.4byte	0x1e17
-	.4byte	.LLST63
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF772
-	.byte	0x2
-	.2byte	0x1a6
-	.4byte	0x5b
-	.8byte	.LFB250
-	.8byte	.LFE250-.LFB250
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x66ca
-	.uleb128 0x53
-	.4byte	.LASF773
-	.byte	0x2
-	.2byte	0x1a6
-	.4byte	0x66ca
-	.4byte	.LLST60
-	.uleb128 0x2f
-	.8byte	.LVL168
-	.4byte	0x66d0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.byte	0
-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0x1e17
-	.uleb128 0x49
-	.4byte	.LASF774
-	.byte	0x2
-	.2byte	0x193
-	.4byte	0x5b
-	.8byte	.LFB249
-	.8byte	.LFE249-.LFB249
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6747
-	.uleb128 0x53
-	.4byte	.LASF773
-	.byte	0x2
-	.2byte	0x193
-	.4byte	0x66ca
-	.4byte	.LLST56
-	.uleb128 0x53
-	.4byte	.LASF236
-	.byte	0x2
-	.2byte	0x193
-	.4byte	0xdc9
-	.4byte	.LLST57
-	.uleb128 0x55
-	.4byte	.LASF649
-	.byte	0x2
-	.2byte	0x195
-	.4byte	0xdc9
-	.4byte	.LLST58
-	.uleb128 0x55
-	.4byte	.LASF652
-	.byte	0x2
-	.2byte	0x196
-	.4byte	0x1e17
-	.4byte	.LLST59
-	.uleb128 0x36
-	.8byte	.LVL159
-	.4byte	0x6747
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF775
-	.byte	0x2
-	.2byte	0x176
-	.4byte	0x5b
-	.8byte	.LFB248
-	.8byte	.LFE248-.LFB248
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x67ec
-	.uleb128 0x53
-	.4byte	.LASF773
-	.byte	0x2
-	.2byte	0x176
-	.4byte	0x66ca
-	.4byte	.LLST52
-	.uleb128 0x53
-	.4byte	.LASF649
-	.byte	0x2
-	.2byte	0x176
-	.4byte	0xdc9
-	.4byte	.LLST53
-	.uleb128 0x55
-	.4byte	.LASF652
-	.byte	0x2
-	.2byte	0x178
-	.4byte	0x1e17
-	.4byte	.LLST54
-	.uleb128 0x55
-	.4byte	.LASF776
-	.byte	0x2
-	.2byte	0x178
-	.4byte	0x1e17
-	.4byte	.LLST55
-	.uleb128 0x3f
-	.4byte	.LASF573
-	.4byte	0x67fc
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.6519
-	.uleb128 0x36
-	.8byte	.LVL144
-	.4byte	0xa94f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR50
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x17b
-	.byte	0
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xee
-	.4byte	0x67fc
-	.uleb128 0xe
-	.4byte	0xda
-	.byte	0x10
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x67ec
-	.uleb128 0x49
-	.4byte	.LASF777
-	.byte	0x2
-	.2byte	0x145
-	.4byte	0x5b
-	.8byte	.LFB247
-	.8byte	.LFE247-.LFB247
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6882
-	.uleb128 0x53
-	.4byte	.LASF649
-	.byte	0x2
-	.2byte	0x145
-	.4byte	0xdc9
-	.4byte	.LLST45
-	.uleb128 0x55
-	.4byte	.LASF652
-	.byte	0x2
-	.2byte	0x147
-	.4byte	0x1e17
-	.4byte	.LLST46
-	.uleb128 0x55
-	.4byte	.LASF776
-	.byte	0x2
-	.2byte	0x147
-	.4byte	0x1e17
-	.4byte	.LLST47
-	.uleb128 0x2a
-	.4byte	.LASF778
-	.byte	0x2
-	.2byte	0x148
-	.4byte	0xdc9
-	.uleb128 0x1
-	.byte	0x5d
-	.uleb128 0x55
-	.4byte	.LASF779
-	.byte	0x2
-	.2byte	0x149
-	.4byte	0xdc9
-	.4byte	.LLST48
-	.uleb128 0x55
-	.4byte	.LASF780
-	.byte	0x2
-	.2byte	0x14a
-	.4byte	0xdc9
-	.4byte	.LLST49
-	.byte	0
-	.uleb128 0x2d
-	.4byte	.LASF781
-	.byte	0x2
-	.byte	0xf8
-	.4byte	0x5b
-	.8byte	.LFB246
-	.8byte	.LFE246-.LFB246
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x692c
-	.uleb128 0x2e
-	.4byte	.LASF649
-	.byte	0x2
-	.byte	0xf8
-	.4byte	0xdc9
-	.4byte	.LLST34
-	.uleb128 0x32
-	.4byte	.LASF652
-	.byte	0x2
-	.byte	0xfa
-	.4byte	0x1e17
-	.4byte	.LLST35
-	.uleb128 0x32
-	.4byte	.LASF776
-	.byte	0x2
-	.byte	0xfa
-	.4byte	0x1e17
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-	.uleb128 0x32
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-	.byte	0x2
-	.byte	0xfb
-	.4byte	0xdc9
-	.4byte	.LLST37
-	.uleb128 0x32
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-	.byte	0x2
-	.byte	0xfc
-	.4byte	0xdc9
-	.4byte	.LLST38
-	.uleb128 0x32
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-	.byte	0xfd
-	.4byte	0xdd4
-	.4byte	.LLST39
-	.uleb128 0x32
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-	.byte	0xfe
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-	.4byte	.LLST40
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-	.byte	0xff
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-	.byte	0xd9
-	.byte	0x1
-	.4byte	0x6951
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-	.4byte	0xdc9
-	.uleb128 0x4f
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-	.byte	0
-	.uleb128 0x65
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-	.byte	0x2
-	.byte	0xd2
-	.byte	0x1
-	.4byte	0x6976
-	.uleb128 0x38
-	.4byte	.LASF649
-	.byte	0x2
-	.byte	0xd2
-	.4byte	0xdc9
-	.uleb128 0x4f
-	.4byte	.LASF573
-	.4byte	0x67fc
-	.4byte	.LASF786
-	.byte	0
-	.uleb128 0x2d
-	.4byte	.LASF787
-	.byte	0x2
-	.byte	0xb4
-	.4byte	0xdc9
-	.8byte	.LFB243
-	.8byte	.LFE243-.LFB243
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-	.byte	0x9c
-	.4byte	0x6a64
-	.uleb128 0x33
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-	.byte	0xb6
-	.4byte	0xdc9
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-	.uleb128 0x3d
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-	.byte	0xb7
-	.4byte	0x6a64
-	.uleb128 0xa
-	.byte	0x3
-	.8byte	gSysFreeQueue
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-	.uleb128 0x66
-	.4byte	.LASF788
-	.byte	0x2
-	.byte	0xb9
-	.8byte	.L464
-	.uleb128 0x40
-	.4byte	.Ldebug_ranges0+0x140
-	.4byte	0x6a12
-	.uleb128 0x32
-	.4byte	.LASF789
-	.byte	0x2
-	.byte	0xbf
-	.4byte	0xdc9
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-	.8byte	.LVL719
-	.4byte	0x6d33
-	.4byte	0x69f9
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
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-	.sleb128 0
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL722
-	.4byte	0x270c
-	.uleb128 0x30
-	.uleb128 0x1
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-	.uleb128 0x1
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-	.4byte	0xa94f
-	.4byte	0x6a49
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-	.uleb128 0x1
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-	.uleb128 0x9
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-	.8byte	.LC82
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-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
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-	.uleb128 0x36
-	.8byte	.LVL728
-	.4byte	0xa94f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x87
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x84
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-	.byte	0
-	.byte	0
-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0x15a4
-	.uleb128 0x2d
-	.4byte	.LASF790
-	.byte	0x2
-	.byte	0xa2
-	.4byte	0x5b
-	.8byte	.LFB242
-	.8byte	.LFE242-.LFB242
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6ade
-	.uleb128 0x31
-	.string	"blk"
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-	.byte	0xa2
-	.4byte	0xdc9
-	.4byte	.LLST31
-	.uleb128 0x33
-	.string	"ret"
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-	.byte	0xa4
-	.4byte	0x5b
-	.4byte	.LLST32
-	.uleb128 0x33
-	.string	"i"
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-	.byte	0xa5
-	.4byte	0xdd4
-	.4byte	.LLST33
-	.uleb128 0x3d
-	.string	"Q"
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-	.byte	0xa6
-	.4byte	0x6a64
-	.uleb128 0xa
-	.byte	0x3
-	.8byte	gSysFreeQueue
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-	.uleb128 0x67
-	.4byte	0x6b83
-	.8byte	.LBB189
-	.4byte	.Ldebug_ranges0+0x30
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-	.byte	0xa8
-	.byte	0
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-	.4byte	.LASF791
-	.byte	0x2
-	.byte	0x75
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-	.8byte	.LFE241-.LFB241
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-	.byte	0x9c
-	.4byte	0x6b48
-	.uleb128 0x2b
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-	.byte	0x3
-	.8byte	g_sys_save_data+28
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-	.string	"blk"
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-	.byte	0x57
-	.uleb128 0x3d
-	.string	"Q"
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-	.byte	0x3
-	.8byte	gSysFreeQueue
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-	.byte	0
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-	.byte	0x2
-	.byte	0x61
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-	.string	"blk"
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-	.byte	0x61
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-	.uleb128 0x39
-	.string	"Q"
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-	.uleb128 0x3a
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-	.byte	0x68
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-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x68
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-	.byte	0x2
-	.byte	0x5c
-	.4byte	0xdc9
-	.byte	0x1
-	.uleb128 0x68
-	.4byte	.LASF795
-	.byte	0x2
-	.byte	0x57
-	.4byte	0xdc9
-	.byte	0x1
-	.uleb128 0x2d
-	.4byte	.LASF796
-	.byte	0x2
-	.byte	0x4b
-	.4byte	0xdc9
-	.8byte	.LFB237
-	.8byte	.LFE237-.LFB237
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-	.byte	0x9c
-	.4byte	0x6c07
-	.uleb128 0x31
-	.string	"max"
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-	.uleb128 0xa
-	.byte	0x3
-	.8byte	gSysFreeQueue
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-	.8byte	.LVL811
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-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
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-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
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-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
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-	.byte	0xa
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-	.byte	0
-	.byte	0
-	.uleb128 0x2d
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-	.byte	0x2e
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-	.8byte	.LFE236-.LFB236
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-	.byte	0x9c
-	.4byte	0x6ce4
-	.uleb128 0x2e
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-	.byte	0x2
-	.byte	0x2e
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-	.byte	0x2e
-	.4byte	0x5b
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-	.byte	0x91
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-	.uleb128 0x33
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-	.byte	0x31
-	.4byte	0xdea
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-	.uleb128 0x33
-	.string	"mid"
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-	.byte	0x31
-	.4byte	0xdea
-	.4byte	.LLST158
-	.uleb128 0x2b
-	.4byte	.LASF799
-	.byte	0x2
-	.byte	0x32
-	.4byte	0x26fc
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -64
-	.uleb128 0x32
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-	.byte	0x2
-	.byte	0x33
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-	.4byte	.LLST159
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-	.8byte	.LVL603
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-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x8f
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-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x1
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-	.byte	0x8f
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-	.byte	0
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-	.byte	0x9c
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-	.byte	0x1e
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-	.string	"ret"
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-	.uleb128 0x2e
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-	.4byte	.LLST25
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-	.byte	0xc
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-	.8byte	.LFE233-.LFB233
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-	.string	"blk"
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-	.uleb128 0x2
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-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x2
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-	.uleb128 0x1
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-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x40
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1574
-	.4byte	0x258a
-	.4byte	0x6f9a
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x1000
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1576
-	.4byte	0x2512
-	.uleb128 0x34
-	.8byte	.LVL1577
-	.4byte	0x270c
-	.4byte	0x6fc9
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x89
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1578
-	.4byte	0x27d2
-	.4byte	0x6ff0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x89
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
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-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1579
-	.4byte	0x75b1
-	.4byte	0x7008
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8b
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1585
-	.4byte	0x75b1
-	.uleb128 0x34
-	.8byte	.LVL1589
-	.4byte	0x270c
-	.4byte	0x7031
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x32
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1590
-	.4byte	0x75b1
-	.uleb128 0x45
-	.8byte	.LVL1591
-	.4byte	0x75b1
-	.uleb128 0x45
-	.8byte	.LVL1592
-	.4byte	0x7304
-	.uleb128 0x45
-	.8byte	.LVL1594
-	.4byte	0x7304
-	.byte	0
-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0x11c8
-	.uleb128 0x49
-	.4byte	.LASF810
-	.byte	0x4
-	.2byte	0x116
-	.4byte	0x5b
-	.8byte	.LFB230
-	.8byte	.LFE230-.LFB230
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x70e9
-	.uleb128 0x54
-	.string	"die"
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-	.2byte	0x118
-	.4byte	0xdd4
-	.4byte	.LLST151
-	.uleb128 0x54
-	.string	"blk"
-	.byte	0x4
-	.2byte	0x119
-	.4byte	0xdc9
-	.4byte	.LLST152
-	.uleb128 0x4c
-	.4byte	.LASF811
-	.byte	0x4
-	.2byte	0x11a
-	.4byte	0xdd4
-	.uleb128 0x55
-	.4byte	.LASF808
-	.byte	0x4
-	.2byte	0x11b
-	.4byte	0x7066
-	.4byte	.LLST153
-	.uleb128 0x36
-	.8byte	.LVL593
-	.4byte	0x298f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x2d
-	.4byte	.LASF812
-	.byte	0x4
-	.byte	0xac
-	.4byte	0x5b
-	.8byte	.LFB229
-	.8byte	.LFE229-.LFB229
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7257
-	.uleb128 0x33
-	.string	"i"
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-	.byte	0xae
-	.4byte	0xdd4
-	.4byte	.LLST358
-	.uleb128 0x33
-	.string	"blk"
-	.byte	0x4
-	.byte	0xaf
-	.4byte	0xdc9
-	.4byte	.LLST359
-	.uleb128 0x32
-	.4byte	.LASF705
-	.byte	0x4
-	.byte	0xb0
-	.4byte	0xdea
-	.4byte	.LLST360
-	.uleb128 0x32
-	.4byte	.LASF808
-	.byte	0x4
-	.byte	0xb1
-	.4byte	0x7066
-	.4byte	.LLST361
-	.uleb128 0x3f
-	.4byte	.LASF573
-	.4byte	0x7267
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.6366
-	.uleb128 0x45
-	.8byte	.LVL1525
-	.4byte	0x72c0
-	.uleb128 0x34
-	.8byte	.LVL1527
-	.4byte	0x298f
-	.4byte	0x7186
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1528
-	.4byte	0x298f
-	.4byte	0x71a8
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1530
-	.4byte	0x298f
-	.4byte	0x71d1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR106
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1531
-	.4byte	0x6c07
-	.4byte	0x71e8
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1533
-	.4byte	0xa94f
-	.4byte	0x721a
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR164
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xfe
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1534
-	.4byte	0x8a94
-	.uleb128 0x34
-	.8byte	.LVL1542
-	.4byte	0x298f
-	.4byte	0x7249
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
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-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
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-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1547
-	.4byte	0x2512
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xee
-	.4byte	0x7267
-	.uleb128 0xe
-	.4byte	0xda
-	.byte	0xa
-	.byte	0
-	.uleb128 0x7
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-	.uleb128 0x2d
-	.4byte	.LASF813
-	.byte	0x4
-	.byte	0x9c
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-	.8byte	.LFB228
-	.8byte	.LFE228-.LFB228
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x72c0
-	.uleb128 0x33
-	.string	"blk"
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-	.byte	0x9e
-	.4byte	0xdc9
-	.4byte	.LLST20
-	.uleb128 0x32
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-	.byte	0x4
-	.byte	0x9f
-	.4byte	0xdc9
-	.4byte	.LLST21
-	.uleb128 0x36
-	.8byte	.LVL53
-	.4byte	0x7522
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x43
-	.4byte	.LASF815
-	.byte	0x4
-	.byte	0x94
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-	.8byte	.LFE227-.LFB227
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-	.byte	0x9c
-	.4byte	0x7304
-	.uleb128 0x2f
-	.8byte	.LVL808
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-	.uleb128 0x30
-	.uleb128 0x1
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-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR37+12
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-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
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-	.byte	0xff
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x40
-	.byte	0
-	.byte	0
-	.uleb128 0x2d
-	.4byte	.LASF816
-	.byte	0x4
-	.byte	0x4f
-	.4byte	0x5b
-	.8byte	.LFB226
-	.8byte	.LFE226-.LFB226
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-	.byte	0x9c
-	.4byte	0x747e
-	.uleb128 0x33
-	.string	"i"
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-	.4byte	0x5b
-	.4byte	.LLST307
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-	.byte	0x4
-	.byte	0x52
-	.4byte	0x5b
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-	.uleb128 0x32
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-	.byte	0x53
-	.4byte	0x7066
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-	.byte	0x54
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-	.byte	0x4
-	.byte	0x67
-	.uleb128 0x69
-	.4byte	.LASF573
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-	.uleb128 0x34
-	.8byte	.LVL1247
-	.4byte	0x258a
-	.4byte	0x7387
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
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-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8b
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-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
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-	.byte	0xff
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x40
-	.byte	0
-	.uleb128 0x34
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-	.4byte	0xa94f
-	.4byte	0x73c2
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-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
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-	.uleb128 0x34
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-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
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-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
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-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
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-	.uleb128 0x1
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-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1254
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-	.uleb128 0x30
-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x30
-	.uleb128 0x1
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-	.uleb128 0x1
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-	.byte	0
-	.uleb128 0x34
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-	.uleb128 0x30
-	.uleb128 0x1
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-	.uleb128 0x2
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-	.uleb128 0x30
-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x30
-	.uleb128 0x1
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-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x34
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-	.uleb128 0x1
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-	.uleb128 0x9
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-	.8byte	.LC98
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-	.uleb128 0x34
-	.8byte	.LVL1258
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-	.4byte	0x7470
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC99
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
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-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1261
-	.4byte	0x2512
-	.byte	0
-	.uleb128 0x43
-	.4byte	.LASF819
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-	.byte	0x41
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-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x751a
-	.uleb128 0x2e
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-	.byte	0x41
-	.4byte	0x10f8
-	.4byte	.LLST202
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-	.byte	0x41
-	.4byte	0x1001
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-	.string	"i"
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-	.4byte	0xdd4
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-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.6323
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-	.8byte	.LVL804
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-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
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-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
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-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
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-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
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-	.byte	0
-	.uleb128 0x6a
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-	.byte	0x1
-	.uleb128 0x2d
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-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x75b1
-	.uleb128 0x2e
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-	.4byte	0xdc9
-	.4byte	.LLST16
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-	.string	"i"
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-	.4byte	0xdd4
-	.4byte	.LLST18
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-	.byte	0x1b
-	.4byte	0x1001
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-	.uleb128 0x1
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-	.8byte	.LFE222-.LFB222
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7635
-	.uleb128 0x2e
-	.4byte	.LASF388
-	.byte	0x4
-	.byte	0x4
-	.4byte	0xdc9
-	.4byte	.LLST12
-	.uleb128 0x33
-	.string	"die"
-	.byte	0x4
-	.byte	0x6
-	.4byte	0xdd4
-	.4byte	.LLST13
-	.uleb128 0x32
-	.4byte	.LASF820
-	.byte	0x4
-	.byte	0x7
-	.4byte	0x1001
-	.4byte	.LLST14
-	.uleb128 0x32
-	.4byte	.LASF581
-	.byte	0x4
-	.byte	0x8
-	.4byte	0xdc9
-	.4byte	.LLST15
-	.uleb128 0x36
-	.8byte	.LVL44
-	.4byte	0xa94f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x7
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0
-	.byte	0
-	.uleb128 0x6b
-	.4byte	.LASF885
-	.byte	0x3
-	.2byte	0x499
-	.4byte	0xdd4
-	.8byte	.LFB221
-	.8byte	.LFE221-.LFB221
-	.uleb128 0x1
-	.byte	0x9c
-	.uleb128 0x49
-	.4byte	.LASF824
-	.byte	0x3
-	.2byte	0x494
-	.4byte	0x5b
-	.8byte	.LFB220
-	.8byte	.LFE220-.LFB220
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x76ce
-	.uleb128 0x53
-	.4byte	.LASF236
-	.byte	0x3
-	.2byte	0x494
-	.4byte	0xb9
-	.4byte	.LLST459
-	.uleb128 0x53
-	.4byte	.LASF325
-	.byte	0x3
-	.2byte	0x494
-	.4byte	0xb9
-	.4byte	.LLST460
-	.uleb128 0x5d
-	.string	"buf"
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-	.2byte	0x494
-	.4byte	0x76ce
-	.4byte	.LLST461
-	.uleb128 0x2f
-	.8byte	.LVL2054
-	.4byte	0x786c
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0
-	.byte	0
-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0x94
-	.uleb128 0x49
-	.4byte	.LASF825
-	.byte	0x3
-	.2byte	0x48f
-	.4byte	0x5b
-	.8byte	.LFB219
-	.8byte	.LFE219-.LFB219
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x774f
-	.uleb128 0x53
-	.4byte	.LASF236
-	.byte	0x3
-	.2byte	0x48f
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-	.4byte	.LLST441
-	.uleb128 0x53
-	.4byte	.LASF325
-	.byte	0x3
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-	.4byte	0xb9
-	.4byte	.LLST442
-	.uleb128 0x5d
-	.string	"buf"
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-	.4byte	0x76ce
-	.4byte	.LLST443
-	.uleb128 0x2f
-	.8byte	.LVL1980
-	.4byte	0x7ef8
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x30
-	.uleb128 0x1
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-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
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-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF826
-	.byte	0x3
-	.2byte	0x460
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-	.8byte	.LFB218
-	.8byte	.LFE218-.LFB218
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x786c
-	.uleb128 0x53
-	.4byte	.LASF731
-	.byte	0x3
-	.2byte	0x460
-	.4byte	0xdd4
-	.4byte	.LLST387
-	.uleb128 0x53
-	.4byte	.LASF732
-	.byte	0x3
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-	.4byte	.LLST388
-	.uleb128 0x55
-	.4byte	.LASF734
-	.byte	0x3
-	.2byte	0x462
-	.4byte	0xdc9
-	.4byte	.LLST389
-	.uleb128 0x54
-	.string	"tmp"
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-	.4byte	0xdc9
-	.4byte	.LLST390
-	.uleb128 0x54
-	.string	"lpa"
-	.byte	0x3
-	.2byte	0x464
-	.4byte	0xdd4
-	.4byte	.LLST391
-	.uleb128 0x2a
-	.4byte	.LASF663
-	.byte	0x3
-	.2byte	0x465
-	.4byte	0xdd4
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -8
-	.uleb128 0x2a
-	.4byte	.LASF640
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-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -4
-	.uleb128 0x55
-	.4byte	.LASF629
-	.byte	0x3
-	.2byte	0x466
-	.4byte	0xdc9
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-	.8byte	.LVL1702
-	.4byte	0x5d49
-	.uleb128 0x45
-	.8byte	.LVL1703
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-	.uleb128 0x34
-	.8byte	.LVL1704
-	.4byte	0x5c1c
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-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x8f
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-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
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-	.uleb128 0x34
-	.8byte	.LVL1705
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-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
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-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
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-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
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-	.8byte	.LVL1706
-	.4byte	0x6d33
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-	.8byte	.LFE217-.LFB217
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-	.byte	0x9c
-	.4byte	0x7ca2
-	.uleb128 0x5d
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-	.2byte	0x3bd
-	.4byte	0xdd4
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-	.4byte	.LASF733
-	.byte	0x3
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-	.4byte	0x5ad8
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-	.uleb128 0x55
-	.4byte	.LASF598
-	.byte	0x3
-	.2byte	0x3bf
-	.4byte	0x2dea
-	.4byte	.LLST448
-	.uleb128 0x54
-	.string	"lpa"
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-	.4byte	.LASF828
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-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x54
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-	.4byte	.LASF830
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-	.2byte	0x3c2
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-	.4byte	.LASF595
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-	.4byte	.LASF832
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-	.4byte	0xdd4
-	.4byte	.LLST457
-	.uleb128 0x55
-	.4byte	.LASF639
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-	.2byte	0x3c4
-	.4byte	0x1eef
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-	.uleb128 0x3f
-	.4byte	.LASF573
-	.4byte	0x5d44
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.6259
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-	.4byte	.Ldebug_ranges0+0x390
-	.4byte	0x7a2e
-	.uleb128 0x2a
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-	.byte	0x3
-	.2byte	0x425
-	.4byte	0xdf5
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -32
-	.uleb128 0x34
-	.8byte	.LVL2034
-	.4byte	0x298f
-	.4byte	0x79d9
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x8f
-	.sleb128 384
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2036
-	.4byte	0xa94f
-	.4byte	0x79fe
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC108
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL2037
-	.4byte	0xa94f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR178
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
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-	.byte	0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1985
-	.4byte	0x5ade
-	.4byte	0x7a56
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x85
-	.sleb128 256
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x8f
-	.sleb128 352
-	.byte	0x94
-	.byte	0x4
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8a
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
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-	.4byte	0x2d1d
-	.4byte	0x7a76
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x8f
-	.sleb128 328
-	.byte	0x94
-	.byte	0x4
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1999
-	.4byte	0xa94f
-	.4byte	0x7aa9
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR178
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x3dc
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2000
-	.4byte	0x3903
-	.4byte	0x7ac8
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR52
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2002
-	.4byte	0x3903
-	.4byte	0x7ae0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2004
-	.4byte	0x3903
-	.4byte	0x7af8
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2007
-	.4byte	0xa94f
-	.4byte	0x7b2b
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR178
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x3fd
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2010
-	.4byte	0x7caf
-	.4byte	0x7b4e
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x87
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2011
-	.4byte	0xa94f
-	.4byte	0x7b81
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR178
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x44a
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2014
-	.4byte	0x3903
-	.4byte	0x7b99
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2017
-	.4byte	0x5c1c
-	.4byte	0x7bbd
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x8f
-	.sleb128 380
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
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-	.uleb128 0x34
-	.8byte	.LVL2018
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-	.4byte	0x7bd5
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
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-	.uleb128 0x34
-	.8byte	.LVL2022
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-	.4byte	0x7bf2
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x87
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-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
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-	.uleb128 0x34
-	.8byte	.LVL2027
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-	.uleb128 0x30
-	.uleb128 0x1
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-	.uleb128 0x9
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-	.uleb128 0x1
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-	.uleb128 0x9
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-	.uleb128 0x1
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-	.uleb128 0x3
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-	.uleb128 0x45
-	.8byte	.LVL2035
-	.4byte	0x2512
-	.uleb128 0x34
-	.8byte	.LVL2039
-	.4byte	0x258a
-	.4byte	0x7c49
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2045
-	.4byte	0x662a
-	.4byte	0x7c60
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL2046
-	.4byte	0x2f5e
-	.uleb128 0x34
-	.8byte	.LVL2047
-	.4byte	0x2d1d
-	.4byte	0x7c89
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL2048
-	.4byte	0x2d1d
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x52
-	.4byte	.LASF833
-	.byte	0x3
-	.2byte	0x3b7
-	.4byte	0x5b
-	.byte	0x1
-	.uleb128 0x5f
-	.4byte	.LASF834
-	.byte	0x3
-	.2byte	0x387
-	.8byte	.LFB215
-	.8byte	.LFE215-.LFB215
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7ee3
-	.uleb128 0x5d
-	.string	"req"
-	.byte	0x3
-	.2byte	0x387
-	.4byte	0x1abc
-	.4byte	.LLST398
-	.uleb128 0x53
-	.4byte	.LASF595
-	.byte	0x3
-	.2byte	0x387
-	.4byte	0xdd4
-	.4byte	.LLST399
-	.uleb128 0x53
-	.4byte	.LASF835
-	.byte	0x3
-	.2byte	0x387
-	.4byte	0xdd4
-	.4byte	.LLST400
-	.uleb128 0x53
-	.4byte	.LASF639
-	.byte	0x3
-	.2byte	0x387
-	.4byte	0x1eef
-	.4byte	.LLST401
-	.uleb128 0x4d
-	.string	"i"
-	.byte	0x3
-	.2byte	0x389
-	.4byte	0xdd4
-	.uleb128 0x60
-	.string	"ppa"
-	.byte	0x3
-	.2byte	0x38a
-	.4byte	0xdd4
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -4
-	.uleb128 0x55
-	.4byte	.LASF663
-	.byte	0x3
-	.2byte	0x38a
-	.4byte	0xdd4
-	.4byte	.LLST402
-	.uleb128 0x55
-	.4byte	.LASF623
-	.byte	0x3
-	.2byte	0x38b
-	.4byte	0xdc9
-	.4byte	.LLST403
-	.uleb128 0x55
-	.4byte	.LASF598
-	.byte	0x3
-	.2byte	0x38c
-	.4byte	0x2dea
-	.4byte	.LLST404
-	.uleb128 0x61
-	.4byte	.LASF687
-	.byte	0x3
-	.2byte	0x38d
-	.4byte	0xdd4
-	.byte	0
-	.uleb128 0x3f
-	.4byte	.LASF573
-	.4byte	0x7ef3
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.6231
-	.uleb128 0x34
-	.8byte	.LVL1746
-	.4byte	0x27d2
-	.4byte	0x7d9a
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 -4
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1747
-	.4byte	0x6d33
-	.uleb128 0x34
-	.8byte	.LVL1749
-	.4byte	0x3903
-	.4byte	0x7dbf
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1750
-	.4byte	0x2ebc
-	.uleb128 0x34
-	.8byte	.LVL1751
-	.4byte	0x37d5
-	.4byte	0x7de4
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1752
-	.4byte	0x27d2
-	.4byte	0x7e06
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x86
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1753
-	.4byte	0xa94f
-	.4byte	0x7e39
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR170
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x3a5
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1754
-	.4byte	0x5c1c
-	.4byte	0x7e57
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x8f
-	.sleb128 156
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1756
-	.4byte	0x6d33
-	.4byte	0x7e71
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x4
-	.byte	0x73
-	.sleb128 0
-	.byte	0x3a
-	.byte	0x25
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1758
-	.4byte	0xa94f
-	.4byte	0x7e9b
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC106
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x86
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1759
-	.4byte	0x3691
-	.4byte	0x7eb3
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x86
-	.sleb128 0
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL1761
-	.4byte	0xa94f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR170
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x3b4
-	.byte	0
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xee
-	.4byte	0x7ef3
-	.uleb128 0xe
-	.4byte	0xda
-	.byte	0xc
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x7ee3
-	.uleb128 0x49
-	.4byte	.LASF836
-	.byte	0x3
-	.2byte	0x32d
-	.4byte	0x5b
-	.8byte	.LFB214
-	.8byte	.LFE214-.LFB214
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8111
-	.uleb128 0x5d
-	.string	"LUN"
-	.byte	0x3
-	.2byte	0x32d
-	.4byte	0xdbe
-	.4byte	.LLST424
-	.uleb128 0x53
-	.4byte	.LASF731
-	.byte	0x3
-	.2byte	0x32d
-	.4byte	0xdd4
-	.4byte	.LLST425
-	.uleb128 0x53
-	.4byte	.LASF732
-	.byte	0x3
-	.2byte	0x32d
-	.4byte	0xdd4
-	.4byte	.LLST426
-	.uleb128 0x53
-	.4byte	.LASF733
-	.byte	0x3
-	.2byte	0x32d
-	.4byte	0x5ad8
-	.4byte	.LLST427
-	.uleb128 0x54
-	.string	"ret"
-	.byte	0x3
-	.2byte	0x32f
-	.4byte	0x5b
-	.4byte	.LLST428
-	.uleb128 0x55
-	.4byte	.LASF828
-	.byte	0x3
-	.2byte	0x330
-	.4byte	0xdd4
-	.4byte	.LLST429
-	.uleb128 0x55
-	.4byte	.LASF829
-	.byte	0x3
-	.2byte	0x330
-	.4byte	0xdd4
-	.4byte	.LLST430
-	.uleb128 0x55
-	.4byte	.LASF837
-	.byte	0x3
-	.2byte	0x330
-	.4byte	0xdd4
-	.4byte	.LLST431
-	.uleb128 0x54
-	.string	"lpa"
-	.byte	0x3
-	.2byte	0x331
-	.4byte	0xdd4
-	.4byte	.LLST432
-	.uleb128 0x60
-	.string	"ppa"
-	.byte	0x3
-	.2byte	0x331
-	.4byte	0xdd4
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -4
-	.uleb128 0x54
-	.string	"n"
-	.byte	0x3
-	.2byte	0x333
-	.4byte	0xdd4
-	.4byte	.LLST433
-	.uleb128 0x55
-	.4byte	.LASF595
-	.byte	0x3
-	.2byte	0x333
-	.4byte	0xdd4
-	.4byte	.LLST434
-	.uleb128 0x55
-	.4byte	.LASF830
-	.byte	0x3
-	.2byte	0x333
-	.4byte	0xdd4
-	.4byte	.LLST435
-	.uleb128 0x55
-	.4byte	.LASF838
-	.byte	0x3
-	.2byte	0x334
-	.4byte	0xdd4
-	.4byte	.LLST436
-	.uleb128 0x55
-	.4byte	.LASF839
-	.byte	0x3
-	.2byte	0x334
-	.4byte	0xdd4
-	.4byte	.LLST437
-	.uleb128 0x55
-	.4byte	.LASF840
-	.byte	0x3
-	.2byte	0x335
-	.4byte	0xdd4
-	.4byte	.LLST438
-	.uleb128 0x55
-	.4byte	.LASF841
-	.byte	0x3
-	.2byte	0x336
-	.4byte	0xdd4
-	.4byte	.LLST439
-	.uleb128 0x63
-	.8byte	.LBB332
-	.8byte	.LBE332-.LBB332
-	.4byte	0x8067
-	.uleb128 0x55
-	.4byte	.LASF586
-	.byte	0x3
-	.2byte	0x37a
-	.4byte	0xdc9
-	.4byte	.LLST440
-	.uleb128 0x45
-	.8byte	.LVL1973
-	.4byte	0x6d33
-	.uleb128 0x45
-	.8byte	.LVL1974
-	.4byte	0x2f5e
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1931
-	.4byte	0x59b6
-	.4byte	0x808c
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x83
-	.sleb128 256
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8b
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x87
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1944
-	.4byte	0x2d1d
-	.4byte	0x80a8
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1945
-	.4byte	0x5c1c
-	.4byte	0x80cc
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x8f
-	.sleb128 316
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1950
-	.4byte	0x298f
-	.4byte	0x80e9
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x89
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1953
-	.4byte	0x2512
-	.uleb128 0x36
-	.8byte	.LVL1960
-	.4byte	0x258a
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x200
-	.byte	0
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF842
-	.byte	0x3
-	.2byte	0x325
-	.4byte	0x5b
-	.8byte	.LFB213
-	.8byte	.LFE213-.LFB213
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8141
-	.uleb128 0x45
-	.8byte	.LVL1688
-	.4byte	0x8141
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF843
-	.byte	0x3
-	.2byte	0x31c
-	.4byte	0x5b
-	.8byte	.LFB212
-	.8byte	.LFE212-.LFB212
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8195
-	.uleb128 0x45
-	.8byte	.LVL1685
-	.4byte	0x5d49
-	.uleb128 0x34
-	.8byte	.LVL1686
-	.4byte	0x594e
-	.4byte	0x8187
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1687
-	.4byte	0x567a
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF844
-	.byte	0x3
-	.2byte	0x2e6
-	.4byte	0x5b
-	.8byte	.LFB211
-	.8byte	.LFE211-.LFB211
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x82a7
-	.uleb128 0x2a
-	.4byte	.LASF845
-	.byte	0x3
-	.2byte	0x2e8
-	.4byte	0x82a7
-	.uleb128 0xa
-	.byte	0x3
-	.8byte	g_nand_phy_info
-	.byte	0x9f
-	.uleb128 0x59
-	.4byte	.LASF846
-	.byte	0x3
-	.2byte	0x2f3
-	.8byte	.LDL2
-	.uleb128 0x63
-	.8byte	.LBB341
-	.8byte	.LBE341-.LBB341
-	.4byte	0x821a
-	.uleb128 0x54
-	.string	"i"
-	.byte	0x3
-	.2byte	0x310
-	.4byte	0xdd4
-	.4byte	.LLST468
-	.uleb128 0x36
-	.8byte	.LVL2152
-	.4byte	0x2d1d
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2144
-	.4byte	0xa94f
-	.4byte	0x8246
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC71
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC70
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2145
-	.4byte	0x8a24
-	.4byte	0x8265
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL2146
-	.4byte	0x8730
-	.uleb128 0x45
-	.8byte	.LVL2147
-	.4byte	0x8659
-	.uleb128 0x45
-	.8byte	.LVL2148
-	.4byte	0x6b9b
-	.uleb128 0x45
-	.8byte	.LVL2149
-	.4byte	0x70e9
-	.uleb128 0x45
-	.8byte	.LVL2150
-	.4byte	0x3f79
-	.byte	0
-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0xee1
-	.uleb128 0x49
-	.4byte	.LASF847
-	.byte	0x3
-	.2byte	0x26e
-	.4byte	0x5b
-	.8byte	.LFB210
-	.8byte	.LFE210-.LFB210
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8447
-	.uleb128 0x55
-	.4byte	.LASF717
-	.byte	0x3
-	.2byte	0x270
-	.4byte	0xdc9
-	.4byte	.LLST464
-	.uleb128 0x55
-	.4byte	.LASF848
-	.byte	0x3
-	.2byte	0x270
-	.4byte	0xdc9
-	.4byte	.LLST465
-	.uleb128 0x55
-	.4byte	.LASF849
-	.byte	0x3
-	.2byte	0x271
-	.4byte	0xdc9
-	.4byte	.LLST466
-	.uleb128 0x54
-	.string	"i"
-	.byte	0x3
-	.2byte	0x272
-	.4byte	0xdc9
-	.4byte	.LLST467
-	.uleb128 0x59
-	.4byte	.LASF850
-	.byte	0x3
-	.2byte	0x2bc
-	.8byte	.L1620
-	.uleb128 0x59
-	.4byte	.LASF851
-	.byte	0x3
-	.2byte	0x2cc
-	.8byte	.L1622
-	.uleb128 0x45
-	.8byte	.LVL2103
-	.4byte	0x6b9b
-	.uleb128 0x45
-	.8byte	.LVL2104
-	.4byte	0x70e9
-	.uleb128 0x45
-	.8byte	.LVL2105
-	.4byte	0x6e1b
-	.uleb128 0x45
-	.8byte	.LVL2113
-	.4byte	0x7304
-	.uleb128 0x34
-	.8byte	.LVL2114
-	.4byte	0x258a
-	.4byte	0x8378
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2116
-	.4byte	0x258a
-	.4byte	0x8390
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2117
-	.4byte	0x45ef
-	.4byte	0x83a8
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2123
-	.4byte	0x8447
-	.4byte	0x83bf
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL2128
-	.4byte	0x8a94
-	.uleb128 0x45
-	.8byte	.LVL2129
-	.4byte	0x6b9b
-	.uleb128 0x34
-	.8byte	.LVL2132
-	.4byte	0x8447
-	.4byte	0x83f0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2135
-	.4byte	0x8447
-	.4byte	0x8407
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2139
-	.4byte	0x45ef
-	.4byte	0x841f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL2140
-	.4byte	0x6976
-	.uleb128 0x45
-	.8byte	.LVL2141
-	.4byte	0x567a
-	.uleb128 0x45
-	.8byte	.LVL2142
-	.4byte	0x3f79
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF852
-	.byte	0x3
-	.2byte	0x20f
-	.4byte	0x5b
-	.8byte	.LFB209
-	.8byte	.LFE209-.LFB209
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x862f
-	.uleb128 0x53
-	.4byte	.LASF717
-	.byte	0x3
-	.2byte	0x20f
-	.4byte	0xdc9
-	.4byte	.LLST181
-	.uleb128 0x53
-	.4byte	.LASF853
-	.byte	0x3
-	.2byte	0x20f
-	.4byte	0xdbe
-	.4byte	.LLST182
-	.uleb128 0x55
-	.4byte	.LASF848
-	.byte	0x3
-	.2byte	0x211
-	.4byte	0xdc9
-	.4byte	.LLST183
-	.uleb128 0x55
-	.4byte	.LASF568
-	.byte	0x3
-	.2byte	0x211
-	.4byte	0xdc9
-	.4byte	.LLST184
-	.uleb128 0x55
-	.4byte	.LASF594
-	.byte	0x3
-	.2byte	0x212
-	.4byte	0xdc9
-	.4byte	.LLST185
-	.uleb128 0x55
-	.4byte	.LASF388
-	.byte	0x3
-	.2byte	0x212
-	.4byte	0xdc9
-	.4byte	.LLST186
-	.uleb128 0x55
-	.4byte	.LASF854
-	.byte	0x3
-	.2byte	0x213
-	.4byte	0xdc9
-	.4byte	.LLST187
-	.uleb128 0x55
-	.4byte	.LASF855
-	.byte	0x3
-	.2byte	0x214
-	.4byte	0xdc9
-	.4byte	.LLST188
-	.uleb128 0x55
-	.4byte	.LASF856
-	.byte	0x3
-	.2byte	0x215
-	.4byte	0xdc9
-	.4byte	.LLST189
-	.uleb128 0x55
-	.4byte	.LASF857
-	.byte	0x3
-	.2byte	0x216
-	.4byte	0xdc9
-	.4byte	.LLST190
-	.uleb128 0x59
-	.4byte	.LASF858
-	.byte	0x3
-	.2byte	0x240
-	.8byte	.L430
-	.uleb128 0x34
-	.8byte	.LVL671
-	.4byte	0x270c
-	.4byte	0x8530
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL674
-	.4byte	0x75b1
-	.uleb128 0x34
-	.8byte	.LVL680
-	.4byte	0x27d2
-	.4byte	0x8560
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x89
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL684
-	.4byte	0x75b1
-	.uleb128 0x34
-	.8byte	.LVL688
-	.4byte	0x6b48
-	.4byte	0x8584
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL689
-	.4byte	0x270c
-	.4byte	0x85a2
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x89
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL693
-	.4byte	0x6dce
-	.4byte	0x85ba
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL695
-	.4byte	0x862f
-	.4byte	0x85d2
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL696
-	.4byte	0x7522
-	.4byte	0x85ea
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7e
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL707
-	.4byte	0x6dce
-	.4byte	0x8602
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL709
-	.4byte	0x862f
-	.4byte	0x861a
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7c
-	.sleb128 0
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL710
-	.4byte	0x7522
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x4a
-	.4byte	.LASF859
-	.byte	0x3
-	.2byte	0x201
-	.4byte	0x5b
-	.byte	0x1
-	.4byte	0x8659
-	.uleb128 0x4b
-	.4byte	.LASF388
-	.byte	0x3
-	.2byte	0x201
-	.4byte	0xdc9
-	.uleb128 0x4c
-	.4byte	.LASF860
-	.byte	0x3
-	.2byte	0x203
-	.4byte	0xdc9
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF861
-	.byte	0x3
-	.2byte	0x1ed
-	.4byte	0x5b
-	.8byte	.LFB207
-	.8byte	.LFE207-.LFB207
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8730
-	.uleb128 0x34
-	.8byte	.LVL1112
-	.4byte	0x258a
-	.4byte	0x8692
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1113
-	.4byte	0x258a
-	.4byte	0x86a9
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1114
-	.4byte	0x258a
-	.4byte	0x86c0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1115
-	.4byte	0x258a
-	.4byte	0x86ea
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR39
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1116
-	.4byte	0x258a
-	.4byte	0x8715
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR81
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x200
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1117
-	.4byte	0x3666
-	.uleb128 0x45
-	.8byte	.LVL1118
-	.4byte	0x4f6c
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF862
-	.byte	0x3
-	.2byte	0x117
-	.4byte	0x5b
-	.8byte	.LFB206
-	.8byte	.LFE206-.LFB206
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8a24
-	.uleb128 0x54
-	.string	"i"
-	.byte	0x3
-	.2byte	0x119
-	.4byte	0xdd4
-	.4byte	.LLST200
-	.uleb128 0x55
-	.4byte	.LASF863
-	.byte	0x3
-	.2byte	0x11a
-	.4byte	0xdd4
-	.4byte	.LLST201
-	.uleb128 0x3f
-	.4byte	.LASF573
-	.4byte	0x7267
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.6107
-	.uleb128 0x45
-	.8byte	.LVL743
-	.4byte	0x2c16
-	.uleb128 0x45
-	.8byte	.LVL744
-	.4byte	0x2c16
-	.uleb128 0x34
-	.8byte	.LVL746
-	.4byte	0x2c16
-	.4byte	0x87b5
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL747
-	.4byte	0x2c16
-	.4byte	0x87cd
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL748
-	.4byte	0x2c16
-	.4byte	0x87e5
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL749
-	.4byte	0x2c16
-	.4byte	0x87fd
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL750
-	.4byte	0x2c16
-	.4byte	0x8815
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL753
-	.4byte	0x2c16
-	.4byte	0x882d
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL754
-	.4byte	0x2c16
-	.4byte	0x8845
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL755
-	.4byte	0x2c16
-	.4byte	0x885d
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL756
-	.4byte	0x2c16
-	.uleb128 0x34
-	.8byte	.LVL757
-	.4byte	0x2c16
-	.4byte	0x8882
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL758
-	.4byte	0x2c16
-	.4byte	0x889a
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL760
-	.4byte	0x2c16
-	.uleb128 0x34
-	.8byte	.LVL762
-	.4byte	0x2c16
-	.4byte	0x88bf
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8c
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL763
-	.4byte	0x2c16
-	.4byte	0x88d9
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x4
-	.byte	0x8c
-	.sleb128 0
-	.byte	0x32
-	.byte	0x24
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL765
-	.4byte	0x2c16
-	.uleb128 0x45
-	.8byte	.LVL766
-	.4byte	0x2c16
-	.uleb128 0x45
-	.8byte	.LVL767
-	.4byte	0x2c16
-	.uleb128 0x34
-	.8byte	.LVL769
-	.4byte	0x2c16
-	.4byte	0x8918
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8c
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL771
-	.4byte	0x2c16
-	.uleb128 0x34
-	.8byte	.LVL773
-	.4byte	0x2c16
-	.4byte	0x893d
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL774
-	.4byte	0x2c16
-	.4byte	0x8955
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL775
-	.4byte	0x2c16
-	.uleb128 0x45
-	.8byte	.LVL776
-	.4byte	0x2c16
-	.uleb128 0x45
-	.8byte	.LVL777
-	.4byte	0x2c16
-	.uleb128 0x45
-	.8byte	.LVL778
-	.4byte	0x2c16
-	.uleb128 0x45
-	.8byte	.LVL779
-	.4byte	0x2c16
-	.uleb128 0x34
-	.8byte	.LVL780
-	.4byte	0x258a
-	.4byte	0x89ad
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL782
-	.4byte	0x2c16
-	.uleb128 0x45
-	.8byte	.LVL784
-	.4byte	0x2c16
-	.uleb128 0x45
-	.8byte	.LVL787
-	.4byte	0x2c16
-	.uleb128 0x45
-	.8byte	.LVL790
-	.4byte	0x2c16
-	.uleb128 0x45
-	.8byte	.LVL793
-	.4byte	0x2c16
-	.uleb128 0x45
-	.8byte	.LVL797
-	.4byte	0x2c16
-	.uleb128 0x36
-	.8byte	.LVL800
-	.4byte	0xa94f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC85
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR138
-	.byte	0
-	.byte	0
-	.uleb128 0x2d
-	.4byte	.LASF864
-	.byte	0x3
-	.byte	0xb7
-	.4byte	0x5b
-	.8byte	.LFB205
-	.8byte	.LFE205-.LFB205
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8a94
-	.uleb128 0x2e
-	.4byte	.LASF845
-	.byte	0x3
-	.byte	0xb7
-	.4byte	0x82a7
-	.4byte	.LLST8
-	.uleb128 0x33
-	.string	"i"
-	.byte	0x3
-	.byte	0xb9
-	.4byte	0xdd4
-	.4byte	.LLST9
-	.uleb128 0x45
-	.8byte	.LVL30
-	.4byte	0x8add
-	.uleb128 0x34
-	.8byte	.LVL31
-	.4byte	0x8add
-	.4byte	0x8a86
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL33
-	.4byte	0x8a94
-	.byte	0
-	.uleb128 0x2d
-	.4byte	.LASF865
-	.byte	0x3
-	.byte	0xa5
-	.4byte	0x5b
-	.8byte	.LFB204
-	.8byte	.LFE204-.LFB204
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8ac5
-	.uleb128 0x2e
-	.4byte	.LASF866
-	.byte	0x3
-	.byte	0xa5
-	.4byte	0xdc9
-	.4byte	.LLST7
-	.byte	0
-	.uleb128 0x65
-	.4byte	.LASF867
-	.byte	0x3
-	.byte	0x9f
-	.byte	0x1
-	.4byte	0x8add
-	.uleb128 0x38
-	.4byte	.LASF868
-	.byte	0x3
-	.byte	0x9f
-	.4byte	0xdd4
-	.byte	0
-	.uleb128 0x2d
-	.4byte	.LASF869
-	.byte	0x3
-	.byte	0x7f
-	.4byte	0xdc9
-	.8byte	.LFB202
-	.8byte	.LFE202-.LFB202
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8b2a
-	.uleb128 0x31
-	.string	"num"
-	.byte	0x3
-	.byte	0x7f
-	.4byte	0xdd4
-	.4byte	.LLST4
-	.uleb128 0x33
-	.string	"i"
-	.byte	0x3
-	.byte	0x81
-	.4byte	0xdc9
-	.4byte	.LLST5
-	.uleb128 0x32
-	.4byte	.LASF870
-	.byte	0x3
-	.byte	0x82
-	.4byte	0xdd4
-	.4byte	.LLST6
-	.byte	0
-	.uleb128 0x2d
-	.4byte	.LASF871
-	.byte	0x3
-	.byte	0x71
-	.4byte	0x5b
-	.8byte	.LFB201
-	.8byte	.LFE201-.LFB201
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8bb0
-	.uleb128 0x2e
-	.4byte	.LASF299
-	.byte	0x3
-	.byte	0x71
-	.4byte	0xfa
-	.4byte	.LLST102
-	.uleb128 0x33
-	.string	"buf"
-	.byte	0x3
-	.byte	0x73
-	.4byte	0xfa
-	.4byte	.LLST103
-	.uleb128 0x34
-	.8byte	.LVL445
-	.4byte	0xa971
-	.4byte	0x8b9b
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC71
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC70
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL447
-	.4byte	0x8bb0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x2d
-	.4byte	.LASF872
-	.byte	0x3
-	.byte	0xb
-	.4byte	0x5b
-	.8byte	.LFB200
-	.8byte	.LFE200-.LFB200
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x963e
-	.uleb128 0x2e
-	.4byte	.LASF299
-	.byte	0x3
-	.byte	0xb
-	.4byte	0xfa
-	.4byte	.LLST97
-	.uleb128 0x33
-	.string	"i"
-	.byte	0x3
-	.byte	0xd
-	.4byte	0x5b
-	.4byte	.LLST98
-	.uleb128 0x33
-	.string	"buf"
-	.byte	0x3
-	.byte	0xe
-	.4byte	0xfa
-	.4byte	.LLST99
-	.uleb128 0x63
-	.8byte	.LBB217
-	.8byte	.LBE217-.LBB217
-	.4byte	0x8c58
-	.uleb128 0x32
-	.4byte	.LASF586
-	.byte	0x3
-	.byte	0x57
-	.4byte	0xdc9
-	.4byte	.LLST100
-	.uleb128 0x34
-	.8byte	.LVL430
-	.4byte	0x662a
-	.4byte	0x8c37
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL434
-	.4byte	0xa971
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x87
-	.sleb128 -1
-	.byte	0
-	.byte	0
-	.uleb128 0x63
-	.8byte	.LBB218
-	.8byte	.LBE218-.LBB218
-	.4byte	0x8c9d
-	.uleb128 0x32
-	.4byte	.LASF586
-	.byte	0x3
-	.byte	0x60
-	.4byte	0xdc9
-	.4byte	.LLST101
-	.uleb128 0x36
-	.8byte	.LVL441
-	.4byte	0xa971
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x87
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x86
-	.sleb128 -1
-	.byte	0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL293
-	.4byte	0xa971
-	.4byte	0x8cc2
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC2
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL295
-	.4byte	0xa971
-	.4byte	0x8ce7
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC3
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL297
-	.4byte	0xa971
-	.4byte	0x8d0c
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC4
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL299
-	.4byte	0xa971
-	.4byte	0x8d31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC5
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL301
-	.4byte	0xa971
-	.4byte	0x8d56
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC6
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL303
-	.4byte	0xa971
-	.4byte	0x8d7b
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC7
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL305
-	.4byte	0xa971
-	.4byte	0x8da0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC8
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL307
-	.4byte	0xa971
-	.4byte	0x8dc5
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC9
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL309
-	.4byte	0xa971
-	.4byte	0x8dea
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC10
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL311
-	.4byte	0xa971
-	.4byte	0x8e0f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC11
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL313
-	.4byte	0xa971
-	.4byte	0x8e34
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC12
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL315
-	.4byte	0xa971
-	.4byte	0x8e59
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC13
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL317
-	.4byte	0xa971
-	.4byte	0x8e7e
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC14
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL319
-	.4byte	0xa971
-	.4byte	0x8ea3
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC15
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL321
-	.4byte	0xa971
-	.4byte	0x8ec8
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC16
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL323
-	.4byte	0xa971
-	.4byte	0x8eed
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC17
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL325
-	.4byte	0xa971
-	.4byte	0x8f12
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC18
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL327
-	.4byte	0xa971
-	.4byte	0x8f37
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC19
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL329
-	.4byte	0xa971
-	.4byte	0x8f5c
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC20
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL331
-	.4byte	0xa971
-	.4byte	0x8f81
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC21
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL333
-	.4byte	0xa971
-	.4byte	0x8fa6
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC22
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL335
-	.4byte	0xa971
-	.4byte	0x8fcb
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC23
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL337
-	.4byte	0xa971
-	.4byte	0x8ff0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC24
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL339
-	.4byte	0xa971
-	.4byte	0x9015
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC25
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL341
-	.4byte	0xa971
-	.4byte	0x903a
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC26
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL343
-	.4byte	0xa971
-	.4byte	0x905f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC27
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL345
-	.4byte	0xa971
-	.4byte	0x9084
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC28
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL347
-	.4byte	0xa971
-	.4byte	0x90a9
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC29
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL349
-	.4byte	0xa971
-	.4byte	0x90ce
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL351
-	.4byte	0xa971
-	.4byte	0x90f3
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL353
-	.4byte	0xa971
-	.4byte	0x9118
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC32
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL355
-	.4byte	0xa971
-	.4byte	0x913d
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC33
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL357
-	.4byte	0xa971
-	.4byte	0x9162
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC34
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL359
-	.4byte	0xa971
-	.4byte	0x9187
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC35
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL361
-	.4byte	0xa971
-	.4byte	0x91ac
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC36
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL363
-	.4byte	0xa971
-	.4byte	0x91d1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC37
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL365
-	.4byte	0xa971
-	.4byte	0x91f6
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC38
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL367
-	.4byte	0xa971
-	.4byte	0x921b
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC39
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL369
-	.4byte	0xa971
-	.4byte	0x9240
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC40
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL371
-	.4byte	0xa971
-	.4byte	0x9265
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC41
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL373
-	.4byte	0xa971
-	.4byte	0x928a
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC42
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL375
-	.4byte	0xa971
-	.4byte	0x92af
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC43
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL377
-	.4byte	0xa971
-	.4byte	0x92d4
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC44
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL379
-	.4byte	0xa971
-	.4byte	0x92f9
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC45
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL381
-	.4byte	0xa971
-	.4byte	0x931e
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC46
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL383
-	.4byte	0xa971
-	.4byte	0x9343
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC47
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL385
-	.4byte	0xa971
-	.4byte	0x9368
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC48
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL387
-	.4byte	0xa971
-	.4byte	0x938d
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC49
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL389
-	.4byte	0xa971
-	.4byte	0x93b2
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC50
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL391
-	.4byte	0xa971
-	.4byte	0x93d7
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC51
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL393
-	.4byte	0xa971
-	.4byte	0x93fc
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC52
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL395
-	.4byte	0xa971
-	.4byte	0x9421
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC53
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL397
-	.4byte	0xa971
-	.4byte	0x9446
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC54
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL399
-	.4byte	0xa971
-	.4byte	0x946b
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC55
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL401
-	.4byte	0xa971
-	.4byte	0x9490
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC56
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL403
-	.4byte	0xa971
-	.4byte	0x94b5
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC57
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL405
-	.4byte	0xa971
-	.4byte	0x94da
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC58
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL407
-	.4byte	0xa971
-	.4byte	0x94ff
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC59
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL409
-	.4byte	0xa971
-	.4byte	0x9524
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC60
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL411
-	.4byte	0xa971
-	.4byte	0x9549
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC61
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL413
-	.4byte	0xa971
-	.4byte	0x956e
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC62
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL415
-	.4byte	0xa971
-	.4byte	0x9593
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC63
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL417
-	.4byte	0xa971
-	.4byte	0x95b8
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC64
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL419
-	.4byte	0x3ebe
-	.uleb128 0x34
-	.8byte	.LVL420
-	.4byte	0xa971
-	.4byte	0x95ea
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC65
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL422
-	.4byte	0x3e5d
-	.uleb128 0x34
-	.8byte	.LVL423
-	.4byte	0xa971
-	.4byte	0x961c
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC66
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL428
-	.4byte	0xa971
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC67
-	.byte	0
-	.byte	0
-	.uleb128 0x6c
-	.4byte	0x2a88
-	.8byte	.LFB349
-	.8byte	.LFE349-.LFB349
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x96a0
-	.uleb128 0x6d
-	.4byte	0x2aa3
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x6d
-	.4byte	0x2aae
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x6e
-	.4byte	0x2a98
-	.uleb128 0x6f
-	.4byte	0x2ab9
-	.4byte	.LLST0
-	.uleb128 0x70
-	.4byte	0x2ac4
-	.uleb128 0x6f
-	.4byte	0x2acf
-	.4byte	.LLST1
-	.uleb128 0x71
-	.4byte	0x2ada
-	.uleb128 0x1
-	.byte	0x56
-	.uleb128 0x71
-	.4byte	0x2ae5
-	.uleb128 0x1
-	.byte	0x54
-	.uleb128 0x6f
-	.4byte	0x2af0
-	.4byte	.LLST2
-	.uleb128 0x70
-	.4byte	0x2afb
-	.byte	0
-	.uleb128 0x6c
-	.4byte	0x53f4
-	.8byte	.LFB355
-	.8byte	.LFE355-.LFB355
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x96d1
-	.uleb128 0x47
-	.4byte	0x5401
-	.4byte	.LLST3
-	.uleb128 0x6d
-	.4byte	0x540d
-	.uleb128 0x6
-	.byte	0xfa
-	.4byte	0x540d
-	.byte	0x9f
-	.byte	0
-	.uleb128 0x6c
-	.4byte	0x8ac5
-	.8byte	.LFB203
-	.8byte	.LFE203-.LFB203
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x96f4
-	.uleb128 0x6d
-	.4byte	0x8ad1
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0
-	.uleb128 0x6c
-	.4byte	0x862f
-	.8byte	.LFB208
-	.8byte	.LFE208-.LFB208
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x9738
-	.uleb128 0x47
-	.4byte	0x8640
-	.4byte	.LLST10
-	.uleb128 0x70
-	.4byte	0x864c
-	.uleb128 0x72
-	.4byte	.Ldebug_ranges0+0
-	.uleb128 0x6e
-	.4byte	0x8640
-	.uleb128 0x72
-	.4byte	.Ldebug_ranges0+0
-	.uleb128 0x6f
-	.4byte	0x9718
-	.4byte	.LLST11
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x73
-	.4byte	0x7ca2
-	.8byte	.LFB216
-	.8byte	.LFE216-.LFB216
-	.uleb128 0x1
-	.byte	0x9c
-	.uleb128 0x73
-	.4byte	0x751a
-	.8byte	.LFB224
-	.8byte	.LFE224-.LFB224
-	.uleb128 0x1
-	.byte	0x9c
-	.uleb128 0x73
-	.4byte	0x6b8f
-	.8byte	.LFB238
-	.8byte	.LFE238-.LFB238
-	.uleb128 0x1
-	.byte	0x9c
-	.uleb128 0x73
-	.4byte	0x6b83
-	.8byte	.LFB239
-	.8byte	.LFE239-.LFB239
-	.uleb128 0x1
-	.byte	0x9c
-	.uleb128 0x6c
-	.4byte	0x692c
-	.8byte	.LFB245
-	.8byte	.LFE245-.LFB245
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x9837
-	.uleb128 0x47
-	.4byte	0x6938
-	.4byte	.LLST43
-	.uleb128 0x70
-	.4byte	0x6943
-	.uleb128 0x63
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-	.8byte	.LBE195-.LBB195
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-	.uleb128 0x47
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-	.4byte	.LLST44
-	.uleb128 0x74
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-	.8byte	.LBE196-.LBB196
-	.uleb128 0x70
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-	.uleb128 0x2f
-	.8byte	.LVL119
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-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR46
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xdd
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL117
-	.4byte	0x6882
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0
-	.byte	0
-	.uleb128 0x6c
-	.4byte	0x6951
-	.8byte	.LFB244
-	.8byte	.LFE244-.LFB244
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x98da
-	.uleb128 0x47
-	.4byte	0x695d
-	.4byte	.LLST50
-	.uleb128 0x70
-	.4byte	0x6968
-	.uleb128 0x63
-	.8byte	.LBB199
-	.8byte	.LBE199-.LBB199
-	.4byte	0x98c4
-	.uleb128 0x47
-	.4byte	0x695d
-	.4byte	.LLST51
-	.uleb128 0x74
-	.8byte	.LBB200
-	.8byte	.LBE200-.LBB200
-	.uleb128 0x70
-	.4byte	0x985b
-	.uleb128 0x2f
-	.8byte	.LVL139
-	.4byte	0xa94f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR49
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xd6
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL137
-	.4byte	0x6801
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0
-	.byte	0
-	.uleb128 0x6c
-	.4byte	0x65ab
-	.8byte	.LFB252
-	.8byte	.LFE252-.LFB252
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x9a37
-	.uleb128 0x47
-	.4byte	0x65bc
-	.4byte	.LLST64
-	.uleb128 0x70
-	.4byte	0x65c8
-	.uleb128 0x70
-	.4byte	0x65d4
-	.uleb128 0x70
-	.4byte	0x65e0
-	.uleb128 0x70
-	.4byte	0x65ec
-	.uleb128 0x70
-	.4byte	0x65f8
-	.uleb128 0x70
-	.4byte	0x6604
-	.uleb128 0x70
-	.4byte	0x6610
-	.uleb128 0x70
-	.4byte	0x661c
-	.uleb128 0x74
-	.8byte	.LBB203
-	.8byte	.LBE203-.LBB203
-	.uleb128 0x47
-	.4byte	0x65bc
-	.4byte	.LLST65
-	.uleb128 0x74
-	.8byte	.LBB204
-	.8byte	.LBE204-.LBB204
-	.uleb128 0x6f
-	.4byte	0x98fe
-	.4byte	.LLST66
-	.uleb128 0x6f
-	.4byte	0x9903
-	.4byte	.LLST67
-	.uleb128 0x6f
-	.4byte	0x9908
-	.4byte	.LLST68
-	.uleb128 0x6f
-	.4byte	0x990d
-	.4byte	.LLST69
-	.uleb128 0x6f
-	.4byte	0x9912
-	.4byte	.LLST70
-	.uleb128 0x6f
-	.4byte	0x9917
-	.4byte	.LLST71
-	.uleb128 0x6f
-	.4byte	0x991c
-	.4byte	.LLST72
-	.uleb128 0x70
-	.4byte	0x9921
-	.uleb128 0x34
-	.8byte	.LVL189
-	.4byte	0xa94f
-	.4byte	0x99c8
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR54
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x1d6
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL199
-	.4byte	0x6747
-	.4byte	0x99ed
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR41
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL200
-	.4byte	0xa94f
-	.4byte	0x9a20
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR54
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x1e1
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL201
-	.4byte	0x692c
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x6c
-	.4byte	0x592a
-	.8byte	.LFB266
-	.8byte	.LFE266-.LFB266
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x9a7d
-	.uleb128 0x47
-	.4byte	0x5937
-	.4byte	.LLST76
-	.uleb128 0x75
-	.4byte	0x5943
-	.byte	0
-	.uleb128 0x72
-	.4byte	.Ldebug_ranges0+0x60
-	.uleb128 0x6d
-	.4byte	0x5937
-	.uleb128 0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.uleb128 0x72
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-	.uleb128 0x70
-	.4byte	0x9a5b
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-	.byte	0
-	.byte	0
-	.uleb128 0x6c
-	.4byte	0x53f4
-	.8byte	.LFB272
-	.8byte	.LFE272-.LFB272
-	.uleb128 0x1
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-	.4byte	0x9ac9
-	.uleb128 0x47
-	.4byte	0x5401
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-	.uleb128 0x47
-	.4byte	0x540d
-	.4byte	.LLST78
-	.uleb128 0x2f
-	.8byte	.LVL232
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-	.uleb128 0x30
-	.uleb128 0x1
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-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
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-	.uleb128 0x3e
-	.4byte	0x540d
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
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-	.byte	0
-	.byte	0
-	.uleb128 0x6c
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-	.8byte	.LFE282-.LFB282
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-	.uleb128 0x6d
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-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x70
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-	.uleb128 0x74
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-	.8byte	.LBE215-.LBB215
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-	.uleb128 0x74
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-	.byte	0
-	.byte	0
-	.uleb128 0x6c
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-	.uleb128 0x47
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-	.uleb128 0x72
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-	.4byte	0x3d74
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-	.uleb128 0x36
-	.8byte	.LVL481
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-	.uleb128 0x30
-	.uleb128 0x1
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-	.uleb128 0x3
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-	.uleb128 0x1
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-	.byte	0
-	.byte	0
-	.uleb128 0x6c
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-	.uleb128 0x1
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-	.uleb128 0x2
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-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x70
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-	.uleb128 0x30
-	.uleb128 0x1
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-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
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-	.8byte	.LANCHOR116
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-	.uleb128 0x1
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-	.uleb128 0x3
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-	.uleb128 0x36
-	.8byte	.LVL734
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-	.uleb128 0x30
-	.uleb128 0x1
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-	.uleb128 0x3
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-	.uleb128 0x2
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-	.uleb128 0x3
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-	.8byte	.LVL970
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-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x36
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-	.uleb128 0x30
-	.uleb128 0x1
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-	.uleb128 0x3
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-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x2
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-	.uleb128 0x3
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-	.uleb128 0x1
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-	.uleb128 0x3
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-	.uleb128 0x1
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-	.uleb128 0x2
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-	.uleb128 0x1
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-	.uleb128 0x2
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-	.uleb128 0x34
-	.8byte	.LVL1224
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-	.uleb128 0x1
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-	.uleb128 0x2
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-	.uleb128 0x1
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-	.uleb128 0x2
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-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x30
-	.uleb128 0x1
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-	.uleb128 0x2
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-	.uleb128 0x30
-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x30
-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x34
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-	.uleb128 0x30
-	.uleb128 0x1
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-	.uleb128 0x2
-	.byte	0x8f
-	.sleb128 48
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL1228
-	.4byte	0x270c
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8f
-	.sleb128 48
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x6c
-	.4byte	0x2e65
-	.8byte	.LFB317
-	.8byte	.LFE317-.LFB317
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xa04f
-	.uleb128 0x47
-	.4byte	0x2e76
-	.4byte	.LLST319
-	.uleb128 0x70
-	.4byte	0x2e82
-	.uleb128 0x70
-	.4byte	0x2e8e
-	.uleb128 0x70
-	.4byte	0x2e98
-	.uleb128 0x70
-	.4byte	0x2ea2
-	.uleb128 0x72
-	.4byte	.Ldebug_ranges0+0x240
-	.uleb128 0x6e
-	.4byte	0x2e76
-	.uleb128 0x72
-	.4byte	.Ldebug_ranges0+0x240
-	.uleb128 0x6f
-	.4byte	0x9f9a
-	.4byte	.LLST320
-	.uleb128 0x71
-	.4byte	0x9f9f
-	.uleb128 0x1
-	.byte	0x64
-	.uleb128 0x6f
-	.4byte	0x9fa4
-	.4byte	.LLST321
-	.uleb128 0x71
-	.4byte	0x9fa9
-	.uleb128 0x1
-	.byte	0x6a
-	.uleb128 0x45
-	.8byte	.LVL1315
-	.4byte	0x2eaf
-	.uleb128 0x34
-	.8byte	.LVL1318
-	.4byte	0x6dce
-	.4byte	0xa002
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x89
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1322
-	.4byte	0xa94f
-	.4byte	0xa027
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC100
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8a
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1323
-	.4byte	0x75b1
-	.4byte	0xa03f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8a
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1324
-	.4byte	0x7304
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x6c
-	.4byte	0x3795
-	.8byte	.LFB301
-	.8byte	.LFE301-.LFB301
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xa17a
-	.uleb128 0x47
-	.4byte	0x37a6
-	.4byte	.LLST322
-	.uleb128 0x70
-	.4byte	0x37b2
-	.uleb128 0x63
-	.8byte	.LBB295
-	.8byte	.LBE295-.LBB295
-	.4byte	0xa165
-	.uleb128 0x47
-	.4byte	0x37a6
-	.4byte	.LLST323
-	.uleb128 0x74
-	.8byte	.LBB296
-	.8byte	.LBE296-.LBB296
-	.uleb128 0x70
-	.4byte	0xa073
-	.uleb128 0x34
-	.8byte	.LVL1333
-	.4byte	0x6747
-	.4byte	0xa0d1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR41
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1334
-	.4byte	0xa94f
-	.4byte	0xa104
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR158
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xabb
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1335
-	.4byte	0x3d63
-	.4byte	0xa11c
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1336
-	.4byte	0x2e65
-	.4byte	0xa134
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL1337
-	.4byte	0xa94f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR158
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xabe
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL1340
-	.4byte	0x65ab
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x6c
-	.4byte	0x5829
-	.8byte	.LFB268
-	.8byte	.LFE268-.LFB268
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xa273
-	.uleb128 0x72
-	.4byte	.Ldebug_ranges0+0x280
-	.uleb128 0x6f
-	.4byte	0x5837
-	.4byte	.LLST326
-	.uleb128 0x71
-	.4byte	0x5843
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x6f
-	.4byte	0x584f
-	.4byte	.LLST327
-	.uleb128 0x71
-	.4byte	0x585b
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -32
-	.uleb128 0x6f
-	.4byte	0x5867
-	.4byte	.LLST328
-	.uleb128 0x34
-	.8byte	.LVL1353
-	.4byte	0x5c1c
-	.4byte	0xa1e9
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x8f
-	.sleb128 156
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1355
-	.4byte	0x298f
-	.4byte	0xa20c
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x8f
-	.sleb128 160
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1359
-	.4byte	0x258a
-	.4byte	0xa224
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1361
-	.4byte	0x37d5
-	.4byte	0xa23c
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x86
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1362
-	.4byte	0x27d2
-	.4byte	0xa264
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x8f
-	.sleb128 160
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1363
-	.4byte	0x3691
-	.byte	0
-	.byte	0
-	.uleb128 0x6c
-	.4byte	0x44a0
-	.8byte	.LFB286
-	.8byte	.LFE286-.LFB286
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xa2b4
-	.uleb128 0x2f
-	.8byte	.LVL1623
-	.4byte	0x5ade
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR81
-	.byte	0
-	.byte	0
-	.uleb128 0x6c
-	.4byte	0x541a
-	.8byte	.LFB271
-	.8byte	.LFE271-.LFB271
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xa327
-	.uleb128 0x34
-	.8byte	.LVL1660
-	.4byte	0x59b6
-	.4byte	0xa2e7
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x40
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1661
-	.4byte	0xa94f
-	.4byte	0xa313
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC71
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC103
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL1662
-	.4byte	0x258a
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.byte	0
-	.uleb128 0x6c
-	.4byte	0x311d
-	.8byte	.LFB311
-	.8byte	.LFE311-.LFB311
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xa38d
-	.uleb128 0x34
-	.8byte	.LVL1799
-	.4byte	0x3126
-	.4byte	0xa35a
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1800
-	.4byte	0x5875
-	.4byte	0xa379
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR144
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL1801
-	.4byte	0x32fe
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.byte	0
-	.uleb128 0x6c
-	.4byte	0x2d1d
-	.8byte	.LFB319
-	.8byte	.LFE319-.LFB319
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xa742
-	.uleb128 0x47
-	.4byte	0x2d2e
-	.4byte	.LLST412
-	.uleb128 0x47
-	.4byte	0x2d3a
-	.4byte	.LLST413
-	.uleb128 0x75
-	.4byte	0x2d46
-	.byte	0x1
-	.uleb128 0x70
-	.4byte	0x2d52
-	.uleb128 0x70
-	.4byte	0x2d5e
-	.uleb128 0x78
-	.4byte	0x2d6a
-	.sleb128 -1
-	.uleb128 0x70
-	.4byte	0x2d76
-	.uleb128 0x70
-	.4byte	0x2d82
-	.uleb128 0x70
-	.4byte	0x2d8e
-	.uleb128 0x70
-	.4byte	0x2d9a
-	.uleb128 0x70
-	.4byte	0x2da6
-	.uleb128 0x70
-	.4byte	0x2db2
-	.uleb128 0x70
-	.4byte	0x2dce
-	.uleb128 0x40
-	.4byte	.Ldebug_ranges0+0x330
-	.4byte	0xa72e
-	.uleb128 0x47
-	.4byte	0x2d3a
-	.4byte	.LLST414
-	.uleb128 0x47
-	.4byte	0x2d2e
-	.4byte	.LLST415
-	.uleb128 0x72
-	.4byte	.Ldebug_ranges0+0x330
-	.uleb128 0x70
-	.4byte	0xa3ba
-	.uleb128 0x6f
-	.4byte	0xa3c0
-	.4byte	.LLST416
-	.uleb128 0x71
-	.4byte	0xa3c5
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -4
-	.uleb128 0x70
-	.4byte	0xa3ca
-	.uleb128 0x6f
-	.4byte	0xa3d0
-	.4byte	.LLST417
-	.uleb128 0x6f
-	.4byte	0xa3d5
-	.4byte	.LLST418
-	.uleb128 0x6f
-	.4byte	0xa3da
-	.4byte	.LLST419
-	.uleb128 0x6f
-	.4byte	0xa3df
-	.4byte	.LLST420
-	.uleb128 0x6f
-	.4byte	0xa3e4
-	.4byte	.LLST421
-	.uleb128 0x6f
-	.4byte	0xa3e9
-	.4byte	.LLST422
-	.uleb128 0x79
-	.4byte	0x2dbe
-	.uleb128 0x79
-	.4byte	0x2dc6
-	.uleb128 0x70
-	.4byte	0xa3ee
-	.uleb128 0x40
-	.4byte	.Ldebug_ranges0+0x360
-	.4byte	0xa4f0
-	.uleb128 0x6f
-	.4byte	0x2ddc
-	.4byte	.LLST423
-	.uleb128 0x45
-	.8byte	.LVL1833
-	.4byte	0x3d81
-	.uleb128 0x34
-	.8byte	.LVL1836
-	.4byte	0x662a
-	.4byte	0xa4aa
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x40
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1839
-	.4byte	0x662a
-	.4byte	0xa4c1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1842
-	.4byte	0x2eaf
-	.uleb128 0x36
-	.8byte	.LVL1851
-	.4byte	0xa94f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC107
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1863
-	.4byte	0x3580
-	.uleb128 0x34
-	.8byte	.LVL1864
-	.4byte	0x45ef
-	.4byte	0xa515
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x87
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1866
-	.4byte	0x662a
-	.4byte	0xa52d
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1871
-	.4byte	0x2e05
-	.uleb128 0x34
-	.8byte	.LVL1873
-	.4byte	0x662a
-	.4byte	0xa551
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1875
-	.4byte	0x3691
-	.4byte	0xa569
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x9
-	.byte	0xff
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1880
-	.4byte	0x3580
-	.4byte	0xa581
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1881
-	.4byte	0x3691
-	.4byte	0xa599
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x9
-	.byte	0xff
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1882
-	.4byte	0xa94f
-	.4byte	0xa5cc
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR175
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x292
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1883
-	.4byte	0xa94f
-	.4byte	0xa5ff
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR175
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x293
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1884
-	.4byte	0xa94f
-	.4byte	0xa632
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR175
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x294
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1885
-	.4byte	0x45ef
-	.4byte	0xa64a
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x89
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1886
-	.4byte	0x2e05
-	.uleb128 0x34
-	.8byte	.LVL1900
-	.4byte	0x298f
-	.4byte	0xa66f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x87
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1909
-	.4byte	0xa94f
-	.4byte	0xa6a2
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR175
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x2b8
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1911
-	.4byte	0x5c1c
-	.4byte	0xa6c0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x8f
-	.sleb128 348
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1912
-	.4byte	0x3078
-	.uleb128 0x34
-	.8byte	.LVL1913
-	.4byte	0x35be
-	.4byte	0xa6eb
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1914
-	.4byte	0x2fb2
-	.uleb128 0x45
-	.8byte	.LVL1918
-	.4byte	0x2fb2
-	.uleb128 0x45
-	.8byte	.LVL1919
-	.4byte	0x3795
-	.uleb128 0x45
-	.8byte	.LVL1920
-	.4byte	0x5d49
-	.uleb128 0x45
-	.8byte	.LVL1921
-	.4byte	0x567a
-	.byte	0
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL1846
-	.4byte	0x32fe
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x6c
-	.4byte	0x3f79
-	.8byte	.LFB292
-	.8byte	.LFE292-.LFB292
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xa92c
-	.uleb128 0x75
-	.4byte	0x3f8a
-	.byte	0
-	.uleb128 0x63
-	.8byte	.LBB339
-	.8byte	.LBE339-.LBB339
-	.4byte	0xa896
-	.uleb128 0x70
-	.4byte	0xa75d
-	.uleb128 0x63
-	.8byte	.LBB340
-	.8byte	.LBE340-.LBB340
-	.4byte	0xa79c
-	.uleb128 0x6f
-	.4byte	0x3f95
-	.4byte	.LLST463
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2086
-	.4byte	0x4387
-	.4byte	0xa7b4
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2087
-	.4byte	0x4387
-	.4byte	0xa7cc
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2089
-	.4byte	0x5875
-	.4byte	0xa7eb
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR144
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2090
-	.4byte	0x5875
-	.4byte	0xa80a
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR149
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL2091
-	.4byte	0x5d49
-	.uleb128 0x45
-	.8byte	.LVL2092
-	.4byte	0x567a
-	.uleb128 0x45
-	.8byte	.LVL2093
-	.4byte	0x567a
-	.uleb128 0x45
-	.8byte	.LVL2094
-	.4byte	0x2f5e
-	.uleb128 0x45
-	.8byte	.LVL2095
-	.4byte	0x2f5e
-	.uleb128 0x34
-	.8byte	.LVL2096
-	.4byte	0x3903
-	.4byte	0xa863
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2097
-	.4byte	0x3903
-	.4byte	0xa87b
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL2098
-	.4byte	0x423e
-	.uleb128 0x45
-	.8byte	.LVL2102
-	.4byte	0x5d49
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL2073
-	.4byte	0x6b9b
-	.uleb128 0x45
-	.8byte	.LVL2074
-	.4byte	0x5427
-	.uleb128 0x45
-	.8byte	.LVL2075
-	.4byte	0x51e2
-	.uleb128 0x45
-	.8byte	.LVL2076
-	.4byte	0x4f21
-	.uleb128 0x45
-	.8byte	.LVL2077
-	.4byte	0x4fc6
-	.uleb128 0x45
-	.8byte	.LVL2078
-	.4byte	0x443f
-	.uleb128 0x45
-	.8byte	.LVL2079
-	.4byte	0x541a
-	.uleb128 0x45
-	.8byte	.LVL2080
-	.4byte	0x6ade
-	.uleb128 0x45
-	.8byte	.LVL2081
-	.4byte	0x44a9
-	.uleb128 0x45
-	.8byte	.LVL2082
-	.4byte	0x46a7
-	.uleb128 0x36
-	.8byte	.LVL2083
-	.4byte	0x592a
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x7a
-	.4byte	.LASF873
-	.4byte	.LASF873
-	.byte	0xb
-	.byte	0x72
-	.uleb128 0x7b
-	.4byte	.LASF874
-	.4byte	.LASF874
-	.byte	0x1c
-	.2byte	0x16d
-	.uleb128 0x7b
-	.4byte	.LASF875
-	.4byte	.LASF875
-	.byte	0x1c
-	.2byte	0x16c
-	.uleb128 0x7a
-	.4byte	.LASF876
-	.4byte	.LASF876
-	.byte	0x1d
-	.byte	0x12
-	.uleb128 0x7a
-	.4byte	.LASF877
-	.4byte	.LASF877
-	.byte	0x6
-	.byte	0x35
-	.uleb128 0x7b
-	.4byte	.LASF878
-	.4byte	.LASF878
-	.byte	0x1c
-	.2byte	0x399
-	.uleb128 0x7a
-	.4byte	.LASF879
-	.4byte	.LASF879
-	.byte	0x1e
-	.byte	0x6d
-	.byte	0
-	.section	.debug_abbrev,"",@progbits
-.Ldebug_abbrev0:
-	.uleb128 0x1
-	.uleb128 0x11
-	.byte	0x1
-	.uleb128 0x25
-	.uleb128 0xe
-	.uleb128 0x13
-	.uleb128 0xb
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x1b
-	.uleb128 0xe
-	.uleb128 0x55
-	.uleb128 0x17
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x10
-	.uleb128 0x17
-	.byte	0
-	.byte	0
-	.uleb128 0x2
-	.uleb128 0x24
-	.byte	0
-	.uleb128 0xb
-	.uleb128 0xb
-	.uleb128 0x3e
-	.uleb128 0xb
-	.uleb128 0x3
-	.uleb128 0xe
-	.byte	0
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x16
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x4
-	.uleb128 0x34
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x3f
-	.uleb128 0x19
-	.uleb128 0x3c
-	.uleb128 0x19
-	.byte	0
-	.byte	0
-	.uleb128 0x5
-	.uleb128 0x24
-	.byte	0
-	.uleb128 0xb
-	.uleb128 0xb
-	.uleb128 0x3e
-	.uleb128 0xb
-	.uleb128 0x3
-	.uleb128 0x8
-	.byte	0
-	.byte	0
-	.uleb128 0x6
-	.uleb128 0x16
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x7
-	.uleb128 0x26
-	.byte	0
-	.uleb128 0x49
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x8
-	.uleb128 0xf
-	.byte	0
-	.uleb128 0xb
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x9
-	.uleb128 0xf
-	.byte	0
-	.uleb128 0xb
-	.uleb128 0xb
-	.byte	0
-	.byte	0
-	.uleb128 0xa
-	.uleb128 0x1
-	.byte	0x1
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0xb
-	.uleb128 0x21
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0xc
-	.uleb128 0x34
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0x5
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x3f
-	.uleb128 0x19
-	.uleb128 0x3c
-	.uleb128 0x19
-	.byte	0
-	.byte	0
-	.uleb128 0xd
-	.uleb128 0x26
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0xe
-	.uleb128 0x21
-	.byte	0
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x2f
-	.uleb128 0xb
-	.byte	0
-	.byte	0
-	.uleb128 0xf
-	.uleb128 0x13
-	.byte	0x1
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0xb
-	.uleb128 0xb
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x10
-	.uleb128 0xd
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x38
-	.uleb128 0xb
-	.byte	0
-	.byte	0
-	.uleb128 0x11
-	.uleb128 0x15
-	.byte	0x1
-	.uleb128 0x27
-	.uleb128 0x19
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x12
-	.uleb128 0x5
-	.byte	0
-	.uleb128 0x49
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x13
-	.uleb128 0x13
-	.byte	0x1
-	.uleb128 0xb
-	.uleb128 0x5
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x14
-	.uleb128 0xd
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x38
-	.uleb128 0x5
-	.byte	0
-	.byte	0
-	.uleb128 0x15
-	.uleb128 0x21
-	.byte	0
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x2f
-	.uleb128 0x5
-	.byte	0
-	.byte	0
-	.uleb128 0x16
-	.uleb128 0xd
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x38
-	.uleb128 0xb
-	.byte	0
-	.byte	0
-	.uleb128 0x17
-	.uleb128 0x13
-	.byte	0x1
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0xb
-	.uleb128 0x5
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x18
-	.uleb128 0x34
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x3f
-	.uleb128 0x19
-	.uleb128 0x3c
-	.uleb128 0x19
-	.byte	0
-	.byte	0
-	.uleb128 0x19
-	.uleb128 0x13
-	.byte	0x1
-	.uleb128 0xb
-	.uleb128 0xb
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x1a
-	.uleb128 0x13
-	.byte	0x1
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0xb
-	.uleb128 0xb
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0x5
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x1b
-	.uleb128 0xd
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0x5
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x38
-	.uleb128 0xb
-	.byte	0
-	.byte	0
-	.uleb128 0x1c
-	.uleb128 0x16
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0x5
-	.uleb128 0x49
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x1d
-	.uleb128 0xd
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0x5
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x38
-	.uleb128 0xb
-	.byte	0
-	.byte	0
-	.uleb128 0x1e
-	.uleb128 0x13
-	.byte	0x1
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0xb
-	.uleb128 0x5
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0x5
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x1f
-	.uleb128 0xd
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0x5
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x38
-	.uleb128 0x5
-	.byte	0
-	.byte	0
-	.uleb128 0x20
-	.uleb128 0xd
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0x5
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x38
-	.uleb128 0x5
-	.byte	0
-	.byte	0
-	.uleb128 0x21
-	.uleb128 0x4
-	.byte	0x1
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0xb
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x22
-	.uleb128 0x28
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x1c
-	.uleb128 0xb
-	.byte	0
-	.byte	0
-	.uleb128 0x23
-	.uleb128 0x28
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x1c
-	.uleb128 0xd
-	.byte	0
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-	.8byte	.LVL1208-1
-	.2byte	0x1
-	.byte	0x54
-	.8byte	.LVL1209
-	.8byte	.LVL1211-1
-	.2byte	0x1
-	.byte	0x54
-	.8byte	0
-	.8byte	0
-.LLST296:
-	.8byte	.LVL1175
-	.8byte	.LVL1182
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1182
-	.8byte	.LVL1189
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL1189
-	.8byte	.LVL1190
-	.2byte	0x3
-	.byte	0x86
-	.sleb128 -1
-	.byte	0x9f
-	.8byte	.LVL1190
-	.8byte	.LVL1217
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST297:
-	.8byte	.LVL1202
-	.8byte	.LVL1203
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1203
-	.8byte	.LVL1204
-	.2byte	0x2
-	.byte	0x75
-	.sleb128 16
-	.8byte	.LVL1206
-	.8byte	.LVL1207
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1207
-	.8byte	.LVL1208-1
-	.2byte	0x2
-	.byte	0x75
-	.sleb128 16
-	.8byte	0
-	.8byte	0
-.LLST405:
-	.8byte	.LVL1763
-	.8byte	.LVL1765
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1765
-	.8byte	.LVL1766
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL1766
-	.8byte	.LVL1768
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1768
-	.8byte	.LFE308
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST406:
-	.8byte	.LVL1777
-	.8byte	.LVL1779
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1779
-	.8byte	.LVL1782
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL1785
-	.8byte	.LVL1795
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL1796
-	.8byte	.LFE308
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST407:
-	.8byte	.LVL1769
-	.8byte	.LVL1771
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL1776
-	.8byte	.LVL1777
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL1790
-	.8byte	.LVL1791
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1791
-	.8byte	.LVL1793
-	.2byte	0x1
-	.byte	0x68
-	.8byte	0
-	.8byte	0
-.LLST408:
-	.8byte	.LVL1764
-	.8byte	.LVL1765
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1766
-	.8byte	.LVL1767
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1767
-	.8byte	.LVL1769
-	.2byte	0x2
-	.byte	0x32
-	.byte	0x9f
-	.8byte	.LVL1769
-	.8byte	.LVL1770-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1775
-	.8byte	.LVL1776
-	.2byte	0x2
-	.byte	0x32
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST409:
-	.8byte	.LVL1786
-	.8byte	.LVL1797
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST124:
-	.8byte	.LVL524
-	.8byte	.LVL525
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL525
-	.8byte	.LFE307
-	.2byte	0x1
-	.byte	0x56
-	.8byte	0
-	.8byte	0
-.LLST125:
-	.8byte	.LVL524
-	.8byte	.LVL526-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL526-1
-	.8byte	.LFE307
-	.2byte	0x1
-	.byte	0x5a
-	.8byte	0
-	.8byte	0
-.LLST126:
-	.8byte	.LVL524
-	.8byte	.LVL526-1
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL526-1
-	.8byte	.LFE307
-	.2byte	0x1
-	.byte	0x58
-	.8byte	0
-	.8byte	0
-.LLST127:
-	.8byte	.LVL527
-	.8byte	.LVL530
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL530
-	.8byte	.LVL531
-	.2byte	0x7
-	.byte	0x73
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0x75
-	.sleb128 0
-	.byte	0x22
-	.8byte	.LVL531
-	.8byte	.LVL532
-	.2byte	0x1
-	.byte	0x57
-	.8byte	.LVL532
-	.8byte	.LVL534
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL534
-	.8byte	.LVL535
-	.2byte	0x1
-	.byte	0x57
-	.8byte	0
-	.8byte	0
-.LLST128:
-	.8byte	.LVL527
-	.8byte	.LVL528
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL529
-	.8byte	.LVL533
-	.2byte	0x1
-	.byte	0x52
-	.8byte	0
-	.8byte	0
-.LLST122:
-	.8byte	.LVL520
-	.8byte	.LVL522
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL522
-	.8byte	.LFE306
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST123:
-	.8byte	.LVL520
-	.8byte	.LVL521
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL521
-	.8byte	.LVL523
-	.2byte	0x1
-	.byte	0x51
-	.8byte	0
-	.8byte	0
-.LLST120:
-	.8byte	.LVL514
-	.8byte	.LVL515
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL516
-	.8byte	.LVL517
-	.2byte	0x1
-	.byte	0x52
-	.8byte	0
-	.8byte	0
-.LLST121:
-	.8byte	.LVL512
-	.8byte	.LVL513
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL513
-	.8byte	.LVL518
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL519
-	.8byte	.LFE305
-	.2byte	0x1
-	.byte	0x53
-	.8byte	0
-	.8byte	0
-.LLST118:
-	.8byte	.LVL506
-	.8byte	.LVL507
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL508
-	.8byte	.LVL511
-	.2byte	0x1
-	.byte	0x52
-	.8byte	0
-	.8byte	0
-.LLST119:
-	.8byte	.LVL504
-	.8byte	.LVL505
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL505
-	.8byte	.LVL509
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL510
-	.8byte	.LFE304
-	.2byte	0x1
-	.byte	0x53
-	.8byte	0
-	.8byte	0
-.LLST117:
-	.8byte	.LVL497
-	.8byte	.LVL498
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL499
-	.8byte	.LVL500
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL501
-	.8byte	.LVL502
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL503
-	.8byte	.LFE303
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST324:
-	.8byte	.LVL1341
-	.8byte	.LVL1342
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1342
-	.8byte	.LVL1346
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1346
-	.8byte	.LFE302
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST325:
-	.8byte	.LVL1341
-	.8byte	.LVL1345
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1347
-	.8byte	.LVL1350
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1350
-	.8byte	.LFE302
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST114:
-	.8byte	.LVL483
-	.8byte	.LVL484
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL484
-	.8byte	.LVL493
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL493
-	.8byte	.LVL494
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL494
-	.8byte	.LFE300
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST115:
-	.8byte	.LVL488
-	.8byte	.LVL490
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL494
-	.8byte	.LVL495
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL496
-	.8byte	.LFE300
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST116:
-	.8byte	.LVL483
-	.8byte	.LVL489
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL489
-	.8byte	.LVL492
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL492
-	.8byte	.LVL494
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL494
-	.8byte	.LFE300
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST396:
-	.8byte	.LVL1729
-	.8byte	.LVL1731
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1731
-	.8byte	.LVL1739
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL1739
-	.8byte	.LVL1741
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL1741
-	.8byte	.LFE299
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST397:
-	.8byte	.LVL1730
-	.8byte	.LVL1740
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1741
-	.8byte	.LFE299
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST311:
-	.8byte	.LVL1268
-	.8byte	.LVL1269
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1269
-	.8byte	.LVL1309
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1309
-	.8byte	.LFE298
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST312:
-	.8byte	.LVL1276
-	.8byte	.LVL1281
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL1282
-	.8byte	.LVL1309
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST313:
-	.8byte	.LVL1284
-	.8byte	.LVL1296
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL1297
-	.8byte	.LVL1310
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST314:
-	.8byte	.LVL1288
-	.8byte	.LVL1289
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1290
-	.8byte	.LVL1291
-	.2byte	0x2
-	.byte	0x30
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-	.8byte	.LVL1291
-	.8byte	.LVL1295
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL1301
-	.8byte	.LVL1305
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL1305
-	.8byte	.LVL1306
-	.2byte	0x3
-	.byte	0x88
-	.sleb128 1
-	.byte	0x9f
-	.8byte	.LVL1307
-	.8byte	.LVL1311
-	.2byte	0x1
-	.byte	0x68
-	.8byte	0
-	.8byte	0
-.LLST315:
-	.8byte	.LVL1290
-	.8byte	.LVL1291
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1291
-	.8byte	.LVL1292-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1301
-	.8byte	.LVL1302
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1302
-	.8byte	.LVL1303
-	.2byte	0x3
-	.byte	0x71
-	.sleb128 -1
-	.byte	0x9f
-	.8byte	.LVL1303
-	.8byte	.LVL1304-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1304-1
-	.8byte	.LVL1305
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 196
-	.8byte	.LVL1305
-	.8byte	.LVL1307
-	.2byte	0x1
-	.byte	0x51
-	.8byte	0
-	.8byte	0
-.LLST316:
-	.8byte	.LVL1268
-	.8byte	.LVL1270
-	.2byte	0x2
-	.byte	0x30
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-	.8byte	.LVL1272
-	.8byte	.LVL1273
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1273
-	.8byte	.LVL1274
-	.2byte	0x3
-	.byte	0x71
-	.sleb128 1
-	.byte	0x9f
-	.8byte	.LVL1274
-	.8byte	.LVL1275-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	0
-	.8byte	0
-.LLST317:
-	.8byte	.LVL1298
-	.8byte	.LVL1300
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST318:
-	.8byte	.LVL1298
-	.8byte	.LVL1300
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST104:
-	.8byte	.LVL451
-	.8byte	.LVL455
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL456
-	.8byte	.LVL465
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL475
-	.8byte	.LVL477
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST105:
-	.8byte	.LVL451
-	.8byte	.LVL455
-	.2byte	0x3
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-	.8byte	.LVL456
-	.8byte	.LVL465
-	.2byte	0x3
-	.byte	0x9
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-	.byte	0x9f
-	.8byte	.LVL465
-	.8byte	.LVL466
-	.2byte	0x1
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-	.8byte	.LVL466
-	.8byte	.LVL471
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL471
-	.8byte	.LFE296
-	.2byte	0x1
-	.byte	0x52
-	.8byte	0
-	.8byte	0
-.LLST106:
-	.8byte	.LVL451
-	.8byte	.LVL455
-	.2byte	0x3
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-	.8byte	.LVL456
-	.8byte	.LVL465
-	.2byte	0x3
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-	.8byte	.LVL465
-	.8byte	.LVL469
-	.2byte	0x1
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-	.8byte	.LVL471
-	.8byte	.LVL476
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL477
-	.8byte	.LFE296
-	.2byte	0x1
-	.byte	0x53
-	.8byte	0
-	.8byte	0
-.LLST107:
-	.8byte	.LVL465
-	.8byte	.LVL466
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL471
-	.8byte	.LVL474
-	.2byte	0x1
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-	.8byte	.LVL478
-	.8byte	.LFE296
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST108:
-	.8byte	.LVL463
-	.8byte	.LVL464
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL464
-	.8byte	.LVL470-1
-	.2byte	0x1
-	.byte	0x56
-	.8byte	.LVL471
-	.8byte	.LFE296
-	.2byte	0x1
-	.byte	0x56
-	.8byte	0
-	.8byte	0
-.LLST109:
-	.8byte	.LVL467
-	.8byte	.LVL470-1
-	.2byte	0x1
-	.byte	0x55
-	.8byte	0
-	.8byte	0
-.LLST110:
-	.8byte	.LVL452
-	.8byte	.LVL453
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL453
-	.8byte	.LVL454
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL456
-	.8byte	.LVL457
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL458
-	.8byte	.LVL459
-	.2byte	0x2
-	.byte	0x30
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-	.8byte	.LVL459
-	.8byte	.LVL461
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST111:
-	.8byte	.LVL451
-	.8byte	.LVL455
-	.2byte	0x2
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-	.byte	0x9f
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-	.8byte	.LVL465
-	.2byte	0x2
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-	.8byte	.LVL468-1
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-	.byte	0x51
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-	.8byte	.LVL472
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL473
-	.8byte	.LFE296
-	.2byte	0x1
-	.byte	0x51
-	.8byte	0
-	.8byte	0
-.LLST93:
-	.8byte	.LVL280
-	.8byte	.LVL281
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL281
-	.8byte	.LVL283
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL283
-	.8byte	.LVL286
-	.2byte	0x41
-	.byte	0x3
-	.8byte	g_num_free_superblocks
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x37
-	.byte	0x1e
-	.byte	0x33
-	.byte	0x26
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x3
-	.8byte	g_num_free_superblocks
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x37
-	.byte	0x1e
-	.byte	0x33
-	.byte	0x26
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x2b
-	.byte	0x28
-	.2byte	0x1
-	.byte	0x16
-	.byte	0x13
-	.byte	0x9f
-	.8byte	.LVL286
-	.8byte	.LVL289
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL289
-	.8byte	.LFE295
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST94:
-	.8byte	.LVL280
-	.8byte	.LVL285
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL285
-	.8byte	.LVL286
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL286
-	.8byte	.LVL290
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL290
-	.8byte	.LFE295
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST95:
-	.8byte	.LVL282
-	.8byte	.LVL284
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL286
-	.8byte	.LVL289
-	.2byte	0x1
-	.byte	0x54
-	.8byte	0
-	.8byte	0
-.LLST96:
-	.8byte	.LVL282
-	.8byte	.LVL287
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL288
-	.8byte	.LVL289
-	.2byte	0x1
-	.byte	0x52
-	.8byte	0
-	.8byte	0
-.LLST92:
-	.8byte	.LVL276
-	.8byte	.LVL277
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL277
-	.8byte	.LVL278
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL278
-	.8byte	.LVL279
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL279
-	.8byte	.LFE294
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST88:
-	.8byte	.LVL262
-	.8byte	.LVL263
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL263
-	.8byte	.LVL266
-	.2byte	0x1
-	.byte	0x56
-	.8byte	.LVL266
-	.8byte	.LFE293
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST89:
-	.8byte	.LVL262
-	.8byte	.LVL264
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL264
-	.8byte	.LVL273
-	.2byte	0x1
-	.byte	0x57
-	.8byte	.LVL273
-	.8byte	.LVL274
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 1
-	.byte	0x9f
-	.8byte	.LVL274
-	.8byte	.LFE293
-	.2byte	0x1
-	.byte	0x57
-	.8byte	0
-	.8byte	0
-.LLST90:
-	.8byte	.LVL270
-	.8byte	.LVL271-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST91:
-	.8byte	.LVL262
-	.8byte	.LVL264
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL264
-	.8byte	.LVL268
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL269
-	.8byte	.LVL272
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL273
-	.8byte	.LFE293
-	.2byte	0x1
-	.byte	0x55
-	.8byte	0
-	.8byte	0
-.LLST250:
-	.8byte	.LVL958
-	.8byte	.LVL959
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL960
-	.8byte	.LFE291
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST251:
-	.8byte	.LVL963
-	.8byte	.LVL965
-	.2byte	0x1
-	.byte	0x67
-	.8byte	0
-	.8byte	0
-.LLST282:
-	.8byte	.LVL1148
-	.8byte	.LVL1149
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1151
-	.8byte	.LVL1152
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL1160
-	.8byte	.LVL1163
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1164
-	.8byte	.LVL1165
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1165
-	.8byte	.LVL1170
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL1171
-	.8byte	.LFE290
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST283:
-	.8byte	.LVL1146
-	.8byte	.LVL1147
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL1155
-	.8byte	.LVL1160
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST284:
-	.8byte	.LVL1151
-	.8byte	.LVL1152
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1157
-	.8byte	.LVL1158
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1165
-	.8byte	.LVL1168
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1169
-	.8byte	.LFE290
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST285:
-	.8byte	.LVL1144
-	.8byte	.LVL1148
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1148
-	.8byte	.LVL1153
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL1153
-	.8byte	.LVL1154
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.8byte	.LVL1155
-	.8byte	.LVL1160
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1160
-	.8byte	.LVL1166
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL1167
-	.8byte	.LFE290
-	.2byte	0x1
-	.byte	0x67
-	.8byte	0
-	.8byte	0
-.LLST286:
-	.8byte	.LVL1150
-	.8byte	.LVL1152
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL1165
-	.8byte	.LFE290
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	0
-	.8byte	0
-.LLST393:
-	.8byte	.LVL1715
-	.8byte	.LVL1716
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1722
-	.8byte	.LVL1727
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1728
-	.8byte	.LFE289
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST394:
-	.8byte	.LVL1713
-	.8byte	.LVL1714
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1717
-	.8byte	.LVL1722
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST395:
-	.8byte	.LVL1719
-	.8byte	.LVL1720
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST355:
-	.8byte	.LVL1512
-	.8byte	.LVL1513
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1513
-	.8byte	.LVL1519
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1519
-	.8byte	.LVL1520
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL1520
-	.8byte	.LFE288
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST356:
-	.8byte	.LVL1514
-	.8byte	.LVL1519
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL1520
-	.8byte	.LFE288
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST357:
-	.8byte	.LVL1512
-	.8byte	.LVL1515
-	.2byte	0x2
-	.byte	0x36
-	.byte	0x9f
-	.8byte	.LVL1515
-	.8byte	.LVL1516
-	.2byte	0x3
-	.byte	0x86
-	.sleb128 -2
-	.byte	0x9f
-	.8byte	.LVL1516
-	.8byte	.LVL1517
-	.2byte	0x3
-	.byte	0x86
-	.sleb128 -1
-	.byte	0x9f
-	.8byte	.LVL1517
-	.8byte	.LVL1518
-	.2byte	0x3
-	.byte	0x86
-	.sleb128 -2
-	.byte	0x9f
-	.8byte	.LVL1520
-	.8byte	.LFE288
-	.2byte	0x3
-	.byte	0x86
-	.sleb128 -2
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST276:
-	.8byte	.LVL1120
-	.8byte	.LVL1121
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1121
-	.8byte	.LVL1132
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1133
-	.8byte	.LVL1142
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST277:
-	.8byte	.LVL1122
-	.8byte	.LVL1126
-	.2byte	0x1
-	.byte	0x56
-	.8byte	.LVL1126
-	.8byte	.LVL1127
-	.2byte	0x3
-	.byte	0x76
-	.sleb128 1
-	.byte	0x9f
-	.8byte	.LVL1127
-	.8byte	.LVL1131-1
-	.2byte	0x1
-	.byte	0x56
-	.8byte	.LVL1134
-	.8byte	.LVL1139-1
-	.2byte	0x1
-	.byte	0x56
-	.8byte	0
-	.8byte	0
-.LLST278:
-	.8byte	.LVL1123
-	.8byte	.LVL1124-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST279:
-	.8byte	.LVL1122
-	.8byte	.LVL1125
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL1126
-	.8byte	.LVL1131-1
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL1134
-	.8byte	.LVL1135
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL1136
-	.8byte	.LVL1139-1
-	.2byte	0x1
-	.byte	0x55
-	.8byte	0
-	.8byte	0
-.LLST280:
-	.8byte	.LVL1120
-	.8byte	.LVL1121
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1121
-	.8byte	.LVL1137
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL1138
-	.8byte	.LVL1140
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL1140
-	.8byte	.LVL1141-1
-	.2byte	0x9
-	.byte	0x3
-	.8byte	g_num_data_superblocks
-	.8byte	0
-	.8byte	0
-.LLST281:
-	.8byte	.LVL1120
-	.8byte	.LVL1121
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1121
-	.8byte	.LVL1129
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL1130
-	.8byte	.LVL1143
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST85:
-	.8byte	.LVL251
-	.8byte	.LVL252
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL252
-	.8byte	.LVL255
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL255
-	.8byte	.LVL256
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL256
-	.8byte	.LFE284
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST86:
-	.8byte	.LVL254
-	.8byte	.LVL260
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL260
-	.8byte	.LVL261
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 1
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST87:
-	.8byte	.LVL258
-	.8byte	.LVL259-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL259-1
-	.8byte	.LFE284
-	.2byte	0x1
-	.byte	0x54
-	.8byte	0
-	.8byte	0
-.LLST330:
-	.8byte	.LVL1371
-	.8byte	.LVL1372
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1372
-	.8byte	.LVL1376
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1376
-	.8byte	.LVL1377
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL1377
-	.8byte	.LFE281
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST331:
-	.8byte	.LVL1373
-	.8byte	.LVL1375
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL1377
-	.8byte	.LFE281
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	0
-	.8byte	0
-.LLST332:
-	.8byte	.LVL1373
-	.8byte	.LVL1374
-	.2byte	0x8
-	.byte	0x83
-	.sleb128 6
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.8byte	.LVL1374
-	.8byte	.LVL1375
-	.2byte	0x9
-	.byte	0x8f
-	.sleb128 324
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.8byte	.LVL1377
-	.8byte	.LVL1380-1
-	.2byte	0x8
-	.byte	0x83
-	.sleb128 6
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.8byte	.LVL1380-1
-	.8byte	.LVL1394
-	.2byte	0x9
-	.byte	0x8f
-	.sleb128 324
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.8byte	.LVL1394
-	.8byte	.LVL1399
-	.2byte	0x8
-	.byte	0x83
-	.sleb128 6
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.8byte	.LVL1399
-	.8byte	.LFE281
-	.2byte	0x9
-	.byte	0x8f
-	.sleb128 324
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST333:
-	.8byte	.LVL1377
-	.8byte	.LVL1379
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1379
-	.8byte	.LVL1382
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL1394
-	.8byte	.LVL1395
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL1396
-	.8byte	.LVL1403
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL1438
-	.8byte	.LVL1439
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1444
-	.8byte	.LVL1445
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1445
-	.8byte	.LVL1449
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1508
-	.8byte	.LVL1509
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1510
-	.8byte	.LVL1511
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST334:
-	.8byte	.LVL1437
-	.8byte	.LVL1438
-	.2byte	0x9
-	.byte	0x8f
-	.sleb128 324
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.8byte	.LVL1462
-	.8byte	.LVL1464
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1511
-	.8byte	.LFE281
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST335:
-	.8byte	.LVL1421
-	.8byte	.LVL1422
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL1423
-	.8byte	.LVL1424
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL1424
-	.8byte	.LVL1425
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL1425
-	.8byte	.LVL1434
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL1435
-	.8byte	.LVL1436
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL1437
-	.8byte	.LVL1438
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL1438
-	.8byte	.LVL1442
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL1443
-	.8byte	.LVL1449
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL1449
-	.8byte	.LVL1454
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL1454
-	.8byte	.LFE281
-	.2byte	0x1
-	.byte	0x67
-	.8byte	0
-	.8byte	0
-.LLST336:
-	.8byte	.LVL1391
-	.8byte	.LVL1394
-	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL1418
-	.8byte	.LFE281
-	.2byte	0x1
-	.byte	0x6b
-	.8byte	0
-	.8byte	0
-.LLST337:
-	.8byte	.LVL1389
-	.8byte	.LVL1394
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL1413
-	.8byte	.LVL1414
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL1418
-	.8byte	.LFE281
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST338:
-	.8byte	.LVL1378
-	.8byte	.LVL1380-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1394
-	.8byte	.LVL1397
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1398
-	.8byte	.LVL1399
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1404
-	.8byte	.LVL1405
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL1405
-	.8byte	.LVL1408
-	.2byte	0x2
-	.byte	0x74
-	.sleb128 0
-	.8byte	.LVL1408
-	.8byte	.LVL1409
-	.2byte	0x2
-	.byte	0x74
-	.sleb128 -2
-	.8byte	.LVL1426
-	.8byte	.LVL1429
-	.2byte	0x1
-	.byte	0x56
-	.8byte	.LVL1429
-	.8byte	.LVL1430
-	.2byte	0x2
-	.byte	0x72
-	.sleb128 0
-	.8byte	.LVL1446
-	.8byte	.LVL1447
-	.2byte	0x6
-	.byte	0x8f
-	.sleb128 328
-	.byte	0x6
-	.byte	0x32
-	.byte	0x1c
-	.8byte	.LVL1447
-	.8byte	.LVL1448
-	.2byte	0x2
-	.byte	0x74
-	.sleb128 -4
-	.8byte	.LVL1455
-	.8byte	.LVL1458
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL1458
-	.8byte	.LVL1459
-	.2byte	0x2
-	.byte	0x72
-	.sleb128 0
-	.8byte	.LVL1459
-	.8byte	.LVL1460
-	.2byte	0x2
-	.byte	0x72
-	.sleb128 -2
-	.8byte	.LVL1508
-	.8byte	.LVL1511
-	.2byte	0x2
-	.byte	0x74
-	.sleb128 -4
-	.8byte	0
-	.8byte	0
-.LLST339:
-	.8byte	.LVL1381
-	.8byte	.LVL1383
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1383
-	.8byte	.LVL1392
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL1399
-	.8byte	.LVL1400
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1400
-	.8byte	.LVL1423
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL1424
-	.8byte	.LVL1425
-	.2byte	0x1
-	.byte	0x67
-	.8byte	0
-	.8byte	0
-.LLST341:
-	.8byte	.LVL1384
-	.8byte	.LVL1388
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL1403
-	.8byte	.LVL1406
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL1407
-	.8byte	.LVL1413
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL1414
-	.8byte	.LVL1418
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL1425
-	.8byte	.LVL1427
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL1428
-	.8byte	.LVL1431
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL1438
-	.8byte	.LVL1439
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1439
-	.8byte	.LVL1441
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL1454
-	.8byte	.LVL1456
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL1457
-	.8byte	.LVL1460
-	.2byte	0x1
-	.byte	0x68
-	.8byte	0
-	.8byte	0
-.LLST342:
-	.8byte	.LVL1386
-	.8byte	.LVL1387
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1387
-	.8byte	.LVL1389
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL1409
-	.8byte	.LVL1412
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL1414
-	.8byte	.LVL1416
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL1417
-	.8byte	.LVL1418
-	.2byte	0x1
-	.byte	0x53
-	.8byte	0
-	.8byte	0
-.LLST343:
-	.8byte	.LVL1432
-	.8byte	.LVL1433
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1440
-	.8byte	.LVL1441
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST344:
-	.8byte	.LVL1463
-	.8byte	.LVL1467
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL1469
-	.8byte	.LVL1479
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL1479
-	.8byte	.LVL1482
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL1482
-	.8byte	.LVL1504
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL1504
-	.8byte	.LVL1506
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL1506
-	.8byte	.LVL1508
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST345:
-	.8byte	.LVL1463
-	.8byte	.LVL1467
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL1469
-	.8byte	.LVL1477
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL1482
-	.8byte	.LVL1497
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL1497
-	.8byte	.LVL1499
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1506
-	.8byte	.LVL1508
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST346:
-	.8byte	.LVL1386
-	.8byte	.LVL1394
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL1409
-	.8byte	.LFE281
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST347:
-	.8byte	.LVL1371
-	.8byte	.LVL1375
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL1377
-	.8byte	.LVL1387
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL1387
-	.8byte	.LVL1392
-	.2byte	0x1
-	.byte	0x56
-	.8byte	.LVL1394
-	.8byte	.LVL1409
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL1409
-	.8byte	.LVL1420
-	.2byte	0x1
-	.byte	0x56
-	.8byte	.LVL1420
-	.8byte	.LVL1436
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL1449
-	.8byte	.LVL1454
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	0
-	.8byte	0
-.LLST348:
-	.8byte	.LVL1410
-	.8byte	.LVL1414
-	.2byte	0x1
-	.byte	0x58
-	.8byte	.LVL1450
-	.8byte	.LVL1451
-	.2byte	0x1
-	.byte	0x56
-	.8byte	.LVL1451
-	.8byte	.LVL1452
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 0
-	.8byte	.LVL1452
-	.8byte	.LVL1453
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 -32
-	.8byte	.LVL1465
-	.8byte	.LVL1466
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL1469
-	.8byte	.LVL1472-1
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL1474
-	.8byte	.LVL1475-1
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL1475-1
-	.8byte	.LVL1476
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 296
-	.8byte	.LVL1484
-	.8byte	.LVL1485
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 296
-	.8byte	.LVL1488
-	.8byte	.LVL1489-1
-	.2byte	0x2
-	.byte	0x74
-	.sleb128 16
-	.8byte	.LVL1489-1
-	.8byte	.LVL1490
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 256
-	.8byte	.LVL1500
-	.8byte	.LVL1501-1
-	.2byte	0x1
-	.byte	0x54
-	.8byte	.LVL1501-1
-	.8byte	.LVL1504
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 296
-	.8byte	0
-	.8byte	0
-.LLST349:
-	.8byte	.LVL1419
-	.8byte	.LVL1436
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL1449
-	.8byte	.LVL1454
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST350:
-	.8byte	.LVL1419
-	.8byte	.LVL1423
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL1424
-	.8byte	.LVL1425
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST351:
-	.8byte	.LVL1475
-	.8byte	.LVL1476
-	.2byte	0x6
-	.byte	0x8f
-	.sleb128 296
-	.byte	0x6
-	.byte	0x23
-	.uleb128 0x4
-	.8byte	.LVL1484
-	.8byte	.LVL1485
-	.2byte	0x6
-	.byte	0x8f
-	.sleb128 296
-	.byte	0x6
-	.byte	0x23
-	.uleb128 0x4
-	.8byte	0
-	.8byte	0
-.LLST352:
-	.8byte	.LVL1491
-	.8byte	.LVL1494
-	.2byte	0x1
-	.byte	0x53
-	.8byte	0
-	.8byte	0
-.LLST353:
-	.8byte	.LVL1498
-	.8byte	.LVL1504
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST354:
-	.8byte	.LVL1501
-	.8byte	.LVL1502-1
-	.2byte	0x6
-	.byte	0x8f
-	.sleb128 296
-	.byte	0x6
-	.byte	0x23
-	.uleb128 0x4
-	.8byte	0
-	.8byte	0
-.LLST244:
-	.8byte	.LVL938
-	.8byte	.LVL939
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL939
-	.8byte	.LVL951
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL951
-	.8byte	.LVL952
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL952
-	.8byte	.LFE280
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST245:
-	.8byte	.LVL938
-	.8byte	.LVL940-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	0
-	.8byte	0
-.LLST246:
-	.8byte	.LVL941
-	.8byte	.LVL942
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL942
-	.8byte	.LVL946-1
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL952
-	.8byte	.LVL957
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL957
-	.8byte	.LFE280
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST247:
-	.8byte	.LVL944
-	.8byte	.LVL945
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL952
-	.8byte	.LVL955
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL956
-	.8byte	.LVL957
-	.2byte	0x1
-	.byte	0x51
-	.8byte	0
-	.8byte	0
-.LLST248:
-	.8byte	.LVL944
-	.8byte	.LVL949
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL952
-	.8byte	.LVL953
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL954
-	.8byte	.LVL957
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST249:
-	.8byte	.LVL943
-	.8byte	.LVL946-1
-	.2byte	0x1
-	.byte	0x54
-	.8byte	.LVL952
-	.8byte	.LVL957
-	.2byte	0x1
-	.byte	0x54
-	.8byte	0
-	.8byte	0
-.LLST80:
-	.8byte	.LVL236
-	.8byte	.LVL237
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL237
-	.8byte	.LFE279
-	.2byte	0x1
-	.byte	0x56
-	.8byte	0
-	.8byte	0
-.LLST81:
-	.8byte	.LVL236
-	.8byte	.LVL239
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL239
-	.8byte	.LFE279
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST82:
-	.8byte	.LVL238
-	.8byte	.LVL240
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL241
-	.8byte	.LVL242
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL243
-	.8byte	.LVL244
-	.2byte	0x1
-	.byte	0x52
-	.8byte	0
-	.8byte	0
-.LLST275:
-	.8byte	.LVL1108
-	.8byte	.LVL1109
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST264:
-	.8byte	.LVL1059
-	.8byte	.LVL1062
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1062
-	.8byte	.LVL1080
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1080
-	.8byte	.LVL1086
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL1086
-	.8byte	.LFE275
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST265:
-	.8byte	.LVL1068
-	.8byte	.LVL1069
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1069
-	.8byte	.LVL1084
-	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL1086
-	.8byte	.LFE275
-	.2byte	0x1
-	.byte	0x6b
-	.8byte	0
-	.8byte	0
-.LLST266:
-	.8byte	.LVL1073
-	.8byte	.LVL1074
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1074
-	.8byte	.LVL1075
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL1086
-	.8byte	.LVL1088
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL1089
-	.8byte	.LVL1090
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL1092
-	.8byte	.LVL1093-1
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL1094
-	.8byte	.LVL1095
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL1096
-	.8byte	.LVL1097
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1099
-	.8byte	.LVL1104
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1105
-	.8byte	.LFE275
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST267:
-	.8byte	.LVL1072
-	.8byte	.LVL1075
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL1086
-	.8byte	.LVL1090
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	0
-	.8byte	0
-.LLST268:
-	.8byte	.LVL1100
-	.8byte	.LVL1101
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1101
-	.8byte	.LVL1102
-	.2byte	0x7
-	.byte	0x72
-	.sleb128 -1
-	.byte	0x32
-	.byte	0x24
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x22
-	.8byte	.LVL1102
-	.8byte	.LVL1103
-	.2byte	0xf
-	.byte	0x70
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x8
-	.byte	0x20
-	.byte	0x26
-	.byte	0x32
-	.byte	0x24
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x22
-	.8byte	0
-	.8byte	0
-.LLST269:
-	.8byte	.LVL1060
-	.8byte	.LVL1081
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL1086
-	.8byte	.LFE275
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST270:
-	.8byte	.LVL1061
-	.8byte	.LVL1070
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL1090
-	.8byte	.LFE275
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST271:
-	.8byte	.LVL1063
-	.8byte	.LVL1064
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1064
-	.8byte	.LVL1066-1
-	.2byte	0x2
-	.byte	0x83
-	.sleb128 24
-	.8byte	.LVL1066-1
-	.8byte	.LVL1085
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 256
-	.8byte	.LVL1085
-	.8byte	.LVL1086
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 112
-	.8byte	.LVL1086
-	.8byte	.LFE275
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 256
-	.8byte	0
-	.8byte	0
-.LLST272:
-	.8byte	.LVL1063
-	.8byte	.LVL1082
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL1086
-	.8byte	.LFE275
-	.2byte	0x1
-	.byte	0x67
-	.8byte	0
-	.8byte	0
-.LLST273:
-	.8byte	.LVL1065
-	.8byte	.LVL1085
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 268
-	.8byte	.LVL1085
-	.8byte	.LVL1086
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 124
-	.8byte	.LVL1086
-	.8byte	.LFE275
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 268
-	.8byte	0
-	.8byte	0
-.LLST274:
-	.8byte	.LVL1067
-	.8byte	.LVL1083
-	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL1086
-	.8byte	.LFE275
-	.2byte	0x1
-	.byte	0x69
-	.8byte	0
-	.8byte	0
-.LLST462:
-	.8byte	.LVL2057
-	.8byte	.LVL2060
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL2069
-	.8byte	.LVL2071
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL2072
-	.8byte	.LFE274
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST79:
-	.8byte	.LVL234
-	.8byte	.LVL235
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL235
-	.8byte	.LFE273
-	.2byte	0x1
-	.byte	0x51
-	.8byte	0
-	.8byte	0
-.LLST257:
-	.8byte	.LVL994
-	.8byte	.LVL1001
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL1001
-	.8byte	.LVL1002
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 1
-	.byte	0x9f
-	.8byte	.LVL1002
-	.8byte	.LVL1003
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL1005
-	.8byte	.LVL1006-1
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL1006
-	.8byte	.LVL1008
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST258:
-	.8byte	.LVL993
-	.8byte	.LVL1042
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 332
-	.8byte	.LVL1042
-	.8byte	.LVL1043
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 156
-	.8byte	.LVL1043
-	.8byte	.LFE270
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 332
-	.8byte	0
-	.8byte	0
-.LLST259:
-	.8byte	.LVL996
-	.8byte	.LVL997-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL997-1
-	.8byte	.LVL1000
-	.2byte	0x1
-	.byte	0x54
-	.8byte	.LVL1009
-	.8byte	.LVL1040
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	0
-	.8byte	0
-.LLST260:
-	.8byte	.LVL994
-	.8byte	.LVL998
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL999
-	.8byte	.LVL1003
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL1005
-	.8byte	.LVL1007
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST261:
-	.8byte	.LVL1019
-	.8byte	.LVL1020
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1021
-	.8byte	.LVL1022
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1023
-	.8byte	.LVL1024
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1030
-	.8byte	.LVL1031
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL1032
-	.8byte	.LVL1033
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL1034
-	.8byte	.LVL1035
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL1044
-	.8byte	.LVL1049
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1050
-	.8byte	.LVL1051
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1052
-	.8byte	.LVL1053
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1056
-	.8byte	.LVL1057
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1058
-	.8byte	.LFE270
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST262:
-	.8byte	.LVL1010
-	.8byte	.LVL1012
-	.2byte	0x8
-	.byte	0x40
-	.byte	0x8f
-	.sleb128 328
-	.byte	0x94
-	.byte	0x2
-	.byte	0x1c
-	.byte	0x9f
-	.8byte	.LVL1014
-	.8byte	.LVL1015
-	.2byte	0x8
-	.byte	0x40
-	.byte	0x8f
-	.sleb128 328
-	.byte	0x94
-	.byte	0x2
-	.byte	0x1c
-	.byte	0x9f
-	.8byte	.LVL1015
-	.8byte	.LVL1016
-	.2byte	0x5
-	.byte	0x41
-	.byte	0x75
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.8byte	.LVL1018
-	.8byte	.LVL1025
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1026
-	.8byte	.LVL1027
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1029
-	.8byte	.LVL1036
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1037
-	.8byte	.LVL1038
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1045
-	.8byte	.LVL1046
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1047
-	.8byte	.LVL1048
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1053
-	.8byte	.LVL1054
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1055
-	.8byte	.LVL1056
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST263:
-	.8byte	.LVL1009
-	.8byte	.LVL1040
-	.2byte	0x1
-	.byte	0x6b
-	.8byte	0
-	.8byte	0
-.LLST384:
-	.8byte	.LVL1665
-	.8byte	.LVL1672
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL1672
-	.8byte	.LVL1684
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	0
-	.8byte	0
-.LLST385:
-	.8byte	.LVL1666
-	.8byte	.LVL1683
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST386:
-	.8byte	.LVL1665
-	.8byte	.LVL1672
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1672
-	.8byte	.LVL1678
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL1679
-	.8byte	.LVL1682
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST253:
-	.8byte	.LVL977
-	.8byte	.LVL979
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL979
-	.8byte	.LVL983
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL983
-	.8byte	.LVL984-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL984-1
-	.8byte	.LVL984
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL984
-	.8byte	.LVL987
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL987
-	.8byte	.LFE267
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST254:
-	.8byte	.LVL980
-	.8byte	.LVL981
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL981
-	.8byte	.LVL982-1
-	.2byte	0x9
-	.byte	0x3
-	.8byte	req_sys+4
-	.8byte	.LVL984
-	.8byte	.LVL985
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL985
-	.8byte	.LVL986-1
-	.2byte	0x9
-	.byte	0x3
-	.8byte	req_sys+4
-	.8byte	0
-	.8byte	0
-.LLST255:
-	.8byte	.LVL977
-	.8byte	.LVL978
-	.2byte	0x7
-	.byte	0x70
-	.sleb128 6
-	.byte	0x94
-	.byte	0x2
-	.byte	0x31
-	.byte	0x1c
-	.byte	0x9f
-	.8byte	.LVL987
-	.8byte	.LFE267
-	.2byte	0x7
-	.byte	0x70
-	.sleb128 6
-	.byte	0x94
-	.byte	0x2
-	.byte	0x31
-	.byte	0x1c
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST256:
-	.8byte	.LVL977
-	.8byte	.LVL978
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 40
-	.8byte	.LVL987
-	.8byte	.LFE267
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 40
-	.8byte	0
-	.8byte	0
-.LLST374:
-	.8byte	.LVL1624
-	.8byte	.LVL1627
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1627
-	.8byte	.LVL1631
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL1631
-	.8byte	.LVL1632
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1632
-	.8byte	.LFE265
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST375:
-	.8byte	.LVL1624
-	.8byte	.LVL1625
-	.2byte	0x3
-	.byte	0x8
-	.byte	0x20
-	.byte	0x9f
-	.8byte	.LVL1625
-	.8byte	.LVL1626
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.8byte	.LVL1626
-	.8byte	.LVL1628
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1631
-	.8byte	.LVL1632
-	.2byte	0x3
-	.byte	0x8
-	.byte	0x20
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST376:
-	.8byte	.LVL1633
-	.8byte	.LVL1636
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1636
-	.8byte	.LVL1640
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL1641
-	.8byte	.LFE264
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST377:
-	.8byte	.LVL1633
-	.8byte	.LVL1634
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1634
-	.8byte	.LVL1639
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL1641
-	.8byte	.LFE264
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST378:
-	.8byte	.LVL1633
-	.8byte	.LVL1637
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL1637
-	.8byte	.LVL1638
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL1641
-	.8byte	.LVL1659
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL1659
-	.8byte	.LFE264
-	.2byte	0x1
-	.byte	0x52
-	.8byte	0
-	.8byte	0
-.LLST379:
-	.8byte	.LVL1644
-	.8byte	.LVL1659
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST380:
-	.8byte	.LVL1643
-	.8byte	.LVL1646
-	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL1646
-	.8byte	.LVL1649-1
-	.2byte	0x28
-	.byte	0x85
-	.sleb128 0
-	.byte	0x85
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x30
-	.byte	0x3
-	.8byte	c_ftl_nand_sec_pre_page
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0xf7
-	.uleb128 0x30
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0x3
-	.8byte	c_ftl_nand_sec_pre_page
-	.byte	0x94
-	.byte	0x2
-	.byte	0x1e
-	.byte	0x1c
-	.byte	0x9f
-	.8byte	.LVL1656
-	.8byte	.LVL1659
-	.2byte	0x1
-	.byte	0x6b
-	.8byte	0
-	.8byte	0
-.LLST381:
-	.8byte	.LVL1642
-	.8byte	.LVL1647
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1647
-	.8byte	.LVL1648
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 212
-	.8byte	.LVL1648
-	.8byte	.LVL1649-1
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 4
-	.8byte	.LVL1656
-	.8byte	.LVL1657
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1657
-	.8byte	.LVL1658-1
-	.2byte	0x16
-	.byte	0x8a
-	.sleb128 0
-	.byte	0x32
-	.byte	0x24
-	.byte	0x10
-	.uleb128 0x3fffffffc
-	.byte	0x1a
-	.byte	0x3
-	.8byte	p_vendor_region_ppn_table
-	.byte	0x6
-	.byte	0x22
-	.8byte	0
-	.8byte	0
-.LLST382:
-	.8byte	.LVL1633
-	.8byte	.LVL1637
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1637
-	.8byte	.LVL1638
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL1641
-	.8byte	.LVL1659
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL1659
-	.8byte	.LFE264
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST383:
-	.8byte	.LVL1635
-	.8byte	.LVL1636
-	.2byte	0x13
-	.byte	0x70
-	.sleb128 0
-	.byte	0x3
-	.8byte	c_ftl_nand_sec_pre_page_shift
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x25
-	.byte	0x9f
-	.8byte	.LVL1636
-	.8byte	.LVL1637
-	.2byte	0x13
-	.byte	0x85
-	.sleb128 0
-	.byte	0x3
-	.8byte	c_ftl_nand_sec_pre_page_shift
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x25
-	.byte	0x9f
-	.8byte	.LVL1637
-	.8byte	.LVL1638
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL1641
-	.8byte	.LVL1659
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL1659
-	.8byte	.LFE264
-	.2byte	0x13
-	.byte	0x85
-	.sleb128 0
-	.byte	0x3
-	.8byte	c_ftl_nand_sec_pre_page_shift
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x25
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST366:
-	.8byte	.LVL1595
-	.8byte	.LVL1598
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1598
-	.8byte	.LVL1602
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL1603
-	.8byte	.LVL1614
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL1617
-	.8byte	.LFE263
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	0
-	.8byte	0
-.LLST367:
-	.8byte	.LVL1595
-	.8byte	.LVL1596
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1596
-	.8byte	.LVL1601
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL1603
-	.8byte	.LVL1613
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL1617
-	.8byte	.LFE263
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST368:
-	.8byte	.LVL1595
-	.8byte	.LVL1599
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL1599
-	.8byte	.LVL1600
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL1603
-	.8byte	.LVL1622
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL1622
-	.8byte	.LFE263
-	.2byte	0x1
-	.byte	0x52
-	.8byte	0
-	.8byte	0
-.LLST369:
-	.8byte	.LVL1606
-	.8byte	.LVL1622
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST370:
-	.8byte	.LVL1605
-	.8byte	.LVL1611
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL1619
-	.8byte	.LVL1622
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST371:
-	.8byte	.LVL1604
-	.8byte	.LVL1608
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL1608
-	.8byte	.LVL1609
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 212
-	.8byte	.LVL1609
-	.8byte	.LVL1610-1
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 4
-	.8byte	.LVL1619
-	.8byte	.LVL1620
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL1620
-	.8byte	.LVL1621-1
-	.2byte	0x16
-	.byte	0x85
-	.sleb128 0
-	.byte	0x32
-	.byte	0x24
-	.byte	0x10
-	.uleb128 0x3fffffffc
-	.byte	0x1a
-	.byte	0x3
-	.8byte	p_vendor_region_ppn_table
-	.byte	0x6
-	.byte	0x22
-	.8byte	0
-	.8byte	0
-.LLST372:
-	.8byte	.LVL1595
-	.8byte	.LVL1599
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1599
-	.8byte	.LVL1600
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL1603
-	.8byte	.LVL1622
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL1622
-	.8byte	.LFE263
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST373:
-	.8byte	.LVL1597
-	.8byte	.LVL1598
-	.2byte	0x13
-	.byte	0x70
-	.sleb128 0
-	.byte	0x3
-	.8byte	c_ftl_nand_sec_pre_page_shift
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x25
-	.byte	0x9f
-	.8byte	.LVL1598
-	.8byte	.LVL1599
-	.2byte	0x13
-	.byte	0x8c
-	.sleb128 0
-	.byte	0x3
-	.8byte	c_ftl_nand_sec_pre_page_shift
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x25
-	.byte	0x9f
-	.8byte	.LVL1599
-	.8byte	.LVL1600
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL1603
-	.8byte	.LVL1615
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL1615
-	.8byte	.LVL1616-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1616-1
-	.8byte	.LVL1617
-	.2byte	0x3
-	.byte	0x85
-	.sleb128 -1
-	.byte	0x9f
-	.8byte	.LVL1617
-	.8byte	.LVL1622
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL1622
-	.8byte	.LFE263
-	.2byte	0x13
-	.byte	0x8c
-	.sleb128 0
-	.byte	0x3
-	.8byte	c_ftl_nand_sec_pre_page_shift
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x25
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST238:
-	.8byte	.LVL918
-	.8byte	.LVL922
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL922
-	.8byte	.LFE262
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST239:
-	.8byte	.LVL918
-	.8byte	.LVL919
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL919
-	.8byte	.LVL936
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL936
-	.8byte	.LVL937
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	.LVL937
-	.8byte	.LFE262
-	.2byte	0x1
-	.byte	0x67
-	.8byte	0
-	.8byte	0
-.LLST240:
-	.8byte	.LVL918
-	.8byte	.LVL923
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL923
-	.8byte	.LVL936
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL936
-	.8byte	.LVL937
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.8byte	.LVL937
-	.8byte	.LFE262
-	.2byte	0x1
-	.byte	0x68
-	.8byte	0
-	.8byte	0
-.LLST241:
-	.8byte	.LVL924
-	.8byte	.LVL925
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL926
-	.8byte	.LVL928
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL928
-	.8byte	.LVL929-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL929-1
-	.8byte	.LVL931
-	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL931
-	.8byte	.LVL933
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL937
-	.8byte	.LFE262
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST242:
-	.8byte	.LVL920
-	.8byte	.LVL935
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL937
-	.8byte	.LFE262
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST243:
-	.8byte	.LVL921
-	.8byte	.LVL934
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL937
-	.8byte	.LFE262
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST329:
-	.8byte	.LVL1365
-	.8byte	.LVL1366
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1367
-	.8byte	.LVL1369
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1370
-	.8byte	.LFE261
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST73:
-	.8byte	.LVL203
-	.8byte	.LVL204
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL205
-	.8byte	.LVL206
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL206
-	.8byte	.LVL208
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL210
-	.8byte	.LVL211
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL213
-	.8byte	.LVL214
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL215
-	.8byte	.LVL218
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL219
-	.8byte	.LVL223
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL224
-	.8byte	.LFE260
-	.2byte	0x1
-	.byte	0x51
-	.8byte	0
-	.8byte	0
-.LLST74:
-	.8byte	.LVL207
-	.8byte	.LVL209
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL210
-	.8byte	.LVL213
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL215
-	.8byte	.LFE260
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST75:
-	.8byte	.LVL207
-	.8byte	.LVL210
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL210
-	.8byte	.LVL212-1
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL215
-	.8byte	.LVL216
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL217
-	.8byte	.LVL220
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL220
-	.8byte	.LVL221
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL222
-	.8byte	.LFE260
-	.2byte	0x1
-	.byte	0x53
-	.8byte	0
-	.8byte	0
-.LLST236:
-	.8byte	.LVL913
-	.8byte	.LVL914
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL914
-	.8byte	.LFE259
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST237:
-	.8byte	.LVL915
-	.8byte	.LVL916
-	.2byte	0x9
-	.byte	0x71
-	.sleb128 0
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x9f
-	.8byte	.LVL916
-	.8byte	.LVL917-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	0
-	.8byte	0
-.LLST223:
-	.8byte	.LVL873
-	.8byte	.LVL874
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL874
-	.8byte	.LVL888
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL888
-	.8byte	.LFE258
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST224:
-	.8byte	.LVL873
-	.8byte	.LVL874
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL874
-	.8byte	.LVL889
-	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL889
-	.8byte	.LFE258
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST225:
-	.8byte	.LVL873
-	.8byte	.LVL874
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL874
-	.8byte	.LVL887
-	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL887
-	.8byte	.LFE258
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST226:
-	.8byte	.LVL878
-	.8byte	.LVL879-1
-	.2byte	0x7
-	.byte	0x73
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x9f
-	.8byte	.LVL879-1
-	.8byte	.LVL890
-	.2byte	0xa
-	.byte	0x8f
-	.sleb128 204
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x9f
-	.8byte	.LVL890
-	.8byte	.LFE258
-	.2byte	0xa
-	.byte	0x8f
-	.sleb128 92
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST227:
-	.8byte	.LVL880
-	.8byte	.LVL881
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL881
-	.8byte	.LVL882-1
-	.2byte	0x9
-	.byte	0x3
-	.8byte	req_sys+16
-	.8byte	0
-	.8byte	0
-.LLST228:
-	.8byte	.LVL873
-	.8byte	.LVL874
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL874
-	.8byte	.LVL883
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL884
-	.8byte	.LVL886
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST217:
-	.8byte	.LVL851
-	.8byte	.LVL853
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL853
-	.8byte	.LVL857
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL857
-	.8byte	.LVL858
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL858
-	.8byte	.LFE257
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST218:
-	.8byte	.LVL862
-	.8byte	.LVL863
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL863
-	.8byte	.LVL865
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL868
-	.8byte	.LVL871
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL871
-	.8byte	.LVL872
-	.2byte	0x3
-	.byte	0x71
-	.sleb128 1
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST219:
-	.8byte	.LVL862
-	.8byte	.LVL863
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL863
-	.8byte	.LVL864
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL868
-	.8byte	.LVL869
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL870
-	.8byte	.LFE257
-	.2byte	0x1
-	.byte	0x52
-	.8byte	0
-	.8byte	0
-.LLST220:
-	.8byte	.LVL852
-	.8byte	.LVL856
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL858
-	.8byte	.LVL859
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL859
-	.8byte	.LVL862-1
-	.2byte	0x2
-	.byte	0x83
-	.sleb128 16
-	.8byte	0
-	.8byte	0
-.LLST221:
-	.8byte	.LVL852
-	.8byte	.LVL853
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 40
-	.8byte	.LVL853
-	.8byte	.LVL854-1
-	.2byte	0x2
-	.byte	0x83
-	.sleb128 40
-	.8byte	.LVL858
-	.8byte	.LVL862-1
-	.2byte	0x2
-	.byte	0x83
-	.sleb128 40
-	.8byte	0
-	.8byte	0
-.LLST222:
-	.8byte	.LVL860
-	.8byte	.LVL861
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL861
-	.8byte	.LVL862-1
-	.2byte	0x9
-	.byte	0x3
-	.8byte	p_sys_spare_buf
-	.8byte	0
-	.8byte	0
-.LLST229:
-	.8byte	.LVL891
-	.8byte	.LVL894-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL894-1
-	.8byte	.LVL902
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL902
-	.8byte	.LVL904
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL904
-	.8byte	.LFE256
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST230:
-	.8byte	.LVL896
-	.8byte	.LVL900
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL904
-	.8byte	.LFE256
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST231:
-	.8byte	.LVL894
-	.8byte	.LVL895
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST232:
-	.8byte	.LVL898
-	.8byte	.LVL900
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL904
-	.8byte	.LVL909
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL910
-	.8byte	.LFE256
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST233:
-	.8byte	.LVL892
-	.8byte	.LVL898
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST234:
-	.8byte	.LVL893
-	.8byte	.LVL903
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL904
-	.8byte	.LFE256
-	.2byte	0x1
-	.byte	0x68
-	.8byte	0
-	.8byte	0
-.LLST235:
-	.8byte	.LVL905
-	.8byte	.LVL908
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL911
-	.8byte	.LFE256
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	0
-	.8byte	0
-.LLST208:
-	.8byte	.LVL828
-	.8byte	.LVL830
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL830
-	.8byte	.LVL835
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL835
-	.8byte	.LVL839
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL839
-	.8byte	.LFE254
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST209:
-	.8byte	.LVL829
-	.8byte	.LVL837
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL839
-	.8byte	.LFE254
-	.2byte	0x1
-	.byte	0x67
-	.8byte	0
-	.8byte	0
-.LLST210:
-	.8byte	.LVL829
-	.8byte	.LVL834
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL839
-	.8byte	.LVL845
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST211:
-	.8byte	.LVL829
-	.8byte	.LVL836
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL839
-	.8byte	.LFE254
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST212:
-	.8byte	.LVL840
-	.8byte	.LVL845
-	.2byte	0x1
-	.byte	0x52
-	.8byte	0
-	.8byte	0
-.LLST213:
-	.8byte	.LVL831
-	.8byte	.LVL832
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL832
-	.8byte	.LVL834
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL839
-	.8byte	.LVL841
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL842
-	.8byte	.LVL845
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST214:
-	.8byte	.LVL833
-	.8byte	.LVL834
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL834
-	.8byte	.LVL835
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL840
-	.8byte	.LVL843
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL844
-	.8byte	.LVL845
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL845
-	.8byte	.LVL849
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL850
-	.8byte	.LFE254
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST215:
-	.8byte	.LVL833
-	.8byte	.LVL838
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL845
-	.8byte	.LFE254
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	0
-	.8byte	0
-.LLST216:
-	.8byte	.LVL833
-	.8byte	.LVL834
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL834
-	.8byte	.LVL838
-	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL845
-	.8byte	.LVL846
-	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL847
-	.8byte	.LFE254
-	.2byte	0x1
-	.byte	0x69
-	.8byte	0
-	.8byte	0
-.LLST205:
-	.8byte	.LVL812
-	.8byte	.LVL813
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL813
-	.8byte	.LVL819
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL819
-	.8byte	.LFE253
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST206:
-	.8byte	.LVL812
-	.8byte	.LVL814
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL814
-	.8byte	.LVL817
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL817
-	.8byte	.LFE253
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST207:
-	.8byte	.LVL816
-	.8byte	.LVL820
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL821
-	.8byte	.LFE253
-	.2byte	0x1
-	.byte	0x68
-	.8byte	0
-	.8byte	0
-.LLST61:
-	.8byte	.LVL169
-	.8byte	.LVL170
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL170
-	.8byte	.LVL173
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL175
-	.8byte	.LFE251
-	.2byte	0x1
-	.byte	0x52
-	.8byte	0
-	.8byte	0
-.LLST62:
-	.8byte	.LVL169
-	.8byte	.LVL177
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL177
-	.8byte	.LVL178
-	.2byte	0x8
-	.byte	0x71
-	.sleb128 0
-	.byte	0x73
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x36
-	.byte	0x1b
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST63:
-	.8byte	.LVL171
-	.8byte	.LVL172
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL174
-	.8byte	.LVL176
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL177
-	.8byte	.LVL178
-	.2byte	0x1
-	.byte	0x51
-	.8byte	0
-	.8byte	0
-.LLST60:
-	.8byte	.LVL167
-	.8byte	.LVL168-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL168-1
-	.8byte	.LFE250
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST56:
-	.8byte	.LVL154
-	.8byte	.LVL159-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL159-1
-	.8byte	.LVL161
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL161
-	.8byte	.LVL166
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL166
-	.8byte	.LFE249
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST57:
-	.8byte	.LVL154
-	.8byte	.LVL155
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL155
-	.8byte	.LVL158
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL161
-	.8byte	.LVL162
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL164
-	.8byte	.LFE249
-	.2byte	0x1
-	.byte	0x51
-	.8byte	0
-	.8byte	0
-.LLST58:
-	.8byte	.LVL154
-	.8byte	.LVL157
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL157
-	.8byte	.LVL160
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL160
-	.8byte	.LVL161
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL161
-	.8byte	.LFE249
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST59:
-	.8byte	.LVL155
-	.8byte	.LVL156
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL161
-	.8byte	.LVL165
-	.2byte	0x1
-	.byte	0x52
-	.8byte	0
-	.8byte	0
-.LLST52:
-	.8byte	.LVL140
-	.8byte	.LVL141
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL141
-	.8byte	.LVL146
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL146
-	.8byte	.LVL148
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL148
-	.8byte	.LFE248
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST53:
-	.8byte	.LVL140
-	.8byte	.LVL143
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL143
-	.8byte	.LFE248
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST54:
-	.8byte	.LVL142
-	.8byte	.LVL145
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL145
-	.8byte	.LVL146
-	.2byte	0x6
-	.byte	0x87
-	.sleb128 0
-	.byte	0x85
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.8byte	.LVL146
-	.8byte	.LVL147
-	.2byte	0xd
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x87
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.8byte	.LVL148
-	.8byte	.LFE248
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST55:
-	.8byte	.LVL149
-	.8byte	.LVL150
-	.2byte	0x14
-	.byte	0x71
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x3
-	.8byte	p_data_block_list_table
-	.byte	0x6
-	.byte	0x22
-	.byte	0x9f
-	.8byte	.LVL150
-	.8byte	.LVL151
-	.2byte	0x16
-	.byte	0x83
-	.sleb128 2
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x3
-	.8byte	p_data_block_list_table
-	.byte	0x6
-	.byte	0x22
-	.byte	0x9f
-	.8byte	.LVL152
-	.8byte	.LVL153
-	.2byte	0xc
-	.byte	0x70
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x72
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.8byte	.LVL153
-	.8byte	.LFE248
-	.2byte	0xe
-	.byte	0x83
-	.sleb128 2
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x72
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST45:
-	.8byte	.LVL120
-	.8byte	.LVL123
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL123
-	.8byte	.LFE247
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST46:
-	.8byte	.LVL121
-	.8byte	.LVL122
-	.2byte	0x1
-	.byte	0x54
-	.8byte	.LVL124
-	.8byte	.LVL134
-	.2byte	0x1
-	.byte	0x54
-	.8byte	.LVL134
-	.8byte	.LFE247
-	.2byte	0x6
-	.byte	0x73
-	.sleb128 0
-	.byte	0x78
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST47:
-	.8byte	.LVL125
-	.8byte	.LVL126
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL126
-	.8byte	.LFE247
-	.2byte	0x1
-	.byte	0x52
-	.8byte	0
-	.8byte	0
-.LLST48:
-	.8byte	.LVL126
-	.8byte	.LVL127
-	.2byte	0xb
-	.byte	0x71
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x31
-	.byte	0x24
-	.byte	0x7b
-	.sleb128 0
-	.byte	0x22
-	.8byte	.LVL128
-	.8byte	.LVL130
-	.2byte	0xb
-	.byte	0x71
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x31
-	.byte	0x24
-	.byte	0x7b
-	.sleb128 0
-	.byte	0x22
-	.8byte	.LVL131
-	.8byte	.LVL132
-	.2byte	0xb
-	.byte	0x71
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x31
-	.byte	0x24
-	.byte	0x7b
-	.sleb128 0
-	.byte	0x22
-	.8byte	0
-	.8byte	0
-.LLST49:
-	.8byte	.LVL126
-	.8byte	.LVL128
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL128
-	.8byte	.LVL131
-	.2byte	0x1
-	.byte	0x5a
-	.8byte	.LVL131
-	.8byte	.LVL133
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL133
-	.8byte	.LVL135
-	.2byte	0x5
-	.byte	0x73
-	.sleb128 0
-	.byte	0x78
-	.sleb128 0
-	.byte	0x22
-	.8byte	0
-	.8byte	0
-.LLST34:
-	.8byte	.LVL88
-	.8byte	.LVL91
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL91
-	.8byte	.LFE246
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST35:
-	.8byte	.LVL89
-	.8byte	.LVL90
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL92
-	.8byte	.LFE246
-	.2byte	0x1
-	.byte	0x55
-	.8byte	0
-	.8byte	0
-.LLST36:
-	.8byte	.LVL96
-	.8byte	.LVL98
-	.2byte	0x1
-	.byte	0x5c
-	.8byte	.LVL98
-	.8byte	.LFE246
-	.2byte	0x1
-	.byte	0x54
-	.8byte	0
-	.8byte	0
-.LLST37:
-	.8byte	.LVL93
-	.8byte	.LVL94
-	.2byte	0x1
-	.byte	0x57
-	.8byte	.LVL94
-	.8byte	.LVL98
-	.2byte	0x5
-	.byte	0x80
-	.sleb128 0
-	.byte	0x72
-	.sleb128 0
-	.byte	0x22
-	.8byte	.LVL98
-	.8byte	.LVL105
-	.2byte	0xd
-	.byte	0x70
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0xc
-	.4byte	0x1fffe
-	.byte	0x1a
-	.byte	0x80
-	.sleb128 0
-	.byte	0x22
-	.8byte	.LVL107
-	.8byte	.LVL109
-	.2byte	0xd
-	.byte	0x70
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0xc
-	.4byte	0x1fffe
-	.byte	0x1a
-	.byte	0x80
-	.sleb128 0
-	.byte	0x22
-	.8byte	.LVL111
-	.8byte	.LVL113
-	.2byte	0xd
-	.byte	0x70
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0xc
-	.4byte	0x1fffe
-	.byte	0x1a
-	.byte	0x80
-	.sleb128 0
-	.byte	0x22
-	.8byte	0
-	.8byte	0
-.LLST38:
-	.8byte	.LVL101
-	.8byte	.LVL102
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL102
-	.8byte	.LVL105
-	.2byte	0x5
-	.byte	0x80
-	.sleb128 0
-	.byte	0x8e
-	.sleb128 0
-	.byte	0x22
-	.8byte	.LVL107
-	.8byte	.LVL109
-	.2byte	0x5
-	.byte	0x80
-	.sleb128 0
-	.byte	0x8e
-	.sleb128 0
-	.byte	0x22
-	.8byte	.LVL111
-	.8byte	.LVL113
-	.2byte	0x5
-	.byte	0x80
-	.sleb128 0
-	.byte	0x8e
-	.sleb128 0
-	.byte	0x22
-	.8byte	0
-	.8byte	0
-.LLST39:
-	.8byte	.LVL93
-	.8byte	.LVL94
-	.2byte	0xe
-	.byte	0x77
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x71
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.8byte	.LVL94
-	.8byte	.LVL95
-	.2byte	0x13
-	.byte	0x80
-	.sleb128 0
-	.byte	0x72
-	.sleb128 0
-	.byte	0x22
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x71
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.8byte	.LVL95
-	.8byte	.LVL96
-	.2byte	0x15
-	.byte	0x80
-	.sleb128 0
-	.byte	0x72
-	.sleb128 0
-	.byte	0x22
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x75
-	.sleb128 4
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.8byte	.LVL96
-	.8byte	.LFE246
-	.2byte	0x1
-	.byte	0x57
-	.8byte	0
-	.8byte	0
-.LLST40:
-	.8byte	.LVL101
-	.8byte	.LVL102
-	.2byte	0xe
-	.byte	0x73
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x83
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.8byte	.LVL102
-	.8byte	.LVL103
-	.2byte	0x13
-	.byte	0x80
-	.sleb128 0
-	.byte	0x8e
-	.sleb128 0
-	.byte	0x22
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x83
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.8byte	.LVL103
-	.8byte	.LVL104
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL104
-	.8byte	.LVL105
-	.2byte	0x29
-	.byte	0x80
-	.sleb128 0
-	.byte	0x8e
-	.sleb128 0
-	.byte	0x22
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x74
-	.sleb128 4
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x7b
-	.sleb128 0
-	.byte	0x74
-	.sleb128 4
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x30
-	.byte	0x2e
-	.byte	0x28
-	.2byte	0x1
-	.byte	0x16
-	.byte	0x13
-	.byte	0x9f
-	.8byte	.LVL107
-	.8byte	.LVL108
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL108
-	.8byte	.LVL109
-	.2byte	0x29
-	.byte	0x80
-	.sleb128 0
-	.byte	0x8e
-	.sleb128 0
-	.byte	0x22
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x74
-	.sleb128 4
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x7b
-	.sleb128 0
-	.byte	0x74
-	.sleb128 4
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x30
-	.byte	0x2e
-	.byte	0x28
-	.2byte	0x1
-	.byte	0x16
-	.byte	0x13
-	.byte	0x9f
-	.8byte	.LVL111
-	.8byte	.LVL112
-	.2byte	0x29
-	.byte	0x80
-	.sleb128 0
-	.byte	0x8e
-	.sleb128 0
-	.byte	0x22
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x74
-	.sleb128 4
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x7b
-	.sleb128 0
-	.byte	0x74
-	.sleb128 4
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x30
-	.byte	0x2e
-	.byte	0x28
-	.2byte	0x1
-	.byte	0x16
-	.byte	0x13
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST41:
-	.8byte	.LVL97
-	.8byte	.LVL106
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL106
-	.8byte	.LVL107
-	.2byte	0x5
-	.byte	0x76
-	.sleb128 0
-	.byte	0x7d
-	.sleb128 0
-	.byte	0x22
-	.8byte	.LVL107
-	.8byte	.LVL110
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL111
-	.8byte	.LVL113
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL113
-	.8byte	.LVL115
-	.2byte	0x5
-	.byte	0x76
-	.sleb128 0
-	.byte	0x7d
-	.sleb128 0
-	.byte	0x22
-	.8byte	0
-	.8byte	0
-.LLST42:
-	.8byte	.LVL88
-	.8byte	.LVL98
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL98
-	.8byte	.LVL99
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL100
-	.8byte	.LVL110
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL111
-	.8byte	.LVL114
-	.2byte	0x1
-	.byte	0x52
-	.8byte	0
-	.8byte	0
-.LLST191:
-	.8byte	.LVL716
-	.8byte	.LVL717
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL718
-	.8byte	.LVL723
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL723
-	.8byte	.LVL725
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL727
-	.8byte	.LFE243
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST192:
-	.8byte	.LVL720
-	.8byte	.LVL721
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL721
-	.8byte	.LVL724
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL727
-	.8byte	.LFE243
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST31:
-	.8byte	.LVL81
-	.8byte	.LVL84
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL84
-	.8byte	.LFE242
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST32:
-	.8byte	.LVL81
-	.8byte	.LVL87
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL87
-	.8byte	.LFE242
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST33:
-	.8byte	.LVL82
-	.8byte	.LVL83
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL85
-	.8byte	.LFE242
-	.2byte	0x1
-	.byte	0x53
-	.8byte	0
-	.8byte	0
-.LLST30:
-	.8byte	.LVL76
-	.8byte	.LVL77
-	.2byte	0x1
-	.byte	0x54
-	.8byte	.LVL78
-	.8byte	.LVL79
-	.2byte	0x1
-	.byte	0x54
-	.8byte	.LVL80
-	.8byte	.LFE241
-	.2byte	0x1
-	.byte	0x54
-	.8byte	0
-	.8byte	0
-.LLST204:
-	.8byte	.LVL809
-	.8byte	.LVL810
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL810
-	.8byte	.LVL811-1
-	.2byte	0x9
-	.byte	0x3
-	.8byte	gSysFreeQueue
-	.8byte	.LVL811-1
-	.8byte	.LFE237
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST154:
-	.8byte	.LVL597
-	.8byte	.LVL601
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL601
-	.8byte	.LVL608
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL608
-	.8byte	.LVL610
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL610
-	.8byte	.LFE236
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST155:
-	.8byte	.LVL597
-	.8byte	.LVL598
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL598
-	.8byte	.LVL607
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL607
-	.8byte	.LVL608
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	.LVL608
-	.8byte	.LVL609
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL609
-	.8byte	.LFE236
-	.2byte	0x1
-	.byte	0x67
-	.8byte	0
-	.8byte	0
-.LLST156:
-	.8byte	.LVL602
-	.8byte	.LVL604
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL604
-	.8byte	.LVL605
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL610
-	.8byte	.LFE236
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST157:
-	.8byte	.LVL602
-	.8byte	.LVL606
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL610
-	.8byte	.LVL613
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL614
-	.8byte	.LFE236
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST158:
-	.8byte	.LVL611
-	.8byte	.LVL615
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL615
-	.8byte	.LFE236
-	.2byte	0x3
-	.byte	0x84
-	.sleb128 -1
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST159:
-	.8byte	.LVL599
-	.8byte	.LVL600
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST27:
-	.8byte	.LVL69
-	.8byte	.LVL71
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL71
-	.8byte	.LVL72
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL72
-	.8byte	.LVL74
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL74
-	.8byte	.LFE235
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST28:
-	.8byte	.LVL69
-	.8byte	.LVL70
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL70
-	.8byte	.LVL72
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	.LVL72
-	.8byte	.LVL73
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL73
-	.8byte	.LFE235
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST29:
-	.8byte	.LVL69
-	.8byte	.LVL72
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.8byte	.LVL72
-	.8byte	.LVL74
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL74
-	.8byte	.LFE235
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST25:
-	.8byte	.LVL65
-	.8byte	.LVL66
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL66
-	.8byte	.LFE234
-	.2byte	0x1
-	.byte	0x52
-	.8byte	0
-	.8byte	0
-.LLST26:
-	.8byte	.LVL67
-	.8byte	.LVL68
-	.2byte	0x15
-	.byte	0x70
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x29
-	.byte	0x3
-	.8byte	c_ftl_nand_planes_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0xf7
-	.uleb128 0x29
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0x9f
-	.8byte	.LVL68
-	.8byte	.LFE234
-	.2byte	0x3a
-	.byte	0x72
-	.sleb128 0
-	.byte	0x72
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x30
-	.byte	0x3
-	.8byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0xf7
-	.uleb128 0x30
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0x3
-	.8byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0x1e
-	.byte	0x1c
-	.byte	0xf7
-	.uleb128 0x29
-	.byte	0x3
-	.8byte	c_ftl_nand_planes_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0xf7
-	.uleb128 0x29
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST24:
-	.8byte	.LVL62
-	.8byte	.LVL63
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL63
-	.8byte	.LFE233
-	.2byte	0x1
-	.byte	0x53
-	.8byte	0
-	.8byte	0
-.LLST22:
-	.8byte	.LVL58
-	.8byte	.LVL60
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL60
-	.8byte	.LFE232
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST23:
-	.8byte	.LVL59
-	.8byte	.LVL60
-	.2byte	0x24
-	.byte	0x70
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x29
-	.byte	0x72
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x29
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0x3
-	.8byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0x1e
-	.byte	0x72
-	.sleb128 0
-	.byte	0x71
-	.sleb128 0
-	.byte	0x1e
-	.byte	0x70
-	.sleb128 0
-	.byte	0x72
-	.sleb128 0
-	.byte	0x1d
-	.byte	0x22
-	.byte	0x22
-	.byte	0x9f
-	.8byte	.LVL60
-	.8byte	.LVL61
-	.2byte	0x26
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0xf7
-	.uleb128 0x29
-	.byte	0x72
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x29
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0x3
-	.8byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0x1e
-	.byte	0x72
-	.sleb128 0
-	.byte	0x71
-	.sleb128 0
-	.byte	0x1e
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x72
-	.sleb128 0
-	.byte	0x1d
-	.byte	0x22
-	.byte	0x22
-	.byte	0x9f
-	.8byte	.LVL61
-	.8byte	.LFE232
-	.2byte	0x41
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0xf7
-	.uleb128 0x29
-	.byte	0x3
-	.8byte	c_ftl_nand_planes_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0xf7
-	.uleb128 0x29
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0x3
-	.8byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0x1e
-	.byte	0x3
-	.8byte	c_ftl_nand_planes_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0x1e
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x3
-	.8byte	c_ftl_nand_planes_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0x1d
-	.byte	0x22
-	.byte	0x22
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST362:
-	.8byte	.LVL1550
-	.8byte	.LVL1551
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1551
-	.8byte	.LVL1553
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL1561
-	.8byte	.LVL1566
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL1566
-	.8byte	.LVL1567
-	.2byte	0x3
-	.byte	0x86
-	.sleb128 -1
-	.byte	0x9f
-	.8byte	.LVL1567
-	.8byte	.LVL1587
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST363:
-	.8byte	.LVL1552
-	.8byte	.LVL1554
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1555
-	.8byte	.LVL1559
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1560
-	.8byte	.LVL1561
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1571
-	.8byte	.LVL1581
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1582
-	.8byte	.LVL1584
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1584
-	.8byte	.LVL1585-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1586
-	.8byte	.LVL1588
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1593
-	.8byte	.LVL1594-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST364:
-	.8byte	.LVL1563
-	.8byte	.LVL1568
-	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL1575
-	.8byte	.LVL1580
-	.2byte	0x1
-	.byte	0x6b
-	.8byte	0
-	.8byte	0
-.LLST365:
-	.8byte	.LVL1562
-	.8byte	.LVL1583
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	0
-	.8byte	0
-.LLST151:
-	.8byte	.LVL587
-	.8byte	.LVL588
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL590
-	.8byte	.LFE230
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST152:
-	.8byte	.LVL591
-	.8byte	.LVL595
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL596
-	.8byte	.LFE230
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST153:
-	.8byte	.LVL587
-	.8byte	.LVL589
-	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL590
-	.8byte	.LFE230
-	.2byte	0x1
-	.byte	0x69
-	.8byte	0
-	.8byte	0
-.LLST358:
-	.8byte	.LVL1536
-	.8byte	.LVL1537
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL1545
-	.8byte	.LVL1546
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL1546
-	.8byte	.LVL1547
-	.2byte	0x3
-	.byte	0x84
-	.sleb128 -1
-	.byte	0x9f
-	.8byte	.LVL1547
-	.8byte	.LVL1548
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST359:
-	.8byte	.LVL1526
-	.8byte	.LVL1529
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1538
-	.8byte	.LVL1539
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1540
-	.8byte	.LVL1541
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST360:
-	.8byte	.LVL1532
-	.8byte	.LVL1536
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL1541
-	.8byte	.LVL1543
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL1544
-	.8byte	.LVL1545
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST361:
-	.8byte	.LVL1524
-	.8byte	.LVL1535
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL1538
-	.8byte	.LVL1545
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL1548
-	.8byte	.LFE229
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST20:
-	.8byte	.LVL51
-	.8byte	.LVL52
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL52
-	.8byte	.LVL56
-	.2byte	0x1
-	.byte	0x54
-	.8byte	.LVL57
-	.8byte	.LFE228
-	.2byte	0x1
-	.byte	0x54
-	.8byte	0
-	.8byte	0
-.LLST21:
-	.8byte	.LVL51
-	.8byte	.LVL52
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL52
-	.8byte	.LVL54
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL55
-	.8byte	.LFE228
-	.2byte	0x1
-	.byte	0x55
-	.8byte	0
-	.8byte	0
-.LLST307:
-	.8byte	.LVL1247
-	.8byte	.LVL1248
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL1259
-	.8byte	.LVL1260
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL1260
-	.8byte	.LVL1261
-	.2byte	0x3
-	.byte	0x88
-	.sleb128 -1
-	.byte	0x9f
-	.8byte	.LVL1261
-	.8byte	.LVL1262
-	.2byte	0x1
-	.byte	0x68
-	.8byte	0
-	.8byte	0
-.LLST308:
-	.8byte	.LVL1246
-	.8byte	.LVL1251
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1251
-	.8byte	.LVL1259
-	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL1259
-	.8byte	.LVL1262
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1262
-	.8byte	.LVL1263
-	.2byte	0x3
-	.byte	0x89
-	.sleb128 1
-	.byte	0x9f
-	.8byte	.LVL1264
-	.8byte	.LVL1267
-	.2byte	0x3
-	.byte	0x89
-	.sleb128 1
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST309:
-	.8byte	.LVL1249
-	.8byte	.LVL1259
-	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL1262
-	.8byte	.LVL1265
-	.2byte	0x1
-	.byte	0x6b
-	.8byte	0
-	.8byte	0
-.LLST310:
-	.8byte	.LVL1246
-	.8byte	.LVL1251
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1251
-	.8byte	.LVL1256
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL1257
-	.8byte	.LVL1259
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL1259
-	.8byte	.LVL1262
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1262
-	.8byte	.LVL1266
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST202:
-	.8byte	.LVL801
-	.8byte	.LVL802
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL802
-	.8byte	.LVL807
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL807
-	.8byte	.LFE225
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST203:
-	.8byte	.LVL801
-	.8byte	.LVL803
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL803
-	.8byte	.LVL806
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL806
-	.8byte	.LFE225
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST16:
-	.8byte	.LVL45
-	.8byte	.LVL47
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL47
-	.8byte	.LFE223
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST17:
-	.8byte	.LVL46
-	.8byte	.LVL47
-	.2byte	0x10
-	.byte	0x70
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x29
-	.byte	0x71
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x29
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x9f
-	.8byte	.LVL47
-	.8byte	.LVL48
-	.2byte	0x11
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0xf7
-	.uleb128 0x29
-	.byte	0x71
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x29
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x9f
-	.8byte	.LVL48
-	.8byte	.LFE223
-	.2byte	0x1a
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0xf7
-	.uleb128 0x29
-	.byte	0x3
-	.8byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0xf7
-	.uleb128 0x29
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST18:
-	.8byte	.LVL49
-	.8byte	.LVL50
-	.2byte	0x41
-	.byte	0x70
-	.sleb128 0
-	.byte	0x35
-	.byte	0x25
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x32
-	.byte	0x24
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0xf7
-	.uleb128 0x29
-	.byte	0x3
-	.8byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0xf7
-	.uleb128 0x29
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x23
-	.uleb128 0x4
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.8byte	gBbtInfo
-	.byte	0x22
-	.byte	0x6
-	.byte	0x22
-	.byte	0x94
-	.byte	0x4
-	.byte	0x70
-	.sleb128 0
-	.byte	0x4f
-	.byte	0x1a
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x25
-	.byte	0x31
-	.byte	0x1a
-	.byte	0x9f
-	.8byte	.LVL50
-	.8byte	.LFE223
-	.2byte	0x97
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0xf7
-	.uleb128 0x30
-	.byte	0x3
-	.8byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0xf7
-	.uleb128 0x30
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0x3
-	.8byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0x1e
-	.byte	0x1c
-	.byte	0x35
-	.byte	0x25
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x32
-	.byte	0x24
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0xf7
-	.uleb128 0x29
-	.byte	0x3
-	.8byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0xf7
-	.uleb128 0x29
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x23
-	.uleb128 0x4
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.8byte	gBbtInfo
-	.byte	0x22
-	.byte	0x6
-	.byte	0x22
-	.byte	0x94
-	.byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0xf7
-	.uleb128 0x30
-	.byte	0x3
-	.8byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0xf7
-	.uleb128 0x30
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0x3
-	.8byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0x1e
-	.byte	0x1c
-	.byte	0x4f
-	.byte	0x1a
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x25
-	.byte	0x31
-	.byte	0x1a
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST19:
-	.8byte	.LVL49
-	.8byte	.LVL50
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL50
-	.8byte	.LFE223
-	.2byte	0x2e
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0xf7
-	.uleb128 0x30
-	.byte	0x3
-	.8byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0xf7
-	.uleb128 0x30
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0x3
-	.8byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0x1e
-	.byte	0x1c
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST12:
-	.8byte	.LVL40
-	.8byte	.LVL41
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL41
-	.8byte	.LVL44-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL44-1
-	.8byte	.LFE222
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST13:
-	.8byte	.LVL42
-	.8byte	.LVL44-1
-	.2byte	0x1
-	.byte	0x52
-	.8byte	0
-	.8byte	0
-.LLST14:
-	.8byte	.LVL43
-	.8byte	.LVL44-1
-	.2byte	0x16
-	.byte	0x72
-	.sleb128 0
-	.byte	0xc
-	.4byte	0xffffffff
-	.byte	0x1a
-	.byte	0x23
-	.uleb128 0x4
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.8byte	gBbtInfo
-	.byte	0x22
-	.8byte	0
-	.8byte	0
-.LLST15:
-	.8byte	.LVL43
-	.8byte	.LVL44-1
-	.2byte	0x1
-	.byte	0x53
-	.8byte	0
-	.8byte	0
-.LLST459:
-	.8byte	.LVL2050
-	.8byte	.LVL2053
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL2053
-	.8byte	.LVL2054-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL2054-1
-	.8byte	.LFE220
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST460:
-	.8byte	.LVL2050
-	.8byte	.LVL2052
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL2052
-	.8byte	.LVL2054-1
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL2054-1
-	.8byte	.LFE220
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST461:
-	.8byte	.LVL2050
-	.8byte	.LVL2051
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL2051
-	.8byte	.LVL2054-1
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL2054-1
-	.8byte	.LFE220
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST441:
-	.8byte	.LVL1976
-	.8byte	.LVL1979
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1979
-	.8byte	.LVL1980-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1980-1
-	.8byte	.LFE219
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST442:
-	.8byte	.LVL1976
-	.8byte	.LVL1978
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1978
-	.8byte	.LVL1980-1
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL1980-1
-	.8byte	.LFE219
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST443:
-	.8byte	.LVL1976
-	.8byte	.LVL1977
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL1977
-	.8byte	.LVL1980-1
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL1980-1
-	.8byte	.LFE219
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST387:
-	.8byte	.LVL1689
-	.8byte	.LVL1691
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1691
-	.8byte	.LVL1693
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL1693
-	.8byte	.LVL1695
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1695
-	.8byte	.LVL1710
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL1710
-	.8byte	.LVL1711
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1711
-	.8byte	.LFE218
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST388:
-	.8byte	.LVL1689
-	.8byte	.LVL1690
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1690
-	.8byte	.LVL1692
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1693
-	.8byte	.LFE218
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST389:
-	.8byte	.LVL1695
-	.8byte	.LVL1700
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1700
-	.8byte	.LVL1701
-	.2byte	0x2a
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0xf7
-	.uleb128 0x30
-	.byte	0x3
-	.8byte	c_ftl_nand_sec_pre_page
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0xf7
-	.uleb128 0x30
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0x3
-	.8byte	c_ftl_nand_sec_pre_page
-	.byte	0x94
-	.byte	0x2
-	.byte	0x1e
-	.byte	0x1c
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST390:
-	.8byte	.LVL1696
-	.8byte	.LVL1697
-	.2byte	0x25
-	.byte	0x71
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x70
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1c
-	.byte	0x12
-	.byte	0xc
-	.4byte	0xffffffff
-	.byte	0x1a
-	.byte	0x83
-	.sleb128 0
-	.byte	0x16
-	.byte	0x14
-	.byte	0xc
-	.4byte	0xffffffff
-	.byte	0x1a
-	.byte	0x2d
-	.byte	0x28
-	.2byte	0x1
-	.byte	0x16
-	.byte	0x13
-	.byte	0x9f
-	.8byte	.LVL1697
-	.8byte	.LVL1699
-	.2byte	0x2e
-	.byte	0x3
-	.8byte	c_ftl_nand_sec_pre_page
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x70
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1c
-	.byte	0x12
-	.byte	0xc
-	.4byte	0xffffffff
-	.byte	0x1a
-	.byte	0x83
-	.sleb128 0
-	.byte	0x16
-	.byte	0x14
-	.byte	0xc
-	.4byte	0xffffffff
-	.byte	0x1a
-	.byte	0x2d
-	.byte	0x28
-	.2byte	0x1
-	.byte	0x16
-	.byte	0x13
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST391:
-	.8byte	.LVL1694
-	.8byte	.LVL1710
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST392:
-	.8byte	.LVL1706
-	.8byte	.LVL1707-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST444:
-	.8byte	.LVL1981
-	.8byte	.LVL1982
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1982
-	.8byte	.LFE217
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST445:
-	.8byte	.LVL1981
-	.8byte	.LVL1983
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1983
-	.8byte	.LVL1985
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL1985
-	.8byte	.LVL1988
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	.LVL1988
-	.8byte	.LVL1989
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1989
-	.8byte	.LVL1997
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL1997
-	.8byte	.LVL1998
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	.LVL1998
-	.8byte	.LVL2042
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL2042
-	.8byte	.LVL2049
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	.LVL2049
-	.8byte	.LFE217
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST446:
-	.8byte	.LVL1981
-	.8byte	.LVL1984
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL1984
-	.8byte	.LVL1987
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 352
-	.8byte	.LVL1987
-	.8byte	.LVL1988
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 112
-	.8byte	.LVL1988
-	.8byte	.LVL1995
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL1995
-	.8byte	.LVL2049
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 352
-	.8byte	.LVL2049
-	.8byte	.LFE217
-	.2byte	0x1
-	.byte	0x52
-	.8byte	0
-	.8byte	0
-.LLST447:
-	.8byte	.LVL1981
-	.8byte	.LVL1985-1
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL1985-1
-	.8byte	.LVL1986
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL1986
-	.8byte	.LVL1988
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.8byte	.LVL1988
-	.8byte	.LVL1995
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL1995
-	.8byte	.LVL2049
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL2049
-	.8byte	.LFE217
-	.2byte	0x1
-	.byte	0x53
-	.8byte	0
-	.8byte	0
-.LLST448:
-	.8byte	.LVL2020
-	.8byte	.LVL2041
-	.2byte	0x1
-	.byte	0x67
-	.8byte	0
-	.8byte	0
-.LLST449:
-	.8byte	.LVL1994
-	.8byte	.LVL1995
-	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL1995
-	.8byte	.LVL1997
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL1998
-	.8byte	.LVL2043
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST450:
-	.8byte	.LVL1990
-	.8byte	.LVL2049
-	.2byte	0x1
-	.byte	0x69
-	.8byte	0
-	.8byte	0
-.LLST451:
-	.8byte	.LVL1991
-	.8byte	.LVL1992
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1992
-	.8byte	.LVL2049
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 332
-	.8byte	0
-	.8byte	0
-.LLST452:
-	.8byte	.LVL2018
-	.8byte	.LVL2019
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL2019
-	.8byte	.LVL2021
-	.2byte	0x2
-	.byte	0x71
-	.sleb128 4
-	.8byte	.LVL2021
-	.8byte	.LVL2022-1
-	.2byte	0xf
-	.byte	0x3
-	.8byte	req_prgm
-	.byte	0x6
-	.byte	0x8b
-	.sleb128 0
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x4
-	.8byte	0
-	.8byte	0
-.LLST453:
-	.8byte	.LVL2008
-	.8byte	.LVL2013
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 360
-	.8byte	.LVL2016
-	.8byte	.LVL2028
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 360
-	.8byte	.LVL2028
-	.8byte	.LVL2029
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL2029
-	.8byte	.LVL2041
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 360
-	.8byte	0
-	.8byte	0
-.LLST454:
-	.8byte	.LVL1993
-	.8byte	.LVL2049
-	.2byte	0x1
-	.byte	0x68
-	.8byte	0
-	.8byte	0
-.LLST455:
-	.8byte	.LVL2004
-	.8byte	.LVL2005
-	.2byte	0x21
-	.byte	0x83
-	.sleb128 7
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x32
-	.byte	0x24
-	.byte	0x12
-	.byte	0xc
-	.4byte	0xffffffff
-	.byte	0x1a
-	.byte	0x88
-	.sleb128 0
-	.byte	0x16
-	.byte	0x14
-	.byte	0xc
-	.4byte	0xffffffff
-	.byte	0x1a
-	.byte	0x2d
-	.byte	0x28
-	.2byte	0x1
-	.byte	0x16
-	.byte	0x13
-	.byte	0x9f
-	.8byte	.LVL2005
-	.8byte	.LVL2006
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL2006
-	.8byte	.LVL2009
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 324
-	.8byte	.LVL2009
-	.8byte	.LVL2013
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL2016
-	.8byte	.LVL2041
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 324
-	.8byte	0
-	.8byte	0
-.LLST456:
-	.8byte	.LVL1994
-	.8byte	.LVL1995
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL2023
-	.8byte	.LVL2024
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL2024
-	.8byte	.LVL2026
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 348
-	.8byte	.LVL2029
-	.8byte	.LVL2031
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL2031
-	.8byte	.LVL2032
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 348
-	.8byte	.LVL2033
-	.8byte	.LVL2040
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 348
-	.8byte	0
-	.8byte	0
-.LLST457:
-	.8byte	.LVL1994
-	.8byte	.LVL1995
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL2025
-	.8byte	.LVL2026
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 356
-	.8byte	.LVL2030
-	.8byte	.LVL2031
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL2031
-	.8byte	.LVL2032
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 356
-	.8byte	.LVL2033
-	.8byte	.LVL2040
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 356
-	.8byte	0
-	.8byte	0
-.LLST458:
-	.8byte	.LVL1994
-	.8byte	.LVL1995
-	.2byte	0xa
-	.byte	0x3
-	.8byte	g_active_superblock
-	.byte	0x9f
-	.8byte	.LVL1995
-	.8byte	.LVL1997
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1998
-	.8byte	.LVL2001
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL2003
-	.8byte	.LVL2015
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL2016
-	.8byte	.LVL2044
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST398:
-	.8byte	.LVL1743
-	.8byte	.LVL1746-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1746-1
-	.8byte	.LVL1746
-	.2byte	0x3
-	.byte	0x84
-	.sleb128 -4
-	.byte	0x9f
-	.8byte	.LVL1746
-	.8byte	.LFE215
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST399:
-	.8byte	.LVL1743
-	.8byte	.LVL1746-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1746-1
-	.8byte	.LFE215
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST400:
-	.8byte	.LVL1743
-	.8byte	.LVL1744
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL1744
-	.8byte	.LFE215
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST401:
-	.8byte	.LVL1743
-	.8byte	.LVL1745
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL1745
-	.8byte	.LVL1762
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1762
-	.8byte	.LFE215
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST402:
-	.8byte	.LVL1755
-	.8byte	.LVL1758-1
-	.2byte	0x1
-	.byte	0x53
-	.8byte	0
-	.8byte	0
-.LLST403:
-	.8byte	.LVL1747
-	.8byte	.LVL1748
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1757
-	.8byte	.LVL1758-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1758-1
-	.8byte	.LVL1760
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST404:
-	.8byte	.LVL1754
-	.8byte	.LVL1756-1
-	.2byte	0x2
-	.byte	0x86
-	.sleb128 16
-	.8byte	0
-	.8byte	0
-.LLST424:
-	.8byte	.LVL1927
-	.8byte	.LVL1930
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1930
-	.8byte	.LFE214
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST425:
-	.8byte	.LVL1927
-	.8byte	.LVL1929
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1929
-	.8byte	.LVL1933
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1933
-	.8byte	.LVL1936
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	.LVL1936
-	.8byte	.LVL1937
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1937
-	.8byte	.LFE214
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST426:
-	.8byte	.LVL1927
-	.8byte	.LVL1928
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL1928
-	.8byte	.LVL1935
-	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL1935
-	.8byte	.LVL1936
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.8byte	.LVL1936
-	.8byte	.LVL1942
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL1942
-	.8byte	.LVL1975
-	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL1975
-	.8byte	.LFE214
-	.2byte	0x1
-	.byte	0x52
-	.8byte	0
-	.8byte	0
-.LLST427:
-	.8byte	.LVL1927
-	.8byte	.LVL1931-1
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL1931-1
-	.8byte	.LVL1934
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL1934
-	.8byte	.LVL1936
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.8byte	.LVL1936
-	.8byte	.LVL1943
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL1943
-	.8byte	.LVL1975
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL1975
-	.8byte	.LFE214
-	.2byte	0x1
-	.byte	0x53
-	.8byte	0
-	.8byte	0
-.LLST428:
-	.8byte	.LVL1927
-	.8byte	.LVL1932
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1936
-	.8byte	.LVL1943
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1943
-	.8byte	.LVL1954
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL1956
-	.8byte	.LVL1975
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL1975
-	.8byte	.LFE214
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST429:
-	.8byte	.LVL1938
-	.8byte	.LVL1975
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	0
-	.8byte	0
-.LLST430:
-	.8byte	.LVL1939
-	.8byte	.LVL1975
-	.2byte	0x1
-	.byte	0x68
-	.8byte	0
-	.8byte	0
-.LLST431:
-	.8byte	.LVL1958
-	.8byte	.LVL1959
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1959
-	.8byte	.LVL1960-1
-	.2byte	0x16
-	.byte	0x3
-	.8byte	c_ftl_nand_sec_pre_page
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x84
-	.sleb128 0
-	.byte	0x1e
-	.byte	0x74
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST432:
-	.8byte	.LVL1940
-	.8byte	.LVL1943
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL1943
-	.8byte	.LVL1975
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST433:
-	.8byte	.LVL1950
-	.8byte	.LVL1952
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST434:
-	.8byte	.LVL1940
-	.8byte	.LVL1943
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1943
-	.8byte	.LVL1951
-	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL1957
-	.8byte	.LVL1972
-	.2byte	0x1
-	.byte	0x69
-	.8byte	0
-	.8byte	0
-.LLST435:
-	.8byte	.LVL1940
-	.8byte	.LVL1941
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1941
-	.8byte	.LVL1948
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 300
-	.8byte	.LVL1948
-	.8byte	.LVL1949
-	.2byte	0x8
-	.byte	0x8f
-	.sleb128 300
-	.byte	0x94
-	.byte	0x4
-	.byte	0x31
-	.byte	0x1c
-	.byte	0x9f
-	.8byte	.LVL1957
-	.8byte	.LVL1972
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 300
-	.8byte	0
-	.8byte	0
-.LLST436:
-	.8byte	.LVL1927
-	.8byte	.LVL1932
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1936
-	.8byte	.LVL1943
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1943
-	.8byte	.LVL1964
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 296
-	.8byte	.LVL1964
-	.8byte	.LVL1965
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL1965
-	.8byte	.LVL1975
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 296
-	.8byte	.LVL1975
-	.8byte	.LFE214
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST437:
-	.8byte	.LVL1936
-	.8byte	.LVL1943
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1943
-	.8byte	.LVL1965
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 292
-	.8byte	.LVL1965
-	.8byte	.LVL1966
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL1966
-	.8byte	.LVL1967
-	.2byte	0x9
-	.byte	0x71
-	.sleb128 0
-	.byte	0x8f
-	.sleb128 296
-	.byte	0x94
-	.byte	0x4
-	.byte	0x1c
-	.byte	0x9f
-	.8byte	.LVL1967
-	.8byte	.LVL1968
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL1968
-	.8byte	.LVL1975
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 292
-	.8byte	.LVL1975
-	.8byte	.LFE214
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST438:
-	.8byte	.LVL1936
-	.8byte	.LVL1943
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1943
-	.8byte	.LVL1970
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 288
-	.8byte	.LVL1970
-	.8byte	.LVL1971
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL1971
-	.8byte	.LVL1975
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 288
-	.8byte	.LVL1975
-	.8byte	.LFE214
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST439:
-	.8byte	.LVL1946
-	.8byte	.LVL1947
-	.2byte	0x1
-	.byte	0x54
-	.8byte	.LVL1957
-	.8byte	.LVL1960-1
-	.2byte	0x1
-	.byte	0x54
-	.8byte	.LVL1960-1
-	.8byte	.LVL1961
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 264
-	.8byte	.LVL1962
-	.8byte	.LVL1963
-	.2byte	0x1
-	.byte	0x54
-	.8byte	0
-	.8byte	0
-.LLST440:
-	.8byte	.LVL1973
-	.8byte	.LVL1974-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST468:
-	.8byte	.LVL2151
-	.8byte	.LVL2152
-	.2byte	0x7
-	.byte	0xa
-	.2byte	0x1fc1
-	.byte	0x83
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.8byte	.LVL2152
-	.8byte	.LVL2153
-	.2byte	0x7
-	.byte	0xa
-	.2byte	0x1fc2
-	.byte	0x83
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.8byte	.LVL2153
-	.8byte	.LVL2154
-	.2byte	0x7
-	.byte	0xa
-	.2byte	0x1fc1
-	.byte	0x83
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST464:
-	.8byte	.LVL2108
-	.8byte	.LVL2109
-	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL2111
-	.8byte	.LVL2112
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL2121
-	.8byte	.LVL2122
-	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL2122
-	.8byte	.LVL2123-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL2125
-	.8byte	.LVL2126
-	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL2130
-	.8byte	.LVL2131
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL2131
-	.8byte	.LVL2132-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL2132
-	.8byte	.LVL2133
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL2133
-	.8byte	.LVL2134
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL2134
-	.8byte	.LVL2135-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL2137
-	.8byte	.LVL2138
-	.2byte	0x1
-	.byte	0x68
-	.8byte	0
-	.8byte	0
-.LLST465:
-	.8byte	.LVL2111
-	.8byte	.LVL2115
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL2133
-	.8byte	.LVL2136
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL2137
-	.8byte	.LVL2138
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST466:
-	.8byte	.LVL2107
-	.8byte	.LVL2108
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL2108
-	.8byte	.LVL2110
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL2121
-	.8byte	.LVL2124
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL2125
-	.8byte	.LVL2127
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL2129
-	.8byte	.LVL2130
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST467:
-	.8byte	.LVL2106
-	.8byte	.LVL2108
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL2118
-	.8byte	.LVL2119
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL2120
-	.8byte	.LVL2121
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST181:
-	.8byte	.LVL665
-	.8byte	.LVL666
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL666
-	.8byte	.LVL691
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL691
-	.8byte	.LFE209
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST182:
-	.8byte	.LVL665
-	.8byte	.LVL668
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL668
-	.8byte	.LVL691
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL691
-	.8byte	.LFE209
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST183:
-	.8byte	.LVL665
-	.8byte	.LVL669
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL669
-	.8byte	.LVL672
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL673
-	.8byte	.LVL682
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL683
-	.8byte	.LVL690
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL692
-	.8byte	.LVL703
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL704
-	.8byte	.LFE209
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST184:
-	.8byte	.LVL665
-	.8byte	.LVL669
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL669
-	.8byte	.LVL670
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL678
-	.8byte	.LVL679
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL679
-	.8byte	.LVL689
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL692
-	.8byte	.LVL697
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL698
-	.8byte	.LVL705
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL706
-	.8byte	.LVL711
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL712
-	.8byte	.LFE209
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST185:
-	.8byte	.LVL667
-	.8byte	.LVL669
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL669
-	.8byte	.LVL671-1
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL678
-	.8byte	.LVL679
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL679
-	.8byte	.LVL680-1
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL680
-	.8byte	.LVL681
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL692
-	.8byte	.LVL700
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL700
-	.8byte	.LVL701
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 1
-	.byte	0x9f
-	.8byte	.LVL702
-	.8byte	.LVL705
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL706
-	.8byte	.LVL714
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL714
-	.8byte	.LVL715
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 1
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST186:
-	.8byte	.LVL694
-	.8byte	.LVL699
-	.2byte	0x1
-	.byte	0x5d
-	.8byte	.LVL699
-	.8byte	.LVL702
-	.2byte	0x1
-	.byte	0x5e
-	.8byte	.LVL702
-	.8byte	.LVL705
-	.2byte	0x1
-	.byte	0x5d
-	.8byte	.LVL708
-	.8byte	.LVL713
-	.2byte	0x1
-	.byte	0x5c
-	.8byte	.LVL713
-	.8byte	.LFE209
-	.2byte	0x1
-	.byte	0x5d
-	.8byte	0
-	.8byte	0
-.LLST187:
-	.8byte	.LVL665
-	.8byte	.LVL676
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.8byte	.LVL676
-	.8byte	.LVL677
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL678
-	.8byte	.LVL689
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL692
-	.8byte	.LVL706
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.8byte	.LVL706
-	.8byte	.LFE209
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	0
-	.8byte	0
-.LLST188:
-	.8byte	.LVL665
-	.8byte	.LVL678
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL678
-	.8byte	.LVL685
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL686
-	.8byte	.LVL687
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL692
-	.8byte	.LVL706
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL706
-	.8byte	.LFE209
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST189:
-	.8byte	.LVL665
-	.8byte	.LVL677
-	.2byte	0x2
-	.byte	0x36
-	.byte	0x9f
-	.8byte	.LVL678
-	.8byte	.LVL689
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL692
-	.8byte	.LVL706
-	.2byte	0x2
-	.byte	0x36
-	.byte	0x9f
-	.8byte	.LVL706
-	.8byte	.LFE209
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	0
-	.8byte	0
-.LLST190:
-	.8byte	.LVL665
-	.8byte	.LVL675
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL675
-	.8byte	.LVL677
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.8byte	.LVL678
-	.8byte	.LVL689
-	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL692
-	.8byte	.LVL706
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL706
-	.8byte	.LFE209
-	.2byte	0x1
-	.byte	0x69
-	.8byte	0
-	.8byte	0
-.LLST200:
-	.8byte	.LVL798
-	.8byte	.LVL799
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST201:
-	.8byte	.LVL745
-	.8byte	.LVL751
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL752
-	.8byte	.LVL759
-	.2byte	0x7
-	.byte	0x83
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x9f
-	.8byte	.LVL761
-	.8byte	.LVL764
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL768
-	.8byte	.LVL770
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL770
-	.8byte	.LVL771-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL772
-	.8byte	.LVL773-1
-	.2byte	0xe
-	.byte	0x3
-	.8byte	c_ftl_nand_max_map_blks
-	.byte	0x94
-	.byte	0x4
-	.byte	0x31
-	.byte	0x24
-	.byte	0x9f
-	.8byte	.LVL780
-	.8byte	.LVL781
-	.2byte	0x12
-	.byte	0x3
-	.8byte	c_ftl_nand_map_region_num
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x32
-	.byte	0x24
-	.byte	0x9f
-	.8byte	.LVL781
-	.8byte	.LVL782-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL783
-	.8byte	.LVL784-1
-	.2byte	0xe
-	.byte	0x3
-	.8byte	c_ftl_nand_max_map_blks
-	.byte	0x94
-	.byte	0x4
-	.byte	0x32
-	.byte	0x24
-	.byte	0x9f
-	.8byte	.LVL785
-	.8byte	.LVL786
-	.2byte	0x12
-	.byte	0x3
-	.8byte	c_ftl_nand_l2pmap_ram_region_num
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x34
-	.byte	0x24
-	.byte	0x9f
-	.8byte	.LVL786
-	.8byte	.LVL787-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL788
-	.8byte	.LVL789
-	.2byte	0x20
-	.byte	0x3
-	.8byte	c_ftl_nand_l2pmap_ram_region_num
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x3
-	.8byte	c_ftl_nand_byte_pre_page
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.8byte	.LVL789
-	.8byte	.LVL790-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL791
-	.8byte	.LVL792
-	.2byte	0x12
-	.byte	0x3
-	.8byte	c_ftl_nand_blk_pre_plane
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x9f
-	.8byte	.LVL792
-	.8byte	.LVL793-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL794
-	.8byte	.LVL795
-	.2byte	0x15
-	.byte	0x3
-	.8byte	c_ftl_nand_die_num
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x70
-	.sleb128 0
-	.byte	0x1e
-	.byte	0x32
-	.byte	0x24
-	.byte	0x9f
-	.8byte	.LVL795
-	.8byte	.LVL796
-	.2byte	0x26
-	.byte	0x3
-	.8byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x23
-	.uleb128 0x1f
-	.byte	0x35
-	.byte	0x26
-	.byte	0x3
-	.8byte	c_ftl_nand_die_num
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x32
-	.byte	0x24
-	.byte	0x9f
-	.8byte	.LVL796
-	.8byte	.LVL797-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST8:
-	.8byte	.LVL25
-	.8byte	.LVL26
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL26
-	.8byte	.LVL32
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL32
-	.8byte	.LFE205
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST9:
-	.8byte	.LVL27
-	.8byte	.LVL28
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL28
-	.8byte	.LVL29
-	.2byte	0x3
-	.byte	0x71
-	.sleb128 1
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST7:
-	.8byte	.LVL21
-	.8byte	.LVL22
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL22
-	.8byte	.LVL23
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL23
-	.8byte	.LVL24
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL24
-	.8byte	.LFE204
-	.2byte	0x9
-	.byte	0x3
-	.8byte	c_ftl_nand_sys_blks_per_plane
-	.8byte	0
-	.8byte	0
-.LLST4:
-	.8byte	.LVL12
-	.8byte	.LVL15
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL15
-	.8byte	.LVL16
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL16
-	.8byte	.LFE202
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST5:
-	.8byte	.LVL12
-	.8byte	.LVL13
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL13
-	.8byte	.LVL14
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL14
-	.8byte	.LVL16
-	.2byte	0x3
-	.byte	0x71
-	.sleb128 -1
-	.byte	0x9f
-	.8byte	.LVL16
-	.8byte	.LVL17
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL19
-	.8byte	.LFE202
-	.2byte	0x1
-	.byte	0x51
-	.8byte	0
-	.8byte	0
-.LLST6:
-	.8byte	.LVL12
-	.8byte	.LVL13
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.8byte	.LVL13
-	.8byte	.LFE202
-	.2byte	0x1
-	.byte	0x52
-	.8byte	0
-	.8byte	0
-.LLST102:
-	.8byte	.LVL443
-	.8byte	.LVL445-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL445-1
-	.8byte	.LVL450
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL450
-	.8byte	.LFE201
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST103:
-	.8byte	.LVL444
-	.8byte	.LVL445-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL445-1
-	.8byte	.LVL446
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL446
-	.8byte	.LVL447
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL447
-	.8byte	.LVL448
-	.2byte	0xc
-	.byte	0x70
-	.sleb128 0
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x8
-	.byte	0x20
-	.byte	0x26
-	.byte	0x83
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.8byte	.LVL448
-	.8byte	.LVL449
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST97:
-	.8byte	.LVL291
-	.8byte	.LVL293-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL293-1
-	.8byte	.LVL426
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL426
-	.8byte	.LVL427
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL427
-	.8byte	.LFE200
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST98:
-	.8byte	.LVL431
-	.8byte	.LVL432
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL432
-	.8byte	.LVL433
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL433
-	.8byte	.LVL434-1
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL434-1
-	.8byte	.LVL436
-	.2byte	0x3
-	.byte	0x87
-	.sleb128 -1
-	.byte	0x9f
-	.8byte	.LVL436
-	.8byte	.LVL437
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL439
-	.8byte	.LVL440
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL440
-	.8byte	.LVL441-1
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL441-1
-	.8byte	.LVL442
-	.2byte	0x3
-	.byte	0x86
-	.sleb128 -1
-	.byte	0x9f
-	.8byte	.LVL442
-	.8byte	.LFE200
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST99:
-	.8byte	.LVL292
-	.8byte	.LVL293-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL293-1
-	.8byte	.LVL294
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL294
-	.8byte	.LVL406
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL406
-	.8byte	.LVL425
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL427
-	.8byte	.LFE200
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST100:
-	.8byte	.LVL431
-	.8byte	.LVL434-1
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL436
-	.8byte	.LVL438
-	.2byte	0x1
-	.byte	0x53
-	.8byte	0
-	.8byte	0
-.LLST101:
-	.8byte	.LVL439
-	.8byte	.LVL441-1
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL442
-	.8byte	.LFE200
-	.2byte	0xd
-	.byte	0x3
-	.8byte	p_data_block_list_table
-	.byte	0x6
-	.byte	0x88
-	.sleb128 0
-	.byte	0x22
-	.8byte	0
-	.8byte	0
-.LLST0:
-	.8byte	.LVL5
-	.8byte	.LVL7
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL7
-	.8byte	.LVL8
-	.2byte	0x1
-	.byte	0x54
-	.8byte	0
-	.8byte	0
-.LLST1:
-	.8byte	.LVL1
-	.8byte	.LVL9
-	.2byte	0x1
-	.byte	0x53
-	.8byte	0
-	.8byte	0
-.LLST2:
-	.8byte	.LVL4
-	.8byte	.LVL6
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST3:
-	.8byte	.LVL10
-	.8byte	.LVL11
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL11
-	.8byte	.LFE355
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST10:
-	.8byte	.LVL34
-	.8byte	.LVL37
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL37
-	.8byte	.LFE208
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST11:
-	.8byte	.LVL35
-	.8byte	.LVL36
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL38
-	.8byte	.LVL39
-	.2byte	0x1
-	.byte	0x51
-	.8byte	0
-	.8byte	0
-.LLST43:
-	.8byte	.LVL116
-	.8byte	.LVL117-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL117-1
-	.8byte	.LFE245
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST44:
-	.8byte	.LVL118
-	.8byte	.LVL119
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST50:
-	.8byte	.LVL136
-	.8byte	.LVL137-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL137-1
-	.8byte	.LFE244
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST51:
-	.8byte	.LVL138
-	.8byte	.LVL139
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST64:
-	.8byte	.LVL179
-	.8byte	.LVL180
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL180
-	.8byte	.LVL202
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL202
-	.8byte	.LFE252
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST65:
-	.8byte	.LVL181
-	.8byte	.LVL201
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST66:
-	.8byte	.LVL190
-	.8byte	.LVL192
-	.2byte	0x5
-	.byte	0x70
-	.sleb128 0
-	.byte	0x36
-	.byte	0x1b
-	.byte	0x9f
-	.8byte	.LVL192
-	.8byte	.LVL199-1
-	.2byte	0xd
-	.byte	0x86
-	.sleb128 2
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x36
-	.byte	0x1b
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST67:
-	.8byte	.LVL183
-	.8byte	.LVL185
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL185
-	.8byte	.LVL188
-	.2byte	0xd
-	.byte	0x83
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0xc
-	.4byte	0x1fffe
-	.byte	0x1a
-	.byte	0x72
-	.sleb128 0
-	.byte	0x22
-	.8byte	.LVL188
-	.8byte	.LVL189-1
-	.2byte	0x15
-	.byte	0x83
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0xc
-	.4byte	0x1fffe
-	.byte	0x1a
-	.byte	0x3
-	.8byte	p_valid_page_count_table
-	.byte	0x6
-	.byte	0x22
-	.8byte	0
-	.8byte	0
-.LLST68:
-	.8byte	.LVL184
-	.8byte	.LVL185
-	.2byte	0xe
-	.byte	0x84
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x70
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.8byte	.LVL185
-	.8byte	.LVL186
-	.2byte	0x1b
-	.byte	0x83
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0xc
-	.4byte	0x1fffe
-	.byte	0x1a
-	.byte	0x72
-	.sleb128 0
-	.byte	0x22
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x70
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.8byte	.LVL186
-	.8byte	.LVL187
-	.2byte	0x1d
-	.byte	0x83
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0xc
-	.4byte	0x1fffe
-	.byte	0x1a
-	.byte	0x72
-	.sleb128 0
-	.byte	0x22
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x86
-	.sleb128 4
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.8byte	.LVL187
-	.8byte	.LVL196
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST69:
-	.8byte	.LVL191
-	.8byte	.LVL197
-	.2byte	0x1
-	.byte	0x51
-	.8byte	0
-	.8byte	0
-.LLST70:
-	.8byte	.LVL193
-	.8byte	.LVL195
-	.2byte	0xe
-	.byte	0x71
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x72
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.8byte	.LVL195
-	.8byte	.LVL198
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST71:
-	.8byte	.LVL182
-	.8byte	.LVL201
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST72:
-	.8byte	.LVL190
-	.8byte	.LVL192
-	.2byte	0xe
-	.byte	0x3
-	.8byte	p_data_block_list_table
-	.byte	0x6
-	.byte	0x70
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.8byte	.LVL192
-	.8byte	.LVL194
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL194
-	.8byte	.LVL199-1
-	.2byte	0x16
-	.byte	0x86
-	.sleb128 2
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x3
-	.8byte	p_data_block_list_table
-	.byte	0x6
-	.byte	0x22
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST76:
-	.8byte	.LVL225
-	.8byte	.LVL226
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL226
-	.8byte	.LFE266
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST77:
-	.8byte	.LVL231
-	.8byte	.LVL232-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL232-1
-	.8byte	.LFE272
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST78:
-	.8byte	.LVL231
-	.8byte	.LVL232-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL232-1
-	.8byte	.LVL232
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	.LVL232
-	.8byte	.LVL233
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL233
-	.8byte	.LFE272
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST83:
-	.8byte	.LVL246
-	.8byte	.LVL248
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL249
-	.8byte	.LFE282
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST84:
-	.8byte	.LVL247
-	.8byte	.LVL248
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL249
-	.8byte	.LFE282
-	.2byte	0x1
-	.byte	0x53
-	.8byte	0
-	.8byte	0
-.LLST112:
-	.8byte	.LVL479
-	.8byte	.LVL481-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL481-1
-	.8byte	.LFE297
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST113:
-	.8byte	.LVL480
-	.8byte	.LVL481-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL481-1
-	.8byte	.LVL482
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST175:
-	.8byte	.LVL655
-	.8byte	.LVL656
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL656
-	.8byte	.LVL664
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL664
-	.8byte	.LFE240
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST176:
-	.8byte	.LVL655
-	.8byte	.LVL658-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL658-1
-	.8byte	.LFE240
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST177:
-	.8byte	.LVL657
-	.8byte	.LVL658-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL658-1
-	.8byte	.LVL663
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST178:
-	.8byte	.LVL657
-	.8byte	.LVL663
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST179:
-	.8byte	.LVL657
-	.8byte	.LVL663
-	.2byte	0xa
-	.byte	0x3
-	.8byte	gSysFreeQueue
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST180:
-	.8byte	.LVL659
-	.8byte	.LVL660
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL660
-	.8byte	.LVL662
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST193:
-	.8byte	.LVL729
-	.8byte	.LVL731
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL731
-	.8byte	.LVL737
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL737
-	.8byte	.LVL738
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL738
-	.8byte	.LFE255
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST194:
-	.8byte	.LVL729
-	.8byte	.LVL732
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL732
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-	.section	.debug_line,"",@progbits
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-	.section	.debug_str,"MS",@progbits,1
-.LASF727:
-	.string	"FtlEctTblFlush"
-.LASF592:
-	.string	"gc_page_num"
-.LASF608:
-	.string	"superBlk"
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-	.string	"g_gc_bad_block_temp_num"
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-	.string	"all_blk_used_slc_mode"
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-	.string	"reserved"
-.LASF507:
-	.string	"g_totle_read_sector"
-.LASF573:
-	.string	"__func__"
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-	.string	"c_ftl_nand_sys_blks_per_plane"
-.LASF732:
-	.string	"nSec"
-.LASF728:
-	.string	"forceFlush"
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-	.string	"bootm_headers"
-.LASF452:
-	.string	"p_gc_data_buf"
-.LASF125:
-	.string	"rd_end"
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-	.string	"p_gc_blk_tbl"
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-	.string	"FtlFreeSysBlkQueueOut"
-.LASF324:
-	.string	"ftl_bbt_blk_header"
-.LASF227:
-	.string	"eth_device"
-.LASF306:
-	.string	"sign"
-.LASF831:
-	.string	"sctidx"
-.LASF669:
-	.string	"Ftl_load_ext_data"
-.LASF96:
-	.string	"ih_comp"
-.LASF586:
-	.string	"block"
-.LASF22:
-	.string	"_Bool"
-.LASF651:
-	.string	"min_ec"
-.LASF603:
-	.string	"req_read_temp"
-.LASF279:
-	.string	"p_spare"
-.LASF685:
-	.string	"recovery_cur_page_ver"
-.LASF505:
-	.string	"g_totle_write_page_count"
-.LASF245:
-	.string	"net_root_path"
-.LASF624:
-	.string	"lookup_ppa"
-.LASF816:
-	.string	"FtlBbmTblFlush"
-.LASF611:
-	.string	"Ftl_get_new_temp_ppa"
-.LASF327:
-	.string	"ftl_data_blk_header"
-.LASF284:
-	.string	"blk_per_plane"
-.LASF360:
-	.string	"min_erase_count"
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-	.string	"fit_noffset_os"
-.LASF391:
-	.string	"des_ppa"
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-	.string	"priv"
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-	.string	"insert_free_list"
-.LASF880:
-	.ascii	"GNU C11 6.3.1 20170404 -ms"
-	.string	"trict-align -march=armv8-a+nosimd -mlittle-endian -mabi=lp64 -g -Os -fno-builtin -ffreestanding -fshort-wchar -fno-stack-protector -fno-delete-null-pointer-checks -fstack-usage -fno-pic -ffunction-sections -fdata-sections -ffixed-r9 -fno-common -ffixed-x18"
-.LASF21:
-	.string	"___strtok"
-.LASF198:
-	.string	"UCLASS_SPI_GENERIC"
-.LASF476:
-	.string	"g_l2p_last_update_region_id"
-.LASF698:
-	.string	"ftl_sb_update_avl_pages"
-.LASF571:
-	.string	"FlashProgPages"
-.LASF855:
-	.string	"test_page_num"
-.LASF684:
-	.string	"lookup_superblock_id"
-.LASF420:
-	.string	"c_ftl_nand_init_sys_blks_per_plane"
-.LASF864:
-	.string	"FtlConstantsInit"
-.LASF595:
-	.string	"num_io"
-.LASF867:
-	.string	"FtlPrintInfo"
-.LASF744:
-	.string	"l2p_flush"
-.LASF378:
-	.string	"rear"
-.LASF305:
-	.string	"ftl_l2p_map_info"
-.LASF520:
-	.string	"g_in_swl_replace"
-.LASF404:
-	.string	"c_ftl_nand_page_pre_slc_blk"
-.LASF243:
-	.string	"net_nis_domain"
-.LASF764:
-	.string	"List_update_data_list"
-.LASF851:
-	.string	"create_first_buffer_superblock"
-.LASF502:
-	.string	"g_gc_merge_free_blk_threshold"
-.LASF693:
-	.string	"last_mlc_page_version"
-.LASF630:
-	.string	"IsBlkInGcList"
-.LASF235:
-	.string	"next"
-.LASF312:
-	.string	"pBlkVpcTbl"
-.LASF697:
-	.string	"FtlReUsePrevPpa"
-.LASF658:
-	.string	"update_multiplier_value"
-.LASF411:
-	.string	"c_ftl_nand_totle_phy_blks"
-.LASF873:
-	.string	"memcmp"
-.LASF421:
-	.string	"c_ftl_nand_max_sys_blks"
-.LASF576:
-	.string	"PhyBlk"
-.LASF575:
-	.string	"FlashReadPages"
-.LASF478:
-	.string	"p_free_data_block_list_head"
-.LASF148:
-	.string	"UCLASS_AHCI"
-.LASF161:
-	.string	"UCLASS_I2C_MUX"
-.LASF263:
-	.string	"uclass_id"
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-	.string	"get_new_gc_superblock"
-.LASF622:
-	.string	"BOPS_EN"
-.LASF241:
-	.string	"net_netmask"
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-	.string	"bad_block_cnt"
-.LASF424:
-	.string	"c_ftl_nand_max_data_blks"
-.LASF559:
-	.string	"pvTo"
-.LASF117:
-	.string	"fit_noffset_rd"
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-	.string	"UCLASS_RTC"
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-	.string	"pBbtHeader"
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-	.string	"bi_memsize"
-.LASF47:
-	.string	"bi_flashstart"
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-	.string	"minValidPageCount"
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-	.string	"recv"
-.LASF122:
-	.string	"fit_uname_setup"
-.LASF199:
-	.string	"UCLASS_SYSCON"
-.LASF153:
-	.string	"UCLASS_DISPLAY"
-.LASF518:
-	.string	"g_max_erase_count"
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-	.string	"flash_type"
-.LASF528:
-	.string	"g_recovery_ppa_tbl"
-.LASF71:
-	.string	"IRQ_STACK_START_IN"
-.LASF63:
-	.string	"bi_dram"
-.LASF191:
-	.string	"UCLASS_RKNAND"
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-	.string	"die_index"
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-	.string	"ver2"
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-	.string	"UCLASS_I2C_EEPROM"
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-	.string	"g_nand_phy_info"
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-	.string	"check_spare_buf"
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-	.string	"UCLASS_PCI_EMUL"
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-.LASF585:
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-	.string	"g_totle_write_sector"
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-	.string	"prev_valid_page_count"
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-	.string	"FtlPrintInfo2buf"
-.LASF479:
-	.string	"p_data_block_list_head"
-.LASF265:
-	.string	"NETLOOP_CONTINUE"
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-	.string	"P2V_plane"
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-	.string	"g_gc_temp_superblock"
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-	.string	"UCLASS_SPI"
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-	.string	"c_ftl_nand_max_map_blks"
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-	.string	"BbtMap"
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-	.string	"found_lpa"
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-	.string	"UCLASS_VIDEO_CONSOLE"
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-	.string	"last_refresh_read_count"
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-	.string	"UCLASS_VIDEO"
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-	.string	"current_ppa"
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-	.string	"create_first_active_superblock"
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-	.string	"pMapPpnTbl"
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-	.string	"net_state"
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-	.string	"num_page"
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-	.string	"ftl_gc_temp_power_lost_recovery_flag"
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-	.string	"totle_num"
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-	.string	"Index"
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-	.string	"next_free_active_page"
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-	.string	"spperBlk"
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-	.string	"IRQ_STACK_START"
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-	.string	"verify"
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-	.string	"ftl_set_blk_mode"
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-	.string	"NETLOOP_RESTART"
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-	.string	"uint8"
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-	.string	"write_page_count"
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-	.string	"Ftl_gc_temp_data_write_back"
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-	.string	"erase_blk"
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-	.string	"re_save_vpndata"
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-	.string	"p_valid_page_count_check_table"
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-	.string	"g_gc_free_blk_threshold"
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-	.string	"g_num_free_superblocks"
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-	.string	"s_addr"
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-	.string	"re_save_bbmdata"
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-	.string	"UCLASS_SYSRESET"
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-	.string	"FtlGcUpdatePage"
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-	.string	"FtlLoadFactoryBbt"
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-	.string	"sec_per_blk"
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-	.string	"UCLASS_ROOT"
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-	.string	"prog_page"
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-	.string	"activePageOffset"
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-	.string	"UCLASS_CROS_EC"
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-	.string	"c_ftl_nand_sec_pre_page_shift"
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-	.string	"IsInFreeQueue"
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-	.string	"index"
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-	.string	"select_l2p_ram_region"
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-	.string	"maxDieNum"
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-	.string	"byte_per_sec"
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-	.string	"p_data"
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-	.string	"g_recovery_page_min_ver"
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-	.string	"block_size"
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-	.string	"ih_load"
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-	.string	"FtlProgPages"
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-	.string	"error_flag"
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-	.string	"c_ftl_nand_page_pre_blk"
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-	.string	"blk_Id"
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-	.string	"UCLASS_KEY"
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-	.string	"memcpy"
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-	.string	"_datarel_start_ofs"
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-	.string	"List_Node"
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-	.string	"p_die"
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-	.string	"in_gc_mode"
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-	.string	"UCLASS_ADC"
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-	.string	"ih_arch"
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-	.string	"UCLASS_IRQ"
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-	.string	"__u8"
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-	.string	"g_gc_page_offset"
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-	.string	"net_gateway"
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-	.string	"ftl_cmp_data_ver"
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-	.string	"g_VaildLpn"
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-	.string	"p_vendor_block_valid_page_count"
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-	.string	"net_ping_ip"
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-	.string	"type"
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-	.string	"numREQ"
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-	.string	"protect"
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-	.string	"max_test_page_num"
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-	.string	"blk_id"
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-	.string	"GlobalDataVersion"
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-	.string	"erase_flag"
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-	.string	"last_refresh_data_times"
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-	.string	"totleBlkNum"
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-	.string	"saved_active_page"
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-	.string	"pTmp"
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-	.string	"add_count"
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-	.string	"ftl_gc_temp_block_bops_scan_page_addr"
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-	.string	"c_ftl_nand_type"
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-	.string	"pHead"
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-	.string	"recovery_flash_mode"
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-	.string	"UCLASS_TEST"
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-	.string	"g_buffer_superblock"
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-	.string	"node_id"
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-	.string	"c_ftl_nand_blks_per_die"
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-	.string	"image_base"
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-	.string	"UCLASS_TPM"
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-	.string	"read_req"
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-	.string	"gBbtInfo"
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-	.string	"UCLASS_MISC"
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-	.string	"sector_count"
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-	.string	"c_ftl_nand_sec_pre_page"
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-	.string	"mode"
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-	.string	"padding"
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-	.string	"p_swl_mul_table"
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-	.string	"src_ppa"
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-	.string	"ftl_gc_page_item"
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-	.string	"mem_malloc_start"
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-	.string	"UCLASS_VIDEO_CRTC"
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-	.string	"bi_ethspeed"
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-	.string	"image_header_t"
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-	.string	"pPrev"
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-	.string	"g_totle_vendor_block"
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-	.string	"superblock_id"
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-	.string	"plane"
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-	.string	"phys_addr_t"
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-	.string	"ih_type"
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-	.string	"sftl_init"
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-	.string	"unsigned char"
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-	.string	"FtlGcScanTempBlk"
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-	.string	"legacy_hdr_os_copy"
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-	.string	"vpcTbl"
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-	.string	"UCLASS_PANEL_BACKLIGHT"
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-	.string	"activeSuperblockId"
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-	.string	"ver1"
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-	.string	"nand_phy_info"
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-	.string	"ftl_free_no_use_map_blk"
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-	.string	"P2V_block_in_plane"
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-	.string	"str1"
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-	.string	"str2"
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-	.string	"pMapHeader"
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-	.string	"UCLASS_TEST_BUS"
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-	.string	"FtlScanSysBlk"
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-	.string	"bi_arm_freq"
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-	.string	"lookup_ppa_ver"
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-	.string	"region_num"
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-	.string	"p_l2p_map_buf"
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-	.string	"gp_last_act_superblock"
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-	.string	"Ftl_log2"
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-	.string	"p_sys_spare_buf"
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-	.string	"UCLASS_LED"
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-	.string	"p_current"
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-	.string	"get_new_id"
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-	.string	"net_rx_packet_len"
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-	.string	"net_null_ethaddr"
-.LASF542:
-	.string	"g_ect_tbl_power_up_flush"
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-	.string	"physical_block"
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-	.string	"flash_id"
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-	.string	"absolute_sector"
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-	.string	"load_addr"
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-	.string	"PowerLostTimes"
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-	.string	"g_gc_bad_block_temp_tbl"
-.LASF884:
-	.string	"kfree"
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-	.string	"p_blk_mode_table"
-.LASF775:
-	.string	"List_remove_node"
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-	.string	"reserved_blk"
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-	.string	"pBuf"
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-	.string	"g_active_superblock"
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-	.string	"recovery_super_page"
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-	.string	"req_sys"
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-	.string	"available_pages"
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-	.string	"high"
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-	.string	"nscts"
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-	.string	"c_ftl_nand_reserved_blks"
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-	.string	"FtlL2PDataInit"
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-	.string	"init"
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-	.string	"UCLASS_CHARGE_DISPLAY"
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-	.string	"check"
-.LASF145:
-	.string	"UCLASS_USB_EMUL"
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-	.string	"FtlFreeSysBlkQueueInit"
-.LASF677:
-	.string	"FtlRecoverySuperblock"
-.LASF396:
-	.string	"c_ftl_nand_planes_per_die"
-.LASF405:
-	.string	"c_ftl_nand_page_pre_super_blk"
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-	.string	"ecc_bits"
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-	.string	"nand_ops"
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-	.string	"tmp_blk"
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-	.string	"g_gc_head_data_block"
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-	.string	"FtlWrite"
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-	.string	"UCLASS_PINCTRL"
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-	.string	"num_lpa"
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-	.string	"blkNum"
-.LASF364:
-	.string	"SlcPartLbaEndSector"
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-	.string	"fdt32_t"
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-	.string	"g_totle_map_block"
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-	.string	"value"
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-	.string	"UCLASS_WDT"
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-	.string	"image_len"
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-	.string	"req_gc"
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-	.string	"is_sys_blk"
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-	.string	"memory"
-.LASF820:
-	.string	"bitmap"
-.LASF319:
-	.string	"ftl_ect_tbl_info"
-.LASF205:
-	.string	"UCLASS_USB_DEV_GENERIC"
-.LASF212:
-	.string	"UCLASS_FG"
-.LASF755:
-	.string	"lastMapBlk"
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-	.string	"totle_write_sector"
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-	.string	"g_ftl_nand_free_count"
-.LASF626:
-	.string	"p_gc_page"
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-	.string	"errno"
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-	.string	"gNandPhyInfo"
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-	.string	"ven_blk"
-.LASF30:
-	.string	"size"
-.LASF244:
-	.string	"net_hostname"
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-	.string	"List_pop_head_node"
-.LASF308:
-	.string	"BlkNum"
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-	.string	"sys_bad_block_cnt"
-.LASF598:
-	.string	"p_dataHeader"
-.LASF780:
-	.string	"tmp_id"
-.LASF602:
-	.string	"FtlReadRefresh"
-.LASF645:
-	.string	"free_blk_index"
-.LASF819:
-	.string	"FtlBbt2Bitmap"
-.LASF662:
-	.string	"ftl_check_vpc"
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-	.string	"legacy_hdr_os"
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-	.string	"image_start"
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-	.string	"page_index"
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-	.string	"uint8_t"
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-	.string	"bi_bootflags"
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-	.string	"g_gc_superblock"
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-	.string	"ftl_sys_info"
-.LASF87:
-	.string	"ih_hcrc"
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-	.string	"front"
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-	.string	"UCLASS_PANEL"
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-	.string	"p_vendor_block_ver_table"
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-	.string	"UCLASS_USB"
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-	.string	"g_totle_slc_erase_count"
-.LASF460:
-	.string	"g_totle_swl_count"
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-	.string	"UCLASS_TEST_FDT"
-.LASF294:
-	.string	"get_bad_blk_list"
-.LASF343:
-	.string	"gcTempSuperblockId"
-.LASF238:
-	.string	"eth_current"
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-	.string	"node_valid_page_count"
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-	.string	"bi_dsp_freq"
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-	.string	"uchar"
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-	.string	"pages"
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-	.string	"ih_size"
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-	.string	"addr"
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-	.string	"UCLASS_SPI_EMUL"
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-	.string	"FtlMemInit"
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-	.string	"write_count"
-.LASF663:
-	.string	"prev_ppa"
-.LASF588:
-	.string	"FlashTestBlk"
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-	.string	"UCLASS_PCI_GENERIC"
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-	.string	"bi_sramstart"
-.LASF66:
-	.string	"FIQ_STACK_START"
-.LASF871:
-	.string	"rknand_proc_ftlread"
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-	.string	"enetaddr"
-.LASF181:
-	.string	"UCLASS_PINCONFIG"
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-	.string	"l2p_region_id"
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-	.string	"check_buf"
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-	.string	"UCLASS_RESET"
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-	.string	"UCLASS_DEMO"
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-	.string	"bd_info"
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-	.string	"nand_req"
-.LASF356:
-	.string	"slc_erase_count"
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-	.string	"bi_busfreq"
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-	.string	"prev_multiplier_value"
-.LASF496:
-	.string	"g_gc_next_blk"
-.LASF515:
-	.string	"g_min_erase_count"
-.LASF149:
-	.string	"UCLASS_BLK"
-.LASF545:
-	.string	"gc_discard_updated"
-.LASF737:
-	.string	"FtlVendorPartWrite"
-.LASF621:
-	.string	"FtlGcFreeTempBlock"
-.LASF248:
-	.string	"net_ip"
-.LASF229:
-	.string	"iobase"
-.LASF657:
-	.string	"GetFreeBlockMinEraseCount"
-.LASF788:
-	.string	"remalloc"
-.LASF336:
-	.string	"activeFlashMode"
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-	.string	"ih_dcrc"
-.LASF35:
-	.string	"flash_info_t"
-.LASF655:
-	.string	"GetFreeBlockMaxEraseCount"
-.LASF711:
-	.string	"sblk"
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-	.string	"ftl_map_blk_gc"
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-	.string	"printf"
-.LASF59:
-	.string	"bi_intfreq"
-.LASF223:
-	.string	"save_addr"
-.LASF537:
-	.string	"TotleReadBufferCount1"
-.LASF566:
-	.string	"request"
-.LASF330:
-	.string	"regionId"
-.LASF166:
-	.string	"UCLASS_LPC"
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-	.string	"blk_per_die"
-.LASF352:
-	.string	"gc_page_count"
-.LASF49:
-	.string	"bi_flashoffset"
-.LASF540:
-	.string	"TotleReadBufferMatchCount"
-.LASF438:
-	.string	"req_read"
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-	.string	"Ftl_write_map_blk_to_last_page"
-.LASF465:
-	.string	"p_map_block_valid_page_count"
-.LASF167:
-	.string	"UCLASS_MAILBOX"
-.LASF792:
-	.string	"FtlFreeSysBlkQueueIn"
-.LASF366:
-	.string	"readErrorCount"
-.LASF587:
-	.string	"sftl_gc"
-.LASF795:
-	.string	"FtlFreeSysBlkQueueEmpty"
-.LASF762:
-	.string	"load_l2p_region"
-.LASF639:
-	.string	"p_superblock"
-.LASF301:
-	.string	"fBbtBlk"
-.LASF77:
-	.string	"off_mem_rsvmap"
-.LASF444:
-	.string	"p_sys_data_buf"
-.LASF883:
-	.string	"l2p_addr_tran"
-.LASF164:
-	.string	"UCLASS_KEYBOARD"
-.LASF287:
-	.string	"page_per_slc_blk"
-.LASF398:
-	.string	"c_ftl_nand_blks_per_die_shift"
-.LASF738:
-	.string	"log2phys"
-.LASF477:
-	.string	"p_data_block_list_table"
-.LASF171:
-	.string	"UCLASS_MOD_EXP"
-.LASF644:
-	.string	"num_bad_block"
-.LASF85:
-	.string	"image_header"
-.LASF701:
-	.string	"FtlLoadVonderInfo"
-.LASF613:
-	.string	"pSuperblock"
-.LASF534:
-	.string	"ftl_temp_buf"
-.LASF384:
-	.string	"flash_mode"
-.LASF513:
-	.string	"g_totle_mlc_erase_count"
-.LASF79:
-	.string	"last_comp_version"
-.LASF415:
-	.string	"c_ftl_nand_map_blks_per_plane"
-.LASF809:
-	.string	"re_try_next_blk"
-.LASF56:
-	.string	"bi_ip_addr"
-.LASF578:
-	.string	"block_index"
-.LASF36:
-	.string	"flash_info"
-.LASF495:
-	.string	"g_gc_cur_blk_max_valid_pages"
-.LASF16:
-	.string	"ushort"
-.LASF763:
-	.string	"phyAddr"
-.LASF73:
-	.string	"magic"
-.LASF875:
-	.string	"memset"
-.LASF242:
-	.string	"net_dns_server"
-.LASF561:
-	.string	"ftl_memset"
-.LASF829:
-	.string	"end_lpa"
-.LASF882:
-	.string	"/home/ldq/rk-linux/u-boot-debug"
-.LASF735:
-	.string	"result"
-.LASF625:
-	.string	"scan_page_num"
-.LASF267:
-	.string	"NETLOOP_SUCCESS"
-.LASF27:
-	.string	"name"
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-	.string	"g_totle_cache_write_count"
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-	.string	"node_multiplier_value"
-.LASF758:
-	.string	"blk_index"
-.LASF69:
-	.string	"_datarellocal_start_ofs"
-.LASF288:
-	.string	"sec_per_page"
-.LASF409:
-	.string	"c_ftl_nand_byte_pre_oob"
-.LASF121:
-	.string	"fit_hdr_setup"
-.LASF150:
-	.string	"UCLASS_CLK"
-.LASF686:
-	.string	"detected_error_page"
-.LASF129:
-	.string	"initrd_end"
-.LASF619:
-	.string	"read_super_page"
-.LASF219:
-	.string	"monitor_flash_len"
-.LASF620:
-	.string	"FtlGcPageVarInit"
-.LASF821:
-	.string	"FtlBbtInfoPrint"
-.LASF529:
-	.string	"c_mlc_erase_count_value"
-.LASF550:
-	.string	"mem_malloc_brk"
-.LASF482:
-	.string	"g_num_data_superblocks"
-.LASF753:
-	.string	"blkTbl"
-.LASF348:
-	.string	"mlc_erase_count"
-.LASF12:
-	.string	"phys_size_t"
-.LASF715:
-	.string	"FtlLoadEctTbl"
-.LASF62:
-	.string	"bi_boot_params"
-.LASF214:
-	.string	"UCLASS_RC"
-.LASF51:
-	.string	"bi_sramsize"
-.LASF879:
-	.string	"sprintf"
-.LASF607:
-	.string	"FtlGcMarkBadPhyBlk"
-.LASF641:
-	.string	"allocate_new_data_superblock"
-.LASF13:
-	.string	"sizetype"
-.LASF57:
-	.string	"bi_enetaddr"
-.LASF252:
-	.string	"net_rx_packet"
-.LASF350:
-	.string	"GlobalSysVersion"
-.LASF329:
-	.string	"ftl_map_blk_header"
-.LASF599:
-	.string	"gc_next_superblock"
-.LASF811:
-	.string	"blkAddr"
-.LASF193:
-	.string	"UCLASS_SCSI"
-.LASF0:
-	.string	"short unsigned int"
-.LASF4:
-	.string	"signed char"
-.LASF250:
-	.string	"net_tx_packet"
-.LASF696:
-	.string	"current_ppa_ver"
-.LASF784:
-	.string	"tmp_multiplier_value"
-.LASF565:
-	.string	"FlashEraseBlocks"
-.LASF33:
-	.string	"start"
-.LASF828:
-	.string	"start_lpa"
-.LASF552:
-	.string	"current"
-.LASF218:
-	.string	"LOGF_MAX_CATEGORIES"
-.LASF517:
-	.string	"g_totle_sys_slc_erase_count"
-.LASF300:
-	.string	"prev_id"
-.LASF276:
-	.string	"status"
-.LASF103:
-	.string	"comp"
-.LASF325:
-	.string	"count"
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-	.string	"prev"
-.LASF423:
-	.string	"c_ftl_nand_data_op_blks_per_plane"
-.LASF650:
-	.string	"min_ec_id"
-.LASF388:
-	.string	"phyBlk"
-.LASF260:
-	.string	"net_boot_file_size"
-.LASF412:
-	.string	"c_ftl_nand_map_region_num"
-.LASF665:
-	.string	"FtlVpcCheckAndModify"
-.LASF127:
-	.string	"ft_len"
-.LASF188:
-	.string	"UCLASS_REGULATOR"
-.LASF311:
-	.string	"pBlkVerTbl"
-.LASF488:
-	.string	"g_sys_save_data"
-.LASF124:
-	.string	"rd_start"
 	.hidden	free
diff --git a/drivers/rkflash/rksfc_base.c b/drivers/rkflash/rksfc_base.c
index 614cbe36d0..299197250e 100644
--- a/drivers/rkflash/rksfc_base.c
+++ b/drivers/rkflash/rksfc_base.c
@@ -9,6 +9,7 @@
 #include <dm.h>
 #include <dm/device-internal.h>
 #include <asm/arch/clock.h>
+#include <rksfc.h>
 
 #include "rkflash_blk.h"
 #include "rkflash_api.h"
diff --git a/drivers/rkflash/sfc_nand.c b/drivers/rkflash/sfc_nand.c
index 51edb6fcb0..f2d394929a 100644
--- a/drivers/rkflash/sfc_nand.c
+++ b/drivers/rkflash/sfc_nand.c
@@ -8,11 +8,11 @@
 #include <linux/bug.h>
 #include <linux/delay.h>
 
-#include "flash.h"
 #include "flash_com.h"
+#include "rkflash_debug.h"
+#include "rk_sftl.h"
 #include "sfc.h"
 #include "sfc_nand.h"
-#include "rkflash_debug.h"
 
 static struct nand_info spi_nand_tbl[] = {
 	/* TC58CVG0S0HxAIx */
@@ -559,7 +559,7 @@ u32 sfc_nand_init(void)
 	PRINT_SFC_I("...%s enter...\n", __func__);
 
 	sfc_nand_read_id_raw(id_byte);
-	PRINT_SFC_E("sfc_nand id: %x %x %x\n",
+	PRINT_SFC_I("sfc_nand id: %x %x %x\n",
 		    id_byte[0], id_byte[1], id_byte[2]);
 	if (id_byte[0] == 0xFF || id_byte[0] == 0x00)
 		return FTL_NO_FLASH;
diff --git a/drivers/rkflash/sfc_nand.h b/drivers/rkflash/sfc_nand.h
old mode 100755
new mode 100644
index d5f0086ac7..7b0b8318b1
--- a/drivers/rkflash/sfc_nand.h
+++ b/drivers/rkflash/sfc_nand.h
@@ -117,7 +117,11 @@ struct nand_info {
 	u32 (*ecc_status)(void);
 };
 
+extern struct nand_phy_info	g_nand_phy_info;
+extern struct nand_ops		g_nand_ops;
+
 u32 sfc_nand_init(void);
+void sfc_nand_deinit(void);
 int sfc_nand_read_id(u8 *buf);
 u32 sfc_nand_ecc_status_sp1(void);
 u32 sfc_nand_ecc_status_sp3(void);
diff --git a/drivers/rkflash/sfc_nor.c b/drivers/rkflash/sfc_nor.c
index 1a1cd01492..4d074d5789 100644
--- a/drivers/rkflash/sfc_nor.c
+++ b/drivers/rkflash/sfc_nor.c
@@ -526,7 +526,7 @@ int snor_init(struct SFNOR_DEV *p_dev)
 
 	memset(p_dev, 0, sizeof(struct SFNOR_DEV));
 	snor_read_id(id_byte);
-	PRINT_SFC_E("sfc nor id: %x %x %x\n",
+	PRINT_SFC_I("sfc nor id: %x %x %x\n",
 		    id_byte[0], id_byte[1], id_byte[2]);
 	if (0xFF == id_byte[0] || 0x00 == id_byte[0]) {
 		err = SFC_ERROR;
diff --git a/drivers/rkflash/typedef.h b/drivers/rkflash/typedef.h
index ca20ceeb18..04e2723e0e 100644
--- a/drivers/rkflash/typedef.h
+++ b/drivers/rkflash/typedef.h
@@ -29,15 +29,4 @@
 #define INVALID_UINT16	((u16)0xFFFF)
 #define INVALID_UINT32	((u32)0xFFFFFFFFL)
 
-#define PRINT_E	pr_info
-#define PRINT_I	pr_info
-
-void *ftl_malloc(int n_size);
-void *ftl_memset(void *s, int c, unsigned int n);
-void *ftl_memcpy(void *pv_to,
-		 const void *pv_from,
-		 unsigned int size);
-void ftl_free(void *p);
-void rknand_print_hex(char *s, void *buf, int width, int len);
-
 #endif  /*__TYPEDEF_H */

commit 3872c3f472bbb32fcf8477eb11c65d1281e89935
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Thu Jul 26 23:12:33 2018 +0800

    drvers: block: blk-uclass: add SPI Flash blk devices
    
    1.Add SPI Flash blk devices;
    2.Remove unused RKSFC blk devices.
    
    Change-Id: I0c570798875b4dddf7dfc651f992d2e8eb725228
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
index 4e000b9e8a..ed7392ecd0 100644
--- a/drivers/block/blk-uclass.c
+++ b/drivers/block/blk-uclass.c
@@ -25,7 +25,8 @@ static const char *if_typename_str[IF_TYPE_COUNT] = {
 	[IF_TYPE_SYSTEMACE]	= "ace",
 	[IF_TYPE_NVME]		= "nvme",
 	[IF_TYPE_RKNAND]	= "rknand",
-	[IF_TYPE_RKSFC]		= "rksfc",
+	[IF_TYPE_SPINAND]	= "spinand",
+	[IF_TYPE_SPINOR]	= "spinor",
 };
 
 static enum uclass_id if_type_uclass_id[IF_TYPE_COUNT] = {
@@ -40,7 +41,8 @@ static enum uclass_id if_type_uclass_id[IF_TYPE_COUNT] = {
 	[IF_TYPE_HOST]		= UCLASS_ROOT,
 	[IF_TYPE_NVME]		= UCLASS_NVME,
 	[IF_TYPE_RKNAND]	= UCLASS_RKNAND,
-	[IF_TYPE_RKSFC]		= UCLASS_SPI_FLASH,
+	[IF_TYPE_SPINAND]	= UCLASS_SPI_FLASH,
+	[IF_TYPE_SPINOR]	= UCLASS_SPI_FLASH,
 	[IF_TYPE_SYSTEMACE]	= UCLASS_INVALID,
 };
 
diff --git a/include/blk.h b/include/blk.h
index f925832237..d8e3825454 100644
--- a/include/blk.h
+++ b/include/blk.h
@@ -35,7 +35,6 @@ enum if_type {
 	IF_TYPE_SYSTEMACE,
 	IF_TYPE_NVME,
 	IF_TYPE_RKNAND,
-	IF_TYPE_RKSFC,
 	IF_TYPE_SPINAND,
 	IF_TYPE_SPINOR,
 

commit 3f360b79311b333bbf59ffb4525c37f570cb57fc
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Thu Jul 26 21:59:44 2018 +0800

    rockchip: bootcmd: change rksfc to spi flash devices in bootdev
    
    1.Under the control of sfc, SPI Nand and SPI Nor are registered as two
    different if_type block dev and are both the child_dev of sfc:
            a.Dev 0: blk_dev "rkflash", devenum 0, if_type SpiNand
            b.Dev 1: blk_dev "rkflash", devenum 1, if_type SpiNor
    
    Change-Id: Iaa90fdc5c0926495c989189b9ef9e317b70f23a4
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index 4df4e0ef1e..38ff08a57f 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -92,8 +92,10 @@
 		"setenv devtype mmc; setenv devnum 0;" \
 	"elif rknand dev 0; then " \
 		"setenv devtype rknand; setenv devnum 0;" \
-        "elif rksfc dev 0; then " \
-                "setenv devtype rksfc; setenv devnum 0;" \
+	"elif rksfc dev 0; then " \
+		"setenv devtype spinand; setenv devnum 0;" \
+	"elif rksfc dev 1; then " \
+		"setenv devtype spinor; setenv devnum 1;" \
 	"fi; \0"
 
 #define RKIMG_BOOTCOMMAND \

commit aa16b1f80312183f6bebceb1efe5f9499b9526e5
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Thu Jul 26 21:44:39 2018 +0800

    cmd: rksfc: change dev if_type
    
    1.In rkflash driver, SPI Nand and SPI Nor are registered as two
    different if_type
    block dev. They are both the child_dev of sfc;
    2.Here we send cmd to "rksfc" to operate it's child-dev spi flash device.
    
    Change-Id: I9314ef9c556f8cfbe023021bd66bebec137a4e71
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/cmd/rksfc.c b/cmd/rksfc.c
index f4b4a317d7..b0cf3ae120 100644
--- a/cmd/rksfc.c
+++ b/cmd/rksfc.c
@@ -13,6 +13,12 @@ static int rksfc_curr_dev;
 static int do_rksfc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
 	int ret;
+	u32 dev_type = IF_TYPE_UNKNOWN;
+
+	if (rksfc_curr_dev == 0)
+		dev_type = IF_TYPE_SPINAND;
+	else if (rksfc_curr_dev == 1)
+		dev_type = IF_TYPE_SPINOR;
 
 	if (argc == 2) {
 		if (strncmp(argv[1], "scan", 4) == 0) {
@@ -24,7 +30,16 @@ static int do_rksfc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 		}
 	}
 
-	return blk_common_cmd(argc, argv, IF_TYPE_RKSFC, &rksfc_curr_dev);
+	if (argc == 3) {
+		if (strncmp(argv[1], "dev", 3) == 0) {
+			if ((int)simple_strtoul(argv[2], NULL, 10) == 0)
+				dev_type = IF_TYPE_SPINAND;
+			else
+				dev_type = IF_TYPE_SPINOR;
+		}
+	}
+
+	return blk_common_cmd(argc, argv, dev_type, &rksfc_curr_dev);
 }
 
 U_BOOT_CMD(
@@ -33,6 +48,8 @@ U_BOOT_CMD(
 	"scan - scan Sfc devices\n"
 	"rksfc info - show all available Sfc devices\n"
 	"rksfc device [dev] - show or set current Sfc device\n"
+	"      dev 0 - spinand\n"
+	"      dev 1 - spinor\n"
 	"rksfc part [dev] - print partition table of one or all Sfc devices\n"
 	"rksfc read addr blk# cnt - read `cnt' blocks starting at block\n"
 	"     `blk#' to memory address `addr'\n"

commit c8638ec3c0fb9b79df3640a14f568b1e643f8864
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Thu Jul 26 21:41:26 2018 +0800

    common: boot_rkimg: add SPI flash boot type
    
    Change-Id: I9d1d36390833387a93eb7ed76b1d6f90e3640edb
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
old mode 100755
new mode 100644
index 4de48926ea..37b58c4f6c
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -171,9 +171,12 @@ int get_bootdev_type(void)
 	} else if (!strcmp(devtype, "rknand")) {
 		type = IF_TYPE_RKNAND;
 		boot_media = "nand";
-	} else if (!strcmp(devtype, "rksfc")) {
-		type = IF_TYPE_RKSFC;
+	} else if (!strcmp(devtype, "spinand")) {
+		type = IF_TYPE_SPINAND;
 		boot_media = "nand"; /* kernel treat sfc nand as nand device */
+	} else if (!strcmp(devtype, "spinor")) {
+		type = IF_TYPE_SPINOR;
+		boot_media = "nor";
 	} else {
 		/* Add new to support */
 	}
@@ -185,7 +188,9 @@ int get_bootdev_type(void)
 		 * 2. rknand doesn't need "androidboot.mode=";
 		 */
 		if (env_exist("bootargs", "androidboot.mode=charger") ||
-		    (type == IF_TYPE_RKNAND) || (type == IF_TYPE_RKSFC))
+		    (type == IF_TYPE_RKNAND) ||
+		    (type == IF_TYPE_SPINAND) ||
+		    (type == IF_TYPE_SPINOR))
 			snprintf(boot_options, sizeof(boot_options),
 				 "storagemedia=%s", boot_media);
 		else

commit 4c0421560de016138235050e908e36d6768c4ec6
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Thu Jul 26 21:34:11 2018 +0800

    disk: part: add SPI Flash blk_desc print
    
    1.Add SPI Flash blk_desc print;
    2.Remove RKSFC print which is unused.
    
    Change-Id: I5ef3b6936dd57cd01490176bc8877159cedadccc
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/disk/part.c b/disk/part.c
index 72d1146c94..095127dfdf 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -146,16 +146,12 @@ void dev_print (struct blk_desc *dev_desc)
 	case IF_TYPE_USB:
 	case IF_TYPE_NVME:
 	case IF_TYPE_RKNAND:
-		printf ("Vendor: %s Rev: %s Prod: %s\n",
-			dev_desc->vendor,
-			dev_desc->revision,
-			dev_desc->product);
-		break;
-	case IF_TYPE_RKSFC:
-		printf ("Vendor: %s Rev: %s Prod: %s\n",
-			dev_desc->vendor,
-			dev_desc->revision,
-			dev_desc->product);
+	case IF_TYPE_SPINAND:
+	case IF_TYPE_SPINOR:
+		printf("Vendor: %s Rev: %s Prod: %s\n",
+		       dev_desc->vendor,
+		       dev_desc->revision,
+		       dev_desc->product);
 		break;
 	case IF_TYPE_DOC:
 		puts("device type DOC\n");
@@ -291,8 +287,11 @@ static void print_part_header(const char *type, struct blk_desc *dev_desc)
 	case IF_TYPE_RKNAND:
 		puts("RKNAND");
 		break;
-	case IF_TYPE_RKSFC:
-		puts("RKSFC");
+	case IF_TYPE_SPINAND:
+		puts("SPINAND");
+		break;
+	case IF_TYPE_SPINOR:
+		puts("SPINOR");
 		break;
 	default:
 		puts ("UNKNOWN");

commit b331f5a603f3a3fae5078e353c4fb51ab63c8740
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Thu Jul 26 21:21:41 2018 +0800

    drivers: rkflash: treat spi nand and spi nor as two different block devices
    
    1.when dm sfc of-match, it will bind two kinds of spi flash devices as
    rkflash:
            a.SpiNand, devnum 0, if_type IF_TYPE_SPINAND
            b.SpiNor, devnum 1, if_type IF_TYPE_SPINOR
    2.Publish type of rkflash product.
    
    Change-Id: I393452b16640811e9b0217fe5e91e76bc84c7745
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/rkflash_blk.c b/drivers/rkflash/rkflash_blk.c
index e4b0901c08..338acd996c 100644
--- a/drivers/rkflash/rkflash_blk.c
+++ b/drivers/rkflash/rkflash_blk.c
@@ -19,7 +19,7 @@ ulong rkflash_bread(struct udevice *udev, lbaint_t start,
 	struct blk_desc *block_dev = dev_get_uclass_platdata(udev);
 	struct rkflash_info *priv = dev_get_priv(udev->parent);
 
-	debug("%s lba %x cnt %x", __func__, (u32)start, (u32)blkcnt);
+	debug("%s lba %x cnt %x\n", __func__, (u32)start, (u32)blkcnt);
 	if (blkcnt == 0)
 		return -EINVAL;
 
@@ -72,22 +72,33 @@ static int rkflash_blk_probe(struct udevice *udev)
 {
 	struct rkflash_info *priv = dev_get_priv(udev->parent);
 	struct blk_desc *desc = dev_get_uclass_platdata(udev);
-
+	char *product;
+
+	if (desc->if_type != priv->flash_con_type)
+		return  -ENODEV;
+
+	switch (priv->flash_con_type) {
+	case IF_TYPE_RKNAND:
+		product = "rkflash-NandFlash";
+		break;
+	case IF_TYPE_SPINAND:
+		product = "rkflash-SpiNand";
+		break;
+	case IF_TYPE_SPINOR:
+		product = "rkflash-SpiNor";
+		break;
+	default:
+		product = "unknown";
+		break;
+	}
 	debug("%s %d %p ndev = %p %p\n", __func__, __LINE__,
 	      udev, priv, udev->parent);
 	priv->child_dev = udev;
-	if (priv->flash_con_type == FLASH_CON_TYPE_SFC)
-		desc->if_type = IF_TYPE_RKSFC;
-	else if (priv->flash_con_type == FLASH_CON_TYPE_NANDC)
-		desc->if_type = IF_TYPE_RKNAND;
-
 	desc->lba = priv->density;
 	desc->log2blksz = 9;
-	desc->blksz = 512;
 	desc->bdev = udev;
-	desc->devnum = 0;
 	sprintf(desc->vendor, "0x%.4x", 0x0308);
-	memcpy(desc->product, "rkflash", sizeof("rkflash"));
+	memcpy(desc->product, product, strlen(product));
 	memcpy(desc->revision, "V1.00", sizeof("V1.00"));
 	part_init(desc);
 	rkflash_test(udev);
diff --git a/drivers/rkflash/rknandc_base.c b/drivers/rkflash/rknandc_base.c
index ef824e36dd..9b9de4a63d 100644
--- a/drivers/rkflash/rknandc_base.c
+++ b/drivers/rkflash/rknandc_base.c
@@ -15,7 +15,7 @@
 
 static struct flash_operation nandc_flash_op = {
 #ifdef	CONFIG_RKNANDC_NAND
-	FLASH_TYPE_NANDC_NAND,
+	IF_TYPE_RKNAND,
 	rknand_flash_init,
 	rknand_flash_get_density,
 	rknand_flash_read,
@@ -87,7 +87,7 @@ static int rockchip_nand_probe(struct udevice *udev)
 	}
 	ret = nandc_flash_op.flash_init(udev);
 	if (!ret) {
-		priv->flash_con_type = FLASH_CON_TYPE_NANDC;
+		priv->flash_con_type = nandc_flash_op.id;
 		priv->density = nandc_flash_op.flash_get_capacity(udev);
 		priv->read = nandc_flash_op.flash_read;
 		priv->write = nandc_flash_op.flash_write;
diff --git a/drivers/rkflash/rksfc_base.c b/drivers/rkflash/rksfc_base.c
index b813ae9e11..614cbe36d0 100644
--- a/drivers/rkflash/rksfc_base.c
+++ b/drivers/rkflash/rksfc_base.c
@@ -15,7 +15,7 @@
 
 static struct flash_operation sfc_nor_op = {
 #ifdef	CONFIG_RKSFC_NOR
-	FLASH_TYPE_SFC_NOR,
+	IF_TYPE_SPINOR,
 	rksfc_nor_init,
 	rksfc_nor_get_capacity,
 	rksfc_nor_read,
@@ -30,7 +30,7 @@ static struct flash_operation sfc_nor_op = {
 
 static struct flash_operation sfc_nand_op = {
 #ifdef CONFIG_RKSFC_NAND
-	FLASH_TYPE_SFC_NAND,
+	IF_TYPE_SPINAND,
 	rksfc_nand_init,
 	rksfc_nand_get_density,
 	rksfc_nand_read,
@@ -74,8 +74,12 @@ static int rksfc_blk_bind(struct udevice *udev)
 	int ret;
 
 	ret = blk_create_devicef(udev, "rkflash_blk", "blk",
-				 IF_TYPE_RKSFC,
+				 IF_TYPE_SPINAND,
 				 0, 512, 0, &bdev);
+	ret = blk_create_devicef(udev, "rkflash_blk", "blk",
+				 IF_TYPE_SPINOR,
+				 1, 512, 0, &bdev);
+
 	if (ret) {
 		debug("Cannot create block device\n");
 		return ret;
@@ -103,14 +107,14 @@ static int rockchip_rksfc_probe(struct udevice *udev)
 
 	sfc_init(priv->ioaddr);
 	for (i = 0; i < 2; i++) {
-		if (spi_flash_op[i]->id == -1) {
+		if (spi_flash_op[i]->id <= 0) {
 			debug("%s no optional spi flash for type %x\n",
 			      __func__, i);
 			continue;
 		}
 		ret = spi_flash_op[i]->flash_init(udev);
 		if (!ret) {
-			priv->flash_con_type = FLASH_CON_TYPE_SFC;
+			priv->flash_con_type = spi_flash_op[i]->id;
 			priv->density =
 				spi_flash_op[i]->flash_get_capacity(udev);
 			priv->read = spi_flash_op[i]->flash_read;

commit 9563e87b414d247aa89015c100c1fdfec5a7ea29
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Fri Jul 27 16:55:08 2018 +0800

    ARM64: invalid icache for cortex a35
    
    Different loader can not boot normally in cortex-A35,like rk3308,
    because cortex-A35 enable icache in default.
    
    Change-Id: I87f3e8a2539186f3e408fad8ea903c375118b1d9
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

diff --git a/arch/arm/include/asm/macro.h b/arch/arm/include/asm/macro.h
index 0c8652a675..61e90284ab 100644
--- a/arch/arm/include/asm/macro.h
+++ b/arch/arm/include/asm/macro.h
@@ -78,6 +78,17 @@ lr	.req	x30
 	b.eq	\el1_label
 .endm
 
+/*
+ * Branch if current processor is a Cortex-A35 core.
+ */
+.macro	branch_if_a35_core, xreg, a35_label
+	mrs	\xreg, midr_el1
+	lsr	\xreg, \xreg, #4
+	and	\xreg, \xreg, #0x00000FFF
+	cmp	\xreg, #0xD04		/* Cortex-A35 MPCore processor. */
+	b.eq	\a35_label
+.endm
+
 /*
  * Branch if current processor is a Cortex-A57 core.
  */
diff --git a/arch/arm/lib/setjmp_aarch64.S b/arch/arm/lib/setjmp_aarch64.S
index b68edb86d6..c7959e9b6c 100644
--- a/arch/arm/lib/setjmp_aarch64.S
+++ b/arch/arm/lib/setjmp_aarch64.S
@@ -37,6 +37,8 @@ ENTRY(longjmp)
 	/* Move the return value in place, but return 1 if passed 0. */
 	adds x0, xzr, x1
 	csinc x0, x0, xzr, ne
+	/* invalid icache for cortex a35 */
+branch_if_a35_core x1, __asm_invalidate_icache_all
 	ret
 ENDPROC(longjmp)
 .popsection

commit 5b580fb9ec4d6e7cae16e3ec70cea56dee9b5453
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Fri Jul 27 17:05:55 2018 +0800

    rockchip: rv1108: spl: disable SPL_LIBCOMMON/GENERIC configs
    
    remove CONFIG_SPL_LIBCOMMON_SUPPORT and CONFIG_SPL_LIBGENERIC_SUPPORT
    defconfig for reducing spl size.
    
    Change-Id: Ie7b1905c44976f8a62e2462acd455a6ec6bb8be7
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig
index 2096487043..f8b09f8a88 100644
--- a/configs/evb-rv1108_defconfig
+++ b/configs/evb-rv1108_defconfig
@@ -2,8 +2,6 @@ CONFIG_ARM=y
 # CONFIG_SPL_USE_ARCH_MEMCPY is not set
 # CONFIG_SPL_USE_ARCH_MEMSET is not set
 CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SPL_LIBCOMMON_SUPPORT=y
-CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ROCKCHIP_RV1108=y
 CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_RKIMG_BOOTLOADER=y

commit e62c13b97779616ec7f3313ca4648944532dd76e
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Wed Jul 25 18:11:24 2018 +0800

    rockchip: spl: add udelay(),hang(),memset() in spl
    
    add udelay(),hang(),memset() in spl.c when we do not config
    CONFIG_SPL_LIBGENERIC_SUPPORT.
    
    Change-Id: Ib6c5532af002b501659ee5964d3a09954f0b3fdf
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index b0de24030a..2c1ffe5ab0 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -86,6 +86,56 @@ __weak int rk_board_init_f(void)
 	return 0;
 }
 
+#ifndef CONFIG_SPL_LIBGENERIC_SUPPORT
+void udelay(unsigned long usec)
+{
+	__udelay(usec);
+}
+
+void hang(void)
+{
+	bootstage_error(BOOTSTAGE_ID_NEED_RESET);
+	for (;;)
+		;
+}
+
+/**
+ * memset - Fill a region of memory with the given value
+ * @s: Pointer to the start of the area.
+ * @c: The byte to fill the area with
+ * @count: The size of the area.
+ *
+ * Do not use memset() to access IO space, use memset_io() instead.
+ */
+void *memset(void *s, int c, size_t count)
+{
+	unsigned long *sl = (unsigned long *)s;
+	char *s8;
+
+#if !CONFIG_IS_ENABLED(TINY_MEMSET)
+	unsigned long cl = 0;
+	int i;
+
+	/* do it one word at a time (32 bits or 64 bits) while possible */
+	if (((ulong)s & (sizeof(*sl) - 1)) == 0) {
+		for (i = 0; i < sizeof(*sl); i++) {
+			cl <<= 8;
+			cl |= c & 0xff;
+		}
+		while (count >= sizeof(*sl)) {
+			*sl++ = cl;
+			count -= sizeof(*sl);
+		}
+	}
+#endif /* fill 8 bits at a time */
+	s8 = (char *)sl;
+	while (count--)
+		*s8++ = c;
+
+	return s;
+}
+#endif
+
 void board_init_f(ulong dummy)
 {
 #ifdef CONFIG_SPL_FRAMEWORK

commit d4bcb632d8b9b50458504c22f371af0f5a46bcdb
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue May 22 22:04:59 2018 +0800

    configs: evb-px30: enable vendor partition
    
    Change-Id: Ic55ef11f3164c17318f7ee1213001e0f1b800271
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index ff21ecf5c4..f9945a3cee 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -98,6 +98,7 @@ CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_DRM_ROCKCHIP_PANEL=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y

commit 6266c4934d8df5124780fdb273c779b02d087907
Author: shengfei Xu <xsf@rock-chips.com>
Date:   Thu Jul 26 16:41:07 2018 +0800

    fuel gauge: rk817: clear the OFF_CNT register
    
    Change-Id: Iab37f0a0b69a35ed56f3bef4c0d0699d4922e6bc
    Signed-off-by: shengfei Xu <xsf@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk817.c b/drivers/power/fuel_gauge/fg_rk817.c
index 5508150e72..5ba8434d05 100644
--- a/drivers/power/fuel_gauge/fg_rk817.c
+++ b/drivers/power/fuel_gauge/fg_rk817.c
@@ -621,7 +621,12 @@ static bool is_rk817_bat_first_pwron(struct rk817_battery_device *battery)
 
 static int rk817_bat_get_off_count(struct rk817_battery_device *battery)
 {
-	return rk817_bat_read(battery, OFF_CNT);
+	int value;
+
+	value = rk817_bat_read(battery, OFF_CNT);
+	rk817_bat_write(battery, OFF_CNT, 0x00);
+
+	return value;
 }
 
 static void rk817_bat_update_qmax(struct rk817_battery_device *battery,
@@ -759,7 +764,6 @@ static void rk817_bat_not_first_pwron(struct rk817_battery_device *battery)
 	battery->halt_cnt = rk817_bat_get_halt_cnt(battery);
 	battery->nac = rk817_bat_vol_to_cap(battery,
 					    battery->pwron_voltage);
-	battery->pwroff_min = rk817_bat_get_off_count(battery);
 	battery->remain_cap = pre_cap * 1000;
 	battery->is_halt = is_rk817_bat_last_halt(battery);
 

commit 4be02e281669fe7856df28456b0496c3946d0901
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Jul 26 20:51:51 2018 +0800

    rockchip: px30: enable vol+ key in pre-reloc
    
    We need vol+ key as recovery key for board to get into rockusb.
    
    Change-Id: Ia1d80cb62695fa2208744ea62a0c6fec5d1e20a8
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/px30-evb.dts b/arch/arm/dts/px30-evb.dts
index 6a21a99012..9eaa7d88e7 100644
--- a/arch/arm/dts/px30-evb.dts
+++ b/arch/arm/dts/px30-evb.dts
@@ -24,12 +24,14 @@
 	};
 
 	adc-keys {
+		u-boot,dm-pre-reloc;
 		compatible = "adc-keys";
 		io-channels = <&saradc 2>;
 		io-channel-names = "buttons";
 		keyup-threshold-microvolt = <1800000>;
 
 		vol-up-key {
+			u-boot,dm-pre-reloc;
 			linux,code = <KEY_VOLUMEUP>;
 			label = "volume up";
 			press-threshold-microvolt = <10000>;
diff --git a/arch/arm/dts/rk3326-evb.dts b/arch/arm/dts/rk3326-evb.dts
index f9c7488ce6..278a8ba6a0 100644
--- a/arch/arm/dts/rk3326-evb.dts
+++ b/arch/arm/dts/rk3326-evb.dts
@@ -24,12 +24,14 @@
 	};
 
 	adc-keys {
+		u-boot,dm-pre-reloc;
 		compatible = "adc-keys";
 		io-channels = <&saradc 2>;
 		io-channel-names = "buttons";
 		keyup-threshold-microvolt = <1800000>;
 
 		vol-up-key {
+			u-boot,dm-pre-reloc;
 			linux,code = <KEY_VOLUMEUP>;
 			label = "volume up";
 			press-threshold-microvolt = <10000>;

commit 0c53cb8fc445ebc0aae7655bc12fcde34168ff7a
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Jul 26 20:30:29 2018 +0800

    rockchip: dts: px30: enable usb gadget for rockusb
    
    Rockusb have to available so that we can use it even if there is
    no avaiable kernel/resource image.
    
    Change-Id: I39c22052f66fb7151eeb885b684d8fc1291dc3f4
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/px30-u-boot.dtsi b/arch/arm/dts/px30-u-boot.dtsi
index 555e0b1250..0e294196b5 100644
--- a/arch/arm/dts/px30-u-boot.dtsi
+++ b/arch/arm/dts/px30-u-boot.dtsi
@@ -66,3 +66,22 @@
 	u-boot,dm-pre-reloc;
 	status = "disabled";
 };
+
+&usb20_otg {
+	u-boot,dm-pre-reloc;
+};
+
+&usb2phy_grf {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&u2phy {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&u2phy_otg {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};

commit 4897499e15df4924998bfe5088fb51519ec30c7f
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Jul 26 16:39:43 2018 +0800

    clk: rockchip: rk3399: add gpll and npll init
    
    remove clk_set_defaults(), need init pll freq as kernel.
    
    Change-Id: I245d01bf65b3092c21a0c2aa06a0a6eaca8528ef
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
index 9c4104845d..97faba7324 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
@@ -82,16 +82,16 @@ check_member(rk3399_cru, sdio1_con[1], 0x594);
 #define ATCLK_CORE_HZ	(300*MHz)
 #define PCLK_DBG_HZ	(100*MHz)
 
-#define PERIHP_ACLK_HZ	(148500*KHz)
-#define PERIHP_HCLK_HZ	(148500*KHz)
-#define PERIHP_PCLK_HZ	(37125*KHz)
+#define PERIHP_ACLK_HZ	(150 * MHz)
+#define PERIHP_HCLK_HZ	(75 * MHz)
+#define PERIHP_PCLK_HZ	(37500 * KHz)
 
-#define PERILP0_ACLK_HZ	(99000*KHz)
-#define PERILP0_HCLK_HZ	(99000*KHz)
-#define PERILP0_PCLK_HZ	(49500*KHz)
+#define PERILP0_ACLK_HZ	(100 * MHz)
+#define PERILP0_HCLK_HZ	(100 * MHz)
+#define PERILP0_PCLK_HZ	(50 * MHz)
 
-#define PERILP1_HCLK_HZ	(99000*KHz)
-#define PERILP1_PCLK_HZ	(99000*KHz)
+#define PERILP1_HCLK_HZ	(100 * MHz)
+#define PERILP1_PCLK_HZ	(50 * MHz)
 
 #define PWM_CLOCK_HZ    PMU_PCLK_HZ
 
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 74ef6a64ca..4d76d66052 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -53,6 +53,8 @@ struct pll_div {
 #if !defined(CONFIG_SPL_BUILD)
 static const struct pll_div ppll_init_cfg = PLL_DIVISORS(PPLL_HZ, 2, 2, 1);
 #endif
+static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 1, 6, 1);
+static const struct pll_div npll_init_cfg = PLL_DIVISORS(NPLL_HZ, 1, 3, 1);
 static const struct pll_div apll_1600_cfg = PLL_DIVISORS(1600*MHz, 3, 1, 1);
 static const struct pll_div apll_600_cfg = PLL_DIVISORS(600*MHz, 1, 2, 1);
 
@@ -1153,7 +1155,7 @@ static void rkclk_init(struct rk3399_cru *cru)
 	rk_clrsetreg(&cru->clksel_con[56], 0x0003, 0x0003);
 
 	/* configure perihp aclk, hclk, pclk */
-	aclk_div = GPLL_HZ / PERIHP_ACLK_HZ - 1;
+	aclk_div = DIV_ROUND_UP(GPLL_HZ, PERIHP_ACLK_HZ) - 1;
 	assert((aclk_div + 1) * PERIHP_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
 
 	hclk_div = PERIHP_ACLK_HZ / PERIHP_HCLK_HZ - 1;
@@ -1173,7 +1175,7 @@ static void rkclk_init(struct rk3399_cru *cru)
 		     aclk_div << ACLK_PERIHP_DIV_CON_SHIFT);
 
 	/* configure perilp0 aclk, hclk, pclk */
-	aclk_div = GPLL_HZ / PERILP0_ACLK_HZ - 1;
+	aclk_div = DIV_ROUND_UP(GPLL_HZ, PERILP0_ACLK_HZ) - 1;
 	assert((aclk_div + 1) * PERILP0_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
 
 	hclk_div = PERILP0_ACLK_HZ / PERILP0_HCLK_HZ - 1;
@@ -1193,7 +1195,7 @@ static void rkclk_init(struct rk3399_cru *cru)
 		     aclk_div << ACLK_PERILP0_DIV_CON_SHIFT);
 
 	/* perilp1 hclk select gpll as source */
-	hclk_div = GPLL_HZ / PERILP1_HCLK_HZ - 1;
+	hclk_div = DIV_ROUND_UP(GPLL_HZ, PERILP1_HCLK_HZ) - 1;
 	assert((hclk_div + 1) * PERILP1_HCLK_HZ ==
 	       GPLL_HZ && (hclk_div <= 0x1f));
 
@@ -1207,6 +1209,9 @@ static void rkclk_init(struct rk3399_cru *cru)
 		     pclk_div << PCLK_PERILP1_DIV_CON_SHIFT |
 		     hclk_div << HCLK_PERILP1_DIV_CON_SHIFT |
 		     HCLK_PERILP1_PLL_SEL_GPLL << HCLK_PERILP1_PLL_SEL_SHIFT);
+
+	rkclk_set_pll(&cru->gpll_con[0], &gpll_init_cfg);
+	rkclk_set_pll(&cru->npll_con[0], &npll_init_cfg);
 }
 
 static int rk3399_clk_probe(struct udevice *dev)

commit cadc8d74e2348c994fe805cbbec0a955bb4d333d
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Jul 26 15:03:00 2018 +0800

    clock: remove clk_set_defaults() in device core
    
    We do not need to assign-clock for every driver in Rockchip platform,
    only below module need this feature, remove it for boot time optimize:
    - GMAC (need set parent from dts)
    - CRU ARM clock (rockchip board will call set_armclk_rate() instead)
    - VOP (need set parent)
    
    Change-Id: Ie8facfb7499323f4649e0e1d908f850de1338e12
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/core/device.c b/drivers/core/device.c
index e3b15fd121..f2261d7c94 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -423,11 +423,6 @@ int device_probe(struct udevice *dev)
 			goto fail;
 	}
 
-	/* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
-	ret = clk_set_defaults(dev);
-	if (ret)
-		debug("%s clk_set_defaults failed %d\n", __func__, ret);
-
 	if (drv->probe) {
 		ret = drv->probe(dev);
 		if (ret) {
diff --git a/drivers/net/gmac_rockchip.c b/drivers/net/gmac_rockchip.c
index 1eb7ce1aa1..172d423e2e 100644
--- a/drivers/net/gmac_rockchip.c
+++ b/drivers/net/gmac_rockchip.c
@@ -459,6 +459,11 @@ static int gmac_rockchip_probe(struct udevice *dev)
 	ulong rate;
 	int ret;
 
+	/* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
+	ret = clk_set_defaults(dev);
+	if (ret)
+		debug("%s clk_set_defaults failed %d\n", __func__, ret);
+
 	ret = clk_get_by_index(dev, 0, &clk);
 	if (ret)
 		return ret;
diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index 0d20bf1b53..74813bf3bd 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -241,10 +241,10 @@ static int rockchip_vop_init(struct display_state *state)
 	vop->version = vop_data->version;
 	vop->max_output = vop_data->max_output;
 
-	/*
-	 * TODO:
-	 * Set Dclk pll parent
-	 */
+	/* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
+	ret = clk_set_defaults(crtc_state->dev);
+	if (ret)
+		debug("%s clk_set_defaults failed %d\n", __func__, ret);
 
 	ret = clk_get_by_name(crtc_state->dev, "dclk_vop", &dclk);
 	if (!ret)

commit 596700d74b5076e13a41492da9ada0dd2d8276f8
Author: Shunqian Zheng <zhengsq@rock-chips.com>
Date:   Thu Jul 26 15:25:16 2018 +0800

    make.sh: fix the broken of px3se loader/trust packing
    
    PX3SE loader/trust packing was broken since
      d443b7d make.sh: parse RKCHIP from .config
    
    This fixs px3se building with previous commit. And since we're
    here, detecting the variant gracefully.
    
    Change-Id: I5c7f5385a4cfd0d6beba842bd4766b77d8f67d88
    Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>

diff --git a/make.sh b/make.sh
index 071f3f7787..aeef535c48 100755
--- a/make.sh
+++ b/make.sh
@@ -288,28 +288,27 @@ select_chip_info()
 	local target_board item value
 
 	# Read RKCHIP firstly from .config
-	count=`grep -c '^CONFIG_ROCKCHIP_[R,P][X,V,K][0-9][0-9]' ${OUTDIR}/.config`
-	RKCHIP=`grep '^CONFIG_ROCKCHIP_[R,P][X,V,K][0-9][0-9]' ${OUTDIR}/.config`
+	# The regular expression that matching:
+	#  - PX30, PX3SE
+	#  - RK????, RK????X
+	#  - RV????
+	local chip_reg='^CONFIG_ROCKCHIP_[R,P][X,V,K][0-9ESX]{2,5}'
+	count=`egrep -c ${chip_reg} ${OUTDIR}/.config`
+	# Obtain the matching only
+	RKCHIP=`egrep -o ${chip_reg} ${OUTDIR}/.config`
 
 	if [ $count -eq 1 ]; then
-		RKCHIP=${RKCHIP%=*}
 		RKCHIP=${RKCHIP##*_}
 	elif [ $count -gt 1 ]; then
-		# Is RK3126 ?
-		plat=`grep '^CONFIG_ROCKCHIP_[R,P][X,V,K][0-9][0-9]' ${OUTDIR}/.config | sed -n "/CONFIG_ROCKCHIP_RK3126=y/p"`
-		if [ "$plat" = 'CONFIG_ROCKCHIP_RK3126=y' ]; then
-			RKCHIP=RK3126
-		fi
-		# Is RK3326 ?
-		plat=`grep '^CONFIG_ROCKCHIP_[R,P][X,V,K][0-9][0-9]' ${OUTDIR}/.config | sed -n "/CONFIG_ROCKCHIP_RK3326=y/p"`
-		if [ "$plat" = 'CONFIG_ROCKCHIP_RK3326=y' ]; then
-			RKCHIP=RK3326
-		fi
-		# Is RK3128X ?
-		plat=`grep '^CONFIG_ROCKCHIP_[R,P][X,V,K][0-9][0-9]' ${OUTDIR}/.config | sed -n "/CONFIG_ROCKCHIP_RK3128X=y/p"`
-		if [ "$plat" = 'CONFIG_ROCKCHIP_RK3128X=y' ]; then
-			RKCHIP=RK3128X
-		fi
+		# Grep the RK CHIP variant
+		grep '^CONFIG_ROCKCHIP_PX3SE=y' ${OUTDIR}/.config > /dev/null \
+			&& RKCHIP=PX3SE
+		grep '^CONFIG_ROCKCHIP_RK3126=y' ${OUTDIR}/.config >/dev/null \
+			&& RKCHIP=RK3126
+		grep '^CONFIG_ROCKCHIP_RK3326=y' ${OUTDIR}/.config >/dev/null \
+			&& RKCHIP=RK3326
+		grep '^CONFIG_ROCKCHIP_RK3128X=y' ${OUTDIR}/.config >/dev/null \
+			&& RKCHIP=RK3128X
 	else
 		echo "Can't get Rockchip SoC definition in .config"
 		exit 1
@@ -463,7 +462,7 @@ pack_trust_image()
 		TOS=$(echo ${TOS} | sed "s/tools\/rk_tools\//\.\//g")
 		TOS_TA=$(echo ${TOS_TA} | sed "s/tools\/rk_tools\//\.\//g")
 
-		if [ $TOS_TA -a $TOS ]; then
+		if [ x$TOS_TA != x -a x$TOS != x ]; then
 			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS} ./trust.img ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
 			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ./trust_with_ta.img ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
 			echo "Both trust.img and trust_with_ta.img are ready"

commit f094cb29545c1c03e4929fd812ac6b9a8b190e6a
Author: Shunqian Zheng <zhengsq@rock-chips.com>
Date:   Thu Jul 26 15:22:20 2018 +0800

    rockchip: add PX3SE kconfig
    
    PX3SE is a variant of RK3128, especially the loader and trust img.
    
    Change-Id: I91f417957b5f3db503fdaa8f2f6c3271f46094b6
    Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index dd028bba50..dcce0cbd70 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -77,6 +77,12 @@ config ROCKCHIP_RK3126
 	  RK3126 can use most code from RK3128, but at some situations we have
 	  to distinguish between RK3126 and RK3128, so this macro gives help.
 	  It is usually selected in rk3126 board defconfig.
+
+config ROCKCHIP_PX3SE
+	bool "Support Rockchip PX3SE"
+	help
+	  PX3SE is a variant of RK3128, it shares codes with RK3128, but we still
+	  need this macro to distinguish PX3SE and RK3128.
 endif
 
 config ROCKCHIP_RK3066
diff --git a/configs/evb-px3se_defconfig b/configs/evb-px3se_defconfig
index c2e524e939..43e453a914 100644
--- a/configs/evb-px3se_defconfig
+++ b/configs/evb-px3se_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_ROCKCHIP_RK3128=y
+CONFIG_ROCKCHIP_PX3SE=y
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_DEFAULT_DEVICE_TREE="px3se-evb"
 CONFIG_DEBUG_UART=y

commit 9b95292d1a5af3a58ddf751cc92f17213130d7b0
Author: Jian Qiu <qiujian@rock-chips.com>
Date:   Thu Jul 5 09:12:49 2018 +0800

    configs: evb-rk3326: enable CONFIG_FASTBOOT_OEM_UNLOCK
    
    Change-Id: I76bffc998986e5e4bd723b8e9649592f5bc1e63f
    Signed-off-by: Jian Qiu <qiujian@rock-chips.com>

diff --git a/configs/evb-rk3326_defconfig b/configs/evb-rk3326_defconfig
index 4f60418fb0..b78fb4f43b 100644
--- a/configs/evb-rk3326_defconfig
+++ b/configs/evb-rk3326_defconfig
@@ -29,6 +29,7 @@ CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_OEM_UNLOCK=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
 CONFIG_CMD_LOAD_ANDROID=y

commit ce6becde2e570847b8a68aca301d40a3f40f9960
Author: Shunqian Zheng <zhengsq@rock-chips.com>
Date:   Wed Jul 25 16:58:47 2018 +0800

    config/dts: px3se: Rockusb mode by Vol+ and reset
    
    Enalbe ADC keys to enter Rockusb mode by holding Vol Up
    key and reset.
    
    Change-Id: I2f17fccf890424049aff5946f439016ad76ea52d
    Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>

diff --git a/arch/arm/dts/px3se-evb.dts b/arch/arm/dts/px3se-evb.dts
index b434b922f7..4371b34cd8 100644
--- a/arch/arm/dts/px3se-evb.dts
+++ b/arch/arm/dts/px3se-evb.dts
@@ -6,6 +6,7 @@
 
 /dts-v1/;
 
+#include <dt-bindings/input/input.h>
 #include "rk3128.dtsi"
 #include "rk3128-u-boot.dtsi"
 
@@ -13,6 +14,26 @@
 	model = "Rockchip PX3SE Evaluation board";
 	compatible = "rockchip,px3se-evb", "rockchip,px3se";
 
+	adc-keys {
+		compatible = "adc-keys";
+		io-channels = <&saradc 1>;
+		io-channel-names = "buttons";
+		poll-interval = <100>;
+		keyup-threshold-microvolt = <1800000>;
+
+		vol-up {
+			label = "Volume Up";
+			linux,code = <KEY_VOLUMEUP>;
+			press-threshold-microvolt = <18000>;
+		};
+
+		vol-down {
+			label = "Volume Down";
+			linux,code = <KEY_VOLUMEDOWN>;
+			press-threshold-microvolt = <300000>;
+		};
+	};
+
 	chosen {
 		stdout-path = &uart1;
 	};
@@ -33,6 +54,10 @@
 	status = "okay";
 };
 
+&saradc {
+	status = "okay";
+};
+
 &u2phy {
 	status = "okay";
 };
diff --git a/configs/evb-px3se_defconfig b/configs/evb-px3se_defconfig
index a36e775541..c2e524e939 100644
--- a/configs/evb-px3se_defconfig
+++ b/configs/evb-px3se_defconfig
@@ -2,18 +2,18 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_ROCKCHIP_RK3128=y
 CONFIG_RKIMG_BOOTLOADER=y
-CONFIG_ANDROID_BOOTLOADER=y
-CONFIG_ANDROID_BOOT_IMAGE=y
 CONFIG_DEFAULT_DEVICE_TREE="px3se-evb"
 CONFIG_DEBUG_UART=y
+CONFIG_ANDROID_BOOT_IMAGE=y
 CONFIG_FIT=y
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
 # CONFIG_FASTBOOT is not set
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
 CONFIG_CMD_LOAD_ANDROID=y
-CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
@@ -25,6 +25,8 @@ CONFIG_SYSCON=y
 CONFIG_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_ADC_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PHY=y

commit 8a7ae883f720f9b5b3758a5d01c245ede0fcebc0
Author: shengfei Xu <xsf@rock-chips.com>
Date:   Wed Jul 25 09:42:06 2018 +0800

    fuel gauge: rk817: set different input current when different charger is detected
    
    The four power source types that are detected are:
    Standard downstream port (SDP)
    – This is a computer USB port capable of 500mA.
    Charging downstream port (CDP)
    - This is typically a powered USB hub capable of 1500mA.
    Dedicated charging port (DCP)
    - This is a standard wall charger capable of at least 1500mA.
    DCP without shorting D+/D-(FLOATING)
    - This is a non-standard wall charger capable of at least 1500mA.
    
    Change-Id: Icb3d3c02d9ef5dfbcabf0232743ad057c578dcf4
    Signed-off-by: shengfei Xu <xsf@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk817.c b/drivers/power/fuel_gauge/fg_rk817.c
index 5e5f004ad1..5508150e72 100644
--- a/drivers/power/fuel_gauge/fg_rk817.c
+++ b/drivers/power/fuel_gauge/fg_rk817.c
@@ -198,6 +198,14 @@ enum charger_type {
 	UNDEF_CHARGER,
 };
 
+enum power_supply_type {
+	POWER_SUPPLY_TYPE_UNKNOWN = 0,
+	POWER_SUPPLY_TYPE_USB,		/* Standard Downstream Port */
+	POWER_SUPPLY_TYPE_USB_DCP,	/* Dedicated Charging Port */
+	POWER_SUPPLY_TYPE_USB_CDP,	/* Charging Downstream Port */
+	POWER_SUPPLY_TYPE_USB_FLOATING,	/* DCP without shorting D+/D- */
+};
+
 struct rk817_battery_device {
 	struct udevice *dev;
 	int				res_div;
@@ -924,17 +932,18 @@ static int rk817_bat_get_usb_state(struct rk817_battery_device *battery)
 	int charger_type;
 
 	switch (rk817_bat_dwc_otg_check_dpdm()) {
-	case 0:
+	case POWER_SUPPLY_TYPE_UNKNOWN:
 		if ((rk817_bat_read(battery, PMIC_SYS_STS) & PLUG_IN_STS) != 0)
 			charger_type = DC_CHARGER;
 		else
 			charger_type = NO_CHARGER;
 		break;
-	case 1:
-	case 3:
+	case POWER_SUPPLY_TYPE_USB:
 		charger_type = USB_CHARGER;
 		break;
-	case 2:
+	case POWER_SUPPLY_TYPE_USB_DCP:
+	case POWER_SUPPLY_TYPE_USB_CDP:
+	case POWER_SUPPLY_TYPE_USB_FLOATING:
 		charger_type = AC_CHARGER;
 		break;
 	default:

commit de440615aaa98f6362d36acf19da861ea142af18
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jul 25 10:20:57 2018 +0800

    make.sh: support specify table to assign index name of loader/trust ini file
    
    add gva-rk3229_defconfig to specify table
    
    Change-Id: I347b4d43fa241f75f7aa95897369174ec6229e3d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 76e04d3bd5..071f3f7787 100755
--- a/make.sh
+++ b/make.sh
@@ -1,4 +1,4 @@
-#!/bin/sh
+#!/bin/bash
 set -e
 BOARD=$1
 SUBCMD=$1
@@ -6,6 +6,18 @@ FUNCADDR=$1
 JOB=`sed -n "N;/processor/p" /proc/cpuinfo|wc -l`
 SUPPORT_LIST=`ls configs/*[r,p][x,v,k][0-9][0-9]*_defconfig`
 
+# @target board: defined in arch/arm/mach-rockchip/<soc>/Kconfig
+# @label: show build message
+# @loader: search for ini file to pack loader
+# @trust: search for ini file to pack trust
+#
+# "NA" means use default name reading from .config
+#
+# Format:           target board               label         loader      trust
+RKCHIP_INI_DESC=("CONFIG_TARGET_GVA_RK3229       NA          RK322XAT     NA"
+# to be add...
+                )
+
 ########################################### User can modify #############################################
 # User's rkbin tool relative path
 RKBIN_TOOLS=../rkbin/tools
@@ -21,8 +33,11 @@ TOOLCHAIN_ARM32=../prebuilts/gcc/linux-x86/arm/gcc-linaro-6.3.1-2017.05-x86_64_a
 TOOLCHAIN_ARM64=../prebuilts/gcc/linux-x86/aarch64/gcc-linaro-6.3.1-2017.05-x86_64_aarch64-linux-gnu/bin
 
 ########################################### User not touch #############################################
-# Declare global INI file searching index name for every chip, update in fixup_platform_configure()
+# Declare global INI file searching index name for every chip, update in select_chip_info()
 RKCHIP=
+RKCHIP_LABEL=
+RKCHIP_LOADER=
+RKCHIP_TRUST=
 
 # Declare global rkbin RKTOOLS and rkbin repository path, updated in prepare()
 RKTOOLS=
@@ -261,16 +276,18 @@ sub_commands()
 	esac
 }
 
-# Support platform special configure
-#	1. fixup chip name;
-#	2. fixup pack mode;
-#	3. fixup image size
-#	4. fixup ARM64 cpu boot with AArch32
-fixup_platform_configure()
+# We select chip info to do:
+#	1. RKCHIP: fixup platform configure
+#	2. RKCHIP_LOADER: search ini file to pack loader
+#	3. RKCHIP_TRUST: search ini file to pack trust
+#	4. RKCHIP_LABEL: show build message
+#
+# We read chip info from .config and 'RKCHIP_INI_DESC'
+select_chip_info()
 {
-	local count plat
+	local target_board item value
 
-# <1> Get RKCHIP for searching trust/loader ini files
+	# Read RKCHIP firstly from .config
 	count=`grep -c '^CONFIG_ROCKCHIP_[R,P][X,V,K][0-9][0-9]' ${OUTDIR}/.config`
 	RKCHIP=`grep '^CONFIG_ROCKCHIP_[R,P][X,V,K][0-9][0-9]' ${OUTDIR}/.config`
 
@@ -298,7 +315,41 @@ fixup_platform_configure()
 		exit 1
 	fi
 
-# <2> Fixup rsa/sha pack mode for platforms
+	# Default use RKCHIP
+	RKCHIP_LABEL=${RKCHIP}
+	RKCHIP_LOADER=${RKCHIP}
+	RKCHIP_TRUST=${RKCHIP}
+
+	# Read from RKCHIP_INI_DESC
+	for item in "${RKCHIP_INI_DESC[@]}"
+	do
+		target_board=`echo $item | awk '{ print $1 }'`
+		if grep  -q "^${target_board}=y" ${OUTDIR}/.config ; then
+			value=`echo $item | awk '{ print $2 }'`
+			if [ "$value" != "NA" ]; then
+				RKCHIP_LABEL=${value};
+			fi
+			value=`echo $item | awk '{ print $3 }'`
+			if [ "$value" != "NA" ]; then
+				RKCHIP_LOADER=${value};
+			fi
+			value=`echo $item | awk '{ print $4 }'`
+			if [ "$value" != "NA" ]; then
+				RKCHIP_TRUST=${value};
+			fi
+		fi
+	done
+}
+
+# Fixup platform special configure
+#	1. fixup pack mode;
+#	2. fixup image size
+#	3. fixup ARM64 cpu boot with AArch32
+fixup_platform_configure()
+{
+	local count plat
+
+# <*> Fixup rsa/sha pack mode for platforms
 	# RK3308/PX30/RK3326 use RSA-PKCS1 V2.1, it's pack magic is "3"
 	if [ $RKCHIP = "PX30" -o $RKCHIP = "RK3326" -o $RKCHIP = "RK3308" ]; then
 		PLATFORM_RSA="--rsa 3"
@@ -308,7 +359,7 @@ fixup_platform_configure()
 	# other platforms use default configure
 	fi
 
-# <3> Fixup images size pack for platforms
+# <*> Fixup images size pack for platforms
 	if [ $RKCHIP = "RK3308" ]; then
 		if grep -q '^CONFIG_ARM64_BOOT_AARCH32=y' ${OUTDIR}/.config ; then
 			PLATFORM_UBOOT_IMG_SIZE="--size 512 2"
@@ -319,7 +370,7 @@ fixup_platform_configure()
 		fi
 	fi
 
-# <4> Fixup PLATFORM_AARCH32 for ARM64 cpu platforms
+# <*> Fixup PLATFORM_AARCH32 for ARM64 cpu platforms
 	if [ $RKCHIP = "RK3308" ]; then
 		if grep -q '^CONFIG_ARM64_BOOT_AARCH32=y' ${OUTDIR}/.config ; then
 			PLATFORM_AARCH32="AARCH32"
@@ -350,15 +401,15 @@ pack_loader_image()
 {
 	local mode=$1 files ini
 
-	if [ ! -f ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini ]; then
-		echo "pack loader failed! Can't find: ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini"
+	if [ ! -f ${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL.ini ]; then
+		echo "pack loader failed! Can't find: ${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL.ini"
 		return
 	fi
 
 	cd ${RKBIN}
 
 	if [ "${mode}" = 'all' ]; then
-		files=`ls ${RKBIN}/RKBOOT/${RKCHIP}MINIALL*.ini`
+		files=`ls ${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL*.ini`
 		for ini in $files
 		do
 			if [ -f "$ini" ]; then
@@ -367,8 +418,8 @@ pack_loader_image()
 			fi
 		done
 	else
-		${RKTOOLS}/boot_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini
-		echo "pack loader okay! Input: ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini"
+		${RKTOOLS}/boot_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL.ini
+		echo "pack loader okay! Input: ${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL.ini"
 	fi
 
 	cd - && mv ${RKBIN}/*_loader_*.bin ./
@@ -380,20 +431,20 @@ pack_trust_image()
 
 	# ARM64 uses trust_merger
 	if grep -Eq ''^CONFIG_ARM64=y'|'^CONFIG_ARM64_BOOT_AARCH32=y'' ${OUTDIR}/.config ; then
-		if [ ! -f ${RKBIN}/RKTRUST/${RKCHIP}${PLATFORM_AARCH32}TRUST.ini ]; then
-			echo "pack trust failed! Can't find: ${RKBIN}/RKTRUST/${RKCHIP}${PLATFORM_AARCH32}TRUST.ini"
+		if [ ! -f ${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST.ini ]; then
+			echo "pack trust failed! Can't find: ${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST.ini"
 			return
 		fi
 
 		cd ${RKBIN}
-		${RKTOOLS}/trust_merger ${PLATFORM_SHA} ${PLATFORM_RSA} ${PLATFORM_TRUST_IMG_SIZE} --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}${PLATFORM_AARCH32}TRUST.ini
+		${RKTOOLS}/trust_merger ${PLATFORM_SHA} ${PLATFORM_RSA} ${PLATFORM_TRUST_IMG_SIZE} --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST.ini
 
 		cd - && mv ${RKBIN}/trust.img ./trust.img
-		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKCHIP}${PLATFORM_AARCH32}TRUST.ini"
+		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST.ini"
 	# ARM uses loaderimage
 	else
-		if [ ! -f ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini ]; then
-			echo "pack trust failed! Can't find: ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini"
+		if [ ! -f ${RKBIN}/RKTRUST/${RKCHIP_TRUST}TOS.ini ]; then
+			echo "pack trust failed! Can't find: ${RKBIN}/RKTRUST/${RKCHIP_TRUST}TOS.ini"
 			return
 		fi
 
@@ -405,8 +456,8 @@ pack_trust_image()
 		TEE_LOAD_ADDR=$(echo "obase=16;${TEE_LOAD_ADDR}"|bc)
 
 		# Parse orignal path
-		TOS=`sed -n "/TOS=/s/TOS=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
-		TOS_TA=`sed -n "/TOSTA=/s/TOSTA=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
+		TOS=`sed -n "/TOS=/s/TOS=//p" ${RKBIN}/RKTRUST/${RKCHIP_TRUST}TOS.ini|tr -d '\r'`
+		TOS_TA=`sed -n "/TOSTA=/s/TOSTA=//p" ${RKBIN}/RKTRUST/${RKCHIP_TRUST}TOS.ini|tr -d '\r'`
 
 		# replace "./tools/rk_tools/" with "./" to compatible legacy ini content of rkdevelop branch
 		TOS=$(echo ${TOS} | sed "s/tools\/rk_tools\//\.\//g")
@@ -427,7 +478,7 @@ pack_trust_image()
 			exit 1
 		fi
 
-		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini"
+		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKCHIP_TRUST}TOS.ini"
 	fi
 }
 
@@ -435,14 +486,15 @@ finish()
 {
 	echo
 	if [ "$BOARD" = '' ]; then
-		echo "Platform ${RKCHIP}${PLATFORM_AARCH32} is build OK, with exist .config"
+		echo "Platform ${RKCHIP_LABEL}${PLATFORM_AARCH32} is build OK, with exist .config"
 	else
-		echo "Platform ${RKCHIP}${PLATFORM_AARCH32} is build OK, with new .config(make ${BOARD}_defconfig)"
+		echo "Platform ${RKCHIP_LABEL}${PLATFORM_AARCH32} is build OK, with new .config(make ${BOARD}_defconfig)"
 	fi
 }
 
 prepare
 select_toolchain
+select_chip_info
 fixup_platform_configure
 sub_commands
 make CROSS_COMPILE=${TOOLCHAIN_GCC}  all --jobs=${JOB} ${OUTOPT}

commit 504e252f281e061b02d854313bef7c42a6a8249f
Author: YouMin Chen <cym@rock-chips.com>
Date:   Fri Jul 20 15:13:55 2018 +0800

    driver: ram: rockhip: px30: add more sdram print info
    
    Change-Id: Idac5f78aec81c4c4a3e45150bf96e48415a1913b
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram_px30.c b/drivers/ram/rockchip/sdram_px30.c
index a3ed63841a..7b28887404 100644
--- a/drivers/ram/rockchip/sdram_px30.c
+++ b/drivers/ram/rockchip/sdram_px30.c
@@ -734,15 +734,74 @@ static void enable_low_power(struct dram_info *dram,
 	setbits_le32(pctl_base + DDR_PCTL2_PWRCTL, (1 << 3));
 }
 
-static int print_dec2hex(int i)
+static void print_ddr_info(struct px30_sdram_params *sdram_params)
 {
-	int tmp;
+	u64 cap;
+	u32 bg;
+	u32 split;
 
-	tmp = (i % 10);
-	tmp |= ((i % 100) / 10) << 4;
-	tmp |= ((i % 1000) / 100) << 8;
+	split = readl(DDR_GRF_BASE_ADDR + DDR_GRF_SPLIT_CON);
+	bg = (sdram_params->ch.dbw == 0) ? 2 : 1;
+	switch (sdram_params->dramtype) {
+	case LPDDR3:
+		printascii("LPDDR3\n");
+		break;
+	case DDR3:
+		printascii("DDR3\n");
+		break;
+	case DDR4:
+		printascii("DDR4\n");
+		break;
+	case LPDDR2:
+		printascii("LPDDR2\n");
+		break;
+	default:
+		printascii("Unknown Device\n");
+		break;
+	}
 
-	return tmp;
+	printdec(sdram_params->ddr_freq);
+	printascii("MHz\n");
+	printascii("BW=");
+	printdec(8 << sdram_params->ch.bw);
+	printascii(" Col=");
+	printdec(sdram_params->ch.col);
+	printascii(" Bk=");
+	printdec(0x1 << sdram_params->ch.bk);
+	if (sdram_params->dramtype == DDR4) {
+		printascii(" BG=");
+		printdec(1 << bg);
+	}
+	printascii(" CS0 Row=");
+	printdec(sdram_params->ch.cs0_row);
+	if (sdram_params->ch.cs0_high16bit_row !=
+		sdram_params->ch.cs0_row) {
+		printascii("/");
+		printdec(sdram_params->ch.cs0_high16bit_row);
+	}
+	if (sdram_params->ch.rank > 1) {
+		printascii(" CS1 Row=");
+		printdec(sdram_params->ch.cs1_row);
+		if (sdram_params->ch.cs1_high16bit_row !=
+			sdram_params->ch.cs1_row) {
+			printascii("/");
+			printdec(sdram_params->ch.cs1_high16bit_row);
+		}
+	}
+	printascii(" CS=");
+	printdec(sdram_params->ch.rank);
+	printascii(" Die BW=");
+	printdec(8 << sdram_params->ch.dbw);
+
+	cap = get_cs_cap(sdram_params, 3);
+	if (sdram_params->ch.row_3_4)
+		cap = cap * 3 / 4;
+	else if (!(split & (1 << SPLIT_BYPASS_OFFSET)))
+		cap = cap / 2 + ((split & 0xff) << 24) / 2;
+
+	printascii(" Size=");
+	printdec(cap >> 20);
+	printascii("MB\n");
 }
 
 /*
@@ -767,26 +826,6 @@ static int sdram_init_(struct dram_info *dram,
 	rkclk_ddr_reset(dram, 1, 1, 1, 0);
 	rkclk_configure_ddr(dram, sdram_params);
 
-	if (pre_init == 1) {
-		switch (sdram_params->dramtype) {
-		case DDR3:
-			printascii("DDR3\n");
-			break;
-		case DDR4:
-			printascii("DDR4\n");
-			break;
-		case LPDDR2:
-			printascii("LPDDR2\n");
-			break;
-		case LPDDR3:
-		default:
-			printascii("LPDDR3\n");
-			break;
-		}
-		printhex4(print_dec2hex(sdram_params->ddr_freq));
-		printascii("MHz\n");
-	}
-
 	/* release phy srst to provide clk to ctrl */
 	rkclk_ddr_reset(dram, 1, 1, 0, 0);
 	udelay(10);
@@ -1159,8 +1198,6 @@ int sdram_init(void)
 	struct px30_sdram_params *sdram_params;
 	int ret = 0;
 
-	printascii("DDR Init V1.07\n");
-
 	dram_info.phy = (void *)DDR_PHY_BASE_ADDR;
 	dram_info.pctl = (void *)DDRC_BASE_ADDR;
 	dram_info.grf = (void *)GRF_BASE_ADDR;
@@ -1175,6 +1212,8 @@ int sdram_init(void)
 	if (ret)
 		goto error;
 
+	print_ddr_info(sdram_params);
+
 	printascii("out\n");
 	return ret;
 error:

commit b68c9a795ba6fdd7da85888f0d007f58c3b65381
Author: YouMin Chen <cym@rock-chips.com>
Date:   Fri Jul 20 15:46:49 2018 +0800

    rockchip: px30: add setting QOS Priority in TPL
    
    Change-Id: I26cbf7c3cd88c27c81f5bd80657348611857ae8d
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c
index 4caafb7a82..02b2fd27ad 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -16,7 +16,12 @@
 #include <asm/arch/cru_px30.h>
 #include <dt-bindings/clock/px30-cru.h>
 
-#define PMU_PWRDN_CON	0xff000018
+#define PMU_PWRDN_CON			0xff000018
+
+#define SERVICE_CORE_ADDR		0xff508000
+#define QOS_PRIORITY			0x08
+
+#define QOS_PRIORITY_LEVEL(h, l)	((((h) & 3) << 8) | ((l) & 3))
 
 static struct mm_region px30_mem_map[] = {
 	{
@@ -49,6 +54,11 @@ int arch_cpu_init(void)
 	/* Enable PD_VO (default disable at reset) */
 	rk_clrreg(PMU_PWRDN_CON, 1 << 13);
 
+#ifdef CONFIG_TPL_BUILD
+	/* Set cpu qos priority */
+	writel(QOS_PRIORITY_LEVEL(1, 1), SERVICE_CORE_ADDR + QOS_PRIORITY);
+#endif
+
 	return 0;
 }
 

commit ebb6c43980f01a071054604fe9f952cd40f9cdcb
Author: YouMin Chen <cym@rock-chips.com>
Date:   Mon Jul 23 19:57:20 2018 +0800

    rockchip: board: compulsory execution board_debug_uart_init
    
    Insure if defined CONFIG_SUPPORT_SPL but not use SPL bin,
    board_debug_uart_init still have be called.
    
    Change-Id: I2e8a7bf1cfb4e6ec4a916983eb13652afe8c8af2
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index a474cf0a5b..233f0b6f9a 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -208,9 +208,8 @@ int board_init(void)
 {
 	int ret;
 
-#if !defined(CONFIG_SUPPORT_SPL)
 	board_debug_uart_init();
-#endif
+
 #ifdef CONFIG_USING_KERNEL_DTB
 	init_kernel_dtb();
 #endif

commit ad9ba815b167f90f2d0933029950189dd784d745
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 24 16:37:58 2018 +0800

    rockchip: add rk3128x support
    
    Change-Id: I52193b8f78cfc4b88af7959b74f1c0dedcf75b7c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index d6b5c91f80..dd028bba50 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -140,6 +140,16 @@ config ROCKCHIP_RK322X
 	  and video codec support. Peripherals include Gigabit Ethernet,
 	  USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
 
+if ROCKCHIP_RK322X
+
+config ROCKCHIP_RK3128X
+	bool "Support Rockchip RK3128X "
+	help
+	  RK3128X can use most code from RK322X, but at some situations we have
+	  to distinguish between RK3128X and RK322X, so this macro gives help.
+	  It is usually selected in RK3128X board defconfig.
+endif
+
 config ROCKCHIP_RK3288
 	bool "Support Rockchip RK3288"
 	select CPU_V7
diff --git a/arch/arm/mach-rockchip/chip_info.c b/arch/arm/mach-rockchip/chip_info.c
index bdf96bb9bf..15baad390e 100644
--- a/arch/arm/mach-rockchip/chip_info.c
+++ b/arch/arm/mach-rockchip/chip_info.c
@@ -79,7 +79,11 @@ int rockchip_rockusb_get_chip_info(unsigned int chip_info[])
 #elif defined(CONFIG_ROCKCHIP_RK3126) || defined(CONFIG_ROCKCHIP_RK3128)
 		chip_info[0] = 0x33313241;
 #elif defined(CONFIG_ROCKCHIP_RK322X)
+#if defined(CONFIG_ROCKCHIP_RK3128X)
+		chip_info[0] = 0x33313258;
+#else
 		chip_info[0] = 0x33323241;
+#endif
 #elif defined(CONFIG_ROCKCHIP_RK3328)
 		chip_info[0] = 0x33323248;
 #elif defined(CONFIG_ROCKCHIP_RK3399)
diff --git a/configs/rk3128x_defconfig b/configs/rk3128x_defconfig
new file mode 100644
index 0000000000..63fa63940e
--- /dev/null
+++ b/configs/rk3128x_defconfig
@@ -0,0 +1,111 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x800
+CONFIG_ROCKCHIP_RK322X=y
+CONFIG_ROCKCHIP_RK3128X=y
+CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl.lds"
+CONFIG_TPL_TEXT_BASE=0x10081000
+CONFIG_TPL_MAX_SIZE=28672
+CONFIG_TPL_STACK=0x10088000
+CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_TARGET_EVB_RK3229=y
+CONFIG_SPL_STACK_R_ADDR=0x60600000
+CONFIG_DEFAULT_DEVICE_TREE="rk3229-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_SOURCE="arch/arm/mach-rockchip/fit_spl_optee.its"
+CONFIG_BOOTDELAY=0
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_TPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
+CONFIG_SPL_OPTEE=y
+CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_RKPARM_PARTITION=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_TPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_TPL_DM=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_TPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_TPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_TPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_ADC_KEY=y
+CONFIG_GPIO_KEY=y
+CONFIG_RK_KEY=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PINCTRL=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0x11030000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x18d1
+CONFIG_G_DNL_PRODUCT_NUM=0xd00d
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_DRM_ROCKCHIP_LVDS=y
+CONFIG_DRM_ROCKCHIP_RGB=y
+CONFIG_LCD=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_TPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
+CONFIG_TEST_ROCKCHIP=y

commit ce995491809e3e09e0ca6d98a2c958808d1b10c5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 24 16:38:09 2018 +0800

    make.sh: add rk3128x support
    
    Change-Id: I44a409e519c520cb6da5088a45b2ae197cda632d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 4b84bfd446..76e04d3bd5 100755
--- a/make.sh
+++ b/make.sh
@@ -288,6 +288,11 @@ fixup_platform_configure()
 		if [ "$plat" = 'CONFIG_ROCKCHIP_RK3326=y' ]; then
 			RKCHIP=RK3326
 		fi
+		# Is RK3128X ?
+		plat=`grep '^CONFIG_ROCKCHIP_[R,P][X,V,K][0-9][0-9]' ${OUTDIR}/.config | sed -n "/CONFIG_ROCKCHIP_RK3128X=y/p"`
+		if [ "$plat" = 'CONFIG_ROCKCHIP_RK3128X=y' ]; then
+			RKCHIP=RK3128X
+		fi
 	else
 		echo "Can't get Rockchip SoC definition in .config"
 		exit 1

commit 60f62d2692e5160ff01ba922beefaed4a5b77334
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Jul 24 12:24:07 2018 +0800

    mmc: dw_mmc: print a caution when find ciu-sample fail
    
    BUG: If not find ciu-sample, probe will fail. This make
    mmc device unusable.
    
    Change-Id: I86310cd2bc84cea5a81b72d103c8947ed4c1b07b
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index 3a25209f62..6e55ec4538 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -254,7 +254,7 @@ static int rockchip_dwmmc_probe(struct udevice *dev)
 
 	ret = clk_get_by_name(dev, "ciu-sample", &priv->sample_clk);
 	if (ret < 0)
-		return ret;
+		printf("Caution: find clock fail, not support hs200!\n");
 	host->execute_tuning = rockchip_dwmmc_execute_tuning;
 #endif
 	host->fifoth_val = MSIZE(0x2) |

commit c30a11ade1b7c63933570d39503852adedd8f015
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue May 22 22:06:12 2018 +0800

    configs: evb-rk3326: enable vendor partition
    
    Change-Id: Icfdad9a26d7179d6f2aa2b1e0b82c94a7962bf8e
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/evb-rk3326_defconfig b/configs/evb-rk3326_defconfig
index de933e1251..4f60418fb0 100644
--- a/configs/evb-rk3326_defconfig
+++ b/configs/evb-rk3326_defconfig
@@ -15,6 +15,7 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3326-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 CONFIG_FIT=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"

commit ef2fbb3d6dc5d70e1f0b99851b47f228c176cafd
Author: Xing Zheng <zhengxing@rock-chips.com>
Date:   Mon Jul 23 20:43:35 2018 +0800

    arm: dts: rk3308-evb: remove 'mmc-hs200-1_8v' property
    
    Change-Id: I015b542e751db29278af8f9a485894aef8ccf9d5
    Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-evb.dts b/arch/arm/dts/rk3308-evb.dts
index 87012226ba..862c628fed 100644
--- a/arch/arm/dts/rk3308-evb.dts
+++ b/arch/arm/dts/rk3308-evb.dts
@@ -276,7 +276,6 @@
 
 &emmc {
 	cap-mmc-highspeed;
-	mmc-hs200-1_8v;
 	supports-emmc;
 	non-removable;
 	num-slots = <1>;

commit 121de4078fd2792375e7af3f29ce55fc842e8b8d
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Jul 23 11:33:03 2018 +0800

    video/drm: edp: Move enable video into config_video()
    
    We need to enable video before analogix_dp_is_video_stream_on(),
    so we can get the right video stream status.
    
    Change-Id: I43d28791616d6422a614666fe41e7d3bab528ced
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_analogix_dp.c b/drivers/video/drm/rockchip_analogix_dp.c
index 7b92e1b632..1e63d7f60c 100644
--- a/drivers/video/drm/rockchip_analogix_dp.c
+++ b/drivers/video/drm/rockchip_analogix_dp.c
@@ -612,6 +612,9 @@ static int analogix_dp_config_video(struct analogix_dp_device *dp)
 	/* Configure video slave mode */
 	analogix_dp_enable_video_master(dp, 0);
 
+	/* Enable video input */
+	analogix_dp_start_video(dp);
+
 	timeout_loop = 0;
 
 	for (;;) {
@@ -986,9 +989,6 @@ static int rockchip_analogix_dp_enable(struct display_state *state)
 	if (ret)
 		pr_err("unable to config video\n");
 
-	/* Enable video */
-	analogix_dp_start_video(dp);
-
 	return 0;
 }
 

commit b40c07fc2e802a4ff2f3f3fc2acc2fdab91d3281
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Jul 21 12:21:38 2018 +0800

    test: rockchip: compile depends on dm config
    
    Change-Id: I8e3a7a8dedaa4615426b3d059746d2c080b481c0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/test/rockchip/Makefile b/test/rockchip/Makefile
index 1930056ecd..4739485926 100644
--- a/test/rockchip/Makefile
+++ b/test/rockchip/Makefile
@@ -6,11 +6,11 @@
 
 obj-y += test-rockchip.o
 obj-y += test-timer.o
-obj-y += test-key.o
-obj-y += test-emmc.o
-obj-y += test-regulator.o
-obj-y += test-rknand.o
+obj-y += test-brom-dnl.o
+obj-$(CONFIG_DM_KEY) += test-key.o
+obj-$(CONFIG_MMC) += test-emmc.o
+obj-$(CONFIG_DM_REGULATOR)+= test-regulator.o
+obj-$(CONFIG_RKNAND) += test-rknand.o
 obj-$(CONFIG_GMAC_ROCKCHIP) += test-eth.o
 obj-$(CONFIG_RK_IR) += test-ir.o
-obj-y += test-brom-dnl.o
 obj-$(CONFIG_ROCKCHIP_VENDOR_PARTITION) += test-vendor-storage.o
diff --git a/test/rockchip/test-rockchip.c b/test/rockchip/test-rockchip.c
index 757a47eddc..29a4fc3dae 100644
--- a/test/rockchip/test-rockchip.c
+++ b/test/rockchip/test-rockchip.c
@@ -15,17 +15,26 @@ typedef struct board_module {
 
 static board_module_t g_board_modules[] = {
 	{ .name = "timer",	.test = board_timer_test },
+	{ .name = "brom",	.test = board_brom_dnl_test },
+
+#if defined(CONFIG_DM_KEY)
 	{ .name = "key",	.test = board_key_test },
+#endif
+#if defined(CONFIG_MMC)
 	{ .name = "emmc",	.test = board_emmc_test },
+#endif
+#if defined(CONFIG_DM_REGULATOR)
 	{ .name = "regulator",	.test = board_regulator_test },
+#endif
+#if defined(CONFIG_RKNAND)
 	{ .name = "rknand",	.test = board_rknand_test },
+#endif
 #if defined(CONFIG_GMAC_ROCKCHIP)
 	{ .name = "eth",        .test = board_eth_test },
 #endif
 #if defined(CONFIG_RK_IR)
 	{ .name = "ir",		.test = board_ir_test },
 #endif
-	{ .name = "brom_dnl",	.test = board_brom_dnl_test},
 #if defined(CONFIG_ROCKCHIP_VENDOR_PARTITION)
 	{ .name = "vendor",	.test = board_vendor_storage_test },
 #endif
@@ -34,7 +43,7 @@ static board_module_t g_board_modules[] = {
 static void help(void)
 {
 	printf("Command: rktest [module] [args...]\n\n"
-	       "  - module: timer|key|emmc|rknand|regulator|eth|ir|brom_dnl|vendor\n"
+	       "  - module: timer|key|emmc|rknand|regulator|eth|ir|brom|vendor\n"
 	       "  - args: depends on module\n");
 }
 

commit 16cc62c811841a908165cc307232fbad1d6ffb69
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jul 16 10:54:07 2018 +0800

    mmc: dw_mmc: support mmc hs200
    
    we can set mmc-hs200-1_8v to the node of emmc
    in the dts to support hs200.
    
    Change-Id: I5fa195505b877449864f294564cfc33bcd4202e5
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index 001d31e0e2..3a25209f62 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -280,6 +280,8 @@ static int rockchip_dwmmc_probe(struct udevice *dev)
 	}
 #endif
 	dwmci_setup_cfg(&plat->cfg, host, priv->minmax[1], priv->minmax[0]);
+	if (dev_read_bool(dev, "mmc-hs200-1_8v"))
+		plat->cfg.host_caps |= MMC_MODE_HS200;
 	host->mmc = &plat->mmc;
 	host->mmc->priv = &priv->host;
 	host->mmc->dev = dev;

commit 68995a9bef213fe8abdd123f7717f15f5dc01893
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Jul 21 11:18:27 2018 +0800

    dm: key: remove deprecated platform_read_key()
    
    Change-Id: I88af911581b94f59504124786cb1adaa82dae12f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/key-uclass.c b/drivers/input/key-uclass.c
index 6fc0decfab..43ed0ddd38 100644
--- a/drivers/input/key-uclass.c
+++ b/drivers/input/key-uclass.c
@@ -196,11 +196,6 @@ out:
 	return keyval;
 }
 
-int platform_key_read(int code)
-{
-	return KEY_NOT_EXIST;
-}
-
 UCLASS_DRIVER(key) = {
 	.id		= UCLASS_KEY,
 	.name		= "key",
diff --git a/include/key.h b/include/key.h
index 36812f748c..a1c610f993 100644
--- a/include/key.h
+++ b/include/key.h
@@ -62,7 +62,4 @@ int key_is_pressed(int keyval);
 /* Read key */
 int key_read(int code);
 
-/* deprecated */
-int platform_key_read(int code);
-
 #endif

commit fd62311e5361c74bbc92ed3c5de5af8f75017d25
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jul 20 18:13:28 2018 +0800

    power: charge animation: fix i2c failed issue
    
    i2c maybe interrpted by power key interrupt, so we need to
    disable local irq when i2c transfer.
    
    Change-Id: Ifd4c1f15ebab25c7fa54e4386c72e5731bc821b4
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index a9cf41b361..fef2bd6584 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -143,12 +143,6 @@ static int check_key_press(struct udevice *dev)
 
 static int system_suspend_enter(struct charge_animation_pdata *pdata)
 {
-	/*
-	 * TODO: enter low power mode:
-	 * 3. auto turn off screen when timout;
-	 * 4. power key wakeup;
-	 * 5. timer period wakeup for pmic fg
-	 */
 	if (pdata->system_suspend && IS_ENABLED(CONFIG_ARM_SMCCC)) {
 		printf("\nSystem suspend: ");
 		putc('1');
@@ -410,6 +404,13 @@ static int charge_animation_show(struct udevice *dev)
 
 		debug("step1 (%d)... \n", screen_on);
 
+		/*
+		 * Most fuel gauge is I2C interface, it shouldn't be interrupted
+		 * during tansfer. The power key event depends on interrupt, so
+		 * so we should disable local irq when update fuel gauge.
+		 */
+		local_irq_disable();
+
 		/* Step1: Is charging now ? */
 		charging = fuel_gauge_get_chrg_online(fg);
 		if (charging <= 0) {
@@ -447,6 +448,9 @@ static int charge_animation_show(struct udevice *dev)
 			continue;
 		}
 		first_poll_fg = 0;
+
+		local_irq_enable();
+
 show_images:
 		/*
 		 * Just for debug, otherwise there will be nothing output which

commit 93aee2d9030fdd7fc67def2e10c0f9b4f4f6a74a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jul 20 18:12:05 2018 +0800

    power: charge animation: fix auto off and optimise images show
    
    - fix auto off screen issue;
    - don't call charge_show_bmp() unless image changed;
    
    Change-Id: I6474c8ef55617883da2ba4abb4da240a770e0d93
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 09a4f80cc6..a9cf41b361 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -115,6 +115,10 @@ static int check_key_press(struct udevice *dev)
 	state = key_read(KEY_POWER);
 	if (state < 0)
 		printf("read power key failed: %d\n", state);
+	else if (state == KEY_PRESS_DOWN)
+		printf("power key pressed...\n");
+	else if (state == KEY_PRESS_LONG_DOWN)
+		printf("power key long pressed...\n");
 
 	/* Fixup key state for following cases */
 	if (pdata->auto_wakeup_interval) {
@@ -126,7 +130,8 @@ static int check_key_press(struct udevice *dev)
 			}
 		}
 	} else if (pdata->auto_off_screen_interval) {
-		if (get_timer(priv->auto_screen_off_timeout) >
+		if (priv->auto_screen_off_timeout &&
+		    get_timer(priv->auto_screen_off_timeout) >
 		    pdata->auto_off_screen_interval * 1000) {	/* 1000ms */
 			state = KEY_PRESS_DOWN;
 			printf("Auto screen off\n");
@@ -308,7 +313,7 @@ static int charge_animation_show(struct udevice *dev)
 	ulong show_start = 0, charge_start = 0, debug_start = 0;
 	ulong delta;
 	ulong ms = 0, sec = 0;
-	int start_idx = 0, show_idx = -1;
+	int start_idx = 0, show_idx = -1, old_show_idx = IMAGE_SHOW_RESET;
 	int soc, voltage, current, key_state;
 	int i, charging = 1, ret;
 	int boot_mode;
@@ -441,7 +446,6 @@ static int charge_animation_show(struct udevice *dev)
 			printf("get current failed: %d\n", current);
 			continue;
 		}
-
 		first_poll_fg = 0;
 show_images:
 		/*
@@ -510,9 +514,12 @@ show_images:
 
 		/* Step3: show images */
 		if (screen_on) {
-			debug("SHOW: %s\n", image[show_idx].name);
-			charge_show_bmp(image[show_idx].name);
-
+			/* Don't call 'charge_show_bmp' unless image changed */
+			if (old_show_idx != show_idx) {
+				old_show_idx = show_idx;
+				debug("SHOW: %s\n", image[show_idx].name);
+				charge_show_bmp(image[show_idx].name);
+			}
 			/* Re calculate timeout to off screen */
 			if (priv->auto_screen_off_timeout == 0)
 				priv->auto_screen_off_timeout = get_timer(0);
@@ -543,6 +550,8 @@ show_images:
 		 */
 		key_state = check_key_press(dev);
 		if (key_state == KEY_PRESS_DOWN) {
+			old_show_idx = IMAGE_SHOW_RESET;
+
 			/* NULL means show nothing, ie. turn off screen */
 			if (screen_on)
 				charge_show_bmp(NULL);

commit 5e80474146f4ad79f062bad14d022a10e6f6109d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 3 20:33:50 2018 +0800

    power: charge animation: add poll time to update fuel gauge
    
    Usually, fuel gauge is a i2c device and we had better set a
    poll seconds to update it, which can reduce i2c read/write.
    
    Change-Id: I192e8229d3b6b7f8887a38296314e69b9dc30753
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 63e82cd95d..09a4f80cc6 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -29,6 +29,7 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 #define IMAGE_SHOW_RESET			-1
+#define FUEL_GAUGE_POLL_MS			1000
 
 struct charge_image {
 	const char *name;
@@ -305,11 +306,13 @@ static int charge_animation_show(struct udevice *dev)
 	bool ever_lowpower_screen_off = false;
 	bool screen_on = true;
 	ulong show_start = 0, charge_start = 0, debug_start = 0;
+	ulong delta;
 	ulong ms = 0, sec = 0;
 	int start_idx = 0, show_idx = -1;
 	int soc, voltage, current, key_state;
 	int i, charging = 1, ret;
 	int boot_mode;
+	int first_poll_fg = 1;
 
 /*
  * Check sequence:
@@ -386,9 +389,20 @@ static int charge_animation_show(struct udevice *dev)
 	printf("Enter U-Boot charging mode\n");
 
 	charge_start = get_timer(0);
+	delta = get_timer(0);
 
 	/* Charging ! */
 	while (1) {
+		/*
+		 * At the most time, fuel gauge is usually a i2c device, we
+		 * should avoid read/write all the time. We had better set
+		 * poll seconds to update fuel gauge info.
+		 */
+		if (!first_poll_fg && get_timer(delta) < FUEL_GAUGE_POLL_MS)
+			goto show_images;
+
+		delta = get_timer(0);
+
 		debug("step1 (%d)... \n", screen_on);
 
 		/* Step1: Is charging now ? */
@@ -428,6 +442,8 @@ static int charge_animation_show(struct udevice *dev)
 			continue;
 		}
 
+		first_poll_fg = 0;
+show_images:
 		/*
 		 * Just for debug, otherwise there will be nothing output which
 		 * is not good to know what happen.

commit 787a62ebebd74b39304524c7f792c1aa4dbd53c4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jul 19 19:57:56 2018 +0800

    power: charge animation: use read_key() to read power key
    
    Change-Id: Id8218f0aa8d192baaa347d6e76ee2d0f002d9c6b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 519a3a81c9..63e82cd95d 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -111,7 +111,7 @@ static int check_key_press(struct udevice *dev)
 	struct charge_animation_priv *priv = dev_get_priv(dev);
 	u32 state;
 
-	state = platform_key_read(KEY_POWER);
+	state = key_read(KEY_POWER);
 	if (state < 0)
 		printf("read power key failed: %d\n", state);
 
@@ -640,7 +640,7 @@ static int charge_animation_probe(struct udevice *dev)
 	priv->fg = fg;
 
 	/* Get PWRKEY: used for wakeup and turn off/on LCD */
-	ret = platform_key_read(KEY_POWER);
+	ret = key_read(KEY_POWER);
 	if (ret == KEY_NOT_EXIST) {
 		printf("Can't find power key\n");
 		return -EINVAL;

commit 8c0a5f1c64e1b3818cce61ee1922fa1892432b6e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jul 19 20:25:45 2018 +0800

    configs: rk3328: enable keys
    
    Change-Id: I07e774f925085359084ded1df1623aba1ad6530d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index cd89448594..e9af89c26b 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -60,6 +60,9 @@ CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y
+CONFIG_ADC_KEY=y
+CONFIG_GPIO_KEY=y
+CONFIG_RK_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_DM_ETH=y

commit dfd935fcd3593383a9d04539d118a0bb7d781fa8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jul 19 19:55:24 2018 +0800

    rockchip: add a generic way to read recovery key
    
    use key_read() interface, provided by dm key.
    
    Change-Id: Ic68186efe2fa5c0e57fcfc166615814755b60cb7
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index ce5830eedf..8a20a3a31e 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -13,6 +13,7 @@
 #include <fdtdec.h>
 #include <boot_rkimg.h>
 #include <linux/usb/phy-rockchip-inno-usb2.h>
+#include <key.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -42,7 +43,17 @@ void set_back_to_bootrom_dnl_flag(void)
 
 __weak int rockchip_dnl_key_pressed(void)
 {
-#if defined(CONFIG_ADC)
+	int keyval = false;
+
+/*
+ * This is a generic interface to read key
+ */
+#if defined(CONFIG_DM_KEY)
+	keyval = key_read(KEY_VOLUMEUP);
+
+	return key_is_pressed(keyval);
+
+#elif defined(CONFIG_ADC)
 	const void *blob = gd->fdt_blob;
 	unsigned int val;
 	int channel = 1;
@@ -66,9 +77,9 @@ __weak int rockchip_dnl_key_pressed(void)
 		return true;
 	else
 		return false;
-#else
-	return false;
 #endif
+
+	return keyval;
 }
 
 void devtype_num_envset(void)

commit d240ec0518e055e26c4c78b72d8e01f83e732c93
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jul 19 19:49:03 2018 +0800

    test: rockchip: key: use key_read()
    
    key_read() is a new dm key interface.
    
    Change-Id: Idd950353749482a606085728bac2cac44e1bf58d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/test/rockchip/test-key.c b/test/rockchip/test-key.c
index 25718b0dbc..deef4e81c2 100644
--- a/test/rockchip/test-key.c
+++ b/test/rockchip/test-key.c
@@ -14,14 +14,33 @@
 
 int board_key_test(int argc, char * const argv[])
 {
+	int i, ret;
+	u32 key_code[] = {
+		KEY_VOLUMEUP,
+		KEY_VOLUMEDOWN,
+		KEY_POWER,
+		KEY_MENU,
+		KEY_ESC,
+		KEY_HOME,
+	};
+	const char *key_name[] = {
+		"volume up",
+		"volume down",
+		"power",
+		"menu",
+		"esc",
+		"home",
+	};
+
 	while (!ctrlc()) {
-		mdelay(100);
-		platform_key_read(KEY_VOLUMEUP);
-		platform_key_read(KEY_VOLUMEDOWN);
-		platform_key_read(KEY_POWER);
-		platform_key_read(KEY_HOME);
-		platform_key_read(KEY_MENU);
-		platform_key_read(KEY_ESC);
+		for (i = 0; i < ARRAY_SIZE(key_code); i++) {
+			mdelay(20);
+			ret = key_read(key_code[i]);
+			if (ret == KEY_PRESS_DOWN)
+				printf("'%s' key pressed...\n", key_name[i]);
+			else if (ret == KEY_PRESS_LONG_DOWN)
+				printf("'%s' key long pressed...\n", key_name[i]);
+		}
 	}
 
 	return 0;

commit 64048c537e998f015febb9bde9bf1ad42d869e8f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jul 19 19:43:59 2018 +0800

    dm: key: optimise framework and update drivers
    
    1. dm key framework takes over more generic jobs;
    2. key drivers remove unused codes and match new framework;
    3. only power key is registered as interrupt key;
    
    Change-Id: Icdda86f588af721b685f801ed251581f2fd85793
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/adc_key.c b/drivers/input/adc_key.c
index bf25f10198..65645d01bc 100644
--- a/drivers/input/adc_key.c
+++ b/drivers/input/adc_key.c
@@ -15,19 +15,11 @@
 #include <key.h>
 #include <linux/input.h>
 
-#define ADC_MARGIN		30
-#define MAX_KEY_NR		10
-
-struct adc_key_priv {
-	u32 key_nr;
-};
-
 static int adc_keys_ofdata_to_platdata(struct udevice *dev)
 {
-	struct adc_key_priv *priv = dev_get_priv(dev);
-	struct input_key *key = dev_get_platdata(dev);
-	u32 adc_channels[2], i = 0, microvolt;
-	int vref, err;
+	struct input_key *key;
+	u32 adc_channels[2], microvolt;
+	int vref, ret;
 	ofnode node;
 
 	/* Get vref */
@@ -39,90 +31,54 @@ static int adc_keys_ofdata_to_platdata(struct udevice *dev)
 	}
 
 	/* Get IO channel */
-	err = dev_read_u32_array(dev, "io-channels", adc_channels, 2);
-	if (err) {
-		printf("failed to read 'io-channels' of %s key, ret=%d\n",
-		       key->name, err);
+	ret = dev_read_u32_array(dev, "io-channels", adc_channels, 2);
+	if (ret) {
+		printf("failed to read 'io-channels', ret=%d\n", ret);
 		return -EINVAL;
 	}
 
 	/* Parse every adc key data */
 	dev_for_each_subnode(node, dev) {
-		key[i].name = ofnode_read_string(node, "label");
-		key[i].vref = vref;
-		key[i].margin = ADC_MARGIN;
-		key[i].channel = adc_channels[1];
-		if (ofnode_read_u32(node, "linux,code", &key[i].code)) {
+		key = calloc(1, sizeof(struct input_key));
+		if (!key)
+			return -ENOMEM;
+
+		key->parent = dev;
+		key->type = ADC_KEY;
+		key->vref = vref;
+		key->channel = adc_channels[1];
+		key->name = ofnode_read_string(node, "label");
+		ret = ofnode_read_u32(node, "linux,code", &key->code);
+		if (ret) {
 			printf("%s: failed to read 'linux,code', ret=%d\n",
-			       key[i].name, key[i].code);
-			return -EINVAL;
-		}
-		if (ofnode_read_u32(node, "press-threshold-microvolt",
-				    &microvolt)) {
-			printf("%s: failed read 'press-threshold-microvolt', ret=%d\n",
-			       key[i].name, microvolt);
-			return -EINVAL;
-		}
-		/* Convert microvolt to adc value */
-		key[i].value = microvolt / (key[i].vref / 1024);
-
-		debug("%s: name=%s: code=%d, vref=%d, margin=%d, channel=%d, val=%d\n",
-		      __func__, key[i].name, key[i].code, key[i].vref,
-		      key[i].margin, key[i].channel, key[i].value);
-
-		/* Next node */
-		i++;
-		priv->key_nr = i;
-		if (i >= MAX_KEY_NR) {
-			printf("Too many keys, Max support: %d\n", MAX_KEY_NR);
-			return -EINVAL;
+			       key->name, ret);
+			free(key);
+			continue;
 		}
-	}
 
-	return 0;
-}
-
-static int adc_keys_read(struct udevice *dev, int code)
-{
-	struct adc_key_priv *priv = dev_get_priv(dev);
-	struct input_key *key = dev_get_platdata(dev);
-	int report = KEY_NOT_EXIST;
-	int max, min, i = 0;
-	unsigned int adcval;
-
-	for (i = 0; i < priv->key_nr; i++) {
-		if (key[i].code != code)
+		ret = ofnode_read_u32(node, "press-threshold-microvolt",
+				      &microvolt);
+		if (ret) {
+			printf("%s: failed to read 'press-threshold-microvolt', ret=%d\n",
+			       key->name, ret);
+			free(key);
 			continue;
+		}
 
-		if (adc_channel_single_shot("saradc",
-					    key[i].channel, &adcval)) {
-			printf("%s: failed to read saradc\n", key[i].name);
-		} else {
-			/* Get min, max */
-			max = key[i].value + key[i].margin;
-			if (key[i].value > key[i].margin)
-				min = key[i].value - key[i].margin;
-			else
-				min = key[i].value;
+		/* Convert microvolt to adc value */
+		key->adcval = microvolt / (key->vref / 1024);
+		key_add(key);
 
-			/* Check */
-			if ((adcval <= max) && (adcval >= min)) {
-				report = KEY_PRESS_DOWN;
-				printf("'%s' key pressed down\n",
-				       key[i].name);
-			} else {
-				report = KEY_PRESS_NONE;
-			}
-		}
-		break;
+		debug("%s: name=%s: code=%d, vref=%d, channel=%d, microvolt=%d, adcval=%d\n",
+		      __func__, key->name, key->code, key->vref,
+		      key->channel, microvolt, key->adcval);
 	}
 
-	return report;
+	return 0;
 }
 
 static const struct dm_key_ops key_ops = {
-	.name = "adc_keys",
-	.read = adc_keys_read,
+	.name = "adc-keys",
 };
 
 static const struct udevice_id adc_keys_ids[] = {
@@ -136,6 +92,4 @@ U_BOOT_DRIVER(adc_keys) = {
 	.ops	= &key_ops,
 	.of_match = adc_keys_ids,
 	.ofdata_to_platdata = adc_keys_ofdata_to_platdata,
-	.platdata_auto_alloc_size = sizeof(struct input_key) * MAX_KEY_NR,
-	.priv_auto_alloc_size = sizeof(struct adc_key_priv),
 };
diff --git a/drivers/input/gpio_key.c b/drivers/input/gpio_key.c
index d41fef6eda..34db0d868d 100644
--- a/drivers/input/gpio_key.c
+++ b/drivers/input/gpio_key.c
@@ -19,107 +19,93 @@
 #include <irq-generic.h>
 #include <irq-platform.h>
 
-#define MAX_KEY_NR	10
-
-struct gpio_key_priv {
-	u32 key_nr;
-};
-
 static void gpio_irq_handler(int irq, void *data)
 {
-	struct udevice *dev = data;
-	struct gpio_key_priv *priv = dev_get_priv(dev);
-	struct input_key *key = dev_get_platdata(dev);
-	int i;
-
-	for (i = 0; i < priv->key_nr; i++) {
-		if (key[i].irq != irq)
-			continue;
-
-		/* up event */
-		if (irq_get_gpio_level(irq)) {
-			key[i].up_t = key_get_timer(0);
-			debug("%s: key down: %llu ms\n",
-			      key[i].name, key[i].down_t);
-		/* down event */
-		} else {
-			key[i].down_t = key_get_timer(0);
-			debug("%s: key up: %llu ms\n",
-			      key[i].name, key[i].up_t);
-		}
-		/* Must delay */
-		mdelay(10);
-		irq_revert_irq_type(irq);
+	struct input_key *key = data;
+
+	if (key->irq != irq)
+		return;
+
+	/* up event */
+	if (irq_get_gpio_level(irq)) {
+		key->up_t = key_timer(0);
+		debug("%s: key down: %llu ms\n", key->name, key->down_t);
+	/* down event */
+	} else {
+		key->down_t = key_timer(0);
+		debug("%s: key up: %llu ms\n", key->name, key->up_t);
 	}
+	/* Must delay */
+	mdelay(10);
+	irq_revert_irq_type(irq);
 }
 
 static int gpio_key_ofdata_to_platdata(struct udevice *dev)
 {
-	struct gpio_key_priv *priv = dev_get_priv(dev);
-	struct input_key *key = dev_get_platdata(dev);
-	u32 gpios[2], i = 0;
+	struct input_key *key;
+	u32 gpios[2];
 	ofnode node;
-	int irq;
+	int irq, ret;
 
 	dev_for_each_subnode(node, dev) {
-		key[i].name = ofnode_read_string(node, "label");
-		if (ofnode_read_u32(node, "linux,code", &key[i].code)) {
-			printf("failed read 'linux,code' of %s key\n",
-			       key[i].name);
-			return -EINVAL;
-		}
-		if (ofnode_read_u32_array(node, "gpios", gpios, 2)) {
-			printf("failed to read 'gpios' of %s key\n",
-			       key[i].name);
-			return -EINVAL;
+		key = calloc(1, sizeof(struct input_key));
+		if (!key)
+			return -ENOMEM;
+
+		key->parent = dev;
+		key->type = GPIO_KEY;
+		key->name = ofnode_read_string(node, "label");
+		ret = ofnode_read_u32(node, "linux,code", &key->code);
+		if (ret) {
+			printf("%s: failed read 'linux,code', ret=%d\n",
+			       key->name, ret);
+			free(key);
+			continue;
 		}
 
-		/* Must register as interrupt, be able to wakeup system */
-		irq = phandle_gpio_to_irq(gpios[0], gpios[1]);
-		if (irq < 0) {
-			printf("failed to request irq for gpio, ret=%d\n", irq);
-			return irq;
+		/* Only register power key as interrupt */
+		if (key->code == KEY_POWER) {
+			ret = ofnode_read_u32_array(node, "gpios", gpios, 2);
+			if (ret) {
+				printf("%s: failed to read 'gpios', ret=%d\n",
+				       key->name, ret);
+				free(key);
+				continue;
+			}
+
+			/* Must register as interrupt, be able to wakeup system */
+			irq = phandle_gpio_to_irq(gpios[0], gpios[1]);
+			if (irq < 0) {
+				printf("%s: failed to request irq, ret=%d\n",
+				       key->name, irq);
+				free(key);
+				continue;
+			}
+			key->irq = irq;
+			key_add(key);
+			irq_install_handler(irq, gpio_irq_handler, key);
+			irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);
+			irq_handler_enable(irq);
+		} else {
+			ret = gpio_request_by_name_nodev(node, "gpios", 0,
+							 &key->gpio,
+							 GPIOD_IS_IN);
+			if (ret) {
+				printf("%s: failed to request gpio, ret=%d\n",
+				       key->name, ret);
+			}
+
+			key_add(key);
 		}
-		key[i].irq = irq;
-		irq_install_handler(irq, gpio_irq_handler, dev);
-		irq_handler_enable(irq);
-		irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);
-
-		debug("%s: name=%s: code=%d\n",
-		      __func__, key[i].name, key[i].code);
 
-		/* Next node */
-		i++;
-		priv->key_nr = i;
-		if (i >= MAX_KEY_NR) {
-			printf("Too many keys, Max support: %d\n", MAX_KEY_NR);
-			return -EINVAL;
-		}
+		debug("%s: name=%s: code=%d\n", __func__, key->name, key->code);
 	}
 
 	return 0;
 }
 
-static int gpio_key_read(struct udevice *dev, int code)
-{
-	struct gpio_key_priv *priv = dev_get_priv(dev);
-	struct input_key *key = dev_get_platdata(dev);
-	u32 report = KEY_NOT_EXIST;
-	int i = 0;
-
-	for (i = 0; i < priv->key_nr; i++) {
-		if (key[i].code != code)
-			continue;
-		report = key_parse_gpio_event(&key[i]);
-		break;
-	}
-
-	return report;
-}
-
 static const struct dm_key_ops key_ops = {
 	.name = "gpio-keys",
-	.read = gpio_key_read,
 };
 
 static const struct udevice_id gpio_key_ids[] = {
@@ -133,6 +119,4 @@ U_BOOT_DRIVER(gpio_keys) = {
 	.of_match = gpio_key_ids,
 	.ops	= &key_ops,
 	.ofdata_to_platdata = gpio_key_ofdata_to_platdata,
-	.platdata_auto_alloc_size = sizeof(struct input_key) * MAX_KEY_NR,
-	.priv_auto_alloc_size = sizeof(struct gpio_key_priv),
 };
diff --git a/drivers/input/key-uclass.c b/drivers/input/key-uclass.c
index efa6001311..6fc0decfab 100644
--- a/drivers/input/key-uclass.c
+++ b/drivers/input/key-uclass.c
@@ -4,10 +4,12 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 
-#include <dm.h>
-#include <key.h>
 #include <common.h>
+#include <adc.h>
 #include <dm.h>
+#include <key.h>
+
+static LIST_HEAD(key_list);
 
 static inline uint64_t arch_counter_get_cntpct(void)
 {
@@ -22,7 +24,7 @@ static inline uint64_t arch_counter_get_cntpct(void)
 	return cval;
 }
 
-uint64_t key_get_timer(uint64_t base)
+uint64_t key_timer(uint64_t base)
 {
 	uint64_t cntpct;
 
@@ -30,50 +32,51 @@ uint64_t key_get_timer(uint64_t base)
 	return (cntpct > base) ? (cntpct - base) : 0;
 }
 
-static int key_state_valid(int state)
-{
-	return (state >= KEY_PRESS_NONE && state < KEY_NOT_EXIST);
-}
-
-static int key_read(struct udevice *dev, int code)
-{
-	const struct dm_key_ops *ops = dev_get_driver_ops(dev);
-
-	if (!ops || !ops->read)
-		return -ENOSYS;
-
-	return ops->read(dev, code);
-}
-
-int key_parse_adc_event(struct input_key *key, unsigned int adcval)
+/*
+ * What's simple and complex event mean?
+ *
+ * simple event:   key press down or none;
+ * complext event: key press down, long down or none;
+ */
+static int key_read_adc_simple_event(struct input_key *key, unsigned int adcval)
 {
-	int report = KEY_NOT_EXIST;
-	int max, min;
+	int max, min, margin = 30;
+	int keyval;
 
 	/* Get min, max */
-	max = key->value + key->margin;
-	if (key->value > key->margin)
-		min = key->value - key->margin;
+	max = key->adcval + margin;
+	if (key->adcval > margin)
+		min = key->adcval - margin;
 	else
-		min = key->value;
+		min = 0;
 
-	debug("%s: %s: max=%d, min=%d, adcval=%d\n",
-	      __func__, key->name, max, min, adcval);
+	debug("%s: %s: val=%d, max=%d, min=%d, adcval=%d\n",
+	      __func__, key->name, key->adcval, max, min, adcval);
 
 	/* Check */
 	if ((adcval <= max) && (adcval >= min)) {
-		report = KEY_PRESS_DOWN;
-		printf("%s key pressed..\n", key->name);
+		keyval = KEY_PRESS_DOWN;
+		debug("%s key pressed..\n", key->name);
 	} else {
-		report = KEY_PRESS_NONE;
+		keyval = KEY_PRESS_NONE;
+	}
+
+	return keyval;
+}
+
+static int key_read_gpio_simple_event(struct input_key *key)
+{
+	if (!dm_gpio_is_valid(&key->gpio)) {
+		printf("%s: invalid gpio\n", key->name);
+		return KEY_PRESS_NONE;
 	}
 
-	return report;
+	return dm_gpio_get_value(&key->gpio) ? KEY_PRESS_DOWN : KEY_PRESS_NONE;
 }
 
-int key_parse_gpio_event(struct input_key *key)
+static int key_read_gpio_complex_event(struct input_key *key)
 {
-	u32 report = KEY_NOT_EXIST;
+	int keyval;
 
 	debug("%s: %s: up=%llu, down=%llu, delta=%llu\n",
 	      __func__, key->name, key->up_t, key->down_t,
@@ -81,7 +84,7 @@ int key_parse_gpio_event(struct input_key *key)
 
 	/* Possible this is machine power-on long pressed, so ignore this */
 	if (key->down_t == 0 && key->up_t != 0) {
-		report = KEY_PRESS_NONE;
+		keyval = KEY_PRESS_NONE;
 		goto out;
 	}
 
@@ -89,45 +92,113 @@ int key_parse_gpio_event(struct input_key *key)
 	    (key->up_t - key->down_t) >= KEY_LONG_DOWN_MS) {
 		key->up_t = 0;
 		key->down_t = 0;
-		report = KEY_PRESS_LONG_DOWN;
-		printf("%s key long pressed(hold)..\n", key->name);
+		keyval = KEY_PRESS_LONG_DOWN;
+		debug("%s key long pressed..\n", key->name);
 	} else if (key->down_t &&
-		   key_get_timer(key->down_t) >= KEY_LONG_DOWN_MS) {
+		   key_timer(key->down_t) >= KEY_LONG_DOWN_MS) {
 		key->up_t = 0;
 		key->down_t = 0;
-		report = KEY_PRESS_LONG_DOWN;
-		printf("%s key long pressed..\n", key->name);
+		keyval = KEY_PRESS_LONG_DOWN;
+		debug("%s key long pressed(hold)..\n", key->name);
 	} else if ((key->up_t > key->down_t) &&
 		   (key->up_t - key->down_t) < KEY_LONG_DOWN_MS) {
 		key->up_t = 0;
 		key->down_t = 0;
-		report = KEY_PRESS_DOWN;
-		printf("%s key short pressed..\n", key->name);
+		keyval = KEY_PRESS_DOWN;
+		debug("%s key short pressed..\n", key->name);
+	/* Possible in charge animation, we enable irq after fuel gauge updated */
+	} else if (key->up_t && key->down_t && (key->up_t == key->down_t)){
+		key->up_t = 0;
+		key->down_t = 0;
+		keyval = KEY_PRESS_DOWN;
+		debug("%s key short pressed..\n", key->name);
 	} else {
-		report = KEY_PRESS_NONE;
+		keyval = KEY_PRESS_NONE;
 	}
 
 out:
-	return report;
+	return keyval;
 }
 
-int platform_key_read(int code)
+static int key_read_gpio_interrupt_event(struct input_key *key)
+{
+	debug("%s: %s\n", __func__, key->name);
+
+	return key_read_gpio_complex_event(key);
+}
+
+int key_is_pressed(int keyval)
+{
+	return (keyval == KEY_PRESS_DOWN || keyval == KEY_PRESS_LONG_DOWN);
+}
+
+void key_add(struct input_key *key)
+{
+	if (!key)
+		return;
+
+	list_add_tail(&key->link, &key_list);
+}
+
+int key_read(int code)
 {
 	struct udevice *dev;
-	int report = KEY_NOT_EXIST;
-
-	for (uclass_first_device(UCLASS_KEY, &dev);
-	     dev;
-	     uclass_next_device(&dev)) {
-		debug("key dev.name = %s, code = %d\n", dev->name, code);
-		report = key_read(dev, code);
-		if (key_state_valid(report)) {
-			debug("key dev.name = %s, state=%d\n", dev->name, report);
+	struct input_key *key;
+	static int initialized;
+	unsigned int adcval;
+	int keyval = KEY_NOT_EXIST;
+	int found = 0, ret;
+
+	/* Initialize all key drivers */
+	if (!initialized) {
+		for (uclass_first_device(UCLASS_KEY, &dev);
+		     dev;
+		     uclass_next_device(&dev)) {
+			debug("%s: dev.name = %s\n", __func__, dev->name);
+			;
+		}
+	}
+
+	/* Search on the key list */
+	list_for_each_entry(key, &key_list, link) {
+		if (key->code == code) {
+			found = 1;
 			break;
 		}
 	}
+	if (!found)
+		goto out;
+
+	/* Is a adc key? */
+	if (key->type & ADC_KEY) {
+		ret = adc_channel_single_shot("saradc", key->channel, &adcval);
+		if (ret)
+			printf("%s: failed to read saradc, ret=%d\n",
+			       key->name, ret);
+		else
+			keyval = key_read_adc_simple_event(key, adcval);
+	/* Is a gpio key? */
+	} else if (key->type & GPIO_KEY) {
+		/* All pwrkey must register as an interrupt event */
+		if (key->code == KEY_POWER) {
+			keyval = key_read_gpio_interrupt_event(key);
+		} else {
+			keyval = key_read_gpio_simple_event(key);
+		}
+	} else {
+		printf("%s: invalid key type!\n", __func__);
+	}
 
-	return report;
+	debug("%s: key.name=%s, code=%d, keyval=%d\n",
+	      __func__, key->name, key->code, keyval);
+
+out:
+	return keyval;
+}
+
+int platform_key_read(int code)
+{
+	return KEY_NOT_EXIST;
 }
 
 UCLASS_DRIVER(key) = {
diff --git a/drivers/input/rk8xx_pwrkey.c b/drivers/input/rk8xx_pwrkey.c
index 3f10a2c3cb..fc3ee631e5 100644
--- a/drivers/input/rk8xx_pwrkey.c
+++ b/drivers/input/rk8xx_pwrkey.c
@@ -101,16 +101,6 @@ static struct reg_data rk805_init_reg[] = {
 	{ RK805_INT_STS_REG, 0xff },
 };
 
-static int rk8xx_pwrkey_read(struct udevice *dev, int code)
-{
-	struct input_key *key = dev_get_platdata(dev);
-
-	if (key->code != code)
-		return KEY_NOT_EXIST;
-
-	return key_parse_gpio_event(key);
-}
-
 static void pwrkey_irq_handler(int irq, void *data)
 {
 	struct udevice *dev = data;
@@ -145,13 +135,13 @@ static void pwrkey_irq_handler(int irq, void *data)
 
 	/* fall event */
 	if (val & priv->pwron_fall_int) {
-		key->down_t = key_get_timer(0);
+		key->down_t = key_timer(0);
 		debug("%s: key down: %llu ms\n", __func__, key->down_t);
 	}
 
 	/* rise event */
 	if (val & priv->pwron_rise_int) {
-		key->up_t = key_get_timer(0);
+		key->up_t = key_timer(0);
 		debug("%s: key up: %llu ms\n", __func__, key->up_t);
 	}
 
@@ -188,9 +178,17 @@ static int pwrkey_interrupt_init(struct udevice *dev)
 		return ret;
 	}
 
-	key->name = "power";
+	key->parent = dev;
+	key->name = "rk8xx_pwrkey";
 	key->code = KEY_POWER;
+	key->type = GPIO_KEY;
 	irq = phandle_gpio_to_irq(phandle, interrupt[0]);
+	if (irq < 0) {
+		printf("%s: failed to request irq, ret=%d\n", key->name, irq);
+		return irq;
+	}
+	key->irq = irq;
+	key_add(key);
 	irq_install_handler(irq, pwrkey_irq_handler, dev);
 	irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);
 	irq_handler_enable(irq);
@@ -200,7 +198,6 @@ static int pwrkey_interrupt_init(struct udevice *dev)
 
 static const struct dm_key_ops key_ops = {
 	.name = "rk8xx-pwrkey",
-	.read = rk8xx_pwrkey_read,
 };
 
 static int rk8xx_pwrkey_probe(struct udevice *dev)
diff --git a/drivers/input/rk_key.c b/drivers/input/rk_key.c
index cf5e7a865a..8a58e1b0e1 100644
--- a/drivers/input/rk_key.c
+++ b/drivers/input/rk_key.c
@@ -19,54 +19,33 @@
 #include <irq-generic.h>
 #include <irq-platform.h>
 
-#define ADC_MARGIN		30
-#define MAX_KEY_NR		10
-
-struct rk_key_priv {
-	u32 key_nr;
-};
-
-enum {
-	INVAL_KEY = 0,
-	ADC_KEY,
-	GPIO_KEY,
-};
-
 static void gpio_irq_handler(int irq, void *data)
 {
-	struct udevice *dev = data;
-	struct rk_key_priv *priv = dev_get_priv(dev);
-	struct input_key *key = dev_get_platdata(dev);
-	int i;
-
-	for (i = 0; i < priv->key_nr; i++) {
-		if (key[i].irq != irq)
-			continue;
-
-		/* up event */
-		if (irq_get_gpio_level(irq)) {
-			key[i].up_t = key_get_timer(0);
-			debug("%s: key down: %llu ms\n",
-			      key[i].name, key[i].down_t);
-		/* down event */
-		} else {
-			key[i].down_t = key_get_timer(0);
-			debug("%s: key up: %llu ms\n",
-			      key[i].name, key[i].up_t);
-		}
-		/* Must delay */
-		mdelay(10);
-		irq_revert_irq_type(irq);
+	struct input_key *key = data;
+
+	if (key->irq != irq)
+		return;
+
+	/* up event */
+	if (irq_get_gpio_level(irq)) {
+		key->up_t = key_timer(0);
+		debug("%s: key down: %llu ms\n", key->name, key->down_t);
+	/* down event */
+	} else {
+		key->down_t = key_timer(0);
+		debug("%s: key up: %llu ms\n", key->name, key->up_t);
 	}
+	/* Must delay */
+	mdelay(10);
+	irq_revert_irq_type(irq);
 }
 
 static int rk_keys_ofdata_to_platdata(struct udevice *dev)
 {
-	struct rk_key_priv *priv = dev_get_priv(dev);
-	struct input_key *key = dev_get_platdata(dev);
-	u32 adc_channels[2], gpios[2], adcval, i = 0;
+	struct input_key *key;
+	u32 adc_channels[2], gpios[2], adcval;
+	int irq, ret;
 	ofnode node;
-	int irq;
 
 	/* Get IO channel */
 	if (dev_read_u32_array(dev, "io-channels", adc_channels, 2)) {
@@ -75,94 +54,83 @@ static int rk_keys_ofdata_to_platdata(struct udevice *dev)
 	}
 
 	dev_for_each_subnode(node, dev) {
+		key = calloc(1, sizeof(struct input_key));
+		if (!key)
+			return -ENOMEM;
+
 		/* This is an ACD key */
 		if (!ofnode_read_u32(node, "rockchip,adc_value", &adcval)) {
-			key[i].name = ofnode_read_string(node, "label");
-			key[i].flag = ADC_KEY;
-			key[i].margin = ADC_MARGIN;
-			key[i].value = adcval;
-			key[i].channel = adc_channels[1];
-			if (ofnode_read_u32(node, "linux,code", &key[i].code)) {
+			key->parent = dev;
+			key->name = ofnode_read_string(node, "label");
+			key->type = ADC_KEY;
+			key->adcval = adcval;
+			key->channel = adc_channels[1];
+			if (ofnode_read_u32(node, "linux,code", &key->code)) {
 				printf("%s: failed to read 'linux,code'\n",
-				       key[i].name);
-				return -EINVAL;
+				       key->name);
+				free(key);
+				continue;
 			}
 		/* This is a GPIO key */
 		} else {
-			key[i].name = ofnode_read_string(node, "label");
-			key[i].flag = GPIO_KEY;
-			if (ofnode_read_u32_array(node, "gpios", gpios, 2)) {
-				printf("%s: failed to read 'gpios'\n",
-				       key[i].name);
-				return -EINVAL;
-			}
-			if (ofnode_read_u32(node, "linux,code", &key[i].code)) {
-				printf("%s: failed read 'linux,code'\n",
-				       key[i].name);
-				return -EINVAL;
+			key->parent = dev;
+			key->type = GPIO_KEY;
+			key->name = ofnode_read_string(node, "label");
+			ret = ofnode_read_u32(node, "linux,code", &key->code);
+			if (ret) {
+				printf("%s: failed read 'linux,code', ret=%d\n",
+				       key->name, ret);
+				free(key);
+				continue;
 			}
 
-			/* Request irq */
-			irq = phandle_gpio_to_irq(gpios[0], gpios[1]);
-			if (irq < 0) {
-				printf("%s: failed to request irq, ret=%d\n",
-				       __func__, irq);
-				return irq;
+			/* Only register power key as interrupt */
+			if (key->code == KEY_POWER) {
+				ret = ofnode_read_u32_array(node, "gpios",
+							    gpios, 2);
+				if (ret) {
+					printf("%s: failed to read 'gpios', ret=%d\n",
+					       key->name, ret);
+					free(key);
+					continue;
+				}
+
+				/* Request irq */
+				irq = phandle_gpio_to_irq(gpios[0], gpios[1]);
+				if (irq < 0) {
+					printf("%s: failed to request irq, ret=%d\n",
+					       __func__, irq);
+					free(key);
+					continue;
+				}
+				key->irq = irq;
+				key_add(key);
+				irq_install_handler(irq, gpio_irq_handler, key);
+				irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);
+				irq_handler_enable(irq);
+			} else {
+				ret = gpio_request_by_name_nodev(node, "gpios",
+						0, &key->gpio, GPIOD_IS_IN);
+				if (ret) {
+					printf("%s: failed to request gpio, ret=%d\n",
+					       key->name, ret);
+					free(key);
+					continue;
+				}
+				key_add(key);
 			}
-			key[i].irq = irq;
-			irq_install_handler(irq, gpio_irq_handler, dev);
-			irq_handler_enable(irq);
-			irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);
 		}
 
-		debug("%s: name=%s: code=%d, val=%d, channel=%d, flag=%d, margin=%d\n",
-		      __func__, key[i].name, key[i].code, key[i].value,
-		      key[i].channel, key[i].flag, key[i].margin);
-
-		/* Next node */
-		i++;
-		priv->key_nr = i;
-		if (i >= MAX_KEY_NR) {
-			printf("Too many keys, Max support: %d\n", MAX_KEY_NR);
-			return -EINVAL;
-		}
+		debug("%s: name=%s: code=%d, adcval=%d, channel=%d, type=%d\n",
+		      __func__, key->name, key->code, key->adcval,
+		      key->channel, key->type);
 	}
 
 	return 0;
 }
 
-static int rk_keys_read(struct udevice *dev, int code)
-{
-	struct rk_key_priv *priv = dev_get_priv(dev);
-	struct input_key *key = dev_get_platdata(dev);
-	int report = KEY_NOT_EXIST;
-	int i = 0;
-	unsigned int adcval;
-
-	for (i = 0; i < priv->key_nr; i++) {
-		if (key[i].code != code)
-			continue;
-
-		if (key[i].flag == ADC_KEY) {
-			if (adc_channel_single_shot("saradc",
-						    key[i].channel, &adcval)) {
-				printf("%s: failed to read saradc\n",
-				       key[i].name);
-			} else {
-				report = key_parse_adc_event(&key[i], adcval);
-			}
-		} else {
-			report = key_parse_gpio_event(&key[i]);
-		}
-		break;
-	}
-
-	return report;
-}
-
 static const struct dm_key_ops key_ops = {
 	.name = "rk-keys",
-	.read = rk_keys_read,
 };
 
 static const struct udevice_id rk_keys_ids[] = {
@@ -176,6 +144,4 @@ U_BOOT_DRIVER(rk_keys) = {
 	.ops	= &key_ops,
 	.of_match = rk_keys_ids,
 	.ofdata_to_platdata = rk_keys_ofdata_to_platdata,
-	.platdata_auto_alloc_size = sizeof(struct input_key) * MAX_KEY_NR,
-	.priv_auto_alloc_size = sizeof(struct rk_key_priv),
 };
diff --git a/include/key.h b/include/key.h
index ab4471b7a8..36812f748c 100644
--- a/include/key.h
+++ b/include/key.h
@@ -7,10 +7,17 @@
 #ifndef _KEY_H_
 #define _KEY_H_
 
+#include <asm-generic/gpio.h>
 #include <dt-bindings/input/linux-event-codes.h>
 
 #define KEY_LONG_DOWN_MS	2000
 
+enum {
+	INVAL_KEY = 0x0,
+	ADC_KEY   = 0x1,
+	GPIO_KEY  = 0x2,
+};
+
 enum key_state {
 	KEY_PRESS_NONE,	/* press without release */
 	KEY_PRESS_DOWN,	/* press -> release */
@@ -18,30 +25,44 @@ enum key_state {
 	KEY_NOT_EXIST,
 };
 
-struct dm_key_ops {
-	const char *name;
-	int (*read)(struct udevice *dev, int code);
-};
-
 struct input_key {
+	struct udevice *parent;
+	struct list_head link;
 	const char *name;
 	u32 code;
-	u32 channel;
-	u32 value;
-	u32 margin;
+	u8 type;
+
+	/* ADC key */
+	u32 adcval;
 	u32 vref;
-	int flag;
+	u8 channel;
 
+	/* GPIO key */
 	u32 irq;
+	struct gpio_desc gpio;
+
+	/* Event */
 	u64 up_t;
 	u64 down_t;
 };
 
-uint64_t key_get_timer(uint64_t base);
-int platform_key_read(int code);
+struct dm_key_ops {
+	const char *name;
+};
+
+/* Use it instead of get_timer() in key interrupt handler */
+uint64_t key_timer(uint64_t base);
 
-/* General interface for adc or gpio interrupt key event parse */
-int key_parse_gpio_event(struct input_key *key);
-int key_parse_adc_event(struct input_key *key, unsigned int adcval);
+/* Reister you key to dm key framework */
+void key_add(struct input_key *key);
+
+/* Confirm if your key value is a press event */
+int key_is_pressed(int keyval);
+
+/* Read key */
+int key_read(int code);
+
+/* deprecated */
+int platform_key_read(int code);
 
 #endif

commit 99b886601743614d976040d9c37aa9b539488228
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 17 11:53:40 2018 +0800

    rockchip: evb_rk3229: remove unused configure
    
    Change-Id: Ifcea5ff63d0a68d3ca6a327bbd216da7e4a7b842
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/evb_rk3229.h b/include/configs/evb_rk3229.h
index f9868d8aea..db1a843e80 100644
--- a/include/configs/evb_rk3229.h
+++ b/include/configs/evb_rk3229.h
@@ -20,23 +20,9 @@
 #define CONFIG_SUPPORT_EMMC_RPMB
 
 #ifndef CONFIG_SPL_BUILD
-/* Enable gpt partition table */
-#undef CONFIG_PREBOOT
-#define CONFIG_PREBOOT \
-	"mmc dev 0; " \
-	"gpt guid mmc 0; " \
-	"if test $? = 1; then " \
-		"fastboot usb 0; " \
-	"fi; "
-
-#define CONFIG_SYS_BOOT_RAMDISK_HIGH
-
-/* Enable atags */
-#define CONFIG_SYS_BOOTPARAMS_LEN	(64*1024)
-#define CONFIG_INITRD_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_CMDLINE_TAG
 
+#undef CONFIG_BOOTCOMMAND
+#define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
 #endif
 
 #endif

commit 70cdc99019eb29736b6789706110c695bb612014
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 16 20:36:21 2018 +0800

    configs: add rk322x_defconfig
    
    Change-Id: I3ead4f8d9d34aae340973f729aa7caf0054f6500
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk322x_defconfig b/configs/rk322x_defconfig
new file mode 100644
index 0000000000..40380018f0
--- /dev/null
+++ b/configs/rk322x_defconfig
@@ -0,0 +1,110 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x800
+CONFIG_ROCKCHIP_RK322X=y
+CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl.lds"
+CONFIG_TPL_TEXT_BASE=0x10081000
+CONFIG_TPL_MAX_SIZE=28672
+CONFIG_TPL_STACK=0x10088000
+CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_TARGET_EVB_RK3229=y
+CONFIG_SPL_STACK_R_ADDR=0x60600000
+CONFIG_DEFAULT_DEVICE_TREE="rk3229-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_SOURCE="arch/arm/mach-rockchip/fit_spl_optee.its"
+CONFIG_BOOTDELAY=0
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_TPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
+CONFIG_SPL_OPTEE=y
+CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_RKPARM_PARTITION=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_TPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_TPL_DM=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_TPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_TPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_TPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_ADC_KEY=y
+CONFIG_GPIO_KEY=y
+CONFIG_RK_KEY=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PINCTRL=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0x11030000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x18d1
+CONFIG_G_DNL_PRODUCT_NUM=0xd00d
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_DRM_ROCKCHIP_LVDS=y
+CONFIG_DRM_ROCKCHIP_RGB=y
+CONFIG_LCD=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_TPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
+CONFIG_TEST_ROCKCHIP=y

commit ade6d65fa167bb7a6f9e4c5af94229600a8fade2
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Fri Jul 20 15:46:33 2018 +0800

    rockchip: sdram_common: move BROM_BOOTSOURCE_ID_ADDR to sdram_common.h
    
    Change-Id: I35d33524ffb19da21bf12622b5cbfd9933ea5a49
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h b/arch/arm/include/asm/arch-rockchip/sdram_common.h
index 33c8192f8e..d250759c11 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_common.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_common.h
@@ -78,6 +78,8 @@ enum {
 #define SYS_REG1_CS1_COL_SHIFT(ch)		(0 + (ch) * 2)
 #define SYS_REG1_CS1_COL_MASK			3
 
+#define BROM_BOOTSOURCE_ID_ADDR (CONFIG_ROCKCHIP_IRAM_START_ADDR + 0x10)
+
 /* Get sdram size decode from reg */
 size_t rockchip_sdram_size(phys_addr_t reg);
 
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index bd09ce3917..d6b5c91f80 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -345,6 +345,7 @@ config ROCKCHIP_IRAM_START_ADDR
 	default 0x10080000 if ROCKCHIP_RK3188
 	default 0x10080000 if ROCKCHIP_RK322X
 	default 0xff700000 if ROCKCHIP_RK3288
+	default 0xfff80000 if ROCKCHIP_RK3308
 	default 0xff091000 if ROCKCHIP_RK3328
 	default 0xff8c0000 if ROCKCHIP_RK3368
 	default 0xff8c0000 if ROCKCHIP_RK3399
diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index 53ff85b00a..b0de24030a 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -10,12 +10,12 @@
 #include <ram.h>
 #include <spl.h>
 #include <asm/arch/bootrom.h>
+#include <asm/arch/sdram_common.h>
 #include <asm/arch-rockchip/sys_proto.h>
 #include <asm/io.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define BROM_BOOTSOURCE_ID_ADDR (CONFIG_ROCKCHIP_IRAM_START_ADDR + 0x10)
 void board_return_to_bootrom(void)
 {
 	back_to_bootrom(BROM_BOOT_NEXTSTAGE);

commit c6c6283c781a7a614d2ec1e7927150385c0ffd0b
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Sat Jul 14 17:36:21 2018 +0800

    rockchip: clk: rk3399: fix up the hdmi clk error
    
    make the dclk_vop div=1.
    
    Change-Id: I0faedbd557cddd55f93529d66f2f7815ce4c5f9e
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 8ece6e9578..74ef6a64ca 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -696,7 +696,6 @@ static ulong rk3399_spi_set_clk(struct rk3399_cru *cru, ulong clk_id, uint hz)
 	return rk3399_spi_get_clk(cru, clk_id);
 }
 
-#define RK3399_LIMIT_PLL_DCLK_VOP	(600 * 1000000)
 #define RK3399_LIMIT_PLL_ACLK_VOP	(400 * 1000000)
 
 static ulong rk3399_vop_set_clk(struct rk3399_cru *cru, ulong clk_id, u32 hz)
@@ -727,14 +726,12 @@ static ulong rk3399_vop_set_clk(struct rk3399_cru *cru, ulong clk_id, u32 hz)
 		     ACLK_VOP_PLL_SEL_GPLL << ACLK_VOP_PLL_SEL_SHIFT |
 		     (div - 1) << ACLK_VOP_DIV_CON_SHIFT);
 
-	div = DIV_ROUND_UP(RK3399_LIMIT_PLL_DCLK_VOP, hz);
-
 	if (readl(dclkreg_addr) & DCLK_VOP_PLL_SEL_MASK) {
-		if (pll_para_config(div * hz, &cpll_config))
+		if (pll_para_config(hz, &cpll_config))
 			return -1;
 		rkclk_set_pll(&cru->cpll_con[0], &cpll_config);
 	} else {
-		if (pll_para_config(div * hz, &vpll_config))
+		if (pll_para_config(hz, &vpll_config))
 			return -1;
 		rkclk_set_pll(&cru->vpll_con[0], &vpll_config);
 	}
@@ -742,7 +739,7 @@ static ulong rk3399_vop_set_clk(struct rk3399_cru *cru, ulong clk_id, u32 hz)
 	rk_clrsetreg(dclkreg_addr,
 		     DCLK_VOP_DCLK_SEL_MASK | DCLK_VOP_DIV_CON_MASK,
 		     DCLK_VOP_DCLK_SEL_DIVOUT << DCLK_VOP_DCLK_SEL_SHIFT |
-		     (div - 1) << DCLK_VOP_DIV_CON_SHIFT);
+		     (1 - 1) << DCLK_VOP_DIV_CON_SHIFT);
 
 	return hz;
 }

commit c5c7b477dfb1a1b01802fa408a18643cc8d7c63b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Jul 20 11:17:38 2018 +0800

    rockchip: dts: update mmc property "ciu-sample"
    
    dts property always use '-' instead of '_' for description
    
    Change-Id: I216549bec2850c614b2173ac4a3bae58da317379
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3036.dtsi b/arch/arm/dts/rk3036.dtsi
index 4a78bb5010..5f37fa8459 100644
--- a/arch/arm/dts/rk3036.dtsi
+++ b/arch/arm/dts/rk3036.dtsi
@@ -252,7 +252,7 @@
 		max-frequency = <37500000>;
 		clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
 		<&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
-		clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
 		dmas = <&pdma 12>;
 		dma-names = "rx-tx";
 		fifo-depth = <0x100>;
diff --git a/arch/arm/dts/rk3128.dtsi b/arch/arm/dts/rk3128.dtsi
index cf63f34b70..a10937e044 100644
--- a/arch/arm/dts/rk3128.dtsi
+++ b/arch/arm/dts/rk3128.dtsi
@@ -513,7 +513,7 @@
 		interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
 			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
-		clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
 		fifo-depth = <0x100>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
@@ -528,7 +528,7 @@
 		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
 			 <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
-		clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
 		bus-width = <8>;
 		default-sample-phase = <158>;
 		num-slots = <1>;
diff --git a/arch/arm/dts/rk322x.dtsi b/arch/arm/dts/rk322x.dtsi
index 3192980c48..e05835267d 100644
--- a/arch/arm/dts/rk322x.dtsi
+++ b/arch/arm/dts/rk322x.dtsi
@@ -454,7 +454,7 @@
 		interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
 			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
-		clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
 		fifo-depth = <0x100>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
@@ -467,7 +467,7 @@
 		interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
 			 <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
-		clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
 		fifo-depth = <0x100>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&sdio_clk &sdio_cmd &sdio_bus4>;
@@ -481,7 +481,7 @@
 		interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
 			 <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
-		clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
 		bus-width = <8>;
 		default-sample-phase = <158>;
 		num-slots = <1>;
diff --git a/arch/arm/dts/rk3288-veyron.dtsi b/arch/arm/dts/rk3288-veyron.dtsi
index a1dad688b0..5189a16546 100644
--- a/arch/arm/dts/rk3288-veyron.dtsi
+++ b/arch/arm/dts/rk3288-veyron.dtsi
@@ -274,7 +274,7 @@
 	card-external-vcc-supply = <&wifi_regulator>;
 	clocks = <&cru HCLK_SDIO0>, <&cru SCLK_SDIO0>, <&cru SCLK_SDIO0_DRV>,
 		 <&cru SCLK_SDIO0_SAMPLE>, <&rk808 RK808_CLKOUT1>;
-	clock-names = "biu", "ciu", "ciu_drv", "ciu_sample", "card_ext_clock";
+	clock-names = "biu", "ciu", "ciu-drv", "ciu-sample", "card-ext-clock";
 	keep-power-in-suspend;
 	non-removable;
 	num-slots = <1>;
diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index f7654fa5b2..20adb0dece 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -191,7 +191,7 @@
 		max-frequency = <150000000>;
 		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
 			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
-		clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
 		fifo-depth = <0x100>;
 		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
 		reg = <0xff0c0000 0x4000>;
@@ -203,7 +203,7 @@
 		max-frequency = <150000000>;
 		clocks = <&cru HCLK_SDIO0>, <&cru SCLK_SDIO0>,
 			 <&cru SCLK_SDIO0_DRV>, <&cru SCLK_SDIO0_SAMPLE>;
-		clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
 		fifo-depth = <0x100>;
 		interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
 		reg = <0xff0d0000 0x4000>;
@@ -215,7 +215,7 @@
 		max-frequency = <150000000>;
 		clocks = <&cru HCLK_SDIO1>, <&cru SCLK_SDIO1>,
 			 <&cru SCLK_SDIO1_DRV>, <&cru SCLK_SDIO1_SAMPLE>;
-		clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
 		fifo-depth = <0x100>;
 		interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
 		reg = <0xff0e0000 0x4000>;
@@ -227,7 +227,7 @@
 		max-frequency = <150000000>;
 		clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
 			 <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
-		clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
 		fifo-depth = <0x100>;
 		interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
 		reg = <0xff0f0000 0x4000>;
diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi
index e6df508c8f..94d39b1b35 100644
--- a/arch/arm/dts/rk3328.dtsi
+++ b/arch/arm/dts/rk3328.dtsi
@@ -480,7 +480,7 @@
 		max-frequency = <150000000>;
 		clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
 			 <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
-		clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
 		fifo-depth = <0x100>;
 		interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
 		status = "disabled";
diff --git a/arch/arm/dts/rk3368.dtsi b/arch/arm/dts/rk3368.dtsi
index 21b0971de3..70f432ced1 100644
--- a/arch/arm/dts/rk3368.dtsi
+++ b/arch/arm/dts/rk3368.dtsi
@@ -261,7 +261,7 @@
 		clock-freq-min-max = <400000 150000000>;
 		clocks = <&cru HCLK_SDIO0>, <&cru SCLK_SDIO0>,
 			 <&cru SCLK_SDIO0_DRV>, <&cru SCLK_SDIO0_SAMPLE>;
-		clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
 		fifo-depth = <0x100>;
 		interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
 		status = "disabled";

commit d114ba00ec73f3f299d7a1ac8d9974afda4c92aa
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 17 12:02:35 2018 +0800

    core: dump: increase info length
    
    Change-Id: Ide57bc45fcdeb5fb158ae67d0c56a9f80ac4d8cf
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/core/dump.c b/drivers/core/dump.c
index 6c6b944453..1cc929203b 100644
--- a/drivers/core/dump.c
+++ b/drivers/core/dump.c
@@ -16,7 +16,7 @@ static void show_devices(struct udevice *dev, int depth, int last_flag)
 	struct udevice *child;
 
 	/* print the first 11 characters to not break the tree-format. */
-	printf(" %-10.10s [ %c ]   %-10.10s  ", dev->uclass->uc_drv->name,
+	printf(" %-10.10s [ %c ]   %-25.25s  ", dev->uclass->uc_drv->name,
 	       dev->flags & DM_FLAG_ACTIVATED ? '+' : ' ', dev->driver->name);
 
 	for (i = depth; i >= 0; i--) {
@@ -48,8 +48,8 @@ void dm_dump_all(void)
 
 	root = dm_root();
 	if (root) {
-		printf(" Class      Probed  Driver      Name\n");
-		printf("----------------------------------------\n");
+		printf(" Class      Probed        Driver               Name\n");
+		printf("----------------------------------------------------------\n");
 		show_devices(root, -1, 0);
 	}
 }

commit 68d7ed5765f6c6c783e94df473bb090db84c49c6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 17 11:55:49 2018 +0800

    rockchip: rk3368: do arch_cpu_init() not only when SPL
    
    Change-Id: I1ee279e0011c566517494de2f9898d6818463edb
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3368/rk3368.c b/arch/arm/mach-rockchip/rk3368/rk3368.c
index b00364305f..03c1b9b48f 100644
--- a/arch/arm/mach-rockchip/rk3368/rk3368.c
+++ b/arch/arm/mach-rockchip/rk3368/rk3368.c
@@ -124,7 +124,6 @@ int arch_early_init_r(void)
 }
 #endif
 
-#ifdef CONFIG_SPL_BUILD
 static void cpu_axi_qos_prority_level_config(void)
 {
 	u32 level;
@@ -155,6 +154,7 @@ static void cpu_axi_qos_prority_level_config(void)
 	writel(level, ISP_W1_QOS_BASE + CPU_AXI_QOS_PRIORITY);
 }
 
+#ifdef CONFIG_SPL_BUILD
 /*
  * The SPL (and also the full U-Boot stage on the RK3368) will run in
  * secure mode (i.e. EL3) and an ATF will eventually be booted before
@@ -216,9 +216,11 @@ static void sgrf_init(void)
 	rk_clrreg(&cru->softrst_con[1], DMA1_SRST_REQ);
 	rk_clrreg(&cru->softrst_con[4], DMA2_SRST_REQ);
 }
+#endif
 
 void board_debug_uart_init(void)
 {
+#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000)
 	/*
 	 * N.B.: This is called before the device-model has been
 	 *       initialised. For this reason, we can not access
@@ -237,7 +239,6 @@ void board_debug_uart_init(void)
 		GPIO2D0_UART0_SIN       = (1 << 0),
 	};
 
-#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000)
 	/* Enable early UART0 on the RK3368 */
 	rk_clrsetreg(&grf->gpio2d_iomux,
 		     GPIO2D0_MASK, GPIO2D0_UART0_SIN);
@@ -263,9 +264,10 @@ int arch_cpu_init(void)
 	/* Cpu axi qos config */
 	cpu_axi_qos_prority_level_config();
 
+#ifdef CONFIG_SPL_BUILD
 	/* Reset security, so we can use DMA in the MMC drivers */
 	sgrf_init();
+#endif
 
 	return 0;
 }
-#endif

commit 465fe90ad97b37ce4818b3e021b83e0000619def
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Wed Jul 18 11:28:28 2018 +0800

    drivers: rknand: zftl: fix hynix F16 64Gb NAND multi plane prog error issue
    
    3326: fix hynix F16 64Gb NAND multi plane prog error issue
    bug:
    [   15.257968] hynix RR 12 row=2000, count 12, status=-1
    [   15.257985] flash_complete_page_read 0 2000 error_ecc -1 1
    [   15.258000] blk= 20, page=0, ppa = 2000, status = ffffffff
    
    Change-Id: Ic7306aea8a55a06d68c73162676e048ffa02111d
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/drivers/rknand/rk_zftl_arm_v8.S b/drivers/rknand/rk_zftl_arm_v8.S
index 6cf6fd60b1..ff7c3447d4 100644
--- a/drivers/rknand/rk_zftl_arm_v8.S
+++ b/drivers/rknand/rk_zftl_arm_v8.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2018-07-04
+ * date: 2018-07-18
  */
 	.arch armv8-a
 	.file	"rk_zftl_arm_v8.S"
@@ -1146,7 +1146,7 @@ flash_wait_device_ready_raw:
 	bhi	.L254
 	adrp	x1, .LANCHOR28
 	adrp	x0, .LC0
-	mov	w2, 599
+	mov	w2, 602
 	add	x1, x1, :lo12:.LANCHOR28
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -1562,7 +1562,7 @@ flash_start_page_read:
 	bhi	.L337
 	adrp	x1, .LANCHOR36
 	adrp	x0, .LC0
-	mov	w2, 741
+	mov	w2, 744
 	add	x1, x1, :lo12:.LANCHOR36
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -1637,7 +1637,7 @@ flash_erase_duplane_block:
 	bhi	.L346
 	adrp	x1, .LANCHOR37
 	adrp	x0, .LC0
-	mov	w2, 510
+	mov	w2, 513
 	add	x1, x1, :lo12:.LANCHOR37
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -1746,7 +1746,7 @@ flash_erase_block_en:
 	bhi	.L361
 	adrp	x1, .LANCHOR39
 	adrp	x0, .LC0
-	mov	w2, 555
+	mov	w2, 558
 	add	x1, x1, :lo12:.LANCHOR39
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -1895,7 +1895,7 @@ flash_start_plane_read:
 	bhi	.L381
 	adrp	x1, .LANCHOR40
 	adrp	x0, .LC0
-	mov	w2, 836
+	mov	w2, 839
 	add	x1, x1, :lo12:.LANCHOR40
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -2001,32 +2001,34 @@ flash_start_plane_read:
 flash_set_interface_mode:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR42
 	stp	x23, x24, [sp, 48]
+	add	x22, x22, :lo12:.LANCHOR42
 	adrp	x24, .LANCHOR41
-	stp	x21, x22, [sp, 32]
 	adrp	x23, .LANCHOR14
-	adrp	x22, .LANCHOR42
 	str	x25, [sp, 64]
 	add	x24, x24, :lo12:.LANCHOR41
-	add	x22, x22, :lo12:.LANCHOR42
 	add	x23, x23, :lo12:.LANCHOR14
 	mov	w25, w0
 	stp	x19, x20, [sp, 16]
-	mov	x20, 0
+	mov	x21, 0
 .L410:
-	lsl	x0, x20, 3
-	ldrb	w21, [x0, x24]
+	lsl	x0, x21, 3
+	ldrb	w19, [x0, x24]
 	mov	w0, 69
-	cmp	w21, 152
-	ccmp	w21, w0, 4, ne
+	cmp	w19, 152
+	ccmp	w19, w0, 4, ne
 	beq	.L401
-	cmp	w21, 44
+	cmp	w19, 44
+	mov	w0, 137
+	ccmp	w19, w0, 4, ne
 	bne	.L402
 .L401:
 	adrp	x0, .LANCHOR13
 	ldrb	w1, [x22]
 	cmp	w25, 1
-	ldr	x19, [x0, #:lo12:.LANCHOR13]
+	ldr	x20, [x0, #:lo12:.LANCHOR13]
 	bne	.L403
 	tbz	x1, 0, .L402
 	ldr	w0, [x23]
@@ -2035,23 +2037,25 @@ flash_set_interface_mode:
 	add	x0, x0, :lo12:.LC36
 	bl	printf
 .L404:
-	add	x0, x19, x20, lsl 8
+	add	x0, x20, x21, lsl 8
 	mov	w1, 239
-	cmp	w21, 44
+	cmp	w19, 44
 	str	w1, [x0, 2056]
+	mov	w1, 137
+	ccmp	w19, w1, 4, ne
 	mov	w1, 1
 	bne	.L405
 	str	w1, [x0, 2052]
 	mov	w1, 5
-.L425:
+.L428:
 	str	w1, [x0, 2048]
 .L409:
 	str	wzr, [x0, 2048]
 	str	wzr, [x0, 2048]
 	str	wzr, [x0, 2048]
 .L402:
-	add	x20, x20, 1
-	cmp	x20, 4
+	add	x21, x21, 1
+	cmp	x21, 4
 	bne	.L410
 	bl	nandc_wait_flash_ready
 	ldr	x25, [sp, 64]
@@ -2064,7 +2068,7 @@ flash_set_interface_mode:
 .L405:
 	mov	w2, 128
 	str	w2, [x0, 2052]
-	b	.L425
+	b	.L428
 .L403:
 	tbz	x1, 2, .L402
 	ldr	w0, [x23]
@@ -2073,15 +2077,17 @@ flash_set_interface_mode:
 	add	x0, x0, :lo12:.LC37
 	bl	printf
 .L407:
-	add	x0, x19, x20, lsl 8
+	add	x0, x20, x21, lsl 8
 	mov	w1, 239
-	cmp	w21, 44
+	cmp	w19, 44
 	str	w1, [x0, 2056]
+	mov	w1, 137
+	ccmp	w19, w1, 4, ne
 	bne	.L408
 	mov	w1, 1
 	str	w1, [x0, 2052]
 	mov	w1, 35
-	b	.L425
+	b	.L428
 .L408:
 	mov	w1, 128
 	str	w1, [x0, 2052]
@@ -2145,7 +2151,7 @@ flash_read_id:
 	sub	w0, w2, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bhi	.L427
+	bhi	.L430
 	ldrb	w7, [x8, 5]
 	add	w1, w10, 1
 	ldrb	w6, [x8, 4]
@@ -2156,7 +2162,7 @@ flash_read_id:
 	ldrb	w3, [x8, 1]
 	ldp	x29, x30, [sp], 16
 	b	printf
-.L427:
+.L430:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	flash_read_id, .-flash_read_id
@@ -2198,67 +2204,59 @@ flash_read_spare:
 	.global	sandisk_prog_test_bad_block
 	.type	sandisk_prog_test_bad_block, %function
 sandisk_prog_test_bad_block:
-	stp	x29, x30, [sp, -48]!
-	mov	w4, w1
+	stp	x29, x30, [sp, -32]!
+	mov	w5, w1
 	adrp	x1, .LANCHOR13
 	and	x2, x0, 255
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR34
-	ldr	x19, [x1, #:lo12:.LANCHOR13]
-	add	x1, x20, :lo12:.LANCHOR34
-	str	x21, [sp, 32]
+	ldr	x4, [x1, #:lo12:.LANCHOR13]
+	adrp	x1, .LANCHOR34+29
+	str	x19, [sp, 16]
 	mov	x0, x2
+	ldrb	w1, [x1, #:lo12:.LANCHOR34+29]
 	add	x2, x2, 8
-	ldrb	w1, [x1, 29]
-	add	x2, x19, x2, lsl 8
-	cbz	w1, .L433
-.L447:
+	add	x2, x4, x2, lsl 8
+	cbz	w1, .L436
+.L446:
 	ubfiz	x0, x0, 8, 8
 	str	w1, [x2, 8]
-	add	x19, x19, x0
+	add	x4, x4, x0
 	mov	w0, 128
-	str	w0, [x19, 2056]
-	and	w0, w4, 255
-	str	wzr, [x19, 2052]
-	str	wzr, [x19, 2052]
-	str	w0, [x19, 2052]
-	lsr	w0, w4, 8
-	str	w0, [x19, 2052]
-	lsr	w0, w4, 16
-	str	w0, [x19, 2052]
+	str	w0, [x4, 2056]
+	and	w0, w5, 255
+	str	wzr, [x4, 2052]
+	str	wzr, [x4, 2052]
+	str	w0, [x4, 2052]
+	lsr	w0, w5, 8
+	str	w0, [x4, 2052]
+	lsr	w0, w5, 16
+	str	w0, [x4, 2052]
 	mov	w0, 16
-	str	w0, [x19, 2056]
+	str	w0, [x4, 2056]
 	bl	nandc_wait_flash_ready
 	mov	w0, 112
-	str	w0, [x19, 2056]
+	str	w0, [x4, 2056]
 	mov	w0, 80
 	bl	timer_delay_ns
-	ldr	w2, [x19, 2048]
+	ldr	w2, [x4, 2048]
 	mov	w0, 5
-	ands	w21, w2, w0
+	ands	w19, w2, w0
 	beq	.L435
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	tbz	x0, 12, .L435
 	adrp	x0, .LC39
-	mov	w1, w4
+	mov	w1, w5
 	add	x0, x0, :lo12:.LC39
 	bl	printf
 .L435:
-	add	x20, x20, :lo12:.LANCHOR34
-	ldrb	w0, [x20, 30]
-	cbz	w0, .L432
-	str	w0, [x19, 2056]
-.L432:
-	mov	w0, w21
-	ldr	x21, [sp, 32]
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
+	mov	w0, w19
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
 	ret
-.L433:
+.L436:
 	mov	w1, 162
-	b	.L447
+	b	.L446
 	.size	sandisk_prog_test_bad_block, .-sandisk_prog_test_bad_block
 	.section	.text.nandc_rdy_status,"ax",@progbits
 	.align	2
@@ -2288,48 +2286,48 @@ nandc_bch_sel:
 	cmp	w2, 9
 	adrp	x2, .LANCHOR13
 	ldr	x2, [x2, #:lo12:.LANCHOR13]
-	bne	.L451
+	bne	.L450
 	str	w1, [x2, 16]
 	cmp	w0, 70
-	beq	.L458
+	beq	.L457
 	cmp	w0, 60
-	beq	.L459
+	beq	.L458
 	cmp	w0, 40
 	cset	w1, eq
 	add	w1, w1, 1
-.L452:
+.L451:
 	lsl	w1, w1, 25
 	orr	w1, w1, 1
 	str	w1, [x2, 32]
 	ret
-.L458:
+.L457:
 	mov	w1, 0
-	b	.L452
-.L459:
+	b	.L451
+.L458:
 	mov	w1, 3
-	b	.L452
-.L451:
+	b	.L451
+.L450:
 	str	w1, [x2, 8]
 	cmp	w0, 16
 	mov	w1, 4096
-	bne	.L454
-.L457:
+	bne	.L453
+.L456:
 	and	w1, w1, -17
-.L455:
+.L454:
 	orr	w1, w1, 1
 	str	w1, [x2, 12]
 	ret
-.L454:
+.L453:
 	cmp	w0, 24
-	bne	.L456
+	bne	.L455
 	orr	w1, w1, 16
-	b	.L455
-.L456:
+	b	.L454
+.L455:
 	orr	w1, w1, 262144
 	cmp	w0, 40
 	orr	w1, w1, 16
-	bne	.L455
-	b	.L457
+	bne	.L454
+	b	.L456
 	.size	nandc_bch_sel, .-nandc_bch_sel
 	.section	.text.zftl_nandc_get_irq_status,"ax",@progbits
 	.align	2
@@ -2339,10 +2337,10 @@ zftl_nandc_get_irq_status:
 	adrp	x1, .LANCHOR27
 	ldrb	w1, [x1, #:lo12:.LANCHOR27]
 	cmp	w1, 9
-	bne	.L465
+	bne	.L464
 	ldr	w0, [x0, 296]
 	ret
-.L465:
+.L464:
 	ldr	w0, [x0, 372]
 	ret
 	.size	zftl_nandc_get_irq_status, .-zftl_nandc_get_irq_status
@@ -2385,7 +2383,7 @@ nandc_xfer_start:
 	ldrb	w0, [x0, #:lo12:.LANCHOR27]
 	adrp	x24, .LANCHOR13
 	cmp	w0, 9
-	bne	.L471
+	bne	.L470
 	ubfiz	w19, w23, 1, 1
 	mov	w0, 1
 	orr	w19, w19, 8
@@ -2398,13 +2396,13 @@ nandc_xfer_start:
 	and	w19, w19, -17
 	bfi	w19, w20, 22, 6
 	orr	w19, w19, 128
-	cbz	w0, .L472
+	cbz	w0, .L471
 	adrp	x0, .LANCHOR45
 	ldrb	w1, [x0, #:lo12:.LANCHOR45]
 	orr	w0, w19, 512
 	cmp	w1, 0
 	csel	w19, w0, w19, ne
-.L472:
+.L471:
 	add	x21, x4, :lo12:.LANCHOR46
 	add	x0, x2, 63
 	and	w20, w20, 63
@@ -2447,13 +2445,13 @@ nandc_xfer_start:
 	str	w19, [x1, 16]
 	orr	w19, w19, 4
 	str	w19, [x1, 16]
-.L470:
+.L469:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L471:
+.L470:
 	ldr	x0, [x24, #:lo12:.LANCHOR13]
 	ubfiz	w19, w23, 1, 1
 	orr	w19, w19, 8
@@ -2469,7 +2467,7 @@ nandc_xfer_start:
 	orr	w19, w19, 1024
 	and	w19, w19, -17
 	bfi	w19, w20, 22, 6
-	cbz	w23, .L474
+	cbz	w23, .L473
 	adrp	x0, .LANCHOR43
 	ubfx	x1, x1, 1, 7
 	ldr	x8, [x4, #:lo12:.LANCHOR46]
@@ -2480,11 +2478,11 @@ nandc_xfer_start:
 	mov	w0, 64
 	csel	w5, w5, w0, hi
 	mov	w0, 0
-.L476:
+.L475:
 	add	w7, w5, w0
 	cmp	x3, x1
-	bne	.L477
-.L478:
+	bne	.L476
+.L477:
 	add	x21, x4, :lo12:.LANCHOR46
 	ldr	x0, [x4, #:lo12:.LANCHOR46]
 	and	w20, w20, 63
@@ -2520,8 +2518,8 @@ nandc_xfer_start:
 	str	w19, [x1, 8]
 	orr	w19, w19, 4
 	str	w19, [x1, 8]
-	b	.L470
-.L477:
+	b	.L469
+.L476:
 	ldrh	w10, [x3]
 	and	x0, x0, 4294967292
 	ldrh	w6, [x3, 2]
@@ -2529,11 +2527,11 @@ nandc_xfer_start:
 	orr	x6, x10, x6, lsl 16
 	str	w6, [x8, x0]
 	mov	w0, w7
-	b	.L476
-.L474:
+	b	.L475
+.L473:
 	ldr	x1, [x4, #:lo12:.LANCHOR46]
 	str	w0, [x1]
-	b	.L478
+	b	.L477
 	.size	nandc_xfer_start, .-nandc_xfer_start
 	.section	.text.nandc_set_seed,"ax",@progbits
 	.align	2
@@ -2554,10 +2552,10 @@ nandc_set_seed:
 	cmp	w1, 9
 	adrp	x1, .LANCHOR13
 	ldr	x1, [x1, #:lo12:.LANCHOR13]
-	bne	.L488
+	bne	.L487
 	str	w0, [x1, 520]
 	ret
-.L488:
+.L487:
 	str	w0, [x1, 336]
 	ret
 	.size	nandc_set_seed, .-nandc_set_seed
@@ -2574,25 +2572,25 @@ zftl_flash_de_init:
 	mov	w0, 0
 	bl	hynix_reconfig_rr_para
 	ldrb	w0, [x19, #:lo12:.LANCHOR20]
-	cbz	w0, .L493
+	cbz	w0, .L492
 	adrp	x0, .LANCHOR42
 	ldrb	w0, [x0, #:lo12:.LANCHOR42]
-	tbz	x0, 0, .L493
+	tbz	x0, 0, .L492
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
 	bl	nandc_set_if_mode
 	strb	wzr, [x19, #:lo12:.LANCHOR20]
-.L493:
+.L492:
 	adrp	x3, .LANCHOR45
 	ldrb	w0, [x3, #:lo12:.LANCHOR45]
-	cbz	w0, .L494
+	cbz	w0, .L493
 	mov	w0, 0
 	strb	wzr, [x3, #:lo12:.LANCHOR45]
 	bl	nandc_set_seed
 	mov	w0, 1
 	strb	w0, [x3, #:lo12:.LANCHOR45]
-.L494:
+.L493:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -2627,7 +2625,7 @@ buf_reinit:
 	adrp	x0, .LANCHOR49
 	add	x1, x0, :lo12:.LANCHOR49
 	mov	w2, 0
-.L508:
+.L507:
 	and	w3, w2, 255
 	strb	wzr, [x1, 2]
 	add	w4, w3, 1
@@ -2637,7 +2635,7 @@ buf_reinit:
 	str	xzr, [x1, 16]
 	cmp	w2, 32
 	add	x1, x1, 64
-	bne	.L508
+	bne	.L507
 	add	x0, x0, :lo12:.LANCHOR49
 	mov	w1, -1
 	strb	w1, [x0, 1984]
@@ -2662,49 +2660,49 @@ buf_add_tail:
 	mov	x20, x1
 	ldrb	w1, [x19]
 	cmp	w1, 255
-	bne	.L516
+	bne	.L515
 	ldrb	w0, [x20, 1]
 	cmp	w0, 255
-	bne	.L512
+	bne	.L511
 	adrp	x1, .LANCHOR52
 	adrp	x0, .LC0
 	mov	w2, 74
 	add	x1, x1, :lo12:.LANCHOR52
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L512:
+.L511:
 	ldrb	w0, [x20, 1]
 	strb	w0, [x19]
-.L510:
+.L509:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L516:
+.L515:
 	adrp	x0, .LANCHOR49
 	add	x2, x0, :lo12:.LANCHOR49
 	mov	x19, x0
-.L517:
+.L516:
 	sbfiz	x0, x1, 6, 32
 	mov	w21, w1
 	ldrb	w1, [x2, x0]
 	cmp	w1, 255
-	bne	.L517
+	bne	.L516
 	ldrb	w0, [x20, 1]
 	cmp	w0, 255
-	bne	.L514
+	bne	.L513
 	adrp	x1, .LANCHOR52
 	adrp	x0, .LC0
 	mov	w2, 81
 	add	x1, x1, :lo12:.LANCHOR52
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L514:
+.L513:
 	add	x0, x19, :lo12:.LANCHOR49
 	sbfiz	x21, x21, 6, 32
 	ldrb	w1, [x20, 1]
 	strb	w1, [x0, x21]
-	b	.L510
+	b	.L509
 	.size	buf_add_tail, .-buf_add_tail
 	.section	.text.queue_read_cmd,"ax",@progbits
 	.align	2
@@ -2738,10 +2736,10 @@ buf_free:
 	adrp	x2, .LANCHOR50
 	and	w1, w1, 8
 	strb	w1, [x0, 2]
-	cbz	w1, .L522
+	cbz	w1, .L521
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L522
+	beq	.L521
 	stp	x29, x30, [sp, -16]!
 	mov	x1, x0
 	add	x0, x2, :lo12:.LANCHOR50
@@ -2753,7 +2751,7 @@ buf_free:
 	add	w0, w0, 1
 	strb	w0, [x1, #:lo12:.LANCHOR51]
 	ret
-.L522:
+.L521:
 	ldrb	w1, [x2, #:lo12:.LANCHOR50]
 	strb	w1, [x0]
 	adrp	x1, .LANCHOR51
@@ -2775,8 +2773,8 @@ buf_alloc:
 	adrp	x19, .LANCHOR51
 	and	w20, w0, 255
 	ldrb	w0, [x19, #:lo12:.LANCHOR51]
-	cbz	w0, .L535
-.L538:
+	cbz	w0, .L534
+.L537:
 	adrp	x2, .LANCHOR50
 	adrp	x1, .LANCHOR49
 	add	x0, x1, :lo12:.LANCHOR49
@@ -2784,8 +2782,8 @@ buf_alloc:
 	ubfiz	x4, x3, 6, 8
 	add	x0, x0, x4
 	mov	x4, x2
-	cbz	w20, .L536
-.L537:
+	cbz	w20, .L535
+.L536:
 	add	x1, x1, :lo12:.LANCHOR49
 	sbfiz	x3, x3, 6, 32
 	add	x2, x1, x3
@@ -2804,8 +2802,8 @@ buf_alloc:
 	mov	w1, -1
 	str	xzr, [x2, 16]
 	str	w1, [x2, 36]
-	b	.L534
-.L535:
+	b	.L533
+.L534:
 	mov	w2, 121
 	adrp	x1, .LANCHOR54
 	adrp	x0, .LC0
@@ -2813,18 +2811,18 @@ buf_alloc:
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	ldrb	w0, [x19, #:lo12:.LANCHOR51]
-	cbnz	w0, .L538
-.L540:
+	cbnz	w0, .L537
+.L539:
 	mov	x0, 0
-.L534:
+.L533:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L536:
+.L535:
 	ldrb	w2, [x19, #:lo12:.LANCHOR51]
 	cmp	w2, 1
-	bne	.L537
-	b	.L540
+	bne	.L536
+	b	.L539
 	.size	buf_alloc, .-buf_alloc
 	.section	.text.buf_remove_buf,"ax",@progbits
 	.align	2
@@ -2834,30 +2832,30 @@ buf_remove_buf:
 	ldrb	w4, [x1, 1]
 	ldrb	w2, [x0]
 	cmp	w4, w2
-	bne	.L548
+	bne	.L547
 	ldrb	w1, [x1]
 	strb	w1, [x0]
-.L552:
+.L551:
 	mov	w0, 1
 	ret
-.L549:
+.L548:
 	mov	w3, w2
 	sbfiz	x2, x2, 6, 32
 	ldrb	w2, [x0, x2]
 	cmp	w4, w2
-	bne	.L550
+	bne	.L549
 	sbfiz	x3, x3, 6, 32
 	ldrb	w2, [x1]
 	strb	w2, [x0, x3]
 	mov	w0, -1
 	strb	w0, [x1]
-	b	.L552
-.L548:
+	b	.L551
+.L547:
 	adrp	x0, .LANCHOR49
 	add	x0, x0, :lo12:.LANCHOR49
-.L550:
+.L549:
 	cmp	w2, 255
-	bne	.L549
+	bne	.L548
 	mov	w0, 0
 	ret
 	.size	buf_remove_buf, .-buf_remove_buf
@@ -2872,29 +2870,29 @@ buf_remove_free:
 	adrp	x19, .LANCHOR51
 	mov	x20, x0
 	ldrb	w0, [x19, #:lo12:.LANCHOR51]
-	cbnz	w0, .L554
+	cbnz	w0, .L553
 	adrp	x1, .LANCHOR55
 	adrp	x0, .LC0
 	mov	w2, 172
 	add	x1, x1, :lo12:.LANCHOR55
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L554:
+.L553:
 	ldrb	w0, [x19, #:lo12:.LANCHOR51]
-	cbz	w0, .L553
+	cbz	w0, .L552
 	mov	x1, x20
 	adrp	x0, .LANCHOR50
 	add	x0, x0, :lo12:.LANCHOR50
 	bl	buf_remove_buf
 	cmp	w0, 1
-	bne	.L553
+	bne	.L552
 	ldrb	w0, [x19, #:lo12:.LANCHOR51]
 	sub	w0, w0, #1
 	strb	w0, [x19, #:lo12:.LANCHOR51]
 	ldrb	w0, [x20, 2]
 	orr	w0, w0, 1
 	strb	w0, [x20, 2]
-.L553:
+.L552:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -3002,11 +3000,11 @@ zftl_cache_flush:
 	.global	zftl_get_density
 	.type	zftl_get_density, %function
 zftl_get_density:
-	cbnz	w0, .L566
+	cbnz	w0, .L565
 	adrp	x0, .LANCHOR58
 	ldr	w0, [x0, #:lo12:.LANCHOR58]
 	ret
-.L566:
+.L565:
 	cmp	w0, 4
 	cset	w0, cc
 	lsl	w0, w0, 13
@@ -3070,14 +3068,14 @@ gc_add_sblk:
 	stp	x21, x22, [sp, 32]
 	str	x27, [sp, 80]
 	cmp	w0, w20
-	bhi	.L575
+	bhi	.L574
 	adrp	x1, .LANCHOR60
 	adrp	x0, .LC0
-	mov	w2, 258
+	mov	w2, 259
 	add	x1, x1, :lo12:.LANCHOR60
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L575:
+.L574:
 	adrp	x22, .LANCHOR9
 	uxtw	x19, w20
 	lsl	x26, x19, 1
@@ -3086,7 +3084,7 @@ gc_add_sblk:
 	adrp	x27, .LANCHOR7
 	ldrh	w21, [x0, x26]
 	ldr	w0, [x23, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L576
+	tbz	x0, 8, .L575
 	ldr	x0, [x27, #:lo12:.LANCHOR7]
 	mov	w4, w21
 	mov	w2, w24
@@ -3101,59 +3099,59 @@ gc_add_sblk:
 	adrp	x0, .LC41
 	add	x0, x0, :lo12:.LC41
 	bl	printf
-.L576:
+.L575:
 	ldr	x0, [x27, #:lo12:.LANCHOR7]
 	add	x19, x0, x19, lsl 2
 	ldrb	w2, [x19, 2]
 	tst	w2, 224
-	bne	.L577
-	cbz	w21, .L597
+	bne	.L576
+	cbz	w21, .L596
 	adrp	x1, .LANCHOR60
 	adrp	x0, .LC0
-	mov	w2, 263
+	mov	w2, 264
 	add	x1, x1, :lo12:.LANCHOR60
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L597:
+.L596:
 	mov	w0, 0
-	b	.L574
-.L577:
+	b	.L573
+.L576:
 	adrp	x0, .LANCHOR62
 	add	x1, x0, :lo12:.LANCHOR62
 	ldrh	w0, [x0, #:lo12:.LANCHOR62]
 	cmp	w0, w20
-	beq	.L597
+	beq	.L596
 	adrp	x21, .LANCHOR10
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	ldrh	w3, [x0, 48]
 	cmp	w3, w20
-	beq	.L597
+	beq	.L596
 	ldrh	w3, [x0, 16]
 	cmp	w3, w20
-	beq	.L597
+	beq	.L596
 	ldrh	w3, [x0, 80]
 	cmp	w3, w20
-	beq	.L597
+	beq	.L596
 	ldrh	w4, [x1, 56]
 	add	x1, x1, 58
 	mov	w3, 0
-.L579:
+.L578:
 	cmp	w3, w4
-	bcc	.L580
-	cbnz	w24, .L584
+	bcc	.L579
+	cbnz	w24, .L583
 	adrp	x1, .LANCHOR63
 	ldrh	w5, [x1, #:lo12:.LANCHOR63]
 	cmp	w20, w5
-	beq	.L597
+	beq	.L596
 	adrp	x3, .LANCHOR64
 	add	x3, x3, :lo12:.LANCHOR64
 	mov	x1, 0
-.L583:
+.L582:
 	ldrh	w6, [x1, x3]
 	cmp	w20, w6
-	bne	.L582
+	bne	.L581
 	ldr	w0, [x23, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L597
+	tbz	x0, 8, .L596
 	ldr	x0, [x22, #:lo12:.LANCHOR9]
 	mov	w4, w20
 	ubfx	x2, x2, 5, 3
@@ -3162,23 +3160,23 @@ gc_add_sblk:
 	adrp	x0, .LC42
 	add	x0, x0, :lo12:.LC42
 	bl	printf
-	b	.L597
-.L580:
+	b	.L596
+.L579:
 	ldrh	w5, [x1], 2
 	cmp	w5, w20
-	beq	.L597
+	beq	.L596
 	add	w3, w3, 1
-	b	.L579
-.L582:
+	b	.L578
+.L581:
 	add	x1, x1, 2
 	cmp	x1, 16
-	bne	.L583
+	bne	.L582
 	ubfiz	x19, x25, 7, 16
 	add	x19, x19, 136
 	add	x19, x0, x19
-.L585:
+.L584:
 	ldr	w0, [x23, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L586
+	tbz	x0, 8, .L585
 	ldr	x0, [x22, #:lo12:.LANCHOR9]
 	adrp	x1, .LANCHOR61
 	mov	w5, w4
@@ -3190,23 +3188,23 @@ gc_add_sblk:
 	adrp	x0, .LC41
 	add	x0, x0, :lo12:.LC41
 	bl	printf
-.L586:
+.L585:
 	mov	x0, x19
 	add	x1, x19, 128
 	mov	w2, 65535
-.L589:
+.L588:
 	ldrh	w3, [x0]
 	cmp	w3, w2
-	bne	.L587
+	bne	.L586
 	strh	w20, [x0]
-	cbz	w24, .L588
+	cbz	w24, .L587
 	ldr	x1, [x21, #:lo12:.LANCHOR10]
 	ldrh	w0, [x1, 124]
 	add	w0, w0, 1
 	strh	w0, [x1, 124]
-.L607:
+.L606:
 	mov	w0, 1
-.L574:
+.L573:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -3214,21 +3212,21 @@ gc_add_sblk:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L584:
+.L583:
 	add	x19, x0, 392
-	b	.L585
-.L588:
+	b	.L584
+.L587:
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	add	x25, x0, x25, uxth 1
 	ldrh	w0, [x25, 120]
 	add	w0, w0, 1
 	strh	w0, [x25, 120]
-	b	.L607
-.L587:
+	b	.L606
+.L586:
 	add	x0, x0, 2
 	cmp	x1, x0
-	bne	.L589
-	b	.L607
+	bne	.L588
+	b	.L606
 	.size	gc_add_sblk, .-gc_add_sblk
 	.section	.text.gc_get_src_ppa_from_index,"ax",@progbits
 	.align	2
@@ -3257,10 +3255,10 @@ gc_write_completed:
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-.L610:
+.L609:
 	ldrb	w19, [x23]
 	cmp	w19, 255
-	bne	.L621
+	bne	.L620
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -3268,7 +3266,7 @@ gc_write_completed:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L621:
+.L620:
 	lsl	x1, x19, 6
 	add	x0, x24, :lo12:.LANCHOR49
 	add	x2, x0, x1
@@ -3276,7 +3274,7 @@ gc_write_completed:
 	ldr	w1, [x2, 52]
 	strb	w0, [x23]
 	ldrh	w25, [x2, 48]
-	cbz	w1, .L611
+	cbz	w1, .L610
 	ldr	w2, [x2, 40]
 	adrp	x0, .LANCHOR62
 	add	x0, x0, :lo12:.LANCHOR62
@@ -3288,26 +3286,26 @@ gc_write_completed:
 	bl	printf
 	adrp	x1, .LANCHOR67
 	adrp	x0, .LC0
-	mov	w2, 544
+	mov	w2, 545
 	add	x1, x1, :lo12:.LANCHOR67
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L611:
+.L610:
 	adrp	x26, .LANCHOR68
 	ldrb	w0, [x26, #:lo12:.LANCHOR68]
 	cmp	w0, 3
-	bne	.L622
+	bne	.L621
 	adrp	x0, .LANCHOR10
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldrb	w20, [x0, 89]
 	add	w20, w20, w20, lsl 1
 	and	w20, w20, 1023
-.L612:
+.L611:
 	adrp	x0, .LANCHOR14
 	adrp	x28, .LANCHOR69
 	and	x21, x25, 65535
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L613
+	tbz	x0, 8, .L612
 	ldr	x1, [x28, #:lo12:.LANCHOR69]
 	add	x0, x22, x19, lsl 6
 	mov	w3, w25
@@ -3317,54 +3315,54 @@ gc_write_completed:
 	add	x0, x0, :lo12:.LC44
 	mov	w1, w25
 	bl	printf
-.L613:
+.L612:
 	ldr	x1, [x28, #:lo12:.LANCHOR69]
 	add	x0, x22, x19, lsl 6
 	mov	x27, x21
 	ldrb	w0, [x0, 1]
 	ldrb	w1, [x1, x21]
 	cmp	w1, w0
-	beq	.L614
+	beq	.L613
 	adrp	x1, .LANCHOR67
 	adrp	x0, .LC0
-	mov	w2, 551
+	mov	w2, 552
 	add	x1, x1, :lo12:.LANCHOR67
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L614:
+.L613:
 	add	x19, x22, x19, lsl 6
 	ldrb	w0, [x19, 61]
 	cmp	w0, 3
-	beq	.L615
+	beq	.L614
 	ldrb	w0, [x26, #:lo12:.LANCHOR68]
 	cmp	w0, 3
-	bne	.L615
+	bne	.L614
 	adrp	x0, .LANCHOR70
 	ldrb	w0, [x0, #:lo12:.LANCHOR70]
-	cbnz	w0, .L615
+	cbnz	w0, .L614
 	ldr	x1, [x28, #:lo12:.LANCHOR69]
 	mov	x0, 0
 	add	x21, x1, x21
-.L616:
+.L615:
 	cmp	w20, w0, uxth
-	bls	.L610
+	bls	.L609
 	ldrb	w1, [x21, x0]
 	add	x0, x0, 1
 	add	x1, x22, x1, lsl 6
 	strb	wzr, [x1, 61]
-	b	.L616
-.L622:
+	b	.L615
+.L621:
 	mov	w20, 1
-	b	.L612
-.L615:
+	b	.L611
+.L614:
 	adrp	x19, .LANCHOR62
 	add	x19, x19, :lo12:.LANCHOR62
 	add	x20, x21, x20, uxth
 	mov	w21, -1
 	strh	w25, [x19, 316]
-.L617:
+.L616:
 	cmp	x20, x27
-	beq	.L610
+	beq	.L609
 	ldr	x1, [x28, #:lo12:.LANCHOR69]
 	ldrb	w0, [x1, x27]
 	strb	w21, [x1, x27]
@@ -3378,7 +3376,7 @@ gc_write_completed:
 	ldrb	w0, [x19, 7]
 	sub	w0, w0, #1
 	strb	w0, [x19, 7]
-	b	.L617
+	b	.L616
 	.size	gc_write_completed, .-gc_write_completed
 	.section	.text.gc_get_src_blk,"ax",@progbits
 	.align	2
@@ -3390,44 +3388,44 @@ gc_get_src_blk:
 	adrp	x0, .LANCHOR71
 	ldrb	w3, [x0, #:lo12:.LANCHOR71]
 	ldrh	w0, [x2, 124]
-	cbz	w0, .L634
+	cbz	w0, .L633
 	add	x1, x2, 392
 	mov	w4, 1
-.L635:
+.L634:
 	add	x5, x1, 128
 	mov	w6, 65535
-.L639:
+.L638:
 	ldrh	w0, [x1]
 	cmp	w0, w6
-	beq	.L637
+	beq	.L636
 	mov	w5, -1
 	strh	w5, [x1]
-	cbz	w4, .L638
+	cbz	w4, .L637
 	ldrh	w1, [x2, 124]
 	sub	w1, w1, #1
 	strh	w1, [x2, 124]
 	ret
-.L634:
+.L633:
 	add	x0, x2, x3, sxtw 1
 	ldrh	w0, [x0, 120]
-	cbz	w0, .L640
+	cbz	w0, .L639
 	ubfiz	x1, x3, 7, 8
 	mov	w4, 0
 	add	x1, x1, 136
 	add	x1, x2, x1
-	b	.L635
-.L638:
+	b	.L634
+.L637:
 	add	x2, x2, x3, uxtb 1
 	ldrh	w1, [x2, 120]
 	sub	w1, w1, #1
 	strh	w1, [x2, 120]
 	ret
-.L637:
+.L636:
 	add	x1, x1, 2
 	cmp	x1, x5
-	bne	.L639
+	bne	.L638
 	ret
-.L640:
+.L639:
 	mov	w0, 65535
 	ret
 	.size	gc_get_src_blk, .-gc_get_src_blk
@@ -3443,11 +3441,11 @@ gc_free_temp_buf:
 	add	x0, x20, :lo12:.LANCHOR62
 	stp	x21, x22, [sp, 32]
 	ldrb	w1, [x0, 7]
-	cbz	w1, .L649
+	cbz	w1, .L648
 	adrp	x1, .LANCHOR51
 	ldrb	w1, [x1, #:lo12:.LANCHOR51]
 	cmp	w1, 1
-	bhi	.L649
+	bhi	.L648
 	ldrh	w19, [x0, 316]
 	adrp	x2, .LANCHOR73
 	adrp	x0, .LANCHOR72
@@ -3461,34 +3459,34 @@ gc_free_temp_buf:
 	csel	w1, w0, w1, ls
 	adrp	x0, .LANCHOR49
 	add	x0, x0, :lo12:.LANCHOR49
-.L644:
+.L643:
 	cmp	w19, w1
-	bcc	.L647
-.L649:
+	bcc	.L646
+.L648:
 	mov	w0, 0
-	b	.L642
-.L647:
+	b	.L641
+.L646:
 	uxtw	x22, w19
 	ldrb	w2, [x4, x22]
 	cmp	w2, 255
-	beq	.L645
+	beq	.L644
 	sbfiz	x3, x2, 6, 32
 	add	x3, x0, x3
 	ldrb	w3, [x3, 61]
-	cbnz	w3, .L645
+	cbnz	w3, .L644
 	ubfiz	x2, x2, 6, 8
 	add	x0, x0, x2
 	bl	buf_free
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L646
+	tbz	x0, 8, .L645
 	ldr	x0, [x21, #:lo12:.LANCHOR69]
 	mov	w1, w19
 	ldrb	w2, [x0, x22]
 	adrp	x0, .LC45
 	add	x0, x0, :lo12:.LC45
 	bl	printf
-.L646:
+.L645:
 	ldr	x0, [x21, #:lo12:.LANCHOR69]
 	add	x20, x20, :lo12:.LANCHOR62
 	mov	w1, -1
@@ -3497,14 +3495,14 @@ gc_free_temp_buf:
 	sub	w0, w0, #1
 	strb	w0, [x20, 7]
 	mov	w0, 1
-.L642:
+.L641:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L645:
+.L644:
 	add	w19, w19, 1
-	b	.L644
+	b	.L643
 	.size	gc_free_temp_buf, .-gc_free_temp_buf
 	.section	.text.print_gc_debug_info,"ax",@progbits
 	.align	2
@@ -3533,21 +3531,21 @@ zftl_get_gc_node:
 	and	w1, w1, 65535
 	and	w0, w0, 65535
 	cmp	w1, 5
-	bne	.L659
+	bne	.L658
 	mov	w1, w0
 	adrp	x0, .LANCHOR75
 	ldr	x0, [x0, #:lo12:.LANCHOR75]
-.L661:
+.L660:
 	b	_list_get_gc_head_node.isra.2
-.L659:
+.L658:
 	cmp	w1, 2
-	bne	.L660
+	bne	.L659
 	b	zftl_get_gc_node.part.9
-.L660:
+.L659:
 	mov	w1, w0
 	adrp	x0, .LANCHOR76
 	ldr	x0, [x0, #:lo12:.LANCHOR76]
-	b	.L661
+	b	.L660
 	.size	zftl_get_gc_node, .-zftl_get_gc_node
 	.section	.text.gc_search_src_blk,"ax",@progbits
 	.align	2
@@ -3568,9 +3566,9 @@ gc_search_src_blk:
 	stp	x27, x28, [sp, 80]
 	add	x0, x0, x21, sxtw 1
 	ldrh	w19, [x0, 120]
-	cbz	w19, .L663
+	cbz	w19, .L662
 	mov	w0, w19
-.L662:
+.L661:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -3578,9 +3576,9 @@ gc_search_src_blk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L663:
+.L662:
 	and	w20, w2, 255
-	cbnz	w21, .L665
+	cbnz	w21, .L664
 	adrp	x24, .LANCHOR77
 	adrp	x26, .LANCHOR14
 	adrp	x27, .LC47
@@ -3590,9 +3588,9 @@ gc_search_src_blk:
 	strh	wzr, [x24, #:lo12:.LANCHOR77]
 	mov	w23, 0
 	mov	w25, 0
-.L666:
+.L665:
 	cmp	w25, w22
-	bcs	.L671
+	bcs	.L670
 	ldrh	w6, [x24, #:lo12:.LANCHOR77]
 	add	x7, x24, :lo12:.LANCHOR77
 	mov	w1, 3
@@ -3605,45 +3603,45 @@ gc_search_src_blk:
 	mov	w0, 65535
 	mov	w28, w1
 	cmp	w1, w0
-	beq	.L667
+	beq	.L666
 	ldr	w0, [x26]
 	adrp	x6, .LANCHOR9
 	uxtw	x4, w1
-	tbz	x0, 8, .L668
+	tbz	x0, 8, .L667
 	ldr	x0, [x6, #:lo12:.LANCHOR9]
 	stp	x6, x4, [x29, 96]
 	ldrh	w3, [x0, x4, lsl 1]
 	mov	x0, x27
 	bl	printf
 	ldp	x6, x4, [x29, 96]
-.L668:
+.L667:
 	ldr	x0, [x6, #:lo12:.LANCHOR9]
 	ldrh	w1, [x0, x4, lsl 1]
 	adrp	x0, .LANCHOR61
 	ldrh	w0, [x0, #:lo12:.LANCHOR61]
 	cmp	w1, w0
-	bcs	.L669
+	bcs	.L668
 	mov	w2, 0
 	mov	w1, 0
 	mov	w0, w28
 	bl	gc_add_sblk
-	cbz	w0, .L670
+	cbz	w0, .L669
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w22, w23
-	bcs	.L670
-.L671:
+	bcs	.L669
+.L670:
 	ldr	x0, [x29, 112]
-	tbz	x0, 1, .L673
+	tbz	x0, 1, .L672
 	adrp	x25, .LANCHOR79
 	adrp	x24, .LANCHOR78
 	add	x27, x25, :lo12:.LANCHOR79
 	add	x24, x24, :lo12:.LANCHOR78
 	mov	w28, 0
 	mov	w26, 65535
-.L674:
+.L673:
 	cmp	w28, w22
-	beq	.L678
+	beq	.L677
 	ldrh	w6, [x24]
 	mov	w1, 5
 	mov	w0, w6
@@ -3652,26 +3650,26 @@ gc_search_src_blk:
 	strh	w6, [x24]
 	and	w1, w0, 65535
 	cmp	w1, w26
-	beq	.L675
+	beq	.L674
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x1]
 	ldrh	w1, [x27]
 	cmp	w2, w1
-	bcs	.L675
+	bcs	.L674
 	mov	w2, 0
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L677
+	cbz	w0, .L676
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w22, w23
-	bcs	.L677
-.L678:
+	bcs	.L676
+.L677:
 	cmp	w23, w22
 	adrp	x0, .LANCHOR80
-	bcs	.L680
+	bcs	.L679
 	ldrh	w1, [x0, #:lo12:.LANCHOR80]
 	adrp	x3, .LANCHOR73
 	adrp	x0, .LANCHOR72
@@ -3681,85 +3679,85 @@ gc_search_src_blk:
 	mul	w0, w0, w3
 	sub	w0, w0, w1, lsr 2
 	cmp	w2, w0
-	bge	.L673
+	bge	.L672
 	add	w1, w2, w1, lsr 3
 	strh	w1, [x25, #:lo12:.LANCHOR79]
-.L673:
+.L672:
 	ldr	x0, [x29, 112]
-	tbz	x0, 0, .L681
+	tbz	x0, 0, .L680
 	cmp	w23, w22
-	bcs	.L681
+	bcs	.L680
 	adrp	x24, .LANCHOR81
 	add	x24, x24, :lo12:.LANCHOR81
 	mov	w25, 65535
-.L686:
+.L685:
 	ldrh	w6, [x24]
 	mov	w0, w6
 	bl	zftl_get_gc_node.part.9
 	add	w6, w6, 1
 	strh	w6, [x24]
 	cmp	w25, w0, uxth
-	beq	.L682
+	beq	.L681
 	mov	w2, 0
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L683
+	cbz	w0, .L682
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w22, w23
-	bhi	.L683
-.L684:
+	bhi	.L682
+.L683:
 	adrp	x0, .LANCHOR80
 	adrp	x1, .LANCHOR61
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	ldrh	w2, [x1, #:lo12:.LANCHOR61]
 	cmp	w2, w0, lsr 1
-	bls	.L681
+	bls	.L680
 	sub	w0, w2, w0, lsr 3
-	b	.L761
-.L669:
+	b	.L760
+.L668:
 	strh	wzr, [x24, #:lo12:.LANCHOR77]
-	b	.L671
-.L667:
+	b	.L670
+.L666:
 	strh	wzr, [x7]
-	b	.L671
-.L670:
+	b	.L670
+.L669:
 	add	w25, w25, 1
 	and	w25, w25, 65535
-	b	.L666
-.L675:
+	b	.L665
+.L674:
 	strh	wzr, [x24]
-	b	.L678
-.L677:
+	b	.L677
+.L676:
 	add	w28, w28, 1
 	and	w28, w28, 65535
-	b	.L674
-.L680:
+	b	.L673
+.L679:
 	ldrh	w1, [x25, #:lo12:.LANCHOR79]
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w1, w0
-	bls	.L673
+	bls	.L672
 	sub	w0, w1, w0, lsr 3
 	strh	w0, [x25, #:lo12:.LANCHOR79]
-	b	.L673
-.L682:
+	b	.L672
+.L681:
 	strh	wzr, [x24]
-.L685:
+.L684:
 	cmp	w23, w22
-	bcs	.L684
+	bcs	.L683
 	adrp	x1, .LANCHOR61
 	adrp	x0, .LANCHOR80
 	ldrh	w2, [x1, #:lo12:.LANCHOR61]
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w2, w0
-	bcs	.L681
+	bcs	.L680
 	add	w0, w2, w0, lsr 3
-.L761:
+.L760:
 	strh	w0, [x1, #:lo12:.LANCHOR61]
-.L681:
+.L680:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L708
+	tbz	x0, 8, .L707
 	ldr	w2, [x29, 112]
 	adrp	x0, .LC48
 	mov	w4, w20
@@ -3767,16 +3765,16 @@ gc_search_src_blk:
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC48
 	bl	printf
-.L708:
+.L707:
 	mov	w0, w23
-	b	.L662
-.L683:
+	b	.L661
+.L682:
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	cmp	w22, w19
-	bne	.L686
-	b	.L685
-.L665:
+	bne	.L685
+	b	.L684
+.L664:
 	adrp	x0, .LANCHOR62+318
 	strh	wzr, [x0, #:lo12:.LANCHOR62+318]
 	adrp	x0, .LANCHOR82
@@ -3785,7 +3783,7 @@ gc_search_src_blk:
 	and	w0, w0, 1
 	str	w0, [x29, 104]
 	ldr	x0, [x29, 112]
-	tbz	x0, 0, .L711
+	tbz	x0, 0, .L710
 	adrp	x1, .LANCHOR84
 	adrp	x25, .LANCHOR83
 	str	x1, [x29, 96]
@@ -3793,11 +3791,11 @@ gc_search_src_blk:
 	ldrh	w0, [x25, #:lo12:.LANCHOR83]
 	ldrh	w2, [x1, #:lo12:.LANCHOR84]
 	cmp	w0, w2, lsr 2
-	bcc	.L688
+	bcc	.L687
 	ldrh	w1, [x26, #:lo12:.LANCHOR85]
 	cmp	w1, w0
-	bls	.L712
-.L688:
+	bls	.L711
+.L687:
 	ldrh	w0, [x26, #:lo12:.LANCHOR85]
 	adrp	x22, .LANCHOR81
 	lsr	w0, w0, 2
@@ -3807,7 +3805,7 @@ gc_search_src_blk:
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L714
+	beq	.L713
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x3, [x2, #:lo12:.LANCHOR9]
@@ -3815,56 +3813,56 @@ gc_search_src_blk:
 	ldrh	w2, [x2, #:lo12:.LANCHOR80]
 	ldrh	w1, [x3, x1]
 	cmp	w1, w2, lsr 2
-	bcs	.L714
+	bcs	.L713
 	strh	wzr, [x22, #:lo12:.LANCHOR81]
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
 	cmp	w0, 0
 	cset	w23, ne
-.L690:
+.L689:
 	add	x22, x22, :lo12:.LANCHOR81
 	and	w28, w20, 65535
 	mov	w24, 64
 	mov	w27, 65535
-.L692:
+.L691:
 	ldrh	w6, [x22]
 	mov	w0, w6
 	bl	zftl_get_gc_node.part.9
 	add	w6, w6, 1
 	strh	w6, [x22]
 	cmp	w27, w0, uxth
-	beq	.L689
+	beq	.L688
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L691
+	cbz	w0, .L690
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w23, w28
-	bcs	.L689
-.L691:
+	bcs	.L688
+.L690:
 	sub	w24, w24, #1
 	ands	w24, w24, 65535
-	bne	.L692
-.L689:
+	bne	.L691
+.L688:
 	ldr	x0, [x29, 96]
 	ldrh	w1, [x25, #:lo12:.LANCHOR83]
 	ldrh	w0, [x0, #:lo12:.LANCHOR84]
 	cmp	w1, w0, lsr 3
-	bhi	.L709
+	bhi	.L708
 	ldrh	w0, [x26, #:lo12:.LANCHOR85]
 	add	w0, w0, 8
 	cmp	w1, w0
-	ble	.L687
-.L709:
+	ble	.L686
+.L708:
 	adrp	x24, .LANCHOR77
 	and	w26, w20, 65535
 	mov	w22, 64
 	mov	w25, 65535
 	strh	wzr, [x24, #:lo12:.LANCHOR77]
 	add	x24, x24, :lo12:.LANCHOR77
-.L694:
+.L693:
 	ldrh	w6, [x24]
 	mov	w1, 3
 	mov	w0, w6
@@ -3872,22 +3870,22 @@ gc_search_src_blk:
 	add	w6, w6, 1
 	strh	w6, [x24]
 	cmp	w25, w0, uxth
-	beq	.L687
+	beq	.L686
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L693
+	cbz	w0, .L692
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w23, w26
-	bcs	.L687
-.L693:
+	bcs	.L686
+.L692:
 	sub	w22, w22, #1
 	ands	w22, w22, 65535
-	bne	.L694
-.L687:
+	bne	.L693
+.L686:
 	ldr	x0, [x29, 112]
-	tbz	x0, 1, .L695
+	tbz	x0, 1, .L694
 	adrp	x24, .LANCHOR78
 	adrp	x28, .LANCHOR86
 	adrp	x25, .LANCHOR73
@@ -3896,7 +3894,7 @@ gc_search_src_blk:
 	add	x25, x25, :lo12:.LANCHOR73
 	strh	wzr, [x24, #:lo12:.LANCHOR78]
 	mov	w22, 64
-.L700:
+.L699:
 	ldrh	w6, [x26]
 	mov	w1, 5
 	mov	w0, w6
@@ -3906,9 +3904,9 @@ gc_search_src_blk:
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L696
+	beq	.L695
 	cmp	w20, 1
-	bne	.L697
+	bne	.L696
 	adrp	x3, .LANCHOR72
 	ldrb	w2, [x25]
 	ldrh	w3, [x3, #:lo12:.LANCHOR72]
@@ -3917,37 +3915,37 @@ gc_search_src_blk:
 	ldrh	w2, [x2, #:lo12:.LANCHOR80]
 	sub	w2, w3, w2, lsr 3
 	strh	w2, [x27]
-.L697:
+.L696:
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x1]
 	ldrh	w1, [x27]
 	cmp	w2, w1
-	bcs	.L698
+	bcs	.L697
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L699
+	cbz	w0, .L698
 	add	w5, w23, 1
 	add	w19, w19, 1
 	and	w23, w5, 65535
 	and	w19, w19, 65535
 	cmp	w23, w20
-	bcc	.L699
-.L696:
+	bcc	.L698
+.L695:
 	cmp	w23, w20
 	adrp	x0, .LANCHOR80
 	adrp	x3, .LANCHOR73
-	bcc	.L701
-	cbnz	w19, .L702
+	bcc	.L700
+	cbnz	w19, .L701
 	adrp	x1, .LANCHOR87
 	ldrh	w2, [x1, #:lo12:.LANCHOR87]
 	adrp	x1, .LANCHOR88
 	ldrh	w1, [x1, #:lo12:.LANCHOR88]
 	cmp	w2, w1
-	bls	.L702
-.L701:
+	bls	.L701
+.L700:
 	ldrh	w2, [x0, #:lo12:.LANCHOR80]
 	adrp	x0, .LANCHOR72
 	ldrb	w3, [x3, #:lo12:.LANCHOR73]
@@ -3957,12 +3955,12 @@ gc_search_src_blk:
 	mul	w0, w0, w3
 	sub	w0, w0, w2
 	cmp	w1, w0
-	bge	.L695
+	bge	.L694
 	add	w1, w1, w2
 	strh	w1, [x28, #:lo12:.LANCHOR86]
-.L695:
+.L694:
 	ldr	w0, [x29, 104]
-	cbz	w0, .L681
+	cbz	w0, .L680
 	adrp	x25, .LANCHOR77
 	adrp	x22, .LANCHOR89
 	adrp	x26, .LANCHOR84
@@ -3972,7 +3970,7 @@ gc_search_src_blk:
 	add	x27, x27, :lo12:.LANCHOR83
 	strh	wzr, [x25, #:lo12:.LANCHOR77]
 	mov	w24, 64
-.L706:
+.L705:
 	ldrh	w6, [x25, #:lo12:.LANCHOR77]
 	mov	w1, 3
 	mov	w0, w6
@@ -3982,69 +3980,69 @@ gc_search_src_blk:
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L703
+	beq	.L702
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w1, [x2, x1]
 	ldrh	w2, [x28]
 	cmp	w2, w1
-	bls	.L704
+	bls	.L703
 	cmp	w1, 2
-	bls	.L704
+	bls	.L703
 	ldrh	w2, [x26]
 	ldrh	w1, [x27]
 	cmp	w1, w2, lsr 1
-	bls	.L703
-.L704:
+	bls	.L702
+.L703:
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L705
+	cbz	w0, .L704
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w23, w20
-	bcs	.L703
-.L705:
+	bcs	.L702
+.L704:
 	sub	w24, w24, #1
 	ands	w24, w24, 65535
-	bne	.L706
-.L703:
+	bne	.L705
+.L702:
 	cmp	w23, w20
 	adrp	x0, .LANCHOR80
-	bcs	.L707
+	bcs	.L706
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	ldrh	w1, [x22, #:lo12:.LANCHOR89]
 	cmp	w1, w0, lsr 1
-	bls	.L681
+	bls	.L680
 	sub	w0, w1, w0, lsr 3
 	strh	w0, [x22, #:lo12:.LANCHOR89]
-	b	.L681
-.L714:
+	b	.L680
+.L713:
 	mov	w23, 0
-	b	.L690
-.L711:
+	b	.L689
+.L710:
 	mov	w23, 0
-	b	.L687
-.L698:
+	b	.L686
+.L697:
 	strh	wzr, [x24, #:lo12:.LANCHOR78]
-	b	.L696
-.L699:
+	b	.L695
+.L698:
 	sub	w22, w22, #1
 	ands	w22, w22, 65535
-	bne	.L700
-	b	.L696
-.L702:
+	bne	.L699
+	b	.L695
+.L701:
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	ldrb	w1, [x3, #:lo12:.LANCHOR73]
 	ldrh	w2, [x28, #:lo12:.LANCHOR86]
 	mul	w1, w1, w0
 	cmp	w2, w1
-	ble	.L695
+	ble	.L694
 	sub	w0, w2, w0, lsr 3
 	strh	w0, [x28, #:lo12:.LANCHOR86]
-	b	.L695
-.L707:
+	b	.L694
+.L706:
 	ldrh	w1, [x0, #:lo12:.LANCHOR80]
 	adrp	x0, .LANCHOR73
 	ldrh	w2, [x22, #:lo12:.LANCHOR89]
@@ -4052,13 +4050,13 @@ gc_search_src_blk:
 	mul	w0, w0, w1
 	sub	w0, w0, #32
 	cmp	w2, w0
-	bge	.L681
+	bge	.L680
 	add	w1, w2, w1, lsr 3
 	strh	w1, [x22, #:lo12:.LANCHOR89]
-	b	.L681
-.L712:
+	b	.L680
+.L711:
 	mov	w23, 0
-	b	.L689
+	b	.L688
 	.size	gc_search_src_blk, .-gc_search_src_blk
 	.section	.text.zftl_insert_free_list,"ax",@progbits
 	.align	2
@@ -4071,27 +4069,27 @@ zftl_insert_free_list:
 	add	x0, x0, x1, uxth 2
 	ldrb	w0, [x0, 2]
 	ands	w0, w0, 24
-	bne	.L763
+	bne	.L762
 	adrp	x2, .LANCHOR90
 	adrp	x0, .LANCHOR91
 	add	x2, x2, :lo12:.LANCHOR90
 	add	x0, x0, :lo12:.LANCHOR91
-.L765:
+.L764:
 	b	_insert_free_list
-.L763:
+.L762:
 	cmp	w0, 16
-	bne	.L764
+	bne	.L763
 	adrp	x2, .LANCHOR92
 	adrp	x0, .LANCHOR93
 	add	x2, x2, :lo12:.LANCHOR92
 	add	x0, x0, :lo12:.LANCHOR93
-	b	.L765
-.L764:
+	b	.L764
+.L763:
 	adrp	x2, .LANCHOR94
 	adrp	x0, .LANCHOR95
 	add	x2, x2, :lo12:.LANCHOR94
 	add	x0, x0, :lo12:.LANCHOR95
-	b	.L765
+	b	.L764
 	.size	zftl_insert_free_list, .-zftl_insert_free_list
 	.section	.text.zftl_insert_data_list,"ax",@progbits
 	.align	2
@@ -4105,30 +4103,30 @@ zftl_insert_data_list:
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L767
+	bne	.L766
 	adrp	x2, .LANCHOR85
 	adrp	x0, .LANCHOR12
 	add	x2, x2, :lo12:.LANCHOR85
 	add	x0, x0, :lo12:.LANCHOR12
-.L770:
+.L769:
 	b	_insert_data_list
-.L767:
+.L766:
 	cmp	w2, 96
-	bne	.L768
+	bne	.L767
 	adrp	x2, .LANCHOR83
 	adrp	x0, .LANCHOR76
 	add	x2, x2, :lo12:.LANCHOR83
 	add	x0, x0, :lo12:.LANCHOR76
-	b	.L770
-.L768:
+	b	.L769
+.L767:
 	cmp	w2, 160
-	bne	.L766
+	bne	.L765
 	adrp	x2, .LANCHOR87
 	adrp	x0, .LANCHOR75
 	add	x2, x2, :lo12:.LANCHOR87
 	add	x0, x0, :lo12:.LANCHOR75
-	b	.L770
-.L766:
+	b	.L769
+.L765:
 	ret
 	.size	zftl_insert_data_list, .-zftl_insert_data_list
 	.section	.text.zftl_gc_get_free_sblk,"ax",@progbits
@@ -4147,8 +4145,8 @@ zftl_gc_get_free_sblk:
 	ldrh	w19, [x0, 588]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L772
-	cbnz	w21, .L772
+	beq	.L771
+	cbnz	w21, .L771
 	mov	w1, w19
 	adrp	x0, .LC49
 	add	x0, x0, :lo12:.LC49
@@ -4156,31 +4154,31 @@ zftl_gc_get_free_sblk:
 	ldr	x0, [x20, #:lo12:.LANCHOR10]
 	mov	w1, -1
 	strh	w1, [x0, 588]
-.L773:
+.L772:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L772:
+.L771:
 	adrp	x2, .LANCHOR92
 	adrp	x20, .LANCHOR94
 	ldrh	w0, [x2, #:lo12:.LANCHOR92]
 	ldrh	w1, [x20, #:lo12:.LANCHOR94]
 	cmp	w0, w1
-	bls	.L774
+	bls	.L773
 	lsr	w1, w0, 3
 	cmp	w21, 0
 	adrp	x0, .LANCHOR93
 	csel	w1, w1, wzr, ne
 	add	x2, x2, :lo12:.LANCHOR92
 	add	x0, x0, :lo12:.LANCHOR93
-.L788:
+.L787:
 	bl	_list_pop_index_node
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	bne	.L779
+	bne	.L778
 	adrp	x0, .LANCHOR90
 	ldrh	w5, [x20, #:lo12:.LANCHOR94]
 	mov	w2, w22
@@ -4191,11 +4189,11 @@ zftl_gc_get_free_sblk:
 	adrp	x0, .LC50
 	add	x0, x0, :lo12:.LC50
 	bl	printf
-.L779:
-	cbz	w21, .L773
+.L778:
+	cbz	w21, .L772
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L773
+	tbz	x0, 8, .L772
 	adrp	x4, .LANCHOR9
 	adrp	x1, .LANCHOR7
 	uxtw	x3, w19
@@ -4215,20 +4213,20 @@ zftl_gc_get_free_sblk:
 	ubfx	x2, x2, 5, 3
 	add	x0, x0, :lo12:.LC51
 	bl	printf
-	b	.L773
-.L774:
-	cbnz	w21, .L777
+	b	.L772
+.L773:
+	cbnz	w21, .L776
 	lsr	w1, w1, 2
-.L778:
+.L777:
 	adrp	x0, .LANCHOR95
 	add	x2, x20, :lo12:.LANCHOR94
 	add	x0, x0, :lo12:.LANCHOR95
-	b	.L788
-.L777:
+	b	.L787
+.L776:
 	mov	w1, 7
 	mul	w1, w0, w1
 	lsr	w1, w1, 3
-	b	.L778
+	b	.L777
 	.size	zftl_gc_get_free_sblk, .-zftl_gc_get_free_sblk
 	.section	.text.zftl_get_free_sblk,"ax",@progbits
 	.align	2
@@ -4241,36 +4239,36 @@ zftl_get_free_sblk:
 	and	w20, w1, 65535
 	str	x21, [sp, 32]
 	cmp	w20, 5
-	bne	.L790
+	bne	.L789
 	adrp	x2, .LANCHOR92
 	adrp	x0, .LANCHOR94
 	ldrh	w3, [x2, #:lo12:.LANCHOR92]
 	ldrh	w1, [x0, #:lo12:.LANCHOR94]
 	cmp	w3, w1
-	bcc	.L791
+	bcc	.L790
 	adrp	x4, .LANCHOR90
 	ldrh	w4, [x4, #:lo12:.LANCHOR90]
 	cmp	w4, w3
-	bls	.L792
-	cbz	w1, .L792
-.L791:
+	bls	.L791
+	cbz	w1, .L791
+.L790:
 	add	x2, x0, :lo12:.LANCHOR94
 	lsr	w1, w1, 1
-.L811:
+.L810:
 	adrp	x0, .LANCHOR95
 	add	x0, x0, :lo12:.LANCHOR95
-	b	.L810
-.L792:
+	b	.L809
+.L791:
 	adrp	x0, .LANCHOR93
 	add	x2, x2, :lo12:.LANCHOR92
 	add	x0, x0, :lo12:.LANCHOR93
 	mov	w1, 0
-.L810:
+.L809:
 	bl	_list_pop_index_node
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	bne	.L795
+	bne	.L794
 	adrp	x0, .LANCHOR94
 	mov	w2, w20
 	mov	w1, w19
@@ -4282,17 +4280,17 @@ zftl_get_free_sblk:
 	adrp	x0, .LC50
 	add	x0, x0, :lo12:.LC50
 	bl	printf
-	b	.L795
-.L790:
+	b	.L794
+.L789:
 	adrp	x21, .LANCHOR10
 	and	w0, w0, 65535
 	ldr	x1, [x21, #:lo12:.LANCHOR10]
 	ldrh	w19, [x1, 590]
 	mov	w1, 65535
 	cmp	w19, w1
-	beq	.L794
+	beq	.L793
 	cmp	w20, 1
-	beq	.L794
+	beq	.L793
 	mov	w1, w19
 	adrp	x0, .LC52
 	add	x0, x0, :lo12:.LC52
@@ -4300,32 +4298,32 @@ zftl_get_free_sblk:
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	mov	w1, -1
 	strh	w1, [x0, 590]
-.L795:
+.L794:
 	mov	w0, w19
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L794:
+.L793:
 	adrp	x2, .LANCHOR90
 	adrp	x4, .LANCHOR94
 	ldrh	w1, [x2, #:lo12:.LANCHOR90]
 	ldrh	w3, [x4, #:lo12:.LANCHOR94]
 	cmp	w1, w3
-	bcc	.L796
+	bcc	.L795
 	adrp	x5, .LANCHOR92
 	ldrh	w5, [x5, #:lo12:.LANCHOR92]
 	cmp	w5, w1
-	bls	.L797
-	cbz	w3, .L797
-.L796:
+	bls	.L796
+	cbz	w3, .L796
+.L795:
 	cmp	w20, 1
 	lsr	w3, w3, 1
 	csel	w0, w3, w0, eq
 	add	x2, x4, :lo12:.LANCHOR94
 	mov	w1, w0
-	b	.L811
-.L797:
+	b	.L810
+.L796:
 	lsr	w1, w1, 1
 	cmp	w20, 1
 	csel	w0, w1, w0, eq
@@ -4333,7 +4331,7 @@ zftl_get_free_sblk:
 	mov	w1, w0
 	adrp	x0, .LANCHOR91
 	add	x0, x0, :lo12:.LANCHOR91
-	b	.L810
+	b	.L809
 	.size	zftl_get_free_sblk, .-zftl_get_free_sblk
 	.section	.text.zftl_remove_data_node,"ax",@progbits
 	.align	2
@@ -4347,30 +4345,30 @@ zftl_remove_data_node:
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L813
+	bne	.L812
 	adrp	x2, .LANCHOR85
 	adrp	x0, .LANCHOR12
 	add	x2, x2, :lo12:.LANCHOR85
 	add	x0, x0, :lo12:.LANCHOR12
-.L816:
+.L815:
 	b	_list_remove_node
-.L813:
+.L812:
 	cmp	w2, 96
-	bne	.L814
+	bne	.L813
 	adrp	x2, .LANCHOR83
 	adrp	x0, .LANCHOR76
 	add	x2, x2, :lo12:.LANCHOR83
 	add	x0, x0, :lo12:.LANCHOR76
-	b	.L816
-.L814:
+	b	.L815
+.L813:
 	cmp	w2, 160
-	bne	.L812
+	bne	.L811
 	adrp	x2, .LANCHOR87
 	adrp	x0, .LANCHOR75
 	add	x2, x2, :lo12:.LANCHOR87
 	add	x0, x0, :lo12:.LANCHOR75
-	b	.L816
-.L812:
+	b	.L815
+.L811:
 	ret
 	.size	zftl_remove_data_node, .-zftl_remove_data_node
 	.section	.text.zftl_remove_free_node,"ax",@progbits
@@ -4384,27 +4382,27 @@ zftl_remove_free_node:
 	add	x0, x0, x1, uxth 2
 	ldrb	w0, [x0, 2]
 	ands	w0, w0, 24
-	bne	.L818
+	bne	.L817
 	adrp	x2, .LANCHOR90
 	adrp	x0, .LANCHOR91
 	add	x2, x2, :lo12:.LANCHOR90
 	add	x0, x0, :lo12:.LANCHOR91
-.L820:
+.L819:
 	b	_list_remove_node
-.L818:
+.L817:
 	cmp	w0, 16
-	bne	.L819
+	bne	.L818
 	adrp	x2, .LANCHOR92
 	adrp	x0, .LANCHOR93
 	add	x2, x2, :lo12:.LANCHOR92
 	add	x0, x0, :lo12:.LANCHOR93
-	b	.L820
-.L819:
+	b	.L819
+.L818:
 	adrp	x2, .LANCHOR94
 	adrp	x0, .LANCHOR95
 	add	x2, x2, :lo12:.LANCHOR94
 	add	x0, x0, :lo12:.LANCHOR95
-	b	.L820
+	b	.L819
 	.size	zftl_remove_free_node, .-zftl_remove_free_node
 	.section	.text.zftl_list_update_data_list,"ax",@progbits
 	.align	2
@@ -4418,30 +4416,30 @@ zftl_list_update_data_list:
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L822
+	bne	.L821
 	adrp	x2, .LANCHOR85
 	adrp	x0, .LANCHOR12
 	add	x2, x2, :lo12:.LANCHOR85
 	add	x0, x0, :lo12:.LANCHOR12
-.L825:
+.L824:
 	b	_list_update_data_list
-.L822:
+.L821:
 	cmp	w2, 96
-	bne	.L823
+	bne	.L822
 	adrp	x2, .LANCHOR83
 	adrp	x0, .LANCHOR76
 	add	x2, x2, :lo12:.LANCHOR83
 	add	x0, x0, :lo12:.LANCHOR76
-	b	.L825
-.L823:
+	b	.L824
+.L822:
 	cmp	w2, 160
-	bne	.L821
+	bne	.L820
 	adrp	x2, .LANCHOR87
 	adrp	x0, .LANCHOR75
 	add	x2, x2, :lo12:.LANCHOR87
 	add	x0, x0, :lo12:.LANCHOR75
-	b	.L825
-.L821:
+	b	.L824
+.L820:
 	ret
 	.size	zftl_list_update_data_list, .-zftl_list_update_data_list
 	.section	.text.print_list_info,"ax",@progbits
@@ -4462,7 +4460,7 @@ print_list_info:
 	add	x0, x0, :lo12:.LC53
 	bl	printf
 	ldr	x19, [x19]
-	cbz	x19, .L826
+	cbz	x19, .L825
 	mov	x24, -6148914691236517206
 	adrp	x22, .LC54
 	adrp	x21, .LANCHOR96
@@ -4471,7 +4469,7 @@ print_list_info:
 	mov	w20, 0
 	adrp	x23, .LANCHOR4
 	movk	x24, 0xaaab, lsl 0
-.L830:
+.L829:
 	ldr	x2, [x23, #:lo12:.LANCHOR4]
 	adrp	x1, .LANCHOR7
 	adrp	x8, .LANCHOR9
@@ -4504,7 +4502,7 @@ print_list_info:
 	ldrh	w19, [x19]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L826
+	beq	.L825
 	ldr	x0, [x23, #:lo12:.LANCHOR4]
 	mov	w1, 6
 	add	w20, w20, 1
@@ -4512,8 +4510,8 @@ print_list_info:
 	umaddl	x19, w19, w1, x0
 	ldrh	w0, [x21]
 	cmp	w0, w20
-	bcs	.L830
-.L826:
+	bcs	.L829
+.L825:
 	ldp	x19, x20, [sp, 48]
 	ldp	x21, x22, [sp, 64]
 	ldp	x23, x24, [sp, 80]
@@ -4569,36 +4567,36 @@ ftl_tmp_into_update:
 	ldr	x0, [x0, #:lo12:.LANCHOR97]
 	ldr	w1, [x0, 16]
 	cmp	w1, 2048
-	bls	.L835
+	bls	.L834
 	ldr	w2, [x0, 20]
 	add	w2, w2, w1, lsr 11
 	and	w1, w1, 2047
 	stp	w1, w2, [x0, 16]
-.L835:
+.L834:
 	ldr	w1, [x0, 24]
 	cmp	w1, 2048
-	bls	.L836
+	bls	.L835
 	ldr	w2, [x0, 28]
 	add	w2, w2, w1, lsr 11
 	and	w1, w1, 2047
 	stp	w1, w2, [x0, 24]
-.L836:
+.L835:
 	ldr	w1, [x0, 32]
 	cmp	w1, 1024
-	bls	.L837
+	bls	.L836
 	ldr	w2, [x0, 36]
 	add	w2, w2, w1, lsr 10
 	and	w1, w1, 1023
 	stp	w1, w2, [x0, 32]
-.L837:
+.L836:
 	ldr	w1, [x0, 40]
 	cmp	w1, 1024
-	bls	.L834
+	bls	.L833
 	ldr	w2, [x0, 44]
 	add	w2, w2, w1, lsr 10
 	and	w1, w1, 1023
 	stp	w1, w2, [x0, 40]
-.L834:
+.L833:
 	ret
 	.size	ftl_tmp_into_update, .-ftl_tmp_into_update
 	.section	.text.ftl_get_blk_list_in_sblk,"ax",@progbits
@@ -4625,18 +4623,18 @@ ftl_get_blk_list_in_sblk:
 	sxth	w5, w2
 	and	w4, w0, 65535
 	mov	w0, 0
-.L840:
+.L839:
 	cmp	w3, w10
-	blt	.L844
+	blt	.L843
 	sxtw	x2, w0
 	mov	w3, -1
-.L845:
+.L844:
 	cmp	w10, w2
-	bgt	.L846
+	bgt	.L845
 	ret
-.L844:
+.L843:
 	asr	w2, w12, w3
-	tbnz	x2, 0, .L841
+	tbnz	x2, 0, .L840
 	sdiv	w2, w3, w6
 	ldrh	w8, [x7]
 	sbfiz	x11, x0, 1, 32
@@ -4645,21 +4643,21 @@ ftl_get_blk_list_in_sblk:
 	lsl	w2, w2, w8
 	add	w2, w4, w2
 	and	w2, w2, 65535
-	bhi	.L842
-.L847:
+	bhi	.L841
+.L846:
 	add	w0, w0, 1
 	strh	w2, [x1, x11]
-.L841:
+.L840:
 	add	w3, w3, 1
-	b	.L840
-.L842:
+	b	.L839
+.L841:
 	and	w8, w5, w3
 	add	w2, w2, w8
-	b	.L847
-.L846:
+	b	.L846
+.L845:
 	strh	w3, [x1, x2, lsl 1]
 	add	x2, x2, 1
-	b	.L845
+	b	.L844
 	.size	ftl_get_blk_list_in_sblk, .-ftl_get_blk_list_in_sblk
 	.section	.text.ftl_free_sblk,"ax",@progbits
 	.align	2
@@ -4678,7 +4676,7 @@ ftl_free_sblk:
 	mov	x19, x23
 	add	x20, x4, x21
 	ldrb	w0, [x20, 2]
-	tbz	x0, 3, .L850
+	tbz	x0, 3, .L849
 	adrp	x1, .LANCHOR97
 	ldrh	w2, [x4, x21]
 	adrp	x8, .LANCHOR100
@@ -4698,7 +4696,7 @@ ftl_free_sblk:
 	and	w1, w1, 65535
 	add	w7, w7, w1
 	cmp	w7, w8
-	ble	.L851
+	ble	.L850
 	adrp	x1, .LANCHOR88
 	adrp	x7, .LANCHOR92
 	ldrh	w5, [x1, #:lo12:.LANCHOR88]
@@ -4708,16 +4706,16 @@ ftl_free_sblk:
 	add	w5, w5, 7
 	add	w1, w1, w7
 	cmp	w5, w1
-	blt	.L852
-.L867:
+	blt	.L851
+.L866:
 	mov	w1, 2
 	bfi	w0, w1, 3, 2
-.L865:
+.L864:
 	strb	w0, [x20, 2]
-.L853:
+.L852:
 	ldrb	w0, [x20, 2]
 	ands	w0, w0, 24
-	bne	.L857
+	bne	.L856
 	mul	w2, w6, w2
 	ldrh	w0, [x4, x21]
 	add	w2, w2, w2, lsl 1
@@ -4725,7 +4723,7 @@ ftl_free_sblk:
 	ubfx	x2, x2, 2, 9
 	bfi	w0, w2, 0, 11
 	strh	w0, [x4, x21]
-.L850:
+.L849:
 	mov	w0, w19
 	bl	zftl_remove_data_node
 	ldr	x0, [x22, #:lo12:.LANCHOR7]
@@ -4737,29 +4735,29 @@ ftl_free_sblk:
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x23, lsl 1]
 	ldrb	w0, [x20, 2]
-	tbz	x0, 3, .L859
+	tbz	x0, 3, .L858
 	adrp	x0, .LANCHOR10
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldrh	w1, [x0, 584]
 	cmp	w1, w19
-	bne	.L860
+	bne	.L859
 	mov	w1, -1
 	ldrh	w2, [x0, 588]
 	strh	w1, [x0, 584]
 	mov	w1, 65535
 	cmp	w2, w1
-	bne	.L860
+	bne	.L858
 	strh	w19, [x0, 588]
 	mov	w1, w19
 	adrp	x0, .LC55
 	add	x0, x0, :lo12:.LC55
-.L866:
+.L865:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	b	printf
-.L852:
+.L851:
 	adrp	x1, .LANCHOR101
 	adrp	x7, .LANCHOR90
 	ldrh	w5, [x1, #:lo12:.LANCHOR101]
@@ -4772,16 +4770,16 @@ ftl_free_sblk:
 	ldrh	w7, [x7, #:lo12:.LANCHOR83]
 	add	w1, w1, w7
 	cmp	w5, w1
-	blt	.L867
-.L856:
+	blt	.L866
+.L855:
 	and	w0, w0, -25
-	b	.L865
-.L851:
+	b	.L864
+.L850:
 	madd	w1, w2, w1, w5
 	adrp	x5, .LANCHOR102
 	ldrh	w5, [x5, #:lo12:.LANCHOR102]
 	cmp	w1, w5
-	ble	.L853
+	ble	.L852
 	adrp	x1, .LANCHOR101
 	adrp	x7, .LANCHOR90
 	ldrh	w5, [x1, #:lo12:.LANCHOR101]
@@ -4794,7 +4792,7 @@ ftl_free_sblk:
 	ldrh	w7, [x7, #:lo12:.LANCHOR83]
 	add	w1, w1, w7
 	cmp	w5, w1
-	bge	.L856
+	bge	.L855
 	adrp	x1, .LANCHOR88
 	adrp	x7, .LANCHOR92
 	ldrh	w5, [x1, #:lo12:.LANCHOR88]
@@ -4804,11 +4802,11 @@ ftl_free_sblk:
 	add	w5, w5, 7
 	add	w1, w1, w7
 	cmp	w5, w1
-	blt	.L856
-	b	.L867
-.L857:
+	blt	.L855
+	b	.L866
+.L856:
 	cmp	w0, 16
-	bne	.L850
+	bne	.L849
 	sdiv	w2, w3, w2
 	ldr	w0, [x4, x21]
 	add	w2, w2, w2, lsl 1
@@ -4816,23 +4814,23 @@ ftl_free_sblk:
 	ubfx	x2, x2, 2, 6
 	bfi	w0, w2, 11, 8
 	str	w0, [x4, x21]
-	b	.L850
-.L860:
+	b	.L849
+.L859:
 	ldrh	w1, [x0, 586]
 	cmp	w1, w19
-	bne	.L859
+	bne	.L858
 	mov	w1, -1
 	ldrh	w2, [x0, 590]
 	strh	w1, [x0, 586]
 	mov	w1, 65535
 	cmp	w2, w1
-	bne	.L859
+	bne	.L858
 	strh	w19, [x0, 590]
 	mov	w1, w19
 	adrp	x0, .LC56
 	add	x0, x0, :lo12:.LC56
-	b	.L866
-.L859:
+	b	.L865
+.L858:
 	mov	w0, w19
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -4858,10 +4856,10 @@ gc_free_src_blk:
 	stp	x19, x20, [sp, 16]
 	mov	w20, 0
 	stp	x25, x26, [sp, 64]
-.L869:
+.L868:
 	ldrh	w0, [x21, 56]
 	cmp	w0, w20
-	bhi	.L883
+	bhi	.L882
 	strh	wzr, [x21, 56]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -4869,18 +4867,18 @@ gc_free_src_blk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L883:
+.L882:
 	add	x0, x21, x20, sxtw 1
 	ldrh	w25, [x0, 58]
 	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	mov	x19, x25
 	lsl	x26, x25, 1
 	ldrh	w2, [x0, x26]
-	cbz	w2, .L870
+	cbz	w2, .L869
 	mov	w1, w25
 	mov	x0, x22
 	bl	printf
-.L870:
+.L869:
 	ldr	x0, [x24, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x26]
 	adrp	x0, .LANCHOR7
@@ -4888,95 +4886,95 @@ gc_free_src_blk:
 	add	x25, x0, x25, lsl 2
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L871
+	tbz	x0, 8, .L870
 	ldrb	w2, [x25, 2]
 	adrp	x0, .LC58
 	mov	w1, w19
 	add	x0, x0, :lo12:.LC58
 	ubfx	x2, x2, 5, 3
 	bl	printf
-.L871:
+.L870:
 	ldrb	w0, [x25, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L872
+	beq	.L871
 	tst	w0, 192
-	bne	.L873
-.L872:
+	bne	.L872
+.L871:
 	adrp	x1, .LANCHOR103
 	adrp	x0, .LC0
-	mov	w2, 798
+	mov	w2, 799
 	add	x1, x1, :lo12:.LANCHOR103
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L873:
+.L872:
 	mov	w0, w19
 	bl	ftl_free_sblk
 	adrp	x0, .LANCHOR10
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldrh	w2, [x0, 124]
-	cbz	w2, .L874
+	cbz	w2, .L873
 	add	x3, x0, 392
 	mov	w1, 0
-.L876:
+.L875:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L875
+	bne	.L874
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 392]
 	strh	w2, [x0, 124]
-.L874:
+.L873:
 	ldrh	w2, [x0, 120]
-	cbz	w2, .L877
+	cbz	w2, .L876
 	add	x3, x0, 136
 	mov	w1, 0
-.L879:
+.L878:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L878
+	bne	.L877
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 136]
 	strh	w2, [x0, 120]
-.L877:
+.L876:
 	ldrh	w2, [x0, 122]
-	cbz	w2, .L880
+	cbz	w2, .L879
 	add	x3, x0, 264
 	mov	w1, 0
-.L882:
+.L881:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L881
+	bne	.L880
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 264]
 	strh	w2, [x0, 122]
-.L880:
+.L879:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L869
-.L875:
+	b	.L868
+.L874:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L876
-	b	.L874
-.L878:
+	bne	.L875
+	b	.L873
+.L877:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L879
-	b	.L877
-.L881:
+	bne	.L878
+	b	.L876
+.L880:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L882
-	b	.L880
+	bne	.L881
+	b	.L879
 	.size	gc_free_src_blk, .-gc_free_src_blk
 	.section	.text.ftl_erase_phy_blk,"ax",@progbits
 	.align	2
@@ -5002,14 +5000,14 @@ ftl_erase_phy_blk:
 	adrp	x0, .LANCHOR104
 	sxth	w19, w19
 	ldrb	w0, [x0, #:lo12:.LANCHOR104]
-	cbz	w0, .L907
+	cbz	w0, .L906
 	ldrh	w2, [x22, #:lo12:.LANCHOR105]
 	cmp	w21, 0
 	cset	w1, eq
 	mov	w0, w20
 	mul	w2, w2, w19
 	bl	flash_erase_block_en
-.L907:
+.L906:
 	ldrh	w2, [x22, #:lo12:.LANCHOR105]
 	mov	w1, w21
 	mov	w0, w20
@@ -5044,10 +5042,10 @@ ftl_erase_sblk:
 	add	x24, x24, :lo12:.LANCHOR98
 	add	x27, x29, 112
 	mov	w19, 0
-.L913:
+.L912:
 	ldrb	w0, [x25]
 	cmp	w19, w0
-	bge	.L924
+	bge	.L923
 	ldrb	w1, [x24]
 	adrp	x0, .LANCHOR105
 	mov	w21, 0
@@ -5056,31 +5054,31 @@ ftl_erase_sblk:
 	mov	w0, 0
 	mul	w6, w19, w1
 	mul	w5, w26, w1
-	b	.L925
-.L915:
+	b	.L924
+.L914:
 	add	w2, w0, w6
 	asr	w2, w28, w2
-	tbnz	x2, 0, .L914
+	tbnz	x2, 0, .L913
 	and	w2, w0, w4
 	add	w2, w2, w5
 	mul	w2, w2, w3
 	str	w2, [x27, w21, sxtw 2]
 	add	w21, w21, 1
-.L914:
+.L913:
 	add	w0, w0, 1
-.L925:
+.L924:
 	cmp	w0, w1
-	blt	.L915
+	blt	.L914
 	cmp	w1, 4
-	bne	.L916
+	bne	.L915
 	mov	x3, 0
-.L917:
+.L916:
 	cmp	w21, w3
-	bgt	.L918
-.L919:
-	add	w19, w19, 1
-	b	.L913
+	bgt	.L917
 .L918:
+	add	w19, w19, 1
+	b	.L912
+.L917:
 	ldr	w2, [x27, x3, lsl 2]
 	mov	w1, w20
 	str	x3, [x29, 104]
@@ -5088,45 +5086,45 @@ ftl_erase_sblk:
 	bl	flash_erase_block_en
 	ldr	x3, [x29, 104]
 	add	x3, x3, 1
-	b	.L917
-.L916:
+	b	.L916
+.L915:
 	cmp	w21, 2
-	bne	.L920
+	bne	.L919
 	adrp	x0, .LANCHOR104
 	ldrb	w0, [x0, #:lo12:.LANCHOR104]
-	cbz	w0, .L921
+	cbz	w0, .L920
 	ldp	w2, w3, [x29, 112]
 	cmp	w20, 0
 	cset	w1, eq
 	mov	w0, w19
 	bl	flash_erase_duplane_block
-.L921:
+.L920:
 	ldp	w2, w3, [x29, 112]
 	mov	w1, w20
 	mov	w0, w19
 	bl	flash_erase_duplane_block
-	b	.L919
-.L920:
+	b	.L918
+.L919:
 	cmp	w21, 1
-	bne	.L919
+	bne	.L918
 	adrp	x0, .LANCHOR104
 	ldrb	w0, [x0, #:lo12:.LANCHOR104]
-	cbz	w0, .L923
+	cbz	w0, .L922
 	ldr	w2, [x29, 112]
 	cmp	w20, 0
 	cset	w1, eq
 	mov	w0, w19
 	bl	flash_erase_block_en
-.L923:
+.L922:
 	ldr	w2, [x29, 112]
 	mov	w1, w20
 	mov	w0, w19
 	bl	flash_erase_block_en
-	b	.L919
-.L924:
+	b	.L918
+.L923:
 	adrp	x2, .LANCHOR97
 	ldr	x3, [x23, #:lo12:.LANCHOR7]
-	cbnz	w20, .L926
+	cbnz	w20, .L925
 	ldrh	w1, [x3, x22]
 	add	w0, w1, 1
 	and	w0, w0, 2047
@@ -5138,9 +5136,9 @@ ftl_erase_sblk:
 	str	w2, [x1, 84]
 	ldrh	w2, [x1, 96]
 	cmp	w2, w0
-	bge	.L928
+	bge	.L927
 	strh	w0, [x1, 96]
-.L928:
+.L927:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -5149,7 +5147,7 @@ ftl_erase_sblk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L926:
+.L925:
 	ldr	w1, [x3, x22]
 	ubfx	x0, x1, 11, 8
 	add	w0, w0, 1
@@ -5163,9 +5161,9 @@ ftl_erase_sblk:
 	str	w2, [x1, 80]
 	ldrh	w2, [x1, 98]
 	cmp	w2, w0
-	bcs	.L928
+	bcs	.L927
 	strh	w0, [x1, 98]
-	b	.L928
+	b	.L927
 	.size	ftl_erase_sblk, .-ftl_erase_sblk
 	.section	.text.ftl_alloc_sys_blk,"ax",@progbits
 	.align	2
@@ -5180,37 +5178,37 @@ ftl_alloc_sys_blk:
 	str	x19, [sp, 16]
 	mov	x19, x0
 	cmp	w2, 63
-	bls	.L938
+	bls	.L937
 	strh	wzr, [x1, 136]
-.L938:
+.L937:
 	ldrh	w0, [x1, 112]
-	cbnz	w0, .L939
+	cbnz	w0, .L938
 	adrp	x1, .LANCHOR107
 	adrp	x0, .LC0
-	mov	w2, 1118
+	mov	w2, 1117
 	add	x1, x1, :lo12:.LANCHOR107
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L939:
+.L938:
 	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	mov	w5, 65535
-.L942:
+.L941:
 	ldrh	w2, [x1, 136]
-.L940:
+.L939:
 	mov	w3, w2
 	cmp	w2, 63
-	ble	.L941
+	ble	.L940
 	strh	wzr, [x1, 136]
-	b	.L942
-.L941:
+	b	.L941
+.L940:
 	add	x4, x2, 1
 	add	x0, x1, x4, lsl 1
 	ldrh	w0, [x0, 158]
 	cmp	w0, w5
-	bne	.L945
+	bne	.L944
 	mov	x2, x4
-	b	.L940
-.L945:
+	b	.L939
+.L944:
 	add	x3, x1, x3, sxtw 1
 	mov	w4, -1
 	ldr	x19, [sp, 16]
@@ -5236,35 +5234,35 @@ ftl_free_sys_blk:
 	ldr	x1, [x0, #:lo12:.LANCHOR97]
 	ldrh	w2, [x1, 138]
 	cmp	w2, 63
-	bls	.L948
+	bls	.L947
 	strh	wzr, [x1, 138]
-.L948:
+.L947:
 	ldrh	w0, [x1, 112]
 	cmp	w0, 63
-	bls	.L949
+	bls	.L948
 	adrp	x1, .LANCHOR108
 	adrp	x0, .LC0
-	mov	w2, 1142
+	mov	w2, 1141
 	add	x1, x1, :lo12:.LANCHOR108
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L949:
+.L948:
 	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	w4, 65535
-.L952:
+.L951:
 	ldrh	w1, [x0, 138]
-.L950:
+.L949:
 	mov	w2, w1
 	cmp	w1, 63
-	ble	.L951
+	ble	.L950
 	strh	wzr, [x0, 138]
-	b	.L952
-.L951:
+	b	.L951
+.L950:
 	add	x3, x1, 1
 	add	x5, x0, x3, lsl 1
 	ldrh	w5, [x5, 158]
 	cmp	w5, w4
-	bne	.L953
+	bne	.L952
 	add	x2, x0, x2, sxtw 1
 	strh	w20, [x2, 160]
 	strh	w1, [x0, 138]
@@ -5274,9 +5272,9 @@ ftl_free_sys_blk:
 	strh	w1, [x0, 112]
 	ldp	x29, x30, [sp], 32
 	ret
-.L953:
+.L952:
 	mov	x1, x3
-	b	.L950
+	b	.L949
 	.size	ftl_free_sys_blk, .-ftl_free_sys_blk
 	.section	.text.ftl_info_data_recovery,"ax",@progbits
 	.align	2
@@ -5286,7 +5284,7 @@ ftl_info_data_recovery:
 	ldrh	w2, [x0]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L966
+	beq	.L965
 	stp	x29, x30, [sp, -48]!
 	adrp	x1, .LANCHOR7
 	add	x29, sp, 0
@@ -5297,7 +5295,7 @@ ftl_info_data_recovery:
 	add	x21, x20, x19
 	ldrb	w1, [x21, 2]
 	tst	w1, 224
-	bne	.L956
+	bne	.L955
 	ldrb	w0, [x0, 4]
 	bfi	w1, w0, 5, 3
 	strb	w1, [x21, 2]
@@ -5306,14 +5304,14 @@ ftl_info_data_recovery:
 	ldrb	w0, [x21, 2]
 	adrp	x1, .LANCHOR97
 	ldr	x3, [x1, #:lo12:.LANCHOR97]
-	tbz	x0, 3, .L960
+	tbz	x0, 3, .L959
 	ldrh	w2, [x3, 116]
 	sub	w2, w2, #1
 	strh	w2, [x3, 116]
-.L961:
+.L960:
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L963
+	bne	.L962
 	ldr	w0, [x20, x19]
 	ldr	x1, [x1, #:lo12:.LANCHOR97]
 	ubfx	x2, x0, 11, 8
@@ -5323,44 +5321,44 @@ ftl_info_data_recovery:
 	ldrh	w0, [x1, 120]
 	sub	w0, w0, #1
 	strh	w0, [x1, 120]
-.L956:
+.L955:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L960:
+.L959:
 	tst	w0, 24
-	bne	.L962
+	bne	.L961
 	ldrh	w2, [x3, 114]
 	sub	w2, w2, #1
 	strh	w2, [x3, 114]
-	b	.L961
-.L962:
+	b	.L960
+.L961:
 	ldrh	w2, [x3, 118]
 	sub	w2, w2, #1
 	strh	w2, [x3, 118]
-	b	.L961
-.L963:
+	b	.L960
+.L962:
 	ldrh	w2, [x20, x19]
 	cmp	w0, 64
 	add	w3, w2, 1
 	bfi	w2, w3, 0, 11
 	strh	w2, [x20, x19]
-	bne	.L964
+	bne	.L963
 	ldr	x1, [x1, #:lo12:.LANCHOR97]
 	ldrh	w0, [x1, 122]
 	sub	w0, w0, #1
 	strh	w0, [x1, 122]
-	b	.L956
-.L964:
+	b	.L955
+.L963:
 	cmp	w0, 96
-	bne	.L956
+	bne	.L955
 	ldr	x1, [x1, #:lo12:.LANCHOR97]
 	ldrh	w0, [x1, 124]
 	sub	w0, w0, #1
 	strh	w0, [x1, 124]
-	b	.L956
-.L966:
+	b	.L955
+.L965:
 	ret
 	.size	ftl_info_data_recovery, .-ftl_info_data_recovery
 	.section	.text.ftl_get_ppa_from_index,"ax",@progbits
@@ -5380,9 +5378,9 @@ ftl_get_ppa_from_index:
 	stp	x19, x20, [sp, 16]
 	mul	w1, w1, w3
 	cmp	w0, w1
-	bge	.L970
+	bge	.L969
 	add	x2, x2, 16
-.L971:
+.L970:
 	ldrb	w1, [x2, 9]
 	sdiv	w19, w0, w1
 	msub	w0, w19, w1, w0
@@ -5390,25 +5388,25 @@ ftl_get_ppa_from_index:
 	ldrh	w20, [x0, 16]
 	mov	w0, 65535
 	cmp	w20, w0
-	bne	.L972
+	bne	.L971
 	adrp	x1, .LANCHOR109
 	adrp	x0, .LC0
-	mov	w2, 1529
+	mov	w2, 1528
 	add	x1, x1, :lo12:.LANCHOR109
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L972:
+.L971:
 	adrp	x0, .LANCHOR105
 	ldrh	w0, [x0, #:lo12:.LANCHOR105]
 	madd	w0, w0, w20, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L970:
+.L969:
 	sub	w0, w0, w1
 	add	x2, x2, 48
 	and	w0, w0, 65535
-	b	.L971
+	b	.L970
 	.size	ftl_get_ppa_from_index, .-ftl_get_ppa_from_index
 	.section	.text.lpa_hash_get_ppa,"ax",@progbits
 	.align	2
@@ -5424,21 +5422,21 @@ lpa_hash_get_ppa:
 	ldr	x4, [x2, #:lo12:.LANCHOR111]
 	adrp	x2, .LANCHOR112
 	ldr	x5, [x2, #:lo12:.LANCHOR112]
-.L975:
+.L974:
 	cmp	w1, w3
-	bne	.L977
+	bne	.L976
 	mov	w0, -1
 	ret
-.L977:
+.L976:
 	uxtw	x2, w1
 	ldr	w6, [x4, x2, lsl 2]
 	cmp	w0, w6
-	bne	.L976
+	bne	.L975
 	mov	w0, w1
 	b	ftl_get_ppa_from_index
-.L976:
+.L975:
 	ldrh	w1, [x5, x2, lsl 1]
-	b	.L975
+	b	.L974
 	.size	lpa_hash_get_ppa, .-lpa_hash_get_ppa
 	.section	.text.ftl_get_new_free_page,"ax",@progbits
 	.align	2
@@ -5452,45 +5450,45 @@ ftl_get_new_free_page:
 	mov	x19, x0
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L979
+	bne	.L978
 	adrp	x1, .LANCHOR113
 	adrp	x0, .LC0
-	mov	w2, 1644
+	mov	w2, 1643
 	add	x1, x1, :lo12:.LANCHOR113
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L979:
+.L978:
 	adrp	x0, .LANCHOR80
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w1, w0
-	bne	.L980
+	bne	.L979
 	adrp	x1, .LANCHOR113
 	adrp	x0, .LC0
-	mov	w2, 1645
+	mov	w2, 1644
 	add	x1, x1, :lo12:.LANCHOR113
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L980:
+.L979:
 	ldrh	w0, [x19, 6]
-	cbnz	w0, .L981
+	cbnz	w0, .L980
 	adrp	x1, .LANCHOR113
 	adrp	x0, .LC0
-	mov	w2, 1646
+	mov	w2, 1645
 	add	x1, x1, :lo12:.LANCHOR113
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L981:
+.L980:
 	ldrb	w0, [x19, 5]
 	mov	w2, 65535
 	add	x0, x0, 8
 	ldrh	w3, [x19, x0, lsl 1]
 	adrp	x0, .LANCHOR73
 	ldrb	w4, [x0, #:lo12:.LANCHOR73]
-.L982:
+.L981:
 	cmp	w3, w2
 	ldrb	w1, [x19, 5]
-	beq	.L984
+	beq	.L983
 	adrp	x0, .LANCHOR105
 	add	w1, w1, 1
 	and	w1, w1, 255
@@ -5506,29 +5504,29 @@ ftl_get_new_free_page:
 	orr	w0, w0, w2
 	add	w3, w3, 1
 	strh	w3, [x19, 10]
-	bne	.L978
+	bne	.L977
 	add	w2, w2, 1
 	strb	wzr, [x19, 5]
 	strh	w2, [x19, 2]
-.L978:
+.L977:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L984:
+.L983:
 	add	w1, w1, 1
 	and	w1, w1, 255
 	strb	w1, [x19, 5]
 	cmp	w1, w4
-	bne	.L983
+	bne	.L982
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 5]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L983:
+.L982:
 	ldrb	w0, [x19, 5]
 	add	x0, x0, 8
 	ldrh	w3, [x19, x0, lsl 1]
-	b	.L982
+	b	.L981
 	.size	ftl_get_new_free_page, .-ftl_get_new_free_page
 	.section	.text.ftl_ext_alloc_new_blk,"ax",@progbits
 	.align	2
@@ -5544,14 +5542,14 @@ ftl_ext_alloc_new_blk:
 	mov	w19, w0
 	sub	w0, w0, #1
 	cmp	w1, w0, uxth
-	bcs	.L988
+	bcs	.L987
 	adrp	x1, .LANCHOR114
 	adrp	x0, .LC0
-	mov	w2, 1677
+	mov	w2, 1676
 	add	x1, x1, :lo12:.LANCHOR114
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L988:
+.L987:
 	adrp	x20, .LANCHOR97
 	mov	w1, 0
 	mov	w0, w19
@@ -5576,12 +5574,12 @@ ftl_total_vpn_update:
 	mov	x3, x2
 	ldrh	w1, [x2, #:lo12:.LANCHOR115]
 	cmp	w1, 4
-	bhi	.L991
-	cbnz	w0, .L991
+	bhi	.L990
+	cbnz	w0, .L990
 	add	w1, w1, 1
 	strh	w1, [x2, #:lo12:.LANCHOR115]
 	ret
-.L991:
+.L990:
 	adrp	x0, .LANCHOR6
 	strh	wzr, [x3, #:lo12:.LANCHOR115]
 	mov	x1, 0
@@ -5593,9 +5591,9 @@ ftl_total_vpn_update:
 	adrp	x0, .LANCHOR7
 	ldr	x7, [x0, #:lo12:.LANCHOR7]
 	mov	w0, 0
-.L993:
+.L992:
 	cmp	w5, w1, uxth
-	bhi	.L996
+	bhi	.L995
 	adrp	x1, .LANCHOR10
 	ldr	x1, [x1, #:lo12:.LANCHOR10]
 	str	w2, [x1, 524]
@@ -5603,27 +5601,27 @@ ftl_total_vpn_update:
 	str	w0, [x1, 528]
 	ldr	x2, [x2, #:lo12:.LANCHOR97]
 	ldrh	w2, [x2, 120]
-	cbz	w2, .L990
+	cbz	w2, .L989
 	udiv	w0, w0, w2
 	str	w0, [x1, 532]
-.L990:
+.L989:
 	ret
-.L996:
+.L995:
 	ldrh	w3, [x6, x1, lsl 1]
 	cmp	w3, w8
-	beq	.L994
+	beq	.L993
 	add	x4, x7, x1, lsl 2
 	ldrb	w4, [x4, 2]
 	and	w4, w4, 224
 	cmp	w4, 160
-	bne	.L995
+	bne	.L994
 	add	w0, w0, w3
-.L994:
+.L993:
 	add	x1, x1, 1
+	b	.L992
+.L994:
+	add	w2, w2, w3
 	b	.L993
-.L995:
-	add	w2, w2, w3
-	b	.L994
 	.size	ftl_total_vpn_update, .-ftl_total_vpn_update
 	.section	.text.ftl_debug_info_fill,"ax",@progbits
 	.align	2
@@ -5648,17 +5646,17 @@ ftl_vpn_update:
 	ubfiz	x19, x19, 1, 16
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, x19]
-	cbnz	w0, .L1004
+	cbnz	w0, .L1003
 	adrp	x1, .LANCHOR116
 	mov	w0, 1
 	str	w0, [x1, #:lo12:.LANCHOR116]
-.L1002:
+.L1001:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1004:
+.L1003:
 	mov	w0, 0
-	b	.L1002
+	b	.L1001
 	.size	ftl_vpn_update, .-ftl_vpn_update
 	.section	.text.ftl_vpn_decrement,"ax",@progbits
 	.align	2
@@ -5671,34 +5669,34 @@ ftl_vpn_decrement:
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1007
+	beq	.L1006
 	adrp	x0, .LANCHOR9
 	ubfiz	x1, x19, 1, 16
 	ldr	x2, [x0, #:lo12:.LANCHOR9]
 	ldrh	w0, [x2, x1]
-	cbnz	w0, .L1008
+	cbnz	w0, .L1007
 	adrp	x0, .LC59
 	mov	w2, 0
 	mov	w1, w19
 	add	x0, x0, :lo12:.LC59
 	bl	printf
-.L1013:
+.L1012:
 	mov	w0, 0
-	b	.L1006
-.L1008:
+	b	.L1005
+.L1007:
 	sub	w0, w0, #1
 	strh	w0, [x2, x1]
-.L1007:
+.L1006:
 	adrp	x20, .LANCHOR63
 	ldrh	w0, [x20, #:lo12:.LANCHOR63]
 	cmp	w19, w0
-	beq	.L1013
+	beq	.L1012
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L1010
+	bne	.L1009
 	strh	w19, [x20, #:lo12:.LANCHOR63]
-	b	.L1013
-.L1010:
+	b	.L1012
+.L1009:
 	bl	ftl_vpn_update
 	cmp	w0, 0
 	adrp	x1, .LANCHOR117
@@ -5715,7 +5713,7 @@ ftl_vpn_decrement:
 	adrp	x1, .LANCHOR64
 	add	x1, x1, :lo12:.LANCHOR64
 	strh	w3, [x1, x2, lsl 1]
-.L1006:
+.L1005:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -5736,27 +5734,27 @@ lpa_hash_update_ppa:
 	ldr	x8, [x4, #:lo12:.LANCHOR111]
 	adrp	x4, .LANCHOR112
 	ldr	x4, [x4, #:lo12:.LANCHOR112]
-.L1016:
+.L1015:
 	cmp	w6, w12
-	beq	.L1020
+	beq	.L1019
 	uxtw	x11, w6
 	lsl	x10, x11, 2
 	add	x13, x8, x10
 	ldr	w10, [x8, x10]
 	cmp	w0, w10
 	lsl	x10, x11, 1
-	bne	.L1017
+	bne	.L1016
 	mov	w6, -1
 	str	w6, [x13]
 	cmp	w7, w12
-	bne	.L1018
+	bne	.L1017
 	add	x6, x3, :lo12:.LANCHOR110
 	ldrh	w7, [x4, x10]
 	strh	w7, [x6, x5, lsl 1]
-.L1019:
+.L1018:
 	mov	w6, -1
 	strh	w6, [x4, x11, lsl 1]
-.L1020:
+.L1019:
 	uxtw	x6, w2
 	add	x3, x3, :lo12:.LANCHOR110
 	cmn	w1, #1
@@ -5764,7 +5762,7 @@ lpa_hash_update_ppa:
 	ldrh	w0, [x3, x5, lsl 1]
 	strh	w2, [x3, x5, lsl 1]
 	strh	w0, [x4, x6, lsl 1]
-	beq	.L1027
+	beq	.L1026
 	stp	x29, x30, [sp, -16]!
 	adrp	x0, .LANCHOR99
 	add	x29, sp, 0
@@ -5783,15 +5781,15 @@ lpa_hash_update_ppa:
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
-.L1018:
+.L1017:
 	ldrh	w6, [x4, x10]
 	strh	w6, [x4, w7, uxtw 1]
-	b	.L1019
-.L1017:
+	b	.L1018
+.L1016:
 	mov	w7, w6
 	ldrh	w6, [x4, x10]
-	b	.L1016
-.L1027:
+	b	.L1015
+.L1026:
 	mov	w0, -1
 	ret
 	.size	lpa_hash_update_ppa, .-lpa_hash_update_ppa
@@ -5819,17 +5817,17 @@ ftl_mask_bad_block:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	and	w19, w2, 65535
-	tbz	x0, 14, .L1031
+	tbz	x0, 14, .L1030
 	adrp	x0, .LC60
 	mov	w2, w19
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC60
 	bl	printf
-.L1031:
+.L1030:
 	adrp	x0, .LANCHOR6
 	ldrh	w0, [x0, #:lo12:.LANCHOR6]
 	cmp	w0, w19
-	bls	.L1030
+	bls	.L1029
 	adrp	x0, .LANCHOR7
 	mov	w1, 1
 	lsl	w1, w1, w20
@@ -5838,7 +5836,7 @@ ftl_mask_bad_block:
 	ldrb	w0, [x19, 3]
 	orr	w1, w1, w0
 	strb	w1, [x19, 3]
-.L1030:
+.L1029:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -5936,21 +5934,21 @@ ftl_write_buf:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	str	x21, [sp, 32]
-	cbnz	x0, .L1040
+	cbnz	x0, .L1039
 	adrp	x1, .LANCHOR120
 	add	x1, x1, :lo12:.LANCHOR120
-	mov	w2, 661
+	mov	w2, 662
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	bl	print_ftl_debug_info
 	mov	w0, -1
-.L1039:
+.L1038:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1043:
+.L1042:
 	mov	x1, x19
 	adrp	x0, .LANCHOR56
 	add	x0, x0, :lo12:.LANCHOR56
@@ -5968,33 +5966,33 @@ ftl_write_buf:
 	ldr	w2, [x1, 32]
 	add	w2, w2, 1
 	str	w2, [x1, 32]
-	b	.L1039
-.L1040:
+	b	.L1038
+.L1039:
 	mov	x19, x0
 	adrp	x0, .LANCHOR121
 	mov	x20, x0
 	ldrb	w1, [x0, #:lo12:.LANCHOR121]
 	ldrb	w2, [x19, 56]
 	cmp	w2, w1
-	bls	.L1045
+	bls	.L1044
 	adrp	x1, .LANCHOR120
 	adrp	x0, .LC0
-	mov	w2, 666
+	mov	w2, 667
 	add	x1, x1, :lo12:.LANCHOR120
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1045:
+.L1044:
 	ldrb	w0, [x19, 56]
 	adrp	x21, .LANCHOR57
-	cbz	w0, .L1042
+	cbz	w0, .L1041
 	ldrb	w1, [x20, #:lo12:.LANCHOR121]
 	cmp	w1, w0
-	bcs	.L1043
-.L1042:
+	bcs	.L1042
+.L1041:
 	mov	x0, x19
 	bl	buf_free
 	ldrb	w0, [x21, #:lo12:.LANCHOR57]
-	b	.L1039
+	b	.L1038
 	.size	ftl_write_buf, .-ftl_write_buf
 	.section	.text.ftl_write_completed,"ax",@progbits
 	.align	2
@@ -6013,17 +6011,17 @@ ftl_write_completed:
 	add	x22, x22, :lo12:.LANCHOR99
 	stp	x23, x24, [sp, 48]
 	str	x25, [sp, 64]
-.L1051:
+.L1050:
 	ldrb	w0, [x20]
 	cmp	w0, 255
-	bne	.L1057
+	bne	.L1056
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1057:
+.L1056:
 	ubfiz	x21, x0, 6, 8
 	sbfiz	x0, x0, 6, 32
 	add	x23, x19, x0
@@ -6032,7 +6030,7 @@ ftl_write_completed:
 	strb	w0, [x20]
 	ldr	w0, [x23, 52]
 	cmn	w0, #1
-	bne	.L1052
+	bne	.L1051
 	ldp	w2, w3, [x23, 36]
 	mov	w1, 21
 	ldrh	w0, [x22]
@@ -6061,32 +6059,32 @@ ftl_write_completed:
 	str	w1, [x0, 556]
 	ldrh	w1, [x0, 16]
 	cmp	w1, w24
-	bne	.L1053
+	bne	.L1052
 	strh	wzr, [x0, 22]
-.L1054:
+.L1053:
 	mov	x0, x21
 	bl	ftl_write_buf
-	b	.L1051
-.L1053:
+	b	.L1050
+.L1052:
 	ldrh	w1, [x0, 48]
 	cmp	w1, w24
-	bne	.L1054
+	bne	.L1053
 	strh	wzr, [x0, 54]
-	b	.L1054
-.L1052:
+	b	.L1053
+.L1051:
 	ldrh	w2, [x23, 48]
 	ldr	w0, [x23, 36]
 	ldr	w1, [x23, 44]
 	bl	lpa_hash_update_ppa
 	ldrb	w0, [x23, 2]
-	tbz	x0, 2, .L1056
+	tbz	x0, 2, .L1055
 	and	w0, w0, -3
 	strb	w0, [x23, 2]
-	b	.L1051
-.L1056:
+	b	.L1050
+.L1055:
 	mov	x0, x21
 	bl	buf_free
-	b	.L1051
+	b	.L1050
 	.size	ftl_write_completed, .-ftl_write_completed
 	.section	.text.zftl_add_read_buf,"ax",@progbits
 	.align	2
@@ -6096,8 +6094,8 @@ zftl_add_read_buf:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	str	x19, [sp, 16]
-	cbnz	x0, .L1060
-	mov	w2, 948
+	cbnz	x0, .L1059
+	mov	w2, 949
 	adrp	x1, .LANCHOR123
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR123
@@ -6106,20 +6104,20 @@ zftl_add_read_buf:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	print_ftl_debug_info
-.L1060:
+.L1059:
 	ldrb	w1, [x0, 56]
 	mov	x19, x0
 	adrp	x0, .LANCHOR121
 	ldrb	w0, [x0, #:lo12:.LANCHOR121]
 	cmp	w1, w0
-	bls	.L1062
+	bls	.L1061
 	adrp	x1, .LANCHOR123
 	adrp	x0, .LC0
-	mov	w2, 953
+	mov	w2, 954
 	add	x1, x1, :lo12:.LANCHOR123
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1062:
+.L1061:
 	mov	x1, x19
 	adrp	x0, .LANCHOR124
 	add	x0, x0, :lo12:.LANCHOR124
@@ -6152,35 +6150,35 @@ ftl_alloc_sblk:
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1067
+	beq	.L1066
 	adrp	x0, .LANCHOR7
 	lsl	w22, w22, 1
 	ldr	x21, [x0, #:lo12:.LANCHOR7]
 	add	x21, x21, x19, uxth 2
 	ldrb	w0, [x21, 2]
 	tst	w0, 224
-	beq	.L1068
+	beq	.L1067
 	adrp	x1, .LANCHOR126
 	adrp	x0, .LC0
 	mov	w2, 827
 	add	x1, x1, :lo12:.LANCHOR126
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1068:
+.L1067:
 	ldrb	w0, [x21, 2]
 	bfi	w0, w20, 5, 3
 	ubfx	x1, x0, 3, 2
 	orr	w22, w22, w1
 	bfi	w0, w22, 3, 2
 	strb	w0, [x21, 2]
-.L1069:
+.L1068:
 	mov	w0, w19
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1067:
+.L1066:
 	bl	print_ftl_debug_info
 	adrp	x21, .LC67
 	mov	w2, w20
@@ -6203,7 +6201,7 @@ ftl_alloc_sblk:
 	add	x1, x1, :lo12:.LANCHOR126
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L1069
+	b	.L1068
 	.size	ftl_alloc_sblk, .-ftl_alloc_sblk
 	.section	.text.sblk_init,"ax",@progbits
 	.align	2
@@ -6238,7 +6236,7 @@ dump_sblk_queue:
 	bl	printf
 	ldrb	w19, [x19, #:lo12:.LANCHOR53]
 	cmp	w19, 255
-	beq	.L1076
+	beq	.L1075
 	adrp	x1, .LANCHOR49
 	ubfiz	x19, x19, 6, 8
 	add	x1, x1, :lo12:.LANCHOR49
@@ -6246,7 +6244,7 @@ dump_sblk_queue:
 	add	x19, x1, x19
 	add	x21, x21, :lo12:.LC69
 	mov	x20, x1
-.L1078:
+.L1077:
 	ldrb	w2, [x19, 58]
 	mov	x0, x21
 	ldrb	w1, [x19, 1]
@@ -6254,11 +6252,11 @@ dump_sblk_queue:
 	bl	printf
 	ldrb	w19, [x19]
 	cmp	w19, 255
-	beq	.L1076
+	beq	.L1075
 	ubfiz	x19, x19, 6, 8
 	add	x19, x20, x19
-	b	.L1078
-.L1076:
+	b	.L1077
+.L1075:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -6272,15 +6270,15 @@ queue_lun_state:
 	adrp	x2, .LANCHOR53
 	ldrb	w2, [x2, #:lo12:.LANCHOR53]
 	cmp	w2, 255
-	beq	.L1094
+	beq	.L1093
 	adrp	x3, .LANCHOR99
 	adrp	x7, .LANCHOR49
 	add	x7, x7, :lo12:.LANCHOR49
-	adrp	x10, .L1090
+	adrp	x10, .L1089
 	ldrh	w8, [x3, #:lo12:.LANCHOR99]
 	mov	w3, 21
 	ubfx	x11, x0, 21, 3
-	add	x10, x10, :lo12:.L1090
+	add	x10, x10, :lo12:.L1089
 	sub	w4, w3, w8
 	mov	w3, 1
 	mov	x12, x7
@@ -6294,57 +6292,57 @@ queue_lun_state:
 	and	w6, w6, 65535
 	and	w4, w4, w6
 	and	w4, w4, w3
-.L1093:
+.L1092:
 	add	x0, x7, x2, lsl 6
 	ldr	w5, [x0, 40]
 	ubfx	x13, x5, 21, 3
 	cmp	w11, w13
-	bne	.L1088
+	bne	.L1087
 	lsr	w5, w5, w8
 	and	w5, w6, w5
 	and	w5, w3, w5
 	ldrb	w0, [x0, 58]
 	cmp	w4, w5
-	bne	.L1089
+	bne	.L1088
 	cmp	w1, 1
-	bne	.L1086
+	bne	.L1085
 	cmp	w0, 6
 	ccmp	w0, 8, 4, ne
-	beq	.L1088
+	beq	.L1087
 	ret
-.L1089:
+.L1088:
 	cmp	w1, 3
-	bhi	.L1088
+	bhi	.L1087
 	ldrb	w5, [x10,w1,uxtw]
-	adr	x13, .Lrtx1090
+	adr	x13, .Lrtx1089
 	add	x5, x13, w5, sxtb #2
 	br	x5
-.Lrtx1090:
+.Lrtx1089:
 	.section	.rodata.queue_lun_state,"a",@progbits
 	.align	0
 	.align	2
-.L1090:
-	.byte	(.L1086 - .Lrtx1090) / 4
-	.byte	(.L1091 - .Lrtx1090) / 4
-	.byte	(.L1092 - .Lrtx1090) / 4
-	.byte	(.L1086 - .Lrtx1090) / 4
+.L1089:
+	.byte	(.L1085 - .Lrtx1089) / 4
+	.byte	(.L1090 - .Lrtx1089) / 4
+	.byte	(.L1091 - .Lrtx1089) / 4
+	.byte	(.L1085 - .Lrtx1089) / 4
 	.section	.text.queue_lun_state
-.L1091:
+.L1090:
 	cmp	w0, 6
 	ccmp	w0, 8, 4, ne
-	beq	.L1088
+	beq	.L1087
 	ret
-.L1092:
+.L1091:
 	cmp	w0, 10
-	bne	.L1086
-.L1088:
+	bne	.L1085
+.L1087:
 	lsl	x2, x2, 6
 	ldrb	w2, [x12, x2]
 	cmp	w2, 255
-	bne	.L1093
-.L1094:
+	bne	.L1092
+.L1093:
 	mov	w0, 0
-.L1086:
+.L1085:
 	ret
 	.size	queue_lun_state, .-queue_lun_state
 	.section	.text.queue_remove_completed_req,"ax",@progbits
@@ -6368,9 +6366,9 @@ queue_remove_completed_req:
 	add	x10, x4, :lo12:.LANCHOR122
 	mov	w6, 0
 	mov	w15, -1
-.L1097:
+.L1096:
 	cmp	w2, 255
-	beq	.L1098
+	beq	.L1097
 	sbfiz	x8, x2, 6, 32
 	sxtw	x0, w2
 	add	x4, x5, x8
@@ -6378,61 +6376,61 @@ queue_remove_completed_req:
 	sub	w4, w4, #11
 	and	w4, w4, 255
 	cmp	w4, 1
-	bls	.L1099
-	cbz	w6, .L1096
+	bls	.L1098
+	cbz	w6, .L1095
 	strb	w2, [x1, #:lo12:.LANCHOR53]
 	ret
-.L1099:
+.L1098:
 	lsl	x6, x0, 6
 	ldrb	w2, [x5, x8]
 	add	x4, x5, x6
 	strb	w15, [x5, x6]
 	ldrb	w6, [x4, 59]
 	cmp	w6, 1
-	bne	.L1102
+	bne	.L1101
 	ldrh	w4, [x4, 50]
-	cbnz	w4, .L1110
+	cbnz	w4, .L1109
 	mov	w4, w14
 	mov	x6, x10
-.L1103:
+.L1102:
 	cmp	w4, 255
-	bne	.L1108
+	bne	.L1107
 	add	x3, x3, :lo12:.LANCHOR49
 	strb	w2, [x1, #:lo12:.LANCHOR53]
 	add	x0, x3, x0, lsl 6
 	ldrb	w0, [x0, 1]
 	strb	w0, [x6]
 	ret
-.L1102:
-	cbnz	w6, .L1104
+.L1101:
+	cbnz	w6, .L1103
 	ldr	w4, [x4, 36]
 	cmn	w4, #1
-	beq	.L1104
+	beq	.L1103
 	mov	w4, w13
 	mov	x6, x7
-	b	.L1103
-.L1110:
+	b	.L1102
+.L1109:
 	mov	w4, w12
 	mov	x6, x16
-	b	.L1103
-.L1108:
+	b	.L1102
+.L1107:
 	mov	w6, w4
 	sbfiz	x4, x4, 6, 32
 	ldrb	w4, [x11, x4]
 	cmp	w4, 255
-	bne	.L1108
+	bne	.L1107
 	add	x0, x11, x0, lsl 6
 	sbfiz	x6, x6, 6, 32
 	ldrb	w0, [x0, 1]
 	strb	w0, [x11, x6]
-.L1104:
+.L1103:
 	mov	w6, 1
-	b	.L1097
-.L1098:
-	cbz	w6, .L1096
+	b	.L1096
+.L1097:
+	cbz	w6, .L1095
 	mov	w0, -1
 	strb	w0, [x1, #:lo12:.LANCHOR53]
-.L1096:
+.L1095:
 	ret
 	.size	queue_remove_completed_req, .-queue_remove_completed_req
 	.section	.text.pm_alloc_new_blk,"ax",@progbits
@@ -6454,17 +6452,17 @@ pm_alloc_new_blk:
 	and	w0, w0, 65535
 	strh	w0, [x1, 690]
 	cmp	w2, w0
-	bls	.L1121
+	bls	.L1120
 	add	x0, x1, x0, sxtw 1
 	ldrh	w1, [x0, 672]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1122
-.L1121:
+	bne	.L1121
+.L1120:
 	adrp	x19, .LC70
 	add	x19, x19, :lo12:.LC70
 	adrp	x23, .LANCHOR7
-.L1134:
+.L1133:
 	mov	w0, 1
 	bl	ftl_alloc_sblk
 	mov	w1, 0
@@ -6476,7 +6474,7 @@ pm_alloc_new_blk:
 	add	x1, x1, 672
 	bl	ftl_get_blk_list_in_sblk
 	tst	w0, 65535
-	bne	.L1123
+	bne	.L1122
 	mov	w1, w21
 	mov	x0, x19
 	bl	printf
@@ -6485,8 +6483,8 @@ pm_alloc_new_blk:
 	ldrb	w0, [x1, 2]
 	orr	w0, w0, -32
 	strb	w0, [x1, 2]
-	b	.L1134
-.L1123:
+	b	.L1133
+.L1122:
 	ldr	x0, [x14]
 	adrp	x1, .LANCHOR128
 	mov	w2, 1
@@ -6495,29 +6493,29 @@ pm_alloc_new_blk:
 	str	w2, [x1, #:lo12:.LANCHOR128]
 	mov	w1, 65535
 	strh	wzr, [x0, 274]
-.L1125:
+.L1124:
 	ldrh	w2, [x0]
 	cmp	w2, w1
-	beq	.L1124
+	beq	.L1123
 	add	w19, w19, 1
 	add	x0, x0, 2
 	and	w19, w19, 65535
 	cmp	w19, 128
-	bne	.L1125
+	bne	.L1124
 	adrp	x1, .LANCHOR129
 	adrp	x0, .LC0
 	mov	w2, 194
 	add	x1, x1, :lo12:.LANCHOR129
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1124:
+.L1123:
 	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	add	x19, x0, x19, sxtw 1
 	ldrh	w1, [x0, 688]
 	strh	w21, [x19, 416]
 	add	w1, w1, 1
 	strh	w1, [x0, 688]
-.L1122:
+.L1121:
 	ldr	x1, [x20, #:lo12:.LANCHOR97]
 	ldrh	w0, [x1, 690]
 	add	x0, x0, 336
@@ -6525,14 +6523,14 @@ pm_alloc_new_blk:
 	mov	w0, 65533
 	sub	w1, w19, #1
 	cmp	w0, w1, uxth
-	bcs	.L1127
+	bcs	.L1126
 	adrp	x1, .LANCHOR129
 	adrp	x0, .LC0
 	mov	w2, 199
 	add	x1, x1, :lo12:.LANCHOR129
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1127:
+.L1126:
 	adrp	x1, .LANCHOR99
 	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	mov	w2, 21
@@ -6544,7 +6542,7 @@ pm_alloc_new_blk:
 	strh	w4, [x0, 694]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1130
+	tbz	x0, 12, .L1129
 	mov	w0, 1
 	and	w4, w4, 65535
 	lsl	w2, w0, w2
@@ -6554,7 +6552,7 @@ pm_alloc_new_blk:
 	mov	w1, w19
 	add	x0, x0, :lo12:.LC71
 	bl	printf
-.L1130:
+.L1129:
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -6574,62 +6572,62 @@ pm_select_ram_region:
 	add	x29, sp, 0
 	mov	w2, 65535
 	str	x19, [sp, 16]
-.L1139:
+.L1138:
 	lsl	x3, x1, 4
 	and	w19, w1, 65535
 	ldrh	w3, [x3, x0]
 	cmp	w3, w2
-	beq	.L1138
+	beq	.L1137
 	add	x1, x1, 1
 	cmp	x1, 32
-	bne	.L1139
+	bne	.L1138
 	add	x0, x0, 2
 	mov	w19, w1
 	mov	x2, x0
 	mov	w4, 32768
 	mov	w1, 0
-.L1141:
+.L1140:
 	ldrh	w3, [x2]
-	tbnz	x3, 15, .L1140
+	tbnz	x3, 15, .L1139
 	cmp	w3, w4
-	bcs	.L1140
+	bcs	.L1139
 	mov	w4, w3
 	mov	w19, w1
-.L1140:
+.L1139:
 	add	w1, w1, 1
 	add	x2, x2, 16
 	and	w1, w1, 65535
 	cmp	w1, 32
-	bne	.L1141
+	bne	.L1140
 	cmp	w19, 32
-	bne	.L1138
+	bne	.L1137
 	adrp	x1, .LANCHOR131
 	mov	w2, -1
 	ldrb	w3, [x1, #:lo12:.LANCHOR131]
 	mov	w1, 0
-.L1143:
+.L1142:
 	ldrh	w5, [x0]
 	cmp	w5, w2
-	bcs	.L1142
+	bcs	.L1141
 	ldrh	w4, [x0, -2]
 	cmp	w4, w3
 	csel	w2, w2, w5, eq
 	csel	w19, w19, w1, eq
-.L1142:
+.L1141:
 	add	w1, w1, 1
 	add	x0, x0, 16
 	and	w1, w1, 65535
 	cmp	w1, 32
-	bne	.L1143
+	bne	.L1142
 	cmp	w19, 32
-	bne	.L1138
+	bne	.L1137
 	adrp	x1, .LANCHOR132
 	adrp	x0, .LC0
 	mov	w2, 297
 	add	x1, x1, :lo12:.LANCHOR132
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1138:
+.L1137:
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -6652,15 +6650,15 @@ flash_lsb_page_tbl_build:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR3
-	cbnz	w0, .L1150
+	cbnz	w0, .L1149
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1151:
+.L1150:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 256
-	bne	.L1151
-.L1157:
+	bne	.L1150
+.L1156:
 	adrp	x20, .LANCHOR133
 	add	x20, x20, :lo12:.LANCHOR133
 	mov	w2, 1024
@@ -6669,42 +6667,42 @@ flash_lsb_page_tbl_build:
 	add	x19, x19, :lo12:.LANCHOR3
 	bl	ftl_memset
 	mov	x0, 0
-.L1152:
+.L1151:
 	ldrh	w1, [x0, x19]
 	add	x0, x0, 2
 	cmp	x0, 512
 	strh	w1, [x20, w1, sxtw 1]
-	bne	.L1152
+	bne	.L1151
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1150:
+.L1149:
 	cmp	w0, 1
-	bne	.L1153
+	bne	.L1152
 	add	x3, x19, :lo12:.LANCHOR3
 	mov	x1, 0
-.L1156:
+.L1155:
 	and	w0, w1, 65535
 	cmp	x1, 3
-	bls	.L1154
+	bls	.L1153
 	ubfiz	w2, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 2
 	sub	w0, w2, w0
 	and	w0, w0, 65535
-.L1154:
+.L1153:
 	strh	w0, [x3, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L1156
-	b	.L1157
-.L1153:
+	bne	.L1155
+	b	.L1156
+.L1152:
 	cmp	w0, 2
-	bne	.L1158
+	bne	.L1157
 	add	x3, x19, :lo12:.LANCHOR3
 	mov	w1, 65535
 	mov	x0, 0
-.L1160:
+.L1159:
 	cmp	x0, 2
 	and	w2, w0, 65535
 	csel	w2, w2, w1, cc
@@ -6713,31 +6711,31 @@ flash_lsb_page_tbl_build:
 	add	x0, x0, 1
 	and	w1, w1, 65535
 	cmp	x0, 256
-	bne	.L1160
-	b	.L1157
-.L1158:
+	bne	.L1159
+	b	.L1156
+.L1157:
 	cmp	w0, 3
-	bne	.L1161
+	bne	.L1160
 	add	x3, x19, :lo12:.LANCHOR3
 	mov	x1, 0
-.L1164:
+.L1163:
 	and	w0, w1, 65535
 	cmp	x1, 5
-	bls	.L1162
+	bls	.L1161
 	ubfiz	w2, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 4
 	sub	w0, w2, w0
 	and	w0, w0, 65535
-.L1162:
+.L1161:
 	strh	w0, [x3, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L1164
-	b	.L1157
-.L1161:
+	bne	.L1163
+	b	.L1156
+.L1160:
 	cmp	w0, 4
-	bne	.L1165
+	bne	.L1164
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	w2, 1
 	add	x1, x1, 16
@@ -6755,7 +6753,7 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1, -10]
 	strh	w0, [x1, -2]
 	mov	w0, 8
-.L1167:
+.L1166:
 	and	w3, w0, 1
 	ubfiz	w2, w0, 1, 15
 	add	w3, w3, 6
@@ -6764,156 +6762,161 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1], 2
 	and	w0, w0, 65535
 	cmp	w0, 256
-	bne	.L1167
-	b	.L1157
-.L1165:
+	bne	.L1166
+	b	.L1156
+.L1164:
 	cmp	w0, 5
-	bne	.L1168
+	bne	.L1167
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1169:
+.L1168:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 16
-	bne	.L1169
+	bne	.L1168
 	add	x1, x1, 32
-.L1170:
+.L1169:
 	strh	w0, [x1], 2
 	add	w0, w0, 2
 	and	w0, w0, 65535
 	cmp	w0, 496
-	bne	.L1170
-	b	.L1157
-.L1168:
+	bne	.L1169
+	b	.L1156
+.L1167:
 	cmp	w0, 8
-	bne	.L1157
+	bne	.L1156
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1171:
+.L1170:
 	strh	w0, [x0, x1]
 	add	x0, x0, 2
 	cmp	x0, 512
-	bne	.L1171
-	b	.L1157
+	bne	.L1170
+	b	.L1156
 	.size	flash_lsb_page_tbl_build, .-flash_lsb_page_tbl_build
 	.section	.text.flash_die_info_init,"ax",@progbits
 	.align	2
 	.global	flash_die_info_init
 	.type	flash_die_info_init, %function
 flash_die_info_init:
-	stp	x29, x30, [sp, -80]!
+	stp	x29, x30, [sp, -64]!
 	adrp	x0, .LANCHOR14
 	add	x29, sp, 0
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	stp	x25, x26, [sp, 64]
-	tbz	x0, 12, .L1187
+	tbz	x0, 12, .L1186
 	adrp	x1, .LANCHOR134
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR134
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1187:
-	adrp	x23, .LANCHOR34
-	add	x19, x23, :lo12:.LANCHOR34
-	adrp	x25, .LANCHOR2
-	adrp	x26, .LANCHOR18
-	adrp	x22, .LANCHOR29
-	add	x21, x22, :lo12:.LANCHOR29
-	ldrh	w0, [x19, 26]
+.L1186:
+	adrp	x22, .LANCHOR34
+	add	x19, x22, :lo12:.LANCHOR34
+	adrp	x23, .LANCHOR2
+	adrp	x24, .LANCHOR18
+	adrp	x21, .LANCHOR29
 	mov	w2, 8
+	ldrh	w0, [x19, 26]
+	adrp	x20, .LANCHOR136
 	ldrb	w1, [x19, 12]
-	adrp	x24, .LANCHOR136
-	strh	w0, [x25, #:lo12:.LANCHOR2]
-	add	x20, x24, :lo12:.LANCHOR136
+	strh	w0, [x23, #:lo12:.LANCHOR2]
 	ldrh	w0, [x19, 10]
-	add	x19, x19, 1
-	strb	wzr, [x26, #:lo12:.LANCHOR18]
+	strb	wzr, [x24, #:lo12:.LANCHOR18]
 	sdiv	w0, w0, w1
 	adrp	x1, .LANCHOR135
 	strh	w0, [x1, #:lo12:.LANCHOR135]
 	mov	w1, 0
-	mov	x0, x21
+	add	x0, x21, :lo12:.LANCHOR29
 	bl	ftl_memset
+	add	x0, x20, :lo12:.LANCHOR136
 	mov	w2, 32
 	mov	w1, 0
-	mov	x0, x20
 	bl	ftl_memset
-	ldrb	w13, [x23, #:lo12:.LANCHOR34]
-	mov	x7, x23
+	mov	x15, x21
+	mov	x11, x20
+	adrp	x12, .LANCHOR35
 	adrp	x14, .LANCHOR41
-	add	x11, x26, :lo12:.LANCHOR18
-	add	x23, x14, :lo12:.LANCHOR41
-	mov	x8, 0
-.L1189:
-	mov	w2, w13
-	add	x1, x23, x8, lsl 3
-	mov	x0, x19
-	bl	flash_mem_cmp8
-	cbnz	w0, .L1188
-	ldrb	w1, [x11]
-	add	w0, w1, 1
-	strb	w0, [x11]
-	str	wzr, [x20, x1, lsl 2]
-	strb	w8, [x21, x1]
+	mov	x7, x22
+	add	x12, x12, :lo12:.LANCHOR35
+	add	x20, x14, :lo12:.LANCHOR41
+	add	x21, x19, 1
+	mov	x10, 0
 .L1188:
-	add	x8, x8, 1
-	cmp	x8, 4
-	bne	.L1189
+	ldrb	w2, [x19]
+	mov	w0, 2
+	strb	w0, [x10, x12]
+	add	x1, x20, x10, lsl 3
+	mov	x0, x21
+	bl	flash_mem_cmp8
+	cbnz	w0, .L1187
+	ldrb	w2, [x24, #:lo12:.LANCHOR18]
+	add	x1, x11, :lo12:.LANCHOR136
+	add	w0, w2, 1
+	strb	w0, [x24, #:lo12:.LANCHOR18]
+	and	w0, w10, 255
+	str	wzr, [x1, x2, lsl 2]
+	add	x1, x15, :lo12:.LANCHOR29
+	strb	w0, [x1, x2]
+	bl	zftl_flash_enter_slc_mode
+.L1187:
+	add	x10, x10, 1
+	cmp	x10, 4
+	bne	.L1188
 	add	x0, x7, :lo12:.LANCHOR34
 	ldrb	w1, [x0, 8]
 	cmp	w1, 2
-	beq	.L1190
-.L1194:
+	beq	.L1189
+.L1193:
 	add	x7, x7, :lo12:.LANCHOR34
-	ldrb	w0, [x26, #:lo12:.LANCHOR18]
+	ldrb	w0, [x24, #:lo12:.LANCHOR18]
 	ldp	x19, x20, [sp, 16]
 	ldrb	w1, [x7, 13]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	mul	w0, w0, w1
 	ldrh	w1, [x7, 14]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
+	ldp	x29, x30, [sp], 64
 	mul	w0, w0, w1
 	adrp	x1, .LANCHOR137
 	strh	w0, [x1, #:lo12:.LANCHOR137]
 	ret
-.L1190:
-	ldrh	w1, [x25, #:lo12:.LANCHOR2]
+.L1189:
+	ldrh	w1, [x23, #:lo12:.LANCHOR2]
 	add	x14, x14, :lo12:.LANCHOR41
-	ldrb	w11, [x0, 13]
-	add	x8, x0, 1
-	ldrb	w20, [x0, 23]
-	add	x19, x26, :lo12:.LANCHOR18
-	add	x15, x24, :lo12:.LANCHOR136
-	add	x22, x22, :lo12:.LANCHOR29
-	mov	x12, 0
-	mul	w11, w11, w1
+	ldrb	w12, [x0, 13]
+	add	x10, x0, 1
+	ldrb	w20, [x7, #:lo12:.LANCHOR34]
+	add	x19, x24, :lo12:.LANCHOR18
+	ldrb	w21, [x0, 23]
+	add	x11, x11, :lo12:.LANCHOR136
+	add	x15, x15, :lo12:.LANCHOR29
+	mov	x13, 0
+	mul	w12, w12, w1
 	ldrh	w1, [x0, 14]
 	and	w1, w1, 65280
-	mul	w11, w11, w1
-	lsl	w21, w11, 1
-.L1193:
-	mov	w2, w13
-	add	x1, x14, x12, lsl 3
-	mov	x0, x8
+	mul	w12, w12, w1
+	lsl	w22, w12, 1
+.L1192:
+	mov	w2, w20
+	add	x1, x14, x13, lsl 3
+	mov	x0, x10
 	bl	flash_mem_cmp8
-	cbnz	w0, .L1191
+	cbnz	w0, .L1190
 	ldrb	w1, [x19]
-	cmp	w20, 0
-	csel	w2, w11, w21, eq
+	cmp	w21, 0
+	csel	w2, w12, w22, eq
 	add	w0, w1, 1
 	strb	w0, [x19]
-	str	w2, [x15, x1, lsl 2]
-	strb	w12, [x22, x1]
-.L1191:
-	add	x12, x12, 1
-	cmp	x12, 4
-	bne	.L1193
-	b	.L1194
+	str	w2, [x11, x1, lsl 2]
+	strb	w13, [x15, x1]
+.L1190:
+	add	x13, x13, 1
+	cmp	x13, 4
+	bne	.L1192
+	b	.L1193
 	.size	flash_die_info_init, .-flash_die_info_init
 	.section	.text.lpa_hash_init,"ax",@progbits
 	.align	2
@@ -6950,7 +6953,7 @@ lpa_rebuild_hash:
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	tbz	x0, 12, .L1207
+	tbz	x0, 12, .L1206
 	adrp	x1, .LANCHOR138
 	adrp	x0, .LC72
 	mov	w3, 0
@@ -6958,7 +6961,7 @@ lpa_rebuild_hash:
 	add	x1, x1, :lo12:.LANCHOR138
 	add	x0, x0, :lo12:.LC72
 	bl	printf
-.L1207:
+.L1206:
 	adrp	x20, .LANCHOR80
 	adrp	x22, .LANCHOR73
 	adrp	x19, .LANCHOR110
@@ -6981,28 +6984,28 @@ lpa_rebuild_hash:
 	ldr	x5, [x21, #:lo12:.LANCHOR112]
 	mov	w1, 0
 	ldr	x4, [x0, #:lo12:.LANCHOR111]
-.L1208:
+.L1207:
 	ldrh	w0, [x20]
 	mul	w0, w0, w3
 	cmp	w1, w0, lsl 1
-	blt	.L1210
+	blt	.L1209
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1210:
+.L1209:
 	uxtw	x2, w1
 	ldr	w0, [x4, x2, lsl 2]
 	cmn	w0, #1
-	beq	.L1209
+	beq	.L1208
 	and	x0, x0, 255
 	ldrh	w6, [x19, x0, lsl 1]
 	strh	w1, [x19, x0, lsl 1]
 	strh	w6, [x5, x2, lsl 1]
-.L1209:
+.L1208:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L1208
+	b	.L1207
 	.size	lpa_rebuild_hash, .-lpa_rebuild_hash
 	.section	.text.zftl_read_flash_info,"ax",@progbits
 	.align	2
@@ -7054,20 +7057,20 @@ zftl_read_flash_info:
 	strb	w0, [x19, 9]
 	adrp	x0, .LANCHOR18
 	ldrb	w3, [x0, #:lo12:.LANCHOR18]
-.L1219:
+.L1218:
 	cmp	w3, w1, uxtb
-	bhi	.L1220
+	bhi	.L1219
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1220:
+.L1219:
 	ldrb	w0, [x1, x2]
 	add	x1, x1, 1
 	ldrb	w5, [x19, 10]
 	lsl	w0, w4, w0
 	orr	w0, w0, w5
 	strb	w0, [x19, 10]
-	b	.L1219
+	b	.L1218
 	.size	zftl_read_flash_info, .-zftl_read_flash_info
 	.section	.text.gc_static_wearleveling,"ax",@progbits
 	.align	2
@@ -7086,9 +7089,9 @@ gc_static_wearleveling:
 	ldr	w1, [x0, 32]
 	mov	w0, 10240
 	cmp	w1, w0
-	bls	.L1223
+	bls	.L1222
 	bl	ftl_tmp_into_update
-.L1223:
+.L1222:
 	adrp	x19, .LANCHOR10
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldr	w1, [x0, 568]
@@ -7096,14 +7099,14 @@ gc_static_wearleveling:
 	add	w1, w1, 860160
 	add	w1, w1, 3840
 	cmp	w2, w1
-	bhi	.L1224
+	bhi	.L1223
 	ldr	x3, [x25, #:lo12:.LANCHOR97]
 	ldr	w1, [x0, 572]
 	add	w1, w1, 32
 	ldr	w3, [x3, 36]
 	cmp	w3, w1
-	bls	.L1273
-.L1224:
+	bls	.L1272
+.L1223:
 	ldr	x1, [x25, #:lo12:.LANCHOR97]
 	mov	w20, 65535
 	adrp	x8, .LANCHOR14
@@ -7123,10 +7126,10 @@ gc_static_wearleveling:
 	str	wzr, [x29, 136]
 	stp	wzr, wzr, [x29, 148]
 	str	wzr, [x29, 156]
-.L1226:
+.L1225:
 	ldrh	w0, [x10]
 	cmp	w0, w24
-	bhi	.L1235
+	bhi	.L1234
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w2, 128
 	mov	w1, 255
@@ -7141,7 +7144,7 @@ gc_static_wearleveling:
 	mov	x1, x5
 	lsl	x0, x5, 2
 	add	x26, x2, x0
-	tbz	x3, 10, .L1236
+	tbz	x3, 10, .L1235
 	adrp	x3, .LANCHOR9
 	ldrb	w4, [x26, 2]
 	ldr	x6, [x3, #:lo12:.LANCHOR9]
@@ -7156,13 +7159,13 @@ gc_static_wearleveling:
 	and	w2, w2, 2047
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1236:
+.L1235:
 	ldrb	w0, [x26, 2]
-	tbz	x0, 3, .L1237
+	tbz	x0, 3, .L1236
 	ldrb	w0, [x26, 2]
 	and	w1, w0, 192
 	cmp	w1, 64
-	bne	.L1238
+	bne	.L1237
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w1, 0
 	mov	w2, 1
@@ -7171,7 +7174,7 @@ gc_static_wearleveling:
 	adrp	x0, .LANCHOR62+318
 	mov	w1, 1
 	strh	w1, [x0, #:lo12:.LANCHOR62+318]
-.L1237:
+.L1236:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldr	w3, [x24, #:lo12:.LANCHOR14]
 	ldr	x2, [x23, #:lo12:.LANCHOR7]
@@ -7179,7 +7182,7 @@ gc_static_wearleveling:
 	mov	x1, x5
 	lsl	x0, x5, 2
 	add	x26, x2, x0
-	tbz	x3, 10, .L1239
+	tbz	x3, 10, .L1238
 	adrp	x3, .LANCHOR9
 	ldrb	w4, [x26, 2]
 	ldr	x6, [x3, #:lo12:.LANCHOR9]
@@ -7194,13 +7197,13 @@ gc_static_wearleveling:
 	and	w2, w2, 2047
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1239:
+.L1238:
 	ldrb	w0, [x26, 2]
-	tbz	x0, 3, .L1240
+	tbz	x0, 3, .L1239
 	ldrb	w0, [x26, 2]
 	and	w1, w0, 192
 	cmp	w1, 64
-	bne	.L1241
+	bne	.L1240
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w1, 0
 	mov	w2, 1
@@ -7209,9 +7212,9 @@ gc_static_wearleveling:
 	adrp	x0, .LANCHOR62+318
 	mov	w1, 1
 	strh	w1, [x0, #:lo12:.LANCHOR62+318]
-.L1240:
+.L1239:
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1242
+	tbz	x0, 10, .L1241
 	ldr	w6, [x29, 128]
 	adrp	x2, .LANCHOR9
 	ldr	x1, [x23, #:lo12:.LANCHOR7]
@@ -7231,9 +7234,9 @@ gc_static_wearleveling:
 	ubfx	x5, x4, 5, 3
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1242:
+.L1241:
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1243
+	tbz	x0, 10, .L1242
 	ldr	w6, [x29, 136]
 	adrp	x2, .LANCHOR9
 	ldr	x1, [x23, #:lo12:.LANCHOR7]
@@ -7253,7 +7256,7 @@ gc_static_wearleveling:
 	ubfx	x5, x4, 5, 3
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1243:
+.L1242:
 	ldr	x0, [x25, #:lo12:.LANCHOR97]
 	ldrh	w1, [x29, 156]
 	strh	w1, [x0, 96]
@@ -7267,7 +7270,7 @@ gc_static_wearleveling:
 	strh	w3, [x0, 88]
 	strh	w4, [x0, 90]
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1244
+	tbz	x0, 10, .L1243
 	adrp	x0, .LC78
 	and	w4, w4, 65535
 	and	w3, w3, 65535
@@ -7275,9 +7278,9 @@ gc_static_wearleveling:
 	mov	w1, w27
 	add	x0, x0, :lo12:.LC78
 	bl	printf
-.L1244:
+.L1243:
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1245
+	tbz	x0, 10, .L1244
 	adrp	x0, .LANCHOR139
 	ldr	w3, [x29, 156]
 	mov	w4, w22
@@ -7289,21 +7292,21 @@ gc_static_wearleveling:
 	adrp	x0, .LC79
 	add	x0, x0, :lo12:.LC79
 	bl	printf
-.L1245:
+.L1244:
 	sub	w0, w22, w21
 	str	w0, [x29, 148]
 	adrp	x0, .LANCHOR139
 	ldr	w1, [x29, 148]
 	ldrh	w0, [x0, #:lo12:.LANCHOR139]
 	cmp	w1, w0
-	bgt	.L1246
+	bgt	.L1245
 	adrp	x1, .LANCHOR140
 	ldr	w0, [x29, 156]
 	ldrh	w1, [x1, #:lo12:.LANCHOR140]
 	sub	w0, w0, w20
 	cmp	w0, w1
-	ble	.L1274
-.L1246:
+	ble	.L1273
+.L1245:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	adrp	x28, .LANCHOR62
 	add	x28, x28, :lo12:.LANCHOR62
@@ -7319,61 +7322,61 @@ gc_static_wearleveling:
 	adrp	x0, .LANCHOR140
 	add	x0, x0, :lo12:.LANCHOR140
 	str	x0, [x29, 128]
-.L1248:
+.L1247:
 	ldr	x0, [x29, 136]
 	ldr	w1, [x29, 152]
 	ldrh	w0, [x0]
 	cmp	w1, w0
-	bcc	.L1258
-.L1257:
+	bcc	.L1257
+.L1256:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	str	w26, [x0, 580]
-.L1247:
-	cbz	w21, .L1260
+.L1246:
+	cbz	w21, .L1259
 	ldr	x2, [x25, #:lo12:.LANCHOR97]
 	adrp	x0, .LANCHOR6
 	ldrh	w5, [x0, #:lo12:.LANCHOR6]
 	ldr	x0, [x23, #:lo12:.LANCHOR7]
 	ldrh	w1, [x2, 134]
 	add	x0, x0, x1, uxth 2
-.L1261:
+.L1260:
 	cmp	w1, w5
-	bcc	.L1263
+	bcc	.L1262
 	ldrh	w0, [x2, 72]
 	add	w0, w21, w0
 	strh	w0, [x2, 72]
 	ldrh	w0, [x2, 98]
 	cmp	w21, w0
-	bcs	.L1260
+	bcs	.L1259
 	sub	w21, w0, w21
 	strh	w21, [x2, 98]
-.L1260:
-	cbz	w20, .L1266
+.L1259:
+	cbz	w20, .L1265
 	ldr	x2, [x25, #:lo12:.LANCHOR97]
 	adrp	x0, .LANCHOR6
 	ldrh	w6, [x0, #:lo12:.LANCHOR6]
 	ldr	x0, [x23, #:lo12:.LANCHOR7]
 	ldrh	w1, [x2, 134]
 	add	x0, x0, x1, uxth 2
-.L1267:
+.L1266:
 	cmp	w1, w6
-	bcc	.L1269
+	bcc	.L1268
 	ldrh	w0, [x2, 74]
 	add	w0, w20, w0
 	strh	w0, [x2, 74]
 	ldrh	w0, [x2, 96]
 	cmp	w20, w0
-	bcs	.L1266
+	bcs	.L1265
 	sub	w20, w0, w20
 	strh	w20, [x2, 96]
-.L1266:
+.L1265:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L1225
+	beq	.L1224
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
@@ -7381,12 +7384,12 @@ gc_static_wearleveling:
 	adrp	x1, .LANCHOR80
 	ldrh	w1, [x1, #:lo12:.LANCHOR80]
 	cmp	w2, w1
-	bhi	.L1225
+	bhi	.L1224
 	add	w22, w22, 1
 	mov	w2, 1
 	mov	w1, 0
 	bl	gc_add_sblk
-.L1225:
+.L1224:
 	add	w0, w22, w27
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -7395,7 +7398,7 @@ gc_static_wearleveling:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L1235:
+.L1234:
 	uxtw	x7, w24
 	ldr	x6, [x23, #:lo12:.LANCHOR7]
 	lsl	x2, x7, 2
@@ -7403,40 +7406,40 @@ gc_static_wearleveling:
 	ldrb	w0, [x11, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L1227
+	beq	.L1226
 	ubfx	x4, x0, 3, 2
-	tbz	x4, 0, .L1228
+	tbz	x4, 0, .L1227
 	ldr	w0, [x6, x2]
 	ldrh	w1, [x6, x2]
 	ubfx	x0, x0, 11, 8
 	and	w1, w1, 2047
-.L1229:
+.L1228:
 	ldr	w3, [x29, 148]
 	add	w27, w27, 1
 	and	w27, w27, 65535
 	cmp	w20, w1
 	add	w3, w3, w1
 	str	w3, [x29, 148]
-	bls	.L1272
+	bls	.L1271
 	ldr	x3, [x19, #:lo12:.LANCHOR10]
 	mov	w20, w1
 	strh	w24, [x3, 586]
-.L1272:
+.L1271:
 	ldr	w3, [x29, 156]
 	cmp	w3, w1
-	bcs	.L1232
+	bcs	.L1231
 	str	w24, [x29, 128]
 	str	w1, [x29, 156]
-.L1232:
+.L1231:
 	mov	w3, 65535
 	cmp	w0, w3
-	bne	.L1231
-.L1233:
+	bne	.L1230
+.L1232:
 	cmp	w0, 9
 	ccmp	w1, 9, 0, hi
-	bhi	.L1227
+	bhi	.L1226
 	ldr	w0, [x8]
-	tbz	x0, 8, .L1227
+	tbz	x0, 8, .L1226
 	adrp	x0, .LANCHOR9
 	ldr	w3, [x6, x2]
 	ldrh	w2, [x6, x2]
@@ -7453,71 +7456,77 @@ gc_static_wearleveling:
 	add	x0, x0, :lo12:.LC73
 	bl	printf
 	ldp	x8, x10, [x29, 112]
-.L1227:
+.L1226:
 	add	w24, w24, 1
 	and	w24, w24, 65535
-	b	.L1226
-.L1228:
+	b	.L1225
+.L1227:
 	tst	w0, 24
-	bne	.L1230
+	bne	.L1229
 	ldrh	w1, [x6, x2]
 	mov	w0, 65535
 	and	w1, w1, 2047
-	b	.L1229
-.L1230:
+	b	.L1228
+.L1229:
 	ldr	w0, [x6, x2]
 	mov	w1, 65535
 	ubfx	x0, x0, 11, 8
-.L1231:
+.L1230:
 	ldr	w3, [x29, 152]
 	add	w28, w28, 1
 	and	w28, w28, 65535
 	cmp	w21, w0
 	add	w3, w3, w0
 	str	w3, [x29, 152]
-	bls	.L1234
+	bls	.L1233
 	ldr	x3, [x19, #:lo12:.LANCHOR10]
 	mov	w21, w0
 	strh	w24, [x3, 584]
-.L1234:
+.L1233:
 	cmp	w22, w0
-	bcs	.L1233
+	bcs	.L1232
 	mov	w22, w0
 	str	w24, [x29, 136]
-	b	.L1233
-.L1238:
+	b	.L1232
+.L1237:
 	tst	w0, 224
-	bne	.L1237
-	ldr	x0, [x19, #:lo12:.LANCHOR10]
-	mov	w1, 65535
-	ldrh	w2, [x0, 590]
-	cmp	w2, w1
-	bne	.L1237
-	ldrh	w0, [x0, 586]
-	bl	zftl_remove_free_node
+	bne	.L1236
+	ldr	x1, [x19, #:lo12:.LANCHOR10]
+	mov	w0, 65535
+	ldrh	w2, [x1, 590]
+	cmp	w2, w0
+	bne	.L1236
+	ldrh	w0, [x1, 586]
+	ldrh	w1, [x1, 588]
+	cmp	w1, w0
+	beq	.L1236
+	bl	zftl_remove_free_node
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldrh	w1, [x0, 586]
 	strh	w1, [x0, 590]
 	mov	w1, -1
 	strh	w1, [x0, 586]
-	b	.L1237
-.L1241:
+	b	.L1236
+.L1240:
 	tst	w0, 224
-	bne	.L1240
-	ldr	x0, [x19, #:lo12:.LANCHOR10]
-	mov	w1, 65535
-	ldrh	w2, [x0, 588]
-	cmp	w2, w1
-	bne	.L1240
-	ldrh	w0, [x0, 584]
+	bne	.L1239
+	ldr	x1, [x19, #:lo12:.LANCHOR10]
+	mov	w0, 65535
+	ldrh	w2, [x1, 588]
+	cmp	w2, w0
+	bne	.L1239
+	ldrh	w0, [x1, 584]
+	ldrh	w1, [x1, 590]
+	cmp	w1, w0
+	beq	.L1239
 	bl	zftl_remove_free_node
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldrh	w1, [x0, 584]
 	strh	w1, [x0, 588]
 	mov	w1, -1
 	strh	w1, [x0, 584]
-	b	.L1240
-.L1258:
+	b	.L1239
+.L1257:
 	add	w7, w26, 1
 	ldr	x4, [x23, #:lo12:.LANCHOR7]
 	and	w26, w7, 65535
@@ -7528,31 +7537,31 @@ gc_static_wearleveling:
 	add	x0, x4, x3
 	ldrb	w0, [x0, 2]
 	tst	w0, 192
-	beq	.L1250
+	beq	.L1249
 	and	w2, w0, 224
 	cmp	w2, 224
-	beq	.L1250
+	beq	.L1249
 	ubfx	x0, x0, 3, 2
 	and	w1, w0, 1
-	tbz	x0, 0, .L1251
+	tbz	x0, 0, .L1250
 	cmp	w2, 160
-.L1338:
-	bne	.L1253
+.L1337:
+	bne	.L1252
 	adrp	x0, .LANCHOR139
 	ldr	w2, [x29, 148]
 	ldrh	w0, [x0, #:lo12:.LANCHOR139]
 	cmp	w2, w0
-	ble	.L1254
+	ble	.L1253
 	ldr	w0, [x4, x3]
 	ubfx	x0, x0, 11, 8
 	cmp	w0, w21
-	bls	.L1255
-	cbz	w1, .L1254
+	bls	.L1254
+	cbz	w1, .L1253
 	ldrh	w0, [x4, x3]
 	and	w0, w0, 2047
 	cmp	w0, w20
-	bgt	.L1254
-.L1255:
+	bgt	.L1253
+.L1254:
 	stp	x4, x8, [x29, 104]
 	mov	w2, 1
 	str	x3, [x29, 120]
@@ -7565,7 +7574,7 @@ gc_static_wearleveling:
 	add	w22, w22, 1
 	ldp	x4, x8, [x29, 104]
 	ldr	x3, [x29, 120]
-	tbz	x0, 10, .L1254
+	tbz	x0, 10, .L1253
 	adrp	x0, .LANCHOR9
 	ldr	w6, [x4, x3]
 	ldrh	w5, [x4, x3]
@@ -7581,40 +7590,40 @@ gc_static_wearleveling:
 	ldrh	w3, [x1, x8, lsl 1]
 	mov	w1, w26
 	ubfx	x2, x2, 5, 3
-.L1339:
+.L1338:
 	bl	printf
-.L1254:
+.L1253:
 	cmp	w22, 4
 	ccmp	w27, 4, 2, ls
-	bhi	.L1257
-.L1250:
+	bhi	.L1256
+.L1249:
 	ldr	w0, [x29, 152]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	str	w0, [x29, 152]
-	b	.L1248
-.L1251:
+	b	.L1247
+.L1250:
 	cmp	w0, 2
-	b	.L1338
-.L1253:
+	b	.L1337
+.L1252:
 	ldr	x2, [x29, 128]
 	ldr	w0, [x29, 156]
 	sub	w0, w0, w20
 	ldrh	w2, [x2]
 	cmp	w0, w2
-	ble	.L1254
+	ble	.L1253
 	ldrh	w0, [x4, x3]
 	add	w2, w20, 8
 	and	w0, w0, 2047
 	cmp	w0, w2
-	ble	.L1256
-	cbz	w1, .L1254
+	ble	.L1255
+	cbz	w1, .L1253
 	ldr	w0, [x4, x3]
 	add	w1, w21, 4
 	ubfx	x0, x0, 11, 8
 	cmp	w0, w1
-	bgt	.L1254
-.L1256:
+	bgt	.L1253
+.L1255:
 	stp	x4, x8, [x29, 104]
 	mov	w2, 1
 	str	x3, [x29, 120]
@@ -7627,7 +7636,7 @@ gc_static_wearleveling:
 	add	w27, w27, 1
 	ldp	x4, x8, [x29, 104]
 	ldr	x3, [x29, 120]
-	tbz	x0, 10, .L1254
+	tbz	x0, 10, .L1253
 	adrp	x0, .LANCHOR9
 	ldr	w6, [x4, x3]
 	ldrh	w5, [x4, x3]
@@ -7643,48 +7652,48 @@ gc_static_wearleveling:
 	ldrh	w3, [x1, x8, lsl 1]
 	mov	w1, w26
 	ubfx	x2, x2, 5, 3
-	b	.L1339
-.L1274:
+	b	.L1338
+.L1273:
 	mov	w27, 0
 	mov	w22, 0
-	b	.L1247
-.L1263:
+	b	.L1246
+.L1262:
 	ldr	w3, [x0]
 	ubfx	x4, x3, 11, 8
 	cmp	w21, w4
-	bhi	.L1262
+	bhi	.L1261
 	ldrb	w6, [x0, 2]
 	tst	w6, 24
-	beq	.L1262
+	beq	.L1261
 	sub	w4, w4, w21
 	bfi	w3, w4, 11, 8
 	str	w3, [x0]
-.L1262:
+.L1261:
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 65535
-	b	.L1261
-.L1269:
+	b	.L1260
+.L1268:
 	ldrh	w3, [x0]
 	and	w4, w3, 2047
 	cmp	w4, w20
-	blt	.L1268
+	blt	.L1267
 	ldrb	w5, [x0, 2]
 	and	w5, w5, 24
 	cmp	w5, 16
-	beq	.L1268
+	beq	.L1267
 	sub	w4, w4, w20
 	bfi	w3, w4, 0, 11
 	strh	w3, [x0]
-.L1268:
+.L1267:
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 65535
-	b	.L1267
-.L1273:
+	b	.L1266
+.L1272:
 	mov	w27, 0
 	mov	w22, 0
-	b	.L1225
+	b	.L1224
 	.size	gc_static_wearleveling, .-gc_static_wearleveling
 	.section	.text.zftl_sblk_list_init,"ax",@progbits
 	.align	2
@@ -7756,11 +7765,11 @@ zftl_sblk_list_init:
 	stp	x6, x7, [x29, 136]
 	stp	x8, x10, [x29, 152]
 	str	x0, [x29, 176]
-.L1341:
+.L1340:
 	ldr	x0, [x29, 176]
 	ldrh	w0, [x0]
 	cmp	w26, w0
-	blt	.L1357
+	blt	.L1356
 	ldr	x0, [x25, #:lo12:.LANCHOR97]
 	ldrh	w1, [x24, #:lo12:.LANCHOR90]
 	ldp	x25, x26, [sp, 64]
@@ -7781,12 +7790,12 @@ zftl_sblk_list_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L1357:
+.L1356:
 	ldr	x4, [x28, #:lo12:.LANCHOR7]
 	sxtw	x2, w26
 	add	x4, x4, x2, lsl 2
 	ldrb	w6, [x4, 3]
-	cbz	w6, .L1358
+	cbz	w6, .L1357
 	ldr	x0, [x29, 112]
 	mov	w1, 0
 	ldr	x7, [x25, #:lo12:.LANCHOR97]
@@ -7794,15 +7803,15 @@ zftl_sblk_list_init:
 	ldr	x0, [x29, 104]
 	ldrh	w10, [x0, #:lo12:.LANCHOR72]
 	mov	w0, 0
-.L1343:
+.L1342:
 	cmp	w1, w8
-	blt	.L1346
-	cbz	w0, .L1347
+	blt	.L1345
+	cbz	w0, .L1346
 	mov	w1, 32768
 	sdiv	w0, w1, w0
 	add	w0, w0, 1
 	sxth	w0, w0
-.L1342:
+.L1341:
 	ldr	x3, [x29, 168]
 	mov	w1, 6
 	smull	x1, w26, w1
@@ -7817,44 +7826,44 @@ zftl_sblk_list_init:
 	and	w0, w1, 224
 	cmp	w0, 32
 	ccmp	w0, w5, 4, ne
-	beq	.L1348
+	beq	.L1347
 	adrp	x5, .LANCHOR10
 	ldr	x5, [x5, #:lo12:.LANCHOR10]
 	ldrh	w6, [x5, 16]
 	cmp	w26, w6
-	beq	.L1348
+	beq	.L1347
 	ldrh	w6, [x5, 48]
 	cmp	w26, w6
-	beq	.L1348
+	beq	.L1347
 	ldrh	w5, [x5, 80]
 	cmp	w26, w5
-	beq	.L1348
+	beq	.L1347
 	cmp	w0, 64
-	bne	.L1349
+	bne	.L1348
 	ldr	x0, [x29, 128]
 	add	x2, x21, :lo12:.LANCHOR85
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR12
-.L1361:
+.L1360:
 	bl	_insert_data_list
-.L1348:
+.L1347:
 	add	w3, w26, 1
 	sxth	w26, w3
-	b	.L1341
-.L1346:
+	b	.L1340
+.L1345:
 	asr	w5, w6, w1
-	tbnz	x5, 0, .L1344
+	tbnz	x5, 0, .L1343
 	add	w0, w10, w0
 	sxth	w0, w0
-.L1345:
-	add	w1, w1, 1
-	b	.L1343
 .L1344:
+	add	w1, w1, 1
+	b	.L1342
+.L1343:
 	ldrh	w5, [x7, 146]
 	add	w5, w5, 1
 	strh	w5, [x7, 146]
-	b	.L1345
-.L1347:
+	b	.L1344
+.L1346:
 	ldrb	w1, [x4, 2]
 	mov	w5, -1
 	orr	w1, w1, -32
@@ -7862,75 +7871,75 @@ zftl_sblk_list_init:
 	adrp	x1, .LANCHOR9
 	ldr	x1, [x1, #:lo12:.LANCHOR9]
 	strh	w5, [x1, x2, lsl 1]
-	b	.L1342
-.L1358:
+	b	.L1341
+.L1357:
 	ldr	w0, [x29, 188]
-	b	.L1342
-.L1349:
+	b	.L1341
+.L1348:
 	cmp	w0, 96
-	bne	.L1350
+	bne	.L1349
 	ldr	x0, [x29, 136]
 	add	x2, x19, :lo12:.LANCHOR83
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR76
-	b	.L1361
-.L1350:
+	b	.L1360
+.L1349:
 	cmp	w0, 160
-	bne	.L1351
+	bne	.L1350
 	ldr	x0, [x29, 120]
 	add	x2, x20, :lo12:.LANCHOR87
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR75
-	b	.L1361
-.L1351:
-	cbnz	w0, .L1348
+	b	.L1360
+.L1350:
+	cbnz	w0, .L1347
 	adrp	x0, .LANCHOR9
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w2, [x0, x2, lsl 1]
-	cbz	w2, .L1352
+	cbz	w2, .L1351
 	str	x4, [x29, 96]
 	mov	w1, w26
 	mov	x0, x27
 	bl	printf
 	ldr	x4, [x29, 96]
 	ldrb	w0, [x4, 2]
-	tbz	x0, 4, .L1353
+	tbz	x0, 4, .L1352
 	mov	w1, 5
-.L1360:
+.L1359:
 	bfi	w0, w1, 5, 3
 	strb	w0, [x4, 2]
 	mov	w2, 0
 	mov	w1, 1
 	mov	w0, w26
 	bl	gc_add_sblk
-	b	.L1348
-.L1353:
-	mov	w1, 2
-	b	.L1360
+	b	.L1347
 .L1352:
+	mov	w1, 2
+	b	.L1359
+.L1351:
 	ands	w1, w1, 24
-	bne	.L1355
+	bne	.L1354
 	ldr	x0, [x29, 160]
 	add	x2, x24, :lo12:.LANCHOR90
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR91
-.L1362:
+.L1361:
 	bl	_insert_free_list
-	b	.L1348
-.L1355:
+	b	.L1347
+.L1354:
 	cmp	w1, 16
-	bne	.L1356
+	bne	.L1355
 	ldr	x0, [x29, 152]
 	add	x2, x23, :lo12:.LANCHOR92
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR93
-	b	.L1362
-.L1356:
+	b	.L1361
+.L1355:
 	ldr	x0, [x29, 144]
 	add	x2, x22, :lo12:.LANCHOR94
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR95
-	b	.L1362
+	b	.L1361
 	.size	zftl_sblk_list_init, .-zftl_sblk_list_init
 	.section	.text.ftl_open_sblk_init,"ax",@progbits
 	.align	2
@@ -7951,8 +7960,8 @@ ftl_open_sblk_init:
 	add	x20, x20, :lo12:.LANCHOR73
 	add	x21, x21, :lo12:.LC70
 	stp	x25, x26, [sp, 64]
-.L1364:
-.L1367:
+.L1363:
+.L1366:
 	mov	w0, w22
 	bl	ftl_alloc_sblk
 	mov	w1, 0
@@ -7972,11 +7981,11 @@ ftl_open_sblk_init:
 	strh	w0, [x19, 6]
 	strh	wzr, [x19, 10]
 	strb	w22, [x19, 4]
-	beq	.L1368
+	beq	.L1367
 	ldrb	w0, [x20]
 	mul	w0, w1, w0
 	and	w0, w0, 65535
-.L1365:
+.L1364:
 	ldrb	w2, [x20]
 	adrp	x26, .LANCHOR9
 	strh	w0, [x19, 12]
@@ -7992,7 +8001,7 @@ ftl_open_sblk_init:
 	ldrh	w1, [x19, 6]
 	strh	w1, [x0, x25]
 	ldrb	w0, [x19, 9]
-	cbnz	w0, .L1363
+	cbnz	w0, .L1362
 	mov	w1, w24
 	mov	x0, x21
 	bl	printf
@@ -8001,11 +8010,11 @@ ftl_open_sblk_init:
 	strh	w1, [x0, x25]
 	mov	w0, 7
 	strb	w0, [x19, 4]
-	b	.L1367
-.L1368:
+	b	.L1366
+.L1367:
 	mov	w0, 0
-	b	.L1365
-.L1363:
+	b	.L1364
+.L1362:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -8028,14 +8037,14 @@ pm_free_sblk:
 	stp	x25, x26, [sp, 64]
 	cmp	w0, 128
 	stp	x27, x28, [sp, 80]
-	bls	.L1371
+	bls	.L1370
 	adrp	x1, .LANCHOR142
 	adrp	x0, .LC0
 	mov	w2, 78
 	add	x1, x1, :lo12:.LANCHOR142
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1371:
+.L1370:
 	add	x28, x29, 112
 	mov	w2, 256
 	mov	w1, 0
@@ -8057,9 +8066,9 @@ pm_free_sblk:
 	sub	w2, w2, #1
 	add	x1, x1, 176
 	add	x1, x7, x1, lsl 2
-.L1372:
+.L1371:
 	cmp	x4, x1
-	bne	.L1376
+	bne	.L1375
 	adrp	x24, .LANCHOR73
 	adrp	x25, .LANCHOR80
 	adrp	x26, .LANCHOR14
@@ -8073,10 +8082,10 @@ pm_free_sblk:
 	str	wzr, [x29, 108]
 	mul	w22, w22, w0
 	and	w22, w22, 65535
-.L1377:
+.L1376:
 	ldrh	w0, [x20]
 	cmp	w0, w19
-	bhi	.L1383
+	bhi	.L1382
 	ldr	w0, [x29, 108]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -8085,7 +8094,7 @@ pm_free_sblk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 368
 	ret
-.L1376:
+.L1375:
 	ldr	w0, [x4]
 	add	x8, x7, 416
 	mov	x3, 0
@@ -8093,23 +8102,23 @@ pm_free_sblk:
 	and	w0, w0, w2
 	udiv	w0, w0, w12
 	and	w0, w0, 65535
-.L1373:
+.L1372:
 	cmp	w13, w3, uxth
-	bhi	.L1375
+	bhi	.L1374
 	add	x4, x4, 4
-	b	.L1372
-.L1375:
+	b	.L1371
+.L1374:
 	ldrh	w10, [x8]
 	cmp	w10, w0
-	bne	.L1374
+	bne	.L1373
 	ldrh	w10, [x28, x3, lsl 1]
 	add	w10, w10, 1
 	strh	w10, [x28, x3, lsl 1]
-.L1374:
+.L1373:
 	add	x3, x3, 1
 	add	x8, x8, 2
-	b	.L1373
-.L1383:
+	b	.L1372
+.L1382:
 	ldr	x1, [x5, #:lo12:.LANCHOR97]
 	sxtw	x21, w19
 	add	x0, x21, 208
@@ -8118,22 +8127,22 @@ pm_free_sblk:
 	ldrh	w0, [x1, 692]
 	sdiv	w0, w0, w2
 	cmp	w0, w3
-	bne	.L1378
+	bne	.L1377
 	ldrb	w0, [x24, #:lo12:.LANCHOR73]
 	ldrh	w2, [x25, #:lo12:.LANCHOR80]
 	mul	w0, w0, w2
 	strh	w0, [x28, x21, lsl 1]
-.L1378:
+.L1377:
 	ldrh	w0, [x28, x21, lsl 1]
 	cmp	w22, w0
-	bls	.L1379
-	cbnz	w0, .L1384
-.L1381:
+	bls	.L1378
+	cbnz	w0, .L1383
+.L1380:
 	mov	w0, 65535
 	cmp	w3, w0
-	beq	.L1380
+	beq	.L1379
 	ldr	w0, [x26]
-	tbz	x0, 12, .L1382
+	tbz	x0, 12, .L1381
 	ldrh	w4, [x1, 688]
 	mov	w2, 0
 	str	x5, [x29, 96]
@@ -8141,7 +8150,7 @@ pm_free_sblk:
 	mov	x0, x27
 	bl	printf
 	ldr	x5, [x29, 96]
-.L1382:
+.L1381:
 	ldr	x0, [x5, #:lo12:.LANCHOR97]
 	add	x21, x21, 208
 	str	x5, [x29, 96]
@@ -8154,17 +8163,17 @@ pm_free_sblk:
 	ldrh	w1, [x0, 688]
 	sub	w1, w1, #1
 	strh	w1, [x0, 688]
-	b	.L1380
+	b	.L1379
+.L1378:
+	cbz	w0, .L1380
 .L1379:
-	cbz	w0, .L1381
-.L1380:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1377
-.L1384:
+	b	.L1376
+.L1383:
 	mov	w22, w0
 	str	w19, [x29, 108]
-	b	.L1380
+	b	.L1379
 	.size	pm_free_sblk, .-pm_free_sblk
 	.section	.text.idb_init,"ax",@progbits
 	.align	2
@@ -8190,24 +8199,24 @@ ftl_memcpy:
 	uxtw	x2, w2
 	b	memcpy
 	.size	ftl_memcpy, .-ftl_memcpy
-	.section	.text.flash_into_data_init,"ax",@progbits
+	.section	.text.flash_info_data_init,"ax",@progbits
 	.align	2
-	.global	flash_into_data_init
-	.type	flash_into_data_init, %function
-flash_into_data_init:
+	.global	flash_info_data_init
+	.type	flash_info_data_init, %function
+flash_info_data_init:
 	stp	x29, x30, [sp, -32]!
 	adrp	x0, .LANCHOR14
 	add	x29, sp, 0
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	str	x19, [sp, 16]
-	tbz	x0, 12, .L1393
+	tbz	x0, 12, .L1392
 	adrp	x2, .LANCHOR143
 	adrp	x0, .LC84
 	add	x2, x2, :lo12:.LANCHOR143
 	mov	w1, 100
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L1393:
+.L1392:
 	adrp	x19, .LANCHOR26
 	mov	w2, 2048
 	mov	w1, 0
@@ -8234,22 +8243,22 @@ flash_into_data_init:
 	add	x1, x1, :lo12:.LANCHOR34
 	add	x0, x0, 48
 	b	ftl_memcpy
-	.size	flash_into_data_init, .-flash_into_data_init
+	.size	flash_info_data_init, .-flash_info_data_init
 	.section	.text.ftl_memcpy32,"ax",@progbits
 	.align	2
 	.global	ftl_memcpy32
 	.type	ftl_memcpy32, %function
 ftl_memcpy32:
 	mov	x3, 0
-.L1399:
+.L1398:
 	cmp	w2, w3
-	bhi	.L1400
+	bhi	.L1399
 	ret
-.L1400:
+.L1399:
 	ldr	w4, [x1, x3, lsl 2]
 	str	w4, [x0, x3, lsl 2]
 	add	x3, x3, 1
-	b	.L1399
+	b	.L1398
 	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.ftl_memcmp,"ax",@progbits
 	.align	2
@@ -8290,14 +8299,14 @@ nandc_init:
 	mov	x19, x0
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
 	str	wzr, [x29, 56]
-	tbz	x0, 12, .L1405
+	tbz	x0, 12, .L1404
 	adrp	x1, .LANCHOR144
 	adrp	x0, .LC85
 	mov	x2, x19
 	add	x1, x1, :lo12:.LANCHOR144
 	add	x0, x0, :lo12:.LC85
 	bl	printf
-.L1405:
+.L1404:
 	adrp	x20, .LANCHOR27
 	mov	w0, 6
 	ldr	w2, [x19, 352]
@@ -8308,22 +8317,22 @@ nandc_init:
 	mov	x22, x0
 	str	x19, [x0, #:lo12:.LANCHOR13]
 	cmp	w2, w1
-	bne	.L1406
+	bne	.L1405
 	mov	w0, 8
 	strb	w0, [x20, #:lo12:.LANCHOR27]
-.L1406:
+.L1405:
 	ldr	w1, [x19, 128]
 	mov	w0, 12336
 	movk	w0, 0x5639, lsl 16
 	cmp	w1, w0
-	bne	.L1407
+	bne	.L1406
 	mov	w0, 9
 	strb	w0, [x20, #:lo12:.LANCHOR27]
-.L1407:
+.L1406:
 	ldrb	w0, [x20, #:lo12:.LANCHOR27]
 	cmp	w0, 9
 	adrp	x0, .LANCHOR44
-	bne	.L1408
+	bne	.L1407
 	mov	w1, 1
 	strb	w1, [x0, #:lo12:.LANCHOR44]
 	ldr	w0, [x29, 56]
@@ -8348,17 +8357,17 @@ nandc_init:
 	mov	w0, 39
 	str	w0, [x19, 84]
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1410
+	tbz	x0, 12, .L1409
 	ldr	w1, [x19]
 	ldr	w2, [x19, 8]
 	ldr	w3, [x19, 80]
 	ldr	w4, [x19, 84]
 	ldr	w5, [x19, 88]
-.L1423:
+.L1422:
 	adrp	x0, .LC86
 	add	x0, x0, :lo12:.LC86
 	bl	printf
-.L1410:
+.L1409:
 	adrp	x0, .LANCHOR45
 	mov	w1, 1
 	strb	w1, [x0, #:lo12:.LANCHOR45]
@@ -8367,17 +8376,17 @@ nandc_init:
 	adrp	x0, .LANCHOR43
 	strb	wzr, [x0, #:lo12:.LANCHOR43]
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1404
+	tbz	x0, 12, .L1403
 	ldrb	w1, [x20, #:lo12:.LANCHOR27]
 	adrp	x0, .LC87
 	add	x0, x0, :lo12:.LC87
 	bl	printf
-.L1404:
+.L1403:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1408:
+.L1407:
 	strb	wzr, [x0, #:lo12:.LANCHOR44]
 	mov	w1, 1
 	ldr	w0, [x29, 56]
@@ -8405,14 +8414,14 @@ nandc_init:
 	adrp	x1, .LANCHOR46
 	str	x0, [x1, #:lo12:.LANCHOR46]
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1410
+	tbz	x0, 12, .L1409
 	ldr	x0, [x22, #:lo12:.LANCHOR13]
 	ldr	w1, [x0]
 	ldr	w2, [x0, 344]
 	ldr	w3, [x0, 304]
 	ldr	w4, [x0, 308]
 	ldr	w5, [x0, 312]
-	b	.L1423
+	b	.L1422
 	.size	nandc_init, .-nandc_init
 	.section	.text.buf_init,"ax",@progbits
 	.align	2
@@ -8429,7 +8438,7 @@ buf_init:
 	adrp	x22, .LANCHOR121
 	add	x22, x22, :lo12:.LANCHOR121
 	mov	w21, 0
-.L1425:
+.L1424:
 	and	w0, w21, 255
 	strb	w0, [x19, 1]
 	add	w1, w0, 1
@@ -8447,7 +8456,7 @@ buf_init:
 	bl	ftl_malloc
 	str	x0, [x19, -40]
 	cmp	w21, 32
-	bne	.L1425
+	bne	.L1424
 	add	x0, x20, :lo12:.LANCHOR49
 	mov	w1, -1
 	strb	w1, [x0, 1984]
@@ -8569,18 +8578,18 @@ js_hash:
 	mov	w0, 42982
 	mov	x3, 0
 	movk	w0, 0x47c6, lsl 16
-.L1432:
+.L1431:
 	cmp	w1, w3
-	bhi	.L1433
+	bhi	.L1432
 	ret
-.L1433:
+.L1432:
 	lsr	w2, w0, 2
 	ldrb	w5, [x4, x3]
 	add	w2, w2, w0, lsl 5
 	add	x3, x3, 1
 	add	w2, w2, w5
 	eor	w0, w0, w2
-	b	.L1432
+	b	.L1431
 	.size	js_hash, .-js_hash
 	.section	.text.timer_get_time,"ax",@progbits
 	.align	2
@@ -8644,9 +8653,9 @@ rknand_print_hex:
 	mov	x19, 0
 	mov	w20, 0
 	adrp	x27, .LC90
-.L1440:
+.L1439:
 	cmp	x25, x19
-	bne	.L1446
+	bne	.L1445
 	ldp	x19, x20, [sp, 16]
 	adrp	x1, .LC90
 	ldp	x21, x22, [sp, 32]
@@ -8658,38 +8667,38 @@ rknand_print_hex:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	printf
-.L1446:
-	cbnz	w20, .L1441
+.L1445:
+	cbnz	w20, .L1440
 	mov	w2, w19
 	mov	x1, x26
 	mov	x0, x23
 	bl	printf
-.L1441:
+.L1440:
 	cmp	w24, 4
-	bne	.L1442
+	bne	.L1441
 	ldr	w1, [x22, x19, lsl 2]
-.L1448:
+.L1447:
 	mov	x0, x21
 	add	w20, w20, 1
 	bl	printf
 	cmp	w20, 15
-	bls	.L1445
+	bls	.L1444
 	mov	w20, 0
 	add	x1, x27, :lo12:.LC90
 	adrp	x0, .LC91
 	add	x0, x0, :lo12:.LC91
 	bl	printf
-.L1445:
+.L1444:
 	add	x19, x19, 1
-	b	.L1440
-.L1442:
+	b	.L1439
+.L1441:
 	cmp	w24, 2
-	bne	.L1444
+	bne	.L1443
 	ldrsh	w1, [x22, x19, lsl 1]
-	b	.L1448
-.L1444:
+	b	.L1447
+.L1443:
 	ldrb	w1, [x22, x19]
-	b	.L1448
+	b	.L1447
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.hynix_get_read_retry_default,"ax",@progbits
 	.align	2
@@ -8721,43 +8730,43 @@ hynix_get_read_retry_default:
 	cmp	w3, 2
 	strb	w1, [x28, 130]
 	strb	w0, [x28, 131]
-	bne	.L1450
+	bne	.L1449
 	mov	w0, -89
 	strb	w0, [x28, 128]
 	adrp	x0, .LANCHOR150+17
 	mov	w1, -9
 	strb	w1, [x0, #:lo12:.LANCHOR150+17]
-.L1505:
+.L1504:
 	mov	w0, 7
-	b	.L1540
-.L1450:
+	b	.L1539
+.L1449:
 	ldr	w3, [x29, 140]
 	cmp	w3, 3
+	bne	.L1451
+	mov	x7, 0
+.L1452:
+	sub	w0, w7, #80
+	strb	w0, [x22, x7]
+	add	x7, x7, 1
+	cmp	x7, 8
 	bne	.L1452
-	mov	x6, 0
-.L1453:
-	sub	w0, w6, #80
-	strb	w0, [x22, x6]
-	add	x6, x6, 1
-	cmp	x6, 8
-	bne	.L1453
-	stp	w6, w6, [x29, 132]
-.L1451:
+	stp	w7, w7, [x29, 132]
+.L1450:
 	ldr	w0, [x29, 140]
 	sub	w0, w0, #1
 	cmp	w0, 1
-	bhi	.L1458
-	adrp	x7, .LANCHOR18
-	adrp	x11, .LANCHOR29
-	add	x24, x7, :lo12:.LANCHOR18
-	add	x25, x11, :lo12:.LANCHOR29
+	bhi	.L1457
+	adrp	x6, .LANCHOR18
+	adrp	x8, .LANCHOR29
+	add	x24, x6, :lo12:.LANCHOR18
+	add	x25, x8, :lo12:.LANCHOR29
 	mov	w20, 0
 	mov	w26, 55
-.L1459:
+.L1458:
 	ldrb	w0, [x24]
 	cmp	w0, w20
-	bhi	.L1465
-.L1466:
+	bhi	.L1464
+.L1465:
 	ldr	x0, [x29, 112]
 	ldrb	w1, [x29, 136]
 	strb	w1, [x0, 1]
@@ -8770,10 +8779,10 @@ hynix_get_read_retry_default:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1452:
+.L1451:
 	ldr	w3, [x29, 140]
 	cmp	w3, 4
-	bne	.L1454
+	bne	.L1453
 	mov	w3, -52
 	strb	w3, [x28, 128]
 	mov	w3, -65
@@ -8789,13 +8798,13 @@ hynix_get_read_retry_default:
 	strb	w3, [x28, 132]
 	strb	w1, [x28, 134]
 	str	w0, [x29, 132]
-.L1541:
+.L1540:
 	str	w0, [x29, 136]
-	b	.L1451
-.L1454:
+	b	.L1450
+.L1453:
 	ldr	w0, [x29, 140]
 	cmp	w0, 5
-	bne	.L1455
+	bne	.L1454
 	mov	w0, 56
 	strb	w0, [x28, 128]
 	mov	w0, 57
@@ -8805,14 +8814,14 @@ hynix_get_read_retry_default:
 	mov	w0, 59
 	strb	w0, [x28, 131]
 	mov	w0, 8
-.L1540:
+.L1539:
 	str	w0, [x29, 132]
 	mov	w0, 4
-	b	.L1541
-.L1455:
+	b	.L1540
+.L1454:
 	ldr	w0, [x29, 140]
 	cmp	w0, 6
-	bne	.L1456
+	bne	.L1455
 	mov	w0, 14
 	strb	w0, [x28, 128]
 	mov	w0, 15
@@ -8822,18 +8831,18 @@ hynix_get_read_retry_default:
 	mov	w0, 17
 	strb	w0, [x28, 131]
 	mov	w0, 12
-	b	.L1540
-.L1456:
+	b	.L1539
+.L1455:
 	ldr	w0, [x29, 140]
 	cmp	w0, 7
-	bne	.L1505
+	bne	.L1504
 	mov	x0, 0
-.L1457:
+.L1456:
 	sub	w1, w0, #80
 	strb	w1, [x22, x0]
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L1457
+	bne	.L1456
 	mov	w0, -44
 	strb	w0, [x28, 136]
 	mov	w0, -43
@@ -8841,8 +8850,8 @@ hynix_get_read_retry_default:
 	mov	w0, 12
 	str	w0, [x29, 132]
 	mov	w0, 10
-	b	.L1541
-.L1465:
+	b	.L1540
+.L1464:
 	ldrb	w0, [x25, w20, sxtw]
 	mov	x1, 32
 	mov	w2, 160
@@ -8854,7 +8863,7 @@ hynix_get_read_retry_default:
 	adrp	x1, .LANCHOR13
 	ldr	x4, [x1, #:lo12:.LANCHOR13]
 	add	x23, x4, x0
-.L1460:
+.L1459:
 	str	w26, [x23, 2056]
 	ldrb	w0, [x22, x21]
 	str	w0, [x23, 2052]
@@ -8865,15 +8874,15 @@ hynix_get_read_retry_default:
 	add	x21, x21, 1
 	ldr	w0, [x29, 136]
 	cmp	w0, w21, uxtb
-	bhi	.L1460
+	bhi	.L1459
 	adrp	x3, .LANCHOR150
 	add	x3, x3, :lo12:.LANCHOR150
 	mov	x0, 0
-.L1463:
+.L1462:
 	add	x15, x19, x0
 	add	x14, x3, x0
 	mov	x1, 1
-.L1462:
+.L1461:
 	lsl	x4, x1, 2
 	lsl	x16, x1, 3
 	ldrb	w17, [x19, x0]
@@ -8882,10 +8891,10 @@ hynix_get_read_retry_default:
 	ldrb	w4, [x14, x4]
 	add	w4, w4, w17
 	strb	w4, [x15, x16]
-	bne	.L1462
+	bne	.L1461
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L1463
+	bne	.L1462
 	add	w5, w20, 1
 	strb	wzr, [x19, 16]
 	strb	wzr, [x19, 24]
@@ -8895,12 +8904,12 @@ hynix_get_read_retry_default:
 	strb	wzr, [x19, 48]
 	strb	wzr, [x19, 41]
 	strb	wzr, [x19, 49]
-	b	.L1459
-.L1458:
+	b	.L1458
+.L1457:
 	ldr	w0, [x29, 140]
 	sub	w0, w0, #3
 	cmp	w0, 4
-	bhi	.L1466
+	bhi	.L1465
 	ldp	w0, w1, [x29, 132]
 	adrp	x19, .LANCHOR18
 	add	x19, x19, :lo12:.LANCHOR18
@@ -8918,48 +8927,50 @@ hynix_get_read_retry_default:
 	sub	w20, w0, #5
 	add	x0, x13, 1
 	str	x0, [x29, 96]
-.L1467:
+.L1466:
 	ldrb	w0, [x19]
 	ldr	w1, [x29, 128]
 	cmp	w0, w1
-	bls	.L1466
+	bls	.L1465
 	ldr	w1, [x29, 128]
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
-	mov	w10, 160
-	mov	w23, 255
-	ldrb	w4, [x0, w1, sxtw]
+	ldrb	w23, [x0, w1, sxtw]
+	mov	w0, w23
+	bl	zftl_flash_exit_slc_mode
 	mov	x0, 32
-	umaddl	x10, w10, w4, x0
+	mov	w5, 160
+	umaddl	x5, w5, w23, x0
 	ldr	x0, [x29, 112]
-	ubfiz	x4, x4, 8, 8
-	add	x0, x0, x10
+	ubfiz	x23, x23, 8, 8
+	add	x0, x0, x5
 	str	x0, [x29, 104]
 	adrp	x0, .LANCHOR13
-	ldr	x0, [x0, #:lo12:.LANCHOR13]
-	add	x27, x0, x4
+	ldr	x4, [x0, #:lo12:.LANCHOR13]
+	add	x27, x4, x23
+	mov	w23, 255
 	str	w23, [x27, 2056]
 	bl	nandc_wait_flash_ready
 	mov	w0, 54
 	str	w0, [x27, 2056]
 	ldr	w0, [x29, 140]
 	cmp	w0, 4
-	bne	.L1468
+	bne	.L1467
 	mov	w0, 64
 	str	w23, [x27, 2052]
 	str	w0, [x27, 2048]
 	mov	w0, 204
-.L1542:
+.L1541:
 	str	w0, [x27, 2052]
 	mov	w0, 77
-	b	.L1543
-.L1468:
+	b	.L1542
+.L1467:
 	cmp	w20, 1
-	bhi	.L1470
+	bhi	.L1469
 	ldrb	w0, [x28, 128]
 	str	w0, [x27, 2052]
 	mov	w0, 82
-.L1543:
+.L1542:
 	str	w0, [x27, 2048]
 	mov	w0, 22
 	str	w0, [x27, 2056]
@@ -8974,10 +8985,10 @@ hynix_get_read_retry_default:
 	ldr	w0, [x29, 140]
 	str	wzr, [x27, 2052]
 	cmp	w0, 6
-	bne	.L1471
+	bne	.L1470
 	mov	w0, 31
 	str	w0, [x27, 2052]
-.L1472:
+.L1471:
 	mov	w23, 2
 	str	w23, [x27, 2052]
 	str	wzr, [x27, 2052]
@@ -8985,122 +8996,122 @@ hynix_get_read_retry_default:
 	str	w0, [x27, 2056]
 	bl	nandc_wait_flash_ready
 	cmp	w20, 1
-	bls	.L1506
+	bls	.L1505
 	ldr	w0, [x29, 140]
 	cmp	w0, 7
 	mov	w0, 32
 	csel	w23, w23, w0, ne
-.L1473:
+.L1472:
 	adrp	x3, .LANCHOR151
 	mov	x1, 0
 	ldr	x0, [x3, #:lo12:.LANCHOR151]
-.L1474:
+.L1473:
 	ldr	w2, [x27, 2048]
 	strb	w2, [x0, x1]
 	add	x1, x1, 1
 	cmp	w23, w1, uxtb
-	bhi	.L1474
+	bhi	.L1473
 	ldr	w1, [x29, 140]
 	cmp	w1, 7
-	bne	.L1475
+	bne	.L1474
 	mov	w1, 0
-.L1477:
+.L1476:
 	ldrb	w2, [x0]
 	cmp	w2, 12
-	beq	.L1476
+	beq	.L1475
 	ldrb	w2, [x0, 1]
 	cmp	w2, 10
-	beq	.L1476
+	beq	.L1475
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 255
 	cmp	w1, 8
-	bne	.L1477
-.L1478:
+	bne	.L1476
+.L1477:
 	adrp	x0, .LC92
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC92
 	bl	printf
-.L1480:
-	b	.L1480
-.L1470:
+.L1479:
+	b	.L1479
+.L1469:
 	mov	w0, 174
 	str	w0, [x27, 2052]
 	str	wzr, [x27, 2048]
 	mov	w0, 176
-	b	.L1542
-.L1471:
+	b	.L1541
+.L1470:
 	str	wzr, [x27, 2052]
-	b	.L1472
-.L1506:
+	b	.L1471
+.L1505:
 	mov	w23, 16
-	b	.L1473
-.L1476:
+	b	.L1472
+.L1475:
 	cmp	w1, 6
-	bhi	.L1478
-.L1479:
+	bhi	.L1477
+.L1478:
 	ldr	x2, [x3, #:lo12:.LANCHOR151]
 	mov	x0, 0
-.L1484:
+.L1483:
 	ldr	w1, [x29, 120]
 	cmp	w1, w0
-	bgt	.L1485
+	bgt	.L1484
 	ldr	x1, [x3, #:lo12:.LANCHOR151]
 	mov	w16, 8
 	add	x3, x1, x21
-.L1487:
-	mov	x0, 0
 .L1486:
+	mov	x0, 0
+.L1485:
 	ldr	w17, [x3, x0, lsl 2]
 	ldr	w4, [x29, 124]
 	mvn	w17, w17
 	str	w17, [x3, x0, lsl 2]
 	add	x0, x0, 1
 	cmp	w4, w0
-	bgt	.L1486
+	bgt	.L1485
 	add	x3, x3, x22, uxtw 2
 	subs	w16, w16, #1
-	bne	.L1487
+	bne	.L1486
 	mov	x17, x1
 	mov	w23, 0
 	mov	w26, 1
-.L1488:
+.L1487:
 	mov	w3, 0
 	mov	w0, 0
-.L1492:
+.L1491:
 	mov	x25, x17
 	lsl	w16, w26, w0
 	mov	w24, 16
 	mov	w30, 0
-.L1490:
+.L1489:
 	ldr	w4, [x25]
 	add	x25, x25, x21
 	bics	wzr, w16, w4
 	cinc	w30, w30, eq
 	subs	w24, w24, #1
-	bne	.L1490
+	bne	.L1489
 	cmp	w30, 9
 	orr	w16, w3, w16
 	add	w0, w0, 1
 	csel	w3, w16, w3, cs
 	cmp	w0, 32
-	bne	.L1492
+	bne	.L1491
 	ldr	w0, [x29, 124]
 	add	w23, w23, 1
 	str	w3, [x17], 4
 	cmp	w0, w23
-	bgt	.L1488
+	bgt	.L1487
 	mov	x0, 0
 	mov	w3, 0
-.L1495:
+.L1494:
 	ldr	w16, [x1, x0]
 	add	x0, x0, 4
 	cmp	w16, 0
 	cinc	w3, w3, eq
 	cmp	x0, 32
-	bne	.L1495
+	bne	.L1494
 	cmp	w3, 7
-	ble	.L1496
+	ble	.L1495
 	mov	w3, 1024
 	mov	w2, 1
 	adrp	x0, .LC93
@@ -9110,67 +9121,67 @@ hynix_get_read_retry_default:
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC92
 	bl	printf
-.L1497:
-	b	.L1497
-.L1475:
+.L1496:
+	b	.L1496
+.L1474:
 	ldr	w1, [x29, 140]
 	cmp	w1, 6
-	bne	.L1479
+	bne	.L1478
 	mov	x1, 0
-.L1481:
+.L1480:
 	ldrb	w2, [x0, x1]
 	cmp	w2, 12
-	beq	.L1479
+	beq	.L1478
 	add	x2, x0, x1
 	ldrb	w2, [x2, 8]
 	cmp	w2, 4
-	beq	.L1479
+	beq	.L1478
 	add	x1, x1, 1
 	cmp	x1, 8
-	bne	.L1481
+	bne	.L1480
 	adrp	x0, .LC92
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC92
 	bl	printf
-.L1483:
-	b	.L1483
-.L1485:
+.L1482:
+	b	.L1482
+.L1484:
 	ldr	w1, [x27, 2048]
 	strb	w1, [x2, x0]
 	add	x0, x0, 1
-	b	.L1484
-.L1496:
+	b	.L1483
+.L1495:
 	ldr	w0, [x29, 140]
 	cmp	w0, 6
-	beq	.L1508
+	beq	.L1507
 	cmp	w0, 7
 	mov	x1, 10
 	mov	x0, 8
 	csel	x0, x0, x1, ne
-.L1498:
-	ldr	x10, [x29, 104]
+.L1497:
+	ldr	x5, [x29, 104]
 	mov	w3, 0
-.L1499:
+.L1498:
 	mov	x1, 0
-.L1500:
+.L1499:
 	ldrb	w16, [x2, x1]
 	ldr	w4, [x29, 136]
-	strb	w16, [x10, x1]
+	strb	w16, [x5, x1]
 	add	x1, x1, 1
 	cmp	w4, w1, uxtb
-	bhi	.L1500
+	bhi	.L1499
 	ldr	x1, [x29, 96]
 	add	w3, w3, 1
-	add	x10, x10, x0
+	add	x5, x5, x0
 	add	x2, x2, x1
 	ldr	w1, [x29, 132]
 	cmp	w1, w3
-	bgt	.L1499
+	bgt	.L1498
 	mov	w23, 255
 	str	w23, [x27, 2056]
 	bl	nandc_wait_flash_ready
 	cmp	w20, 1
-	bhi	.L1502
+	bhi	.L1501
 	mov	w0, 54
 	str	w0, [x27, 2056]
 	ldrb	w0, [x28, 128]
@@ -9185,20 +9196,20 @@ hynix_get_read_retry_default:
 	str	w23, [x27, 2052]
 	str	w23, [x27, 2052]
 	str	w23, [x27, 2052]
-.L1544:
+.L1543:
 	str	w0, [x27, 2056]
 	bl	nandc_wait_flash_ready
 	ldr	w0, [x29, 128]
 	add	w11, w0, 1
 	and	w0, w11, 255
 	str	w0, [x29, 128]
-	b	.L1467
-.L1508:
+	b	.L1466
+.L1507:
 	mov	x0, 4
-	b	.L1498
-.L1502:
+	b	.L1497
+.L1501:
 	mov	w0, 56
-	b	.L1544
+	b	.L1543
 	.size	hynix_get_read_retry_default, .-hynix_get_read_retry_default
 	.section	.text.flash_get_read_retry_tbl,"ax",@progbits
 	.align	2
@@ -9210,9 +9221,9 @@ flash_get_read_retry_tbl:
 	sub	w1, w0, #1
 	and	w1, w1, 255
 	cmp	w1, 6
-	bhi	.L1545
+	bhi	.L1544
 	b	hynix_get_read_retry_default
-.L1545:
+.L1544:
 	ret
 	.size	flash_get_read_retry_tbl, .-flash_get_read_retry_tbl
 	.section	.text.nandc_xfer_done,"ax",@progbits
@@ -9231,27 +9242,27 @@ nandc_xfer_done:
 	stp	x23, x24, [sp, 48]
 	cmp	w1, 9
 	strb	wzr, [x0, #:lo12:.LANCHOR152]
-	bne	.L1548
+	bne	.L1547
 	ldr	x20, [x19, #:lo12:.LANCHOR13]
 	mov	x24, x0
 	mov	w21, 0
 	ldr	w0, [x20, 16]
 	str	w0, [x29, 64]
 	ldr	w0, [x20, 48]
-	tbnz	x0, 1, .L1549
+	tbnz	x0, 1, .L1548
 	adrp	x22, .LC97
 	adrp	x23, .LC96
 	add	x22, x22, :lo12:.LC97
 	add	x23, x23, :lo12:.LC96
-.L1550:
+.L1549:
 	ldr	w0, [x29, 64]
-	tbnz	x0, 20, .L1553
+	tbnz	x0, 20, .L1552
 	ldr	x0, [x19, #:lo12:.LANCHOR13]
 	add	w21, w21, 1
 	tst	x21, 16777215
 	ldr	w0, [x0, 16]
 	str	w0, [x29, 64]
-	bne	.L1550
+	bne	.L1549
 	ldr	w2, [x29, 64]
 	mov	w1, w21
 	ldr	w3, [x20, 64]
@@ -9263,39 +9274,39 @@ nandc_xfer_done:
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1550
-.L1549:
+	b	.L1549
+.L1548:
 	adrp	x22, .LC95
 	adrp	x23, .LC96
 	add	x22, x22, :lo12:.LC95
 	add	x23, x23, :lo12:.LC96
-.L1551:
+.L1550:
 	ldr	w1, [x20, 64]
 	ldr	w0, [x29, 64]
 	ubfx	x1, x1, 16, 6
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0
-	bge	.L1553
+	bge	.L1552
 	ldr	x0, [x19, #:lo12:.LANCHOR13]
 	ldr	w0, [x0]
 	str	w0, [x29, 72]
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1552
+	tbz	x0, 13, .L1551
 	ldr	w0, [x29, 72]
-	tbz	x0, 17, .L1552
+	tbz	x0, 17, .L1551
 	ldr	w1, [x29, 72]
 	adrp	x0, .LC94
 	add	x0, x0, :lo12:.LC94
 	ubfx	x1, x1, 17, 1
-.L1585:
+.L1584:
 	bl	printf
-	b	.L1553
-.L1552:
+	b	.L1552
+.L1551:
 	ldr	w0, [x29, 64]
 	add	w21, w21, 1
 	ubfx	x0, x0, 22, 6
 	cmp	w21, w0, lsl 12
-	bne	.L1551
+	bne	.L1550
 	ldr	w2, [x20, 64]
 	mov	w1, w21
 	ldr	w3, [x29, 64]
@@ -9309,10 +9320,10 @@ nandc_xfer_done:
 	mov	w2, 4
 	bl	rknand_print_hex
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1551
+	tbz	x0, 13, .L1550
 	mov	w0, 1
 	strb	w0, [x24, #:lo12:.LANCHOR152]
-.L1553:
+.L1552:
 	adrp	x0, .LANCHOR46+32
 	ldp	x19, x20, [sp, 16]
 	str	wzr, [x0, #:lo12:.LANCHOR46+32]
@@ -9320,26 +9331,26 @@ nandc_xfer_done:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1548:
+.L1547:
 	ldr	x20, [x19, #:lo12:.LANCHOR13]
 	mov	w21, 0
 	ldr	w0, [x20, 8]
 	str	w0, [x29, 64]
 	ldr	w0, [x20, 16]
-	tbnz	x0, 1, .L1559
+	tbnz	x0, 1, .L1558
 	adrp	x22, .LC97
 	adrp	x23, .LC96
 	add	x22, x22, :lo12:.LC97
 	add	x23, x23, :lo12:.LC96
-.L1560:
+.L1559:
 	ldr	w0, [x29, 64]
-	tbnz	x0, 20, .L1553
+	tbnz	x0, 20, .L1552
 	ldr	x0, [x19, #:lo12:.LANCHOR13]
 	add	w21, w21, 1
 	tst	x21, 16777215
 	ldr	w0, [x0, 8]
 	str	w0, [x29, 64]
-	bne	.L1560
+	bne	.L1559
 	ldr	w2, [x29, 64]
 	mov	w1, w21
 	ldr	w3, [x20, 28]
@@ -9351,34 +9362,34 @@ nandc_xfer_done:
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1560
-.L1559:
+	b	.L1559
+.L1558:
 	adrp	x22, .LC95
 	adrp	x23, .LC96
 	add	x22, x22, :lo12:.LC95
 	add	x23, x23, :lo12:.LC96
-.L1561:
+.L1560:
 	ldr	w1, [x20, 28]
 	ldr	w0, [x29, 64]
 	ubfx	x1, x1, 16, 5
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0
-	bge	.L1553
+	bge	.L1552
 	ldr	x0, [x19, #:lo12:.LANCHOR13]
 	ldr	w0, [x0]
 	str	w0, [x29, 72]
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1562
+	tbz	x0, 13, .L1561
 	ldr	w0, [x29, 72]
-	tbz	x0, 17, .L1562
+	tbz	x0, 17, .L1561
 	adrp	x0, .LC98
 	ldr	w1, [x29, 72]
 	add	x0, x0, :lo12:.LC98
-	b	.L1585
-.L1562:
+	b	.L1584
+.L1561:
 	add	w21, w21, 1
 	tst	x21, 16777215
-	bne	.L1561
+	bne	.L1560
 	ldr	w2, [x20, 28]
 	mov	w1, w21
 	ldr	w3, [x29, 64]
@@ -9391,7 +9402,7 @@ nandc_xfer_done:
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1561
+	b	.L1560
 	.size	nandc_xfer_done, .-nandc_xfer_done
 	.section	.text.nandc_xfer,"ax",@progbits
 	.align	2
@@ -9412,20 +9423,20 @@ nandc_xfer:
 	mov	x21, x4
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
-	cbnz	w22, .L1605
+	cbnz	w22, .L1604
 	adrp	x0, .LANCHOR27
 	ldrb	w0, [x0, #:lo12:.LANCHOR27]
 	cmp	w0, 9
-	bne	.L1588
+	bne	.L1587
 	adrp	x22, .LANCHOR13
 	lsr	w19, w19, 2
 	mov	w3, 1
 	mov	w2, 0
 	ldr	x5, [x22, #:lo12:.LANCHOR13]
 	mov	w0, 0
-.L1589:
+.L1588:
 	cmp	w2, w19
-	bcc	.L1593
+	bcc	.L1592
 	ldr	w19, [x5]
 	cmp	w3, 0
 	mov	w1, 512
@@ -9434,7 +9445,7 @@ nandc_xfer:
 	movk	w1, 0x2, lsl 16
 	and	w1, w19, w1
 	cmp	w1, 139264
-	bne	.L1595
+	bne	.L1594
 	mov	w1, w19
 	adrp	x0, .LC99
 	add	x0, x0, :lo12:.LC99
@@ -9443,11 +9454,11 @@ nandc_xfer:
 	orr	w19, w19, 131072
 	str	w19, [x0]
 	mov	w0, -1
-.L1595:
-	tbz	x19, 13, .L1596
+.L1594:
+	tbz	x19, 13, .L1595
 	adrp	x1, .LANCHOR152
 	ldrb	w1, [x1, #:lo12:.LANCHOR152]
-	cbz	w1, .L1596
+	cbz	w1, .L1595
 	mov	w1, w19
 	adrp	x0, .LC100
 	add	x0, x0, :lo12:.LC100
@@ -9455,14 +9466,14 @@ nandc_xfer:
 	ldr	x0, [x22, #:lo12:.LANCHOR13]
 	mov	w1, 1
 	str	w1, [x0, 16]
-.L1624:
+.L1623:
 	mov	w0, -1
-.L1587:
+.L1586:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1593:
+.L1592:
 	uxtw	x1, w2
 	add	x1, x1, 84
 	ldr	w1, [x5, x1, lsl 2]
@@ -9473,30 +9484,30 @@ nandc_xfer:
 	and	w1, w4, w1, lsr 10
 	and	w3, w3, w1
 	ldr	w1, [x29, 56]
-	tbnz	x1, 2, .L1607
+	tbnz	x1, 2, .L1606
 	ldr	w1, [x29, 56]
-	tbnz	x1, 18, .L1607
+	tbnz	x1, 18, .L1606
 	ldr	w4, [x29, 56]
 	ldr	w1, [x29, 56]
 	ubfx	x4, x4, 3, 7
 	ubfx	x1, x1, 19, 7
 	cmp	w4, w1
 	ldr	w1, [x29, 56]
-	ble	.L1591
+	ble	.L1590
 	ubfx	x1, x1, 3, 7
-.L1592:
+.L1591:
 	cmp	w0, w1
 	csel	w0, w0, w1, cs
-.L1590:
+.L1589:
 	add	w2, w2, 1
-	b	.L1589
-.L1591:
+	b	.L1588
+.L1590:
 	ubfx	x1, x1, 19, 7
-	b	.L1592
-.L1607:
+	b	.L1591
+.L1606:
 	mov	w0, -1
-	b	.L1590
-.L1588:
+	b	.L1589
+.L1587:
 	adrp	x0, .LANCHOR43
 	lsr	w4, w19, 1
 	mov	w3, 64
@@ -9508,25 +9519,25 @@ nandc_xfer:
 	mov	w0, 128
 	csel	w3, w3, w0, cc
 	mov	w0, 0
-.L1598:
+.L1597:
 	add	w5, w3, w0
 	cmp	w2, w4
-	bcc	.L1599
+	bcc	.L1598
 	adrp	x22, .LANCHOR13
 	lsr	w19, w19, 2
 	mov	w3, 0
 	mov	w0, 0
 	ldr	x4, [x22, #:lo12:.LANCHOR13]
-.L1600:
+.L1599:
 	cmp	w3, w19
-	bcc	.L1604
+	bcc	.L1603
 	str	wzr, [x4, 16]
 	mov	w1, 8192
 	movk	w1, 0x2, lsl 16
 	ldr	w19, [x4]
 	and	w1, w19, w1
 	cmp	w1, 139264
-	bne	.L1596
+	bne	.L1595
 	mov	w1, w19
 	adrp	x0, .LC101
 	add	x0, x0, :lo12:.LC101
@@ -9534,8 +9545,8 @@ nandc_xfer:
 	ldr	x0, [x22, #:lo12:.LANCHOR13]
 	orr	w19, w19, 131072
 	str	w19, [x0]
-	b	.L1624
-.L1599:
+	b	.L1623
+.L1598:
 	ldr	x7, [x6, #:lo12:.LANCHOR46]
 	and	x0, x0, 4294967292
 	ldr	w0, [x7, x0]
@@ -9552,16 +9563,16 @@ nandc_xfer:
 	add	w1, w1, 4
 	strb	w0, [x21, x7]
 	mov	w0, w5
-	b	.L1598
-.L1604:
+	b	.L1597
+.L1603:
 	uxtw	x1, w3
 	add	x1, x1, 8
 	ldr	w1, [x4, x1, lsl 2]
 	str	w1, [x29, 56]
 	ldr	w1, [x29, 56]
-	tbnz	x1, 2, .L1610
+	tbnz	x1, 2, .L1609
 	ldr	w1, [x29, 56]
-	tbnz	x1, 15, .L1610
+	tbnz	x1, 15, .L1609
 	ldr	w2, [x29, 56]
 	ubfx	x6, x2, 3, 5
 	ldr	w2, [x29, 56]
@@ -9574,42 +9585,42 @@ nandc_xfer:
 	orr	w1, w5, w1, lsl 5
 	cmp	w2, w1
 	ldr	w1, [x29, 56]
-	bls	.L1602
+	bls	.L1601
 	ubfx	x2, x1, 3, 5
 	ldr	w1, [x29, 56]
 	ubfx	x1, x1, 27, 1
-.L1623:
+.L1622:
 	orr	w1, w2, w1, lsl 5
 	cmp	w0, w1
 	csel	w0, w0, w1, cs
-.L1601:
+.L1600:
 	add	w3, w3, 1
-	b	.L1600
-.L1602:
+	b	.L1599
+.L1601:
 	ubfx	x2, x1, 16, 5
 	ldr	w1, [x29, 56]
 	ubfx	x1, x1, 29, 1
-	b	.L1623
-.L1610:
+	b	.L1622
+.L1609:
 	mov	w0, -1
-	b	.L1601
-.L1596:
+	b	.L1600
+.L1595:
 	cmn	w0, #1
-	beq	.L1587
+	beq	.L1586
 	ldr	w1, [x21]
 	cmn	w1, #1
-	bne	.L1587
+	bne	.L1586
 	ldr	w1, [x21, 4]
 	cmn	w1, #1
-	bne	.L1587
+	bne	.L1586
 	ldr	w1, [x20]
 	cmn	w1, #1
 	mov	w1, 512
 	csel	w0, w0, w1, ne
-	b	.L1587
-.L1605:
+	b	.L1586
+.L1604:
 	mov	w0, 0
-	b	.L1587
+	b	.L1586
 	.size	nandc_xfer, .-nandc_xfer
 	.section	.text.flash_read_page,"ax",@progbits
 	.align	2
@@ -9633,22 +9644,22 @@ flash_read_page:
 	mov	x26, x3
 	and	w20, w1, 2097151
 	ubfx	x23, x22, 24, 2
-	tbz	x0, 4, .L1626
+	tbz	x0, 4, .L1625
 	mov	w3, w1
 	adrp	x0, .LC102
 	mov	w2, w23
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC102
 	bl	printf
-.L1626:
+.L1625:
 	bl	nandc_wait_flash_ready
 	mov	w0, w21
 	bl	nandc_cs
 	adrp	x6, .LANCHOR16
-	cbnz	w23, .L1627
+	cbnz	w23, .L1626
 	mov	w0, w21
 	bl	zftl_flash_enter_slc_mode
-.L1628:
+.L1627:
 	ubfiz	x4, x21, 8, 8
 	lsr	w0, w20, 8
 	add	x4, x19, x4
@@ -9665,12 +9676,12 @@ flash_read_page:
 	ldr	x0, [x6, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1630
-	cbz	w23, .L1630
+	bne	.L1629
+	cbz	w23, .L1629
 	add	w20, w20, w20, lsl 1
 	sub	w0, w20, #1
 	add	w0, w0, w23
-.L1639:
+.L1638:
 	bl	nandc_set_seed
 	bl	nandc_wait_flash_ready
 	mov	w0, 5
@@ -9694,23 +9705,23 @@ flash_read_page:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1627:
+.L1626:
 	ldr	x0, [x6, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1629
+	bne	.L1628
 	sxtw	x0, w21
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 8
 	str	w23, [x0, 8]
-	b	.L1628
-.L1629:
+	b	.L1627
+.L1628:
 	mov	w0, w21
 	bl	zftl_flash_exit_slc_mode
-	b	.L1628
-.L1630:
+	b	.L1627
+.L1629:
 	mov	w0, w20
-	b	.L1639
+	b	.L1638
 	.size	flash_read_page, .-flash_read_page
 	.section	.text.micron_read_retrial,"ax",@progbits
 	.align	2
@@ -9748,12 +9759,12 @@ micron_read_retrial:
 	adrp	x0, .LANCHOR14
 	add	x0, x0, :lo12:.LANCHOR14
 	str	x0, [x29, 96]
-.L1641:
+.L1640:
 	ldr	x0, [x29, 104]
 	ldrb	w0, [x0]
 	cmp	w21, w0
-	bcc	.L1646
-.L1645:
+	bcc	.L1645
+.L1644:
 	ldr	x0, [x29, 120]
 	add	x19, x0, x19, lsl 8
 	mov	w0, 239
@@ -9767,14 +9778,14 @@ micron_read_retrial:
 	cmp	w28, w20
 	str	wzr, [x19, 2048]
 	str	wzr, [x19, 2048]
-	bcc	.L1647
+	bcc	.L1646
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L1647:
+.L1646:
 	cmp	w28, 256
 	ccmn	w28, #1, 4, ne
-	bne	.L1640
+	bne	.L1639
 	adrp	x0, .LC104
 	mov	w4, w28
 	mov	w3, w21
@@ -9782,7 +9793,7 @@ micron_read_retrial:
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC104
 	bl	printf
-.L1640:
+.L1639:
 	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9791,7 +9802,7 @@ micron_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1646:
+.L1645:
 	mov	w0, 239
 	str	w0, [x23, 2056]
 	mov	w0, 137
@@ -9812,7 +9823,7 @@ micron_read_retrial:
 	mov	w7, w0
 	ldr	x0, [x29, 96]
 	ldr	w0, [x0]
-	tbz	x0, 12, .L1642
+	tbz	x0, 12, .L1641
 	str	w7, [x29, 112]
 	mov	w4, w28
 	mov	w3, w21
@@ -9822,9 +9833,9 @@ micron_read_retrial:
 	add	x0, x0, :lo12:.LC103
 	bl	printf
 	ldr	w7, [x29, 112]
-.L1642:
+.L1641:
 	cmn	w7, #1
-	beq	.L1643
+	beq	.L1642
 	adrp	x0, .LANCHOR151
 	cmn	w28, #1
 	csel	w28, w28, w7, ne
@@ -9832,13 +9843,13 @@ micron_read_retrial:
 	ldr	x25, [x0, #:lo12:.LANCHOR151]
 	adrp	x0, .LANCHOR153
 	ldr	x26, [x0, #:lo12:.LANCHOR153]
-	bcc	.L1649
-.L1643:
+	bcc	.L1648
+.L1642:
 	mov	w21, w27
-	b	.L1641
-.L1649:
+	b	.L1640
+.L1648:
 	mov	w28, w7
-	b	.L1645
+	b	.L1644
 	.size	micron_read_retrial, .-micron_read_retrial
 	.section	.text.toshiba_3d_read_retrial,"ax",@progbits
 	.align	2
@@ -9879,17 +9890,17 @@ toshiba_3d_read_retrial:
 	csel	w0, w1, w0, ne
 	str	w0, [x29, 136]
 	add	x0, x22, :lo12:.LANCHOR23
-	cbnz	w4, .L1664
+	cbnz	w4, .L1663
 	str	x0, [x29, 120]
 	sxtw	x0, w24
 	add	x0, x0, 8
 	add	x0, x25, x0, lsl 8
 	str	x0, [x29, 112]
-.L1671:
+.L1670:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, 36
-	bne	.L1665
+	bne	.L1664
 	mov	w1, w20
 	mov	x0, x21
 	mov	w2, 0
@@ -9897,7 +9908,7 @@ toshiba_3d_read_retrial:
 	ldr	x1, [x29, 112]
 	mov	w0, 93
 	str	w0, [x1, 8]
-.L1666:
+.L1665:
 	mov	w4, w28
 	mov	x3, x27
 	mov	x2, x26
@@ -9907,7 +9918,7 @@ toshiba_3d_read_retrial:
 	mov	w4, w0
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 4, .L1667
+	tbz	x0, 4, .L1666
 	mov	w3, w4
 	str	w4, [x29, 108]
 	mov	w2, w23
@@ -9916,9 +9927,9 @@ toshiba_3d_read_retrial:
 	add	x0, x0, :lo12:.LC105
 	bl	printf
 	ldr	w4, [x29, 108]
-.L1667:
+.L1666:
 	cmn	w4, #1
-	beq	.L1668
+	beq	.L1667
 	adrp	x0, .LANCHOR151
 	cmn	w19, #1
 	csel	w19, w19, w4, ne
@@ -9929,38 +9940,38 @@ toshiba_3d_read_retrial:
 	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1686
-.L1668:
+	bcc	.L1685
+.L1667:
 	ldr	w0, [x29, 136]
 	add	w20, w20, 1
 	cmp	w0, w20
-	bne	.L1671
-.L1670:
+	bne	.L1670
+.L1669:
 	ldrb	w0, [x22, #:lo12:.LANCHOR23]
 	cmp	w0, 36
-	bne	.L1672
+	bne	.L1671
 	mov	w2, 0
-.L1709:
+.L1708:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_tlc_set_rr_para
-	b	.L1673
-.L1665:
+	b	.L1672
+.L1664:
 	mov	w1, w20
 	mov	x0, x21
 	bl	toshiba_3d_set_slc_rr_para
-	b	.L1666
-.L1686:
+	b	.L1665
+.L1685:
 	mov	w19, w4
-	b	.L1670
-.L1672:
+	b	.L1669
+.L1671:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_3d_set_slc_rr_para
-.L1673:
+.L1672:
 	ldrb	w0, [x22, #:lo12:.LANCHOR23]
 	cmp	w0, 36
-	bne	.L1682
+	bne	.L1681
 	ldr	x0, [x29, 128]
 	add	x25, x25, x0, lsl 8
 	mov	w0, 85
@@ -9969,19 +9980,19 @@ toshiba_3d_read_retrial:
 	str	wzr, [x25, 2052]
 	str	wzr, [x25, 2048]
 	str	w0, [x25, 2056]
-.L1682:
+.L1681:
 	adrp	x0, .LANCHOR43
 	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L1683
+	bcc	.L1682
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L1683:
+.L1682:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L1684
+	bne	.L1683
 	adrp	x0, .LC107
 	mov	w4, w19
 	mov	w3, w20
@@ -9989,7 +10000,7 @@ toshiba_3d_read_retrial:
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC107
 	bl	printf
-.L1684:
+.L1683:
 	bl	nandc_wait_flash_ready
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
@@ -9999,23 +10010,23 @@ toshiba_3d_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1664:
+.L1663:
 	str	x0, [x29, 112]
 	sxtw	x0, w24
 	add	x0, x0, 8
 	add	x0, x25, x0, lsl 8
 	str	x0, [x29, 136]
-.L1680:
+.L1679:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
 	cmp	w0, 36
-	bne	.L1674
+	bne	.L1673
 	mov	x0, x21
 	mov	w2, 1
 	mov	w1, w20
 	bl	toshiba_tlc_set_rr_para
 	mov	w0, 93
-.L1708:
+.L1707:
 	ldr	x1, [x29, 136]
 	mov	w4, w28
 	mov	x3, x27
@@ -10027,7 +10038,7 @@ toshiba_3d_read_retrial:
 	mov	w4, w0
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 4, .L1676
+	tbz	x0, 4, .L1675
 	mov	w3, w4
 	str	w4, [x29, 108]
 	mov	w2, w23
@@ -10036,9 +10047,9 @@ toshiba_3d_read_retrial:
 	add	x0, x0, :lo12:.LC106
 	bl	printf
 	ldr	w4, [x29, 108]
-.L1676:
+.L1675:
 	cmn	w4, #1
-	beq	.L1677
+	beq	.L1676
 	adrp	x0, .LANCHOR151
 	cmn	w19, #1
 	csel	w19, w19, w4, ne
@@ -10049,32 +10060,32 @@ toshiba_3d_read_retrial:
 	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1687
-.L1677:
+	bcc	.L1686
+.L1676:
 	ldr	w0, [x29, 120]
 	add	w20, w20, 1
 	cmp	w0, w20
-	bne	.L1680
-.L1679:
+	bne	.L1679
+.L1678:
 	ldrb	w0, [x22, #:lo12:.LANCHOR23]
 	cmp	w0, 36
-	bne	.L1681
+	bne	.L1680
 	mov	w2, 1
-	b	.L1709
-.L1674:
+	b	.L1708
+.L1673:
 	mov	x0, x21
 	mov	w1, w20
 	bl	toshiba_3d_set_tlc_rr_para
 	mov	w0, 38
-	b	.L1708
-.L1687:
+	b	.L1707
+.L1686:
 	mov	w19, w4
-	b	.L1679
-.L1681:
+	b	.L1678
+.L1680:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_3d_set_tlc_rr_para
-	b	.L1673
+	b	.L1672
 	.size	toshiba_3d_read_retrial, .-toshiba_3d_read_retrial
 	.section	.text.toshiba_read_retrial,"ax",@progbits
 	.align	2
@@ -10106,35 +10117,35 @@ toshiba_read_retrial:
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
-	bls	.L1728
+	bls	.L1727
 	adrp	x0, .LANCHOR20
 	ldrb	w0, [x0, #:lo12:.LANCHOR20]
-	cbz	w0, .L1729
+	cbz	w0, .L1728
 	mov	w23, 1
 	mov	w0, 1
 	bl	nandc_set_if_mode
-.L1712:
+.L1711:
 	and	x0, x19, 255
 	mov	w1, 92
 	add	x0, x22, x0, lsl 8
 	str	w1, [x0, 2056]
 	mov	w1, 197
 	str	w1, [x0, 2056]
-.L1711:
+.L1710:
 	sxtw	x0, w19
 	mov	w20, 1
 	add	x0, x0, 8
 	mov	w24, -1
 	add	x0, x22, x0, lsl 8
 	str	x0, [x29, 96]
-.L1713:
+.L1712:
 	adrp	x0, .LANCHOR154
 	ldrb	w0, [x0, #:lo12:.LANCHOR154]
 	add	w0, w0, 1
 	cmp	w20, w0
-	bcc	.L1722
+	bcc	.L1721
 	mov	w28, w24
-.L1721:
+.L1720:
 	ldr	x0, [x29, 120]
 	mov	w1, 0
 	ldrb	w0, [x0, #:lo12:.LANCHOR23]
@@ -10142,9 +10153,9 @@ toshiba_read_retrial:
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x21
-	bhi	.L1723
+	bhi	.L1722
 	bl	sandisk_set_rr_para
-.L1724:
+.L1723:
 	sxtw	x19, w19
 	mov	w0, 255
 	add	x19, x19, 8
@@ -10154,14 +10165,14 @@ toshiba_read_retrial:
 	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L1725
+	bcc	.L1724
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L1725:
+.L1724:
 	cmp	w28, 256
 	ccmn	w28, #1, 4, ne
-	bne	.L1726
+	bne	.L1725
 	adrp	x0, .LC107
 	mov	w4, w28
 	mov	w3, w20
@@ -10169,12 +10180,12 @@ toshiba_read_retrial:
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC107
 	bl	printf
-.L1726:
+.L1725:
 	bl	nandc_wait_flash_ready
-	cbz	w23, .L1710
+	cbz	w23, .L1709
 	mov	w0, 4
 	bl	nandc_set_if_mode
-.L1710:
+.L1709:
 	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10183,13 +10194,13 @@ toshiba_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1729:
-	mov	w23, 0
-	b	.L1712
 .L1728:
 	mov	w23, 0
 	b	.L1711
-.L1722:
+.L1727:
+	mov	w23, 0
+	b	.L1710
+.L1721:
 	ldr	x0, [x29, 120]
 	mov	w1, w20
 	ldrb	w0, [x0, #:lo12:.LANCHOR23]
@@ -10197,22 +10208,22 @@ toshiba_read_retrial:
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x21
-	bhi	.L1714
+	bhi	.L1713
 	bl	sandisk_set_rr_para
-.L1715:
+.L1714:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0, #:lo12:.LANCHOR23]
 	cmp	w0, 34
-	bne	.L1716
+	bne	.L1715
 	adrp	x0, .LANCHOR154
 	ldrb	w0, [x0, #:lo12:.LANCHOR154]
 	sub	w0, w0, #3
 	cmp	w20, w0
-	bne	.L1716
+	bne	.L1715
 	ldr	x1, [x29, 96]
 	mov	w0, 179
 	str	w0, [x1, 8]
-.L1716:
+.L1715:
 	ldr	x0, [x29, 104]
 	mov	w1, 38
 	ldr	w4, [x29, 116]
@@ -10227,7 +10238,7 @@ toshiba_read_retrial:
 	bl	flash_read_page
 	mov	w28, w0
 	cmn	w0, #1
-	beq	.L1719
+	beq	.L1718
 	cmn	w24, #1
 	csel	w24, w24, w0, ne
 	adrp	x0, .LANCHOR151
@@ -10238,16 +10249,16 @@ toshiba_read_retrial:
 	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L1721
-.L1719:
+	bcc	.L1720
+.L1718:
 	add	w20, w20, 1
-	b	.L1713
-.L1714:
+	b	.L1712
+.L1713:
 	bl	toshiba_set_rr_para
-	b	.L1715
-.L1723:
+	b	.L1714
+.L1722:
 	bl	toshiba_set_rr_para
-	b	.L1724
+	b	.L1723
 	.size	toshiba_read_retrial, .-toshiba_read_retrial
 	.section	.text.hynix_read_retrial,"ax",@progbits
 	.align	2
@@ -10280,24 +10291,24 @@ hynix_read_retrial:
 	mov	w5, 0
 	adrp	x7, .LANCHOR151
 	adrp	x8, .LANCHOR153
-.L1743:
+.L1742:
 	cmp	w5, w24
-	bcc	.L1748
-.L1747:
+	bcc	.L1747
+.L1746:
 	adrp	x0, .LANCHOR43
 	add	x23, x28, x23
 	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	strb	w20, [x23, 8]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L1749
+	bcc	.L1748
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L1749:
+.L1748:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L1742
+	bne	.L1741
 	adrp	x0, .LC108
 	mov	w4, w19
 	mov	w3, w5
@@ -10305,7 +10316,7 @@ hynix_read_retrial:
 	mov	w1, w5
 	add	x0, x0, :lo12:.LC108
 	bl	printf
-.L1742:
+.L1741:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10314,7 +10325,7 @@ hynix_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1748:
+.L1747:
 	add	w20, w20, 1
 	stp	x6, x8, [x29, 96]
 	and	w20, w20, 255
@@ -10335,7 +10346,7 @@ hynix_read_retrial:
 	cmn	w0, #1
 	ldp	x6, x8, [x29, 96]
 	ldr	x7, [x29, 112]
-	beq	.L1745
+	beq	.L1744
 	ldrb	w1, [x6]
 	cmn	w19, #1
 	csel	w19, w19, w0, ne
@@ -10343,13 +10354,13 @@ hynix_read_retrial:
 	ldr	x26, [x8, #:lo12:.LANCHOR153]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L1751
-.L1745:
+	bcc	.L1750
+.L1744:
 	add	w5, w5, 1
-	b	.L1743
-.L1751:
+	b	.L1742
+.L1750:
 	mov	w19, w0
-	b	.L1747
+	b	.L1746
 	.size	hynix_read_retrial, .-hynix_read_retrial
 	.section	.text.flash_ddr_tuning_read,"ax",@progbits
 	.align	2
@@ -10385,7 +10396,7 @@ flash_ddr_tuning_read:
 	mov	w19, -1
 	str	wzr, [x29, 140]
 	str	x0, [x29, 112]
-.L1767:
+.L1766:
 	mov	w0, w25
 	bl	nandc_set_ddr_para
 	ldr	w4, [x29, 120]
@@ -10397,7 +10408,7 @@ flash_ddr_tuning_read:
 	mov	w4, w0
 	ldr	x0, [x29, 112]
 	ldr	w0, [x0]
-	tbz	x0, 4, .L1762
+	tbz	x0, 4, .L1761
 	mov	w3, w4
 	str	w4, [x29, 108]
 	mov	w2, w20
@@ -10405,10 +10416,10 @@ flash_ddr_tuning_read:
 	mov	x0, x21
 	bl	printf
 	ldr	w4, [x29, 108]
-.L1762:
+.L1761:
 	add	w0, w27, 1
 	cmp	w4, w0
-	bhi	.L1763
+	bhi	.L1762
 	adrp	x0, .LANCHOR151
 	ldr	x0, [x0, #:lo12:.LANCHOR151]
 	str	x0, [x29, 128]
@@ -10416,40 +10427,40 @@ flash_ddr_tuning_read:
 	ldr	x26, [x0, #:lo12:.LANCHOR153]
 	ldrb	w0, [x22]
 	cmp	w4, w0, lsr 2
-	bcs	.L1772
+	bcs	.L1771
 	add	w24, w24, 1
 	cmp	w24, 7
-	bls	.L1772
+	bls	.L1771
 	sub	w28, w25, w24
 	mov	w27, w4
 	mov	w19, 0
-.L1765:
+.L1764:
 	ldr	w0, [x29, 140]
 	cmp	w24, w23
 	csel	w28, w28, w0, cs
-.L1766:
-	cbz	w28, .L1768
+.L1765:
+	cbz	w28, .L1767
 	adrp	x0, .LANCHOR43
 	mov	w1, 3
 	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	udiv	w0, w0, w1
 	cmp	w0, w27
-	bls	.L1768
+	bls	.L1767
 	mov	w1, w28
 	adrp	x0, .LC110
 	add	x0, x0, :lo12:.LC110
 	bl	printf
 	mov	w0, w28
-.L1782:
+.L1781:
 	bl	nandc_set_ddr_para
-	cbz	w19, .L1761
+	cbz	w19, .L1760
 	ldr	w1, [x29, 136]
 	adrp	x0, .LC111
 	mov	w2, w20
 	add	x0, x0, :lo12:.LC111
 	mov	w27, w19
 	bl	printf
-.L1761:
+.L1760:
 	mov	w0, w27
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10458,29 +10469,29 @@ flash_ddr_tuning_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1763:
+.L1762:
 	cmp	w24, w23
-	bls	.L1773
+	bls	.L1772
 	sub	w0, w28, w24
 	str	w0, [x29, 140]
 	cmp	w24, 7
-	bhi	.L1766
+	bhi	.L1765
 	mov	w23, w24
-.L1773:
-	mov	w24, 0
-	b	.L1764
 .L1772:
+	mov	w24, 0
+	b	.L1763
+.L1771:
 	mov	w28, w25
 	mov	w27, w4
 	mov	w19, 0
-.L1764:
+.L1763:
 	add	w25, w25, 2
 	cmp	w25, 50
-	bne	.L1767
-	b	.L1765
-.L1768:
+	bne	.L1766
+	b	.L1764
+.L1767:
 	ldrb	w0, [x29, 124]
-	b	.L1782
+	b	.L1781
 	.size	flash_ddr_tuning_read, .-flash_ddr_tuning_read
 	.section	.text.flash_read_page_en,"ax",@progbits
 	.align	2
@@ -10504,47 +10515,47 @@ flash_read_page_en:
 	ubfx	x26, x19, 24, 2
 	mov	x25, x0
 	cmp	w1, w21
-	bhi	.L1784
+	bhi	.L1783
 	adrp	x1, .LANCHOR155
 	adrp	x0, .LC0
-	mov	w2, 377
+	mov	w2, 380
 	add	x1, x1, :lo12:.LANCHOR155
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1784:
+.L1783:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w20, [x0, w21, sxtw]
 	ldrb	w0, [x25, #:lo12:.LANCHOR18]
 	cmp	w0, w21
-	bcs	.L1785
+	bcs	.L1784
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 6, .L1785
+	tbz	x0, 6, .L1784
 	adrp	x0, .LC112
 	mov	w3, w19
 	mov	w2, w21
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC112
 	bl	printf
-.L1785:
-	cbnz	w26, .L1786
+.L1784:
+	cbnz	w26, .L1785
 	adrp	x0, .LANCHOR0
 	adrp	x1, .LANCHOR1
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L1787
-	ldrb	w0, [x1, #:lo12:.LANCHOR1]
 	cbz	w0, .L1786
-.L1787:
+	ldrb	w0, [x1, #:lo12:.LANCHOR1]
+	cbz	w0, .L1785
+.L1786:
 	adrp	x0, .LANCHOR2
 	ldrb	w1, [x1, #:lo12:.LANCHOR1]
 	ldrh	w2, [x0, #:lo12:.LANCHOR2]
 	udiv	w0, w19, w2
 	mul	w0, w0, w2
 	sub	w19, w19, w0
-	cbz	w1, .L1788
+	cbz	w1, .L1787
 	add	w19, w0, w19, lsl 1
-.L1786:
+.L1785:
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -10553,16 +10564,16 @@ flash_read_page_en:
 	bl	flash_read_page
 	mov	w21, w0
 	cmn	w0, #1
-	bne	.L1783
+	bne	.L1782
 	adrp	x25, .LANCHOR45
 	mov	x26, x25
 	ldrb	w27, [x25, #:lo12:.LANCHOR45]
-	cbnz	w27, .L1790
-.L1793:
+	cbnz	w27, .L1789
+.L1792:
 	adrp	x0, .LANCHOR156
 	ldr	x5, [x0, #:lo12:.LANCHOR156]
-	cbnz	x5, .L1791
-.L1792:
+	cbnz	x5, .L1790
+.L1791:
 	ldrb	w4, [x26, #:lo12:.LANCHOR45]
 	mov	w3, -1
 	mov	w2, w19
@@ -10572,7 +10583,7 @@ flash_read_page_en:
 	bl	printf
 	adrp	x0, .LANCHOR20
 	ldrb	w0, [x0, #:lo12:.LANCHOR20]
-	cbz	w0, .L1783
+	cbz	w0, .L1782
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -10585,13 +10596,13 @@ flash_read_page_en:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	b	flash_ddr_tuning_read
-.L1788:
+.L1787:
 	adrp	x1, .LANCHOR3
 	add	x1, x1, :lo12:.LANCHOR3
 	ldrh	w19, [x1, w19, uxtw 1]
 	add	w19, w19, w0
-	b	.L1786
-.L1790:
+	b	.L1785
+.L1789:
 	strb	wzr, [x25, #:lo12:.LANCHOR45]
 	mov	w4, w24
 	mov	x3, x23
@@ -10601,10 +10612,10 @@ flash_read_page_en:
 	bl	flash_read_page
 	strb	w27, [x25, #:lo12:.LANCHOR45]
 	cmn	w0, #1
-	beq	.L1793
-.L1811:
+	beq	.L1792
+.L1810:
 	mov	w21, w0
-.L1783:
+.L1782:
 	mov	w0, w21
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -10613,7 +10624,7 @@ flash_read_page_en:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1791:
+.L1790:
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -10621,8 +10632,8 @@ flash_read_page_en:
 	mov	w0, w20
 	blr	x5
 	cmn	w0, #1
-	beq	.L1792
-	b	.L1811
+	beq	.L1791
+	b	.L1810
 	.size	flash_read_page_en, .-flash_read_page_en
 	.section	.text.flash_get_last_written_page,"ax",@progbits
 	.align	2
@@ -10652,23 +10663,23 @@ flash_get_last_written_page:
 	add	w1, w19, w26
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L1813
+	bne	.L1812
 	mov	w27, 0
 	mov	w28, 2
-.L1814:
-	cmp	w27, w19
-	ble	.L1817
 .L1813:
+	cmp	w27, w19
+	ble	.L1816
+.L1812:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1818
+	tbz	x0, 12, .L1817
 	ldr	w3, [x22]
 	adrp	x0, .LC114
 	mov	w2, w19
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC114
 	bl	printf
-.L1818:
+.L1817:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10677,7 +10688,7 @@ flash_get_last_written_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1817:
+.L1816:
 	add	w20, w27, w19
 	mov	w4, w25
 	mov	x3, x22
@@ -10687,14 +10698,14 @@ flash_get_last_written_page:
 	add	w1, w26, w20, sxth
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L1815
+	bne	.L1814
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L1814
-.L1815:
+	b	.L1813
+.L1814:
 	add	w20, w20, 1
 	sxth	w27, w20
-	b	.L1814
+	b	.L1813
 	.size	flash_get_last_written_page, .-flash_get_last_written_page
 	.section	.text.flash_get_last_written_page_ext,"ax",@progbits
 	.align	2
@@ -10731,7 +10742,7 @@ flash_info_blk_init:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	tbz	x0, 12, .L1825
+	tbz	x0, 12, .L1824
 	ldr	x4, [x20, #:lo12:.LANCHOR26]
 	adrp	x2, .LANCHOR157
 	adrp	x0, .LC115
@@ -10740,7 +10751,7 @@ flash_info_blk_init:
 	mov	w1, 49
 	add	x0, x0, :lo12:.LC115
 	bl	printf
-.L1825:
+.L1824:
 	adrp	x21, .LANCHOR158
 	adrp	x23, .LANCHOR2
 	mov	w24, 21321
@@ -10748,7 +10759,7 @@ flash_info_blk_init:
 	mov	x22, x21
 	mov	w19, 4
 	movk	w24, 0x5359, lsl 16
-.L1828:
+.L1827:
 	ldrh	w1, [x26]
 	mov	w4, 4
 	ldr	x3, [x21, #:lo12:.LANCHOR158]
@@ -10759,18 +10770,18 @@ flash_info_blk_init:
 	mul	w1, w1, w19
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L1826
+	beq	.L1825
 	ldr	x2, [x20, #:lo12:.LANCHOR26]
 	ldr	w0, [x2]
 	cmp	w0, w24
-	beq	.L1827
-.L1826:
+	beq	.L1826
+.L1825:
 	add	w19, w19, 1
 	cmp	w19, 16
-	bne	.L1828
-.L1852:
+	bne	.L1827
+.L1851:
 	mov	w0, -1
-.L1824:
+.L1823:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -10778,13 +10789,13 @@ flash_info_blk_init:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1836:
+.L1835:
 	ldr	x0, [x25]
 	ldr	w1, [x0]
 	cmp	w1, w24
-	bne	.L1837
+	bne	.L1836
 	ldr	w19, [x0, 4]
-.L1830:
+.L1829:
 	add	x24, x21, :lo12:.LANCHOR159
 	ldrh	w0, [x23, #:lo12:.LANCHOR2]
 	ldr	x3, [x22, #:lo12:.LANCHOR158]
@@ -10795,21 +10806,21 @@ flash_info_blk_init:
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L1831
+	beq	.L1830
 	ldr	x0, [x20, #:lo12:.LANCHOR26]
 	mov	w1, 21321
 	movk	w1, 0x5359, lsl 16
 	ldr	w2, [x0]
 	cmp	w2, w1
-	bne	.L1831
+	bne	.L1830
 	ldr	w1, [x0, 4]
 	cmp	w19, w1
-	bcs	.L1831
+	bcs	.L1830
 	ldrb	w1, [x0, 37]
 	ldrb	w0, [x0, 36]
 	strb	w1, [x21, #:lo12:.LANCHOR159]
 	strb	w0, [x24, 1]
-.L1831:
+.L1830:
 	ldrb	w1, [x21, #:lo12:.LANCHOR159]
 	add	x24, x21, :lo12:.LANCHOR159
 	ldr	x3, [x22, #:lo12:.LANCHOR158]
@@ -10825,17 +10836,17 @@ flash_info_blk_init:
 	mov	w23, 21321
 	movk	w23, 0x5359, lsl 16
 	madd	w21, w21, w0, w19
-.L1832:
-	tbz	w19, #31, .L1834
+.L1831:
+	tbz	w19, #31, .L1833
 	cmn	w19, #1
-	bne	.L1835
+	bne	.L1834
 	ldr	x0, [x20, #:lo12:.LANCHOR26]
 	ldr	w1, [x0]
 	adrp	x0, .LC116
 	add	x0, x0, :lo12:.LC116
 	bl	printf
-	b	.L1852
-.L1834:
+	b	.L1851
+.L1833:
 	ldr	x3, [x22, #:lo12:.LANCHOR158]
 	mov	w4, 4
 	ldr	x2, [x20, #:lo12:.LANCHOR26]
@@ -10843,20 +10854,20 @@ flash_info_blk_init:
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L1833
+	beq	.L1832
 	ldr	x0, [x20, #:lo12:.LANCHOR26]
 	ldr	w0, [x0]
 	cmp	w0, w23
-	bne	.L1833
-.L1835:
+	bne	.L1832
+.L1834:
 	mov	w0, 0
-	b	.L1824
-.L1833:
+	b	.L1823
+.L1832:
 	sub	w19, w19, #1
 	sub	w21, w21, #1
 	sxth	w19, w19
-	b	.L1832
-.L1827:
+	b	.L1831
+.L1826:
 	adrp	x21, .LANCHOR159
 	add	x1, x21, :lo12:.LANCHOR159
 	ldrb	w3, [x2, 37]
@@ -10870,10 +10881,10 @@ flash_info_blk_init:
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	bne	.L1836
-.L1837:
+	bne	.L1835
+.L1836:
 	mov	w19, 0
-	b	.L1830
+	b	.L1829
 	.size	flash_info_blk_init, .-flash_info_blk_init
 	.section	.text.flash_ddr_para_scan,"ax",@progbits
 	.align	2
@@ -10912,15 +10923,15 @@ flash_ddr_para_scan:
 	bl	flash_read_page
 	cmn	w0, #1
 	mov	x0, x19
-	bne	.L1854
+	bne	.L1853
 	ldrb	w1, [x20, #:lo12:.LANCHOR42]
-	tbz	x1, 0, .L1854
+	tbz	x1, 0, .L1853
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, w21
 	bl	nandc_set_if_mode
 	strb	wzr, [x19, #:lo12:.LANCHOR20]
-.L1855:
+.L1854:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -10928,10 +10939,10 @@ flash_ddr_para_scan:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1854:
+.L1853:
 	mov	w1, 1
 	strb	w1, [x0, #:lo12:.LANCHOR20]
-	b	.L1855
+	b	.L1854
 	.size	flash_ddr_para_scan, .-flash_ddr_para_scan
 	.section	.text.flash_complete_plane_page_read,"ax",@progbits
 	.align	2
@@ -10951,14 +10962,14 @@ flash_complete_plane_page_read:
 	ldrb	w0, [x0, #:lo12:.LANCHOR18]
 	mov	x22, x2
 	cmp	w0, w23
-	bhi	.L1861
+	bhi	.L1860
 	adrp	x1, .LANCHOR162
 	adrp	x0, .LC0
-	mov	w2, 782
+	mov	w2, 785
 	add	x1, x1, :lo12:.LANCHOR162
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1861:
+.L1860:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w6, [x0, w23, sxtw]
@@ -10966,11 +10977,11 @@ flash_complete_plane_page_read:
 	ldr	x4, [x0, #:lo12:.LANCHOR13]
 	mov	w0, w6
 	bl	nandc_cs
-	cbnz	w20, .L1862
+	cbnz	w20, .L1861
 	mov	w0, w19
 	bl	slc_phy_page_address_calc
 	mov	w19, w0
-.L1862:
+.L1861:
 	adrp	x0, .LANCHOR19+16
 	and	x1, x6, 255
 	and	w3, w19, 255
@@ -10979,28 +10990,28 @@ flash_complete_plane_page_read:
 	adrp	x5, .LANCHOR16
 	cmp	w0, 1
 	lsr	w0, w19, 16
-	bne	.L1863
+	bne	.L1862
 	add	x1, x4, x1, lsl 8
 	mov	w4, 6
-.L1874:
+.L1873:
 	str	w4, [x1, 2056]
 	str	wzr, [x1, 2052]
 	str	wzr, [x1, 2052]
 	str	w3, [x1, 2052]
 	str	w2, [x1, 2052]
 	str	w0, [x1, 2052]
-.L1872:
+.L1871:
 	mov	w0, 224
 	str	w0, [x1, 2056]
 	ldr	x0, [x5, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1866
-	cbz	w20, .L1866
+	bne	.L1865
+	cbz	w20, .L1865
 	add	w19, w19, w19, lsl 1
 	sub	w20, w20, #1
 	add	w0, w19, w20
-.L1873:
+.L1872:
 	bl	nandc_set_seed
 	adrp	x0, .LANCHOR34+9
 	mov	x4, x22
@@ -11017,15 +11028,15 @@ flash_complete_plane_page_read:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1863:
+.L1862:
 	ldr	x7, [x5, #:lo12:.LANCHOR16]
 	add	x1, x4, x1, lsl 8
 	ldrb	w7, [x7, 12]
 	cmp	w7, 3
-	bne	.L1865
+	bne	.L1864
 	mov	w4, 5
-	b	.L1874
-.L1865:
+	b	.L1873
+.L1864:
 	str	wzr, [x1, 2056]
 	str	wzr, [x1, 2052]
 	str	wzr, [x1, 2052]
@@ -11036,10 +11047,10 @@ flash_complete_plane_page_read:
 	str	w0, [x1, 2056]
 	str	wzr, [x1, 2052]
 	str	wzr, [x1, 2052]
-	b	.L1872
-.L1866:
+	b	.L1871
+.L1865:
 	mov	w0, w19
-	b	.L1873
+	b	.L1872
 	.size	flash_complete_plane_page_read, .-flash_complete_plane_page_read
 	.section	.text.flash_complete_page_read,"ax",@progbits
 	.align	2
@@ -11062,14 +11073,14 @@ flash_complete_page_read:
 	mov	x25, x2
 	ubfx	x21, x23, 24, 2
 	cmp	w0, w20
-	bhi	.L1876
+	bhi	.L1875
 	adrp	x1, .LANCHOR163
 	adrp	x0, .LC0
-	mov	w2, 904
+	mov	w2, 907
 	add	x1, x1, :lo12:.LANCHOR163
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1876:
+.L1875:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w22, [x0, w20, sxtw]
@@ -11077,11 +11088,11 @@ flash_complete_page_read:
 	ldr	x4, [x0, #:lo12:.LANCHOR13]
 	mov	w0, w22
 	bl	nandc_cs
-	cbnz	w21, .L1877
+	cbnz	w21, .L1876
 	mov	w0, w19
 	bl	slc_phy_page_address_calc
 	mov	w19, w0
-.L1877:
+.L1876:
 	ubfiz	x0, x22, 8, 8
 	mov	w1, 5
 	add	x0, x4, x0
@@ -11100,12 +11111,12 @@ flash_complete_page_read:
 	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1878
-	cbz	w21, .L1878
+	bne	.L1877
+	cbz	w21, .L1877
 	sub	w0, w21, #1
 	add	w1, w19, w19, lsl 1
 	add	w0, w0, w1
-.L1905:
+.L1904:
 	adrp	x20, .LANCHOR34
 	add	x28, x20, :lo12:.LANCHOR34
 	bl	nandc_set_seed
@@ -11116,10 +11127,10 @@ flash_complete_page_read:
 	mov	w0, w22
 	bl	nandc_xfer
 	cmn	w0, #1
-	bne	.L1880
+	bne	.L1879
 	adrp	x26, .LANCHOR45
 	ldrb	w27, [x26, #:lo12:.LANCHOR45]
-	cbz	w27, .L1881
+	cbz	w27, .L1880
 	ldrb	w4, [x28, 9]
 	mov	x3, x25
 	strb	wzr, [x26, #:lo12:.LANCHOR45]
@@ -11128,16 +11139,16 @@ flash_complete_page_read:
 	mov	w0, w22
 	bl	flash_read_page
 	strb	w27, [x26, #:lo12:.LANCHOR45]
-	cbnz	w21, .L1882
-.L1887:
+	cbnz	w21, .L1881
+.L1886:
 	adrp	x1, .LANCHOR0
 	ldrb	w1, [x1, #:lo12:.LANCHOR0]
-	cbz	w1, .L1882
+	cbz	w1, .L1881
 	adrp	x1, .LANCHOR43
 	ldrb	w1, [x1, #:lo12:.LANCHOR43]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	blt	.L1882
+	blt	.L1881
 	add	x20, x20, :lo12:.LANCHOR34
 	ldrb	w1, [x20, 19]
 	sub	w1, w1, #4
@@ -11145,7 +11156,7 @@ flash_complete_page_read:
 	cmp	w1, 3
 	mov	w1, 256
 	csel	w0, w0, w1, hi
-.L1875:
+.L1874:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -11153,17 +11164,17 @@ flash_complete_page_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1878:
+.L1877:
 	mov	w0, w19
-	b	.L1905
-.L1882:
+	b	.L1904
+.L1881:
 	cmn	w0, #1
-	bne	.L1875
-.L1888:
+	bne	.L1874
+.L1887:
 	adrp	x0, .LANCHOR156
 	ldr	x5, [x0, #:lo12:.LANCHOR156]
-	cbnz	x5, .L1884
-.L1886:
+	cbnz	x5, .L1883
+.L1885:
 	adrp	x0, .LANCHOR45
 	mov	w3, -1
 	mov	w2, w23
@@ -11174,10 +11185,10 @@ flash_complete_page_read:
 	bl	printf
 	adrp	x0, .LANCHOR20
 	ldrb	w0, [x0, #:lo12:.LANCHOR20]
-	cbnz	w0, .L1885
+	cbnz	w0, .L1884
 	mov	w0, -1
-	b	.L1875
-.L1884:
+	b	.L1874
+.L1883:
 	add	x0, x20, :lo12:.LANCHOR34
 	mov	x3, x25
 	mov	x2, x24
@@ -11186,9 +11197,9 @@ flash_complete_page_read:
 	mov	w0, w22
 	blr	x5
 	cmn	w0, #1
-	beq	.L1886
-	b	.L1875
-.L1885:
+	beq	.L1885
+	b	.L1874
+.L1884:
 	add	x20, x20, :lo12:.LANCHOR34
 	orr	w1, w19, w21, lsl 24
 	mov	x3, x25
@@ -11202,12 +11213,12 @@ flash_complete_page_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	flash_ddr_tuning_read
+.L1879:
+	cbz	w21, .L1886
+	b	.L1874
 .L1880:
-	cbz	w21, .L1887
-	b	.L1875
-.L1881:
-	cbnz	w21, .L1888
-	b	.L1887
+	cbnz	w21, .L1887
+	b	.L1886
 	.size	flash_complete_page_read, .-flash_complete_page_read
 	.section	.text.queue_wait_first_req_completed,"ax",@progbits
 	.align	2
@@ -11223,59 +11234,59 @@ queue_wait_first_req_completed:
 	cmp	w0, 255
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	bne	.L1907
-.L1936:
-	mov	w22, 0
-	b	.L1906
-.L1907:
+	bne	.L1906
+.L1935:
+	mov	w21, 0
+	b	.L1905
+.L1906:
 	adrp	x19, .LANCHOR49
 	sxtw	x20, w0
 	add	x1, x19, :lo12:.LANCHOR49
 	add	x1, x1, x20, lsl 6
 	ldrb	w2, [x1, 58]
-	ldr	w22, [x1, 40]
+	ldr	w24, [x1, 40]
 	sub	w3, w2, #1
 	cmp	w3, 9
-	bhi	.L1936
-	adrp	x1, .L1910
-	add	x1, x1, :lo12:.L1910
+	bhi	.L1935
+	adrp	x1, .L1909
+	add	x1, x1, :lo12:.L1909
 	ldrh	w1, [x1,w3,uxtw #1]
-	adr	x3, .Lrtx1910
+	adr	x3, .Lrtx1909
 	add	x1, x3, w1, sxth #2
 	br	x1
-.Lrtx1910:
+.Lrtx1909:
 	.section	.rodata.queue_wait_first_req_completed,"a",@progbits
 	.align	0
 	.align	2
-.L1910:
-	.2byte	(.L1909 - .Lrtx1910) / 4
-	.2byte	(.L1911 - .Lrtx1910) / 4
-	.2byte	(.L1912 - .Lrtx1910) / 4
-	.2byte	(.L1912 - .Lrtx1910) / 4
-	.2byte	(.L1912 - .Lrtx1910) / 4
-	.2byte	(.L1913 - .Lrtx1910) / 4
-	.2byte	(.L1914 - .Lrtx1910) / 4
-	.2byte	(.L1915 - .Lrtx1910) / 4
-	.2byte	(.L1912 - .Lrtx1910) / 4
-	.2byte	(.L1915 - .Lrtx1910) / 4
-	.section	.text.queue_wait_first_req_completed
 .L1909:
+	.2byte	(.L1908 - .Lrtx1909) / 4
+	.2byte	(.L1910 - .Lrtx1909) / 4
+	.2byte	(.L1911 - .Lrtx1909) / 4
+	.2byte	(.L1911 - .Lrtx1909) / 4
+	.2byte	(.L1911 - .Lrtx1909) / 4
+	.2byte	(.L1912 - .Lrtx1909) / 4
+	.2byte	(.L1913 - .Lrtx1909) / 4
+	.2byte	(.L1914 - .Lrtx1909) / 4
+	.2byte	(.L1911 - .Lrtx1909) / 4
+	.2byte	(.L1914 - .Lrtx1909) / 4
+	.section	.text.queue_wait_first_req_completed
+.L1908:
 	mov	w1, 64
-	mov	w0, w22
+	mov	w0, w24
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1936
+	tbz	x0, 6, .L1935
 	add	x0, x19, :lo12:.LANCHOR49
 	add	x0, x0, x20, lsl 6
 	ldp	x1, x2, [x0, 8]
-	cbz	x2, .L1917
+	cbz	x2, .L1916
 	ldrb	w3, [x0, 56]
 	adrp	x0, .LANCHOR121
 	ldrb	w0, [x0, #:lo12:.LANCHOR121]
 	cmp	w3, w0
 	csel	x1, x1, x2, ne
-.L1917:
+.L1916:
 	add	x19, x19, :lo12:.LANCHOR49
-	mov	w0, w22
+	mov	w0, w24
 	add	x20, x19, x20, lsl 6
 	ldr	x2, [x20, 24]
 	bl	flash_complete_page_read
@@ -11285,12 +11296,12 @@ queue_wait_first_req_completed:
 	ldrb	w0, [x20, 2]
 	orr	w0, w0, 8
 	strb	w0, [x20, 2]
-	b	.L1936
-.L1911:
+	b	.L1935
+.L1910:
 	mov	w1, 64
-	mov	w0, w22
+	mov	w0, w24
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1936
+	tbz	x0, 6, .L1935
 	add	x0, x19, :lo12:.LANCHOR49
 	lsl	x2, x20, 6
 	add	x1, x0, x2
@@ -11298,23 +11309,23 @@ queue_wait_first_req_completed:
 	add	x0, x0, x21, lsl 6
 	ldr	x24, [x0, 8]
 	ldp	x26, x0, [x1, 8]
-	cbz	x0, .L1918
+	cbz	x0, .L1917
 	ldrb	w2, [x1, 56]
 	adrp	x1, .LANCHOR121
 	ldrb	w1, [x1, #:lo12:.LANCHOR121]
 	cmp	w2, w1
 	csel	x26, x26, x0, ne
-.L1918:
+.L1917:
 	add	x0, x19, :lo12:.LANCHOR49
 	add	x0, x0, x21, lsl 6
 	ldr	x1, [x0, 16]
-	cbz	x1, .L1919
+	cbz	x1, .L1918
 	ldrb	w2, [x0, 56]
 	adrp	x0, .LANCHOR121
 	ldrb	w0, [x0, #:lo12:.LANCHOR121]
 	cmp	w2, w0
 	csel	x24, x24, x1, ne
-.L1919:
+.L1918:
 	add	x22, x19, :lo12:.LANCHOR49
 	mov	x1, x26
 	add	x27, x22, x20, lsl 6
@@ -11329,15 +11340,15 @@ queue_wait_first_req_completed:
 	bl	flash_complete_plane_page_read
 	mov	w25, w0
 	cmn	w23, #1
-	beq	.L1920
+	beq	.L1919
 	ldr	w0, [x27, 36]
 	cmn	w0, #1
-	beq	.L1921
+	beq	.L1920
 	ldr	x1, [x27, 24]
 	ldr	w1, [x1, 4]
 	cmp	w0, w1
-	beq	.L1921
-.L1920:
+	beq	.L1920
+.L1919:
 	add	x22, x19, :lo12:.LANCHOR49
 	adrp	x2, .LANCHOR121
 	add	x22, x22, x20, lsl 6
@@ -11351,36 +11362,36 @@ queue_wait_first_req_completed:
 	mov	w23, w0
 	ldr	w2, [x22, 36]
 	cmn	w2, #1
-	beq	.L1922
+	beq	.L1921
 	ldr	x0, [x22, 24]
 	ldr	w4, [x0, 4]
 	cmp	w2, w4
-	beq	.L1922
+	beq	.L1921
 	adrp	x1, .LANCHOR14
 	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 6, .L1922
+	tbz	x1, 6, .L1921
 	ldr	w3, [x0]
 	adrp	x0, .LC118
 	ldr	w1, [x22, 40]
 	add	x0, x0, :lo12:.LC118
 	bl	printf
-.L1922:
+.L1921:
 	add	x0, x19, :lo12:.LANCHOR49
 	add	x0, x0, x20, lsl 6
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L1921
+	beq	.L1920
 	ldr	x0, [x0, 24]
 	ldr	w0, [x0, 4]
 	cmp	w1, w0
-	beq	.L1921
+	beq	.L1920
 	adrp	x1, .LANCHOR164
 	adrp	x0, .LC0
 	mov	w2, 338
 	add	x1, x1, :lo12:.LANCHOR164
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1921:
+.L1920:
 	add	x0, x19, :lo12:.LANCHOR49
 	mov	w1, 12
 	add	x20, x0, x20, lsl 6
@@ -11390,16 +11401,16 @@ queue_wait_first_req_completed:
 	str	w23, [x20, 52]
 	orr	w1, w1, 8
 	strb	w1, [x20, 2]
-	beq	.L1923
+	beq	.L1922
 	add	x0, x0, x21, lsl 6
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L1925
+	beq	.L1924
 	ldr	x0, [x0, 24]
 	ldr	w0, [x0, 4]
 	cmp	w1, w0
-	beq	.L1925
-.L1923:
+	beq	.L1924
+.L1922:
 	add	x20, x19, :lo12:.LANCHOR49
 	adrp	x2, .LANCHOR121
 	add	x20, x20, x21, lsl 6
@@ -11412,36 +11423,36 @@ queue_wait_first_req_completed:
 	bl	flash_read_page_en
 	ldr	w2, [x20, 36]
 	cmn	w2, #1
-	beq	.L1927
+	beq	.L1926
 	ldr	x0, [x20, 24]
 	ldr	w4, [x0, 4]
 	cmp	w2, w4
-	beq	.L1927
+	beq	.L1926
 	adrp	x1, .LANCHOR14
 	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 6, .L1927
+	tbz	x1, 6, .L1926
 	ldr	w3, [x0]
 	adrp	x0, .LC118
 	ldr	w1, [x20, 40]
 	add	x0, x0, :lo12:.LC118
 	bl	printf
-.L1927:
+.L1926:
 	add	x0, x19, :lo12:.LANCHOR49
 	add	x0, x0, x21, lsl 6
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L1925
+	beq	.L1924
 	ldr	x0, [x0, 24]
 	ldr	w0, [x0, 4]
 	cmp	w1, w0
-	beq	.L1925
+	beq	.L1924
 	adrp	x1, .LANCHOR164
 	adrp	x0, .LC0
 	mov	w2, 353
 	add	x1, x1, :lo12:.LANCHOR164
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1925:
+.L1924:
 	add	x19, x19, :lo12:.LANCHOR49
 	mov	w0, 12
 	add	x21, x19, x21, lsl 6
@@ -11450,32 +11461,32 @@ queue_wait_first_req_completed:
 	str	w23, [x21, 52]
 	orr	w0, w0, 8
 	strb	w0, [x21, 2]
-	b	.L1936
-.L1912:
-	mov	w0, w22
+	b	.L1935
+.L1911:
 	mov	w1, 64
+	mov	w0, w24
 	bl	flash_wait_device_ready
-	mov	w22, w0
-	tbz	x22, 6, .L1936
+	mov	w21, w0
+	tbz	x21, 6, .L1935
 	add	x19, x19, :lo12:.LANCHOR49
 	mov	w0, 5
 	add	x20, x19, x20, lsl 6
-	tst	w22, w0
-	beq	.L1935
+	tst	w21, w0
+	beq	.L1934
 	ldrb	w1, [x20, 1]
 	mov	w0, 11
 	ldr	w3, [x20, 40]
 	mov	w4, 11
-	ldr	w2, [x20, 52]
 	strb	w0, [x20, 58]
+	mov	w2, w21
 	adrp	x0, .LC119
 	add	x0, x0, :lo12:.LC119
 	bl	printf
-.L1996:
+.L1995:
 	mov	w0, -1
 	str	w0, [x20, 52]
-	b	.L1906
-.L1915:
+	b	.L1905
+.L1914:
 	cmp	w2, 10
 	add	x21, x19, :lo12:.LANCHOR49
 	ubfiz	x0, x0, 6, 8
@@ -11483,47 +11494,48 @@ queue_wait_first_req_completed:
 	mov	w2, 9
 	add	x0, x21, x0
 	csel	w2, w2, w1, eq
-	ubfx	x3, x22, 21, 3
-.L1930:
+	ubfx	x3, x24, 21, 3
+	mov	x22, x21
+.L1929:
 	ldrb	w1, [x0]
 	cmp	w1, 255
-	bne	.L1934
-	mov	w22, -1
-	b	.L1906
-.L1934:
+	bne	.L1933
+	mov	w21, -1
+	b	.L1905
+.L1933:
 	sxtw	x23, w1
 	ubfiz	x0, x1, 6, 8
-	add	x1, x21, x23, lsl 6
-	add	x0, x21, x0
+	add	x1, x22, x23, lsl 6
+	add	x0, x22, x0
 	ldrb	w4, [x1, 58]
 	cmp	w4, w2
-	bne	.L1930
+	bne	.L1929
 	ldr	w1, [x1, 40]
 	ubfx	x1, x1, 21, 3
 	cmp	w3, w1
-	bne	.L1930
-	mov	w0, w22
+	bne	.L1929
+	mov	w0, w24
 	mov	w1, 64
 	bl	flash_wait_device_ready
 	mov	w24, w0
-	and	w22, w0, 64
-	tbz	x24, 6, .L1932
-	add	x21, x21, x20, lsl 6
-	ands	w22, w0, 15
-	beq	.L1933
-	ldrb	w1, [x21, 1]
+	and	w21, w0, 64
+	tbz	x24, 6, .L1931
+	add	x22, x22, x20, lsl 6
+	ands	w21, w0, 15
+	beq	.L1932
+	ldrb	w1, [x22, 1]
+	mov	w2, w0
+	ldr	w3, [x22, 40]
 	mov	w4, 11
-	ldr	w3, [x21, 40]
-	adrp	x0, .LC119
-	ldr	w2, [x21, 52]
-	add	x0, x0, :lo12:.LC119
-	mov	w22, w24
+	adrp	x0, .LC120
+	add	x0, x0, :lo12:.LC120
+	mov	w21, w24
 	bl	printf
 	mov	w0, 11
-	strb	w0, [x21, 58]
+	strb	w0, [x22, 58]
 	mov	w0, -1
-	str	w0, [x21, 52]
-.L1932:
+	str	w0, [x22, 52]
+.L1931:
 	add	x1, x19, :lo12:.LANCHOR49
 	add	x20, x1, x20, lsl 6
 	add	x1, x1, x23, lsl 6
@@ -11531,8 +11543,8 @@ queue_wait_first_req_completed:
 	strb	w0, [x1, 58]
 	ldr	w0, [x20, 52]
 	str	w0, [x1, 52]
-.L1906:
-	mov	w0, w22
+.L1905:
+	mov	w0, w21
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11540,40 +11552,40 @@ queue_wait_first_req_completed:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1933:
+.L1932:
 	mov	w0, 12
-	str	wzr, [x21, 52]
-	strb	w0, [x21, 58]
-	b	.L1932
-.L1913:
-	mov	w0, w22
+	str	wzr, [x22, 52]
+	strb	w0, [x22, 58]
+	b	.L1931
+.L1912:
 	mov	w1, 32
+	mov	w0, w24
 	bl	flash_wait_device_ready
-	mov	w22, w0
-	tbz	x22, 5, .L1936
+	mov	w21, w0
+	tbz	x21, 5, .L1935
 	add	x19, x19, :lo12:.LANCHOR49
-	tst	x22, 15
+	tst	x21, 15
 	add	x20, x19, x20, lsl 6
-	beq	.L1935
+	beq	.L1934
 	mov	w0, 11
 	strb	w0, [x20, 58]
-	b	.L1996
-.L1935:
+	b	.L1995
+.L1934:
 	mov	w0, 12
 	str	wzr, [x20, 52]
 	strb	w0, [x20, 58]
-	b	.L1936
-.L1914:
+	b	.L1935
+.L1913:
 	mov	w1, 64
-	mov	w0, w22
+	mov	w0, w24
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1936
+	tbz	x0, 6, .L1935
 	add	x19, x19, :lo12:.LANCHOR49
 	add	x19, x19, x20, lsl 6
 	str	w0, [x19, 52]
 	mov	w0, 6
 	strb	w0, [x19, 58]
-	b	.L1936
+	b	.L1935
 	.size	queue_wait_first_req_completed, .-queue_wait_first_req_completed
 	.section	.text.sblk_wait_write_queue_completed,"ax",@progbits
 	.align	2
@@ -11585,17 +11597,17 @@ sblk_wait_write_queue_completed:
 	str	x19, [sp, 16]
 	adrp	x19, .LANCHOR53
 	add	x19, x19, :lo12:.LANCHOR53
-.L1998:
+.L1997:
 	ldrb	w0, [x19]
 	cmp	w0, 255
-	bne	.L1999
+	bne	.L1998
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1999:
+.L1998:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L1998
+	b	.L1997
 	.size	sblk_wait_write_queue_completed, .-sblk_wait_write_queue_completed
 	.section	.text.ftl_read_page,"ax",@progbits
 	.align	2
@@ -11669,13 +11681,13 @@ sblk_read_page:
 	add	x21, x21, :lo12:.LANCHOR49
 	stp	x27, x28, [sp, 80]
 	adrp	x27, .LANCHOR105
-.L2006:
-	cbnz	w20, .L2016
-.L2029:
+.L2005:
+	cbnz	w20, .L2015
+.L2028:
 	adrp	x19, .LANCHOR49
 	add	x19, x19, :lo12:.LANCHOR49
-.L2017:
-	cbnz	w22, .L2019
+.L2016:
+	cbnz	w22, .L2018
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -11684,31 +11696,31 @@ sblk_read_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2016:
+.L2015:
 	ldrb	w24, [x19]
 	ldr	w25, [x19, 40]
-.L2007:
+.L2006:
 	mov	w1, 0
 	mov	w0, w25
 	bl	queue_lun_state
-	cbnz	w0, .L2008
+	cbnz	w0, .L2007
 	cmp	w20, 1
-	beq	.L2013
+	beq	.L2012
 	ldrb	w0, [x26]
-	cbnz	w0, .L2010
-.L2013:
+	cbnz	w0, .L2009
+.L2012:
 	mov	x0, x19
 	bl	queue_read_cmd
-	b	.L2011
-.L2008:
+	b	.L2010
+.L2007:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2007
-.L2010:
+	b	.L2006
+.L2009:
 	ldrb	w0, [x19]
 	ubfx	x4, x25, 21, 3
 	cmp	w0, 255
-	bne	.L2012
+	bne	.L2011
 	str	w4, [x29, 124]
 	mov	w2, 624
 	adrp	x1, .LANCHOR166
@@ -11717,18 +11729,18 @@ sblk_read_page:
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	ldr	w4, [x29, 124]
-.L2012:
+.L2011:
 	ldrb	w28, [x19]
 	sbfiz	x2, x28, 6, 32
 	add	x3, x21, x2
 	ldr	w1, [x3, 40]
 	ubfx	x0, x1, 21, 3
 	cmp	w4, w0
-	bne	.L2013
+	bne	.L2012
 	ldrh	w0, [x27, #:lo12:.LANCHOR105]
 	add	w25, w0, w25
 	cmp	w1, w25
-	bne	.L2013
+	bne	.L2012
 	ldr	w0, [x19, 40]
 	adrp	x25, .LANCHOR53
 	ldrb	w24, [x21, x2]
@@ -11754,26 +11766,26 @@ sblk_read_page:
 	add	x1, x21, x1
 	strb	w4, [x21, x2]
 	bl	buf_add_tail
-.L2011:
+.L2010:
 	subs	w20, w20, #1
-	beq	.L2029
+	beq	.L2028
 	ubfiz	x19, x24, 6, 8
 	add	x19, x21, x19
-	b	.L2006
-.L2019:
+	b	.L2005
+.L2018:
 	ldrb	w0, [x23, 58]
 	cmp	w0, 12
-	bne	.L2018
+	bne	.L2017
 	ldrb	w0, [x23]
 	sub	w22, w22, #1
 	cmp	w0, 255
-	beq	.L2018
+	beq	.L2017
 	ubfiz	x23, x0, 6, 8
 	add	x23, x19, x23
-.L2018:
+.L2017:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2017
+	b	.L2016
 	.size	sblk_read_page, .-sblk_read_page
 	.section	.text.flash_prog_page,"ax",@progbits
 	.align	2
@@ -11800,22 +11812,22 @@ flash_prog_page:
 	add	x23, x25, x23, lsl 8
 	and	w24, w1, 2097151
 	ubfx	x28, x21, 24, 2
-	tbz	x0, 4, .L2032
-	adrp	x0, .LC120
+	tbz	x0, 4, .L2031
+	adrp	x0, .LC121
 	mov	w3, w4
 	mov	w2, w28
-	add	x0, x0, :lo12:.LC120
+	add	x0, x0, :lo12:.LC121
 	bl	printf
-.L2032:
+.L2031:
 	bl	nandc_wait_flash_ready
 	mov	w0, w20
 	bl	hynix_reconfig_rr_para
 	mov	w0, w20
 	bl	nandc_cs
 	mov	w0, w20
-	cbnz	w28, .L2033
+	cbnz	w28, .L2032
 	bl	zftl_flash_enter_slc_mode
-.L2034:
+.L2033:
 	add	x19, x25, x19, lsl 8
 	mov	w0, 128
 	str	w0, [x19, 2056]
@@ -11844,15 +11856,15 @@ flash_prog_page:
 	mov	w2, w0
 	bl	nandc_de_cs.constprop.29
 	and	w19, w2, 4
-	tbz	x2, 2, .L2031
+	tbz	x2, 2, .L2030
 	ldr	w0, [x22, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2031
-	adrp	x0, .LC121
+	tbz	x0, 12, .L2030
+	adrp	x0, .LC122
 	mov	w2, w19
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC121
+	add	x0, x0, :lo12:.LC122
 	bl	printf
-.L2031:
+.L2030:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11861,9 +11873,9 @@ flash_prog_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2033:
+.L2032:
 	bl	zftl_flash_exit_slc_mode
-	b	.L2034
+	b	.L2033
 	.size	flash_prog_page, .-flash_prog_page
 	.section	.text.flash_test_blk,"ax",@progbits
 	.align	2
@@ -11871,83 +11883,74 @@ flash_prog_page:
 	.type	flash_test_blk, %function
 flash_test_blk:
 	stp	x29, x30, [sp, -64]!
+	mov	w2, 32
 	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR151
 	stp	x19, x20, [sp, 16]
+	and	w20, w0, 255
+	ldr	x0, [x22, #:lo12:.LANCHOR151]
+	adrp	x21, .LANCHOR153
 	and	w19, w1, 65535
-	stp	x21, x22, [sp, 32]
-	ands	w21, w0, 255
 	str	x23, [sp, 48]
-	bne	.L2047
-	adrp	x0, .LANCHOR167
-	ldrb	w0, [x0, #:lo12:.LANCHOR167]
-	cmp	w0, w19
-	bhi	.L2051
-.L2047:
-	adrp	x22, .LANCHOR160
-	adrp	x23, .LANCHOR161
-	mov	w2, 32
 	mov	w1, 165
-	ldr	x0, [x22, #:lo12:.LANCHOR160]
 	bl	ftl_memset
-	ldr	x0, [x23, #:lo12:.LANCHOR161]
+	ldr	x0, [x21, #:lo12:.LANCHOR153]
 	mov	w2, 8
 	mov	w1, 90
 	bl	ftl_memset
 	adrp	x0, .LANCHOR2
-	ldrh	w20, [x0, #:lo12:.LANCHOR2]
-	mov	w0, w21
-	mul	w20, w20, w19
-	mov	w1, w20
+	ldrh	w0, [x0, #:lo12:.LANCHOR2]
+	mul	w19, w0, w19
+	mov	w0, w20
+	mov	w1, w19
 	bl	flash_erase_block
 	cmn	w0, #1
-	beq	.L2049
-	adrp	x19, .LANCHOR34
-	add	x19, x19, :lo12:.LANCHOR34
-	ldr	x3, [x22, #:lo12:.LANCHOR160]
-	mov	w1, w20
-	ldr	x2, [x23, #:lo12:.LANCHOR161]
+	bne	.L2046
+.L2048:
+	mov	w21, -1
+.L2047:
+	mov	w1, w19
+	mov	w0, w20
+	bl	flash_erase_block
+	ldr	x23, [sp, 48]
 	mov	w0, w21
-	ldrb	w4, [x19, 9]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+.L2046:
+	adrp	x23, .LANCHOR34
+	add	x23, x23, :lo12:.LANCHOR34
+	ldr	x3, [x21, #:lo12:.LANCHOR153]
+	mov	w1, w19
+	ldr	x2, [x22, #:lo12:.LANCHOR151]
+	mov	w0, w20
+	ldrb	w4, [x23, 9]
 	bl	flash_prog_page
 	cmn	w0, #1
-	beq	.L2049
-	ldrb	w4, [x19, 9]
-	mov	w1, w20
-	ldr	x3, [x22, #:lo12:.LANCHOR160]
-	mov	w0, w21
-	ldr	x2, [x23, #:lo12:.LANCHOR161]
+	beq	.L2048
+	ldrb	w4, [x23, 9]
+	mov	w1, w19
+	ldr	x3, [x21, #:lo12:.LANCHOR153]
+	mov	w0, w20
+	ldr	x2, [x22, #:lo12:.LANCHOR151]
 	bl	flash_read_page
-	mov	w19, w0
 	cmn	w0, #1
-	beq	.L2049
-	ldr	x0, [x23, #:lo12:.LANCHOR161]
-	ldr	w1, [x0]
-	mov	w0, 23130
-	movk	w0, 0x5a5a, lsl 16
-	cmp	w1, w0
-	bne	.L2049
-	ldr	x0, [x22, #:lo12:.LANCHOR160]
+	beq	.L2048
+	ldr	x0, [x22, #:lo12:.LANCHOR151]
 	ldr	w1, [x0]
 	mov	w0, 42405
 	movk	w0, 0xa5a5, lsl 16
 	cmp	w1, w0
-	beq	.L2050
-.L2049:
-	mov	w19, -1
-.L2050:
-	mov	w1, w20
-	mov	w0, w21
-	bl	flash_erase_block
-	mov	w0, w19
-.L2046:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldr	x23, [sp, 48]
-	ldp	x29, x30, [sp], 64
-	ret
-.L2051:
-	mov	w0, 0
-	b	.L2046
+	bne	.L2048
+	ldr	x0, [x21, #:lo12:.LANCHOR153]
+	ldr	w1, [x0]
+	mov	w0, 23130
+	movk	w0, 0x5a5a, lsl 16
+	cmp	w1, w0
+	csetm	w21, ne
+	b	.L2047
 	.size	flash_test_blk, .-flash_test_blk
 	.section	.text.id_block_prog_msb_ff_data,"ax",@progbits
 	.align	2
@@ -11958,45 +11961,45 @@ id_block_prog_msb_ff_data:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	and	w22, w0, 255
-	adrp	x0, .LANCHOR168
+	adrp	x0, .LANCHOR167
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
-	ldrb	w0, [x0, #:lo12:.LANCHOR168]
+	ldrb	w0, [x0, #:lo12:.LANCHOR167]
 	str	x25, [sp, 64]
-	cbnz	w0, .L2062
+	cbnz	w0, .L2056
 	adrp	x20, .LANCHOR34
 	add	x20, x20, :lo12:.LANCHOR34
 	ldrb	w0, [x20, 19]
 	sub	w0, w0, #5
 	and	w3, w0, 255
 	cmp	w3, 63
-	bhi	.L2062
+	bhi	.L2056
 	and	w19, w2, 65535
 	mov	x2, 16391
 	movk	x2, 0x4000, lsl 16
 	movk	x2, 0x8000, lsl 48
 	lsr	x0, x2, x3
-	tbz	x0, 0, .L2062
+	tbz	x0, 0, .L2056
 	adrp	x21, .LANCHOR133
 	mov	w23, w1
 	add	x21, x21, :lo12:.LANCHOR133
 	mov	w25, 65535
 	adrp	x24, .LANCHOR151
-.L2064:
+.L2058:
 	ldrh	w0, [x20, 10]
 	cmp	w0, w19
-	bhi	.L2065
-.L2062:
+	bhi	.L2059
+.L2056:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2065:
+.L2059:
 	ldrh	w0, [x21, w19, sxtw 1]
 	cmp	w0, w25
-	bne	.L2062
+	bne	.L2056
 	ldr	x0, [x24, #:lo12:.LANCHOR151]
 	mov	w2, 16384
 	mov	w1, 255
@@ -12009,7 +12012,7 @@ id_block_prog_msb_ff_data:
 	mov	w0, w22
 	and	w19, w19, 65535
 	bl	flash_prog_page
-	b	.L2064
+	b	.L2058
 	.size	id_block_prog_msb_ff_data, .-id_block_prog_msb_ff_data
 	.section	.text.idb_write_data,"ax",@progbits
 	.align	2
@@ -12026,16 +12029,16 @@ idb_write_data:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	bls	.L2068
+	bls	.L2062
 	cmp	w1, 575
-	bhi	.L2069
-	adrp	x0, .LANCHOR169
+	bhi	.L2063
+	adrp	x0, .LANCHOR168
 	mov	x1, x2
 	mov	w2, 1
 	cmp	w4, 64
-	str	w2, [x0, #:lo12:.LANCHOR169]
+	str	w2, [x0, #:lo12:.LANCHOR168]
 	adrp	x0, idb_buf
-	bhi	.L2070
+	bhi	.L2064
 	mov	w2, 64
 	sub	w4, w2, w4
 	sub	w2, w3, w4
@@ -12043,9 +12046,9 @@ idb_write_data:
 	lsl	w2, w2, 9
 	add	x1, x1, x4
 	add	x0, x0, :lo12:idb_buf
-.L2146:
+.L2140:
 	bl	ftl_memcpy
-.L2125:
+.L2119:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -12054,7 +12057,7 @@ idb_write_data:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 256
 	ret
-.L2070:
+.L2064:
 	mov	w2, 576
 	sub	w2, w2, w4
 	cmp	w3, w2
@@ -12064,14 +12067,14 @@ idb_write_data:
 	add	x0, x0, :lo12:idb_buf
 	lsl	w2, w2, 9
 	add	x0, x0, x4
-	b	.L2146
-.L2068:
+	b	.L2140
+.L2062:
 	cmp	w1, 575
-	bls	.L2125
-.L2069:
-	adrp	x0, .LANCHOR169
-	ldr	w0, [x0, #:lo12:.LANCHOR169]
-	cbz	w0, .L2125
+	bls	.L2119
+.L2063:
+	adrp	x0, .LANCHOR168
+	ldr	w0, [x0, #:lo12:.LANCHOR168]
+	cbz	w0, .L2119
 	adrp	x3, .LANCHOR34
 	add	x1, x3, :lo12:.LANCHOR34
 	str	x3, [x29, 176]
@@ -12093,9 +12096,9 @@ idb_write_data:
 	cmp	w27, 512
 	csel	w27, w27, w0, lt
 	mov	w0, 0
-.L2075:
+.L2069:
 	ldr	w5, [x1]
-	cbnz	w5, .L2073
+	cbnz	w5, .L2067
 	ldr	w5, [x6, w0, uxtw 2]
 	add	w0, w0, 1
 	str	w5, [x1], -4
@@ -12103,19 +12106,19 @@ idb_write_data:
 	sub	w2, w2, #1
 	csel	w0, w0, wzr, cc
 	cmp	w2, 4096
-	bne	.L2075
-.L2073:
+	bne	.L2069
+.L2067:
 	add	x0, x3, :lo12:idb_buf
 	mov	w3, w27
 	ldr	w1, [x0, w2, uxtw 2]
-	adrp	x0, .LC122
-	add	x0, x0, :lo12:.LC122
+	adrp	x0, .LC123
+	add	x0, x0, :lo12:.LC123
 	bl	printf
 	stp	wzr, wzr, [x29, 168]
 	adrp	x0, gp_flash_check_buf
 	add	x0, x0, :lo12:gp_flash_check_buf
 	str	x0, [x29, 184]
-.L2109:
+.L2103:
 	adrp	x0, gp_flash_check_buf
 	add	x20, x0, :lo12:gp_flash_check_buf
 	mov	w1, 0
@@ -12128,7 +12131,7 @@ idb_write_data:
 	add	x0, x0, x1, uxtw
 	ldrb	w0, [x0, 32]
 	cmp	w0, 255
-	beq	.L2076
+	beq	.L2070
 	ldr	w1, [x29, 132]
 	adrp	x19, .LANCHOR45
 	mul	w26, w0, w1
@@ -12148,11 +12151,11 @@ idb_write_data:
 	msub	w23, w23, w22, w26
 	sub	w24, w26, w23
 	cmp	w26, w24
-	bne	.L2115
+	bne	.L2109
 	adrp	x0, .LANCHOR27
 	ldrb	w0, [x0, #:lo12:.LANCHOR27]
 	cmp	w0, 9
-	bne	.L2115
+	bne	.L2109
 	mov	w2, 1024
 	mov	w1, 0
 	mov	x0, x20
@@ -12188,19 +12191,19 @@ idb_write_data:
 	str	w0, [x1, 8]
 	sub	w0, w27, #4
 	str	w0, [x29, 164]
-.L2077:
+.L2071:
 	adrp	x22, idb_buf
-	adrp	x28, .LANCHOR168
+	adrp	x28, .LANCHOR167
 	add	x22, x22, :lo12:idb_buf
-	add	x0, x28, :lo12:.LANCHOR168
+	add	x0, x28, :lo12:.LANCHOR167
 	adrp	x25, .LANCHOR3
 	str	x0, [x29, 152]
 	mov	w20, 0
 	add	x0, x25, :lo12:.LANCHOR3
 	str	x0, [x29, 144]
-.L2079:
+.L2073:
 	cmp	w27, w20
-	bhi	.L2090
+	bhi	.L2084
 	ldr	x0, [x29, 176]
 	add	x25, x19, :lo12:.LANCHOR45
 	strb	wzr, [x19, #:lo12:.LANCHOR45]
@@ -12226,10 +12229,10 @@ idb_write_data:
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
 	str	x0, [x29, 104]
-.L2091:
+.L2085:
 	ldr	w0, [x29, 160]
 	cmp	w22, w0
-	bcc	.L2105
+	bcc	.L2099
 	adrp	x0, .LANCHOR45
 	ldrb	w1, [x29, 128]
 	adrp	x3, idb_buf
@@ -12238,21 +12241,21 @@ idb_write_data:
 	mov	x1, 0
 	ldr	w0, [x29, 164]
 	lsl	w0, w0, 7
-.L2106:
+.L2100:
 	mov	w19, w1
 	cmp	w1, w0
-	bcc	.L2107
+	bcc	.L2101
 	ldr	w0, [x29, 168]
 	add	w0, w0, 1
 	str	w0, [x29, 168]
 	cmp	w0, 5
-	bls	.L2076
-	b	.L2111
-.L2115:
+	bls	.L2070
+	b	.L2105
+.L2109:
 	mov	x6, 0
 	str	w27, [x29, 164]
-	b	.L2077
-.L2090:
+	b	.L2071
+.L2084:
 	ldr	x2, [x29, 152]
 	add	w5, w23, w20
 	lsr	w5, w5, 2
@@ -12260,30 +12263,30 @@ idb_write_data:
 	add	w1, w5, 1
 	ldrb	w2, [x2]
 	ldrh	w0, [x0, w1, sxtw 1]
-	cbz	w2, .L2081
+	cbz	w2, .L2075
 	adrp	x0, .LANCHOR1
 	ldrb	w3, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w1, 1
 	cmp	w3, 0
 	csel	w0, w0, w1, ne
-.L2081:
+.L2075:
 	adrp	x1, .LANCHOR27
 	ldrb	w1, [x1, #:lo12:.LANCHOR27]
 	cmp	w1, 9
-	bne	.L2083
-.L2144:
+	bne	.L2077
+.L2138:
 	str	w0, [x29, 192]
 	mov	w0, 61424
 	str	w0, [x29, 196]
 	ldr	x0, [x29, 144]
 	ldrh	w0, [x0, w5, sxtw 1]
-	cbnz	w2, .L2085
+	cbnz	w2, .L2079
 	mov	w5, w0
-.L2086:
+.L2080:
 	mul	w1, w21, w5
 	adrp	x2, .LANCHOR43
 	adrp	x0, .LANCHOR17
-	cbnz	x6, .L2087
+	cbnz	x6, .L2081
 	ldr	x3, [x29, 176]
 	add	w1, w1, w24
 	ldrb	w7, [x2, #:lo12:.LANCHOR43]
@@ -12303,31 +12306,31 @@ idb_write_data:
 	ldr	w7, [x29, 160]
 	mov	w0, w7
 	bl	nandc_bch_sel
-	ldrb	w0, [x28, #:lo12:.LANCHOR168]
+	ldrb	w0, [x28, #:lo12:.LANCHOR167]
 	ldr	w5, [x29, 140]
-	cbnz	w0, .L2088
+	cbnz	w0, .L2082
 	udiv	w1, w24, w21
 	add	w2, w5, 1
 	bl	id_block_prog_msb_ff_data
-.L2088:
+.L2082:
 	add	x22, x22, 2048
-.L2089:
+.L2083:
 	add	w20, w20, 4
 	mov	x6, 0
 	and	w20, w20, 65535
-	b	.L2079
-.L2083:
+	b	.L2073
+.L2077:
 	sub	w0, w0, #1
 	lsl	w0, w0, 2
-	b	.L2144
-.L2085:
+	b	.L2138
+.L2079:
 	adrp	x0, .LANCHOR1
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w5, 1
 	cmp	w1, 0
 	csel	w5, w0, w5, ne
-	b	.L2086
-.L2087:
+	b	.L2080
+.L2081:
 	ldr	x3, [x29, 176]
 	add	w1, w1, w24
 	ldrb	w7, [x2, #:lo12:.LANCHOR43]
@@ -12346,21 +12349,21 @@ idb_write_data:
 	ldr	w7, [x29, 160]
 	mov	w0, w7
 	bl	nandc_bch_sel
-	b	.L2089
-.L2105:
+	b	.L2083
+.L2099:
 	add	w19, w28, w22
 	ldr	w0, [x29, 152]
-	adrp	x1, .LANCHOR168
+	adrp	x1, .LANCHOR167
 	sub	w24, w21, w0
 	ldr	x0, [x29, 104]
 	udiv	w19, w19, w21
-	ldrb	w1, [x1, #:lo12:.LANCHOR168]
+	ldrb	w1, [x1, #:lo12:.LANCHOR167]
 	and	w24, w24, 65535
 	and	w19, w19, 65535
 	ldrh	w0, [x0, w19, sxtw 1]
-	cbnz	w1, .L2092
+	cbnz	w1, .L2086
 	mov	w19, w0
-.L2093:
+.L2087:
 	adrp	x0, .LANCHOR17
 	ldr	w1, [x29, 136]
 	ldrb	w23, [x0, #:lo12:.LANCHOR17]
@@ -12380,7 +12383,7 @@ idb_write_data:
 	adrp	x0, .LANCHOR20
 	add	x0, x0, :lo12:.LANCHOR20
 	str	x0, [x29, 112]
-.L2094:
+.L2088:
 	mov	w4, w21
 	add	x3, x29, 192
 	mov	x2, x20
@@ -12389,32 +12392,32 @@ idb_write_data:
 	bl	flash_read_page
 	mov	w5, w0
 	cmn	w0, #1
-	bne	.L2095
+	bne	.L2089
 	ldrb	w6, [x25]
-	cbnz	w6, .L2096
-.L2099:
+	cbnz	w6, .L2090
+.L2093:
 	adrp	x0, .LANCHOR156
 	ldr	x6, [x0, #:lo12:.LANCHOR156]
-	cbnz	x6, .L2097
-.L2098:
+	cbnz	x6, .L2091
+.L2092:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
-	cbz	w0, .L2095
+	cbz	w0, .L2089
 	mov	w4, w21
 	add	x3, x29, 192
 	mov	x2, x20
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_ddr_tuning_read
-	b	.L2145
-.L2092:
+	b	.L2139
+.L2086:
 	adrp	x0, .LANCHOR1
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w19, 1
 	cmp	w1, 0
 	csel	w19, w0, w19, ne
-	b	.L2093
-.L2096:
+	b	.L2087
+.L2090:
 	str	w6, [x29, 100]
 	mov	w4, w21
 	str	w5, [x29, 120]
@@ -12428,21 +12431,21 @@ idb_write_data:
 	ldr	w6, [x29, 100]
 	strb	w6, [x25]
 	ldr	w5, [x29, 120]
-	beq	.L2099
-.L2145:
+	beq	.L2093
+.L2139:
 	mov	w5, w0
-.L2095:
+.L2089:
 	cmn	w5, #1
 	cset	w3, eq
 	cmp	w23, 16
 	cset	w0, ne
 	tst	w3, w0
-	beq	.L2101
+	beq	.L2095
 	mov	w0, 16
 	mov	w23, 16
 	bl	nandc_bch_sel
-	b	.L2094
-.L2097:
+	b	.L2088
+.L2091:
 	str	w5, [x29, 120]
 	mov	w4, w21
 	add	x3, x29, 192
@@ -12452,9 +12455,9 @@ idb_write_data:
 	blr	x6
 	cmn	w0, #1
 	ldr	w5, [x29, 120]
-	beq	.L2098
-	b	.L2145
-.L2101:
+	beq	.L2092
+	b	.L2139
+.L2095:
 	ldr	w0, [x29, 124]
 	bl	nandc_bch_sel
 	cmp	w3, 0
@@ -12464,62 +12467,62 @@ idb_write_data:
 	ldr	w0, [x29, 136]
 	cmp	w22, 0
 	ccmp	w26, w0, 0, eq
-	bne	.L2103
+	bne	.L2097
 	ldr	w0, [x29, 144]
-	cbnz	w0, .L2103
+	cbnz	w0, .L2097
 	ldr	w1, [x20]
 	mov	w0, 18766
 	movk	w0, 0x464e, lsl 16
 	cmp	w1, w0
-	bne	.L2103
+	bne	.L2097
 	ldr	w0, [x29, 160]
 	ldrb	w21, [x20, 17]
 	add	w0, w0, w24
 	str	w0, [x29, 160]
-.L2104:
+.L2098:
 	add	w22, w24, w22
 	and	w22, w22, 65535
-	b	.L2091
-.L2103:
+	b	.L2085
+.L2097:
 	ubfiz	x0, x24, 9, 16
 	str	wzr, [x29, 152]
 	add	x20, x20, x0
-	b	.L2104
-.L2107:
+	b	.L2098
+.L2101:
 	ldr	x4, [x29, 184]
 	lsl	x2, x1, 2
 	add	x1, x1, 1
 	ldr	w4, [x2, x4]
 	ldr	w2, [x3, x2]
 	cmp	w4, w2
-	beq	.L2106
+	beq	.L2100
 	ldr	x0, [x29, 184]
 	mov	w2, 512
 	mov	w1, 0
 	bl	ftl_memset
 	mov	w1, w19
-	adrp	x0, .LC123
-	add	x0, x0, :lo12:.LC123
+	adrp	x0, .LC124
+	add	x0, x0, :lo12:.LC124
 	bl	printf
 	mov	w1, w26
 	mov	w0, 0
 	bl	flash_erase_block
-.L2076:
+.L2070:
 	ldr	w0, [x29, 172]
 	add	w0, w0, 1
 	str	w0, [x29, 172]
 	cmp	w0, 4
-	bne	.L2109
+	bne	.L2103
 	ldr	w0, [x29, 168]
-	cbnz	w0, .L2111
-	adrp	x0, .LC124
+	cbnz	w0, .L2105
+	adrp	x0, .LC125
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC124
+	add	x0, x0, :lo12:.LC125
 	bl	printf
-.L2111:
-	adrp	x0, .LANCHOR169
-	str	wzr, [x0, #:lo12:.LANCHOR169]
-	b	.L2125
+.L2105:
+	adrp	x0, .LANCHOR168
+	str	wzr, [x0, #:lo12:.LANCHOR168]
+	b	.L2119
 	.size	idb_write_data, .-idb_write_data
 	.section	.text.flash_start_tlc_page_prog,"ax",@progbits
 	.align	2
@@ -12542,14 +12545,14 @@ flash_start_tlc_page_prog:
 	mov	x23, x5
 	mov	x24, x6
 	cmp	w0, w19
-	bhi	.L2148
-	adrp	x1, .LANCHOR170
+	bhi	.L2142
+	adrp	x1, .LANCHOR169
 	adrp	x0, .LC0
-	mov	w2, 648
-	add	x1, x1, :lo12:.LANCHOR170
+	mov	w2, 651
+	add	x1, x1, :lo12:.LANCHOR169
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2148:
+.L2142:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w4, [x0, w19, sxtw]
@@ -12557,12 +12560,12 @@ flash_start_tlc_page_prog:
 	ldr	x19, [x0, #:lo12:.LANCHOR13]
 	mov	w0, w4
 	bl	nandc_cs
-	cbz	w25, .L2149
+	cbz	w25, .L2143
 	sxtw	x0, w4
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 8
 	str	w25, [x0, 8]
-.L2149:
+.L2143:
 	ubfiz	x4, x4, 8, 8
 	mov	w0, 128
 	add	x19, x19, x4
@@ -12662,21 +12665,21 @@ sblk_tlc_prog_one_page:
 	mov	x19, x0
 	ldr	x0, [x0]
 	ldr	w20, [x0, 40]
-.L2157:
+.L2151:
 	mov	w1, 1
 	mov	w0, w20
 	bl	queue_lun_state
-	cbnz	w0, .L2158
+	cbnz	w0, .L2152
 	mov	x0, x19
 	bl	queue_tlc_prog_cmd
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2158:
+.L2152:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2157
+	b	.L2151
 	.size	sblk_tlc_prog_one_page, .-sblk_tlc_prog_one_page
 	.section	.text.sblk_xlc_prog_pages,"ax",@progbits
 	.align	2
@@ -12693,13 +12696,13 @@ sblk_xlc_prog_pages:
 	stp	x23, x24, [sp, 48]
 	mov	w24, w2
 	ldr	w20, [x0, 40]
-.L2161:
+.L2155:
 	mov	w1, 1
 	mov	w0, w20
 	bl	queue_lun_state
-	cbnz	w0, .L2162
+	cbnz	w0, .L2156
 	cmp	w24, 2
-	bne	.L2163
+	bne	.L2157
 	ldr	x0, [x19]
 	mov	w2, 17
 	ldr	x1, [x22]
@@ -12779,21 +12782,21 @@ sblk_xlc_prog_pages:
 	adrp	x0, .LANCHOR53
 	add	x0, x0, :lo12:.LANCHOR53
 	bl	buf_add_tail
-.L2164:
+.L2158:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2162:
+.L2156:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2161
-.L2163:
+	b	.L2155
+.L2157:
 	mov	x0, x19
 	bl	queue_tlc_prog_cmd
-	b	.L2164
+	b	.L2158
 	.size	sblk_xlc_prog_pages, .-sblk_xlc_prog_pages
 	.section	.text.flash_start_page_prog,"ax",@progbits
 	.align	2
@@ -12816,40 +12819,40 @@ flash_start_page_prog:
 	ubfx	x27, x1, 21, 3
 	ubfx	x22, x1, 24, 2
 	cmp	w0, w27
-	bhi	.L2167
-	adrp	x1, .LANCHOR171
+	bhi	.L2161
+	adrp	x1, .LANCHOR170
 	adrp	x0, .LC0
-	mov	w2, 699
-	add	x1, x1, :lo12:.LANCHOR171
+	mov	w2, 702
+	add	x1, x1, :lo12:.LANCHOR170
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2167:
+.L2161:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w21, [x0, w27, sxtw]
 	adrp	x0, .LANCHOR13
 	ldr	x19, [x0, #:lo12:.LANCHOR13]
 	bl	nandc_rdy_status
-	cbnz	w0, .L2168
+	cbnz	w0, .L2162
 	ldrb	w0, [x23, #:lo12:.LANCHOR18]
 	cmp	w0, 1
-	bne	.L2169
+	bne	.L2163
 	bl	nandc_wait_flash_ready
-.L2168:
+.L2162:
 	mov	w0, w21
 	bl	hynix_reconfig_rr_para
 	mov	w0, w21
 	bl	nandc_cs
-	cbnz	w22, .L2170
+	cbnz	w22, .L2164
 	mov	w0, w20
 	bl	slc_phy_page_address_calc
 	mov	w20, w0
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L2171
+	cbz	w0, .L2165
 	mov	w0, w21
 	bl	zftl_flash_enter_slc_mode
-.L2171:
+.L2165:
 	ubfiz	x21, x21, 8, 8
 	mov	w0, 128
 	add	x19, x19, x21
@@ -12879,16 +12882,16 @@ flash_start_page_prog:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 96
 	b	nandc_de_cs.constprop.29
-.L2169:
+.L2163:
 	mov	w2, 64
 	mov	w1, w20
 	mov	w0, w27
 	bl	flash_wait_device_ready_raw
-	b	.L2168
-.L2170:
+	b	.L2162
+.L2164:
 	mov	w0, w21
 	bl	zftl_flash_exit_slc_mode
-	b	.L2171
+	b	.L2165
 	.size	flash_start_page_prog, .-flash_start_page_prog
 	.section	.text.queue_prog_cmd,"ax",@progbits
 	.align	2
@@ -12907,23 +12910,23 @@ queue_prog_cmd:
 	ldr	w3, [x19, 40]
 	ldrb	w1, [x0, #:lo12:.LANCHOR53]
 	cmp	w1, 255
-	beq	.L2177
+	beq	.L2171
 	adrp	x2, .LANCHOR49
 	add	x2, x2, :lo12:.LANCHOR49
 	ubfx	x3, x3, 21, 3
 	mov	x6, x2
-.L2179:
+.L2173:
 	add	x4, x2, x1, lsl 6
 	ldr	w5, [x4, 40]
 	ubfx	x5, x5, 21, 3
 	cmp	w3, w5
-	bne	.L2178
+	bne	.L2172
 	ldrb	w5, [x4, 58]
 	cmp	w5, 6
-	bne	.L2178
+	bne	.L2172
 	mov	w1, 3
 	strb	w1, [x4, 58]
-.L2177:
+.L2171:
 	mov	w1, 3
 	strb	w1, [x19, 58]
 	mov	w1, 1
@@ -12935,12 +12938,12 @@ queue_prog_cmd:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	buf_add_tail
-.L2178:
+.L2172:
 	lsl	x1, x1, 6
 	ldrb	w1, [x6, x1]
 	cmp	w1, 255
-	bne	.L2179
-	b	.L2177
+	bne	.L2173
+	b	.L2171
 	.size	queue_prog_cmd, .-queue_prog_cmd
 	.section	.text.sblk_prog_page,"ax",@progbits
 	.align	2
@@ -12957,25 +12960,25 @@ sblk_prog_page:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	cbz	w0, .L2186
+	cbz	w0, .L2180
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2186
+	tbz	x0, 8, .L2180
 	ldr	w1, [x19, 40]
-	adrp	x0, .LC125
+	adrp	x0, .LC126
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC125
+	add	x0, x0, :lo12:.LC126
 	bl	printf
-.L2186:
+.L2180:
 	adrp	x25, .LANCHOR38
 	adrp	x23, .LANCHOR49
 	add	x25, x25, :lo12:.LANCHOR38
 	add	x23, x23, :lo12:.LANCHOR49
 	mov	w21, 0
 	mov	w24, 1
-.L2187:
-	cbnz	w20, .L2198
-.L2211:
+.L2181:
+	cbnz	w20, .L2192
+.L2205:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -12984,49 +12987,49 @@ sblk_prog_page:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2198:
+.L2192:
 	ldrb	w26, [x19]
 	ldr	w22, [x19, 40]
-.L2188:
+.L2182:
 	mov	w1, 1
 	mov	w0, w22
 	bl	queue_lun_state
-	cbnz	w0, .L2189
+	cbnz	w0, .L2183
 	cmp	w20, 1
-	beq	.L2190
+	beq	.L2184
 	ldrb	w0, [x25]
-	cbnz	w0, .L2191
-.L2190:
+	cbnz	w0, .L2185
+.L2184:
 	mov	x0, x19
 	bl	queue_prog_cmd
-.L2192:
+.L2186:
 	subs	w20, w20, #1
-	beq	.L2211
+	beq	.L2205
 	ubfiz	x19, x26, 6, 8
 	add	x19, x23, x19
-	b	.L2187
-.L2189:
+	b	.L2181
+.L2183:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2188
-.L2191:
+	b	.L2182
+.L2185:
 	ldrb	w0, [x19]
 	ubfx	x27, x22, 21, 3
 	cmp	w0, 255
-	bne	.L2193
-	adrp	x1, .LANCHOR172
+	bne	.L2187
+	adrp	x1, .LANCHOR171
 	adrp	x0, .LC0
 	mov	w2, 546
-	add	x1, x1, :lo12:.LANCHOR172
+	add	x1, x1, :lo12:.LANCHOR171
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2193:
+.L2187:
 	ldrb	w0, [x19]
 	add	x0, x23, x0, lsl 6
 	ldr	w5, [x0, 40]
 	ubfx	x0, x5, 21, 3
 	cmp	w27, w0
-	bne	.L2194
+	bne	.L2188
 	adrp	x0, .LANCHOR99
 	ldrh	w2, [x0, #:lo12:.LANCHOR99]
 	adrp	x0, .LANCHOR98
@@ -13049,9 +13052,9 @@ sblk_prog_page:
 	cmp	w4, w0
 	and	w1, w1, w5
 	ccmp	w22, w1, 0, ne
-	bne	.L2194
+	bne	.L2188
 	cmp	w21, w3
-	beq	.L2194
+	beq	.L2188
 	ldr	w1, [x19, 40]
 	mov	w0, 17
 	ldr	x2, [x19, 8]
@@ -13067,12 +13070,12 @@ sblk_prog_page:
 	adrp	x0, .LANCHOR53
 	add	x0, x0, :lo12:.LANCHOR53
 	bl	buf_add_tail
-	b	.L2192
-.L2194:
+	b	.L2186
+.L2188:
 	mov	x0, x19
 	mov	w21, 0
 	bl	queue_prog_cmd
-	b	.L2192
+	b	.L2186
 	.size	sblk_prog_page, .-sblk_prog_page
 	.section	.text.ftl_flush,"ax",@progbits
 	.align	2
@@ -13085,17 +13088,17 @@ ftl_flush:
 	ldrb	w1, [x0, #:lo12:.LANCHOR119]
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	adrp	x20, .LANCHOR173
-	cbz	w1, .L2214
-	ldrb	w2, [x20, #:lo12:.LANCHOR173]
+	adrp	x20, .LANCHOR172
+	cbz	w1, .L2208
+	ldrb	w2, [x20, #:lo12:.LANCHOR172]
 	adrp	x0, .LANCHOR49
 	add	x0, x0, :lo12:.LANCHOR49
 	add	x0, x0, x2, lsl 6
 	bl	sblk_prog_page
-.L2214:
+.L2208:
 	mov	w0, -1
 	strb	wzr, [x19, #:lo12:.LANCHOR119]
-	strb	w0, [x20, #:lo12:.LANCHOR173]
+	strb	w0, [x20, #:lo12:.LANCHOR172]
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	ldp	x19, x20, [sp, 16]
@@ -13124,43 +13127,43 @@ flash_prog_page_en:
 	and	w21, w5, 255
 	ubfx	x19, x20, 24, 2
 	cmp	w0, w22
-	bhi	.L2220
-	adrp	x1, .LANCHOR174
+	bhi	.L2214
+	adrp	x1, .LANCHOR173
 	adrp	x0, .LC0
-	mov	w2, 473
-	add	x1, x1, :lo12:.LANCHOR174
+	mov	w2, 476
+	add	x1, x1, :lo12:.LANCHOR173
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2220:
+.L2214:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w26, [x0, w22, sxtw]
-	cbnz	w19, .L2230
+	cbnz	w19, .L2224
 	adrp	x0, .LANCHOR0
 	ldrb	w1, [x0, #:lo12:.LANCHOR0]
 	adrp	x0, .LANCHOR1
-	cbz	w1, .L2222
+	cbz	w1, .L2216
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
-	cbz	w1, .L2230
-.L2222:
+	cbz	w1, .L2224
+.L2216:
 	adrp	x1, .LANCHOR2
 	ldrb	w0, [x0, #:lo12:.LANCHOR1]
 	ldrh	w1, [x1, #:lo12:.LANCHOR2]
 	udiv	w19, w20, w1
 	mul	w19, w19, w1
 	sub	w1, w20, w19
-	cbz	w0, .L2223
+	cbz	w0, .L2217
 	add	w19, w19, w1, lsl 1
-.L2221:
+.L2215:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 4, .L2224
-	adrp	x0, .LC126
+	tbz	x0, 4, .L2218
+	adrp	x0, .LC127
 	mov	w2, w20
 	mov	w1, w26
-	add	x0, x0, :lo12:.LC126
+	add	x0, x0, :lo12:.LC127
 	bl	printf
-.L2224:
+.L2218:
 	mov	w1, w19
 	mov	w4, w25
 	mov	x3, x23
@@ -13168,7 +13171,7 @@ flash_prog_page_en:
 	mov	w0, w26
 	bl	flash_prog_page
 	mov	w19, w0
-	cbz	w21, .L2225
+	cbz	w21, .L2219
 	adrp	x26, .LANCHOR160
 	adrp	x21, .LANCHOR161
 	mov	w4, w25
@@ -13179,57 +13182,57 @@ flash_prog_page_en:
 	bl	flash_read_page_en
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2226
+	beq	.L2220
 	ldr	x0, [x21, #:lo12:.LANCHOR161]
 	ldr	w1, [x24]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	bne	.L2226
+	bne	.L2220
 	ldr	x0, [x26, #:lo12:.LANCHOR160]
 	ldr	w1, [x23]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	beq	.L2225
-.L2226:
+	beq	.L2219
+.L2220:
 	ldr	x1, [x26, #:lo12:.LANCHOR160]
 	mov	w3, 4
-	adrp	x0, .LC127
+	adrp	x0, .LC128
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC127
+	add	x0, x0, :lo12:.LC128
 	bl	rknand_print_hex
 	ldr	x1, [x21, #:lo12:.LANCHOR161]
 	mov	w3, 4
-	adrp	x0, .LC128
+	adrp	x0, .LC129
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC128
+	add	x0, x0, :lo12:.LC129
 	bl	rknand_print_hex
-.L2227:
+.L2221:
 	mov	w1, w20
-	adrp	x0, .LC129
-	add	x0, x0, :lo12:.LC129
+	adrp	x0, .LC130
+	add	x0, x0, :lo12:.LC130
 	bl	printf
-	mov	w2, 499
-	adrp	x1, .LANCHOR174
+	mov	w2, 502
+	adrp	x1, .LANCHOR173
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR174
+	add	x1, x1, :lo12:.LANCHOR173
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	mov	w0, -1
-	b	.L2228
-.L2223:
+	b	.L2222
+.L2217:
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
 	ldrh	w0, [x0, w1, uxtw 1]
 	add	w19, w0, w19
-	b	.L2221
-.L2230:
+	b	.L2215
+.L2224:
 	mov	w19, w20
-	b	.L2221
-.L2225:
+	b	.L2215
+.L2219:
 	mov	w0, w19
 	cmn	w19, #1
-	beq	.L2227
-.L2228:
+	beq	.L2221
+.L2222:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -13247,7 +13250,7 @@ ftl_test_block:
 	stp	x23, x24, [sp, 48]
 	adrp	x24, ftl_tmp_buffer
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR175
+	adrp	x25, .LANCHOR174
 	stp	x21, x22, [sp, 32]
 	adrp	x26, .LANCHOR106
 	and	w21, w0, 65535
@@ -13260,45 +13263,45 @@ ftl_test_block:
 	str	x0, [x29, 112]
 	str	wzr, [x24, #:lo12:ftl_tmp_buffer]
 	add	x0, x27, :lo12:.LANCHOR98
-	str	wzr, [x25, #:lo12:.LANCHOR175]
+	str	wzr, [x25, #:lo12:.LANCHOR174]
 	str	x0, [x29, 96]
-.L2242:
+.L2236:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
 	cmp	w0, w20
-	bls	.L2252
+	bls	.L2246
 	add	x0, x27, :lo12:.LANCHOR98
 	mov	w22, 0
 	str	x0, [x29, 120]
 	adrp	x0, .LANCHOR14
 	add	x0, x0, :lo12:.LANCHOR14
 	str	x0, [x29, 104]
-	b	.L2253
-.L2251:
+	b	.L2247
+.L2245:
 	ldr	x0, [x29, 104]
 	ldr	w0, [x0]
-	tbz	x0, 12, .L2243
-	adrp	x0, .LC130
+	tbz	x0, 12, .L2237
+	adrp	x0, .LC131
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC130
+	add	x0, x0, :lo12:.LC131
 	bl	printf
-.L2243:
+.L2237:
 	ldr	x0, [x29, 96]
 	ldrb	w19, [x0]
 	madd	w19, w21, w19, w22
 	and	w19, w19, 65535
-	cbnz	w20, .L2244
+	cbnz	w20, .L2238
 	adrp	x0, .LANCHOR26
 	ldr	x0, [x0, #:lo12:.LANCHOR26]
 	ldrb	w0, [x0, 47]
 	cmp	w0, w19
-	bcs	.L2245
-.L2244:
+	bcs	.L2239
+.L2238:
 	and	w28, w20, 255
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_check_bad_block
-	cbnz	w0, .L2245
+	cbnz	w0, .L2239
 	adrp	x0, .LANCHOR105
 	mov	w1, w23
 	ldrh	w7, [x0, #:lo12:.LANCHOR105]
@@ -13306,54 +13309,54 @@ ftl_test_block:
 	mul	w26, w7, w19
 	mov	w2, w26
 	bl	flash_erase_block_en
-	cbz	w0, .L2246
+	cbz	w0, .L2240
 	adrp	x0, .LANCHOR68
 	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w0, 2
-	bne	.L2268
+	bne	.L2262
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L2268
+	cbz	w0, .L2262
 	mov	w2, w26
 	mov	w1, 1
 	mov	w0, w28
 	bl	flash_erase_block_en
-	cbnz	w0, .L2268
-.L2250:
+	cbnz	w0, .L2262
+.L2244:
 	adrp	x0, .LANCHOR68
 	mov	w23, 1
 	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	add	w26, w26, w0, lsl 24
-.L2249:
+.L2243:
 	adrp	x0, .LANCHOR121
 	mov	w5, 1
-	add	x3, x25, :lo12:.LANCHOR175
+	add	x3, x25, :lo12:.LANCHOR174
 	add	x2, x24, :lo12:ftl_tmp_buffer
 	ldrb	w4, [x0, #:lo12:.LANCHOR121]
 	mov	w1, w26
 	mov	w0, w28
 	bl	flash_prog_page_en
-	cbz	w0, .L2245
-.L2268:
+	cbz	w0, .L2239
+.L2262:
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_mask_bad_block
-.L2245:
+.L2239:
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L2253:
+.L2247:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, w22
-	bhi	.L2251
+	bhi	.L2245
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2242
+	b	.L2236
+.L2240:
+	cbz	w23, .L2243
+	b	.L2244
 .L2246:
-	cbz	w23, .L2249
-	b	.L2250
-.L2252:
-	cbz	w23, .L2254
+	cbz	w23, .L2248
 	adrp	x0, .LANCHOR7
 	mov	w1, 2
 	ldr	x0, [x0, #:lo12:.LANCHOR7]
@@ -13361,7 +13364,7 @@ ftl_test_block:
 	ldrb	w0, [x21, 2]
 	bfi	w0, w1, 3, 2
 	strb	w0, [x21, 2]
-.L2254:
+.L2248:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -13396,18 +13399,18 @@ ftl_prog_page:
 	bl	flash_prog_page_en
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L2269
-	mov	w2, 2151
-	adrp	x1, .LANCHOR176
+	bne	.L2263
+	mov	w2, 2150
+	adrp	x1, .LANCHOR175
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR176
+	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	adrp	x0, .LC129
+	adrp	x0, .LC130
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC129
+	add	x0, x0, :lo12:.LC130
 	bl	printf
-.L2269:
+.L2263:
 	mov	w0, w19
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -13426,24 +13429,24 @@ ftl_info_flush:
 	stp	x21, x22, [sp, 32]
 	adrp	x21, .LANCHOR121
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR178
+	adrp	x22, .LANCHOR177
 	stp	x25, x26, [sp, 64]
 	adrp	x23, .LANCHOR105
 	stp	x27, x28, [sp, 80]
 	mov	x26, x23
 	ldrb	w2, [x21, #:lo12:.LANCHOR121]
-	add	x25, x22, :lo12:.LANCHOR178
+	add	x25, x22, :lo12:.LANCHOR177
 	add	x28, x23, :lo12:.LANCHOR105
 	mov	w24, 0
 	stp	x19, x20, [sp, 16]
 	mov	w27, w0
-	adrp	x20, .LANCHOR177
+	adrp	x20, .LANCHOR176
 	lsl	w2, w2, 1
-	add	x0, x20, :lo12:.LANCHOR177
+	add	x0, x20, :lo12:.LANCHOR176
 	bl	ftl_memset
-.L2273:
-	add	x0, x22, :lo12:.LANCHOR178
-	ldrb	w6, [x22, #:lo12:.LANCHOR178]
+.L2267:
+	add	x0, x22, :lo12:.LANCHOR177
+	ldrb	w6, [x22, #:lo12:.LANCHOR177]
 	ldrh	w19, [x23, #:lo12:.LANCHOR105]
 	ldrh	w4, [x0, 2]
 	adrp	x0, .LANCHOR97
@@ -13451,41 +13454,41 @@ ftl_info_flush:
 	ldr	w3, [x0, 4]
 	add	w3, w3, 1
 	str	w3, [x0, 4]
-	add	x0, x20, :lo12:.LANCHOR177
-	str	w27, [x20, #:lo12:.LANCHOR177]
+	add	x0, x20, :lo12:.LANCHOR176
+	str	w27, [x20, #:lo12:.LANCHOR176]
 	str	w3, [x0, 4]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2274
+	tbz	x0, 12, .L2268
 	mov	w2, w4
 	mov	w1, w6
 	str	w4, [x29, 96]
-	adrp	x0, .LC131
+	adrp	x0, .LC132
 	str	w6, [x29, 104]
-	add	x0, x0, :lo12:.LC131
+	add	x0, x0, :lo12:.LC132
 	bl	printf
 	ldr	w4, [x29, 96]
 	ldr	w6, [x29, 104]
-.L2274:
+.L2268:
 	adrp	x1, .LANCHOR80
 	ldrh	w0, [x25, 2]
 	ldrh	w1, [x1, #:lo12:.LANCHOR80]
 	cmp	w1, w0
-	bhi	.L2275
-	adrp	x19, .LANCHOR179
+	bhi	.L2269
+	adrp	x19, .LANCHOR178
 	adrp	x3, .LC0
-	add	x19, x19, :lo12:.LANCHOR179
+	add	x19, x19, :lo12:.LANCHOR178
 	add	x3, x3, :lo12:.LC0
-.L2282:
+.L2276:
 	ldrb	w0, [x25, 1]
 	adrp	x4, .LANCHOR26
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x25, 1]
 	cmp	w0, 7
-	bls	.L2276
+	bls	.L2270
 	mov	x0, 0
-.L2281:
+.L2275:
 	ldr	x2, [x4, #:lo12:.LANCHOR26]
 	add	w1, w0, 8
 	and	w24, w0, 65535
@@ -13494,24 +13497,24 @@ ftl_info_flush:
 	add	w1, w2, 127
 	and	w1, w1, 255
 	cmp	w1, 125
-	bhi	.L2277
+	bhi	.L2271
 	mov	x0, x3
 	stp	x4, x3, [x29, 96]
 	mov	w2, 742
 	mov	x1, x19
 	bl	printf
 	ldp	x4, x3, [x29, 96]
-.L2280:
+.L2274:
 	strb	w24, [x25, 1]
 	mov	w24, 1
-.L2276:
+.L2270:
 	ldr	x0, [x4, #:lo12:.LANCHOR26]
 	ldrb	w1, [x25, 1]
 	add	x0, x0, x1
 	ldrb	w0, [x0, 40]
 	strb	w0, [x25]
 	cmp	w0, 255
-	beq	.L2282
+	beq	.L2276
 	ldrh	w19, [x28]
 	mul	w19, w19, w0
 	mov	w0, 0
@@ -13519,7 +13522,7 @@ ftl_info_flush:
 	bl	flash_erase_block
 	ldrb	w4, [x21, #:lo12:.LANCHOR121]
 	mov	w1, w19
-	add	x3, x20, :lo12:.LANCHOR177
+	add	x3, x20, :lo12:.LANCHOR176
 	adrp	x2, ftl_info_data_buffer
 	mov	w0, 0
 	add	x2, x2, :lo12:ftl_info_data_buffer
@@ -13527,53 +13530,53 @@ ftl_info_flush:
 	bl	ftl_prog_page
 	mov	w0, 1
 	strh	w0, [x25, 2]
-.L2283:
+.L2277:
 	ldrb	w4, [x21, #:lo12:.LANCHOR121]
 	mov	w1, w19
-	add	x3, x20, :lo12:.LANCHOR177
+	add	x3, x20, :lo12:.LANCHOR176
 	adrp	x2, ftl_info_data_buffer
 	mov	w0, 0
 	add	x2, x2, :lo12:ftl_info_data_buffer
 	bl	ftl_prog_page
 	cmn	w0, #1
 	ldrh	w1, [x25, 2]
-	adrp	x0, .LANCHOR180
+	adrp	x0, .LANCHOR179
 	add	w1, w1, 1
 	strh	w1, [x25, 2]
-	beq	.L2284
-	ldrb	w1, [x0, #:lo12:.LANCHOR180]
-	cbz	w1, .L2285
-.L2284:
-	strb	wzr, [x0, #:lo12:.LANCHOR180]
-	b	.L2273
-.L2277:
+	beq	.L2278
+	ldrb	w1, [x0, #:lo12:.LANCHOR179]
+	cbz	w1, .L2279
+.L2278:
+	strb	wzr, [x0, #:lo12:.LANCHOR179]
+	b	.L2267
+.L2271:
 	cmp	w2, 255
-	bne	.L2280
+	bne	.L2274
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L2281
+	bne	.L2275
 	mov	w24, w0
-	b	.L2280
-.L2275:
+	b	.L2274
+.L2269:
 	madd	w19, w19, w6, w4
-	cbnz	w0, .L2283
+	cbnz	w0, .L2277
 	mov	w1, w19
 	bl	flash_erase_block
-	b	.L2283
-.L2285:
-	cbnz	w24, .L2286
-.L2294:
-	adrp	x0, .LANCHOR178
-	ldrb	w0, [x0, #:lo12:.LANCHOR178]
+	b	.L2277
+.L2279:
+	cbnz	w24, .L2280
+.L2288:
+	adrp	x0, .LANCHOR177
+	ldrb	w0, [x0, #:lo12:.LANCHOR177]
 	cmp	w0, 255
-	bne	.L2288
-	adrp	x1, .LANCHOR179
+	bne	.L2282
+	adrp	x1, .LANCHOR178
 	adrp	x0, .LC0
 	mov	w2, 778
-	add	x1, x1, :lo12:.LANCHOR179
+	add	x1, x1, :lo12:.LANCHOR178
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2288:
+.L2282:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -13582,17 +13585,17 @@ ftl_info_flush:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2286:
+.L2280:
 	ldrb	w19, [x25, 1]
-	adrp	x20, .LANCHOR179
+	adrp	x20, .LANCHOR178
 	adrp	x21, .LC0
-	add	x20, x20, :lo12:.LANCHOR179
+	add	x20, x20, :lo12:.LANCHOR178
 	add	w19, w19, 1
 	add	x21, x21, :lo12:.LC0
 	adrp	x22, .LANCHOR26
-.L2289:
+.L2283:
 	cmp	w19, 7
-	bhi	.L2294
+	bhi	.L2288
 	ldr	x1, [x22, #:lo12:.LANCHOR26]
 	add	w0, w19, 8
 	add	x0, x1, x0, sxtw
@@ -13600,24 +13603,24 @@ ftl_info_flush:
 	add	w0, w23, 127
 	and	w0, w0, 255
 	cmp	w0, 125
-	bhi	.L2290
+	bhi	.L2284
 	mov	w2, 771
 	mov	x1, x20
 	mov	x0, x21
 	bl	printf
-.L2291:
+.L2285:
 	ldrh	w1, [x26, #:lo12:.LANCHOR105]
 	mov	w0, 0
 	mul	w1, w1, w23
 	bl	flash_erase_block
-	b	.L2292
-.L2290:
+	b	.L2286
+.L2284:
 	cmp	w23, 255
-	bne	.L2291
-.L2292:
+	bne	.L2285
+.L2286:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L2289
+	b	.L2283
 	.size	ftl_info_flush, .-ftl_info_flush
 	.section	.text.ftl_info_blk_init,"ax",@progbits
 	.align	2
@@ -13625,17 +13628,17 @@ ftl_info_flush:
 	.type	ftl_info_blk_init, %function
 ftl_info_blk_init:
 	stp	x29, x30, [sp, -128]!
-	adrp	x0, .LANCHOR181
-	adrp	x1, .LANCHOR180
+	adrp	x0, .LANCHOR180
+	adrp	x1, .LANCHOR179
 	mov	w2, 16384
 	add	x29, sp, 0
-	strb	wzr, [x0, #:lo12:.LANCHOR181]
+	strb	wzr, [x0, #:lo12:.LANCHOR180]
 	mov	w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR180]
-	adrp	x1, .LANCHOR182
+	strb	w0, [x1, #:lo12:.LANCHOR179]
+	adrp	x1, .LANCHOR181
 	stp	x19, x20, [sp, 16]
 	adrp	x20, ftl_info_data_buffer
-	strb	w0, [x1, #:lo12:.LANCHOR182]
+	strb	w0, [x1, #:lo12:.LANCHOR181]
 	adrp	x1, .LANCHOR7
 	add	x0, x20, :lo12:ftl_info_data_buffer
 	stp	x21, x22, [sp, 32]
@@ -13644,7 +13647,7 @@ ftl_info_blk_init:
 	adrp	x22, .LANCHOR97
 	stp	x25, x26, [sp, 64]
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
-	adrp	x21, .LANCHOR178
+	adrp	x21, .LANCHOR177
 	stp	x23, x24, [sp, 48]
 	adrp	x23, .LANCHOR26
 	stp	x27, x28, [sp, 80]
@@ -13660,7 +13663,7 @@ ftl_info_blk_init:
 	bl	ftl_memset
 	adrp	x25, .LANCHOR121
 	ldr	x1, [x23, #:lo12:.LANCHOR26]
-	add	x0, x21, :lo12:.LANCHOR178
+	add	x0, x21, :lo12:.LANCHOR177
 	mov	w27, 21574
 	add	x26, x26, :lo12:.LANCHOR105
 	add	x25, x25, :lo12:.LANCHOR121
@@ -13668,9 +13671,9 @@ ftl_info_blk_init:
 	strb	wzr, [x0, 1]
 	movk	w27, 0x494c, lsl 16
 	ldrb	w1, [x1, 40]
-	strb	w1, [x21, #:lo12:.LANCHOR178]
+	strb	w1, [x21, #:lo12:.LANCHOR177]
 	strh	wzr, [x0, 2]
-.L2310:
+.L2304:
 	ldr	x1, [x23, #:lo12:.LANCHOR26]
 	add	w0, w19, 8
 	sxth	w24, w19
@@ -13678,26 +13681,26 @@ ftl_info_blk_init:
 	add	x0, x1, x0, sxtw
 	ldrb	w0, [x0, 32]
 	cmp	w0, 255
-	bne	.L2309
-.L2314:
+	bne	.L2303
+.L2308:
 	sub	x19, x19, #1
 	cmn	x19, #1
-	bne	.L2310
+	bne	.L2304
 	mov	w24, 0
-.L2311:
+.L2305:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2315
+	tbz	x0, 12, .L2309
 	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	mov	w2, 4800
 	mov	w1, w19
 	ldr	w3, [x0]
-	adrp	x0, .LC133
-	add	x0, x0, :lo12:.LC133
+	adrp	x0, .LC134
+	add	x0, x0, :lo12:.LC134
 	bl	printf
-.L2315:
+.L2309:
 	cmn	w19, #1
-	bne	.L2316
+	bne	.L2310
 	mov	w1, 0
 	mov	w2, 16384
 	add	x0, x20, :lo12:ftl_info_data_buffer
@@ -13706,11 +13709,11 @@ ftl_info_blk_init:
 	mov	w1, 21574
 	movk	w1, 0x494c, lsl 16
 	str	w1, [x0]
-	mov	w1, 9
+	mov	w1, 17
 	movk	w1, 0x6, lsl 16
 	str	w1, [x0, 12]
 	mov	w0, w19
-.L2308:
+.L2302:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -13718,12 +13721,12 @@ ftl_info_blk_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2309:
+.L2303:
 	ldrh	w6, [x26]
 	add	x8, x20, :lo12:ftl_info_data_buffer
 	ldrb	w4, [x25]
-	adrp	x7, .LANCHOR177
-	add	x7, x7, :lo12:.LANCHOR177
+	adrp	x7, .LANCHOR176
+	add	x7, x7, :lo12:.LANCHOR176
 	mov	x2, x8
 	mov	x3, x7
 	stp	x7, x8, [x29, 104]
@@ -13736,7 +13739,7 @@ ftl_info_blk_init:
 	cmn	w0, #1
 	ldr	w6, [x29, 124]
 	ldp	x7, x8, [x29, 104]
-	bne	.L2312
+	bne	.L2306
 	ldrb	w4, [x25]
 	mov	x3, x7
 	mov	x2, x8
@@ -13744,30 +13747,30 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_read_page
 	mov	w5, w0
-.L2312:
+.L2306:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2313
+	tbz	x0, 12, .L2307
 	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	mov	w2, w5
 	str	w5, [x29, 124]
 	mov	w3, 672
 	mov	w1, w28
 	ldr	w4, [x0]
-	adrp	x0, .LC132
-	add	x0, x0, :lo12:.LC132
+	adrp	x0, .LC133
+	add	x0, x0, :lo12:.LC133
 	bl	printf
 	ldr	w5, [x29, 124]
-.L2313:
+.L2307:
 	cmn	w5, #1
-	beq	.L2314
+	beq	.L2308
 	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L2314
+	bne	.L2308
 	mov	w19, w24
-	b	.L2311
-.L2316:
+	b	.L2305
+.L2310:
 	ldr	x1, [x23, #:lo12:.LANCHOR26]
 	add	w0, w24, 8
 	add	x20, x20, :lo12:ftl_info_data_buffer
@@ -13779,11 +13782,11 @@ ftl_info_blk_init:
 	add	x26, x26, :lo12:.LANCHOR121
 	movk	w27, 0x494c, lsl 16
 	ldrb	w1, [x0, 32]
-	add	x0, x21, :lo12:.LANCHOR178
-	strb	w1, [x21, #:lo12:.LANCHOR178]
+	add	x0, x21, :lo12:.LANCHOR177
+	strb	w1, [x21, #:lo12:.LANCHOR177]
 	strb	w24, [x0, 1]
-	adrp	x24, .LANCHOR177
-	add	x24, x24, :lo12:.LANCHOR177
+	adrp	x24, .LANCHOR176
+	add	x24, x24, :lo12:.LANCHOR176
 	mov	w0, 0
 	mov	x3, x24
 	bl	flash_get_last_written_page
@@ -13791,11 +13794,11 @@ ftl_info_blk_init:
 	add	w0, w0, 1
 	and	w19, w0, 65535
 	adrp	x0, .LANCHOR105
-	ldrb	w25, [x21, #:lo12:.LANCHOR178]
+	ldrb	w25, [x21, #:lo12:.LANCHOR177]
 	ldrh	w0, [x0, #:lo12:.LANCHOR105]
 	madd	w25, w25, w0, w23
-.L2318:
-	tbnz	w23, #31, .L2321
+.L2312:
+	tbnz	w23, #31, .L2315
 	ldrb	w4, [x26]
 	mov	x3, x24
 	mov	x2, x20
@@ -13803,13 +13806,13 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_read_page
 	cmn	w0, #1
-	beq	.L2319
+	beq	.L2313
 	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L2319
-.L2321:
-	add	x21, x21, :lo12:.LANCHOR178
+	bne	.L2313
+.L2315:
+	add	x21, x21, :lo12:.LANCHOR177
 	strh	w19, [x21, 2]
 	bl	ftl_tmp_into_update
 	ldr	x1, [x22, #:lo12:.LANCHOR97]
@@ -13821,12 +13824,12 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_info_flush
 	mov	w0, 0
-	b	.L2308
-.L2319:
+	b	.L2302
+.L2313:
 	sub	w23, w23, #1
 	sub	w25, w25, #1
 	sxth	w23, w23
-	b	.L2318
+	b	.L2312
 	.size	ftl_info_blk_init, .-ftl_info_blk_init
 	.section	.text.ftl_ext_info_flush,"ax",@progbits
 	.align	2
@@ -13843,21 +13846,21 @@ ftl_ext_info_flush:
 	ldr	w1, [x0, 520]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbz	w1, .L2337
+	cbz	w1, .L2331
 	str	wzr, [x0, 520]
-.L2337:
+.L2331:
 	adrp	x20, .LANCHOR80
-	adrp	x22, .LANCHOR183
+	adrp	x22, .LANCHOR182
 	adrp	x21, .LANCHOR99
 	add	x20, x20, :lo12:.LANCHOR80
-	add	x22, x22, :lo12:.LANCHOR183
+	add	x22, x22, :lo12:.LANCHOR182
 	add	x21, x21, :lo12:.LANCHOR99
 	mov	w0, 0
 	bl	ftl_total_vpn_update
-.L2338:
+.L2332:
 	adrp	x23, .LANCHOR97
 	mov	x24, x23
-.L2341:
+.L2335:
 	ldr	x0, [x23, #:lo12:.LANCHOR97]
 	ldr	w1, [x0, 56]
 	add	w1, w1, 1
@@ -13865,26 +13868,26 @@ ftl_ext_info_flush:
 	ldrh	w1, [x0, 140]
 	ldrh	w0, [x20]
 	cmp	w1, w0
-	bcc	.L2339
+	bcc	.L2333
 	bl	ftl_ext_alloc_new_blk
-.L2339:
+.L2333:
 	ldr	x0, [x24, #:lo12:.LANCHOR97]
 	ldrh	w1, [x0, 130]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2340
+	bne	.L2334
 	adrp	x0, .LC0
-	mov	w2, 1747
+	mov	w2, 1746
 	mov	x1, x22
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2340:
+.L2334:
 	ldr	x1, [x24, #:lo12:.LANCHOR97]
 	mov	w19, 21
 	ldrh	w0, [x21]
 	adrp	x26, .LANCHOR121
-	adrp	x27, .LANCHOR177
-	add	x25, x27, :lo12:.LANCHOR177
+	adrp	x27, .LANCHOR176
+	add	x25, x27, :lo12:.LANCHOR176
 	sub	w0, w19, w0
 	mov	w19, 1
 	ldrh	w2, [x1, 130]
@@ -13906,7 +13909,7 @@ ftl_ext_info_flush:
 	mov	w1, w19
 	ldrb	w4, [x26, #:lo12:.LANCHOR121]
 	mov	x3, x25
-	str	wzr, [x27, #:lo12:.LANCHOR177]
+	str	wzr, [x27, #:lo12:.LANCHOR176]
 	adrp	x2, ftl_ext_info_data_buffer
 	add	x2, x2, :lo12:ftl_ext_info_data_buffer
 	ldr	w0, [x0, 56]
@@ -13919,16 +13922,16 @@ ftl_ext_info_flush:
 	and	w1, w1, 65535
 	strh	w1, [x2, 140]
 	cmp	w1, 1
-	beq	.L2341
+	beq	.L2335
 	cmn	w0, #1
-	adrp	x0, .LANCHOR182
-	beq	.L2342
-	ldrb	w1, [x0, #:lo12:.LANCHOR182]
-	cbz	w1, .L2343
-.L2342:
-	strb	wzr, [x0, #:lo12:.LANCHOR182]
-	b	.L2338
-.L2343:
+	adrp	x0, .LANCHOR181
+	beq	.L2336
+	ldrb	w1, [x0, #:lo12:.LANCHOR181]
+	cbz	w1, .L2337
+.L2336:
+	strb	wzr, [x0, #:lo12:.LANCHOR181]
+	b	.L2332
+.L2337:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -13955,11 +13958,11 @@ ftl_ext_info_init:
 	stp	x21, x22, [sp, 32]
 	stp	x27, x28, [sp, 80]
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR177
+	adrp	x24, .LANCHOR176
 	ldrh	w1, [x0, 130]
 	adrp	x0, .LANCHOR99
 	stp	x25, x26, [sp, 64]
-	add	x3, x24, :lo12:.LANCHOR177
+	add	x3, x24, :lo12:.LANCHOR176
 	ldrh	w0, [x0, #:lo12:.LANCHOR99]
 	adrp	x25, ftl_ext_info_data_buffer
 	add	x2, x25, :lo12:ftl_ext_info_data_buffer
@@ -13976,18 +13979,18 @@ ftl_ext_info_init:
 	sxth	w22, w0
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2354
+	tbz	x0, 12, .L2348
 	ldr	x0, [x20, #:lo12:.LANCHOR97]
-	adrp	x1, .LANCHOR184
+	adrp	x1, .LANCHOR183
 	and	w4, w21, 65535
 	mov	w3, w22
-	mov	w2, 1791
-	add	x1, x1, :lo12:.LANCHOR184
+	mov	w2, 1790
+	add	x1, x1, :lo12:.LANCHOR183
 	ldrh	w5, [x0, 130]
-	adrp	x0, .LC134
-	add	x0, x0, :lo12:.LC134
+	adrp	x0, .LC135
+	add	x0, x0, :lo12:.LC135
 	bl	printf
-.L2354:
+.L2348:
 	adrp	x26, .LANCHOR121
 	adrp	x28, .LANCHOR105
 	mov	w5, 20038
@@ -13995,14 +13998,14 @@ ftl_ext_info_init:
 	add	x28, x28, :lo12:.LANCHOR105
 	mov	w23, 0
 	movk	w5, 0x4549, lsl 16
-.L2355:
+.L2349:
 	and	w21, w22, 65535
 	sub	w0, w21, w23
-	tbnz	x0, 15, .L2360
+	tbnz	x0, 15, .L2354
 	ldrh	w0, [x28]
 	sub	w1, w22, w23
 	ldrb	w4, [x26]
-	add	x3, x24, :lo12:.LANCHOR177
+	add	x3, x24, :lo12:.LANCHOR176
 	str	w5, [x29, 108]
 	add	x2, x25, :lo12:ftl_ext_info_data_buffer
 	madd	w1, w0, w19, w1
@@ -14011,22 +14014,22 @@ ftl_ext_info_init:
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
 	ldr	w5, [x29, 108]
-	beq	.L2356
+	beq	.L2350
 	adrp	x0, .LANCHOR10
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x0]
 	cmp	w0, w5
-	bne	.L2356
-.L2360:
+	bne	.L2350
+.L2354:
 	bl	zftl_sblk_list_init
 	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	ldrh	w1, [x0, 140]
 	cmp	w1, w22
-	bgt	.L2358
+	bgt	.L2352
 	add	w21, w21, 1
 	strh	w21, [x0, 140]
 	bl	ftl_ext_info_flush
-.L2358:
+.L2352:
 	adrp	x0, .LANCHOR10
 	mov	w1, -1
 	ldp	x19, x20, [sp, 16]
@@ -14047,9 +14050,9 @@ ftl_ext_info_init:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 112
 	ret
-.L2356:
+.L2350:
 	add	w23, w23, 1
-	b	.L2355
+	b	.L2349
 	.size	ftl_ext_info_init, .-ftl_ext_info_init
 	.section	.text.ftl_low_format_data_init,"ax",@progbits
 	.align	2
@@ -14082,14 +14085,14 @@ ftl_low_format_data_init:
 	mov	w0, 65533
 	sub	w1, w20, #1
 	cmp	w0, w1, uxth
-	bcs	.L2369
-	adrp	x1, .LANCHOR185
+	bcs	.L2363
+	adrp	x1, .LANCHOR184
 	adrp	x0, .LC0
-	mov	w2, 1974
-	add	x1, x1, :lo12:.LANCHOR185
+	mov	w2, 1973
+	add	x1, x1, :lo12:.LANCHOR184
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2369:
+.L2363:
 	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	w2, 256
 	mov	w1, 255
@@ -14113,8 +14116,8 @@ ftl_low_format_data_init:
 	strh	w1, [x0, 694]
 	mov	w1, 1
 	strh	w1, [x0, 688]
-	adrp	x1, .LANCHOR186
-	ldrh	w1, [x1, #:lo12:.LANCHOR186]
+	adrp	x1, .LANCHOR185
+	ldrh	w1, [x1, #:lo12:.LANCHOR185]
 	strh	w1, [x0, 698]
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	mov	w1, 20038
@@ -14181,13 +14184,13 @@ ftl_low_format_data_init:
 ftl_low_format:
 	stp	x29, x30, [sp, -80]!
 	mov	w1, 0
-	adrp	x0, .LC135
-	add	x0, x0, :lo12:.LC135
+	adrp	x0, .LC136
+	add	x0, x0, :lo12:.LC136
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR187
+	adrp	x20, .LANCHOR186
 	stp	x21, x22, [sp, 32]
-	add	x20, x20, :lo12:.LANCHOR187
+	add	x20, x20, :lo12:.LANCHOR186
 	stp	x25, x26, [sp, 64]
 	adrp	x22, .LANCHOR26
 	mov	x25, x22
@@ -14195,30 +14198,30 @@ ftl_low_format:
 	mov	w19, 8
 	adrp	x23, .LC0
 	bl	printf
-.L2374:
+.L2368:
 	ldr	x0, [x22, #:lo12:.LANCHOR26]
 	add	x0, x0, x19, sxtw
 	ldrb	w21, [x0, 32]
 	add	w0, w21, 127
 	and	w0, w0, 255
 	cmp	w0, 125
-	bhi	.L2372
-	mov	w2, 2028
+	bhi	.L2366
+	mov	w2, 2027
 	mov	x1, x20
 	add	x0, x23, :lo12:.LC0
 	bl	printf
-.L2372:
+.L2366:
 	cmp	w21, 255
-	beq	.L2373
+	beq	.L2367
 	adrp	x0, .LANCHOR105
 	ldrh	w1, [x0, #:lo12:.LANCHOR105]
 	mov	w0, 0
 	mul	w1, w1, w21
 	bl	flash_erase_block
-.L2373:
+.L2367:
 	add	w19, w19, 1
 	cmp	w19, 16
-	bne	.L2374
+	bne	.L2368
 	bl	sblk_init
 	adrp	x22, .LANCHOR7
 	bl	ftl_info_blk_init
@@ -14232,9 +14235,9 @@ ftl_low_format:
 	mov	w3, 1
 	ldrh	w2, [x19, #:lo12:.LANCHOR6]
 	add	x2, x0, x2, lsl 2
-.L2375:
+.L2369:
 	cmp	x0, x2
-	bne	.L2376
+	bne	.L2370
 	adrp	x21, .LANCHOR97
 	mov	w1, 21574
 	adrp	x24, .LANCHOR59
@@ -14245,11 +14248,11 @@ ftl_low_format:
 	mov	w26, 1
 	strh	wzr, [x0, 148]
 	str	w1, [x0]
-.L2377:
+.L2371:
 	ldrh	w0, [x19, #:lo12:.LANCHOR6]
 	adrp	x23, .LANCHOR98
 	cmp	w0, w20
-	bhi	.L2385
+	bhi	.L2379
 	ldr	x0, [x25, #:lo12:.LANCHOR26]
 	mov	w4, 3
 	ldrb	w2, [x23, #:lo12:.LANCHOR98]
@@ -14268,7 +14271,7 @@ ftl_low_format:
 	add	x0, x0, 4
 	add	w20, w5, 1
 	add	x0, x1, x0
-.L2388:
+.L2382:
 	cmp	w2, 4
 	add	x1, x1, 4
 	csel	w7, w10, w4, eq
@@ -14277,7 +14280,7 @@ ftl_low_format:
 	orr	w7, w7, -32
 	strb	w7, [x1, -2]
 	cmp	x1, x0
-	bne	.L2388
+	bne	.L2382
 	mul	w5, w5, w8
 	mov	w4, 16
 	add	w0, w3, w8
@@ -14289,14 +14292,14 @@ ftl_low_format:
 	add	w4, w20, w4
 	and	w4, w4, 65535
 	strh	w4, [x6, 134]
-	tbz	x0, 12, .L2389
-	adrp	x0, .LC136
+	tbz	x0, 12, .L2383
+	adrp	x0, .LC137
 	mov	w3, w20
 	mov	w2, 128
-	mov	w1, 2074
-	add	x0, x0, :lo12:.LC136
+	mov	w1, 2073
+	add	x0, x0, :lo12:.LC137
 	bl	printf
-.L2389:
+.L2383:
 	ldr	x0, [x21, #:lo12:.LANCHOR97]
 	mov	w2, 128
 	mov	w1, 255
@@ -14319,9 +14322,9 @@ ftl_low_format:
 	lsl	w4, w4, w0
 	and	w1, w1, 65535
 	and	w4, w4, 65535
-.L2390:
+.L2384:
 	cmp	w20, w12
-	bcc	.L2396
+	bcc	.L2390
 	ldrh	w0, [x19, #:lo12:.LANCHOR6]
 	strh	w3, [x2, 112]
 	sub	w0, w0, w12
@@ -14337,14 +14340,14 @@ ftl_low_format:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2376:
+.L2370:
 	ldrb	w1, [x0, 2]
 	add	x0, x0, 4
 	and	w1, w1, 31
 	bfi	w1, w3, 3, 2
 	strb	w1, [x0, -2]
-	b	.L2375
-.L2385:
+	b	.L2369
+.L2379:
 	strh	w20, [x24]
 	mov	w0, w20
 	bl	ftl_test_block
@@ -14358,16 +14361,16 @@ ftl_low_format:
 	mov	w8, 0
 	mul	w12, w20, w11
 	add	x6, x6, x20, uxth 2
-.L2378:
+.L2372:
 	cmp	w8, w14
-	bcs	.L2382
+	bcs	.L2376
 	add	w15, w11, w7
-	b	.L2383
-.L2381:
+	b	.L2377
+.L2375:
 	add	w1, w7, w12
 	mov	w0, w8
 	bl	flash_check_bad_block
-	cbz	w0, .L2379
+	cbz	w0, .L2373
 	ldrb	w1, [x6, 3]
 	lsl	w0, w26, w7
 	orr	w0, w0, w1
@@ -14375,29 +14378,29 @@ ftl_low_format:
 	ldrh	w0, [x13, 148]
 	add	w0, w0, 1
 	strh	w0, [x13, 148]
-.L2380:
+.L2374:
 	add	w7, w7, 1
-.L2383:
+.L2377:
 	cmp	w7, w15
-	bne	.L2381
+	bne	.L2375
 	add	w8, w8, 1
 	sub	w12, w12, w11
 	and	w8, w8, 65535
-	b	.L2378
-.L2379:
+	b	.L2372
+.L2373:
 	add	w10, w10, 1
 	and	w10, w10, 65535
-	b	.L2380
-.L2382:
-	cbnz	w10, .L2384
+	b	.L2374
+.L2376:
+	cbnz	w10, .L2378
 	ldrb	w0, [x6, 2]
 	orr	w0, w0, -32
 	strb	w0, [x6, 2]
-.L2384:
+.L2378:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2377
-.L2396:
+	b	.L2371
+.L2390:
 	add	x10, x14, x20, uxth 2
 	mov	w6, 0
 	mov	w8, 0
@@ -14405,48 +14408,48 @@ ftl_low_format:
 	ldrb	w0, [x10, 2]
 	orr	w0, w0, -32
 	strb	w0, [x10, 2]
-.L2391:
+.L2385:
 	cmp	w5, w15
-	bcc	.L2398
+	bcc	.L2392
 	add	w20, w20, 1
 	add	w1, w16, w1
 	and	w20, w20, 65535
 	and	w1, w1, 65535
-	b	.L2390
-.L2394:
+	b	.L2384
+.L2388:
 	ldrb	w11, [x10, 3]
 	add	w17, w8, w7
 	asr	w11, w11, w17
-	tbnz	x11, 0, .L2392
+	tbnz	x11, 0, .L2386
 	cmp	w13, 1
-	bls	.L2397
+	bls	.L2391
 	and	w0, w0, 1
 	add	w0, w1, w0
 	and	w0, w0, 65535
-.L2393:
+.L2387:
 	add	x11, x2, x3, sxtw 1
 	add	w3, w3, 1
 	and	w3, w3, 65535
 	add	w0, w0, w6
 	strh	w0, [x11, 160]
-.L2392:
+.L2386:
 	add	x7, x7, 1
-.L2395:
+.L2389:
 	and	w0, w7, 65535
 	cmp	w0, w16
-	bcc	.L2394
+	bcc	.L2388
 	add	w5, w5, 1
 	add	w6, w6, w4
 	and	w5, w5, 65535
 	add	w8, w8, w13
 	and	w6, w6, 65535
-	b	.L2391
-.L2397:
+	b	.L2385
+.L2391:
 	mov	w0, w1
-	b	.L2393
-.L2398:
+	b	.L2387
+.L2392:
 	mov	x7, 0
-	b	.L2395
+	b	.L2389
 	.size	ftl_low_format, .-ftl_low_format
 	.section	.text.ftl_re_low_format,"ax",@progbits
 	.align	2
@@ -14455,8 +14458,8 @@ ftl_low_format:
 ftl_re_low_format:
 	stp	x29, x30, [sp, -16]!
 	mov	w1, 1
-	adrp	x0, .LC137
-	add	x0, x0, :lo12:.LC137
+	adrp	x0, .LC138
+	add	x0, x0, :lo12:.LC138
 	add	x29, sp, 0
 	bl	printf
 	bl	sblk_init
@@ -14473,9 +14476,9 @@ ftl_re_low_format:
 	ldr	x2, [x2, #:lo12:.LANCHOR7]
 	ldrh	w1, [x0, 134]
 	add	x2, x2, x1, uxth 2
-.L2409:
+.L2403:
 	cmp	w1, w7
-	bcc	.L2413
+	bcc	.L2407
 	strh	w5, [x0, 114]
 	strh	w4, [x0, 118]
 	strh	w3, [x0, 116]
@@ -14486,29 +14489,29 @@ ftl_re_low_format:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L2413:
+.L2407:
 	ldrb	w6, [x2, 2]
 	and	w8, w6, 31
 	strb	w8, [x2, 2]
 	ands	w6, w6, 24
-	bne	.L2410
+	bne	.L2404
 	add	w5, w5, 1
 	and	w5, w5, 65535
-.L2411:
+.L2405:
 	add	w1, w1, 1
 	add	x2, x2, 4
 	and	w1, w1, 65535
-	b	.L2409
-.L2410:
+	b	.L2403
+.L2404:
 	cmp	w6, 16
-	bne	.L2412
+	bne	.L2406
 	add	w4, w4, 1
 	and	w4, w4, 65535
-	b	.L2411
-.L2412:
+	b	.L2405
+.L2406:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L2411
+	b	.L2405
 	.size	ftl_re_low_format, .-ftl_re_low_format
 	.section	.text.ftl_prog_ppa_page,"ax",@progbits
 	.align	2
@@ -14530,7 +14533,7 @@ ftl_prog_ppa_page:
 ftl_write_last_log_page:
 	ldrh	w1, [x0, 6]
 	cmp	w1, 1
-	bne	.L2418
+	bne	.L2412
 	stp	x29, x30, [sp, -48]!
 	adrp	x1, .LANCHOR111
 	add	x29, sp, 0
@@ -14542,15 +14545,15 @@ ftl_write_last_log_page:
 	bl	ftl_get_new_free_page
 	mov	w21, w0
 	cmn	w0, #1
-	beq	.L2419
+	beq	.L2413
 	ldrh	w0, [x19]
 	add	x20, x20, x22, uxth 2
 	bl	ftl_vpn_decrement
-	adrp	x0, .LANCHOR175
+	adrp	x0, .LANCHOR174
 	mov	w1, 15555
-	add	x6, x0, :lo12:.LANCHOR175
+	add	x6, x0, :lo12:.LANCHOR174
 	movk	w1, 0xf55f, lsl 16
-	str	w1, [x0, #:lo12:.LANCHOR175]
+	str	w1, [x0, #:lo12:.LANCHOR174]
 	adrp	x0, .LANCHOR80
 	ldrh	w1, [x0, #:lo12:.LANCHOR80]
 	adrp	x0, .LANCHOR73
@@ -14567,13 +14570,13 @@ ftl_write_last_log_page:
 	mov	w0, w21
 	str	wzr, [x6, 12]
 	bl	ftl_prog_ppa_page
-.L2419:
+.L2413:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L2418:
+.L2412:
 	mov	w0, -1
 	ret
 	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
@@ -14593,41 +14596,41 @@ ftl_open_sblk_recovery:
 	mov	x25, x1
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
-	tbz	x0, 12, .L2425
+	tbz	x0, 12, .L2419
 	ldrh	w1, [x28, 2]
-	adrp	x0, .LC138
-	add	x0, x0, :lo12:.LC138
-	bl	printf
-.L2425:
-	ldr	w0, [x22, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2426
-	ldrb	w1, [x28, 5]
 	adrp	x0, .LC139
 	add	x0, x0, :lo12:.LC139
 	bl	printf
-.L2426:
+.L2419:
 	ldr	w0, [x22, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2427
-	ldrh	w1, [x28]
+	tbz	x0, 12, .L2420
+	ldrb	w1, [x28, 5]
 	adrp	x0, .LC140
 	add	x0, x0, :lo12:.LC140
 	bl	printf
-.L2427:
+.L2420:
 	ldr	w0, [x22, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2428
-	ldrh	w2, [x28, 18]
+	tbz	x0, 12, .L2421
+	ldrh	w1, [x28]
 	adrp	x0, .LC141
-	ldrh	w1, [x28, 16]
 	add	x0, x0, :lo12:.LC141
 	bl	printf
-.L2428:
+.L2421:
+	ldr	w0, [x22, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2422
+	ldrh	w2, [x28, 18]
+	adrp	x0, .LC142
+	ldrh	w1, [x28, 16]
+	add	x0, x0, :lo12:.LC142
+	bl	printf
+.L2422:
 	ldrh	w0, [x28, 10]
 	strh	w0, [x28, 14]
 	adrp	x0, .LANCHOR6
 	ldrh	w1, [x28]
 	ldrh	w0, [x0, #:lo12:.LANCHOR6]
 	cmp	w1, w0
-	bcs	.L2424
+	bcs	.L2418
 	mov	w0, 1
 	bl	buf_alloc
 	ldrb	w20, [x28, 5]
@@ -14638,11 +14641,11 @@ ftl_open_sblk_recovery:
 	add	x0, x26, :lo12:.LANCHOR121
 	adrp	x23, .LANCHOR80
 	str	x0, [x29, 128]
-.L2431:
+.L2425:
 	ldrh	w0, [x23, #:lo12:.LANCHOR80]
 	cmp	w0, w21
-	bhi	.L2444
-.L2434:
+	bhi	.L2438
+.L2428:
 	ldrh	w0, [x28, 10]
 	ldrh	w1, [x28, 6]
 	ldrh	w2, [x23, #:lo12:.LANCHOR80]
@@ -14652,22 +14655,22 @@ ftl_open_sblk_recovery:
 	strb	w20, [x28, 5]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L2445
-	adrp	x1, .LANCHOR188
+	beq	.L2439
+	adrp	x1, .LANCHOR187
 	adrp	x0, .LC0
-	mov	w2, 1473
-	add	x1, x1, :lo12:.LANCHOR188
+	mov	w2, 1472
+	add	x1, x1, :lo12:.LANCHOR187
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2445:
+.L2439:
 	adrp	x21, .LANCHOR111
 	ldrh	w3, [x28, 10]
 	mov	w0, 0
 	mov	w1, 0
 	ldr	x5, [x21, #:lo12:.LANCHOR111]
-.L2446:
+.L2440:
 	cmp	w1, w3
-	bcc	.L2448
+	bcc	.L2442
 	ldrb	w20, [x28, 9]
 	adrp	x24, .LANCHOR9
 	ldrh	w1, [x23, #:lo12:.LANCHOR80]
@@ -14675,32 +14678,32 @@ ftl_open_sblk_recovery:
 	ldr	w0, [x22, #:lo12:.LANCHOR14]
 	sub	w20, w20, w3
 	and	w20, w20, 65535
-	tbz	x0, 12, .L2449
+	tbz	x0, 12, .L2443
 	ldrh	w1, [x28]
 	ldr	x2, [x24, #:lo12:.LANCHOR9]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w3, [x2, x0]
-	adrp	x0, .LC142
+	adrp	x0, .LC143
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC142
+	add	x0, x0, :lo12:.LC143
 	bl	printf
-.L2449:
+.L2443:
 	ldr	x0, [x24, #:lo12:.LANCHOR9]
 	adrp	x25, .LANCHOR121
 	ldrh	w1, [x28]
 	adrp	x24, .LANCHOR73
-	adrp	x26, .LC143
+	adrp	x26, .LC144
 	add	x24, x24, :lo12:.LANCHOR73
 	add	x25, x25, :lo12:.LANCHOR121
-	add	x26, x26, :lo12:.LC143
+	add	x26, x26, :lo12:.LC144
 	strh	w20, [x0, x1, lsl 1]
 	mov	w20, 0
 	mov	x0, x19
 	bl	buf_free
-.L2450:
+.L2444:
 	ldrb	w0, [x24]
 	cmp	w20, w0, lsl 1
-	bcc	.L2453
+	bcc	.L2447
 	ldrh	w1, [x28, 12]
 	ldrh	w0, [x23, #:lo12:.LANCHOR80]
 	ldrb	w2, [x28, 9]
@@ -14710,17 +14713,17 @@ ftl_open_sblk_recovery:
 	ldr	x1, [x21, #:lo12:.LANCHOR111]
 	ldr	w0, [x1, x0]
 	cmn	w0, #1
-	beq	.L2454
-	adrp	x1, .LANCHOR188
+	beq	.L2448
+	adrp	x1, .LANCHOR187
 	adrp	x0, .LC0
-	mov	w2, 1503
-	add	x1, x1, :lo12:.LANCHOR188
+	mov	w2, 1502
+	add	x1, x1, :lo12:.LANCHOR187
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2454:
+.L2448:
 	ldrh	w0, [x28, 6]
 	cmp	w0, 1
-	bne	.L2424
+	bne	.L2418
 	ldp	x19, x20, [sp, 16]
 	mov	x0, x28
 	ldp	x21, x22, [sp, 32]
@@ -14729,25 +14732,25 @@ ftl_open_sblk_recovery:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	b	ftl_write_last_log_page
-.L2444:
+.L2438:
 	ldrb	w20, [x28, 5]
 	adrp	x24, .LANCHOR105
 	add	x0, x24, :lo12:.LANCHOR105
 	str	x0, [x29, 136]
-.L2432:
+.L2426:
 	ldrb	w0, [x28, 9]
 	cmp	w0, w20
-	bhi	.L2443
+	bhi	.L2437
 	add	w21, w21, 1
 	strb	wzr, [x28, 5]
 	and	w21, w21, 65535
-	b	.L2431
-.L2443:
+	b	.L2425
+.L2437:
 	add	x0, x28, x20, sxtw 1
 	mov	w1, 65535
 	ldrh	w0, [x0, 16]
 	cmp	w0, w1
-	beq	.L2433
+	beq	.L2427
 	ldr	x1, [x29, 136]
 	ldrb	w3, [x26, #:lo12:.LANCHOR121]
 	ldr	x2, [x19, 24]
@@ -14757,36 +14760,36 @@ ftl_open_sblk_recovery:
 	bl	ftl_read_ppa_page
 	mov	w24, w0
 	cmp	w0, 512
-	beq	.L2434
+	beq	.L2428
 	cmn	w0, #1
-	beq	.L2435
+	beq	.L2429
 	ldr	x0, [x19, 24]
 	ldr	w1, [x0]
 	cmn	w1, #1
-	bne	.L2435
+	bne	.L2429
 	ldr	w0, [x0, 4]
 	cmn	w0, #1
-	bne	.L2435
+	bne	.L2429
 	ldr	x0, [x19, 8]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L2434
-.L2435:
-	adrp	x0, .LANCHOR181
+	beq	.L2428
+.L2429:
+	adrp	x0, .LANCHOR180
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR181]
+	strb	w1, [x0, #:lo12:.LANCHOR180]
 	ldrb	w0, [x28, 9]
 	ldrh	w1, [x28, 10]
 	madd	w0, w0, w21, w20
 	cmp	w1, w0
-	beq	.L2436
-	adrp	x1, .LANCHOR188
+	beq	.L2430
+	adrp	x1, .LANCHOR187
 	adrp	x0, .LC0
-	mov	w2, 1396
-	add	x1, x1, :lo12:.LANCHOR188
+	mov	w2, 1395
+	add	x1, x1, :lo12:.LANCHOR187
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2436:
+.L2430:
 	ldrh	w0, [x28, 10]
 	ldrh	w1, [x28, 6]
 	ldrb	w2, [x28, 9]
@@ -14794,28 +14797,28 @@ ftl_open_sblk_recovery:
 	ldrh	w0, [x23, #:lo12:.LANCHOR80]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L2437
-	adrp	x1, .LANCHOR188
+	beq	.L2431
+	adrp	x1, .LANCHOR187
 	adrp	x0, .LC0
-	mov	w2, 1397
-	add	x1, x1, :lo12:.LANCHOR188
+	mov	w2, 1396
+	add	x1, x1, :lo12:.LANCHOR187
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2437:
+.L2431:
 	cmn	w24, #1
-	beq	.L2439
+	beq	.L2433
 	ldr	x0, [x19, 24]
 	ldr	w0, [x0, 4]
 	cmn	w0, #1
-	beq	.L2439
+	beq	.L2433
 	bl	lpa_hash_get_ppa
-	cbz	x25, .L2441
+	cbz	x25, .L2435
 	ldr	x3, [x19, 24]
 	ldr	w1, [x3, 8]
 	cmp	w0, w1
-	beq	.L2441
+	beq	.L2435
 	cmn	w0, #1
-	beq	.L2441
+	beq	.L2435
 	adrp	x6, .LANCHOR99
 	mov	w5, 21
 	mov	w27, 1
@@ -14830,11 +14833,11 @@ ftl_open_sblk_recovery:
 	udiv	w1, w1, w2
 	ldrh	w2, [x25]
 	cmp	w2, w1, uxth
-	bne	.L2441
+	bne	.L2435
 	ldr	x1, [x29, 128]
-	adrp	x8, .LANCHOR177
+	adrp	x8, .LANCHOR176
 	ldr	w10, [x3]
-	add	x2, x8, :lo12:.LANCHOR177
+	add	x2, x8, :lo12:.LANCHOR176
 	stp	w5, w10, [x29, 112]
 	str	x8, [x29, 120]
 	ldrb	w3, [x1]
@@ -14843,13 +14846,13 @@ ftl_open_sblk_recovery:
 	bl	ftl_read_ppa_page
 	ldr	x8, [x29, 120]
 	ldr	w10, [x29, 116]
-	ldr	w0, [x8, #:lo12:.LANCHOR177]
+	ldr	w0, [x8, #:lo12:.LANCHOR176]
 	cmp	w10, w0
-	bhi	.L2441
+	bhi	.L2435
 	ldr	x0, [x19, 24]
 	ldr	w0, [x0, 8]
 	cmn	w0, #1
-	beq	.L2439
+	beq	.L2433
 	ldp	x7, x6, [x29, 96]
 	ldr	w5, [x29, 112]
 	ldrh	w1, [x6, #:lo12:.LANCHOR99]
@@ -14861,7 +14864,7 @@ ftl_open_sblk_recovery:
 	ldrb	w0, [x7, #:lo12:.LANCHOR98]
 	udiv	w0, w27, w0
 	bl	ftl_vpn_decrement
-.L2439:
+.L2433:
 	ldrh	w0, [x28, 6]
 	mov	w27, 1
 	sub	w0, w0, #1
@@ -14869,37 +14872,37 @@ ftl_open_sblk_recovery:
 	ldrh	w0, [x28, 10]
 	add	w0, w0, 1
 	strh	w0, [x28, 10]
-.L2433:
+.L2427:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2432
-.L2448:
+	b	.L2426
+.L2442:
 	ldrh	w2, [x28, 12]
 	add	w2, w2, w1
 	ldr	w2, [x5, x2, lsl 2]
 	cmn	w2, #1
-	beq	.L2447
+	beq	.L2441
 	add	w20, w0, 1
 	and	w0, w20, 65535
-.L2447:
+.L2441:
 	add	w1, w1, 1
-	b	.L2446
-.L2453:
-	cbz	w27, .L2451
+	b	.L2440
+.L2447:
+	cbz	w27, .L2445
 	ldrh	w0, [x28, 6]
 	cmp	w0, 1
-	bls	.L2451
+	bls	.L2445
 	mov	x0, x28
 	bl	ftl_get_new_free_page
 	mov	w4, w0
 	ldr	w0, [x22, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2452
+	tbz	x0, 12, .L2446
 	mov	w1, w4
 	str	w4, [x29, 136]
 	mov	x0, x26
 	bl	printf
 	ldr	w4, [x29, 136]
-.L2452:
+.L2446:
 	adrp	x0, .LANCHOR97
 	ldr	x2, [x19, 24]
 	ldr	x1, [x19, 8]
@@ -14915,37 +14918,37 @@ ftl_open_sblk_recovery:
 	bl	ftl_prog_ppa_page
 	ldrh	w0, [x28]
 	bl	ftl_vpn_decrement
-.L2451:
+.L2445:
 	add	w20, w20, 1
-	b	.L2450
-.L2441:
+	b	.L2444
+.L2435:
 	ldr	x3, [x19, 24]
 	adrp	x0, .LANCHOR118
 	ldr	w0, [x0, #:lo12:.LANCHOR118]
 	ldr	w1, [x3, 4]
 	cmp	w1, w0
-	bcs	.L2439
+	bcs	.L2433
 	ldrb	w0, [x28, 9]
 	ldrh	w1, [x23, #:lo12:.LANCHOR80]
 	ldrh	w2, [x28, 10]
 	mul	w0, w0, w1
 	sub	w0, w0, #1
 	cmp	w2, w0
-	bge	.L2439
+	bge	.L2433
 	adrp	x0, .LANCHOR97
 	ldr	w1, [x3]
 	ldr	x0, [x0, #:lo12:.LANCHOR97]
 	ldr	w5, [x0, 8]
 	cmp	w1, w5
-	bls	.L2442
+	bls	.L2436
 	str	w1, [x0, 8]
-.L2442:
+.L2436:
 	ldrh	w0, [x28, 12]
 	add	w2, w2, w0
 	ldp	w0, w1, [x3, 4]
 	bl	lpa_hash_update_ppa
-	b	.L2439
-.L2424:
+	b	.L2433
+.L2418:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -14975,7 +14978,7 @@ pm_write_page:
 	add	x22, x22, :lo12:.LANCHOR105
 	mov	w24, 65535
 	str	x27, [sp, 80]
-.L2504:
+.L2498:
 	ldr	x0, [x23, #:lo12:.LANCHOR97]
 	ldr	w1, [x0, 48]
 	ldrh	w2, [x0, 696]
@@ -14983,37 +14986,37 @@ pm_write_page:
 	str	w1, [x0, 48]
 	ldrh	w1, [x21]
 	cmp	w2, w1
-	bcs	.L2505
+	bcs	.L2499
 	ldrh	w0, [x0, 692]
 	cmp	w0, w24
-	bne	.L2506
-.L2505:
+	bne	.L2500
+.L2499:
 	bl	pm_alloc_new_blk
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2506:
+.L2500:
 	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	ldrh	w0, [x0, 692]
 	cmp	w0, w24
-	bne	.L2507
-	adrp	x1, .LANCHOR189
+	bne	.L2501
+	adrp	x1, .LANCHOR188
 	adrp	x0, .LC0
 	mov	w2, 230
-	add	x1, x1, :lo12:.LANCHOR189
+	add	x1, x1, :lo12:.LANCHOR188
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2507:
+.L2501:
 	ldr	x0, [x20, #:lo12:.LANCHOR97]
-	adrp	x27, .LANCHOR190
+	adrp	x27, .LANCHOR189
 	ldrh	w1, [x22]
 	mov	w2, 64
 	ldrh	w26, [x0, 692]
 	ldrh	w0, [x0, 696]
 	madd	w26, w26, w1, w0
-	ldr	x0, [x27, #:lo12:.LANCHOR190]
+	ldr	x0, [x27, #:lo12:.LANCHOR189]
 	mov	w1, 0
 	bl	ftl_memset
-	ldr	x3, [x27, #:lo12:.LANCHOR190]
+	ldr	x3, [x27, #:lo12:.LANCHOR189]
 	mov	x2, x25
 	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	str	w19, [x3]
@@ -15030,28 +15033,28 @@ pm_write_page:
 	and	w1, w1, 65535
 	strh	w1, [x2, 696]
 	cmp	w1, 1
-	adrp	x1, .LANCHOR191
-	beq	.L2508
-	ldrb	w3, [x1, #:lo12:.LANCHOR191]
-	cbz	w3, .L2509
-.L2508:
-	strb	wzr, [x1, #:lo12:.LANCHOR191]
-	b	.L2504
-.L2509:
+	adrp	x1, .LANCHOR190
+	beq	.L2502
+	ldrb	w3, [x1, #:lo12:.LANCHOR190]
+	cbz	w3, .L2503
+.L2502:
+	strb	wzr, [x1, #:lo12:.LANCHOR190]
+	b	.L2498
+.L2503:
 	cmn	w0, #1
-	bne	.L2511
+	bne	.L2505
 	mov	w1, w26
-	adrp	x0, .LC144
-	add	x0, x0, :lo12:.LC144
+	adrp	x0, .LC145
+	add	x0, x0, :lo12:.LC145
 	bl	printf
-	b	.L2504
-.L2511:
+	b	.L2498
+.L2505:
 	ldrh	w0, [x2, 698]
 	cmp	w19, w0
-	bcs	.L2512
+	bcs	.L2506
 	add	x19, x2, x19, uxtw 2
 	str	w26, [x19, 704]
-.L2512:
+.L2506:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -15075,14 +15078,14 @@ flash_info_flush:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2518
-	adrp	x2, .LANCHOR192
+	tbz	x0, 12, .L2512
+	adrp	x2, .LANCHOR191
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR192
+	add	x2, x2, :lo12:.LANCHOR191
 	mov	w1, 251
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2518:
+.L2512:
 	adrp	x23, .LANCHOR158
 	adrp	x20, .LANCHOR26
 	mov	w2, 64
@@ -15090,18 +15093,18 @@ flash_info_flush:
 	ldr	x0, [x23, #:lo12:.LANCHOR158]
 	adrp	x21, .LANCHOR159
 	adrp	x22, .LANCHOR2
-	adrp	x24, .LC146
+	adrp	x24, .LC147
 	adrp	x25, .LANCHOR135
 	add	x22, x22, :lo12:.LANCHOR2
-	add	x24, x24, :lo12:.LC146
+	add	x24, x24, :lo12:.LC147
 	add	x25, x25, :lo12:.LANCHOR135
 	bl	ftl_memset
 	add	x27, x21, :lo12:.LANCHOR159
 	ldr	x1, [x20, #:lo12:.LANCHOR26]
 	mov	w3, 16
 	mov	w2, 4
-	adrp	x0, .LC145
-	add	x0, x0, :lo12:.LC145
+	adrp	x0, .LC146
+	add	x0, x0, :lo12:.LC146
 	mov	w26, 0
 	bl	rknand_print_hex
 	ldr	x6, [x20, #:lo12:.LANCHOR26]
@@ -15109,7 +15112,7 @@ flash_info_flush:
 	ldr	w1, [x6, 8]
 	bl	js_hash
 	str	w0, [x6, 12]
-.L2519:
+.L2513:
 	add	x28, x21, :lo12:.LANCHOR159
 	ldrb	w4, [x21, #:lo12:.LANCHOR159]
 	ldrh	w19, [x22]
@@ -15124,7 +15127,7 @@ flash_info_flush:
 	sub	w0, w0, #1
 	cmp	w1, w0
 	ldp	w3, w4, [x29, 104]
-	blt	.L2520
+	blt	.L2514
 	ldr	x6, [x20, #:lo12:.LANCHOR26]
 	ldrb	w7, [x28, 1]
 	strh	wzr, [x28, 2]
@@ -15143,18 +15146,18 @@ flash_info_flush:
 	ldrh	w19, [x22]
 	str	w0, [x6, 12]
 	mul	w19, w19, w7
-.L2529:
+.L2523:
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_erase_block
-	b	.L2521
-.L2524:
+	b	.L2515
+.L2518:
 	mov	w26, 1
-	b	.L2519
-.L2520:
+	b	.L2513
+.L2514:
 	madd	w19, w19, w4, w3
-	cbz	w1, .L2529
-.L2521:
+	cbz	w1, .L2523
+.L2515:
 	ldr	x2, [x20, #:lo12:.LANCHOR26]
 	mov	w1, w19
 	ldr	x3, [x23, #:lo12:.LANCHOR158]
@@ -15171,14 +15174,14 @@ flash_info_flush:
 	ldrh	w1, [x27, 2]
 	add	w1, w1, 1
 	strh	w1, [x27, 2]
-	bne	.L2522
+	bne	.L2516
 	mov	w1, w19
-	adrp	x0, .LC147
-	add	x0, x0, :lo12:.LC147
+	adrp	x0, .LC148
+	add	x0, x0, :lo12:.LC148
 	bl	printf
-	b	.L2519
-.L2522:
-	cbz	w26, .L2524
+	b	.L2513
+.L2516:
+	cbz	w26, .L2518
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -15193,7 +15196,7 @@ flash_info_flush:
 	.global	nand_flash_init
 	.type	nand_flash_init, %function
 nand_flash_init:
-	stp	x29, x30, [sp, -96]!
+	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	adrp	x21, .LANCHOR14
@@ -15202,31 +15205,27 @@ nand_flash_init:
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2531
-	adrp	x2, .LANCHOR193
+	tbz	x0, 12, .L2525
+	adrp	x2, .LANCHOR192
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR193
-	mov	w1, 2209
+	add	x2, x2, :lo12:.LANCHOR192
+	mov	w1, 2220
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2531:
+.L2525:
 	mov	x0, x19
 	adrp	x23, .LANCHOR16
 	bl	nandc_init
 	adrp	x19, .LANCHOR34
-	adrp	x20, .LANCHOR41
+	adrp	x22, .LANCHOR41
 	add	x0, x19, :lo12:.LANCHOR34
-	add	x24, x20, :lo12:.LANCHOR41
+	add	x24, x22, :lo12:.LANCHOR41
 	str	x0, [x23, #:lo12:.LANCHOR16]
-	adrp	x25, .LANCHOR35
+	mov	x25, x24
 	adrp	x0, .LANCHOR18
-	add	x25, x25, :lo12:.LANCHOR35
-	mov	x26, x24
 	mov	w1, 1
-	mov	x22, 0
-	mov	w27, 2
-	mov	w28, 44
+	mov	w20, 0
+	mov	w26, 44
 	strb	w1, [x0, #:lo12:.LANCHOR18]
 	mov	w2, 8
 	mov	w1, 0
@@ -15238,117 +15237,118 @@ nand_flash_init:
 	adrp	x0, .LANCHOR136
 	add	x0, x0, :lo12:.LANCHOR136
 	bl	ftl_memset
-.L2537:
+.L2531:
 	mov	x1, x24
-	mov	w0, w22
+	mov	w0, w20
 	bl	flash_read_id
-	strb	w27, [x22, x25]
-	cbnz	x22, .L2532
-	ldrb	w0, [x26]
+	cbnz	w20, .L2526
+	ldrb	w0, [x25]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bls	.L2533
-.L2535:
+	bls	.L2527
+.L2529:
 	mov	w19, -2
-.L2530:
+.L2524:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 96
+	ldp	x29, x30, [sp], 80
 	ret
-.L2533:
-	ldrb	w0, [x26, 1]
+.L2527:
+	ldrb	w0, [x25, 1]
 	cmp	w0, 255
-	beq	.L2535
-.L2532:
+	beq	.L2529
+.L2526:
 	ldrb	w0, [x24]
 	cmp	w0, 181
-	bne	.L2536
-	strb	w28, [x24]
-.L2536:
-	add	x22, x22, 1
+	bne	.L2530
+	strb	w26, [x24]
+.L2530:
+	add	w20, w20, 1
 	add	x24, x24, 8
-	cmp	x22, 4
-	bne	.L2537
-	adrp	x0, .LANCHOR194
-	add	x8, x0, :lo12:.LANCHOR194
+	and	w20, w20, 255
+	cmp	w20, 4
+	bne	.L2531
+	adrp	x0, .LANCHOR193
+	add	x8, x0, :lo12:.LANCHOR193
 	add	x8, x8, 1
 	mov	x7, x0
-	add	x12, x20, :lo12:.LANCHOR41
+	add	x12, x22, :lo12:.LANCHOR41
 	mov	x10, 0
-.L2540:
+.L2534:
 	ldrb	w2, [x8, -1]
 	mov	w11, w10
 	lsl	x24, x10, 5
 	mov	x1, x12
 	mov	x0, x8
 	bl	flash_mem_cmp8
-	cbnz	w0, .L2538
-	add	x0, x7, :lo12:.LANCHOR194
+	cbnz	w0, .L2532
+	add	x0, x7, :lo12:.LANCHOR193
 	ubfiz	x11, x11, 5, 32
 	add	x24, x0, x24
 	add	x0, x0, x11
-	adrp	x1, .LANCHOR195
-	add	x4, x1, :lo12:.LANCHOR195
+	adrp	x1, .LANCHOR194
+	add	x4, x1, :lo12:.LANCHOR194
 	ldrb	w3, [x0, 22]
 	mov	x0, 0
-.L2539:
+.L2533:
 	lsl	x5, x0, 5
 	mov	w2, w0
 	ldrb	w5, [x5, x4]
 	cmp	w5, w3
-	beq	.L2541
+	beq	.L2535
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L2539
+	bne	.L2533
 	mov	w2, w0
-.L2541:
+.L2535:
 	ubfiz	x0, x2, 5, 32
-	add	x1, x1, :lo12:.LANCHOR195
+	add	x1, x1, :lo12:.LANCHOR194
 	add	x1, x1, x0
 	mov	w2, 32
 	adrp	x0, .LANCHOR19
 	add	x0, x0, :lo12:.LANCHOR19
 	bl	ftl_memcpy
-	add	x22, x19, :lo12:.LANCHOR34
+	add	x20, x19, :lo12:.LANCHOR34
 	mov	x1, x24
 	adrp	x24, .LANCHOR27
 	mov	w2, 32
-	mov	x0, x22
+	mov	x0, x20
 	bl	ftl_memcpy
 	ldrb	w0, [x24, #:lo12:.LANCHOR27]
 	cmp	w0, 8
-	bhi	.L2542
-	ldrb	w1, [x22, 20]
+	bhi	.L2536
+	ldrb	w1, [x20, 20]
 	cmp	w1, 60
-	bls	.L2543
+	bls	.L2537
 	mov	w1, 60
-	strb	w1, [x22, 20]
-.L2543:
+	strb	w1, [x20, 20]
+.L2537:
 	cmp	w0, 8
-	bne	.L2542
-	ldrb	w0, [x20, #:lo12:.LANCHOR41]
+	bne	.L2536
+	ldrb	w0, [x22, #:lo12:.LANCHOR41]
+	mov	w1, 137
 	cmp	w0, 44
-	bne	.L2542
+	ccmp	w0, w1, 4, ne
+	bne	.L2536
 	add	x0, x19, :lo12:.LANCHOR34
 	ldrb	w1, [x0, 28]
 	cmp	w1, 3
-	bne	.L2542
+	bne	.L2536
 	strb	wzr, [x0, 28]
-.L2542:
+.L2536:
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2544
-	adrp	x2, .LANCHOR193
+	tbz	x0, 12, .L2538
+	adrp	x2, .LANCHOR192
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR193
-	mov	w1, 2233
+	add	x2, x2, :lo12:.LANCHOR192
+	mov	w1, 2244
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2544:
+.L2538:
 	mov	w0, 16384
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR161
@@ -15374,8 +15374,8 @@ nand_flash_init:
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR158
 	str	x0, [x1, #:lo12:.LANCHOR158]
-	adrp	x0, .LANCHOR167
-	strb	wzr, [x0, #:lo12:.LANCHOR167]
+	adrp	x0, .LANCHOR195
+	strb	wzr, [x0, #:lo12:.LANCHOR195]
 	bl	flash_die_info_init
 	ldrb	w0, [x20, 18]
 	bl	flash_lsb_page_tbl_build
@@ -15411,65 +15411,65 @@ nand_flash_init:
 	strb	w2, [x1, #:lo12:.LANCHOR17]
 	ldrb	w2, [x24, #:lo12:.LANCHOR27]
 	cmp	w2, 9
-	bne	.L2545
+	bne	.L2539
 	mov	w2, 70
 	strb	w2, [x1, #:lo12:.LANCHOR17]
-.L2545:
+.L2539:
 	add	x19, x19, :lo12:.LANCHOR34
-	adrp	x1, .LANCHOR168
+	adrp	x1, .LANCHOR167
 	adrp	x25, .LANCHOR23
-	strb	w0, [x1, #:lo12:.LANCHOR168]
+	strb	w0, [x1, #:lo12:.LANCHOR167]
 	ldrh	w1, [x19, 16]
 	ldrb	w0, [x19, 19]
 	strb	w0, [x25, #:lo12:.LANCHOR23]
-	tbz	x1, 6, .L2547
+	tbz	x1, 6, .L2541
 	sub	w1, w0, #17
 	and	w1, w1, 255
 	cmp	w1, 2
-	bhi	.L2548
+	bhi	.L2542
 	adrp	x1, micron_read_retrial
 	add	x1, x1, :lo12:micron_read_retrial
 	str	x1, [x20, #:lo12:.LANCHOR156]
 	cmp	w0, 19
 	adrp	x0, .LANCHOR154
-	beq	.L2549
+	beq	.L2543
 	mov	w1, 7
-.L2593:
+.L2590:
 	strb	w1, [x0, #:lo12:.LANCHOR154]
-	b	.L2547
-.L2538:
+	b	.L2541
+.L2532:
 	add	x10, x10, 1
 	add	x8, x8, 32
-	cmp	x10, 30
-	bne	.L2540
-	b	.L2535
-.L2549:
+	cmp	x10, 32
+	bne	.L2534
+	b	.L2529
+.L2543:
 	mov	w1, 15
-	b	.L2593
-.L2548:
+	b	.L2590
+.L2542:
 	sub	w1, w0, #65
 	cmp	w0, 33
 	and	w1, w1, 255
 	ccmp	w1, 1, 0, ne
-	bhi	.L2551
+	bhi	.L2545
 	adrp	x0, toshiba_read_retrial
 	add	x0, x0, :lo12:toshiba_read_retrial
 	str	x0, [x20, #:lo12:.LANCHOR156]
 	adrp	x0, .LANCHOR25
 	mov	w1, 4
 	strb	w1, [x0, #:lo12:.LANCHOR25]
-.L2595:
+.L2592:
 	mov	w1, 7
 	adrp	x0, .LANCHOR154
-	b	.L2593
-.L2551:
+	b	.L2590
+.L2545:
 	sub	w2, w0, #34
 	sub	w1, w0, #67
 	and	w2, w2, 255
 	and	w1, w1, 255
 	cmp	w2, 1
 	ccmp	w1, 1, 0, hi
-	bhi	.L2552
+	bhi	.L2546
 	adrp	x2, toshiba_read_retrial
 	add	x2, x2, :lo12:toshiba_read_retrial
 	str	x2, [x20, #:lo12:.LANCHOR156]
@@ -15477,87 +15477,87 @@ nand_flash_init:
 	mov	w2, 68
 	ccmp	w0, w2, 4, ne
 	adrp	x0, .LANCHOR154
-	beq	.L2553
+	beq	.L2547
 	mov	w2, 7
-.L2592:
+.L2589:
 	strb	w2, [x0, #:lo12:.LANCHOR154]
 	cmp	w1, 1
 	adrp	x0, .LANCHOR25
-	bhi	.L2555
+	bhi	.L2549
 	mov	w1, 4
-.L2594:
+.L2591:
 	strb	w1, [x0, #:lo12:.LANCHOR25]
-.L2547:
+.L2541:
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2556
-	adrp	x2, .LANCHOR193
+	tbz	x0, 12, .L2550
+	adrp	x2, .LANCHOR192
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR193
-	mov	w1, 2281
+	add	x2, x2, :lo12:.LANCHOR192
+	mov	w1, 2292
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2556:
+.L2550:
 	adrp	x24, .LANCHOR20
 	ldrb	w0, [x23, #:lo12:.LANCHOR42]
 	strb	wzr, [x24, #:lo12:.LANCHOR20]
-	tbz	x0, 0, .L2557
+	tbz	x0, 0, .L2551
 	mov	w0, 4
 	bl	nandc_set_if_mode
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
-.L2596:
+.L2593:
 	bl	nandc_set_if_mode
 	bl	flash_info_blk_init
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L2559
+	bne	.L2553
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2560
-	adrp	x2, .LANCHOR193
+	tbz	x0, 12, .L2554
+	adrp	x2, .LANCHOR192
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR193
-	mov	w1, 2301
+	add	x2, x2, :lo12:.LANCHOR192
+	mov	w1, 2313
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2560:
+.L2554:
 	ldr	x0, [x22, #:lo12:.LANCHOR26]
 	mov	w1, 17
 	strb	w1, [x0, 32]
-	b	.L2530
-.L2553:
+	b	.L2524
+.L2547:
 	mov	w2, 17
-	b	.L2592
-.L2555:
+	b	.L2589
+.L2549:
 	mov	w1, 5
-	b	.L2594
-.L2552:
+	b	.L2591
+.L2546:
 	sub	w0, w0, #36
 	and	w0, w0, 255
 	cmp	w0, 1
-	bhi	.L2547
+	bhi	.L2541
 	adrp	x0, toshiba_3d_read_retrial
 	add	x0, x0, :lo12:toshiba_3d_read_retrial
 	str	x0, [x20, #:lo12:.LANCHOR156]
-	b	.L2595
-.L2557:
+	b	.L2592
+.L2551:
 	mov	w0, 4
-	b	.L2596
-.L2559:
+	b	.L2593
+.L2553:
 	ldrb	w0, [x25, #:lo12:.LANCHOR23]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 6
-	bhi	.L2561
+	bhi	.L2555
 	adrp	x0, hynix_read_retrial
 	add	x0, x0, :lo12:hynix_read_retrial
 	str	x0, [x20, #:lo12:.LANCHOR156]
-.L2561:
+.L2555:
 	ldrb	w0, [x23, #:lo12:.LANCHOR42]
-	tbz	x0, 2, .L2563
+	tbz	x0, 2, .L2557
 	ldr	x0, [x22, #:lo12:.LANCHOR26]
 	ldrb	w0, [x0, 19]
-	cbz	w0, .L2563
+	cbz	w0, .L2557
 	adrp	x0, .LANCHOR159
 	ldrb	w1, [x0, #:lo12:.LANCHOR159]
 	adrp	x0, .LANCHOR2
@@ -15566,23 +15566,23 @@ nand_flash_init:
 	mov	w0, 0
 	bl	flash_ddr_para_scan
 	ldrb	w0, [x24, #:lo12:.LANCHOR20]
-	cbnz	w0, .L2563
+	cbnz	w0, .L2557
 	ldr	x0, [x22, #:lo12:.LANCHOR26]
 	strb	wzr, [x0, 19]
 	bl	flash_info_flush
-.L2563:
+.L2557:
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2565
-	adrp	x2, .LANCHOR193
+	tbz	x0, 12, .L2559
+	adrp	x2, .LANCHOR192
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR193
-	mov	w1, 2356
+	add	x2, x2, :lo12:.LANCHOR192
+	mov	w1, 2370
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2565:
+.L2559:
 	bl	nand_flash_print_info
 	mov	w19, 0
-	b	.L2530
+	b	.L2524
 	.size	nand_flash_init, .-nand_flash_init
 	.section	.text.ftl_sysblk_dump,"ax",@progbits
 	.align	2
@@ -15610,20 +15610,20 @@ ftl_sysblk_dump:
 	add	x27, x27, :lo12:.LANCHOR105
 	add	x28, x28, :lo12:.LANCHOR121
 	mov	w19, 0
-.L2598:
+.L2595:
 	ldrh	w0, [x26]
 	cmp	w0, w19
-	bhi	.L2600
+	bhi	.L2597
 	mov	x0, x25
 	bl	buf_free
-	cbz	w20, .L2601
+	cbz	w20, .L2598
 	adrp	x1, .LANCHOR196
 	adrp	x0, .LC0
-	mov	w2, 1339
+	mov	w2, 1338
 	add	x1, x1, :lo12:.LANCHOR196
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2601:
+.L2598:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
@@ -15633,7 +15633,7 @@ ftl_sysblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 144
 	ret
-.L2600:
+.L2597:
 	ldrh	w21, [x27]
 	ldrb	w3, [x28]
 	ldr	x1, [x25, 8]
@@ -15662,19 +15662,19 @@ ftl_sysblk_dump:
 	mov	w1, w23
 	ldp	w5, w6, [x0]
 	ldr	w7, [x0, 8]
-	adrp	x0, .LC148
-	add	x0, x0, :lo12:.LC148
+	adrp	x0, .LC149
+	add	x0, x0, :lo12:.LC149
 	bl	printf
 	mov	w3, 32
 	mov	w2, 4
 	add	x1, x24, 704
-	adrp	x0, .LC149
-	add	x0, x0, :lo12:.LC149
+	adrp	x0, .LC150
+	add	x0, x0, :lo12:.LC150
 	bl	rknand_print_hex
 	cmp	w22, 512
 	ccmn	w22, #1, 4, ne
 	csinc	w20, w20, wzr, ne
-	b	.L2598
+	b	.L2595
 	.size	ftl_sysblk_dump, .-ftl_sysblk_dump
 	.section	.text.dump_ftl_info,"ax",@progbits
 	.align	2
@@ -15685,41 +15685,41 @@ dump_ftl_info:
 	adrp	x0, .LANCHOR51
 	add	x29, sp, 0
 	ldrb	w1, [x0, #:lo12:.LANCHOR51]
-	adrp	x0, .LC150
+	adrp	x0, .LC151
 	stp	x19, x20, [sp, 16]
-	add	x0, x0, :lo12:.LC150
+	add	x0, x0, :lo12:.LC151
 	stp	x21, x22, [sp, 32]
 	adrp	x22, .LANCHOR97
 	adrp	x19, .LANCHOR10
 	adrp	x20, .LANCHOR80
 	bl	printf
 	adrp	x21, .LANCHOR6
-	adrp	x0, .LANCHOR178
-	add	x1, x0, :lo12:.LANCHOR178
+	adrp	x0, .LANCHOR177
+	add	x1, x0, :lo12:.LANCHOR177
 	ldrh	w3, [x1, 2]
 	ldrb	w2, [x1, 1]
-	ldrb	w1, [x0, #:lo12:.LANCHOR178]
-	adrp	x0, .LC151
-	add	x0, x0, :lo12:.LC151
+	ldrb	w1, [x0, #:lo12:.LANCHOR177]
+	adrp	x0, .LC152
+	add	x0, x0, :lo12:.LC152
 	bl	printf
 	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	ldrh	w2, [x0, 140]
 	ldrh	w1, [x0, 130]
-	adrp	x0, .LC152
-	add	x0, x0, :lo12:.LC152
-	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR10]
 	adrp	x0, .LC153
 	add	x0, x0, :lo12:.LC153
-	ldrh	w5, [x1, 26]
-	ldrh	w4, [x1, 22]
-	ldrb	w3, [x1, 21]
-	ldrh	w2, [x1, 18]
-	ldrh	w1, [x1, 16]
 	bl	printf
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
 	adrp	x0, .LC154
 	add	x0, x0, :lo12:.LC154
+	ldrh	w5, [x1, 26]
+	ldrh	w4, [x1, 22]
+	ldrb	w3, [x1, 21]
+	ldrh	w2, [x1, 18]
+	ldrh	w1, [x1, 16]
+	bl	printf
+	ldr	x1, [x19, #:lo12:.LANCHOR10]
+	adrp	x0, .LC155
+	add	x0, x0, :lo12:.LC155
 	ldrh	w5, [x1, 58]
 	ldrh	w4, [x1, 54]
 	ldrb	w3, [x1, 53]
@@ -15728,8 +15728,8 @@ dump_ftl_info:
 	bl	printf
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
 	adrp	x19, .LANCHOR73
-	adrp	x0, .LC155
-	add	x0, x0, :lo12:.LC155
+	adrp	x0, .LC156
+	add	x0, x0, :lo12:.LC156
 	ldrh	w5, [x1, 90]
 	ldrh	w4, [x1, 86]
 	ldrb	w3, [x1, 85]
@@ -15742,21 +15742,21 @@ dump_ftl_info:
 	mul	w3, w3, w0
 	adrp	x0, .LANCHOR111
 	ldr	x1, [x0, #:lo12:.LANCHOR111]
-	adrp	x0, .LC156
+	adrp	x0, .LC157
 	lsl	w3, w3, 1
-	add	x0, x0, :lo12:.LC156
+	add	x0, x0, :lo12:.LC157
 	bl	rknand_print_hex
 	adrp	x0, .LANCHOR9
 	ldrh	w3, [x21, #:lo12:.LANCHOR6]
 	mov	w2, 2
 	ldr	x1, [x0, #:lo12:.LANCHOR9]
-	adrp	x0, .LC157
-	add	x0, x0, :lo12:.LC157
+	adrp	x0, .LC158
+	add	x0, x0, :lo12:.LC158
 	bl	rknand_print_hex
 	ldr	x1, [x22, #:lo12:.LANCHOR97]
 	mov	w2, 4
-	adrp	x0, .LC149
-	add	x0, x0, :lo12:.LC149
+	adrp	x0, .LC150
+	add	x0, x0, :lo12:.LC150
 	add	x1, x1, 704
 	ldrh	w3, [x1, -6]
 	bl	rknand_print_hex
@@ -15764,15 +15764,15 @@ dump_ftl_info:
 	ldrh	w3, [x21, #:lo12:.LANCHOR6]
 	mov	w2, 4
 	ldr	x1, [x0, #:lo12:.LANCHOR7]
-	adrp	x0, .LC158
-	add	x0, x0, :lo12:.LC158
+	adrp	x0, .LC159
+	add	x0, x0, :lo12:.LC159
 	bl	rknand_print_hex
 	mov	w3, 256
 	mov	w2, 2
 	adrp	x1, .LANCHOR110
-	adrp	x0, .LC159
+	adrp	x0, .LC160
 	add	x1, x1, :lo12:.LANCHOR110
-	add	x0, x0, :lo12:.LC159
+	add	x0, x0, :lo12:.LC160
 	bl	rknand_print_hex
 	ldrb	w0, [x19, #:lo12:.LANCHOR73]
 	mov	w2, 2
@@ -15784,8 +15784,8 @@ dump_ftl_info:
 	ldp	x29, x30, [sp], 48
 	lsl	w3, w3, 1
 	ldr	x1, [x0, #:lo12:.LANCHOR112]
-	adrp	x0, .LC160
-	add	x0, x0, :lo12:.LC160
+	adrp	x0, .LC161
+	add	x0, x0, :lo12:.LC161
 	b	rknand_print_hex
 	.size	dump_ftl_info, .-dump_ftl_info
 	.section	.text.pm_ppa_update_check,"ax",@progbits
@@ -15812,20 +15812,20 @@ pm_ppa_update_check:
 	ubfx	x3, x3, 5, 3
 	cmp	w3, 1
 	ccmp	w3, 7, 4, ne
-	bne	.L2612
+	bne	.L2609
 	stp	x29, x30, [sp, -16]!
 	mov	w3, w2
 	mov	w2, w1
 	mov	x1, x0
 	add	x29, sp, 0
-	adrp	x0, .LC161
-	add	x0, x0, :lo12:.LC161
+	adrp	x0, .LC162
+	add	x0, x0, :lo12:.LC162
 	bl	printf
 	bl	dump_ftl_info
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
-.L2612:
+.L2609:
 	mov	w0, 0
 	ret
 	.size	pm_ppa_update_check, .-pm_ppa_update_check
@@ -15841,22 +15841,22 @@ load_l2p_region:
 	and	w19, w0, 65535
 	stp	x23, x24, [sp, 48]
 	cmp	w20, 31
-	bls	.L2618
+	bls	.L2615
 	adrp	x1, .LANCHOR197
 	adrp	x0, .LC0
 	mov	w2, 31
 	add	x1, x1, :lo12:.LANCHOR197
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2618:
+.L2615:
 	adrp	x22, .LANCHOR97
 	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	ldrh	w2, [x0, 698]
 	cmp	w2, w19
-	bcs	.L2619
+	bcs	.L2616
 	mov	w1, w19
-	adrp	x0, .LC162
-	add	x0, x0, :lo12:.LC162
+	adrp	x0, .LC163
+	add	x0, x0, :lo12:.LC163
 	bl	printf
 	adrp	x0, .LANCHOR198
 	mov	w1, 255
@@ -15867,16 +15867,16 @@ load_l2p_region:
 	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	ldrh	w0, [x0, 698]
 	cmp	w0, w19
-	bcs	.L2621
+	bcs	.L2618
 	mov	w2, 35
-.L2626:
+.L2623:
 	adrp	x1, .LANCHOR197
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR197
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L2621
-.L2619:
+	b	.L2618
+.L2616:
 	add	x0, x0, x19, sxtw 2
 	sbfiz	x20, x20, 4, 32
 	ldr	w21, [x0, 704]
@@ -15885,69 +15885,69 @@ load_l2p_region:
 	add	x23, x0, x20
 	strh	w19, [x0, x20]
 	strh	wzr, [x23, 2]
-	cbnz	w21, .L2622
+	cbnz	w21, .L2619
 	mov	w2, 0
 	mov	w1, w19
-	adrp	x0, .LC163
-	add	x0, x0, :lo12:.LC163
+	adrp	x0, .LC164
+	add	x0, x0, :lo12:.LC164
 	bl	printf
 	adrp	x0, .LANCHOR198
 	mov	w1, 255
 	ldrh	w2, [x0, #:lo12:.LANCHOR198]
 	ldr	x0, [x23, 8]
 	bl	ftl_memset
-.L2621:
+.L2618:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2622:
-	adrp	x20, .LANCHOR190
+.L2619:
+	adrp	x20, .LANCHOR189
 	adrp	x24, .LANCHOR121
 	ldr	x1, [x23, 8]
 	mov	w0, w21
-	ldr	x2, [x20, #:lo12:.LANCHOR190]
+	ldr	x2, [x20, #:lo12:.LANCHOR189]
 	ldrb	w3, [x24, #:lo12:.LANCHOR121]
 	bl	ftl_read_ppa_page
-	ldr	x1, [x20, #:lo12:.LANCHOR190]
+	ldr	x1, [x20, #:lo12:.LANCHOR189]
 	ldr	w2, [x1]
 	cmp	w2, w19
-	beq	.L2623
+	beq	.L2620
 	mov	w4, w21
 	mov	w3, w0
 	mov	w1, w19
-	adrp	x0, .LC164
-	add	x0, x0, :lo12:.LC164
+	adrp	x0, .LC165
+	add	x0, x0, :lo12:.LC165
 	bl	printf
 	ldr	x1, [x22, #:lo12:.LANCHOR97]
 	mov	w2, 4
-	adrp	x0, .LC165
-	add	x0, x0, :lo12:.LC165
+	adrp	x0, .LC166
+	add	x0, x0, :lo12:.LC166
 	add	x1, x1, 704
 	ldrh	w3, [x1, -6]
 	bl	rknand_print_hex
 	ldr	x1, [x23, 8]
 	mov	w2, 4
 	ldrb	w3, [x24, #:lo12:.LANCHOR121]
-	adrp	x0, .LC166
-	add	x0, x0, :lo12:.LC166
+	adrp	x0, .LC167
+	add	x0, x0, :lo12:.LC167
 	lsl	w3, w3, 7
 	bl	rknand_print_hex
-	ldr	x1, [x20, #:lo12:.LANCHOR190]
-	adrp	x0, .LC167
+	ldr	x1, [x20, #:lo12:.LANCHOR189]
+	adrp	x0, .LC168
 	mov	w3, 16
 	mov	w2, 4
-	add	x0, x0, :lo12:.LC167
+	add	x0, x0, :lo12:.LC168
 	bl	rknand_print_hex
-.L2623:
-	ldr	x0, [x20, #:lo12:.LANCHOR190]
+.L2620:
+	ldr	x0, [x20, #:lo12:.LANCHOR189]
 	ldr	w0, [x0]
 	cmp	w19, w0
-	beq	.L2621
+	beq	.L2618
 	mov	w2, 59
-	b	.L2626
+	b	.L2623
 	.size	load_l2p_region, .-load_l2p_region
 	.section	.text.pm_gc,"ax",@progbits
 	.align	2
@@ -15967,19 +15967,19 @@ pm_gc:
 	str	x25, [sp, 64]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L2629
+	blt	.L2626
 	bl	pm_free_sblk
 	ldr	x2, [x20, #:lo12:.LANCHOR97]
 	ldrh	w1, [x19, #:lo12:.LANCHOR141]
 	sub	w1, w1, #1
 	ldrh	w3, [x2, 688]
 	cmp	w3, w1
-	blt	.L2629
+	blt	.L2626
 	add	x0, x2, x0, uxth 1
 	ldrh	w21, [x0, 416]
 	mov	w0, 65535
 	cmp	w21, w0
-	bne	.L2631
+	bne	.L2628
 	adrp	x1, .LANCHOR199
 	add	x1, x1, :lo12:.LANCHOR199
 	mov	w2, 131
@@ -15990,7 +15990,7 @@ pm_gc:
 	ldr	x1, [x20, #:lo12:.LANCHOR97]
 	add	x0, x1, x0, uxth 1
 	ldrh	w21, [x0, 416]
-.L2631:
+.L2628:
 	bl	pm_select_ram_region
 	and	x24, x0, 65535
 	adrp	x1, .LANCHOR130
@@ -16002,28 +16002,28 @@ pm_gc:
 	ldrh	w0, [x2, x0]
 	mov	w2, 65535
 	cmp	w0, w2
-	beq	.L2632
+	beq	.L2629
 	ldr	x1, [x19, 8]
-	cbz	x1, .L2632
+	cbz	x1, .L2629
 	ldrsh	w2, [x19, 2]
-	tbz	w2, #31, .L2632
+	tbz	w2, #31, .L2629
 	bl	pm_write_page
 	ldrh	w0, [x19, 2]
 	and	w0, w0, 32767
 	strh	w0, [x19, 2]
-.L2632:
+.L2629:
 	add	x1, x23, :lo12:.LANCHOR130
 	adrp	x25, .LANCHOR99
 	add	x24, x1, x24, lsl 4
 	add	x25, x25, :lo12:.LANCHOR99
 	mov	w19, 0
-.L2633:
+.L2630:
 	ldr	x1, [x20, #:lo12:.LANCHOR97]
 	ldrh	w0, [x1, 698]
 	cmp	w0, w19
-	bhi	.L2635
+	bhi	.L2632
 	bl	pm_free_sblk
-.L2629:
+.L2626:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -16031,7 +16031,7 @@ pm_gc:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2635:
+.L2632:
 	add	x1, x1, x19, sxtw 2
 	ldrh	w3, [x25]
 	mov	w0, 21
@@ -16046,7 +16046,7 @@ pm_gc:
 	ldrb	w1, [x1, #:lo12:.LANCHOR98]
 	udiv	w0, w0, w1
 	cmp	w21, w0, uxth
-	bne	.L2634
+	bne	.L2631
 	mov	w1, w22
 	mov	w0, w19
 	bl	load_l2p_region
@@ -16055,10 +16055,10 @@ pm_gc:
 	bl	pm_write_page
 	mov	w0, -1
 	strh	w0, [x24]
-.L2634:
+.L2631:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L2633
+	b	.L2630
 	.size	pm_gc, .-pm_gc
 	.section	.text.pm_flush_id,"ax",@progbits
 	.align	2
@@ -16080,10 +16080,10 @@ pm_flush_id:
 	strh	w0, [x19, 2]
 	adrp	x19, .LANCHOR128
 	ldr	w0, [x19, #:lo12:.LANCHOR128]
-	cbz	w0, .L2641
+	cbz	w0, .L2638
 	bl	pm_gc
 	str	wzr, [x19, #:lo12:.LANCHOR128]
-.L2641:
+.L2638:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -16101,17 +16101,17 @@ pm_flush:
 	add	x19, x19, :lo12:.LANCHOR130
 	mov	w20, 0
 	add	x19, x19, 2
-.L2648:
+.L2645:
 	ldrsh	w0, [x19]
-	tbz	w0, #31, .L2647
+	tbz	w0, #31, .L2644
 	mov	w0, w20
 	bl	pm_flush_id
-.L2647:
+.L2644:
 	add	w20, w20, 1
 	add	x19, x19, 16
 	and	w20, w20, 65535
 	cmp	w20, 32
-	bne	.L2648
+	bne	.L2645
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -16165,35 +16165,35 @@ pm_init:
 	stp	x21, x22, [sp, 32]
 	adrp	x20, .LANCHOR130
 	str	wzr, [x0, #:lo12:.LANCHOR128]
-	adrp	x0, .LANCHOR191
+	adrp	x0, .LANCHOR190
 	stp	x25, x26, [sp, 64]
 	add	x19, x20, :lo12:.LANCHOR130
-	strb	w1, [x0, #:lo12:.LANCHOR191]
+	strb	w1, [x0, #:lo12:.LANCHOR190]
 	mov	w0, 64
 	stp	x27, x28, [sp, 80]
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR190
+	adrp	x1, .LANCHOR189
 	adrp	x22, .LANCHOR121
 	add	x23, x19, 512
 	mov	x21, x1
 	add	x22, x22, :lo12:.LANCHOR121
-	str	x0, [x1, #:lo12:.LANCHOR190]
+	str	x0, [x1, #:lo12:.LANCHOR189]
 	mov	w25, -1
-.L2658:
+.L2655:
 	strh	w25, [x19]
 	strh	wzr, [x19, 2]
-	cbz	w24, .L2657
+	cbz	w24, .L2654
 	ldrb	w0, [x22]
 	lsl	w0, w0, 9
 	bl	ftl_malloc
 	str	x0, [x19, 8]
-.L2657:
+.L2654:
 	add	x19, x19, 16
 	cmp	x19, x23
-	bne	.L2658
+	bne	.L2655
 	add	x0, x20, :lo12:.LANCHOR130
 	adrp	x19, .LANCHOR97
-	ldr	x24, [x21, #:lo12:.LANCHOR190]
+	ldr	x24, [x21, #:lo12:.LANCHOR189]
 	mov	w4, 4
 	ldr	x25, [x0, 8]
 	mov	x3, x24
@@ -16207,11 +16207,11 @@ pm_init:
 	mov	w23, w26
 	ldrh	w2, [x0, 696]
 	cmp	w2, w26
-	bgt	.L2659
+	bgt	.L2656
 	ldrh	w1, [x0, 692]
 	mov	w3, w26
-	adrp	x0, .LC168
-	add	x0, x0, :lo12:.LC168
+	adrp	x0, .LC169
+	add	x0, x0, :lo12:.LC169
 	adrp	x27, .LANCHOR105
 	adrp	x28, .LANCHOR121
 	add	x27, x27, :lo12:.LANCHOR105
@@ -16219,14 +16219,14 @@ pm_init:
 	bl	printf
 	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	ldrsh	w21, [x0, 696]
-.L2660:
+.L2657:
 	cmp	w21, w26
-	ble	.L2662
-	adrp	x0, .LANCHOR181
+	ble	.L2659
+	adrp	x0, .LANCHOR180
 	mov	w1, 1
 	add	x20, x20, :lo12:.LANCHOR130
 	add	w23, w23, 1
-	strb	w1, [x0, #:lo12:.LANCHOR181]
+	strb	w1, [x0, #:lo12:.LANCHOR180]
 	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	strh	w23, [x0, 696]
 	bl	pm_free_sblk
@@ -16236,7 +16236,7 @@ pm_init:
 	ldr	x1, [x20, 8]
 	mov	w0, -1
 	bl	pm_write_page
-.L2659:
+.L2656:
 	bl	pm_free_sblk
 	bl	pm_gc
 	mov	w0, 0
@@ -16247,7 +16247,7 @@ pm_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2662:
+.L2659:
 	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	x3, x24
 	ldrh	w1, [x27]
@@ -16266,25 +16266,25 @@ pm_init:
 	ldrh	w3, [x0, 694]
 	add	w1, w1, 1
 	str	w1, [x0, 48]
-	adrp	x0, .LC169
-	add	x0, x0, :lo12:.LC169
+	adrp	x0, .LC170
+	add	x0, x0, :lo12:.LC170
 	ldr	w1, [x24]
 	bl	printf
 	ldr	w4, [x29, 108]
 	cmp	w4, 512
 	ccmn	w4, #1, 4, ne
-	beq	.L2661
+	beq	.L2658
 	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	ldr	w0, [x24]
 	ldrh	w2, [x1, 698]
 	cmp	w0, w2
-	bcs	.L2661
+	bcs	.L2658
 	add	x0, x1, x0, uxtw 2
 	str	w22, [x0, 704]
-.L2661:
+.L2658:
 	add	w21, w21, 1
 	sxth	w21, w21
-	b	.L2660
+	b	.L2657
 	.size	pm_init, .-pm_init
 	.section	.text.pm_log2phys,"ax",@progbits
 	.align	2
@@ -16309,51 +16309,51 @@ pm_log2phys:
 	cmp	w0, w2
 	and	w25, w21, 65535
 	msub	w20, w25, w20, w0
-	bcc	.L2672
+	bcc	.L2669
 	mov	w1, w0
-	adrp	x0, .LC170
-	add	x0, x0, :lo12:.LC170
+	adrp	x0, .LC171
+	add	x0, x0, :lo12:.LC171
 	bl	printf
 	mov	w0, -1
-.L2671:
+.L2668:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2672:
+.L2669:
 	adrp	x24, .LANCHOR130
 	add	x0, x24, :lo12:.LANCHOR130
 	and	x20, x20, 65535
 	add	x0, x0, 8
 	mov	x19, 0
-.L2678:
+.L2675:
 	ldr	x1, [x0]
-	cbz	x1, .L2674
+	cbz	x1, .L2671
 	ldrh	w1, [x0, -8]
 	cmp	w1, w25
-	bne	.L2674
-.L2675:
-	cbnz	w23, .L2676
+	bne	.L2671
+.L2672:
+	cbnz	w23, .L2673
 	add	x0, x24, :lo12:.LANCHOR130
 	add	x0, x0, x19, lsl 4
 	ldr	x0, [x0, 8]
 	ldr	w0, [x0, x20, lsl 2]
 	str	w0, [x22]
-.L2677:
+.L2674:
 	add	x24, x24, :lo12:.LANCHOR130
 	add	x19, x24, x19, lsl 4
 	ldrh	w0, [x19, 2]
 	mvn	x1, x0
 	tst	x1, 32767
-	beq	.L2680
+	beq	.L2677
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L2680:
+.L2677:
 	mov	w0, 0
-	b	.L2671
-.L2676:
+	b	.L2668
+.L2673:
 	add	x0, x24, :lo12:.LANCHOR130
 	ldr	w2, [x22]
 	add	x0, x0, x19, lsl 4
@@ -16364,13 +16364,13 @@ pm_log2phys:
 	strh	w1, [x0, 2]
 	adrp	x0, .LANCHOR131
 	strb	w21, [x0, #:lo12:.LANCHOR131]
-	b	.L2677
-.L2674:
+	b	.L2674
+.L2671:
 	add	w19, w19, 1
 	add	x0, x0, 16
 	and	x19, x19, 65535
 	cmp	w19, 32
-	bne	.L2678
+	bne	.L2675
 	bl	pm_select_ram_region
 	and	x19, x0, 65535
 	sbfiz	x1, x19, 4, 32
@@ -16380,17 +16380,17 @@ pm_log2phys:
 	ldrh	w2, [x2, x1]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L2679
+	beq	.L2676
 	ldrsh	w1, [x3, 2]
-	tbz	w1, #31, .L2679
+	tbz	w1, #31, .L2676
 	bl	pm_flush_id
-.L2679:
+.L2676:
 	adrp	x0, .LANCHOR200
 	mov	w1, w26
 	strb	w19, [x0, #:lo12:.LANCHOR200]
 	mov	w0, w25
 	bl	load_l2p_region
-	b	.L2675
+	b	.L2672
 	.size	pm_log2phys, .-pm_log2phys
 	.section	.text.gc_recovery,"ax",@progbits
 	.align	2
@@ -16418,12 +16418,12 @@ gc_recovery:
 	mov	w0, 65535
 	cmp	w1, w0
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
-	beq	.L2687
+	beq	.L2684
 	mov	w1, -1
 	strh	w1, [x0, 130]
 	mov	w0, 1
 	bl	buf_alloc
-	mov	x25, x0
+	mov	x26, x0
 	ldrb	w0, [x20, 89]
 	add	x1, x20, 80
 	adrp	x3, .LANCHOR105
@@ -16438,33 +16438,33 @@ gc_recovery:
 	ldrb	w0, [x2, #:lo12:.LANCHOR68]
 	str	w1, [x29, 200]
 	cmp	w0, 3
-	bne	.L2688
+	bne	.L2685
 	adrp	x0, .LANCHOR80
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	sub	w0, w0, #1
 	add	w0, w0, w1
 	orr	w0, w0, 50331648
-.L2732:
-	str	w0, [x25, 40]
-.L2689:
+.L2729:
+	str	w0, [x26, 40]
+.L2686:
 	mov	w1, 1
-	mov	x0, x25
+	mov	x0, x26
 	bl	sblk_read_page
-	ldr	w0, [x25, 52]
+	ldr	w0, [x26, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2690
-	ldr	x0, [x25, 24]
+	beq	.L2687
+	ldr	x0, [x26, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L2691
-.L2690:
-	mov	x0, x25
+	beq	.L2688
+.L2687:
+	mov	x0, x26
 	bl	buf_free
-	ldr	x1, [x25, 24]
-	ldr	x0, [x25, 8]
+	ldr	x1, [x26, 24]
+	ldr	x0, [x26, 8]
 	ldr	w2, [x1, 12]
 	str	w2, [sp, 16]
 	ldr	w2, [x1, 8]
@@ -16473,26 +16473,26 @@ gc_recovery:
 	str	w2, [sp]
 	ldp	w3, w4, [x0]
 	ldp	w5, w6, [x0, 8]
-	adrp	x0, .LC171
+	adrp	x0, .LC172
 	ldr	w7, [x1]
-	add	x0, x0, :lo12:.LC171
-	ldr	w1, [x25, 40]
-	ldr	w2, [x25, 52]
+	add	x0, x0, :lo12:.LC172
+	ldr	w1, [x26, 40]
+	ldr	w2, [x26, 52]
 	bl	printf
-.L2736:
+.L2733:
 	adrp	x0, .LANCHOR9
 	ldrh	w1, [x20, 80]
-	mov	w28, 0
+	mov	w22, 0
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x1, lsl 1]
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	ldrh	w1, [x20, 80]
 	strh	w1, [x0, 130]
-.L2692:
+.L2689:
 	ldrh	w1, [x20, 80]
-	mov	w2, w28
-	adrp	x0, .LC173
-	add	x0, x0, :lo12:.LC173
+	mov	w2, w22
+	adrp	x0, .LC174
+	add	x0, x0, :lo12:.LC174
 	bl	printf
 	mov	w0, -1
 	strh	w0, [x20, 80]
@@ -16502,9 +16502,9 @@ gc_recovery:
 	mov	w1, 65535
 	ldrh	w0, [x0, 130]
 	cmp	w0, w1
-	beq	.L2719
+	beq	.L2716
 	bl	ftl_free_sblk
-.L2719:
+.L2716:
 	adrp	x0, .LANCHOR97
 	ldr	x1, [x0, #:lo12:.LANCHOR97]
 	mov	w0, -1
@@ -16513,7 +16513,7 @@ gc_recovery:
 	strh	w0, [x1, 130]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2686:
+.L2683:
 	ldp	x19, x20, [sp, 48]
 	ldp	x21, x22, [sp, 64]
 	ldp	x23, x24, [sp, 80]
@@ -16522,64 +16522,64 @@ gc_recovery:
 	ldp	x29, x30, [sp, 32]
 	add	sp, sp, 240
 	ret
-.L2688:
+.L2685:
 	cmp	w0, 2
-	bne	.L2689
+	bne	.L2686
 	adrp	x0, .LANCHOR80
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	add	w0, w1, w0, lsl 1
 	sub	w0, w0, #1
 	orr	w0, w0, 33554432
-	b	.L2732
-.L2691:
-	adrp	x19, .LANCHOR72
+	b	.L2729
+.L2688:
+	adrp	x28, .LANCHOR72
 	adrp	x22, .LANCHOR73
-	adrp	x23, .LANCHOR147
-	ldr	x1, [x25, 8]
+	adrp	x27, .LANCHOR147
+	ldr	x1, [x26, 8]
 	ldrb	w0, [x22, #:lo12:.LANCHOR73]
 	adrp	x24, .LANCHOR148
-	ldrh	w2, [x19, #:lo12:.LANCHOR72]
+	ldrh	w2, [x28, #:lo12:.LANCHOR72]
 	mul	w2, w2, w0
-	ldr	x0, [x23, #:lo12:.LANCHOR147]
+	ldr	x0, [x27, #:lo12:.LANCHOR147]
 	lsl	w2, w2, 2
 	bl	ftl_memcpy
 	ldrb	w1, [x22, #:lo12:.LANCHOR73]
-	ldrh	w0, [x19, #:lo12:.LANCHOR72]
+	ldrh	w0, [x28, #:lo12:.LANCHOR72]
 	mul	w0, w0, w1
-	ldr	x1, [x25, 8]
+	ldr	x1, [x26, 8]
 	lsl	w2, w0, 2
 	add	x1, x1, x0, sxtw 2
 	ldr	x0, [x24, #:lo12:.LANCHOR148]
 	bl	ftl_memcpy
-	str	x19, [x29, 144]
+	str	x28, [x29, 144]
 	adrp	x0, .LANCHOR80
 	ldrh	w14, [x0, #:lo12:.LANCHOR80]
 	ldr	x0, [x29, 168]
 	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w0, 2
-	beq	.L2693
-.L2733:
+	beq	.L2690
+.L2730:
 	str	w0, [x29, 184]
-	adrp	x26, .LC172
+	adrp	x25, .LC173
 	ldr	x0, [x29, 152]
+	mov	w23, 0
 	mov	w22, 0
-	mov	w28, 0
 	add	x0, x0, :lo12:.LANCHOR105
 	str	x0, [x29, 128]
-	add	x0, x26, :lo12:.LC172
+	add	x0, x25, :lo12:.LC173
 	str	x0, [x29, 120]
-.L2695:
-	sub	w0, w22, #1
+.L2692:
+	sub	w0, w23, #1
 	str	w0, [x29, 188]
-	cmp	w22, w14
-	beq	.L2704
-	mov	x27, 0
-	b	.L2705
-.L2693:
+	cmp	w23, w14
+	beq	.L2701
+	mov	x19, 0
+	b	.L2702
+.L2690:
 	lsl	w14, w14, 1
 	mov	w0, 1
-	b	.L2733
-.L2701:
+	b	.L2730
+.L2698:
 	ldr	x1, [x29, 128]
 	ldr	x0, [x29, 160]
 	ldrh	w1, [x1]
@@ -16589,92 +16589,92 @@ gc_recovery:
 	str	w0, [x29, 200]
 	ldrb	w1, [x1]
 	cmp	w1, 3
-	bne	.L2696
-	add	w0, w22, w0
-	orr	w0, w0, w26, lsl 24
-.L2734:
-	str	w0, [x25, 40]
+	bne	.L2693
+	add	w0, w23, w0
+	orr	w0, w0, w25, lsl 24
+.L2731:
+	str	w0, [x26, 40]
 	mov	w1, 1
 	str	w14, [x29, 112]
-	mov	x0, x25
+	mov	x0, x26
 	bl	sblk_read_page
-	ldr	x0, [x23, #:lo12:.LANCHOR147]
+	ldr	x0, [x27, #:lo12:.LANCHOR147]
 	ldr	w14, [x29, 112]
-	ldr	w3, [x0, x19]
-	ldr	x0, [x25, 24]
+	ldr	w3, [x0, x28]
+	ldr	x0, [x26, 24]
 	ldr	w6, [x0, 4]
 	cmp	w3, w6
-	bne	.L2699
+	bne	.L2696
 	ldr	x1, [x24, #:lo12:.LANCHOR148]
-	ldr	w2, [x1, x19]
+	ldr	w2, [x1, x28]
 	ldr	w1, [x0, 8]
 	cmp	w2, w1
-	beq	.L2700
-.L2699:
+	beq	.L2697
+.L2696:
 	ldr	x1, [x24, #:lo12:.LANCHOR148]
 	ldr	w2, [x0, 12]
 	str	w2, [sp]
 	str	w14, [x29, 112]
-	ldr	w4, [x1, x19]
+	ldr	w4, [x1, x28]
 	ldr	w5, [x0]
 	ldr	w7, [x0, 8]
-	ldr	w1, [x25, 40]
-	ldr	w2, [x25, 52]
+	ldr	w1, [x26, 40]
+	ldr	w2, [x26, 52]
 	ldr	x0, [x29, 120]
 	bl	printf
-	ldr	x0, [x23, #:lo12:.LANCHOR147]
+	ldr	x0, [x27, #:lo12:.LANCHOR147]
 	ldr	w14, [x29, 112]
-	ldr	w0, [x0, x19]
+	ldr	w0, [x0, x28]
 	cmn	w0, #1
-	beq	.L2700
-	mov	x0, x25
+	beq	.L2697
+	mov	x0, x26
 	bl	buf_free
-	b	.L2736
-.L2696:
+	b	.L2733
+.L2693:
 	cmp	w1, 2
-	bne	.L2698
+	bne	.L2695
 	ldr	w1, [x29, 188]
 	add	w0, w0, w1
-	add	w0, w0, w26
+	add	w0, w0, w25
 	orr	w0, w0, 33554432
-	b	.L2734
-.L2698:
-	add	w0, w22, w0
-	b	.L2734
+	b	.L2731
+.L2695:
+	add	w0, w23, w0
+	b	.L2731
+.L2697:
+	add	w22, w22, 1
+	add	w25, w25, 1
+	add	x28, x28, 4
 .L2700:
-	add	w28, w28, 1
-	add	w26, w26, 1
-	add	x19, x19, 4
-.L2703:
 	ldr	w0, [x29, 184]
-	cmp	w0, w26
-	bcs	.L2701
-	add	x27, x27, 1
-.L2705:
+	cmp	w0, w25
+	bcs	.L2698
+	add	x19, x19, 1
+.L2702:
 	ldr	x0, [x29, 176]
 	ldrb	w0, [x0, 9]
-	cmp	w0, w27
-	ble	.L2702
-	add	x0, x20, x27, lsl 1
+	cmp	w0, w19
+	ble	.L2699
+	add	x0, x20, x19, lsl 1
 	str	x0, [x29, 160]
 	ldr	x0, [x29, 168]
-	sbfiz	x19, x28, 2, 32
-	mov	w26, 1
+	sbfiz	x28, x22, 2, 32
+	mov	w25, 1
 	add	x0, x0, :lo12:.LANCHOR68
 	str	x0, [x29, 136]
-	b	.L2703
-.L2702:
-	add	w22, w22, 1
-	b	.L2695
-.L2704:
-	mov	x0, x25
+	b	.L2700
+.L2699:
+	add	w23, w23, 1
+	b	.L2692
+.L2701:
+	mov	x0, x26
 	bl	buf_free
 	ldr	x3, [x29, 144]
 	adrp	x25, .LANCHOR9
 	ldr	x0, [x29, 176]
-	mov	w28, 0
+	mov	w22, 0
 	ldrh	w2, [x20, 80]
-	mov	w27, 0
+	mov	w28, 0
 	ldr	x1, [x25, #:lo12:.LANCHOR9]
 	ldrh	w3, [x3, #:lo12:.LANCHOR72]
 	ldrb	w0, [x0, 9]
@@ -16685,37 +16685,37 @@ gc_recovery:
 	adrp	x0, .LANCHOR99
 	add	x0, x0, :lo12:.LANCHOR99
 	str	x0, [x29, 112]
-.L2706:
-	sub	w0, w27, #1
+.L2703:
+	sub	w0, w28, #1
 	str	w0, [x29, 136]
-	cmp	w22, w27
-	beq	.L2717
+	cmp	w23, w28
+	beq	.L2714
 	mov	x26, 0
-	b	.L2718
-.L2714:
+	b	.L2715
+.L2711:
 	ldr	w0, [x29, 188]
-	ldr	x1, [x23, #:lo12:.LANCHOR147]
+	ldr	x1, [x27, #:lo12:.LANCHOR147]
 	sbfiz	x0, x0, 2, 32
-	ldr	w6, [x1, x0]
-	cmn	w6, #1
-	beq	.L2707
+	ldr	w5, [x1, x0]
+	cmn	w5, #1
+	beq	.L2704
 	ldr	x1, [x24, #:lo12:.LANCHOR148]
-	str	w6, [x29, 108]
+	str	w5, [x29, 108]
 	ldr	w0, [x1, x0]
 	str	w0, [x29, 160]
-	mov	w0, w6
+	mov	w0, w5
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 204]
 	cmn	w0, #1
-	ldr	w6, [x29, 108]
-	bne	.L2708
-	mov	w0, w6
-	str	w6, [x29, 108]
+	ldr	w5, [x29, 108]
+	bne	.L2705
+	mov	w0, w5
+	str	w5, [x29, 108]
 	mov	w2, 0
 	add	x1, x29, 204
 	bl	pm_log2phys
-	ldr	w6, [x29, 108]
-.L2708:
+	ldr	w5, [x29, 108]
+.L2705:
 	ldr	x0, [x29, 128]
 	ldr	x1, [x29, 152]
 	ldrh	w0, [x0, 96]
@@ -16724,10 +16724,10 @@ gc_recovery:
 	ldr	x1, [x29, 168]
 	ldrb	w1, [x1, #:lo12:.LANCHOR68]
 	cmp	w1, 3
-	bne	.L2709
-	add	w0, w27, w0
+	bne	.L2706
+	add	w0, w28, w0
 	orr	w0, w0, w25, lsl 24
-.L2735:
+.L2732:
 	str	w0, [x29, 200]
 	mov	w19, 21
 	ldr	x0, [x29, 112]
@@ -16745,14 +16745,14 @@ gc_recovery:
 	ldr	w0, [x29, 204]
 	cmp	w1, w0
 	and	x19, x19, 65535
-	bne	.L2712
+	bne	.L2709
 	add	x1, x29, 200
-	mov	w0, w6
+	mov	w0, w5
 	bl	pm_log2phys
-	add	w28, w28, 1
+	add	w22, w22, 1
 	mov	w0, w19
 	bl	ftl_vpn_decrement
-.L2713:
+.L2710:
 	ldr	w0, [x29, 188]
 	add	w0, w0, 1
 	str	w0, [x29, 188]
@@ -16761,66 +16761,68 @@ gc_recovery:
 	add	x0, x0, x19, lsl 2
 	ldrb	w0, [x0, 2]
 	tst	w0, 224
-	bne	.L2707
+	bne	.L2704
 	ldr	x0, [x29, 144]
 	lsl	x19, x19, 1
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x0, x19]
-	cbz	w1, .L2707
+	cbz	w1, .L2704
 	strh	wzr, [x0, x19]
-.L2707:
+.L2704:
 	add	w25, w25, 1
-.L2716:
+.L2713:
 	ldr	w0, [x29, 184]
 	cmp	w0, w25
-	bcs	.L2714
+	bcs	.L2711
 	add	x26, x26, 1
-.L2718:
+.L2715:
 	ldr	x0, [x29, 176]
 	ldrb	w0, [x0, 9]
 	cmp	w0, w26
-	ble	.L2715
+	ble	.L2712
 	add	x0, x20, x26, lsl 1
 	mov	w25, 1
 	str	x0, [x29, 128]
 	adrp	x0, .LANCHOR98
 	add	x0, x0, :lo12:.LANCHOR98
 	str	x0, [x29, 120]
-	b	.L2716
-.L2709:
+	b	.L2713
+.L2706:
 	cmp	w1, 2
-	bne	.L2711
+	bne	.L2708
 	ldr	w1, [x29, 136]
 	add	w0, w0, w1
 	add	w0, w0, w25
 	orr	w0, w0, 33554432
-	b	.L2735
-.L2711:
-	add	w0, w27, w0
-	b	.L2735
-.L2712:
+	b	.L2732
+.L2708:
+	add	w0, w28, w0
+	b	.L2732
+.L2709:
 	ldr	w1, [x29, 200]
 	cmp	w0, w1
-	cinc	w28, w28, eq
-	b	.L2713
-.L2715:
-	add	w27, w27, 1
-	b	.L2706
-.L2717:
+	cinc	w22, w22, eq
+	b	.L2710
+.L2712:
+	add	w28, w28, 1
+	b	.L2703
+.L2714:
 	ldr	x0, [x29, 144]
 	ldrh	w1, [x20, 80]
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
-	strh	w28, [x0, x1, lsl 1]
-	b	.L2692
-.L2687:
+	strh	w22, [x0, x1, lsl 1]
+	ldrh	w0, [x20, 80]
+	bl	zftl_insert_data_list
+	b	.L2689
+.L2684:
 	ldrh	w0, [x0, 130]
 	cmp	w0, w1
-	beq	.L2686
+	beq	.L2683
 	adrp	x19, .LANCHOR97
 	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	ldrh	w1, [x1, 126]
 	cmp	w1, w0
-	bne	.L2721
+	bne	.L2718
 	bl	pm_flush
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	ldrh	w0, [x0, 130]
@@ -16830,11 +16832,11 @@ gc_recovery:
 	strh	w1, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2721:
+.L2718:
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	mov	w1, -1
 	strh	w1, [x0, 130]
-	b	.L2686
+	b	.L2683
 	.size	gc_recovery, .-gc_recovery
 	.section	.text.zftl_init,"ax",@progbits
 	.align	2
@@ -16858,19 +16860,19 @@ zftl_init:
 	stp	x23, x24, [sp, 48]
 	adrp	x20, .LANCHOR198
 	strb	wzr, [x1, #:lo12:.LANCHOR125]
-	adrp	x1, .LANCHOR173
+	adrp	x1, .LANCHOR172
 	stp	x25, x26, [sp, 64]
 	adrp	x23, .LANCHOR6
-	strb	w0, [x1, #:lo12:.LANCHOR173]
+	strb	w0, [x1, #:lo12:.LANCHOR172]
 	adrp	x0, .LANCHOR119
 	mov	w1, -1
 	stp	x27, x28, [sp, 80]
 	strb	wzr, [x0, #:lo12:.LANCHOR119]
 	adrp	x0, .LANCHOR201
 	str	w1, [x0, #:lo12:.LANCHOR201]
-	adrp	x1, .LC174
+	adrp	x1, .LC175
 	adrp	x0, .LC91
-	add	x1, x1, :lo12:.LC174
+	add	x1, x1, :lo12:.LC175
 	add	x0, x0, :lo12:.LC91
 	bl	printf
 	adrp	x1, .LANCHOR34
@@ -16906,9 +16908,9 @@ zftl_init:
 	and	w6, w6, 255
 	mov	w1, 0
 	strb	w6, [x21, #:lo12:.LANCHOR73]
-.L2738:
+.L2735:
 	cmp	w4, w3
-	bcs	.L2739
+	bcs	.L2736
 	mul	w2, w0, w2
 	adrp	x3, .LANCHOR99
 	sub	w1, w1, #1
@@ -16917,9 +16919,9 @@ zftl_init:
 	mov	w1, 1
 	mul	w3, w2, w7
 	lsr	w11, w3, 21
-.L2740:
+.L2737:
 	cmp	w11, w1
-	bcs	.L2741
+	bcs	.L2738
 	mov	w1, 57344
 	sub	w4, w4, #1
 	movk	w1, 0x1c, lsl 16
@@ -16927,7 +16929,7 @@ zftl_init:
 	adrp	x28, .LANCHOR118
 	sub	w11, w10, #1
 	mul	w1, w6, w1
-	adrp	x24, .LANCHOR186
+	adrp	x24, .LANCHOR185
 	mul	w8, w8, w6
 	adrp	x27, .LANCHOR203
 	mul	w2, w2, w6
@@ -16948,7 +16950,7 @@ zftl_init:
 	add	w0, w11, w0, lsl 2
 	add	w3, w3, 8
 	udiv	w0, w0, w10
-	strh	w0, [x24, #:lo12:.LANCHOR186]
+	strh	w0, [x24, #:lo12:.LANCHOR185]
 	ubfiz	w0, w0, 4, 16
 	sdiv	w0, w0, w8
 	adrp	x8, .LANCHOR88
@@ -16961,10 +16963,10 @@ zftl_init:
 	lsr	w0, w7, 4
 	strh	w0, [x25, #:lo12:.LANCHOR84]
 	cmp	w0, 79
-	bhi	.L2742
+	bhi	.L2739
 	mov	w0, 80
 	strh	w0, [x25, #:lo12:.LANCHOR84]
-.L2742:
+.L2739:
 	adrp	x7, .LANCHOR102
 	mov	w0, 2000
 	adrp	x3, .LANCHOR100
@@ -16981,11 +16983,11 @@ zftl_init:
 	mov	w8, 32
 	cmp	w5, 2
 	strh	w8, [x0, #:lo12:.LANCHOR8]
-	beq	.L2743
+	beq	.L2740
 	adrp	x5, .LANCHOR70
 	ldrb	w5, [x5, #:lo12:.LANCHOR70]
-	cbz	w5, .L2744
-.L2743:
+	cbz	w5, .L2741
+.L2740:
 	mov	w5, 150
 	strh	w5, [x3, #:lo12:.LANCHOR100]
 	mov	w3, 64
@@ -16994,80 +16996,80 @@ zftl_init:
 	strh	w2, [x0, #:lo12:.LANCHOR8]
 	adrp	x2, .LANCHOR0
 	ldrb	w2, [x2, #:lo12:.LANCHOR0]
-	cbnz	w2, .L2744
+	cbnz	w2, .L2741
 	mov	w2, 4
 	strh	w2, [x0, #:lo12:.LANCHOR8]
 	mov	w0, 600
 	strh	w0, [x7, #:lo12:.LANCHOR102]
 	mov	w0, 128
 	strh	w0, [x6, #:lo12:.LANCHOR140]
-.L2744:
+.L2741:
 	adrp	x19, .LANCHOR14
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2746
+	tbz	x0, 12, .L2743
 	str	x4, [x29, 96]
-	adrp	x0, .LC175
-	add	x0, x0, :lo12:.LC175
-	bl	printf
-	ldr	x4, [x29, 96]
-.L2746:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2747
-	ldr	w1, [x4, #:lo12:.LANCHOR202]
 	adrp	x0, .LC176
 	add	x0, x0, :lo12:.LC176
 	bl	printf
-.L2747:
+	ldr	x4, [x29, 96]
+.L2743:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2748
-	ldr	w1, [x28, #:lo12:.LANCHOR118]
+	tbz	x0, 12, .L2744
+	ldr	w1, [x4, #:lo12:.LANCHOR202]
 	adrp	x0, .LC177
 	add	x0, x0, :lo12:.LC177
 	bl	printf
-.L2748:
+.L2744:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2749
-	ldr	w1, [x27, #:lo12:.LANCHOR203]
+	tbz	x0, 12, .L2745
+	ldr	w1, [x28, #:lo12:.LANCHOR118]
 	adrp	x0, .LC178
 	add	x0, x0, :lo12:.LC178
 	bl	printf
-.L2749:
+.L2745:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2750
-	ldrh	w1, [x24, #:lo12:.LANCHOR186]
+	tbz	x0, 12, .L2746
+	ldr	w1, [x27, #:lo12:.LANCHOR203]
 	adrp	x0, .LC179
 	add	x0, x0, :lo12:.LC179
 	bl	printf
-.L2750:
+.L2746:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2751
-	ldrh	w1, [x20, #:lo12:.LANCHOR198]
+	tbz	x0, 12, .L2747
+	ldrh	w1, [x24, #:lo12:.LANCHOR185]
 	adrp	x0, .LC180
 	add	x0, x0, :lo12:.LC180
 	bl	printf
-.L2751:
+.L2747:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2752
-	ldrh	w1, [x26, #:lo12:.LANCHOR141]
+	tbz	x0, 12, .L2748
+	ldrh	w1, [x20, #:lo12:.LANCHOR198]
 	adrp	x0, .LC181
 	add	x0, x0, :lo12:.LC181
 	bl	printf
-.L2752:
+.L2748:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2753
-	ldrh	w1, [x25, #:lo12:.LANCHOR84]
+	tbz	x0, 12, .L2749
+	ldrh	w1, [x26, #:lo12:.LANCHOR141]
 	adrp	x0, .LC182
 	add	x0, x0, :lo12:.LC182
 	bl	printf
-.L2753:
+.L2749:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2754
-	ldr	x0, [x29, 104]
-	ldrh	w1, [x0, #:lo12:.LANCHOR88]
+	tbz	x0, 12, .L2750
+	ldrh	w1, [x25, #:lo12:.LANCHOR84]
 	adrp	x0, .LC183
 	add	x0, x0, :lo12:.LC183
 	bl	printf
-.L2754:
+.L2750:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2751
+	ldr	x0, [x29, 104]
+	ldrh	w1, [x0, #:lo12:.LANCHOR88]
+	adrp	x0, .LC184
+	add	x0, x0, :lo12:.LC184
+	bl	printf
+.L2751:
 	bl	buf_init
 	adrp	x25, .LANCHOR10
 	ldrh	w1, [x23, #:lo12:.LANCHOR6]
@@ -17099,15 +17101,15 @@ zftl_init:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	add	x1, x2, x1, sxtw 2
 	str	x1, [x25, #:lo12:.LANCHOR10]
-	tbz	x0, 12, .L2755
-	adrp	x0, .LC184
-	add	x0, x0, :lo12:.LC184
+	tbz	x0, 12, .L2752
+	adrp	x0, .LC185
+	add	x0, x0, :lo12:.LC185
 	bl	printf
-.L2755:
+.L2752:
 	ldrh	w0, [x22, #:lo12:.LANCHOR80]
 	ldrb	w21, [x21, #:lo12:.LANCHOR73]
 	ldrh	w1, [x23, #:lo12:.LANCHOR6]
-	ldrh	w22, [x24, #:lo12:.LANCHOR186]
+	ldrh	w22, [x24, #:lo12:.LANCHOR185]
 	mul	w21, w0, w21
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	add	w21, w1, w21, lsl 2
@@ -17116,37 +17118,37 @@ zftl_init:
 	add	w22, w1, w22, lsl 2
 	add	w21, w21, 632
 	add	w22, w22, 704
-	tbz	x0, 12, .L2756
+	tbz	x0, 12, .L2753
 	ldrh	w3, [x20, #:lo12:.LANCHOR198]
-	adrp	x0, .LC185
+	adrp	x0, .LC186
 	mov	w2, w22
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC185
+	add	x0, x0, :lo12:.LC186
 	bl	printf
-.L2756:
+.L2753:
 	ldrh	w0, [x20, #:lo12:.LANCHOR198]
 	cmp	w21, w0
-	bhi	.L2757
+	bhi	.L2754
 	cmp	w22, w0
-	bls	.L2758
-.L2757:
-.L2801:
-	b	.L2801
-.L2739:
+	bls	.L2755
+.L2754:
+.L2798:
+	b	.L2798
+.L2736:
 	add	w1, w1, 1
 	lsl	w3, w3, 1
 	and	w1, w1, 65535
-	b	.L2738
-.L2741:
+	b	.L2735
+.L2738:
 	add	w4, w4, 1
 	lsl	w1, w1, 1
 	and	w4, w4, 65535
-	b	.L2740
-.L2758:
+	b	.L2737
+.L2755:
 	bl	sblk_init
 	bl	ftl_info_blk_init
 	cmn	w0, #1
-	beq	.L2737
+	beq	.L2734
 	bl	ftl_ext_info_init
 	adrp	x19, .LANCHOR97
 	mov	w0, 1
@@ -17177,20 +17179,20 @@ zftl_init:
 	bl	pm_flush
 	mov	w0, 1
 	bl	ftl_total_vpn_update
-	adrp	x0, .LANCHOR181
-	ldrb	w0, [x0, #:lo12:.LANCHOR181]
-	cbz	w0, .L2760
+	adrp	x0, .LANCHOR180
+	ldrb	w0, [x0, #:lo12:.LANCHOR180]
+	cbz	w0, .L2757
 	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	ldr	w0, [x1, 68]
 	add	w0, w0, 1
 	str	w0, [x1, 68]
-.L2760:
+.L2757:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
 	bl	print_ftl_debug_info
 	mov	w0, 0
-.L2737:
+.L2734:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -17208,14 +17210,14 @@ rk_ftl_init:
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	bl	nand_flash_init
-	cbnz	w0, .L2805
+	cbnz	w0, .L2802
 	bl	zftl_init
-.L2805:
+.L2802:
 	mov	w19, w0
 	bl	idb_init
 	mov	w1, w19
-	adrp	x0, .LC186
-	add	x0, x0, :lo12:.LC186
+	adrp	x0, .LC187
+	add	x0, x0, :lo12:.LC187
 	bl	printf
 	mov	w0, w19
 	ldr	x19, [sp, 16]
@@ -17244,12 +17246,12 @@ gc_update_l2p_map_new:
 	ldrb	w1, [x1, 9]
 	mul	w26, w26, w1
 	ldr	w1, [x24, #:lo12:.LANCHOR14]
-	tbz	x1, 8, .L2808
+	tbz	x1, 8, .L2805
 	ldrh	w1, [x21, 80]
-	adrp	x0, .LC187
-	add	x0, x0, :lo12:.LC187
+	adrp	x0, .LC188
+	add	x0, x0, :lo12:.LC188
 	bl	printf
-.L2808:
+.L2805:
 	adrp	x23, .LANCHOR9
 	ldrh	w1, [x21, 80]
 	sub	w2, w26, #1
@@ -17260,12 +17262,12 @@ gc_update_l2p_map_new:
 	adrp	x0, .LANCHOR121
 	add	x0, x0, :lo12:.LANCHOR121
 	str	x0, [x29, 104]
-.L2809:
+.L2806:
 	mov	w28, w22
 	cmp	w26, w22
-	bhi	.L2819
+	bhi	.L2816
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2820
+	tbz	x0, 8, .L2817
 	ldr	x0, [x29, 128]
 	mov	w3, w25
 	ldr	x1, [x23, #:lo12:.LANCHOR9]
@@ -17273,22 +17275,22 @@ gc_update_l2p_map_new:
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldrh	w2, [x1, x2, lsl 1]
 	ldrh	w1, [x0, 80]
-	adrp	x0, .LC190
-	add	x0, x0, :lo12:.LC190
+	adrp	x0, .LC191
+	add	x0, x0, :lo12:.LC191
 	bl	printf
-.L2820:
+.L2817:
 	ldrh	w1, [x21, 80]
 	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, x1, lsl 1]
 	cmp	w25, w0
-	beq	.L2821
+	beq	.L2818
 	adrp	x1, .LANCHOR204
 	adrp	x0, .LC0
-	mov	w2, 488
+	mov	w2, 489
 	add	x1, x1, :lo12:.LANCHOR204
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2821:
+.L2818:
 	ldrh	w1, [x21, 80]
 	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	strh	w25, [x0, x1, lsl 1]
@@ -17301,13 +17303,13 @@ gc_update_l2p_map_new:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L2819:
+.L2816:
 	adrp	x27, .LANCHOR147
 	lsl	x19, x22, 2
 	ldr	x0, [x27, #:lo12:.LANCHOR147]
 	ldr	w2, [x0, x19]
 	cmn	w2, #1
-	beq	.L2810
+	beq	.L2807
 	adrp	x0, .LANCHOR121
 	ldrb	w20, [x0, #:lo12:.LANCHOR121]
 	lsl	w20, w20, 7
@@ -17315,42 +17317,42 @@ gc_update_l2p_map_new:
 	and	w0, w20, 65535
 	str	w0, [x29, 156]
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2811
+	tbz	x0, 8, .L2808
 	ldr	w1, [x29, 156]
-	adrp	x0, .LC188
+	adrp	x0, .LC189
 	mov	w3, w22
-	add	x0, x0, :lo12:.LC188
+	add	x0, x0, :lo12:.LC189
 	bl	printf
-.L2811:
+.L2808:
 	sub	w28, w26, w28
 	add	x28, x28, x22
 	lsl	x0, x28, 2
 	str	x0, [x29, 144]
-	adrp	x0, .LC189
-	add	x0, x0, :lo12:.LC189
+	adrp	x0, .LC190
+	add	x0, x0, :lo12:.LC190
 	str	x0, [x29, 120]
 	adrp	x0, .LANCHOR99
 	add	x0, x0, :lo12:.LANCHOR99
 	str	x0, [x29, 112]
-.L2812:
+.L2809:
 	ldr	x0, [x29, 144]
 	cmp	x0, x19
-	bne	.L2818
-.L2810:
+	bne	.L2815
+.L2807:
 	add	x22, x22, 1
-	b	.L2809
-.L2818:
+	b	.L2806
+.L2815:
 	ldr	x0, [x27, #:lo12:.LANCHOR147]
 	ldr	w20, [x0, x19]
 	cmn	w20, #1
-	beq	.L2813
+	beq	.L2810
 	ldr	x0, [x29, 104]
 	ldr	w1, [x29, 156]
 	ldrb	w0, [x0]
 	lsl	w0, w0, 7
 	udiv	w0, w20, w0
 	cmp	w1, w0, uxth
-	bne	.L2813
+	bne	.L2810
 	adrp	x0, .LANCHOR148
 	ldr	x0, [x0, #:lo12:.LANCHOR148]
 	ldr	w28, [x0, x19]
@@ -17358,15 +17360,15 @@ gc_update_l2p_map_new:
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 172]
 	cmn	w0, #1
-	bne	.L2814
+	bne	.L2811
 	mov	w2, 0
 	add	x1, x29, 172
 	mov	w0, w20
 	bl	pm_log2phys
-.L2814:
+.L2811:
 	ldr	w3, [x29, 172]
 	cmp	w28, w3
-	bne	.L2815
+	bne	.L2812
 	adrp	x0, .LANCHOR149
 	mov	w2, 1
 	add	x1, x29, 168
@@ -17388,25 +17390,25 @@ gc_update_l2p_map_new:
 	adrp	x0, .LANCHOR98
 	ldrb	w0, [x0, #:lo12:.LANCHOR98]
 	udiv	w0, w28, w0
-.L2841:
+.L2838:
 	bl	ftl_vpn_decrement
 	ldr	x0, [x27, #:lo12:.LANCHOR147]
 	mov	w1, -1
 	str	w1, [x0, x19]
-.L2813:
+.L2810:
 	add	x19, x19, 4
-	b	.L2812
-.L2815:
+	b	.L2809
+.L2812:
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2817
+	tbz	x0, 8, .L2814
 	ldr	x0, [x29, 120]
 	mov	w2, w28
 	mov	w1, w20
 	bl	printf
-.L2817:
+.L2814:
 	ldr	x0, [x29, 136]
 	ldrh	w0, [x0]
-	b	.L2841
+	b	.L2838
 	.size	gc_update_l2p_map_new, .-gc_update_l2p_map_new
 	.section	.text.gc_scan_src_blk_one_page,"ax",@progbits
 	.align	2
@@ -17430,17 +17432,17 @@ gc_scan_src_blk_one_page:
 	adrp	x2, .LANCHOR73
 	ldrb	w4, [x2, #:lo12:.LANCHOR73]
 	ldrh	w2, [x1, 2]
-.L2843:
+.L2840:
 	cmp	w3, w7
-	beq	.L2845
-	cbz	w6, .L2846
+	beq	.L2842
+	cbz	w6, .L2843
 	add	x1, x19, :lo12:.LANCHOR62
 	strb	w0, [x1, 4]
-.L2846:
-	cbz	w5, .L2847
+.L2843:
+	cbz	w5, .L2844
 	add	x0, x19, :lo12:.LANCHOR62
 	strh	w2, [x0, 2]
-.L2847:
+.L2844:
 	adrp	x0, .LANCHOR105
 	ldrh	w22, [x0, #:lo12:.LANCHOR105]
 	adrp	x0, .LANCHOR68
@@ -17448,25 +17450,25 @@ gc_scan_src_blk_one_page:
 	ldrb	w1, [x0, #:lo12:.LANCHOR68]
 	mul	w22, w22, w3
 	cmp	w1, 2
-	bne	.L2848
+	bne	.L2845
 	add	x0, x19, :lo12:.LANCHOR62
 	ldrb	w1, [x0, 6]
-	cbnz	w1, .L2848
+	cbnz	w1, .L2845
 	ldrh	w0, [x0, 2]
 	add	w22, w22, w0, lsl 1
-.L2849:
+.L2846:
 	add	x1, x19, :lo12:.LANCHOR62
 	ldrb	w0, [x1, 4]
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x1, 4]
 	cmp	w4, w0
-	bne	.L2850
+	bne	.L2847
 	ldrh	w0, [x1, 2]
 	strb	wzr, [x1, 4]
 	add	w0, w0, 1
 	strh	w0, [x1, 2]
-.L2850:
+.L2847:
 	mov	w0, 1
 	add	x19, x19, :lo12:.LANCHOR62
 	bl	buf_alloc
@@ -17474,15 +17476,15 @@ gc_scan_src_blk_one_page:
 	mov	x21, x0
 	mov	w20, 0
 	adrp	x24, .LANCHOR65
-.L2860:
+.L2857:
 	ldrb	w0, [x19, 6]
 	cmp	w0, 3
-	bne	.L2851
-	cbz	w20, .L2852
-.L2851:
+	bne	.L2848
+	cbz	w20, .L2849
+.L2848:
 	cmp	w0, w20
-	bgt	.L2853
-.L2861:
+	bgt	.L2850
+.L2858:
 	mov	x0, x21
 	bl	buf_free
 	ldp	x19, x20, [sp, 16]
@@ -17491,33 +17493,33 @@ gc_scan_src_blk_one_page:
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2845:
+.L2842:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	cmp	w0, w4
-	bne	.L2844
+	bne	.L2841
 	add	w2, w2, 1
 	mov	w5, 1
 	and	w2, w2, 65535
 	mov	w0, 0
-.L2844:
+.L2841:
 	add	x3, x1, x0, sxtw 1
 	mov	w6, 1
 	ldrh	w3, [x3, 40]
-	b	.L2843
-.L2848:
+	b	.L2840
+.L2845:
 	add	x0, x19, :lo12:.LANCHOR62
 	ldrh	w0, [x0, 2]
 	add	w22, w0, w22
-	b	.L2849
-.L2853:
+	b	.L2846
+.L2850:
 	ldrb	w1, [x23]
 	cmp	w1, 2
-	bne	.L2854
-	cbnz	w0, .L2854
+	bne	.L2851
+	cbnz	w0, .L2851
 	add	w0, w20, w22
 	orr	w0, w0, 33554432
-.L2874:
+.L2871:
 	str	w0, [x21, 40]
 	mov	w1, 1
 	mov	x0, x21
@@ -17525,40 +17527,40 @@ gc_scan_src_blk_one_page:
 	ldr	w0, [x21, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2857
+	beq	.L2854
 	ldr	x0, [x21, 24]
 	ldr	w25, [x0, 4]
 	mov	w0, w25
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 92]
 	cmn	w0, #1
-	bne	.L2858
+	bne	.L2855
 	mov	w2, 0
 	add	x1, x29, 92
 	mov	w0, w25
 	bl	pm_log2phys
-.L2858:
+.L2855:
 	ldr	w0, [x29, 92]
 	cmp	w22, w0
-	bne	.L2857
+	bne	.L2854
 	ldrh	w0, [x19, 24]
 	ldr	x2, [x24, #:lo12:.LANCHOR65]
 	ubfiz	x1, x0, 2, 16
 	add	w0, w0, 1
 	str	w22, [x2, x1]
 	strh	w0, [x19, 24]
-.L2857:
+.L2854:
 	ldrh	w0, [x19, 26]
 	add	w0, w0, 1
 	strh	w0, [x19, 26]
-.L2852:
+.L2849:
 	add	w20, w20, 1
 	cmp	w20, 4
-	bne	.L2860
-	b	.L2861
-.L2854:
+	bne	.L2857
+	b	.L2858
+.L2851:
 	orr	w0, w22, w20, lsl 24
-	b	.L2874
+	b	.L2871
 	.size	gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page
 	.section	.text.gc_scan_src_blk,"ax",@progbits
 	.align	2
@@ -17575,42 +17577,42 @@ gc_scan_src_blk:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w1, w0
-	bne	.L2876
+	bne	.L2873
 	adrp	x1, .LANCHOR205
 	adrp	x0, .LC0
-	mov	w2, 925
+	mov	w2, 926
 	add	x1, x1, :lo12:.LANCHOR205
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2876:
+.L2873:
 	ldrh	w1, [x19, #:lo12:.LANCHOR62]
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L2896
+	beq	.L2893
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2878
+	tbz	x0, 8, .L2875
 	adrp	x2, .LANCHOR9
 	ubfiz	x0, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC191
-	add	x0, x0, :lo12:.LC191
+	adrp	x0, .LC192
+	add	x0, x0, :lo12:.LC192
 	bl	printf
-.L2878:
+.L2875:
 	ldrh	w0, [x19, #:lo12:.LANCHOR62]
 	add	x14, x19, :lo12:.LANCHOR62
 	add	x1, x14, 40
 	bl	ftl_get_blk_list_in_sblk
 	and	w1, w0, 255
 	strb	w1, [x14, 5]
-	cbnz	w1, .L2879
+	cbnz	w1, .L2876
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR62]
-.L2896:
+.L2893:
 	mov	w0, 0
-	b	.L2875
-.L2879:
+	b	.L2872
+.L2876:
 	adrp	x4, .LANCHOR7
 	ldrh	w3, [x19, #:lo12:.LANCHOR62]
 	mov	x22, x4
@@ -17620,59 +17622,59 @@ gc_scan_src_blk:
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 32
-	beq	.L2880
+	beq	.L2877
 	cmp	w1, 224
-	beq	.L2880
-	cbz	w1, .L2881
+	beq	.L2877
+	cbz	w1, .L2878
 	adrp	x1, .LANCHOR10
 	ldr	x1, [x1, #:lo12:.LANCHOR10]
 	ldrh	w3, [x1, 16]
 	cmp	w3, w2
-	beq	.L2880
+	beq	.L2877
 	ldrh	w3, [x1, 48]
 	cmp	w3, w2
-	beq	.L2880
+	beq	.L2877
 	ldrh	w1, [x1, 80]
 	cmp	w1, w2
-	bne	.L2910
-.L2880:
+	bne	.L2907
+.L2877:
 	add	x0, x19, :lo12:.LANCHOR62
 	mov	w1, -1
 	strh	w1, [x19, #:lo12:.LANCHOR62]
 	strh	wzr, [x0, 24]
-	b	.L2896
-.L2881:
+	b	.L2893
+.L2878:
 	adrp	x0, .LANCHOR9
 	mov	x20, x0
 	ldr	x1, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x1, x3, lsl 1]
-	cbz	w1, .L2883
+	cbz	w1, .L2880
 	adrp	x1, .LANCHOR205
 	adrp	x0, .LC0
-	mov	w2, 945
+	mov	w2, 946
 	add	x1, x1, :lo12:.LANCHOR205
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2883:
+.L2880:
 	ldrh	w1, [x19, #:lo12:.LANCHOR62]
 	ldr	x0, [x20, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x1, lsl 1]
-	b	.L2880
-.L2910:
+	b	.L2877
+.L2907:
 	and	w0, w0, 255
 	sub	w0, w0, #1
 	add	x0, x14, x0, sxtw 1
 	ldrh	w21, [x0, 40]
 	mov	w0, 65535
 	cmp	w21, w0
-	bne	.L2884
+	bne	.L2881
 	adrp	x1, .LANCHOR205
 	adrp	x0, .LC0
-	mov	w2, 953
+	mov	w2, 954
 	add	x1, x1, :lo12:.LANCHOR205
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2884:
+.L2881:
 	adrp	x1, .LANCHOR105
 	ldr	x3, [x22, #:lo12:.LANCHOR7]
 	adrp	x2, .LANCHOR80
@@ -17688,14 +17690,14 @@ gc_scan_src_blk:
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 160
-	bne	.L2897
+	bne	.L2894
 	adrp	x1, .LANCHOR68
 	ldrb	w21, [x1, #:lo12:.LANCHOR68]
 	cmp	w21, 2
 	orr	w20, w20, w21, lsl 24
-	beq	.L2886
+	beq	.L2883
 	and	w21, w21, 65535
-.L2885:
+.L2882:
 	add	x22, x19, :lo12:.LANCHOR62
 	orr	w20, w0, w20
 	mov	w0, 1
@@ -17721,41 +17723,41 @@ gc_scan_src_blk:
 	ldr	w0, [x25, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L2887
-.L2912:
+	bne	.L2884
+.L2909:
 	mov	x0, x25
 	bl	buf_free
 	mov	w0, -1
-.L2875:
+.L2872:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2886:
+.L2883:
 	ldrh	w0, [x23, #:lo12:.LANCHOR72]
 	sub	w0, w0, #1
 	and	w0, w0, 65535
-	b	.L2885
-.L2897:
+	b	.L2882
+.L2894:
 	mov	w21, 1
-	b	.L2885
-.L2887:
+	b	.L2882
+.L2884:
 	ldr	x0, [x25, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L2888
-	mov	w2, 985
+	beq	.L2885
+	mov	w2, 986
 	adrp	x1, .LANCHOR205
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR205
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L2912
-.L2888:
+	b	.L2909
+.L2885:
 	ldrb	w0, [x23, #:lo12:.LANCHOR73]
 	adrp	x22, .LANCHOR99
 	ldrh	w1, [x24, #:lo12:.LANCHOR80]
@@ -17767,9 +17769,9 @@ gc_scan_src_blk:
 	mul	w0, w0, w1
 	mul	w21, w21, w0
 	and	w21, w21, 65535
-.L2889:
+.L2886:
 	cmp	w21, w26
-	bgt	.L2894
+	bgt	.L2891
 	mov	x0, x25
 	bl	buf_free
 	adrp	x0, .LANCHOR9
@@ -17781,11 +17783,11 @@ gc_scan_src_blk:
 	ldrh	w3, [x3, 24]
 	ldrh	w2, [x4, x2]
 	cmp	w2, w3
-	beq	.L2895
-	adrp	x0, .LC192
-	add	x0, x0, :lo12:.LC192
+	beq	.L2892
+	adrp	x0, .LC193
+	add	x0, x0, :lo12:.LC193
 	bl	printf
-.L2895:
+.L2892:
 	add	x0, x19, :lo12:.LANCHOR62
 	ldrh	w2, [x19, #:lo12:.LANCHOR62]
 	ldr	x1, [x20, #:lo12:.LANCHOR9]
@@ -17793,20 +17795,20 @@ gc_scan_src_blk:
 	strh	w3, [x1, x2, lsl 1]
 	strh	wzr, [x0, 28]
 	ldrh	w0, [x0, 24]
-	b	.L2875
-.L2894:
+	b	.L2872
+.L2891:
 	ldr	w0, [x24, x26, lsl 2]
 	cmn	w0, #1
-	beq	.L2891
+	beq	.L2888
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 92]
 	cmn	w0, #1
-	bne	.L2892
+	bne	.L2889
 	ldr	w0, [x24, x26, lsl 2]
 	mov	w2, 0
 	add	x1, x29, 92
 	bl	pm_log2phys
-.L2892:
+.L2889:
 	ldrh	w1, [x22]
 	mov	w0, 21
 	ldr	w3, [x29, 92]
@@ -17821,16 +17823,16 @@ gc_scan_src_blk:
 	udiv	w0, w0, w1
 	add	x1, x19, :lo12:.LANCHOR62
 	cmp	w0, w2
-	bne	.L2891
+	bne	.L2888
 	ldrh	w0, [x1, 24]
 	ldr	x4, [x20, #:lo12:.LANCHOR65]
 	ubfiz	x2, x0, 2, 16
 	add	w0, w0, 1
 	str	w3, [x4, x2]
 	strh	w0, [x1, 24]
-.L2891:
+.L2888:
 	add	x26, x26, 1
-	b	.L2889
+	b	.L2886
 	.size	gc_scan_src_blk, .-gc_scan_src_blk
 	.section	.text.gc_scan_static_data,"ax",@progbits
 	.align	2
@@ -17846,13 +17848,13 @@ gc_scan_static_data:
 	ldr	w1, [x0, 544]
 	str	x23, [sp, 48]
 	cmn	w1, #1
-	beq	.L2914
+	beq	.L2911
 	adrp	x21, .LANCHOR206
 	adrp	x22, .LC0
 	add	x21, x21, :lo12:.LANCHOR206
 	add	x22, x22, :lo12:.LC0
 	mov	w20, 11
-.L2922:
+.L2919:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w2, 0
 	add	x1, x29, 76
@@ -17860,7 +17862,7 @@ gc_scan_static_data:
 	bl	pm_log2phys
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L2915
+	beq	.L2912
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 76]
@@ -17870,7 +17872,7 @@ gc_scan_static_data:
 	bl	sblk_read_page
 	ldr	w0, [x23, 52]
 	cmp	w0, 256
-	bne	.L2916
+	bne	.L2913
 	adrp	x0, .LANCHOR99
 	ldr	w2, [x29, 76]
 	mov	w1, 1
@@ -17886,21 +17888,21 @@ gc_scan_static_data:
 	mov	w2, 0
 	udiv	w0, w0, w3
 	bl	gc_add_sblk
-.L2916:
+.L2913:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldr	x1, [x23, 24]
 	ldr	w0, [x0, 544]
 	ldr	w1, [x1, 4]
 	cmp	w1, w0
-	beq	.L2917
-	mov	w2, 1424
+	beq	.L2914
+	mov	w2, 1425
 	mov	x1, x21
 	mov	x0, x22
 	bl	printf
-.L2917:
+.L2914:
 	mov	x0, x23
 	bl	buf_free
-.L2915:
+.L2912:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	adrp	x2, .LANCHOR118
 	ldr	w2, [x2, #:lo12:.LANCHOR118]
@@ -17908,7 +17910,7 @@ gc_scan_static_data:
 	add	w1, w1, 1
 	str	w1, [x0, 544]
 	cmp	w1, w2
-	bcc	.L2918
+	bcc	.L2915
 	mov	w1, -1
 	str	w1, [x0, 544]
 	ldr	w1, [x0, 548]
@@ -17919,42 +17921,42 @@ gc_scan_static_data:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2913:
+.L2910:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2918:
+.L2915:
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	bne	.L2913
+	bne	.L2910
 	sub	w20, w20, #1
 	ands	w20, w20, 65535
-	bne	.L2922
-	b	.L2913
-.L2914:
+	bne	.L2919
+	b	.L2910
+.L2911:
 	ldr	w1, [x0, 536]
 	adrp	x3, .LANCHOR97
 	ldr	w2, [x0, 12]
 	add	w1, w1, 12959744
 	add	w1, w1, 256
 	cmp	w2, w1
-	bhi	.L2924
+	bhi	.L2921
 	ldr	x4, [x3, #:lo12:.LANCHOR97]
 	ldr	w1, [x0, 540]
 	add	w1, w1, 98304
 	ldr	w4, [x4, 44]
 	add	w1, w1, 1696
 	cmp	w4, w1
-	bls	.L2913
-.L2924:
+	bls	.L2910
+.L2921:
 	ldr	x1, [x3, #:lo12:.LANCHOR97]
 	ldr	w1, [x1, 44]
 	str	w1, [x0, 540]
 	str	w2, [x0, 536]
 	str	wzr, [x0, 544]
-	b	.L2913
+	b	.L2910
 	.size	gc_scan_static_data, .-gc_scan_static_data
 	.section	.text.ftl_sblk_dump,"ax",@progbits
 	.align	2
@@ -17980,29 +17982,29 @@ ftl_sblk_dump:
 	ldrb	w2, [x1, 2]
 	mov	w1, w21
 	ldrh	w4, [x0, x23]
-	adrp	x0, .LC193
+	adrp	x0, .LC194
 	ubfx	x5, x5, 11, 8
-	add	x0, x0, :lo12:.LC193
+	add	x0, x0, :lo12:.LC194
 	ubfx	x3, x2, 3, 2
 	and	w4, w4, 2047
 	ubfx	x2, x2, 5, 3
 	bl	printf
 	mov	w0, 65535
 	cmp	w21, w0
-	beq	.L2951
+	beq	.L2948
 	adrp	x0, .LANCHOR6
 	ldrh	w0, [x0, #:lo12:.LANCHOR6]
 	cmp	w0, w21
-	bls	.L2951
+	bls	.L2948
 	ldr	x0, [x24, #:lo12:.LANCHOR7]
 	add	x0, x0, x23
 	ldrb	w0, [x0, 2]
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L2952
+	bne	.L2949
 	adrp	x0, .LANCHOR68
 	ldrb	w25, [x0, #:lo12:.LANCHOR68]
-.L2932:
+.L2929:
 	add	x28, x29, 224
 	adrp	x19, .LANCHOR80
 	mov	w0, w21
@@ -18018,11 +18020,11 @@ ftl_sblk_dump:
 	strb	wzr, [x29, 197]
 	mov	w3, w25
 	strh	wzr, [x29, 194]
-	adrp	x0, .LC194
+	adrp	x0, .LC195
 	mul	w1, w1, w2
 	strh	wzr, [x29, 202]
 	strh	w1, [x29, 198]
-	add	x0, x0, :lo12:.LC194
+	add	x0, x0, :lo12:.LC195
 	ldr	x1, [x24, #:lo12:.LANCHOR7]
 	add	x1, x1, x23
 	ldrb	w2, [x1, 2]
@@ -18037,36 +18039,36 @@ ftl_sblk_dump:
 	adrp	x0, .LANCHOR105
 	add	x0, x0, :lo12:.LANCHOR105
 	str	x0, [x29, 112]
-.L2933:
+.L2930:
 	ldr	x0, [x29, 136]
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w0, w20
-	bls	.L2948
+	bls	.L2945
 	lsl	w0, w20, 1
 	str	wzr, [x29, 172]
 	sub	w0, w0, #1
 	str	w0, [x29, 160]
-	adrp	x0, .LC148
-	add	x0, x0, :lo12:.LC148
+	adrp	x0, .LC149
+	add	x0, x0, :lo12:.LC149
 	str	x0, [x29, 120]
-	b	.L2949
-.L2952:
+	b	.L2946
+.L2949:
 	mov	w25, 1
-	b	.L2932
-.L2945:
+	b	.L2929
+.L2942:
 	ldr	x0, [x29, 128]
 	ldrh	w10, [x28, x0]
 	mov	w0, 65535
 	cmp	w10, w0
-	beq	.L2934
+	beq	.L2931
 	ldr	x0, [x29, 112]
 	cmp	w25, 3
 	ldrh	w19, [x0]
 	mul	w19, w19, w10
-	bne	.L2935
+	bne	.L2932
 	add	w19, w20, w19
 	orr	w19, w19, w22, lsl 24
-.L2936:
+.L2933:
 	str	w19, [x26, 40]
 	mov	w1, 1
 	str	w10, [x29, 104]
@@ -18108,22 +18110,22 @@ ftl_sblk_dump:
 	and	w0, w0, 224
 	cmp	w0, 224
 	ccmp	w0, w1, 4, ne
-	beq	.L2934
+	beq	.L2931
 	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L2939
+	bne	.L2936
 	ldr	x0, [x26, 24]
 	mov	w2, 0
 	add	x1, x29, 188
 	ldr	w0, [x0, 4]
 	bl	pm_log2phys
-.L2939:
+.L2936:
 	ldr	w0, [x29, 188]
 	cmp	w19, w0
-	bne	.L2940
+	bne	.L2937
 	ldr	w0, [x29, 168]
 	mov	w1, w19
 	add	w0, w0, 1
@@ -18131,81 +18133,81 @@ ftl_sblk_dump:
 	ldr	x0, [x26, 24]
 	ldr	w3, [x29, 168]
 	ldr	w2, [x0, 4]
-	adrp	x0, .LC195
-	add	x0, x0, :lo12:.LC195
+	adrp	x0, .LC196
+	add	x0, x0, :lo12:.LC196
 	bl	printf
-.L2940:
+.L2937:
 	ldr	x0, [x29, 152]
-	cbz	x0, .L2942
+	cbz	x0, .L2939
 	ubfiz	x19, x27, 2, 32
 	ldr	w2, [x0, x19]
 	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	cmp	w0, w2
-	beq	.L2943
+	beq	.L2940
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2943
-	adrp	x0, .LC196
+	tbz	x0, 12, .L2940
+	adrp	x0, .LC197
 	mov	w1, w27
-	add	x0, x0, :lo12:.LC196
+	add	x0, x0, :lo12:.LC197
 	bl	printf
-.L2943:
+.L2940:
 	ldr	x1, [x26, 24]
 	ldr	x0, [x29, 152]
 	ldr	w1, [x1, 4]
 	ldr	w0, [x0, x19]
 	cmp	w1, w0
-	beq	.L2942
+	beq	.L2939
 	cmn	w0, #1
-	beq	.L2942
+	beq	.L2939
 	adrp	x1, .LANCHOR207
 	adrp	x0, .LC0
-	mov	w2, 1300
+	mov	w2, 1299
 	add	x1, x1, :lo12:.LANCHOR207
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2942:
+.L2939:
 	add	w27, w27, 1
-.L2934:
+.L2931:
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L2947:
+.L2944:
 	cmp	w25, w22
-	bcs	.L2945
+	bcs	.L2942
 	ldr	w0, [x29, 172]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	str	w0, [x29, 172]
-.L2949:
+.L2946:
 	ldrb	w0, [x29, 201]
 	ldr	w1, [x29, 172]
 	cmp	w0, w1
-	bls	.L2946
+	bls	.L2943
 	ldrsw	x0, [x29, 172]
 	mov	w22, 1
 	add	x0, x0, 8
 	lsl	x0, x0, 1
 	str	x0, [x29, 128]
-	b	.L2947
-.L2935:
+	b	.L2944
+.L2932:
 	cmp	w25, 2
-	bne	.L2937
+	bne	.L2934
 	ldr	w0, [x29, 160]
 	add	w19, w19, w0
 	adrp	x0, .LANCHOR68
 	add	w19, w19, w22
 	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	orr	w19, w19, w0, lsl 24
-	b	.L2936
-.L2937:
+	b	.L2933
+.L2934:
 	add	w19, w20, w19
-	b	.L2936
-.L2946:
+	b	.L2933
+.L2943:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2933
-.L2948:
+	b	.L2930
+.L2945:
 	mov	x0, x26
 	bl	buf_free
 	adrp	x0, .LANCHOR9
@@ -18214,11 +18216,11 @@ ftl_sblk_dump:
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w2, [x0, x1, lsl 1]
 	mov	w1, w21
-	adrp	x0, .LC197
-	add	x0, x0, :lo12:.LC197
+	adrp	x0, .LC198
+	add	x0, x0, :lo12:.LC198
 	bl	printf
 	ldr	w0, [x29, 164]
-.L2930:
+.L2927:
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
 	ldp	x23, x24, [sp, 96]
@@ -18227,9 +18229,9 @@ ftl_sblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 272
 	ret
-.L2951:
+.L2948:
 	mov	w0, 0
-	b	.L2930
+	b	.L2927
 	.size	ftl_sblk_dump, .-ftl_sblk_dump
 	.section	.text.zftl_read,"ax",@progbits
 	.align	2
@@ -18249,22 +18251,22 @@ zftl_read:
 	stp	x23, x24, [sp, 48]
 	mov	x22, x3
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2963
+	tbz	x0, 12, .L2960
 	mov	w3, w2
-	adrp	x0, .LC198
+	adrp	x0, .LC199
 	mov	w2, w1
-	add	x0, x0, :lo12:.LC198
+	add	x0, x0, :lo12:.LC199
 	mov	w1, w20
 	bl	printf
-.L2963:
-	cbnz	w20, .L2964
+.L2960:
+	cbnz	w20, .L2961
 	adrp	x0, .LANCHOR58
 	mov	w20, 24576
 	ldr	w0, [x0, #:lo12:.LANCHOR58]
-.L2965:
+.L2962:
 	add	w1, w19, w26
 	cmp	w0, w1
-	bcc	.L2993
+	bcc	.L2990
 	adrp	x1, .LANCHOR97
 	add	w20, w20, w19
 	add	w3, w26, w20
@@ -18286,10 +18288,10 @@ zftl_read:
 	sub	w25, w2, w27
 	str	w2, [x29, 156]
 	add	w25, w25, 1
-.L2967:
-	cbnz	w25, .L2991
+.L2964:
+	cbnz	w25, .L2988
 	ldr	w0, [x29, 164]
-.L2962:
+.L2959:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -18297,22 +18299,22 @@ zftl_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L2964:
+.L2961:
 	cmp	w20, 3
-	bhi	.L2993
+	bhi	.L2990
 	lsl	w20, w20, 13
 	mov	w0, 8192
-	b	.L2965
-.L2991:
+	b	.L2962
+.L2988:
 	ldr	x0, [x29, 168]
 	cmp	w21, w27
 	ldrb	w1, [x0, #:lo12:.LANCHOR121]
 	ldr	w0, [x29, 156]
 	and	w19, w1, 65535
 	ccmp	w21, w0, 4, ne
-	bne	.L2994
+	bne	.L2991
 	cmp	w21, w27
-	bne	.L2969
+	bne	.L2966
 	udiv	w24, w20, w1
 	and	w0, w26, 65535
 	msub	w1, w24, w1, w20
@@ -18321,17 +18323,17 @@ zftl_read:
 	and	w19, w19, 65535
 	cmp	w26, w19
 	csel	w19, w0, w19, cc
-.L2968:
+.L2965:
 	adrp	x23, .LANCHOR49
 	add	x1, x23, :lo12:.LANCHOR49
 	add	x1, x1, 2
 	mov	w0, 0
-.L2972:
+.L2969:
 	ldr	w2, [x1, 34]
 	cmp	w21, w2
-	bne	.L2970
+	bne	.L2967
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L2970
+	tbz	x2, 3, .L2967
 	add	x1, x23, :lo12:.LANCHOR49
 	ubfiz	x0, x0, 6, 32
 	add	x0, x1, x0
@@ -18343,19 +18345,19 @@ zftl_read:
 	add	x22, x22, x19
 	add	x1, x1, x24
 	bl	ftl_memcpy
-.L2971:
+.L2968:
 	add	w21, w21, 1
 	sub	w25, w25, #1
-.L2978:
+.L2975:
 	adrp	x0, .LANCHOR51
 	ldrb	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, 2
-	bls	.L2979
-	cbnz	w25, .L2967
-.L2979:
+	bls	.L2976
+	cbnz	w25, .L2964
+.L2976:
 	adrp	x0, .LANCHOR125
 	ldrb	w1, [x0, #:lo12:.LANCHOR125]
-	cbz	w1, .L2967
+	cbz	w1, .L2964
 	adrp	x24, .LANCHOR124
 	add	x0, x23, :lo12:.LANCHOR49
 	ldrb	w2, [x24, #:lo12:.LANCHOR124]
@@ -18367,63 +18369,63 @@ zftl_read:
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	str	x0, [x29, 128]
-.L2981:
+.L2978:
 	ldrb	w0, [x28]
-	cbnz	w0, .L2990
+	cbnz	w0, .L2987
 	mov	w0, -1
 	strb	wzr, [x28]
 	strb	w0, [x24, #:lo12:.LANCHOR124]
-	b	.L2967
-.L2969:
+	b	.L2964
+.L2966:
 	ldr	w0, [x29, 160]
 	msub	w19, w1, w21, w0
 	and	w19, w19, 255
-.L2994:
+.L2991:
 	mov	w24, 0
-	b	.L2968
-.L2970:
+	b	.L2965
+.L2967:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 32
-	bne	.L2972
+	bne	.L2969
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L2973
+	bne	.L2970
 	mov	w2, 0
 	add	x1, x29, 188
 	mov	w0, w21
 	bl	pm_log2phys
-.L2973:
+.L2970:
 	ldr	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L2974
+	bne	.L2971
 	ldr	x0, [x29, 168]
 	mov	w19, 0
 	add	x24, x0, :lo12:.LANCHOR121
-.L2975:
+.L2972:
 	ldrb	w0, [x24]
 	cmp	w19, w0
-	bcs	.L2971
+	bcs	.L2968
 	madd	w0, w21, w0, w19
 	cmp	w20, w0
-	bhi	.L2976
+	bhi	.L2973
 	ldr	w1, [x29, 160]
 	cmp	w1, w0
-	bls	.L2976
+	bls	.L2973
 	mov	x0, x22
 	add	x22, x22, 512
 	mov	w2, 512
 	mov	w1, 0
 	bl	ftl_memset
-.L2976:
+.L2973:
 	add	w19, w19, 1
-	b	.L2975
-.L2974:
+	b	.L2972
+.L2971:
 	mov	w0, 0
 	bl	buf_alloc
-	cbz	x0, .L2978
+	cbz	x0, .L2975
 	ldr	x2, [x29, 120]
 	ldr	x3, [x2, #:lo12:.LANCHOR97]
 	ldr	w2, [x3, 40]
@@ -18438,15 +18440,15 @@ zftl_read:
 	stp	w21, w2, [x0, 36]
 	str	w2, [x0, 44]
 	bl	zftl_add_read_buf
-	b	.L2971
-.L2990:
+	b	.L2968
+.L2987:
 	ldrb	w0, [x24, #:lo12:.LANCHOR124]
 	cmp	w0, 255
-	bne	.L2982
+	bne	.L2979
 	ldp	x0, x1, [x29, 128]
-	mov	w2, 1064
+	mov	w2, 1065
 	bl	printf
-.L2982:
+.L2979:
 	ldrb	w19, [x24, #:lo12:.LANCHOR124]
 	add	x0, x23, :lo12:.LANCHOR49
 	ubfiz	x1, x19, 6, 8
@@ -18458,21 +18460,21 @@ zftl_read:
 	strb	w0, [x24, #:lo12:.LANCHOR124]
 	ldr	w8, [x1, 52]
 	cmn	w8, #1
-	bne	.L2983
+	bne	.L2980
 	adrp	x0, .LANCHOR10
 	str	w8, [x29, 164]
 	ldr	x1, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x1, 552]
 	add	w0, w0, 1
 	str	w0, [x1, 552]
-.L2984:
+.L2981:
 	add	x10, x23, :lo12:.LANCHOR49
 	add	x10, x10, x19, lsl 6
 	ldr	x0, [x10, 24]
 	ldr	w2, [x10, 36]
 	ldr	w1, [x0, 4]
 	cmp	w1, w2
-	beq	.L2985
+	beq	.L2982
 	adrp	x1, .LANCHOR10
 	str	w8, [x29, 152]
 	str	x10, [x29, 112]
@@ -18483,9 +18485,9 @@ zftl_read:
 	ldrb	w1, [x10, 1]
 	ldp	w4, w5, [x0]
 	ldp	w6, w7, [x0, 8]
-	adrp	x0, .LC200
+	adrp	x0, .LC201
 	ldr	w3, [x10, 40]
-	add	x0, x0, :lo12:.LC200
+	add	x0, x0, :lo12:.LC201
 	bl	printf
 	ldr	x10, [x29, 112]
 	adrp	x0, .LANCHOR99
@@ -18504,28 +18506,28 @@ zftl_read:
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
 	ldr	w8, [x29, 152]
-.L2985:
+.L2982:
 	add	x0, x23, :lo12:.LANCHOR49
 	add	x0, x0, x19, lsl 6
 	ldr	x1, [x0, 24]
 	ldr	w0, [x0, 36]
 	ldr	w1, [x1, 4]
 	cmp	w1, w0
-	bne	.L2986
+	bne	.L2983
 	cmn	w8, #1
-	bne	.L2987
-.L2986:
+	bne	.L2984
+.L2983:
 	ldp	x0, x1, [x29, 128]
-	mov	w2, 1085
+	mov	w2, 1086
 	bl	printf
-.L2987:
+.L2984:
 	add	x0, x23, :lo12:.LANCHOR49
 	add	x19, x0, x19, lsl 6
 	ldr	x0, [x29, 168]
 	ldrb	w2, [x19, 56]
 	ldrb	w0, [x0, #:lo12:.LANCHOR121]
 	cmp	w0, w2
-	bls	.L2988
+	bls	.L2985
 	ldrb	w0, [x19, 57]
 	lsl	w2, w2, 9
 	ldr	x1, [x19, 8]
@@ -18533,7 +18535,7 @@ zftl_read:
 	add	x1, x1, x0
 	ldr	x0, [x19, 16]
 	bl	ftl_memcpy
-.L2989:
+.L2986:
 	ldr	x1, [x29, 144]
 	adrp	x0, .LANCHOR127
 	add	x0, x0, :lo12:.LANCHOR127
@@ -18543,10 +18545,10 @@ zftl_read:
 	ldrb	w0, [x28]
 	sub	w0, w0, #1
 	strb	w0, [x28]
-	b	.L2981
-.L2983:
+	b	.L2978
+.L2980:
 	cmp	w8, 256
-	bne	.L2984
+	bne	.L2981
 	adrp	x0, .LANCHOR99
 	mov	w4, 21
 	ldp	w2, w3, [x1, 36]
@@ -18561,8 +18563,8 @@ zftl_read:
 	adrp	x0, .LANCHOR98
 	ldrb	w0, [x0, #:lo12:.LANCHOR98]
 	udiv	w4, w4, w0
-	adrp	x0, .LC199
-	add	x0, x0, :lo12:.LC199
+	adrp	x0, .LC200
+	add	x0, x0, :lo12:.LC200
 	stp	w8, w4, [x29, 108]
 	and	w1, w4, 65535
 	bl	printf
@@ -18573,15 +18575,15 @@ zftl_read:
 	mov	w1, w5
 	bl	gc_add_sblk
 	ldr	w8, [x29, 108]
-	b	.L2984
-.L2988:
+	b	.L2981
+.L2985:
 	ldrb	w0, [x19, 2]
 	and	w0, w0, -9
 	strb	w0, [x19, 2]
-	b	.L2989
-.L2993:
+	b	.L2986
+.L2990:
 	mov	w0, -1
-	b	.L2962
+	b	.L2959
 	.size	zftl_read, .-zftl_read
 	.section	.text.zftl_vendor_read,"ax",@progbits
 	.align	2
@@ -18664,46 +18666,46 @@ gc_check_data_one_wl:
 	ldr	x0, [x22, 8]
 	stp	x27, x28, [sp, 96]
 	ldr	x21, [x20, #:lo12:.LANCHOR10]
-	cbnz	x0, .L3016
+	cbnz	x0, .L3013
 	mov	w0, 1
 	bl	buf_alloc
 	str	x0, [x22, 8]
-.L3016:
+.L3013:
 	add	x0, x19, :lo12:.LANCHOR62
 	ldr	x22, [x0, 8]
-	cbnz	x22, .L3017
+	cbnz	x22, .L3014
 	adrp	x1, .LANCHOR209
 	adrp	x0, .LC0
-	mov	w2, 366
+	mov	w2, 367
 	add	x1, x1, :lo12:.LANCHOR209
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3017:
+.L3014:
 	adrp	x2, .LANCHOR105
 	add	x28, x21, 96
 	add	x27, x21, 80
 	add	x2, x2, :lo12:.LANCHOR105
 	mov	w26, 0
-.L3018:
+.L3015:
 	ldrb	w0, [x27, 9]
 	cmp	w26, w0
-	bge	.L3027
+	bge	.L3024
 	adrp	x25, .LANCHOR68
 	mov	w24, 1
 	add	x23, x19, :lo12:.LANCHOR62
 	add	x25, x25, :lo12:.LANCHOR68
-	b	.L3028
-.L3026:
+	b	.L3025
+.L3023:
 	ldrh	w0, [x28]
 	ldrh	w1, [x2]
 	ldrb	w3, [x25]
 	cmp	w3, 3
 	mul	w1, w0, w1
 	ldrh	w0, [x23, 16]
-	bne	.L3019
+	bne	.L3016
 	add	w0, w0, w1
 	orr	w0, w0, w24, lsl 24
-.L3040:
+.L3037:
 	str	w0, [x22, 40]
 	mov	w1, 1
 	str	x2, [x29, 104]
@@ -18713,7 +18715,7 @@ gc_check_data_one_wl:
 	adrp	x1, .LANCHOR147
 	ldr	x2, [x29, 104]
 	cmn	w0, #1
-	beq	.L3022
+	beq	.L3019
 	ldrh	w0, [x23, 22]
 	ldr	x4, [x1, #:lo12:.LANCHOR147]
 	ldr	x3, [x22, 24]
@@ -18721,28 +18723,28 @@ gc_check_data_one_wl:
 	ldr	w5, [x4, x0]
 	ldr	w4, [x3, 4]
 	cmp	w5, w4
-	bne	.L3022
+	bne	.L3019
 	adrp	x4, .LANCHOR148
 	ldr	x4, [x4, #:lo12:.LANCHOR148]
 	ldr	w4, [x4, x0]
 	ldr	w0, [x3, 8]
 	cmp	w4, w0
-	beq	.L3023
-.L3022:
+	beq	.L3020
+.L3019:
 	add	x4, x1, :lo12:.LANCHOR147
 	ldrh	w0, [x23, 22]
 	ldr	x1, [x1, #:lo12:.LANCHOR147]
 	ldr	w0, [x1, x0, lsl 2]
 	cmn	w0, #1
-	beq	.L3023
+	beq	.L3020
 	adrp	x19, .LANCHOR72
 	ldrb	w3, [x27, 9]
 	str	x4, [x29, 104]
 	mov	w2, 4
 	ldrh	w0, [x19, #:lo12:.LANCHOR72]
 	mul	w3, w3, w0
-	adrp	x0, .LC201
-	add	x0, x0, :lo12:.LC201
+	adrp	x0, .LC202
+	add	x0, x0, :lo12:.LC202
 	bl	rknand_print_hex
 	ldrh	w0, [x19, #:lo12:.LANCHOR72]
 	adrp	x19, .LANCHOR148
@@ -18750,13 +18752,13 @@ gc_check_data_one_wl:
 	mov	w2, 4
 	ldr	x1, [x19, #:lo12:.LANCHOR148]
 	mul	w3, w3, w0
-	adrp	x0, .LC202
-	add	x0, x0, :lo12:.LC202
+	adrp	x0, .LC203
+	add	x0, x0, :lo12:.LC203
 	bl	rknand_print_hex
 	adrp	x0, .LANCHOR14
 	ldr	x4, [x29, 104]
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L3024
+	tbz	x0, 10, .L3021
 	ldr	x1, [x22, 24]
 	ldrh	w0, [x23, 22]
 	ldr	x2, [x4]
@@ -18767,13 +18769,13 @@ gc_check_data_one_wl:
 	ldr	w4, [x3, x0]
 	ldp	w5, w6, [x1]
 	ldr	w3, [x2, x0]
-	adrp	x0, .LC203
+	adrp	x0, .LC204
 	ldr	w7, [x1, 8]
-	add	x0, x0, :lo12:.LC203
+	add	x0, x0, :lo12:.LC204
 	ldr	w1, [x22, 40]
 	ldr	w2, [x22, 52]
 	bl	printf
-.L3024:
+.L3021:
 	ldr	x0, [x20, #:lo12:.LANCHOR10]
 	mov	x1, 0
 	ldrh	w0, [x0, 80]
@@ -18783,7 +18785,7 @@ gc_check_data_one_wl:
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x1, lsl 1]
 	mov	w0, -1
-.L3015:
+.L3012:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -18792,43 +18794,43 @@ gc_check_data_one_wl:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 128
 	ret
-.L3019:
+.L3016:
 	cmp	w3, 2
-	bne	.L3021
+	bne	.L3018
 	sub	w0, w0, #1
 	add	w1, w24, w1
 	add	w0, w0, w1
 	orr	w0, w0, 33554432
-	b	.L3040
-.L3021:
+	b	.L3037
+.L3018:
 	add	w0, w0, w1
-	b	.L3040
-.L3023:
+	b	.L3037
+.L3020:
 	ldrh	w0, [x23, 22]
 	add	w24, w24, 1
 	add	w0, w0, 1
 	strh	w0, [x23, 22]
-.L3028:
+.L3025:
 	ldrh	w0, [x23, 20]
 	cmp	w24, w0
-	ble	.L3026
+	ble	.L3023
 	add	w26, w26, 1
 	add	x28, x28, 2
-	b	.L3018
-.L3027:
+	b	.L3015
+.L3024:
 	add	x19, x19, :lo12:.LANCHOR62
 	ldrh	w0, [x19, 16]
 	add	w1, w0, 1
 	strh	w1, [x19, 16]
 	adrp	x1, .LANCHOR104
 	ldrb	w1, [x1, #:lo12:.LANCHOR104]
-	cbz	w1, .L3029
+	cbz	w1, .L3026
 	add	w0, w0, 2
 	strh	w0, [x19, 16]
-.L3029:
-.L3025:
+.L3026:
+.L3022:
 	mov	w0, 0
-	b	.L3015
+	b	.L3012
 	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
 	.section	.text.ftl_update_l2p_map,"ax",@progbits
 	.align	2
@@ -18855,35 +18857,35 @@ ftl_update_l2p_map:
 	add	x1, x19, x23, sxtw 2
 	ldr	w1, [x1, -4]
 	cmn	w1, #1
-	beq	.L3042
+	beq	.L3039
 	adrp	x1, .LANCHOR210
 	adrp	x0, .LC0
-	mov	w2, 1576
+	mov	w2, 1575
 	add	x1, x1, :lo12:.LANCHOR210
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3042:
+.L3039:
 	adrp	x27, .LANCHOR121
 	mov	x24, 0
 	add	x0, x27, :lo12:.LANCHOR121
 	mov	w21, 0
 	str	x0, [x29, 96]
-.L3043:
+.L3040:
 	cmp	w24, w23
-	blt	.L3049
+	blt	.L3046
 	adrp	x0, .LANCHOR14
 	adrp	x19, .LANCHOR9
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3050
+	tbz	x0, 12, .L3047
 	ldrh	w1, [x22]
 	ldr	x2, [x19, #:lo12:.LANCHOR9]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w3, [x2, x0]
-	adrp	x0, .LC207
+	adrp	x0, .LC208
 	mov	w2, w21
-	add	x0, x0, :lo12:.LC207
+	add	x0, x0, :lo12:.LC208
 	bl	printf
-.L3050:
+.L3047:
 	ldrh	w1, [x22]
 	ldr	x0, [x19, #:lo12:.LANCHOR9]
 	ldp	x23, x24, [sp, 48]
@@ -18894,38 +18896,38 @@ ftl_update_l2p_map:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L3049:
+.L3046:
 	ldr	w2, [x19, x24, lsl 2]
 	cmn	w2, #1
-	beq	.L3044
+	beq	.L3041
 	ldrb	w20, [x27, #:lo12:.LANCHOR121]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	lsl	w20, w20, 7
 	udiv	w20, w2, w20
 	and	w20, w20, 65535
-	tbz	x0, 12, .L3045
-	adrp	x0, .LC204
+	tbz	x0, 12, .L3042
+	adrp	x0, .LC205
 	mov	w3, w24
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC204
+	add	x0, x0, :lo12:.LC205
 	bl	printf
-.L3045:
+.L3042:
 	adrp	x25, .LANCHOR105
-	adrp	x26, .LC205
+	adrp	x26, .LC206
 	mov	x28, x24
 	add	x25, x25, :lo12:.LANCHOR105
-	add	x26, x26, :lo12:.LC205
-.L3048:
+	add	x26, x26, :lo12:.LC206
+.L3045:
 	ldr	w1, [x19, x28, lsl 2]
 	cmn	w1, #1
-	beq	.L3046
+	beq	.L3043
 	ldr	x0, [x29, 96]
 	ldrb	w2, [x0]
 	lsl	w2, w2, 7
 	udiv	w1, w1, w2
 	cmp	w20, w1, uxth
-	bne	.L3046
+	bne	.L3043
 	ldrb	w0, [x22, 9]
 	sdiv	w1, w28, w0
 	msub	w0, w1, w0, w28
@@ -18937,15 +18939,15 @@ ftl_update_l2p_map:
 	str	w2, [x29, 124]
 	ldr	w1, [x19, x28, lsl 2]
 	bl	pm_ppa_update_check
-	cbz	w0, .L3047
+	cbz	w0, .L3044
 	ldr	x0, [x29, 104]
 	mov	w3, w23
 	mov	w2, 4
 	ldr	x1, [x0, #:lo12:.LANCHOR111]
-	adrp	x0, .LC206
-	add	x0, x0, :lo12:.LC206
+	adrp	x0, .LC207
+	add	x0, x0, :lo12:.LC207
 	bl	rknand_print_hex
-.L3047:
+.L3044:
 	ldr	w0, [x19, x28, lsl 2]
 	add	w21, w21, 1
 	mov	w2, 1
@@ -18954,13 +18956,13 @@ ftl_update_l2p_map:
 	bl	pm_log2phys
 	mov	w0, -1
 	str	w0, [x19, x28, lsl 2]
-.L3046:
+.L3043:
 	add	x28, x28, 1
 	cmp	w23, w28
-	bgt	.L3048
-.L3044:
+	bgt	.L3045
+.L3041:
 	add	x24, x24, 1
-	b	.L3043
+	b	.L3040
 	.size	ftl_update_l2p_map, .-ftl_update_l2p_map
 	.section	.text.ftl_alloc_new_data_sblk,"ax",@progbits
 	.align	2
@@ -18976,9 +18978,9 @@ ftl_alloc_new_data_sblk:
 	ldrh	w0, [x19]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3072
+	beq	.L3069
 	bl	zftl_insert_data_list
-.L3072:
+.L3069:
 	adrp	x0, .LANCHOR10
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	add	x0, x0, 16
@@ -19010,10 +19012,10 @@ ftl_write_commit:
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-.L3077:
+.L3074:
 	adrp	x2, .LANCHOR57
 	ldrb	w1, [x2, #:lo12:.LANCHOR57]
-	cbz	w1, .L3079
+	cbz	w1, .L3076
 	adrp	x3, .LANCHOR56
 	adrp	x0, .LANCHOR49
 	add	x0, x0, :lo12:.LANCHOR49
@@ -19032,24 +19034,24 @@ ftl_write_commit:
 	mov	x19, x0
 	ldr	w1, [x0, #:lo12:.LANCHOR118]
 	cmp	w2, w1
-	bcc	.L3081
+	bcc	.L3078
 	adrp	x1, .LANCHOR211
 	adrp	x0, .LC0
-	mov	w2, 495
+	mov	w2, 496
 	add	x1, x1, :lo12:.LANCHOR211
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3081:
+.L3078:
 	ldr	x0, [x29, 112]
 	ldr	w1, [x19, #:lo12:.LANCHOR118]
 	add	x0, x23, x0, lsl 6
 	ldr	w22, [x0, 36]
 	cmp	w22, w1
-	bcc	.L3082
+	bcc	.L3079
 	ldr	x0, [x29, 120]
 	bl	buf_free
 	mov	w0, -1
-.L3076:
+.L3073:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -19057,7 +19059,7 @@ ftl_write_commit:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L3082:
+.L3079:
 	ldrb	w21, [x0, 57]
 	ldrb	w20, [x0, 56]
 	ldr	x26, [x0, 8]
@@ -19065,17 +19067,17 @@ ftl_write_commit:
 	adrp	x0, .LANCHOR119
 	str	x0, [x29, 104]
 	ldrb	w1, [x0, #:lo12:.LANCHOR119]
-	cbz	w1, .L3084
-	adrp	x0, .LANCHOR173
-	ldrb	w1, [x0, #:lo12:.LANCHOR173]
+	cbz	w1, .L3081
+	adrp	x0, .LANCHOR172
+	ldrb	w1, [x0, #:lo12:.LANCHOR172]
 	add	x1, x23, x1, lsl 6
-.L3085:
+.L3082:
 	ldrb	w0, [x1]
 	cmp	w0, 255
-	bne	.L3086
+	bne	.L3083
 	ldr	w0, [x1, 36]
 	cmp	w22, w0
-	bne	.L3084
+	bne	.L3081
 	ldr	x0, [x1, 8]
 	ubfiz	x21, x21, 9, 8
 	lsl	w2, w20, 9
@@ -19084,33 +19086,33 @@ ftl_write_commit:
 	bl	ftl_memcpy
 	ldr	x0, [x29, 120]
 	bl	buf_free
-	b	.L3077
-.L3086:
+	b	.L3074
+.L3083:
 	ubfiz	x1, x0, 6, 8
 	add	x1, x23, x1
-	b	.L3085
-.L3084:
+	b	.L3082
+.L3081:
 	mov	w0, w22
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 140]
 	cmn	w0, #1
-	bne	.L3088
+	bne	.L3085
 	mov	w2, 0
 	add	x1, x29, 140
 	mov	w0, w22
 	bl	pm_log2phys
-.L3088:
+.L3085:
 	adrp	x25, .LANCHOR10
 	add	x1, x23, 2
 	mov	w0, 0
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 16
-.L3091:
+.L3088:
 	ldr	w2, [x1, 34]
 	cmp	w22, w2
-	bne	.L3089
+	bne	.L3086
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L3089
+	tbz	x2, 3, .L3086
 	ubfiz	x0, x0, 6, 32
 	and	w2, w2, -9
 	add	x0, x23, x0
@@ -19118,50 +19120,50 @@ ftl_write_commit:
 	ldr	x24, [x0, 8]
 	ldr	w0, [x0, 40]
 	str	w0, [x29, 140]
-.L3090:
+.L3087:
 	adrp	x0, .LANCHOR121
 	str	x0, [x29, 96]
 	ldrb	w1, [x0, #:lo12:.LANCHOR121]
 	cmp	w20, w1
-	bcs	.L3115
+	bcs	.L3112
 	add	w20, w21, w20
-	cbz	x24, .L3093
-	cbz	w21, .L3094
+	cbz	x24, .L3090
+	cbz	w21, .L3091
 	lsl	w2, w21, 9
 	mov	x1, x24
 	mov	x0, x26
 	bl	ftl_memcpy
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 48
-.L3094:
+.L3091:
 	ldr	x0, [x29, 96]
 	ldrb	w2, [x0, #:lo12:.LANCHOR121]
 	cmp	w20, w2
-	bcc	.L3095
+	bcc	.L3092
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 16
-.L3115:
+.L3112:
 	mov	w24, 0
-	b	.L3092
-.L3089:
+	b	.L3089
+.L3086:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 32
-	bne	.L3091
+	bne	.L3088
 	mov	x24, 0
-	b	.L3090
-.L3095:
+	b	.L3087
+.L3092:
 	ubfiz	x0, x20, 9, 9
 	sub	w2, w2, w20
 	add	x1, x24, x0
 	lsl	w2, w2, 9
 	add	x0, x26, x0
 	bl	ftl_memcpy
-	b	.L3115
-.L3093:
+	b	.L3112
+.L3090:
 	ldr	w0, [x29, 140]
 	cmn	w0, #1
-	beq	.L3096
+	beq	.L3093
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 140]
@@ -19174,11 +19176,11 @@ ftl_write_commit:
 	ldr	w0, [x0, 4]
 	add	w24, w24, 1
 	cmp	w22, w0
-	bne	.L3097
+	bne	.L3094
 	ldr	w0, [x27, 52]
 	cmn	w0, #1
-	bne	.L3098
-.L3097:
+	bne	.L3095
+.L3094:
 	ldr	x1, [x25, #:lo12:.LANCHOR10]
 	mov	w3, w22
 	ldr	w4, [x27, 52]
@@ -19186,53 +19188,53 @@ ftl_write_commit:
 	ldr	w0, [x1, 552]
 	add	w0, w0, 1
 	str	w0, [x1, 552]
-	adrp	x0, .LC208
-	add	x0, x0, :lo12:.LC208
+	adrp	x0, .LC209
+	add	x0, x0, :lo12:.LC209
 	ldrb	w1, [x27, 1]
 	bl	printf
 	ldr	x1, [x27, 24]
 	mov	w3, 4
-	adrp	x0, .LC167
+	adrp	x0, .LC168
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC167
+	add	x0, x0, :lo12:.LC168
 	bl	rknand_print_hex
-.L3098:
+.L3095:
 	ldr	x0, [x27, 24]
 	ldr	w0, [x0, 4]
 	cmp	w22, w0
-	bne	.L3099
+	bne	.L3096
 	ldr	w0, [x27, 52]
 	cmn	w0, #1
-	bne	.L3100
-.L3099:
+	bne	.L3097
+.L3096:
 	adrp	x1, .LANCHOR211
 	adrp	x0, .LC0
-	mov	w2, 566
+	mov	w2, 567
 	add	x1, x1, :lo12:.LANCHOR211
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3100:
-	cbz	w21, .L3101
+.L3097:
+	cbz	w21, .L3098
 	ldr	w0, [x29, 140]
 	lsl	w2, w21, 9
 	cmn	w0, #1
-	beq	.L3102
+	beq	.L3099
 	ldr	x1, [x27, 8]
 	mov	x0, x26
 	bl	ftl_memcpy
-.L3103:
+.L3100:
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 48
-.L3101:
+.L3098:
 	ldr	x0, [x29, 96]
 	ldrb	w2, [x0, #:lo12:.LANCHOR121]
 	cmp	w20, w2
-	bcc	.L3104
-	bls	.L3105
+	bcc	.L3101
+	bls	.L3102
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 16
-.L3105:
-	cbz	x27, .L3092
+.L3102:
+	cbz	x27, .L3089
 	ldrb	w0, [x27, 2]
 	mov	x1, x27
 	and	w0, w0, -9
@@ -19242,17 +19244,17 @@ ftl_write_commit:
 	bl	buf_remove_buf
 	mov	x0, x27
 	bl	buf_free
-.L3092:
+.L3089:
 	ldrh	w0, [x19, 6]
-	cbnz	w0, .L3107
+	cbnz	w0, .L3104
 	bl	ftl_flush
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L3107:
+.L3104:
 	mov	x0, x19
 	bl	ftl_get_new_free_page
 	ldr	x1, [x29, 112]
-	adrp	x20, .LANCHOR173
+	adrp	x20, .LANCHOR172
 	lsl	x2, x1, 6
 	add	x1, x23, x2
 	ldr	w3, [x1, 32]
@@ -19273,7 +19275,7 @@ ftl_write_commit:
 	sub	w0, w0, #1
 	strh	w0, [x1, 48]
 	ldr	x1, [x29, 120]
-	add	x0, x20, :lo12:.LANCHOR173
+	add	x0, x20, :lo12:.LANCHOR172
 	bl	buf_add_tail
 	ldr	x0, [x29, 104]
 	ldrb	w2, [x0, #:lo12:.LANCHOR119]
@@ -19284,22 +19286,22 @@ ftl_write_commit:
 	cmp	w2, 2
 	str	wzr, [x0, #:lo12:.LANCHOR212]
 	ldrh	w0, [x19, 6]
-	bhi	.L3108
+	bhi	.L3105
 	cmp	w0, 1
-	bne	.L3080
-.L3108:
+	bne	.L3077
+.L3105:
 	ldrb	w1, [x19, 5]
 	cmp	w1, 0
 	mov	w1, 0
 	cset	w4, ne
 	cmp	w0, 1
-	ldrb	w0, [x20, #:lo12:.LANCHOR173]
+	ldrb	w0, [x20, #:lo12:.LANCHOR172]
 	csinc	w4, w2, w4, eq
 	mov	w3, w0
-.L3112:
+.L3109:
 	cmp	w1, w4
-	bne	.L3113
-	strb	w3, [x20, #:lo12:.LANCHOR173]
+	bne	.L3110
+	strb	w3, [x20, #:lo12:.LANCHOR172]
 	and	w1, w1, 255
 	ldr	x3, [x29, 104]
 	sub	w2, w2, w1
@@ -19309,58 +19311,58 @@ ftl_write_commit:
 	bl	sblk_prog_page
 	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bne	.L3080
+	bne	.L3077
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	mov	x0, x19
 	bl	ftl_write_last_log_page
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L3080:
+.L3077:
 	adrp	x0, .LANCHOR57
 	ldrb	w0, [x0, #:lo12:.LANCHOR57]
-	cbnz	w0, .L3077
-.L3079:
+	cbnz	w0, .L3074
+.L3076:
 	bl	ftl_write_completed
 	mov	w0, 0
-	b	.L3076
-.L3104:
+	b	.L3073
+.L3101:
 	ldr	w0, [x29, 140]
 	sub	w2, w2, w20
 	lsl	w2, w2, 9
 	cmn	w0, #1
 	ubfiz	x0, x20, 7, 9
-	beq	.L3106
+	beq	.L3103
 	ldr	x1, [x27, 8]
 	lsl	x0, x0, 2
 	add	x1, x1, x0
 	add	x0, x26, x0
 	bl	ftl_memcpy
-	b	.L3105
-.L3106:
+	b	.L3102
+.L3103:
 	mov	w1, 0
 	add	x0, x26, x0, lsl 2
 	bl	ftl_memset
-	b	.L3105
-.L3113:
+	b	.L3102
+.L3110:
 	ubfiz	x3, x3, 6, 8
 	add	w1, w1, 1
 	ldrb	w3, [x23, x3]
-	b	.L3112
-.L3114:
+	b	.L3109
+.L3111:
 	lsl	w2, w21, 9
 	mov	x27, 0
 	mov	w24, 0
-.L3102:
+.L3099:
 	mov	w1, 0
 	mov	x0, x26
 	bl	ftl_memset
-	b	.L3103
-.L3096:
-	cbnz	w21, .L3114
+	b	.L3100
+.L3093:
+	cbnz	w21, .L3111
 	mov	w24, 0
 	mov	x27, 0
-	b	.L3101
+	b	.L3098
 	.size	ftl_write_commit, .-ftl_write_commit
 	.section	.text.gc_do_copy_back,"ax",@progbits
 	.align	2
@@ -19377,10 +19379,10 @@ gc_do_copy_back:
 	stp	x23, x24, [sp, 64]
 	stp	x25, x26, [sp, 80]
 	stp	x27, x28, [sp, 96]
-	cbnz	w0, .L3138
+	cbnz	w0, .L3135
 	bl	buf_alloc
 	mov	x19, x0
-	cbz	x0, .L3137
+	cbz	x0, .L3134
 	adrp	x20, .LANCHOR62
 	add	x3, x20, :lo12:.LANCHOR62
 	ldrh	w2, [x3, 26]
@@ -19396,52 +19398,52 @@ gc_do_copy_back:
 	ldr	w0, [x19, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3140
+	bne	.L3137
 	adrp	x1, .LANCHOR213
 	adrp	x0, .LC0
-	mov	w2, 600
+	mov	w2, 601
 	add	x1, x1, :lo12:.LANCHOR213
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3140:
+.L3137:
 	ldr	x0, [x19, 24]
 	ldr	w21, [x0, 4]
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 160]
 	cmn	w0, #1
-	bne	.L3141
+	bne	.L3138
 	mov	w2, 0
 	add	x1, x29, 160
 	mov	w0, w21
 	bl	pm_log2phys
-.L3141:
+.L3138:
 	ldr	w23, [x29, 160]
 	cmp	w22, w23
-	bne	.L3142
+	bne	.L3139
 	adrp	x0, .LANCHOR49
 	add	x0, x0, :lo12:.LANCHOR49
 	add	x1, x0, 2
 	add	x0, x0, 2050
-.L3145:
+.L3142:
 	ldr	w2, [x1, 34]
 	cmp	w21, w2
-	bne	.L3143
+	bne	.L3140
 	ldrb	w2, [x1]
-	tbz	x2, 1, .L3143
+	tbz	x2, 1, .L3140
 	mov	x0, x19
 	bl	buf_free
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3137
+	tbz	x0, 8, .L3134
 	add	x20, x20, :lo12:.LANCHOR62
-	adrp	x0, .LC209
+	adrp	x0, .LC210
 	mov	w2, w22
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC209
+	add	x0, x0, :lo12:.LC210
 	ldrh	w3, [x20, 26]
 	bl	printf
-.L3137:
+.L3134:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -19450,10 +19452,10 @@ gc_do_copy_back:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 224
 	ret
-.L3143:
+.L3140:
 	add	x1, x1, 64
 	cmp	x0, x1
-	bne	.L3145
+	bne	.L3142
 	adrp	x0, .LANCHOR121
 	mov	w1, 10
 	strb	wzr, [x19, 57]
@@ -19468,19 +19470,19 @@ gc_do_copy_back:
 	str	w0, [x19, 32]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3146
+	tbz	x0, 8, .L3143
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	add	x1, x20, :lo12:.LANCHOR62
 	mov	w3, w0
 	mov	w4, w22
-	adrp	x0, .LC210
+	adrp	x0, .LC211
 	mov	w2, w23
-	add	x0, x0, :lo12:.LC210
+	add	x0, x0, :lo12:.LC211
 	ldrh	w5, [x1, 26]
 	mov	w1, w21
 	bl	printf
-.L3146:
+.L3143:
 	mov	x0, x19
 	bl	ftl_gc_write_buf
 	bl	ftl_write_commit
@@ -19493,27 +19495,27 @@ gc_do_copy_back:
 	ldrh	w0, [x20, 28]
 	add	w0, w0, 1
 	strh	w0, [x20, 28]
-	b	.L3137
-.L3142:
+	b	.L3134
+.L3139:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3147
+	tbz	x0, 8, .L3144
 	add	x20, x20, :lo12:.LANCHOR62
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	mov	w3, w0
 	mov	w4, w22
-	adrp	x0, .LC210
+	adrp	x0, .LC211
 	ldrh	w5, [x20, 26]
 	mov	w2, w23
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC210
+	add	x0, x0, :lo12:.LC211
 	bl	printf
-.L3147:
+.L3144:
 	mov	x0, x19
 	bl	buf_free
-	b	.L3137
-.L3138:
+	b	.L3134
+.L3135:
 	adrp	x1, .LANCHOR10
 	adrp	x0, .LANCHOR68
 	stp	x0, x1, [x29, 128]
@@ -19522,10 +19524,10 @@ gc_do_copy_back:
 	ldrb	w25, [x0, #:lo12:.LANCHOR68]
 	add	x22, x22, 80
 	cmp	w25, 3
-	bne	.L3148
+	bne	.L3145
 	adrp	x0, .LANCHOR70
 	ldrb	w0, [x0, #:lo12:.LANCHOR70]
-	cbz	w0, .L3149
+	cbz	w0, .L3146
 	add	x0, x24, :lo12:.LANCHOR62
 	ldrb	w19, [x22, 9]
 	ldrh	w20, [x0, 314]
@@ -19534,7 +19536,7 @@ gc_do_copy_back:
 	sdiv	w21, w20, w21
 	madd	w19, w21, w19, w20
 	and	w19, w19, 65535
-.L3150:
+.L3147:
 	adrp	x1, .LANCHOR72
 	ldrb	w0, [x22, 9]
 	add	x4, x24, :lo12:.LANCHOR62
@@ -19546,13 +19548,13 @@ gc_do_copy_back:
 	adrp	x0, .LANCHOR148
 	ldr	x7, [x0, #:lo12:.LANCHOR148]
 	sub	w3, w3, #1
-.L3153:
+.L3150:
 	cmp	w2, w8
-	blt	.L3155
-.L3182:
+	blt	.L3152
+.L3179:
 	mov	w23, 1
-	b	.L3151
-.L3149:
+	b	.L3148
+.L3146:
 	add	x0, x24, :lo12:.LANCHOR62
 	ldrb	w20, [x22, 9]
 	ldrh	w1, [x0, 314]
@@ -19568,12 +19570,12 @@ gc_do_copy_back:
 	madd	w20, w21, w20, w19
 	add	w20, w20, w20, lsl 1
 	and	w20, w20, 65535
-	beq	.L3150
-.L3151:
+	beq	.L3147
+.L3148:
 	adrp	x0, .LANCHOR14
 	str	x0, [x29, 112]
 	ldr	w1, [x0, #:lo12:.LANCHOR14]
-	tbz	x1, 8, .L3156
+	tbz	x1, 8, .L3153
 	adrp	x0, .LANCHOR148
 	ubfiz	x1, x20, 2, 16
 	mov	w6, w20
@@ -19581,18 +19583,18 @@ gc_do_copy_back:
 	ldr	x2, [x0, #:lo12:.LANCHOR148]
 	add	x0, x24, :lo12:.LANCHOR62
 	ldrh	w4, [x0, 314]
-	adrp	x0, .LC211
+	adrp	x0, .LC212
 	ldr	w5, [x2, x1]
-	add	x0, x0, :lo12:.LC211
+	add	x0, x0, :lo12:.LC212
 	mov	w2, w23
 	mov	w1, w21
 	bl	printf
-.L3156:
+.L3153:
 	adrp	x0, .LANCHOR49
 	str	wzr, [x29, 152]
 	add	x0, x0, :lo12:.LANCHOR49
 	str	x0, [x29, 120]
-.L3157:
+.L3154:
 	ldrb	w2, [x22, 9]
 	ldr	w0, [x29, 152]
 	ldrh	w26, [x29, 152]
@@ -19600,27 +19602,27 @@ gc_do_copy_back:
 	str	w0, [x29, 156]
 	mul	w1, w25, w2
 	cmp	w0, w1
-	blt	.L3169
+	blt	.L3166
 	ldr	x0, [x29, 128]
 	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w0, 3
 	add	x0, x29, 160
-	beq	.L3170
+	beq	.L3167
 	sub	w3, w1, #1
 	mov	w2, 0
-.L3171:
+.L3168:
 	cmp	w2, w3
-	blt	.L3177
+	blt	.L3174
 	ldr	x0, [x0, w3, sxtw 3]
 	mov	w2, -1
 	strb	w2, [x0]
 	ldr	x0, [x29, 160]
 	bl	sblk_prog_page
-	b	.L3176
-.L3148:
+	b	.L3173
+.L3145:
 	adrp	x0, .LANCHOR104
 	ldrb	w0, [x0, #:lo12:.LANCHOR104]
-	cbnz	w0, .L3152
+	cbnz	w0, .L3149
 	add	x0, x24, :lo12:.LANCHOR62
 	ldrb	w19, [x22, 9]
 	mov	w25, 1
@@ -19628,8 +19630,8 @@ gc_do_copy_back:
 	sdiv	w21, w20, w19
 	msub	w19, w21, w19, w20
 	and	w19, w19, 65535
-	b	.L3150
-.L3152:
+	b	.L3147
+.L3149:
 	add	x0, x24, :lo12:.LANCHOR62
 	ldrb	w19, [x22, 9]
 	mov	w25, 2
@@ -19637,28 +19639,28 @@ gc_do_copy_back:
 	sdiv	w21, w20, w19
 	msub	w19, w21, w19, w20
 	and	w19, w19, 65535
-	b	.L3150
-.L3155:
+	b	.L3147
+.L3152:
 	add	w5, w20, w2
 	cmp	w5, w3
-	beq	.L3182
+	beq	.L3179
 	sbfiz	x5, x5, 2, 32
 	ldr	w0, [x7, x5]
 	cmn	w0, #1
-	bne	.L3154
+	bne	.L3151
 	ldrh	w6, [x4, 26]
 	cmp	w6, w10
-	bcs	.L3137
+	bcs	.L3134
 	mov	w0, w6
 	bl	gc_get_src_ppa_from_index
 	add	w6, w6, 1
 	strh	w6, [x4, 26]
 	str	w0, [x7, x5]
-.L3154:
+.L3151:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-	b	.L3153
-.L3169:
+	b	.L3150
+.L3166:
 	ldr	w0, [x29, 156]
 	add	w0, w20, w0
 	str	w0, [x29, 144]
@@ -19667,11 +19669,11 @@ gc_do_copy_back:
 	ldr	x0, [x0, #:lo12:.LANCHOR69]
 	ldrb	w0, [x0, x27]
 	cmp	w0, 255
-	bne	.L3158
+	bne	.L3155
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbnz	x0, .L3159
+	cbnz	x0, .L3156
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	bl	gc_write_completed
@@ -19679,8 +19681,8 @@ gc_do_copy_back:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbz	x0, .L3137
-.L3159:
+	cbz	x0, .L3134
+.L3156:
 	adrp	x0, .LANCHOR69
 	ldrb	w1, [x28, 1]
 	adrp	x5, .LANCHOR72
@@ -19700,7 +19702,7 @@ gc_do_copy_back:
 	mul	w0, w0, w7
 	sub	w0, w0, #1
 	cmp	w1, w0
-	bne	.L3160
+	bne	.L3157
 	adrp	x0, .LANCHOR147
 	adrp	x4, .LANCHOR73
 	stp	x6, x5, [x29, 96]
@@ -19746,7 +19748,7 @@ gc_do_copy_back:
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x0, 132]
 	str	w0, [x6, 8]
-.L3158:
+.L3155:
 	adrp	x0, .LANCHOR69
 	ldr	w5, [x29, 156]
 	add	x1, x29, 160
@@ -19765,7 +19767,7 @@ gc_do_copy_back:
 	strb	w23, [x3, 61]
 	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w0, 3
-	bne	.L3164
+	bne	.L3161
 	udiv	w0, w26, w0
 	adrp	x6, .LANCHOR105
 	ldrh	w6, [x6, #:lo12:.LANCHOR105]
@@ -19783,10 +19785,10 @@ gc_do_copy_back:
 	ldr	x3, [x5, #:lo12:.LANCHOR149]
 	orr	w0, w1, w0, lsl 24
 	str	w0, [x3, x6, lsl 2]
-.L3165:
+.L3162:
 	ldr	x0, [x29, 112]
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3168
+	tbz	x0, 8, .L3165
 	ldr	x0, [x29, 120]
 	ldrb	w4, [x4, x27]
 	ldr	w1, [x29, 156]
@@ -19800,19 +19802,19 @@ gc_do_copy_back:
 	str	w0, [sp, 8]
 	mov	w0, 3
 	udiv	w26, w26, w0
-	adrp	x0, .LC212
-	add	x0, x0, :lo12:.LC212
+	adrp	x0, .LC213
+	add	x0, x0, :lo12:.LC213
 	add	w26, w26, w19
 	str	w26, [sp]
 	ldr	w5, [x2, 40]
 	mov	w2, w23
 	bl	printf
-.L3168:
+.L3165:
 	ldr	w0, [x29, 152]
 	add	w0, w0, 1
 	str	w0, [x29, 152]
-	b	.L3157
-.L3160:
+	b	.L3154
+.L3157:
 	lsl	x0, x27, 2
 	str	x0, [x29, 144]
 	ldr	x0, [x6, #:lo12:.LANCHOR148]
@@ -19825,7 +19827,7 @@ gc_do_copy_back:
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3162
+	bne	.L3159
 	adrp	x0, .LANCHOR99
 	ldr	w1, [x28, 40]
 	ldrh	w4, [x0, #:lo12:.LANCHOR99]
@@ -19844,30 +19846,30 @@ gc_do_copy_back:
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3162
+	bne	.L3159
 	ldr	x0, [x28, 24]
 	mov	w1, -1
 	str	w1, [x0, 4]
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmp	w0, w1, 4, ne
-	bne	.L3162
+	bne	.L3159
 	adrp	x1, .LANCHOR213
 	adrp	x0, .LC0
-	mov	w2, 715
+	mov	w2, 716
 	add	x1, x1, :lo12:.LANCHOR213
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3162:
+.L3159:
 	ldr	x0, [x28, 24]
 	adrp	x1, .LANCHOR118
 	ldr	w1, [x1, #:lo12:.LANCHOR118]
 	ldr	w2, [x0, 4]
 	cmp	w2, w1
-	bcc	.L3163
+	bcc	.L3160
 	mov	w1, -1
 	str	w1, [x0, 4]
-.L3163:
+.L3160:
 	adrp	x1, .LANCHOR147
 	lsl	x3, x27, 2
 	ldr	w2, [x0, 4]
@@ -19875,32 +19877,32 @@ gc_do_copy_back:
 	str	w2, [x1, x3]
 	ldr	w1, [x28, 40]
 	str	w1, [x0, 8]
-	b	.L3158
-.L3164:
+	b	.L3155
+.L3161:
 	cmp	w0, 2
-	bne	.L3166
+	bne	.L3163
 	adrp	x0, .LANCHOR104
 	adrp	x1, .LANCHOR105
 	ldrb	w0, [x0, #:lo12:.LANCHOR104]
-	cbnz	w0, .L3167
+	cbnz	w0, .L3164
 	ldr	w0, [x29, 156]
 	ldrh	w1, [x1, #:lo12:.LANCHOR105]
 	add	w0, w19, w0
 	add	x0, x22, x0, sxtw 1
 	ldrh	w0, [x0, 16]
 	madd	w0, w0, w1, w21
-.L3225:
+.L3222:
 	orr	w0, w0, 33554432
 	str	w0, [x3, 40]
-.L3166:
+.L3163:
 	ldr	x0, [x29, 120]
 	add	x0, x0, x2, lsl 6
 	ldrh	w1, [x0, 48]
 	ldr	w3, [x0, 40]
 	ldr	x0, [x5, #:lo12:.LANCHOR149]
 	str	w3, [x0, x1, lsl 2]
-	b	.L3165
-.L3167:
+	b	.L3162
+.L3164:
 	add	w0, w19, w26, lsr 1
 	ldrh	w1, [x1, #:lo12:.LANCHOR105]
 	add	x0, x22, x0, sxtw 1
@@ -19908,32 +19910,32 @@ gc_do_copy_back:
 	madd	w0, w0, w1, w21
 	and	w1, w26, 1
 	add	w0, w0, w1
-	b	.L3225
-.L3170:
+	b	.L3222
+.L3167:
 	adrp	x1, .LANCHOR70
 	ldrb	w3, [x1, #:lo12:.LANCHOR70]
 	ldr	x1, [x29, 160]
-	cbz	w3, .L3172
-.L3175:
-	strb	wzr, [x1, 60]
-	b	.L3173
+	cbz	w3, .L3169
 .L3172:
+	strb	wzr, [x1, 60]
+	b	.L3170
+.L3169:
 	cmp	w23, 1
-	bne	.L3174
+	bne	.L3171
 	mov	w3, 9
-.L3224:
+.L3221:
 	strb	w3, [x1, 60]
-.L3173:
+.L3170:
 	add	x1, x0, 24
 	bl	sblk_xlc_prog_pages
-.L3176:
+.L3173:
 	adrp	x1, .LANCHOR70
 	ldrb	w3, [x22, 9]
 	ldrb	w1, [x1, #:lo12:.LANCHOR70]
 	and	w0, w3, 65535
-	cbz	w1, .L3178
+	cbz	w1, .L3175
 	add	w0, w0, w0, lsl 1
-.L3179:
+.L3176:
 	adrp	x1, .LANCHOR97
 	add	x24, x24, :lo12:.LANCHOR62
 	ldr	x1, [x1, #:lo12:.LANCHOR97]
@@ -19948,34 +19950,34 @@ gc_do_copy_back:
 	ldrh	w1, [x1, #:lo12:.LANCHOR72]
 	mul	w1, w1, w3
 	cmp	w0, w1
-	blt	.L3180
+	blt	.L3177
 	ldr	x0, [x29, 136]
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	strh	wzr, [x0, 86]
-.L3180:
+.L3177:
 	bl	gc_write_completed
-	b	.L3137
-.L3174:
+	b	.L3134
+.L3171:
 	cmp	w23, 2
-	bne	.L3175
+	bne	.L3172
 	mov	w3, 13
-	b	.L3224
-.L3177:
+	b	.L3221
+.L3174:
 	ldr	x4, [x0, w2, sxtw 3]
 	add	w2, w2, 1
 	ldr	x5, [x0, w2, sxtw 3]
 	and	w2, w2, 65535
 	ldrb	w5, [x5, 1]
 	strb	w5, [x4]
-	b	.L3171
-.L3178:
+	b	.L3168
+.L3175:
 	adrp	x1, .LANCHOR104
 	ldrb	w2, [x1, #:lo12:.LANCHOR104]
 	mov	w1, w0
 	ubfiz	w0, w0, 1, 15
 	cmp	w2, 0
 	csel	w0, w0, w1, ne
-	b	.L3179
+	b	.L3176
 	.size	gc_do_copy_back, .-gc_do_copy_back
 	.section	.text.zftl_do_gc,"ax",@progbits
 	.align	2
@@ -20000,35 +20002,35 @@ zftl_do_gc:
 	stp	x27, x28, [sp, 96]
 	ldr	x24, [x23, #:lo12:.LANCHOR10]
 	cmp	w1, 6
-	bhi	.L3333
+	bhi	.L3330
 	mov	w26, w0
 	and	w21, w21, 65535
-	adrp	x0, .L3229
-	add	x0, x0, :lo12:.L3229
+	adrp	x0, .L3226
+	add	x0, x0, :lo12:.L3226
 	ldrh	w0, [x0,w1,uxtw #1]
-	adr	x1, .Lrtx3229
+	adr	x1, .Lrtx3226
 	add	x0, x1, w0, sxth #2
 	br	x0
-.Lrtx3229:
+.Lrtx3226:
 	.section	.rodata.zftl_do_gc,"a",@progbits
 	.align	0
 	.align	2
-.L3229:
-	.2byte	(.L3228 - .Lrtx3229) / 4
-	.2byte	(.L3230 - .Lrtx3229) / 4
-	.2byte	(.L3231 - .Lrtx3229) / 4
-	.2byte	(.L3232 - .Lrtx3229) / 4
-	.2byte	(.L3233 - .Lrtx3229) / 4
-	.2byte	(.L3234 - .Lrtx3229) / 4
-	.2byte	(.L3235 - .Lrtx3229) / 4
+.L3226:
+	.2byte	(.L3225 - .Lrtx3226) / 4
+	.2byte	(.L3227 - .Lrtx3226) / 4
+	.2byte	(.L3228 - .Lrtx3226) / 4
+	.2byte	(.L3229 - .Lrtx3226) / 4
+	.2byte	(.L3230 - .Lrtx3226) / 4
+	.2byte	(.L3231 - .Lrtx3226) / 4
+	.2byte	(.L3232 - .Lrtx3226) / 4
 	.section	.text.zftl_do_gc
-.L3234:
+.L3231:
 	adrp	x20, .LANCHOR62
 	add	x24, x20, :lo12:.LANCHOR62
 	mov	w22, 0
-.L3236:
+.L3233:
 	bl	gc_check_data_one_wl
-	cbz	w0, .L3329
+	cbz	w0, .L3326
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	add	x20, x20, :lo12:.LANCHOR62
 	strh	wzr, [x20, 56]
@@ -20045,8 +20047,8 @@ zftl_do_gc:
 	bl	buf_free
 	strb	wzr, [x19, #:lo12:.LANCHOR145]
 	str	xzr, [x20, 8]
-	b	.L3397
-.L3228:
+	b	.L3394
+.L3225:
 	adrp	x0, .LANCHOR92
 	adrp	x28, .LANCHOR85
 	adrp	x27, .LANCHOR83
@@ -20060,16 +20062,16 @@ zftl_do_gc:
 	mov	w0, 65535
 	and	w25, w25, 65535
 	cmp	w1, w0
-	beq	.L3237
-	cbnz	w26, .L3238
+	beq	.L3234
+	cbnz	w26, .L3235
 	adrp	x0, .LANCHOR74
 	ldrh	w0, [x0, #:lo12:.LANCHOR74]
 	cmp	w21, w0, lsl 1
-	blt	.L3238
-.L3333:
+	blt	.L3235
+.L3330:
 	mov	w20, 16
-	b	.L3226
-.L3238:
+	b	.L3223
+.L3235:
 	adrp	x5, .LANCHOR82
 	mov	w1, 5
 	adrp	x26, .LANCHOR71
@@ -20081,7 +20083,7 @@ zftl_do_gc:
 	and	w3, w0, 65535
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L3239
+	beq	.L3236
 	adrp	x4, .LANCHOR9
 	ubfiz	x3, x3, 1, 16
 	adrp	x1, .LANCHOR146
@@ -20094,120 +20096,120 @@ zftl_do_gc:
 	adrp	x4, .LANCHOR80
 	ldrh	w4, [x4, #:lo12:.LANCHOR80]
 	cmp	w4, w3
-	bcs	.L3240
+	bcs	.L3237
 	adrp	x1, .LANCHOR6
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	cmp	w2, w1, lsr 4
-	bls	.L3239
+	bls	.L3236
 	adrp	x1, .LANCHOR86
 	ldrh	w1, [x1, #:lo12:.LANCHOR86]
 	cmp	w1, w3
-	bls	.L3239
-.L3240:
+	bls	.L3236
+.L3237:
 	ldrb	w2, [x26, #:lo12:.LANCHOR71]
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L3241
+	cbz	w0, .L3238
 	mov	w0, 1
 	str	wzr, [x20, #:lo12:.LANCHOR146]
 	strb	w0, [x19, #:lo12:.LANCHOR145]
-	b	.L3333
-.L3239:
+	b	.L3330
+.L3236:
 	strh	wzr, [x5, #:lo12:.LANCHOR82]
-.L3241:
+.L3238:
 	cmp	w22, 15
-	bls	.L3335
+	bls	.L3332
 	adrp	x0, .LANCHOR87
 	ldrh	w1, [x0, #:lo12:.LANCHOR87]
 	adrp	x0, .LANCHOR88
 	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w1, w0
-	bhi	.L3335
+	bhi	.L3332
 	cmp	w25, 0
 	cset	w20, eq
 	add	w20, w20, 1
-.L3242:
+.L3239:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3243
+	tbz	x0, 8, .L3240
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	mov	w4, w22
 	ldrb	w2, [x26, #:lo12:.LANCHOR71]
 	mov	w3, w21
-	mov	w1, 1853
+	mov	w1, 1856
 	ldrh	w7, [x0, 122]
 	ldrh	w6, [x0, 120]
 	ldrh	w5, [x0, 124]
 	ldrh	w0, [x24, 80]
 	str	w0, [sp]
-	adrp	x0, .LC213
-	add	x0, x0, :lo12:.LC213
+	adrp	x0, .LC214
+	add	x0, x0, :lo12:.LC214
 	bl	printf
-.L3243:
+.L3240:
 	ldrb	w0, [x26, #:lo12:.LANCHOR71]
 	mov	w2, 1
 	mov	w1, w20
 	bl	gc_search_src_blk
 	cmp	w0, 0
-	ble	.L3244
-.L3245:
+	ble	.L3241
+.L3242:
 	mov	w0, 1
-.L3399:
+.L3396:
 	strb	w0, [x19, #:lo12:.LANCHOR145]
-	b	.L3333
-.L3335:
+	b	.L3330
+.L3332:
 	mov	w20, 2
-	b	.L3242
-.L3244:
+	b	.L3239
+.L3241:
 	ldrb	w0, [x26, #:lo12:.LANCHOR71]
 	mov	w2, 1
 	mov	w1, 3
 	bl	gc_search_src_blk
 	cmp	w0, 0
-	bgt	.L3245
-	b	.L3333
-.L3237:
+	bgt	.L3242
+	b	.L3330
+.L3234:
 	cmp	w26, 1
-	bne	.L3247
+	bne	.L3244
 	bl	gc_scan_static_data
 	adrp	x24, .LANCHOR71
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	ldrh	w0, [x0, 122]
-	cbz	w0, .L3248
-.L3249:
+	cbz	w0, .L3245
+.L3246:
 	mov	w0, 1
 	strb	w0, [x24, #:lo12:.LANCHOR71]
-	b	.L3399
-.L3248:
+	b	.L3396
+.L3245:
 	bl	gc_static_wearleveling
 	mov	w20, w0
-	cbnz	w0, .L3249
-	cbnz	w22, .L3250
-.L3254:
-	mov	w20, 16
+	cbnz	w0, .L3246
+	cbnz	w22, .L3247
 .L3251:
+	mov	w20, 16
+.L3248:
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	adrp	x3, .LANCHOR71
 	mov	w1, 1
 	mov	x23, x3
 	strb	w1, [x3, #:lo12:.LANCHOR71]
 	ldrh	w5, [x0, 124]
-	cbz	w5, .L3259
+	cbz	w5, .L3256
 	strb	w1, [x19, #:lo12:.LANCHOR145]
 	adrp	x1, .LANCHOR14
 	strb	wzr, [x3, #:lo12:.LANCHOR71]
 	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 8, .L3226
+	tbz	x1, 8, .L3223
 	ldrh	w7, [x0, 122]
 	mov	w4, w22
 	ldrh	w6, [x0, 120]
 	mov	w3, w21
-	adrp	x0, .LC214
+	adrp	x0, .LC215
 	mov	w2, 0
-	mov	w1, 1951
-	add	x0, x0, :lo12:.LC214
+	mov	w1, 1954
+	add	x0, x0, :lo12:.LC215
 	bl	printf
-.L3226:
+.L3223:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
@@ -20217,25 +20219,25 @@ zftl_do_gc:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 128
 	ret
-.L3250:
+.L3247:
 	cmp	w21, w25
 	adrp	x1, .LANCHOR87
 	adrp	x2, .LANCHOR84
-	bcs	.L3252
+	bcs	.L3249
 	ldrh	w0, [x2, #:lo12:.LANCHOR84]
 	cmp	w21, w0, lsl 1
-	blt	.L3253
-.L3252:
+	blt	.L3250
+.L3249:
 	ldrh	w2, [x2, #:lo12:.LANCHOR84]
 	add	w0, w21, w25
 	cmp	w0, w2, lsl 1
-	blt	.L3253
+	blt	.L3250
 	adrp	x0, .LANCHOR88
 	ldrh	w2, [x1, #:lo12:.LANCHOR87]
 	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w2, w0
-	bcc	.L3254
-.L3253:
+	bcc	.L3251
+.L3250:
 	adrp	x5, .LANCHOR146
 	adrp	x2, .LANCHOR6
 	mov	w6, 1
@@ -20245,17 +20247,17 @@ zftl_do_gc:
 	add	w0, w0, 1
 	str	w0, [x5, #:lo12:.LANCHOR146]
 	cmp	w0, w2, lsr 5
-	bls	.L3255
+	bls	.L3252
 	ldrh	w0, [x1, #:lo12:.LANCHOR87]
 	cmp	w0, w22
-	bls	.L3255
+	bls	.L3252
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3254
+	beq	.L3251
 	adrp	x1, .LANCHOR9
 	ubfiz	x0, x0, 1, 16
 	adrp	x2, .LANCHOR73
@@ -20266,82 +20268,82 @@ zftl_do_gc:
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	bgt	.L3254
+	bgt	.L3251
 	mov	w0, w6
 	str	wzr, [x5, #:lo12:.LANCHOR146]
 	mov	w2, 4
 	mov	w1, 2
-.L3387:
+.L3384:
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-	cbz	w0, .L3254
-	b	.L3245
-.L3255:
+	cbz	w0, .L3251
+	b	.L3242
+.L3252:
 	adrp	x0, .LANCHOR88
 	ldrh	w1, [x1, #:lo12:.LANCHOR87]
 	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w1, w0
-	bcc	.L3257
+	bcc	.L3254
 	mov	w2, 1
 	mov	w1, 2
 	mov	w0, w2
-	b	.L3387
-.L3257:
+	b	.L3384
+.L3254:
 	ldrh	w0, [x28, #:lo12:.LANCHOR85]
-	cbnz	w0, .L3258
+	cbnz	w0, .L3255
 	ldrh	w0, [x27, #:lo12:.LANCHOR83]
 	cmp	w0, 8
-	bls	.L3251
-.L3258:
+	bls	.L3248
+.L3255:
 	mov	w1, 1
 	mov	w2, 4
 	mov	w0, w1
-	b	.L3387
-.L3247:
+	b	.L3384
+.L3244:
 	adrp	x0, .LANCHOR74
 	ldrh	w0, [x0, #:lo12:.LANCHOR74]
 	cmp	w0, w21
-	bcc	.L3333
-	b	.L3254
-.L3259:
+	bcc	.L3330
+	b	.L3251
+.L3256:
 	adrp	x2, .LANCHOR74
 	mov	x24, x2
 	ldrh	w4, [x2, #:lo12:.LANCHOR74]
 	cmp	w21, w4
-	bcs	.L3260
-	cbz	w22, .L3261
+	bcs	.L3257
+	cbz	w22, .L3258
 	cmp	w22, 16
-	bls	.L3262
+	bls	.L3259
 	adrp	x0, .LANCHOR87
 	ldrh	w2, [x0, #:lo12:.LANCHOR87]
 	adrp	x0, .LANCHOR88
 	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w2, w0
-	bhi	.L3262
+	bhi	.L3259
 	str	x3, [x29, 104]
 	mov	w2, 4
 	mov	w0, w1
 	bl	gc_search_src_blk
 	ldr	x3, [x29, 104]
 	tst	w0, 65535
-	bne	.L3263
+	bne	.L3260
 	ldrb	w0, [x3, #:lo12:.LANCHOR71]
 	mov	w2, 4
 	mov	w1, 3
-.L3389:
+.L3386:
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-.L3264:
-	cbnz	w0, .L3266
-	b	.L3226
-.L3263:
+.L3261:
+	cbnz	w0, .L3263
+	b	.L3223
+.L3260:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	and	w3, w0, 65535
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L3266
+	beq	.L3263
 	adrp	x4, .LANCHOR9
 	ubfiz	x3, x3, 1, 16
 	adrp	x1, .LANCHOR146
@@ -20354,16 +20356,16 @@ zftl_do_gc:
 	adrp	x4, .LANCHOR80
 	ldrh	w4, [x4, #:lo12:.LANCHOR80]
 	cmp	w4, w3
-	bcs	.L3267
+	bcs	.L3264
 	adrp	x1, .LANCHOR6
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	cmp	w2, w1, lsr 4
-	bls	.L3266
+	bls	.L3263
 	adrp	x1, .LANCHOR86
 	ldrh	w1, [x1, #:lo12:.LANCHOR86]
 	cmp	w1, w3
-	bls	.L3266
-.L3267:
+	bls	.L3263
+.L3264:
 	ldrb	w2, [x23, #:lo12:.LANCHOR71]
 	mov	w1, 0
 	bl	gc_add_sblk
@@ -20371,67 +20373,67 @@ zftl_do_gc:
 	adrp	x0, .LANCHOR116
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR116]
-.L3266:
+.L3263:
 	mov	w0, 1
 	strb	w0, [x19, #:lo12:.LANCHOR145]
-	b	.L3226
-.L3262:
+	b	.L3223
+.L3259:
 	mov	w2, 1
 	mov	w0, w2
 	mov	w1, 2
-.L3396:
+.L3393:
 	bl	gc_search_src_blk
 	tst	w0, 65535
-	bne	.L3266
+	bne	.L3263
 	mov	w2, 2
-.L3392:
+.L3389:
 	mov	w1, 3
 	ldrb	w0, [x23, #:lo12:.LANCHOR71]
-	b	.L3389
-.L3261:
+	b	.L3386
+.L3258:
 	adrp	x1, .LANCHOR14
 	strb	wzr, [x3, #:lo12:.LANCHOR71]
 	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 8, .L3269
+	tbz	x1, 8, .L3266
 	ldrh	w7, [x0, 122]
 	mov	w5, 0
 	ldrh	w6, [x0, 120]
 	mov	w4, 0
-	adrp	x0, .LC214
+	adrp	x0, .LC215
 	mov	w3, w21
 	mov	w2, 0
-	mov	w1, 1981
-	add	x0, x0, :lo12:.LC214
+	mov	w1, 1984
+	add	x0, x0, :lo12:.LC215
 	bl	printf
-.L3269:
+.L3266:
 	cmp	w21, 16
-	bls	.L3270
+	bls	.L3267
 	mov	w2, 4
-	b	.L3392
-.L3270:
+	b	.L3389
+.L3267:
 	mov	w2, 1
 	ldrb	w0, [x23, #:lo12:.LANCHOR71]
 	mov	w1, w2
-	b	.L3396
-.L3260:
+	b	.L3393
+.L3257:
 	cmp	w26, 1
-	bne	.L3226
+	bne	.L3223
 	cmp	w21, w4, lsl 1
-	bge	.L3271
+	bge	.L3268
 	cmp	w25, w22, lsr 1
-	bcs	.L3272
+	bcs	.L3269
 	adrp	x0, .LANCHOR87
 	ldrh	w1, [x0, #:lo12:.LANCHOR87]
 	adrp	x0, .LANCHOR88
 	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w1, w0
-	bcs	.L3272
+	bcs	.L3269
 	adrp	x0, .LANCHOR84
 	ldrh	w0, [x0, #:lo12:.LANCHOR84]
 	lsr	w0, w0, 2
 	strh	w0, [x2, #:lo12:.LANCHOR74]
-	b	.L3226
-.L3272:
+	b	.L3223
+.L3269:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
@@ -20439,21 +20441,21 @@ zftl_do_gc:
 	mov	w1, 65535
 	mov	w3, w26
 	cmp	w26, w1
-	bne	.L3273
-.L3278:
-	cmp	w22, 1
-	bhi	.L3274
+	bne	.L3270
 .L3275:
+	cmp	w22, 1
+	bhi	.L3271
+.L3272:
 	cmp	w21, w25
 	adrp	x21, .LANCHOR84
-	bcs	.L3282
+	bcs	.L3279
 	strb	wzr, [x23, #:lo12:.LANCHOR71]
 	mov	w0, 4
 	bl	zftl_get_gc_node.part.9
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3282
+	beq	.L3279
 	adrp	x1, .LANCHOR9
 	ubfiz	x0, x0, 1, 16
 	adrp	x2, .LANCHOR73
@@ -20464,13 +20466,13 @@ zftl_do_gc:
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	mul	w0, w0, w2
 	cmp	w1, w0, lsr 1
-	ble	.L3284
-.L3282:
+	ble	.L3281
+.L3279:
 	ldrh	w0, [x21, #:lo12:.LANCHOR84]
 	lsr	w0, w0, 2
 	strh	w0, [x24, #:lo12:.LANCHOR74]
-	b	.L3226
-.L3273:
+	b	.L3223
+.L3270:
 	adrp	x2, .LANCHOR146
 	adrp	x4, .LANCHOR6
 	uxtw	x26, w26
@@ -20480,14 +20482,14 @@ zftl_do_gc:
 	str	w1, [x2, #:lo12:.LANCHOR146]
 	cmp	w1, w4, lsr 4
 	adrp	x4, .LANCHOR9
-	bls	.L3276
+	bls	.L3273
 	ldr	x1, [x4, #:lo12:.LANCHOR9]
 	str	wzr, [x2, #:lo12:.LANCHOR146]
 	ldrh	w2, [x1, x26, lsl 1]
 	adrp	x1, .LANCHOR86
 	ldrh	w1, [x1, #:lo12:.LANCHOR86]
 	cmp	w2, w1
-	bcs	.L3276
+	bcs	.L3273
 	str	x4, [x29, 96]
 	mov	w2, 1
 	str	w3, [x29, 104]
@@ -20495,167 +20497,167 @@ zftl_do_gc:
 	bl	gc_add_sblk
 	ldr	w3, [x29, 104]
 	ldr	x4, [x29, 96]
-	cbnz	w0, .L3266
-.L3276:
+	cbnz	w0, .L3263
+.L3273:
 	ldr	x0, [x4, #:lo12:.LANCHOR9]
 	ldrh	w1, [x0, x26, lsl 1]
 	adrp	x0, .LANCHOR80
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w1, w0, lsr 1
-	bhi	.L3277
+	bhi	.L3274
 	mov	w2, 0
 	mov	w1, 1
 	mov	w0, w3
 	bl	gc_add_sblk
-	b	.L3266
-.L3277:
+	b	.L3263
+.L3274:
 	ldrh	w2, [x27, #:lo12:.LANCHOR83]
 	ldrh	w0, [x28, #:lo12:.LANCHOR85]
 	add	w0, w0, w2
 	adrp	x2, .LANCHOR84
 	ldrh	w2, [x2, #:lo12:.LANCHOR84]
 	cmp	w0, w2, lsl 1
-	ble	.L3278
+	ble	.L3275
 	adrp	x0, .LANCHOR86
 	ldrh	w0, [x0, #:lo12:.LANCHOR86]
 	cmp	w0, w1
-	bcc	.L3275
-	b	.L3278
-.L3274:
+	bcc	.L3272
+	b	.L3275
+.L3271:
 	mov	w1, 1
 	strb	w1, [x23, #:lo12:.LANCHOR71]
 	cmp	w22, 16
-	bls	.L3279
+	bls	.L3276
 	adrp	x0, .LANCHOR87
 	ldrh	w2, [x0, #:lo12:.LANCHOR87]
 	adrp	x0, .LANCHOR88
 	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w2, w0
-	bhi	.L3279
+	bhi	.L3276
 	mov	w2, 4
 	mov	w0, w1
 	bl	gc_search_src_blk
 	ands	w0, w0, 65535
-	bne	.L3280
+	bne	.L3277
 	mov	w2, 4
-.L3388:
+.L3385:
 	ldrb	w0, [x23, #:lo12:.LANCHOR71]
 	mov	w1, 3
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-.L3280:
+.L3277:
 	adrp	x1, .LANCHOR84
 	cmp	w21, w25, lsr 1
 	ldrh	w1, [x1, #:lo12:.LANCHOR84]
-	bls	.L3390
+	bls	.L3387
 	lsr	w1, w1, 2
-.L3391:
+.L3388:
 	strh	w1, [x24, #:lo12:.LANCHOR74]
-	b	.L3264
-.L3279:
+	b	.L3261
+.L3276:
 	mov	w2, 1
 	mov	w1, 2
 	mov	w0, w2
 	bl	gc_search_src_blk
 	ands	w0, w0, 65535
-	bne	.L3280
+	bne	.L3277
 	mov	w2, 2
-	b	.L3388
-.L3284:
+	b	.L3385
+.L3281:
 	mov	w1, 3
 	mov	w2, 4
 	mov	w0, 0
 	bl	gc_search_src_blk
 	ldrh	w1, [x21, #:lo12:.LANCHOR84]
 	and	w0, w0, 65535
-.L3390:
+.L3387:
 	lsr	w1, w1, 1
-	b	.L3391
-.L3271:
+	b	.L3388
+.L3268:
 	adrp	x0, .LANCHOR84
 	mov	w20, 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR84]
 	lsr	w0, w0, 2
 	strh	w0, [x2, #:lo12:.LANCHOR74]
-	b	.L3226
-.L3230:
+	b	.L3223
+.L3227:
 	adrp	x7, .LANCHOR62
 	mov	w0, 65535
 	ldrh	w1, [x7, #:lo12:.LANCHOR62]
 	cmp	w1, w0
-	bne	.L3285
+	bne	.L3282
 	bl	gc_get_src_blk
 	strh	w0, [x7, #:lo12:.LANCHOR62]
-.L3285:
+.L3282:
 	ldrh	w3, [x7, #:lo12:.LANCHOR62]
 	mov	w0, 65535
 	add	x1, x7, :lo12:.LANCHOR62
 	cmp	w3, w0
-	beq	.L3398
+	beq	.L3395
 	adrp	x0, .LANCHOR7
 	ldrh	w5, [x1, 56]
 	uxtw	x4, w3
 	ldr	x2, [x0, #:lo12:.LANCHOR7]
 	add	x2, x2, x4, lsl 2
-	cbz	w5, .L3287
+	cbz	w5, .L3284
 	add	x1, x1, 58
 	mov	w0, 0
-.L3289:
+.L3286:
 	ldrh	w6, [x1], 2
 	cmp	w6, w3
-	bne	.L3288
-.L3293:
+	bne	.L3285
+.L3290:
 	adrp	x0, .LANCHOR62
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR62]
-	b	.L3333
-.L3288:
+	b	.L3330
+.L3285:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w5, w0
-	bne	.L3289
-.L3287:
+	bne	.L3286
+.L3284:
 	ldrb	w0, [x2, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L3290
+	beq	.L3287
 	tst	w0, 192
-	bne	.L3291
-.L3290:
+	bne	.L3288
+.L3287:
 	adrp	x0, .LANCHOR9
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, x4, lsl 1]
-	cbz	w0, .L3293
-	mov	w2, 2214
+	cbz	w0, .L3290
+	mov	w2, 2217
 	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3293
-.L3291:
+	b	.L3290
+.L3288:
 	mov	w0, 2
-	b	.L3399
-.L3231:
+	b	.L3396
+.L3228:
 	bl	gc_scan_src_blk
 	cmn	w0, #1
-	bne	.L3294
+	bne	.L3291
 	mov	w0, 3
-	b	.L3399
-.L3294:
+	b	.L3396
+.L3291:
 	adrp	x20, .LANCHOR62
 	mov	w2, 65535
 	add	x0, x20, :lo12:.LANCHOR62
 	ldrh	w1, [x20, #:lo12:.LANCHOR62]
 	cmp	w1, w2
-	beq	.L3245
+	beq	.L3242
 	ldrh	w2, [x0, 24]
-	cbz	w2, .L3295
+	cbz	w2, .L3292
 	mov	w1, 4
 	strh	wzr, [x0, 26]
 	strb	w1, [x19, #:lo12:.LANCHOR145]
-	b	.L3333
-.L3295:
+	b	.L3330
+.L3292:
 	mov	w0, 1
 	strb	w0, [x19, #:lo12:.LANCHOR145]
 	adrp	x0, .LANCHOR9
@@ -20663,14 +20665,14 @@ zftl_do_gc:
 	mov	x19, x0
 	ldr	x2, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L3296
+	cbz	w1, .L3293
 	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
-	mov	w2, 2242
+	mov	w2, 2245
 	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3296:
+.L3293:
 	ldrh	w0, [x20, #:lo12:.LANCHOR62]
 	add	x21, x20, :lo12:.LANCHOR62
 	bl	ftl_free_sblk
@@ -20681,70 +20683,70 @@ zftl_do_gc:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w0, 8
-	bhi	.L3297
+	bhi	.L3294
 	strh	w0, [x21, 30]
-	b	.L3293
-.L3297:
+	b	.L3290
+.L3294:
 	strh	wzr, [x21, 30]
 	bl	ftl_flush
 	bl	pm_flush
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L3293
-.L3232:
+	b	.L3290
+.L3229:
 	adrp	x20, .LANCHOR62
 	adrp	x23, .LANCHOR80
 	add	x22, x20, :lo12:.LANCHOR62
 	add	x23, x23, :lo12:.LANCHOR80
-.L3368:
+.L3365:
 	bl	gc_scan_src_blk_one_page
 	ldrh	w1, [x22, 2]
 	ldrh	w0, [x23]
 	cmp	w1, w0
-	bcs	.L3299
+	bcs	.L3296
 	cmp	w21, 7
-	bls	.L3368
-	b	.L3333
-.L3299:
+	bls	.L3365
+	b	.L3330
+.L3296:
 	ldrh	w3, [x22, 24]
 	adrp	x0, .LANCHOR14
-	cbz	w3, .L3300
+	cbz	w3, .L3297
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	mov	w1, 4
 	strh	wzr, [x22, 26]
 	strb	w1, [x19, #:lo12:.LANCHOR145]
 	adrp	x19, .LANCHOR9
-	tbz	x0, 8, .L3301
+	tbz	x0, 8, .L3298
 	ldrh	w1, [x22]
 	ldr	x2, [x19, #:lo12:.LANCHOR9]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC215
-	add	x0, x0, :lo12:.LC215
+	adrp	x0, .LC216
+	add	x0, x0, :lo12:.LC216
 	bl	printf
-.L3301:
+.L3298:
 	ldrh	w2, [x20, #:lo12:.LANCHOR62]
 	add	x0, x20, :lo12:.LANCHOR62
 	ldr	x1, [x19, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, 24]
 	ldrh	w1, [x1, x2, lsl 1]
 	cmp	w1, w0
-	beq	.L3302
+	beq	.L3299
 	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
-	mov	w2, 2276
+	mov	w2, 2279
 	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3302:
+.L3299:
 	add	x0, x20, :lo12:.LANCHOR62
 	ldrh	w1, [x20, #:lo12:.LANCHOR62]
 	ldrh	w2, [x0, 24]
 	ldr	x0, [x19, #:lo12:.LANCHOR9]
 	strh	w2, [x0, x1, lsl 1]
-	b	.L3333
-.L3300:
+	b	.L3330
+.L3297:
 	adrp	x2, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	ldrh	w1, [x22]
@@ -20752,27 +20754,27 @@ zftl_do_gc:
 	mov	w2, 1
 	strb	w2, [x19, #:lo12:.LANCHOR145]
 	add	x21, x21, x1, uxth 2
-	tbz	x0, 8, .L3303
+	tbz	x0, 8, .L3300
 	ldrb	w2, [x21, 2]
-	adrp	x0, .LC216
-	add	x0, x0, :lo12:.LC216
+	adrp	x0, .LC217
+	add	x0, x0, :lo12:.LC217
 	ubfx	x2, x2, 5, 3
 	bl	printf
-.L3303:
+.L3300:
 	ldrb	w0, [x21, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L3304
+	beq	.L3301
 	tst	w0, 192
-	bne	.L3305
-.L3304:
+	bne	.L3302
+.L3301:
 	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
-	mov	w2, 2286
+	mov	w2, 2289
 	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3305:
+.L3302:
 	ldrh	w0, [x20, #:lo12:.LANCHOR62]
 	add	x19, x20, :lo12:.LANCHOR62
 	bl	ftl_free_sblk
@@ -20782,56 +20784,56 @@ zftl_do_gc:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w0, 8
-	bhi	.L3306
+	bhi	.L3303
 	strh	w0, [x19, 30]
-	b	.L3333
-.L3306:
+	b	.L3330
+.L3303:
 	strh	wzr, [x19, 30]
-.L3397:
+.L3394:
 	bl	flt_sys_flush
-	b	.L3333
-.L3233:
+	b	.L3330
+.L3230:
 	ldrh	w1, [x24, 80]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L3307
+	bne	.L3304
 	adrp	x0, .LANCHOR71
 	ldrb	w22, [x0, #:lo12:.LANCHOR71]
 	cmp	w22, 1
-	bne	.L3307
+	bne	.L3304
 	bl	ftl_flush
 	adrp	x0, .LANCHOR62
 	add	x1, x0, :lo12:.LANCHOR62
 	mov	x20, x0
 	ldrh	w1, [x1, 318]
-	cbz	w1, .L3308
+	cbz	w1, .L3305
 	mov	w0, w22
 	mov	w1, 5
-.L3394:
+.L3391:
 	bl	zftl_gc_get_free_sblk
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L3310
+	beq	.L3307
 	adrp	x0, .LANCHOR7
 	ldr	x21, [x0, #:lo12:.LANCHOR7]
 	add	x21, x21, x19, uxth 2
 	ldrb	w0, [x21, 2]
 	tst	w0, 224
-	beq	.L3311
+	beq	.L3308
 	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
-	mov	w2, 2315
+	mov	w2, 2318
 	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3311:
+.L3308:
 	ldrb	w0, [x21, 2]
 	mov	w1, 5
 	bfi	w0, w1, 5, 3
 	orr	w0, w0, 16
 	strb	w0, [x21, 2]
-.L3332:
+.L3329:
 	mov	w1, 1
 	mov	w0, w19
 	bl	ftl_erase_sblk
@@ -20894,12 +20896,12 @@ zftl_do_gc:
 	strh	wzr, [x0, 320]
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L3333
-.L3308:
+	b	.L3330
+.L3305:
 	mov	w1, 5
 	mov	w0, 0
-	b	.L3394
-.L3307:
+	b	.L3391
+.L3304:
 	cmp	w26, 1
 	mov	w22, 4
 	csinc	w22, w22, wzr, eq
@@ -20912,24 +20914,24 @@ zftl_do_gc:
 	add	x25, x25, :lo12:.LANCHOR71
 	add	x20, x21, :lo12:.LANCHOR62
 	add	x26, x24, 80
-.L3314:
+.L3311:
 	sub	w22, w22, #1
 	and	w22, w22, 255
 	cmp	w22, 255
-	beq	.L3333
+	beq	.L3330
 	bl	gc_do_copy_back
 	ldrb	w0, [x25]
-	cbnz	w0, .L3315
+	cbnz	w0, .L3312
 	adrp	x0, .LANCHOR51
 	ldrb	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, 3
-	bhi	.L3316
+	bhi	.L3313
 	bl	ftl_write_commit
-.L3316:
+.L3313:
 	ldrh	w1, [x20, 26]
 	ldrh	w0, [x20, 24]
 	cmp	w1, w0
-	bcc	.L3314
+	bcc	.L3311
 	mov	w0, 1
 	strb	w0, [x19, #:lo12:.LANCHOR145]
 	bl	ftl_write_commit
@@ -20939,35 +20941,37 @@ zftl_do_gc:
 	mov	x19, x0
 	ldr	x1, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x1, x2, lsl 1]
-	cbz	w1, .L3318
+	cbz	w1, .L3315
 	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
-	mov	w2, 2390
+	mov	w2, 2393
 	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3318:
+.L3315:
 	ldrh	w0, [x21, #:lo12:.LANCHOR62]
 	ldr	x2, [x19, #:lo12:.LANCHOR9]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L3319
+	cbnz	w1, .L3316
 	bl	ftl_free_sblk
-	b	.L3293
-.L3319:
+	b	.L3290
+.L3316:
 	mov	w2, 1
 	mov	w1, 0
 	bl	gc_add_sblk
-	b	.L3293
-.L3315:
+	b	.L3290
+.L3312:
 	ldrh	w0, [x20, 320]
-	cbz	w0, .L3320
-	ldr	w0, [x20, 324]
+	cbz	w0, .L3317
 	strh	wzr, [x20, 320]
+	bl	sblk_wait_write_queue_completed
+	bl	gc_write_completed
+	ldr	w0, [x20, 324]
 	cmn	w0, #1
-	beq	.L3321
+	beq	.L3318
 	bl	ftl_mask_bad_block
-.L3321:
+.L3318:
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	add	x20, x21, :lo12:.LANCHOR62
 	strh	wzr, [x20, 56]
@@ -20982,28 +20986,28 @@ zftl_do_gc:
 	strh	w0, [x2, 126]
 	strh	w0, [x1, 130]
 	ldr	x0, [x20, 8]
-	cbz	x0, .L3322
+	cbz	x0, .L3319
 	bl	buf_free
-.L3322:
+.L3319:
 	add	x21, x21, :lo12:.LANCHOR62
 	str	xzr, [x21, 8]
 	bl	flt_sys_flush
-	mov	w2, 2426
+	mov	w2, 2431
 	strb	wzr, [x19, #:lo12:.LANCHOR145]
 	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3333
-.L3320:
+	b	.L3330
+.L3317:
 	ldrh	w0, [x26, 6]
 	ldrh	w1, [x20, 26]
 	cmp	w0, 1
 	ldrh	w0, [x20, 24]
-	bls	.L3323
+	bls	.L3320
 	cmp	w1, w0
-	bcc	.L3314
+	bcc	.L3311
 	mov	w0, 1
 	strb	w0, [x19, #:lo12:.LANCHOR145]
 	ldrh	w0, [x20, 56]
@@ -21014,12 +21018,12 @@ zftl_do_gc:
 	strh	w1, [x0, 58]
 	mov	w0, -1
 	strh	w0, [x20]
-	b	.L3333
-.L3323:
+	b	.L3330
+.L3320:
 	mov	w2, 5
 	strb	w2, [x19, #:lo12:.LANCHOR145]
 	cmp	w1, w0
-	bcc	.L3324
+	bcc	.L3321
 	ldrh	w0, [x20, 56]
 	add	w1, w0, 1
 	strh	w1, [x20, 56]
@@ -21028,7 +21032,7 @@ zftl_do_gc:
 	strh	w1, [x0, 58]
 	mov	w0, -1
 	strh	w0, [x20]
-.L3324:
+.L3321:
 	bl	ftl_flush
 	bl	sblk_wait_write_queue_completed
 	bl	gc_write_completed
@@ -21046,40 +21050,40 @@ zftl_do_gc:
 	strh	w1, [x0, 18]
 	cmp	w2, 2
 	strh	w2, [x0, 20]
-	bne	.L3326
+	bne	.L3323
 	ubfiz	w1, w1, 1, 15
 	strh	w1, [x0, 18]
 	adrp	x1, .LANCHOR104
 	ldrb	w1, [x1, #:lo12:.LANCHOR104]
-	cbnz	w1, .L3326
+	cbnz	w1, .L3323
 	mov	w1, 1
 	strh	w1, [x0, 20]
-.L3326:
+.L3323:
 	add	x21, x21, :lo12:.LANCHOR62
 	strh	wzr, [x21, 22]
-	b	.L3333
-.L3329:
+	b	.L3330
+.L3326:
 	ldrh	w1, [x24, 16]
 	ldrh	w0, [x24, 18]
 	cmp	w1, w0
-	bcc	.L3330
+	bcc	.L3327
 	mov	w0, 6
 	strb	w0, [x19, #:lo12:.LANCHOR145]
 	ldr	x0, [x24, 8]
 	bl	buf_free
 	str	xzr, [x24, 8]
-	b	.L3333
-.L3330:
+	b	.L3330
+.L3327:
 	cmp	w21, 15
-	bls	.L3236
+	bls	.L3233
 	cmp	w26, 1
-	bne	.L3333
+	bne	.L3330
 	add	w22, w22, 1
 	and	w22, w22, 255
 	cmp	w22, 4
-	bls	.L3236
-	b	.L3333
-.L3235:
+	bls	.L3233
+	b	.L3330
+.L3232:
 	bl	gc_update_l2p_map_new
 	mov	w20, -1
 	bl	gc_free_src_blk
@@ -21092,17 +21096,17 @@ zftl_do_gc:
 	strh	w20, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L3398:
+.L3395:
 	strb	wzr, [x19, #:lo12:.LANCHOR145]
-	b	.L3333
-.L3310:
-	mov	w2, 2321
+	b	.L3330
+.L3307:
+	mov	w2, 2324
 	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3332
+	b	.L3329
 	.size	zftl_do_gc, .-zftl_do_gc
 	.section	.text.zftl_write,"ax",@progbits
 	.align	2
@@ -21122,22 +21126,22 @@ zftl_write:
 	stp	x21, x22, [sp, 32]
 	mov	x24, x3
 	stp	x25, x26, [sp, 64]
-	tbz	x0, 12, .L3401
+	tbz	x0, 12, .L3398
 	mov	w3, w2
-	adrp	x0, .LC217
+	adrp	x0, .LC218
 	mov	w2, w1
-	add	x0, x0, :lo12:.LC217
+	add	x0, x0, :lo12:.LC218
 	mov	w1, w27
 	bl	printf
-.L3401:
-	cbnz	w27, .L3402
+.L3398:
+	cbnz	w27, .L3399
 	adrp	x0, .LANCHOR58
 	mov	w27, 24576
 	ldr	w0, [x0, #:lo12:.LANCHOR58]
-.L3403:
+.L3400:
 	add	w1, w19, w20
 	cmp	w0, w1
-	bcc	.L3417
+	bcc	.L3414
 	adrp	x23, .LANCHOR121
 	add	w27, w27, w19
 	sub	w19, w20, #1
@@ -21152,8 +21156,8 @@ zftl_write:
 	mov	w26, w22
 	sub	w21, w19, w22
 	add	w21, w21, 1
-.L3405:
-	cbnz	w21, .L3413
+.L3402:
+	cbnz	w21, .L3410
 	adrp	x20, .LANCHOR90
 	adrp	x19, .LANCHOR94
 	add	x20, x20, :lo12:.LANCHOR90
@@ -21163,14 +21167,14 @@ zftl_write:
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
-.L3414:
+.L3411:
 	ldrh	w0, [x20]
 	ldrh	w1, [x19]
 	add	w0, w0, w1
 	cmp	w0, 7
-	ble	.L3415
+	ble	.L3412
 	mov	w0, 0
-.L3400:
+.L3397:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -21178,28 +21182,28 @@ zftl_write:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L3402:
+.L3399:
 	cmp	w27, 3
-	bhi	.L3417
+	bhi	.L3414
 	lsl	w27, w27, 13
 	mov	w0, 8192
-	b	.L3403
-.L3413:
+	b	.L3400
+.L3410:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbnz	x0, .L3406
+	cbnz	x0, .L3403
 	bl	ftl_write_commit
-	b	.L3405
-.L3406:
+	b	.L3402
+.L3403:
 	ldrb	w3, [x23]
 	cmp	w26, w22
 	strb	wzr, [x0, 57]
 	ccmp	w26, w19, 4, ne
 	strb	w3, [x0, 56]
-	bne	.L3409
+	bne	.L3406
 	cmp	w26, w22
-	bne	.L3410
+	bne	.L3407
 	udiv	w0, w27, w3
 	msub	w0, w0, w3, w27
 	and	w0, w0, 255
@@ -21208,9 +21212,9 @@ zftl_write:
 	and	w3, w3, 255
 	cmp	w20, w3
 	csel	w3, w20, w3, cc
-.L3422:
+.L3419:
 	strb	w3, [x28, 56]
-.L3409:
+.L3406:
 	ldr	x3, [x28, 8]
 	mov	x1, x24
 	ldrb	w0, [x28, 57]
@@ -21232,19 +21236,19 @@ zftl_write:
 	ldrb	w0, [x28, 56]
 	ubfiz	x0, x0, 9, 8
 	add	x24, x24, x0
-	b	.L3405
-.L3410:
+	b	.L3402
+.L3407:
 	ldr	w0, [x29, 108]
 	msub	w3, w3, w26, w0
-	b	.L3422
-.L3415:
+	b	.L3419
+.L3412:
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
-	b	.L3414
-.L3417:
+	b	.L3411
+.L3414:
 	mov	w0, -1
-	b	.L3400
+	b	.L3397
 	.size	zftl_write, .-zftl_write
 	.section	.text.zftl_vendor_write,"ax",@progbits
 	.align	2
@@ -21303,12 +21307,12 @@ ftl_write:
 	mov	x20, x3
 	mov	w22, w1
 	ands	w21, w0, 255
-	bne	.L3428
+	bne	.L3425
 	mov	w3, w2
 	mov	w0, 0
 	mov	x2, x20
 	bl	idb_write_data
-.L3428:
+.L3425:
 	mov	x3, x20
 	mov	w2, w19
 	mov	w1, w22
@@ -21335,7 +21339,7 @@ zftl_discard:
 	cmp	w2, w1
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	bcc	.L3451
+	bcc	.L3448
 	adrp	x24, .LANCHOR216
 	add	w22, w0, 24576
 	adrp	x0, .LANCHOR14
@@ -21344,14 +21348,14 @@ zftl_discard:
 	ldr	w2, [x0, #:lo12:.LANCHOR14]
 	add	w1, w19, w1
 	str	w1, [x24, #:lo12:.LANCHOR216]
-	tbz	x2, 12, .L3432
-	adrp	x0, .LC218
+	tbz	x2, 12, .L3429
+	adrp	x0, .LC219
 	mov	w4, 0
 	mov	w3, w19
 	mov	w2, w22
-	add	x0, x0, :lo12:.LC218
+	add	x0, x0, :lo12:.LC219
 	bl	printf
-.L3432:
+.L3429:
 	adrp	x23, .LANCHOR97
 	adrp	x26, .LANCHOR121
 	ldr	x0, [x23, #:lo12:.LANCHOR97]
@@ -21363,7 +21367,7 @@ zftl_discard:
 	ldrb	w21, [x26, #:lo12:.LANCHOR121]
 	udiv	w20, w22, w21
 	msub	w25, w20, w21, w22
-	cbz	w25, .L3433
+	cbz	w25, .L3430
 	sub	w21, w21, w25
 	mov	w0, w20
 	cmp	w21, w19
@@ -21371,20 +21375,20 @@ zftl_discard:
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	bne	.L3434
+	bne	.L3431
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
-.L3434:
+.L3431:
 	ldr	w0, [x29, 120]
 	and	w28, w21, 65535
 	cmn	w0, #1
-	beq	.L3436
+	beq	.L3433
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x3, x0
-	cbz	x0, .L3436
+	cbz	x0, .L3433
 	strb	w25, [x0, 57]
 	ubfiz	x25, x25, 9, 25
 	strb	w21, [x0, 56]
@@ -21403,53 +21407,53 @@ zftl_discard:
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3436:
+.L3433:
 	add	w20, w20, 1
 	sub	w19, w19, w28
-.L3433:
-	cbz	w19, .L3438
+.L3430:
+	cbz	w19, .L3435
 	bl	ftl_flush
-.L3438:
+.L3435:
 	adrp	x25, .LANCHOR99
 	add	x21, x26, :lo12:.LANCHOR121
 	add	x25, x25, :lo12:.LANCHOR99
 	mov	w0, -1
 	str	w0, [x29, 124]
-.L3439:
+.L3436:
 	ldrb	w0, [x21]
 	cmp	w19, w0
-	bcs	.L3444
-	cbz	w19, .L3446
+	bcs	.L3441
+	cbz	w19, .L3443
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	bne	.L3447
+	bne	.L3444
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
-.L3447:
+.L3444:
 	ldr	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3446
+	beq	.L3443
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x21, x0
-	cbz	x0, .L3446
+	cbz	x0, .L3443
 	strb	wzr, [x0, 57]
 	strb	w19, [x0, 56]
 	stp	w27, w20, [x21, 32]
 	ldrb	w0, [x26, #:lo12:.LANCHOR121]
 	cmp	w19, w0
-	bcc	.L3449
+	bcc	.L3446
 	adrp	x1, .LANCHOR217
 	adrp	x0, .LC0
-	mov	w2, 1235
+	mov	w2, 1236
 	add	x1, x1, :lo12:.LANCHOR217
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3449:
+.L3446:
 	ldr	x0, [x21, 8]
 	lsl	w2, w19, 9
 	mov	w1, 0
@@ -21461,38 +21465,38 @@ zftl_discard:
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3446:
+.L3443:
 	ldr	w1, [x24, #:lo12:.LANCHOR216]
 	cmp	w1, 8192
-	bls	.L3452
+	bls	.L3449
 	ldr	x0, [x29, 104]
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3450
-	adrp	x0, .LC218
+	tbz	x0, 12, .L3447
+	adrp	x0, .LC219
 	mov	w4, 0
 	mov	w3, w19
 	mov	w2, w22
-	add	x0, x0, :lo12:.LC218
+	add	x0, x0, :lo12:.LC219
 	bl	printf
-.L3450:
+.L3447:
 	str	wzr, [x24, #:lo12:.LANCHOR216]
 	bl	flt_sys_flush
 	adrp	x0, .LANCHOR116
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR116]
-.L3452:
+.L3449:
 	mov	w0, 0
-	b	.L3430
-.L3444:
+	b	.L3427
+.L3441:
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3440
+	beq	.L3437
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbz	x0, .L3442
+	cbz	x0, .L3439
 	ldrb	w2, [x21]
 	mov	w1, 0
 	strb	w2, [x0, 56]
@@ -21504,24 +21508,24 @@ zftl_discard:
 	mov	x0, x28
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-.L3478:
+.L3475:
 	ldr	x1, [x23, #:lo12:.LANCHOR97]
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3442:
+.L3439:
 	ldrb	w0, [x21]
 	add	w20, w20, 1
 	sub	w19, w19, w0
-	b	.L3439
-.L3440:
+	b	.L3436
+.L3437:
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
 	ldr	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3442
+	beq	.L3439
 	add	x1, x29, 124
 	mov	w2, 1
 	mov	w0, w20
@@ -21539,10 +21543,10 @@ zftl_discard:
 	ldrb	w1, [x1, #:lo12:.LANCHOR98]
 	udiv	w0, w0, w1
 	bl	ftl_vpn_decrement
-	b	.L3478
-.L3451:
+	b	.L3475
+.L3448:
 	mov	w0, -1
-.L3430:
+.L3427:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -21795,7 +21799,7 @@ _c_ftl_planes_per_die:
 	.zero	1
 	.section	.bss._c_ftl_pm_page_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR186,. + 0
+	.set	.LANCHOR185,. + 0
 	.type	_c_ftl_pm_page_num, %object
 	.size	_c_ftl_pm_page_num, 2
 _c_ftl_pm_page_num:
@@ -21971,7 +21975,7 @@ free_xlc_sblk:
 ftl_ext_info_data_buffer:
 	.zero	16384
 	.section	.bss.ftl_ext_info_first_write,"aw",@nobits
-	.set	.LANCHOR182,. + 0
+	.set	.LANCHOR181,. + 0
 	.type	ftl_ext_info_first_write, %object
 	.size	ftl_ext_info_first_write, 1
 ftl_ext_info_first_write:
@@ -21991,7 +21995,7 @@ ftl_info_data_buffer:
 	.zero	16384
 	.section	.bss.ftl_info_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR177,. + 0
+	.set	.LANCHOR176,. + 0
 	.type	ftl_info_spare, %object
 	.size	ftl_info_spare, 256
 ftl_info_spare:
@@ -22004,7 +22008,7 @@ ftl_info_spare:
 ftl_low_format_cur_blk:
 	.zero	2
 	.section	.bss.ftl_power_lost_flag,"aw",@nobits
-	.set	.LANCHOR181,. + 0
+	.set	.LANCHOR180,. + 0
 	.type	ftl_power_lost_flag, %object
 	.size	ftl_power_lost_flag, 1
 ftl_power_lost_flag:
@@ -22045,7 +22049,7 @@ ftl_sblk_vpn:
 ftl_sblk_vpn_update_id:
 	.zero	2
 	.section	.bss.ftl_sys_info_first_write,"aw",@nobits
-	.set	.LANCHOR180,. + 0
+	.set	.LANCHOR179,. + 0
 	.type	ftl_sys_info_first_write, %object
 	.size	ftl_sys_info_first_write, 1
 ftl_sys_info_first_write:
@@ -22058,7 +22062,7 @@ ftl_tmp_buffer:
 	.zero	16384
 	.section	.bss.ftl_tmp_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR175,. + 0
+	.set	.LANCHOR174,. + 0
 	.type	ftl_tmp_spare, %object
 	.size	ftl_tmp_spare, 256
 ftl_tmp_spare:
@@ -22150,7 +22154,7 @@ g_flash_multi_page_read_en:
 g_flash_page_buffer:
 	.zero	8
 	.section	.bss.g_flash_reversd_blks,"aw",@nobits
-	.set	.LANCHOR167,. + 0
+	.set	.LANCHOR195,. + 0
 	.type	g_flash_reversd_blks, %object
 	.size	g_flash_reversd_blks, 1
 g_flash_reversd_blks:
@@ -22197,7 +22201,7 @@ g_flash_toggle_mode_en:
 	.zero	1
 	.section	.bss.g_ftl_info_blk,"aw",@nobits
 	.align	6
-	.set	.LANCHOR178,. + 0
+	.set	.LANCHOR177,. + 0
 	.type	g_ftl_info_blk, %object
 	.size	g_ftl_info_blk, 4
 g_ftl_info_blk:
@@ -22216,7 +22220,7 @@ g_gc_info:
 g_idb_ecc_bits:
 	.zero	1
 	.section	.bss.g_idb_slc_mode_enable,"aw",@nobits
-	.set	.LANCHOR168,. + 0
+	.set	.LANCHOR167,. + 0
 	.type	g_idb_slc_mode_enable, %object
 	.size	g_idb_slc_mode_enable, 1
 g_idb_slc_mode_enable:
@@ -22287,7 +22291,7 @@ g_nandc_ver:
 	.zero	1
 	.section	.bss.g_pm_spare,"aw",@nobits
 	.align	3
-	.set	.LANCHOR190,. + 0
+	.set	.LANCHOR189,. + 0
 	.type	g_pm_spare, %object
 	.size	g_pm_spare, 8
 g_pm_spare:
@@ -22545,7 +22549,7 @@ idb_buf:
 	.zero	262144
 	.section	.bss.idb_need_write_back,"aw",@nobits
 	.align	2
-	.set	.LANCHOR169,. + 0
+	.set	.LANCHOR168,. + 0
 	.type	idb_need_write_back, %object
 	.size	idb_need_write_back, 4
 idb_need_write_back:
@@ -22595,7 +22599,7 @@ p_free_buf_head:
 p_read_ahead_ext_buf:
 	.zero	8
 	.section	.bss.pm_first_write,"aw",@nobits
-	.set	.LANCHOR191,. + 0
+	.set	.LANCHOR190,. + 0
 	.type	pm_first_write, %object
 	.size	pm_first_write, 1
 pm_first_write:
@@ -22702,7 +22706,7 @@ write_buf_head:
 write_commit_count:
 	.zero	1
 	.section	.bss.write_commit_head,"aw",@nobits
-	.set	.LANCHOR173,. + 0
+	.set	.LANCHOR172,. + 0
 	.type	write_commit_head, %object
 	.size	write_commit_head, 1
 write_commit_head:
@@ -22791,7 +22795,7 @@ hy_f26_ref_value:
 	.byte	-37
 	.section	.data.nand_opt_para,"aw",@progbits
 	.align	3
-	.set	.LANCHOR195,. + 0
+	.set	.LANCHOR194,. + 0
 	.type	nand_opt_para, %object
 	.size	nand_opt_para, 128
 nand_opt_para:
@@ -23636,9 +23640,9 @@ zftl_debug:
 	.word	17476
 	.section	.data.zftl_nand_flash_para_tbl,"aw",@progbits
 	.align	3
-	.set	.LANCHOR194,. + 0
+	.set	.LANCHOR193,. + 0
 	.type	zftl_nand_flash_para_tbl, %object
-	.size	zftl_nand_flash_para_tbl, 960
+	.size	zftl_nand_flash_para_tbl, 1024
 zftl_nand_flash_para_tbl:
 	.byte	6
 	.byte	-104
@@ -24354,7 +24358,7 @@ zftl_nand_flash_para_tbl:
 	.byte	2
 	.byte	2
 	.hword	1056
-	.hword	473
+	.hword	455
 	.byte	2
 	.byte	6
 	.byte	40
@@ -24462,490 +24466,546 @@ zftl_nand_flash_para_tbl:
 	.byte	2
 	.byte	1
 	.byte	32
-	.hword	256
-	.byte	2
+	.hword	256
+	.byte	2
+	.byte	2
+	.hword	2092
+	.hword	473
+	.byte	2
+	.byte	5
+	.byte	40
+	.byte	32
+	.byte	3
+	.byte	1
+	.byte	3
+	.byte	0
+	.hword	256
+	.byte	2
+	.byte	-65
+	.byte	-66
+	.byte	0
+	.byte	5
+	.byte	-119
+	.byte	100
+	.byte	100
+	.byte	60
+	.byte	-95
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	32
+	.hword	512
+	.byte	2
+	.byte	1
+	.hword	1024
+	.hword	1479
+	.byte	3
+	.byte	17
+	.byte	40
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.hword	512
+	.byte	3
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	5
+	.byte	-119
+	.byte	-124
+	.byte	100
+	.byte	60
+	.byte	-91
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	32
+	.hword	512
 	.byte	2
-	.hword	2092
-	.hword	473
 	.byte	2
-	.byte	5
+	.hword	1024
+	.hword	1479
+	.byte	3
+	.byte	17
 	.byte	40
 	.byte	32
-	.byte	3
 	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.hword	512
 	.byte	3
 	.byte	0
-	.hword	256
-	.byte	2
-	.byte	-65
-	.byte	-66
 	.byte	0
-	.section	.rodata.__func__.10041,"a",@progbits
+	.byte	0
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 	.string	"ftl_write_commit"
-	.section	.rodata.__func__.9432,"a",@progbits
+	.section	.rodata.__func__.9451,"a",@progbits
 	.align	3
 	.set	.LANCHOR120,. + 0
-	.type	__func__.9432, %object
-	.size	__func__.9432, 14
-__func__.9432:
+	.type	__func__.9451, %object
+	.size	__func__.9451, 14
+__func__.9451:
 	.string	"ftl_write_buf"
-	.section	.rodata.__func__.9476,"a",@progbits
+	.section	.rodata.__func__.9495,"a",@progbits
 	.align	3
 	.set	.LANCHOR123,. + 0
-	.type	__func__.9476, %object
-	.size	__func__.9476, 18
-__func__.9476:
+	.type	__func__.9495, %object
+	.size	__func__.9495, 18
+__func__.9495:
 	.string	"zftl_add_read_buf"
-	.section	.rodata.__func__.9509,"a",@progbits
+	.section	.rodata.__func__.9528,"a",@progbits
 	.align	3
 	.set	.LANCHOR208,. + 0
-	.type	__func__.9509, %object
-	.size	__func__.9509, 10
-__func__.9509:
+	.type	__func__.9528, %object
+	.size	__func__.9528, 10
+__func__.9528:
 	.string	"zftl_read"
-	.section	.rodata.__func__.9540,"a",@progbits
+	.section	.rodata.__func__.9559,"a",@progbits
 	.align	3
 	.set	.LANCHOR217,. + 0
-	.type	__func__.9540, %object
-	.size	__func__.9540, 13
-__func__.9540:
+	.type	__func__.9559, %object
+	.size	__func__.9559, 13
+__func__.9559:
 	.string	"_ftl_discard"
-	.section	.rodata.__func__.9659,"a",@progbits
+	.section	.rodata.__func__.9678,"a",@progbits
 	.align	3
 	.set	.LANCHOR60,. + 0
-	.type	__func__.9659, %object
-	.size	__func__.9659, 12
-__func__.9659:
+	.type	__func__.9678, %object
+	.size	__func__.9678, 12
+__func__.9678:
 	.string	"gc_add_sblk"
-	.section	.rodata.__func__.9680,"a",@progbits
+	.section	.rodata.__func__.9699,"a",@progbits
 	.align	3
 	.set	.LANCHOR209,. + 0
-	.type	__func__.9680, %object
-	.size	__func__.9680, 21
-__func__.9680:
+	.type	__func__.9699, %object
+	.size	__func__.9699, 21
+__func__.9699:
 	.string	"gc_check_data_one_wl"
-	.section	.rodata.__func__.9714,"a",@progbits
+	.section	.rodata.__func__.9733,"a",@progbits
 	.align	3
 	.set	.LANCHOR204,. + 0
-	.type	__func__.9714, %object
-	.size	__func__.9714, 22
-__func__.9714:
+	.type	__func__.9733, %object
+	.size	__func__.9733, 22
+__func__.9733:
 	.string	"gc_update_l2p_map_new"
-	.section	.rodata.__func__.9727,"a",@progbits
+	.section	.rodata.__func__.9746,"a",@progbits
 	.align	3
 	.set	.LANCHOR67,. + 0
-	.type	__func__.9727, %object
-	.size	__func__.9727, 19
-__func__.9727:
+	.type	__func__.9746, %object
+	.size	__func__.9746, 19
+__func__.9746:
 	.string	"gc_write_completed"
-	.section	.rodata.__func__.9756,"a",@progbits
+	.section	.rodata.__func__.9775,"a",@progbits
 	.align	3
 	.set	.LANCHOR213,. + 0
-	.type	__func__.9756, %object
-	.size	__func__.9756, 16
-__func__.9756:
+	.type	__func__.9775, %object
+	.size	__func__.9775, 16
+__func__.9775:
 	.string	"gc_do_copy_back"
-	.section	.rodata.__func__.9778,"a",@progbits
+	.section	.rodata.__func__.9797,"a",@progbits
 	.align	3
 	.set	.LANCHOR103,. + 0
-	.type	__func__.9778, %object
-	.size	__func__.9778, 16
-__func__.9778:
+	.type	__func__.9797, %object
+	.size	__func__.9797, 16
+__func__.9797:
 	.string	"gc_free_src_blk"
-	.section	.rodata.__func__.9823,"a",@progbits
+	.section	.rodata.__func__.9842,"a",@progbits
 	.align	3
 	.set	.LANCHOR205,. + 0
-	.type	__func__.9823, %object
-	.size	__func__.9823, 16
-__func__.9823:
+	.type	__func__.9842, %object
+	.size	__func__.9842, 16
+__func__.9842:
 	.string	"gc_scan_src_blk"
-	.section	.rodata.__func__.9881,"a",@progbits
+	.section	.rodata.__func__.9900,"a",@progbits
 	.align	3
 	.set	.LANCHOR206,. + 0
-	.type	__func__.9881, %object
-	.size	__func__.9881, 20
-__func__.9881:
+	.type	__func__.9900, %object
+	.size	__func__.9900, 20
+__func__.9900:
 	.string	"gc_scan_static_data"
-	.section	.rodata.__func__.9948,"a",@progbits
+	.section	.rodata.__func__.9967,"a",@progbits
 	.align	3
 	.set	.LANCHOR215,. + 0
-	.type	__func__.9948, %object
-	.size	__func__.9948, 11
-__func__.9948:
+	.type	__func__.9967, %object
+	.size	__func__.9967, 11
+__func__.9967:
 	.string	"zftl_do_gc"
 	.section	.rodata._list_remove_node.str1.1,"aMS",@progbits,1
 .LC0:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
 	.section	.rodata.dump_ftl_info.str1.1,"aMS",@progbits,1
-.LC150:
-	.string	"free_buf_count: %d\n"
 .LC151:
-	.string	"g_ftl_info_blk blk:0x%x, index:0x%x, page:0x%x\n"
+	.string	"free_buf_count: %d\n"
 .LC152:
-	.string	"ftl_ext_info_blk blk:0x%x, page:0x%x\n"
+	.string	"g_ftl_info_blk blk:0x%x, index:0x%x, page:0x%x\n"
 .LC153:
-	.string	"ac_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
+	.string	"ftl_ext_info_blk blk:0x%x, page:0x%x\n"
 .LC154:
-	.string	"tmp_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
+	.string	"ac_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
 .LC155:
-	.string	"gc_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
+	.string	"tmp_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
 .LC156:
-	.string	"lpa:"
+	.string	"gc_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
 .LC157:
-	.string	"vpn:"
+	.string	"lpa:"
 .LC158:
-	.string	"sblk:"
+	.string	"vpn:"
 .LC159:
-	.string	"lpa_hash:"
+	.string	"sblk:"
 .LC160:
+	.string	"lpa_hash:"
+.LC161:
 	.string	"lpa_hash_index:"
 	.section	.rodata.dump_sblk_queue.str1.1,"aMS",@progbits,1
 .LC68:
@@ -24983,32 +25043,32 @@ __func__.9948:
 	.string	"...%d @ %s %d %p\n"
 .LC116:
 	.string	"no sys info %x\n"
+	.section	.rodata.flash_info_data_init.str1.1,"aMS",@progbits,1
+.LC84:
+	.string	"...%d @ %s\n"
 	.section	.rodata.flash_info_flush.str1.1,"aMS",@progbits,1
-.LC145:
-	.string	"finfo:"
 .LC146:
-	.string	"flash_info_flush id = %x, page = %x\n"
+	.string	"finfo:"
 .LC147:
+	.string	"flash_info_flush id = %x, page = %x\n"
+.LC148:
 	.string	"sys_info_flush error:%x\n"
-	.section	.rodata.flash_into_data_init.str1.1,"aMS",@progbits,1
-.LC84:
-	.string	"...%d @ %s\n"
 	.section	.rodata.flash_mask_bad_block.str1.1,"aMS",@progbits,1
 .LC40:
 	.string	"flash_mask_bad_block %d %d\n"
 	.section	.rodata.flash_prog_page.str1.1,"aMS",@progbits,1
-.LC120:
-	.string	"flash_prog_page %x %x %x\n"
 .LC121:
+	.string	"flash_prog_page %x %x %x\n"
+.LC122:
 	.string	"flash_prog_page page_addr = %x status = %x\n"
 	.section	.rodata.flash_prog_page_en.str1.1,"aMS",@progbits,1
-.LC126:
-	.string	"flash_prog_page_en:%x %x\n"
 .LC127:
-	.string	"spare"
+	.string	"flash_prog_page_en:%x %x\n"
 .LC128:
-	.string	"data"
+	.string	"spare"
 .LC129:
+	.string	"data"
+.LC130:
 	.string	"write error: %x\n"
 	.section	.rodata.flash_read_id.str1.1,"aMS",@progbits,1
 .LC38:
@@ -25030,7 +25090,7 @@ __func__.9948:
 .LC67:
 	.string	"alloc sblk %x %d\n"
 	.section	.rodata.ftl_ext_info_init.str1.1,"aMS",@progbits,1
-.LC134:
+.LC135:
 	.string	"%s %d %d %x %x\n"
 	.section	.rodata.ftl_free_sblk.str1.1,"aMS",@progbits,1
 .LC55:
@@ -25038,70 +25098,70 @@ __func__.9948:
 .LC56:
 	.string	"swl_slc_free_mini_ec_blk sblk %x\n"
 	.section	.rodata.ftl_info_blk_init.str1.1,"aMS",@progbits,1
-.LC132:
-	.string	"%d %x @%d %x\n"
 .LC133:
+	.string	"%d %x @%d %x\n"
+.LC134:
 	.string	"ftl_info_blk_init %d %d %x\n"
 	.section	.rodata.ftl_info_flush.str1.1,"aMS",@progbits,1
-.LC131:
+.LC132:
 	.string	"g_ftl_info_blk blk = %x, page = %x version = %d\n"
 	.section	.rodata.ftl_low_format.str1.1,"aMS",@progbits,1
-.LC135:
-	.string	"ftl_low_format %d\n"
 .LC136:
+	.string	"ftl_low_format %d\n"
+.LC137:
 	.string	"low format %d %d %d %d\n"
 	.section	.rodata.ftl_mask_bad_block.str1.1,"aMS",@progbits,1
 .LC60:
 	.string	"mask bad block:cs %x block: %x\n"
 	.section	.rodata.ftl_open_sblk_recovery.str1.1,"aMS",@progbits,1
-.LC138:
-	.string	"saved_active_page  = %x\n"
 .LC139:
-	.string	"saved_active_plane = %x\n"
+	.string	"saved_active_page  = %x\n"
 .LC140:
-	.string	"sblk = %x\n"
+	.string	"saved_active_plane = %x\n"
 .LC141:
-	.string	"phy_blk = %x %x\n"
+	.string	"sblk = %x\n"
 .LC142:
-	.string	"sblk = %x, vpn0 = %d, vpn1 = %d\n"
+	.string	"phy_blk = %x %x\n"
 .LC143:
+	.string	"sblk = %x, vpn0 = %d, vpn1 = %d\n"
+.LC144:
 	.string	"dump write = %x\n"
 	.section	.rodata.ftl_re_low_format.str1.1,"aMS",@progbits,1
-.LC137:
+.LC138:
 	.string	"re low format %d\n"
 	.section	.rodata.ftl_sblk_dump.str1.1,"aMS",@progbits,1
-.LC193:
-	.string	"ftl_sblk_dump = %x %d %d %d %d\n"
 .LC194:
-	.string	"ftl_sblk_dump = %x %x %x %x\n"
+	.string	"ftl_sblk_dump = %x %d %d %d %d\n"
 .LC195:
-	.string	"page_addr = %x, lpa=%x vpn = %d\n"
+	.string	"ftl_sblk_dump = %x %x %x %x\n"
 .LC196:
-	.string	"index= %x, lpa=%x\n"
+	.string	"page_addr = %x, lpa=%x vpn = %d\n"
 .LC197:
+	.string	"index= %x, lpa=%x\n"
+.LC198:
 	.string	"block = %x, vpn=%x check vpn = %d\n"
 	.section	.rodata.ftl_sysblk_dump.str1.1,"aMS",@progbits,1
-.LC148:
-	.string	"blk= %x, page=%x, ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
 .LC149:
+	.string	"blk= %x, page=%x, ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
+.LC150:
 	.string	"l2p:"
 	.section	.rodata.ftl_test_block.str1.1,"aMS",@progbits,1
-.LC130:
+.LC131:
 	.string	"low format %d\n"
 	.section	.rodata.ftl_update_l2p_map.str1.1,"aMS",@progbits,1
-.LC204:
-	.string	"ftl_update_l2p_map: %x %x %x\n"
 .LC205:
-	.string	"ftl_update_l2p_map"
+	.string	"ftl_update_l2p_map: %x %x %x\n"
 .LC206:
-	.string	"lpa_tbl:"
+	.string	"ftl_update_l2p_map"
 .LC207:
+	.string	"lpa_tbl:"
+.LC208:
 	.string	"sblk %x vpn: %d %d\n"
 	.section	.rodata.ftl_vpn_decrement.str1.1,"aMS",@progbits,1
 .LC59:
 	.string	"ftl_vpn_decrement %x = %d\n"
 	.section	.rodata.ftl_write_commit.str1.1,"aMS",@progbits,1
-.LC208:
+.LC209:
 	.string	"%d read error: ppa:%x, lpa:%x, status:%x\n"
 	.section	.rodata.ftl_write_completed.str1.1,"aMS",@progbits,1
 .LC66:
@@ -25112,20 +25172,20 @@ __func__.9948:
 .LC42:
 	.string	"gc_add_sblk = %d, %d, %d,last update:%d, %d\n"
 	.section	.rodata.gc_check_data_one_wl.str1.1,"aMS",@progbits,1
-.LC201:
-	.string	"gc_lpa:"
 .LC202:
-	.string	"gc_ppa:"
+	.string	"gc_lpa:"
 .LC203:
+	.string	"gc_ppa:"
+.LC204:
 	.string	"err: ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
 	.section	.rodata.gc_do_copy_back.str1.1,"aMS",@progbits,1
-.LC209:
-	.string	"gc page in buf: lpa %x ppa = %x pageindex= %x\n"
 .LC210:
-	.string	"gc_do_copy_back: lpa %x des_ppa = %x %x gc_ppa= %x page_index= %d\n"
+	.string	"gc page in buf: lpa %x ppa = %x pageindex= %x\n"
 .LC211:
-	.string	"gc_do_copy_back: %x %x %x %x gc_ppa:%x %x\n"
+	.string	"gc_do_copy_back: lpa %x des_ppa = %x %x gc_ppa= %x page_index= %d\n"
 .LC212:
+	.string	"gc_do_copy_back: %x %x %x %x gc_ppa:%x %x\n"
+.LC213:
 	.string	"%d prog_step: %x %x buf id= %x ppa = %x hash=%x id = %x plane = %x lpa=%x\n"
 	.section	.rodata.gc_free_src_blk.str1.1,"aMS",@progbits,1
 .LC57:
@@ -25136,16 +25196,16 @@ __func__.9948:
 .LC45:
 	.string	"%d gc_free_temp_buf buf id= %x\n"
 	.section	.rodata.gc_recovery.str1.1,"aMS",@progbits,1
-.LC171:
-	.string	"ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
 .LC172:
-	.string	"ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
+	.string	"ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
 .LC173:
+	.string	"ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
+.LC174:
 	.string	"gc_recovery: %x vpn = %x\n"
 	.section	.rodata.gc_scan_src_blk.str1.1,"aMS",@progbits,1
-.LC191:
-	.string	"gc_scan_src_blk = %x, vpn = %d\n"
 .LC192:
+	.string	"gc_scan_src_blk = %x, vpn = %d\n"
+.LC193:
 	.string	"gc_scan_src_blk = %x, s vpn0 = %d, c vpn1 = %d\n"
 	.section	.rodata.gc_search_src_blk.str1.1,"aMS",@progbits,1
 .LC47:
@@ -25172,13 +25232,13 @@ __func__.9948:
 .LC81:
 	.string	"swl add slc gc  = %x, %d, %d, %d, %d, %d\n"
 	.section	.rodata.gc_update_l2p_map_new.str1.1,"aMS",@progbits,1
-.LC187:
-	.string	"gc_update_l2p_map_new sblk %x\n"
 .LC188:
-	.string	"gc_update_l2p_map_new: %x %x %x\n"
+	.string	"gc_update_l2p_map_new sblk %x\n"
 .LC189:
-	.string	"lpa: %x %x %x\n"
+	.string	"gc_update_l2p_map_new: %x %x %x\n"
 .LC190:
+	.string	"lpa: %x %x %x\n"
+.LC191:
 	.string	"gc_update_l2p_map_new: %x vpn = %x vpn1 = %x done\n"
 	.section	.rodata.gc_write_completed.str1.1,"aMS",@progbits,1
 .LC43:
@@ -25194,24 +25254,24 @@ __func__.9948:
 .LC108:
 	.string	"hynix RR %d row=%x, count %d, status=%d\n"
 	.section	.rodata.idb_write_data.str1.1,"aMS",@progbits,1
-.LC122:
-	.string	"1 write_idblock fix data %x %x %x\n"
 .LC123:
-	.string	"write_idblock check fail! %x\n"
+	.string	"1 write_idblock fix data %x %x %x\n"
 .LC124:
+	.string	"write_idblock check fail! %x\n"
+.LC125:
 	.string	"write_idblock fail! %x\n"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",@progbits,1
-.LC162:
-	.string	"region_id = %d, pm_max_region = %d\n"
 .LC163:
-	.string	"load_l2p_region no ppa = %x , %x, all setting 0xff....\n"
+	.string	"region_id = %d, pm_max_region = %d\n"
 .LC164:
-	.string	"load_l2p_region = %x,%x,%x, %x\n"
+	.string	"load_l2p_region no ppa = %x , %x, all setting 0xff....\n"
 .LC165:
-	.string	"pm_ppa:"
+	.string	"load_l2p_region = %x,%x,%x, %x\n"
 .LC166:
-	.string	"data:"
+	.string	"pm_ppa:"
 .LC167:
+	.string	"data:"
+.LC168:
 	.string	"spare:"
 	.section	.rodata.lpa_rebuild_hash.str1.1,"aMS",@progbits,1
 .LC72:
@@ -25316,18 +25376,18 @@ __func__.9948:
 .LC83:
 	.string	"ftl_free_no_use_map_blk %x %x %x %d\n"
 	.section	.rodata.pm_init.str1.1,"aMS",@progbits,1
-.LC168:
-	.string	"pm_init posr %x %x %x\n"
 .LC169:
+	.string	"pm_init posr %x %x %x\n"
+.LC170:
 	.string	"pm_init recovery %x %x %x\n"
 	.section	.rodata.pm_log2phys.str1.1,"aMS",@progbits,1
-.LC170:
+.LC171:
 	.string	"pm_log2phys  lpn = %d, max lpn = %d\n"
 	.section	.rodata.pm_ppa_update_check.str1.1,"aMS",@progbits,1
-.LC161:
+.LC162:
 	.string	"%s w error lpn = %x, max ppa = %d\n"
 	.section	.rodata.pm_write_page.str1.1,"aMS",@progbits,1
-.LC144:
+.LC145:
 	.string	"pm_write_page write error: %x\n"
 	.section	.rodata.print_ftl_debug_info.str1.1,"aMS",@progbits,1
 .LC61:
@@ -25352,7 +25412,9 @@ __func__.9948:
 .LC118:
 	.string	"read: %x %x %x %x\n"
 .LC119:
-	.string	"set buf %d,status = %x, ppa = %x lun state = %d\n"
+	.string	"0set buf %d,status = %x, ppa = %x lun state = %d\n"
+.LC120:
+	.string	"1set buf %d,status = %x, ppa = %x lun state = %d\n"
 	.section	.rodata.random_seed,"a",@progbits
 	.align	3
 	.set	.LANCHOR48,. + 0
@@ -25488,7 +25550,7 @@ random_seed:
 	.hword	17598
 	.hword	28087
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",@progbits,1
-.LC186:
+.LC187:
 	.string	"zftl_init %x\n"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
 .LC88:
@@ -25503,7 +25565,7 @@ random_seed:
 .LC39:
 	.string	"bad block test:%x %x\n"
 	.section	.rodata.sblk_prog_page.str1.1,"aMS",@progbits,1
-.LC125:
+.LC126:
 	.string	"sblk_prog_page ppa = %x, count = %d\n"
 	.section	.rodata.toshiba_15ref_value,"a",@progbits
 	.align	3
@@ -26101,16 +26163,16 @@ toshiba_ref_value:
 	.byte	12
 	.byte	112
 	.section	.rodata.zftl_discard.str1.1,"aMS",@progbits,1
-.LC218:
+.LC219:
 	.string	"ftl_discard:(%x, %x, %x, %x)\n"
 	.section	.rodata.zftl_do_gc.str1.1,"aMS",@progbits,1
-.LC213:
-	.string	"gc %d: %d %d %d %d %d %d %d\n"
 .LC214:
-	.string	"gc %d: %d %d %d %d %d %d\n"
+	.string	"gc %d: %d %d %d %d %d %d %d\n"
 .LC215:
-	.string	"GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\n"
+	.string	"gc %d: %d %d %d %d %d %d\n"
 .LC216:
+	.string	"GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\n"
+.LC217:
 	.string	"gc free %x, %d\n"
 	.section	.rodata.zftl_gc_get_free_sblk.str1.1,"aMS",@progbits,1
 .LC49:
@@ -26123,41 +26185,41 @@ toshiba_ref_value:
 .LC52:
 	.string	"swl_slc_free_mini_ec_blk alloc sblk %x\n"
 	.section	.rodata.zftl_init.str1.1,"aMS",@progbits,1
-.LC174:
-	.string	"FTL version: 6.0.9 20180704"
 .LC175:
-	.string	"_c_user_data_density := %d\n"
+	.string	"FTL version: 6.0.11 20180718"
 .LC176:
-	.string	"_c_totle_phy_density := %d\n"
+	.string	"_c_user_data_density := %d\n"
 .LC177:
-	.string	"_c_totle_log_page := %d\n"
+	.string	"_c_totle_phy_density := %d\n"
 .LC178:
-	.string	"_c_totle_data_density := %d\n"
+	.string	"_c_totle_log_page := %d\n"
 .LC179:
-	.string	"_c_ftl_pm_page_num := %d\n"
+	.string	"_c_totle_data_density := %d\n"
 .LC180:
-	.string	"_c_ftl_byte_pre_page := %d\n"
+	.string	"_c_ftl_pm_page_num := %d\n"
 .LC181:
-	.string	"_c_max_pm_sblk := %d\n"
+	.string	"_c_ftl_byte_pre_page := %d\n"
 .LC182:
-	.string	"_min_slc_super_block := %d\n"
+	.string	"_c_max_pm_sblk := %d\n"
 .LC183:
-	.string	"_max_xlc_super_block := %d\n"
+	.string	"_min_slc_super_block := %d\n"
 .LC184:
-	.string	"gp_ftl_ext_info %p %p %p\n"
+	.string	"_max_xlc_super_block := %d\n"
 .LC185:
+	.string	"gp_ftl_ext_info %p %p %p\n"
+.LC186:
 	.string	"flash info size: %d %d %d\n"
 	.section	.rodata.zftl_read.str1.1,"aMS",@progbits,1
-.LC198:
-	.string	"ftl_read %x %x %x\n"
 .LC199:
-	.string	"ftl_read refresh =%x, lpa = %x, ppa= %x\n"
+	.string	"ftl_read %x %x %x\n"
 .LC200:
+	.string	"ftl_read refresh =%x, lpa = %x, ppa= %x\n"
+.LC201:
 	.string	"id=%d, lpa = %x, ppa = %x spare = %x %x %x %x\n"
 	.section	.rodata.zftl_sblk_list_init.str1.1,"aMS",@progbits,1
 .LC82:
 	.string	"free blk vpn error: %x %x\n"
 	.section	.rodata.zftl_write.str1.1,"aMS",@progbits,1
-.LC217:
+.LC218:
 	.string	"ftlwrite %x %x %x\n"
 	.hidden	free

commit 30b27f610be3151991b138e2b3e5df5c6be07c03
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 17 11:06:09 2018 +0800

    rockchip: rk3399: do arch_cpu_init() not only when SPL
    
    Change-Id: I604bbdcfa65962e506550e6abe43bff0a189da87
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c
index 27697a8e44..377b639309 100644
--- a/arch/arm/mach-rockchip/rk3399/rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
@@ -67,17 +67,22 @@ void rockchip_stimer_init(void)
 	writel(TIMER_EN | TIMER_FMODE, TIMER_CHN10_BASE + TIMER_CONTROL_REG);
 	printf("%s\n", __func__);
 }
+#endif
 
 #define GRF_BASE	0xff770000
 #define PMUGRF_BASE	0xff320000
 #define PMUSGRF_BASE	0xff330000
+
 int arch_cpu_init(void)
 {
-	struct rk3399_pmusgrf_regs *sgrf = (void *)PMUSGRF_BASE;
 	struct rk3399_pmugrf_regs *pmugrf = (void *)PMUGRF_BASE;
 	struct rk3399_grf_regs * const grf = (void *)GRF_BASE;
 
 	/* We do some SoC one time setting here. */
+
+#ifdef CONFIG_SPL_BUILD
+	struct rk3399_pmusgrf_regs *sgrf = (void *)PMUSGRF_BASE;
+
 	/*
 	 * Disable DDR and SRAM security regions.
 	 *
@@ -89,8 +94,9 @@ int arch_cpu_init(void)
 	 */
 	rk_clrsetreg(&sgrf->ddr_rgn_con[16], 0x1ff, 0);
 	rk_clrreg(&sgrf->slv_secure_con4, 0x2000);
+#endif
 
-	/*  eMMC clock generator: disable the clock multipilier */
+	/* eMMC clock generator: disable the clock multipilier */
 	rk_clrreg(&grf->emmccore_con[11], 0x0ff);
 
 	/* PWM3 select pwm3a io */
@@ -98,7 +104,6 @@ int arch_cpu_init(void)
 
 	return 0;
 }
-#endif
 
 void board_debug_uart_init(void)
 {

commit b8f8ff5155676d8465112278a1e7d81e32bc4173
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 17 10:57:56 2018 +0800

    rockchip: rk322x: add RKIMG_DET_BOOTDEV
    
    Change-Id: I92512be99439f926fa86df956e23eae6bce94109
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h
index 0e5ab51c0e..5efc3aaf88 100644
--- a/include/configs/rk322x_common.h
+++ b/include/configs/rk322x_common.h
@@ -57,6 +57,7 @@
 	"partitions=" PARTS_DEFAULT \
 	ENV_MEM_LAYOUT_SETTINGS \
 	ROCKCHIP_DEVICE_SETTINGS \
+	RKIMG_DET_BOOTDEV \
 	BOOTENV
 #endif
 

commit 65cb013dff64660b51138b52bd6d5c35271587e4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 17 10:57:09 2018 +0800

    rockchip: rk322x: arch_cpu_init: initial SGRF in SPL
    
    Change-Id: Ica512e2a3ca671b989a67b5302d21b701b7747dd
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk322x/rk322x.c b/arch/arm/mach-rockchip/rk322x/rk322x.c
index 8b80a9ebaa..252fdae86b 100644
--- a/arch/arm/mach-rockchip/rk322x/rk322x.c
+++ b/arch/arm/mach-rockchip/rk322x/rk322x.c
@@ -16,14 +16,16 @@ const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
 	[BROM_BOOTSOURCE_EMMC] = "/sdhci@fe330000",
 	[BROM_BOOTSOURCE_SD] = "/dwmmc@fe320000",
 };
-#ifdef CONFIG_SPL_BUILD
+
 int arch_cpu_init(void)
 {
 	static struct rk322x_grf * const grf = (void *)GRF_BASE;
 	/* We do some SoC one time setting here. */
 
+#ifdef CONFIG_SPL_BUILD
 	/* Disable the ddr secure region setting to make it non-secure */
 	rk_clrreg(SGRF_DDR_CON0, 0x4000);
+#endif
 
 	/* PWMs select rkpwm clock source */
 	rk_setreg(&grf->soc_con[2], 1 << 0);
@@ -47,7 +49,6 @@ int arch_cpu_init(void)
 
 	return 0;
 }
-#endif
 
 void board_debug_uart_init(void)
 {

commit d54bc4cb37da9facc7fbacb0a8fefcf14065347a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 16 20:34:35 2018 +0800

    rockchip: rk322x: fix GPIO1B2_UART21_SIN definition mistake
    
    Change-Id: I0458b9a8242fa5f543c7426a9c8b262b468c4231
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk322x/rk322x.c b/arch/arm/mach-rockchip/rk322x/rk322x.c
index b38a308500..8b80a9ebaa 100644
--- a/arch/arm/mach-rockchip/rk322x/rk322x.c
+++ b/arch/arm/mach-rockchip/rk322x/rk322x.c
@@ -56,7 +56,7 @@ void board_debug_uart_init(void)
 		GPIO1B2_SHIFT		= 4,
 		GPIO1B2_MASK		= 3 << GPIO1B2_SHIFT,
 		GPIO1B2_GPIO		= 0,
-		GPIO1B2_UART21_SIN,
+		GPIO1B2_UART21_SIN	= 2,
 
 		GPIO1B1_SHIFT		= 2,
 		GPIO1B1_MASK		= 3 << GPIO1B1_SHIFT,

commit 9bfe736ccbce2f00e6f33f24a731c19edec4545d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 16 17:33:31 2018 +0800

    rockchip: rk322x: enable vidconsole
    
    Change-Id: I6ab5fd0232ed61578f958b2371ebef87caa10c5b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/evb_rk3229.h b/include/configs/evb_rk3229.h
index 7f2d2fe1e5..f9868d8aea 100644
--- a/include/configs/evb_rk3229.h
+++ b/include/configs/evb_rk3229.h
@@ -9,6 +9,9 @@
 
 #include <configs/rk322x_common.h>
 
+#define ROCKCHIP_DEVICE_SETTINGS \
+		"stdout=serial,vidconsole\0" \
+		"stderr=serial,vidconsole\0"
 
 /* Store env in emmc */
 #define CONFIG_SYS_MMC_ENV_DEV          0
diff --git a/include/configs/gva_rk3229.h b/include/configs/gva_rk3229.h
index 2847bdda16..b8f3e94f84 100644
--- a/include/configs/gva_rk3229.h
+++ b/include/configs/gva_rk3229.h
@@ -64,6 +64,7 @@
 #define CONFIG_SETUP_MEMORY_TAGS
 #define CONFIG_CMDLINE_TAG
 
+#define ROCKCHIP_DEVICE_SETTINGS
 #endif
 
 #endif
diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h
index 28263e1895..0e5ab51c0e 100644
--- a/include/configs/rk322x_common.h
+++ b/include/configs/rk322x_common.h
@@ -56,6 +56,7 @@
 	"fdt_high=0x7fffffff\0" \
 	"partitions=" PARTS_DEFAULT \
 	ENV_MEM_LAYOUT_SETTINGS \
+	ROCKCHIP_DEVICE_SETTINGS \
 	BOOTENV
 #endif
 

commit 51117ff49b12af12c6579ae15c5744be0fb70eec
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 16 17:30:35 2018 +0800

    rockchip: rk3328: enable vidconsole
    
    Change-Id: I5eebb1e10fe2fac7c3e0cec1884cd1c121fa9587
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/evb_rk3328.h b/include/configs/evb_rk3328.h
index 2f16ddbed5..9e4e19e595 100644
--- a/include/configs/evb_rk3328.h
+++ b/include/configs/evb_rk3328.h
@@ -9,6 +9,10 @@
 
 #include <configs/rk3328_common.h>
 
+#define ROCKCHIP_DEVICE_SETTINGS \
+		"stdout=serial,vidconsole\0" \
+		"stderr=serial,vidconsole\0"
+
 #define CONFIG_SYS_MMC_ENV_DEV 1
 
 #define SDRAM_BANK_SIZE			(2UL << 30)
diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index 03b6ce4955..537bdea9c9 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -65,6 +65,7 @@
 	ENV_MEM_LAYOUT_SETTINGS \
 	RKIMG_DET_BOOTDEV \
 	"partitions=" PARTS_DEFAULT \
+	ROCKCHIP_DEVICE_SETTINGS \
 	BOOTENV
 
 #endif

commit e5bc49ba7a0b72d7060b84f990495734342afdcf
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Fri Jun 8 17:30:25 2018 +0800

    rockchip: sdram_common: fix DDR4 cap calculate
    
    For DDR4 memory size we also need to get bank group by die bw,
    8bit DDR4 have 4 bank group, 16bit DDR4 have 2 bank group.
    
    Change-Id: Icea47a01ff6ceec838a91d0bf4152e4b8427a6ac
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
index 546eb768c5..16e5c4eb28 100644
--- a/arch/arm/mach-rockchip/sdram_common.c
+++ b/arch/arm/mach-rockchip/sdram_common.c
@@ -98,11 +98,14 @@ size_t rockchip_sdram_size(phys_addr_t reg)
 	size_t size_mb = 0;
 	u32 ch;
 	u32 cs1_col = 0;
+	u32 bg = 0;
+	u32 dbw, dram_type;
 	u32 sys_reg = readl(reg);
 	u32 sys_reg1 = readl(reg + 4);
 	u32 ch_num = 1 + ((sys_reg >> SYS_REG_NUM_CH_SHIFT)
 		       & SYS_REG_NUM_CH_MASK);
 
+	dram_type = (sys_reg >> SYS_REG_DDRTYPE_SHIFT) & SYS_REG_DDRTYPE_MASK;
 	debug("%s %x %x\n", __func__, (u32)reg, sys_reg);
 	for (ch = 0; ch < ch_num; ch++) {
 		rank = 1 + (sys_reg >> SYS_REG_RANK_SHIFT(ch) &
@@ -149,8 +152,12 @@ size_t rockchip_sdram_size(phys_addr_t reg)
 			SYS_REG_BW_MASK));
 		row_3_4 = sys_reg >> SYS_REG_ROW_3_4_SHIFT(ch) &
 			SYS_REG_ROW_3_4_MASK;
-
-		chipsize_mb = (1 << (cs0_row + cs0_col + bk + bw - 20));
+		if (dram_type == DDR4) {
+			dbw = (sys_reg >> SYS_REG_DBW_SHIFT(ch)) &
+				SYS_REG_DBW_MASK;
+			bg = (dbw == 2) ? 2 : 1;
+		}
+		chipsize_mb = (1 << (cs0_row + cs0_col + bk + bg + bw - 20));
 
 		if (rank > 1)
 			chipsize_mb += chipsize_mb >> ((cs0_row - cs1_row) +

commit 2bbf1028632be4d484e0015dd383e14968ca2dc0
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Jul 13 08:52:58 2018 +0800

    cmd: mmc: do not force init HW in 'mmc dev' cmd
    
    This is a revert to :
    a5710920b7 cmd_mmc: make mmc dev always re-probe the HW
    
    For emmc device, we should not re-init the HW with 'mmc dev' cmd,
    please use 'mmc rescan' when need HW re-init.
    
    Change-Id: I994d12beb7215db568e7a0ed58be3e36dfda5744
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/cmd/mmc.c b/cmd/mmc.c
index 74b379ebf3..18008fd1c7 100644
--- a/cmd/mmc.c
+++ b/cmd/mmc.c
@@ -568,7 +568,7 @@ static int do_mmc_dev(cmd_tbl_t *cmdtp, int flag,
 		return CMD_RET_USAGE;
 	}
 
-	mmc = init_mmc_device(dev, true);
+	mmc = init_mmc_device(dev, false);
 	if (!mmc)
 		return CMD_RET_FAILURE;
 

commit 3d460b4c2035b520b09499abdcd6daef7f88a573
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Jul 9 10:16:40 2018 +0800

    rockchip: rk3308: switch VCCIO3 voltage controlled by io_vsel3
    
    According to the description of GRF_SON_CON0, the voltage of
    VCCIO3(which is the concern of emmc/flash/sfc controller) will
    indicate by GPIO0_A4 or io_vsel3. The SOC defaults use GPIO0_A4
    to indicate power supply voltage for VCCIO3 by hardware, then
    we can switch to io_vsel3 after system power on, and release
    GPIO0_A4 for other usage.
    
    Change-Id: Ia18617ef765b8ff019748acd30ece0ca8cd51045
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3308/rk3308.c b/arch/arm/mach-rockchip/rk3308/rk3308.c
index 384ef42f90..586c4efcf2 100644
--- a/arch/arm/mach-rockchip/rk3308/rk3308.c
+++ b/arch/arm/mach-rockchip/rk3308/rk3308.c
@@ -7,6 +7,7 @@
 #include <asm/io.h>
 #include <asm/arch/grf_rk3308.h>
 #include <asm/arch/hardware.h>
+#include <asm/gpio.h>
 #include <debug_uart.h>
 
 #ifdef CONFIG_ARM64
@@ -73,6 +74,53 @@ enum {
 	UART2_IO_SEL_USB,
 };
 
+enum {
+	IOVSEL3_CTRL_SHIFT	= 8,
+	IOVSEL3_CTRL_MASK	= BIT(8),
+	VCCIO3_SEL_BY_GPIO	= 0,
+	VCCIO3_SEL_BY_IOVSEL3,
+
+	IOVSEL3_SHIFT		= 3,
+	IOVSEL3_MASK		= BIT(3),
+	VCCIO3_3V3		= 0,
+	VCCIO3_1V8,
+};
+
+/*
+ * The voltage of VCCIO3(which is the voltage domain of emmc/flash/sfc
+ * interface) can indicated by GPIO0_A4 or io_vsel3. The SOC defaults
+ * use GPIO0_A4 to indicate power supply voltage for VCCIO3 by hardware,
+ * then we can switch to io_vsel3 after system power on, and release GPIO0_A4
+ * for other usage.
+ */
+
+#define GPIO0_A4	4
+
+int rk_board_init(void)
+{
+	static struct rk3308_grf * const grf = (void *)GRF_BASE;
+	u32 val;
+	int ret;
+
+	ret = gpio_request(GPIO0_A4, "gpio0_a4");
+	if (ret < 0) {
+		debug("request for gpio0_a4 failed:%d\n", ret);
+		return ret;
+	}
+
+	gpio_direction_input(GPIO0_A4);
+
+	if (gpio_get_value(GPIO0_A4))
+		val = VCCIO3_SEL_BY_IOVSEL3 << IOVSEL3_CTRL_SHIFT |
+		      VCCIO3_1V8 << IOVSEL3_SHIFT;
+	else
+		val = VCCIO3_SEL_BY_IOVSEL3 << IOVSEL3_CTRL_SHIFT |
+		      VCCIO3_3V3 << IOVSEL3_SHIFT;
+	rk_clrsetreg(&grf->soc_con0, IOVSEL3_CTRL_MASK | IOVSEL3_MASK, val);
+
+	return 0;
+}
+
 void board_debug_uart_init(void)
 {
 	static struct rk3308_grf * const grf = (void *)GRF_BASE;

commit 5c6b26af2020c0a8a8acccc17e571b690ae0ce6f
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Wed Jul 18 16:08:03 2018 +0800

    rockchip: rkflash: fix compile error
    
    Change-Id: Ic545fda80852fd35f513b35f0aadbbf63b489546
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/Makefile b/drivers/rkflash/Makefile
index 19d980597a..6330c86e93 100644
--- a/drivers/rkflash/Makefile
+++ b/drivers/rkflash/Makefile
@@ -4,16 +4,16 @@
 # SPDX-License-Identifier:	GPL-2.0
 #
 
-obj-$(CONFIG_RKNANDC_NAND) += rkflash_blk.o rknandc_base.o rkflash_api.o rkflash_debug.o flash.o nandc.o
-obj-$(CONFIG_RKSFC_NAND) += rkflash_blk.o rksfc_base.o  rkflash_api.o rkflash_debug.o sfc_nand.o sfc.o
+obj-$(CONFIG_RKNANDC_NAND) += rksftl.o rkflash_blk.o rknandc_base.o rkflash_api.o rkflash_debug.o flash.o nandc.o
+obj-$(CONFIG_RKSFC_NAND) += rksftl.o rkflash_blk.o rksfc_base.o  rkflash_api.o rkflash_debug.o sfc_nand.o sfc.o
 obj-$(CONFIG_RKSFC_NOR) += rkflash_blk.o rksfc_base.o rkflash_api.o rkflash_debug.o sfc_nor.o sfc.o
 
 ifneq (, $(CONFIG_RKNANDC_NAND)$(CONFIG_RKSFC_NAND))
 
 ifdef CONFIG_ARM64
-obj-y += rk_sftl_arm_v8.o
+rksftl-y += rk_sftl_arm_v8.o
 else
-obj-y += rk_sftl_arm_v7.o
+rksftl-y += rk_sftl_arm_v7.o
 endif
 
 endif

commit ab83a6fe5812f67d3b3e398bb083b48c0b4c5fad
Author: CanYang He <hcy@rock-chips.com>
Date:   Thu Jul 5 10:09:38 2018 +0800

    debug_uart: add a printdec() to print decimalism result
    
    some value use decimalism to print is more readable for user, for
    example: frequency, capacity
    
    Change-Id: I9fa2a68d30c7694a582167d2d8767e18e28a9e83
    Signed-off-by: CanYang He <hcy@rock-chips.com>

diff --git a/include/debug_uart.h b/include/debug_uart.h
index 6f0b0c5e15..5aefafd601 100644
--- a/include/debug_uart.h
+++ b/include/debug_uart.h
@@ -105,6 +105,13 @@ void printhex4(uint value);
  */
 void printhex8(uint value);
 
+/**
+ * printdec() - Output a decimalism value
+ *
+ * @value:	Value to output
+ */
+void printdec(uint value);
+
 #ifdef CONFIG_DEBUG_UART_ANNOUNCE
 #define _DEBUG_UART_ANNOUNCE	printascii("<debug_uart> ");
 #else
@@ -171,6 +178,18 @@ void printhex8(uint value);
 	{ \
 		printhex(value, 8); \
 	} \
+\
+	void printdec(uint value) \
+	{ \
+		if (value > 10) { \
+			printdec(value / 10); \
+			value %= 10; \
+		} else if (value == 10) { \
+			_debug_uart_putc('1'); \
+			value = 0; \
+		} \
+		_debug_uart_putc('0' + value); \
+	} \
 \
 	void debug_uart_init(void) \
 	{ \

commit cc527546d340ae2a76d0a423b55e03ffa226a185
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Jul 5 10:20:57 2018 +0800

    androidboot: nodify cmd bootavb
    
    1.printf necessary information
    2.delete useless function: do_avb_write,
        do_avb_write_ab_metada
    
    Change-Id: I5f932e7774ecf9b383358b3c081369cdc7db0167
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/cmd/boot_android.c b/cmd/boot_android.c
old mode 100644
new mode 100755
index 4e775cea3b..e815ec4762
--- a/cmd/boot_android.c
+++ b/cmd/boot_android.c
@@ -161,6 +161,7 @@ int do_avb_init_ab_metadata(cmd_tbl_t *cmdtp, int flag,
 		return CMD_RET_FAILURE;
 	}
 
+	printf("Initialize ab data to misc partition success.\n");
 	avb_ops_user_free(ops);
 
 	return CMD_RET_SUCCESS;
@@ -202,6 +203,7 @@ int do_avb_ab_mark_slot_active(cmd_tbl_t *cmdtp, int flag,
 		return CMD_RET_FAILURE;
 	}
 
+	printf("Mark slot %d active successfully.\n", slot_number);
 	avb_ops_user_free(ops);
 
 	return CMD_RET_SUCCESS;
@@ -229,6 +231,7 @@ int do_avb_ab_mark_slot_unbootable(cmd_tbl_t *cmdtp, int flag,
 		return CMD_RET_FAILURE;
 	}
 
+	printf("Mark slot %d unbootable successfully.\n", slot_number);
 	avb_ops_user_free(ops);
 
 	return CMD_RET_SUCCESS;
@@ -285,7 +288,7 @@ int do_avb_read_rollback_index(cmd_tbl_t *cmdtp, int flag,
 		return CMD_RET_FAILURE;
 	}
 
-	printf("out_rollback_index = %llx\n", out_rollback_index);
+	printf("\nout_rollback_index = %llx\n", out_rollback_index);
 	avb_ops_user_free(ops);
 
 	return CMD_RET_SUCCESS;
@@ -317,6 +320,7 @@ int do_avb_write_rollback_index(cmd_tbl_t *cmdtp, int flag,
 		return CMD_RET_FAILURE;
 	}
 
+	printf("\nWrite  rollback index successfully.\n");
 	avb_ops_user_free(ops);
 
 	return CMD_RET_SUCCESS;
@@ -343,7 +347,8 @@ int do_avb_read_is_device_unlocked(cmd_tbl_t *cmdtp, int flag,
 		return CMD_RET_FAILURE;
 	}
 
-	printf("out_is_unlocked = %d\n", out_is_unlocked);
+	printf("\n The device is %s\n",
+		out_is_unlocked ? "UNLOCKED" : "LOCKED");
 	avb_ops_user_free(ops);
 
 	return CMD_RET_SUCCESS;
@@ -398,12 +403,13 @@ int do_avb_get_size_of_partition(cmd_tbl_t *cmdtp, int flag,
 
 	if (ops->get_size_of_partition(ops, requested_partitions,
 				       &out_size_in_bytes) != 0) {
-		printf("do_avb_get_size_of_partition error!\n");
+		printf("Can not get %s partition size!\n", requested_partitions);
 		avb_ops_user_free(ops);
 		return CMD_RET_FAILURE;
 	}
 
-	printf("partition size = %lld\n", out_size_in_bytes);
+	printf("%s partition size = 0x%llx\n", requested_partitions,
+	       out_size_in_bytes);
 	avb_ops_user_free(ops);
 
 	return CMD_RET_SUCCESS;
@@ -429,12 +435,13 @@ int do_avb_get_get_unique_guid_for_partition(cmd_tbl_t *cmdtp, int flag,
 
 	if (ops->get_unique_guid_for_partition(ops, requested_partitions,
 					       guid_buf, guid_buf_size) != 0) {
-		printf("do_avb_get_get_unique_guid_for_partition error!\n");
+		printf("Can not get %s partition UUID!\n",
+		       requested_partitions);
 		avb_ops_user_free(ops);
 		return CMD_RET_FAILURE;
 	}
 
-	printf("guid = %s\n", guid_buf);
+	printf("%s partition UUID is %s\n", requested_partitions, guid_buf);
 	avb_ops_user_free(ops);
 
 	return CMD_RET_SUCCESS;
@@ -475,47 +482,10 @@ int do_avb_read(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 		return CMD_RET_FAILURE;
 	}
 
-	for (i = 0; i < 512 * blkcnt; i++)
-		printf("buffer %d = %d\n", i, buffer[i]);
-
-	free(buffer);
-	avb_ops_user_free(ops);
-
-	return CMD_RET_SUCCESS;
-}
-
-int do_avb_write(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
-	AvbOps *ops;
-	char *requested_partitions;
-	int64_t offset_blk;
-	size_t blkcnt;
-	size_t out_num_read;
-	char *buffer;
-
-	if (argc != 4)
-		return CMD_RET_USAGE;
-
-	requested_partitions = argv[1];
-	offset_blk = simple_strtoul(argv[2], NULL, 16);
-	blkcnt = simple_strtoul(argv[3], NULL, 16);
-	ops = avb_ops_user_new();
-	buffer = (char *)malloc(blkcnt * 512);
-	if (buffer == NULL) {
-		printf("malloc buffer failed!\n");
-		return CMD_RET_FAILURE;
-	}
-
-	if (ops == NULL) {
-		printf("avb_ops_user_new() failed!\n");
-		return CMD_RET_FAILURE;
-	}
-	if (ops->read_from_partition(ops, requested_partitions, offset_blk,
-				     blkcnt, buffer, &out_num_read) != 0) {
-		printf("do_avb_write error!\n");
-		free(buffer);
-		avb_ops_user_free(ops);
-		return CMD_RET_FAILURE;
+	for (i = 0; i < 512 * blkcnt; i++) {
+		printf("buffer %d = %x", i, buffer[i]);
+		if ((i + 1) % 4 == 0)
+			printf("\n");
 	}
 
 	free(buffer);
@@ -545,6 +515,18 @@ int do_avb_read_ab_metadata(cmd_tbl_t *cmdtp, int flag,
 		return CMD_RET_FAILURE;
 	}
 
+	printf("Slot A information:\n");
+	printf("slot A: priority = %d, tries_remaining = %d,\
+	       successful_boot = %d\n",
+	       ab_data.slots[0].priority,
+	       ab_data.slots[0].tries_remaining,
+	       ab_data.slots[0].successful_boot);
+	printf("Slot B information:\n");
+	printf("slot B: priority = %d, tries_remaining = %d,\
+	       successful_boot = %d\n",
+	       ab_data.slots[1].priority,
+	       ab_data.slots[1].tries_remaining,
+	       ab_data.slots[1].successful_boot);
 	avb_ops_user_free(ops);
 
 	return CMD_RET_SUCCESS;
@@ -846,9 +828,7 @@ static cmd_tbl_t cmd_avb[] = {
 	U_BOOT_CMD_MKENT(part_guid, 2, 1,
 			 do_avb_get_get_unique_guid_for_partition, "", ""),
 	U_BOOT_CMD_MKENT(read, 4, 1, do_avb_read, "", ""),
-	U_BOOT_CMD_MKENT(write, 4, 1, do_avb_write, "", ""),
 	U_BOOT_CMD_MKENT(readabmisc, 1, 1, do_avb_read_ab_metadata, "", ""),
-	U_BOOT_CMD_MKENT(writeabmisc, 1, 1, do_avb_write_ab_metadata, "", ""),
 	U_BOOT_CMD_MKENT(perm_attr_test, 1, 1, do_perm_attr_test, "", ""),
 	U_BOOT_CMD_MKENT(verify, 3, 1, do_avb_verify_partition, "", ""),
 	U_BOOT_CMD_MKENT(flow, 2, 1, do_avb_flow, "", "")
@@ -883,15 +863,13 @@ U_BOOT_CMD(
 	"bootavb slot_unbootable cnt\n"
 	"bootavb slot_successful cnt\n"
 	"bootavb read_rollback rollback_index_location\n"
-	"bootavb write_rollback rollback_index_location out_rollback_index\n"
+	"bootavb write_rollback rollback_index_location rollback_index\n"
 	"bootavb read_lock_status\n"
 	"bootavb write_lock_status 0 or 1\n"
 	"bootavb part_size partitions_name\n"
 	"bootavb part_guid partitions_name\n"
 	"bootavb read partition offset_blk cnt\n"
-	"bootavb write partition offset_blk cnt\n"
 	"bootavb readabmisc\n"
-	"bootavb writeabmisc\n"
 	"bootavb perm_attr_test\n"
 	"bootavb verify partition slot_cnt;partion name without '_a' or '_b'\n"
 	"bootavb flow v/n\n"

commit d34064effa44cb69bf87cba77adaee72f4185d35
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jul 4 11:18:11 2018 +0800

    android: get dev_desc by rockchip_get_bootdev()
    
    Get dev_desc by call rockchip_get_bootdev() but not
    default mmc 0.
    
    Change-Id: I78c6760eb6410a14a9f767db2f90902ec97f432f
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index a92b31d327..090da46998 100755
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -211,7 +211,6 @@ static int android_bootloader_boot_bootloader(void)
 static int android_bootloader_get_fdt(const char *part_name,
 		const char *load_file_name)
 {
-	const char *dev_iface = "mmc";
 	struct blk_desc *dev_desc;
 	disk_partition_t boot_part_info;
 	char *fdt_addr = NULL;
@@ -222,12 +221,11 @@ static int android_bootloader_get_fdt(const char *part_name,
 	loff_t len_read;
 	unsigned long addr = 0;
 	int part_num = -1;
-	int dev_num = 0;
 	int ret;
 
-	dev_desc = blk_get_dev(dev_iface, dev_num);
+	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {
-		printf("Could not find %s %d\n", dev_iface, dev_num);
+		printf("%s: dev_desc is NULL!\n", __func__);
 		return -1;
 	}
 
@@ -251,7 +249,7 @@ static int android_bootloader_get_fdt(const char *part_name,
 #endif
 
 	snprintf(dev_part, ARRAY_SIZE(dev_part), ":%x", part_num);
-	if (fs_set_blk_dev(dev_iface, dev_part, FS_TYPE_EXT))
+	if (fs_set_blk_dev_with_part(dev_desc, part_num))
 		return -1;
 
 	fdt_addr = env_get("fdt_addr_r");
@@ -620,14 +618,12 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 
 int android_avb_boot_flow(char *slot_suffix, unsigned long kernel_address)
 {
-	const char *dev_iface = "mmc";
-	int dev_num = 0;
 	struct blk_desc *dev_desc;
 	disk_partition_t boot_part_info;
 	int ret;
-	dev_desc = blk_get_dev(dev_iface, dev_num);
+	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {
-		printf("Could not find %s %d\n", dev_iface, dev_num);
+		printf("%s: dev_desc is NULL!\n", __func__);
 		return -1;
 	}
 	/* Load the kernel from the desired "boot" partition. */
@@ -646,14 +642,12 @@ int android_avb_boot_flow(char *slot_suffix, unsigned long kernel_address)
 
 int android_boot_flow(unsigned long kernel_address)
 {
-	const char *dev_iface = "mmc";
-	int dev_num = 0;
 	struct blk_desc *dev_desc;
 	disk_partition_t boot_part_info;
 	int ret;
-	dev_desc = blk_get_dev(dev_iface, dev_num);
+	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {
-		printf("Could not find %s %d\n", dev_iface, dev_num);
+		printf("%s: dev_desc is NULL!\n", __func__);
 		return -1;
 	}
 	/* Load the kernel from the desired "boot" partition. */

commit 65413a00f94435b88ee3f5b4afd5619f74e5a2a5
Author: Jian Qiu <qiujian@rock-chips.com>
Date:   Thu Jul 5 09:09:55 2018 +0800

    fastboot: add FASTBOOT_OEM_UNLOCK option
    
    This enables the following fastboot commands:
      fastboot oem unlock
      fastboot oem unlock_accept
      fastboot oem lock
      fastboot getvar oem-unlock
    
    Android 8.1 need the oem unlock status attach to bootargs on boot.
    
    Change-Id: Icc83451336a4dea2cbcf4927287de23bc8e28cb1
    Signed-off-by: Jian Qiu <qiujian@rock-chips.com>

diff --git a/cmd/bootrkp.c b/cmd/bootrkp.c
index fd104f4874..c13e0dcab0 100755
--- a/cmd/bootrkp.c
+++ b/cmd/bootrkp.c
@@ -41,7 +41,7 @@ static int do_boot_rockchip(cmd_tbl_t *cmdtp, int flag, int argc,
 		load_attestation_key(dev_desc, &misc_part_info);
 #endif
 
-#ifdef CONFIG_OPTEE_CLIENT
+#ifdef CONFIG_FASTBOOT_OEM_UNLOCK
 	/* read oem unlock status and attach to bootargs */
 	uint8_t unlock = 0;
 	TEEC_Result result;
diff --git a/cmd/fastboot/Kconfig b/cmd/fastboot/Kconfig
index 453cc49057..14a1effd61 100644
--- a/cmd/fastboot/Kconfig
+++ b/cmd/fastboot/Kconfig
@@ -82,6 +82,15 @@ config FASTBOOT_FLASH_MMC_DEV
 	  regarding the non-volatile storage device. Define this to
 	  the eMMC device that fastboot should use to store the image.
 
+config FASTBOOT_OEM_UNLOCK
+	bool "Enable FASTBOOT OEM UNLOCK command"
+	depends on OPTEE_CLIENT
+	help
+	  This enables the command "fastboot oem unlock" the fastboot
+	  oem unlock command requires tee security storage to store
+	  unlock status. oem unlock status attach to bootargs on boot.
+
+
 endif # USB_FUNCTION_FASTBOOT || UDP_FUNCTION_FASTBOOT
 
 endif # FASTBOOT
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 97d01a7b00..a92b31d327 100755
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -582,7 +582,7 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	env_set_ulong("android_root_devnum", dev_desc->devnum);
 	env_set("android_slotsufix", slot_suffix);
 
-#ifdef CONFIG_OPTEE_CLIENT
+#ifdef CONFIG_FASTBOOT_OEM_UNLOCK
 	/* read oem unlock status and attach to bootargs */
 	uint8_t unlock = 0;
 	TEEC_Result result;
diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index b6edd661e9..502d936088 100755
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -688,7 +688,7 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req)
 			strncat(response, part_size_str, chars_left);
 		}
 	} else if (!strncmp("oem-unlock", cmd, 10)) {
-#ifdef CONFIG_OPTEE_CLIENT
+#ifdef CONFIG_FASTBOOT_OEM_UNLOCK
 #ifdef CONFIG_RK_AVB_LIBAVB_USER
 		fastboot_tx_write_str("FAILnot implemented");
 		return;
@@ -1182,7 +1182,7 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 	} else
 #endif
 	if (strncmp("unlock", cmd + 4, 8) == 0) {
-#ifdef CONFIG_OPTEE_CLIENT
+#ifdef CONFIG_FASTBOOT_OEM_UNLOCK
 #ifdef CONFIG_RK_AVB_LIBAVB_USER
 		fastboot_tx_write_str("FAILnot implemented");
 		return;
@@ -1214,7 +1214,7 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 		return;
 #endif
 	} else if (strncmp("unlock_accept", cmd + 4, 13) == 0) {
-#ifdef CONFIG_OPTEE_CLIENT
+#ifdef CONFIG_FASTBOOT_OEM_UNLOCK
 #ifdef CONFIG_RK_AVB_LIBAVB_USER
 		fastboot_tx_write_str("FAILnot implemented");
 		return;
@@ -1271,7 +1271,7 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 		return;
 #endif
 	} else if (strncmp("lock", cmd + 4, 8) == 0) {
-#ifdef CONFIG_OPTEE_CLIENT
+#ifdef CONFIG_FASTBOOT_OEM_UNLOCK
 #ifdef CONFIG_RK_AVB_LIBAVB_USER
 		fastboot_tx_write_str("FAILnot implemented");
 		return;

commit f6d4196e0f044cdb0f22ef8c7d3a989143d7ad32
Author: YouMin Chen <cym@rock-chips.com>
Date:   Thu Jun 28 10:18:51 2018 +0800

    rockchip: px30: enable tpl and spl support
    
    Because px30 sram size is small, so need define CONFIG_TPL_TINY_FRAMEWORK
    to reduce TPL size when build TPL firmware.
    
    Change-Id: I5c190946314725e325e14599707a2be5b2e4ec22
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index fa8efc7f16..bd09ce3917 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -5,6 +5,15 @@ config ROCKCHIP_PX30
 	select ARM64
 	select GICV2
 	select ARM_SMCCC
+	select SUPPORT_SPL
+	select SUPPORT_TPL
+	select SPL
+	select TPL
+	select TPL_TINY_FRAMEWORK if TPL
+
+	imply SPL_SERIAL_SUPPORT
+	imply TPL_SERIAL_SUPPORT
+	select DEBUG_UART_BOARD_INIT
 	help
 	  The Rockchip PX30 is a ARM-based SoC with a quad-core Cortex-A35
 	  including NEON and GPU, Mali-400 graphics, several DDR3 options
@@ -13,6 +22,15 @@ config ROCKCHIP_PX30
 
 if ROCKCHIP_PX30
 
+config TPL_LDSCRIPT
+	default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
+
+config TPL_TEXT_BASE
+	default 0xff0e1000
+
+config TPL_MAX_SIZE
+	default 10240
+
 config ROCKCHIP_RK3326
 	bool "Support Rockchip RK3326 "
 	help
diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
old mode 100755
new mode 100644
index 1b9c740d50..ff21ecf5c4
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -1,8 +1,13 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_PX30=y
+CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_TARGET_EVB_PX30=y
 CONFIG_DEFAULT_DEVICE_TREE="px30-evb"
@@ -10,8 +15,13 @@ CONFIG_DEBUG_UART=y
 CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
@@ -27,11 +37,15 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_RKPARM_PARTITION=y
+CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
 CONFIG_CLK=y
+CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 # CONFIG_CMD_NET is not set
 CONFIG_SYS_I2C_ROCKCHIP=y
@@ -53,6 +67,8 @@ CONFIG_DM_CHARGE_DISPLAY=y
 CONFIG_CHARGE_ANIMATION=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
 CONFIG_DM_RESET=y
 CONFIG_RKNAND=y
 CONFIG_BAUDRATE=1500000
@@ -60,7 +76,6 @@ CONFIG_DEBUG_UART_BASE=0xFF160000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_DEBUG_UART_BOARD_INIT=y
-CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
diff --git a/configs/evb-rk3326_defconfig b/configs/evb-rk3326_defconfig
index bd6b65ad42..de933e1251 100644
--- a/configs/evb-rk3326_defconfig
+++ b/configs/evb-rk3326_defconfig
@@ -1,9 +1,14 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_PX30=y
 CONFIG_ROCKCHIP_RK3326=y
+CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_TARGET_EVB_PX30=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3326-evb"
@@ -11,8 +16,13 @@ CONFIG_DEBUG_UART=y
 CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
@@ -28,11 +38,15 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_RKPARM_PARTITION=y
+CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
 CONFIG_CLK=y
+CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y
@@ -54,6 +68,8 @@ CONFIG_DM_CHARGE_DISPLAY=y
 CONFIG_CHARGE_ANIMATION=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
 CONFIG_DM_RESET=y
 CONFIG_RKNAND=y
 CONFIG_BAUDRATE=1500000
@@ -61,7 +77,6 @@ CONFIG_DEBUG_UART_BASE=0xFF160000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_DEBUG_UART_BOARD_INIT=y
-CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
diff --git a/configs/rk3326_defconfig b/configs/rk3326_defconfig
index feac2a1a08..956fb9f91d 100644
--- a/configs/rk3326_defconfig
+++ b/configs/rk3326_defconfig
@@ -1,9 +1,14 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_PX30=y
 CONFIG_ROCKCHIP_RK3326=y
+CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_TARGET_EVB_PX30=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3326-evb"
@@ -11,8 +16,13 @@ CONFIG_DEBUG_UART=y
 CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
@@ -28,11 +38,15 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_RKPARM_PARTITION=y
+CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
 CONFIG_CLK=y
+CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y
@@ -54,6 +68,8 @@ CONFIG_DM_CHARGE_DISPLAY=y
 CONFIG_CHARGE_ANIMATION=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
 CONFIG_DM_RESET=y
 CONFIG_RKNAND=y
 CONFIG_BAUDRATE=1500000
@@ -61,7 +77,6 @@ CONFIG_DEBUG_UART_BASE=0xFF160000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_DEBUG_UART_BOARD_INIT=y
-CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y

commit 846371a2e87c99e3a4c64d355b4d61b362735b5a
Author: YouMin Chen <cym@rock-chips.com>
Date:   Thu Jun 28 10:18:12 2018 +0800

    rockchip: px30: spl: fix spl compile error
    
    fix spl compile error about defined CONFIG_BOOTCOMMAND.
    
    Change-Id: I0a16e50f2f0ea8c283aa43ed78c7264e910ed4a8
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/include/configs/evb_px30.h b/include/configs/evb_px30.h
index ae92c55fdb..1717f2d1bc 100644
--- a/include/configs/evb_px30.h
+++ b/include/configs/evb_px30.h
@@ -19,7 +19,9 @@
 #define CONFIG_CONSOLE_SCROLL_LINES		10
 #define CONFIG_SUPPORT_EMMC_RPMB
 
+#ifndef CONFIG_SPL_BUILD
 #undef CONFIG_BOOTCOMMAND
 #define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
+#endif
 
 #endif

commit 4d65b3b35255b58bc0afc611e662a554b09dbaba
Author: YouMin Chen <cym@rock-chips.com>
Date:   Thu Jun 28 10:17:30 2018 +0800

    rockchip: px30: spl: change CONFIG_SPL_MAX_SIZE to 0x20000
    
    px30 spl size over 0x10000,so set CONFIG_SPL_MAX_SIZE to 0x20000.
    
    Change-Id: I3e9bea5ccb7d4516ecc4881eb2d454e1afdcabb0
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index 9b93951315..a948c5df24 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -22,7 +22,7 @@
 #define CONFIG_SYS_LOAD_ADDR		0x00800800
 #define CONFIG_SPL_STACK		0x00400000
 #define CONFIG_SPL_TEXT_BASE		0x00000000
-#define CONFIG_SPL_MAX_SIZE		0x10000
+#define CONFIG_SPL_MAX_SIZE		0x20000
 #define CONFIG_SPL_BSS_START_ADDR	0x2000000
 #define CONFIG_SPL_BSS_MAX_SIZE		0x2000
 #define CONFIG_SYS_BOOTM_LEN		(64 << 20)	/* 64M */

commit 1881cdb1bc0debc2d5c5e1f752bc5bca78ae8fc0
Author: YouMin Chen <cym@rock-chips.com>
Date:   Fri Jul 6 09:14:32 2018 +0800

    drivers: ram: rockchip: add px30 sdram init code
    
    Change-Id: Ia7496d062d3041e22f26cb9ee91e72f6f463cde5
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_px30.h b/arch/arm/include/asm/arch-rockchip/sdram_px30.h
new file mode 100644
index 0000000000..6b20b8eed4
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/sdram_px30.h
@@ -0,0 +1,592 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * Copyright (C) 2018 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _ASM_ARCH_SDRAM_PX30_H
+#define _ASM_ARCH_SDRAM_PX30_H
+
+#define SR_IDLE				93
+#define PD_IDLE				13
+#define PATTERN				(0x5aa5f00f)
+
+/* ddr pctl registers define */
+#define DDR_PCTL2_MSTR			0x0
+#define DDR_PCTL2_STAT			0x4
+#define DDR_PCTL2_MSTR1			0x8
+#define DDR_PCTL2_MRCTRL0		0x10
+#define DDR_PCTL2_MRCTRL1		0x14
+#define DDR_PCTL2_MRSTAT		0x18
+#define DDR_PCTL2_MRCTRL2		0x1c
+#define DDR_PCTL2_DERATEEN		0x20
+#define DDR_PCTL2_DERATEINT		0x24
+#define DDR_PCTL2_PWRCTL		0x30
+#define DDR_PCTL2_PWRTMG		0x34
+#define DDR_PCTL2_HWLPCTL		0x38
+#define DDR_PCTL2_RFSHCTL0		0x50
+#define DDR_PCTL2_RFSHCTL1		0x54
+#define DDR_PCTL2_RFSHCTL2		0x58
+#define DDR_PCTL2_RFSHCTL4		0x5c
+#define DDR_PCTL2_RFSHCTL3		0x60
+#define DDR_PCTL2_RFSHTMG		0x64
+#define DDR_PCTL2_RFSHTMG1		0x68
+#define DDR_PCTL2_RFSHCTL5		0x6c
+#define DDR_PCTL2_INIT0			0xd0
+#define DDR_PCTL2_INIT1			0xd4
+#define DDR_PCTL2_INIT2			0xd8
+#define DDR_PCTL2_INIT3			0xdc
+#define DDR_PCTL2_INIT4			0xe0
+#define DDR_PCTL2_INIT5			0xe4
+#define DDR_PCTL2_INIT6			0xe8
+#define DDR_PCTL2_INIT7			0xec
+#define DDR_PCTL2_DIMMCTL		0xf0
+#define DDR_PCTL2_RANKCTL		0xf4
+#define DDR_PCTL2_CHCTL			0xfc
+#define DDR_PCTL2_DRAMTMG0		0x100
+#define DDR_PCTL2_DRAMTMG1		0x104
+#define DDR_PCTL2_DRAMTMG2		0x108
+#define DDR_PCTL2_DRAMTMG3		0x10c
+#define DDR_PCTL2_DRAMTMG4		0x110
+#define DDR_PCTL2_DRAMTMG5		0x114
+#define DDR_PCTL2_DRAMTMG6		0x118
+#define DDR_PCTL2_DRAMTMG7		0x11c
+#define DDR_PCTL2_DRAMTMG8		0x120
+#define DDR_PCTL2_DRAMTMG9		0x124
+#define DDR_PCTL2_DRAMTMG10		0x128
+#define DDR_PCTL2_DRAMTMG11		0x12c
+#define DDR_PCTL2_DRAMTMG12		0x130
+#define DDR_PCTL2_DRAMTMG13		0x134
+#define DDR_PCTL2_DRAMTMG14		0x138
+#define DDR_PCTL2_DRAMTMG15		0x13c
+#define DDR_PCTL2_DRAMTMG16		0x140
+#define DDR_PCTL2_ZQCTL0		0x180
+#define DDR_PCTL2_ZQCTL1		0x184
+#define DDR_PCTL2_ZQCTL2		0x188
+#define DDR_PCTL2_ZQSTAT		0x18c
+#define DDR_PCTL2_DFITMG0		0x190
+#define DDR_PCTL2_DFITMG1		0x194
+#define DDR_PCTL2_DFILPCFG0		0x198
+#define DDR_PCTL2_DFILPCFG1		0x19c
+#define DDR_PCTL2_DFIUPD0		0x1a0
+#define DDR_PCTL2_DFIUPD1		0x1a4
+#define DDR_PCTL2_DFIUPD2		0x1a8
+#define DDR_PCTL2_DFIMISC		0x1b0
+#define DDR_PCTL2_DFITMG2		0x1b4
+#define DDR_PCTL2_DFITMG3		0x1b8
+#define DDR_PCTL2_DFISTAT		0x1bc
+#define DDR_PCTL2_DBICTL		0x1c0
+#define DDR_PCTL2_ADDRMAP0		0x200
+#define DDR_PCTL2_ADDRMAP1		0x204
+#define DDR_PCTL2_ADDRMAP2		0x208
+#define DDR_PCTL2_ADDRMAP3		0x20c
+#define DDR_PCTL2_ADDRMAP4		0x210
+#define DDR_PCTL2_ADDRMAP5		0x214
+#define DDR_PCTL2_ADDRMAP6		0x218
+#define DDR_PCTL2_ADDRMAP7		0x21c
+#define DDR_PCTL2_ADDRMAP8		0x220
+#define DDR_PCTL2_ADDRMAP9		0x224
+#define DDR_PCTL2_ADDRMAP10		0x228
+#define DDR_PCTL2_ADDRMAP11		0x22c
+#define DDR_PCTL2_ODTCFG		0x240
+#define DDR_PCTL2_ODTMAP		0x244
+#define DDR_PCTL2_SCHED			0x250
+#define DDR_PCTL2_SCHED1		0x254
+#define DDR_PCTL2_PERFHPR1		0x25c
+#define DDR_PCTL2_PERFLPR1		0x264
+#define DDR_PCTL2_PERFWR1		0x26c
+#define DDR_PCTL2_DQMAP0		0x280
+#define DDR_PCTL2_DQMAP1		0x284
+#define DDR_PCTL2_DQMAP2		0x288
+#define DDR_PCTL2_DQMAP3		0x28c
+#define DDR_PCTL2_DQMAP4		0x290
+#define DDR_PCTL2_DQMAP5		0x294
+#define DDR_PCTL2_DBG0			0x300
+#define DDR_PCTL2_DBG1			0x304
+#define DDR_PCTL2_DBGCAM		0x308
+#define DDR_PCTL2_DBGCMD		0x30c
+#define DDR_PCTL2_DBGSTAT		0x310
+#define DDR_PCTL2_SWCTL			0x320
+#define DDR_PCTL2_SWSTAT		0x324
+#define DDR_PCTL2_POISONCFG		0x36c
+#define DDR_PCTL2_POISONSTAT		0x370
+#define DDR_PCTL2_ADVECCINDEX		0x374
+#define DDR_PCTL2_ADVECCSTAT		0x378
+#define DDR_PCTL2_PSTAT			0x3fc
+#define DDR_PCTL2_PCCFG			0x400
+#define DDR_PCTL2_PCFGR_n		0x404
+#define DDR_PCTL2_PCFGW_n		0x408
+#define DDR_PCTL2_PCTRL_n		0x490
+
+/* PCTL2_MRSTAT */
+#define MR_WR_BUSY			BIT(0)
+
+/* PHY_REG0 */
+#define DIGITAL_DERESET			BIT(3)
+#define ANALOG_DERESET			BIT(2)
+#define DIGITAL_RESET			(0 << 3)
+#define ANALOG_RESET			(0 << 2)
+
+/* PHY_REG1 */
+#define PHY_DDR2			(0)
+#define PHY_LPDDR2			(1)
+#define PHY_DDR3			(2)
+#define PHY_LPDDR3			(3)
+#define PHY_DDR4			(4)
+#define PHY_BL_4			(0 << 2)
+#define PHY_BL_8			BIT(2)
+
+/* PHY_REG2 */
+#define PHY_DTT_EN			BIT(0)
+#define PHY_DTT_DISB			(0 << 0)
+#define PHY_WRITE_LEVELING_EN		BIT(2)
+#define PHY_WRITE_LEVELING_DISB		(0 << 2)
+#define PHY_SELECT_CS0			(2)
+#define PHY_SELECT_CS1			(1)
+#define PHY_SELECT_CS0_1		(0)
+#define PHY_WRITE_LEVELING_SELECTCS(n)	((n) << 6)
+#define PHY_DATA_TRAINING_SELECTCS(n)	((n) << 4)
+
+#define PHY_DDR3_RON_RTT_DISABLE	(0)
+#define PHY_DDR3_RON_RTT_451ohm		(1)
+#define PHY_DDR3_RON_RTT_225ohm		(2)
+#define PHY_DDR3_RON_RTT_150ohm		(3)
+#define PHY_DDR3_RON_RTT_112ohm		(4)
+#define PHY_DDR3_RON_RTT_90ohm		(5)
+#define PHY_DDR3_RON_RTT_75ohm		(6)
+#define PHY_DDR3_RON_RTT_64ohm		(7)
+#define PHY_DDR3_RON_RTT_56ohm		(16)
+#define PHY_DDR3_RON_RTT_50ohm		(17)
+#define PHY_DDR3_RON_RTT_45ohm		(18)
+#define PHY_DDR3_RON_RTT_41ohm		(19)
+#define PHY_DDR3_RON_RTT_37ohm		(20)
+#define PHY_DDR3_RON_RTT_34ohm		(21)
+#define PHY_DDR3_RON_RTT_33ohm		(22)
+#define PHY_DDR3_RON_RTT_30ohm		(23)
+#define PHY_DDR3_RON_RTT_28ohm		(24)
+#define PHY_DDR3_RON_RTT_26ohm		(25)
+#define PHY_DDR3_RON_RTT_25ohm		(26)
+#define PHY_DDR3_RON_RTT_23ohm		(27)
+#define PHY_DDR3_RON_RTT_22ohm		(28)
+#define PHY_DDR3_RON_RTT_21ohm		(29)
+#define PHY_DDR3_RON_RTT_20ohm		(30)
+#define PHY_DDR3_RON_RTT_19ohm		(31)
+
+#define PHY_DDR4_LPDDR3_RON_RTT_DISABLE	(0)
+#define PHY_DDR4_LPDDR3_RON_RTT_480ohm	(1)
+#define PHY_DDR4_LPDDR3_RON_RTT_240ohm	(2)
+#define PHY_DDR4_LPDDR3_RON_RTT_160ohm	(3)
+#define PHY_DDR4_LPDDR3_RON_RTT_120ohm	(4)
+#define PHY_DDR4_LPDDR3_RON_RTT_96ohm	(5)
+#define PHY_DDR4_LPDDR3_RON_RTT_80ohm	(6)
+#define PHY_DDR4_LPDDR3_RON_RTT_68ohm	(7)
+#define PHY_DDR4_LPDDR3_RON_RTT_60ohm	(16)
+#define PHY_DDR4_LPDDR3_RON_RTT_53ohm	(17)
+#define PHY_DDR4_LPDDR3_RON_RTT_48ohm	(18)
+#define PHY_DDR4_LPDDR3_RON_RTT_43ohm	(19)
+#define PHY_DDR4_LPDDR3_RON_RTT_40ohm	(20)
+#define PHY_DDR4_LPDDR3_RON_RTT_37ohm	(21)
+#define PHY_DDR4_LPDDR3_RON_RTT_34ohm	(22)
+#define PHY_DDR4_LPDDR3_RON_RTT_32ohm	(23)
+#define PHY_DDR4_LPDDR3_RON_RTT_30ohm	(24)
+#define PHY_DDR4_LPDDR3_RON_RTT_28ohm	(25)
+#define PHY_DDR4_LPDDR3_RON_RTT_26ohm	(26)
+#define PHY_DDR4_LPDDR3_RON_RTT_25ohm	(27)
+#define PHY_DDR4_LPDDR3_RON_RTT_24ohm	(28)
+#define PHY_DDR4_LPDDR3_RON_RTT_22ohm	(29)
+#define PHY_DDR4_LPDDR3_RON_RTT_21ohm	(30)
+#define PHY_DDR4_LPDDR3_RON_RTT_20ohm	(31)
+
+/* noc registers define */
+#define DEVICECONF			0x8
+#define DEVICESIZE			0xc
+#define DDRTIMINGA0			0x10
+#define DDRTIMINGB0			0x14
+#define DDRTIMINGC0			0x18
+#define DEVTODEV0			0x1c
+#define DDRMODE				0x110
+#define DDR4TIMING			0x114
+#define AGINGX0				0x1000
+#define AGING0				0x1040
+#define AGING1				0x1044
+#define AGING2				0x1048
+#define AGING3				0x104c
+
+/* PMUGRF */
+#define PMUGRF_OS_REG0			(0x200)
+#define PMUGRF_OS_REG(n)		(PMUGRF_OS_REG0 + (n) * 4)
+
+/* DDR GRF */
+#define DDR_GRF_CON(n)			(0 + (n) * 4)
+#define DDR_GRF_STATUS_BASE		(0X100)
+#define DDR_GRF_STATUS(n)		(DDR_GRF_STATUS_BASE + (n) * 4)
+#define DDR_GRF_LP_CON			(0x20)
+
+#define SPLIT_MODE_32_L16_VALID		(0)
+#define SPLIT_MODE_32_H16_VALID		(1)
+#define SPLIT_MODE_16_L8_VALID		(2)
+#define SPLIT_MODE_16_H8_VALID		(3)
+
+#define DDR_GRF_SPLIT_CON		(0x8)
+#define SPLIT_MODE_MASK			(0x3)
+#define SPLIT_MODE_OFFSET		(9)
+#define SPLIT_BYPASS_MASK		(1)
+#define SPLIT_BYPASS_OFFSET		(8)
+#define SPLIT_SIZE_MASK			(0xff)
+#define SPLIT_SIZE_OFFSET		(0)
+
+/*
+ * sys_reg bitfield struct
+ * [31]		row_3_4_ch1
+ * [30]		row_3_4_ch0
+ * [29:28]	chinfo
+ * [27]		rank_ch1
+ * [26:25]	col_ch1
+ * [24]		bk_ch1
+ * [23:22]	cs0_row_ch1
+ * [21:20]	cs1_row_ch1
+ * [19:18]	bw_ch1
+ * [17:16]	dbw_ch1;
+ * [15:13]	ddrtype
+ * [12]		channelnum
+ * [11]		rank_ch0
+ * [10:9]	col_ch0
+ * [8]		bk_ch0
+ * [7:6]	cs0_row_ch0
+ * [5:4]	cs1_row_ch0
+ * [3:2]	bw_ch0
+ * [1:0]	dbw_ch0
+ */
+
+#define DDR_SYS_REG_VERSION		(0x2)
+#define SYS_REG_ENC_ROW_3_4(n)		((n) << 30)
+#define SYS_REG_DEC_ROW_3_4(n)		(((n) >> 30) & 0x1)
+#define SYS_REG_ENC_CHINFO()		(1 << 28)
+#define SYS_REG_ENC_DDRTYPE(n)		((n) << 13)
+#define SYS_REG_DEC_DDRTYPE(n)		(((n) >> 13) & 0x7)
+#define SYS_REG_ENC_NUM_CH(n)		(((n) - 1) << 12)
+#define SYS_REG_DEC_NUM_CH(n)		(1 + (((n) >> 12) & 0x1))
+#define SYS_REG_ENC_RANK(n)		(((n) - 1) << 11)
+#define SYS_REG_DEC_RANK(n)		(1 + (((n) >> 11) & 0x1))
+#define SYS_REG_ENC_COL(n)		(((n) - 9) << 9)
+#define SYS_REG_DEC_COL(n)		(9 + (((n) >> 9) & 0x3))
+#define SYS_REG_ENC_BK(n)		(((n) == 3 ? 0 : 1) << 8)
+#define SYS_REG_DEC_BK(n)		(3 - (((n) >> 8) & 0x1))
+#define SYS_REG_ENC_CS0_ROW(n)		(((n) - 13) << 6)
+#define SYS_REG_DEC_CS0_ROW(n)		(13 + (((n) >> 6) & 0x3))
+#define SYS_REG_ENC_BW(n)		((2 >> (n)) << 2)
+#define SYS_REG_DEC_BW(n)		(2 >> (((n) >> 2) & 0x3))
+#define SYS_REG_ENC_DBW(n)		((2 >> (n)) << 0)
+#define SYS_REG_DEC_DBW(n)		(2 >> (((n) >> 0) & 0x3))
+/* sys reg 3 */
+#define SYS_REG_ENC_VERSION(n)		((n) << 28)
+#define SYS_REG_DEC_VERSION(n)		(((n) >> 28) & 0xf)
+#define SYS_REG_ENC_CS0_ROW_(n, os_reg2, os_reg3) do {	\
+			(os_reg2) |= (((n) - 13) & 0x3) << 6;\
+			(os_reg3) |= ((((n) - 13) & 0x4) >> 2) << 5; \
+		} while (0)
+
+#define SYS_REG_DEC_CS0_ROW_(os_reg2, os_reg3)	\
+		((((((os_reg2) >> 6 & 0x3) | \
+		 ((((os_reg3) >> 5) & 0x1) << 2)) + 1) & 0x7) + 12)
+
+#define SYS_REG_ENC_CS1_ROW_(n, os_reg2, os_reg3) do {	\
+			(os_reg2) &= (~(0x3 << 4));\
+			(os_reg3) &= (~(0x1 << 4));\
+			(os_reg2) |= (((n) - 13) & 0x3) << 4;\
+			(os_reg3) |= ((((n) - 13) & 0x4) >> 2) << 4; \
+		} while (0)
+
+#define SYS_REG_DEC_CS1_ROW_(os_reg2, os_reg3)	\
+		((((((os_reg2) >> 4 & 0x3) | \
+		 ((((os_reg3) >> 4) & 0x1) << 2)) + 1) & 0x7) + 12)
+
+#define SYS_REG_ENC_CS1_COL(n)		(((n) - 9) << 0)
+#define SYS_REG_DEC_CS1_COL(n)		(9 + (((n) >> 0) & 0x3))
+
+/* CRU define */
+/* CRU_PLL_CON0 */
+#define PB(n)				((0x1 << (15 + 16)) | ((n) << 15))
+#define POSTDIV1(n)			((0x7 << (12 + 16)) | ((n) << 12))
+#define FBDIV(n)			((0xFFF << 16) | (n))
+
+/* CRU_PLL_CON1 */
+#define RSTMODE(n)			((0x1 << (15 + 16)) | ((n) << 15))
+#define RST(n)				((0x1 << (14 + 16)) | ((n) << 14))
+#define PD(n)				((0x1 << (13 + 16)) | ((n) << 13))
+#define DSMPD(n)			((0x1 << (12 + 16)) | ((n) << 12))
+#define LOCK(n)				(((n) >> 10) & 0x1)
+#define POSTDIV2(n)			((0x7 << (6 + 16)) | ((n) << 6))
+#define REFDIV(n)			((0x3F << 16) | (n))
+
+/* CRU_MODE */
+#define CLOCK_FROM_XIN_OSC		(0)
+#define CLOCK_FROM_PLL			(1)
+#define CLOCK_FROM_RTC_32K		(2)
+#define DPLL_MODE(n)			((0x3 << (4 + 16)) | ((n) << 4))
+
+/* CRU_SOFTRESET_CON1 */
+#define upctl2_psrstn_req(n)		(((0x1 << 6) << 16) | ((n) << 6))
+#define upctl2_asrstn_req(n)		(((0x1 << 5) << 16) | ((n) << 5))
+#define upctl2_srstn_req(n)		(((0x1 << 4) << 16) | ((n) << 4))
+
+/* CRU_SOFTRESET_CON2 */
+#define ddrphy_psrstn_req(n)		(((0x1 << 2) << 16) | ((n) << 2))
+#define ddrphy_srstn_req(n)		(((0x1 << 0) << 16) | ((n) << 0))
+
+/* CRU register */
+#define CRU_PLL_CON(pll_id, n)		((pll_id)  * 0x20 + (n) * 4)
+#define CRU_MODE			(0xa0)
+#define CRU_GLB_CNT_TH			(0xb0)
+#define CRU_CLKSEL_CON_BASE		0x100
+#define CRU_CLKSELS_CON(i)		(CRU_CLKSEL_CON_BASE + ((i) * 4))
+#define CRU_CLKGATE_CON_BASE		0x200
+#define CRU_CLKGATE_CON(i)		(CRU_CLKGATE_CON_BASE + ((i) * 4))
+#define CRU_CLKSFTRST_CON_BASE		0x300
+#define CRU_CLKSFTRST_CON(i)		(CRU_CLKSFTRST_CON_BASE + ((i) * 4))
+
+u8 ddr_cfg_2_rbc[] = {
+	/*
+	 * [6:4] max row: 13+n
+	 * [3]  bank(0:4bank,1:8bank)
+	 * [2:0]    col(10+n)
+	 */
+	((5 << 4) | (1 << 3) | 0), /* 0 */
+	((5 << 4) | (1 << 3) | 1), /* 1 */
+	((4 << 4) | (1 << 3) | 2), /* 2 */
+	((3 << 4) | (1 << 3) | 3), /* 3 */
+	((2 << 4) | (1 << 3) | 4), /* 4 */
+	((5 << 4) | (0 << 3) | 2), /* 5 */
+	((4 << 4) | (1 << 3) | 2), /* 6 */
+	/*((0<<3)|3),*/	 /* 12 for ddr4 */
+	/*((1<<3)|1),*/  /* 13 B,C exchange for rkvdec */
+};
+
+/*
+ * for ddr4 if ddrconfig=7, upctl should set 7 and noc should
+ * set to 1 for more efficient.
+ * noc ddrconf, upctl addrmap
+ * 1  7
+ * 2  8
+ * 3  9
+ * 12 10
+ * 5  11
+ */
+u8 d4_rbc_2_d3_rbc[] = {
+	1, /* 7 */
+	2, /* 8 */
+	3, /* 9 */
+	12, /* 10 */
+	5, /* 11 */
+};
+
+/*
+ * row higher than cs should be disabled by set to 0xf
+ * rank addrmap calculate by real cap.
+ */
+u32 addrmap[][8] = {
+	/* map0 map1,   map2,       map3,       map4,      map5
+	 * map6,        map7,       map8
+	 * -------------------------------------------------------
+	 * bk2-0       col 5-2     col 9-6    col 11-10   row 11-0
+	 * row 15-12   row 17-16   bg1,0
+	 * -------------------------------------------------------
+	 * 4,3,2       5-2         9-6                    6
+	 *                         3,2
+	 */
+	{0x00060606, 0x00000000, 0x1f1f0000, 0x00001f1f, 0x05050505,
+		0x05050505, 0x00000505, 0x3f3f}, /* 0 */
+	{0x00070707, 0x00000000, 0x1f000000, 0x00001f1f, 0x06060606,
+		0x06060606, 0x06060606, 0x3f3f}, /* 1 */
+	{0x00080808, 0x00000000, 0x00000000, 0x00001f1f, 0x07070707,
+		0x07070707, 0x00000f07, 0x3f3f}, /* 2 */
+	{0x00090909, 0x00000000, 0x00000000, 0x00001f00, 0x08080808,
+		0x08080808, 0x00000f0f, 0x3f3f}, /* 3 */
+	{0x000a0a0a, 0x00000000, 0x00000000, 0x00000000, 0x09090909,
+		0x0f090909, 0x00000f0f, 0x3f3f}, /* 4 */
+	{0x00080808, 0x00000000, 0x00000000, 0x00001f1f, 0x06060606,
+		0x06060606, 0x00000606, 0x3f3f}, /* 5 */
+	{0x00080808, 0x00000000, 0x00000000, 0x00001f1f, 0x07070707,
+		0x07070707, 0x00000f0f, 0x3f3f}, /* 6 */
+	{0x003f0808, 0x00000006, 0x1f1f0000, 0x00001f1f, 0x06060606,
+		0x06060606, 0x00000606, 0x0600}, /* 7 */
+	{0x003f0909, 0x00000007, 0x1f000000, 0x00001f1f, 0x07070707,
+		0x07070707, 0x00000f07, 0x0700}, /* 8 */
+	{0x003f0a0a, 0x01010100, 0x01010101, 0x00001f1f, 0x08080808,
+		0x08080808, 0x00000f0f, 0x0801}, /* 9 */
+	{0x003f0909, 0x01010100, 0x01010101, 0x00001f1f, 0x07070707,
+		0x07070707, 0x00000f07, 0x3f01}, /* 10 */
+	{0x003f0808, 0x00000007, 0x1f000000, 0x00001f1f, 0x06060606,
+		0x06060606, 0x00000606, 0x3f00}, /* 11 */
+	/* when ddr4 12 map to 10, when ddr3 12 unused */
+	{0x003f0909, 0x01010100, 0x01010101, 0x00001f1f, 0x07070707,
+		0x07070707, 0x00000f07, 0x3f01}, /* 10 */
+	{0x00070706, 0x00000000, 0x1f010000, 0x00001f1f, 0x06060606,
+		0x06060606, 0x00000606, 0x3f3f}, /* 13 */
+};
+
+union noc_ddrtiminga0 {
+	u32 d32;
+	struct {
+		unsigned acttoact : 6;
+		unsigned reserved0 : 2;
+		unsigned rdtomiss : 6;
+		unsigned reserved1 : 2;
+		unsigned wrtomiss : 6;
+		unsigned reserved2 : 2;
+		unsigned readlatency : 8;
+	} b;
+};
+
+union noc_ddrtimingb0 {
+	u32 d32;
+	struct {
+		unsigned rdtowr : 5;
+		unsigned reserved0 : 3;
+		unsigned wrtord : 5;
+		unsigned reserved1 : 3;
+		unsigned rrd : 4;
+		unsigned reserved2 : 4;
+		unsigned faw : 6;
+		unsigned reserved3 : 2;
+	} b;
+};
+
+union noc_ddrtimingc0 {
+	u32 d32;
+	struct {
+		unsigned burstpenalty : 4;
+		unsigned reserved0 : 4;
+		unsigned wrtomwr : 6;
+		unsigned reserved1 : 18;
+	} b;
+};
+
+union noc_devtodev0 {
+	u32 d32;
+	struct {
+		unsigned busrdtord : 3;
+		unsigned reserved0 : 1;
+		unsigned busrdtowr : 3;
+		unsigned reserved1 : 1;
+		unsigned buswrtord : 3;
+		unsigned reserved2 : 1;
+		unsigned buswrtowr : 3;
+		unsigned reserved3 : 17;
+	} b;
+};
+
+union noc_ddrmode {
+	u32 d32;
+	struct {
+		unsigned autoprecharge : 1;
+		unsigned bypassfiltering : 1;
+		unsigned fawbank : 1;
+		unsigned burstsize : 2;
+		unsigned mwrsize : 2;
+		unsigned reserved2 : 1;
+		unsigned forceorder : 8;
+		unsigned forceorderstate : 8;
+		unsigned reserved3 : 8;
+	} b;
+};
+
+union noc_ddr4timing {
+	u32 d32;
+	struct {
+		unsigned ccdl : 3;
+		unsigned wrtordl : 5;
+		unsigned rrdl : 4;
+		unsigned reserved1 : 20;
+	} b;
+};
+
+struct px30_msch_timings {
+	union noc_ddrtiminga0 ddrtiminga0;
+	union noc_ddrtimingb0 ddrtimingb0;
+	union noc_ddrtimingc0 ddrtimingc0;
+	union noc_devtodev0 devtodev0;
+	union noc_ddrmode ddrmode;
+	union noc_ddr4timing ddr4timing;
+	u32 agingx0;
+};
+
+struct px30_msch_regs {
+	u32 coreid;
+	u32 revisionid;
+	u32 deviceconf;
+	u32 devicesize;
+	u32 ddrtiminga0;
+	u32 ddrtimingb0;
+	u32 ddrtimingc0;
+	u32 devtodev0;
+	u32 reserved1[(0x110 - 0x20) / 4];
+	u32 ddrmode;
+	u32 ddr4timing;
+	u32 reserved2[(0x1000 - 0x118) / 4];
+	u32 agingx0;
+	u32 reserved3[(0x1040 - 0x1004) / 4];
+	u32 aging0;
+	u32 aging1;
+	u32 aging2;
+	u32 aging3;
+};
+
+struct px30_ddr_grf_regs {
+	u32 ddr_grf_con[4];
+	u32 reserved1[(0x20 - 0x10) / 4];
+	u32 ddr_grf_lp_con;
+	u32 reserved2[(0x100 - 0x24) / 4];
+	u32 ddr_grf_status[11];
+};
+
+struct px30_ddr_pctl_regs {
+	u32 pctl[30][2];
+};
+
+struct px30_ddr_phy_regs {
+	u32 phy[5][2];
+};
+
+struct px30_ddr_skew {
+	u32 a0_a1_skew[15];
+	u32 cs0_dm0_skew[11];
+	u32 cs0_dm1_skew[11];
+	u32 cs0_dm2_skew[11];
+	u32 cs0_dm3_skew[11];
+	u32 cs1_dm0_skew[11];
+	u32 cs1_dm1_skew[11];
+	u32 cs1_dm2_skew[11];
+	u32 cs1_dm3_skew[11];
+};
+
+struct px30_sdram_channel {
+	unsigned char rank;
+	unsigned char col;
+	/* 3:8bank, 2:4bank */
+	unsigned char bk;
+	/* channel buswidth, 2:32bit, 1:16bit, 0:8bit */
+	unsigned char bw;
+	/* die buswidth, 2:32bit, 1:16bit, 0:8bit */
+	unsigned char dbw;
+	unsigned char row_3_4;
+	unsigned char cs0_row;
+	unsigned char cs1_row;
+	unsigned char cs0_high16bit_row;
+	unsigned char cs1_high16bit_row;
+	unsigned int ddrconfig;
+	struct px30_msch_timings noc_timings;
+};
+
+struct px30_sdram_params {
+	struct px30_sdram_channel ch;
+	unsigned int ddr_freq;
+	unsigned int dramtype;
+	unsigned int odt;
+	struct px30_ddr_pctl_regs pctl_regs;
+	struct px30_ddr_phy_regs phy_regs;
+	struct px30_ddr_skew *skew;
+};
+
+#define PHY_REG(base, n)		((base) + 4 * (n))
+
+#endif
diff --git a/drivers/ram/rockchip/sdram-px30-ddr3-detect-333.inc b/drivers/ram/rockchip/sdram-px30-ddr3-detect-333.inc
new file mode 100644
index 0000000000..561273f40c
--- /dev/null
+++ b/drivers/ram/rockchip/sdram-px30-ddr3-detect-333.inc
@@ -0,0 +1,66 @@
+{
+	{
+		.rank = 0x1,
+		.col = 0xC,
+		.bk = 0x3,
+		.bw = 0x1,
+		.dbw = 0x0,
+		.row_3_4 = 0x0,
+		.cs0_row = 0x10,
+		.cs1_row = 0x10,
+		.cs0_high16bit_row = 0x10,
+		.cs1_high16bit_row = 0x10,
+		.ddrconfig = 0,
+		{
+			{0x290b0609},
+			{0x08020401},
+			{0x00000002},
+			{0x00001111},
+			{0x0000000c},
+			{0x00000222},
+			0x000000ff
+		}
+	},
+	.ddr_freq = 333,
+	.dramtype = DDR3,
+	.odt = 0,
+	{
+		{
+			{0x00000000, 0x43041001},	/* MSTR */
+			{0x00000064, 0x0028003b},	/* RFSHTMG */
+			{0x000000d0, 0x00020053},	/* INIT0 */
+			{0x000000d4, 0x00020000},	/* INIT1 */
+			{0x000000d8, 0x00000100},	/* INIT2 */
+			{0x000000dc, 0x03200000},	/* INIT3 */
+			{0x000000e0, 0x00000000},	/* INIT4 */
+			{0x000000e4, 0x00090000},	/* INIT5 */
+			{0x000000f4, 0x000f012f},	/* RANKCTL */
+			{0x00000100, 0x07090b06},	/* DRAMTMG0 */
+			{0x00000104, 0x00050209},	/* DRAMTMG1 */
+			{0x00000108, 0x03030407},	/* DRAMTMG2 */
+			{0x0000010c, 0x00202006},	/* DRAMTMG3 */
+			{0x00000110, 0x03020204},	/* DRAMTMG4 */
+			{0x00000114, 0x03030202},	/* DRAMTMG5 */
+			{0x00000120, 0x00000903},	/* DRAMTMG8 */
+			{0x00000180, 0x00800020},	/* ZQCTL0 */
+			{0x00000184, 0x00000000},	/* ZQCTL1 */
+			{0x00000190, 0x07010001},	/* DFITMG0 */
+			{0x00000198, 0x05000101},	/* DFILPCFG0 */
+			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
+			{0x00000240, 0x06000604},	/* ODTCFG */
+			{0x00000244, 0x00000201},	/* ODTMAP */
+			{0x00000250, 0x00001f00},	/* SCHED */
+			{0x00000490, 0x00000001},	/* PCTRL_0 */
+			{0xffffffff, 0xffffffff}
+		}
+	},
+	{
+		{
+			{0x00000004, 0x0000000a},	/* PHYREG01 */
+			{0x00000028, 0x00000006},	/* PHYREG0A */
+			{0x0000002c, 0x00000000},	/* PHYREG0B */
+			{0x00000030, 0x00000005},	/* PHYREG0C */
+			{0xffffffff, 0xffffffff}
+		}
+	}
+},
diff --git a/drivers/ram/rockchip/sdram-px30-ddr4-detect-333.inc b/drivers/ram/rockchip/sdram-px30-ddr4-detect-333.inc
new file mode 100644
index 0000000000..dddd2f0269
--- /dev/null
+++ b/drivers/ram/rockchip/sdram-px30-ddr4-detect-333.inc
@@ -0,0 +1,69 @@
+{
+	{
+		.rank = 0x1,
+		.col = 0xA,
+		.bk = 0x2,
+		.bw = 0x1,
+		.dbw = 0x0,
+		.row_3_4 = 0x0,
+		.cs0_row = 0x11,
+		.cs1_row = 0x0,
+		.cs0_high16bit_row = 0x11,
+		.cs1_high16bit_row = 0x0,
+		.ddrconfig = 0,
+		{
+			{0x4d110a08},
+			{0x06020501},
+			{0x00000002},
+			{0x00001111},
+			{0x0000000c},
+			{0x0000022a},
+			0x000000ff
+		}
+	},
+	.ddr_freq = 333,
+	.dramtype = DDR4,
+	.odt = 0,
+	{
+		{
+			{0x00000000, 0x43049010},	/* MSTR */
+			{0x00000064, 0x0028003b},	/* RFSHTMG */
+			{0x000000d0, 0x00020053},	/* INIT0 */
+			{0x000000d4, 0x00220000},	/* INIT1 */
+			{0x000000d8, 0x00000100},	/* INIT2 */
+			{0x000000dc, 0x00040000},	/* INIT3 */
+			{0x000000e0, 0x00000000},	/* INIT4 */
+			{0x000000e4, 0x00110000},	/* INIT5 */
+			{0x000000e8, 0x00000420},	/* INIT6 */
+			{0x000000ec, 0x00000400},	/* INIT7 */
+			{0x000000f4, 0x000f012f},	/* RANKCTL */
+			{0x00000100, 0x09060b06},	/* DRAMTMG0 */
+			{0x00000104, 0x00020209},	/* DRAMTMG1 */
+			{0x00000108, 0x0505040a},	/* DRAMTMG2 */
+			{0x0000010c, 0x0040400c},	/* DRAMTMG3 */
+			{0x00000110, 0x05030206},	/* DRAMTMG4 */
+			{0x00000114, 0x03030202},	/* DRAMTMG5 */
+			{0x00000120, 0x03030b03},	/* DRAMTMG8 */
+			{0x00000124, 0x00020208},	/* DRAMTMG9 */
+			{0x00000180, 0x01000040},	/* ZQCTL0 */
+			{0x00000184, 0x00000000},	/* ZQCTL1 */
+			{0x00000190, 0x07030003},	/* DFITMG0 */
+			{0x00000198, 0x05000101},	/* DFILPCFG0 */
+			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
+			{0x00000240, 0x06000604},	/* ODTCFG */
+			{0x00000244, 0x00000201},	/* ODTMAP */
+			{0x00000250, 0x00001f00},	/* SCHED */
+			{0x00000490, 0x00000001},	/* PCTRL_0 */
+			{0xffffffff, 0xffffffff}
+		}
+	},
+	{
+		{
+			{0x00000004, 0x0000000c},	/* PHYREG01 */
+			{0x00000028, 0x0000000a},	/* PHYREG0A */
+			{0x0000002c, 0x00000000},	/* PHYREG0B */
+			{0x00000030, 0x00000009},	/* PHYREG0C */
+			{0xffffffff, 0xffffffff}
+		}
+	}
+},
\ No newline at end of file
diff --git a/drivers/ram/rockchip/sdram-px30-ddr_skew.inc b/drivers/ram/rockchip/sdram-px30-ddr_skew.inc
new file mode 100644
index 0000000000..f24343dda1
--- /dev/null
+++ b/drivers/ram/rockchip/sdram-px30-ddr_skew.inc
@@ -0,0 +1,121 @@
+		{
+			0x77,
+			0x88,
+			0x79,
+			0x79,
+			0x87,
+			0x97,
+			0x87,
+			0x78,
+			0x77,
+			0x78,
+			0x87,
+			0x88,
+			0x87,
+			0x87,
+			0x77
+		},
+		{
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x69,
+			0x9,
+		},
+		{
+			0x77,
+			0x78,
+			0x77,
+			0x78,
+			0x77,
+			0x78,
+			0x77,
+			0x78,
+			0x77,
+			0x79,
+			0x9,
+		},
+		{
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x69,
+			0x9,
+		},
+		{
+			0x77,
+			0x78,
+			0x77,
+			0x77,
+			0x77,
+			0x77,
+			0x77,
+			0x77,
+			0x77,
+			0x79,
+			0x9,
+		},
+		{
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x69,
+			0x9,
+		},
+		{
+			0x77,
+			0x78,
+			0x77,
+			0x78,
+			0x77,
+			0x78,
+			0x77,
+			0x78,
+			0x77,
+			0x79,
+			0x9,
+		},
+		{
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x69,
+			0x9,
+		},
+		{
+			0x77,
+			0x78,
+			0x77,
+			0x77,
+			0x77,
+			0x77,
+			0x77,
+			0x77,
+			0x77,
+			0x79,
+			0x9,
+		}
diff --git a/drivers/ram/rockchip/sdram-px30-lpddr2-detect-333.inc b/drivers/ram/rockchip/sdram-px30-lpddr2-detect-333.inc
new file mode 100644
index 0000000000..b65cb0a98f
--- /dev/null
+++ b/drivers/ram/rockchip/sdram-px30-lpddr2-detect-333.inc
@@ -0,0 +1,67 @@
+{
+	{
+		.rank = 0x1,
+		.col = 0xC,
+		.bk = 0x3,
+		.bw = 0x1,
+		.dbw = 0x0,
+		.row_3_4 = 0x0,
+		.cs0_row = 0xF,
+		.cs1_row = 0xF,
+		.cs0_high16bit_row = 0xF,
+		.cs1_high16bit_row = 0xF,
+		.ddrconfig = 0,
+		{
+			{0x2b0c070a},
+			{0x08020303},
+			{0x00000002},
+			{0x00001111},
+			{0x0000000c},
+			{0x00000219},
+			0x000000ff
+		}
+	},
+	.ddr_freq = 333,
+	.dramtype = LPDDR2,
+	.odt = 0,
+	{
+		{
+			{0x00000000, 0x41041004},	/* MSTR */
+			{0x00000064, 0x00140023},	/* RFSHTMG */
+			{0x000000d0, 0x00220002},	/* INIT0 */
+			{0x000000d4, 0x00010000},	/* INIT1 */
+			{0x000000d8, 0x00000703},	/* INIT2 */
+			{0x000000dc, 0x00630005},	/* INIT3 */
+			{0x000000e0, 0x00010000},	/* INIT4 */
+			{0x000000e4, 0x00070003},	/* INIT5 */
+			{0x000000f4, 0x000f012f},	/* RANKCTL */
+			{0x00000100, 0x07090b07},	/* DRAMTMG0 */
+			{0x00000104, 0x0002010b},	/* DRAMTMG1 */
+			{0x00000108, 0x02040506},	/* DRAMTMG2 */
+			{0x0000010c, 0x00303000},	/* DRAMTMG3 */
+			{0x00000110, 0x04010204},	/* DRAMTMG4 */
+			{0x00000114, 0x01010303},	/* DRAMTMG5 */
+			{0x00000118, 0x02020003},	/* DRAMTMG6 */
+			{0x00000120, 0x00000303},	/* DRAMTMG8 */
+			{0x00000138, 0x00000025},	/* DRAMTMG14 */
+			{0x00000180, 0x003c000f},	/* ZQCTL0 */
+			{0x00000184, 0x00900000},	/* ZQCTL1 */
+			{0x00000190, 0x07020001},	/* DFITMG0 */
+			{0x00000198, 0x05000101},	/* DFILPCFG0 */
+			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
+			{0x00000240, 0x07030718},	/* ODTCFG */
+			{0x00000250, 0x00001f00},	/* SCHED */
+			{0x00000490, 0x00000001},	/* PCTRL_0 */
+			{0xffffffff, 0xffffffff}
+		}
+	},
+	{
+		{
+			{0x00000004, 0x00000009},	/* PHYREG01 */
+			{0x00000028, 0x00000007},	/* PHYREG0A */
+			{0x0000002c, 0x00000000},	/* PHYREG0B */
+			{0x00000030, 0x00000004},	/* PHYREG0C */
+			{0xffffffff, 0xffffffff}
+		}
+	}
+},
diff --git a/drivers/ram/rockchip/sdram-px30-lpddr3-detect-333.inc b/drivers/ram/rockchip/sdram-px30-lpddr3-detect-333.inc
new file mode 100644
index 0000000000..f3a1816ee6
--- /dev/null
+++ b/drivers/ram/rockchip/sdram-px30-lpddr3-detect-333.inc
@@ -0,0 +1,68 @@
+{
+	{
+		.rank = 0x1,
+		.col = 0xC,
+		.bk = 0x3,
+		.bw = 0x1,
+		.dbw = 0x0,
+		.row_3_4 = 0x0,
+		.cs0_row = 0x10,
+		.cs1_row = 0x10,
+		.cs0_high16bit_row = 0x10,
+		.cs1_high16bit_row = 0x10,
+		.ddrconfig = 0,
+		{
+			{0x290a060a},
+			{0x08020303},
+			{0x00000002},
+			{0x00001111},
+			{0x0000000c},
+			{0x0000021a},
+			0x000000ff
+		}
+	},
+	.ddr_freq = 333,
+	.dramtype = LPDDR3,
+	.odt = 0,
+	{
+		{
+			{0x00000000, 0x43041008},	/* MSTR */
+			{0x00000064, 0x00140023},	/* RFSHTMG */
+			{0x000000d0, 0x00220002},	/* INIT0 */
+			{0x000000d4, 0x00010000},	/* INIT1 */
+			{0x000000d8, 0x00000703},	/* INIT2 */
+			{0x000000dc, 0x00830004},	/* INIT3 */
+			{0x000000e0, 0x00010000},	/* INIT4 */
+			{0x000000e4, 0x00070003},	/* INIT5 */
+			{0x000000f4, 0x000f012f},	/* RANKCTL */
+			{0x00000100, 0x06090b07},	/* DRAMTMG0 */
+			{0x00000104, 0x0002020b},	/* DRAMTMG1 */
+			{0x00000108, 0x02030506},	/* DRAMTMG2 */
+			{0x0000010c, 0x00505000},	/* DRAMTMG3 */
+			{0x00000110, 0x03020204},	/* DRAMTMG4 */
+			{0x00000114, 0x01010303},	/* DRAMTMG5 */
+			{0x00000118, 0x02020003},	/* DRAMTMG6 */
+			{0x00000120, 0x00000303},	/* DRAMTMG8 */
+			{0x00000138, 0x00000025},	/* DRAMTMG14 */
+			{0x00000180, 0x003c000f},	/* ZQCTL0 */
+			{0x00000184, 0x00900000},	/* ZQCTL1 */
+			{0x00000190, 0x07020000},	/* DFITMG0 */
+			{0x00000198, 0x05000101},	/* DFILPCFG0 */
+			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
+			{0x00000240, 0x0900090c},	/* ODTCFG */
+			{0x00000244, 0x00000101},	/* ODTMAP */
+			{0x00000250, 0x00001f00},	/* SCHED */
+			{0x00000490, 0x00000001},	/* PCTRL_0 */
+			{0xffffffff, 0xffffffff}
+		}
+	},
+	{
+		{
+			{0x00000004, 0x0000000b},	/* PHYREG01 */
+			{0x00000028, 0x00000006},	/* PHYREG0A */
+			{0x0000002c, 0x00000000},	/* PHYREG0B */
+			{0x00000030, 0x00000003},	/* PHYREG0C */
+			{0xffffffff, 0xffffffff}
+		}
+	}
+},
diff --git a/drivers/ram/rockchip/sdram_px30.c b/drivers/ram/rockchip/sdram_px30.c
index f98ba8cc29..a3ed63841a 100644
--- a/drivers/ram/rockchip/sdram_px30.c
+++ b/drivers/ram/rockchip/sdram_px30.c
@@ -1,23 +1,1188 @@
+// SPDX-License-Identifier: GPL-2.0
 /*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
- *
- * SPDX-License-Identifier:     GPL-2.0
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd.
  */
 
 #include <common.h>
+#include <debug_uart.h>
 #include <dm.h>
 #include <ram.h>
 #include <syscon.h>
+#include <asm/io.h>
 #include <asm/arch/clock.h>
+#include <asm/arch/cru_px30.h>
 #include <asm/arch/grf_px30.h>
+#include <asm/arch/hardware.h>
 #include <asm/arch/sdram_common.h>
+#include <asm/arch/sdram_px30.h>
+
+/*
+ * Because px30 sram size is small, so need define CONFIG_TPL_TINY_FRAMEWORK
+ * to reduce TPL size when build TPL firmware.
+ */
+#ifdef CONFIG_TPL_BUILD
+#ifndef CONFIG_TPL_TINY_FRAMEWORK
+#error please defined CONFIG_TPL_TINY_FRAMEWORK for px30 !!!
+#endif
+#endif
 
 DECLARE_GLOBAL_DATA_PTR;
 struct dram_info {
+#ifdef CONFIG_TPL_BUILD
+	struct px30_ddr_pctl_regs *pctl;
+	struct px30_ddr_phy_regs *phy;
+	struct px30_cru *cru;
+	struct px30_msch_regs *msch;
+	struct px30_ddr_grf_regs *ddr_grf;
+	struct px30_grf *grf;
+#endif
 	struct ram_info info;
 	struct px30_pmugrf *pmugrf;
 };
 
+#ifdef CONFIG_TPL_BUILD
+#define PMUGRF_BASE_ADDR		0xFF010000
+#define CRU_BASE_ADDR			0xFF2B0000
+#define GRF_BASE_ADDR			0xFF140000
+#define DDRC_BASE_ADDR			0xFF600000
+#define DDR_PHY_BASE_ADDR		0xFF2A0000
+#define SERVER_MSCH0_BASE_ADDR		0xFF530000
+#define DDR_GRF_BASE_ADDR		0xff630000
+
+struct dram_info dram_info;
+
+struct px30_sdram_params sdram_configs[] = {
+#include	"sdram-px30-lpddr3-detect-333.inc"
+};
+
+struct px30_ddr_skew skew = {
+#include	"sdram-px30-ddr_skew.inc"
+};
+
+static void rkclk_ddr_reset(struct dram_info *dram,
+			    u32 ctl_srstn, u32 ctl_psrstn,
+			    u32 phy_srstn, u32 phy_psrstn)
+{
+	writel(upctl2_srstn_req(ctl_srstn) | upctl2_psrstn_req(ctl_psrstn) |
+	       upctl2_asrstn_req(ctl_srstn),
+	       &dram->cru->softrst_con[1]);
+	writel(ddrphy_srstn_req(phy_srstn) | ddrphy_psrstn_req(phy_psrstn),
+	       &dram->cru->softrst_con[2]);
+}
+
+static void rkclk_set_dpll(struct dram_info *dram, unsigned int mhz)
+{
+	unsigned int refdiv, postdiv1, postdiv2, fbdiv;
+	int delay = 1000;
+
+	refdiv = 1;
+	if (mhz <= 300) {
+		postdiv1 = 4;
+		postdiv2 = 2;
+	} else if (mhz <= 400) {
+		postdiv1 = 6;
+		postdiv2 = 1;
+	} else if (mhz <= 600) {
+		postdiv1 = 4;
+		postdiv2 = 1;
+	} else if (mhz <= 800) {
+		postdiv1 = 3;
+		postdiv2 = 1;
+	} else if (mhz <= 1600) {
+		postdiv1 = 2;
+		postdiv2 = 1;
+	} else {
+		postdiv1 = 1;
+		postdiv2 = 1;
+	}
+	fbdiv = (mhz * refdiv * postdiv1 * postdiv2) / 24;
+
+	writel(DPLL_MODE(CLOCK_FROM_XIN_OSC), &dram->cru->mode);
+
+	writel(POSTDIV1(postdiv1) | FBDIV(fbdiv), &dram->cru->pll[1].con0);
+	writel(DSMPD(1) | POSTDIV2(postdiv2) | REFDIV(refdiv),
+	       &dram->cru->pll[1].con1);
+
+	while (delay > 0) {
+		udelay(1);
+		if (LOCK(readl(&dram->cru->pll[1].con1)))
+			break;
+		delay--;
+	}
+
+	writel(DPLL_MODE(CLOCK_FROM_PLL), &dram->cru->mode);
+}
+
+static void rkclk_configure_ddr(struct dram_info *dram,
+				struct px30_sdram_params *sdram_params)
+{
+	/* for inno ddr phy need 2*freq */
+	rkclk_set_dpll(dram,  sdram_params->ddr_freq * 2);
+}
+
+static void phy_soft_reset(struct dram_info *dram)
+{
+	void __iomem *phy_base = dram->phy;
+
+	clrbits_le32(PHY_REG(phy_base, 0), 0x3 << 2);
+	udelay(1);
+	setbits_le32(PHY_REG(phy_base, 0), ANALOG_DERESET);
+	udelay(5);
+	setbits_le32(PHY_REG(phy_base, 0), DIGITAL_DERESET);
+	udelay(1);
+}
+
+static int pctl_cfg(struct dram_info *dram,
+		    struct px30_sdram_params *sdram_params)
+{
+	u32 i;
+	void __iomem *pctl_base = dram->pctl;
+
+	for (i = 0; sdram_params->pctl_regs.pctl[i][0] != 0xFFFFFFFF; i++) {
+		writel(sdram_params->pctl_regs.pctl[i][1],
+		       pctl_base + sdram_params->pctl_regs.pctl[i][0]);
+	}
+	clrsetbits_le32(pctl_base + DDR_PCTL2_PWRTMG,
+			(0xff << 16) | 0x1f,
+			((SR_IDLE & 0xff) << 16) | (PD_IDLE & 0x1f));
+
+	clrsetbits_le32(pctl_base + DDR_PCTL2_HWLPCTL,
+			0xfff << 16,
+			5 << 16);
+	/* disable zqcs */
+	setbits_le32(pctl_base + DDR_PCTL2_ZQCTL0, 1u << 31);
+
+	return 0;
+}
+
+/* return ddrconfig value
+ *       (-1), find ddrconfig fail
+ *       other, the ddrconfig value
+ * only support cs0_row >= cs1_row
+ */
+static unsigned int calculate_ddrconfig(struct px30_sdram_params *sdram_params)
+{
+	u32 bw, die_bw, col, bank;
+	u32 i, tmp;
+	u32 ddrconf = -1;
+
+	bw = sdram_params->ch.bw;
+	die_bw = sdram_params->ch.dbw;
+	col = sdram_params->ch.col;
+	bank = sdram_params->ch.bk;
+
+	if (sdram_params->dramtype == DDR4) {
+		if (die_bw == 0)
+			ddrconf = 7 + bw;
+		else
+			ddrconf = 12 - bw;
+		ddrconf = d4_rbc_2_d3_rbc[ddrconf - 7];
+	} else {
+		tmp = ((bank - 2) << 3) | (col + bw - 10);
+		for (i = 0; i < 7; i++)
+			if ((ddr_cfg_2_rbc[i] & 0xf) == tmp) {
+				ddrconf = i;
+				break;
+			}
+		if (i > 6)
+			printascii("calculate ddrconfig error\n");
+	}
+
+	return ddrconf;
+}
+
+/* n: Unit bytes */
+static void copy_to_reg(u32 *dest, u32 *src, u32 n)
+{
+	int i;
+
+	for (i = 0; i < n / sizeof(u32); i++) {
+		writel(*src, dest);
+		src++;
+		dest++;
+	}
+}
+
+/*
+ * calculate controller dram address map, and setting to register.
+ * argument sdram_params->ch.ddrconf must be right value before
+ * call this function.
+ */
+static void set_ctl_address_map(struct dram_info *dram,
+				struct px30_sdram_params *sdram_params)
+{
+	void __iomem *pctl_base = dram->pctl;
+	u32 cs_pst, bg, max_row, ddrconf;
+	u32 i;
+
+	if (sdram_params->dramtype == DDR4)
+		/*
+		 * DDR4 8bit dram BG = 2(4bank groups),
+		 * 16bit dram BG = 1 (2 bank groups)
+		 */
+		bg = (sdram_params->ch.dbw == 0) ? 2 : 1;
+	else
+		bg = 0;
+
+	cs_pst = sdram_params->ch.bw + sdram_params->ch.col +
+		bg + sdram_params->ch.bk + sdram_params->ch.cs0_row;
+	if (cs_pst >= 32 || sdram_params->ch.rank == 1)
+		writel(0x1f, pctl_base + DDR_PCTL2_ADDRMAP0);
+	else
+		writel(cs_pst - 8, pctl_base + DDR_PCTL2_ADDRMAP0);
+
+	ddrconf = sdram_params->ch.ddrconfig;
+	if (sdram_params->dramtype == DDR4) {
+		for (i = 0; i < ARRAY_SIZE(d4_rbc_2_d3_rbc); i++) {
+			if (d4_rbc_2_d3_rbc[i] == ddrconf) {
+				ddrconf = 7 + i;
+				break;
+			}
+		}
+	}
+
+	copy_to_reg((u32 *)(pctl_base + DDR_PCTL2_ADDRMAP1),
+		    &addrmap[ddrconf][0], 8 * 4);
+	max_row = cs_pst - 1 - 8 - (addrmap[ddrconf][5] & 0xf);
+
+	if (max_row < 12)
+		printascii("set addrmap fail\n");
+	/* need to disable row ahead of rank by set to 0xf */
+	for (i = 17; i > max_row; i--)
+		clrsetbits_le32(pctl_base + DDR_PCTL2_ADDRMAP6 +
+			((i - 12) * 8 / 32) * 4,
+			0xf << ((i - 12) * 8 % 32),
+			0xf << ((i - 12) * 8 % 32));
+
+	if ((sdram_params->dramtype == LPDDR3 ||
+	     sdram_params->dramtype == LPDDR2) &&
+		 sdram_params->ch.row_3_4)
+		setbits_le32(pctl_base + DDR_PCTL2_ADDRMAP6, 1 << 31);
+	if (sdram_params->dramtype == DDR4 && sdram_params->ch.bw != 0x2)
+		setbits_le32(pctl_base + DDR_PCTL2_PCCFG, 1 << 8);
+}
+
+static void phy_dll_bypass_set(struct dram_info *dram, u32 freq)
+{
+	void __iomem *phy_base = dram->phy;
+	u32 tmp;
+	u32 i, j;
+
+	setbits_le32(PHY_REG(phy_base, 0x13), 1 << 4);
+	clrbits_le32(PHY_REG(phy_base, 0x14), 1 << 3);
+	for (i = 0; i < 4; i++) {
+		j = 0x26 + i * 0x10;
+		setbits_le32(PHY_REG(phy_base, j), 1 << 4);
+		clrbits_le32(PHY_REG(phy_base, j + 0x1), 1 << 3);
+	}
+
+	if (freq <= (400 * MHz))
+		/* DLL bypass */
+		setbits_le32(PHY_REG(phy_base, 0xa4), 0x1f);
+	else
+		clrbits_le32(PHY_REG(phy_base, 0xa4), 0x1f);
+
+	if (freq <= (801 * MHz))
+		tmp = 2;
+	else
+		tmp = 1;
+
+	for (i = 0; i < 4; i++) {
+		j = 0x28 + i * 0x10;
+		writel(tmp, PHY_REG(phy_base, j));
+	}
+}
+
+static void set_ds_odt(struct dram_info *dram,
+		       struct px30_sdram_params *sdram_params)
+{
+	void __iomem *phy_base = dram->phy;
+	u32 cmd_drv, clk_drv, dqs_drv, dqs_odt;
+	u32 i, j;
+
+	if (sdram_params->dramtype == DDR3) {
+		cmd_drv = PHY_DDR3_RON_RTT_34ohm;
+		clk_drv = PHY_DDR3_RON_RTT_45ohm;
+		dqs_drv = PHY_DDR3_RON_RTT_34ohm;
+		dqs_odt = PHY_DDR3_RON_RTT_225ohm;
+	} else {
+		cmd_drv = PHY_DDR4_LPDDR3_RON_RTT_34ohm;
+		clk_drv = PHY_DDR4_LPDDR3_RON_RTT_43ohm;
+		dqs_drv = PHY_DDR4_LPDDR3_RON_RTT_34ohm;
+		if (sdram_params->dramtype == LPDDR2)
+			dqs_odt = PHY_DDR4_LPDDR3_RON_RTT_DISABLE;
+		else
+			dqs_odt = PHY_DDR4_LPDDR3_RON_RTT_240ohm;
+	}
+	/* DS */
+	writel(cmd_drv, PHY_REG(phy_base, 0x11));
+	clrsetbits_le32(PHY_REG(phy_base, 0x12), 0x1f << 3, cmd_drv << 3);
+	writel(clk_drv, PHY_REG(phy_base, 0x16));
+	writel(clk_drv, PHY_REG(phy_base, 0x18));
+
+	for (i = 0; i < 4; i++) {
+		j = 0x20 + i * 0x10;
+		writel(dqs_drv, PHY_REG(phy_base, j));
+		writel(dqs_drv, PHY_REG(phy_base, j + 0xf));
+		/* ODT */
+		writel(dqs_odt, PHY_REG(phy_base, j + 0x1));
+		writel(dqs_odt, PHY_REG(phy_base, j + 0xe));
+	}
+}
+
+static void phy_cfg(struct dram_info *dram,
+		    struct px30_sdram_params *sdram_params)
+{
+	void __iomem *phy_base = dram->phy;
+	u32 i;
+
+	phy_dll_bypass_set(dram, sdram_params->ddr_freq);
+	for (i = 0; sdram_params->phy_regs.phy[i][0] != 0xFFFFFFFF; i++) {
+		writel(sdram_params->phy_regs.phy[i][1],
+		       phy_base + sdram_params->phy_regs.phy[i][0]);
+	}
+	if (sdram_params->ch.bw == 2) {
+		clrsetbits_le32(PHY_REG(phy_base, 0), 0xf << 4, 0xf << 4);
+	} else if (sdram_params->ch.bw == 1) {
+		clrsetbits_le32(PHY_REG(phy_base, 0), 0xf << 4, 3 << 4);
+		/* disable DQS2,DQS3 tx dll  for saving power */
+		clrbits_le32(PHY_REG(phy_base, 0x46), 1 << 3);
+		clrbits_le32(PHY_REG(phy_base, 0x56), 1 << 3);
+	} else {
+		clrsetbits_le32(PHY_REG(phy_base, 0), 0xf << 4, 1 << 4);
+		/* disable DQS2,DQS3 tx dll  for saving power */
+		clrbits_le32(PHY_REG(phy_base, 0x36), 1 << 3);
+		clrbits_le32(PHY_REG(phy_base, 0x46), 1 << 3);
+		clrbits_le32(PHY_REG(phy_base, 0x56), 1 << 3);
+	}
+	set_ds_odt(dram, sdram_params);
+
+	/* deskew */
+	setbits_le32(PHY_REG(phy_base, 2), 8);
+	copy_to_reg(PHY_REG(phy_base, 0xb0),
+		    &sdram_params->skew->a0_a1_skew[0], 15 * 4);
+	copy_to_reg(PHY_REG(phy_base, 0x70),
+		    &sdram_params->skew->cs0_dm0_skew[0], 44 * 4);
+	copy_to_reg(PHY_REG(phy_base, 0xc0),
+		    &sdram_params->skew->cs0_dm1_skew[0], 44 * 4);
+}
+
+static int update_refresh_reg(struct dram_info *dram)
+{
+	void __iomem *pctl_base = dram->pctl;
+	u32 ret;
+
+	ret = readl(pctl_base + DDR_PCTL2_RFSHCTL3) ^ (1 << 1);
+	writel(ret, pctl_base + DDR_PCTL2_RFSHCTL3);
+
+	return 0;
+}
+
+/*
+ * rank = 1: cs0
+ * rank = 2: cs1
+ */
+int read_mr(struct dram_info *dram, u32 rank, u32 mr_num)
+{
+	void __iomem *pctl_base = dram->pctl;
+	void __iomem *ddr_grf_base = dram->ddr_grf;
+
+	writel((rank << 4) | (1 << 0), pctl_base + DDR_PCTL2_MRCTRL0);
+	writel((mr_num << 8), pctl_base + DDR_PCTL2_MRCTRL1);
+	setbits_le32(pctl_base + DDR_PCTL2_MRCTRL0, 1u << 31);
+	while (readl(pctl_base + DDR_PCTL2_MRCTRL0) & (1u << 31))
+		continue;
+	while (readl(pctl_base + DDR_PCTL2_MRSTAT) & MR_WR_BUSY)
+		continue;
+
+	return (readl(ddr_grf_base + DDR_GRF_STATUS(0)) & 0xff);
+}
+
+u32 disable_zqcs_arefresh(struct dram_info *dram)
+{
+	void __iomem *pctl_base = dram->pctl;
+	u32 dis_auto_zq = 0;
+
+	/* disable zqcs */
+	if (!(readl(pctl_base + DDR_PCTL2_ZQCTL0) &
+		(1ul << 31))) {
+		dis_auto_zq = 1;
+		setbits_le32(pctl_base + DDR_PCTL2_ZQCTL0, 1 << 31);
+	}
+
+	/* disable auto refresh */
+	setbits_le32(pctl_base + DDR_PCTL2_RFSHCTL3, 1);
+
+	update_refresh_reg(dram);
+
+	return dis_auto_zq;
+}
+
+void restore_zqcs_arefresh(struct dram_info *dram, u32 dis_auto_zq)
+{
+	void __iomem *pctl_base = dram->pctl;
+
+	/* restore zqcs */
+	if (dis_auto_zq)
+		clrbits_le32(pctl_base + DDR_PCTL2_ZQCTL0, 1 << 31);
+
+	/* restore auto refresh */
+	clrbits_le32(pctl_base + DDR_PCTL2_RFSHCTL3, 1);
+
+	update_refresh_reg(dram);
+}
+
+#define MIN(a, b)	(((a) > (b)) ? (b) : (a))
+#define MAX(a, b)	(((a) > (b)) ? (a) : (b))
+static u32 check_rd_gate(struct dram_info *dram)
+{
+	void __iomem *phy_base = dram->phy;
+
+	u32 max_val = 0;
+	u32 min_val = 0xff;
+	u32 gate[4];
+	u32 i, bw;
+
+	bw = (readl(PHY_REG(phy_base, 0x0)) >> 4) & 0xf;
+	switch (bw) {
+	case 0x1:
+		bw = 1;
+		break;
+	case 0x3:
+		bw = 2;
+		break;
+	case 0xf:
+	default:
+		bw = 4;
+		break;
+	}
+
+	for (i = 0; i < bw; i++) {
+		gate[i] = readl(PHY_REG(phy_base, 0xfb + i));
+		max_val = MAX(max_val, gate[i]);
+		min_val = MIN(min_val, gate[i]);
+	}
+
+	if (max_val > 0x80 || min_val < 0x20)
+		return -1;
+	else
+		return 0;
+}
+
+static int data_training(struct dram_info *dram, u32 cs, u32 dramtype)
+{
+	void __iomem *phy_base = dram->phy;
+	u32 ret;
+	u32 dis_auto_zq = 0;
+	u32 odt_val;
+	u32 i, j;
+
+	odt_val = readl(PHY_REG(phy_base, 0x2e));
+
+	for (i = 0; i < 4; i++) {
+		j = 0x20 + i * 0x10;
+		writel(PHY_DDR3_RON_RTT_225ohm, PHY_REG(phy_base, j + 0x1));
+		writel(0, PHY_REG(phy_base, j + 0xe));
+	}
+
+	dis_auto_zq = disable_zqcs_arefresh(dram);
+
+	if (dramtype == DDR4) {
+		clrsetbits_le32(PHY_REG(phy_base, 0x29), 0x3, 0);
+		clrsetbits_le32(PHY_REG(phy_base, 0x39), 0x3, 0);
+		clrsetbits_le32(PHY_REG(phy_base, 0x49), 0x3, 0);
+		clrsetbits_le32(PHY_REG(phy_base, 0x59), 0x3, 0);
+	}
+	/* choose training cs */
+	clrsetbits_le32(PHY_REG(phy_base, 2), 0x33, (0x20 >> cs));
+	/* enable gate training */
+	clrsetbits_le32(PHY_REG(phy_base, 2), 0x33, (0x20 >> cs) | 1);
+	udelay(50);
+	ret = readl(PHY_REG(phy_base, 0xff));
+	/* disable gate training */
+	clrsetbits_le32(PHY_REG(phy_base, 2), 0x33, (0x20 >> cs) | 0);
+	clrbits_le32(PHY_REG(phy_base, 2), 0x30);
+	restore_zqcs_arefresh(dram, dis_auto_zq);
+
+	if (dramtype == DDR4) {
+		clrsetbits_le32(PHY_REG(phy_base, 0x29), 0x3, 0x2);
+		clrsetbits_le32(PHY_REG(phy_base, 0x39), 0x3, 0x2);
+		clrsetbits_le32(PHY_REG(phy_base, 0x49), 0x3, 0x2);
+		clrsetbits_le32(PHY_REG(phy_base, 0x59), 0x3, 0x2);
+	}
+
+	if (ret & 0x10) {
+		ret = -1;
+	} else {
+		ret = (ret & 0xf) ^ (readl(PHY_REG(phy_base, 0)) >> 4);
+		ret = (ret == 0) ? 0 : -1;
+	}
+
+	for (i = 0; i < 4; i++) {
+		j = 0x20 + i * 0x10;
+		writel(odt_val, PHY_REG(phy_base, j + 0x1));
+		writel(odt_val, PHY_REG(phy_base, j + 0xe));
+	}
+
+	return ret;
+}
+
+/* rank = 1: cs0
+ * rank = 2: cs1
+ * rank = 3: cs0 & cs1
+ * note: be careful of keep mr original val
+ */
+static int write_mr(struct dram_info *dram, u32 rank, u32 mr_num, u32 arg,
+		    u32 dramtype)
+{
+	void __iomem *pctl_base = dram->pctl;
+
+	while (readl(pctl_base + DDR_PCTL2_MRSTAT) & MR_WR_BUSY)
+		continue;
+	if (dramtype == DDR3 || dramtype == DDR4) {
+		writel((mr_num << 12) | (rank << 4) | (0 << 0),
+		       pctl_base + DDR_PCTL2_MRCTRL0);
+		writel(arg, pctl_base + DDR_PCTL2_MRCTRL1);
+	} else {
+		writel((rank << 4) | (0 << 0),
+		       pctl_base + DDR_PCTL2_MRCTRL0);
+		writel((mr_num << 8) | (arg & 0xff),
+		       pctl_base + DDR_PCTL2_MRCTRL1);
+	}
+
+	setbits_le32(pctl_base + DDR_PCTL2_MRCTRL0, 1u << 31);
+	while (readl(pctl_base + DDR_PCTL2_MRCTRL0) & (1u << 31))
+		continue;
+	while (readl(pctl_base + DDR_PCTL2_MRSTAT) & MR_WR_BUSY)
+		continue;
+
+	return 0;
+}
+
+/*
+ * rank : 1:cs0, 2:cs1, 3:cs0&cs1
+ * vrefrate: 4500: 45%,
+ */
+static int write_vrefdq(struct dram_info *dram, u32 rank, u32 vrefrate,
+			u32 dramtype)
+{
+	void __iomem *pctl_base = dram->pctl;
+	u32 tccd_l, value;
+	u32 dis_auto_zq = 0;
+
+	if (dramtype != DDR4 || vrefrate < 4500 ||
+	    vrefrate > 9200)
+		return (-1);
+
+	tccd_l = (readl(pctl_base + DDR_PCTL2_DRAMTMG4) >> 16) & 0xf;
+	tccd_l = (tccd_l - 4) << 10;
+
+	if (vrefrate > 7500) {
+		/* range 1 */
+		value = ((vrefrate - 6000) / 65) | tccd_l;
+	} else {
+		/* range 2 */
+		value = ((vrefrate - 4500) / 65) | tccd_l | (1 << 6);
+	}
+
+	dis_auto_zq = disable_zqcs_arefresh(dram);
+
+	/* enable vrefdq calibratin */
+	write_mr(dram, rank, 6, value | (1 << 7), dramtype);
+	udelay(1);/* tvrefdqe */
+	/* write vrefdq value */
+	write_mr(dram, rank, 6, value | (1 << 7), dramtype);
+	udelay(1);/* tvref_time */
+	write_mr(dram, rank, 6, value | (0 << 7), dramtype);
+	udelay(1);/* tvrefdqx */
+
+	restore_zqcs_arefresh(dram, dis_auto_zq);
+
+	return 0;
+}
+
+/*
+ * cs: 0:cs0
+ *	   1:cs1
+ *     else cs0+cs1
+ * note: it didn't consider about row_3_4
+ */
+u64 get_cs_cap(struct px30_sdram_params *sdram_params, u32 cs)
+{
+	u32 bg;
+	u64 cap[2];
+
+	if (sdram_params->dramtype == DDR4)
+		/* DDR4 8bit dram BG = 2(4bank groups),
+		 * 16bit dram BG = 1 (2 bank groups)
+		 */
+		bg = (sdram_params->ch.dbw == 0) ? 2 : 1;
+	else
+		bg = 0;
+	cap[0] = 1llu << (sdram_params->ch.bw + sdram_params->ch.col +
+		bg + sdram_params->ch.bk + sdram_params->ch.cs0_row);
+
+	if (sdram_params->ch.rank == 2)
+		cap[1] = 1llu << (sdram_params->ch.bw + sdram_params->ch.col +
+			bg + sdram_params->ch.bk + sdram_params->ch.cs1_row);
+	else
+		cap[1] = 0;
+
+	if (cs == 0)
+		return cap[0];
+	else if (cs == 1)
+		return cap[1];
+	else
+		return (cap[0] + cap[1]);
+}
+
+static void set_ddrconfig(struct dram_info *dram, u32 ddrconfig)
+{
+	writel(ddrconfig | (ddrconfig << 8), &dram->msch->deviceconf);
+	rk_clrsetreg(&dram->grf->soc_noc_con[1], 0x3 << 14, 0 << 14);
+}
+
+static void dram_all_config(struct dram_info *dram,
+			    struct px30_sdram_params *sdram_params)
+{
+	u32 sys_reg = 0;
+	u32 sys_reg3 = 0;
+	u64 cs_cap[2];
+
+	set_ddrconfig(dram, sdram_params->ch.ddrconfig);
+
+	sys_reg |= SYS_REG_ENC_DDRTYPE(sdram_params->dramtype);
+	sys_reg |= SYS_REG_ENC_ROW_3_4(sdram_params->ch.row_3_4);
+	sys_reg |= SYS_REG_ENC_RANK(sdram_params->ch.rank);
+	sys_reg |= SYS_REG_ENC_COL(sdram_params->ch.col);
+	sys_reg |= SYS_REG_ENC_BK(sdram_params->ch.bk);
+	sys_reg |= SYS_REG_ENC_BW(sdram_params->ch.bw);
+	sys_reg |= SYS_REG_ENC_DBW(sdram_params->ch.dbw);
+
+	SYS_REG_ENC_CS0_ROW_(sdram_params->ch.cs0_row, sys_reg, sys_reg3);
+	if (sdram_params->ch.cs1_row)
+		SYS_REG_ENC_CS1_ROW_(sdram_params->ch.cs1_row, sys_reg,
+				     sys_reg3);
+	sys_reg3 |= SYS_REG_ENC_CS1_COL(sdram_params->ch.col);
+	sys_reg3 |= SYS_REG_ENC_VERSION(DDR_SYS_REG_VERSION);
+
+	writel(sys_reg, &dram->pmugrf->os_reg[2]);
+	writel(sys_reg3, &dram->pmugrf->os_reg[3]);
+
+	cs_cap[0] = get_cs_cap(sdram_params, 0);
+	cs_cap[1] = get_cs_cap(sdram_params, 1);
+	writel(((((cs_cap[1] >> 20) / 64) & 0xff) << 8) |
+			(((cs_cap[0] >> 20) / 64) & 0xff),
+			&dram->msch->devicesize);
+
+	writel(sdram_params->ch.noc_timings.ddrtiminga0.d32,
+	       &dram->msch->ddrtiminga0);
+	writel(sdram_params->ch.noc_timings.ddrtimingb0.d32,
+	       &dram->msch->ddrtimingb0);
+	writel(sdram_params->ch.noc_timings.ddrtimingc0.d32,
+	       &dram->msch->ddrtimingc0);
+	writel(sdram_params->ch.noc_timings.devtodev0.d32,
+	       &dram->msch->devtodev0);
+	writel(sdram_params->ch.noc_timings.ddrmode.d32, &dram->msch->ddrmode);
+	writel(sdram_params->ch.noc_timings.ddr4timing.d32,
+	       &dram->msch->ddr4timing);
+	writel(sdram_params->ch.noc_timings.agingx0, &dram->msch->agingx0);
+	writel(sdram_params->ch.noc_timings.agingx0, &dram->msch->aging0);
+	writel(sdram_params->ch.noc_timings.agingx0, &dram->msch->aging1);
+	writel(sdram_params->ch.noc_timings.agingx0, &dram->msch->aging2);
+	writel(sdram_params->ch.noc_timings.agingx0, &dram->msch->aging3);
+}
+
+static void enable_low_power(struct dram_info *dram,
+			     struct px30_sdram_params *sdram_params)
+{
+	void __iomem *pctl_base = dram->pctl;
+	void __iomem *ddr_grf_base = dram->ddr_grf;
+	u32 grf_lp_con;
+
+	/*
+	 * bit0: grf_upctl_axi_cg_en = 1 enable upctl2 axi clk auto gating
+	 * bit1: grf_upctl_apb_cg_en = 1 ungated axi,core clk for apb access
+	 * bit2: grf_upctl_core_cg_en = 1 enable upctl2 core clk auto gating
+	 * bit3: grf_selfref_type2_en = 0 disable core clk gating when type2 sr
+	 * bit4: grf_upctl_syscreq_cg_en = 1
+	 *       ungating coreclk when c_sysreq assert
+	 * bit8-11: grf_auto_sr_dly = 6
+	 */
+	writel(0x1f1f0617, &dram->ddr_grf->ddr_grf_con[1]);
+
+	if (sdram_params->dramtype == DDR4)
+		grf_lp_con = (0x7 << 16) | (1 << 1);
+	else if (sdram_params->dramtype == DDR3)
+		grf_lp_con = (0x7 << 16) | (1 << 0);
+	else
+		grf_lp_con = (0x7 << 16) | (1 << 2);
+
+	/* en lpckdis_en */
+	grf_lp_con = grf_lp_con | (0x1 << (9 + 16)) | (0x1 << 9);
+	writel(grf_lp_con, ddr_grf_base + DDR_GRF_LP_CON);
+
+	/* enable sr, pd */
+	if (PD_IDLE == 0)
+		clrbits_le32(pctl_base + DDR_PCTL2_PWRCTL, (1 << 1));
+	else
+		setbits_le32(pctl_base + DDR_PCTL2_PWRCTL, (1 << 1));
+	if (SR_IDLE == 0)
+		clrbits_le32(pctl_base + DDR_PCTL2_PWRCTL, 1);
+	else
+		setbits_le32(pctl_base + DDR_PCTL2_PWRCTL, 1);
+	setbits_le32(pctl_base + DDR_PCTL2_PWRCTL, (1 << 3));
+}
+
+static int print_dec2hex(int i)
+{
+	int tmp;
+
+	tmp = (i % 10);
+	tmp |= ((i % 100) / 10) << 4;
+	tmp |= ((i % 1000) / 100) << 8;
+
+	return tmp;
+}
+
+/*
+ * pre_init: 0: pre init for dram cap detect
+ * 1: detect correct cap(except cs1 row)info, than reinit
+ * 2: after reinit, we detect cs1_row, if cs1_row not equal
+ *    to cs0_row and cs is in middle on ddrconf map, we need
+ *    to reinit dram, than set the correct ddrconf.
+ */
+static int sdram_init_(struct dram_info *dram,
+		       struct px30_sdram_params *sdram_params, u32 pre_init)
+{
+	void __iomem *pctl_base = dram->pctl;
+
+	rkclk_ddr_reset(dram, 1, 1, 1, 1);
+	udelay(10);
+	/*
+	 * dereset ddr phy psrstn to config pll,
+	 * if using phy pll psrstn must be dereset
+	 * before config pll
+	 */
+	rkclk_ddr_reset(dram, 1, 1, 1, 0);
+	rkclk_configure_ddr(dram, sdram_params);
+
+	if (pre_init == 1) {
+		switch (sdram_params->dramtype) {
+		case DDR3:
+			printascii("DDR3\n");
+			break;
+		case DDR4:
+			printascii("DDR4\n");
+			break;
+		case LPDDR2:
+			printascii("LPDDR2\n");
+			break;
+		case LPDDR3:
+		default:
+			printascii("LPDDR3\n");
+			break;
+		}
+		printhex4(print_dec2hex(sdram_params->ddr_freq));
+		printascii("MHz\n");
+	}
+
+	/* release phy srst to provide clk to ctrl */
+	rkclk_ddr_reset(dram, 1, 1, 0, 0);
+	udelay(10);
+	phy_soft_reset(dram);
+	/* release ctrl presetn, and config ctl registers */
+	rkclk_ddr_reset(dram, 1, 0, 0, 0);
+	pctl_cfg(dram, sdram_params);
+	sdram_params->ch.ddrconfig = calculate_ddrconfig(sdram_params);
+	set_ctl_address_map(dram, sdram_params);
+	phy_cfg(dram, sdram_params);
+
+	/* enable dfi_init_start to init phy after ctl srstn deassert */
+	setbits_le32(pctl_base + DDR_PCTL2_DFIMISC, (1 << 5) | (1 << 4));
+
+	rkclk_ddr_reset(dram, 0, 0, 0, 0);
+	/* wait for dfi_init_done and dram init complete */
+	while ((readl(pctl_base + DDR_PCTL2_STAT) & 0x7) == 0)
+		continue;
+
+	if (sdram_params->dramtype == LPDDR3)
+		write_mr(dram, 3, 11, 3, LPDDR3);
+
+	/* do ddr gate training */
+redo_cs0_training:
+	if (data_training(dram, 0, sdram_params->dramtype) != 0) {
+		if (pre_init != 0)
+			printascii("DTT cs0 error\n");
+		return -1;
+	}
+	if (check_rd_gate(dram)) {
+		printascii("re training cs0");
+		goto redo_cs0_training;
+	}
+
+	if (sdram_params->dramtype == LPDDR3) {
+		if ((read_mr(dram, 1, 8) & 0x3) != 0x3)
+			return -1;
+	} else if (sdram_params->dramtype == LPDDR2) {
+		if ((read_mr(dram, 1, 8) & 0x3) != 0x0)
+			return -1;
+	}
+	/* for px30: when 2cs, both 2 cs should be training */
+	if (pre_init != 0 && sdram_params->ch.rank == 2) {
+redo_cs1_training:
+		if (data_training(dram, 1, sdram_params->dramtype) != 0) {
+			printascii("DTT cs1 error\n");
+			return -1;
+		}
+		if (check_rd_gate(dram)) {
+			printascii("re training cs1");
+			goto redo_cs1_training;
+		}
+	}
+
+	if (sdram_params->dramtype == DDR4)
+		write_vrefdq(dram, 0x3, 5670, sdram_params->dramtype);
+
+	dram_all_config(dram, sdram_params);
+	enable_low_power(dram, sdram_params);
+
+	return 0;
+}
+
+static u64 dram_detect_cap(struct dram_info *dram,
+			   struct px30_sdram_params *sdram_params,
+			   unsigned char channel)
+{
+	void __iomem *pctl_base = dram->pctl;
+	void __iomem *phy_base = dram->phy;
+
+	/*
+	 * for ddr3: ddrconf = 3
+	 * for ddr4: ddrconf = 12
+	 * for lpddr3: ddrconf = 3
+	 * default bw = 1
+	 */
+	u32 bk, bktmp;
+	u32 col, coltmp;
+	u32 row, rowtmp, row_3_4;
+	void __iomem *test_addr, *test_addr1;
+	u32 dbw;
+	u32 cs;
+	u32 bw = 1;
+	u64 cap = 0;
+	u32 dram_type = sdram_params->dramtype;
+	u32 pwrctl;
+
+	if (dram_type != DDR4) {
+		/* detect col and bk for ddr3/lpddr3 */
+		coltmp = 12;
+		bktmp = 3;
+		rowtmp = 16;
+
+		for (col = coltmp; col >= 9; col -= 1) {
+			writel(0, CONFIG_SYS_SDRAM_BASE);
+			test_addr = (void __iomem *)(CONFIG_SYS_SDRAM_BASE +
+					(1ul << (col + bw - 1ul)));
+			writel(PATTERN, test_addr);
+			if ((readl(test_addr) == PATTERN) &&
+			    (readl(CONFIG_SYS_SDRAM_BASE) == 0))
+				break;
+		}
+		if (col == 8) {
+			printascii("col error\n");
+			goto cap_err;
+		}
+
+		test_addr = (void __iomem *)(CONFIG_SYS_SDRAM_BASE +
+				(1ul << (coltmp + bktmp + bw - 1ul)));
+		writel(0, CONFIG_SYS_SDRAM_BASE);
+		writel(PATTERN, test_addr);
+		if ((readl(test_addr) == PATTERN) &&
+		    (readl(CONFIG_SYS_SDRAM_BASE) == 0))
+			bk = 3;
+		else
+			bk = 2;
+		if (dram_type == DDR3)
+			dbw = 1;
+		else
+			dbw = 2;
+	} else {
+		/* detect bg for ddr4 */
+		coltmp = 10;
+		bktmp = 4;
+		rowtmp = 17;
+
+		col = 10;
+		bk = 2;
+		test_addr = (void __iomem *)(CONFIG_SYS_SDRAM_BASE +
+				(1ul << (coltmp + bw + 1ul)));
+		writel(0, CONFIG_SYS_SDRAM_BASE);
+		writel(PATTERN, test_addr);
+		if ((readl(test_addr) == PATTERN) &&
+		    (readl(CONFIG_SYS_SDRAM_BASE) == 0))
+			dbw = 0;
+		else
+			dbw = 1;
+	}
+	/* detect row */
+	for (row = rowtmp; row > 12; row--) {
+		writel(0, CONFIG_SYS_SDRAM_BASE);
+		test_addr = (void __iomem *)(CONFIG_SYS_SDRAM_BASE +
+				(1ul << (row + bktmp + coltmp + bw - 1ul)));
+		writel(PATTERN, test_addr);
+		if ((readl(test_addr) == PATTERN) &&
+		    (readl(CONFIG_SYS_SDRAM_BASE) == 0))
+			break;
+	}
+	if (row == 12) {
+		printascii("row error");
+		goto cap_err;
+	}
+	/* detect row_3_4 */
+	test_addr = CONFIG_SYS_SDRAM_BASE;
+	test_addr1 = (void __iomem *)(CONFIG_SYS_SDRAM_BASE +
+			(0x3ul << (row + bktmp + coltmp + bw - 1ul - 1ul)));
+
+	writel(0, test_addr);
+	writel(PATTERN, test_addr1);
+	if ((readl(test_addr) == 0) &&
+	    (readl(test_addr1) == PATTERN))
+		row_3_4 = 0;
+	else
+		row_3_4 = 1;
+
+	/* disable auto low-power */
+	pwrctl = readl(pctl_base + DDR_PCTL2_PWRCTL);
+	writel(0, pctl_base + DDR_PCTL2_PWRCTL);
+
+	/* bw and cs detect using phy read gate training */
+	if (data_training(dram, 1, dram_type) == 0)
+		cs = 1;
+	else
+		cs = 0;
+
+	clrsetbits_le32(PHY_REG(phy_base, 0), 0xf << 4, 0xf << 4);
+	setbits_le32(PHY_REG(phy_base, 0x46), 1 << 3);
+	setbits_le32(PHY_REG(phy_base, 0x56), 1 << 3);
+
+	phy_soft_reset(dram);
+
+	if (data_training(dram, 0, dram_type) == 0)
+		bw = 2;
+	else
+		bw = 1;
+
+	/* restore auto low-power */
+	writel(pwrctl, pctl_base + DDR_PCTL2_PWRCTL);
+
+	sdram_params->ch.rank = cs + 1;
+	sdram_params->ch.col = col;
+	sdram_params->ch.bk = bk;
+	sdram_params->ch.dbw = dbw;
+	sdram_params->ch.bw = bw;
+	sdram_params->ch.cs0_row = row;
+	sdram_params->ch.cs0_high16bit_row = row;
+	if (cs) {
+		sdram_params->ch.cs1_row = row;
+		sdram_params->ch.cs1_high16bit_row = row;
+	} else {
+		sdram_params->ch.cs1_row = 0;
+		sdram_params->ch.cs1_high16bit_row = 0;
+	}
+	sdram_params->ch.row_3_4 = row_3_4;
+
+	if (dram_type == DDR4)
+		cap = 1llu << (cs + row + bk + col + ((dbw == 0) ? 2 : 1) + bw);
+	else
+		cap = 1llu << (cs + row + bk + col + bw);
+
+	return cap;
+
+cap_err:
+	return 0;
+}
+
+static u32 remodify_sdram_params(struct px30_sdram_params *sdram_params)
+{
+	u32 tmp = 0, tmp_adr = 0, i;
+
+	for (i = 0; sdram_params->pctl_regs.pctl[i][0] != 0xFFFFFFFF; i++) {
+		if (sdram_params->pctl_regs.pctl[i][0] == 0) {
+			tmp = sdram_params->pctl_regs.pctl[i][1];/* MSTR */
+			tmp_adr = i;
+		}
+	}
+
+	tmp &= ~((3ul << 30) | (3ul << 24) | (3ul << 12));
+
+	switch (sdram_params->ch.dbw) {
+	case 2:
+		tmp |= (3ul << 30);
+		break;
+	case 1:
+		tmp |= (2ul << 30);
+		break;
+	case 0:
+	default:
+		tmp |= (1ul << 30);
+		break;
+	}
+
+	if (sdram_params->ch.rank == 2)
+		tmp |= 3 << 24;
+	else
+		tmp |= 1 << 24;
+
+	tmp |= (2 - sdram_params->ch.bw) << 12;
+
+	sdram_params->pctl_regs.pctl[tmp_adr][1] = tmp;
+
+	return 0;
+}
+
+int dram_detect_high_row(struct dram_info *dram,
+			 struct px30_sdram_params *sdram_params,
+			 unsigned char channel)
+{
+	sdram_params->ch.cs0_high16bit_row = sdram_params->ch.cs0_row;
+	sdram_params->ch.cs1_high16bit_row = sdram_params->ch.cs1_row;
+
+	return 0;
+}
+
+static int dram_detect_cs1_row(struct px30_sdram_params *sdram_params,
+			       unsigned char channel)
+{
+	u32 ret = 0;
+	void __iomem *test_addr;
+	u32 row, bktmp, coltmp, bw;
+	u64 cs0_cap;
+	u32 byte_mask;
+
+	if (sdram_params->ch.rank == 2) {
+		cs0_cap = get_cs_cap(sdram_params, 0);
+
+		if (sdram_params->dramtype == DDR4) {
+			if (sdram_params->ch.dbw == 0)
+				bktmp = sdram_params->ch.bk + 2;
+			else
+				bktmp = sdram_params->ch.bk + 1;
+		} else {
+			bktmp = sdram_params->ch.bk;
+		}
+		bw = sdram_params->ch.bw;
+		coltmp = sdram_params->ch.col;
+
+		/*
+		 * because px30 support axi split,min bandwidth
+		 * is 8bit. if cs0 is 32bit, cs1 may 32bit or 16bit
+		 * so we check low 16bit data when detect cs1 row.
+		 * if cs0 is 16bit/8bit, we check low 8bit data.
+		 */
+		if (bw == 2)
+			byte_mask = 0xFFFF;
+		else
+			byte_mask = 0xFF;
+
+		/* detect cs1 row */
+		for (row = sdram_params->ch.cs0_row; row > 12; row--) {
+			test_addr = (void __iomem *)(CONFIG_SYS_SDRAM_BASE +
+				    cs0_cap +
+				    (1ul << (row + bktmp + coltmp + bw - 1ul)));
+			writel(0, CONFIG_SYS_SDRAM_BASE + cs0_cap);
+			writel(PATTERN, test_addr);
+
+			if (((readl(test_addr) & byte_mask) ==
+			     (PATTERN & byte_mask)) &&
+			    ((readl(CONFIG_SYS_SDRAM_BASE + cs0_cap) &
+			      byte_mask) == 0)) {
+				ret = row;
+				break;
+			}
+		}
+	}
+
+	return ret;
+}
+
+/* return: 0 = success, other = fail */
+static int sdram_init_detect(struct dram_info *dram,
+			     struct px30_sdram_params *sdram_params)
+{
+	u32 ret;
+	u32 sys_reg = 0;
+	u32 sys_reg3 = 0;
+
+	if (sdram_init_(dram, sdram_params, 0) != 0)
+		return -1;
+
+	if (dram_detect_cap(dram, sdram_params, 0) == 0)
+		return -1;
+
+	/* modify bw, cs related timing */
+	remodify_sdram_params(sdram_params);
+	/* reinit sdram by real dram cap */
+	ret = sdram_init_(dram, sdram_params, 1);
+	if (ret != 0)
+		goto out;
+
+	/* redetect cs1 row */
+	sdram_params->ch.cs1_row =
+		dram_detect_cs1_row(sdram_params, 0);
+	if (sdram_params->ch.cs1_row) {
+		sys_reg = readl(&dram->pmugrf->os_reg[2]);
+		sys_reg3 = readl(&dram->pmugrf->os_reg[3]);
+		SYS_REG_ENC_CS1_ROW_(sdram_params->ch.cs1_row,
+				     sys_reg, sys_reg3);
+		writel(sys_reg, &dram->pmugrf->os_reg[2]);
+		writel(sys_reg3, &dram->pmugrf->os_reg[3]);
+	}
+
+	ret = dram_detect_high_row(dram, sdram_params, 0);
+
+out:
+	return ret;
+}
+
+struct px30_sdram_params
+		*get_default_sdram_config(void)
+{
+	sdram_configs[0].skew = &skew;
+
+	return &sdram_configs[0];
+}
+
+/* return: 0 = success, other = fail */
+int sdram_init(void)
+{
+	struct px30_sdram_params *sdram_params;
+	int ret = 0;
+
+	printascii("DDR Init V1.07\n");
+
+	dram_info.phy = (void *)DDR_PHY_BASE_ADDR;
+	dram_info.pctl = (void *)DDRC_BASE_ADDR;
+	dram_info.grf = (void *)GRF_BASE_ADDR;
+	dram_info.cru = (void *)CRU_BASE_ADDR;
+	dram_info.msch = (void *)SERVER_MSCH0_BASE_ADDR;
+	dram_info.ddr_grf = (void *)DDR_GRF_BASE_ADDR;
+	dram_info.pmugrf = (void *)PMUGRF_BASE_ADDR;
+
+	sdram_params = get_default_sdram_config();
+	ret = sdram_init_detect(&dram_info, sdram_params);
+
+	if (ret)
+		goto error;
+
+	printascii("out\n");
+	return ret;
+error:
+	return (-1);
+}
+
+#else /* CONFIG_TPL_BUILD */
+
 static int px30_dmc_probe(struct udevice *dev)
 {
 	struct dram_info *priv = dev_get_priv(dev);
@@ -25,8 +1190,8 @@ static int px30_dmc_probe(struct udevice *dev)
 	priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
 	debug("%s: pmugrf=%p\n", __func__, priv->pmugrf);
 	priv->info.base = CONFIG_SYS_SDRAM_BASE;
-	priv->info.size = rockchip_sdram_size(
-				(phys_addr_t)&priv->pmugrf->os_reg[2]);
+	priv->info.size =
+		rockchip_sdram_size((phys_addr_t)&priv->pmugrf->os_reg[2]);
 
 	return 0;
 }
@@ -44,7 +1209,6 @@ static struct ram_ops px30_dmc_ops = {
 	.get_info = px30_dmc_get_info,
 };
 
-
 static const struct udevice_id px30_dmc_ids[] = {
 	{ .compatible = "rockchip,px30-dmc" },
 	{ }
@@ -58,3 +1222,4 @@ U_BOOT_DRIVER(dmc_px30) = {
 	.probe = px30_dmc_probe,
 	.priv_auto_alloc_size = sizeof(struct dram_info),
 };
+#endif /* CONFIG_TPL_BUILD */

commit 4998d279e602a0597b13fe9f2ad0ccb53c1381b5
Author: YouMin Chen <cym@rock-chips.com>
Date:   Wed Jul 18 17:06:42 2018 +0800

    rockchip: px30: enable FIFO for uart in board_debug_uart_init
    
    Change-Id: I87a49f871625e9a705cd1a5e33db162d8c761048
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c
index 47375ecef6..4caafb7a82 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -10,6 +10,7 @@
 #include <asm/arch/cru_px30.h>
 #include <asm/arch/grf_px30.h>
 #include <asm/arch/hardware.h>
+#include <asm/arch/uart.h>
 #include <asm/armv8/mmu.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/cru_px30.h>
@@ -52,6 +53,7 @@ int arch_cpu_init(void)
 }
 
 #define GRF_BASE		0xff140000
+#define UART2_BASE		0xff160000
 #define CRU_BASE		0xff2b0000
 void board_debug_uart_init(void)
 {
@@ -68,6 +70,7 @@ void board_debug_uart_init(void)
 
 #ifdef CONFIG_TPL_BUILD
 	static struct px30_cru * const cru = (void *)CRU_BASE;
+	static struct rk_uart * const uart = (void *)UART2_BASE;
 
 	/* GRF_GPIO2BH_IOMUX */
 	enum {
@@ -119,6 +122,9 @@ void board_debug_uart_init(void)
 	rk_clrsetreg(&grf->gpio2bh_iomux,
 		     GPIO2B4_MASK,
 		     GPIO2B4_UART2_TXM1 << GPIO2B4_SHIFT);
+
+	/* enable FIFO */
+	writel(0x1, &uart->sfe);
 #else
 #ifdef CONFIG_SPL_BUILD
 	/* GRF_GPIO1DL_IOMUX */

commit 0f72a32513dbaf49205ce78e74f8b9195e246ec8
Author: YouMin Chen <cym@rock-chips.com>
Date:   Fri Jul 6 09:08:43 2018 +0800

    rockchip: px30: add UART clock and iomux for TPL_BUILD
    
    Change-Id: Id2fed3e99e0e421063e006fcf857fed889216b72
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_px30.h b/arch/arm/include/asm/arch-rockchip/cru_px30.h
index 3094246b38..1cadbe4b54 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_px30.h
@@ -274,7 +274,7 @@ enum {
 	BUS_HCLK_DIV_SHIFT	= 0,
 	BUS_HCLK_DIV_MASK	= 0x1f << BUS_HCLK_DIV_SHIFT,
 
-	/* CRU_CLK_SEL24_CON */
+	/* CRU_CLK_SEL37_CON */
 	UART2_PLL_SEL_SHIFT	= 14,
 	UART2_PLL_SEL_MASK	= 3 << UART2_PLL_SEL_SHIFT,
 	UART2_PLL_SEL_GPLL	= 0,
@@ -284,7 +284,7 @@ enum {
 	UART2_DIV_CON_SHIFT	= 0,
 	UART2_DIV_CON_MASK	= 0x1f << UART2_DIV_CON_SHIFT,
 
-	/* CRU_CLK_SEL25_CON */
+	/* CRU_CLK_SEL38_CON */
 	UART2_CLK_SEL_SHIFT	= 14,
 	UART2_CLK_SEL_MASK	= 3 << UART2_PLL_SEL_SHIFT,
 	UART2_CLK_SEL_UART2	= 0,
diff --git a/arch/arm/include/asm/arch-rockchip/grf_px30.h b/arch/arm/include/asm/arch-rockchip/grf_px30.h
index 65d99ccbd6..fa9f501da7 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_px30.h
@@ -142,452 +142,4 @@ struct px30_pmugrf {
 
 check_member(px30_pmugrf, reset_function_status, 0x230);
 
-/* GRF_GPIO0A_IOMUX */
-enum {
-	GPIO0A7_SHIFT		= 14,
-	GPIO0A7_MASK		= 3 << GPIO0A7_SHIFT,
-	GPIO0A7_GPIO		= 0,
-	GPIO0A7_I2C3_SDA,
-	GPIO0A7_HDMI_DDCSDA,
-
-	GPIO0A6_SHIFT		= 12,
-	GPIO0A6_MASK		= 3 << GPIO0A6_SHIFT,
-	GPIO0A6_GPIO		= 0,
-	GPIO0A6_I2C3_SCL,
-	GPIO0A6_HDMI_DDCSCL,
-
-	GPIO0A3_SHIFT		= 6,
-	GPIO0A3_MASK		= 3 << GPIO0A3_SHIFT,
-	GPIO0A3_GPIO		= 0,
-	GPIO0A3_I2C1_SDA,
-	GPIO0A3_SDIO_CMD,
-
-	GPIO0A2_SHIFT		= 4,
-	GPIO0A2_MASK		= 3 << GPIO0A2_SHIFT,
-	GPIO0A2_GPIO		= 0,
-	GPIO0A2_I2C1_SCL,
-
-	GPIO0A1_SHIFT		= 2,
-	GPIO0A1_MASK		= 3 << GPIO0A1_SHIFT,
-	GPIO0A1_GPIO		= 0,
-	GPIO0A1_I2C0_SDA,
-
-	GPIO0A0_SHIFT		= 0,
-	GPIO0A0_MASK		= 3 << GPIO0A0_SHIFT,
-	GPIO0A0_GPIO		= 0,
-	GPIO0A0_I2C0_SCL,
-};
-
-/* GRF_GPIO0B_IOMUX */
-enum {
-	GPIO0B7_SHIFT		= 14,
-	GPIO0B7_MASK		= 3 << GPIO0B7_SHIFT,
-	GPIO0B7_GPIO		= 0,
-	GPIO0B7_HDMI_HDP,
-
-	GPIO0B6_SHIFT		= 12,
-	GPIO0B6_MASK		= 3 << GPIO0B6_SHIFT,
-	GPIO0B6_GPIO		= 0,
-	GPIO0B6_I2S_SDI,
-	GPIO0B6_SPI_CSN0,
-
-	GPIO0B5_SHIFT		= 10,
-	GPIO0B5_MASK		= 3 << GPIO0B5_SHIFT,
-	GPIO0B5_GPIO		= 0,
-	GPIO0B5_I2S_SDO,
-	GPIO0B5_SPI_RXD,
-
-	GPIO0B3_SHIFT		= 6,
-	GPIO0B3_MASK		= 3 << GPIO0B3_SHIFT,
-	GPIO0B3_GPIO		= 0,
-	GPIO0B3_I2S1_LRCKRX,
-	GPIO0B3_SPI_TXD,
-
-	GPIO0B1_SHIFT		= 2,
-	GPIO0B1_MASK		= 3 << GPIO0B1_SHIFT,
-	GPIO0B1_GPIO		= 0,
-	GPIO0B1_I2S_SCLK,
-	GPIO0B1_SPI_CLK,
-
-	GPIO0B0_SHIFT		= 0,
-	GPIO0B0_MASK		= 3,
-	GPIO0B0_GPIO		= 0,
-	GPIO0B0_I2S_MCLK,
-};
-
-/* GRF_GPIO0C_IOMUX */
-enum {
-	GPIO0C4_SHIFT		= 8,
-	GPIO0C4_MASK		= 3 << GPIO0C4_SHIFT,
-	GPIO0C4_GPIO		= 0,
-	GPIO0C4_HDMI_CECSDA,
-
-	GPIO0C1_SHIFT		= 2,
-	GPIO0C1_MASK		= 3 << GPIO0C1_SHIFT,
-	GPIO0C1_GPIO		= 0,
-	GPIO0C1_UART0_RSTN,
-	GPIO0C1_CLK_OUT1,
-};
-
-/* GRF_GPIO0D_IOMUX */
-enum {
-	GPIO0D6_SHIFT		= 12,
-	GPIO0D6_MASK		= 3 << GPIO0D6_SHIFT,
-	GPIO0D6_GPIO		= 0,
-	GPIO0D6_SDIO_PWREN,
-	GPIO0D6_PWM11,
-
-
-	GPIO0D4_SHIFT		= 8,
-	GPIO0D4_MASK		= 3 << GPIO0D4_SHIFT,
-	GPIO0D4_GPIO		= 0,
-	GPIO0D4_PWM2,
-
-	GPIO0D3_SHIFT		= 6,
-	GPIO0D3_MASK		= 3 << GPIO0D3_SHIFT,
-	GPIO0D3_GPIO		= 0,
-	GPIO0D3_PWM1,
-
-	GPIO0D2_SHIFT		= 4,
-	GPIO0D2_MASK		= 3 << GPIO0D2_SHIFT,
-	GPIO0D2_GPIO		= 0,
-	GPIO0D2_PWM0,
-};
-
-/* GRF_GPIO1A_IOMUX */
-enum {
-	GPIO1A7_SHIFT		= 14,
-	GPIO1A7_MASK		= 1,
-	GPIO1A7_GPIO		= 0,
-	GPIO1A7_SDMMC_WRPRT,
-};
-
-/* GRF_GPIO1B_IOMUX */
-enum {
-	GPIO1B7_SHIFT		= 14,
-	GPIO1B7_MASK		= 3 << GPIO1B7_SHIFT,
-	GPIO1B7_GPIO		= 0,
-	GPIO1B7_SDMMC_CMD,
-
-	GPIO1B6_SHIFT		= 12,
-	GPIO1B6_MASK		= 3 << GPIO1B6_SHIFT,
-	GPIO1B6_GPIO		= 0,
-	GPIO1B6_SDMMC_PWREN,
-
-	GPIO1B4_SHIFT		= 8,
-	GPIO1B4_MASK		= 3 << GPIO1B4_SHIFT,
-	GPIO1B4_GPIO		= 0,
-	GPIO1B4_SPI_CSN1,
-	GPIO1B4_PWM12,
-
-	GPIO1B3_SHIFT		= 6,
-	GPIO1B3_MASK		= 3 << GPIO1B3_SHIFT,
-	GPIO1B3_GPIO		= 0,
-	GPIO1B3_UART1_RSTN,
-	GPIO1B3_PWM13,
-
-	GPIO1B2_SHIFT		= 4,
-	GPIO1B2_MASK		= 3 << GPIO1B2_SHIFT,
-	GPIO1B2_GPIO		= 0,
-	GPIO1B2_UART1_SIN,
-	GPIO1B2_UART21_SIN,
-
-	GPIO1B1_SHIFT		= 2,
-	GPIO1B1_MASK		= 3 << GPIO1B1_SHIFT,
-	GPIO1B1_GPIO		= 0,
-	GPIO1B1_UART1_SOUT,
-	GPIO1B1_UART21_SOUT,
-};
-
-/* GRF_GPIO1C_IOMUX */
-enum {
-	GPIO1C7_SHIFT		= 14,
-	GPIO1C7_MASK		= 3 << GPIO1C7_SHIFT,
-	GPIO1C7_GPIO		= 0,
-	GPIO1C7_NAND_CS3,
-	GPIO1C7_EMMC_RSTNOUT,
-
-	GPIO1C6_SHIFT		= 12,
-	GPIO1C6_MASK		= 3 << GPIO1C6_SHIFT,
-	GPIO1C6_GPIO		= 0,
-	GPIO1C6_NAND_CS2,
-	GPIO1C6_EMMC_CMD,
-
-
-	GPIO1C5_SHIFT		= 10,
-	GPIO1C5_MASK		= 3 << GPIO1C5_SHIFT,
-	GPIO1C5_GPIO		= 0,
-	GPIO1C5_SDMMC_D3,
-	GPIO1C5_JTAG_TMS,
-
-	GPIO1C4_SHIFT		= 8,
-	GPIO1C4_MASK		= 3 << GPIO1C4_SHIFT,
-	GPIO1C4_GPIO		= 0,
-	GPIO1C4_SDMMC_D2,
-	GPIO1C4_JTAG_TCK,
-
-	GPIO1C3_SHIFT		= 6,
-	GPIO1C3_MASK		= 3 << GPIO1C3_SHIFT,
-	GPIO1C3_GPIO		= 0,
-	GPIO1C3_SDMMC_D1,
-	GPIO1C3_UART2_SIN,
-
-	GPIO1C2_SHIFT		= 4,
-	GPIO1C2_MASK		= 3 << GPIO1C2_SHIFT ,
-	GPIO1C2_GPIO		= 0,
-	GPIO1C2_SDMMC_D0,
-	GPIO1C2_UART2_SOUT,
-
-	GPIO1C1_SHIFT		= 2,
-	GPIO1C1_MASK		= 3 << GPIO1C1_SHIFT,
-	GPIO1C1_GPIO		= 0,
-	GPIO1C1_SDMMC_DETN,
-
-	GPIO1C0_SHIFT		= 0,
-	GPIO1C0_MASK		= 3 << GPIO1C0_SHIFT,
-	GPIO1C0_GPIO		= 0,
-	GPIO1C0_SDMMC_CLKOUT,
-};
-
-/* GRF_GPIO1DL_IOMUX */
-enum {
-
-	GPIO1D3_SHIFT		= 12,
-	GPIO1D3_MASK		= 0xf << GPIO1D3_SHIFT,
-	GPIO1D3_GPIO		= 0,
-	GPIO1D3_SDMMC1_D1,
-	GPIO1D3_UART2_RXM0,
-
-	GPIO1D2_SHIFT		= 8,
-	GPIO1D2_MASK		= 0xf << GPIO1D2_SHIFT,
-	GPIO1D2_GPIO		= 0,
-	GPIO1D2_SDMMC1_D0,
-	GPIO1D2_UART2_TXM0,
-
-	GPIO1D1_SHIFT		= 4,
-	GPIO1D1_MASK		= 0xf << GPIO1D1_SHIFT,
-	GPIO1D1_GPIO		= 0,
-	GPIO1D1_SDMMC1_D3,
-
-	GPIO1D0_SHIFT		= 0,
-	GPIO1D0_MASK		= 0xf << GPIO1D0_SHIFT,
-	GPIO1D0_GPIO		= 0,
-	GPIO1D0_SDMMC1_D2,
-};
-/* GRF_GPIO1DH_IOMUX */
-enum {
-
-	GPIO1D7_SHIFT		= 14,
-	GPIO1D7_MASK		= 3 << GPIO1D7_SHIFT,
-	GPIO1D7_GPIO		= 0,
-	GPIO1D7_NAND_D7,
-	GPIO1D7_EMMC_D7,
-
-	GPIO1D6_SHIFT		= 12,
-	GPIO1D6_MASK		= 3 << GPIO1D6_SHIFT,
-	GPIO1D6_GPIO		= 0,
-	GPIO1D6_NAND_D6,
-	GPIO1D6_EMMC_D6,
-
-	GPIO1D5_SHIFT		= 10,
-	GPIO1D5_MASK		= 3 << GPIO1D5_SHIFT,
-	GPIO1D5_GPIO		= 0,
-	GPIO1D5_NAND_D5,
-	GPIO1D5_EMMC_D5,
-
-	GPIO1D4_SHIFT		= 8,
-	GPIO1D4_MASK		= 3 << GPIO1D4_SHIFT,
-	GPIO1D4_GPIO		= 0,
-	GPIO1D4_NAND_D4,
-	GPIO1D4_EMMC_D4,
-};
-/* GRF_GPIO2A_IOMUX */
-enum {
-	GPIO2A7_SHIFT		= 14,
-	GPIO2A7_MASK		= 3 << GPIO2A7_SHIFT,
-	GPIO2A7_GPIO		= 0,
-	GPIO2A7_NAND_DQS,
-	GPIO2A7_EMMC_CLKOUT,
-
-	GPIO2A5_SHIFT		= 10,
-	GPIO2A5_MASK		= 3 << GPIO2A5_SHIFT,
-	GPIO2A5_GPIO		= 0,
-	GPIO2A5_NAND_WP,
-	GPIO2A5_EMMC_PWREN,
-
-	GPIO2A4_SHIFT		= 8,
-	GPIO2A4_MASK		= 3 << GPIO2A4_SHIFT,
-	GPIO2A4_GPIO		= 0,
-	GPIO2A4_NAND_RDY,
-	GPIO2A4_EMMC_CMD,
-
-	GPIO2A3_SHIFT		= 6,
-	GPIO2A3_MASK		= 3 << GPIO2A3_SHIFT,
-	GPIO2A3_GPIO		= 0,
-	GPIO2A3_NAND_RDN,
-	GPIO2A4_SPI1_CSN1,
-
-	GPIO2A2_SHIFT		= 4,
-	GPIO2A2_MASK		= 3 << GPIO2A2_SHIFT,
-	GPIO2A2_GPIO		= 0,
-	GPIO2A2_NAND_WRN,
-	GPIO2A4_SPI1_CSN0,
-
-	GPIO2A1_SHIFT		= 2,
-	GPIO2A1_MASK		= 3 << GPIO2A1_SHIFT,
-	GPIO2A1_GPIO		= 0,
-	GPIO2A1_NAND_CLE,
-	GPIO2A1_SPI1_TXD,
-
-	GPIO2A0_SHIFT		= 0,
-	GPIO2A0_MASK		= 3 << GPIO2A0_SHIFT,
-	GPIO2A0_GPIO		= 0,
-	GPIO2A0_NAND_ALE,
-	GPIO2A0_SPI1_RXD,
-};
-
-/* GRF_GPIO2B_IOMUX */
-enum {
-	GPIO2B7_SHIFT		= 14,
-	GPIO2B7_MASK		= 3 << GPIO2B7_SHIFT,
-	GPIO2B7_GPIO		= 0,
-	GPIO2B7_GMAC_RXER,
-
-	GPIO2B6_SHIFT		= 12,
-	GPIO2B6_MASK		= 3 << GPIO2B6_SHIFT,
-	GPIO2B6_GPIO		= 0,
-	GPIO2B6_GMAC_CLK,
-	GPIO2B6_MAC_LINK,
-
-	GPIO2B5_SHIFT		= 10,
-	GPIO2B5_MASK		= 3 << GPIO2B5_SHIFT,
-	GPIO2B5_GPIO		= 0,
-	GPIO2B5_GMAC_TXEN,
-
-	GPIO2B4_SHIFT		= 8,
-	GPIO2B4_MASK		= 3 << GPIO2B4_SHIFT,
-	GPIO2B4_GPIO		= 0,
-	GPIO2B4_GMAC_MDIO,
-
-	GPIO2B3_SHIFT		= 6,
-	GPIO2B3_MASK		= 3 << GPIO2B3_SHIFT,
-	GPIO2B3_GPIO		= 0,
-	GPIO2B3_GMAC_RXCLK,
-
-	GPIO2B2_SHIFT		= 4,
-	GPIO2B2_MASK		= 3 << GPIO2B2_SHIFT,
-	GPIO2B2_GPIO		= 0,
-	GPIO2B2_GMAC_CRS,
-
-	GPIO2B1_SHIFT		= 2,
-	GPIO2B1_MASK		= 3 << GPIO2B1_SHIFT,
-	GPIO2B1_GPIO		= 0,
-	GPIO2B1_GMAC_TXCLK,
-
-
-	GPIO2B0_SHIFT		= 0,
-	GPIO2B0_MASK		= 3 << GPIO2B0_SHIFT,
-	GPIO2B0_GPIO		= 0,
-	GPIO2B0_GMAC_RXDV,
-	GPIO2B0_MAC_SPEED_IOUT,
-};
-
-/* GRF_GPIO2C_IOMUX */
-enum {
-	GPIO2C7_SHIFT		= 14,
-	GPIO2C7_MASK		= 3 << GPIO2C7_SHIFT,
-	GPIO2C7_GPIO		= 0,
-	GPIO2C7_GMAC_TXD3,
-
-	GPIO2C6_SHIFT		= 12,
-	GPIO2C6_MASK		= 3 << GPIO2C6_SHIFT,
-	GPIO2C6_GPIO		= 0,
-	GPIO2C6_GMAC_TXD2,
-
-	GPIO2C5_SHIFT		= 10,
-	GPIO2C5_MASK		= 3 << GPIO2C5_SHIFT,
-	GPIO2C5_GPIO		= 0,
-	GPIO2C5_I2C2_SCL,
-	GPIO2C5_GMAC_RXD2,
-
-	GPIO2C4_SHIFT		= 8,
-	GPIO2C4_MASK		= 3 << GPIO2C4_SHIFT,
-	GPIO2C4_GPIO		= 0,
-	GPIO2C4_I2C2_SDA,
-	GPIO2C4_GMAC_RXD3,
-
-	GPIO2C3_SHIFT		= 6,
-	GPIO2C3_MASK		= 3 << GPIO2C3_SHIFT,
-	GPIO2C3_GPIO		= 0,
-	GPIO2C3_GMAC_TXD0,
-
-	GPIO2C2_SHIFT		= 4,
-	GPIO2C2_MASK		= 3 << GPIO2C2_SHIFT,
-	GPIO2C2_GPIO		= 0,
-	GPIO2C2_GMAC_TXD1,
-
-	GPIO2C1_SHIFT		= 2,
-	GPIO2C1_MASK		= 3 << GPIO2C1_SHIFT,
-	GPIO2C1_GPIO		= 0,
-	GPIO2C1_GMAC_RXD0,
-
-	GPIO2C0_SHIFT		= 0,
-	GPIO2C0_MASK		= 3 << GPIO2C0_SHIFT,
-	GPIO2C0_GPIO		= 0,
-	GPIO2C0_GMAC_RXD1,
-};
-
-/* GRF_GPIO2D_IOMUX */
-enum {
-	GPIO2D1_SHIFT		= 2,
-	GPIO2D1_MASK		= 3 << GPIO2D1_SHIFT,
-	GPIO2D1_GPIO		= 0,
-	GPIO2D1_GMAC_MDC,
-
-	GPIO2D0_SHIFT		= 0,
-	GPIO2D0_MASK		= 3,
-	GPIO2D0_GPIO		= 0,
-	GPIO2D0_GMAC_COL,
-};
-
-/* GRF_GPIO3C_IOMUX */
-enum {
-	GPIO3C6_SHIFT		= 12,
-	GPIO3C6_MASK		= 3 << GPIO3C6_SHIFT,
-	GPIO3C6_GPIO		= 0,
-	GPIO3C6_DRV_VBUS1,
-
-	GPIO3C5_SHIFT		= 10,
-	GPIO3C5_MASK		= 3 << GPIO3C5_SHIFT,
-	GPIO3C5_GPIO		= 0,
-	GPIO3C5_PWM10,
-
-	GPIO3C1_SHIFT		= 2,
-	GPIO3C1_MASK		= 3 << GPIO3C1_SHIFT,
-	GPIO3C1_GPIO		= 0,
-	GPIO3C1_DRV_VBUS,
-};
-
-/* GRF_GPIO3D_IOMUX */
-enum {
-	GPIO3D2_SHIFT	= 4,
-	GPIO3D2_MASK	= 3 << GPIO3D2_SHIFT,
-	GPIO3D2_GPIO	= 0,
-	GPIO3D2_PWM3,
-};
-
-/* GRF_IOFUNC_CON0 */
-enum {
-	CON_IOMUX_UART2SEL_SHIFT	= 10,
-	CON_IOMUX_UART2SEL_MASK	= 3 << CON_IOMUX_UART2SEL_SHIFT,
-	CON_IOMUX_UART2SEL_M0	= 0,
-	CON_IOMUX_UART2SEL_M1,
-	CON_IOMUX_UART2SEL_USBPHY,
-};
-
-/* GRF_MACPHY_CON0 */
-enum {
-	MACPHY_CFG_ENABLE_SHIFT = 0,
-	MACPHY_CFG_ENABLE_MASK  = 1 << MACPHY_CFG_ENABLE_SHIFT,
-};
 #endif
diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c
index 0aefee52dd..47375ecef6 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -7,6 +7,7 @@
 #include <clk.h>
 #include <dm.h>
 #include <asm/io.h>
+#include <asm/arch/cru_px30.h>
 #include <asm/arch/grf_px30.h>
 #include <asm/arch/hardware.h>
 #include <asm/armv8/mmu.h>
@@ -49,11 +50,102 @@ int arch_cpu_init(void)
 
 	return 0;
 }
-#define GRF_BASE	0xff140000
+
+#define GRF_BASE		0xff140000
+#define CRU_BASE		0xff2b0000
 void board_debug_uart_init(void)
 {
-static struct px30_grf * const grf = (void *)GRF_BASE;
+	static struct px30_grf * const grf = (void *)GRF_BASE;
+
+	/* GRF_IOFUNC_CON0 */
+	enum {
+		CON_IOMUX_UART2SEL_SHIFT	= 10,
+		CON_IOMUX_UART2SEL_MASK = 3 << CON_IOMUX_UART2SEL_SHIFT,
+		CON_IOMUX_UART2SEL_M0	= 0,
+		CON_IOMUX_UART2SEL_M1,
+		CON_IOMUX_UART2SEL_USBPHY,
+	};
+
+#ifdef CONFIG_TPL_BUILD
+	static struct px30_cru * const cru = (void *)CRU_BASE;
+
+	/* GRF_GPIO2BH_IOMUX */
+	enum {
+		GPIO2B7_SHIFT		= 12,
+		GPIO2B7_MASK		= 0xf << GPIO2B7_SHIFT,
+		GPIO2B7_GPIO		= 0,
+		GPIO2B7_CIF_D10M0,
+		GPIO2B7_I2C2_SCL,
+
+		GPIO2B6_SHIFT		= 8,
+		GPIO2B6_MASK		= 0xf << GPIO2B6_SHIFT,
+		GPIO2B6_GPIO		= 0,
+		GPIO2B6_CIF_D1M0,
+		GPIO2B6_UART2_RXM1,
+
+		GPIO2B5_SHIFT		= 4,
+		GPIO2B5_MASK		= 0xf << GPIO2B5_SHIFT,
+		GPIO2B5_GPIO		= 0,
+		GPIO2B5_PWM2,
+
+		GPIO2B4_SHIFT		= 4,
+		GPIO2B4_MASK		= 0xf << GPIO2B4_SHIFT,
+		GPIO2B4_GPIO		= 0,
+		GPIO2B4_CIF_D0M0,
+		GPIO2B4_UART2_TXM1,
+	};
+
+	/* uart_sel_clk default select 24MHz */
+	rk_clrsetreg(&cru->clksel_con[37],
+		     UART2_PLL_SEL_MASK | UART2_DIV_CON_MASK,
+		     UART2_PLL_SEL_24M << UART2_PLL_SEL_SHIFT | 0);
+	rk_clrsetreg(&cru->clksel_con[38],
+		     UART2_CLK_SEL_MASK,
+		     UART2_CLK_SEL_UART2 << UART2_CLK_SEL_SHIFT);
+
+	/* Enable early UART2 */
+	rk_clrsetreg(&grf->iofunc_con0,
+		     CON_IOMUX_UART2SEL_MASK,
+		     CON_IOMUX_UART2SEL_M1 << CON_IOMUX_UART2SEL_SHIFT);
+
+	/*
+	 * Set iomux to UART2_M0 and UART2_M1.
+	 * Because uart2_rxm0 and uart2_txm0 are default reset value,
+	 * so only need set uart2_rxm1 and uart2_txm1 here.
+	 */
+	rk_clrsetreg(&grf->gpio2bh_iomux,
+		     GPIO2B6_MASK,
+		     GPIO2B6_UART2_RXM1 << GPIO2B6_SHIFT);
+	rk_clrsetreg(&grf->gpio2bh_iomux,
+		     GPIO2B4_MASK,
+		     GPIO2B4_UART2_TXM1 << GPIO2B4_SHIFT);
+#else
 #ifdef CONFIG_SPL_BUILD
+	/* GRF_GPIO1DL_IOMUX */
+	enum {
+		GPIO1D3_SHIFT		= 12,
+		GPIO1D3_MASK		= 0xf << GPIO1D3_SHIFT,
+		GPIO1D3_GPIO		= 0,
+		GPIO1D3_SDMMC_D1,
+		GPIO1D3_UART2_RXM0,
+
+		GPIO1D2_SHIFT		= 8,
+		GPIO1D2_MASK		= 0xf << GPIO1D2_SHIFT,
+		GPIO1D2_GPIO		= 0,
+		GPIO1D2_SDMMC_D0,
+		GPIO1D2_UART2_TXM0,
+
+		GPIO1D1_SHIFT		= 4,
+		GPIO1D1_MASK		= 0xf << GPIO1D1_SHIFT,
+		GPIO1D1_GPIO		= 0,
+		GPIO1D1_SDIO_D3,
+
+		GPIO1D0_SHIFT		= 4,
+		GPIO1D0_MASK		= 0xf << GPIO1D0_SHIFT,
+		GPIO1D0_GPIO		= 0,
+		GPIO1D0_SDIO_D2,
+	};
+
 	/* Do not set the iomux in U-Boot proper because SD card may using it */
 	/* Enable early UART2 channel m0 on the px30 */
 	rk_clrsetreg(&grf->gpio1dl_iomux,
@@ -65,6 +157,7 @@ static struct px30_grf * const grf = (void *)GRF_BASE;
 	rk_clrsetreg(&grf->iofunc_con0,
 		     CON_IOMUX_UART2SEL_MASK,
 		     CON_IOMUX_UART2SEL_M0 << CON_IOMUX_UART2SEL_SHIFT);
+#endif
 }
 
 int set_armclk_rate(void)

commit c58827f3a4ebc8f82f5c015153c94ab51035928c
Author: YouMin Chen <cym@rock-chips.com>
Date:   Fri Jul 6 09:30:38 2018 +0800

    rockchip: px30: not need syscon_px30.c when build TPL_TINY_FRAMEWORK
    
    Change-Id: I50456633160241f25cdc58201739111345b6884c
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/px30/Makefile b/arch/arm/mach-rockchip/px30/Makefile
index 73d159c32a..027b304acd 100644
--- a/arch/arm/mach-rockchip/px30/Makefile
+++ b/arch/arm/mach-rockchip/px30/Makefile
@@ -6,5 +6,7 @@
 
 
 obj-y += clk_px30.o
+ifneq ($(CONFIG_TPL_BUILD)$(CONFIG_TPL_TINY_FRAMEWORK),yy)
 obj-y += syscon_px30.o
+endif
 obj-y += px30.o

commit 7af4eca73c1c016e8ce5157d5aa0dc77c015c3e1
Author: YouMin Chen <cym@rock-chips.com>
Date:   Thu Jul 5 20:05:41 2018 +0800

    drivers: ram: ram-uclass depend on TPL_DM or SPL_DM
    
    Some platform with sram size small, not use TPL_DM framework for TPL,
    so never need ram-uclass.
    This can remove _u_boot_list_2_uclass_2_ram from tpl bin.
    
    Change-Id: I93a6cfcc164f193d12f763d41ce68b5b20233541
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/drivers/ram/Makefile b/drivers/ram/Makefile
index 51ae6be655..8d102f9c1d 100644
--- a/drivers/ram/Makefile
+++ b/drivers/ram/Makefile
@@ -4,7 +4,7 @@
 #
 # SPDX-License-Identifier:      GPL-2.0+
 #
-obj-$(CONFIG_RAM) += ram-uclass.o
+obj-$(CONFIG_$(SPL_TPL_)DM) += ram-uclass.o
 obj-$(CONFIG_SANDBOX) += sandbox_ram.o
 obj-$(CONFIG_STM32_SDRAM) += stm32_sdram.o
 obj-$(CONFIG_ARCH_BMIPS) += bmips_ram.o

commit ee6382047fd997ce7f89191e5de4e041ef9e5cb3
Author: YouMin Chen <cym@rock-chips.com>
Date:   Thu Jul 5 19:56:04 2018 +0800

    drivers: ram: TPL_RAM remove dependency of TPL_DM
    
    Some platform has a very limited SRAM space to run the TPL with
    TPL_DM framework, so it's better to remove the dependency of
    TPL_DM here.
    
    Change-Id: Ia8bb6351e21f6590f68efe3663a60ca3653ba78d
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/drivers/ram/Kconfig b/drivers/ram/Kconfig
index 47969f3f28..c3273ab7d9 100644
--- a/drivers/ram/Kconfig
+++ b/drivers/ram/Kconfig
@@ -19,7 +19,7 @@ config SPL_RAM
 
 config TPL_RAM
 	bool "Enable RAM support in TPL"
-	depends on RAM && TPL_DM
+	depends on RAM
 	help
 	  The RAM subsystem adds a small amount of overhead to the image.
 	  If this is acceptable and you have a need to use RAM drivers in

commit 5dd9d28a4c5bf06ae4d664edf0cbd39d206c10d9
Author: YouMin Chen <cym@rock-chips.com>
Date:   Thu Jul 5 19:41:29 2018 +0800

    rockchip: ARM64: tpl: add timer_init and __udelay in tpl.c
    
    For ARM64,it don't have define timer_init and __udelay except
    lib/timer.c.
    If undefine CONFIG_TPL_LIBGENERIC_SUPPORT for reduce TPL size,
    it need add timer_init and __udelay to replace.
    
    Change-Id: Ia9fbac7e21675b8d7d6c542d01d3eebc3be245e4
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c
index 315ba3ad20..ee70aae527 100644
--- a/arch/arm/mach-rockchip/tpl.c
+++ b/arch/arm/mach-rockchip/tpl.c
@@ -34,6 +34,30 @@ void putc(char c)
 #endif /* CONFIG_TPL_LIBCOMMON_SUPPORT */
 
 #ifndef CONFIG_TPL_LIBGENERIC_SUPPORT
+#ifdef CONFIG_ARM64
+/* for ARM64,it don't have define timer_init and __udelay except lib/timer.c */
+int __weak timer_init(void)
+{
+	return 0;
+}
+
+void __weak __udelay(unsigned long usec)
+{
+	u64 i, j, count;
+
+	asm volatile ("MRS %0, CNTPCT_EL0" : "=r"(count));
+	i = count;
+	/* usec to count,24MHz */
+	j = usec * 24;
+	i += j;
+	while (1) {
+		asm volatile ("MRS %0, CNTPCT_EL0" : "=r"(count));
+		if (count > i)
+			break;
+	}
+}
+#endif /* CONFIG_ARM64 */
+
 void udelay(unsigned long usec)
 {
 	__udelay(usec);
@@ -45,7 +69,7 @@ void hang(void)
         for (;;)
                 ;
 }
-#endif
+#endif /* CONFIG_TPL_LIBGENERIC_SUPPORT */
 
 u32 spl_boot_device(void)
 {

commit 37e5dcc8baea3dc897741e9be973d7d226f5edb4
Author: YouMin Chen <cym@rock-chips.com>
Date:   Thu Jul 5 19:30:58 2018 +0800

    rockchip: ARM64: tpl: modify TPL_TINY_FRAMEWORK flow to reduce code size
    
    If sram size is small for TPL build, it can defined
    CONFIG_TPL_TINY_FRAMEWORK to reduce TPL size.
    For ARM64 if defined CONFIG_TPL_TINY_FRAMEWORK when build TPL, after
    save_boot_params(), it jump to board_init_f() directly, then return to
    maskrom. and stack also use maskrom defined result, never change the SP.
    
    Change-Id: I80dc414fcc276f5ea2c09afd6d1eb16e2f2f4cf6
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S
index 6d47988a13..3336c1e0fd 100644
--- a/arch/arm/cpu/armv8/start.S
+++ b/arch/arm/cpu/armv8/start.S
@@ -30,6 +30,7 @@ _start:
 	b	reset
 #endif
 
+#if !CONFIG_IS_ENABLED(TINY_FRAMEWORK)
 	.align 3
 
 .globl	_TEXT_BASE
@@ -355,3 +356,4 @@ ENDPROC(c_runtime_cpu_setup)
 WEAK(save_boot_params)
 	b	save_boot_params_ret	/* back to my caller */
 ENDPROC(save_boot_params)
+#endif
diff --git a/arch/arm/include/asm/arch-rockchip/boot0.h b/arch/arm/include/asm/arch-rockchip/boot0.h
index 5d35c35c28..d5bbe31e84 100644
--- a/arch/arm/include/asm/arch-rockchip/boot0.h
+++ b/arch/arm/include/asm/arch-rockchip/boot0.h
@@ -42,9 +42,18 @@ entry_counter:
 
 #if (defined(CONFIG_SPL_BUILD) || defined(CONFIG_ARM64))
 	/* U-Boot proper of armv7 do not need this */
+#if CONFIG_IS_ENABLED(TINY_FRAMEWORK) && defined(CONFIG_ARM64)
+	/* Allow the board to save important registers */
+	b save_boot_params
+.globl	save_boot_params_ret
+save_boot_params_ret:
+	b board_init_f
+#else
 	b reset
 #endif
 
+#endif
+
 #if !defined(CONFIG_ARM64)
 	/*
 	 * For armv7, the addr '_start' will used as vector start address
diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c
index 3cb9b7d5c6..315ba3ad20 100644
--- a/arch/arm/mach-rockchip/tpl.c
+++ b/arch/arm/mach-rockchip/tpl.c
@@ -57,6 +57,14 @@ __weak void rockchip_stimer_init(void)
 #ifndef CONFIG_ARM64
 	asm volatile("mcr p15, 0, %0, c14, c0, 0"
 		     : : "r"(COUNTER_FREQUENCY));
+#elif CONFIG_IS_ENABLED(TINY_FRAMEWORK)
+	/*
+	 * For ARM64,generally initialize CNTFRQ in start.S,
+	 * but if defined CONFIG_TPL_TINY_FRAMEWORK should skip start.S.
+	 * So initialize CNTFRQ to 24MHz here.
+	 */
+	asm volatile("msr CNTFRQ_EL0, %0"
+		     : : "r" (COUNTER_FREQUENCY));
 #endif
 	writel(0, CONFIG_ROCKCHIP_STIMER_BASE + 0x10);
 	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);

commit ba5fd738de215472cc7c5f5511860738cf87df12
Author: YouMin Chen <cym@rock-chips.com>
Date:   Fri Jul 6 19:58:32 2018 +0800

    rockchip: tpl: rename CONFIG_TINY_TPL to CONFIG_TPL_TINY_FRAMEWORK
    
    Change-Id: Ia05a73467578f5620a9ba168e67bcfb02c40e1d0
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/sys_proto.h b/arch/arm/include/asm/arch-rockchip/sys_proto.h
index c6725f5993..536ed98b31 100644
--- a/arch/arm/include/asm/arch-rockchip/sys_proto.h
+++ b/arch/arm/include/asm/arch-rockchip/sys_proto.h
@@ -7,7 +7,7 @@
 #ifndef _ASM_ARCH_SYS_PROTO_H
 #define _ASM_ARCH_SYS_PROTO_H
 
-#if !defined(CONFIG_SPL_FRAMEWORK) || defined(CONFIG_TINY_TPL)
+#if !defined(CONFIG_SPL_FRAMEWORK) || CONFIG_IS_ENABLED(TINY_FRAMEWORK)
 int sdram_init(void);
 #endif
 
diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c
index d712130d55..3cb9b7d5c6 100644
--- a/arch/arm/mach-rockchip/tpl.c
+++ b/arch/arm/mach-rockchip/tpl.c
@@ -71,7 +71,7 @@ __weak int arch_cpu_init(void)
 
 void board_init_f(ulong dummy)
 {
-#if defined(CONFIG_SPL_FRAMEWORK) && !defined(CONFIG_TINY_TPL)
+#if defined(CONFIG_SPL_FRAMEWORK) && !CONFIG_IS_ENABLED(TINY_FRAMEWORK)
 	struct udevice *dev;
 	int ret;
 #endif
@@ -93,7 +93,7 @@ void board_init_f(ulong dummy)
 				U_BOOT_TIME ")\n");
 #endif
 
-#if defined(CONFIG_SPL_FRAMEWORK) && !defined(CONFIG_TINY_TPL)
+#if defined(CONFIG_SPL_FRAMEWORK) && !CONFIG_IS_ENABLED(TINY_FRAMEWORK)
 	ret = spl_early_init();
 	if (ret) {
 		debug("spl_early_init() failed: %d\n", ret);
@@ -104,7 +104,7 @@ void board_init_f(ulong dummy)
 	/* Init ARM arch timer */
 	timer_init();
 
-#if defined(CONFIG_SPL_FRAMEWORK) && !defined(CONFIG_TINY_TPL)
+#if defined(CONFIG_SPL_FRAMEWORK) && !CONFIG_IS_ENABLED(TINY_FRAMEWORK)
 	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
 	if (ret) {
 		printf("DRAM init failed: %d\n", ret);
@@ -119,7 +119,7 @@ void board_init_f(ulong dummy)
 #endif
 }
 
-#if !(defined(CONFIG_SPL_FRAMEWORK) && !defined(CONFIG_TINY_TPL))
+#if !(defined(CONFIG_SPL_FRAMEWORK) && !CONFIG_IS_ENABLED(TINY_FRAMEWORK))
 /* Place Holders */
 void board_init_r(gd_t *id, ulong dest_addr)
 {
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 0be334db2a..42203591d0 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -852,7 +852,7 @@ config TPL_LIBGENERIC_SUPPORT
 	  Enable support for generic U-Boot libraries within TPL. See
 	  SPL_LIBGENERIC_SUPPORT for details.
 
-config TINY_TPL
+config TPL_TINY_FRAMEWORK
 	bool "Support not to use spl framework in TPL"
 	help
 	  Enable support for not using spl framework in TPL, to reduce the TPL size.
diff --git a/common/spl/Makefile b/common/spl/Makefile
index 2267db8801..3e33f3138b 100644
--- a/common/spl/Makefile
+++ b/common/spl/Makefile
@@ -9,7 +9,7 @@
 #
 
 ifeq ($(CONFIG_TPL_BUILD), y)
-ifndef CONFIG_TINY_TPL
+ifndef CONFIG_TPL_TINY_FRAMEWORK
 obj-$(CONFIG_SPL_FRAMEWORK) += spl.o
 endif
 else
diff --git a/configs/evb-rk3036_defconfig b/configs/evb-rk3036_defconfig
index 9c064ce8e7..8ee6329d53 100644
--- a/configs/evb-rk3036_defconfig
+++ b/configs/evb-rk3036_defconfig
@@ -28,6 +28,7 @@ CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 CONFIG_SPL_OPTEE_SUPPORT=y
 CONFIG_SPL_OPTEE=y
+CONFIG_TPL_TINY_FRAMEWORK=y
 CONFIG_TPL_SERIAL_SUPPORT=y
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
diff --git a/configs/kylin-rk3036_defconfig b/configs/kylin-rk3036_defconfig
index 8bfd8f46c5..565ec37f67 100644
--- a/configs/kylin-rk3036_defconfig
+++ b/configs/kylin-rk3036_defconfig
@@ -28,6 +28,7 @@ CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 CONFIG_SPL_OPTEE_SUPPORT=y
 CONFIG_SPL_OPTEE=y
+CONFIG_TPL_TINY_FRAMEWORK=y
 CONFIG_TPL_SERIAL_SUPPORT=y
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index fc4f814355..f136a5bb2b 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -14,7 +14,6 @@
 #define CONFIG_SKIP_LOWLEVEL_INIT
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/*  64M */
 
-#define CONFIG_TINY_TPL
 #define CONFIG_SPL_FRAMEWORK
 
 #define CONFIG_SYS_NS16550_SERIAL
diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index 0d0426757d..e2f0741db6 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -65,7 +65,7 @@ libs-y += $(if $(BOARDDIR),board/$(BOARDDIR)/)
 libs-$(HAVE_VENDOR_COMMON_LIB) += board/$(VENDOR)/common/
 
 ifeq ($(CONFIG_TPL_BUILD),y)
-ifndef CONFIG_TINY_TPL
+ifndef CONFIG_TPL_TINY_FRAMEWORK
 libs-$(CONFIG_SPL_FRAMEWORK) += common/spl/
 endif
 else
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 12430e5d73..de92384d40 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -4870,9 +4870,9 @@ CONFIG_TIZEN
 CONFIG_TI_KEYSTONE_SERDES
 CONFIG_TI_KSNAV
 CONFIG_TI_SPI_MMAP
-CONFIG_TINY_TPL
 CONFIG_TMU_TIMER
 CONFIG_TPL_PAD_TO
+CONFIG_TPL_TINY_FRAMEWORK
 CONFIG_TPM_TIS_BASE_ADDRESS
 CONFIG_TPS6586X_POWER
 CONFIG_TQM834X

commit 891b189dd2ad7f9a2ac80ff0000f696418165b79
Author: YouMin Chen <cym@rock-chips.com>
Date:   Tue Jun 26 19:53:18 2018 +0800

    rockchip: sdram: change sdram_init return value to int
    
    Change-Id: Iccd78d83e898683d7315dfa1670a0308a5863824
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rk3036.h b/arch/arm/include/asm/arch-rockchip/sdram_rk3036.h
index 4ce2ba5e6e..686e778f98 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_rk3036.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_rk3036.h
@@ -331,7 +331,7 @@ struct rk3036_ddr_config {
 };
 
 /* rk3036 sdram initial */
-void sdram_init(void);
+int sdram_init(void);
 
 /* get ddr die config, implement in specific board */
 void get_ddr_config(struct rk3036_ddr_config *config);
diff --git a/arch/arm/include/asm/arch-rockchip/sys_proto.h b/arch/arm/include/asm/arch-rockchip/sys_proto.h
index f66bccee2f..c6725f5993 100644
--- a/arch/arm/include/asm/arch-rockchip/sys_proto.h
+++ b/arch/arm/include/asm/arch-rockchip/sys_proto.h
@@ -8,7 +8,7 @@
 #define _ASM_ARCH_SYS_PROTO_H
 
 #if !defined(CONFIG_SPL_FRAMEWORK) || defined(CONFIG_TINY_TPL)
-void sdram_init(void);
+int sdram_init(void);
 #endif
 
 #endif /* _ASM_ARCH_SYS_PROTO_H */
diff --git a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
index ea4e1d9ec5..55abfd2166 100644
--- a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
+++ b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
@@ -738,7 +738,7 @@ size_t sdram_size(void)
 	return size;
 }
 
-void sdram_init(void)
+int sdram_init(void)
 {
 	struct rk3036_sdram_priv sdram_priv;
 
@@ -763,6 +763,8 @@ void sdram_init(void)
 	data_training(&sdram_priv);
 	move_to_access_state(&sdram_priv);
 	dram_cfg_rbc(&sdram_priv);
+
+	return 0;
 }
 
 #if !CONFIG_IS_ENABLED(RAM)
diff --git a/drivers/ram/rockchip/sdram_rv1108.c b/drivers/ram/rockchip/sdram_rv1108.c
index f068604d3b..d8851adf79 100644
--- a/drivers/ram/rockchip/sdram_rv1108.c
+++ b/drivers/ram/rockchip/sdram_rv1108.c
@@ -112,7 +112,7 @@ void *get_base_addr(unsigned int *reg, unsigned int offset)
 	return (void *)p;
 }
 
-void sdram_init(void)
+int sdram_init(void)
 {
 	int ret;
 	struct dram_info *sdram_priv = &info;
@@ -135,4 +135,6 @@ void sdram_init(void)
 	ret = rv1108_sdram_init(sdram_priv, params);
 	if (ret)
 		debug("rv1108_sdram_init() fail!");
+
+	return ret;
 }

commit 5589e612928b7bd413fe22545264384e74915eee
Author: YouMin Chen <cym@rock-chips.com>
Date:   Tue Jun 26 20:15:09 2018 +0800

    rockchip: sdram: the enum of DDR type move to sdram_common.h
    
    Change-Id: I62877384b6f0ee232e9765143b3deea2c5693a36
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/sdram.h b/arch/arm/include/asm/arch-rockchip/sdram.h
index d7d67baa68..250477055f 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram.h
@@ -9,12 +9,6 @@
 #ifndef _ASM_ARCH_RK3288_SDRAM_H__
 #define _ASM_ARCH_RK3288_SDRAM_H__
 
-enum {
-	DDR3 = 3,
-	LPDDR3 = 6,
-	UNUSED = 0xFF,
-};
-
 struct rk3288_sdram_channel {
 	/*
 	 * bit width in address, eg:
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h b/arch/arm/include/asm/arch-rockchip/sdram_common.h
index 8be19c6ccb..33c8192f8e 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_common.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_common.h
@@ -6,6 +6,17 @@
 
 #ifndef _ASM_ARCH_SDRAM_COMMON_H
 #define _ASM_ARCH_SDRAM_COMMON_H
+
+enum {
+	DDR4 = 0,
+	DDR2 = 2,
+	DDR3 = 3,
+	LPDDR2 = 5,
+	LPDDR3 = 6,
+	LPDDR4 = 7,
+	UNUSED = 0xFF
+};
+
 /*
  * sys_reg bitfield struct
  * [31]		row_3_4_ch1
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rk322x.h b/arch/arm/include/asm/arch-rockchip/sdram_rk322x.h
index b10de76411..58c44c4bbb 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_rk322x.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_rk322x.h
@@ -8,13 +8,6 @@
 
 #include <common.h>
 
-enum {
-	DDR3		= 3,
-	LPDDR2		= 5,
-	LPDDR3		= 6,
-	UNUSED		= 0xFF,
-};
-
 struct rk322x_sdram_channel {
 	/*
 	 * bit width in address, eg:
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rk3328.h b/arch/arm/include/asm/arch-rockchip/sdram_rk3328.h
index 951d4fab18..51cc03fbce 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_rk3328.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_rk3328.h
@@ -7,15 +7,6 @@
 #ifndef _ASM_ARCH_SDRAM_RK3328_H
 #define _ASM_ARCH_SDRAM_RK3328_H
 
-enum {
-	DDR4 = 0,
-	DDR3 = 3,
-	LPDDR2 = 5,
-	LPDDR3 = 6,
-	LPDDR4 = 7,
-	UNUSED = 0xFF
-};
-
 #define SR_IDLE		93
 #define PD_IDLE		13
 #define SDRAM_ADDR	0x00000000
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h b/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h
index 22a6ca9ae1..2cee2e5ee5 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h
@@ -7,14 +7,6 @@
 #ifndef _ASM_ARCH_SDRAM_RK3399_H
 #define _ASM_ARCH_SDRAM_RK3399_H
 
-enum {
-	DDR3 = 0x3,
-	LPDDR2 = 0x5,
-	LPDDR3 = 0x6,
-	LPDDR4 = 0x7,
-	UNUSED = 0xFF
-};
-
 struct rk3399_ddr_pctl_regs {
 	u32 denali_ctl[332];
 };

commit c22f479c2b2028dd9089075991f61ae46b44cc52
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jul 5 20:16:10 2018 +0800

    rockchip: dts: rk3288: add rk3288-u-boot.dtsi
    
    Change-Id: I5c48541e1eeffc8d83e05c3ee8a87454f8ff62af
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3288-evb-rk1608.dtsi b/arch/arm/dts/rk3288-evb-rk1608.dtsi
index 828257e311..a21868b1b9 100644
--- a/arch/arm/dts/rk3288-evb-rk1608.dtsi
+++ b/arch/arm/dts/rk3288-evb-rk1608.dtsi
@@ -5,6 +5,7 @@
  */
 
 #include "rk3288.dtsi"
+#include "rk3288-u-boot.dtsi"
 #include <dt-bindings/input/input.h>
 
 / {
diff --git a/arch/arm/dts/rk3288-evb.dtsi b/arch/arm/dts/rk3288-evb.dtsi
index e5fe0a57b1..e03cddbddb 100644
--- a/arch/arm/dts/rk3288-evb.dtsi
+++ b/arch/arm/dts/rk3288-evb.dtsi
@@ -5,6 +5,7 @@
  */
 
 #include "rk3288.dtsi"
+#include "rk3288-u-boot.dtsi"
 #include <dt-bindings/input/input.h>
 
 / {
diff --git a/arch/arm/dts/rk3288-fennec.dtsi b/arch/arm/dts/rk3288-fennec.dtsi
index c31a168caa..9c9ac163d6 100644
--- a/arch/arm/dts/rk3288-fennec.dtsi
+++ b/arch/arm/dts/rk3288-fennec.dtsi
@@ -39,6 +39,7 @@
  */
 
 #include "rk3288.dtsi"
+#include "rk3288-u-boot.dtsi"
 #include <dt-bindings/input/input.h>
 
 / {
diff --git a/arch/arm/dts/rk3288-firefly.dtsi b/arch/arm/dts/rk3288-firefly.dtsi
index 020e7e576b..6a84fd4ee4 100644
--- a/arch/arm/dts/rk3288-firefly.dtsi
+++ b/arch/arm/dts/rk3288-firefly.dtsi
@@ -5,6 +5,7 @@
  */
 
 #include "rk3288.dtsi"
+#include "rk3288-u-boot.dtsi"
 #include <dt-bindings/input/input.h>
 
 / {
diff --git a/arch/arm/dts/rk3288-miqi.dtsi b/arch/arm/dts/rk3288-miqi.dtsi
index 77b618805f..b565b0354e 100644
--- a/arch/arm/dts/rk3288-miqi.dtsi
+++ b/arch/arm/dts/rk3288-miqi.dtsi
@@ -5,6 +5,7 @@
  */
 
 #include "rk3288.dtsi"
+#include "rk3288-u-boot.dtsi"
 #include <dt-bindings/input/input.h>
 
 / {
diff --git a/arch/arm/dts/rk3288-phycore-som.dtsi b/arch/arm/dts/rk3288-phycore-som.dtsi
index 02d11968cb..ff7c88a863 100644
--- a/arch/arm/dts/rk3288-phycore-som.dtsi
+++ b/arch/arm/dts/rk3288-phycore-som.dtsi
@@ -44,6 +44,7 @@
 
 #include <dt-bindings/net/ti-dp83867.h>
 #include "rk3288.dtsi"
+#include "rk3288-u-boot.dtsi"
 
 / {
 	model = "Phytec RK3288 phyCORE";
diff --git a/arch/arm/dts/rk3288-popmetal.dtsi b/arch/arm/dts/rk3288-popmetal.dtsi
index 63785eb55e..2617276ba9 100644
--- a/arch/arm/dts/rk3288-popmetal.dtsi
+++ b/arch/arm/dts/rk3288-popmetal.dtsi
@@ -39,6 +39,7 @@
  */
 
 #include "rk3288.dtsi"
+#include "rk3288-u-boot.dtsi"
 
 / {
 	memory{
diff --git a/arch/arm/dts/rk3288-rock2-som.dtsi b/arch/arm/dts/rk3288-rock2-som.dtsi
index 1ece66f3e1..b7e143af14 100644
--- a/arch/arm/dts/rk3288-rock2-som.dtsi
+++ b/arch/arm/dts/rk3288-rock2-som.dtsi
@@ -40,6 +40,7 @@
 
 #include <dt-bindings/pwm/pwm.h>
 #include "rk3288.dtsi"
+#include "rk3288-u-boot.dtsi"
 
 / {
 	memory {
diff --git a/arch/arm/dts/rk3288-tinker.dtsi b/arch/arm/dts/rk3288-tinker.dtsi
index a752458663..81f8d5a6c3 100644
--- a/arch/arm/dts/rk3288-tinker.dtsi
+++ b/arch/arm/dts/rk3288-tinker.dtsi
@@ -39,6 +39,7 @@
  */
 
 #include "rk3288.dtsi"
+#include "rk3288-u-boot.dtsi"
 
 / {
 	memory {
diff --git a/arch/arm/dts/rk3288-u-boot.dtsi b/arch/arm/dts/rk3288-u-boot.dtsi
new file mode 100644
index 0000000000..a80334192b
--- /dev/null
+++ b/arch/arm/dts/rk3288-u-boot.dtsi
@@ -0,0 +1,45 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ */
+
+/ {
+	aliases {
+		mmc0 = &emmc;
+		mmc1 = &sdmmc;
+	};
+};
+
+&uart2 {
+	clock-frequency = <24000000>;
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&pmu {
+	u-boot,dm-pre-reloc;
+};
+
+&sgrf {
+	u-boot,dm-pre-reloc;
+};
+
+&grf {
+	u-boot,dm-pre-reloc;
+};
+
+&cru {
+	u-boot,dm-pre-reloc;
+};
+
+&noc {
+	u-boot,dm-pre-reloc;
+};
+
+&dmc {
+	u-boot,dm-pre-reloc;
+};
+
+&sdmmc {
+	u-boot,dm-pre-reloc;
+};
\ No newline at end of file
diff --git a/arch/arm/dts/rk3288-veyron.dtsi b/arch/arm/dts/rk3288-veyron.dtsi
index 77b9bf8c88..a1dad688b0 100644
--- a/arch/arm/dts/rk3288-veyron.dtsi
+++ b/arch/arm/dts/rk3288-veyron.dtsi
@@ -9,6 +9,7 @@
 #include <dt-bindings/clock/rockchip,rk808.h>
 #include <dt-bindings/input/input.h>
 #include "rk3288.dtsi"
+#include "rk3288-u-boot.dtsi"
 
 / {
 	memory {
diff --git a/arch/arm/dts/rk3288-vyasa.dts b/arch/arm/dts/rk3288-vyasa.dts
index 93a9c5ee09..33f5863b87 100644
--- a/arch/arm/dts/rk3288-vyasa.dts
+++ b/arch/arm/dts/rk3288-vyasa.dts
@@ -42,6 +42,7 @@
 
 /dts-v1/;
 #include "rk3288.dtsi"
+#include "rk3288-u-boot.dtsi"
 
 / {
 	model = "Amarula Vyasa-RK3288";
diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index 16b94b1942..f7654fa5b2 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -491,7 +491,6 @@
 	};
 
 	dmc: dmc@ff610000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3288-dmc", "syscon";
 		rockchip,cru = <&cru>;
 		rockchip,grf = <&grf>;
@@ -607,13 +606,11 @@
 	};
 
 	pmu: power-management@ff730000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3288-pmu", "syscon";
 		reg = <0xff730000 0x100>;
 	};
 
 	sgrf: syscon@ff740000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3288-sgrf", "syscon";
 		reg = <0xff740000 0x1000>;
 	};
@@ -622,7 +619,6 @@
 		compatible = "rockchip,rk3288-cru";
 		reg = <0xff760000 0x1000>;
 		rockchip,grf = <&grf>;
-		u-boot,dm-pre-reloc;
 		#clock-cells = <1>;
 		#reset-cells = <1>;
 		assigned-clocks = <&cru PLL_GPLL>, <&cru PLL_CPLL>,
@@ -638,7 +634,6 @@
 	};
 
 	grf: syscon@ff770000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3288-grf", "syscon";
 		reg = <0xff770000 0x1000>;
 	};
@@ -682,7 +677,6 @@
 	};
 
 	vopb: vop@ff930000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3288-vop-big";
 		reg = <0xff930000 0x19c>;
 		interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
@@ -737,7 +731,6 @@
 		iommus = <&vopl_mmu>;
 		power-domains = <&power RK3288_PD_VIO>;
 		status = "disabled";
-		u-boot,dm-pre-reloc;
 		vopl_out: port {
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -938,7 +931,6 @@
 	};
 
 	noc: syscon@ffac0000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3288-noc", "syscon";
 		reg = <0xffac0000 0x2000>;
 	};

commit 24cd8f3602c8d59e9525e90f8593d66ed212a0c7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jul 13 15:25:59 2018 +0800

    armv8: dump registers when system crash
    
    default provide: grf, pmugrf, cru and pmucru, it looks like:
    
    rockchip,px30-cru:
    ff2b0000:  0000304b 00001441 00000001 00000007
    ff2b0010:  00007f00 00000000 00000000 00000000
    ff2b0020:  00003053 00001441 00000001 00000007
    ......
    
    rockchip,px30-grf:
    ff140000:  00002222 00002222 00002222 00001111
    ff140010:  00000000 00000000 00002200 00000033
    ff140020:  00000000 00000000 00000000 00000202
    ......
    
    Change-Id: I1630b07cb9412103b737ac4c2f6d86cfe3c81fc1
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/lib/interrupts_64.c b/arch/arm/lib/interrupts_64.c
index f3194fd94e..0781034b03 100644
--- a/arch/arm/lib/interrupts_64.c
+++ b/arch/arm/lib/interrupts_64.c
@@ -206,6 +206,14 @@ void show_regs(struct pt_regs *regs)
 		printf("x%-2d: %016lx x%-2d: %016lx\n",
 		       i, regs->regs[i], i+1, regs->regs[i+1]);
 	printf("\n");
+
+#ifdef CONFIG_ROCKCHIP_CRASH_DUMP
+	iomem_show_by_compatible("-cru", 0, 0x400);
+	iomem_show_by_compatible("-pmucru", 0, 0x400);
+	iomem_show_by_compatible("-grf", 0, 0x400);
+	iomem_show_by_compatible("-pmugrf", 0, 0x400);
+	/* tobe add here ... */
+#endif
 }
 
 #else
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 839c2b18f6..fa8efc7f16 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -432,6 +432,12 @@ config ROCKCHIP_DEBUGGER
 	  and dump pt_regs when the timeout event trigger. This helps us to know cpu
 	  state when system hang.
 
+config ROCKCHIP_CRASH_DUMP
+	bool "Rockchip crash dump registers"
+	help
+	  This enable dump registers when system crash, the registers you would like
+	  to dump can be added in show_regs().
+
 config GICV2
 	bool "ARM GICv2"
 

commit 737e12167da416aeda5e7b6cb6972531f8508490
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jul 13 11:53:55 2018 +0800

    rockchip: add iomem show interface
    
    this is mainly for debug.
    
    Change-Id: Ied842841f09780c11092624fb602a3f3723469c3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 1cc2cc35e7..6d0fd25d51 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -23,6 +23,7 @@ ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
 obj-y += boot_mode.o
 obj-y += board.o
 obj-y += chip_info.o
+obj-y += iomem.o
 
 obj-$(CONFIG_ROCKCHIP_CRC) += rockchip_crc.o
 obj-$(CONFIG_ROCKCHIP_SMCCC) += rockchip_smccc.o
diff --git a/arch/arm/mach-rockchip/iomem.c b/arch/arm/mach-rockchip/iomem.c
new file mode 100644
index 0000000000..75b8bb3b75
--- /dev/null
+++ b/arch/arm/mach-rockchip/iomem.c
@@ -0,0 +1,86 @@
+/*
+ * SPDX-License-Identifier:     GPL-2.0+
+ *
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ */
+
+#include <asm/io.h>
+#include <common.h>
+#include <dm.h>
+#include <fdtdec.h>
+
+void iomem_show(const char *label, unsigned long base, size_t start, size_t end)
+{
+	unsigned long val, offset = start, nr = 0;
+
+	if (label)
+		printf("%s:\n", label);
+
+	printf("%08lx:  ", base + offset);
+	for (offset = start; offset <= end; offset += 0x04) {
+		if (nr >= 4) {
+			printf("\n%08lx:  ", base + offset);
+			nr = 0;
+		}
+		val = readl((void __iomem *)base + offset);
+		printf("%08lx ", val);
+		nr++;
+	}
+	printf("\n");
+}
+
+void iomem_show_by_compatible(const char *compat, size_t start, size_t end)
+{
+	const void *fdt = gd->fdt_blob;
+	const char *compatible;
+	fdt_addr_t addr;
+	int offset;
+
+	if (!compat)
+		return;
+
+	for (offset = fdt_next_node(fdt, 0, NULL);
+	     offset >= 0;
+	     offset = fdt_next_node(fdt, offset, NULL)) {
+		compatible = fdt_getprop(fdt, offset, "compatible", NULL);
+		if (!compatible)
+			continue;
+
+		if (strstr(compatible, compat)) {
+			addr = fdtdec_get_addr_size_auto_noparent(fdt, offset,
+							"reg", 0, NULL, false);
+			compatible = fdt_getprop(fdt, offset, "compatible",
+						 NULL);
+			iomem_show(compatible, addr, start, end);
+			break;
+		}
+	}
+
+	printf("\n");
+}
+
+static int do_iomem_by_compatible(cmd_tbl_t *cmdtp, int flag, int argc,
+				  char *const argv[])
+{
+	size_t start, end;
+	const char *compat;
+
+	if (argc != 4)
+		return CMD_RET_USAGE;
+
+	compat = argv[1];
+	start = simple_strtoul(argv[2], NULL, 0);
+	end = simple_strtoul(argv[3], NULL, 0);
+
+	iomem_show_by_compatible(compat, start, end);
+
+	return 0;
+}
+
+U_BOOT_CMD(
+	iomem,		4,	1,	do_iomem_by_compatible,
+	"Show iomem data by device compatible",
+	"iomem <compatible> <start offset>  <end offset>\n"
+	"  eg: iomem -grf 0x0 0x200"
+);
diff --git a/include/iomem.h b/include/iomem.h
new file mode 100644
index 0000000000..55ef1573c3
--- /dev/null
+++ b/include/iomem.h
@@ -0,0 +1,35 @@
+/*
+ * SPDX-License-Identifier:     GPL-2.0+
+ *
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ */
+
+#ifndef _ROCKCHIP_IOMEM_H_
+#define _ROCKCHIP_IOMEM_H_
+
+/**
+ * iomem_show() - Show iomem data. Usually for peripheral registers.
+ *
+ * @lable:	Title to show
+ * @base:	Base address of iomem
+ * @start:	Start offset
+ * @end:	End offset
+ */
+void iomem_show(const char *label, unsigned long base, size_t start, size_t end);
+
+/**
+ * iomem_show_by_compatible() - Show iomem data and auto find base address by
+ *				compabile(sub string match).
+ *
+ * @compat:	Compatible name, sub string match.
+ * @start:	Start offset
+ * @end:	End offset
+ *
+ * eg: iomem_show_by_compatible("-grf", 0x0, 0x200);
+ *     first node that contains "-grf" will be dump.
+ *
+ */
+void iomem_show_by_compatible(const char *compat, size_t start, size_t end);
+
+#endif

commit 366357ca8d683701bfa07310515e3c8d266fd2c2
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Fri Jun 15 11:06:09 2018 +0800

    include/config_fallbacks.h: add CONFIG_RKFLASH for fallback  HAVE_BLOCK_DEVICE
    
    RKFLASH also works as a block device, so add the
    dependency here.
    
    Change-Id: I22791156465302984adbbdce76ddc01242f2bb7e
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/include/config_fallbacks.h b/include/config_fallbacks.h
index 2c4d43d672..d9a7d7a928 100644
--- a/include/config_fallbacks.h
+++ b/include/config_fallbacks.h
@@ -52,7 +52,8 @@
 	defined(CONFIG_MMC) || \
 	defined(CONFIG_NVME) || \
 	defined(CONFIG_SYSTEMACE) || \
-	defined(CONFIG_SANDBOX)
+	defined(CONFIG_SANDBOX)   || \
+	defined(CONFIG_RKFLASH)
 #define HAVE_BLOCK_DEVICE
 #endif
 

commit 8986cb610b1b8e7bba338d166dfa0993cdde9d54
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Fri Jun 15 11:03:38 2018 +0800

    rockchip: boot_mode: add adc dependency for dnl key detection
    
    Most rockchip boards detect the download key via adc,
    but there are also some boards don't want to use this
    function, they may disable the adc subsystem, so add
    the adc dependency here.
    
    Change-Id: I31af5666c8c5e973e9e6b31ce1a3847e0b478840
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index 5619ce5576..ce5830eedf 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -42,6 +42,7 @@ void set_back_to_bootrom_dnl_flag(void)
 
 __weak int rockchip_dnl_key_pressed(void)
 {
+#if defined(CONFIG_ADC)
 	const void *blob = gd->fdt_blob;
 	unsigned int val;
 	int channel = 1;
@@ -65,6 +66,9 @@ __weak int rockchip_dnl_key_pressed(void)
 		return true;
 	else
 		return false;
+#else
+	return false;
+#endif
 }
 
 void devtype_num_envset(void)

commit 0b4606ef44723ea88391345fa12f21fe17e1a65a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jul 12 09:26:28 2018 +0800

    test: rockchip: improve regulator test
    
    1. dump all regulator fdt configure and current status;
    2. only adjudst voltage for bucks;
    
    Change-Id: Ib1b1730e0eb8157a9c979e3552932b2c80f40458
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/test/rockchip/test-regulator.c b/test/rockchip/test-regulator.c
index 53fddfed51..093336689c 100644
--- a/test/rockchip/test-regulator.c
+++ b/test/rockchip/test-regulator.c
@@ -6,7 +6,7 @@
 
 #include <asm/io.h>
 #include <common.h>
-#include <common.h>
+#include <console.h>
 #include <dm.h>
 #include <power/pmic.h>
 #include <power/regulator.h>
@@ -15,36 +15,44 @@
 static void regulator_show_dt(struct udevice *dev)
 {
 	struct dm_regulator_uclass_platdata *uc_pdata;
+	int uV;
 
 	uc_pdata = dev_get_uclass_platdata(dev);
+	uV = regulator_get_value(dev);
+
+	printf("%25s@%15s: ", dev->name, uc_pdata->name);
+	printf("%7duV <-> %7duV, set %7duV, %s",
+	       uc_pdata->min_uV, uc_pdata->max_uV, uV,
+	       (uc_pdata->always_on || uc_pdata->boot_on) ?
+	       "enabling" : "disabled");
 
-	printf("\t%s@%s: \t[", dev->name, uc_pdata->name);
-	if (uc_pdata->flags & REGULATOR_FLAG_AUTOSET_UV)
-		printf("%d uV", uc_pdata->min_uV);
-	else
-		printf("%d ~ %d uV", uc_pdata->min_uV, uc_pdata->max_uV);
+	printf(" | supsend %7duV, %s",
+	       uc_pdata->suspend_uV,
+	       uc_pdata->suspend_on ? "enabling" : "disabled");
+	if (uc_pdata->init_uV != -ENODATA)
+		printf("; init %7duV", uc_pdata->init_uV);
+
+	printf("\n");
 
-	printf("; %s]\n", uc_pdata->boot_on ? "enable" : "disabled");
 }
 
 static void regulator_show_state(struct udevice *dev)
 {
 	struct dm_regulator_uclass_platdata *uc_pdata;
-	int enable, uV;
-	int same = 1;
+	int enable, uV, suspend_enable, suspend_uV;
 
 	uc_pdata = dev_get_uclass_platdata(dev);
+
 	enable = regulator_get_enable(dev);
 	uV = regulator_get_value(dev);
 
-	if (uc_pdata->flags & REGULATOR_FLAG_AUTOSET_UV)
-		same = (enable == uc_pdata->boot_on) &&
-		       (uV == uc_pdata->min_uV);
+	suspend_enable = regulator_get_suspend_enable(dev);
+	suspend_uV = regulator_get_suspend_value(dev);
 
-	printf("\t%s@%s: \t[", dev->name, uc_pdata->name);
-	printf("%d uV", uV);
-	printf("; %s] <%s>\n", enable ? "enable" : "disabled",
-	       same ? "same" : "Not same");
+	printf("%25s@%15s: set %7duV, %s | suspend %7duV, %s\n",
+	       dev->name, uc_pdata->name, uV,
+	       enable ? "enabling" : "disabled", suspend_uV,
+	       suspend_enable ? "enabling" : "disabled");
 }
 
 static int regulator_confirm_dt(void)
@@ -57,25 +65,21 @@ static int regulator_confirm_dt(void)
 	if (ret)
 		return ret;
 
-	printf("<FDT config>:\n");
+	printf("<Board dts config>:\n");
 	for (uclass_first_device(UCLASS_REGULATOR, &dev);
 	     dev;
 	     uclass_next_device(&dev)) {
 		regulator_show_dt(dev);
 	}
 
-	printf("\n\n\n<NOW state>:\n");
+	printf("\n<Board current status>:\n");
 	for (uclass_first_device(UCLASS_REGULATOR, &dev);
 	     dev;
 	     uclass_next_device(&dev)) {
 		regulator_show_state(dev);
 	}
 
-	printf("\n\n\n");
-	printf("1. Please compare <NOW state> and <FDT config>.\n");
-	printf("2. Please measure the volatge of all regulators "
-	       "and compare with <Now state> voltage.\n\n");
-	printf("After above done, you can hit any key to continue test case2...\n\n\n\n");
+	printf("\n");
 
 	while (!getc())
 		;
@@ -92,7 +96,7 @@ static int regulator_adjust_voltage(struct udevice *dev)
 
 	/* only not fix voltage regulator will be tested! */
 	if ((uc_pdata->max_uV == uc_pdata->min_uV) ||
-	    !regulator_get_enable(dev))
+	    !regulator_get_enable(dev) || strncmp("DCDC", dev->name, 4))
 		return 0;
 
 	/* save for restore after test done */
@@ -100,13 +104,12 @@ static int regulator_adjust_voltage(struct udevice *dev)
 
 	for (i = 1; i < 4; i++) {
 		uV = regulator_get_value(dev);
-		printf("[%s] ", uc_pdata->name);
-		printf("Try: %d uV --> %d uV;  ", uV, uV + step_uV * i);
+		printf("[%s@%s] set: %d uV -> %d uV;  ",
+		       dev->name, uc_pdata->name, uV, uV + step_uV * i);
 		uV += (step_uV * i);
 		regulator_set_value(dev, uV);
-		printf("Now: %d uV.\n\n", regulator_get_value(dev));
-		printf("Please measure voltage of [%s].\n"
-		       "After done, hit any key to continue...\n\n\n\n",
+		printf("ReadBack: %d uV\n\n", regulator_get_value(dev));
+		printf("Confirm '%s' voltage, then hit any key to continue...\n\n",
 		       uc_pdata->name);
 
 		while (!getc())
@@ -141,12 +144,12 @@ static int regulator_confirm_voltage_accuracy(void)
 int board_regulator_test(int argc, char * const argv[])
 {
 	printf("----------------------------------------------------\n");
-	printf("REGULATOR test case 1: regulator fdt config confirm\n");
+	printf("REGULATOR: status show\n");
 	printf("----------------------------------------------------\n\n");
 	regulator_confirm_dt();
 
 	printf("----------------------------------------------------\n");
-	printf("REGULATOR test case 2: regulator voltage accuracy confirm\n");
+	printf("REGULATOR: voltage accuracy confirm\n");
 	printf("----------------------------------------------------\n\n");
 	regulator_confirm_voltage_accuracy();
 

commit 3403638a65145ac55568de1221ec5e3617769af7
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Jul 12 11:12:01 2018 +0800

    configs: evb-rk3326: delete clock-names
    
    Delete clock-names from CONFIG_OF_SPL_REMOVE_PROPS,
    then we use clk_get_by_name() to get the clock.
    
    Change-Id: I29b71d42699aec15d6afa2a6b2e99500672f4ce5
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/evb-rk3326_defconfig b/configs/evb-rk3326_defconfig
index dab64402d2..bd6b65ad42 100644
--- a/configs/evb-rk3326_defconfig
+++ b/configs/evb-rk3326_defconfig
@@ -29,7 +29,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_RKPARM_PARTITION=y
 CONFIG_OF_LIVE=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_CLK=y

commit 08c9dc10f47ca595c2bb374624f506001a248556
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Jul 12 10:22:55 2018 +0800

    mmc: dw_mmc: rockchip: fix get ciu-sample bug
    
    1.judge the clk_get_by_name return value
    2.rename the ciu_sample to ciu-sample according
      to dts
    
    Change-Id: I60c9f43f8cf0dd02815ee9078f5e957dc9c6d24d
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index 7155607e77..001d31e0e2 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -251,7 +251,10 @@ static int rockchip_dwmmc_probe(struct udevice *dev)
 	ret = clk_get_by_index(dev, 0, &priv->clk);
 	if (ret < 0)
 		return ret;
-	clk_get_by_name(dev, "ciu_sample", &priv->sample_clk);
+
+	ret = clk_get_by_name(dev, "ciu-sample", &priv->sample_clk);
+	if (ret < 0)
+		return ret;
 	host->execute_tuning = rockchip_dwmmc_execute_tuning;
 #endif
 	host->fifoth_val = MSIZE(0x2) |

commit c96295c291e54c739507c46b3d3ad16024433040
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Jul 14 17:17:06 2018 +0800

    rockchip: dts: px30: enable "u-boot,dm-pre-reloc" for saradc
    
    Change-Id: I80b3c9a5ffca675ab1be5b42e49a8ff97d57e2ed
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/px30-u-boot.dtsi b/arch/arm/dts/px30-u-boot.dtsi
index 865eb8fd94..555e0b1250 100644
--- a/arch/arm/dts/px30-u-boot.dtsi
+++ b/arch/arm/dts/px30-u-boot.dtsi
@@ -42,6 +42,11 @@
 	u-boot,dm-pre-reloc;
 };
 
+&saradc {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 &gpio0 {
 	u-boot,dm-pre-reloc;
 	status = "disabled";

commit 527e4be7d9f7d3271040ecdc1a54c22c930b4963
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Jul 14 15:45:25 2018 +0800

    rockchip: core: update kernel dtb node handle
    
    Don't duplicate bind EMMC and NAND device after load kernel dtb.
    Always use serial node from u-boot and use all other nodes from kernel.
    
    Change-Id: Iaef9258f66f4f1060f057a9f7b194694e0e1df21
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/core/device.c b/drivers/core/device.c
index 825dc6bc0f..e3b15fd121 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -51,24 +51,33 @@ static int device_bind_common(struct udevice *parent, const struct driver *drv,
 	}
 
 #ifdef CONFIG_USING_KERNEL_DTB
-	/* Do not use mmc node and nand node from kernel dtb */
-	if(drv->id == UCLASS_MMC || drv->id == UCLASS_RKNAND)
-	list_for_each_entry(dev, &uc->dev_head, uclass_node) {
-		if (!strcmp(name, dev->name)){
-			debug("%s do not bind dev already in list %s\n",
-			        __func__, name);
-			dev->node = node;
-			return 0;
+	if (gd->flags & GD_FLG_RELOC) {
+		/* For mmc and nand, just update from kernel dtb instead bind again*/
+		if (drv->id == UCLASS_MMC || drv->id == UCLASS_RKNAND) {
+			list_for_each_entry(dev, &uc->dev_head, uclass_node) {
+				if (!strcmp(name, dev->name)) {
+					debug("%s do not bind dev already in list %s\n",
+					      __func__, dev->name);
+					dev->node = node;
+					return 0;
+				}
+			}
 		}
-	}
 
-	/* use cru node from kernel dtb */
-	if (drv->id == UCLASS_CLK) {
+		/* Use other nodes from kernel dtb */
 		struct udevice *n;
 
 		list_for_each_entry_safe(dev, n, &uc->dev_head, uclass_node) {
-			if (!strcmp(name, dev->name))
-				list_del(&dev->uclass_node);
+			if (!strcmp(name, dev->name)) {
+				if (drv->id == UCLASS_SERIAL) {
+					/* Always use serial node from U-Boot dtb */
+					debug("%s do not delete uboot dev: %s\n",
+					      __func__, dev->name);
+					return 0;
+				} else {
+					list_del(&dev->uclass_node);
+				}
+			}
 		}
 	}
 #endif

commit 852c7866fdc984588f4255a550e8510c2c9d73c1
Author: shengfei Xu <xsf@rock-chips.com>
Date:   Fri Jul 13 09:39:24 2018 +0800

    fuel gauge: rk817: smooth the dispaly soc when system reboot
    
    There is a difference between the display soc and real soc,
    so it can not be directly equivalent.
    
    Change-Id: I99dfa1e3952693053ccd853cd5802feb7eebf8b0
    Signed-off-by: shengfei Xu <xsf@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk817.c b/drivers/power/fuel_gauge/fg_rk817.c
index 78b3113ea7..5e5f004ad1 100644
--- a/drivers/power/fuel_gauge/fg_rk817.c
+++ b/drivers/power/fuel_gauge/fg_rk817.c
@@ -811,12 +811,19 @@ static void rk817_bat_not_first_pwron(struct rk817_battery_device *battery)
 	} else {
 		battery->remain_cap = rk817_bat_get_capacity_uah(battery);
 		battery->rsoc = rk817_bat_get_rsoc(battery);
-		pre_soc = battery->rsoc;
+
+		if (pre_cap < battery->remain_cap / 1000) {
+			pre_soc += (battery->remain_cap - pre_cap * 1000) * 100 / battery->fcc;
+			if (pre_soc > 100000)
+				pre_soc = 100000;
+		}
 		pre_cap = battery->remain_cap / 1000;
 		goto finish;
 	}
 finish:
 	battery->dsoc = pre_soc;
+	if (battery->dsoc > 100000)
+		battery->dsoc = 100000;
 	battery->nac = pre_cap;
 	if (battery->nac < 0)
 		battery->nac = 0;

commit faa7eb0f76fd6e206963e74af89afc949c2e2c17
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jul 13 11:55:22 2018 +0800

    armv8: exceptions: optimize exception regs info
    
    Add arm core registers bits description, it looks like:
    
    Relocate offset = 000000003db55000
    * ELR(PC)    =   000000000025bd78
    * LR         =   000000000025def4
    * SP         =   0000000039d4a6b0
    
    * ESR_EL2    =   0000000040732550
            EC[31:26] == 001100, Exception from an MCRR or MRRC access
            IL[25] == 0, 16-bit instruction trapped
    
    * DAIF       =   00000000000003c0
            D[9] == 1, DBG masked
            A[8] == 1, ABORT masked
            I[7] == 1, IRQ masked
            F[6] == 1, FIQ masked
    
    * SPSR_EL2   =   0000000080000349
            D[9] == 1, DBG masked
            A[8] == 1, ABORT masked
            I[7] == 0, IRQ not masked
            F[6] == 1, FIQ masked
            M[4] == 0, Exception taken from AArch64
            M[3:0] == 1001, EL2h
    
    * SCTLR_EL2  =   0000000030c51835
            I[12] == 1, Icaches enabled
            C[2] == 1, Dcache enabled
            M[0] == 1, MMU enabled
    
    * VBAR_EL2   =   000000003dd55800
    * HCR_EL2    =   000000000800003a
    * TTBR0_EL2  =   000000003fff0000
    
    x0 : 00000000ff300000 x1 : 0000000054808028
    x2 : 000000000000002f x3 : 00000000ff160000
    x4 : 0000000039d7fe80 x5 : 000000003de24ab0
    ......
    x28: 0000000039d81ef0 x29: 0000000039d4a910
    
    Change-Id: I828cafc961fdc3fcb2aa08916a7e36f690627313
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/cpu/armv8/exceptions.S b/arch/arm/cpu/armv8/exceptions.S
index 8c7c1d3eb8..cf3997793d 100644
--- a/arch/arm/cpu/armv8/exceptions.S
+++ b/arch/arm/cpu/armv8/exceptions.S
@@ -90,19 +90,46 @@ _exception_entry:
 	switch_el x11, 3f, 2f, 1f
 3:	mrs	x1, esr_el3
 	mrs	x2, elr_el3
+	mrs	x3, daif
+	mrs	x4, vbar_el3
+	mrs	x5, spsr_el3
+	sub	x6, sp, #(8*30)
+	mrs	x7, sctlr_el3
+	mrs	x8, scr_el3
+	mrs	x9, ttbr0_el3
 	b	0f
 2:	mrs	x1, esr_el2
 	mrs	x2, elr_el2
+	mrs	x3, daif
+	mrs	x4, vbar_el2
+	mrs	x5, spsr_el2
+	sub	x6, sp, #(8*30)
+	mrs	x7, sctlr_el2
+	mrs	x8, hcr_el2
+	mrs	x9, ttbr0_el2
 	b	0f
+
 1:	mrs	x1, esr_el1
 	mrs	x2, elr_el1
+	mrs	x3, daif
+	mrs	x4, vbar_el1
+	mrs	x5, spsr_el1
+	sub	x6, sp, #(8*30)
+	mrs	x7, sctlr_el1
+	mov	x8, #0	/* Not used, EL1 don't have register, like 'scr_el1' */
+	mrs	x9, ttbr0_el1
 0:
-	stp	x2, x0, [sp, #-16]!
+	stp     x2, x0, [sp, #-16]!
+	stp	x3, x1, [sp, #-16]!
+	stp	x5, x4, [sp, #-16]!
+	stp	x7, x6, [sp, #-16]!
+	stp	x9, x8, [sp, #-16]!
 	mov	x0, sp
 	ret
 
 
 exception_exit:
+	add	sp, sp, #(8*8)/* see: sys registers size of struct pt_regs */
 	ldp	x2, x0, [sp],#16
 	switch_el x11, 3f, 2f, 1f
 3:	msr	elr_el3, x2
diff --git a/arch/arm/include/asm/proc-armv/ptrace.h b/arch/arm/include/asm/proc-armv/ptrace.h
index 71df5a9e25..6137047504 100644
--- a/arch/arm/include/asm/proc-armv/ptrace.h
+++ b/arch/arm/include/asm/proc-armv/ptrace.h
@@ -21,6 +21,20 @@
  * on the stack during an exception.
  */
 struct pt_regs {
+	/*
+	 * system register
+	 *
+	 * Note: never change order! see "_exception_entry" and "exception_exit"
+	 */
+	unsigned long ttbr0;
+	unsigned long hcr;	/* hcr_el2/scr_el3 */
+	unsigned long sctlr;
+	unsigned long sp;
+	unsigned long spsr;
+	unsigned long vbar;
+	unsigned long daif;
+	unsigned long esr;
+
 	unsigned long elr;
 	unsigned long regs[31];
 };
diff --git a/arch/arm/lib/interrupts_64.c b/arch/arm/lib/interrupts_64.c
index 061f23c652..f3194fd94e 100644
--- a/arch/arm/lib/interrupts_64.c
+++ b/arch/arm/lib/interrupts_64.c
@@ -28,6 +28,187 @@ int disable_interrupts(void)
 }
 #endif
 
+#if (!defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD))
+#define REG_BITS(val, shift, mask)	(((val) >> (shift)) & (mask))
+
+void show_regs(struct pt_regs *regs)
+{
+	int i;
+	int el = current_el();
+	const char *h_scr_name[] = {
+		[2] = "HCR_EL2",
+		[3] = "SCR_EL3",
+	};
+	const char *esr_bits_ec[] = {
+		[0]  = "EC[31:26] == 000000, Exception with an unknown reason",
+		[1]  = "EC[31:26] == 000001, Exception from a WFI or WFE instruction",
+		[3]  = "EC[31:26] == 000011, Exception from an MCR or MRC access",
+		[4]  = "EC[31:26] == 000100, Exception from an MCRR or MRRC access",
+		[5]  = "EC[31:26] == 000101, Exception from an MCR or MRC access",
+		[6]  = "EC[31:26] == 000110, Exception from an LDC or STC access to CP14",
+		[7]  = "EC[31:26] == 000111, Exception from an access to an Advanced SIMD or floating-point register, resulting from CPACR_EL1.FPEN or CPTR_ELx.TFP",
+		[8]  = "EC[31:26] == 001000, Exception from an MCR or MRC access",
+		[12] = "EC[31:26] == 001100, Exception from an MCRR or MRRC access",
+		[14] = "EC[31:26] == 001110, Exception from an Illegal execution state, or a PC or SP alignment fault",
+		[10] = "EC[31:26] == 010001, Exception from HVC or SVC instruction execution",
+		[18] = "EC[31:26] == 010010, Exception from HVC or SVC instruction execution",
+		[19] = "EC[31:26] == 010011, Exception from SMC instruction execution in AArch32 state",
+		[21] = "EC[31:26] == 010101, Exception from HVC or SVC instruction execution",
+		[22] = "EC[31:26] == 010110, Exception from HVC or SVC instruction execution",
+		[23] = "EC[31:26] == 010111, Exception from SMC instruction execution in AArch64 state",
+		[24] = "EC[31:26] == 011000, Exception from MSR, MRS, or System instruction execution in AArch64 state",
+		[31] = "EC[31:26] == 011111, IMPLEMENTATION DEFINED exception to EL3",
+		[32] = "EC[31:26] == 100000, Exception from an Instruction abort",
+		[33] = "EC[31:26] == 100001, Exception from an Instruction abort",
+		[34] = "EC[31:26] == 100010, Exception from an Illegal execution state, or a PC or SP alignment fault",
+		[36] = "EC[31:26] == 100100, Exception from a Data abort, from lower exception level",
+		[37] = "EC[31:26] == 100101, Exception from a Data abort, from current exception level",
+		[38] = "EC[31:26] == 100110, Exception from an Illegal execution state, or a PC or SP alignment fault",
+		[40] = "EC[31:26] == 101000, Exception from a trapped Floating-point exception",
+		[44] = "EC[31:26] == 101100, Exception from a trapped Floating-point exception",
+		[47] = "EC[31:26] == 101111, SError interrupt",
+		[48] = "EC[31:26] == 110000, Exception from a Breakpoint or Vector Catch debug event",
+		[49] = "EC[31:26] == 110001, Exception from a Breakpoint or Vector Catch debug event",
+		[50] = "EC[31:26] == 110010, Exception from a Software Step debug event",
+		[51] = "EC[31:26] == 110011, Exception from a Software Step debug event",
+		[52] = "EC[31:26] == 110100, Exception from a Watchpoint debug event",
+		[53] = "EC[31:26] == 110101, Exception from a Watchpoint debug event",
+		[56] = "EC[31:26] == 111000, Exception from execution of a Software Breakpoint instructio",
+	};
+	const char *esr_bits_il[] = {
+		"IL[25] == 0, 16-bit instruction trapped",
+		"IL[25] == 1, 32-bit instruction trapped",
+	};
+	const char *daif_bits_f[] = {
+		"F[6] == 0, FIQ not masked",
+		"F[6] == 1, FIQ masked",
+	};
+	const char *daif_bits_i[] = {
+		"I[7] == 0, IRQ not masked",
+		"I[7] == 1, IRQ masked",
+	};
+	const char *daif_bits_a[] = {
+		"A[8] == 0, ABORT not masked",
+		"A[8] == 1, ABORT masked",
+	};
+	const char *daif_bits_d[] = {
+		"D[9] == 0, DBG not masked",
+		"D[9] == 1, DBG masked",
+	};
+	const char *spsr_bits_m_aarch32[] = {
+		[0]  = "M[3:0] == 0000, User",
+		[1]  = "M[3:0] == 0001, FIQ",
+		[2]  = "M[3:0] == 0010, IRQ",
+		[3]  = "M[3:0] == 0011, Supervisor",
+		[6]  = "M[3:0] == 0110, Monitor",
+		[7]  = "M[3:0] == 0111, Abort",
+		[10] = "M[3:0] == 1010, Hyp",
+		[11] = "M[3:0] == 1011, Undefined",
+		[15] = "M[3:0] == 1111, System",
+	};
+	const char *spsr_bits_m_aarch64[] = {
+		[0] = "M[3:0] == 0000, EL0t",
+		[4] = "M[3:0] == 0100, EL1t",
+		[5] = "M[3:0] == 0101, EL1h",
+		[8] = "M[3:0] == 1000, EL2t",
+		[9] = "M[3:0] == 1001, EL2h",
+		[10] = "M[3:0] == 1100, EL3t",
+		[11] = "M[3:0] == 1101, EL3h",
+	};
+	const char *spsr_bits_m[] = {
+		"M[4] == 0, Exception taken from AArch64",
+		"M[4] == 1, Exception taken from AArch32",
+	};
+	const char *spsr_bits_f[] = {
+		"F[6] == 0, FIQ not masked",
+		"F[6] == 1, FIQ masked",
+	};
+	const char *spsr_bits_i[] = {
+		"I[7] == 0, IRQ not masked",
+		"I[7] == 1, IRQ masked",
+	};
+	const char *spsr_bits_a[] = {
+		"A[8] == 0, ABORT not masked",
+		"A[8] == 1, ABORT masked",
+	};
+	const char *spsr_bits_d[] = {
+		"D[9] == 0, DBG not masked",
+		"D[9] == 1, DBG masked",
+	};
+	const char *sctlr_bits_i[] = {
+		"I[12] == 0, Icache disabled",
+		"I[12] == 1, Icaches enabled",
+	};
+	const char *sctlr_bits_c[] = {
+		"C[2] == 0, Dcache disabled",
+		"C[2] == 1, Dcache enabled",
+	};
+	const char *sctlr_bits_m[] = {
+		"M[0] == 0, MMU disabled",
+		"M[0] == 1, MMU enabled",
+	};
+
+	printf("* Relocate offset = %016lx\n", gd->reloc_off);
+
+	if (gd->flags & GD_FLG_RELOC) {
+		printf("* ELR(PC)    =   %016lx\n", regs->elr - gd->reloc_off);
+		printf("* LR         =   %016lx\n", regs->regs[30] - gd->reloc_off);
+	} else {
+		printf("* ELR(PC)    =   %016lx\n", regs->elr);
+		printf("* LR         =   %016lx\n", regs->regs[30]);
+	}
+
+	printf("* SP         =   %016lx\n", regs->sp);
+	printf("\n");
+
+	/*
+	 * System registers
+	 */
+	/* ESR_EL2 */
+	printf("* ESR_EL%d    =   %016lx\n", el, regs->esr);
+	printf("\t%s\n", esr_bits_ec[REG_BITS(regs->esr, 26, 0x3f)]);
+	printf("\t%s\n", esr_bits_il[REG_BITS(regs->esr, 25, 0x01)]);
+	printf("\n");
+	/* DAIF */
+	printf("* DAIF       =   %016lx\n", regs->daif);
+	printf("\t%s\n", daif_bits_d[REG_BITS(regs->daif, 9, 0x1)]);
+	printf("\t%s\n", daif_bits_a[REG_BITS(regs->daif, 8, 0x1)]);
+	printf("\t%s\n", daif_bits_i[REG_BITS(regs->daif, 7, 0x1)]);
+	printf("\t%s\n", daif_bits_f[REG_BITS(regs->daif, 6, 0x1)]);
+	printf("\n");
+	/* SPSR_ELx */
+	printf("* SPSR_EL%d   =	 %016lx\n", el, regs->spsr);
+	printf("\t%s\n", spsr_bits_d[REG_BITS(regs->spsr, 9, 0x1)]);
+	printf("\t%s\n", spsr_bits_a[REG_BITS(regs->spsr, 8, 0x1)]);
+	printf("\t%s\n", spsr_bits_i[REG_BITS(regs->spsr, 7, 0x1)]);
+	printf("\t%s\n", spsr_bits_f[REG_BITS(regs->spsr, 6, 0x1)]);
+	printf("\t%s\n", spsr_bits_m[REG_BITS(regs->spsr, 4, 0x1)]);
+	if (REG_BITS(regs->spsr, 4, 0x1))
+		printf("\t%s\n", spsr_bits_m_aarch32[REG_BITS(regs->spsr, 0, 0xf)]);
+	else
+		printf("\t%s\n", spsr_bits_m_aarch64[REG_BITS(regs->spsr, 0, 0xf)]);
+	printf("\n");
+	/* SCTLR_EL2 */
+	printf("* SCTLR_EL%d  =	 %016lx\n", el, regs->sctlr);
+	printf("\t%s\n", sctlr_bits_i[REG_BITS(regs->sctlr, 12, 0x1)]);
+	printf("\t%s\n", sctlr_bits_c[REG_BITS(regs->sctlr, 2, 0x1)]);
+	printf("\t%s\n", sctlr_bits_m[REG_BITS(regs->sctlr, 0, 0x1)]);
+	printf("\n");
+
+	/* Other */
+	if (el >= 2)
+		printf("* %s    =   %016lx\n", h_scr_name[el], regs->hcr);
+	printf("* VBAR_EL%d   =   %016lx\n", el, regs->vbar);
+	printf("* TTBR0_EL%d  =   %016lx\n", el, regs->ttbr0);
+	printf("\n");
+
+	for (i = 0; i < 29; i += 2)
+		printf("x%-2d: %016lx x%-2d: %016lx\n",
+		       i, regs->regs[i], i+1, regs->regs[i+1]);
+	printf("\n");
+}
+
+#else
 void show_regs(struct pt_regs *regs)
 {
 	int i;
@@ -44,6 +225,7 @@ void show_regs(struct pt_regs *regs)
 		       i, regs->regs[i], i+1, regs->regs[i+1]);
 	printf("\n");
 }
+#endif
 
 /*
  * do_bad_sync handles the impossible case in the Synchronous Abort vector.

commit 243527b501abf820d518527c25a7418e115ec96f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 10 20:01:24 2018 +0800

    console: support timestamp for printf
    
    with this patch, we can see the detail boot time of boot flow.
    The U-Boot log is like this:
    
    [    0.259266] U-Boot 2017.09-01739-g856f373-dirty (Jul 10 2018 - 20:26:05 +0800)
    [    0.260596] Model: Rockchip RK3399 Evaluation Board
    [    0.261332] DRAM:  3.8 GiB
    Relocation Offset is: f5bfd000
    Using default environment
    
    [    0.354038] dwmmc@fe320000: 1, sdhci@fe330000: 0
    [    0.521125] Card did not respond to voltage select!
    [    0.521188] mmc_init: -95, time 9
    [    0.671451] switch to partitions #0, OK
    [    0.671500] mmc0(part 0) is current device
    ......
    
    Change-Id: I3ce2a4466f9ecd9eeb6b334ba4ba48391aa47c30
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/Kconfig b/common/Kconfig
index 5172bb3346..4ec8cfd83c 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -111,6 +111,10 @@ config BOOTSTAGE_STASH_SIZE
 	  This should be large enough to hold the bootstage stash. A value of
 	  4096 (4KiB) is normally plenty.
 
+config BOOTSTAGE_PRINTF_TIMESTAMP
+	bool "Support printf timestamp"
+	help
+	  Enabling this will support printf timestamp.
 endmenu
 
 menu "Boot media"
diff --git a/common/console.c b/common/console.c
index cbec485345..260236b998 100644
--- a/common/console.c
+++ b/common/console.c
@@ -19,6 +19,7 @@
 #include <exports.h>
 #include <environment.h>
 #include <watchdog.h>
+#include <vsprintf.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -516,11 +517,51 @@ void putc(const char c)
 	}
 }
 
+#if (!defined(CONFIG_SPL_BUILD) && defined(CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP))
+static void vspfunc(char *buf, size_t size, char *format, ...)
+{
+	va_list ap;
+
+	va_start(ap, format);
+	vsnprintf(buf, size, format, ap);
+	va_end(ap);
+}
+
+void puts(const char *s)
+{
+	unsigned long ts_sec, ts_msec, ticks;
+	char pr_timestamp[32], *p;
+
+	while (*s) {
+		if (*s == '\n') {
+			gd->new_line = 1;
+			putc(*s++);
+			continue;
+		}
+
+		if (gd->new_line) {
+			gd->new_line = 0;
+			ticks = (get_ticks() / 24ULL);
+			ts_sec = ticks / 1000000;
+			ts_msec = ticks % 1000000;
+			vspfunc(pr_timestamp, sizeof(pr_timestamp),
+				"[%5lu.%06lu] ", ts_sec, ts_msec);
+			p = pr_timestamp;
+			while (*p)
+				putc(*p++);
+		}
+
+		putc(*s++);
+	}
+}
+#else
 void puts(const char *s)
 {
 	while (*s)
 		putc(*s++);
 }
+#endif
+
 
 #ifdef CONFIG_CONSOLE_RECORD
 int console_record_init(void)
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index 5158bc8817..b46e542500 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -122,6 +122,11 @@ typedef struct global_data {
 	struct bootstage_data *new_bootstage;	/* Relocated bootstage info */
 #endif
 	phys_addr_t pm_ctx_phys;
+
+#ifdef CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP
+	int new_line;
+#endif
+
 #ifdef CONFIG_LOG
 	int log_drop_count;		/* Number of dropped log messages */
 	int default_log_level;		/* For devices with no filters */

commit b520084e799d79ca39fceba72dfc89b673471584
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Fri Jul 13 11:17:58 2018 +0800

    configs: rockchip: enable edp display for fennec-rk3288
    
    Change-Id: I4ed48d9d4c6ead8a83a5117f27921f80e7e8dae4
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/configs/fennec-rk3288_defconfig b/configs/fennec-rk3288_defconfig
index c56dbfc556..39f71f4ac9 100644
--- a/configs/fennec-rk3288_defconfig
+++ b/configs/fennec-rk3288_defconfig
@@ -4,6 +4,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3288=y
 CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_RKIMG_BOOTLOADER=y
+# CONFIG_USING_KERNEL_DTB is not set
 CONFIG_TARGET_FENNEC_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-fennec"
@@ -35,6 +36,7 @@ CONFIG_CMD_REGULATOR=y
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_SPL_PARTITION_UUIDS=y
 CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_REGMAP=y
@@ -76,6 +78,10 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Rockchip"
 CONFIG_G_DNL_VENDOR_NUM=0x2207
 CONFIG_G_DNL_PRODUCT_NUM=0x320a
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_ETHER_SMSC95XX=y
diff --git a/include/configs/fennec_rk3288.h b/include/configs/fennec_rk3288.h
index 15a374cca7..97b56b667a 100644
--- a/include/configs/fennec_rk3288.h
+++ b/include/configs/fennec_rk3288.h
@@ -7,9 +7,10 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define ROCKCHIP_DEVICE_SETTINGS
 #include <configs/rk3288_common.h>
 
 #define CONFIG_SYS_MMC_ENV_DEV 0
-
+#define ROCKCHIP_DEVICE_SETTINGS \
+		"stdout=serial,vidconsole\0" \
+		"stderr=serial,vidconsole\0"
 #endif

commit 279eedad258a369c537737608989e926b502acaf
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Thu Jul 12 16:04:07 2018 +0800

    config: rk3288: disable CONFIG_SILENT_CONSOLE
    
    For more log.
    
    Change-Id: Ic26085aad82d8106a4458048ea1663a8df6b5b65
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/configs/evb-rk3288-rk1608_defconfig b/configs/evb-rk3288-rk1608_defconfig
index ebe548cd33..4c65113ff0 100644
--- a/configs/evb-rk3288-rk1608_defconfig
+++ b/configs/evb-rk3288-rk1608_defconfig
@@ -8,7 +8,7 @@ CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-evb-rk1608"
 CONFIG_DEBUG_UART=y
 # CONFIG_ANDROID_BOOT_IMAGE is not set
-CONFIG_SILENT_CONSOLE=y
+# CONFIG_SILENT_CONSOLE is not set
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig
index af61858314..ab15591951 100644
--- a/configs/evb-rk3288_defconfig
+++ b/configs/evb-rk3288_defconfig
@@ -8,7 +8,7 @@ CONFIG_TARGET_EVB_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-evb"
 CONFIG_DEBUG_UART=y
-CONFIG_SILENT_CONSOLE=y
+# CONFIG_SILENT_CONSOLE is not set
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
diff --git a/configs/fennec-rk3288_defconfig b/configs/fennec-rk3288_defconfig
index 7ebfbf3a2a..c56dbfc556 100644
--- a/configs/fennec-rk3288_defconfig
+++ b/configs/fennec-rk3288_defconfig
@@ -8,7 +8,7 @@ CONFIG_TARGET_FENNEC_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-fennec"
 CONFIG_DEBUG_UART=y
-CONFIG_SILENT_CONSOLE=y
+# CONFIG_SILENT_CONSOLE is not set
 CONFIG_CONSOLE_MUX=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig
index 1f2d1eef57..e0f243021b 100644
--- a/configs/firefly-rk3288_defconfig
+++ b/configs/firefly-rk3288_defconfig
@@ -8,7 +8,7 @@ CONFIG_TARGET_FIREFLY_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-firefly"
 CONFIG_DEBUG_UART=y
-CONFIG_SILENT_CONSOLE=y
+# CONFIG_SILENT_CONSOLE is not set
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig
index 088b15f5be..09d5979dff 100644
--- a/configs/miqi-rk3288_defconfig
+++ b/configs/miqi-rk3288_defconfig
@@ -8,7 +8,7 @@ CONFIG_TARGET_MIQI_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-miqi"
 CONFIG_DEBUG_UART=y
-CONFIG_SILENT_CONSOLE=y
+# CONFIG_SILENT_CONSOLE is not set
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig
index e44384e9dd..3abf7c1088 100644
--- a/configs/tinker-rk3288_defconfig
+++ b/configs/tinker-rk3288_defconfig
@@ -9,7 +9,7 @@ CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-tinker"
 CONFIG_DEBUG_UART=y
 # CONFIG_ANDROID_BOOT_IMAGE is not set
-CONFIG_SILENT_CONSOLE=y
+# CONFIG_SILENT_CONSOLE is not set
 CONFIG_CONSOLE_MUX=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y

commit 4a08baf6816a7c0f2f8b19658c06306e30ca0289
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Thu Jul 12 15:53:29 2018 +0800

    rockchip: dts: rk3288-evb: add edp display support
    
    Enable lg,lp079qx1-sp0v edp panel for show logo
    on rk3288-evb-act8846
    
    Change-Id: I5d911275415fd8f26f0e023623a999c41ee62096
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3288-evb.dtsi b/arch/arm/dts/rk3288-evb.dtsi
index 32c262907b..e5fe0a57b1 100644
--- a/arch/arm/dts/rk3288-evb.dtsi
+++ b/arch/arm/dts/rk3288-evb.dtsi
@@ -140,22 +140,47 @@
 		pinctrl-names = "default";
 		pinctrl-0 = <&pwm0_pin>;
 		pwm-delay-us = <10000>;
-		status = "disabled";
+		status = "okay";
 	};
 
-	panel: panel {
-		compatible = "simple-panel";
-		power-supply = <&vcc_io>;
+	edp_panel: edp-panel {
+		compatible ="lg,lp079qx1-sp0v", "simple-panel";
 		backlight = <&backlight>;
-		enable-gpios = <&gpio7 3 GPIO_ACTIVE_HIGH>;
-		status = "disabled";
+		power-supply = <&vcc_io>;
+		enable-gpios = <&gpio7 4 GPIO_ACTIVE_HIGH>;
+		prepare-delay-ms = <20>;
+		enable-delay-ms = <20>;
+
+		ports {
+			panel_in: endpoint {
+				remote-endpoint = <&edp_out>;
+			};
+		};
 	};
+
 };
 
 &cpu0 {
 	cpu0-supply = <&vdd_cpu>;
 };
 
+&display_subsystem {
+	status = "okay";
+};
+
+&edp {
+	status = "okay";
+
+	ports {
+		port@1 {
+			reg = <1>;
+			edp_out: endpoint {
+				remote-endpoint = <&panel_in>;
+			};
+		};
+	};
+};
+
 &emmc {
 	broken-cd;
 	bus-width = <8>;
@@ -387,6 +412,10 @@
 	status = "okay";
 };
 
+&route_edp {
+	status = "okay";
+};
+
 &saradc {
 	vref-supply = <&vcc_18>;
 	status = "okay";
@@ -449,45 +478,10 @@
 	status = "okay";
 };
 
-&vopb {
-	status = "okay";
-};
-
-&vopb_mmu {
-	status = "okay";
-};
-
 &vopl {
 	status = "okay";
 };
 
-&vopl_mmu {
-	status = "okay";
-};
-
-&mipi_dsi0 {
-	status = "disabled";
-	rockchip,panel = <&panel>;
-	display-timings {
-		timing0 {
-		bits-per-pixel = <24>;
-		clock-frequency = <160000000>;
-		hfront-porch = <120>;
-		hsync-len = <20>;
-		hback-porch = <21>;
-		hactive = <1200>;
-		vfront-porch = <21>;
-		vsync-len = <3>;
-		vback-porch = <18>;
-		vactive = <1920>;
-		hsync-active = <0>;
-		vsync-active = <0>;
-		de-active = <1>;
-		pixelclk-active = <0>;
-		};
-	};
-};
-
 &wdt {
 	status = "okay";
 };

commit c125f78268945e376928630616e0e49e74463fb8
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Thu Jul 12 15:52:56 2018 +0800

    configs: rockchip: enable edp display for evb-rk3288
    
    Change-Id: I57bf828e287b7a1cd64fa87472ca46171c8046fd
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig
index 06e903e97d..af61858314 100644
--- a/configs/evb-rk3288_defconfig
+++ b/configs/evb-rk3288_defconfig
@@ -33,6 +33,7 @@ CONFIG_CMD_REGULATOR=y
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_SPL_PARTITION_UUIDS=y
 CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_NET_RANDOM_ETHADDR=y
@@ -67,6 +68,7 @@ CONFIG_DEBUG_UART_BASE=0xff690000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYSRESET=y
+# CONFIG_USING_KERNEL_DTB is not set
 CONFIG_USB=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
@@ -76,9 +78,8 @@ CONFIG_G_DNL_VENDOR_NUM=0x2207
 CONFIG_G_DNL_PRODUCT_NUM=0x320a
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
-CONFIG_VIDEO_ROCKCHIP=y
-CONFIG_VIDEO_ROCKCHIP_MAX_YRES=1200
-CONFIG_DISPLAY_ROCKCHIP_MIPI=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_CMD_DHRYSTONE=y
 CONFIG_ERRNO_STR=y
diff --git a/include/configs/evb_rk3288.h b/include/configs/evb_rk3288.h
index 15a374cca7..8482826f3b 100644
--- a/include/configs/evb_rk3288.h
+++ b/include/configs/evb_rk3288.h
@@ -7,9 +7,12 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define ROCKCHIP_DEVICE_SETTINGS
 #include <configs/rk3288_common.h>
 
 #define CONFIG_SYS_MMC_ENV_DEV 0
 
+#define ROCKCHIP_DEVICE_SETTINGS \
+		"stdout=serial,vidconsole\0" \
+		"stderr=serial,vidconsole\0"
+
 #endif

commit e22bdefeaa1240989bf5c999ee5775aca5fc3f9a
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Thu Jul 12 15:48:44 2018 +0800

    rockchip: dts: rk3288: Fix vop and edp node
    
    Change-Id: I9995c2a6501820b2b62a5262d35023ecb45f1014
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index 316cb3b590..16b94b1942 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -160,9 +160,30 @@
 		always-on;
 	};
 
-	display-subsystem {
+	display_subsystem: display-subsystem {
 		compatible = "rockchip,display-subsystem";
 		ports = <&vopl_out>, <&vopb_out>;
+		status = "disabled";
+
+		route {
+			route_hdmi: route-hdmi {
+				status = "disabled";
+				logo,uboot = "logo.bmp";
+				logo,kernel = "logo_kernel.bmp";
+				logo,mode = "center";
+				charge_logo,mode = "center";
+				connect = <&vopb_out_hdmi>;
+			};
+
+			route_edp: route-edp {
+				status = "disabled";
+				logo,uboot = "logo.bmp";
+				logo,kernel = "logo_kernel.bmp";
+				logo,mode = "center";
+				charge_logo,mode = "center";
+				connect = <&vopl_out_edp>;
+			};
+		};
 	};
 
 	sdmmc: dwmmc@ff0c0000 {
@@ -662,7 +683,7 @@
 
 	vopb: vop@ff930000 {
 		u-boot,dm-pre-reloc;
-		compatible = "rockchip,rk3288-vop";
+		compatible = "rockchip,rk3288-vop-big";
 		reg = <0xff930000 0x19c>;
 		interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>;
@@ -706,7 +727,7 @@
 	};
 
 	vopl: vop@ff940000 {
-		compatible = "rockchip,rk3288-vop";
+		compatible = "rockchip,rk3288-vop-lit";
 		reg = <0xff940000 0x19c>;
 		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru ACLK_VOP1>, <&cru DCLK_VOP1>, <&cru HCLK_VOP1>;
@@ -751,7 +772,7 @@
 	};
 
 	edp: edp@ff970000 {
-		compatible = "rockchip,rk3288-edp";
+		compatible = "rockchip,rk3288-dp";
 		reg = <0xff970000 0x4000>;
 		interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru SCLK_EDP>, <&cru SCLK_EDP_24M>, <&cru PCLK_EDP_CTRL>;
@@ -762,6 +783,9 @@
 		power-domains = <&power RK3288_PD_VIO>;
 		status = "disabled";
 		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
 			edp_in: port {
 				#address-cells = <1>;
 				#size-cells = <0>;

commit 79bdfc405d0c870814470e017ee67cb5eac50a5b
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Jul 16 15:56:52 2018 +0800

    android: only handle compressed kernel after read a valid android image
    
    We shouldn't go on with the compress/decompress flow
    when we get a invalid andoird image.
    
    Change-Id: Ied7266b8791fe571c670cacafffdd393161c8189
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/common/image-android.c b/common/image-android.c
index c05279bb1e..a61d37177e 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -52,7 +52,6 @@ u32 android_image_get_comp(const struct andr_img_hdr *hdr)
 int android_image_parse_kernel_comp(const struct andr_img_hdr *hdr)
 {
 	ulong kaddr = android_image_get_kernel_addr(hdr);
-
 	return bootm_parse_comp((const unsigned char *)kaddr);
 }
 
@@ -231,11 +230,11 @@ long android_image_load(struct blk_desc *dev_desc,
 		blk_read = -1;
 	}
 
-	comp = android_image_parse_kernel_comp(buf);
 
 	if (!blk_read) {
 		blk_cnt = (android_image_get_end(buf) - (ulong)buf +
 			   part_info->blksz - 1) / part_info->blksz;
+		comp = android_image_parse_kernel_comp(buf);
 		/*
 		 * We should load a compressed kernel Image
 		 * to high memory
@@ -258,18 +257,19 @@ long android_image_load(struct blk_desc *dev_desc,
 			blk_read = blk_dread(dev_desc, part_info->start,
 					     blk_cnt, buf);
 		}
-	}
 
-	/*
-	 * zImage is not need to decompress
-	 * kernel will handle decompress itself
-	 */
-	if (comp != IH_COMP_NONE && comp != IH_COMP_ZIMAGE) {
-		kload_addr = env_get_ulong("kernel_addr_r", 16, 0x02080000);
-		android_image_set_kload(buf, kload_addr);
-		android_image_set_comp(buf, comp);
-	} else {
-		android_image_set_comp(buf, IH_COMP_NONE);
+		/*
+		 * zImage is not need to decompress
+		 * kernel will handle decompress itself
+		 */
+		if (comp != IH_COMP_NONE && comp != IH_COMP_ZIMAGE) {
+			kload_addr = env_get_ulong("kernel_addr_r", 16, 0x02080000);
+			android_image_set_kload(buf, kload_addr);
+			android_image_set_comp(buf, comp);
+		} else {
+			android_image_set_comp(buf, IH_COMP_NONE);
+		}
+
 	}
 
 	unmap_sysmem(buf);

commit 766c66006cf63bf3912dc8110412e31b5fabcb99
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 16 14:58:50 2018 +0800

    rockchip: dts: rk3328: add rk3328-u-boot.dtsi
    
    Change-Id: I0fa2256aa02452b4e56fb7b2c035025e49cf61a8
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts
index d9faee410c..aafafec649 100644
--- a/arch/arm/dts/rk3328-evb.dts
+++ b/arch/arm/dts/rk3328-evb.dts
@@ -6,6 +6,7 @@
 
 /dts-v1/;
 #include "rk3328.dtsi"
+#include "rk3328-u-boot.dtsi"
 #include "rk3328-sdram-ddr3-666.dtsi"
 
 / {
@@ -62,7 +63,6 @@
 };
 
 &uart2 {
-	u-boot,dm-pre-reloc;
 	status = "okay";
 };
 
@@ -79,7 +79,6 @@
 };
 
 &emmc {
-	u-boot,dm-pre-reloc;
 	bus-width = <8>;
 	cap-mmc-highspeed;
 	supports-emmc;
diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi
new file mode 100644
index 0000000000..67842670ed
--- /dev/null
+++ b/arch/arm/dts/rk3328-u-boot.dtsi
@@ -0,0 +1,36 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+/ {
+	aliases {
+		mmc0 = &emmc;
+		mmc1 = &sdmmc;
+	};
+};
+
+&cru {
+	u-boot,dm-pre-reloc;
+};
+
+&grf {
+	u-boot,dm-pre-reloc;
+};
+
+&dmc {
+	u-boot,dm-pre-reloc;
+};
+
+&uart2 {
+	u-boot,dm-pre-reloc;
+};
+
+&emmc {
+	u-boot,dm-pre-reloc;
+};
+
+&sdmmc {
+	u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi
index 5f7542bd9a..e6df508c8f 100644
--- a/arch/arm/dts/rk3328.dtsi
+++ b/arch/arm/dts/rk3328.dtsi
@@ -187,7 +187,6 @@
 	};
 
 	grf: syscon@ff100000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3328-grf", "syscon", "simple-mfd";
 		reg = <0x0 0xff100000 0x0 0x1000>;
 		#address-cells = <1>;
@@ -355,7 +354,6 @@
 	};
 
 	dmc: dmc {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3328-dmc";
 		reg = <0x0 0xff400000 0x0 0x1000
 		       0x0 0xff780000 0x0 0x3000
@@ -366,7 +364,6 @@
 	};
 
 	cru: clock-controller@ff440000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3328-cru", "rockchip,cru", "syscon";
 		reg = <0x0 0xff440000 0x0 0x1000>;
 		rockchip,grf = <&grf>;

commit 669ef96c7a4e34deda9ef8ca3feb14c67f41abfb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 16 14:58:07 2018 +0800

    configs: rk3328: set CONFIG_BOOTDELAY=0
    
    Change-Id: Ie276e574cb54e816aa8d847d6bc7766302d04662
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index b0fe0ad1ee..cd89448594 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -6,6 +6,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3328=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
@@ -17,6 +18,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
+CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_TPL_SYS_MALLOC_SIMPLE=y
@@ -104,7 +106,6 @@ CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
-CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y

commit defeaf58f431a9d71216672bf57eeeb7b57ccd32
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 16 14:39:42 2018 +0800

    rockchip: boot_mode: print error code when adc keys detect failed
    
    Change-Id: Ida71ccbc6dd4e3a5144cee5748b77270928e1864
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index 9ae0611004..5619ce5576 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -46,6 +46,7 @@ __weak int rockchip_dnl_key_pressed(void)
 	unsigned int val;
 	int channel = 1;
 	int node;
+	int ret;
 	u32 chns[2];
 
 	node = fdt_node_offset_by_compatible(blob, 0, "adc-keys");
@@ -54,8 +55,9 @@ __weak int rockchip_dnl_key_pressed(void)
 		       channel = chns[1];
 	}
 
-	if (adc_channel_single_shot("saradc", channel, &val)) {
-		printf("%s adc_channel_single_shot fail!\n", __func__);
+	ret = adc_channel_single_shot("saradc", channel, &val);
+	if (ret) {
+		printf("%s adc_channel_single_shot fail! ret=%d\n", __func__, ret);
 		return false;
 	}
 

commit e2ced6c33b4428ecbfb739c16bb7286dfc7c8206
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Jul 16 08:35:32 2018 +0800

    android: only take the successed return value as load_address from android_image_load
    
    Function android_image_load will return a negative value in case
    of error. We should check the return value first before take it
    as an unsigned long load_address.
    
    This fix 008aee876ae5("boot_android: add runtime compatible for
    un/compressed kernel image"), which may cause system panic on
    a system that boot with none-android format image.
    
    Change-Id: I7f67c322d4ef343328b2276fe83432716148a76d
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index ccf9dab5d7..97d01a7b00 100755
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -569,12 +569,13 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	debug("ANDROID: Loading kernel from \"%s\", partition %d.\n",
 	      boot_part_info.name, part_num);
 
-	load_address = android_image_load(dev_desc, &boot_part_info, load_address,
+	ret = android_image_load(dev_desc, &boot_part_info, load_address,
 				 -1UL);
-	if (load_address < 0) {
+	if (ret < 0) {
 		printf("%s %s part load fail\n", __func__, boot_part_info.name);
-		return load_address;
+		return ret;
 	}
+	load_address = ret;
 #endif
 
 	/* Set Android root variables. */

commit bff338f2e6ae821dca996e0dff687f4e5c560c49
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Jul 14 19:15:35 2018 +0800

    lib: optee client: printf content end with "\n".
    
    Change-Id: I9a2f503c4e6b3c1f0c117f93fc2f2d429d43dfbc
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/lib/optee_clientApi/OpteeClientMem.c b/lib/optee_clientApi/OpteeClientMem.c
index 969a5bb348..b811179caa 100644
--- a/lib/optee_clientApi/OpteeClientMem.c
+++ b/lib/optee_clientApi/OpteeClientMem.c
@@ -140,7 +140,7 @@ void OpteeClientMemInit(void)
 
 	tee_smc_call(&ArmSmcArgs);
 
-	printf("get share memory, arg0=0x%x arg1=0x%x arg2=0x%x arg3=0x%x",
+	printf("get share memory, arg0=0x%x arg1=0x%x arg2=0x%x arg3=0x%x\n",
 			ArmSmcArgs.Arg0, ArmSmcArgs.Arg1, ArmSmcArgs.Arg2, ArmSmcArgs.Arg3);
 
 	my_malloc_init((void *)(size_t)ArmSmcArgs.Arg1, ArmSmcArgs.Arg2);

commit bebecb3702371e05a2a75ae93883e2dea90d5141
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 3 15:34:13 2018 +0800

    configs: rk3399: enable vendor, cmd i2c/pmic/regulator
    
    Change-Id: Ifd88e7f22910aa3794de9c82585c1241943a21ac
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
index 6d318ec834..0b64fb61e0 100644
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -6,6 +6,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_ROCKCHIP_RK3399=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
 CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb"
 CONFIG_DEBUG_UART=y
@@ -26,6 +27,7 @@ CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
 CONFIG_CMD_LOAD_ANDROID=y
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
@@ -35,6 +37,8 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_TIME=y
+CONFIG_CMD_PMIC=y
+CONFIG_CMD_REGULATOR=y
 CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y

commit 9f6bbf6c0c8f577a677b82c1d2eae62f9454fa83
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jul 6 09:27:51 2018 +0800

    configs: rk3288: enable edp, cmd i2c/pmic/regulator
    
    Change-Id: I53bce213cb1cd585b0d087ba3859137c78008930
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3288_defconfig b/configs/rk3288_defconfig
index c7ddda3cc2..f7522aeeaf 100644
--- a/configs/rk3288_defconfig
+++ b/configs/rk3288_defconfig
@@ -18,12 +18,15 @@ CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
 CONFIG_CMD_LOAD_ANDROID=y
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_PMIC=y
+CONFIG_CMD_REGULATOR=y
 # CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_SPL_ISO_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
@@ -83,6 +86,7 @@ CONFIG_VIDEO_ROCKCHIP_MAX_YRES=1200
 CONFIG_DISPLAY_ROCKCHIP_MIPI=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_LCD=y

commit 712b6f80ff313c5be766d0880c32ebd54df0ca0c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 3 20:33:38 2018 +0800

    regulator: rk8xx: implement get suspend value and enable callback
    
    - regulator_get_suspend_enable;
    - regulator_get_suspend_value;
    
    Change-Id: Id2326f4286d6eb45cfa5c0b47bcbf0030dbfd128
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/rk8xx.c b/drivers/power/regulator/rk8xx.c
index 69b1515c3f..498597c047 100644
--- a/drivers/power/regulator/rk8xx.c
+++ b/drivers/power/regulator/rk8xx.c
@@ -532,6 +532,48 @@ static int _buck_set_suspend_enable(struct udevice *pmic, int buck, bool enable)
 	return ret;
 }
 
+static int _buck_get_suspend_enable(struct udevice *pmic, int buck)
+{
+	struct rk8xx_priv *priv = dev_get_priv(pmic);
+	int ret, val;
+	uint mask;
+
+	switch (priv->variant) {
+	case RK805_ID:
+	case RK816_ID:
+		mask = 1 << buck;
+		val = pmic_reg_read(pmic, RK816_REG_DCDC_SLP_EN);
+		if (val < 0)
+			return val;
+		ret = val & mask ? 1 : 0;
+		break;
+	case RK808_ID:
+	case RK818_ID:
+		mask = 1 << buck;
+		val = pmic_reg_read(pmic, REG_SLEEP_SET_OFF1);
+		if (val < 0)
+			return val;
+		ret = val & mask ? 0 : 1;
+		break;
+	case RK809_ID:
+	case RK817_ID:
+		if (buck < 4)
+			mask = 1 << buck;
+		else
+			mask = 1 << 5;	/* BUCK5 for RK809 */
+
+		val = pmic_reg_read(pmic, RK817_POWER_SLP_EN(0));
+		if (val < 0)
+			return val;
+		ret = val & mask ? 1 : 0;
+		break;
+	default:
+		ret = -EINVAL;
+	}
+
+	return ret;
+}
+
 static const struct rk8xx_reg_info *get_ldo_reg(struct udevice *pmic,
 						int num, int uvolt)
 {
@@ -689,6 +731,50 @@ static int _ldo_set_suspend_enable(struct udevice *pmic, int ldo, bool enable)
 	return ret;
 }
 
+static int _ldo_get_suspend_enable(struct udevice *pmic, int ldo)
+{
+	struct rk8xx_priv *priv = dev_get_priv(pmic);
+	int val, ret = 0;
+	uint mask;
+
+	switch (priv->variant) {
+	case RK805_ID:
+	case RK816_ID:
+		mask = 1 << ldo;
+		val = pmic_reg_read(pmic, RK816_REG_LDO_SLP_EN);
+		if (val < 0)
+			return val;
+		ret = val & mask ? 1 : 0;
+		break;
+	case RK808_ID:
+	case RK818_ID:
+		mask = 1 << ldo;
+		val = pmic_reg_read(pmic, REG_SLEEP_SET_OFF2);
+		if (val < 0)
+			return val;
+		ret = val & mask ? 0 : 1;
+		break;
+	case RK809_ID:
+	case RK817_ID:
+		if (ldo == 8) {
+			mask = 1 << 4;	/* LDO9 */
+			val = pmic_reg_read(pmic, RK817_POWER_SLP_EN(0));
+			if (val < 0)
+				return val;
+			ret = val & mask ? 1 : 0;
+		} else {
+			mask = 1 << ldo;
+			val = pmic_reg_read(pmic, RK817_POWER_SLP_EN(1));
+			if (val < 0)
+				return val;
+			ret = val & mask ? 1 : 0;
+		}
+		break;
+	}
+
+	return ret;
+}
+
 static int buck_get_value(struct udevice *dev)
 {
 	int buck = dev->driver_data - 1;
@@ -715,6 +801,26 @@ static int buck_set_value(struct udevice *dev, int uvolt)
 	return _buck_set_value(dev->parent, buck, uvolt);
 }
 
+static int buck_get_suspend_value(struct udevice *dev)
+{
+	int buck = dev->driver_data - 1;
+	/* We assume level-1 voltage is enough for usage in U-Boot */
+	const struct rk8xx_reg_info *info = get_buck_reg(dev->parent, buck, 0);
+	int mask = info->vsel_mask;
+	int ret, val;
+
+	if (info->vsel_sleep_reg == NA)
+		return -ENOSYS;
+
+	ret = pmic_reg_read(dev->parent, info->vsel_sleep_reg);
+	if (ret < 0)
+		return ret;
+
+	val = ret & mask;
+
+	return info->min_uv + val * info->step_uv;
+}
+
 static int buck_set_suspend_value(struct udevice *dev, int uvolt)
 {
 	int buck = dev->driver_data - 1;
@@ -736,6 +842,13 @@ static int buck_set_suspend_enable(struct udevice *dev, bool enable)
 	return _buck_set_suspend_enable(dev->parent, buck, enable);
 }
 
+static int buck_get_suspend_enable(struct udevice *dev)
+{
+	int buck = dev->driver_data - 1;
+
+	return _buck_get_suspend_enable(dev->parent, buck);
+}
+
 static int buck_set_ramp_delay(struct udevice *dev, u32 ramp_delay)
 {
 	int buck = dev->driver_data - 1;
@@ -809,6 +922,25 @@ static int ldo_set_suspend_value(struct udevice *dev, int uvolt)
 	return pmic_clrsetbits(dev->parent, info->vsel_sleep_reg, mask, val);
 }
 
+static int ldo_get_suspend_value(struct udevice *dev)
+{
+	int ldo = dev->driver_data - 1;
+	const struct rk8xx_reg_info *info = get_ldo_reg(dev->parent, ldo, 0);
+	int mask = info->vsel_mask;
+	int val, ret;
+
+	if (info->vsel_sleep_reg == NA)
+		return -ENOSYS;
+
+	ret = pmic_reg_read(dev->parent, info->vsel_sleep_reg);
+	if (ret < 0)
+		return ret;
+
+	val = ret & mask;
+
+	return info->min_uv + val * info->step_uv;
+}
+
 static int ldo_set_enable(struct udevice *dev, bool enable)
 {
 	int ldo = dev->driver_data - 1;
@@ -823,6 +955,13 @@ static int ldo_set_suspend_enable(struct udevice *dev, bool enable)
 	return _ldo_set_suspend_enable(dev->parent, ldo, enable);
 }
 
+static int ldo_get_suspend_enable(struct udevice *dev)
+{
+	int ldo = dev->driver_data - 1;
+
+	return _ldo_get_suspend_enable(dev->parent, ldo);
+}
+
 static int ldo_get_enable(struct udevice *dev)
 {
 	int ldo = dev->driver_data - 1;
@@ -892,6 +1031,11 @@ static int switch_set_suspend_value(struct udevice *dev, int uvolt)
 	return 0;
 }
 
+static int switch_get_suspend_value(struct udevice *dev)
+{
+	return 0;
+}
+
 static int switch_set_suspend_enable(struct udevice *dev, bool enable)
 {
 	struct rk8xx_priv *priv = dev_get_priv(dev->parent);
@@ -922,6 +1066,39 @@ static int switch_set_suspend_enable(struct udevice *dev, bool enable)
 	return ret;
 }
 
+static int switch_get_suspend_enable(struct udevice *dev)
+{
+	struct rk8xx_priv *priv = dev_get_priv(dev->parent);
+	int val, ret = 0, sw = dev->driver_data - 1;
+	uint mask = 0;
+
+	switch (priv->variant) {
+	case RK808_ID:
+		mask = 1 << (sw + 5);
+		val = pmic_reg_read(dev->parent, REG_SLEEP_SET_OFF1);
+		if (val < 0)
+			return val;
+		ret = val & mask ? 0 : 1;
+		break;
+	case RK809_ID:
+		mask = 1 << (sw + 6);
+		val = pmic_reg_read(dev->parent, RK817_POWER_SLP_EN(0));
+		if (val < 0)
+			return val;
+		ret = val & mask ? 1 : 0;
+		break;
+	case RK818_ID:
+		mask = 1 << 6;
+		val = pmic_reg_read(dev->parent, REG_SLEEP_SET_OFF1);
+		if (val < 0)
+			return val;
+		ret = val & mask ? 0 : 1;
+		break;
+	}
+
+	return ret;
+}
+
 static int rk8xx_buck_probe(struct udevice *dev)
 {
 	struct dm_regulator_uclass_platdata *uc_pdata;
@@ -962,9 +1139,11 @@ static const struct dm_regulator_ops rk8xx_buck_ops = {
 	.get_value  = buck_get_value,
 	.set_value  = buck_set_value,
 	.set_suspend_value = buck_set_suspend_value,
+	.get_suspend_value = buck_get_suspend_value,
 	.get_enable = buck_get_enable,
 	.set_enable = buck_set_enable,
 	.set_suspend_enable = buck_set_suspend_enable,
+	.get_suspend_enable = buck_get_suspend_enable,
 	.set_ramp_delay = buck_set_ramp_delay,
 };
 
@@ -972,16 +1151,20 @@ static const struct dm_regulator_ops rk8xx_ldo_ops = {
 	.get_value  = ldo_get_value,
 	.set_value  = ldo_set_value,
 	.set_suspend_value = ldo_set_suspend_value,
+	.get_suspend_value = ldo_get_suspend_value,
 	.get_enable = ldo_get_enable,
 	.set_enable = ldo_set_enable,
 	.set_suspend_enable = ldo_set_suspend_enable,
+	.get_suspend_enable = ldo_get_suspend_enable,
 };
 
 static const struct dm_regulator_ops rk8xx_switch_ops = {
 	.get_enable = switch_get_enable,
 	.set_enable = switch_set_enable,
 	.set_suspend_enable = switch_set_suspend_enable,
+	.get_suspend_enable = switch_get_suspend_enable,
 	.set_suspend_value = switch_set_suspend_value,
+	.get_suspend_value = switch_get_suspend_value,
 };
 
 U_BOOT_DRIVER(rk8xx_buck) = {

commit 8152d3f659bdaa5006e97bc82e5b81734c9f3957
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 3 21:14:07 2018 +0800

    dm: regulator: update message print format
    
    Change-Id: Ibaa0a21c64f672b59f4e1dc3881ecf232f471444
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/regulator-uclass.c b/drivers/power/regulator/regulator-uclass.c
index fc0e1ad968..c319b53b95 100644
--- a/drivers/power/regulator/regulator-uclass.c
+++ b/drivers/power/regulator/regulator-uclass.c
@@ -288,22 +288,25 @@ int regulator_autoset(struct udevice *dev)
 static void regulator_show(struct udevice *dev, int ret)
 {
 	struct dm_regulator_uclass_platdata *uc_pdata;
+	int uV = 0;
 
 	uc_pdata = dev_get_uclass_platdata(dev);
+	uV = regulator_get_value(dev);
 
-	printf("%s@%s: ", dev->name, uc_pdata->name);
-	printf("%duV <-> %duV, set %duV, %s",
-	       uc_pdata->min_uV, uc_pdata->max_uV, uc_pdata->min_uV,
+	printf("%25s@%15s: ", dev->name, uc_pdata->name);
+	printf("%7duV <-> %7duV, set %7duV, %s",
+	       uc_pdata->min_uV, uc_pdata->max_uV, uV,
 	       (uc_pdata->always_on || uc_pdata->boot_on) ?
-	       "enabling" : "not enabling");
-	if (ret)
-		printf(" (ret: %d)", ret);
+	       "enabling" : "disabled");
 
-	printf("; supsend %duV, %s",
+	printf(" | supsend %7duV, %s",
 	       uc_pdata->suspend_uV,
-	       uc_pdata->suspend_on ? "enabling" : "not enabling");
+	       uc_pdata->suspend_on ? "enabling" : "disabled");
 	if (uc_pdata->init_uV != -ENODATA)
-		printf("; init %duV", uc_pdata->init_uV);
+		printf(" ; init %7duV", uc_pdata->init_uV);
+
+	if (ret)
+		printf(" (ret: %d)", ret);
 
 	printf("\n");
 }

commit 71aebe781cc3331ed342df2082617e412709892c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 3 18:30:28 2018 +0800

    dm: regulator: add regulator_get_suspend_enable and regulator_get_suspend_value
    
    Change-Id: Ib5148f588896ff76a465923fb12956dc6c433de7
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/regulator-uclass.c b/drivers/power/regulator/regulator-uclass.c
index 145e7a5572..fc0e1ad968 100644
--- a/drivers/power/regulator/regulator-uclass.c
+++ b/drivers/power/regulator/regulator-uclass.c
@@ -84,6 +84,16 @@ int regulator_set_suspend_value(struct udevice *dev, int uV)
 	return ops->set_suspend_value(dev, uV);
 }
 
+int regulator_get_suspend_value(struct udevice *dev)
+{
+	const struct dm_regulator_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->get_suspend_value)
+		return -ENOSYS;
+
+	return ops->get_suspend_value(dev);
+}
+
 /*
  * To be called with at most caution as there is no check
  * before setting the actual voltage value.
@@ -155,6 +165,16 @@ int regulator_set_suspend_enable(struct udevice *dev, bool enable)
 	return ops->set_suspend_enable(dev, enable);
 }
 
+int regulator_get_suspend_enable(struct udevice *dev)
+{
+	const struct dm_regulator_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->get_suspend_enable)
+		return -ENOSYS;
+
+	return ops->get_suspend_enable(dev);
+}
+
 int regulator_set_ramp_delay(struct udevice *dev, u32 ramp_delay)
 {
 	const struct dm_regulator_ops *ops = dev_get_driver_ops(dev);
diff --git a/include/power/regulator.h b/include/power/regulator.h
index a442d885bb..8e5f7c855d 100644
--- a/include/power/regulator.h
+++ b/include/power/regulator.h
@@ -196,6 +196,7 @@ struct dm_regulator_ops {
 	int (*get_value)(struct udevice *dev);
 	int (*set_value)(struct udevice *dev, int uV);
 	int (*set_suspend_value)(struct udevice *dev, int uV);
+	int (*get_suspend_value)(struct udevice *dev);
 
 	/**
 	 * The regulator output current function calls operates on a micro Amps.
@@ -221,6 +222,7 @@ struct dm_regulator_ops {
 	int (*get_enable)(struct udevice *dev);
 	int (*set_enable)(struct udevice *dev, bool enable);
 	int (*set_suspend_enable)(struct udevice *dev, bool enable);
+	int (*get_suspend_enable)(struct udevice *dev);
 
 	/**
 	 * The 'get/set_mode()' function calls should operate on a driver-
@@ -284,6 +286,14 @@ int regulator_set_value(struct udevice *dev, int uV);
  */
 int regulator_set_suspend_value(struct udevice *dev, int uV);
 
+/**
+ * regulator_get_suspend_value: get the suspend microvoltage value of a given regulator.
+ *
+ * @dev    - pointer to the regulator device
+ * @return - positive output value [uV] on success or negative errno if fail.
+ */
+int regulator_get_suspend_value(struct udevice *dev);
+
 /**
  * regulator_set_value_force: set the microvoltage value of a given regulator
  *			      without any min-,max condition check
@@ -337,6 +347,14 @@ int regulator_set_enable(struct udevice *dev, bool enable);
  */
 int regulator_set_suspend_enable(struct udevice *dev, bool enable);
 
+/**
+ * regulator_get_suspend_enable: get regulator suspend enable state
+ *
+ * @dev    - pointer to the regulator device
+ * @return - 0 on success or -errno val if fails
+ */
+int regulator_get_suspend_enable(struct udevice *dev);
+
 /**
  * regulator_get_mode: get active operation mode id of a given regulator
  *

commit 336e1992eb54f3785a6229e25f2bdcc63e04d63e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 3 17:33:47 2018 +0800

    test: rockchip: improve help guide
    
    Change-Id: I321f9b5357a1ef0ad0617124a84bb4890b45be7e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/test/rockchip/test-rockchip.c b/test/rockchip/test-rockchip.c
index 5710884e46..757a47eddc 100644
--- a/test/rockchip/test-rockchip.c
+++ b/test/rockchip/test-rockchip.c
@@ -31,6 +31,13 @@ static board_module_t g_board_modules[] = {
 #endif
 };
 
+static void help(void)
+{
+	printf("Command: rktest [module] [args...]\n\n"
+	       "  - module: timer|key|emmc|rknand|regulator|eth|ir|brom_dnl|vendor\n"
+	       "  - args: depends on module\n");
+}
+
 static int do_rockchip_test(cmd_tbl_t *cmdtp, int flag,
 			    int argc, char * const argv[])
 {
@@ -43,7 +50,7 @@ static int do_rockchip_test(cmd_tbl_t *cmdtp, int flag,
 	if (argc >= 2) {
 		module_name = argv[1];
 	} else {
-		printf("cmd format: test_rockchip [module_name] [args...]\n");
+		help();
 		return 0;
 	}
 

commit 44e080753f6f4cba2e82114c51d6b98f6fd8672d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 3 17:15:26 2018 +0800

    test: rockchip: add vendor storage test
    
    Change-Id: I3bfb884c32e44371fb01351af4b20587f7a1fa1f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/test/rockchip/Makefile b/test/rockchip/Makefile
index 90c710ce44..1930056ecd 100644
--- a/test/rockchip/Makefile
+++ b/test/rockchip/Makefile
@@ -13,3 +13,4 @@ obj-y += test-rknand.o
 obj-$(CONFIG_GMAC_ROCKCHIP) += test-eth.o
 obj-$(CONFIG_RK_IR) += test-ir.o
 obj-y += test-brom-dnl.o
+obj-$(CONFIG_ROCKCHIP_VENDOR_PARTITION) += test-vendor-storage.o
diff --git a/test/rockchip/test-rockchip.c b/test/rockchip/test-rockchip.c
index d6e808bfb9..5710884e46 100644
--- a/test/rockchip/test-rockchip.c
+++ b/test/rockchip/test-rockchip.c
@@ -25,7 +25,10 @@ static board_module_t g_board_modules[] = {
 #if defined(CONFIG_RK_IR)
 	{ .name = "ir",		.test = board_ir_test },
 #endif
-	{ .name = "brom_dnl",	.test = board_brom_dnl_test}
+	{ .name = "brom_dnl",	.test = board_brom_dnl_test},
+#if defined(CONFIG_ROCKCHIP_VENDOR_PARTITION)
+	{ .name = "vendor",	.test = board_vendor_storage_test },
+#endif
 };
 
 static int do_rockchip_test(cmd_tbl_t *cmdtp, int flag,
diff --git a/test/rockchip/test-rockchip.h b/test/rockchip/test-rockchip.h
index e628829a28..85e5335937 100644
--- a/test/rockchip/test-rockchip.h
+++ b/test/rockchip/test-rockchip.h
@@ -18,7 +18,9 @@ int board_eth_test(int argc, char * const argv[]);
 #if defined(CONFIG_RK_IR)
 int board_ir_test(int argc, char * const argv[]);
 #endif
-
 int board_brom_dnl_test(int argc, char * const argv[]);
+#if defined(CONFIG_ROCKCHIP_VENDOR_PARTITION)
+int board_vendor_storage_test(int argc, char * const argv[]);
+#endif
 
 #endif /* _TEST_ROCKCHIP_H */
diff --git a/test/rockchip/test-vendor-storage.c b/test/rockchip/test-vendor-storage.c
new file mode 100644
index 0000000000..ba75c237e7
--- /dev/null
+++ b/test/rockchip/test-vendor-storage.c
@@ -0,0 +1,14 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/vendor.h>
+
+int board_vendor_storage_test(int argc, char * const argv[])
+{
+	return vendor_storage_test();
+}

commit 143a7f24b7954a952c0b2d459e60eb75732def58
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 3 17:13:58 2018 +0800

    rockchip: vendor: export vendor_storage_test()
    
    used for rockchip test driver.
    
    Change-Id: Ib25a5ff4bae5fdf510dbbb89defabd8e3d0fcbfd
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/vendor.h b/arch/arm/include/asm/arch-rockchip/vendor.h
index fdeafefd0a..ea82e0abd8 100644
--- a/arch/arm/include/asm/arch-rockchip/vendor.h
+++ b/arch/arm/include/asm/arch-rockchip/vendor.h
@@ -11,6 +11,7 @@
 #define VENDOR_LAN_MAC_ID	3 /* lan mac */
 #define VENDOR_BLUETOOTH_ID	4 /* bluetooth mac */
 
+int vendor_storage_test(void);
 int vendor_storage_read(u16 id, void *pbuf, u16 size);
 int vendor_storage_write(u16 id, void *pbuf, u16 size);
 
diff --git a/arch/arm/mach-rockchip/vendor.c b/arch/arm/mach-rockchip/vendor.c
index 4b7e7140ea..d9a598de6a 100755
--- a/arch/arm/mach-rockchip/vendor.c
+++ b/arch/arm/mach-rockchip/vendor.c
@@ -40,10 +40,7 @@
 #define FLASH_VENDOR_ITEM_NUM		62
 
 /* Vendor uinit test define */
-/* #define VENDOR_STORAGE_TEST */
-#ifdef VENDOR_STORAGE_TEST
 int vendor_storage_test(void);
-#endif /* VENDOR_STORAGE_TEST */
 
 struct vendor_item {
 	u16  id;
@@ -176,6 +173,7 @@ static int vendor_ops(u8 *buffer, u32 addr, u32 n_sec, int write)
 int vendor_storage_init(void)
 {
 	int ret = 0;
+	int ret_size;
 	u8 *buffer;
 	u32 size, i;
 	u32 max_ver = 0;
@@ -235,9 +233,12 @@ int vendor_storage_init(void)
 
 	/* Find valid and up-to-date one from (vendor0 - vendor3) */
 	for (i = 0; i < VENDOR_PART_NUM; i++) {
-		ret = vendor_ops((u8 *)vendor_info.hdr, part_size * i, part_size, 0);
-		if (ret != part_size)
-			return -EIO;
+		ret_size = vendor_ops((u8 *)vendor_info.hdr,
+				      part_size * i, part_size, 0);
+		if (ret_size != part_size) {
+			ret = -EIO;
+			goto out;
+		}
 
 		if ((vendor_info.hdr->tag == VENDOR_TAG) &&
 		    (*(vendor_info.version2) == vendor_info.hdr->version)) {
@@ -247,6 +248,7 @@ int vendor_storage_init(void)
 			}
 		}
 	}
+
 	if (max_ver) {
 		debug("[Vendor INFO]:max_ver=%d, vendor_id=%d.\n", max_ver, max_index);
 		/*
@@ -254,9 +256,12 @@ int vendor_storage_init(void)
 		 * version of vendor
 		 */
 		if (max_index != (VENDOR_PART_NUM - 1)) {
-			ret = vendor_ops((u8 *)vendor_info.hdr, part_size * max_index, part_size, 0);
-			if (ret != part_size)
-				return -EIO;
+			ret_size = vendor_ops((u8 *)vendor_info.hdr,
+					       part_size * max_index, part_size, 0);
+			if (ret_size != part_size) {
+				ret = -EIO;
+				goto out;
+			}
 		}
 	} else {
 		debug("[Vendor INFO]:Reset vendor info...\n");
@@ -271,11 +276,7 @@ int vendor_storage_init(void)
 	}
 	debug("[Vendor INFO]:ret=%d.\n", ret);
 
-#ifdef VENDOR_STORAGE_TEST
-	if (vendor_storage_test())
-		printf("[Vendor ERROR]:Vendor test result:failure\n");
-#endif
-
+out:
 	return ret;
 }
 
@@ -421,9 +422,8 @@ int vendor_storage_write(u16 id, void *pbuf, u16 size)
 /**********************************************************/
 /*              vendor API uinit test                      */
 /**********************************************************/
-#ifdef VENDOR_STORAGE_TEST
 /* Reset the vendor storage space to the initial state */
-void vendor_test_reset(void)
+static void vendor_test_reset(void)
 {
 	u16 i, part_size;
 	u32 size;
@@ -474,6 +474,15 @@ int vendor_storage_test(void)
 	u8 *buffer = NULL;
 	int ret = 0;
 
+	if (!bootdev_type) {
+		ret = vendor_storage_init();
+		if (ret) {
+			printf("%s: vendor storage init failed, ret=%d\n",
+			       __func__, ret);
+			return ret;
+		}
+	}
+
 	/*
 	 * Calculate the maximum number of items and the maximum
 	 * allocable memory for each item.
@@ -639,4 +648,3 @@ int vendor_storage_test(void)
 
 	return 0;
 }
-#endif /* VENDOR_STORAGE_TEST */

commit 3ee3aa89665b276da6d267d27a94fb82f61010c1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Jul 14 17:25:26 2018 +0800

    common: fdt_support: replace env_update with env_update_filter
    
    Change-Id: Ic47d3b82b3aac6b36f9fe7803c0d3a165ebd9e05
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/fdt_support.c b/common/fdt_support.c
index da19054df8..667b7e06fa 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -306,13 +306,13 @@ int fdt_chosen(void *fdt)
 #ifdef CONFIG_ANDROID_AB
 			env_update_filter("bootargs", bootargs, "root=");
 #else
-			env_update("bootargs", bootargs);
-#endif
 			/*
 			 * Initrd fixup: remove unused "initrd=0x...,0x...",
 			 * this for compatible with legacy parameter.txt
 			 */
-			env_delete("bootargs", "initrd=");
+			env_update_filter("bootargs", bootargs, "initrd=");
+#endif
+
 			str = env_get("bootargs");
 		}
 #endif

commit b7618fd33c611de77a7c34bada9c24596f89f19d
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Fri Jul 13 10:17:35 2018 +0800

    drm/rockchip: rk3399 vop: add support win csc
    
    support rgb2yuv for yuv output, the csc matrix maybe
    bt601,bt601l,bt709 and bt2020, depend on connect output
    color space.
    
    Change-Id: Ibd8defc9a2519f850d8f3af7ee350022e5ee2ee4
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index bd11805fe7..9d613abeaf 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -82,6 +82,7 @@ struct crtc_state {
 	int crtc_y;
 	int crtc_w;
 	int crtc_h;
+	bool yuv_overlay;
 	struct rockchip_mcu_timing mcu_timing;
 };
 
diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index 28dc622fbd..0d20bf1b53 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -236,6 +236,8 @@ static int rockchip_vop_init(struct display_state *state)
 
 	vop->grf_ctrl = vop_data->grf_ctrl;
 	vop->line_flag = vop_data->line_flag;
+	vop->csc_table = vop_data->csc_table;
+	vop->win_csc = vop_data->win_csc;
 	vop->version = vop_data->version;
 	vop->max_output = vop_data->max_output;
 
@@ -388,6 +390,7 @@ static int rockchip_vop_init(struct display_state *state)
 			post_r2y_en = true;
 	}
 
+	crtc_state->yuv_overlay = yuv_overlay;
 	post_csc_mode = to_vop_csc_mode(conn_state->color_space);
 	VOP_CTRL_SET(vop, bcsh_r2y_en, post_r2y_en);
 	VOP_CTRL_SET(vop, bcsh_y2r_en, post_y2r_en);
@@ -584,6 +587,54 @@ static void scl_vop_cal_scl_fac(struct vop *vop,
 	}
 }
 
+static void vop_load_csc_table(struct vop *vop, u32 offset, const u32 *table)
+{
+	int i;
+
+	/*
+	 * so far the csc offset is not 0 and in the feature the csc offset
+	 * impossible be 0, so when the offset is 0, should return here.
+	 */
+	if (!table || offset == 0)
+		return;
+
+	for (i = 0; i < 8; i++)
+		vop_writel(vop, offset + i * 4, table[i]);
+}
+
+static int rockchip_vop_setup_csc_table(struct display_state *state)
+{
+	struct crtc_state *crtc_state = &state->crtc_state;
+	struct connector_state *conn_state = &state->conn_state;
+	struct vop *vop = crtc_state->private;
+	const uint32_t *csc_table = NULL;
+
+	if (!vop->csc_table || !crtc_state->yuv_overlay)
+		return 0;
+	/* todo: only implement r2y*/
+	switch (conn_state->color_space) {
+	case V4L2_COLORSPACE_SMPTE170M:
+		csc_table = vop->csc_table->r2y_bt601_12_235;
+		break;
+	case V4L2_COLORSPACE_REC709:
+	case V4L2_COLORSPACE_DEFAULT:
+	case V4L2_COLORSPACE_JPEG:
+		csc_table = vop->csc_table->r2y_bt709;
+		break;
+	case V4L2_COLORSPACE_BT2020:
+		csc_table = vop->csc_table->r2y_bt2020;
+		break;
+	default:
+		csc_table = vop->csc_table->r2y_bt601;
+		break;
+	}
+
+	vop_load_csc_table(vop, vop->win_csc->r2y_offset, csc_table);
+	VOP_WIN_CSC_SET(vop, r2y_en, 1);
+
+	return 0;
+}
+
 static int rockchip_vop_set_plane(struct display_state *state)
 {
 	struct crtc_state *crtc_state = &state->crtc_state;
@@ -630,6 +681,7 @@ static int rockchip_vop_set_plane(struct display_state *state)
 
 	VOP_WIN_SET(vop, src_alpha_ctl, 0);
 
+	rockchip_vop_setup_csc_table(state);
 	VOP_WIN_SET(vop, enable, 1);
 	vop_cfg_done(vop);
 
diff --git a/drivers/video/drm/rockchip_vop.h b/drivers/video/drm/rockchip_vop.h
index 03c48e4c7d..130e2a1cd6 100644
--- a/drivers/video/drm/rockchip_vop.h
+++ b/drivers/video/drm/rockchip_vop.h
@@ -58,6 +58,8 @@
 		REG_SET(x, name, 0, (x)->ctrl->name, v)
 #define VOP_LINE_FLAG_SET(x, name, v) \
 		REG_SET(x, name, 0, (x)->line_flag->name, v)
+#define VOP_WIN_CSC_SET(x, name, v) \
+		REG_SET(x, name, 0, (x)->win_csc->name, v)
 
 #define VOP_CTRL_GET(x, name) \
 		vop_read_reg(x, 0, &vop->ctrl->name)
@@ -429,6 +431,23 @@ struct vop_rect {
 	int height;
 };
 
+struct vop_csc_table {
+	const uint32_t *r2y_bt601;
+	const uint32_t *r2y_bt601_12_235;
+	const uint32_t *r2y_bt709;
+	const uint32_t *r2y_bt2020;
+};
+
+struct vop_csc {
+	struct vop_reg y2r_en;
+	struct vop_reg r2r_en;
+	struct vop_reg r2y_en;
+
+	uint32_t y2r_offset;
+	uint32_t r2r_offset;
+	uint32_t r2y_offset;
+};
+
 #define VOP_FEATURE_OUTPUT_10BIT	BIT(0)
 
 struct vop_data {
@@ -437,6 +456,8 @@ struct vop_data {
 	const struct vop_win *win;
 	const struct vop_line_flag *line_flag;
 	const struct vop_grf_ctrl *grf_ctrl;
+	const struct vop_csc_table *csc_table;
+	const struct vop_csc *win_csc;
 	int win_offset;
 	int reg_len;
 	u64 feature;
@@ -453,6 +474,8 @@ struct vop {
 	const struct vop_win *win;
 	const struct vop_line_flag *line_flag;
 	const struct vop_grf_ctrl *grf_ctrl;
+	const struct vop_csc_table *csc_table;
+	const struct vop_csc *win_csc;
 	int win_offset;
 	struct vop_rect max_output;
 };
diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index 66c9713e26..eed6d5b8b2 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -235,6 +235,42 @@ const struct vop_data rk3366_vop = {
 	.reg_len = RK3366_DSP_VACT_ST_END_F1 * 4,
 };
 
+static const uint32_t vop_csc_r2y_bt601[] = {
+	0x02590132, 0xff530075, 0x0200fead, 0xfe530200,
+	0x0000ffad, 0x00000200, 0x00080200, 0x00080200,
+};
+
+static const uint32_t vop_csc_r2y_bt601_12_235[] = {
+	0x02040107, 0xff680064, 0x01c2fed6, 0xffb7fe87,
+	0x0000ffb7, 0x00010200, 0x00080200, 0x00080200,
+};
+
+static const uint32_t vop_csc_r2y_bt709[] = {
+	0x027500bb, 0xff99003f, 0x01c2fea5, 0xfe6801c2,
+	0x0000ffd7, 0x00010200, 0x00080200, 0x00080200,
+};
+
+static const uint32_t vop_csc_r2y_bt2020[] = {
+	0x025300e6, 0xff830034, 0x01c1febd, 0xfe6401c1,
+	0x0000ffdc, 0x00010200, 0x00080200, 0x00080200,
+};
+
+static const struct vop_csc_table rk3399_csc_table = {
+	.r2y_bt601		= vop_csc_r2y_bt601,
+	.r2y_bt601_12_235	= vop_csc_r2y_bt601_12_235,
+	.r2y_bt709		= vop_csc_r2y_bt709,
+	.r2y_bt2020		= vop_csc_r2y_bt2020,
+};
+
+static const struct vop_csc rk3399_win0_csc = {
+	.r2r_en = VOP_REG(RK3399_YUV2YUV_WIN, 0x1, 0),
+	.y2r_en = VOP_REG(RK3399_YUV2YUV_WIN, 0x1, 1),
+	.r2y_en = VOP_REG(RK3399_YUV2YUV_WIN, 0x1, 2),
+	.y2r_offset = RK3399_WIN0_YUV2YUV_Y2R,
+	.r2r_offset = RK3399_WIN0_YUV2YUV_3X3,
+	.r2y_offset = RK3399_WIN0_YUV2YUV_R2Y,
+};
+
 const struct vop_data rk3399_vop_big = {
 	.version = VOP_VERSION(3, 5),
 	.max_output = {4096, 2160},
@@ -242,6 +278,8 @@ const struct vop_data rk3399_vop_big = {
 	.ctrl = &rk3288_ctrl_data,
 	.win = &rk3288_win01_data,
 	.line_flag = &rk3366_vop_line_flag,
+	.csc_table = &rk3399_csc_table,
+	.win_csc = &rk3399_win0_csc,
 	.reg_len = RK3399_DSP_VACT_ST_END_F1 * 4,
 };
 
@@ -251,6 +289,8 @@ const struct vop_data rk3399_vop_lit = {
 	.ctrl = &rk3288_ctrl_data,
 	.win = &rk3288_win01_data,
 	.line_flag = &rk3366_vop_line_flag,
+	.csc_table = &rk3399_csc_table,
+	.win_csc = &rk3399_win0_csc,
 	.reg_len = RK3399_DSP_VACT_ST_END_F1 * 4,
 };
 

commit 543c0e7848ba8d40d5c371aa0599e22d6c32a684
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Thu Jul 12 15:04:30 2018 +0800

    drm/rockchip: vop: fix VOP_REG_SUPPORT judge wrong
    
    If the register isn't define at rockchip_vop_reg.c, the default value
    of reg.major is 0, this will lead to judge error. so we add reg.mask
    conditions because if it's defined register, the reg.mask can't be 0.
    
    Change-Id: I368276d2d81983b5c5dbf591503def1de49ccdc1
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_vop.h b/drivers/video/drm/rockchip_vop.h
index 8662ed1400..03c48e4c7d 100644
--- a/drivers/video/drm/rockchip_vop.h
+++ b/drivers/video/drm/rockchip_vop.h
@@ -16,10 +16,11 @@
 #define VOP_MINOR(version) 	((version) & 0xff)
 
 #define VOP_REG_SUPPORT(vop, reg) \
-		(!reg.major || (reg.major == VOP_MAJOR(vop->version) && \
-		reg.begin_minor <= VOP_MINOR(vop->version) && \
-		reg.end_minor >= VOP_MINOR(vop->version) && \
-		reg.mask))
+		(reg.mask && \
+		 (!reg.major || \
+		  (reg.major == VOP_MAJOR(vop->version) && \
+		   reg.begin_minor <= VOP_MINOR(vop->version) && \
+		   reg.end_minor >= VOP_MINOR(vop->version))))
 
 #define VOP_WIN_SUPPORT(vop, win, name) \
 		VOP_REG_SUPPORT(vop, win->name)

commit 2c9c7f0d247d5101e5e52c7c3548ab0404051c55
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jul 6 16:37:18 2018 +0800

    common: fdt_support: delete root=
    
    Delete default "root=" in the dts when use AB system.
    
    The ab bootctl will choose the high priority system
    and storage its UUID to cmdline.The format is:
    root=PARTUUID=xxxx-xxxx...
    
    Change-Id: I4ad5b167952c84764fee741b527346bdfe5af1d7
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/fdt_support.c b/common/fdt_support.c
index feb01d0b79..da19054df8 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -296,8 +296,18 @@ int fdt_chosen(void *fdt)
 
 		bootargs = fdt_getprop(fdt, nodeoffset, "bootargs", NULL);
 		if (bootargs) {
-			/* Append kernel bootargs */
+			/*
+			 * Append kernel bootargs
+			 * If use AB system, delete default "root=" which route
+			 * to rootfs. Then the ab bootctl will choose the
+			 * high priority system to boot and add its UUID
+			 * to cmdline. The format is "roo=PARTUUID=xxxx...".
+			 */
+#ifdef CONFIG_ANDROID_AB
+			env_update_filter("bootargs", bootargs, "root=");
+#else
 			env_update("bootargs", bootargs);
+#endif
 			/*
 			 * Initrd fixup: remove unused "initrd=0x...,0x...",
 			 * this for compatible with legacy parameter.txt

commit 8f0cd0fbde62ccd7e966c78280b545bb9f3998ad
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jul 4 17:09:35 2018 +0800

    disk: rkparm: use env_update_filter() to append cmdline
    
    Change-Id: I4b5024adc4b2d176f1ffa25677323ba17a1d061f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/disk/part_rkparm.c b/disk/part_rkparm.c
index 4dd2d564d7..8e2f37163f 100644
--- a/disk/part_rkparm.c
+++ b/disk/part_rkparm.c
@@ -48,14 +48,12 @@ static int rkparm_param_parse(char *param, struct list_head *parts_head,
 	next = strchr(blkdev_parts, ':');
 	cmdline_end = strstr(cmdline, "\n"); /* end by '\n' */
 	*cmdline_end = '\0';
-	/* skip "CMDLINE:" */
-	env_update("bootargs", cmdline + strlen("CMDLINE:"));
-
 	/*
-	 * Initrd fixup: remove unused "initrd=0x...,0x...", this for
-	 * compatible with legacy parameter.txt
+	 * 1. skip "CMDLINE:"
+	 * 2. Initrd fixup: remove unused "initrd=0x...,0x...", this for
+	 *    compatible with legacy parameter.txt
 	 */
-	env_delete("bootargs", "initrd=");
+	env_update_filter("bootargs", cmdline + strlen("CMDLINE:"), "initrd=");
 
 	INIT_LIST_HEAD(parts_head);
 	while (next) {

commit feff4979f68be5bd86d0ef510db0187ddb3c8920
Author: William Wu <william.wu@rock-chips.com>
Date:   Mon Jul 9 09:56:35 2018 +0800

    rockchip: rk322x: syscon: use dm_scan_fdt_dev() for bind
    
    Since usb phys are the subnodes of rk322 syscon node,
    we need to use dm_scan_fdt_dev() to scan the subnodes.
    
    Change-Id: Ife0d5d346953944952d5bb96441908573450763e
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk322x/syscon_rk322x.c b/arch/arm/mach-rockchip/rk322x/syscon_rk322x.c
index 1b11b8cbeb..a93c4df77f 100644
--- a/arch/arm/mach-rockchip/rk322x/syscon_rk322x.c
+++ b/arch/arm/mach-rockchip/rk322x/syscon_rk322x.c
@@ -18,5 +18,6 @@ static const struct udevice_id rk322x_syscon_ids[] = {
 U_BOOT_DRIVER(syscon_rk322x) = {
 	.name = "rk322x_syscon",
 	.id = UCLASS_SYSCON,
+	.bind = dm_scan_fdt_dev,
 	.of_match = rk322x_syscon_ids,
 };

commit 8f4f34a3e02da825b3480542eee34b143f6746c8
Author: William Wu <william.wu@rock-chips.com>
Date:   Mon Jul 9 09:55:02 2018 +0800

    rockchip: dts: enable usb phy for rk322x boards
    
    Enable usb phy for rk3229 evb and gva.
    
    Change-Id: I675624f23f41adb83dcc618fc48d22f7e456c63b
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/arch/arm/dts/rk3229-evb.dts b/arch/arm/dts/rk3229-evb.dts
index 66619689a6..f43fe86f6a 100644
--- a/arch/arm/dts/rk3229-evb.dts
+++ b/arch/arm/dts/rk3229-evb.dts
@@ -88,6 +88,18 @@
 	status = "okay";
 };
 
+&u2phy0 {
+	status = "okay";
+
+	u2phy0_otg: otg-port {
+		status = "okay";
+	};
+
+	u2phy0_host: host-port {
+		status = "okay";
+	};
+};
+
 &usb20_otg {
        status = "okay";
 };
diff --git a/arch/arm/dts/rk3229-gva.dts b/arch/arm/dts/rk3229-gva.dts
index 35b266e3b3..f6a8f97121 100644
--- a/arch/arm/dts/rk3229-gva.dts
+++ b/arch/arm/dts/rk3229-gva.dts
@@ -297,6 +297,18 @@
 	status = "okay";
 };
 
+&u2phy0 {
+	status = "okay";
+
+	u2phy0_otg: otg-port {
+		status = "okay";
+	};
+
+	u2phy0_host: host-port {
+		status = "okay";
+	};
+};
+
 &usb20_otg {
        status = "okay";
 };

commit e4a1de104281b7b528e360a26c3d871790a3f9b4
Author: William Wu <william.wu@rock-chips.com>
Date:   Mon Jul 9 09:53:31 2018 +0800

    rockchip: dts: rk322x: add usb phy nodes
    
    Add usb phy nodes for rk322x usb otg port and host port.
    
    Change-Id: Ib7f8c5d354d06af3882c9ee9641e8b0002b66855
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/arch/arm/dts/rk322x.dtsi b/arch/arm/dts/rk322x.dtsi
index bbb8d4962c..3192980c48 100644
--- a/arch/arm/dts/rk322x.dtsi
+++ b/arch/arm/dts/rk322x.dtsi
@@ -169,6 +169,51 @@
 		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3228-grf", "syscon";
 		reg = <0x11000000 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		u2phy0: usb2-phy@760 {
+			compatible = "rockchip,rk322x-usb2phy";
+			reg = <0x0760 0x0c>;
+			status = "disabled";
+
+			u2phy0_otg: otg-port {
+				#phy-cells = <0>;
+				interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
+					     <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
+					     <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
+				interrupt-names = "otg-bvalid", "otg-id",
+						  "linestate";
+				status = "disabled";
+			};
+
+			u2phy0_host: host-port {
+				#phy-cells = <0>;
+				interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+				interrupt-names = "linestate";
+				status = "disabled";
+			};
+		};
+
+		u2phy1: usb2-phy@800 {
+			compatible = "rockchip,rk322x-usb2phy";
+			reg = <0x0800 0x0c>;
+			status = "disabled";
+
+			u2phy1_otg: otg-port {
+				#phy-cells = <0>;
+				interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+				interrupt-names = "linestate";
+				status = "disabled";
+			};
+
+			u2phy1_host: host-port {
+				#phy-cells = <0>;
+				interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
+				interrupt-names = "linestate";
+				status = "disabled";
+			};
+		};
 	};
 
 	uart0: serial@11010000 {
@@ -455,6 +500,8 @@
 		interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 		hnp-srp-disable;
 		dr_mode = "otg";
+		phys = <&u2phy0_otg>;
+		phy-names = "usb2-phy";
 		status = "disabled";
 	};
 

commit ed5a6560152086996ea7ad0648ab4929d7b4116c
Author: William Wu <william.wu@rock-chips.com>
Date:   Mon Jul 9 09:51:59 2018 +0800

    configs: rockchip: enable usb phy support for rk3229 boards
    
    Change-Id: I16d1cfbe4fddf7f0990c522fb07e130fcb58b799
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index 94051e7e3b..f83bc88bfc 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -64,6 +64,7 @@ CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
diff --git a/configs/gva-rk3229_defconfig b/configs/gva-rk3229_defconfig
index 26e9c9bfee..f438447f61 100644
--- a/configs/gva-rk3229_defconfig
+++ b/configs/gva-rk3229_defconfig
@@ -55,6 +55,8 @@ CONFIG_MISC=y
 CONFIG_ROCKCHIP_EFUSE=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y

commit a636a6d7a26ca3036c0657f998e6537ff19517cd
Author: William Wu <william.wu@rock-chips.com>
Date:   Mon Jul 9 09:46:04 2018 +0800

    phy: phy-rockchip-inno-usb2: add support for rk322x
    
    This patch add phy configuration for rk322x, and
    open pre-emphasize in non-chirp state for otg port.
    
    Change-Id: I33d1d64fd3dfe6a328ec0695ff6e648280860137
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index 70bdcd1f4e..d42a889398 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -532,9 +532,24 @@ static int rockchip_usb2phy_probe(struct udevice *dev)
 		return -EINVAL;
 	}
 
+	if (rphy->phy_cfg->phy_tuning)
+		rphy->phy_cfg->phy_tuning(rphy);
+
 	return 0;
 }
 
+static int rk322x_usb2phy_tuning(struct rockchip_usb2phy *rphy)
+{
+	void __iomem *base = get_reg_base(rphy);
+	int ret = 0;
+
+	/* Open pre-emphasize in non-chirp state for PHY0 otg port */
+	if (rphy->phy_cfg->reg == 0x760)
+		ret = writel(0x00070004, base + 0x76c);
+
+	return ret;
+}
+
 static struct phy_ops rockchip_usb2phy_ops = {
 	.init = rockchip_usb2phy_init,
 	.exit = rockchip_usb2phy_exit,
@@ -590,6 +605,76 @@ static const struct rockchip_usb2phy_cfg rk312x_phy_cfgs[] = {
 	{ /* sentinel */ }
 };
 
+static const struct rockchip_usb2phy_cfg rk322x_phy_cfgs[] = {
+	{
+		.reg = 0x760,
+		.num_ports	= 2,
+		.phy_tuning	= rk322x_usb2phy_tuning,
+		.clkout_ctl	= { 0x0768, 4, 4, 1, 0 },
+		.port_cfgs	= {
+			[USB2PHY_PORT_OTG] = {
+				.phy_sus	= { 0x0760, 8, 0, 0, 0x1d1 },
+				.bvalid_det_en	= { 0x0680, 3, 3, 0, 1 },
+				.bvalid_det_st	= { 0x0690, 3, 3, 0, 1 },
+				.bvalid_det_clr	= { 0x06a0, 3, 3, 0, 1 },
+				.iddig_output	= { 0x0760, 10, 10, 0, 1 },
+				.iddig_en	= { 0x0760, 9, 9, 0, 1 },
+				.idfall_det_en	= { 0x0680, 6, 6, 0, 1 },
+				.idfall_det_st	= { 0x0690, 6, 6, 0, 1 },
+				.idfall_det_clr	= { 0x06a0, 6, 6, 0, 1 },
+				.idrise_det_en	= { 0x0680, 5, 5, 0, 1 },
+				.idrise_det_st	= { 0x0690, 5, 5, 0, 1 },
+				.idrise_det_clr	= { 0x06a0, 5, 5, 0, 1 },
+				.ls_det_en	= { 0x0680, 2, 2, 0, 1 },
+				.ls_det_st	= { 0x0690, 2, 2, 0, 1 },
+				.ls_det_clr	= { 0x06a0, 2, 2, 0, 1 },
+				.utmi_bvalid	= { 0x0480, 4, 4, 0, 1 },
+				.utmi_iddig	= { 0x0480, 1, 1, 0, 1 },
+				.utmi_ls	= { 0x0480, 3, 2, 0, 1 },
+				.vbus_det_en	= { 0x0788, 15, 15, 1, 0 },
+			},
+			[USB2PHY_PORT_HOST] = {
+				.phy_sus	= { 0x0764, 8, 0, 0, 0x1d1 },
+				.ls_det_en	= { 0x0680, 4, 4, 0, 1 },
+				.ls_det_st	= { 0x0690, 4, 4, 0, 1 },
+				.ls_det_clr	= { 0x06a0, 4, 4, 0, 1 }
+			}
+		},
+		.chg_det = {
+			.opmode		= { 0x0760, 3, 0, 5, 1 },
+			.cp_det		= { 0x0884, 4, 4, 0, 1 },
+			.dcp_det	= { 0x0884, 3, 3, 0, 1 },
+			.dp_det		= { 0x0884, 5, 5, 0, 1 },
+			.idm_sink_en	= { 0x0768, 8, 8, 0, 1 },
+			.idp_sink_en	= { 0x0768, 7, 7, 0, 1 },
+			.idp_src_en	= { 0x0768, 9, 9, 0, 1 },
+			.rdm_pdwn_en	= { 0x0768, 10, 10, 0, 1 },
+			.vdm_src_en	= { 0x0768, 12, 12, 0, 1 },
+			.vdp_src_en	= { 0x0768, 11, 11, 0, 1 },
+		},
+	},
+	{
+		.reg = 0x800,
+		.num_ports	= 2,
+		.clkout_ctl	= { 0x0808, 4, 4, 1, 0 },
+		.port_cfgs	= {
+			[USB2PHY_PORT_OTG] = {
+				.phy_sus	= { 0x804, 8, 0, 0, 0x1d1 },
+				.ls_det_en	= { 0x0684, 1, 1, 0, 1 },
+				.ls_det_st	= { 0x0694, 1, 1, 0, 1 },
+				.ls_det_clr	= { 0x06a4, 1, 1, 0, 1 }
+			},
+			[USB2PHY_PORT_HOST] = {
+				.phy_sus	= { 0x800, 8, 0, 0, 0x1d1 },
+				.ls_det_en	= { 0x0684, 0, 0, 0, 1 },
+				.ls_det_st	= { 0x0694, 0, 0, 0, 1 },
+				.ls_det_clr	= { 0x06a4, 0, 0, 0, 1 }
+			}
+		},
+	},
+	{ /* sentinel */ }
+};
+
 static const struct rockchip_usb2phy_cfg rk3328_phy_cfgs[] = {
 	{
 		.reg = 0x100,
@@ -687,6 +772,7 @@ static const struct rockchip_usb2phy_cfg rv1108_phy_cfgs[] = {
 
 static const struct udevice_id rockchip_usb2phy_ids[] = {
 	{ .compatible = "rockchip,rk3128-usb2phy", .data = (ulong)&rk312x_phy_cfgs },
+	{ .compatible = "rockchip,rk322x-usb2phy", .data = (ulong)&rk322x_phy_cfgs },
 	{ .compatible = "rockchip,rk3308-usb2phy", .data = (ulong)&rk3328_phy_cfgs },
 	{ .compatible = "rockchip,rk3328-usb2phy", .data = (ulong)&rk3328_phy_cfgs },
 	{ .compatible = "rockchip,rv1108-usb2phy", .data = (ulong)&rv1108_phy_cfgs },

commit 0958c00c0776311c62c607d699bc836e2a4ef428
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Tue Jun 12 14:26:54 2018 +0800

    rockchip: rk3308: enable lzo/lz4/gzip compressed kernel image
    
    Change-Id: Ic44218ddf2ee8a993b4530cad04d712d6aecfccc
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index 6a67a31103..9bddfec667 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -9,12 +9,12 @@ CONFIG_TARGET_EVB_RK3308=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3308-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
-CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_ANDROID_BOOT_IMAGE=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
 # CONFIG_FASTBOOT is not set
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
@@ -62,4 +62,6 @@ CONFIG_G_DNL_VENDOR_NUM=0x2207
 CONFIG_G_DNL_PRODUCT_NUM=0x330d
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
+CONFIG_LZ4=y
+CONFIG_LZO=y
 CONFIG_ERRNO_STR=y
diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h
index e4756a043c..b562c94cd3 100644
--- a/include/configs/rk3308_common.h
+++ b/include/configs/rk3308_common.h
@@ -50,13 +50,15 @@
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x01f00000\0" \
 	"kernel_addr_r=0x02080000\0" \
+	"kernel_addr_c=0x04080000\0" \
 	"ramdisk_addr_r=0x04000000\0"
 #else
 #define ENV_MEM_LAYOUT_SETTINGS \
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x03200000\0" \
-	"kernel_addr_r=0x2008000\0" \
+	"kernel_addr_r=0x00058000\0" \
+	"kernel_addr_c=0x2008000\0" \
 	"ramdisk_addr_r=0x03080000\0"
 #endif
 

commit 008aee876ae5041eb6e2889c9becb47351d0ee47
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Tue Jun 12 14:21:17 2018 +0800

    boot_android: add runtime compatible for un/compressed kernel image
    
    This patch add auto parse the compress format of kernel image.
    Then decompress the compressed kernel image for arm64, as for
    arm32 zImage, we only need to load it to a higher memory, then
    the kernel will handle the decompress itself.
    
    Test on RK3308 AARCH64 mode (Cortex A35 816 MHZ) boot with eMMC:
    
    ------------------------------------------------------------------
    Format    |  Size(Byte) | Ratio | Decomp time(ms) | Boot time(ms) |
    -------------------------------------------------------------------
    Image     | 7720968     |       |                 |     488       |
    -------------------------------------------------------------------
    Image.lz4 | 4119448     | 53%   |       59        |     455       |
    -------------------------------------------------------------------
    Image.lzo | 3858322     | 49%   |       141       |     536       |
    -------------------------------------------------------------------
    Image.gz  | 3529108     | 45%   |       222       |     609       |
    -------------------------------------------------------------------
    Image.bz2 | 3295914     | 42%   |       2940      |               |
    -------------------------------------------------------------------
    Image.lzma| 2683750     | 34%   |                 |               |
    -------------------------------------------------------------------
    
    Note: the boot time is counted from first ddr init log to first Kernel log.
    
    Change-Id: I73b12ec944fbc8238b0e061a37e2f31aa3093231
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/cmd/boot_android.c b/cmd/boot_android.c
index 308d1a7b11..4e775cea3b 100644
--- a/cmd/boot_android.c
+++ b/cmd/boot_android.c
@@ -42,10 +42,12 @@ static int do_boot_android(cmd_tbl_t *cmdtp, int flag, int argc,
 			load_address = CONFIG_SYS_LOAD_ADDR;
 	}
 
+#if defined(CONFIG_ARM64)
 	/* ARM64 kernel load addr need to align to 0x80000, and android boot.img
 	 * have a 2KB header, need to reserve space for it.
 	 */
 	load_address &= ~0x7ffff;
+#endif
 	load_address -= 0x800; /* default page size for boot header */
 	dev_desc = blk_get_dev(argv[1], simple_strtoul(argv[2], NULL, 16));
 	if (!dev_desc) {
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index add6003397..ccf9dab5d7 100755
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -569,11 +569,11 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	debug("ANDROID: Loading kernel from \"%s\", partition %d.\n",
 	      boot_part_info.name, part_num);
 
-	ret = android_image_load(dev_desc, &boot_part_info, load_address,
+	load_address = android_image_load(dev_desc, &boot_part_info, load_address,
 				 -1UL);
-	if (ret < 0) {
+	if (load_address < 0) {
 		printf("%s %s part load fail\n", __func__, boot_part_info.name);
-		return ret;
+		return load_address;
 	}
 #endif
 
diff --git a/common/bootm.c b/common/bootm.c
index 0bebb2d046..97bfd23226 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -162,7 +162,7 @@ static int bootm_find_os(cmd_tbl_t *cmdtp, int flag, int argc,
 #ifdef CONFIG_ANDROID_BOOT_IMAGE
 	case IMAGE_FORMAT_ANDROID:
 		images.os.type = IH_TYPE_KERNEL;
-		images.os.comp = IH_COMP_NONE;
+		images.os.comp = android_image_get_comp(os_hdr);
 		images.os.os = IH_OS_LINUX;
 
 		images.os.end = android_image_get_end(os_hdr);
@@ -344,6 +344,33 @@ static int handle_decomp_error(int comp_type, size_t uncomp_size,
 	return BOOTM_ERR_RESET;
 }
 
+int bootm_parse_comp(const unsigned char *hdr)
+{
+#if defined(CONFIG_ARM) && !defined(CONFIG_ARM64)
+	ulong start, end;
+
+	if (!bootz_setup((ulong)hdr, &start, &end))
+		return IH_COMP_ZIMAGE;
+#endif
+#if defined(CONFIG_LZ4)
+	if (lz4_is_valid_header(hdr))
+		return IH_COMP_LZ4;
+#endif
+#if defined(CONFIG_LZO)
+	if (lzop_is_valid_header(hdr))
+		return IH_COMP_LZO;
+#endif
+#if defined(CONFIG_GZIP)
+	if (gzip_parse_header(hdr, 0xffff) > 0)
+		return IH_COMP_GZIP;
+#endif
+#if defined(CONFIG_BZIP2)
+	if ((hdr[0] == 'B') && (hdr[1] == 'Z') && (hdr[2] == 'h'))
+		return IH_COMP_BZIP2;
+#endif
+	return IH_COMP_NONE;
+}
+
 int bootm_decomp_image(int comp, ulong load, ulong image_start, int type,
 		       void *load_buf, void *image_buf, ulong image_len,
 		       uint unc_len, ulong *load_end)
diff --git a/common/image-android.c b/common/image-android.c
index 0013f33cb2..c05279bb1e 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -18,6 +18,7 @@
 #define ANDROID_ARG_FDT_FILENAME "rk-kernel.dtb"
 
 static char andr_tmp_str[ANDR_BOOT_ARGS_SIZE + 1];
+static u32 android_kernel_comp_type = IH_COMP_NONE;
 
 static ulong android_image_get_kernel_addr(const struct andr_img_hdr *hdr)
 {
@@ -38,6 +39,23 @@ static ulong android_image_get_kernel_addr(const struct andr_img_hdr *hdr)
 	return hdr->kernel_addr;
 }
 
+void android_image_set_comp(struct andr_img_hdr *hdr, u32 comp)
+{
+	android_kernel_comp_type = comp;
+}
+
+u32 android_image_get_comp(const struct andr_img_hdr *hdr)
+{
+	return android_kernel_comp_type;
+}
+
+int android_image_parse_kernel_comp(const struct andr_img_hdr *hdr)
+{
+	ulong kaddr = android_image_get_kernel_addr(hdr);
+
+	return bootm_parse_comp((const unsigned char *)kaddr);
+}
+
 /**
  * android_image_get_kernel() - processes kernel part of Android boot images
  * @hdr:	Pointer to image header, which is at the start
@@ -127,6 +145,16 @@ ulong android_image_get_end(const struct andr_img_hdr *hdr)
 	return end;
 }
 
+u32 android_image_get_ksize(const struct andr_img_hdr *hdr)
+{
+	return hdr->kernel_size;
+}
+
+void android_image_set_kload(struct andr_img_hdr *hdr, u32 load_address)
+{
+	hdr->kernel_addr = load_address;
+}
+
 ulong android_image_get_kload(const struct andr_img_hdr *hdr)
 {
 	return android_image_get_kernel_addr(hdr);
@@ -179,7 +207,10 @@ long android_image_load(struct blk_desc *dev_desc,
 			unsigned long load_address,
 			unsigned long max_size) {
 	void *buf;
-	long blk_cnt, blk_read = 0;
+	long blk_cnt = 0;
+	long blk_read = 0;
+	u32 comp;
+	u32 kload_addr;
 
 	if (max_size < part_info->blksz)
 		return -1;
@@ -189,17 +220,33 @@ long android_image_load(struct blk_desc *dev_desc,
 	 */
 	buf = map_sysmem(load_address, 0 /* size */);
 
-	/* Read the Android header first and then read the rest. */
-	if (blk_dread(dev_desc, part_info->start, 1, buf) != 1)
+	/* Read the Android boot.img header and a few parts of
+	 * the head of kernel image.
+	 */
+	if (blk_dread(dev_desc, part_info->start, 8, buf) != 8)
 		blk_read = -1;
 
 	if (!blk_read && android_image_check_header(buf) != 0) {
 		printf("** Invalid Android Image header **\n");
 		blk_read = -1;
 	}
+
+	comp = android_image_parse_kernel_comp(buf);
+
 	if (!blk_read) {
 		blk_cnt = (android_image_get_end(buf) - (ulong)buf +
 			   part_info->blksz - 1) / part_info->blksz;
+		/*
+		 * We should load a compressed kernel Image
+		 * to high memory
+		 */
+		if (comp != IH_COMP_NONE) {
+			load_address += android_image_get_ksize(buf) * 3;
+			load_address = env_get_ulong("kernel_addr_c", 16, load_address);
+			unmap_sysmem(buf);
+			buf = map_sysmem(load_address, 0 /* size */);
+		}
+
 		if (blk_cnt * part_info->blksz > max_size) {
 			debug("Android Image too big (%lu bytes, max %lu)\n",
 			      android_image_get_end(buf) - (ulong)buf,
@@ -213,15 +260,26 @@ long android_image_load(struct blk_desc *dev_desc,
 		}
 	}
 
+	/*
+	 * zImage is not need to decompress
+	 * kernel will handle decompress itself
+	 */
+	if (comp != IH_COMP_NONE && comp != IH_COMP_ZIMAGE) {
+		kload_addr = env_get_ulong("kernel_addr_r", 16, 0x02080000);
+		android_image_set_kload(buf, kload_addr);
+		android_image_set_comp(buf, comp);
+	} else {
+		android_image_set_comp(buf, IH_COMP_NONE);
+	}
+
 	unmap_sysmem(buf);
-	if (blk_read < 0)
-		return blk_read;
 
 	debug("%lu blocks read: %s\n",
 	      blk_read, (blk_read == blk_cnt) ? "OK" : "ERROR");
 	if (blk_read != blk_cnt)
 		return -1;
-	return blk_read;
+
+	return load_address;
 }
 
 #if !defined(CONFIG_SPL_BUILD)
diff --git a/include/common.h b/include/common.h
index a53559a3e5..911a6786bf 100644
--- a/include/common.h
+++ b/include/common.h
@@ -664,6 +664,7 @@ int gzwrite(unsigned char *src, int len,
 	    u64 szexpected);
 
 /* lib/lz4_wrapper.c */
+bool lz4_is_valid_header(const unsigned char *h);
 int ulz4fn(const void *src, size_t srcn, void *dst, size_t *dstn);
 
 /* lib/qsort.c */
diff --git a/include/image.h b/include/image.h
index 29fdf9c13b..d8892114e7 100644
--- a/include/image.h
+++ b/include/image.h
@@ -290,6 +290,7 @@ enum {
 	IH_COMP_LZMA,			/* lzma  Compression Used	*/
 	IH_COMP_LZO,			/* lzo   Compression Used	*/
 	IH_COMP_LZ4,			/* lz4   Compression Used	*/
+	IH_COMP_ZIMAGE,			/* zImage Decompressed itself   */
 
 	IH_COMP_COUNT,
 };
@@ -1263,23 +1264,25 @@ int android_image_get_ramdisk(const struct andr_img_hdr *hdr,
 			      ulong *rd_data, ulong *rd_len);
 int android_image_get_fdt(const struct andr_img_hdr *hdr,
 			      ulong *rd_data);
+u32 android_image_get_comp(const struct andr_img_hdr *hdr);
 ulong android_image_get_end(const struct andr_img_hdr *hdr);
 ulong android_image_get_kload(const struct andr_img_hdr *hdr);
 void android_print_contents(const struct andr_img_hdr *hdr);
 
 /** android_image_load - Load an Android Image from storage.
  *
- * Load an Android Image based on the header size in the storage. Return the
- * number of bytes read from storage, which could be bigger than the actual
- * Android Image as described in the header size. In case of error reading the
- * image or if the image size needed to be read from disk is bigger than the
- * the passed |max_size| a negative number is returned.
+ * Load an Android Image based on the header size in the storage.
+ * Return the final load address, which could be a different address
+ * of argument load_address, if the Kernel Image is compressed. In case
+ * of error reading the image or if the image size needed to be read
+ * from disk is bigger than the passed |max_size| a negative number
+ * is returned.
  *
  * @dev_desc:		The device where to read the image from
  * @part_info:		The partition in |dev_desc| where to read the image from
  * @load_address:	The address where the image will be loaded
  * @max_size:		The maximum loaded size, in bytes
- * @return the number of bytes read or a negative number in case of error.
+ * @return the final load address or a negative number in case of error.
  */
 long android_image_load(struct blk_desc *dev_desc,
 			const disk_partition_t *part_info,
@@ -1288,6 +1291,8 @@ long android_image_load(struct blk_desc *dev_desc,
 
 #endif /* CONFIG_ANDROID_BOOT_IMAGE */
 
+int bootm_parse_comp(const unsigned char *hdr);
+
 /**
  * board_fit_config_name_match() - Check for a matching board name
  *
diff --git a/lib/lz4_wrapper.c b/lib/lz4_wrapper.c
index 6dc8b764b3..eb29c01d24 100644
--- a/lib/lz4_wrapper.c
+++ b/lib/lz4_wrapper.c
@@ -63,6 +63,20 @@ struct lz4_block_header {
 	/* + u32 block_checksum iff has_block_checksum is set */
 } __packed;
 
+bool lz4_is_valid_header(const unsigned char *h)
+{
+	const struct lz4_frame_header *hdr  = (const struct lz4_frame_header *)h;
+	/* We assume there's always only a single, standard frame. */
+	if (le32_to_cpu(hdr->magic) != LZ4F_MAGIC || hdr->version != 1)
+		return false;        /* unknown format */
+	if (hdr->reserved0 || hdr->reserved1 || hdr->reserved2)
+		return false; /* reserved must be zero */
+	if (!hdr->independent_blocks)
+		return false; /* we can't support this yet */
+
+	return true;
+}
+
 int ulz4fn(const void *src, size_t srcn, void *dst, size_t *dstn)
 {
 	const void *end = dst + *dstn;

commit d5d77aebb0bdba422a93787b85c520b1c9aa7500
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Fri Jul 6 10:16:48 2018 +0800

    lib: optee_client: modify macro in Kconfig
    
    CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION is support
    for OPTEE_V1
    
    Change-Id: Ic83d06a08a1d409905dcc61e0f7346ab23261b0c
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/Kconfig b/lib/optee_clientApi/Kconfig
index c0e5565ddc..2e61c40bf8 100644
--- a/lib/optee_clientApi/Kconfig
+++ b/lib/optee_clientApi/Kconfig
@@ -23,8 +23,7 @@ config OPTEE_V2
 	  step.
 
 config OPTEE_ALWAYS_USE_SECURITY_PARTITION
-	bool "Support use emmc security partition for OPTEE version 2.0"
-	depends on OPTEE_V2
+	bool "Support use emmc security partition for OPTEE"
 	help
 	  U-boot can secure store data to security partition
 	  for nand or emmc, do not to store data to rpmb.

commit 0d2d4c06b32c4e44ed0f308ca818b07ce1b4b846
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Thu Jul 12 23:28:16 2018 +0800

    drivers: rkflash: Fully remove caching last few sectors in ftl_write.
    
    1.Remove cashe write
    2.Remark power off lost page
    
    Change-Id: I6cdeb0f5b2d40e1c00d4cdd7f2260bf869c0e7a8
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/rk_sftl_arm_v7.S b/drivers/rkflash/rk_sftl_arm_v7.S
index 466f5ff3fa..722a608011 100644
--- a/drivers/rkflash/rk_sftl_arm_v7.S
+++ b/drivers/rkflash/rk_sftl_arm_v7.S
@@ -1,8 +1,8 @@
 /*
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
- * SPDX-License-Identifier:    GPL-2.0
- * date: 2018-07-04
+ * SPDX-License-Identifier:	GPL-2.0
+ * date: 2018-07-13
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -107,23 +107,23 @@ l2p_addr_tran.isra.0:
 	.cfi_endproc
 .LFE352:
 	.size	l2p_addr_tran.isra.0, .-l2p_addr_tran.isra.0
-	.section	.text.ftl_set_blk_mode.part.7,"ax",%progbits
+	.section	.text.ftl_set_blk_mode.part.6,"ax",%progbits
 	.align	1
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_set_blk_mode.part.7, %function
-ftl_set_blk_mode.part.7:
-.LFB359:
+	.type	ftl_set_blk_mode.part.6, %function
+ftl_set_blk_mode.part.6:
+.LFB358:
 	.file 2 "drivers/rkflash/rksftl/sftl_sys.c"
-	.loc 2 1346 0
+	.loc 2 1395 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 .LVL12:
-	.loc 2 1349 0
+	.loc 2 1398 0
 	ldr	r3, .L6
 	lsrs	r1, r0, #5
 	and	r0, r0, #31
@@ -140,8 +140,8 @@ ftl_set_blk_mode.part.7:
 .L6:
 	.word	.LANCHOR1
 	.cfi_endproc
-.LFE359:
-	.size	ftl_set_blk_mode.part.7, .-ftl_set_blk_mode.part.7
+.LFE358:
+	.size	ftl_set_blk_mode.part.6, .-ftl_set_blk_mode.part.6
 	.section	.text.Ftl_log2,"ax",%progbits
 	.align	1
 	.global	Ftl_log2
@@ -197,7 +197,7 @@ Ftl_log2:
 	.type	FtlPrintInfo, %function
 FtlPrintInfo:
 .LFB206:
-	.loc 3 159 0
+	.loc 3 160 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
@@ -217,43 +217,43 @@ FtlPrintInfo:
 	.type	FtlSysBlkNumInit, %function
 FtlSysBlkNumInit:
 .LFB207:
-	.loc 3 165 0
+	.loc 3 166 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 .LVL22:
-	.loc 3 168 0
+	.loc 3 169 0
 	ldr	r3, .L13
 	cmp	r0, #24
 	it	cc
 	movcc	r0, #24
 .LVL23:
-	.loc 3 169 0
+	.loc 3 170 0
 	ldr	r2, .L13+4
-	.loc 3 168 0
-	str	r0, [r3]
 	.loc 3 169 0
+	str	r0, [r3]
+	.loc 3 170 0
 	ldr	r3, .L13+8
 	ldrh	r3, [r3]
 	muls	r3, r0, r3
 	str	r3, [r2]
-	.loc 3 170 0
+	.loc 3 171 0
 	ldr	r2, .L13+12
 	ldrh	r2, [r2]
 	subs	r0, r2, r0
 .LVL24:
 	ldr	r2, .L13+16
 	strh	r0, [r2]	@ movhi
-	.loc 3 174 0
+	.loc 3 175 0
 	movs	r0, #0
-	.loc 3 171 0
+	.loc 3 172 0
 	ldr	r2, .L13+20
 	ldr	r2, [r2]
 	subs	r3, r2, r3
 	ldr	r2, .L13+24
 	str	r3, [r2]
-	.loc 3 174 0
+	.loc 3 175 0
 	bx	lr
 .L14:
 	.align	2
@@ -279,15 +279,15 @@ FtlSysBlkNumInit:
 	.type	FtlConstantsInit, %function
 FtlConstantsInit:
 .LFB208:
-	.loc 3 183 0
+	.loc 3 184 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 .LVL25:
-	.loc 3 188 0
+	.loc 3 189 0
 	ldrh	r1, [r0]
 	ldr	r2, .L25
-	.loc 3 183 0
+	.loc 3 184 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
 	.cfi_offset 4, -32
@@ -298,219 +298,219 @@ FtlConstantsInit:
 	.cfi_offset 10, -12
 	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	.loc 3 183 0
+	.loc 3 184 0
 	mov	r7, r0
-	.loc 3 189 0
+	.loc 3 190 0
 	ldrh	r5, [r0, #2]
-	.loc 3 188 0
-	strh	r1, [r2]	@ movhi
 	.loc 3 189 0
-	ldr	r2, .L25+4
+	strh	r1, [r2]	@ movhi
 	.loc 3 190 0
+	ldr	r2, .L25+4
+	.loc 3 191 0
 	ldrh	r0, [r0, #4]
 .LVL26:
-	.loc 3 189 0
-	strh	r5, [r2]	@ movhi
 	.loc 3 190 0
+	strh	r5, [r2]	@ movhi
+	.loc 3 191 0
 	ldr	r2, .L25+8
 	strh	r0, [r2]	@ movhi
-	.loc 3 191 0
+	.loc 3 192 0
 	ldrh	r2, [r7, #14]
 	cmp	r2, #4
 	bne	.L16
-	.loc 3 192 0
+	.loc 3 193 0
 	ldrh	r2, [r7, #6]
 	ldr	r4, .L25+12
 	lsrs	r2, r2, #1
 	strh	r2, [r4]	@ movhi
-	.loc 3 193 0
+	.loc 3 194 0
 	movs	r4, #8
 	ldr	r2, .L25+16
 	strh	r4, [r2]	@ movhi
 .L16:
-	.loc 3 197 0 discriminator 3
+	.loc 3 198 0 discriminator 3
 	ldr	r4, .L25+20
-	.loc 3 183 0 discriminator 3
+	.loc 3 184 0 discriminator 3
 	movs	r2, #0
 .L17:
 .LVL27:
-	.loc 3 197 0 discriminator 3
+	.loc 3 198 0 discriminator 3
 	strb	r2, [r2, r4]
-	.loc 3 196 0 discriminator 3
+	.loc 3 197 0 discriminator 3
 	adds	r2, r2, #1
 .LVL28:
 	cmp	r2, #32
 	bne	.L17
-	.loc 3 198 0
+	.loc 3 199 0
 	ldr	r2, .L25+24
 .LVL29:
-	.loc 3 200 0
+	.loc 3 201 0
 	cmp	r1, #1
-	.loc 3 198 0
+	.loc 3 199 0
 	mov	r4, #5
-	.loc 3 204 0
+	.loc 3 205 0
 	smulbb	r5, r5, r0
-	.loc 3 199 0
+	.loc 3 200 0
 	mov	r6, #0
-	.loc 3 198 0
+	.loc 3 199 0
 	strh	r4, [r2]	@ movhi
-	.loc 3 201 0
+	.loc 3 202 0
 	it	eq
 	strheq	r1, [r2]	@ movhi
-	.loc 3 202 0
+	.loc 3 203 0
 	mov	r1, #640
 	ldr	r2, .L25+28
-	.loc 3 204 0
+	.loc 3 205 0
 	uxth	r5, r5
-	.loc 3 199 0
+	.loc 3 200 0
 	ldr	r4, .L25+32
-	.loc 3 202 0
+	.loc 3 203 0
 	strh	r1, [r2]	@ movhi
-	.loc 3 204 0
+	.loc 3 205 0
 	ldr	r2, .L25+36
-	.loc 3 199 0
+	.loc 3 200 0
 	strh	r6, [r4]	@ movhi
-	.loc 3 210 0
+	.loc 3 211 0
 	ldr	r6, .L25+40
-	.loc 3 204 0
-	strh	r5, [r2]	@ movhi
 	.loc 3 205 0
+	strh	r5, [r2]	@ movhi
+	.loc 3 206 0
 	ldr	r2, .L25+12
 	ldrh	r4, [r2]
 	ldr	r2, .L25+44
 	smulbb	r0, r0, r4
 	uxth	r0, r0
 	strh	r0, [r2]	@ movhi
-	.loc 3 206 0
+	.loc 3 207 0
 	bl	Ftl_log2
 .LVL30:
 	ldr	r2, .L25+48
-	.loc 3 207 0
+	.loc 3 208 0
 	ldrh	r8, [r7, #12]
 	ldr	r3, .L25+52
-	.loc 3 206 0
+	.loc 3 207 0
 	strh	r0, [r2]	@ movhi
-	.loc 3 208 0
-	ldr	r2, .L25+56
 	.loc 3 209 0
+	ldr	r2, .L25+56
+	.loc 3 210 0
 	smulbb	r1, r5, r8
-	.loc 3 207 0
-	strh	r8, [r3]	@ movhi
 	.loc 3 208 0
-	strh	r8, [r2]	@ movhi
+	strh	r8, [r3]	@ movhi
 	.loc 3 209 0
+	strh	r8, [r2]	@ movhi
+	.loc 3 210 0
 	ldr	r2, .L25+60
 	strh	r1, [r2]	@ movhi
-	.loc 3 210 0
+	.loc 3 211 0
 	ldr	r2, .L25+16
 	ldrh	fp, [r2]
 	mov	r0, fp
 	bl	Ftl_log2
 .LVL31:
-	.loc 3 212 0
+	.loc 3 213 0
 	lsl	r2, fp, #9
 	ldr	r1, .L25+64
-	.loc 3 214 0
+	.loc 3 215 0
 	ldr	r3, .L25+68
-	.loc 3 210 0
+	.loc 3 211 0
 	mov	r10, r0
-	.loc 3 212 0
+	.loc 3 213 0
 	uxth	r2, r2
-	.loc 3 210 0
+	.loc 3 211 0
 	strh	r0, [r6]	@ movhi
-	.loc 3 218 0
+	.loc 3 219 0
 	mov	r0, #5120
-	.loc 3 212 0
-	strh	r2, [r1]	@ movhi
 	.loc 3 213 0
+	strh	r2, [r1]	@ movhi
+	.loc 3 214 0
 	lsrs	r2, r2, #8
 	ldr	r1, .L25+72
 	strh	r2, [r1]	@ movhi
-	.loc 3 218 0
+	.loc 3 219 0
 	mul	r1, r8, fp
-	.loc 3 214 0
+	.loc 3 215 0
 	ldrh	r2, [r7, #20]
 	ldr	r7, .L25+52
 .LVL32:
 	strh	r2, [r3]	@ movhi
-	.loc 3 216 0
+	.loc 3 217 0
 	mul	r3, r4, r5
 	ldr	r2, .L25+76
-	.loc 3 223 0
+	.loc 3 224 0
 	lsls	r4, r4, #6
-	.loc 3 216 0
-	str	r3, [r2]
 	.loc 3 217 0
+	str	r3, [r2]
+	.loc 3 218 0
 	mul	r3, fp, r3
 	ldr	r2, .L25+80
 	mul	r3, r8, r3
 	ldr	r8, .L25+116
 	asrs	r3, r3, #11
 	str	r3, [r2]
-	.loc 3 218 0
+	.loc 3 219 0
 	bl	__aeabi_idiv
 .LVL33:
 	uxth	r0, r0
-	.loc 3 221 0
+	.loc 3 222 0
 	ldr	r2, .L25+84
-	.loc 3 226 0
+	.loc 3 227 0
 	mov	r1, r5
-	.loc 3 219 0
-	cmp	r0, #4
 	.loc 3 220 0
+	cmp	r0, #4
+	.loc 3 221 0
 	itet	ls
 	movls	r3, #4
-	.loc 3 218 0
+	.loc 3 219 0
 	strhhi	r0, [r8]	@ movhi
-	.loc 3 220 0
-	strhls	r3, [r8]	@ movhi
 	.loc 3 221 0
+	strhls	r3, [r8]	@ movhi
+	.loc 3 222 0
 	mov	r3, #640
 	asr	r3, r3, r10
-	.loc 3 223 0
+	.loc 3 224 0
 	add	r10, r10, #9
 	asr	r4, r4, r10
-	.loc 3 224 0
+	.loc 3 225 0
 	ldr	r10, .L25+120
-	.loc 3 221 0
+	.loc 3 222 0
 	adds	r3, r3, #2
-	.loc 3 226 0
+	.loc 3 227 0
 	ldrh	r0, [r8]
-	.loc 3 221 0
+	.loc 3 222 0
 	strh	r3, [r2]	@ movhi
-	.loc 3 223 0
+	.loc 3 224 0
 	ldr	r3, .L25+88
 	strh	r4, [r3]	@ movhi
 	uxth	r4, r4
-	.loc 3 224 0
+	.loc 3 225 0
 	mul	r3, r5, r4
-	.loc 3 226 0
+	.loc 3 227 0
 	adds	r4, r4, #8
-	.loc 3 224 0
+	.loc 3 225 0
 	str	r3, [r10]
-	.loc 3 226 0
+	.loc 3 227 0
 	bl	__aeabi_uidiv
 .LVL34:
 	uxtah	r0, r4, r0
 	ldr	r4, .L25+92
-	.loc 3 227 0
-	cmp	r5, #1
 	.loc 3 228 0
+	cmp	r5, #1
+	.loc 3 229 0
 	it	eq
 	addeq	r0, r0, #4
 	str	r0, [r4]
-	.loc 3 231 0
+	.loc 3 232 0
 	ldrh	r0, [r4]
 	bl	FtlSysBlkNumInit
 .LVL35:
-	.loc 3 232 0
+	.loc 3 233 0
 	ldr	r2, [r4]
-	.loc 3 236 0
+	.loc 3 237 0
 	movs	r0, #0
-	.loc 3 232 0
+	.loc 3 233 0
 	ldr	r3, .L25+96
 	str	r2, [r3]
-	.loc 3 234 0
+	.loc 3 235 0
 	ldr	r3, .L25+100
 	ldr	r2, [r3]
 	ldrh	r3, [r7]
@@ -522,22 +522,22 @@ FtlConstantsInit:
 	ldr	r2, .L25+104
 	adds	r3, r3, #2
 	strh	r3, [r2]	@ movhi
-	.loc 3 235 0
+	.loc 3 236 0
 	movs	r2, #32
 	ldr	r3, .L25+108
 	strh	r2, [r3]	@ movhi
-	.loc 3 236 0
+	.loc 3 237 0
 	ldr	r3, .L25+112
 	str	r0, [r3]
-	.loc 3 237 0
+	.loc 3 238 0
 	ldrh	r3, [r8]
 	adds	r3, r3, #3
 	strh	r3, [r8]	@ movhi
-	.loc 3 238 0
+	.loc 3 239 0
 	ldr	r3, [r10]
 	adds	r3, r3, #3
 	str	r3, [r10]
-	.loc 3 263 0
+	.loc 3 264 0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
 .L26:
 	.align	2
@@ -596,8 +596,8 @@ IsBlkInVendorPart:
 	ldr	r3, .L34
 	ldrh	r3, [r3]
 	cbz	r3, .L33
-.LBB166:
-.LBB167:
+.LBB185:
+.LBB186:
 	.loc 3 519 0
 	ldr	r3, .L34+4
 	.loc 3 518 0
@@ -611,16 +611,16 @@ IsBlkInVendorPart:
 	cmp	r3, r2
 	bne	.L30
 .L33:
-.LBE167:
-.LBE166:
+.LBE186:
+.LBE185:
 	.loc 3 524 0
 	movs	r0, #0
 .LVL37:
 	bx	lr
 .LVL38:
 .L30:
-.LBB169:
-.LBB168:
+.LBB188:
+.LBB187:
 	.loc 3 519 0
 	ldrh	r1, [r3], #2
 	cmp	r0, r1
@@ -628,8 +628,8 @@ IsBlkInVendorPart:
 	.loc 3 520 0
 	movs	r0, #1
 .LVL39:
-.LBE168:
-.LBE169:
+.LBE187:
+.LBE188:
 	.loc 3 525 0
 	bx	lr
 .L35:
@@ -641,6 +641,27 @@ IsBlkInVendorPart:
 	.cfi_endproc
 .LFE211:
 	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
+	.section	.text.FtlCacheWriteBack,"ax",%progbits
+	.align	1
+	.global	FtlCacheWriteBack
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlCacheWriteBack, %function
+FtlCacheWriteBack:
+.LFB219:
+	.loc 3 952 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	.loc 3 954 0
+	movs	r0, #0
+	bx	lr
+	.cfi_endproc
+.LFE219:
+	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
 	.section	.text.sftl_get_density,"ax",%progbits
 	.align	1
 	.global	sftl_get_density
@@ -651,18 +672,18 @@ IsBlkInVendorPart:
 	.type	sftl_get_density, %function
 sftl_get_density:
 .LFB224:
-	.loc 3 1214 0
+	.loc 3 1178 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	.loc 3 1216 0
-	ldr	r3, .L37
+	.loc 3 1180 0
+	ldr	r3, .L38
 	ldr	r0, [r3]
 	bx	lr
-.L38:
+.L39:
 	.align	2
-.L37:
+.L38:
 	.word	.LANCHOR34
 	.cfi_endproc
 .LFE224:
@@ -685,7 +706,7 @@ FtlBbmMapBadBlock:
 	@ frame_needed = 0, uses_anonymous_args = 0
 .LVL40:
 	.loc 4 10 0
-	ldr	r3, .L40
+	ldr	r3, .L41
 	.loc 4 5 0
 	push	{r0, r1, r2, r4, r5, r6, r7, lr}
 	.cfi_def_cfa_offset 32
@@ -703,7 +724,7 @@ FtlBbmMapBadBlock:
 .LVL41:
 	mov	r1, r4
 	.loc 4 13 0
-	ldr	r4, .L40+4
+	ldr	r4, .L41+4
 	.loc 4 10 0
 	uxth	r6, r0
 .LVL42:
@@ -727,7 +748,7 @@ FtlBbmMapBadBlock:
 	mov	r2, r6
 	str	r0, [sp]
 	mov	r1, r5
-	ldr	r0, .L40+8
+	ldr	r0, .L41+8
 	bl	printf
 .LVL45:
 	.loc 4 17 0
@@ -743,9 +764,9 @@ FtlBbmMapBadBlock:
 	@ sp needed
 	pop	{r4, r5, r6, r7, pc}
 .LVL46:
-.L41:
+.L42:
 	.align	2
-.L40:
+.L41:
 	.word	.LANCHOR17
 	.word	.LANCHOR37
 	.word	.LC0
@@ -768,7 +789,7 @@ FtlBbmIsBadBlock:
 	@ frame_needed = 0, uses_anonymous_args = 0
 .LVL47:
 	.loc 4 30 0
-	ldr	r3, .L43
+	ldr	r3, .L44
 	.loc 4 24 0
 	push	{r4, r5, r6, lr}
 	.cfi_def_cfa_offset 16
@@ -795,7 +816,7 @@ FtlBbmIsBadBlock:
 	bl	__aeabi_uidiv
 .LVL51:
 	.loc 4 33 0
-	ldr	r3, .L43+4
+	ldr	r3, .L44+4
 	.loc 4 30 0
 	uxth	r0, r0
 	.loc 4 34 0
@@ -812,9 +833,9 @@ FtlBbmIsBadBlock:
 	and	r0, r0, #1
 	pop	{r4, r5, r6, pc}
 .LVL53:
-.L44:
+.L45:
 	.align	2
-.L43:
+.L44:
 	.word	.LANCHOR17
 	.word	.LANCHOR37
 	.cfi_endproc
@@ -855,8 +876,8 @@ FtlBbtCalcTotleCnt:
 	@ frame_needed = 0, uses_anonymous_args = 0
 .LVL54:
 	.loc 4 160 0
-	ldr	r3, .L53
-	ldr	r2, .L53+4
+	ldr	r3, .L54
+	ldr	r2, .L54+4
 	.loc 4 157 0
 	push	{r4, r5, r6, lr}
 	.cfi_def_cfa_offset 16
@@ -873,34 +894,34 @@ FtlBbtCalcTotleCnt:
 	ldrh	r6, [r2]
 	muls	r6, r3, r6
 .LVL55:
-.L47:
+.L48:
 	uxth	r0, r5
 .LVL56:
 	.loc 4 160 0 is_stmt 0 discriminator 1
 	cmp	r0, r6
-	blt	.L49
+	blt	.L50
 	.loc 4 169 0 is_stmt 1
 	mov	r0, r4
 .LVL57:
 	pop	{r4, r5, r6, pc}
 .LVL58:
-.L49:
+.L50:
 	.loc 4 162 0
 	bl	FtlBbmIsBadBlock
 .LVL59:
-	cbz	r0, .L48
+	cbz	r0, .L49
 	.loc 4 164 0
 	adds	r4, r4, #1
 .LVL60:
 	uxth	r4, r4
 .LVL61:
-.L48:
+.L49:
 	adds	r5, r5, #1
 .LVL62:
-	b	.L47
-.L54:
+	b	.L48
+.L55:
 	.align	2
-.L53:
+.L54:
 	.word	.LANCHOR17
 	.word	.LANCHOR10
 	.cfi_endproc
@@ -932,7 +953,7 @@ V2P_block:
 	.loc 2 5 0
 	mov	r5, r1
 	.loc 2 8 0
-	ldr	r3, .L56
+	ldr	r3, .L57
 	.loc 2 5 0
 	mov	r7, r0
 	.loc 2 8 0
@@ -942,7 +963,7 @@ V2P_block:
 .LVL65:
 	bl	__aeabi_uidiv
 .LVL66:
-	ldr	r3, .L56+4
+	ldr	r3, .L57+4
 	smulbb	r5, r6, r5
 	mov	r1, r6
 	ldrh	r4, [r3]
@@ -955,9 +976,9 @@ V2P_block:
 	.loc 2 10 0
 	uxth	r0, r0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L57:
+.L58:
 	.align	2
-.L56:
+.L57:
 	.word	.LANCHOR11
 	.word	.LANCHOR17
 	.cfi_endproc
@@ -979,7 +1000,7 @@ P2V_plane:
 	@ frame_needed = 0, uses_anonymous_args = 0
 .LVL68:
 	.loc 2 16 0
-	ldr	r3, .L59
+	ldr	r3, .L60
 	.loc 2 13 0
 	push	{r4, r5, r6, lr}
 	.cfi_def_cfa_offset 16
@@ -992,7 +1013,7 @@ P2V_plane:
 	.loc 2 16 0
 	ldrh	r5, [r3]
 .LVL69:
-	ldr	r3, .L59+4
+	ldr	r3, .L60+4
 	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
 .LVL70:
@@ -1005,9 +1026,9 @@ P2V_plane:
 	.loc 2 18 0
 	uxth	r0, r1
 	pop	{r4, r5, r6, pc}
-.L60:
+.L61:
 	.align	2
-.L59:
+.L60:
 	.word	.LANCHOR11
 	.word	.LANCHOR17
 	.cfi_endproc
@@ -1033,12 +1054,12 @@ P2V_block_in_plane:
 	.cfi_offset 3, -8
 	.cfi_offset 14, -4
 	.loc 2 24 0
-	ldr	r3, .L62
+	ldr	r3, .L63
 	ldrh	r1, [r3]
 	bl	__aeabi_uidivmod
 .LVL73:
 	.loc 2 25 0
-	ldr	r3, .L62+4
+	ldr	r3, .L63+4
 	.loc 2 24 0
 	uxth	r0, r1
 .LVL74:
@@ -1049,9 +1070,9 @@ P2V_block_in_plane:
 	.loc 2 27 0
 	uxth	r0, r0
 	pop	{r3, pc}
-.L63:
+.L64:
 	.align	2
-.L62:
+.L63:
 	.word	.LANCHOR17
 	.word	.LANCHOR11
 	.cfi_endproc
@@ -1075,7 +1096,7 @@ ftl_cmp_data_ver:
 .LVL76:
 	.loc 2 34 0
 	cmp	r0, r1
-	bls	.L65
+	bls	.L66
 	.loc 2 36 0
 	subs	r0, r0, r1
 .LVL77:
@@ -1085,7 +1106,7 @@ ftl_cmp_data_ver:
 	movls	r0, #1
 	bx	lr
 .LVL78:
-.L65:
+.L66:
 	.loc 2 40 0
 	subs	r0, r1, r0
 .LVL79:
@@ -1115,15 +1136,15 @@ FtlFreeSysBlkQueueEmpty:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	.loc 2 89 0
-	ldr	r3, .L68
+	ldr	r3, .L69
 	ldrh	r0, [r3, #6]
 	.loc 2 90 0
 	clz	r0, r0
 	lsrs	r0, r0, #5
 	bx	lr
-.L69:
+.L70:
 	.align	2
-.L68:
+.L69:
 	.word	.LANCHOR38
 	.cfi_endproc
 .LFE241:
@@ -1144,16 +1165,16 @@ FtlFreeSysBlkQueueFull:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	.loc 2 94 0
-	ldr	r3, .L71
+	ldr	r3, .L72
 	ldrh	r0, [r3, #6]
 	.loc 2 95 0
 	sub	r3, r0, #1024
 	rsbs	r0, r3, #0
 	adcs	r0, r0, r3
 	bx	lr
-.L72:
+.L73:
 	.align	2
-.L71:
+.L72:
 	.word	.LANCHOR38
 	.cfi_endproc
 .LFE242:
@@ -1168,137 +1189,73 @@ FtlFreeSysBlkQueueFull:
 	.type	FtlFreeSysBLkSort, %function
 FtlFreeSysBLkSort:
 .LFB244:
-	.loc 2 116 0
+	.loc 2 118 0
 	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 8
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 .LVL81:
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
 	.loc 2 123 0
-	ldr	r4, .L82
-	.loc 2 125 0
-	ldr	r3, .L82+4
-	.loc 2 124 0
-	ldrh	r7, [r4, #2]
+	ldr	r3, .L83
+	.loc 2 118 0
+	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
 	.loc 2 123 0
-	ldrh	r6, [r4, #6]
-	.loc 2 125 0
-	ldr	r5, [r3]
-	ldr	r3, .L82+8
-	add	r8, r4, r7, lsl #1
-	mov	r10, r5
-	ldr	r3, [r3]
-	add	fp, r5, r6, lsl #2
-	add	r8, r8, #6
-.LVL82:
-.L74:
-	.loc 2 123 0 discriminator 1
-	cmp	r10, fp
-	bne	.L75
-	movs	r3, #0
-	.loc 2 128 0
-	add	lr, r6, #-1
+	ldrh	r2, [r3, #6]
+	cbz	r2, .L74
+	.loc 2 119 0
+	ldr	r2, .L83+4
+	movs	r6, #0
+	ldrh	r1, [r3, #2]
+	mov	r5, r6
+	ldrh	r4, [r2, #28]
+	ldrh	r2, [r3, #4]
+	and	r4, r4, #31
 .L76:
+.LVL82:
+	.loc 2 124 0 discriminator 1
+	uxth	r0, r6
+	adds	r6, r6, #1
 .LVL83:
-	.loc 2 128 0 is_stmt 0 discriminator 1
-	cmp	r3, lr
-	blt	.L81
-	.loc 2 144 0 is_stmt 1
-	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+	cmp	r4, r0
+	bgt	.L77
+	cbz	r5, .L74
+	strh	r1, [r3, #2]	@ movhi
+	strh	r2, [r3, #4]	@ movhi
 .LVL84:
-.L75:
-	.cfi_restore_state
-	.loc 2 124 0 discriminator 3
-	ldrh	r0, [r8, #2]!
-	str	r3, [sp, #4]
-	bl	P2V_block_in_plane
+.L74:
+	pop	{r4, r5, r6, pc}
 .LVL85:
+.L77:
 	.loc 2 125 0 discriminator 3
-	ldr	r3, [sp, #4]
-	ldrh	r2, [r3, r0, lsl #1]
-	str	r2, [r10], #4
-	b	.L74
+	adds	r0, r1, #4
 .LVL86:
-.L81:
-	.loc 2 130 0
-	add	ip, r3, #1
-	mov	r2, r3
-	uxth	ip, ip
+	.loc 2 126 0 discriminator 3
+	adds	r1, r1, #1
+	.loc 2 125 0 discriminator 3
+	ldrh	r5, [r3, r0, lsl #1]
 .LVL87:
-	mov	r8, ip
+	.loc 2 127 0 discriminator 3
+	adds	r0, r2, #4
+	.loc 2 126 0 discriminator 3
+	ubfx	r1, r1, #0, #10
+	.loc 2 127 0 discriminator 3
+	strh	r5, [r3, r0, lsl #1]	@ movhi
 .LVL88:
-.L77:
-	.loc 2 130 0 is_stmt 0 discriminator 1
-	cmp	r8, r6
-	bcc	.L79
-	.loc 2 134 0 is_stmt 1
-	cmp	r3, r2
-	beq	.L80
-	.loc 2 135 0
-	ldr	r0, [r5, r2, lsl #2]
+	movs	r5, #1
 .LVL89:
-	.loc 2 136 0
-	ldr	r1, [r5, r3, lsl #2]
-	str	r1, [r5, r2, lsl #2]
-	.loc 2 139 0
-	add	r2, r2, r7
-.LVL90:
-	.loc 2 137 0
-	str	r0, [r5, r3, lsl #2]
-	.loc 2 140 0
-	add	r3, r3, r7
-.LVL91:
-	.loc 2 139 0
-	adds	r2, r2, #4
-	.loc 2 140 0
-	adds	r3, r3, #4
-	.loc 2 139 0
-	ldrh	r1, [r4, r2, lsl #1]
-.LVL92:
-	.loc 2 140 0
-	ldrh	r0, [r4, r3, lsl #1]
-.LVL93:
-	strh	r0, [r4, r2, lsl #1]	@ movhi
-	.loc 2 141 0
-	strh	r1, [r4, r3, lsl #1]	@ movhi
-.LVL94:
-.L80:
-	mov	r3, ip
+	.loc 2 128 0 discriminator 3
+	add	r2, r2, r5
+	ubfx	r2, r2, #0, #10
 	b	.L76
-.LVL95:
-.L79:
-	.loc 2 131 0
-	ldr	r1, [r5, r8, lsl #2]
-	ldr	r0, [r5, r2, lsl #2]
-	cmp	r0, r1
-	it	hi
-	movhi	r2, r8
-.LVL96:
-	.loc 2 130 0
-	add	r8, r8, #1
-.LVL97:
-	uxth	r8, r8
-.LVL98:
-	b	.L77
-.L83:
+.L84:
 	.align	2
-.L82:
+.L83:
 	.word	.LANCHOR38
 	.word	.LANCHOR39
-	.word	.LANCHOR40
 	.cfi_endproc
 .LFE244:
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
@@ -1312,130 +1269,72 @@ FtlFreeSysBLkSort:
 	.type	IsInFreeQueue, %function
 IsInFreeQueue:
 .LFB245:
-	.loc 2 147 0
+	.loc 2 163 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL99:
-.LBB170:
-.LBB171:
+.LVL90:
+.LBB189:
+.LBB190:
 	.loc 2 94 0
-	ldr	r3, .L90
-.LBE171:
-.LBE170:
-	.loc 2 147 0
+	ldr	r3, .L91
+.LBE190:
+.LBE189:
+	.loc 2 163 0
 	push	{r4, r5, lr}
 	.cfi_def_cfa_offset 12
 	.cfi_offset 4, -12
 	.cfi_offset 5, -8
 	.cfi_offset 14, -4
-.LBB173:
-.LBB172:
+.LBB192:
+.LBB191:
 	.loc 2 94 0
 	ldrh	r4, [r3, #6]
-.LBE172:
-.LBE173:
-	.loc 2 152 0
+.LBE191:
+.LBE192:
+	.loc 2 168 0
 	cmp	r4, #1024
-	beq	.L88
-	.loc 2 155 0
+	beq	.L89
+	.loc 2 171 0
 	ldrh	r5, [r3, #2]
 	movs	r1, #0
-.L86:
-.LVL100:
-	.loc 2 154 0 discriminator 1
+.L87:
+.LVL91:
+	.loc 2 170 0 discriminator 1
 	cmp	r1, r4
-	bcc	.L87
-.LVL101:
-.L88:
-	.loc 2 148 0
+	bcc	.L88
+.LVL92:
+.L89:
+	.loc 2 164 0
 	movs	r0, #0
-.LVL102:
+.LVL93:
 	pop	{r4, r5, pc}
-.LVL103:
-.L87:
-	.loc 2 155 0
+.LVL94:
+.L88:
+	.loc 2 171 0
 	adds	r2, r1, r5
 	ubfx	r2, r2, #0, #10
 	adds	r2, r2, #4
 	ldrh	r2, [r3, r2, lsl #1]
 	cmp	r2, r0
-	beq	.L89
-	.loc 2 154 0 discriminator 2
+	beq	.L90
+	.loc 2 170 0 discriminator 2
 	adds	r1, r1, #1
-.LVL104:
-	b	.L86
-.L89:
-	.loc 2 156 0
+.LVL95:
+	b	.L87
+.L90:
+	.loc 2 172 0
 	movs	r0, #1
-.LVL105:
-	.loc 2 162 0
+.LVL96:
+	.loc 2 178 0
 	pop	{r4, r5, pc}
-.L91:
+.L92:
 	.align	2
-.L90:
+.L91:
 	.word	.LANCHOR38
 	.cfi_endproc
 .LFE245:
 	.size	IsInFreeQueue, .-IsInFreeQueue
-	.section	.text.FtlFreeSysBlkQueueOut,"ax",%progbits
-	.align	1
-	.global	FtlFreeSysBlkQueueOut
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlFreeSysBlkQueueOut, %function
-FtlFreeSysBlkQueueOut:
-.LFB246:
-	.loc 2 165 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-.LVL106:
-.LBB174:
-.LBB175:
-	.loc 2 89 0
-	ldr	r2, .L95
-	ldrh	r1, [r2, #6]
-.LBE175:
-.LBE174:
-	.loc 2 168 0
-	cbz	r1, .L94
-.LVL107:
-.LBB176:
-	.loc 2 170 0
-	ldrh	r3, [r2, #2]
-	.loc 2 171 0
-	subs	r1, r1, #1
-	strh	r1, [r2, #6]	@ movhi
-	.loc 2 170 0
-	adds	r0, r3, #4
-	.loc 2 172 0
-	adds	r3, r3, #1
-	ubfx	r3, r3, #0, #10
-	.loc 2 170 0
-	ldrh	r0, [r2, r0, lsl #1]
-.LVL108:
-	.loc 2 172 0
-	strh	r3, [r2, #2]	@ movhi
-	bx	lr
-.LVL109:
-.L94:
-.LBE176:
-	.loc 2 166 0
-	movw	r0, #65535
-.LVL110:
-	.loc 2 176 0
-	bx	lr
-.L96:
-	.align	2
-.L95:
-	.word	.LANCHOR38
-	.cfi_endproc
-.LFE246:
-	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
 	.section	.text.insert_data_list,"ax",%progbits
 	.align	1
 	.global	insert_data_list
@@ -1446,16 +1345,13 @@ FtlFreeSysBlkQueueOut:
 	.type	insert_data_list, %function
 insert_data_list:
 .LFB249:
-	.loc 2 217 0
+	.loc 2 249 0
 	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 8
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL111:
-	.loc 2 225 0
-	movw	r3, #65535
-	.loc 2 217 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
+.LVL97:
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 48
 	.cfi_offset 4, -32
 	.cfi_offset 5, -28
 	.cfi_offset 6, -24
@@ -1464,177 +1360,200 @@ insert_data_list:
 	.cfi_offset 10, -12
 	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	.loc 2 225 0
-	cmp	r0, r3
-	beq	.L98
-	.loc 2 230 0
-	ldr	r2, .L111
+	.loc 2 260 0
+	ldr	r3, .L109
+	ldrh	lr, [r3]
+	cmp	lr, r0
+	bls	.L95
+	.loc 2 265 0
+	ldr	r3, .L109+4
 	movs	r5, #6
-	muls	r5, r0, r5
-	ldr	r4, [r2]
-	adds	r1, r4, r5
-.LVL112:
-	.loc 2 231 0
+	ldr	r4, [r3]
+	mul	r3, r5, r0
+	str	r3, [sp, #4]
+	adds	r1, r4, r3
+.LVL98:
+	.loc 2 266 0
+	ldr	r2, [sp, #4]
+	movw	r3, #65535
 	strh	r3, [r1, #2]	@ movhi
-	strh	r3, [r4, r5]	@ movhi
-	.loc 2 233 0
-	ldr	r3, .L111+4
+	strh	r3, [r4, r2]	@ movhi
+	.loc 2 268 0
+	ldr	r3, .L109+8
 	ldr	ip, [r3]
 	cmp	ip, #0
-	bne	.L99
-.L110:
-	.loc 2 275 0
+	bne	.L96
+.LVL99:
+.L108:
+	.loc 2 317 0
 	str	r1, [r3]
-.LVL113:
-.L98:
-	.loc 2 281 0
+.LVL100:
+.L95:
+	.loc 2 323 0
 	movs	r0, #0
-.LVL114:
-	add	sp, sp, #8
+.LVL101:
+	add	sp, sp, #16
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL115:
-.L99:
+.LVL102:
+.L96:
 	.cfi_restore_state
-	.loc 2 238 0
-	ldr	r3, .L111+8
-	lsls	r7, r0, #1
-	.loc 2 239 0
-	ldrh	r6, [r1, #4]
-	.loc 2 238 0
-	ldr	lr, [r3]
-	ldrh	r3, [lr, r0, lsl #1]
+	.loc 2 273 0
+	ldr	r3, .L109+12
+	lsls	r2, r0, #1
+	ldr	r3, [r3]
+	str	r3, [sp, #8]
+	ldrh	r6, [r3, r0, lsl #1]
+.LVL103:
+	.loc 2 274 0
+	ldrh	r3, [r1, #4]
+.LVL104:
+	.loc 2 275 0
+	cbz	r3, .L106
+	.loc 2 274 0
+	mul	fp, r3, r6
+.L97:
+.LVL105:
+	.loc 2 279 0
+	sub	r3, ip, r4
+	asrs	r6, r3, #1
+.LVL106:
+	ldr	r3, .L109+16
+	muls	r3, r6, r3
+	.loc 2 294 0
+	ldr	r6, .L109+20
+	ldr	r8, [r6]
+	.loc 2 256 0
+	movs	r6, #0
+	.loc 2 279 0
+	uxth	r3, r3
+.LVL107:
+	.loc 2 294 0
+	add	r2, r8, r2
+	str	r2, [sp, #12]
+	mov	r2, ip
+.LVL108:
+.L104:
+	.loc 2 281 0
+	adds	r6, r6, #1
+.LVL109:
+	uxth	r6, r6
+.LVL110:
+	.loc 2 282 0
+	cmp	lr, r6
+	bcc	.L95
+	.loc 2 285 0
+	cmp	r3, r0
+	beq	.L95
+	.loc 2 288 0
+	ldr	r7, [sp, #8]
+	lsl	r10, r3, #1
+	ldrh	r7, [r7, r3, lsl #1]
+	mov	r5, r7
+.LVL111:
+	.loc 2 289 0
+	ldrh	r7, [r2, #4]
+.LVL112:
+	.loc 2 290 0
+	cbz	r7, .L107
+	.loc 2 289 0
+	muls	r7, r5, r7
+.LVL113:
+.L99:
+	.loc 2 293 0
+	cmp	fp, r7
+	bne	.L100
+	.loc 2 294 0
+	ldr	r5, [sp, #12]
+.LVL114:
+	ldrh	r10, [r8, r10]
+	ldrh	r7, [r5]
+.LVL115:
+	cmp	r10, r7
+	bcc	.L102
+.L101:
+	.loc 2 312 0
+	ldr	r5, [sp, #4]
+	.loc 2 315 0
+	cmp	r2, ip
+	.loc 2 312 0
+	strh	r3, [r4, r5]	@ movhi
 .LVL116:
-	.loc 2 240 0
-	cbz	r6, .L108
-	.loc 2 239 0
-	muls	r6, r3, r6
+	.loc 2 313 0
+	ldrh	r3, [r2, #2]
 .LVL117:
-.L100:
-	.loc 2 244 0
-	sub	r2, ip, r4
-	asrs	r3, r2, #1
+	strh	r3, [r1, #2]	@ movhi
+	.loc 2 315 0
+	bne	.L105
+	.loc 2 316 0
+	strh	r0, [r2, #2]	@ movhi
+	.loc 2 317 0
+	ldr	r3, .L109+8
+	b	.L108
 .LVL118:
-	ldr	r2, .L111+12
-	muls	r2, r3, r2
-	.loc 2 252 0
-	ldr	r3, .L111+16
-	ldr	r8, [r3]
-	.loc 2 244 0
-	uxth	r2, r2
+.L106:
+	.loc 2 276 0
+	mov	fp, #-1
+	b	.L97
 .LVL119:
-	.loc 2 252 0
-	add	r3, r8, r7
-	str	r3, [sp, #4]
-	mov	r3, ip
+.L107:
+	.loc 2 291 0
+	mov	r7, #-1
 .LVL120:
-.L106:
-	.loc 2 247 0
-	ldrh	r7, [r3, #4]
-	.loc 2 246 0
-	lsl	r10, r2, #1
-	ldrh	fp, [lr, r2, lsl #1]
+	b	.L99
 .LVL121:
-	.loc 2 248 0
-	cbz	r7, .L109
-	.loc 2 247 0
-	mul	r7, r7, fp
+.L100:
+	.loc 2 298 0
+	bcc	.L101
 .LVL122:
-.L101:
-	.loc 2 251 0
-	cmp	r6, r7
-	bne	.L102
-	.loc 2 252 0
-	ldr	r7, [sp, #4]
+.L102:
+	.loc 2 301 0
+	ldrh	r7, [r2]
+	movw	r5, #65535
+	cmp	r7, r5
+	bne	.L103
+	.loc 2 302 0
+	strh	r3, [r1, #2]	@ movhi
 .LVL123:
-	ldrh	r10, [r8, r10]
-	ldrh	r7, [r7]
-	cmp	r10, r7
-	bcc	.L104
-.L103:
-	.loc 2 270 0
-	strh	r2, [r4, r5]	@ movhi
+	.loc 2 303 0
+	strh	r0, [r2]	@ movhi
+	.loc 2 304 0
+	ldr	r3, .L109+24
 .LVL124:
-	.loc 2 273 0
-	cmp	r3, ip
-	.loc 2 271 0
-	ldrh	r2, [r3, #2]
+	b	.L108
 .LVL125:
-	strh	r2, [r1, #2]	@ movhi
-	.loc 2 273 0
-	bne	.L107
-	.loc 2 274 0
-	strh	r0, [r3, #2]	@ movhi
-	.loc 2 275 0
-	ldr	r3, .L111+4
+.L103:
+	.loc 2 309 0
+	movs	r3, #6
 .LVL126:
-	b	.L110
+	mla	r2, r3, r7, r4
 .LVL127:
-.L108:
-	.loc 2 241 0
-	mov	r6, #-1
+	.loc 2 281 0
+	mov	r3, r7
+	b	.L104
 .LVL128:
-	b	.L100
-.LVL129:
-.L109:
-	.loc 2 249 0
-	mov	r7, #-1
-.LVL130:
-	b	.L101
-.LVL131:
-.L102:
-	.loc 2 256 0
-	bcc	.L103
-.LVL132:
-.L104:
-	.loc 2 259 0
-	ldrh	r7, [r3]
-	movw	r10, #65535
-	cmp	r7, r10
-	bne	.L105
-	.loc 2 260 0
-	strh	r2, [r1, #2]	@ movhi
-.LVL133:
-	.loc 2 261 0
-	strh	r0, [r3]	@ movhi
-	.loc 2 262 0
-	ldr	r3, .L111+20
-.LVL134:
-	b	.L110
-.LVL135:
 .L105:
-	.loc 2 267 0
+	.loc 2 319 0
+	ldrh	r1, [r2, #2]
+.LVL129:
 	movs	r3, #6
-.LVL136:
-	.loc 2 246 0
-	mov	r2, r7
-	.loc 2 267 0
-	mla	r3, r3, r7, r4
-.LVL137:
-	.loc 2 246 0
-	b	.L106
-.LVL138:
-.L107:
-	.loc 2 277 0
-	ldrh	r1, [r3, #2]
-.LVL139:
-	movs	r2, #6
-	muls	r2, r1, r2
-	strh	r0, [r4, r2]	@ movhi
-.LVL140:
-	.loc 2 278 0
-	strh	r0, [r3, #2]	@ movhi
-	b	.L98
-.L112:
+	muls	r3, r1, r3
+	strh	r0, [r4, r3]	@ movhi
+.LVL130:
+	.loc 2 320 0
+	strh	r0, [r2, #2]	@ movhi
+	b	.L95
+.L110:
 	.align	2
-.L111:
+.L109:
+	.word	.LANCHOR5
+	.word	.LANCHOR40
 	.word	.LANCHOR41
 	.word	.LANCHOR42
-	.word	.LANCHOR43
 	.word	-1431655765
-	.word	.LANCHOR40
+	.word	.LANCHOR43
 	.word	.LANCHOR44
 	.cfi_endproc
 .LFE249:
@@ -1649,60 +1568,60 @@ insert_data_list:
 	.type	INSERT_DATA_LIST, %function
 INSERT_DATA_LIST:
 .LFB248:
-	.loc 2 186 0
+	.loc 2 218 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL141:
+.LVL131:
 	push	{r3, lr}
 	.cfi_def_cfa_offset 8
 	.cfi_offset 3, -8
 	.cfi_offset 14, -4
-	.loc 2 187 0
+	.loc 2 219 0
 	bl	insert_data_list
-.LVL142:
-	.loc 2 188 0
-	ldr	r2, .L115
+.LVL132:
+	.loc 2 220 0
+	ldr	r2, .L113
 	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	.loc 2 189 0
-	ldr	r2, .L115+4
+	.loc 2 221 0
+	ldr	r2, .L113+4
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bcs	.L113
-.LVL143:
-.LBB179:
-.LBB180:
-	movs	r2, #189
-	ldr	r1, .L115+8
-	ldr	r0, .L115+12
-.LBE180:
-.LBE179:
-	.loc 2 190 0
+	bcs	.L111
+.LVL133:
+.LBB195:
+.LBB196:
+	movs	r2, #221
+	ldr	r1, .L113+8
+	ldr	r0, .L113+12
+.LBE196:
+.LBE195:
+	.loc 2 222 0
 	pop	{r3, lr}
 	.cfi_remember_state
 	.cfi_restore 14
 	.cfi_restore 3
 	.cfi_def_cfa_offset 0
-.LBB182:
-.LBB181:
-	.loc 2 189 0
+.LBB198:
+.LBB197:
+	.loc 2 221 0
 	b	printf
-.LVL144:
-.L113:
+.LVL134:
+.L111:
 	.cfi_restore_state
 	pop	{r3, pc}
-.L116:
+.L114:
 	.align	2
-.L115:
+.L113:
 	.word	.LANCHOR45
 	.word	.LANCHOR5
 	.word	.LANCHOR46
 	.word	.LC1
-.LBE181:
-.LBE182:
+.LBE197:
+.LBE198:
 	.cfi_endproc
 .LFE248:
 	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
@@ -1716,14 +1635,14 @@ INSERT_DATA_LIST:
 	.type	insert_free_list, %function
 insert_free_list:
 .LFB250:
-	.loc 2 284 0
+	.loc 2 326 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL145:
-	.loc 2 290 0
+.LVL135:
+	.loc 2 332 0
 	movw	r1, #65535
-	.loc 2 284 0
+	.loc 2 326 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
 	.cfi_offset 4, -32
@@ -1734,117 +1653,117 @@ insert_free_list:
 	.cfi_offset 10, -12
 	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	.loc 2 290 0
+	.loc 2 332 0
 	cmp	r0, r1
-	beq	.L118
-	.loc 2 293 0
-	ldr	r3, .L124
+	beq	.L116
+	.loc 2 335 0
+	ldr	r3, .L122
 	mov	r10, #6
 	mul	r7, r10, r0
 	ldr	r4, [r3]
-	.loc 2 296 0
-	ldr	r3, .L124+4
-	.loc 2 293 0
+	.loc 2 338 0
+	ldr	r3, .L122+4
+	.loc 2 335 0
 	adds	r5, r4, r7
-.LVL146:
-	.loc 2 296 0
+.LVL136:
+	.loc 2 338 0
 	ldr	r6, [r3]
 	mov	lr, r3
-	.loc 2 294 0
+	.loc 2 336 0
 	strh	r1, [r5, #2]	@ movhi
 	strh	r1, [r4, r7]	@ movhi
-	.loc 2 296 0
-	cbnz	r6, .L119
-	.loc 2 297 0
+	.loc 2 338 0
+	cbnz	r6, .L117
+	.loc 2 339 0
 	str	r5, [r3]
-.LVL147:
-.L118:
-	.loc 2 330 0
+.LVL137:
+.L116:
+	.loc 2 372 0
 	movs	r0, #0
-.LVL148:
+.LVL138:
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL149:
-.L119:
-	.loc 2 301 0
-	ldr	r3, .L124+8
-	.loc 2 303 0
+.LVL139:
+.L117:
+	.loc 2 343 0
+	ldr	r3, .L122+8
+	.loc 2 345 0
 	subs	r2, r6, r4
-	.loc 2 310 0
+	.loc 2 352 0
 	mov	fp, r1
-	.loc 2 301 0
+	.loc 2 343 0
 	ldr	ip, [r3]
-	.loc 2 303 0
+	.loc 2 345 0
 	asrs	r3, r2, #1
-	ldr	r2, .L124+12
-	.loc 2 301 0
+	ldr	r2, .L122+12
+	.loc 2 343 0
 	ldrh	r8, [ip, r0, lsl #1]
-.LVL150:
-	.loc 2 303 0
+.LVL140:
+	.loc 2 345 0
 	muls	r2, r3, r2
 	mov	r3, r6
 	uxth	r2, r2
-.LVL151:
-.L122:
-	.loc 2 307 0
+.LVL141:
+.L120:
+	.loc 2 349 0
 	ldrh	r1, [ip, r2, lsl #1]
 	cmp	r1, r8
-	bcs	.L120
-	.loc 2 310 0
+	bcs	.L118
+	.loc 2 352 0
 	ldrh	r1, [r3]
 	cmp	r1, fp
-	bne	.L121
-	.loc 2 311 0
+	bne	.L119
+	.loc 2 353 0
 	strh	r2, [r5, #2]	@ movhi
-.LVL152:
-	.loc 2 312 0
+.LVL142:
+	.loc 2 354 0
 	strh	r0, [r3]	@ movhi
-	.loc 2 313 0
-	b	.L118
-.LVL153:
-.L121:
-	.loc 2 316 0
+	.loc 2 355 0
+	b	.L116
+.LVL143:
+.L119:
+	.loc 2 358 0
 	mla	r3, r10, r1, r4
-.LVL154:
-	.loc 2 306 0
+.LVL144:
+	.loc 2 348 0
 	mov	r2, r1
-.LVL155:
-	b	.L122
-.LVL156:
-.L120:
-	.loc 2 319 0
+.LVL145:
+	b	.L120
+.LVL146:
+.L118:
+	.loc 2 361 0
 	ldrh	r1, [r3, #2]
-	.loc 2 322 0
+	.loc 2 364 0
 	cmp	r3, r6
-	.loc 2 319 0
+	.loc 2 361 0
 	strh	r1, [r5, #2]	@ movhi
-.LVL157:
-	.loc 2 326 0
+.LVL147:
+	.loc 2 368 0
 	it	ne
 	ldrhne	r1, [r3, #2]
-	.loc 2 320 0
+	.loc 2 362 0
 	strh	r2, [r4, r7]	@ movhi
-	.loc 2 326 0
+	.loc 2 368 0
 	iteet	ne
 	movne	r2, #6
-.LVL158:
-	.loc 2 323 0
+.LVL148:
+	.loc 2 365 0
 	strheq	r0, [r3, #2]	@ movhi
-	.loc 2 324 0
+	.loc 2 366 0
 	streq	r5, [lr]
-	.loc 2 326 0
+	.loc 2 368 0
 	mulne	r2, r2, r1
 	itt	ne
 	strhne	r0, [r4, r2]	@ movhi
-.LVL159:
-	.loc 2 327 0
+.LVL149:
+	.loc 2 369 0
 	strhne	r0, [r3, #2]	@ movhi
-	b	.L118
-.L125:
+	b	.L116
+.L123:
 	.align	2
-.L124:
-	.word	.LANCHOR41
-	.word	.LANCHOR47
+.L122:
 	.word	.LANCHOR40
+	.word	.LANCHOR47
+	.word	.LANCHOR43
 	.word	-1431655765
 	.cfi_endproc
 .LFE250:
@@ -1859,60 +1778,60 @@ insert_free_list:
 	.type	INSERT_FREE_LIST, %function
 INSERT_FREE_LIST:
 .LFB247:
-	.loc 2 179 0
+	.loc 2 211 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL160:
+.LVL150:
 	push	{r3, lr}
 	.cfi_def_cfa_offset 8
 	.cfi_offset 3, -8
 	.cfi_offset 14, -4
-	.loc 2 180 0
+	.loc 2 212 0
 	bl	insert_free_list
-.LVL161:
-	.loc 2 181 0
-	ldr	r2, .L128
+.LVL151:
+	.loc 2 213 0
+	ldr	r2, .L126
 	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	.loc 2 182 0
-	ldr	r2, .L128+4
+	.loc 2 214 0
+	ldr	r2, .L126+4
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bcs	.L126
-.LVL162:
-.LBB185:
-.LBB186:
-	movs	r2, #182
-	ldr	r1, .L128+8
-	ldr	r0, .L128+12
-.LBE186:
-.LBE185:
-	.loc 2 183 0
+	bcs	.L124
+.LVL152:
+.LBB201:
+.LBB202:
+	movs	r2, #214
+	ldr	r1, .L126+8
+	ldr	r0, .L126+12
+.LBE202:
+.LBE201:
+	.loc 2 215 0
 	pop	{r3, lr}
 	.cfi_remember_state
 	.cfi_restore 14
 	.cfi_restore 3
 	.cfi_def_cfa_offset 0
-.LBB188:
-.LBB187:
-	.loc 2 182 0
+.LBB204:
+.LBB203:
+	.loc 2 214 0
 	b	printf
-.LVL163:
-.L126:
+.LVL153:
+.L124:
 	.cfi_restore_state
 	pop	{r3, pc}
-.L129:
+.L127:
 	.align	2
-.L128:
+.L126:
 	.word	.LANCHOR48
 	.word	.LANCHOR5
 	.word	.LANCHOR49
 	.word	.LC1
-.LBE187:
-.LBE188:
+.LBE203:
+.LBE204:
 	.cfi_endproc
 .LFE247:
 	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
@@ -1926,11 +1845,11 @@ INSERT_FREE_LIST:
 	.type	List_remove_node, %function
 List_remove_node:
 .LFB251:
-	.loc 2 333 0
+	.loc 2 375 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL164:
+.LVL154:
 	push	{r4, r5, r6, r7, r8, lr}
 	.cfi_def_cfa_offset 24
 	.cfi_offset 4, -24
@@ -1939,91 +1858,103 @@ List_remove_node:
 	.cfi_offset 7, -12
 	.cfi_offset 8, -8
 	.cfi_offset 14, -4
-	.loc 2 336 0
+	.loc 2 378 0
 	movs	r6, #6
-	ldr	r5, .L137
+	ldr	r5, .L134
 	muls	r6, r1, r6
-	.loc 2 337 0
+	.loc 2 379 0
 	movw	r3, #65535
-	.loc 2 333 0
+	.loc 2 375 0
 	mov	r8, r0
-	.loc 2 336 0
+	.loc 2 378 0
 	ldr	r7, [r5]
 	adds	r4, r7, r6
-.LVL165:
-	.loc 2 337 0
+.LVL155:
+	.loc 2 379 0
 	ldrh	r2, [r4, #2]
 	cmp	r2, r3
-	bne	.L131
-	.loc 2 337 0 is_stmt 0 discriminator 1
+	bne	.L129
+	.loc 2 379 0 is_stmt 0 discriminator 1
 	ldr	r3, [r0]
 	cmp	r4, r3
-	beq	.L131
-	.loc 2 337 0 discriminator 2
-	movw	r2, #337
-	ldr	r1, .L137+4
-.LVL166:
-	ldr	r0, .L137+8
-.LVL167:
+	beq	.L129
+	.loc 2 379 0 discriminator 2
+	movw	r2, #379
+	ldr	r1, .L134+4
+.LVL156:
+	ldr	r0, .L134+8
+.LVL157:
 	bl	printf
-.LVL168:
-.L131:
-	.loc 2 339 0 is_stmt 1
+.LVL158:
+.L129:
+	.loc 2 381 0 is_stmt 1
 	ldr	r3, [r8]
 	movw	r1, #65535
-	ldrh	r2, [r7, r6]
 	cmp	r4, r3
-	bne	.L132
-	.loc 2 340 0
-	cmp	r2, r1
-	.loc 2 343 0
+	ldrh	r3, [r7, r6]
+	bne	.L130
+	.loc 2 382 0
+	cmp	r3, r1
+	.loc 2 385 0
 	ittee	ne
 	ldrne	r0, [r5]
-	movne	r3, #6
-	.loc 2 341 0
+	movne	r2, #6
+	.loc 2 383 0
 	moveq	r3, #0
 	streq	r3, [r8]
-	.loc 2 343 0
+	.loc 2 385 0
 	ittt	ne
-	mlane	r2, r3, r2, r0
-	strne	r2, [r8]
-	.loc 2 344 0
-	strhne	r1, [r2, #2]	@ movhi
-.L134:
-	.loc 2 355 0
+	mlane	r3, r2, r3, r0
+	strne	r3, [r8]
+	.loc 2 386 0
+	strhne	r1, [r3, #2]	@ movhi
+.L132:
+	.loc 2 399 0
 	movw	r3, #65535
-	.loc 2 357 0
+	.loc 2 401 0
 	movs	r0, #0
-	.loc 2 355 0
+	.loc 2 399 0
 	strh	r3, [r7, r6]	@ movhi
 	strh	r3, [r4, #2]	@ movhi
-	.loc 2 357 0
+	.loc 2 401 0
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL169:
-.L132:
-	.loc 2 346 0
-	cmp	r2, r1
-	.loc 2 348 0
-	ldr	r1, [r5]
-.LVL170:
-	mov	r3, #6
-	ldrh	r0, [r4, #2]
-	.loc 2 351 0
-	ittt	ne
-	mlane	r5, r3, r2, r1
-	strhne	r0, [r5, #2]	@ movhi
-.LVL171:
-	.loc 2 352 0
-	ldrhne	r0, [r4, #2]
-	.loc 2 353 0
-	muls	r3, r0, r3
-	strh	r2, [r1, r3]	@ movhi
-.LVL172:
-	b	.L134
-.L138:
+.LVL159:
+.L130:
+	.loc 2 388 0
+	cmp	r3, r1
+	ldrh	r1, [r4, #2]
+	bne	.L133
+	.loc 2 389 0
+	cmp	r1, r3
+	beq	.L132
+.LVL160:
+	.loc 2 391 0
+	movs	r2, #6
+	ldr	r0, [r5]
+	muls	r1, r2, r1
+.LVL161:
+	strh	r3, [r0, r1]	@ movhi
+	b	.L132
+.LVL162:
+.L133:
+	.loc 2 394 0
+	ldr	r0, [r5]
+.LVL163:
+	.loc 2 395 0
+	movs	r2, #6
+	mla	r5, r2, r3, r0
+	strh	r1, [r5, #2]	@ movhi
+.LVL164:
+	.loc 2 396 0
+	ldrh	r1, [r4, #2]
+	.loc 2 397 0
+	muls	r2, r1, r2
+	strh	r3, [r0, r2]	@ movhi
+	b	.L132
+.L135:
 	.align	2
-.L137:
-	.word	.LANCHOR41
+.L134:
+	.word	.LANCHOR40
 	.word	.LANCHOR50
 	.word	.LC1
 	.cfi_endproc
@@ -2039,76 +1970,76 @@ List_remove_node:
 	.type	List_pop_index_node, %function
 List_pop_index_node:
 .LFB252:
-	.loc 2 360 0
+	.loc 2 404 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL173:
-	.loc 2 364 0
+.LVL165:
+	.loc 2 408 0
 	ldr	r3, [r0]
-	.loc 2 360 0
+	.loc 2 404 0
 	push	{r4, r5, r6, lr}
 	.cfi_def_cfa_offset 16
 	.cfi_offset 4, -16
 	.cfi_offset 5, -12
 	.cfi_offset 6, -8
 	.cfi_offset 14, -4
-	.loc 2 364 0
-	cbz	r3, .L145
-	.loc 2 369 0
-	ldr	r2, .L146
-	.loc 2 368 0
+	.loc 2 408 0
+	cbz	r3, .L142
+	.loc 2 413 0
+	ldr	r2, .L143
+	.loc 2 412 0
 	movw	r5, #65535
-	.loc 2 369 0
+	.loc 2 413 0
 	movs	r6, #6
 	ldr	r2, [r2]
+.L138:
+.LVL166:
+	.loc 2 412 0
+	cbnz	r1, .L139
 .L141:
-.LVL174:
-	.loc 2 368 0
-	cbnz	r1, .L142
-.L144:
-	.loc 2 372 0
-	ldr	r4, .L146+4
+	.loc 2 416 0
+	ldr	r4, .L143+4
 	subs	r3, r3, r2
-.LVL175:
+.LVL167:
 	asrs	r3, r3, #1
 	muls	r4, r3, r4
-.LVL176:
-	.loc 2 373 0
+.LVL168:
+	.loc 2 417 0
 	uxth	r1, r4
-.LVL177:
+.LVL169:
 	bl	List_remove_node
-.LVL178:
+.LVL170:
 	uxth	r0, r4
-	.loc 2 375 0
+	.loc 2 419 0
 	pop	{r4, r5, r6, pc}
-.LVL179:
-.L142:
-	.loc 2 368 0 discriminator 1
+.LVL171:
+.L139:
+	.loc 2 412 0 discriminator 1
 	ldrh	r4, [r3]
 	cmp	r4, r5
-	beq	.L144
-	.loc 2 370 0
+	beq	.L141
+	.loc 2 414 0
 	subs	r1, r1, #1
-.LVL180:
-	.loc 2 369 0
+.LVL172:
+	.loc 2 413 0
 	mla	r3, r6, r4, r2
-.LVL181:
-	.loc 2 370 0
+.LVL173:
+	.loc 2 414 0
 	uxth	r1, r1
-.LVL182:
-	b	.L141
-.LVL183:
-.L145:
-	.loc 2 365 0
+.LVL174:
+	b	.L138
+.LVL175:
+.L142:
+	.loc 2 409 0
 	movw	r0, #65535
-.LVL184:
-	.loc 2 376 0
+.LVL176:
+	.loc 2 420 0
 	pop	{r4, r5, r6, pc}
-.L147:
+.L144:
 	.align	2
-.L146:
-	.word	.LANCHOR41
+.L143:
+	.word	.LANCHOR40
 	.word	-1431655765
 	.cfi_endproc
 .LFE252:
@@ -2123,16 +2054,16 @@ List_pop_index_node:
 	.type	List_pop_head_node, %function
 List_pop_head_node:
 .LFB253:
-	.loc 2 379 0
+	.loc 2 423 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL185:
-	.loc 2 380 0
+.LVL177:
+	.loc 2 424 0
 	movs	r1, #0
 	b	List_pop_index_node
-.LVL186:
+.LVL178:
 	.cfi_endproc
 .LFE253:
 	.size	List_pop_head_node, .-List_pop_head_node
@@ -2146,69 +2077,69 @@ List_pop_head_node:
 	.type	List_get_gc_head_node, %function
 List_get_gc_head_node:
 .LFB254:
-	.loc 2 384 0
+	.loc 2 428 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL187:
-	.loc 2 388 0
-	ldr	r3, .L155
-	.loc 2 384 0
+.LVL179:
+	.loc 2 432 0
+	ldr	r3, .L152
+	.loc 2 428 0
 	push	{r4, lr}
 	.cfi_def_cfa_offset 8
 	.cfi_offset 4, -8
 	.cfi_offset 14, -4
-	.loc 2 388 0
+	.loc 2 432 0
 	ldr	r3, [r3]
-	cbz	r3, .L154
-	.loc 2 393 0
-	ldr	r2, .L155+4
+	cbz	r3, .L151
+	.loc 2 437 0
+	ldr	r2, .L152+4
 	movs	r4, #6
 	ldr	r1, [r2]
-	.loc 2 392 0
+	.loc 2 436 0
 	movw	r2, #65535
-.L151:
-.LVL188:
-	cbz	r0, .L152
-	.loc 2 392 0 is_stmt 0 discriminator 1
+.L148:
+.LVL180:
+	cbz	r0, .L149
+	.loc 2 436 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r3]
-.LVL189:
+.LVL181:
 	cmp	r3, r2
-	bne	.L153
-.L154:
-	.loc 2 389 0 is_stmt 1
+	bne	.L150
+.L151:
+	.loc 2 433 0 is_stmt 1
 	movw	r0, #65535
-.LVL190:
+.LVL182:
 	pop	{r4, pc}
-.LVL191:
-.L153:
-	.loc 2 394 0
+.LVL183:
+.L150:
+	.loc 2 438 0
 	subs	r0, r0, #1
-.LVL192:
-	.loc 2 393 0
+.LVL184:
+	.loc 2 437 0
 	mla	r3, r4, r3, r1
-.LVL193:
-	.loc 2 394 0
+.LVL185:
+	.loc 2 438 0
 	uxth	r0, r0
-.LVL194:
-	b	.L151
-.L152:
-.LVL195:
-	.loc 2 398 0
-	ldr	r0, .L155+8
-.LVL196:
+.LVL186:
+	b	.L148
+.L149:
+.LVL187:
+	.loc 2 442 0
+	ldr	r0, .L152+8
+.LVL188:
 	subs	r3, r3, r1
-.LVL197:
+.LVL189:
 	asrs	r3, r3, #1
 	muls	r3, r0, r3
 	uxth	r0, r3
-	.loc 2 401 0
+	.loc 2 445 0
 	pop	{r4, pc}
-.L156:
+.L153:
 	.align	2
-.L155:
-	.word	.LANCHOR42
+.L152:
 	.word	.LANCHOR41
+	.word	.LANCHOR40
 	.word	-1431655765
 	.cfi_endproc
 .LFE254:
@@ -2223,260 +2154,190 @@ List_get_gc_head_node:
 	.type	List_update_data_list, %function
 List_update_data_list:
 .LFB255:
-	.loc 2 404 0
+	.loc 2 448 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL198:
-	.loc 2 413 0
+.LVL190:
+	.loc 2 457 0
 	ldr	r3, .L165
-	.loc 2 404 0
-	push	{r4, r5, r6, r7, r8, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 4, -24
-	.cfi_offset 5, -20
-	.cfi_offset 6, -16
-	.cfi_offset 7, -12
-	.cfi_offset 8, -8
+	.loc 2 448 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	.loc 2 404 0
+	.loc 2 448 0
 	mov	r4, r0
-	.loc 2 413 0
+	.loc 2 457 0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L159
-	.loc 2 413 0 is_stmt 0 discriminator 1
+	beq	.L156
+	.loc 2 457 0 is_stmt 0 discriminator 1
 	ldr	r3, .L165+4
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L159
-	.loc 2 413 0 discriminator 2
+	beq	.L156
+	.loc 2 457 0 discriminator 2
 	ldr	r3, .L165+8
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L159
-.LVL199:
-.LBB191:
-.LBB192:
-	.loc 2 416 0 is_stmt 1
-	ldr	r6, .L165+12
-	movs	r3, #6
-	.loc 2 418 0
-	ldr	r2, .L165+16
-	.loc 2 416 0
-	muls	r3, r0, r3
-	ldr	r1, [r6]
-	.loc 2 418 0
-	ldr	r2, [r2]
-	.loc 2 416 0
-	add	r8, r1, r3
-.LVL200:
-	.loc 2 418 0
-	cmp	r8, r2
-	beq	.L159
-.LVL201:
-	.loc 2 421 0
-	ldr	r7, .L165+20
-	.loc 2 422 0
-	ldrh	r5, [r8, #4]
-	.loc 2 421 0
-	ldr	r2, [r7]
-	.loc 2 422 0
+	beq	.L156
+.LVL191:
+.LBB207:
+.LBB208:
+	.loc 2 460 0 is_stmt 1
+	ldr	r7, .L165+12
+	movs	r6, #6
+	.loc 2 462 0
+	ldr	r3, .L165+16
+	.loc 2 460 0
+	muls	r6, r0, r6
+	ldr	fp, [r7]
+	.loc 2 462 0
+	ldr	r3, [r3]
+	.loc 2 460 0
+	add	r10, fp, r6
+.LVL192:
+	.loc 2 462 0
+	cmp	r10, r3
+	beq	.L156
+	.loc 2 465 0
+	ldr	r3, .L165+20
+	.loc 2 466 0
+	ldrh	r5, [r10, #4]
+	.loc 2 465 0
+	ldr	r2, [r3]
+	mov	r8, r3
 	ldrh	r2, [r2, r0, lsl #1]
-.LVL202:
-	.loc 2 424 0
+.LVL193:
+	.loc 2 467 0
+	cmp	r5, #0
+	beq	.L163
+	.loc 2 466 0
 	muls	r5, r2, r5
-.LVL203:
-	.loc 2 426 0
-	ldrh	r2, [r8, #2]
-	movw	r0, #65535
-.LVL204:
-	.loc 2 424 0
-	it	eq
-	moveq	r5, #-1
-.LVL205:
-	.loc 2 426 0
-	cmp	r2, r0
-	bne	.L162
-	ldrh	r3, [r1, r3]
+.LVL194:
+.L158:
+	.loc 2 470 0
+	ldrh	r3, [r10, #2]
+	movw	r2, #65535
+.LVL195:
 	cmp	r3, r2
-	bne	.L162
-	mov	r2, #426
+	bne	.L159
+	ldrh	r2, [fp, r6]
+	cmp	r2, r3
+	bne	.L159
+	mov	r2, #470
 	ldr	r1, .L165+24
 	ldr	r0, .L165+28
+.LVL196:
 	bl	printf
-.LVL206:
-.L162:
-	.loc 2 427 0
-	ldrh	r3, [r8, #2]
+.LVL197:
+.L159:
+	.loc 2 471 0
+	ldrh	r3, [r10, #2]
+	movw	r2, #65535
+	cmp	r3, r2
+	bne	.L160
+	ldrh	r2, [fp, r6]
+	cmp	r2, r3
+	beq	.L156
+.L160:
+	.loc 2 473 0
 	movs	r2, #6
 	muls	r2, r3, r2
-.LVL207:
-	.loc 2 428 0
+.LVL198:
+	.loc 2 474 0
 	ldr	r3, .L165+32
 	asrs	r1, r2, #1
 	muls	r3, r1, r3
-	.loc 2 429 0
-	ldr	r1, [r7]
-	.loc 2 430 0
+	.loc 2 475 0
+	ldr	r1, [r8]
 	ldrh	r0, [r1, r3, lsl #1]
-	ldr	r1, [r6]
+.LVL199:
+	.loc 2 476 0
+	ldr	r1, [r7]
 	add	r2, r2, r1
-.LVL208:
+.LVL200:
 	ldrh	r3, [r2, #4]
-.LVL209:
-	.loc 2 432 0
+.LVL201:
+	.loc 2 477 0
+	cbz	r3, .L164
+	.loc 2 476 0
 	muls	r3, r0, r3
-.LVL210:
-	it	eq
-	moveq	r3, #-1
-.LVL211:
-	.loc 2 434 0
+.LVL202:
+.L161:
+	.loc 2 480 0
 	cmp	r5, r3
-	bcs	.L159
-	.loc 2 435 0
+	bcs	.L156
+	.loc 2 481 0
 	ldr	r5, .L165+36
-.LVL212:
+.LVL203:
 	mov	r1, r4
 	ldr	r0, .L165+16
+.LVL204:
 	bl	List_remove_node
-.LVL213:
+.LVL205:
 	ldrh	r3, [r5]
-	cbnz	r3, .L164
-	movw	r2, #435
+	cbnz	r3, .L162
+	movw	r2, #481
 	ldr	r1, .L165+24
 	ldr	r0, .L165+28
 	bl	printf
-.LVL214:
-.L164:
+.LVL206:
+.L162:
 	ldrh	r3, [r5]
-	.loc 2 436 0
+	.loc 2 482 0
 	mov	r0, r4
-	.loc 2 435 0
+	.loc 2 481 0
 	subs	r3, r3, #1
 	strh	r3, [r5]	@ movhi
-	.loc 2 436 0
+	.loc 2 482 0
 	bl	INSERT_DATA_LIST
-.LVL215:
-.L159:
-.LBE192:
-.LBE191:
-	.loc 2 439 0
+.LVL207:
+.L156:
+.LBE208:
+.LBE207:
+	.loc 2 485 0
 	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, pc}
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL208:
+.L163:
+.LBB210:
+.LBB209:
+	.loc 2 468 0
+	mov	r5, #-1
+.LVL209:
+	b	.L158
+.LVL210:
+.L164:
+	.loc 2 478 0
+	mov	r3, #-1
+.LVL211:
+	b	.L161
 .L166:
 	.align	2
 .L165:
 	.word	.LANCHOR51
 	.word	.LANCHOR52
 	.word	.LANCHOR53
+	.word	.LANCHOR40
 	.word	.LANCHOR41
 	.word	.LANCHOR42
-	.word	.LANCHOR43
 	.word	.LANCHOR54
 	.word	.LC1
 	.word	-1431655765
 	.word	.LANCHOR45
+.LBE209:
+.LBE210:
 	.cfi_endproc
 .LFE255:
 	.size	List_update_data_list, .-List_update_data_list
-	.section	.text.ftl_map_blk_alloc_new_blk,"ax",%progbits
-	.align	1
-	.global	ftl_map_blk_alloc_new_blk
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_map_blk_alloc_new_blk, %function
-ftl_map_blk_alloc_new_blk:
-.LFB258:
-	.loc 2 516 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL216:
-	.loc 2 520 0
-	ldrh	r1, [r0, #10]
-	ldr	r2, [r0, #12]
-	.loc 2 516 0
-	push	{r3, r4, r5, r6, r7, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 3, -24
-	.cfi_offset 4, -20
-	.cfi_offset 5, -16
-	.cfi_offset 6, -12
-	.cfi_offset 7, -8
-	.cfi_offset 14, -4
-	.loc 2 516 0
-	mov	r4, r0
-	.loc 2 520 0
-	movs	r3, #0
-.LVL217:
-.L168:
-	uxth	r5, r3
-.LVL218:
-	.loc 2 520 0 is_stmt 0 discriminator 1
-	cmp	r5, r1
-	bcc	.L170
-.LVL219:
-.L171:
-.LBB195:
-.LBB196:
-	.loc 2 532 0 is_stmt 1
-	mov	r2, #532
-	ldr	r1, .L177
-	ldr	r0, .L177+4
-	bl	printf
-.LVL220:
-	b	.L172
-.LVL221:
-.L170:
-.LBE196:
-.LBE195:
-	.loc 2 521 0
-	mov	r7, r2
-	adds	r3, r3, #1
-	ldrh	r6, [r7]
-	adds	r2, r2, #2
-	cmp	r6, #0
-	bne	.L168
-	.loc 2 522 0
-	bl	FtlFreeSysBlkQueueOut
-.LVL222:
-	strh	r0, [r7]	@ movhi
-	.loc 2 523 0
-	cbz	r0, .L169
-	.loc 2 526 0
-	ldr	r3, [r4, #28]
-	.loc 2 524 0
-	strh	r6, [r4, #2]	@ movhi
-	.loc 2 525 0
-	strh	r5, [r4]	@ movhi
-	.loc 2 526 0
-	adds	r3, r3, #1
-	str	r3, [r4, #28]
-	.loc 2 527 0
-	ldrh	r3, [r4, #8]
-	adds	r3, r3, #1
-	strh	r3, [r4, #8]	@ movhi
-.L169:
-	.loc 2 532 0
-	ldrh	r3, [r4, #10]
-	cmp	r3, r5
-	bls	.L171
-.L172:
-	.loc 2 534 0
-	movs	r0, #0
-	pop	{r3, r4, r5, r6, r7, pc}
-.LVL223:
-.L178:
-	.align	2
-.L177:
-	.word	.LANCHOR55
-	.word	.LC1
-	.cfi_endproc
-.LFE258:
-	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
 	.section	.text.select_l2p_ram_region,"ax",%progbits
 	.align	1
 	.global	select_l2p_ram_region
@@ -2487,11 +2348,11 @@ ftl_map_blk_alloc_new_blk:
 	.type	select_l2p_ram_region, %function
 select_l2p_ram_region:
 .LFB263:
-	.loc 2 700 0
+	.loc 2 749 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL224:
+.LVL212:
 	push	{r3, r4, r5, r6, r7, lr}
 	.cfi_def_cfa_offset 24
 	.cfi_offset 3, -24
@@ -2500,121 +2361,121 @@ select_l2p_ram_region:
 	.cfi_offset 6, -12
 	.cfi_offset 7, -8
 	.cfi_offset 14, -4
-	.loc 2 705 0
+	.loc 2 754 0
 	movs	r1, #0
-	ldr	r3, .L189
-	.loc 2 706 0
+	ldr	r3, .L177
+	.loc 2 755 0
 	movs	r0, #12
 	movw	r5, #65535
-	.loc 2 705 0
+	.loc 2 754 0
 	ldrh	r2, [r3]
-	.loc 2 706 0
-	ldr	r3, .L189+4
+	.loc 2 755 0
+	ldr	r3, .L177+4
 	ldr	r3, [r3]
-.LVL225:
-.L180:
+.LVL213:
+.L168:
 	uxth	r4, r1
-.LVL226:
-	.loc 2 705 0 discriminator 1
+.LVL214:
+	.loc 2 754 0 discriminator 1
 	cmp	r4, r2
-	bcc	.L182
+	bcc	.L170
 	mov	r4, r2
-.LVL227:
+.LVL215:
 	movs	r1, #0
-.LVL228:
+.LVL216:
 	mov	r6, #-2147483648
-	.loc 2 716 0
+	.loc 2 765 0
 	movs	r7, #12
-.L183:
+.L171:
 	uxth	r5, r1
-.LVL229:
-	.loc 2 715 0 discriminator 1
+.LVL217:
+	.loc 2 764 0 discriminator 1
 	cmp	r5, r2
-	bcc	.L185
-	.loc 2 724 0
+	bcc	.L173
+	.loc 2 773 0
 	cmp	r4, r2
-	bcc	.L181
-	.loc 2 730 0
-	ldr	r1, .L189+8
+	bcc	.L169
+	.loc 2 779 0
+	ldr	r1, .L177+8
 	mov	r4, r2
 	mov	r0, #-1
 	ldrh	r7, [r1]
 	movs	r1, #0
-.LVL230:
-.L186:
+.LVL218:
+.L174:
 	uxth	r5, r1
-.LVL231:
-	.loc 2 729 0 discriminator 1
+.LVL219:
+	.loc 2 778 0 discriminator 1
 	cmp	r5, r2
-	bcc	.L188
-	.loc 2 735 0
+	bcc	.L176
+	.loc 2 784 0
 	cmp	r4, r2
-	bcc	.L181
-	.loc 2 735 0 is_stmt 0 discriminator 1
-	movw	r2, #735
-	ldr	r1, .L189+12
-	ldr	r0, .L189+16
-.LVL232:
+	bcc	.L169
+	.loc 2 784 0 is_stmt 0 discriminator 1
+	mov	r2, #784
+	ldr	r1, .L177+12
+	ldr	r0, .L177+16
+.LVL220:
 	bl	printf
-.LVL233:
-	b	.L181
-.LVL234:
-.L182:
-	adds	r1, r1, #1
-	.loc 2 706 0 is_stmt 1
+.LVL221:
+	b	.L169
+.LVL222:
+.L170:
+	adds	r1, r1, #1
+	.loc 2 755 0 is_stmt 1
 	mla	r6, r0, r1, r3
 	ldrh	r6, [r6, #-12]
 	cmp	r6, r5
-	bne	.L180
-.LVL235:
-.L181:
-	.loc 2 737 0
+	bne	.L168
+.LVL223:
+.L169:
+	.loc 2 786 0
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, pc}
-.LVL236:
-.L185:
-	.loc 2 716 0
+.LVL224:
+.L173:
+	.loc 2 765 0
 	mla	r0, r7, r1, r3
 	ldr	r0, [r0, #4]
 	cmp	r0, #0
-	blt	.L184
-	.loc 2 717 0
+	blt	.L172
+	.loc 2 766 0
 	cmp	r6, r0
 	itt	hi
 	movhi	r6, r0
-.LVL237:
+.LVL225:
 	movhi	r4, r5
-.L184:
-.LVL238:
+.L172:
+.LVL226:
 	adds	r1, r1, #1
-.LVL239:
-	b	.L183
-.LVL240:
-.L188:
-	.loc 2 730 0
+.LVL227:
+	b	.L171
+.LVL228:
+.L176:
+	.loc 2 779 0
 	ldr	r6, [r3, #4]
 	cmp	r0, r6
-	bls	.L187
-	.loc 2 730 0 is_stmt 0 discriminator 1
+	bls	.L175
+	.loc 2 779 0 is_stmt 0 discriminator 1
 	ldrh	ip, [r3]
 	cmp	ip, r7
 	itt	ne
 	movne	r0, r6
-.LVL241:
+.LVL229:
 	movne	r4, r5
-.LVL242:
-.L187:
+.LVL230:
+.L175:
 	adds	r1, r1, #1
-.LVL243:
+.LVL231:
 	adds	r3, r3, #12
-	b	.L186
-.L190:
+	b	.L174
+.L178:
 	.align	2
-.L189:
+.L177:
 	.word	.LANCHOR33
+	.word	.LANCHOR55
 	.word	.LANCHOR56
 	.word	.LANCHOR57
-	.word	.LANCHOR58
 	.word	.LC1
 	.cfi_endproc
 .LFE263:
@@ -2629,14 +2490,14 @@ select_l2p_ram_region:
 	.type	FtlUpdateVaildLpn, %function
 FtlUpdateVaildLpn:
 .LFB269:
-	.loc 2 882 0 is_stmt 1
+	.loc 2 931 0 is_stmt 1
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL244:
-	.loc 2 885 0
-	ldr	r2, .L201
-	.loc 2 882 0
+.LVL232:
+	.loc 2 934 0
+	ldr	r2, .L189
+	.loc 2 931 0
 	push	{r4, r5, r6, lr}
 	.cfi_def_cfa_offset 16
 	.cfi_offset 4, -16
@@ -2644,78 +2505,78 @@ FtlUpdateVaildLpn:
 	.cfi_offset 6, -8
 	.cfi_offset 14, -4
 	mov	r1, r2
-	.loc 2 885 0
+	.loc 2 934 0
 	ldrh	r3, [r2]
 	cmp	r3, #4
-	bhi	.L192
-	.loc 2 885 0 is_stmt 0 discriminator 1
-	cbnz	r0, .L192
-	.loc 2 885 0
+	bhi	.L180
+	.loc 2 934 0 is_stmt 0 discriminator 1
+	cbnz	r0, .L180
+	.loc 2 934 0
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
-	.loc 2 894 0 is_stmt 1
+	.loc 2 943 0 is_stmt 1
 	pop	{r4, r5, r6, pc}
-.L192:
-	.loc 2 886 0
+.L180:
+	.loc 2 935 0
 	movs	r3, #0
-.LBB199:
-.LBB200:
-	.loc 2 888 0
-	ldr	r0, .L201+4
-.LVL245:
-.LBE200:
-.LBE199:
-	.loc 2 886 0
+.LBB213:
+.LBB214:
+	.loc 2 937 0
+	ldr	r0, .L189+4
+.LVL233:
+.LBE214:
+.LBE213:
+	.loc 2 935 0
 	strh	r3, [r1]	@ movhi
-.LBB204:
-.LBB201:
-	.loc 2 890 0
+.LBB218:
+.LBB215:
+	.loc 2 939 0
 	movw	r6, #65535
-	ldr	r1, .L201+8
+	ldr	r1, .L189+8
 	ldrh	r4, [r0]
 	mov	r0, r3
-.LBE201:
-.LBE204:
-	.loc 2 887 0
-	ldr	r2, .L201+12
-.LBB205:
-.LBB202:
-	.loc 2 890 0
+.LBE215:
+.LBE218:
+	.loc 2 936 0
+	ldr	r2, .L189+12
+.LBB219:
+.LBB216:
+	.loc 2 939 0
 	ldr	r1, [r1]
-.LBE202:
-.LBE205:
-	.loc 2 887 0
+.LBE216:
+.LBE219:
+	.loc 2 936 0
 	str	r3, [r2]
-.LVL246:
+.LVL234:
 	add	r4, r1, r4, lsl #1
-.L193:
-.LBB206:
-.LBB203:
-	.loc 2 888 0
+.L181:
+.LBB220:
+.LBB217:
+	.loc 2 937 0
 	cmp	r1, r4
-	bne	.L195
-	cbz	r3, .L191
+	bne	.L183
+	cbz	r3, .L179
 	str	r0, [r2]
-.L191:
+.L179:
 	pop	{r4, r5, r6, pc}
-.L195:
-	.loc 2 890 0
+.L183:
+	.loc 2 939 0
 	ldrh	r5, [r1], #2
 	cmp	r5, r6
-	.loc 2 891 0
+	.loc 2 940 0
 	itt	ne
 	addne	r0, r0, r5
 	movne	r3, #1
-	b	.L193
-.L202:
+	b	.L181
+.L190:
 	.align	2
-.L201:
-	.word	.LANCHOR59
+.L189:
+	.word	.LANCHOR58
 	.word	.LANCHOR5
-	.word	.LANCHOR43
-	.word	.LANCHOR60
-.LBE203:
-.LBE206:
+	.word	.LANCHOR42
+	.word	.LANCHOR59
+.LBE217:
+.LBE220:
 	.cfi_endproc
 .LFE269:
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
@@ -2729,35 +2590,35 @@ FtlUpdateVaildLpn:
 	.type	ftl_set_blk_mode, %function
 ftl_set_blk_mode:
 .LFB275:
-	.loc 2 1347 0
+	.loc 2 1396 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL247:
-	.loc 2 1347 0
+.LVL235:
+	.loc 2 1396 0
 	mov	r3, r0
-	.loc 2 1348 0
-	cbz	r1, .L204
-	b	ftl_set_blk_mode.part.7
-.LVL248:
-.L204:
-	.loc 2 1351 0
-	ldr	r2, .L205
+	.loc 2 1397 0
+	cbz	r1, .L192
+	b	ftl_set_blk_mode.part.6
+.LVL236:
+.L192:
+	.loc 2 1400 0
+	ldr	r2, .L193
 	lsrs	r0, r0, #5
-.LVL249:
+.LVL237:
 	and	r3, r3, #31
 	ldr	r1, [r2]
-.LVL250:
+.LVL238:
 	movs	r2, #1
 	lsl	r3, r2, r3
 	ldr	r2, [r1, r0, lsl #2]
 	bic	r2, r2, r3
 	str	r2, [r1, r0, lsl #2]
 	bx	lr
-.L206:
+.L194:
 	.align	2
-.L205:
+.L193:
 	.word	.LANCHOR1
 	.cfi_endproc
 .LFE275:
@@ -2772,26 +2633,26 @@ ftl_set_blk_mode:
 	.type	ftl_get_blk_mode, %function
 ftl_get_blk_mode:
 .LFB276:
-	.loc 2 1355 0
+	.loc 2 1404 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL251:
-	.loc 2 1356 0
-	ldr	r3, .L208
+.LVL239:
+	.loc 2 1405 0
+	ldr	r3, .L196
 	lsrs	r2, r0, #5
 	and	r0, r0, #31
-.LVL252:
+.LVL240:
 	ldr	r3, [r3]
 	ldr	r3, [r3, r2, lsl #2]
 	lsr	r0, r3, r0
-	.loc 2 1357 0
+	.loc 2 1406 0
 	and	r0, r0, #1
 	bx	lr
-.L209:
+.L197:
 	.align	2
-.L208:
+.L196:
 	.word	.LANCHOR1
 	.cfi_endproc
 .LFE276:
@@ -2806,88 +2667,88 @@ ftl_get_blk_mode:
 	.type	ftl_sb_update_avl_pages, %function
 ftl_sb_update_avl_pages:
 .LFB282:
-	.loc 2 1608 0
+	.loc 2 1657 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL253:
-	.loc 2 1610 0
+.LVL241:
+	.loc 2 1659 0
 	movs	r3, #0
-	.loc 2 1608 0
+	.loc 2 1657 0
 	push	{r4, r5, r6, lr}
 	.cfi_def_cfa_offset 16
 	.cfi_offset 4, -16
 	.cfi_offset 5, -12
 	.cfi_offset 6, -8
 	.cfi_offset 14, -4
-	.loc 2 1610 0
+	.loc 2 1659 0
 	strh	r3, [r0, #4]	@ movhi
-.LVL254:
-	.loc 2 1613 0
+.LVL242:
+	.loc 2 1662 0
 	movw	r6, #65535
-	.loc 2 1611 0
-	ldr	r3, .L217
+	.loc 2 1660 0
+	ldr	r3, .L205
 	ldrh	r4, [r3]
 	add	r3, r0, r2, lsl #1
 	adds	r3, r3, #14
-.LVL255:
-.L211:
-	.loc 2 1611 0 is_stmt 0 discriminator 1
+.LVL243:
+.L199:
+	.loc 2 1660 0 is_stmt 0 discriminator 1
 	cmp	r2, r4
-	bcc	.L213
-	.loc 2 1622 0 is_stmt 1
-	ldr	r3, .L217+4
+	bcc	.L201
+	.loc 2 1671 0 is_stmt 1
+	ldr	r3, .L205+4
 	add	r5, r0, #16
-	.loc 2 1620 0
+	.loc 2 1669 0
 	movw	r6, #65535
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	subs	r1, r3, r1
-.LVL256:
-	.loc 2 1622 0
+.LVL244:
+	.loc 2 1671 0
 	movs	r3, #0
 	uxth	r1, r1
-.LVL257:
-.L214:
-	.loc 2 1618 0 discriminator 1
+.LVL245:
+.L202:
+	.loc 2 1667 0 discriminator 1
 	uxth	r2, r3
 	cmp	r4, r2
-	bhi	.L216
-	.loc 2 1625 0
+	bhi	.L204
+	.loc 2 1674 0
 	pop	{r4, r5, r6, pc}
-.LVL258:
-.L213:
-	.loc 2 1613 0
+.LVL246:
+.L201:
+	.loc 2 1662 0
 	ldrh	r5, [r3, #2]!
-	.loc 2 1611 0
+	.loc 2 1660 0
 	adds	r2, r2, #1
-.LVL259:
+.LVL247:
 	uxth	r2, r2
-.LVL260:
-	.loc 2 1613 0
+.LVL248:
+	.loc 2 1662 0
 	cmp	r5, r6
-	.loc 2 1615 0
+	.loc 2 1664 0
 	ittt	ne
 	ldrhne	r5, [r0, #4]
 	addne	r5, r5, #1
 	strhne	r5, [r0, #4]	@ movhi
-	b	.L211
-.LVL261:
-.L216:
-	.loc 2 1620 0
+	b	.L199
+.LVL249:
+.L204:
+	.loc 2 1669 0
 	ldrh	r2, [r5], #2
 	adds	r3, r3, #1
-.LVL262:
+.LVL250:
 	cmp	r2, r6
-	.loc 2 1622 0
+	.loc 2 1671 0
 	ittt	ne
 	ldrhne	r2, [r0, #4]
 	addne	r2, r2, r1
 	strhne	r2, [r0, #4]	@ movhi
-	b	.L214
-.L218:
+	b	.L202
+.L206:
 	.align	2
-.L217:
+.L205:
 	.word	.LANCHOR3
 	.word	.LANCHOR19
 	.cfi_endproc
@@ -2903,78 +2764,78 @@ ftl_sb_update_avl_pages:
 	.type	FtlSlcSuperblockCheck, %function
 FtlSlcSuperblockCheck:
 .LFB285:
-	.loc 2 2013 0
+	.loc 2 2062 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL263:
-	.loc 2 2016 0
+.LVL251:
+	.loc 2 2065 0
 	ldrh	r3, [r0, #4]
-	.loc 2 2013 0
+	.loc 2 2062 0
 	push	{r4, r5, lr}
 	.cfi_def_cfa_offset 12
 	.cfi_offset 4, -12
 	.cfi_offset 5, -8
 	.cfi_offset 14, -4
-	.loc 2 2016 0
-	cbz	r3, .L219
-	.loc 2 2018 0
+	.loc 2 2065 0
+	cbz	r3, .L207
+	.loc 2 2067 0
 	ldrh	r2, [r0]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L219
-.LVL264:
-.LBB209:
-.LBB210:
-	.loc 2 2020 0
+	beq	.L207
+.LVL252:
+.LBB223:
+.LBB224:
+	.loc 2 2069 0
 	ldrb	r2, [r0, #6]	@ zero_extendqisi2
-	.loc 2 2025 0
+	.loc 2 2074 0
 	movs	r5, #0
-	.loc 2 2020 0
+	.loc 2 2069 0
 	adds	r2, r2, #8
 	ldrh	r1, [r0, r2, lsl #1]
-.LVL265:
-	.loc 2 2023 0
-	ldr	r2, .L225
+.LVL253:
+	.loc 2 2072 0
+	ldr	r2, .L213
 	ldrh	r4, [r2]
-	.loc 2 2021 0
+	.loc 2 2070 0
 	mov	r2, r3
-.L222:
+.L210:
 	cmp	r1, r2
-	beq	.L224
-.LVL266:
-.L219:
+	beq	.L212
+.LVL254:
+.L207:
 	pop	{r4, r5, pc}
-.LVL267:
-.L224:
-	.loc 2 2022 0
+.LVL255:
+.L212:
+	.loc 2 2071 0
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	uxtb	r3, r3
-	.loc 2 2023 0
+	.loc 2 2072 0
 	cmp	r3, r4
-	.loc 2 2022 0
+	.loc 2 2071 0
 	strb	r3, [r0, #6]
-	.loc 2 2024 0
+	.loc 2 2073 0
 	itttt	eq
 	ldrheq	r3, [r0, #2]
-	.loc 2 2025 0
+	.loc 2 2074 0
 	strbeq	r5, [r0, #6]
-	.loc 2 2024 0
+	.loc 2 2073 0
 	addeq	r3, r3, #1
 	strheq	r3, [r0, #2]	@ movhi
-	.loc 2 2027 0
+	.loc 2 2076 0
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r1, [r0, r3, lsl #1]
-.LVL268:
-	b	.L222
-.L226:
+.LVL256:
+	b	.L210
+.L214:
 	.align	2
-.L225:
+.L213:
 	.word	.LANCHOR3
-.LBE210:
-.LBE209:
+.LBE224:
+.LBE223:
 	.cfi_endproc
 .LFE285:
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
@@ -2988,15 +2849,15 @@ FtlSlcSuperblockCheck:
 	.type	make_superblock, %function
 make_superblock:
 .LFB287:
-	.loc 2 2045 0
+	.loc 2 2094 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL269:
-	.loc 2 2048 0
-	ldr	r3, .L232
+.LVL257:
+	.loc 2 2097 0
+	ldr	r3, .L220
 	ldrh	r2, [r0]
-	.loc 2 2045 0
+	.loc 2 2094 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
 	.cfi_offset 4, -32
@@ -3007,88 +2868,88 @@ make_superblock:
 	.cfi_offset 10, -12
 	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	.loc 2 2045 0
+	.loc 2 2094 0
 	mov	r4, r0
-	.loc 2 2048 0
+	.loc 2 2097 0
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L228
-	.loc 2 2048 0 is_stmt 0 discriminator 1
-	mov	r2, #2048
-	ldr	r1, .L232+4
-	ldr	r0, .L232+8
-.LVL270:
+	bcc	.L216
+	.loc 2 2097 0 is_stmt 0 discriminator 1
+	movw	r2, #2097
+	ldr	r1, .L220+4
+	ldr	r0, .L220+8
+.LVL258:
 	bl	printf
-.LVL271:
-.L228:
-	.loc 2 2051 0 is_stmt 1
-	ldr	r3, .L232+12
+.LVL259:
+.L216:
+	.loc 2 2100 0 is_stmt 1
+	ldr	r3, .L220+12
 	add	r6, r4, #16
-	.loc 2 2052 0
-	ldr	r10, .L232+20
-	.loc 2 2053 0
+	.loc 2 2101 0
+	ldr	r10, .L220+20
+	.loc 2 2102 0
 	movw	r7, #65535
-	.loc 2 2049 0
+	.loc 2 2098 0
 	movs	r5, #0
-	.loc 2 2051 0
+	.loc 2 2100 0
 	ldrh	r8, [r3]
-	.loc 2 2049 0
+	.loc 2 2098 0
 	strh	r5, [r4, #4]	@ movhi
-	.loc 2 2050 0
+	.loc 2 2099 0
 	strb	r5, [r4, #7]
-.LVL272:
-.L229:
-	.loc 2 2051 0 discriminator 1
+.LVL260:
+.L217:
+	.loc 2 2100 0 discriminator 1
 	uxth	r3, r5
 	cmp	r8, r3
-	bhi	.L231
-	.loc 2 2061 0
-	ldr	r2, .L232+16
-	.loc 2 2064 0
+	bhi	.L219
+	.loc 2 2110 0
+	ldr	r2, .L220+16
+	.loc 2 2113 0
 	movs	r0, #0
-	.loc 2 2061 0
+	.loc 2 2110 0
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r2]
 	smulbb	r3, r3, r2
 	strh	r3, [r4, #4]	@ movhi
-	.loc 2 2062 0
+	.loc 2 2111 0
 	movs	r3, #1
 	strb	r3, [r4, #9]
-	.loc 2 2064 0
+	.loc 2 2113 0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL273:
-.L231:
-	.loc 2 2052 0
+.LVL261:
+.L219:
+	.loc 2 2101 0
 	ldrh	r1, [r4]
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL274:
-	.loc 2 2053 0
+.LVL262:
+	.loc 2 2102 0
 	strh	r7, [r6]	@ movhi
-	.loc 2 2052 0
+	.loc 2 2101 0
 	mov	fp, r0
-.LVL275:
-	.loc 2 2054 0
+.LVL263:
+	.loc 2 2103 0
 	bl	FtlBbmIsBadBlock
-.LVL276:
-	cbnz	r0, .L230
-	.loc 2 2055 0
+.LVL264:
+	cbnz	r0, .L218
+	.loc 2 2104 0
 	strh	fp, [r6]	@ movhi
-	.loc 2 2056 0
+	.loc 2 2105 0
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	strb	r3, [r4, #7]
-.L230:
-.LVL277:
+.L218:
+.LVL265:
 	adds	r5, r5, #1
-.LVL278:
+.LVL266:
 	adds	r6, r6, #2
-	b	.L229
-.L233:
+	b	.L217
+.L221:
 	.align	2
-.L232:
+.L220:
 	.word	.LANCHOR5
-	.word	.LANCHOR61
+	.word	.LANCHOR60
 	.word	.LC1
 	.word	.LANCHOR3
 	.word	.LANCHOR19
@@ -3106,11 +2967,11 @@ make_superblock:
 	.type	update_multiplier_value, %function
 update_multiplier_value:
 .LFB296:
-	.loc 2 2401 0
+	.loc 2 2454 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL279:
+.LVL267:
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
 	.cfi_def_cfa_offset 32
 	.cfi_offset 3, -32
@@ -3121,74 +2982,74 @@ update_multiplier_value:
 	.cfi_offset 8, -12
 	.cfi_offset 10, -8
 	.cfi_offset 14, -4
-	.loc 2 2405 0
+	.loc 2 2458 0
 	movs	r5, #0
-	ldr	r3, .L240
-	.loc 2 2401 0
+	ldr	r3, .L228
+	.loc 2 2454 0
 	mov	r6, r0
-	.loc 2 2403 0
+	.loc 2 2456 0
 	mov	r4, r5
-	.loc 2 2406 0
-	ldr	r10, .L240+12
-	.loc 2 2405 0
+	.loc 2 2459 0
+	ldr	r10, .L228+12
+	.loc 2 2458 0
 	ldrh	r7, [r3]
-	.loc 2 2408 0
-	ldr	r3, .L240+4
+	.loc 2 2461 0
+	ldr	r3, .L228+4
 	ldrh	r8, [r3]
-.LVL280:
-.L235:
-	.loc 2 2405 0 discriminator 1
+.LVL268:
+.L223:
+	.loc 2 2458 0 discriminator 1
 	uxth	r3, r5
 	cmp	r7, r3
-	bhi	.L237
-	.loc 2 2410 0
-	cbz	r4, .L239
-	.loc 2 2411 0
+	bhi	.L225
+	.loc 2 2463 0
+	cbz	r4, .L227
+	.loc 2 2464 0
 	mov	r1, r4
 	mov	r0, #32768
 	bl	__aeabi_idiv
-.LVL281:
-.L238:
-	.loc 2 2412 0
-	ldr	r3, .L240+8
+.LVL269:
+.L226:
+	.loc 2 2465 0
+	ldr	r3, .L228+8
 	movs	r2, #6
 	ldr	r3, [r3]
 	mla	r6, r2, r6, r3
 	strh	r0, [r6, #4]	@ movhi
-	.loc 2 2414 0
+	.loc 2 2467 0
 	movs	r0, #0
-.LVL282:
+.LVL270:
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.LVL283:
-.L237:
-	.loc 2 2406 0
+.LVL271:
+.L225:
+	.loc 2 2459 0
 	mov	r1, r6
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL284:
-	.loc 2 2407 0
+.LVL272:
+	.loc 2 2460 0
 	bl	FtlBbmIsBadBlock
-.LVL285:
-	cbnz	r0, .L236
-	.loc 2 2408 0
+.LVL273:
+	cbnz	r0, .L224
+	.loc 2 2461 0
 	add	r4, r4, r8
-.LVL286:
+.LVL274:
 	uxth	r4, r4
-.LVL287:
-.L236:
+.LVL275:
+.L224:
 	adds	r5, r5, #1
-.LVL288:
-	b	.L235
-.LVL289:
-.L239:
+.LVL276:
+	b	.L223
+.LVL277:
+.L227:
 	mov	r0, r4
-	b	.L238
-.L241:
+	b	.L226
+.L229:
 	.align	2
-.L240:
+.L228:
 	.word	.LANCHOR3
 	.word	.LANCHOR19
-	.word	.LANCHOR41
+	.word	.LANCHOR40
 	.word	.LANCHOR13
 	.cfi_endproc
 .LFE296:
@@ -3203,38 +3064,38 @@ update_multiplier_value:
 	.type	GetFreeBlockMinEraseCount, %function
 GetFreeBlockMinEraseCount:
 .LFB297:
-	.loc 2 2417 0
+	.loc 2 2470 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL290:
-	.loc 2 2420 0
-	ldr	r3, .L245
+.LVL278:
+	.loc 2 2473 0
+	ldr	r3, .L233
 	ldr	r0, [r3]
-	cbz	r0, .L243
-	.loc 2 2421 0
-	ldr	r3, .L245+4
+	cbz	r0, .L231
+	.loc 2 2474 0
+	ldr	r3, .L233+4
 	ldr	r3, [r3]
 	subs	r0, r0, r3
-	ldr	r3, .L245+8
+	ldr	r3, .L233+8
 	asrs	r0, r0, #1
 	muls	r0, r3, r0
-	ldr	r3, .L245+12
+	ldr	r3, .L233+12
 	ldr	r3, [r3]
 	uxth	r0, r0
 	ldrh	r0, [r3, r0, lsl #1]
-.LVL291:
-.L243:
-	.loc 2 2423 0
+.LVL279:
+.L231:
+	.loc 2 2476 0
 	bx	lr
-.L246:
+.L234:
 	.align	2
-.L245:
+.L233:
 	.word	.LANCHOR47
-	.word	.LANCHOR41
-	.word	-1431655765
 	.word	.LANCHOR40
+	.word	-1431655765
+	.word	.LANCHOR43
 	.cfi_endproc
 .LFE297:
 	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
@@ -3248,87 +3109,87 @@ GetFreeBlockMinEraseCount:
 	.type	GetFreeBlockMaxEraseCount, %function
 GetFreeBlockMaxEraseCount:
 .LFB298:
-	.loc 2 2426 0
+	.loc 2 2479 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL292:
-	.loc 2 2431 0
-	ldr	r3, .L255
-	.loc 2 2426 0
+.LVL280:
+	.loc 2 2484 0
+	ldr	r3, .L243
+	.loc 2 2479 0
 	push	{r4, r5, r6, lr}
 	.cfi_def_cfa_offset 16
 	.cfi_offset 4, -16
 	.cfi_offset 5, -12
 	.cfi_offset 6, -8
 	.cfi_offset 14, -4
-	.loc 2 2431 0
+	.loc 2 2484 0
 	ldr	r3, [r3]
-	cbz	r3, .L253
-	.loc 2 2432 0
-	ldr	r2, .L255+4
-	.loc 2 2436 0
+	cbz	r3, .L241
+	.loc 2 2485 0
+	ldr	r2, .L243+4
+	.loc 2 2489 0
 	movs	r5, #6
 	movw	r6, #65535
-	.loc 2 2432 0
+	.loc 2 2485 0
 	ldrh	r2, [r2]
 	rsb	r2, r2, r2, lsl #3
 	asrs	r2, r2, #3
 	cmp	r0, r2
-	.loc 2 2433 0
+	.loc 2 2486 0
 	it	gt
 	uxthgt	r0, r2
-.LVL293:
-	.loc 2 2434 0
-	ldr	r2, .L255+8
+.LVL281:
+	.loc 2 2487 0
+	ldr	r2, .L243+8
 	ldr	r1, [r2]
-	ldr	r2, .L255+12
+	ldr	r2, .L243+12
 	subs	r3, r3, r1
 	asrs	r3, r3, #1
 	muls	r3, r2, r3
-	.loc 2 2435 0
+	.loc 2 2488 0
 	movs	r2, #0
-	.loc 2 2434 0
+	.loc 2 2487 0
 	uxth	r3, r3
-.LVL294:
-.L250:
-	.loc 2 2435 0 discriminator 1
+.LVL282:
+.L238:
+	.loc 2 2488 0 discriminator 1
 	uxth	r4, r2
 	cmp	r0, r4
-	bls	.L252
-	.loc 2 2436 0
+	bls	.L240
+	.loc 2 2489 0
 	mul	r4, r5, r3
 	adds	r2, r2, #1
-.LVL295:
+.LVL283:
 	ldrh	r4, [r1, r4]
 	cmp	r4, r6
-	bne	.L254
-.L252:
-	.loc 2 2440 0
-	ldr	r2, .L255+16
+	bne	.L242
+.L240:
+	.loc 2 2493 0
+	ldr	r2, .L243+16
 	ldr	r2, [r2]
 	ldrh	r0, [r2, r3, lsl #1]
-.LVL296:
+.LVL284:
 	pop	{r4, r5, r6, pc}
-.LVL297:
-.L254:
+.LVL285:
+.L242:
 	mov	r3, r4
-.LVL298:
-	b	.L250
-.L253:
-	.loc 2 2427 0
+.LVL286:
+	b	.L238
+.L241:
+	.loc 2 2480 0
 	mov	r0, r3
-.LVL299:
-	.loc 2 2443 0
+.LVL287:
+	.loc 2 2496 0
 	pop	{r4, r5, r6, pc}
-.L256:
+.L244:
 	.align	2
-.L255:
+.L243:
 	.word	.LANCHOR47
 	.word	.LANCHOR48
-	.word	.LANCHOR41
-	.word	-1431655765
 	.word	.LANCHOR40
+	.word	-1431655765
+	.word	.LANCHOR43
 	.cfi_endproc
 .LFE298:
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
@@ -3346,7 +3207,7 @@ FtlPrintInfo2buf:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL300:
+.LVL288:
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 48
 	.cfi_offset 4, -32
@@ -3359,605 +3220,605 @@ FtlPrintInfo2buf:
 	.cfi_offset 14, -4
 	.loc 3 12 0
 	mov	r8, r0
-.LVL301:
+.LVL289:
 	.loc 3 16 0
-	ldr	r1, .L269
+	ldr	r1, .L257
 	bl	sprintf
-.LVL302:
+.LVL290:
 	.loc 3 17 0
-	ldr	r3, .L269+4
+	ldr	r3, .L257+4
 	.loc 3 16 0
 	add	r5, r8, r0
-.LVL303:
+.LVL291:
 	.loc 3 17 0
-	ldr	r1, .L269+8
+	ldr	r1, .L257+8
 	mov	r0, r5
 	.loc 3 31 0
-	ldr	r4, .L269+12
+	ldr	r4, .L257+12
 	.loc 3 17 0
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL304:
+.LVL292:
 	add	r5, r5, r0
-.LVL305:
+.LVL293:
 	.loc 3 18 0
-	ldr	r1, .L269+16
+	ldr	r1, .L257+16
 	mov	r0, r5
 	.loc 3 32 0
-	ldr	r10, .L269+352
+	ldr	r10, .L257+352
 	.loc 3 18 0
 	bl	sprintf
-.LVL306:
+.LVL294:
 	.loc 3 19 0
-	ldr	r3, .L269+20
+	ldr	r3, .L257+20
 	.loc 3 18 0
 	add	r5, r5, r0
-.LVL307:
+.LVL295:
 	.loc 3 19 0
-	ldr	r1, .L269+24
+	ldr	r1, .L257+24
 	mov	r0, r5
 	.loc 3 39 0
-	ldr	r6, .L269+28
+	ldr	r6, .L257+28
 	.loc 3 19 0
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL308:
+.LVL296:
 	.loc 3 20 0
-	ldr	r3, .L269+32
+	ldr	r3, .L257+32
 	.loc 3 19 0
 	add	r5, r5, r0
-.LVL309:
+.LVL297:
 	.loc 3 20 0
-	ldr	r1, .L269+36
+	ldr	r1, .L257+36
 	mov	r0, r5
 	.loc 3 67 0
-	ldr	r7, .L269+40
+	ldr	r7, .L257+40
 	.loc 3 20 0
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL310:
+.LVL298:
 	.loc 3 21 0
-	ldr	r3, .L269+44
+	ldr	r3, .L257+44
 	.loc 3 20 0
 	add	r5, r5, r0
-.LVL311:
+.LVL299:
 	.loc 3 21 0
-	ldr	r1, .L269+48
+	ldr	r1, .L257+48
 	mov	r0, r5
 	.loc 3 72 0
-	ldr	fp, .L269+356
+	ldr	fp, .L257+356
 	.loc 3 21 0
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL312:
+.LVL300:
 	.loc 3 22 0
-	ldr	r3, .L269+52
+	ldr	r3, .L257+52
 	.loc 3 21 0
 	add	r5, r5, r0
-.LVL313:
+.LVL301:
 	.loc 3 22 0
-	ldr	r1, .L269+56
+	ldr	r1, .L257+56
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL314:
+.LVL302:
 	.loc 3 23 0
-	ldr	r3, .L269+60
+	ldr	r3, .L257+60
 	.loc 3 22 0
 	add	r5, r5, r0
-.LVL315:
+.LVL303:
 	.loc 3 23 0
-	ldr	r1, .L269+64
+	ldr	r1, .L257+64
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL316:
+.LVL304:
 	.loc 3 24 0
-	ldr	r3, .L269+68
+	ldr	r3, .L257+68
 	.loc 3 23 0
 	add	r5, r5, r0
-.LVL317:
+.LVL305:
 	.loc 3 24 0
-	ldr	r1, .L269+72
+	ldr	r1, .L257+72
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL318:
+.LVL306:
 	.loc 3 25 0
-	ldr	r3, .L269+76
+	ldr	r3, .L257+76
 	.loc 3 24 0
 	add	r5, r5, r0
-.LVL319:
+.LVL307:
 	.loc 3 25 0
-	ldr	r1, .L269+80
+	ldr	r1, .L257+80
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL320:
+.LVL308:
 	.loc 3 26 0
-	ldr	r3, .L269+84
+	ldr	r3, .L257+84
 	.loc 3 25 0
 	add	r5, r5, r0
-.LVL321:
+.LVL309:
 	.loc 3 26 0
-	ldr	r1, .L269+88
+	ldr	r1, .L257+88
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL322:
+.LVL310:
 	.loc 3 27 0
-	ldr	r3, .L269+92
+	ldr	r3, .L257+92
 	.loc 3 26 0
 	add	r5, r5, r0
-.LVL323:
+.LVL311:
 	.loc 3 27 0
-	ldr	r1, .L269+96
+	ldr	r1, .L257+96
 	mov	r0, r5
 	ldr	r2, [r3]
 	lsrs	r2, r2, #11
 	bl	sprintf
-.LVL324:
+.LVL312:
 	.loc 3 28 0
-	ldr	r3, .L269+100
+	ldr	r3, .L257+100
 	.loc 3 27 0
 	add	r5, r5, r0
-.LVL325:
+.LVL313:
 	.loc 3 28 0
-	ldr	r1, .L269+104
+	ldr	r1, .L257+104
 	mov	r0, r5
 	ldr	r2, [r3]
 	lsrs	r2, r2, #11
 	bl	sprintf
-.LVL326:
+.LVL314:
 	.loc 3 29 0
-	ldr	r3, .L269+108
+	ldr	r3, .L257+108
 	.loc 3 28 0
 	add	r5, r5, r0
-.LVL327:
+.LVL315:
 	.loc 3 29 0
-	ldr	r1, .L269+112
+	ldr	r1, .L257+112
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL328:
+.LVL316:
 	.loc 3 30 0
-	ldr	r3, .L269+116
+	ldr	r3, .L257+116
 	.loc 3 29 0
 	add	r5, r5, r0
-.LVL329:
+.LVL317:
 	.loc 3 30 0
-	ldr	r1, .L269+120
+	ldr	r1, .L257+120
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL330:
+.LVL318:
 	add	r5, r5, r0
-.LVL331:
+.LVL319:
 	.loc 3 31 0
 	ldrh	r2, [r4, #6]
-	ldr	r1, .L269+124
+	ldr	r1, .L257+124
 	mov	r0, r5
 	bl	sprintf
-.LVL332:
+.LVL320:
 	add	r5, r5, r0
-.LVL333:
+.LVL321:
 	.loc 3 32 0
 	ldrh	r2, [r10]
-	ldr	r1, .L269+128
+	ldr	r1, .L257+128
 	mov	r0, r5
 	bl	sprintf
-.LVL334:
+.LVL322:
 	.loc 3 33 0
-	ldr	r3, .L269+132
+	ldr	r3, .L257+132
 	.loc 3 32 0
 	add	r5, r5, r0
-.LVL335:
+.LVL323:
 	.loc 3 33 0
-	ldr	r1, .L269+136
+	ldr	r1, .L257+136
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL336:
+.LVL324:
 	.loc 3 34 0
-	ldr	r3, .L269+140
+	ldr	r3, .L257+140
 	.loc 3 33 0
 	add	r5, r5, r0
-.LVL337:
+.LVL325:
 	.loc 3 34 0
-	ldr	r1, .L269+144
+	ldr	r1, .L257+144
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL338:
+.LVL326:
 	.loc 3 35 0
-	ldr	r3, .L269+148
+	ldr	r3, .L257+148
 	.loc 3 34 0
 	add	r5, r5, r0
-.LVL339:
+.LVL327:
 	.loc 3 35 0
-	ldr	r1, .L269+152
+	ldr	r1, .L257+152
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL340:
+.LVL328:
 	.loc 3 36 0
-	ldr	r3, .L269+156
+	ldr	r3, .L257+156
 	.loc 3 35 0
 	add	r5, r5, r0
-.LVL341:
+.LVL329:
 	.loc 3 36 0
-	ldr	r1, .L269+160
+	ldr	r1, .L257+160
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL342:
+.LVL330:
 	.loc 3 37 0
-	ldr	r3, .L269+164
+	ldr	r3, .L257+164
 	.loc 3 36 0
 	add	r5, r5, r0
-.LVL343:
+.LVL331:
 	.loc 3 37 0
-	ldr	r1, .L269+168
+	ldr	r1, .L257+168
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL344:
+.LVL332:
 	.loc 3 38 0
-	ldr	r3, .L269+172
+	ldr	r3, .L257+172
 	.loc 3 37 0
 	add	r5, r5, r0
-.LVL345:
+.LVL333:
 	.loc 3 38 0
-	ldr	r1, .L269+176
+	ldr	r1, .L257+176
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL346:
+.LVL334:
 	add	r5, r5, r0
-.LVL347:
+.LVL335:
 	.loc 3 39 0
 	ldrh	r2, [r6, #30]
-	ldr	r1, .L269+180
+	ldr	r1, .L257+180
 	mov	r0, r5
 	bl	sprintf
-.LVL348:
+.LVL336:
 	add	r5, r5, r0
-.LVL349:
+.LVL337:
 	.loc 3 40 0
 	ldrh	r2, [r6, #28]
-	ldr	r1, .L269+184
+	ldr	r1, .L257+184
 	mov	r0, r5
 	bl	sprintf
-.LVL350:
+.LVL338:
 	.loc 3 41 0
-	ldr	r3, .L269+188
+	ldr	r3, .L257+188
 	.loc 3 40 0
 	add	r5, r5, r0
-.LVL351:
+.LVL339:
 	.loc 3 41 0
-	ldr	r1, .L269+192
+	ldr	r1, .L257+192
 	mov	r0, r5
 	.loc 3 55 0
-	ldr	r6, .L269+196
+	ldr	r6, .L257+196
 	.loc 3 41 0
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL352:
+.LVL340:
 	.loc 3 42 0
-	ldr	r3, .L269+200
+	ldr	r3, .L257+200
 	.loc 3 41 0
 	add	r5, r5, r0
-.LVL353:
+.LVL341:
 	.loc 3 42 0
-	ldr	r1, .L269+204
+	ldr	r1, .L257+204
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL354:
+.LVL342:
 	.loc 3 43 0
-	ldr	r3, .L269+208
+	ldr	r3, .L257+208
 	.loc 3 42 0
 	add	r5, r5, r0
-.LVL355:
+.LVL343:
 	.loc 3 43 0
-	ldr	r1, .L269+212
+	ldr	r1, .L257+212
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL356:
+.LVL344:
 	.loc 3 44 0
-	ldr	r3, .L269+216
+	ldr	r3, .L257+216
 	.loc 3 43 0
 	add	r5, r5, r0
-.LVL357:
+.LVL345:
 	.loc 3 44 0
-	ldr	r1, .L269+220
+	ldr	r1, .L257+220
 	mov	r0, r5
 	ldrh	r2, [r3, #6]
 	bl	sprintf
-.LVL358:
+.LVL346:
 	.loc 3 45 0
-	ldr	r3, .L269+224
+	ldr	r3, .L257+224
 	.loc 3 44 0
 	add	r5, r5, r0
-.LVL359:
+.LVL347:
 	.loc 3 45 0
-	ldr	r1, .L269+228
+	ldr	r1, .L257+228
 	mov	r0, r5
 	ldrh	r2, [r3]
 	bl	sprintf
-.LVL360:
+.LVL348:
 	.loc 3 46 0
-	ldr	r3, .L269+232
+	ldr	r3, .L257+232
 	.loc 3 45 0
 	add	r5, r5, r0
-.LVL361:
+.LVL349:
 	.loc 3 46 0
-	ldr	r1, .L269+236
+	ldr	r1, .L257+236
 	mov	r0, r5
 	ldrh	r2, [r3]
 	bl	sprintf
-.LVL362:
+.LVL350:
 	.loc 3 47 0
-	ldr	r3, .L269+240
+	ldr	r3, .L257+240
 	.loc 3 46 0
 	add	r5, r5, r0
-.LVL363:
+.LVL351:
 	.loc 3 47 0
-	ldr	r1, .L269+244
+	ldr	r1, .L257+244
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL364:
+.LVL352:
 	.loc 3 48 0
-	ldr	r3, .L269+248
+	ldr	r3, .L257+248
 	.loc 3 47 0
 	add	r5, r5, r0
-.LVL365:
+.LVL353:
 	.loc 3 48 0
-	ldr	r1, .L269+252
+	ldr	r1, .L257+252
 	mov	r0, r5
 	ldrh	r2, [r3]
 	bl	sprintf
-.LVL366:
+.LVL354:
 	.loc 3 49 0
 	ldrh	r2, [r4]
 	.loc 3 48 0
 	add	r5, r5, r0
-.LVL367:
+.LVL355:
 	.loc 3 50 0
-	ldr	r4, .L269+256
+	ldr	r4, .L257+256
 	.loc 3 49 0
 	mov	r0, r5
-	ldr	r1, .L269+260
+	ldr	r1, .L257+260
 	bl	sprintf
-.LVL368:
+.LVL356:
 	add	r5, r5, r0
-.LVL369:
+.LVL357:
 	.loc 3 50 0
 	ldrh	r2, [r4, #2]
-	ldr	r1, .L269+264
+	ldr	r1, .L257+264
 	mov	r0, r5
 	bl	sprintf
-.LVL370:
+.LVL358:
 	add	r5, r5, r0
-.LVL371:
+.LVL359:
 	.loc 3 51 0
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-	ldr	r1, .L269+268
+	ldr	r1, .L257+268
 	mov	r0, r5
 	bl	sprintf
-.LVL372:
+.LVL360:
 	add	r5, r5, r0
-.LVL373:
+.LVL361:
 	.loc 3 52 0
 	ldrh	r2, [r4]
-	ldr	r1, .L269+272
+	ldr	r1, .L257+272
 	mov	r0, r5
 	bl	sprintf
-.LVL374:
+.LVL362:
 	add	r5, r5, r0
-.LVL375:
+.LVL363:
 	.loc 3 53 0
 	ldrb	r2, [r4, #8]	@ zero_extendqisi2
-	ldr	r1, .L269+276
+	ldr	r1, .L257+276
 	mov	r0, r5
 	bl	sprintf
-.LVL376:
+.LVL364:
 	add	r5, r5, r0
-.LVL377:
+.LVL365:
 	.loc 3 54 0
 	ldrh	r2, [r4, #4]
-	ldr	r1, .L269+280
+	ldr	r1, .L257+280
 	mov	r0, r5
 	bl	sprintf
-.LVL378:
+.LVL366:
 	.loc 3 55 0
 	ldr	r3, [r6]
 	.loc 3 54 0
 	add	r5, r5, r0
-.LVL379:
+.LVL367:
 	.loc 3 55 0
 	ldrh	r2, [r4]
 	mov	r0, r5
 	.loc 3 56 0
-	ldr	r4, .L269+284
+	ldr	r4, .L257+284
 	.loc 3 55 0
-	ldr	r1, .L269+288
+	ldr	r1, .L257+288
 	ldrh	r2, [r3, r2, lsl #1]
 	bl	sprintf
-.LVL380:
+.LVL368:
 	add	r5, r5, r0
-.LVL381:
+.LVL369:
 	.loc 3 56 0
 	ldrh	r2, [r4, #2]
-	ldr	r1, .L269+292
+	ldr	r1, .L257+292
 	mov	r0, r5
 	bl	sprintf
-.LVL382:
+.LVL370:
 	add	r5, r5, r0
-.LVL383:
+.LVL371:
 	.loc 3 57 0
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-	ldr	r1, .L269+296
+	ldr	r1, .L257+296
 	mov	r0, r5
 	bl	sprintf
-.LVL384:
+.LVL372:
 	add	r5, r5, r0
-.LVL385:
+.LVL373:
 	.loc 3 58 0
 	ldrh	r2, [r4]
-	ldr	r1, .L269+300
+	ldr	r1, .L257+300
 	mov	r0, r5
 	bl	sprintf
-.LVL386:
+.LVL374:
 	add	r5, r5, r0
-.LVL387:
+.LVL375:
 	.loc 3 59 0
 	ldrb	r2, [r4, #8]	@ zero_extendqisi2
-	ldr	r1, .L269+304
+	ldr	r1, .L257+304
 	mov	r0, r5
 	bl	sprintf
-.LVL388:
+.LVL376:
 	add	r5, r5, r0
-.LVL389:
+.LVL377:
 	.loc 3 60 0
 	ldrh	r2, [r4, #4]
-	ldr	r1, .L269+308
+	ldr	r1, .L257+308
 	mov	r0, r5
 	bl	sprintf
-.LVL390:
+.LVL378:
 	.loc 3 61 0
 	ldr	r3, [r6]
 	.loc 3 60 0
 	add	r5, r5, r0
-.LVL391:
+.LVL379:
 	.loc 3 61 0
 	ldrh	r2, [r4]
 	mov	r0, r5
 	.loc 3 62 0
-	ldr	r4, .L269+312
+	ldr	r4, .L257+312
 	.loc 3 61 0
-	ldr	r1, .L269+316
+	ldr	r1, .L257+316
 	ldrh	r2, [r3, r2, lsl #1]
 	bl	sprintf
-.LVL392:
+.LVL380:
 	add	r5, r5, r0
-.LVL393:
+.LVL381:
 	.loc 3 62 0
 	ldrh	r2, [r4, #2]
-	ldr	r1, .L269+320
+	ldr	r1, .L257+320
 	mov	r0, r5
 	bl	sprintf
-.LVL394:
+.LVL382:
 	add	r5, r5, r0
-.LVL395:
+.LVL383:
 	.loc 3 63 0
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-	ldr	r1, .L269+324
+	ldr	r1, .L257+324
 	mov	r0, r5
 	bl	sprintf
-.LVL396:
+.LVL384:
 	add	r5, r5, r0
-.LVL397:
+.LVL385:
 	.loc 3 64 0
 	ldrh	r2, [r4]
-	ldr	r1, .L269+328
+	ldr	r1, .L257+328
 	mov	r0, r5
 	bl	sprintf
-.LVL398:
+.LVL386:
 	add	r5, r5, r0
-.LVL399:
+.LVL387:
 	.loc 3 65 0
 	ldrb	r2, [r4, #8]	@ zero_extendqisi2
-	ldr	r1, .L269+332
+	ldr	r1, .L257+332
 	mov	r0, r5
 	bl	sprintf
-.LVL400:
+.LVL388:
 	add	r5, r5, r0
-.LVL401:
+.LVL389:
 	.loc 3 66 0
 	ldrh	r2, [r4, #4]
-	ldr	r1, .L269+336
+	ldr	r1, .L257+336
 	mov	r0, r5
 	bl	sprintf
-.LVL402:
+.LVL390:
 	add	r5, r5, r0
-.LVL403:
+.LVL391:
 	.loc 3 67 0
 	ldrh	r2, [r7, #2]
-	ldr	r1, .L269+340
+	ldr	r1, .L257+340
 	mov	r0, r5
 	bl	sprintf
-.LVL404:
+.LVL392:
 	add	r5, r5, r0
-.LVL405:
+.LVL393:
 	.loc 3 68 0
 	ldrb	r2, [r7, #6]	@ zero_extendqisi2
-	ldr	r1, .L269+344
+	ldr	r1, .L257+344
 	mov	r0, r5
 	bl	sprintf
-.LVL406:
+.LVL394:
 	add	r5, r5, r0
-.LVL407:
+.LVL395:
 	.loc 3 69 0
 	ldrh	r2, [r7]
-	ldr	r1, .L269+348
+	ldr	r1, .L257+348
 	mov	r0, r5
-	b	.L270
-.L271:
+	b	.L258
+.L259:
 	.align	2
-.L269:
+.L257:
 	.word	.LC2
 	.word	.LANCHOR26
 	.word	.LC3
 	.word	.LANCHOR37
 	.word	.LC4
-	.word	.LANCHOR62
+	.word	.LANCHOR61
 	.word	.LC5
-	.word	.LANCHOR79
-	.word	.LANCHOR60
+	.word	.LANCHOR39
+	.word	.LANCHOR59
 	.word	.LC6
-	.word	.LANCHOR82
-	.word	.LANCHOR63
+	.word	.LANCHOR80
+	.word	.LANCHOR62
 	.word	.LC7
-	.word	.LANCHOR64
+	.word	.LANCHOR63
 	.word	.LC8
-	.word	.LANCHOR65
+	.word	.LANCHOR64
 	.word	.LC9
-	.word	.LANCHOR66
+	.word	.LANCHOR65
 	.word	.LC10
-	.word	.LANCHOR67
+	.word	.LANCHOR66
 	.word	.LC11
-	.word	.LANCHOR68
+	.word	.LANCHOR67
 	.word	.LC12
-	.word	.LANCHOR69
+	.word	.LANCHOR68
 	.word	.LC13
-	.word	.LANCHOR70
+	.word	.LANCHOR69
 	.word	.LC14
-	.word	.LANCHOR71
+	.word	.LANCHOR70
 	.word	.LC15
-	.word	.LANCHOR72
+	.word	.LANCHOR71
 	.word	.LC16
 	.word	.LC17
 	.word	.LC18
-	.word	.LANCHOR73
+	.word	.LANCHOR72
 	.word	.LC19
-	.word	.LANCHOR74
+	.word	.LANCHOR73
 	.word	.LC20
-	.word	.LANCHOR75
+	.word	.LANCHOR74
 	.word	.LC21
-	.word	.LANCHOR76
+	.word	.LANCHOR75
 	.word	.LC22
-	.word	.LANCHOR77
+	.word	.LANCHOR76
 	.word	.LC23
-	.word	.LANCHOR78
+	.word	.LANCHOR77
 	.word	.LC24
 	.word	.LC25
 	.word	.LC26
 	.word	.LANCHOR34
 	.word	.LC27
-	.word	.LANCHOR43
+	.word	.LANCHOR42
 	.word	.LANCHOR31
 	.word	.LC28
 	.word	.LANCHOR2
@@ -3966,11 +3827,11 @@ FtlPrintInfo2buf:
 	.word	.LC30
 	.word	.LANCHOR5
 	.word	.LC31
-	.word	.LANCHOR80
+	.word	.LANCHOR78
 	.word	.LC32
 	.word	.LANCHOR7
 	.word	.LC33
-	.word	.LANCHOR81
+	.word	.LANCHOR79
 	.word	.LC34
 	.word	.LANCHOR51
 	.word	.LC35
@@ -3997,130 +3858,130 @@ FtlPrintInfo2buf:
 	.word	.LC54
 	.word	.LC55
 	.word	.LANCHOR48
-	.word	.LANCHOR83
-.L270:
+	.word	.LANCHOR81
+.L258:
 	bl	sprintf
-.LVL408:
+.LVL396:
 	add	r5, r5, r0
-.LVL409:
+.LVL397:
 	.loc 3 70 0
 	ldrb	r2, [r7, #8]	@ zero_extendqisi2
-	ldr	r1, .L272
+	ldr	r1, .L260
 	mov	r0, r5
 	bl	sprintf
-.LVL410:
+.LVL398:
 	add	r5, r5, r0
-.LVL411:
+.LVL399:
 	.loc 3 71 0
 	ldrh	r2, [r7, #4]
-	ldr	r1, .L272+4
+	ldr	r1, .L260+4
 	mov	r0, r5
 	bl	sprintf
-.LVL412:
+.LVL400:
 	.loc 3 72 0
 	ldr	r3, [fp, #76]
 	.loc 3 71 0
 	add	r5, r5, r0
-.LVL413:
+.LVL401:
 	.loc 3 72 0
-	ldr	r1, .L272+8
+	ldr	r1, .L260+8
 	mov	r0, r5
 	str	r3, [sp]
 	ldr	r3, [fp, #84]
 	ldr	r2, [fp, #80]
 	bl	sprintf
-.LVL414:
+.LVL402:
 	adds	r4, r5, r0
-.LVL415:
+.LVL403:
 	.loc 3 73 0
 	ldr	r2, [fp, #72]
-	ldr	r1, .L272+12
+	ldr	r1, .L260+12
 	mov	r0, r4
 	bl	sprintf
-.LVL416:
+.LVL404:
 	add	r4, r4, r0
-.LVL417:
+.LVL405:
 	.loc 3 74 0
 	ldr	r2, [fp, #96]
-	ldr	r1, .L272+16
+	ldr	r1, .L260+16
 	mov	r0, r4
 	bl	sprintf
-.LVL418:
+.LVL406:
 	.loc 3 75 0
-	ldr	r3, .L272+20
+	ldr	r3, .L260+20
 	.loc 3 74 0
 	add	r4, r4, r0
-.LVL419:
+.LVL407:
 	.loc 3 75 0
-	ldr	r1, .L272+24
+	ldr	r1, .L260+24
 	mov	r0, r4
 	ldrh	r2, [r3]
 	bl	sprintf
-.LVL420:
+.LVL408:
 	.loc 3 76 0
-	ldr	r3, .L272+28
+	ldr	r3, .L260+28
 	.loc 3 75 0
 	add	r4, r4, r0
-.LVL421:
+.LVL409:
 	.loc 3 76 0
-	ldr	r1, .L272+32
+	ldr	r1, .L260+32
 	mov	r0, r4
 	ldrh	r2, [r3]
 	bl	sprintf
-.LVL422:
+.LVL410:
 	.loc 3 77 0
-	ldr	r3, .L272+36
+	ldr	r3, .L260+36
 	.loc 3 76 0
 	add	r4, r4, r0
-.LVL423:
+.LVL411:
 	.loc 3 77 0
-	ldr	r1, .L272+40
+	ldr	r1, .L260+40
 	mov	r0, r4
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL424:
+.LVL412:
 	.loc 3 78 0
-	ldr	r3, .L272+44
+	ldr	r3, .L260+44
 	.loc 3 77 0
 	add	r4, r4, r0
-.LVL425:
+.LVL413:
 	.loc 3 78 0
-	ldr	r1, .L272+48
+	ldr	r1, .L260+48
 	mov	r0, r4
 	ldrh	r2, [r3]
 	bl	sprintf
-.LVL426:
+.LVL414:
 	add	r4, r4, r0
-.LVL427:
+.LVL415:
 	.loc 3 79 0
 	bl	GetFreeBlockMinEraseCount
-.LVL428:
-	ldr	r1, .L272+52
+.LVL416:
+	ldr	r1, .L260+52
 	mov	r2, r0
 	mov	r0, r4
 	bl	sprintf
-.LVL429:
+.LVL417:
 	add	r4, r4, r0
-.LVL430:
+.LVL418:
 	.loc 3 80 0
 	ldrh	r0, [r10]
 	bl	GetFreeBlockMaxEraseCount
-.LVL431:
-	ldr	r1, .L272+56
+.LVL419:
+	ldr	r1, .L260+56
 	mov	r2, r0
 	mov	r0, r4
 	bl	sprintf
-.LVL432:
+.LVL420:
 	.loc 3 81 0
-	ldr	r3, .L272+60
+	ldr	r3, .L260+60
 	.loc 3 80 0
 	add	r4, r4, r0
-.LVL433:
+.LVL421:
 	.loc 3 81 0
 	ldr	r3, [r3]
 	cmp	r3, #1
-	beq	.L258
-.L263:
+	beq	.L246
+.L251:
 	.loc 3 104 0
 	sub	r0, r4, r8
 	.loc 3 105 0
@@ -4129,48 +3990,48 @@ FtlPrintInfo2buf:
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL434:
-.L258:
+.LVL422:
+.L246:
 	.cfi_restore_state
 	.loc 3 84 0
 	ldrh	r3, [r7]
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L260
+	beq	.L248
 	.loc 3 85 0
 	ldr	r2, [r6]
 	mov	r0, r4
-	ldr	r1, .L272+64
+	ldr	r1, .L260+64
 	ldrh	r2, [r2, r3, lsl #1]
 	bl	sprintf
-.LVL435:
+.LVL423:
 	add	r4, r4, r0
-.LVL436:
-.L260:
-.LBB211:
+.LVL424:
+.L248:
+.LBB225:
 	.loc 3 87 0
 	movs	r0, #0
-	ldr	r5, .L272+68
+	ldr	r5, .L260+68
 	.loc 3 91 0
-	ldr	fp, .L272+84
+	ldr	fp, .L260+84
 	.loc 3 88 0
 	movs	r7, #0
 	.loc 3 87 0
 	bl	List_get_gc_head_node
-.LVL437:
+.LVL425:
 	uxth	r3, r0
-.LVL438:
-.L262:
+.LVL426:
+.L250:
 	.loc 3 89 0
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L261
+	beq	.L249
 	.loc 3 91 0 discriminator 2
 	ldr	r2, [fp]
 	mov	r10, #6
 	mul	r10, r10, r3
 	mov	r0, r4
-	ldr	r1, .L272+72
+	ldr	r1, .L260+72
 	ldrh	r2, [r2, r3, lsl #1]
 	str	r2, [sp, #8]
 	ldr	r2, [r5]
@@ -4182,51 +4043,51 @@ FtlPrintInfo2buf:
 	str	r2, [sp]
 	mov	r2, r7
 	bl	sprintf
-.LVL439:
+.LVL427:
 	.loc 3 88 0 discriminator 2
 	adds	r7, r7, #1
-.LVL440:
+.LVL428:
 	.loc 3 92 0 discriminator 2
 	ldr	r3, [r5]
 	.loc 3 88 0 discriminator 2
 	cmp	r7, #16
 	.loc 3 91 0 discriminator 2
 	add	r4, r4, r0
-.LVL441:
+.LVL429:
 	.loc 3 92 0 discriminator 2
 	ldrh	r3, [r3, r10]
-.LVL442:
+.LVL430:
 	.loc 3 88 0 discriminator 2
-	bne	.L262
-.L261:
-.LBE211:
-.LBB212:
+	bne	.L250
+.L249:
+.LBE225:
+.LBB226:
 	.loc 3 96 0
-	ldr	r3, .L272+76
-.LVL443:
+	ldr	r3, .L260+76
+.LVL431:
 	.loc 3 97 0
 	movs	r7, #0
-.LVL444:
+.LVL432:
 	.loc 3 96 0
 	ldr	r2, [r5]
 	.loc 3 100 0
-	ldr	r10, .L272+84
+	ldr	r10, .L260+84
 	.loc 3 96 0
 	ldr	r3, [r3]
 	.loc 3 100 0
-	ldr	fp, .L272+88
+	ldr	fp, .L260+88
 	.loc 3 96 0
 	subs	r3, r3, r2
-	ldr	r2, .L272+80
+	ldr	r2, .L260+80
 	asrs	r3, r3, #1
 	muls	r3, r2, r3
 	uxth	r3, r3
-.LVL445:
-.L264:
+.LVL433:
+.L252:
 	.loc 3 98 0
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L263
+	beq	.L251
 	.loc 3 100 0 discriminator 2
 	ldr	r2, [r10]
 	movs	r6, #6
@@ -4242,48 +4103,48 @@ FtlPrintInfo2buf:
 	mov	r2, r7
 	.loc 3 97 0 discriminator 2
 	adds	r7, r7, #1
-.LVL446:
+.LVL434:
 	.loc 3 100 0 discriminator 2
 	bl	sprintf
-.LVL447:
+.LVL435:
 	.loc 3 97 0 discriminator 2
 	cmp	r7, #4
 	.loc 3 100 0 discriminator 2
 	add	r4, r4, r0
-.LVL448:
+.LVL436:
 	.loc 3 97 0 discriminator 2
-	beq	.L263
+	beq	.L251
 	.loc 3 101 0
 	ldr	r3, [r5]
 	ldrh	r3, [r3, r6]
-	b	.L264
-.L273:
+	b	.L252
+.L261:
 	.align	2
-.L272:
+.L260:
 	.word	.LC56
 	.word	.LC57
 	.word	.LC58
 	.word	.LC59
 	.word	.LC60
-	.word	.LANCHOR84
+	.word	.LANCHOR82
 	.word	.LC61
-	.word	.LANCHOR85
+	.word	.LANCHOR83
 	.word	.LC62
-	.word	.LANCHOR86
+	.word	.LANCHOR84
 	.word	.LC63
-	.word	.LANCHOR87
+	.word	.LANCHOR85
 	.word	.LC64
 	.word	.LC65
 	.word	.LC66
-	.word	.LANCHOR88
+	.word	.LANCHOR86
 	.word	.LC67
-	.word	.LANCHOR41
+	.word	.LANCHOR40
 	.word	.LC68
 	.word	.LANCHOR47
 	.word	-1431655765
-	.word	.LANCHOR40
+	.word	.LANCHOR43
 	.word	.LC69
-.LBE212:
+.LBE226:
 	.cfi_endproc
 .LFE203:
 	.size	FtlPrintInfo2buf, .-FtlPrintInfo2buf
@@ -4301,7 +4162,7 @@ rknand_proc_ftlread:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL449:
+.LVL437:
 	push	{r3, r4, r5, lr}
 	.cfi_def_cfa_offset 16
 	.cfi_offset 3, -16
@@ -4310,28 +4171,28 @@ rknand_proc_ftlread:
 	.cfi_offset 14, -4
 	.loc 3 114 0
 	mov	r5, r0
-.LVL450:
+.LVL438:
 	.loc 3 120 0
-	ldr	r2, .L275
-	ldr	r1, .L275+4
+	ldr	r2, .L263
+	ldr	r1, .L263+4
 	bl	sprintf
-.LVL451:
+.LVL439:
 	adds	r4, r5, r0
-.LVL452:
+.LVL440:
 	.loc 3 122 0
 	mov	r0, r4
 	bl	FtlPrintInfo2buf
-.LVL453:
+.LVL441:
 	add	r0, r0, r4
-.LVL454:
+.LVL442:
 	.loc 3 124 0
 	subs	r0, r0, r5
-.LVL455:
+.LVL443:
 	pop	{r3, r4, r5, pc}
-.LVL456:
-.L276:
+.LVL444:
+.L264:
 	.align	2
-.L275:
+.L263:
 	.word	.LC70
 	.word	.LC71
 	.cfi_endproc
@@ -4347,13 +4208,13 @@ rknand_proc_ftlread:
 	.type	GetSwlReplaceBlock, %function
 GetSwlReplaceBlock:
 .LFB299:
-	.loc 2 2447 0
+	.loc 2 2500 0
 	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL457:
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 48
+.LVL445:
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
 	.cfi_offset 4, -32
 	.cfi_offset 5, -28
 	.cfi_offset 6, -24
@@ -4362,215 +4223,219 @@ GetSwlReplaceBlock:
 	.cfi_offset 10, -12
 	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	.loc 2 2456 0
-	ldr	r3, .L306
-	ldr	r6, .L306+4
+	sub	sp, sp, #24
+	.cfi_def_cfa_offset 56
+	.loc 2 2510 0
+	ldr	r3, .L293
+	ldr	r6, .L293+4
 	ldr	r5, [r3]
 	mov	r10, r3
 	ldr	r1, [r6]
 	cmp	r1, r5
-	bcs	.L278
-	.loc 2 2459 0
-	ldr	r2, .L306+8
-	.loc 2 2458 0
+	bcs	.L266
+	.loc 2 2513 0
+	ldr	r2, .L293+8
+	.loc 2 2512 0
 	movs	r3, #0
-	ldr	r4, .L306+12
-	.loc 2 2459 0
+	ldr	r4, .L293+12
+	.loc 2 2513 0
 	mov	r0, r3
 	ldrh	r1, [r2]
-	.loc 2 2460 0
-	ldr	r2, .L306+16
-	.loc 2 2458 0
+	.loc 2 2514 0
+	ldr	r2, .L293+16
+	.loc 2 2512 0
 	str	r3, [r4]
-.LVL458:
-	.loc 2 2460 0
+.LVL446:
+	.loc 2 2514 0
 	ldr	r7, [r2]
-	.loc 2 2459 0
+	.loc 2 2513 0
 	mov	r2, r3
-.LVL459:
-.L279:
-	.loc 2 2459 0 is_stmt 0 discriminator 1
+.LVL447:
+.L267:
+	.loc 2 2513 0 is_stmt 0 discriminator 1
 	cmp	r2, r1
-	bcc	.L280
-	cbz	r3, .L281
+	bcc	.L268
+	cbz	r3, .L269
 	str	r0, [r4]
-.L281:
-	.loc 2 2461 0 is_stmt 1
+.L269:
+	.loc 2 2515 0 is_stmt 1
 	ldr	r7, [r4]
 	mov	r0, r7
 	bl	__aeabi_uidiv
-.LVL460:
-	.loc 2 2462 0
-	ldr	r3, .L306+20
-	.loc 2 2461 0
+.LVL448:
+	.loc 2 2516 0
+	ldr	r3, .L293+20
+	.loc 2 2515 0
 	str	r0, [r6]
-	.loc 2 2462 0
+	.loc 2 2516 0
 	ldr	r0, [r3]
-	ldr	r3, .L306+24
+	ldr	r3, .L293+24
 	subs	r0, r7, r0
 	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
-.LVL461:
+.LVL449:
 	str	r0, [r4]
-.L282:
-	.loc 2 2468 0
+.L270:
+	.loc 2 2522 0
 	ldr	r6, [r6]
 	add	r3, r5, #256
 	cmp	r3, r6
-	bls	.L287
-	.loc 2 2468 0 is_stmt 0 discriminator 1
-	ldr	r2, .L306+28
+	bls	.L275
+	.loc 2 2522 0 is_stmt 0 discriminator 1
+	ldr	r2, .L293+28
 	add	r3, r5, #768
 	ldr	r2, [r2]
 	cmp	r3, r2
-	bls	.L287
-.LVL462:
-.L290:
-	.loc 2 2469 0 is_stmt 1
+	bls	.L275
+.LVL450:
+.L277:
+	.loc 2 2523 0 is_stmt 1
 	movw	r4, #65535
-.L288:
-	.loc 2 2518 0
+.L276:
+	.loc 2 2569 0
 	mov	r0, r4
-	add	sp, sp, #16
+	add	sp, sp, #24
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL463:
-.L280:
+.LVL451:
+.L268:
 	.cfi_restore_state
-	.loc 2 2460 0 discriminator 3
+	.loc 2 2514 0 discriminator 3
 	ldrh	r3, [r7, r2, lsl #1]
-	.loc 2 2459 0 discriminator 3
+	.loc 2 2513 0 discriminator 3
 	adds	r2, r2, #1
-.LVL464:
-	.loc 2 2460 0 discriminator 3
+.LVL452:
+	.loc 2 2514 0 discriminator 3
 	add	r0, r0, r3
 	movs	r3, #1
-	b	.L279
-.LVL465:
-.L278:
-	.loc 2 2463 0
-	ldr	r2, .L306+28
+	b	.L267
+.LVL453:
+.L266:
+	.loc 2 2517 0
+	ldr	r2, .L293+28
 	ldr	r3, [r2]
 	cmp	r1, r3
-	bls	.L282
-	.loc 2 2464 0
+	bls	.L270
+	.loc 2 2518 0
 	adds	r3, r3, #1
-	.loc 2 2465 0
-	ldr	r0, .L306+8
-	.loc 2 2464 0
+	.loc 2 2519 0
+	ldr	r0, .L293+8
+	.loc 2 2518 0
 	str	r3, [r2]
-.LVL466:
-	.loc 2 2465 0
+.LVL454:
+	.loc 2 2519 0
 	movs	r2, #0
-	.loc 2 2466 0
-	ldr	r3, .L306+16
+	.loc 2 2520 0
+	ldr	r3, .L293+16
 	ldr	r3, [r3]
 	subs	r3, r3, #2
-.LVL467:
-.L284:
-	.loc 2 2465 0 discriminator 1
+.LVL455:
+.L272:
+	.loc 2 2519 0 discriminator 1
 	ldrh	r1, [r0]
 	cmp	r2, r1
-	bcs	.L282
-	.loc 2 2466 0 discriminator 3
+	bcs	.L270
+	.loc 2 2520 0 discriminator 3
 	ldrh	r1, [r3, #2]
-	.loc 2 2465 0 discriminator 3
+	.loc 2 2519 0 discriminator 3
 	adds	r2, r2, #1
-.LVL468:
-	.loc 2 2466 0 discriminator 3
+.LVL456:
+	.loc 2 2520 0 discriminator 3
 	adds	r1, r1, #1
 	strh	r1, [r3, #2]!	@ movhi
-	b	.L284
-.LVL469:
-.L287:
-	.loc 2 2471 0
-	ldr	r3, .L306+32
+	b	.L272
+.LVL457:
+.L275:
+	.loc 2 2525 0
+	ldr	r3, .L293+32
 	ldrh	r0, [r3]
 	add	r0, r0, r0, lsl #1
 	ubfx	r0, r0, #2, #16
 	bl	GetFreeBlockMaxEraseCount
-.LVL470:
-	.loc 2 2472 0
+.LVL458:
+	.loc 2 2526 0
 	add	r3, r5, #64
-	.loc 2 2471 0
+	.loc 2 2525 0
 	mov	r2, r0
-.LVL471:
-	.loc 2 2472 0
+.LVL459:
+	.loc 2 2526 0
 	cmp	r0, r3
-	bcs	.L289
-	.loc 2 2472 0 is_stmt 0 discriminator 1
-	cmp	r5, #30
-	bhi	.L290
-.L289:
-	.loc 2 2476 0 is_stmt 1
-	ldr	r3, .L306+36
+	bcc	.L277
+	.loc 2 2529 0
+	ldr	r3, .L293+36
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L290
-	.loc 2 2483 0
-	ldr	r1, .L306+40
-	.loc 2 2495 0
+	beq	.L277
+	.loc 2 2533 0
+	ldr	r1, .L293+8
+	.loc 2 2537 0
+	movs	r0, #0
+.LVL460:
+	.loc 2 2546 0
 	mov	fp, #6
-	.loc 2 2483 0
-	ldr	lr, [r1]
-	.loc 2 2484 0
-	ldr	r1, .L306+16
-	ldr	r0, [r1]
-.LVL472:
+	.loc 2 2533 0
+	ldrh	r1, [r1]
+	str	r1, [sp, #20]
+	.loc 2 2536 0
+	ldr	r1, .L293+40
+	ldr	r8, [r1]
+	.loc 2 2537 0
+	ldr	r1, .L293+16
+	ldr	r7, [r1]
 	movw	r1, #65535
-	mov	r7, r1
-	.loc 2 2479 0
-	mov	r8, r1
-.LVL473:
-.L291:
-	ldrh	ip, [r3]
-	cmp	ip, r8
-	bne	.L294
-	mov	r4, r7
-.LVL474:
-.L293:
-	.loc 2 2498 0
+	mov	ip, r1
+.LVL461:
+.L278:
+	.loc 2 2531 0
+	ldrh	lr, [r3]
+	movw	r4, #65535
+	cmp	lr, r4
+	bne	.L281
+	mov	r4, ip
+.LVL462:
+.L280:
+	.loc 2 2549 0
 	movw	r3, #65535
 	cmp	r4, r3
-	beq	.L290
-	.loc 2 2500 0
-	ldrh	r7, [r0, r4, lsl #1]
-.LVL475:
+	beq	.L277
+	.loc 2 2551 0
+	ldrh	r7, [r7, r4, lsl #1]
+.LVL463:
 	lsl	r8, r4, #1
-	.loc 2 2501 0
+	.loc 2 2552 0
 	cmp	r5, r7
-	bcs	.L295
-	.loc 2 2503 0
+	bcs	.L282
+	.loc 2 2554 0
 	bl	GetFreeBlockMinEraseCount
-.LVL476:
+.LVL464:
 	cmp	r5, r0
-	.loc 2 2504 0
+	.loc 2 2555 0
 	it	cc
 	strcc	r1, [r10]
-.L295:
-	.loc 2 2506 0
+.L282:
+	.loc 2 2557 0
 	cmp	r6, r7
-	bls	.L290
-	.loc 2 2506 0 is_stmt 0 discriminator 1
+	bls	.L277
+	.loc 2 2557 0 is_stmt 0 discriminator 1
 	add	r3, r7, #128
 	cmp	r2, r3
-	ble	.L290
-	.loc 2 2508 0 is_stmt 1
+	ble	.L277
+	.loc 2 2559 0 is_stmt 1
 	add	r3, r7, #256
-	ldr	r0, .L306+28
+	ldr	r0, .L293+28
 	cmp	r6, r3
-	bhi	.L296
-	.loc 2 2508 0 is_stmt 0 discriminator 1
+	bhi	.L283
+	.loc 2 2559 0 is_stmt 0 discriminator 1
 	ldr	r1, [r0]
-.LVL477:
+.LVL465:
 	add	r3, r7, #768
 	cmp	r3, r1
-	bcs	.L290
-.L296:
-	.loc 2 2510 0 is_stmt 1
-	ldr	r3, .L306+44
+	bcs	.L277
+.L283:
+	.loc 2 2561 0 is_stmt 1
+	ldr	r3, .L293+44
 	mov	r1, r4
 	str	r2, [sp, #8]
 	mov	r2, r6
@@ -4579,62 +4444,73 @@ GetSwlReplaceBlock:
 	ldrh	r3, [r3, r8]
 	str	r3, [sp]
 	ldr	r3, [r0]
-	ldr	r0, .L306+48
+	ldr	r0, .L293+48
 	bl	printf
-.LVL478:
-	.loc 2 2511 0
-	ldr	r3, .L306+52
+.LVL466:
+	.loc 2 2562 0
+	ldr	r3, .L293+52
 	movs	r2, #1
 	str	r2, [r3]
-	.loc 2 2512 0
-	b	.L288
-.LVL479:
-.L294:
-	.loc 2 2481 0
+	.loc 2 2563 0
+	b	.L276
+.LVL467:
+.L281:
+	.loc 2 2532 0
+	adds	r0, r0, #1
+.LVL468:
+	.loc 2 2533 0
+	ldr	r4, [sp, #20]
+	.loc 2 2532 0
+	uxth	r0, r0
+.LVL469:
+	.loc 2 2533 0
+	cmp	r0, r4
+	bhi	.L277
+	.loc 2 2535 0
 	ldrh	r4, [r3, #4]
-	cbz	r4, .L292
-	.loc 2 2483 0
-	ldr	r4, .L306+56
-	sub	r3, r3, lr
-.LVL480:
+	cbz	r4, .L279
+	.loc 2 2536 0
+	ldr	r4, .L293+56
+	sub	r3, r3, r8
+.LVL470:
 	asrs	r3, r3, #1
 	muls	r3, r4, r3
 	uxth	r4, r3
-.LVL481:
-	.loc 2 2484 0
-	ldrh	r3, [r0, r4, lsl #1]
+.LVL471:
+	.loc 2 2537 0
+	ldrh	r3, [r7, r4, lsl #1]
 	cmp	r5, r3
-	bcs	.L293
-	.loc 2 2489 0
+	bcs	.L280
+	.loc 2 2541 0
 	cmp	r1, r3
 	itt	hi
 	movhi	r1, r3
-.LVL482:
-	.loc 2 2483 0
-	movhi	r7, r4
-.LVL483:
-.L292:
-	.loc 2 2495 0
-	mla	r3, fp, ip, lr
-.LVL484:
-	b	.L291
-.L307:
+.LVL472:
+	.loc 2 2536 0
+	movhi	ip, r4
+.LVL473:
+.L279:
+	.loc 2 2546 0
+	mla	r3, fp, lr, r8
+.LVL474:
+	b	.L278
+.L294:
 	.align	2
-.L306:
-	.word	.LANCHOR78
-	.word	.LANCHOR75
+.L293:
+	.word	.LANCHOR77
+	.word	.LANCHOR74
 	.word	.LANCHOR5
+	.word	.LANCHOR72
+	.word	.LANCHOR43
 	.word	.LANCHOR73
-	.word	.LANCHOR40
-	.word	.LANCHOR74
 	.word	.LANCHOR14
-	.word	.LANCHOR77
+	.word	.LANCHOR76
 	.word	.LANCHOR48
-	.word	.LANCHOR42
 	.word	.LANCHOR41
-	.word	.LANCHOR43
+	.word	.LANCHOR40
+	.word	.LANCHOR42
 	.word	.LC72
-	.word	.LANCHOR89
+	.word	.LANCHOR87
 	.word	-1431655765
 	.cfi_endproc
 .LFE299:
@@ -4649,42 +4525,42 @@ GetSwlReplaceBlock:
 	.type	free_data_superblock, %function
 free_data_superblock:
 .LFB300:
-	.loc 2 2522 0
+	.loc 2 2573 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL485:
-	.loc 2 2523 0
+.LVL475:
+	.loc 2 2574 0
 	movw	r2, #65535
-	.loc 2 2522 0
+	.loc 2 2573 0
 	push	{r3, lr}
 	.cfi_def_cfa_offset 8
 	.cfi_offset 3, -8
 	.cfi_offset 14, -4
-	.loc 2 2523 0
+	.loc 2 2574 0
 	cmp	r0, r2
-	beq	.L309
-.LVL486:
-.LBB215:
-.LBB216:
-	.loc 2 2525 0
-	ldr	r2, .L310
+	beq	.L296
+.LVL476:
+.LBB229:
+.LBB230:
+	.loc 2 2576 0
+	ldr	r2, .L297
 	movs	r1, #0
 	ldr	r2, [r2]
 	strh	r1, [r2, r0, lsl #1]	@ movhi
-	.loc 2 2526 0
+	.loc 2 2577 0
 	bl	INSERT_FREE_LIST
-.LVL487:
-.L309:
-.LBE216:
-.LBE215:
-	.loc 2 2528 0
+.LVL477:
+.L296:
+.LBE230:
+.LBE229:
+	.loc 2 2579 0
 	movs	r0, #0
 	pop	{r3, pc}
-.L311:
+.L298:
 	.align	2
-.L310:
-	.word	.LANCHOR43
+.L297:
+	.word	.LANCHOR42
 	.cfi_endproc
 .LFE300:
 	.size	free_data_superblock, .-free_data_superblock
@@ -4698,14 +4574,14 @@ free_data_superblock:
 	.type	get_new_active_ppa, %function
 get_new_active_ppa:
 .LFB303:
-	.loc 2 2655 0
+	.loc 2 2706 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL488:
-	.loc 2 2659 0
+.LVL478:
+	.loc 2 2710 0
 	ldrh	r2, [r0]
-	.loc 2 2655 0
+	.loc 2 2706 0
 	push	{r3, r4, r5, r6, r7, lr}
 	.cfi_def_cfa_offset 24
 	.cfi_offset 3, -24
@@ -4714,143 +4590,143 @@ get_new_active_ppa:
 	.cfi_offset 6, -12
 	.cfi_offset 7, -8
 	.cfi_offset 14, -4
-	.loc 2 2659 0
+	.loc 2 2710 0
 	movw	r3, #65535
-	.loc 2 2655 0
+	.loc 2 2706 0
 	mov	r4, r0
-	.loc 2 2659 0
+	.loc 2 2710 0
 	cmp	r2, r3
-	bne	.L313
-	.loc 2 2659 0 is_stmt 0 discriminator 1
-	movw	r2, #2659
-	ldr	r1, .L326
-	ldr	r0, .L326+4
-.LVL489:
+	bne	.L300
+	.loc 2 2710 0 is_stmt 0 discriminator 1
+	movw	r2, #2710
+	ldr	r1, .L313
+	ldr	r0, .L313+4
+.LVL479:
 	bl	printf
-.LVL490:
-.L313:
-	.loc 2 2660 0 is_stmt 1
-	ldr	r5, .L326+8
+.LVL480:
+.L300:
+	.loc 2 2711 0 is_stmt 1
+	ldr	r5, .L313+8
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5]
 	cmp	r2, r3
-	bne	.L314
-	.loc 2 2660 0 is_stmt 0 discriminator 1
-	movw	r2, #2660
-	ldr	r1, .L326
-	ldr	r0, .L326+4
+	bne	.L301
+	.loc 2 2711 0 is_stmt 0 discriminator 1
+	movw	r2, #2711
+	ldr	r1, .L313
+	ldr	r0, .L313+4
 	bl	printf
-.LVL491:
-.L314:
-	.loc 2 2661 0 is_stmt 1
+.LVL481:
+.L301:
+	.loc 2 2712 0 is_stmt 1
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L315
-	.loc 2 2661 0 is_stmt 0 discriminator 1
-	movw	r2, #2661
-	ldr	r1, .L326
-	ldr	r0, .L326+4
+	cbnz	r3, .L302
+	.loc 2 2712 0 is_stmt 0 discriminator 1
+	movw	r2, #2712
+	ldr	r1, .L313
+	ldr	r0, .L313+4
 	bl	printf
-.LVL492:
-.L315:
-	.loc 2 2663 0 is_stmt 1
+.LVL482:
+.L302:
+	.loc 2 2714 0 is_stmt 1
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-	.loc 2 2662 0
+	.loc 2 2713 0
 	movs	r3, #0
 	strb	r3, [r4, #10]
-	.loc 2 2664 0
+	.loc 2 2715 0
 	movw	r6, #65535
-	.loc 2 2663 0
+	.loc 2 2714 0
 	adds	r2, r2, #8
 	ldrh	r0, [r4, r2, lsl #1]
-.LVL493:
-	.loc 2 2666 0
-	ldr	r2, .L326+12
+.LVL483:
+	.loc 2 2717 0
+	ldr	r2, .L313+12
 	ldrh	r1, [r2]
-	.loc 2 2668 0
+	.loc 2 2719 0
 	mov	r2, r3
-.L316:
-	.loc 2 2664 0
+.L303:
+	.loc 2 2715 0
 	cmp	r0, r6
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	beq	.L318
-	.loc 2 2673 0
+	beq	.L305
+	.loc 2 2724 0
 	ldrh	r2, [r4, #4]
-	.loc 2 2672 0
+	.loc 2 2723 0
 	ldrh	r6, [r4, #2]
-	.loc 2 2673 0
+	.loc 2 2724 0
 	subs	r2, r2, #1
 	uxth	r2, r2
-	.loc 2 2672 0
+	.loc 2 2723 0
 	orr	r6, r6, r0, lsl #10
-.LVL494:
-	.loc 2 2680 0
+.LVL484:
+	.loc 2 2731 0
 	movw	r0, #65535
-.LVL495:
-	.loc 2 2673 0
+.LVL485:
+	.loc 2 2724 0
 	strh	r2, [r4, #4]	@ movhi
-.L320:
-	.loc 2 2675 0
+.L307:
+	.loc 2 2726 0
 	adds	r3, r3, #1
 	uxtb	r3, r3
-	.loc 2 2676 0
+	.loc 2 2727 0
 	cmp	r1, r3
-	.loc 2 2677 0
+	.loc 2 2728 0
 	itttt	eq
 	ldrheq	r3, [r4, #2]
 	addeq	r3, r3, #1
 	strheq	r3, [r4, #2]	@ movhi
-	.loc 2 2678 0
+	.loc 2 2729 0
 	moveq	r3, #0
-	.loc 2 2680 0
+	.loc 2 2731 0
 	add	r7, r3, #8
 	ldrh	r7, [r4, r7, lsl #1]
 	cmp	r7, r0
-	beq	.L320
+	beq	.L307
 	strb	r3, [r4, #6]
-	.loc 2 2682 0
+	.loc 2 2733 0
 	ldrh	r1, [r4, #2]
 	ldrh	r3, [r5]
 	cmp	r1, r3
-	bne	.L312
-	.loc 2 2682 0 is_stmt 0 discriminator 1
-	cbz	r2, .L312
-	.loc 2 2682 0 discriminator 2
-	movw	r2, #2682
-	ldr	r1, .L326
-	ldr	r0, .L326+4
+	bne	.L299
+	.loc 2 2733 0 is_stmt 0 discriminator 1
+	cbz	r2, .L299
+	.loc 2 2733 0 discriminator 2
+	movw	r2, #2733
+	ldr	r1, .L313
+	ldr	r0, .L313+4
 	bl	printf
-.LVL496:
-.L312:
-	.loc 2 2684 0 is_stmt 1
+.LVL486:
+.L299:
+	.loc 2 2735 0 is_stmt 1
 	mov	r0, r6
 	pop	{r3, r4, r5, r6, r7, pc}
-.LVL497:
-.L318:
-	.loc 2 2665 0
+.LVL487:
+.L305:
+	.loc 2 2716 0
 	adds	r3, r3, #1
 	uxtb	r3, r3
-	.loc 2 2666 0
+	.loc 2 2717 0
 	cmp	r3, r1
-	.loc 2 2665 0
+	.loc 2 2716 0
 	strb	r3, [r4, #6]
-	.loc 2 2667 0
+	.loc 2 2718 0
 	itttt	eq
 	ldrheq	r3, [r4, #2]
-	.loc 2 2668 0
+	.loc 2 2719 0
 	strbeq	r2, [r4, #6]
-	.loc 2 2667 0
+	.loc 2 2718 0
 	addeq	r3, r3, #1
 	strheq	r3, [r4, #2]	@ movhi
-	.loc 2 2670 0
+	.loc 2 2721 0
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r0, [r4, r3, lsl #1]
-.LVL498:
-	b	.L316
-.L327:
+.LVL488:
+	b	.L303
+.L314:
 	.align	2
-.L326:
-	.word	.LANCHOR90
+.L313:
+	.word	.LANCHOR88
 	.word	.LC1
 	.word	.LANCHOR19
 	.word	.LANCHOR3
@@ -4885,19 +4761,19 @@ FtlGcBufInit:
 	.loc 5 25 0
 	movs	r3, #0
 	.loc 5 27 0
-	ldr	r1, .L333
+	ldr	r1, .L320
 	mov	fp, #1
 	.loc 5 25 0
-	ldr	r2, .L333+4
+	ldr	r2, .L320+4
 	.loc 5 27 0
 	ldr	r5, [r1]
 	.loc 5 28 0
-	ldr	r1, .L333+8
+	ldr	r1, .L320+8
 	.loc 5 25 0
 	str	r3, [r2]
-.LVL499:
+.LVL489:
 	.loc 5 26 0
-	ldr	r2, .L333+12
+	ldr	r2, .L320+12
 	mov	r0, r5
 	.loc 5 28 0
 	ldr	r1, [r1]
@@ -4905,16 +4781,16 @@ FtlGcBufInit:
 	ldrh	r2, [r2]
 	.loc 5 28 0
 	str	r1, [sp, #4]
-	ldr	r1, .L333+16
+	ldr	r1, .L320+16
 	ldrh	r1, [r1]
 	str	r1, [sp]
 	.loc 5 29 0
-	ldr	r1, .L333+20
+	ldr	r1, .L320+20
 	ldr	r10, [r1]
-	ldr	r1, .L333+24
+	ldr	r1, .L320+24
 	ldrh	r7, [r1]
 	.loc 5 30 0
-	ldr	r1, .L333+28
+	ldr	r1, .L320+28
 	ldr	r4, [r1]
 	movs	r1, #12
 	mla	r1, r2, r1, r1
@@ -4922,8 +4798,8 @@ FtlGcBufInit:
 	add	r8, r5, r1
 	.loc 5 26 0
 	mov	r1, r3
-.LVL500:
-.L329:
+.LVL490:
+.L316:
 	adds	r0, r0, #12
 	ldr	r6, [sp]
 	.loc 5 26 0 is_stmt 0 discriminator 1
@@ -4931,33 +4807,33 @@ FtlGcBufInit:
 	add	ip, r3, r7
 	add	r4, r4, #20
 	add	lr, r1, r6
-	bne	.L330
+	bne	.L317
 	.loc 5 34 0 is_stmt 1
-	ldr	r3, .L333+32
+	ldr	r3, .L320+32
 	.loc 5 35 0
 	mov	lr, #12
 	mov	r8, #0
 	.loc 5 34 0
 	ldr	r0, [r3]
 	.loc 5 36 0
-	ldr	r3, .L333+8
+	ldr	r3, .L320+8
 	ldr	r4, [r3]
 	.loc 5 37 0
-	ldr	r3, .L333+20
+	ldr	r3, .L320+20
 	ldr	ip, [r3]
-.L331:
-.LVL501:
+.L318:
+.LVL491:
 	.loc 5 34 0 discriminator 1
 	cmp	r2, r0
-	bcc	.L332
+	bcc	.L319
 	.loc 5 39 0
 	add	sp, sp, #8
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL502:
-.L330:
+.LVL492:
+.L317:
 	.cfi_restore_state
 	.loc 5 28 0 discriminator 3
 	bic	r1, r1, #3
@@ -4983,9 +4859,9 @@ FtlGcBufInit:
 	mov	r3, ip
 	.loc 5 30 0 discriminator 3
 	str	r6, [r4, #-20]
-	b	.L329
-.LVL503:
-.L332:
+	b	.L316
+.LVL493:
+.L319:
 	.loc 5 36 0 discriminator 3
 	ldr	r3, [sp]
 	.loc 5 35 0 discriminator 3
@@ -5003,26 +4879,26 @@ FtlGcBufInit:
 	mul	r3, r2, r7
 	.loc 5 34 0 discriminator 3
 	adds	r2, r2, #1
-.LVL504:
+.LVL494:
 	uxth	r2, r2
-.LVL505:
+.LVL495:
 	.loc 5 37 0 discriminator 3
 	bic	r3, r3, #3
 	add	r3, r3, ip
 	str	r3, [r1, #4]
-	b	.L331
-.L334:
+	b	.L318
+.L321:
 	.align	2
-.L333:
-	.word	.LANCHOR92
+.L320:
+	.word	.LANCHOR90
+	.word	.LANCHOR89
 	.word	.LANCHOR91
-	.word	.LANCHOR93
 	.word	.LANCHOR3
 	.word	.LANCHOR23
-	.word	.LANCHOR94
+	.word	.LANCHOR92
 	.word	.LANCHOR24
-	.word	.LANCHOR95
-	.word	.LANCHOR96
+	.word	.LANCHOR93
+	.word	.LANCHOR94
 	.cfi_endproc
 .LFE306:
 	.size	FtlGcBufInit, .-FtlGcBufInit
@@ -5040,9 +4916,9 @@ FtlGcBufFree:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL506:
+.LVL496:
 	.loc 5 47 0
-	ldr	r3, .L342
+	ldr	r3, .L329
 	.loc 5 48 0
 	mov	ip, #12
 	.loc 5 42 0
@@ -5065,48 +4941,48 @@ FtlGcBufFree:
 	.loc 5 47 0
 	ldr	r7, [r3]
 	.loc 5 48 0
-	ldr	r3, .L342+4
+	ldr	r3, .L329+4
 	ldr	r5, [r3]
-.LVL507:
-.L336:
+.LVL497:
+.L323:
 	uxth	r3, r4
 	.loc 5 46 0 discriminator 1
 	cmp	r1, r3
-	bls	.L335
+	bls	.L322
 	.loc 5 48 0
 	mla	r8, fp, r3, r0
 	movs	r2, #0
-.L337:
-.LVL508:
+.L324:
+.LVL498:
 	uxth	r3, r2
 	.loc 5 47 0 discriminator 1
 	cmp	r7, r3
-	bls	.L338
+	bls	.L325
 	.loc 5 48 0
 	mul	r3, ip, r3
 	ldr	r6, [r8, #8]
 	adds	r2, r2, #1
-.LVL509:
+.LVL499:
 	add	r10, r5, r3
 	ldr	r3, [r5, r3]
 	cmp	r3, r6
-	bne	.L337
+	bne	.L324
 	.loc 5 49 0
 	str	lr, [r10, #8]
-.L338:
-.LVL510:
+.L325:
+.LVL500:
 	adds	r4, r4, #1
-.LVL511:
-	b	.L336
-.LVL512:
-.L335:
+.LVL501:
+	b	.L323
+.LVL502:
+.L322:
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL513:
-.L343:
+.LVL503:
+.L330:
 	.align	2
-.L342:
-	.word	.LANCHOR96
-	.word	.LANCHOR92
+.L329:
+	.word	.LANCHOR94
+	.word	.LANCHOR90
 	.cfi_endproc
 .LFE307:
 	.size	FtlGcBufFree, .-FtlGcBufFree
@@ -5124,9 +5000,9 @@ FtlGcBufAlloc:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL514:
+.LVL504:
 	.loc 5 62 0
-	ldr	r3, .L351
+	ldr	r3, .L338
 	.loc 5 61 0
 	movs	r2, #0
 	.loc 5 57 0
@@ -5148,31 +5024,31 @@ FtlGcBufAlloc:
 	.loc 5 62 0
 	ldr	r4, [r3]
 	.loc 5 63 0
-	ldr	r3, .L351+4
+	ldr	r3, .L338+4
 	ldr	r5, [r3]
-.LVL515:
-.L345:
+.LVL505:
+.L332:
 	uxth	r8, r2
 	.loc 5 61 0 discriminator 1
 	cmp	r1, r8
-	bhi	.L349
+	bhi	.L336
 	.loc 5 71 0
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L349:
+.L336:
 	mov	r10, #0
-.L346:
-.LVL516:
+.L333:
+.LVL506:
 	uxth	r3, r10
 	.loc 5 62 0 discriminator 1
 	cmp	r4, r3
-	bls	.L347
+	bls	.L334
 	.loc 5 63 0
 	mla	r3, ip, r3, r5
 	add	r10, r10, #1
-.LVL517:
+.LVL507:
 	ldr	r6, [r3, #8]
 	cmp	r6, #0
-	bne	.L346
+	bne	.L333
 	.loc 5 65 0
 	mla	r8, lr, r8, r0
 	.loc 5 64 0
@@ -5185,16 +5061,16 @@ FtlGcBufAlloc:
 	str	r6, [r8, #8]
 	.loc 5 66 0
 	str	r3, [r8, #12]
-.L347:
-.LVL518:
+.L334:
+.LVL508:
 	adds	r2, r2, #1
-.LVL519:
-	b	.L345
-.L352:
+.LVL509:
+	b	.L332
+.L339:
 	.align	2
-.L351:
-	.word	.LANCHOR96
-	.word	.LANCHOR92
+.L338:
+	.word	.LANCHOR94
+	.word	.LANCHOR90
 	.cfi_endproc
 .LFE308:
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
@@ -5213,40 +5089,40 @@ IsBlkInGcList:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL520:
+.LVL510:
 	.loc 5 78 0
-	ldr	r3, .L358
+	ldr	r3, .L345
 	.loc 5 77 0
-	ldr	r2, .L358+4
+	ldr	r2, .L345+4
 	.loc 5 78 0
 	ldr	r3, [r3]
 	ldrh	r2, [r2]
 	add	r2, r3, r2, lsl #1
-.LVL521:
-.L354:
+.LVL511:
+.L341:
 	.loc 5 77 0 discriminator 1
 	cmp	r3, r2
-	bne	.L356
+	bne	.L343
 	.loc 5 81 0
 	movs	r0, #0
-.LVL522:
+.LVL512:
 	bx	lr
-.LVL523:
-.L356:
+.LVL513:
+.L343:
 	.loc 5 78 0
 	ldrh	r1, [r3], #2
 	cmp	r1, r0
-	bne	.L354
+	bne	.L341
 	.loc 5 79 0
 	movs	r0, #1
-.LVL524:
+.LVL514:
 	.loc 5 82 0
 	bx	lr
-.L359:
+.L346:
 	.align	2
-.L358:
-	.word	.LANCHOR97
-	.word	.LANCHOR98
+.L345:
+	.word	.LANCHOR95
+	.word	.LANCHOR96
 	.cfi_endproc
 .LFE309:
 	.size	IsBlkInGcList, .-IsBlkInGcList
@@ -5264,7 +5140,7 @@ FtlGcUpdatePage:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL525:
+.LVL515:
 	push	{r3, r4, r5, r6, r7, lr}
 	.cfi_def_cfa_offset 24
 	.cfi_offset 3, -24
@@ -5276,54 +5152,54 @@ FtlGcUpdatePage:
 	.loc 5 85 0
 	mov	r5, r0
 	.loc 5 91 0
-	ldr	r4, .L364
+	ldr	r4, .L351
 	.loc 5 88 0
 	ubfx	r0, r0, #10, #16
-.LVL526:
+.LVL516:
 	.loc 5 85 0
 	mov	r6, r1
 	mov	r7, r2
 	.loc 5 88 0
 	bl	P2V_block_in_plane
-.LVL527:
+.LVL517:
 	.loc 5 92 0
-	ldr	r3, .L364+4
+	ldr	r3, .L351+4
 	.loc 5 91 0
 	ldrh	r1, [r4]
 	.loc 5 92 0
 	ldr	r2, [r3]
 	.loc 5 91 0
 	movs	r3, #0
-.LVL528:
-.L361:
+.LVL518:
+.L348:
 	uxth	ip, r3
-.LVL529:
+.LVL519:
 	.loc 5 91 0 is_stmt 0 discriminator 1
 	cmp	ip, r1
-	bcc	.L363
+	bcc	.L350
 	.loc 5 96 0 is_stmt 1
-	bne	.L362
+	bne	.L349
 	.loc 5 97 0
 	strh	r0, [r2, ip, lsl #1]	@ movhi
 	.loc 5 98 0
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	b	.L362
-.L363:
+	b	.L349
+.L350:
 	adds	r3, r3, #1
 	.loc 5 92 0
 	add	ip, r2, r3, lsl #1
-.LVL530:
+.LVL520:
 	ldrh	ip, [ip, #-2]
 	cmp	ip, r0
-	bne	.L361
-.L362:
+	bne	.L348
+.L349:
 	.loc 5 101 0
-	ldr	r2, .L364+8
+	ldr	r2, .L351+8
 	movs	r0, #12
-.LVL531:
-	ldr	r1, .L364+12
+.LVL521:
+	ldr	r1, .L351+12
 	ldrh	r3, [r2]
 	ldr	r1, [r1]
 	muls	r0, r3, r0
@@ -5339,14 +5215,14 @@ FtlGcUpdatePage:
 	.loc 5 107 0
 	strh	r3, [r2]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.LVL532:
-.L365:
+.LVL522:
+.L352:
 	.align	2
-.L364:
-	.word	.LANCHOR98
+.L351:
+	.word	.LANCHOR96
+	.word	.LANCHOR95
 	.word	.LANCHOR97
-	.word	.LANCHOR99
-	.word	.LANCHOR100
+	.word	.LANCHOR98
 	.cfi_endproc
 .LFE310:
 	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
@@ -5364,7 +5240,7 @@ FtlGcRefreshBlock:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL533:
+.LVL523:
 	push	{r3, r4, r5, lr}
 	.cfi_def_cfa_offset 16
 	.cfi_offset 3, -16
@@ -5376,43 +5252,43 @@ FtlGcRefreshBlock:
 	.loc 5 345 0
 	mov	r4, r0
 	.loc 5 347 0
-	ldr	r0, .L369
-.LVL534:
+	ldr	r0, .L356
+.LVL524:
 	bl	printf
-.LVL535:
+.LVL525:
 	.loc 5 349 0
-	ldr	r0, .L369+4
+	ldr	r0, .L356+4
 	ldrh	r5, [r0]
 	cmp	r4, r5
-	beq	.L367
+	beq	.L354
 	.loc 5 349 0 is_stmt 0 discriminator 1
-	ldr	r3, .L369+8
+	ldr	r3, .L356+8
 	ldrh	r1, [r3]
 	cmp	r4, r1
-	beq	.L367
+	beq	.L354
 	.loc 5 351 0 is_stmt 1
 	movw	r2, #65535
 	cmp	r5, r2
-	bne	.L368
+	bne	.L355
 	.loc 5 352 0
 	strh	r4, [r0]	@ movhi
-.L367:
+.L354:
 	.loc 5 356 0
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L368:
+.L355:
 	.loc 5 353 0
 	cmp	r1, r2
 	.loc 5 354 0
 	it	eq
 	strheq	r4, [r3]	@ movhi
-	b	.L367
-.L370:
+	b	.L354
+.L357:
 	.align	2
-.L369:
+.L356:
 	.word	.LC73
-	.word	.LANCHOR101
-	.word	.LANCHOR102
+	.word	.LANCHOR99
+	.word	.LANCHOR100
 	.cfi_endproc
 .LFE317:
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
@@ -5430,7 +5306,7 @@ FtlGcMarkBadPhyBlk:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL536:
+.LVL526:
 	push	{r4, r5, r6, lr}
 	.cfi_def_cfa_offset 16
 	.cfi_offset 4, -16
@@ -5440,66 +5316,66 @@ FtlGcMarkBadPhyBlk:
 	.loc 5 359 0
 	mov	r5, r0
 	.loc 5 364 0
-	ldr	r4, .L375
+	ldr	r4, .L362
 	.loc 5 361 0
 	bl	P2V_block_in_plane
-.LVL537:
+.LVL527:
 	.loc 5 364 0
 	mov	r2, r5
 	.loc 5 361 0
 	mov	r6, r0
-.LVL538:
+.LVL528:
 	.loc 5 364 0
 	ldrh	r1, [r4]
-	ldr	r0, .L375+4
+	ldr	r0, .L362+4
 	bl	printf
-.LVL539:
+.LVL529:
 	.loc 5 366 0
 	mov	r0, r6
 	bl	FtlGcRefreshBlock
-.LVL540:
+.LVL530:
 	.loc 5 368 0
 	ldrh	r3, [r4]
 	movs	r2, #0
 	.loc 5 369 0
-	ldr	r0, .L375+8
-.LVL541:
-.L372:
+	ldr	r0, .L362+8
+.LVL531:
+.L359:
 	.loc 5 368 0 discriminator 1
 	uxth	r1, r2
 	cmp	r3, r1
-	bhi	.L374
+	bhi	.L361
 	.loc 5 372 0
 	cmp	r3, #15
 	.loc 5 373 0
 	itttt	ls
 	addls	r2, r3, #1
-.LVL542:
+.LVL532:
 	strhls	r2, [r4]	@ movhi
-	ldrls	r2, .L375+8
+	ldrls	r2, .L362+8
 	strhls	r5, [r2, r3, lsl #1]	@ movhi
-	b	.L373
-.LVL543:
-.L374:
+	b	.L360
+.LVL533:
+.L361:
 	adds	r2, r2, #1
-.LVL544:
+.LVL534:
 	.loc 5 369 0
 	add	r1, r0, r2, lsl #1
-.LVL545:
+.LVL535:
 	ldrh	r1, [r1, #-2]
 	cmp	r1, r5
-	bne	.L372
-.L373:
+	bne	.L359
+.L360:
 	.loc 5 375 0
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.LVL546:
-.L376:
+.LVL536:
+.L363:
 	.align	2
-.L375:
-	.word	.LANCHOR103
+.L362:
+	.word	.LANCHOR101
 	.word	.LC74
-	.word	.LANCHOR104
+	.word	.LANCHOR102
 	.cfi_endproc
 .LFE318:
 	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
@@ -5518,7 +5394,7 @@ FtlGcReFreshBadBlk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	.loc 5 380 0
-	ldr	r3, .L383
+	ldr	r3, .L370
 	.loc 5 379 0
 	push	{r4, lr}
 	.cfi_def_cfa_offset 8
@@ -5526,48 +5402,48 @@ FtlGcReFreshBadBlk:
 	.cfi_offset 14, -4
 	.loc 5 380 0
 	ldrh	r3, [r3]
-	cbz	r3, .L378
+	cbz	r3, .L365
 	.loc 5 380 0 is_stmt 0 discriminator 1
-	ldr	r2, .L383+4
+	ldr	r2, .L370+4
 	ldrh	r1, [r2]
 	movw	r2, #65535
 	cmp	r1, r2
-	bne	.L378
+	bne	.L365
 	.loc 5 381 0 is_stmt 1
-	ldr	r4, .L383+8
+	ldr	r4, .L370+8
 	ldrh	r2, [r4]
 	cmp	r2, r3
 	.loc 5 382 0
 	itt	cs
 	movcs	r3, #0
 	strhcs	r3, [r4]	@ movhi
-.LBB219:
-.LBB220:
+.LBB233:
+.LBB234:
 	.loc 5 383 0
-	ldr	r3, .L383+12
+	ldr	r3, .L370+12
 	ldrh	r2, [r4]
 	ldrh	r0, [r3, r2, lsl #1]
 	bl	P2V_block_in_plane
-.LVL547:
+.LVL537:
 	bl	FtlGcRefreshBlock
-.LVL548:
+.LVL538:
 	.loc 5 384 0
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-.L378:
-.LBE220:
-.LBE219:
+.L365:
+.LBE234:
+.LBE233:
 	.loc 5 387 0
 	movs	r0, #0
 	pop	{r4, pc}
-.L384:
+.L371:
 	.align	2
-.L383:
-	.word	.LANCHOR103
+.L370:
 	.word	.LANCHOR101
-	.word	.LANCHOR105
-	.word	.LANCHOR104
+	.word	.LANCHOR99
+	.word	.LANCHOR103
+	.word	.LANCHOR102
 	.cfi_endproc
 .LFE319:
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
@@ -5586,15 +5462,15 @@ ftl_free:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL549:
-.LBB221:
-.LBB222:
+.LVL539:
+.LBB235:
+.LBB236:
 	.file 6 "include/linux/compat.h"
 	.loc 6 80 0
 	b	free
-.LVL550:
-.LBE222:
-.LBE221:
+.LVL540:
+.LBE236:
+.LBE235:
 	.cfi_endproc
 .LFE340:
 	.size	ftl_free, .-ftl_free
@@ -5613,11 +5489,11 @@ ftl_malloc:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL551:
+.LVL541:
 	.loc 1 29 0
 	movs	r1, #0
 	b	kmalloc
-.LVL552:
+.LVL542:
 	.cfi_endproc
 .LFE341:
 	.size	ftl_malloc, .-ftl_malloc
@@ -5635,7 +5511,7 @@ rknand_print_hex:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL553:
+.LVL543:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
 	.cfi_offset 4, -32
@@ -5651,20 +5527,20 @@ rknand_print_hex:
 	.loc 1 33 0
 	mov	fp, r0
 	mov	r7, r1
-.LVL554:
+.LVL544:
 	mov	r8, r2
 	mov	r10, r3
 	.loc 1 39 0
 	mov	r5, r6
 	.loc 1 40 0
 	mov	r4, r6
-.LVL555:
-.L388:
+.LVL545:
+.L375:
 	.loc 1 40 0 is_stmt 0 discriminator 1
 	cmp	r4, r10
-	bcc	.L394
+	bcc	.L381
 	.loc 1 55 0 is_stmt 1
-	ldr	r0, .L397
+	ldr	r0, .L384
 	.loc 1 56 0
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_remember_state
@@ -5677,67 +5553,67 @@ rknand_print_hex:
 	.cfi_restore 5
 	.cfi_restore 4
 	.cfi_def_cfa_offset 0
-.LVL556:
+.LVL546:
 	.loc 1 55 0
 	b	printf
-.LVL557:
-.L394:
+.LVL547:
+.L381:
 	.cfi_restore_state
 	.loc 1 41 0
-	cbnz	r5, .L389
+	cbnz	r5, .L376
 	.loc 1 42 0
 	mov	r2, r6
 	mov	r1, fp
-	ldr	r0, .L397+4
+	ldr	r0, .L384+4
 	bl	printf
-.LVL558:
-.L389:
+.LVL548:
+.L376:
 	.loc 1 44 0
 	cmp	r8, #4
-	bne	.L390
+	bne	.L377
 	.loc 1 45 0
 	ldr	r1, [r7, r4, lsl #2]
-.L396:
+.L383:
 	.loc 1 47 0
-	ldr	r0, .L397+8
-.L395:
+	ldr	r0, .L384+8
+.L382:
 	.loc 1 50 0
 	adds	r5, r5, #1
-.LVL559:
+.LVL549:
 	.loc 1 49 0
 	bl	printf
-.LVL560:
+.LVL550:
 	.loc 1 50 0
 	cmp	r5, #15
-	bls	.L393
-.LVL561:
+	bls	.L380
+.LVL551:
 	.loc 1 51 0
 	movs	r5, #0
 	.loc 1 52 0
-	ldr	r0, .L397
+	ldr	r0, .L384
 	bl	printf
-.LVL562:
-.L393:
+.LVL552:
+.L380:
 	.loc 1 40 0 discriminator 2
 	adds	r4, r4, #1
-.LVL563:
+.LVL553:
 	add	r6, r6, r8
-	b	.L388
-.L390:
+	b	.L375
+.L377:
 	.loc 1 46 0
 	cmp	r8, #2
-	bne	.L392
+	bne	.L379
 	.loc 1 47 0
 	ldrsh	r1, [r7, r4, lsl #1]
-	b	.L396
-.L392:
+	b	.L383
+.L379:
 	.loc 1 49 0
 	ldrb	r1, [r7, r4]	@ zero_extendqisi2
-	ldr	r0, .L397+12
-	b	.L395
-.L398:
+	ldr	r0, .L384+12
+	b	.L382
+.L385:
 	.align	2
-.L397:
+.L384:
 	.word	.LC78
 	.word	.LC75
 	.word	.LC76
@@ -5759,7 +5635,7 @@ FlashReadPages:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL564:
+.LVL554:
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 48
 	.cfi_offset 4, -32
@@ -5773,22 +5649,22 @@ FlashReadPages:
 	.loc 1 85 0
 	mov	r8, r1
 	.loc 1 87 0
-	ldr	r3, .L417
+	ldr	r3, .L404
 	mov	r4, r0
 	.loc 1 91 0
 	movs	r5, #0
 	.loc 1 92 0
-	ldr	fp, .L417+12
+	ldr	fp, .L404+12
 	.loc 1 87 0
 	ldrh	r2, [r3, #12]
-.LVL565:
+.LVL555:
 	mov	r10, r3
 	str	r2, [sp, #4]
-.LVL566:
-.L400:
+.LVL556:
+.L387:
 	.loc 1 91 0 discriminator 1
 	cmp	r5, r8
-	bne	.L407
+	bne	.L394
 	.loc 1 112 0
 	movs	r0, #0
 	add	sp, sp, #16
@@ -5796,31 +5672,31 @@ FlashReadPages:
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL567:
-.L407:
+.LVL557:
+.L394:
 	.cfi_restore_state
 	.loc 1 92 0
 	ldr	r3, [r4, #8]
-	cbz	r3, .L401
+	cbz	r3, .L388
 	.loc 1 92 0 is_stmt 0 discriminator 2
 	ldr	r3, [r4, #12]
-	cbnz	r3, .L402
-.L401:
+	cbnz	r3, .L389
+.L388:
 	.loc 1 92 0 discriminator 3
 	movs	r2, #92
-	ldr	r1, .L417+4
+	ldr	r1, .L404+4
 	mov	r0, fp
 	bl	printf
-.LVL568:
-.L402:
+.LVL558:
+.L389:
 	.loc 1 94 0 is_stmt 1
-	ldr	r6, .L417+8
+	ldr	r6, .L404+8
 	.loc 1 93 0
 	add	r2, sp, #8
 	add	r1, sp, #12
 	ldr	r0, [r4, #4]
 	bl	l2p_addr_tran.isra.0
-.LVL569:
+.LVL559:
 	.loc 1 94 0
 	ldr	r3, [r4, #12]
 	ldr	r2, [r4, #8]
@@ -5828,17 +5704,17 @@ FlashReadPages:
 	ldrb	r0, [sp, #8]	@ zero_extendqisi2
 	ldr	r7, [r6, #12]
 	blx	r7
-.LVL570:
+.LVL560:
 	.loc 1 99 0
 	ldrh	r3, [r10, #14]
 	.loc 1 98 0
 	str	r0, [r4]
 	.loc 1 99 0
 	cmp	r3, #4
-	bne	.L404
+	bne	.L391
 	.loc 1 100 0
 	ldr	r0, [sp, #4]
-.LVL571:
+.LVL561:
 	ldr	r3, [r4, #12]
 	ldr	r2, [r4, #8]
 	ldr	r1, [sp, #12]
@@ -5848,42 +5724,42 @@ FlashReadPages:
 	add	r1, r1, r0
 	ldrb	r0, [sp, #8]	@ zero_extendqisi2
 	blx	r6
-.LVL572:
+.LVL562:
 	.loc 1 104 0
 	adds	r0, r0, #1
-.LVL573:
-	beq	.L405
+.LVL563:
+	beq	.L392
 	.loc 1 105 0 discriminator 1
 	ldr	r3, [r4, #12]
 	.loc 1 104 0 discriminator 1
 	ldr	r2, [r3, #12]
 	adds	r2, r2, #1
-	bne	.L404
+	bne	.L391
 	.loc 1 105 0
 	ldr	r2, [r3, #8]
 	adds	r2, r2, #1
-	bne	.L404
+	bne	.L391
 	.loc 1 106 0
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L404
-.L405:
+	beq	.L391
+.L392:
 	.loc 1 108 0
 	mov	r3, #-1
 	str	r3, [r4]
-.LVL574:
-.L404:
+.LVL564:
+.L391:
 	.loc 1 91 0 discriminator 2
 	adds	r5, r5, #1
-.LVL575:
+.LVL565:
 	adds	r4, r4, #20
-	b	.L400
-.L418:
+	b	.L387
+.L405:
 	.align	2
-.L417:
+.L404:
 	.word	.LANCHOR0
-	.word	.LANCHOR106
-	.word	.LANCHOR107
+	.word	.LANCHOR104
+	.word	.LANCHOR105
 	.word	.LC1
 	.cfi_endproc
 .LFE344:
@@ -5903,7 +5779,7 @@ FtlLoadFactoryBbt:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	.loc 4 286 0
-	ldr	r3, .L429
+	ldr	r3, .L416
 	.loc 4 279 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
@@ -5918,54 +5794,54 @@ FtlLoadFactoryBbt:
 	.loc 4 289 0
 	movs	r6, #0
 	.loc 4 286 0
-	ldr	r5, .L429+4
+	ldr	r5, .L416+4
 	ldr	r3, [r3]
-	ldr	r7, .L429+8
+	ldr	r7, .L416+8
 	.loc 4 291 0
-	ldr	r10, .L429+20
+	ldr	r10, .L416+20
 	.loc 4 286 0
 	str	r3, [r5, #8]
 	.loc 4 287 0
-	ldr	r3, .L429+12
+	ldr	r3, .L416+12
 	ldr	r8, [r3]
 	str	r8, [r5, #12]
-.LVL576:
-.L420:
+.LVL566:
+.L407:
 	.loc 4 289 0 discriminator 1
-	ldr	r3, .L429+16
+	ldr	r3, .L416+16
 	ldrh	r3, [r3]
 	cmp	r6, r3
-	bcc	.L425
+	bcc	.L412
 	.loc 4 314 0
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL577:
-.L425:
+.LVL567:
+.L412:
 	.loc 4 291 0
 	ldrh	r4, [r10]
 	.loc 4 290 0
 	movw	r3, #65535
 	.loc 4 294 0
-	ldr	fp, .L429+4
+	ldr	fp, .L416+4
 	.loc 4 290 0
 	strh	r3, [r7, #2]!	@ movhi
 	.loc 4 291 0
 	subs	r4, r4, #1
 	uxth	r4, r4
-.LVL578:
-.L421:
+.LVL568:
+.L408:
 	.loc 4 291 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r10]
 	sub	r2, r3, #15
 	cmp	r2, r4
-	bgt	.L423
-.LVL579:
+	bgt	.L410
+.LVL569:
 	.loc 4 292 0 is_stmt 1
 	mla	r3, r6, r3, r4
-.LVL580:
+.LVL570:
 	.loc 4 294 0
 	movs	r2, #1
-.LVL581:
+.LVL571:
 	mov	r1, r2
 	mov	r0, fp
 	.loc 4 292 0
@@ -5974,37 +5850,37 @@ FtlLoadFactoryBbt:
 	str	r3, [r5, #4]
 	.loc 4 294 0
 	bl	FlashReadPages
-.LVL582:
+.LVL572:
 	.loc 4 295 0
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L422
+	beq	.L409
 	.loc 4 301 0
 	ldrh	r2, [r8]
 	movw	r3, #61664
 	cmp	r2, r3
-	bne	.L422
+	bne	.L409
 	.loc 4 303 0
 	strh	r4, [r7]	@ movhi
-.L423:
+.L410:
 	.loc 4 289 0 discriminator 2
 	adds	r6, r6, #1
-.LVL583:
-	b	.L420
-.L422:
+.LVL573:
+	b	.L407
+.L409:
 	.loc 4 291 0 discriminator 2
 	subs	r4, r4, #1
-.LVL584:
+.LVL574:
 	uxth	r4, r4
-.LVL585:
-	b	.L421
-.L430:
+.LVL575:
+	b	.L408
+.L417:
 	.align	2
-.L429:
-	.word	.LANCHOR39
-	.word	.LANCHOR108
+.L416:
+	.word	.LANCHOR107
+	.word	.LANCHOR106
 	.word	.LANCHOR37+10
-	.word	.LANCHOR109
+	.word	.LANCHOR108
 	.word	.LANCHOR10
 	.word	.LANCHOR17
 	.cfi_endproc
@@ -6024,7 +5900,7 @@ FtlGetLastWrittenPage:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL586:
+.LVL576:
 	.loc 2 51 0
 	cmp	r1, #1
 	.loc 2 47 0
@@ -6038,7 +5914,7 @@ FtlGetLastWrittenPage:
 	.cfi_offset 14, -4
 	.loc 2 51 0
 	it	eq
-	ldreq	r3, .L440
+	ldreq	r3, .L427
 	.loc 2 47 0
 	sub	sp, sp, #88
 	.cfi_def_cfa_offset 112
@@ -6048,48 +5924,48 @@ FtlGetLastWrittenPage:
 	mov	r2, r1
 	.loc 2 51 0
 	it	ne
-	ldrne	r3, .L440+4
+	ldrne	r3, .L427+4
 	.loc 2 47 0
 	mov	r6, r1
 	.loc 2 58 0
 	add	r0, sp, #4
-.LVL587:
+.LVL577:
 	movs	r1, #1
-.LVL588:
+.LVL578:
 	.loc 2 51 0
 	ldrh	r5, [r3]
-.LVL589:
+.LVL579:
 	.loc 2 53 0
-	ldr	r3, .L440+8
+	ldr	r3, .L427+8
 	.loc 2 56 0
 	subs	r5, r5, #1
-.LVL590:
+.LVL580:
 	sxth	r5, r5
-.LVL591:
+.LVL581:
 	.loc 2 53 0
 	str	r3, [sp, #12]
 	.loc 2 54 0
 	add	r3, sp, #24
 	str	r3, [sp, #16]
-.LVL592:
+.LVL582:
 	.loc 2 57 0
 	orr	r3, r5, r7
 	str	r3, [sp, #8]
 	.loc 2 58 0
 	bl	FlashReadPages
-.LVL593:
+.LVL583:
 	.loc 2 59 0
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	bne	.L434
+	bne	.L421
 	mov	r8, #0
-.LVL594:
-.L435:
+.LVL584:
+.L422:
 	.loc 2 60 0
 	cmp	r8, r5
-	ble	.L438
-.LVL595:
-.L434:
+	ble	.L425
+.LVL585:
+.L421:
 	.loc 2 73 0
 	mov	r0, r5
 	add	sp, sp, #88
@@ -6097,8 +5973,8 @@ FtlGetLastWrittenPage:
 	.cfi_def_cfa_offset 24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL596:
-.L438:
+.LVL586:
+.L425:
 	.cfi_restore_state
 	.loc 2 61 0
 	add	r3, r8, r5
@@ -6111,39 +5987,39 @@ FtlGetLastWrittenPage:
 	add	r0, sp, #4
 	.loc 2 61 0
 	asrs	r4, r3, #1
-.LVL597:
+.LVL587:
 	.loc 2 62 0
 	sxth	r3, r4
 	orrs	r3, r3, r7
 	str	r3, [sp, #8]
 	.loc 2 63 0
 	bl	FlashReadPages
-.LVL598:
+.LVL588:
 	.loc 2 65 0
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	bne	.L436
+	bne	.L423
 	.loc 2 65 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
-	bne	.L436
+	bne	.L423
 	.loc 2 66 0 is_stmt 1
 	subs	r4, r4, #1
-.LVL599:
+.LVL589:
 	sxth	r5, r4
-.LVL600:
-	b	.L435
-.LVL601:
-.L436:
+.LVL590:
+	b	.L422
+.LVL591:
+.L423:
 	.loc 2 68 0
 	adds	r4, r4, #1
-.LVL602:
+.LVL592:
 	sxth	r8, r4
-.LVL603:
-	b	.L435
-.L441:
+.LVL593:
+	b	.L422
+.L428:
 	.align	2
-.L440:
+.L427:
 	.word	.LANCHOR20
 	.word	.LANCHOR19
 	.word	ftl_temp_buf
@@ -6164,7 +6040,7 @@ FlashProgPages:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL604:
+.LVL594:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
 	.cfi_offset 4, -32
@@ -6183,78 +6059,78 @@ FlashProgPages:
 	mov	r7, r2
 	mov	r4, r0
 	.loc 1 117 0
-	ldr	r3, .L472
-.LVL605:
+	ldr	r3, .L459
+.LVL595:
 	.loc 1 121 0
 	mov	r5, r0
 	movs	r6, #0
 	.loc 1 117 0
 	ldrh	r8, [r3, #12]
-.LVL606:
+.LVL596:
 	str	r3, [sp, #4]
-.LVL607:
-.L443:
+.LVL597:
+.L430:
 	.loc 1 121 0 discriminator 1
 	cmp	r6, r10
-	bne	.L451
+	bne	.L438
 	.loc 1 142 0
 	ldr	r3, [sp]
 	cmp	r3, #0
-	bne	.L458
-.LVL608:
-.L471:
+	bne	.L445
+.LVL598:
+.L458:
 	.loc 1 172 0
 	movs	r0, #0
 	add	sp, sp, #40
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
-.LVL609:
+.LVL599:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL610:
-.L451:
+.LVL600:
+.L438:
 	.cfi_restore_state
 	.loc 1 122 0
 	ldr	r3, [r5, #8]
-	cbz	r3, .L444
+	cbz	r3, .L431
 	.loc 1 122 0 is_stmt 0 discriminator 2
 	ldr	r3, [r5, #12]
-	cbnz	r3, .L445
-.L444:
+	cbnz	r3, .L432
+.L431:
 	.loc 1 122 0 discriminator 3
 	movs	r2, #122
-	ldr	r1, .L472+4
-	ldr	r0, .L472+8
+	ldr	r1, .L459+4
+	ldr	r0, .L459+8
 	bl	printf
-.LVL611:
-.L445:
+.LVL601:
+.L432:
 	.loc 1 123 0 is_stmt 1
 	add	r2, sp, #12
 	add	r1, sp, #16
 	ldr	r0, [r5, #4]
 	bl	l2p_addr_tran.isra.0
-.LVL612:
+.LVL602:
 	.loc 1 124 0
-	ldr	r3, .L472+12
+	ldr	r3, .L459+12
 	ldr	r2, [r5, #8]
 	ldr	r1, [sp, #16]
 	ldr	fp, [r3, #8]
 	ldrb	r0, [sp, #12]	@ zero_extendqisi2
 	ldr	r3, [r5, #12]
 	blx	fp
-.LVL613:
+.LVL603:
 	.loc 1 129 0
-	cbnz	r0, .L446
+	cbnz	r0, .L433
 	.loc 1 128 0
 	str	r0, [r5]
-.L447:
+.L434:
 	.loc 1 132 0
 	ldr	r3, [sp, #4]
 	ldrh	r3, [r3, #14]
 	cmp	r3, #4
-	bne	.L449
+	bne	.L436
 	.loc 1 133 0
-	ldr	r1, .L472+12
+	ldr	r1, .L459+12
 	ldr	r3, [r5, #12]
 	ldr	r2, [r5, #8]
 	ldr	fp, [r1, #8]
@@ -6262,29 +6138,29 @@ FlashProgPages:
 	adds	r3, r3, #8
 	add	r2, r2, #2048
 	ldrb	r0, [sp, #12]	@ zero_extendqisi2
-.LVL614:
+.LVL604:
 	add	r1, r1, r8
 	blx	fp
-.LVL615:
+.LVL605:
 	.loc 1 137 0
-	cbz	r0, .L449
+	cbz	r0, .L436
 	.loc 1 138 0
 	mov	r3, #-1
 	str	r3, [r5]
-.L449:
+.L436:
 	.loc 1 121 0 discriminator 2
 	adds	r6, r6, #1
-.LVL616:
+.LVL606:
 	adds	r5, r5, #20
-	b	.L443
-.L446:
+	b	.L430
+.L433:
 	.loc 1 130 0
 	mov	r3, #-1
 	str	r3, [r5]
-	b	.L447
-.LVL617:
-.L456:
-.LBB223:
+	b	.L434
+.LVL607:
+.L443:
+.LBB237:
 	.loc 1 147 0
 	movs	r3, #0
 	.loc 1 153 0
@@ -6307,88 +6183,88 @@ FlashProgPages:
 	str	r3, [sp, #24]
 	.loc 1 153 0
 	bl	FlashReadPages
-.LVL618:
+.LVL608:
 	.loc 1 154 0
 	ldr	fp, [sp, #20]
 	cmp	fp, #-1
-	bne	.L453
+	bne	.L440
 	.loc 1 155 0
 	ldr	r1, [r4, #4]
-	ldr	r0, .L472+16
+	ldr	r0, .L459+16
 	bl	printf
-.LVL619:
+.LVL609:
 	.loc 1 156 0
 	str	fp, [r4]
-.L453:
+.L440:
 	.loc 1 158 0
 	ldr	r3, [r4, #12]
-	cbz	r3, .L454
+	cbz	r3, .L441
 	.loc 1 159 0
 	ldr	r2, [r3]
 	ldr	r3, [r10]
 	cmp	r2, r3
-	beq	.L454
+	beq	.L441
 	.loc 1 160 0
 	ldr	r1, [r4, #4]
-	ldr	r0, .L472+20
+	ldr	r0, .L459+20
 	bl	printf
-.LVL620:
+.LVL610:
 	.loc 1 161 0
 	mov	r3, #-1
 	str	r3, [r4]
-.L454:
+.L441:
 	.loc 1 164 0
 	ldr	r3, [r4, #8]
-	cbz	r3, .L455
+	cbz	r3, .L442
 	.loc 1 165 0
 	ldr	r2, [r3]
 	ldr	r3, [r8]
 	cmp	r2, r3
-	beq	.L455
+	beq	.L442
 	.loc 1 166 0
 	ldr	r1, [r4, #4]
-	ldr	r0, .L472+24
+	ldr	r0, .L459+24
 	bl	printf
-.LVL621:
+.LVL611:
 	.loc 1 167 0
 	mov	r3, #-1
 	str	r3, [r4]
-.L455:
-.LBE223:
+.L442:
+.LBE237:
 	.loc 1 144 0 discriminator 2
 	adds	r5, r5, #1
-.LVL622:
+.LVL612:
 	adds	r4, r4, #20
-.LVL623:
-.L452:
+.LVL613:
+.L439:
 	.loc 1 144 0 is_stmt 0 discriminator 1
 	cmp	r6, r5
-	bne	.L456
-	b	.L471
-.LVL624:
-.L458:
+	bne	.L443
+	b	.L458
+.LVL614:
+.L445:
 	movs	r5, #0
-.LBB224:
+.LBB238:
 	.loc 1 147 0 is_stmt 1
-	ldr	r8, .L472+28
-.LVL625:
+	ldr	r8, .L459+28
+.LVL615:
 	.loc 1 148 0
-	ldr	r10, .L472+32
-.LVL626:
-	b	.L452
-.L473:
+	ldr	r10, .L459+32
+.LVL616:
+	b	.L439
+.L460:
 	.align	2
-.L472:
+.L459:
 	.word	.LANCHOR0
-	.word	.LANCHOR110
+	.word	.LANCHOR109
 	.word	.LC1
-	.word	.LANCHOR107
+	.word	.LANCHOR105
 	.word	.LC79
 	.word	.LC80
 	.word	.LC81
 	.word	check_buf
-	.word	.LANCHOR111
-.LBE224:
+	.word	.LANCHOR110
+.LBE238:
 	.cfi_endproc
 .LFE345:
 	.size	FlashProgPages, .-FlashProgPages
@@ -6406,7 +6282,7 @@ FlashEraseBlocks:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL627:
+.LVL617:
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
 	.cfi_def_cfa_offset 40
 	.cfi_offset 4, -28
@@ -6419,19 +6295,19 @@ FlashEraseBlocks:
 	.loc 1 175 0
 	mov	r7, r2
 	.loc 1 178 0
-	ldr	r5, .L485
+	ldr	r5, .L472
 	adds	r4, r0, #4
 	.loc 1 181 0
 	movs	r6, #0
 	.loc 1 183 0
-	ldr	r10, .L485+4
+	ldr	r10, .L472+4
 	.loc 1 178 0
 	ldrh	r8, [r5, #12]
-.LVL628:
-.L475:
+.LVL618:
+.L462:
 	.loc 1 181 0 discriminator 1
 	cmp	r6, r7
-	bne	.L481
+	bne	.L468
 	.loc 1 194 0
 	movs	r0, #0
 	add	sp, sp, #12
@@ -6439,59 +6315,59 @@ FlashEraseBlocks:
 	.cfi_def_cfa_offset 28
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.LVL629:
-.L481:
+.LVL619:
+.L468:
 	.cfi_restore_state
 	.loc 1 182 0
 	add	r1, sp, #4
 	mov	r2, sp
 	ldr	r0, [r4]
 	bl	l2p_addr_tran.isra.0
-.LVL630:
+.LVL620:
 	.loc 1 183 0
 	ldr	r3, [r10, #4]
 	ldr	r1, [sp, #4]
 	ldrb	r0, [sp]	@ zero_extendqisi2
 	blx	r3
-.LVL631:
+.LVL621:
 	.loc 1 185 0
-	cbnz	r0, .L476
+	cbnz	r0, .L463
 	.loc 1 184 0
 	str	r0, [r4, #-4]
-.L477:
+.L464:
 	.loc 1 187 0
 	ldrh	r3, [r5, #14]
 	cmp	r3, #4
-	bne	.L479
+	bne	.L466
 	.loc 1 188 0
 	ldr	r1, [sp, #4]
 	ldr	r3, [r10, #4]
 	ldrb	r0, [sp]	@ zero_extendqisi2
-.LVL632:
+.LVL622:
 	add	r1, r1, r8
 	blx	r3
-.LVL633:
+.LVL623:
 	.loc 1 189 0
-	cbz	r0, .L479
+	cbz	r0, .L466
 	.loc 1 190 0
 	mov	r3, #-1
 	str	r3, [r4, #-4]
-.L479:
+.L466:
 	.loc 1 181 0 discriminator 2
 	adds	r6, r6, #1
-.LVL634:
+.LVL624:
 	adds	r4, r4, #20
-	b	.L475
-.L476:
+	b	.L462
+.L463:
 	.loc 1 186 0
 	mov	r3, #-1
 	str	r3, [r4, #-4]
-	b	.L477
-.L486:
+	b	.L464
+.L473:
 	.align	2
-.L485:
+.L472:
 	.word	.LANCHOR0
-	.word	.LANCHOR107
+	.word	.LANCHOR105
 	.cfi_endproc
 .LFE346:
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
@@ -6509,7 +6385,12 @@ FtlFreeSysBlkQueueIn:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL635:
+.LVL625:
+	.loc 2 99 0
+	subs	r3, r0, #1
+	movw	r2, #65533
+	uxth	r3, r3
+	.loc 2 98 0
 	push	{r4, r5, r6, lr}
 	.cfi_def_cfa_offset 16
 	.cfi_offset 4, -16
@@ -6518,78 +6399,83 @@ FtlFreeSysBlkQueueIn:
 	.cfi_offset 14, -4
 	.loc 2 98 0
 	mov	r5, r0
-.LBB225:
-.LBB226:
-	.loc 2 94 0
-	ldr	r4, .L496
-.LBE226:
-.LBE225:
 	.loc 2 99 0
+	cmp	r3, r2
+	bhi	.L474
+.LBB247:
+.LBB248:
+	.loc 2 94 0
+	ldr	r4, .L483
+.LBE248:
+.LBE247:
+	.loc 2 101 0
 	ldrh	r3, [r4, #6]
 	cmp	r3, #1024
-	beq	.L487
-.LVL636:
-.LBB227:
-	.loc 2 101 0
-	cbz	r1, .L489
-.LBB228:
-	.loc 2 102 0
-	bl	P2V_block_in_plane
-.LVL637:
+	beq	.L474
+.LVL626:
+.LBB249:
+.LBB250:
 	.loc 2 103 0
-	ldr	r3, .L496+4
-	.loc 2 102 0
-	mov	r6, r0
-.LVL638:
+	cbz	r1, .L476
+.LBB251:
+	.loc 2 104 0
+	bl	P2V_block_in_plane
+.LVL627:
+	.loc 2 105 0
+	ldr	r3, .L483+4
 	.loc 2 104 0
+	mov	r6, r0
+.LVL628:
+	.loc 2 106 0
 	movs	r2, #1
 	mov	r1, r2
-	.loc 2 103 0
+	.loc 2 105 0
 	ldr	r0, [r3]
 	lsls	r3, r5, #10
 	str	r3, [r0, #4]
-	.loc 2 104 0
+	.loc 2 106 0
 	bl	FlashEraseBlocks
-.LVL639:
-	.loc 2 105 0
-	ldr	r3, .L496+8
+.LVL629:
+	.loc 2 107 0
+	ldr	r3, .L483+8
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r6, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r6, lsl #1]	@ movhi
-	.loc 2 106 0
-	ldr	r2, .L496+12
+	.loc 2 108 0
+	ldr	r2, .L483+12
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
-.LVL640:
-.L489:
-.LBE228:
-	.loc 2 108 0
+.LVL630:
+.L476:
+.LBE251:
+	.loc 2 110 0
 	ldrh	r3, [r4, #6]
 	adds	r3, r3, #1
 	strh	r3, [r4, #6]	@ movhi
-	.loc 2 109 0
+	.loc 2 111 0
 	ldrh	r3, [r4, #4]
 	adds	r2, r3, #4
-	.loc 2 110 0
+	.loc 2 112 0
 	adds	r3, r3, #1
 	ubfx	r3, r3, #0, #10
-	.loc 2 109 0
+	.loc 2 111 0
 	strh	r5, [r4, r2, lsl #1]	@ movhi
-	.loc 2 110 0
+	.loc 2 112 0
 	strh	r3, [r4, #4]	@ movhi
-.LVL641:
-.L487:
+.LVL631:
+.L474:
 	pop	{r4, r5, r6, pc}
-.L497:
+.L484:
 	.align	2
-.L496:
+.L483:
 	.word	.LANCHOR38
-	.word	.LANCHOR112
-	.word	.LANCHOR40
-	.word	.LANCHOR76
-.LBE227:
+	.word	.LANCHOR111
+	.word	.LANCHOR43
+	.word	.LANCHOR75
+.LBE250:
+.LBE249:
 	.cfi_endproc
 .LFE243:
 	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
@@ -6607,9 +6493,9 @@ FtlLowFormatEraseBlock:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL642:
+.LVL632:
 	.loc 3 538 0
-	ldr	r3, .L541
+	ldr	r3, .L528
 	.loc 3 528 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
@@ -6624,7 +6510,7 @@ FtlLowFormatEraseBlock:
 	sub	sp, sp, #32
 	.cfi_def_cfa_offset 64
 	.loc 3 540 0
-	ldr	r6, .L541+4
+	ldr	r6, .L528+4
 	.loc 3 539 0
 	mov	fp, #0
 	.loc 3 536 0
@@ -6633,11 +6519,11 @@ FtlLowFormatEraseBlock:
 	mov	r4, fp
 	.loc 3 538 0
 	str	r0, [r3]
-.LVL643:
+.LVL633:
 	.loc 3 540 0
 	mov	r10, #20
 	.loc 3 539 0
-	ldr	r3, .L541+8
+	ldr	r3, .L528+8
 	.loc 3 540 0
 	ldr	r8, [r6]
 	.loc 3 528 0
@@ -6649,26 +6535,26 @@ FtlLowFormatEraseBlock:
 	.loc 3 539 0
 	str	r3, [sp, #8]
 	.loc 3 550 0
-	ldr	r3, .L541+12
+	ldr	r3, .L528+12
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
 	.loc 3 551 0
-	ldr	r3, .L541+16
+	ldr	r3, .L528+16
 	ldr	r3, [r3]
 	str	r3, [sp, #16]
-	ldr	r3, .L541+20
+	ldr	r3, .L528+20
 	ldrh	r3, [r3]
 	str	r3, [sp, #20]
-.LVL644:
-.L499:
+.LVL634:
+.L486:
 	.loc 3 539 0 discriminator 1
 	ldr	r3, [sp, #8]
 	uxth	r2, fp
 	cmp	r3, r2
-	bhi	.L503
+	bhi	.L490
 	.loc 3 559 0
 	cmp	r5, #0
-	beq	.L498
+	beq	.L485
 	.loc 3 562 0
 	mov	r0, r8
 	.loc 3 563 0
@@ -6679,34 +6565,34 @@ FtlLowFormatEraseBlock:
 	mov	r2, r5
 	movs	r1, #0
 	bl	FlashEraseBlocks
-.LVL645:
-.L506:
+.LVL635:
+.L493:
 	.loc 3 563 0 discriminator 1
 	uxth	r3, r7
 	cmp	r5, r3
-	bhi	.L508
+	bhi	.L495
 	.loc 3 571 0
 	ldr	r3, [sp]
 	cmp	r3, #0
-	beq	.L524
-.LVL646:
+	beq	.L511
+.LVL636:
 	.loc 3 573 0
-	ldr	r3, .L541+24
+	ldr	r3, .L528+24
 	.loc 3 572 0
 	mov	r8, #1
 	.loc 3 573 0
 	ldrh	r10, [r3]
-.LVL647:
+.LVL637:
 	.loc 3 574 0
 	lsr	r3, r10, #2
 	str	r3, [sp, #12]
-.LVL648:
-.L509:
+.LVL638:
+.L496:
 	movs	r6, #0
-.LVL649:
-.L518:
+.LVL639:
+.L505:
 	.loc 3 578 0
-	ldr	r3, .L541+8
+	ldr	r3, .L528+8
 	mov	fp, #0
 	.loc 3 577 0
 	mov	r5, fp
@@ -6714,88 +6600,88 @@ FtlLowFormatEraseBlock:
 	ldrh	r3, [r3]
 	str	r3, [sp, #16]
 	.loc 3 579 0
-	ldr	r3, .L541+4
+	ldr	r3, .L528+4
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
 	.loc 3 587 0
-	ldr	r3, .L541+28
+	ldr	r3, .L528+28
 	ldr	r3, [r3]
 	str	r3, [sp, #20]
 	.loc 3 588 0
-	ldr	r3, .L541+12
+	ldr	r3, .L528+12
 	ldr	r3, [r3]
 	str	r3, [sp, #24]
-	ldr	r3, .L541+20
+	ldr	r3, .L528+20
 	ldrh	r3, [r3]
 	str	r3, [sp, #28]
-.LVL650:
-.L510:
+.LVL640:
+.L497:
 	.loc 3 578 0 discriminator 1
 	ldr	r3, [sp, #16]
 	uxth	r2, fp
 	cmp	r3, r2
-	bhi	.L513
+	bhi	.L500
 	.loc 3 593 0
-	cbz	r5, .L498
+	cbz	r5, .L485
 	.loc 3 598 0
-	ldr	fp, .L541+4
-.LVL651:
+	ldr	fp, .L528+4
+.LVL641:
 	.loc 3 596 0
 	movs	r3, #1
 	mov	r2, r8
-.LVL652:
+.LVL642:
 	mov	r1, r5
 	ldr	r0, [sp, #8]
 	.loc 3 597 0
 	movs	r7, #0
 	.loc 3 596 0
 	bl	FlashProgPages
-.LVL653:
+.LVL643:
 	.loc 3 598 0
 	movs	r3, #20
-.LVL654:
-.L515:
+.LVL644:
+.L502:
 	.loc 3 597 0 discriminator 1
 	uxth	r2, r7
 	cmp	r5, r2
-	bhi	.L517
+	bhi	.L504
 	.loc 3 604 0
 	ldr	r3, [sp, #12]
 	add	r6, r6, r3
-.LVL655:
+.LVL645:
 	uxth	r6, r6
-.LVL656:
+.LVL646:
 	.loc 3 605 0
 	cmp	r10, r6
-	bhi	.L518
+	bhi	.L505
 	.loc 3 611 0 discriminator 1
-	ldr	r7, .L541+4
-.LVL657:
+	ldr	r7, .L528+4
+.LVL647:
 	movs	r6, #0
-.LVL658:
+.LVL648:
 	mov	r10, #20
-.LVL659:
-.L519:
+.LVL649:
+.L506:
 	.loc 3 610 0 discriminator 1
 	uxth	r3, r6
 	cmp	r5, r3
-	bhi	.L521
+	bhi	.L508
 	.loc 3 615 0
 	ldr	r3, [sp, #4]
 	cmp	r3, #63
-	bls	.L522
+	bls	.L509
 	.loc 3 615 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp]
-	cbz	r3, .L498
-.L522:
+	cbz	r3, .L485
+.L509:
 	.loc 3 616 0 is_stmt 1
-	ldr	r3, .L541+4
+	ldr	r3, .L528+4
 	mov	r2, r5
 	mov	r1, r8
 	ldr	r0, [r3]
 	bl	FlashEraseBlocks
-.LVL660:
-.L498:
+.LVL650:
+.L485:
 	.loc 3 619 0
 	mov	r0, r4
 	add	sp, sp, #32
@@ -6803,8 +6689,8 @@ FtlLowFormatEraseBlock:
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL661:
-.L503:
+.LVL651:
+.L490:
 	.cfi_restore_state
 	.loc 3 540 0
 	mul	r2, r10, fp
@@ -6814,27 +6700,27 @@ FtlLowFormatEraseBlock:
 	.loc 3 540 0
 	str	r3, [r8, r2]
 	.loc 3 541 0
-	ldr	r3, .L541+32
+	ldr	r3, .L528+32
 	ldrb	r0, [r3, fp]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL662:
+.LVL652:
 	.loc 3 543 0
 	ldr	r3, [sp]
 	.loc 3 541 0
 	mov	r7, r0
-.LVL663:
+.LVL653:
 	.loc 3 543 0
-	cbz	r3, .L500
+	cbz	r3, .L487
 	.loc 3 544 0
 	bl	IsBlkInVendorPart
-.LVL664:
-	cbnz	r0, .L501
-.L500:
+.LVL654:
+	cbnz	r0, .L488
+.L487:
 	.loc 3 548 0
 	mov	r0, r7
 	bl	FtlBbmIsBadBlock
-.LVL665:
-	cbnz	r0, .L502
+.LVL655:
+	cbnz	r0, .L489
 	.loc 3 549 0
 	mla	r1, r10, r5, r8
 	.loc 3 550 0
@@ -6852,52 +6738,52 @@ FtlLowFormatEraseBlock:
 	ldr	r3, [sp, #16]
 	.loc 3 552 0
 	adds	r5, r5, #1
-.LVL666:
+.LVL656:
 	uxth	r5, r5
-.LVL667:
+.LVL657:
 	.loc 3 551 0
 	bic	r2, r2, #3
 	add	r2, r2, r3
 	str	r2, [r1, #12]
-.L501:
-.LVL668:
+.L488:
+.LVL658:
 	add	fp, fp, #1
-.LVL669:
-	b	.L499
-.LVL670:
-.L502:
+.LVL659:
+	b	.L486
+.LVL660:
+.L489:
 	.loc 3 554 0
 	adds	r4, r4, #1
-.LVL671:
+.LVL661:
 	uxth	r4, r4
-.LVL672:
-	b	.L501
-.LVL673:
-.L508:
+.LVL662:
+	b	.L488
+.LVL663:
+.L495:
 	.loc 3 564 0
 	mul	r3, r8, r7
 	ldr	r2, [r6]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
 	adds	r3, r3, #1
-	bne	.L507
+	bne	.L494
 	.loc 3 566 0
 	ldr	r0, [r1, #4]
 	.loc 3 565 0
 	adds	r4, r4, #1
-.LVL674:
+.LVL664:
 	uxth	r4, r4
-.LVL675:
+.LVL665:
 	.loc 3 566 0
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.LVL676:
-.L507:
+.LVL666:
+.L494:
 	adds	r7, r7, #1
-.LVL677:
-	b	.L506
-.LVL678:
-.L524:
+.LVL667:
+	b	.L493
+.LVL668:
+.L511:
 	.loc 3 533 0
 	movs	r3, #6
 	.loc 3 534 0
@@ -6906,9 +6792,9 @@ FtlLowFormatEraseBlock:
 	str	r3, [sp, #12]
 	.loc 3 531 0
 	mov	r10, #1
-	b	.L509
-.LVL679:
-.L513:
+	b	.L496
+.LVL669:
+.L500:
 	.loc 3 579 0
 	movs	r3, #20
 	mul	r2, r3, fp
@@ -6917,28 +6803,28 @@ FtlLowFormatEraseBlock:
 	movs	r3, #0
 	str	r3, [r1, r2]
 	.loc 3 580 0
-	ldr	r3, .L541+32
+	ldr	r3, .L528+32
 	ldr	r1, [sp, #4]
 	ldrb	r0, [r3, fp]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL680:
+.LVL670:
 	.loc 3 581 0
 	ldr	r3, [sp]
 	.loc 3 580 0
 	mov	r7, r0
-.LVL681:
+.LVL671:
 	.loc 3 581 0
-	cbz	r3, .L511
+	cbz	r3, .L498
 	.loc 3 582 0
 	bl	IsBlkInVendorPart
-.LVL682:
-	cbnz	r0, .L512
-.L511:
+.LVL672:
+	cbnz	r0, .L499
+.L498:
 	.loc 3 585 0
 	mov	r0, r7
 	bl	FtlBbmIsBadBlock
-.LVL683:
-	cbnz	r0, .L512
+.LVL673:
+	cbnz	r0, .L499
 	.loc 3 586 0
 	ldr	r3, [sp, #8]
 	movs	r2, #20
@@ -6956,654 +6842,891 @@ FtlLowFormatEraseBlock:
 	ldr	r3, [sp, #24]
 	.loc 3 589 0
 	adds	r5, r5, #1
-.LVL684:
+.LVL674:
 	uxth	r5, r5
-.LVL685:
+.LVL675:
 	.loc 3 588 0
 	bic	r2, r2, #3
 	add	r2, r2, r3
 	str	r2, [r1, #12]
-.L512:
-.LVL686:
+.L499:
+.LVL676:
 	add	fp, fp, #1
-.LVL687:
-	b	.L510
-.LVL688:
-.L517:
+.LVL677:
+	b	.L497
+.LVL678:
+.L504:
 	.loc 3 598 0
 	mul	r2, r3, r7
 	ldr	r1, [fp]
 	adds	r0, r1, r2
 	ldr	r2, [r1, r2]
-	cbz	r2, .L516
+	cbz	r2, .L503
 	.loc 3 600 0
 	ldr	r0, [r0, #4]
 	.loc 3 599 0
 	adds	r4, r4, #1
-.LVL689:
+.LVL679:
 	str	r3, [sp, #8]
 	uxth	r4, r4
-.LVL690:
+.LVL680:
 	.loc 3 600 0
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.LVL691:
+.LVL681:
 	ldr	r3, [sp, #8]
-.L516:
-.LVL692:
+.L503:
+.LVL682:
 	adds	r7, r7, #1
-.LVL693:
-	b	.L515
-.LVL694:
-.L521:
+.LVL683:
+	b	.L502
+.LVL684:
+.L508:
 	.loc 3 611 0
 	ldr	r3, [sp]
-	cbz	r3, .L520
+	cbz	r3, .L507
 	.loc 3 611 0 is_stmt 0 discriminator 1
 	mul	r3, r10, r6
 	ldr	r2, [r7]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
-	cbnz	r3, .L520
+	cbnz	r3, .L507
 	.loc 3 612 0 is_stmt 1
 	ldr	r0, [r1, #4]
 	movs	r1, #1
 	ubfx	r0, r0, #10, #16
 	bl	FtlFreeSysBlkQueueIn
-.LVL695:
-.L520:
+.LVL685:
+.L507:
 	adds	r6, r6, #1
-.LVL696:
-	b	.L519
-.L542:
+.LVL686:
+	b	.L506
+.L529:
 	.align	2
-.L541:
-	.word	.LANCHOR113
+.L528:
 	.word	.LANCHOR112
+	.word	.LANCHOR111
 	.word	.LANCHOR3
+	.word	.LANCHOR113
 	.word	.LANCHOR114
-	.word	.LANCHOR115
 	.word	.LANCHOR24
 	.word	.LANCHOR20
-	.word	.LANCHOR116
+	.word	.LANCHOR115
 	.word	.LANCHOR13
 	.cfi_endproc
 .LFE212:
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
-	.section	.text.ftl_memset,"ax",%progbits
+	.section	.text.FtlFreeSysBlkQueueOut,"ax",%progbits
 	.align	1
-	.global	ftl_memset
+	.global	FtlFreeSysBlkQueueOut
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_memset, %function
-ftl_memset:
-.LFB349:
-	.loc 1 242 0
+	.type	FtlFreeSysBlkQueueOut, %function
+FtlFreeSysBlkQueueOut:
+.LFB246:
+	.loc 2 181 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-.LVL697:
-	.loc 1 243 0
-	b	memset
-.LVL698:
+.LVL687:
+	push	{r3, r4, r5, r6, r7, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 3, -24
+	.cfi_offset 4, -20
+	.cfi_offset 5, -16
+	.cfi_offset 6, -12
+	.cfi_offset 7, -8
+	.cfi_offset 14, -4
+.LBB252:
+.LBB253:
+	.loc 2 89 0
+	ldr	r4, .L537
+.LBE253:
+.LBE252:
+.LBB255:
+	.loc 2 192 0
+	ldr	r6, .L537+4
+.LVL688:
+.L531:
+.LBE255:
+.LBB256:
+.LBB254:
+	.loc 2 89 0
+	ldrh	r1, [r4, #6]
+.LBE254:
+.LBE256:
+	.loc 2 186 0
+	cbz	r1, .L532
+	.loc 2 187 0
+	ldrh	r3, [r4, #2]
+	.loc 2 188 0
+	subs	r1, r1, #1
+	strh	r1, [r4, #6]	@ movhi
+	.loc 2 187 0
+	adds	r2, r3, #4
+	.loc 2 189 0
+	adds	r3, r3, #1
+	.loc 2 187 0
+	ldrh	r5, [r4, r2, lsl #1]
+.LVL689:
+	.loc 2 189 0
+	ubfx	r3, r3, #0, #10
+	strh	r3, [r4, #2]	@ movhi
+.LBB257:
+	.loc 2 191 0
+	mov	r0, r5
+	bl	P2V_block_in_plane
+.LVL690:
+	mov	r7, r0
+.LVL691:
+	.loc 2 192 0
+	ldr	r0, [r6]
+	lsls	r3, r5, #10
+	.loc 2 193 0
+	movs	r2, #1
+	mov	r1, r2
+	.loc 2 192 0
+	str	r3, [r0, #4]
+	.loc 2 193 0
+	bl	FlashEraseBlocks
+.LVL692:
+	.loc 2 194 0
+	ldr	r3, .L537+8
+	ldr	r2, [r3]
+	ldrh	r3, [r2, r7, lsl #1]
+	adds	r3, r3, #1
+	strh	r3, [r2, r7, lsl #1]	@ movhi
+	.loc 2 195 0
+	ldr	r2, .L537+12
+	ldr	r3, [r2]
+	adds	r3, r3, #1
+	str	r3, [r2]
+.LBE257:
+	.loc 2 202 0
+	subs	r3, r5, #1
+	uxth	r3, r3
+	movw	r2, #65533
+	cmp	r3, r2
+	bhi	.L533
+	.loc 2 208 0
+	mov	r0, r5
+	pop	{r3, r4, r5, r6, r7, pc}
+.LVL693:
+.L532:
+	.loc 2 199 0
+	ldr	r0, .L537+16
+	bl	printf
+.LVL694:
+.L535:
+	b	.L535
+.LVL695:
+.L533:
+	.loc 2 203 0
+	ldrh	r2, [r4, #6]
+	mov	r1, r5
+	ldr	r0, .L537+20
+	bl	printf
+.LVL696:
+	.loc 2 205 0
+	b	.L531
+.L538:
+	.align	2
+.L537:
+	.word	.LANCHOR38
+	.word	.LANCHOR111
+	.word	.LANCHOR43
+	.word	.LANCHOR75
+	.word	.LC82
+	.word	.LC83
 	.cfi_endproc
-.LFE349:
-	.size	ftl_memset, .-ftl_memset
-	.section	.text.FtlMemInit,"ax",%progbits
+.LFE246:
+	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
+	.section	.text.ftl_map_blk_alloc_new_blk,"ax",%progbits
 	.align	1
-	.global	FtlMemInit
+	.global	ftl_map_blk_alloc_new_blk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlMemInit, %function
-FtlMemInit:
-.LFB209:
-	.loc 3 279 0
+	.type	ftl_map_blk_alloc_new_blk, %function
+ftl_map_blk_alloc_new_blk:
+.LFB258:
+	.loc 2 562 0
 	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 16
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 48
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 3 282 0
-	movs	r1, #0
-	ldr	r3, .L645
-	.loc 3 311 0
-	mov	r8, #12
-	.loc 3 297 0
-	ldr	r2, .L645+4
-	.loc 3 282 0
-	str	r1, [r3]
+.LVL697:
+	.loc 2 566 0
+	ldrh	r1, [r0, #10]
+	ldr	r2, [r0, #12]
+	.loc 2 562 0
+	push	{r3, r4, r5, r6, r7, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 3, -24
+	.cfi_offset 4, -20
+	.cfi_offset 5, -16
+	.cfi_offset 6, -12
+	.cfi_offset 7, -8
+	.cfi_offset 14, -4
+	.loc 2 562 0
+	mov	r4, r0
+	.loc 2 566 0
+	movs	r3, #0
+.LVL698:
+.L540:
+	uxth	r5, r3
+.LVL699:
+	.loc 2 566 0 is_stmt 0 discriminator 1
+	cmp	r5, r1
+	bcs	.L543
+	.loc 2 567 0 is_stmt 1
+	mov	r7, r2
+	adds	r3, r3, #1
+	ldrh	r6, [r7]
+	adds	r2, r2, #2
+	cmp	r6, #0
+	bne	.L540
+	.loc 2 568 0
+	bl	FtlFreeSysBlkQueueOut
+.LVL700:
+	.loc 2 569 0
+	subs	r3, r0, #1
+	movw	r2, #65533
+	uxth	r3, r3
+	.loc 2 568 0
+	mov	r1, r0
+	strh	r0, [r7]	@ movhi
+	.loc 2 569 0
+	cmp	r3, r2
+	bls	.L541
+	.loc 2 570 0
+	ldr	r3, .L547
+	ldr	r0, .L547+4
+	ldrh	r2, [r3, #6]
+	bl	printf
+.LVL701:
+.L542:
+	b	.L542
+.L541:
+	.loc 2 576 0
+	ldr	r3, [r4, #28]
+	.loc 2 574 0
+	strh	r6, [r4, #2]	@ movhi
+	.loc 2 575 0
+	strh	r5, [r4]	@ movhi
+	.loc 2 576 0
+	adds	r3, r3, #1
+	str	r3, [r4, #28]
+	.loc 2 577 0
+	ldrh	r3, [r4, #8]
+	adds	r3, r3, #1
+	strh	r3, [r4, #8]	@ movhi
+.L543:
+	.loc 2 581 0
+	ldrh	r3, [r4, #10]
+	cmp	r3, r5
+	bhi	.L545
+.LVL702:
+.LBB260:
+.LBB261:
+	movw	r2, #581
+	ldr	r1, .L547+8
+	ldr	r0, .L547+12
+	bl	printf
+.LVL703:
+.L545:
+.LBE261:
+.LBE260:
+	.loc 2 583 0
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, pc}
+.LVL704:
+.L548:
+	.align	2
+.L547:
+	.word	.LANCHOR38
+	.word	.LC84
+	.word	.LANCHOR116
+	.word	.LC1
+	.cfi_endproc
+.LFE258:
+	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
+	.section	.text.ftl_memset,"ax",%progbits
+	.align	1
+	.global	ftl_memset
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_memset, %function
+ftl_memset:
+.LFB349:
+	.loc 1 242 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL705:
+	.loc 1 243 0
+	b	memset
+.LVL706:
+	.cfi_endproc
+.LFE349:
+	.size	ftl_memset, .-ftl_memset
+	.section	.text.FtlMemInit,"ax",%progbits
+	.align	1
+	.global	FtlMemInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlMemInit, %function
+FtlMemInit:
+.LFB209:
+	.loc 3 280 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 48
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
 	.loc 3 283 0
-	ldr	r3, .L645+8
-	.loc 3 310 0
-	ldr	r4, .L645+12
-	.loc 3 307 0
-	str	r1, [sp, #4]
+	movs	r1, #0
+	ldr	r3, .L651
+	.loc 3 312 0
+	mov	r8, #12
+	.loc 3 298 0
+	ldr	r2, .L651+4
 	.loc 3 283 0
 	str	r1, [r3]
 	.loc 3 284 0
-	ldr	r3, .L645+16
-	.loc 3 310 0
-	ldrh	r0, [r4]
-	.loc 3 312 0
-	ldr	fp, .L645+288
+	ldr	r3, .L651+8
+	.loc 3 311 0
+	ldr	r4, .L651+12
+	.loc 3 308 0
+	str	r1, [sp, #4]
 	.loc 3 284 0
 	str	r1, [r3]
 	.loc 3 285 0
-	ldr	r3, .L645+20
-	.loc 3 310 0
-	lsls	r0, r0, #1
-	.loc 3 316 0
-	ldr	r10, .L645+292
-	.loc 3 320 0
-	ldr	r5, .L645+24
+	ldr	r3, .L651+16
+	.loc 3 311 0
+	ldrh	r0, [r4]
+	.loc 3 313 0
+	ldr	fp, .L651+288
 	.loc 3 285 0
 	str	r1, [r3]
 	.loc 3 286 0
-	ldr	r3, .L645+28
-	.loc 3 323 0
-	ldr	r7, .L645+32
+	ldr	r3, .L651+20
+	.loc 3 311 0
+	lsls	r0, r0, #1
+	.loc 3 317 0
+	ldr	r10, .L651+292
+	.loc 3 321 0
+	ldr	r5, .L651+24
 	.loc 3 286 0
 	str	r1, [r3]
 	.loc 3 287 0
-	ldr	r3, .L645+36
+	ldr	r3, .L651+28
+	.loc 3 324 0
+	ldr	r7, .L651+32
+	.loc 3 287 0
 	str	r1, [r3]
 	.loc 3 288 0
-	ldr	r3, .L645+40
+	ldr	r3, .L651+36
 	str	r1, [r3]
 	.loc 3 289 0
-	ldr	r3, .L645+44
+	ldr	r3, .L651+40
 	str	r1, [r3]
 	.loc 3 290 0
-	ldr	r3, .L645+48
+	ldr	r3, .L651+44
 	str	r1, [r3]
 	.loc 3 291 0
-	ldr	r3, .L645+52
+	ldr	r3, .L651+48
 	str	r1, [r3]
 	.loc 3 292 0
-	ldr	r3, .L645+56
+	ldr	r3, .L651+52
 	str	r1, [r3]
 	.loc 3 293 0
-	ldr	r3, .L645+60
+	ldr	r3, .L651+56
 	str	r1, [r3]
 	.loc 3 294 0
-	ldr	r3, .L645+64
+	ldr	r3, .L651+60
 	str	r1, [r3]
 	.loc 3 295 0
-	ldr	r3, .L645+68
+	ldr	r3, .L651+64
 	str	r1, [r3]
 	.loc 3 296 0
-	ldr	r3, .L645+72
+	ldr	r3, .L651+68
 	str	r1, [r3]
 	.loc 3 297 0
+	ldr	r3, .L651+72
+	str	r1, [r3]
+	.loc 3 298 0
 	movw	r3, #65535
 	str	r3, [r2]
-	.loc 3 298 0
-	ldr	r2, .L645+76
-	str	r1, [r2]
 	.loc 3 299 0
-	ldr	r2, .L645+80
+	ldr	r2, .L651+76
 	str	r1, [r2]
 	.loc 3 300 0
-	ldr	r2, .L645+84
+	ldr	r2, .L651+80
 	str	r1, [r2]
 	.loc 3 301 0
-	ldr	r2, .L645+88
-	strh	r3, [r2]	@ movhi
+	ldr	r2, .L651+84
+	str	r1, [r2]
 	.loc 3 302 0
-	ldr	r2, .L645+92
+	ldr	r2, .L651+88
 	strh	r3, [r2]	@ movhi
 	.loc 3 303 0
+	ldr	r2, .L651+92
+	strh	r3, [r2]	@ movhi
+	.loc 3 304 0
 	movs	r2, #32
-	ldr	r3, .L645+96
+	ldr	r3, .L651+96
 	strh	r2, [r3]	@ movhi
-	.loc 3 304 0
+	.loc 3 305 0
 	movs	r2, #128
-	ldr	r3, .L645+100
+	ldr	r3, .L651+100
 	strh	r2, [r3]	@ movhi
-	.loc 3 305 0
-	ldr	r3, .L645+104
-	strh	r1, [r3]	@ movhi
 	.loc 3 306 0
-	ldr	r3, .L645+108
+	ldr	r3, .L651+104
 	strh	r1, [r3]	@ movhi
 	.loc 3 307 0
-	ldr	r3, .L645+112
+	ldr	r3, .L651+108
+	strh	r1, [r3]	@ movhi
+	.loc 3 308 0
+	ldr	r3, .L651+112
 	strh	r1, [r3]	@ movhi
-	.loc 3 310 0
+	.loc 3 311 0
 	bl	ftl_malloc
-.LVL699:
-	ldr	r3, .L645+116
+.LVL707:
+	ldr	r3, .L651+116
 	str	r0, [r3]
-	.loc 3 311 0
-	ldrh	r0, [r4]
 	.loc 3 312 0
+	ldrh	r0, [r4]
+	.loc 3 313 0
 	movs	r4, #20
-	.loc 3 311 0
+	.loc 3 312 0
 	mul	r0, r8, r0
 	bl	ftl_malloc
-.LVL700:
-	.loc 3 312 0
+.LVL708:
+	.loc 3 313 0
 	ldrh	r2, [fp]
-	.loc 3 311 0
-	ldr	r3, .L645+120
 	.loc 3 312 0
+	ldr	r3, .L651+120
+	.loc 3 313 0
 	muls	r4, r2, r4
-.LVL701:
-	.loc 3 311 0
+.LVL709:
+	.loc 3 312 0
 	str	r0, [r3]
-	.loc 3 313 0
+	.loc 3 314 0
 	lsls	r6, r4, #2
 	mov	r0, r6
 	bl	ftl_malloc
-.LVL702:
-	ldr	r3, .L645+124
+.LVL710:
+	ldr	r3, .L651+124
 	str	r0, [r3]
-	.loc 3 314 0
+	.loc 3 315 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL703:
-	ldr	r3, .L645+128
+.LVL711:
+	ldr	r3, .L651+128
 	str	r0, [r3]
-	.loc 3 315 0
+	.loc 3 316 0
 	mov	r0, r6
 	bl	ftl_malloc
-.LVL704:
-	ldr	r3, .L645+132
-	.loc 3 324 0
-	ldr	r6, .L645+136
-	.loc 3 315 0
-	str	r0, [r3]
+.LVL712:
+	ldr	r3, .L651+132
+	.loc 3 325 0
+	ldr	r6, .L651+136
 	.loc 3 316 0
+	str	r0, [r3]
+	.loc 3 317 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL705:
+.LVL713:
 	str	r0, [r10]
-	.loc 3 317 0
+	.loc 3 318 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL706:
-	ldr	r3, .L645+140
-	.loc 3 320 0
+.LVL714:
+	ldr	r3, .L651+140
+	.loc 3 321 0
 	ldrh	r2, [fp]
-	.loc 3 317 0
+	.loc 3 318 0
 	str	r0, [r3]
-	.loc 3 319 0
-	ldr	r3, .L645+144
 	.loc 3 320 0
+	ldr	r3, .L651+144
+	.loc 3 321 0
 	lsls	r2, r2, #1
-	.loc 3 319 0
-	ldrh	r4, [r3]
-.LVL707:
 	.loc 3 320 0
+	ldrh	r4, [r3]
+.LVL715:
+	.loc 3 321 0
 	adds	r2, r2, #1
 	str	r2, [r5]
-	.loc 3 321 0
+	.loc 3 322 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL708:
-	ldr	r3, .L645+148
+.LVL716:
+	ldr	r3, .L651+148
 	str	r0, [r3]
-	.loc 3 322 0
+	.loc 3 323 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL709:
-	ldr	r3, .L645+152
+.LVL717:
+	ldr	r3, .L651+152
 	str	r0, [r3]
-	.loc 3 323 0
+	.loc 3 324 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL710:
+.LVL718:
 	str	r0, [r7]
-	.loc 3 324 0
+	.loc 3 325 0
 	ldr	r0, [r5]
 	muls	r0, r4, r0
 	bl	ftl_malloc
-.LVL711:
+.LVL719:
 	str	r0, [r6]
-	.loc 3 325 0
+	.loc 3 326 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL712:
-	ldr	r2, .L645+156
+.LVL720:
+	ldr	r2, .L651+156
 	str	r0, [r2]
-	.loc 3 326 0
+	.loc 3 327 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL713:
-	ldr	r2, .L645+160
-	.loc 3 329 0
-	ldr	r4, .L645+164
-.LVL714:
-	.loc 3 326 0
-	str	r0, [r2]
+.LVL721:
+	ldr	r2, .L651+160
+	.loc 3 330 0
+	ldr	r4, .L651+164
+.LVL722:
 	.loc 3 327 0
+	str	r0, [r2]
+	.loc 3 328 0
 	ldr	r0, [r5]
 	mul	r0, r8, r0
 	bl	ftl_malloc
-.LVL715:
-	ldr	r2, .L645+168
-	.loc 3 329 0
+.LVL723:
+	ldr	r2, .L651+168
+	.loc 3 330 0
 	ldrh	r3, [fp]
-	.loc 3 327 0
+	.loc 3 328 0
 	str	r0, [r2]
-	.loc 3 329 0
+	.loc 3 330 0
 	ldrh	r2, [r4]
 	mul	fp, r3, r2
-.LVL716:
-	.loc 3 330 0
+.LVL724:
+	.loc 3 331 0
 	mov	r0, fp
 	bl	ftl_malloc
-.LVL717:
-	ldr	r2, .L645+172
+.LVL725:
+	ldr	r2, .L651+172
 	str	r0, [r2]
-	.loc 3 331 0
+	.loc 3 332 0
 	lsl	r0, fp, #2
 	bl	ftl_malloc
-.LVL718:
-	ldr	r3, .L645+176
+.LVL726:
+	ldr	r3, .L651+176
 	str	r0, [r3]
-	.loc 3 332 0
+	.loc 3 333 0
 	ldrh	r3, [r4]
 	ldr	r0, [r5]
-	.loc 3 335 0
-	ldr	r4, .L645+180
-	ldr	r5, .L645+184
-	.loc 3 332 0
+	.loc 3 336 0
+	ldr	r4, .L651+180
+	ldr	r5, .L651+184
+	.loc 3 333 0
 	muls	r0, r3, r0
 	bl	ftl_malloc
-.LVL719:
-	ldr	r3, .L645+188
+.LVL727:
+	ldr	r3, .L651+188
 	str	r0, [r3]
-	.loc 3 335 0
+	.loc 3 336 0
 	ldrh	r0, [r4]
 	lsls	r0, r0, #1
 	uxth	r0, r0
 	strh	r0, [r5]	@ movhi
-	.loc 3 336 0
+	.loc 3 337 0
 	bl	ftl_malloc
-.LVL720:
-	ldr	r3, .L645+192
+.LVL728:
+	ldr	r3, .L651+192
 	str	r0, [r3]
-	.loc 3 337 0
+	.loc 3 338 0
 	ldrh	r3, [r5]
+	.loc 3 339 0
+	ldr	r0, .L651+196
 	.loc 3 338 0
-	ldr	r0, .L645+196
-	.loc 3 337 0
 	addw	r3, r3, #547
 	lsrs	r3, r3, #9
-	.loc 3 338 0
+	.loc 3 339 0
 	and	r0, r0, r3, lsl #9
-	.loc 3 337 0
-	strh	r3, [r5]	@ movhi
 	.loc 3 338 0
+	strh	r3, [r5]	@ movhi
+	.loc 3 339 0
 	bl	ftl_malloc
-.LVL721:
-	.loc 3 345 0
+.LVL729:
+	.loc 3 346 0
 	ldrh	fp, [r4]
-.LVL722:
-	.loc 3 338 0
-	ldr	r3, .L645+200
+.LVL730:
+	.loc 3 339 0
+	ldr	r3, .L651+200
 	str	r0, [r3]
-	.loc 3 345 0
+	.loc 3 346 0
 	lsl	fp, fp, #1
-	.loc 3 339 0
-	ldr	r3, .L645+204
+	.loc 3 340 0
+	ldr	r3, .L651+204
 	adds	r0, r0, #32
 	str	r0, [r3]
-.LVL723:
-	.loc 3 347 0
+.LVL731:
+	.loc 3 348 0
 	mov	r0, fp
 	bl	ftl_malloc
-.LVL724:
-	ldr	r3, .L645+208
+.LVL732:
+	ldr	r3, .L651+208
 	str	r0, [r3]
-	.loc 3 349 0
+	.loc 3 350 0
 	mov	r0, fp
 	bl	ftl_malloc
-.LVL725:
+.LVL733:
+	.loc 3 351 0
+	ldr	fp, .L651+296
+.LVL734:
 	.loc 3 350 0
-	ldr	fp, .L645+296
-.LVL726:
-	.loc 3 349 0
-	ldr	r3, .L645+212
+	ldr	r3, .L651+212
 	str	r0, [r3]
-.LVL727:
-	.loc 3 350 0
+.LVL735:
+	.loc 3 351 0
 	ldr	r3, [fp]
 	lsls	r5, r3, #1
-.LVL728:
-	.loc 3 351 0
+.LVL736:
+	.loc 3 352 0
 	mov	r0, r5
 	bl	ftl_malloc
-.LVL729:
-	ldr	r2, .L645+216
+.LVL737:
+	ldr	r2, .L651+216
 	str	r0, [r2]
-	.loc 3 352 0
+	.loc 3 353 0
 	mov	r0, r5
 	bl	ftl_malloc
-.LVL730:
-	ldr	r3, .L645+220
-	.loc 3 354 0
-	ldr	r5, .L645+224
-.LVL731:
-	.loc 3 352 0
-	str	r0, [r3]
+.LVL738:
+	ldr	r3, .L651+220
+	.loc 3 355 0
+	ldr	r5, .L651+224
+.LVL739:
 	.loc 3 353 0
+	str	r0, [r3]
+	.loc 3 354 0
 	ldrh	r0, [r4]
 	lsrs	r0, r0, #3
 	adds	r0, r0, #4
 	bl	ftl_malloc
-.LVL732:
-	ldr	r3, .L645+228
+.LVL740:
+	ldr	r3, .L651+228
 	str	r0, [r3]
-	.loc 3 354 0
+	.loc 3 355 0
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-.LVL733:
-	ldr	r2, .L645+232
+.LVL741:
+	ldr	r2, .L651+232
 	str	r0, [r2]
-	.loc 3 355 0
+	.loc 3 356 0
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-.LVL734:
-	ldr	r2, .L645+236
+.LVL742:
+	ldr	r2, .L651+236
 	str	r0, [r2]
-	.loc 3 356 0
+	.loc 3 357 0
 	ldrh	r0, [r5]
-	ldr	r5, .L645+120
+	ldr	r5, .L651+120
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-.LVL735:
-	ldr	r3, .L645+240
+.LVL743:
+	ldr	r3, .L651+240
 	str	r0, [r3]
-	.loc 3 357 0
-	ldr	r3, .L645+244
+	.loc 3 358 0
+	ldr	r3, .L651+244
 	ldrh	r0, [r3]
 	str	r3, [sp]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-.LVL736:
-	.loc 3 358 0
+.LVL744:
+	.loc 3 359 0
 	ldr	r3, [sp]
-	.loc 3 357 0
-	ldr	r2, .L645+248
 	.loc 3 358 0
+	ldr	r2, .L651+248
+	.loc 3 359 0
 	ldr	r1, [sp, #4]
-	.loc 3 357 0
-	str	r0, [r2]
 	.loc 3 358 0
+	str	r0, [r2]
+	.loc 3 359 0
 	ldrh	r2, [r3]
 	lsls	r2, r2, #2
 	bl	ftl_memset
-.LVL737:
-	.loc 3 360 0
-	ldr	r3, .L645+252
-	ldrh	r0, [r3]
+.LVL745:
 	.loc 3 361 0
+	ldr	r3, .L651+252
+	ldrh	r0, [r3]
+	.loc 3 362 0
 	lsls	r0, r0, #2
-.LVL738:
+.LVL746:
 	bl	ftl_malloc
-.LVL739:
-	ldr	r3, .L645+256
+.LVL747:
+	ldr	r3, .L651+256
 	str	r0, [r3]
-.LVL740:
-	.loc 3 362 0
+.LVL748:
+	.loc 3 363 0
 	ldr	r0, [fp]
+	.loc 3 365 0
+	ldr	fp, .L651+300
 	.loc 3 364 0
-	ldr	fp, .L645+300
-	.loc 3 363 0
 	lsls	r0, r0, #2
-.LVL741:
+.LVL749:
 	bl	ftl_malloc
-.LVL742:
-	ldr	r3, .L645+260
+.LVL750:
+	ldr	r3, .L651+260
 	str	r0, [r3]
-.LVL743:
-	.loc 3 364 0
-	ldrh	r0, [fp]
+.LVL751:
 	.loc 3 365 0
+	ldrh	r0, [fp]
+	.loc 3 366 0
 	mul	r0, r8, r0
-.LVL744:
-	.loc 3 371 0
-	ldr	r8, .L645+304
-	.loc 3 365 0
+.LVL752:
+	.loc 3 372 0
+	ldr	r8, .L651+304
+	.loc 3 366 0
 	bl	ftl_malloc
-.LVL745:
+.LVL753:
+	.loc 3 367 0
+	ldr	r2, .L651+144
 	.loc 3 366 0
-	ldr	r2, .L645+144
-	.loc 3 365 0
-	ldr	r3, .L645+264
+	ldr	r3, .L651+264
 	str	r0, [r3]
-.LVL746:
-	.loc 3 366 0
+.LVL754:
+	.loc 3 367 0
 	ldrh	r0, [r2]
 	ldrh	r3, [fp]
-	ldr	fp, .L645+132
-	.loc 3 367 0
+	ldr	fp, .L651+132
+	.loc 3 368 0
 	muls	r0, r3, r0
-.LVL747:
+.LVL755:
 	bl	ftl_malloc
-.LVL748:
-	ldr	r3, .L645+268
+.LVL756:
+	ldr	r3, .L651+268
 	str	r0, [r3]
-.LVL749:
-	.loc 3 369 0
+.LVL757:
+	.loc 3 370 0
 	movs	r0, #6
-	.loc 3 368 0
+	.loc 3 369 0
 	ldrh	r3, [r4]
+	.loc 3 371 0
+	ldr	r4, .L651+272
 	.loc 3 370 0
-	ldr	r4, .L645+272
-	.loc 3 369 0
 	muls	r0, r3, r0
-.LVL750:
+.LVL758:
 	bl	ftl_malloc
-.LVL751:
-	ldr	r3, .L645+276
+.LVL759:
+	ldr	r3, .L651+276
 	str	r0, [r3]
-	.loc 3 370 0
-	ldr	r3, .L645+280
-	ldrh	r0, [r3]
 	.loc 3 371 0
+	ldr	r3, .L651+280
+	ldrh	r0, [r3]
+	.loc 3 372 0
 	ldrh	r3, [r8]
-	.loc 3 370 0
+	.loc 3 371 0
 	adds	r0, r0, #31
 	asrs	r0, r0, #5
 	strh	r0, [r4]	@ movhi
-.LVL752:
-	.loc 3 371 0
-	muls	r0, r3, r0
-.LVL753:
+.LVL760:
 	.loc 3 372 0
+	muls	r0, r3, r0
+.LVL761:
+	.loc 3 373 0
 	lsls	r0, r0, #2
-.LVL754:
+.LVL762:
 	bl	ftl_malloc
-.LVL755:
-	ldr	r2, .L645+284
+.LVL763:
+	ldr	r2, .L651+284
 	str	r5, [sp, #4]
-	ldr	r5, .L645+124
+	ldr	r5, .L651+124
 	mov	r1, r2
-	.loc 3 373 0
+	.loc 3 374 0
 	ldrh	r3, [r8]
-	.loc 3 372 0
+	.loc 3 373 0
 	str	r0, [r1, #28]!
-.LVL756:
-	.loc 3 374 0
+.LVL764:
+	.loc 3 375 0
 	ldrh	r0, [r4]
-	ldr	r8, .L645+140
-	ldr	lr, .L645+148
-	b	.L646
-.L647:
+	ldr	r8, .L651+140
+	ldr	lr, .L651+148
+	b	.L652
+.L653:
 	.align	2
-.L645:
-	.word	.LANCHOR71
+.L651:
+	.word	.LANCHOR70
 	.word	.LANCHOR118
-	.word	.LANCHOR72
+	.word	.LANCHOR71
 	.word	.LANCHOR21
-	.word	.LANCHOR68
-	.word	.LANCHOR65
-	.word	.LANCHOR96
+	.word	.LANCHOR67
 	.word	.LANCHOR64
+	.word	.LANCHOR94
+	.word	.LANCHOR63
 	.word	.LANCHOR124
+	.word	.LANCHOR65
 	.word	.LANCHOR66
-	.word	.LANCHOR67
-	.word	.LANCHOR63
+	.word	.LANCHOR62
+	.word	.LANCHOR72
 	.word	.LANCHOR73
-	.word	.LANCHOR74
+	.word	.LANCHOR75
 	.word	.LANCHOR76
 	.word	.LANCHOR77
-	.word	.LANCHOR78
 	.word	.LANCHOR117
-	.word	.LANCHOR89
+	.word	.LANCHOR87
 	.word	.LANCHOR119
-	.word	.LANCHOR86
-	.word	.LANCHOR113
-	.word	.LANCHOR101
-	.word	.LANCHOR102
 	.word	.LANCHOR84
+	.word	.LANCHOR112
+	.word	.LANCHOR99
+	.word	.LANCHOR100
+	.word	.LANCHOR82
+	.word	.LANCHOR83
 	.word	.LANCHOR85
-	.word	.LANCHOR87
+	.word	.LANCHOR101
 	.word	.LANCHOR103
-	.word	.LANCHOR105
-	.word	.LANCHOR97
-	.word	.LANCHOR100
+	.word	.LANCHOR95
+	.word	.LANCHOR98
 	.word	.LANCHOR120
 	.word	.LANCHOR121
 	.word	.LANCHOR122
+	.word	.LANCHOR91
 	.word	.LANCHOR93
-	.word	.LANCHOR95
 	.word	.LANCHOR23
-	.word	.LANCHOR39
+	.word	.LANCHOR107
 	.word	.LANCHOR123
-	.word	.LANCHOR116
-	.word	.LANCHOR114
-	.word	.LANCHOR24
-	.word	.LANCHOR92
-	.word	.LANCHOR109
 	.word	.LANCHOR115
+	.word	.LANCHOR113
+	.word	.LANCHOR24
+	.word	.LANCHOR90
+	.word	.LANCHOR108
+	.word	.LANCHOR114
 	.word	.LANCHOR6
 	.word	.LANCHOR125
-	.word	.LANCHOR94
+	.word	.LANCHOR92
 	.word	.LANCHOR126
 	.word	33553920
 	.word	.LANCHOR127
-	.word	.LANCHOR40
-	.word	.LANCHOR128
 	.word	.LANCHOR43
+	.word	.LANCHOR128
+	.word	.LANCHOR42
 	.word	.LANCHOR129
 	.word	.LANCHOR130
 	.word	.LANCHOR27
@@ -7616,254 +7739,254 @@ FtlMemInit:
 	.word	.LANCHOR32
 	.word	.LANCHOR134
 	.word	.LANCHOR135
-	.word	.LANCHOR56
+	.word	.LANCHOR55
 	.word	.LANCHOR136
 	.word	.LANCHOR137
-	.word	.LANCHOR41
+	.word	.LANCHOR40
 	.word	.LANCHOR17
 	.word	.LANCHOR37
 	.word	.LANCHOR3
-	.word	.LANCHOR112
+	.word	.LANCHOR111
 	.word	.LANCHOR30
 	.word	.LANCHOR33
 	.word	.LANCHOR10
-.L646:
-	ldr	ip, .L648+100
+.L652:
+	ldr	ip, .L654+100
 	lsls	r0, r0, #2
 	str	r5, [sp, #8]
-	ldr	r5, .L648
-	.loc 3 373 0
+	ldr	r5, .L654
+	.loc 3 374 0
 	str	r3, [sp]
 	mov	r4, r0
 	movs	r3, #1
 	str	r5, [sp, #12]
-.LVL757:
-.L545:
-	.loc 3 373 0 is_stmt 0 discriminator 1
+.LVL765:
+.L551:
+	.loc 3 374 0 is_stmt 0 discriminator 1
 	ldr	r5, [sp]
 	cmp	r3, r5
-	bcc	.L546
+	bcc	.L552
 	add	r3, r2, r3, lsl #2
-.LVL758:
-	ldr	r1, .L648+4
-	.loc 3 379 0 is_stmt 1
+.LVL766:
+	ldr	r1, .L654+4
+	.loc 3 380 0 is_stmt 1
 	movs	r0, #0
 	adds	r3, r3, #24
-.L547:
-	.loc 3 377 0 discriminator 1
+.L553:
+	.loc 3 378 0 discriminator 1
 	cmp	r1, r3
-	bne	.L548
-	.loc 3 383 0
-	ldr	r3, .L648+8
+	bne	.L554
+	.loc 3 384 0
+	ldr	r3, .L654+8
 	ldr	r3, [r3]
-	cbnz	r3, .L549
-.L551:
-	.loc 3 385 0
-	ldr	r1, .L648+12
-	ldr	r0, .L648+16
-	bl	printf
-.LVL759:
+	cbnz	r3, .L555
+.L557:
 	.loc 3 386 0
+	ldr	r1, .L654+12
+	ldr	r0, .L654+16
+	bl	printf
+.LVL767:
+	.loc 3 387 0
 	mov	r0, #-1
-.L544:
-	.loc 3 484 0
+.L550:
+	.loc 3 485 0
 	add	sp, sp, #16
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL760:
-.L546:
+.LVL768:
+.L552:
 	.cfi_restore_state
-	.loc 3 374 0 discriminator 3
+	.loc 3 375 0 discriminator 3
 	ldr	r5, [r2, #28]
-	.loc 3 373 0 discriminator 3
-	adds	r3, r3, #1
-.LVL761:
 	.loc 3 374 0 discriminator 3
+	adds	r3, r3, #1
+.LVL769:
+	.loc 3 375 0 discriminator 3
 	add	r5, r5, r4
 	add	r4, r4, r0
 	str	r5, [r1, #4]!
-	b	.L545
-.LVL762:
-.L548:
-	.loc 3 379 0 discriminator 2
+	b	.L551
+.LVL770:
+.L554:
+	.loc 3 380 0 discriminator 2
 	str	r0, [r3, #4]!
-	b	.L547
-.L549:
-	.loc 3 388 0
-	ldr	r3, .L648+20
+	b	.L553
+.L555:
+	.loc 3 389 0
+	ldr	r3, .L654+20
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 393 0
-	ldr	r3, .L648+24
+	beq	.L557
+	.loc 3 394 0
+	ldr	r3, .L654+24
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 398 0
-	ldr	r3, .L648+28
+	beq	.L557
+	.loc 3 399 0
+	ldr	r3, .L654+28
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 404 0
-	ldr	r3, .L648+32
+	beq	.L557
+	.loc 3 405 0
+	ldr	r3, .L654+32
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 409 0
-	ldr	r3, .L648+36
+	beq	.L557
+	.loc 3 410 0
+	ldr	r3, .L654+36
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 414 0
-	ldr	r3, .L648+40
+	beq	.L557
+	.loc 3 415 0
+	ldr	r3, .L654+40
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 419 0
+	beq	.L557
+	.loc 3 420 0
 	ldr	r3, [r2, #28]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 425 0
-	ldr	r3, .L648+44
+	beq	.L557
+	.loc 3 426 0
+	ldr	r3, .L654+44
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 430 0
-	ldr	r3, .L648+48
+	beq	.L557
+	.loc 3 431 0
+	ldr	r3, .L654+48
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 430 0 is_stmt 0 discriminator 1
+	beq	.L557
+	.loc 3 431 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #4]
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 435 0 is_stmt 1
+	beq	.L557
+	.loc 3 436 0 is_stmt 1
 	ldr	r3, [sp, #8]
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 435 0 is_stmt 0 discriminator 1
+	beq	.L557
+	.loc 3 436 0 is_stmt 0 discriminator 1
 	ldr	r3, [fp]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 435 0 discriminator 2
+	beq	.L557
+	.loc 3 436 0 discriminator 2
 	ldr	r3, [r10]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 435 0 discriminator 3
+	beq	.L557
+	.loc 3 436 0 discriminator 3
 	ldr	r3, [r8]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 435 0 discriminator 4
+	beq	.L557
+	.loc 3 436 0 discriminator 4
 	ldr	r3, [sp, #12]
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 440 0 is_stmt 1
+	beq	.L557
+	.loc 3 441 0 is_stmt 1
 	ldr	r3, [lr]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 440 0 is_stmt 0 discriminator 1
+	beq	.L557
+	.loc 3 441 0 is_stmt 0 discriminator 1
 	ldr	r3, [ip]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 440 0 discriminator 2
+	beq	.L557
+	.loc 3 441 0 discriminator 2
 	ldr	r3, [r7]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 440 0 discriminator 3
+	beq	.L557
+	.loc 3 441 0 discriminator 3
 	ldr	r3, [r6]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 441 0 is_stmt 1
-	ldr	r3, .L648+52
+	beq	.L557
+	.loc 3 442 0 is_stmt 1
+	ldr	r3, .L654+52
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 441 0 is_stmt 0 discriminator 1
-	ldr	r3, .L648+56
+	beq	.L557
+	.loc 3 442 0 is_stmt 0 discriminator 1
+	ldr	r3, .L654+56
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 441 0 discriminator 2
-	ldr	r3, .L648+60
+	beq	.L557
+	.loc 3 442 0 discriminator 2
+	ldr	r3, .L654+60
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 446 0 is_stmt 1
-	ldr	r3, .L648+64
+	beq	.L557
+	.loc 3 447 0 is_stmt 1
+	ldr	r3, .L654+64
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 446 0 is_stmt 0 discriminator 1
-	ldr	r3, .L648+68
+	beq	.L557
+	.loc 3 447 0 is_stmt 0 discriminator 1
+	ldr	r3, .L654+68
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 446 0 discriminator 2
-	ldr	r3, .L648+72
+	beq	.L557
+	.loc 3 447 0 discriminator 2
+	ldr	r3, .L654+72
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 452 0 is_stmt 1
-	ldr	r3, .L648+76
+	beq	.L557
+	.loc 3 453 0 is_stmt 1
+	ldr	r3, .L654+76
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 452 0 is_stmt 0 discriminator 1
-	ldr	r3, .L648+80
+	beq	.L557
+	.loc 3 453 0 is_stmt 0 discriminator 1
+	ldr	r3, .L654+80
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 458 0 is_stmt 1
-	ldr	r3, .L648+84
+	beq	.L557
+	.loc 3 459 0 is_stmt 1
+	ldr	r3, .L654+84
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 464 0
-	ldr	r3, .L648+88
+	beq	.L557
+	.loc 3 465 0
+	ldr	r3, .L654+88
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 470 0
-	ldr	r3, .L648+92
+	beq	.L557
+	.loc 3 471 0
+	ldr	r3, .L654+92
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 476 0
-	ldr	r3, .L648+96
+	beq	.L557
+	.loc 3 477 0
+	ldr	r3, .L654+96
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 483 0
+	beq	.L557
+	.loc 3 484 0
 	movs	r0, #0
-	b	.L544
-.L649:
+	b	.L550
+.L655:
 	.align	2
-.L648:
+.L654:
 	.word	.LANCHOR121
 	.word	.LANCHOR37+56
 	.word	.LANCHOR129
 	.word	.LANCHOR138
-	.word	.LC82
+	.word	.LC85
 	.word	.LANCHOR130
 	.word	.LANCHOR134
 	.word	.LANCHOR135
-	.word	.LANCHOR56
+	.word	.LANCHOR55
 	.word	.LANCHOR136
-	.word	.LANCHOR41
-	.word	.LANCHOR43
-	.word	.LANCHOR97
-	.word	.LANCHOR116
+	.word	.LANCHOR40
+	.word	.LANCHOR42
+	.word	.LANCHOR95
+	.word	.LANCHOR115
+	.word	.LANCHOR113
+	.word	.LANCHOR90
+	.word	.LANCHOR108
 	.word	.LANCHOR114
 	.word	.LANCHOR92
-	.word	.LANCHOR109
-	.word	.LANCHOR115
-	.word	.LANCHOR94
-	.word	.LANCHOR40
+	.word	.LANCHOR43
 	.word	.LANCHOR126
 	.word	.LANCHOR36
 	.word	.LANCHOR131
@@ -7887,9 +8010,9 @@ FtlBbt2Bitmap:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL763:
+.LVL771:
 	.loc 4 69 0
-	ldr	r3, .L656
+	ldr	r3, .L662
 	.loc 4 66 0
 	push	{r4, r5, r6, r7, r8, lr}
 	.cfi_def_cfa_offset 24
@@ -7902,7 +8025,7 @@ FtlBbt2Bitmap:
 	.loc 4 66 0
 	mov	r5, r0
 	.loc 4 74 0
-	ldr	r7, .L656+4
+	ldr	r7, .L662+4
 	.loc 4 66 0
 	mov	r6, r1
 	subs	r4, r5, #2
@@ -7910,32 +8033,32 @@ FtlBbt2Bitmap:
 	.loc 4 69 0
 	ldrh	r2, [r3]
 	movs	r1, #0
-.LVL764:
+.LVL772:
 	.loc 4 74 0
-	ldr	r8, .L656+12
+	ldr	r8, .L662+12
 	.loc 4 69 0
 	mov	r0, r6
-.LVL765:
+.LVL773:
 	lsls	r2, r2, #2
 	bl	ftl_memset
-.LVL766:
-.L653:
+.LVL774:
+.L659:
 	.loc 4 72 0
 	ldrh	r3, [r4, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L650
+	beq	.L656
 	.loc 4 74 0
 	ldrh	r2, [r7]
 	cmp	r2, r3
-	bhi	.L652
+	bhi	.L658
 	.loc 4 74 0 is_stmt 0 discriminator 1
 	movs	r2, #74
 	mov	r1, r8
-	ldr	r0, .L656+8
+	ldr	r0, .L662+8
 	bl	printf
-.LVL767:
-.L652:
+.LVL775:
+.L658:
 	.loc 4 75 0 is_stmt 1 discriminator 2
 	ldrh	r3, [r4, #2]!
 	movs	r2, #1
@@ -7949,13 +8072,13 @@ FtlBbt2Bitmap:
 	orr	r2, r2, r3
 	str	r2, [r6, r1, lsl #2]
 	.loc 4 70 0 discriminator 2
-	bne	.L653
-.L650:
+	bne	.L659
+.L656:
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL768:
-.L657:
+.LVL776:
+.L663:
 	.align	2
-.L656:
+.L662:
 	.word	.LANCHOR137
 	.word	.LANCHOR17
 	.word	.LC1
@@ -7979,7 +8102,7 @@ FtlBbtMemInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	.loc 4 150 0
-	ldr	r0, .L659
+	ldr	r0, .L665
 	movw	r3, #65535
 	.loc 4 152 0
 	movs	r2, #16
@@ -7992,10 +8115,10 @@ FtlBbtMemInit:
 	.loc 4 152 0
 	adds	r0, r0, #12
 	b	ftl_memset
-.LVL769:
-.L660:
+.LVL777:
+.L666:
 	.align	2
-.L659:
+.L665:
 	.word	.LANCHOR37
 	.cfi_endproc
 .LFE230:
@@ -8014,9 +8137,9 @@ FtlFreeSysBlkQueueInit:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL770:
+.LVL778:
 	.loc 2 79 0
-	ldr	r3, .L662
+	ldr	r3, .L668
 	.loc 2 83 0
 	mov	r2, #2048
 	.loc 2 76 0
@@ -8038,15 +8161,15 @@ FtlFreeSysBlkQueueInit:
 	strh	r0, [r3], #8	@ movhi
 	.loc 2 83 0
 	mov	r0, r3
-.LVL771:
+.LVL779:
 	bl	ftl_memset
-.LVL772:
+.LVL780:
 	.loc 2 85 0
 	mov	r0, r4
 	pop	{r4, pc}
-.L663:
+.L669:
 	.align	2
-.L662:
+.L668:
 	.word	.LANCHOR38
 	.cfi_endproc
 .LFE240:
@@ -8061,14 +8184,14 @@ FtlFreeSysBlkQueueInit:
 	.type	load_l2p_region, %function
 load_l2p_region:
 .LFB256:
-	.loc 2 442 0
+	.loc 2 488 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL773:
-	.loc 2 446 0
-	ldr	r3, .L670
-	.loc 2 442 0
+.LVL781:
+	.loc 2 492 0
+	ldr	r3, .L676
+	.loc 2 488 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 40
 	.cfi_offset 4, -32
@@ -8079,146 +8202,146 @@ load_l2p_region:
 	.cfi_offset 10, -12
 	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	.loc 2 442 0
+	.loc 2 488 0
 	mov	r5, r0
 	mov	r10, r1
-	.loc 2 446 0
+	.loc 2 492 0
 	ldrh	r2, [r3]
 	str	r3, [sp, #4]
 	cmp	r2, r0
-	bcs	.L665
-	.loc 2 446 0 is_stmt 0 discriminator 1
-	mov	r2, #446
-	ldr	r1, .L670+4
-.LVL774:
-	ldr	r0, .L670+8
-.LVL775:
+	bcs	.L671
+	.loc 2 492 0 is_stmt 0 discriminator 1
+	mov	r2, #492
+	ldr	r1, .L676+4
+.LVL782:
+	ldr	r0, .L676+8
+.LVL783:
 	bl	printf
-.LVL776:
-.L665:
-	.loc 2 447 0 is_stmt 1
-	ldr	fp, .L670+40
+.LVL784:
+.L671:
+	.loc 2 493 0 is_stmt 1
+	ldr	fp, .L676+40
 	movs	r4, #12
-	ldr	r7, .L670+12
+	ldr	r7, .L676+12
 	ldr	r3, [fp]
 	ldr	r8, [r3, r5, lsl #2]
-.LVL777:
-	.loc 2 449 0
+.LVL785:
+	.loc 2 495 0
 	cmp	r8, #0
-	bne	.L666
-	.loc 2 450 0
+	bne	.L672
+	.loc 2 496 0
 	mul	r4, r4, r10
 	ldr	r2, [r7]
 	movs	r1, #255
 	adds	r0, r2, r4
-	ldr	r2, .L670+16
+	ldr	r2, .L676+16
 	ldr	r0, [r0, #8]
 	ldrh	r2, [r2]
 	bl	ftl_memset
-.LVL778:
-	.loc 2 451 0
+.LVL786:
+	.loc 2 497 0
 	ldr	r2, [r7]
 	adds	r1, r2, r4
 	strh	r5, [r2, r4]	@ movhi
-	.loc 2 452 0
+	.loc 2 498 0
 	str	r8, [r1, #4]
-.L667:
-	.loc 2 473 0
+.L673:
+	.loc 2 519 0
 	movs	r0, #0
 	add	sp, sp, #8
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL779:
-.L666:
+.LVL787:
+.L672:
 	.cfi_restore_state
-	.loc 2 456 0
+	.loc 2 502 0
 	mul	r4, r4, r10
 	ldr	r2, [r7]
-	.loc 2 455 0
-	ldr	r6, .L670+20
-	.loc 2 456 0
+	.loc 2 501 0
+	ldr	r6, .L676+20
+	.loc 2 502 0
 	add	r2, r2, r4
-	.loc 2 458 0
+	.loc 2 504 0
 	mov	r0, r6
-	.loc 2 456 0
+	.loc 2 502 0
 	ldr	r2, [r2, #8]
-	.loc 2 455 0
+	.loc 2 501 0
 	str	r8, [r6, #4]
-	.loc 2 456 0
+	.loc 2 502 0
 	str	r2, [r6, #8]
-	.loc 2 457 0
-	ldr	r2, .L670+24
+	.loc 2 503 0
+	ldr	r2, .L676+24
 	ldr	r2, [r2]
 	str	r2, [r6, #12]
-	.loc 2 458 0
+	.loc 2 504 0
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL780:
-	.loc 2 459 0
+.LVL788:
+	.loc 2 505 0
 	ldr	r10, [r6, #12]
-.LVL781:
-	.loc 2 461 0
+.LVL789:
+	.loc 2 507 0
 	ldrh	r2, [r10, #8]
 	cmp	r2, r5
-	beq	.L668
-	.loc 2 462 0
+	beq	.L674
+	.loc 2 508 0
 	mov	r2, r8
 	mov	r1, r5
-	ldr	r0, .L670+28
+	ldr	r0, .L676+28
 	bl	printf
-.LVL782:
-	.loc 2 463 0
+.LVL790:
+	.loc 2 509 0
 	movs	r3, #4
 	ldr	r1, [r6, #12]
 	mov	r2, r3
-	ldr	r0, .L670+32
+	ldr	r0, .L676+32
 	bl	rknand_print_hex
-.LVL783:
-	.loc 2 464 0
+.LVL791:
+	.loc 2 510 0
 	ldr	r3, [sp, #4]
 	movs	r2, #4
 	ldr	r1, [fp]
-	ldr	r0, .L670+36
+	ldr	r0, .L676+36
 	ldrh	r3, [r3]
 	bl	rknand_print_hex
-.LVL784:
-.L668:
-	.loc 2 467 0
+.LVL792:
+.L674:
+	.loc 2 513 0
 	ldrh	r3, [r10, #8]
 	cmp	r3, r5
-	beq	.L669
-	.loc 2 467 0 is_stmt 0 discriminator 1
-	movw	r2, #467
-	ldr	r1, .L670+4
-	ldr	r0, .L670+8
+	beq	.L675
+	.loc 2 513 0 is_stmt 0 discriminator 1
+	movw	r2, #513
+	ldr	r1, .L676+4
+	ldr	r0, .L676+8
 	bl	printf
-.LVL785:
-.L669:
-	.loc 2 470 0 is_stmt 1
+.LVL793:
+.L675:
+	.loc 2 516 0 is_stmt 1
 	ldr	r3, [r7]
 	movs	r1, #0
 	adds	r2, r3, r4
 	str	r1, [r2, #4]
-	.loc 2 471 0
+	.loc 2 517 0
 	strh	r5, [r3, r4]	@ movhi
-	.loc 2 472 0
-	b	.L667
-.L671:
+	.loc 2 518 0
+	b	.L673
+.L677:
 	.align	2
-.L670:
+.L676:
 	.word	.LANCHOR32
 	.word	.LANCHOR140
 	.word	.LC1
-	.word	.LANCHOR56
+	.word	.LANCHOR55
 	.word	.LANCHOR23
+	.word	.LANCHOR106
 	.word	.LANCHOR108
-	.word	.LANCHOR109
-	.word	.LC83
-	.word	.LC84
-	.word	.LC85
+	.word	.LC86
+	.word	.LC87
+	.word	.LC88
 	.word	.LANCHOR134
 	.cfi_endproc
 .LFE256:
@@ -8233,14 +8356,14 @@ load_l2p_region:
 	.type	ftl_free_no_use_map_blk, %function
 ftl_free_no_use_map_blk:
 .LFB257:
-	.loc 2 476 0
+	.loc 2 522 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL786:
-	.loc 2 485 0
+.LVL794:
+	.loc 2 531 0
 	ldrh	r2, [r0, #10]
-	.loc 2 476 0
+	.loc 2 522 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 40
 	.cfi_offset 4, -32
@@ -8251,147 +8374,147 @@ ftl_free_no_use_map_blk:
 	.cfi_offset 10, -12
 	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	.loc 2 476 0
+	.loc 2 522 0
 	mov	r4, r0
-	.loc 2 479 0
+	.loc 2 525 0
 	ldr	r5, [r0, #20]
-	.loc 2 485 0
+	.loc 2 531 0
 	movs	r1, #0
-	.loc 2 477 0
+	.loc 2 523 0
 	ldr	r10, [r0, #12]
-.LVL787:
-	.loc 2 485 0
+.LVL795:
+	.loc 2 531 0
 	lsls	r2, r2, #1
-	.loc 2 478 0
+	.loc 2 524 0
 	ldr	r6, [r0, #24]
-.LVL788:
-	.loc 2 485 0
+.LVL796:
+	.loc 2 531 0
 	mov	r0, r5
-.LVL789:
+.LVL797:
 	bl	ftl_memset
-.LVL790:
-	.loc 2 486 0
+.LVL798:
+	.loc 2 532 0
 	movs	r3, #0
-.LVL791:
-.L673:
-	.loc 2 486 0 is_stmt 0 discriminator 1
+.LVL799:
+.L679:
+	.loc 2 532 0 is_stmt 0 discriminator 1
 	ldrh	r1, [r4, #6]
 	uxth	r2, r3
 	cmp	r1, r2
-	bhi	.L677
-	.loc 2 494 0 is_stmt 1
+	bhi	.L683
+	.loc 2 540 0 is_stmt 1
 	ldrh	r3, [r5]
-.LVL792:
-	.loc 2 497 0
+.LVL800:
+	.loc 2 543 0
 	movs	r6, #0
-.LVL793:
-	.loc 2 498 0
-	ldr	r2, .L686
-.LVL794:
-	.loc 2 495 0
+.LVL801:
+	.loc 2 544 0
+	ldr	r2, .L692
+.LVL802:
+	.loc 2 541 0
 	mov	fp, r6
-.LVL795:
-.L678:
-	.loc 2 497 0 discriminator 1
+.LVL803:
+.L684:
+	.loc 2 543 0 discriminator 1
 	ldrh	r0, [r4, #10]
 	uxth	r1, r6
-.LVL796:
+.LVL804:
 	cmp	r0, r1
-	bhi	.L682
-	.loc 2 513 0
+	bhi	.L688
+	.loc 2 559 0
 	mov	r0, fp
 	add	sp, sp, #8
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL797:
-.L677:
+.LVL805:
+.L683:
 	.cfi_restore_state
-	.loc 2 487 0
+	.loc 2 533 0
 	uxth	r2, r3
 	ldr	r1, [r6, r2, lsl #2]
-	.loc 2 488 0
+	.loc 2 534 0
 	movs	r2, #0
-	.loc 2 487 0
+	.loc 2 533 0
 	ubfx	r1, r1, #10, #16
-.LVL798:
-.L674:
-	.loc 2 488 0 discriminator 1
+.LVL806:
+.L680:
+	.loc 2 534 0 discriminator 1
 	ldrh	r7, [r4, #10]
 	uxth	r0, r2
 	cmp	r7, r0
-	bhi	.L676
-.LVL799:
+	bhi	.L682
+.LVL807:
 	adds	r3, r3, #1
-.LVL800:
-	b	.L673
-.LVL801:
-.L676:
-	.loc 2 489 0
+.LVL808:
+	b	.L679
+.LVL809:
+.L682:
+	.loc 2 535 0
 	uxth	r0, r2
 	adds	r2, r2, #1
-.LVL802:
+.LVL810:
 	ldrh	r7, [r10, r0, lsl #1]
 	cmp	r7, r1
-	.loc 2 490 0
+	.loc 2 536 0
 	ittt	eq
 	ldrheq	r7, [r5, r0, lsl #1]
 	addeq	r7, r7, #1
 	strheq	r7, [r5, r0, lsl #1]	@ movhi
-.LVL803:
-	b	.L674
-.LVL804:
-.L682:
-	.loc 2 498 0
+.LVL811:
+	b	.L680
+.LVL812:
+.L688:
+	.loc 2 544 0
 	ldrh	r0, [r4]
 	uxth	r7, r6
 	cmp	r0, r1
-	bne	.L679
-	.loc 2 498 0 is_stmt 0 discriminator 1
+	bne	.L685
+	.loc 2 544 0 is_stmt 0 discriminator 1
 	ldrh	r0, [r2]
 	ldrh	ip, [r4, #2]
 	cmp	ip, r0
-	.loc 2 499 0 is_stmt 1 discriminator 1
+	.loc 2 545 0 is_stmt 1 discriminator 1
 	it	cc
 	strhcc	r0, [r5, r7, lsl #1]	@ movhi
-.L679:
-	.loc 2 500 0
+.L685:
+	.loc 2 546 0
 	ldrh	r8, [r5, r7, lsl #1]
 	cmp	r3, r8
 	itt	hi
 	movhi	fp, r1
 	movhi	r3, r8
-.LVL805:
-	.loc 2 504 0
+.LVL813:
+	.loc 2 550 0
 	cmp	r8, #0
-	bne	.L681
-	.loc 2 504 0 is_stmt 0 discriminator 1
+	bne	.L687
+	.loc 2 550 0 is_stmt 0 discriminator 1
 	ldrh	r0, [r10, r7, lsl #1]
-	cbz	r0, .L681
-	.loc 2 506 0 is_stmt 1
+	cbz	r0, .L687
+	.loc 2 552 0 is_stmt 1
 	movs	r1, #1
-.LVL806:
+.LVL814:
 	str	r2, [sp, #4]
 	str	r3, [sp]
 	bl	FtlFreeSysBlkQueueIn
-.LVL807:
-	.loc 2 507 0
+.LVL815:
+	.loc 2 553 0
 	strh	r8, [r10, r7, lsl #1]	@ movhi
-	.loc 2 508 0
+	.loc 2 554 0
 	ldr	r2, [sp, #4]
 	ldrh	r1, [r4, #8]
 	ldr	r3, [sp]
 	subs	r1, r1, #1
 	strh	r1, [r4, #8]	@ movhi
-.LVL808:
-.L681:
-	adds	r6, r6, #1
-.LVL809:
-	b	.L678
+.LVL816:
 .L687:
+	adds	r6, r6, #1
+.LVL817:
+	b	.L684
+.L693:
 	.align	2
-.L686:
+.L692:
 	.word	.LANCHOR20
 	.cfi_endproc
 .LFE257:
@@ -8406,11 +8529,11 @@ ftl_free_no_use_map_blk:
 	.type	Ftl_write_map_blk_to_last_page, %function
 Ftl_write_map_blk_to_last_page:
 .LFB260:
-	.loc 2 583 0
+	.loc 2 632 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL810:
+.LVL818:
 	push	{r3, r4, r5, r6, r7, lr}
 	.cfi_def_cfa_offset 24
 	.cfi_offset 3, -24
@@ -8419,165 +8542,165 @@ Ftl_write_map_blk_to_last_page:
 	.cfi_offset 6, -12
 	.cfi_offset 7, -8
 	.cfi_offset 14, -4
-	.loc 2 591 0
+	.loc 2 640 0
 	movw	r2, #65535
 	ldrh	r3, [r0]
-	.loc 2 583 0
+	.loc 2 632 0
 	mov	r4, r0
-	.loc 2 586 0
+	.loc 2 635 0
 	ldr	r5, [r0, #12]
-.LVL811:
-	.loc 2 591 0
+.LVL819:
+	.loc 2 640 0
 	cmp	r3, r2
-	bne	.L689
-	.loc 2 592 0
+	bne	.L695
+	.loc 2 641 0
 	ldrh	r3, [r0, #8]
-	cbz	r3, .L690
-	.loc 2 592 0 is_stmt 0 discriminator 1
-	mov	r2, #592
-	ldr	r1, .L698
-	ldr	r0, .L698+4
-.LVL812:
+	cbz	r3, .L696
+	.loc 2 641 0 is_stmt 0 discriminator 1
+	movw	r2, #641
+	ldr	r1, .L704
+	ldr	r0, .L704+4
+.LVL820:
 	bl	printf
-.LVL813:
-.L690:
-	.loc 2 593 0 is_stmt 1
+.LVL821:
+.L696:
+	.loc 2 642 0 is_stmt 1
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	.loc 2 594 0
+	.loc 2 643 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL814:
-	.loc 2 595 0
+.LVL822:
+	.loc 2 644 0
 	movs	r3, #0
-	.loc 2 594 0
+	.loc 2 643 0
 	strh	r0, [r5]	@ movhi
-	.loc 2 595 0
+	.loc 2 644 0
 	strh	r3, [r4, #2]	@ movhi
-	.loc 2 596 0
+	.loc 2 645 0
 	strh	r3, [r4]	@ movhi
-	.loc 2 597 0
+	.loc 2 646 0
 	ldr	r3, [r4, #28]
 	adds	r3, r3, #1
 	str	r3, [r4, #28]
-.LVL815:
-.L691:
-	.loc 2 628 0
+.LVL823:
+.L697:
+	.loc 2 677 0
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.LVL816:
-.L689:
-	.loc 2 601 0
+.LVL824:
+.L695:
+	.loc 2 650 0
 	ldrh	r5, [r5, r3, lsl #1]
-.LVL817:
-	.loc 2 612 0
+.LVL825:
+	.loc 2 661 0
 	movs	r1, #255
-	.loc 2 602 0
+	.loc 2 651 0
 	ldrh	r3, [r0, #2]
-	ldr	r2, .L698+8
-	.loc 2 603 0
-	ldr	r7, .L698+12
-	.loc 2 587 0
+	ldr	r2, .L704+8
+	.loc 2 652 0
+	ldr	r7, .L704+12
+	.loc 2 636 0
 	ldr	r6, [r0, #24]
-	.loc 2 602 0
+	.loc 2 651 0
 	orr	r3, r3, r5, lsl #10
-	.loc 2 603 0
+	.loc 2 652 0
 	ldr	r0, [r7]
-.LVL818:
-	.loc 2 602 0
+.LVL826:
+	.loc 2 651 0
 	str	r3, [r2, #4]
-	.loc 2 604 0
-	ldr	r3, .L698+16
-	.loc 2 603 0
+	.loc 2 653 0
+	ldr	r3, .L704+16
+	.loc 2 652 0
 	str	r0, [r2, #8]
-	.loc 2 604 0
+	.loc 2 653 0
 	ldr	r3, [r3]
 	str	r3, [r2, #12]
-.LVL819:
-	.loc 2 607 0
+.LVL827:
+	.loc 2 656 0
 	ldr	r2, [r4, #28]
 	str	r2, [r3, #4]
-	.loc 2 608 0
+	.loc 2 657 0
 	movw	r2, #64245
 	strh	r2, [r3, #8]	@ movhi
-	.loc 2 609 0
+	.loc 2 658 0
 	ldrh	r2, [r4, #4]
-	.loc 2 610 0
+	.loc 2 659 0
 	strh	r5, [r3, #2]	@ movhi
-	.loc 2 609 0
+	.loc 2 658 0
 	strh	r2, [r3]	@ movhi
-	.loc 2 612 0
-	ldr	r3, .L698+20
-.LVL820:
+	.loc 2 661 0
+	ldr	r3, .L704+20
+.LVL828:
 	ldrh	r2, [r3]
 	lsls	r2, r2, #3
 	bl	ftl_memset
-.LVL821:
-	.loc 2 614 0
+.LVL829:
+	.loc 2 663 0
 	ldrh	ip, [r4, #6]
 	movs	r3, #0
-	.loc 2 617 0
+	.loc 2 666 0
 	ldr	r1, [r7]
-	.loc 2 613 0
+	.loc 2 662 0
 	mov	r2, r3
-.LVL822:
-.L692:
-	.loc 2 614 0 discriminator 1
+.LVL830:
+.L698:
+	.loc 2 663 0 discriminator 1
 	uxth	r0, r3
 	cmp	ip, r0
-	bhi	.L694
-	.loc 2 621 0
+	bhi	.L700
+	.loc 2 670 0
 	movs	r2, #1
-.LVL823:
+.LVL831:
 	movs	r3, #0
-.LVL824:
+.LVL832:
 	mov	r1, r2
-	ldr	r0, .L698+8
-.LVL825:
+	ldr	r0, .L704+8
+.LVL833:
 	bl	FlashProgPages
-.LVL826:
-	.loc 2 622 0
+.LVL834:
+	.loc 2 671 0
 	ldrh	r3, [r4, #2]
-	.loc 2 626 0
+	.loc 2 675 0
 	mov	r0, r4
-	.loc 2 622 0
+	.loc 2 671 0
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
-	.loc 2 626 0
+	.loc 2 675 0
 	bl	ftl_map_blk_gc
-.LVL827:
-	.loc 2 627 0
-	b	.L691
-.LVL828:
-.L694:
-	.loc 2 615 0
+.LVL835:
+	.loc 2 676 0
+	b	.L697
+.LVL836:
+.L700:
+	.loc 2 664 0
 	ldr	r0, [r6, r3, lsl #2]
 	cmp	r5, r0, lsr #10
-	bne	.L693
-	.loc 2 616 0
+	bne	.L699
+	.loc 2 665 0
 	adds	r2, r2, #1
-.LVL829:
+.LVL837:
 	uxth	r2, r2
-.LVL830:
-	.loc 2 617 0
+.LVL838:
+	.loc 2 666 0
 	str	r3, [r1, r2, lsl #3]
-	.loc 2 618 0
+	.loc 2 667 0
 	add	r7, r1, r2, lsl #3
 	ldr	r0, [r6, r3, lsl #2]
 	str	r0, [r7, #4]
-.L693:
-.LVL831:
-	adds	r3, r3, #1
-.LVL832:
-	b	.L692
 .L699:
+.LVL839:
+	adds	r3, r3, #1
+.LVL840:
+	b	.L698
+.L705:
 	.align	2
-.L698:
+.L704:
 	.word	.LANCHOR141
 	.word	.LC1
+	.word	.LANCHOR106
+	.word	.LANCHOR107
 	.word	.LANCHOR108
-	.word	.LANCHOR39
-	.word	.LANCHOR109
 	.word	.LANCHOR20
 	.cfi_endproc
 .LFE260:
@@ -8592,11 +8715,11 @@ Ftl_write_map_blk_to_last_page:
 	.type	FtlMapWritePage, %function
 FtlMapWritePage:
 .LFB261:
-	.loc 2 631 0
+	.loc 2 680 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL833:
+.LVL841:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 40
 	.cfi_offset 4, -32
@@ -8607,199 +8730,199 @@ FtlMapWritePage:
 	.cfi_offset 10, -12
 	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	.loc 2 631 0
+	.loc 2 680 0
 	mov	r4, r0
-	.loc 2 638 0
-	ldr	r8, .L719+28
-	.loc 2 631 0
+	.loc 2 687 0
+	ldr	r8, .L725+28
+	.loc 2 680 0
 	mov	r7, r1
-	.loc 2 634 0
+	.loc 2 683 0
 	movs	r6, #0
-	.loc 2 631 0
+	.loc 2 680 0
 	str	r2, [sp, #4]
 	mov	fp, r8
-.LVL834:
-.L701:
-	.loc 2 637 0
-	ldr	r2, .L719
+.LVL842:
+.L707:
+	.loc 2 686 0
+	ldr	r2, .L725
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
-	.loc 2 638 0
+	.loc 2 687 0
 	ldrh	r3, [r8]
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	bge	.L702
-	.loc 2 638 0 is_stmt 0 discriminator 1
+	bge	.L708
+	.loc 2 687 0 is_stmt 0 discriminator 1
 	ldrh	r2, [r4]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L703
-.L702:
-	.loc 2 639 0 is_stmt 1
+	bne	.L709
+.L708:
+	.loc 2 688 0 is_stmt 1
 	mov	r0, r4
 	bl	Ftl_write_map_blk_to_last_page
-.LVL835:
-.L703:
-	.loc 2 650 0
+.LVL843:
+.L709:
+	.loc 2 699 0
 	ldrh	r2, [r4]
 	ldr	r3, [r4, #12]
 	ldrh	r3, [r3, r2, lsl #1]
-	cbnz	r3, .L704
-	.loc 2 650 0 is_stmt 0 discriminator 1
-	movw	r2, #650
-	ldr	r1, .L719+4
-	ldr	r0, .L719+8
+	cbnz	r3, .L710
+	.loc 2 699 0 is_stmt 0 discriminator 1
+	movw	r2, #699
+	ldr	r1, .L725+4
+	ldr	r0, .L725+8
 	bl	printf
-.LVL836:
-.L704:
-	.loc 2 651 0 is_stmt 1
+.LVL844:
+.L710:
+	.loc 2 700 0 is_stmt 1
 	ldrh	r2, [r4]
 	ldrh	r3, [r4, #10]
 	cmp	r2, r3
-	bcc	.L705
-	.loc 2 651 0 is_stmt 0 discriminator 1
-	movw	r2, #651
-	ldr	r1, .L719+4
-	ldr	r0, .L719+8
+	bcc	.L711
+	.loc 2 700 0 is_stmt 0 discriminator 1
+	mov	r2, #700
+	ldr	r1, .L725+4
+	ldr	r0, .L725+8
 	bl	printf
-.LVL837:
-.L705:
-	.loc 2 652 0 is_stmt 1
+.LVL845:
+.L711:
+	.loc 2 701 0 is_stmt 1
 	ldrh	r2, [r4]
-	.loc 2 658 0
+	.loc 2 707 0
 	movs	r1, #0
-	.loc 2 652 0
+	.loc 2 701 0
 	ldr	r3, [r4, #12]
-	.loc 2 654 0
-	ldr	r5, .L719+12
-	.loc 2 652 0
+	.loc 2 703 0
+	ldr	r5, .L725+12
+	.loc 2 701 0
 	ldrh	r10, [r3, r2, lsl #1]
-.LVL838:
-	.loc 2 654 0
+.LVL846:
+	.loc 2 703 0
 	ldrh	r2, [r4, #2]
-	.loc 2 655 0
+	.loc 2 704 0
 	ldr	r3, [sp, #4]
-	.loc 2 654 0
+	.loc 2 703 0
 	orr	r2, r2, r10, lsl #10
-	.loc 2 655 0
+	.loc 2 704 0
 	str	r3, [r5, #8]
-	.loc 2 654 0
+	.loc 2 703 0
 	str	r2, [r5, #4]
-	.loc 2 656 0
-	ldr	r2, .L719+16
+	.loc 2 705 0
+	ldr	r2, .L725+16
 	ldr	r0, [r2]
-	.loc 2 658 0
+	.loc 2 707 0
 	movs	r2, #16
-	.loc 2 656 0
+	.loc 2 705 0
 	str	r0, [r5, #12]
-	.loc 2 658 0
+	.loc 2 707 0
 	bl	ftl_memset
-.LVL839:
-	.loc 2 659 0
+.LVL847:
+	.loc 2 708 0
 	ldr	r2, [r5, #12]
-.LVL840:
-	.loc 2 664 0
+.LVL848:
+	.loc 2 713 0
 	movs	r3, #1
-	.loc 2 660 0
+	.loc 2 709 0
 	ldr	r1, [r4, #28]
-	.loc 2 664 0
+	.loc 2 713 0
 	mov	r0, r5
-	.loc 2 661 0
+	.loc 2 710 0
 	strh	r7, [r2, #8]	@ movhi
-	.loc 2 660 0
+	.loc 2 709 0
 	str	r1, [r2, #4]
-	.loc 2 662 0
+	.loc 2 711 0
 	ldrh	r1, [r4, #4]
-	.loc 2 663 0
+	.loc 2 712 0
 	strh	r10, [r2, #2]	@ movhi
-	.loc 2 662 0
+	.loc 2 711 0
 	strh	r1, [r2]	@ movhi
-	.loc 2 664 0
+	.loc 2 713 0
 	mov	r2, r3
-.LVL841:
+.LVL849:
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL842:
-	.loc 2 665 0
+.LVL850:
+	.loc 2 714 0
 	ldrh	r2, [r4, #2]
-	.loc 2 667 0
+	.loc 2 716 0
 	ldr	r3, [r5]
-	.loc 2 665 0
+	.loc 2 714 0
 	adds	r2, r2, #1
 	uxth	r2, r2
-	.loc 2 667 0
+	.loc 2 716 0
 	adds	r3, r3, #1
-	.loc 2 665 0
+	.loc 2 714 0
 	strh	r2, [r4, #2]	@ movhi
-	.loc 2 667 0
-	bne	.L706
-	.loc 2 668 0
+	.loc 2 716 0
+	bne	.L712
+	.loc 2 717 0
 	ldr	r1, [r5, #4]
-	.loc 2 669 0
+	.loc 2 718 0
 	adds	r6, r6, #1
-.LVL843:
-	.loc 2 668 0
-	ldr	r0, .L719+20
-	.loc 2 669 0
+.LVL851:
+	.loc 2 717 0
+	ldr	r0, .L725+20
+	.loc 2 718 0
 	uxth	r6, r6
-	.loc 2 668 0
+	.loc 2 717 0
 	bl	printf
-.LVL844:
-	.loc 2 670 0
+.LVL852:
+	.loc 2 719 0
 	ldrh	r2, [r4, #2]
 	cmp	r2, #2
-	.loc 2 671 0
+	.loc 2 720 0
 	ittt	ls
 	ldrhls	r2, [fp]
 	addls	r2, r2, #-1
 	strhls	r2, [r4, #2]	@ movhi
-	.loc 2 673 0
+	.loc 2 722 0
 	cmp	r6, #3
-	bls	.L708
-	.loc 2 674 0
+	bls	.L714
+	.loc 2 723 0
 	mov	r2, r6
 	ldr	r1, [r5, #4]
-	ldr	r0, .L719+24
+	ldr	r0, .L725+24
 	bl	printf
-.LVL845:
-.L709:
-	b	.L709
-.L708:
-	.loc 2 678 0
+.LVL853:
+.L715:
+	b	.L715
+.L714:
+	.loc 2 727 0
 	ldr	r3, [r4, #32]
 	cmp	r3, #0
-	beq	.L701
-.L718:
-	b	.L718
-.L706:
-	.loc 2 682 0
+	beq	.L707
+.L724:
+	b	.L724
+.L712:
+	.loc 2 731 0
 	cmp	r2, #1
-	beq	.L701
-	.loc 2 685 0
+	beq	.L707
+	.loc 2 734 0
 	ldr	r2, [r5, #4]
-	.loc 2 687 0
+	.loc 2 736 0
 	movs	r0, #0
-	.loc 2 685 0
+	.loc 2 734 0
 	ldr	r3, [r4, #24]
 	str	r2, [r3, r7, lsl #2]
-	.loc 2 687 0
+	.loc 2 736 0
 	add	sp, sp, #8
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL846:
-.L720:
+.LVL854:
+.L726:
 	.align	2
-.L719:
-	.word	.LANCHOR67
+.L725:
+	.word	.LANCHOR66
 	.word	.LANCHOR142
 	.word	.LC1
+	.word	.LANCHOR106
 	.word	.LANCHOR108
-	.word	.LANCHOR109
-	.word	.LC86
-	.word	.LC87
+	.word	.LC89
+	.word	.LC90
 	.word	.LANCHOR20
 	.cfi_endproc
 .LFE261:
@@ -8814,14 +8937,14 @@ FtlMapWritePage:
 	.type	ftl_map_blk_gc, %function
 ftl_map_blk_gc:
 .LFB259:
-	.loc 2 537 0
+	.loc 2 586 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL847:
-	.loc 2 542 0
+.LVL855:
+	.loc 2 591 0
 	ldr	r3, [r0, #24]
-	.loc 2 537 0
+	.loc 2 586 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 40
 	.cfi_offset 4, -32
@@ -8832,167 +8955,167 @@ ftl_map_blk_gc:
 	.cfi_offset 10, -12
 	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	.loc 2 537 0
+	.loc 2 586 0
 	mov	r4, r0
-	.loc 2 541 0
+	.loc 2 590 0
 	ldr	r5, [r0, #12]
-.LVL848:
-	.loc 2 542 0
+.LVL856:
+	.loc 2 591 0
 	str	r3, [sp]
-.LVL849:
-	.loc 2 545 0
+.LVL857:
+	.loc 2 594 0
 	bl	ftl_free_no_use_map_blk
-.LVL850:
-	.loc 2 547 0
+.LVL858:
+	.loc 2 596 0
 	ldrh	r3, [r4, #10]
 	ldrh	r2, [r4, #8]
 	subs	r3, r3, #4
 	cmp	r2, r3
-	blt	.L722
-	.loc 2 548 0
+	blt	.L728
+	.loc 2 597 0
 	uxth	r0, r0
 	ldrh	r7, [r5, r0, lsl #1]
-.LVL851:
-	.loc 2 549 0
-	cbz	r7, .L722
-	.loc 2 549 0 is_stmt 0 discriminator 1
+.LVL859:
+	.loc 2 598 0
+	cbz	r7, .L728
+	.loc 2 598 0 is_stmt 0 discriminator 1
 	ldr	r3, [r4, #32]
-	cbnz	r3, .L722
-	.loc 2 550 0 is_stmt 1
+	cbnz	r3, .L728
+	.loc 2 599 0 is_stmt 1
 	movs	r2, #1
 	str	r2, [r4, #32]
-	.loc 2 551 0
+	.loc 2 600 0
 	strh	r3, [r5, r0, lsl #1]	@ movhi
-	.loc 2 552 0
+	.loc 2 601 0
 	ldrh	r3, [r4, #8]
-	.loc 2 553 0
+	.loc 2 602 0
 	ldrh	r2, [r4, #2]
-	.loc 2 552 0
+	.loc 2 601 0
 	subs	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	.loc 2 553 0
-	ldr	r3, .L733
+	.loc 2 602 0
+	ldr	r3, .L739
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L723
-	.loc 2 554 0
+	bcc	.L729
+	.loc 2 603 0
 	mov	r0, r4
-.LVL852:
+.LVL860:
 	bl	ftl_map_blk_alloc_new_blk
-.LVL853:
-.L723:
-	.loc 2 558 0 discriminator 1
-	ldr	r5, .L733+4
-.LVL854:
-	.loc 2 537 0 discriminator 1
+.LVL861:
+.L729:
+	.loc 2 607 0 discriminator 1
+	ldr	r5, .L739+4
+.LVL862:
+	.loc 2 586 0 discriminator 1
 	movs	r6, #0
-	.loc 2 558 0 discriminator 1
-	ldr	fp, .L733+20
-.L724:
-	.loc 2 556 0 discriminator 1
+	.loc 2 607 0 discriminator 1
+	ldr	fp, .L739+20
+.L730:
+	.loc 2 605 0 discriminator 1
 	ldrh	r3, [r4, #6]
 	uxth	r10, r6
-.LVL855:
+.LVL863:
 	cmp	r3, r10
-	bhi	.L728
-	.loc 2 572 0
+	bhi	.L734
+	.loc 2 621 0
 	movs	r1, #1
 	mov	r0, r7
 	bl	FtlFreeSysBlkQueueIn
-.LVL856:
-	.loc 2 573 0
+.LVL864:
+	.loc 2 622 0
 	movs	r3, #0
 	str	r3, [r4, #32]
-.LVL857:
-.L722:
-	.loc 2 577 0
-	ldr	r3, .L733
+.LVL865:
+.L728:
+	.loc 2 626 0
+	ldr	r3, .L739
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L729
-	.loc 2 578 0
+	bcc	.L735
+	.loc 2 627 0
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.LVL858:
-.L729:
-	.loc 2 580 0
+.LVL866:
+.L735:
+	.loc 2 629 0
 	movs	r0, #0
 	add	sp, sp, #8
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
-.LVL859:
+.LVL867:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL860:
-.L728:
+.LVL868:
+.L734:
 	.cfi_restore_state
-	.loc 2 557 0
+	.loc 2 606 0
 	ldr	r3, [sp]
 	uxth	r8, r6
 	ldr	r2, [r3, r8, lsl #2]
 	cmp	r7, r2, lsr #10
-	bne	.L725
-	.loc 2 558 0
+	bne	.L731
+	.loc 2 607 0
 	ldr	r3, [fp]
-	.loc 2 560 0
+	.loc 2 609 0
 	str	r2, [r5, #4]
-.LVL861:
-	.loc 2 562 0
+.LVL869:
+	.loc 2 611 0
 	movs	r2, #1
 	mov	r1, r2
-	ldr	r0, .L733+4
-	.loc 2 558 0
+	ldr	r0, .L739+4
+	.loc 2 607 0
 	str	r3, [r5, #8]
-	.loc 2 559 0
-	ldr	r3, .L733+8
+	.loc 2 608 0
+	ldr	r3, .L739+8
 	ldr	r3, [r3]
 	str	r3, [r5, #12]
 	str	r3, [sp, #4]
-.LVL862:
-	.loc 2 562 0
+.LVL870:
+	.loc 2 611 0
 	bl	FlashReadPages
-.LVL863:
-	.loc 2 564 0
+.LVL871:
+	.loc 2 613 0
 	ldr	r3, [sp, #4]
 	ldrh	r3, [r3, #8]
 	cmp	r3, r10
-	beq	.L726
-	.loc 2 564 0 is_stmt 0 discriminator 1
-	mov	r2, #564
-	ldr	r1, .L733+12
-	ldr	r0, .L733+16
+	beq	.L732
+	.loc 2 613 0 is_stmt 0 discriminator 1
+	movw	r2, #613
+	ldr	r1, .L739+12
+	ldr	r0, .L739+16
 	bl	printf
-.LVL864:
-.L726:
-	.loc 2 565 0 is_stmt 1
+.LVL872:
+.L732:
+	.loc 2 614 0 is_stmt 1
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	bne	.L727
-	.loc 2 566 0
+	bne	.L733
+	.loc 2 615 0
 	ldr	r2, [sp]
 	movs	r3, #0
 	str	r3, [r2, r8, lsl #2]
-.L725:
-.LVL865:
+.L731:
+.LVL873:
 	adds	r6, r6, #1
-.LVL866:
-	b	.L724
-.LVL867:
-.L727:
-	.loc 2 568 0
+.LVL874:
+	b	.L730
+.LVL875:
+.L733:
+	.loc 2 617 0
 	ldr	r2, [r5, #8]
 	mov	r1, r8
 	mov	r0, r4
 	bl	FtlMapWritePage
-.LVL868:
-	b	.L725
-.L734:
+.LVL876:
+	b	.L731
+.L740:
 	.align	2
-.L733:
+.L739:
 	.word	.LANCHOR20
+	.word	.LANCHOR106
 	.word	.LANCHOR108
-	.word	.LANCHOR109
 	.word	.LANCHOR143
 	.word	.LC1
 	.word	.LANCHOR123
@@ -9009,49 +9132,49 @@ ftl_map_blk_gc:
 	.type	flush_l2p_region, %function
 flush_l2p_region:
 .LFB262:
-	.loc 2 690 0
+	.loc 2 739 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL869:
+.LVL877:
 	push	{r3, r4, r5, lr}
 	.cfi_def_cfa_offset 16
 	.cfi_offset 3, -16
 	.cfi_offset 4, -12
 	.cfi_offset 5, -8
 	.cfi_offset 14, -4
-	.loc 2 693 0
+	.loc 2 742 0
 	movs	r4, #12
-	ldr	r5, .L736
+	ldr	r5, .L742
 	muls	r4, r0, r4
-	.loc 2 694 0
-	ldr	r0, .L736+4
-.LVL870:
-	.loc 2 693 0
+	.loc 2 743 0
+	ldr	r0, .L742+4
+.LVL878:
+	.loc 2 742 0
 	ldr	r3, [r5]
 	adds	r2, r3, r4
-.LVL871:
-	.loc 2 694 0
+.LVL879:
+	.loc 2 743 0
 	ldrh	r1, [r3, r4]
-.LVL872:
+.LVL880:
 	ldr	r2, [r2, #8]
 	bl	FtlMapWritePage
-.LVL873:
-	.loc 2 695 0
+.LVL881:
+	.loc 2 744 0
 	ldr	r3, [r5]
-	.loc 2 697 0
+	.loc 2 746 0
 	movs	r0, #0
-	.loc 2 695 0
+	.loc 2 744 0
 	add	r4, r4, r3
 	ldr	r3, [r4, #4]
 	bic	r3, r3, #-2147483648
 	str	r3, [r4, #4]
-	.loc 2 697 0
+	.loc 2 746 0
 	pop	{r3, r4, r5, pc}
-.L737:
+.L743:
 	.align	2
-.L736:
-	.word	.LANCHOR56
+.L742:
+	.word	.LANCHOR55
 	.word	.LANCHOR144
 	.cfi_endproc
 .LFE262:
@@ -9066,14 +9189,14 @@ flush_l2p_region:
 	.type	log2phys, %function
 log2phys:
 .LFB265:
-	.loc 2 753 0
+	.loc 2 802 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL874:
-	.loc 2 756 0
-	ldr	r3, .L752
-	.loc 2 753 0
+.LVL882:
+	.loc 2 805 0
+	ldr	r3, .L758
+	.loc 2 802 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
 	.cfi_offset 4, -32
@@ -9084,153 +9207,153 @@ log2phys:
 	.cfi_offset 10, -12
 	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	.loc 2 753 0
+	.loc 2 802 0
 	mov	r7, r1
 	mov	r10, r2
-	.loc 2 756 0
+	.loc 2 805 0
 	ldrh	r4, [r3]
 	adds	r3, r4, #7
-	.loc 2 757 0
+	.loc 2 806 0
 	movs	r4, #1
-	.loc 2 756 0
+	.loc 2 805 0
 	lsr	r8, r0, r3
-	.loc 2 757 0
+	.loc 2 806 0
 	lsls	r4, r4, r3
-	.loc 2 759 0
-	ldr	r3, .L752+4
-	.loc 2 757 0
+	.loc 2 808 0
+	ldr	r3, .L758+4
+	.loc 2 806 0
 	subs	r4, r4, #1
-	.loc 2 756 0
+	.loc 2 805 0
 	uxth	r8, r8
-.LVL875:
-	.loc 2 757 0
+.LVL883:
+	.loc 2 806 0
 	ands	r4, r4, r0
-	.loc 2 759 0
+	.loc 2 808 0
 	ldr	r3, [r3]
-	.loc 2 757 0
+	.loc 2 806 0
 	uxth	r4, r4
-.LVL876:
-	.loc 2 759 0
+.LVL884:
+	.loc 2 808 0
 	cmp	r0, r3
-	bcc	.L739
-	.loc 2 759 0 is_stmt 0 discriminator 1
-	movw	r2, #759
-.LVL877:
-	ldr	r1, .L752+8
-.LVL878:
-	ldr	r0, .L752+12
-.LVL879:
+	bcc	.L745
+	.loc 2 808 0 is_stmt 0 discriminator 1
+	mov	r2, #808
+.LVL885:
+	ldr	r1, .L758+8
+.LVL886:
+	ldr	r0, .L758+12
+.LVL887:
 	bl	printf
-.LVL880:
-.L739:
-	.loc 2 762 0 is_stmt 1
-	ldr	r6, .L752+16
+.LVL888:
+.L745:
+	.loc 2 811 0 is_stmt 1
+	ldr	r6, .L758+16
 	mov	fp, #12
-	.loc 2 761 0
-	ldr	r3, .L752+20
-	.loc 2 762 0
+	.loc 2 810 0
+	ldr	r3, .L758+20
+	.loc 2 811 0
 	ldr	r1, [r6]
-	.loc 2 761 0
+	.loc 2 810 0
 	ldrh	r2, [r3]
 	movs	r3, #0
-.LVL881:
-.L740:
+.LVL889:
+.L746:
 	uxth	r5, r3
-.LVL882:
-	.loc 2 761 0 is_stmt 0 discriminator 1
+.LVL890:
+	.loc 2 810 0 is_stmt 0 discriminator 1
 	cmp	r5, r2
-	bcc	.L745
-	.loc 2 776 0 is_stmt 1
+	bcc	.L751
+	.loc 2 825 0 is_stmt 1
 	bl	select_l2p_ram_region
-.LVL883:
-	.loc 2 777 0
+.LVL891:
+	.loc 2 826 0
 	mul	fp, fp, r0
 	ldr	r3, [r6]
-	.loc 2 776 0
+	.loc 2 825 0
 	mov	r5, r0
-.LVL884:
-	.loc 2 777 0
+.LVL892:
+	.loc 2 826 0
 	ldrh	r1, [r3, fp]
 	add	r2, r3, fp
 	movw	r3, #65535
 	cmp	r1, r3
-	beq	.L746
-	.loc 2 777 0 is_stmt 0 discriminator 1
+	beq	.L752
+	.loc 2 826 0 is_stmt 0 discriminator 1
 	ldr	r3, [r2, #4]
 	cmp	r3, #0
-	bge	.L746
-	.loc 2 778 0 is_stmt 1
+	bge	.L752
+	.loc 2 827 0 is_stmt 1
 	bl	flush_l2p_region
-.LVL885:
-.L746:
-	.loc 2 781 0
+.LVL893:
+.L752:
+	.loc 2 830 0
 	mov	r1, r5
 	mov	r0, r8
 	bl	load_l2p_region
-.LVL886:
-	.loc 2 782 0
-	b	.L741
-.LVL887:
-.L745:
+.LVL894:
+	.loc 2 831 0
+	b	.L747
+.LVL895:
+.L751:
 	adds	r3, r3, #1
-	.loc 2 762 0
+	.loc 2 811 0
 	mla	r0, fp, r3, r1
 	ldrh	r0, [r0, #-12]
 	cmp	r0, r8
-	bne	.L740
-.LVL888:
-.L741:
-	.loc 2 765 0
+	bne	.L746
+.LVL896:
+.L747:
+	.loc 2 814 0
 	ldr	r2, [r6]
 	movs	r3, #12
 	mla	r3, r3, r5, r2
-	.loc 2 764 0
+	.loc 2 813 0
 	cmp	r10, #0
-	bne	.L742
-	.loc 2 765 0
+	bne	.L748
+	.loc 2 814 0
 	ldr	r3, [r3, #8]
 	ldr	r3, [r3, r4, lsl #2]
 	str	r3, [r7]
-.L743:
-	.loc 2 771 0
+.L749:
+	.loc 2 820 0
 	ldr	r2, [r6]
 	movs	r3, #12
 	mla	r5, r3, r5, r2
-.LVL889:
+.LVL897:
 	ldr	r3, [r5, #4]
 	adds	r2, r3, #1
-	beq	.L749
-	.loc 2 772 0
+	beq	.L755
+	.loc 2 821 0
 	adds	r3, r3, #1
 	str	r3, [r5, #4]
-.L749:
-	.loc 2 783 0
+.L755:
+	.loc 2 832 0
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL890:
-.L742:
-	.loc 2 767 0
+.LVL898:
+.L748:
+	.loc 2 816 0
 	ldr	r1, [r7]
 	ldr	r2, [r3, #8]
 	str	r1, [r2, r4, lsl #2]
-	.loc 2 768 0
+	.loc 2 817 0
 	ldr	r2, [r3, #4]
 	orr	r2, r2, #-2147483648
 	str	r2, [r3, #4]
-	.loc 2 769 0
-	ldr	r3, .L752+24
+	.loc 2 818 0
+	ldr	r3, .L758+24
 	strh	r8, [r3]	@ movhi
-	b	.L743
-.L753:
+	b	.L749
+.L759:
 	.align	2
-.L752:
+.L758:
 	.word	.LANCHOR22
-	.word	.LANCHOR62
+	.word	.LANCHOR61
 	.word	.LANCHOR145
 	.word	.LC1
-	.word	.LANCHOR56
+	.word	.LANCHOR55
 	.word	.LANCHOR33
-	.word	.LANCHOR57
+	.word	.LANCHOR56
 	.cfi_endproc
 .LFE265:
 	.size	log2phys, .-log2phys
@@ -9244,11 +9367,11 @@ log2phys:
 	.type	FtlReUsePrevPpa, %function
 FtlReUsePrevPpa:
 .LFB283:
-	.loc 2 1628 0
+	.loc 2 1677 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL891:
+.LVL899:
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	.cfi_def_cfa_offset 32
 	.cfi_offset 4, -24
@@ -9257,131 +9380,131 @@ FtlReUsePrevPpa:
 	.cfi_offset 7, -12
 	.cfi_offset 8, -8
 	.cfi_offset 14, -4
-	.loc 2 1628 0
+	.loc 2 1677 0
 	mov	r6, r0
-	.loc 2 1631 0
-	ldr	r5, .L764
-	.loc 2 1629 0
+	.loc 2 1680 0
+	ldr	r5, .L770
+	.loc 2 1678 0
 	ubfx	r0, r1, #10, #16
-.LVL892:
-	.loc 2 1628 0
+.LVL900:
+	.loc 2 1677 0
 	str	r1, [sp, #4]
-	.loc 2 1629 0
+	.loc 2 1678 0
 	bl	P2V_block_in_plane
-.LVL893:
-	.loc 2 1631 0
+.LVL901:
+	.loc 2 1680 0
 	ldr	r2, [r5]
-	.loc 2 1629 0
+	.loc 2 1678 0
 	mov	r7, r0
-.LVL894:
-	.loc 2 1631 0
+.LVL902:
+	.loc 2 1680 0
 	ldrh	r3, [r2, r0, lsl #1]
-	cbnz	r3, .L755
-	.loc 2 1632 0
-	ldr	r2, .L764+4
+	cbnz	r3, .L761
+	.loc 2 1681 0
+	ldr	r2, .L770+4
 	ldr	r4, [r2]
 	cmp	r4, #0
-	beq	.L756
-.LBB229:
-	.loc 2 1636 0
-	ldr	r2, .L764+8
-	.loc 2 1644 0
+	beq	.L762
+.LBB262:
+	.loc 2 1685 0
+	ldr	r2, .L770+8
+	.loc 2 1693 0
 	movw	lr, #65535
-	.loc 2 1636 0
-	ldr	ip, .L764+24
-	.loc 2 1635 0
-	ldr	r0, .L764+12
-.LVL895:
-	.loc 2 1636 0
+	.loc 2 1685 0
+	ldr	ip, .L770+24
+	.loc 2 1684 0
+	ldr	r0, .L770+12
+.LVL903:
+	.loc 2 1685 0
 	ldr	r2, [r2]
-	.loc 2 1635 0
+	.loc 2 1684 0
 	ldrh	r1, [r0]
-.LVL896:
+.LVL904:
 	mov	r8, r0
-	.loc 2 1636 0
+	.loc 2 1685 0
 	subs	r4, r4, r2
 	asrs	r4, r4, #1
 	mul	r4, ip, r4
-	.loc 2 1644 0
+	.loc 2 1693 0
 	mov	ip, #6
-	.loc 2 1636 0
+	.loc 2 1685 0
 	uxth	r4, r4
-.LVL897:
-.L757:
-	.loc 2 1637 0 discriminator 1
+.LVL905:
+.L763:
+	.loc 2 1686 0 discriminator 1
 	uxth	r0, r3
 	cmp	r1, r0
-	bls	.L756
-	.loc 2 1638 0
+	bls	.L762
+	.loc 2 1687 0
 	cmp	r4, r7
-	bne	.L758
-	.loc 2 1639 0
+	bne	.L764
+	.loc 2 1688 0
 	mov	r1, r4
-.LVL898:
-	ldr	r0, .L764+4
+.LVL906:
+	ldr	r0, .L770+4
 	bl	List_remove_node
-.LVL899:
+.LVL907:
 	ldrh	r3, [r8]
-	cbnz	r3, .L759
-	.loc 2 1639 0 is_stmt 0 discriminator 1
-	movw	r2, #1639
-	ldr	r1, .L764+16
-	ldr	r0, .L764+20
+	cbnz	r3, .L765
+	.loc 2 1688 0 is_stmt 0 discriminator 1
+	mov	r2, #1688
+	ldr	r1, .L770+16
+	ldr	r0, .L770+20
 	bl	printf
-.LVL900:
-.L759:
-	.loc 2 1639 0 discriminator 3
+.LVL908:
+.L765:
+	.loc 2 1688 0 discriminator 3
 	ldrh	r3, [r8]
-	.loc 2 1640 0 is_stmt 1 discriminator 3
+	.loc 2 1689 0 is_stmt 1 discriminator 3
 	mov	r0, r4
-	.loc 2 1639 0 discriminator 3
+	.loc 2 1688 0 discriminator 3
 	subs	r3, r3, #1
 	strh	r3, [r8]	@ movhi
-	.loc 2 1640 0 discriminator 3
+	.loc 2 1689 0 discriminator 3
 	bl	INSERT_DATA_LIST
-.LVL901:
-	.loc 2 1641 0 discriminator 3
+.LVL909:
+	.loc 2 1690 0 discriminator 3
 	ldr	r2, [r5]
 	ldrh	r3, [r2, r7, lsl #1]
-.LVL902:
-.L755:
-.LBE229:
-	.loc 2 1650 0
+.LVL910:
+.L761:
+.LBE262:
+	.loc 2 1699 0
 	adds	r3, r3, #1
 	strh	r3, [r2, r7, lsl #1]	@ movhi
-	b	.L756
-.LVL903:
-.L758:
-.LBB230:
-	.loc 2 1644 0
+	b	.L762
+.LVL911:
+.L764:
+.LBB263:
+	.loc 2 1693 0
 	mul	r4, ip, r4
-.LVL904:
+.LVL912:
 	adds	r3, r3, #1
-.LVL905:
+.LVL913:
 	ldrh	r4, [r2, r4]
 	cmp	r4, lr
-	bne	.L757
-.LVL906:
-.L756:
-.LBE230:
-	.loc 2 1652 0
+	bne	.L763
+.LVL914:
+.L762:
+.LBE263:
+	.loc 2 1701 0
 	movs	r2, #1
 	add	r1, sp, #4
 	mov	r0, r6
 	bl	log2phys
-.LVL907:
-	.loc 2 1653 0
+.LVL915:
+	.loc 2 1702 0
 	add	sp, sp, #8
 	.cfi_def_cfa_offset 24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL908:
-.L765:
+.LVL916:
+.L771:
 	.align	2
-.L764:
-	.word	.LANCHOR43
+.L770:
+	.word	.LANCHOR42
 	.word	.LANCHOR47
-	.word	.LANCHOR41
+	.word	.LANCHOR40
 	.word	.LANCHOR48
 	.word	.LANCHOR146
 	.word	.LC1
@@ -9399,7 +9522,7 @@ FtlReUsePrevPpa:
 	.type	ftl_scan_all_data, %function
 ftl_scan_all_data:
 .LFB294:
-	.loc 2 2275 0
+	.loc 2 2325 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
@@ -9411,97 +9534,97 @@ ftl_scan_all_data:
 	.cfi_offset 7, -12
 	.cfi_offset 8, -8
 	.cfi_offset 14, -4
-	.loc 2 2281 0
+	.loc 2 2331 0
 	movs	r5, #0
-	ldr	r7, .L780
-	.loc 2 2275 0
+	ldr	r7, .L786
+	.loc 2 2325 0
 	sub	sp, sp, #32
 	.cfi_def_cfa_offset 56
-	.loc 2 2280 0
+	.loc 2 2330 0
 	movs	r1, #0
-	.loc 2 2284 0
-	ldr	r8, .L780+24
-	.loc 2 2280 0
-	ldr	r0, .L780+4
+	.loc 2 2334 0
+	ldr	r8, .L786+24
+	.loc 2 2330 0
+	ldr	r0, .L786+4
 	bl	printf
-.LVL909:
-.L767:
-	.loc 2 2281 0 discriminator 1
+.LVL917:
+.L773:
+	.loc 2 2331 0 discriminator 1
 	ldr	r3, [r7]
 	cmp	r5, r3
-	bcc	.L773
-	.loc 2 2303 0
+	bcc	.L779
+	.loc 2 2353 0
 	add	sp, sp, #32
 	.cfi_remember_state
 	.cfi_def_cfa_offset 24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL910:
-.L773:
+.LVL918:
+.L779:
 	.cfi_restore_state
-	.loc 2 2282 0
+	.loc 2 2332 0
 	movs	r2, #0
 	add	r1, sp, #28
 	mov	r0, r5
 	bl	log2phys
-.LVL911:
-	.loc 2 2283 0
+.LVL919:
+	.loc 2 2333 0
 	ubfx	r3, r5, #0, #11
-	cbnz	r3, .L768
-	.loc 2 2284 0
+	cbnz	r3, .L774
+	.loc 2 2334 0
 	ldr	r2, [sp, #28]
 	mov	r1, r5
 	mov	r0, r8
 	bl	printf
-.LVL912:
-.L768:
-	.loc 2 2285 0
+.LVL920:
+.L774:
+	.loc 2 2335 0
 	ldr	r3, [sp, #28]
 	adds	r2, r3, #1
-	beq	.L770
-	.loc 2 2286 0
-	ldr	r4, .L780+8
-	.loc 2 2290 0
+	beq	.L776
+	.loc 2 2336 0
+	ldr	r4, .L786+8
+	.loc 2 2340 0
 	movs	r2, #0
-	.loc 2 2292 0
+	.loc 2 2342 0
 	movs	r1, #1
-	.loc 2 2286 0
+	.loc 2 2336 0
 	str	r3, [r4, #4]
-	.loc 2 2292 0
+	.loc 2 2342 0
 	mov	r0, r4
-	.loc 2 2288 0
-	ldr	r3, .L780+12
-	.loc 2 2287 0
+	.loc 2 2338 0
+	ldr	r3, .L786+12
+	.loc 2 2337 0
 	str	r5, [r4, #16]
-	.loc 2 2290 0
+	.loc 2 2340 0
 	str	r2, [r4]
-	.loc 2 2288 0
+	.loc 2 2338 0
 	ldr	r3, [r3]
 	str	r3, [r4, #8]
-	.loc 2 2289 0
-	ldr	r3, .L780+16
+	.loc 2 2339 0
+	ldr	r3, .L786+16
 	ldr	r6, [r3]
-.LVL913:
+.LVL921:
 	str	r6, [r4, #12]
-	.loc 2 2292 0
+	.loc 2 2342 0
 	bl	FlashReadPages
-.LVL914:
-	.loc 2 2293 0
+.LVL922:
+	.loc 2 2343 0
 	ldr	r3, [r4]
 	cmp	r3, #256
-	beq	.L771
-	.loc 2 2293 0 is_stmt 0 discriminator 1
+	beq	.L777
+	.loc 2 2343 0 is_stmt 0 discriminator 1
 	adds	r3, r3, #1
-	beq	.L771
-	.loc 2 2294 0 is_stmt 1
+	beq	.L777
+	.loc 2 2344 0 is_stmt 1
 	ldr	r3, [r6, #8]
 	cmp	r5, r3
-	beq	.L770
-.L771:
-	.loc 2 2297 0
+	beq	.L776
+.L777:
+	.loc 2 2347 0
 	ldr	r2, [r4, #8]
 	ldr	r3, [r4, #12]
-	ldr	r0, .L780+20
+	ldr	r0, .L786+20
 	ldr	r1, [r2, #4]
 	str	r1, [sp, #16]
 	mov	r1, r5
@@ -9516,22 +9639,22 @@ ftl_scan_all_data:
 	ldr	r2, [r4, #4]
 	ldr	r3, [r3]
 	bl	printf
-.LVL915:
-.L770:
-	.loc 2 2281 0 discriminator 2
+.LVL923:
+.L776:
+	.loc 2 2331 0 discriminator 2
 	adds	r5, r5, #1
-.LVL916:
-	b	.L767
-.L781:
+.LVL924:
+	b	.L773
+.L787:
 	.align	2
-.L780:
-	.word	.LANCHOR62
-	.word	.LC88
+.L786:
+	.word	.LANCHOR61
+	.word	.LC91
+	.word	.LANCHOR106
+	.word	.LANCHOR107
 	.word	.LANCHOR108
-	.word	.LANCHOR39
-	.word	.LANCHOR109
-	.word	.LC90
-	.word	.LC89
+	.word	.LC93
+	.word	.LC92
 	.cfi_endproc
 .LFE294:
 	.size	ftl_scan_all_data, .-ftl_scan_all_data
@@ -9549,9 +9672,9 @@ FtlReadRefresh:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL917:
+.LVL925:
 	.loc 5 425 0
-	ldr	r3, .L795
+	ldr	r3, .L801
 	.loc 5 419 0
 	push	{r4, r5, r6, lr}
 	.cfi_def_cfa_offset 16
@@ -9565,28 +9688,28 @@ FtlReadRefresh:
 	.loc 5 425 0
 	ldr	r0, [r3, #80]
 	cmp	r0, #0
-	beq	.L783
+	beq	.L789
 	.loc 5 426 0
-	ldr	r6, .L795+4
+	ldr	r6, .L801+4
 	ldr	r0, [r3, #84]
 	ldr	r1, [r6]
 	cmp	r0, r1
-	bcs	.L784
+	bcs	.L790
 	mov	r5, #2048
-.L789:
-.LVL918:
-.LBB236:
-.LBB237:
+.L795:
+.LVL926:
+.LBB269:
+.LBB270:
 	.loc 5 428 0
 	ldr	r0, [r4, #84]
 	ldr	r3, [r6]
 	cmp	r0, r3
-	bcs	.L786
+	bcs	.L792
 	.loc 5 430 0
 	movs	r2, #0
 	mov	r1, sp
 	bl	log2phys
-.LVL919:
+.LVL927:
 	.loc 5 432 0
 	ldr	r2, [sp]
 	.loc 5 431 0
@@ -9597,14 +9720,14 @@ FtlReadRefresh:
 	add	r3, r3, #1
 	str	r3, [r4, #84]
 	.loc 5 432 0
-	beq	.L787
-.LBB238:
+	beq	.L793
+.LBB271:
 	.loc 5 435 0
 	str	r3, [sp, #20]
 	.loc 5 438 0
 	add	r0, sp, #88
 	.loc 5 436 0
-	ldr	r3, .L795+8
+	ldr	r3, .L801+8
 	.loc 5 439 0
 	movs	r1, #1
 	.loc 5 434 0
@@ -9619,46 +9742,46 @@ FtlReadRefresh:
 	str	r3, [sp, #16]
 	.loc 5 439 0
 	bl	FlashReadPages
-.LVL920:
+.LVL928:
 	.loc 5 440 0
 	ldr	r3, [sp, #4]
 	cmp	r3, #256
-	bne	.L786
+	bne	.L792
 	.loc 5 442 0
 	ldr	r0, [sp]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL921:
+.LVL929:
 	bl	FtlGcRefreshBlock
-.LVL922:
-.L786:
-.LBE238:
+.LVL930:
+.L792:
+.LBE271:
 	mov	r0, #-1
-.L782:
-.LBE237:
-.LBE236:
+.L788:
+.LBE270:
+.LBE269:
 	.loc 5 466 0
 	add	sp, sp, #88
 	.cfi_remember_state
 	.cfi_def_cfa_offset 16
 	@ sp needed
 	pop	{r4, r5, r6, pc}
-.LVL923:
-.L787:
+.LVL931:
+.L793:
 	.cfi_restore_state
-.LBB240:
-.LBB239:
+.LBB273:
+.LBB272:
 	.loc 5 427 0
 	subs	r5, r5, #1
-.LVL924:
-	bne	.L789
-	b	.L786
-.LVL925:
-.L784:
-.LBE239:
-.LBE240:
+.LVL932:
+	bne	.L795
+	b	.L792
+.LVL933:
+.L790:
+.LBE272:
+.LBE273:
 	.loc 5 451 0
-	ldr	r2, .L795+12
+	ldr	r2, .L801+12
 	.loc 5 449 0
 	movs	r0, #0
 	str	r0, [r3, #80]
@@ -9667,19 +9790,19 @@ FtlReadRefresh:
 	.loc 5 451 0
 	ldr	r2, [r2]
 	str	r2, [r3, #76]
-	b	.L782
-.L783:
-.LVL926:
-.LBB241:
+	b	.L788
+.L789:
+.LVL934:
+.LBB274:
 	.loc 5 456 0
 	ldr	r1, [r3, #76]
-	ldr	r3, .L795+12
+	ldr	r3, .L801+12
 	ldr	r5, [r3]
 	add	r3, r5, #1048576
 	cmp	r1, r3
-	bhi	.L792
+	bhi	.L798
 	.loc 5 454 0
-	ldr	r3, .L795+16
+	ldr	r3, .L801+16
 	ldr	r2, [r3]
 	mov	r3, #33554432
 	lsrs	r2, r2, #10
@@ -9687,13 +9810,13 @@ FtlReadRefresh:
 	.loc 5 457 0
 	add	r3, r3, r1
 	cmp	r5, r3
-	bhi	.L792
+	bhi	.L798
 	.loc 5 458 0
-	ldr	r3, .L795+20
+	ldr	r3, .L801+20
 	ldrb	r3, [r3, #28]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L782
-.L792:
+	bne	.L788
+.L798:
 	.loc 5 460 0
 	movs	r3, #1
 	.loc 5 461 0
@@ -9704,17 +9827,17 @@ FtlReadRefresh:
 	str	r0, [r4, #84]
 	.loc 5 462 0
 	str	r5, [r4, #76]
-	b	.L782
-.L796:
+	b	.L788
+.L802:
 	.align	2
-.L795:
-	.word	.LANCHOR83
-	.word	.LANCHOR62
+.L801:
+	.word	.LANCHOR81
+	.word	.LANCHOR61
 	.word	ftl_temp_buf
-	.word	.LANCHOR63
-	.word	.LANCHOR77
-	.word	.LANCHOR79
-.LBE241:
+	.word	.LANCHOR62
+	.word	.LANCHOR76
+	.word	.LANCHOR39
+.LBE274:
 	.cfi_endproc
 .LFE321:
 	.size	FtlReadRefresh, .-FtlReadRefresh
@@ -9728,71 +9851,71 @@ FtlReadRefresh:
 	.type	FtlMapBlkWriteDump_data, %function
 FtlMapBlkWriteDump_data:
 .LFB270:
-	.loc 2 897 0
+	.loc 2 946 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL927:
-	.loc 2 903 0
+.LVL935:
+	.loc 2 952 0
 	ldr	r3, [r0, #36]
-	.loc 2 897 0
+	.loc 2 946 0
 	push	{r4, r5, r6, lr}
 	.cfi_def_cfa_offset 16
 	.cfi_offset 4, -16
 	.cfi_offset 5, -12
 	.cfi_offset 6, -8
 	.cfi_offset 14, -4
-	.loc 2 897 0
+	.loc 2 946 0
 	mov	r6, r0
-	.loc 2 903 0
-	cbz	r3, .L797
-	.loc 2 899 0
+	.loc 2 952 0
+	cbz	r3, .L803
+	.loc 2 948 0
 	ldrh	r5, [r0, #6]
-	.loc 2 905 0
+	.loc 2 954 0
 	movs	r3, #0
-	.loc 2 900 0
+	.loc 2 949 0
 	ldr	r2, [r0, #24]
-	.loc 2 905 0
+	.loc 2 954 0
 	str	r3, [r0, #36]
-	.loc 2 899 0
+	.loc 2 948 0
 	subs	r5, r5, #1
-	.loc 2 907 0
-	ldr	r3, .L801
-	.loc 2 908 0
-	ldr	r1, .L801+4
-	.loc 2 930 0
+	.loc 2 956 0
+	ldr	r3, .L807
+	.loc 2 957 0
+	ldr	r1, .L807+4
+	.loc 2 979 0
 	uxth	r5, r5
-	.loc 2 907 0
-	ldr	r4, .L801+8
-	.loc 2 930 0
+	.loc 2 956 0
+	ldr	r4, .L807+8
+	.loc 2 979 0
 	ldr	r2, [r2, r5, lsl #2]
-.LVL928:
-	.loc 2 907 0
+.LVL936:
+	.loc 2 956 0
 	ldr	r0, [r3]
-.LVL929:
-	.loc 2 908 0
+.LVL937:
+	.loc 2 957 0
 	ldr	r1, [r1]
-	.loc 2 931 0
+	.loc 2 980 0
 	str	r2, [r4, #4]
-	.loc 2 907 0
+	.loc 2 956 0
 	str	r0, [r4, #8]
-	.loc 2 908 0
+	.loc 2 957 0
 	str	r1, [r4, #12]
-	.loc 2 932 0
-	cbz	r2, .L799
-	.loc 2 934 0
+	.loc 2 981 0
+	cbz	r2, .L805
+	.loc 2 983 0
 	movs	r2, #1
-.LVL930:
+.LVL938:
 	mov	r0, r4
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL931:
-.L800:
-	.loc 2 941 0
+.LVL939:
+.L806:
+	.loc 2 990 0
 	ldr	r2, [r4, #8]
 	mov	r1, r5
 	mov	r0, r6
-	.loc 2 943 0
+	.loc 2 992 0
 	pop	{r4, r5, r6, lr}
 	.cfi_remember_state
 	.cfi_restore 14
@@ -9800,29 +9923,29 @@ FtlMapBlkWriteDump_data:
 	.cfi_restore 5
 	.cfi_restore 4
 	.cfi_def_cfa_offset 0
-.LVL932:
-	.loc 2 941 0
+.LVL940:
+	.loc 2 990 0
 	b	FtlMapWritePage
-.LVL933:
-.L799:
+.LVL941:
+.L805:
 	.cfi_restore_state
-	.loc 2 938 0
-	ldr	r3, .L801+12
+	.loc 2 987 0
+	ldr	r3, .L807+12
 	movs	r1, #255
 	ldrh	r2, [r3]
-.LVL934:
+.LVL942:
 	bl	ftl_memset
-.LVL935:
-	b	.L800
-.LVL936:
-.L797:
+.LVL943:
+	b	.L806
+.LVL944:
+.L803:
 	pop	{r4, r5, r6, pc}
-.L802:
+.L808:
 	.align	2
-.L801:
+.L807:
 	.word	.LANCHOR123
-	.word	.LANCHOR109
 	.word	.LANCHOR108
+	.word	.LANCHOR106
 	.word	.LANCHOR23
 	.cfi_endproc
 .LFE270:
@@ -9837,7 +9960,7 @@ FtlMapBlkWriteDump_data:
 	.type	FtlScanSysBlk, %function
 FtlScanSysBlk:
 .LFB273:
-	.loc 2 1095 0
+	.loc 2 1144 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
@@ -9851,432 +9974,428 @@ FtlScanSysBlk:
 	.cfi_offset 10, -12
 	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	.loc 2 1101 0
+	.loc 2 1150 0
 	movs	r4, #0
-	.loc 2 1103 0
-	ldr	r5, .L884
-	.loc 2 1095 0
+	.loc 2 1152 0
+	ldr	r5, .L889
+	.loc 2 1144 0
 	sub	sp, sp, #32
 	.cfi_def_cfa_offset 64
-	.loc 2 1103 0
+	.loc 2 1152 0
 	mov	r1, r4
-	.loc 2 1102 0
-	ldr	r3, .L884+4
-	.loc 2 1103 0
+	.loc 2 1151 0
+	ldr	r3, .L889+4
+	.loc 2 1152 0
 	ldr	r2, [r5]
-	.loc 2 1101 0
-	ldr	r6, .L884+8
-	.loc 2 1102 0
+	.loc 2 1150 0
+	ldr	r6, .L889+8
+	.loc 2 1151 0
 	strh	r4, [r3]	@ movhi
-	.loc 2 1103 0
-	ldr	r3, .L884+12
+	.loc 2 1152 0
+	ldr	r3, .L889+12
 	lsls	r2, r2, #2
-	.loc 2 1101 0
+	.loc 2 1150 0
 	strh	r4, [r6]	@ movhi
-	.loc 2 1105 0
-	ldr	r7, .L884+16
-	.loc 2 1103 0
+	.loc 2 1154 0
+	ldr	r7, .L889+16
+	.loc 2 1152 0
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL937:
-	.loc 2 1104 0
+.LVL945:
+	.loc 2 1153 0
 	ldr	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L884+20
+	ldr	r3, .L889+20
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL938:
-	.loc 2 1105 0
+.LVL946:
+	.loc 2 1154 0
 	ldrh	r2, [r7]
 	mov	r1, r4
-	ldr	r3, .L884+24
+	ldr	r3, .L889+24
 	lsls	r2, r2, #2
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL939:
-	.loc 2 1106 0
+.LVL947:
+	.loc 2 1155 0
 	ldrh	r2, [r7]
 	mov	r1, r4
-	ldr	r3, .L884+28
+	ldr	r3, .L889+28
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL940:
-	.loc 2 1107 0
+.LVL948:
+	.loc 2 1156 0
 	movs	r2, #12
 	movs	r1, #255
-	ldr	r0, .L884+32
+	ldr	r0, .L889+32
 	bl	ftl_memset
-.LVL941:
-	.loc 2 1109 0
-	ldr	r3, .L884+36
+.LVL949:
+	.loc 2 1158 0
+	ldr	r3, .L889+36
 	str	r6, [sp, #12]
 	str	r5, [sp, #16]
 	ldrh	r3, [r3]
 	str	r3, [sp, #4]
-.LVL942:
-.L804:
-	.loc 2 1109 0 is_stmt 0 discriminator 1
-	ldr	r3, .L884+40
+.LVL950:
+.L810:
+	.loc 2 1158 0 is_stmt 0 discriminator 1
+	ldr	r3, .L889+40
 	ldr	r2, [sp, #4]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bls	.L845
-	.loc 2 1113 0 is_stmt 1 discriminator 1
-	ldr	r3, .L884+44
-	.loc 2 1120 0 discriminator 1
+	bls	.L851
+	.loc 2 1162 0 is_stmt 1 discriminator 1
+	ldr	r3, .L889+44
+	.loc 2 1169 0 discriminator 1
 	movs	r5, #0
-	ldr	r1, .L884+48
+	ldr	r1, .L889+48
 	mov	fp, r5
-	.loc 2 1118 0 discriminator 1
+	.loc 2 1167 0 discriminator 1
 	movs	r7, #20
-	.loc 2 1113 0 discriminator 1
+	.loc 2 1162 0 discriminator 1
 	ldrh	r8, [r3]
-	.loc 2 1118 0 discriminator 1
-	ldr	r3, .L884+52
-	.loc 2 1120 0 discriminator 1
+	.loc 2 1167 0 discriminator 1
+	ldr	r3, .L889+52
+	.loc 2 1169 0 discriminator 1
 	ldr	r2, [r1]
-	ldr	r1, .L884+56
-	.loc 2 1118 0 discriminator 1
+	ldr	r1, .L889+56
+	.loc 2 1167 0 discriminator 1
 	ldr	r6, [r3]
-	.loc 2 1119 0 discriminator 1
-	ldr	r3, .L884+60
-	.loc 2 1120 0 discriminator 1
+	.loc 2 1168 0 discriminator 1
+	ldr	r3, .L889+60
+	.loc 2 1169 0 discriminator 1
 	str	r2, [sp, #8]
 	ldrh	r10, [r1]
-	.loc 2 1119 0 discriminator 1
+	.loc 2 1168 0 discriminator 1
 	ldr	r3, [r3]
-	.loc 2 1115 0 discriminator 1
-	ldr	r2, .L884+64
-	b	.L846
-.LVL943:
-.L806:
-	.loc 2 1115 0 is_stmt 0
+	.loc 2 1164 0 discriminator 1
+	ldr	r2, .L889+64
+	b	.L852
+.LVL951:
+.L812:
+	.loc 2 1164 0 is_stmt 0
 	ldrb	r0, [r2, r5]	@ zero_extendqisi2
 	ldr	r1, [sp, #4]
 	str	r3, [sp, #28]
 	str	r2, [sp, #24]
 	bl	V2P_block
-.LVL944:
+.LVL952:
 	str	r0, [sp, #20]
-.LVL945:
-	.loc 2 1116 0 is_stmt 1
+.LVL953:
+	.loc 2 1165 0 is_stmt 1
 	bl	FtlBbmIsBadBlock
-.LVL946:
+.LVL954:
 	ldr	r2, [sp, #24]
 	ldr	r3, [sp, #28]
-	cbnz	r0, .L805
-	.loc 2 1118 0
+	cbnz	r0, .L811
+	.loc 2 1167 0
 	ldr	r1, [sp, #20]
 	mla	r0, r7, fp, r6
-	.loc 2 1120 0
+	.loc 2 1169 0
 	ldr	r4, [sp, #8]
-	.loc 2 1118 0
+	.loc 2 1167 0
 	lsls	r1, r1, #10
-	.loc 2 1119 0
+	.loc 2 1168 0
 	str	r3, [r0, #8]
-	.loc 2 1118 0
+	.loc 2 1167 0
 	str	r1, [r0, #4]
-	.loc 2 1120 0
+	.loc 2 1169 0
 	mul	r1, r10, fp
 	bic	r1, r1, #3
 	add	r1, r1, r4
 	str	r1, [r0, #12]
-	.loc 2 1121 0
+	.loc 2 1170 0
 	add	r1, fp, #1
 	uxth	fp, r1
-.LVL947:
-.L805:
+.LVL955:
+.L811:
 	adds	r5, r5, #1
-.LVL948:
-.L846:
-	.loc 2 1113 0 discriminator 1
+.LVL956:
+.L852:
+	.loc 2 1162 0 discriminator 1
 	uxth	r1, r5
 	cmp	r8, r1
-	bhi	.L806
-	.loc 2 1124 0
+	bhi	.L812
+	.loc 2 1173 0
 	cmp	fp, #0
-	bne	.L807
-.LVL949:
-.L844:
-	.loc 2 1109 0
+	bne	.L813
+.LVL957:
+.L850:
+	.loc 2 1158 0
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	str	r3, [sp, #4]
-.LVL950:
-	b	.L804
-.LVL951:
-.L807:
-	.loc 2 1128 0
+.LVL958:
+	b	.L810
+.LVL959:
+.L813:
+	.loc 2 1177 0
 	movs	r7, #0
-	.loc 2 1127 0
+	.loc 2 1176 0
 	movs	r2, #1
 	mov	r1, fp
 	mov	r0, r6
 	bl	FlashReadPages
-.LVL952:
-.L808:
-	.loc 2 1128 0 discriminator 1
+.LVL960:
+.L814:
+	.loc 2 1177 0 discriminator 1
 	uxth	r3, r7
 	cmp	fp, r3
-	bls	.L844
-	.loc 2 1129 0
-	ldr	r3, .L884+52
+	bls	.L850
+	.loc 2 1178 0
+	ldr	r3, .L889+52
 	mov	r8, #20
 	mul	r8, r8, r7
 	ldr	r3, [r3]
 	add	r2, r3, r8
-	.loc 2 1132 0
+	.loc 2 1181 0
 	ldr	r3, [r3, r8]
-	.loc 2 1129 0
+	.loc 2 1178 0
 	ldr	r5, [r2, #4]
-	.loc 2 1130 0
+	.loc 2 1179 0
 	ldr	r6, [r2, #12]
-	.loc 2 1132 0
+	.loc 2 1181 0
 	adds	r3, r3, #1
-	.loc 2 1129 0
+	.loc 2 1178 0
 	ubfx	r5, r5, #10, #16
-.LVL953:
-	.loc 2 1132 0
-	bne	.L811
+.LVL961:
+	.loc 2 1181 0
+	bne	.L817
 	mov	r10, #16
-.L813:
-.LVL954:
-	.loc 2 1134 0
-	ldr	r3, .L884+52
-	.loc 2 1135 0
+.L819:
+.LVL962:
+	.loc 2 1183 0
+	ldr	r3, .L889+52
+	.loc 2 1184 0
 	movs	r2, #1
 	mov	r1, r2
-	.loc 2 1134 0
+	.loc 2 1183 0
 	ldr	r0, [r3]
 	add	r0, r0, r8
 	ldr	r3, [r0, #4]
 	adds	r3, r3, #1
 	str	r3, [r0, #4]
-	.loc 2 1135 0
+	.loc 2 1184 0
 	bl	FlashReadPages
-.LVL955:
-	.loc 2 1136 0
+.LVL963:
+	.loc 2 1185 0
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	.loc 2 1137 0
-	ldr	r3, .L884+52
+	.loc 2 1186 0
+	ldr	r3, .L889+52
 	ldr	r3, [r3]
-	.loc 2 1136 0
-	bne	.L810
-	.loc 2 1137 0
+	.loc 2 1185 0
+	bne	.L816
+	.loc 2 1186 0
 	mov	r2, #-1
 	str	r2, [r3, r8]
-	.loc 2 1145 0
-	ldr	r3, .L884+52
+	.loc 2 1194 0
+	ldr	r3, .L889+52
 	ldr	r3, [r3]
 	ldr	r3, [r3, r8]
 	cmp	r3, r2
-	bne	.L811
-.LVL956:
-.L812:
-	.loc 2 1287 0
-	movs	r1, #1
-	b	.L883
-.LVL957:
-.L810:
-	.loc 2 1139 0
+	bne	.L817
+.LVL964:
+.L818:
+	.loc 2 1336 0
+	movs	r1, #0
+	mov	r0, r5
+	bl	FtlFreeSysBlkQueueIn
+.LVL965:
+	b	.L822
+.LVL966:
+.L816:
+	.loc 2 1188 0
 	ldr	r3, [r3, r8]
 	adds	r3, r3, #1
-	bne	.L811
-.LVL958:
+	bne	.L817
+.LVL967:
 	add	r10, r10, #-1
-.LVL959:
+.LVL968:
 	uxth	r10, r10
-	.loc 2 1133 0 discriminator 2
+	.loc 2 1182 0 discriminator 2
 	cmp	r10, #0
-	bne	.L813
-	b	.L812
-.L811:
-	.loc 2 1147 0
-	ldr	r3, .L884+68
+	bne	.L819
+	b	.L818
+.L817:
+	.loc 2 1196 0
+	ldr	r3, .L889+68
 	ldr	r2, [r3]
 	ldr	r3, [r6, #4]
 	adds	r1, r2, #1
-	beq	.L814
-	.loc 2 1147 0 is_stmt 0 discriminator 1
+	beq	.L820
+	.loc 2 1196 0 is_stmt 0 discriminator 1
 	cmp	r2, r3
-	bhi	.L815
-.L814:
-	.loc 2 1149 0 is_stmt 1
+	bhi	.L821
+.L820:
+	.loc 2 1198 0 is_stmt 1
 	adds	r2, r3, #1
-	.loc 2 1152 0
+	.loc 2 1201 0
 	ittt	ne
-	ldrne	r1, .L884+68
+	ldrne	r1, .L889+68
 	addne	r2, r3, #1
 	strne	r2, [r1]
-.L815:
-	.loc 2 1157 0
+.L821:
+	.loc 2 1206 0
 	ldrh	r2, [r6]
 	movw	r1, #61604
 	cmp	r2, r1
-	beq	.L817
-	bhi	.L818
+	beq	.L823
+	bhi	.L824
 	movw	r3, #61574
 	cmp	r2, r3
-	beq	.L819
-.L816:
-.LVL960:
+	beq	.L825
+.L822:
+.LVL969:
 	adds	r7, r7, #1
-.LVL961:
-	b	.L808
-.LVL962:
-.L818:
+.LVL970:
+	b	.L814
+.LVL971:
+.L824:
 	movw	r3, #61634
 	cmp	r2, r3
-	beq	.L820
+	beq	.L826
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L816
-	.loc 2 1280 0
-	movs	r1, #0
-.L883:
-	.loc 2 1287 0
-	mov	r0, r5
-	bl	FtlFreeSysBlkQueueIn
-.LVL963:
-	b	.L816
-.L820:
-	.loc 2 1162 0
-	ldr	r3, .L884+8
+	beq	.L818
+	b	.L822
+.L826:
+	.loc 2 1211 0
+	ldr	r3, .L889+8
 	ldrh	r2, [r3]
-	ldr	r3, .L884
+	ldr	r3, .L889
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bls	.L822
-	.loc 2 1162 0 is_stmt 0 discriminator 1
-	movw	r2, #1162
-	ldr	r1, .L884+72
-	ldr	r0, .L884+76
+	bls	.L828
+	.loc 2 1211 0 is_stmt 0 discriminator 1
+	movw	r2, #1211
+	ldr	r1, .L889+72
+	ldr	r0, .L889+76
 	bl	printf
-.LVL964:
-.L822:
-	.loc 2 1163 0 is_stmt 1
+.LVL972:
+.L828:
+	.loc 2 1212 0 is_stmt 1
 	ldr	r3, [sp, #16]
 	ldr	r2, [sp, #12]
 	ldr	r1, [r3]
 	ldrh	r0, [r2]
-	.loc 2 1165 0
-	ldr	r2, .L884+12
-	.loc 2 1163 0
+	.loc 2 1214 0
+	ldr	r2, .L889+12
+	.loc 2 1212 0
 	uxth	r10, r1
-	.loc 2 1165 0
+	.loc 2 1214 0
 	ldr	ip, [r2]
-	.loc 2 1163 0
+	.loc 2 1212 0
 	add	r3, r10, #-1
 	sub	r10, r10, r0
 	add	r10, r10, #-1
 	sxth	r3, r3
-.LVL965:
+.LVL973:
 	sxth	r10, r10
-.L823:
-	.loc 2 1163 0 is_stmt 0 discriminator 1
+.L829:
+	.loc 2 1212 0 is_stmt 0 discriminator 1
 	cmp	r3, r10
-	bgt	.L829
-	.loc 2 1186 0 is_stmt 1
+	bgt	.L835
+	.loc 2 1235 0 is_stmt 1
 	cmp	r3, #0
-	bge	.L861
-	b	.L816
-.L829:
-	.loc 2 1165 0
+	bge	.L867
+	b	.L822
+.L835:
+	.loc 2 1214 0
 	ldr	r2, [ip, r3, lsl #2]
 	add	r8, ip, r3, lsl #2
 	ldr	r4, [r6, #4]
 	cmp	r4, r2
-	bls	.L824
-	.loc 2 1167 0
+	bls	.L830
+	.loc 2 1216 0
 	ldr	r2, [ip]
-	cbnz	r2, .L825
-	.loc 2 1167 0 is_stmt 0 discriminator 1
+	cbnz	r2, .L831
+	.loc 2 1216 0 is_stmt 0 discriminator 1
 	cmp	r1, r0
-	.loc 2 1172 0 is_stmt 1 discriminator 1
+	.loc 2 1221 0 is_stmt 1 discriminator 1
 	ittt	ne
-	ldrne	r2, .L884+8
+	ldrne	r2, .L889+8
 	addne	r0, r0, #1
 	strhne	r0, [r2]	@ movhi
-.L825:
-	.loc 2 1178 0 discriminator 1
-	ldr	r2, .L884+20
-	.loc 2 1175 0 discriminator 1
+.L831:
+	.loc 2 1227 0 discriminator 1
+	ldr	r2, .L889+20
+	.loc 2 1224 0 discriminator 1
 	uxth	r10, r3
-	.loc 2 1178 0 discriminator 1
+	.loc 2 1227 0 discriminator 1
 	ldr	r0, [r2]
 	movs	r2, #0
-.L826:
-	.loc 2 1175 0 discriminator 1
+.L832:
+	.loc 2 1224 0 discriminator 1
 	uxth	lr, r2
 	sxth	r1, r2
-.LVL966:
+.LVL974:
 	cmp	r10, lr
-	bhi	.L827
-	.loc 2 1180 0
+	bhi	.L833
+	.loc 2 1229 0
 	ldr	r2, [r6, #4]
-	.loc 2 1186 0
+	.loc 2 1235 0
 	cmp	r3, #0
-	.loc 2 1180 0
+	.loc 2 1229 0
 	str	r2, [r8]
-	.loc 2 1181 0
+	.loc 2 1230 0
 	strh	r5, [r0, r3, lsl #1]	@ movhi
-	.loc 2 1186 0
-	blt	.L816
-	.loc 2 1193 0
-	ldr	r2, .L884+8
+	.loc 2 1235 0
+	blt	.L822
+	.loc 2 1242 0
+	ldr	r2, .L889+8
 	ldrh	r0, [r2]
-	ldr	r2, .L884
+	ldr	r2, .L889
 	ldr	r2, [r2]
 	subs	r2, r2, r0
 	subs	r2, r2, #1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L816
-.LVL967:
-.L861:
-	.loc 2 1195 0
-	ldr	r2, .L884+8
+	bgt	.L822
+.LVL975:
+.L867:
+	.loc 2 1244 0
+	ldr	r2, .L889+8
 	adds	r0, r0, #1
 	strh	r0, [r2]	@ movhi
-	.loc 2 1196 0
+	.loc 2 1245 0
 	ldr	r2, [r6, #4]
 	str	r2, [ip, r3, lsl #2]
-	.loc 2 1197 0
-	ldr	r2, .L884+20
-.L881:
-	.loc 2 1241 0
+	.loc 2 1246 0
+	ldr	r2, .L889+20
+.L887:
+	.loc 2 1290 0
 	ldr	r2, [r2]
 	strh	r5, [r2, r3, lsl #1]	@ movhi
-	b	.L816
-.LVL968:
-.L827:
-	.loc 2 1177 0 discriminator 3
+	b	.L822
+.LVL976:
+.L833:
+	.loc 2 1226 0 discriminator 3
 	add	lr, ip, r1, lsl #2
 	adds	r2, r2, #1
 	ldr	r4, [lr, #4]
-	.loc 2 1178 0 discriminator 3
+	.loc 2 1227 0 discriminator 3
 	add	lr, r0, r1, lsl #1
 	ldrh	lr, [lr, #2]
-	.loc 2 1177 0 discriminator 3
+	.loc 2 1226 0 discriminator 3
 	str	r4, [ip, r1, lsl #2]
-	.loc 2 1178 0 discriminator 3
+	.loc 2 1227 0 discriminator 3
 	strh	lr, [r0, r1, lsl #1]	@ movhi
-.LVL969:
-	b	.L826
-.L824:
+.LVL977:
+	b	.L832
+.L830:
 	subs	r3, r3, #1
-.LVL970:
+.LVL978:
 	sxth	r3, r3
-.LVL971:
-	b	.L823
-.L885:
+.LVL979:
+	b	.L829
+.L890:
 	.align	2
-.L884:
+.L889:
 	.word	.LANCHOR30
 	.word	.LANCHOR35
 	.word	.LANCHOR147
@@ -10285,302 +10404,302 @@ FtlScanSysBlk:
 	.word	.LANCHOR129
 	.word	.LANCHOR132
 	.word	.LANCHOR36
-	.word	.LANCHOR81
+	.word	.LANCHOR79
 	.word	.LANCHOR5
 	.word	.LANCHOR6
 	.word	.LANCHOR3
-	.word	.LANCHOR94
+	.word	.LANCHOR92
 	.word	.LANCHOR120
 	.word	.LANCHOR24
-	.word	.LANCHOR93
+	.word	.LANCHOR91
 	.word	.LANCHOR13
-	.word	.LANCHOR71
+	.word	.LANCHOR70
 	.word	.LANCHOR148
 	.word	.LC1
-.LVL972:
-.L819:
-	.loc 2 1203 0
-	ldr	r8, .L886+12
-	ldr	r10, .L886+20
+.LVL980:
+.L825:
+	.loc 2 1252 0
+	ldr	r8, .L891+12
+	ldr	r10, .L891+20
 	ldrh	r2, [r8]
 	ldrh	r3, [r10]
 	cmp	r2, r3
-	bls	.L832
-	.loc 2 1203 0 is_stmt 0 discriminator 1
-	movw	r2, #1203
-	ldr	r1, .L886
-	ldr	r0, .L886+4
+	bls	.L838
+	.loc 2 1252 0 is_stmt 0 discriminator 1
+	movw	r2, #1252
+	ldr	r1, .L891
+	ldr	r0, .L891+4
 	bl	printf
-.LVL973:
-.L832:
-	.loc 2 1206 0 is_stmt 1
-	ldr	r2, .L886+8
-	.loc 2 1204 0
+.LVL981:
+.L838:
+	.loc 2 1255 0 is_stmt 1
+	ldr	r2, .L891+8
+	.loc 2 1253 0
 	ldrh	lr, [r10]
 	ldrh	ip, [r8]
-	.loc 2 1206 0
+	.loc 2 1255 0
 	ldr	r0, [r2]
-	.loc 2 1204 0
+	.loc 2 1253 0
 	add	r10, lr, #-1
 	sxth	r3, r10
-.LVL974:
+.LVL982:
 	sub	r10, r10, ip
-.L833:
-	.loc 2 1204 0 is_stmt 0 discriminator 1
+.L839:
+	.loc 2 1253 0 is_stmt 0 discriminator 1
 	cmp	r3, r10
-	ble	.L838
-	.loc 2 1206 0 is_stmt 1
+	ble	.L844
+	.loc 2 1255 0 is_stmt 1
 	ldr	r1, [r6, #4]
 	add	r8, r0, r3, lsl #2
 	ldr	r2, [r0, r3, lsl #2]
 	cmp	r1, r2
-	bls	.L834
-	.loc 2 1208 0
+	bls	.L840
+	.loc 2 1257 0
 	ldr	r2, [r0]
-	cbnz	r2, .L835
-	.loc 2 1208 0 is_stmt 0 discriminator 1
+	cbnz	r2, .L841
+	.loc 2 1257 0 is_stmt 0 discriminator 1
 	cmp	lr, ip
-	.loc 2 1216 0 is_stmt 1 discriminator 1
+	.loc 2 1265 0 is_stmt 1 discriminator 1
 	ittt	ne
-	ldrne	r2, .L886+12
+	ldrne	r2, .L891+12
 	addne	ip, ip, #1
 	strhne	ip, [r2]	@ movhi
-.L835:
-	.loc 2 1221 0 discriminator 1
-	ldr	r2, .L886+16
-	.loc 2 1218 0 discriminator 1
+.L841:
+	.loc 2 1270 0 discriminator 1
+	ldr	r2, .L891+16
+	.loc 2 1267 0 discriminator 1
 	uxth	r10, r3
-	.loc 2 1221 0 discriminator 1
+	.loc 2 1270 0 discriminator 1
 	ldr	ip, [r2]
 	movs	r2, #0
-.L836:
-	.loc 2 1218 0 discriminator 1
+.L842:
+	.loc 2 1267 0 discriminator 1
 	uxth	lr, r2
 	sxth	r1, r2
-.LVL975:
+.LVL983:
 	cmp	r10, lr
-	bhi	.L837
-	.loc 2 1223 0
+	bhi	.L843
+	.loc 2 1272 0
 	ldr	r2, [r6, #4]
 	str	r2, [r8]
-	.loc 2 1224 0
+	.loc 2 1273 0
 	strh	r5, [ip, r3, lsl #1]	@ movhi
-.LVL976:
-.L838:
-	.loc 2 1229 0
+.LVL984:
+.L844:
+	.loc 2 1278 0
 	cmp	r3, #0
-	blt	.L816
-	.loc 2 1237 0
-	ldr	r2, .L886+20
-	ldr	ip, .L886+12
+	blt	.L822
+	.loc 2 1286 0
+	ldr	r2, .L891+20
+	ldr	ip, .L891+12
 	ldrh	r2, [r2]
 	ldrh	r1, [ip]
 	subs	r2, r2, #1
 	subs	r2, r2, r1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L816
-	.loc 2 1240 0
+	bgt	.L822
+	.loc 2 1289 0
 	ldr	r2, [r6, #4]
-	.loc 2 1239 0
+	.loc 2 1288 0
 	adds	r1, r1, #1
 	strh	r1, [ip]	@ movhi
-	.loc 2 1240 0
+	.loc 2 1289 0
 	str	r2, [r0, r3, lsl #2]
-	.loc 2 1241 0
-	ldr	r2, .L886+16
-	b	.L881
-.LVL977:
-.L837:
-	.loc 2 1220 0 discriminator 3
+	.loc 2 1290 0
+	ldr	r2, .L891+16
+	b	.L887
+.LVL985:
+.L843:
+	.loc 2 1269 0 discriminator 3
 	add	lr, r0, r1, lsl #2
 	adds	r2, r2, #1
 	ldr	r4, [lr, #4]
-	.loc 2 1221 0 discriminator 3
+	.loc 2 1270 0 discriminator 3
 	add	lr, ip, r1, lsl #1
 	ldrh	lr, [lr, #2]
-	.loc 2 1220 0 discriminator 3
+	.loc 2 1269 0 discriminator 3
 	str	r4, [r0, r1, lsl #2]
-	.loc 2 1221 0 discriminator 3
+	.loc 2 1270 0 discriminator 3
 	strh	lr, [ip, r1, lsl #1]	@ movhi
-.LVL978:
-	b	.L836
-.L834:
+.LVL986:
+	b	.L842
+.L840:
 	subs	r3, r3, #1
-.LVL979:
+.LVL987:
 	sxth	r3, r3
-.LVL980:
-	b	.L833
-.LVL981:
-.L817:
-	.loc 2 1248 0
-	ldr	r8, .L886+40
+.LVL988:
+	b	.L839
+.LVL989:
+.L823:
+	.loc 2 1297 0
+	ldr	r8, .L891+40
 	movw	r2, #65535
 	ldrh	r1, [r8]
 	cmp	r1, r2
-	bne	.L840
-.L882:
-	.loc 2 1260 0
+	bne	.L846
+.L888:
+	.loc 2 1309 0
 	strh	r5, [r8]	@ movhi
-	.loc 2 1261 0
+	.loc 2 1310 0
 	str	r3, [r8, #8]
-	b	.L816
-.L840:
-	.loc 2 1255 0
+	b	.L822
+.L846:
+	.loc 2 1304 0
 	ldrh	r0, [r8, #4]
 	cmp	r0, r2
-	beq	.L841
-	.loc 2 1256 0
+	beq	.L847
+	.loc 2 1305 0
 	movs	r1, #1
 	bl	FtlFreeSysBlkQueueIn
-.LVL982:
-.L841:
-	.loc 2 1257 0
+.LVL990:
+.L847:
+	.loc 2 1306 0
 	ldr	r3, [r6, #4]
 	ldr	r2, [r8, #8]
 	cmp	r2, r3
-	bcs	.L842
-	.loc 2 1259 0
+	bcs	.L848
+	.loc 2 1308 0
 	ldrh	r2, [r8]
 	strh	r2, [r8, #4]	@ movhi
-	b	.L882
-.L842:
-	.loc 2 1265 0
+	b	.L888
+.L848:
+	.loc 2 1314 0
 	strh	r5, [r8, #4]	@ movhi
-	b	.L816
-.LVL983:
-.L845:
-	.loc 2 1292 0
-	ldr	r3, .L886+24
+	b	.L822
+.LVL991:
+.L851:
+	.loc 2 1341 0
+	ldr	r3, .L891+24
 	ldr	r2, [r3]
 	ldrh	r3, [r2]
-	cbz	r3, .L847
-.L850:
-	.loc 2 1310 0
-	ldr	r3, .L886+16
+	cbz	r3, .L853
+.L856:
+	.loc 2 1359 0
+	ldr	r3, .L891+16
 	ldr	r4, [r3]
 	ldrh	r2, [r4]
 	cmp	r2, #0
-	beq	.L848
-.L849:
-	.loc 2 1328 0
-	ldr	r3, .L886+28
+	beq	.L854
+.L855:
+	.loc 2 1377 0
+	ldr	r3, .L891+28
 	ldrh	r2, [r3]
-	ldr	r3, .L886+32
+	ldr	r3, .L891+32
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bls	.L880
-	.loc 2 1328 0 is_stmt 0 discriminator 1
-	mov	r2, #1328
-	ldr	r1, .L886
-	ldr	r0, .L886+4
+	bls	.L886
+	.loc 2 1377 0 is_stmt 0 discriminator 1
+	movw	r2, #1377
+	ldr	r1, .L891
+	ldr	r0, .L891+4
 	bl	printf
-.LVL984:
-.L880:
-	.loc 2 1330 0 is_stmt 1
+.LVL992:
+.L886:
+	.loc 2 1379 0 is_stmt 1
 	movs	r0, #0
 	add	sp, sp, #32
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL985:
-.L847:
+.LVL993:
+.L853:
 	.cfi_restore_state
-	.loc 2 1292 0 discriminator 1
-	ldr	r1, .L886+28
+	.loc 2 1341 0 discriminator 1
+	ldr	r1, .L891+28
 	ldrh	r1, [r1]
 	cmp	r1, #0
-	beq	.L850
-	.loc 2 1294 0 discriminator 1
-	ldr	r5, .L886+32
+	beq	.L856
+	.loc 2 1343 0 discriminator 1
+	ldr	r5, .L891+32
 	ldr	r0, [r5]
-.L851:
+.L857:
 	sxth	r1, r3
-.LVL986:
+.LVL994:
 	cmp	r1, r0
-	bcs	.L850
-	.loc 2 1296 0
+	bcs	.L856
+	.loc 2 1345 0
 	ldrh	r4, [r2, r1, lsl #1]
 	adds	r3, r3, #1
 	cmp	r4, #0
-	beq	.L851
-	.loc 2 1301 0
-	ldr	r3, .L886+36
-	.loc 2 1302 0
+	beq	.L857
+	.loc 2 1350 0
+	ldr	r3, .L891+36
+	.loc 2 1351 0
 	movs	r6, #0
-	.loc 2 1301 0
+	.loc 2 1350 0
 	ldr	r0, [r3]
 	mov	r3, r1
-.L852:
-.LVL987:
-	.loc 2 1298 0 discriminator 1
+.L858:
+.LVL995:
+	.loc 2 1347 0 discriminator 1
 	ldr	r4, [r5]
 	cmp	r3, r4
-	bcs	.L850
-	.loc 2 1300 0 discriminator 3
+	bcs	.L856
+	.loc 2 1349 0 discriminator 3
 	ldrh	r7, [r2, r3, lsl #1]
 	subs	r4, r3, r1
 	strh	r7, [r2, r4, lsl #1]	@ movhi
-	.loc 2 1301 0 discriminator 3
+	.loc 2 1350 0 discriminator 3
 	ldr	r7, [r0, r3, lsl #2]
 	str	r7, [r0, r4, lsl #2]
-	.loc 2 1302 0 discriminator 3
+	.loc 2 1351 0 discriminator 3
 	strh	r6, [r2, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
-.LVL988:
+.LVL996:
 	sxth	r3, r3
-.LVL989:
-	b	.L852
-.LVL990:
-.L848:
-	.loc 2 1310 0 discriminator 1
-	ldr	r3, .L886+12
+.LVL997:
+	b	.L858
+.LVL998:
+.L854:
+	.loc 2 1359 0 discriminator 1
+	ldr	r3, .L891+12
 	ldrh	r3, [r3]
 	cmp	r3, #0
-	beq	.L849
-	.loc 2 1312 0 discriminator 1
-	ldr	r5, .L886+20
+	beq	.L855
+	.loc 2 1361 0 discriminator 1
+	ldr	r5, .L891+20
 	ldrh	r1, [r5]
-.L857:
+.L863:
 	sxth	r3, r2
-.LVL991:
+.LVL999:
 	cmp	r3, r1
 	mov	r6, r3
-	bge	.L849
-	.loc 2 1314 0
+	bge	.L855
+	.loc 2 1363 0
 	ldrh	r0, [r4, r3, lsl #1]
 	adds	r2, r2, #1
 	cmp	r0, #0
-	beq	.L857
-	.loc 2 1319 0
-	ldr	r2, .L886+8
-	.loc 2 1320 0
+	beq	.L863
+	.loc 2 1368 0
+	ldr	r2, .L891+8
+	.loc 2 1369 0
 	movs	r0, #0
-	.loc 2 1319 0
+	.loc 2 1368 0
 	ldr	r2, [r2]
-.LVL992:
-.L858:
-	.loc 2 1316 0 discriminator 1
+.LVL1000:
+.L864:
+	.loc 2 1365 0 discriminator 1
 	ldrh	r1, [r5]
 	cmp	r3, r1
-	bge	.L849
-	.loc 2 1318 0 discriminator 3
+	bge	.L855
+	.loc 2 1367 0 discriminator 3
 	ldrh	r7, [r4, r3, lsl #1]
 	subs	r1, r3, r6
 	strh	r7, [r4, r1, lsl #1]	@ movhi
-	.loc 2 1319 0 discriminator 3
+	.loc 2 1368 0 discriminator 3
 	ldr	r7, [r2, r3, lsl #2]
 	str	r7, [r2, r1, lsl #2]
 	adds	r1, r3, #1
-	.loc 2 1320 0 discriminator 3
+	.loc 2 1369 0 discriminator 3
 	strh	r0, [r4, r3, lsl #1]	@ movhi
 	sxth	r3, r1
-.LVL993:
-	b	.L858
-.L887:
+.LVL1001:
+	b	.L864
+.L892:
 	.align	2
-.L886:
+.L891:
 	.word	.LANCHOR148
 	.word	.LC1
 	.word	.LANCHOR132
@@ -10591,7 +10710,7 @@ FtlScanSysBlk:
 	.word	.LANCHOR147
 	.word	.LANCHOR30
 	.word	.LANCHOR135
-	.word	.LANCHOR81
+	.word	.LANCHOR79
 	.cfi_endproc
 .LFE273:
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
@@ -10605,16 +10724,16 @@ FtlScanSysBlk:
 	.type	FtlMapTblRecovery, %function
 FtlMapTblRecovery:
 .LFB278:
-	.loc 2 1466 0
+	.loc 2 1515 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL994:
-	.loc 2 1472 0
+.LVL1002:
+	.loc 2 1521 0
 	ldr	r3, [r0, #16]
-	.loc 2 1477 0
+	.loc 2 1526 0
 	movs	r1, #0
-	.loc 2 1466 0
+	.loc 2 1515 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
 	.cfi_offset 4, -32
@@ -10627,319 +10746,319 @@ FtlMapTblRecovery:
 	.cfi_offset 14, -4
 	sub	sp, sp, #24
 	.cfi_def_cfa_offset 56
-	.loc 2 1473 0
+	.loc 2 1522 0
 	ldrh	fp, [r0, #6]
-	.loc 2 1466 0
+	.loc 2 1515 0
 	mov	r4, r0
-	.loc 2 1483 0
+	.loc 2 1532 0
 	movs	r6, #0
-	.loc 2 1470 0
+	.loc 2 1519 0
 	ldr	r8, [r0, #24]
-.LVL995:
-	.loc 2 1472 0
+.LVL1003:
+	.loc 2 1521 0
 	str	r3, [sp, #12]
-	.loc 2 1474 0
+	.loc 2 1523 0
 	ldrh	r3, [r0, #8]
-	.loc 2 1477 0
+	.loc 2 1526 0
 	lsl	r2, fp, #2
-	.loc 2 1471 0
+	.loc 2 1520 0
 	ldr	r10, [r0, #12]
-.LVL996:
-	.loc 2 1477 0
+.LVL1004:
+	.loc 2 1526 0
 	mov	r0, r8
-.LVL997:
-	.loc 2 1478 0
-	ldr	r5, .L915
-	.loc 2 1474 0
+.LVL1005:
+	.loc 2 1527 0
+	ldr	r5, .L920
+	.loc 2 1523 0
 	str	r3, [sp, #4]
-.LVL998:
-	.loc 2 1477 0
+.LVL1006:
+	.loc 2 1526 0
 	bl	ftl_memset
-.LVL999:
-	.loc 2 1478 0
-	ldr	r3, .L915+4
-	.loc 2 1483 0
+.LVL1007:
+	.loc 2 1527 0
+	ldr	r3, .L920+4
+	.loc 2 1532 0
 	str	r6, [r4, #32]
-	.loc 2 1484 0
+	.loc 2 1533 0
 	str	r6, [r4, #28]
-	.loc 2 1478 0
+	.loc 2 1527 0
 	ldr	r2, [r3]
-	.loc 2 1510 0
+	.loc 2 1559 0
 	str	r3, [sp, #8]
-	.loc 2 1478 0
+	.loc 2 1527 0
 	str	r2, [r5, #8]
-	.loc 2 1479 0
-	ldr	r2, .L915+8
+	.loc 2 1528 0
+	ldr	r2, .L920+8
 	ldr	r7, [r2]
-	.loc 2 1481 0
+	.loc 2 1530 0
 	movw	r2, #65535
-	.loc 2 1479 0
+	.loc 2 1528 0
 	str	r7, [r5, #12]
-.LVL1000:
-	.loc 2 1481 0
+.LVL1008:
+	.loc 2 1530 0
 	strh	r2, [r4]	@ movhi
-	.loc 2 1482 0
+	.loc 2 1531 0
 	strh	r2, [r4, #2]	@ movhi
-	.loc 2 1485 0
+	.loc 2 1534 0
 	movs	r2, #1
 	str	r2, [r4, #36]
-.LVL1001:
-.L889:
-	.loc 2 1486 0 discriminator 1
+.LVL1009:
+.L894:
+	.loc 2 1535 0 discriminator 1
 	ldr	r2, [sp, #4]
 	sxth	r3, r6
-.LVL1002:
+.LVL1010:
 	cmp	r3, r2
-	bge	.L906
-	.loc 2 1488 0
+	bge	.L911
+	.loc 2 1537 0
 	ldr	r2, [sp, #4]
 	subs	r2, r2, #1
 	cmp	r3, r2
 	lsl	r2, r3, #1
-	bne	.L890
-	.loc 2 1490 0
+	bne	.L895
+	.loc 2 1539 0
 	ldrh	r0, [r10, r3, lsl #1]
 	movs	r1, #1
 	add	r5, r10, r2
 	str	r3, [sp, #4]
-.LVL1003:
+.LVL1011:
 	bl	FtlGetLastWrittenPage
-.LVL1004:
-	.loc 2 1493 0
+.LVL1012:
+	.loc 2 1542 0
 	ldr	r3, [sp, #12]
-	.loc 2 1490 0
+	.loc 2 1539 0
 	sxth	r10, r0
-.LVL1005:
-	.loc 2 1492 0
+.LVL1013:
+	.loc 2 1541 0
 	strh	r6, [r4]	@ movhi
-	.loc 2 1494 0
+	.loc 2 1543 0
 	movs	r6, #0
-	.loc 2 1491 0
+	.loc 2 1540 0
 	adds	r0, r0, #1
-	.loc 2 1493 0
+	.loc 2 1542 0
 	mov	r2, r3
 	ldr	r3, [sp, #4]
-	.loc 2 1491 0
+	.loc 2 1540 0
 	strh	r0, [r4, #2]	@ movhi
-	.loc 2 1493 0
+	.loc 2 1542 0
 	ldr	r3, [r2, r3, lsl #2]
 	str	r3, [r4, #28]
-.LVL1006:
-	.loc 2 1496 0
-	ldr	r3, .L915
-.LVL1007:
-.L891:
+.LVL1014:
+	.loc 2 1545 0
+	ldr	r3, .L920
+.LVL1015:
+.L896:
 	sxth	r2, r6
-.LVL1008:
-	.loc 2 1494 0 discriminator 1
+.LVL1016:
+	.loc 2 1543 0 discriminator 1
 	cmp	r2, r10
-	ble	.L893
-.LVL1009:
-.L906:
-	.loc 2 1547 0
+	ble	.L898
+.LVL1017:
+.L911:
+	.loc 2 1596 0
 	mov	r0, r4
 	bl	ftl_free_no_use_map_blk
-.LVL1010:
-	.loc 2 1548 0
-	ldr	r3, .L915+12
+.LVL1018:
+	.loc 2 1597 0
+	ldr	r3, .L920+12
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L895
-	.loc 2 1550 0
+	bne	.L900
+	.loc 2 1599 0
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.LVL1011:
-.L895:
-	.loc 2 1553 0
+.LVL1019:
+.L900:
+	.loc 2 1602 0
 	mov	r0, r4
 	bl	ftl_map_blk_gc
-.LVL1012:
-	.loc 2 1555 0
+.LVL1020:
+	.loc 2 1604 0
 	mov	r0, r4
 	bl	ftl_map_blk_gc
-.LVL1013:
-	.loc 2 1557 0
+.LVL1021:
+	.loc 2 1606 0
 	movs	r0, #0
 	add	sp, sp, #24
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1014:
-.L893:
+.LVL1022:
+.L898:
 	.cfi_restore_state
-	.loc 2 1496 0
+	.loc 2 1545 0
 	ldrh	r1, [r5]
-	.loc 2 1497 0
-	ldr	r0, .L915
-	.loc 2 1496 0
+	.loc 2 1546 0
+	ldr	r0, .L920
+	.loc 2 1545 0
 	str	r3, [sp, #4]
 	orr	r2, r2, r1, lsl #10
-.LVL1015:
+.LVL1023:
 	str	r2, [r3, #4]
-	.loc 2 1497 0
+	.loc 2 1546 0
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL1016:
-	.loc 2 1500 0
+.LVL1024:
+	.loc 2 1549 0
 	ldr	r3, [sp, #4]
 	ldr	r2, [r3]
 	adds	r2, r2, #1
-	beq	.L892
-	.loc 2 1502 0
+	beq	.L897
+	.loc 2 1551 0
 	ldrh	r2, [r7, #8]
 	cmp	fp, r2
-	bls	.L892
-	.loc 2 1502 0 is_stmt 0 discriminator 1
+	bls	.L897
+	.loc 2 1551 0 is_stmt 0 discriminator 1
 	ldrh	r1, [r4, #4]
 	ldrh	r0, [r7]
 	cmp	r0, r1
-	.loc 2 1504 0 is_stmt 1 discriminator 1
+	.loc 2 1553 0 is_stmt 1 discriminator 1
 	itt	eq
 	ldreq	r1, [r3, #4]
 	streq	r1, [r8, r2, lsl #2]
-.L892:
-.LVL1017:
+.L897:
+.LVL1025:
 	adds	r6, r6, #1
-.LVL1018:
-	b	.L891
-.LVL1019:
-.L890:
-	.loc 2 1510 0
+.LVL1026:
+	b	.L896
+.LVL1027:
+.L895:
+	.loc 2 1559 0
 	ldr	r1, [sp, #8]
-	.loc 2 1511 0
+	.loc 2 1560 0
 	add	r2, r10, r2
 	str	r2, [sp, #16]
-	.loc 2 1512 0
-	ldr	r0, .L915
-	.loc 2 1510 0
+	.loc 2 1561 0
+	ldr	r0, .L920
+	.loc 2 1559 0
 	ldr	r1, [r1]
 	str	r1, [r5, #8]
-	.loc 2 1511 0
+	.loc 2 1560 0
 	ldrh	r1, [r10, r3, lsl #1]
-	ldr	r3, .L915+12
-.LVL1020:
+	ldr	r3, .L920+12
+.LVL1028:
 	ldrh	r2, [r3]
 	str	r3, [sp, #20]
 	subs	r2, r2, #1
 	orr	r2, r2, r1, lsl #10
 	str	r2, [r5, #4]
-	.loc 2 1512 0
+	.loc 2 1561 0
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL1021:
-	.loc 2 1515 0
+.LVL1029:
+	.loc 2 1564 0
 	ldr	r2, [r5]
 	adds	r2, r2, #1
-	beq	.L908
-	.loc 2 1515 0 is_stmt 0 discriminator 1
+	beq	.L913
+	.loc 2 1564 0 is_stmt 0 discriminator 1
 	ldrh	r1, [r7]
 	ldrh	r2, [r4, #4]
 	ldr	r3, [sp, #20]
 	cmp	r1, r2
-	bne	.L908
-	.loc 2 1515 0 discriminator 2
+	bne	.L913
+	.loc 2 1564 0 discriminator 2
 	ldrh	r1, [r7, #8]
 	movw	r2, #64245
 	cmp	r1, r2
-	beq	.L897
-.L908:
+	beq	.L902
+.L913:
 	movs	r3, #0
-.L898:
-.LVL1022:
-	.loc 2 1530 0 is_stmt 1 discriminator 1
-	ldr	r1, .L915+12
+.L903:
+.LVL1030:
+	.loc 2 1579 0 is_stmt 1 discriminator 1
+	ldr	r1, .L920+12
 	sxth	r2, r3
 	ldrh	r1, [r1]
 	cmp	r2, r1
-	bge	.L904
+	bge	.L909
 	str	r3, [sp, #20]
-	.loc 2 1532 0
+	.loc 2 1581 0
 	ldr	r3, [sp, #16]
-.LVL1023:
-	.loc 2 1533 0
-	ldr	r0, .L915
-	.loc 2 1532 0
+.LVL1031:
+	.loc 2 1582 0
+	ldr	r0, .L920
+	.loc 2 1581 0
 	ldrh	r1, [r3]
 	orr	r2, r2, r1, lsl #10
-.LVL1024:
+.LVL1032:
 	str	r2, [r5, #4]
-	.loc 2 1533 0
+	.loc 2 1582 0
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL1025:
-	.loc 2 1536 0
+.LVL1033:
+	.loc 2 1585 0
 	ldr	r2, [r5]
 	ldr	r3, [sp, #20]
 	adds	r2, r2, #1
-	beq	.L902
-	.loc 2 1538 0
+	beq	.L907
+	.loc 2 1587 0
 	ldrh	r2, [r7, #8]
 	cmp	fp, r2
-	bls	.L902
-	.loc 2 1538 0 is_stmt 0 discriminator 1
+	bls	.L907
+	.loc 2 1587 0 is_stmt 0 discriminator 1
 	ldrh	r1, [r4, #4]
 	ldrh	r0, [r7]
 	cmp	r0, r1
-	.loc 2 1540 0 is_stmt 1 discriminator 1
+	.loc 2 1589 0 is_stmt 1 discriminator 1
 	itt	eq
 	ldreq	r1, [r5, #4]
 	streq	r1, [r8, r2, lsl #2]
-.L902:
-.LVL1026:
+.L907:
+.LVL1034:
 	adds	r3, r3, #1
-.LVL1027:
-	b	.L898
-.L897:
-	.loc 2 1518 0 discriminator 1
+.LVL1035:
+	b	.L903
+.L902:
+	.loc 2 1567 0 discriminator 1
 	ldrh	r2, [r3]
-	.loc 2 1520 0 discriminator 1
+	.loc 2 1569 0 discriminator 1
 	movs	r1, #0
 	ldr	r3, [sp, #8]
-	.loc 2 1518 0 discriminator 1
+	.loc 2 1567 0 discriminator 1
 	subs	r2, r2, #1
-	.loc 2 1520 0 discriminator 1
+	.loc 2 1569 0 discriminator 1
 	ldr	ip, [r3]
-.L899:
+.L904:
 	sxth	r3, r1
-.LVL1028:
-	.loc 2 1518 0 discriminator 1
+.LVL1036:
+	.loc 2 1567 0 discriminator 1
 	cmp	r3, r2
-	blt	.L901
-.L904:
-.LVL1029:
+	blt	.L906
+.L909:
+.LVL1037:
 	adds	r6, r6, #1
-.LVL1030:
-	b	.L889
-.LVL1031:
-.L901:
-	.loc 2 1520 0
+.LVL1038:
+	b	.L894
+.LVL1039:
+.L906:
+	.loc 2 1569 0
 	lsls	r0, r3, #3
 	ldr	r3, [ip, r3, lsl #3]
-.LVL1032:
+.LVL1040:
 	adds	r1, r1, #1
-.LVL1033:
-	.loc 2 1521 0
+.LVL1041:
+	.loc 2 1570 0
 	uxth	lr, r3
 	cmp	fp, lr
-	.loc 2 1523 0
+	.loc 2 1572 0
 	itttt	hi
 	addhi	r0, r0, ip
 	movhi	r3, lr
-.LVL1034:
+.LVL1042:
 	ldrhi	r0, [r0, #4]
 	strhi	r0, [r8, r3, lsl #2]
-	b	.L899
-.L916:
+	b	.L904
+.L921:
 	.align	2
-.L915:
+.L920:
+	.word	.LANCHOR106
+	.word	.LANCHOR107
 	.word	.LANCHOR108
-	.word	.LANCHOR39
-	.word	.LANCHOR109
 	.word	.LANCHOR20
 	.cfi_endproc
 .LFE278:
@@ -10954,7 +11073,7 @@ FtlMapTblRecovery:
 	.type	FtlLoadVonderInfo, %function
 FtlLoadVonderInfo:
 .LFB279:
-	.loc 2 1560 0
+	.loc 2 1609 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
@@ -10962,47 +11081,47 @@ FtlLoadVonderInfo:
 	.cfi_def_cfa_offset 8
 	.cfi_offset 3, -8
 	.cfi_offset 14, -4
-	.loc 2 1561 0
-	ldr	r3, .L918
-	ldr	r0, .L918+4
+	.loc 2 1610 0
+	ldr	r3, .L923
+	ldr	r0, .L923+4
 	ldrh	r3, [r3]
 	strh	r3, [r0, #10]	@ movhi
-	.loc 2 1562 0
+	.loc 2 1611 0
 	movw	r3, #61574
 	strh	r3, [r0, #4]	@ movhi
-	.loc 2 1563 0
-	ldr	r3, .L918+8
+	.loc 2 1612 0
+	ldr	r3, .L923+8
 	ldrh	r3, [r3]
 	strh	r3, [r0, #8]	@ movhi
-	.loc 2 1564 0
-	ldr	r3, .L918+12
+	.loc 2 1613 0
+	ldr	r3, .L923+12
 	ldrh	r3, [r3]
 	strh	r3, [r0, #6]	@ movhi
-	.loc 2 1565 0
-	ldr	r3, .L918+16
+	.loc 2 1614 0
+	ldr	r3, .L923+16
 	ldr	r3, [r3]
 	str	r3, [r0, #12]
-	.loc 2 1566 0
-	ldr	r3, .L918+20
+	.loc 2 1615 0
+	ldr	r3, .L923+20
 	ldr	r3, [r3]
 	str	r3, [r0, #16]
-	.loc 2 1567 0
-	ldr	r3, .L918+24
+	.loc 2 1616 0
+	ldr	r3, .L923+24
 	ldr	r3, [r3]
 	str	r3, [r0, #20]
-	.loc 2 1568 0
-	ldr	r3, .L918+28
+	.loc 2 1617 0
+	ldr	r3, .L923+28
 	ldr	r3, [r3]
 	str	r3, [r0, #24]
-	.loc 2 1570 0
+	.loc 2 1619 0
 	bl	FtlMapTblRecovery
-.LVL1035:
-	.loc 2 1573 0
+.LVL1043:
+	.loc 2 1622 0
 	movs	r0, #0
 	pop	{r3, pc}
-.L919:
+.L924:
 	.align	2
-.L918:
+.L923:
 	.word	.LANCHOR27
 	.word	.LANCHOR149
 	.word	.LANCHOR35
@@ -11024,7 +11143,7 @@ FtlLoadVonderInfo:
 	.type	FtlL2PDataInit, %function
 FtlL2PDataInit:
 .LFB280:
-	.loc 2 1576 0
+	.loc 2 1625 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
@@ -11036,110 +11155,110 @@ FtlL2PDataInit:
 	.cfi_offset 7, -12
 	.cfi_offset 8, -8
 	.cfi_offset 14, -4
-	.loc 2 1578 0
+	.loc 2 1627 0
 	movs	r1, #0
-	ldr	r5, .L923
-	ldr	r4, .L923+4
+	ldr	r5, .L928
+	ldr	r4, .L928+4
 	ldr	r2, [r5]
-	.loc 2 1579 0
-	ldr	r7, .L923+8
-	ldr	r6, .L923+12
-	.loc 2 1578 0
+	.loc 2 1628 0
+	ldr	r7, .L928+8
+	ldr	r6, .L928+12
+	.loc 2 1627 0
 	ldr	r0, [r4]
 	lsls	r2, r2, #1
-	.loc 2 1579 0
-	ldr	r8, .L923+44
-	.loc 2 1578 0
+	.loc 2 1628 0
+	ldr	r8, .L928+44
+	.loc 2 1627 0
 	bl	ftl_memset
-.LVL1036:
-	.loc 2 1579 0
+.LVL1044:
+	.loc 2 1628 0
 	ldrh	r3, [r7]
 	movs	r1, #255
 	ldrh	r2, [r6]
 	ldr	r0, [r8]
 	muls	r2, r3, r2
 	bl	ftl_memset
-.LVL1037:
-	ldr	r3, .L923+16
+.LVL1045:
+	ldr	r3, .L928+16
 	movw	r0, #65535
 	ldrh	r1, [r6]
-	.loc 2 1584 0
+	.loc 2 1633 0
 	ldr	ip, [r8]
 	ldr	r2, [r3]
 	movs	r3, #12
 	ldrh	r7, [r7]
 	mla	r3, r1, r3, r3
 	adds	r1, r2, r3
-	.loc 2 1580 0
+	.loc 2 1629 0
 	movs	r3, #0
-	.loc 2 1582 0
+	.loc 2 1631 0
 	mov	lr, r3
-.LVL1038:
-.L921:
+.LVL1046:
+.L926:
 	adds	r2, r2, #12
 	adds	r6, r3, r7
-	.loc 2 1580 0 discriminator 1
+	.loc 2 1629 0 discriminator 1
 	cmp	r2, r1
-	bne	.L922
-	.loc 2 1586 0
-	ldr	r3, .L923+20
-	.loc 2 1588 0
+	bne	.L927
+	.loc 2 1635 0
+	ldr	r3, .L928+20
+	.loc 2 1637 0
 	ldr	r2, [r5]
-	.loc 2 1586 0
+	.loc 2 1635 0
 	strh	r0, [r3, #2]	@ movhi
-	.loc 2 1588 0
+	.loc 2 1637 0
 	strh	r2, [r3, #10]	@ movhi
-	.loc 2 1589 0
+	.loc 2 1638 0
 	movw	r2, #61634
 	strh	r2, [r3, #4]	@ movhi
-	.loc 2 1590 0
-	ldr	r2, .L923+24
-	.loc 2 1587 0
+	.loc 2 1639 0
+	ldr	r2, .L928+24
+	.loc 2 1636 0
 	strh	r0, [r3]	@ movhi
-	.loc 2 1590 0
+	.loc 2 1639 0
 	ldrh	r2, [r2]
 	strh	r2, [r3, #8]	@ movhi
-	.loc 2 1591 0
-	ldr	r2, .L923+28
+	.loc 2 1640 0
+	ldr	r2, .L928+28
 	ldrh	r2, [r2]
 	strh	r2, [r3, #6]	@ movhi
-	.loc 2 1592 0
-	ldr	r2, .L923+32
+	.loc 2 1641 0
+	ldr	r2, .L928+32
 	ldr	r2, [r2]
 	str	r2, [r3, #12]
-	.loc 2 1593 0
-	ldr	r2, .L923+36
+	.loc 2 1642 0
+	ldr	r2, .L928+36
 	ldr	r2, [r2]
 	str	r2, [r3, #16]
-	.loc 2 1594 0
+	.loc 2 1643 0
 	ldr	r2, [r4]
 	str	r2, [r3, #20]
-	.loc 2 1595 0
-	ldr	r2, .L923+40
+	.loc 2 1644 0
+	ldr	r2, .L928+40
 	ldr	r2, [r2]
 	str	r2, [r3, #24]
 	pop	{r4, r5, r6, r7, r8, pc}
-.L922:
-	.loc 2 1584 0 discriminator 3
+.L927:
+	.loc 2 1633 0 discriminator 3
 	bic	r3, r3, #3
-	.loc 2 1582 0 discriminator 3
+	.loc 2 1631 0 discriminator 3
 	str	lr, [r2, #-8]
-	.loc 2 1584 0 discriminator 3
+	.loc 2 1633 0 discriminator 3
 	add	r3, r3, ip
-	.loc 2 1583 0 discriminator 3
+	.loc 2 1632 0 discriminator 3
 	strh	r0, [r2, #-12]	@ movhi
-	.loc 2 1584 0 discriminator 3
+	.loc 2 1633 0 discriminator 3
 	str	r3, [r2, #-4]
 	mov	r3, r6
-	b	.L921
-.L924:
+	b	.L926
+.L929:
 	.align	2
-.L923:
+.L928:
 	.word	.LANCHOR30
 	.word	.LANCHOR130
 	.word	.LANCHOR23
 	.word	.LANCHOR33
-	.word	.LANCHOR56
+	.word	.LANCHOR55
 	.word	.LANCHOR144
 	.word	.LANCHOR147
 	.word	.LANCHOR32
@@ -11160,7 +11279,7 @@ FtlL2PDataInit:
 	.type	FtlLoadMapInfo, %function
 FtlLoadMapInfo:
 .LFB281:
-	.loc 2 1599 0
+	.loc 2 1648 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
@@ -11168,19 +11287,19 @@ FtlLoadMapInfo:
 	.cfi_def_cfa_offset 8
 	.cfi_offset 3, -8
 	.cfi_offset 14, -4
-	.loc 2 1600 0
+	.loc 2 1649 0
 	bl	FtlL2PDataInit
-.LVL1039:
-	.loc 2 1602 0
-	ldr	r0, .L926
+.LVL1047:
+	.loc 2 1651 0
+	ldr	r0, .L931
 	bl	FtlMapTblRecovery
-.LVL1040:
-	.loc 2 1605 0
+.LVL1048:
+	.loc 2 1654 0
 	movs	r0, #0
 	pop	{r3, pc}
-.L927:
+.L932:
 	.align	2
-.L926:
+.L931:
 	.word	.LANCHOR144
 	.cfi_endproc
 .LFE281:
@@ -11195,7 +11314,7 @@ FtlLoadMapInfo:
 	.type	FtlVariablesInit, %function
 FtlVariablesInit:
 .LFB210:
-	.loc 3 493 0
+	.loc 3 494 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
@@ -11205,95 +11324,91 @@ FtlVariablesInit:
 	.cfi_offset 4, -12
 	.cfi_offset 5, -8
 	.cfi_offset 14, -4
-	.loc 3 496 0
-	movs	r4, #0
-	ldr	r3, .L929
 	.loc 3 497 0
 	movw	r2, #65535
+	ldr	r3, .L934
+	.loc 3 498 0
+	movs	r4, #0
 	.loc 3 502 0
 	mov	r1, r4
 	.loc 3 503 0
-	ldr	r5, .L929+4
-	.loc 3 496 0
-	str	r4, [r3]
+	ldr	r5, .L934+4
 	.loc 3 497 0
-	ldr	r3, .L929+8
 	strh	r2, [r3]	@ movhi
 	.loc 3 500 0
 	mov	r2, #-1
 	.loc 3 498 0
-	ldr	r3, .L929+12
+	ldr	r3, .L934+8
 	str	r4, [r3]
 	.loc 3 499 0
-	ldr	r3, .L929+16
+	ldr	r3, .L934+12
 	str	r4, [r3]
 	.loc 3 500 0
-	ldr	r3, .L929+20
+	ldr	r3, .L934+16
 	str	r2, [r3]
 	.loc 3 501 0
-	ldr	r3, .L929+24
+	ldr	r3, .L934+20
 	strh	r4, [r3]	@ movhi
 	.loc 3 502 0
-	ldr	r3, .L929+28
+	ldr	r3, .L934+24
 	ldrh	r2, [r3]
-	ldr	r3, .L929+32
+	ldr	r3, .L934+28
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL1041:
+.LVL1049:
 	.loc 3 503 0
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L929+36
+	ldr	r3, .L934+32
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL1042:
+.LVL1050:
 	.loc 3 504 0
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L929+40
+	ldr	r3, .L934+36
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL1043:
+.LVL1051:
 	.loc 3 505 0
 	mov	r1, r4
 	movs	r2, #48
-	ldr	r0, .L929+44
+	ldr	r0, .L934+40
 	bl	ftl_memset
-.LVL1044:
+.LVL1052:
 	.loc 3 506 0
 	mov	r2, #512
 	mov	r1, r4
-	ldr	r0, .L929+48
+	ldr	r0, .L934+44
 	bl	ftl_memset
-.LVL1045:
+.LVL1053:
 	.loc 3 507 0
 	bl	FtlGcBufInit
-.LVL1046:
+.LVL1054:
 	.loc 3 508 0
 	bl	FtlL2PDataInit
-.LVL1047:
+.LVL1055:
 	.loc 3 510 0
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L930:
+.L935:
 	.align	2
-.L929:
+.L934:
 	.word	.LANCHOR150
 	.word	.LANCHOR6
 	.word	.LANCHOR151
 	.word	.LANCHOR152
 	.word	.LANCHOR153
-	.word	.LANCHOR154
 	.word	.LANCHOR35
 	.word	.LANCHOR27
 	.word	.LANCHOR36
-	.word	.LANCHOR40
+	.word	.LANCHOR43
 	.word	.LANCHOR126
-	.word	.LANCHOR79
-	.word	.LANCHOR83
+	.word	.LANCHOR39
+	.word	.LANCHOR81
 	.cfi_endproc
 .LFE210:
 	.size	FtlVariablesInit, .-FtlVariablesInit
@@ -11307,7 +11422,7 @@ FtlVariablesInit:
 	.type	SupperBlkListInit, %function
 SupperBlkListInit:
 .LFB288:
-	.loc 2 2067 0
+	.loc 2 2116 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
@@ -11321,200 +11436,200 @@ SupperBlkListInit:
 	.cfi_offset 10, -12
 	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	.loc 2 2071 0
+	.loc 2 2120 0
 	movs	r2, #6
-	ldr	r3, .L942
+	ldr	r3, .L947
 	movs	r1, #0
-	.loc 2 2072 0
+	.loc 2 2121 0
 	movs	r4, #0
-	.loc 2 2071 0
-	ldr	r5, .L942+4
-	.loc 2 2077 0
+	.loc 2 2120 0
+	ldr	r5, .L947+4
+	.loc 2 2126 0
 	mov	r8, r4
-	.loc 2 2071 0
+	.loc 2 2120 0
 	ldrh	r3, [r3]
-	.loc 2 2077 0
+	.loc 2 2126 0
 	mov	r6, r4
-	.loc 2 2071 0
+	.loc 2 2120 0
 	ldr	r0, [r5]
 	mov	r10, r5
 	muls	r2, r3, r2
 	bl	ftl_memset
-.LVL1048:
-	.loc 2 2072 0
-	ldr	r3, .L942+8
-	.loc 2 2075 0
-	ldr	r2, .L942+12
-	.loc 2 2072 0
+.LVL1056:
+	.loc 2 2121 0
+	ldr	r3, .L947+8
+	.loc 2 2124 0
+	ldr	r2, .L947+12
+	.loc 2 2121 0
 	str	r4, [r3]
-	.loc 2 2073 0
-	ldr	r3, .L942+16
-	.loc 2 2075 0
+	.loc 2 2122 0
+	ldr	r3, .L947+16
+	.loc 2 2124 0
 	strh	r4, [r2]	@ movhi
 	str	r2, [sp, #4]
-	.loc 2 2073 0
+	.loc 2 2122 0
 	str	r4, [r3]
-	.loc 2 2074 0
-	ldr	r3, .L942+20
+	.loc 2 2123 0
+	ldr	r3, .L947+20
 	str	r4, [r3]
-	.loc 2 2076 0
-	ldr	r3, .L942+24
+	.loc 2 2125 0
+	ldr	r3, .L947+24
 	mov	fp, r3
 	strh	r4, [r3]	@ movhi
-.LVL1049:
-.L932:
-	.loc 2 2079 0 discriminator 1
-	ldr	r3, .L942+28
+.LVL1057:
+.L937:
+	.loc 2 2128 0 discriminator 1
+	ldr	r3, .L947+28
 	uxth	r7, r4
-.LVL1050:
+.LVL1058:
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	bcs	.L938
-	.loc 2 2081 0
-	ldr	r3, .L942+32
+	bcs	.L943
+	.loc 2 2130 0
+	ldr	r3, .L947+32
 	ldrh	r2, [r3]
-	.loc 2 2084 0
-	ldr	r3, .L942+36
+	.loc 2 2133 0
+	ldr	r3, .L947+36
 	ldrh	r3, [r3]
 	str	r3, [sp]
 	movs	r3, #0
 	mov	r5, r3
-	b	.L939
-.LVL1051:
-.L934:
+	b	.L944
+.LVL1059:
+.L939:
 	str	r2, [sp, #12]
-	.loc 2 2082 0
+	.loc 2 2131 0
 	mov	r1, r7
-	ldr	r2, .L942+40
+	ldr	r2, .L947+40
 	str	r3, [sp, #8]
 	ldrb	r0, [r2, r3]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL1052:
-	.loc 2 2083 0
+.LVL1060:
+	.loc 2 2132 0
 	bl	FtlBbmIsBadBlock
-.LVL1053:
+.LVL1061:
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #12]
-	cbnz	r0, .L933
-	.loc 2 2084 0
+	cbnz	r0, .L938
+	.loc 2 2133 0
 	ldr	r1, [sp]
 	add	r5, r5, r1
-.LVL1054:
+.LVL1062:
 	uxth	r5, r5
-.LVL1055:
-.L933:
+.LVL1063:
+.L938:
 	adds	r3, r3, #1
-.LVL1056:
-.L939:
-	.loc 2 2081 0 discriminator 1
+.LVL1064:
+.L944:
+	.loc 2 2130 0 discriminator 1
 	uxth	r1, r3
 	cmp	r2, r1
-	bhi	.L934
-	.loc 2 2086 0
-	cbz	r5, .L941
-	.loc 2 2087 0
+	bhi	.L939
+	.loc 2 2135 0
+	cbz	r5, .L946
+	.loc 2 2136 0
 	mov	r1, r5
 	mov	r0, #32768
 	bl	__aeabi_idiv
-.LVL1057:
-.L935:
-	.loc 2 2088 0
+.LVL1065:
+.L940:
+	.loc 2 2137 0
 	ldr	r1, [r10]
 	uxth	r2, r4
 	movs	r3, #6
 	mla	r3, r3, r2, r1
 	strh	r0, [r3, #4]	@ movhi
-	.loc 2 2090 0
-	ldr	r3, .L942+44
+	.loc 2 2139 0
+	ldr	r3, .L947+44
 	ldrh	r3, [r3]
 	cmp	r3, r7
-	beq	.L936
-	.loc 2 2091 0 discriminator 1
-	ldr	r3, .L942+48
-	.loc 2 2090 0 discriminator 1
+	beq	.L941
+	.loc 2 2140 0 discriminator 1
+	ldr	r3, .L947+48
+	.loc 2 2139 0 discriminator 1
 	ldrh	r3, [r3]
 	cmp	r3, r7
-	beq	.L936
-	.loc 2 2092 0
-	ldr	r3, .L942+52
-	.loc 2 2091 0
+	beq	.L941
+	.loc 2 2141 0
+	ldr	r3, .L947+52
+	.loc 2 2140 0
 	ldrh	r3, [r3]
 	cmp	r3, r7
-	beq	.L936
-	.loc 2 2094 0
-	ldr	r3, .L942+56
+	beq	.L941
+	.loc 2 2143 0
+	ldr	r3, .L947+56
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r2, lsl #1]
-	cbnz	r3, .L937
-	.loc 2 2095 0
+	cbnz	r3, .L942
+	.loc 2 2144 0
 	add	r8, r8, #1
-.LVL1058:
-	.loc 2 2096 0
+.LVL1066:
+	.loc 2 2145 0
 	mov	r0, r7
-.LVL1059:
-	.loc 2 2095 0
+.LVL1067:
+	.loc 2 2144 0
 	uxth	r8, r8
-.LVL1060:
-	.loc 2 2096 0
+.LVL1068:
+	.loc 2 2145 0
 	bl	INSERT_FREE_LIST
-.LVL1061:
-.L936:
-	adds	r4, r4, #1
-.LVL1062:
-	b	.L932
-.LVL1063:
+.LVL1069:
 .L941:
+	adds	r4, r4, #1
+.LVL1070:
+	b	.L937
+.LVL1071:
+.L946:
 	mov	r0, r5
-	b	.L935
-.LVL1064:
-.L937:
-	.loc 2 2098 0
+	b	.L940
+.LVL1072:
+.L942:
+	.loc 2 2147 0
 	adds	r6, r6, #1
-.LVL1065:
-	.loc 2 2099 0
+.LVL1073:
+	.loc 2 2148 0
 	mov	r0, r7
-.LVL1066:
-	.loc 2 2098 0
+.LVL1074:
+	.loc 2 2147 0
 	uxth	r6, r6
-.LVL1067:
-	.loc 2 2099 0
+.LVL1075:
+	.loc 2 2148 0
 	bl	INSERT_DATA_LIST
-.LVL1068:
-	b	.L936
-.L938:
-	.loc 2 2103 0
+.LVL1076:
+	b	.L941
+.L943:
+	.loc 2 2152 0
 	ldr	r2, [sp, #4]
-	.loc 2 2104 0
+	.loc 2 2153 0
 	strh	r8, [fp]	@ movhi
-	.loc 2 2103 0
+	.loc 2 2152 0
 	strh	r6, [r2]	@ movhi
-	.loc 2 2105 0
+	.loc 2 2154 0
 	add	r6, r6, r8
-.LVL1069:
+.LVL1077:
 	cmp	r6, r3
-	ble	.L940
-	.loc 2 2105 0 is_stmt 0 discriminator 1
-	movw	r2, #2105
-	ldr	r1, .L942+60
-	ldr	r0, .L942+64
+	ble	.L945
+	.loc 2 2154 0 is_stmt 0 discriminator 1
+	movw	r2, #2154
+	ldr	r1, .L947+60
+	ldr	r0, .L947+64
 	bl	printf
-.LVL1070:
-.L940:
-	.loc 2 2107 0 is_stmt 1
+.LVL1078:
+.L945:
+	.loc 2 2156 0 is_stmt 1
 	movs	r0, #0
 	add	sp, sp, #16
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1071:
-.L943:
+.LVL1079:
+.L948:
 	.align	2
-.L942:
+.L947:
 	.word	.LANCHOR6
-	.word	.LANCHOR41
+	.word	.LANCHOR40
 	.word	.LANCHOR47
 	.word	.LANCHOR45
-	.word	.LANCHOR42
+	.word	.LANCHOR41
 	.word	.LANCHOR44
 	.word	.LANCHOR48
 	.word	.LANCHOR5
@@ -11524,8 +11639,8 @@ SupperBlkListInit:
 	.word	.LANCHOR51
 	.word	.LANCHOR52
 	.word	.LANCHOR53
-	.word	.LANCHOR43
-	.word	.LANCHOR155
+	.word	.LANCHOR42
+	.word	.LANCHOR154
 	.word	.LC1
 	.cfi_endproc
 .LFE288:
@@ -11540,11 +11655,11 @@ SupperBlkListInit:
 	.type	ftl_check_vpc, %function
 ftl_check_vpc:
 .LFB293:
-	.loc 2 2223 0
+	.loc 2 2273 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1072:
+.LVL1080:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 40
 	.cfi_offset 4, -32
@@ -11555,191 +11670,191 @@ ftl_check_vpc:
 	.cfi_offset 10, -12
 	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	.loc 2 2232 0
+	.loc 2 2282 0
 	movs	r4, #0
-	ldr	r6, .L968
-	.loc 2 2238 0
-	ldr	r5, .L968+4
-	.loc 2 2229 0
-	ldr	r1, .L968+8
-	ldr	r0, .L968+12
+	ldr	r6, .L973
+	.loc 2 2288 0
+	ldr	r5, .L973+4
+	.loc 2 2279 0
+	ldr	r1, .L973+8
+	ldr	r0, .L973+12
 	bl	printf
-.LVL1073:
-	.loc 2 2231 0
+.LVL1081:
+	.loc 2 2281 0
 	mov	r2, #8192
 	movs	r1, #0
-	ldr	r0, .L968+4
+	ldr	r0, .L973+4
 	bl	ftl_memset
-.LVL1074:
-.L945:
-	.loc 2 2232 0 discriminator 1
+.LVL1082:
+.L950:
+	.loc 2 2282 0 discriminator 1
 	ldr	r3, [r6]
 	cmp	r4, r3
-	bcc	.L947
-	.loc 2 2243 0 discriminator 1
-	ldr	r10, .L968+48
+	bcc	.L952
+	.loc 2 2293 0 discriminator 1
+	ldr	r10, .L973+48
 	movs	r4, #0
-.LVL1075:
-	.loc 2 2245 0 discriminator 1
-	ldr	r7, .L968+16
+.LVL1083:
+	.loc 2 2295 0 discriminator 1
+	ldr	r7, .L973+16
 	mov	r6, r4
-.LVL1076:
-.L948:
-	.loc 2 2243 0 discriminator 1
+.LVL1084:
+.L953:
+	.loc 2 2293 0 discriminator 1
 	ldrh	r2, [r10]
 	uxth	r3, r4
 	cmp	r2, r3
-	bhi	.L950
-	.loc 2 2255 0
-	ldr	r3, .L968+20
+	bhi	.L955
+	.loc 2 2305 0
+	ldr	r3, .L973+20
 	ldr	r4, [r3]
-.LVL1077:
-	cbz	r4, .L951
-.LBB242:
-	.loc 2 2257 0
-	ldr	r3, .L968+24
-	.loc 2 2259 0
+.LVL1085:
+	cbz	r4, .L956
+.LBB275:
+	.loc 2 2307 0
+	ldr	r3, .L973+24
+	.loc 2 2309 0
 	mov	r8, #0
-	.loc 2 2258 0
-	ldr	r5, .L968+28
-	.loc 2 2261 0
-	ldr	r10, .L968+16
-	.loc 2 2257 0
+	.loc 2 2308 0
+	ldr	r5, .L973+28
+	.loc 2 2311 0
+	ldr	r10, .L973+16
+	.loc 2 2307 0
 	ldrh	r7, [r3]
-.LVL1078:
-	.loc 2 2258 0
+.LVL1086:
+	.loc 2 2308 0
 	ldr	r3, [r5]
-	.loc 2 2263 0
-	ldr	fp, .L968+4
-	.loc 2 2258 0
+	.loc 2 2313 0
+	ldr	fp, .L973+4
+	.loc 2 2308 0
 	subs	r4, r4, r3
-	ldr	r3, .L968+32
+	ldr	r3, .L973+32
 	asrs	r4, r4, #1
 	muls	r4, r3, r4
 	uxth	r4, r4
-.LVL1079:
-.L952:
-	.loc 2 2259 0 discriminator 1
+.LVL1087:
+.L957:
+	.loc 2 2309 0 discriminator 1
 	uxth	r3, r8
 	cmp	r7, r3
-	bls	.L951
-	.loc 2 2261 0
+	bls	.L956
+	.loc 2 2311 0
 	ldr	r3, [r10]
 	ldrh	r2, [r3, r4, lsl #1]
-	cbz	r2, .L953
-	.loc 2 2264 0
+	cbz	r2, .L958
+	.loc 2 2314 0
 	movs	r6, #1
-	.loc 2 2263 0
+	.loc 2 2313 0
 	ldrh	r3, [fp, r4, lsl #1]
 	mov	r1, r4
-	ldr	r0, .L968+36
+	ldr	r0, .L973+36
 	bl	printf
-.LVL1080:
-.L953:
-	.loc 2 2266 0
+.LVL1088:
+.L958:
+	.loc 2 2316 0
 	movs	r3, #6
 	ldr	r2, [r5]
 	muls	r4, r3, r4
-.LVL1081:
+.LVL1089:
 	movw	r3, #65535
 	add	r8, r8, #1
-.LVL1082:
+.LVL1090:
 	ldrh	r4, [r2, r4]
 	cmp	r4, r3
-	bne	.L952
-.LVL1083:
-.L951:
-.LBE242:
-	.loc 2 2271 0
-	cbz	r6, .L944
-.LVL1084:
-	.loc 2 2271 0 is_stmt 0 discriminator 1
-	movw	r2, #2271
-	ldr	r1, .L968+8
-	ldr	r0, .L968+40
+	bne	.L957
+.LVL1091:
+.L956:
+.LBE275:
+	.loc 2 2321 0
+	cbz	r6, .L949
+.LVL1092:
+	.loc 2 2321 0 is_stmt 0 discriminator 1
+	movw	r2, #2321
+	ldr	r1, .L973+8
+	ldr	r0, .L973+40
 	bl	printf
-.LVL1085:
-.L944:
-	.loc 2 2272 0 is_stmt 1
+.LVL1093:
+.L949:
+	.loc 2 2322 0 is_stmt 1
 	add	sp, sp, #8
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1086:
-.L947:
+.LVL1094:
+.L952:
 	.cfi_restore_state
-	.loc 2 2234 0
+	.loc 2 2284 0
 	movs	r2, #0
 	add	r1, sp, #4
 	mov	r0, r4
 	bl	log2phys
-.LVL1087:
-	.loc 2 2235 0
+.LVL1095:
+	.loc 2 2285 0
 	ldr	r0, [sp, #4]
 	adds	r3, r0, #1
-	beq	.L946
-	.loc 2 2237 0
+	beq	.L951
+	.loc 2 2287 0
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1088:
-	.loc 2 2238 0
+.LVL1096:
+	.loc 2 2288 0
 	ldrh	r3, [r5, r0, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r5, r0, lsl #1]	@ movhi
-.LVL1089:
-.L946:
-	.loc 2 2232 0 discriminator 2
+.LVL1097:
+.L951:
+	.loc 2 2282 0 discriminator 2
 	adds	r4, r4, #1
-.LVL1090:
-	b	.L945
-.LVL1091:
-.L950:
-	.loc 2 2245 0
+.LVL1098:
+	b	.L950
+.LVL1099:
+.L955:
+	.loc 2 2295 0
 	ldr	r3, [r7]
 	uxth	r5, r4
-	ldr	r8, .L968+4
+	ldr	r8, .L973+4
 	ldrh	r2, [r3, r5, lsl #1]
 	ldrh	r3, [r8, r5, lsl #1]
 	cmp	r2, r3
-	beq	.L949
-	.loc 2 2247 0
+	beq	.L954
+	.loc 2 2297 0
 	mov	r1, r5
-	ldr	r0, .L968+44
+	ldr	r0, .L973+44
 	bl	printf
-.LVL1092:
-	.loc 2 2248 0
+.LVL1100:
+	.loc 2 2298 0
 	ldr	r3, [r7]
 	movw	r2, #65535
 	ldrh	r3, [r3, r5, lsl #1]
 	cmp	r3, r2
-	beq	.L949
-	.loc 2 2248 0 is_stmt 0 discriminator 1
+	beq	.L954
+	.loc 2 2298 0 is_stmt 0 discriminator 1
 	ldrh	r2, [r8, r5, lsl #1]
-	.loc 2 2250 0 is_stmt 1 discriminator 1
+	.loc 2 2300 0 is_stmt 1 discriminator 1
 	cmp	r2, r3
 	it	hi
 	movhi	r6, #1
-.LVL1093:
-.L949:
+.LVL1101:
+.L954:
 	adds	r4, r4, #1
-.LVL1094:
-	b	.L948
-.L969:
+.LVL1102:
+	b	.L953
+.L974:
 	.align	2
-.L968:
-	.word	.LANCHOR62
+.L973:
+	.word	.LANCHOR61
 	.word	check_vpc_table
-	.word	.LANCHOR156
-	.word	.LC91
-	.word	.LANCHOR43
+	.word	.LANCHOR155
+	.word	.LC94
+	.word	.LANCHOR42
 	.word	.LANCHOR47
 	.word	.LANCHOR48
-	.word	.LANCHOR41
+	.word	.LANCHOR40
 	.word	-1431655765
-	.word	.LC93
+	.word	.LC96
 	.word	.LC1
-	.word	.LC92
+	.word	.LC95
 	.word	.LANCHOR5
 	.cfi_endproc
 .LFE293:
@@ -11759,7 +11874,7 @@ FtlGcPageVarInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	.loc 5 203 0
-	ldr	r2, .L971
+	ldr	r2, .L976
 	movs	r3, #0
 	.loc 5 202 0
 	push	{r4, lr}
@@ -11768,28 +11883,28 @@ FtlGcPageVarInit:
 	.cfi_offset 14, -4
 	.loc 5 205 0
 	movs	r1, #255
-	ldr	r4, .L971+4
+	ldr	r4, .L976+4
 	.loc 5 203 0
 	strh	r3, [r2]	@ movhi
 	.loc 5 204 0
-	ldr	r2, .L971+8
+	ldr	r2, .L976+8
 	strh	r3, [r2]	@ movhi
 	.loc 5 205 0
 	ldrh	r2, [r4]
-	ldr	r3, .L971+12
+	ldr	r3, .L976+12
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL1095:
+.LVL1103:
 	.loc 5 206 0
 	ldrh	r3, [r4]
 	movs	r2, #12
 	movs	r1, #255
 	muls	r2, r3, r2
-	ldr	r3, .L971+16
+	ldr	r3, .L976+16
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL1096:
+.LVL1104:
 	.loc 5 208 0
 	pop	{r4, lr}
 	.cfi_restore 14
@@ -11797,15 +11912,15 @@ FtlGcPageVarInit:
 	.cfi_def_cfa_offset 0
 	.loc 5 207 0
 	b	FtlGcBufInit
-.LVL1097:
-.L972:
+.LVL1105:
+.L977:
 	.align	2
-.L971:
-	.word	.LANCHOR98
+.L976:
+	.word	.LANCHOR96
 	.word	.LANCHOR21
-	.word	.LANCHOR99
 	.word	.LANCHOR97
-	.word	.LANCHOR100
+	.word	.LANCHOR95
+	.word	.LANCHOR98
 	.cfi_endproc
 .LFE312:
 	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
@@ -11823,9 +11938,9 @@ FtlGcScanTempBlk:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1098:
+.LVL1106:
 	.loc 5 220 0
-	ldr	r3, .L996
+	ldr	r3, .L1001
 	.loc 5 211 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
@@ -11844,50 +11959,50 @@ FtlGcScanTempBlk:
 	str	r1, [sp, #8]
 	.loc 5 220 0
 	ldrh	r4, [r3]
-.LVL1099:
+.LVL1107:
 	.loc 5 221 0
 	movw	r3, #65535
 	cmp	r4, r3
-	beq	.L990
+	beq	.L995
 	.loc 5 223 0
-	cbnz	r4, .L974
-.L975:
+	cbnz	r4, .L979
+.L980:
 	.loc 5 224 0
 	bl	FtlGcPageVarInit
-.LVL1100:
-	b	.L976
-.LVL1101:
-.L990:
+.LVL1108:
+	b	.L981
+.LVL1109:
+.L995:
 	.loc 5 222 0
 	movs	r4, #0
-.LVL1102:
-.L974:
+.LVL1110:
+.L979:
 	.loc 5 223 0 discriminator 1
-	ldr	r3, .L996+4
+	ldr	r3, .L1001+4
 	ldr	r2, [sp, #8]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	beq	.L975
-.LVL1103:
-.L976:
+	beq	.L980
+.LVL1111:
+.L981:
 	.loc 5 222 0
 	movs	r7, #0
-.LVL1104:
-.L984:
+.LVL1112:
+.L989:
 	.loc 5 228 0
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	.loc 5 226 0
 	movs	r0, #0
 	strb	r0, [r5, #8]
-.LVL1105:
+.LVL1113:
 	.loc 5 228 0
 	cmp	r2, r3
-	beq	.L977
-.L987:
-.LVL1106:
+	beq	.L982
+.L992:
+.LVL1114:
 	.loc 5 231 0
-	ldr	r3, .L996+8
+	ldr	r3, .L1001+8
 	movs	r2, #0
 	add	ip, r5, #16
 	.loc 5 230 0
@@ -11899,78 +12014,78 @@ FtlGcScanTempBlk:
 	.loc 5 231 0
 	ldrh	fp, [r3]
 	.loc 5 234 0
-	ldr	r3, .L996+12
+	ldr	r3, .L1001+12
 	ldr	r3, [r3]
 	str	r3, [sp, #4]
 	.loc 5 235 0
-	ldr	r3, .L996+16
+	ldr	r3, .L1001+16
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L996+20
+	ldr	r3, .L1001+20
 	ldrh	r3, [r3]
 	str	r3, [sp, #16]
 	.loc 5 236 0
-	ldr	r3, .L996+24
+	ldr	r3, .L1001+24
 	ldr	r3, [r3]
 	str	r3, [sp, #20]
-	ldr	r3, .L996+28
+	ldr	r3, .L1001+28
 	ldrh	r10, [r3]
-.LVL1107:
-.L978:
+.LVL1115:
+.L983:
 	.loc 5 231 0 discriminator 1
 	uxth	r3, r2
 	cmp	fp, r3
-	bhi	.L980
+	bhi	.L985
 	.loc 5 241 0
 	mov	r8, #0
 	.loc 5 242 0
 	mov	fp, #20
 	.loc 5 240 0
 	movs	r2, #0
-.LVL1108:
+.LVL1116:
 	mov	r1, r6
 	ldr	r0, [sp, #4]
 	bl	FlashReadPages
-.LVL1109:
-.L981:
+.LVL1117:
+.L986:
 	.loc 5 241 0 discriminator 1
 	uxth	r3, r8
 	cmp	r6, r3
-	bhi	.L985
+	bhi	.L990
 	.loc 5 268 0
 	ldr	r3, [sp, #8]
 	.loc 5 266 0
 	adds	r7, r7, #1
-.LVL1110:
+.LVL1118:
 	.loc 5 264 0
 	adds	r4, r4, #1
-.LVL1111:
-	ldr	r2, .L996+4
+.LVL1119:
+	ldr	r2, .L1001+4
 	uxth	r4, r4
-.LVL1112:
+.LVL1120:
 	.loc 5 268 0
 	cmp	r3, r7
-	bls	.L986
-.L988:
+	bls	.L991
+.L993:
 	.loc 5 274 0
 	ldrh	r3, [r2]
 	cmp	r3, r4
-	bhi	.L987
+	bhi	.L992
 	.loc 5 265 0
 	movs	r0, #0
-	b	.L977
-.LVL1113:
-.L980:
+	b	.L982
+.LVL1121:
+.L985:
 	.loc 5 232 0
 	ldrh	r3, [ip], #2
-.LVL1114:
+.LVL1122:
 	.loc 5 233 0
 	cmp	r3, lr
-	beq	.L979
+	beq	.L984
 	.loc 5 234 0
 	ldr	r1, [sp, #4]
 	orr	r3, r4, r3, lsl #10
-.LVL1115:
+.LVL1123:
 	.loc 5 235 0
 	ldr	r0, [sp, #12]
 	.loc 5 234 0
@@ -11989,61 +12104,61 @@ FtlGcScanTempBlk:
 	mul	r3, r10, r6
 	.loc 5 237 0
 	adds	r6, r6, #1
-.LVL1116:
+.LVL1124:
 	uxth	r6, r6
-.LVL1117:
+.LVL1125:
 	.loc 5 236 0
 	bic	r3, r3, #3
 	add	r3, r3, r0
 	str	r3, [r1, #12]
-.L979:
-.LVL1118:
+.L984:
+.LVL1126:
 	adds	r2, r2, #1
-.LVL1119:
-	b	.L978
-.LVL1120:
-.L985:
+.LVL1127:
+	b	.L983
+.LVL1128:
+.L990:
 	.loc 5 242 0
-	ldr	r3, .L996+12
+	ldr	r3, .L1001+12
 	mul	r10, fp, r8
 	ldr	r2, [r3]
 	add	r3, r2, r10
 	str	r2, [sp, #16]
 	ldr	r1, [r3, #4]
 	str	r3, [sp, #12]
-.LVL1121:
+.LVL1129:
 	.loc 5 243 0
 	ubfx	r0, r1, #10, #16
 	str	r1, [sp, #4]
 	bl	P2V_plane
-.LVL1122:
+.LVL1130:
 	.loc 5 245 0
 	ldr	r2, [sp, #16]
 	ldr	r2, [r2, r10]
-	cbnz	r2, .L982
+	cbnz	r2, .L987
 	.loc 5 247 0
 	ldr	r3, [sp, #12]
 	.loc 5 248 0
 	movw	r2, #65535
 	add	r8, r8, #1
-.LVL1123:
+.LVL1131:
 	ldr	r1, [sp, #4]
 	.loc 5 247 0
 	ldr	r3, [r3, #12]
-.LVL1124:
+.LVL1132:
 	.loc 5 248 0
 	ldrh	ip, [r3]
 	cmp	ip, r2
-	bne	.L983
+	bne	.L988
 	.loc 5 249 0
-	ldr	r3, .L996+32
-.LVL1125:
+	ldr	r3, .L1001+32
+.LVL1133:
 	movs	r2, #1
 	str	r2, [r3]
-.LVL1126:
-.L977:
+.LVL1134:
+.L982:
 	.loc 5 281 0
-	ldr	r3, .L996
+	ldr	r3, .L1001
 	movw	r2, #65535
 	.loc 5 283 0
 	strb	r0, [r5, #6]
@@ -12056,80 +12171,80 @@ FtlGcScanTempBlk:
 	.loc 5 284 0
 	mov	r2, r0
 	mov	r0, r5
-.LVL1127:
+.LVL1135:
 	bl	ftl_sb_update_avl_pages
-.LVL1128:
+.LVL1136:
 	.loc 5 285 0
-	b	.L989
-.LVL1129:
-.L983:
+	b	.L994
+.LVL1137:
+.L988:
 	.loc 5 252 0
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
-.LVL1130:
+.LVL1138:
 	bl	FtlGcUpdatePage
-.LVL1131:
-	b	.L981
-.LVL1132:
-.L982:
+.LVL1139:
+	b	.L986
+.LVL1140:
+.L987:
 	.loc 5 256 0
-	ldr	r3, .L996+36
+	ldr	r3, .L1001+36
 	movs	r4, #0
-.LVL1133:
+.LVL1141:
 	ldrh	r2, [r5]
 	ldr	r3, [r3]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
 	.loc 5 257 0
 	ldrh	r0, [r5]
-.LVL1134:
+.LVL1142:
 	bl	INSERT_FREE_LIST
-.LVL1135:
+.LVL1143:
 	.loc 5 258 0
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.LVL1136:
+.LVL1144:
 	.loc 5 260 0
 	bl	FtlGcPageVarInit
-.LVL1137:
+.LVL1145:
 	.loc 5 261 0
-	b	.L984
-.LVL1138:
-.L986:
+	b	.L989
+.LVL1146:
+.L991:
 	.loc 5 268 0 discriminator 1
-	ldr	r1, .L996
+	ldr	r1, .L1001
 	movw	r0, #65535
 	ldrh	r3, [r1]
 	cmp	r3, r0
-	beq	.L988
+	beq	.L993
 	.loc 5 269 0
 	add	r3, r3, r7
 	strh	r3, [r1]	@ movhi
 	.loc 5 270 0
 	ldrh	r3, [r2]
 	cmp	r3, r4
-	bls	.L988
-.LVL1139:
-.L989:
+	bls	.L993
+.LVL1147:
+.L994:
 	.loc 5 286 0
 	mov	r0, #-1
 	add	sp, sp, #24
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1140:
-.L997:
+.LVL1148:
+.L1002:
 	.align	2
-.L996:
-	.word	.LANCHOR157
+.L1001:
+	.word	.LANCHOR156
 	.word	.LANCHOR19
 	.word	.LANCHOR3
 	.word	.LANCHOR120
-	.word	.LANCHOR93
+	.word	.LANCHOR91
 	.word	.LANCHOR23
-	.word	.LANCHOR94
+	.word	.LANCHOR92
 	.word	.LANCHOR24
-	.word	.LANCHOR153
-	.word	.LANCHOR43
+	.word	.LANCHOR152
+	.word	.LANCHOR42
 	.cfi_endproc
 .LFE313:
 	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
@@ -12147,7 +12262,7 @@ FlashTestBlk:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1141:
+.LVL1149:
 	.loc 1 202 0
 	cmp	r0, #11
 	.loc 1 197 0
@@ -12160,15 +12275,15 @@ FlashTestBlk:
 	sub	sp, sp, #92
 	.cfi_def_cfa_offset 104
 	.loc 1 202 0
-	bls	.L1000
-.LVL1142:
-.LBB245:
-.LBB246:
+	bls	.L1005
+.LVL1150:
+.LBB278:
+.LBB279:
 	.loc 1 206 0
-	ldr	r5, .L1001
+	ldr	r5, .L1006
 	.loc 1 207 0
 	add	r0, sp, #24
-.LVL1143:
+.LVL1151:
 	.loc 1 208 0
 	movs	r2, #32
 	movs	r1, #165
@@ -12176,18 +12291,18 @@ FlashTestBlk:
 	str	r0, [sp, #16]
 	.loc 1 210 0
 	lsls	r4, r4, #10
-.LVL1144:
+.LVL1152:
 	.loc 1 206 0
 	str	r5, [sp, #12]
 	.loc 1 208 0
 	bl	ftl_memset
-.LVL1145:
+.LVL1153:
 	.loc 1 209 0
 	movs	r2, #8
 	movs	r1, #90
 	mov	r0, r5
 	bl	ftl_memset
-.LVL1146:
+.LVL1154:
 	.loc 1 211 0
 	movs	r2, #1
 	add	r0, sp, #4
@@ -12196,14 +12311,14 @@ FlashTestBlk:
 	str	r4, [sp, #8]
 	.loc 1 211 0
 	bl	FlashEraseBlocks
-.LVL1147:
+.LVL1155:
 	.loc 1 212 0
 	movs	r3, #1
 	add	r0, sp, #4
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL1148:
+.LVL1156:
 	.loc 1 213 0
 	ldr	r4, [sp, #4]
 	.loc 1 219 0
@@ -12216,13 +12331,13 @@ FlashTestBlk:
 	movne	r4, #1
 	negs	r4, r4
 .LDL1:
-.LVL1149:
+.LVL1157:
 	.loc 1 219 0
 	bl	FlashEraseBlocks
-.LVL1150:
-.L998:
-.LBE246:
-.LBE245:
+.LVL1158:
+.L1003:
+.LBE279:
+.LBE278:
 	.loc 1 221 0
 	mov	r0, r4
 	add	sp, sp, #92
@@ -12230,15 +12345,15 @@ FlashTestBlk:
 	.cfi_def_cfa_offset 12
 	@ sp needed
 	pop	{r4, r5, pc}
-.LVL1151:
-.L1000:
+.LVL1159:
+.L1005:
 	.cfi_restore_state
 	.loc 1 203 0
 	movs	r4, #0
-	b	.L998
-.L1002:
+	b	.L1003
+.L1007:
 	.align	2
-.L1001:
+.L1006:
 	.word	ftl_temp_buf
 	.cfi_endproc
 .LFE347:
@@ -12257,7 +12372,7 @@ FlashGetBadBlockList:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1152:
+.LVL1160:
 	push	{r3, r4, r5, lr}
 	.cfi_def_cfa_offset 16
 	.cfi_offset 3, -16
@@ -12270,60 +12385,60 @@ FlashGetBadBlockList:
 	mov	r5, r1
 	.loc 1 227 0
 	movs	r1, #255
-.LVL1153:
+.LVL1161:
 	.loc 1 224 0
 	mov	r4, r0
 	.loc 1 227 0
 	bl	ftl_memset
-.LVL1154:
+.LVL1162:
 	.loc 1 228 0
-	ldr	r3, .L1010
+	ldr	r3, .L1015
 	mov	r1, r5
 	mov	r0, r4
 	ldr	r3, [r3]
 	blx	r3
-.LVL1155:
+.LVL1163:
 	uxth	r0, r0
-.LVL1156:
+.LVL1164:
 	.loc 1 229 0
 	cmp	r0, #50
-	bls	.L1004
+	bls	.L1009
 	.loc 1 230 0
 	mov	r2, #256
 	movs	r1, #255
 	mov	r0, r4
-.LVL1157:
+.LVL1165:
 	bl	ftl_memset
-.LVL1158:
+.LVL1166:
 	.loc 1 231 0
 	movs	r0, #0
-.LVL1159:
-.L1004:
+.LVL1167:
+.L1009:
 	.loc 1 233 0
-	ldr	r3, .L1010+4
+	ldr	r3, .L1015+4
 	ldrh	r3, [r3, #14]
 	cmp	r3, #4
-	bne	.L1009
+	bne	.L1014
 	add	r1, r4, r0, lsl #1
 	mov	r3, r4
-.L1006:
+.L1011:
 	.loc 1 234 0 discriminator 1
 	cmp	r3, r1
-	bne	.L1007
-.L1009:
+	bne	.L1012
+.L1014:
 	.loc 1 239 0
 	pop	{r3, r4, r5, pc}
-.LVL1160:
-.L1007:
+.LVL1168:
+.L1012:
 	.loc 1 235 0 discriminator 3
 	ldrh	r2, [r3]
 	lsrs	r2, r2, #1
 	strh	r2, [r3], #2	@ movhi
-	b	.L1006
-.L1011:
+	b	.L1011
+.L1016:
 	.align	2
-.L1010:
-	.word	.LANCHOR107
+.L1015:
+	.word	.LANCHOR105
 	.word	.LANCHOR0
 	.cfi_endproc
 .LFE348:
@@ -12343,10 +12458,10 @@ ftl_memcpy:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL1161:
+.LVL1169:
 	.loc 1 248 0
 	b	memcpy
-.LVL1162:
+.LVL1170:
 	.cfi_endproc
 .LFE350:
 	.size	ftl_memcpy, .-ftl_memcpy
@@ -12364,7 +12479,7 @@ FtlBbmTblFlush:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1163:
+.LVL1171:
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 48
 	.cfi_offset 4, -32
@@ -12378,25 +12493,25 @@ FtlBbmTblFlush:
 	.loc 4 91 0
 	movs	r4, #0
 	.loc 4 88 0
-	ldr	r7, .L1022
+	ldr	r7, .L1027
 	.loc 4 89 0
 	movs	r1, #0
 	.loc 4 87 0
-	ldr	r5, .L1022+4
+	ldr	r5, .L1027+4
 	.loc 4 88 0
 	ldr	r3, [r7]
 	mov	fp, r7
 	.loc 4 87 0
-	ldr	r8, .L1022+48
-	ldr	r6, .L1022+8
+	ldr	r8, .L1027+48
+	ldr	r6, .L1027+8
 	.loc 4 88 0
 	str	r3, [r5, #12]
 	.loc 4 91 0
-	ldr	r7, .L1022+12
+	ldr	r7, .L1027+12
 	.loc 4 89 0
-	ldr	r3, .L1022+16
+	ldr	r3, .L1027+16
 	.loc 4 92 0
-	ldr	r10, .L1022+52
+	ldr	r10, .L1027+52
 	.loc 4 87 0
 	ldr	r0, [r8]
 	.loc 4 89 0
@@ -12405,20 +12520,20 @@ FtlBbmTblFlush:
 	str	r0, [r5, #8]
 	.loc 4 89 0
 	bl	ftl_memset
-.LVL1164:
-.L1014:
+.LVL1172:
+.L1019:
 	.loc 4 91 0 discriminator 1
 	ldrh	r3, [r7]
 	cmp	r4, r3
-	blt	.L1015
+	blt	.L1020
 	.loc 4 94 0
 	ldr	r6, [r5, #12]
-.LVL1165:
+.LVL1173:
 	.loc 4 95 0
 	movs	r2, #16
 	.loc 4 98 0
-	ldr	r4, .L1022+20
-.LVL1166:
+	ldr	r4, .L1027+20
+.LVL1174:
 	.loc 4 95 0
 	movs	r1, #255
 	.loc 4 84 0
@@ -12426,7 +12541,7 @@ FtlBbmTblFlush:
 	.loc 4 95 0
 	mov	r0, r6
 	bl	ftl_memset
-.LVL1167:
+.LVL1175:
 	.loc 4 97 0
 	movw	r3, #61649
 	mov	r10, r4
@@ -12447,11 +12562,11 @@ FtlBbmTblFlush:
 	ldrh	r3, [r4, #6]
 	strh	r3, [r6, #10]	@ movhi
 	.loc 4 102 0
-	ldr	r3, .L1022+24
+	ldr	r3, .L1027+24
 	ldr	r3, [r3]
 	strh	r3, [r6, #12]	@ movhi
-.LVL1168:
-.L1016:
+.LVL1176:
+.L1021:
 	.loc 4 104 0
 	ldr	r3, [r8]
 	.loc 4 107 0
@@ -12474,23 +12589,23 @@ FtlBbmTblFlush:
 	.loc 4 108 0
 	ldrh	r3, [r4, #4]
 	str	r0, [sp]
-	ldr	r0, .L1022+28
+	ldr	r0, .L1027+28
 	bl	printf
-.LVL1169:
+.LVL1177:
 	.loc 4 109 0
 	movs	r3, #1
-	ldr	r0, .L1022+4
+	ldr	r0, .L1027+4
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL1170:
+.LVL1178:
 	.loc 4 110 0
-	ldr	r3, .L1022+32
+	ldr	r3, .L1027+32
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1017
+	blt	.L1022
 	.loc 4 113 0
 	ldr	r3, [r4, #8]
 	.loc 4 117 0
@@ -12511,7 +12626,7 @@ FtlBbmTblFlush:
 	.loc 4 118 0
 	strh	r2, [r4, #4]	@ movhi
 	.loc 4 121 0
-	ldr	r2, .L1022+36
+	ldr	r2, .L1027+36
 	.loc 4 116 0
 	strh	r3, [r4]	@ movhi
 	.loc 4 119 0
@@ -12528,15 +12643,15 @@ FtlBbmTblFlush:
 	str	r3, [r0, #4]
 	.loc 4 122 0
 	bl	FlashEraseBlocks
-.LVL1171:
+.LVL1179:
 	.loc 4 123 0
 	movs	r3, #1
-	ldr	r0, .L1022+4
+	ldr	r0, .L1027+4
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL1172:
-.L1017:
+.LVL1180:
+.L1022:
 	.loc 4 126 0
 	ldrh	r3, [r10, #2]
 	adds	r3, r3, #1
@@ -12544,31 +12659,31 @@ FtlBbmTblFlush:
 	.loc 4 127 0
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	bne	.L1018
+	bne	.L1023
 	.loc 4 130 0
 	adds	r7, r7, #1
-.LVL1173:
+.LVL1181:
 	.loc 4 129 0
 	ldr	r1, [r5, #4]
 	.loc 4 130 0
 	uxth	r7, r7
 	.loc 4 129 0
-	ldr	r0, .L1022+40
+	ldr	r0, .L1027+40
 	bl	printf
-.LVL1174:
+.LVL1182:
 	.loc 4 131 0
 	cmp	r7, #3
-	bls	.L1016
+	bls	.L1021
 	.loc 4 132 0
 	mov	r2, r7
 	ldr	r1, [r5, #4]
-	ldr	r0, .L1022+44
+	ldr	r0, .L1027+44
 	bl	printf
-.LVL1175:
+.LVL1183:
+.L1025:
+	b	.L1025
+.LVL1184:
 .L1020:
-	b	.L1020
-.LVL1176:
-.L1015:
 	.loc 4 92 0 discriminator 3
 	ldrh	r2, [r10]
 	ldr	r3, [r5, #8]
@@ -12577,48 +12692,48 @@ FtlBbmTblFlush:
 	lsls	r2, r2, #2
 	.loc 4 91 0 discriminator 3
 	adds	r4, r4, #1
-.LVL1177:
+.LVL1185:
 	.loc 4 92 0 discriminator 3
 	add	r0, r3, r0, lsl #2
 	bl	ftl_memcpy
-.LVL1178:
-	b	.L1014
-.LVL1179:
-.L1021:
+.LVL1186:
+	b	.L1019
+.LVL1187:
+.L1026:
 	movs	r3, #1
-.LVL1180:
+.LVL1188:
 	str	r3, [sp, #12]
-.LVL1181:
-	b	.L1016
-.LVL1182:
-.L1018:
+.LVL1189:
+	b	.L1021
+.LVL1190:
+.L1023:
 	.loc 4 139 0
 	ldr	r3, [sp, #12]
 	cmp	r3, #0
-	beq	.L1021
+	beq	.L1026
 	.loc 4 146 0
 	movs	r0, #0
 	add	sp, sp, #16
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1183:
-.L1023:
+.LVL1191:
+.L1028:
 	.align	2
-.L1022:
-	.word	.LANCHOR109
+.L1027:
 	.word	.LANCHOR108
+	.word	.LANCHOR106
 	.word	.LANCHOR37+24
 	.word	.LANCHOR10
 	.word	.LANCHOR23
 	.word	.LANCHOR37
 	.word	.LANCHOR2
-	.word	.LC94
+	.word	.LC97
 	.word	.LANCHOR20
-	.word	.LANCHOR112
-	.word	.LC95
-	.word	.LC96
-	.word	.LANCHOR39
+	.word	.LANCHOR111
+	.word	.LC98
+	.word	.LC99
+	.word	.LANCHOR107
 	.word	.LANCHOR137
 	.cfi_endproc
 .LFE229:
@@ -12633,11 +12748,11 @@ FtlBbmTblFlush:
 	.type	allocate_data_superblock, %function
 allocate_data_superblock:
 .LFB301:
-	.loc 2 2531 0
+	.loc 2 2582 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1184:
+.LVL1192:
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 48
 	.cfi_offset 4, -32
@@ -12648,34 +12763,34 @@ allocate_data_superblock:
 	.cfi_offset 10, -12
 	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	.loc 2 2531 0
+	.loc 2 2582 0
 	mov	r4, r0
-	ldr	r8, .L1062
-.LVL1185:
-.L1025:
-	.loc 2 2537 0
-	ldr	r3, .L1062
-	ldr	r6, .L1062+4
-	ldr	fp, .L1062+76
+	ldr	r8, .L1067
+.LVL1193:
+.L1030:
+	.loc 2 2588 0
+	ldr	r3, .L1067
+	ldr	r6, .L1067+4
+	ldr	fp, .L1067+76
 	ldrh	r3, [r3]
 	ldrh	r2, [r6]
 	add	r3, r3, r2
 	ldrh	r2, [fp]
 	cmp	r3, r2
-	ble	.L1026
-	.loc 2 2537 0 is_stmt 0 discriminator 1
-	movw	r2, #2537
-	ldr	r1, .L1062+8
-	ldr	r0, .L1062+12
+	ble	.L1031
+	.loc 2 2588 0 is_stmt 0 discriminator 1
+	movw	r2, #2588
+	ldr	r1, .L1067+8
+	ldr	r0, .L1067+12
 	bl	printf
-.LVL1186:
-.L1026:
-	.loc 2 2539 0 is_stmt 1
-	ldr	r3, .L1062+16
+.LVL1194:
+.L1031:
+	.loc 2 2590 0 is_stmt 1
+	ldr	r3, .L1067+16
 	cmp	r4, r3
-	bne	.L1051
-	.loc 2 2540 0
-	ldr	r2, .L1062+20
+	bne	.L1056
+	.loc 2 2591 0
+	ldr	r2, .L1067+20
 	ldrh	r3, [r8]
 	ldr	r2, [r2]
 	lsrs	r1, r3, #1
@@ -12683,443 +12798,443 @@ allocate_data_superblock:
 	adds	r1, r1, #1
 	add	r1, r1, r2, lsr #2
 	uxth	r1, r1
-.LVL1187:
-	.loc 2 2544 0
-	cbz	r1, .L1027
-	.loc 2 2545 0
+.LVL1195:
+	.loc 2 2595 0
+	cbz	r1, .L1032
+	.loc 2 2596 0
 	subs	r1, r1, #1
-.LVL1188:
+.LVL1196:
 	uxth	r1, r1
-.LVL1189:
-.L1027:
-	.loc 2 2546 0
-	ldr	r0, .L1062+24
+.LVL1197:
+.L1032:
+	.loc 2 2597 0
+	ldr	r0, .L1067+24
 	bl	List_pop_index_node
-.LVL1190:
+.LVL1198:
 	ldrh	r3, [r8]
 	mov	r5, r0
 	uxth	r7, r0
-.LVL1191:
-	cbnz	r3, .L1028
-	.loc 2 2546 0 is_stmt 0 discriminator 1
-	movw	r2, #2546
-	ldr	r1, .L1062+8
-	ldr	r0, .L1062+12
+.LVL1199:
+	cbnz	r3, .L1033
+	.loc 2 2597 0 is_stmt 0 discriminator 1
+	movw	r2, #2597
+	ldr	r1, .L1067+8
+	ldr	r0, .L1067+12
 	bl	printf
-.LVL1192:
-.L1028:
-	.loc 2 2546 0 discriminator 3
+.LVL1200:
+.L1033:
+	.loc 2 2597 0 discriminator 3
 	ldrh	r3, [r8]
-	.loc 2 2550 0 is_stmt 1 discriminator 3
+	.loc 2 2601 0 is_stmt 1 discriminator 3
 	mov	r0, r4
-	.loc 2 2546 0 discriminator 3
+	.loc 2 2597 0 discriminator 3
 	subs	r3, r3, #1
 	strh	r3, [r8]	@ movhi
-	.loc 2 2549 0 discriminator 3
+	.loc 2 2600 0 discriminator 3
 	strh	r7, [r4]	@ movhi
-	.loc 2 2550 0 discriminator 3
+	.loc 2 2601 0 discriminator 3
 	bl	make_superblock
-.LVL1193:
-	.loc 2 2551 0 discriminator 3
+.LVL1201:
+	.loc 2 2602 0 discriminator 3
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1029
-	.loc 2 2555 0
-	ldr	r3, .L1062+28
+	cbnz	r3, .L1034
+	.loc 2 2606 0
+	ldr	r3, .L1067+28
 	uxth	r5, r5
 	movw	r2, #65535
-	.loc 2 2556 0
+	.loc 2 2607 0
 	mov	r0, r7
-	.loc 2 2555 0
+	.loc 2 2606 0
 	ldr	r3, [r3]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
-	.loc 2 2556 0
+	.loc 2 2607 0
 	bl	INSERT_DATA_LIST
-.LVL1194:
-	.loc 2 2557 0
+.LVL1202:
+	.loc 2 2608 0
 	ldrh	r2, [r6]
 	ldrh	r3, [r8]
 	add	r3, r3, r2
 	ldrh	r2, [fp]
 	cmp	r3, r2
-	ble	.L1025
-	.loc 2 2557 0 is_stmt 0 discriminator 1
-	movw	r2, #2557
-	ldr	r1, .L1062+8
-	ldr	r0, .L1062+12
+	ble	.L1030
+	.loc 2 2608 0 is_stmt 0 discriminator 1
+	mov	r2, #2608
+	ldr	r1, .L1067+8
+	ldr	r0, .L1067+12
 	bl	printf
-.LVL1195:
-	b	.L1025
-.LVL1196:
-.L1051:
+.LVL1203:
+	b	.L1030
+.LVL1204:
+.L1056:
 	movs	r1, #0
-	b	.L1027
-.LVL1197:
-.L1029:
-	.loc 2 2560 0 is_stmt 1
+	b	.L1032
+.LVL1205:
+.L1034:
+	.loc 2 2611 0 is_stmt 1
 	ldrh	r2, [r6]
 	ldrh	r3, [r8]
 	add	r3, r3, r2
 	ldrh	r2, [fp]
 	cmp	r3, r2
-	ble	.L1031
-	.loc 2 2560 0 is_stmt 0 discriminator 1
-	mov	r2, #2560
-	ldr	r1, .L1062+8
-	ldr	r0, .L1062+12
+	ble	.L1036
+	.loc 2 2611 0 is_stmt 0 discriminator 1
+	movw	r2, #2611
+	ldr	r1, .L1067+8
+	ldr	r0, .L1067+12
 	bl	printf
-.LVL1198:
-.L1031:
-	.loc 2 2564 0 is_stmt 1 discriminator 1
-	ldr	r3, .L1062+32
+.LVL1206:
+.L1036:
+	.loc 2 2615 0 is_stmt 1 discriminator 1
+	ldr	r3, .L1067+32
 	movs	r6, #0
-	.loc 2 2563 0 discriminator 1
-	ldr	r2, .L1062+36
+	.loc 2 2614 0 discriminator 1
+	ldr	r2, .L1067+36
 	add	ip, r4, #16
-	.loc 2 2564 0 discriminator 1
+	.loc 2 2615 0 discriminator 1
 	mov	lr, r6
-	.loc 2 2566 0 discriminator 1
+	.loc 2 2617 0 discriminator 1
 	movw	r10, #65535
-	.loc 2 2564 0 discriminator 1
+	.loc 2 2615 0 discriminator 1
 	ldr	r0, [r3]
 	ldrh	r1, [r2]
 	movs	r2, #20
-	.loc 2 2567 0 discriminator 1
+	.loc 2 2618 0 discriminator 1
 	str	r2, [sp, #4]
 	mov	r3, r0
 	mla	r1, r2, r1, r0
 	str	r1, [sp]
-.L1032:
-.LVL1199:
-	.loc 2 2563 0 discriminator 1
+.L1037:
+.LVL1207:
+	.loc 2 2614 0 discriminator 1
 	ldr	r2, [sp]
 	cmp	r2, r3
-	bne	.L1034
-	.loc 2 2571 0
-	cbnz	r6, .L1035
-	.loc 2 2571 0 is_stmt 0 discriminator 1
-	movw	r2, #2571
-	ldr	r1, .L1062+8
-	ldr	r0, .L1062+12
+	bne	.L1039
+	.loc 2 2622 0
+	cbnz	r6, .L1040
+	.loc 2 2622 0 is_stmt 0 discriminator 1
+	movw	r2, #2622
+	ldr	r1, .L1067+8
+	ldr	r0, .L1067+12
 	bl	printf
-.LVL1200:
-.L1035:
-	.loc 2 2573 0 is_stmt 1
-	ldr	r3, .L1062+40
+.LVL1208:
+.L1040:
+	.loc 2 2624 0 is_stmt 1
+	ldr	r3, .L1067+40
 	ldrh	r3, [r3]
 	cmp	r3, r7
-	bne	.L1036
-	.loc 2 2573 0 is_stmt 0 discriminator 1
-	movw	r2, #2573
-	ldr	r1, .L1062+8
-	ldr	r0, .L1062+12
+	bne	.L1041
+	.loc 2 2624 0 is_stmt 0 discriminator 1
+	mov	r2, #2624
+	ldr	r1, .L1067+8
+	ldr	r0, .L1067+12
 	bl	printf
-.LVL1201:
-.L1036:
-	.loc 2 2574 0 is_stmt 1
+.LVL1209:
+.L1041:
+	.loc 2 2625 0 is_stmt 1
 	ldrb	r1, [r4, #8]	@ zero_extendqisi2
 	uxth	r5, r5
-	ldr	r2, .L1062+44
-	ldr	r3, .L1062+48
-	ldr	r10, .L1062+80
+	ldr	r2, .L1067+44
+	ldr	r3, .L1067+48
+	ldr	r10, .L1067+80
 	cmp	r1, #0
-	bne	.L1037
-	.loc 2 2575 0
+	bne	.L1042
+	.loc 2 2626 0
 	ldr	r0, [r2]
 	ldrh	lr, [r0, r5, lsl #1]
 	cmp	lr, #0
-	beq	.L1038
-	.loc 2 2576 0
-	ldr	r1, .L1062+52
+	beq	.L1043
+	.loc 2 2627 0
+	ldr	r1, .L1067+52
 	ldrh	ip, [r1]
 	add	r1, lr, ip
-.L1061:
-	.loc 2 2578 0
+.L1066:
+	.loc 2 2629 0
 	strh	r1, [r0, r5, lsl #1]	@ movhi
-	.loc 2 2580 0
+	.loc 2 2631 0
 	mov	r0, r7
-	.loc 2 2579 0
+	.loc 2 2630 0
 	ldr	r1, [r3]
 	str	r2, [sp, #4]
 	str	r3, [sp]
 	adds	r1, r1, #1
 	str	r1, [r3]
-	.loc 2 2580 0
+	.loc 2 2631 0
 	movs	r1, #0
 	bl	ftl_set_blk_mode
-.LVL1202:
+.LVL1210:
 	ldr	r3, [sp]
 	ldr	r2, [sp, #4]
-.L1040:
-	.loc 2 2587 0
+.L1045:
+	.loc 2 2638 0
 	ldr	r2, [r2]
 	lsls	r1, r5, #1
 	str	r1, [sp]
 	ldrh	r0, [r2, r5, lsl #1]
-	ldr	r2, .L1062+56
+	ldr	r2, .L1067+56
 	ldr	r1, [r2]
 	cmp	r0, r1
-	.loc 2 2590 0
+	.loc 2 2641 0
 	ldrh	r1, [fp]
-	.loc 2 2588 0
+	.loc 2 2639 0
 	it	hi
 	strhi	r0, [r2]
-	.loc 2 2590 0
-	ldr	r2, .L1062+52
+	.loc 2 2641 0
+	ldr	r2, .L1067+52
 	ldr	r0, [r3]
 	ldr	r3, [r10]
 	ldrh	r2, [r2]
 	mla	r0, r0, r2, r3
 	bl	__aeabi_uidiv
-.LVL1203:
-	ldr	r3, .L1062+60
-	.loc 2 2594 0
-	ldr	ip, .L1062+84
-	.loc 2 2590 0
+.LVL1211:
+	ldr	r3, .L1067+60
+	.loc 2 2645 0
+	ldr	ip, .L1067+84
+	.loc 2 2641 0
 	str	r0, [r3]
-	.loc 2 2591 0
-	ldr	r3, .L1062+64
+	.loc 2 2642 0
+	ldr	r3, .L1067+64
 	ldr	r2, [r3]
 	ldr	r3, [r2, #16]
 	adds	r3, r3, #1
 	str	r3, [r2, #16]
-.LVL1204:
+.LVL1212:
 	movs	r2, #20
-	.loc 2 2594 0
-	ldr	r3, .L1062+32
+	.loc 2 2645 0
+	ldr	r3, .L1067+32
 	ldr	r0, [r3]
 	adds	r3, r0, #4
 	mla	r2, r2, r6, r0
 	adds	r2, r2, #24
-.LVL1205:
-.L1042:
+.LVL1213:
+.L1047:
 	adds	r3, r3, #20
-	.loc 2 2593 0 discriminator 1
+	.loc 2 2644 0 discriminator 1
 	cmp	r2, r3
-	bne	.L1043
-	.loc 2 2595 0
+	bne	.L1048
+	.loc 2 2646 0
 	ldrb	r1, [r4, #8]	@ zero_extendqisi2
 	mov	r2, r6
-	.loc 2 2597 0
+	.loc 2 2648 0
 	mov	r10, #0
-	.loc 2 2595 0
+	.loc 2 2646 0
 	bl	FlashEraseBlocks
-.LVL1206:
-	.loc 2 2596 0
+.LVL1214:
+	.loc 2 2647 0
 	mov	r3, r10
-	.loc 2 2598 0
+	.loc 2 2649 0
 	movs	r1, #20
-.LVL1207:
-.L1044:
-	.loc 2 2597 0 discriminator 1
+.LVL1215:
+.L1049:
+	.loc 2 2648 0 discriminator 1
 	uxth	r2, r10
 	cmp	r6, r2
-	bhi	.L1046
-	.loc 2 2608 0
-	cbz	r3, .L1047
-	.loc 2 2609 0
+	bhi	.L1051
+	.loc 2 2659 0
+	cbz	r3, .L1052
+	.loc 2 2660 0
 	mov	r0, r7
 	bl	update_multiplier_value
-.LVL1208:
-	.loc 2 2610 0
+.LVL1216:
+	.loc 2 2661 0
 	bl	FtlBbmTblFlush
-.LVL1209:
-.L1047:
-	.loc 2 2613 0
+.LVL1217:
+.L1052:
+	.loc 2 2664 0
 	ldrb	r2, [r4, #7]	@ zero_extendqisi2
-	ldr	r1, .L1062+28
+	ldr	r1, .L1067+28
 	cmp	r2, #0
-	bne	.L1048
-	.loc 2 2615 0
+	bne	.L1053
+	.loc 2 2666 0
 	ldr	r3, [r1]
 	movw	r2, #65535
-	.loc 2 2616 0
+	.loc 2 2667 0
 	mov	r0, r7
-	.loc 2 2615 0
+	.loc 2 2666 0
 	strh	r2, [r3, r5, lsl #1]	@ movhi
-	.loc 2 2616 0
+	.loc 2 2667 0
 	bl	INSERT_DATA_LIST
-.LVL1210:
+.LVL1218:
+	.loc 2 2668 0
+	b	.L1030
+.LVL1219:
+.L1039:
 	.loc 2 2617 0
-	b	.L1025
-.LVL1211:
-.L1034:
-	.loc 2 2566 0
 	ldrh	r1, [ip], #2
-	.loc 2 2564 0
+	.loc 2 2615 0
 	str	lr, [r3, #8]
-	.loc 2 2565 0
+	.loc 2 2616 0
 	str	lr, [r3, #12]
-	.loc 2 2566 0
+	.loc 2 2617 0
 	cmp	r1, r10
-	beq	.L1033
-	.loc 2 2567 0
+	beq	.L1038
+	.loc 2 2618 0
 	ldr	r2, [sp, #4]
 	lsls	r1, r1, #10
 	mla	r2, r2, r6, r0
-	.loc 2 2568 0
+	.loc 2 2619 0
 	adds	r6, r6, #1
-.LVL1212:
+.LVL1220:
 	uxth	r6, r6
-.LVL1213:
-	.loc 2 2567 0
+.LVL1221:
+	.loc 2 2618 0
 	str	r1, [r2, #4]
-.L1033:
-	adds	r3, r3, #20
-	b	.L1032
 .L1038:
-	.loc 2 2578 0
+	adds	r3, r3, #20
+	b	.L1037
+.L1043:
+	.loc 2 2629 0
 	movs	r1, #2
-	b	.L1061
-.L1037:
-	.loc 2 2582 0
+	b	.L1066
+.L1042:
+	.loc 2 2633 0
 	ldr	r0, [r2]
 	str	r3, [sp, #4]
 	str	r2, [sp]
 	ldrh	r1, [r0, r5, lsl #1]
 	adds	r1, r1, #1
 	strh	r1, [r0, r5, lsl #1]	@ movhi
-.LBB247:
-.LBB248:
+.LBB280:
+.LBB281:
 	mov	r0, r7
-.LBE248:
-.LBE247:
-	.loc 2 2583 0
+.LBE281:
+.LBE280:
+	.loc 2 2634 0
 	ldr	r1, [r10]
 	adds	r1, r1, #1
 	str	r1, [r10]
-.LVL1214:
-.LBB250:
-.LBB249:
-	bl	ftl_set_blk_mode.part.7
-.LVL1215:
+.LVL1222:
+.LBB283:
+.LBB282:
+	bl	ftl_set_blk_mode.part.6
+.LVL1223:
 	ldm	sp, {r2, r3}
-	b	.L1040
-.LVL1216:
-.L1043:
-.LBE249:
-.LBE250:
-	.loc 2 2594 0 discriminator 3
+	b	.L1045
+.LVL1224:
+.L1048:
+.LBE282:
+.LBE283:
+	.loc 2 2645 0 discriminator 3
 	ldr	r1, [r3, #-20]
 	and	r1, r1, ip
 	str	r1, [r3, #-20]
-	b	.L1042
-.LVL1217:
-.L1046:
-	.loc 2 2598 0
-	ldr	r0, .L1062+32
+	b	.L1047
+.LVL1225:
+.L1051:
+	.loc 2 2649 0
+	ldr	r0, .L1067+32
 	mul	r2, r1, r10
 	ldr	r0, [r0]
 	add	ip, r0, r2
 	ldr	r2, [r0, r2]
 	adds	r0, r2, #1
-	bne	.L1045
-	.loc 2 2600 0
+	bne	.L1050
+	.loc 2 2651 0
 	ldr	r0, [ip, #4]
-	.loc 2 2599 0
+	.loc 2 2650 0
 	adds	r3, r3, #1
-.LVL1218:
+.LVL1226:
 	str	r1, [sp, #12]
 	str	r2, [sp, #8]
-	.loc 2 2601 0
+	.loc 2 2652 0
 	ubfx	r0, r0, #10, #16
-	.loc 2 2599 0
+	.loc 2 2650 0
 	str	r3, [sp, #4]
-.LVL1219:
-	.loc 2 2601 0
+.LVL1227:
+	.loc 2 2652 0
 	bl	FtlBbmMapBadBlock
-.LVL1220:
-	.loc 2 2602 0
+.LVL1228:
+	.loc 2 2653 0
 	ldr	r2, [sp, #8]
 	add	r0, r4, r10, lsl #1
-	.loc 2 2603 0
+	.loc 2 2654 0
 	ldr	r1, [sp, #12]
 	ldr	r3, [sp, #4]
-	.loc 2 2602 0
+	.loc 2 2653 0
 	strh	r2, [r0, #16]	@ movhi
-	.loc 2 2603 0
+	.loc 2 2654 0
 	ldrb	r2, [r4, #7]	@ zero_extendqisi2
 	subs	r2, r2, #1
 	strb	r2, [r4, #7]
-.LVL1221:
-.L1045:
+.LVL1229:
+.L1050:
 	add	r10, r10, #1
-.LVL1222:
-	b	.L1044
-.LVL1223:
-.L1048:
-	.loc 2 2620 0
-	ldr	r3, .L1062+68
-	.loc 2 2624 0
-	ldr	r0, .L1062+72
-	.loc 2 2620 0
+.LVL1230:
+	b	.L1049
+.LVL1231:
+.L1053:
+	.loc 2 2671 0
+	ldr	r3, .L1067+68
+	.loc 2 2675 0
+	ldr	r0, .L1067+72
+	.loc 2 2671 0
 	ldrh	r3, [r3]
-	.loc 2 2621 0
+	.loc 2 2672 0
 	strh	r7, [r4]	@ movhi
-	.loc 2 2620 0
+	.loc 2 2671 0
 	smulbb	r3, r3, r2
-	.loc 2 2622 0
+	.loc 2 2673 0
 	movs	r2, #0
 	strh	r2, [r4, #2]	@ movhi
-	.loc 2 2623 0
+	.loc 2 2674 0
 	strb	r2, [r4, #6]
-	.loc 2 2624 0
+	.loc 2 2675 0
 	ldr	r2, [r0]
-	.loc 2 2620 0
+	.loc 2 2671 0
 	uxth	r3, r3
 	strh	r3, [r4, #4]	@ movhi
-	.loc 2 2624 0
+	.loc 2 2675 0
 	str	r2, [r4, #12]
 	adds	r2, r2, #1
 	str	r2, [r0]
-	.loc 2 2625 0
+	.loc 2 2676 0
 	ldr	r2, [r1]
 	ldr	r1, [sp]
 	strh	r3, [r2, r1]	@ movhi
-	.loc 2 2626 0
+	.loc 2 2677 0
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L1049
-	.loc 2 2626 0 is_stmt 0 discriminator 2
+	cbz	r3, .L1054
+	.loc 2 2677 0 is_stmt 0 discriminator 2
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1050
-.L1049:
-	.loc 2 2626 0 discriminator 3
-	movw	r2, #2626
-	ldr	r1, .L1062+8
-	ldr	r0, .L1062+12
+	cbnz	r3, .L1055
+.L1054:
+	.loc 2 2677 0 discriminator 3
+	movw	r2, #2677
+	ldr	r1, .L1067+8
+	ldr	r0, .L1067+12
 	bl	printf
-.LVL1224:
-.L1050:
-	.loc 2 2628 0 is_stmt 1
+.LVL1232:
+.L1055:
+	.loc 2 2679 0 is_stmt 1
 	movs	r0, #0
 	add	sp, sp, #16
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1225:
-.L1063:
+.LVL1233:
+.L1068:
 	.align	2
-.L1062:
+.L1067:
 	.word	.LANCHOR48
 	.word	.LANCHOR45
-	.word	.LANCHOR158
+	.word	.LANCHOR157
 	.word	.LC1
 	.word	.LANCHOR53
-	.word	.LANCHOR89
+	.word	.LANCHOR87
 	.word	.LANCHOR47
-	.word	.LANCHOR43
-	.word	.LANCHOR112
+	.word	.LANCHOR42
+	.word	.LANCHOR111
 	.word	.LANCHOR3
-	.word	.LANCHOR82
-	.word	.LANCHOR40
-	.word	.LANCHOR73
+	.word	.LANCHOR80
+	.word	.LANCHOR43
+	.word	.LANCHOR72
 	.word	.LANCHOR14
-	.word	.LANCHOR77
-	.word	.LANCHOR75
+	.word	.LANCHOR76
+	.word	.LANCHOR74
 	.word	.LANCHOR127
 	.word	.LANCHOR19
-	.word	.LANCHOR71
+	.word	.LANCHOR70
 	.word	.LANCHOR5
-	.word	.LANCHOR74
+	.word	.LANCHOR73
 	.word	-1024
 	.cfi_endproc
 .LFE301:
@@ -13138,7 +13253,7 @@ FtlGcFreeBadSuperBlk:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1226:
+.LVL1234:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 40
 	.cfi_offset 4, -32
@@ -13152,32 +13267,32 @@ FtlGcFreeBadSuperBlk:
 	.loc 5 390 0
 	mov	r10, r0
 	.loc 5 395 0
-	ldr	r4, .L1076
+	ldr	r4, .L1081
 	ldrh	r3, [r4]
-	cbz	r3, .L1065
-.LBB253:
-.LBB254:
+	cbz	r3, .L1070
+.LBB286:
+.LBB287:
 	.loc 5 399 0
-	ldr	r8, .L1076+16
-.LBE254:
-.LBE253:
+	ldr	r8, .L1081+16
+.LBE287:
+.LBE286:
 	movs	r6, #0
-.LVL1227:
-.L1066:
-.LBB257:
-.LBB255:
+.LVL1235:
+.L1071:
+.LBB290:
+.LBB288:
 	.loc 5 396 0
-	ldr	r3, .L1076+4
+	ldr	r3, .L1081+4
 	ldrh	r2, [r3]
 	uxth	r3, r6
 	cmp	r2, r3
-	bhi	.L1072
+	bhi	.L1077
 	.loc 5 412 0
 	bl	FtlGcReFreshBadBlk
-.LVL1228:
-.L1065:
-.LBE255:
-.LBE257:
+.LVL1236:
+.L1070:
+.LBE288:
+.LBE290:
 	.loc 5 415 0
 	movs	r0, #0
 	add	sp, sp, #8
@@ -13185,95 +13300,95 @@ FtlGcFreeBadSuperBlk:
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1229:
-.L1072:
+.LVL1237:
+.L1077:
 	.cfi_restore_state
-.LBB258:
-.LBB256:
+.LBB291:
+.LBB289:
 	.loc 5 397 0
-	ldr	r2, .L1076+8
+	ldr	r2, .L1081+8
 	uxth	r3, r6
 	mov	r1, r10
 	movs	r7, #0
 	ldrb	r0, [r2, r3]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL1230:
+.LVL1238:
 	.loc 5 401 0
-	ldr	r2, .L1076+12
+	ldr	r2, .L1081+12
 	.loc 5 397 0
 	mov	fp, r0
-.LVL1231:
-.L1067:
+.LVL1239:
+.L1072:
 	.loc 5 398 0
 	ldrh	r3, [r4]
 	uxth	r5, r7
-.LVL1232:
+.LVL1240:
 	cmp	r3, r5
-	bhi	.L1071
-.LVL1233:
+	bhi	.L1076
+.LVL1241:
 	adds	r6, r6, #1
-.LVL1234:
-	b	.L1066
-.LVL1235:
-.L1071:
+.LVL1242:
+	b	.L1071
+.LVL1243:
+.L1076:
 	.loc 5 399 0
 	uxth	r3, r7
 	ldrh	r1, [r8, r3, lsl #1]
 	cmp	r1, fp
-	bne	.L1068
+	bne	.L1073
 	.loc 5 401 0
 	mov	r1, fp
 	mov	r0, r2
 	str	r3, [sp, #4]
 	str	r2, [sp]
 	bl	printf
-.LVL1236:
+.LVL1244:
 	.loc 5 403 0
 	mov	r0, fp
 	bl	FtlBbmMapBadBlock
-.LVL1237:
+.LVL1245:
 	.loc 5 404 0
 	bl	FtlBbmTblFlush
-.LVL1238:
+.LVL1246:
 	ldr	r3, [sp, #4]
 	.loc 5 405 0
 	ldrh	r1, [r4]
 	ldr	r2, [sp]
 	add	r3, r8, r3, lsl #1
-.LVL1239:
-.L1069:
+.LVL1247:
+.L1074:
 	cmp	r5, r1
-	bcc	.L1070
+	bcc	.L1075
 	.loc 5 407 0
 	subs	r1, r1, #1
 	strh	r1, [r4]	@ movhi
-.LVL1240:
-.L1068:
+.LVL1248:
+.L1073:
 	adds	r7, r7, #1
-.LVL1241:
-	b	.L1067
-.LVL1242:
-.L1070:
+.LVL1249:
+	b	.L1072
+.LVL1250:
+.L1075:
 	.loc 5 406 0
 	ldrh	r0, [r3, #2]!
 	.loc 5 405 0
 	adds	r5, r5, #1
-.LVL1243:
+.LVL1251:
 	uxth	r5, r5
-.LVL1244:
+.LVL1252:
 	.loc 5 406 0
 	strh	r0, [r3, #-2]	@ movhi
-	b	.L1069
-.L1077:
+	b	.L1074
+.L1082:
 	.align	2
-.L1076:
-	.word	.LANCHOR103
+.L1081:
+	.word	.LANCHOR101
 	.word	.LANCHOR3
 	.word	.LANCHOR13
-	.word	.LC97
-	.word	.LANCHOR104
-.LBE256:
-.LBE258:
+	.word	.LC100
+	.word	.LANCHOR102
+.LBE289:
+.LBE291:
 	.cfi_endproc
 .LFE320:
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
@@ -13287,122 +13402,122 @@ FtlGcFreeBadSuperBlk:
 	.type	update_vpc_list, %function
 update_vpc_list:
 .LFB304:
-	.loc 2 2687 0
+	.loc 2 2738 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1245:
+.LVL1253:
 	push	{r3, r4, r5, lr}
 	.cfi_def_cfa_offset 16
 	.cfi_offset 3, -16
 	.cfi_offset 4, -12
 	.cfi_offset 5, -8
 	.cfi_offset 14, -4
-	.loc 2 2687 0
+	.loc 2 2738 0
 	mov	r4, r0
-	.loc 2 2688 0
-	ldr	r3, .L1088
+	.loc 2 2739 0
+	ldr	r3, .L1093
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	bne	.L1079
-	.loc 2 2689 0
-	ldr	r2, .L1088+4
+	bne	.L1084
+	.loc 2 2740 0
+	ldr	r2, .L1093+4
 	ldrh	r1, [r2]
 	cmp	r1, r0
-	bne	.L1080
-	.loc 2 2691 0
+	bne	.L1085
+	.loc 2 2742 0
 	movw	r3, #65535
 	strh	r3, [r2]	@ movhi
-.L1081:
-.LVL1246:
-.LBB261:
-.LBB262:
-	.loc 2 2696 0
-	ldr	r5, .L1088+8
+.L1086:
+.LVL1254:
+.LBB294:
+.LBB295:
+	.loc 2 2747 0
+	ldr	r5, .L1093+8
 	mov	r1, r4
-	ldr	r0, .L1088+12
-.LVL1247:
+	ldr	r0, .L1093+12
+.LVL1255:
 	bl	List_remove_node
-.LVL1248:
+.LVL1256:
 	ldrh	r3, [r5]
-	cbnz	r3, .L1083
-	movw	r2, #2696
-	ldr	r1, .L1088+16
-	ldr	r0, .L1088+20
+	cbnz	r3, .L1088
+	movw	r2, #2747
+	ldr	r1, .L1093+16
+	ldr	r0, .L1093+20
 	bl	printf
-.LVL1249:
-.L1083:
+.LVL1257:
+.L1088:
 	ldrh	r3, [r5]
-	.loc 2 2697 0
+	.loc 2 2748 0
 	mov	r0, r4
-	.loc 2 2696 0
+	.loc 2 2747 0
 	subs	r3, r3, #1
 	strh	r3, [r5]	@ movhi
-	.loc 2 2697 0
+	.loc 2 2748 0
 	bl	free_data_superblock
-.LVL1250:
-	.loc 2 2698 0
+.LVL1258:
+	.loc 2 2749 0
 	mov	r0, r4
 	bl	FtlGcFreeBadSuperBlk
-.LVL1251:
-	.loc 2 2699 0
-	ldr	r3, .L1088+24
+.LVL1259:
+	.loc 2 2750 0
+	ldr	r3, .L1093+24
 	ldrh	r2, [r5]
 	ldrh	r3, [r3]
 	add	r3, r3, r2
-	ldr	r2, .L1088+28
+	ldr	r2, .L1093+28
 	ldrh	r2, [r2]
 	cmp	r3, r2
-	ble	.L1087
-	movw	r2, #2699
-	ldr	r1, .L1088+16
-	ldr	r0, .L1088+20
+	ble	.L1092
+	movw	r2, #2750
+	ldr	r1, .L1093+16
+	ldr	r0, .L1093+20
 	bl	printf
-.LVL1252:
-.L1087:
+.LVL1260:
+.L1092:
 	movs	r3, #1
-	b	.L1078
-.LVL1253:
-.L1080:
-.LBE262:
-.LBE261:
-	.loc 2 2692 0
-	ldr	r2, .L1088+32
+	b	.L1083
+.LVL1261:
+.L1085:
+.LBE295:
+.LBE294:
+	.loc 2 2743 0
+	ldr	r2, .L1093+32
 	ldrh	r2, [r2]
 	cmp	r2, r0
-	beq	.L1078
-	.loc 2 2692 0 is_stmt 0 discriminator 1
-	ldr	r2, .L1088+36
+	beq	.L1083
+	.loc 2 2743 0 is_stmt 0 discriminator 1
+	ldr	r2, .L1093+36
 	ldrh	r2, [r2]
 	cmp	r2, r0
-	beq	.L1078
-	.loc 2 2692 0 discriminator 2
-	ldr	r2, .L1088+40
+	beq	.L1083
+	.loc 2 2743 0 discriminator 2
+	ldr	r2, .L1093+40
 	ldrh	r2, [r2]
 	cmp	r2, r0
-	bne	.L1081
-.LVL1254:
-.L1078:
-	.loc 2 2705 0 is_stmt 1
+	bne	.L1086
+.LVL1262:
+.L1083:
+	.loc 2 2756 0 is_stmt 1
 	mov	r0, r3
 	pop	{r3, r4, r5, pc}
-.LVL1255:
-.L1079:
-	.loc 2 2702 0
+.LVL1263:
+.L1084:
+	.loc 2 2753 0
 	bl	List_update_data_list
-.LVL1256:
-	.loc 2 2704 0
+.LVL1264:
+	.loc 2 2755 0
 	movs	r3, #0
-	b	.L1078
-.L1089:
+	b	.L1083
+.L1094:
 	.align	2
-.L1088:
-	.word	.LANCHOR43
-	.word	.LANCHOR82
-	.word	.LANCHOR45
+.L1093:
 	.word	.LANCHOR42
-	.word	.LANCHOR159
+	.word	.LANCHOR80
+	.word	.LANCHOR45
+	.word	.LANCHOR41
+	.word	.LANCHOR158
 	.word	.LC1
 	.word	.LANCHOR48
 	.word	.LANCHOR5
@@ -13422,125 +13537,125 @@ update_vpc_list:
 	.type	decrement_vpc_count, %function
 decrement_vpc_count:
 .LFB305:
-	.loc 2 2708 0
+	.loc 2 2759 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1257:
-	.loc 2 2711 0
+.LVL1265:
+	.loc 2 2762 0
 	movw	r3, #65535
-	.loc 2 2708 0
+	.loc 2 2759 0
 	push	{r4, r5, r6, lr}
 	.cfi_def_cfa_offset 16
 	.cfi_offset 4, -16
 	.cfi_offset 5, -12
 	.cfi_offset 6, -8
 	.cfi_offset 14, -4
-	.loc 2 2711 0
+	.loc 2 2762 0
 	cmp	r0, r3
-	.loc 2 2708 0
+	.loc 2 2759 0
 	mov	r4, r0
-	.loc 2 2711 0
-	beq	.L1091
-	.loc 2 2712 0
-	ldr	r5, .L1099
+	.loc 2 2762 0
+	beq	.L1096
+	.loc 2 2763 0
+	ldr	r5, .L1104
 	ldr	r3, [r5]
 	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L1092
-	.loc 2 2713 0
+	cbnz	r2, .L1097
+	.loc 2 2764 0
 	mov	r1, r0
-	ldr	r0, .L1099+4
-.LVL1258:
+	ldr	r0, .L1104+4
+.LVL1266:
 	bl	printf
-.LVL1259:
-	.loc 2 2714 0
+.LVL1267:
+	.loc 2 2765 0
 	ldr	r3, [r5]
 	ldrh	r5, [r3, r4, lsl #1]
-	cbz	r5, .L1093
-.L1097:
-	.loc 2 2723 0
+	cbz	r5, .L1098
+.L1102:
+	.loc 2 2774 0
 	movs	r5, #0
-.LVL1260:
-.L1090:
-	.loc 2 2733 0
+.LVL1268:
+.L1095:
+	.loc 2 2784 0
 	mov	r0, r5
 	pop	{r4, r5, r6, pc}
-.LVL1261:
-.L1093:
-	.loc 2 2714 0 discriminator 1
-	movw	r2, #2714
-.LVL1262:
+.LVL1269:
 .L1098:
-	.loc 2 2730 0 discriminator 2
-	ldr	r1, .L1099+8
-	ldr	r0, .L1099+12
+	.loc 2 2765 0 discriminator 1
+	movw	r2, #2765
+.LVL1270:
+.L1103:
+	.loc 2 2781 0 discriminator 2
+	ldr	r1, .L1104+8
+	ldr	r0, .L1104+12
 	bl	printf
-.LVL1263:
-	b	.L1090
-.LVL1264:
-.L1092:
-	.loc 2 2717 0
+.LVL1271:
+	b	.L1095
+.LVL1272:
+.L1097:
+	.loc 2 2768 0
 	subs	r2, r2, #1
 	strh	r2, [r3, r0, lsl #1]	@ movhi
-.L1091:
-	.loc 2 2721 0
-	ldr	r6, .L1099+16
+.L1096:
+	.loc 2 2772 0
+	ldr	r6, .L1104+16
 	movw	r3, #65535
 	ldrh	r0, [r6]
-.LVL1265:
+.LVL1273:
 	cmp	r0, r3
-	bne	.L1095
-	.loc 2 2722 0
+	bne	.L1100
+	.loc 2 2773 0
 	strh	r4, [r6]	@ movhi
-	b	.L1097
-.L1095:
-	.loc 2 2724 0
+	b	.L1102
+.L1100:
+	.loc 2 2775 0
 	cmp	r4, r0
-	beq	.L1097
-	.loc 2 2727 0
+	beq	.L1102
+	.loc 2 2778 0
 	bl	update_vpc_list
-.LVL1266:
-	.loc 2 2730 0
-	ldr	r3, .L1099+20
-	.loc 2 2727 0
+.LVL1274:
+	.loc 2 2781 0
+	ldr	r3, .L1104+20
+	.loc 2 2778 0
 	adds	r5, r0, #0
-	.loc 2 2730 0
-	ldr	r2, .L1099+24
-	.loc 2 2727 0
+	.loc 2 2781 0
+	ldr	r2, .L1104+24
+	.loc 2 2778 0
 	it	ne
 	movne	r5, #1
-.LVL1267:
-	.loc 2 2729 0
+.LVL1275:
+	.loc 2 2780 0
 	strh	r4, [r6]	@ movhi
-	.loc 2 2730 0
+	.loc 2 2781 0
 	ldr	r3, [r3]
 	ldr	r2, [r2]
 	subs	r3, r3, r2
 	asrs	r2, r3, #1
-	ldr	r3, .L1099+28
+	ldr	r3, .L1104+28
 	muls	r3, r2, r3
-	ldr	r2, .L1099
+	ldr	r2, .L1104
 	ldr	r2, [r2]
 	uxth	r1, r3
 	ldrh	r2, [r2, r1, lsl #1]
 	cmp	r2, #0
-	bne	.L1090
-	.loc 2 2730 0 is_stmt 0 discriminator 1
+	bne	.L1095
+	.loc 2 2781 0 is_stmt 0 discriminator 1
 	cmp	r4, r1
-	beq	.L1090
-	.loc 2 2730 0 discriminator 2
-	movw	r2, #2730
-	b	.L1098
-.L1100:
+	beq	.L1095
+	.loc 2 2781 0 discriminator 2
+	movw	r2, #2781
+	b	.L1103
+.L1105:
 	.align	2
-.L1099:
-	.word	.LANCHOR43
-	.word	.LC98
-	.word	.LANCHOR160
-	.word	.LC1
-	.word	.LANCHOR151
+.L1104:
 	.word	.LANCHOR42
+	.word	.LC101
+	.word	.LANCHOR159
+	.word	.LC1
+	.word	.LANCHOR150
 	.word	.LANCHOR41
+	.word	.LANCHOR40
 	.word	-1431655765
 	.cfi_endproc
 .LFE305:
@@ -13555,7 +13670,7 @@ decrement_vpc_count:
 	.type	FtlWriteDump_data, %function
 FtlWriteDump_data:
 .LFB271:
-	.loc 2 947 0 is_stmt 1
+	.loc 2 996 0 is_stmt 1
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
@@ -13571,184 +13686,184 @@ FtlWriteDump_data:
 	.cfi_offset 14, -4
 	sub	sp, sp, #24
 	.cfi_def_cfa_offset 56
-	.loc 2 948 0
-	ldr	r4, .L1120
+	.loc 2 997 0
+	ldr	r4, .L1125
 	ldrh	r2, [r4, #4]
 	cmp	r2, #0
-	beq	.L1102
-	.loc 2 948 0 is_stmt 0 discriminator 1
+	beq	.L1107
+	.loc 2 997 0 is_stmt 0 discriminator 1
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1102
-	.loc 2 949 0 is_stmt 1
-	ldr	r3, .L1120+4
+	bne	.L1107
+	.loc 2 998 0 is_stmt 1
+	ldr	r3, .L1125+4
 	ldrb	r1, [r4, #7]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	muls	r3, r1, r3
 	cmp	r2, r3
-	beq	.L1102
-.LVL1268:
-.LBB266:
-.LBB267:
-	.loc 2 956 0
+	beq	.L1107
+.LVL1276:
+.LBB299:
+.LBB300:
+	.loc 2 1005 0
 	ldrb	r7, [r4, #10]	@ zero_extendqisi2
-	cbnz	r7, .L1101
-	.loc 2 951 0
-	ldr	r3, .L1120+8
-	.loc 2 958 0
+	cbnz	r7, .L1106
+	.loc 2 1000 0
+	ldr	r3, .L1125+8
+	.loc 2 1007 0
 	mov	r2, r7
 	mov	r1, sp
-	.loc 2 951 0
+	.loc 2 1000 0
 	ldr	r6, [r3]
-	.loc 2 953 0
-	ldr	r3, .L1120+12
-	.loc 2 951 0
+	.loc 2 1002 0
+	ldr	r3, .L1125+12
+	.loc 2 1000 0
 	subs	r6, r6, #1
-	.loc 2 958 0
+	.loc 2 1007 0
 	mov	r0, r6
-	.loc 2 953 0
+	.loc 2 1002 0
 	ldrh	r8, [r3]
-	.loc 2 958 0
+	.loc 2 1007 0
 	bl	log2phys
-.LVL1269:
-	.loc 2 963 0
-	ldr	r2, .L1120+16
-	.loc 2 961 0
+.LVL1277:
+	.loc 2 1012 0
+	ldr	r2, .L1125+16
+	.loc 2 1010 0
 	ldr	r3, [sp]
-	.loc 2 962 0
+	.loc 2 1011 0
 	str	r6, [sp, #20]
-	.loc 2 963 0
+	.loc 2 1012 0
 	ldr	r0, [r2]
-	.loc 2 964 0
-	ldr	r2, .L1120+20
-	.loc 2 961 0
+	.loc 2 1013 0
+	ldr	r2, .L1125+20
+	.loc 2 1010 0
 	str	r3, [sp, #8]
-	.loc 2 967 0
+	.loc 2 1016 0
 	adds	r3, r3, #1
-	.loc 2 963 0
+	.loc 2 1012 0
 	str	r0, [sp, #12]
-	.loc 2 964 0
+	.loc 2 1013 0
 	ldr	r5, [r2]
 	str	r5, [sp, #16]
-.LVL1270:
-	.loc 2 966 0
+.LVL1278:
+	.loc 2 1015 0
 	str	r7, [r5, #4]
-	.loc 2 967 0
-	beq	.L1104
-	.loc 2 969 0
+	.loc 2 1016 0
+	beq	.L1109
+	.loc 2 1018 0
 	mov	r2, r7
 	movs	r1, #1
 	add	r0, sp, #4
 	bl	FlashReadPages
-.LVL1271:
-.L1105:
-	.loc 2 986 0
-	ldr	fp, .L1120
-	.loc 2 953 0
+.LVL1279:
+.L1110:
+	.loc 2 1035 0
+	ldr	fp, .L1125
+	.loc 2 1002 0
 	lsl	r8, r8, #2
-.LVL1272:
-	.loc 2 987 0
-	ldr	r10, .L1120+28
-	.loc 2 975 0
+.LVL1280:
+	.loc 2 1036 0
+	ldr	r10, .L1125+28
+	.loc 2 1024 0
 	movs	r7, #0
 	movw	r3, #61589
 	strh	r3, [r5]	@ movhi
-.L1106:
-	.loc 2 976 0
+.L1111:
+	.loc 2 1025 0
 	cmp	r8, r7
-	bne	.L1110
-.L1107:
-	.loc 2 992 0
+	bne	.L1115
+.L1112:
+	.loc 2 1041 0
 	movs	r3, #1
-.LVL1273:
-.L1119:
-.LBE267:
-.LBE266:
-	.loc 2 998 0
+.LVL1281:
+.L1124:
+.LBE300:
+.LBE299:
+	.loc 2 1047 0
 	strb	r3, [r4, #10]
-.L1101:
-	.loc 2 1000 0
+.L1106:
+	.loc 2 1049 0
 	add	sp, sp, #24
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1274:
-.L1104:
+.LVL1282:
+.L1109:
 	.cfi_restore_state
-.LBB269:
-.LBB268:
-	.loc 2 973 0
-	ldr	r3, .L1120+24
+.LBB302:
+.LBB301:
+	.loc 2 1022 0
+	ldr	r3, .L1125+24
 	movs	r1, #255
 	ldrh	r2, [r3]
 	bl	ftl_memset
-.LVL1275:
-	b	.L1105
-.LVL1276:
-.L1110:
-	.loc 2 978 0
+.LVL1283:
+	b	.L1110
+.LVL1284:
+.L1115:
+	.loc 2 1027 0
 	ldrh	r3, [r4, #4]
 	cmp	r3, #0
-	beq	.L1107
-	.loc 2 983 0
+	beq	.L1112
+	.loc 2 1032 0
 	ldr	r3, [sp, #8]
-	.loc 2 986 0
+	.loc 2 1035 0
 	mov	r0, fp
-	.loc 2 982 0
+	.loc 2 1031 0
 	str	r6, [r5, #8]
 	adds	r7, r7, #1
-	.loc 2 983 0
+	.loc 2 1032 0
 	str	r3, [r5, #12]
-	.loc 2 984 0
+	.loc 2 1033 0
 	ldrh	r3, [r4]
 	strh	r3, [r5, #2]	@ movhi
-	.loc 2 986 0
+	.loc 2 1035 0
 	bl	get_new_active_ppa
-.LVL1277:
-	.loc 2 987 0
+.LVL1285:
+	.loc 2 1036 0
 	ldr	r3, [r10]
-	.loc 2 988 0
+	.loc 2 1037 0
 	movs	r1, #1
-	.loc 2 986 0
+	.loc 2 1035 0
 	str	r0, [sp, #8]
-	.loc 2 988 0
+	.loc 2 1037 0
 	add	r0, sp, #4
-	.loc 2 987 0
+	.loc 2 1036 0
 	str	r3, [r5, #4]
 	adds	r3, r3, #1
 	adds	r2, r3, #1
 	it	eq
 	moveq	r3, #0
 	str	r3, [r10]
-	.loc 2 988 0
+	.loc 2 1037 0
 	movs	r3, #0
 	mov	r2, r3
 	bl	FlashProgPages
-.LVL1278:
-	.loc 2 990 0
+.LVL1286:
+	.loc 2 1039 0
 	ldrh	r0, [r4]
 	bl	decrement_vpc_count
-.LVL1279:
-	b	.L1106
-.LVL1280:
-.L1102:
-.LBE268:
-.LBE269:
-	.loc 2 998 0
+.LVL1287:
+	b	.L1111
+.LVL1288:
+.L1107:
+.LBE301:
+.LBE302:
+	.loc 2 1047 0
 	movs	r3, #0
-	b	.L1119
-.L1121:
+	b	.L1124
+.L1126:
 	.align	2
-.L1120:
+.L1125:
 	.word	.LANCHOR51
 	.word	.LANCHOR19
-	.word	.LANCHOR62
+	.word	.LANCHOR61
 	.word	.LANCHOR3
-	.word	.LANCHOR39
-	.word	.LANCHOR109
+	.word	.LANCHOR107
+	.word	.LANCHOR108
 	.word	.LANCHOR23
-	.word	.LANCHOR72
+	.word	.LANCHOR71
 	.cfi_endproc
 .LFE271:
 	.size	FtlWriteDump_data, .-FtlWriteDump_data
@@ -13762,7 +13877,7 @@ FtlWriteDump_data:
 	.type	l2p_flush, %function
 l2p_flush:
 .LFB264:
-	.loc 2 740 0
+	.loc 2 789 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
@@ -13772,47 +13887,47 @@ l2p_flush:
 	.cfi_offset 5, -12
 	.cfi_offset 6, -8
 	.cfi_offset 14, -4
-	.loc 2 746 0
+	.loc 2 795 0
 	movs	r4, #0
-	ldr	r5, .L1126
-	.loc 2 747 0
-	ldr	r6, .L1126+4
-	.loc 2 744 0
+	ldr	r5, .L1131
+	.loc 2 796 0
+	ldr	r6, .L1131+4
+	.loc 2 793 0
 	bl	FtlWriteDump_data
-.LVL1281:
-.L1123:
-	.loc 2 746 0 discriminator 1
+.LVL1289:
+.L1128:
+	.loc 2 795 0 discriminator 1
 	ldrh	r3, [r5]
 	uxth	r0, r4
-.LVL1282:
+.LVL1290:
 	cmp	r3, r0
-	bhi	.L1125
-	.loc 2 750 0
+	bhi	.L1130
+	.loc 2 799 0
 	movs	r0, #0
-.LVL1283:
+.LVL1291:
 	pop	{r4, r5, r6, pc}
-.LVL1284:
-.L1125:
-	.loc 2 747 0
+.LVL1292:
+.L1130:
+	.loc 2 796 0
 	ldr	r2, [r6]
 	uxth	r3, r4
 	movs	r1, #12
 	mla	r3, r1, r3, r2
 	ldr	r3, [r3, #4]
 	cmp	r3, #0
-	bge	.L1124
-	.loc 2 748 0
+	bge	.L1129
+	.loc 2 797 0
 	bl	flush_l2p_region
-.LVL1285:
-.L1124:
+.LVL1293:
+.L1129:
 	adds	r4, r4, #1
-.LVL1286:
-	b	.L1123
-.L1127:
+.LVL1294:
+	b	.L1128
+.L1132:
 	.align	2
-.L1126:
+.L1131:
 	.word	.LANCHOR33
-	.word	.LANCHOR56
+	.word	.LANCHOR55
 	.cfi_endproc
 .LFE264:
 	.size	l2p_flush, .-l2p_flush
@@ -13826,15 +13941,15 @@ l2p_flush:
 	.type	FtlRecoverySuperblock, %function
 FtlRecoverySuperblock:
 .LFB284:
-	.loc 2 1656 0
+	.loc 2 1705 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 48
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1287:
-	.loc 2 1670 0
+.LVL1295:
+	.loc 2 1719 0
 	ldrh	r3, [r0]
 	movw	r2, #65535
-	.loc 2 1656 0
+	.loc 2 1705 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
 	.cfi_offset 4, -32
@@ -13848,1067 +13963,1067 @@ FtlRecoverySuperblock:
 	mov	r8, r0
 	sub	sp, sp, #48
 	.cfi_def_cfa_offset 80
-	.loc 2 1670 0
+	.loc 2 1719 0
 	cmp	r3, r2
-	beq	.L1257
-	.loc 2 1675 0
+	beq	.L1262
+	.loc 2 1724 0
 	ldrh	r3, [r0, #2]
 	str	r3, [sp, #4]
-.LVL1288:
-	.loc 2 1676 0
+.LVL1296:
+	.loc 2 1725 0
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
-	.loc 2 1681 0
+	.loc 2 1730 0
 	ldr	r1, [sp, #4]
-	.loc 2 1676 0
+	.loc 2 1725 0
 	str	r3, [sp, #20]
-.LVL1289:
-	.loc 2 1681 0
-	ldr	r3, .L1265
+.LVL1297:
+	.loc 2 1730 0
+	ldr	r3, .L1270
 	ldrh	r3, [r3]
 	cmp	r3, r1
 	mov	r3, #0
-	bne	.L1131
-	.loc 2 1682 0
+	bne	.L1136
+	.loc 2 1731 0
 	strh	r3, [r0, #4]	@ movhi
-.LVL1290:
-.L1263:
-	.loc 2 1989 0
+.LVL1298:
+.L1268:
+	.loc 2 2038 0
 	strb	r3, [r8, #6]
-.LVL1291:
-.L1257:
-	.loc 2 2010 0
+.LVL1299:
+.L1262:
+	.loc 2 2059 0
 	movs	r0, #0
 	add	sp, sp, #48
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1292:
-.L1131:
+.LVL1300:
+.L1136:
 	.cfi_restore_state
-	.loc 2 1689 0
+	.loc 2 1738 0
 	ldrh	r0, [r0, #16]
-.LVL1293:
-.L1132:
-	.loc 2 1690 0
+.LVL1301:
+.L1137:
+	.loc 2 1739 0
 	cmp	r0, r2
 	uxth	r5, r3
-.LVL1294:
+.LVL1302:
 	add	r3, r3, #1
-	beq	.L1133
-	.loc 2 1697 0
+	beq	.L1138
+	.loc 2 1746 0
 	movs	r1, #1
 	bl	FtlGetLastWrittenPage
-.LVL1295:
+.LVL1303:
 	mov	r4, r0
-.LVL1296:
-	.loc 2 1705 0
+.LVL1304:
+	.loc 2 1754 0
 	adds	r0, r0, #1
-.LVL1297:
-	beq	.L1134
-	.loc 2 1717 0
-	ldr	r3, .L1265+4
-	.loc 2 1722 0
+.LVL1305:
+	beq	.L1139
+	.loc 2 1766 0
+	ldr	r3, .L1270+4
+	.loc 2 1771 0
 	movs	r2, #0
 	mov	r5, r2
-.LVL1298:
-	.loc 2 1719 0
+.LVL1306:
+	.loc 2 1768 0
 	movw	fp, #65535
-	.loc 2 1720 0
+	.loc 2 1769 0
 	mov	r10, #20
-	.loc 2 1717 0
+	.loc 2 1766 0
 	ldrh	ip, [r3]
-	.loc 2 1720 0
-	ldr	r3, .L1265+8
+	.loc 2 1769 0
+	ldr	r3, .L1270+8
 	ldr	r0, [r3]
-	.loc 2 1721 0
-	ldr	r3, .L1265+12
+	.loc 2 1770 0
+	ldr	r3, .L1270+12
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
-	ldr	r3, .L1265+16
+	ldr	r3, .L1270+16
 	ldrh	r7, [r3]
-	.loc 2 1722 0
-	ldr	r3, .L1265+20
+	.loc 2 1771 0
+	ldr	r3, .L1270+20
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L1265+24
+	ldr	r3, .L1270+24
 	ldrh	lr, [r3]
 	add	r3, r8, #16
 	str	r3, [sp, #16]
 	str	r3, [sp]
-.L1135:
-.LVL1299:
-	.loc 2 1717 0 discriminator 1
+.L1140:
+.LVL1307:
+	.loc 2 1766 0 discriminator 1
 	uxth	r3, r2
 	cmp	ip, r3
-	bhi	.L1139
-	.loc 2 1727 0
+	bhi	.L1144
+	.loc 2 1776 0
 	movs	r2, #0
-.LVL1300:
+.LVL1308:
 	mov	r1, r5
 	bl	FlashReadPages
-.LVL1301:
-	.loc 2 1728 0
-	ldr	r2, .L1265+28
-	.loc 2 1742 0
+.LVL1309:
+	.loc 2 1777 0
+	ldr	r2, .L1270+28
+	.loc 2 1791 0
 	uxth	r1, r4
-	.loc 2 1666 0
+	.loc 2 1715 0
 	movw	fp, #65535
-	.loc 2 1742 0
+	.loc 2 1791 0
 	str	r1, [sp, #12]
-	.loc 2 1728 0
+	.loc 2 1777 0
 	ldr	r3, [r2]
 	subs	r3, r3, #1
 	str	r3, [sp]
-.LVL1302:
-	.loc 2 1730 0
-	ldr	r3, .L1265+8
-.LVL1303:
+.LVL1310:
+	.loc 2 1779 0
+	ldr	r3, .L1270+8
+.LVL1311:
 	ldr	r10, [r3]
-	.loc 2 1729 0
+	.loc 2 1778 0
 	movs	r3, #0
 	mov	r7, r10
-.LVL1304:
-.L1140:
+.LVL1312:
+.L1145:
 	uxth	r1, r3
-.LVL1305:
-	.loc 2 1729 0 is_stmt 0 discriminator 1
+.LVL1313:
+	.loc 2 1778 0 is_stmt 0 discriminator 1
 	cmp	r5, r1
-	bhi	.L1145
-	.loc 2 1745 0 is_stmt 1
-	bne	.L1143
-	.loc 2 1747 0
+	bhi	.L1150
+	.loc 2 1794 0 is_stmt 1
+	bne	.L1148
+	.loc 2 1796 0
 	adds	r3, r4, #1
 	uxth	r3, r3
 	str	r3, [sp, #8]
-.LVL1306:
-.L1258:
-	.loc 2 1753 0
+.LVL1314:
+.L1263:
+	.loc 2 1802 0
 	ldr	r0, [r10, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_plane
-.LVL1307:
-	.loc 2 1758 0
-	ldr	r3, .L1265
-	.loc 2 1753 0
+.LVL1315:
+	.loc 2 1807 0
+	ldr	r3, .L1270
+	.loc 2 1802 0
 	mov	r10, r0
-.LVL1308:
-	.loc 2 1758 0
+.LVL1316:
+	.loc 2 1807 0
 	ldr	r2, [sp, #8]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bne	.L1147
-	.loc 2 1759 0
+	bne	.L1152
+	.loc 2 1808 0
 	ldrh	r3, [sp, #8]
 	strh	r3, [r8, #2]	@ movhi
-	.loc 2 1760 0
+	.loc 2 1809 0
 	movs	r3, #0
 	strb	r3, [r8, #6]
-	.loc 2 1761 0
+	.loc 2 1810 0
 	strh	r3, [r8, #4]	@ movhi
-.L1147:
-	.loc 2 1764 0
+.L1152:
+	.loc 2 1813 0
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #4]
 	cmp	r3, r2
-	bne	.L1148
-	.loc 2 1764 0 is_stmt 0 discriminator 1
+	bne	.L1153
+	.loc 2 1813 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #20]
 	cmp	r10, r3
-	bne	.L1148
-	.loc 2 1765 0 is_stmt 1
+	bne	.L1153
+	.loc 2 1814 0 is_stmt 1
 	ldr	r1, [sp, #8]
 	mov	r2, r10
-.LVL1309:
-.L1264:
-	.loc 2 2004 0
+.LVL1317:
+.L1269:
+	.loc 2 2053 0
 	mov	r0, r8
 	bl	ftl_sb_update_avl_pages
-.LVL1310:
-	b	.L1257
-.LVL1311:
-.L1133:
-	.loc 2 1692 0
+.LVL1318:
+	b	.L1262
+.LVL1319:
+.L1138:
+	.loc 2 1741 0
 	uxth	r1, r3
 	adds	r1, r1, #8
 	ldrh	r0, [r8, r1, lsl #1]
-.LVL1312:
-	b	.L1132
-.LVL1313:
-.L1134:
-	.loc 2 1706 0
+.LVL1320:
+	b	.L1137
+.LVL1321:
+.L1139:
+	.loc 2 1755 0
 	ldr	r3, [sp, #4]
-	cbz	r3, .L1136
-	.loc 2 1706 0 is_stmt 0 discriminator 1
-	movw	r2, #1706
-	ldr	r1, .L1265+32
-	ldr	r0, .L1265+36
+	cbz	r3, .L1141
+	.loc 2 1755 0 is_stmt 0 discriminator 1
+	movw	r2, #1755
+	ldr	r1, .L1270+32
+	ldr	r0, .L1270+36
 	bl	printf
-.LVL1314:
-.L1136:
-	.loc 2 1707 0 is_stmt 1
+.LVL1322:
+.L1141:
+	.loc 2 1756 0 is_stmt 1
 	ldr	r3, [sp, #20]
-	cbz	r3, .L1137
-	.loc 2 1707 0 is_stmt 0 discriminator 1
+	cbz	r3, .L1142
+	.loc 2 1756 0 is_stmt 0 discriminator 1
 	cmp	r5, r3
-	beq	.L1137
-	.loc 2 1707 0 discriminator 2
-	movw	r2, #1707
-	ldr	r1, .L1265+32
-	ldr	r0, .L1265+36
+	beq	.L1142
+	.loc 2 1756 0 discriminator 2
+	movw	r2, #1756
+	ldr	r1, .L1270+32
+	ldr	r0, .L1270+36
 	bl	printf
-.LVL1315:
-.L1137:
-	.loc 2 1708 0 is_stmt 1
+.LVL1323:
+.L1142:
+	.loc 2 1757 0 is_stmt 1
 	movs	r3, #0
 	strh	r3, [r8, #2]	@ movhi
-	b	.L1263
-.LVL1316:
-.L1139:
-	.loc 2 1718 0
+	b	.L1268
+.LVL1324:
+.L1144:
+	.loc 2 1767 0
 	ldr	r1, [sp]
 	ldrh	r3, [r1], #2
-	.loc 2 1719 0
+	.loc 2 1768 0
 	cmp	r3, fp
-	.loc 2 1718 0
+	.loc 2 1767 0
 	str	r1, [sp]
-.LVL1317:
-	.loc 2 1719 0
-	beq	.L1138
-	.loc 2 1720 0
+.LVL1325:
+	.loc 2 1768 0
+	beq	.L1143
+	.loc 2 1769 0
 	mla	r1, r10, r5, r0
-	.loc 2 1721 0
+	.loc 2 1770 0
 	ldr	r6, [sp, #8]
-	.loc 2 1720 0
+	.loc 2 1769 0
 	orr	r3, r4, r3, lsl #10
-.LVL1318:
+.LVL1326:
 	str	r3, [r1, #4]
-	.loc 2 1721 0
+	.loc 2 1770 0
 	mul	r3, r7, r5
 	bic	r3, r3, #3
 	add	r3, r3, r6
-	.loc 2 1722 0
+	.loc 2 1771 0
 	ldr	r6, [sp, #12]
-	.loc 2 1721 0
+	.loc 2 1770 0
 	str	r3, [r1, #8]
-	.loc 2 1722 0
+	.loc 2 1771 0
 	mul	r3, lr, r5
-	.loc 2 1723 0
+	.loc 2 1772 0
 	adds	r5, r5, #1
-.LVL1319:
+.LVL1327:
 	uxth	r5, r5
-.LVL1320:
-	.loc 2 1722 0
+.LVL1328:
+	.loc 2 1771 0
 	bic	r3, r3, #3
 	add	r3, r3, r6
 	str	r3, [r1, #12]
-.L1138:
-.LVL1321:
+.L1143:
+.LVL1329:
 	adds	r2, r2, #1
-.LVL1322:
-	b	.L1135
-.LVL1323:
-.L1145:
-	.loc 2 1730 0
+.LVL1330:
+	b	.L1140
+.LVL1331:
+.L1150:
+	.loc 2 1779 0
 	ldr	r1, [r7]
-.LVL1324:
-	cbnz	r1, .L1141
-	.loc 2 1731 0
+.LVL1332:
+	cbnz	r1, .L1146
+	.loc 2 1780 0
 	ldr	r1, [r7, #12]
-	.loc 2 1732 0
+	.loc 2 1781 0
 	ldr	r6, [r1, #4]
-	.loc 2 1731 0
+	.loc 2 1780 0
 	str	r1, [sp, #8]
-.LVL1325:
-	.loc 2 1732 0
+.LVL1333:
+	.loc 2 1781 0
 	adds	r1, r6, #1
-.LVL1326:
-	beq	.L1142
-	.loc 2 1733 0
+.LVL1334:
+	beq	.L1147
+	.loc 2 1782 0
 	ldr	r1, [r2]
 	mov	r0, r6
 	bl	ftl_cmp_data_ver
-.LVL1327:
-	cbz	r0, .L1142
-	.loc 2 1735 0
+.LVL1335:
+	cbz	r0, .L1147
+	.loc 2 1784 0
 	adds	r6, r6, #1
 	str	r6, [r2]
-.L1142:
-	.loc 2 1738 0
+.L1147:
+	.loc 2 1787 0
 	ldr	r1, [sp, #8]
 	ldr	r1, [r1]
 	adds	r1, r1, #1
-	bne	.L1144
-.LVL1328:
-.L1143:
-	.loc 2 1752 0
+	bne	.L1149
+.LVL1336:
+.L1148:
+	.loc 2 1801 0
 	uxth	r2, r4
-	.loc 2 1753 0
+	.loc 2 1802 0
 	uxth	r3, r3
-	.loc 2 1752 0
+	.loc 2 1801 0
 	str	r2, [sp, #8]
-.LVL1329:
-	.loc 2 1753 0
+.LVL1337:
+	.loc 2 1802 0
 	movs	r2, #20
 	mla	r10, r2, r3, r10
-	b	.L1258
-.LVL1330:
-.L1141:
-	.loc 2 1742 0
+	b	.L1263
+.LVL1338:
+.L1146:
+	.loc 2 1791 0
 	ldr	fp, [sp, #12]
-.LVL1331:
-.L1144:
+.LVL1339:
+.L1149:
 	adds	r3, r3, #1
-.LVL1332:
+.LVL1340:
 	adds	r7, r7, #20
-	b	.L1140
-.LVL1333:
-.L1148:
-	.loc 2 1770 0
+	b	.L1145
+.LVL1341:
+.L1153:
+	.loc 2 1819 0
 	movw	r3, #65535
 	cmp	fp, r3
-	bne	.L1149
-	.loc 2 1770 0 is_stmt 0 discriminator 1
+	bne	.L1154
+	.loc 2 1819 0 is_stmt 0 discriminator 1
 	ldrb	r3, [r8, #8]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1150
-.L1149:
-.LVL1334:
-.LBB270:
-	.loc 2 1775 0 is_stmt 1
-	ldr	r3, .L1265+40
-	.loc 2 1774 0
+	bne	.L1155
+.L1154:
+.LVL1342:
+.LBB303:
+	.loc 2 1824 0 is_stmt 1
+	ldr	r3, .L1270+40
+	.loc 2 1823 0
 	uxth	r6, r4
-.LVL1335:
-	.loc 2 1778 0
+.LVL1343:
+	.loc 2 1827 0
 	uxth	r4, r4
-.LVL1336:
-	.loc 2 1785 0
-	ldr	r7, .L1265+8
-	.loc 2 1775 0
+.LVL1344:
+	.loc 2 1834 0
+	ldr	r7, .L1270+8
+	.loc 2 1824 0
 	ldr	r2, [r3]
 	adds	r2, r2, #1
-	.loc 2 1776 0
+	.loc 2 1825 0
 	itt	eq
 	ldreq	r2, [sp]
 	streq	r2, [r3]
-.LVL1337:
-	.loc 2 1778 0
+.LVL1345:
+	.loc 2 1827 0
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #7
 	cmp	r4, r3
-	.loc 2 1779 0
+	.loc 2 1828 0
 	itet	gt
 	subgt	r4, r6, #7
 	ldrle	r4, [sp, #4]
 	uxthgt	r4, r4
-.LVL1338:
-.L1153:
-	.loc 2 1780 0 discriminator 1
+.LVL1346:
+.L1158:
+	.loc 2 1829 0 discriminator 1
 	cmp	r4, r6
-	bhi	.L1163
-	.loc 2 1782 0
-	ldr	r3, .L1265+4
-	.loc 2 1784 0
+	bhi	.L1168
+	.loc 2 1831 0
+	ldr	r3, .L1270+4
+	.loc 2 1833 0
 	movw	lr, #65535
-	.loc 2 1785 0
+	.loc 2 1834 0
 	ldr	r0, [r7]
 	mov	ip, #20
-	.loc 2 1782 0
+	.loc 2 1831 0
 	ldrh	fp, [r3]
-	.loc 2 1785 0
+	.loc 2 1834 0
 	ldr	r3, [sp, #16]
 	str	r3, [sp, #12]
 	movs	r3, #0
 	mov	r5, r3
-	b	.L1164
-.LVL1339:
-.L1155:
-	.loc 2 1783 0
+	b	.L1169
+.LVL1347:
+.L1160:
+	.loc 2 1832 0
 	ldr	r1, [sp, #12]
 	ldrh	r2, [r1], #2
-	.loc 2 1784 0
+	.loc 2 1833 0
 	cmp	r2, lr
-	.loc 2 1783 0
+	.loc 2 1832 0
 	str	r1, [sp, #12]
-.LVL1340:
-	.loc 2 1784 0
-	beq	.L1154
-	.loc 2 1785 0
+.LVL1348:
+	.loc 2 1833 0
+	beq	.L1159
+	.loc 2 1834 0
 	mla	r1, ip, r5, r0
-	.loc 2 1786 0
+	.loc 2 1835 0
 	adds	r5, r5, #1
-.LVL1341:
-	.loc 2 1785 0
+.LVL1349:
+	.loc 2 1834 0
 	orr	r2, r4, r2, lsl #10
-.LVL1342:
-	.loc 2 1786 0
+.LVL1350:
+	.loc 2 1835 0
 	uxth	r5, r5
-.LVL1343:
-	.loc 2 1785 0
+.LVL1351:
+	.loc 2 1834 0
 	str	r2, [r1, #4]
-.L1154:
-.LVL1344:
+.L1159:
+.LVL1352:
 	adds	r3, r3, #1
-.LVL1345:
-.L1164:
-	.loc 2 1782 0 discriminator 1
+.LVL1353:
+.L1169:
+	.loc 2 1831 0 discriminator 1
 	uxth	r2, r3
 	cmp	fp, r2
-	bhi	.L1155
-	.loc 2 1789 0
+	bhi	.L1160
+	.loc 2 1838 0
 	mov	r1, r5
 	movs	r2, #0
 	bl	FlashReadPages
-.LVL1346:
-	ldr	r3, .L1265+40
+.LVL1354:
+	ldr	r3, .L1270+40
 	movs	r1, #20
-	.loc 2 1790 0
+	.loc 2 1839 0
 	movs	r0, #0
-	.loc 2 1793 0
+	.loc 2 1842 0
 	movw	ip, #65535
 	ldr	r2, [r3]
 	ldr	r3, [r7]
 	mla	r5, r1, r5, r3
-.LVL1347:
-.L1156:
-	.loc 2 1790 0 discriminator 1
+.LVL1355:
+.L1161:
+	.loc 2 1839 0 discriminator 1
 	cmp	r3, r5
-	bne	.L1161
-	cbz	r0, .L1162
-	ldr	r3, .L1265+40
+	bne	.L1166
+	cbz	r0, .L1167
+	ldr	r3, .L1270+40
 	str	r2, [r3]
-.L1162:
-	.loc 2 1780 0
+.L1167:
+	.loc 2 1829 0
 	adds	r4, r4, #1
-.LVL1348:
+.LVL1356:
 	uxth	r4, r4
-.LVL1349:
-	b	.L1153
-.L1266:
+.LVL1357:
+	b	.L1158
+.L1271:
 	.align	2
-.L1265:
+.L1270:
 	.word	.LANCHOR19
 	.word	.LANCHOR3
 	.word	.LANCHOR120
-	.word	.LANCHOR93
+	.word	.LANCHOR91
 	.word	.LANCHOR23
-	.word	.LANCHOR94
+	.word	.LANCHOR92
 	.word	.LANCHOR24
-	.word	.LANCHOR72
-	.word	.LANCHOR161
+	.word	.LANCHOR71
+	.word	.LANCHOR160
 	.word	.LC1
-	.word	.LANCHOR154
-.L1161:
-	.loc 2 1791 0
+	.word	.LANCHOR153
+.L1166:
+	.loc 2 1840 0
 	ldr	r1, [r3]
 	cmp	r1, #0
-	beq	.L1157
-	cbz	r0, .L1150
-.L1259:
-	.loc 2 1809 0
-	ldr	r3, .L1267
+	beq	.L1162
+	cbz	r0, .L1155
+.L1264:
+	.loc 2 1858 0
+	ldr	r3, .L1272
 	str	r2, [r3]
-.LVL1350:
-.L1150:
-.LBE270:
-	.loc 2 1814 0
-	ldr	r3, .L1267+4
+.LVL1358:
+.L1155:
+.LBE303:
+	.loc 2 1863 0
+	ldr	r3, .L1272+4
 	movs	r2, #1
-	.loc 2 1815 0
-	ldr	r0, .L1267+8
-	.loc 2 1824 0
-	ldr	r6, .L1267+12
-	.loc 2 1814 0
+	.loc 2 1864 0
+	ldr	r0, .L1272+8
+	.loc 2 1873 0
+	ldr	r6, .L1272+12
+	.loc 2 1863 0
 	strh	r2, [r3]	@ movhi
-	.loc 2 1815 0
+	.loc 2 1864 0
 	bl	FtlMapBlkWriteDump_data
-.LVL1351:
+.LVL1359:
 	ldr	fp, [sp, #4]
-.LVL1352:
-.L1165:
-	.loc 2 1821 0
-	ldr	r3, .L1267+16
-	.loc 2 1823 0
+.LVL1360:
+.L1170:
+	.loc 2 1870 0
+	ldr	r3, .L1272+16
+	.loc 2 1872 0
 	movw	lr, #65535
-	.loc 2 1824 0
+	.loc 2 1873 0
 	ldr	r0, [r6]
 	movs	r7, #20
-	.loc 2 1821 0
+	.loc 2 1870 0
 	ldr	r1, [sp, #16]
 	ldrh	r4, [r3]
 	movs	r3, #0
-	.loc 2 1820 0
+	.loc 2 1869 0
 	str	r3, [sp, #12]
-.LVL1353:
-.L1166:
-	.loc 2 1821 0 discriminator 1
+.LVL1361:
+.L1171:
+	.loc 2 1870 0 discriminator 1
 	uxth	r2, r3
 	cmp	r2, r4
-	bcc	.L1168
-	.loc 2 1828 0
+	bcc	.L1173
+	.loc 2 1877 0
 	movs	r2, #0
 	ldr	r1, [sp, #12]
 	bl	FlashReadPages
-.LVL1354:
-	.loc 2 1829 0
+.LVL1362:
+	.loc 2 1878 0
 	movs	r3, #0
-.LVL1355:
-.L1262:
+.LVL1363:
+.L1267:
 	str	r3, [sp, #24]
-.LVL1356:
-	.loc 2 1829 0 is_stmt 0 discriminator 2
+.LVL1364:
+	.loc 2 1878 0 is_stmt 0 discriminator 2
 	ldr	r2, [sp, #12]
 	ldrh	r3, [sp, #24]
 	cmp	r2, r3
-	bhi	.L1197
-	.loc 2 1983 0 is_stmt 1
-	ldr	r3, .L1267+20
-	.loc 2 1982 0
+	bhi	.L1202
+	.loc 2 2032 0 is_stmt 1
+	ldr	r3, .L1272+20
+	.loc 2 2031 0
 	add	fp, fp, #1
-.LVL1357:
+.LVL1365:
 	uxth	fp, fp
-.LVL1358:
-	.loc 2 1983 0
+.LVL1366:
+	.loc 2 2032 0
 	ldrh	r3, [r3]
 	cmp	r3, fp
-	bne	.L1165
-	.loc 2 1986 0
-	ldr	r2, .L1267+16
-	.loc 2 1988 0
+	bne	.L1170
+	.loc 2 2035 0
+	ldr	r2, .L1272+16
+	.loc 2 2037 0
 	movw	r0, #65535
-	.loc 2 1985 0
+	.loc 2 2034 0
 	movs	r3, #0
-	.loc 2 1984 0
+	.loc 2 2033 0
 	strh	fp, [r8, #2]	@ movhi
-	.loc 2 1985 0
+	.loc 2 2034 0
 	strh	r3, [r8, #4]	@ movhi
-.LVL1359:
-	.loc 2 1986 0
+.LVL1367:
+	.loc 2 2035 0
 	ldrh	r2, [r2]
-.LVL1360:
-.L1198:
-	.loc 2 1986 0 is_stmt 0 discriminator 1
+.LVL1368:
+.L1203:
+	.loc 2 2035 0 is_stmt 0 discriminator 1
 	uxth	r1, r3
 	cmp	r1, r2
-	bcs	.L1257
-	.loc 2 1987 0 is_stmt 1
+	bcs	.L1262
+	.loc 2 2036 0 is_stmt 1
 	ldr	r1, [sp, #16]
 	ldrh	r4, [r1], #2
-	.loc 2 1988 0
+	.loc 2 2037 0
 	cmp	r4, r0
-	.loc 2 1987 0
+	.loc 2 2036 0
 	str	r1, [sp, #16]
-.LVL1361:
+.LVL1369:
 	add	r1, r3, #1
-	.loc 2 1988 0
-	bne	.L1263
+	.loc 2 2037 0
+	bne	.L1268
 	mov	r3, r1
-.LVL1362:
-	b	.L1198
-.LVL1363:
-.L1157:
-.LBB271:
-	.loc 2 1792 0
+.LVL1370:
+	b	.L1203
+.LVL1371:
+.L1162:
+.LBB304:
+	.loc 2 1841 0
 	ldr	r1, [r3, #12]
-.LVL1364:
-	.loc 2 1793 0
+.LVL1372:
+	.loc 2 1842 0
 	ldrh	lr, [r1]
 	cmp	lr, ip
-	beq	.L1160
-	.loc 2 1795 0
+	beq	.L1165
+	.loc 2 1844 0
 	ldr	r1, [r1, #4]
-.LVL1365:
+.LVL1373:
 	cmp	r1, #-1
 	itt	ne
 	movne	r2, r1
 	movne	r0, #1
-.L1160:
+.L1165:
 	adds	r3, r3, #20
-.LVL1366:
-	b	.L1156
-.LVL1367:
-.L1163:
-	.loc 2 1809 0
-	mov	r2, #-1
-	b	.L1259
-.LVL1368:
+.LVL1374:
+	b	.L1161
+.LVL1375:
 .L1168:
-.LBE271:
-	.loc 2 1822 0
+	.loc 2 1858 0
+	mov	r2, #-1
+	b	.L1264
+.LVL1376:
+.L1173:
+.LBE304:
+	.loc 2 1871 0
 	ldrh	r2, [r1], #2
-.LVL1369:
-	.loc 2 1823 0
+.LVL1377:
+	.loc 2 1872 0
 	cmp	r2, lr
-	beq	.L1167
-	.loc 2 1824 0
+	beq	.L1172
+	.loc 2 1873 0
 	ldr	r5, [sp, #12]
 	orr	r2, fp, r2, lsl #10
-.LVL1370:
+.LVL1378:
 	mla	ip, r7, r5, r0
 	str	r2, [ip, #4]
-	.loc 2 1825 0
+	.loc 2 1874 0
 	mov	r2, r5
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r2, [sp, #12]
-.LVL1371:
-.L1167:
+.LVL1379:
+.L1172:
 	adds	r3, r3, #1
-.LVL1372:
-	b	.L1166
-.LVL1373:
-.L1197:
+.LVL1380:
+	b	.L1171
+.LVL1381:
+.L1202:
 	ldr	r3, [sp, #24]
 	movs	r5, #20
 	muls	r5, r3, r5
-	.loc 2 1830 0
+	.loc 2 1879 0
 	ldr	r3, [r6]
 	str	r3, [sp, #28]
 	adds	r7, r3, r5
 	ldr	r4, [r7, #4]
-	.loc 2 1831 0
+	.loc 2 1880 0
 	ubfx	r0, r4, #10, #16
-	.loc 2 1830 0
+	.loc 2 1879 0
 	str	r4, [sp, #44]
-	.loc 2 1831 0
+	.loc 2 1880 0
 	bl	P2V_plane
-.LVL1374:
-	.loc 2 1833 0
+.LVL1382:
+	.loc 2 1882 0
 	ldr	r3, [sp, #4]
 	cmp	fp, r3
-	bcc	.L1170
-	.loc 2 1833 0 is_stmt 0 discriminator 1
+	bcc	.L1175
+	.loc 2 1882 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #28]
-	bne	.L1171
-	.loc 2 1834 0 is_stmt 1
+	bne	.L1176
+	.loc 2 1883 0 is_stmt 1
 	ldr	r2, [sp, #20]
 	cmp	r2, r0
-	bhi	.L1170
-.L1171:
-	.loc 2 1837 0
+	bhi	.L1175
+.L1176:
+	.loc 2 1886 0
 	ldr	r2, [sp, #8]
 	cmp	fp, r2
-	bne	.L1172
-	.loc 2 1837 0 is_stmt 0 discriminator 1
+	bne	.L1177
+	.loc 2 1886 0 is_stmt 0 discriminator 1
 	cmp	r10, r0
-	beq	.L1173
-.L1172:
-.LVL1375:
-	.loc 2 1841 0 is_stmt 1
+	beq	.L1178
+.L1177:
+.LVL1383:
+	.loc 2 1890 0 is_stmt 1
 	ldr	r3, [r3, r5]
 	adds	r3, r3, #1
-	beq	.L1174
-	.loc 2 1842 0
+	beq	.L1179
+	.loc 2 1891 0
 	ldr	r3, [r7, #12]
-.LVL1376:
-	.loc 2 1843 0
+.LVL1384:
+	.loc 2 1892 0
 	movw	r2, #61589
 	ldrh	r1, [r3]
 	cmp	r1, r2
-	beq	.L1175
-.LVL1377:
-.L1181:
-.LBB272:
-	.loc 2 1876 0
+	beq	.L1180
+.LVL1385:
+.L1186:
+.LBB305:
+	.loc 2 1925 0
 	ldrh	r0, [r8]
-.LVL1378:
-.L1261:
-.LBE272:
-	.loc 2 1960 0
+.LVL1386:
+.L1266:
+.LBE305:
+	.loc 2 2009 0
 	bl	decrement_vpc_count
-.LVL1379:
-.L1170:
+.LVL1387:
+.L1175:
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	b	.L1262
-.LVL1380:
-.L1175:
-	.loc 2 1849 0
+	b	.L1267
+.LVL1388:
+.L1180:
+	.loc 2 1898 0
 	ldr	r2, [r3, #4]
 	str	r2, [sp]
-.LVL1381:
-	.loc 2 1850 0
+.LVL1389:
+	.loc 2 1899 0
 	adds	r2, r2, #1
-.LVL1382:
-	beq	.L1176
-	.loc 2 1851 0 discriminator 1
-	ldr	r2, .L1267+24
+.LVL1390:
+	beq	.L1181
+	.loc 2 1900 0 discriminator 1
+	ldr	r2, .L1272+24
 	ldr	r0, [sp]
-.LVL1383:
+.LVL1391:
 	ldr	r1, [r2]
 	bl	ftl_cmp_data_ver
-.LVL1384:
-	.loc 2 1850 0 discriminator 1
-	cbz	r0, .L1176
-	.loc 2 1853 0
+.LVL1392:
+	.loc 2 1899 0 discriminator 1
+	cbz	r0, .L1181
+	.loc 2 1902 0
 	ldr	r1, [sp]
 	adds	r1, r1, #1
 	str	r1, [r2]
-.L1176:
-	.loc 2 1857 0
+.L1181:
+	.loc 2 1906 0
 	ldr	r4, [r3, #8]
-.LVL1385:
-	.loc 2 1859 0
+.LVL1393:
+	.loc 2 1908 0
 	add	r1, sp, #40
-	.loc 2 1858 0
+	.loc 2 1907 0
 	ldr	r3, [r3, #12]
-.LVL1386:
-	.loc 2 1859 0
+.LVL1394:
+	.loc 2 1908 0
 	movs	r2, #0
 	mov	r0, r4
-	.loc 2 1858 0
+	.loc 2 1907 0
 	str	r3, [sp, #36]
-	.loc 2 1859 0
+	.loc 2 1908 0
 	bl	log2phys
-.LVL1387:
-	.loc 2 1860 0
-	ldr	r3, .L1267
+.LVL1395:
+	.loc 2 1909 0
+	ldr	r3, .L1272
 	ldr	r1, [r3]
 	adds	r3, r1, #1
-	beq	.L1177
-	.loc 2 1861 0 discriminator 1
+	beq	.L1182
+	.loc 2 1910 0 discriminator 1
 	ldr	r0, [sp]
 	bl	ftl_cmp_data_ver
-.LVL1388:
-	.loc 2 1860 0 discriminator 1
+.LVL1396:
+	.loc 2 1909 0 discriminator 1
 	cmp	r0, #0
-	beq	.L1177
-.LBB273:
-	.loc 2 1865 0
+	beq	.L1182
+.LBB306:
+	.loc 2 1914 0
 	ldr	r3, [sp, #36]
 	adds	r7, r3, #1
-	beq	.L1178
-	.loc 2 1866 0
+	beq	.L1183
+	.loc 2 1915 0
 	ldr	r0, [r6]
-	.loc 2 1868 0
+	.loc 2 1917 0
 	movs	r2, #0
 	movs	r1, #1
-	.loc 2 1866 0
+	.loc 2 1915 0
 	add	r0, r0, r5
-	.loc 2 1867 0
+	.loc 2 1916 0
 	str	r3, [r0, #4]
-	.loc 2 1866 0
+	.loc 2 1915 0
 	ldr	r7, [r0, #12]
-.LVL1389:
-	.loc 2 1868 0
+.LVL1397:
+	.loc 2 1917 0
 	bl	FlashReadPages
-.LVL1390:
-	.loc 2 1881 0
+.LVL1398:
+	.loc 2 1930 0
 	ldr	r2, [r6]
 	ldr	r1, [r2, r5]
 	adds	r3, r2, r5
 	adds	r1, r1, #1
-	bne	.L1179
-.LVL1391:
-.L1180:
-	.loc 2 1913 0
+	bne	.L1184
+.LVL1399:
+.L1185:
+	.loc 2 1962 0
 	mov	r3, #-1
-	.loc 2 1914 0
+	.loc 2 1963 0
 	ldrh	r0, [r8]
-	.loc 2 1913 0
+	.loc 2 1962 0
 	str	r3, [sp, #36]
-	.loc 2 1914 0
+	.loc 2 1963 0
 	bl	decrement_vpc_count
-.LVL1392:
-.L1188:
-.LBE273:
-	.loc 2 1954 0
+.LVL1400:
+.L1193:
+.LBE306:
+	.loc 2 2003 0
 	ldr	r7, [sp, #36]
 	adds	r0, r7, #1
-	beq	.L1170
-.L1201:
-	.loc 2 1956 0
+	beq	.L1175
+.L1206:
+	.loc 2 2005 0
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-.LVL1393:
-	.loc 2 1957 0
-	ldr	r3, .L1267+28
-	.loc 2 1956 0
+.LVL1401:
+	.loc 2 2006 0
+	ldr	r3, .L1272+28
+	.loc 2 2005 0
 	mov	r4, r0
-.LVL1394:
-	.loc 2 1957 0
+.LVL1402:
+	.loc 2 2006 0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bhi	.L1193
-	.loc 2 1957 0 is_stmt 0 discriminator 1
-	movw	r2, #1957
-	ldr	r1, .L1267+32
-	ldr	r0, .L1267+36
-.LVL1395:
+	bhi	.L1198
+	.loc 2 2006 0 is_stmt 0 discriminator 1
+	movw	r2, #2006
+	ldr	r1, .L1272+32
+	ldr	r0, .L1272+36
+.LVL1403:
 	bl	printf
-.LVL1396:
-.L1193:
-	.loc 2 1958 0 is_stmt 1
-	ldr	r3, .L1267+40
+.LVL1404:
+.L1198:
+	.loc 2 2007 0 is_stmt 1
+	ldr	r3, .L1272+40
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
 	cmp	r3, #0
-	beq	.L1194
-	.loc 2 1960 0
+	beq	.L1199
+	.loc 2 2009 0
 	mov	r0, r4
-	b	.L1261
-.LVL1397:
-.L1178:
-.LBB274:
-	.loc 2 1872 0
+	b	.L1266
+.LVL1405:
+.L1183:
+.LBB307:
+	.loc 2 1921 0
 	ldr	r3, [sp, #44]
 	ldr	r2, [sp, #40]
 	cmp	r2, r3
-	bne	.L1181
-	.loc 2 1873 0
+	bne	.L1186
+	.loc 2 1922 0
 	movs	r2, #1
 	add	r1, sp, #36
 	mov	r0, r4
 	bl	log2phys
-.LVL1398:
-	b	.L1181
-.LVL1399:
-.L1179:
-	.loc 2 1881 0 discriminator 1
+.LVL1406:
+	b	.L1186
+.LVL1407:
+.L1184:
+	.loc 2 1930 0 discriminator 1
 	ldr	r1, [r7, #8]
 	cmp	r4, r1
-	bne	.L1180
-	.loc 2 1882 0 discriminator 2
-	ldr	r0, .L1267
-	.loc 2 1869 0 discriminator 2
+	bne	.L1185
+	.loc 2 1931 0 discriminator 2
+	ldr	r0, .L1272
+	.loc 2 1918 0 discriminator 2
 	ldr	r1, [r7, #4]
-	.loc 2 1882 0 discriminator 2
+	.loc 2 1931 0 discriminator 2
 	ldr	r0, [r0]
-	.loc 2 1869 0 discriminator 2
+	.loc 2 1918 0 discriminator 2
 	str	r1, [sp, #28]
-	.loc 2 1882 0 discriminator 2
+	.loc 2 1931 0 discriminator 2
 	bl	ftl_cmp_data_ver
-.LVL1400:
-	.loc 2 1881 0 discriminator 2
+.LVL1408:
+	.loc 2 1930 0 discriminator 2
 	cmp	r0, #0
-	beq	.L1180
-	.loc 2 1883 0
+	beq	.L1185
+	.loc 2 1932 0
 	ldr	r1, [sp, #40]
 	ldr	r0, [sp, #44]
 	cmp	r1, r0
-	bne	.L1183
-.L1186:
-	.loc 2 1909 0
+	bne	.L1188
+.L1191:
+	.loc 2 1958 0
 	ldr	r1, [sp, #36]
 	mov	r0, r4
 	bl	FtlReUsePrevPpa
-.LVL1401:
-	b	.L1180
-.L1183:
-	.loc 2 1886 0
+.LVL1409:
+	b	.L1185
+.L1188:
+	.loc 2 1935 0
 	ldr	r0, [sp, #36]
 	cmp	r1, r0
-	beq	.L1180
-	.loc 2 1887 0
+	beq	.L1185
+	.loc 2 1936 0
 	adds	r0, r1, #1
-	beq	.L1184
-.LVL1402:
-	.loc 2 1889 0
+	beq	.L1189
+.LVL1410:
+	.loc 2 1938 0
 	str	r1, [r3, #4]
-	.loc 2 1890 0
+	.loc 2 1939 0
 	movs	r2, #0
 	movs	r1, #1
 	mov	r0, r3
-	.loc 2 1888 0
+	.loc 2 1937 0
 	ldr	r7, [r3, #12]
-	.loc 2 1890 0
+	.loc 2 1939 0
 	bl	FlashReadPages
-.LVL1403:
-.L1185:
-	.loc 2 1895 0
+.LVL1411:
+.L1190:
+	.loc 2 1944 0
 	ldr	r3, [r6]
 	ldr	r3, [r3, r5]
 	adds	r3, r3, #1
-	beq	.L1186
-	.loc 2 1896 0
+	beq	.L1191
+	.loc 2 1945 0
 	ldr	r3, [r7, #4]
-.LVL1404:
-	.loc 2 1897 0
-	ldr	r2, .L1267
+.LVL1412:
+	.loc 2 1946 0
+	ldr	r2, .L1272
 	mov	r1, r3
 	ldr	r0, [r2]
 	bl	ftl_cmp_data_ver
-.LVL1405:
+.LVL1413:
 	cmp	r0, #0
-	beq	.L1186
-	.loc 2 1898 0
+	beq	.L1191
+	.loc 2 1947 0
 	mov	r1, r3
 	ldr	r0, [sp, #28]
 	bl	ftl_cmp_data_ver
-.LVL1406:
+.LVL1414:
 	cmp	r0, #0
-	beq	.L1180
-.LVL1407:
-	b	.L1186
-.LVL1408:
-.L1184:
-	.loc 2 1892 0
+	beq	.L1185
+.LVL1415:
+	b	.L1191
+.LVL1416:
+.L1189:
+	.loc 2 1941 0
 	str	r1, [r2, r5]
-	b	.L1185
-.L1268:
+	b	.L1190
+.L1273:
 	.align	2
-.L1267:
-	.word	.LANCHOR154
-	.word	.LANCHOR162
+.L1272:
+	.word	.LANCHOR153
+	.word	.LANCHOR161
 	.word	.LANCHOR144
 	.word	.LANCHOR120
 	.word	.LANCHOR3
 	.word	.LANCHOR19
-	.word	.LANCHOR72
+	.word	.LANCHOR71
 	.word	.LANCHOR5
-	.word	.LANCHOR161
+	.word	.LANCHOR160
 	.word	.LC1
-	.word	.LANCHOR43
-.LVL1409:
-.L1177:
-.LBE274:
-	.loc 2 1915 0
+	.word	.LANCHOR42
+.LVL1417:
+.L1182:
+.LBE307:
+	.loc 2 1964 0
 	ldr	r3, [sp, #44]
 	ldr	r2, [sp, #40]
 	cmp	r2, r3
-	beq	.L1188
-	.loc 2 1917 0
+	beq	.L1193
+	.loc 2 1966 0
 	movs	r2, #1
 	add	r1, sp, #44
 	mov	r0, r4
 	bl	log2phys
-.LVL1410:
-	.loc 2 1918 0
+.LVL1418:
+	.loc 2 1967 0
 	ldr	r7, [sp, #40]
 	adds	r5, r7, #1
-	beq	.L1188
-	.loc 2 1918 0 is_stmt 0 discriminator 1
+	beq	.L1193
+	.loc 2 1967 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #36]
 	cmp	r7, r3
-	beq	.L1201
-	.loc 2 1919 0 is_stmt 1
+	beq	.L1206
+	.loc 2 1968 0 is_stmt 1
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-.LVL1411:
-	.loc 2 1921 0
-	ldr	r3, .L1269
+.LVL1419:
+	.loc 2 1970 0
+	ldr	r3, .L1274
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L1192
-	.loc 2 1922 0 discriminator 1
-	ldr	r3, .L1269+4
-	.loc 2 1921 0 discriminator 1
+	beq	.L1197
+	.loc 2 1971 0 discriminator 1
+	ldr	r3, .L1274+4
+	.loc 2 1970 0 discriminator 1
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L1192
-	.loc 2 1923 0
-	ldr	r3, .L1269+8
-	.loc 2 1922 0
+	beq	.L1197
+	.loc 2 1972 0
+	ldr	r3, .L1274+8
+	.loc 2 1971 0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L1188
-.L1192:
-.LVL1412:
-.LBB275:
-	.loc 2 1927 0
+	bne	.L1193
+.L1197:
+.LVL1420:
+.LBB308:
+	.loc 2 1976 0
 	ldr	r0, [r6]
-.LVL1413:
-	.loc 2 1930 0
+.LVL1421:
+	.loc 2 1979 0
 	movs	r2, #0
 	movs	r1, #1
-	.loc 2 1929 0
+	.loc 2 1978 0
 	str	r7, [r0, #4]
-	.loc 2 1927 0
+	.loc 2 1976 0
 	ldr	r5, [r0, #12]
-.LVL1414:
-	.loc 2 1930 0
+.LVL1422:
+	.loc 2 1979 0
 	bl	FlashReadPages
-.LVL1415:
-	.loc 2 1933 0
+.LVL1423:
+	.loc 2 1982 0
 	ldr	r3, [r6]
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L1188
-	.loc 2 1934 0
+	beq	.L1193
+	.loc 2 1983 0
 	ldr	r1, [r5, #4]
 	ldr	r0, [sp]
 	bl	ftl_cmp_data_ver
-.LVL1416:
+.LVL1424:
 	cmp	r0, #0
-	bne	.L1188
-	.loc 2 1941 0
+	bne	.L1193
+	.loc 2 1990 0
 	movs	r2, #1
 	add	r1, sp, #40
-.LVL1417:
+.LVL1425:
 	mov	r0, r4
 	bl	log2phys
-.LVL1418:
-	b	.L1188
-.LVL1419:
-.L1194:
-.LBE275:
-	.loc 2 1962 0
+.LVL1426:
+	b	.L1193
+.LVL1427:
+.L1199:
+.LBE308:
+	.loc 2 2011 0
 	mov	r1, r4
-	ldr	r0, .L1269+12
+	ldr	r0, .L1274+12
 	bl	printf
-.LVL1420:
-	b	.L1170
-.LVL1421:
-.L1174:
-	.loc 2 1969 0
-	ldr	r3, .L1269+16
+.LVL1428:
+	b	.L1175
+.LVL1429:
+.L1179:
+	.loc 2 2018 0
+	ldr	r3, .L1274+16
 	ldr	r3, [r3]
 	cmp	r3, #31
-	bhi	.L1195
-	.loc 2 1970 0
-	ldr	r2, .L1269+20
+	bhi	.L1200
+	.loc 2 2019 0
+	ldr	r2, .L1274+20
 	str	r4, [r2, r3, lsl #2]
-	.loc 2 1971 0
+	.loc 2 2020 0
 	adds	r3, r3, #1
-	ldr	r2, .L1269+16
+	ldr	r2, .L1274+16
 	str	r3, [r2]
-.L1195:
-	.loc 2 1973 0
+.L1200:
+	.loc 2 2022 0
 	ldrh	r0, [r8]
-.LVL1422:
+.LVL1430:
 	bl	decrement_vpc_count
-.LVL1423:
-	.loc 2 1975 0
-	ldr	r3, .L1269+24
+.LVL1431:
+	.loc 2 2024 0
+	ldr	r3, .L1274+24
 	ldr	r2, [r3]
 	adds	r1, r2, #1
-	bne	.L1196
-	.loc 2 1976 0
+	bne	.L1201
+	.loc 2 2025 0
 	ldr	r2, [sp]
-.L1260:
-	.loc 2 1978 0
+.L1265:
+	.loc 2 2027 0
 	str	r2, [r3]
-	b	.L1170
-.L1196:
-	.loc 2 1977 0
+	b	.L1175
+.L1201:
+	.loc 2 2026 0
 	ldr	r1, [sp]
 	cmp	r1, r2
-	bcs	.L1170
-	.loc 2 1978 0
+	bcs	.L1175
+	.loc 2 2027 0
 	mov	r2, r1
-	b	.L1260
-.LVL1424:
-.L1173:
-	.loc 2 2002 0
+	b	.L1265
+.LVL1432:
+.L1178:
+	.loc 2 2051 0
 	strb	r10, [r8, #6]
-	.loc 2 2004 0
+	.loc 2 2053 0
 	mov	r2, r10
-	.loc 2 2003 0
+	.loc 2 2052 0
 	strh	fp, [r8, #2]	@ movhi
-	.loc 2 2004 0
+	.loc 2 2053 0
 	mov	r1, fp
-	b	.L1264
-.L1270:
+	b	.L1269
+.L1275:
 	.align	2
-.L1269:
+.L1274:
 	.word	.LANCHOR51
 	.word	.LANCHOR52
 	.word	.LANCHOR53
-	.word	.LC99
+	.word	.LC102
+	.word	.LANCHOR162
 	.word	.LANCHOR163
-	.word	.LANCHOR164
-	.word	.LANCHOR154
+	.word	.LANCHOR153
 	.cfi_endproc
 .LFE284:
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
@@ -14922,132 +15037,144 @@ FtlRecoverySuperblock:
 	.type	FtlSuperblockPowerLostFix, %function
 FtlSuperblockPowerLostFix:
 .LFB291:
-	.loc 2 2156 0
+	.loc 2 2205 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1425:
-	push	{r4, r5, r6, r7, lr}
-	.cfi_def_cfa_offset 20
-	.cfi_offset 4, -20
-	.cfi_offset 5, -16
-	.cfi_offset 6, -12
-	.cfi_offset 7, -8
+.LVL1433:
+	push	{r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
 	.cfi_offset 14, -4
-	mov	r4, r0
-	.loc 2 2169 0
-	ldr	r6, .L1282
-	.loc 2 2156 0
-	sub	sp, sp, #28
+	.loc 2 2211 0
+	mov	r3, #-1
+	.loc 2 2205 0
+	sub	sp, sp, #24
 	.cfi_def_cfa_offset 48
-	.loc 2 2162 0
-	movs	r5, #7
-	.loc 2 2170 0
-	ldr	r7, .L1282+4
-.LVL1426:
-.L1272:
-	.loc 2 2162 0
-	subs	r5, r5, #1
-.LVL1427:
-	beq	.L1274
-.LVL1428:
-	.loc 2 2163 0
+	.loc 2 2213 0
+	ldr	r2, .L1287
+	.loc 2 2219 0
+	movs	r6, #0
+	.loc 2 2205 0
+	mov	r4, r0
+	.loc 2 2211 0
+	str	r3, [sp, #20]
+	.loc 2 2223 0
+	movs	r7, #7
+	.loc 2 2212 0
+	ldr	r3, .L1287+4
+	.loc 2 2213 0
+	ldr	r5, [r2]
+	.loc 2 2216 0
+	mvn	r2, #2
+	.loc 2 2229 0
+	ldr	r8, .L1287+16
+	.loc 2 2212 0
+	ldr	r3, [r3]
+	.loc 2 2213 0
+	str	r5, [sp, #16]
+.LVL1434:
+	.loc 2 2212 0
+	str	r3, [sp, #12]
+	.loc 2 2216 0
+	str	r2, [r5, #8]
+	.loc 2 2217 0
+	mvn	r2, #1
+	str	r2, [r5, #12]
+	.loc 2 2218 0
+	ldrh	r2, [r0]
+	.loc 2 2219 0
+	strh	r6, [r5]	@ movhi
+	.loc 2 2218 0
+	strh	r2, [r5, #2]	@ movhi
+	.loc 2 2220 0
+	movw	r2, #61589
+	str	r2, [r3]
+	.loc 2 2221 0
+	add	r2, r2, #304087040
+	add	r2, r2, #1269760
+	addw	r2, r2, #1507
+	str	r2, [r3, #4]
+.LVL1435:
+.L1277:
+	.loc 2 2223 0
+	subs	r7, r7, #1
+.LVL1436:
+	beq	.L1279
+.LVL1437:
+	.loc 2 2224 0
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1273
-.LVL1429:
-.L1274:
-	.loc 2 2183 0
-	ldr	r3, .L1282+8
+	cbnz	r3, .L1278
+.LVL1438:
+.L1279:
+	.loc 2 2234 0
+	ldr	r3, .L1287+8
 	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
-	.loc 2 2184 0
-	ldr	r3, .L1282+12
+	.loc 2 2235 0
+	ldr	r3, .L1287+12
 	ldrh	r3, [r3]
 	strh	r3, [r4, #2]	@ movhi
-	.loc 2 2185 0
+	.loc 2 2236 0
 	movs	r3, #0
 	strb	r3, [r4, #6]
-	.loc 2 2186 0
+	.loc 2 2237 0
 	strh	r3, [r4, #4]	@ movhi
-	.loc 2 2188 0
-	add	sp, sp, #28
+	.loc 2 2238 0
+	add	sp, sp, #24
 	.cfi_remember_state
-	.cfi_def_cfa_offset 20
+	.cfi_def_cfa_offset 24
 	@ sp needed
-	pop	{r4, r5, r6, r7, pc}
-.LVL1430:
-.L1273:
+	pop	{r4, r5, r6, r7, r8, pc}
+.LVL1439:
+.L1278:
 	.cfi_restore_state
-	.loc 2 2165 0
+	.loc 2 2226 0
 	mov	r0, r4
 	bl	get_new_active_ppa
-.LVL1431:
+.LVL1440:
 	str	r0, [sp, #8]
-	.loc 2 2166 0
+	.loc 2 2227 0
 	adds	r0, r0, #1
-	beq	.L1274
-	.loc 2 2170 0
-	ldr	r1, [r7]
-	.loc 2 2168 0
-	mov	r3, #-1
-	.loc 2 2169 0
-	ldr	r2, [r6]
-	.loc 2 2178 0
-	ldr	r0, .L1282+16
-	.loc 2 2168 0
-	str	r3, [sp, #20]
-	.loc 2 2170 0
-	str	r1, [sp, #16]
-.LVL1432:
-	.loc 2 2169 0
-	str	r2, [sp, #12]
-	.loc 2 2174 0
-	str	r3, [r1, #12]
-	.loc 2 2178 0
-	ldr	r2, [r0]
-	.loc 2 2173 0
-	str	r3, [r1, #8]
-	.loc 2 2175 0
-	ldrh	r3, [r4]
-	.loc 2 2178 0
-	str	r2, [r1, #4]
-	adds	r2, r2, #1
-	.loc 2 2175 0
-	strh	r3, [r1, #2]	@ movhi
-	.loc 2 2176 0
-	movs	r3, #0
-	strh	r3, [r1]	@ movhi
-	.loc 2 2178 0
-	adds	r1, r2, #1
-.LVL1433:
-	it	eq
-	moveq	r2, r3
-	.loc 2 2179 0
+	beq	.L1279
+	.loc 2 2229 0
+	ldr	r3, [r8]
+	.loc 2 2230 0
 	movs	r1, #1
-	.loc 2 2178 0
-	str	r2, [r0]
-	.loc 2 2179 0
-	mov	r2, r3
 	add	r0, sp, #4
+	.loc 2 2229 0
+	str	r3, [r5, #4]
+	adds	r3, r3, #1
+	adds	r2, r3, #1
+	it	eq
+	moveq	r3, r6
+	str	r3, [r8]
+	.loc 2 2230 0
+	movs	r3, #0
+	mov	r2, r3
 	bl	FlashProgPages
-.LVL1434:
-	.loc 2 2180 0
+.LVL1441:
+	.loc 2 2231 0
 	ldrh	r0, [r4]
 	bl	decrement_vpc_count
-.LVL1435:
-	b	.L1272
-.L1283:
+.LVL1442:
+	b	.L1277
+.L1288:
 	.align	2
-.L1282:
-	.word	.LANCHOR39
-	.word	.LANCHOR109
-	.word	.LANCHOR43
+.L1287:
+	.word	.LANCHOR108
+	.word	.LANCHOR107
+	.word	.LANCHOR42
 	.word	.LANCHOR19
-	.word	.LANCHOR72
+	.word	.LANCHOR71
 	.cfi_endproc
 .LFE291:
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
@@ -15076,34 +15203,34 @@ FtlLoadBbt:
 	.cfi_offset 10, -8
 	.cfi_offset 14, -4
 	.loc 4 180 0
-	ldr	r8, .L1313+40
-	ldr	r4, .L1313
+	ldr	r8, .L1318+40
+	ldr	r4, .L1318
 	ldr	r3, [r8]
 	.loc 4 184 0
-	ldr	r7, .L1313+4
+	ldr	r7, .L1318+4
 	.loc 4 186 0
 	mov	r10, r4
 	.loc 4 180 0
 	str	r3, [r4, #8]
 	.loc 4 181 0
-	ldr	r3, .L1313+8
+	ldr	r3, .L1318+8
 	ldr	r6, [r3]
 	str	r6, [r4, #12]
-.LVL1436:
+.LVL1443:
 	.loc 4 183 0
 	bl	FtlBbtMemInit
-.LVL1437:
+.LVL1444:
 	.loc 4 184 0
 	ldrh	r5, [r7]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.LVL1438:
-.L1285:
+.LVL1445:
+.L1290:
 	.loc 4 184 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r7]
 	subs	r3, r3, #15
 	cmp	r3, r5
-	bgt	.L1288
+	bgt	.L1293
 	.loc 4 185 0 is_stmt 1
 	lsls	r3, r5, #10
 	.loc 4 186 0
@@ -15114,11 +15241,11 @@ FtlLoadBbt:
 	str	r3, [r4, #4]
 	.loc 4 186 0
 	bl	FlashReadPages
-.LVL1439:
+.LVL1446:
 	.loc 4 187 0
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	bne	.L1286
+	bne	.L1291
 	.loc 4 188 0
 	ldr	r3, [r4, #4]
 	.loc 4 189 0
@@ -15130,19 +15257,19 @@ FtlLoadBbt:
 	str	r3, [r4, #4]
 	.loc 4 189 0
 	bl	FlashReadPages
-.LVL1440:
-.L1286:
+.LVL1447:
+.L1291:
 	.loc 4 191 0
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L1287
+	beq	.L1292
 	.loc 4 196 0
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L1287
+	bne	.L1292
 	.loc 4 198 0
-	ldr	r3, .L1313+12
+	ldr	r3, .L1318+12
 	.loc 4 199 0
 	ldr	r2, [r6, #4]
 	.loc 4 198 0
@@ -15152,43 +15279,43 @@ FtlLoadBbt:
 	.loc 4 200 0
 	ldrh	r2, [r6, #8]
 	strh	r2, [r3, #4]	@ movhi
-.L1288:
+.L1293:
 	.loc 4 216 0
-	ldr	r5, .L1313+12
-.LVL1441:
+	ldr	r5, .L1318+12
+.LVL1448:
 	movw	r2, #65535
 	ldrh	r3, [r5]
 	cmp	r3, r2
-	beq	.L1302
+	beq	.L1307
 	.loc 4 222 0
 	ldrh	r3, [r5, #4]
 	cmp	r3, r2
-	beq	.L1292
+	beq	.L1297
 	.loc 4 224 0
 	lsls	r3, r3, #10
 	.loc 4 225 0
 	movs	r2, #1
 	mov	r1, r2
-	ldr	r0, .L1313
+	ldr	r0, .L1318
 	.loc 4 224 0
 	str	r3, [r4, #4]
 	.loc 4 225 0
 	bl	FlashReadPages
-.LVL1442:
+.LVL1449:
 	.loc 4 226 0
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L1292
+	beq	.L1297
 	.loc 4 229 0
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L1292
+	bne	.L1297
 	.loc 4 229 0 is_stmt 0 discriminator 1
 	ldr	r3, [r6, #4]
 	ldr	r2, [r5, #8]
 	cmp	r3, r2
-	bls	.L1292
+	bls	.L1297
 	.loc 4 231 0 is_stmt 1
 	ldrh	r2, [r5, #4]
 	.loc 4 232 0
@@ -15199,30 +15326,30 @@ FtlLoadBbt:
 	strh	r2, [r5]	@ movhi
 	.loc 4 233 0
 	strh	r3, [r5, #4]	@ movhi
-.L1292:
+.L1297:
 	.loc 4 245 0
-	ldr	r10, .L1313
+	ldr	r10, .L1318
 	.loc 4 238 0
 	movs	r1, #1
 	ldrh	r0, [r5]
 	bl	FtlGetLastWrittenPage
-.LVL1443:
+.LVL1450:
 	sxth	r7, r0
-.LVL1444:
+.LVL1451:
 	.loc 4 239 0
 	adds	r0, r0, #1
 	strh	r0, [r5, #2]	@ movhi
-.L1294:
+.L1299:
 	.loc 4 241 0
 	cmp	r7, #0
-	bge	.L1297
+	bge	.L1302
 	.loc 4 254 0
 	movs	r2, #254
-	ldr	r1, .L1313+16
-	ldr	r0, .L1313+20
+	ldr	r1, .L1318+16
+	ldr	r0, .L1318+20
 	bl	printf
-.LVL1445:
-.L1296:
+.LVL1452:
+.L1301:
 	.loc 4 255 0
 	ldrh	r3, [r6, #10]
 	.loc 4 257 0
@@ -15232,53 +15359,53 @@ FtlLoadBbt:
 	.loc 4 257 0
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1299
+	beq	.L1304
 	.loc 4 259 0
-	ldr	r3, .L1313+24
+	ldr	r3, .L1318+24
 	ldr	r2, [r3]
 	cmp	r0, r2
-	beq	.L1299
+	beq	.L1304
 	.loc 4 259 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1313+28
+	ldr	r3, .L1318+28
 	ldrh	r3, [r3]
 	lsrs	r3, r3, #2
 	cmp	r2, r3
-	bcs	.L1299
+	bcs	.L1304
 	.loc 4 261 0 is_stmt 1
 	cmp	r0, r3
-	bcs	.L1299
+	bcs	.L1304
 	.loc 4 263 0
 	bl	FtlSysBlkNumInit
-.LVL1446:
-.L1299:
-	ldr	r6, .L1313+32
-.LVL1447:
+.LVL1453:
+.L1304:
+	ldr	r6, .L1318+32
+.LVL1454:
 	.loc 4 173 0 discriminator 1
 	movs	r5, #0
 	.loc 4 268 0 discriminator 1
-	ldr	r7, .L1313+36
-.LVL1448:
+	ldr	r7, .L1318+36
+.LVL1455:
 	.loc 4 269 0 discriminator 1
-	ldr	r8, .L1313+44
-.L1300:
-.LVL1449:
+	ldr	r8, .L1318+44
+.L1305:
+.LVL1456:
 	.loc 4 268 0 discriminator 1
 	ldrh	r3, [r7]
 	cmp	r5, r3
-	bcc	.L1301
+	bcc	.L1306
 	.loc 4 275 0
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.LVL1450:
-.L1287:
+.LVL1457:
+.L1292:
 	.loc 4 184 0 discriminator 2
 	subs	r5, r5, #1
-.LVL1451:
+.LVL1458:
 	uxth	r5, r5
-.LVL1452:
-	b	.L1285
-.LVL1453:
-.L1297:
+.LVL1459:
+	b	.L1290
+.LVL1460:
+.L1302:
 	.loc 4 243 0
 	ldrh	r3, [r5]
 	.loc 4 245 0
@@ -15293,24 +15420,24 @@ FtlLoadBbt:
 	str	r3, [r4, #8]
 	.loc 4 245 0
 	bl	FlashReadPages
-.LVL1454:
+.LVL1461:
 	.loc 4 247 0
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L1295
+	beq	.L1300
 	.loc 4 247 0 is_stmt 0 discriminator 1
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	beq	.L1296
-.L1295:
+	beq	.L1301
+.L1300:
 	subs	r7, r7, #1
-.LVL1455:
+.LVL1462:
 	sxth	r7, r7
-.LVL1456:
-	b	.L1294
-.LVL1457:
-.L1301:
+.LVL1463:
+	b	.L1299
+.LVL1464:
+.L1306:
 	.loc 4 269 0 is_stmt 1 discriminator 3
 	ldrh	r2, [r8]
 	ldr	r1, [r4, #8]
@@ -15319,31 +15446,31 @@ FtlLoadBbt:
 	mla	r1, r5, r2, r1
 	.loc 4 268 0 discriminator 3
 	adds	r5, r5, #1
-.LVL1458:
+.LVL1465:
 	.loc 4 269 0 discriminator 3
 	bl	ftl_memcpy
-.LVL1459:
-	b	.L1300
-.LVL1460:
-.L1302:
+.LVL1466:
+	b	.L1305
+.LVL1467:
+.L1307:
 	.loc 4 218 0
 	mov	r0, #-1
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.LVL1461:
-.L1314:
+.LVL1468:
+.L1319:
 	.align	2
-.L1313:
-	.word	.LANCHOR108
+.L1318:
+	.word	.LANCHOR106
 	.word	.LANCHOR17
-	.word	.LANCHOR109
+	.word	.LANCHOR108
 	.word	.LANCHOR37
-	.word	.LANCHOR165
+	.word	.LANCHOR164
 	.word	.LC1
 	.word	.LANCHOR2
 	.word	.LANCHOR6
 	.word	.LANCHOR37+24
 	.word	.LANCHOR10
-	.word	.LANCHOR39
+	.word	.LANCHOR107
 	.word	.LANCHOR137
 	.cfi_endproc
 .LFE232:
@@ -15374,79 +15501,79 @@ FtlMakeBbt:
 	.cfi_offset 14, -4
 	.loc 4 327 0
 	movs	r6, #0
-	ldr	r7, .L1334
+	ldr	r7, .L1339
 	.loc 4 325 0
 	bl	FtlBbtMemInit
-.LVL1462:
+.LVL1469:
 	sub	r8, r7, #18
 	.loc 4 326 0
 	bl	FtlLoadFactoryBbt
-.LVL1463:
-.L1316:
+.LVL1470:
+.L1321:
 	.loc 4 327 0 discriminator 1
-	ldr	r3, .L1334+4
+	ldr	r3, .L1339+4
 	ldrh	r3, [r3]
 	cmp	r6, r3
-	bcc	.L1322
+	bcc	.L1327
 	.loc 4 381 0 discriminator 1
-	ldr	r5, .L1334+8
+	ldr	r5, .L1339+8
 	movs	r4, #0
-.L1323:
+.L1328:
 	ldrh	r3, [r5]
 	uxth	r0, r4
-.LVL1464:
+.LVL1471:
 	adds	r4, r4, #1
 	cmp	r3, r0
-	bhi	.L1324
+	bhi	.L1329
 	.loc 4 387 0
-	ldr	r4, .L1334+12
+	ldr	r4, .L1339+12
 	.loc 4 396 0
 	movw	r6, #65535
-.LVL1465:
+.LVL1472:
 	.loc 4 387 0
 	ldrh	r5, [r4, #12]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.LVL1466:
-.L1325:
+.LVL1473:
+.L1330:
 	.loc 4 387 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r4, #12]
 	subs	r3, r3, #47
 	cmp	r3, r5
-	bgt	.L1329
+	bgt	.L1334
 	.loc 4 389 0 is_stmt 1
 	mov	r0, r5
 	bl	FtlBbmIsBadBlock
-.LVL1467:
+.LVL1474:
 	cmp	r0, #1
-	beq	.L1326
+	beq	.L1331
 	.loc 4 391 0
 	mov	r0, r5
 	bl	FlashTestBlk
-.LVL1468:
+.LVL1475:
 	cmp	r0, #0
-	beq	.L1327
+	beq	.L1332
 	.loc 4 393 0
 	mov	r0, r5
 	bl	FtlBbmMapBadBlock
-.LVL1469:
-.L1326:
+.LVL1476:
+.L1331:
 	.loc 4 387 0 discriminator 2
 	subs	r5, r5, #1
-.LVL1470:
+.LVL1477:
 	uxth	r5, r5
-.LVL1471:
-	b	.L1325
-.LVL1472:
-.L1322:
+.LVL1478:
+	b	.L1330
+.LVL1479:
+.L1327:
 	.loc 4 328 0
-	ldr	r3, .L1334+16
+	ldr	r3, .L1339+16
 	.loc 4 329 0
-	ldr	r5, .L1334+20
+	ldr	r5, .L1339+20
 	.loc 4 331 0
 	ldrh	r2, [r8, #2]!
 	.loc 4 328 0
-	ldr	r4, .L1334+24
+	ldr	r4, .L1339+24
 	ldr	r0, [r3]
 	.loc 4 331 0
 	movw	r3, #65535
@@ -15455,14 +15582,14 @@ FtlMakeBbt:
 	.loc 4 331 0
 	cmp	r2, r3
 	mov	fp, r4
-	ldr	r3, .L1334+28
+	ldr	r3, .L1339+28
 	.loc 4 328 0
 	str	r0, [r4, #8]
 	.loc 4 329 0
 	str	r10, [r4, #12]
-.LVL1473:
+.LVL1480:
 	.loc 4 331 0
-	beq	.L1317
+	beq	.L1322
 	.loc 4 333 0
 	ldrh	r5, [r3]
 	.loc 4 335 0
@@ -15470,7 +15597,7 @@ FtlMakeBbt:
 	.loc 4 333 0
 	str	r3, [sp]
 	mla	r5, r6, r5, r2
-.LVL1474:
+.LVL1481:
 	.loc 4 334 0
 	lsls	r2, r5, #10
 	str	r2, [r4, #4]
@@ -15478,7 +15605,7 @@ FtlMakeBbt:
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL1475:
+.LVL1482:
 	.loc 4 336 0
 	ldr	r3, [sp]
 	ldr	r1, [r4, #8]
@@ -15487,30 +15614,30 @@ FtlMakeBbt:
 	adds	r2, r2, #7
 	asrs	r2, r2, #3
 	bl	ftl_memcpy
-.LVL1476:
-.L1318:
+.LVL1483:
+.L1323:
 	.loc 4 376 0 discriminator 2
 	uxth	r0, r5
 	.loc 4 327 0 discriminator 2
 	adds	r6, r6, #1
-.LVL1477:
+.LVL1484:
 	adds	r7, r7, #4
 	.loc 4 376 0 discriminator 2
 	bl	FtlBbmMapBadBlock
-.LVL1478:
-	b	.L1316
-.LVL1479:
-.L1317:
+.LVL1485:
+	b	.L1321
+.LVL1486:
+.L1322:
 	.loc 4 340 0
 	mov	r1, r6
 	str	r3, [sp]
 	bl	FlashGetBadBlockList
-.LVL1480:
+.LVL1487:
 	.loc 4 341 0
 	ldr	r0, [r4, #8]
 	ldr	r1, [r7]
 	bl	FtlBbt2Bitmap
-.LVL1481:
+.LVL1488:
 	.loc 4 343 0
 	ldr	r3, [sp]
 	.loc 4 350 0
@@ -15519,17 +15646,17 @@ FtlMakeBbt:
 	ldrh	r4, [r3]
 	subs	r4, r4, #1
 	uxth	r4, r4
-.LVL1482:
-.L1319:
+.LVL1489:
+.L1324:
 	.loc 4 345 0
 	ldr	r3, [sp]
 	ldrh	r0, [r3]
 	smlabb	r0, r0, r6, r4
 	uxth	r0, r0
 	bl	FtlBbmIsBadBlock
-.LVL1483:
+.LVL1490:
 	cmp	r0, #1
-	beq	.L1320
+	beq	.L1325
 	.loc 4 350 0
 	ldr	r3, [sp, #4]
 	movs	r2, #16
@@ -15539,14 +15666,14 @@ FtlMakeBbt:
 	.loc 4 350 0
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL1484:
+.LVL1491:
 	.loc 4 351 0
-	ldr	r3, .L1334+16
+	ldr	r3, .L1339+16
 	mov	r2, #4096
 	movs	r1, #0
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL1485:
+.LVL1492:
 	.loc 4 355 0
 	ldr	r2, [sp]
 	.loc 4 352 0
@@ -15566,71 +15693,71 @@ FtlMakeBbt:
 	strh	r3, [r10, #2]	@ movhi
 	.loc 4 355 0
 	mla	r5, r6, r5, r3
-.LVL1486:
+.LVL1493:
 	.loc 4 356 0
 	lsls	r3, r5, #10
 	str	r3, [fp, #4]
 	.loc 4 357 0
-	ldr	r3, .L1334+32
+	ldr	r3, .L1339+32
 	ldrh	r2, [r3]
 	lsls	r2, r2, #2
 	bl	ftl_memcpy
-.LVL1487:
+.LVL1494:
 	.loc 4 358 0
 	movs	r2, #1
-	ldr	r0, .L1334+24
+	ldr	r0, .L1339+24
 	mov	r1, r2
 	bl	FlashEraseBlocks
-.LVL1488:
+.LVL1495:
 	.loc 4 359 0
 	movs	r3, #1
-	ldr	r0, .L1334+24
+	ldr	r0, .L1339+24
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL1489:
+.LVL1496:
 	.loc 4 360 0
 	ldr	r3, [fp]
 	adds	r3, r3, #1
-	bne	.L1318
+	bne	.L1323
 	.loc 4 362 0
 	uxth	r0, r5
 	bl	FtlBbmMapBadBlock
-.LVL1490:
+.LVL1497:
 	.loc 4 363 0
-	b	.L1319
-.LVL1491:
-.L1320:
+	b	.L1324
+.LVL1498:
+.L1325:
 	.loc 4 347 0
 	subs	r4, r4, #1
-.LVL1492:
+.LVL1499:
 	uxth	r4, r4
-.LVL1493:
-	b	.L1319
-.LVL1494:
-.L1324:
+.LVL1500:
+	b	.L1324
+.LVL1501:
+.L1329:
 	.loc 4 383 0 discriminator 3
 	bl	FtlBbmMapBadBlock
-.LVL1495:
-	b	.L1323
-.LVL1496:
-.L1327:
+.LVL1502:
+	b	.L1328
+.LVL1503:
+.L1332:
 	.loc 4 396 0
 	ldrh	r3, [r4]
 	cmp	r3, r6
-	bne	.L1328
+	bne	.L1333
 	.loc 4 398 0
 	strh	r5, [r4]	@ movhi
-	b	.L1326
-.L1328:
+	b	.L1331
+.L1333:
 	.loc 4 402 0
 	strh	r5, [r4, #4]	@ movhi
-.L1329:
+.L1334:
 	.loc 4 414 0
-	ldr	r3, .L1334+36
+	ldr	r3, .L1339+36
 	.loc 4 411 0
 	movs	r5, #0
-.LVL1497:
+.LVL1504:
 	.loc 4 413 0
 	str	r5, [r4, #8]
 	.loc 4 416 0
@@ -15649,18 +15776,18 @@ FtlMakeBbt:
 	str	r3, [r0, #24]
 	.loc 4 416 0
 	bl	FlashEraseBlocks
-.LVL1498:
+.LVL1505:
 	.loc 4 418 0
 	ldrh	r0, [r4]
 	bl	FtlBbmMapBadBlock
-.LVL1499:
+.LVL1506:
 	.loc 4 419 0
 	ldrh	r0, [r4, #4]
 	bl	FtlBbmMapBadBlock
-.LVL1500:
+.LVL1507:
 	.loc 4 421 0
 	bl	FtlBbmTblFlush
-.LVL1501:
+.LVL1508:
 	.loc 4 422 0
 	ldr	r3, [r4, #8]
 	.loc 4 425 0
@@ -15672,33 +15799,33 @@ FtlMakeBbt:
 	str	r3, [r4, #8]
 	.loc 4 424 0
 	ldrh	r3, [r4]
-.LVL1502:
+.LVL1509:
 	.loc 4 425 0
 	strh	r2, [r4]	@ movhi
 	.loc 4 427 0
 	strh	r3, [r4, #4]	@ movhi
 	.loc 4 429 0
 	bl	FtlBbmTblFlush
-.LVL1503:
+.LVL1510:
 	.loc 4 432 0
 	mov	r0, r5
 	add	sp, sp, #8
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1335:
+.L1340:
 	.align	2
-.L1334:
+.L1339:
 	.word	.LANCHOR37+28
 	.word	.LANCHOR10
 	.word	.LANCHOR25
 	.word	.LANCHOR37
-	.word	.LANCHOR39
-	.word	.LANCHOR109
+	.word	.LANCHOR107
 	.word	.LANCHOR108
+	.word	.LANCHOR106
 	.word	.LANCHOR17
 	.word	.LANCHOR137
-	.word	.LANCHOR112
+	.word	.LANCHOR111
 	.cfi_endproc
 .LFE234:
 	.size	FtlMakeBbt, .-FtlMakeBbt
@@ -15712,14 +15839,14 @@ FtlMakeBbt:
 	.type	FtlVendorPartWrite, %function
 FtlVendorPartWrite:
 .LFB266:
-	.loc 2 786 0
+	.loc 2 835 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1504:
-	.loc 2 794 0
-	ldr	r3, .L1348
-	.loc 2 786 0
+.LVL1511:
+	.loc 2 843 0
+	ldr	r3, .L1353
+	.loc 2 835 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
 	.cfi_offset 4, -32
@@ -15732,161 +15859,161 @@ FtlVendorPartWrite:
 	.cfi_offset 14, -4
 	sub	sp, sp, #104
 	.cfi_def_cfa_offset 136
-	.loc 2 786 0
+	.loc 2 835 0
 	str	r2, [sp]
-	.loc 2 794 0
+	.loc 2 843 0
 	adds	r2, r0, r1
-.LVL1505:
-	.loc 2 786 0
+.LVL1512:
+	.loc 2 835 0
 	mov	r7, r0
 	mov	r5, r1
-	.loc 2 794 0
+	.loc 2 843 0
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1344
-	.loc 2 791 0
-	ldr	r3, .L1348+4
+	bhi	.L1349
+	.loc 2 840 0
+	ldr	r3, .L1353+4
 	mov	r8, #0
 	ldrh	r6, [r3]
 	lsr	r6, r0, r6
 	lsl	fp, r6, #2
-.LVL1506:
-.L1338:
-	.loc 2 797 0
-	cbnz	r5, .L1343
-.LVL1507:
-.L1336:
-	.loc 2 820 0
+.LVL1513:
+.L1343:
+	.loc 2 846 0
+	cbnz	r5, .L1348
+.LVL1514:
+.L1341:
+	.loc 2 869 0
 	mov	r0, r8
 	add	sp, sp, #104
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
-.LVL1508:
+.LVL1515:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1509:
-.L1343:
+.LVL1516:
+.L1348:
 	.cfi_restore_state
-	.loc 2 798 0
-	ldr	r3, .L1348+8
-	.loc 2 799 0
+	.loc 2 847 0
+	ldr	r3, .L1353+8
+	.loc 2 848 0
 	mov	r0, r7
-	ldr	r10, .L1348+24
-	.loc 2 798 0
+	ldr	r10, .L1353+24
+	.loc 2 847 0
 	ldr	r3, [r3]
 	ldr	r2, [r3, fp]
-	.loc 2 799 0
-	ldr	r3, .L1348+12
-	.loc 2 798 0
+	.loc 2 848 0
+	ldr	r3, .L1353+12
+	.loc 2 847 0
 	str	r2, [sp, #12]
-.LVL1510:
-	.loc 2 799 0
+.LVL1517:
+	.loc 2 848 0
 	ldrh	r3, [r3]
 	mov	r1, r3
 	str	r3, [sp, #8]
 	bl	__aeabi_uidivmod
-.LVL1511:
-	.loc 2 800 0
+.LVL1518:
+	.loc 2 849 0
 	ldr	r3, [sp, #8]
-	.loc 2 801 0
+	.loc 2 850 0
 	ldr	r2, [sp, #12]
-	.loc 2 799 0
+	.loc 2 848 0
 	str	r1, [sp, #4]
-.LVL1512:
-	.loc 2 800 0
+.LVL1519:
+	.loc 2 849 0
 	subs	r4, r3, r1
 	uxth	r4, r4
-.LVL1513:
-	.loc 2 801 0
+.LVL1520:
+	.loc 2 850 0
 	cmp	r5, r4
-	.loc 2 802 0
+	.loc 2 851 0
 	it	cc
 	uxthcc	r4, r5
-.LVL1514:
-	.loc 2 803 0
-	cbz	r2, .L1340
-	.loc 2 803 0 is_stmt 0 discriminator 1
+.LVL1521:
+	.loc 2 852 0
+	cbz	r2, .L1345
+	.loc 2 852 0 is_stmt 0 discriminator 1
 	cmp	r4, r3
-	beq	.L1340
-	.loc 2 805 0 is_stmt 1
+	beq	.L1345
+	.loc 2 854 0 is_stmt 1
 	ldr	r3, [r10]
-	.loc 2 807 0
+	.loc 2 856 0
 	add	r0, sp, #20
-	.loc 2 804 0
+	.loc 2 853 0
 	str	r2, [sp, #24]
-	.loc 2 807 0
+	.loc 2 856 0
 	movs	r2, #1
 	mov	r1, r2
-	.loc 2 805 0
+	.loc 2 854 0
 	str	r3, [sp, #28]
-	.loc 2 806 0
+	.loc 2 855 0
 	add	r3, sp, #40
 	str	r3, [sp, #32]
-	.loc 2 807 0
+	.loc 2 856 0
 	bl	FlashReadPages
-.LVL1515:
-.L1341:
-	.loc 2 811 0
+.LVL1522:
+.L1346:
+	.loc 2 860 0
 	lsls	r3, r4, #9
 	ldr	r0, [r10]
-	.loc 2 815 0
+	.loc 2 864 0
 	subs	r5, r5, r4
-.LVL1516:
-	.loc 2 811 0
+.LVL1523:
+	.loc 2 860 0
 	mov	r2, r3
 	str	r3, [sp, #8]
 	ldm	sp, {r1, r3}
-	.loc 2 816 0
+	.loc 2 865 0
 	add	r7, r7, r4
-.LVL1517:
+.LVL1524:
 	add	fp, fp, #4
-	.loc 2 811 0
+	.loc 2 860 0
 	add	r0, r0, r3, lsl #9
 	bl	ftl_memcpy
-.LVL1518:
-	.loc 2 812 0
+.LVL1525:
+	.loc 2 861 0
 	ldr	r2, [r10]
 	mov	r1, r6
-	ldr	r0, .L1348+16
-	.loc 2 814 0
+	ldr	r0, .L1353+16
+	.loc 2 863 0
 	adds	r6, r6, #1
-.LVL1519:
-	.loc 2 812 0
+.LVL1526:
+	.loc 2 861 0
 	bl	FtlMapWritePage
-.LVL1520:
-	.loc 2 817 0
+.LVL1527:
+	.loc 2 866 0
 	ldr	r3, [sp]
-	.loc 2 813 0
+	.loc 2 862 0
 	adds	r0, r0, #1
 	it	eq
 	moveq	r8, #-1
-.LVL1521:
-	.loc 2 817 0
+.LVL1528:
+	.loc 2 866 0
 	mov	r2, r3
 	ldr	r3, [sp, #8]
 	add	r2, r2, r3
 	str	r2, [sp]
-.LVL1522:
-	b	.L1338
-.LVL1523:
-.L1340:
-	.loc 2 809 0
-	ldr	r3, .L1348+20
+.LVL1529:
+	b	.L1343
+.LVL1530:
+.L1345:
+	.loc 2 858 0
+	ldr	r3, .L1353+20
 	movs	r1, #0
 	ldr	r0, [r10]
 	ldrh	r2, [r3]
-.LVL1524:
+.LVL1531:
 	bl	ftl_memset
-.LVL1525:
-	b	.L1341
-.LVL1526:
-.L1344:
-	.loc 2 795 0
-	mov	r8, #-1
-	b	.L1336
+.LVL1532:
+	b	.L1346
+.LVL1533:
 .L1349:
+	.loc 2 844 0
+	mov	r8, #-1
+	b	.L1341
+.L1354:
 	.align	2
-.L1348:
+.L1353:
 	.word	.LANCHOR16
 	.word	.LANCHOR22
 	.word	.LANCHOR133
@@ -15907,99 +16034,99 @@ FtlVendorPartWrite:
 	.type	Ftl_save_ext_data, %function
 Ftl_save_ext_data:
 .LFB289:
-	.loc 2 2110 0
+	.loc 2 2159 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	.loc 2 2111 0
-	ldr	r2, .L1352
-	ldr	r3, .L1352+4
+	.loc 2 2160 0
+	ldr	r2, .L1357
+	ldr	r3, .L1357+4
 	ldr	r1, [r2]
 	cmp	r1, r3
-	bne	.L1350
-.LBB278:
-.LBB279:
-	.loc 2 2112 0
-	ldr	r3, .L1352+8
-	.loc 2 2125 0
+	bne	.L1355
+.LBB311:
+.LBB312:
+	.loc 2 2161 0
+	ldr	r3, .L1357+8
+	.loc 2 2174 0
 	movs	r1, #1
 	movs	r0, #0
-	.loc 2 2112 0
+	.loc 2 2161 0
 	str	r3, [r2, #4]
-	.loc 2 2113 0
-	ldr	r3, .L1352+12
+	.loc 2 2162 0
+	ldr	r3, .L1357+12
 	ldr	r3, [r3]
 	str	r3, [r2, #88]
-	.loc 2 2114 0
-	ldr	r3, .L1352+16
+	.loc 2 2163 0
+	ldr	r3, .L1357+16
 	ldr	r3, [r3]
 	str	r3, [r2, #92]
-	.loc 2 2115 0
-	ldr	r3, .L1352+20
+	.loc 2 2164 0
+	ldr	r3, .L1357+20
 	ldr	r3, [r3]
 	str	r3, [r2, #8]
-	.loc 2 2116 0
-	ldr	r3, .L1352+24
+	.loc 2 2165 0
+	ldr	r3, .L1357+24
 	ldr	r3, [r3]
 	str	r3, [r2, #12]
-	.loc 2 2117 0
-	ldr	r3, .L1352+28
+	.loc 2 2166 0
+	ldr	r3, .L1357+28
 	ldr	r3, [r3]
 	str	r3, [r2, #16]
-	.loc 2 2118 0
-	ldr	r3, .L1352+32
+	.loc 2 2167 0
+	ldr	r3, .L1357+32
 	ldr	r3, [r3]
 	str	r3, [r2, #20]
-	.loc 2 2119 0
-	ldr	r3, .L1352+36
+	.loc 2 2168 0
+	ldr	r3, .L1357+36
 	ldr	r3, [r3]
 	str	r3, [r2, #28]
-	.loc 2 2120 0
-	ldr	r3, .L1352+40
+	.loc 2 2169 0
+	ldr	r3, .L1357+40
 	ldr	r3, [r3]
 	str	r3, [r2, #32]
-	.loc 2 2121 0
-	ldr	r3, .L1352+44
+	.loc 2 2170 0
+	ldr	r3, .L1357+44
 	ldr	r3, [r3]
 	str	r3, [r2, #36]
-	.loc 2 2122 0
-	ldr	r3, .L1352+48
+	.loc 2 2171 0
+	ldr	r3, .L1357+48
 	ldr	r3, [r3]
 	str	r3, [r2, #40]
-	.loc 2 2123 0
-	ldr	r3, .L1352+52
+	.loc 2 2172 0
+	ldr	r3, .L1357+52
 	ldr	r3, [r3]
 	str	r3, [r2, #44]
-	.loc 2 2124 0
-	ldr	r3, .L1352+56
+	.loc 2 2173 0
+	ldr	r3, .L1357+56
 	ldr	r3, [r3]
 	str	r3, [r2, #48]
-	.loc 2 2125 0
+	.loc 2 2174 0
 	b	FtlVendorPartWrite
-.LVL1527:
-.L1350:
+.LVL1534:
+.L1355:
 	bx	lr
-.L1353:
+.L1358:
 	.align	2
-.L1352:
-	.word	.LANCHOR83
+.L1357:
+	.word	.LANCHOR81
 	.word	1179929683
-	.word	1342177344
-	.word	.LANCHOR69
-	.word	.LANCHOR70
+	.word	1342177348
 	.word	.LANCHOR68
-	.word	.LANCHOR65
-	.word	.LANCHOR63
+	.word	.LANCHOR69
 	.word	.LANCHOR67
-	.word	.LANCHOR74
-	.word	.LANCHOR76
 	.word	.LANCHOR64
+	.word	.LANCHOR62
 	.word	.LANCHOR66
+	.word	.LANCHOR73
+	.word	.LANCHOR75
+	.word	.LANCHOR63
+	.word	.LANCHOR65
+	.word	.LANCHOR76
 	.word	.LANCHOR77
-	.word	.LANCHOR78
-.LBE279:
-.LBE278:
+.LBE312:
+.LBE311:
 	.cfi_endproc
 .LFE289:
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
@@ -16013,81 +16140,81 @@ Ftl_save_ext_data:
 	.type	FtlEctTblFlush, %function
 FtlEctTblFlush:
 .LFB268:
-	.loc 2 861 0
+	.loc 2 910 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1528:
-	.loc 2 864 0
-	ldr	r2, .L1359
-	.loc 2 861 0
+.LVL1535:
+	.loc 2 913 0
+	ldr	r2, .L1364
+	.loc 2 910 0
 	push	{r3, lr}
 	.cfi_def_cfa_offset 8
 	.cfi_offset 3, -8
 	.cfi_offset 14, -4
-	.loc 2 864 0
+	.loc 2 913 0
 	ldrh	r3, [r2]
 	cmp	r3, #31
-	.loc 2 865 0
+	.loc 2 914 0
 	itett	ls
 	addls	r3, r3, #1
-	.loc 2 862 0
+	.loc 2 911 0
 	movhi	r3, #32
-	.loc 2 865 0
+	.loc 2 914 0
 	strhls	r3, [r2]	@ movhi
-.LVL1529:
-	.loc 2 866 0
+.LVL1536:
+	.loc 2 915 0
 	movls	r3, #1
-.LVL1530:
-	ldr	r2, .L1359+4
-	.loc 2 868 0
-	cbnz	r0, .L1356
-	.loc 2 868 0 is_stmt 0 discriminator 1
+.LVL1537:
+	ldr	r2, .L1364+4
+	.loc 2 917 0
+	cbnz	r0, .L1361
+	.loc 2 917 0 is_stmt 0 discriminator 1
 	ldr	r1, [r2]
 	ldr	r0, [r1, #20]
-.LVL1531:
+.LVL1538:
 	ldr	r1, [r1, #16]
 	add	r3, r3, r0
-.LVL1532:
+.LVL1539:
 	cmp	r1, r3
-	bcc	.L1357
-.L1356:
-	.loc 2 870 0 is_stmt 1
+	bcc	.L1362
+.L1361:
+	.loc 2 919 0 is_stmt 1
 	ldr	r2, [r2]
-	.loc 2 875 0
+	.loc 2 924 0
 	movs	r0, #64
-	.loc 2 870 0
+	.loc 2 919 0
 	ldr	r3, [r2, #16]
 	str	r3, [r2, #20]
-	.loc 2 871 0
-	ldr	r3, .L1359+8
+	.loc 2 920 0
+	ldr	r3, .L1364+8
 	str	r3, [r2]
-	.loc 2 872 0
-	ldr	r3, .L1359+12
+	.loc 2 921 0
+	ldr	r3, .L1364+12
 	ldrh	r1, [r3]
 	lsls	r3, r1, #9
 	str	r3, [r2, #12]
-	.loc 2 873 0
+	.loc 2 922 0
 	ldr	r3, [r2, #8]
 	adds	r3, r3, #1
 	str	r3, [r2, #8]
-	.loc 2 874 0
+	.loc 2 923 0
 	movs	r3, #0
 	str	r3, [r2, #4]
-	.loc 2 875 0
+	.loc 2 924 0
 	bl	FtlVendorPartWrite
-.LVL1533:
-	.loc 2 876 0
+.LVL1540:
+	.loc 2 925 0
 	bl	Ftl_save_ext_data
-.LVL1534:
-.L1357:
-	.loc 2 878 0
+.LVL1541:
+.L1362:
+	.loc 2 927 0
 	movs	r0, #0
 	pop	{r3, pc}
-.L1360:
+.L1365:
 	.align	2
-.L1359:
-	.word	.LANCHOR166
+.L1364:
+	.word	.LANCHOR165
 	.word	.LANCHOR127
 	.word	1112818501
 	.word	.LANCHOR125
@@ -16104,14 +16231,14 @@ FtlEctTblFlush:
 	.type	FtlVendorPartRead, %function
 FtlVendorPartRead:
 .LFB267:
-	.loc 2 823 0
+	.loc 2 872 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1535:
-	.loc 2 832 0
-	ldr	r3, .L1370
-	.loc 2 823 0
+.LVL1542:
+	.loc 2 881 0
+	ldr	r3, .L1375
+	.loc 2 872 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
 	.cfi_offset 4, -32
@@ -16123,147 +16250,147 @@ FtlVendorPartRead:
 	.cfi_offset 11, -8
 	.cfi_offset 14, -4
 	mov	r8, r2
-	.loc 2 832 0
+	.loc 2 881 0
 	adds	r2, r0, r1
-.LVL1536:
-	.loc 2 823 0
+.LVL1543:
+	.loc 2 872 0
 	sub	sp, sp, #104
 	.cfi_def_cfa_offset 136
-	.loc 2 823 0
+	.loc 2 872 0
 	mov	r6, r0
 	mov	r5, r1
-	.loc 2 832 0
+	.loc 2 881 0
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1369
-	.loc 2 828 0
-	ldr	r3, .L1370+4
+	bhi	.L1374
+	.loc 2 877 0
+	ldr	r3, .L1375+4
 	movs	r7, #0
-	.loc 2 842 0
-	ldr	fp, .L1370+16
-	.loc 2 828 0
+	.loc 2 891 0
+	ldr	fp, .L1375+16
+	.loc 2 877 0
 	ldrh	r3, [r3]
 	lsr	r3, r0, r3
 	lsls	r3, r3, #2
 	str	r3, [sp, #4]
-.LVL1537:
-.L1363:
-	.loc 2 834 0
-	cbnz	r5, .L1368
-.LVL1538:
-.L1361:
-	.loc 2 857 0
+.LVL1544:
+.L1368:
+	.loc 2 883 0
+	cbnz	r5, .L1373
+.LVL1545:
+.L1366:
+	.loc 2 906 0
 	mov	r0, r7
 	add	sp, sp, #104
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1539:
-.L1368:
+.LVL1546:
+.L1373:
 	.cfi_restore_state
-	.loc 2 835 0
-	ldr	r3, .L1370+8
-	.loc 2 836 0
+	.loc 2 884 0
+	ldr	r3, .L1375+8
+	.loc 2 885 0
 	mov	r0, r6
-	.loc 2 835 0
+	.loc 2 884 0
 	ldr	r2, [sp, #4]
 	ldr	r3, [r3]
 	ldr	r3, [r3, r2]
-	.loc 2 836 0
-	ldr	r2, .L1370+12
-	.loc 2 835 0
+	.loc 2 885 0
+	ldr	r2, .L1375+12
+	.loc 2 884 0
 	str	r3, [sp, #12]
-.LVL1540:
-	.loc 2 836 0
+.LVL1547:
+	.loc 2 885 0
 	ldrh	r4, [r2]
 	mov	r1, r4
 	bl	__aeabi_uidivmod
-.LVL1541:
-	.loc 2 837 0
+.LVL1548:
+	.loc 2 886 0
 	subs	r4, r4, r1
-	.loc 2 838 0
+	.loc 2 887 0
 	ldr	r3, [sp, #12]
-	.loc 2 837 0
+	.loc 2 886 0
 	uxth	r4, r4
-	.loc 2 836 0
+	.loc 2 885 0
 	str	r1, [sp, #8]
-.LVL1542:
-	.loc 2 838 0
+.LVL1549:
+	.loc 2 887 0
 	cmp	r5, r4
-	.loc 2 839 0
+	.loc 2 888 0
 	it	cc
 	uxthcc	r4, r5
-.LVL1543:
+.LVL1550:
 	lsl	r10, r4, #9
-	.loc 2 840 0
-	cbz	r3, .L1365
-	.loc 2 841 0
+	.loc 2 889 0
+	cbz	r3, .L1370
+	.loc 2 890 0
 	str	r3, [sp, #24]
-	.loc 2 844 0
+	.loc 2 893 0
 	movs	r2, #1
-	.loc 2 842 0
+	.loc 2 891 0
 	ldr	r3, [fp]
-	.loc 2 844 0
+	.loc 2 893 0
 	mov	r1, r2
 	add	r0, sp, #20
-	.loc 2 842 0
+	.loc 2 891 0
 	str	r3, [sp, #28]
-	.loc 2 843 0
+	.loc 2 892 0
 	add	r3, sp, #40
 	str	r3, [sp, #32]
-	.loc 2 844 0
+	.loc 2 893 0
 	bl	FlashReadPages
-.LVL1544:
-	.loc 2 845 0
+.LVL1551:
+	.loc 2 894 0
 	ldr	r3, [sp, #20]
-	.loc 2 847 0
+	.loc 2 896 0
 	mov	r2, r10
 	ldr	r1, [fp]
 	mov	r0, r8
-	.loc 2 846 0
+	.loc 2 895 0
 	adds	r3, r3, #1
-	.loc 2 847 0
+	.loc 2 896 0
 	ldr	r3, [sp, #8]
-	.loc 2 846 0
+	.loc 2 895 0
 	it	eq
 	moveq	r7, #-1
-.LVL1545:
-	.loc 2 847 0
+.LVL1552:
+	.loc 2 896 0
 	add	r1, r1, r3, lsl #9
 	bl	ftl_memcpy
-.LVL1546:
-.L1367:
+.LVL1553:
+.L1372:
 	ldr	r3, [sp, #4]
-	.loc 2 852 0
+	.loc 2 901 0
 	subs	r5, r5, r4
-.LVL1547:
-	.loc 2 853 0
+.LVL1554:
+	.loc 2 902 0
 	add	r6, r6, r4
-.LVL1548:
-	.loc 2 854 0
+.LVL1555:
+	.loc 2 903 0
 	add	r8, r8, r10
-.LVL1549:
+.LVL1556:
 	adds	r3, r3, #4
 	str	r3, [sp, #4]
-	b	.L1363
-.LVL1550:
-.L1365:
-	.loc 2 849 0
+	b	.L1368
+.LVL1557:
+.L1370:
+	.loc 2 898 0
 	mov	r2, r10
 	mov	r1, r3
 	mov	r0, r8
 	bl	ftl_memset
-.LVL1551:
-	b	.L1367
-.LVL1552:
-.L1369:
-	.loc 2 833 0
+.LVL1558:
+	b	.L1372
+.LVL1559:
+.L1374:
+	.loc 2 882 0
 	mov	r7, #-1
-	b	.L1361
-.L1371:
+	b	.L1366
+.L1376:
 	.align	2
-.L1370:
+.L1375:
 	.word	.LANCHOR16
 	.word	.LANCHOR22
 	.word	.LANCHOR133
@@ -16282,7 +16409,7 @@ FtlVendorPartRead:
 	.type	FtlLoadEctTbl, %function
 FtlLoadEctTbl:
 .LFB274:
-	.loc 2 1334 0
+	.loc 2 1383 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
@@ -16292,47 +16419,47 @@ FtlLoadEctTbl:
 	.cfi_offset 4, -12
 	.cfi_offset 5, -8
 	.cfi_offset 14, -4
-	.loc 2 1335 0
+	.loc 2 1384 0
 	movs	r0, #64
-	ldr	r4, .L1374
-	ldr	r5, .L1374+4
+	ldr	r4, .L1379
+	ldr	r5, .L1379+4
 	ldr	r2, [r4]
 	ldrh	r1, [r5]
 	bl	FtlVendorPartRead
-.LVL1553:
-	.loc 2 1336 0
+.LVL1560:
+	.loc 2 1385 0
 	ldr	r3, [r4]
 	ldr	r2, [r3]
-	ldr	r3, .L1374+8
+	ldr	r3, .L1379+8
 	cmp	r2, r3
-	beq	.L1373
-.LBB282:
-.LBB283:
-	.loc 2 1338 0
-	ldr	r1, .L1374+12
-	ldr	r0, .L1374+16
+	beq	.L1378
+.LBB315:
+.LBB316:
+	.loc 2 1387 0
+	ldr	r1, .L1379+12
+	ldr	r0, .L1379+16
 	bl	printf
-.LVL1554:
-	.loc 2 1339 0
+.LVL1561:
+	.loc 2 1388 0
 	ldrh	r2, [r5]
 	movs	r1, #0
 	ldr	r0, [r4]
 	lsls	r2, r2, #9
 	bl	ftl_memset
-.LVL1555:
-.L1373:
-.LBE283:
-.LBE282:
-	.loc 2 1344 0
+.LVL1562:
+.L1378:
+.LBE316:
+.LBE315:
+	.loc 2 1393 0
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L1375:
+.L1380:
 	.align	2
-.L1374:
+.L1379:
 	.word	.LANCHOR127
 	.word	.LANCHOR125
 	.word	1112818501
-	.word	.LC100
+	.word	.LC103
 	.word	.LC71
 	.cfi_endproc
 .LFE274:
@@ -16347,7 +16474,7 @@ FtlLoadEctTbl:
 	.type	Ftl_load_ext_data, %function
 Ftl_load_ext_data:
 .LFB290:
-	.loc 2 2130 0
+	.loc 2 2179 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
@@ -16357,119 +16484,119 @@ Ftl_load_ext_data:
 	.cfi_offset 4, -12
 	.cfi_offset 5, -8
 	.cfi_offset 14, -4
-	.loc 2 2131 0
+	.loc 2 2180 0
 	movs	r1, #1
-	ldr	r4, .L1379
+	ldr	r4, .L1384
 	movs	r0, #0
-	.loc 2 2132 0
-	ldr	r5, .L1379+4
-	.loc 2 2131 0
+	.loc 2 2181 0
+	ldr	r5, .L1384+4
+	.loc 2 2180 0
 	mov	r2, r4
 	bl	FtlVendorPartRead
-.LVL1556:
-	.loc 2 2132 0
+.LVL1563:
+	.loc 2 2181 0
 	ldr	r3, [r4]
 	cmp	r3, r5
-	beq	.L1377
-	.loc 2 2133 0
+	beq	.L1382
+	.loc 2 2182 0
 	mov	r2, #512
 	movs	r1, #0
 	mov	r0, r4
 	bl	ftl_memset
-.LVL1557:
-	.loc 2 2134 0
+.LVL1564:
+	.loc 2 2183 0
 	str	r5, [r4]
-.L1377:
-	.loc 2 2137 0
+.L1382:
+	.loc 2 2186 0
 	ldr	r3, [r4]
 	cmp	r3, r5
-	ldr	r3, .L1379+8
-	bne	.L1378
-	.loc 2 2138 0
+	ldr	r3, .L1384+8
+	bne	.L1383
+	.loc 2 2187 0
 	ldr	r1, [r4, #88]
-	ldr	r2, .L1379+12
+	ldr	r2, .L1384+12
 	str	r1, [r2]
-	.loc 2 2139 0
+	.loc 2 2188 0
 	ldr	r1, [r4, #92]
-	ldr	r2, .L1379+16
+	ldr	r2, .L1384+16
 	str	r1, [r2]
-	.loc 2 2140 0
+	.loc 2 2189 0
 	ldr	r1, [r4, #8]
-	ldr	r2, .L1379+20
+	ldr	r2, .L1384+20
 	str	r1, [r2]
-	.loc 2 2141 0
+	.loc 2 2190 0
 	ldr	r1, [r4, #12]
-	ldr	r2, .L1379+24
+	ldr	r2, .L1384+24
 	str	r1, [r2]
-	.loc 2 2142 0
+	.loc 2 2191 0
 	ldr	r1, [r4, #16]
-	ldr	r2, .L1379+28
+	ldr	r2, .L1384+28
 	str	r1, [r2]
-	.loc 2 2143 0
+	.loc 2 2192 0
 	ldr	r1, [r4, #20]
-	ldr	r2, .L1379+32
+	ldr	r2, .L1384+32
 	str	r1, [r2]
-	.loc 2 2144 0
+	.loc 2 2193 0
 	ldr	r2, [r4, #28]
-	.loc 2 2145 0
+	.loc 2 2194 0
 	ldr	r1, [r4, #32]
-	.loc 2 2144 0
+	.loc 2 2193 0
 	str	r2, [r3]
-	.loc 2 2145 0
-	ldr	r2, .L1379+36
+	.loc 2 2194 0
+	ldr	r2, .L1384+36
 	str	r1, [r2]
-	.loc 2 2146 0
+	.loc 2 2195 0
 	ldr	r1, [r4, #36]
-	ldr	r2, .L1379+40
+	ldr	r2, .L1384+40
 	str	r1, [r2]
-	.loc 2 2147 0
+	.loc 2 2196 0
 	ldr	r1, [r4, #40]
-	ldr	r2, .L1379+44
+	ldr	r2, .L1384+44
 	str	r1, [r2]
-	.loc 2 2148 0
+	.loc 2 2197 0
 	ldr	r1, [r4, #44]
-	ldr	r2, .L1379+48
+	ldr	r2, .L1384+48
 	str	r1, [r2]
-	.loc 2 2149 0
+	.loc 2 2198 0
 	ldr	r1, [r4, #48]
-	ldr	r2, .L1379+52
+	ldr	r2, .L1384+52
 	str	r1, [r2]
-.L1378:
-	.loc 2 2152 0
-	ldr	r1, .L1379+56
-	ldr	r2, .L1379+60
+.L1383:
+	.loc 2 2201 0
+	ldr	r1, .L1384+56
+	ldr	r2, .L1384+60
 	ldr	r3, [r3]
 	ldr	r0, [r1]
 	ldrh	r2, [r2]
-	ldr	r1, .L1379+64
+	ldr	r1, .L1384+64
 	mla	r0, r0, r2, r3
 	ldrh	r1, [r1]
 	bl	__aeabi_uidiv
-.LVL1558:
-	ldr	r3, .L1379+68
+.LVL1565:
+	ldr	r3, .L1384+68
 	str	r0, [r3]
 	pop	{r3, r4, r5, pc}
-.L1380:
+.L1385:
 	.align	2
-.L1379:
-	.word	.LANCHOR83
+.L1384:
+	.word	.LANCHOR81
 	.word	1179929683
-	.word	.LANCHOR74
-	.word	.LANCHOR69
-	.word	.LANCHOR70
+	.word	.LANCHOR73
 	.word	.LANCHOR68
-	.word	.LANCHOR65
-	.word	.LANCHOR63
+	.word	.LANCHOR69
 	.word	.LANCHOR67
-	.word	.LANCHOR76
 	.word	.LANCHOR64
+	.word	.LANCHOR62
 	.word	.LANCHOR66
+	.word	.LANCHOR75
+	.word	.LANCHOR63
+	.word	.LANCHOR65
+	.word	.LANCHOR76
 	.word	.LANCHOR77
-	.word	.LANCHOR78
-	.word	.LANCHOR73
+	.word	.LANCHOR72
 	.word	.LANCHOR14
 	.word	.LANCHOR5
-	.word	.LANCHOR75
+	.word	.LANCHOR74
 	.cfi_endproc
 .LFE290:
 	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
@@ -16483,11 +16610,11 @@ Ftl_load_ext_data:
 	.type	FtlVpcTblFlush, %function
 FtlVpcTblFlush:
 .LFB272:
-	.loc 2 1004 0
+	.loc 2 1053 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1559:
+.LVL1566:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 40
 	.cfi_offset 4, -32
@@ -16498,149 +16625,149 @@ FtlVpcTblFlush:
 	.cfi_offset 10, -12
 	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	.loc 2 1016 0
+	.loc 2 1065 0
 	movs	r6, #0
-	.loc 2 1013 0
-	ldr	r3, .L1393
-	.loc 2 1005 0
+	.loc 2 1062 0
+	ldr	r3, .L1398
+	.loc 2 1054 0
 	movw	fp, #65535
-	.loc 2 1010 0
-	ldr	r8, .L1393+80
-	.loc 2 1011 0
-	ldr	r10, .L1393+84
-	.loc 2 1013 0
+	.loc 2 1059 0
+	ldr	r8, .L1398+80
+	.loc 2 1060 0
+	ldr	r10, .L1398+84
+	.loc 2 1062 0
 	ldrh	r2, [r3]
-	.loc 2 1010 0
+	.loc 2 1059 0
 	ldr	r0, [r8]
-	.loc 2 1011 0
+	.loc 2 1060 0
 	ldr	r7, [r10]
-	.loc 2 1010 0
-	ldr	r5, .L1393+4
-	.loc 2 1019 0
-	ldr	r4, .L1393+8
-	.loc 2 1020 0
-	ldr	r1, .L1393+12
-	.loc 2 1010 0
+	.loc 2 1059 0
+	ldr	r5, .L1398+4
+	.loc 2 1068 0
+	ldr	r4, .L1398+8
+	.loc 2 1069 0
+	ldr	r1, .L1398+12
+	.loc 2 1059 0
 	str	r0, [r5, #8]
-	.loc 2 1011 0
+	.loc 2 1060 0
 	str	r7, [r5, #12]
-.LVL1560:
-	.loc 2 1013 0
+.LVL1567:
+	.loc 2 1062 0
 	strh	r2, [r7, #2]	@ movhi
-	.loc 2 1014 0
+	.loc 2 1063 0
 	movw	r2, #61604
 	strh	r2, [r7]	@ movhi
-	.loc 2 1015 0
+	.loc 2 1064 0
 	ldr	r2, [r3, #8]
-	.loc 2 1016 0
+	.loc 2 1065 0
 	str	r6, [r7, #8]
-	.loc 2 1017 0
+	.loc 2 1066 0
 	str	r6, [r7, #12]
-	.loc 2 1015 0
+	.loc 2 1064 0
 	str	r2, [r7, #4]
-	.loc 2 1020 0
-	ldr	r2, .L1393+16
-	.loc 2 1021 0
+	.loc 2 1069 0
+	ldr	r2, .L1398+16
+	.loc 2 1070 0
 	str	r3, [sp, #4]
-	.loc 2 1020 0
+	.loc 2 1069 0
 	stm	r4, {r1, r2}
-	.loc 2 1021 0
+	.loc 2 1070 0
 	ldrh	r2, [r3, #6]
 	strh	r2, [r4, #8]	@ movhi
-	.loc 2 1022 0
-	ldr	r2, .L1393+20
+	.loc 2 1071 0
+	ldr	r2, .L1398+20
 	ldrh	r2, [r2]
 	strb	r2, [r4, #10]
-	.loc 2 1024 0
-	ldr	r2, .L1393+24
+	.loc 2 1073 0
+	ldr	r2, .L1398+24
 	ldrh	r1, [r2]
-	.loc 2 1025 0
+	.loc 2 1074 0
 	ldrh	ip, [r2, #2]
-	.loc 2 1024 0
+	.loc 2 1073 0
 	strh	r1, [r4, #14]	@ movhi
-	.loc 2 1025 0
+	.loc 2 1074 0
 	ldrb	r1, [r2, #6]	@ zero_extendqisi2
-	.loc 2 1026 0
+	.loc 2 1075 0
 	ldrb	r2, [r2, #8]	@ zero_extendqisi2
 	strb	r2, [r4, #11]
-	.loc 2 1025 0
+	.loc 2 1074 0
 	orr	r1, r1, ip, lsl #6
-	.loc 2 1028 0
-	ldr	r2, .L1393+28
-	.loc 2 1025 0
+	.loc 2 1077 0
+	ldr	r2, .L1398+28
+	.loc 2 1074 0
 	strh	r1, [r4, #16]	@ movhi
-	.loc 2 1028 0
+	.loc 2 1077 0
 	ldrh	r1, [r2]
-	.loc 2 1029 0
+	.loc 2 1078 0
 	ldrh	ip, [r2, #2]
-	.loc 2 1028 0
+	.loc 2 1077 0
 	strh	r1, [r4, #18]	@ movhi
-	.loc 2 1029 0
+	.loc 2 1078 0
 	ldrb	r1, [r2, #6]	@ zero_extendqisi2
-	.loc 2 1030 0
+	.loc 2 1079 0
 	ldrb	r2, [r2, #8]	@ zero_extendqisi2
-	.loc 2 1029 0
+	.loc 2 1078 0
 	orr	r1, r1, ip, lsl #6
 	strh	r1, [r4, #20]	@ movhi
-	.loc 2 1030 0
+	.loc 2 1079 0
 	strb	r2, [r4, #12]
-	.loc 2 1032 0
-	ldr	r2, .L1393+32
+	.loc 2 1081 0
+	ldr	r2, .L1398+32
 	ldrh	r1, [r2]
-	.loc 2 1033 0
+	.loc 2 1082 0
 	ldrh	ip, [r2, #2]
-	.loc 2 1032 0
+	.loc 2 1081 0
 	strh	r1, [r4, #22]	@ movhi
-	.loc 2 1033 0
+	.loc 2 1082 0
 	ldrb	r1, [r2, #6]	@ zero_extendqisi2
-	.loc 2 1034 0
+	.loc 2 1083 0
 	ldrb	r2, [r2, #8]	@ zero_extendqisi2
 	strb	r2, [r4, #13]
-	.loc 2 1033 0
+	.loc 2 1082 0
 	orr	r1, r1, ip, lsl #6
-	.loc 2 1036 0
-	ldr	r2, .L1393+36
-	.loc 2 1033 0
+	.loc 2 1085 0
+	ldr	r2, .L1398+36
+	.loc 2 1082 0
 	strh	r1, [r4, #24]	@ movhi
-	.loc 2 1047 0
+	.loc 2 1096 0
 	movs	r1, #255
-	.loc 2 1036 0
+	.loc 2 1085 0
 	ldr	r2, [r2]
 	str	r2, [r4, #32]
-	.loc 2 1041 0
-	ldr	r2, .L1393+40
+	.loc 2 1090 0
+	ldr	r2, .L1398+40
 	ldr	r2, [r2]
 	str	r2, [r4, #40]
-	.loc 2 1042 0
-	ldr	r2, .L1393+44
+	.loc 2 1091 0
+	ldr	r2, .L1398+44
 	ldr	r2, [r2]
 	str	r2, [r4, #36]
-	.loc 2 1047 0
-	ldr	r2, .L1393+48
+	.loc 2 1096 0
+	ldr	r2, .L1398+48
 	ldrh	r2, [r2]
 	bl	ftl_memset
-.LVL1561:
-	.loc 2 1048 0
+.LVL1568:
+	.loc 2 1097 0
 	mov	r1, r4
-	.loc 2 1049 0
-	ldr	r4, .L1393+52
-	.loc 2 1048 0
+	.loc 2 1098 0
+	ldr	r4, .L1398+52
+	.loc 2 1097 0
 	movs	r2, #48
 	ldr	r0, [r5, #8]
 	bl	ftl_memcpy
-.LVL1562:
-	.loc 2 1049 0
+.LVL1569:
+	.loc 2 1098 0
 	ldrh	r2, [r4]
 	ldr	r0, [r5, #8]
-	ldr	r1, .L1393+56
+	ldr	r1, .L1398+56
 	lsls	r2, r2, #1
 	adds	r0, r0, #48
 	ldr	r1, [r1]
 	bl	ftl_memcpy
-.LVL1563:
-	.loc 2 1050 0
+.LVL1570:
+	.loc 2 1099 0
 	ldrh	r0, [r4]
-	ldr	r1, .L1393+60
+	ldr	r1, .L1398+60
 	ldr	r4, [r5, #8]
 	lsrs	r2, r0, #3
 	adds	r0, r0, #24
@@ -16650,179 +16777,426 @@ FtlVpcTblFlush:
 	bic	r0, r0, #3
 	add	r0, r0, r4
 	bl	ftl_memcpy
-.LVL1564:
-	.loc 2 1051 0
+.LVL1571:
+	.loc 2 1100 0
 	mov	r0, r6
 	bl	FtlUpdateVaildLpn
-.LVL1565:
+.LVL1572:
 	ldr	r3, [sp, #4]
 	mov	r4, r3
-.LVL1566:
-.L1382:
-	.loc 2 1053 0
+.LVL1573:
+.L1387:
+	.loc 2 1102 0
 	ldr	r3, [r8]
-	.loc 2 1055 0
+	.loc 2 1104 0
 	ldrh	r2, [r4]
-	.loc 2 1056 0
-	ldr	r0, .L1393+4
-	.loc 2 1053 0
+	.loc 2 1105 0
+	ldr	r0, .L1398+4
+	.loc 2 1102 0
 	str	r3, [r5, #8]
-	.loc 2 1054 0
+	.loc 2 1103 0
 	ldr	r3, [r10]
 	str	r3, [r5, #12]
-	.loc 2 1055 0
+	.loc 2 1104 0
 	ldrh	r3, [r4, #2]
 	orr	r3, r3, r2, lsl #10
 	str	r3, [r5, #4]
-	.loc 2 1056 0
+	.loc 2 1105 0
 	movs	r3, #1
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL1567:
-	.loc 2 1057 0
-	ldr	r3, .L1393+64
+.LVL1574:
+	.loc 2 1106 0
+	ldr	r3, .L1398+64
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1383
-	.loc 2 1059 0
+	blt	.L1388
+	.loc 2 1108 0
 	ldrh	r3, [r4]
-	.loc 2 1058 0
+	.loc 2 1107 0
 	ldrh	fp, [r4, #4]
-.LVL1568:
-	.loc 2 1059 0
+.LVL1575:
+	.loc 2 1108 0
 	strh	r3, [r4, #4]	@ movhi
-	.loc 2 1060 0
+	.loc 2 1109 0
 	movs	r3, #0
 	strh	r3, [r4, #2]	@ movhi
-	.loc 2 1061 0
+	.loc 2 1110 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL1569:
-	.loc 2 1066 0
-	ldr	r2, .L1393+40
-	.loc 2 1061 0
+.LVL1576:
+	.loc 2 1115 0
+	ldr	r2, .L1398+40
+	.loc 2 1110 0
 	strh	r0, [r4]	@ movhi
-	.loc 2 1066 0
+	.loc 2 1115 0
 	ldr	r3, [r2]
 	adds	r1, r3, #1
 	str	r3, [r4, #8]
 	str	r1, [r2]
-	.loc 2 1067 0
+	.loc 2 1116 0
 	lsls	r2, r0, #10
 	str	r2, [r5, #4]
-	.loc 2 1068 0
+	.loc 2 1117 0
 	str	r3, [r7, #4]
-	.loc 2 1070 0
+	.loc 2 1119 0
 	movs	r3, #1
-	.loc 2 1069 0
+	.loc 2 1118 0
 	strh	r0, [r7, #2]	@ movhi
-	.loc 2 1070 0
+	.loc 2 1119 0
 	mov	r2, r3
 	mov	r1, r3
-	ldr	r0, .L1393+4
+	ldr	r0, .L1398+4
 	bl	FlashProgPages
-.LVL1570:
-.L1383:
-	.loc 2 1072 0
+.LVL1577:
+.L1388:
+	.loc 2 1121 0
 	ldrh	r3, [r4, #2]
-	.loc 2 1073 0
+	.loc 2 1122 0
 	ldr	r2, [r5]
-	.loc 2 1072 0
+	.loc 2 1121 0
 	adds	r3, r3, #1
 	uxth	r3, r3
-	.loc 2 1073 0
+	.loc 2 1122 0
 	adds	r2, r2, #1
-	.loc 2 1072 0
+	.loc 2 1121 0
 	strh	r3, [r4, #2]	@ movhi
-	.loc 2 1073 0
-	bne	.L1384
-	.loc 2 1075 0
+	.loc 2 1122 0
+	bne	.L1389
+	.loc 2 1124 0
 	cmp	r3, #1
-	bne	.L1385
-	.loc 2 1075 0 is_stmt 0 discriminator 1
-	movw	r2, #1075
-	ldr	r1, .L1393+68
-	ldr	r0, .L1393+72
+	bne	.L1390
+	.loc 2 1124 0 is_stmt 0 discriminator 1
+	movw	r2, #1124
+	ldr	r1, .L1398+68
+	ldr	r0, .L1398+72
 	bl	printf
-.LVL1571:
-.L1385:
-	.loc 2 1076 0 is_stmt 1
+.LVL1578:
+.L1390:
+	.loc 2 1125 0 is_stmt 1
 	ldrh	r3, [r4, #2]
-	.loc 2 1078 0
+	.loc 2 1127 0
 	adds	r6, r6, #1
-.LVL1572:
+.LVL1579:
 	uxth	r6, r6
-.LVL1573:
-	.loc 2 1076 0
+.LVL1580:
+	.loc 2 1125 0
 	cmp	r3, #1
-	.loc 2 1077 0
+	.loc 2 1126 0
 	itttt	eq
-	ldreq	r3, .L1393+64
+	ldreq	r3, .L1398+64
 	ldrheq	r3, [r3]
 	addeq	r3, r3, #-1
 	strheq	r3, [r4, #2]	@ movhi
-	.loc 2 1079 0
+	.loc 2 1128 0
 	cmp	r6, #3
-	bls	.L1382
-	.loc 2 1080 0
+	bls	.L1387
+	.loc 2 1129 0
 	mov	r2, r6
 	ldr	r1, [r5, #4]
-	ldr	r0, .L1393+76
+	ldr	r0, .L1398+76
 	bl	printf
-.LVL1574:
-.L1388:
-	b	.L1388
-.L1384:
-	.loc 2 1086 0
+.LVL1581:
+.L1393:
+	b	.L1393
+.L1389:
+	.loc 2 1135 0
 	cmp	r3, #1
-	beq	.L1382
-	.loc 2 1089 0
+	beq	.L1387
+	.loc 2 1138 0
 	movw	r3, #65535
 	cmp	fp, r3
-	beq	.L1389
-	.loc 2 1090 0
+	beq	.L1394
+	.loc 2 1139 0
 	movs	r1, #1
 	mov	r0, fp
 	bl	FtlFreeSysBlkQueueIn
-.LVL1575:
-.L1389:
-	.loc 2 1092 0
+.LVL1582:
+.L1394:
+	.loc 2 1141 0
 	movs	r0, #0
 	add	sp, sp, #8
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1576:
-.L1394:
+.LVL1583:
+.L1399:
 	.align	2
-.L1393:
-	.word	.LANCHOR81
-	.word	.LANCHOR108
+.L1398:
 	.word	.LANCHOR79
+	.word	.LANCHOR106
+	.word	.LANCHOR39
 	.word	1179929683
-	.word	1342177344
+	.word	1342177348
 	.word	.LANCHOR10
 	.word	.LANCHOR51
 	.word	.LANCHOR52
 	.word	.LANCHOR53
-	.word	.LANCHOR73
-	.word	.LANCHOR71
 	.word	.LANCHOR72
+	.word	.LANCHOR70
+	.word	.LANCHOR71
 	.word	.LANCHOR23
 	.word	.LANCHOR5
-	.word	.LANCHOR43
+	.word	.LANCHOR42
 	.word	.LANCHOR1
 	.word	.LANCHOR20
-	.word	.LANCHOR167
+	.word	.LANCHOR166
 	.word	.LC1
-	.word	.LC101
-	.word	.LANCHOR39
-	.word	.LANCHOR109
+	.word	.LC104
+	.word	.LANCHOR107
+	.word	.LANCHOR108
 	.cfi_endproc
 .LFE272:
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
+	.section	.text.FtlSysFlush,"ax",%progbits
+	.align	1
+	.global	FtlSysFlush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlSysFlush, %function
+FtlSysFlush:
+.LFB215:
+	.loc 3 797 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 3, -8
+	.cfi_offset 14, -4
+	.loc 3 799 0
+	bl	l2p_flush
+.LVL1584:
+	.loc 3 800 0
+	movs	r0, #1
+	bl	FtlEctTblFlush
+.LVL1585:
+	.loc 3 801 0
+	bl	FtlVpcTblFlush
+.LVL1586:
+	.loc 3 803 0
+	movs	r0, #0
+	pop	{r3, pc}
+	.cfi_endproc
+.LFE215:
+	.size	FtlSysFlush, .-FtlSysFlush
+	.section	.text.sftl_deinit,"ax",%progbits
+	.align	1
+	.global	sftl_deinit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sftl_deinit, %function
+sftl_deinit:
+.LFB216:
+	.loc 3 806 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 3, -8
+	.cfi_offset 14, -4
+	.loc 3 807 0
+	ldr	r3, .L1403
+	ldr	r3, [r3]
+	cmp	r3, #1
+	bne	.L1402
+	.loc 3 808 0
+	bl	FtlSysFlush
+.LVL1587:
+.L1402:
+	.loc 3 810 0
+	movs	r0, #0
+	pop	{r3, pc}
+.L1404:
+	.align	2
+.L1403:
+	.word	.LANCHOR86
+	.cfi_endproc
+.LFE216:
+	.size	sftl_deinit, .-sftl_deinit
+	.section	.text.FtlDiscard,"ax",%progbits
+	.align	1
+	.global	FtlDiscard
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlDiscard, %function
+FtlDiscard:
+.LFB221:
+	.loc 3 1121 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1588:
+	.loc 3 1128 0
+	ldr	r3, .L1420
+	adds	r2, r0, r1
+	.loc 3 1121 0
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
+	.cfi_offset 14, -4
+	.loc 3 1121 0
+	mov	r7, r0
+	mov	r5, r1
+	.loc 3 1128 0
+	ldr	r3, [r3]
+	cmp	r2, r3
+	bhi	.L1413
+	.loc 3 1131 0
+	cmp	r1, #31
+	bhi	.L1407
+.LVL1589:
+.L1412:
+	.loc 3 1132 0
+	movs	r0, #0
+.L1405:
+	.loc 3 1165 0
+	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.LVL1590:
+.L1407:
+	.cfi_restore_state
+	.loc 3 1136 0
+	ldr	r8, .L1420+12
+	ldrh	r4, [r8]
+	mov	r1, r4
+.LVL1591:
+	bl	__aeabi_uidiv
+.LVL1592:
+	.loc 3 1137 0
+	smulbb	r3, r0, r4
+	.loc 3 1136 0
+	mov	r6, r0
+.LVL1593:
+	.loc 3 1137 0
+	subs	r7, r7, r3
+.LVL1594:
+	uxth	r7, r7
+.LVL1595:
+	.loc 3 1138 0
+	cbz	r7, .L1408
+.LVL1596:
+	.loc 3 1139 0
+	subs	r4, r4, r7
+.LVL1597:
+	.loc 3 1140 0
+	adds	r6, r6, #1
+.LVL1598:
+	.loc 3 1139 0
+	cmp	r4, r5
+	it	cs
+	movcs	r4, r5
+	uxth	r4, r4
+	.loc 3 1141 0
+	subs	r5, r5, r4
+.LVL1599:
+.L1408:
+	.loc 3 1148 0
+	ldr	r4, .L1420+4
+	.loc 3 1144 0
+	mov	r3, #-1
+	.loc 3 1149 0
+	ldr	r7, .L1420+8
+.LVL1600:
+	.loc 3 1144 0
+	str	r3, [sp, #4]
+.L1409:
+	.loc 3 1145 0
+	ldrh	r3, [r8]
+	cmp	r5, r3
+	bcs	.L1411
+	.loc 3 1158 0
+	ldr	r3, .L1420+4
+	ldr	r2, [r3]
+	cmp	r2, #32
+	bls	.L1412
+	.loc 3 1160 0
+	movs	r4, #0
+	str	r4, [r3]
+	.loc 3 1161 0
+	bl	l2p_flush
+.LVL1601:
+	.loc 3 1162 0
+	bl	FtlVpcTblFlush
+.LVL1602:
+	b	.L1412
+.L1411:
+	.loc 3 1146 0
+	movs	r2, #0
+	mov	r1, sp
+	mov	r0, r6
+	bl	log2phys
+.LVL1603:
+	.loc 3 1147 0
+	ldr	r3, [sp]
+	adds	r3, r3, #1
+	beq	.L1410
+	.loc 3 1148 0
+	ldr	r3, [r4]
+	.loc 3 1150 0
+	movs	r2, #1
+	add	r1, sp, #4
+	mov	r0, r6
+	.loc 3 1148 0
+	adds	r3, r3, #1
+	str	r3, [r4]
+	.loc 3 1149 0
+	ldr	r3, [r7]
+	adds	r3, r3, #1
+	str	r3, [r7]
+	.loc 3 1150 0
+	bl	log2phys
+.LVL1604:
+	.loc 3 1151 0
+	ldr	r0, [sp]
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+.LVL1605:
+	.loc 3 1152 0
+	bl	decrement_vpc_count
+.LVL1606:
+.L1410:
+	.loc 3 1155 0
+	ldrh	r3, [r8]
+	.loc 3 1154 0
+	adds	r6, r6, #1
+.LVL1607:
+	.loc 3 1155 0
+	subs	r5, r5, r3
+.LVL1608:
+	b	.L1409
+.LVL1609:
+.L1413:
+	.loc 3 1129 0
+	mov	r0, #-1
+.LVL1610:
+	b	.L1405
+.L1421:
+	.align	2
+.L1420:
+	.word	.LANCHOR34
+	.word	.LANCHOR167
+	.word	.LANCHOR63
+	.word	.LANCHOR12
+	.cfi_endproc
+.LFE221:
+	.size	FtlDiscard, .-FtlDiscard
 	.section	.text.FtlVpcCheckAndModify,"ax",%progbits
 	.align	1
 	.global	FtlVpcCheckAndModify
@@ -16833,7 +17207,7 @@ FtlVpcTblFlush:
 	.type	FtlVpcCheckAndModify, %function
 FtlVpcCheckAndModify:
 .LFB292:
-	.loc 2 2192 0
+	.loc 2 2242 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
@@ -16846,146 +17220,146 @@ FtlVpcCheckAndModify:
 	.cfi_offset 8, -12
 	.cfi_offset 10, -8
 	.cfi_offset 14, -4
-	.loc 2 2199 0
+	.loc 2 2249 0
 	movs	r5, #0
-	.loc 2 2197 0
-	ldr	r1, .L1407
-	ldr	r0, .L1407+4
+	.loc 2 2247 0
+	ldr	r1, .L1434
+	ldr	r0, .L1434+4
 	bl	printf
-.LVL1577:
-	.loc 2 2198 0
-	ldr	r3, .L1407+8
+.LVL1611:
+	.loc 2 2248 0
+	ldr	r3, .L1434+8
 	movs	r1, #0
-	ldr	r4, .L1407+12
-	.loc 2 2199 0
-	ldr	r6, .L1407+16
-	.loc 2 2198 0
+	ldr	r4, .L1434+12
+	.loc 2 2249 0
+	ldr	r6, .L1434+16
+	.loc 2 2248 0
 	ldrh	r2, [r3]
 	ldr	r0, [r4]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-.LVL1578:
-.L1396:
-	.loc 2 2199 0 discriminator 1
+.LVL1612:
+.L1423:
+	.loc 2 2249 0 discriminator 1
 	ldr	r3, [r6]
 	cmp	r5, r3
-	bcc	.L1398
-	.loc 2 2206 0 discriminator 1
-	ldr	r10, .L1407+36
+	bcc	.L1425
+	.loc 2 2256 0 discriminator 1
+	ldr	r10, .L1434+36
 	movs	r7, #0
-	.loc 2 2207 0 discriminator 1
-	ldr	r8, .L1407+40
-.LVL1579:
-.L1399:
-	.loc 2 2206 0 discriminator 1
+	.loc 2 2257 0 discriminator 1
+	ldr	r8, .L1434+40
+.LVL1613:
+.L1426:
+	.loc 2 2256 0 discriminator 1
 	ldrh	r3, [r10]
 	uxth	r5, r7
-.LVL1580:
+.LVL1614:
 	cmp	r3, r5
-	bhi	.L1403
-	.loc 2 2218 0
+	bhi	.L1430
+	.loc 2 2268 0
 	add	sp, sp, #12
 	.cfi_remember_state
 	.cfi_def_cfa_offset 28
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.LVL1581:
-.L1398:
+.LVL1615:
+.L1425:
 	.cfi_restore_state
-	.loc 2 2200 0
+	.loc 2 2250 0
 	movs	r2, #0
 	add	r1, sp, #4
 	mov	r0, r5
 	bl	log2phys
-.LVL1582:
-	.loc 2 2201 0
+.LVL1616:
+	.loc 2 2251 0
 	ldr	r0, [sp, #4]
 	adds	r3, r0, #1
-	beq	.L1397
-	.loc 2 2202 0
+	beq	.L1424
+	.loc 2 2252 0
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1583:
-	.loc 2 2203 0
+.LVL1617:
+	.loc 2 2253 0
 	ldr	r2, [r4]
 	ldrh	r3, [r2, r0, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r0, lsl #1]	@ movhi
-.LVL1584:
-.L1397:
-	.loc 2 2199 0 discriminator 2
+.LVL1618:
+.L1424:
+	.loc 2 2249 0 discriminator 2
 	adds	r5, r5, #1
-.LVL1585:
-	b	.L1396
-.LVL1586:
-.L1403:
-	.loc 2 2207 0
+.LVL1619:
+	b	.L1423
+.LVL1620:
+.L1430:
+	.loc 2 2257 0
 	ldr	r3, [r8]
 	uxth	r6, r7
 	ldrh	r2, [r3, r6, lsl #1]
 	ldr	r3, [r4]
 	ldrh	r3, [r3, r6, lsl #1]
 	cmp	r2, r3
-	beq	.L1401
-	.loc 2 2207 0 is_stmt 0 discriminator 1
+	beq	.L1428
+	.loc 2 2257 0 is_stmt 0 discriminator 1
 	movw	r1, #65535
 	cmp	r2, r1
-	beq	.L1401
-	.loc 2 2209 0 is_stmt 1
+	beq	.L1428
+	.loc 2 2259 0 is_stmt 1
 	mov	r1, r6
-	ldr	r0, .L1407+20
+	ldr	r0, .L1434+20
 	bl	printf
-.LVL1587:
-	.loc 2 2210 0
-	ldr	r3, .L1407+24
+.LVL1621:
+	.loc 2 2260 0
+	ldr	r3, .L1434+24
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	beq	.L1401
-	.loc 2 2210 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1407+28
+	beq	.L1428
+	.loc 2 2260 0 is_stmt 0 discriminator 1
+	ldr	r3, .L1434+28
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	beq	.L1401
-	.loc 2 2210 0 discriminator 2
-	ldr	r3, .L1407+32
+	beq	.L1428
+	.loc 2 2260 0 discriminator 2
+	ldr	r3, .L1434+32
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	beq	.L1401
-	.loc 2 2211 0 is_stmt 1
+	beq	.L1428
+	.loc 2 2261 0 is_stmt 1
 	ldr	r3, [r4]
-	.loc 2 2212 0
+	.loc 2 2262 0
 	mov	r0, r5
-	.loc 2 2211 0
+	.loc 2 2261 0
 	ldrh	r2, [r3, r6, lsl #1]
 	ldr	r3, [r8]
 	strh	r2, [r3, r6, lsl #1]	@ movhi
-	.loc 2 2212 0
+	.loc 2 2262 0
 	bl	update_vpc_list
-.LVL1588:
-	.loc 2 2213 0
+.LVL1622:
+	.loc 2 2263 0
 	bl	l2p_flush
-.LVL1589:
-	.loc 2 2214 0
+.LVL1623:
+	.loc 2 2264 0
 	bl	FtlVpcTblFlush
-.LVL1590:
-.L1401:
+.LVL1624:
+.L1428:
 	adds	r7, r7, #1
-.LVL1591:
-	b	.L1399
-.L1408:
+.LVL1625:
+	b	.L1426
+.L1435:
 	.align	2
-.L1407:
+.L1434:
 	.word	.LANCHOR168
-	.word	.LC91
+	.word	.LC94
 	.word	.LANCHOR6
 	.word	.LANCHOR128
-	.word	.LANCHOR62
-	.word	.LC102
+	.word	.LANCHOR61
+	.word	.LC105
 	.word	.LANCHOR51
 	.word	.LANCHOR53
 	.word	.LANCHOR52
 	.word	.LANCHOR5
-	.word	.LANCHOR43
+	.word	.LANCHOR42
 	.cfi_endproc
 .LFE292:
 	.size	FtlVpcCheckAndModify, .-FtlVpcCheckAndModify
@@ -16999,111 +17373,111 @@ FtlVpcCheckAndModify:
 	.type	allocate_new_data_superblock, %function
 allocate_new_data_superblock:
 .LFB302:
-	.loc 2 2631 0
+	.loc 2 2682 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1592:
-	.loc 2 2633 0
-	ldr	r3, .L1419
-	.loc 2 2631 0
+.LVL1626:
+	.loc 2 2684 0
+	ldr	r3, .L1446
+	.loc 2 2682 0
 	push	{r4, r5, r6, lr}
 	.cfi_def_cfa_offset 16
 	.cfi_offset 4, -16
 	.cfi_offset 5, -12
 	.cfi_offset 6, -8
 	.cfi_offset 14, -4
-	.loc 2 2631 0
+	.loc 2 2682 0
 	mov	r6, r0
-	.loc 2 2632 0
+	.loc 2 2683 0
 	ldrh	r4, [r0]
-.LVL1593:
-	.loc 2 2633 0
+.LVL1627:
+	.loc 2 2684 0
 	ldrh	r3, [r3]
 	cmp	r3, r4
-	bcs	.L1410
-	.loc 2 2633 0 is_stmt 0 discriminator 1
-	movw	r2, #2633
-	ldr	r1, .L1419+4
-	ldr	r0, .L1419+8
-.LVL1594:
+	bcs	.L1437
+	.loc 2 2684 0 is_stmt 0 discriminator 1
+	movw	r2, #2684
+	ldr	r1, .L1446+4
+	ldr	r0, .L1446+8
+.LVL1628:
 	bl	printf
-.LVL1595:
-.L1410:
-	.loc 2 2635 0 is_stmt 1
+.LVL1629:
+.L1437:
+	.loc 2 2686 0 is_stmt 1
 	movw	r3, #65535
 	cmp	r4, r3
-	beq	.L1411
-	.loc 2 2636 0
-	ldr	r3, .L1419+12
-	.loc 2 2637 0
+	beq	.L1438
+	.loc 2 2687 0
+	ldr	r3, .L1446+12
+	.loc 2 2688 0
 	mov	r0, r4
-	.loc 2 2636 0
+	.loc 2 2687 0
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
-	cbz	r3, .L1412
-	.loc 2 2637 0
+	cbz	r3, .L1439
+	.loc 2 2688 0
 	bl	INSERT_DATA_LIST
-.LVL1596:
-.L1411:
-	.loc 2 2642 0
-	ldr	r5, .L1419+16
+.LVL1630:
+.L1438:
+	.loc 2 2693 0
+	ldr	r5, .L1446+16
 	movw	r2, #65535
-	.loc 2 2641 0
+	.loc 2 2692 0
 	movs	r3, #1
 	strb	r3, [r6, #8]
-	.loc 2 2642 0
+	.loc 2 2693 0
 	ldrh	r0, [r5]
 	cmp	r0, r2
-	beq	.L1413
-	.loc 2 2643 0
+	beq	.L1440
+	.loc 2 2694 0
 	cmp	r4, r0
-	bne	.L1414
-	.loc 2 2643 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1419+12
+	bne	.L1441
+	.loc 2 2694 0 is_stmt 0 discriminator 1
+	ldr	r3, .L1446+12
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L1415
-.L1414:
-	.loc 2 2644 0 is_stmt 1
+	cbz	r3, .L1442
+.L1441:
+	.loc 2 2695 0 is_stmt 1
 	bl	update_vpc_list
-.LVL1597:
-.L1415:
-	.loc 2 2645 0
+.LVL1631:
+.L1442:
+	.loc 2 2696 0
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.L1413:
-	.loc 2 2647 0
+.L1440:
+	.loc 2 2698 0
 	mov	r0, r6
 	bl	allocate_data_superblock
-.LVL1598:
-	.loc 2 2648 0
+.LVL1632:
+	.loc 2 2699 0
 	bl	l2p_flush
-.LVL1599:
-	.loc 2 2649 0
+.LVL1633:
+	.loc 2 2700 0
 	movs	r0, #0
 	bl	FtlEctTblFlush
-.LVL1600:
-	.loc 2 2650 0
+.LVL1634:
+	.loc 2 2701 0
 	bl	FtlVpcTblFlush
-.LVL1601:
-	.loc 2 2652 0
+.LVL1635:
+	.loc 2 2703 0
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.LVL1602:
-.L1412:
-	.loc 2 2639 0
+.LVL1636:
+.L1439:
+	.loc 2 2690 0
 	bl	INSERT_FREE_LIST
-.LVL1603:
-	b	.L1411
-.L1420:
+.LVL1637:
+	b	.L1438
+.L1447:
 	.align	2
-.L1419:
+.L1446:
 	.word	.LANCHOR5
 	.word	.LANCHOR169
 	.word	.LC1
-	.word	.LANCHOR43
-	.word	.LANCHOR151
+	.word	.LANCHOR42
+	.word	.LANCHOR150
 	.cfi_endproc
 .LFE302:
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
@@ -17121,7 +17495,7 @@ FtlProgPages:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1604:
+.LVL1638:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 40
 	.cfi_offset 4, -32
@@ -17135,43 +17509,43 @@ FtlProgPages:
 	.loc 3 913 0
 	movs	r6, #0
 	.loc 3 917 0
-	ldr	r8, .L1435+24
+	ldr	r8, .L1462+24
 	.loc 3 904 0
 	mov	r4, r3
 	.loc 3 911 0
 	movs	r2, #0
-.LVL1605:
+.LVL1639:
 	.loc 3 904 0
 	mov	r5, r0
 	.loc 3 911 0
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
-.LVL1606:
+.LVL1640:
 	.loc 3 904 0
 	mov	r10, r1
 	.loc 3 911 0
 	bl	FlashProgPages
-.LVL1607:
-.L1422:
+.LVL1641:
+.L1449:
 	.loc 3 913 0 discriminator 1
 	cmp	r6, r10
-	beq	.L1429
+	beq	.L1456
 	.loc 3 918 0
-	ldr	r7, .L1435
-	b	.L1430
-.L1425:
+	ldr	r7, .L1462
+	b	.L1457
+.L1452:
 	.loc 3 915 0
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1608:
+.LVL1642:
 	.loc 3 916 0
 	ldrh	r3, [r4]
 	cmp	r3, r0
-	bne	.L1423
+	bne	.L1450
 	.loc 3 917 0
 	ldr	r1, [r8]
 	ldrh	r0, [r4, #4]
-.LVL1609:
+.LVL1643:
 	ldrh	r2, [r1, r3, lsl #1]
 	subs	r2, r2, r0
 	strh	r2, [r1, r3, lsl #1]	@ movhi
@@ -17183,17 +17557,17 @@ FtlProgPages:
 	strb	r3, [r4, #6]
 	.loc 3 920 0
 	strh	r3, [r4, #4]	@ movhi
-.L1423:
+.L1450:
 	.loc 3 922 0
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1424
+	cbnz	r3, .L1451
 	.loc 3 923 0
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-.LVL1610:
-.L1424:
+.LVL1644:
+.L1451:
 	.loc 3 926 0
-	ldr	r2, .L1435+4
+	ldr	r2, .L1462+4
 	ldr	r3, [r2, #96]
 	adds	r3, r3, #1
 	str	r3, [r2, #96]
@@ -17201,11 +17575,11 @@ FtlProgPages:
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	FtlGcMarkBadPhyBlk
-.LVL1611:
+.LVL1645:
 	.loc 3 928 0
 	mov	r0, r4
 	bl	get_new_active_ppa
-.LVL1612:
+.LVL1646:
 	.loc 3 930 0
 	movs	r2, #0
 	.loc 3 929 0
@@ -17217,25 +17591,25 @@ FtlProgPages:
 	ldrb	r3, [r4, #9]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	FlashProgPages
-.LVL1613:
-.L1430:
+.LVL1647:
+.L1457:
 	.loc 3 914 0
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L1425
+	beq	.L1452
 	.loc 3 933 0
-	ldr	r3, .L1435+8
+	ldr	r3, .L1462+8
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1426
+	bcc	.L1453
 	.loc 3 933 0 is_stmt 0 discriminator 1
 	movw	r2, #933
-	ldr	r1, .L1435+12
-	ldr	r0, .L1435+16
+	ldr	r1, .L1462+12
+	ldr	r0, .L1462+16
 	bl	printf
-.LVL1614:
-.L1426:
+.LVL1648:
+.L1453:
 	.loc 3 934 0 is_stmt 1
 	ldr	r3, [r5, #4]
 	add	r1, sp, #8
@@ -17246,465 +17620,167 @@ FtlProgPages:
 	str	r3, [r1, #-4]!
 	.loc 3 935 0
 	bl	log2phys
-.LVL1615:
+.LVL1649:
 	.loc 3 937 0
 	ldr	r3, [r5, #12]
 	ldr	fp, [r3, #12]
-.LVL1616:
+.LVL1650:
 	.loc 3 939 0
 	ubfx	r0, fp, #10, #16
 	bl	P2V_block_in_plane
-.LVL1617:
+.LVL1651:
 	.loc 3 940 0
 	cmp	fp, #-1
 	.loc 3 939 0
 	mov	r7, r0
-.LVL1618:
+.LVL1652:
 	.loc 3 940 0
-	beq	.L1427
+	beq	.L1454
 	.loc 3 942 0
 	ldr	r3, [r8]
 	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L1428
+	cbnz	r2, .L1455
 	.loc 3 943 0
 	mov	r1, r0
-	ldr	r0, .L1435+20
-.LVL1619:
+	ldr	r0, .L1462+20
+.LVL1653:
 	bl	printf
-.LVL1620:
-.L1428:
+.LVL1654:
+.L1455:
 	.loc 3 944 0
 	mov	r0, r7
 	bl	decrement_vpc_count
-.LVL1621:
-.L1427:
+.LVL1655:
+.L1454:
 	.loc 3 913 0 discriminator 2
 	adds	r6, r6, #1
-.LVL1622:
+.LVL1656:
 	adds	r5, r5, #20
-	b	.L1422
-.LVL1623:
-.L1429:
+	b	.L1449
+.LVL1657:
+.L1456:
 	.loc 3 948 0
-	ldr	r3, .L1435+8
+	ldr	r3, .L1462+8
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1421
+	bcc	.L1448
 	.loc 3 948 0 is_stmt 0 discriminator 1
 	mov	r2, #948
-	ldr	r1, .L1435+12
-	ldr	r0, .L1435+16
+	ldr	r1, .L1462+12
+	ldr	r0, .L1462+16
 	bl	printf
-.LVL1624:
-.L1421:
+.LVL1658:
+.L1448:
 	.loc 3 949 0 is_stmt 1
 	add	sp, sp, #8
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1625:
-.L1436:
+.LVL1659:
+.L1463:
 	.align	2
-.L1435:
+.L1462:
 	.word	.LANCHOR19
-	.word	.LANCHOR83
+	.word	.LANCHOR81
 	.word	.LANCHOR3
 	.word	.LANCHOR170
 	.word	.LC1
-	.word	.LC103
-	.word	.LANCHOR43
+	.word	.LC106
+	.word	.LANCHOR42
 	.cfi_endproc
 .LFE218:
 	.size	FtlProgPages, .-FtlProgPages
-	.section	.text.FtlCacheWriteBack,"ax",%progbits
+	.section	.text.FtlGcFreeTempBlock,"ax",%progbits
 	.align	1
-	.global	FtlCacheWriteBack
+	.global	FtlGcFreeTempBlock
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlCacheWriteBack, %function
-FtlCacheWriteBack:
-.LFB219:
-	.loc 3 952 0
+	.type	FtlGcFreeTempBlock, %function
+FtlGcFreeTempBlock:
+.LFB311:
+	.loc 5 112 0
 	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 4, -8
+.LVL1660:
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 48
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	.loc 3 953 0
-	ldr	r4, .L1442
-	ldr	r0, [r4]
-	cbz	r0, .L1438
-	.loc 3 954 0
-	ldr	r3, .L1442+4
+	.loc 5 119 0
+	movw	r2, #65535
+	ldr	r4, .L1490
+	.loc 5 115 0
+	ldr	r6, .L1490+4
+	.loc 5 119 0
+	ldrh	r5, [r4]
+	.loc 5 115 0
+	ldrh	r1, [r6]
+.LVL1661:
+	.loc 5 119 0
+	cmp	r5, r2
+	bne	.L1465
+.LVL1662:
+.L1475:
+	.loc 5 152 0
+	ldr	r3, .L1490+8
 	movs	r2, #0
-	movs	r1, #1
-	ldr	r3, [r3]
-	bl	FtlProgPages
-.LVL1626:
-	.loc 3 955 0
-	movs	r3, #0
-	str	r3, [r4]
-.L1438:
-	.loc 3 958 0
+	str	r2, [r3]
+	.loc 5 153 0
+	movw	r3, #65535
+	ldrh	r2, [r4]
+	cmp	r2, r3
+	bne	.L1488
+.L1466:
+	.loc 5 154 0
 	movs	r0, #0
-	pop	{r4, pc}
-.L1443:
-	.align	2
-.L1442:
-	.word	.LANCHOR150
-	.word	.LANCHOR171
-	.cfi_endproc
-.LFE219:
-	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
-	.section	.text.FtlSysFlush,"ax",%progbits
-	.align	1
-	.global	FtlSysFlush
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlSysFlush, %function
-FtlSysFlush:
-.LFB215:
-	.loc 3 797 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 3, -8
-	.cfi_offset 14, -4
-	.loc 3 798 0
-	bl	FtlCacheWriteBack
-.LVL1627:
-	.loc 3 799 0
-	bl	l2p_flush
-.LVL1628:
-	.loc 3 800 0
-	movs	r0, #1
-	bl	FtlEctTblFlush
-.LVL1629:
-	.loc 3 801 0
-	bl	FtlVpcTblFlush
-.LVL1630:
-	.loc 3 803 0
-	movs	r0, #0
-	pop	{r3, pc}
-	.cfi_endproc
-.LFE215:
-	.size	FtlSysFlush, .-FtlSysFlush
-	.section	.text.sftl_deinit,"ax",%progbits
-	.align	1
-	.global	sftl_deinit
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	sftl_deinit, %function
-sftl_deinit:
-.LFB216:
-	.loc 3 806 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 3, -8
-	.cfi_offset 14, -4
-	.loc 3 807 0
-	ldr	r3, .L1447
-	ldr	r3, [r3]
-	cmp	r3, #1
-	bne	.L1446
-	.loc 3 808 0
-	bl	FtlSysFlush
-.LVL1631:
-.L1446:
-	.loc 3 810 0
-	movs	r0, #0
-	pop	{r3, pc}
-.L1448:
-	.align	2
-.L1447:
-	.word	.LANCHOR88
-	.cfi_endproc
-.LFE216:
-	.size	sftl_deinit, .-sftl_deinit
-	.section	.text.FtlDiscard,"ax",%progbits
-	.align	1
-	.global	FtlDiscard
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlDiscard, %function
-FtlDiscard:
-.LFB221:
-	.loc 3 1157 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1632:
-	.loc 3 1164 0
-	ldr	r3, .L1464
-	adds	r2, r0, r1
-	.loc 3 1157 0
-	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -24
-	.cfi_offset 5, -20
-	.cfi_offset 6, -16
-	.cfi_offset 7, -12
-	.cfi_offset 8, -8
-	.cfi_offset 14, -4
-	.loc 3 1157 0
-	mov	r6, r0
-	mov	r5, r1
-	.loc 3 1164 0
-	ldr	r3, [r3]
-	cmp	r2, r3
-	bhi	.L1457
-	.loc 3 1167 0
-	cmp	r1, #31
-	bhi	.L1451
-.LVL1633:
-.L1456:
-	.loc 3 1168 0
-	movs	r0, #0
-.L1449:
-	.loc 3 1201 0
-	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, pc}
-.LVL1634:
-.L1451:
-	.cfi_restore_state
-	.loc 3 1172 0
-	ldr	r8, .L1464+12
-	.loc 3 1170 0
-	bl	FtlCacheWriteBack
-.LVL1635:
-	.loc 3 1172 0
-	mov	r0, r6
-	ldrh	r4, [r8]
-	mov	r1, r4
-	bl	__aeabi_uidiv
-.LVL1636:
-	.loc 3 1173 0
-	smulbb	r3, r0, r4
-	.loc 3 1172 0
-	mov	r7, r0
-.LVL1637:
-	.loc 3 1173 0
-	subs	r6, r6, r3
-.LVL1638:
-	uxth	r6, r6
-.LVL1639:
-	.loc 3 1174 0
-	cbz	r6, .L1452
-.LVL1640:
-	.loc 3 1175 0
-	subs	r4, r4, r6
-.LVL1641:
-	.loc 3 1176 0
-	adds	r7, r7, #1
-.LVL1642:
-	.loc 3 1175 0
-	cmp	r4, r5
-	it	cs
-	movcs	r4, r5
-	uxth	r4, r4
-	.loc 3 1177 0
-	subs	r5, r5, r4
-.LVL1643:
-.L1452:
-	.loc 3 1184 0
-	ldr	r4, .L1464+4
-	.loc 3 1180 0
-	mov	r3, #-1
-	.loc 3 1185 0
-	ldr	r6, .L1464+8
-.LVL1644:
-	.loc 3 1180 0
-	str	r3, [sp, #4]
-.L1453:
-	.loc 3 1181 0
-	ldrh	r3, [r8]
-	cmp	r5, r3
-	bcs	.L1455
-	.loc 3 1194 0
-	ldr	r3, .L1464+4
-	ldr	r2, [r3]
-	cmp	r2, #32
-	bls	.L1456
-	.loc 3 1196 0
-	movs	r4, #0
-	str	r4, [r3]
-	.loc 3 1197 0
-	bl	l2p_flush
-.LVL1645:
-	.loc 3 1198 0
-	bl	FtlVpcTblFlush
-.LVL1646:
-	b	.L1456
-.L1455:
-	.loc 3 1182 0
-	movs	r2, #0
-	mov	r1, sp
-	mov	r0, r7
-	bl	log2phys
-.LVL1647:
-	.loc 3 1183 0
-	ldr	r3, [sp]
-	adds	r3, r3, #1
-	beq	.L1454
-	.loc 3 1184 0
-	ldr	r3, [r4]
-	.loc 3 1186 0
-	movs	r2, #1
-	add	r1, sp, #4
-	mov	r0, r7
-	.loc 3 1184 0
-	adds	r3, r3, #1
-	str	r3, [r4]
-	.loc 3 1185 0
-	ldr	r3, [r6]
-	adds	r3, r3, #1
-	str	r3, [r6]
-	.loc 3 1186 0
-	bl	log2phys
-.LVL1648:
-	.loc 3 1187 0
-	ldr	r0, [sp]
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-.LVL1649:
-	.loc 3 1188 0
-	bl	decrement_vpc_count
-.LVL1650:
-.L1454:
-	.loc 3 1191 0
-	ldrh	r3, [r8]
-	.loc 3 1190 0
-	adds	r7, r7, #1
-.LVL1651:
-	.loc 3 1191 0
-	subs	r5, r5, r3
-.LVL1652:
-	b	.L1453
-.LVL1653:
-.L1457:
-	.loc 3 1165 0
-	mov	r0, #-1
-.LVL1654:
-	b	.L1449
-.L1465:
-	.align	2
 .L1464:
-	.word	.LANCHOR34
-	.word	.LANCHOR172
-	.word	.LANCHOR64
-	.word	.LANCHOR12
-	.cfi_endproc
-.LFE221:
-	.size	FtlDiscard, .-FtlDiscard
-	.section	.text.FtlGcFreeTempBlock,"ax",%progbits
-	.align	1
-	.global	FtlGcFreeTempBlock
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlGcFreeTempBlock, %function
-FtlGcFreeTempBlock:
-.LFB311:
-	.loc 5 112 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 16
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1655:
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 48
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 5 119 0
-	movw	r2, #65535
-	ldr	r4, .L1492
-	.loc 5 115 0
-	ldr	r6, .L1492+4
-	.loc 5 119 0
-	ldrh	r5, [r4]
-	.loc 5 115 0
-	ldrh	r1, [r6]
-.LVL1656:
-	.loc 5 119 0
-	cmp	r5, r2
-	bne	.L1467
-.LVL1657:
-.L1477:
-	.loc 5 152 0
-	ldr	r3, .L1492+8
-	movs	r2, #0
-	str	r2, [r3]
-	.loc 5 153 0
-	movw	r3, #65535
-	ldrh	r2, [r4]
-	cmp	r2, r3
-	bne	.L1490
-.L1468:
-	.loc 5 154 0
-	movs	r0, #0
-.L1466:
 	.loc 5 199 0
 	add	sp, sp, #16
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1658:
-.L1467:
+.LVL1663:
+.L1465:
 	.cfi_restore_state
 	.loc 5 121 0
-	cbz	r0, .L1470
-.LVL1659:
+	cbz	r0, .L1468
+.LVL1664:
 	.loc 5 123 0
-	ldr	r3, .L1492+12
+	ldr	r3, .L1490+12
 	ldrh	r0, [r3]
-.LVL1660:
+.LVL1665:
 	cmp	r0, r2
-	beq	.L1471
-.L1472:
+	beq	.L1469
+.L1470:
 	.loc 5 122 0
 	movs	r1, #2
-.LVL1661:
-.L1470:
+.LVL1666:
+.L1468:
 	.loc 5 131 0
-	ldr	r0, .L1492
+	ldr	r0, .L1490
 	bl	FtlGcScanTempBlk
-.LVL1662:
+.LVL1667:
 	str	r0, [sp, #12]
 	.loc 5 132 0
 	adds	r0, r0, #1
-	beq	.L1473
+	beq	.L1471
 	.loc 5 135 0
-	ldr	r3, .L1492+16
+	ldr	r3, .L1490+16
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r5, lsl #1]
 	cmp	r3, #4
-	bls	.L1474
+	bls	.L1472
 	.loc 5 136 0
 	subs	r3, r3, #5
 	.loc 5 137 0
@@ -17713,14 +17789,14 @@ FtlGcFreeTempBlock:
 	strh	r3, [r2, r5, lsl #1]	@ movhi
 	.loc 5 137 0
 	bl	FtlEctTblFlush
-.LVL1663:
-.L1474:
+.LVL1668:
+.L1472:
 	.loc 5 139 0
-	ldr	r4, .L1492+8
+	ldr	r4, .L1490+8
 	ldr	r2, [r4]
-	cbnz	r2, .L1475
+	cbnz	r2, .L1473
 	.loc 5 140 0
-	ldr	r2, .L1492+20
+	ldr	r2, .L1490+20
 	.loc 5 141 0
 	ldr	r0, [sp, #12]
 	.loc 5 140 0
@@ -17732,65 +17808,62 @@ FtlGcFreeTempBlock:
 	str	r3, [r2, #96]
 	.loc 5 141 0
 	bl	FtlBbmMapBadBlock
-.LVL1664:
+.LVL1669:
 	.loc 5 142 0
 	bl	FtlBbmTblFlush
-.LVL1665:
-.L1475:
+.LVL1670:
+.L1473:
 	.loc 5 144 0
 	movs	r3, #0
 	str	r3, [r4]
-.L1486:
+.L1484:
 	.loc 5 149 0
 	movs	r0, #1
-	b	.L1466
-.LVL1666:
-.L1471:
+	b	.L1464
+.LVL1671:
+.L1469:
 	.loc 5 124 0
 	movs	r2, #0
 	strh	r2, [r3]	@ movhi
 	.loc 5 125 0
-	ldr	r3, .L1492+24
+	ldr	r3, .L1490+24
 	ldrh	r3, [r3]
 	cmp	r3, #17
-	bhi	.L1472
-	b	.L1470
-.LVL1667:
-.L1473:
+	bhi	.L1470
+	b	.L1468
+.LVL1672:
+.L1471:
 	.loc 5 148 0
-	ldr	r3, .L1492+12
+	ldr	r3, .L1490+12
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1486
-	b	.L1477
-.LVL1668:
-.L1490:
-	.loc 5 160 0
-	bl	FtlCacheWriteBack
-.LVL1669:
+	bne	.L1484
+	b	.L1475
+.LVL1673:
+.L1488:
 	.loc 5 162 0
 	ldrb	r1, [r4, #7]	@ zero_extendqisi2
 	ldrh	r3, [r6]
-	ldr	r5, .L1492+28
+	ldr	r5, .L1490+28
 	muls	r3, r1, r3
 	ldrh	r2, [r5]
 	cmp	r2, r3
-	beq	.L1478
+	beq	.L1476
 	.loc 5 162 0 is_stmt 0 discriminator 1
 	movs	r2, #162
-	ldr	r1, .L1492+32
-	ldr	r0, .L1492+36
+	ldr	r1, .L1490+32
+	ldr	r0, .L1490+36
 	bl	printf
-.LVL1670:
-.L1478:
+.LVL1674:
+.L1476:
 	.loc 5 163 0 is_stmt 1
 	ldrh	r6, [r6]
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	ldr	r2, .L1492+40
+	ldr	r2, .L1490+40
 	ldrh	r0, [r4]
 	.loc 5 168 0
-	ldr	fp, .L1492+68
+	ldr	fp, .L1490+68
 	.loc 5 163 0
 	smulbb	r3, r3, r6
 	ldr	r1, [r2]
@@ -17800,38 +17873,38 @@ FtlGcFreeTempBlock:
 	.loc 5 163 0
 	strh	r3, [r1, r0, lsl #1]	@ movhi
 	.loc 5 164 0
-	ldr	r1, .L1492+44
+	ldr	r1, .L1490+44
 	ldrh	r3, [r5]
 	ldr	r0, [r1]
 	add	r3, r3, r0
 	str	r3, [r1]
-.LVL1671:
-.L1479:
+.LVL1675:
+.L1477:
 	.loc 5 165 0 discriminator 1
 	ldrh	r2, [r5]
 	uxth	r3, r6
 	cmp	r2, r3
-	bhi	.L1483
+	bhi	.L1481
 	.loc 5 181 0
 	movw	r0, #65535
 	bl	decrement_vpc_count
-.LVL1672:
+.LVL1676:
 	.loc 5 182 0
 	ldr	r3, [sp, #4]
 	ldrh	r0, [r4]
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	beq	.L1484
+	beq	.L1482
 	.loc 5 183 0
 	bl	INSERT_DATA_LIST
-.LVL1673:
-.L1485:
+.LVL1677:
+.L1483:
 	.loc 5 188 0
-	ldr	r3, .L1492+48
+	ldr	r3, .L1490+48
 	.loc 5 186 0
 	movw	r6, #65535
-.LVL1674:
+.LVL1678:
 	strh	r6, [r4]	@ movhi
 	.loc 5 187 0
 	movs	r4, #0
@@ -17840,30 +17913,30 @@ FtlGcFreeTempBlock:
 	strh	r4, [r3]	@ movhi
 	.loc 5 189 0
 	bl	l2p_flush
-.LVL1675:
+.LVL1679:
 	.loc 5 190 0
 	bl	FtlVpcTblFlush
-.LVL1676:
+.LVL1680:
 	.loc 5 191 0
-	ldr	r3, .L1492+24
+	ldr	r3, .L1490+24
 	ldrh	r2, [r3]
-	ldr	r3, .L1492+52
+	ldr	r3, .L1490+52
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, asr #2
-	ble	.L1468
+	ble	.L1466
 	.loc 5 192 0
-	ldr	r3, .L1492+56
+	ldr	r3, .L1490+56
 	.loc 5 193 0
 	movs	r2, #20
 	.loc 5 192 0
 	strh	r6, [r3]	@ movhi
 	.loc 5 193 0
-	ldr	r3, .L1492+60
+	ldr	r3, .L1490+60
 	strh	r2, [r3]	@ movhi
-	b	.L1468
-.LVL1677:
-.L1483:
+	b	.L1466
+.LVL1681:
+.L1481:
 	.loc 5 166 0
 	uxth	r3, r6
 	movs	r7, #12
@@ -17871,93 +17944,93 @@ FtlGcFreeTempBlock:
 	ldr	r2, [fp]
 	.loc 5 166 0
 	muls	r7, r3, r7
-	ldr	r3, .L1492+64
+	ldr	r3, .L1490+64
 	ldr	r8, [r3]
 	add	r10, r8, r7
-.LVL1678:
+.LVL1682:
 	.loc 5 168 0
 	ldr	r1, [r10, #8]
 	cmp	r1, r2
-	bcc	.L1480
+	bcc	.L1478
 	.loc 5 168 0 is_stmt 0 discriminator 1
 	movs	r2, #168
-	ldr	r1, .L1492+32
-	ldr	r0, .L1492+36
+	ldr	r1, .L1490+32
+	ldr	r0, .L1490+36
 	bl	printf
-.LVL1679:
-.L1480:
+.LVL1683:
+.L1478:
 	.loc 5 169 0 is_stmt 1
 	movs	r2, #0
 	add	r1, sp, #12
 	ldr	r0, [r10, #8]
 	bl	log2phys
-.LVL1680:
+.LVL1684:
 	.loc 5 170 0
 	ldr	r2, [sp, #12]
 	ldr	r0, [r8, r7]
 	cmp	r0, r2
-	bne	.L1481
+	bne	.L1479
 	.loc 5 171 0
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1681:
+.LVL1685:
 	.loc 5 172 0
 	movs	r2, #1
 	.loc 5 171 0
 	mov	r7, r0
-.LVL1682:
+.LVL1686:
 	.loc 5 172 0
 	add	r1, r10, #4
 	ldr	r0, [r10, #8]
 	bl	log2phys
-.LVL1683:
+.LVL1687:
 	.loc 5 173 0
 	mov	r0, r7
-.LVL1684:
-.L1491:
+.LVL1688:
+.L1489:
 	.loc 5 177 0
 	bl	decrement_vpc_count
-.LVL1685:
-.L1482:
+.LVL1689:
+.L1480:
 	adds	r6, r6, #1
-.LVL1686:
-	b	.L1479
-.LVL1687:
-.L1481:
+.LVL1690:
+	b	.L1477
+.LVL1691:
+.L1479:
 	.loc 5 175 0
 	ldr	r3, [r10, #4]
 	cmp	r2, r3
-	beq	.L1482
+	beq	.L1480
 	.loc 5 177 0
 	ldrh	r0, [r4]
-	b	.L1491
-.LVL1688:
-.L1484:
+	b	.L1489
+.LVL1692:
+.L1482:
 	.loc 5 185 0
 	bl	INSERT_FREE_LIST
-.LVL1689:
-	b	.L1485
-.L1493:
+.LVL1693:
+	b	.L1483
+.L1491:
 	.align	2
-.L1492:
+.L1490:
 	.word	.LANCHOR53
 	.word	.LANCHOR19
-	.word	.LANCHOR153
-	.word	.LANCHOR157
-	.word	.LANCHOR40
-	.word	.LANCHOR83
+	.word	.LANCHOR152
+	.word	.LANCHOR156
+	.word	.LANCHOR43
+	.word	.LANCHOR81
 	.word	.LANCHOR48
-	.word	.LANCHOR99
-	.word	.LANCHOR173
+	.word	.LANCHOR97
+	.word	.LANCHOR171
 	.word	.LC1
-	.word	.LANCHOR43
-	.word	.LANCHOR68
-	.word	.LANCHOR98
+	.word	.LANCHOR42
+	.word	.LANCHOR67
+	.word	.LANCHOR96
+	.word	.LANCHOR78
 	.word	.LANCHOR80
 	.word	.LANCHOR82
-	.word	.LANCHOR84
-	.word	.LANCHOR100
-	.word	.LANCHOR62
+	.word	.LANCHOR98
+	.word	.LANCHOR61
 	.cfi_endproc
 .LFE311:
 	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
@@ -17982,42 +18055,42 @@ FtlGcPageRecovery:
 	.cfi_offset 5, -8
 	.cfi_offset 14, -4
 	.loc 5 290 0
-	ldr	r4, .L1496
-	ldr	r5, .L1496+4
+	ldr	r4, .L1494
+	ldr	r5, .L1494+4
 	ldrh	r1, [r4]
 	mov	r0, r5
 	bl	FtlGcScanTempBlk
-.LVL1690:
+.LVL1694:
 	.loc 5 291 0
 	ldrh	r2, [r5, #2]
 	ldrh	r3, [r4]
 	cmp	r2, r3
-	bcc	.L1494
-.LBB286:
-.LBB287:
+	bcc	.L1492
+.LBB319:
+.LBB320:
 	.loc 5 293 0
-	ldr	r0, .L1496+8
+	ldr	r0, .L1494+8
 	bl	FtlMapBlkWriteDump_data
-.LVL1691:
+.LVL1695:
 	.loc 5 294 0
 	movs	r0, #0
 	bl	FtlGcFreeTempBlock
-.LVL1692:
+.LVL1696:
 	.loc 5 295 0
-	ldr	r3, .L1496+12
+	ldr	r3, .L1494+12
 	movs	r2, #0
 	str	r2, [r3]
-.L1494:
+.L1492:
 	pop	{r3, r4, r5, pc}
-.L1497:
+.L1495:
 	.align	2
-.L1496:
+.L1494:
 	.word	.LANCHOR19
 	.word	.LANCHOR53
 	.word	.LANCHOR144
-	.word	.LANCHOR153
-.LBE287:
-.LBE286:
+	.word	.LANCHOR152
+.LBE320:
+.LBE319:
 	.cfi_endproc
 .LFE314:
 	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
@@ -18031,7 +18104,7 @@ FtlGcPageRecovery:
 	.type	FtlPowerLostRecovery, %function
 FtlPowerLostRecovery:
 .LFB286:
-	.loc 2 2032 0
+	.loc 2 2081 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
@@ -18041,49 +18114,49 @@ FtlPowerLostRecovery:
 	.cfi_offset 4, -12
 	.cfi_offset 5, -8
 	.cfi_offset 14, -4
-	.loc 2 2033 0
+	.loc 2 2082 0
 	movs	r4, #0
-	.loc 2 2035 0
-	ldr	r5, .L1499
-	.loc 2 2033 0
-	ldr	r3, .L1499+4
-	.loc 2 2035 0
+	.loc 2 2084 0
+	ldr	r5, .L1497
+	.loc 2 2082 0
+	ldr	r3, .L1497+4
+	.loc 2 2084 0
 	mov	r0, r5
-	.loc 2 2033 0
+	.loc 2 2082 0
 	str	r4, [r3]
-	.loc 2 2035 0
+	.loc 2 2084 0
 	bl	FtlRecoverySuperblock
-.LVL1693:
-	.loc 2 2036 0
+.LVL1697:
+	.loc 2 2085 0
 	mov	r0, r5
-	.loc 2 2037 0
-	ldr	r5, .L1499+8
-	.loc 2 2036 0
+	.loc 2 2086 0
+	ldr	r5, .L1497+8
+	.loc 2 2085 0
 	bl	FtlSlcSuperblockCheck
-.LVL1694:
-	.loc 2 2037 0
+.LVL1698:
+	.loc 2 2086 0
 	mov	r0, r5
 	bl	FtlRecoverySuperblock
-.LVL1695:
-	.loc 2 2038 0
+.LVL1699:
+	.loc 2 2087 0
 	mov	r0, r5
 	bl	FtlSlcSuperblockCheck
-.LVL1696:
-	.loc 2 2039 0
+.LVL1700:
+	.loc 2 2088 0
 	bl	FtlGcPageRecovery
-.LVL1697:
-	.loc 2 2040 0
+.LVL1701:
+	.loc 2 2089 0
 	movw	r0, #65535
 	bl	decrement_vpc_count
-.LVL1698:
-	.loc 2 2042 0
+.LVL1702:
+	.loc 2 2091 0
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L1500:
+.L1498:
 	.align	2
-.L1499:
+.L1497:
 	.word	.LANCHOR51
-	.word	.LANCHOR163
+	.word	.LANCHOR162
 	.word	.LANCHOR52
 	.cfi_endproc
 .LFE286:
@@ -18112,62 +18185,62 @@ Ftl_gc_temp_data_write_back:
 	.cfi_offset 14, -4
 	.loc 5 320 0
 	movs	r3, #0
-	ldr	r4, .L1508
+	ldr	r4, .L1506
 	.loc 5 321 0
 	movs	r6, #0
 	.loc 5 322 0
 	movs	r7, #20
 	.loc 5 320 0
 	mov	r2, r3
-	ldr	r5, .L1508+4
+	ldr	r5, .L1506+4
 	ldr	r1, [r4]
 	ldr	r0, [r5]
 	bl	FlashProgPages
-.LVL1699:
-.L1502:
+.LVL1703:
+.L1500:
 	.loc 5 321 0 discriminator 1
 	ldr	r1, [r4]
 	uxth	r3, r6
 	cmp	r1, r3
-	bhi	.L1505
+	bhi	.L1503
 	.loc 5 335 0
 	ldr	r0, [r5]
 	bl	FtlGcBufFree
-.LVL1700:
+.LVL1704:
 	.loc 5 337 0
-	ldr	r3, .L1508+8
+	ldr	r3, .L1506+8
 	.loc 5 336 0
 	movs	r0, #0
 	str	r0, [r4]
 	.loc 5 337 0
 	ldrh	r3, [r3, #4]
-	cbnz	r3, .L1501
+	cbnz	r3, .L1499
 	.loc 5 338 0
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
-.LVL1701:
-	b	.L1507
-.L1505:
+.LVL1705:
+	b	.L1505
+.L1503:
 	.loc 5 322 0
 	muls	r3, r7, r3
 	ldr	r2, [r5]
 	adds	r6, r6, #1
-.LVL1702:
+.LVL1706:
 	adds	r1, r2, r3
 	ldr	r2, [r2, r3]
 	adds	r3, r2, #1
-	bne	.L1503
+	bne	.L1501
 	.loc 5 323 0
-	ldr	r3, .L1508+8
+	ldr	r3, .L1506+8
 	movs	r5, #0
-	ldr	r0, .L1508+12
+	ldr	r0, .L1506+12
 	ldrh	r4, [r3]
 	ldr	r0, [r0]
 	strh	r5, [r0, r4, lsl #1]	@ movhi
 	.loc 5 324 0
 	strh	r2, [r3]	@ movhi
 	.loc 5 325 0
-	ldr	r2, .L1508+16
+	ldr	r2, .L1506+16
 	.loc 5 326 0
 	ldr	r0, [r1, #4]
 	.loc 5 325 0
@@ -18179,38 +18252,38 @@ Ftl_gc_temp_data_write_back:
 	str	r3, [r2, #96]
 	.loc 5 326 0
 	bl	FtlBbmMapBadBlock
-.LVL1703:
+.LVL1707:
 	.loc 5 327 0
 	bl	FtlBbmTblFlush
-.LVL1704:
+.LVL1708:
 	.loc 5 328 0
 	bl	FtlGcPageVarInit
-.LVL1705:
-.L1507:
+.LVL1709:
+.L1505:
 	.loc 5 339 0
 	movs	r0, #1
-.L1501:
+.L1499:
 	.loc 5 342 0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1503:
+.L1501:
 	.loc 5 331 0 discriminator 2
 	ldr	r3, [r1, #12]
-.LVL1706:
+.LVL1710:
 	.loc 5 332 0 discriminator 2
 	ldr	r1, [r1, #4]
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
 	bl	FtlGcUpdatePage
-.LVL1707:
-	b	.L1502
-.L1509:
+.LVL1711:
+	b	.L1500
+.L1507:
 	.align	2
-.L1508:
-	.word	.LANCHOR91
+.L1506:
+	.word	.LANCHOR89
 	.word	.LANCHOR121
 	.word	.LANCHOR53
-	.word	.LANCHOR43
-	.word	.LANCHOR83
+	.word	.LANCHOR42
+	.word	.LANCHOR81
 	.cfi_endproc
 .LFE316:
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
@@ -18236,50 +18309,47 @@ Ftl_get_new_temp_ppa:
 	.cfi_offset 14, -4
 	.loc 5 301 0
 	movw	r3, #65535
-	ldr	r4, .L1513
+	ldr	r4, .L1511
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	beq	.L1511
+	beq	.L1509
 	.loc 5 301 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1512
-.L1511:
-	.loc 5 302 0 is_stmt 1
-	bl	FtlCacheWriteBack
-.LVL1708:
-	.loc 5 303 0
+	cbnz	r3, .L1510
+.L1509:
+	.loc 5 303 0 is_stmt 1
 	movs	r0, #0
 	.loc 5 304 0
 	movs	r5, #0
 	.loc 5 303 0
 	bl	FtlGcFreeTempBlock
-.LVL1709:
+.LVL1712:
 	.loc 5 305 0
-	ldr	r0, .L1513
+	ldr	r0, .L1511
 	.loc 5 304 0
 	strb	r5, [r4, #8]
 	.loc 5 305 0
 	bl	allocate_data_superblock
-.LVL1710:
+.LVL1713:
 	.loc 5 306 0
-	ldr	r3, .L1513+4
+	ldr	r3, .L1511+4
 	strh	r5, [r3]	@ movhi
 	.loc 5 307 0
-	ldr	r3, .L1513+8
+	ldr	r3, .L1511+8
 	strh	r5, [r3]	@ movhi
 	.loc 5 308 0
 	bl	l2p_flush
-.LVL1711:
+.LVL1714:
 	.loc 5 309 0
 	mov	r0, r5
 	bl	FtlEctTblFlush
-.LVL1712:
+.LVL1715:
 	.loc 5 310 0
 	bl	FtlVpcTblFlush
-.LVL1713:
-.L1512:
+.LVL1716:
+.L1510:
 	.loc 5 312 0
-	ldr	r0, .L1513
+	ldr	r0, .L1511
 	.loc 5 313 0
 	pop	{r3, r4, r5, lr}
 	.cfi_restore 14
@@ -18289,13 +18359,13 @@ Ftl_get_new_temp_ppa:
 	.cfi_def_cfa_offset 0
 	.loc 5 312 0
 	b	get_new_active_ppa
-.LVL1714:
-.L1514:
+.LVL1717:
+.L1512:
 	.align	2
-.L1513:
+.L1511:
 	.word	.LANCHOR53
-	.word	.LANCHOR98
-	.word	.LANCHOR99
+	.word	.LANCHOR96
+	.word	.LANCHOR97
 	.cfi_endproc
 .LFE315:
 	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
@@ -18313,9 +18383,9 @@ rk_ftl_garbage_collect:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1715:
+.LVL1718:
 	.loc 5 478 0
-	ldr	r3, .L1633
+	ldr	r3, .L1631
 	.loc 5 470 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
@@ -18332,36 +18402,36 @@ rk_ftl_garbage_collect:
 	.cfi_def_cfa_offset 80
 	.loc 5 478 0
 	ldr	r0, [r3]
-.LVL1716:
+.LVL1719:
 	cmp	r0, #0
-	bne	.L1590
+	bne	.L1588
 	.loc 5 481 0
-	ldr	r3, .L1633+4
+	ldr	r3, .L1631+4
 	ldrh	r3, [r3]
 	cmp	r3, #47
-	bls	.L1515
+	bls	.L1513
 	.loc 5 485 0
-	ldr	r3, .L1633+8
+	ldr	r3, .L1631+8
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1517
-.LVL1717:
-.L1520:
-.LBB291:
-.LBB292:
+	bne	.L1515
+.LVL1720:
+.L1518:
+.LBB324:
+.LBB325:
 	.loc 5 489 0
-	ldr	r3, .L1633+12
+	ldr	r3, .L1631+12
 	movw	r4, #65535
 	ldrh	r0, [r3]
 	cmp	r0, r4
-	bne	.L1518
-.L1519:
+	bne	.L1516
+.L1517:
 	.loc 5 496 0
-	ldr	r2, .L1633+16
+	ldr	r2, .L1631+16
 	.loc 5 497 0
 	movw	r5, #65535
-	ldr	r6, .L1633+20
+	ldr	r6, .L1631+20
 	.loc 5 496 0
 	ldr	r3, [r2]
 	.loc 5 497 0
@@ -18374,17 +18444,17 @@ rk_ftl_garbage_collect:
 	.loc 5 496 0
 	str	r3, [r2]
 	.loc 5 497 0
-	bne	.L1521
-	ldr	r1, .L1633+24
+	bne	.L1519
+	ldr	r1, .L1631+24
 	ldrh	r1, [r1]
 	cmp	r1, r0
-	bne	.L1522
-	ldr	r0, .L1633+28
+	bne	.L1520
+	ldr	r0, .L1631+28
 	ldrh	r10, [r0]
 	cmp	r10, r1
-	bne	.L1523
+	bne	.L1521
 	.loc 5 498 0
-	ldr	r1, .L1633+32
+	ldr	r1, .L1631+32
 	ldrh	r0, [r1]
 	mov	r8, r1
 	cmp	r0, #24
@@ -18392,10 +18462,10 @@ rk_ftl_garbage_collect:
 	movcc	r1, #5120
 	movcs	r1, #1024
 	cmp	r3, r1
-	bls	.L1523
-.LBB293:
+	bls	.L1521
+.LBB326:
 	.loc 5 502 0
-	ldr	r3, .L1633+36
+	ldr	r3, .L1631+36
 	.loc 5 501 0
 	movs	r4, #0
 	str	r4, [r2]
@@ -18403,152 +18473,152 @@ rk_ftl_garbage_collect:
 	strh	r4, [r3]	@ movhi
 	.loc 5 503 0
 	bl	GetSwlReplaceBlock
-.LVL1718:
+.LVL1721:
 	.loc 5 504 0
 	cmp	r0, r10
 	.loc 5 503 0
 	mov	r5, r0
-.LVL1719:
+.LVL1722:
 	.loc 5 504 0
-	bne	.L1594
+	bne	.L1592
 	.loc 5 505 0
-	ldr	r10, .L1633+96
+	ldr	r10, .L1631+96
 	ldrh	r2, [r8]
 	ldrh	r3, [r10]
 	cmp	r2, r3
-	bcs	.L1526
+	bcs	.L1524
 	.loc 5 506 0
 	movs	r0, #64
-.LVL1720:
+.LVL1723:
 	bl	List_get_gc_head_node
-.LVL1721:
+.LVL1724:
 	.loc 5 507 0
 	uxth	r3, r0
 	cmp	r3, r5
-	beq	.L1528
+	beq	.L1526
 	.loc 5 508 0
 	mov	r0, r3
-	ldr	r3, .L1633+40
+	ldr	r3, .L1631+40
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #7
-	bhi	.L1529
+	bhi	.L1527
 	.loc 5 509 0
 	mov	r0, r4
-.LVL1722:
+.LVL1725:
 	bl	List_get_gc_head_node
-.LVL1723:
+.LVL1726:
 	uxth	r4, r0
-.LVL1724:
+.LVL1727:
 	.loc 5 510 0
 	movs	r3, #128
 	strh	r3, [r10]	@ movhi
 	.loc 5 520 0
 	cmp	r4, r5
-	bne	.L1525
-.LVL1725:
-.L1528:
+	bne	.L1523
+.LVL1728:
+.L1526:
 	.loc 5 523 0
 	bl	FtlGcReFreshBadBlk
-.LVL1726:
-.LBE293:
+.LVL1729:
+.LBE326:
 	.loc 5 527 0
 	cmp	r7, #0
-	bne	.L1531
+	bne	.L1529
 	movw	r3, #65535
 	cmp	r5, r3
-	bne	.L1531
-.LVL1727:
-.L1588:
+	bne	.L1529
+.LVL1730:
+.L1586:
 	.loc 5 528 0
-	ldr	r3, .L1633+32
+	ldr	r3, .L1631+32
 	ldrh	r3, [r3]
 	cmp	r3, #24
-	bhi	.L1595
-	ldr	r2, .L1633+44
+	bhi	.L1593
+	ldr	r2, .L1631+44
 	.loc 5 530 0
 	cmp	r3, #16
 	.loc 5 531 0
 	ldrh	r4, [r2]
 	.loc 5 530 0
-	bls	.L1533
+	bls	.L1531
 	.loc 5 531 0
 	lsrs	r4, r4, #5
-.LVL1728:
-.L1532:
+.LVL1731:
+.L1530:
 	.loc 5 539 0
-	ldr	r2, .L1633+48
+	ldr	r2, .L1631+48
 	ldrh	r1, [r2]
 	cmp	r1, r3
 	mov	r1, r2
-	bcs	.L1536
+	bcs	.L1534
 	.loc 5 540 0
-	ldr	r3, .L1633+24
+	ldr	r3, .L1631+24
 	movw	r0, #65535
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L1537
-	ldr	r0, .L1633+28
+	bne	.L1535
+	ldr	r0, .L1631+28
 	ldrh	r0, [r0]
 	cmp	r0, r3
-	bne	.L1537
+	bne	.L1535
 	.loc 5 542 0
-	ldr	r3, .L1633+36
+	ldr	r3, .L1631+36
 	ldrh	r0, [r3]
-	cbnz	r0, .L1538
-	ldr	r3, .L1633+52
-	ldr	r4, .L1633+56
-.LVL1729:
+	cbnz	r0, .L1536
+	ldr	r3, .L1631+52
+	ldr	r4, .L1631+56
+.LVL1732:
 	ldr	r3, [r3]
 	ldr	r4, [r4]
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, lsr #2
-	bcs	.L1539
-.L1538:
+	bcs	.L1537
+.L1536:
 	.loc 5 543 0
-	ldr	r3, .L1633+60
+	ldr	r3, .L1631+60
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r1]	@ movhi
-.L1540:
+.L1538:
 	.loc 5 546 0
-	ldr	r3, .L1633+64
+	ldr	r3, .L1631+64
 	movs	r2, #0
 	str	r2, [r3]
-.LVL1730:
-.L1515:
-.LBE292:
-.LBE291:
-	.loc 5 758 0
+.LVL1733:
+.L1513:
+.LBE325:
+.LBE324:
+	.loc 5 754 0
 	add	sp, sp, #48
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1731:
-.L1517:
+.LVL1734:
+.L1515:
 	.cfi_restore_state
 	.loc 5 485 0 discriminator 1
-	ldr	r2, .L1633+24
+	ldr	r2, .L1631+24
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L1520
+	beq	.L1518
 	.loc 5 486 0
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
-.LVL1732:
+.LVL1735:
 	cmp	r0, #0
-	beq	.L1520
+	beq	.L1518
 	.loc 5 487 0
 	movs	r0, #1
-	b	.L1515
-.LVL1733:
-.L1518:
-.LBB297:
-.LBB295:
+	b	.L1513
+.LVL1736:
+.L1516:
+.LBB330:
+.LBB328:
 	.loc 5 489 0
-	ldr	r1, .L1633+28
+	ldr	r1, .L1631+28
 	ldrh	r2, [r1]
 	cmp	r2, r4
 	.loc 5 490 0
@@ -18556,912 +18626,909 @@ rk_ftl_garbage_collect:
 	strheq	r0, [r1]	@ movhi
 	.loc 5 491 0
 	strheq	r2, [r3]	@ movhi
-	b	.L1519
-.LVL1734:
-.L1529:
-.LBB294:
+	b	.L1517
+.LVL1737:
+.L1527:
+.LBB327:
 	.loc 5 512 0
 	movs	r3, #64
-.LVL1735:
-.L1627:
+.LVL1738:
+.L1625:
 	.loc 5 516 0
 	strh	r3, [r10]	@ movhi
-	b	.L1528
-.LVL1736:
-.L1526:
+	b	.L1526
+.LVL1739:
+.L1524:
 	movs	r3, #80
-	b	.L1627
-.L1594:
+	b	.L1625
+.L1592:
 	.loc 5 504 0
 	mov	r4, r0
-.LVL1737:
-.L1525:
+.LVL1740:
+.L1523:
 	.loc 5 521 0
-	ldr	r3, .L1633+40
+	ldr	r3, .L1631+40
 	mov	r5, r4
-	ldr	r1, .L1633+48
+	ldr	r1, .L1631+48
 	ldrh	r2, [r8]
 	ldr	r3, [r3]
 	ldrh	r1, [r1]
-	ldr	r0, .L1633+68
+	ldr	r0, .L1631+68
 	ldrh	r3, [r3, r4, lsl #1]
 	str	r1, [sp, #4]
-	ldr	r1, .L1633+72
+	ldr	r1, .L1631+72
 	ldr	r1, [r1]
 	ldrh	r1, [r1, r4, lsl #1]
 	str	r1, [sp]
 	mov	r1, r4
 	bl	printf
-.LVL1738:
-	b	.L1528
-.LVL1739:
-.L1533:
-.LBE294:
+.LVL1741:
+	b	.L1526
+.LVL1742:
+.L1531:
+.LBE327:
 	.loc 5 532 0
 	cmp	r3, #12
-	bls	.L1534
+	bls	.L1532
 	.loc 5 533 0
 	lsrs	r4, r4, #4
-.LVL1740:
-	b	.L1532
-.LVL1741:
-.L1534:
+.LVL1743:
+	b	.L1530
+.LVL1744:
+.L1532:
 	.loc 5 534 0
 	cmp	r3, #8
-	bls	.L1532
+	bls	.L1530
 	.loc 5 535 0
 	lsrs	r4, r4, #2
-.LVL1742:
-	b	.L1532
-.LVL1743:
-.L1595:
+.LVL1745:
+	b	.L1530
+.LVL1746:
+.L1593:
 	.loc 5 529 0
 	movs	r4, #1
-	b	.L1532
-.L1539:
+	b	.L1530
+.L1537:
 	.loc 5 545 0
 	movs	r3, #18
 	strh	r3, [r2]	@ movhi
-	b	.L1540
-.LVL1744:
-.L1537:
+	b	.L1538
+.LVL1747:
+.L1535:
 	.loc 5 549 0
-	ldr	r3, .L1633+60
+	ldr	r3, .L1631+60
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r1]	@ movhi
-.L1536:
+.L1534:
 	.loc 5 551 0
-	ldr	r3, .L1633+76
+	ldr	r3, .L1631+76
 	ldrh	r3, [r3]
-	cbz	r3, .L1596
+	cbz	r3, .L1594
 	.loc 5 552 0
 	adds	r4, r4, #32
-.LVL1745:
+.LVL1748:
 	uxth	r4, r4
-.LVL1746:
-.L1596:
+.LVL1749:
+.L1594:
 	.loc 5 551 0
 	movw	r5, #65535
-.LVL1747:
-.L1542:
-	.loc 5 597 0
+.LVL1750:
+.L1540:
+	.loc 5 595 0
 	ldrh	r3, [r6]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1551
-	.loc 5 598 0
+	bne	.L1549
+	.loc 5 596 0
 	cmp	r5, r3
-	beq	.L1552
-	.loc 5 599 0
+	beq	.L1550
+	.loc 5 597 0
 	strh	r5, [r6]	@ movhi
-.LVL1748:
-.L1553:
-	.loc 5 611 0
+.LVL1751:
+.L1551:
+	.loc 5 607 0
 	ldrh	r0, [r6]
 	movw	r7, #65535
-	.loc 5 610 0
+	.loc 5 606 0
 	movs	r3, #0
 	strb	r3, [r6, #8]
-	.loc 5 611 0
+	.loc 5 607 0
 	cmp	r0, r7
-	beq	.L1551
-	.loc 5 612 0
+	beq	.L1549
+	.loc 5 608 0
 	bl	IsBlkInGcList
-.LVL1749:
-	cbz	r0, .L1556
-	.loc 5 613 0
+.LVL1752:
+	cbz	r0, .L1554
+	.loc 5 609 0
 	strh	r7, [r6]	@ movhi
-.L1556:
-	.loc 5 615 0
+.L1554:
+	.loc 5 611 0
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1551
-	.loc 5 616 0
-	ldr	r0, .L1633+20
+	beq	.L1549
+	.loc 5 612 0
+	ldr	r0, .L1631+20
 	bl	make_superblock
-.LVL1750:
-	.loc 5 619 0
-	ldr	r2, .L1633+80
-	.loc 5 617 0
+.LVL1753:
+	.loc 5 615 0
+	ldr	r2, .L1631+80
+	.loc 5 613 0
 	movs	r3, #0
 	strh	r3, [r6, #2]	@ movhi
-	.loc 5 618 0
+	.loc 5 614 0
 	strb	r3, [r6, #6]
-	.loc 5 619 0
+	.loc 5 615 0
 	strh	r3, [r2]	@ movhi
-	.loc 5 620 0
-	ldr	r3, .L1633+40
+	.loc 5 616 0
+	ldr	r3, .L1631+40
 	ldrh	r2, [r6]
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r2, lsl #1]
-	ldr	r3, .L1633+84
+	ldr	r3, .L1631+84
 	strh	r2, [r3]	@ movhi
-.L1551:
-	.loc 5 625 0
-	ldr	r2, .L1633+88
+.L1549:
+	.loc 5 621 0
+	ldr	r2, .L1631+88
 	ldrh	r3, [r6]
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L1557
-	ldr	r2, .L1633+92
+	beq	.L1555
+	ldr	r2, .L1631+92
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L1557
-	.loc 5 631 0
-	ldr	r6, .L1633+20
+	beq	.L1555
+	.loc 5 627 0
+	ldr	r6, .L1631+20
 	mov	fp, r6
-.L1558:
+.L1556:
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1559
-	.loc 5 635 0
-	ldr	r8, .L1633+100
-	.loc 5 632 0
+	bne	.L1557
+	.loc 5 631 0
+	ldr	r8, .L1631+100
+	.loc 5 628 0
 	movs	r2, #0
-	ldr	r3, .L1633+64
+	ldr	r3, .L1631+64
 	str	r2, [r3]
-.L1560:
-	.loc 5 635 0
+.L1558:
+	.loc 5 631 0
 	ldrh	r7, [r8]
 	mov	r0, r7
 	bl	List_get_gc_head_node
-.LVL1751:
+.LVL1754:
 	uxth	r3, r0
-	.loc 5 636 0
+	.loc 5 632 0
 	movw	r1, #65535
 	cmp	r3, r1
-	.loc 5 635 0
+	.loc 5 631 0
 	strh	r3, [fp]	@ movhi
-	.loc 5 636 0
-	bne	.L1561
-	.loc 5 637 0
+	.loc 5 632 0
+	bne	.L1559
+	.loc 5 633 0
 	movs	r3, #0
-	.loc 5 638 0
+	.loc 5 634 0
 	movs	r0, #8
-	.loc 5 637 0
+	.loc 5 633 0
 	strh	r3, [r8]	@ movhi
-	b	.L1515
-.LVL1752:
-.L1543:
+	b	.L1513
+.LVL1755:
+.L1541:
 	.loc 5 558 0
-	ldr	r3, .L1633+64
+	ldr	r3, .L1631+64
 	movs	r2, #0
 	.loc 5 560 0
-	ldr	r1, .L1633+48
-	ldr	r4, .L1633+32
+	ldr	r1, .L1631+48
+	ldr	r4, .L1631+32
 	.loc 5 558 0
 	str	r2, [r3]
 	.loc 5 560 0
 	ldrh	r3, [r1]
 	mov	r2, r1
 	ldrh	r8, [r4]
-	ldr	r5, .L1633+36
+	ldr	r5, .L1631+36
 	cmp	r3, r8
-	bcs	.L1544
+	bcs	.L1542
 	.loc 5 561 0
 	ldrh	r3, [r5]
-	cbnz	r3, .L1545
-	ldr	r3, .L1633+52
-	ldr	r0, .L1633+56
+	cbnz	r3, .L1543
+	ldr	r3, .L1631+52
+	ldr	r0, .L1631+56
 	ldr	r3, [r3]
 	ldr	r0, [r0]
 	add	r3, r3, r3, lsl #1
 	cmp	r0, r3, lsr #2
-	bcs	.L1546
-.L1545:
+	bcs	.L1544
+.L1543:
 	.loc 5 562 0
-	ldr	r3, .L1633+60
+	ldr	r3, .L1631+60
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r2]	@ movhi
-.LVL1753:
-.L1630:
+.LVL1756:
+.L1628:
 	.loc 5 578 0
 	bl	FtlReadRefresh
-.LVL1754:
+.LVL1757:
 	.loc 5 579 0
 	ldrh	r0, [r5]
-	b	.L1515
-.L1634:
+	b	.L1513
+.L1632:
 	.align	2
-.L1633:
+.L1631:
 	.word	.LANCHOR117
 	.word	.LANCHOR45
-	.word	.LANCHOR157
-	.word	.LANCHOR102
-	.word	.LANCHOR86
-	.word	.LANCHOR82
+	.word	.LANCHOR156
+	.word	.LANCHOR100
+	.word	.LANCHOR84
+	.word	.LANCHOR80
 	.word	.LANCHOR53
-	.word	.LANCHOR101
+	.word	.LANCHOR99
 	.word	.LANCHOR48
-	.word	.LANCHOR174
-	.word	.LANCHOR43
+	.word	.LANCHOR172
+	.word	.LANCHOR42
 	.word	.LANCHOR19
-	.word	.LANCHOR84
-	.word	.LANCHOR62
-	.word	.LANCHOR60
-	.word	.LANCHOR80
-	.word	.LANCHOR89
-	.word	.LC104
-	.word	.LANCHOR40
-	.word	.LANCHOR103
-	.word	.LANCHOR175
-	.word	.LANCHOR176
+	.word	.LANCHOR82
+	.word	.LANCHOR61
+	.word	.LANCHOR59
+	.word	.LANCHOR78
+	.word	.LANCHOR87
+	.word	.LC107
+	.word	.LANCHOR43
+	.word	.LANCHOR101
+	.word	.LANCHOR173
+	.word	.LANCHOR174
 	.word	.LANCHOR51
 	.word	.LANCHOR52
+	.word	.LANCHOR83
 	.word	.LANCHOR85
-	.word	.LANCHOR87
-.LVL1755:
-.L1546:
+.LVL1758:
+.L1544:
 	.loc 5 564 0
 	movs	r3, #18
 	strh	r3, [r1]	@ movhi
-	b	.L1630
-.L1544:
+	b	.L1628
+.L1542:
 	.loc 5 572 0
 	ldrh	r0, [r5]
 	cmp	r0, #0
-	bne	.L1548
+	bne	.L1546
 	.loc 5 573 0
-	ldr	r3, .L1635
+	ldr	r3, .L1633
 	ldrh	r7, [r3]
-.LVL1756:
+.LVL1759:
 	add	r2, r7, r7, lsl #1
 	asrs	r2, r2, #2
 	strh	r2, [r1]	@ movhi
 	.loc 5 574 0
 	bl	List_get_gc_head_node
-.LVL1757:
+.LVL1760:
 	.loc 5 575 0
-	ldr	r3, .L1635+4
+	ldr	r3, .L1633+4
 	uxth	r0, r0
-	ldr	r2, .L1635+8
+	ldr	r2, .L1633+8
 	ldr	r3, [r3]
 	ldrh	r2, [r2]
 	ldrh	r1, [r3, r0, lsl #1]
-	ldr	r3, .L1635+12
+	ldr	r3, .L1633+12
 	ldrh	r3, [r3]
 	muls	r2, r3, r2
 	cmp	r1, r2, asr #1
-	ble	.L1549
+	ble	.L1547
 	.loc 5 576 0
 	subs	r3, r7, #1
 	.loc 5 575 0
 	cmp	r8, r3
-	bge	.L1630
-.L1549:
+	bge	.L1628
+.L1547:
 	.loc 5 584 0
 	cmp	r1, #0
-	bne	.L1548
+	bne	.L1546
 	.loc 5 585 0
 	movw	r0, #65535
-.LVL1758:
+.LVL1761:
 	bl	decrement_vpc_count
-.LVL1759:
+.LVL1762:
 	.loc 5 586 0
 	ldrh	r0, [r4]
 	adds	r0, r0, #1
-	b	.L1515
-.LVL1760:
-.L1552:
-	.loc 5 600 0
-	ldr	r3, .L1635+16
+	b	.L1513
+.LVL1763:
+.L1550:
+	.loc 5 598 0
+	ldr	r3, .L1633+16
 	ldrh	r2, [r3]
 	cmp	r2, r5
-	beq	.L1553
-	.loc 5 604 0
-	ldr	r1, .L1635+4
+	beq	.L1551
+	.loc 5 600 0
+	ldr	r1, .L1633+4
 	ldr	r1, [r1]
 	ldrh	r2, [r1, r2, lsl #1]
-	cbnz	r2, .L1554
-	.loc 5 605 0
+	cbnz	r2, .L1552
+	.loc 5 601 0
 	strh	r5, [r3]	@ movhi
-.L1554:
-	.loc 5 606 0
+.L1552:
+	.loc 5 602 0
 	ldrh	r2, [r3]
 	strh	r2, [r6]	@ movhi
-	.loc 5 607 0
+	.loc 5 603 0
 	movw	r2, #65535
 	strh	r2, [r3]	@ movhi
-	b	.L1553
-.LVL1761:
-.L1557:
-	.loc 5 626 0
+	b	.L1551
+.LVL1764:
+.L1555:
+	.loc 5 622 0
 	movw	r3, #65535
 	strh	r3, [r6]	@ movhi
-.LVL1762:
-.L1631:
-	.loc 5 652 0
-	ldr	r3, .L1635+20
+.LVL1765:
+.L1629:
+	.loc 5 648 0
+	ldr	r3, .L1633+20
 	ldrh	r0, [r3]
-	b	.L1515
-.LVL1763:
-.L1561:
+	b	.L1513
+.LVL1766:
+.L1559:
 	str	r0, [sp, #16]
-	.loc 5 640 0
+	.loc 5 636 0
 	mov	r0, r3
 	str	r3, [sp, #12]
 	adds	r7, r7, #1
 	bl	IsBlkInGcList
-.LVL1764:
+.LVL1767:
 	ldr	r3, [sp, #12]
 	ldr	r2, [sp, #16]
-	cbz	r0, .L1562
-	.loc 5 641 0
+	cbz	r0, .L1560
+	.loc 5 637 0
 	strh	r7, [r8]	@ movhi
-	b	.L1560
-.L1562:
-	.loc 5 645 0
+	b	.L1558
+.L1560:
+	.loc 5 641 0
 	uxth	r0, r2
-	ldr	r2, .L1635+24
-	ldr	r10, .L1635+4
-	.loc 5 644 0
+	ldr	r2, .L1633+24
+	ldr	r10, .L1633+4
+	.loc 5 640 0
 	uxth	r7, r7
-	.loc 5 645 0
+	.loc 5 641 0
 	ldrh	lr, [r2]
-	ldr	r2, .L1635+8
+	ldr	r2, .L1633+8
 	ldr	r1, [r10]
-	.loc 5 644 0
+	.loc 5 640 0
 	strh	r7, [r8]	@ movhi
-	.loc 5 645 0
+	.loc 5 641 0
 	ldrh	r2, [r2]
 	ldrh	ip, [r1, r0, lsl #1]
 	mul	lr, r2, lr
 	cmp	ip, lr, asr #1
-	bgt	.L1564
-	.loc 5 646 0
+	bgt	.L1562
+	.loc 5 642 0
 	cmp	r7, #48
-	bls	.L1565
+	bls	.L1563
 	cmp	ip, #8
-	bls	.L1565
-	ldr	r7, .L1635+28
+	bls	.L1563
+	ldr	r7, .L1633+28
 	ldrh	r7, [r7]
 	cmp	r7, #35
-	bhi	.L1565
-.L1564:
-	.loc 5 647 0
-	ldr	r2, .L1635+32
+	bhi	.L1563
+.L1562:
+	.loc 5 643 0
+	ldr	r2, .L1633+32
 	movs	r7, #0
 	strh	r7, [r2]	@ movhi
-.L1565:
-	.loc 5 649 0
+.L1563:
+	.loc 5 645 0
 	ldrh	r1, [r1, r0, lsl #1]
 	cmp	lr, r1
-	bgt	.L1566
+	bgt	.L1564
 	movw	r2, #65535
 	cmp	r5, r2
-	bne	.L1566
-	.loc 5 651 0
-	ldr	r2, .L1635+32
+	bne	.L1564
+	.loc 5 647 0
+	ldr	r2, .L1633+32
 	movs	r3, #0
-	.loc 5 650 0
+	.loc 5 646 0
 	strh	r5, [fp]	@ movhi
-	.loc 5 651 0
+	.loc 5 647 0
 	strh	r3, [r2]	@ movhi
-	b	.L1631
-.L1566:
-	.loc 5 655 0
-	cbnz	r1, .L1567
-	.loc 5 656 0
+	b	.L1629
+.L1564:
+	.loc 5 651 0
+	cbnz	r1, .L1565
+	.loc 5 652 0
 	movw	r0, #65535
 	bl	decrement_vpc_count
-.LVL1765:
-	.loc 5 657 0
-	ldr	r3, .L1635+32
-	ldr	r2, .L1635+32
+.LVL1768:
+	.loc 5 653 0
+	ldr	r3, .L1633+32
+	ldr	r2, .L1633+32
 	ldrh	r3, [r3]
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
-	b	.L1560
-.L1567:
-	.loc 5 660 0
+	b	.L1558
+.L1565:
+	.loc 5 656 0
 	movs	r2, #0
 	strb	r2, [fp, #8]
-	.loc 5 662 0
-	ldr	r2, .L1635+36
+	.loc 5 658 0
+	ldr	r2, .L1633+36
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bne	.L1568
-	movw	r2, #662
-	ldr	r1, .L1635+40
-	ldr	r0, .L1635+44
+	bne	.L1566
+	movw	r2, #658
+	ldr	r1, .L1633+40
+	ldr	r0, .L1633+44
 	bl	printf
-.LVL1766:
-.L1568:
-	.loc 5 663 0
-	ldr	r3, .L1635+48
+.LVL1769:
+.L1566:
+	.loc 5 659 0
+	ldr	r3, .L1633+48
 	ldrh	r2, [fp]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1569
-	movw	r2, #663
-	ldr	r1, .L1635+40
-	ldr	r0, .L1635+44
+	bne	.L1567
+	movw	r2, #659
+	ldr	r1, .L1633+40
+	ldr	r0, .L1633+44
 	bl	printf
-.LVL1767:
-.L1569:
-	.loc 5 664 0
-	ldr	r3, .L1635+52
+.LVL1770:
+.L1567:
+	.loc 5 660 0
+	ldr	r3, .L1633+52
 	ldrh	r2, [fp]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1570
-	mov	r2, #664
-	ldr	r1, .L1635+40
-	ldr	r0, .L1635+44
+	bne	.L1568
+	mov	r2, #660
+	ldr	r1, .L1633+40
+	ldr	r0, .L1633+44
 	bl	printf
-.LVL1768:
-.L1570:
-	.loc 5 665 0
+.LVL1771:
+.L1568:
+	.loc 5 661 0
 	mov	r0, r6
 	bl	make_superblock
-.LVL1769:
-	.loc 5 666 0
-	ldr	r2, .L1635+56
+.LVL1772:
+	.loc 5 662 0
+	ldr	r2, .L1633+56
 	movs	r3, #0
-	.loc 5 667 0
+	.loc 5 663 0
 	ldrh	r1, [fp]
-	.loc 5 666 0
+	.loc 5 662 0
 	strh	r3, [r2]	@ movhi
-	.loc 5 667 0
+	.loc 5 663 0
 	ldr	r2, [r10]
 	ldrh	r1, [r2, r1, lsl #1]
-	ldr	r2, .L1635+60
-	.loc 5 668 0
+	ldr	r2, .L1633+60
+	.loc 5 664 0
 	strh	r3, [fp, #2]	@ movhi
-	.loc 5 669 0
+	.loc 5 665 0
 	strb	r3, [fp, #6]
-	.loc 5 667 0
+	.loc 5 663 0
 	strh	r1, [r2]	@ movhi
-.L1559:
-	.loc 5 675 0
+.L1557:
+	.loc 5 671 0
 	bl	FtlReadRefresh
-.LVL1770:
-	.loc 5 678 0
-	ldr	r3, .L1635+64
+.LVL1773:
+	.loc 5 674 0
+	ldr	r3, .L1633+64
 	movs	r2, #1
 	str	r2, [r3]
-	.loc 5 679 0
-	ldr	r3, .L1635+24
+	.loc 5 675 0
+	ldr	r3, .L1633+24
 	ldrh	r3, [r3]
 	str	r3, [sp, #28]
-.LVL1771:
-	.loc 5 680 0
+.LVL1774:
+	.loc 5 676 0
 	ldrh	r3, [fp, #2]
 	ldr	r1, [sp, #28]
 	adds	r2, r3, r4
 	cmp	r2, r1
-	.loc 5 681 0
+	.loc 5 677 0
 	itt	gt
 	movgt	r2, r1
 	subgt	r4, r2, r3
-.LVL1772:
-	.loc 5 693 0
+.LVL1775:
+	.loc 5 689 0
 	mov	r3, #0
-	.loc 5 681 0
+	.loc 5 677 0
 	it	gt
 	uxthgt	r4, r4
-.LVL1773:
-.L1629:
+.LVL1776:
+.L1627:
 	str	r3, [sp, #24]
-.LVL1774:
-	.loc 5 683 0
+.LVL1777:
+	.loc 5 679 0
 	ldrh	r3, [sp, #24]
 	cmp	r4, r3
-	bls	.L1580
-	.loc 5 685 0
-	ldr	r3, .L1635+8
-	.loc 5 687 0
+	bls	.L1578
+	.loc 5 681 0
+	ldr	r3, .L1633+8
+	.loc 5 683 0
 	movw	r10, #65535
-	.loc 5 688 0
+	.loc 5 684 0
 	ldrh	r8, [r6, #2]
-	ldr	r1, .L1635+68
-	.loc 5 685 0
+	ldr	r1, .L1633+68
+	.loc 5 681 0
 	ldrh	ip, [r3]
-	.loc 5 688 0
-	ldr	r3, .L1635+72
+	.loc 5 684 0
+	ldr	r3, .L1633+72
 	ldr	r0, [r3]
 	ldr	r3, [sp, #24]
 	add	r8, r8, r3
 	movs	r3, #0
 	str	r3, [sp, #12]
-	b	.L1581
-.LVL1775:
-.L1574:
-	.loc 5 686 0
+	b	.L1579
+.LVL1778:
+.L1572:
+	.loc 5 682 0
 	ldrh	r2, [r1, #2]!
-.LVL1776:
-	.loc 5 687 0
+.LVL1779:
+	.loc 5 683 0
 	cmp	r2, r10
-	beq	.L1573
-	.loc 5 688 0
+	beq	.L1571
+	.loc 5 684 0
 	ldr	r7, [sp, #12]
 	mov	lr, #20
 	orr	r2, r8, r2, lsl #10
-.LVL1777:
+.LVL1780:
 	mla	lr, lr, r7, r0
 	str	r2, [lr, #4]
-	.loc 5 689 0
+	.loc 5 685 0
 	mov	r2, r7
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r2, [sp, #12]
-.LVL1778:
-.L1573:
+.LVL1781:
+.L1571:
 	adds	r3, r3, #1
-.LVL1779:
-.L1581:
-	.loc 5 685 0
+.LVL1782:
+.L1579:
+	.loc 5 681 0
 	uxth	r2, r3
 	cmp	ip, r2
-	bhi	.L1574
-	.loc 5 693 0
+	bhi	.L1572
+	.loc 5 689 0
 	ldrb	r2, [r6, #8]	@ zero_extendqisi2
 	ldr	r1, [sp, #12]
 	bl	FlashReadPages
-.LVL1780:
+.LVL1783:
 	movs	r3, #0
-.LVL1781:
-.L1628:
+.LVL1784:
+.L1626:
 	str	r3, [sp, #20]
-.LVL1782:
-	.loc 5 695 0
+.LVL1785:
+	.loc 5 691 0
 	ldr	r2, [sp, #12]
 	ldrh	r3, [sp, #20]
 	cmp	r2, r3
-	bhi	.L1579
-.LVL1783:
+	bhi	.L1577
+.LVL1786:
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	b	.L1629
-.L1636:
+	b	.L1627
+.L1634:
 	.align	2
-.L1635:
-	.word	.LANCHOR80
-	.word	.LANCHOR43
+.L1633:
+	.word	.LANCHOR78
+	.word	.LANCHOR42
 	.word	.LANCHOR3
 	.word	.LANCHOR20
-	.word	.LANCHOR101
-	.word	.LANCHOR174
+	.word	.LANCHOR99
+	.word	.LANCHOR172
 	.word	.LANCHOR19
-	.word	.LANCHOR98
-	.word	.LANCHOR87
+	.word	.LANCHOR96
+	.word	.LANCHOR85
 	.word	.LANCHOR51
-	.word	.LANCHOR177
+	.word	.LANCHOR175
 	.word	.LC1
 	.word	.LANCHOR52
 	.word	.LANCHOR53
-	.word	.LANCHOR175
-	.word	.LANCHOR176
+	.word	.LANCHOR173
+	.word	.LANCHOR174
 	.word	.LANCHOR117
-	.word	.LANCHOR82+14
-	.word	.LANCHOR95
-.LVL1784:
-.L1579:
+	.word	.LANCHOR80+14
+	.word	.LANCHOR93
+.LVL1787:
+.L1577:
 	ldr	r3, [sp, #20]
 	movs	r7, #20
 	muls	r7, r3, r7
-	.loc 5 696 0
-	ldr	r3, .L1637
+	.loc 5 692 0
+	ldr	r3, .L1635
 	ldr	r3, [r3]
 	adds	r2, r3, r7
-.LVL1785:
-	.loc 5 697 0
+.LVL1788:
+	.loc 5 693 0
 	ldr	r3, [r3, r7]
 	adds	r3, r3, #1
-	beq	.L1576
-	.loc 5 696 0
+	beq	.L1574
+	.loc 5 692 0
 	ldr	r3, [r2, #12]
-	.loc 5 697 0
+	.loc 5 693 0
 	ldrh	r2, [r3]
-.LVL1786:
-	.loc 5 696 0
+.LVL1789:
+	.loc 5 692 0
 	str	r3, [sp, #16]
-	.loc 5 697 0
+	.loc 5 693 0
 	movw	r3, #61589
-.LVL1787:
+.LVL1790:
 	cmp	r2, r3
-	bne	.L1576
-	.loc 5 699 0
+	bne	.L1574
+	.loc 5 695 0
 	ldr	r3, [sp, #16]
 	ldr	r8, [r3, #8]
-.LVL1788:
-	.loc 5 700 0
+.LVL1791:
+	.loc 5 696 0
 	cmp	r8, #-1
-	bne	.L1577
-	mov	r2, #700
-	ldr	r1, .L1637+4
-	ldr	r0, .L1637+8
+	bne	.L1575
+	mov	r2, #696
+	ldr	r1, .L1635+4
+	ldr	r0, .L1635+8
 	bl	printf
-.LVL1789:
-.L1577:
-	.loc 5 701 0
+.LVL1792:
+.L1575:
+	.loc 5 697 0
 	movs	r2, #0
 	add	r1, sp, #44
 	mov	r0, r8
 	bl	log2phys
-.LVL1790:
-	.loc 5 702 0
-	ldr	r3, .L1637
+.LVL1793:
+	.loc 5 698 0
+	ldr	r3, .L1635
 	ldr	r1, [r3]
 	ldr	r3, [sp, #44]
 	add	r1, r1, r7
 	ldr	r2, [r1, #4]
 	cmp	r2, r3
-	bne	.L1576
-	.loc 5 704 0
-	ldr	r2, .L1637+12
-	.loc 5 705 0
+	bne	.L1574
+	.loc 5 700 0
+	ldr	r2, .L1635+12
+	.loc 5 701 0
 	mov	r10, #20
-	ldr	r8, .L1637+36
-.LVL1791:
+	ldr	r8, .L1635+36
+.LVL1794:
 	ldr	r1, [r1, #16]
-	.loc 5 704 0
+	.loc 5 700 0
 	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
-	.loc 5 705 0
-	ldr	r2, .L1637+16
+	.loc 5 701 0
+	ldr	r2, .L1635+16
 	ldr	r3, [r8]
 	ldr	r0, [r2]
 	str	r2, [sp, #36]
 	mla	r3, r10, r3, r0
 	str	r1, [r3, #16]
 	str	r3, [sp, #32]
-	.loc 5 706 0
+	.loc 5 702 0
 	bl	Ftl_get_new_temp_ppa
-.LVL1792:
+.LVL1795:
 	ldr	r3, [sp, #32]
-	.loc 5 707 0
+	.loc 5 703 0
 	ldr	r2, [sp, #36]
-	.loc 5 709 0
+	.loc 5 705 0
 	ldr	r1, [sp, #16]
-	.loc 5 706 0
+	.loc 5 702 0
 	str	r0, [r3, #4]
-	.loc 5 707 0
+	.loc 5 703 0
 	ldr	r2, [r2]
 	ldr	r3, [r8]
 	mla	r10, r10, r3, r2
-	ldr	r2, .L1637
-	.loc 5 715 0
+	ldr	r2, .L1635
+	.loc 5 711 0
 	adds	r3, r3, #1
-	.loc 5 707 0
+	.loc 5 703 0
 	ldr	r0, [r2]
 	add	r0, r0, r7
-	.loc 5 710 0
-	ldr	r7, .L1637+20
-	.loc 5 707 0
+	.loc 5 706 0
+	ldr	r7, .L1635+20
+	.loc 5 703 0
 	ldr	r2, [r0, #8]
 	str	r2, [r10, #8]
-	.loc 5 708 0
+	.loc 5 704 0
 	ldr	r2, [r0, #12]
 	str	r2, [r10, #12]
-	.loc 5 709 0
+	.loc 5 705 0
 	ldr	r2, [sp, #44]
 	str	r2, [r1, #12]
-	.loc 5 710 0
+	.loc 5 706 0
 	ldrh	r2, [r7]
 	strh	r2, [r1, #2]	@ movhi
-	.loc 5 713 0
-	ldr	r2, .L1637+24
-	.loc 5 715 0
+	.loc 5 709 0
+	ldr	r2, .L1635+24
+	.loc 5 711 0
 	str	r3, [r8]
-	.loc 5 713 0
+	.loc 5 709 0
 	ldr	r2, [r2]
 	str	r2, [r1, #4]
-	.loc 5 716 0
+	.loc 5 712 0
 	movs	r1, #1
 	bl	FtlGcBufAlloc
-.LVL1793:
-	.loc 5 717 0
+.LVL1796:
+	.loc 5 713 0
 	ldrb	r2, [r7, #7]	@ zero_extendqisi2
 	ldr	r3, [r8]
 	cmp	r2, r3
-	beq	.L1578
+	beq	.L1576
 	ldrh	r3, [r7, #4]
-	cbnz	r3, .L1576
-.L1578:
-	.loc 5 718 0
+	cbnz	r3, .L1574
+.L1576:
+	.loc 5 714 0
 	bl	Ftl_gc_temp_data_write_back
-.LVL1794:
-	cbz	r0, .L1576
-.LVL1795:
-.L1632:
-	.loc 5 733 0
-	ldr	r3, .L1637+28
+.LVL1797:
+	cbz	r0, .L1574
+.LVL1798:
+.L1630:
+	.loc 5 729 0
+	ldr	r3, .L1635+28
 	movs	r2, #0
 	str	r2, [r3]
-	b	.L1631
-.LVL1796:
-.L1576:
+	b	.L1629
+.LVL1799:
+.L1574:
 	ldr	r3, [sp, #20]
 	adds	r3, r3, #1
-	b	.L1628
-.LVL1797:
-.L1580:
-	.loc 5 727 0
+	b	.L1626
+.LVL1800:
+.L1578:
+	.loc 5 723 0
 	ldrh	r3, [r6, #2]
 	add	r4, r4, r3
-.LVL1798:
-	.loc 5 729 0
+.LVL1801:
+	.loc 5 725 0
 	ldr	r3, [sp, #28]
-	.loc 5 727 0
+	.loc 5 723 0
 	uxth	r4, r4
-	.loc 5 729 0
+	.loc 5 725 0
 	cmp	r3, r4
-	.loc 5 727 0
+	.loc 5 723 0
 	strh	r4, [r6, #2]	@ movhi
-	.loc 5 729 0
-	bls	.L1582
-	ldr	r3, .L1637+12
+	.loc 5 725 0
+	bls	.L1580
+	ldr	r3, .L1635+12
 	ldrh	r2, [r3]
-	ldr	r3, .L1637+32
+	ldr	r3, .L1635+32
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1583
-.L1582:
-	.loc 5 731 0
-	ldr	r3, .L1637+36
+	bne	.L1581
+.L1580:
+	.loc 5 727 0
+	ldr	r3, .L1635+36
 	ldr	r3, [r3]
-	cbz	r3, .L1584
-	.loc 5 732 0
+	cbz	r3, .L1582
+	.loc 5 728 0
 	bl	Ftl_gc_temp_data_write_back
-.LVL1799:
+.LVL1802:
 	cmp	r0, #0
-	bne	.L1632
-.L1584:
-	.loc 5 737 0
-	ldr	r3, .L1637+12
+	bne	.L1630
+.L1582:
+	.loc 5 733 0
+	ldr	r3, .L1635+12
 	ldrh	r1, [r3]
-	cbnz	r1, .L1585
-	ldr	r3, .L1637+40
+	cbnz	r1, .L1583
+	ldr	r3, .L1635+40
 	ldrh	r2, [r6]
 	ldr	r3, [r3]
 	ldrh	r0, [r3, r2, lsl #1]
-	cbz	r0, .L1585
-	.loc 5 739 0
+	cbz	r0, .L1583
+	.loc 5 735 0
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	.loc 5 740 0
+	.loc 5 736 0
 	ldrh	r0, [r6]
 	bl	update_vpc_list
-.LVL1800:
-	.loc 5 741 0
-	bl	FtlCacheWriteBack
-.LVL1801:
-	.loc 5 742 0
+.LVL1803:
+	.loc 5 738 0
 	bl	l2p_flush
-.LVL1802:
-	.loc 5 743 0
+.LVL1804:
+	.loc 5 739 0
 	bl	FtlVpcTblFlush
-.LVL1803:
-.L1585:
-	.loc 5 745 0
+.LVL1805:
+.L1583:
+	.loc 5 741 0
 	movw	r3, #65535
 	strh	r3, [r6]	@ movhi
-.L1583:
-	.loc 5 747 0
-	ldr	r3, .L1637+44
+.L1581:
+	.loc 5 743 0
+	ldr	r3, .L1635+44
 	ldrh	r3, [r3]
 	cmp	r3, #2
-	bhi	.L1586
-	.loc 5 749 0
-	ldr	r3, .L1637+48
+	bhi	.L1584
+	.loc 5 745 0
+	ldr	r3, .L1635+48
 	ldrh	r4, [r3]
-.LVL1804:
-	b	.L1558
-.LVL1805:
-.L1586:
-	.loc 5 752 0
-	ldr	r2, .L1637+28
+.LVL1806:
+	b	.L1556
+.LVL1807:
+.L1584:
+	.loc 5 748 0
+	ldr	r2, .L1635+28
 	movs	r1, #0
 	str	r1, [r2]
-	.loc 5 754 0
-	ldr	r2, .L1637+52
+	.loc 5 750 0
+	ldr	r2, .L1635+52
 	ldrh	r0, [r2]
 	cmp	r0, #0
-	bne	.L1515
-	.loc 5 757 0
+	bne	.L1513
+	.loc 5 753 0
 	adds	r0, r3, #1
-.LVL1806:
-	b	.L1515
-.LVL1807:
-.L1590:
-.LBE295:
-.LBE297:
+.LVL1808:
+	b	.L1513
+.LVL1809:
+.L1588:
+.LBE328:
+.LBE330:
 	.loc 5 479 0
 	movs	r0, #0
-	b	.L1515
-.LVL1808:
-.L1521:
-.LBB298:
-.LBB296:
+	b	.L1513
+.LVL1810:
+.L1519:
+.LBB331:
+.LBB329:
 	.loc 5 527 0
 	cmp	r7, #0
-	beq	.L1588
-.LVL1809:
-.L1531:
+	beq	.L1586
+.LVL1811:
+.L1529:
 	.loc 5 557 0
-	ldr	r3, .L1637+20
+	ldr	r3, .L1635+20
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1599
-.LVL1810:
-.L1589:
-	ldr	r3, .L1637+56
+	bne	.L1597
+.LVL1812:
+.L1587:
+	ldr	r3, .L1635+56
 	movw	r2, #65535
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bne	.L1599
+	bne	.L1597
 	cmp	r5, r3
-	bne	.L1599
+	bne	.L1597
 	ldrh	r3, [r6]
 	cmp	r3, r5
-	beq	.L1543
-.LVL1811:
-.L1548:
+	beq	.L1541
+.LVL1813:
+.L1546:
 	.loc 5 556 0
 	movw	r5, #65535
-.L1599:
+.L1597:
 	movs	r4, #1
-	b	.L1542
-.LVL1812:
-.L1523:
+	b	.L1540
+.LVL1814:
+.L1521:
 	.loc 5 527 0
 	cmp	r7, #0
-	beq	.L1588
+	beq	.L1586
 	movw	r5, #65535
-	b	.L1589
-.LVL1813:
-.L1522:
+	b	.L1587
+.LVL1815:
+.L1520:
 	cmp	r7, #0
-	bne	.L1548
-	b	.L1588
-.L1638:
+	bne	.L1546
+	b	.L1586
+.L1636:
 	.align	2
-.L1637:
-	.word	.LANCHOR95
-	.word	.LANCHOR177
-	.word	.LC1
+.L1635:
+	.word	.LANCHOR93
 	.word	.LANCHOR175
+	.word	.LC1
+	.word	.LANCHOR173
 	.word	.LANCHOR121
 	.word	.LANCHOR53
-	.word	.LANCHOR72
+	.word	.LANCHOR71
 	.word	.LANCHOR117
-	.word	.LANCHOR176
-	.word	.LANCHOR91
-	.word	.LANCHOR43
+	.word	.LANCHOR174
+	.word	.LANCHOR89
+	.word	.LANCHOR42
 	.word	.LANCHOR48
 	.word	.LANCHOR19
-	.word	.LANCHOR174
-	.word	.LANCHOR101
-.LBE296:
-.LBE298:
+	.word	.LANCHOR172
+	.word	.LANCHOR99
+.LBE329:
+.LBE331:
 	.cfi_endproc
 .LFE322:
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
@@ -19475,16 +19542,16 @@ rk_ftl_garbage_collect:
 	.type	sftl_gc, %function
 sftl_gc:
 .LFB323:
-	.loc 5 761 0
+	.loc 5 757 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	.loc 5 762 0
+	.loc 5 758 0
 	movs	r1, #1
 	mov	r0, r1
 	b	rk_ftl_garbage_collect
-.LVL1814:
+.LVL1816:
 	.cfi_endproc
 .LFE323:
 	.size	sftl_gc, .-sftl_gc
@@ -19502,7 +19569,7 @@ FtlRead:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1815:
+.LVL1817:
 	.loc 3 824 0
 	cmp	r0, #16
 	.loc 3 814 0
@@ -19523,19 +19590,19 @@ FtlRead:
 	mov	r8, r3
 	str	r2, [sp, #32]
 	.loc 3 824 0
-	bne	.L1641
+	bne	.L1639
 	.loc 3 825 0
 	mov	r2, r3
-.LVL1816:
+.LVL1818:
 	ldr	r1, [sp, #32]
-.LVL1817:
+.LVL1819:
 	add	r0, r6, #256
-.LVL1818:
+.LVL1820:
 	bl	FtlVendorPartRead
-.LVL1819:
+.LVL1821:
 	str	r0, [sp, #4]
-.LVL1820:
-.L1640:
+.LVL1822:
+.L1638:
 	.loc 3 901 0
 	ldr	r0, [sp, #4]
 	add	sp, sp, #56
@@ -19543,31 +19610,28 @@ FtlRead:
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1821:
-.L1641:
+.LVL1823:
+.L1639:
 	.cfi_restore_state
 	.loc 3 830 0
 	ldr	r3, [sp, #32]
-.LVL1822:
+.LVL1824:
 	adds	r3, r1, r3
 	str	r3, [sp, #12]
-	ldr	r3, .L1672
+	ldr	r3, .L1670
 	ldr	r2, [sp, #12]
-.LVL1823:
+.LVL1825:
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1661
+	bhi	.L1659
 	.loc 3 830 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1672+4
+	ldr	r3, .L1670+4
 	ldr	r3, [r3]
 	adds	r0, r3, #1
-.LVL1824:
-	beq	.L1662
-	.loc 3 833 0 is_stmt 1
-	bl	FtlCacheWriteBack
-.LVL1825:
-	.loc 3 835 0
-	ldr	r3, .L1672+8
+.LVL1826:
+	beq	.L1660
+	.loc 3 835 0 is_stmt 1
+	ldr	r3, .L1670+8
 	mov	r0, r6
 	.loc 3 828 0
 	movs	r7, #0
@@ -19576,41 +19640,42 @@ FtlRead:
 	.loc 3 835 0
 	ldrh	r4, [r3]
 	mov	r1, r4
+.LVL1827:
 	bl	__aeabi_uidiv
-.LVL1826:
+.LVL1828:
 	.loc 3 836 0
 	ldr	r3, [sp, #12]
 	mov	r1, r4
 	.loc 3 835 0
 	str	r0, [sp, #16]
-.LVL1827:
+.LVL1829:
 	.loc 3 836 0
 	subs	r0, r3, #1
-.LVL1828:
+.LVL1830:
 	bl	__aeabi_uidiv
-.LVL1829:
+.LVL1831:
 	.loc 3 837 0
 	ldr	r3, [sp, #16]
 	.loc 3 841 0
-	ldr	r2, .L1672+12
+	ldr	r2, .L1670+12
 	.loc 3 835 0
 	ldr	r4, [sp, #16]
 	.loc 3 837 0
 	rsb	r3, r3, #1
 	.loc 3 836 0
 	str	r0, [sp, #20]
-.LVL1830:
+.LVL1832:
 	.loc 3 837 0
 	add	r3, r3, r0
 	.loc 3 828 0
 	str	r7, [sp, #28]
 	.loc 3 837 0
 	str	r3, [sp, #8]
-.LVL1831:
+.LVL1833:
 	.loc 3 841 0
 	ldr	r1, [sp, #8]
 	ldr	r3, [r2]
-.LVL1832:
+.LVL1834:
 	.loc 3 820 0
 	str	r7, [sp, #24]
 	.loc 3 815 0
@@ -19618,71 +19683,71 @@ FtlRead:
 	.loc 3 841 0
 	add	r3, r3, r1
 	str	r3, [r2]
-.LVL1833:
-.L1643:
+.LVL1835:
+.L1641:
 	.loc 3 842 0
 	ldr	r3, [sp, #8]
-	cbnz	r3, .L1659
+	cbnz	r3, .L1657
 	.loc 3 898 0
-	ldr	r3, .L1672+16
+	ldr	r3, .L1670+16
 	ldrh	r3, [r3]
-	cbnz	r3, .L1660
+	cbnz	r3, .L1658
 	.loc 3 898 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1672+20
+	ldr	r3, .L1670+20
 	ldrh	r3, [r3]
 	cmp	r3, #31
-	bhi	.L1640
-.L1660:
+	bhi	.L1638
+.L1658:
 	.loc 3 899 0 is_stmt 1
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
-.LVL1834:
-	b	.L1640
-.LVL1835:
-.L1659:
+.LVL1836:
+	b	.L1638
+.LVL1837:
+.L1657:
 	.loc 3 843 0
 	add	r1, sp, #52
 	movs	r2, #0
 	mov	r0, r4
 	bl	log2phys
-.LVL1836:
+.LVL1838:
 	.loc 3 844 0
 	ldr	r3, [sp, #52]
 	adds	r1, r3, #1
-	bne	.L1644
+	bne	.L1642
 	.loc 3 845 0 discriminator 1
-	ldr	fp, .L1672+8
+	ldr	fp, .L1670+8
 	mov	r10, #0
-.L1645:
-.LVL1837:
+.L1643:
+.LVL1839:
 	ldrh	r0, [fp]
 	cmp	r10, r0
-	bcc	.L1647
-.LVL1838:
-.L1648:
+	bcc	.L1645
+.LVL1840:
+.L1646:
 	.loc 3 874 0
 	ldr	r3, [sp, #8]
 	.loc 3 872 0
 	adds	r4, r4, #1
-.LVL1839:
+.LVL1841:
 	.loc 3 874 0
 	subs	r3, r3, #1
-.LVL1840:
+.LVL1842:
 	str	r3, [sp, #8]
-	beq	.L1652
+	beq	.L1650
 	.loc 3 874 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1672+24
-.LVL1841:
+	ldr	r3, .L1670+24
+.LVL1843:
 	ldrh	r3, [r3]
 	cmp	r5, r3, lsl #2
-	bne	.L1643
-.L1652:
+	bne	.L1641
+.L1650:
 	.loc 3 875 0 is_stmt 1
 	cmp	r5, #0
-	beq	.L1643
+	beq	.L1641
 	.loc 3 876 0
-	ldr	r3, .L1672+28
+	ldr	r3, .L1670+28
 	movs	r2, #0
 	mov	r1, r5
 	.loc 3 877 0
@@ -19690,7 +19755,7 @@ FtlRead:
 	.loc 3 876 0
 	ldr	r0, [r3]
 	bl	FlashReadPages
-.LVL1842:
+.LVL1844:
 	.loc 3 883 0
 	lsls	r3, r7, #9
 	str	r3, [sp, #44]
@@ -19701,89 +19766,89 @@ FtlRead:
 	ldr	r3, [sp, #28]
 	lsls	r3, r3, #9
 	str	r3, [sp, #40]
-.LVL1843:
-.L1658:
+.LVL1845:
+.L1656:
 	movs	r3, #20
 	mul	fp, r3, r10
 	.loc 3 878 0
-	ldr	r3, .L1672+28
+	ldr	r3, .L1670+28
 	ldr	r2, [r3]
 	ldr	r3, [sp, #16]
 	add	r2, r2, fp
 	ldr	r1, [r2, #16]
 	cmp	r3, r1
-	bne	.L1654
+	bne	.L1652
 	.loc 3 879 0
 	ldr	r1, [r2, #8]
-	ldr	r2, .L1672+32
+	ldr	r2, .L1670+32
 	ldr	r2, [r2]
 	cmp	r1, r2
-	bne	.L1655
+	bne	.L1653
 	.loc 3 880 0
 	ldr	r3, [sp, #36]
 	mov	r0, r8
 	ldr	r2, [sp, #40]
 	add	r1, r1, r3
-.L1671:
+.L1669:
 	.loc 3 883 0
 	bl	ftl_memcpy
-.LVL1844:
-.L1655:
+.LVL1846:
+.L1653:
 	.loc 3 885 0
-	ldr	r3, .L1672+28
+	ldr	r3, .L1670+28
 	ldr	r2, [r3]
 	ldr	r3, [r2, fp]
 	add	r1, r2, fp
 	adds	r2, r3, #1
-	bne	.L1656
+	bne	.L1654
 	.loc 3 886 0
-	ldr	r1, .L1672+36
+	ldr	r1, .L1670+36
 	.loc 3 887 0
 	str	r3, [sp, #4]
 	.loc 3 886 0
 	ldr	r2, [r1, #72]
 	adds	r2, r2, #1
 	str	r2, [r1, #72]
-.LVL1845:
-.L1657:
+.LVL1847:
+.L1655:
 	.loc 3 877 0 discriminator 2
 	add	r10, r10, #1
-.LVL1846:
+.LVL1848:
 	cmp	r5, r10
-	bne	.L1658
+	bne	.L1656
 	.loc 3 894 0
 	movs	r5, #0
-.LVL1847:
-	b	.L1643
-.LVL1848:
-.L1647:
+.LVL1849:
+	b	.L1641
+.LVL1850:
+.L1645:
 	.loc 3 846 0
 	mla	r0, r0, r4, r10
-.LVL1849:
+.LVL1851:
 	.loc 3 847 0
 	cmp	r6, r0
-	bhi	.L1646
+	bhi	.L1644
 	.loc 3 847 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #12]
 	cmp	r3, r0
-	bls	.L1646
+	bls	.L1644
 	.loc 3 848 0 is_stmt 1
 	subs	r0, r0, r6
-.LVL1850:
+.LVL1852:
 	mov	r2, #512
 	movs	r1, #0
 	add	r0, r8, r0, lsl #9
 	bl	ftl_memset
-.LVL1851:
-.L1646:
-	.loc 3 845 0 discriminator 2
-	add	r10, r10, #1
-.LVL1852:
-	b	.L1645
 .LVL1853:
 .L1644:
+	.loc 3 845 0 discriminator 2
+	add	r10, r10, #1
+.LVL1854:
+	b	.L1643
+.LVL1855:
+.L1642:
 	.loc 3 851 0
-	ldr	r2, .L1672+28
+	ldr	r2, .L1670+28
 	mov	r10, #20
 	ldr	r2, [r2]
 	mla	r10, r10, r5, r2
@@ -19791,10 +19856,10 @@ FtlRead:
 	.loc 3 852 0
 	ldr	r3, [sp, #16]
 	cmp	r4, r3
-	ldr	r3, .L1672+8
-	bne	.L1649
+	ldr	r3, .L1670+8
+	bne	.L1647
 	.loc 3 853 0
-	ldr	r2, .L1672+32
+	ldr	r2, .L1670+32
 	.loc 3 854 0
 	mov	r0, r6
 	ldrh	fp, [r3]
@@ -19806,29 +19871,29 @@ FtlRead:
 	str	r2, [r10, #8]
 	.loc 3 854 0
 	bl	__aeabi_uidivmod
-.LVL1854:
+.LVL1856:
 	ldr	r2, [sp, #32]
 	.loc 3 855 0
 	sub	r3, fp, r1
 	.loc 3 854 0
 	str	r1, [sp, #24]
-.LVL1855:
+.LVL1857:
 	cmp	r3, r2
 	it	cs
 	movcs	r3, r2
-.LVL1856:
+.LVL1858:
 	.loc 3 857 0
 	cmp	fp, r3
 	str	r3, [sp, #28]
-.LVL1857:
-	bne	.L1650
+.LVL1859:
+	bne	.L1648
 	.loc 3 858 0
 	str	r8, [r10, #8]
-.LVL1858:
-.L1650:
+.LVL1860:
+.L1648:
 	.loc 3 867 0
-	ldr	r3, .L1672+40
-	ldr	r2, .L1672+44
+	ldr	r3, .L1670+40
+	ldr	r2, .L1670+44
 	.loc 3 868 0
 	str	r4, [r10, #16]
 	.loc 3 867 0
@@ -19837,19 +19902,19 @@ FtlRead:
 	muls	r3, r5, r3
 	.loc 3 869 0
 	adds	r5, r5, #1
-.LVL1859:
+.LVL1861:
 	.loc 3 867 0
 	bic	r3, r3, #3
 	add	r3, r3, r2
 	str	r3, [r10, #12]
-	b	.L1648
-.L1649:
+	b	.L1646
+.L1647:
 	.loc 3 859 0
 	ldr	r2, [sp, #20]
 	cmp	r4, r2
-	bne	.L1651
+	bne	.L1649
 	.loc 3 860 0
-	ldr	r2, .L1672+48
+	ldr	r2, .L1670+48
 	.loc 3 861 0
 	ldr	r1, [sp, #12]
 	.loc 3 860 0
@@ -19859,80 +19924,80 @@ FtlRead:
 	ldrh	r2, [r3]
 	mul	r3, r2, r4
 	subs	r7, r1, r3
-.LVL1860:
+.LVL1862:
 	.loc 3 862 0
 	cmp	r2, r7
-	bne	.L1650
-.L1670:
+	bne	.L1648
+.L1668:
 	.loc 3 865 0
 	subs	r3, r3, r6
 	add	r3, r8, r3, lsl #9
 	str	r3, [r10, #8]
-	b	.L1650
-.L1651:
+	b	.L1648
+.L1649:
 	ldrh	r3, [r3]
 	muls	r3, r4, r3
-	b	.L1670
-.LVL1861:
-.L1654:
+	b	.L1668
+.LVL1863:
+.L1652:
 	.loc 3 881 0
 	ldr	r3, [sp, #20]
 	cmp	r3, r1
-	bne	.L1655
+	bne	.L1653
 	.loc 3 882 0
-	ldr	r3, .L1672+48
+	ldr	r3, .L1670+48
 	ldr	r1, [r2, #8]
 	ldr	r2, [r3]
 	cmp	r1, r2
-	bne	.L1655
+	bne	.L1653
 	.loc 3 883 0
-	ldr	r2, .L1672+8
+	ldr	r2, .L1670+8
 	ldr	r3, [sp, #20]
 	ldrh	r0, [r2]
 	ldr	r2, [sp, #44]
 	muls	r0, r3, r0
 	subs	r0, r0, r6
 	add	r0, r8, r0, lsl #9
-	b	.L1671
-.L1656:
+	b	.L1669
+.L1654:
 	.loc 3 889 0
 	cmp	r3, #256
-	bne	.L1657
-.LBB299:
+	bne	.L1655
+.LBB332:
 	.loc 3 890 0
 	ldr	r0, [r1, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1862:
+.LVL1864:
 	.loc 3 891 0
 	bl	FtlGcRefreshBlock
-.LVL1863:
-	b	.L1657
-.LVL1864:
-.L1661:
-.LBE299:
+.LVL1865:
+	b	.L1655
+.LVL1866:
+.L1659:
+.LBE332:
 	.loc 3 831 0
 	mov	r3, #-1
-.LVL1865:
-.L1662:
+.LVL1867:
+.L1660:
 	str	r3, [sp, #4]
-	b	.L1640
-.L1673:
+	b	.L1638
+.L1671:
 	.align	2
-.L1672:
+.L1670:
 	.word	.LANCHOR34
-	.word	.LANCHOR88
+	.word	.LANCHOR86
 	.word	.LANCHOR12
-	.word	.LANCHOR63
-	.word	.LANCHOR103
+	.word	.LANCHOR62
+	.word	.LANCHOR101
 	.word	.LANCHOR48
 	.word	.LANCHOR3
 	.word	.LANCHOR120
-	.word	.LANCHOR116
-	.word	.LANCHOR83
-	.word	.LANCHOR24
 	.word	.LANCHOR115
+	.word	.LANCHOR81
+	.word	.LANCHOR24
 	.word	.LANCHOR114
+	.word	.LANCHOR113
 	.cfi_endproc
 .LFE217:
 	.size	FtlRead, .-FtlRead
@@ -19946,22 +20011,22 @@ FtlRead:
 	.type	sftl_read, %function
 sftl_read:
 .LFB222:
-	.loc 3 1204 0
+	.loc 3 1168 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL1866:
-	.loc 3 1205 0
+.LVL1868:
+	.loc 3 1169 0
 	mov	r3, r2
 	mov	r2, r1
-.LVL1867:
+.LVL1869:
 	mov	r1, r0
-.LVL1868:
+.LVL1870:
 	movs	r0, #0
-.LVL1869:
+.LVL1871:
 	b	FtlRead
-.LVL1870:
+.LVL1872:
 	.cfi_endproc
 .LFE222:
 	.size	sftl_read, .-sftl_read
@@ -19975,14 +20040,14 @@ sftl_read:
 	.type	FtlWrite, %function
 FtlWrite:
 .LFB220:
-	.loc 3 962 0
+	.loc 3 958 0
 	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 64
+	@ args = 0, pretend = 0, frame = 72
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1871:
-	.loc 3 970 0
+.LVL1873:
+	.loc 3 966 0
 	cmp	r0, #16
-	.loc 3 962 0
+	.loc 3 958 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
 	.cfi_offset 4, -32
@@ -19993,317 +20058,196 @@ FtlWrite:
 	.cfi_offset 10, -12
 	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	sub	sp, sp, #64
-	.cfi_def_cfa_offset 96
-	.loc 3 962 0
-	mov	r8, r1
-	str	r2, [sp, #16]
-	str	r3, [sp]
-	.loc 3 970 0
-	bne	.L1676
-	.loc 3 971 0
+	sub	sp, sp, #72
+	.cfi_def_cfa_offset 104
+	.loc 3 958 0
+	str	r1, [sp, #4]
+	str	r2, [sp, #20]
+	str	r3, [sp, #16]
+	.loc 3 966 0
+	bne	.L1674
+	.loc 3 967 0
 	mov	r2, r3
-.LVL1872:
-	ldr	r1, [sp, #16]
-.LVL1873:
-	add	r0, r8, #256
 .LVL1874:
-	bl	FtlVendorPartWrite
+	ldr	r3, [sp, #4]
 .LVL1875:
-.L1675:
-	.loc 3 1153 0
-	add	sp, sp, #64
+	ldr	r1, [sp, #20]
+.LVL1876:
+	add	r0, r3, #256
+.LVL1877:
+	bl	FtlVendorPartWrite
+.LVL1878:
+.L1673:
+	.loc 3 1117 0
+	add	sp, sp, #72
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
-.LVL1876:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1877:
-.L1676:
+.LVL1879:
+.L1674:
 	.cfi_restore_state
-	.loc 3 974 0
-	ldr	r3, [sp, #16]
-.LVL1878:
-	adds	r5, r1, r3
-	ldr	r3, .L1736
+	.loc 3 970 0
+	ldr	r3, [sp, #4]
+.LVL1880:
+	ldr	r2, [sp, #20]
+.LVL1881:
+	adds	r4, r3, r2
+	ldr	r3, .L1724
 	ldr	r3, [r3]
-	cmp	r5, r3
-	bhi	.L1716
-	.loc 3 974 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1736+4
+	cmp	r4, r3
+	bhi	.L1710
+	.loc 3 970 0 is_stmt 0 discriminator 1
+	ldr	r3, .L1724+4
 	ldr	r0, [r3]
-.LVL1879:
-	adds	r4, r0, #1
-	beq	.L1675
-	.loc 3 977 0 is_stmt 1
-	ldr	r3, .L1736+8
+.LVL1882:
+	adds	r5, r0, #1
+	beq	.L1673
+	.loc 3 973 0 is_stmt 1
+	ldr	r3, .L1724+8
 	mov	r2, #2048
-.LVL1880:
-	.loc 3 978 0
-	mov	r0, r8
-	.loc 3 977 0
+	.loc 3 974 0
+	ldr	r0, [sp, #4]
+	.loc 3 973 0
 	str	r2, [r3]
-	.loc 3 978 0
-	ldr	r3, .L1736+12
-	ldrh	r4, [r3]
-	mov	r1, r4
-.LVL1881:
-	bl	__aeabi_uidiv
-.LVL1882:
-	.loc 3 979 0
-	mov	r1, r4
-	.loc 3 978 0
-	mov	r10, r0
+	.loc 3 974 0
+	ldr	r3, .L1724+12
+	ldrh	r5, [r3]
+	mov	r1, r5
 .LVL1883:
-	.loc 3 979 0
-	subs	r0, r5, #1
-.LVL1884:
 	bl	__aeabi_uidiv
+.LVL1884:
+	.loc 3 975 0
+	mov	r1, r5
+	.loc 3 974 0
+	str	r0, [sp, #12]
 .LVL1885:
-	.loc 3 982 0
-	ldr	r2, .L1736+16
-	.loc 3 980 0
-	sub	r5, r0, r10
-	adds	r3, r5, #1
-	.loc 3 982 0
-	adds	r1, r5, #1
-	.loc 3 980 0
-	str	r3, [sp, #12]
-	.loc 3 982 0
-	ldr	r3, [r2]
-	.loc 3 979 0
-	str	r0, [sp, #20]
+	.loc 3 975 0
+	subs	r0, r4, #1
 .LVL1886:
-	.loc 3 982 0
+	ldr	r5, .L1724+16
+	bl	__aeabi_uidiv
+.LVL1887:
+	.loc 3 976 0
+	ldr	r2, [sp, #12]
+	.loc 3 975 0
+	str	r0, [sp, #28]
+.LVL1888:
+	.loc 3 976 0
+	subs	r3, r0, r2
+	.loc 3 978 0
+	ldr	r2, .L1724+20
+	.loc 3 976 0
+	str	r3, [sp, #32]
+	adds	r3, r3, #1
+	str	r3, [sp, #8]
+.LVL1889:
+	.loc 3 978 0
+	ldr	r1, [sp, #8]
+	ldr	r3, [r2]
+.LVL1890:
 	add	r3, r3, r1
 	str	r3, [r2]
-	.loc 3 983 0
-	ldr	r3, .L1736+20
-	ldr	r7, [r3]
-	cbz	r7, .L1678
+.LVL1891:
 	.loc 3 984 0
-	ldr	r3, [r7, #16]
-	cmp	r10, r3
-	beq	.L1679
-	.loc 3 985 0
-	bl	FtlCacheWriteBack
-.LVL1887:
-.L1678:
-	.loc 3 1008 0
-	ldr	r3, .L1736+24
-	ldr	r4, .L1736+28
+	ldr	r3, .L1724+24
 	ldr	r3, [r3]
-	cbz	r3, .L1681
-	.loc 3 1008 0 is_stmt 0 discriminator 1
-	ldrh	r2, [r4, #4]
-	.loc 3 1009 0 is_stmt 1 discriminator 1
-	ldr	r3, .L1736+32
+	cbz	r3, .L1676
+	.loc 3 984 0 is_stmt 0 discriminator 1
+	ldrh	r2, [r5, #4]
+	.loc 3 985 0 is_stmt 1 discriminator 1
+	ldr	r3, .L1724+28
 	cmp	r2, #0
 	it	eq
-	moveq	r4, r3
-.L1681:
-	.loc 3 1068 0
-	mov	r6, r10
-.LVL1888:
-.L1682:
-	.loc 3 1011 0
-	ldr	r3, [sp, #12]
-	cmp	r3, #0
-	bne	.L1712
-	.loc 3 1137 0
-	ldr	r3, [sp, #20]
-	.loc 3 1139 0
-	ldr	r4, .L1736+36
-.LVL1889:
-	.loc 3 1137 0
-	ldr	r0, [sp, #12]
-	sub	r1, r3, r10
+	moveq	r5, r3
+.L1676:
+	.loc 3 974 0
+	ldr	r6, [sp, #12]
+.LVL1892:
+.L1677:
+	.loc 3 987 0
+	ldr	r3, [sp, #8]
+	cbnz	r3, .L1706
+	.loc 3 1103 0
+	ldr	r4, .L1724+32
+	.loc 3 1101 0
+	mov	r0, r3
+	ldr	r1, [sp, #32]
 	bl	rk_ftl_garbage_collect
-.LVL1890:
-	.loc 3 1139 0
+.LVL1893:
+	.loc 3 1103 0
 	ldrh	r2, [r4]
 	cmp	r2, #15
-	bhi	.L1713
-	.loc 3 1141 0
-	ldr	r5, .L1736+40
-	ldr	r6, .L1736+44
-.LVL1891:
-.L1732:
-	ldrh	r3, [r5]
-	movw	r2, #65535
-	cmp	r3, r2
-	bne	.L1714
-	.loc 3 1141 0 is_stmt 0 discriminator 1
-	ldrh	r2, [r6]
-	cmp	r2, r3
-	bne	.L1714
-	.loc 3 1142 0 is_stmt 1
-	movs	r0, #0
-	bl	List_get_gc_head_node
-.LVL1892:
-	uxth	r0, r0
-	bl	FtlGcRefreshBlock
-.LVL1893:
-.L1714:
-	.loc 3 1143 0
-	ldr	r2, .L1736+48
-	movs	r3, #128
-	.loc 3 1145 0
-	movs	r1, #1
-	mov	r0, r1
-	.loc 3 1143 0
-	strh	r3, [r2]	@ movhi
-	.loc 3 1144 0
-	ldr	r2, .L1736+52
-	strh	r3, [r2]	@ movhi
-	.loc 3 1145 0
-	bl	rk_ftl_garbage_collect
+	bls	.L1707
 .LVL1894:
-	.loc 3 1146 0
-	movs	r1, #1
+.L1709:
+	.loc 3 1116 0
 	movs	r0, #0
-	bl	rk_ftl_garbage_collect
+	b	.L1673
 .LVL1895:
-	.loc 3 1147 0
-	ldrh	r3, [r4]
-	cmp	r3, #8
-	bls	.L1732
-	b	.L1713
-.LVL1896:
-.L1679:
-	.loc 3 987 0
-	ldr	r2, .L1736+56
+.L1706:
 	.loc 3 988 0
-	mov	r1, r4
+	ldr	r3, .L1724+36
+.LVL1896:
+	ldrb	r2, [r5, #6]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L1678
+	.loc 3 988 0 is_stmt 0 discriminator 1
+	mov	r2, #988
+	ldr	r1, .L1724+40
+	ldr	r0, .L1724+44
+	bl	printf
 .LVL1897:
-	mov	r0, r8
-.LVL1898:
-	.loc 3 987 0
-	ldr	r3, [r2]
-	adds	r3, r3, #1
-	str	r3, [r2]
-	.loc 3 988 0
-	bl	__aeabi_uidivmod
-.LVL1899:
-	ldr	r2, [sp, #16]
-	.loc 3 989 0
-	subs	r4, r4, r1
-	.loc 3 992 0
-	ldr	r0, [r7, #8]
-	.loc 3 988 0
-	mov	r3, r1
-.LVL1900:
+.L1678:
+	.loc 3 989 0 is_stmt 1
+	ldrh	r2, [r5, #4]
+	cbnz	r2, .L1679
 	.loc 3 992 0
-	ldr	r1, [sp]
-.LVL1901:
-	cmp	r4, r2
-	it	cs
-	movcs	r4, r2
-.LVL1902:
-	lsls	r6, r4, #9
-	add	r0, r0, r3, lsl #9
-	mov	r2, r6
-	bl	ftl_memcpy
-.LVL1903:
+	ldr	r3, .L1724+16
+	ldr	r4, .L1724+24
+	cmp	r5, r3
+	bne	.L1680
+	.loc 3 993 0
+	ldr	r0, .L1724+28
+	ldrh	r5, [r0, #4]
+.LVL1898:
+	cbnz	r5, .L1681
 	.loc 3 994 0
-	cbnz	r5, .L1680
-.LVL1904:
-.L1713:
+	bl	allocate_new_data_superblock
+.LVL1899:
 	.loc 3 995 0
-	movs	r0, #0
-	b	.L1675
-.LVL1905:
-.L1680:
-	.loc 3 996 0
-	ldr	r3, [sp, #16]
+	str	r5, [r4]
+.L1681:
 	.loc 3 997 0
-	add	r8, r8, r4
-.LVL1906:
+	ldr	r0, .L1724+16
+	bl	allocate_new_data_superblock
+.LVL1900:
 	.loc 3 999 0
-	add	r10, r10, #1
-.LVL1907:
-	.loc 3 996 0
-	subs	r3, r3, r4
-	str	r3, [sp, #16]
-.LVL1908:
+	ldr	r5, .L1724+16
 	.loc 3 998 0
-	ldr	r3, [sp]
-.LVL1909:
-	add	r3, r3, r6
-	str	r3, [sp]
-.LVL1910:
-	.loc 3 1000 0
-	bl	FtlCacheWriteBack
-.LVL1911:
-	str	r5, [sp, #12]
-	b	.L1678
-.LVL1912:
-.L1712:
-	.loc 3 1012 0
-	ldr	r3, .L1736+60
-.LVL1913:
-	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-	ldrh	r3, [r3]
-	cmp	r2, r3
-	bcc	.L1683
-	.loc 3 1012 0 is_stmt 0 discriminator 1
-	mov	r2, #1012
-	ldr	r1, .L1736+64
-	ldr	r0, .L1736+68
-	bl	printf
-.LVL1914:
-.L1683:
-	.loc 3 1013 0 is_stmt 1
-	ldrh	r7, [r4, #4]
-	cbnz	r7, .L1684
-	.loc 3 1014 0
-	bl	FtlCacheWriteBack
-.LVL1915:
-	.loc 3 1016 0
-	ldr	r3, .L1736+28
-	ldr	r5, .L1736+24
-	cmp	r4, r3
-	bne	.L1685
-	.loc 3 1017 0
-	ldr	r0, .L1736+32
-	ldrh	r4, [r0, #4]
-.LVL1916:
-	cbnz	r4, .L1686
-	.loc 3 1018 0
-	bl	allocate_new_data_superblock
-.LVL1917:
-	.loc 3 1019 0
-	str	r4, [r5]
-.L1686:
-	.loc 3 1021 0
-	ldr	r0, .L1736+28
-	bl	allocate_new_data_superblock
-.LVL1918:
-	.loc 3 1023 0
-	ldr	r4, .L1736+28
-	.loc 3 1022 0
-	ldr	r2, [r5]
-	.loc 3 1023 0
-	ldr	r3, .L1736+32
+	ldr	r2, [r4]
+	.loc 3 999 0
+	ldr	r3, .L1724+28
 	cmp	r2, #0
 	it	ne
-	movne	r4, r3
-.L1687:
-.LVL1919:
-	.loc 3 1033 0
-	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1684
-	.loc 3 1034 0
-	mov	r0, r4
+	movne	r5, r3
+.L1682:
+.LVL1901:
+	.loc 3 1009 0
+	ldrh	r3, [r5, #4]
+	cbnz	r3, .L1679
+	.loc 3 1010 0
+	mov	r0, r5
 	bl	allocate_new_data_superblock
-.LVL1920:
-.L1684:
-	.loc 3 1041 0
-	ldrb	r2, [r4, #7]	@ zero_extendqisi2
-	.loc 3 1043 0
-	ldrh	r3, [r4, #4]
-	ldr	r1, [sp, #12]
-	.loc 3 1041 0
+.LVL1902:
+.L1679:
+	.loc 3 1017 0
+	ldrb	r2, [r5, #7]	@ zero_extendqisi2
+	.loc 3 1019 0
+	ldrh	r3, [r5, #4]
+	ldr	r1, [sp, #8]
+	.loc 3 1017 0
 	lsls	r2, r2, #2
 	cmp	r3, r1
 	it	cs
@@ -20311,446 +20255,467 @@ FtlWrite:
 	cmp	r2, r3
 	it	cs
 	movcs	r2, r3
-	.loc 3 1045 0
-	ldr	r3, .L1736+60
-	str	r2, [sp, #36]
-.LVL1921:
-	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-.LVL1922:
+	.loc 3 1021 0
+	ldr	r3, .L1724+36
+	str	r2, [sp, #44]
+.LVL1903:
+	ldrb	r2, [r5, #6]	@ zero_extendqisi2
+.LVL1904:
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1688
-	.loc 3 1045 0 is_stmt 0 discriminator 1
-	movw	r2, #1045
-	ldr	r1, .L1736+64
-	ldr	r0, .L1736+68
+	bcc	.L1683
+	.loc 3 1021 0 is_stmt 0 discriminator 1
+	movw	r2, #1021
+	ldr	r1, .L1724+40
+	ldr	r0, .L1724+44
 	bl	printf
-.LVL1923:
-.L1688:
-	.loc 3 1054 0 is_stmt 1 discriminator 1
-	ldr	fp, .L1736+72
-	.loc 3 1068 0 discriminator 1
-	movs	r3, #0
-	str	r3, [sp, #4]
-.L1689:
-.LVL1924:
-	.loc 3 1046 0 discriminator 1
-	ldr	r3, [sp, #4]
-	ldr	r2, [sp, #36]
-	cmp	r3, r2
-	bne	.L1710
-.L1690:
-.LVL1925:
-	.loc 3 1133 0
-	ldr	r0, .L1736+72
-	mov	r3, r4
+.LVL1905:
+.L1683:
+	.loc 3 1030 0 is_stmt 1 discriminator 1
+	ldr	r8, .L1724+48
+	.loc 3 1044 0 discriminator 1
+	mov	fp, #0
+.L1684:
+.LVL1906:
+	.loc 3 1022 0 discriminator 1
+	ldr	r3, [sp, #44]
+	cmp	fp, r3
+	bne	.L1704
+.L1685:
+.LVL1907:
+	.loc 3 1097 0
+	ldr	r0, .L1724+48
+	mov	r3, r5
 	movs	r2, #0
-	ldr	r1, [sp, #4]
+	mov	r1, fp
 	ldr	r0, [r0]
 	bl	FtlProgPages
-.LVL1926:
-	.loc 3 1134 0
-	ldr	r3, [sp, #4]
-	ldr	r2, [sp, #12]
-	cmp	r3, r2
-	bls	.L1711
-	.loc 3 1134 0 is_stmt 0 discriminator 1
-	movw	r2, #1134
-	ldr	r1, .L1736+64
-	ldr	r0, .L1736+68
+.LVL1908:
+	.loc 3 1098 0
+	ldr	r3, [sp, #8]
+	cmp	fp, r3
+	bls	.L1705
+	.loc 3 1098 0 is_stmt 0 discriminator 1
+	movw	r2, #1098
+	ldr	r1, .L1724+40
+	ldr	r0, .L1724+44
 	bl	printf
-.LVL1927:
-.L1711:
-	.loc 3 1135 0 is_stmt 1
-	ldr	r3, [sp, #12]
-	ldr	r2, [sp, #4]
-	subs	r3, r3, r2
-	str	r3, [sp, #12]
-.LVL1928:
-	b	.L1682
-.LVL1929:
-.L1685:
-	.loc 3 1028 0
+.LVL1909:
+.L1705:
+	.loc 3 1099 0 is_stmt 1
+	ldr	r3, [sp, #8]
+	sub	r3, r3, fp
+	str	r3, [sp, #8]
+.LVL1910:
+	b	.L1677
+.LVL1911:
+.L1680:
+	.loc 3 1003 0
+	str	r2, [r4]
+	.loc 3 1004 0
 	ldrh	r2, [r3, #4]
-	.loc 3 1027 0
-	str	r7, [r5]
-	.loc 3 1028 0
-	cbnz	r2, .L1721
-	.loc 3 1029 0
-	mov	r0, r4
+	cbnz	r2, .L1715
+	.loc 3 1005 0
+	mov	r0, r5
 	bl	allocate_new_data_superblock
-.LVL1930:
-	b	.L1687
-.L1721:
-	mov	r4, r3
-.LVL1931:
-	b	.L1684
-.LVL1932:
-.L1710:
-	.loc 3 1047 0
-	ldrh	r2, [r4, #4]
+.LVL1912:
+	b	.L1682
+.L1715:
+	mov	r5, r3
+.LVL1913:
+	b	.L1679
+.LVL1914:
+.L1704:
+	.loc 3 1023 0
+	ldrh	r2, [r5, #4]
 	cmp	r2, #0
-	beq	.L1690
-	.loc 3 1051 0
+	beq	.L1685
+	.loc 3 1027 0
 	movs	r2, #0
-	add	r1, sp, #40
+	add	r1, sp, #48
 	mov	r0, r6
 	movs	r7, #20
 	bl	log2phys
-.LVL1933:
-	.loc 3 1052 0
-	mov	r0, r4
+.LVL1915:
+	.loc 3 1028 0
+	mov	r0, r5
+	mul	r7, r7, fp
 	bl	get_new_active_ppa
-.LVL1934:
-	ldr	r3, [sp, #4]
-	.loc 3 1054 0
-	ldr	r1, [fp]
-	muls	r7, r3, r7
-	.loc 3 1055 0
-	ldr	r3, .L1736+76
+.LVL1916:
+	.loc 3 1031 0
+	ldr	r3, .L1724+52
+	.loc 3 1030 0
+	ldr	r1, [r8]
+	.loc 3 1031 0
 	ldrh	r2, [r3]
-	ldr	r3, [sp, #4]
-	.loc 3 1054 0
+	.loc 3 1030 0
 	add	r1, r1, r7
 	str	r0, [r1, #4]
-	.loc 3 1056 0
+	.loc 3 1032 0
 	str	r6, [r1, #16]
-.LVL1935:
-	.loc 3 1055 0
-	mul	r0, r2, r3
-.LVL1936:
+	.loc 3 1031 0
+	mul	r0, r2, fp
+.LVL1917:
 	bic	r3, r0, #3
-	ldr	r0, .L1736+80
-	str	r3, [sp, #28]
+	ldr	r0, .L1724+56
+	str	r3, [sp, #36]
 	ldr	r3, [r0]
-	ldr	r0, [sp, #28]
-	str	r3, [sp, #32]
-	add	r3, r3, r0
-	str	r3, [r1, #12]
-	.loc 3 1059 0
-	mov	r0, r3
+	ldr	r0, [sp, #36]
+	str	r3, [sp, #40]
+	add	r10, r3, r0
+.LVL1918:
+	str	r10, [r1, #12]
+	.loc 3 1035 0
+	mov	r0, r10
 	movs	r1, #0
-.LVL1937:
-	.loc 3 1055 0
-	str	r3, [sp, #8]
-.LVL1938:
-	.loc 3 1059 0
+.LVL1919:
 	bl	ftl_memset
-.LVL1939:
-	.loc 3 1061 0
-	cmp	r6, r10
-	ldr	r2, .L1736+12
-	beq	.L1691
-	.loc 3 1061 0 is_stmt 0 discriminator 1
-	ldr	r3, [sp, #20]
+.LVL1920:
+	.loc 3 1037 0
+	ldr	r3, [sp, #12]
+	ldr	r2, .L1724+12
 	cmp	r6, r3
-	bne	.L1731
-.LVL1940:
-	.loc 3 1069 0 is_stmt 1
+	beq	.L1686
+	.loc 3 1037 0 is_stmt 0 discriminator 1
+	ldr	r3, [sp, #28]
+	cmp	r6, r3
+	bne	.L1719
+.LVL1921:
+	.loc 3 1045 0 is_stmt 1
 	ldrh	r2, [r2]
-	ldr	r3, [sp, #16]
+	ldr	r3, [sp, #4]
+	ldr	r1, [sp, #20]
 	smulbb	r2, r2, r6
-	add	r5, r8, r3
-	.loc 3 1068 0
+	adds	r4, r3, r1
+	.loc 3 1044 0
 	movs	r3, #0
+	.loc 3 1045 0
+	subs	r4, r4, r2
+	.loc 3 1044 0
 	str	r3, [sp, #24]
-	.loc 3 1069 0
-	subs	r5, r5, r2
-	uxth	r5, r5
-.LVL1941:
-	b	.L1694
-.L1737:
-	.align	2
-.L1736:
-	.word	.LANCHOR34
-	.word	.LANCHOR88
-	.word	.LANCHOR178
-	.word	.LANCHOR12
-	.word	.LANCHOR65
-	.word	.LANCHOR150
-	.word	.LANCHOR179
-	.word	.LANCHOR51
-	.word	.LANCHOR52
-	.word	.LANCHOR48
-	.word	.LANCHOR82
-	.word	.LANCHOR101
-	.word	.LANCHOR85
-	.word	.LANCHOR84
-	.word	.LANCHOR66
-	.word	.LANCHOR3
-	.word	.LANCHOR180
-	.word	.LC1
-	.word	.LANCHOR122
-	.word	.LANCHOR24
-	.word	.LANCHOR115
-.LVL1942:
-.L1691:
-	.loc 3 1063 0
-	ldrh	r5, [r2]
-	mov	r0, r8
-	mov	r1, r5
+	.loc 3 1045 0
+	uxth	r4, r4
+.LVL1922:
+	b	.L1689
+.LVL1923:
+.L1686:
+	.loc 3 1039 0
+	ldrh	r4, [r2]
+	ldr	r0, [sp, #4]
+	mov	r1, r4
 	bl	__aeabi_uidivmod
-.LVL1943:
-	ldr	r3, [sp, #16]
-	.loc 3 1064 0
-	subs	r5, r5, r1
-	.loc 3 1063 0
+.LVL1924:
+	ldr	r3, [sp, #20]
+	.loc 3 1040 0
+	subs	r4, r4, r1
+	.loc 3 1039 0
 	str	r1, [sp, #24]
-.LVL1944:
-	cmp	r5, r3
+.LVL1925:
+	cmp	r4, r3
 	it	cs
-	movcs	r5, r3
-.LVL1945:
-.L1694:
-	.loc 3 1072 0
-	ldr	r2, .L1738
+	movcs	r4, r3
+.LVL1926:
+.L1689:
+	.loc 3 1048 0
+	ldr	r2, .L1724+12
+	.loc 3 1049 0
+	ldr	r3, [sp, #12]
+	.loc 3 1048 0
 	ldrh	r2, [r2]
-	cmp	r5, r2
-	.loc 3 1074 0
-	ldr	r2, [fp]
-	.loc 3 1072 0
-	bne	.L1695
-	.loc 3 1073 0
-	cmp	r6, r10
-	.loc 3 1074 0
+	cmp	r4, r2
+	.loc 3 1050 0
+	ldr	r2, [r8]
+	.loc 3 1048 0
+	bne	.L1690
+	.loc 3 1049 0
+	cmp	r6, r3
+	.loc 3 1050 0
 	add	r7, r7, r2
-	.loc 3 1076 0
+	.loc 3 1052 0
 	ittet	ne
-	mulne	r5, r5, r6
-.LVL1946:
-	ldrne	r3, [sp]
-	.loc 3 1074 0
-	ldreq	r3, [sp]
-	.loc 3 1076 0
-	subne	r5, r5, r8
-	.loc 3 1074 0
-	itee	eq
+	mulne	r4, r4, r6
+.LVL1927:
+	ldrne	r3, [sp, #4]
+	.loc 3 1050 0
+	ldreq	r3, [sp, #16]
+	.loc 3 1052 0
+	subne	r4, r4, r3
+	itett	ne
+	ldrne	r3, [sp, #16]
+	.loc 3 1050 0
 	streq	r3, [r7, #8]
-	.loc 3 1076 0
-	addne	r5, r3, r5, lsl #9
-	strne	r5, [r7, #8]
-.LVL1947:
-.L1697:
-	.loc 3 1119 0
-	ldr	r3, .L1738+4
-	ldrb	r1, [r4, #6]	@ zero_extendqisi2
+	.loc 3 1052 0
+	addne	r4, r3, r4, lsl #9
+	strne	r4, [r7, #8]
+.LVL1928:
+.L1692:
+	.loc 3 1089 0
+	ldr	r3, .L1724+36
+	ldrb	r1, [r5, #6]	@ zero_extendqisi2
 	ldrh	r2, [r3]
 	cmp	r1, r2
-	bcc	.L1707
-	.loc 3 1119 0 is_stmt 0 discriminator 1
-	movw	r2, #1119
-	ldr	r1, .L1738+8
-	ldr	r0, .L1738+12
+	bcc	.L1701
+	.loc 3 1089 0 is_stmt 0 discriminator 1
+	movw	r2, #1089
+	ldr	r1, .L1724+40
+	ldr	r0, .L1724+44
 	bl	printf
-.LVL1948:
-.L1707:
-	.loc 3 1120 0 is_stmt 1
-	ldr	r3, [sp, #32]
+.LVL1929:
+.L1701:
+	.loc 3 1090 0 is_stmt 1
+	ldr	r3, [sp, #40]
 	movw	r2, #61589
-	ldr	r1, [sp, #28]
+	ldr	r1, [sp, #36]
+	.loc 3 1022 0
+	add	fp, fp, #1
+.LVL1930:
+	.loc 3 1090 0
 	strh	r2, [r3, r1]	@ movhi
-	.loc 3 1121 0
-	ldr	r1, .L1738+16
-	ldr	r3, [sp, #8]
+	.loc 3 1091 0
+	ldr	r1, .L1724+60
+	.loc 3 1092 0
+	str	r6, [r10, #8]
+	.loc 3 1095 0
+	adds	r6, r6, #1
+.LVL1931:
+	.loc 3 1091 0
 	ldr	r2, [r1]
-	str	r2, [r3, #4]
+	str	r2, [r10, #4]
 	adds	r2, r2, #1
 	adds	r3, r2, #1
-	.loc 3 1122 0
-	ldr	r3, [sp, #8]
-	.loc 3 1121 0
 	it	eq
 	moveq	r2, #0
 	str	r2, [r1]
-	.loc 3 1123 0
-	ldr	r2, [sp, #40]
-	.loc 3 1122 0
-	str	r6, [r3, #8]
-	.loc 3 1125 0
-	adds	r6, r6, #1
-.LVL1949:
-	.loc 3 1123 0
-	str	r2, [r3, #12]
-	.loc 3 1124 0
-	ldrh	r2, [r4]
-	strh	r2, [r3, #2]	@ movhi
-	.loc 3 1046 0
-	ldr	r3, [sp, #4]
-	adds	r3, r3, #1
-	str	r3, [sp, #4]
-.LVL1950:
-	b	.L1689
-.LVL1951:
-.L1695:
-	.loc 3 1079 0
-	cmp	r6, r10
-	.loc 3 1080 0
+	.loc 3 1093 0
+	ldr	r2, [sp, #48]
+	str	r2, [r10, #12]
+	.loc 3 1094 0
+	ldrh	r2, [r5]
+	strh	r2, [r10, #2]	@ movhi
+	b	.L1684
+.L1725:
+	.align	2
+.L1724:
+	.word	.LANCHOR34
+	.word	.LANCHOR86
+	.word	.LANCHOR176
+	.word	.LANCHOR12
+	.word	.LANCHOR51
+	.word	.LANCHOR64
+	.word	.LANCHOR177
+	.word	.LANCHOR52
+	.word	.LANCHOR48
+	.word	.LANCHOR3
+	.word	.LANCHOR178
+	.word	.LC1
+	.word	.LANCHOR122
+	.word	.LANCHOR24
+	.word	.LANCHOR114
+	.word	.LANCHOR71
+.LVL1932:
+.L1690:
+	.loc 3 1055 0
+	cmp	r6, r3
+	.loc 3 1056 0
 	add	r2, r2, r7
 	ite	eq
-	ldreq	r1, .L1738+20
-	.loc 3 1082 0
-	ldrne	r1, .L1738+24
+	ldreq	r1, .L1726
+	.loc 3 1058 0
+	ldrne	r1, .L1726+4
 	ldr	r1, [r1]
 	str	r1, [r2, #8]
-	.loc 3 1084 0
-	ldr	r2, [sp, #40]
+	.loc 3 1060 0
+	ldr	r2, [sp, #48]
 	adds	r1, r2, #1
-	beq	.L1700
-.LBB300:
-	.loc 3 1086 0
-	str	r2, [sp, #48]
-	.loc 3 1090 0
-	add	r0, sp, #44
-	.loc 3 1088 0
-	ldr	r2, [fp]
-	.loc 3 1087 0
-	str	r6, [sp, #60]
-	.loc 3 1088 0
+	beq	.L1695
+.LBB333:
+	.loc 3 1062 0
+	str	r2, [sp, #56]
+	.loc 3 1066 0
+	add	r0, sp, #52
+	.loc 3 1064 0
+	ldr	r2, [r8]
+	.loc 3 1063 0
+	str	r6, [sp, #68]
+	.loc 3 1064 0
 	add	r2, r2, r7
 	ldr	r1, [r2, #8]
-	.loc 3 1089 0
+	.loc 3 1065 0
 	ldr	r2, [r2, #12]
-	.loc 3 1088 0
-	str	r1, [sp, #52]
-	.loc 3 1090 0
+	.loc 3 1064 0
+	str	r1, [sp, #60]
+	.loc 3 1066 0
 	movs	r1, #1
-	.loc 3 1089 0
-	str	r2, [sp, #56]
-	.loc 3 1090 0
+	.loc 3 1065 0
+	str	r2, [sp, #64]
+	.loc 3 1066 0
 	movs	r2, #0
 	bl	FlashReadPages
-.LVL1952:
-	.loc 3 1091 0
-	ldr	r2, [sp, #44]
+.LVL1933:
+	.loc 3 1067 0
+	ldr	r2, [sp, #52]
 	adds	r2, r2, #1
-	bne	.L1701
-	.loc 3 1092 0
-	ldr	r1, .L1738+28
+	bne	.L1696
+	.loc 3 1068 0
+	ldr	r1, .L1726+8
 	ldr	r2, [r1, #72]
 	adds	r2, r2, #1
 	str	r2, [r1, #72]
-.L1704:
-.LBE300:
-	.loc 3 1104 0
-	cmp	r6, r10
-	lsl	r2, r5, #9
-	bne	.L1705
-	.loc 3 1105 0
-	ldr	r1, [fp]
+.L1699:
+.LBE333:
+	.loc 3 1080 0
+	ldr	r3, [sp, #12]
+	lsls	r2, r4, #9
+	cmp	r6, r3
+	bne	.L1700
+	.loc 3 1081 0
+	ldr	r1, [r8]
 	ldr	r3, [sp, #24]
-	add	r1, r1, r7
-	ldr	r0, [r1, #8]
-	ldr	r1, [sp]
+	add	r7, r7, r1
+	ldr	r1, [sp, #16]
+	ldr	r0, [r7, #8]
 	add	r0, r0, r3, lsl #9
-.L1734:
-	.loc 3 1107 0
+.L1722:
+	.loc 3 1083 0
 	bl	ftl_memcpy
-.LVL1953:
-	.loc 3 1109 0
-	ldr	r3, [sp, #20]
-	cmp	r6, r3
-	bne	.L1697
-	.loc 3 1110 0
-	ldrh	r2, [r4, #4]
-	cmp	r2, #0
-	beq	.L1697
-	.loc 3 1111 0
-	ldr	r2, [fp]
-	add	r7, r7, r2
-	ldr	r2, .L1738+32
-	str	r7, [r2]
-	.loc 3 1112 0
-	ldr	r2, .L1738+36
-	str	r4, [r2]
-	b	.L1697
-.L1701:
-.LBB301:
-	.loc 3 1094 0
-	ldr	r3, [sp, #8]
-	ldr	r1, [r3, #8]
+.LVL1934:
+	b	.L1692
+.L1696:
+.LBB334:
+	.loc 3 1070 0
+	ldr	r1, [r10, #8]
 	cmp	r6, r1
-	beq	.L1703
-	.loc 3 1095 0
-	ldr	r0, .L1738+28
+	beq	.L1698
+	.loc 3 1071 0
+	ldr	r0, .L1726+8
 	ldr	r2, [r0, #72]
 	adds	r2, r2, #1
 	str	r2, [r0, #72]
-	.loc 3 1096 0
+	.loc 3 1072 0
 	mov	r2, r6
-	ldr	r0, .L1738+40
+	ldr	r0, .L1726+12
 	bl	printf
-.LVL1954:
-.L1703:
-	.loc 3 1098 0
-	ldr	r3, [sp, #8]
-	ldr	r2, [r3, #8]
+.LVL1935:
+.L1698:
+	.loc 3 1074 0
+	ldr	r2, [r10, #8]
 	cmp	r6, r2
-	beq	.L1704
-	.loc 3 1098 0 is_stmt 0 discriminator 1
-	movw	r2, #1098
-	ldr	r1, .L1738+8
-	ldr	r0, .L1738+12
+	beq	.L1699
+	.loc 3 1074 0 is_stmt 0 discriminator 1
+	movw	r2, #1074
+	ldr	r1, .L1726+16
+	ldr	r0, .L1726+20
 	bl	printf
-.LVL1955:
-	b	.L1704
-.LVL1956:
-.L1700:
-.LBE301:
-	.loc 3 1101 0 is_stmt 1
-	ldr	r2, [fp]
+.LVL1936:
+	b	.L1699
+.LVL1937:
+.L1695:
+.LBE334:
+	.loc 3 1077 0 is_stmt 1
+	ldr	r2, [r8]
 	movs	r1, #0
 	adds	r0, r2, r7
-	ldr	r2, .L1738+44
+	ldr	r2, .L1726+24
 	ldr	r0, [r0, #8]
 	ldrh	r2, [r2]
 	bl	ftl_memset
-.LVL1957:
-	b	.L1704
-.L1705:
-	.loc 3 1107 0
-	ldr	r1, .L1738
-	ldr	r0, [fp]
-	ldr	r3, [sp]
+.LVL1938:
+	b	.L1699
+.L1700:
+	.loc 3 1083 0
+	ldr	r1, .L1726+28
+	ldr	r3, [sp, #4]
+	ldr	r0, [r8]
 	ldrh	r1, [r1]
-	add	r0, r0, r7
-	ldr	r0, [r0, #8]
+	add	r7, r7, r0
+	ldr	r0, [r7, #8]
 	muls	r1, r6, r1
-	sub	r1, r1, r8
+	subs	r1, r1, r3
+	ldr	r3, [sp, #16]
 	add	r1, r3, r1, lsl #9
-	b	.L1734
-.LVL1958:
-.L1731:
-	.loc 3 1117 0
+	b	.L1722
+.LVL1939:
+.L1719:
+	.loc 3 1087 0
 	ldrh	r2, [r2]
-	ldr	r3, [sp]
-	ldr	r1, [fp]
+	ldr	r3, [sp, #4]
+	ldr	r1, [r8]
 	muls	r2, r6, r2
 	add	r7, r7, r1
-	sub	r2, r2, r8
+	subs	r2, r2, r3
+	ldr	r3, [sp, #16]
 	add	r2, r3, r2, lsl #9
 	str	r2, [r7, #8]
-	b	.L1697
-.LVL1959:
-.L1716:
-	.loc 3 975 0
+	b	.L1692
+.LVL1940:
+.L1707:
+	.loc 3 1105 0
+	ldr	r5, .L1726+32
+.LVL1941:
+	ldr	r6, .L1726+36
+.LVL1942:
+.L1720:
+	ldrh	r3, [r5]
+	movw	r2, #65535
+	cmp	r3, r2
+	bne	.L1708
+	.loc 3 1105 0 is_stmt 0 discriminator 1
+	ldrh	r2, [r6]
+	cmp	r2, r3
+	bne	.L1708
+	.loc 3 1106 0 is_stmt 1
+	movs	r0, #0
+	bl	List_get_gc_head_node
+.LVL1943:
+	uxth	r0, r0
+	bl	FtlGcRefreshBlock
+.LVL1944:
+.L1708:
+	.loc 3 1107 0
+	ldr	r2, .L1726+40
+	movs	r3, #128
+	.loc 3 1109 0
+	movs	r1, #1
+	mov	r0, r1
+	.loc 3 1107 0
+	strh	r3, [r2]	@ movhi
+	.loc 3 1108 0
+	ldr	r2, .L1726+44
+	strh	r3, [r2]	@ movhi
+	.loc 3 1109 0
+	bl	rk_ftl_garbage_collect
+.LVL1945:
+	.loc 3 1110 0
+	movs	r1, #1
+	movs	r0, #0
+	bl	rk_ftl_garbage_collect
+.LVL1946:
+	.loc 3 1111 0
+	ldrh	r3, [r4]
+	cmp	r3, #8
+	bls	.L1720
+	b	.L1709
+.LVL1947:
+.L1710:
+	.loc 3 971 0
 	mov	r0, #-1
-.LVL1960:
-	b	.L1675
-.L1739:
-	.align	2
-.L1738:
-	.word	.LANCHOR12
-	.word	.LANCHOR3
-	.word	.LANCHOR180
+.LVL1948:
+	b	.L1673
+.L1727:
+	.align	2
+.L1726:
+	.word	.LANCHOR115
+	.word	.LANCHOR113
+	.word	.LANCHOR81
+	.word	.LC108
+	.word	.LANCHOR178
 	.word	.LC1
-	.word	.LANCHOR72
-	.word	.LANCHOR116
-	.word	.LANCHOR114
-	.word	.LANCHOR83
-	.word	.LANCHOR150
-	.word	.LANCHOR171
-	.word	.LC105
 	.word	.LANCHOR23
+	.word	.LANCHOR12
+	.word	.LANCHOR80
+	.word	.LANCHOR99
+	.word	.LANCHOR83
+	.word	.LANCHOR82
 	.cfi_endproc
 .LFE220:
 	.size	FtlWrite, .-FtlWrite
@@ -20764,22 +20729,22 @@ FtlWrite:
 	.type	sftl_write, %function
 sftl_write:
 .LFB223:
-	.loc 3 1209 0
+	.loc 3 1173 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL1961:
-	.loc 3 1210 0
+.LVL1949:
+	.loc 3 1174 0
 	mov	r3, r2
 	mov	r2, r1
-.LVL1962:
+.LVL1950:
 	mov	r1, r0
-.LVL1963:
+.LVL1951:
 	movs	r0, #0
-.LVL1964:
+.LVL1952:
 	b	FtlWrite
-.LVL1965:
+.LVL1953:
 	.cfi_endproc
 .LFE223:
 	.size	sftl_write, .-sftl_write
@@ -20793,7 +20758,7 @@ sftl_write:
 	.type	FtlLoadSysInfo, %function
 FtlLoadSysInfo:
 .LFB277:
-	.loc 2 1360 0
+	.loc 2 1409 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
@@ -20807,101 +20772,101 @@ FtlLoadSysInfo:
 	.cfi_offset 10, -12
 	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	.loc 2 1368 0
+	.loc 2 1417 0
 	movs	r1, #0
-	.loc 2 1365 0
-	ldr	r8, .L1762+136
-	.loc 2 1368 0
-	ldr	r5, .L1762
-	.loc 2 1365 0
+	.loc 2 1414 0
+	ldr	r8, .L1750+136
+	.loc 2 1417 0
+	ldr	r5, .L1750
+	.loc 2 1414 0
 	ldr	r3, [r8]
-	ldr	r4, .L1762+4
-	.loc 2 1366 0
-	ldr	r10, .L1762+140
-	.loc 2 1368 0
+	ldr	r4, .L1750+4
+	.loc 2 1415 0
+	ldr	r10, .L1750+140
+	.loc 2 1417 0
 	ldrh	r2, [r5]
-	ldr	r7, .L1762+8
-	.loc 2 1365 0
+	ldr	r7, .L1750+8
+	.loc 2 1414 0
 	str	r3, [r4, #8]
-	.loc 2 1369 0
-	ldr	r6, .L1762+12
-	.loc 2 1366 0
+	.loc 2 1418 0
+	ldr	r6, .L1750+12
+	.loc 2 1415 0
 	ldr	r3, [r10]
-	.loc 2 1368 0
+	.loc 2 1417 0
 	lsls	r2, r2, #1
 	ldr	r0, [r7]
-	.loc 2 1366 0
+	.loc 2 1415 0
 	str	r3, [r4, #12]
-	.loc 2 1368 0
+	.loc 2 1417 0
 	bl	ftl_memset
-.LVL1966:
-	.loc 2 1369 0
+.LVL1954:
+	.loc 2 1418 0
 	ldrh	r0, [r6]
 	movw	r3, #65535
 	str	r7, [sp]
 	cmp	r0, r3
-	bne	.L1742
-.L1750:
-	.loc 2 1370 0
+	bne	.L1730
+.L1738:
+	.loc 2 1419 0
 	mov	r0, #-1
-.L1741:
-	.loc 2 1463 0
+.L1729:
+	.loc 2 1512 0
 	add	sp, sp, #8
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1742:
+.L1730:
 	.cfi_restore_state
-	.loc 2 1372 0
+	.loc 2 1421 0
 	movs	r1, #1
-	.loc 2 1378 0
+	.loc 2 1427 0
 	mov	fp, r4
-	.loc 2 1372 0
+	.loc 2 1421 0
 	bl	FtlGetLastWrittenPage
-.LVL1967:
-	.loc 2 1381 0
-	ldr	r3, .L1762+16
-	.loc 2 1372 0
+.LVL1955:
+	.loc 2 1430 0
+	ldr	r3, .L1750+16
+	.loc 2 1421 0
 	sxth	r7, r0
-.LVL1968:
-	.loc 2 1373 0
+.LVL1956:
+	.loc 2 1422 0
 	adds	r0, r0, #1
 	strh	r0, [r6, #2]	@ movhi
-.L1744:
-	.loc 2 1375 0
+.L1732:
+	.loc 2 1424 0
 	cmp	r7, #0
-	bge	.L1747
-	.loc 2 1388 0
-	movw	r2, #1388
-	ldr	r1, .L1762+20
-	ldr	r0, .L1762+24
+	bge	.L1735
+	.loc 2 1437 0
+	movw	r2, #1437
+	ldr	r1, .L1750+20
+	ldr	r0, .L1750+24
 	bl	printf
-.LVL1969:
-.L1746:
-	.loc 2 1390 0
-	ldr	r2, .L1762+28
+.LVL1957:
+.L1734:
+	.loc 2 1439 0
+	ldr	r2, .L1750+28
 	ldrh	r3, [r5]
 	ldrh	r2, [r2]
 	adds	r3, r3, #24
 	cmp	r2, r3, lsl #1
-	bcs	.L1749
-	.loc 2 1390 0 is_stmt 0 discriminator 1
-	movw	r2, #1390
-	ldr	r1, .L1762+20
-	ldr	r0, .L1762+24
+	bcs	.L1737
+	.loc 2 1439 0 is_stmt 0 discriminator 1
+	movw	r2, #1439
+	ldr	r1, .L1750+20
+	ldr	r0, .L1750+24
 	bl	printf
-.LVL1970:
-.L1749:
-	.loc 2 1392 0 is_stmt 1
-	ldr	r7, .L1762+32
-.LVL1971:
+.LVL1958:
+.L1737:
+	.loc 2 1441 0 is_stmt 1
+	ldr	r7, .L1750+32
+.LVL1959:
 	movs	r2, #48
 	ldr	r1, [r4, #8]
 	mov	r0, r7
 	bl	ftl_memcpy
-.LVL1972:
-	.loc 2 1393 0
+.LVL1960:
+	.loc 2 1442 0
 	ldrh	r2, [r5]
 	ldr	r1, [r4, #8]
 	ldr	r3, [sp]
@@ -20909,8 +20874,8 @@ FtlLoadSysInfo:
 	adds	r1, r1, #48
 	ldr	r0, [r3]
 	bl	ftl_memcpy
-.LVL1973:
-	.loc 2 1394 0
+.LVL1961:
+	.loc 2 1443 0
 	ldrh	r1, [r5]
 	ldr	r3, [r4, #8]
 	mov	r4, r7
@@ -20920,305 +20885,305 @@ FtlLoadSysInfo:
 	adds	r2, r2, #4
 	bic	r1, r1, #3
 	add	r1, r1, r3
-	ldr	r3, .L1762+36
+	ldr	r3, .L1750+36
 	ldr	r0, [r3]
 	bl	ftl_memcpy
-.LVL1974:
-	.loc 2 1396 0
+.LVL1962:
+	.loc 2 1445 0
 	ldr	r2, [r7]
-	ldr	r3, .L1762+16
+	ldr	r3, .L1750+16
 	cmp	r2, r3
-	bne	.L1750
-	.loc 2 1400 0
-	ldr	r3, .L1762+40
+	bne	.L1738
+	.loc 2 1449 0
+	ldr	r3, .L1750+40
 	ldrb	r2, [r7, #10]	@ zero_extendqisi2
-	.loc 2 1399 0
+	.loc 2 1448 0
 	ldrh	r5, [r7, #8]
-	.loc 2 1400 0
+	.loc 2 1449 0
 	ldrh	r3, [r3]
-	.loc 2 1399 0
+	.loc 2 1448 0
 	strh	r5, [r6, #6]	@ movhi
-	.loc 2 1400 0
+	.loc 2 1449 0
 	cmp	r2, r3
-	bne	.L1750
-	.loc 2 1403 0
-	ldr	r3, .L1762+44
-	.loc 2 1404 0
-	ldr	r2, .L1762+48
-	.loc 2 1403 0
+	bne	.L1738
+	.loc 2 1452 0
+	ldr	r3, .L1750+44
+	.loc 2 1453 0
+	ldr	r2, .L1750+48
+	.loc 2 1452 0
 	str	r5, [r3]
-	.loc 2 1404 0
-	ldr	r3, .L1762+52
+	.loc 2 1453 0
+	ldr	r3, .L1750+52
 	ldrh	r3, [r3]
 	muls	r3, r5, r3
 	str	r3, [r2]
-	.loc 2 1405 0
-	ldr	r2, .L1762+56
+	.loc 2 1454 0
+	ldr	r2, .L1750+56
 	ldrh	r2, [r2]
 	muls	r3, r2, r3
-	ldr	r2, .L1762+60
+	ldr	r2, .L1750+60
 	str	r3, [r2]
-	.loc 2 1406 0
-	ldr	r3, .L1762+64
+	.loc 2 1455 0
+	ldr	r3, .L1750+64
 	ldr	r6, [r3]
-	ldr	r3, .L1762+68
+	ldr	r3, .L1750+68
 	ldrh	r0, [r3, #6]
-	ldr	r3, .L1762+72
+	ldr	r3, .L1750+72
 	subs	r0, r6, r0
 	ldrh	r1, [r3]
 	subs	r0, r0, r5
 	bl	__aeabi_uidiv
-.LVL1975:
-	ldr	r3, .L1762+76
-	.loc 2 1412 0
+.LVL1963:
+	ldr	r3, .L1750+76
+	.loc 2 1461 0
 	cmp	r5, r6
-	.loc 2 1406 0
+	.loc 2 1455 0
 	strh	r0, [r3]	@ movhi
-	.loc 2 1412 0
-	bls	.L1751
-	.loc 2 1412 0 is_stmt 0 discriminator 1
-	movw	r2, #1412
-	ldr	r1, .L1762+20
-	ldr	r0, .L1762+24
+	.loc 2 1461 0
+	bls	.L1739
+	.loc 2 1461 0 is_stmt 0 discriminator 1
+	movw	r2, #1461
+	ldr	r1, .L1750+20
+	ldr	r0, .L1750+24
 	bl	printf
-.LVL1976:
-.L1751:
-	.loc 2 1415 0 is_stmt 1
+.LVL1964:
+.L1739:
+	.loc 2 1464 0 is_stmt 1
 	ldrh	r2, [r4, #16]
-	.loc 2 1414 0
-	ldr	r3, .L1762+80
+	.loc 2 1463 0
+	ldr	r3, .L1750+80
 	ldrh	ip, [r4, #14]
-	.loc 2 1419 0
-	ldr	r7, .L1762+84
-	.loc 2 1415 0
+	.loc 2 1468 0
+	ldr	r7, .L1750+84
+	.loc 2 1464 0
 	lsrs	r1, r2, #6
-	.loc 2 1416 0
+	.loc 2 1465 0
 	and	r2, r2, #63
 	strb	r2, [r3, #6]
-	.loc 2 1417 0
+	.loc 2 1466 0
 	ldrb	r2, [r4, #11]	@ zero_extendqisi2
-	.loc 2 1415 0
+	.loc 2 1464 0
 	strh	r1, [r3, #2]	@ movhi
-	.loc 2 1424 0
-	ldr	r1, .L1762+88
-	.loc 2 1417 0
+	.loc 2 1473 0
+	ldr	r1, .L1750+88
+	.loc 2 1466 0
 	strb	r2, [r3, #8]
-	.loc 2 1424 0
+	.loc 2 1473 0
 	ldrh	r2, [r4, #18]
-	.loc 2 1414 0
+	.loc 2 1463 0
 	strh	ip, [r3]	@ movhi
-	.loc 2 1419 0
+	.loc 2 1468 0
 	movw	r3, #65535
 	strh	r3, [r7]	@ movhi
-	.loc 2 1420 0
+	.loc 2 1469 0
 	movs	r3, #0
-	.loc 2 1424 0
+	.loc 2 1473 0
 	strh	r2, [r1]	@ movhi
-	.loc 2 1425 0
+	.loc 2 1474 0
 	ldrh	r2, [r4, #20]
-	.loc 2 1420 0
+	.loc 2 1469 0
 	strh	r3, [r7, #2]	@ movhi
-	.loc 2 1421 0
+	.loc 2 1470 0
 	strb	r3, [r7, #6]
-	.loc 2 1422 0
+	.loc 2 1471 0
 	strb	r3, [r7, #8]
-	.loc 2 1425 0
+	.loc 2 1474 0
 	lsrs	r5, r2, #6
-	.loc 2 1426 0
+	.loc 2 1475 0
 	and	r2, r2, #63
 	strb	r2, [r1, #6]
-	.loc 2 1427 0
+	.loc 2 1476 0
 	ldrb	r2, [r4, #12]	@ zero_extendqisi2
-	.loc 2 1425 0
+	.loc 2 1474 0
 	strh	r5, [r1, #2]	@ movhi
-	.loc 2 1429 0
+	.loc 2 1478 0
 	ldrh	r5, [r4, #22]
-	.loc 2 1427 0
+	.loc 2 1476 0
 	strb	r2, [r1, #8]
-	.loc 2 1429 0
-	ldr	r2, .L1762+92
+	.loc 2 1478 0
+	ldr	r2, .L1750+92
 	strh	r5, [r2]	@ movhi
-	.loc 2 1430 0
+	.loc 2 1479 0
 	ldrh	r5, [r4, #24]
 	lsrs	r6, r5, #6
-	.loc 2 1431 0
+	.loc 2 1480 0
 	and	r5, r5, #63
 	strb	r5, [r2, #6]
-	.loc 2 1432 0
+	.loc 2 1481 0
 	ldrb	r5, [r4, #13]	@ zero_extendqisi2
-	.loc 2 1430 0
+	.loc 2 1479 0
 	strh	r6, [r2, #2]	@ movhi
-	.loc 2 1439 0
+	.loc 2 1488 0
 	ldr	r6, [r4, #32]
-	.loc 2 1432 0
+	.loc 2 1481 0
 	strb	r5, [r2, #8]
-	.loc 2 1434 0
-	ldr	r5, .L1762+96
+	.loc 2 1483 0
+	ldr	r5, .L1750+96
 	str	r3, [r5]
-	.loc 2 1435 0
-	ldr	r5, .L1762+100
+	.loc 2 1484 0
+	ldr	r5, .L1750+100
 	str	r3, [r5]
-	.loc 2 1436 0
-	ldr	r5, .L1762+104
+	.loc 2 1485 0
+	ldr	r5, .L1750+104
 	str	r3, [r5]
-	.loc 2 1437 0
-	ldr	r5, .L1762+108
+	.loc 2 1486 0
+	ldr	r5, .L1750+108
 	str	r3, [r5]
-	.loc 2 1439 0
-	ldr	r5, .L1762+112
+	.loc 2 1488 0
+	ldr	r5, .L1750+112
 	str	r6, [r5]
 	mov	r6, r1
-	.loc 2 1440 0
-	ldr	r5, .L1762+116
+	.loc 2 1489 0
+	ldr	r5, .L1750+116
 	str	r3, [r5]
-	.loc 2 1441 0
-	ldr	r5, .L1762+120
+	.loc 2 1490 0
+	ldr	r5, .L1750+120
 	str	r3, [r5]
-	.loc 2 1442 0
-	ldr	r5, .L1762+124
-	.loc 2 1444 0
+	.loc 2 1491 0
+	ldr	r5, .L1750+124
+	.loc 2 1493 0
 	ldr	lr, [r4, #40]
-	.loc 2 1442 0
+	.loc 2 1491 0
 	str	r3, [r5]
-	.loc 2 1444 0
-	ldr	r3, .L1762+128
+	.loc 2 1493 0
+	ldr	r3, .L1750+128
 	ldr	r5, [r3]
 	cmp	lr, r5
 	mov	r5, r2
-	.loc 2 1445 0
+	.loc 2 1494 0
 	it	hi
 	strhi	lr, [r3]
-	.loc 2 1447 0
-	ldr	r3, .L1762+132
+	.loc 2 1496 0
+	ldr	r3, .L1750+132
 	ldr	r2, [r4, #36]
 	ldr	r1, [r3]
 	cmp	r2, r1
-	.loc 2 1448 0
+	.loc 2 1497 0
 	it	hi
 	strhi	r2, [r3]
-	.loc 2 1450 0
+	.loc 2 1499 0
 	movw	r3, #65535
 	cmp	ip, r3
-	beq	.L1754
-	.loc 2 1451 0
-	ldr	r0, .L1762+80
+	beq	.L1742
+	.loc 2 1500 0
+	ldr	r0, .L1750+80
 	bl	make_superblock
-.LVL1977:
-.L1754:
-	.loc 2 1453 0
+.LVL1965:
+.L1742:
+	.loc 2 1502 0
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1755
-	.loc 2 1454 0
-	ldr	r0, .L1762+88
+	beq	.L1743
+	.loc 2 1503 0
+	ldr	r0, .L1750+88
 	bl	make_superblock
-.LVL1978:
-.L1755:
-	.loc 2 1456 0
+.LVL1966:
+.L1743:
+	.loc 2 1505 0
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1756
-	.loc 2 1457 0
-	ldr	r0, .L1762+92
+	beq	.L1744
+	.loc 2 1506 0
+	ldr	r0, .L1750+92
 	bl	make_superblock
-.LVL1979:
-.L1756:
-	.loc 2 1459 0
+.LVL1967:
+.L1744:
+	.loc 2 1508 0
 	ldrh	r2, [r7]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1757
-	.loc 2 1460 0
-	ldr	r0, .L1762+84
+	beq	.L1745
+	.loc 2 1509 0
+	ldr	r0, .L1750+84
 	bl	make_superblock
-.LVL1980:
-.L1757:
-	.loc 2 1462 0
+.LVL1968:
+.L1745:
+	.loc 2 1511 0
 	movs	r0, #0
-	b	.L1741
-.LVL1981:
-.L1747:
-	.loc 2 1376 0
+	b	.L1729
+.LVL1969:
+.L1735:
+	.loc 2 1425 0
 	ldrh	r2, [r6]
-	.loc 2 1378 0
+	.loc 2 1427 0
 	mov	r0, fp
 	str	r3, [sp, #4]
-	.loc 2 1376 0
+	.loc 2 1425 0
 	orr	r2, r7, r2, lsl #10
 	str	r2, [r4, #4]
-	.loc 2 1377 0
+	.loc 2 1426 0
 	ldr	r2, [r8]
 	str	r2, [r4, #8]
-	.loc 2 1378 0
+	.loc 2 1427 0
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL1982:
-	.loc 2 1381 0
+.LVL1970:
+	.loc 2 1430 0
 	ldr	r2, [r4]
 	ldr	r3, [sp, #4]
 	adds	r2, r2, #1
-	beq	.L1745
-	.loc 2 1382 0 discriminator 1
+	beq	.L1733
+	.loc 2 1431 0 discriminator 1
 	ldr	r2, [r8]
-	.loc 2 1381 0 discriminator 1
+	.loc 2 1430 0 discriminator 1
 	ldr	r2, [r2]
 	cmp	r2, r3
-	bne	.L1745
-	.loc 2 1383 0
+	bne	.L1733
+	.loc 2 1432 0
 	ldr	r2, [r10]
 	ldrh	r1, [r2]
-	.loc 2 1382 0
+	.loc 2 1431 0
 	movw	r2, #61604
 	cmp	r1, r2
-	beq	.L1746
-.L1745:
+	beq	.L1734
+.L1733:
 	subs	r7, r7, #1
-.LVL1983:
+.LVL1971:
 	sxth	r7, r7
-.LVL1984:
-	b	.L1744
-.L1763:
+.LVL1972:
+	b	.L1732
+.L1751:
 	.align	2
-.L1762:
+.L1750:
 	.word	.LANCHOR5
-	.word	.LANCHOR108
-	.word	.LANCHOR43
-	.word	.LANCHOR81
+	.word	.LANCHOR106
+	.word	.LANCHOR42
+	.word	.LANCHOR79
 	.word	1179929683
-	.word	.LANCHOR181
+	.word	.LANCHOR179
 	.word	.LC1
 	.word	.LANCHOR23
-	.word	.LANCHOR79
+	.word	.LANCHOR39
 	.word	.LANCHOR1
 	.word	.LANCHOR10
-	.word	.LANCHOR182
-	.word	.LANCHOR62
+	.word	.LANCHOR180
+	.word	.LANCHOR61
 	.word	.LANCHOR19
 	.word	.LANCHOR12
 	.word	.LANCHOR34
 	.word	.LANCHOR7
 	.word	.LANCHOR37
 	.word	.LANCHOR3
-	.word	.LANCHOR80
+	.word	.LANCHOR78
 	.word	.LANCHOR51
-	.word	.LANCHOR82
+	.word	.LANCHOR80
 	.word	.LANCHOR52
 	.word	.LANCHOR53
-	.word	.LANCHOR68
-	.word	.LANCHOR65
-	.word	.LANCHOR63
 	.word	.LANCHOR67
-	.word	.LANCHOR73
-	.word	.LANCHOR74
-	.word	.LANCHOR77
+	.word	.LANCHOR64
+	.word	.LANCHOR62
 	.word	.LANCHOR66
-	.word	.LANCHOR71
 	.word	.LANCHOR72
-	.word	.LANCHOR39
-	.word	.LANCHOR109
+	.word	.LANCHOR73
+	.word	.LANCHOR76
+	.word	.LANCHOR65
+	.word	.LANCHOR70
+	.word	.LANCHOR71
+	.word	.LANCHOR107
+	.word	.LANCHOR108
 	.cfi_endproc
 .LFE277:
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
@@ -21232,7 +21197,7 @@ FtlLoadSysInfo:
 	.type	FtlSysBlkInit, %function
 FtlSysBlkInit:
 .LFB295:
-	.loc 2 2306 0
+	.loc 2 2356 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
@@ -21244,239 +21209,242 @@ FtlSysBlkInit:
 	.cfi_offset 6, -12
 	.cfi_offset 7, -8
 	.cfi_offset 14, -4
-	.loc 2 2310 0
+	.loc 2 2360 0
 	movs	r3, #0
-	ldr	r6, .L1780
+	ldr	r6, .L1767
 	strh	r3, [r6]	@ movhi
-	.loc 2 2312 0
-	ldr	r3, .L1780+4
+	.loc 2 2362 0
+	ldr	r3, .L1767+4
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
-.LVL1985:
-	.loc 2 2313 0
+.LVL1973:
+	.loc 2 2363 0
 	bl	FtlScanSysBlk
-.LVL1986:
-	.loc 2 2314 0
-	ldr	r3, .L1780+8
+.LVL1974:
+	.loc 2 2364 0
+	ldr	r3, .L1767+8
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1765
-.L1767:
-	.loc 2 2315 0
+	bne	.L1753
+.L1755:
+	.loc 2 2365 0
 	mov	r7, #-1
-.L1764:
-	.loc 2 2398 0
+.L1752:
+	.loc 2 2451 0
 	mov	r0, r7
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1765:
-	.loc 2 2317 0
+.L1753:
+	.loc 2 2367 0
 	bl	FtlLoadSysInfo
-.LVL1987:
+.LVL1975:
 	mov	r7, r0
 	cmp	r0, #0
-	bne	.L1767
-	.loc 2 2320 0
+	bne	.L1755
+	.loc 2 2370 0
 	bl	FtlLoadMapInfo
-.LVL1988:
-	.loc 2 2321 0
+.LVL1976:
+	.loc 2 2371 0
 	bl	FtlLoadVonderInfo
-.LVL1989:
-	.loc 2 2322 0
+.LVL1977:
+	.loc 2 2372 0
 	bl	Ftl_load_ext_data
-.LVL1990:
-	.loc 2 2324 0
+.LVL1978:
+	.loc 2 2374 0
 	bl	FtlLoadEctTbl
-.LVL1991:
-	.loc 2 2325 0
+.LVL1979:
+	.loc 2 2375 0
 	bl	FtlFreeSysBLkSort
-.LVL1992:
-	.loc 2 2327 0
+.LVL1980:
+	.loc 2 2377 0
 	bl	SupperBlkListInit
-.LVL1993:
-	.loc 2 2328 0
+.LVL1981:
+	.loc 2 2378 0
 	bl	FtlPowerLostRecovery
-.LVL1994:
-	.loc 2 2330 0
+.LVL1982:
+	.loc 2 2380 0
 	movs	r0, #1
 	bl	FtlUpdateVaildLpn
-.LVL1995:
-.LBB305:
-.LBB306:
-	.loc 2 2332 0
-	ldr	r3, .L1780+12
-	.loc 2 2333 0
+.LVL1983:
+.LBB338:
+.LBB339:
+	.loc 2 2382 0
+	ldr	r3, .L1767+12
+	.loc 2 2383 0
 	movs	r0, #12
-	.loc 2 2332 0
+	.loc 2 2382 0
 	ldrh	r1, [r3]
-	.loc 2 2333 0
-	ldr	r3, .L1780+16
+	.loc 2 2383 0
+	ldr	r3, .L1767+16
 	ldr	r2, [r3]
-	.loc 2 2332 0
+	.loc 2 2382 0
 	mov	r3, r7
-.L1768:
-.LVL1996:
+.L1756:
+.LVL1984:
 	cmp	r3, r1
-	bge	.L1773
-	.loc 2 2333 0
+	bge	.L1761
+	.loc 2 2383 0
 	mla	r4, r0, r3, r2
 	ldr	r4, [r4, #4]
 	cmp	r4, #0
-	bge	.L1769
-.L1773:
-	.loc 2 2336 0
-	ldr	r4, .L1780+20
-	.loc 2 2338 0
+	bge	.L1757
+.L1761:
+	.loc 2 2386 0
+	ldr	r4, .L1767+20
+	.loc 2 2388 0
 	cmp	r3, r1
-	ldr	r5, .L1780+24
-	.loc 2 2336 0
+	ldr	r5, .L1767+24
+	.loc 2 2386 0
 	ldrh	r2, [r4, #28]
 	add	r2, r2, #1
 	strh	r2, [r4, #28]	@ movhi
-	.loc 2 2338 0
-	bge	.L1779
-.LVL1997:
-.L1770:
-	.loc 2 2340 0
-	ldr	r6, .L1780+28
-	.loc 2 2339 0
-	ldr	r0, .L1780+24
+	.loc 2 2388 0
+	bge	.L1765
+.LVL1985:
+.L1758:
+	.loc 2 2390 0
+	ldr	r6, .L1767+28
+	.loc 2 2389 0
+	ldr	r0, .L1767+24
 	bl	FtlSuperblockPowerLostFix
-.LVL1998:
-	.loc 2 2340 0
+.LVL1986:
+	.loc 2 2390 0
 	mov	r0, r6
 	bl	FtlSuperblockPowerLostFix
-.LVL1999:
-.LBB307:
-	.loc 2 2346 0
-	ldr	r3, .L1780+32
+.LVL1987:
+.LBB340:
+	.loc 2 2396 0
+	ldr	r3, .L1767+32
 	ldrh	r1, [r5]
 	ldrh	r0, [r5, #4]
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
-	.loc 2 2347 0
-	ldr	r0, .L1780+36
-	.loc 2 2346 0
+	.loc 2 2397 0
+	ldr	r0, .L1767+36
+	.loc 2 2396 0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
-	.loc 2 2352 0
+	.loc 2 2402 0
 	ldrh	ip, [r6]
-	.loc 2 2347 0
+	.loc 2 2397 0
 	ldrh	r3, [r0]
-	.loc 2 2352 0
+	.loc 2 2402 0
 	ldrh	lr, [r6, #4]
-	.loc 2 2347 0
+	.loc 2 2397 0
 	strh	r3, [r5, #2]	@ movhi
-	.loc 2 2348 0
+	.loc 2 2398 0
 	movs	r3, #0
 	strb	r3, [r5, #6]
-	.loc 2 2349 0
+	.loc 2 2399 0
 	strh	r3, [r5, #4]	@ movhi
-.LVL2000:
-	.loc 2 2352 0
+.LVL1988:
+	.loc 2 2402 0
 	ldrh	r1, [r2, ip, lsl #1]
 	sub	r1, r1, lr
 	strh	r1, [r2, ip, lsl #1]	@ movhi
-	.loc 2 2353 0
+	.loc 2 2403 0
 	ldrh	r2, [r0]
-.LBE307:
-	.loc 2 2359 0
-	ldr	r0, .L1780+40
-.LBB308:
-	.loc 2 2354 0
+.LBE340:
+	.loc 2 2409 0
+	ldr	r0, .L1767+40
+.LBB341:
+	.loc 2 2404 0
 	strb	r3, [r6, #6]
-	.loc 2 2353 0
+	.loc 2 2403 0
 	strh	r2, [r6, #2]	@ movhi
-	.loc 2 2355 0
+	.loc 2 2405 0
 	strh	r3, [r6, #4]	@ movhi
-.LBE308:
-	.loc 2 2359 0
+.LBE341:
+	.loc 2 2409 0
 	bl	FtlMapBlkWriteDump_data
-.LVL2001:
-	.loc 2 2360 0
-	ldr	r0, .L1780+44
+.LVL1989:
+	.loc 2 2410 0
+	ldr	r0, .L1767+44
 	bl	FtlMapBlkWriteDump_data
-.LVL2002:
-	.loc 2 2372 0
+.LVL1990:
+	.loc 2 2422 0
 	ldrh	r3, [r4, #30]
 	adds	r3, r3, #1
 	strh	r3, [r4, #30]	@ movhi
-	.loc 2 2373 0
+	.loc 2 2423 0
 	bl	l2p_flush
-.LVL2003:
-	.loc 2 2374 0
+.LVL1991:
+	.loc 2 2424 0
 	bl	FtlVpcTblFlush
-.LVL2004:
-	.loc 2 2375 0
+.LVL1992:
+.L1766:
+	.loc 2 2428 0
 	bl	FtlVpcTblFlush
-.LVL2005:
-	b	.L1774
-.LVL2006:
-.L1769:
-	.loc 2 2332 0
-	adds	r3, r3, #1
-.LVL2007:
-	b	.L1768
-.L1779:
-	.loc 2 2338 0
-	ldrh	r3, [r6]
-.LVL2008:
-	cmp	r3, #0
-	bne	.L1770
-.L1774:
-	.loc 2 2379 0
+.LVL1993:
+	.loc 2 2432 0
 	ldrh	r0, [r5]
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1775
+	beq	.L1764
 	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1775
-	.loc 2 2381 0
-	ldr	r5, .L1780+28
-	.loc 2 2380 0
+	cbnz	r3, .L1764
+	.loc 2 2434 0
+	ldr	r5, .L1767+28
+	.loc 2 2433 0
 	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1775
-	.loc 2 2382 0
+	cbnz	r3, .L1764
+	.loc 2 2435 0
 	bl	FtlGcRefreshBlock
-.LVL2009:
-	.loc 2 2383 0
+.LVL1994:
+	.loc 2 2436 0
 	ldrh	r0, [r5]
 	bl	FtlGcRefreshBlock
-.LVL2010:
-	.loc 2 2384 0
-	ldr	r0, .L1780+24
+.LVL1995:
+	.loc 2 2437 0
+	ldr	r0, .L1767+24
 	bl	allocate_new_data_superblock
-.LVL2011:
-	.loc 2 2385 0
+.LVL1996:
+	.loc 2 2438 0
 	mov	r0, r5
 	bl	allocate_new_data_superblock
-.LVL2012:
-.L1775:
-	.loc 2 2390 0
+.LVL1997:
+.L1764:
+	.loc 2 2443 0
 	ldrh	r3, [r4, #28]
 	lsls	r3, r3, #27
-	bne	.L1764
-	.loc 2 2391 0
+	bne	.L1752
+	.loc 2 2444 0
 	bl	FtlVpcCheckAndModify
-.LVL2013:
-	b	.L1764
-.L1781:
+.LVL1998:
+	b	.L1752
+.LVL1999:
+.L1757:
+	.loc 2 2382 0
+	adds	r3, r3, #1
+.LVL2000:
+	b	.L1756
+.L1765:
+	.loc 2 2388 0
+	ldrh	r3, [r6]
+.LVL2001:
+	cmp	r3, #0
+	bne	.L1758
+	.loc 2 2427 0
+	bl	l2p_flush
+.LVL2002:
+	b	.L1766
+.L1768:
 	.align	2
-.L1780:
-	.word	.LANCHOR162
+.L1767:
+	.word	.LANCHOR161
 	.word	.LANCHOR4
-	.word	.LANCHOR81
-	.word	.LANCHOR33
-	.word	.LANCHOR56
 	.word	.LANCHOR79
+	.word	.LANCHOR33
+	.word	.LANCHOR55
+	.word	.LANCHOR39
 	.word	.LANCHOR51
 	.word	.LANCHOR52
-	.word	.LANCHOR43
+	.word	.LANCHOR42
 	.word	.LANCHOR19
 	.word	.LANCHOR144
 	.word	.LANCHOR149
-.LBE306:
-.LBE305:
+.LBE339:
+.LBE338:
 	.cfi_endproc
 .LFE295:
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
@@ -21507,11 +21475,11 @@ ftl_low_format:
 	.loc 3 629 0
 	movs	r3, #0
 	.loc 3 631 0
-	ldr	r6, .L1806
+	ldr	r6, .L1793
 	.loc 3 630 0
-	ldr	r2, .L1806+4
+	ldr	r2, .L1793+4
 	.loc 3 629 0
-	ldr	r5, .L1806+8
+	ldr	r5, .L1793+8
 	.loc 3 631 0
 	ldrh	r0, [r6]
 	.loc 3 630 0
@@ -21520,96 +21488,96 @@ ftl_low_format:
 	str	r3, [r5]
 	.loc 3 631 0
 	bl	FtlFreeSysBlkQueueInit
-.LVL2014:
+.LVL2003:
 	.loc 3 632 0
 	bl	FtlLoadBbt
-.LVL2015:
-	cbz	r0, .L1783
+.LVL2004:
+	cbz	r0, .L1770
 	.loc 3 633 0
 	bl	FtlMakeBbt
-.LVL2016:
-.L1783:
+.LVL2005:
+.L1770:
 	.loc 3 635 0 discriminator 1
-	ldr	r3, .L1806+12
+	ldr	r3, .L1793+12
 	.loc 3 636 0 discriminator 1
-	ldr	r2, .L1806+16
+	ldr	r2, .L1793+16
 	.loc 3 637 0 discriminator 1
-	ldr	ip, .L1806+100
+	ldr	ip, .L1793+100
 	.loc 3 635 0 discriminator 1
 	ldrh	r1, [r3]
 	.loc 3 636 0 discriminator 1
 	ldr	r4, [r2]
 	.loc 3 637 0 discriminator 1
-	ldr	r2, .L1806+20
+	ldr	r2, .L1793+20
 	str	r3, [sp, #4]
 	.loc 3 635 0 discriminator 1
 	lsls	r1, r1, #7
 	.loc 3 637 0 discriminator 1
 	ldr	r7, [r2]
 	movs	r2, #0
-.L1784:
-.LVL2017:
+.L1771:
+.LVL2006:
 	.loc 3 635 0 discriminator 1
 	uxth	r3, r2
 	adds	r2, r2, #1
-.LVL2018:
+.LVL2007:
 	cmp	r3, r1
-	blt	.L1785
-.LVL2019:
+	blt	.L1772
+.LVL2008:
 	.loc 3 642 0
-	ldr	r3, .L1806+24
-.LVL2020:
+	ldr	r3, .L1793+24
+.LVL2009:
 	.loc 3 641 0
 	movs	r7, #0
 	.loc 3 642 0
-	ldr	r10, .L1806+104
+	ldr	r10, .L1793+104
 	ldrh	r4, [r3]
-.LVL2021:
+.LVL2010:
 	mov	r8, r3
 	mov	fp, r10
-.LVL2022:
-.L1786:
+.LVL2011:
+.L1773:
 	.loc 3 642 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r10]
 	cmp	r3, r4
-	bhi	.L1787
+	bhi	.L1774
 	.loc 3 645 0 is_stmt 1
-	ldr	r4, .L1806+28
-.LVL2023:
+	ldr	r4, .L1793+28
+.LVL2012:
 	subs	r3, r7, #2
 	ldrh	r1, [r4]
 	cmp	r3, r1, lsl #1
-	bgt	.L1788
-.LVL2024:
-.L1792:
+	bgt	.L1775
+.LVL2013:
+.L1779:
 	.loc 3 641 0
 	movs	r6, #0
 	mov	r7, r6
-.L1789:
+.L1776:
 	.loc 3 656 0 discriminator 1
 	ldrh	r3, [r8]
 	uxth	r0, r6
-.LVL2025:
+.LVL2014:
 	adds	r6, r6, #1
 	cmp	r3, r0
-	bhi	.L1793
+	bhi	.L1780
 	.loc 3 658 0
 	ldrh	r2, [fp]
-	ldr	r3, .L1806+32
+	ldr	r3, .L1793+32
 	.loc 3 661 0
 	ldrh	r4, [r4]
-	ldr	r6, .L1806+36
+	ldr	r6, .L1793+36
 	.loc 3 658 0
 	str	r2, [r3]
 	.loc 3 661 0
-	ldr	r3, .L1806+40
+	ldr	r3, .L1793+40
 	mov	r1, r4
 	ldr	r2, [r3]
 	mov	r0, r2
-.LVL2026:
+.LVL2015:
 	str	r2, [sp, #12]
 	bl	__aeabi_uidiv
-.LVL2027:
+.LVL2016:
 	.loc 3 662 0
 	ubfx	r10, r0, #5, #16
 	.loc 3 661 0
@@ -21617,21 +21585,21 @@ ftl_low_format:
 	str	r0, [r6]
 	.loc 3 662 0
 	add	r1, r10, #36
-	ldr	r0, .L1806+44
+	ldr	r0, .L1793+44
 	strh	r1, [r0]	@ movhi
 	.loc 3 663 0
 	movs	r1, #24
 	muls	r1, r4, r1
 	str	r0, [sp]
 	cmp	r7, r1
-	ble	.L1794
+	ble	.L1781
 	.loc 3 664 0
 	ldr	r2, [sp, #12]
 	mov	r1, r4
 	str	r3, [sp, #8]
 	subs	r0, r2, r7
 	bl	__aeabi_uidiv
-.LVL2028:
+.LVL2017:
 	.loc 3 665 0
 	ldr	r3, [sp]
 	.loc 3 664 0
@@ -21641,13 +21609,13 @@ ftl_low_format:
 	adds	r0, r0, #24
 	strh	r0, [r3]	@ movhi
 	ldr	r3, [sp, #8]
-.L1794:
+.L1781:
 	.loc 3 668 0
-	ldr	r2, .L1806+48
+	ldr	r2, .L1793+48
 	ldrh	r2, [r2]
-	cbz	r2, .L1796
+	cbz	r2, .L1783
 	.loc 3 669 0
-	ldr	r1, .L1806+44
+	ldr	r1, .L1793+44
 	ldrh	r0, [r1]
 	add	r0, r0, r2, lsr #1
 	strh	r0, [r1]	@ movhi
@@ -21662,20 +21630,20 @@ ftl_low_format:
 	.loc 3 672 0
 	addlt	r2, r2, r10
 	strhlt	r2, [r1]	@ movhi
-.L1796:
+.L1783:
 	.loc 3 677 0
 	ldr	r3, [sp]
-	ldr	r7, .L1806+52
-.LVL2029:
+	ldr	r7, .L1793+52
+.LVL2018:
 	.loc 3 687 0
-	ldr	r10, .L1806+108
+	ldr	r10, .L1793+108
 	.loc 3 677 0
 	ldrh	r2, [r3]
 	ldr	r3, [r6]
 	subs	r3, r3, r2
 	muls	r4, r3, r4
 	.loc 3 678 0
-	ldr	r3, .L1806+56
+	ldr	r3, .L1793+56
 	ldrh	r3, [r3]
 	.loc 3 677 0
 	str	r4, [r7]
@@ -21687,25 +21655,25 @@ ftl_low_format:
 	.loc 3 678 0
 	str	r4, [r6]
 	.loc 3 694 0
-	ldr	r6, .L1806+60
+	ldr	r6, .L1793+60
 	.loc 3 679 0
 	muls	r4, r3, r4
-	ldr	r3, .L1806+64
+	ldr	r3, .L1793+64
 	str	r4, [r3]
 	.loc 3 689 0
 	movw	r4, #65535
 	.loc 3 684 0
 	bl	FtlBbmTblFlush
-.LVL2030:
+.LVL2019:
 	.loc 3 687 0
 	ldrh	r2, [fp]
 	movs	r1, #0
 	ldr	r0, [r10]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-.LVL2031:
+.LVL2020:
 	.loc 3 688 0
-	ldr	r2, .L1806+68
+	ldr	r2, .L1793+68
 	movs	r3, #0
 	.loc 3 694 0
 	strh	r3, [r6, #2]	@ movhi
@@ -21716,7 +21684,7 @@ ftl_low_format:
 	.loc 3 688 0
 	str	r3, [r2]
 	.loc 3 689 0
-	ldr	r2, .L1806+72
+	ldr	r2, .L1793+72
 	.loc 3 696 0
 	strh	r3, [r6]	@ movhi
 	.loc 3 690 0
@@ -21737,21 +21705,21 @@ ftl_low_format:
 	.loc 3 701 0
 	mov	r10, r6
 	.loc 3 698 0
-	ldr	r3, .L1806+76
+	ldr	r3, .L1793+76
 	lsrs	r2, r2, #3
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL2032:
-.L1798:
+.LVL2021:
+.L1785:
 	.loc 3 701 0
 	mov	r0, r10
 	bl	make_superblock
-.LVL2033:
+.LVL2022:
 	.loc 3 702 0
 	ldrb	r3, [r6, #7]	@ zero_extendqisi2
 	ldrh	r2, [r6]
 	cmp	r3, #0
-	bne	.L1799
+	bne	.L1786
 	.loc 3 705 0
 	ldr	r3, [r8]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
@@ -21760,92 +21728,92 @@ ftl_low_format:
 	adds	r3, r3, #1
 	strh	r3, [r6]	@ movhi
 	.loc 3 707 0
-	b	.L1798
-.LVL2034:
-.L1785:
+	b	.L1785
+.LVL2023:
+.L1772:
 	.loc 3 636 0 discriminator 3
 	mvns	r0, r3
 	orr	r0, r3, r0, lsl #16
 	str	r0, [r4, r3, lsl #2]
 	.loc 3 637 0 discriminator 3
 	str	ip, [r7, r3, lsl #2]
-.LVL2035:
-	b	.L1784
-.LVL2036:
-.L1787:
+.LVL2024:
+	b	.L1771
+.LVL2025:
+.L1774:
 	.loc 3 643 0 discriminator 3
 	mov	r0, r4
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
-.LVL2037:
+.LVL2026:
 	.loc 3 642 0 discriminator 3
 	adds	r4, r4, #1
-.LVL2038:
+.LVL2027:
 	.loc 3 643 0 discriminator 3
 	add	r7, r7, r0
-.LVL2039:
+.LVL2028:
 	uxth	r7, r7
-.LVL2040:
+.LVL2029:
 	.loc 3 642 0 discriminator 3
 	uxth	r4, r4
-.LVL2041:
-	b	.L1786
-.LVL2042:
-.L1788:
+.LVL2030:
+	b	.L1773
+.LVL2031:
+.L1775:
 	.loc 3 647 0
 	mov	r0, r7
 	bl	__aeabi_uidiv
-.LVL2043:
-	ldr	r3, .L1806+80
+.LVL2032:
+	ldr	r3, .L1793+80
 	ldr	r3, [r3]
 	add	r0, r0, r3
 	uxth	r0, r0
 	bl	FtlSysBlkNumInit
-.LVL2044:
+.LVL2033:
 	.loc 3 648 0
 	ldrh	r0, [r6]
 	bl	FtlFreeSysBlkQueueInit
-.LVL2045:
+.LVL2034:
 	.loc 3 650 0
 	ldrh	r6, [r8]
-.LVL2046:
-.L1790:
+.LVL2035:
+.L1777:
 	.loc 3 650 0 is_stmt 0 discriminator 1
 	ldrh	r3, [fp]
 	cmp	r3, r6
-	bls	.L1792
+	bls	.L1779
 	.loc 3 651 0 is_stmt 1 discriminator 3
 	mov	r0, r6
 	movs	r1, #1
 	.loc 3 650 0 discriminator 3
 	adds	r6, r6, #1
-.LVL2047:
+.LVL2036:
 	.loc 3 651 0 discriminator 3
 	bl	FtlLowFormatEraseBlock
-.LVL2048:
+.LVL2037:
 	.loc 3 650 0 discriminator 3
 	uxth	r6, r6
-.LVL2049:
-	b	.L1790
-.LVL2050:
-.L1793:
+.LVL2038:
+	b	.L1777
+.LVL2039:
+.L1780:
 	.loc 3 657 0 discriminator 3
 	movs	r1, #0
 	bl	FtlLowFormatEraseBlock
-.LVL2051:
+.LVL2040:
 	add	r7, r7, r0
-.LVL2052:
+.LVL2041:
 	uxth	r7, r7
-.LVL2053:
-	b	.L1789
-.LVL2054:
-.L1799:
+.LVL2042:
+	b	.L1776
+.LVL2043:
+.L1786:
 	.loc 3 709 0
 	ldr	r3, [r5]
 	.loc 3 710 0
 	ldrh	r1, [r6, #4]
 	.loc 3 712 0
-	ldr	r4, .L1806+84
+	ldr	r4, .L1793+84
 	.loc 3 709 0
 	str	r3, [r6, #12]
 	adds	r3, r3, #1
@@ -21871,15 +21839,15 @@ ftl_low_format:
 	.loc 3 715 0
 	movs	r3, #1
 	strb	r3, [r4, #8]
-.L1800:
+.L1787:
 	.loc 3 717 0
 	mov	r0, r10
 	bl	make_superblock
-.LVL2055:
+.LVL2044:
 	.loc 3 718 0
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r4]
-	cbnz	r3, .L1801
+	cbnz	r3, .L1788
 	.loc 3 721 0
 	ldr	r3, [r8]
 	strh	r6, [r3, r2, lsl #1]	@ movhi
@@ -21888,8 +21856,8 @@ ftl_low_format:
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
 	.loc 3 723 0
-	b	.L1800
-.L1801:
+	b	.L1787
+.L1788:
 	.loc 3 725 0
 	ldr	r3, [r5]
 	.loc 3 726 0
@@ -21904,12 +21872,12 @@ ftl_low_format:
 	ldr	r3, [r8]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
 	.loc 3 727 0
-	ldr	r3, .L1806+88
+	ldr	r3, .L1793+88
 	strh	r4, [r3]	@ movhi
 	.loc 3 730 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL2056:
-	ldr	r3, .L1806+92
+.LVL2045:
+	ldr	r3, .L1793+92
 	.loc 3 731 0
 	movs	r2, #0
 	strh	r2, [r3, #2]	@ movhi
@@ -21928,53 +21896,53 @@ ftl_low_format:
 	str	r2, [r5]
 	.loc 3 735 0
 	bl	FtlVpcTblFlush
-.LVL2057:
+.LVL2046:
 	.loc 3 736 0
 	bl	FtlSysBlkInit
-.LVL2058:
-	cbnz	r0, .L1802
+.LVL2047:
+	cbnz	r0, .L1789
 	.loc 3 737 0
-	ldr	r3, .L1806+96
+	ldr	r3, .L1793+96
 	movs	r2, #1
 	str	r2, [r3]
-.L1802:
+.L1789:
 	.loc 3 739 0
 	movs	r0, #0
 	add	sp, sp, #16
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1807:
+.L1794:
 	.align	2
-.L1806:
+.L1793:
 	.word	.LANCHOR4
-	.word	.LANCHOR72
 	.word	.LANCHOR71
+	.word	.LANCHOR70
 	.word	.LANCHOR12
-	.word	.LANCHOR116
-	.word	.LANCHOR114
+	.word	.LANCHOR115
+	.word	.LANCHOR113
 	.word	.LANCHOR5
 	.word	.LANCHOR3
-	.word	.LANCHOR113
-	.word	.LANCHOR62
+	.word	.LANCHOR112
+	.word	.LANCHOR61
 	.word	.LANCHOR7
-	.word	.LANCHOR80
+	.word	.LANCHOR78
 	.word	.LANCHOR15
-	.word	.LANCHOR182
+	.word	.LANCHOR180
 	.word	.LANCHOR19
 	.word	.LANCHOR51
 	.word	.LANCHOR34
-	.word	.LANCHOR60
-	.word	.LANCHOR82
+	.word	.LANCHOR59
+	.word	.LANCHOR80
 	.word	.LANCHOR1
 	.word	.LANCHOR31
 	.word	.LANCHOR52
 	.word	.LANCHOR53
-	.word	.LANCHOR81
-	.word	.LANCHOR88
+	.word	.LANCHOR79
+	.word	.LANCHOR86
 	.word	168778952
 	.word	.LANCHOR6
-	.word	.LANCHOR43
+	.word	.LANCHOR42
 	.cfi_endproc
 .LFE213:
 	.size	ftl_low_format, .-ftl_low_format
@@ -21992,77 +21960,77 @@ sftl_init:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2059:
+.LVL2048:
 	push	{r4, lr}
 	.cfi_def_cfa_offset 8
 	.cfi_offset 4, -8
 	.cfi_offset 14, -4
 	.loc 3 746 0
 	mov	r3, #-1
-	ldr	r4, .L1814
+	ldr	r4, .L1801
 	.loc 3 749 0
-	ldr	r1, .L1814+4
-	ldr	r0, .L1814+8
+	ldr	r1, .L1801+4
+	ldr	r0, .L1801+8
 	.loc 3 746 0
 	str	r3, [r4]
 	.loc 3 749 0
 	bl	printf
-.LVL2060:
+.LVL2049:
 	.loc 3 750 0
-	ldr	r0, .L1814+12
+	ldr	r0, .L1801+12
 	bl	FtlConstantsInit
-.LVL2061:
+.LVL2050:
 	.loc 3 751 0
 	bl	FtlMemInit
-.LVL2062:
+.LVL2051:
 	.loc 3 752 0
 	bl	FtlVariablesInit
-.LVL2063:
+.LVL2052:
 	.loc 3 753 0
-	ldr	r3, .L1814+16
+	ldr	r3, .L1801+16
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
-.LVL2064:
+.LVL2053:
 .LDL2:
 	.loc 3 756 0
 	bl	FtlLoadBbt
-.LVL2065:
-	cbnz	r0, .L1812
+.LVL2054:
+	cbnz	r0, .L1799
 	.loc 3 767 0
 	bl	FtlSysBlkInit
-.LVL2066:
-	cbnz	r0, .L1812
+.LVL2055:
+	cbnz	r0, .L1799
 	.loc 3 779 0
 	movs	r3, #1
 	str	r3, [r4]
 	.loc 3 783 0
-	ldr	r3, .L1814+20
+	ldr	r3, .L1801+20
 	ldrh	r3, [r3]
 	cmp	r3, #15
-	bhi	.L1812
+	bhi	.L1799
 	movw	r4, #8129
-.L1811:
-.LVL2067:
-.LBB309:
+.L1798:
+.LVL2056:
+.LBB342:
 	.loc 3 786 0 discriminator 3
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
-.LVL2068:
+.LVL2057:
 	.loc 3 785 0 discriminator 3
 	subs	r4, r4, #1
-.LVL2069:
-	bne	.L1811
-.LVL2070:
-.L1812:
-.LBE309:
+.LVL2058:
+	bne	.L1798
+.LVL2059:
+.L1799:
+.LBE342:
 	.loc 3 794 0
 	movs	r0, #0
 	pop	{r4, pc}
-.L1815:
+.L1802:
 	.align	2
-.L1814:
-	.word	.LANCHOR88
+.L1801:
+	.word	.LANCHOR86
 	.word	.LC70
 	.word	.LC71
 	.word	.LANCHOR0
@@ -22086,10 +22054,10 @@ ftl_memcmp:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL2071:
+.LVL2060:
 	.loc 1 253 0
 	b	memcmp
-.LVL2072:
+.LVL2061:
 	.cfi_endproc
 .LFE351:
 	.size	ftl_memcmp, .-ftl_memcmp
@@ -22191,7 +22159,6 @@ ftl_memcmp:
 	.global	p_sys_data_buf_1
 	.global	p_sys_data_buf
 	.global	p_plane_order_table
-	.global	g_req_cache
 	.global	req_gc_dst
 	.global	req_gc
 	.global	req_erase
@@ -22250,7 +22217,7 @@ DeviceCapacity:
 	.space	4
 	.section	.bss.FtlUpdateVaildLpnCount,"aw",%nobits
 	.align	1
-	.set	.LANCHOR59,. + 0
+	.set	.LANCHOR58,. + 0
 	.type	FtlUpdateVaildLpnCount, %object
 	.size	FtlUpdateVaildLpnCount, 2
 FtlUpdateVaildLpnCount:
@@ -22306,7 +22273,7 @@ c_ftl_nand_data_blks_per_plane:
 	.space	2
 	.section	.bss.c_ftl_nand_data_op_blks_per_plane,"aw",%nobits
 	.align	1
-	.set	.LANCHOR80,. + 0
+	.set	.LANCHOR78,. + 0
 	.type	c_ftl_nand_data_op_blks_per_plane, %object
 	.size	c_ftl_nand_data_op_blks_per_plane, 2
 c_ftl_nand_data_op_blks_per_plane:
@@ -22474,7 +22441,7 @@ c_ftl_vendor_part_size:
 	.space	2
 	.section	.bss.c_gc_page_buf_num,"aw",%nobits
 	.align	2
-	.set	.LANCHOR96,. + 0
+	.set	.LANCHOR94,. + 0
 	.type	c_gc_page_buf_num, %object
 	.size	c_gc_page_buf_num, 4
 c_gc_page_buf_num:
@@ -22494,7 +22461,7 @@ check_buf:
 	.space	4096
 	.section	.bss.check_spare_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR111,. + 0
+	.set	.LANCHOR110,. + 0
 	.type	check_spare_buf, %object
 	.size	check_spare_buf, 512
 check_spare_buf:
@@ -22507,7 +22474,7 @@ check_vpc_table:
 	.space	16384
 	.section	.bss.ftl_gc_temp_power_lost_recovery_flag,"aw",%nobits
 	.align	2
-	.set	.LANCHOR153,. + 0
+	.set	.LANCHOR152,. + 0
 	.type	ftl_gc_temp_power_lost_recovery_flag, %object
 	.size	ftl_gc_temp_power_lost_recovery_flag, 4
 ftl_gc_temp_power_lost_recovery_flag:
@@ -22541,7 +22508,7 @@ gSysFreeQueue:
 	.space	2056
 	.section	.bss.gSysInfo,"aw",%nobits
 	.align	2
-	.set	.LANCHOR81,. + 0
+	.set	.LANCHOR79,. + 0
 	.type	gSysInfo, %object
 	.size	gSysInfo, 12
 gSysInfo:
@@ -22555,14 +22522,14 @@ gVendorBlkInfo:
 	.space	40
 	.section	.bss.g_GlobalDataVersion,"aw",%nobits
 	.align	2
-	.set	.LANCHOR72,. + 0
+	.set	.LANCHOR71,. + 0
 	.type	g_GlobalDataVersion, %object
 	.size	g_GlobalDataVersion, 4
 g_GlobalDataVersion:
 	.space	4
 	.section	.bss.g_GlobalSysVersion,"aw",%nobits
 	.align	2
-	.set	.LANCHOR71,. + 0
+	.set	.LANCHOR70,. + 0
 	.type	g_GlobalSysVersion, %object
 	.size	g_GlobalSysVersion, 4
 g_GlobalSysVersion:
@@ -22576,21 +22543,21 @@ g_MaxLbaSector:
 	.space	4
 	.section	.bss.g_MaxLbn,"aw",%nobits
 	.align	2
-	.set	.LANCHOR182,. + 0
+	.set	.LANCHOR180,. + 0
 	.type	g_MaxLbn, %object
 	.size	g_MaxLbn, 4
 g_MaxLbn:
 	.space	4
 	.section	.bss.g_MaxLpn,"aw",%nobits
 	.align	2
-	.set	.LANCHOR62,. + 0
+	.set	.LANCHOR61,. + 0
 	.type	g_MaxLpn, %object
 	.size	g_MaxLpn, 4
 g_MaxLpn:
 	.space	4
 	.section	.bss.g_VaildLpn,"aw",%nobits
 	.align	2
-	.set	.LANCHOR60,. + 0
+	.set	.LANCHOR59,. + 0
 	.type	g_VaildLpn, %object
 	.size	g_VaildLpn, 4
 g_VaildLpn:
@@ -22611,7 +22578,7 @@ g_buffer_superblock:
 	.space	48
 	.section	.bss.g_cur_erase_blk,"aw",%nobits
 	.align	2
-	.set	.LANCHOR113,. + 0
+	.set	.LANCHOR112,. + 0
 	.type	g_cur_erase_blk, %object
 	.size	g_cur_erase_blk, 4
 g_cur_erase_blk:
@@ -22625,70 +22592,70 @@ g_ect_tbl_info_size:
 	.space	2
 	.section	.bss.g_ect_tbl_power_up_flush,"aw",%nobits
 	.align	1
-	.set	.LANCHOR166,. + 0
+	.set	.LANCHOR165,. + 0
 	.type	g_ect_tbl_power_up_flush, %object
 	.size	g_ect_tbl_power_up_flush, 2
 g_ect_tbl_power_up_flush:
 	.space	2
 	.section	.bss.g_ftl_nand_free_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR178,. + 0
+	.set	.LANCHOR176,. + 0
 	.type	g_ftl_nand_free_count, %object
 	.size	g_ftl_nand_free_count, 4
 g_ftl_nand_free_count:
 	.space	4
 	.section	.bss.g_gc_bad_block_gc_index,"aw",%nobits
 	.align	1
-	.set	.LANCHOR105,. + 0
+	.set	.LANCHOR103,. + 0
 	.type	g_gc_bad_block_gc_index, %object
 	.size	g_gc_bad_block_gc_index, 2
 g_gc_bad_block_gc_index:
 	.space	2
 	.section	.bss.g_gc_bad_block_temp_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR103,. + 0
+	.set	.LANCHOR101,. + 0
 	.type	g_gc_bad_block_temp_num, %object
 	.size	g_gc_bad_block_temp_num, 2
 g_gc_bad_block_temp_num:
 	.space	2
 	.section	.bss.g_gc_bad_block_temp_tbl,"aw",%nobits
 	.align	1
-	.set	.LANCHOR104,. + 0
+	.set	.LANCHOR102,. + 0
 	.type	g_gc_bad_block_temp_tbl, %object
 	.size	g_gc_bad_block_temp_tbl, 34
 g_gc_bad_block_temp_tbl:
 	.space	34
 	.section	.bss.g_gc_blk_index,"aw",%nobits
 	.align	1
-	.set	.LANCHOR87,. + 0
+	.set	.LANCHOR85,. + 0
 	.type	g_gc_blk_index, %object
 	.size	g_gc_blk_index, 2
 g_gc_blk_index:
 	.space	2
 	.section	.bss.g_gc_blk_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR98,. + 0
+	.set	.LANCHOR96,. + 0
 	.type	g_gc_blk_num, %object
 	.size	g_gc_blk_num, 2
 g_gc_blk_num:
 	.space	2
 	.section	.bss.g_gc_cur_blk_max_valid_pages,"aw",%nobits
 	.align	1
-	.set	.LANCHOR176,. + 0
+	.set	.LANCHOR174,. + 0
 	.type	g_gc_cur_blk_max_valid_pages, %object
 	.size	g_gc_cur_blk_max_valid_pages, 2
 g_gc_cur_blk_max_valid_pages:
 	.space	2
 	.section	.bss.g_gc_cur_blk_valid_pages,"aw",%nobits
 	.align	1
-	.set	.LANCHOR175,. + 0
+	.set	.LANCHOR173,. + 0
 	.type	g_gc_cur_blk_valid_pages, %object
 	.size	g_gc_cur_blk_valid_pages, 2
 g_gc_cur_blk_valid_pages:
 	.space	2
 	.section	.bss.g_gc_free_blk_threshold,"aw",%nobits
 	.align	1
-	.set	.LANCHOR84,. + 0
+	.set	.LANCHOR82,. + 0
 	.type	g_gc_free_blk_threshold, %object
 	.size	g_gc_free_blk_threshold, 2
 g_gc_free_blk_threshold:
@@ -22709,49 +22676,49 @@ g_gc_head_data_block_count:
 	.space	4
 	.section	.bss.g_gc_merge_free_blk_threshold,"aw",%nobits
 	.align	1
-	.set	.LANCHOR85,. + 0
+	.set	.LANCHOR83,. + 0
 	.type	g_gc_merge_free_blk_threshold, %object
 	.size	g_gc_merge_free_blk_threshold, 2
 g_gc_merge_free_blk_threshold:
 	.space	2
 	.section	.bss.g_gc_next_blk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR101,. + 0
+	.set	.LANCHOR99,. + 0
 	.type	g_gc_next_blk, %object
 	.size	g_gc_next_blk, 2
 g_gc_next_blk:
 	.space	2
 	.section	.bss.g_gc_next_blk_1,"aw",%nobits
 	.align	1
-	.set	.LANCHOR102,. + 0
+	.set	.LANCHOR100,. + 0
 	.type	g_gc_next_blk_1, %object
 	.size	g_gc_next_blk_1, 2
 g_gc_next_blk_1:
 	.space	2
 	.section	.bss.g_gc_num_req,"aw",%nobits
 	.align	2
-	.set	.LANCHOR91,. + 0
+	.set	.LANCHOR89,. + 0
 	.type	g_gc_num_req, %object
 	.size	g_gc_num_req, 4
 g_gc_num_req:
 	.space	4
 	.section	.bss.g_gc_page_offset,"aw",%nobits
 	.align	1
-	.set	.LANCHOR99,. + 0
+	.set	.LANCHOR97,. + 0
 	.type	g_gc_page_offset, %object
 	.size	g_gc_page_offset, 2
 g_gc_page_offset:
 	.space	2
 	.section	.bss.g_gc_skip_write_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR86,. + 0
+	.set	.LANCHOR84,. + 0
 	.type	g_gc_skip_write_count, %object
 	.size	g_gc_skip_write_count, 4
 g_gc_skip_write_count:
 	.space	4
 	.section	.bss.g_gc_superblock,"aw",%nobits
 	.align	2
-	.set	.LANCHOR82,. + 0
+	.set	.LANCHOR80,. + 0
 	.type	g_gc_superblock, %object
 	.size	g_gc_superblock, 48
 g_gc_superblock:
@@ -22772,35 +22739,35 @@ g_in_gc_progress:
 	.space	4
 	.section	.bss.g_in_swl_replace,"aw",%nobits
 	.align	2
-	.set	.LANCHOR89,. + 0
+	.set	.LANCHOR87,. + 0
 	.type	g_in_swl_replace, %object
 	.size	g_in_swl_replace, 4
 g_in_swl_replace:
 	.space	4
 	.section	.bss.g_l2p_last_update_region_id,"aw",%nobits
 	.align	1
-	.set	.LANCHOR57,. + 0
+	.set	.LANCHOR56,. + 0
 	.type	g_l2p_last_update_region_id, %object
 	.size	g_l2p_last_update_region_id, 2
 g_l2p_last_update_region_id:
 	.space	2
 	.section	.bss.g_max_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR77,. + 0
+	.set	.LANCHOR76,. + 0
 	.type	g_max_erase_count, %object
 	.size	g_max_erase_count, 4
 g_max_erase_count:
 	.space	4
 	.section	.bss.g_min_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR78,. + 0
+	.set	.LANCHOR77,. + 0
 	.type	g_min_erase_count, %object
 	.size	g_min_erase_count, 4
 g_min_erase_count:
 	.space	4
 	.section	.bss.g_nand_ops,"aw",%nobits
 	.align	2
-	.set	.LANCHOR107,. + 0
+	.set	.LANCHOR105,. + 0
 	.type	g_nand_ops, %object
 	.size	g_nand_ops, 16
 g_nand_ops:
@@ -22828,91 +22795,84 @@ g_num_free_superblocks:
 	.space	2
 	.section	.bss.g_power_lost_recovery_flag,"aw",%nobits
 	.align	1
-	.set	.LANCHOR162,. + 0
+	.set	.LANCHOR161,. + 0
 	.type	g_power_lost_recovery_flag, %object
 	.size	g_power_lost_recovery_flag, 2
 g_power_lost_recovery_flag:
 	.space	2
 	.section	.bss.g_recovery_page_min_ver,"aw",%nobits
 	.align	2
-	.set	.LANCHOR154,. + 0
+	.set	.LANCHOR153,. + 0
 	.type	g_recovery_page_min_ver, %object
 	.size	g_recovery_page_min_ver, 4
 g_recovery_page_min_ver:
 	.space	4
 	.section	.bss.g_recovery_page_num,"aw",%nobits
 	.align	2
-	.set	.LANCHOR163,. + 0
+	.set	.LANCHOR162,. + 0
 	.type	g_recovery_page_num, %object
 	.size	g_recovery_page_num, 4
 g_recovery_page_num:
 	.space	4
 	.section	.bss.g_recovery_ppa_tbl,"aw",%nobits
 	.align	2
-	.set	.LANCHOR164,. + 0
+	.set	.LANCHOR163,. + 0
 	.type	g_recovery_ppa_tbl, %object
 	.size	g_recovery_ppa_tbl, 128
 g_recovery_ppa_tbl:
 	.space	128
-	.section	.bss.g_req_cache,"aw",%nobits
-	.align	2
-	.set	.LANCHOR150,. + 0
-	.type	g_req_cache, %object
-	.size	g_req_cache, 4
-g_req_cache:
-	.space	4
 	.section	.bss.g_sys_ext_data,"aw",%nobits
 	.align	2
-	.set	.LANCHOR83,. + 0
+	.set	.LANCHOR81,. + 0
 	.type	g_sys_ext_data, %object
 	.size	g_sys_ext_data, 512
 g_sys_ext_data:
 	.space	512
 	.section	.bss.g_sys_save_data,"aw",%nobits
 	.align	2
-	.set	.LANCHOR79,. + 0
+	.set	.LANCHOR39,. + 0
 	.type	g_sys_save_data, %object
 	.size	g_sys_save_data, 48
 g_sys_save_data:
 	.space	48
 	.section	.bss.g_tmp_data_superblock_id,"aw",%nobits
 	.align	1
-	.set	.LANCHOR151,. + 0
+	.set	.LANCHOR150,. + 0
 	.type	g_tmp_data_superblock_id, %object
 	.size	g_tmp_data_superblock_id, 2
 g_tmp_data_superblock_id:
 	.space	2
 	.section	.bss.g_totle_avg_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR75,. + 0
+	.set	.LANCHOR74,. + 0
 	.type	g_totle_avg_erase_count, %object
 	.size	g_totle_avg_erase_count, 4
 g_totle_avg_erase_count:
 	.space	4
 	.section	.bss.g_totle_cache_write_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR66,. + 0
+	.set	.LANCHOR65,. + 0
 	.type	g_totle_cache_write_count, %object
 	.size	g_totle_cache_write_count, 4
 g_totle_cache_write_count:
 	.space	4
 	.section	.bss.g_totle_discard_page_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR64,. + 0
+	.set	.LANCHOR63,. + 0
 	.type	g_totle_discard_page_count, %object
 	.size	g_totle_discard_page_count, 4
 g_totle_discard_page_count:
 	.space	4
 	.section	.bss.g_totle_gc_page_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR68,. + 0
+	.set	.LANCHOR67,. + 0
 	.type	g_totle_gc_page_count, %object
 	.size	g_totle_gc_page_count, 4
 g_totle_gc_page_count:
 	.space	4
 	.section	.bss.g_totle_l2p_write_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR67,. + 0
+	.set	.LANCHOR66,. + 0
 	.type	g_totle_l2p_write_count, %object
 	.size	g_totle_l2p_write_count, 4
 g_totle_l2p_write_count:
@@ -22926,42 +22886,42 @@ g_totle_map_block:
 	.space	2
 	.section	.bss.g_totle_mlc_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR73,. + 0
+	.set	.LANCHOR72,. + 0
 	.type	g_totle_mlc_erase_count, %object
 	.size	g_totle_mlc_erase_count, 4
 g_totle_mlc_erase_count:
 	.space	4
 	.section	.bss.g_totle_read_page_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR63,. + 0
+	.set	.LANCHOR62,. + 0
 	.type	g_totle_read_page_count, %object
 	.size	g_totle_read_page_count, 4
 g_totle_read_page_count:
 	.space	4
 	.section	.bss.g_totle_read_sector,"aw",%nobits
 	.align	2
-	.set	.LANCHOR70,. + 0
+	.set	.LANCHOR69,. + 0
 	.type	g_totle_read_sector, %object
 	.size	g_totle_read_sector, 4
 g_totle_read_sector:
 	.space	4
 	.section	.bss.g_totle_slc_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR74,. + 0
+	.set	.LANCHOR73,. + 0
 	.type	g_totle_slc_erase_count, %object
 	.size	g_totle_slc_erase_count, 4
 g_totle_slc_erase_count:
 	.space	4
 	.section	.bss.g_totle_swl_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR152,. + 0
+	.set	.LANCHOR151,. + 0
 	.type	g_totle_swl_count, %object
 	.size	g_totle_swl_count, 4
 g_totle_swl_count:
 	.space	4
 	.section	.bss.g_totle_sys_slc_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR76,. + 0
+	.set	.LANCHOR75,. + 0
 	.type	g_totle_sys_slc_erase_count, %object
 	.size	g_totle_sys_slc_erase_count, 4
 g_totle_sys_slc_erase_count:
@@ -22975,28 +22935,28 @@ g_totle_vendor_block:
 	.space	2
 	.section	.bss.g_totle_write_page_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR65,. + 0
+	.set	.LANCHOR64,. + 0
 	.type	g_totle_write_page_count, %object
 	.size	g_totle_write_page_count, 4
 g_totle_write_page_count:
 	.space	4
 	.section	.bss.g_totle_write_sector,"aw",%nobits
 	.align	2
-	.set	.LANCHOR69,. + 0
+	.set	.LANCHOR68,. + 0
 	.type	g_totle_write_sector, %object
 	.size	g_totle_write_sector, 4
 g_totle_write_sector:
 	.space	4
 	.section	.bss.gc_discard_updated,"aw",%nobits
 	.align	2
-	.set	.LANCHOR172,. + 0
+	.set	.LANCHOR167,. + 0
 	.type	gc_discard_updated, %object
 	.size	gc_discard_updated, 4
 gc_discard_updated:
 	.space	4
 	.section	.bss.gc_ink_free_return_value,"aw",%nobits
 	.align	1
-	.set	.LANCHOR174,. + 0
+	.set	.LANCHOR172,. + 0
 	.type	gc_ink_free_return_value, %object
 	.size	gc_ink_free_return_value, 2
 gc_ink_free_return_value:
@@ -23010,14 +22970,13 @@ gp_ect_tbl_info:
 	.space	4
 	.section	.bss.gp_gc_page_buf_info,"aw",%nobits
 	.align	2
-	.set	.LANCHOR92,. + 0
+	.set	.LANCHOR90,. + 0
 	.type	gp_gc_page_buf_info, %object
 	.size	gp_gc_page_buf_info, 4
 gp_gc_page_buf_info:
 	.space	4
 	.section	.bss.gp_last_act_superblock,"aw",%nobits
 	.align	2
-	.set	.LANCHOR171,. + 0
 	.type	gp_last_act_superblock, %object
 	.size	gp_last_act_superblock, 4
 gp_last_act_superblock:
@@ -23031,14 +22990,14 @@ p_blk_mode_table:
 	.space	4
 	.section	.bss.p_data_block_list_head,"aw",%nobits
 	.align	2
-	.set	.LANCHOR42,. + 0
+	.set	.LANCHOR41,. + 0
 	.type	p_data_block_list_head, %object
 	.size	p_data_block_list_head, 4
 p_data_block_list_head:
 	.space	4
 	.section	.bss.p_data_block_list_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR41,. + 0
+	.set	.LANCHOR40,. + 0
 	.type	p_data_block_list_table, %object
 	.size	p_data_block_list_table, 4
 p_data_block_list_table:
@@ -23052,7 +23011,7 @@ p_data_block_list_tail:
 	.space	4
 	.section	.bss.p_erase_count_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR40,. + 0
+	.set	.LANCHOR43,. + 0
 	.type	p_erase_count_table, %object
 	.size	p_erase_count_table, 4
 p_erase_count_table:
@@ -23066,49 +23025,49 @@ p_free_data_block_list_head:
 	.space	4
 	.section	.bss.p_gc_blk_tbl,"aw",%nobits
 	.align	2
-	.set	.LANCHOR97,. + 0
+	.set	.LANCHOR95,. + 0
 	.type	p_gc_blk_tbl, %object
 	.size	p_gc_blk_tbl, 4
 p_gc_blk_tbl:
 	.space	4
 	.section	.bss.p_gc_data_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR93,. + 0
+	.set	.LANCHOR91,. + 0
 	.type	p_gc_data_buf, %object
 	.size	p_gc_data_buf, 4
 p_gc_data_buf:
 	.space	4
 	.section	.bss.p_gc_page_info,"aw",%nobits
 	.align	2
-	.set	.LANCHOR100,. + 0
+	.set	.LANCHOR98,. + 0
 	.type	p_gc_page_info, %object
 	.size	p_gc_page_info, 4
 p_gc_page_info:
 	.space	4
 	.section	.bss.p_gc_spare_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR94,. + 0
+	.set	.LANCHOR92,. + 0
 	.type	p_gc_spare_buf, %object
 	.size	p_gc_spare_buf, 4
 p_gc_spare_buf:
 	.space	4
 	.section	.bss.p_io_data_buf_0,"aw",%nobits
 	.align	2
-	.set	.LANCHOR116,. + 0
+	.set	.LANCHOR115,. + 0
 	.type	p_io_data_buf_0, %object
 	.size	p_io_data_buf_0, 4
 p_io_data_buf_0:
 	.space	4
 	.section	.bss.p_io_data_buf_1,"aw",%nobits
 	.align	2
-	.set	.LANCHOR114,. + 0
+	.set	.LANCHOR113,. + 0
 	.type	p_io_data_buf_1, %object
 	.size	p_io_data_buf_1, 4
 p_io_data_buf_1:
 	.space	4
 	.section	.bss.p_io_spare_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR115,. + 0
+	.set	.LANCHOR114,. + 0
 	.type	p_io_spare_buf, %object
 	.size	p_io_spare_buf, 4
 p_io_spare_buf:
@@ -23122,7 +23081,7 @@ p_l2p_map_buf:
 	.space	4
 	.section	.bss.p_l2p_ram_map,"aw",%nobits
 	.align	2
-	.set	.LANCHOR56,. + 0
+	.set	.LANCHOR55,. + 0
 	.type	p_l2p_ram_map, %object
 	.size	p_l2p_ram_map, 4
 p_l2p_ram_map:
@@ -23170,7 +23129,7 @@ p_swl_mul_table:
 	.space	4
 	.section	.bss.p_sys_data_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR39,. + 0
+	.set	.LANCHOR107,. + 0
 	.type	p_sys_data_buf, %object
 	.size	p_sys_data_buf, 4
 p_sys_data_buf:
@@ -23184,7 +23143,7 @@ p_sys_data_buf_1:
 	.space	4
 	.section	.bss.p_sys_spare_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR109,. + 0
+	.set	.LANCHOR108,. + 0
 	.type	p_sys_spare_buf, %object
 	.size	p_sys_spare_buf, 4
 p_sys_spare_buf:
@@ -23198,7 +23157,7 @@ p_valid_page_count_check_table:
 	.space	4
 	.section	.bss.p_valid_page_count_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR43,. + 0
+	.set	.LANCHOR42,. + 0
 	.type	p_valid_page_count_table, %object
 	.size	p_valid_page_count_table, 4
 p_valid_page_count_table:
@@ -23240,14 +23199,14 @@ p_vendor_region_ppn_table:
 	.space	4
 	.section	.bss.req_erase,"aw",%nobits
 	.align	2
-	.set	.LANCHOR112,. + 0
+	.set	.LANCHOR111,. + 0
 	.type	req_erase, %object
 	.size	req_erase, 4
 req_erase:
 	.space	4
 	.section	.bss.req_gc,"aw",%nobits
 	.align	2
-	.set	.LANCHOR95,. + 0
+	.set	.LANCHOR93,. + 0
 	.type	req_gc, %object
 	.size	req_gc, 4
 req_gc:
@@ -23275,28 +23234,28 @@ req_read:
 	.space	4
 	.section	.bss.req_sys,"aw",%nobits
 	.align	2
-	.set	.LANCHOR108,. + 0
+	.set	.LANCHOR106,. + 0
 	.type	req_sys, %object
 	.size	req_sys, 20
 req_sys:
 	.space	20
 	.section	.data.ftl_gc_temp_block_bops_scan_page_addr,"aw",%progbits
 	.align	1
-	.set	.LANCHOR157,. + 0
+	.set	.LANCHOR156,. + 0
 	.type	ftl_gc_temp_block_bops_scan_page_addr, %object
 	.size	ftl_gc_temp_block_bops_scan_page_addr, 2
 ftl_gc_temp_block_bops_scan_page_addr:
 	.short	-1
 	.section	.data.gFtlInitStatus,"aw",%progbits
 	.align	2
-	.set	.LANCHOR88,. + 0
+	.set	.LANCHOR86,. + 0
 	.type	gFtlInitStatus, %object
 	.size	gFtlInitStatus, 4
 gFtlInitStatus:
 	.word	-1
 	.section	.data.power_up_flag,"aw",%progbits
 	.align	2
-	.set	.LANCHOR179,. + 0
+	.set	.LANCHOR177,. + 0
 	.type	power_up_flag, %object
 	.size	power_up_flag, 4
 power_up_flag:
@@ -23313,14 +23272,20 @@ power_up_flag:
 	.ascii	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\012"
 	.ascii	"\000"
 	.section	.rodata.FtlBbmTblFlush.str1.1,"aMS",%progbits,1
-.LC94:
+.LC97:
 	.ascii	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\012\000"
-.LC95:
+.LC98:
 	.ascii	"FtlBbmTblFlush error:%x\012\000"
-.LC96:
+.LC99:
 	.ascii	"FtlBbmTblFlush error = %x error count = %d\012\000"
+	.section	.rodata.FtlFreeSysBlkQueueOut.str1.1,"aMS",%progbits,1
+.LC82:
+	.ascii	"FtlFreeSysBlkQueueOut free count = %d\012\000"
+.LC83:
+	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\012"
+	.ascii	"\000"
 	.section	.rodata.FtlGcFreeBadSuperBlk.str1.1,"aMS",%progbits,1
-.LC97:
+.LC100:
 	.ascii	"FtlGcFreeBadSuperBlk 0x%x\012\000"
 	.section	.rodata.FtlGcMarkBadPhyBlk.str1.1,"aMS",%progbits,1
 .LC74:
@@ -23329,15 +23294,15 @@ power_up_flag:
 .LC73:
 	.ascii	"FtlGcRefreshBlock  0x%x\012\000"
 	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",%progbits,1
-.LC100:
+.LC103:
 	.ascii	"no ect\000"
 	.section	.rodata.FtlMapWritePage.str1.1,"aMS",%progbits,1
-.LC86:
+.LC89:
 	.ascii	"FtlMapWritePage error = %x \012\000"
-.LC87:
+.LC90:
 	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
 	.section	.rodata.FtlMemInit.str1.1,"aMS",%progbits,1
-.LC82:
+.LC85:
 	.ascii	"%s error allocating memory. return -1\012\000"
 	.section	.rodata.FtlPrintInfo2buf.str1.1,"aMS",%progbits,1
 .LC2:
@@ -23477,19 +23442,19 @@ power_up_flag:
 .LC69:
 	.ascii	"free %d. [0x%x] 0x%x  0x%x\012\000"
 	.section	.rodata.FtlProgPages.str1.1,"aMS",%progbits,1
-.LC103:
+.LC106:
 	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
 	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",%progbits,1
-.LC99:
+.LC102:
 	.ascii	"spuer block %x vpn is 0\012 \000"
 	.section	.rodata.FtlVpcCheckAndModify.str1.1,"aMS",%progbits,1
-.LC102:
+.LC105:
 	.ascii	"FtlCheckVpc %x = %x  %x\012\000"
 	.section	.rodata.FtlVpcTblFlush.str1.1,"aMS",%progbits,1
-.LC101:
+.LC104:
 	.ascii	"FtlVpcTblFlush error = %x error count = %d\012\000"
 	.section	.rodata.FtlWrite.str1.1,"aMS",%progbits,1
-.LC105:
+.LC108:
 	.ascii	"FtlWrite: lpa error:%x %x\012\000"
 	.section	.rodata.GetSwlReplaceBlock.str1.1,"aMS",%progbits,1
 .LC72:
@@ -23499,175 +23464,175 @@ power_up_flag:
 .LC1:
 	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
 	.section	.rodata.__func__.10046,"a",%progbits
-	.set	.LANCHOR177,. + 0
+	.set	.LANCHOR175,. + 0
 	.type	__func__.10046, %object
 	.size	__func__.10046, 23
 __func__.10046:
 	.ascii	"rk_ftl_garbage_collect\000"
 	.section	.rodata.__func__.10310,"a",%progbits
-	.set	.LANCHOR106,. + 0
+	.set	.LANCHOR104,. + 0
 	.type	__func__.10310, %object
 	.size	__func__.10310, 15
 __func__.10310:
 	.ascii	"FlashReadPages\000"
 	.section	.rodata.__func__.10327,"a",%progbits
-	.set	.LANCHOR110,. + 0
+	.set	.LANCHOR109,. + 0
 	.type	__func__.10327, %object
 	.size	__func__.10327, 15
 __func__.10327:
 	.ascii	"FlashProgPages\000"
-	.section	.rodata.__func__.8799,"a",%progbits
+	.section	.rodata.__func__.8802,"a",%progbits
 	.set	.LANCHOR138,. + 0
-	.type	__func__.8799, %object
-	.size	__func__.8799, 11
-__func__.8799:
+	.type	__func__.8802, %object
+	.size	__func__.8802, 11
+__func__.8802:
 	.ascii	"FtlMemInit\000"
-	.section	.rodata.__func__.8923,"a",%progbits
+	.section	.rodata.__func__.8926,"a",%progbits
 	.set	.LANCHOR170,. + 0
-	.type	__func__.8923, %object
-	.size	__func__.8923, 13
-__func__.8923:
+	.type	__func__.8926, %object
+	.size	__func__.8926, 13
+__func__.8926:
 	.ascii	"FtlProgPages\000"
-	.section	.rodata.__func__.8951,"a",%progbits
-	.set	.LANCHOR180,. + 0
-	.type	__func__.8951, %object
-	.size	__func__.8951, 9
-__func__.8951:
+	.section	.rodata.__func__.8954,"a",%progbits
+	.set	.LANCHOR178,. + 0
+	.type	__func__.8954, %object
+	.size	__func__.8954, 9
+__func__.8954:
 	.ascii	"FtlWrite\000"
-	.section	.rodata.__func__.9015,"a",%progbits
+	.section	.rodata.__func__.9018,"a",%progbits
 	.set	.LANCHOR139,. + 0
-	.type	__func__.9015, %object
-	.size	__func__.9015, 14
-__func__.9015:
+	.type	__func__.9018, %object
+	.size	__func__.9018, 14
+__func__.9018:
 	.ascii	"FtlBbt2Bitmap\000"
-	.section	.rodata.__func__.9058,"a",%progbits
-	.set	.LANCHOR165,. + 0
-	.type	__func__.9058, %object
-	.size	__func__.9058, 11
-__func__.9058:
+	.section	.rodata.__func__.9061,"a",%progbits
+	.set	.LANCHOR164,. + 0
+	.type	__func__.9061, %object
+	.size	__func__.9061, 11
+__func__.9061:
 	.ascii	"FtlLoadBbt\000"
-	.section	.rodata.__func__.9181,"a",%progbits
+	.section	.rodata.__func__.9178,"a",%progbits
 	.set	.LANCHOR49,. + 0
-	.type	__func__.9181, %object
-	.size	__func__.9181, 17
-__func__.9181:
+	.type	__func__.9178, %object
+	.size	__func__.9178, 17
+__func__.9178:
 	.ascii	"INSERT_FREE_LIST\000"
-	.section	.rodata.__func__.9186,"a",%progbits
+	.section	.rodata.__func__.9183,"a",%progbits
 	.set	.LANCHOR46,. + 0
-	.type	__func__.9186, %object
-	.size	__func__.9186, 17
-__func__.9186:
+	.type	__func__.9183, %object
+	.size	__func__.9183, 17
+__func__.9183:
 	.ascii	"INSERT_DATA_LIST\000"
-	.section	.rodata.__func__.9216,"a",%progbits
+	.section	.rodata.__func__.9214,"a",%progbits
 	.set	.LANCHOR50,. + 0
-	.type	__func__.9216, %object
-	.size	__func__.9216, 17
-__func__.9216:
+	.type	__func__.9214, %object
+	.size	__func__.9214, 17
+__func__.9214:
 	.ascii	"List_remove_node\000"
-	.section	.rodata.__func__.9248,"a",%progbits
+	.section	.rodata.__func__.9246,"a",%progbits
 	.set	.LANCHOR54,. + 0
-	.type	__func__.9248, %object
-	.size	__func__.9248, 22
-__func__.9248:
+	.type	__func__.9246, %object
+	.size	__func__.9246, 22
+__func__.9246:
 	.ascii	"List_update_data_list\000"
-	.section	.rodata.__func__.9257,"a",%progbits
+	.section	.rodata.__func__.9255,"a",%progbits
 	.set	.LANCHOR140,. + 0
-	.type	__func__.9257, %object
-	.size	__func__.9257, 16
-__func__.9257:
+	.type	__func__.9255, %object
+	.size	__func__.9255, 16
+__func__.9255:
 	.ascii	"load_l2p_region\000"
-	.section	.rodata.__func__.9289,"a",%progbits
-	.set	.LANCHOR55,. + 0
-	.type	__func__.9289, %object
-	.size	__func__.9289, 26
-__func__.9289:
+	.section	.rodata.__func__.9288,"a",%progbits
+	.set	.LANCHOR116,. + 0
+	.type	__func__.9288, %object
+	.size	__func__.9288, 26
+__func__.9288:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.section	.rodata.__func__.9300,"a",%progbits
+	.section	.rodata.__func__.9299,"a",%progbits
 	.set	.LANCHOR143,. + 0
-	.type	__func__.9300, %object
-	.size	__func__.9300, 15
-__func__.9300:
+	.type	__func__.9299, %object
+	.size	__func__.9299, 15
+__func__.9299:
 	.ascii	"ftl_map_blk_gc\000"
-	.section	.rodata.__func__.9314,"a",%progbits
+	.section	.rodata.__func__.9313,"a",%progbits
 	.set	.LANCHOR141,. + 0
-	.type	__func__.9314, %object
-	.size	__func__.9314, 31
-__func__.9314:
+	.type	__func__.9313, %object
+	.size	__func__.9313, 31
+__func__.9313:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.section	.rodata.__func__.9328,"a",%progbits
+	.section	.rodata.__func__.9327,"a",%progbits
 	.set	.LANCHOR142,. + 0
-	.type	__func__.9328, %object
-	.size	__func__.9328, 16
-__func__.9328:
+	.type	__func__.9327, %object
+	.size	__func__.9327, 16
+__func__.9327:
 	.ascii	"FtlMapWritePage\000"
-	.section	.rodata.__func__.9353,"a",%progbits
-	.set	.LANCHOR58,. + 0
-	.type	__func__.9353, %object
-	.size	__func__.9353, 22
-__func__.9353:
+	.section	.rodata.__func__.9352,"a",%progbits
+	.set	.LANCHOR57,. + 0
+	.type	__func__.9352, %object
+	.size	__func__.9352, 22
+__func__.9352:
 	.ascii	"select_l2p_ram_region\000"
-	.section	.rodata.__func__.9370,"a",%progbits
+	.section	.rodata.__func__.9369,"a",%progbits
 	.set	.LANCHOR145,. + 0
-	.type	__func__.9370, %object
-	.size	__func__.9370, 9
-__func__.9370:
+	.type	__func__.9369, %object
+	.size	__func__.9369, 9
+__func__.9369:
 	.ascii	"log2phys\000"
-	.section	.rodata.__func__.9443,"a",%progbits
-	.set	.LANCHOR167,. + 0
-	.type	__func__.9443, %object
-	.size	__func__.9443, 15
-__func__.9443:
+	.section	.rodata.__func__.9442,"a",%progbits
+	.set	.LANCHOR166,. + 0
+	.type	__func__.9442, %object
+	.size	__func__.9442, 15
+__func__.9442:
 	.ascii	"FtlVpcTblFlush\000"
-	.section	.rodata.__func__.9465,"a",%progbits
+	.section	.rodata.__func__.9464,"a",%progbits
 	.set	.LANCHOR148,. + 0
-	.type	__func__.9465, %object
-	.size	__func__.9465, 14
-__func__.9465:
+	.type	__func__.9464, %object
+	.size	__func__.9464, 14
+__func__.9464:
 	.ascii	"FtlScanSysBlk\000"
-	.section	.rodata.__func__.9522,"a",%progbits
-	.set	.LANCHOR181,. + 0
-	.type	__func__.9522, %object
-	.size	__func__.9522, 15
-__func__.9522:
+	.section	.rodata.__func__.9521,"a",%progbits
+	.set	.LANCHOR179,. + 0
+	.type	__func__.9521, %object
+	.size	__func__.9521, 15
+__func__.9521:
 	.ascii	"FtlLoadSysInfo\000"
-	.section	.rodata.__func__.9585,"a",%progbits
+	.section	.rodata.__func__.9584,"a",%progbits
 	.set	.LANCHOR146,. + 0
-	.type	__func__.9585, %object
-	.size	__func__.9585, 16
-__func__.9585:
+	.type	__func__.9584, %object
+	.size	__func__.9584, 16
+__func__.9584:
 	.ascii	"FtlReUsePrevPpa\000"
-	.section	.rodata.__func__.9619,"a",%progbits
-	.set	.LANCHOR161,. + 0
-	.type	__func__.9619, %object
-	.size	__func__.9619, 22
-__func__.9619:
+	.section	.rodata.__func__.9618,"a",%progbits
+	.set	.LANCHOR160,. + 0
+	.type	__func__.9618, %object
+	.size	__func__.9618, 22
+__func__.9618:
 	.ascii	"FtlRecoverySuperblock\000"
-	.section	.rodata.__func__.9676,"a",%progbits
-	.set	.LANCHOR61,. + 0
-	.type	__func__.9676, %object
-	.size	__func__.9676, 16
-__func__.9676:
+	.section	.rodata.__func__.9675,"a",%progbits
+	.set	.LANCHOR60,. + 0
+	.type	__func__.9675, %object
+	.size	__func__.9675, 16
+__func__.9675:
 	.ascii	"make_superblock\000"
-	.section	.rodata.__func__.9697,"a",%progbits
-	.set	.LANCHOR155,. + 0
-	.type	__func__.9697, %object
-	.size	__func__.9697, 18
-__func__.9697:
+	.section	.rodata.__func__.9696,"a",%progbits
+	.set	.LANCHOR154,. + 0
+	.type	__func__.9696, %object
+	.size	__func__.9696, 18
+__func__.9696:
 	.ascii	"SupperBlkListInit\000"
-	.section	.rodata.__func__.9722,"a",%progbits
+	.section	.rodata.__func__.9721,"a",%progbits
 	.set	.LANCHOR168,. + 0
-	.type	__func__.9722, %object
-	.size	__func__.9722, 21
-__func__.9722:
+	.type	__func__.9721, %object
+	.size	__func__.9721, 21
+__func__.9721:
 	.ascii	"FtlVpcCheckAndModify\000"
-	.section	.rodata.__func__.9738,"a",%progbits
-	.set	.LANCHOR156,. + 0
-	.type	__func__.9738, %object
-	.size	__func__.9738, 14
-__func__.9738:
+	.section	.rodata.__func__.9737,"a",%progbits
+	.set	.LANCHOR155,. + 0
+	.type	__func__.9737, %object
+	.size	__func__.9737, 14
+__func__.9737:
 	.ascii	"ftl_check_vpc\000"
 	.section	.rodata.__func__.9822,"a",%progbits
-	.set	.LANCHOR158,. + 0
+	.set	.LANCHOR157,. + 0
 	.type	__func__.9822, %object
 	.size	__func__.9822, 25
 __func__.9822:
@@ -23679,56 +23644,59 @@ __func__.9822:
 __func__.9843:
 	.ascii	"allocate_new_data_superblock\000"
 	.section	.rodata.__func__.9850,"a",%progbits
-	.set	.LANCHOR90,. + 0
+	.set	.LANCHOR88,. + 0
 	.type	__func__.9850, %object
 	.size	__func__.9850, 19
 __func__.9850:
 	.ascii	"get_new_active_ppa\000"
 	.section	.rodata.__func__.9863,"a",%progbits
-	.set	.LANCHOR159,. + 0
+	.set	.LANCHOR158,. + 0
 	.type	__func__.9863, %object
 	.size	__func__.9863, 16
 __func__.9863:
 	.ascii	"update_vpc_list\000"
 	.section	.rodata.__func__.9870,"a",%progbits
-	.set	.LANCHOR160,. + 0
+	.set	.LANCHOR159,. + 0
 	.type	__func__.9870, %object
 	.size	__func__.9870, 20
 __func__.9870:
 	.ascii	"decrement_vpc_count\000"
 	.section	.rodata.__func__.9940,"a",%progbits
-	.set	.LANCHOR173,. + 0
+	.set	.LANCHOR171,. + 0
 	.type	__func__.9940, %object
 	.size	__func__.9940, 19
 __func__.9940:
 	.ascii	"FtlGcFreeTempBlock\000"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",%progbits,1
-.LC98:
+.LC101:
 	.ascii	"decrement_vpc_count %x = %d\012\000"
 	.section	.rodata.ftl_check_vpc.str1.1,"aMS",%progbits,1
-.LC91:
+.LC94:
 	.ascii	"...%s enter...\012\000"
-.LC92:
+.LC95:
 	.ascii	"FtlCheckVpc2 %x = %x  %x\012\000"
-.LC93:
+.LC96:
 	.ascii	"free blk vpc error %x = %x  %x\012\000"
+	.section	.rodata.ftl_map_blk_alloc_new_blk.str1.1,"aMS",%progbits,1
+.LC84:
+	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d\012\000"
 	.section	.rodata.ftl_scan_all_data.str1.1,"aMS",%progbits,1
-.LC88:
+.LC91:
 	.ascii	"ftl_scan_all_data = %x\012\000"
-.LC89:
+.LC92:
 	.ascii	"scan lpa = %x ppa= %x\012\000"
-.LC90:
+.LC93:
 	.ascii	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\012"
 	.ascii	"\000"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",%progbits,1
-.LC83:
+.LC86:
 	.ascii	"region_id = %x phyAddr = %x\012\000"
-.LC84:
+.LC87:
 	.ascii	"spare:\000"
-.LC85:
+.LC88:
 	.ascii	"map_ppn:\000"
 	.section	.rodata.rk_ftl_garbage_collect.str1.1,"aMS",%progbits,1
-.LC104:
+.LC107:
 	.ascii	"SWL %x, FSB = %x vpc= %x,ec=%x th=%x\012\000"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",%progbits,1
 .LC75:
@@ -23741,7 +23709,7 @@ __func__.9940:
 	.ascii	"\012\000"
 	.section	.rodata.rknand_proc_ftlread.str1.1,"aMS",%progbits,1
 .LC70:
-	.ascii	"SFTL version: 5.0.43 20180116\000"
+	.ascii	"SFTL version: 5.0.44 20180713\000"
 .LC71:
 	.ascii	"%s\012\000"
 	.text
@@ -23773,16 +23741,16 @@ __func__.9940:
 	.file 31 "include/log.h"
 	.section	.debug_info,"",%progbits
 .Ldebug_info0:
-	.4byte	0x92b5
+	.4byte	0x92df
 	.2byte	0x4
 	.4byte	.Ldebug_abbrev0
 	.byte	0x4
 	.uleb128 0x1
-	.4byte	.LASF882
+	.4byte	.LASF880
 	.byte	0xc
-	.4byte	.LASF883
-	.4byte	.LASF884
-	.4byte	.Ldebug_ranges0+0x1c0
+	.4byte	.LASF881
+	.4byte	.LASF882
+	.4byte	.Ldebug_ranges0+0x208
 	.4byte	0
 	.4byte	.Ldebug_line0
 	.uleb128 0x2
@@ -27001,106 +26969,98 @@ __func__.9940:
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	req_gc_dst
-	.uleb128 0x26
-	.4byte	.LASF443
-	.byte	0x1b
-	.byte	0x4d
-	.4byte	0x19f9
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_req_cache
 	.uleb128 0xa
 	.4byte	0xdaf
-	.4byte	0x1a64
+	.4byte	0x1a53
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x1f
 	.byte	0
 	.uleb128 0x26
-	.4byte	.LASF444
+	.4byte	.LASF443
 	.byte	0x1b
-	.byte	0x4f
-	.4byte	0x1a54
+	.byte	0x4d
+	.4byte	0x1a43
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_plane_order_table
 	.uleb128 0x26
-	.4byte	.LASF445
+	.4byte	.LASF444
 	.byte	0x1b
-	.byte	0x51
+	.byte	0x4f
 	.4byte	0xff2
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_sys_data_buf
 	.uleb128 0x26
-	.4byte	.LASF446
+	.4byte	.LASF445
 	.byte	0x1b
-	.byte	0x52
+	.byte	0x50
 	.4byte	0xff2
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_sys_data_buf_1
 	.uleb128 0x26
-	.4byte	.LASF447
+	.4byte	.LASF446
 	.byte	0x1b
-	.byte	0x53
+	.byte	0x51
 	.4byte	0xff2
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_vendor_data_buf
 	.uleb128 0x26
-	.4byte	.LASF448
+	.4byte	.LASF447
 	.byte	0x1b
-	.byte	0x54
+	.byte	0x52
 	.4byte	0xff2
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_sys_spare_buf
 	.uleb128 0x26
-	.4byte	.LASF449
+	.4byte	.LASF448
 	.byte	0x1b
-	.byte	0x55
+	.byte	0x53
 	.4byte	0xff2
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_io_data_buf_0
 	.uleb128 0x26
-	.4byte	.LASF450
+	.4byte	.LASF449
 	.byte	0x1b
-	.byte	0x56
+	.byte	0x54
 	.4byte	0xff2
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_io_data_buf_1
 	.uleb128 0x26
-	.4byte	.LASF451
+	.4byte	.LASF450
 	.byte	0x1b
-	.byte	0x57
+	.byte	0x55
 	.4byte	0xff2
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_io_spare_buf
 	.uleb128 0x26
-	.4byte	.LASF452
+	.4byte	.LASF451
 	.byte	0x1b
-	.byte	0x58
+	.byte	0x56
 	.4byte	0xff2
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_gc_spare_buf
 	.uleb128 0x26
-	.4byte	.LASF453
+	.4byte	.LASF452
 	.byte	0x1b
-	.byte	0x59
+	.byte	0x57
 	.4byte	0xff2
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_gc_data_buf
 	.uleb128 0x26
-	.4byte	.LASF454
+	.4byte	.LASF453
 	.byte	0x1b
-	.byte	0x5a
-	.4byte	0x1b1f
+	.byte	0x58
+	.4byte	0x1b0e
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	gp_gc_page_buf_info
@@ -27108,26 +27068,26 @@ __func__.9940:
 	.byte	0x4
 	.4byte	0x16c7
 	.uleb128 0x26
-	.4byte	.LASF455
+	.4byte	.LASF454
 	.byte	0x1b
-	.byte	0x5b
+	.byte	0x59
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_gc_page_buf_num
 	.uleb128 0x26
-	.4byte	.LASF456
+	.4byte	.LASF455
 	.byte	0x1b
-	.byte	0x5c
+	.byte	0x5a
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_num_req
 	.uleb128 0x26
-	.4byte	.LASF457
+	.4byte	.LASF456
 	.byte	0x1b
-	.byte	0x5d
-	.4byte	0x1b58
+	.byte	0x5b
+	.4byte	0x1b47
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	gp_ect_tbl_info
@@ -27135,146 +27095,146 @@ __func__.9940:
 	.byte	0x4
 	.4byte	0x112c
 	.uleb128 0x26
-	.4byte	.LASF458
+	.4byte	.LASF457
 	.byte	0x1b
-	.byte	0x5e
+	.byte	0x5c
 	.4byte	0xdba
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_ect_tbl_info_size
 	.uleb128 0x26
-	.4byte	.LASF459
+	.4byte	.LASF458
 	.byte	0x1b
-	.byte	0x5f
+	.byte	0x5d
 	.4byte	0x10e9
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_erase_count_table
 	.uleb128 0x26
-	.4byte	.LASF460
+	.4byte	.LASF459
 	.byte	0x1b
-	.byte	0x61
+	.byte	0x5f
 	.4byte	0x10e9
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_swl_mul_table
 	.uleb128 0x26
-	.4byte	.LASF461
+	.4byte	.LASF460
 	.byte	0x1b
-	.byte	0x62
+	.byte	0x60
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_swl_count
 	.uleb128 0x26
-	.4byte	.LASF462
+	.4byte	.LASF461
 	.byte	0x1b
-	.byte	0x63
+	.byte	0x61
 	.4byte	0x10e9
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_valid_page_count_table
 	.uleb128 0x26
-	.4byte	.LASF463
+	.4byte	.LASF462
 	.byte	0x1b
-	.byte	0x64
+	.byte	0x62
 	.4byte	0x10e9
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_valid_page_count_check_table
 	.uleb128 0x26
-	.4byte	.LASF464
+	.4byte	.LASF463
 	.byte	0x1b
-	.byte	0x65
+	.byte	0x63
 	.4byte	0xff2
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_blk_mode_table
 	.uleb128 0x26
-	.4byte	.LASF465
+	.4byte	.LASF464
 	.byte	0x1b
-	.byte	0x67
+	.byte	0x65
 	.4byte	0x10e9
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_map_block_table
 	.uleb128 0x26
-	.4byte	.LASF466
+	.4byte	.LASF465
 	.byte	0x1b
-	.byte	0x68
+	.byte	0x66
 	.4byte	0x10e9
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_map_block_valid_page_count
 	.uleb128 0x26
-	.4byte	.LASF467
+	.4byte	.LASF466
 	.byte	0x1b
-	.byte	0x69
+	.byte	0x67
 	.4byte	0xff2
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_map_block_ver_table
 	.uleb128 0x26
-	.4byte	.LASF468
+	.4byte	.LASF467
 	.byte	0x1b
-	.byte	0x6a
+	.byte	0x68
 	.4byte	0xff2
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_map_region_ppn_table
 	.uleb128 0x26
-	.4byte	.LASF469
+	.4byte	.LASF468
 	.byte	0x1b
-	.byte	0x6b
+	.byte	0x69
 	.4byte	0xdba
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_map_block
 	.uleb128 0x26
-	.4byte	.LASF470
+	.4byte	.LASF469
 	.byte	0x1b
-	.byte	0x6d
+	.byte	0x6b
 	.4byte	0x10e9
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_vendor_block_table
 	.uleb128 0x26
-	.4byte	.LASF471
+	.4byte	.LASF470
 	.byte	0x1b
-	.byte	0x6e
+	.byte	0x6c
 	.4byte	0x10e9
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_vendor_block_valid_page_count
 	.uleb128 0x26
-	.4byte	.LASF472
+	.4byte	.LASF471
 	.byte	0x1b
-	.byte	0x6f
+	.byte	0x6d
 	.4byte	0xff2
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_vendor_block_ver_table
 	.uleb128 0x26
-	.4byte	.LASF473
+	.4byte	.LASF472
 	.byte	0x1b
-	.byte	0x70
+	.byte	0x6e
 	.4byte	0xff2
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_vendor_region_ppn_table
 	.uleb128 0x26
-	.4byte	.LASF474
+	.4byte	.LASF473
 	.byte	0x1b
-	.byte	0x71
+	.byte	0x6f
 	.4byte	0xdba
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_vendor_block
 	.uleb128 0x26
-	.4byte	.LASF475
+	.4byte	.LASF474
 	.byte	0x1b
-	.byte	0x73
-	.4byte	0x1c90
+	.byte	0x71
+	.4byte	0x1c7f
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_l2p_ram_map
@@ -27282,26 +27242,26 @@ __func__.9940:
 	.byte	0x4
 	.4byte	0x10ef
 	.uleb128 0x26
-	.4byte	.LASF476
+	.4byte	.LASF475
 	.byte	0x1b
-	.byte	0x74
+	.byte	0x72
 	.4byte	0xff2
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_l2p_map_buf
 	.uleb128 0x26
-	.4byte	.LASF477
+	.4byte	.LASF476
 	.byte	0x1b
-	.byte	0x75
+	.byte	0x73
 	.4byte	0xdba
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_l2p_last_update_region_id
 	.uleb128 0x26
-	.4byte	.LASF478
+	.4byte	.LASF477
 	.byte	0x1b
-	.byte	0x7c
-	.4byte	0x1cc9
+	.byte	0x7a
+	.4byte	0x1cb8
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_data_block_list_table
@@ -27309,82 +27269,82 @@ __func__.9940:
 	.byte	0x4
 	.4byte	0x1564
 	.uleb128 0x26
-	.4byte	.LASF479
+	.4byte	.LASF478
 	.byte	0x1b
-	.byte	0x7d
-	.4byte	0x1cc9
+	.byte	0x7b
+	.4byte	0x1cb8
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_free_data_block_list_head
 	.uleb128 0x26
-	.4byte	.LASF480
+	.4byte	.LASF479
 	.byte	0x1b
-	.byte	0x7f
-	.4byte	0x1cc9
+	.byte	0x7d
+	.4byte	0x1cb8
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_data_block_list_head
 	.uleb128 0x26
-	.4byte	.LASF481
+	.4byte	.LASF480
 	.byte	0x1b
-	.byte	0x80
-	.4byte	0x1cc9
+	.byte	0x7e
+	.4byte	0x1cb8
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_data_block_list_tail
 	.uleb128 0x26
-	.4byte	.LASF482
+	.4byte	.LASF481
 	.byte	0x1b
-	.byte	0x81
+	.byte	0x7f
 	.4byte	0xdba
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_num_free_superblocks
 	.uleb128 0x26
-	.4byte	.LASF483
+	.4byte	.LASF482
 	.byte	0x1b
-	.byte	0x82
+	.byte	0x80
 	.4byte	0xdba
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_num_data_superblocks
 	.uleb128 0x26
-	.4byte	.LASF484
+	.4byte	.LASF483
 	.byte	0x1b
-	.byte	0x83
+	.byte	0x81
 	.4byte	0x15f0
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_active_superblock
 	.uleb128 0x26
-	.4byte	.LASF485
+	.4byte	.LASF484
 	.byte	0x1b
-	.byte	0x84
+	.byte	0x82
 	.4byte	0x15f0
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_buffer_superblock
 	.uleb128 0x26
-	.4byte	.LASF486
+	.4byte	.LASF485
 	.byte	0x1b
-	.byte	0x85
+	.byte	0x83
 	.4byte	0x15f0
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_temp_superblock
 	.uleb128 0x26
-	.4byte	.LASF487
+	.4byte	.LASF486
 	.byte	0x1b
-	.byte	0x86
+	.byte	0x84
 	.4byte	0x15f0
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_superblock
 	.uleb128 0x26
-	.4byte	.LASF488
+	.4byte	.LASF487
 	.byte	0x1b
-	.byte	0x87
-	.4byte	0x1d79
+	.byte	0x85
+	.4byte	0x1d68
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	gp_last_act_superblock
@@ -27392,26 +27352,26 @@ __func__.9940:
 	.byte	0x4
 	.4byte	0x15f0
 	.uleb128 0x26
-	.4byte	.LASF489
+	.4byte	.LASF488
 	.byte	0x1b
-	.byte	0x88
+	.byte	0x86
 	.4byte	0x1311
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_sys_save_data
 	.uleb128 0x26
-	.4byte	.LASF490
+	.4byte	.LASF489
 	.byte	0x1b
-	.byte	0x89
+	.byte	0x87
 	.4byte	0x140e
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_sys_ext_data
 	.uleb128 0x26
-	.4byte	.LASF491
+	.4byte	.LASF490
 	.byte	0x1b
-	.byte	0x8b
-	.4byte	0x1db2
+	.byte	0x89
+	.4byte	0x1da1
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_gc_page_info
@@ -27419,368 +27379,368 @@ __func__.9940:
 	.byte	0x4
 	.4byte	0x1692
 	.uleb128 0x26
-	.4byte	.LASF492
+	.4byte	.LASF491
 	.byte	0x1b
-	.byte	0x8c
+	.byte	0x8a
 	.4byte	0x10e9
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_gc_blk_tbl
 	.uleb128 0x26
-	.4byte	.LASF493
+	.4byte	.LASF492
 	.byte	0x1b
-	.byte	0x8d
+	.byte	0x8b
 	.4byte	0xdba
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_blk_num
 	.uleb128 0x26
-	.4byte	.LASF494
+	.4byte	.LASF493
 	.byte	0x1b
-	.byte	0x8e
+	.byte	0x8c
 	.4byte	0xdba
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_page_offset
 	.uleb128 0x26
-	.4byte	.LASF495
+	.4byte	.LASF494
 	.byte	0x1b
-	.byte	0x8f
+	.byte	0x8d
 	.4byte	0xdba
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_cur_blk_valid_pages
 	.uleb128 0x26
-	.4byte	.LASF496
+	.4byte	.LASF495
 	.byte	0x1b
-	.byte	0x90
+	.byte	0x8e
 	.4byte	0xdba
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_cur_blk_max_valid_pages
 	.uleb128 0x26
-	.4byte	.LASF497
+	.4byte	.LASF496
 	.byte	0x1b
-	.byte	0x91
+	.byte	0x8f
 	.4byte	0xdba
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_next_blk
 	.uleb128 0x26
-	.4byte	.LASF498
+	.4byte	.LASF497
 	.byte	0x1b
-	.byte	0x92
+	.byte	0x90
 	.4byte	0xdba
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_next_blk_1
 	.uleb128 0x26
-	.4byte	.LASF499
+	.4byte	.LASF498
 	.byte	0x1b
-	.byte	0x93
+	.byte	0x91
 	.4byte	0xdba
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_bad_block_temp_num
 	.uleb128 0x26
-	.4byte	.LASF500
+	.4byte	.LASF499
 	.byte	0x1b
-	.byte	0x94
+	.byte	0x92
 	.4byte	0xdba
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_bad_block_gc_index
 	.uleb128 0xa
 	.4byte	0xdba
-	.4byte	0x1e61
+	.4byte	0x1e50
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x10
 	.byte	0
 	.uleb128 0x26
-	.4byte	.LASF501
+	.4byte	.LASF500
 	.byte	0x1b
-	.byte	0x95
-	.4byte	0x1e51
+	.byte	0x93
+	.4byte	0x1e40
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_bad_block_temp_tbl
 	.uleb128 0x26
-	.4byte	.LASF502
+	.4byte	.LASF501
 	.byte	0x1b
-	.byte	0x97
+	.byte	0x95
 	.4byte	0xdba
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_free_blk_threshold
 	.uleb128 0x26
-	.4byte	.LASF503
+	.4byte	.LASF502
 	.byte	0x1b
-	.byte	0x98
+	.byte	0x96
 	.4byte	0xdba
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_merge_free_blk_threshold
 	.uleb128 0x26
-	.4byte	.LASF504
+	.4byte	.LASF503
 	.byte	0x1b
-	.byte	0x99
+	.byte	0x97
 	.4byte	0xdba
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_blk_index
 	.uleb128 0x26
-	.4byte	.LASF505
+	.4byte	.LASF504
 	.byte	0x1b
-	.byte	0x9b
+	.byte	0x99
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_gc_page_count
 	.uleb128 0x26
-	.4byte	.LASF506
+	.4byte	.LASF505
 	.byte	0x1b
-	.byte	0x9c
+	.byte	0x9a
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_write_page_count
 	.uleb128 0x26
-	.4byte	.LASF507
+	.4byte	.LASF506
 	.byte	0x1b
-	.byte	0x9d
+	.byte	0x9b
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_write_sector
 	.uleb128 0x26
-	.4byte	.LASF508
+	.4byte	.LASF507
 	.byte	0x1b
-	.byte	0x9e
+	.byte	0x9c
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_read_sector
 	.uleb128 0x26
-	.4byte	.LASF509
+	.4byte	.LASF508
 	.byte	0x1b
-	.byte	0xa0
+	.byte	0x9e
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_discard_page_count
 	.uleb128 0x26
-	.4byte	.LASF510
+	.4byte	.LASF509
 	.byte	0x1b
-	.byte	0xa1
+	.byte	0x9f
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_read_page_count
 	.uleb128 0x26
-	.4byte	.LASF511
+	.4byte	.LASF510
 	.byte	0x1b
-	.byte	0xa2
+	.byte	0xa0
 	.4byte	0xdba
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_tmp_data_superblock_id
 	.uleb128 0x26
-	.4byte	.LASF512
+	.4byte	.LASF511
 	.byte	0x1b
-	.byte	0xa3
+	.byte	0xa1
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_cache_write_count
 	.uleb128 0x26
-	.4byte	.LASF513
+	.4byte	.LASF512
 	.byte	0x1b
-	.byte	0xa4
+	.byte	0xa2
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_l2p_write_count
 	.uleb128 0x26
-	.4byte	.LASF514
+	.4byte	.LASF513
 	.byte	0x1b
-	.byte	0xa6
+	.byte	0xa4
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_mlc_erase_count
 	.uleb128 0x26
-	.4byte	.LASF515
+	.4byte	.LASF514
 	.byte	0x1b
-	.byte	0xa7
+	.byte	0xa5
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_avg_erase_count
 	.uleb128 0x26
-	.4byte	.LASF516
+	.4byte	.LASF515
 	.byte	0x1b
-	.byte	0xa8
+	.byte	0xa6
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_min_erase_count
 	.uleb128 0x26
-	.4byte	.LASF517
+	.4byte	.LASF516
 	.byte	0x1b
-	.byte	0xa9
+	.byte	0xa7
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_slc_erase_count
 	.uleb128 0x26
-	.4byte	.LASF518
+	.4byte	.LASF517
 	.byte	0x1b
-	.byte	0xaa
+	.byte	0xa8
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_sys_slc_erase_count
 	.uleb128 0x26
-	.4byte	.LASF519
+	.4byte	.LASF518
 	.byte	0x1b
-	.byte	0xab
+	.byte	0xa9
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_max_erase_count
 	.uleb128 0x26
-	.4byte	.LASF520
+	.4byte	.LASF519
 	.byte	0x1b
-	.byte	0xac
+	.byte	0xaa
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_in_gc_progress
 	.uleb128 0x26
-	.4byte	.LASF521
+	.4byte	.LASF520
 	.byte	0x1b
-	.byte	0xad
+	.byte	0xab
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_in_swl_replace
 	.uleb128 0x26
-	.4byte	.LASF522
+	.4byte	.LASF521
 	.byte	0x1b
-	.byte	0xae
+	.byte	0xac
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_ftl_nand_free_count
 	.uleb128 0x26
-	.4byte	.LASF523
+	.4byte	.LASF522
 	.byte	0x1b
-	.byte	0xaf
+	.byte	0xad
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_head_data_block
 	.uleb128 0x26
-	.4byte	.LASF524
+	.4byte	.LASF523
 	.byte	0x1b
-	.byte	0xb0
+	.byte	0xae
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_head_data_block_count
 	.uleb128 0x26
-	.4byte	.LASF525
+	.4byte	.LASF524
 	.byte	0x1b
-	.byte	0xb1
+	.byte	0xaf
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_skip_write_count
 	.uleb128 0x26
-	.4byte	.LASF526
+	.4byte	.LASF525
 	.byte	0x1b
-	.byte	0xb2
+	.byte	0xb0
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_cur_erase_blk
 	.uleb128 0x26
-	.4byte	.LASF527
+	.4byte	.LASF526
 	.byte	0x1b
-	.byte	0xb4
+	.byte	0xb2
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_recovery_page_num
 	.uleb128 0x26
-	.4byte	.LASF528
+	.4byte	.LASF527
 	.byte	0x1b
-	.byte	0xb5
+	.byte	0xb3
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_recovery_page_min_ver
 	.uleb128 0xa
 	.4byte	0xdc5
-	.4byte	0x204d
+	.4byte	0x203c
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x1f
 	.byte	0
 	.uleb128 0x26
-	.4byte	.LASF529
+	.4byte	.LASF528
 	.byte	0x1b
-	.byte	0xb6
-	.4byte	0x203d
+	.byte	0xb4
+	.4byte	0x202c
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_recovery_ppa_tbl
 	.uleb128 0x26
-	.4byte	.LASF530
+	.4byte	.LASF529
 	.byte	0x1b
-	.byte	0xb7
+	.byte	0xb5
 	.4byte	0xdba
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_mlc_erase_count_value
 	.uleb128 0x26
-	.4byte	.LASF531
+	.4byte	.LASF530
 	.byte	0x1b
-	.byte	0xb8
+	.byte	0xb6
 	.4byte	0xdba
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_power_lost_recovery_flag
 	.uleb128 0x4
-	.4byte	.LASF532
+	.4byte	.LASF531
 	.byte	0x18
 	.byte	0x14
 	.4byte	0xe35
 	.uleb128 0x4
-	.4byte	.LASF533
+	.4byte	.LASF532
 	.byte	0x18
 	.byte	0x15
 	.4byte	0xe35
 	.uleb128 0x4
-	.4byte	.LASF534
+	.4byte	.LASF533
 	.byte	0x18
 	.byte	0x16
 	.4byte	0xed7
 	.uleb128 0xa
 	.4byte	0xb5
-	.4byte	0x20b2
+	.4byte	0x20a1
 	.uleb128 0x15
 	.4byte	0xd6
 	.2byte	0x3ff
 	.byte	0
 	.uleb128 0x4
-	.4byte	.LASF535
+	.4byte	.LASF534
 	.byte	0x18
 	.byte	0x17
-	.4byte	0x20a1
+	.4byte	0x2090
 	.uleb128 0x26
-	.4byte	.LASF536
+	.4byte	.LASF535
 	.byte	0x3
 	.byte	0x6
 	.4byte	0xdc5
@@ -27788,7 +27748,7 @@ __func__.9940:
 	.byte	0x3
 	.4byte	DeviceCapacity
 	.uleb128 0x26
-	.4byte	.LASF537
+	.4byte	.LASF536
 	.byte	0x3
 	.byte	0x7
 	.4byte	0xdc5
@@ -27796,74 +27756,74 @@ __func__.9940:
 	.byte	0x3
 	.4byte	gFtlInitStatus
 	.uleb128 0x4
-	.4byte	.LASF538
+	.4byte	.LASF537
 	.byte	0x3
 	.byte	0x6d
 	.4byte	0xdc5
 	.uleb128 0x4
-	.4byte	.LASF539
+	.4byte	.LASF538
 	.byte	0x3
 	.byte	0x6e
 	.4byte	0xdc5
 	.uleb128 0x4
-	.4byte	.LASF540
+	.4byte	.LASF539
 	.byte	0x3
 	.byte	0x6f
 	.4byte	0xdc5
 	.uleb128 0x4
-	.4byte	.LASF541
+	.4byte	.LASF540
 	.byte	0x3
 	.byte	0x70
 	.4byte	0xdc5
 	.uleb128 0x27
-	.4byte	.LASF542
+	.4byte	.LASF541
 	.byte	0x3
-	.2byte	0x3c0
+	.2byte	0x3bc
 	.4byte	0x50
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	power_up_flag
 	.uleb128 0x28
-	.4byte	.LASF546
+	.4byte	.LASF545
 	.byte	0x3
-	.2byte	0x483
+	.2byte	0x45f
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	gc_discard_updated
 	.uleb128 0x27
-	.4byte	.LASF543
+	.4byte	.LASF542
 	.byte	0x2
-	.2byte	0x35b
+	.2byte	0x38c
 	.4byte	0xdba
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_ect_tbl_power_up_flush
 	.uleb128 0x27
-	.4byte	.LASF544
+	.4byte	.LASF543
 	.byte	0x2
-	.2byte	0x370
+	.2byte	0x3a1
 	.4byte	0xdba
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	FtlUpdateVaildLpnCount
 	.uleb128 0xa
 	.4byte	0xdba
-	.4byte	0x2164
+	.4byte	0x2153
 	.uleb128 0x15
 	.4byte	0xd6
 	.2byte	0x1fff
 	.byte	0
 	.uleb128 0x27
-	.4byte	.LASF545
+	.4byte	.LASF544
 	.byte	0x2
-	.2byte	0x8ad
-	.4byte	0x2153
+	.2byte	0x8df
+	.4byte	0x2142
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	check_vpc_table
 	.uleb128 0x29
-	.4byte	.LASF547
+	.4byte	.LASF546
 	.byte	0x5
 	.byte	0x6d
 	.4byte	0xdba
@@ -27871,7 +27831,7 @@ __func__.9940:
 	.byte	0x3
 	.4byte	ftl_gc_temp_block_bops_scan_page_addr
 	.uleb128 0x27
-	.4byte	.LASF548
+	.4byte	.LASF547
 	.byte	0x5
 	.2byte	0x1d4
 	.4byte	0xdba
@@ -27879,26 +27839,26 @@ __func__.9940:
 	.byte	0x3
 	.4byte	gc_ink_free_return_value
 	.uleb128 0xc
-	.4byte	.LASF549
+	.4byte	.LASF548
 	.byte	0x1c
 	.2byte	0x3ba
 	.4byte	0x107
 	.uleb128 0xc
-	.4byte	.LASF550
+	.4byte	.LASF549
 	.byte	0x1c
 	.2byte	0x3bb
 	.4byte	0x107
 	.uleb128 0xc
-	.4byte	.LASF551
+	.4byte	.LASF550
 	.byte	0x1c
 	.2byte	0x3bc
 	.4byte	0x107
 	.uleb128 0xf
-	.4byte	.LASF552
+	.4byte	.LASF551
 	.byte	0x4
 	.byte	0x6
 	.byte	0xc
-	.4byte	0x21d6
+	.4byte	0x21c5
 	.uleb128 0x16
 	.ascii	"pid\000"
 	.byte	0x6
@@ -27907,37 +27867,37 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x4
-	.4byte	.LASF553
+	.4byte	.LASF552
 	.byte	0x6
 	.byte	0x10
-	.4byte	0x21e1
+	.4byte	0x21d0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x21bd
+	.4byte	0x21ac
 	.uleb128 0x2a
-	.4byte	0x208b
+	.4byte	0x207a
 	.byte	0x1
 	.byte	0x10
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_nand_phy_info
 	.uleb128 0x2a
-	.4byte	0x2096
+	.4byte	0x2085
 	.byte	0x1
 	.byte	0x11
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_nand_ops
 	.uleb128 0x29
-	.4byte	.LASF554
+	.4byte	.LASF553
 	.byte	0x1
 	.byte	0x13
-	.4byte	0x20a1
+	.4byte	0x2090
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	check_buf
 	.uleb128 0x2a
-	.4byte	0x20b2
+	.4byte	0x20a1
 	.byte	0x1
 	.byte	0x14
 	.uleb128 0x5
@@ -27945,21 +27905,21 @@ __func__.9940:
 	.4byte	ftl_temp_buf
 	.uleb128 0xa
 	.4byte	0xb5
-	.4byte	0x222f
+	.4byte	0x221e
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x7f
 	.byte	0
 	.uleb128 0x29
-	.4byte	.LASF555
+	.4byte	.LASF554
 	.byte	0x1
 	.byte	0x15
-	.4byte	0x221f
+	.4byte	0x220e
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	check_spare_buf
 	.uleb128 0x2b
-	.4byte	.LASF558
+	.4byte	.LASF557
 	.byte	0x1
 	.byte	0xfb
 	.4byte	0x50
@@ -27967,28 +27927,28 @@ __func__.9940:
 	.4byte	.LFE351-.LFB351
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x22a6
+	.4byte	0x2295
 	.uleb128 0x2c
-	.4byte	.LASF556
+	.4byte	.LASF555
 	.byte	0x1
 	.byte	0xfb
 	.4byte	0x128
-	.4byte	.LLST455
+	.4byte	.LLST454
 	.uleb128 0x2c
-	.4byte	.LASF557
+	.4byte	.LASF556
 	.byte	0x1
 	.byte	0xfb
 	.4byte	0x128
-	.4byte	.LLST456
+	.4byte	.LLST455
 	.uleb128 0x2c
 	.4byte	.LASF325
 	.byte	0x1
 	.byte	0xfb
 	.4byte	0x7b
-	.4byte	.LLST457
+	.4byte	.LLST456
 	.uleb128 0x2d
-	.4byte	.LVL2072
-	.4byte	0x9268
+	.4byte	.LVL2061
+	.4byte	0x9292
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28013,7 +27973,7 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF559
+	.4byte	.LASF558
 	.byte	0x1
 	.byte	0xf6
 	.4byte	0x128
@@ -28021,15 +27981,15 @@ __func__.9940:
 	.4byte	.LFE350-.LFB350
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x230c
+	.4byte	0x22fb
 	.uleb128 0x2c
-	.4byte	.LASF560
+	.4byte	.LASF559
 	.byte	0x1
 	.byte	0xf6
 	.4byte	0x128
 	.4byte	.LLST287
 	.uleb128 0x2c
-	.4byte	.LASF561
+	.4byte	.LASF560
 	.byte	0x1
 	.byte	0xf6
 	.4byte	0x16b
@@ -28041,8 +28001,8 @@ __func__.9940:
 	.4byte	0x7b
 	.4byte	.LLST289
 	.uleb128 0x2d
-	.4byte	.LVL1162
-	.4byte	0x9273
+	.4byte	.LVL1170
+	.4byte	0x929d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28067,7 +28027,7 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF562
+	.4byte	.LASF561
 	.byte	0x1
 	.byte	0xf1
 	.4byte	0x128
@@ -28075,7 +28035,7 @@ __func__.9940:
 	.4byte	.LFE349-.LFB349
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x236c
+	.4byte	0x235b
 	.uleb128 0x2f
 	.ascii	"s\000"
 	.byte	0x1
@@ -28095,8 +28055,8 @@ __func__.9940:
 	.4byte	0x7b
 	.4byte	.LLST193
 	.uleb128 0x2d
-	.4byte	.LVL698
-	.4byte	0x927f
+	.4byte	.LVL706
+	.4byte	0x92a9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28121,7 +28081,7 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF563
+	.4byte	.LASF562
 	.byte	0x1
 	.byte	0xdf
 	.4byte	0xaa
@@ -28129,9 +28089,9 @@ __func__.9940:
 	.4byte	.LFE348-.LFB348
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2410
+	.4byte	0x23ff
 	.uleb128 0x2c
-	.4byte	.LASF564
+	.4byte	.LASF563
 	.byte	0x1
 	.byte	0xdf
 	.4byte	0xf28
@@ -28154,9 +28114,9 @@ __func__.9940:
 	.byte	0xe1
 	.4byte	0x9f
 	.uleb128 0x32
-	.4byte	.LVL1154
-	.4byte	0x230c
-	.4byte	0x23dc
+	.4byte	.LVL1162
+	.4byte	0x22fb
+	.4byte	0x23cb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28177,8 +28137,8 @@ __func__.9940:
 	.2byte	0x100
 	.byte	0
 	.uleb128 0x33
-	.4byte	.LVL1155
-	.4byte	0x23f2
+	.4byte	.LVL1163
+	.4byte	0x23e1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28193,8 +28153,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1158
-	.4byte	0x230c
+	.4byte	.LVL1166
+	.4byte	0x22fb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28216,14 +28176,14 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x35
-	.4byte	.LASF589
+	.4byte	.LASF588
 	.byte	0x1
 	.byte	0xc4
 	.4byte	0xdd0
 	.byte	0x1
-	.4byte	0x2454
+	.4byte	0x2443
 	.uleb128 0x36
-	.4byte	.LASF577
+	.4byte	.LASF576
 	.byte	0x1
 	.byte	0xc4
 	.4byte	0xdba
@@ -28233,10 +28193,10 @@ __func__.9940:
 	.byte	0xc6
 	.4byte	0xdd0
 	.uleb128 0x37
-	.4byte	.LASF565
+	.4byte	.LASF564
 	.byte	0x1
 	.byte	0xc7
-	.4byte	0x2454
+	.4byte	0x2443
 	.uleb128 0x31
 	.ascii	"req\000"
 	.byte	0x1
@@ -28249,13 +28209,13 @@ __func__.9940:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xdc5
-	.4byte	0x2464
+	.4byte	0x2453
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0xf
 	.byte	0
 	.uleb128 0x39
-	.4byte	.LASF566
+	.4byte	.LASF565
 	.byte	0x1
 	.byte	0xae
 	.4byte	0xaa
@@ -28263,25 +28223,25 @@ __func__.9940:
 	.4byte	.LFE346-.LFB346
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x251a
+	.4byte	0x2509
 	.uleb128 0x2c
-	.4byte	.LASF567
+	.4byte	.LASF566
 	.byte	0x1
 	.byte	0xae
 	.4byte	0x128
-	.4byte	.LLST172
+	.4byte	.LLST164
 	.uleb128 0x2c
-	.4byte	.LASF568
+	.4byte	.LASF567
 	.byte	0x1
 	.byte	0xae
 	.4byte	0xb5
-	.4byte	.LLST173
+	.4byte	.LLST165
 	.uleb128 0x2c
-	.4byte	.LASF569
+	.4byte	.LASF568
 	.byte	0x1
 	.byte	0xae
 	.4byte	0xb5
-	.4byte	.LLST174
+	.4byte	.LLST166
 	.uleb128 0x3a
 	.ascii	"i\000"
 	.byte	0x1
@@ -28302,9 +28262,9 @@ __func__.9940:
 	.byte	0x1
 	.byte	0xb0
 	.4byte	0xb5
-	.4byte	.LLST175
+	.4byte	.LLST167
 	.uleb128 0x29
-	.4byte	.LASF570
+	.4byte	.LASF569
 	.byte	0x1
 	.byte	0xb0
 	.4byte	0xb5
@@ -28316,17 +28276,17 @@ __func__.9940:
 	.byte	0x1
 	.byte	0xb1
 	.4byte	0x19f9
-	.4byte	.LLST176
+	.4byte	.LLST168
 	.uleb128 0x29
-	.4byte	.LASF571
+	.4byte	.LASF570
 	.byte	0x1
 	.byte	0xb2
 	.4byte	0xb5
 	.uleb128 0x1
 	.byte	0x58
 	.uleb128 0x34
-	.4byte	.LVL630
-	.4byte	0x842f
+	.4byte	.LVL620
+	.4byte	0x83a0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -28340,14 +28300,14 @@ __func__.9940:
 	.byte	0x7d
 	.sleb128 0
 	.uleb128 0x3c
-	.4byte	0x27c7
+	.4byte	0x27b6
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 -4
 	.byte	0
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF572
+	.4byte	.LASF571
 	.byte	0x1
 	.byte	0x72
 	.4byte	0xaa
@@ -28355,37 +28315,37 @@ __func__.9940:
 	.4byte	.LFE345-.LFB345
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x26a4
+	.4byte	0x2693
 	.uleb128 0x2c
-	.4byte	.LASF567
+	.4byte	.LASF566
 	.byte	0x1
 	.byte	0x72
 	.4byte	0x128
-	.4byte	.LLST164
+	.4byte	.LLST156
 	.uleb128 0x2c
-	.4byte	.LASF569
+	.4byte	.LASF568
 	.byte	0x1
 	.byte	0x72
 	.4byte	0xb5
-	.4byte	.LLST165
+	.4byte	.LLST157
 	.uleb128 0x2c
-	.4byte	.LASF568
+	.4byte	.LASF567
 	.byte	0x1
 	.byte	0x72
 	.4byte	0xb5
-	.4byte	.LLST166
+	.4byte	.LLST158
 	.uleb128 0x2c
-	.4byte	.LASF573
+	.4byte	.LASF572
 	.byte	0x1
 	.byte	0x72
 	.4byte	0xb5
-	.4byte	.LLST167
+	.4byte	.LLST159
 	.uleb128 0x3b
 	.ascii	"i\000"
 	.byte	0x1
 	.byte	0x74
 	.4byte	0xb5
-	.4byte	.LLST168
+	.4byte	.LLST160
 	.uleb128 0x3a
 	.ascii	"cs\000"
 	.byte	0x1
@@ -28399,9 +28359,9 @@ __func__.9940:
 	.byte	0x1
 	.byte	0x74
 	.4byte	0xb5
-	.4byte	.LLST169
+	.4byte	.LLST161
 	.uleb128 0x29
-	.4byte	.LASF570
+	.4byte	.LASF569
 	.byte	0x1
 	.byte	0x74
 	.4byte	0xb5
@@ -28409,28 +28369,28 @@ __func__.9940:
 	.byte	0x91
 	.sleb128 -56
 	.uleb128 0x30
-	.4byte	.LASF571
+	.4byte	.LASF570
 	.byte	0x1
 	.byte	0x75
 	.4byte	0xb5
-	.4byte	.LLST170
+	.4byte	.LLST162
 	.uleb128 0x3b
 	.ascii	"req\000"
 	.byte	0x1
 	.byte	0x76
 	.4byte	0x19f9
-	.4byte	.LLST171
+	.4byte	.LLST163
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x26b4
+	.4byte	.LASF573
+	.4byte	0x26a3
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.10327
 	.uleb128 0x3e
-	.4byte	.Ldebug_ranges0+0x88
-	.4byte	0x264b
+	.4byte	.Ldebug_ranges0+0xa0
+	.4byte	0x263a
 	.uleb128 0x29
-	.4byte	.LASF575
+	.4byte	.LASF574
 	.byte	0x1
 	.byte	0x91
 	.4byte	0xde6
@@ -28438,9 +28398,9 @@ __func__.9940:
 	.byte	0x91
 	.sleb128 -52
 	.uleb128 0x32
-	.4byte	.LVL618
-	.4byte	0x26b9
-	.4byte	0x2609
+	.4byte	.LVL608
+	.4byte	0x26a8
+	.4byte	0x25f8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28460,9 +28420,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL619
-	.4byte	0x928b
-	.4byte	0x2620
+	.4byte	.LVL609
+	.4byte	0x92b5
+	.4byte	0x260f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28471,9 +28431,9 @@ __func__.9940:
 	.4byte	.LC79
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL620
-	.4byte	0x928b
-	.4byte	0x2637
+	.4byte	.LVL610
+	.4byte	0x92b5
+	.4byte	0x2626
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28482,8 +28442,8 @@ __func__.9940:
 	.4byte	.LC80
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL621
-	.4byte	0x928b
+	.4byte	.LVL611
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28493,9 +28453,9 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL611
-	.4byte	0x928b
-	.4byte	0x2671
+	.4byte	.LVL601
+	.4byte	0x92b5
+	.4byte	0x2660
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28507,7 +28467,7 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR110
+	.4byte	.LANCHOR109
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
@@ -28516,9 +28476,9 @@ __func__.9940:
 	.byte	0x7a
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL612
-	.4byte	0x842f
-	.4byte	0x2693
+	.4byte	.LVL602
+	.4byte	0x83a0
+	.4byte	0x2682
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -28532,33 +28492,33 @@ __func__.9940:
 	.byte	0x91
 	.sleb128 -60
 	.uleb128 0x3c
-	.4byte	0x27c7
+	.4byte	0x27b6
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
 	.byte	0
 	.uleb128 0x3f
-	.4byte	.LVL613
+	.4byte	.LVL603
 	.uleb128 0x2
 	.byte	0x7b
 	.sleb128 0
 	.uleb128 0x3f
-	.4byte	.LVL615
+	.4byte	.LVL605
 	.uleb128 0x2
 	.byte	0x7b
 	.sleb128 0
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x26b4
+	.4byte	0x26a3
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0xe
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x26a4
+	.4byte	0x2693
 	.uleb128 0x2b
-	.4byte	.LASF576
+	.4byte	.LASF575
 	.byte	0x1
 	.byte	0x54
 	.4byte	0xaa
@@ -28566,25 +28526,25 @@ __func__.9940:
 	.4byte	.LFE344-.LFB344
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x27b7
+	.4byte	0x27a6
 	.uleb128 0x2c
-	.4byte	.LASF567
+	.4byte	.LASF566
 	.byte	0x1
 	.byte	0x54
 	.4byte	0x128
-	.4byte	.LLST153
+	.4byte	.LLST145
 	.uleb128 0x2c
-	.4byte	.LASF569
+	.4byte	.LASF568
 	.byte	0x1
 	.byte	0x54
 	.4byte	0xb5
-	.4byte	.LLST154
+	.4byte	.LLST146
 	.uleb128 0x2c
-	.4byte	.LASF568
+	.4byte	.LASF567
 	.byte	0x1
 	.byte	0x54
 	.4byte	0xb5
-	.4byte	.LLST155
+	.4byte	.LLST147
 	.uleb128 0x3a
 	.ascii	"i\000"
 	.byte	0x1
@@ -28605,9 +28565,9 @@ __func__.9940:
 	.byte	0x1
 	.byte	0x56
 	.4byte	0xb5
-	.4byte	.LLST156
+	.4byte	.LLST148
 	.uleb128 0x29
-	.4byte	.LASF570
+	.4byte	.LASF569
 	.byte	0x1
 	.byte	0x56
 	.4byte	0xb5
@@ -28615,7 +28575,7 @@ __func__.9940:
 	.byte	0x91
 	.sleb128 -36
 	.uleb128 0x29
-	.4byte	.LASF571
+	.4byte	.LASF570
 	.byte	0x1
 	.byte	0x57
 	.4byte	0xb5
@@ -28633,15 +28593,15 @@ __func__.9940:
 	.byte	0x50
 	.byte	0x9f
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x26b4
+	.4byte	.LASF573
+	.4byte	0x26a3
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.10310
 	.uleb128 0x32
-	.4byte	.LVL568
-	.4byte	0x928b
-	.4byte	0x2784
+	.4byte	.LVL558
+	.4byte	0x92b5
+	.4byte	0x2773
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28653,7 +28613,7 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR106
+	.4byte	.LANCHOR104
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
@@ -28662,9 +28622,9 @@ __func__.9940:
 	.byte	0x5c
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL569
-	.4byte	0x842f
-	.4byte	0x27a6
+	.4byte	.LVL559
+	.4byte	0x83a0
+	.4byte	0x2795
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -28678,51 +28638,51 @@ __func__.9940:
 	.byte	0x91
 	.sleb128 -40
 	.uleb128 0x3c
-	.4byte	0x27c7
+	.4byte	0x27b6
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
 	.byte	0
 	.uleb128 0x3f
-	.4byte	.LVL570
+	.4byte	.LVL560
 	.uleb128 0x2
 	.byte	0x77
 	.sleb128 0
 	.uleb128 0x3f
-	.4byte	.LVL572
+	.4byte	.LVL562
 	.uleb128 0x2
 	.byte	0x76
 	.sleb128 0
 	.byte	0
 	.uleb128 0x40
-	.4byte	.LASF885
+	.4byte	.LASF883
 	.byte	0x1
 	.byte	0x3a
 	.4byte	0xb5
 	.byte	0x1
-	.4byte	0x2836
+	.4byte	0x2825
 	.uleb128 0x41
 	.ascii	"req\000"
 	.byte	0x1
 	.byte	0x3a
 	.4byte	0x19f9
 	.uleb128 0x36
-	.4byte	.LASF570
+	.4byte	.LASF569
 	.byte	0x1
 	.byte	0x3a
 	.4byte	0xe2f
 	.uleb128 0x36
-	.4byte	.LASF578
+	.4byte	.LASF577
 	.byte	0x1
 	.byte	0x3a
 	.4byte	0xe2f
 	.uleb128 0x37
-	.4byte	.LASF579
+	.4byte	.LASF578
 	.byte	0x1
 	.byte	0x3c
 	.4byte	0x9f
 	.uleb128 0x37
-	.4byte	.LASF580
+	.4byte	.LASF579
 	.byte	0x1
 	.byte	0x3c
 	.4byte	0x9f
@@ -28737,7 +28697,7 @@ __func__.9940:
 	.byte	0x3d
 	.4byte	0x9f
 	.uleb128 0x37
-	.4byte	.LASF581
+	.4byte	.LASF580
 	.byte	0x1
 	.byte	0x3e
 	.4byte	0xb5
@@ -28747,78 +28707,78 @@ __func__.9940:
 	.byte	0x3f
 	.4byte	0xb5
 	.uleb128 0x37
-	.4byte	.LASF582
+	.4byte	.LASF581
 	.byte	0x1
 	.byte	0x40
 	.4byte	0xb5
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF585
+	.4byte	.LASF584
 	.byte	0x1
 	.byte	0x20
 	.4byte	.LFB342
 	.4byte	.LFE342-.LFB342
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2922
+	.4byte	0x2911
 	.uleb128 0x2f
 	.ascii	"s\000"
 	.byte	0x1
 	.byte	0x20
 	.4byte	0xf6
-	.4byte	.LLST144
+	.4byte	.LLST136
 	.uleb128 0x2f
 	.ascii	"buf\000"
 	.byte	0x1
 	.byte	0x20
 	.4byte	0x128
-	.4byte	.LLST145
+	.4byte	.LLST137
 	.uleb128 0x2c
-	.4byte	.LASF583
+	.4byte	.LASF582
 	.byte	0x1
 	.byte	0x20
 	.4byte	0x50
-	.4byte	.LLST146
+	.4byte	.LLST138
 	.uleb128 0x2f
 	.ascii	"len\000"
 	.byte	0x1
 	.byte	0x20
 	.4byte	0x50
-	.4byte	.LLST147
+	.4byte	.LLST139
 	.uleb128 0x3b
 	.ascii	"i\000"
 	.byte	0x1
 	.byte	0x22
 	.4byte	0xb5
-	.4byte	.LLST148
+	.4byte	.LLST140
 	.uleb128 0x3b
 	.ascii	"j\000"
 	.byte	0x1
 	.byte	0x22
 	.4byte	0xb5
-	.4byte	.LLST149
+	.4byte	.LLST141
 	.uleb128 0x3b
 	.ascii	"p8\000"
 	.byte	0x1
 	.byte	0x23
 	.4byte	0xf6
-	.4byte	.LLST150
+	.4byte	.LLST142
 	.uleb128 0x3b
 	.ascii	"p16\000"
 	.byte	0x1
 	.byte	0x24
-	.4byte	0x2922
-	.4byte	.LLST151
+	.4byte	0x2911
+	.4byte	.LLST143
 	.uleb128 0x3b
 	.ascii	"p32\000"
 	.byte	0x1
 	.byte	0x25
 	.4byte	0xe2f
-	.4byte	.LLST152
+	.4byte	.LLST144
 	.uleb128 0x43
-	.4byte	.LVL557
-	.4byte	0x928b
-	.4byte	0x28e2
+	.4byte	.LVL547
+	.4byte	0x92b5
+	.4byte	0x28d1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28827,9 +28787,9 @@ __func__.9940:
 	.4byte	.LC78
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL558
-	.4byte	0x928b
-	.4byte	0x2905
+	.4byte	.LVL548
+	.4byte	0x92b5
+	.4byte	0x28f4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28850,11 +28810,11 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL560
-	.4byte	0x928b
+	.4byte	.LVL550
+	.4byte	0x92b5
 	.uleb128 0x34
-	.4byte	.LVL562
-	.4byte	0x928b
+	.4byte	.LVL552
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28867,7 +28827,7 @@ __func__.9940:
 	.byte	0x4
 	.4byte	0x69
 	.uleb128 0x2b
-	.4byte	.LASF584
+	.4byte	.LASF583
 	.byte	0x1
 	.byte	0x1b
 	.4byte	0x128
@@ -28875,16 +28835,16 @@ __func__.9940:
 	.4byte	.LFE341-.LFB341
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2967
+	.4byte	0x2956
 	.uleb128 0x2c
 	.4byte	.LASF30
 	.byte	0x1
 	.byte	0x1b
 	.4byte	0x50
-	.4byte	.LLST143
+	.4byte	.LLST135
 	.uleb128 0x2d
-	.4byte	.LVL552
-	.4byte	0x9296
+	.4byte	.LVL542
+	.4byte	0x92c0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28900,32 +28860,32 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF586
+	.4byte	.LASF585
 	.byte	0x1
 	.byte	0x17
 	.4byte	.LFB340
 	.4byte	.LFE340-.LFB340
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x29b6
+	.4byte	0x29a5
 	.uleb128 0x2f
 	.ascii	"buf\000"
 	.byte	0x1
 	.byte	0x17
 	.4byte	0x128
-	.4byte	.LLST141
+	.4byte	.LLST133
 	.uleb128 0x45
-	.4byte	0x29b6
-	.4byte	.LBB221
-	.4byte	.LBE221-.LBB221
+	.4byte	0x29a5
+	.4byte	.LBB235
+	.4byte	.LBE235-.LBB235
 	.byte	0x1
 	.byte	0x19
 	.uleb128 0x46
-	.4byte	0x29c2
-	.4byte	.LLST142
+	.4byte	0x29b1
+	.4byte	.LLST134
 	.uleb128 0x2d
-	.4byte	.LVL550
-	.4byte	0x92a1
+	.4byte	.LVL540
+	.4byte	0x92cb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28937,30 +28897,30 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x47
-	.4byte	.LASF886
+	.4byte	.LASF884
 	.byte	0x6
 	.byte	0x4e
 	.byte	0x3
-	.4byte	0x29ce
+	.4byte	0x29bd
 	.uleb128 0x36
-	.4byte	.LASF587
+	.4byte	.LASF586
 	.byte	0x6
 	.byte	0x4e
 	.4byte	0x16b
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF588
+	.4byte	.LASF587
 	.byte	0x5
-	.2byte	0x2f8
+	.2byte	0x2f4
 	.4byte	0xb5
 	.4byte	.LFB323
 	.4byte	.LFE323-.LFB323
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x29fd
+	.4byte	0x29ec
 	.uleb128 0x2d
-	.4byte	.LVL1814
-	.4byte	0x29fd
+	.4byte	.LVL1816
+	.4byte	0x29ec
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28974,24 +28934,24 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF590
+	.4byte	.LASF589
 	.byte	0x5
 	.2byte	0x1d5
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x2aca
+	.4byte	0x2ab9
 	.uleb128 0x4a
-	.4byte	.LASF591
+	.4byte	.LASF590
 	.byte	0x5
 	.2byte	0x1d5
 	.4byte	0xdc5
 	.uleb128 0x4a
-	.4byte	.LASF592
+	.4byte	.LASF591
 	.byte	0x5
 	.2byte	0x1d5
 	.4byte	0xdc5
 	.uleb128 0x4b
-	.4byte	.LASF593
+	.4byte	.LASF592
 	.byte	0x5
 	.2byte	0x1d7
 	.4byte	0xdba
@@ -29006,7 +28966,7 @@ __func__.9940:
 	.2byte	0x1d8
 	.4byte	0xdc5
 	.uleb128 0x4b
-	.4byte	.LASF594
+	.4byte	.LASF593
 	.byte	0x5
 	.2byte	0x1d9
 	.4byte	0xdba
@@ -29016,45 +28976,45 @@ __func__.9940:
 	.2byte	0x1da
 	.4byte	0xdba
 	.uleb128 0x4b
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x5
 	.2byte	0x1da
 	.4byte	0xdba
 	.uleb128 0x4b
-	.4byte	.LASF596
+	.4byte	.LASF595
 	.byte	0x5
 	.2byte	0x1da
 	.4byte	0xdba
 	.uleb128 0x4b
-	.4byte	.LASF597
+	.4byte	.LASF596
 	.byte	0x5
 	.2byte	0x1da
 	.4byte	0xdba
 	.uleb128 0x4b
-	.4byte	.LASF598
+	.4byte	.LASF597
 	.byte	0x5
 	.2byte	0x1db
 	.4byte	0xdba
 	.uleb128 0x4b
-	.4byte	.LASF599
+	.4byte	.LASF598
 	.byte	0x5
 	.2byte	0x1dc
-	.4byte	0x2aca
+	.4byte	0x2ab9
 	.uleb128 0x4d
-	.4byte	.LASF600
+	.4byte	.LASF599
 	.byte	0x5
-	.2byte	0x276
+	.2byte	0x272
 	.uleb128 0x4d
-	.4byte	.LASF601
+	.4byte	.LASF600
 	.byte	0x5
-	.2byte	0x279
+	.2byte	0x275
 	.uleb128 0x4e
-	.4byte	.LASF574
-	.4byte	0x2ae0
-	.4byte	.LASF590
+	.4byte	.LASF573
+	.4byte	0x2acf
+	.4byte	.LASF589
 	.uleb128 0x4f
 	.uleb128 0x4b
-	.4byte	.LASF602
+	.4byte	.LASF601
 	.byte	0x5
 	.2byte	0x1f3
 	.4byte	0xdba
@@ -29065,20 +29025,20 @@ __func__.9940:
 	.4byte	0x1229
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x2ae0
+	.4byte	0x2acf
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x16
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x2ad0
+	.4byte	0x2abf
 	.uleb128 0x49
-	.4byte	.LASF603
+	.4byte	.LASF602
 	.byte	0x5
 	.2byte	0x1a2
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x2b45
+	.4byte	0x2b34
 	.uleb128 0x4c
 	.ascii	"ret\000"
 	.byte	0x5
@@ -29095,40 +29055,40 @@ __func__.9940:
 	.2byte	0x1a6
 	.4byte	0xdc5
 	.uleb128 0x4b
-	.4byte	.LASF565
+	.4byte	.LASF564
 	.byte	0x5
 	.2byte	0x1a7
-	.4byte	0x2454
+	.4byte	0x2443
 	.uleb128 0x50
-	.4byte	0x2b36
+	.4byte	0x2b25
 	.uleb128 0x4b
-	.4byte	.LASF604
+	.4byte	.LASF603
 	.byte	0x5
 	.2byte	0x1b1
 	.4byte	0xde6
 	.byte	0
 	.uleb128 0x4f
 	.uleb128 0x4b
-	.4byte	.LASF605
+	.4byte	.LASF604
 	.byte	0x5
 	.2byte	0x1c6
 	.4byte	0xdc5
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF606
+	.4byte	.LASF605
 	.byte	0x5
 	.2byte	0x185
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x2b8f
+	.4byte	0x2b7e
 	.uleb128 0x4a
-	.4byte	.LASF607
+	.4byte	.LASF606
 	.byte	0x5
 	.2byte	0x185
 	.4byte	0xdba
 	.uleb128 0x4b
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x5
 	.2byte	0x187
 	.4byte	0xdba
@@ -29149,13 +29109,13 @@ __func__.9940:
 	.4byte	0xdba
 	.byte	0
 	.uleb128 0x51
-	.4byte	.LASF715
+	.4byte	.LASF714
 	.byte	0x5
 	.2byte	0x17a
 	.4byte	0x50
 	.byte	0x1
 	.uleb128 0x48
-	.4byte	.LASF608
+	.4byte	.LASF607
 	.byte	0x5
 	.2byte	0x166
 	.4byte	0x50
@@ -29163,29 +29123,29 @@ __func__.9940:
 	.4byte	.LFE318-.LFB318
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2c26
+	.4byte	0x2c15
 	.uleb128 0x52
 	.4byte	.LASF388
 	.byte	0x5
 	.2byte	0x166
 	.4byte	0xdba
-	.4byte	.LLST138
+	.4byte	.LLST130
 	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x5
 	.2byte	0x168
 	.4byte	0xdba
-	.4byte	.LLST139
+	.4byte	.LLST131
 	.uleb128 0x54
-	.4byte	.LASF609
+	.4byte	.LASF608
 	.byte	0x5
 	.2byte	0x169
 	.4byte	0xdba
-	.4byte	.LLST140
+	.4byte	.LLST132
 	.uleb128 0x32
-	.4byte	.LVL537
-	.4byte	0x6189
-	.4byte	0x2bf8
+	.4byte	.LVL527
+	.4byte	0x616f
+	.4byte	0x2be7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29194,9 +29154,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL539
-	.4byte	0x928b
-	.4byte	0x2c15
+	.4byte	.LVL529
+	.4byte	0x92b5
+	.4byte	0x2c04
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29211,8 +29171,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL540
-	.4byte	0x2c26
+	.4byte	.LVL530
+	.4byte	0x2c15
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29222,7 +29182,7 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF610
+	.4byte	.LASF609
 	.byte	0x5
 	.2byte	0x158
 	.4byte	0x50
@@ -29230,16 +29190,16 @@ __func__.9940:
 	.4byte	.LFE317-.LFB317
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2c6a
+	.4byte	0x2c59
 	.uleb128 0x52
-	.4byte	.LASF587
+	.4byte	.LASF586
 	.byte	0x5
 	.2byte	0x158
 	.4byte	0xdba
-	.4byte	.LLST137
+	.4byte	.LLST129
 	.uleb128 0x34
-	.4byte	.LVL535
-	.4byte	0x928b
+	.4byte	.LVL525
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29255,7 +29215,7 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF611
+	.4byte	.LASF610
 	.byte	0x5
 	.2byte	0x13b
 	.4byte	0xdc5
@@ -29263,23 +29223,23 @@ __func__.9940:
 	.4byte	.LFE316-.LFB316
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2d0e
+	.4byte	0x2cfd
 	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x5
 	.2byte	0x13d
 	.4byte	0xdba
-	.4byte	.LLST396
+	.4byte	.LLST395
 	.uleb128 0x54
-	.4byte	.LASF599
+	.4byte	.LASF598
 	.byte	0x5
 	.2byte	0x13e
-	.4byte	0x2aca
-	.4byte	.LLST397
+	.4byte	0x2ab9
+	.4byte	.LLST396
 	.uleb128 0x32
-	.4byte	.LVL1699
-	.4byte	0x251a
-	.4byte	0x2cbc
+	.4byte	.LVL1703
+	.4byte	0x2509
+	.4byte	0x2cab
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
@@ -29294,9 +29254,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1700
-	.4byte	0x31ea
-	.4byte	0x2cd6
+	.4byte	.LVL1704
+	.4byte	0x31c7
+	.4byte	0x2cc5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29311,9 +29271,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1701
-	.4byte	0x2f42
-	.4byte	0x2ce9
+	.4byte	.LVL1705
+	.4byte	0x2f28
+	.4byte	0x2cd8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29321,20 +29281,20 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1703
-	.4byte	0x688f
+	.4byte	.LVL1707
+	.4byte	0x6875
 	.uleb128 0x44
-	.4byte	.LVL1704
-	.4byte	0x6657
+	.4byte	.LVL1708
+	.4byte	0x663d
 	.uleb128 0x44
-	.4byte	.LVL1705
-	.4byte	0x2efb
+	.4byte	.LVL1709
+	.4byte	0x2ee1
 	.uleb128 0x44
-	.4byte	.LVL1707
-	.4byte	0x30f3
+	.4byte	.LVL1711
+	.4byte	0x30d0
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF612
+	.4byte	.LASF611
 	.byte	0x5
 	.2byte	0x12b
 	.4byte	0xdc5
@@ -29342,14 +29302,11 @@ __func__.9940:
 	.4byte	.LFE315-.LFB315
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2d93
-	.uleb128 0x44
-	.4byte	.LVL1708
-	.4byte	0x6ee0
+	.4byte	0x2d79
 	.uleb128 0x32
-	.4byte	.LVL1709
-	.4byte	0x2f42
-	.4byte	0x2d45
+	.4byte	.LVL1712
+	.4byte	0x2f28
+	.4byte	0x2d2b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29358,9 +29315,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1710
-	.4byte	0x3513
-	.4byte	0x2d59
+	.4byte	.LVL1713
+	.4byte	0x34f0
+	.4byte	0x2d3f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29369,12 +29326,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1711
-	.4byte	0x537a
+	.4byte	.LVL1714
+	.4byte	0x536c
 	.uleb128 0x32
-	.4byte	.LVL1712
-	.4byte	0x4fe6
-	.4byte	0x2d76
+	.4byte	.LVL1715
+	.4byte	0x4fd8
+	.4byte	0x2d5c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29383,11 +29340,11 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1713
-	.4byte	0x4d75
+	.4byte	.LVL1716
+	.4byte	0x4d67
 	.uleb128 0x2d
-	.4byte	.LVL1714
-	.4byte	0x333e
+	.4byte	.LVL1717
+	.4byte	0x331b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29397,12 +29354,12 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x55
-	.4byte	.LASF671
+	.4byte	.LASF670
 	.byte	0x5
 	.2byte	0x120
 	.byte	0x1
 	.uleb128 0x2b
-	.4byte	.LASF613
+	.4byte	.LASF612
 	.byte	0x5
 	.byte	0xd2
 	.4byte	0xdc5
@@ -29410,27 +29367,27 @@ __func__.9940:
 	.4byte	.LFE313-.LFB313
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2efb
+	.4byte	0x2ee1
 	.uleb128 0x2c
-	.4byte	.LASF614
+	.4byte	.LASF613
 	.byte	0x5
 	.byte	0xd2
-	.4byte	0x1d79
+	.4byte	0x1d68
 	.4byte	.LLST271
 	.uleb128 0x2c
-	.4byte	.LASF615
+	.4byte	.LASF614
 	.byte	0x5
 	.byte	0xd2
 	.4byte	0xdc5
 	.4byte	.LLST272
 	.uleb128 0x30
-	.4byte	.LASF597
+	.4byte	.LASF596
 	.byte	0x5
 	.byte	0xd4
 	.4byte	0xdba
 	.4byte	.LLST273
 	.uleb128 0x30
-	.4byte	.LASF569
+	.4byte	.LASF568
 	.byte	0x5
 	.byte	0xd5
 	.4byte	0xdba
@@ -29442,7 +29399,7 @@ __func__.9940:
 	.4byte	0xdba
 	.4byte	.LLST275
 	.uleb128 0x30
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x5
 	.byte	0xd6
 	.4byte	0xdba
@@ -29460,49 +29417,49 @@ __func__.9940:
 	.4byte	0xdba
 	.4byte	.LLST278
 	.uleb128 0x30
-	.4byte	.LASF616
+	.4byte	.LASF615
 	.byte	0x5
 	.byte	0xd7
 	.4byte	0xdc5
 	.4byte	.LLST279
 	.uleb128 0x30
-	.4byte	.LASF617
+	.4byte	.LASF616
 	.byte	0x5
 	.byte	0xd8
 	.4byte	0xdc5
 	.4byte	.LLST280
 	.uleb128 0x56
-	.4byte	.LASF618
+	.4byte	.LASF617
 	.byte	0x5
 	.byte	0xd9
 	.4byte	0xdc5
 	.sleb128 -1
 	.uleb128 0x30
-	.4byte	.LASF599
+	.4byte	.LASF598
 	.byte	0x5
 	.byte	0xda
-	.4byte	0x2aca
+	.4byte	0x2ab9
 	.4byte	.LLST281
 	.uleb128 0x57
-	.4byte	.LASF619
+	.4byte	.LASF618
 	.byte	0x5
 	.byte	0xe1
 	.uleb128 0x57
-	.4byte	.LASF620
+	.4byte	.LASF619
 	.byte	0x5
 	.byte	0xe5
 	.uleb128 0x58
-	.4byte	.LASF689
+	.4byte	.LASF688
 	.byte	0x5
 	.2byte	0x117
-	.4byte	.L977
+	.4byte	.L982
 	.uleb128 0x44
-	.4byte	.LVL1100
-	.4byte	0x2efb
+	.4byte	.LVL1108
+	.4byte	0x2ee1
 	.uleb128 0x32
-	.4byte	.LVL1109
-	.4byte	0x26b9
-	.4byte	0x2eaa
+	.4byte	.LVL1117
+	.4byte	0x26a8
+	.4byte	0x2e90
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29524,9 +29481,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1122
-	.4byte	0x61c1
-	.4byte	0x2ec5
+	.4byte	.LVL1130
+	.4byte	0x61a7
+	.4byte	0x2eab
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29542,9 +29499,9 @@ __func__.9940:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1128
-	.4byte	0x46f4
-	.4byte	0x2edf
+	.4byte	.LVL1136
+	.4byte	0x46e1
+	.4byte	0x2ec5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29559,28 +29516,28 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1131
-	.4byte	0x30f3
+	.4byte	.LVL1139
+	.4byte	0x30d0
 	.uleb128 0x44
-	.4byte	.LVL1135
-	.4byte	0x5e01
+	.4byte	.LVL1143
+	.4byte	0x5e03
 	.uleb128 0x44
-	.4byte	.LVL1137
-	.4byte	0x2efb
+	.4byte	.LVL1145
+	.4byte	0x2ee1
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF621
+	.4byte	.LASF620
 	.byte	0x5
 	.byte	0xc9
 	.4byte	.LFB312
 	.4byte	.LFE312-.LFB312
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2f42
+	.4byte	0x2f28
 	.uleb128 0x32
-	.4byte	.LVL1095
-	.4byte	0x230c
-	.4byte	0x2f24
+	.4byte	.LVL1103
+	.4byte	0x22fb
+	.4byte	0x2f0a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -29589,9 +29546,9 @@ __func__.9940:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1096
-	.4byte	0x230c
-	.4byte	0x2f38
+	.4byte	.LVL1104
+	.4byte	0x22fb
+	.4byte	0x2f1e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -29600,11 +29557,11 @@ __func__.9940:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x59
-	.4byte	.LVL1097
-	.4byte	0x3236
+	.4byte	.LVL1105
+	.4byte	0x3213
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF622
+	.4byte	.LASF621
 	.byte	0x5
 	.byte	0x6f
 	.4byte	0x50
@@ -29612,27 +29569,27 @@ __func__.9940:
 	.4byte	.LFE311-.LFB311
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x30de
+	.4byte	0x30bb
 	.uleb128 0x2c
-	.4byte	.LASF623
+	.4byte	.LASF622
 	.byte	0x5
 	.byte	0x6f
 	.4byte	0x50
-	.4byte	.LLST391
+	.4byte	.LLST390
 	.uleb128 0x3b
 	.ascii	"i\000"
 	.byte	0x5
 	.byte	0x71
 	.4byte	0xdba
-	.4byte	.LLST392
+	.4byte	.LLST391
 	.uleb128 0x30
-	.4byte	.LASF624
+	.4byte	.LASF623
 	.byte	0x5
 	.byte	0x71
 	.4byte	0xdba
-	.4byte	.LLST393
+	.4byte	.LLST392
 	.uleb128 0x29
-	.4byte	.LASF625
+	.4byte	.LASF624
 	.byte	0x5
 	.byte	0x72
 	.4byte	0xdc5
@@ -29640,36 +29597,36 @@ __func__.9940:
 	.byte	0x91
 	.sleb128 -36
 	.uleb128 0x30
-	.4byte	.LASF626
+	.4byte	.LASF625
 	.byte	0x5
 	.byte	0x73
 	.4byte	0xdc5
-	.4byte	.LLST394
+	.4byte	.LLST393
 	.uleb128 0x29
-	.4byte	.LASF614
+	.4byte	.LASF613
 	.byte	0x5
 	.byte	0x74
-	.4byte	0x1d79
+	.4byte	0x1d68
 	.uleb128 0x6
 	.byte	0x3
 	.4byte	g_gc_temp_superblock
 	.byte	0x9f
 	.uleb128 0x30
-	.4byte	.LASF627
+	.4byte	.LASF626
 	.byte	0x5
 	.byte	0x75
-	.4byte	0x1db2
-	.4byte	.LLST395
+	.4byte	0x1da1
+	.4byte	.LLST394
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x30ee
+	.4byte	.LASF573
+	.4byte	0x30cb
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9940
 	.uleb128 0x32
-	.4byte	.LVL1662
-	.4byte	0x2d9c
-	.4byte	0x2fe7
+	.4byte	.LVL1667
+	.4byte	0x2d82
+	.4byte	0x2fcd
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29678,9 +29635,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1663
-	.4byte	0x4fe6
-	.4byte	0x2ffa
+	.4byte	.LVL1668
+	.4byte	0x4fd8
+	.4byte	0x2fe0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29688,18 +29645,15 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1664
-	.4byte	0x688f
-	.uleb128 0x44
-	.4byte	.LVL1665
-	.4byte	0x6657
-	.uleb128 0x44
 	.4byte	.LVL1669
-	.4byte	0x6ee0
-	.uleb128 0x32
+	.4byte	0x6875
+	.uleb128 0x44
 	.4byte	.LVL1670
-	.4byte	0x928b
-	.4byte	0x303b
+	.4byte	0x663d
+	.uleb128 0x32
+	.4byte	.LVL1674
+	.4byte	0x92b5
+	.4byte	0x3018
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29711,7 +29665,7 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR173
+	.4byte	.LANCHOR171
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
@@ -29720,9 +29674,9 @@ __func__.9940:
 	.byte	0xa2
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1672
-	.4byte	0x3259
-	.4byte	0x304f
+	.4byte	.LVL1676
+	.4byte	0x3236
+	.4byte	0x302c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29731,18 +29685,18 @@ __func__.9940:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1673
-	.4byte	0x5ddc
+	.4byte	.LVL1677
+	.4byte	0x5dde
 	.uleb128 0x44
-	.4byte	.LVL1675
-	.4byte	0x537a
+	.4byte	.LVL1679
+	.4byte	0x536c
 	.uleb128 0x44
-	.4byte	.LVL1676
-	.4byte	0x4d75
+	.4byte	.LVL1680
+	.4byte	0x4d67
 	.uleb128 0x32
-	.4byte	.LVL1679
-	.4byte	0x928b
-	.4byte	0x3090
+	.4byte	.LVL1683
+	.4byte	0x92b5
+	.4byte	0x306d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29754,7 +29708,7 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR173
+	.4byte	.LANCHOR171
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
@@ -29763,9 +29717,9 @@ __func__.9940:
 	.byte	0xa8
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1680
-	.4byte	0x5279
-	.4byte	0x30a9
+	.4byte	.LVL1684
+	.4byte	0x526b
+	.4byte	0x3086
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -29779,12 +29733,12 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1681
-	.4byte	0x6189
+	.4byte	.LVL1685
+	.4byte	0x616f
 	.uleb128 0x32
-	.4byte	.LVL1683
-	.4byte	0x5279
-	.4byte	0x30cb
+	.4byte	.LVL1687
+	.4byte	0x526b
+	.4byte	0x30a8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -29798,63 +29752,63 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1685
-	.4byte	0x3259
-	.uleb128 0x44
 	.4byte	.LVL1689
-	.4byte	0x5e01
+	.4byte	0x3236
+	.uleb128 0x44
+	.4byte	.LVL1693
+	.4byte	0x5e03
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x30ee
+	.4byte	0x30cb
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x12
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x30de
+	.4byte	0x30bb
 	.uleb128 0x42
-	.4byte	.LASF628
+	.4byte	.LASF627
 	.byte	0x5
 	.byte	0x54
 	.4byte	.LFB310
 	.4byte	.LFE310-.LFB310
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3168
+	.4byte	0x3145
 	.uleb128 0x2c
-	.4byte	.LASF629
+	.4byte	.LASF628
 	.byte	0x5
 	.byte	0x54
 	.4byte	0xdc5
-	.4byte	.LLST132
+	.4byte	.LLST124
 	.uleb128 0x2c
 	.4byte	.LASF391
 	.byte	0x5
 	.byte	0x54
 	.4byte	0xdc5
-	.4byte	.LLST133
+	.4byte	.LLST125
 	.uleb128 0x2f
 	.ascii	"lpa\000"
 	.byte	0x5
 	.byte	0x54
 	.4byte	0xdc5
-	.4byte	.LLST134
+	.4byte	.LLST126
 	.uleb128 0x30
-	.4byte	.LASF630
+	.4byte	.LASF629
 	.byte	0x5
 	.byte	0x56
 	.4byte	0xdba
-	.4byte	.LLST135
+	.4byte	.LLST127
 	.uleb128 0x3b
 	.ascii	"i\000"
 	.byte	0x5
 	.byte	0x57
 	.4byte	0xdba
-	.4byte	.LLST136
+	.4byte	.LLST128
 	.uleb128 0x34
-	.4byte	.LVL527
-	.4byte	0x6189
+	.4byte	.LVL517
+	.4byte	0x616f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29870,7 +29824,7 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF631
+	.4byte	.LASF630
 	.byte	0x5
 	.byte	0x49
 	.4byte	0xdc5
@@ -29878,29 +29832,29 @@ __func__.9940:
 	.4byte	.LFE309-.LFB309
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x319e
+	.4byte	0x317b
 	.uleb128 0x2f
 	.ascii	"blk\000"
 	.byte	0x5
 	.byte	0x49
 	.4byte	0xdba
-	.4byte	.LLST130
+	.4byte	.LLST122
 	.uleb128 0x3b
 	.ascii	"i\000"
 	.byte	0x5
 	.byte	0x4b
 	.4byte	0xdba
-	.4byte	.LLST131
+	.4byte	.LLST123
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF632
+	.4byte	.LASF631
 	.byte	0x5
 	.byte	0x38
 	.4byte	.LFB308
 	.4byte	.LFE308-.LFB308
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x31ea
+	.4byte	0x31c7
 	.uleb128 0x5a
 	.ascii	"req\000"
 	.byte	0x5
@@ -29909,7 +29863,7 @@ __func__.9940:
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5b
-	.4byte	.LASF633
+	.4byte	.LASF632
 	.byte	0x5
 	.byte	0x38
 	.4byte	0xdc5
@@ -29920,23 +29874,23 @@ __func__.9940:
 	.byte	0x5
 	.byte	0x3a
 	.4byte	0xdba
-	.4byte	.LLST128
+	.4byte	.LLST120
 	.uleb128 0x30
-	.4byte	.LASF634
+	.4byte	.LASF633
 	.byte	0x5
 	.byte	0x3b
 	.4byte	0xdba
-	.4byte	.LLST129
+	.4byte	.LLST121
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF635
+	.4byte	.LASF634
 	.byte	0x5
 	.byte	0x29
 	.4byte	.LFB307
 	.4byte	.LFE307-.LFB307
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3236
+	.4byte	0x3213
 	.uleb128 0x5a
 	.ascii	"req\000"
 	.byte	0x5
@@ -29945,7 +29899,7 @@ __func__.9940:
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5b
-	.4byte	.LASF633
+	.4byte	.LASF632
 	.byte	0x5
 	.byte	0x29
 	.4byte	0xdc5
@@ -29956,68 +29910,68 @@ __func__.9940:
 	.byte	0x5
 	.byte	0x2b
 	.4byte	0xdba
-	.4byte	.LLST126
+	.4byte	.LLST118
 	.uleb128 0x30
-	.4byte	.LASF634
+	.4byte	.LASF633
 	.byte	0x5
 	.byte	0x2c
 	.4byte	0xdba
-	.4byte	.LLST127
+	.4byte	.LLST119
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF636
+	.4byte	.LASF635
 	.byte	0x5
 	.byte	0x15
 	.4byte	.LFB306
 	.4byte	.LFE306-.LFB306
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3259
+	.4byte	0x3236
 	.uleb128 0x3b
 	.ascii	"i\000"
 	.byte	0x5
 	.byte	0x17
 	.4byte	0xdba
-	.4byte	.LLST125
+	.4byte	.LLST117
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF637
+	.4byte	.LASF636
 	.byte	0x2
-	.2byte	0xa93
+	.2byte	0xac6
 	.4byte	0x50
 	.4byte	.LFB305
 	.4byte	.LFE305-.LFB305
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x32e9
+	.4byte	0x32c6
 	.uleb128 0x52
-	.4byte	.LASF624
+	.4byte	.LASF623
 	.byte	0x2
-	.2byte	0xa93
+	.2byte	0xac6
 	.4byte	0xdba
 	.4byte	.LLST309
 	.uleb128 0x53
 	.ascii	"ret\000"
 	.byte	0x2
-	.2byte	0xa95
+	.2byte	0xac8
 	.4byte	0x50
 	.4byte	.LLST310
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x32f9
+	.4byte	.LASF573
+	.4byte	0x32d6
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9870
 	.uleb128 0x32
-	.4byte	.LVL1259
-	.4byte	0x928b
-	.4byte	0x32bf
+	.4byte	.LVL1267
+	.4byte	0x92b5
+	.4byte	0x329c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC98
+	.4byte	.LC101
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -30026,9 +29980,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1263
-	.4byte	0x928b
-	.4byte	0x32df
+	.4byte	.LVL1271
+	.4byte	0x92b5
+	.4byte	0x32bc
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30040,85 +29994,85 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR160
+	.4byte	.LANCHOR159
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1266
-	.4byte	0x32fe
+	.4byte	.LVL1274
+	.4byte	0x32db
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x32f9
+	.4byte	0x32d6
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x13
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x32e9
+	.4byte	0x32c6
 	.uleb128 0x49
-	.4byte	.LASF638
+	.4byte	.LASF637
 	.byte	0x2
-	.2byte	0xa7e
+	.2byte	0xab1
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x3329
+	.4byte	0x3306
 	.uleb128 0x4a
-	.4byte	.LASF624
+	.4byte	.LASF623
 	.byte	0x2
-	.2byte	0xa7e
+	.2byte	0xab1
 	.4byte	0xdba
 	.uleb128 0x4e
-	.4byte	.LASF574
-	.4byte	0x3339
-	.4byte	.LASF638
+	.4byte	.LASF573
+	.4byte	0x3316
+	.4byte	.LASF637
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x3339
+	.4byte	0x3316
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0xf
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x3329
+	.4byte	0x3306
 	.uleb128 0x48
-	.4byte	.LASF639
+	.4byte	.LASF638
 	.byte	0x2
-	.2byte	0xa5e
+	.2byte	0xa91
 	.4byte	0xdc5
 	.4byte	.LFB303
 	.4byte	.LFE303-.LFB303
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3430
+	.4byte	0x340d
 	.uleb128 0x52
-	.4byte	.LASF640
+	.4byte	.LASF639
 	.byte	0x2
-	.2byte	0xa5e
-	.4byte	0x1d79
-	.4byte	.LLST122
+	.2byte	0xa91
+	.4byte	0x1d68
+	.4byte	.LLST114
 	.uleb128 0x54
-	.4byte	.LASF597
+	.4byte	.LASF596
 	.byte	0x2
-	.2byte	0xa60
+	.2byte	0xa93
 	.4byte	0xdba
-	.4byte	.LLST123
+	.4byte	.LLST115
 	.uleb128 0x54
-	.4byte	.LASF641
+	.4byte	.LASF640
 	.byte	0x2
-	.2byte	0xa61
+	.2byte	0xa94
 	.4byte	0xdc5
-	.4byte	.LLST124
+	.4byte	.LLST116
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x30ee
+	.4byte	.LASF573
+	.4byte	0x30cb
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9850
 	.uleb128 0x32
-	.4byte	.LVL490
-	.4byte	0x928b
-	.4byte	0x33be
+	.4byte	.LVL480
+	.4byte	0x92b5
+	.4byte	0x339b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30130,18 +30084,18 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR90
+	.4byte	.LANCHOR88
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xa63
+	.2byte	0xa96
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL491
-	.4byte	0x928b
-	.4byte	0x33e5
+	.4byte	.LVL481
+	.4byte	0x92b5
+	.4byte	0x33c2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30153,18 +30107,18 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR90
+	.4byte	.LANCHOR88
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xa64
+	.2byte	0xa97
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL492
-	.4byte	0x928b
-	.4byte	0x340c
+	.4byte	.LVL482
+	.4byte	0x92b5
+	.4byte	0x33e9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30176,17 +30130,17 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR90
+	.4byte	.LANCHOR88
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xa65
+	.2byte	0xa98
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL496
-	.4byte	0x928b
+	.4byte	.LVL486
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30198,48 +30152,48 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR90
+	.4byte	.LANCHOR88
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xa7a
+	.2byte	0xaad
 	.byte	0
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF642
+	.4byte	.LASF641
 	.byte	0x2
-	.2byte	0xa46
+	.2byte	0xa79
 	.4byte	0x50
 	.4byte	.LFB302
 	.4byte	.LFE302-.LFB302
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x34fe
+	.4byte	0x34db
 	.uleb128 0x52
-	.4byte	.LASF640
+	.4byte	.LASF639
 	.byte	0x2
-	.2byte	0xa46
-	.4byte	0x1d79
-	.4byte	.LLST376
+	.2byte	0xa79
+	.4byte	0x1d68
+	.4byte	.LLST381
 	.uleb128 0x28
-	.4byte	.LASF624
+	.4byte	.LASF623
 	.byte	0x2
-	.2byte	0xa48
+	.2byte	0xa7b
 	.4byte	0xdba
 	.uleb128 0x1
 	.byte	0x54
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x350e
+	.4byte	.LASF573
+	.4byte	0x34eb
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9843
 	.uleb128 0x32
-	.4byte	.LVL1595
-	.4byte	0x928b
-	.4byte	0x349e
+	.4byte	.LVL1629
+	.4byte	0x92b5
+	.4byte	0x347b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30257,12 +30211,12 @@ __func__.9940:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xa49
+	.2byte	0xa7c
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1596
-	.4byte	0x5ddc
-	.4byte	0x34b2
+	.4byte	.LVL1630
+	.4byte	0x5dde
+	.4byte	0x348f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30271,12 +30225,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1597
-	.4byte	0x32fe
+	.4byte	.LVL1631
+	.4byte	0x32db
 	.uleb128 0x32
-	.4byte	.LVL1598
-	.4byte	0x3513
-	.4byte	0x34cf
+	.4byte	.LVL1632
+	.4byte	0x34f0
+	.4byte	0x34ac
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30285,12 +30239,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1599
-	.4byte	0x537a
+	.4byte	.LVL1633
+	.4byte	0x536c
 	.uleb128 0x32
-	.4byte	.LVL1600
-	.4byte	0x4fe6
-	.4byte	0x34eb
+	.4byte	.LVL1634
+	.4byte	0x4fd8
+	.4byte	0x34c8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30298,104 +30252,104 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1601
-	.4byte	0x4d75
+	.4byte	.LVL1635
+	.4byte	0x4d67
 	.uleb128 0x44
-	.4byte	.LVL1603
-	.4byte	0x5e01
+	.4byte	.LVL1637
+	.4byte	0x5e03
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x350e
+	.4byte	0x34eb
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x1c
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x34fe
+	.4byte	0x34db
 	.uleb128 0x5c
-	.4byte	.LASF643
+	.4byte	.LASF642
 	.byte	0x2
-	.2byte	0x9e2
+	.2byte	0xa15
 	.4byte	0x50
 	.4byte	.LFB301
 	.4byte	.LFE301-.LFB301
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x37ae
+	.4byte	0x378b
 	.uleb128 0x5d
 	.ascii	"p\000"
 	.byte	0x2
-	.2byte	0x9e2
-	.4byte	0x1d79
+	.2byte	0xa15
+	.4byte	0x1d68
 	.4byte	.LLST294
 	.uleb128 0x54
-	.4byte	.LASF644
+	.4byte	.LASF643
 	.byte	0x2
-	.2byte	0x9e4
+	.2byte	0xa17
 	.4byte	0xdba
 	.4byte	.LLST295
 	.uleb128 0x4b
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x2
-	.2byte	0x9e5
+	.2byte	0xa18
 	.4byte	0xdba
 	.uleb128 0x54
-	.4byte	.LASF569
+	.4byte	.LASF568
 	.byte	0x2
-	.2byte	0x9e5
+	.2byte	0xa18
 	.4byte	0xdba
 	.4byte	.LLST296
 	.uleb128 0x53
 	.ascii	"n\000"
 	.byte	0x2
-	.2byte	0x9e5
+	.2byte	0xa18
 	.4byte	0xdba
 	.4byte	.LLST297
 	.uleb128 0x54
-	.4byte	.LASF597
+	.4byte	.LASF596
 	.byte	0x2
-	.2byte	0x9e5
+	.2byte	0xa18
 	.4byte	0xdba
 	.4byte	.LLST298
 	.uleb128 0x54
-	.4byte	.LASF645
+	.4byte	.LASF644
 	.byte	0x2
-	.2byte	0x9e6
+	.2byte	0xa19
 	.4byte	0x50
 	.4byte	.LLST299
 	.uleb128 0x54
-	.4byte	.LASF646
+	.4byte	.LASF645
 	.byte	0x2
-	.2byte	0x9e7
+	.2byte	0xa1a
 	.4byte	0xdba
 	.4byte	.LLST300
 	.uleb128 0x4d
-	.4byte	.LASF647
+	.4byte	.LASF646
 	.byte	0x2
-	.2byte	0x9e8
+	.2byte	0xa1b
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x37be
+	.4byte	.LASF573
+	.4byte	0x379b
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9822
 	.uleb128 0x5e
-	.4byte	0x4b40
-	.4byte	.LBB247
-	.4byte	.Ldebug_ranges0+0xd0
+	.4byte	0x4b2d
+	.4byte	.LBB280
+	.4byte	.Ldebug_ranges0+0x118
 	.byte	0x2
-	.2byte	0xa18
-	.4byte	0x35fa
+	.2byte	0xa4b
+	.4byte	0x35d7
 	.uleb128 0x46
-	.4byte	0x4b59
+	.4byte	0x4b46
 	.4byte	.LLST301
 	.uleb128 0x46
-	.4byte	0x4b4d
+	.4byte	0x4b3a
 	.4byte	.LLST302
 	.uleb128 0x34
-	.4byte	.LVL1215
-	.4byte	0x8489
+	.4byte	.LVL1223
+	.4byte	0x83fa
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30403,15 +30357,15 @@ __func__.9940:
 	.byte	0x77
 	.sleb128 0
 	.uleb128 0x3c
-	.4byte	0x4b59
+	.4byte	0x4b46
 	.uleb128 0x1
 	.byte	0x31
 	.byte	0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1186
-	.4byte	0x928b
-	.4byte	0x3621
+	.4byte	.LVL1194
+	.4byte	0x92b5
+	.4byte	0x35fe
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30423,18 +30377,18 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR158
+	.4byte	.LANCHOR157
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x9e9
+	.2byte	0xa1c
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1190
-	.4byte	0x5bc6
-	.4byte	0x3638
+	.4byte	.LVL1198
+	.4byte	0x5bb8
+	.4byte	0x3615
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30443,9 +30397,9 @@ __func__.9940:
 	.4byte	.LANCHOR47
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1192
-	.4byte	0x928b
-	.4byte	0x365f
+	.4byte	.LVL1200
+	.4byte	0x92b5
+	.4byte	0x363c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30457,18 +30411,18 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR158
+	.4byte	.LANCHOR157
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x9f2
+	.2byte	0xa25
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1193
-	.4byte	0x3f2e
-	.4byte	0x3673
+	.4byte	.LVL1201
+	.4byte	0x3f1b
+	.4byte	0x3650
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30477,9 +30431,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1194
-	.4byte	0x5ddc
-	.4byte	0x3687
+	.4byte	.LVL1202
+	.4byte	0x5dde
+	.4byte	0x3664
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30488,9 +30442,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1195
-	.4byte	0x928b
-	.4byte	0x36ae
+	.4byte	.LVL1203
+	.4byte	0x92b5
+	.4byte	0x368b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30502,18 +30456,18 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR158
+	.4byte	.LANCHOR157
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x9fd
+	.2byte	0xa30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1198
-	.4byte	0x928b
-	.4byte	0x36d5
+	.4byte	.LVL1206
+	.4byte	0x92b5
+	.4byte	0x36b2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30525,18 +30479,18 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR158
+	.4byte	.LANCHOR157
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xa00
+	.2byte	0xa33
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1200
-	.4byte	0x928b
-	.4byte	0x36fc
+	.4byte	.LVL1208
+	.4byte	0x92b5
+	.4byte	0x36d9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30548,18 +30502,18 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR158
+	.4byte	.LANCHOR157
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xa0b
+	.2byte	0xa3e
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1201
-	.4byte	0x928b
-	.4byte	0x3723
+	.4byte	.LVL1209
+	.4byte	0x92b5
+	.4byte	0x3700
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30571,18 +30525,18 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR158
+	.4byte	.LANCHOR157
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xa0d
+	.2byte	0xa40
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1202
-	.4byte	0x4b40
-	.4byte	0x373c
+	.4byte	.LVL1210
+	.4byte	0x4b2d
+	.4byte	0x3719
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30596,9 +30550,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1206
-	.4byte	0x2464
-	.4byte	0x3750
+	.4byte	.LVL1214
+	.4byte	0x2453
+	.4byte	0x372d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
@@ -30607,9 +30561,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1208
-	.4byte	0x3926
-	.4byte	0x3764
+	.4byte	.LVL1216
+	.4byte	0x3913
+	.4byte	0x3741
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30618,12 +30572,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1209
-	.4byte	0x6657
+	.4byte	.LVL1217
+	.4byte	0x663d
 	.uleb128 0x32
-	.4byte	.LVL1210
-	.4byte	0x5ddc
-	.4byte	0x3781
+	.4byte	.LVL1218
+	.4byte	0x5dde
+	.4byte	0x375e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30632,11 +30586,11 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1220
-	.4byte	0x688f
+	.4byte	.LVL1228
+	.4byte	0x6875
 	.uleb128 0x34
-	.4byte	.LVL1224
-	.4byte	0x928b
+	.4byte	.LVL1232
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30648,98 +30602,104 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR158
+	.4byte	.LANCHOR157
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xa42
+	.2byte	0xa75
 	.byte	0
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x37be
+	.4byte	0x379b
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x18
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x37ae
+	.4byte	0x378b
 	.uleb128 0x49
-	.4byte	.LASF648
+	.4byte	.LASF647
 	.byte	0x2
-	.2byte	0x9d9
+	.2byte	0xa0c
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x37e1
+	.4byte	0x37be
 	.uleb128 0x4a
-	.4byte	.LASF624
+	.4byte	.LASF623
 	.byte	0x2
-	.2byte	0x9d9
+	.2byte	0xa0c
 	.4byte	0xdba
 	.byte	0
 	.uleb128 0x5c
-	.4byte	.LASF649
+	.4byte	.LASF648
 	.byte	0x2
-	.2byte	0x98e
+	.2byte	0x9c3
 	.4byte	0xdba
 	.4byte	.LFB299
 	.4byte	.LFE299-.LFB299
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x38a2
+	.4byte	0x388f
+	.uleb128 0x54
+	.4byte	.LASF649
+	.byte	0x2
+	.2byte	0x9c5
+	.4byte	0xdba
+	.4byte	.LLST104
 	.uleb128 0x54
 	.4byte	.LASF650
 	.byte	0x2
-	.2byte	0x990
+	.2byte	0x9c6
 	.4byte	0xdba
-	.4byte	.LLST113
+	.4byte	.LLST105
 	.uleb128 0x54
 	.4byte	.LASF651
 	.byte	0x2
-	.2byte	0x991
+	.2byte	0x9c7
 	.4byte	0xdba
-	.4byte	.LLST114
+	.4byte	.LLST106
 	.uleb128 0x54
 	.4byte	.LASF652
 	.byte	0x2
-	.2byte	0x992
-	.4byte	0xdba
-	.4byte	.LLST115
+	.2byte	0x9c8
+	.4byte	0x1cb8
+	.4byte	.LLST107
 	.uleb128 0x54
 	.4byte	.LASF653
 	.byte	0x2
-	.2byte	0x993
-	.4byte	0x1cc9
-	.4byte	.LLST116
-	.uleb128 0x54
-	.4byte	.LASF654
-	.byte	0x2
-	.2byte	0x994
+	.2byte	0x9c9
 	.4byte	0xdba
-	.4byte	.LLST117
+	.4byte	.LLST108
 	.uleb128 0x54
-	.4byte	.LASF655
+	.4byte	.LASF654
 	.byte	0x2
-	.2byte	0x995
+	.2byte	0x9ca
 	.4byte	0xdba
-	.4byte	.LLST118
+	.4byte	.LLST109
 	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x2
-	.2byte	0x996
+	.2byte	0x9cb
 	.4byte	0xdc5
-	.4byte	.LLST119
+	.4byte	.LLST110
+	.uleb128 0x54
+	.4byte	.LASF325
+	.byte	0x2
+	.2byte	0x9cc
+	.4byte	0xdba
+	.4byte	.LLST111
 	.uleb128 0x44
-	.4byte	.LVL470
-	.4byte	0x38a2
+	.4byte	.LVL458
+	.4byte	0x388f
 	.uleb128 0x44
-	.4byte	.LVL476
-	.4byte	0x38fb
+	.4byte	.LVL464
+	.4byte	0x38e8
 	.uleb128 0x34
-	.4byte	.LVL478
-	.4byte	0x928b
+	.4byte	.LVL466
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30768,95 +30728,95 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF656
+	.4byte	.LASF655
 	.byte	0x2
-	.2byte	0x979
+	.2byte	0x9ae
 	.4byte	0xdba
 	.4byte	.LFB298
 	.4byte	.LFE298-.LFB298
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x38fb
+	.4byte	0x38e8
 	.uleb128 0x52
 	.4byte	.LASF236
 	.byte	0x2
-	.2byte	0x979
+	.2byte	0x9ae
 	.4byte	0xdba
-	.4byte	.LLST102
+	.4byte	.LLST93
 	.uleb128 0x54
-	.4byte	.LASF657
+	.4byte	.LASF656
 	.byte	0x2
-	.2byte	0x97b
+	.2byte	0x9b0
 	.4byte	0xdba
-	.4byte	.LLST103
+	.4byte	.LLST94
 	.uleb128 0x54
-	.4byte	.LASF587
+	.4byte	.LASF586
 	.byte	0x2
-	.2byte	0x97c
+	.2byte	0x9b1
 	.4byte	0xdba
-	.4byte	.LLST104
+	.4byte	.LLST95
 	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x2
-	.2byte	0x97d
+	.2byte	0x9b2
 	.4byte	0xdba
-	.4byte	.LLST105
+	.4byte	.LLST96
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF658
+	.4byte	.LASF657
 	.byte	0x2
-	.2byte	0x970
+	.2byte	0x9a5
 	.4byte	0xdba
 	.4byte	.LFB297
 	.4byte	.LFE297-.LFB297
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3926
+	.4byte	0x3913
 	.uleb128 0x54
-	.4byte	.LASF652
+	.4byte	.LASF651
 	.byte	0x2
-	.2byte	0x972
+	.2byte	0x9a7
 	.4byte	0xdba
-	.4byte	.LLST101
+	.4byte	.LLST92
 	.byte	0
 	.uleb128 0x5c
-	.4byte	.LASF659
+	.4byte	.LASF658
 	.byte	0x2
-	.2byte	0x960
+	.2byte	0x995
 	.4byte	0x50
 	.4byte	.LFB296
 	.4byte	.LFE296-.LFB296
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x399e
+	.4byte	0x398b
 	.uleb128 0x52
-	.4byte	.LASF624
+	.4byte	.LASF623
 	.byte	0x2
-	.2byte	0x960
+	.2byte	0x995
 	.4byte	0xdba
-	.4byte	.LLST97
+	.4byte	.LLST88
 	.uleb128 0x54
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x2
-	.2byte	0x962
+	.2byte	0x997
 	.4byte	0xdba
-	.4byte	.LLST98
+	.4byte	.LLST89
 	.uleb128 0x54
-	.4byte	.LASF597
+	.4byte	.LASF596
 	.byte	0x2
-	.2byte	0x962
+	.2byte	0x997
 	.4byte	0xdba
-	.4byte	.LLST99
+	.4byte	.LLST90
 	.uleb128 0x54
 	.4byte	.LASF375
 	.byte	0x2
-	.2byte	0x963
+	.2byte	0x998
 	.4byte	0xdba
-	.4byte	.LLST100
+	.4byte	.LLST91
 	.uleb128 0x32
-	.4byte	.LVL284
-	.4byte	0x61f9
-	.4byte	0x3994
+	.4byte	.LVL272
+	.4byte	0x61df
+	.4byte	0x3981
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -30865,69 +30825,69 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL285
-	.4byte	0x682c
+	.4byte	.LVL273
+	.4byte	0x6812
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF660
+	.4byte	.LASF659
 	.byte	0x2
-	.2byte	0x901
+	.2byte	0x933
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x39c8
+	.4byte	0x39b5
 	.uleb128 0x4c
 	.ascii	"i\000"
 	.byte	0x2
-	.2byte	0x903
+	.2byte	0x935
 	.4byte	0x50
 	.uleb128 0x4f
 	.uleb128 0x4b
-	.4byte	.LASF614
+	.4byte	.LASF613
 	.byte	0x2
-	.2byte	0x928
-	.4byte	0x1d79
+	.2byte	0x95a
+	.4byte	0x1d68
 	.byte	0
 	.byte	0
 	.uleb128 0x5f
-	.4byte	.LASF661
+	.4byte	.LASF660
 	.byte	0x2
-	.2byte	0x8e2
+	.2byte	0x914
 	.4byte	.LFB294
 	.4byte	.LFE294-.LFB294
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3a97
+	.4byte	0x3a84
 	.uleb128 0x60
 	.ascii	"i\000"
 	.byte	0x2
-	.2byte	0x8e4
+	.2byte	0x916
 	.4byte	0x50
 	.uleb128 0x1
 	.byte	0x55
 	.uleb128 0x60
 	.ascii	"ppa\000"
 	.byte	0x2
-	.2byte	0x8e5
+	.2byte	0x917
 	.4byte	0xdc5
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -28
 	.uleb128 0x54
-	.4byte	.LASF662
+	.4byte	.LASF661
 	.byte	0x2
-	.2byte	0x8e6
-	.4byte	0x2aca
+	.2byte	0x918
+	.4byte	0x2ab9
 	.4byte	.LLST239
 	.uleb128 0x32
-	.4byte	.LVL909
-	.4byte	0x928b
-	.4byte	0x3a26
+	.4byte	.LVL917
+	.4byte	0x92b5
+	.4byte	0x3a13
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC88
+	.4byte	.LC91
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -30936,9 +30896,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL911
-	.4byte	0x5279
-	.4byte	0x3a45
+	.4byte	.LVL919
+	.4byte	0x526b
+	.4byte	0x3a32
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30958,9 +30918,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL912
-	.4byte	0x928b
-	.4byte	0x3a5f
+	.4byte	.LVL920
+	.4byte	0x92b5
+	.4byte	0x3a4c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30975,9 +30935,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL914
-	.4byte	0x26b9
-	.4byte	0x3a7d
+	.4byte	.LVL922
+	.4byte	0x26a8
+	.4byte	0x3a6a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30996,14 +30956,14 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL915
-	.4byte	0x928b
+	.4byte	.LVL923
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC90
+	.4byte	.LC93
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -31013,30 +30973,30 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x5f
-	.4byte	.LASF663
+	.4byte	.LASF662
 	.byte	0x2
-	.2byte	0x8ae
+	.2byte	0x8e0
 	.4byte	.LFB293
 	.4byte	.LFE293-.LFB293
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3bea
+	.4byte	0x3bd7
 	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x2
-	.2byte	0x8b0
+	.2byte	0x8e2
 	.4byte	0xdba
 	.4byte	.LLST266
 	.uleb128 0x53
 	.ascii	"lpn\000"
 	.byte	0x2
-	.2byte	0x8b1
+	.2byte	0x8e3
 	.4byte	0xdc5
 	.4byte	.LLST267
 	.uleb128 0x28
-	.4byte	.LASF664
+	.4byte	.LASF663
 	.byte	0x2
-	.2byte	0x8b2
+	.2byte	0x8e4
 	.4byte	0xdc5
 	.uleb128 0x2
 	.byte	0x91
@@ -31044,40 +31004,40 @@ __func__.9940:
 	.uleb128 0x53
 	.ascii	"blk\000"
 	.byte	0x2
-	.2byte	0x8b3
+	.2byte	0x8e5
 	.4byte	0xdba
 	.4byte	.LLST268
 	.uleb128 0x54
-	.4byte	.LASF665
+	.4byte	.LASF664
 	.byte	0x2
-	.2byte	0x8b4
+	.2byte	0x8e6
 	.4byte	0xdba
 	.4byte	.LLST269
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x3bfa
+	.4byte	.LASF573
+	.4byte	0x3be7
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.9738
+	.4byte	__func__.9737
 	.uleb128 0x61
-	.4byte	.LBB242
-	.4byte	.LBE242-.LBB242
-	.4byte	0x3b40
+	.4byte	.LBB275
+	.4byte	.LBE275-.LBB275
+	.4byte	0x3b2d
 	.uleb128 0x54
 	.4byte	.LASF236
 	.byte	0x2
-	.2byte	0x8d1
+	.2byte	0x903
 	.4byte	0xdba
 	.4byte	.LLST270
 	.uleb128 0x34
-	.4byte	.LVL1080
-	.4byte	0x928b
+	.4byte	.LVL1088
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC93
+	.4byte	.LC96
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -31087,26 +31047,26 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1073
-	.4byte	0x928b
-	.4byte	0x3b60
+	.4byte	.LVL1081
+	.4byte	0x92b5
+	.4byte	0x3b4d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC91
+	.4byte	.LC94
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR156
+	.4byte	.LANCHOR155
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1074
-	.4byte	0x230c
-	.4byte	0x3b81
+	.4byte	.LVL1082
+	.4byte	0x22fb
+	.4byte	0x3b6e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31127,9 +31087,9 @@ __func__.9940:
 	.2byte	0x2000
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1085
-	.4byte	0x928b
-	.4byte	0x3ba8
+	.4byte	.LVL1093
+	.4byte	0x92b5
+	.4byte	0x3b95
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31141,18 +31101,18 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR156
+	.4byte	.LANCHOR155
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x8df
+	.2byte	0x911
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1087
-	.4byte	0x5279
-	.4byte	0x3bc7
+	.4byte	.LVL1095
+	.4byte	0x526b
+	.4byte	0x3bb4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31172,17 +31132,17 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1088
-	.4byte	0x6189
+	.4byte	.LVL1096
+	.4byte	0x616f
 	.uleb128 0x34
-	.4byte	.LVL1092
-	.4byte	0x928b
+	.4byte	.LVL1100
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC92
+	.4byte	.LC95
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -31193,38 +31153,38 @@ __func__.9940:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x3bfa
+	.4byte	0x3be7
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0xd
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x3bea
+	.4byte	0x3bd7
 	.uleb128 0x5f
-	.4byte	.LASF666
+	.4byte	.LASF665
 	.byte	0x2
-	.2byte	0x88f
+	.2byte	0x8c1
 	.4byte	.LFB292
 	.4byte	.LFE292-.LFB292
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3d01
+	.4byte	0x3cee
 	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x2
-	.2byte	0x891
+	.2byte	0x8c3
 	.4byte	0xdba
-	.4byte	.LLST373
+	.4byte	.LLST378
 	.uleb128 0x53
 	.ascii	"lpn\000"
 	.byte	0x2
-	.2byte	0x892
+	.2byte	0x8c4
 	.4byte	0xdc5
-	.4byte	.LLST374
+	.4byte	.LLST379
 	.uleb128 0x28
-	.4byte	.LASF664
+	.4byte	.LASF663
 	.byte	0x2
-	.2byte	0x893
+	.2byte	0x8c5
 	.4byte	0xdc5
 	.uleb128 0x2
 	.byte	0x91
@@ -31232,25 +31192,25 @@ __func__.9940:
 	.uleb128 0x53
 	.ascii	"blk\000"
 	.byte	0x2
-	.2byte	0x894
+	.2byte	0x8c6
 	.4byte	0xdba
-	.4byte	.LLST375
+	.4byte	.LLST380
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x3d11
+	.4byte	.LASF573
+	.4byte	0x3cfe
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.9722
+	.4byte	__func__.9721
 	.uleb128 0x32
-	.4byte	.LVL1577
-	.4byte	0x928b
-	.4byte	0x3c81
+	.4byte	.LVL1611
+	.4byte	0x92b5
+	.4byte	0x3c6e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC91
+	.4byte	.LC94
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -31259,9 +31219,9 @@ __func__.9940:
 	.4byte	.LANCHOR168
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1578
-	.4byte	0x230c
-	.4byte	0x3c95
+	.4byte	.LVL1612
+	.4byte	0x22fb
+	.4byte	0x3c82
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -31270,9 +31230,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1582
-	.4byte	0x5279
-	.4byte	0x3cb4
+	.4byte	.LVL1616
+	.4byte	0x526b
+	.4byte	0x3ca1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31292,18 +31252,18 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1583
-	.4byte	0x6189
+	.4byte	.LVL1617
+	.4byte	0x616f
 	.uleb128 0x32
-	.4byte	.LVL1587
-	.4byte	0x928b
-	.4byte	0x3cda
+	.4byte	.LVL1621
+	.4byte	0x92b5
+	.4byte	0x3cc7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC102
+	.4byte	.LC105
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -31312,9 +31272,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1588
-	.4byte	0x32fe
-	.4byte	0x3cee
+	.4byte	.LVL1622
+	.4byte	0x32db
+	.4byte	0x3cdb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31323,66 +31283,67 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1589
-	.4byte	0x537a
+	.4byte	.LVL1623
+	.4byte	0x536c
 	.uleb128 0x44
-	.4byte	.LVL1590
-	.4byte	0x4d75
+	.4byte	.LVL1624
+	.4byte	0x4d67
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x3d11
+	.4byte	0x3cfe
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x14
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x3d01
+	.4byte	0x3cee
 	.uleb128 0x5f
-	.4byte	.LASF667
+	.4byte	.LASF666
 	.byte	0x2
-	.2byte	0x86b
+	.2byte	0x89c
 	.4byte	.LFB291
 	.4byte	.LFE291-.LFB291
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3db9
+	.4byte	0x3da6
 	.uleb128 0x52
-	.4byte	.LASF614
+	.4byte	.LASF613
 	.byte	0x2
-	.2byte	0x86b
-	.4byte	0x1d79
+	.2byte	0x89c
+	.4byte	0x1d68
 	.4byte	.LLST341
 	.uleb128 0x28
-	.4byte	.LASF668
+	.4byte	.LASF667
 	.byte	0x2
-	.2byte	0x86d
+	.2byte	0x89e
 	.4byte	0xde6
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -44
-	.uleb128 0x54
-	.4byte	.LASF599
+	.uleb128 0x28
+	.4byte	.LASF598
 	.byte	0x2
-	.2byte	0x86e
-	.4byte	0x2aca
-	.4byte	.LLST342
+	.2byte	0x89f
+	.4byte	0x2ab9
+	.uleb128 0x1
+	.byte	0x55
 	.uleb128 0x54
-	.4byte	.LASF669
+	.4byte	.LASF668
 	.byte	0x2
-	.2byte	0x86f
+	.2byte	0x8a0
 	.4byte	0x50
-	.4byte	.LLST343
+	.4byte	.LLST342
 	.uleb128 0x62
 	.4byte	.LASF384
 	.byte	0x2
-	.2byte	0x870
+	.2byte	0x8a1
 	.4byte	0xdc5
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1431
-	.4byte	0x333e
-	.4byte	0x3d8c
+	.4byte	.LVL1440
+	.4byte	0x331b
+	.4byte	0x3d77
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31391,9 +31352,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1434
-	.4byte	0x251a
-	.4byte	0x3daf
+	.4byte	.LVL1441
+	.4byte	0x2509
+	.4byte	0x3d9c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31408,31 +31369,33 @@ __func__.9940:
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x53
-	.uleb128 0x1
-	.byte	0x30
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1435
-	.4byte	0x3259
+	.4byte	.LVL1442
+	.4byte	0x3236
 	.byte	0
 	.uleb128 0x63
-	.4byte	.LASF670
+	.4byte	.LASF669
 	.byte	0x2
-	.2byte	0x851
+	.2byte	0x882
 	.4byte	.LFB290
 	.4byte	.LFE290-.LFB290
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3e0a
+	.4byte	0x3df7
 	.uleb128 0x32
-	.4byte	.LVL1556
-	.4byte	0x503e
-	.4byte	0x3ded
+	.4byte	.LVL1563
+	.4byte	0x5030
+	.4byte	0x3dda
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31451,8 +31414,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1557
-	.4byte	0x230c
+	.4byte	.LVL1564
+	.4byte	0x22fb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31473,66 +31436,66 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x55
-	.4byte	.LASF672
+	.4byte	.LASF671
 	.byte	0x2
-	.2byte	0x83d
+	.2byte	0x86e
 	.byte	0x1
 	.uleb128 0x5c
-	.4byte	.LASF673
+	.4byte	.LASF672
 	.byte	0x2
-	.2byte	0x812
+	.2byte	0x843
 	.4byte	0x50
 	.4byte	.LFB288
 	.4byte	.LFE288-.LFB288
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3f19
+	.4byte	0x3f06
 	.uleb128 0x54
-	.4byte	.LASF650
+	.4byte	.LASF649
 	.byte	0x2
-	.2byte	0x814
+	.2byte	0x845
 	.4byte	0xdba
 	.4byte	.LLST260
 	.uleb128 0x54
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x2
-	.2byte	0x814
+	.2byte	0x845
 	.4byte	0xdba
 	.4byte	.LLST261
 	.uleb128 0x54
-	.4byte	.LASF597
+	.4byte	.LASF596
 	.byte	0x2
-	.2byte	0x814
+	.2byte	0x845
 	.4byte	0xdba
 	.4byte	.LLST262
 	.uleb128 0x54
 	.4byte	.LASF375
 	.byte	0x2
-	.2byte	0x814
+	.2byte	0x845
 	.4byte	0xdba
 	.4byte	.LLST263
 	.uleb128 0x54
-	.4byte	.LASF674
+	.4byte	.LASF673
 	.byte	0x2
-	.2byte	0x815
+	.2byte	0x846
 	.4byte	0xdba
 	.4byte	.LLST264
 	.uleb128 0x54
-	.4byte	.LASF675
+	.4byte	.LASF674
 	.byte	0x2
-	.2byte	0x815
+	.2byte	0x846
 	.4byte	0xdba
 	.4byte	.LLST265
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x3f29
+	.4byte	.LASF573
+	.4byte	0x3f16
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.9697
+	.4byte	__func__.9696
 	.uleb128 0x32
-	.4byte	.LVL1048
-	.4byte	0x230c
-	.4byte	0x3eb0
+	.4byte	.LVL1056
+	.4byte	0x22fb
+	.4byte	0x3e9d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -31541,9 +31504,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1052
-	.4byte	0x61f9
-	.4byte	0x3ec4
+	.4byte	.LVL1060
+	.4byte	0x61df
+	.4byte	0x3eb1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -31552,12 +31515,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1053
-	.4byte	0x682c
-	.uleb128 0x32
 	.4byte	.LVL1061
-	.4byte	0x5e01
-	.4byte	0x3ee1
+	.4byte	0x6812
+	.uleb128 0x32
+	.4byte	.LVL1069
+	.4byte	0x5e03
+	.4byte	0x3ece
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31566,9 +31529,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1068
-	.4byte	0x5ddc
-	.4byte	0x3ef5
+	.4byte	.LVL1076
+	.4byte	0x5dde
+	.4byte	0x3ee2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31577,8 +31540,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1070
-	.4byte	0x928b
+	.4byte	.LVL1078
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31590,63 +31553,63 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR155
+	.4byte	.LANCHOR154
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x839
+	.2byte	0x86a
 	.byte	0
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x3f29
+	.4byte	0x3f16
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x11
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x3f19
+	.4byte	0x3f06
 	.uleb128 0x48
-	.4byte	.LASF676
+	.4byte	.LASF675
 	.byte	0x2
-	.2byte	0x7fc
+	.2byte	0x82d
 	.4byte	0x50
 	.4byte	.LFB287
 	.4byte	.LFE287-.LFB287
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3fc4
+	.4byte	0x3fb1
 	.uleb128 0x5d
 	.ascii	"p\000"
 	.byte	0x2
-	.2byte	0x7fc
-	.4byte	0x1d79
-	.4byte	.LLST95
+	.2byte	0x82d
+	.4byte	0x1d68
+	.4byte	.LLST86
 	.uleb128 0x54
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x2
-	.2byte	0x7fe
+	.2byte	0x82f
 	.4byte	0xdba
-	.4byte	.LLST96
+	.4byte	.LLST87
 	.uleb128 0x28
-	.4byte	.LASF597
+	.4byte	.LASF596
 	.byte	0x2
-	.2byte	0x7fe
+	.2byte	0x82f
 	.4byte	0xdba
 	.uleb128 0x1
 	.byte	0x5b
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x3339
+	.4byte	.LASF573
+	.4byte	0x3316
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.9676
+	.4byte	__func__.9675
 	.uleb128 0x32
-	.4byte	.LVL271
-	.4byte	0x928b
-	.4byte	0x3faa
+	.4byte	.LVL259
+	.4byte	0x92b5
+	.4byte	0x3f97
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31658,20 +31621,20 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR61
+	.4byte	.LANCHOR60
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x800
+	.2byte	0x831
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL274
-	.4byte	0x61f9
+	.4byte	.LVL262
+	.4byte	0x61df
 	.uleb128 0x34
-	.4byte	.LVL276
-	.4byte	0x682c
+	.4byte	.LVL264
+	.4byte	0x6812
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31681,19 +31644,19 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF677
+	.4byte	.LASF676
 	.byte	0x2
-	.2byte	0x7ef
+	.2byte	0x820
 	.4byte	0x50
 	.4byte	.LFB286
 	.4byte	.LFE286-.LFB286
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4048
+	.4byte	0x4035
 	.uleb128 0x32
-	.4byte	.LVL1693
-	.4byte	0x406e
-	.4byte	0x3ff2
+	.4byte	.LVL1697
+	.4byte	0x405b
+	.4byte	0x3fdf
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31702,9 +31665,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1694
-	.4byte	0x4048
-	.4byte	0x4006
+	.4byte	.LVL1698
+	.4byte	0x4035
+	.4byte	0x3ff3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31713,9 +31676,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1695
-	.4byte	0x406e
-	.4byte	0x401a
+	.4byte	.LVL1699
+	.4byte	0x405b
+	.4byte	0x4007
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31724,9 +31687,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1696
-	.4byte	0x4048
-	.4byte	0x402e
+	.4byte	.LVL1700
+	.4byte	0x4035
+	.4byte	0x401b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31735,11 +31698,11 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1697
-	.4byte	0x2d93
+	.4byte	.LVL1701
+	.4byte	0x2d79
 	.uleb128 0x34
-	.4byte	.LVL1698
-	.4byte	0x3259
+	.4byte	.LVL1702
+	.4byte	0x3236
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31749,225 +31712,225 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x64
-	.4byte	.LASF713
+	.4byte	.LASF712
 	.byte	0x2
-	.2byte	0x7dc
+	.2byte	0x80d
 	.byte	0x1
-	.4byte	0x406e
+	.4byte	0x405b
 	.uleb128 0x4a
-	.4byte	.LASF640
+	.4byte	.LASF639
 	.byte	0x2
-	.2byte	0x7dc
-	.4byte	0x1d79
+	.2byte	0x80d
+	.4byte	0x1d68
 	.uleb128 0x4b
-	.4byte	.LASF597
+	.4byte	.LASF596
 	.byte	0x2
-	.2byte	0x7de
+	.2byte	0x80f
 	.4byte	0xdba
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF678
+	.4byte	.LASF677
 	.byte	0x2
-	.2byte	0x677
+	.2byte	0x6a8
 	.4byte	0x50
 	.4byte	.LFB284
 	.4byte	.LFE284-.LFB284
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x45c7
+	.4byte	0x45b4
 	.uleb128 0x52
-	.4byte	.LASF614
+	.4byte	.LASF613
 	.byte	0x2
-	.2byte	0x677
-	.4byte	0x1d79
+	.2byte	0x6a8
+	.4byte	0x1d68
 	.4byte	.LLST315
 	.uleb128 0x54
-	.4byte	.LASF679
+	.4byte	.LASF678
 	.byte	0x2
-	.2byte	0x679
+	.2byte	0x6aa
 	.4byte	0xdba
 	.4byte	.LLST316
 	.uleb128 0x54
-	.4byte	.LASF680
+	.4byte	.LASF679
 	.byte	0x2
-	.2byte	0x679
+	.2byte	0x6aa
 	.4byte	0xdba
 	.4byte	.LLST317
 	.uleb128 0x54
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x2
-	.2byte	0x67a
+	.2byte	0x6ab
 	.4byte	0xdba
 	.4byte	.LLST318
 	.uleb128 0x54
 	.4byte	.LASF382
 	.byte	0x2
-	.2byte	0x67a
+	.2byte	0x6ab
 	.4byte	0xdba
 	.4byte	.LLST319
 	.uleb128 0x54
 	.4byte	.LASF380
 	.byte	0x2
-	.2byte	0x67a
+	.2byte	0x6ab
 	.4byte	0xdba
 	.4byte	.LLST320
 	.uleb128 0x54
-	.4byte	.LASF681
+	.4byte	.LASF680
 	.byte	0x2
-	.2byte	0x67b
+	.2byte	0x6ac
 	.4byte	0xdba
 	.4byte	.LLST321
 	.uleb128 0x54
-	.4byte	.LASF682
+	.4byte	.LASF681
 	.byte	0x2
-	.2byte	0x67b
+	.2byte	0x6ac
 	.4byte	0xdba
 	.4byte	.LLST322
 	.uleb128 0x54
-	.4byte	.LASF597
+	.4byte	.LASF596
 	.byte	0x2
-	.2byte	0x67c
+	.2byte	0x6ad
 	.4byte	0xdba
 	.4byte	.LLST323
 	.uleb128 0x54
-	.4byte	.LASF683
+	.4byte	.LASF682
 	.byte	0x2
-	.2byte	0x67d
+	.2byte	0x6ae
 	.4byte	0x50
 	.4byte	.LLST324
 	.uleb128 0x54
-	.4byte	.LASF684
+	.4byte	.LASF683
 	.byte	0x2
-	.2byte	0x67d
+	.2byte	0x6ae
 	.4byte	0x50
 	.4byte	.LLST324
 	.uleb128 0x54
-	.4byte	.LASF569
+	.4byte	.LASF568
 	.byte	0x2
-	.2byte	0x67e
+	.2byte	0x6af
 	.4byte	0xdba
 	.4byte	.LLST326
 	.uleb128 0x53
 	.ascii	"n\000"
 	.byte	0x2
-	.2byte	0x67e
+	.2byte	0x6af
 	.4byte	0xdba
 	.4byte	.LLST327
 	.uleb128 0x53
 	.ascii	"req\000"
 	.byte	0x2
-	.2byte	0x67e
+	.2byte	0x6af
 	.4byte	0xdba
 	.4byte	.LLST328
 	.uleb128 0x53
 	.ascii	"lpa\000"
 	.byte	0x2
-	.2byte	0x67f
+	.2byte	0x6b0
 	.4byte	0xdc5
 	.4byte	.LLST329
 	.uleb128 0x28
-	.4byte	.LASF664
+	.4byte	.LASF663
 	.byte	0x2
-	.2byte	0x67f
+	.2byte	0x6b0
 	.4byte	0xdc5
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -44
 	.uleb128 0x28
-	.4byte	.LASF625
+	.4byte	.LASF624
 	.byte	0x2
-	.2byte	0x67f
+	.2byte	0x6b0
 	.4byte	0xdc5
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -40
 	.uleb128 0x28
-	.4byte	.LASF616
+	.4byte	.LASF615
 	.byte	0x2
-	.2byte	0x67f
+	.2byte	0x6b0
 	.4byte	0xdc5
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -36
 	.uleb128 0x54
-	.4byte	.LASF630
+	.4byte	.LASF629
 	.byte	0x2
-	.2byte	0x680
+	.2byte	0x6b1
 	.4byte	0xdba
 	.4byte	.LLST330
 	.uleb128 0x54
-	.4byte	.LASF685
+	.4byte	.LASF684
 	.byte	0x2
-	.2byte	0x680
+	.2byte	0x6b1
 	.4byte	0xdba
 	.4byte	.LLST331
 	.uleb128 0x54
-	.4byte	.LASF686
+	.4byte	.LASF685
 	.byte	0x2
-	.2byte	0x681
+	.2byte	0x6b2
 	.4byte	0xdc5
 	.4byte	.LLST332
 	.uleb128 0x54
-	.4byte	.LASF687
+	.4byte	.LASF686
 	.byte	0x2
-	.2byte	0x682
+	.2byte	0x6b3
 	.4byte	0xdba
 	.4byte	.LLST333
 	.uleb128 0x54
-	.4byte	.LASF599
+	.4byte	.LASF598
 	.byte	0x2
-	.2byte	0x683
-	.4byte	0x2aca
+	.2byte	0x6b4
+	.4byte	0x2ab9
 	.4byte	.LLST334
 	.uleb128 0x62
-	.4byte	.LASF688
+	.4byte	.LASF687
 	.byte	0x2
-	.2byte	0x684
+	.2byte	0x6b5
 	.4byte	0xdc5
 	.byte	0
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x45d7
+	.4byte	.LASF573
+	.4byte	0x45c4
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.9619
+	.4byte	__func__.9618
 	.uleb128 0x58
-	.4byte	.LASF690
+	.4byte	.LASF689
 	.byte	0x2
-	.2byte	0x713
-	.4byte	.L1150
+	.2byte	0x744
+	.4byte	.L1155
 	.uleb128 0x58
-	.4byte	.LASF620
+	.4byte	.LASF619
 	.byte	0x2
-	.2byte	0x71b
-	.4byte	.L1165
+	.2byte	0x74c
+	.4byte	.L1170
 	.uleb128 0x58
-	.4byte	.LASF691
+	.4byte	.LASF690
 	.byte	0x2
-	.2byte	0x7ce
-	.4byte	.L1173
+	.2byte	0x7ff
+	.4byte	.L1178
 	.uleb128 0x4d
-	.4byte	.LASF692
+	.4byte	.LASF691
 	.byte	0x2
-	.2byte	0x7d8
+	.2byte	0x809
 	.uleb128 0x3e
-	.4byte	.Ldebug_ranges0+0x120
-	.4byte	0x427a
+	.4byte	.Ldebug_ranges0+0x168
+	.4byte	0x4267
 	.uleb128 0x54
-	.4byte	.LASF693
+	.4byte	.LASF692
 	.byte	0x2
-	.2byte	0x6eb
+	.2byte	0x71c
 	.4byte	0xdc5
 	.4byte	.LLST335
 	.uleb128 0x54
-	.4byte	.LASF694
+	.4byte	.LASF693
 	.byte	0x2
-	.2byte	0x6ec
+	.2byte	0x71d
 	.4byte	0xdc5
 	.4byte	.LLST336
 	.uleb128 0x34
-	.4byte	.LVL1346
-	.4byte	0x26b9
+	.4byte	.LVL1354
+	.4byte	0x26a8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -31982,24 +31945,24 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x3e
-	.4byte	.Ldebug_ranges0+0x138
-	.4byte	0x434f
+	.4byte	.Ldebug_ranges0+0x180
+	.4byte	0x433c
 	.uleb128 0x54
-	.4byte	.LASF695
+	.4byte	.LASF694
 	.byte	0x2
-	.2byte	0x746
+	.2byte	0x777
 	.4byte	0xdc5
 	.4byte	.LLST337
 	.uleb128 0x54
-	.4byte	.LASF696
+	.4byte	.LASF695
 	.byte	0x2
-	.2byte	0x747
+	.2byte	0x778
 	.4byte	0xdc5
 	.4byte	.LLST338
 	.uleb128 0x32
-	.4byte	.LVL1390
-	.4byte	0x26b9
-	.4byte	0x42bb
+	.4byte	.LVL1398
+	.4byte	0x26a8
+	.4byte	0x42a8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32012,12 +31975,12 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1392
-	.4byte	0x3259
+	.4byte	.LVL1400
+	.4byte	0x3236
 	.uleb128 0x32
-	.4byte	.LVL1398
-	.4byte	0x5279
-	.4byte	0x42e3
+	.4byte	.LVL1406
+	.4byte	0x526b
+	.4byte	0x42d0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32037,9 +32000,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1400
-	.4byte	0x6144
-	.4byte	0x42f7
+	.4byte	.LVL1408
+	.4byte	0x612a
+	.4byte	0x42e4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32048,9 +32011,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1401
-	.4byte	0x45dc
-	.4byte	0x430b
+	.4byte	.LVL1409
+	.4byte	0x45c9
+	.4byte	0x42f8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32059,9 +32022,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1403
-	.4byte	0x26b9
-	.4byte	0x4323
+	.4byte	.LVL1411
+	.4byte	0x26a8
+	.4byte	0x4310
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32074,9 +32037,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1405
-	.4byte	0x6144
-	.4byte	0x4337
+	.4byte	.LVL1413
+	.4byte	0x612a
+	.4byte	0x4324
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32085,8 +32048,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1406
-	.4byte	0x6144
+	.4byte	.LVL1414
+	.4byte	0x612a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32103,25 +32066,25 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x61
-	.4byte	.LBB275
-	.4byte	.LBE275-.LBB275
-	.4byte	0x43cb
+	.4byte	.LBB308
+	.4byte	.LBE308-.LBB308
+	.4byte	0x43b8
 	.uleb128 0x54
-	.4byte	.LASF697
+	.4byte	.LASF696
 	.byte	0x2
-	.2byte	0x785
+	.2byte	0x7b6
 	.4byte	0xdc5
 	.4byte	.LLST339
 	.uleb128 0x54
-	.4byte	.LASF696
+	.4byte	.LASF695
 	.byte	0x2
-	.2byte	0x786
+	.2byte	0x7b7
 	.4byte	0xdc5
 	.4byte	.LLST340
 	.uleb128 0x32
-	.4byte	.LVL1415
-	.4byte	0x26b9
-	.4byte	0x4394
+	.4byte	.LVL1423
+	.4byte	0x26a8
+	.4byte	0x4381
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32134,9 +32097,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1416
-	.4byte	0x6144
-	.4byte	0x43af
+	.4byte	.LVL1424
+	.4byte	0x612a
+	.4byte	0x439c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32152,8 +32115,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1418
-	.4byte	0x5279
+	.4byte	.LVL1426
+	.4byte	0x526b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32174,9 +32137,9 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1295
-	.4byte	0x6078
-	.4byte	0x43de
+	.4byte	.LVL1303
+	.4byte	0x605e
+	.4byte	0x43cb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32184,9 +32147,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1301
-	.4byte	0x26b9
-	.4byte	0x43f7
+	.4byte	.LVL1309
+	.4byte	0x26a8
+	.4byte	0x43e4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32200,12 +32163,12 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1307
-	.4byte	0x61c1
+	.4byte	.LVL1315
+	.4byte	0x61a7
 	.uleb128 0x32
-	.4byte	.LVL1310
-	.4byte	0x46f4
-	.4byte	0x4414
+	.4byte	.LVL1318
+	.4byte	0x46e1
+	.4byte	0x4401
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32214,9 +32177,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1314
-	.4byte	0x928b
-	.4byte	0x443b
+	.4byte	.LVL1322
+	.4byte	0x92b5
+	.4byte	0x4428
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32228,18 +32191,18 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR161
+	.4byte	.LANCHOR160
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x6aa
+	.2byte	0x6db
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1315
-	.4byte	0x928b
-	.4byte	0x4462
+	.4byte	.LVL1323
+	.4byte	0x92b5
+	.4byte	0x444f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32251,18 +32214,18 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR161
+	.4byte	.LANCHOR160
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x6ab
+	.2byte	0x6dc
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1327
-	.4byte	0x6144
-	.4byte	0x447c
+	.4byte	.LVL1335
+	.4byte	0x612a
+	.4byte	0x4469
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32277,9 +32240,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1351
-	.4byte	0x4f28
-	.4byte	0x4493
+	.4byte	.LVL1359
+	.4byte	0x4f1a
+	.4byte	0x4480
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32288,9 +32251,9 @@ __func__.9940:
 	.4byte	.LANCHOR144
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1354
-	.4byte	0x26b9
-	.4byte	0x44ae
+	.4byte	.LVL1362
+	.4byte	0x26a8
+	.4byte	0x449b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32305,9 +32268,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1374
-	.4byte	0x61c1
-	.4byte	0x44c8
+	.4byte	.LVL1382
+	.4byte	0x61a7
+	.4byte	0x44b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32322,12 +32285,12 @@ __func__.9940:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1379
-	.4byte	0x3259
+	.4byte	.LVL1387
+	.4byte	0x3236
 	.uleb128 0x32
-	.4byte	.LVL1384
-	.4byte	0x6144
-	.4byte	0x44ec
+	.4byte	.LVL1392
+	.4byte	0x612a
+	.4byte	0x44d9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32343,9 +32306,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1387
-	.4byte	0x5279
-	.4byte	0x450b
+	.4byte	.LVL1395
+	.4byte	0x526b
+	.4byte	0x44f8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32365,9 +32328,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1388
-	.4byte	0x6144
-	.4byte	0x4526
+	.4byte	.LVL1396
+	.4byte	0x612a
+	.4byte	0x4513
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32383,9 +32346,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1393
-	.4byte	0x6189
-	.4byte	0x4540
+	.4byte	.LVL1401
+	.4byte	0x616f
+	.4byte	0x452d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32400,9 +32363,9 @@ __func__.9940:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1396
-	.4byte	0x928b
-	.4byte	0x4567
+	.4byte	.LVL1404
+	.4byte	0x92b5
+	.4byte	0x4554
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32414,18 +32377,18 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR161
+	.4byte	.LANCHOR160
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x7a5
+	.2byte	0x7d6
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1410
-	.4byte	0x5279
-	.4byte	0x4586
+	.4byte	.LVL1418
+	.4byte	0x526b
+	.4byte	0x4573
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32445,9 +32408,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1411
-	.4byte	0x6189
-	.4byte	0x45a0
+	.4byte	.LVL1419
+	.4byte	0x616f
+	.4byte	0x458d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32462,15 +32425,15 @@ __func__.9940:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1420
-	.4byte	0x928b
-	.4byte	0x45bd
+	.4byte	.LVL1428
+	.4byte	0x92b5
+	.4byte	0x45aa
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC99
+	.4byte	.LC102
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32479,76 +32442,76 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1423
-	.4byte	0x3259
+	.4byte	.LVL1431
+	.4byte	0x3236
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x45d7
+	.4byte	0x45c4
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x15
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x45c7
+	.4byte	0x45b4
 	.uleb128 0x5f
-	.4byte	.LASF698
+	.4byte	.LASF697
 	.byte	0x2
-	.2byte	0x65b
+	.2byte	0x68c
 	.4byte	.LFB283
 	.4byte	.LFE283-.LFB283
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x46f4
+	.4byte	0x46e1
 	.uleb128 0x5d
 	.ascii	"lpa\000"
 	.byte	0x2
-	.2byte	0x65b
+	.2byte	0x68c
 	.4byte	0xdc5
 	.4byte	.LLST233
 	.uleb128 0x52
-	.4byte	.LASF664
+	.4byte	.LASF663
 	.byte	0x2
-	.2byte	0x65b
+	.2byte	0x68c
 	.4byte	0xdc5
 	.4byte	.LLST234
 	.uleb128 0x54
-	.4byte	.LASF630
+	.4byte	.LASF629
 	.byte	0x2
-	.2byte	0x65d
+	.2byte	0x68e
 	.4byte	0xdba
 	.4byte	.LLST235
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x3339
+	.4byte	.LASF573
+	.4byte	0x3316
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.9585
+	.4byte	__func__.9584
 	.uleb128 0x3e
-	.4byte	.Ldebug_ranges0+0xa0
-	.4byte	0x46bd
+	.4byte	.Ldebug_ranges0+0xe8
+	.4byte	0x46aa
 	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x2
-	.2byte	0x661
+	.2byte	0x692
 	.4byte	0xdba
 	.4byte	.LLST236
 	.uleb128 0x54
-	.4byte	.LASF587
+	.4byte	.LASF586
 	.byte	0x2
-	.2byte	0x662
+	.2byte	0x693
 	.4byte	0xdba
 	.4byte	.LLST237
 	.uleb128 0x54
 	.4byte	.LASF236
 	.byte	0x2
-	.2byte	0x663
+	.2byte	0x694
 	.4byte	0xdba
 	.4byte	.LLST238
 	.uleb128 0x32
-	.4byte	.LVL899
-	.4byte	0x5c31
-	.4byte	0x4685
+	.4byte	.LVL907
+	.4byte	0x5c23
+	.4byte	0x4672
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32563,9 +32526,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL900
-	.4byte	0x928b
-	.4byte	0x46ac
+	.4byte	.LVL908
+	.4byte	0x92b5
+	.4byte	0x4699
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32583,11 +32546,11 @@ __func__.9940:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x667
+	.2byte	0x698
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL901
-	.4byte	0x5ddc
+	.4byte	.LVL909
+	.4byte	0x5dde
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32597,9 +32560,9 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL893
-	.4byte	0x6189
-	.4byte	0x46d8
+	.4byte	.LVL901
+	.4byte	0x616f
+	.4byte	0x46c5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32615,8 +32578,8 @@ __func__.9940:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL907
-	.4byte	0x5279
+	.4byte	.LVL915
+	.4byte	0x526b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32637,56 +32600,56 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x5f
-	.4byte	.LASF699
+	.4byte	.LASF698
 	.byte	0x2
-	.2byte	0x647
+	.2byte	0x678
 	.4byte	.LFB282
 	.4byte	.LFE282-.LFB282
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4749
+	.4byte	0x4736
 	.uleb128 0x65
-	.4byte	.LASF614
+	.4byte	.LASF613
 	.byte	0x2
-	.2byte	0x647
-	.4byte	0x1d79
+	.2byte	0x678
+	.4byte	0x1d68
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x52
 	.4byte	.LASF380
 	.byte	0x2
-	.2byte	0x647
+	.2byte	0x678
 	.4byte	0xdba
-	.4byte	.LLST90
+	.4byte	.LLST81
 	.uleb128 0x52
 	.4byte	.LASF382
 	.byte	0x2
-	.2byte	0x647
+	.2byte	0x678
 	.4byte	0xdba
-	.4byte	.LLST91
+	.4byte	.LLST82
 	.uleb128 0x54
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x2
-	.2byte	0x649
+	.2byte	0x67a
 	.4byte	0xdba
-	.4byte	.LLST92
+	.4byte	.LLST83
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF700
+	.4byte	.LASF699
 	.byte	0x2
-	.2byte	0x63e
+	.2byte	0x66f
 	.4byte	0x50
 	.4byte	.LFB281
 	.4byte	.LFE281-.LFB281
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4780
+	.4byte	0x476d
 	.uleb128 0x44
-	.4byte	.LVL1039
-	.4byte	0x4780
+	.4byte	.LVL1047
+	.4byte	0x476d
 	.uleb128 0x34
-	.4byte	.LVL1040
-	.4byte	0x47f8
+	.4byte	.LVL1048
+	.4byte	0x47e5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32696,24 +32659,24 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x5f
-	.4byte	.LASF701
+	.4byte	.LASF700
 	.byte	0x2
-	.2byte	0x627
+	.2byte	0x658
 	.4byte	.LFB280
 	.4byte	.LFE280-.LFB280
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x47ca
+	.4byte	0x47b7
 	.uleb128 0x54
 	.4byte	.LASF330
 	.byte	0x2
-	.2byte	0x629
+	.2byte	0x65a
 	.4byte	0xdba
 	.4byte	.LLST259
 	.uleb128 0x32
-	.4byte	.LVL1036
-	.4byte	0x230c
-	.4byte	0x47b9
+	.4byte	.LVL1044
+	.4byte	0x22fb
+	.4byte	0x47a6
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32721,8 +32684,8 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1037
-	.4byte	0x230c
+	.4byte	.LVL1045
+	.4byte	0x22fb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32732,18 +32695,18 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF702
+	.4byte	.LASF701
 	.byte	0x2
-	.2byte	0x617
+	.2byte	0x648
 	.4byte	0x50
 	.4byte	.LFB279
 	.4byte	.LFE279-.LFB279
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x47f8
+	.4byte	0x47e5
 	.uleb128 0x34
-	.4byte	.LVL1035
-	.4byte	0x47f8
+	.4byte	.LVL1043
+	.4byte	0x47e5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32753,88 +32716,88 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF703
+	.4byte	.LASF702
 	.byte	0x2
-	.2byte	0x5b9
+	.2byte	0x5ea
 	.4byte	0x50
 	.4byte	.LFB278
 	.4byte	.LFE278-.LFB278
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x499b
+	.4byte	0x4988
 	.uleb128 0x52
-	.4byte	.LASF704
+	.4byte	.LASF703
 	.byte	0x2
-	.2byte	0x5b9
-	.4byte	0x499b
+	.2byte	0x5ea
+	.4byte	0x4988
 	.4byte	.LLST251
 	.uleb128 0x54
-	.4byte	.LASF705
+	.4byte	.LASF704
 	.byte	0x2
-	.2byte	0x5bb
+	.2byte	0x5ec
 	.4byte	0xddb
 	.4byte	.LLST252
 	.uleb128 0x54
 	.4byte	.LASF299
 	.byte	0x2
-	.2byte	0x5bb
+	.2byte	0x5ec
 	.4byte	0xddb
 	.4byte	.LLST253
 	.uleb128 0x54
-	.4byte	.LASF706
+	.4byte	.LASF705
 	.byte	0x2
-	.2byte	0x5bc
+	.2byte	0x5ed
 	.4byte	0xddb
 	.4byte	.LLST254
 	.uleb128 0x54
 	.4byte	.LASF330
 	.byte	0x2
-	.2byte	0x5bd
+	.2byte	0x5ee
 	.4byte	0xdba
 	.4byte	.LLST255
 	.uleb128 0x28
-	.4byte	.LASF707
+	.4byte	.LASF706
 	.byte	0x2
-	.2byte	0x5be
+	.2byte	0x5ef
 	.4byte	0xff2
 	.uleb128 0x1
 	.byte	0x58
 	.uleb128 0x54
 	.4byte	.LASF310
 	.byte	0x2
-	.2byte	0x5bf
+	.2byte	0x5f0
 	.4byte	0x10e9
 	.4byte	.LLST256
 	.uleb128 0x54
 	.4byte	.LASF311
 	.byte	0x2
-	.2byte	0x5c0
+	.2byte	0x5f1
 	.4byte	0xff2
 	.4byte	.LLST257
 	.uleb128 0x28
 	.4byte	.LASF307
 	.byte	0x2
-	.2byte	0x5c1
+	.2byte	0x5f2
 	.4byte	0xdba
 	.uleb128 0x1
 	.byte	0x5b
 	.uleb128 0x54
-	.4byte	.LASF708
+	.4byte	.LASF707
 	.byte	0x2
-	.2byte	0x5c2
+	.2byte	0x5f3
 	.4byte	0xdba
 	.4byte	.LLST258
 	.uleb128 0x28
-	.4byte	.LASF709
+	.4byte	.LASF708
 	.byte	0x2
-	.2byte	0x5c3
-	.4byte	0x49a1
+	.2byte	0x5f4
+	.4byte	0x498e
 	.uleb128 0x1
 	.byte	0x57
 	.uleb128 0x32
-	.4byte	.LVL999
-	.4byte	0x230c
-	.4byte	0x48de
+	.4byte	.LVL1007
+	.4byte	0x22fb
+	.4byte	0x48cb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32857,9 +32820,9 @@ __func__.9940:
 	.byte	0x24
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1004
-	.4byte	0x6078
-	.4byte	0x48f1
+	.4byte	.LVL1012
+	.4byte	0x605e
+	.4byte	0x48de
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32867,9 +32830,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1010
-	.4byte	0x58a4
-	.4byte	0x4905
+	.4byte	.LVL1018
+	.4byte	0x5896
+	.4byte	0x48f2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32878,9 +32841,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1011
-	.4byte	0x584c
-	.4byte	0x4919
+	.4byte	.LVL1019
+	.4byte	0x583e
+	.4byte	0x4906
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32889,9 +32852,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1012
-	.4byte	0x5702
-	.4byte	0x492d
+	.4byte	.LVL1020
+	.4byte	0x56f4
+	.4byte	0x491a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32900,9 +32863,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1013
-	.4byte	0x5702
-	.4byte	0x4941
+	.4byte	.LVL1021
+	.4byte	0x56f4
+	.4byte	0x492e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32911,15 +32874,15 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1016
-	.4byte	0x26b9
-	.4byte	0x4962
+	.4byte	.LVL1024
+	.4byte	0x26a8
+	.4byte	0x494f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR108
+	.4byte	.LANCHOR106
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32932,9 +32895,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1021
-	.4byte	0x26b9
-	.4byte	0x4980
+	.4byte	.LVL1029
+	.4byte	0x26a8
+	.4byte	0x496d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32953,8 +32916,8 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1025
-	.4byte	0x26b9
+	.4byte	.LVL1033
+	.4byte	0x26a8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32980,31 +32943,31 @@ __func__.9940:
 	.byte	0x4
 	.4byte	0x1271
 	.uleb128 0x5c
-	.4byte	.LASF710
+	.4byte	.LASF709
 	.byte	0x2
-	.2byte	0x54f
+	.2byte	0x580
 	.4byte	0x50
 	.4byte	.LFB277
 	.4byte	.LFE277-.LFB277
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4b15
+	.4byte	0x4b02
 	.uleb128 0x54
-	.4byte	.LASF706
+	.4byte	.LASF705
 	.byte	0x2
-	.2byte	0x551
+	.2byte	0x582
 	.4byte	0xddb
-	.4byte	.LLST448
+	.4byte	.LLST447
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x26b4
+	.4byte	.LASF573
+	.4byte	0x26a3
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.9522
+	.4byte	__func__.9521
 	.uleb128 0x32
-	.4byte	.LVL1966
-	.4byte	0x230c
-	.4byte	0x49f3
+	.4byte	.LVL1954
+	.4byte	0x22fb
+	.4byte	0x49e0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -33012,9 +32975,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1967
-	.4byte	0x6078
-	.4byte	0x4a06
+	.4byte	.LVL1955
+	.4byte	0x605e
+	.4byte	0x49f3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -33022,9 +32985,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1969
-	.4byte	0x928b
-	.4byte	0x4a2d
+	.4byte	.LVL1957
+	.4byte	0x92b5
+	.4byte	0x4a1a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33036,18 +32999,18 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR181
+	.4byte	.LANCHOR179
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x56c
+	.2byte	0x59d
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1970
-	.4byte	0x928b
-	.4byte	0x4a54
+	.4byte	.LVL1958
+	.4byte	0x92b5
+	.4byte	0x4a41
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33059,18 +33022,18 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR181
+	.4byte	.LANCHOR179
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x56e
+	.2byte	0x59f
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1972
-	.4byte	0x22a6
-	.4byte	0x4a6e
+	.4byte	.LVL1960
+	.4byte	0x2295
+	.4byte	0x4a5b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33085,15 +33048,15 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1973
-	.4byte	0x22a6
+	.4byte	.LVL1961
+	.4byte	0x2295
 	.uleb128 0x44
-	.4byte	.LVL1974
-	.4byte	0x22a6
+	.4byte	.LVL1962
+	.4byte	0x2295
 	.uleb128 0x32
-	.4byte	.LVL1976
-	.4byte	0x928b
-	.4byte	0x4aa7
+	.4byte	.LVL1964
+	.4byte	0x92b5
+	.4byte	0x4a94
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33105,18 +33068,18 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR181
+	.4byte	.LANCHOR179
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x584
+	.2byte	0x5b5
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1977
-	.4byte	0x3f2e
-	.4byte	0x4abe
+	.4byte	.LVL1965
+	.4byte	0x3f1b
+	.4byte	0x4aab
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33125,9 +33088,9 @@ __func__.9940:
 	.4byte	.LANCHOR51
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1978
-	.4byte	0x3f2e
-	.4byte	0x4ad2
+	.4byte	.LVL1966
+	.4byte	0x3f1b
+	.4byte	0x4abf
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33136,9 +33099,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1979
-	.4byte	0x3f2e
-	.4byte	0x4ae6
+	.4byte	.LVL1967
+	.4byte	0x3f1b
+	.4byte	0x4ad3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33147,9 +33110,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1980
-	.4byte	0x3f2e
-	.4byte	0x4afa
+	.4byte	.LVL1968
+	.4byte	0x3f1b
+	.4byte	0x4ae7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33158,8 +33121,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1982
-	.4byte	0x26b9
+	.4byte	.LVL1970
+	.4byte	0x26a8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33179,65 +33142,65 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF711
+	.4byte	.LASF710
 	.byte	0x2
-	.2byte	0x54a
+	.2byte	0x57b
 	.4byte	0x50
 	.4byte	.LFB276
 	.4byte	.LFE276-.LFB276
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4b40
+	.4byte	0x4b2d
 	.uleb128 0x52
-	.4byte	.LASF712
+	.4byte	.LASF711
 	.byte	0x2
-	.2byte	0x54a
+	.2byte	0x57b
 	.4byte	0xdba
-	.4byte	.LLST89
+	.4byte	.LLST80
 	.byte	0
 	.uleb128 0x64
-	.4byte	.LASF714
+	.4byte	.LASF713
 	.byte	0x2
-	.2byte	0x542
+	.2byte	0x573
 	.byte	0x1
-	.4byte	0x4b66
+	.4byte	0x4b53
 	.uleb128 0x4a
-	.4byte	.LASF712
+	.4byte	.LASF711
 	.byte	0x2
-	.2byte	0x542
+	.2byte	0x573
 	.4byte	0xdba
 	.uleb128 0x4a
-	.4byte	.LASF591
+	.4byte	.LASF590
 	.byte	0x2
-	.2byte	0x542
+	.2byte	0x573
 	.4byte	0x50
 	.byte	0
 	.uleb128 0x51
-	.4byte	.LASF716
+	.4byte	.LASF715
 	.byte	0x2
-	.2byte	0x535
+	.2byte	0x566
 	.4byte	0x50
 	.byte	0x1
 	.uleb128 0x48
-	.4byte	.LASF717
+	.4byte	.LASF716
 	.byte	0x2
-	.2byte	0x446
+	.2byte	0x477
 	.4byte	0x50
 	.4byte	.LFB273
 	.4byte	.LFE273-.LFB273
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4d75
+	.4byte	0x4d67
 	.uleb128 0x54
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x2
-	.2byte	0x448
+	.2byte	0x479
 	.4byte	0xdba
 	.4byte	.LLST245
 	.uleb128 0x28
-	.4byte	.LASF718
+	.4byte	.LASF717
 	.byte	0x2
-	.2byte	0x448
+	.2byte	0x479
 	.4byte	0xdba
 	.uleb128 0x2
 	.byte	0x91
@@ -33245,43 +33208,43 @@ __func__.9940:
 	.uleb128 0x54
 	.4byte	.LASF388
 	.byte	0x2
-	.2byte	0x449
+	.2byte	0x47a
 	.4byte	0xdba
 	.4byte	.LLST246
 	.uleb128 0x54
-	.4byte	.LASF569
+	.4byte	.LASF568
 	.byte	0x2
-	.2byte	0x449
+	.2byte	0x47a
 	.4byte	0xdba
 	.4byte	.LLST247
 	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x2
-	.2byte	0x44a
+	.2byte	0x47b
 	.4byte	0xddb
 	.4byte	.LLST248
 	.uleb128 0x53
 	.ascii	"j\000"
 	.byte	0x2
-	.2byte	0x44a
+	.2byte	0x47b
 	.4byte	0xddb
 	.4byte	.LLST249
 	.uleb128 0x54
-	.4byte	.LASF719
+	.4byte	.LASF718
 	.byte	0x2
-	.2byte	0x44b
-	.4byte	0x49a1
+	.2byte	0x47c
+	.4byte	0x498e
 	.4byte	.LLST250
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x3bfa
+	.4byte	.LASF573
+	.4byte	0x3be7
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.9465
+	.4byte	__func__.9464
 	.uleb128 0x32
-	.4byte	.LVL937
-	.4byte	0x230c
-	.4byte	0x4c1b
+	.4byte	.LVL945
+	.4byte	0x22fb
+	.4byte	0x4c08
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -33290,9 +33253,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL938
-	.4byte	0x230c
-	.4byte	0x4c2f
+	.4byte	.LVL946
+	.4byte	0x22fb
+	.4byte	0x4c1c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -33301,9 +33264,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL939
-	.4byte	0x230c
-	.4byte	0x4c43
+	.4byte	.LVL947
+	.4byte	0x22fb
+	.4byte	0x4c30
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -33312,9 +33275,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL940
-	.4byte	0x230c
-	.4byte	0x4c57
+	.4byte	.LVL948
+	.4byte	0x22fb
+	.4byte	0x4c44
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -33323,15 +33286,15 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL941
-	.4byte	0x230c
-	.4byte	0x4c79
+	.4byte	.LVL949
+	.4byte	0x22fb
+	.4byte	0x4c66
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR81
+	.4byte	.LANCHOR79
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -33345,9 +33308,9 @@ __func__.9940:
 	.byte	0x3c
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL944
-	.4byte	0x61f9
-	.4byte	0x4c8f
+	.4byte	.LVL952
+	.4byte	0x61df
+	.4byte	0x4c7c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -33358,9 +33321,9 @@ __func__.9940:
 	.byte	0x2
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL946
-	.4byte	0x682c
-	.4byte	0x4ca5
+	.4byte	.LVL954
+	.4byte	0x6812
+	.4byte	0x4c92
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33371,9 +33334,9 @@ __func__.9940:
 	.byte	0x2
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL952
-	.4byte	0x26b9
-	.4byte	0x4cc4
+	.4byte	.LVL960
+	.4byte	0x26a8
+	.4byte	0x4cb1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33393,9 +33356,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL955
-	.4byte	0x26b9
-	.4byte	0x4cdc
+	.4byte	.LVL963
+	.4byte	0x26a8
+	.4byte	0x4cc9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -33408,20 +33371,25 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL963
-	.4byte	0x5f68
-	.4byte	0x4cf0
+	.4byte	.LVL965
+	.4byte	0x5fb2
+	.4byte	0x4ce2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL964
-	.4byte	0x928b
-	.4byte	0x4d17
+	.4byte	.LVL972
+	.4byte	0x92b5
+	.4byte	0x4d09
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33439,12 +33407,12 @@ __func__.9940:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x48a
+	.2byte	0x4bb
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL973
-	.4byte	0x928b
-	.4byte	0x4d3e
+	.4byte	.LVL981
+	.4byte	0x92b5
+	.4byte	0x4d30
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33462,12 +33430,12 @@ __func__.9940:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x4b3
+	.2byte	0x4e4
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL982
-	.4byte	0x5f68
-	.4byte	0x4d51
+	.4byte	.LVL990
+	.4byte	0x5fb2
+	.4byte	0x4d43
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -33475,8 +33443,8 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL984
-	.4byte	0x928b
+	.4byte	.LVL992
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33494,51 +33462,51 @@ __func__.9940:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x530
+	.2byte	0x561
 	.byte	0
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF720
+	.4byte	.LASF719
 	.byte	0x2
-	.2byte	0x3eb
+	.2byte	0x41c
 	.4byte	0x50
 	.4byte	.LFB272
 	.4byte	.LFE272-.LFB272
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4ed6
+	.4byte	0x4ec8
 	.uleb128 0x54
 	.4byte	.LASF300
 	.byte	0x2
-	.2byte	0x3ed
+	.2byte	0x41e
 	.4byte	0xdba
-	.4byte	.LLST370
+	.4byte	.LLST369
 	.uleb128 0x54
-	.4byte	.LASF721
+	.4byte	.LASF720
 	.byte	0x2
-	.2byte	0x3ee
-	.4byte	0x4ed6
-	.4byte	.LLST371
+	.2byte	0x41f
+	.4byte	0x4ec8
+	.4byte	.LLST370
 	.uleb128 0x54
-	.4byte	.LASF722
+	.4byte	.LASF721
 	.byte	0x2
-	.2byte	0x3ef
+	.2byte	0x420
 	.4byte	0xdba
-	.4byte	.LLST372
+	.4byte	.LLST371
 	.uleb128 0x4d
-	.4byte	.LASF723
+	.4byte	.LASF722
 	.byte	0x2
-	.2byte	0x41c
+	.2byte	0x44d
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x26b4
+	.4byte	.LASF573
+	.4byte	0x26a3
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.9443
+	.4byte	__func__.9442
 	.uleb128 0x32
-	.4byte	.LVL1561
-	.4byte	0x230c
-	.4byte	0x4dea
+	.4byte	.LVL1568
+	.4byte	0x22fb
+	.4byte	0x4ddc
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -33547,15 +33515,15 @@ __func__.9940:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1562
-	.4byte	0x22a6
-	.4byte	0x4e07
+	.4byte	.LVL1569
+	.4byte	0x2295
+	.4byte	0x4df9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR79
+	.4byte	.LANCHOR39
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
@@ -33564,15 +33532,15 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1563
-	.4byte	0x22a6
+	.4byte	.LVL1570
+	.4byte	0x2295
 	.uleb128 0x44
-	.4byte	.LVL1564
-	.4byte	0x22a6
+	.4byte	.LVL1571
+	.4byte	0x2295
 	.uleb128 0x32
-	.4byte	.LVL1565
-	.4byte	0x4fc2
-	.4byte	0x4e2d
+	.4byte	.LVL1572
+	.4byte	0x4fb4
+	.4byte	0x4e1f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33581,9 +33549,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1567
-	.4byte	0x251a
-	.4byte	0x4e50
+	.4byte	.LVL1574
+	.4byte	0x2509
+	.4byte	0x4e42
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33607,12 +33575,12 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1569
-	.4byte	0x5e26
+	.4byte	.LVL1576
+	.4byte	0x5e28
 	.uleb128 0x32
-	.4byte	.LVL1570
-	.4byte	0x251a
-	.4byte	0x4e7c
+	.4byte	.LVL1577
+	.4byte	0x2509
+	.4byte	0x4e6e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33636,9 +33604,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1571
-	.4byte	0x928b
-	.4byte	0x4ea3
+	.4byte	.LVL1578
+	.4byte	0x92b5
+	.4byte	0x4e95
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33650,24 +33618,24 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR167
+	.4byte	.LANCHOR166
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x433
+	.2byte	0x464
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1574
-	.4byte	0x928b
-	.4byte	0x4ec0
+	.4byte	.LVL1581
+	.4byte	0x92b5
+	.4byte	0x4eb2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC101
+	.4byte	.LC104
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
@@ -33676,8 +33644,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1575
-	.4byte	0x5f68
+	.4byte	.LVL1582
+	.4byte	0x5fb2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33695,76 +33663,76 @@ __func__.9940:
 	.byte	0x4
 	.4byte	0x12c9
 	.uleb128 0x64
-	.4byte	.LASF724
+	.4byte	.LASF723
 	.byte	0x2
-	.2byte	0x3b2
+	.2byte	0x3e3
 	.byte	0x1
-	.4byte	0x4f28
+	.4byte	0x4f1a
 	.uleb128 0x4f
 	.uleb128 0x4c
 	.ascii	"lpa\000"
 	.byte	0x2
-	.2byte	0x3b7
+	.2byte	0x3e8
 	.4byte	0xdc5
 	.uleb128 0x4c
 	.ascii	"ppa\000"
 	.byte	0x2
-	.2byte	0x3b8
+	.2byte	0x3e9
 	.4byte	0xdc5
 	.uleb128 0x4b
-	.4byte	.LASF725
+	.4byte	.LASF724
 	.byte	0x2
-	.2byte	0x3b9
+	.2byte	0x3ea
 	.4byte	0xdc5
 	.uleb128 0x4b
-	.4byte	.LASF668
+	.4byte	.LASF667
 	.byte	0x2
-	.2byte	0x3ba
+	.2byte	0x3eb
 	.4byte	0xde6
 	.uleb128 0x4b
-	.4byte	.LASF599
+	.4byte	.LASF598
 	.byte	0x2
-	.2byte	0x3bb
-	.4byte	0x2aca
+	.2byte	0x3ec
+	.4byte	0x2ab9
 	.byte	0
 	.byte	0
 	.uleb128 0x5f
-	.4byte	.LASF726
+	.4byte	.LASF725
 	.byte	0x2
-	.2byte	0x380
+	.2byte	0x3b1
 	.4byte	.LFB270
 	.4byte	.LFE270-.LFB270
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4fc2
+	.4byte	0x4fb4
 	.uleb128 0x52
-	.4byte	.LASF704
+	.4byte	.LASF703
 	.byte	0x2
-	.2byte	0x380
-	.4byte	0x499b
+	.2byte	0x3b1
+	.4byte	0x4988
 	.4byte	.LLST241
 	.uleb128 0x53
 	.ascii	"ppa\000"
 	.byte	0x2
-	.2byte	0x382
+	.2byte	0x3b3
 	.4byte	0xdc5
 	.4byte	.LLST242
 	.uleb128 0x54
 	.4byte	.LASF317
 	.byte	0x2
-	.2byte	0x383
+	.2byte	0x3b4
 	.4byte	0xdba
 	.4byte	.LLST243
 	.uleb128 0x54
-	.4byte	.LASF707
+	.4byte	.LASF706
 	.byte	0x2
-	.2byte	0x384
+	.2byte	0x3b5
 	.4byte	0xff2
 	.4byte	.LLST244
 	.uleb128 0x32
-	.4byte	.LVL931
-	.4byte	0x26b9
-	.4byte	0x4f9c
+	.4byte	.LVL939
+	.4byte	0x26a8
+	.4byte	0x4f8e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33783,9 +33751,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x43
-	.4byte	.LVL933
-	.4byte	0x547e
-	.4byte	0x4fb1
+	.4byte	.LVL941
+	.4byte	0x5470
+	.4byte	0x4fa3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33795,8 +33763,8 @@ __func__.9940:
 	.byte	0x50
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL935
-	.4byte	0x230c
+	.4byte	.LVL943
+	.4byte	0x22fb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -33806,48 +33774,48 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x64
-	.4byte	.LASF727
+	.4byte	.LASF726
 	.byte	0x2
-	.2byte	0x371
+	.2byte	0x3a2
 	.byte	0x1
-	.4byte	0x4fe6
+	.4byte	0x4fd8
 	.uleb128 0x4a
 	.4byte	.LASF393
 	.byte	0x2
-	.2byte	0x371
+	.2byte	0x3a2
 	.4byte	0xdc5
 	.uleb128 0x4c
 	.ascii	"i\000"
 	.byte	0x2
-	.2byte	0x373
+	.2byte	0x3a4
 	.4byte	0xdba
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF728
+	.4byte	.LASF727
 	.byte	0x2
-	.2byte	0x35c
+	.2byte	0x38d
 	.4byte	0x50
 	.4byte	.LFB268
 	.4byte	.LFE268-.LFB268
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x503e
+	.4byte	0x5030
 	.uleb128 0x52
-	.4byte	.LASF729
+	.4byte	.LASF728
 	.byte	0x2
-	.2byte	0x35c
+	.2byte	0x38d
 	.4byte	0xdc5
-	.4byte	.LLST360
+	.4byte	.LLST359
 	.uleb128 0x54
-	.4byte	.LASF730
+	.4byte	.LASF729
 	.byte	0x2
-	.2byte	0x35e
+	.2byte	0x38f
 	.4byte	0xdc5
-	.4byte	.LLST361
+	.4byte	.LLST360
 	.uleb128 0x32
-	.4byte	.LVL1533
-	.4byte	0x5156
-	.4byte	0x5034
+	.4byte	.LVL1540
+	.4byte	0x5148
+	.4byte	0x5026
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33856,87 +33824,87 @@ __func__.9940:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1534
-	.4byte	0x3e0a
+	.4byte	.LVL1541
+	.4byte	0x3df7
 	.byte	0
 	.uleb128 0x5c
-	.4byte	.LASF731
+	.4byte	.LASF730
 	.byte	0x2
-	.2byte	0x336
+	.2byte	0x367
 	.4byte	0xdc5
 	.4byte	.LFB267
 	.4byte	.LFE267-.LFB267
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5150
+	.4byte	0x5142
+	.uleb128 0x52
+	.4byte	.LASF731
+	.byte	0x2
+	.2byte	0x367
+	.4byte	0xdc5
+	.4byte	.LLST361
 	.uleb128 0x52
 	.4byte	.LASF732
 	.byte	0x2
-	.2byte	0x336
+	.2byte	0x367
 	.4byte	0xdc5
 	.4byte	.LLST362
 	.uleb128 0x52
 	.4byte	.LASF733
 	.byte	0x2
-	.2byte	0x336
-	.4byte	0xdc5
+	.2byte	0x367
+	.4byte	0x5142
 	.4byte	.LLST363
-	.uleb128 0x52
-	.4byte	.LASF734
-	.byte	0x2
-	.2byte	0x336
-	.4byte	0x5150
-	.4byte	.LLST364
 	.uleb128 0x53
 	.ascii	"len\000"
 	.byte	0x2
-	.2byte	0x338
+	.2byte	0x369
 	.4byte	0xdba
-	.4byte	.LLST365
+	.4byte	.LLST364
 	.uleb128 0x54
-	.4byte	.LASF735
+	.4byte	.LASF734
 	.byte	0x2
-	.2byte	0x338
+	.2byte	0x369
 	.4byte	0xdba
-	.4byte	.LLST366
+	.4byte	.LLST365
 	.uleb128 0x53
 	.ascii	"ppn\000"
 	.byte	0x2
-	.2byte	0x339
+	.2byte	0x36a
 	.4byte	0xdc5
-	.4byte	.LLST367
+	.4byte	.LLST366
 	.uleb128 0x54
-	.4byte	.LASF736
+	.4byte	.LASF735
 	.byte	0x2
-	.2byte	0x33a
+	.2byte	0x36b
 	.4byte	0xdc5
-	.4byte	.LLST368
+	.4byte	.LLST367
 	.uleb128 0x60
 	.ascii	"req\000"
 	.byte	0x2
-	.2byte	0x33b
+	.2byte	0x36c
 	.4byte	0xde6
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -116
 	.uleb128 0x54
-	.4byte	.LASF737
+	.4byte	.LASF736
 	.byte	0x2
-	.2byte	0x33c
+	.2byte	0x36d
 	.4byte	0xdc5
-	.4byte	.LLST369
+	.4byte	.LLST368
 	.uleb128 0x28
-	.4byte	.LASF565
+	.4byte	.LASF564
 	.byte	0x2
-	.2byte	0x33d
-	.4byte	0x2454
+	.2byte	0x36e
+	.4byte	0x2443
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -96
 	.uleb128 0x32
-	.4byte	.LVL1544
-	.4byte	0x26b9
-	.4byte	0x5117
+	.4byte	.LVL1551
+	.4byte	0x26a8
+	.4byte	0x5109
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33955,9 +33923,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1546
-	.4byte	0x22a6
-	.4byte	0x5131
+	.4byte	.LVL1553
+	.4byte	0x2295
+	.4byte	0x5123
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33972,8 +33940,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1551
-	.4byte	0x230c
+	.4byte	.LVL1558
+	.4byte	0x22fb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33999,83 +33967,83 @@ __func__.9940:
 	.byte	0x4
 	.4byte	0xdaf
 	.uleb128 0x5c
-	.4byte	.LASF738
+	.4byte	.LASF737
 	.byte	0x2
-	.2byte	0x311
+	.2byte	0x342
 	.4byte	0xdc5
 	.4byte	.LFB266
 	.4byte	.LFE266-.LFB266
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5279
+	.4byte	0x526b
+	.uleb128 0x52
+	.4byte	.LASF731
+	.byte	0x2
+	.2byte	0x342
+	.4byte	0xdc5
+	.4byte	.LLST351
 	.uleb128 0x52
 	.4byte	.LASF732
 	.byte	0x2
-	.2byte	0x311
+	.2byte	0x342
 	.4byte	0xdc5
 	.4byte	.LLST352
 	.uleb128 0x52
 	.4byte	.LASF733
 	.byte	0x2
-	.2byte	0x311
-	.4byte	0xdc5
+	.2byte	0x342
+	.4byte	0x5142
 	.4byte	.LLST353
-	.uleb128 0x52
-	.4byte	.LASF734
-	.byte	0x2
-	.2byte	0x311
-	.4byte	0x5150
-	.4byte	.LLST354
 	.uleb128 0x53
 	.ascii	"len\000"
 	.byte	0x2
-	.2byte	0x313
+	.2byte	0x344
 	.4byte	0xdba
-	.4byte	.LLST355
+	.4byte	.LLST354
 	.uleb128 0x54
-	.4byte	.LASF735
+	.4byte	.LASF734
 	.byte	0x2
-	.2byte	0x313
+	.2byte	0x344
 	.4byte	0xdba
-	.4byte	.LLST356
+	.4byte	.LLST355
 	.uleb128 0x53
 	.ascii	"ppn\000"
 	.byte	0x2
-	.2byte	0x314
+	.2byte	0x345
 	.4byte	0xdc5
-	.4byte	.LLST357
+	.4byte	.LLST356
 	.uleb128 0x54
-	.4byte	.LASF736
+	.4byte	.LASF735
 	.byte	0x2
-	.2byte	0x315
+	.2byte	0x346
 	.4byte	0xdc5
-	.4byte	.LLST358
+	.4byte	.LLST357
 	.uleb128 0x60
 	.ascii	"req\000"
 	.byte	0x2
-	.2byte	0x316
+	.2byte	0x347
 	.4byte	0xde6
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -116
 	.uleb128 0x54
-	.4byte	.LASF737
+	.4byte	.LASF736
 	.byte	0x2
-	.2byte	0x317
+	.2byte	0x348
 	.4byte	0xdc5
-	.4byte	.LLST359
+	.4byte	.LLST358
 	.uleb128 0x28
-	.4byte	.LASF565
+	.4byte	.LASF564
 	.byte	0x2
-	.2byte	0x318
-	.4byte	0x2454
+	.2byte	0x349
+	.4byte	0x2443
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -96
 	.uleb128 0x32
-	.4byte	.LVL1515
-	.4byte	0x26b9
-	.4byte	0x522f
+	.4byte	.LVL1522
+	.4byte	0x26a8
+	.4byte	0x5221
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34094,9 +34062,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1518
-	.4byte	0x22a6
-	.4byte	0x524c
+	.4byte	.LVL1525
+	.4byte	0x2295
+	.4byte	0x523e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -34113,9 +34081,9 @@ __func__.9940:
 	.byte	0x6
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1520
-	.4byte	0x547e
-	.4byte	0x5269
+	.4byte	.LVL1527
+	.4byte	0x5470
+	.4byte	0x525b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34130,8 +34098,8 @@ __func__.9940:
 	.sleb128 -1
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1525
-	.4byte	0x230c
+	.4byte	.LVL1532
+	.4byte	0x22fb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -34140,68 +34108,68 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF739
+	.4byte	.LASF738
 	.byte	0x2
-	.2byte	0x2f0
+	.2byte	0x321
 	.4byte	0x50
 	.4byte	.LFB265
 	.4byte	.LFE265-.LFB265
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5365
+	.4byte	0x5357
 	.uleb128 0x5d
 	.ascii	"lpn\000"
 	.byte	0x2
-	.2byte	0x2f0
+	.2byte	0x321
 	.4byte	0xdc5
 	.4byte	.LLST229
 	.uleb128 0x5d
 	.ascii	"ppn\000"
 	.byte	0x2
-	.2byte	0x2f0
+	.2byte	0x321
 	.4byte	0xff2
 	.4byte	.LLST230
 	.uleb128 0x52
-	.4byte	.LASF740
+	.4byte	.LASF739
 	.byte	0x2
-	.2byte	0x2f0
+	.2byte	0x321
 	.4byte	0x50
 	.4byte	.LLST231
 	.uleb128 0x54
-	.4byte	.LASF741
+	.4byte	.LASF740
 	.byte	0x2
-	.2byte	0x2f2
+	.2byte	0x323
 	.4byte	0xdba
 	.4byte	.LLST232
 	.uleb128 0x28
-	.4byte	.LASF742
+	.4byte	.LASF741
 	.byte	0x2
-	.2byte	0x2f2
+	.2byte	0x323
 	.4byte	0xdba
 	.uleb128 0x1
 	.byte	0x58
 	.uleb128 0x28
-	.4byte	.LASF743
+	.4byte	.LASF742
 	.byte	0x2
-	.2byte	0x2f2
+	.2byte	0x323
 	.4byte	0xdba
 	.uleb128 0x1
 	.byte	0x54
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x5375
+	.4byte	.LASF573
+	.4byte	0x5367
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.9370
+	.4byte	__func__.9369
 	.uleb128 0x58
-	.4byte	.LASF744
+	.4byte	.LASF743
 	.byte	0x2
-	.2byte	0x2fb
-	.4byte	.L741
+	.2byte	0x32c
+	.4byte	.L747
 	.uleb128 0x32
-	.4byte	.LVL880
-	.4byte	0x928b
-	.4byte	0x5331
+	.4byte	.LVL888
+	.4byte	0x92b5
+	.4byte	0x5323
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34219,15 +34187,15 @@ __func__.9940:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x2f7
+	.2byte	0x328
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL883
-	.4byte	0x53b5
+	.4byte	.LVL891
+	.4byte	0x53a7
 	.uleb128 0x32
-	.4byte	.LVL885
-	.4byte	0x5430
-	.4byte	0x534e
+	.4byte	.LVL893
+	.4byte	0x5422
+	.4byte	0x5340
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34236,8 +34204,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL886
-	.4byte	0x5973
+	.4byte	.LVL894
+	.4byte	0x5965
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34254,73 +34222,73 @@ __func__.9940:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x5375
+	.4byte	0x5367
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x8
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x5365
+	.4byte	0x5357
 	.uleb128 0x48
-	.4byte	.LASF745
+	.4byte	.LASF744
 	.byte	0x2
-	.2byte	0x2e3
+	.2byte	0x314
 	.4byte	0x50
 	.4byte	.LFB264
 	.4byte	.LFE264-.LFB264
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x53b5
+	.4byte	0x53a7
 	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x2
-	.2byte	0x2e5
+	.2byte	0x316
 	.4byte	0xdba
 	.4byte	.LLST314
 	.uleb128 0x44
-	.4byte	.LVL1281
-	.4byte	0x4edc
+	.4byte	.LVL1289
+	.4byte	0x4ece
 	.uleb128 0x44
-	.4byte	.LVL1285
-	.4byte	0x5430
+	.4byte	.LVL1293
+	.4byte	0x5422
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF746
+	.4byte	.LASF745
 	.byte	0x2
-	.2byte	0x2bb
+	.2byte	0x2ec
 	.4byte	0xdba
 	.4byte	.LFB263
 	.4byte	.LFE263-.LFB263
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5430
+	.4byte	0x5422
 	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x2
-	.2byte	0x2bd
+	.2byte	0x2ee
 	.4byte	0xdba
-	.4byte	.LLST83
+	.4byte	.LLST74
 	.uleb128 0x54
-	.4byte	.LASF747
+	.4byte	.LASF746
 	.byte	0x2
-	.2byte	0x2be
+	.2byte	0x2ef
 	.4byte	0xdba
-	.4byte	.LLST84
+	.4byte	.LLST75
 	.uleb128 0x54
-	.4byte	.LASF748
+	.4byte	.LASF747
 	.byte	0x2
-	.2byte	0x2bf
+	.2byte	0x2f0
 	.4byte	0xdc5
-	.4byte	.LLST85
+	.4byte	.LLST76
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x45d7
+	.4byte	.LASF573
+	.4byte	0x45c4
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.9353
+	.4byte	__func__.9352
 	.uleb128 0x34
-	.4byte	.LVL233
-	.4byte	0x928b
+	.4byte	.LVL221
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34332,40 +34300,40 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR58
+	.4byte	.LANCHOR57
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x2df
+	.2byte	0x310
 	.byte	0
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF749
+	.4byte	.LASF748
 	.byte	0x2
-	.2byte	0x2b1
+	.2byte	0x2e2
 	.4byte	0x50
 	.4byte	.LFB262
 	.4byte	.LFE262-.LFB262
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x547e
+	.4byte	0x5470
 	.uleb128 0x52
-	.4byte	.LASF741
+	.4byte	.LASF740
 	.byte	0x2
-	.2byte	0x2b1
+	.2byte	0x2e2
 	.4byte	0xdba
 	.4byte	.LLST227
 	.uleb128 0x54
 	.4byte	.LASF317
 	.byte	0x2
-	.2byte	0x2b3
+	.2byte	0x2e4
 	.4byte	0xdc5
 	.4byte	.LLST228
 	.uleb128 0x34
-	.4byte	.LVL873
-	.4byte	0x547e
+	.4byte	.LVL881
+	.4byte	0x5470
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34375,65 +34343,65 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF750
+	.4byte	.LASF749
 	.byte	0x2
-	.2byte	0x276
+	.2byte	0x2a7
 	.4byte	0x50
 	.4byte	.LFB261
 	.4byte	.LFE261-.LFB261
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x55dd
+	.4byte	0x55cf
 	.uleb128 0x52
-	.4byte	.LASF704
+	.4byte	.LASF703
 	.byte	0x2
-	.2byte	0x276
-	.4byte	0x499b
+	.2byte	0x2a7
+	.4byte	0x4988
 	.4byte	.LLST214
 	.uleb128 0x52
 	.4byte	.LASF317
 	.byte	0x2
-	.2byte	0x276
+	.2byte	0x2a7
 	.4byte	0xdc5
 	.4byte	.LLST215
 	.uleb128 0x52
-	.4byte	.LASF734
+	.4byte	.LASF733
 	.byte	0x2
-	.2byte	0x276
+	.2byte	0x2a7
 	.4byte	0xff2
 	.4byte	.LLST216
 	.uleb128 0x54
 	.4byte	.LASF388
 	.byte	0x2
-	.2byte	0x278
+	.2byte	0x2a9
 	.4byte	0xdc5
 	.4byte	.LLST217
 	.uleb128 0x54
-	.4byte	.LASF709
+	.4byte	.LASF708
 	.byte	0x2
-	.2byte	0x279
-	.4byte	0x49a1
+	.2byte	0x2aa
+	.4byte	0x498e
 	.4byte	.LLST218
 	.uleb128 0x54
-	.4byte	.LASF722
+	.4byte	.LASF721
 	.byte	0x2
-	.2byte	0x27a
+	.2byte	0x2ab
 	.4byte	0xdba
 	.4byte	.LLST219
 	.uleb128 0x4d
-	.4byte	.LASF751
+	.4byte	.LASF750
 	.byte	0x2
-	.2byte	0x27c
+	.2byte	0x2ad
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x3339
+	.4byte	.LASF573
+	.4byte	0x3316
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.9328
+	.4byte	__func__.9327
 	.uleb128 0x32
-	.4byte	.LVL835
-	.4byte	0x55dd
-	.4byte	0x5523
+	.4byte	.LVL843
+	.4byte	0x55cf
+	.4byte	0x5515
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34442,9 +34410,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL836
-	.4byte	0x928b
-	.4byte	0x554a
+	.4byte	.LVL844
+	.4byte	0x92b5
+	.4byte	0x553c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34462,12 +34430,12 @@ __func__.9940:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x28a
+	.2byte	0x2bb
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL837
-	.4byte	0x928b
-	.4byte	0x5571
+	.4byte	.LVL845
+	.4byte	0x92b5
+	.4byte	0x5563
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34485,12 +34453,12 @@ __func__.9940:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x28b
+	.2byte	0x2bc
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL839
-	.4byte	0x230c
-	.4byte	0x5589
+	.4byte	.LVL847
+	.4byte	0x22fb
+	.4byte	0x557b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -34503,9 +34471,9 @@ __func__.9940:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL842
-	.4byte	0x251a
-	.4byte	0x55ac
+	.4byte	.LVL850
+	.4byte	0x2509
+	.4byte	0x559e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34529,25 +34497,25 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL844
-	.4byte	0x928b
-	.4byte	0x55c3
+	.4byte	.LVL852
+	.4byte	0x92b5
+	.4byte	0x55b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC86
+	.4byte	.LC89
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL845
-	.4byte	0x928b
+	.4byte	.LVL853
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC87
+	.4byte	.LC90
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
@@ -34557,66 +34525,66 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF752
+	.4byte	.LASF751
 	.byte	0x2
-	.2byte	0x246
+	.2byte	0x277
 	.4byte	0x50
 	.4byte	.LFB260
 	.4byte	.LFE260-.LFB260
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x56ed
+	.4byte	0x56df
 	.uleb128 0x52
-	.4byte	.LASF704
+	.4byte	.LASF703
 	.byte	0x2
-	.2byte	0x246
-	.4byte	0x499b
+	.2byte	0x277
+	.4byte	0x4988
 	.4byte	.LLST208
 	.uleb128 0x4b
 	.4byte	.LASF388
 	.byte	0x2
-	.2byte	0x248
+	.2byte	0x279
 	.4byte	0xdba
 	.uleb128 0x54
 	.4byte	.LASF330
 	.byte	0x2
-	.2byte	0x248
+	.2byte	0x279
 	.4byte	0xdba
 	.4byte	.LLST209
 	.uleb128 0x54
-	.4byte	.LASF753
+	.4byte	.LASF752
 	.byte	0x2
-	.2byte	0x249
+	.2byte	0x27a
 	.4byte	0xdba
 	.4byte	.LLST210
 	.uleb128 0x54
-	.4byte	.LASF754
+	.4byte	.LASF753
 	.byte	0x2
-	.2byte	0x24a
+	.2byte	0x27b
 	.4byte	0x10e9
 	.4byte	.LLST211
 	.uleb128 0x54
-	.4byte	.LASF707
+	.4byte	.LASF706
 	.byte	0x2
-	.2byte	0x24b
+	.2byte	0x27c
 	.4byte	0xff2
 	.4byte	.LLST212
 	.uleb128 0x54
-	.4byte	.LASF709
+	.4byte	.LASF708
 	.byte	0x2
-	.2byte	0x24c
-	.4byte	0x49a1
+	.2byte	0x27d
+	.4byte	0x498e
 	.4byte	.LLST213
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x56fd
+	.4byte	.LASF573
+	.4byte	0x56ef
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.9314
+	.4byte	__func__.9313
 	.uleb128 0x32
-	.4byte	.LVL813
-	.4byte	0x928b
-	.4byte	0x5699
+	.4byte	.LVL821
+	.4byte	0x92b5
+	.4byte	0x568b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34634,15 +34602,15 @@ __func__.9940:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x250
+	.2byte	0x281
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL814
-	.4byte	0x5e26
+	.4byte	.LVL822
+	.4byte	0x5e28
 	.uleb128 0x32
-	.4byte	.LVL821
-	.4byte	0x230c
-	.4byte	0x56b6
+	.4byte	.LVL829
+	.4byte	0x22fb
+	.4byte	0x56a8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -34651,15 +34619,15 @@ __func__.9940:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL826
-	.4byte	0x251a
-	.4byte	0x56dc
+	.4byte	.LVL834
+	.4byte	0x2509
+	.4byte	0x56ce
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR108
+	.4byte	.LANCHOR106
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -34677,8 +34645,8 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL827
-	.4byte	0x5702
+	.4byte	.LVL835
+	.4byte	0x56f4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34689,75 +34657,75 @@ __func__.9940:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x56fd
+	.4byte	0x56ef
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x1e
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x56ed
+	.4byte	0x56df
 	.uleb128 0x48
-	.4byte	.LASF755
+	.4byte	.LASF754
 	.byte	0x2
-	.2byte	0x218
+	.2byte	0x249
 	.4byte	0x50
 	.4byte	.LFB259
 	.4byte	.LFE259-.LFB259
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x584c
+	.4byte	0x583e
 	.uleb128 0x52
-	.4byte	.LASF704
+	.4byte	.LASF703
 	.byte	0x2
-	.2byte	0x218
-	.4byte	0x499b
+	.2byte	0x249
+	.4byte	0x4988
 	.4byte	.LLST220
 	.uleb128 0x54
-	.4byte	.LASF756
+	.4byte	.LASF755
 	.byte	0x2
-	.2byte	0x21a
+	.2byte	0x24b
 	.4byte	0xdba
 	.4byte	.LLST221
 	.uleb128 0x54
-	.4byte	.LASF757
+	.4byte	.LASF756
 	.byte	0x2
-	.2byte	0x21b
+	.2byte	0x24c
 	.4byte	0xdba
 	.4byte	.LLST222
 	.uleb128 0x54
 	.4byte	.LASF330
 	.byte	0x2
-	.2byte	0x21c
+	.2byte	0x24d
 	.4byte	0xdba
 	.4byte	.LLST223
 	.uleb128 0x54
-	.4byte	.LASF754
+	.4byte	.LASF753
 	.byte	0x2
-	.2byte	0x21d
+	.2byte	0x24e
 	.4byte	0x10e9
 	.4byte	.LLST224
 	.uleb128 0x54
-	.4byte	.LASF707
+	.4byte	.LASF706
 	.byte	0x2
-	.2byte	0x21e
+	.2byte	0x24f
 	.4byte	0xff2
 	.4byte	.LLST225
 	.uleb128 0x54
-	.4byte	.LASF709
+	.4byte	.LASF708
 	.byte	0x2
-	.2byte	0x21f
-	.4byte	0x49a1
+	.2byte	0x250
+	.4byte	0x498e
 	.4byte	.LLST226
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x26b4
+	.4byte	.LASF573
+	.4byte	0x26a3
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.9300
+	.4byte	__func__.9299
 	.uleb128 0x32
-	.4byte	.LVL850
-	.4byte	0x58a4
-	.4byte	0x57af
+	.4byte	.LVL858
+	.4byte	0x5896
+	.4byte	0x57a1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34766,9 +34734,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL853
-	.4byte	0x584c
-	.4byte	0x57c3
+	.4byte	.LVL861
+	.4byte	0x583e
+	.4byte	0x57b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34777,9 +34745,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL856
-	.4byte	0x5f68
-	.4byte	0x57dc
+	.4byte	.LVL864
+	.4byte	0x5fb2
+	.4byte	0x57ce
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34793,9 +34761,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL858
-	.4byte	0x584c
-	.4byte	0x57f0
+	.4byte	.LVL866
+	.4byte	0x583e
+	.4byte	0x57e2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34804,9 +34772,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL863
-	.4byte	0x26b9
-	.4byte	0x580e
+	.4byte	.LVL871
+	.4byte	0x26a8
+	.4byte	0x5800
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34825,9 +34793,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL864
-	.4byte	0x928b
-	.4byte	0x5835
+	.4byte	.LVL872
+	.4byte	0x92b5
+	.4byte	0x5827
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34845,11 +34813,11 @@ __func__.9940:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x234
+	.2byte	0x265
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL868
-	.4byte	0x547e
+	.4byte	.LVL876
+	.4byte	0x5470
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34865,111 +34833,111 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF758
+	.4byte	.LASF757
 	.byte	0x2
-	.2byte	0x203
+	.2byte	0x231
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x588f
+	.4byte	0x5881
 	.uleb128 0x4a
-	.4byte	.LASF704
+	.4byte	.LASF703
 	.byte	0x2
-	.2byte	0x203
-	.4byte	0x499b
+	.2byte	0x231
+	.4byte	0x4988
 	.uleb128 0x4b
-	.4byte	.LASF759
+	.4byte	.LASF758
 	.byte	0x2
-	.2byte	0x205
+	.2byte	0x233
 	.4byte	0xdba
 	.uleb128 0x4b
-	.4byte	.LASF754
+	.4byte	.LASF753
 	.byte	0x2
-	.2byte	0x206
+	.2byte	0x234
 	.4byte	0x10e9
 	.uleb128 0x4e
-	.4byte	.LASF574
-	.4byte	0x589f
-	.4byte	.LASF758
+	.4byte	.LASF573
+	.4byte	0x5891
+	.4byte	.LASF757
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x589f
+	.4byte	0x5891
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x19
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x588f
+	.4byte	0x5881
 	.uleb128 0x48
-	.4byte	.LASF760
+	.4byte	.LASF759
 	.byte	0x2
-	.2byte	0x1db
+	.2byte	0x209
 	.4byte	0x50
 	.4byte	.LFB257
 	.4byte	.LFE257-.LFB257
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5973
+	.4byte	0x5965
 	.uleb128 0x52
-	.4byte	.LASF704
+	.4byte	.LASF703
 	.byte	0x2
-	.2byte	0x1db
-	.4byte	0x499b
+	.2byte	0x209
+	.4byte	0x4988
 	.4byte	.LLST201
 	.uleb128 0x28
-	.4byte	.LASF754
+	.4byte	.LASF753
 	.byte	0x2
-	.2byte	0x1dd
+	.2byte	0x20b
 	.4byte	0x10e9
 	.uleb128 0x1
 	.byte	0x5a
 	.uleb128 0x54
-	.4byte	.LASF707
+	.4byte	.LASF706
 	.byte	0x2
-	.2byte	0x1de
+	.2byte	0x20c
 	.4byte	0xff2
 	.4byte	.LLST202
 	.uleb128 0x28
-	.4byte	.LASF761
+	.4byte	.LASF760
 	.byte	0x2
-	.2byte	0x1df
+	.2byte	0x20d
 	.4byte	0x10e9
 	.uleb128 0x1
 	.byte	0x55
 	.uleb128 0x54
 	.4byte	.LASF388
 	.byte	0x2
-	.2byte	0x1e0
+	.2byte	0x20e
 	.4byte	0xdba
 	.4byte	.LLST203
 	.uleb128 0x54
 	.4byte	.LASF330
 	.byte	0x2
-	.2byte	0x1e0
+	.2byte	0x20e
 	.4byte	0xdba
 	.4byte	.LLST204
 	.uleb128 0x54
-	.4byte	.LASF759
+	.4byte	.LASF758
 	.byte	0x2
-	.2byte	0x1e1
+	.2byte	0x20f
 	.4byte	0xdba
 	.4byte	.LLST205
 	.uleb128 0x54
-	.4byte	.LASF762
+	.4byte	.LASF761
 	.byte	0x2
-	.2byte	0x1e2
+	.2byte	0x210
 	.4byte	0xdba
 	.4byte	.LLST206
 	.uleb128 0x54
-	.4byte	.LASF757
+	.4byte	.LASF756
 	.byte	0x2
-	.2byte	0x1e3
+	.2byte	0x211
 	.4byte	0xdba
 	.4byte	.LLST207
 	.uleb128 0x32
-	.4byte	.LVL790
-	.4byte	0x230c
-	.4byte	0x5963
+	.4byte	.LVL798
+	.4byte	0x22fb
+	.4byte	0x5955
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34983,8 +34951,8 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL807
-	.4byte	0x5f68
+	.4byte	.LVL815
+	.4byte	0x5fb2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -34993,51 +34961,51 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF763
+	.4byte	.LASF762
 	.byte	0x2
-	.2byte	0x1b9
+	.2byte	0x1e7
 	.4byte	0x50
 	.4byte	.LFB256
 	.4byte	.LFE256-.LFB256
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5ab5
+	.4byte	0x5aa7
 	.uleb128 0x52
 	.4byte	.LASF317
 	.byte	0x2
-	.2byte	0x1b9
+	.2byte	0x1e7
 	.4byte	0xdba
 	.4byte	.LLST199
 	.uleb128 0x52
-	.4byte	.LASF741
+	.4byte	.LASF740
 	.byte	0x2
-	.2byte	0x1b9
+	.2byte	0x1e7
 	.4byte	0xdba
 	.4byte	.LLST200
 	.uleb128 0x28
-	.4byte	.LASF709
+	.4byte	.LASF708
 	.byte	0x2
-	.2byte	0x1bb
-	.4byte	0x49a1
+	.2byte	0x1e9
+	.4byte	0x498e
 	.uleb128 0x1
 	.byte	0x5a
 	.uleb128 0x28
-	.4byte	.LASF764
+	.4byte	.LASF763
 	.byte	0x2
-	.2byte	0x1bc
+	.2byte	0x1ea
 	.4byte	0xdc5
 	.uleb128 0x1
 	.byte	0x58
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x3339
+	.4byte	.LASF573
+	.4byte	0x3316
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.9257
+	.4byte	__func__.9255
 	.uleb128 0x32
-	.4byte	.LVL776
-	.4byte	0x928b
-	.4byte	0x59ff
+	.4byte	.LVL784
+	.4byte	0x92b5
+	.4byte	0x59f1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -35055,12 +35023,12 @@ __func__.9940:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x1be
+	.2byte	0x1ec
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL778
-	.4byte	0x230c
-	.4byte	0x5a13
+	.4byte	.LVL786
+	.4byte	0x22fb
+	.4byte	0x5a05
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -35069,9 +35037,9 @@ __func__.9940:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL780
-	.4byte	0x26b9
-	.4byte	0x5a31
+	.4byte	.LVL788
+	.4byte	0x26a8
+	.4byte	0x5a23
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -35090,15 +35058,15 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL782
-	.4byte	0x928b
-	.4byte	0x5a54
+	.4byte	.LVL790
+	.4byte	0x92b5
+	.4byte	0x5a46
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC83
+	.4byte	.LC86
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -35113,15 +35081,15 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL783
-	.4byte	0x2836
-	.4byte	0x5a75
+	.4byte	.LVL791
+	.4byte	0x2825
+	.4byte	0x5a67
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC84
+	.4byte	.LC87
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
@@ -35134,15 +35102,15 @@ __func__.9940:
 	.byte	0x34
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL784
-	.4byte	0x2836
-	.4byte	0x5a91
+	.4byte	.LVL792
+	.4byte	0x2825
+	.4byte	0x5a83
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC85
+	.4byte	.LC88
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
@@ -35150,8 +35118,8 @@ __func__.9940:
 	.byte	0x34
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL785
-	.4byte	0x928b
+	.4byte	.LVL793
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -35169,109 +35137,109 @@ __func__.9940:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x1d3
+	.2byte	0x201
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF765
+	.4byte	.LASF764
 	.byte	0x2
-	.2byte	0x193
+	.2byte	0x1bf
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x5b34
+	.4byte	0x5b26
 	.uleb128 0x4a
-	.4byte	.LASF650
+	.4byte	.LASF649
 	.byte	0x2
-	.2byte	0x193
+	.2byte	0x1bf
 	.4byte	0xdba
 	.uleb128 0x4b
-	.4byte	.LASF766
+	.4byte	.LASF765
 	.byte	0x2
-	.2byte	0x195
+	.2byte	0x1c1
 	.4byte	0xdba
 	.uleb128 0x4b
-	.4byte	.LASF767
+	.4byte	.LASF766
 	.byte	0x2
-	.2byte	0x196
+	.2byte	0x1c2
 	.4byte	0xdba
 	.uleb128 0x4b
-	.4byte	.LASF768
+	.4byte	.LASF767
 	.byte	0x2
-	.2byte	0x197
+	.2byte	0x1c3
 	.4byte	0xdc5
 	.uleb128 0x4b
-	.4byte	.LASF769
+	.4byte	.LASF768
 	.byte	0x2
-	.2byte	0x199
+	.2byte	0x1c5
 	.4byte	0xdba
 	.uleb128 0x4b
-	.4byte	.LASF770
+	.4byte	.LASF769
 	.byte	0x2
-	.2byte	0x19a
+	.2byte	0x1c6
 	.4byte	0xdc5
 	.uleb128 0x4b
-	.4byte	.LASF653
+	.4byte	.LASF652
 	.byte	0x2
-	.2byte	0x19b
-	.4byte	0x1cc9
+	.2byte	0x1c7
+	.4byte	0x1cb8
 	.uleb128 0x4b
-	.4byte	.LASF771
+	.4byte	.LASF770
 	.byte	0x2
-	.2byte	0x19b
-	.4byte	0x1cc9
+	.2byte	0x1c7
+	.4byte	0x1cb8
 	.uleb128 0x4e
-	.4byte	.LASF574
-	.4byte	0x45d7
-	.4byte	.LASF765
+	.4byte	.LASF573
+	.4byte	0x45c4
+	.4byte	.LASF764
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF772
+	.4byte	.LASF771
 	.byte	0x2
-	.2byte	0x17f
+	.2byte	0x1ab
 	.4byte	0x50
 	.4byte	.LFB254
 	.4byte	.LFE254-.LFB254
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5b7f
+	.4byte	0x5b71
 	.uleb128 0x52
 	.4byte	.LASF236
 	.byte	0x2
-	.2byte	0x17f
+	.2byte	0x1ab
 	.4byte	0xdba
-	.4byte	.LLST67
+	.4byte	.LLST62
 	.uleb128 0x54
-	.4byte	.LASF650
+	.4byte	.LASF649
 	.byte	0x2
-	.2byte	0x181
+	.2byte	0x1ad
 	.4byte	0xdba
-	.4byte	.LLST68
+	.4byte	.LLST63
 	.uleb128 0x54
-	.4byte	.LASF653
+	.4byte	.LASF652
 	.byte	0x2
-	.2byte	0x182
-	.4byte	0x1cc9
-	.4byte	.LLST69
+	.2byte	0x1ae
+	.4byte	0x1cb8
+	.4byte	.LLST64
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF773
+	.4byte	.LASF772
 	.byte	0x2
-	.2byte	0x17a
+	.2byte	0x1a6
 	.4byte	0x50
 	.4byte	.LFB253
 	.4byte	.LFE253-.LFB253
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5bc0
+	.4byte	0x5bb2
 	.uleb128 0x52
-	.4byte	.LASF774
+	.4byte	.LASF773
 	.byte	0x2
-	.2byte	0x17a
-	.4byte	0x5bc0
-	.4byte	.LLST66
+	.2byte	0x1a6
+	.4byte	0x5bb2
+	.4byte	.LLST61
 	.uleb128 0x2d
-	.4byte	.LVL186
-	.4byte	0x5bc6
+	.4byte	.LVL178
+	.4byte	0x5bb8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -35288,44 +35256,44 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x1cc9
+	.4byte	0x1cb8
 	.uleb128 0x48
-	.4byte	.LASF775
+	.4byte	.LASF774
 	.byte	0x2
-	.2byte	0x167
+	.2byte	0x193
 	.4byte	0x50
 	.4byte	.LFB252
 	.4byte	.LFE252-.LFB252
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5c31
+	.4byte	0x5c23
 	.uleb128 0x52
-	.4byte	.LASF774
+	.4byte	.LASF773
 	.byte	0x2
-	.2byte	0x167
-	.4byte	0x5bc0
-	.4byte	.LLST62
+	.2byte	0x193
+	.4byte	0x5bb2
+	.4byte	.LLST57
 	.uleb128 0x52
 	.4byte	.LASF236
 	.byte	0x2
-	.2byte	0x167
+	.2byte	0x193
 	.4byte	0xdba
-	.4byte	.LLST63
+	.4byte	.LLST58
 	.uleb128 0x54
-	.4byte	.LASF650
+	.4byte	.LASF649
 	.byte	0x2
-	.2byte	0x169
+	.2byte	0x195
 	.4byte	0xdba
-	.4byte	.LLST64
+	.4byte	.LLST59
 	.uleb128 0x54
-	.4byte	.LASF653
+	.4byte	.LASF652
 	.byte	0x2
-	.2byte	0x16a
-	.4byte	0x1cc9
-	.4byte	.LLST65
+	.2byte	0x196
+	.4byte	0x1cb8
+	.4byte	.LLST60
 	.uleb128 0x34
-	.4byte	.LVL178
-	.4byte	0x5c31
+	.4byte	.LVL170
+	.4byte	0x5c23
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -35335,49 +35303,49 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF776
+	.4byte	.LASF775
 	.byte	0x2
-	.2byte	0x14c
+	.2byte	0x176
 	.4byte	0x50
 	.4byte	.LFB251
 	.4byte	.LFE251-.LFB251
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5cbc
+	.4byte	0x5cae
 	.uleb128 0x52
-	.4byte	.LASF774
+	.4byte	.LASF773
 	.byte	0x2
-	.2byte	0x14c
-	.4byte	0x5bc0
-	.4byte	.LLST59
+	.2byte	0x176
+	.4byte	0x5bb2
+	.4byte	.LLST54
 	.uleb128 0x52
-	.4byte	.LASF650
+	.4byte	.LASF649
 	.byte	0x2
-	.2byte	0x14c
+	.2byte	0x176
 	.4byte	0xdba
-	.4byte	.LLST60
+	.4byte	.LLST55
 	.uleb128 0x28
-	.4byte	.LASF653
+	.4byte	.LASF652
 	.byte	0x2
-	.2byte	0x14e
-	.4byte	0x1cc9
+	.2byte	0x178
+	.4byte	0x1cb8
 	.uleb128 0x1
 	.byte	0x54
 	.uleb128 0x54
-	.4byte	.LASF777
+	.4byte	.LASF776
 	.byte	0x2
-	.2byte	0x14e
-	.4byte	0x1cc9
-	.4byte	.LLST61
+	.2byte	0x178
+	.4byte	0x1cb8
+	.4byte	.LLST56
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x5ccc
+	.4byte	.LASF573
+	.4byte	0x5cbe
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.9216
+	.4byte	__func__.9214
 	.uleb128 0x34
-	.4byte	.LVL168
-	.4byte	0x928b
+	.4byte	.LVL158
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -35395,384 +35363,401 @@ __func__.9940:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x151
+	.2byte	0x17b
 	.byte	0
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x5ccc
+	.4byte	0x5cbe
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x10
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x5cbc
+	.4byte	0x5cae
 	.uleb128 0x48
-	.4byte	.LASF778
+	.4byte	.LASF777
 	.byte	0x2
-	.2byte	0x11b
+	.2byte	0x145
 	.4byte	0x50
 	.4byte	.LFB250
 	.4byte	.LFE250-.LFB250
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5d4a
+	.4byte	0x5d3c
 	.uleb128 0x52
-	.4byte	.LASF650
+	.4byte	.LASF649
 	.byte	0x2
-	.2byte	0x11b
+	.2byte	0x145
 	.4byte	0xdba
-	.4byte	.LLST53
+	.4byte	.LLST48
 	.uleb128 0x54
-	.4byte	.LASF653
+	.4byte	.LASF652
 	.byte	0x2
-	.2byte	0x11d
-	.4byte	0x1cc9
-	.4byte	.LLST54
+	.2byte	0x147
+	.4byte	0x1cb8
+	.4byte	.LLST49
 	.uleb128 0x54
-	.4byte	.LASF777
+	.4byte	.LASF776
 	.byte	0x2
-	.2byte	0x11d
-	.4byte	0x1cc9
-	.4byte	.LLST55
+	.2byte	0x147
+	.4byte	0x1cb8
+	.4byte	.LLST50
 	.uleb128 0x28
-	.4byte	.LASF779
+	.4byte	.LASF778
 	.byte	0x2
-	.2byte	0x11e
+	.2byte	0x148
 	.4byte	0xdba
 	.uleb128 0x1
 	.byte	0x58
 	.uleb128 0x54
-	.4byte	.LASF780
+	.4byte	.LASF779
 	.byte	0x2
-	.2byte	0x11f
+	.2byte	0x149
 	.4byte	0xdba
-	.4byte	.LLST56
+	.4byte	.LLST51
 	.uleb128 0x54
-	.4byte	.LASF781
+	.4byte	.LASF780
 	.byte	0x2
-	.2byte	0x120
+	.2byte	0x14a
 	.4byte	0xdba
-	.4byte	.LLST57
+	.4byte	.LLST52
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF782
+	.4byte	.LASF781
 	.byte	0x2
-	.byte	0xd8
+	.byte	0xf8
 	.4byte	0x50
 	.4byte	.LFB249
 	.4byte	.LFE249-.LFB249
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5ddc
+	.4byte	0x5dde
 	.uleb128 0x2c
-	.4byte	.LASF650
+	.4byte	.LASF649
 	.byte	0x2
-	.byte	0xd8
+	.byte	0xf8
 	.4byte	0xdba
-	.4byte	.LLST44
+	.4byte	.LLST38
 	.uleb128 0x30
-	.4byte	.LASF653
+	.4byte	.LASF652
 	.byte	0x2
-	.byte	0xda
-	.4byte	0x1cc9
-	.4byte	.LLST45
+	.byte	0xfa
+	.4byte	0x1cb8
+	.4byte	.LLST39
 	.uleb128 0x30
-	.4byte	.LASF777
+	.4byte	.LASF776
 	.byte	0x2
-	.byte	0xda
-	.4byte	0x1cc9
-	.4byte	.LLST46
+	.byte	0xfa
+	.4byte	0x1cb8
+	.4byte	.LLST40
 	.uleb128 0x30
-	.4byte	.LASF783
+	.4byte	.LASF782
 	.byte	0x2
-	.byte	0xdb
+	.byte	0xfb
 	.4byte	0xdba
-	.4byte	.LLST47
+	.4byte	.LLST41
 	.uleb128 0x30
-	.4byte	.LASF784
+	.4byte	.LASF783
 	.byte	0x2
-	.byte	0xdc
+	.byte	0xfc
 	.4byte	0xdba
-	.4byte	.LLST48
+	.4byte	.LLST42
 	.uleb128 0x30
-	.4byte	.LASF768
+	.4byte	.LASF767
 	.byte	0x2
-	.byte	0xdd
+	.byte	0xfd
 	.4byte	0xdc5
-	.4byte	.LLST49
+	.4byte	.LLST43
 	.uleb128 0x30
-	.4byte	.LASF785
+	.4byte	.LASF784
 	.byte	0x2
-	.byte	0xde
+	.byte	0xfe
 	.4byte	0xdc5
-	.4byte	.LLST50
+	.4byte	.LLST44
 	.uleb128 0x30
-	.4byte	.LASF781
+	.4byte	.LASF780
 	.byte	0x2
-	.byte	0xdf
+	.byte	0xff
 	.4byte	0xdba
-	.4byte	.LLST51
+	.4byte	.LLST45
+	.uleb128 0x54
+	.4byte	.LASF325
+	.byte	0x2
+	.2byte	0x100
+	.4byte	0xdba
+	.4byte	.LLST46
 	.byte	0
 	.uleb128 0x66
-	.4byte	.LASF786
+	.4byte	.LASF785
 	.byte	0x2
-	.byte	0xb9
+	.byte	0xd9
 	.byte	0x1
-	.4byte	0x5e01
+	.4byte	0x5e03
 	.uleb128 0x36
-	.4byte	.LASF650
+	.4byte	.LASF649
 	.byte	0x2
-	.byte	0xb9
+	.byte	0xd9
 	.4byte	0xdba
 	.uleb128 0x4e
-	.4byte	.LASF574
-	.4byte	0x5ccc
-	.4byte	.LASF786
+	.4byte	.LASF573
+	.4byte	0x5cbe
+	.4byte	.LASF785
 	.byte	0
 	.uleb128 0x66
-	.4byte	.LASF787
+	.4byte	.LASF786
 	.byte	0x2
-	.byte	0xb2
+	.byte	0xd2
 	.byte	0x1
-	.4byte	0x5e26
+	.4byte	0x5e28
 	.uleb128 0x36
-	.4byte	.LASF650
+	.4byte	.LASF649
 	.byte	0x2
-	.byte	0xb2
+	.byte	0xd2
 	.4byte	0xdba
 	.uleb128 0x4e
-	.4byte	.LASF574
-	.4byte	0x5ccc
-	.4byte	.LASF787
+	.4byte	.LASF573
+	.4byte	0x5cbe
+	.4byte	.LASF786
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF788
+	.4byte	.LASF787
 	.byte	0x2
-	.byte	0xa4
+	.byte	0xb4
 	.4byte	0xdba
 	.4byte	.LFB246
 	.4byte	.LFE246-.LFB246
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5e79
+	.4byte	0x5eec
 	.uleb128 0x3b
 	.ascii	"tmp\000"
 	.byte	0x2
-	.byte	0xa6
+	.byte	0xb6
 	.4byte	0xdba
-	.4byte	.LLST42
-	.uleb128 0x61
-	.4byte	.LBB176
-	.4byte	.LBE176-.LBB176
-	.4byte	0x5e69
-	.uleb128 0x3b
+	.4byte	.LLST185
+	.uleb128 0x3a
 	.ascii	"Q\000"
 	.byte	0x2
-	.byte	0xa9
-	.4byte	0x5e79
-	.4byte	.LLST43
-	.byte	0
+	.byte	0xb7
+	.4byte	0x5eec
+	.uleb128 0x6
+	.byte	0x3
+	.4byte	gSysFreeQueue
+	.byte	0x9f
 	.uleb128 0x67
-	.4byte	0x6013
-	.4byte	.LBB174
-	.4byte	.LBE174-.LBB174
+	.4byte	.LASF788
 	.byte	0x2
-	.byte	0xa8
+	.byte	0xb9
+	.4byte	.L531
+	.uleb128 0x3e
+	.4byte	.Ldebug_ranges0+0xd0
+	.4byte	0x5eac
+	.uleb128 0x30
+	.4byte	.LASF789
+	.byte	0x2
+	.byte	0xbf
+	.4byte	0xdba
+	.4byte	.LLST186
+	.uleb128 0x32
+	.4byte	.LVL690
+	.4byte	0x616f
+	.4byte	0x5e97
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL692
+	.4byte	0x2453
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x68
+	.4byte	0x5ff9
+	.4byte	.LBB252
+	.4byte	.Ldebug_ranges0+0xb8
+	.byte	0x2
+	.byte	0xba
+	.uleb128 0x32
+	.4byte	.LVL694
+	.4byte	0x92b5
+	.4byte	0x5ed2
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC82
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL696
+	.4byte	0x92b5
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC83
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0x1595
 	.uleb128 0x2b
-	.4byte	.LASF789
+	.4byte	.LASF790
 	.byte	0x2
-	.byte	0x92
+	.byte	0xa2
 	.4byte	0x50
 	.4byte	.LFB245
 	.4byte	.LFE245-.LFB245
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5ee3
+	.4byte	0x5f56
 	.uleb128 0x2f
 	.ascii	"blk\000"
 	.byte	0x2
-	.byte	0x92
+	.byte	0xa2
 	.4byte	0xdba
-	.4byte	.LLST39
+	.4byte	.LLST35
 	.uleb128 0x3b
 	.ascii	"ret\000"
 	.byte	0x2
-	.byte	0x94
+	.byte	0xa4
 	.4byte	0x50
-	.4byte	.LLST40
+	.4byte	.LLST36
 	.uleb128 0x3b
 	.ascii	"i\000"
 	.byte	0x2
-	.byte	0x95
+	.byte	0xa5
 	.4byte	0xdc5
-	.4byte	.LLST41
+	.4byte	.LLST37
 	.uleb128 0x3a
 	.ascii	"Q\000"
 	.byte	0x2
-	.byte	0x96
-	.4byte	0x5e79
+	.byte	0xa6
+	.4byte	0x5eec
 	.uleb128 0x6
 	.byte	0x3
 	.4byte	gSysFreeQueue
 	.byte	0x9f
 	.uleb128 0x68
-	.4byte	0x6007
-	.4byte	.LBB170
+	.4byte	0x5fed
+	.4byte	.LBB189
 	.4byte	.Ldebug_ranges0+0x18
 	.byte	0x2
-	.byte	0x98
+	.byte	0xa8
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF790
+	.4byte	.LASF791
 	.byte	0x2
-	.byte	0x73
+	.byte	0x75
 	.4byte	.LFB244
 	.4byte	.LFE244-.LFB244
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5f68
+	.4byte	0x5fb2
+	.uleb128 0x29
+	.4byte	.LASF325
+	.byte	0x2
+	.byte	0x77
+	.4byte	0xdd0
+	.uleb128 0xe
+	.byte	0x3
+	.4byte	g_sys_save_data+28
+	.byte	0x94
+	.byte	0x2
+	.byte	0x4f
+	.byte	0x1a
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
 	.uleb128 0x3b
 	.ascii	"i\000"
 	.byte	0x2
-	.byte	0x75
+	.byte	0x78
 	.4byte	0xdba
 	.4byte	.LLST33
 	.uleb128 0x3b
-	.ascii	"tmp\000"
+	.ascii	"blk\000"
 	.byte	0x2
-	.byte	0x75
+	.byte	0x78
 	.4byte	0xdba
 	.4byte	.LLST34
-	.uleb128 0x3b
-	.ascii	"j\000"
-	.byte	0x2
-	.byte	0x75
-	.4byte	0xdba
-	.4byte	.LLST35
-	.uleb128 0x30
-	.4byte	.LASF602
-	.byte	0x2
-	.byte	0x76
-	.4byte	0xdba
-	.4byte	.LLST36
-	.uleb128 0x30
-	.4byte	.LASF791
-	.byte	0x2
-	.byte	0x77
-	.4byte	0xdba
-	.4byte	.LLST37
-	.uleb128 0x30
-	.4byte	.LASF792
-	.byte	0x2
-	.byte	0x78
-	.4byte	0xdc5
-	.4byte	.LLST38
 	.uleb128 0x3a
 	.ascii	"Q\000"
 	.byte	0x2
 	.byte	0x79
-	.4byte	0x5e79
+	.4byte	0x5eec
 	.uleb128 0x6
 	.byte	0x3
 	.4byte	gSysFreeQueue
 	.byte	0x9f
-	.uleb128 0x44
-	.4byte	.LVL85
-	.4byte	0x6189
 	.byte	0
-	.uleb128 0x42
-	.4byte	.LASF793
+	.uleb128 0x66
+	.4byte	.LASF792
 	.byte	0x2
 	.byte	0x61
-	.4byte	.LFB243
-	.4byte	.LFE243-.LFB243
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6007
-	.uleb128 0x2f
+	.byte	0x1
+	.4byte	0x5fed
+	.uleb128 0x41
 	.ascii	"blk\000"
 	.byte	0x2
 	.byte	0x61
 	.4byte	0xdba
-	.4byte	.LLST177
-	.uleb128 0x2c
-	.4byte	.LASF794
+	.uleb128 0x36
+	.4byte	.LASF793
 	.byte	0x2
 	.byte	0x61
 	.4byte	0xdba
-	.4byte	.LLST178
-	.uleb128 0x61
-	.4byte	.LBB227
-	.4byte	.LBE227-.LBB227
-	.4byte	0x5ff7
-	.uleb128 0x3b
+	.uleb128 0x4f
+	.uleb128 0x31
 	.ascii	"Q\000"
 	.byte	0x2
-	.byte	0x64
-	.4byte	0x5e79
-	.4byte	.LLST179
-	.uleb128 0x69
-	.4byte	.LBB228
-	.4byte	.LBE228-.LBB228
-	.uleb128 0x30
-	.4byte	.LASF795
-	.byte	0x2
 	.byte	0x66
+	.4byte	0x5eec
+	.uleb128 0x4f
+	.uleb128 0x37
+	.4byte	.LASF789
+	.byte	0x2
+	.byte	0x68
 	.4byte	0xdba
-	.4byte	.LLST180
-	.uleb128 0x32
-	.4byte	.LVL637
-	.4byte	0x6189
-	.4byte	0x5fe1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL639
-	.4byte	0x2464
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x67
-	.4byte	0x6007
-	.4byte	.LBB225
-	.4byte	.LBE225-.LBB225
-	.byte	0x2
-	.byte	0x63
-	.byte	0
-	.uleb128 0x6a
-	.4byte	.LASF796
+	.uleb128 0x69
+	.4byte	.LASF794
 	.byte	0x2
 	.byte	0x5c
 	.4byte	0xdba
 	.byte	0x1
-	.uleb128 0x6a
-	.4byte	.LASF797
+	.uleb128 0x69
+	.4byte	.LASF795
 	.byte	0x2
 	.byte	0x57
 	.4byte	0xdba
 	.byte	0x1
 	.uleb128 0x2b
-	.4byte	.LASF798
+	.4byte	.LASF796
 	.byte	0x2
 	.byte	0x4b
 	.4byte	0xdba
@@ -35780,7 +35765,7 @@ __func__.9940:
 	.4byte	.LFE240-.LFB240
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6078
+	.4byte	0x605e
 	.uleb128 0x2f
 	.ascii	"max\000"
 	.byte	0x2
@@ -35791,14 +35776,14 @@ __func__.9940:
 	.ascii	"Q\000"
 	.byte	0x2
 	.byte	0x4d
-	.4byte	0x5e79
+	.4byte	0x5eec
 	.uleb128 0x6
 	.byte	0x3
 	.4byte	gSysFreeQueue
 	.byte	0x9f
 	.uleb128 0x34
-	.4byte	.LVL772
-	.4byte	0x230c
+	.4byte	.LVL780
+	.4byte	0x22fb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -35820,7 +35805,7 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF799
+	.4byte	.LASF797
 	.byte	0x2
 	.byte	0x2e
 	.4byte	0x50
@@ -35828,19 +35813,19 @@ __func__.9940:
 	.4byte	.LFE239-.LFB239
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6144
+	.4byte	0x612a
 	.uleb128 0x2c
 	.4byte	.LASF388
 	.byte	0x2
 	.byte	0x2e
 	.4byte	0xdc5
-	.4byte	.LLST159
+	.4byte	.LLST151
 	.uleb128 0x2c
-	.4byte	.LASF568
+	.4byte	.LASF567
 	.byte	0x2
 	.byte	0x2e
 	.4byte	0x50
-	.4byte	.LLST160
+	.4byte	.LLST152
 	.uleb128 0x3a
 	.ascii	"req\000"
 	.byte	0x2
@@ -35854,9 +35839,9 @@ __func__.9940:
 	.byte	0x2
 	.byte	0x31
 	.4byte	0xddb
-	.4byte	.LLST161
+	.4byte	.LLST153
 	.uleb128 0x29
-	.4byte	.LASF800
+	.4byte	.LASF798
 	.byte	0x2
 	.byte	0x31
 	.4byte	0xddb
@@ -35867,25 +35852,25 @@ __func__.9940:
 	.byte	0x2
 	.byte	0x31
 	.4byte	0xddb
-	.4byte	.LLST162
+	.4byte	.LLST154
 	.uleb128 0x29
-	.4byte	.LASF801
+	.4byte	.LASF799
 	.byte	0x2
 	.byte	0x32
-	.4byte	0x2454
+	.4byte	0x2443
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -88
 	.uleb128 0x30
-	.4byte	.LASF802
+	.4byte	.LASF800
 	.byte	0x2
 	.byte	0x33
 	.4byte	0xdba
-	.4byte	.LLST163
+	.4byte	.LLST155
 	.uleb128 0x32
-	.4byte	.LVL593
-	.4byte	0x26b9
-	.4byte	0x6127
+	.4byte	.LVL583
+	.4byte	0x26a8
+	.4byte	0x610d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -35905,8 +35890,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL598
-	.4byte	0x26b9
+	.4byte	.LVL588
+	.4byte	0x26a8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -35927,7 +35912,7 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF803
+	.4byte	.LASF801
 	.byte	0x2
 	.byte	0x1e
 	.4byte	0xdc5
@@ -35935,15 +35920,15 @@ __func__.9940:
 	.4byte	.LFE238-.LFB238
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6189
+	.4byte	0x616f
 	.uleb128 0x2c
-	.4byte	.LASF804
+	.4byte	.LASF802
 	.byte	0x2
 	.byte	0x1e
 	.4byte	0xdc5
 	.4byte	.LLST31
 	.uleb128 0x5b
-	.4byte	.LASF805
+	.4byte	.LASF803
 	.byte	0x2
 	.byte	0x1e
 	.4byte	0xdc5
@@ -35957,7 +35942,7 @@ __func__.9940:
 	.4byte	.LLST32
 	.byte	0
 	.uleb128 0x39
-	.4byte	.LASF806
+	.4byte	.LASF804
 	.byte	0x2
 	.byte	0x14
 	.4byte	0xdba
@@ -35965,22 +35950,22 @@ __func__.9940:
 	.4byte	.LFE237-.LFB237
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x61c1
+	.4byte	0x61a7
 	.uleb128 0x2c
-	.4byte	.LASF597
+	.4byte	.LASF596
 	.byte	0x2
 	.byte	0x14
 	.4byte	0xdba
 	.4byte	.LLST29
 	.uleb128 0x30
-	.4byte	.LASF718
+	.4byte	.LASF717
 	.byte	0x2
 	.byte	0x16
 	.4byte	0xdba
 	.4byte	.LLST30
 	.byte	0
 	.uleb128 0x39
-	.4byte	.LASF807
+	.4byte	.LASF805
 	.byte	0x2
 	.byte	0xc
 	.4byte	0xdba
@@ -35988,22 +35973,22 @@ __func__.9940:
 	.4byte	.LFE236-.LFB236
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x61f9
+	.4byte	0x61df
 	.uleb128 0x2c
-	.4byte	.LASF597
+	.4byte	.LASF596
 	.byte	0x2
 	.byte	0xc
 	.4byte	0xdba
 	.4byte	.LLST27
 	.uleb128 0x30
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x2
 	.byte	0xe
 	.4byte	0xdba
 	.4byte	.LLST28
 	.byte	0
 	.uleb128 0x39
-	.4byte	.LASF808
+	.4byte	.LASF806
 	.byte	0x2
 	.byte	0x4
 	.4byte	0xdba
@@ -36011,28 +35996,28 @@ __func__.9940:
 	.4byte	.LFE235-.LFB235
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6240
+	.4byte	0x6226
 	.uleb128 0x2c
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x2
 	.byte	0x4
 	.4byte	0xdba
 	.4byte	.LLST24
 	.uleb128 0x2c
-	.4byte	.LASF718
+	.4byte	.LASF717
 	.byte	0x2
 	.byte	0x4
 	.4byte	0xdba
 	.4byte	.LLST25
 	.uleb128 0x30
-	.4byte	.LASF587
+	.4byte	.LASF586
 	.byte	0x2
 	.byte	0x6
 	.4byte	0xdba
 	.4byte	.LLST26
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF809
+	.4byte	.LASF807
 	.byte	0x4
 	.2byte	0x13c
 	.4byte	0xdd0
@@ -36040,45 +36025,45 @@ __func__.9940:
 	.4byte	.LFE234-.LFB234
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6427
+	.4byte	0x640d
 	.uleb128 0x53
 	.ascii	"die\000"
 	.byte	0x4
 	.2byte	0x13e
 	.4byte	0xdc5
-	.4byte	.LLST348
+	.4byte	.LLST347
 	.uleb128 0x53
 	.ascii	"blk\000"
 	.byte	0x4
 	.2byte	0x13f
 	.4byte	0xdba
-	.4byte	.LLST349
+	.4byte	.LLST348
 	.uleb128 0x54
-	.4byte	.LASF577
+	.4byte	.LASF576
 	.byte	0x4
 	.2byte	0x140
 	.4byte	0xdc5
-	.4byte	.LLST350
+	.4byte	.LLST349
 	.uleb128 0x54
-	.4byte	.LASF810
+	.4byte	.LASF808
 	.byte	0x4
 	.2byte	0x142
-	.4byte	0x6427
-	.4byte	.LLST351
+	.4byte	0x640d
+	.4byte	.LLST350
 	.uleb128 0x4d
-	.4byte	.LASF811
+	.4byte	.LASF809
 	.byte	0x4
 	.2byte	0x158
 	.uleb128 0x44
-	.4byte	.LVL1462
-	.4byte	0x6623
+	.4byte	.LVL1469
+	.4byte	0x6609
 	.uleb128 0x44
-	.4byte	.LVL1463
-	.4byte	0x642d
+	.4byte	.LVL1470
+	.4byte	0x6413
 	.uleb128 0x32
-	.4byte	.LVL1467
-	.4byte	0x682c
-	.4byte	0x62c8
+	.4byte	.LVL1474
+	.4byte	0x6812
+	.4byte	0x62ae
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36087,9 +36072,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1468
-	.4byte	0x2410
-	.4byte	0x62dc
+	.4byte	.LVL1475
+	.4byte	0x23ff
+	.4byte	0x62c2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36098,9 +36083,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1469
-	.4byte	0x688f
-	.4byte	0x62f0
+	.4byte	.LVL1476
+	.4byte	0x6875
+	.4byte	0x62d6
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36109,9 +36094,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1475
-	.4byte	0x26b9
-	.4byte	0x630e
+	.4byte	.LVL1482
+	.4byte	0x26a8
+	.4byte	0x62f4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36130,12 +36115,12 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1476
-	.4byte	0x22a6
+	.4byte	.LVL1483
+	.4byte	0x2295
 	.uleb128 0x32
-	.4byte	.LVL1478
-	.4byte	0x688f
-	.4byte	0x632b
+	.4byte	.LVL1485
+	.4byte	0x6875
+	.4byte	0x6311
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36144,9 +36129,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1480
-	.4byte	0x236c
-	.4byte	0x633f
+	.4byte	.LVL1487
+	.4byte	0x235b
+	.4byte	0x6325
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -36155,15 +36140,15 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1481
-	.4byte	0x67a0
+	.4byte	.LVL1488
+	.4byte	0x6786
 	.uleb128 0x44
-	.4byte	.LVL1483
-	.4byte	0x682c
+	.4byte	.LVL1490
+	.4byte	0x6812
 	.uleb128 0x32
-	.4byte	.LVL1484
-	.4byte	0x230c
-	.4byte	0x6369
+	.4byte	.LVL1491
+	.4byte	0x22fb
+	.4byte	0x634f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -36176,9 +36161,9 @@ __func__.9940:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1485
-	.4byte	0x230c
-	.4byte	0x6383
+	.4byte	.LVL1492
+	.4byte	0x22fb
+	.4byte	0x6369
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -36192,12 +36177,12 @@ __func__.9940:
 	.2byte	0x1000
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1487
-	.4byte	0x22a6
+	.4byte	.LVL1494
+	.4byte	0x2295
 	.uleb128 0x32
-	.4byte	.LVL1488
-	.4byte	0x2464
-	.4byte	0x63aa
+	.4byte	.LVL1495
+	.4byte	0x2453
+	.4byte	0x6390
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36216,9 +36201,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1489
-	.4byte	0x251a
-	.4byte	0x63cd
+	.4byte	.LVL1496
+	.4byte	0x2509
+	.4byte	0x63b3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36242,9 +36227,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1490
-	.4byte	0x688f
-	.4byte	0x63e1
+	.4byte	.LVL1497
+	.4byte	0x6875
+	.4byte	0x63c7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36253,12 +36238,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1495
-	.4byte	0x688f
+	.4byte	.LVL1502
+	.4byte	0x6875
 	.uleb128 0x32
-	.4byte	.LVL1498
-	.4byte	0x2464
-	.4byte	0x6402
+	.4byte	.LVL1505
+	.4byte	0x2453
+	.4byte	0x63e8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -36271,23 +36256,23 @@ __func__.9940:
 	.byte	0x32
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1499
-	.4byte	0x688f
+	.4byte	.LVL1506
+	.4byte	0x6875
 	.uleb128 0x44
-	.4byte	.LVL1500
-	.4byte	0x688f
+	.4byte	.LVL1507
+	.4byte	0x6875
 	.uleb128 0x44
-	.4byte	.LVL1501
-	.4byte	0x6657
+	.4byte	.LVL1508
+	.4byte	0x663d
 	.uleb128 0x44
-	.4byte	.LVL1503
-	.4byte	0x6657
+	.4byte	.LVL1510
+	.4byte	0x663d
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0x11b9
 	.uleb128 0x48
-	.4byte	.LASF812
+	.4byte	.LASF810
 	.byte	0x4
 	.2byte	0x116
 	.4byte	0x50
@@ -36295,7 +36280,7 @@ __func__.9940:
 	.4byte	.LFE233-.LFB233
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x649e
+	.4byte	0x6484
 	.uleb128 0x60
 	.ascii	"die\000"
 	.byte	0x4
@@ -36308,23 +36293,23 @@ __func__.9940:
 	.byte	0x4
 	.2byte	0x119
 	.4byte	0xdba
-	.4byte	.LLST157
+	.4byte	.LLST149
 	.uleb128 0x54
-	.4byte	.LASF813
+	.4byte	.LASF811
 	.byte	0x4
 	.2byte	0x11a
 	.4byte	0xdc5
-	.4byte	.LLST158
+	.4byte	.LLST150
 	.uleb128 0x28
-	.4byte	.LASF810
+	.4byte	.LASF808
 	.byte	0x4
 	.2byte	0x11b
-	.4byte	0x6427
+	.4byte	0x640d
 	.uleb128 0x1
 	.byte	0x58
 	.uleb128 0x34
-	.4byte	.LVL582
-	.4byte	0x26b9
+	.4byte	.LVL572
+	.4byte	0x26a8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36344,7 +36329,7 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF814
+	.4byte	.LASF812
 	.byte	0x4
 	.byte	0xac
 	.4byte	0x50
@@ -36352,44 +36337,44 @@ __func__.9940:
 	.4byte	.LFE232-.LFB232
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x65cd
+	.4byte	0x65b3
 	.uleb128 0x3b
 	.ascii	"i\000"
 	.byte	0x4
 	.byte	0xae
 	.4byte	0xdc5
-	.4byte	.LLST344
+	.4byte	.LLST343
 	.uleb128 0x3b
 	.ascii	"blk\000"
 	.byte	0x4
 	.byte	0xaf
 	.4byte	0xdba
-	.4byte	.LLST345
+	.4byte	.LLST344
 	.uleb128 0x30
-	.4byte	.LASF706
+	.4byte	.LASF705
 	.byte	0x4
 	.byte	0xb0
 	.4byte	0xddb
-	.4byte	.LLST346
+	.4byte	.LLST345
 	.uleb128 0x30
-	.4byte	.LASF810
+	.4byte	.LASF808
 	.byte	0x4
 	.byte	0xb1
-	.4byte	0x6427
-	.4byte	.LLST347
+	.4byte	0x640d
+	.4byte	.LLST346
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x65dd
+	.4byte	.LASF573
+	.4byte	0x65c3
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.9058
+	.4byte	__func__.9061
 	.uleb128 0x44
-	.4byte	.LVL1437
-	.4byte	0x6623
+	.4byte	.LVL1444
+	.4byte	0x6609
 	.uleb128 0x32
-	.4byte	.LVL1439
-	.4byte	0x26b9
-	.4byte	0x6527
+	.4byte	.LVL1446
+	.4byte	0x26a8
+	.4byte	0x650d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36408,9 +36393,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1440
-	.4byte	0x26b9
-	.4byte	0x6545
+	.4byte	.LVL1447
+	.4byte	0x26a8
+	.4byte	0x652b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36429,9 +36414,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1442
-	.4byte	0x26b9
-	.4byte	0x6563
+	.4byte	.LVL1449
+	.4byte	0x26a8
+	.4byte	0x6549
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36450,9 +36435,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1443
-	.4byte	0x6078
-	.4byte	0x6576
+	.4byte	.LVL1450
+	.4byte	0x605e
+	.4byte	0x655c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -36460,9 +36445,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1445
-	.4byte	0x928b
-	.4byte	0x659c
+	.4byte	.LVL1452
+	.4byte	0x92b5
+	.4byte	0x6582
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36474,7 +36459,7 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR165
+	.4byte	.LANCHOR164
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
@@ -36483,12 +36468,12 @@ __func__.9940:
 	.byte	0xfe
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1446
-	.4byte	0x7ae5
+	.4byte	.LVL1453
+	.4byte	0x7a56
 	.uleb128 0x32
-	.4byte	.LVL1454
-	.4byte	0x26b9
-	.4byte	0x65c3
+	.4byte	.LVL1461
+	.4byte	0x26a8
+	.4byte	0x65a9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36507,20 +36492,20 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1459
-	.4byte	0x22a6
+	.4byte	.LVL1466
+	.4byte	0x2295
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x65dd
+	.4byte	0x65c3
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0xa
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x65cd
+	.4byte	0x65b3
 	.uleb128 0x2b
-	.4byte	.LASF815
+	.4byte	.LASF813
 	.byte	0x4
 	.byte	0x9c
 	.4byte	0xdba
@@ -36528,7 +36513,7 @@ __func__.9940:
 	.4byte	.LFE231-.LFB231
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6623
+	.4byte	0x6609
 	.uleb128 0x3b
 	.ascii	"blk\000"
 	.byte	0x4
@@ -36536,27 +36521,27 @@ __func__.9940:
 	.4byte	0xdba
 	.4byte	.LLST22
 	.uleb128 0x30
-	.4byte	.LASF816
+	.4byte	.LASF814
 	.byte	0x4
 	.byte	0x9f
 	.4byte	0xdba
 	.4byte	.LLST23
 	.uleb128 0x44
 	.4byte	.LVL59
-	.4byte	0x682c
+	.4byte	0x6812
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF817
+	.4byte	.LASF815
 	.byte	0x4
 	.byte	0x94
 	.4byte	.LFB230
 	.4byte	.LFE230-.LFB230
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6657
+	.4byte	0x663d
 	.uleb128 0x2d
-	.4byte	.LVL769
-	.4byte	0x230c
+	.4byte	.LVL777
+	.4byte	0x22fb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36577,7 +36562,7 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF818
+	.4byte	.LASF816
 	.byte	0x4
 	.byte	0x4f
 	.4byte	0x50
@@ -36585,7 +36570,7 @@ __func__.9940:
 	.4byte	.LFE229-.LFB229
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x67a0
+	.4byte	0x6786
 	.uleb128 0x3b
 	.ascii	"i\000"
 	.byte	0x4
@@ -36593,34 +36578,34 @@ __func__.9940:
 	.4byte	0x50
 	.4byte	.LLST290
 	.uleb128 0x30
-	.4byte	.LASF819
+	.4byte	.LASF817
 	.byte	0x4
 	.byte	0x52
 	.4byte	0x50
 	.4byte	.LLST291
 	.uleb128 0x30
-	.4byte	.LASF810
+	.4byte	.LASF808
 	.byte	0x4
 	.byte	0x53
-	.4byte	0x6427
+	.4byte	0x640d
 	.4byte	.LLST292
 	.uleb128 0x30
-	.4byte	.LASF722
+	.4byte	.LASF721
 	.byte	0x4
 	.byte	0x54
 	.4byte	0xdba
 	.4byte	.LLST293
 	.uleb128 0x57
-	.4byte	.LASF820
+	.4byte	.LASF818
 	.byte	0x4
 	.byte	0x67
-	.uleb128 0x6b
-	.4byte	.LASF574
-	.4byte	0x26b4
+	.uleb128 0x6a
+	.4byte	.LASF573
+	.4byte	0x26a3
 	.uleb128 0x32
-	.4byte	.LVL1164
-	.4byte	0x230c
-	.4byte	0x66ce
+	.4byte	.LVL1172
+	.4byte	0x22fb
+	.4byte	0x66b4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -36629,9 +36614,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1167
-	.4byte	0x230c
-	.4byte	0x66ed
+	.4byte	.LVL1175
+	.4byte	0x22fb
+	.4byte	0x66d3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36651,20 +36636,20 @@ __func__.9940:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1169
-	.4byte	0x928b
-	.4byte	0x6704
+	.4byte	.LVL1177
+	.4byte	0x92b5
+	.4byte	0x66ea
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC94
+	.4byte	.LC97
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1170
-	.4byte	0x251a
-	.4byte	0x6727
+	.4byte	.LVL1178
+	.4byte	0x2509
+	.4byte	0x670d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36688,9 +36673,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1171
-	.4byte	0x2464
-	.4byte	0x673f
+	.4byte	.LVL1179
+	.4byte	0x2453
+	.4byte	0x6725
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -36703,9 +36688,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1172
-	.4byte	0x251a
-	.4byte	0x6762
+	.4byte	.LVL1180
+	.4byte	0x2509
+	.4byte	0x6748
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36729,26 +36714,26 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1174
-	.4byte	0x928b
-	.4byte	0x6779
+	.4byte	.LVL1182
+	.4byte	0x92b5
+	.4byte	0x675f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC95
+	.4byte	.LC98
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1175
-	.4byte	0x928b
-	.4byte	0x6796
+	.4byte	.LVL1183
+	.4byte	0x92b5
+	.4byte	0x677c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC96
+	.4byte	.LC99
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
@@ -36757,26 +36742,26 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1178
-	.4byte	0x22a6
+	.4byte	.LVL1186
+	.4byte	0x2295
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF821
+	.4byte	.LASF819
 	.byte	0x4
 	.byte	0x41
 	.4byte	.LFB228
 	.4byte	.LFE228-.LFB228
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6824
+	.4byte	0x680a
 	.uleb128 0x2c
-	.4byte	.LASF754
+	.4byte	.LASF753
 	.byte	0x4
 	.byte	0x41
 	.4byte	0x10e9
 	.4byte	.LLST196
 	.uleb128 0x2c
-	.4byte	.LASF822
+	.4byte	.LASF820
 	.byte	0x4
 	.byte	0x41
 	.4byte	0xff2
@@ -36787,15 +36772,15 @@ __func__.9940:
 	.byte	0x43
 	.4byte	0xdc5
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x3bfa
+	.4byte	.LASF573
+	.4byte	0x3be7
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.9015
+	.4byte	__func__.9018
 	.uleb128 0x32
-	.4byte	.LVL766
-	.4byte	0x230c
-	.4byte	0x6804
+	.4byte	.LVL774
+	.4byte	0x22fb
+	.4byte	0x67ea
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36809,8 +36794,8 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL767
-	.4byte	0x928b
+	.4byte	.LVL775
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36831,13 +36816,13 @@ __func__.9940:
 	.byte	0x4a
 	.byte	0
 	.byte	0
-	.uleb128 0x6c
-	.4byte	.LASF823
+	.uleb128 0x6b
+	.4byte	.LASF821
 	.byte	0x4
 	.byte	0x26
 	.byte	0x1
 	.uleb128 0x39
-	.4byte	.LASF824
+	.4byte	.LASF822
 	.byte	0x4
 	.byte	0x17
 	.4byte	0x50
@@ -36845,7 +36830,7 @@ __func__.9940:
 	.4byte	.LFE226-.LFB226
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x688f
+	.4byte	0x6875
 	.uleb128 0x2c
 	.4byte	.LASF388
 	.byte	0x4
@@ -36865,20 +36850,20 @@ __func__.9940:
 	.4byte	0xdc5
 	.4byte	.LLST19
 	.uleb128 0x30
-	.4byte	.LASF822
+	.4byte	.LASF820
 	.byte	0x4
 	.byte	0x1b
 	.4byte	0xff2
 	.4byte	.LLST20
 	.uleb128 0x30
-	.4byte	.LASF582
+	.4byte	.LASF581
 	.byte	0x4
 	.byte	0x1c
 	.4byte	0xdba
 	.4byte	.LLST21
 	.byte	0
 	.uleb128 0x39
-	.4byte	.LASF825
+	.4byte	.LASF823
 	.byte	0x4
 	.byte	0x4
 	.4byte	0x50
@@ -36886,7 +36871,7 @@ __func__.9940:
 	.4byte	.LFE225-.LFB225
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6904
+	.4byte	0x68ea
 	.uleb128 0x2c
 	.4byte	.LASF388
 	.byte	0x4
@@ -36900,20 +36885,20 @@ __func__.9940:
 	.4byte	0xdc5
 	.4byte	.LLST14
 	.uleb128 0x30
-	.4byte	.LASF822
+	.4byte	.LASF820
 	.byte	0x4
 	.byte	0x7
 	.4byte	0xff2
 	.4byte	.LLST15
 	.uleb128 0x30
-	.4byte	.LASF582
+	.4byte	.LASF581
 	.byte	0x4
 	.byte	0x8
 	.4byte	0xdba
 	.4byte	.LLST16
 	.uleb128 0x34
 	.4byte	.LVL45
-	.4byte	0x928b
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36934,46 +36919,46 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x6d
-	.4byte	.LASF887
+	.uleb128 0x6c
+	.4byte	.LASF885
 	.byte	0x3
-	.2byte	0x4bd
+	.2byte	0x499
 	.4byte	0xdc5
 	.4byte	.LFB224
 	.4byte	.LFE224-.LFB224
 	.uleb128 0x1
 	.byte	0x9c
 	.uleb128 0x48
-	.4byte	.LASF826
+	.4byte	.LASF824
 	.byte	0x3
-	.2byte	0x4b8
+	.2byte	0x494
 	.4byte	0x50
 	.4byte	.LFB223
 	.4byte	.LFE223-.LFB223
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6989
+	.4byte	0x696f
 	.uleb128 0x52
 	.4byte	.LASF236
 	.byte	0x3
-	.2byte	0x4b8
+	.2byte	0x494
 	.4byte	0xb5
-	.4byte	.LLST445
+	.4byte	.LLST444
 	.uleb128 0x52
 	.4byte	.LASF325
 	.byte	0x3
-	.2byte	0x4b8
+	.2byte	0x494
 	.4byte	0xb5
-	.4byte	.LLST446
+	.4byte	.LLST445
 	.uleb128 0x5d
 	.ascii	"buf\000"
 	.byte	0x3
-	.2byte	0x4b8
-	.4byte	0x6989
-	.4byte	.LLST447
+	.2byte	0x494
+	.4byte	0x696f
+	.4byte	.LLST446
 	.uleb128 0x2d
-	.4byte	.LVL1965
-	.4byte	0x6b02
+	.4byte	.LVL1953
+	.4byte	0x6adf
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37006,36 +36991,36 @@ __func__.9940:
 	.byte	0x4
 	.4byte	0x90
 	.uleb128 0x48
-	.4byte	.LASF827
+	.4byte	.LASF825
 	.byte	0x3
-	.2byte	0x4b3
+	.2byte	0x48f
 	.4byte	0x50
 	.4byte	.LFB222
 	.4byte	.LFE222-.LFB222
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x69fe
+	.4byte	0x69e4
 	.uleb128 0x52
 	.4byte	.LASF236
 	.byte	0x3
-	.2byte	0x4b3
+	.2byte	0x48f
 	.4byte	0xb5
-	.4byte	.LLST427
+	.4byte	.LLST426
 	.uleb128 0x52
 	.4byte	.LASF325
 	.byte	0x3
-	.2byte	0x4b3
+	.2byte	0x48f
 	.4byte	0xb5
-	.4byte	.LLST428
+	.4byte	.LLST427
 	.uleb128 0x5d
 	.ascii	"buf\000"
 	.byte	0x3
-	.2byte	0x4b3
-	.4byte	0x6989
-	.4byte	.LLST429
+	.2byte	0x48f
+	.4byte	0x696f
+	.4byte	.LLST428
 	.uleb128 0x2d
-	.4byte	.LVL1870
-	.4byte	0x710a
+	.4byte	.LVL1872
+	.4byte	0x708d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37065,85 +37050,82 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x5c
-	.4byte	.LASF828
+	.4byte	.LASF826
 	.byte	0x3
-	.2byte	0x484
+	.2byte	0x460
 	.4byte	0x50
 	.4byte	.LFB221
 	.4byte	.LFE221-.LFB221
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6b02
+	.4byte	0x6adf
 	.uleb128 0x52
-	.4byte	.LASF732
+	.4byte	.LASF731
 	.byte	0x3
-	.2byte	0x484
+	.2byte	0x460
 	.4byte	0xdc5
-	.4byte	.LLST385
+	.4byte	.LLST372
 	.uleb128 0x52
-	.4byte	.LASF733
+	.4byte	.LASF732
 	.byte	0x3
-	.2byte	0x484
+	.2byte	0x460
 	.4byte	0xdc5
-	.4byte	.LLST386
+	.4byte	.LLST373
 	.uleb128 0x54
-	.4byte	.LASF735
+	.4byte	.LASF734
 	.byte	0x3
-	.2byte	0x486
+	.2byte	0x462
 	.4byte	0xdba
-	.4byte	.LLST387
+	.4byte	.LLST374
 	.uleb128 0x53
 	.ascii	"tmp\000"
 	.byte	0x3
-	.2byte	0x487
+	.2byte	0x463
 	.4byte	0xdba
-	.4byte	.LLST388
+	.4byte	.LLST375
 	.uleb128 0x53
 	.ascii	"lpa\000"
 	.byte	0x3
-	.2byte	0x488
+	.2byte	0x464
 	.4byte	0xdc5
-	.4byte	.LLST389
+	.4byte	.LLST376
 	.uleb128 0x28
-	.4byte	.LASF664
+	.4byte	.LASF663
 	.byte	0x3
-	.2byte	0x489
+	.2byte	0x465
 	.4byte	0xdc5
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -32
 	.uleb128 0x28
-	.4byte	.LASF641
+	.4byte	.LASF640
 	.byte	0x3
-	.2byte	0x489
+	.2byte	0x465
 	.4byte	0xdc5
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -28
 	.uleb128 0x54
-	.4byte	.LASF630
+	.4byte	.LASF629
 	.byte	0x3
-	.2byte	0x48a
+	.2byte	0x466
 	.4byte	0xdba
-	.4byte	.LLST390
-	.uleb128 0x44
-	.4byte	.LVL1635
-	.4byte	0x6ee0
+	.4byte	.LLST377
 	.uleb128 0x44
-	.4byte	.LVL1645
-	.4byte	0x537a
+	.4byte	.LVL1601
+	.4byte	0x536c
 	.uleb128 0x44
-	.4byte	.LVL1646
-	.4byte	0x4d75
+	.4byte	.LVL1602
+	.4byte	0x4d67
 	.uleb128 0x32
-	.4byte	.LVL1647
-	.4byte	0x5279
-	.4byte	0x6ad0
+	.4byte	.LVL1603
+	.4byte	0x526b
+	.4byte	0x6aad
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x77
+	.byte	0x76
 	.sleb128 0
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -37158,14 +37140,14 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1648
-	.4byte	0x5279
-	.4byte	0x6aef
+	.4byte	.LVL1604
+	.4byte	0x526b
+	.4byte	0x6acc
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x77
+	.byte	0x76
 	.sleb128 0
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -37180,74 +37162,74 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1649
-	.4byte	0x6189
+	.4byte	.LVL1605
+	.4byte	0x616f
 	.uleb128 0x44
-	.4byte	.LVL1650
-	.4byte	0x3259
+	.4byte	.LVL1606
+	.4byte	0x3236
 	.byte	0
 	.uleb128 0x5c
-	.4byte	.LASF829
+	.4byte	.LASF827
 	.byte	0x3
-	.2byte	0x3c1
+	.2byte	0x3bd
 	.4byte	0x50
 	.4byte	.LFB220
 	.4byte	.LFE220-.LFB220
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6ee0
+	.4byte	0x6e85
 	.uleb128 0x5d
 	.ascii	"LUN\000"
 	.byte	0x3
-	.2byte	0x3c1
+	.2byte	0x3bd
 	.4byte	0xdaf
+	.4byte	.LLST429
+	.uleb128 0x52
+	.4byte	.LASF731
+	.byte	0x3
+	.2byte	0x3bd
+	.4byte	0xdc5
 	.4byte	.LLST430
 	.uleb128 0x52
 	.4byte	.LASF732
 	.byte	0x3
-	.2byte	0x3c1
+	.2byte	0x3bd
 	.4byte	0xdc5
 	.4byte	.LLST431
 	.uleb128 0x52
 	.4byte	.LASF733
 	.byte	0x3
-	.2byte	0x3c1
-	.4byte	0xdc5
+	.2byte	0x3bd
+	.4byte	0x5142
 	.4byte	.LLST432
-	.uleb128 0x52
-	.4byte	.LASF734
-	.byte	0x3
-	.2byte	0x3c1
-	.4byte	0x5150
-	.4byte	.LLST433
 	.uleb128 0x54
-	.4byte	.LASF599
+	.4byte	.LASF598
 	.byte	0x3
-	.2byte	0x3c3
-	.4byte	0x2aca
-	.4byte	.LLST434
+	.2byte	0x3bf
+	.4byte	0x2ab9
+	.4byte	.LLST433
 	.uleb128 0x53
 	.ascii	"lpa\000"
 	.byte	0x3
-	.2byte	0x3c4
+	.2byte	0x3c0
 	.4byte	0xdc5
-	.4byte	.LLST435
+	.4byte	.LLST434
 	.uleb128 0x54
-	.4byte	.LASF830
+	.4byte	.LASF828
 	.byte	0x3
-	.2byte	0x3c4
+	.2byte	0x3c0
 	.4byte	0xdc5
-	.4byte	.LLST436
+	.4byte	.LLST435
 	.uleb128 0x54
-	.4byte	.LASF831
+	.4byte	.LASF829
 	.byte	0x3
-	.2byte	0x3c4
+	.2byte	0x3c0
 	.4byte	0xdc5
-	.4byte	.LLST437
+	.4byte	.LLST436
 	.uleb128 0x28
-	.4byte	.LASF664
+	.4byte	.LASF663
 	.byte	0x3
-	.2byte	0x3c5
+	.2byte	0x3c1
 	.4byte	0xdc5
 	.uleb128 0x2
 	.byte	0x91
@@ -37255,66 +37237,66 @@ __func__.9940:
 	.uleb128 0x53
 	.ascii	"ppa\000"
 	.byte	0x3
-	.2byte	0x3c5
+	.2byte	0x3c1
 	.4byte	0xdc5
-	.4byte	.LLST438
+	.4byte	.LLST437
 	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x3
-	.2byte	0x3c6
+	.2byte	0x3c2
+	.4byte	0xdc5
+	.4byte	.LLST438
+	.uleb128 0x54
+	.4byte	.LASF830
+	.byte	0x3
+	.2byte	0x3c2
 	.4byte	0xdc5
 	.4byte	.LLST439
 	.uleb128 0x54
-	.4byte	.LASF832
+	.4byte	.LASF595
 	.byte	0x3
-	.2byte	0x3c6
+	.2byte	0x3c2
 	.4byte	0xdc5
 	.4byte	.LLST440
 	.uleb128 0x54
-	.4byte	.LASF596
+	.4byte	.LASF831
 	.byte	0x3
-	.2byte	0x3c6
+	.2byte	0x3c3
 	.4byte	0xdc5
 	.4byte	.LLST441
 	.uleb128 0x54
-	.4byte	.LASF833
+	.4byte	.LASF832
 	.byte	0x3
-	.2byte	0x3c7
+	.2byte	0x3c3
 	.4byte	0xdc5
 	.4byte	.LLST442
 	.uleb128 0x54
-	.4byte	.LASF834
+	.4byte	.LASF639
 	.byte	0x3
-	.2byte	0x3c7
-	.4byte	0xdc5
+	.2byte	0x3c4
+	.4byte	0x1d68
 	.4byte	.LLST443
-	.uleb128 0x54
-	.4byte	.LASF640
-	.byte	0x3
-	.2byte	0x3c8
-	.4byte	0x1d79
-	.4byte	.LLST444
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x5375
+	.4byte	.LASF573
+	.4byte	0x5367
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.8951
+	.4byte	__func__.8954
 	.uleb128 0x3e
-	.4byte	.Ldebug_ranges0+0x190
-	.4byte	0x6c9f
+	.4byte	.Ldebug_ranges0+0x1d8
+	.4byte	0x6c7c
 	.uleb128 0x28
-	.4byte	.LASF604
+	.4byte	.LASF603
 	.byte	0x3
-	.2byte	0x43d
+	.2byte	0x425
 	.4byte	0xde6
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -52
 	.uleb128 0x32
-	.4byte	.LVL1952
-	.4byte	0x26b9
-	.4byte	0x6c5e
+	.4byte	.LVL1933
+	.4byte	0x26a8
+	.4byte	0x6c3b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37333,15 +37315,15 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1954
-	.4byte	0x928b
-	.4byte	0x6c7b
+	.4byte	.LVL1935
+	.4byte	0x92b5
+	.4byte	0x6c58
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC105
+	.4byte	.LC108
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
@@ -37350,8 +37332,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1955
-	.4byte	0x928b
+	.4byte	.LVL1936
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37363,133 +37345,66 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR180
+	.4byte	.LANCHOR178
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x44a
+	.2byte	0x432
 	.byte	0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1875
-	.4byte	0x5156
-	.4byte	0x6cc3
+	.4byte	.LVL1878
+	.4byte	0x5148
+	.4byte	0x6ca5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x3
-	.byte	0x78
-	.sleb128 256
+	.uleb128 0x7
+	.byte	0x91
+	.sleb128 -100
+	.byte	0x6
+	.byte	0x23
+	.uleb128 0x100
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x4
 	.byte	0x91
-	.sleb128 -80
+	.sleb128 -84
 	.byte	0x6
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
-	.uleb128 0x3
-	.byte	0x7d
-	.sleb128 0
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -88
 	.byte	0x6
 	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1887
-	.4byte	0x6ee0
 	.uleb128 0x32
-	.4byte	.LVL1890
-	.4byte	0x29fd
-	.4byte	0x6ced
+	.4byte	.LVL1893
+	.4byte	0x29ec
+	.4byte	0x6cc3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x4
 	.byte	0x91
-	.sleb128 -84
+	.sleb128 -96
 	.byte	0x6
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x7
+	.uleb128 0x4
 	.byte	0x91
-	.sleb128 -76
-	.byte	0x6
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x1c
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1892
-	.4byte	0x5b34
-	.4byte	0x6d00
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1893
-	.4byte	0x2c26
-	.uleb128 0x32
-	.4byte	.LVL1894
-	.4byte	0x29fd
-	.4byte	0x6d21
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1895
-	.4byte	0x29fd
-	.4byte	0x6d39
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1903
-	.4byte	0x22a6
-	.4byte	0x6d54
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x7d
-	.sleb128 0
+	.sleb128 -72
 	.byte	0x6
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
 	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1911
-	.4byte	0x6ee0
 	.uleb128 0x32
-	.4byte	.LVL1914
-	.4byte	0x928b
-	.4byte	0x6d84
+	.4byte	.LVL1897
+	.4byte	0x92b5
+	.4byte	0x6cea
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37501,21 +37416,18 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR180
+	.4byte	.LANCHOR178
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x3f4
+	.2byte	0x3dc
 	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1915
-	.4byte	0x6ee0
 	.uleb128 0x32
-	.4byte	.LVL1917
-	.4byte	0x3430
-	.4byte	0x6da4
+	.4byte	.LVL1899
+	.4byte	0x340d
+	.4byte	0x6d01
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37524,9 +37436,9 @@ __func__.9940:
 	.4byte	.LANCHOR52
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1918
-	.4byte	0x3430
-	.4byte	0x6dbb
+	.4byte	.LVL1900
+	.4byte	0x340d
+	.4byte	0x6d18
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37535,20 +37447,20 @@ __func__.9940:
 	.4byte	.LANCHOR51
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1920
-	.4byte	0x3430
-	.4byte	0x6dcf
+	.4byte	.LVL1902
+	.4byte	0x340d
+	.4byte	0x6d2c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x74
+	.byte	0x75
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1923
-	.4byte	0x928b
-	.4byte	0x6df6
+	.4byte	.LVL1905
+	.4byte	0x92b5
+	.4byte	0x6d53
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37560,25 +37472,24 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR180
+	.4byte	.LANCHOR178
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x415
+	.2byte	0x3fd
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1926
-	.4byte	0x6f0f
-	.4byte	0x6e17
+	.4byte	.LVL1908
+	.4byte	0x6e92
+	.4byte	0x6d72
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -92
-	.byte	0x6
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
@@ -37588,13 +37499,13 @@ __func__.9940:
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
-	.byte	0x74
+	.byte	0x75
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1927
-	.4byte	0x928b
-	.4byte	0x6e3e
+	.4byte	.LVL1909
+	.4byte	0x92b5
+	.4byte	0x6d99
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37606,29 +37517,29 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR180
+	.4byte	.LANCHOR178
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x46e
+	.2byte	0x44a
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1930
-	.4byte	0x3430
-	.4byte	0x6e52
+	.4byte	.LVL1912
+	.4byte	0x340d
+	.4byte	0x6dad
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x74
+	.byte	0x75
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1933
-	.4byte	0x5279
-	.4byte	0x6e71
+	.4byte	.LVL1915
+	.4byte	0x526b
+	.4byte	0x6dcc
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37648,27 +37559,26 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1934
-	.4byte	0x333e
-	.4byte	0x6e85
+	.4byte	.LVL1916
+	.4byte	0x331b
+	.4byte	0x6de0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x74
+	.byte	0x75
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1939
-	.4byte	0x230c
-	.4byte	0x6ea0
+	.4byte	.LVL1920
+	.4byte	0x22fb
+	.4byte	0x6df9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -88
-	.byte	0x6
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -37676,9 +37586,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1948
-	.4byte	0x928b
-	.4byte	0x6ec7
+	.4byte	.LVL1929
+	.4byte	0x92b5
+	.4byte	0x6e20
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37690,91 +37600,115 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR180
+	.4byte	.LANCHOR178
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x45f
+	.2byte	0x441
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1953
-	.4byte	0x22a6
-	.uleb128 0x34
-	.4byte	.LVL1957
-	.4byte	0x230c
+	.4byte	.LVL1934
+	.4byte	0x2295
+	.uleb128 0x32
+	.4byte	.LVL1938
+	.4byte	0x22fb
+	.4byte	0x6e3c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x1
 	.byte	0x30
 	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1943
+	.4byte	0x5b26
+	.4byte	0x6e4f
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
 	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF835
-	.byte	0x3
-	.2byte	0x3b7
-	.4byte	0x50
-	.4byte	.LFB219
-	.4byte	.LFE219-.LFB219
+	.uleb128 0x44
+	.4byte	.LVL1944
+	.4byte	0x2c15
+	.uleb128 0x32
+	.4byte	.LVL1945
+	.4byte	0x29ec
+	.4byte	0x6e70
+	.uleb128 0x2e
 	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6f0f
-	.uleb128 0x34
-	.4byte	.LVL1626
-	.4byte	0x6f0f
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x1
 	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL1946
+	.4byte	0x29ec
 	.uleb128 0x2e
 	.uleb128 0x1
-	.byte	0x52
+	.byte	0x50
 	.uleb128 0x1
 	.byte	0x30
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
 	.byte	0
 	.byte	0
+	.uleb128 0x51
+	.4byte	.LASF833
+	.byte	0x3
+	.2byte	0x3b7
+	.4byte	0x50
+	.byte	0x1
 	.uleb128 0x5f
-	.4byte	.LASF836
+	.4byte	.LASF834
 	.byte	0x3
 	.2byte	0x387
 	.4byte	.LFB218
 	.4byte	.LFE218-.LFB218
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x70f5
+	.4byte	0x7078
 	.uleb128 0x5d
 	.ascii	"req\000"
 	.byte	0x3
 	.2byte	0x387
 	.4byte	0x19f9
-	.4byte	.LLST377
+	.4byte	.LLST382
 	.uleb128 0x52
-	.4byte	.LASF596
+	.4byte	.LASF595
 	.byte	0x3
 	.2byte	0x387
 	.4byte	0xdc5
-	.4byte	.LLST378
+	.4byte	.LLST383
 	.uleb128 0x52
-	.4byte	.LASF837
+	.4byte	.LASF835
 	.byte	0x3
 	.2byte	0x387
 	.4byte	0xdc5
-	.4byte	.LLST379
+	.4byte	.LLST384
 	.uleb128 0x52
-	.4byte	.LASF640
+	.4byte	.LASF639
 	.byte	0x3
 	.2byte	0x387
-	.4byte	0x1d79
-	.4byte	.LLST380
+	.4byte	0x1d68
+	.4byte	.LLST385
 	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x3
 	.2byte	0x389
 	.4byte	0xdc5
-	.4byte	.LLST381
+	.4byte	.LLST386
 	.uleb128 0x60
 	.ascii	"ppa\000"
 	.byte	0x3
@@ -37784,39 +37718,39 @@ __func__.9940:
 	.byte	0x91
 	.sleb128 -36
 	.uleb128 0x54
-	.4byte	.LASF664
+	.4byte	.LASF663
 	.byte	0x3
 	.2byte	0x38a
 	.4byte	0xdc5
-	.4byte	.LLST382
+	.4byte	.LLST387
 	.uleb128 0x54
-	.4byte	.LASF624
+	.4byte	.LASF623
 	.byte	0x3
 	.2byte	0x38b
 	.4byte	0xdba
-	.4byte	.LLST383
+	.4byte	.LLST388
 	.uleb128 0x54
-	.4byte	.LASF599
+	.4byte	.LASF598
 	.byte	0x3
 	.2byte	0x38c
-	.4byte	0x2aca
-	.4byte	.LLST384
+	.4byte	0x2ab9
+	.4byte	.LLST389
 	.uleb128 0x62
-	.4byte	.LASF688
+	.4byte	.LASF687
 	.byte	0x3
 	.2byte	0x38d
 	.4byte	0xdc5
 	.byte	0
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x7105
+	.4byte	.LASF573
+	.4byte	0x7088
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.8923
+	.4byte	__func__.8926
 	.uleb128 0x32
-	.4byte	.LVL1607
-	.4byte	0x251a
-	.4byte	0x6fee
+	.4byte	.LVL1641
+	.4byte	0x2509
+	.4byte	0x6f71
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37837,12 +37771,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1608
-	.4byte	0x6189
+	.4byte	.LVL1642
+	.4byte	0x616f
 	.uleb128 0x32
-	.4byte	.LVL1610
-	.4byte	0x3430
-	.4byte	0x700b
+	.4byte	.LVL1644
+	.4byte	0x340d
+	.4byte	0x6f8e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37851,12 +37785,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1611
-	.4byte	0x2b9c
+	.4byte	.LVL1645
+	.4byte	0x2b8b
 	.uleb128 0x32
-	.4byte	.LVL1612
-	.4byte	0x333e
-	.4byte	0x7028
+	.4byte	.LVL1646
+	.4byte	0x331b
+	.4byte	0x6fab
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37865,9 +37799,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1613
-	.4byte	0x251a
-	.4byte	0x7046
+	.4byte	.LVL1647
+	.4byte	0x2509
+	.4byte	0x6fc9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37886,9 +37820,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1614
-	.4byte	0x928b
-	.4byte	0x706d
+	.4byte	.LVL1648
+	.4byte	0x92b5
+	.4byte	0x6ff0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37909,9 +37843,9 @@ __func__.9940:
 	.2byte	0x3a5
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1615
-	.4byte	0x5279
-	.4byte	0x7086
+	.4byte	.LVL1649
+	.4byte	0x526b
+	.4byte	0x7009
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -37925,9 +37859,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1617
-	.4byte	0x6189
-	.4byte	0x70a0
+	.4byte	.LVL1651
+	.4byte	0x616f
+	.4byte	0x7023
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37942,15 +37876,15 @@ __func__.9940:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1620
-	.4byte	0x928b
-	.4byte	0x70bd
+	.4byte	.LVL1654
+	.4byte	0x92b5
+	.4byte	0x7040
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC103
+	.4byte	.LC106
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -37959,9 +37893,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1621
-	.4byte	0x3259
-	.4byte	0x70d1
+	.4byte	.LVL1655
+	.4byte	0x3236
+	.4byte	0x7054
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37970,8 +37904,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1624
-	.4byte	0x928b
+	.4byte	.LVL1658
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37994,15 +37928,15 @@ __func__.9940:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x7105
+	.4byte	0x7088
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0xc
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x70f5
+	.4byte	0x7078
 	.uleb128 0x5c
-	.4byte	.LASF838
+	.4byte	.LASF836
 	.byte	0x3
 	.2byte	0x32d
 	.4byte	0x50
@@ -38010,12 +37944,18 @@ __func__.9940:
 	.4byte	.LFE217-.LFB217
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x72fd
+	.4byte	0x7277
 	.uleb128 0x5d
 	.ascii	"LUN\000"
 	.byte	0x3
 	.2byte	0x32d
 	.4byte	0xdaf
+	.4byte	.LLST409
+	.uleb128 0x52
+	.4byte	.LASF731
+	.byte	0x3
+	.2byte	0x32d
+	.4byte	0xdc5
 	.4byte	.LLST410
 	.uleb128 0x52
 	.4byte	.LASF732
@@ -38027,44 +37967,38 @@ __func__.9940:
 	.4byte	.LASF733
 	.byte	0x3
 	.2byte	0x32d
-	.4byte	0xdc5
+	.4byte	0x5142
 	.4byte	.LLST412
-	.uleb128 0x52
-	.4byte	.LASF734
-	.byte	0x3
-	.2byte	0x32d
-	.4byte	0x5150
-	.4byte	.LLST413
 	.uleb128 0x53
 	.ascii	"ret\000"
 	.byte	0x3
 	.2byte	0x32f
 	.4byte	0x50
-	.4byte	.LLST414
+	.4byte	.LLST413
 	.uleb128 0x54
-	.4byte	.LASF830
+	.4byte	.LASF828
 	.byte	0x3
 	.2byte	0x330
 	.4byte	0xdc5
-	.4byte	.LLST415
+	.4byte	.LLST414
 	.uleb128 0x54
-	.4byte	.LASF831
+	.4byte	.LASF829
 	.byte	0x3
 	.2byte	0x330
 	.4byte	0xdc5
-	.4byte	.LLST416
+	.4byte	.LLST415
 	.uleb128 0x54
-	.4byte	.LASF839
+	.4byte	.LASF837
 	.byte	0x3
 	.2byte	0x330
 	.4byte	0xdc5
-	.4byte	.LLST417
+	.4byte	.LLST416
 	.uleb128 0x53
 	.ascii	"lpa\000"
 	.byte	0x3
 	.2byte	0x331
 	.4byte	0xdc5
-	.4byte	.LLST418
+	.4byte	.LLST417
 	.uleb128 0x60
 	.ascii	"ppa\000"
 	.byte	0x3
@@ -38078,64 +38012,64 @@ __func__.9940:
 	.byte	0x3
 	.2byte	0x333
 	.4byte	0xdc5
-	.4byte	.LLST419
+	.4byte	.LLST418
 	.uleb128 0x54
-	.4byte	.LASF596
+	.4byte	.LASF595
 	.byte	0x3
 	.2byte	0x333
 	.4byte	0xdc5
-	.4byte	.LLST420
+	.4byte	.LLST419
 	.uleb128 0x54
-	.4byte	.LASF832
+	.4byte	.LASF830
 	.byte	0x3
 	.2byte	0x333
 	.4byte	0xdc5
-	.4byte	.LLST421
+	.4byte	.LLST420
 	.uleb128 0x54
-	.4byte	.LASF840
+	.4byte	.LASF838
 	.byte	0x3
 	.2byte	0x334
 	.4byte	0xdc5
-	.4byte	.LLST422
+	.4byte	.LLST421
 	.uleb128 0x54
-	.4byte	.LASF841
+	.4byte	.LASF839
 	.byte	0x3
 	.2byte	0x334
 	.4byte	0xdc5
-	.4byte	.LLST423
+	.4byte	.LLST422
 	.uleb128 0x54
-	.4byte	.LASF842
+	.4byte	.LASF840
 	.byte	0x3
 	.2byte	0x335
 	.4byte	0xdc5
-	.4byte	.LLST424
+	.4byte	.LLST423
 	.uleb128 0x54
-	.4byte	.LASF843
+	.4byte	.LASF841
 	.byte	0x3
 	.2byte	0x336
 	.4byte	0xdc5
-	.4byte	.LLST425
+	.4byte	.LLST424
 	.uleb128 0x61
-	.4byte	.LBB299
-	.4byte	.LBE299-.LBB299
-	.4byte	0x7261
+	.4byte	.LBB332
+	.4byte	.LBE332-.LBB332
+	.4byte	0x71e4
 	.uleb128 0x54
-	.4byte	.LASF587
+	.4byte	.LASF586
 	.byte	0x3
 	.2byte	0x37a
 	.4byte	0xdba
-	.4byte	.LLST426
+	.4byte	.LLST425
 	.uleb128 0x44
-	.4byte	.LVL1862
-	.4byte	0x6189
+	.4byte	.LVL1864
+	.4byte	0x616f
 	.uleb128 0x44
-	.4byte	.LVL1863
-	.4byte	0x2c26
+	.4byte	.LVL1865
+	.4byte	0x2c15
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1819
-	.4byte	0x503e
-	.4byte	0x7283
+	.4byte	.LVL1821
+	.4byte	0x5030
+	.4byte	0x7206
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38156,13 +38090,10 @@ __func__.9940:
 	.byte	0x78
 	.sleb128 0
 	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1825
-	.4byte	0x6ee0
 	.uleb128 0x32
-	.4byte	.LVL1834
-	.4byte	0x29fd
-	.4byte	0x72a4
+	.4byte	.LVL1836
+	.4byte	0x29ec
+	.4byte	0x721e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38175,9 +38106,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1836
-	.4byte	0x5279
-	.4byte	0x72c3
+	.4byte	.LVL1838
+	.4byte	0x526b
+	.4byte	0x723d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38197,9 +38128,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1842
-	.4byte	0x26b9
-	.4byte	0x72dd
+	.4byte	.LVL1844
+	.4byte	0x26a8
+	.4byte	0x7257
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38214,11 +38145,11 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1844
-	.4byte	0x22a6
+	.4byte	.LVL1846
+	.4byte	0x2295
 	.uleb128 0x34
-	.4byte	.LVL1851
-	.4byte	0x230c
+	.4byte	.LVL1853
+	.4byte	0x22fb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38233,7 +38164,7 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF844
+	.4byte	.LASF842
 	.byte	0x3
 	.2byte	0x325
 	.4byte	0x50
@@ -38241,13 +38172,13 @@ __func__.9940:
 	.4byte	.LFE216-.LFB216
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7321
+	.4byte	0x729b
 	.uleb128 0x44
-	.4byte	.LVL1631
-	.4byte	0x7321
+	.4byte	.LVL1587
+	.4byte	0x729b
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF845
+	.4byte	.LASF843
 	.byte	0x3
 	.2byte	0x31c
 	.4byte	0x50
@@ -38255,17 +38186,14 @@ __func__.9940:
 	.4byte	.LFE215-.LFB215
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x736a
-	.uleb128 0x44
-	.4byte	.LVL1627
-	.4byte	0x6ee0
+	.4byte	0x72db
 	.uleb128 0x44
-	.4byte	.LVL1628
-	.4byte	0x537a
+	.4byte	.LVL1584
+	.4byte	0x536c
 	.uleb128 0x32
-	.4byte	.LVL1629
-	.4byte	0x4fe6
-	.4byte	0x7360
+	.4byte	.LVL1585
+	.4byte	0x4fd8
+	.4byte	0x72d1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38273,11 +38201,11 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1630
-	.4byte	0x4d75
+	.4byte	.LVL1586
+	.4byte	0x4d67
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF846
+	.4byte	.LASF844
 	.byte	0x3
 	.2byte	0x2e6
 	.4byte	0x50
@@ -38285,34 +38213,34 @@ __func__.9940:
 	.4byte	.LFE214-.LFB214
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7438
+	.4byte	0x73a9
 	.uleb128 0x28
-	.4byte	.LASF847
+	.4byte	.LASF845
 	.byte	0x3
 	.2byte	0x2e8
-	.4byte	0x7438
+	.4byte	0x73a9
 	.uleb128 0x6
 	.byte	0x3
 	.4byte	g_nand_phy_info
 	.byte	0x9f
 	.uleb128 0x58
-	.4byte	.LASF848
+	.4byte	.LASF846
 	.byte	0x3
 	.2byte	0x2f3
 	.4byte	.LDL2
 	.uleb128 0x61
-	.4byte	.LBB309
-	.4byte	.LBE309-.LBB309
-	.4byte	0x73d3
+	.4byte	.LBB342
+	.4byte	.LBE342-.LBB342
+	.4byte	0x7344
 	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x3
 	.2byte	0x310
 	.4byte	0xdc5
-	.4byte	.LLST454
+	.4byte	.LLST453
 	.uleb128 0x34
-	.4byte	.LVL2068
-	.4byte	0x29fd
+	.4byte	.LVL2057
+	.4byte	0x29ec
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38326,9 +38254,9 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2060
-	.4byte	0x928b
-	.4byte	0x73f3
+	.4byte	.LVL2049
+	.4byte	0x92b5
+	.4byte	0x7364
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38343,9 +38271,9 @@ __func__.9940:
 	.4byte	.LC70
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2061
-	.4byte	0x7a89
-	.4byte	0x740a
+	.4byte	.LVL2050
+	.4byte	0x79fa
+	.4byte	0x737b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38354,26 +38282,26 @@ __func__.9940:
 	.4byte	.LANCHOR0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL2062
-	.4byte	0x782c
+	.4byte	.LVL2051
+	.4byte	0x779d
 	.uleb128 0x44
-	.4byte	.LVL2063
-	.4byte	0x777c
+	.4byte	.LVL2052
+	.4byte	0x76ed
 	.uleb128 0x44
-	.4byte	.LVL2064
-	.4byte	0x601f
+	.4byte	.LVL2053
+	.4byte	0x6005
 	.uleb128 0x44
-	.4byte	.LVL2065
-	.4byte	0x649e
+	.4byte	.LVL2054
+	.4byte	0x6484
 	.uleb128 0x44
-	.4byte	.LVL2066
-	.4byte	0x399e
+	.4byte	.LVL2055
+	.4byte	0x398b
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0xed2
 	.uleb128 0x5c
-	.4byte	.LASF849
+	.4byte	.LASF847
 	.byte	0x3
 	.2byte	0x26e
 	.4byte	0x50
@@ -38381,57 +38309,57 @@ __func__.9940:
 	.4byte	.LFE213-.LFB213
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7594
+	.4byte	0x7505
 	.uleb128 0x54
-	.4byte	.LASF718
+	.4byte	.LASF717
 	.byte	0x3
 	.2byte	0x270
 	.4byte	0xdba
-	.4byte	.LLST450
+	.4byte	.LLST449
 	.uleb128 0x54
-	.4byte	.LASF850
+	.4byte	.LASF848
 	.byte	0x3
 	.2byte	0x270
 	.4byte	0xdba
-	.4byte	.LLST451
+	.4byte	.LLST450
 	.uleb128 0x54
-	.4byte	.LASF851
+	.4byte	.LASF849
 	.byte	0x3
 	.2byte	0x271
 	.4byte	0xdba
-	.4byte	.LLST452
+	.4byte	.LLST451
 	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x3
 	.2byte	0x272
 	.4byte	0xdba
-	.4byte	.LLST453
+	.4byte	.LLST452
 	.uleb128 0x58
-	.4byte	.LASF852
+	.4byte	.LASF850
 	.byte	0x3
 	.2byte	0x2bc
-	.4byte	.L1798
+	.4byte	.L1785
 	.uleb128 0x58
-	.4byte	.LASF853
+	.4byte	.LASF851
 	.byte	0x3
 	.2byte	0x2cc
-	.4byte	.L1800
+	.4byte	.L1787
 	.uleb128 0x44
-	.4byte	.LVL2014
-	.4byte	0x601f
+	.4byte	.LVL2003
+	.4byte	0x6005
 	.uleb128 0x44
-	.4byte	.LVL2015
-	.4byte	0x649e
+	.4byte	.LVL2004
+	.4byte	0x6484
 	.uleb128 0x44
-	.4byte	.LVL2016
-	.4byte	0x6240
+	.4byte	.LVL2005
+	.4byte	0x6226
 	.uleb128 0x44
-	.4byte	.LVL2030
-	.4byte	0x6657
+	.4byte	.LVL2019
+	.4byte	0x663d
 	.uleb128 0x32
-	.4byte	.LVL2031
-	.4byte	0x230c
-	.4byte	0x74e5
+	.4byte	.LVL2020
+	.4byte	0x22fb
+	.4byte	0x7456
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38439,9 +38367,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2032
-	.4byte	0x230c
-	.4byte	0x74f9
+	.4byte	.LVL2021
+	.4byte	0x22fb
+	.4byte	0x746a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38450,9 +38378,9 @@ __func__.9940:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2033
-	.4byte	0x3f2e
-	.4byte	0x750d
+	.4byte	.LVL2022
+	.4byte	0x3f1b
+	.4byte	0x747e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38461,9 +38389,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2037
-	.4byte	0x7594
-	.4byte	0x7526
+	.4byte	.LVL2026
+	.4byte	0x7505
+	.4byte	0x7497
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38477,15 +38405,15 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL2044
-	.4byte	0x7ae5
+	.4byte	.LVL2033
+	.4byte	0x7a56
 	.uleb128 0x44
-	.4byte	.LVL2045
-	.4byte	0x601f
+	.4byte	.LVL2034
+	.4byte	0x6005
 	.uleb128 0x32
-	.4byte	.LVL2048
-	.4byte	0x7594
-	.4byte	0x7551
+	.4byte	.LVL2037
+	.4byte	0x7505
+	.4byte	0x74c2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38499,9 +38427,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2051
-	.4byte	0x7594
-	.4byte	0x7564
+	.4byte	.LVL2040
+	.4byte	0x7505
+	.4byte	0x74d5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38509,9 +38437,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2055
-	.4byte	0x3f2e
-	.4byte	0x7578
+	.4byte	.LVL2044
+	.4byte	0x3f1b
+	.4byte	0x74e9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38520,17 +38448,17 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL2056
-	.4byte	0x5e26
+	.4byte	.LVL2045
+	.4byte	0x5e28
 	.uleb128 0x44
-	.4byte	.LVL2057
-	.4byte	0x4d75
+	.4byte	.LVL2046
+	.4byte	0x4d67
 	.uleb128 0x44
-	.4byte	.LVL2058
-	.4byte	0x399e
+	.4byte	.LVL2047
+	.4byte	0x398b
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF854
+	.4byte	.LASF852
 	.byte	0x3
 	.2byte	0x20f
 	.4byte	0x50
@@ -38538,76 +38466,76 @@ __func__.9940:
 	.4byte	.LFE212-.LFB212
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7752
+	.4byte	0x76c3
 	.uleb128 0x52
-	.4byte	.LASF718
+	.4byte	.LASF717
 	.byte	0x3
 	.2byte	0x20f
 	.4byte	0xdba
-	.4byte	.LLST181
+	.4byte	.LLST175
 	.uleb128 0x52
-	.4byte	.LASF855
+	.4byte	.LASF853
 	.byte	0x3
 	.2byte	0x20f
 	.4byte	0xdaf
-	.4byte	.LLST182
+	.4byte	.LLST176
 	.uleb128 0x54
-	.4byte	.LASF850
+	.4byte	.LASF848
 	.byte	0x3
 	.2byte	0x211
 	.4byte	0xdba
-	.4byte	.LLST183
+	.4byte	.LLST177
 	.uleb128 0x54
-	.4byte	.LASF569
+	.4byte	.LASF568
 	.byte	0x3
 	.2byte	0x211
 	.4byte	0xdba
-	.4byte	.LLST184
+	.4byte	.LLST178
 	.uleb128 0x54
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x3
 	.2byte	0x212
 	.4byte	0xdba
-	.4byte	.LLST185
+	.4byte	.LLST179
 	.uleb128 0x54
 	.4byte	.LASF388
 	.byte	0x3
 	.2byte	0x212
 	.4byte	0xdba
-	.4byte	.LLST186
+	.4byte	.LLST180
 	.uleb128 0x54
-	.4byte	.LASF856
+	.4byte	.LASF854
 	.byte	0x3
 	.2byte	0x213
 	.4byte	0xdba
-	.4byte	.LLST187
+	.4byte	.LLST181
 	.uleb128 0x54
-	.4byte	.LASF857
+	.4byte	.LASF855
 	.byte	0x3
 	.2byte	0x214
 	.4byte	0xdba
-	.4byte	.LLST188
+	.4byte	.LLST182
 	.uleb128 0x54
-	.4byte	.LASF858
+	.4byte	.LASF856
 	.byte	0x3
 	.2byte	0x215
 	.4byte	0xdba
-	.4byte	.LLST189
+	.4byte	.LLST183
 	.uleb128 0x54
-	.4byte	.LASF859
+	.4byte	.LASF857
 	.byte	0x3
 	.2byte	0x216
 	.4byte	0xdba
-	.4byte	.LLST190
+	.4byte	.LLST184
 	.uleb128 0x58
-	.4byte	.LASF860
+	.4byte	.LASF858
 	.byte	0x3
 	.2byte	0x240
-	.4byte	.L509
+	.4byte	.L496
 	.uleb128 0x32
-	.4byte	.LVL645
-	.4byte	0x2464
-	.4byte	0x7674
+	.4byte	.LVL635
+	.4byte	0x2453
+	.4byte	0x75e5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38622,9 +38550,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL653
-	.4byte	0x251a
-	.4byte	0x769a
+	.4byte	.LVL643
+	.4byte	0x2509
+	.4byte	0x760b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38651,9 +38579,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL660
-	.4byte	0x2464
-	.4byte	0x76b4
+	.4byte	.LVL650
+	.4byte	0x2453
+	.4byte	0x7625
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38668,9 +38596,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL662
-	.4byte	0x61f9
-	.4byte	0x76ca
+	.4byte	.LVL652
+	.4byte	0x61df
+	.4byte	0x763b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38681,9 +38609,9 @@ __func__.9940:
 	.byte	0x2
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL664
-	.4byte	0x7752
-	.4byte	0x76de
+	.4byte	.LVL654
+	.4byte	0x76c3
+	.4byte	0x764f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38692,9 +38620,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL665
-	.4byte	0x682c
-	.4byte	0x76f2
+	.4byte	.LVL655
+	.4byte	0x6812
+	.4byte	0x7663
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38703,12 +38631,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL676
-	.4byte	0x688f
+	.4byte	.LVL666
+	.4byte	0x6875
 	.uleb128 0x32
-	.4byte	.LVL680
-	.4byte	0x61f9
-	.4byte	0x7711
+	.4byte	.LVL670
+	.4byte	0x61df
+	.4byte	0x7682
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38719,9 +38647,9 @@ __func__.9940:
 	.byte	0x2
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL682
-	.4byte	0x7752
-	.4byte	0x7725
+	.4byte	.LVL672
+	.4byte	0x76c3
+	.4byte	0x7696
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38730,9 +38658,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL683
-	.4byte	0x682c
-	.4byte	0x7739
+	.4byte	.LVL673
+	.4byte	0x6812
+	.4byte	0x76aa
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38741,11 +38669,11 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL691
-	.4byte	0x688f
+	.4byte	.LVL681
+	.4byte	0x6875
 	.uleb128 0x34
-	.4byte	.LVL695
-	.4byte	0x5f68
+	.4byte	.LVL685
+	.4byte	0x5fb2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38754,37 +38682,37 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF861
+	.4byte	.LASF859
 	.byte	0x3
 	.2byte	0x201
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x777c
+	.4byte	0x76ed
 	.uleb128 0x4a
 	.4byte	.LASF388
 	.byte	0x3
 	.2byte	0x201
 	.4byte	0xdba
 	.uleb128 0x4b
-	.4byte	.LASF862
+	.4byte	.LASF860
 	.byte	0x3
 	.2byte	0x203
 	.4byte	0xdba
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF863
+	.4byte	.LASF861
 	.byte	0x3
-	.2byte	0x1ec
+	.2byte	0x1ed
 	.4byte	0x50
 	.4byte	.LFB210
 	.4byte	.LFE210-.LFB210
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x782c
+	.4byte	0x779d
 	.uleb128 0x32
-	.4byte	.LVL1041
-	.4byte	0x230c
-	.4byte	0x77aa
+	.4byte	.LVL1049
+	.4byte	0x22fb
+	.4byte	0x771b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38793,9 +38721,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1042
-	.4byte	0x230c
-	.4byte	0x77be
+	.4byte	.LVL1050
+	.4byte	0x22fb
+	.4byte	0x772f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38804,9 +38732,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1043
-	.4byte	0x230c
-	.4byte	0x77d2
+	.4byte	.LVL1051
+	.4byte	0x22fb
+	.4byte	0x7743
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38815,15 +38743,15 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1044
-	.4byte	0x230c
-	.4byte	0x77f5
+	.4byte	.LVL1052
+	.4byte	0x22fb
+	.4byte	0x7766
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR79
+	.4byte	.LANCHOR39
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38838,15 +38766,15 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1045
-	.4byte	0x230c
-	.4byte	0x7819
+	.4byte	.LVL1053
+	.4byte	0x22fb
+	.4byte	0x778a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR83
+	.4byte	.LANCHOR81
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38861,50 +38789,50 @@ __func__.9940:
 	.2byte	0x200
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1046
-	.4byte	0x3236
+	.4byte	.LVL1054
+	.4byte	0x3213
 	.uleb128 0x44
-	.4byte	.LVL1047
-	.4byte	0x4780
+	.4byte	.LVL1055
+	.4byte	0x476d
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF864
+	.4byte	.LASF862
 	.byte	0x3
-	.2byte	0x116
+	.2byte	0x117
 	.4byte	0x50
 	.4byte	.LFB209
 	.4byte	.LFE209-.LFB209
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7a89
+	.4byte	0x79fa
 	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x3
-	.2byte	0x118
+	.2byte	0x119
 	.4byte	0xdc5
 	.4byte	.LLST194
 	.uleb128 0x54
-	.4byte	.LASF865
+	.4byte	.LASF863
 	.byte	0x3
-	.2byte	0x119
+	.2byte	0x11a
 	.4byte	0xdc5
 	.4byte	.LLST195
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x65dd
+	.4byte	.LASF573
+	.4byte	0x65c3
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.8799
+	.4byte	__func__.8802
 	.uleb128 0x44
-	.4byte	.LVL699
-	.4byte	0x2928
+	.4byte	.LVL707
+	.4byte	0x2917
 	.uleb128 0x44
-	.4byte	.LVL700
-	.4byte	0x2928
+	.4byte	.LVL708
+	.4byte	0x2917
 	.uleb128 0x32
-	.4byte	.LVL702
-	.4byte	0x2928
-	.4byte	0x7899
+	.4byte	.LVL710
+	.4byte	0x2917
+	.4byte	0x780a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38913,9 +38841,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL703
-	.4byte	0x2928
-	.4byte	0x78ad
+	.4byte	.LVL711
+	.4byte	0x2917
+	.4byte	0x781e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38924,9 +38852,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL704
-	.4byte	0x2928
-	.4byte	0x78c1
+	.4byte	.LVL712
+	.4byte	0x2917
+	.4byte	0x7832
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38935,9 +38863,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL705
-	.4byte	0x2928
-	.4byte	0x78d5
+	.4byte	.LVL713
+	.4byte	0x2917
+	.4byte	0x7846
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38946,9 +38874,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL706
-	.4byte	0x2928
-	.4byte	0x78e9
+	.4byte	.LVL714
+	.4byte	0x2917
+	.4byte	0x785a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38957,9 +38885,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL708
-	.4byte	0x2928
-	.4byte	0x78fd
+	.4byte	.LVL716
+	.4byte	0x2917
+	.4byte	0x786e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38968,9 +38896,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL709
-	.4byte	0x2928
-	.4byte	0x7911
+	.4byte	.LVL717
+	.4byte	0x2917
+	.4byte	0x7882
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38979,9 +38907,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL710
-	.4byte	0x2928
-	.4byte	0x7925
+	.4byte	.LVL718
+	.4byte	0x2917
+	.4byte	0x7896
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38990,12 +38918,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL711
-	.4byte	0x2928
+	.4byte	.LVL719
+	.4byte	0x2917
 	.uleb128 0x32
-	.4byte	.LVL712
-	.4byte	0x2928
-	.4byte	0x7942
+	.4byte	.LVL720
+	.4byte	0x2917
+	.4byte	0x78b3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39004,9 +38932,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL713
-	.4byte	0x2928
-	.4byte	0x7956
+	.4byte	.LVL721
+	.4byte	0x2917
+	.4byte	0x78c7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39015,12 +38943,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL715
-	.4byte	0x2928
+	.4byte	.LVL723
+	.4byte	0x2917
 	.uleb128 0x32
-	.4byte	.LVL717
-	.4byte	0x2928
-	.4byte	0x7973
+	.4byte	.LVL725
+	.4byte	0x2917
+	.4byte	0x78e4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39029,9 +38957,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL718
-	.4byte	0x2928
-	.4byte	0x7989
+	.4byte	.LVL726
+	.4byte	0x2917
+	.4byte	0x78fa
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39042,18 +38970,18 @@ __func__.9940:
 	.byte	0x24
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL719
-	.4byte	0x2928
+	.4byte	.LVL727
+	.4byte	0x2917
 	.uleb128 0x44
-	.4byte	.LVL720
-	.4byte	0x2928
+	.4byte	.LVL728
+	.4byte	0x2917
 	.uleb128 0x44
-	.4byte	.LVL721
-	.4byte	0x2928
+	.4byte	.LVL729
+	.4byte	0x2917
 	.uleb128 0x32
-	.4byte	.LVL724
-	.4byte	0x2928
-	.4byte	0x79b8
+	.4byte	.LVL732
+	.4byte	0x2917
+	.4byte	0x7929
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39062,9 +38990,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL725
-	.4byte	0x2928
-	.4byte	0x79cc
+	.4byte	.LVL733
+	.4byte	0x2917
+	.4byte	0x793d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39073,9 +39001,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL729
-	.4byte	0x2928
-	.4byte	0x79e0
+	.4byte	.LVL737
+	.4byte	0x2917
+	.4byte	0x7951
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39084,9 +39012,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL730
-	.4byte	0x2928
-	.4byte	0x79f4
+	.4byte	.LVL738
+	.4byte	0x2917
+	.4byte	0x7965
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39095,24 +39023,24 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL732
-	.4byte	0x2928
+	.4byte	.LVL740
+	.4byte	0x2917
 	.uleb128 0x44
-	.4byte	.LVL733
-	.4byte	0x2928
+	.4byte	.LVL741
+	.4byte	0x2917
 	.uleb128 0x44
-	.4byte	.LVL734
-	.4byte	0x2928
+	.4byte	.LVL742
+	.4byte	0x2917
 	.uleb128 0x44
-	.4byte	.LVL735
-	.4byte	0x2928
+	.4byte	.LVL743
+	.4byte	0x2917
 	.uleb128 0x44
-	.4byte	.LVL736
-	.4byte	0x2928
+	.4byte	.LVL744
+	.4byte	0x2917
 	.uleb128 0x32
-	.4byte	.LVL737
-	.4byte	0x230c
-	.4byte	0x7a36
+	.4byte	.LVL745
+	.4byte	0x22fb
+	.4byte	0x79a7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -39122,32 +39050,32 @@ __func__.9940:
 	.byte	0x6
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL739
-	.4byte	0x2928
+	.4byte	.LVL747
+	.4byte	0x2917
 	.uleb128 0x44
-	.4byte	.LVL742
-	.4byte	0x2928
+	.4byte	.LVL750
+	.4byte	0x2917
 	.uleb128 0x44
-	.4byte	.LVL745
-	.4byte	0x2928
+	.4byte	.LVL753
+	.4byte	0x2917
 	.uleb128 0x44
-	.4byte	.LVL748
-	.4byte	0x2928
+	.4byte	.LVL756
+	.4byte	0x2917
 	.uleb128 0x44
-	.4byte	.LVL751
-	.4byte	0x2928
+	.4byte	.LVL759
+	.4byte	0x2917
 	.uleb128 0x44
-	.4byte	.LVL755
-	.4byte	0x2928
+	.4byte	.LVL763
+	.4byte	0x2917
 	.uleb128 0x34
-	.4byte	.LVL759
-	.4byte	0x928b
+	.4byte	.LVL767
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC82
+	.4byte	.LC85
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -39157,34 +39085,34 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x39
-	.4byte	.LASF866
+	.4byte	.LASF864
 	.byte	0x3
-	.byte	0xb6
+	.byte	0xb7
 	.4byte	0x50
 	.4byte	.LFB208
 	.4byte	.LFE208-.LFB208
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7ae5
+	.4byte	0x7a56
 	.uleb128 0x2c
-	.4byte	.LASF847
+	.4byte	.LASF845
 	.byte	0x3
-	.byte	0xb6
-	.4byte	0x7438
+	.byte	0xb7
+	.4byte	0x73a9
 	.4byte	.LLST10
 	.uleb128 0x3b
 	.ascii	"i\000"
 	.byte	0x3
-	.byte	0xb8
+	.byte	0xb9
 	.4byte	0xdc5
 	.4byte	.LLST11
 	.uleb128 0x44
 	.4byte	.LVL30
-	.4byte	0x7b26
+	.4byte	0x7a97
 	.uleb128 0x32
 	.4byte	.LVL31
-	.4byte	0x7b26
-	.4byte	0x7adb
+	.4byte	0x7a97
+	.4byte	0x7a4c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39194,39 +39122,39 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x44
 	.4byte	.LVL35
-	.4byte	0x7ae5
+	.4byte	0x7a56
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF867
+	.4byte	.LASF865
 	.byte	0x3
-	.byte	0xa4
+	.byte	0xa5
 	.4byte	0x50
 	.4byte	.LFB207
 	.4byte	.LFE207-.LFB207
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7b0e
+	.4byte	0x7a7f
 	.uleb128 0x2c
-	.4byte	.LASF868
+	.4byte	.LASF866
 	.byte	0x3
-	.byte	0xa4
+	.byte	0xa5
 	.4byte	0xdba
 	.4byte	.LLST9
 	.byte	0
 	.uleb128 0x66
-	.4byte	.LASF869
+	.4byte	.LASF867
 	.byte	0x3
-	.byte	0x9e
+	.byte	0x9f
 	.byte	0x1
-	.4byte	0x7b26
+	.4byte	0x7a97
 	.uleb128 0x36
-	.4byte	.LASF870
+	.4byte	.LASF868
 	.byte	0x3
-	.byte	0x9e
+	.byte	0x9f
 	.4byte	0xdc5
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF871
+	.4byte	.LASF869
 	.byte	0x3
 	.byte	0x7f
 	.4byte	0xdba
@@ -39234,7 +39162,7 @@ __func__.9940:
 	.4byte	.LFE205-.LFB205
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7b6b
+	.4byte	0x7adc
 	.uleb128 0x2f
 	.ascii	"num\000"
 	.byte	0x3
@@ -39248,14 +39176,14 @@ __func__.9940:
 	.4byte	0xdba
 	.4byte	.LLST7
 	.uleb128 0x30
-	.4byte	.LASF872
+	.4byte	.LASF870
 	.byte	0x3
 	.byte	0x82
 	.4byte	0xdc5
 	.4byte	.LLST8
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF873
+	.4byte	.LASF871
 	.byte	0x3
 	.byte	0x71
 	.4byte	0x50
@@ -39263,23 +39191,23 @@ __func__.9940:
 	.4byte	.LFE204-.LFB204
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7bd9
+	.4byte	0x7b4a
 	.uleb128 0x2c
 	.4byte	.LASF299
 	.byte	0x3
 	.byte	0x71
 	.4byte	0xf6
-	.4byte	.LLST111
+	.4byte	.LLST102
 	.uleb128 0x3b
 	.ascii	"buf\000"
 	.byte	0x3
 	.byte	0x73
 	.4byte	0xf6
-	.4byte	.LLST112
+	.4byte	.LLST103
 	.uleb128 0x32
-	.4byte	.LVL451
-	.4byte	0x92ad
-	.4byte	0x7bc8
+	.4byte	.LVL439
+	.4byte	0x92d7
+	.4byte	0x7b39
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39300,8 +39228,8 @@ __func__.9940:
 	.4byte	.LC70
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL453
-	.4byte	0x7bd9
+	.4byte	.LVL441
+	.4byte	0x7b4a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39311,7 +39239,7 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF874
+	.4byte	.LASF872
 	.byte	0x3
 	.byte	0xb
 	.4byte	0x50
@@ -39319,39 +39247,39 @@ __func__.9940:
 	.4byte	.LFE203-.LFB203
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x842f
+	.4byte	0x83a0
 	.uleb128 0x2c
 	.4byte	.LASF299
 	.byte	0x3
 	.byte	0xb
 	.4byte	0xf6
-	.4byte	.LLST106
+	.4byte	.LLST97
 	.uleb128 0x3b
 	.ascii	"i\000"
 	.byte	0x3
 	.byte	0xd
 	.4byte	0x50
-	.4byte	.LLST107
+	.4byte	.LLST98
 	.uleb128 0x3b
 	.ascii	"buf\000"
 	.byte	0x3
 	.byte	0xe
 	.4byte	0xf6
-	.4byte	.LLST108
+	.4byte	.LLST99
 	.uleb128 0x61
-	.4byte	.LBB211
-	.4byte	.LBE211-.LBB211
-	.4byte	0x7c6d
+	.4byte	.LBB225
+	.4byte	.LBE225-.LBB225
+	.4byte	0x7bde
 	.uleb128 0x30
-	.4byte	.LASF587
+	.4byte	.LASF586
 	.byte	0x3
 	.byte	0x57
 	.4byte	0xdba
-	.4byte	.LLST109
+	.4byte	.LLST100
 	.uleb128 0x32
-	.4byte	.LVL437
-	.4byte	0x5b34
-	.4byte	0x7c4d
+	.4byte	.LVL425
+	.4byte	0x5b26
+	.4byte	0x7bbe
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39360,8 +39288,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL439
-	.4byte	0x92ad
+	.4byte	.LVL427
+	.4byte	0x92d7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39383,18 +39311,18 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x61
-	.4byte	.LBB212
-	.4byte	.LBE212-.LBB212
-	.4byte	0x7ca6
+	.4byte	.LBB226
+	.4byte	.LBE226-.LBB226
+	.4byte	0x7c17
 	.uleb128 0x30
-	.4byte	.LASF587
+	.4byte	.LASF586
 	.byte	0x3
 	.byte	0x60
 	.4byte	0xdba
-	.4byte	.LLST110
+	.4byte	.LLST101
 	.uleb128 0x34
-	.4byte	.LVL447
-	.4byte	0x92ad
+	.4byte	.LVL435
+	.4byte	0x92d7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39416,9 +39344,9 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL302
-	.4byte	0x92ad
-	.4byte	0x7cc3
+	.4byte	.LVL290
+	.4byte	0x92d7
+	.4byte	0x7c34
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39433,9 +39361,9 @@ __func__.9940:
 	.4byte	.LC2
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL304
-	.4byte	0x92ad
-	.4byte	0x7ce0
+	.4byte	.LVL292
+	.4byte	0x92d7
+	.4byte	0x7c51
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39450,9 +39378,9 @@ __func__.9940:
 	.4byte	.LC3
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL306
-	.4byte	0x92ad
-	.4byte	0x7cfd
+	.4byte	.LVL294
+	.4byte	0x92d7
+	.4byte	0x7c6e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39467,9 +39395,9 @@ __func__.9940:
 	.4byte	.LC4
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL308
-	.4byte	0x92ad
-	.4byte	0x7d1a
+	.4byte	.LVL296
+	.4byte	0x92d7
+	.4byte	0x7c8b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39484,9 +39412,9 @@ __func__.9940:
 	.4byte	.LC5
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL310
-	.4byte	0x92ad
-	.4byte	0x7d37
+	.4byte	.LVL298
+	.4byte	0x92d7
+	.4byte	0x7ca8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39501,9 +39429,9 @@ __func__.9940:
 	.4byte	.LC6
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL312
-	.4byte	0x92ad
-	.4byte	0x7d54
+	.4byte	.LVL300
+	.4byte	0x92d7
+	.4byte	0x7cc5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39518,9 +39446,9 @@ __func__.9940:
 	.4byte	.LC7
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL314
-	.4byte	0x92ad
-	.4byte	0x7d71
+	.4byte	.LVL302
+	.4byte	0x92d7
+	.4byte	0x7ce2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39535,9 +39463,9 @@ __func__.9940:
 	.4byte	.LC8
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL316
-	.4byte	0x92ad
-	.4byte	0x7d8e
+	.4byte	.LVL304
+	.4byte	0x92d7
+	.4byte	0x7cff
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39552,9 +39480,9 @@ __func__.9940:
 	.4byte	.LC9
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL318
-	.4byte	0x92ad
-	.4byte	0x7dab
+	.4byte	.LVL306
+	.4byte	0x92d7
+	.4byte	0x7d1c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39569,9 +39497,9 @@ __func__.9940:
 	.4byte	.LC10
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL320
-	.4byte	0x92ad
-	.4byte	0x7dc8
+	.4byte	.LVL308
+	.4byte	0x92d7
+	.4byte	0x7d39
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39586,9 +39514,9 @@ __func__.9940:
 	.4byte	.LC11
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL322
-	.4byte	0x92ad
-	.4byte	0x7de5
+	.4byte	.LVL310
+	.4byte	0x92d7
+	.4byte	0x7d56
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39603,9 +39531,9 @@ __func__.9940:
 	.4byte	.LC12
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL324
-	.4byte	0x92ad
-	.4byte	0x7e02
+	.4byte	.LVL312
+	.4byte	0x92d7
+	.4byte	0x7d73
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39620,9 +39548,9 @@ __func__.9940:
 	.4byte	.LC13
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL326
-	.4byte	0x92ad
-	.4byte	0x7e1f
+	.4byte	.LVL314
+	.4byte	0x92d7
+	.4byte	0x7d90
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39637,9 +39565,9 @@ __func__.9940:
 	.4byte	.LC14
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL328
-	.4byte	0x92ad
-	.4byte	0x7e3c
+	.4byte	.LVL316
+	.4byte	0x92d7
+	.4byte	0x7dad
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39654,9 +39582,9 @@ __func__.9940:
 	.4byte	.LC15
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL330
-	.4byte	0x92ad
-	.4byte	0x7e59
+	.4byte	.LVL318
+	.4byte	0x92d7
+	.4byte	0x7dca
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39671,9 +39599,9 @@ __func__.9940:
 	.4byte	.LC16
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL332
-	.4byte	0x92ad
-	.4byte	0x7e76
+	.4byte	.LVL320
+	.4byte	0x92d7
+	.4byte	0x7de7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39688,9 +39616,9 @@ __func__.9940:
 	.4byte	.LC17
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL334
-	.4byte	0x92ad
-	.4byte	0x7e93
+	.4byte	.LVL322
+	.4byte	0x92d7
+	.4byte	0x7e04
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39705,9 +39633,9 @@ __func__.9940:
 	.4byte	.LC18
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL336
-	.4byte	0x92ad
-	.4byte	0x7eb0
+	.4byte	.LVL324
+	.4byte	0x92d7
+	.4byte	0x7e21
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39722,9 +39650,9 @@ __func__.9940:
 	.4byte	.LC19
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL338
-	.4byte	0x92ad
-	.4byte	0x7ecd
+	.4byte	.LVL326
+	.4byte	0x92d7
+	.4byte	0x7e3e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39739,9 +39667,9 @@ __func__.9940:
 	.4byte	.LC20
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL340
-	.4byte	0x92ad
-	.4byte	0x7eea
+	.4byte	.LVL328
+	.4byte	0x92d7
+	.4byte	0x7e5b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39756,9 +39684,9 @@ __func__.9940:
 	.4byte	.LC21
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL342
-	.4byte	0x92ad
-	.4byte	0x7f07
+	.4byte	.LVL330
+	.4byte	0x92d7
+	.4byte	0x7e78
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39773,9 +39701,9 @@ __func__.9940:
 	.4byte	.LC22
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL344
-	.4byte	0x92ad
-	.4byte	0x7f24
+	.4byte	.LVL332
+	.4byte	0x92d7
+	.4byte	0x7e95
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39790,9 +39718,9 @@ __func__.9940:
 	.4byte	.LC23
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL346
-	.4byte	0x92ad
-	.4byte	0x7f41
+	.4byte	.LVL334
+	.4byte	0x92d7
+	.4byte	0x7eb2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39807,9 +39735,9 @@ __func__.9940:
 	.4byte	.LC24
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL348
-	.4byte	0x92ad
-	.4byte	0x7f5e
+	.4byte	.LVL336
+	.4byte	0x92d7
+	.4byte	0x7ecf
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39824,9 +39752,9 @@ __func__.9940:
 	.4byte	.LC25
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL350
-	.4byte	0x92ad
-	.4byte	0x7f7b
+	.4byte	.LVL338
+	.4byte	0x92d7
+	.4byte	0x7eec
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39841,9 +39769,9 @@ __func__.9940:
 	.4byte	.LC26
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL352
-	.4byte	0x92ad
-	.4byte	0x7f98
+	.4byte	.LVL340
+	.4byte	0x92d7
+	.4byte	0x7f09
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39858,9 +39786,9 @@ __func__.9940:
 	.4byte	.LC27
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL354
-	.4byte	0x92ad
-	.4byte	0x7fb5
+	.4byte	.LVL342
+	.4byte	0x92d7
+	.4byte	0x7f26
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39875,9 +39803,9 @@ __func__.9940:
 	.4byte	.LC28
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL356
-	.4byte	0x92ad
-	.4byte	0x7fd2
+	.4byte	.LVL344
+	.4byte	0x92d7
+	.4byte	0x7f43
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39892,9 +39820,9 @@ __func__.9940:
 	.4byte	.LC29
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL358
-	.4byte	0x92ad
-	.4byte	0x7fef
+	.4byte	.LVL346
+	.4byte	0x92d7
+	.4byte	0x7f60
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39909,9 +39837,9 @@ __func__.9940:
 	.4byte	.LC30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL360
-	.4byte	0x92ad
-	.4byte	0x800c
+	.4byte	.LVL348
+	.4byte	0x92d7
+	.4byte	0x7f7d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39926,9 +39854,9 @@ __func__.9940:
 	.4byte	.LC31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL362
-	.4byte	0x92ad
-	.4byte	0x8029
+	.4byte	.LVL350
+	.4byte	0x92d7
+	.4byte	0x7f9a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39943,9 +39871,9 @@ __func__.9940:
 	.4byte	.LC32
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL364
-	.4byte	0x92ad
-	.4byte	0x8046
+	.4byte	.LVL352
+	.4byte	0x92d7
+	.4byte	0x7fb7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39960,9 +39888,9 @@ __func__.9940:
 	.4byte	.LC33
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL366
-	.4byte	0x92ad
-	.4byte	0x8063
+	.4byte	.LVL354
+	.4byte	0x92d7
+	.4byte	0x7fd4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39977,9 +39905,9 @@ __func__.9940:
 	.4byte	.LC34
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL368
-	.4byte	0x92ad
-	.4byte	0x8080
+	.4byte	.LVL356
+	.4byte	0x92d7
+	.4byte	0x7ff1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39994,9 +39922,9 @@ __func__.9940:
 	.4byte	.LC35
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL370
-	.4byte	0x92ad
-	.4byte	0x809d
+	.4byte	.LVL358
+	.4byte	0x92d7
+	.4byte	0x800e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40011,9 +39939,9 @@ __func__.9940:
 	.4byte	.LC36
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL372
-	.4byte	0x92ad
-	.4byte	0x80ba
+	.4byte	.LVL360
+	.4byte	0x92d7
+	.4byte	0x802b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40028,9 +39956,9 @@ __func__.9940:
 	.4byte	.LC37
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL374
-	.4byte	0x92ad
-	.4byte	0x80d7
+	.4byte	.LVL362
+	.4byte	0x92d7
+	.4byte	0x8048
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40045,9 +39973,9 @@ __func__.9940:
 	.4byte	.LC38
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL376
-	.4byte	0x92ad
-	.4byte	0x80f4
+	.4byte	.LVL364
+	.4byte	0x92d7
+	.4byte	0x8065
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40062,9 +39990,9 @@ __func__.9940:
 	.4byte	.LC39
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL378
-	.4byte	0x92ad
-	.4byte	0x8111
+	.4byte	.LVL366
+	.4byte	0x92d7
+	.4byte	0x8082
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40079,9 +40007,9 @@ __func__.9940:
 	.4byte	.LC40
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL380
-	.4byte	0x92ad
-	.4byte	0x812e
+	.4byte	.LVL368
+	.4byte	0x92d7
+	.4byte	0x809f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40096,9 +40024,9 @@ __func__.9940:
 	.4byte	.LC41
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL382
-	.4byte	0x92ad
-	.4byte	0x814b
+	.4byte	.LVL370
+	.4byte	0x92d7
+	.4byte	0x80bc
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40113,9 +40041,9 @@ __func__.9940:
 	.4byte	.LC42
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL384
-	.4byte	0x92ad
-	.4byte	0x8168
+	.4byte	.LVL372
+	.4byte	0x92d7
+	.4byte	0x80d9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40130,9 +40058,9 @@ __func__.9940:
 	.4byte	.LC43
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL386
-	.4byte	0x92ad
-	.4byte	0x8185
+	.4byte	.LVL374
+	.4byte	0x92d7
+	.4byte	0x80f6
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40147,9 +40075,9 @@ __func__.9940:
 	.4byte	.LC44
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL388
-	.4byte	0x92ad
-	.4byte	0x81a2
+	.4byte	.LVL376
+	.4byte	0x92d7
+	.4byte	0x8113
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40164,9 +40092,9 @@ __func__.9940:
 	.4byte	.LC45
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL390
-	.4byte	0x92ad
-	.4byte	0x81bf
+	.4byte	.LVL378
+	.4byte	0x92d7
+	.4byte	0x8130
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40181,9 +40109,9 @@ __func__.9940:
 	.4byte	.LC46
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL392
-	.4byte	0x92ad
-	.4byte	0x81dc
+	.4byte	.LVL380
+	.4byte	0x92d7
+	.4byte	0x814d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40198,9 +40126,9 @@ __func__.9940:
 	.4byte	.LC47
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL394
-	.4byte	0x92ad
-	.4byte	0x81f9
+	.4byte	.LVL382
+	.4byte	0x92d7
+	.4byte	0x816a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40215,9 +40143,9 @@ __func__.9940:
 	.4byte	.LC48
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL396
-	.4byte	0x92ad
-	.4byte	0x8216
+	.4byte	.LVL384
+	.4byte	0x92d7
+	.4byte	0x8187
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40232,9 +40160,9 @@ __func__.9940:
 	.4byte	.LC49
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL398
-	.4byte	0x92ad
-	.4byte	0x8233
+	.4byte	.LVL386
+	.4byte	0x92d7
+	.4byte	0x81a4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40249,9 +40177,9 @@ __func__.9940:
 	.4byte	.LC50
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL400
-	.4byte	0x92ad
-	.4byte	0x8250
+	.4byte	.LVL388
+	.4byte	0x92d7
+	.4byte	0x81c1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40266,9 +40194,9 @@ __func__.9940:
 	.4byte	.LC51
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL402
-	.4byte	0x92ad
-	.4byte	0x826d
+	.4byte	.LVL390
+	.4byte	0x92d7
+	.4byte	0x81de
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40283,9 +40211,9 @@ __func__.9940:
 	.4byte	.LC52
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL404
-	.4byte	0x92ad
-	.4byte	0x828a
+	.4byte	.LVL392
+	.4byte	0x92d7
+	.4byte	0x81fb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40300,9 +40228,9 @@ __func__.9940:
 	.4byte	.LC53
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL406
-	.4byte	0x92ad
-	.4byte	0x82a7
+	.4byte	.LVL394
+	.4byte	0x92d7
+	.4byte	0x8218
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40317,9 +40245,9 @@ __func__.9940:
 	.4byte	.LC54
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL408
-	.4byte	0x92ad
-	.4byte	0x82c4
+	.4byte	.LVL396
+	.4byte	0x92d7
+	.4byte	0x8235
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40334,9 +40262,9 @@ __func__.9940:
 	.4byte	.LC55
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL410
-	.4byte	0x92ad
-	.4byte	0x82e1
+	.4byte	.LVL398
+	.4byte	0x92d7
+	.4byte	0x8252
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40351,9 +40279,9 @@ __func__.9940:
 	.4byte	.LC56
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL412
-	.4byte	0x92ad
-	.4byte	0x82fe
+	.4byte	.LVL400
+	.4byte	0x92d7
+	.4byte	0x826f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40368,9 +40296,9 @@ __func__.9940:
 	.4byte	.LC57
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL414
-	.4byte	0x92ad
-	.4byte	0x831b
+	.4byte	.LVL402
+	.4byte	0x92d7
+	.4byte	0x828c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40385,9 +40313,9 @@ __func__.9940:
 	.4byte	.LC58
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL416
-	.4byte	0x92ad
-	.4byte	0x8338
+	.4byte	.LVL404
+	.4byte	0x92d7
+	.4byte	0x82a9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40402,9 +40330,9 @@ __func__.9940:
 	.4byte	.LC59
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL418
-	.4byte	0x92ad
-	.4byte	0x8355
+	.4byte	.LVL406
+	.4byte	0x92d7
+	.4byte	0x82c6
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40419,9 +40347,9 @@ __func__.9940:
 	.4byte	.LC60
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL420
-	.4byte	0x92ad
-	.4byte	0x8372
+	.4byte	.LVL408
+	.4byte	0x92d7
+	.4byte	0x82e3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40436,9 +40364,9 @@ __func__.9940:
 	.4byte	.LC61
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL422
-	.4byte	0x92ad
-	.4byte	0x838f
+	.4byte	.LVL410
+	.4byte	0x92d7
+	.4byte	0x8300
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40453,9 +40381,9 @@ __func__.9940:
 	.4byte	.LC62
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL424
-	.4byte	0x92ad
-	.4byte	0x83ac
+	.4byte	.LVL412
+	.4byte	0x92d7
+	.4byte	0x831d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40470,9 +40398,9 @@ __func__.9940:
 	.4byte	.LC63
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL426
-	.4byte	0x92ad
-	.4byte	0x83c9
+	.4byte	.LVL414
+	.4byte	0x92d7
+	.4byte	0x833a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40487,12 +40415,12 @@ __func__.9940:
 	.4byte	.LC64
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL428
-	.4byte	0x38fb
+	.4byte	.LVL416
+	.4byte	0x38e8
 	.uleb128 0x32
-	.4byte	.LVL429
-	.4byte	0x92ad
-	.4byte	0x83ef
+	.4byte	.LVL417
+	.4byte	0x92d7
+	.4byte	0x8360
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40507,12 +40435,12 @@ __func__.9940:
 	.4byte	.LC65
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL431
-	.4byte	0x38a2
+	.4byte	.LVL419
+	.4byte	0x388f
 	.uleb128 0x32
-	.4byte	.LVL432
-	.4byte	0x92ad
-	.4byte	0x8415
+	.4byte	.LVL420
+	.4byte	0x92d7
+	.4byte	0x8386
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40527,8 +40455,8 @@ __func__.9940:
 	.4byte	.LC66
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL435
-	.4byte	0x92ad
+	.4byte	.LVL423
+	.4byte	0x92d7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40543,133 +40471,139 @@ __func__.9940:
 	.4byte	.LC67
 	.byte	0
 	.byte	0
-	.uleb128 0x6e
-	.4byte	0x27b7
+	.uleb128 0x6d
+	.4byte	0x27a6
 	.4byte	.LFB352
 	.4byte	.LFE352-.LFB352
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8489
+	.4byte	0x83fa
 	.uleb128 0x46
-	.4byte	0x27d2
+	.4byte	0x27c1
 	.4byte	.LLST0
 	.uleb128 0x46
-	.4byte	0x27dd
+	.4byte	0x27cc
 	.4byte	.LLST1
+	.uleb128 0x6e
+	.4byte	0x27b6
 	.uleb128 0x6f
-	.4byte	0x27c7
-	.uleb128 0x70
-	.4byte	0x27e8
+	.4byte	0x27d7
+	.uleb128 0x6f
+	.4byte	0x27e2
 	.uleb128 0x70
-	.4byte	0x27f3
-	.uleb128 0x71
-	.4byte	0x27fe
+	.4byte	0x27ed
 	.4byte	.LLST2
-	.uleb128 0x71
-	.4byte	0x2809
-	.4byte	.LLST3
-	.uleb128 0x71
-	.4byte	0x2814
-	.4byte	.LLST4
 	.uleb128 0x70
-	.4byte	0x281f
+	.4byte	0x27f8
+	.4byte	.LLST3
 	.uleb128 0x70
-	.4byte	0x282a
+	.4byte	0x2803
+	.4byte	.LLST4
+	.uleb128 0x6f
+	.4byte	0x280e
+	.uleb128 0x6f
+	.4byte	0x2819
 	.byte	0
-	.uleb128 0x72
-	.4byte	0x4b40
-	.4byte	.LFB359
-	.4byte	.LFE359-.LFB359
+	.uleb128 0x71
+	.4byte	0x4b2d
+	.4byte	.LFB358
+	.4byte	.LFE358-.LFB358
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x84b2
+	.4byte	0x8423
 	.uleb128 0x46
-	.4byte	0x4b4d
+	.4byte	0x4b3a
 	.4byte	.LLST5
-	.uleb128 0x73
-	.4byte	0x4b59
+	.uleb128 0x72
+	.4byte	0x4b46
 	.uleb128 0x6
 	.byte	0xfa
-	.4byte	0x4b59
+	.4byte	0x4b46
 	.byte	0x9f
 	.byte	0
-	.uleb128 0x72
-	.4byte	0x7b0e
+	.uleb128 0x71
+	.4byte	0x7a7f
 	.4byte	.LFB206
 	.4byte	.LFE206-.LFB206
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x84cd
-	.uleb128 0x73
-	.4byte	0x7b1a
+	.4byte	0x843e
+	.uleb128 0x72
+	.4byte	0x7a8b
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0
-	.uleb128 0x72
-	.4byte	0x7752
+	.uleb128 0x71
+	.4byte	0x76c3
 	.4byte	.LFB211
 	.4byte	.LFE211-.LFB211
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8505
+	.4byte	0x8476
 	.uleb128 0x46
-	.4byte	0x7763
+	.4byte	0x76d4
 	.4byte	.LLST12
-	.uleb128 0x70
-	.4byte	0x776f
-	.uleb128 0x74
-	.4byte	.Ldebug_ranges0+0
 	.uleb128 0x6f
-	.4byte	0x7763
-	.uleb128 0x74
+	.4byte	0x76e0
+	.uleb128 0x73
 	.4byte	.Ldebug_ranges0+0
-	.uleb128 0x70
-	.4byte	0x84e9
+	.uleb128 0x6e
+	.4byte	0x76d4
+	.uleb128 0x73
+	.4byte	.Ldebug_ranges0+0
+	.uleb128 0x6f
+	.4byte	0x845a
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x75
-	.4byte	0x6824
+	.uleb128 0x74
+	.4byte	0x6e85
+	.4byte	.LFB219
+	.4byte	.LFE219-.LFB219
+	.uleb128 0x1
+	.byte	0x9c
+	.uleb128 0x74
+	.4byte	0x680a
 	.4byte	.LFB227
 	.4byte	.LFE227-.LFB227
 	.uleb128 0x1
 	.byte	0x9c
-	.uleb128 0x75
-	.4byte	0x6013
+	.uleb128 0x74
+	.4byte	0x5ff9
 	.4byte	.LFB241
 	.4byte	.LFE241-.LFB241
 	.uleb128 0x1
 	.byte	0x9c
-	.uleb128 0x75
-	.4byte	0x6007
+	.uleb128 0x74
+	.4byte	0x5fed
 	.4byte	.LFB242
 	.4byte	.LFE242-.LFB242
 	.uleb128 0x1
 	.byte	0x9c
-	.uleb128 0x72
-	.4byte	0x5ddc
+	.uleb128 0x71
+	.4byte	0x5dde
 	.4byte	.LFB248
 	.4byte	.LFE248-.LFB248
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8599
+	.4byte	0x8519
 	.uleb128 0x46
-	.4byte	0x5de8
-	.4byte	.LLST52
-	.uleb128 0x70
-	.4byte	0x5df3
+	.4byte	0x5dea
+	.4byte	.LLST47
+	.uleb128 0x6f
+	.4byte	0x5df5
 	.uleb128 0x3e
 	.4byte	.Ldebug_ranges0+0x30
-	.4byte	0x858f
-	.uleb128 0x6f
-	.4byte	0x5de8
-	.uleb128 0x74
+	.4byte	0x850f
+	.uleb128 0x6e
+	.4byte	0x5dea
+	.uleb128 0x73
 	.4byte	.Ldebug_ranges0+0x30
-	.uleb128 0x70
-	.4byte	0x854e
+	.uleb128 0x6f
+	.4byte	0x84ce
 	.uleb128 0x2d
-	.4byte	.LVL144
-	.4byte	0x928b
+	.4byte	.LVL134
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40687,38 +40621,38 @@ __func__.9940:
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x8
-	.byte	0xbd
+	.byte	0xdd
 	.byte	0
 	.byte	0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL142
-	.4byte	0x5d4a
+	.4byte	.LVL132
+	.4byte	0x5d3c
 	.byte	0
-	.uleb128 0x72
-	.4byte	0x5e01
+	.uleb128 0x71
+	.4byte	0x5e03
 	.4byte	.LFB247
 	.4byte	.LFE247-.LFB247
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8600
+	.4byte	0x8580
 	.uleb128 0x46
-	.4byte	0x5e0d
-	.4byte	.LLST58
-	.uleb128 0x70
-	.4byte	0x5e18
+	.4byte	0x5e0f
+	.4byte	.LLST53
+	.uleb128 0x6f
+	.4byte	0x5e1a
 	.uleb128 0x3e
 	.4byte	.Ldebug_ranges0+0x48
-	.4byte	0x85f6
-	.uleb128 0x6f
-	.4byte	0x5e0d
-	.uleb128 0x74
+	.4byte	0x8576
+	.uleb128 0x6e
+	.4byte	0x5e0f
+	.uleb128 0x73
 	.4byte	.Ldebug_ranges0+0x48
-	.uleb128 0x70
-	.4byte	0x85b5
+	.uleb128 0x6f
+	.4byte	0x8535
 	.uleb128 0x2d
-	.4byte	.LVL163
-	.4byte	0x928b
+	.4byte	.LVL153
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40736,76 +40670,74 @@ __func__.9940:
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x8
-	.byte	0xb6
+	.byte	0xd6
 	.byte	0
 	.byte	0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL161
-	.4byte	0x5cd1
+	.4byte	.LVL151
+	.4byte	0x5cc3
 	.byte	0
-	.uleb128 0x72
-	.4byte	0x5ab5
+	.uleb128 0x71
+	.4byte	0x5aa7
 	.4byte	.LFB255
 	.4byte	.LFE255-.LFB255
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8721
+	.4byte	0x8699
 	.uleb128 0x46
-	.4byte	0x5ac6
-	.4byte	.LLST70
-	.uleb128 0x70
-	.4byte	0x5ad2
-	.uleb128 0x70
-	.4byte	0x5ade
-	.uleb128 0x70
-	.4byte	0x5aea
+	.4byte	0x5ab8
+	.4byte	.LLST65
+	.uleb128 0x6f
+	.4byte	0x5ac4
+	.uleb128 0x6f
+	.4byte	0x5ad0
+	.uleb128 0x6f
+	.4byte	0x5adc
+	.uleb128 0x6f
+	.4byte	0x5ae8
+	.uleb128 0x6f
+	.4byte	0x5af4
+	.uleb128 0x6f
+	.4byte	0x5b00
+	.uleb128 0x6f
+	.4byte	0x5b0c
+	.uleb128 0x6f
+	.4byte	0x5b18
+	.uleb128 0x73
+	.4byte	.Ldebug_ranges0+0x60
+	.uleb128 0x46
+	.4byte	0x5ab8
+	.4byte	.LLST66
+	.uleb128 0x73
+	.4byte	.Ldebug_ranges0+0x60
 	.uleb128 0x70
-	.4byte	0x5af6
+	.4byte	0x859c
+	.4byte	.LLST67
 	.uleb128 0x70
-	.4byte	0x5b02
+	.4byte	0x85a1
+	.4byte	.LLST68
 	.uleb128 0x70
-	.4byte	0x5b0e
+	.4byte	0x85a6
+	.4byte	.LLST69
 	.uleb128 0x70
-	.4byte	0x5b1a
+	.4byte	0x85ab
+	.4byte	.LLST70
 	.uleb128 0x70
-	.4byte	0x5b26
-	.uleb128 0x69
-	.4byte	.LBB191
-	.4byte	.LBE191-.LBB191
-	.uleb128 0x46
-	.4byte	0x5ac6
+	.4byte	0x85b0
 	.4byte	.LLST71
-	.uleb128 0x69
-	.4byte	.LBB192
-	.4byte	.LBE192-.LBB192
-	.uleb128 0x71
-	.4byte	0x861c
+	.uleb128 0x70
+	.4byte	0x85b5
 	.4byte	.LLST72
-	.uleb128 0x71
-	.4byte	0x8621
-	.4byte	.LLST73
-	.uleb128 0x71
-	.4byte	0x8626
-	.4byte	.LLST74
-	.uleb128 0x71
-	.4byte	0x862b
-	.4byte	.LLST75
-	.uleb128 0x71
-	.4byte	0x8630
-	.4byte	.LLST76
-	.uleb128 0x71
-	.4byte	0x8635
-	.4byte	.LLST77
-	.uleb128 0x71
-	.4byte	0x863a
-	.4byte	.LLST78
 	.uleb128 0x70
-	.4byte	0x863f
+	.4byte	0x85ba
+	.4byte	.LLST73
+	.uleb128 0x6f
+	.4byte	0x85bf
 	.uleb128 0x32
-	.4byte	.LVL206
-	.4byte	0x928b
-	.4byte	0x86ca
+	.4byte	.LVL197
+	.4byte	0x92b5
+	.4byte	0x8642
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40823,18 +40755,18 @@ __func__.9940:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x1aa
+	.2byte	0x1d6
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL213
-	.4byte	0x5c31
-	.4byte	0x86e7
+	.4byte	.LVL205
+	.4byte	0x5c23
+	.4byte	0x865f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR42
+	.4byte	.LANCHOR41
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -40843,9 +40775,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL214
-	.4byte	0x928b
-	.4byte	0x870e
+	.4byte	.LVL206
+	.4byte	0x92b5
+	.4byte	0x8686
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40863,11 +40795,11 @@ __func__.9940:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x1b3
+	.2byte	0x1e1
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL215
-	.4byte	0x5ddc
+	.4byte	.LVL207
+	.4byte	0x5dde
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40878,231 +40810,310 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x72
-	.4byte	0x584c
-	.4byte	.LFB258
-	.4byte	.LFE258-.LFB258
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x87b1
-	.uleb128 0x46
-	.4byte	0x585d
-	.4byte	.LLST79
-	.uleb128 0x71
-	.4byte	0x5869
-	.4byte	.LLST80
 	.uleb128 0x71
-	.4byte	0x5875
-	.4byte	.LLST81
-	.uleb128 0x70
-	.4byte	0x5881
-	.uleb128 0x61
-	.4byte	.LBB195
-	.4byte	.LBE195-.LBB195
-	.4byte	0x87a7
-	.uleb128 0x46
-	.4byte	0x585d
-	.4byte	.LLST82
-	.uleb128 0x69
-	.4byte	.LBB196
-	.4byte	.LBE196-.LBB196
-	.uleb128 0x70
-	.4byte	0x873d
-	.uleb128 0x70
-	.4byte	0x8746
-	.uleb128 0x70
-	.4byte	0x874f
-	.uleb128 0x34
-	.4byte	.LVL220
-	.4byte	0x928b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR55
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x214
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL222
-	.4byte	0x5e26
-	.byte	0
-	.uleb128 0x72
-	.4byte	0x4fc2
+	.4byte	0x4fb4
 	.4byte	.LFB269
 	.4byte	.LFE269-.LFB269
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x87ef
+	.4byte	0x86d7
 	.uleb128 0x46
-	.4byte	0x4fcf
-	.4byte	.LLST86
-	.uleb128 0x76
-	.4byte	0x4fdb
+	.4byte	0x4fc1
+	.4byte	.LLST77
+	.uleb128 0x75
+	.4byte	0x4fcd
 	.byte	0
-	.uleb128 0x74
-	.4byte	.Ldebug_ranges0+0x60
 	.uleb128 0x73
-	.4byte	0x4fcf
+	.4byte	.Ldebug_ranges0+0x78
+	.uleb128 0x72
+	.4byte	0x4fc1
 	.uleb128 0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.uleb128 0x74
-	.4byte	.Ldebug_ranges0+0x60
-	.uleb128 0x70
-	.4byte	0x87cd
+	.uleb128 0x73
+	.4byte	.Ldebug_ranges0+0x78
+	.uleb128 0x6f
+	.4byte	0x86b5
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x72
-	.4byte	0x4b40
+	.uleb128 0x71
+	.4byte	0x4b2d
 	.4byte	.LFB275
 	.4byte	.LFE275-.LFB275
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8828
+	.4byte	0x8710
 	.uleb128 0x46
-	.4byte	0x4b4d
-	.4byte	.LLST87
+	.4byte	0x4b3a
+	.4byte	.LLST78
 	.uleb128 0x46
-	.4byte	0x4b59
-	.4byte	.LLST88
+	.4byte	0x4b46
+	.4byte	.LLST79
 	.uleb128 0x2d
-	.4byte	.LVL248
-	.4byte	0x8489
+	.4byte	.LVL236
+	.4byte	0x83fa
 	.uleb128 0x3c
-	.4byte	0x4b59
+	.4byte	0x4b46
 	.uleb128 0x3
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0
 	.byte	0
-	.uleb128 0x72
-	.4byte	0x4048
+	.uleb128 0x71
+	.4byte	0x4035
 	.4byte	.LFB285
 	.4byte	.LFE285-.LFB285
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x886e
-	.uleb128 0x73
-	.4byte	0x4055
+	.4byte	0x8756
+	.uleb128 0x72
+	.4byte	0x4042
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x70
-	.4byte	0x4061
-	.uleb128 0x69
-	.4byte	.LBB209
-	.4byte	.LBE209-.LBB209
+	.uleb128 0x6f
+	.4byte	0x404e
+	.uleb128 0x76
+	.4byte	.LBB223
+	.4byte	.LBE223-.LBB223
 	.uleb128 0x46
-	.4byte	0x4055
-	.4byte	.LLST93
-	.uleb128 0x69
-	.4byte	.LBB210
-	.4byte	.LBE210-.LBB210
-	.uleb128 0x71
-	.4byte	0x8842
-	.4byte	.LLST94
+	.4byte	0x4042
+	.4byte	.LLST84
+	.uleb128 0x76
+	.4byte	.LBB224
+	.4byte	.LBE224-.LBB224
+	.uleb128 0x70
+	.4byte	0x872a
+	.4byte	.LLST85
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x72
-	.4byte	0x37c3
+	.uleb128 0x71
+	.4byte	0x37a0
 	.4byte	.LFB300
 	.4byte	.LFE300-.LFB300
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x88a7
+	.4byte	0x878f
 	.uleb128 0x46
-	.4byte	0x37d4
-	.4byte	.LLST120
-	.uleb128 0x69
-	.4byte	.LBB215
-	.4byte	.LBE215-.LBB215
+	.4byte	0x37b1
+	.4byte	.LLST112
+	.uleb128 0x76
+	.4byte	.LBB229
+	.4byte	.LBE229-.LBB229
 	.uleb128 0x46
-	.4byte	0x37d4
-	.4byte	.LLST121
+	.4byte	0x37b1
+	.4byte	.LLST113
 	.uleb128 0x44
-	.4byte	.LVL487
-	.4byte	0x5e01
+	.4byte	.LVL477
+	.4byte	0x5e03
 	.byte	0
 	.byte	0
-	.uleb128 0x72
-	.4byte	0x2b8f
+	.uleb128 0x71
+	.4byte	0x2b7e
 	.4byte	.LFB319
 	.4byte	.LFE319-.LFB319
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x88cd
+	.4byte	0x87b5
 	.uleb128 0x44
-	.4byte	.LVL547
-	.4byte	0x6189
+	.4byte	.LVL537
+	.4byte	0x616f
 	.uleb128 0x44
-	.4byte	.LVL548
-	.4byte	0x2c26
+	.4byte	.LVL538
+	.4byte	0x2c15
 	.byte	0
-	.uleb128 0x72
-	.4byte	0x2ae5
-	.4byte	.LFB321
-	.4byte	.LFE321-.LFB321
+	.uleb128 0x71
+	.4byte	0x5fb2
+	.4byte	.LFB243
+	.4byte	.LFE243-.LFB243
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x899a
+	.4byte	0x8854
+	.uleb128 0x46
+	.4byte	0x5fbe
+	.4byte	.LLST169
+	.uleb128 0x46
+	.4byte	0x5fc9
+	.4byte	.LLST170
+	.uleb128 0x77
+	.4byte	0x5fed
+	.4byte	.LBB247
+	.4byte	.LBE247-.LBB247
+	.byte	0x2
+	.byte	0x65
 	.uleb128 0x76
-	.4byte	0x2af6
-	.byte	0
+	.4byte	.LBB249
+	.4byte	.LBE249-.LBB249
+	.uleb128 0x46
+	.4byte	0x5fc9
+	.4byte	.LLST171
+	.uleb128 0x46
+	.4byte	0x5fbe
+	.4byte	.LLST172
+	.uleb128 0x76
+	.4byte	.LBB250
+	.4byte	.LBE250-.LBB250
 	.uleb128 0x70
-	.4byte	0x2b02
+	.4byte	0x5fd5
+	.4byte	.LLST173
+	.uleb128 0x76
+	.4byte	.LBB251
+	.4byte	.LBE251-.LBB251
 	.uleb128 0x70
-	.4byte	0x2b0c
+	.4byte	0x5fdf
+	.4byte	.LLST174
+	.uleb128 0x32
+	.4byte	.LVL627
+	.4byte	0x616f
+	.4byte	0x883c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL629
+	.4byte	0x2453
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x71
+	.4byte	0x583e
+	.4byte	.LFB258
+	.4byte	.LFE258-.LFB258
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x88f7
+	.uleb128 0x46
+	.4byte	0x584f
+	.4byte	.LLST187
 	.uleb128 0x70
-	.4byte	0x2b18
-	.uleb128 0x3e
-	.4byte	.Ldebug_ranges0+0xb8
-	.4byte	0x897c
+	.4byte	0x585b
+	.4byte	.LLST188
 	.uleb128 0x70
-	.4byte	0x88e0
+	.4byte	0x5867
+	.4byte	.LLST189
+	.uleb128 0x6f
+	.4byte	0x5873
+	.uleb128 0x61
+	.4byte	.LBB260
+	.4byte	.LBE260-.LBB260
+	.4byte	0x88da
+	.uleb128 0x46
+	.4byte	0x584f
+	.4byte	.LLST190
+	.uleb128 0x76
+	.4byte	.LBB261
+	.4byte	.LBE261-.LBB261
+	.uleb128 0x6f
+	.4byte	0x8870
+	.uleb128 0x6f
+	.4byte	0x8879
+	.uleb128 0x6f
+	.4byte	0x8882
+	.uleb128 0x34
+	.4byte	.LVL703
+	.4byte	0x92b5
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR116
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x245
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL700
+	.4byte	0x5e28
+	.uleb128 0x34
+	.4byte	.LVL701
+	.4byte	0x92b5
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC84
+	.byte	0
+	.byte	0
 	.uleb128 0x71
-	.4byte	0x88e6
+	.4byte	0x2ad4
+	.4byte	.LFB321
+	.4byte	.LFE321-.LFB321
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x89c4
+	.uleb128 0x75
+	.4byte	0x2ae5
+	.byte	0
+	.uleb128 0x6f
+	.4byte	0x2af1
+	.uleb128 0x6f
+	.4byte	0x2afb
+	.uleb128 0x6f
+	.4byte	0x2b07
+	.uleb128 0x3e
+	.4byte	.Ldebug_ranges0+0x100
+	.4byte	0x89a6
+	.uleb128 0x6f
+	.4byte	0x890a
+	.uleb128 0x70
+	.4byte	0x8910
 	.4byte	.LLST240
-	.uleb128 0x77
-	.4byte	0x88eb
+	.uleb128 0x78
+	.4byte	0x8915
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -104
-	.uleb128 0x77
-	.4byte	0x88f0
+	.uleb128 0x78
+	.4byte	0x891a
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -80
 	.uleb128 0x61
-	.4byte	.LBB238
-	.4byte	.LBE238-.LBB238
-	.4byte	0x8966
-	.uleb128 0x77
-	.4byte	0x2b29
+	.4byte	.LBB271
+	.4byte	.LBE271-.LBB271
+	.4byte	0x8990
+	.uleb128 0x78
+	.4byte	0x2b18
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -100
 	.uleb128 0x32
-	.4byte	.LVL920
-	.4byte	0x26b9
-	.4byte	0x8953
+	.4byte	.LVL928
+	.4byte	0x26a8
+	.4byte	0x897d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41121,15 +41132,15 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL921
-	.4byte	0x6189
+	.4byte	.LVL929
+	.4byte	0x616f
 	.uleb128 0x44
-	.4byte	.LVL922
-	.4byte	0x2c26
+	.4byte	.LVL930
+	.4byte	0x2c15
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL919
-	.4byte	0x5279
+	.4byte	.LVL927
+	.4byte	0x526b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -41143,11 +41154,11 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.byte	0
-	.uleb128 0x69
-	.4byte	.LBB241
-	.4byte	.LBE241-.LBB241
-	.uleb128 0x77
-	.4byte	0x2b37
+	.uleb128 0x76
+	.4byte	.LBB274
+	.4byte	.LBE274-.LBB274
+	.uleb128 0x78
+	.4byte	0x2b26
 	.uleb128 0xd
 	.byte	0x40
 	.byte	0x45
@@ -41161,51 +41172,51 @@ __func__.9940:
 	.byte	0x9f
 	.byte	0
 	.byte	0
-	.uleb128 0x72
-	.4byte	0x2410
+	.uleb128 0x71
+	.4byte	0x23ff
 	.4byte	.LFB347
 	.4byte	.LFE347-.LFB347
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8aa2
+	.4byte	0x8acc
 	.uleb128 0x46
-	.4byte	0x2420
+	.4byte	0x240f
 	.4byte	.LLST282
-	.uleb128 0x76
-	.4byte	0x242b
+	.uleb128 0x75
+	.4byte	0x241a
 	.byte	0
-	.uleb128 0x70
-	.4byte	0x2436
-	.uleb128 0x70
-	.4byte	0x2441
-	.uleb128 0x69
-	.4byte	.LBB245
-	.4byte	.LBE245-.LBB245
+	.uleb128 0x6f
+	.4byte	0x2425
+	.uleb128 0x6f
+	.4byte	0x2430
+	.uleb128 0x76
+	.4byte	.LBB278
+	.4byte	.LBE278-.LBB278
 	.uleb128 0x46
-	.4byte	0x2420
+	.4byte	0x240f
 	.4byte	.LLST283
-	.uleb128 0x69
-	.4byte	.LBB246
-	.4byte	.LBE246-.LBB246
-	.uleb128 0x70
-	.4byte	0x89b6
-	.uleb128 0x77
-	.4byte	0x89bc
+	.uleb128 0x76
+	.4byte	.LBB279
+	.4byte	.LBE279-.LBB279
+	.uleb128 0x6f
+	.4byte	0x89e0
+	.uleb128 0x78
+	.4byte	0x89e6
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -80
-	.uleb128 0x77
-	.4byte	0x89c1
+	.uleb128 0x78
+	.4byte	0x89eb
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -100
-	.uleb128 0x78
-	.4byte	0x244c
+	.uleb128 0x79
+	.4byte	0x243b
 	.4byte	.LDL1
 	.uleb128 0x32
-	.4byte	.LVL1145
-	.4byte	0x230c
-	.4byte	0x8a22
+	.4byte	.LVL1153
+	.4byte	0x22fb
+	.4byte	0x8a4c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41226,9 +41237,9 @@ __func__.9940:
 	.byte	0x20
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1146
-	.4byte	0x230c
-	.4byte	0x8a41
+	.4byte	.LVL1154
+	.4byte	0x22fb
+	.4byte	0x8a6b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41248,9 +41259,9 @@ __func__.9940:
 	.byte	0x38
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1147
-	.4byte	0x2464
-	.4byte	0x8a60
+	.4byte	.LVL1155
+	.4byte	0x2453
+	.4byte	0x8a8a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41269,9 +41280,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1148
-	.4byte	0x251a
-	.4byte	0x8a84
+	.4byte	.LVL1156
+	.4byte	0x2509
+	.4byte	0x8aae
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41295,8 +41306,8 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1150
-	.4byte	0x2464
+	.4byte	.LVL1158
+	.4byte	0x2453
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41317,50 +41328,50 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x72
-	.4byte	0x2b45
+	.uleb128 0x71
+	.4byte	0x2b34
 	.4byte	.LFB320
 	.4byte	.LFE320-.LFB320
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8b5b
+	.4byte	0x8b85
 	.uleb128 0x46
-	.4byte	0x2b56
+	.4byte	0x2b45
 	.4byte	.LLST303
-	.uleb128 0x70
-	.4byte	0x2b62
-	.uleb128 0x70
-	.4byte	0x2b6e
-	.uleb128 0x70
-	.4byte	0x2b78
-	.uleb128 0x70
-	.4byte	0x2b82
-	.uleb128 0x74
-	.4byte	.Ldebug_ranges0+0xe8
 	.uleb128 0x6f
-	.4byte	0x2b56
-	.uleb128 0x74
-	.4byte	.Ldebug_ranges0+0xe8
-	.uleb128 0x71
-	.4byte	0x8abe
+	.4byte	0x2b51
+	.uleb128 0x6f
+	.4byte	0x2b5d
+	.uleb128 0x6f
+	.4byte	0x2b67
+	.uleb128 0x6f
+	.4byte	0x2b71
+	.uleb128 0x73
+	.4byte	.Ldebug_ranges0+0x130
+	.uleb128 0x6e
+	.4byte	0x2b45
+	.uleb128 0x73
+	.4byte	.Ldebug_ranges0+0x130
+	.uleb128 0x70
+	.4byte	0x8ae8
 	.4byte	.LLST304
-	.uleb128 0x71
-	.4byte	0x8ac3
+	.uleb128 0x70
+	.4byte	0x8aed
 	.4byte	.LLST305
-	.uleb128 0x71
-	.4byte	0x8ac8
+	.uleb128 0x70
+	.4byte	0x8af2
 	.4byte	.LLST306
-	.uleb128 0x77
-	.4byte	0x8acd
+	.uleb128 0x78
+	.4byte	0x8af7
 	.uleb128 0x1
 	.byte	0x5b
 	.uleb128 0x44
-	.4byte	.LVL1228
-	.4byte	0x2b8f
+	.4byte	.LVL1236
+	.4byte	0x2b7e
 	.uleb128 0x32
-	.4byte	.LVL1230
-	.4byte	0x61f9
-	.4byte	0x8b20
+	.4byte	.LVL1238
+	.4byte	0x61df
+	.4byte	0x8b4a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -41369,9 +41380,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1236
-	.4byte	0x928b
-	.4byte	0x8b3b
+	.4byte	.LVL1244
+	.4byte	0x92b5
+	.4byte	0x8b65
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41387,9 +41398,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1237
-	.4byte	0x688f
-	.4byte	0x8b4f
+	.4byte	.LVL1245
+	.4byte	0x6875
+	.4byte	0x8b79
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41398,45 +41409,45 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1238
-	.4byte	0x6657
+	.4byte	.LVL1246
+	.4byte	0x663d
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x72
-	.4byte	0x32fe
+	.uleb128 0x71
+	.4byte	0x32db
 	.4byte	.LFB304
 	.4byte	.LFE304-.LFB304
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8c3b
+	.4byte	0x8c65
 	.uleb128 0x46
-	.4byte	0x330f
+	.4byte	0x32ec
 	.4byte	.LLST307
-	.uleb128 0x70
-	.4byte	0x331b
+	.uleb128 0x6f
+	.4byte	0x32f8
 	.uleb128 0x61
-	.4byte	.LBB261
-	.4byte	.LBE261-.LBB261
-	.4byte	0x8c31
+	.4byte	.LBB294
+	.4byte	.LBE294-.LBB294
+	.4byte	0x8c5b
 	.uleb128 0x46
-	.4byte	0x330f
+	.4byte	0x32ec
 	.4byte	.LLST308
-	.uleb128 0x69
-	.4byte	.LBB262
-	.4byte	.LBE262-.LBB262
-	.uleb128 0x70
-	.4byte	0x8b77
+	.uleb128 0x76
+	.4byte	.LBB295
+	.4byte	.LBE295-.LBB295
+	.uleb128 0x6f
+	.4byte	0x8ba1
 	.uleb128 0x32
-	.4byte	.LVL1248
-	.4byte	0x5c31
-	.4byte	0x8bbd
+	.4byte	.LVL1256
+	.4byte	0x5c23
+	.4byte	0x8be7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR42
+	.4byte	.LANCHOR41
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -41445,9 +41456,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1249
-	.4byte	0x928b
-	.4byte	0x8be4
+	.4byte	.LVL1257
+	.4byte	0x92b5
+	.4byte	0x8c0e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41459,18 +41470,18 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR159
+	.4byte	.LANCHOR158
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xa88
+	.2byte	0xabb
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1250
-	.4byte	0x37c3
-	.4byte	0x8bf8
+	.4byte	.LVL1258
+	.4byte	0x37a0
+	.4byte	0x8c22
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41479,9 +41490,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1251
-	.4byte	0x2b45
-	.4byte	0x8c0c
+	.4byte	.LVL1259
+	.4byte	0x2b34
+	.4byte	0x8c36
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41490,8 +41501,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1252
-	.4byte	0x928b
+	.4byte	.LVL1260
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41503,52 +41514,52 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR159
+	.4byte	.LANCHOR158
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xa8b
+	.2byte	0xabe
 	.byte	0
 	.byte	0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1256
-	.4byte	0x5ab5
+	.4byte	.LVL1264
+	.4byte	0x5aa7
 	.byte	0
-	.uleb128 0x72
-	.4byte	0x4edc
+	.uleb128 0x71
+	.4byte	0x4ece
 	.4byte	.LFB271
 	.4byte	.LFE271-.LFB271
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8d13
-	.uleb128 0x74
-	.4byte	.Ldebug_ranges0+0x108
-	.uleb128 0x71
-	.4byte	0x4eea
+	.4byte	0x8d3d
+	.uleb128 0x73
+	.4byte	.Ldebug_ranges0+0x150
+	.uleb128 0x70
+	.4byte	0x4edc
 	.4byte	.LLST311
-	.uleb128 0x77
-	.4byte	0x4ef6
+	.uleb128 0x78
+	.4byte	0x4ee8
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -56
-	.uleb128 0x71
-	.4byte	0x4f02
+	.uleb128 0x70
+	.4byte	0x4ef4
 	.4byte	.LLST312
-	.uleb128 0x77
-	.4byte	0x4f0e
+	.uleb128 0x78
+	.4byte	0x4f00
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -52
-	.uleb128 0x71
-	.4byte	0x4f1a
+	.uleb128 0x70
+	.4byte	0x4f0c
 	.4byte	.LLST313
 	.uleb128 0x32
-	.4byte	.LVL1269
-	.4byte	0x5279
-	.4byte	0x8c9e
+	.4byte	.LVL1277
+	.4byte	0x526b
+	.4byte	0x8cc8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41569,9 +41580,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1271
-	.4byte	0x26b9
-	.4byte	0x8cbd
+	.4byte	.LVL1279
+	.4byte	0x26a8
+	.4byte	0x8ce7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41591,9 +41602,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1275
-	.4byte	0x230c
-	.4byte	0x8cd1
+	.4byte	.LVL1283
+	.4byte	0x22fb
+	.4byte	0x8cfb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -41602,9 +41613,9 @@ __func__.9940:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1277
-	.4byte	0x333e
-	.4byte	0x8ce5
+	.4byte	.LVL1285
+	.4byte	0x331b
+	.4byte	0x8d0f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41613,9 +41624,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1278
-	.4byte	0x251a
-	.4byte	0x8d08
+	.4byte	.LVL1286
+	.4byte	0x2509
+	.4byte	0x8d32
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41639,20 +41650,20 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1279
-	.4byte	0x3259
+	.4byte	.LVL1287
+	.4byte	0x3236
 	.byte	0
 	.byte	0
-	.uleb128 0x72
-	.4byte	0x3e0a
+	.uleb128 0x71
+	.4byte	0x3df7
 	.4byte	.LFB289
 	.4byte	.LFE289-.LFB289
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8d44
+	.4byte	0x8d6e
 	.uleb128 0x2d
-	.4byte	.LVL1527
-	.4byte	0x5156
+	.4byte	.LVL1534
+	.4byte	0x5148
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41668,20 +41679,20 @@ __func__.9940:
 	.byte	0x52
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR83
+	.4byte	.LANCHOR81
 	.byte	0
 	.byte	0
-	.uleb128 0x72
-	.4byte	0x4b66
+	.uleb128 0x71
+	.4byte	0x4b53
 	.4byte	.LFB274
 	.4byte	.LFE274-.LFB274
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8d9b
+	.4byte	0x8dc5
 	.uleb128 0x32
-	.4byte	.LVL1553
-	.4byte	0x503e
-	.4byte	0x8d6b
+	.4byte	.LVL1560
+	.4byte	0x5030
+	.4byte	0x8d95
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41690,9 +41701,9 @@ __func__.9940:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1554
-	.4byte	0x928b
-	.4byte	0x8d8b
+	.4byte	.LVL1561
+	.4byte	0x92b5
+	.4byte	0x8db5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41704,11 +41715,11 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC100
+	.4byte	.LC103
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1555
-	.4byte	0x230c
+	.4byte	.LVL1562
+	.4byte	0x22fb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -41716,17 +41727,17 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.byte	0
-	.uleb128 0x72
-	.4byte	0x2d93
+	.uleb128 0x71
+	.4byte	0x2d79
 	.4byte	.LFB314
 	.4byte	.LFE314-.LFB314
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8de9
+	.4byte	0x8e13
 	.uleb128 0x32
-	.4byte	.LVL1690
-	.4byte	0x2d9c
-	.4byte	0x8dc2
+	.4byte	.LVL1694
+	.4byte	0x2d82
+	.4byte	0x8dec
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41735,9 +41746,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1691
-	.4byte	0x4f28
-	.4byte	0x8dd9
+	.4byte	.LVL1695
+	.4byte	0x4f1a
+	.4byte	0x8e03
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41746,8 +41757,8 @@ __func__.9940:
 	.4byte	.LANCHOR144
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1692
-	.4byte	0x2f42
+	.4byte	.LVL1696
+	.4byte	0x2f28
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41755,103 +41766,103 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.byte	0
-	.uleb128 0x72
-	.4byte	0x29fd
+	.uleb128 0x71
+	.4byte	0x29ec
 	.4byte	.LFB322
 	.4byte	.LFE322-.LFB322
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9108
+	.4byte	0x9129
 	.uleb128 0x46
-	.4byte	0x2a0e
-	.4byte	.LLST398
+	.4byte	0x29fd
+	.4byte	.LLST397
 	.uleb128 0x46
-	.4byte	0x2a1a
-	.4byte	.LLST399
-	.uleb128 0x76
-	.4byte	0x2a26
+	.4byte	0x2a09
+	.4byte	.LLST398
+	.uleb128 0x75
+	.4byte	0x2a15
 	.byte	0x1
-	.uleb128 0x70
-	.4byte	0x2a32
-	.uleb128 0x70
-	.4byte	0x2a3e
-	.uleb128 0x79
-	.4byte	0x2a4a
+	.uleb128 0x6f
+	.4byte	0x2a21
+	.uleb128 0x6f
+	.4byte	0x2a2d
+	.uleb128 0x7a
+	.4byte	0x2a39
 	.sleb128 -1
-	.uleb128 0x70
-	.4byte	0x2a56
-	.uleb128 0x70
-	.4byte	0x2a62
-	.uleb128 0x70
-	.4byte	0x2a6e
-	.uleb128 0x70
-	.4byte	0x2a7a
-	.uleb128 0x70
-	.4byte	0x2a86
-	.uleb128 0x70
-	.4byte	0x2a92
-	.uleb128 0x70
-	.4byte	0x2aae
+	.uleb128 0x6f
+	.4byte	0x2a45
+	.uleb128 0x6f
+	.4byte	0x2a51
+	.uleb128 0x6f
+	.4byte	0x2a5d
+	.uleb128 0x6f
+	.4byte	0x2a69
+	.uleb128 0x6f
+	.4byte	0x2a75
+	.uleb128 0x6f
+	.4byte	0x2a81
+	.uleb128 0x6f
+	.4byte	0x2a9d
 	.uleb128 0x3e
-	.4byte	.Ldebug_ranges0+0x158
-	.4byte	0x90f8
+	.4byte	.Ldebug_ranges0+0x1a0
+	.4byte	0x9119
 	.uleb128 0x46
-	.4byte	0x2a1a
-	.4byte	.LLST400
+	.4byte	0x2a09
+	.4byte	.LLST399
 	.uleb128 0x46
-	.4byte	0x2a0e
-	.4byte	.LLST401
-	.uleb128 0x74
-	.4byte	.Ldebug_ranges0+0x158
+	.4byte	0x29fd
+	.4byte	.LLST400
+	.uleb128 0x73
+	.4byte	.Ldebug_ranges0+0x1a0
+	.uleb128 0x6f
+	.4byte	0x8e38
 	.uleb128 0x70
-	.4byte	0x8e0e
-	.uleb128 0x71
-	.4byte	0x8e14
-	.4byte	.LLST402
-	.uleb128 0x77
-	.4byte	0x8e19
+	.4byte	0x8e3e
+	.4byte	.LLST401
+	.uleb128 0x78
+	.4byte	0x8e43
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -36
+	.uleb128 0x6f
+	.4byte	0x8e48
 	.uleb128 0x70
-	.4byte	0x8e1e
-	.uleb128 0x71
-	.4byte	0x8e24
+	.4byte	0x8e4e
+	.4byte	.LLST402
+	.uleb128 0x70
+	.4byte	0x8e53
 	.4byte	.LLST403
-	.uleb128 0x71
-	.4byte	0x8e29
+	.uleb128 0x70
+	.4byte	0x8e58
 	.4byte	.LLST404
-	.uleb128 0x71
-	.4byte	0x8e2e
+	.uleb128 0x70
+	.4byte	0x8e5d
 	.4byte	.LLST405
-	.uleb128 0x71
-	.4byte	0x8e33
+	.uleb128 0x70
+	.4byte	0x8e62
 	.4byte	.LLST406
-	.uleb128 0x71
-	.4byte	0x8e38
-	.4byte	.LLST407
-	.uleb128 0x71
-	.4byte	0x8e3d
-	.4byte	.LLST408
-	.uleb128 0x7a
-	.4byte	0x2a9e
-	.uleb128 0x7a
-	.4byte	0x2aa6
 	.uleb128 0x70
-	.4byte	0x8e42
+	.4byte	0x8e67
+	.4byte	.LLST407
+	.uleb128 0x7b
+	.4byte	0x2a8d
+	.uleb128 0x7b
+	.4byte	0x2a95
+	.uleb128 0x6f
+	.4byte	0x8e6c
 	.uleb128 0x3e
-	.4byte	.Ldebug_ranges0+0x178
-	.4byte	0x8f2d
-	.uleb128 0x71
-	.4byte	0x2abc
-	.4byte	.LLST409
+	.4byte	.Ldebug_ranges0+0x1c0
+	.4byte	0x8f57
+	.uleb128 0x70
+	.4byte	0x2aab
+	.4byte	.LLST408
 	.uleb128 0x44
-	.4byte	.LVL1718
-	.4byte	0x37e1
-	.uleb128 0x32
 	.4byte	.LVL1721
-	.4byte	0x5b34
-	.4byte	0x8ef6
+	.4byte	0x37be
+	.uleb128 0x32
+	.4byte	.LVL1724
+	.4byte	0x5b26
+	.4byte	0x8f20
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41860,9 +41871,9 @@ __func__.9940:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1723
-	.4byte	0x5b34
-	.4byte	0x8f0a
+	.4byte	.LVL1726
+	.4byte	0x5b26
+	.4byte	0x8f34
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41871,17 +41882,17 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1726
-	.4byte	0x2b8f
+	.4byte	.LVL1729
+	.4byte	0x2b7e
 	.uleb128 0x34
-	.4byte	.LVL1738
-	.4byte	0x928b
+	.4byte	.LVL1741
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC104
+	.4byte	.LC107
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -41891,12 +41902,12 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1749
-	.4byte	0x3168
+	.4byte	.LVL1752
+	.4byte	0x3145
 	.uleb128 0x32
-	.4byte	.LVL1750
-	.4byte	0x3f2e
-	.4byte	0x8f4a
+	.4byte	.LVL1753
+	.4byte	0x3f1b
+	.4byte	0x8f74
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41905,9 +41916,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1751
-	.4byte	0x5b34
-	.4byte	0x8f5e
+	.4byte	.LVL1754
+	.4byte	0x5b26
+	.4byte	0x8f88
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41916,15 +41927,15 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1754
-	.4byte	0x2ae5
-	.uleb128 0x44
 	.4byte	.LVL1757
-	.4byte	0x5b34
+	.4byte	0x2ad4
+	.uleb128 0x44
+	.4byte	.LVL1760
+	.4byte	0x5b26
 	.uleb128 0x32
-	.4byte	.LVL1759
-	.4byte	0x3259
-	.4byte	0x8f84
+	.4byte	.LVL1762
+	.4byte	0x3236
+	.4byte	0x8fae
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41933,9 +41944,9 @@ __func__.9940:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1764
-	.4byte	0x3168
-	.4byte	0x8f9b
+	.4byte	.LVL1767
+	.4byte	0x3145
+	.4byte	0x8fc5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41946,9 +41957,9 @@ __func__.9940:
 	.byte	0x2
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1765
-	.4byte	0x3259
-	.4byte	0x8faf
+	.4byte	.LVL1768
+	.4byte	0x3236
+	.4byte	0x8fd9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41957,9 +41968,9 @@ __func__.9940:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1766
-	.4byte	0x928b
-	.4byte	0x8fd6
+	.4byte	.LVL1769
+	.4byte	0x92b5
+	.4byte	0x9000
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41971,18 +41982,18 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR177
+	.4byte	.LANCHOR175
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x296
+	.2byte	0x292
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1767
-	.4byte	0x928b
-	.4byte	0x8ffd
+	.4byte	.LVL1770
+	.4byte	0x92b5
+	.4byte	0x9027
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41994,18 +42005,18 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR177
+	.4byte	.LANCHOR175
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x297
+	.2byte	0x293
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1768
-	.4byte	0x928b
-	.4byte	0x9024
+	.4byte	.LVL1771
+	.4byte	0x92b5
+	.4byte	0x904e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42017,18 +42028,18 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR177
+	.4byte	.LANCHOR175
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x298
+	.2byte	0x294
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1769
-	.4byte	0x3f2e
-	.4byte	0x9038
+	.4byte	.LVL1772
+	.4byte	0x3f1b
+	.4byte	0x9062
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42037,12 +42048,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1770
-	.4byte	0x2ae5
+	.4byte	.LVL1773
+	.4byte	0x2ad4
 	.uleb128 0x32
-	.4byte	.LVL1780
-	.4byte	0x26b9
-	.4byte	0x9057
+	.4byte	.LVL1783
+	.4byte	0x26a8
+	.4byte	0x9081
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -42052,9 +42063,9 @@ __func__.9940:
 	.byte	0x6
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1789
-	.4byte	0x928b
-	.4byte	0x907e
+	.4byte	.LVL1792
+	.4byte	0x92b5
+	.4byte	0x90a8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42066,18 +42077,18 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR177
+	.4byte	.LANCHOR175
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x2bc
+	.2byte	0x2b8
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1790
-	.4byte	0x5279
-	.4byte	0x909d
+	.4byte	.LVL1793
+	.4byte	0x526b
+	.4byte	0x90c7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42097,12 +42108,12 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1792
-	.4byte	0x2d0e
+	.4byte	.LVL1795
+	.4byte	0x2cfd
 	.uleb128 0x32
-	.4byte	.LVL1793
-	.4byte	0x319e
-	.4byte	0x90c0
+	.4byte	.LVL1796
+	.4byte	0x317b
+	.4byte	0x90ea
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42117,28 +42128,25 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1794
-	.4byte	0x2c6a
-	.uleb128 0x44
-	.4byte	.LVL1799
-	.4byte	0x2c6a
-	.uleb128 0x44
-	.4byte	.LVL1800
-	.4byte	0x32fe
-	.uleb128 0x44
-	.4byte	.LVL1801
-	.4byte	0x6ee0
+	.4byte	.LVL1797
+	.4byte	0x2c59
 	.uleb128 0x44
 	.4byte	.LVL1802
-	.4byte	0x537a
+	.4byte	0x2c59
 	.uleb128 0x44
 	.4byte	.LVL1803
-	.4byte	0x4d75
+	.4byte	0x32db
+	.uleb128 0x44
+	.4byte	.LVL1804
+	.4byte	0x536c
+	.uleb128 0x44
+	.4byte	.LVL1805
+	.4byte	0x4d67
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1732
-	.4byte	0x2f42
+	.4byte	.LVL1735
+	.4byte	0x2f28
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42146,33 +42154,33 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.byte	0
-	.uleb128 0x72
-	.4byte	0x399e
+	.uleb128 0x71
+	.4byte	0x398b
 	.4byte	.LFB295
 	.4byte	.LFE295-.LFB295
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9268
-	.uleb128 0x76
-	.4byte	0x39af
+	.4byte	0x9292
+	.uleb128 0x75
+	.4byte	0x399c
 	.byte	0
 	.uleb128 0x61
-	.4byte	.LBB306
-	.4byte	.LBE306-.LBB306
-	.4byte	0x91fe
-	.uleb128 0x70
-	.4byte	0x911b
+	.4byte	.LBB339
+	.4byte	.LBE339-.LBB339
+	.4byte	0x9228
+	.uleb128 0x6f
+	.4byte	0x913c
 	.uleb128 0x3e
-	.4byte	.Ldebug_ranges0+0x1a8
-	.4byte	0x9146
-	.uleb128 0x71
-	.4byte	0x39ba
-	.4byte	.LLST449
+	.4byte	.Ldebug_ranges0+0x1f0
+	.4byte	0x9167
+	.uleb128 0x70
+	.4byte	0x39a7
+	.4byte	.LLST448
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1998
-	.4byte	0x3d16
-	.4byte	0x915a
+	.4byte	.LVL1986
+	.4byte	0x3d03
+	.4byte	0x917b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42181,9 +42189,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1999
-	.4byte	0x3d16
-	.4byte	0x916e
+	.4byte	.LVL1987
+	.4byte	0x3d03
+	.4byte	0x918f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42192,9 +42200,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2001
-	.4byte	0x4f28
-	.4byte	0x9185
+	.4byte	.LVL1989
+	.4byte	0x4f1a
+	.4byte	0x91a6
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42203,9 +42211,9 @@ __func__.9940:
 	.4byte	.LANCHOR144
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2002
-	.4byte	0x4f28
-	.4byte	0x919c
+	.4byte	.LVL1990
+	.4byte	0x4f1a
+	.4byte	0x91bd
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42214,24 +42222,24 @@ __func__.9940:
 	.4byte	.LANCHOR149
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL2003
-	.4byte	0x537a
+	.4byte	.LVL1991
+	.4byte	0x536c
 	.uleb128 0x44
-	.4byte	.LVL2004
-	.4byte	0x4d75
+	.4byte	.LVL1992
+	.4byte	0x4d67
 	.uleb128 0x44
-	.4byte	.LVL2005
-	.4byte	0x4d75
+	.4byte	.LVL1993
+	.4byte	0x4d67
 	.uleb128 0x44
-	.4byte	.LVL2009
-	.4byte	0x2c26
+	.4byte	.LVL1994
+	.4byte	0x2c15
 	.uleb128 0x44
-	.4byte	.LVL2010
-	.4byte	0x2c26
+	.4byte	.LVL1995
+	.4byte	0x2c15
 	.uleb128 0x32
-	.4byte	.LVL2011
-	.4byte	0x3430
-	.4byte	0x91e0
+	.4byte	.LVL1996
+	.4byte	0x340d
+	.4byte	0x9201
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42240,9 +42248,9 @@ __func__.9940:
 	.4byte	.LANCHOR51
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2012
-	.4byte	0x3430
-	.4byte	0x91f4
+	.4byte	.LVL1997
+	.4byte	0x340d
+	.4byte	0x9215
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42251,42 +42259,45 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL2013
-	.4byte	0x3bff
+	.4byte	.LVL1998
+	.4byte	0x3bec
+	.uleb128 0x44
+	.4byte	.LVL2002
+	.4byte	0x536c
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1985
-	.4byte	0x601f
+	.4byte	.LVL1973
+	.4byte	0x6005
 	.uleb128 0x44
-	.4byte	.LVL1986
-	.4byte	0x4b73
+	.4byte	.LVL1974
+	.4byte	0x4b60
 	.uleb128 0x44
-	.4byte	.LVL1987
-	.4byte	0x49a7
+	.4byte	.LVL1975
+	.4byte	0x4994
 	.uleb128 0x44
-	.4byte	.LVL1988
-	.4byte	0x4749
+	.4byte	.LVL1976
+	.4byte	0x4736
 	.uleb128 0x44
-	.4byte	.LVL1989
-	.4byte	0x47ca
+	.4byte	.LVL1977
+	.4byte	0x47b7
 	.uleb128 0x44
-	.4byte	.LVL1990
-	.4byte	0x3db9
+	.4byte	.LVL1978
+	.4byte	0x3da6
 	.uleb128 0x44
-	.4byte	.LVL1991
-	.4byte	0x4b66
+	.4byte	.LVL1979
+	.4byte	0x4b53
 	.uleb128 0x44
-	.4byte	.LVL1992
-	.4byte	0x5ee3
+	.4byte	.LVL1980
+	.4byte	0x5f56
 	.uleb128 0x44
-	.4byte	.LVL1993
-	.4byte	0x3e13
+	.4byte	.LVL1981
+	.4byte	0x3e00
 	.uleb128 0x44
-	.4byte	.LVL1994
-	.4byte	0x3fc4
+	.4byte	.LVL1982
+	.4byte	0x3fb1
 	.uleb128 0x34
-	.4byte	.LVL1995
-	.4byte	0x4fc2
+	.4byte	.LVL1983
+	.4byte	0x4fb4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42294,39 +42305,39 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.byte	0
-	.uleb128 0x7b
-	.4byte	.LASF875
-	.4byte	.LASF875
+	.uleb128 0x7c
+	.4byte	.LASF873
+	.4byte	.LASF873
 	.byte	0xb
 	.byte	0x72
-	.uleb128 0x7c
-	.4byte	.LASF876
-	.4byte	.LASF876
+	.uleb128 0x7d
+	.4byte	.LASF874
+	.4byte	.LASF874
 	.byte	0x1c
 	.2byte	0x16d
-	.uleb128 0x7c
-	.4byte	.LASF877
-	.4byte	.LASF877
+	.uleb128 0x7d
+	.4byte	.LASF875
+	.4byte	.LASF875
 	.byte	0x1c
 	.2byte	0x16c
-	.uleb128 0x7b
-	.4byte	.LASF878
-	.4byte	.LASF878
+	.uleb128 0x7c
+	.4byte	.LASF876
+	.4byte	.LASF876
 	.byte	0x1d
 	.byte	0x12
-	.uleb128 0x7b
-	.4byte	.LASF879
-	.4byte	.LASF879
+	.uleb128 0x7c
+	.4byte	.LASF877
+	.4byte	.LASF877
 	.byte	0x6
 	.byte	0x35
-	.uleb128 0x7c
-	.4byte	.LASF880
-	.4byte	.LASF880
+	.uleb128 0x7d
+	.4byte	.LASF878
+	.4byte	.LASF878
 	.byte	0x1c
 	.2byte	0x399
-	.uleb128 0x7b
-	.4byte	.LASF881
-	.4byte	.LASF881
+	.uleb128 0x7c
+	.4byte	.LASF879
+	.4byte	.LASF879
 	.byte	0x1e
 	.byte	0x6d
 	.byte	0
@@ -43767,18 +43778,16 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x67
-	.uleb128 0x1d
+	.uleb128 0xa
 	.byte	0
-	.uleb128 0x31
-	.uleb128 0x13
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x12
-	.uleb128 0x6
-	.uleb128 0x58
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
 	.uleb128 0xb
-	.uleb128 0x59
+	.uleb128 0x3b
 	.uleb128 0xb
+	.uleb128 0x11
+	.uleb128 0x1
 	.byte	0
 	.byte	0
 	.uleb128 0x68
@@ -43797,15 +43806,6 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x69
-	.uleb128 0xb
-	.byte	0x1
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x12
-	.uleb128 0x6
-	.byte	0
-	.byte	0
-	.uleb128 0x6a
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -43824,7 +43824,7 @@ __func__.9940:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
+	.uleb128 0x6a
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -43835,7 +43835,7 @@ __func__.9940:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x6c
+	.uleb128 0x6b
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -43852,7 +43852,7 @@ __func__.9940:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x6d
+	.uleb128 0x6c
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -43877,7 +43877,7 @@ __func__.9940:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x6e
+	.uleb128 0x6d
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x31
@@ -43894,21 +43894,21 @@ __func__.9940:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x6f
+	.uleb128 0x6e
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x70
+	.uleb128 0x6f
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x71
+	.uleb128 0x70
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -43917,7 +43917,7 @@ __func__.9940:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x72
+	.uleb128 0x71
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x31
@@ -43934,7 +43934,7 @@ __func__.9940:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x73
+	.uleb128 0x72
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
@@ -43943,14 +43943,14 @@ __func__.9940:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x74
+	.uleb128 0x73
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x55
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x75
+	.uleb128 0x74
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x31
@@ -43965,7 +43965,7 @@ __func__.9940:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x76
+	.uleb128 0x75
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -43974,7 +43974,31 @@ __func__.9940:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
+	.uleb128 0x76
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x6
+	.byte	0
+	.byte	0
 	.uleb128 0x77
+	.uleb128 0x1d
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x6
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x78
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -43983,7 +44007,7 @@ __func__.9940:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x78
+	.uleb128 0x79
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x31
@@ -43992,7 +44016,7 @@ __func__.9940:
 	.uleb128 0x1
 	.byte	0
 	.byte	0
-	.uleb128 0x79
+	.uleb128 0x7a
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -44001,14 +44025,14 @@ __func__.9940:
 	.uleb128 0xd
 	.byte	0
 	.byte	0
-	.uleb128 0x7a
+	.uleb128 0x7b
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x7b
+	.uleb128 0x7c
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -44025,7 +44049,7 @@ __func__.9940:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x7c
+	.uleb128 0x7d
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -44045,12 +44069,12 @@ __func__.9940:
 	.byte	0
 	.section	.debug_loc,"",%progbits
 .Ldebug_loc0:
-.LLST455:
-	.4byte	.LVL2071
-	.4byte	.LVL2072-1
+.LLST454:
+	.4byte	.LVL2060
+	.4byte	.LVL2061-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL2072-1
+	.4byte	.LVL2061-1
 	.4byte	.LFE351
 	.2byte	0x4
 	.byte	0xf3
@@ -44059,12 +44083,12 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST456:
-	.4byte	.LVL2071
-	.4byte	.LVL2072-1
+.LLST455:
+	.4byte	.LVL2060
+	.4byte	.LVL2061-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL2072-1
+	.4byte	.LVL2061-1
 	.4byte	.LFE351
 	.2byte	0x4
 	.byte	0xf3
@@ -44073,12 +44097,12 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST457:
-	.4byte	.LVL2071
-	.4byte	.LVL2072-1
+.LLST456:
+	.4byte	.LVL2060
+	.4byte	.LVL2061-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL2072-1
+	.4byte	.LVL2061-1
 	.4byte	.LFE351
 	.2byte	0x4
 	.byte	0xf3
@@ -44088,11 +44112,11 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST287:
-	.4byte	.LVL1161
-	.4byte	.LVL1162-1
+	.4byte	.LVL1169
+	.4byte	.LVL1170-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1162-1
+	.4byte	.LVL1170-1
 	.4byte	.LFE350
 	.2byte	0x4
 	.byte	0xf3
@@ -44102,11 +44126,11 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST288:
-	.4byte	.LVL1161
-	.4byte	.LVL1162-1
+	.4byte	.LVL1169
+	.4byte	.LVL1170-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1162-1
+	.4byte	.LVL1170-1
 	.4byte	.LFE350
 	.2byte	0x4
 	.byte	0xf3
@@ -44116,11 +44140,11 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST289:
-	.4byte	.LVL1161
-	.4byte	.LVL1162-1
+	.4byte	.LVL1169
+	.4byte	.LVL1170-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1162-1
+	.4byte	.LVL1170-1
 	.4byte	.LFE350
 	.2byte	0x4
 	.byte	0xf3
@@ -44130,11 +44154,11 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST191:
-	.4byte	.LVL697
-	.4byte	.LVL698-1
+	.4byte	.LVL705
+	.4byte	.LVL706-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL698-1
+	.4byte	.LVL706-1
 	.4byte	.LFE349
 	.2byte	0x4
 	.byte	0xf3
@@ -44144,11 +44168,11 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST192:
-	.4byte	.LVL697
-	.4byte	.LVL698-1
+	.4byte	.LVL705
+	.4byte	.LVL706-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL698-1
+	.4byte	.LVL706-1
 	.4byte	.LFE349
 	.2byte	0x4
 	.byte	0xf3
@@ -44158,11 +44182,11 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST193:
-	.4byte	.LVL697
-	.4byte	.LVL698-1
+	.4byte	.LVL705
+	.4byte	.LVL706-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL698-1
+	.4byte	.LVL706-1
 	.4byte	.LFE349
 	.2byte	0x4
 	.byte	0xf3
@@ -44172,63 +44196,63 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST284:
-	.4byte	.LVL1152
-	.4byte	.LVL1154-1
+	.4byte	.LVL1160
+	.4byte	.LVL1162-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1154-1
+	.4byte	.LVL1162-1
 	.4byte	.LFE348
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
 .LLST285:
-	.4byte	.LVL1152
-	.4byte	.LVL1153
+	.4byte	.LVL1160
+	.4byte	.LVL1161
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1153
+	.4byte	.LVL1161
 	.4byte	.LFE348
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
 .LLST286:
-	.4byte	.LVL1156
-	.4byte	.LVL1157
+	.4byte	.LVL1164
+	.4byte	.LVL1165
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1158
-	.4byte	.LVL1159
+	.4byte	.LVL1166
+	.4byte	.LVL1167
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1159
+	.4byte	.LVL1167
 	.4byte	.LFE348
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST172:
-	.4byte	.LVL627
-	.4byte	.LVL628
+.LLST164:
+	.4byte	.LVL617
+	.4byte	.LVL618
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL628
+	.4byte	.LVL618
 	.4byte	.LFE346
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST173:
-	.4byte	.LVL627
-	.4byte	.LVL628
+	.4byte	0
+	.4byte	0
+.LLST165:
+	.4byte	.LVL617
+	.4byte	.LVL618
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL628
+	.4byte	.LVL618
 	.4byte	.LFE346
 	.2byte	0x4
 	.byte	0xf3
@@ -44237,34 +44261,34 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST174:
-	.4byte	.LVL627
-	.4byte	.LVL628
+.LLST166:
+	.4byte	.LVL617
+	.4byte	.LVL618
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL628
+	.4byte	.LVL618
 	.4byte	.LFE346
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST175:
-	.4byte	.LVL631
-	.4byte	.LVL632
+.LLST167:
+	.4byte	.LVL621
+	.4byte	.LVL622
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL633
+	.4byte	.LVL623
 	.4byte	.LFE346
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST176:
-	.4byte	.LVL627
-	.4byte	.LVL628
+.LLST168:
+	.4byte	.LVL617
+	.4byte	.LVL618
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL628
+	.4byte	.LVL618
 	.4byte	.LFE346
 	.2byte	0x4
 	.byte	0xf3
@@ -44273,71 +44297,71 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST164:
-	.4byte	.LVL604
-	.4byte	.LVL607
+.LLST156:
+	.4byte	.LVL594
+	.4byte	.LVL597
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL607
-	.4byte	.LVL608
+	.4byte	.LVL597
+	.4byte	.LVL598
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL608
-	.4byte	.LVL610
+	.4byte	.LVL598
+	.4byte	.LVL600
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL610
-	.4byte	.LVL617
+	.4byte	.LVL600
+	.4byte	.LVL607
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL617
-	.4byte	.LVL624
+	.4byte	.LVL607
+	.4byte	.LVL614
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL624
+	.4byte	.LVL614
 	.4byte	.LFE345
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST165:
-	.4byte	.LVL604
-	.4byte	.LVL607
+.LLST157:
+	.4byte	.LVL594
+	.4byte	.LVL597
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL607
-	.4byte	.LVL608
+	.4byte	.LVL597
+	.4byte	.LVL598
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL608
-	.4byte	.LVL610
+	.4byte	.LVL598
+	.4byte	.LVL600
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL610
-	.4byte	.LVL617
+	.4byte	.LVL600
+	.4byte	.LVL607
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL617
-	.4byte	.LVL624
+	.4byte	.LVL607
+	.4byte	.LVL614
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL624
-	.4byte	.LVL626
+	.4byte	.LVL614
+	.4byte	.LVL616
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL626
+	.4byte	.LVL616
 	.4byte	.LFE345
 	.2byte	0x4
 	.byte	0xf3
@@ -44346,128 +44370,128 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST166:
-	.4byte	.LVL604
-	.4byte	.LVL607
+.LLST158:
+	.4byte	.LVL594
+	.4byte	.LVL597
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL607
+	.4byte	.LVL597
 	.4byte	.LFE345
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST167:
-	.4byte	.LVL604
-	.4byte	.LVL605
+.LLST159:
+	.4byte	.LVL594
+	.4byte	.LVL595
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL605
-	.4byte	.LVL609
+	.4byte	.LVL595
+	.4byte	.LVL599
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
-	.4byte	.LVL609
-	.4byte	.LVL610
+	.4byte	.LVL599
+	.4byte	.LVL600
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -72
-	.4byte	.LVL610
+	.4byte	.LVL600
 	.4byte	.LFE345
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
 	.4byte	0
 	.4byte	0
-.LLST168:
-	.4byte	.LVL606
-	.4byte	.LVL607
+.LLST160:
+	.4byte	.LVL596
+	.4byte	.LVL597
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL607
-	.4byte	.LVL608
+	.4byte	.LVL597
+	.4byte	.LVL598
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL610
-	.4byte	.LVL617
+	.4byte	.LVL600
+	.4byte	.LVL607
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL617
-	.4byte	.LVL624
+	.4byte	.LVL607
+	.4byte	.LVL614
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL624
+	.4byte	.LVL614
 	.4byte	.LFE345
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST169:
-	.4byte	.LVL613
-	.4byte	.LVL614
+.LLST161:
+	.4byte	.LVL603
+	.4byte	.LVL604
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL615
-	.4byte	.LVL617
+	.4byte	.LVL605
+	.4byte	.LVL607
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST170:
-	.4byte	.LVL606
-	.4byte	.LVL608
+.LLST162:
+	.4byte	.LVL596
+	.4byte	.LVL598
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL610
-	.4byte	.LVL617
+	.4byte	.LVL600
+	.4byte	.LVL607
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL624
-	.4byte	.LVL625
+	.4byte	.LVL614
+	.4byte	.LVL615
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST171:
-	.4byte	.LVL606
-	.4byte	.LVL607
+.LLST163:
+	.4byte	.LVL596
+	.4byte	.LVL597
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL607
-	.4byte	.LVL608
+	.4byte	.LVL597
+	.4byte	.LVL598
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL608
-	.4byte	.LVL610
+	.4byte	.LVL598
+	.4byte	.LVL600
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL610
-	.4byte	.LVL617
+	.4byte	.LVL600
+	.4byte	.LVL607
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL617
-	.4byte	.LVL624
+	.4byte	.LVL607
+	.4byte	.LVL614
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL624
+	.4byte	.LVL614
 	.4byte	.LFE345
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST153:
-	.4byte	.LVL564
-	.4byte	.LVL566
+.LLST145:
+	.4byte	.LVL554
+	.4byte	.LVL556
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL566
+	.4byte	.LVL556
 	.4byte	.LFE344
 	.2byte	0x4
 	.byte	0xf3
@@ -44476,23 +44500,23 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST154:
-	.4byte	.LVL564
-	.4byte	.LVL566
+.LLST146:
+	.4byte	.LVL554
+	.4byte	.LVL556
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL566
+	.4byte	.LVL556
 	.4byte	.LFE344
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST155:
-	.4byte	.LVL564
-	.4byte	.LVL565
+.LLST147:
+	.4byte	.LVL554
+	.4byte	.LVL555
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL565
+	.4byte	.LVL555
 	.4byte	.LFE344
 	.2byte	0x4
 	.byte	0xf3
@@ -44501,239 +44525,239 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST156:
-	.4byte	.LVL570
-	.4byte	.LVL571
+.LLST148:
+	.4byte	.LVL560
+	.4byte	.LVL561
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL571
-	.4byte	.LVL572-1
+	.4byte	.LVL561
+	.4byte	.LVL562-1
 	.2byte	0x2
 	.byte	0x74
 	.sleb128 0
-	.4byte	.LVL572
-	.4byte	.LVL573
+	.4byte	.LVL562
+	.4byte	.LVL563
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL573
-	.4byte	.LVL574
+	.4byte	.LVL563
+	.4byte	.LVL564
 	.2byte	0x3
 	.byte	0x70
 	.sleb128 -1
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST144:
-	.4byte	.LVL553
-	.4byte	.LVL555
+.LLST136:
+	.4byte	.LVL543
+	.4byte	.LVL545
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL555
-	.4byte	.LVL556
+	.4byte	.LVL545
+	.4byte	.LVL546
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL556
-	.4byte	.LVL557
+	.4byte	.LVL546
+	.4byte	.LVL547
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL557
+	.4byte	.LVL547
 	.4byte	.LFE342
 	.2byte	0x1
 	.byte	0x5b
 	.4byte	0
 	.4byte	0
-.LLST145:
-	.4byte	.LVL553
-	.4byte	.LVL555
+.LLST137:
+	.4byte	.LVL543
+	.4byte	.LVL545
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL555
-	.4byte	.LVL556
+	.4byte	.LVL545
+	.4byte	.LVL546
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL556
-	.4byte	.LVL557
+	.4byte	.LVL546
+	.4byte	.LVL547
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL557
+	.4byte	.LVL547
 	.4byte	.LFE342
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST146:
-	.4byte	.LVL553
-	.4byte	.LVL555
+.LLST138:
+	.4byte	.LVL543
+	.4byte	.LVL545
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL555
-	.4byte	.LVL556
+	.4byte	.LVL545
+	.4byte	.LVL546
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL556
-	.4byte	.LVL557
+	.4byte	.LVL546
+	.4byte	.LVL547
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x52
 	.byte	0x9f
-	.4byte	.LVL557
+	.4byte	.LVL547
 	.4byte	.LFE342
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST147:
-	.4byte	.LVL553
-	.4byte	.LVL555
+.LLST139:
+	.4byte	.LVL543
+	.4byte	.LVL545
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL555
-	.4byte	.LVL556
+	.4byte	.LVL545
+	.4byte	.LVL546
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL556
-	.4byte	.LVL557
+	.4byte	.LVL546
+	.4byte	.LVL547
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x53
 	.byte	0x9f
-	.4byte	.LVL557
+	.4byte	.LVL547
 	.4byte	.LFE342
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
-.LLST148:
-	.4byte	.LVL554
-	.4byte	.LVL555
+.LLST140:
+	.4byte	.LVL544
+	.4byte	.LVL545
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL555
-	.4byte	.LVL556
+	.4byte	.LVL545
+	.4byte	.LVL546
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL557
+	.4byte	.LVL547
 	.4byte	.LFE342
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST149:
-	.4byte	.LVL554
-	.4byte	.LVL555
+.LLST141:
+	.4byte	.LVL544
+	.4byte	.LVL545
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL555
-	.4byte	.LVL556
+	.4byte	.LVL545
+	.4byte	.LVL546
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL557
-	.4byte	.LVL559
+	.4byte	.LVL547
+	.4byte	.LVL549
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL559
-	.4byte	.LVL560
+	.4byte	.LVL549
+	.4byte	.LVL550
 	.2byte	0x3
 	.byte	0x75
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL560
-	.4byte	.LVL561
+	.4byte	.LVL550
+	.4byte	.LVL551
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL561
-	.4byte	.LVL562
+	.4byte	.LVL551
+	.4byte	.LVL552
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL562
+	.4byte	.LVL552
 	.4byte	.LFE342
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST150:
-	.4byte	.LVL554
-	.4byte	.LVL555
+.LLST142:
+	.4byte	.LVL544
+	.4byte	.LVL545
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL555
-	.4byte	.LVL556
+	.4byte	.LVL545
+	.4byte	.LVL546
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL556
-	.4byte	.LVL557
+	.4byte	.LVL546
+	.4byte	.LVL547
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL557
+	.4byte	.LVL547
 	.4byte	.LFE342
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST151:
-	.4byte	.LVL554
-	.4byte	.LVL555
+.LLST143:
+	.4byte	.LVL544
+	.4byte	.LVL545
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL555
-	.4byte	.LVL556
+	.4byte	.LVL545
+	.4byte	.LVL546
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL556
-	.4byte	.LVL557
+	.4byte	.LVL546
+	.4byte	.LVL547
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL557
+	.4byte	.LVL547
 	.4byte	.LFE342
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST152:
-	.4byte	.LVL554
-	.4byte	.LVL555
+.LLST144:
+	.4byte	.LVL544
+	.4byte	.LVL545
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL555
-	.4byte	.LVL556
+	.4byte	.LVL545
+	.4byte	.LVL546
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL556
-	.4byte	.LVL557
+	.4byte	.LVL546
+	.4byte	.LVL547
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL557
+	.4byte	.LVL547
 	.4byte	.LFE342
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST143:
-	.4byte	.LVL551
-	.4byte	.LVL552-1
+.LLST135:
+	.4byte	.LVL541
+	.4byte	.LVL542-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL552-1
+	.4byte	.LVL542-1
 	.4byte	.LFE341
 	.2byte	0x4
 	.byte	0xf3
@@ -44742,12 +44766,12 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST141:
-	.4byte	.LVL549
-	.4byte	.LVL550-1
+.LLST133:
+	.4byte	.LVL539
+	.4byte	.LVL540-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL550-1
+	.4byte	.LVL540-1
 	.4byte	.LFE340
 	.2byte	0x4
 	.byte	0xf3
@@ -44756,12 +44780,12 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST142:
-	.4byte	.LVL549
-	.4byte	.LVL550-1
+.LLST134:
+	.4byte	.LVL539
+	.4byte	.LVL540-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL550-1
+	.4byte	.LVL540-1
 	.4byte	.LFE340
 	.2byte	0x4
 	.byte	0xf3
@@ -44770,12 +44794,12 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST138:
-	.4byte	.LVL536
-	.4byte	.LVL537-1
+.LLST130:
+	.4byte	.LVL526
+	.4byte	.LVL527-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL537-1
+	.4byte	.LVL527-1
 	.4byte	.LFE318
 	.2byte	0x4
 	.byte	0xf3
@@ -44784,43 +44808,43 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST139:
-	.4byte	.LVL540
-	.4byte	.LVL541
+.LLST131:
+	.4byte	.LVL530
+	.4byte	.LVL531
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL541
-	.4byte	.LVL542
+	.4byte	.LVL531
+	.4byte	.LVL532
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL542
-	.4byte	.LVL543
+	.4byte	.LVL532
+	.4byte	.LVL533
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL543
-	.4byte	.LVL544
+	.4byte	.LVL533
+	.4byte	.LVL534
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL544
-	.4byte	.LVL545
+	.4byte	.LVL534
+	.4byte	.LVL535
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST140:
-	.4byte	.LVL538
-	.4byte	.LVL546
+.LLST132:
+	.4byte	.LVL528
+	.4byte	.LVL536
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST137:
-	.4byte	.LVL533
-	.4byte	.LVL534
+.LLST129:
+	.4byte	.LVL523
+	.4byte	.LVL524
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL534
+	.4byte	.LVL524
 	.4byte	.LFE317
 	.2byte	0x4
 	.byte	0xf3
@@ -44829,42 +44853,42 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST396:
-	.4byte	.LVL1699
-	.4byte	.LVL1702
+.LLST395:
+	.4byte	.LVL1703
+	.4byte	.LVL1706
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1707
+	.4byte	.LVL1711
 	.4byte	.LFE316
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST397:
-	.4byte	.LVL1706
-	.4byte	.LVL1707-1
+.LLST396:
+	.4byte	.LVL1710
+	.4byte	.LVL1711-1
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
 .LLST271:
-	.4byte	.LVL1098
-	.4byte	.LVL1100-1
+	.4byte	.LVL1106
+	.4byte	.LVL1108-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1100-1
-	.4byte	.LVL1101
+	.4byte	.LVL1108-1
+	.4byte	.LVL1109
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1101
-	.4byte	.LVL1103
+	.4byte	.LVL1109
+	.4byte	.LVL1111
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1103
-	.4byte	.LVL1140
+	.4byte	.LVL1111
+	.4byte	.LVL1148
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1140
+	.4byte	.LVL1148
 	.4byte	.LFE313
 	.2byte	0x4
 	.byte	0xf3
@@ -44874,25 +44898,25 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST272:
-	.4byte	.LVL1098
-	.4byte	.LVL1100-1
+	.4byte	.LVL1106
+	.4byte	.LVL1108-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1100-1
-	.4byte	.LVL1101
+	.4byte	.LVL1108-1
+	.4byte	.LVL1109
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -48
-	.4byte	.LVL1101
-	.4byte	.LVL1103
+	.4byte	.LVL1109
+	.4byte	.LVL1111
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1103
-	.4byte	.LVL1140
+	.4byte	.LVL1111
+	.4byte	.LVL1148
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -48
-	.4byte	.LVL1140
+	.4byte	.LVL1148
 	.4byte	.LFE313
 	.2byte	0x2
 	.byte	0x7d
@@ -44900,72 +44924,72 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST273:
-	.4byte	.LVL1114
-	.4byte	.LVL1115
+	.4byte	.LVL1122
+	.4byte	.LVL1123
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1115
-	.4byte	.LVL1120
+	.4byte	.LVL1123
+	.4byte	.LVL1128
 	.2byte	0x2
 	.byte	0x7c
 	.sleb128 -2
 	.4byte	0
 	.4byte	0
 .LLST274:
-	.4byte	.LVL1106
-	.4byte	.LVL1107
+	.4byte	.LVL1114
+	.4byte	.LVL1115
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1107
-	.4byte	.LVL1116
+	.4byte	.LVL1115
+	.4byte	.LVL1124
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1117
-	.4byte	.LVL1126
+	.4byte	.LVL1125
+	.4byte	.LVL1134
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1129
-	.4byte	.LVL1139
+	.4byte	.LVL1137
+	.4byte	.LVL1147
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
 .LLST275:
-	.4byte	.LVL1109
-	.4byte	.LVL1113
+	.4byte	.LVL1117
+	.4byte	.LVL1121
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL1120
-	.4byte	.LVL1123
+	.4byte	.LVL1128
+	.4byte	.LVL1131
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL1131
 	.4byte	.LVL1139
+	.4byte	.LVL1147
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
 .LLST276:
-	.4byte	.LVL1106
-	.4byte	.LVL1107
+	.4byte	.LVL1114
+	.4byte	.LVL1115
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1107
-	.4byte	.LVL1108
+	.4byte	.LVL1115
+	.4byte	.LVL1116
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1108
-	.4byte	.LVL1109-1
+	.4byte	.LVL1116
+	.4byte	.LVL1117-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1113
-	.4byte	.LVL1118
+	.4byte	.LVL1121
+	.4byte	.LVL1126
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1118
-	.4byte	.LVL1119
+	.4byte	.LVL1126
+	.4byte	.LVL1127
 	.2byte	0x3
 	.byte	0x72
 	.sleb128 1
@@ -44973,134 +44997,134 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST277:
-	.4byte	.LVL1105
-	.4byte	.LVL1109
+	.4byte	.LVL1113
+	.4byte	.LVL1117
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1112
 	.4byte	.LVL1120
+	.4byte	.LVL1128
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1122
-	.4byte	.LVL1127
+	.4byte	.LVL1130
+	.4byte	.LVL1135
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1129
-	.4byte	.LVL1130
+	.4byte	.LVL1137
+	.4byte	.LVL1138
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1132
-	.4byte	.LVL1134
+	.4byte	.LVL1140
+	.4byte	.LVL1142
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1138
-	.4byte	.LVL1139
+	.4byte	.LVL1146
+	.4byte	.LVL1147
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
 .LLST278:
-	.4byte	.LVL1099
-	.4byte	.LVL1111
+	.4byte	.LVL1107
+	.4byte	.LVL1119
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1112
-	.4byte	.LVL1133
+	.4byte	.LVL1120
+	.4byte	.LVL1141
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1136
-	.4byte	.LVL1138
+	.4byte	.LVL1144
+	.4byte	.LVL1146
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1138
-	.4byte	.LVL1140
+	.4byte	.LVL1146
+	.4byte	.LVL1148
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
 .LLST279:
-	.4byte	.LVL1121
-	.4byte	.LVL1122-1
+	.4byte	.LVL1129
+	.4byte	.LVL1130-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1122-1
-	.4byte	.LVL1126
+	.4byte	.LVL1130-1
+	.4byte	.LVL1134
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -52
-	.4byte	.LVL1129
-	.4byte	.LVL1131-1
+	.4byte	.LVL1137
+	.4byte	.LVL1139-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1131-1
-	.4byte	.LVL1138
+	.4byte	.LVL1139-1
+	.4byte	.LVL1146
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -52
 	.4byte	0
 	.4byte	0
 .LLST280:
-	.4byte	.LVL1098
-	.4byte	.LVL1104
+	.4byte	.LVL1106
+	.4byte	.LVL1112
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1104
-	.4byte	.LVL1110
+	.4byte	.LVL1112
+	.4byte	.LVL1118
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1110
-	.4byte	.LVL1112
+	.4byte	.LVL1118
+	.4byte	.LVL1120
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL1112
-	.4byte	.LVL1140
+	.4byte	.LVL1120
+	.4byte	.LVL1148
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
 .LLST281:
-	.4byte	.LVL1124
-	.4byte	.LVL1125
+	.4byte	.LVL1132
+	.4byte	.LVL1133
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1125
-	.4byte	.LVL1126
+	.4byte	.LVL1133
+	.4byte	.LVL1134
 	.2byte	0x5
 	.byte	0x91
 	.sleb128 -44
 	.byte	0x6
 	.byte	0x23
 	.uleb128 0xc
-	.4byte	.LVL1129
-	.4byte	.LVL1131-1
+	.4byte	.LVL1137
+	.4byte	.LVL1139-1
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST391:
-	.4byte	.LVL1655
-	.4byte	.LVL1657
+.LLST390:
+	.4byte	.LVL1660
+	.4byte	.LVL1662
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1657
-	.4byte	.LVL1658
+	.4byte	.LVL1662
+	.4byte	.LVL1663
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1658
-	.4byte	.LVL1660
+	.4byte	.LVL1663
+	.4byte	.LVL1665
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1660
+	.4byte	.LVL1665
 	.4byte	.LFE311
 	.2byte	0x4
 	.byte	0xf3
@@ -45109,89 +45133,89 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST392:
-	.4byte	.LVL1668
-	.4byte	.LVL1671
+.LLST391:
+	.4byte	.LVL1673
+	.4byte	.LVL1675
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1671
-	.4byte	.LVL1674
+	.4byte	.LVL1675
+	.4byte	.LVL1678
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1677
-	.4byte	.LVL1685
+	.4byte	.LVL1681
+	.4byte	.LVL1689
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1685
-	.4byte	.LVL1686
+	.4byte	.LVL1689
+	.4byte	.LVL1690
 	.2byte	0x3
 	.byte	0x76
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1687
+	.4byte	.LVL1691
 	.4byte	.LFE311
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST393:
-	.4byte	.LVL1661
+.LLST392:
 	.4byte	.LVL1666
+	.4byte	.LVL1671
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1667
-	.4byte	.LVL1668
+	.4byte	.LVL1672
+	.4byte	.LVL1673
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1682
-	.4byte	.LVL1684
+	.4byte	.LVL1686
+	.4byte	.LVL1688
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST394:
-	.4byte	.LVL1656
-	.4byte	.LVL1657
+.LLST393:
+	.4byte	.LVL1661
+	.4byte	.LVL1662
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1658
-	.4byte	.LVL1659
+	.4byte	.LVL1663
+	.4byte	.LVL1664
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1659
-	.4byte	.LVL1661
+	.4byte	.LVL1664
+	.4byte	.LVL1666
 	.2byte	0x2
 	.byte	0x32
 	.byte	0x9f
-	.4byte	.LVL1661
-	.4byte	.LVL1662-1
+	.4byte	.LVL1666
+	.4byte	.LVL1667-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1666
-	.4byte	.LVL1667
+	.4byte	.LVL1671
+	.4byte	.LVL1672
 	.2byte	0x2
 	.byte	0x32
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST395:
-	.4byte	.LVL1678
-	.4byte	.LVL1688
+.LLST394:
+	.4byte	.LVL1682
+	.4byte	.LVL1692
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
-.LLST132:
-	.4byte	.LVL525
-	.4byte	.LVL526
+.LLST124:
+	.4byte	.LVL515
+	.4byte	.LVL516
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL526
-	.4byte	.LVL532
+	.4byte	.LVL516
+	.4byte	.LVL522
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL532
+	.4byte	.LVL522
 	.4byte	.LFE310
 	.2byte	0x5
 	.byte	0x71
@@ -45201,16 +45225,16 @@ __func__.9940:
 	.byte	0x22
 	.4byte	0
 	.4byte	0
-.LLST133:
-	.4byte	.LVL525
-	.4byte	.LVL527-1
+.LLST125:
+	.4byte	.LVL515
+	.4byte	.LVL517-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL527-1
-	.4byte	.LVL532
+	.4byte	.LVL517-1
+	.4byte	.LVL522
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL532
+	.4byte	.LVL522
 	.4byte	.LFE310
 	.2byte	0x7
 	.byte	0x71
@@ -45222,16 +45246,16 @@ __func__.9940:
 	.uleb128 0x4
 	.4byte	0
 	.4byte	0
-.LLST134:
-	.4byte	.LVL525
-	.4byte	.LVL527-1
+.LLST126:
+	.4byte	.LVL515
+	.4byte	.LVL517-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL527-1
-	.4byte	.LVL532
+	.4byte	.LVL517-1
+	.4byte	.LVL522
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL532
+	.4byte	.LVL522
 	.4byte	.LFE310
 	.2byte	0x7
 	.byte	0x71
@@ -45243,42 +45267,42 @@ __func__.9940:
 	.uleb128 0x8
 	.4byte	0
 	.4byte	0
-.LLST135:
-	.4byte	.LVL527
-	.4byte	.LVL531
+.LLST127:
+	.4byte	.LVL517
+	.4byte	.LVL521
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST136:
-	.4byte	.LVL527
-	.4byte	.LVL528
+.LLST128:
+	.4byte	.LVL517
+	.4byte	.LVL518
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL529
-	.4byte	.LVL530
+	.4byte	.LVL519
+	.4byte	.LVL520
 	.2byte	0x1
 	.byte	0x5c
 	.4byte	0
 	.4byte	0
-.LLST130:
-	.4byte	.LVL520
-	.4byte	.LVL522
+.LLST122:
+	.4byte	.LVL510
+	.4byte	.LVL512
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL522
-	.4byte	.LVL523
+	.4byte	.LVL512
+	.4byte	.LVL513
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL523
-	.4byte	.LVL524
+	.4byte	.LVL513
+	.4byte	.LVL514
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL524
+	.4byte	.LVL514
 	.4byte	.LFE309
 	.2byte	0x4
 	.byte	0xf3
@@ -45287,109 +45311,109 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST131:
-	.4byte	.LVL520
-	.4byte	.LVL521
+.LLST123:
+	.4byte	.LVL510
+	.4byte	.LVL511
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST128:
-	.4byte	.LVL516
-	.4byte	.LVL517
+.LLST120:
+	.4byte	.LVL506
+	.4byte	.LVL507
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
-.LLST129:
-	.4byte	.LVL514
-	.4byte	.LVL515
+.LLST121:
+	.4byte	.LVL504
+	.4byte	.LVL505
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL515
-	.4byte	.LVL518
+	.4byte	.LVL505
+	.4byte	.LVL508
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL518
-	.4byte	.LVL519
+	.4byte	.LVL508
+	.4byte	.LVL509
 	.2byte	0x3
 	.byte	0x72
 	.sleb128 1
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST126:
-	.4byte	.LVL508
-	.4byte	.LVL509
+.LLST118:
+	.4byte	.LVL498
+	.4byte	.LVL499
 	.2byte	0x1
 	.byte	0x52
 	.4byte	0
 	.4byte	0
-.LLST127:
-	.4byte	.LVL506
-	.4byte	.LVL507
+.LLST119:
+	.4byte	.LVL496
+	.4byte	.LVL497
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL507
-	.4byte	.LVL510
+	.4byte	.LVL497
+	.4byte	.LVL500
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL510
-	.4byte	.LVL511
+	.4byte	.LVL500
+	.4byte	.LVL501
 	.2byte	0x3
 	.byte	0x74
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL512
-	.4byte	.LVL513
+	.4byte	.LVL502
+	.4byte	.LVL503
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL513
+	.4byte	.LVL503
 	.4byte	.LFE307
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST125:
-	.4byte	.LVL499
-	.4byte	.LVL500
+.LLST117:
+	.4byte	.LVL489
+	.4byte	.LVL490
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL501
-	.4byte	.LVL502
+	.4byte	.LVL491
+	.4byte	.LVL492
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL503
-	.4byte	.LVL504
+	.4byte	.LVL493
+	.4byte	.LVL494
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL505
+	.4byte	.LVL495
 	.4byte	.LFE306
 	.2byte	0x1
 	.byte	0x52
 	.4byte	0
 	.4byte	0
 .LLST309:
-	.4byte	.LVL1257
-	.4byte	.LVL1258
+	.4byte	.LVL1265
+	.4byte	.LVL1266
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1258
-	.4byte	.LVL1264
+	.4byte	.LVL1266
+	.4byte	.LVL1272
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1264
-	.4byte	.LVL1265
+	.4byte	.LVL1272
+	.4byte	.LVL1273
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1265
+	.4byte	.LVL1273
 	.4byte	.LFE305
 	.2byte	0x4
 	.byte	0xf3
@@ -45399,61 +45423,61 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST310:
-	.4byte	.LVL1257
-	.4byte	.LVL1260
+	.4byte	.LVL1265
+	.4byte	.LVL1268
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1261
-	.4byte	.LVL1262
+	.4byte	.LVL1269
+	.4byte	.LVL1270
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1264
-	.4byte	.LVL1267
+	.4byte	.LVL1272
+	.4byte	.LVL1275
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1267
+	.4byte	.LVL1275
 	.4byte	.LFE305
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST122:
-	.4byte	.LVL488
-	.4byte	.LVL489
+.LLST114:
+	.4byte	.LVL478
+	.4byte	.LVL479
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL489
+	.4byte	.LVL479
 	.4byte	.LFE303
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST123:
-	.4byte	.LVL493
-	.4byte	.LVL495
+.LLST115:
+	.4byte	.LVL483
+	.4byte	.LVL485
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL497
+	.4byte	.LVL487
 	.4byte	.LFE303
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST124:
-	.4byte	.LVL488
-	.4byte	.LVL494
+.LLST116:
+	.4byte	.LVL478
+	.4byte	.LVL484
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL494
-	.4byte	.LVL497
+	.4byte	.LVL484
+	.4byte	.LVL487
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL497
+	.4byte	.LVL487
 	.4byte	.LFE303
 	.2byte	0x3
 	.byte	0x9
@@ -45461,27 +45485,27 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST376:
-	.4byte	.LVL1592
-	.4byte	.LVL1594
+.LLST381:
+	.4byte	.LVL1626
+	.4byte	.LVL1628
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1594
+	.4byte	.LVL1628
 	.4byte	.LFE302
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
 .LLST294:
-	.4byte	.LVL1184
-	.4byte	.LVL1185
+	.4byte	.LVL1192
+	.4byte	.LVL1193
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1185
-	.4byte	.LVL1225
+	.4byte	.LVL1193
+	.4byte	.LVL1233
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1225
+	.4byte	.LVL1233
 	.4byte	.LFE301
 	.2byte	0x4
 	.byte	0xf3
@@ -45491,61 +45515,61 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST295:
-	.4byte	.LVL1191
-	.4byte	.LVL1196
+	.4byte	.LVL1199
+	.4byte	.LVL1204
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1197
-	.4byte	.LVL1225
+	.4byte	.LVL1205
+	.4byte	.LVL1233
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
 .LLST296:
-	.4byte	.LVL1199
-	.4byte	.LVL1212
+	.4byte	.LVL1207
+	.4byte	.LVL1220
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1213
-	.4byte	.LVL1225
+	.4byte	.LVL1221
+	.4byte	.LVL1233
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
 .LLST297:
-	.4byte	.LVL1204
-	.4byte	.LVL1205
+	.4byte	.LVL1212
+	.4byte	.LVL1213
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1206
-	.4byte	.LVL1207
+	.4byte	.LVL1214
+	.4byte	.LVL1215
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1207
-	.4byte	.LVL1211
+	.4byte	.LVL1215
+	.4byte	.LVL1219
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL1217
-	.4byte	.LVL1221
+	.4byte	.LVL1225
+	.4byte	.LVL1229
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL1221
-	.4byte	.LVL1222
+	.4byte	.LVL1229
+	.4byte	.LVL1230
 	.2byte	0x3
 	.byte	0x7a
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1223
-	.4byte	.LVL1225
+	.4byte	.LVL1231
+	.4byte	.LVL1233
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
 .LLST298:
-	.4byte	.LVL1219
-	.4byte	.LVL1220-1
+	.4byte	.LVL1227
+	.4byte	.LVL1228-1
 	.2byte	0x6
 	.byte	0x7c
 	.sleb128 4
@@ -45556,210 +45580,235 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST299:
-	.4byte	.LVL1206
-	.4byte	.LVL1207
+	.4byte	.LVL1214
+	.4byte	.LVL1215
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1207
-	.4byte	.LVL1208-1
+	.4byte	.LVL1215
+	.4byte	.LVL1216-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1217
-	.4byte	.LVL1218
+	.4byte	.LVL1225
+	.4byte	.LVL1226
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1218
-	.4byte	.LVL1219
+	.4byte	.LVL1226
+	.4byte	.LVL1227
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL1219
-	.4byte	.LVL1220-1
+	.4byte	.LVL1227
+	.4byte	.LVL1228-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1220-1
-	.4byte	.LVL1221
+	.4byte	.LVL1228-1
+	.4byte	.LVL1229
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -44
-	.4byte	.LVL1221
-	.4byte	.LVL1223
+	.4byte	.LVL1229
+	.4byte	.LVL1231
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
 .LLST300:
-	.4byte	.LVL1184
-	.4byte	.LVL1185
+	.4byte	.LVL1192
+	.4byte	.LVL1193
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1187
-	.4byte	.LVL1188
+	.4byte	.LVL1195
+	.4byte	.LVL1196
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1188
-	.4byte	.LVL1189
+	.4byte	.LVL1196
+	.4byte	.LVL1197
 	.2byte	0x3
 	.byte	0x71
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1189
-	.4byte	.LVL1190-1
+	.4byte	.LVL1197
+	.4byte	.LVL1198-1
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
 .LLST301:
-	.4byte	.LVL1214
-	.4byte	.LVL1216
+	.4byte	.LVL1222
+	.4byte	.LVL1224
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
 .LLST302:
-	.4byte	.LVL1214
-	.4byte	.LVL1216
+	.4byte	.LVL1222
+	.4byte	.LVL1224
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST113:
-	.4byte	.LVL457
-	.4byte	.LVL462
+.LLST104:
+	.4byte	.LVL445
+	.4byte	.LVL450
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL463
-	.4byte	.LVL473
+	.4byte	.LVL451
+	.4byte	.LVL461
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL481
-	.4byte	.LVL483
+	.4byte	.LVL471
+	.4byte	.LVL473
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST114:
-	.4byte	.LVL457
-	.4byte	.LVL462
+.LLST105:
+	.4byte	.LVL445
+	.4byte	.LVL450
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL463
-	.4byte	.LVL473
+	.4byte	.LVL451
+	.4byte	.LVL461
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL474
-	.4byte	.LVL479
+	.4byte	.LVL462
+	.4byte	.LVL467
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST115:
-	.4byte	.LVL457
-	.4byte	.LVL462
+.LLST106:
+	.4byte	.LVL445
+	.4byte	.LVL450
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL463
-	.4byte	.LVL473
+	.4byte	.LVL451
+	.4byte	.LVL461
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL473
-	.4byte	.LVL477
+	.4byte	.LVL461
+	.4byte	.LVL465
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL479
-	.4byte	.LVL482
+	.4byte	.LVL467
+	.4byte	.LVL472
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL483
+	.4byte	.LVL473
 	.4byte	.LFE299
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST116:
-	.4byte	.LVL473
-	.4byte	.LVL474
+.LLST107:
+	.4byte	.LVL461
+	.4byte	.LVL462
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL479
-	.4byte	.LVL480
+	.4byte	.LVL467
+	.4byte	.LVL470
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL484
+	.4byte	.LVL474
 	.4byte	.LFE299
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST117:
-	.4byte	.LVL471
-	.4byte	.LVL472
+.LLST108:
+	.4byte	.LVL459
+	.4byte	.LVL460
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST118:
-	.4byte	.LVL475
-	.4byte	.LVL479
+.LLST109:
+	.4byte	.LVL463
+	.4byte	.LVL467
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST119:
-	.4byte	.LVL458
-	.4byte	.LVL459
+.LLST110:
+	.4byte	.LVL446
+	.4byte	.LVL447
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL459
-	.4byte	.LVL460-1
+	.4byte	.LVL447
+	.4byte	.LVL448-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL463
-	.4byte	.LVL465
+	.4byte	.LVL451
+	.4byte	.LVL453
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL466
-	.4byte	.LVL467
+	.4byte	.LVL454
+	.4byte	.LVL455
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL455
+	.4byte	.LVL457
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST111:
+	.4byte	.LVL445
+	.4byte	.LVL450
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL451
+	.4byte	.LVL461
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
+	.4byte	.LVL461
+	.4byte	.LVL464-1
+	.2byte	0x1
+	.byte	0x50
 	.4byte	.LVL467
+	.4byte	.LVL468
+	.2byte	0x1
+	.byte	0x50
 	.4byte	.LVL469
+	.4byte	.LFE299
 	.2byte	0x1
-	.byte	0x52
+	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST102:
-	.4byte	.LVL292
-	.4byte	.LVL293
+.LLST93:
+	.4byte	.LVL280
+	.4byte	.LVL281
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL293
-	.4byte	.LVL296
+	.4byte	.LVL281
+	.4byte	.LVL284
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL297
-	.4byte	.LVL299
+	.4byte	.LVL285
+	.4byte	.LVL287
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL299
+	.4byte	.LVL287
 	.4byte	.LFE298
 	.2byte	0x4
 	.byte	0xf3
@@ -45768,59 +45817,59 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST103:
-	.4byte	.LVL292
-	.4byte	.LVL296
+.LLST94:
+	.4byte	.LVL280
+	.4byte	.LVL284
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL296
-	.4byte	.LVL297
+	.4byte	.LVL284
+	.4byte	.LVL285
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL297
-	.4byte	.LVL299
+	.4byte	.LVL285
+	.4byte	.LVL287
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL299
+	.4byte	.LVL287
 	.4byte	.LFE298
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST104:
-	.4byte	.LVL294
-	.4byte	.LVL298
+.LLST95:
+	.4byte	.LVL282
+	.4byte	.LVL286
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST105:
-	.4byte	.LVL294
-	.4byte	.LVL295
+.LLST96:
+	.4byte	.LVL282
+	.4byte	.LVL283
 	.2byte	0x1
 	.byte	0x52
 	.4byte	0
-	.4byte	0
-.LLST101:
-	.4byte	.LVL290
-	.4byte	.LVL291
+	.4byte	0
+.LLST92:
+	.4byte	.LVL278
+	.4byte	.LVL279
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL291
+	.4byte	.LVL279
 	.4byte	.LFE297
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST97:
-	.4byte	.LVL279
-	.4byte	.LVL280
+.LLST88:
+	.4byte	.LVL267
+	.4byte	.LVL268
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL280
+	.4byte	.LVL268
 	.4byte	.LFE296
 	.2byte	0x4
 	.byte	0xf3
@@ -45829,91 +45878,91 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST98:
-	.4byte	.LVL279
-	.4byte	.LVL280
+.LLST89:
+	.4byte	.LVL267
+	.4byte	.LVL268
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL280
-	.4byte	.LVL287
+	.4byte	.LVL268
+	.4byte	.LVL275
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL287
-	.4byte	.LVL288
+	.4byte	.LVL275
+	.4byte	.LVL276
 	.2byte	0x3
 	.byte	0x75
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL289
+	.4byte	.LVL277
 	.4byte	.LFE296
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST99:
-	.4byte	.LVL284
-	.4byte	.LVL285-1
+.LLST90:
+	.4byte	.LVL272
+	.4byte	.LVL273-1
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST100:
-	.4byte	.LVL279
-	.4byte	.LVL280
+.LLST91:
+	.4byte	.LVL267
+	.4byte	.LVL268
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL280
-	.4byte	.LVL281
+	.4byte	.LVL268
+	.4byte	.LVL269
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL281
-	.4byte	.LVL282
+	.4byte	.LVL269
+	.4byte	.LVL270
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL282
-	.4byte	.LVL283
+	.4byte	.LVL270
+	.4byte	.LVL271
 	.2byte	0x2
 	.byte	0x76
 	.sleb128 4
-	.4byte	.LVL283
-	.4byte	.LVL286
+	.4byte	.LVL271
+	.4byte	.LVL274
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL287
+	.4byte	.LVL275
 	.4byte	.LFE296
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
 .LLST239:
-	.4byte	.LVL913
-	.4byte	.LVL915
+	.4byte	.LVL921
+	.4byte	.LVL923
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
 .LLST266:
-	.4byte	.LVL1076
-	.4byte	.LVL1077
+	.4byte	.LVL1084
+	.4byte	.LVL1085
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1079
-	.4byte	.LVL1082
+	.4byte	.LVL1087
+	.4byte	.LVL1090
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL1091
-	.4byte	.LVL1093
+	.4byte	.LVL1099
+	.4byte	.LVL1101
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1093
-	.4byte	.LVL1094
+	.4byte	.LVL1101
+	.4byte	.LVL1102
 	.2byte	0x3
 	.byte	0x74
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1094
+	.4byte	.LVL1102
 	.4byte	.LFE293
 	.2byte	0x3
 	.byte	0x75
@@ -45922,80 +45971,80 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST267:
-	.4byte	.LVL1074
-	.4byte	.LVL1075
+	.4byte	.LVL1082
+	.4byte	.LVL1083
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1086
-	.4byte	.LVL1091
+	.4byte	.LVL1094
+	.4byte	.LVL1099
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
 .LLST268:
-	.4byte	.LVL1079
-	.4byte	.LVL1081
+	.4byte	.LVL1087
+	.4byte	.LVL1089
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1088
-	.4byte	.LVL1089
+	.4byte	.LVL1096
+	.4byte	.LVL1097
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
 .LLST269:
-	.4byte	.LVL1072
-	.4byte	.LVL1076
+	.4byte	.LVL1080
+	.4byte	.LVL1084
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1076
-	.4byte	.LVL1079
+	.4byte	.LVL1084
+	.4byte	.LVL1087
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1083
-	.4byte	.LVL1084
+	.4byte	.LVL1091
+	.4byte	.LVL1092
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1084
-	.4byte	.LVL1085
+	.4byte	.LVL1092
+	.4byte	.LVL1093
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.4byte	.LVL1086
-	.4byte	.LVL1091
+	.4byte	.LVL1094
+	.4byte	.LVL1099
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1091
+	.4byte	.LVL1099
 	.4byte	.LFE293
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
 .LLST270:
-	.4byte	.LVL1078
-	.4byte	.LVL1083
+	.4byte	.LVL1086
+	.4byte	.LVL1091
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST373:
-	.4byte	.LVL1580
-	.4byte	.LVL1581
+.LLST378:
+	.4byte	.LVL1614
+	.4byte	.LVL1615
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1586
-	.4byte	.LVL1590
+	.4byte	.LVL1620
+	.4byte	.LVL1624
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1590
-	.4byte	.LVL1591
+	.4byte	.LVL1624
+	.4byte	.LVL1625
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1591
+	.4byte	.LVL1625
 	.4byte	.LFE292
 	.2byte	0x3
 	.byte	0x76
@@ -46003,145 +46052,133 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST374:
-	.4byte	.LVL1578
-	.4byte	.LVL1579
+.LLST379:
+	.4byte	.LVL1612
+	.4byte	.LVL1613
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1581
-	.4byte	.LVL1586
+	.4byte	.LVL1615
+	.4byte	.LVL1620
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST375:
-	.4byte	.LVL1583
-	.4byte	.LVL1584
+.LLST380:
+	.4byte	.LVL1617
+	.4byte	.LVL1618
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
 .LLST341:
-	.4byte	.LVL1425
-	.4byte	.LVL1426
+	.4byte	.LVL1433
+	.4byte	.LVL1435
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1426
+	.4byte	.LVL1435
 	.4byte	.LFE291
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
 .LLST342:
-	.4byte	.LVL1432
-	.4byte	.LVL1433
-	.2byte	0x1
-	.byte	0x51
 	.4byte	.LVL1433
-	.4byte	.LVL1434-1
-	.2byte	0x5
-	.byte	0x3
-	.4byte	p_sys_spare_buf
-	.4byte	0
-	.4byte	0
-.LLST343:
-	.4byte	.LVL1425
-	.4byte	.LVL1426
+	.4byte	.LVL1435
 	.2byte	0x2
 	.byte	0x36
 	.byte	0x9f
-	.4byte	.LVL1426
-	.4byte	.LVL1427
+	.4byte	.LVL1435
+	.4byte	.LVL1436
 	.2byte	0x3
-	.byte	0x75
+	.byte	0x77
 	.sleb128 -2
 	.byte	0x9f
-	.4byte	.LVL1427
-	.4byte	.LVL1428
+	.4byte	.LVL1436
+	.4byte	.LVL1437
 	.2byte	0x3
-	.byte	0x75
+	.byte	0x77
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL1428
-	.4byte	.LVL1429
+	.4byte	.LVL1437
+	.4byte	.LVL1438
 	.2byte	0x3
-	.byte	0x75
+	.byte	0x77
 	.sleb128 -2
 	.byte	0x9f
-	.4byte	.LVL1430
+	.4byte	.LVL1439
 	.4byte	.LFE291
 	.2byte	0x3
-	.byte	0x75
+	.byte	0x77
 	.sleb128 -2
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
 .LLST260:
-	.4byte	.LVL1050
-	.4byte	.LVL1061
+	.4byte	.LVL1058
+	.4byte	.LVL1069
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1061
-	.4byte	.LVL1062
+	.4byte	.LVL1069
+	.4byte	.LVL1070
 	.2byte	0x3
 	.byte	0x74
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1062
-	.4byte	.LVL1063
+	.4byte	.LVL1070
+	.4byte	.LVL1071
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1063
 	.4byte	.LVL1071
+	.4byte	.LVL1079
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
 .LLST261:
-	.4byte	.LVL1051
-	.4byte	.LVL1052-1
+	.4byte	.LVL1059
+	.4byte	.LVL1060-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1055
-	.4byte	.LVL1056
+	.4byte	.LVL1063
+	.4byte	.LVL1064
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1056
-	.4byte	.LVL1057-1
+	.4byte	.LVL1064
+	.4byte	.LVL1065-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1063
-	.4byte	.LVL1064
+	.4byte	.LVL1071
+	.4byte	.LVL1072
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
 .LLST262:
-	.4byte	.LVL1052
-	.4byte	.LVL1053-1
+	.4byte	.LVL1060
+	.4byte	.LVL1061-1
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
 .LLST263:
-	.4byte	.LVL1051
-	.4byte	.LVL1054
+	.4byte	.LVL1059
+	.4byte	.LVL1062
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1055
-	.4byte	.LVL1057
+	.4byte	.LVL1063
+	.4byte	.LVL1065
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1057
-	.4byte	.LVL1059
+	.4byte	.LVL1065
+	.4byte	.LVL1067
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1059
-	.4byte	.LVL1061-1
+	.4byte	.LVL1067
+	.4byte	.LVL1069-1
 	.2byte	0x9
 	.byte	0x72
 	.sleb128 0
@@ -46152,16 +46189,16 @@ __func__.9940:
 	.byte	0x22
 	.byte	0x23
 	.uleb128 0x4
-	.4byte	.LVL1063
-	.4byte	.LVL1064
+	.4byte	.LVL1071
+	.4byte	.LVL1072
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1064
-	.4byte	.LVL1066
+	.4byte	.LVL1072
+	.4byte	.LVL1074
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1066
-	.4byte	.LVL1068-1
+	.4byte	.LVL1074
+	.4byte	.LVL1076-1
 	.2byte	0x9
 	.byte	0x72
 	.sleb128 0
@@ -46175,50 +46212,50 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST264:
-	.4byte	.LVL1050
-	.4byte	.LVL1065
+	.4byte	.LVL1058
+	.4byte	.LVL1073
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1067
-	.4byte	.LVL1069
+	.4byte	.LVL1075
+	.4byte	.LVL1077
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1069
-	.4byte	.LVL1070-1
+	.4byte	.LVL1077
+	.4byte	.LVL1078-1
 	.2byte	0x5
 	.byte	0x3
 	.4byte	g_num_data_superblocks
 	.4byte	0
 	.4byte	0
 .LLST265:
-	.4byte	.LVL1050
 	.4byte	.LVL1058
+	.4byte	.LVL1066
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL1060
-	.4byte	.LVL1071
+	.4byte	.LVL1068
+	.4byte	.LVL1079
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST95:
-	.4byte	.LVL269
-	.4byte	.LVL270
+.LLST86:
+	.4byte	.LVL257
+	.4byte	.LVL258
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL270
+	.4byte	.LVL258
 	.4byte	.LFE287
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST96:
-	.4byte	.LVL272
-	.4byte	.LVL277
+.LLST87:
+	.4byte	.LVL260
+	.4byte	.LVL265
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL277
-	.4byte	.LVL278
+	.4byte	.LVL265
+	.4byte	.LVL266
 	.2byte	0x3
 	.byte	0x75
 	.sleb128 1
@@ -46226,31 +46263,31 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST315:
-	.4byte	.LVL1287
-	.4byte	.LVL1290
+	.4byte	.LVL1295
+	.4byte	.LVL1298
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1290
-	.4byte	.LVL1292
+	.4byte	.LVL1298
+	.4byte	.LVL1300
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL1292
-	.4byte	.LVL1293
+	.4byte	.LVL1300
+	.4byte	.LVL1301
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1293
+	.4byte	.LVL1301
 	.4byte	.LFE284
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
 .LLST316:
-	.4byte	.LVL1288
-	.4byte	.LVL1291
+	.4byte	.LVL1296
+	.4byte	.LVL1299
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -76
-	.4byte	.LVL1292
+	.4byte	.LVL1300
 	.4byte	.LFE284
 	.2byte	0x3
 	.byte	0x91
@@ -46258,12 +46295,12 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST317:
-	.4byte	.LVL1289
-	.4byte	.LVL1291
+	.4byte	.LVL1297
+	.4byte	.LVL1299
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -60
-	.4byte	.LVL1292
+	.4byte	.LVL1300
 	.4byte	.LFE284
 	.2byte	0x2
 	.byte	0x91
@@ -46271,79 +46308,79 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST318:
-	.4byte	.LVL1292
-	.4byte	.LVL1293
+	.4byte	.LVL1300
+	.4byte	.LVL1301
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1294
-	.4byte	.LVL1298
+	.4byte	.LVL1302
+	.4byte	.LVL1306
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1299
-	.4byte	.LVL1300
+	.4byte	.LVL1307
+	.4byte	.LVL1308
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1300
-	.4byte	.LVL1301-1
+	.4byte	.LVL1308
+	.4byte	.LVL1309-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1311
-	.4byte	.LVL1313
+	.4byte	.LVL1319
+	.4byte	.LVL1321
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1313
-	.4byte	.LVL1316
+	.4byte	.LVL1321
+	.4byte	.LVL1324
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1316
-	.4byte	.LVL1321
+	.4byte	.LVL1324
+	.4byte	.LVL1329
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1321
-	.4byte	.LVL1322
+	.4byte	.LVL1329
+	.4byte	.LVL1330
 	.2byte	0x3
 	.byte	0x72
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1339
-	.4byte	.LVL1344
+	.4byte	.LVL1347
+	.4byte	.LVL1352
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1344
-	.4byte	.LVL1345
+	.4byte	.LVL1352
+	.4byte	.LVL1353
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1345
-	.4byte	.LVL1346-1
+	.4byte	.LVL1353
+	.4byte	.LVL1354-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1352
-	.4byte	.LVL1353
+	.4byte	.LVL1360
+	.4byte	.LVL1361
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1353
-	.4byte	.LVL1354-1
+	.4byte	.LVL1361
+	.4byte	.LVL1362-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1359
-	.4byte	.LVL1360
+	.4byte	.LVL1367
+	.4byte	.LVL1368
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1360
-	.4byte	.LVL1362
+	.4byte	.LVL1368
+	.4byte	.LVL1370
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1368
-	.4byte	.LVL1371
+	.4byte	.LVL1376
+	.4byte	.LVL1379
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1371
-	.4byte	.LVL1372
+	.4byte	.LVL1379
+	.4byte	.LVL1380
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 1
@@ -46351,89 +46388,89 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST319:
-	.4byte	.LVL1351
-	.4byte	.LVL1352
+	.4byte	.LVL1359
+	.4byte	.LVL1360
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -60
-	.4byte	.LVL1374
-	.4byte	.LVL1377
+	.4byte	.LVL1382
+	.4byte	.LVL1385
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1380
-	.4byte	.LVL1383
+	.4byte	.LVL1388
+	.4byte	.LVL1391
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1421
-	.4byte	.LVL1422
+	.4byte	.LVL1429
+	.4byte	.LVL1430
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1424
+	.4byte	.LVL1432
 	.4byte	.LFE284
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
 .LLST320:
-	.4byte	.LVL1337
-	.4byte	.LVL1338
+	.4byte	.LVL1345
+	.4byte	.LVL1346
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -76
-	.4byte	.LVL1338
-	.4byte	.LVL1348
+	.4byte	.LVL1346
+	.4byte	.LVL1356
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1349
-	.4byte	.LVL1350
+	.4byte	.LVL1357
+	.4byte	.LVL1358
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1351
-	.4byte	.LVL1352
+	.4byte	.LVL1359
+	.4byte	.LVL1360
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -76
-	.4byte	.LVL1352
-	.4byte	.LVL1357
+	.4byte	.LVL1360
+	.4byte	.LVL1365
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL1358
-	.4byte	.LVL1363
+	.4byte	.LVL1366
+	.4byte	.LVL1371
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL1363
-	.4byte	.LVL1368
+	.4byte	.LVL1371
+	.4byte	.LVL1376
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1368
+	.4byte	.LVL1376
 	.4byte	.LFE284
 	.2byte	0x1
 	.byte	0x5b
 	.4byte	0
 	.4byte	0
 .LLST321:
-	.4byte	.LVL1308
-	.4byte	.LVL1311
+	.4byte	.LVL1316
+	.4byte	.LVL1319
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL1333
+	.4byte	.LVL1341
 	.4byte	.LFE284
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
 .LLST322:
-	.4byte	.LVL1306
-	.4byte	.LVL1311
+	.4byte	.LVL1314
+	.4byte	.LVL1319
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -72
-	.4byte	.LVL1329
-	.4byte	.LVL1330
+	.4byte	.LVL1337
+	.4byte	.LVL1338
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -72
-	.4byte	.LVL1333
+	.4byte	.LVL1341
 	.4byte	.LFE284
 	.2byte	0x3
 	.byte	0x91
@@ -46441,100 +46478,100 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST323:
-	.4byte	.LVL1293
-	.4byte	.LVL1295-1
+	.4byte	.LVL1301
+	.4byte	.LVL1303-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1311
-	.4byte	.LVL1313
+	.4byte	.LVL1319
+	.4byte	.LVL1321
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1317
-	.4byte	.LVL1318
+	.4byte	.LVL1325
+	.4byte	.LVL1326
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1318
-	.4byte	.LVL1323
+	.4byte	.LVL1326
+	.4byte	.LVL1331
 	.2byte	0x5
 	.byte	0x7d
 	.sleb128 0
 	.byte	0x6
 	.byte	0x32
 	.byte	0x1c
-	.4byte	.LVL1340
-	.4byte	.LVL1342
+	.4byte	.LVL1348
+	.4byte	.LVL1350
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1342
-	.4byte	.LVL1345
+	.4byte	.LVL1350
+	.4byte	.LVL1353
 	.2byte	0x6
 	.byte	0x91
 	.sleb128 -68
 	.byte	0x6
 	.byte	0x32
 	.byte	0x1c
-	.4byte	.LVL1361
-	.4byte	.LVL1363
+	.4byte	.LVL1369
+	.4byte	.LVL1371
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1369
-	.4byte	.LVL1370
+	.4byte	.LVL1377
+	.4byte	.LVL1378
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1370
-	.4byte	.LVL1373
+	.4byte	.LVL1378
+	.4byte	.LVL1381
 	.2byte	0x2
 	.byte	0x71
 	.sleb128 -2
 	.4byte	0
 	.4byte	0
 .LLST324:
-	.4byte	.LVL1296
-	.4byte	.LVL1297
+	.4byte	.LVL1304
+	.4byte	.LVL1305
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1297
-	.4byte	.LVL1309
+	.4byte	.LVL1305
+	.4byte	.LVL1317
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1313
-	.4byte	.LVL1336
+	.4byte	.LVL1321
+	.4byte	.LVL1344
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
 .LLST326:
-	.4byte	.LVL1299
-	.4byte	.LVL1309
+	.4byte	.LVL1307
+	.4byte	.LVL1317
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1316
-	.4byte	.LVL1319
+	.4byte	.LVL1324
+	.4byte	.LVL1327
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1320
-	.4byte	.LVL1338
+	.4byte	.LVL1328
+	.4byte	.LVL1346
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1339
-	.4byte	.LVL1341
+	.4byte	.LVL1347
+	.4byte	.LVL1349
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1343
-	.4byte	.LVL1347
+	.4byte	.LVL1351
+	.4byte	.LVL1355
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1352
-	.4byte	.LVL1353
+	.4byte	.LVL1360
+	.4byte	.LVL1361
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1353
-	.4byte	.LVL1363
+	.4byte	.LVL1361
+	.4byte	.LVL1371
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -68
-	.4byte	.LVL1368
+	.4byte	.LVL1376
 	.4byte	.LFE284
 	.2byte	0x3
 	.byte	0x91
@@ -46542,25 +46579,25 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST327:
-	.4byte	.LVL1302
-	.4byte	.LVL1304
+	.4byte	.LVL1310
+	.4byte	.LVL1312
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1305
-	.4byte	.LVL1306
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1323
-	.4byte	.LVL1324
+	.4byte	.LVL1313
+	.4byte	.LVL1314
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1324
 	.4byte	.LVL1331
+	.4byte	.LVL1332
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1332
+	.4byte	.LVL1339
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1331
-	.4byte	.LVL1332
+	.4byte	.LVL1339
+	.4byte	.LVL1340
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 1
@@ -46568,28 +46605,28 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST328:
-	.4byte	.LVL1346
-	.4byte	.LVL1347
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
 	.4byte	.LVL1354
 	.4byte	.LVL1355
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1356
+	.4byte	.LVL1362
 	.4byte	.LVL1363
 	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1364
+	.4byte	.LVL1371
+	.2byte	0x2
 	.byte	0x91
 	.sleb128 -56
-	.4byte	.LVL1373
-	.4byte	.LVL1379
+	.4byte	.LVL1381
+	.4byte	.LVL1387
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -56
-	.4byte	.LVL1379
-	.4byte	.LVL1380
+	.4byte	.LVL1387
+	.4byte	.LVL1388
 	.2byte	0x7
 	.byte	0x91
 	.sleb128 -56
@@ -46598,7 +46635,7 @@ __func__.9940:
 	.byte	0x23
 	.uleb128 0x1
 	.byte	0x9f
-	.4byte	.LVL1380
+	.4byte	.LVL1388
 	.4byte	.LFE284
 	.2byte	0x2
 	.byte	0x91
@@ -46606,41 +46643,41 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST329:
-	.4byte	.LVL1385
-	.4byte	.LVL1394
+	.4byte	.LVL1393
+	.4byte	.LVL1402
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1397
-	.4byte	.LVL1419
+	.4byte	.LVL1405
+	.4byte	.LVL1427
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
 .LLST330:
-	.4byte	.LVL1375
-	.4byte	.LVL1378
+	.4byte	.LVL1383
+	.4byte	.LVL1386
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL1380
-	.4byte	.LVL1394
+	.4byte	.LVL1388
+	.4byte	.LVL1402
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL1394
-	.4byte	.LVL1395
+	.4byte	.LVL1402
+	.4byte	.LVL1403
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1397
-	.4byte	.LVL1419
+	.4byte	.LVL1405
+	.4byte	.LVL1427
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL1421
-	.4byte	.LVL1424
+	.4byte	.LVL1429
+	.4byte	.LVL1432
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
@@ -46648,30 +46685,30 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST331:
-	.4byte	.LVL1375
-	.4byte	.LVL1378
+	.4byte	.LVL1383
+	.4byte	.LVL1386
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL1380
-	.4byte	.LVL1392
+	.4byte	.LVL1388
+	.4byte	.LVL1400
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL1397
-	.4byte	.LVL1411
+	.4byte	.LVL1405
+	.4byte	.LVL1419
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL1411
-	.4byte	.LVL1413
+	.4byte	.LVL1419
+	.4byte	.LVL1421
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1421
-	.4byte	.LVL1424
+	.4byte	.LVL1429
+	.4byte	.LVL1432
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
@@ -46679,25 +46716,25 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST332:
-	.4byte	.LVL1302
-	.4byte	.LVL1303
+	.4byte	.LVL1310
+	.4byte	.LVL1311
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1303
 	.4byte	.LVL1311
+	.4byte	.LVL1319
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
-	.4byte	.LVL1323
-	.4byte	.LVL1381
+	.4byte	.LVL1331
+	.4byte	.LVL1389
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
-	.4byte	.LVL1381
-	.4byte	.LVL1382
+	.4byte	.LVL1389
+	.4byte	.LVL1390
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1382
+	.4byte	.LVL1390
 	.4byte	.LFE284
 	.2byte	0x2
 	.byte	0x7d
@@ -46705,98 +46742,98 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST333:
-	.4byte	.LVL1287
-	.4byte	.LVL1290
+	.4byte	.LVL1295
+	.4byte	.LVL1298
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL1292
-	.4byte	.LVL1304
+	.4byte	.LVL1300
+	.4byte	.LVL1312
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL1311
-	.4byte	.LVL1323
+	.4byte	.LVL1319
+	.4byte	.LVL1331
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL1335
-	.4byte	.LVL1350
+	.4byte	.LVL1343
+	.4byte	.LVL1358
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1363
-	.4byte	.LVL1368
+	.4byte	.LVL1371
+	.4byte	.LVL1376
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
 .LLST334:
-	.4byte	.LVL1325
-	.4byte	.LVL1326
+	.4byte	.LVL1333
+	.4byte	.LVL1334
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1326
-	.4byte	.LVL1328
+	.4byte	.LVL1334
+	.4byte	.LVL1336
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -72
-	.4byte	.LVL1364
-	.4byte	.LVL1365
+	.4byte	.LVL1372
+	.4byte	.LVL1373
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1365
-	.4byte	.LVL1366
+	.4byte	.LVL1373
+	.4byte	.LVL1374
 	.2byte	0x2
 	.byte	0x73
 	.sleb128 12
-	.4byte	.LVL1366
-	.4byte	.LVL1367
+	.4byte	.LVL1374
+	.4byte	.LVL1375
 	.2byte	0x2
 	.byte	0x73
 	.sleb128 -8
-	.4byte	.LVL1376
-	.4byte	.LVL1377
+	.4byte	.LVL1384
+	.4byte	.LVL1385
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1380
-	.4byte	.LVL1386
+	.4byte	.LVL1388
+	.4byte	.LVL1394
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1389
-	.4byte	.LVL1392
+	.4byte	.LVL1397
+	.4byte	.LVL1400
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1399
-	.4byte	.LVL1402
+	.4byte	.LVL1407
+	.4byte	.LVL1410
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1402
-	.4byte	.LVL1403-1
+	.4byte	.LVL1410
+	.4byte	.LVL1411-1
 	.2byte	0x2
 	.byte	0x73
 	.sleb128 12
-	.4byte	.LVL1403-1
-	.4byte	.LVL1409
+	.4byte	.LVL1411-1
+	.4byte	.LVL1417
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1414
-	.4byte	.LVL1419
+	.4byte	.LVL1422
+	.4byte	.LVL1427
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
 .LLST335:
-	.4byte	.LVL1334
-	.4byte	.LVL1350
+	.4byte	.LVL1342
+	.4byte	.LVL1358
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL1363
-	.4byte	.LVL1368
+	.4byte	.LVL1371
+	.4byte	.LVL1376
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
@@ -46804,8 +46841,8 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST336:
-	.4byte	.LVL1334
-	.4byte	.LVL1338
+	.4byte	.LVL1342
+	.4byte	.LVL1346
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
@@ -46813,59 +46850,59 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST337:
-	.4byte	.LVL1390
-	.4byte	.LVL1391
+	.4byte	.LVL1398
+	.4byte	.LVL1399
 	.2byte	0x2
 	.byte	0x77
 	.sleb128 4
-	.4byte	.LVL1399
-	.4byte	.LVL1400-1
+	.4byte	.LVL1407
+	.4byte	.LVL1408-1
 	.2byte	0x2
 	.byte	0x77
 	.sleb128 4
 	.4byte	0
 	.4byte	0
 .LLST338:
-	.4byte	.LVL1404
-	.4byte	.LVL1407
+	.4byte	.LVL1412
+	.4byte	.LVL1415
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1407
-	.4byte	.LVL1408
+	.4byte	.LVL1415
+	.4byte	.LVL1416
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
 .LLST339:
-	.4byte	.LVL1412
-	.4byte	.LVL1419
+	.4byte	.LVL1420
+	.4byte	.LVL1427
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
 	.4byte	0
 	.4byte	0
 .LLST340:
-	.4byte	.LVL1415
-	.4byte	.LVL1416-1
+	.4byte	.LVL1423
+	.4byte	.LVL1424-1
 	.2byte	0x2
 	.byte	0x75
 	.sleb128 4
-	.4byte	.LVL1416-1
-	.4byte	.LVL1417
+	.4byte	.LVL1424-1
+	.4byte	.LVL1425
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
 .LLST233:
-	.4byte	.LVL891
-	.4byte	.LVL892
+	.4byte	.LVL899
+	.4byte	.LVL900
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL892
-	.4byte	.LVL908
+	.4byte	.LVL900
+	.4byte	.LVL916
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL908
+	.4byte	.LVL916
 	.4byte	.LFE283
 	.2byte	0x4
 	.byte	0xf3
@@ -46875,78 +46912,78 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST234:
-	.4byte	.LVL891
-	.4byte	.LVL893-1
+	.4byte	.LVL899
+	.4byte	.LVL901-1
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
 .LLST235:
-	.4byte	.LVL894
-	.4byte	.LVL895
+	.4byte	.LVL902
+	.4byte	.LVL903
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
 .LLST236:
-	.4byte	.LVL897
-	.4byte	.LVL899-1
+	.4byte	.LVL905
+	.4byte	.LVL907-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL903
-	.4byte	.LVL905
+	.4byte	.LVL911
+	.4byte	.LVL913
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL905
-	.4byte	.LVL906
+	.4byte	.LVL913
+	.4byte	.LVL914
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
 .LLST237:
-	.4byte	.LVL897
-	.4byte	.LVL902
+	.4byte	.LVL905
+	.4byte	.LVL910
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL903
-	.4byte	.LVL904
+	.4byte	.LVL911
+	.4byte	.LVL912
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
 .LLST238:
-	.4byte	.LVL896
-	.4byte	.LVL898
+	.4byte	.LVL904
+	.4byte	.LVL906
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL898
-	.4byte	.LVL899-1
+	.4byte	.LVL906
+	.4byte	.LVL907-1
 	.2byte	0x5
 	.byte	0x3
 	.4byte	g_num_free_superblocks
-	.4byte	.LVL903
-	.4byte	.LVL906
+	.4byte	.LVL911
+	.4byte	.LVL914
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST90:
-	.4byte	.LVL253
-	.4byte	.LVL256
+.LLST81:
+	.4byte	.LVL241
+	.4byte	.LVL244
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL256
-	.4byte	.LVL258
+	.4byte	.LVL244
+	.4byte	.LVL246
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL258
-	.4byte	.LVL261
+	.4byte	.LVL246
+	.4byte	.LVL249
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL261
+	.4byte	.LVL249
 	.4byte	.LFE282
 	.2byte	0x4
 	.byte	0xf3
@@ -46955,12 +46992,12 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST91:
-	.4byte	.LVL253
-	.4byte	.LVL255
+.LLST82:
+	.4byte	.LVL241
+	.4byte	.LVL243
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL255
+	.4byte	.LVL243
 	.4byte	.LFE282
 	.2byte	0x4
 	.byte	0xf3
@@ -46969,171 +47006,171 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST92:
-	.4byte	.LVL254
-	.4byte	.LVL257
+.LLST83:
+	.4byte	.LVL242
+	.4byte	.LVL245
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL257
-	.4byte	.LVL258
+	.4byte	.LVL245
+	.4byte	.LVL246
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL258
-	.4byte	.LVL259
+	.4byte	.LVL246
+	.4byte	.LVL247
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL260
-	.4byte	.LVL261
+	.4byte	.LVL248
+	.4byte	.LVL249
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL261
-	.4byte	.LVL262
+	.4byte	.LVL249
+	.4byte	.LVL250
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
 .LLST259:
-	.4byte	.LVL1037
-	.4byte	.LVL1038
+	.4byte	.LVL1045
+	.4byte	.LVL1046
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
 .LLST251:
-	.4byte	.LVL994
-	.4byte	.LVL997
+	.4byte	.LVL1002
+	.4byte	.LVL1005
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL997
+	.4byte	.LVL1005
 	.4byte	.LFE278
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
 .LLST252:
-	.4byte	.LVL1002
-	.4byte	.LVL1004-1
+	.4byte	.LVL1010
+	.4byte	.LVL1012-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1004-1
-	.4byte	.LVL1007
+	.4byte	.LVL1012-1
+	.4byte	.LVL1015
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -52
-	.4byte	.LVL1019
-	.4byte	.LVL1020
+	.4byte	.LVL1027
+	.4byte	.LVL1028
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1020
-	.4byte	.LVL1029
+	.4byte	.LVL1028
+	.4byte	.LVL1037
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1029
-	.4byte	.LVL1030
+	.4byte	.LVL1037
+	.4byte	.LVL1038
 	.2byte	0x3
 	.byte	0x76
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1031
+	.4byte	.LVL1039
 	.4byte	.LFE278
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
 .LLST253:
-	.4byte	.LVL1006
-	.4byte	.LVL1007
+	.4byte	.LVL1014
+	.4byte	.LVL1015
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1008
-	.4byte	.LVL1009
+	.4byte	.LVL1016
+	.4byte	.LVL1017
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1014
-	.4byte	.LVL1015
+	.4byte	.LVL1022
+	.4byte	.LVL1023
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1015
-	.4byte	.LVL1017
+	.4byte	.LVL1023
+	.4byte	.LVL1025
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1017
-	.4byte	.LVL1018
+	.4byte	.LVL1025
+	.4byte	.LVL1026
 	.2byte	0x3
 	.byte	0x76
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1022
-	.4byte	.LVL1023
+	.4byte	.LVL1030
+	.4byte	.LVL1031
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1023
-	.4byte	.LVL1024
+	.4byte	.LVL1031
+	.4byte	.LVL1032
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1026
-	.4byte	.LVL1027
+	.4byte	.LVL1034
+	.4byte	.LVL1035
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1028
-	.4byte	.LVL1032
+	.4byte	.LVL1036
+	.4byte	.LVL1040
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1032
-	.4byte	.LVL1033
+	.4byte	.LVL1040
+	.4byte	.LVL1041
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
 .LLST254:
-	.4byte	.LVL1005
-	.4byte	.LVL1009
+	.4byte	.LVL1013
+	.4byte	.LVL1017
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL1014
-	.4byte	.LVL1019
+	.4byte	.LVL1022
+	.4byte	.LVL1027
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
 .LLST255:
-	.4byte	.LVL1032
-	.4byte	.LVL1034
+	.4byte	.LVL1040
+	.4byte	.LVL1042
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1034
+	.4byte	.LVL1042
 	.4byte	.LFE278
 	.2byte	0x1
 	.byte	0x5e
 	.4byte	0
 	.4byte	0
 .LLST256:
-	.4byte	.LVL996
-	.4byte	.LVL1005
+	.4byte	.LVL1004
+	.4byte	.LVL1013
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL1019
+	.4byte	.LVL1027
 	.4byte	.LFE278
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
 .LLST257:
-	.4byte	.LVL996
-	.4byte	.LVL997
+	.4byte	.LVL1004
+	.4byte	.LVL1005
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 16
-	.4byte	.LVL997
-	.4byte	.LVL999-1
+	.4byte	.LVL1005
+	.4byte	.LVL1007-1
 	.2byte	0x2
 	.byte	0x74
 	.sleb128 16
-	.4byte	.LVL999-1
+	.4byte	.LVL1007-1
 	.4byte	.LFE278
 	.2byte	0x2
 	.byte	0x91
@@ -47141,39 +47178,39 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST258:
-	.4byte	.LVL998
-	.4byte	.LVL1003
+	.4byte	.LVL1006
+	.4byte	.LVL1011
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -52
-	.4byte	.LVL1019
+	.4byte	.LVL1027
 	.4byte	.LFE278
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -52
 	.4byte	0
 	.4byte	0
-.LLST448:
-	.4byte	.LVL1968
-	.4byte	.LVL1971
+.LLST447:
+	.4byte	.LVL1956
+	.4byte	.LVL1959
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1981
-	.4byte	.LVL1983
+	.4byte	.LVL1969
+	.4byte	.LVL1971
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1984
+	.4byte	.LVL1972
 	.4byte	.LFE277
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST89:
-	.4byte	.LVL251
-	.4byte	.LVL252
+.LLST80:
+	.4byte	.LVL239
+	.4byte	.LVL240
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL252
+	.4byte	.LVL240
 	.4byte	.LFE276
 	.2byte	0x4
 	.byte	0xf3
@@ -47183,242 +47220,242 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST245:
-	.4byte	.LVL943
-	.4byte	.LVL947
+	.4byte	.LVL951
+	.4byte	.LVL955
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL947
-	.4byte	.LVL948
+	.4byte	.LVL955
+	.4byte	.LVL956
 	.2byte	0x3
 	.byte	0x75
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL948
-	.4byte	.LVL949
+	.4byte	.LVL956
+	.4byte	.LVL957
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL951
-	.4byte	.LVL952
+	.4byte	.LVL959
+	.4byte	.LVL960
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL952
 	.4byte	.LVL960
+	.4byte	.LVL969
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL960
-	.4byte	.LVL961
+	.4byte	.LVL969
+	.4byte	.LVL970
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL962
-	.4byte	.LVL983
+	.4byte	.LVL971
+	.4byte	.LVL991
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
 .LLST246:
-	.4byte	.LVL945
-	.4byte	.LVL948
+	.4byte	.LVL953
+	.4byte	.LVL956
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -44
-	.4byte	.LVL953
-	.4byte	.LVL983
+	.4byte	.LVL961
+	.4byte	.LVL991
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
 .LLST247:
-	.4byte	.LVL943
-	.4byte	.LVL983
+	.4byte	.LVL951
+	.4byte	.LVL991
 	.2byte	0x1
 	.byte	0x5b
 	.4byte	0
 	.4byte	0
 .LLST248:
-	.4byte	.LVL966
-	.4byte	.LVL967
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL968
-	.4byte	.LVL969
+	.4byte	.LVL974
+	.4byte	.LVL975
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL975
 	.4byte	.LVL976
+	.4byte	.LVL977
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL977
-	.4byte	.LVL978
+	.4byte	.LVL983
+	.4byte	.LVL984
 	.2byte	0x1
 	.byte	0x51
+	.4byte	.LVL985
 	.4byte	.LVL986
-	.4byte	.LVL990
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL991
-	.4byte	.LVL992
+	.4byte	.LVL994
+	.4byte	.LVL998
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL999
+	.4byte	.LVL1000
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL992
+	.4byte	.LVL1000
 	.4byte	.LFE273
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
 .LLST249:
-	.4byte	.LVL954
-	.4byte	.LVL956
+	.4byte	.LVL962
+	.4byte	.LVL964
 	.2byte	0x5
 	.byte	0x40
 	.byte	0x7a
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL957
-	.4byte	.LVL958
+	.4byte	.LVL966
+	.4byte	.LVL967
 	.2byte	0x5
 	.byte	0x40
 	.byte	0x7a
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL958
-	.4byte	.LVL959
+	.4byte	.LVL967
+	.4byte	.LVL968
 	.2byte	0x5
 	.byte	0x41
 	.byte	0x7a
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL965
-	.4byte	.LVL970
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL971
-	.4byte	.LVL972
+	.4byte	.LVL973
+	.4byte	.LVL978
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL974
 	.4byte	.LVL979
-	.2byte	0x1
-	.byte	0x53
 	.4byte	.LVL980
-	.4byte	.LVL981
 	.2byte	0x1
 	.byte	0x53
+	.4byte	.LVL982
 	.4byte	.LVL987
-	.4byte	.LVL988
 	.2byte	0x1
 	.byte	0x53
+	.4byte	.LVL988
 	.4byte	.LVL989
-	.4byte	.LVL990
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL992
+	.4byte	.LVL995
+	.4byte	.LVL996
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL997
+	.4byte	.LVL998
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1000
 	.4byte	.LFE273
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
 .LLST250:
-	.4byte	.LVL953
-	.4byte	.LVL983
+	.4byte	.LVL961
+	.4byte	.LVL991
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST370:
-	.4byte	.LVL1559
+.LLST369:
 	.4byte	.LVL1566
+	.4byte	.LVL1573
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL1568
-	.4byte	.LVL1570
+	.4byte	.LVL1575
+	.4byte	.LVL1577
 	.2byte	0x1
 	.byte	0x5b
 	.4byte	0
 	.4byte	0
-.LLST371:
-	.4byte	.LVL1560
-	.4byte	.LVL1576
+.LLST370:
+	.4byte	.LVL1567
+	.4byte	.LVL1583
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST372:
-	.4byte	.LVL1559
+.LLST371:
 	.4byte	.LVL1566
+	.4byte	.LVL1573
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1566
-	.4byte	.LVL1572
+	.4byte	.LVL1573
+	.4byte	.LVL1579
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1573
-	.4byte	.LVL1576
+	.4byte	.LVL1580
+	.4byte	.LVL1583
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
 .LLST241:
-	.4byte	.LVL927
-	.4byte	.LVL929
+	.4byte	.LVL935
+	.4byte	.LVL937
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL929
-	.4byte	.LVL932
+	.4byte	.LVL937
+	.4byte	.LVL940
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL932
-	.4byte	.LVL933-1
+	.4byte	.LVL940
+	.4byte	.LVL941-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL933-1
-	.4byte	.LVL933
+	.4byte	.LVL941-1
+	.4byte	.LVL941
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL933
-	.4byte	.LVL936
+	.4byte	.LVL941
+	.4byte	.LVL944
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL936
+	.4byte	.LVL944
 	.4byte	.LFE270
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
 .LLST242:
-	.4byte	.LVL928
-	.4byte	.LVL930
+	.4byte	.LVL936
+	.4byte	.LVL938
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL930
-	.4byte	.LVL931-1
+	.4byte	.LVL938
+	.4byte	.LVL939-1
 	.2byte	0x5
 	.byte	0x3
 	.4byte	req_sys+4
-	.4byte	.LVL933
-	.4byte	.LVL934
+	.4byte	.LVL941
+	.4byte	.LVL942
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL934
-	.4byte	.LVL935-1
+	.4byte	.LVL942
+	.4byte	.LVL943-1
 	.2byte	0x5
 	.byte	0x3
 	.4byte	req_sys+4
 	.4byte	0
 	.4byte	0
 .LLST243:
-	.4byte	.LVL927
-	.4byte	.LVL929
+	.4byte	.LVL935
+	.4byte	.LVL937
 	.2byte	0x7
 	.byte	0x70
 	.sleb128 6
@@ -47427,8 +47464,8 @@ __func__.9940:
 	.byte	0x31
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL929
-	.4byte	.LVL931-1
+	.4byte	.LVL937
+	.4byte	.LVL939-1
 	.2byte	0x7
 	.byte	0x76
 	.sleb128 6
@@ -47437,8 +47474,8 @@ __func__.9940:
 	.byte	0x31
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL933
-	.4byte	.LVL935-1
+	.4byte	.LVL941
+	.4byte	.LVL943-1
 	.2byte	0x7
 	.byte	0x76
 	.sleb128 6
@@ -47447,7 +47484,7 @@ __func__.9940:
 	.byte	0x31
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL936
+	.4byte	.LVL944
 	.4byte	.LFE270
 	.2byte	0x7
 	.byte	0x70
@@ -47460,34 +47497,34 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST244:
-	.4byte	.LVL927
-	.4byte	.LVL929
+	.4byte	.LVL935
+	.4byte	.LVL937
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 24
-	.4byte	.LVL929
-	.4byte	.LVL931-1
+	.4byte	.LVL937
+	.4byte	.LVL939-1
 	.2byte	0x2
 	.byte	0x76
 	.sleb128 24
-	.4byte	.LVL933
-	.4byte	.LVL935-1
+	.4byte	.LVL941
+	.4byte	.LVL943-1
 	.2byte	0x2
 	.byte	0x76
 	.sleb128 24
-	.4byte	.LVL936
+	.4byte	.LVL944
 	.4byte	.LFE270
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 24
 	.4byte	0
 	.4byte	0
-.LLST360:
-	.4byte	.LVL1528
-	.4byte	.LVL1531
+.LLST359:
+	.4byte	.LVL1535
+	.4byte	.LVL1538
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1531
+	.4byte	.LVL1538
 	.4byte	.LFE268
 	.2byte	0x4
 	.byte	0xf3
@@ -47496,125 +47533,125 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST361:
-	.4byte	.LVL1528
-	.4byte	.LVL1529
+.LLST360:
+	.4byte	.LVL1535
+	.4byte	.LVL1536
 	.2byte	0x3
 	.byte	0x8
 	.byte	0x20
 	.byte	0x9f
-	.4byte	.LVL1529
-	.4byte	.LVL1530
+	.4byte	.LVL1536
+	.4byte	.LVL1537
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.4byte	.LVL1530
-	.4byte	.LVL1532
+	.4byte	.LVL1537
+	.4byte	.LVL1539
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST362:
-	.4byte	.LVL1535
-	.4byte	.LVL1537
+.LLST361:
+	.4byte	.LVL1542
+	.4byte	.LVL1544
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1537
-	.4byte	.LVL1552
+	.4byte	.LVL1544
+	.4byte	.LVL1559
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1552
+	.4byte	.LVL1559
 	.4byte	.LFE267
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST363:
-	.4byte	.LVL1535
-	.4byte	.LVL1537
+.LLST362:
+	.4byte	.LVL1542
+	.4byte	.LVL1544
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1537
-	.4byte	.LVL1552
+	.4byte	.LVL1544
+	.4byte	.LVL1559
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1552
+	.4byte	.LVL1559
 	.4byte	.LFE267
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST364:
-	.4byte	.LVL1535
-	.4byte	.LVL1536
+.LLST363:
+	.4byte	.LVL1542
+	.4byte	.LVL1543
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1536
+	.4byte	.LVL1543
 	.4byte	.LFE267
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST365:
-	.4byte	.LVL1542
-	.4byte	.LVL1552
+.LLST364:
+	.4byte	.LVL1549
+	.4byte	.LVL1559
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST366:
-	.4byte	.LVL1542
-	.4byte	.LVL1552
+.LLST365:
+	.4byte	.LVL1549
+	.4byte	.LVL1559
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -128
 	.4byte	0
 	.4byte	0
-.LLST367:
-	.4byte	.LVL1540
-	.4byte	.LVL1541-1
+.LLST366:
+	.4byte	.LVL1547
+	.4byte	.LVL1548-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1541-1
-	.4byte	.LVL1550
+	.4byte	.LVL1548-1
+	.4byte	.LVL1557
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -124
-	.4byte	.LVL1550
-	.4byte	.LVL1551-1
+	.4byte	.LVL1557
+	.4byte	.LVL1558-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1551-1
-	.4byte	.LVL1552
+	.4byte	.LVL1558-1
+	.4byte	.LVL1559
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -124
 	.4byte	0
 	.4byte	0
-.LLST368:
-	.4byte	.LVL1535
-	.4byte	.LVL1537
+.LLST367:
+	.4byte	.LVL1542
+	.4byte	.LVL1544
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1537
-	.4byte	.LVL1538
+	.4byte	.LVL1544
+	.4byte	.LVL1545
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1539
-	.4byte	.LVL1552
+	.4byte	.LVL1546
+	.4byte	.LVL1559
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1552
+	.4byte	.LVL1559
 	.4byte	.LFE267
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST369:
-	.4byte	.LVL1535
-	.4byte	.LVL1537
+.LLST368:
+	.4byte	.LVL1542
+	.4byte	.LVL1544
 	.2byte	0xf
 	.byte	0x70
 	.sleb128 0
@@ -47627,7 +47664,7 @@ __func__.9940:
 	.byte	0x1a
 	.byte	0x25
 	.byte	0x9f
-	.4byte	.LVL1552
+	.4byte	.LVL1559
 	.4byte	.LFE267
 	.2byte	0xf
 	.byte	0x70
@@ -47643,135 +47680,135 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST352:
-	.4byte	.LVL1504
-	.4byte	.LVL1506
+.LLST351:
+	.4byte	.LVL1511
+	.4byte	.LVL1513
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1506
-	.4byte	.LVL1517
+	.4byte	.LVL1513
+	.4byte	.LVL1524
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1521
-	.4byte	.LVL1526
+	.4byte	.LVL1528
+	.4byte	.LVL1533
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1526
+	.4byte	.LVL1533
 	.4byte	.LFE266
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST353:
-	.4byte	.LVL1504
-	.4byte	.LVL1506
+.LLST352:
+	.4byte	.LVL1511
+	.4byte	.LVL1513
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1506
-	.4byte	.LVL1516
+	.4byte	.LVL1513
+	.4byte	.LVL1523
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1521
-	.4byte	.LVL1526
+	.4byte	.LVL1528
+	.4byte	.LVL1533
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1526
+	.4byte	.LVL1533
 	.4byte	.LFE266
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST354:
-	.4byte	.LVL1504
-	.4byte	.LVL1505
+.LLST353:
+	.4byte	.LVL1511
+	.4byte	.LVL1512
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1505
-	.4byte	.LVL1508
+	.4byte	.LVL1512
+	.4byte	.LVL1515
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
-	.4byte	.LVL1508
-	.4byte	.LVL1509
+	.4byte	.LVL1515
+	.4byte	.LVL1516
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -136
-	.4byte	.LVL1509
-	.4byte	.LVL1522
+	.4byte	.LVL1516
+	.4byte	.LVL1529
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
-	.4byte	.LVL1522
-	.4byte	.LVL1523
+	.4byte	.LVL1529
+	.4byte	.LVL1530
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1523
+	.4byte	.LVL1530
 	.4byte	.LFE266
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
 	.4byte	0
 	.4byte	0
-.LLST355:
-	.4byte	.LVL1513
-	.4byte	.LVL1526
+.LLST354:
+	.4byte	.LVL1520
+	.4byte	.LVL1533
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST356:
-	.4byte	.LVL1512
-	.4byte	.LVL1526
+.LLST355:
+	.4byte	.LVL1519
+	.4byte	.LVL1533
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -132
 	.4byte	0
 	.4byte	0
-.LLST357:
-	.4byte	.LVL1510
-	.4byte	.LVL1511-1
+.LLST356:
+	.4byte	.LVL1517
+	.4byte	.LVL1518-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1511-1
-	.4byte	.LVL1523
+	.4byte	.LVL1518-1
+	.4byte	.LVL1530
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -124
-	.4byte	.LVL1523
-	.4byte	.LVL1524
+	.4byte	.LVL1530
+	.4byte	.LVL1531
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1524
-	.4byte	.LVL1526
+	.4byte	.LVL1531
+	.4byte	.LVL1533
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -124
 	.4byte	0
 	.4byte	0
-.LLST358:
-	.4byte	.LVL1504
-	.4byte	.LVL1506
+.LLST357:
+	.4byte	.LVL1511
+	.4byte	.LVL1513
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1506
-	.4byte	.LVL1507
+	.4byte	.LVL1513
+	.4byte	.LVL1514
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL1509
-	.4byte	.LVL1526
+	.4byte	.LVL1516
+	.4byte	.LVL1533
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL1526
+	.4byte	.LVL1533
 	.4byte	.LFE266
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST359:
-	.4byte	.LVL1504
-	.4byte	.LVL1506
+.LLST358:
+	.4byte	.LVL1511
+	.4byte	.LVL1513
 	.2byte	0xf
 	.byte	0x70
 	.sleb128 0
@@ -47784,29 +47821,29 @@ __func__.9940:
 	.byte	0x1a
 	.byte	0x25
 	.byte	0x9f
-	.4byte	.LVL1506
-	.4byte	.LVL1507
+	.4byte	.LVL1513
+	.4byte	.LVL1514
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1509
-	.4byte	.LVL1519
+	.4byte	.LVL1516
+	.4byte	.LVL1526
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1519
-	.4byte	.LVL1520-1
+	.4byte	.LVL1526
+	.4byte	.LVL1527-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1520-1
-	.4byte	.LVL1521
+	.4byte	.LVL1527-1
+	.4byte	.LVL1528
 	.2byte	0x3
 	.byte	0x76
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL1521
-	.4byte	.LVL1526
+	.4byte	.LVL1528
+	.4byte	.LVL1533
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1526
+	.4byte	.LVL1533
 	.4byte	.LFE266
 	.2byte	0xf
 	.byte	0x70
@@ -47823,11 +47860,11 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST229:
-	.4byte	.LVL874
-	.4byte	.LVL879
+	.4byte	.LVL882
+	.4byte	.LVL887
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL879
+	.4byte	.LVL887
 	.4byte	.LFE265
 	.2byte	0x4
 	.byte	0xf3
@@ -47837,129 +47874,129 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST230:
-	.4byte	.LVL874
-	.4byte	.LVL878
+	.4byte	.LVL882
+	.4byte	.LVL886
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL878
+	.4byte	.LVL886
 	.4byte	.LFE265
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
 .LLST231:
-	.4byte	.LVL874
-	.4byte	.LVL877
+	.4byte	.LVL882
+	.4byte	.LVL885
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL877
+	.4byte	.LVL885
 	.4byte	.LFE265
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
 .LLST232:
-	.4byte	.LVL880
-	.4byte	.LVL881
+	.4byte	.LVL888
+	.4byte	.LVL889
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL882
-	.4byte	.LVL884
+	.4byte	.LVL890
+	.4byte	.LVL892
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL884
-	.4byte	.LVL885-1
+	.4byte	.LVL892
+	.4byte	.LVL893-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL887
-	.4byte	.LVL889
+	.4byte	.LVL895
+	.4byte	.LVL897
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL890
+	.4byte	.LVL898
 	.4byte	.LFE265
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
 .LLST314:
-	.4byte	.LVL1282
-	.4byte	.LVL1283
+	.4byte	.LVL1290
+	.4byte	.LVL1291
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1283
-	.4byte	.LVL1284
+	.4byte	.LVL1291
+	.4byte	.LVL1292
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1284
-	.4byte	.LVL1285-1
+	.4byte	.LVL1292
+	.4byte	.LVL1293-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1285-1
-	.4byte	.LVL1285
+	.4byte	.LVL1293-1
+	.4byte	.LVL1293
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1285
-	.4byte	.LVL1286
+	.4byte	.LVL1293
+	.4byte	.LVL1294
 	.2byte	0x3
 	.byte	0x74
 	.sleb128 1
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST83:
-	.4byte	.LVL224
-	.4byte	.LVL225
+.LLST74:
+	.4byte	.LVL212
+	.4byte	.LVL213
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL226
-	.4byte	.LVL227
+	.4byte	.LVL214
+	.4byte	.LVL215
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL227
-	.4byte	.LVL228
+	.4byte	.LVL215
+	.4byte	.LVL216
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL229
-	.4byte	.LVL230
+	.4byte	.LVL217
+	.4byte	.LVL218
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL231
-	.4byte	.LVL234
+	.4byte	.LVL219
+	.4byte	.LVL222
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL234
-	.4byte	.LVL235
+	.4byte	.LVL222
+	.4byte	.LVL223
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL236
-	.4byte	.LVL238
+	.4byte	.LVL224
+	.4byte	.LVL226
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL238
-	.4byte	.LVL239
+	.4byte	.LVL226
+	.4byte	.LVL227
 	.2byte	0x3
 	.byte	0x71
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL239
-	.4byte	.LVL240
+	.4byte	.LVL227
+	.4byte	.LVL228
 	.2byte	0x3
 	.byte	0x75
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL240
-	.4byte	.LVL242
+	.4byte	.LVL228
+	.4byte	.LVL230
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL242
-	.4byte	.LVL243
+	.4byte	.LVL230
+	.4byte	.LVL231
 	.2byte	0x3
 	.byte	0x71
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL243
+	.4byte	.LVL231
 	.4byte	.LFE263
 	.2byte	0x3
 	.byte	0x75
@@ -47967,50 +48004,50 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST84:
-	.4byte	.LVL231
-	.4byte	.LVL234
+.LLST75:
+	.4byte	.LVL219
+	.4byte	.LVL222
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL240
+	.4byte	.LVL228
 	.4byte	.LFE263
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST85:
-	.4byte	.LVL229
-	.4byte	.LVL230
+.LLST76:
+	.4byte	.LVL217
+	.4byte	.LVL218
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL231
-	.4byte	.LVL232
+	.4byte	.LVL219
+	.4byte	.LVL220
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL236
-	.4byte	.LVL237
+	.4byte	.LVL224
+	.4byte	.LVL225
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL238
-	.4byte	.LVL240
+	.4byte	.LVL226
+	.4byte	.LVL228
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL240
-	.4byte	.LVL241
+	.4byte	.LVL228
+	.4byte	.LVL229
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL242
+	.4byte	.LVL230
 	.4byte	.LFE263
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
 .LLST227:
-	.4byte	.LVL869
-	.4byte	.LVL870
+	.4byte	.LVL877
+	.4byte	.LVL878
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL870
+	.4byte	.LVL878
 	.4byte	.LFE262
 	.2byte	0x4
 	.byte	0xf3
@@ -48020,8 +48057,8 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST228:
-	.4byte	.LVL871
-	.4byte	.LVL872
+	.4byte	.LVL879
+	.4byte	.LVL880
 	.2byte	0x9
 	.byte	0x72
 	.sleb128 0
@@ -48031,22 +48068,22 @@ __func__.9940:
 	.2byte	0xffff
 	.byte	0x1a
 	.byte	0x9f
-	.4byte	.LVL872
-	.4byte	.LVL873-1
+	.4byte	.LVL880
+	.4byte	.LVL881-1
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
 .LLST214:
-	.4byte	.LVL833
-	.4byte	.LVL834
+	.4byte	.LVL841
+	.4byte	.LVL842
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL834
-	.4byte	.LVL846
+	.4byte	.LVL842
+	.4byte	.LVL854
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL846
+	.4byte	.LVL854
 	.4byte	.LFE261
 	.2byte	0x4
 	.byte	0xf3
@@ -48056,15 +48093,15 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST215:
-	.4byte	.LVL833
-	.4byte	.LVL834
+	.4byte	.LVL841
+	.4byte	.LVL842
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL834
-	.4byte	.LVL846
+	.4byte	.LVL842
+	.4byte	.LVL854
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL846
+	.4byte	.LVL854
 	.4byte	.LFE261
 	.2byte	0x4
 	.byte	0xf3
@@ -48074,16 +48111,16 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST216:
-	.4byte	.LVL833
-	.4byte	.LVL834
+	.4byte	.LVL841
+	.4byte	.LVL842
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL834
-	.4byte	.LVL846
+	.4byte	.LVL842
+	.4byte	.LVL854
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -36
-	.4byte	.LVL846
+	.4byte	.LVL854
 	.4byte	.LFE261
 	.2byte	0x2
 	.byte	0x7d
@@ -48091,8 +48128,8 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST217:
-	.4byte	.LVL838
 	.4byte	.LVL846
+	.4byte	.LVL854
 	.2byte	0x7
 	.byte	0x7a
 	.sleb128 0
@@ -48103,72 +48140,72 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST218:
-	.4byte	.LVL840
-	.4byte	.LVL841
+	.4byte	.LVL848
+	.4byte	.LVL849
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL841
-	.4byte	.LVL842-1
+	.4byte	.LVL849
+	.4byte	.LVL850-1
 	.2byte	0x5
 	.byte	0x3
 	.4byte	req_sys+12
 	.4byte	0
 	.4byte	0
 .LLST219:
-	.4byte	.LVL833
-	.4byte	.LVL834
+	.4byte	.LVL841
+	.4byte	.LVL842
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL834
-	.4byte	.LVL843
+	.4byte	.LVL842
+	.4byte	.LVL851
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL844
-	.4byte	.LVL846
+	.4byte	.LVL852
+	.4byte	.LVL854
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
 .LLST208:
-	.4byte	.LVL810
-	.4byte	.LVL812
+	.4byte	.LVL818
+	.4byte	.LVL820
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL812
-	.4byte	.LVL816
+	.4byte	.LVL820
+	.4byte	.LVL824
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL816
-	.4byte	.LVL818
+	.4byte	.LVL824
+	.4byte	.LVL826
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL818
+	.4byte	.LVL826
 	.4byte	.LFE260
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
 .LLST209:
-	.4byte	.LVL821
-	.4byte	.LVL822
+	.4byte	.LVL829
+	.4byte	.LVL830
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL822
-	.4byte	.LVL824
+	.4byte	.LVL830
+	.4byte	.LVL832
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL824
-	.4byte	.LVL825
+	.4byte	.LVL832
+	.4byte	.LVL833
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL828
-	.4byte	.LVL831
+	.4byte	.LVL836
+	.4byte	.LVL839
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL831
-	.4byte	.LVL832
+	.4byte	.LVL839
+	.4byte	.LVL840
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 1
@@ -48176,160 +48213,160 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST210:
-	.4byte	.LVL821
-	.4byte	.LVL822
+	.4byte	.LVL829
+	.4byte	.LVL830
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL822
-	.4byte	.LVL823
+	.4byte	.LVL830
+	.4byte	.LVL831
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL828
-	.4byte	.LVL829
+	.4byte	.LVL836
+	.4byte	.LVL837
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL830
+	.4byte	.LVL838
 	.4byte	.LFE260
 	.2byte	0x1
 	.byte	0x52
 	.4byte	0
 	.4byte	0
 .LLST211:
-	.4byte	.LVL811
-	.4byte	.LVL815
+	.4byte	.LVL819
+	.4byte	.LVL823
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL816
-	.4byte	.LVL817
+	.4byte	.LVL824
+	.4byte	.LVL825
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL817
-	.4byte	.LVL818
+	.4byte	.LVL825
+	.4byte	.LVL826
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 12
-	.4byte	.LVL818
-	.4byte	.LVL821-1
+	.4byte	.LVL826
+	.4byte	.LVL829-1
 	.2byte	0x2
 	.byte	0x74
 	.sleb128 12
 	.4byte	0
 	.4byte	0
 .LLST212:
-	.4byte	.LVL811
-	.4byte	.LVL812
+	.4byte	.LVL819
+	.4byte	.LVL820
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 24
-	.4byte	.LVL812
-	.4byte	.LVL813-1
+	.4byte	.LVL820
+	.4byte	.LVL821-1
 	.2byte	0x2
 	.byte	0x74
 	.sleb128 24
-	.4byte	.LVL816
-	.4byte	.LVL818
+	.4byte	.LVL824
+	.4byte	.LVL826
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 24
-	.4byte	.LVL818
-	.4byte	.LVL821-1
+	.4byte	.LVL826
+	.4byte	.LVL829-1
 	.2byte	0x2
 	.byte	0x74
 	.sleb128 24
 	.4byte	0
 	.4byte	0
 .LLST213:
-	.4byte	.LVL819
-	.4byte	.LVL820
+	.4byte	.LVL827
+	.4byte	.LVL828
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL820
-	.4byte	.LVL821-1
+	.4byte	.LVL828
+	.4byte	.LVL829-1
 	.2byte	0x5
 	.byte	0x3
 	.4byte	p_sys_spare_buf
 	.4byte	0
 	.4byte	0
 .LLST220:
-	.4byte	.LVL847
-	.4byte	.LVL850-1
+	.4byte	.LVL855
+	.4byte	.LVL858-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL850-1
+	.4byte	.LVL858-1
 	.4byte	.LFE259
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
 .LLST221:
-	.4byte	.LVL851
-	.4byte	.LVL857
+	.4byte	.LVL859
+	.4byte	.LVL865
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL860
+	.4byte	.LVL868
 	.4byte	.LFE259
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
 .LLST222:
-	.4byte	.LVL850
-	.4byte	.LVL852
+	.4byte	.LVL858
+	.4byte	.LVL860
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
 .LLST223:
-	.4byte	.LVL855
-	.4byte	.LVL857
+	.4byte	.LVL863
+	.4byte	.LVL865
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL860
-	.4byte	.LVL865
+	.4byte	.LVL868
+	.4byte	.LVL873
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL865
-	.4byte	.LVL866
+	.4byte	.LVL873
+	.4byte	.LVL874
 	.2byte	0x3
 	.byte	0x76
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL866
-	.4byte	.LVL867
+	.4byte	.LVL874
+	.4byte	.LVL875
 	.2byte	0x3
 	.byte	0x78
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL867
+	.4byte	.LVL875
 	.4byte	.LFE259
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
 .LLST224:
-	.4byte	.LVL848
-	.4byte	.LVL854
+	.4byte	.LVL856
+	.4byte	.LVL862
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
 .LLST225:
-	.4byte	.LVL849
-	.4byte	.LVL850-1
+	.4byte	.LVL857
+	.4byte	.LVL858-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL850-1
-	.4byte	.LVL859
+	.4byte	.LVL858-1
+	.4byte	.LVL867
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
-	.4byte	.LVL859
-	.4byte	.LVL860
+	.4byte	.LVL867
+	.4byte	.LVL868
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -40
-	.4byte	.LVL860
+	.4byte	.LVL868
 	.4byte	.LFE259
 	.2byte	0x2
 	.byte	0x7d
@@ -48337,105 +48374,105 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST226:
-	.4byte	.LVL861
-	.4byte	.LVL862
+	.4byte	.LVL869
+	.4byte	.LVL870
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -36
 	.4byte	0
 	.4byte	0
 .LLST201:
-	.4byte	.LVL786
-	.4byte	.LVL789
+	.4byte	.LVL794
+	.4byte	.LVL797
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL789
+	.4byte	.LVL797
 	.4byte	.LFE257
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
 .LLST202:
-	.4byte	.LVL788
-	.4byte	.LVL793
+	.4byte	.LVL796
+	.4byte	.LVL801
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL797
-	.4byte	.LVL804
+	.4byte	.LVL805
+	.4byte	.LVL812
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
 .LLST203:
-	.4byte	.LVL798
-	.4byte	.LVL804
+	.4byte	.LVL806
+	.4byte	.LVL812
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
 .LLST204:
-	.4byte	.LVL790
-	.4byte	.LVL791
+	.4byte	.LVL798
+	.4byte	.LVL799
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL791
-	.4byte	.LVL792
+	.4byte	.LVL799
+	.4byte	.LVL800
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL792
-	.4byte	.LVL794
+	.4byte	.LVL800
+	.4byte	.LVL802
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL797
-	.4byte	.LVL799
+	.4byte	.LVL805
+	.4byte	.LVL807
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL799
-	.4byte	.LVL800
+	.4byte	.LVL807
+	.4byte	.LVL808
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL801
-	.4byte	.LVL804
+	.4byte	.LVL809
+	.4byte	.LVL812
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
 .LLST205:
-	.4byte	.LVL792
-	.4byte	.LVL795
+	.4byte	.LVL800
+	.4byte	.LVL803
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL796
-	.4byte	.LVL797
+	.4byte	.LVL804
+	.4byte	.LVL805
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL798
-	.4byte	.LVL802
+	.4byte	.LVL806
+	.4byte	.LVL810
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL802
-	.4byte	.LVL803
+	.4byte	.LVL810
+	.4byte	.LVL811
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL804
-	.4byte	.LVL806
+	.4byte	.LVL812
+	.4byte	.LVL814
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL806
-	.4byte	.LVL808
+	.4byte	.LVL814
+	.4byte	.LVL816
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL808
-	.4byte	.LVL809
+	.4byte	.LVL816
+	.4byte	.LVL817
 	.2byte	0x3
 	.byte	0x76
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL809
+	.4byte	.LVL817
 	.4byte	.LFE257
 	.2byte	0x3
 	.byte	0x77
@@ -48444,39 +48481,39 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST206:
-	.4byte	.LVL792
-	.4byte	.LVL795
+	.4byte	.LVL800
+	.4byte	.LVL803
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL796
-	.4byte	.LVL797
+	.4byte	.LVL804
+	.4byte	.LVL805
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL804
-	.4byte	.LVL807-1
+	.4byte	.LVL812
+	.4byte	.LVL815-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL807-1
-	.4byte	.LVL808
+	.4byte	.LVL815-1
+	.4byte	.LVL816
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
 	.4byte	0
 	.4byte	0
 .LLST207:
-	.4byte	.LVL792
-	.4byte	.LVL795
+	.4byte	.LVL800
+	.4byte	.LVL803
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
 .LLST199:
-	.4byte	.LVL773
-	.4byte	.LVL775
+	.4byte	.LVL781
+	.4byte	.LVL783
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL775
+	.4byte	.LVL783
 	.4byte	.LFE256
 	.2byte	0x4
 	.byte	0xf3
@@ -48486,11 +48523,11 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST200:
-	.4byte	.LVL773
-	.4byte	.LVL774
+	.4byte	.LVL781
+	.4byte	.LVL782
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL774
+	.4byte	.LVL782
 	.4byte	.LFE256
 	.2byte	0x4
 	.byte	0xf3
@@ -48499,30 +48536,30 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST67:
-	.4byte	.LVL187
-	.4byte	.LVL190
+.LLST62:
+	.4byte	.LVL179
+	.4byte	.LVL182
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL191
-	.4byte	.LVL192
+	.4byte	.LVL183
+	.4byte	.LVL184
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL194
-	.4byte	.LVL196
+	.4byte	.LVL186
+	.4byte	.LVL188
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST68:
+.LLST63:
+	.4byte	.LVL179
 	.4byte	.LVL187
-	.4byte	.LVL195
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL195
-	.4byte	.LVL197
+	.4byte	.LVL187
+	.4byte	.LVL189
 	.2byte	0x8
 	.byte	0x73
 	.sleb128 0
@@ -48534,23 +48571,23 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST69:
-	.4byte	.LVL188
-	.4byte	.LVL189
+.LLST64:
+	.4byte	.LVL180
+	.4byte	.LVL181
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL193
-	.4byte	.LVL197
+	.4byte	.LVL185
+	.4byte	.LVL189
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST66:
-	.4byte	.LVL185
-	.4byte	.LVL186-1
+.LLST61:
+	.4byte	.LVL177
+	.4byte	.LVL178-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL186-1
+	.4byte	.LVL178-1
 	.4byte	.LFE253
 	.2byte	0x4
 	.byte	0xf3
@@ -48559,23 +48596,23 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST62:
-	.4byte	.LVL173
-	.4byte	.LVL178-1
+.LLST57:
+	.4byte	.LVL165
+	.4byte	.LVL170-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL178-1
-	.4byte	.LVL179
+	.4byte	.LVL170-1
+	.4byte	.LVL171
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL179
-	.4byte	.LVL184
+	.4byte	.LVL171
+	.4byte	.LVL176
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL184
+	.4byte	.LVL176
 	.4byte	.LFE252
 	.2byte	0x4
 	.byte	0xf3
@@ -48584,33 +48621,33 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST63:
-	.4byte	.LVL173
-	.4byte	.LVL177
+.LLST58:
+	.4byte	.LVL165
+	.4byte	.LVL169
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL179
-	.4byte	.LVL180
+	.4byte	.LVL171
+	.4byte	.LVL172
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL182
+	.4byte	.LVL174
 	.4byte	.LFE252
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST64:
-	.4byte	.LVL173
-	.4byte	.LVL176
+.LLST59:
+	.4byte	.LVL165
+	.4byte	.LVL168
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL176
-	.4byte	.LVL179
+	.4byte	.LVL168
+	.4byte	.LVL171
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL179
+	.4byte	.LVL171
 	.4byte	.LFE252
 	.2byte	0x3
 	.byte	0x9
@@ -48618,34 +48655,34 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST65:
-	.4byte	.LVL174
-	.4byte	.LVL175
+.LLST60:
+	.4byte	.LVL166
+	.4byte	.LVL167
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL179
-	.4byte	.LVL183
+	.4byte	.LVL171
+	.4byte	.LVL175
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST59:
-	.4byte	.LVL164
-	.4byte	.LVL167
+.LLST54:
+	.4byte	.LVL154
+	.4byte	.LVL157
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL167
+	.4byte	.LVL157
 	.4byte	.LFE251
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST60:
-	.4byte	.LVL164
-	.4byte	.LVL166
+.LLST55:
+	.4byte	.LVL154
+	.4byte	.LVL156
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL166
+	.4byte	.LVL156
 	.4byte	.LFE251
 	.2byte	0x4
 	.byte	0xf3
@@ -48654,23 +48691,55 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST61:
-	.4byte	.LVL170
-	.4byte	.LVL171
+.LLST56:
+	.4byte	.LVL160
+	.4byte	.LVL161
+	.2byte	0x10
+	.byte	0x71
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x3
+	.4byte	p_data_block_list_table
+	.byte	0x6
+	.byte	0x22
+	.byte	0x9f
+	.4byte	.LVL161
+	.4byte	.LVL162
+	.2byte	0x12
+	.byte	0x74
+	.sleb128 2
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x3
+	.4byte	p_data_block_list_table
+	.byte	0x6
+	.byte	0x22
+	.byte	0x9f
+	.4byte	.LVL163
+	.4byte	.LVL164
 	.2byte	0xc
-	.byte	0x72
+	.byte	0x73
 	.sleb128 0
 	.byte	0xa
 	.2byte	0xffff
 	.byte	0x1a
 	.byte	0x36
 	.byte	0x1e
-	.byte	0x71
+	.byte	0x70
 	.sleb128 0
 	.byte	0x22
 	.byte	0x9f
-	.4byte	.LVL171
-	.4byte	.LVL172
+	.4byte	.LVL164
+	.4byte	.LFE251
 	.2byte	0xe
 	.byte	0x74
 	.sleb128 2
@@ -48681,55 +48750,55 @@ __func__.9940:
 	.byte	0x1a
 	.byte	0x36
 	.byte	0x1e
-	.byte	0x71
+	.byte	0x70
 	.sleb128 0
 	.byte	0x22
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST53:
-	.4byte	.LVL145
-	.4byte	.LVL148
+.LLST48:
+	.4byte	.LVL135
+	.4byte	.LVL138
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL148
-	.4byte	.LVL149
+	.4byte	.LVL138
+	.4byte	.LVL139
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL149
+	.4byte	.LVL139
 	.4byte	.LFE250
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST54:
-	.4byte	.LVL146
-	.4byte	.LVL147
+.LLST49:
+	.4byte	.LVL136
+	.4byte	.LVL137
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL149
+	.4byte	.LVL139
 	.4byte	.LFE250
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST55:
-	.4byte	.LVL150
-	.4byte	.LVL151
+.LLST50:
+	.4byte	.LVL140
+	.4byte	.LVL141
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL151
+	.4byte	.LVL141
 	.4byte	.LFE250
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST56:
-	.4byte	.LVL151
-	.4byte	.LVL152
+.LLST51:
+	.4byte	.LVL141
+	.4byte	.LVL142
 	.2byte	0xb
 	.byte	0x72
 	.sleb128 0
@@ -48741,8 +48810,8 @@ __func__.9940:
 	.byte	0x7c
 	.sleb128 0
 	.byte	0x22
-	.4byte	.LVL153
-	.4byte	.LVL155
+	.4byte	.LVL143
+	.4byte	.LVL145
 	.2byte	0xb
 	.byte	0x72
 	.sleb128 0
@@ -48754,8 +48823,8 @@ __func__.9940:
 	.byte	0x7c
 	.sleb128 0
 	.byte	0x22
-	.4byte	.LVL156
-	.4byte	.LVL157
+	.4byte	.LVL146
+	.4byte	.LVL147
 	.2byte	0xb
 	.byte	0x72
 	.sleb128 0
@@ -48769,21 +48838,21 @@ __func__.9940:
 	.byte	0x22
 	.4byte	0
 	.4byte	0
-.LLST57:
-	.4byte	.LVL151
-	.4byte	.LVL153
+.LLST52:
+	.4byte	.LVL141
+	.4byte	.LVL143
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL153
-	.4byte	.LVL156
+	.4byte	.LVL143
+	.4byte	.LVL146
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL156
-	.4byte	.LVL158
+	.4byte	.LVL146
+	.4byte	.LVL148
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL158
-	.4byte	.LVL159
+	.4byte	.LVL148
+	.4byte	.LVL149
 	.2byte	0x5
 	.byte	0x74
 	.sleb128 0
@@ -48792,182 +48861,194 @@ __func__.9940:
 	.byte	0x22
 	.4byte	0
 	.4byte	0
-.LLST44:
-	.4byte	.LVL111
-	.4byte	.LVL114
+.LLST38:
+	.4byte	.LVL97
+	.4byte	.LVL101
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL114
-	.4byte	.LVL115
+	.4byte	.LVL101
+	.4byte	.LVL102
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL115
+	.4byte	.LVL102
 	.4byte	.LFE249
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST45:
-	.4byte	.LVL112
-	.4byte	.LVL113
+.LLST39:
+	.4byte	.LVL98
+	.4byte	.LVL100
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL115
-	.4byte	.LVL139
+	.4byte	.LVL102
+	.4byte	.LVL129
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL139
+	.4byte	.LVL129
 	.4byte	.LFE249
-	.2byte	0x6
+	.2byte	0x7
 	.byte	0x74
 	.sleb128 0
-	.byte	0x75
-	.sleb128 0
+	.byte	0x91
+	.sleb128 -44
+	.byte	0x6
 	.byte	0x22
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST46:
-	.4byte	.LVL117
-	.4byte	.LVL120
+.LLST40:
+	.4byte	.LVL105
+	.4byte	.LVL108
 	.2byte	0x1
 	.byte	0x5c
-	.4byte	.LVL120
-	.4byte	.LVL126
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL129
-	.4byte	.LVL134
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL135
-	.4byte	.LVL136
+	.4byte	.LVL108
+	.4byte	.LVL118
 	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL137
+	.byte	0x52
+	.4byte	.LVL119
 	.4byte	.LFE249
 	.2byte	0x1
-	.byte	0x53
+	.byte	0x52
 	.4byte	0
 	.4byte	0
-.LLST47:
-	.4byte	.LVL116
-	.4byte	.LVL118
+.LLST41:
+	.4byte	.LVL103
+	.4byte	.LVL106
 	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL118
-	.4byte	.LVL124
-	.2byte	0x7
+	.byte	0x56
+	.4byte	.LVL106
+	.4byte	.LVL116
+	.2byte	0xb
 	.byte	0x70
 	.sleb128 0
 	.byte	0x31
 	.byte	0x24
-	.byte	0x7e
-	.sleb128 0
+	.byte	0x3
+	.4byte	p_valid_page_count_table
+	.byte	0x6
 	.byte	0x22
-	.4byte	.LVL127
-	.4byte	.LVL129
+	.4byte	.LVL118
+	.4byte	.LVL119
 	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL129
-	.4byte	.LVL133
-	.2byte	0x7
+	.byte	0x56
+	.4byte	.LVL119
+	.4byte	.LVL123
+	.2byte	0xb
 	.byte	0x70
 	.sleb128 0
 	.byte	0x31
 	.byte	0x24
-	.byte	0x7e
-	.sleb128 0
+	.byte	0x3
+	.4byte	p_valid_page_count_table
+	.byte	0x6
 	.byte	0x22
-	.4byte	.LVL135
-	.4byte	.LVL138
-	.2byte	0x7
+	.4byte	.LVL125
+	.4byte	.LVL128
+	.2byte	0xb
 	.byte	0x70
 	.sleb128 0
 	.byte	0x31
 	.byte	0x24
-	.byte	0x7e
-	.sleb128 0
+	.byte	0x3
+	.4byte	p_valid_page_count_table
+	.byte	0x6
 	.byte	0x22
 	.4byte	0
 	.4byte	0
-.LLST48:
-	.4byte	.LVL121
-	.4byte	.LVL127
+.LLST42:
+	.4byte	.LVL111
+	.4byte	.LVL114
 	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL129
-	.4byte	.LFE249
+	.byte	0x55
+	.4byte	.LVL114
+	.4byte	.LVL116
+	.2byte	0x8
+	.byte	0x73
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x91
+	.sleb128 -40
+	.byte	0x6
+	.byte	0x22
+	.4byte	.LVL119
+	.4byte	.LVL122
 	.2byte	0x1
-	.byte	0x5b
+	.byte	0x55
+	.4byte	.LVL122
+	.4byte	.LVL123
+	.2byte	0x8
+	.byte	0x73
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x91
+	.sleb128 -40
+	.byte	0x6
+	.byte	0x22
+	.4byte	.LVL125
+	.4byte	.LVL126
+	.2byte	0x8
+	.byte	0x73
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x91
+	.sleb128 -40
+	.byte	0x6
+	.byte	0x22
 	.4byte	0
 	.4byte	0
-.LLST49:
-	.4byte	.LVL116
-	.4byte	.LVL117
+.LLST43:
+	.4byte	.LVL104
+	.4byte	.LVL105
 	.2byte	0xe
-	.byte	0x73
+	.byte	0x76
 	.sleb128 0
 	.byte	0xa
 	.2byte	0xffff
 	.byte	0x1a
-	.byte	0x76
+	.byte	0x73
 	.sleb128 0
 	.byte	0xa
 	.2byte	0xffff
 	.byte	0x1a
 	.byte	0x1e
 	.byte	0x9f
-	.4byte	.LVL117
-	.4byte	.LVL127
+	.4byte	.LVL105
+	.4byte	.LVL118
 	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL127
-	.4byte	.LVL128
+	.byte	0x5b
+	.4byte	.LVL118
+	.4byte	.LVL119
 	.2byte	0xe
-	.byte	0x73
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
 	.byte	0x76
 	.sleb128 0
 	.byte	0xa
 	.2byte	0xffff
 	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL128
-	.4byte	.LVL129
-	.2byte	0x10
 	.byte	0x73
 	.sleb128 0
 	.byte	0xa
 	.2byte	0xffff
 	.byte	0x1a
-	.byte	0x71
-	.sleb128 4
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
 	.byte	0x1e
 	.byte	0x9f
-	.4byte	.LVL129
+	.4byte	.LVL119
 	.4byte	.LFE249
 	.2byte	0x1
-	.byte	0x56
-	.4byte	0
+	.byte	0x5b
 	.4byte	0
-.LLST50:
-	.4byte	.LVL121
-	.4byte	.LVL122
+	.4byte	0
+.LLST44:
+	.4byte	.LVL112
+	.4byte	.LVL113
 	.2byte	0xe
-	.byte	0x7b
+	.byte	0x75
 	.sleb128 0
 	.byte	0xa
 	.2byte	0xffff
@@ -48979,14 +49060,14 @@ __func__.9940:
 	.byte	0x1a
 	.byte	0x1e
 	.byte	0x9f
-	.4byte	.LVL122
-	.4byte	.LVL123
+	.4byte	.LVL113
+	.4byte	.LVL115
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL129
-	.4byte	.LVL130
+	.4byte	.LVL119
+	.4byte	.LVL120
 	.2byte	0xe
-	.byte	0x7b
+	.byte	0x75
 	.sleb128 0
 	.byte	0xa
 	.2byte	0xffff
@@ -48998,15 +49079,15 @@ __func__.9940:
 	.byte	0x1a
 	.byte	0x1e
 	.byte	0x9f
-	.4byte	.LVL130
-	.4byte	.LVL131
+	.4byte	.LVL120
+	.4byte	.LVL121
 	.2byte	0x10
-	.byte	0x7b
+	.byte	0x75
 	.sleb128 0
 	.byte	0xa
 	.2byte	0xffff
 	.byte	0x1a
-	.byte	0x73
+	.byte	0x72
 	.sleb128 4
 	.byte	0x94
 	.byte	0x2
@@ -49015,35 +49096,40 @@ __func__.9940:
 	.byte	0x1a
 	.byte	0x1e
 	.byte	0x9f
-	.4byte	.LVL131
-	.4byte	.LVL132
+	.4byte	.LVL121
+	.4byte	.LVL122
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST51:
-	.4byte	.LVL119
-	.4byte	.LVL125
+.LLST45:
+	.4byte	.LVL107
+	.4byte	.LVL117
 	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL125
-	.4byte	.LVL127
+	.byte	0x53
+	.4byte	.LVL117
+	.4byte	.LVL118
 	.2byte	0x5
 	.byte	0x74
 	.sleb128 0
 	.byte	0x75
 	.sleb128 0
 	.byte	0x22
-	.4byte	.LVL129
-	.4byte	.LVL135
+	.4byte	.LVL119
+	.4byte	.LVL124
 	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL135
-	.4byte	.LVL138
+	.byte	0x53
+	.4byte	.LVL124
+	.4byte	.LVL125
+	.2byte	0x2
+	.byte	0x71
+	.sleb128 2
+	.4byte	.LVL125
+	.4byte	.LVL128
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL138
-	.4byte	.LVL140
+	.4byte	.LVL128
+	.4byte	.LVL130
 	.2byte	0x5
 	.byte	0x74
 	.sleb128 0
@@ -49052,55 +49138,81 @@ __func__.9940:
 	.byte	0x22
 	.4byte	0
 	.4byte	0
-.LLST42:
-	.4byte	.LVL106
+.LLST46:
+	.4byte	.LVL97
+	.4byte	.LVL99
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL102
 	.4byte	.LVL108
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
+	.2byte	0x2
+	.byte	0x30
 	.byte	0x9f
 	.4byte	.LVL108
 	.4byte	.LVL109
 	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL109
+	.byte	0x56
 	.4byte	.LVL110
+	.4byte	.LVL118
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL118
+	.4byte	.LVL119
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL119
+	.4byte	.LFE249
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST185:
+	.4byte	.LVL687
+	.4byte	.LVL688
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL110
+	.4byte	.LVL689
+	.4byte	.LVL693
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL695
 	.4byte	.LFE246
 	.2byte	0x1
-	.byte	0x50
+	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST43:
-	.4byte	.LVL107
-	.4byte	.LVL109
-	.2byte	0x6
-	.byte	0x3
-	.4byte	gSysFreeQueue
-	.byte	0x9f
+.LLST186:
+	.4byte	.LVL691
+	.4byte	.LVL693
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL695
+	.4byte	.LFE246
+	.2byte	0x1
+	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST39:
-	.4byte	.LVL99
-	.4byte	.LVL102
+.LLST35:
+	.4byte	.LVL90
+	.4byte	.LVL93
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL102
-	.4byte	.LVL103
+	.4byte	.LVL93
+	.4byte	.LVL94
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL103
-	.4byte	.LVL105
+	.4byte	.LVL94
+	.4byte	.LVL96
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL105
+	.4byte	.LVL96
 	.4byte	.LFE245
 	.2byte	0x4
 	.byte	0xf3
@@ -49109,156 +49221,77 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST40:
-	.4byte	.LVL99
-	.4byte	.LVL105
+.LLST36:
+	.4byte	.LVL90
+	.4byte	.LVL96
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL105
+	.4byte	.LVL96
 	.4byte	.LFE245
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST41:
-	.4byte	.LVL100
-	.4byte	.LVL101
+.LLST37:
+	.4byte	.LVL91
+	.4byte	.LVL92
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL103
+	.4byte	.LVL94
 	.4byte	.LFE245
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
 .LLST33:
-	.4byte	.LVL81
 	.4byte	.LVL82
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
 	.4byte	.LVL83
-	.4byte	.LVL84
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL86
-	.4byte	.LVL91
 	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL95
-	.4byte	.LFE244
+	.byte	0x56
+	.4byte	.LVL83
+	.4byte	.LVL84
 	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST34:
+	.byte	0x50
+	.4byte	.LVL85
 	.4byte	.LVL86
-	.4byte	.LVL88
 	.2byte	0x1
-	.byte	0x53
+	.byte	0x50
 	.4byte	.LVL88
-	.4byte	.LVL90
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL95
 	.4byte	.LFE244
 	.2byte	0x1
-	.byte	0x52
+	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST35:
+.LLST34:
 	.4byte	.LVL87
-	.4byte	.LVL88
-	.2byte	0x1
-	.byte	0x5c
-	.4byte	.LVL88
-	.4byte	.LVL97
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL98
-	.4byte	.LFE244
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST36:
-	.4byte	.LVL92
-	.4byte	.LVL94
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST37:
-	.4byte	.LVL85
-	.4byte	.LVL86
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST38:
 	.4byte	.LVL89
-	.4byte	.LVL93
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST177:
-	.4byte	.LVL635
-	.4byte	.LVL637-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL637-1
-	.4byte	.LFE243
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST178:
-	.4byte	.LVL635
-	.4byte	.LVL637-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL637-1
-	.4byte	.LFE243
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST179:
-	.4byte	.LVL636
-	.4byte	.LVL641
-	.2byte	0x6
-	.byte	0x3
-	.4byte	gSysFreeQueue
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST180:
-	.4byte	.LVL638
-	.4byte	.LVL640
 	.2byte	0x1
-	.byte	0x56
+	.byte	0x55
+	.4byte	.LVL89
+	.4byte	.LFE244
+	.2byte	0x7
+	.byte	0x70
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x73
+	.sleb128 0
+	.byte	0x22
 	.4byte	0
 	.4byte	0
 .LLST198:
-	.4byte	.LVL770
-	.4byte	.LVL771
+	.4byte	.LVL778
+	.4byte	.LVL779
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL771
-	.4byte	.LVL772-1
+	.4byte	.LVL779
+	.4byte	.LVL780-1
 	.2byte	0x5
 	.byte	0x3
 	.4byte	gSysFreeQueue
-	.4byte	.LVL772-1
+	.4byte	.LVL780-1
 	.4byte	.LFE240
 	.2byte	0x4
 	.byte	0xf3
@@ -49267,12 +49300,12 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST159:
-	.4byte	.LVL586
-	.4byte	.LVL587
+.LLST151:
+	.4byte	.LVL576
+	.4byte	.LVL577
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL587
+	.4byte	.LVL577
 	.4byte	.LFE239
 	.2byte	0x4
 	.byte	0xf3
@@ -49281,53 +49314,53 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST160:
-	.4byte	.LVL586
-	.4byte	.LVL588
+.LLST152:
+	.4byte	.LVL576
+	.4byte	.LVL578
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL588
-	.4byte	.LVL593-1
+	.4byte	.LVL578
+	.4byte	.LVL583-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL593-1
+	.4byte	.LVL583-1
 	.4byte	.LFE239
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST161:
-	.4byte	.LVL592
-	.4byte	.LVL594
+.LLST153:
+	.4byte	.LVL582
+	.4byte	.LVL584
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL594
-	.4byte	.LVL595
+	.4byte	.LVL584
+	.4byte	.LVL585
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL596
+	.4byte	.LVL586
 	.4byte	.LFE239
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST162:
-	.4byte	.LVL597
-	.4byte	.LVL599
+.LLST154:
+	.4byte	.LVL587
+	.4byte	.LVL589
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL599
-	.4byte	.LVL601
+	.4byte	.LVL589
+	.4byte	.LVL591
 	.2byte	0x3
 	.byte	0x74
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL601
-	.4byte	.LVL602
+	.4byte	.LVL591
+	.4byte	.LVL592
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL602
+	.4byte	.LVL592
 	.4byte	.LFE239
 	.2byte	0x3
 	.byte	0x74
@@ -49335,13 +49368,13 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST163:
-	.4byte	.LVL589
-	.4byte	.LVL590
+.LLST155:
+	.4byte	.LVL579
+	.4byte	.LVL580
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL590
-	.4byte	.LVL591
+	.4byte	.LVL580
+	.4byte	.LVL581
 	.2byte	0x3
 	.byte	0x75
 	.sleb128 1
@@ -49530,98 +49563,98 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST348:
-	.4byte	.LVL1463
-	.4byte	.LVL1465
+.LLST347:
+	.4byte	.LVL1470
+	.4byte	.LVL1472
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1472
-	.4byte	.LVL1477
+	.4byte	.LVL1479
+	.4byte	.LVL1484
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1477
-	.4byte	.LVL1478
+	.4byte	.LVL1484
+	.4byte	.LVL1485
 	.2byte	0x3
 	.byte	0x76
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL1478
-	.4byte	.LVL1496
+	.4byte	.LVL1485
+	.4byte	.LVL1503
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST349:
-	.4byte	.LVL1464
-	.4byte	.LVL1466
+.LLST348:
+	.4byte	.LVL1471
+	.4byte	.LVL1473
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1466
-	.4byte	.LVL1470
+	.4byte	.LVL1473
+	.4byte	.LVL1477
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1471
-	.4byte	.LVL1472
+	.4byte	.LVL1478
+	.4byte	.LVL1479
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1482
-	.4byte	.LVL1492
+	.4byte	.LVL1489
+	.4byte	.LVL1499
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1493
-	.4byte	.LVL1494
+	.4byte	.LVL1500
+	.4byte	.LVL1501
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1494
-	.4byte	.LVL1495-1
+	.4byte	.LVL1501
+	.4byte	.LVL1502-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1495
-	.4byte	.LVL1496
+	.4byte	.LVL1502
+	.4byte	.LVL1503
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1496
-	.4byte	.LVL1497
+	.4byte	.LVL1503
+	.4byte	.LVL1504
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1502
-	.4byte	.LVL1503-1
+	.4byte	.LVL1509
+	.4byte	.LVL1510-1
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST350:
-	.4byte	.LVL1474
-	.4byte	.LVL1479
+.LLST349:
+	.4byte	.LVL1481
+	.4byte	.LVL1486
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1486
-	.4byte	.LVL1491
+	.4byte	.LVL1493
+	.4byte	.LVL1498
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST351:
-	.4byte	.LVL1473
-	.4byte	.LVL1494
+.LLST350:
+	.4byte	.LVL1480
+	.4byte	.LVL1501
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
-.LLST157:
-	.4byte	.LVL578
-	.4byte	.LVL584
+.LLST149:
+	.4byte	.LVL568
+	.4byte	.LVL574
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL585
+	.4byte	.LVL575
 	.4byte	.LFE233
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST158:
-	.4byte	.LVL579
-	.4byte	.LVL580
+.LLST150:
+	.4byte	.LVL569
+	.4byte	.LVL570
 	.2byte	0x13
 	.byte	0x73
 	.sleb128 0
@@ -49640,8 +49673,8 @@ __func__.9940:
 	.byte	0x3a
 	.byte	0x24
 	.byte	0x9f
-	.4byte	.LVL580
-	.4byte	.LVL581
+	.4byte	.LVL570
+	.4byte	.LVL571
 	.2byte	0x13
 	.byte	0x72
 	.sleb128 15
@@ -49660,8 +49693,8 @@ __func__.9940:
 	.byte	0x3a
 	.byte	0x24
 	.byte	0x9f
-	.4byte	.LVL581
-	.4byte	.LVL582-1
+	.4byte	.LVL571
+	.4byte	.LVL572-1
 	.2byte	0x18
 	.byte	0x3
 	.4byte	c_ftl_nand_blks_per_die
@@ -49684,68 +49717,68 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST344:
-	.4byte	.LVL1449
-	.4byte	.LVL1450
+.LLST343:
+	.4byte	.LVL1456
+	.4byte	.LVL1457
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1457
-	.4byte	.LVL1458
+	.4byte	.LVL1464
+	.4byte	.LVL1465
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1458
-	.4byte	.LVL1459
+	.4byte	.LVL1465
+	.4byte	.LVL1466
 	.2byte	0x3
 	.byte	0x75
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL1459
-	.4byte	.LVL1460
+	.4byte	.LVL1466
+	.4byte	.LVL1467
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST345:
-	.4byte	.LVL1438
-	.4byte	.LVL1441
+.LLST344:
+	.4byte	.LVL1445
+	.4byte	.LVL1448
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1450
-	.4byte	.LVL1451
+	.4byte	.LVL1457
+	.4byte	.LVL1458
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1452
-	.4byte	.LVL1453
+	.4byte	.LVL1459
+	.4byte	.LVL1460
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST346:
-	.4byte	.LVL1444
-	.4byte	.LVL1448
+.LLST345:
+	.4byte	.LVL1451
+	.4byte	.LVL1455
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1453
-	.4byte	.LVL1455
+	.4byte	.LVL1460
+	.4byte	.LVL1462
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1456
-	.4byte	.LVL1457
+	.4byte	.LVL1463
+	.4byte	.LVL1464
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST347:
-	.4byte	.LVL1436
-	.4byte	.LVL1447
+.LLST346:
+	.4byte	.LVL1443
+	.4byte	.LVL1454
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1450
 	.4byte	.LVL1457
+	.4byte	.LVL1464
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1460
-	.4byte	.LVL1461
+	.4byte	.LVL1467
+	.4byte	.LVL1468
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
@@ -49797,50 +49830,50 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST290:
-	.4byte	.LVL1164
-	.4byte	.LVL1166
+	.4byte	.LVL1172
+	.4byte	.LVL1174
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1176
-	.4byte	.LVL1177
+	.4byte	.LVL1184
+	.4byte	.LVL1185
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1177
-	.4byte	.LVL1178
+	.4byte	.LVL1185
+	.4byte	.LVL1186
 	.2byte	0x3
 	.byte	0x74
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL1178
-	.4byte	.LVL1179
+	.4byte	.LVL1186
+	.4byte	.LVL1187
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
 .LLST291:
-	.4byte	.LVL1163
-	.4byte	.LVL1168
+	.4byte	.LVL1171
+	.4byte	.LVL1176
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1168
 	.4byte	.LVL1176
+	.4byte	.LVL1184
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -36
-	.4byte	.LVL1176
-	.4byte	.LVL1179
+	.4byte	.LVL1184
+	.4byte	.LVL1187
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1179
-	.4byte	.LVL1180
+	.4byte	.LVL1187
+	.4byte	.LVL1188
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1180
-	.4byte	.LVL1181
+	.4byte	.LVL1188
+	.4byte	.LVL1189
 	.2byte	0x6
 	.byte	0x91
 	.sleb128 -36
@@ -49848,8 +49881,8 @@ __func__.9940:
 	.byte	0x23
 	.uleb128 0x1
 	.byte	0x9f
-	.4byte	.LVL1182
-	.4byte	.LVL1183
+	.4byte	.LVL1190
+	.4byte	.LVL1191
 	.2byte	0x6
 	.byte	0x91
 	.sleb128 -36
@@ -49857,7 +49890,7 @@ __func__.9940:
 	.byte	0x23
 	.uleb128 0x1
 	.byte	0x9f
-	.4byte	.LVL1183
+	.4byte	.LVL1191
 	.4byte	.LFE229
 	.2byte	0x3
 	.byte	0x73
@@ -49866,53 +49899,53 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST292:
-	.4byte	.LVL1165
-	.4byte	.LVL1176
+	.4byte	.LVL1173
+	.4byte	.LVL1184
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1179
-	.4byte	.LVL1183
+	.4byte	.LVL1187
+	.4byte	.LVL1191
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
 .LLST293:
-	.4byte	.LVL1163
-	.4byte	.LVL1168
+	.4byte	.LVL1171
+	.4byte	.LVL1176
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1168
-	.4byte	.LVL1173
+	.4byte	.LVL1176
+	.4byte	.LVL1181
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1174
-	.4byte	.LVL1176
+	.4byte	.LVL1182
+	.4byte	.LVL1184
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1176
-	.4byte	.LVL1179
+	.4byte	.LVL1184
+	.4byte	.LVL1187
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1179
-	.4byte	.LVL1183
+	.4byte	.LVL1187
+	.4byte	.LVL1191
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
 .LLST196:
-	.4byte	.LVL763
-	.4byte	.LVL765
+	.4byte	.LVL771
+	.4byte	.LVL773
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL765
-	.4byte	.LVL768
+	.4byte	.LVL773
+	.4byte	.LVL776
 	.2byte	0x4
 	.byte	0x75
 	.sleb128 -1022
 	.byte	0x9f
-	.4byte	.LVL768
+	.4byte	.LVL776
 	.4byte	.LFE228
 	.2byte	0x4
 	.byte	0xf3
@@ -49922,15 +49955,15 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST197:
-	.4byte	.LVL763
-	.4byte	.LVL764
+	.4byte	.LVL771
+	.4byte	.LVL772
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL764
-	.4byte	.LVL768
+	.4byte	.LVL772
+	.4byte	.LVL776
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL768
+	.4byte	.LVL776
 	.4byte	.LFE228
 	.2byte	0x4
 	.byte	0xf3
@@ -50099,16 +50132,16 @@ __func__.9940:
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST445:
-	.4byte	.LVL1961
-	.4byte	.LVL1964
+.LLST444:
+	.4byte	.LVL1949
+	.4byte	.LVL1952
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1964
-	.4byte	.LVL1965-1
+	.4byte	.LVL1952
+	.4byte	.LVL1953-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1965-1
+	.4byte	.LVL1953-1
 	.4byte	.LFE223
 	.2byte	0x4
 	.byte	0xf3
@@ -50117,16 +50150,16 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST446:
-	.4byte	.LVL1961
-	.4byte	.LVL1963
+.LLST445:
+	.4byte	.LVL1949
+	.4byte	.LVL1951
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1963
-	.4byte	.LVL1965-1
+	.4byte	.LVL1951
+	.4byte	.LVL1953-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1965-1
+	.4byte	.LVL1953-1
 	.4byte	.LFE223
 	.2byte	0x4
 	.byte	0xf3
@@ -50135,16 +50168,16 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST447:
-	.4byte	.LVL1961
-	.4byte	.LVL1962
+.LLST446:
+	.4byte	.LVL1949
+	.4byte	.LVL1950
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1962
-	.4byte	.LVL1965-1
+	.4byte	.LVL1950
+	.4byte	.LVL1953-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1965-1
+	.4byte	.LVL1953-1
 	.4byte	.LFE223
 	.2byte	0x4
 	.byte	0xf3
@@ -50153,16 +50186,16 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST427:
-	.4byte	.LVL1866
-	.4byte	.LVL1869
+.LLST426:
+	.4byte	.LVL1868
+	.4byte	.LVL1871
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1869
-	.4byte	.LVL1870-1
+	.4byte	.LVL1871
+	.4byte	.LVL1872-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1870-1
+	.4byte	.LVL1872-1
 	.4byte	.LFE222
 	.2byte	0x4
 	.byte	0xf3
@@ -50171,16 +50204,16 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST428:
-	.4byte	.LVL1866
+.LLST427:
 	.4byte	.LVL1868
+	.4byte	.LVL1870
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1868
-	.4byte	.LVL1870-1
+	.4byte	.LVL1870
+	.4byte	.LVL1872-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1870-1
+	.4byte	.LVL1872-1
 	.4byte	.LFE222
 	.2byte	0x4
 	.byte	0xf3
@@ -50189,16 +50222,16 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST429:
-	.4byte	.LVL1866
-	.4byte	.LVL1867
+.LLST428:
+	.4byte	.LVL1868
+	.4byte	.LVL1869
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1867
-	.4byte	.LVL1870-1
+	.4byte	.LVL1869
+	.4byte	.LVL1872-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1870-1
+	.4byte	.LVL1872-1
 	.4byte	.LFE222
 	.2byte	0x4
 	.byte	0xf3
@@ -50207,83 +50240,83 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST385:
-	.4byte	.LVL1632
-	.4byte	.LVL1633
+.LLST372:
+	.4byte	.LVL1588
+	.4byte	.LVL1589
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1633
-	.4byte	.LVL1634
+	.4byte	.LVL1589
+	.4byte	.LVL1590
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1634
-	.4byte	.LVL1635-1
+	.4byte	.LVL1590
+	.4byte	.LVL1592-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1635-1
-	.4byte	.LVL1638
+	.4byte	.LVL1592-1
+	.4byte	.LVL1594
 	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1638
-	.4byte	.LVL1653
+	.byte	0x57
+	.4byte	.LVL1594
+	.4byte	.LVL1609
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1653
-	.4byte	.LVL1654
+	.4byte	.LVL1609
+	.4byte	.LVL1610
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1654
+	.4byte	.LVL1610
 	.4byte	.LFE221
 	.2byte	0x1
-	.byte	0x56
+	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST386:
-	.4byte	.LVL1632
-	.4byte	.LVL1633
+.LLST373:
+	.4byte	.LVL1588
+	.4byte	.LVL1589
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1633
-	.4byte	.LVL1634
+	.4byte	.LVL1589
+	.4byte	.LVL1590
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1634
-	.4byte	.LVL1635-1
+	.4byte	.LVL1590
+	.4byte	.LVL1591
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1635-1
-	.4byte	.LVL1653
+	.4byte	.LVL1591
+	.4byte	.LVL1609
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1653
+	.4byte	.LVL1609
 	.4byte	.LFE221
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST387:
-	.4byte	.LVL1639
-	.4byte	.LVL1644
+.LLST374:
+	.4byte	.LVL1595
+	.4byte	.LVL1600
 	.2byte	0x1
-	.byte	0x56
+	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST388:
-	.4byte	.LVL1640
-	.4byte	.LVL1641
+.LLST375:
+	.4byte	.LVL1596
+	.4byte	.LVL1597
 	.2byte	0x21
 	.byte	0x74
 	.sleb128 0
 	.byte	0xa
 	.2byte	0xffff
 	.byte	0x1a
-	.byte	0x76
+	.byte	0x77
 	.sleb128 0
 	.byte	0xa
 	.2byte	0xffff
@@ -50310,52 +50343,52 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST389:
-	.4byte	.LVL1637
-	.4byte	.LVL1642
+.LLST376:
+	.4byte	.LVL1593
+	.4byte	.LVL1598
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1642
-	.4byte	.LVL1653
+	.4byte	.LVL1598
+	.4byte	.LVL1609
 	.2byte	0x1
-	.byte	0x57
+	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST390:
-	.4byte	.LVL1649
-	.4byte	.LVL1650-1
+.LLST377:
+	.4byte	.LVL1605
+	.4byte	.LVL1606-1
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST430:
-	.4byte	.LVL1871
-	.4byte	.LVL1874
+.LLST429:
+	.4byte	.LVL1873
+	.4byte	.LVL1877
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1874
 	.4byte	.LVL1877
+	.4byte	.LVL1879
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1877
 	.4byte	.LVL1879
+	.4byte	.LVL1882
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1879
-	.4byte	.LVL1959
+	.4byte	.LVL1882
+	.4byte	.LVL1947
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1959
-	.4byte	.LVL1960
+	.4byte	.LVL1947
+	.4byte	.LVL1948
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1960
+	.4byte	.LVL1948
 	.4byte	.LFE220
 	.2byte	0x4
 	.byte	0xf3
@@ -50364,186 +50397,140 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST431:
-	.4byte	.LVL1871
+.LLST430:
 	.4byte	.LVL1873
+	.4byte	.LVL1876
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1873
-	.4byte	.LVL1877
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1877
-	.4byte	.LVL1881
+	.4byte	.LVL1876
+	.4byte	.LVL1878-1
 	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1881
-	.4byte	.LVL1906
+	.byte	0x53
+	.4byte	.LVL1878-1
+	.4byte	.LVL1879
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -100
+	.4byte	.LVL1879
+	.4byte	.LVL1883
 	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1906
-	.4byte	.LVL1908
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
 	.byte	0x51
-	.byte	0x9f
-	.4byte	.LVL1908
-	.4byte	.LVL1959
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1959
+	.4byte	.LVL1883
+	.4byte	.LVL1947
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -100
+	.4byte	.LVL1947
 	.4byte	.LFE220
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST432:
-	.4byte	.LVL1871
-	.4byte	.LVL1872
+.LLST431:
+	.4byte	.LVL1873
+	.4byte	.LVL1874
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1872
-	.4byte	.LVL1877
+	.4byte	.LVL1874
+	.4byte	.LVL1879
 	.2byte	0x3
 	.byte	0x91
-	.sleb128 -80
-	.4byte	.LVL1877
-	.4byte	.LVL1880
+	.sleb128 -84
+	.4byte	.LVL1879
+	.4byte	.LVL1881
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1880
-	.4byte	.LVL1908
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -80
-	.4byte	.LVL1908
-	.4byte	.LVL1909
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1909
-	.4byte	.LVL1959
+	.4byte	.LVL1881
+	.4byte	.LFE220
 	.2byte	0x3
 	.byte	0x91
-	.sleb128 -80
-	.4byte	.LVL1959
-	.4byte	.LFE220
-	.2byte	0x1
-	.byte	0x52
+	.sleb128 -84
 	.4byte	0
 	.4byte	0
-.LLST433:
-	.4byte	.LVL1871
-	.4byte	.LVL1875-1
+.LLST432:
+	.4byte	.LVL1873
+	.4byte	.LVL1875
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1875-1
-	.4byte	.LVL1876
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	.LVL1876
-	.4byte	.LVL1877
+	.4byte	.LVL1875
+	.4byte	.LVL1878-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1878-1
+	.4byte	.LVL1879
 	.2byte	0x3
 	.byte	0x91
-	.sleb128 -96
-	.4byte	.LVL1877
-	.4byte	.LVL1878
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1878
-	.4byte	.LVL1910
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	.LVL1910
-	.4byte	.LVL1911-1
+	.sleb128 -88
+	.4byte	.LVL1879
+	.4byte	.LVL1880
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1911-1
+	.4byte	.LVL1880
 	.4byte	.LFE220
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	0
-	.4byte	0
-.LLST434:
-	.4byte	.LVL1935
-	.4byte	.LVL1938
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -88
 	.4byte	0
 	.4byte	0
-.LLST435:
-	.4byte	.LVL1887
-	.4byte	.LVL1888
+.LLST433:
+	.4byte	.LVL1918
+	.4byte	.LVL1940
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL1888
+	.4byte	0
+	.4byte	0
+.LLST434:
 	.4byte	.LVL1891
+	.4byte	.LVL1892
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -92
+	.4byte	.LVL1892
+	.4byte	.LVL1894
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1912
-	.4byte	.LVL1959
+	.4byte	.LVL1895
+	.4byte	.LVL1942
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST436:
-	.4byte	.LVL1883
-	.4byte	.LVL1884
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1884
-	.4byte	.LVL1907
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1907
-	.4byte	.LVL1910
-	.2byte	0x3
-	.byte	0x7a
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL1910
-	.4byte	.LVL1959
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST437:
+.LLST435:
+	.4byte	.LVL1885
 	.4byte	.LVL1886
-	.4byte	.LVL1887-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1887-1
-	.4byte	.LVL1896
+	.4byte	.LVL1886
+	.4byte	.LVL1947
 	.2byte	0x3
 	.byte	0x91
-	.sleb128 -76
-	.4byte	.LVL1896
-	.4byte	.LVL1898
+	.sleb128 -92
+	.4byte	0
+	.4byte	0
+.LLST436:
+	.4byte	.LVL1888
+	.4byte	.LVL1892
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1898
-	.4byte	.LVL1959
+	.4byte	.LVL1892
+	.4byte	.LVL1947
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -76
 	.4byte	0
 	.4byte	0
-.LLST438:
-	.4byte	.LVL1934
-	.4byte	.LVL1936
+.LLST437:
+	.4byte	.LVL1916
+	.4byte	.LVL1917
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1936
-	.4byte	.LVL1937
+	.4byte	.LVL1917
+	.4byte	.LVL1919
 	.2byte	0x2
 	.byte	0x71
 	.sleb128 4
-	.4byte	.LVL1937
-	.4byte	.LVL1939-1
+	.4byte	.LVL1919
+	.4byte	.LVL1920-1
 	.2byte	0xb
 	.byte	0x3
 	.4byte	req_prgm
@@ -50555,84 +50542,66 @@ __func__.9940:
 	.uleb128 0x4
 	.4byte	0
 	.4byte	0
-.LLST439:
-	.4byte	.LVL1924
-	.4byte	.LVL1929
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -92
-	.4byte	.LVL1932
-	.4byte	.LVL1933-1
+.LLST438:
+	.4byte	.LVL1906
+	.4byte	.LVL1911
 	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1933-1
-	.4byte	.LVL1950
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -92
-	.4byte	.LVL1950
-	.4byte	.LVL1951
+	.byte	0x5b
+	.4byte	.LVL1914
+	.4byte	.LVL1930
 	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1951
-	.4byte	.LVL1959
+	.byte	0x5b
+	.4byte	.LVL1930
+	.4byte	.LVL1931
 	.2byte	0x3
-	.byte	0x91
-	.sleb128 -92
+	.byte	0x7b
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL1931
+	.4byte	.LVL1940
+	.2byte	0x1
+	.byte	0x5b
 	.4byte	0
 	.4byte	0
-.LLST440:
-	.4byte	.LVL1886
-	.4byte	.LVL1887-1
+.LLST439:
+	.4byte	.LVL1889
+	.4byte	.LVL1890
 	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1887-1
-	.4byte	.LVL1896
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -84
-	.4byte	.LVL1896
-	.4byte	.LVL1897
+	.byte	0x53
+	.4byte	.LVL1890
+	.4byte	.LVL1892
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1897
-	.4byte	.LVL1903
+	.4byte	.LVL1892
+	.4byte	.LVL1895
 	.2byte	0x3
 	.byte	0x91
-	.sleb128 -84
-	.4byte	.LVL1903
-	.4byte	.LVL1904
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1905
-	.4byte	.LVL1912
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1912
-	.4byte	.LVL1913
+	.sleb128 -96
+	.4byte	.LVL1895
+	.4byte	.LVL1896
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1913
-	.4byte	.LVL1928
+	.4byte	.LVL1896
+	.4byte	.LVL1910
 	.2byte	0x3
 	.byte	0x91
-	.sleb128 -84
-	.4byte	.LVL1928
-	.4byte	.LVL1929
+	.sleb128 -96
+	.4byte	.LVL1910
+	.4byte	.LVL1911
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1929
-	.4byte	.LVL1959
+	.4byte	.LVL1911
+	.4byte	.LVL1947
 	.2byte	0x3
 	.byte	0x91
-	.sleb128 -84
+	.sleb128 -96
 	.4byte	0
 	.4byte	0
-.LLST441:
-	.4byte	.LVL1920
-	.4byte	.LVL1921
+.LLST440:
+	.4byte	.LVL1902
+	.4byte	.LVL1903
 	.2byte	0x1f
-	.byte	0x74
+	.byte	0x75
 	.sleb128 7
 	.byte	0x94
 	.byte	0x1
@@ -50647,7 +50616,7 @@ __func__.9940:
 	.byte	0x24
 	.byte	0x22
 	.byte	0x91
-	.sleb128 -84
+	.sleb128 -96
 	.byte	0x6
 	.byte	0x16
 	.byte	0x14
@@ -50661,125 +50630,108 @@ __func__.9940:
 	.byte	0x16
 	.byte	0x13
 	.byte	0x9f
-	.4byte	.LVL1921
-	.4byte	.LVL1922
+	.4byte	.LVL1903
+	.4byte	.LVL1904
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1922
-	.4byte	.LVL1925
+	.4byte	.LVL1904
+	.4byte	.LVL1907
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -60
-	.4byte	.LVL1925
-	.4byte	.LVL1929
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -92
-	.4byte	.LVL1932
-	.4byte	.LVL1959
+	.4byte	.LVL1907
+	.4byte	.LVL1911
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1914
+	.4byte	.LVL1940
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -60
 	.4byte	0
 	.4byte	0
-.LLST442:
-	.4byte	.LVL1887
-	.4byte	.LVL1888
+.LLST441:
+	.4byte	.LVL1891
+	.4byte	.LVL1892
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1900
-	.4byte	.LVL1901
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1901
-	.4byte	.LVL1903-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1940
-	.4byte	.LVL1942
+	.4byte	.LVL1921
+	.4byte	.LVL1923
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1944
-	.4byte	.LVL1945
+	.4byte	.LVL1925
+	.4byte	.LVL1926
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1945
-	.4byte	.LVL1947
+	.4byte	.LVL1926
+	.4byte	.LVL1928
 	.2byte	0x3
 	.byte	0x91
-	.sleb128 -72
-	.4byte	.LVL1951
-	.4byte	.LVL1958
+	.sleb128 -80
+	.4byte	.LVL1932
+	.4byte	.LVL1939
 	.2byte	0x3
 	.byte	0x91
-	.sleb128 -72
+	.sleb128 -80
 	.4byte	0
 	.4byte	0
-.LLST443:
-	.4byte	.LVL1887
-	.4byte	.LVL1888
+.LLST442:
+	.4byte	.LVL1891
+	.4byte	.LVL1892
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1900
-	.4byte	.LVL1904
+	.4byte	.LVL1922
+	.4byte	.LVL1923
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1905
-	.4byte	.LVL1912
+	.4byte	.LVL1926
+	.4byte	.LVL1927
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1941
-	.4byte	.LVL1942
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1945
-	.4byte	.LVL1946
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1951
-	.4byte	.LVL1958
+	.4byte	.LVL1932
+	.4byte	.LVL1939
 	.2byte	0x1
-	.byte	0x55
+	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST444:
-	.4byte	.LVL1887
-	.4byte	.LVL1888
+.LLST443:
+	.4byte	.LVL1891
+	.4byte	.LVL1892
 	.2byte	0x6
 	.byte	0x3
 	.4byte	g_active_superblock
 	.byte	0x9f
-	.4byte	.LVL1888
-	.4byte	.LVL1889
+	.4byte	.LVL1892
+	.4byte	.LVL1894
 	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1912
-	.4byte	.LVL1916
+	.byte	0x55
+	.4byte	.LVL1895
+	.4byte	.LVL1898
 	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1919
-	.4byte	.LVL1931
+	.byte	0x55
+	.4byte	.LVL1901
+	.4byte	.LVL1913
 	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1932
-	.4byte	.LVL1959
+	.byte	0x55
+	.4byte	.LVL1914
+	.4byte	.LVL1941
 	.2byte	0x1
-	.byte	0x54
+	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST377:
-	.4byte	.LVL1604
-	.4byte	.LVL1607-1
+.LLST382:
+	.4byte	.LVL1638
+	.4byte	.LVL1641-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1607-1
-	.4byte	.LVL1607
+	.4byte	.LVL1641-1
+	.4byte	.LVL1641
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1607
+	.4byte	.LVL1641
 	.4byte	.LFE218
 	.2byte	0x4
 	.byte	0xf3
@@ -50788,16 +50740,16 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST378:
-	.4byte	.LVL1604
-	.4byte	.LVL1607-1
+.LLST383:
+	.4byte	.LVL1638
+	.4byte	.LVL1641-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1607-1
-	.4byte	.LVL1625
+	.4byte	.LVL1641-1
+	.4byte	.LVL1659
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL1625
+	.4byte	.LVL1659
 	.4byte	.LFE218
 	.2byte	0x4
 	.byte	0xf3
@@ -50806,12 +50758,12 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST379:
-	.4byte	.LVL1604
-	.4byte	.LVL1605
+.LLST384:
+	.4byte	.LVL1638
+	.4byte	.LVL1639
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1605
+	.4byte	.LVL1639
 	.4byte	.LFE218
 	.2byte	0x4
 	.byte	0xf3
@@ -50820,16 +50772,16 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST380:
-	.4byte	.LVL1604
-	.4byte	.LVL1606
+.LLST385:
+	.4byte	.LVL1638
+	.4byte	.LVL1640
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1606
-	.4byte	.LVL1625
+	.4byte	.LVL1640
+	.4byte	.LVL1659
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1625
+	.4byte	.LVL1659
 	.4byte	.LFE218
 	.2byte	0x4
 	.byte	0xf3
@@ -50838,67 +50790,67 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST381:
-	.4byte	.LVL1607
-	.4byte	.LVL1625
+.LLST386:
+	.4byte	.LVL1641
+	.4byte	.LVL1659
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST382:
-	.4byte	.LVL1616
-	.4byte	.LVL1623
+.LLST387:
+	.4byte	.LVL1650
+	.4byte	.LVL1657
 	.2byte	0x1
 	.byte	0x5b
 	.4byte	0
 	.4byte	0
-.LLST383:
-	.4byte	.LVL1608
-	.4byte	.LVL1609
+.LLST388:
+	.4byte	.LVL1642
+	.4byte	.LVL1643
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1618
-	.4byte	.LVL1619
+	.4byte	.LVL1652
+	.4byte	.LVL1653
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST384:
-	.4byte	.LVL1615
-	.4byte	.LVL1617-1
+.LLST389:
+	.4byte	.LVL1649
+	.4byte	.LVL1651-1
 	.2byte	0x2
 	.byte	0x75
 	.sleb128 12
 	.4byte	0
 	.4byte	0
-.LLST410:
-	.4byte	.LVL1815
-	.4byte	.LVL1818
+.LLST409:
+	.4byte	.LVL1817
+	.4byte	.LVL1820
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1818
-	.4byte	.LVL1821
+	.4byte	.LVL1820
+	.4byte	.LVL1823
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1821
-	.4byte	.LVL1824
+	.4byte	.LVL1823
+	.4byte	.LVL1826
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1824
-	.4byte	.LVL1864
+	.4byte	.LVL1826
+	.4byte	.LVL1866
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1864
-	.4byte	.LVL1865
+	.4byte	.LVL1866
+	.4byte	.LVL1867
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1865
+	.4byte	.LVL1867
 	.4byte	.LFE217
 	.2byte	0x4
 	.byte	0xf3
@@ -50907,118 +50859,118 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST411:
-	.4byte	.LVL1815
+.LLST410:
 	.4byte	.LVL1817
+	.4byte	.LVL1819
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1817
-	.4byte	.LVL1821
+	.4byte	.LVL1819
+	.4byte	.LVL1823
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1821
-	.4byte	.LVL1825-1
+	.4byte	.LVL1823
+	.4byte	.LVL1827
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1825-1
-	.4byte	.LVL1864
+	.4byte	.LVL1827
+	.4byte	.LVL1866
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1864
+	.4byte	.LVL1866
 	.4byte	.LFE217
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST412:
-	.4byte	.LVL1815
-	.4byte	.LVL1816
+.LLST411:
+	.4byte	.LVL1817
+	.4byte	.LVL1818
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1816
-	.4byte	.LVL1821
+	.4byte	.LVL1818
+	.4byte	.LVL1823
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -56
-	.4byte	.LVL1821
 	.4byte	.LVL1823
+	.4byte	.LVL1825
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1823
+	.4byte	.LVL1825
 	.4byte	.LFE217
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -56
 	.4byte	0
 	.4byte	0
-.LLST413:
-	.4byte	.LVL1815
-	.4byte	.LVL1819-1
+.LLST412:
+	.4byte	.LVL1817
+	.4byte	.LVL1821-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1819-1
-	.4byte	.LVL1821
+	.4byte	.LVL1821-1
+	.4byte	.LVL1823
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL1821
-	.4byte	.LVL1822
+	.4byte	.LVL1823
+	.4byte	.LVL1824
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1822
+	.4byte	.LVL1824
 	.4byte	.LFE217
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST414:
-	.4byte	.LVL1815
-	.4byte	.LVL1820
+.LLST413:
+	.4byte	.LVL1817
+	.4byte	.LVL1822
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1821
-	.4byte	.LVL1833
+	.4byte	.LVL1823
+	.4byte	.LVL1835
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1864
+	.4byte	.LVL1866
 	.4byte	.LFE217
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST415:
-	.4byte	.LVL1827
-	.4byte	.LVL1828
+.LLST414:
+	.4byte	.LVL1829
+	.4byte	.LVL1830
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1828
-	.4byte	.LVL1864
+	.4byte	.LVL1830
+	.4byte	.LVL1866
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -72
 	.4byte	0
 	.4byte	0
-.LLST416:
-	.4byte	.LVL1830
-	.4byte	.LVL1833
+.LLST415:
+	.4byte	.LVL1832
+	.4byte	.LVL1835
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1833
-	.4byte	.LVL1864
+	.4byte	.LVL1835
+	.4byte	.LVL1866
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -68
 	.4byte	0
 	.4byte	0
-.LLST417:
-	.4byte	.LVL1849
-	.4byte	.LVL1850
+.LLST416:
+	.4byte	.LVL1851
+	.4byte	.LVL1852
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1850
-	.4byte	.LVL1851-1
+	.4byte	.LVL1852
+	.4byte	.LVL1853-1
 	.2byte	0x12
 	.byte	0x3
 	.4byte	c_ftl_nand_sec_pre_page
@@ -51036,139 +50988,139 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST418:
-	.4byte	.LVL1831
+.LLST417:
 	.4byte	.LVL1833
+	.4byte	.LVL1835
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -72
-	.4byte	.LVL1833
-	.4byte	.LVL1864
+	.4byte	.LVL1835
+	.4byte	.LVL1866
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST419:
-	.4byte	.LVL1842
-	.4byte	.LVL1843
+.LLST418:
+	.4byte	.LVL1844
+	.4byte	.LVL1845
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1843
-	.4byte	.LVL1848
+	.4byte	.LVL1845
+	.4byte	.LVL1850
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL1861
-	.4byte	.LVL1864
+	.4byte	.LVL1863
+	.4byte	.LVL1866
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
-.LLST420:
-	.4byte	.LVL1831
+.LLST419:
 	.4byte	.LVL1833
+	.4byte	.LVL1835
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1833
-	.4byte	.LVL1847
+	.4byte	.LVL1835
+	.4byte	.LVL1849
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1848
-	.4byte	.LVL1864
+	.4byte	.LVL1850
+	.4byte	.LVL1866
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST421:
-	.4byte	.LVL1831
-	.4byte	.LVL1832
+.LLST420:
+	.4byte	.LVL1833
+	.4byte	.LVL1834
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1832
-	.4byte	.LVL1833
+	.4byte	.LVL1834
+	.4byte	.LVL1835
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1833
 	.4byte	.LVL1835
+	.4byte	.LVL1837
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -80
-	.4byte	.LVL1835
-	.4byte	.LVL1836-1
+	.4byte	.LVL1837
+	.4byte	.LVL1838-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1836-1
-	.4byte	.LVL1839
+	.4byte	.LVL1838-1
+	.4byte	.LVL1841
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -80
-	.4byte	.LVL1839
-	.4byte	.LVL1840
+	.4byte	.LVL1841
+	.4byte	.LVL1842
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL1840
-	.4byte	.LVL1841
+	.4byte	.LVL1842
+	.4byte	.LVL1843
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1841
-	.4byte	.LVL1864
+	.4byte	.LVL1843
+	.4byte	.LVL1866
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -80
 	.4byte	0
 	.4byte	0
-.LLST422:
-	.4byte	.LVL1815
-	.4byte	.LVL1820
+.LLST421:
+	.4byte	.LVL1817
+	.4byte	.LVL1822
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1821
-	.4byte	.LVL1833
+	.4byte	.LVL1823
+	.4byte	.LVL1835
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1833
-	.4byte	.LVL1855
+	.4byte	.LVL1835
+	.4byte	.LVL1857
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -64
-	.4byte	.LVL1855
-	.4byte	.LVL1858
+	.4byte	.LVL1857
+	.4byte	.LVL1860
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1858
-	.4byte	.LVL1864
+	.4byte	.LVL1860
+	.4byte	.LVL1866
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -64
-	.4byte	.LVL1864
+	.4byte	.LVL1866
 	.4byte	.LFE217
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST423:
-	.4byte	.LVL1821
-	.4byte	.LVL1833
+.LLST422:
+	.4byte	.LVL1823
+	.4byte	.LVL1835
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1833
-	.4byte	.LVL1855
+	.4byte	.LVL1835
+	.4byte	.LVL1857
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -60
-	.4byte	.LVL1855
-	.4byte	.LVL1856
+	.4byte	.LVL1857
+	.4byte	.LVL1858
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1856
-	.4byte	.LVL1857
+	.4byte	.LVL1858
+	.4byte	.LVL1859
 	.2byte	0x6
 	.byte	0x7b
 	.sleb128 0
@@ -51176,60 +51128,60 @@ __func__.9940:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL1857
-	.4byte	.LVL1858
+	.4byte	.LVL1859
+	.4byte	.LVL1860
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1858
-	.4byte	.LVL1864
+	.4byte	.LVL1860
+	.4byte	.LVL1866
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -60
-	.4byte	.LVL1864
+	.4byte	.LVL1866
 	.4byte	.LFE217
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST424:
-	.4byte	.LVL1821
-	.4byte	.LVL1833
+.LLST423:
+	.4byte	.LVL1823
+	.4byte	.LVL1835
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1833
-	.4byte	.LVL1864
+	.4byte	.LVL1835
+	.4byte	.LVL1866
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1864
+	.4byte	.LVL1866
 	.4byte	.LFE217
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST425:
-	.4byte	.LVL1837
-	.4byte	.LVL1838
+.LLST424:
+	.4byte	.LVL1839
+	.4byte	.LVL1840
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL1848
-	.4byte	.LVL1853
+	.4byte	.LVL1850
+	.4byte	.LVL1855
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
-.LLST426:
-	.4byte	.LVL1862
-	.4byte	.LVL1863-1
+.LLST425:
+	.4byte	.LVL1864
+	.4byte	.LVL1865-1
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST454:
-	.4byte	.LVL2067
-	.4byte	.LVL2068
+.LLST453:
+	.4byte	.LVL2056
+	.4byte	.LVL2057
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x1fc1
@@ -51237,8 +51189,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL2068
-	.4byte	.LVL2069
+	.4byte	.LVL2057
+	.4byte	.LVL2058
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x1fc2
@@ -51246,8 +51198,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL2069
-	.4byte	.LVL2070
+	.4byte	.LVL2058
+	.4byte	.LVL2059
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x1fc1
@@ -51257,106 +51209,106 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST450:
-	.4byte	.LVL2021
-	.4byte	.LVL2023
+.LLST449:
+	.4byte	.LVL2010
+	.4byte	.LVL2012
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL2025
-	.4byte	.LVL2026
+	.4byte	.LVL2014
+	.4byte	.LVL2015
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL2036
-	.4byte	.LVL2038
+	.4byte	.LVL2025
+	.4byte	.LVL2027
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL2041
-	.4byte	.LVL2042
+	.4byte	.LVL2030
+	.4byte	.LVL2031
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL2046
-	.4byte	.LVL2047
+	.4byte	.LVL2035
+	.4byte	.LVL2036
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL2049
-	.4byte	.LVL2050
+	.4byte	.LVL2038
+	.4byte	.LVL2039
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL2050
-	.4byte	.LVL2051-1
+	.4byte	.LVL2039
+	.4byte	.LVL2040-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL2053
-	.4byte	.LVL2054
+	.4byte	.LVL2042
+	.4byte	.LVL2043
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST451:
-	.4byte	.LVL2025
-	.4byte	.LVL2029
+.LLST450:
+	.4byte	.LVL2014
+	.4byte	.LVL2018
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL2050
-	.4byte	.LVL2052
+	.4byte	.LVL2039
+	.4byte	.LVL2041
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL2053
-	.4byte	.LVL2054
+	.4byte	.LVL2042
+	.4byte	.LVL2043
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST452:
-	.4byte	.LVL2019
-	.4byte	.LVL2022
+.LLST451:
+	.4byte	.LVL2008
+	.4byte	.LVL2011
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL2022
-	.4byte	.LVL2024
+	.4byte	.LVL2011
+	.4byte	.LVL2013
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL2036
-	.4byte	.LVL2039
+	.4byte	.LVL2025
+	.4byte	.LVL2028
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL2040
-	.4byte	.LVL2045
+	.4byte	.LVL2029
+	.4byte	.LVL2034
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL2045
-	.4byte	.LVL2046
+	.4byte	.LVL2034
+	.4byte	.LVL2035
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST453:
-	.4byte	.LVL2017
-	.4byte	.LVL2018
+.LLST452:
+	.4byte	.LVL2006
+	.4byte	.LVL2007
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL2018
-	.4byte	.LVL2020
+	.4byte	.LVL2007
+	.4byte	.LVL2009
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL2034
-	.4byte	.LVL2035
+	.4byte	.LVL2023
+	.4byte	.LVL2024
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL2035
-	.4byte	.LVL2036
+	.4byte	.LVL2024
+	.4byte	.LVL2025
 	.2byte	0x1
 	.byte	0x52
 	.4byte	0
 	.4byte	0
-.LLST181:
-	.4byte	.LVL642
-	.4byte	.LVL644
+.LLST175:
+	.4byte	.LVL632
+	.4byte	.LVL634
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL644
+	.4byte	.LVL634
 	.4byte	.LFE212
 	.2byte	0x4
 	.byte	0xf3
@@ -51365,12 +51317,12 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST182:
-	.4byte	.LVL642
-	.4byte	.LVL644
+.LLST176:
+	.4byte	.LVL632
+	.4byte	.LVL634
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL644
+	.4byte	.LVL634
 	.4byte	.LFE212
 	.2byte	0x4
 	.byte	0xf3
@@ -51379,270 +51331,270 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST183:
-	.4byte	.LVL642
-	.4byte	.LVL644
+.LLST177:
+	.4byte	.LVL632
+	.4byte	.LVL634
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL644
-	.4byte	.LVL671
+	.4byte	.LVL634
+	.4byte	.LVL661
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL672
-	.4byte	.LVL674
+	.4byte	.LVL662
+	.4byte	.LVL664
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL675
-	.4byte	.LVL689
+	.4byte	.LVL665
+	.4byte	.LVL679
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL690
+	.4byte	.LVL680
 	.4byte	.LFE212
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST184:
-	.4byte	.LVL642
-	.4byte	.LVL644
+.LLST178:
+	.4byte	.LVL632
+	.4byte	.LVL634
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL644
-	.4byte	.LVL649
+	.4byte	.LVL634
+	.4byte	.LVL639
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL649
-	.4byte	.LVL650
+	.4byte	.LVL639
+	.4byte	.LVL640
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL650
-	.4byte	.LVL666
+	.4byte	.LVL640
+	.4byte	.LVL656
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL667
-	.4byte	.LVL684
+	.4byte	.LVL657
+	.4byte	.LVL674
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL685
+	.4byte	.LVL675
 	.4byte	.LFE212
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST185:
-	.4byte	.LVL643
-	.4byte	.LVL644
+.LLST179:
+	.4byte	.LVL633
+	.4byte	.LVL634
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL644
-	.4byte	.LVL645
+	.4byte	.LVL634
+	.4byte	.LVL635
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL645
-	.4byte	.LVL649
+	.4byte	.LVL635
+	.4byte	.LVL639
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL649
-	.4byte	.LVL650
+	.4byte	.LVL639
+	.4byte	.LVL640
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL650
-	.4byte	.LVL651
+	.4byte	.LVL640
+	.4byte	.LVL641
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL651
-	.4byte	.LVL652
+	.4byte	.LVL641
+	.4byte	.LVL642
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL653
-	.4byte	.LVL654
+	.4byte	.LVL643
+	.4byte	.LVL644
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL654
-	.4byte	.LVL657
+	.4byte	.LVL644
+	.4byte	.LVL647
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL657
-	.4byte	.LVL659
+	.4byte	.LVL647
+	.4byte	.LVL649
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL659
-	.4byte	.LVL660
+	.4byte	.LVL649
+	.4byte	.LVL650
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL661
-	.4byte	.LVL668
+	.4byte	.LVL651
+	.4byte	.LVL658
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL668
-	.4byte	.LVL669
+	.4byte	.LVL658
+	.4byte	.LVL659
 	.2byte	0x3
 	.byte	0x7b
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL670
-	.4byte	.LVL673
+	.4byte	.LVL660
+	.4byte	.LVL663
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL673
-	.4byte	.LVL676
+	.4byte	.LVL663
+	.4byte	.LVL666
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL676
-	.4byte	.LVL677
+	.4byte	.LVL666
+	.4byte	.LVL667
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL678
-	.4byte	.LVL679
+	.4byte	.LVL668
+	.4byte	.LVL669
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL679
-	.4byte	.LVL686
+	.4byte	.LVL669
+	.4byte	.LVL676
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL686
-	.4byte	.LVL687
+	.4byte	.LVL676
+	.4byte	.LVL677
 	.2byte	0x3
 	.byte	0x7b
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL688
-	.4byte	.LVL692
+	.4byte	.LVL678
+	.4byte	.LVL682
 	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL692
-	.4byte	.LVL693
+	.byte	0x57
+	.4byte	.LVL682
+	.4byte	.LVL683
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL694
-	.4byte	.LVL695
+	.4byte	.LVL684
+	.4byte	.LVL685
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL695
-	.4byte	.LVL696
+	.4byte	.LVL685
+	.4byte	.LVL686
 	.2byte	0x3
 	.byte	0x76
 	.sleb128 1
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST186:
-	.4byte	.LVL663
-	.4byte	.LVL664-1
+.LLST180:
+	.4byte	.LVL653
+	.4byte	.LVL654-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL681
-	.4byte	.LVL682-1
+	.4byte	.LVL671
+	.4byte	.LVL672-1
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST187:
-	.4byte	.LVL642
-	.4byte	.LVL647
+.LLST181:
+	.4byte	.LVL632
+	.4byte	.LVL637
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.4byte	.LVL647
-	.4byte	.LVL648
+	.4byte	.LVL637
+	.4byte	.LVL638
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL661
-	.4byte	.LVL679
+	.4byte	.LVL651
+	.4byte	.LVL669
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST188:
-	.4byte	.LVL642
-	.4byte	.LVL649
+.LLST182:
+	.4byte	.LVL632
+	.4byte	.LVL639
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL649
-	.4byte	.LVL655
+	.4byte	.LVL639
+	.4byte	.LVL645
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL656
-	.4byte	.LVL658
+	.4byte	.LVL646
+	.4byte	.LVL648
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL661
-	.4byte	.LVL679
+	.4byte	.LVL651
+	.4byte	.LVL669
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL679
-	.4byte	.LVL694
+	.4byte	.LVL669
+	.4byte	.LVL684
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST189:
-	.4byte	.LVL642
-	.4byte	.LVL648
+.LLST183:
+	.4byte	.LVL632
+	.4byte	.LVL638
 	.2byte	0x2
 	.byte	0x36
 	.byte	0x9f
-	.4byte	.LVL661
-	.4byte	.LVL679
+	.4byte	.LVL651
+	.4byte	.LVL669
 	.2byte	0x2
 	.byte	0x36
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST190:
-	.4byte	.LVL642
-	.4byte	.LVL646
+.LLST184:
+	.4byte	.LVL632
+	.4byte	.LVL636
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL646
-	.4byte	.LVL648
+	.4byte	.LVL636
+	.4byte	.LVL638
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.4byte	.LVL661
-	.4byte	.LVL679
+	.4byte	.LVL651
+	.4byte	.LVL669
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
 .LLST194:
-	.4byte	.LVL756
-	.4byte	.LVL757
+	.4byte	.LVL764
+	.4byte	.LVL765
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.4byte	.LVL757
-	.4byte	.LVL758
+	.4byte	.LVL765
+	.4byte	.LVL766
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL760
-	.4byte	.LVL762
+	.4byte	.LVL768
+	.4byte	.LVL770
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
 .LLST195:
-	.4byte	.LVL701
-	.4byte	.LVL707
+	.4byte	.LVL709
+	.4byte	.LVL715
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL707
-	.4byte	.LVL714
+	.4byte	.LVL715
+	.4byte	.LVL722
 	.2byte	0x7
 	.byte	0x74
 	.sleb128 0
@@ -51650,16 +51602,16 @@ __func__.9940:
 	.2byte	0xffff
 	.byte	0x1a
 	.byte	0x9f
-	.4byte	.LVL716
-	.4byte	.LVL722
+	.4byte	.LVL724
+	.4byte	.LVL730
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL723
-	.4byte	.LVL726
+	.4byte	.LVL731
+	.4byte	.LVL734
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL727
-	.4byte	.LVL728
+	.4byte	.LVL735
+	.4byte	.LVL736
 	.2byte	0x9
 	.byte	0x3
 	.4byte	c_ftl_nand_max_map_blks
@@ -51667,12 +51619,12 @@ __func__.9940:
 	.byte	0x31
 	.byte	0x24
 	.byte	0x9f
-	.4byte	.LVL728
-	.4byte	.LVL731
+	.4byte	.LVL736
+	.4byte	.LVL739
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL737
-	.4byte	.LVL738
+	.4byte	.LVL745
+	.4byte	.LVL746
 	.2byte	0xe
 	.byte	0x3
 	.4byte	c_ftl_nand_map_region_num
@@ -51684,12 +51636,12 @@ __func__.9940:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.4byte	.LVL738
-	.4byte	.LVL739-1
+	.4byte	.LVL746
+	.4byte	.LVL747-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL740
-	.4byte	.LVL741
+	.4byte	.LVL748
+	.4byte	.LVL749
 	.2byte	0x9
 	.byte	0x3
 	.4byte	c_ftl_nand_max_map_blks
@@ -51697,12 +51649,12 @@ __func__.9940:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.4byte	.LVL741
-	.4byte	.LVL742-1
+	.4byte	.LVL749
+	.4byte	.LVL750-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL743
-	.4byte	.LVL744
+	.4byte	.LVL751
+	.4byte	.LVL752
 	.2byte	0xe
 	.byte	0x3
 	.4byte	c_ftl_nand_l2pmap_ram_region_num
@@ -51714,12 +51666,12 @@ __func__.9940:
 	.byte	0x3c
 	.byte	0x1e
 	.byte	0x9f
-	.4byte	.LVL744
-	.4byte	.LVL745-1
+	.4byte	.LVL752
+	.4byte	.LVL753-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL746
-	.4byte	.LVL747
+	.4byte	.LVL754
+	.4byte	.LVL755
 	.2byte	0x18
 	.byte	0x3
 	.4byte	c_ftl_nand_l2pmap_ram_region_num
@@ -51737,12 +51689,12 @@ __func__.9940:
 	.byte	0x1a
 	.byte	0x1e
 	.byte	0x9f
-	.4byte	.LVL747
-	.4byte	.LVL748-1
+	.4byte	.LVL755
+	.4byte	.LVL756-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL749
-	.4byte	.LVL750
+	.4byte	.LVL757
+	.4byte	.LVL758
 	.2byte	0xe
 	.byte	0x3
 	.4byte	c_ftl_nand_blk_pre_plane
@@ -51754,12 +51706,12 @@ __func__.9940:
 	.byte	0x36
 	.byte	0x1e
 	.byte	0x9f
-	.4byte	.LVL750
-	.4byte	.LVL751-1
+	.4byte	.LVL758
+	.4byte	.LVL759-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL752
-	.4byte	.LVL753
+	.4byte	.LVL760
+	.4byte	.LVL761
 	.2byte	0x11
 	.byte	0x3
 	.4byte	c_ftl_nand_die_num
@@ -51774,8 +51726,8 @@ __func__.9940:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.4byte	.LVL753
-	.4byte	.LVL754
+	.4byte	.LVL761
+	.4byte	.LVL762
 	.2byte	0x1e
 	.byte	0x3
 	.4byte	c_ftl_nand_blks_per_die
@@ -51799,8 +51751,8 @@ __func__.9940:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.4byte	.LVL754
-	.4byte	.LVL755-1
+	.4byte	.LVL762
+	.4byte	.LVL763-1
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
@@ -51902,16 +51854,16 @@ __func__.9940:
 	.byte	0x52
 	.4byte	0
 	.4byte	0
-.LLST111:
-	.4byte	.LVL449
-	.4byte	.LVL451-1
+.LLST102:
+	.4byte	.LVL437
+	.4byte	.LVL439-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL451-1
-	.4byte	.LVL456
+	.4byte	.LVL439-1
+	.4byte	.LVL444
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL456
+	.4byte	.LVL444
 	.4byte	.LFE204
 	.2byte	0x4
 	.byte	0xf3
@@ -51920,21 +51872,21 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST112:
-	.4byte	.LVL450
-	.4byte	.LVL451-1
+.LLST103:
+	.4byte	.LVL438
+	.4byte	.LVL439-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL451-1
-	.4byte	.LVL452
+	.4byte	.LVL439-1
+	.4byte	.LVL440
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL452
-	.4byte	.LVL453
+	.4byte	.LVL440
+	.4byte	.LVL441
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL453
-	.4byte	.LVL454
+	.4byte	.LVL441
+	.4byte	.LVL442
 	.2byte	0x6
 	.byte	0x74
 	.sleb128 0
@@ -51942,94 +51894,94 @@ __func__.9940:
 	.sleb128 0
 	.byte	0x22
 	.byte	0x9f
-	.4byte	.LVL454
-	.4byte	.LVL455
+	.4byte	.LVL442
+	.4byte	.LVL443
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST106:
-	.4byte	.LVL300
-	.4byte	.LVL302-1
+.LLST97:
+	.4byte	.LVL288
+	.4byte	.LVL290-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL302-1
+	.4byte	.LVL290-1
 	.4byte	.LFE203
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST107:
-	.4byte	.LVL438
-	.4byte	.LVL440
+.LLST98:
+	.4byte	.LVL426
+	.4byte	.LVL428
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL440
-	.4byte	.LVL442
+	.4byte	.LVL428
+	.4byte	.LVL430
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL442
-	.4byte	.LVL444
+	.4byte	.LVL430
+	.4byte	.LVL432
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL445
-	.4byte	.LVL446
+	.4byte	.LVL433
+	.4byte	.LVL434
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL446
-	.4byte	.LVL447-1
+	.4byte	.LVL434
+	.4byte	.LVL435-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL447-1
-	.4byte	.LVL448
+	.4byte	.LVL435-1
+	.4byte	.LVL436
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL448
+	.4byte	.LVL436
 	.4byte	.LFE203
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST108:
-	.4byte	.LVL301
-	.4byte	.LVL302-1
+.LLST99:
+	.4byte	.LVL289
+	.4byte	.LVL290-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL302-1
-	.4byte	.LVL303
+	.4byte	.LVL290-1
+	.4byte	.LVL291
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL303
-	.4byte	.LVL415
+	.4byte	.LVL291
+	.4byte	.LVL403
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL415
+	.4byte	.LVL403
 	.4byte	.LFE203
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST109:
-	.4byte	.LVL438
-	.4byte	.LVL439-1
+.LLST100:
+	.4byte	.LVL426
+	.4byte	.LVL427-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL442
-	.4byte	.LVL443
+	.4byte	.LVL430
+	.4byte	.LVL431
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST110:
-	.4byte	.LVL445
-	.4byte	.LVL447-1
+.LLST101:
+	.4byte	.LVL433
+	.4byte	.LVL435-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL448
+	.4byte	.LVL436
 	.4byte	.LFE203
 	.2byte	0x9
 	.byte	0x3
@@ -52123,7 +52075,7 @@ __func__.9940:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL13
-	.4byte	.LFE359
+	.4byte	.LFE358
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -52156,12 +52108,12 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST52:
-	.4byte	.LVL141
-	.4byte	.LVL142-1
+.LLST47:
+	.4byte	.LVL131
+	.4byte	.LVL132-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL142-1
+	.4byte	.LVL132-1
 	.4byte	.LFE248
 	.2byte	0x4
 	.byte	0xf3
@@ -52170,12 +52122,12 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST58:
-	.4byte	.LVL160
-	.4byte	.LVL161-1
+.LLST53:
+	.4byte	.LVL150
+	.4byte	.LVL151-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL161-1
+	.4byte	.LVL151-1
 	.4byte	.LFE247
 	.2byte	0x4
 	.byte	0xf3
@@ -52184,12 +52136,23 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST70:
-	.4byte	.LVL198
-	.4byte	.LVL204
+.LLST65:
+	.4byte	.LVL190
+	.4byte	.LVL196
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL204
+	.4byte	.LVL196
+	.4byte	.LVL208
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL208
+	.4byte	.LVL210
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL210
 	.4byte	.LFE255
 	.2byte	0x4
 	.byte	0xf3
@@ -52198,13 +52161,24 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST71:
-	.4byte	.LVL199
-	.4byte	.LVL204
+.LLST66:
+	.4byte	.LVL191
+	.4byte	.LVL196
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL204
-	.4byte	.LVL215
+	.4byte	.LVL196
+	.4byte	.LVL207
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL208
+	.4byte	.LVL210
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL210
+	.4byte	.LFE255
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -52212,19 +52186,34 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST72:
-	.4byte	.LVL207
-	.4byte	.LVL208
+.LLST67:
+	.4byte	.LVL198
+	.4byte	.LVL200
 	.2byte	0x5
 	.byte	0x72
 	.sleb128 0
 	.byte	0x36
 	.byte	0x1b
 	.byte	0x9f
-	.4byte	.LVL208
-	.4byte	.LVL213-1
+	.4byte	.LVL200
+	.4byte	.LVL205-1
 	.2byte	0xd
-	.byte	0x78
+	.byte	0x7a
+	.sleb128 2
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x36
+	.byte	0x1b
+	.byte	0x9f
+	.4byte	.LVL210
+	.4byte	.LFE255
+	.2byte	0xd
+	.byte	0x7a
 	.sleb128 2
 	.byte	0x94
 	.byte	0x2
@@ -52238,9 +52227,13 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST73:
-	.4byte	.LVL201
-	.4byte	.LVL204
+.LLST68:
+	.4byte	.LVL193
+	.4byte	.LVL195
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL195
+	.4byte	.LVL196
 	.2byte	0xb
 	.byte	0x70
 	.sleb128 0
@@ -52250,8 +52243,8 @@ __func__.9940:
 	.4byte	p_valid_page_count_table
 	.byte	0x6
 	.byte	0x22
-	.4byte	.LVL204
-	.4byte	.LVL206-1
+	.4byte	.LVL196
+	.4byte	.LVL197-1
 	.2byte	0xb
 	.byte	0x74
 	.sleb128 0
@@ -52261,42 +52254,79 @@ __func__.9940:
 	.4byte	p_valid_page_count_table
 	.byte	0x6
 	.byte	0x22
+	.4byte	.LVL208
+	.4byte	.LVL210
+	.2byte	0x1
+	.byte	0x52
 	.4byte	0
 	.4byte	0
-.LLST74:
-	.4byte	.LVL202
+.LLST69:
+	.4byte	.LVL193
+	.4byte	.LVL194
+	.2byte	0xe
+	.byte	0x72
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x75
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL194
 	.4byte	.LVL203
-	.2byte	0x6
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL208
+	.4byte	.LVL209
+	.2byte	0xe
+	.byte	0x72
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
 	.byte	0x75
 	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL209
+	.4byte	.LVL210
+	.2byte	0x10
 	.byte	0x72
 	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x7a
+	.sleb128 4
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
 	.byte	0x1e
 	.byte	0x9f
-	.4byte	.LVL203
-	.4byte	.LVL212
+	.4byte	.LVL210
+	.4byte	.LFE255
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST75:
-	.4byte	.LVL207
-	.4byte	.LVL208
-	.2byte	0xd
-	.byte	0x72
-	.sleb128 0
-	.byte	0x36
-	.byte	0x1b
-	.byte	0x31
-	.byte	0x24
-	.byte	0x3
-	.4byte	p_valid_page_count_table
-	.byte	0x6
-	.byte	0x22
-	.4byte	.LVL208
-	.4byte	.LVL213-1
-	.2byte	0x15
-	.byte	0x78
+.LLST70:
+	.4byte	.LVL199
+	.4byte	.LVL204
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL204
+	.4byte	.LVL205-1
+	.2byte	0x1c
+	.byte	0x7a
 	.sleb128 2
 	.byte	0x94
 	.byte	0x2
@@ -52305,42 +52335,91 @@ __func__.9940:
 	.byte	0x1a
 	.byte	0x36
 	.byte	0x1e
-	.byte	0x36
-	.byte	0x1b
+	.byte	0x31
+	.byte	0x26
+	.byte	0x11
+	.sleb128 -1431655765
+	.byte	0x1e
 	.byte	0x31
 	.byte	0x24
 	.byte	0x3
 	.4byte	p_valid_page_count_table
 	.byte	0x6
 	.byte	0x22
+	.4byte	.LVL210
+	.4byte	.LFE255
+	.2byte	0x1
+	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST76:
-	.4byte	.LVL209
+.LLST71:
+	.4byte	.LVL201
+	.4byte	.LVL202
+	.2byte	0xe
+	.byte	0x70
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x73
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL202
+	.4byte	.LVL205-1
+	.2byte	0x1
+	.byte	0x53
 	.4byte	.LVL210
-	.2byte	0x6
+	.4byte	.LVL211
+	.2byte	0xe
+	.byte	0x70
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
 	.byte	0x73
 	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL211
+	.4byte	.LFE255
+	.2byte	0x10
 	.byte	0x70
 	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x72
+	.sleb128 4
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
 	.byte	0x1e
 	.byte	0x9f
-	.4byte	.LVL210
-	.4byte	.LVL213-1
-	.2byte	0x1
-	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST77:
-	.4byte	.LVL200
-	.4byte	.LVL215
+.LLST72:
+	.4byte	.LVL192
+	.4byte	.LVL207
 	.2byte	0x1
-	.byte	0x58
+	.byte	0x5a
+	.4byte	.LVL208
+	.4byte	.LFE255
+	.2byte	0x1
+	.byte	0x5a
 	.4byte	0
 	.4byte	0
-.LLST78:
-	.4byte	.LVL207
-	.4byte	.LVL208
+.LLST73:
+	.4byte	.LVL198
+	.4byte	.LVL200
 	.2byte	0xa
 	.byte	0x3
 	.4byte	p_data_block_list_table
@@ -52349,76 +52428,22 @@ __func__.9940:
 	.sleb128 0
 	.byte	0x22
 	.byte	0x9f
-	.4byte	.LVL208
-	.4byte	.LVL213-1
+	.4byte	.LVL200
+	.4byte	.LVL205-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST79:
-	.4byte	.LVL216
-	.4byte	.LVL219
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL219
-	.4byte	.LVL221
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL221
-	.4byte	.LVL222-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL222-1
-	.4byte	.LVL223
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL223
-	.4byte	.LFE258
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST80:
-	.4byte	.LVL216
-	.4byte	.LVL217
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL218
-	.4byte	.LVL223
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST81:
-	.4byte	.LVL216
-	.4byte	.LVL219
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 12
-	.4byte	.LVL221
-	.4byte	.LVL222-1
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 12
-	.4byte	0
-	.4byte	0
-.LLST82:
-	.4byte	.LVL219
-	.4byte	.LVL221
+	.4byte	.LVL210
+	.4byte	.LFE255
 	.2byte	0x1
-	.byte	0x54
-	.4byte	0
+	.byte	0x52
 	.4byte	0
-.LLST86:
-	.4byte	.LVL244
-	.4byte	.LVL245
+	.4byte	0
+.LLST77:
+	.4byte	.LVL232
+	.4byte	.LVL233
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL245
+	.4byte	.LVL233
 	.4byte	.LFE269
 	.2byte	0x4
 	.byte	0xf3
@@ -52427,23 +52452,23 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST87:
-	.4byte	.LVL247
-	.4byte	.LVL248-1
+.LLST78:
+	.4byte	.LVL235
+	.4byte	.LVL236-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL248-1
-	.4byte	.LVL248
+	.4byte	.LVL236-1
+	.4byte	.LVL236
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL248
-	.4byte	.LVL249
+	.4byte	.LVL236
+	.4byte	.LVL237
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL249
+	.4byte	.LVL237
 	.4byte	.LFE275
 	.2byte	0x4
 	.byte	0xf3
@@ -52452,23 +52477,23 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST88:
-	.4byte	.LVL247
-	.4byte	.LVL248-1
+.LLST79:
+	.4byte	.LVL235
+	.4byte	.LVL236-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL248-1
-	.4byte	.LVL248
+	.4byte	.LVL236-1
+	.4byte	.LVL236
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL248
-	.4byte	.LVL250
+	.4byte	.LVL236
+	.4byte	.LVL238
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL250
+	.4byte	.LVL238
 	.4byte	.LFE275
 	.2byte	0x4
 	.byte	0xf3
@@ -52477,34 +52502,34 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST93:
-	.4byte	.LVL264
-	.4byte	.LVL266
+.LLST84:
+	.4byte	.LVL252
+	.4byte	.LVL254
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL267
+	.4byte	.LVL255
 	.4byte	.LFE285
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST94:
-	.4byte	.LVL265
-	.4byte	.LVL266
+.LLST85:
+	.4byte	.LVL253
+	.4byte	.LVL254
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL267
+	.4byte	.LVL255
 	.4byte	.LFE285
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST120:
-	.4byte	.LVL485
-	.4byte	.LVL487-1
+.LLST112:
+	.4byte	.LVL475
+	.4byte	.LVL477-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL487-1
+	.4byte	.LVL477-1
 	.4byte	.LFE300
 	.2byte	0x4
 	.byte	0xf3
@@ -52513,13 +52538,103 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST121:
-	.4byte	.LVL486
-	.4byte	.LVL487-1
+.LLST113:
+	.4byte	.LVL476
+	.4byte	.LVL477-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL487-1
-	.4byte	.LVL487
+	.4byte	.LVL477-1
+	.4byte	.LVL477
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST169:
+	.4byte	.LVL625
+	.4byte	.LVL627-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL627-1
+	.4byte	.LFE243
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST170:
+	.4byte	.LVL625
+	.4byte	.LVL627-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL627-1
+	.4byte	.LFE243
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST171:
+	.4byte	.LVL626
+	.4byte	.LVL627-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL627-1
+	.4byte	.LVL631
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST172:
+	.4byte	.LVL626
+	.4byte	.LVL627-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL627-1
+	.4byte	.LVL631
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST173:
+	.4byte	.LVL626
+	.4byte	.LVL631
+	.2byte	0x6
+	.byte	0x3
+	.4byte	gSysFreeQueue
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST174:
+	.4byte	.LVL628
+	.4byte	.LVL630
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST187:
+	.4byte	.LVL697
+	.4byte	.LVL700-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL700-1
+	.4byte	.LVL704
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL704
+	.4byte	.LFE258
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -52527,9 +52642,36 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
+.LLST188:
+	.4byte	.LVL697
+	.4byte	.LVL698
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL699
+	.4byte	.LVL704
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST189:
+	.4byte	.LVL697
+	.4byte	.LVL700-1
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 12
+	.4byte	0
+	.4byte	0
+.LLST190:
+	.4byte	.LVL702
+	.4byte	.LVL703
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
 .LLST240:
-	.4byte	.LVL918
-	.4byte	.LVL922
+	.4byte	.LVL926
+	.4byte	.LVL930
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x800
@@ -52537,8 +52679,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL923
-	.4byte	.LVL924
+	.4byte	.LVL931
+	.4byte	.LVL932
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x801
@@ -52546,8 +52688,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL924
-	.4byte	.LVL925
+	.4byte	.LVL932
+	.4byte	.LVL933
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x800
@@ -52558,36 +52700,36 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST282:
-	.4byte	.LVL1141
-	.4byte	.LVL1143
+	.4byte	.LVL1149
+	.4byte	.LVL1151
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1143
 	.4byte	.LVL1151
+	.4byte	.LVL1159
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1151
+	.4byte	.LVL1159
 	.4byte	.LFE347
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
 .LLST283:
-	.4byte	.LVL1142
-	.4byte	.LVL1144
+	.4byte	.LVL1150
+	.4byte	.LVL1152
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
 .LLST303:
-	.4byte	.LVL1226
-	.4byte	.LVL1227
+	.4byte	.LVL1234
+	.4byte	.LVL1235
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1227
+	.4byte	.LVL1235
 	.4byte	.LFE320
 	.2byte	0x4
 	.byte	0xf3
@@ -52597,90 +52739,90 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST304:
-	.4byte	.LVL1227
-	.4byte	.LVL1228
+	.4byte	.LVL1235
+	.4byte	.LVL1236
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1229
-	.4byte	.LVL1233
+	.4byte	.LVL1237
+	.4byte	.LVL1241
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1233
-	.4byte	.LVL1234
+	.4byte	.LVL1241
+	.4byte	.LVL1242
 	.2byte	0x3
 	.byte	0x76
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1235
+	.4byte	.LVL1243
 	.4byte	.LFE320
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
 .LLST305:
-	.4byte	.LVL1232
-	.4byte	.LVL1239
+	.4byte	.LVL1240
+	.4byte	.LVL1247
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1239
-	.4byte	.LVL1240
+	.4byte	.LVL1247
+	.4byte	.LVL1248
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1240
-	.4byte	.LVL1241
+	.4byte	.LVL1248
+	.4byte	.LVL1249
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1242
+	.4byte	.LVL1250
 	.4byte	.LFE320
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
 .LLST306:
-	.4byte	.LVL1238
-	.4byte	.LVL1240
+	.4byte	.LVL1246
+	.4byte	.LVL1248
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1242
-	.4byte	.LVL1243
+	.4byte	.LVL1250
+	.4byte	.LVL1251
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1244
+	.4byte	.LVL1252
 	.4byte	.LFE320
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
 .LLST307:
-	.4byte	.LVL1245
-	.4byte	.LVL1247
+	.4byte	.LVL1253
+	.4byte	.LVL1255
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1247
-	.4byte	.LVL1253
+	.4byte	.LVL1255
+	.4byte	.LVL1261
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1253
-	.4byte	.LVL1254
+	.4byte	.LVL1261
+	.4byte	.LVL1262
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1254
-	.4byte	.LVL1255
+	.4byte	.LVL1262
+	.4byte	.LVL1263
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1255
-	.4byte	.LVL1256-1
+	.4byte	.LVL1263
+	.4byte	.LVL1264-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1256-1
+	.4byte	.LVL1264-1
 	.4byte	.LFE304
 	.2byte	0x4
 	.byte	0xf3
@@ -52690,15 +52832,15 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST308:
-	.4byte	.LVL1246
-	.4byte	.LVL1253
+	.4byte	.LVL1254
+	.4byte	.LVL1261
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
 .LLST311:
-	.4byte	.LVL1268
-	.4byte	.LVL1269-1
+	.4byte	.LVL1276
+	.4byte	.LVL1277-1
 	.2byte	0x9
 	.byte	0x3
 	.4byte	g_MaxLpn
@@ -52706,19 +52848,19 @@ __func__.9940:
 	.byte	0x31
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL1269-1
-	.4byte	.LVL1273
+	.4byte	.LVL1277-1
+	.4byte	.LVL1281
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1274
-	.4byte	.LVL1280
+	.4byte	.LVL1282
+	.4byte	.LVL1288
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
 .LLST312:
-	.4byte	.LVL1268
-	.4byte	.LVL1269-1
+	.4byte	.LVL1276
+	.4byte	.LVL1277-1
 	.2byte	0xe
 	.byte	0x3
 	.4byte	c_ftl_nand_planes_num
@@ -52730,8 +52872,8 @@ __func__.9940:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.4byte	.LVL1269-1
-	.4byte	.LVL1272
+	.4byte	.LVL1277-1
+	.4byte	.LVL1280
 	.2byte	0x9
 	.byte	0x78
 	.sleb128 0
@@ -52741,8 +52883,8 @@ __func__.9940:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.4byte	.LVL1274
-	.4byte	.LVL1276
+	.4byte	.LVL1282
+	.4byte	.LVL1284
 	.2byte	0x9
 	.byte	0x78
 	.sleb128 0
@@ -52755,110 +52897,110 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST313:
-	.4byte	.LVL1270
-	.4byte	.LVL1273
+	.4byte	.LVL1278
+	.4byte	.LVL1281
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1274
-	.4byte	.LVL1280
+	.4byte	.LVL1282
+	.4byte	.LVL1288
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST398:
-	.4byte	.LVL1715
-	.4byte	.LVL1716
+.LLST397:
+	.4byte	.LVL1718
+	.4byte	.LVL1719
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1716
-	.4byte	.LVL1730
+	.4byte	.LVL1719
+	.4byte	.LVL1733
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1730
-	.4byte	.LVL1731
+	.4byte	.LVL1733
+	.4byte	.LVL1734
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1731
-	.4byte	.LVL1747
+	.4byte	.LVL1734
+	.4byte	.LVL1750
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1747
-	.4byte	.LVL1752
+	.4byte	.LVL1750
+	.4byte	.LVL1755
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1752
-	.4byte	.LVL1753
+	.4byte	.LVL1755
+	.4byte	.LVL1756
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1753
-	.4byte	.LVL1755
+	.4byte	.LVL1756
+	.4byte	.LVL1758
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1755
-	.4byte	.LVL1756
+	.4byte	.LVL1758
+	.4byte	.LVL1759
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1756
-	.4byte	.LVL1807
+	.4byte	.LVL1759
+	.4byte	.LVL1809
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1807
-	.4byte	.LVL1811
+	.4byte	.LVL1809
+	.4byte	.LVL1813
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1811
-	.4byte	.LVL1812
+	.4byte	.LVL1813
+	.4byte	.LVL1814
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1812
+	.4byte	.LVL1814
 	.4byte	.LFE322
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST399:
-	.4byte	.LVL1715
-	.4byte	.LVL1717
+.LLST398:
+	.4byte	.LVL1718
+	.4byte	.LVL1720
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1717
-	.4byte	.LVL1731
+	.4byte	.LVL1720
+	.4byte	.LVL1734
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL1731
-	.4byte	.LVL1732-1
+	.4byte	.LVL1734
+	.4byte	.LVL1735-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1732-1
-	.4byte	.LVL1807
+	.4byte	.LVL1735-1
+	.4byte	.LVL1809
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL1807
-	.4byte	.LVL1808
+	.4byte	.LVL1809
+	.4byte	.LVL1810
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1808
+	.4byte	.LVL1810
 	.4byte	.LFE322
 	.2byte	0x4
 	.byte	0xf3
@@ -52867,22 +53009,22 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST400:
-	.4byte	.LVL1717
-	.4byte	.LVL1730
+.LLST399:
+	.4byte	.LVL1720
+	.4byte	.LVL1733
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL1733
-	.4byte	.LVL1806
+	.4byte	.LVL1736
+	.4byte	.LVL1808
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL1808
+	.4byte	.LVL1810
 	.4byte	.LFE322
 	.2byte	0x4
 	.byte	0xf3
@@ -52891,76 +53033,76 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST401:
-	.4byte	.LVL1717
-	.4byte	.LVL1730
+.LLST400:
+	.4byte	.LVL1720
+	.4byte	.LVL1733
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1733
-	.4byte	.LVL1747
+	.4byte	.LVL1736
+	.4byte	.LVL1750
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1747
-	.4byte	.LVL1752
+	.4byte	.LVL1750
+	.4byte	.LVL1755
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1752
-	.4byte	.LVL1753
+	.4byte	.LVL1755
+	.4byte	.LVL1756
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1753
-	.4byte	.LVL1755
+	.4byte	.LVL1756
+	.4byte	.LVL1758
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1755
-	.4byte	.LVL1756
+	.4byte	.LVL1758
+	.4byte	.LVL1759
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1756
-	.4byte	.LVL1806
+	.4byte	.LVL1759
+	.4byte	.LVL1808
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1808
-	.4byte	.LVL1811
+	.4byte	.LVL1810
+	.4byte	.LVL1813
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1811
-	.4byte	.LVL1812
+	.4byte	.LVL1813
+	.4byte	.LVL1814
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1812
+	.4byte	.LVL1814
 	.4byte	.LFE322
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST402:
-	.4byte	.LVL1788
+.LLST401:
 	.4byte	.LVL1791
+	.4byte	.LVL1794
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST403:
-	.4byte	.LVL1774
-	.4byte	.LVL1783
+.LLST402:
+	.4byte	.LVL1777
+	.4byte	.LVL1786
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -56
-	.4byte	.LVL1783
-	.4byte	.LVL1784
+	.4byte	.LVL1786
+	.4byte	.LVL1787
 	.2byte	0x7
 	.byte	0x91
 	.sleb128 -56
@@ -52969,40 +53111,40 @@ __func__.9940:
 	.byte	0x23
 	.uleb128 0x1
 	.byte	0x9f
-	.4byte	.LVL1784
-	.4byte	.LVL1806
+	.4byte	.LVL1787
+	.4byte	.LVL1808
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -56
 	.4byte	0
 	.4byte	0
-.LLST404:
-	.4byte	.LVL1775
+.LLST403:
 	.4byte	.LVL1778
+	.4byte	.LVL1781
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1778
-	.4byte	.LVL1779
+	.4byte	.LVL1781
+	.4byte	.LVL1782
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1779
-	.4byte	.LVL1780-1
+	.4byte	.LVL1782
+	.4byte	.LVL1783-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1780
-	.4byte	.LVL1781
+	.4byte	.LVL1783
+	.4byte	.LVL1784
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1782
-	.4byte	.LVL1795
+	.4byte	.LVL1785
+	.4byte	.LVL1798
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -60
-	.4byte	.LVL1796
-	.4byte	.LVL1797
+	.4byte	.LVL1799
+	.4byte	.LVL1800
 	.2byte	0x7
 	.byte	0x91
 	.sleb128 -60
@@ -53013,76 +53155,76 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST405:
-	.4byte	.LVL1775
-	.4byte	.LVL1795
+.LLST404:
+	.4byte	.LVL1778
+	.4byte	.LVL1798
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -68
-	.4byte	.LVL1796
-	.4byte	.LVL1797
+	.4byte	.LVL1799
+	.4byte	.LVL1800
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -68
 	.4byte	0
 	.4byte	0
-.LLST406:
-	.4byte	.LVL1776
-	.4byte	.LVL1777
+.LLST405:
+	.4byte	.LVL1779
+	.4byte	.LVL1780
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1777
-	.4byte	.LVL1779
+	.4byte	.LVL1780
+	.4byte	.LVL1782
 	.2byte	0x2
 	.byte	0x71
 	.sleb128 0
 	.4byte	0
 	.4byte	0
-.LLST407:
-	.4byte	.LVL1771
-	.4byte	.LVL1806
+.LLST406:
+	.4byte	.LVL1774
+	.4byte	.LVL1808
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -52
 	.4byte	0
 	.4byte	0
-.LLST408:
-	.4byte	.LVL1785
-	.4byte	.LVL1786
+.LLST407:
+	.4byte	.LVL1788
+	.4byte	.LVL1789
 	.2byte	0x2
 	.byte	0x72
 	.sleb128 12
-	.4byte	.LVL1786
-	.4byte	.LVL1787
+	.4byte	.LVL1789
+	.4byte	.LVL1790
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1787
-	.4byte	.LVL1795
+	.4byte	.LVL1790
+	.4byte	.LVL1798
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -64
 	.4byte	0
 	.4byte	0
-.LLST409:
-	.4byte	.LVL1721
-	.4byte	.LVL1722
+.LLST408:
+	.4byte	.LVL1724
+	.4byte	.LVL1725
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1734
-	.4byte	.LVL1735
+	.4byte	.LVL1737
+	.4byte	.LVL1738
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST449:
-	.4byte	.LVL1999
-	.4byte	.LVL2000
+.LLST448:
+	.4byte	.LVL1987
+	.4byte	.LVL1988
 	.2byte	0x6
 	.byte	0x3
 	.4byte	g_active_superblock
 	.byte	0x9f
-	.4byte	.LVL2000
-	.4byte	.LVL2006
+	.4byte	.LVL1988
+	.4byte	.LVL1992
 	.2byte	0x6
 	.byte	0x3
 	.4byte	g_buffer_superblock
@@ -53099,8 +53241,8 @@ __func__.9940:
 	.2byte	0
 	.4byte	.LFB352
 	.4byte	.LFE352-.LFB352
-	.4byte	.LFB359
-	.4byte	.LFE359-.LFB359
+	.4byte	.LFB358
+	.4byte	.LFE358-.LFB358
 	.4byte	.LFB205
 	.4byte	.LFE205-.LFB205
 	.4byte	.LFB206
@@ -53111,6 +53253,8 @@ __func__.9940:
 	.4byte	.LFE208-.LFB208
 	.4byte	.LFB211
 	.4byte	.LFE211-.LFB211
+	.4byte	.LFB219
+	.4byte	.LFE219-.LFB219
 	.4byte	.LFB224
 	.4byte	.LFE224-.LFB224
 	.4byte	.LFB225
@@ -53137,8 +53281,6 @@ __func__.9940:
 	.4byte	.LFE244-.LFB244
 	.4byte	.LFB245
 	.4byte	.LFE245-.LFB245
-	.4byte	.LFB246
-	.4byte	.LFE246-.LFB246
 	.4byte	.LFB249
 	.4byte	.LFE249-.LFB249
 	.4byte	.LFB248
@@ -53157,8 +53299,6 @@ __func__.9940:
 	.4byte	.LFE254-.LFB254
 	.4byte	.LFB255
 	.4byte	.LFE255-.LFB255
-	.4byte	.LFB258
-	.4byte	.LFE258-.LFB258
 	.4byte	.LFB263
 	.4byte	.LFE263-.LFB263
 	.4byte	.LFB269
@@ -53225,6 +53365,10 @@ __func__.9940:
 	.4byte	.LFE243-.LFB243
 	.4byte	.LFB212
 	.4byte	.LFE212-.LFB212
+	.4byte	.LFB246
+	.4byte	.LFE246-.LFB246
+	.4byte	.LFB258
+	.4byte	.LFE258-.LFB258
 	.4byte	.LFB349
 	.4byte	.LFE349-.LFB349
 	.4byte	.LFB209
@@ -53319,20 +53463,18 @@ __func__.9940:
 	.4byte	.LFE290-.LFB290
 	.4byte	.LFB272
 	.4byte	.LFE272-.LFB272
-	.4byte	.LFB292
-	.4byte	.LFE292-.LFB292
-	.4byte	.LFB302
-	.4byte	.LFE302-.LFB302
-	.4byte	.LFB218
-	.4byte	.LFE218-.LFB218
-	.4byte	.LFB219
-	.4byte	.LFE219-.LFB219
 	.4byte	.LFB215
 	.4byte	.LFE215-.LFB215
 	.4byte	.LFB216
 	.4byte	.LFE216-.LFB216
 	.4byte	.LFB221
 	.4byte	.LFE221-.LFB221
+	.4byte	.LFB292
+	.4byte	.LFE292-.LFB292
+	.4byte	.LFB302
+	.4byte	.LFE302-.LFB302
+	.4byte	.LFB218
+	.4byte	.LFE218-.LFB218
 	.4byte	.LFB311
 	.4byte	.LFE311-.LFB311
 	.4byte	.LFB314
@@ -53369,104 +53511,88 @@ __func__.9940:
 	.4byte	0
 	.section	.debug_ranges,"",%progbits
 .Ldebug_ranges0:
-	.4byte	.LBB166
-	.4byte	.LBE166
-	.4byte	.LBB169
-	.4byte	.LBE169
-	.4byte	0
-	.4byte	0
-	.4byte	.LBB170
-	.4byte	.LBE170
-	.4byte	.LBB173
-	.4byte	.LBE173
-	.4byte	0
-	.4byte	0
-	.4byte	.LBB179
-	.4byte	.LBE179
-	.4byte	.LBB182
-	.4byte	.LBE182
-	.4byte	0
-	.4byte	0
 	.4byte	.LBB185
 	.4byte	.LBE185
 	.4byte	.LBB188
 	.4byte	.LBE188
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB199
-	.4byte	.LBE199
+	.4byte	.LBB189
+	.4byte	.LBE189
+	.4byte	.LBB192
+	.4byte	.LBE192
+	.4byte	0
+	.4byte	0
+	.4byte	.LBB195
+	.4byte	.LBE195
+	.4byte	.LBB198
+	.4byte	.LBE198
+	.4byte	0
+	.4byte	0
+	.4byte	.LBB201
+	.4byte	.LBE201
 	.4byte	.LBB204
 	.4byte	.LBE204
-	.4byte	.LBB205
-	.4byte	.LBE205
-	.4byte	.LBB206
-	.4byte	.LBE206
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB223
-	.4byte	.LBE223
-	.4byte	.LBB224
-	.4byte	.LBE224
+	.4byte	.LBB207
+	.4byte	.LBE207
+	.4byte	.LBB210
+	.4byte	.LBE210
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB229
-	.4byte	.LBE229
-	.4byte	.LBB230
-	.4byte	.LBE230
+	.4byte	.LBB213
+	.4byte	.LBE213
+	.4byte	.LBB218
+	.4byte	.LBE218
+	.4byte	.LBB219
+	.4byte	.LBE219
+	.4byte	.LBB220
+	.4byte	.LBE220
 	.4byte	0
 	.4byte	0
 	.4byte	.LBB237
 	.4byte	.LBE237
-	.4byte	.LBB239
-	.4byte	.LBE239
+	.4byte	.LBB238
+	.4byte	.LBE238
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB247
-	.4byte	.LBE247
-	.4byte	.LBB250
-	.4byte	.LBE250
+	.4byte	.LBB252
+	.4byte	.LBE252
+	.4byte	.LBB256
+	.4byte	.LBE256
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB253
-	.4byte	.LBE253
+	.4byte	.LBB255
+	.4byte	.LBE255
 	.4byte	.LBB257
 	.4byte	.LBE257
-	.4byte	.LBB258
-	.4byte	.LBE258
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB267
-	.4byte	.LBE267
-	.4byte	.LBB268
-	.4byte	.LBE268
+	.4byte	.LBB262
+	.4byte	.LBE262
+	.4byte	.LBB263
+	.4byte	.LBE263
 	.4byte	0
 	.4byte	0
 	.4byte	.LBB270
 	.4byte	.LBE270
-	.4byte	.LBB271
-	.4byte	.LBE271
-	.4byte	0
-	.4byte	0
 	.4byte	.LBB272
 	.4byte	.LBE272
-	.4byte	.LBB273
-	.4byte	.LBE273
-	.4byte	.LBB274
-	.4byte	.LBE274
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB291
-	.4byte	.LBE291
-	.4byte	.LBB297
-	.4byte	.LBE297
-	.4byte	.LBB298
-	.4byte	.LBE298
+	.4byte	.LBB280
+	.4byte	.LBE280
+	.4byte	.LBB283
+	.4byte	.LBE283
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB293
-	.4byte	.LBE293
-	.4byte	.LBB294
-	.4byte	.LBE294
+	.4byte	.LBB286
+	.4byte	.LBE286
+	.4byte	.LBB290
+	.4byte	.LBE290
+	.4byte	.LBB291
+	.4byte	.LBE291
 	.4byte	0
 	.4byte	0
 	.4byte	.LBB300
@@ -53475,16 +53601,50 @@ __func__.9940:
 	.4byte	.LBE301
 	.4byte	0
 	.4byte	0
+	.4byte	.LBB303
+	.4byte	.LBE303
+	.4byte	.LBB304
+	.4byte	.LBE304
+	.4byte	0
+	.4byte	0
+	.4byte	.LBB305
+	.4byte	.LBE305
+	.4byte	.LBB306
+	.4byte	.LBE306
 	.4byte	.LBB307
 	.4byte	.LBE307
-	.4byte	.LBB308
-	.4byte	.LBE308
+	.4byte	0
+	.4byte	0
+	.4byte	.LBB324
+	.4byte	.LBE324
+	.4byte	.LBB330
+	.4byte	.LBE330
+	.4byte	.LBB331
+	.4byte	.LBE331
+	.4byte	0
+	.4byte	0
+	.4byte	.LBB326
+	.4byte	.LBE326
+	.4byte	.LBB327
+	.4byte	.LBE327
+	.4byte	0
+	.4byte	0
+	.4byte	.LBB333
+	.4byte	.LBE333
+	.4byte	.LBB334
+	.4byte	.LBE334
+	.4byte	0
+	.4byte	0
+	.4byte	.LBB340
+	.4byte	.LBE340
+	.4byte	.LBB341
+	.4byte	.LBE341
 	.4byte	0
 	.4byte	0
 	.4byte	.LFB352
 	.4byte	.LFE352
-	.4byte	.LFB359
-	.4byte	.LFE359
+	.4byte	.LFB358
+	.4byte	.LFE358
 	.4byte	.LFB205
 	.4byte	.LFE205
 	.4byte	.LFB206
@@ -53495,6 +53655,8 @@ __func__.9940:
 	.4byte	.LFE208
 	.4byte	.LFB211
 	.4byte	.LFE211
+	.4byte	.LFB219
+	.4byte	.LFE219
 	.4byte	.LFB224
 	.4byte	.LFE224
 	.4byte	.LFB225
@@ -53521,8 +53683,6 @@ __func__.9940:
 	.4byte	.LFE244
 	.4byte	.LFB245
 	.4byte	.LFE245
-	.4byte	.LFB246
-	.4byte	.LFE246
 	.4byte	.LFB249
 	.4byte	.LFE249
 	.4byte	.LFB248
@@ -53541,8 +53701,6 @@ __func__.9940:
 	.4byte	.LFE254
 	.4byte	.LFB255
 	.4byte	.LFE255
-	.4byte	.LFB258
-	.4byte	.LFE258
 	.4byte	.LFB263
 	.4byte	.LFE263
 	.4byte	.LFB269
@@ -53609,6 +53767,10 @@ __func__.9940:
 	.4byte	.LFE243
 	.4byte	.LFB212
 	.4byte	.LFE212
+	.4byte	.LFB246
+	.4byte	.LFE246
+	.4byte	.LFB258
+	.4byte	.LFE258
 	.4byte	.LFB349
 	.4byte	.LFE349
 	.4byte	.LFB209
@@ -53703,20 +53865,18 @@ __func__.9940:
 	.4byte	.LFE290
 	.4byte	.LFB272
 	.4byte	.LFE272
-	.4byte	.LFB292
-	.4byte	.LFE292
-	.4byte	.LFB302
-	.4byte	.LFE302
-	.4byte	.LFB218
-	.4byte	.LFE218
-	.4byte	.LFB219
-	.4byte	.LFE219
 	.4byte	.LFB215
 	.4byte	.LFE215
 	.4byte	.LFB216
 	.4byte	.LFE216
 	.4byte	.LFB221
 	.4byte	.LFE221
+	.4byte	.LFB292
+	.4byte	.LFE292
+	.4byte	.LFB302
+	.4byte	.LFE302
+	.4byte	.LFB218
+	.4byte	.LFE218
 	.4byte	.LFB311
 	.4byte	.LFE311
 	.4byte	.LFB314
@@ -53754,37 +53914,37 @@ __func__.9940:
 	.section	.debug_line,"",%progbits
 .Ldebug_line0:
 	.section	.debug_str,"MS",%progbits,1
-.LASF728:
+.LASF727:
 	.ascii	"FtlEctTblFlush\000"
-.LASF593:
+.LASF592:
 	.ascii	"gc_page_num\000"
-.LASF609:
+.LASF608:
 	.ascii	"superBlk\000"
-.LASF499:
+.LASF498:
 	.ascii	"g_gc_bad_block_temp_num\000"
 .LASF363:
 	.ascii	"all_blk_used_slc_mode\000"
 .LASF43:
 	.ascii	"reserved\000"
-.LASF508:
+.LASF507:
 	.ascii	"g_totle_read_sector\000"
-.LASF574:
+.LASF573:
 	.ascii	"__func__\000"
 .LASF419:
 	.ascii	"c_ftl_nand_sys_blks_per_plane\000"
-.LASF733:
+.LASF732:
 	.ascii	"nSec\000"
-.LASF729:
+.LASF728:
 	.ascii	"forceFlush\000"
 .LASF107:
 	.ascii	"bootm_headers\000"
-.LASF453:
+.LASF452:
 	.ascii	"p_gc_data_buf\000"
 .LASF125:
 	.ascii	"rd_end\000"
-.LASF492:
+.LASF491:
 	.ascii	"p_gc_blk_tbl\000"
-.LASF788:
+.LASF787:
 	.ascii	"FtlFreeSysBlkQueueOut\000"
 .LASF324:
 	.ascii	"ftl_bbt_blk_header\000"
@@ -53792,33 +53952,33 @@ __func__.9940:
 	.ascii	"eth_device\000"
 .LASF306:
 	.ascii	"sign\000"
-.LASF833:
+.LASF831:
 	.ascii	"sctidx\000"
-.LASF670:
+.LASF669:
 	.ascii	"Ftl_load_ext_data\000"
 .LASF96:
 	.ascii	"ih_comp\000"
-.LASF587:
+.LASF586:
 	.ascii	"block\000"
 .LASF22:
 	.ascii	"_Bool\000"
-.LASF652:
+.LASF651:
 	.ascii	"min_ec\000"
-.LASF604:
+.LASF603:
 	.ascii	"req_read_temp\000"
 .LASF279:
 	.ascii	"p_spare\000"
-.LASF686:
+.LASF685:
 	.ascii	"recovery_cur_page_ver\000"
-.LASF506:
+.LASF505:
 	.ascii	"g_totle_write_page_count\000"
 .LASF245:
 	.ascii	"net_root_path\000"
-.LASF625:
+.LASF624:
 	.ascii	"lookup_ppa\000"
-.LASF818:
+.LASF816:
 	.ascii	"FtlBbmTblFlush\000"
-.LASF612:
+.LASF611:
 	.ascii	"Ftl_get_new_temp_ppa\000"
 .LASF327:
 	.ascii	"ftl_data_blk_header\000"
@@ -53832,73 +53992,73 @@ __func__.9940:
 	.ascii	"des_ppa\000"
 .LASF237:
 	.ascii	"priv\000"
-.LASF778:
+.LASF777:
 	.ascii	"insert_free_list\000"
-.LASF774:
+.LASF773:
 	.ascii	"pHead\000"
 .LASF21:
 	.ascii	"___strtok\000"
 .LASF198:
 	.ascii	"UCLASS_SPI_GENERIC\000"
-.LASF477:
+.LASF476:
 	.ascii	"g_l2p_last_update_region_id\000"
-.LASF699:
+.LASF698:
 	.ascii	"ftl_sb_update_avl_pages\000"
-.LASF572:
+.LASF571:
 	.ascii	"FlashProgPages\000"
-.LASF857:
+.LASF855:
 	.ascii	"test_page_num\000"
-.LASF685:
+.LASF684:
 	.ascii	"lookup_superblock_id\000"
 .LASF420:
 	.ascii	"c_ftl_nand_init_sys_blks_per_plane\000"
-.LASF866:
+.LASF864:
 	.ascii	"FtlConstantsInit\000"
-.LASF596:
+.LASF595:
 	.ascii	"num_io\000"
-.LASF869:
+.LASF867:
 	.ascii	"FtlPrintInfo\000"
-.LASF745:
+.LASF744:
 	.ascii	"l2p_flush\000"
 .LASF378:
 	.ascii	"rear\000"
 .LASF305:
 	.ascii	"ftl_l2p_map_info\000"
-.LASF521:
+.LASF520:
 	.ascii	"g_in_swl_replace\000"
 .LASF404:
 	.ascii	"c_ftl_nand_page_pre_slc_blk\000"
 .LASF243:
 	.ascii	"net_nis_domain\000"
-.LASF765:
+.LASF764:
 	.ascii	"List_update_data_list\000"
-.LASF853:
+.LASF851:
 	.ascii	"create_first_buffer_superblock\000"
-.LASF503:
+.LASF502:
 	.ascii	"g_gc_merge_free_blk_threshold\000"
-.LASF694:
+.LASF693:
 	.ascii	"last_mlc_page_version\000"
-.LASF631:
+.LASF630:
 	.ascii	"IsBlkInGcList\000"
 .LASF235:
 	.ascii	"next\000"
 .LASF312:
 	.ascii	"pBlkVpcTbl\000"
-.LASF698:
+.LASF697:
 	.ascii	"FtlReUsePrevPpa\000"
-.LASF659:
+.LASF658:
 	.ascii	"update_multiplier_value\000"
 .LASF411:
 	.ascii	"c_ftl_nand_totle_phy_blks\000"
-.LASF875:
+.LASF873:
 	.ascii	"memcmp\000"
 .LASF421:
 	.ascii	"c_ftl_nand_max_sys_blks\000"
-.LASF577:
-	.ascii	"PhyBlk\000"
 .LASF576:
+	.ascii	"PhyBlk\000"
+.LASF575:
 	.ascii	"FlashReadPages\000"
-.LASF479:
+.LASF478:
 	.ascii	"p_free_data_block_list_head\000"
 .LASF148:
 	.ascii	"UCLASS_AHCI\000"
@@ -53906,29 +54066,29 @@ __func__.9940:
 	.ascii	"UCLASS_I2C_MUX\000"
 .LASF263:
 	.ascii	"uclass_id\000"
-.LASF601:
+.LASF600:
 	.ascii	"get_new_gc_superblock\000"
-.LASF623:
+.LASF622:
 	.ascii	"BOPS_EN\000"
 .LASF241:
 	.ascii	"net_netmask\000"
-.LASF850:
+.LASF848:
 	.ascii	"bad_block_cnt\000"
 .LASF424:
 	.ascii	"c_ftl_nand_max_data_blks\000"
-.LASF560:
+.LASF559:
 	.ascii	"pvTo\000"
 .LASF117:
 	.ascii	"fit_noffset_rd\000"
 .LASF192:
 	.ascii	"UCLASS_RTC\000"
-.LASF810:
+.LASF808:
 	.ascii	"pBbtHeader\000"
 .LASF46:
 	.ascii	"bi_memsize\000"
 .LASF47:
 	.ascii	"bi_flashstart\000"
-.LASF762:
+.LASF761:
 	.ascii	"minValidPageCount\000"
 .LASF232:
 	.ascii	"recv\000"
@@ -53938,11 +54098,11 @@ __func__.9940:
 	.ascii	"UCLASS_SYSCON\000"
 .LASF153:
 	.ascii	"UCLASS_DISPLAY\000"
-.LASF519:
+.LASF518:
 	.ascii	"g_max_erase_count\000"
-.LASF568:
+.LASF567:
 	.ascii	"flash_type\000"
-.LASF529:
+.LASF528:
 	.ascii	"g_recovery_ppa_tbl\000"
 .LASF71:
 	.ascii	"IRQ_STACK_START_IN\000"
@@ -53950,23 +54110,23 @@ __func__.9940:
 	.ascii	"bi_dram\000"
 .LASF191:
 	.ascii	"UCLASS_RKNAND\000"
-.LASF581:
+.LASF580:
 	.ascii	"die_index\000"
-.LASF805:
+.LASF803:
 	.ascii	"ver2\000"
 .LASF434:
 	.ascii	"gSysFreeQueue\000"
 .LASF159:
 	.ascii	"UCLASS_I2C_EEPROM\000"
-.LASF533:
+.LASF532:
 	.ascii	"g_nand_phy_info\000"
-.LASF555:
+.LASF554:
 	.ascii	"check_spare_buf\000"
 .LASF144:
 	.ascii	"UCLASS_PCI_EMUL\000"
 .LASF72:
 	.ascii	"fdt_header\000"
-.LASF586:
+.LASF585:
 	.ascii	"ftl_free\000"
 .LASF429:
 	.ascii	"g_MaxLpn\000"
@@ -53974,23 +54134,23 @@ __func__.9940:
 	.ascii	"bufferPageOffset\000"
 .LASF387:
 	.ascii	"reversed\000"
-.LASF507:
+.LASF506:
 	.ascii	"g_totle_write_sector\000"
 .LASF75:
 	.ascii	"off_dt_struct\000"
 .LASF417:
 	.ascii	"c_ftl_nand_max_vendor_blks\000"
-.LASF769:
+.LASF768:
 	.ascii	"prev_valid_page_count\000"
-.LASF874:
+.LASF872:
 	.ascii	"FtlPrintInfo2buf\000"
-.LASF480:
+.LASF479:
 	.ascii	"p_data_block_list_head\000"
 .LASF265:
 	.ascii	"NETLOOP_CONTINUE\000"
-.LASF807:
+.LASF805:
 	.ascii	"P2V_plane\000"
-.LASF486:
+.LASF485:
 	.ascii	"g_gc_temp_superblock\000"
 .LASF195:
 	.ascii	"UCLASS_SPI\000"
@@ -53998,7 +54158,7 @@ __func__.9940:
 	.ascii	"c_ftl_nand_max_map_blks\000"
 .LASF302:
 	.ascii	"BbtMap\000"
-.LASF744:
+.LASF743:
 	.ascii	"found_lpa\000"
 .LASF209:
 	.ascii	"UCLASS_VIDEO_CONSOLE\000"
@@ -54006,31 +54166,31 @@ __func__.9940:
 	.ascii	"last_refresh_read_count\000"
 .LASF207:
 	.ascii	"UCLASS_VIDEO\000"
-.LASF616:
+.LASF615:
 	.ascii	"current_ppa\000"
-.LASF852:
+.LASF850:
 	.ascii	"create_first_active_superblock\000"
 .LASF313:
 	.ascii	"pMapPpnTbl\000"
 .LASF269:
 	.ascii	"net_state\000"
-.LASF725:
+.LASF724:
 	.ascii	"num_page\000"
 .LASF425:
 	.ascii	"ftl_gc_temp_power_lost_recovery_flag\000"
-.LASF615:
+.LASF614:
 	.ascii	"totle_num\000"
-.LASF732:
+.LASF731:
 	.ascii	"Index\000"
-.LASF682:
+.LASF681:
 	.ascii	"next_free_active_page\000"
-.LASF607:
+.LASF606:
 	.ascii	"spperBlk\000"
 .LASF65:
 	.ascii	"IRQ_STACK_START\000"
 .LASF132:
 	.ascii	"verify\000"
-.LASF714:
+.LASF713:
 	.ascii	"ftl_set_blk_mode\000"
 .LASF266:
 	.ascii	"NETLOOP_RESTART\000"
@@ -54038,27 +54198,27 @@ __func__.9940:
 	.ascii	"uint8\000"
 .LASF353:
 	.ascii	"write_page_count\000"
-.LASF611:
+.LASF610:
 	.ascii	"Ftl_gc_temp_data_write_back\000"
 .LASF295:
 	.ascii	"erase_blk\000"
-.LASF723:
+.LASF722:
 	.ascii	"re_save_vpndata\000"
-.LASF463:
+.LASF462:
 	.ascii	"p_valid_page_count_check_table\000"
-.LASF502:
+.LASF501:
 	.ascii	"g_gc_free_blk_threshold\000"
-.LASF482:
+.LASF481:
 	.ascii	"g_num_free_superblocks\000"
 .LASF226:
 	.ascii	"s_addr\000"
-.LASF820:
+.LASF818:
 	.ascii	"re_save_bbmdata\000"
 .LASF200:
 	.ascii	"UCLASS_SYSRESET\000"
-.LASF628:
+.LASF627:
 	.ascii	"FtlGcUpdatePage\000"
-.LASF812:
+.LASF810:
 	.ascii	"FtlLoadFactoryBbt\000"
 .LASF289:
 	.ascii	"sec_per_blk\000"
@@ -54072,11 +54232,11 @@ __func__.9940:
 	.ascii	"UCLASS_CROS_EC\000"
 .LASF407:
 	.ascii	"c_ftl_nand_sec_pre_page_shift\000"
-.LASF789:
+.LASF790:
 	.ascii	"IsInFreeQueue\000"
 .LASF236:
 	.ascii	"index\000"
-.LASF746:
+.LASF745:
 	.ascii	"select_l2p_ram_region\000"
 .LASF335:
 	.ascii	"maxDieNum\000"
@@ -54084,29 +54244,29 @@ __func__.9940:
 	.ascii	"byte_per_sec\000"
 .LASF278:
 	.ascii	"p_data\000"
-.LASF528:
+.LASF527:
 	.ascii	"g_recovery_page_min_ver\000"
-.LASF571:
+.LASF570:
 	.ascii	"block_size\000"
 .LASF90:
 	.ascii	"ih_load\000"
-.LASF836:
+.LASF834:
 	.ascii	"FtlProgPages\000"
-.LASF665:
+.LASF664:
 	.ascii	"error_flag\000"
 .LASF403:
 	.ascii	"c_ftl_nand_page_pre_blk\000"
-.LASF795:
+.LASF789:
 	.ascii	"blk_Id\000"
 .LASF213:
 	.ascii	"UCLASS_KEY\000"
-.LASF876:
+.LASF874:
 	.ascii	"memcpy\000"
 .LASF67:
 	.ascii	"_datarel_start_ofs\000"
 .LASF373:
 	.ascii	"List_Node\000"
-.LASF578:
+.LASF577:
 	.ascii	"p_die\000"
 .LASF314:
 	.ascii	"in_gc_mode\000"
@@ -54118,15 +54278,15 @@ __func__.9940:
 	.ascii	"UCLASS_IRQ\000"
 .LASF5:
 	.ascii	"__u8\000"
-.LASF494:
+.LASF493:
 	.ascii	"g_gc_page_offset\000"
 .LASF240:
 	.ascii	"net_gateway\000"
-.LASF803:
+.LASF801:
 	.ascii	"ftl_cmp_data_ver\000"
 .LASF430:
 	.ascii	"g_VaildLpn\000"
-.LASF471:
+.LASF470:
 	.ascii	"p_vendor_block_valid_page_count\000"
 .LASF262:
 	.ascii	"net_ping_ip\000"
@@ -54134,39 +54294,39 @@ __func__.9940:
 	.ascii	"type\000"
 .LASF40:
 	.ascii	"lmb_region\000"
-.LASF633:
+.LASF632:
 	.ascii	"numREQ\000"
 .LASF34:
 	.ascii	"protect\000"
-.LASF856:
+.LASF854:
 	.ascii	"max_test_page_num\000"
-.LASF705:
+.LASF704:
 	.ascii	"blk_id\000"
 .LASF349:
 	.ascii	"GlobalDataVersion\000"
-.LASF794:
+.LASF793:
 	.ascii	"erase_flag\000"
 .LASF362:
 	.ascii	"last_refresh_data_times\000"
-.LASF708:
+.LASF707:
 	.ascii	"totleBlkNum\000"
-.LASF679:
+.LASF678:
 	.ascii	"saved_active_page\000"
-.LASF777:
+.LASF776:
 	.ascii	"pTmp\000"
-.LASF605:
+.LASF604:
 	.ascii	"add_count\000"
-.LASF547:
+.LASF546:
 	.ascii	"ftl_gc_temp_block_bops_scan_page_addr\000"
 .LASF394:
 	.ascii	"c_ftl_nand_type\000"
-.LASF688:
+.LASF687:
 	.ascii	"recovery_flash_mode\000"
 .LASF138:
 	.ascii	"UCLASS_TEST\000"
-.LASF485:
+.LASF484:
 	.ascii	"g_buffer_superblock\000"
-.LASF650:
+.LASF649:
 	.ascii	"node_id\000"
 .LASF397:
 	.ascii	"c_ftl_nand_blks_per_die\000"
@@ -54178,7 +54338,7 @@ __func__.9940:
 	.ascii	"legacy_hdr_valid\000"
 .LASF203:
 	.ascii	"UCLASS_TPM\000"
-.LASF575:
+.LASF574:
 	.ascii	"read_req\000"
 .LASF432:
 	.ascii	"gBbtInfo\000"
@@ -54188,23 +54348,23 @@ __func__.9940:
 	.ascii	"sector_count\000"
 .LASF406:
 	.ascii	"c_ftl_nand_sec_pre_page\000"
-.LASF591:
+.LASF590:
 	.ascii	"mode\000"
-.LASF814:
+.LASF812:
 	.ascii	"FtlLoadBbt\000"
-.LASF561:
+.LASF560:
 	.ascii	"pvForm\000"
 .LASF323:
 	.ascii	"padding\000"
-.LASF460:
+.LASF459:
 	.ascii	"p_swl_mul_table\000"
-.LASF629:
+.LASF628:
 	.ascii	"src_ppa\000"
-.LASF683:
+.LASF682:
 	.ascii	"detected_active_page\000"
 .LASF389:
 	.ascii	"ftl_gc_page_item\000"
-.LASF549:
+.LASF548:
 	.ascii	"mem_malloc_start\000"
 .LASF210:
 	.ascii	"UCLASS_VIDEO_CRTC\000"
@@ -54212,127 +54372,125 @@ __func__.9940:
 	.ascii	"bi_ethspeed\000"
 .LASF98:
 	.ascii	"image_header_t\000"
-.LASF771:
+.LASF770:
 	.ascii	"pPrev\000"
-.LASF474:
+.LASF473:
 	.ascii	"g_totle_vendor_block\000"
-.LASF624:
+.LASF623:
 	.ascii	"superblock_id\000"
-.LASF595:
+.LASF594:
 	.ascii	"plane\000"
 .LASF11:
 	.ascii	"phys_addr_t\000"
 .LASF95:
 	.ascii	"ih_type\000"
-.LASF846:
+.LASF844:
 	.ascii	"sftl_init\000"
 .LASF1:
 	.ascii	"unsigned char\000"
-.LASF613:
+.LASF612:
 	.ascii	"FtlGcScanTempBlk\000"
 .LASF109:
 	.ascii	"legacy_hdr_os_copy\000"
-.LASF761:
+.LASF760:
 	.ascii	"vpcTbl\000"
 .LASF176:
 	.ascii	"UCLASS_PANEL_BACKLIGHT\000"
 .LASF339:
 	.ascii	"activeSuperblockId\000"
-.LASF804:
+.LASF802:
 	.ascii	"ver1\000"
 .LASF280:
 	.ascii	"nand_phy_info\000"
-.LASF760:
+.LASF759:
 	.ascii	"ftl_free_no_use_map_blk\000"
-.LASF806:
+.LASF804:
 	.ascii	"P2V_block_in_plane\000"
-.LASF556:
+.LASF555:
 	.ascii	"str1\000"
-.LASF557:
+.LASF556:
 	.ascii	"str2\000"
-.LASF719:
+.LASF718:
 	.ascii	"pMapHeader\000"
 .LASF140:
 	.ascii	"UCLASS_TEST_BUS\000"
-.LASF717:
+.LASF716:
 	.ascii	"FtlScanSysBlk\000"
 .LASF52:
 	.ascii	"bi_arm_freq\000"
-.LASF696:
+.LASF695:
 	.ascii	"lookup_ppa_ver\000"
-.LASF753:
+.LASF752:
 	.ascii	"region_num\000"
-.LASF476:
+.LASF475:
 	.ascii	"p_l2p_map_buf\000"
-.LASF488:
+.LASF487:
 	.ascii	"gp_last_act_superblock\000"
-.LASF871:
+.LASF869:
 	.ascii	"Ftl_log2\000"
-.LASF448:
+.LASF447:
 	.ascii	"p_sys_spare_buf\000"
 .LASF165:
 	.ascii	"UCLASS_LED\000"
-.LASF552:
+.LASF551:
 	.ascii	"p_current\000"
-.LASF647:
+.LASF646:
 	.ascii	"get_new_id\000"
 .LASF253:
 	.ascii	"net_rx_packet_len\000"
 .LASF255:
 	.ascii	"net_null_ethaddr\000"
-.LASF543:
+.LASF542:
 	.ascii	"g_ect_tbl_power_up_flush\000"
-.LASF597:
+.LASF596:
 	.ascii	"physical_block\000"
 .LASF32:
 	.ascii	"flash_id\000"
-.LASF839:
+.LASF837:
 	.ascii	"absolute_sector\000"
 .LASF222:
 	.ascii	"load_addr\000"
 .LASF347:
 	.ascii	"PowerLostTimes\000"
-.LASF501:
+.LASF500:
 	.ascii	"g_gc_bad_block_temp_tbl\000"
-.LASF886:
+.LASF884:
 	.ascii	"kfree\000"
-.LASF464:
+.LASF463:
 	.ascii	"p_blk_mode_table\000"
-.LASF776:
+.LASF775:
 	.ascii	"List_remove_node\000"
 .LASF291:
 	.ascii	"reserved_blk\000"
-.LASF734:
+.LASF733:
 	.ascii	"pBuf\000"
-.LASF792:
-	.ascii	"tmp_ec\000"
-.LASF484:
+.LASF483:
 	.ascii	"g_active_superblock\000"
-.LASF690:
+.LASF689:
 	.ascii	"recovery_super_page\000"
 .LASF437:
 	.ascii	"req_sys\000"
 .LASF381:
 	.ascii	"available_pages\000"
-.LASF800:
+.LASF798:
 	.ascii	"high\000"
-.LASF834:
+.LASF832:
 	.ascii	"nscts\000"
 .LASF410:
 	.ascii	"c_ftl_nand_reserved_blks\000"
-.LASF701:
+.LASF700:
 	.ascii	"FtlL2PDataInit\000"
 .LASF230:
 	.ascii	"init\000"
 .LASF215:
 	.ascii	"UCLASS_CHARGE_DISPLAY\000"
-.LASF573:
+.LASF572:
 	.ascii	"check\000"
 .LASF145:
 	.ascii	"UCLASS_USB_EMUL\000"
-.LASF798:
+.LASF796:
 	.ascii	"FtlFreeSysBlkQueueInit\000"
-.LASF678:
+.LASF677:
 	.ascii	"FtlRecoverySuperblock\000"
 .LASF396:
 	.ascii	"c_ftl_nand_planes_per_die\000"
@@ -54342,23 +54500,23 @@ __func__.9940:
 	.ascii	"ecc_bits\000"
 .LASF293:
 	.ascii	"nand_ops\000"
-.LASF602:
+.LASF601:
 	.ascii	"tmp_blk\000"
-.LASF523:
+.LASF522:
 	.ascii	"g_gc_head_data_block\000"
-.LASF829:
+.LASF827:
 	.ascii	"FtlWrite\000"
 .LASF182:
 	.ascii	"UCLASS_PINCTRL\000"
-.LASF832:
+.LASF830:
 	.ascii	"num_lpa\000"
-.LASF868:
+.LASF866:
 	.ascii	"blkNum\000"
 .LASF364:
 	.ascii	"SlcPartLbaEndSector\000"
 .LASF84:
 	.ascii	"fdt32_t\000"
-.LASF469:
+.LASF468:
 	.ascii	"g_totle_map_block\000"
 .LASF375:
 	.ascii	"value\000"
@@ -54368,11 +54526,11 @@ __func__.9940:
 	.ascii	"image_len\000"
 .LASF441:
 	.ascii	"req_gc\000"
-.LASF855:
+.LASF853:
 	.ascii	"is_sys_blk\000"
 .LASF42:
 	.ascii	"memory\000"
-.LASF822:
+.LASF820:
 	.ascii	"bitmap\000"
 .LASF319:
 	.ascii	"ftl_ect_tbl_info\000"
@@ -54380,53 +54538,53 @@ __func__.9940:
 	.ascii	"UCLASS_USB_DEV_GENERIC\000"
 .LASF212:
 	.ascii	"UCLASS_FG\000"
-.LASF756:
+.LASF755:
 	.ascii	"lastMapBlk\000"
 .LASF370:
 	.ascii	"totle_write_sector\000"
-.LASF522:
+.LASF521:
 	.ascii	"g_ftl_nand_free_count\000"
-.LASF627:
+.LASF626:
 	.ascii	"p_gc_page\000"
 .LASF20:
 	.ascii	"errno\000"
-.LASF532:
+.LASF531:
 	.ascii	"gNandPhyInfo\000"
-.LASF862:
+.LASF860:
 	.ascii	"ven_blk\000"
 .LASF30:
 	.ascii	"size\000"
 .LASF244:
 	.ascii	"net_hostname\000"
-.LASF773:
+.LASF772:
 	.ascii	"List_pop_head_node\000"
 .LASF308:
 	.ascii	"BlkNum\000"
-.LASF851:
+.LASF849:
 	.ascii	"sys_bad_block_cnt\000"
-.LASF599:
+.LASF598:
 	.ascii	"p_dataHeader\000"
-.LASF781:
+.LASF780:
 	.ascii	"tmp_id\000"
-.LASF603:
+.LASF602:
 	.ascii	"FtlReadRefresh\000"
-.LASF646:
+.LASF645:
 	.ascii	"free_blk_index\000"
-.LASF821:
+.LASF819:
 	.ascii	"FtlBbt2Bitmap\000"
-.LASF663:
+.LASF662:
 	.ascii	"ftl_check_vpc\000"
 .LASF108:
 	.ascii	"legacy_hdr_os\000"
 .LASF100:
 	.ascii	"image_start\000"
-.LASF580:
+.LASF579:
 	.ascii	"page_index\000"
 .LASF18:
 	.ascii	"uint8_t\000"
 .LASF55:
 	.ascii	"bi_bootflags\000"
-.LASF487:
+.LASF486:
 	.ascii	"g_gc_superblock\000"
 .LASF303:
 	.ascii	"ftl_sys_info\000"
@@ -54436,13 +54594,13 @@ __func__.9940:
 	.ascii	"front\000"
 .LASF175:
 	.ascii	"UCLASS_PANEL\000"
-.LASF472:
+.LASF471:
 	.ascii	"p_vendor_block_ver_table\000"
 .LASF204:
 	.ascii	"UCLASS_USB\000"
-.LASF517:
+.LASF516:
 	.ascii	"g_totle_slc_erase_count\000"
-.LASF461:
+.LASF460:
 	.ascii	"g_totle_swl_count\000"
 .LASF139:
 	.ascii	"UCLASS_TEST_FDT\000"
@@ -54452,27 +54610,27 @@ __func__.9940:
 	.ascii	"gcTempSuperblockId\000"
 .LASF238:
 	.ascii	"eth_current\000"
-.LASF767:
+.LASF766:
 	.ascii	"node_valid_page_count\000"
 .LASF53:
 	.ascii	"bi_dsp_freq\000"
 .LASF4:
 	.ascii	"uchar\000"
-.LASF669:
+.LASF668:
 	.ascii	"pages\000"
 .LASF89:
 	.ascii	"ih_size\000"
-.LASF570:
+.LASF569:
 	.ascii	"addr\000"
 .LASF142:
 	.ascii	"UCLASS_SPI_EMUL\000"
-.LASF864:
+.LASF862:
 	.ascii	"FtlMemInit\000"
-.LASF819:
+.LASF817:
 	.ascii	"write_count\000"
-.LASF664:
+.LASF663:
 	.ascii	"prev_ppa\000"
-.LASF589:
+.LASF588:
 	.ascii	"FlashTestBlk\000"
 .LASF179:
 	.ascii	"UCLASS_PCI_GENERIC\000"
@@ -54480,15 +54638,15 @@ __func__.9940:
 	.ascii	"bi_sramstart\000"
 .LASF66:
 	.ascii	"FIQ_STACK_START\000"
-.LASF873:
+.LASF871:
 	.ascii	"rknand_proc_ftlread\000"
 .LASF228:
 	.ascii	"enetaddr\000"
 .LASF181:
 	.ascii	"UCLASS_PINCONFIG\000"
-.LASF742:
+.LASF741:
 	.ascii	"l2p_region_id\000"
-.LASF554:
+.LASF553:
 	.ascii	"check_buf\000"
 .LASF190:
 	.ascii	"UCLASS_RESET\000"
@@ -54502,47 +54660,49 @@ __func__.9940:
 	.ascii	"slc_erase_count\000"
 .LASF60:
 	.ascii	"bi_busfreq\000"
-.LASF770:
+.LASF769:
 	.ascii	"prev_multiplier_value\000"
-.LASF497:
+.LASF496:
 	.ascii	"g_gc_next_blk\000"
-.LASF516:
+.LASF515:
 	.ascii	"g_min_erase_count\000"
 .LASF149:
 	.ascii	"UCLASS_BLK\000"
-.LASF546:
+.LASF545:
 	.ascii	"gc_discard_updated\000"
-.LASF738:
+.LASF737:
 	.ascii	"FtlVendorPartWrite\000"
-.LASF622:
+.LASF621:
 	.ascii	"FtlGcFreeTempBlock\000"
 .LASF248:
 	.ascii	"net_ip\000"
 .LASF229:
 	.ascii	"iobase\000"
-.LASF658:
+.LASF657:
 	.ascii	"GetFreeBlockMinEraseCount\000"
+.LASF788:
+	.ascii	"remalloc\000"
 .LASF336:
 	.ascii	"activeFlashMode\000"
 .LASF92:
 	.ascii	"ih_dcrc\000"
 .LASF35:
 	.ascii	"flash_info_t\000"
-.LASF656:
+.LASF655:
 	.ascii	"GetFreeBlockMaxEraseCount\000"
-.LASF712:
+.LASF711:
 	.ascii	"sblk\000"
-.LASF755:
+.LASF754:
 	.ascii	"ftl_map_blk_gc\000"
-.LASF878:
+.LASF876:
 	.ascii	"printf\000"
 .LASF59:
 	.ascii	"bi_intfreq\000"
 .LASF223:
 	.ascii	"save_addr\000"
-.LASF538:
+.LASF537:
 	.ascii	"TotleReadBufferCount1\000"
-.LASF567:
+.LASF566:
 	.ascii	"request\000"
 .LASF330:
 	.ascii	"regionId\000"
@@ -54554,35 +54714,35 @@ __func__.9940:
 	.ascii	"gc_page_count\000"
 .LASF49:
 	.ascii	"bi_flashoffset\000"
-.LASF541:
+.LASF540:
 	.ascii	"TotleReadBufferMatchCount\000"
 .LASF438:
 	.ascii	"req_read\000"
-.LASF752:
+.LASF751:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
-.LASF466:
+.LASF465:
 	.ascii	"p_map_block_valid_page_count\000"
 .LASF167:
 	.ascii	"UCLASS_MAILBOX\000"
-.LASF793:
+.LASF792:
 	.ascii	"FtlFreeSysBlkQueueIn\000"
 .LASF366:
 	.ascii	"readErrorCount\000"
-.LASF588:
+.LASF587:
 	.ascii	"sftl_gc\000"
-.LASF797:
+.LASF795:
 	.ascii	"FtlFreeSysBlkQueueEmpty\000"
-.LASF763:
+.LASF762:
 	.ascii	"load_l2p_region\000"
-.LASF640:
+.LASF639:
 	.ascii	"p_superblock\000"
 .LASF301:
 	.ascii	"fBbtBlk\000"
 .LASF77:
 	.ascii	"off_mem_rsvmap\000"
-.LASF445:
+.LASF444:
 	.ascii	"p_sys_data_buf\000"
-.LASF885:
+.LASF883:
 	.ascii	"l2p_addr_tran\000"
 .LASF164:
 	.ascii	"UCLASS_KEYBOARD\000"
@@ -54590,69 +54750,69 @@ __func__.9940:
 	.ascii	"page_per_slc_blk\000"
 .LASF398:
 	.ascii	"c_ftl_nand_blks_per_die_shift\000"
-.LASF739:
+.LASF738:
 	.ascii	"log2phys\000"
-.LASF478:
+.LASF477:
 	.ascii	"p_data_block_list_table\000"
 .LASF171:
 	.ascii	"UCLASS_MOD_EXP\000"
-.LASF645:
+.LASF644:
 	.ascii	"num_bad_block\000"
 .LASF85:
 	.ascii	"image_header\000"
-.LASF702:
+.LASF701:
 	.ascii	"FtlLoadVonderInfo\000"
-.LASF614:
+.LASF613:
 	.ascii	"pSuperblock\000"
-.LASF535:
+.LASF534:
 	.ascii	"ftl_temp_buf\000"
 .LASF384:
 	.ascii	"flash_mode\000"
-.LASF514:
+.LASF513:
 	.ascii	"g_totle_mlc_erase_count\000"
 .LASF79:
 	.ascii	"last_comp_version\000"
 .LASF415:
 	.ascii	"c_ftl_nand_map_blks_per_plane\000"
-.LASF811:
+.LASF809:
 	.ascii	"re_try_next_blk\000"
 .LASF56:
 	.ascii	"bi_ip_addr\000"
-.LASF579:
+.LASF578:
 	.ascii	"block_index\000"
 .LASF36:
 	.ascii	"flash_info\000"
-.LASF496:
+.LASF495:
 	.ascii	"g_gc_cur_blk_max_valid_pages\000"
 .LASF16:
 	.ascii	"ushort\000"
-.LASF764:
+.LASF763:
 	.ascii	"phyAddr\000"
 .LASF73:
 	.ascii	"magic\000"
-.LASF791:
-	.ascii	"tmp_blk_id\000"
-.LASF877:
+.LASF875:
 	.ascii	"memset\000"
 .LASF242:
 	.ascii	"net_dns_server\000"
-.LASF562:
+.LASF561:
 	.ascii	"ftl_memset\000"
-.LASF831:
+.LASF829:
 	.ascii	"end_lpa\000"
-.LASF736:
+.LASF882:
+	.ascii	"/home/ldq/rk-linux/u-boot-debug\000"
+.LASF735:
 	.ascii	"result\000"
-.LASF626:
+.LASF625:
 	.ascii	"scan_page_num\000"
 .LASF267:
 	.ascii	"NETLOOP_SUCCESS\000"
 .LASF27:
 	.ascii	"name\000"
-.LASF512:
+.LASF511:
 	.ascii	"g_totle_cache_write_count\000"
-.LASF768:
+.LASF767:
 	.ascii	"node_multiplier_value\000"
-.LASF759:
+.LASF758:
 	.ascii	"blk_index\000"
 .LASF69:
 	.ascii	"_datarellocal_start_ofs\000"
@@ -54664,31 +54824,31 @@ __func__.9940:
 	.ascii	"fit_hdr_setup\000"
 .LASF150:
 	.ascii	"UCLASS_CLK\000"
-.LASF687:
+.LASF686:
 	.ascii	"detected_error_page\000"
 .LASF129:
 	.ascii	"initrd_end\000"
-.LASF620:
+.LASF619:
 	.ascii	"read_super_page\000"
 .LASF219:
 	.ascii	"monitor_flash_len\000"
-.LASF621:
+.LASF620:
 	.ascii	"FtlGcPageVarInit\000"
-.LASF823:
+.LASF821:
 	.ascii	"FtlBbtInfoPrint\000"
-.LASF530:
+.LASF529:
 	.ascii	"c_mlc_erase_count_value\000"
-.LASF551:
+.LASF550:
 	.ascii	"mem_malloc_brk\000"
-.LASF483:
+.LASF482:
 	.ascii	"g_num_data_superblocks\000"
-.LASF754:
+.LASF753:
 	.ascii	"blkTbl\000"
 .LASF348:
 	.ascii	"mlc_erase_count\000"
 .LASF12:
 	.ascii	"phys_size_t\000"
-.LASF716:
+.LASF715:
 	.ascii	"FtlLoadEctTbl\000"
 .LASF62:
 	.ascii	"bi_boot_params\000"
@@ -54696,11 +54856,11 @@ __func__.9940:
 	.ascii	"UCLASS_RC\000"
 .LASF51:
 	.ascii	"bi_sramsize\000"
-.LASF881:
+.LASF879:
 	.ascii	"sprintf\000"
-.LASF608:
+.LASF607:
 	.ascii	"FtlGcMarkBadPhyBlk\000"
-.LASF642:
+.LASF641:
 	.ascii	"allocate_new_data_superblock\000"
 .LASF13:
 	.ascii	"sizetype\000"
@@ -54712,9 +54872,9 @@ __func__.9940:
 	.ascii	"GlobalSysVersion\000"
 .LASF329:
 	.ascii	"ftl_map_blk_header\000"
-.LASF600:
+.LASF599:
 	.ascii	"gc_next_superblock\000"
-.LASF813:
+.LASF811:
 	.ascii	"blkAddr\000"
 .LASF193:
 	.ascii	"UCLASS_SCSI\000"
@@ -54724,21 +54884,21 @@ __func__.9940:
 	.ascii	"signed char\000"
 .LASF250:
 	.ascii	"net_tx_packet\000"
-.LASF697:
+.LASF696:
 	.ascii	"current_ppa_ver\000"
-.LASF785:
+.LASF784:
 	.ascii	"tmp_multiplier_value\000"
-.LASF566:
+.LASF565:
 	.ascii	"FlashEraseBlocks\000"
 .LASF33:
 	.ascii	"start\000"
-.LASF830:
+.LASF828:
 	.ascii	"start_lpa\000"
-.LASF553:
+.LASF552:
 	.ascii	"current\000"
 .LASF218:
 	.ascii	"LOGF_MAX_CATEGORIES\000"
-.LASF518:
+.LASF517:
 	.ascii	"g_totle_sys_slc_erase_count\000"
 .LASF300:
 	.ascii	"prev_id\000"
@@ -54750,37 +54910,37 @@ __func__.9940:
 	.ascii	"count\000"
 .LASF146:
 	.ascii	"UCLASS_SIMPLE_BUS\000"
-.LASF539:
+.LASF538:
 	.ascii	"TotleReadBufferCount2\000"
-.LASF540:
+.LASF539:
 	.ascii	"TotleReadBufferCount3\000"
-.LASF455:
+.LASF454:
 	.ascii	"c_gc_page_buf_num\000"
-.LASF720:
+.LASF719:
 	.ascii	"FtlVpcTblFlush\000"
 .LASF189:
 	.ascii	"UCLASS_REMOTEPROC\000"
-.LASF743:
+.LASF742:
 	.ascii	"lpn_index\000"
 .LASF118:
 	.ascii	"fit_hdr_fdt\000"
-.LASF632:
+.LASF631:
 	.ascii	"FtlGcBufAlloc\000"
-.LASF569:
+.LASF568:
 	.ascii	"num_req\000"
-.LASF779:
+.LASF778:
 	.ascii	"node_erase_count\000"
 .LASF254:
 	.ascii	"net_bcast_ethaddr\000"
-.LASF737:
+.LASF736:
 	.ascii	"ppn_index\000"
-.LASF796:
+.LASF794:
 	.ascii	"FtlFreeSysBlkQueueFull\000"
 .LASF133:
 	.ascii	"state\000"
 .LASF48:
 	.ascii	"bi_flashsize\000"
-.LASF747:
+.LASF746:
 	.ascii	"target_region\000"
 .LASF19:
 	.ascii	"__be32\000"
@@ -54790,31 +54950,31 @@ __func__.9940:
 	.ascii	"c_ftl_vendor_part_size\000"
 .LASF251:
 	.ascii	"net_rx_packets\000"
-.LASF827:
+.LASF825:
 	.ascii	"sftl_read\000"
-.LASF452:
+.LASF451:
 	.ascii	"p_gc_spare_buf\000"
 .LASF151:
 	.ascii	"UCLASS_CPU\000"
-.LASF467:
+.LASF466:
 	.ascii	"p_map_block_ver_table\000"
-.LASF456:
+.LASF455:
 	.ascii	"g_gc_num_req\000"
-.LASF449:
+.LASF448:
 	.ascii	"p_io_data_buf_0\000"
-.LASF450:
+.LASF449:
 	.ascii	"p_io_data_buf_1\000"
 .LASF68:
 	.ascii	"_datarelrolocal_start_ofs\000"
-.LASF684:
+.LASF683:
 	.ascii	"mlc_detected_active_page\000"
-.LASF854:
+.LASF852:
 	.ascii	"FtlLowFormatEraseBlock\000"
 .LASF317:
 	.ascii	"region_id\000"
 .LASF326:
 	.ascii	"sysBlksPerPlane\000"
-.LASF817:
+.LASF815:
 	.ascii	"FtlBbtMemInit\000"
 .LASF309:
 	.ascii	"maxBlkNum\000"
@@ -54822,25 +54982,25 @@ __func__.9940:
 	.ascii	"c_ftl_nand_die_num\000"
 .LASF286:
 	.ascii	"page_per_blk\000"
-.LASF722:
+.LASF721:
 	.ascii	"prog_error_count\000"
 .LASF372:
 	.ascii	"progErrorCount\000"
 .LASF259:
 	.ascii	"net_boot_file_name\000"
-.LASF495:
+.LASF494:
 	.ascii	"g_gc_cur_blk_valid_pages\000"
 .LASF233:
 	.ascii	"halt\000"
-.LASF654:
+.LASF653:
 	.ascii	"maxFreeBlockEraseCount\000"
 .LASF86:
 	.ascii	"ih_magic\000"
-.LASF582:
+.LASF581:
 	.ascii	"block_in_die\000"
-.LASF457:
+.LASF456:
 	.ascii	"gp_ect_tbl_info\000"
-.LASF655:
+.LASF654:
 	.ascii	"minDataBlockEraseCount\000"
 .LASF17:
 	.ascii	"ulong\000"
@@ -54852,41 +55012,41 @@ __func__.9940:
 	.ascii	"__u32\000"
 .LASF249:
 	.ascii	"net_server_ip\000"
-.LASF786:
+.LASF785:
 	.ascii	"INSERT_DATA_LIST\000"
 .LASF206:
 	.ascii	"UCLASS_USB_HUB\000"
-.LASF826:
+.LASF824:
 	.ascii	"sftl_write\000"
-.LASF444:
+.LASF443:
 	.ascii	"p_plane_order_table\000"
-.LASF782:
+.LASF781:
 	.ascii	"insert_data_list\000"
 .LASF70:
 	.ascii	"_datarelro_start_ofs\000"
-.LASF619:
+.LASF618:
 	.ascii	"ReInit\000"
 .LASF172:
 	.ascii	"UCLASS_MTD\000"
 .LASF134:
 	.ascii	"bootm_headers_t\000"
-.LASF730:
+.LASF729:
 	.ascii	"ec_mod_count\000"
-.LASF565:
+.LASF564:
 	.ascii	"spare\000"
-.LASF527:
+.LASF526:
 	.ascii	"g_recovery_page_num\000"
 .LASF15:
 	.ascii	"long int\000"
-.LASF668:
+.LASF667:
 	.ascii	"req_temp\000"
 .LASF141:
 	.ascii	"UCLASS_TEST_PROBE\000"
-.LASF883:
+.LASF881:
 	.ascii	"drivers/rkflash/rksftl/rk_sftl.c\000"
-.LASF660:
+.LASF659:
 	.ascii	"FtlSysBlkInit\000"
-.LASF524:
+.LASF523:
 	.ascii	"g_gc_head_data_block_count\000"
 .LASF297:
 	.ascii	"read_page\000"
@@ -54898,73 +55058,73 @@ __func__.9940:
 	.ascii	"UCLASS_DMA\000"
 .LASF426:
 	.ascii	"g_GlobalSysVersion\000"
-.LASF511:
+.LASF510:
 	.ascii	"g_tmp_data_superblock_id\000"
-.LASF872:
+.LASF870:
 	.ascii	"limit\000"
-.LASF661:
+.LASF660:
 	.ascii	"ftl_scan_all_data\000"
 .LASF331:
 	.ascii	"ftl_sys_blk_header\000"
 .LASF393:
 	.ascii	"flag\000"
-.LASF470:
+.LASF469:
 	.ascii	"p_vendor_block_table\000"
-.LASF680:
+.LASF679:
 	.ascii	"saved_active_plane\000"
-.LASF748:
+.LASF747:
 	.ascii	"hit_count\000"
-.LASF715:
+.LASF714:
 	.ascii	"FtlGcReFreshBadBlk\000"
 .LASF380:
 	.ascii	"current_page\000"
 .LASF201:
 	.ascii	"UCLASS_THERMAL\000"
-.LASF815:
+.LASF813:
 	.ascii	"FtlBbtCalcTotleCnt\000"
-.LASF787:
+.LASF786:
 	.ascii	"INSERT_FREE_LIST\000"
-.LASF563:
+.LASF562:
 	.ascii	"FlashGetBadBlockList\000"
-.LASF695:
+.LASF694:
 	.ascii	"prev_ppa_ver\000"
 .LASF246:
 	.ascii	"net_ethaddr\000"
 .LASF225:
 	.ascii	"in_addr\000"
-.LASF845:
+.LASF843:
 	.ascii	"FtlSysFlush\000"
 .LASF99:
 	.ascii	"image_info\000"
 .LASF88:
 	.ascii	"ih_time\000"
-.LASF610:
+.LASF609:
 	.ascii	"FtlGcRefreshBlock\000"
 .LASF334:
 	.ascii	"ftl_sys_save_info\000"
-.LASF772:
+.LASF771:
 	.ascii	"List_get_gc_head_node\000"
 .LASF399:
 	.ascii	"c_ftl_nand_planes_num\000"
-.LASF809:
+.LASF807:
 	.ascii	"FtlMakeBbt\000"
 .LASF37:
 	.ascii	"long double\000"
-.LASF481:
+.LASF480:
 	.ascii	"p_data_block_list_tail\000"
-.LASF493:
+.LASF492:
 	.ascii	"g_gc_blk_num\000"
 .LASF81:
 	.ascii	"size_dt_strings\000"
 .LASF271:
 	.ascii	"uint16\000"
-.LASF606:
+.LASF605:
 	.ascii	"FtlGcFreeBadSuperBlk\000"
 .LASF106:
 	.ascii	"image_info_t\000"
-.LASF704:
+.LASF703:
 	.ascii	"pMapBlockInfo\000"
-.LASF618:
+.LASF617:
 	.ascii	"error_phy_page\000"
 .LASF2:
 	.ascii	"long unsigned int\000"
@@ -54984,17 +55144,17 @@ __func__.9940:
 	.ascii	"net_server_ethaddr\000"
 .LASF208:
 	.ascii	"UCLASS_VIDEO_BRIDGE\000"
-.LASF692:
+.LASF691:
 	.ascii	"function_exit\000"
 .LASF135:
 	.ascii	"images\000"
-.LASF525:
+.LASF524:
 	.ascii	"g_gc_skip_write_count\000"
-.LASF585:
+.LASF584:
 	.ascii	"rknand_print_hex\000"
-.LASF636:
+.LASF635:
 	.ascii	"FtlGcBufInit\000"
-.LASF446:
+.LASF445:
 	.ascii	"p_sys_data_buf_1\000"
 .LASF14:
 	.ascii	"char\000"
@@ -55002,11 +55162,11 @@ __func__.9940:
 	.ascii	"pBlkTbl\000"
 .LASF113:
 	.ascii	"fit_uname_os\000"
-.LASF500:
+.LASF499:
 	.ascii	"g_gc_bad_block_gc_index\000"
-.LASF693:
+.LASF692:
 	.ascii	"last_page_version\000"
-.LASF802:
+.LASF800:
 	.ascii	"pagePreBlk\000"
 .LASF281:
 	.ascii	"nand_type\000"
@@ -55014,15 +55174,15 @@ __func__.9940:
 	.ascii	"fit_hdr_os\000"
 .LASF283:
 	.ascii	"plane_per_die\000"
-.LASF490:
+.LASF489:
 	.ascii	"g_sys_ext_data\000"
 .LASF272:
 	.ascii	"uint32\000"
-.LASF564:
+.LASF563:
 	.ascii	"table\000"
 .LASF299:
 	.ascii	"page\000"
-.LASF643:
+.LASF642:
 	.ascii	"allocate_data_superblock\000"
 .LASF316:
 	.ascii	"ftl_l2p_ram_map_info\000"
@@ -55032,75 +55192,75 @@ __func__.9940:
 	.ascii	"net_loop_state\000"
 .LASF433:
 	.ascii	"gSysInfo\000"
-.LASF630:
+.LASF629:
 	.ascii	"prev_superblock_id\000"
 .LASF196:
 	.ascii	"UCLASS_SPMI\000"
-.LASF757:
+.LASF756:
 	.ascii	"minValidPageIndex\000"
-.LASF842:
+.LASF840:
 	.ascii	"last_lpa_nscts\000"
 .LASF194:
 	.ascii	"UCLASS_SERIAL\000"
-.LASF710:
+.LASF709:
 	.ascii	"FtlLoadSysInfo\000"
 .LASF440:
 	.ascii	"req_erase\000"
 .LASF320:
 	.ascii	"hash\000"
-.LASF545:
+.LASF544:
 	.ascii	"check_vpc_table\000"
 .LASF180:
 	.ascii	"UCLASS_PHY\000"
 .LASF54:
 	.ascii	"bi_ddr_freq\000"
-.LASF859:
+.LASF857:
 	.ascii	"test_mode\000"
-.LASF828:
+.LASF826:
 	.ascii	"FtlDiscard\000"
-.LASF671:
+.LASF670:
 	.ascii	"FtlGcPageRecovery\000"
 .LASF105:
 	.ascii	"arch\000"
-.LASF510:
+.LASF509:
 	.ascii	"g_totle_read_page_count\000"
-.LASF711:
+.LASF710:
 	.ascii	"ftl_get_blk_mode\000"
-.LASF741:
+.LASF740:
 	.ascii	"ram_region_id\000"
 .LASF435:
 	.ascii	"gL2pMapInfo\000"
 .LASF322:
 	.ascii	"lastEc\000"
-.LASF843:
+.LASF841:
 	.ascii	"sector\000"
-.LASF558:
+.LASF557:
 	.ascii	"ftl_memcmp\000"
-.LASF468:
+.LASF467:
 	.ascii	"p_map_region_ppn_table\000"
 .LASF120:
 	.ascii	"fit_noffset_fdt\000"
-.LASF867:
+.LASF865:
 	.ascii	"FtlSysBlkNumInit\000"
-.LASF672:
+.LASF671:
 	.ascii	"Ftl_save_ext_data\000"
 .LASF116:
 	.ascii	"fit_uname_rd\000"
-.LASF649:
+.LASF648:
 	.ascii	"GetSwlReplaceBlock\000"
 .LASF359:
 	.ascii	"max_erase_count\000"
-.LASF475:
+.LASF474:
 	.ascii	"p_l2p_ram_map\000"
-.LASF634:
+.LASF633:
 	.ascii	"req_num\000"
 .LASF115:
 	.ascii	"fit_hdr_rd\000"
 .LASF268:
 	.ascii	"NETLOOP_FAIL\000"
-.LASF824:
+.LASF822:
 	.ascii	"FtlBbmIsBadBlock\000"
-.LASF667:
+.LASF666:
 	.ascii	"FtlSuperblockPowerLostFix\000"
 .LASF157:
 	.ascii	"UCLASS_FIRMWARE\000"
@@ -55108,13 +55268,13 @@ __func__.9940:
 	.ascii	"fit_noffset_setup\000"
 .LASF401:
 	.ascii	"c_ftl_nand_ext_blk_pre_plane\000"
-.LASF550:
+.LASF549:
 	.ascii	"mem_malloc_end\000"
-.LASF451:
+.LASF450:
 	.ascii	"p_io_spare_buf\000"
 .LASF185:
 	.ascii	"UCLASS_POWER_DOMAIN\000"
-.LASF520:
+.LASF519:
 	.ascii	"g_in_gc_progress\000"
 .LASF168:
 	.ascii	"UCLASS_MASS_STORAGE\000"
@@ -55124,7 +55284,7 @@ __func__.9940:
 	.ascii	"UCLASS_NORTHBRIDGE\000"
 .LASF422:
 	.ascii	"c_ftl_nand_data_blks_per_plane\000"
-.LASF617:
+.LASF616:
 	.ascii	"page_count\000"
 .LASF298:
 	.ascii	"ftl_bbt_info\000"
@@ -55132,49 +55292,47 @@ __func__.9940:
 	.ascii	"UCLASS_I2C_GENERIC\000"
 .LASF231:
 	.ascii	"send\000"
-.LASF531:
+.LASF530:
 	.ascii	"g_power_lost_recovery_flag\000"
-.LASF592:
+.LASF591:
 	.ascii	"numPages\000"
-.LASF447:
+.LASF446:
 	.ascii	"p_vendor_data_buf\000"
 .LASF354:
 	.ascii	"read_page_count\000"
 .LASF234:
 	.ascii	"write_hwaddr\000"
-.LASF726:
+.LASF725:
 	.ascii	"FtlMapBlkWriteDump_data\000"
-.LASF835:
+.LASF833:
 	.ascii	"FtlCacheWriteBack\000"
-.LASF700:
+.LASF699:
 	.ascii	"FtlLoadMapInfo\000"
-.LASF808:
+.LASF806:
 	.ascii	"V2P_block\000"
-.LASF721:
+.LASF720:
 	.ascii	"pSysHeader\000"
-.LASF673:
+.LASF672:
 	.ascii	"SupperBlkListInit\000"
-.LASF707:
+.LASF706:
 	.ascii	"ppnTbl\000"
-.LASF847:
+.LASF845:
 	.ascii	"pNand\000"
-.LASF559:
+.LASF558:
 	.ascii	"ftl_memcpy\000"
 .LASF346:
 	.ascii	"PowerOnTimes\000"
-.LASF505:
+.LASF504:
 	.ascii	"g_totle_gc_page_count\000"
 .LASF24:
 	.ascii	"_binary_u_boot_bin_start\000"
-.LASF674:
+.LASF673:
 	.ascii	"num_data_node\000"
 .LASF400:
 	.ascii	"c_ftl_nand_blk_pre_plane\000"
-.LASF884:
-	.ascii	"/home/ldq/rk-linux/u-boot-release\000"
 .LASF64:
 	.ascii	"bd_t\000"
-.LASF706:
+.LASF705:
 	.ascii	"lastWritePage\000"
 .LASF91:
 	.ascii	"ih_ep\000"
@@ -55184,7 +55342,7 @@ __func__.9940:
 	.ascii	"fit_uname_fdt\000"
 .LASF187:
 	.ascii	"UCLASS_RAM\000"
-.LASF675:
+.LASF674:
 	.ascii	"num_free_node\000"
 .LASF379:
 	.ascii	"ftl_superblock_info\000"
@@ -55192,43 +55350,41 @@ __func__.9940:
 	.ascii	"ft_addr\000"
 .LASF357:
 	.ascii	"sys_slc_erase_count\000"
-.LASF513:
+.LASF512:
 	.ascii	"g_totle_l2p_write_count\000"
 .LASF220:
 	.ascii	"__dtb_dt_begin\000"
 .LASF217:
 	.ascii	"UCLASS_INVALID\000"
-.LASF443:
-	.ascii	"g_req_cache\000"
-.LASF594:
+.LASF593:
 	.ascii	"gc_blk\000"
 .LASF277:
 	.ascii	"page_addr\000"
-.LASF865:
+.LASF863:
 	.ascii	"mem_size\000"
-.LASF858:
+.LASF856:
 	.ascii	"test_page_step\000"
-.LASF689:
+.LASF688:
 	.ascii	"read_super_page_end\000"
 .LASF368:
 	.ascii	"refresh_enable_mode\000"
-.LASF848:
+.LASF846:
 	.ascii	"load_bbt\000"
-.LASF861:
+.LASF859:
 	.ascii	"IsBlkInVendorPart\000"
 .LASF402:
 	.ascii	"c_ftl_nand_bbm_buf_size\000"
-.LASF783:
+.LASF782:
 	.ascii	"node_data_count\000"
-.LASF583:
+.LASF582:
 	.ascii	"width\000"
 .LASF39:
 	.ascii	"base\000"
-.LASF887:
+.LASF885:
 	.ascii	"sftl_get_density\000"
-.LASF840:
+.LASF838:
 	.ascii	"first_lpa_sctidx\000"
-.LASF590:
+.LASF589:
 	.ascii	"rk_ftl_garbage_collect\000"
 .LASF328:
 	.ascii	"lastPpa\000"
@@ -55236,19 +55392,19 @@ __func__.9940:
 	.ascii	"fit_uname_cfg\000"
 .LASF344:
 	.ascii	"gcTempPageOffset\000"
-.LASF637:
+.LASF636:
 	.ascii	"decrement_vpc_count\000"
 .LASF386:
 	.ascii	"dump_writed\000"
-.LASF749:
+.LASF748:
 	.ascii	"flush_l2p_region\000"
 .LASF130:
 	.ascii	"cmdline_start\000"
-.LASF536:
+.LASF535:
 	.ascii	"DeviceCapacity\000"
 .LASF355:
 	.ascii	"l2p_write_count\000"
-.LASF548:
+.LASF547:
 	.ascii	"gc_ink_free_return_value\000"
 .LASF358:
 	.ascii	"discard_page_count\000"
@@ -55260,45 +55416,45 @@ __func__.9940:
 	.ascii	"long long unsigned int\000"
 .LASF274:
 	.ascii	"int16\000"
-.LASF849:
+.LASF847:
 	.ascii	"ftl_low_format\000"
-.LASF735:
+.LASF734:
 	.ascii	"offset\000"
-.LASF504:
+.LASF503:
 	.ascii	"g_gc_blk_index\000"
 .LASF439:
 	.ascii	"req_prgm\000"
 .LASF436:
 	.ascii	"gVendorBlkInfo\000"
-.LASF677:
+.LASF676:
 	.ascii	"FtlPowerLostRecovery\000"
-.LASF462:
+.LASF461:
 	.ascii	"p_valid_page_count_table\000"
-.LASF703:
+.LASF702:
 	.ascii	"FtlMapTblRecovery\000"
 .LASF156:
 	.ascii	"UCLASS_GPIO\000"
-.LASF870:
+.LASF868:
 	.ascii	"debug_flag\000"
-.LASF498:
+.LASF497:
 	.ascii	"g_gc_next_blk_1\000"
 .LASF76:
 	.ascii	"off_dt_strings\000"
 .LASF376:
 	.ascii	"sys_blk_queue\000"
-.LASF648:
+.LASF647:
 	.ascii	"free_data_superblock\000"
-.LASF860:
+.LASF858:
 	.ascii	"re_test_next_page\000"
 .LASF61:
 	.ascii	"bi_arch_number\000"
-.LASF750:
+.LASF749:
 	.ascii	"FtlMapWritePage\000"
-.LASF784:
+.LASF783:
 	.ascii	"tmp_data_count\000"
 .LASF26:
 	.ascii	"ide_bus_offset\000"
-.LASF740:
+.LASF739:
 	.ascii	"action\000"
 .LASF408:
 	.ascii	"c_ftl_nand_byte_pre_page\000"
@@ -55306,11 +55462,11 @@ __func__.9940:
 	.ascii	"UCLASS_COUNT\000"
 .LASF174:
 	.ascii	"UCLASS_NVME\000"
-.LASF644:
+.LASF643:
 	.ascii	"new_id\000"
 .LASF345:
 	.ascii	"cache_write_count\000"
-.LASF641:
+.LASF640:
 	.ascii	"new_ppa\000"
 .LASF258:
 	.ascii	"net_restart_wrap\000"
@@ -55330,41 +55486,41 @@ __func__.9940:
 	.ascii	"totleEc\000"
 .LASF38:
 	.ascii	"lmb_property\000"
-.LASF458:
+.LASF457:
 	.ascii	"g_ect_tbl_info_size\000"
 .LASF338:
 	.ascii	"gcTempFlashMode\000"
 .LASF431:
 	.ascii	"g_MaxLbn\000"
-.LASF534:
+.LASF533:
 	.ascii	"g_nand_ops\000"
-.LASF584:
+.LASF583:
 	.ascii	"ftl_malloc\000"
-.LASF841:
+.LASF839:
 	.ascii	"first_lpa_nscts\000"
 .LASF183:
 	.ascii	"UCLASS_PMIC\000"
 .LASF318:
 	.ascii	"L2PMap\000"
-.LASF766:
+.LASF765:
 	.ascii	"prev_node_id\000"
-.LASF454:
+.LASF453:
 	.ascii	"gp_gc_page_buf_info\000"
-.LASF509:
+.LASF508:
 	.ascii	"g_totle_discard_page_count\000"
-.LASF657:
+.LASF656:
 	.ascii	"max_ec\000"
-.LASF537:
+.LASF536:
 	.ascii	"gFtlInitStatus\000"
 .LASF9:
 	.ascii	"long long int\000"
-.LASF459:
+.LASF458:
 	.ascii	"p_erase_count_table\000"
-.LASF825:
+.LASF823:
 	.ascii	"FtlBbmMapBadBlock\000"
 .LASF427:
 	.ascii	"g_GlobalDataVersion\000"
-.LASF718:
+.LASF717:
 	.ascii	"block_in_plane\000"
 .LASF128:
 	.ascii	"initrd_start\000"
@@ -55372,39 +55528,39 @@ __func__.9940:
 	.ascii	"g_MaxLbaSector\000"
 .LASF382:
 	.ascii	"current_plane\000"
-.LASF880:
+.LASF878:
 	.ascii	"free\000"
 .LASF383:
 	.ascii	"num_planes\000"
-.LASF801:
+.LASF799:
 	.ascii	"spareBuf\000"
-.LASF731:
+.LASF730:
 	.ascii	"FtlVendorPartRead\000"
-.LASF724:
+.LASF723:
 	.ascii	"FtlWriteDump_data\000"
 .LASF197:
 	.ascii	"UCLASS_SPI_FLASH\000"
 .LASF202:
 	.ascii	"UCLASS_TIMER\000"
-.LASF799:
+.LASF797:
 	.ascii	"FtlGetLastWrittenPage\000"
-.LASF662:
+.LASF661:
 	.ascii	"pDataHeader\000"
-.LASF542:
+.LASF541:
 	.ascii	"power_up_flag\000"
 .LASF365:
 	.ascii	"inkDie_write_and_check_en\000"
 .LASF413:
 	.ascii	"c_ftl_nand_l2pmap_ram_region_num\000"
-.LASF844:
+.LASF842:
 	.ascii	"sftl_deinit\000"
-.LASF816:
+.LASF814:
 	.ascii	"totle_count\000"
 .LASF282:
 	.ascii	"die_num\000"
-.LASF751:
+.LASF750:
 	.ascii	"update_map_block\000"
-.LASF882:
+.LASF880:
 	.ascii	"GNU C11 6.3.1 20170404 -mthumb -mthumb-interwork -m"
 	.ascii	"abi=aapcs-linux -mword-relocations -mno-unaligned-a"
 	.ascii	"ccess -mfloat-abi=soft -march=armv7-a -mtune=cortex"
@@ -55415,9 +55571,9 @@ __func__.9940:
 	.ascii	"common -ffixed-r9\000"
 .LASF307:
 	.ascii	"maxRegion\000"
-.LASF681:
+.LASF680:
 	.ascii	"next_free_active_plane\000"
-.LASF491:
+.LASF490:
 	.ascii	"p_gc_page_info\000"
 .LASF256:
 	.ascii	"net_our_vlan\000"
@@ -55425,29 +55581,29 @@ __func__.9940:
 	.ascii	"totle_power_on_run_times\000"
 .LASF93:
 	.ascii	"ih_os\000"
-.LASF526:
+.LASF525:
 	.ascii	"g_cur_erase_blk\000"
 .LASF184:
 	.ascii	"UCLASS_PWM\000"
-.LASF635:
+.LASF634:
 	.ascii	"FtlGcBufFree\000"
-.LASF775:
+.LASF774:
 	.ascii	"List_pop_index_node\000"
-.LASF691:
+.LASF690:
 	.ascii	"scan_completed\000"
-.LASF638:
+.LASF637:
 	.ascii	"update_vpc_list\000"
 .LASF170:
 	.ascii	"UCLASS_MMC\000"
-.LASF465:
+.LASF464:
 	.ascii	"p_map_block_table\000"
-.LASF544:
+.LASF543:
 	.ascii	"FtlUpdateVaildLpnCount\000"
 .LASF332:
 	.ascii	"res32_0\000"
 .LASF333:
 	.ascii	"res32_1\000"
-.LASF727:
+.LASF726:
 	.ascii	"FtlUpdateVaildLpn\000"
 .LASF390:
 	.ascii	"scr_ppa\000"
@@ -55457,43 +55613,43 @@ __func__.9940:
 	.ascii	"save_size\000"
 .LASF78:
 	.ascii	"version\000"
-.LASF653:
+.LASF652:
 	.ascii	"pNode\000"
-.LASF639:
+.LASF638:
 	.ascii	"get_new_active_ppa\000"
-.LASF879:
+.LASF877:
 	.ascii	"kmalloc\000"
 .LASF25:
 	.ascii	"_binary_u_boot_bin_end\000"
-.LASF598:
+.LASF597:
 	.ascii	"max_gc_page_num\000"
 .LASF8:
 	.ascii	"unsigned int\000"
-.LASF713:
+.LASF712:
 	.ascii	"FtlSlcSuperblockCheck\000"
-.LASF515:
+.LASF514:
 	.ascii	"g_totle_avg_erase_count\000"
-.LASF837:
+.LASF835:
 	.ascii	"flashType\000"
-.LASF790:
+.LASF791:
 	.ascii	"FtlFreeSysBLkSort\000"
-.LASF780:
+.LASF779:
 	.ascii	"tmp_erase_count\000"
 .LASF83:
 	.ascii	"working_fdt\000"
-.LASF863:
+.LASF861:
 	.ascii	"FtlVariablesInit\000"
 .LASF392:
 	.ascii	"ftl_gc_page_buffer\000"
 .LASF239:
 	.ascii	"push_packet\000"
-.LASF709:
+.LASF708:
 	.ascii	"pMapBlkHeader\000"
 .LASF82:
 	.ascii	"size_dt_struct\000"
-.LASF473:
+.LASF472:
 	.ascii	"p_vendor_region_ppn_table\000"
-.LASF676:
+.LASF675:
 	.ascii	"make_superblock\000"
 .LASF97:
 	.ascii	"ih_name\000"
@@ -55503,11 +55659,11 @@ __func__.9940:
 	.ascii	"bufferFlashMode\000"
 .LASF6:
 	.ascii	"short int\000"
-.LASF838:
+.LASF836:
 	.ascii	"FtlRead\000"
 .LASF74:
 	.ascii	"totalsize\000"
-.LASF758:
+.LASF757:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
 .LASF385:
 	.ascii	"check_en\000"
@@ -55517,7 +55673,7 @@ __func__.9940:
 	.ascii	"prev\000"
 .LASF423:
 	.ascii	"c_ftl_nand_data_op_blks_per_plane\000"
-.LASF651:
+.LASF650:
 	.ascii	"min_ec_id\000"
 .LASF388:
 	.ascii	"phyBlk\000"
@@ -55525,7 +55681,7 @@ __func__.9940:
 	.ascii	"net_boot_file_size\000"
 .LASF412:
 	.ascii	"c_ftl_nand_map_region_num\000"
-.LASF666:
+.LASF665:
 	.ascii	"FtlVpcCheckAndModify\000"
 .LASF127:
 	.ascii	"ft_len\000"
@@ -55533,7 +55689,7 @@ __func__.9940:
 	.ascii	"UCLASS_REGULATOR\000"
 .LASF311:
 	.ascii	"pBlkVerTbl\000"
-.LASF489:
+.LASF488:
 	.ascii	"g_sys_save_data\000"
 .LASF124:
 	.ascii	"rd_start\000"
diff --git a/drivers/rkflash/rk_sftl_arm_v8.S b/drivers/rkflash/rk_sftl_arm_v8.S
index a808dd6611..6f23e5bfaa 100644
--- a/drivers/rkflash/rk_sftl_arm_v8.S
+++ b/drivers/rkflash/rk_sftl_arm_v8.S
@@ -1,8 +1,8 @@
 /*
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
- * SPDX-License-Identifier:    GPL-2.0
- * date: 2018-07-04
+ * SPDX-License-Identifier:	GPL-2.0
+ * date: 2018-07-13
  */
 	.arch armv8-a+nosimd
 	.file	"rk_sftl.c"
@@ -67,18 +67,18 @@ l2p_addr_tran.isra.0:
 	.cfi_endproc
 .LFE349:
 	.size	l2p_addr_tran.isra.0, .-l2p_addr_tran.isra.0
-	.section	.text.ftl_set_blk_mode.part.7,"ax",@progbits
+	.section	.text.ftl_set_blk_mode.part.6,"ax",@progbits
 	.align	2
-	.type	ftl_set_blk_mode.part.7, %function
-ftl_set_blk_mode.part.7:
-.LFB356:
+	.type	ftl_set_blk_mode.part.6, %function
+ftl_set_blk_mode.part.6:
+.LFB355:
 	.file 2 "drivers/rkflash/rksftl/sftl_sys.c"
-	.loc 2 1346 0
+	.loc 2 1395 0
 	.cfi_startproc
 .LVL10:
-	.loc 2 1346 0
+	.loc 2 1395 0
 	and	w0, w0, 65535
-	.loc 2 1349 0
+	.loc 2 1398 0
 	adrp	x2, .LANCHOR1
 	ubfx	x1, x0, 5, 11
 	ldr	x3, [x2, #:lo12:.LANCHOR1]
@@ -91,8 +91,8 @@ ftl_set_blk_mode.part.7:
 	str	w0, [x3, x1]
 	ret
 	.cfi_endproc
-.LFE356:
-	.size	ftl_set_blk_mode.part.7, .-ftl_set_blk_mode.part.7
+.LFE355:
+	.size	ftl_set_blk_mode.part.6, .-ftl_set_blk_mode.part.6
 	.section	.text.Ftl_log2,"ax",@progbits
 	.align	2
 	.global	Ftl_log2
@@ -139,7 +139,7 @@ Ftl_log2:
 	.type	FtlPrintInfo, %function
 FtlPrintInfo:
 .LFB203:
-	.loc 3 159 0
+	.loc 3 160 0
 	.cfi_startproc
 .LVL20:
 	ret
@@ -152,41 +152,41 @@ FtlPrintInfo:
 	.type	FtlSysBlkNumInit, %function
 FtlSysBlkNumInit:
 .LFB204:
-	.loc 3 165 0
+	.loc 3 166 0
 	.cfi_startproc
 .LVL21:
-	.loc 3 165 0
+	.loc 3 166 0
 	and	w0, w0, 65535
 	mov	w1, 24
 	cmp	w0, 24
-	.loc 3 169 0
+	.loc 3 170 0
 	adrp	x2, .LANCHOR4
 	csel	w0, w0, w1, cs
 .LVL22:
-	.loc 3 168 0
+	.loc 3 169 0
 	adrp	x1, .LANCHOR2
 	and	w0, w0, 65535
 .LVL23:
 	str	w0, [x1, #:lo12:.LANCHOR2]
-	.loc 3 169 0
+	.loc 3 170 0
 	adrp	x1, .LANCHOR3
 	ldrh	w1, [x1, #:lo12:.LANCHOR3]
 	mul	w1, w1, w0
 	str	w1, [x2, #:lo12:.LANCHOR4]
-	.loc 3 170 0
+	.loc 3 171 0
 	adrp	x2, .LANCHOR6
 	ldrh	w2, [x2, #:lo12:.LANCHOR6]
 	sub	w0, w2, w0
 .LVL24:
 	adrp	x2, .LANCHOR5
 	strh	w0, [x2, #:lo12:.LANCHOR5]
-	.loc 3 171 0
+	.loc 3 172 0
 	adrp	x0, .LANCHOR8
 	ldr	w0, [x0, #:lo12:.LANCHOR8]
 	sub	w1, w0, w1
 	adrp	x0, .LANCHOR7
 	str	w1, [x0, #:lo12:.LANCHOR7]
-	.loc 3 174 0
+	.loc 3 175 0
 	mov	w0, 0
 	ret
 	.cfi_endproc
@@ -198,7 +198,7 @@ FtlSysBlkNumInit:
 	.type	FtlConstantsInit, %function
 FtlConstantsInit:
 .LFB205:
-	.loc 3 183 0
+	.loc 3 184 0
 	.cfi_startproc
 .LVL25:
 	stp	x29, x30, [sp, -16]!
@@ -206,110 +206,110 @@ FtlConstantsInit:
 	.cfi_offset 29, -16
 	.cfi_offset 30, -8
 	mov	x5, x0
-	.loc 3 190 0
+	.loc 3 191 0
 	adrp	x1, .LANCHOR11
-	.loc 3 183 0
+	.loc 3 184 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	.loc 3 188 0
+	.loc 3 189 0
 	ldrh	w2, [x0]
 	adrp	x0, .LANCHOR9
 .LVL26:
-	.loc 3 189 0
+	.loc 3 190 0
 	ldrh	w4, [x5, 2]
-	.loc 3 188 0
-	strh	w2, [x0, #:lo12:.LANCHOR9]
 	.loc 3 189 0
+	strh	w2, [x0, #:lo12:.LANCHOR9]
+	.loc 3 190 0
 	adrp	x0, .LANCHOR10
 	strh	w4, [x0, #:lo12:.LANCHOR10]
-	.loc 3 190 0
+	.loc 3 191 0
 	ldrh	w0, [x5, 4]
 	strh	w0, [x1, #:lo12:.LANCHOR11]
-	.loc 3 191 0
+	.loc 3 192 0
 	ldrh	w1, [x5, 14]
 	cmp	w1, 4
 	bne	.L10
-	.loc 3 192 0
+	.loc 3 193 0
 	ldrh	w1, [x5, 6]
 	adrp	x3, .LANCHOR6
 	lsr	w1, w1, 1
 	strh	w1, [x3, #:lo12:.LANCHOR6]
-	.loc 3 193 0
+	.loc 3 194 0
 	adrp	x1, .LANCHOR12
 	mov	w3, 8
 	strh	w3, [x1, #:lo12:.LANCHOR12]
 .L10:
-	.loc 3 197 0 discriminator 3
+	.loc 3 198 0 discriminator 3
 	adrp	x3, .LANCHOR13
 	add	x3, x3, :lo12:.LANCHOR13
-	.loc 3 183 0 discriminator 3
+	.loc 3 184 0 discriminator 3
 	mov	x1, 0
 .L11:
 .LVL27:
-	.loc 3 197 0 discriminator 3
+	.loc 3 198 0 discriminator 3
 	strb	w1, [x1, x3]
 .LVL28:
 	add	x1, x1, 1
 .LVL29:
-	.loc 3 196 0 discriminator 3
+	.loc 3 197 0 discriminator 3
 	cmp	x1, 32
 	bne	.L11
-	.loc 3 198 0
+	.loc 3 199 0
 	adrp	x1, .LANCHOR14
 	mov	w3, 5
-	.loc 3 200 0
+	.loc 3 201 0
 	cmp	w2, 1
-	.loc 3 198 0
-	strh	w3, [x1, #:lo12:.LANCHOR14]
 	.loc 3 199 0
+	strh	w3, [x1, #:lo12:.LANCHOR14]
+	.loc 3 200 0
 	adrp	x3, .LANCHOR15
 	strh	wzr, [x3, #:lo12:.LANCHOR15]
-	.loc 3 200 0
-	bne	.L12
 	.loc 3 201 0
+	bne	.L12
+	.loc 3 202 0
 	strh	w2, [x1, #:lo12:.LANCHOR14]
 .L12:
-	.loc 3 202 0
+	.loc 3 203 0
 	adrp	x1, .LANCHOR16
 	mov	w2, 640
-	.loc 3 204 0
+	.loc 3 205 0
 	mul	w4, w4, w0
-	.loc 3 202 0
+	.loc 3 203 0
 	strh	w2, [x1, #:lo12:.LANCHOR16]
-	.loc 3 204 0
+	.loc 3 205 0
 	adrp	x1, .LANCHOR3
 	and	w4, w4, 65535
 	strh	w4, [x1, #:lo12:.LANCHOR3]
-	.loc 3 205 0
+	.loc 3 206 0
 	adrp	x1, .LANCHOR6
 	ldrh	w3, [x1, #:lo12:.LANCHOR6]
 	adrp	x1, .LANCHOR17
 	mul	w0, w0, w3
 	and	w0, w0, 65535
 	strh	w0, [x1, #:lo12:.LANCHOR17]
-	.loc 3 206 0
+	.loc 3 207 0
 	bl	Ftl_log2
 .LVL30:
-	.loc 3 207 0
+	.loc 3 208 0
 	ldrh	w7, [x5, 12]
-	.loc 3 206 0
-	adrp	x1, .LANCHOR18
 	.loc 3 207 0
+	adrp	x1, .LANCHOR18
+	.loc 3 208 0
 	adrp	x8, .LANCHOR19
-	.loc 3 206 0
+	.loc 3 207 0
 	strh	w0, [x1, #:lo12:.LANCHOR18]
-	.loc 3 208 0
-	adrp	x0, .LANCHOR20
 	.loc 3 209 0
+	adrp	x0, .LANCHOR20
+	.loc 3 210 0
 	mul	w1, w4, w7
-	.loc 3 207 0
-	strh	w7, [x8, #:lo12:.LANCHOR19]
 	.loc 3 208 0
-	strh	w7, [x0, #:lo12:.LANCHOR20]
+	strh	w7, [x8, #:lo12:.LANCHOR19]
 	.loc 3 209 0
+	strh	w7, [x0, #:lo12:.LANCHOR20]
+	.loc 3 210 0
 	adrp	x0, .LANCHOR21
 	strh	w1, [x0, #:lo12:.LANCHOR21]
-	.loc 3 210 0
+	.loc 3 211 0
 	adrp	x0, .LANCHOR12
 	ldrh	w6, [x0, #:lo12:.LANCHOR12]
 	mov	w0, w6
@@ -317,104 +317,104 @@ FtlConstantsInit:
 .LVL31:
 	and	w1, w0, 65535
 	adrp	x2, .LANCHOR22
-	.loc 3 212 0
+	.loc 3 213 0
 	adrp	x10, .LANCHOR23
-	.loc 3 214 0
+	.loc 3 215 0
 	ldrh	w5, [x5, 20]
 .LVL32:
-	.loc 3 210 0
+	.loc 3 211 0
 	strh	w0, [x2, #:lo12:.LANCHOR22]
-	.loc 3 212 0
+	.loc 3 213 0
 	ubfiz	w0, w6, 9, 7
 	strh	w0, [x10, #:lo12:.LANCHOR23]
-	.loc 3 213 0
+	.loc 3 214 0
 	adrp	x10, .LANCHOR24
 	ubfx	w0, w0, 8, 8
 	strh	w0, [x10, #:lo12:.LANCHOR24]
-	.loc 3 214 0
+	.loc 3 215 0
 	adrp	x0, .LANCHOR25
 	strh	w5, [x0, #:lo12:.LANCHOR25]
-	.loc 3 216 0
+	.loc 3 217 0
 	mul	w0, w4, w3
 	adrp	x5, .LANCHOR8
 	str	w0, [x5, #:lo12:.LANCHOR8]
-	.loc 3 217 0
+	.loc 3 218 0
 	adrp	x5, .LANCHOR26
 	mul	w0, w0, w6
-	.loc 3 218 0
+	.loc 3 219 0
 	mul	w6, w6, w7
-	.loc 3 217 0
+	.loc 3 218 0
 	mul	w0, w0, w7
 	mov	x7, x2
 	asr	w0, w0, 11
 	str	w0, [x5, #:lo12:.LANCHOR26]
-	.loc 3 218 0
+	.loc 3 219 0
 	mov	w0, 5120
 	adrp	x5, .LANCHOR27
 	sdiv	w0, w0, w6
 	and	w0, w0, 65535
-	.loc 3 219 0
+	.loc 3 220 0
 	cmp	w0, 4
 	bls	.L13
 .L19:
-	.loc 3 220 0
-	strh	w0, [x5, #:lo12:.LANCHOR27]
 	.loc 3 221 0
+	strh	w0, [x5, #:lo12:.LANCHOR27]
+	.loc 3 222 0
 	adrp	x2, .LANCHOR28
 	mov	w0, 640
-	.loc 3 223 0
+	.loc 3 224 0
 	lsl	w3, w3, 6
-	.loc 3 221 0
+	.loc 3 222 0
 	asr	w0, w0, w1
 	add	w0, w0, 2
-	.loc 3 223 0
+	.loc 3 224 0
 	add	w1, w1, 9
-	.loc 3 221 0
+	.loc 3 222 0
 	strh	w0, [x2, #:lo12:.LANCHOR28]
-	.loc 3 223 0
+	.loc 3 224 0
 	adrp	x0, .LANCHOR29
-	.loc 3 227 0
+	.loc 3 228 0
 	cmp	w4, 1
-	.loc 3 223 0
-	asr	w3, w3, w1
 	.loc 3 224 0
+	asr	w3, w3, w1
+	.loc 3 225 0
 	adrp	x1, .LANCHOR30
-	.loc 3 223 0
+	.loc 3 224 0
 	strh	w3, [x0, #:lo12:.LANCHOR29]
 	and	w3, w3, 65535
 	adrp	x6, .LANCHOR2
-	.loc 3 224 0
+	.loc 3 225 0
 	mul	w0, w3, w4
-	.loc 3 226 0
+	.loc 3 227 0
 	add	w3, w3, 8
-	.loc 3 224 0
+	.loc 3 225 0
 	str	w0, [x1, #:lo12:.LANCHOR30]
-	.loc 3 226 0
+	.loc 3 227 0
 	ldrh	w0, [x5, #:lo12:.LANCHOR27]
 	udiv	w0, w0, w4
 	mov	x4, x1
 	add	w3, w0, w3
-	.loc 3 227 0
+	.loc 3 228 0
 	beq	.L15
 .L20:
-	.loc 3 228 0
+	.loc 3 229 0
 	str	w3, [x6, #:lo12:.LANCHOR2]
-	.loc 3 231 0
+	.loc 3 232 0
 	ldrh	w0, [x6, #:lo12:.LANCHOR2]
 	bl	FtlSysBlkNumInit
 .LVL33:
-	.loc 3 232 0
+	.loc 3 233 0
 	ldr	w1, [x6, #:lo12:.LANCHOR2]
 	adrp	x0, .LANCHOR31
-	.loc 3 263 0
+	.loc 3 264 0
 	ldp	x29, x30, [sp], 16
 	.cfi_remember_state
 	.cfi_restore 30
 	.cfi_restore 29
 	.cfi_def_cfa 31, 0
-	.loc 3 232 0
+	.loc 3 233 0
 	str	w1, [x0, #:lo12:.LANCHOR31]
-	.loc 3 234 0
+	.loc 3 235 0
 	adrp	x0, .LANCHOR7
 	ldrh	w1, [x8, #:lo12:.LANCHOR19]
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
@@ -426,31 +426,31 @@ FtlConstantsInit:
 	adrp	x1, .LANCHOR32
 	add	w0, w0, 2
 	strh	w0, [x1, #:lo12:.LANCHOR32]
-	.loc 3 235 0
+	.loc 3 236 0
 	adrp	x0, .LANCHOR33
 	mov	w1, 32
 	strh	w1, [x0, #:lo12:.LANCHOR33]
-	.loc 3 236 0
+	.loc 3 237 0
 	adrp	x0, .LANCHOR34
 	str	wzr, [x0, #:lo12:.LANCHOR34]
-	.loc 3 237 0
+	.loc 3 238 0
 	ldrh	w0, [x5, #:lo12:.LANCHOR27]
 	add	w0, w0, 3
 	strh	w0, [x5, #:lo12:.LANCHOR27]
-	.loc 3 238 0
+	.loc 3 239 0
 	ldr	w0, [x4, #:lo12:.LANCHOR30]
 	add	w0, w0, 3
 	str	w0, [x4, #:lo12:.LANCHOR30]
-	.loc 3 263 0
+	.loc 3 264 0
 	mov	w0, 0
 	ret
 .L13:
 	.cfi_restore_state
-	.loc 3 220 0
+	.loc 3 221 0
 	mov	w0, 4
 	b	.L19
 .L15:
-	.loc 3 228 0
+	.loc 3 229 0
 	add	w3, w3, 4
 	b	.L20
 	.cfi_endproc
@@ -472,8 +472,8 @@ IsBlkInVendorPart:
 	.loc 3 517 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR35]
 	cbz	w1, .L25
-.LBB166:
-.LBB167:
+.LBB185:
+.LBB186:
 	.loc 3 518 0
 	adrp	x1, .LANCHOR27
 	ldrh	w2, [x1, #:lo12:.LANCHOR27]
@@ -488,8 +488,8 @@ IsBlkInVendorPart:
 	bhi	.L24
 .LVL36:
 .L25:
-.LBE167:
-.LBE166:
+.LBE186:
+.LBE185:
 	.loc 3 524 0
 	mov	w0, 0
 .LVL37:
@@ -498,8 +498,8 @@ IsBlkInVendorPart:
 .L24:
 	add	x1, x1, 1
 .LVL39:
-.LBB169:
-.LBB168:
+.LBB188:
+.LBB187:
 	.loc 3 519 0
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4, -2]
@@ -507,22 +507,36 @@ IsBlkInVendorPart:
 	bne	.L23
 	.loc 3 520 0
 	mov	w0, 1
-.LBE168:
-.LBE169:
+.LBE187:
+.LBE188:
 	.loc 3 525 0
 	ret
 	.cfi_endproc
 .LFE208:
 	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
+	.section	.text.FtlCacheWriteBack,"ax",@progbits
+	.align	2
+	.global	FtlCacheWriteBack
+	.type	FtlCacheWriteBack, %function
+FtlCacheWriteBack:
+.LFB216:
+	.loc 3 952 0
+	.cfi_startproc
+	.loc 3 954 0
+	mov	w0, 0
+	ret
+	.cfi_endproc
+.LFE216:
+	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
 	.section	.text.sftl_get_density,"ax",@progbits
 	.align	2
 	.global	sftl_get_density
 	.type	sftl_get_density, %function
 sftl_get_density:
 .LFB221:
-	.loc 3 1214 0
+	.loc 3 1178 0
 	.cfi_startproc
-	.loc 3 1216 0
+	.loc 3 1180 0
 	adrp	x0, .LANCHOR34
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	ret
@@ -671,11 +685,11 @@ FtlBbtCalcTotleCnt:
 	ldrh	w0, [x0, #:lo12:.LANCHOR10]
 	mul	w6, w6, w0
 	cmp	w4, w6
-	blt	.L42
+	blt	.L43
 	.loc 4 169 0
 	mov	w0, w5
 	ret
-.L42:
+.L43:
 	.loc 4 157 0
 	stp	x29, x30, [sp, -16]!
 	.cfi_def_cfa_offset 16
@@ -683,25 +697,25 @@ FtlBbtCalcTotleCnt:
 	.cfi_offset 30, -8
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-.L35:
+.L36:
 	.loc 4 162 0
 	mov	w0, w4
 	bl	FtlBbmIsBadBlock
 .LVL53:
-	cbz	w0, .L34
+	cbz	w0, .L35
 	.loc 4 164 0
 	add	w5, w5, 1
 .LVL54:
 	and	w5, w5, 65535
 .LVL55:
-.L34:
+.L35:
 	.loc 4 160 0 discriminator 2
 	add	w4, w4, 1
 .LVL56:
 	and	w4, w4, 65535
 .LVL57:
 	cmp	w4, w6
-	blt	.L35
+	blt	.L36
 	.loc 4 169 0
 	mov	w0, w5
 	ldp	x29, x30, [sp], 16
@@ -813,7 +827,7 @@ ftl_cmp_data_ver:
 	.loc 2 34 0
 	cmp	w0, w1
 	mov	w2, -2147483648
-	bls	.L47
+	bls	.L48
 	.loc 2 36 0
 	sub	w1, w0, w1
 .LVL70:
@@ -822,7 +836,7 @@ ftl_cmp_data_ver:
 .LVL71:
 	ret
 .LVL72:
-.L47:
+.L48:
 	.loc 2 40 0
 	sub	w1, w1, w0
 .LVL73:
@@ -876,146 +890,58 @@ FtlFreeSysBlkQueueFull:
 	.type	FtlFreeSysBLkSort, %function
 FtlFreeSysBLkSort:
 .LFB241:
-	.loc 2 116 0
+	.loc 2 118 0
 	.cfi_startproc
 .LVL75:
-	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
-	.loc 2 123 0
-	adrp	x2, .LANCHOR38
-	.loc 2 125 0
-	adrp	x1, .LANCHOR39
-	.loc 2 123 0
-	add	x0, x2, :lo12:.LANCHOR38
-	.loc 2 116 0
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 2 125 0
-	ldr	x3, [x1, #:lo12:.LANCHOR39]
-	adrp	x1, .LANCHOR40
-	.loc 2 124 0
-	ldrh	w8, [x0, 2]
-	mov	x4, x2
 	.loc 2 123 0
-	ldrh	w7, [x0, 6]
-	.loc 2 124 0
-	mov	x6, x0
-	.loc 2 125 0
-	ldr	x10, [x1, #:lo12:.LANCHOR40]
-	.loc 2 124 0
-	and	x11, x8, 65535
-	.loc 2 123 0
-	mov	x5, 0
+	adrp	x0, .LANCHOR38
+	add	x1, x0, :lo12:.LANCHOR38
+	ldrh	w2, [x1, 6]
+	cbz	w2, .L52
+	.loc 2 119 0
+	adrp	x2, .LANCHOR39+28
+	ldrh	w3, [x1, 2]
+	mov	w6, 0
+	mov	w4, 0
+	ldrh	w5, [x2, #:lo12:.LANCHOR39+28]
+	ldrh	w2, [x1, 4]
+	and	w5, w5, 31
+.L54:
 .LVL76:
-.L52:
-	.loc 2 123 0 is_stmt 0 discriminator 1
-	cmp	w7, w5, uxth
-	bhi	.L53
-	.loc 2 128 0 is_stmt 1
-	sub	w10, w7, #1
-	.loc 2 139 0
-	add	x2, x4, :lo12:.LANCHOR38
-	mov	w0, 0
+	.loc 2 124 0 discriminator 1
+	cmp	w5, w4
+	bgt	.L55
+	cbz	w6, .L52
+	add	x0, x0, :lo12:.LANCHOR38
+	strh	w3, [x0, 2]
+	strh	w2, [x0, 4]
 .LVL77:
-.L54:
-	.loc 2 128 0 discriminator 1
-	cmp	w0, w10
-	blt	.L59
-	.loc 2 144 0
-	ldp	x29, x30, [sp], 16
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
+.L52:
 	ret
 .LVL78:
-.L53:
-	.cfi_restore_state
+.L55:
+	.loc 2 125 0 discriminator 3
+	add	x6, x1, x3, sxtw 1
 	.loc 2 124 0 discriminator 3
-	add	x0, x11, x5
-	add	x0, x6, x0, lsl 1
-	ldrh	w0, [x0, 8]
-	bl	P2V_block_in_plane
+	add	w4, w4, 1
 .LVL79:
+	.loc 2 126 0 discriminator 3
+	add	w3, w3, 1
+	.loc 2 124 0 discriminator 3
+	and	w4, w4, 65535
+	.loc 2 126 0 discriminator 3
+	and	w3, w3, 1023
 	.loc 2 125 0 discriminator 3
-	ubfiz	x0, x0, 1, 16
+	ldrh	w7, [x6, 8]
 .LVL80:
-	ldrh	w0, [x10, x0]
-	str	w0, [x3, x5, lsl 2]
-.LVL81:
-	add	x5, x5, 1
-.LVL82:
-	b	.L52
-.LVL83:
-.L59:
-	.loc 2 130 0
-	add	w5, w0, 1
-	mov	w1, w0
-	and	w5, w5, 65535
-.LVL84:
-	mov	w4, w5
-.LVL85:
-.L55:
-	.loc 2 130 0 is_stmt 0 discriminator 1
-	cmp	w4, w7
-	bcc	.L57
-	.loc 2 134 0 is_stmt 1
-	cmp	w0, w1
-	beq	.L58
-	.loc 2 136 0
-	ubfiz	x4, x0, 2, 16
-.LVL86:
-	.loc 2 135 0
-	ubfiz	x6, x1, 2, 32
-	.loc 2 140 0
-	add	w0, w8, w0
-.LVL87:
-	.loc 2 139 0
-	add	w1, w1, w8
-.LVL88:
-	.loc 2 140 0
-	add	x0, x2, x0, sxtw 1
-	.loc 2 139 0
-	add	x1, x2, x1, sxtw 1
-	.loc 2 136 0
-	ldr	w12, [x3, x4]
-	.loc 2 135 0
-	ldr	w11, [x3, x6]
-.LVL89:
-	.loc 2 136 0
-	str	w12, [x3, x6]
-	.loc 2 137 0
-	str	w11, [x3, x4]
-	.loc 2 140 0
-	ldrh	w6, [x0, 8]
-	.loc 2 139 0
-	ldrh	w4, [x1, 8]
-.LVL90:
-	.loc 2 140 0
-	strh	w6, [x1, 8]
-	.loc 2 141 0
-	strh	w4, [x0, 8]
-.LVL91:
-.L58:
-	mov	w0, w5
+	.loc 2 127 0 discriminator 3
+	add	x6, x1, x2, sxtw 1
+	strh	w7, [x6, 8]
+	mov	w6, 1
+	.loc 2 128 0 discriminator 3
+	add	w2, w2, w6
+	and	w2, w2, 1023
 	b	.L54
-.LVL92:
-.L57:
-	.loc 2 131 0
-	ubfiz	x6, x4, 2, 16
-	ldr	w11, [x3, w1, uxtw 2]
-	ldr	w6, [x3, x6]
-	cmp	w11, w6
-	csel	w1, w1, w4, ls
-.LVL93:
-	.loc 2 130 0
-	add	w4, w4, 1
-.LVL94:
-	and	w4, w4, 65535
-.LVL95:
-	b	.L55
 	.cfi_endproc
 .LFE241:
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
@@ -1025,294 +951,270 @@ FtlFreeSysBLkSort:
 	.type	IsInFreeQueue, %function
 IsInFreeQueue:
 .LFB242:
-	.loc 2 147 0
+	.loc 2 163 0
 	.cfi_startproc
-.LVL96:
-.LBB170:
-.LBB171:
+.LVL81:
+.LBB189:
+.LBB190:
 	.loc 2 94 0
 	adrp	x1, .LANCHOR38
 	add	x1, x1, :lo12:.LANCHOR38
-.LBE171:
-.LBE170:
-	.loc 2 147 0
+.LBE190:
+.LBE189:
+	.loc 2 163 0
 	and	w0, w0, 65535
-.LBB173:
-.LBB172:
+.LBB192:
+.LBB191:
 	.loc 2 94 0
 	ldrh	w4, [x1, 6]
-.LBE172:
-.LBE173:
-	.loc 2 152 0
+.LBE191:
+.LBE192:
+	.loc 2 168 0
 	cmp	w4, 1024
 	beq	.L65
-	.loc 2 155 0
+	.loc 2 171 0
 	ldrh	w5, [x1, 2]
 	mov	w3, 0
 .L63:
-.LVL97:
-	.loc 2 154 0 discriminator 1
+.LVL82:
+	.loc 2 170 0 discriminator 1
 	cmp	w3, w4
 	bcc	.L64
-.LVL98:
+.LVL83:
 .L65:
-	.loc 2 148 0
+	.loc 2 164 0
 	mov	w0, 0
-.LVL99:
+.LVL84:
 	ret
-.LVL100:
+.LVL85:
 .L64:
-	.loc 2 155 0
+	.loc 2 171 0
 	add	w2, w3, w5
 	ubfiz	x2, x2, 1, 10
 	add	x2, x1, x2
 	ldrh	w2, [x2, 8]
 	cmp	w2, w0
 	beq	.L66
-	.loc 2 154 0 discriminator 2
+	.loc 2 170 0 discriminator 2
 	add	w3, w3, 1
-.LVL101:
+.LVL86:
 	b	.L63
 .L66:
-	.loc 2 156 0
+	.loc 2 172 0
 	mov	w0, 1
-.LVL102:
-	.loc 2 162 0
+.LVL87:
+	.loc 2 178 0
 	ret
 	.cfi_endproc
 .LFE242:
 	.size	IsInFreeQueue, .-IsInFreeQueue
-	.section	.text.FtlFreeSysBlkQueueOut,"ax",@progbits
-	.align	2
-	.global	FtlFreeSysBlkQueueOut
-	.type	FtlFreeSysBlkQueueOut, %function
-FtlFreeSysBlkQueueOut:
-.LFB243:
-	.loc 2 165 0
-	.cfi_startproc
-.LVL103:
-.LBB174:
-.LBB175:
-	.loc 2 89 0
-	adrp	x1, .LANCHOR38
-	add	x1, x1, :lo12:.LANCHOR38
-	ldrh	w3, [x1, 6]
-.LBE175:
-.LBE174:
-	.loc 2 168 0
-	cbz	w3, .L69
-.LVL104:
-.LBB176:
-	.loc 2 170 0
-	ldrh	w2, [x1, 2]
-	.loc 2 171 0
-	sub	w3, w3, #1
-	strh	w3, [x1, 6]
-	.loc 2 170 0
-	add	x0, x1, x2, sxtw 1
-	.loc 2 172 0
-	add	w2, w2, 1
-	and	w2, w2, 1023
-	strh	w2, [x1, 2]
-	.loc 2 170 0
-	ldrh	w0, [x0, 8]
-.LVL105:
-	ret
-.LVL106:
-.L69:
-.LBE176:
-	.loc 2 166 0
-	mov	w0, 65535
-.LVL107:
-	.loc 2 176 0
-	ret
-	.cfi_endproc
-.LFE243:
-	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
 	.section	.text.insert_data_list,"ax",@progbits
 	.align	2
 	.global	insert_data_list
 	.type	insert_data_list, %function
 insert_data_list:
 .LFB246:
-	.loc 2 217 0
+	.loc 2 249 0
 	.cfi_startproc
-.LVL108:
+.LVL88:
+	.loc 2 260 0
+	adrp	x1, .LANCHOR5
+	.loc 2 249 0
 	and	w0, w0, 65535
-	.loc 2 225 0
-	mov	w11, 65535
-	cmp	w0, w11
-	beq	.L84
-	.loc 2 230 0
-	adrp	x1, .LANCHOR41
-	mov	w6, 6
-	ldr	x4, [x1, #:lo12:.LANCHOR41]
-	umull	x13, w0, w6
-	.loc 2 231 0
+	.loc 2 260 0
+	ldrh	w14, [x1, #:lo12:.LANCHOR5]
+	cmp	w14, w0
+	bls	.L83
+	.loc 2 265 0
+	adrp	x1, .LANCHOR40
+	mov	w3, 6
+	ldr	x6, [x1, #:lo12:.LANCHOR40]
+	umull	x13, w0, w3
+	.loc 2 266 0
 	mov	w1, -1
-	.loc 2 230 0
-	add	x3, x4, x13
-.LVL109:
-	.loc 2 231 0
-	strh	w1, [x3, 2]
-	strh	w1, [x4, x13]
-	.loc 2 233 0
-	adrp	x1, .LANCHOR42
+	.loc 2 265 0
+	add	x5, x6, x13
+.LVL89:
+	.loc 2 266 0
+	strh	w1, [x5, 2]
+	strh	w1, [x6, x13]
+	.loc 2 268 0
+	adrp	x1, .LANCHOR41
 	mov	x15, x1
-	ldr	x12, [x1, #:lo12:.LANCHOR42]
-	cbnz	x12, .L72
-	.loc 2 234 0
-	str	x3, [x1, #:lo12:.LANCHOR42]
-.LVL110:
-.L84:
-	.loc 2 281 0
+	ldr	x12, [x1, #:lo12:.LANCHOR41]
+	cbnz	x12, .L70
+	.loc 2 269 0
+	str	x5, [x1, #:lo12:.LANCHOR41]
+.LVL90:
+.L83:
+	.loc 2 323 0
 	mov	w0, 0
-.LVL111:
+.LVL91:
 	ret
-.LVL112:
-.L72:
-	.loc 2 217 0
-	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
-	.loc 2 238 0
-	adrp	x1, .LANCHOR43
+.LVL92:
+.L70:
+	.loc 2 249 0
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	.loc 2 273 0
+	adrp	x1, .LANCHOR42
 	ubfiz	x2, x0, 1, 16
-	.loc 2 244 0
-	mov	x8, -6148914691236517206
-	.loc 2 217 0
+	.loc 2 279 0
+	mov	x4, -6148914691236517206
+	.loc 2 249 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	.loc 2 238 0
-	ldr	x14, [x1, #:lo12:.LANCHOR43]
-	.loc 2 244 0
-	movk	x8, 0xaaab, lsl 0
-	.loc 2 239 0
-	ldrh	w1, [x3, 4]
-	mov	w7, -1
-	.loc 2 247 0
-	mov	w10, w7
-	.loc 2 239 0
-	cmp	w1, 0
-	.loc 2 238 0
-	ldrh	w5, [x14, x2]
-.LVL113:
-	.loc 2 239 0
-	mul	w5, w5, w1
-.LVL114:
-	.loc 2 244 0
-	sub	x1, x12, x4
-.LVL115:
-	asr	x1, x1, 1
-	.loc 2 239 0
-	csel	w5, w5, w7, ne
-.LVL116:
-	.loc 2 267 0
-	mov	w7, w6
-	.loc 2 244 0
-	mul	x1, x1, x8
-	.loc 2 252 0
-	adrp	x8, .LANCHOR40
-	ldr	x16, [x8, #:lo12:.LANCHOR40]
-	.loc 2 244 0
-	and	w1, w1, 65535
-.LVL117:
-	.loc 2 252 0
-	add	x8, x16, x2
-	mov	x2, x12
-.LVL118:
-.L79:
-	.loc 2 246 0
-	ubfiz	x17, x1, 1, 16
-	.loc 2 247 0
-	ldrh	w30, [x2, 4]
-	cmp	w30, 0
-	.loc 2 246 0
-	ldrh	w6, [x14, x17]
-.LVL119:
-	.loc 2 247 0
-	mul	w6, w6, w30
-.LVL120:
-	csel	w6, w6, w10, ne
-.LVL121:
-	.loc 2 251 0
-	cmp	w5, w6
-	bne	.L75
-	.loc 2 252 0
-	ldrh	w17, [x16, x17]
-.LVL122:
-	ldrh	w6, [x8]
-.LVL123:
-	cmp	w17, w6
-	bcc	.L77
-.L76:
-	.loc 2 270 0
-	strh	w1, [x4, x13]
-.LVL124:
 	.loc 2 273 0
-	cmp	x2, x12
-	.loc 2 271 0
-	ldrh	w1, [x2, 2]
-.LVL125:
-	strh	w1, [x3, 2]
+	ldr	x16, [x1, #:lo12:.LANCHOR42]
+	.loc 2 279 0
+	movk	x4, 0xaaab, lsl 0
+	.loc 2 274 0
+	ldrh	w1, [x5, 4]
+	mov	w8, -1
+	.loc 2 289 0
+	mov	w11, w8
+	.loc 2 249 0
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -16
+	.cfi_offset 20, -8
+	.loc 2 274 0
+	cmp	w1, 0
+	.loc 2 301 0
+	mov	w20, 65535
 	.loc 2 273 0
-	bne	.L80
+	ldrh	w7, [x16, x2]
+.LVL93:
 	.loc 2 274 0
-	strh	w0, [x2, 2]
-	.loc 2 275 0
-	str	x3, [x15, #:lo12:.LANCHOR42]
-	b	.L71
-.LVL126:
-.L75:
+	mul	w7, w7, w1
+.LVL94:
+	.loc 2 279 0
+	sub	x1, x12, x6
+.LVL95:
+	asr	x1, x1, 1
+	.loc 2 274 0
+	csel	w7, w7, w8, ne
+.LVL96:
+	.loc 2 309 0
+	mov	w8, w3
+	.loc 2 279 0
+	mul	x1, x1, x4
+	.loc 2 294 0
+	adrp	x4, .LANCHOR43
+	ldr	x17, [x4, #:lo12:.LANCHOR43]
+	.loc 2 279 0
+	and	w1, w1, 65535
+.LVL97:
+	.loc 2 294 0
+	mov	x4, x12
+	add	x10, x17, x2
 	.loc 2 256 0
+	mov	w2, 0
+.LVL98:
+.L78:
+	.loc 2 281 0
+	add	w2, w2, 1
+.LVL99:
+	and	w2, w2, 65535
+.LVL100:
+	.loc 2 282 0
+	cmp	w14, w2
+	bcc	.L69
+	.loc 2 285 0
+	cmp	w1, w0
+	beq	.L69
+	.loc 2 288 0
+	ubfiz	x30, x1, 1, 16
+	.loc 2 289 0
+	ldrh	w19, [x4, 4]
+	cmp	w19, 0
+	.loc 2 288 0
+	ldrh	w3, [x16, x30]
+.LVL101:
+	.loc 2 289 0
+	mul	w3, w3, w19
+.LVL102:
+	csel	w3, w3, w11, ne
+.LVL103:
+	.loc 2 293 0
+	cmp	w7, w3
+	bne	.L74
+	.loc 2 294 0
+	ldrh	w19, [x17, x30]
+	ldrh	w3, [x10]
+.LVL104:
+	cmp	w19, w3
 	bcc	.L76
-.LVL127:
-.L77:
-	.loc 2 259 0
-	ldrh	w6, [x2]
-	cmp	w6, w11
-	bne	.L78
-	.loc 2 260 0
-	strh	w1, [x3, 2]
-.LVL128:
-	.loc 2 261 0
-	strh	w0, [x2]
-	.loc 2 262 0
+.L75:
+	.loc 2 312 0
+	strh	w1, [x6, x13]
+.LVL105:
+	.loc 2 315 0
+	cmp	x4, x12
+	.loc 2 313 0
+	ldrh	w1, [x4, 2]
+.LVL106:
+	strh	w1, [x5, 2]
+	.loc 2 315 0
+	bne	.L79
+	.loc 2 316 0
+	strh	w0, [x4, 2]
+	.loc 2 317 0
+	str	x5, [x15, #:lo12:.LANCHOR41]
+	b	.L69
+.LVL107:
+.L74:
+	.loc 2 298 0
+	bcc	.L75
+.LVL108:
+.L76:
+	.loc 2 301 0
+	ldrh	w3, [x4]
+	cmp	w3, w20
+	bne	.L77
+	.loc 2 302 0
+	strh	w1, [x5, 2]
+.LVL109:
+	.loc 2 303 0
+	strh	w0, [x4]
+	.loc 2 304 0
 	adrp	x0, .LANCHOR44
-	str	x3, [x0, #:lo12:.LANCHOR44]
-.LVL129:
-.L71:
-	.loc 2 281 0
+	str	x5, [x0, #:lo12:.LANCHOR44]
+.LVL110:
+.L69:
+	.loc 2 323 0
 	mov	w0, 0
-	ldp	x29, x30, [sp], 16
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
 	.cfi_remember_state
 	.cfi_restore 30
 	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL130:
-.L78:
+.LVL111:
+.L77:
 	.cfi_restore_state
-	.loc 2 267 0
-	umaddl	x2, w6, w7, x4
-.LVL131:
-	.loc 2 246 0
-	mov	w1, w6
-.LVL132:
-	b	.L79
-.LVL133:
-.L80:
-	.loc 2 277 0
-	ldrh	w1, [x2, 2]
-	mov	w3, 6
-.LVL134:
-	umull	x1, w1, w3
-	strh	w0, [x4, x1]
-.LVL135:
-	.loc 2 278 0
-	strh	w0, [x2, 2]
-	b	.L71
+	.loc 2 309 0
+	umaddl	x4, w3, w8, x6
+.LVL112:
+	.loc 2 281 0
+	mov	w1, w3
+	b	.L78
+.LVL113:
+.L79:
+	.loc 2 319 0
+	ldrh	w1, [x4, 2]
+	mov	w2, 6
+.LVL114:
+	umull	x1, w1, w2
+	strh	w0, [x6, x1]
+.LVL115:
+	.loc 2 320 0
+	strh	w0, [x4, 2]
+	b	.L69
 	.cfi_endproc
 .LFE246:
 	.size	insert_data_list, .-insert_data_list
@@ -1322,51 +1224,51 @@ insert_data_list:
 	.type	INSERT_DATA_LIST, %function
 INSERT_DATA_LIST:
 .LFB245:
-	.loc 2 186 0
+	.loc 2 218 0
 	.cfi_startproc
-.LVL136:
+.LVL116:
 	stp	x29, x30, [sp, -16]!
 	.cfi_def_cfa_offset 16
 	.cfi_offset 29, -16
 	.cfi_offset 30, -8
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	.loc 2 187 0
+	.loc 2 219 0
 	bl	insert_data_list
-.LVL137:
-	.loc 2 188 0
+.LVL117:
+	.loc 2 220 0
 	adrp	x1, .LANCHOR45
 	ldrh	w0, [x1, #:lo12:.LANCHOR45]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	strh	w0, [x1, #:lo12:.LANCHOR45]
-	.loc 2 189 0
+	.loc 2 221 0
 	adrp	x1, .LANCHOR5
 	ldrh	w1, [x1, #:lo12:.LANCHOR5]
 	cmp	w1, w0
-	bcs	.L86
-.LVL138:
-	.loc 2 190 0
+	bcs	.L85
+.LVL118:
+	.loc 2 222 0
 	ldp	x29, x30, [sp], 16
 	.cfi_remember_state
 	.cfi_restore 30
 	.cfi_restore 29
 	.cfi_def_cfa 31, 0
-.LBB179:
-.LBB180:
-	.loc 2 189 0
-	mov	w2, 189
+.LBB195:
+.LBB196:
+	.loc 2 221 0
+	mov	w2, 221
 	adrp	x1, .LANCHOR46
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR46
 	add	x0, x0, :lo12:.LC1
 	b	printf
-.LVL139:
-.L86:
+.LVL119:
+.L85:
 	.cfi_restore_state
-.LBE180:
-.LBE179:
-	.loc 2 190 0
+.LBE196:
+.LBE195:
+	.loc 2 222 0
 	ldp	x29, x30, [sp], 16
 	.cfi_restore 30
 	.cfi_restore 29
@@ -1381,117 +1283,117 @@ INSERT_DATA_LIST:
 	.type	insert_free_list, %function
 insert_free_list:
 .LFB247:
-	.loc 2 284 0
+	.loc 2 326 0
 	.cfi_startproc
-.LVL140:
-	.loc 2 284 0
+.LVL120:
+	.loc 2 326 0
 	and	w0, w0, 65535
-	.loc 2 290 0
+	.loc 2 332 0
 	mov	w7, 65535
 	cmp	w0, w7
-	beq	.L90
-	.loc 2 293 0
-	adrp	x1, .LANCHOR41
+	beq	.L89
+	.loc 2 335 0
+	adrp	x1, .LANCHOR40
 	mov	w6, 6
-	ldr	x3, [x1, #:lo12:.LANCHOR41]
+	ldr	x3, [x1, #:lo12:.LANCHOR40]
 	umull	x8, w0, w6
-	.loc 2 294 0
+	.loc 2 336 0
 	mov	w1, -1
-	.loc 2 293 0
+	.loc 2 335 0
 	add	x4, x3, x8
-.LVL141:
-	.loc 2 294 0
+.LVL121:
+	.loc 2 336 0
 	strh	w1, [x4, 2]
 	strh	w1, [x3, x8]
-	.loc 2 296 0
+	.loc 2 338 0
 	adrp	x1, .LANCHOR47
 	mov	x12, x1
 	ldr	x5, [x1, #:lo12:.LANCHOR47]
-	cbnz	x5, .L91
-	.loc 2 297 0
+	cbnz	x5, .L90
+	.loc 2 339 0
 	str	x4, [x1, #:lo12:.LANCHOR47]
-.LVL142:
-.L90:
-	.loc 2 330 0
+.LVL122:
+.L89:
+	.loc 2 372 0
 	mov	w0, 0
-.LVL143:
+.LVL123:
 	ret
-.LVL144:
-.L91:
-	.loc 2 301 0
-	adrp	x1, .LANCHOR40
-	.loc 2 303 0
+.LVL124:
+.L90:
+	.loc 2 343 0
+	adrp	x1, .LANCHOR43
+	.loc 2 345 0
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
-	.loc 2 301 0
-	ldr	x11, [x1, #:lo12:.LANCHOR40]
+	.loc 2 343 0
+	ldr	x11, [x1, #:lo12:.LANCHOR43]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w13, [x11, x1]
-.LVL145:
-	.loc 2 303 0
+.LVL125:
+	.loc 2 345 0
 	sub	x1, x5, x3
 	asr	x1, x1, 1
 	mul	x1, x1, x2
 	mov	x2, x5
 	and	w1, w1, 65535
-.LVL146:
-.L94:
-	.loc 2 306 0
+.LVL126:
+.L93:
+	.loc 2 348 0
 	ubfiz	x10, x1, 1, 16
-	.loc 2 307 0
+	.loc 2 349 0
 	ldrh	w10, [x11, x10]
 	cmp	w10, w13
-	bcs	.L92
-	.loc 2 310 0
+	bcs	.L91
+	.loc 2 352 0
 	ldrh	w10, [x2]
 	cmp	w10, w7
-	bne	.L93
-	.loc 2 311 0
+	bne	.L92
+	.loc 2 353 0
 	strh	w1, [x4, 2]
-.LVL147:
-	.loc 2 312 0
+.LVL127:
+	.loc 2 354 0
 	strh	w0, [x2]
-	.loc 2 313 0
-	b	.L90
-.LVL148:
-.L93:
-	.loc 2 316 0
+	.loc 2 355 0
+	b	.L89
+.LVL128:
+.L92:
+	.loc 2 358 0
 	umaddl	x2, w10, w6, x3
-.LVL149:
-	.loc 2 306 0
+.LVL129:
+	.loc 2 348 0
 	mov	w1, w10
-.LVL150:
-	b	.L94
-.LVL151:
-.L92:
-	.loc 2 319 0
+.LVL130:
+	b	.L93
+.LVL131:
+.L91:
+	.loc 2 361 0
 	ldrh	w6, [x2, 2]
-	.loc 2 322 0
+	.loc 2 364 0
 	cmp	x2, x5
-	.loc 2 319 0
+	.loc 2 361 0
 	strh	w6, [x4, 2]
-.LVL152:
-	.loc 2 320 0
+.LVL132:
+	.loc 2 362 0
 	strh	w1, [x3, x8]
-	.loc 2 322 0
-	bne	.L95
-	.loc 2 323 0
+	.loc 2 364 0
+	bne	.L94
+	.loc 2 365 0
 	strh	w0, [x2, 2]
-	.loc 2 324 0
+	.loc 2 366 0
 	str	x4, [x12, #:lo12:.LANCHOR47]
-	b	.L90
-.L95:
-	.loc 2 326 0
+	b	.L89
+.L94:
+	.loc 2 368 0
 	ldrh	w1, [x2, 2]
-.LVL153:
+.LVL133:
 	mov	w4, 6
-.LVL154:
+.LVL134:
 	umull	x1, w1, w4
 	strh	w0, [x3, x1]
-.LVL155:
-	.loc 2 327 0
+.LVL135:
+	.loc 2 369 0
 	strh	w0, [x2, 2]
-	b	.L90
+	b	.L89
 	.cfi_endproc
 .LFE247:
 	.size	insert_free_list, .-insert_free_list
@@ -1501,51 +1403,51 @@ insert_free_list:
 	.type	INSERT_FREE_LIST, %function
 INSERT_FREE_LIST:
 .LFB244:
-	.loc 2 179 0
+	.loc 2 211 0
 	.cfi_startproc
-.LVL156:
+.LVL136:
 	stp	x29, x30, [sp, -16]!
 	.cfi_def_cfa_offset 16
 	.cfi_offset 29, -16
 	.cfi_offset 30, -8
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	.loc 2 180 0
+	.loc 2 212 0
 	bl	insert_free_list
-.LVL157:
-	.loc 2 181 0
+.LVL137:
+	.loc 2 213 0
 	adrp	x1, .LANCHOR48
 	ldrh	w0, [x1, #:lo12:.LANCHOR48]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	strh	w0, [x1, #:lo12:.LANCHOR48]
-	.loc 2 182 0
+	.loc 2 214 0
 	adrp	x1, .LANCHOR5
 	ldrh	w1, [x1, #:lo12:.LANCHOR5]
 	cmp	w1, w0
-	bcs	.L96
-.LVL158:
-	.loc 2 183 0
+	bcs	.L95
+.LVL138:
+	.loc 2 215 0
 	ldp	x29, x30, [sp], 16
 	.cfi_remember_state
 	.cfi_restore 30
 	.cfi_restore 29
 	.cfi_def_cfa 31, 0
-.LBB183:
-.LBB184:
-	.loc 2 182 0
-	mov	w2, 182
+.LBB199:
+.LBB200:
+	.loc 2 214 0
+	mov	w2, 214
 	adrp	x1, .LANCHOR49
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR49
 	add	x0, x0, :lo12:.LC1
 	b	printf
-.LVL159:
-.L96:
+.LVL139:
+.L95:
 	.cfi_restore_state
-.LBE184:
-.LBE183:
-	.loc 2 183 0
+.LBE200:
+.LBE199:
+	.loc 2 215 0
 	ldp	x29, x30, [sp], 16
 	.cfi_restore 30
 	.cfi_restore 29
@@ -1560,9 +1462,9 @@ INSERT_FREE_LIST:
 	.type	List_remove_node, %function
 List_remove_node:
 .LFB248:
-	.loc 2 333 0
+	.loc 2 375 0
 	.cfi_startproc
-.LVL160:
+.LVL140:
 	stp	x29, x30, [sp, -64]!
 	.cfi_def_cfa_offset 64
 	.cfi_offset 29, -64
@@ -1573,69 +1475,69 @@ List_remove_node:
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -48
 	.cfi_offset 20, -40
-	.loc 2 336 0
-	adrp	x20, .LANCHOR41
-	.loc 2 333 0
+	.loc 2 378 0
+	adrp	x20, .LANCHOR40
+	.loc 2 375 0
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -32
 	.cfi_offset 22, -24
 	mov	x22, x0
-	.loc 2 336 0
+	.loc 2 378 0
 	mov	w0, 6
-.LVL161:
-	.loc 2 333 0
+.LVL141:
+	.loc 2 375 0
 	str	x23, [sp, 48]
 	.cfi_offset 23, -16
-	.loc 2 336 0
-	ldr	x23, [x20, #:lo12:.LANCHOR41]
+	.loc 2 378 0
+	ldr	x23, [x20, #:lo12:.LANCHOR40]
 	umull	x21, w1, w0
-	.loc 2 337 0
+	.loc 2 379 0
 	mov	w0, 65535
-	.loc 2 336 0
+	.loc 2 378 0
 	add	x19, x23, x21
-.LVL162:
-	.loc 2 337 0
+.LVL142:
+	.loc 2 379 0
 	ldrh	w1, [x19, 2]
-.LVL163:
+.LVL143:
 	cmp	w1, w0
-	bne	.L100
-	.loc 2 337 0 is_stmt 0 discriminator 1
+	bne	.L99
+	.loc 2 379 0 is_stmt 0 discriminator 1
 	ldr	x0, [x22]
 	cmp	x19, x0
-	beq	.L100
-	.loc 2 337 0 discriminator 2
+	beq	.L99
+	.loc 2 379 0 discriminator 2
 	adrp	x1, .LANCHOR50
 	adrp	x0, .LC1
-	mov	w2, 337
+	mov	w2, 379
 	add	x1, x1, :lo12:.LANCHOR50
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL164:
-.L100:
-	.loc 2 339 0 is_stmt 1
+.LVL144:
+.L99:
+	.loc 2 381 0 is_stmt 1
 	ldr	x0, [x22]
 	mov	w1, 65535
 	cmp	x19, x0
 	ldrh	w0, [x23, x21]
-	bne	.L101
-	.loc 2 340 0
+	bne	.L100
+	.loc 2 382 0
 	cmp	w0, w1
-	bne	.L102
-	.loc 2 341 0
+	bne	.L101
+	.loc 2 383 0
 	str	xzr, [x22]
-.L103:
-	.loc 2 355 0
+.L102:
+	.loc 2 399 0
 	mov	w0, -1
 	strh	w0, [x23, x21]
 	strh	w0, [x19, 2]
-	.loc 2 357 0
+	.loc 2 401 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-.LVL165:
+.LVL145:
 	ldp	x21, x22, [sp, 32]
-.LVL166:
+.LVL146:
 	ldr	x23, [sp, 48]
-.LVL167:
+.LVL147:
 	ldp	x29, x30, [sp], 64
 	.cfi_remember_state
 	.cfi_restore 30
@@ -1647,49 +1549,56 @@ List_remove_node:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL168:
-.L102:
+.LVL148:
+.L101:
 	.cfi_restore_state
-	.loc 2 343 0
-	ldr	x1, [x20, #:lo12:.LANCHOR41]
+	.loc 2 385 0
+	ldr	x1, [x20, #:lo12:.LANCHOR40]
 	mov	w2, 6
 	umaddl	x0, w0, w2, x1
-	.loc 2 344 0
+	.loc 2 386 0
 	mov	w1, -1
-	.loc 2 343 0
+	.loc 2 385 0
 	str	x0, [x22]
-	.loc 2 344 0
+	.loc 2 386 0
 	strh	w1, [x0, 2]
-	b	.L103
-.L101:
-	.loc 2 346 0
+	b	.L102
+.L100:
+	.loc 2 388 0
 	cmp	w0, w1
-	mov	w2, 6
 	ldrh	w1, [x19, 2]
-	bne	.L104
-.LVL169:
-	.loc 2 347 0
-	umull	x1, w1, w2
-	.loc 2 348 0
-	ldr	x0, [x20, #:lo12:.LANCHOR41]
+	bne	.L103
+	.loc 2 389 0
+	cmp	w1, w0
+	beq	.L102
+.LVL149:
+	.loc 2 390 0
+	mov	w0, 6
+	.loc 2 391 0
 	mov	w2, -1
+	.loc 2 390 0
+	umull	x1, w1, w0
+.LVL150:
+	.loc 2 391 0
+	ldr	x0, [x20, #:lo12:.LANCHOR40]
 	strh	w2, [x0, x1]
-	b	.L103
-.LVL170:
-.L104:
-	.loc 2 350 0
-	ldr	x3, [x20, #:lo12:.LANCHOR41]
-.LVL171:
-	.loc 2 351 0
-	umaddl	x4, w0, w2, x3
+	b	.L102
+.LVL151:
+.L103:
+	.loc 2 394 0
+	ldr	x2, [x20, #:lo12:.LANCHOR40]
+.LVL152:
+	mov	w3, 6
+	.loc 2 395 0
+	umaddl	x4, w0, w3, x2
 	strh	w1, [x4, 2]
-.LVL172:
-	.loc 2 352 0
+.LVL153:
+	.loc 2 396 0
 	ldrh	w1, [x19, 2]
-	umull	x1, w1, w2
-	.loc 2 353 0
-	strh	w0, [x3, x1]
-	b	.L103
+	umull	x1, w1, w3
+	.loc 2 397 0
+	strh	w0, [x2, x1]
+	b	.L102
 	.cfi_endproc
 .LFE248:
 	.size	List_remove_node, .-List_remove_node
@@ -1699,54 +1608,54 @@ List_remove_node:
 	.type	List_pop_index_node, %function
 List_pop_index_node:
 .LFB249:
-	.loc 2 360 0
+	.loc 2 404 0
 	.cfi_startproc
-.LVL173:
-	.loc 2 364 0
+.LVL154:
+	.loc 2 408 0
 	ldr	x2, [x0]
-	cbz	x2, .L112
-	.loc 2 360 0
+	cbz	x2, .L111
+	.loc 2 404 0
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
 	.cfi_offset 30, -24
-	.loc 2 369 0
-	adrp	x3, .LANCHOR41
+	.loc 2 413 0
+	adrp	x3, .LANCHOR40
 	and	w1, w1, 65535
-	.loc 2 368 0
+	.loc 2 412 0
 	mov	w4, 65535
-	.loc 2 360 0
+	.loc 2 404 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	str	x19, [sp, 16]
 	.cfi_offset 19, -16
-	.loc 2 369 0
+	.loc 2 413 0
 	mov	w5, 6
-	ldr	x19, [x3, #:lo12:.LANCHOR41]
-.LVL174:
-.L108:
-	.loc 2 368 0
-	cbnz	w1, .L109
-.L111:
-	.loc 2 372 0
+	ldr	x19, [x3, #:lo12:.LANCHOR40]
+.LVL155:
+.L107:
+	.loc 2 412 0
+	cbnz	w1, .L108
+.L110:
+	.loc 2 416 0
 	sub	x19, x2, x19
 	mov	x2, -6148914691236517206
-.LVL175:
+.LVL156:
 	asr	x19, x19, 1
 	movk	x2, 0xaaab, lsl 0
 	mul	x19, x19, x2
 	and	w19, w19, 65535
-.LVL176:
-	.loc 2 373 0
+.LVL157:
+	.loc 2 417 0
 	mov	w1, w19
-.LVL177:
+.LVL158:
 	bl	List_remove_node
-.LVL178:
-	.loc 2 375 0
+.LVL159:
+	.loc 2 419 0
 	mov	w0, w19
-	.loc 2 376 0
+	.loc 2 420 0
 	ldr	x19, [sp, 16]
-.LVL179:
+.LVL160:
 	ldp	x29, x30, [sp], 32
 	.cfi_remember_state
 	.cfi_restore 30
@@ -1754,32 +1663,32 @@ List_pop_index_node:
 	.cfi_restore 19
 	.cfi_def_cfa 31, 0
 	ret
-.LVL180:
-.L109:
+.LVL161:
+.L108:
 	.cfi_restore_state
-	.loc 2 368 0 discriminator 1
+	.loc 2 412 0 discriminator 1
 	ldrh	w3, [x2]
 	cmp	w3, w4
-	beq	.L111
-	.loc 2 370 0
+	beq	.L110
+	.loc 2 414 0
 	sub	w1, w1, #1
-.LVL181:
-	.loc 2 369 0
+.LVL162:
+	.loc 2 413 0
 	umaddl	x2, w3, w5, x19
-.LVL182:
-	.loc 2 370 0
+.LVL163:
+	.loc 2 414 0
 	and	w1, w1, 65535
-.LVL183:
-	b	.L108
-.LVL184:
-.L112:
+.LVL164:
+	b	.L107
+.LVL165:
+.L111:
 	.cfi_def_cfa 31, 0
 	.cfi_restore 19
 	.cfi_restore 29
 	.cfi_restore 30
-	.loc 2 365 0
+	.loc 2 409 0
 	mov	w0, 65535
-.LVL185:
+.LVL166:
 	ret
 	.cfi_endproc
 .LFE249:
@@ -1790,13 +1699,13 @@ List_pop_index_node:
 	.type	List_pop_head_node, %function
 List_pop_head_node:
 .LFB250:
-	.loc 2 379 0
+	.loc 2 423 0
 	.cfi_startproc
-.LVL186:
-	.loc 2 380 0
+.LVL167:
+	.loc 2 424 0
 	mov	w1, 0
 	b	List_pop_index_node
-.LVL187:
+.LVL168:
 	.cfi_endproc
 .LFE250:
 	.size	List_pop_head_node, .-List_pop_head_node
@@ -1806,59 +1715,59 @@ List_pop_head_node:
 	.type	List_get_gc_head_node, %function
 List_get_gc_head_node:
 .LFB251:
-	.loc 2 384 0
+	.loc 2 428 0
 	.cfi_startproc
-.LVL188:
-	.loc 2 384 0
+.LVL169:
+	.loc 2 428 0
 	and	w2, w0, 65535
-	.loc 2 388 0
-	adrp	x0, .LANCHOR42
-.LVL189:
-	ldr	x1, [x0, #:lo12:.LANCHOR42]
-	cbz	x1, .L123
-	.loc 2 393 0
+	.loc 2 432 0
 	adrp	x0, .LANCHOR41
+.LVL170:
+	ldr	x1, [x0, #:lo12:.LANCHOR41]
+	cbz	x1, .L122
+	.loc 2 437 0
+	adrp	x0, .LANCHOR40
 	mov	w4, 6
-	ldr	x3, [x0, #:lo12:.LANCHOR41]
-	.loc 2 392 0
+	ldr	x3, [x0, #:lo12:.LANCHOR40]
+	.loc 2 436 0
 	mov	w0, 65535
-.LVL190:
-.L120:
-	cbz	w2, .L121
-	.loc 2 392 0 is_stmt 0 discriminator 1
+.LVL171:
+.L119:
+	cbz	w2, .L120
+	.loc 2 436 0 is_stmt 0 discriminator 1
 	ldrh	w1, [x1]
-.LVL191:
+.LVL172:
 	cmp	w1, w0
-	bne	.L122
+	bne	.L121
 	ret
-.L122:
-	.loc 2 394 0 is_stmt 1
+.L121:
+	.loc 2 438 0 is_stmt 1
 	sub	w2, w2, #1
-.LVL192:
-	.loc 2 393 0
+.LVL173:
+	.loc 2 437 0
 	umaddl	x1, w1, w4, x3
-.LVL193:
-	.loc 2 394 0
+.LVL174:
+	.loc 2 438 0
 	and	w2, w2, 65535
-.LVL194:
-	b	.L120
-.LVL195:
-.L123:
-	.loc 2 389 0
+.LVL175:
+	b	.L119
+.LVL176:
+.L122:
+	.loc 2 433 0
 	mov	w0, 65535
 	ret
-.LVL196:
-.L121:
-	.loc 2 398 0
+.LVL177:
+.L120:
+	.loc 2 442 0
 	sub	x0, x1, x3
 	mov	x1, -6148914691236517206
-.LVL197:
+.LVL178:
 	asr	x0, x0, 1
 	movk	x1, 0xaaab, lsl 0
 	mul	x0, x0, x1
-	.loc 2 400 0
+	.loc 2 444 0
 	and	w0, w0, 65535
-	.loc 2 401 0
+	.loc 2 445 0
 	ret
 	.cfi_endproc
 .LFE251:
@@ -1869,164 +1778,184 @@ List_get_gc_head_node:
 	.type	List_update_data_list, %function
 List_update_data_list:
 .LFB252:
-	.loc 2 404 0
+	.loc 2 448 0
 	.cfi_startproc
-.LVL198:
-	stp	x29, x30, [sp, -64]!
-	.cfi_def_cfa_offset 64
-	.cfi_offset 29, -64
-	.cfi_offset 30, -56
+.LVL179:
+	stp	x29, x30, [sp, -80]!
+	.cfi_def_cfa_offset 80
+	.cfi_offset 29, -80
+	.cfi_offset 30, -72
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -48
-	.cfi_offset 20, -40
+	.cfi_offset 19, -64
+	.cfi_offset 20, -56
 	and	w19, w0, 65535
-	.loc 2 413 0
+	.loc 2 457 0
 	adrp	x0, .LANCHOR51
-.LVL199:
-	.loc 2 404 0
+.LVL180:
+	.loc 2 448 0
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 21, -32
-	.cfi_offset 22, -24
-	.cfi_offset 23, -16
-	.cfi_offset 24, -8
-	.loc 2 413 0
+	.loc 2 457 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+	.loc 2 448 0
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 21, -48
+	.cfi_offset 22, -40
+	.cfi_offset 23, -32
+	.cfi_offset 24, -24
+	.cfi_offset 25, -16
+	.cfi_offset 26, -8
+	.loc 2 457 0
 	cmp	w0, w19
-	beq	.L126
-	.loc 2 413 0 is_stmt 0 discriminator 1
+	beq	.L125
+	.loc 2 457 0 is_stmt 0 discriminator 1
 	adrp	x0, .LANCHOR52
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
-	beq	.L126
-	.loc 2 413 0 discriminator 2
+	beq	.L125
+	.loc 2 457 0 discriminator 2
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w19
-	beq	.L126
-.LVL200:
-.LBB187:
-.LBB188:
-	.loc 2 416 0 is_stmt 1
-	adrp	x2, .LANCHOR41
-	mov	w1, 6
-	.loc 2 418 0
-	adrp	x0, .LANCHOR42
-	mov	x24, x2
-	.loc 2 416 0
-	umull	x1, w19, w1
-	ldr	x3, [x2, #:lo12:.LANCHOR41]
-	.loc 2 418 0
-	ldr	x4, [x0, #:lo12:.LANCHOR42]
-	mov	x23, x0
-	.loc 2 416 0
-	add	x22, x3, x1
-.LVL201:
-	.loc 2 418 0
-	cmp	x22, x4
-	beq	.L126
-.LVL202:
-	.loc 2 421 0
-	adrp	x0, .LANCHOR43
-	ubfiz	x2, x19, 1, 16
-	mov	x21, x0
-	ldr	x4, [x0, #:lo12:.LANCHOR43]
-	.loc 2 426 0
+	beq	.L125
+.LVL181:
+.LBB203:
+.LBB204:
+	.loc 2 460 0 is_stmt 1
+	adrp	x0, .LANCHOR40
+	mov	w21, 6
+	.loc 2 462 0
+	adrp	x24, .LANCHOR41
+	mov	x26, x0
+	.loc 2 460 0
+	umull	x21, w19, w21
+	ldr	x23, [x0, #:lo12:.LANCHOR40]
+	.loc 2 462 0
+	ldr	x1, [x24, #:lo12:.LANCHOR41]
+	.loc 2 460 0
+	add	x22, x23, x21
+.LVL182:
+	.loc 2 462 0
+	cmp	x22, x1
+	beq	.L125
+	.loc 2 465 0
+	adrp	x1, .LANCHOR42
+	ubfiz	x0, x19, 1, 16
+	mov	x25, x1
+	ldr	x2, [x1, #:lo12:.LANCHOR42]
+	.loc 2 470 0
+	mov	w1, 65535
+	.loc 2 465 0
+	ldrh	w20, [x2, x0]
+.LVL183:
+	.loc 2 466 0
+	ldrh	w0, [x22, 4]
+.LVL184:
+	cmp	w0, 0
+	mul	w20, w20, w0
+.LVL185:
+	.loc 2 470 0
 	ldrh	w0, [x22, 2]
-	.loc 2 422 0
-	ldrh	w20, [x4, x2]
-	ldrh	w2, [x22, 4]
-	mul	w20, w20, w2
-.LVL203:
-	.loc 2 426 0
-	mov	w2, 65535
-	.loc 2 424 0
-	cmp	w20, 0
+.LVL186:
+	.loc 2 466 0
 	csinv	w20, w20, wzr, ne
-.LVL204:
-	.loc 2 426 0
-	cmp	w0, w2
-	bne	.L129
-	ldrh	w1, [x3, x1]
+.LVL187:
+	.loc 2 470 0
+	cmp	w0, w1
+	bne	.L128
+	ldrh	w1, [x23, x21]
 	cmp	w1, w0
-	bne	.L129
+	bne	.L128
 	adrp	x1, .LANCHOR54
 	adrp	x0, .LC1
-	mov	w2, 426
+	mov	w2, 470
+.LVL188:
 	add	x1, x1, :lo12:.LANCHOR54
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL205:
+.LVL189:
+.L128:
+	.loc 2 471 0
+	ldrh	w0, [x22, 2]
+	mov	w1, 65535
+	cmp	w0, w1
+	bne	.L129
+	ldrh	w1, [x23, x21]
+	cmp	w1, w0
+	beq	.L125
 .L129:
-	.loc 2 427 0
-	ldrh	w1, [x22, 2]
-	mov	w0, 6
-	.loc 2 428 0
+	.loc 2 473 0
+	mov	w1, 6
+	.loc 2 474 0
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
-	.loc 2 427 0
-	umull	x1, w1, w0
-.LVL206:
-	.loc 2 428 0
-	asr	x0, x1, 1
-	mul	x0, x0, x2
-	.loc 2 429 0
-	ldr	x2, [x21, #:lo12:.LANCHOR43]
-	.loc 2 430 0
-	ldrh	w0, [x2, x0, lsl 1]
-	ldr	x2, [x24, #:lo12:.LANCHOR41]
-	add	x1, x2, x1
-.LVL207:
-	ldrh	w1, [x1, 4]
-.LVL208:
-	mul	w0, w0, w1
-.LVL209:
-	.loc 2 432 0
-	cmp	w0, 0
+	.loc 2 473 0
+	umull	x0, w0, w1
+.LVL190:
+	.loc 2 474 0
+	asr	x1, x0, 1
+	mul	x1, x1, x2
+	.loc 2 475 0
+	ldr	x2, [x25, #:lo12:.LANCHOR42]
+	ldrh	w1, [x2, x1, lsl 1]
+.LVL191:
+	.loc 2 476 0
+	ldr	x2, [x26, #:lo12:.LANCHOR40]
+	add	x0, x2, x0
+.LVL192:
+	ldrh	w2, [x0, 4]
+.LVL193:
+	cmp	w2, 0
+	mul	w0, w1, w2
+.LVL194:
 	csinv	w0, w0, wzr, ne
-.LVL210:
-	.loc 2 434 0
+.LVL195:
+	.loc 2 480 0
 	cmp	w20, w0
-	bcs	.L126
-	.loc 2 435 0
+	bcs	.L125
+	.loc 2 481 0
 	adrp	x20, .LANCHOR45
-.LVL211:
+.LVL196:
 	mov	w1, w19
-	add	x0, x23, :lo12:.LANCHOR42
-.LVL212:
+.LVL197:
+	add	x0, x24, :lo12:.LANCHOR41
+.LVL198:
 	bl	List_remove_node
-.LVL213:
+.LVL199:
 	ldrh	w0, [x20, #:lo12:.LANCHOR45]
 	cbnz	w0, .L131
 	adrp	x1, .LANCHOR54
 	adrp	x0, .LC1
-	mov	w2, 435
+	mov	w2, 481
 	add	x1, x1, :lo12:.LANCHOR54
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL214:
+.LVL200:
 .L131:
 	ldrh	w0, [x20, #:lo12:.LANCHOR45]
 	sub	w0, w0, #1
 	strh	w0, [x20, #:lo12:.LANCHOR45]
-	.loc 2 436 0
+	.loc 2 482 0
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-.LVL215:
-.L126:
-.LBE188:
-.LBE187:
-	.loc 2 439 0
+.LVL201:
+.L125:
+.LBE204:
+.LBE203:
+	.loc 2 485 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-.LVL216:
+.LVL202:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 64
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
 	.cfi_restore 30
 	.cfi_restore 29
+	.cfi_restore 25
+	.cfi_restore 26
 	.cfi_restore 23
 	.cfi_restore 24
 	.cfi_restore 21
@@ -2038,191 +1967,94 @@ List_update_data_list:
 	.cfi_endproc
 .LFE252:
 	.size	List_update_data_list, .-List_update_data_list
-	.section	.text.ftl_map_blk_alloc_new_blk,"ax",@progbits
-	.align	2
-	.global	ftl_map_blk_alloc_new_blk
-	.type	ftl_map_blk_alloc_new_blk, %function
-ftl_map_blk_alloc_new_blk:
-.LFB255:
-	.loc 2 516 0
-	.cfi_startproc
-.LVL217:
-	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
-.LVL218:
-	mov	x4, x0
-	.loc 2 520 0
-	mov	w5, 0
-	.loc 2 516 0
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 2 520 0
-	ldrh	w1, [x0, 10]
-	ldr	x0, [x0, 16]
-.LVL219:
-.L134:
-	.loc 2 520 0 is_stmt 0 discriminator 1
-	cmp	w5, w1
-	bne	.L137
-.L138:
-.LVL220:
-.LBB191:
-.LBB192:
-	.loc 2 532 0 is_stmt 1
-	mov	w2, 532
-	adrp	x1, .LANCHOR55
-	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR55
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.LVL221:
-	b	.L139
-.LVL222:
-.L137:
-.LBE192:
-.LBE191:
-	.loc 2 521 0
-	mov	x6, x0
-	ldrh	w2, [x0], 2
-	cbnz	w2, .L135
-	.loc 2 522 0
-	bl	FtlFreeSysBlkQueueOut
-.LVL223:
-	strh	w0, [x6]
-	.loc 2 523 0
-	tst	w0, 65535
-	beq	.L136
-	.loc 2 526 0
-	ldr	w0, [x4, 48]
-	.loc 2 524 0
-	strh	wzr, [x4, 2]
-	.loc 2 526 0
-	add	w0, w0, 1
-	str	w0, [x4, 48]
-	.loc 2 527 0
-	ldrh	w0, [x4, 8]
-	.loc 2 525 0
-	strh	w5, [x4]
-	.loc 2 527 0
-	add	w0, w0, 1
-	strh	w0, [x4, 8]
-.L136:
-	.loc 2 532 0
-	ldrh	w0, [x4, 10]
-	cmp	w0, w5
-	bls	.L138
-.LVL224:
-.L139:
-	.loc 2 534 0
-	mov	w0, 0
-	ldp	x29, x30, [sp], 16
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
-	ret
-.LVL225:
-.L135:
-	.cfi_restore_state
-	.loc 2 520 0 discriminator 2
-	add	w5, w5, 1
-.LVL226:
-	and	w5, w5, 65535
-.LVL227:
-	b	.L134
-	.cfi_endproc
-.LFE255:
-	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
 	.section	.text.select_l2p_ram_region,"ax",@progbits
 	.align	2
 	.global	select_l2p_ram_region
 	.type	select_l2p_ram_region, %function
 select_l2p_ram_region:
 .LFB260:
-	.loc 2 700 0
+	.loc 2 749 0
 	.cfi_startproc
-.LVL228:
+.LVL203:
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
 	.cfi_offset 30, -24
-	.loc 2 705 0
+	.loc 2 754 0
 	adrp	x0, .LANCHOR33
 	mov	x1, 0
-	.loc 2 706 0
+	.loc 2 755 0
 	mov	w3, 65535
-	.loc 2 700 0
+	.loc 2 749 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	.loc 2 705 0
+	.loc 2 754 0
 	ldrh	w2, [x0, #:lo12:.LANCHOR33]
-	.loc 2 706 0
-	adrp	x0, .LANCHOR56
-	.loc 2 700 0
+	.loc 2 755 0
+	adrp	x0, .LANCHOR55
+	.loc 2 749 0
 	str	x19, [sp, 16]
 	.cfi_offset 19, -16
-	.loc 2 706 0
-	ldr	x0, [x0, #:lo12:.LANCHOR56]
-.LVL229:
-.L145:
+	.loc 2 755 0
+	ldr	x0, [x0, #:lo12:.LANCHOR55]
+.LVL204:
+.L136:
 	and	w19, w1, 65535
-.LVL230:
-	.loc 2 705 0 discriminator 1
+.LVL205:
+	.loc 2 754 0 discriminator 1
 	cmp	w19, w2
-	bcc	.L147
+	bcc	.L138
 	add	x3, x0, 4
-	.loc 2 705 0 is_stmt 0
+	.loc 2 754 0 is_stmt 0
 	mov	w19, w2
-.LVL231:
+.LVL206:
 	mov	w5, -2147483648
 	mov	w1, 0
-.LVL232:
-.L148:
-	.loc 2 715 0 is_stmt 1 discriminator 1
+.LVL207:
+.L139:
+	.loc 2 764 0 is_stmt 1 discriminator 1
 	cmp	w1, w2
-	bne	.L150
-	.loc 2 724 0
+	bne	.L141
+	.loc 2 773 0
 	cmp	w19, w2
-	bcc	.L146
-	.loc 2 730 0
-	adrp	x1, .LANCHOR57
-.LVL233:
+	bcc	.L137
+	.loc 2 779 0
+	adrp	x1, .LANCHOR56
+.LVL208:
 	mov	w19, w2
-.LVL234:
+.LVL209:
 	mov	w3, -1
-	ldrh	w4, [x1, #:lo12:.LANCHOR57]
+	ldrh	w4, [x1, #:lo12:.LANCHOR56]
 	mov	w1, 0
-.LVL235:
-.L151:
-	.loc 2 729 0 discriminator 1
+.LVL210:
+.L142:
+	.loc 2 778 0 discriminator 1
 	cmp	w1, w2
-	bne	.L153
-	.loc 2 735 0
+	bne	.L144
+	.loc 2 784 0
 	cmp	w19, w1
-	bcc	.L146
-	.loc 2 735 0 is_stmt 0 discriminator 1
-	mov	w2, 735
-	adrp	x1, .LANCHOR58
-.LVL236:
+	bcc	.L137
+	.loc 2 784 0 is_stmt 0 discriminator 1
+	mov	w2, 784
+	adrp	x1, .LANCHOR57
+.LVL211:
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR58
+	add	x1, x1, :lo12:.LANCHOR57
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL237:
-	b	.L146
-.LVL238:
-.L147:
+.LVL212:
+	b	.L137
+.LVL213:
+.L138:
 	add	x1, x1, 1
-	.loc 2 706 0 is_stmt 1
+	.loc 2 755 0 is_stmt 1
 	add	x4, x0, x1, lsl 4
 	ldrh	w4, [x4, -16]
 	cmp	w4, w3
-	bne	.L145
-.LVL239:
-.L146:
-	.loc 2 737 0
+	bne	.L136
+.LVL214:
+.L137:
+	.loc 2 786 0
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -2232,48 +2064,48 @@ select_l2p_ram_region:
 	.cfi_restore 19
 	.cfi_def_cfa 31, 0
 	ret
-.LVL240:
-.L150:
+.LVL215:
+.L141:
 	.cfi_restore_state
-	.loc 2 716 0
+	.loc 2 765 0
 	ldr	w4, [x3]
-	tbnz	w4, #31, .L149
-	.loc 2 717 0
+	tbnz	w4, #31, .L140
+	.loc 2 766 0
 	cmp	w5, w4
-	bls	.L149
+	bls	.L140
 	mov	w5, w4
-.LVL241:
+.LVL216:
 	mov	w19, w1
-.LVL242:
-.L149:
-	.loc 2 715 0 discriminator 2
+.LVL217:
+.L140:
+	.loc 2 764 0 discriminator 2
 	add	w1, w1, 1
-.LVL243:
+.LVL218:
 	add	x3, x3, 16
 	and	w1, w1, 65535
-.LVL244:
-	b	.L148
-.LVL245:
-.L153:
-	.loc 2 730 0
+.LVL219:
+	b	.L139
+.LVL220:
+.L144:
+	.loc 2 779 0
 	ldr	w6, [x0, 4]
 	cmp	w3, w6
-	bls	.L152
-	.loc 2 730 0 is_stmt 0 discriminator 1
+	bls	.L143
+	.loc 2 779 0 is_stmt 0 discriminator 1
 	ldrh	w5, [x0]
 	cmp	w5, w4
 	csel	w3, w3, w6, eq
-.LVL246:
+.LVL221:
 	csel	w19, w19, w1, eq
-.LVL247:
-.L152:
-	.loc 2 729 0 is_stmt 1 discriminator 2
+.LVL222:
+.L143:
+	.loc 2 778 0 is_stmt 1 discriminator 2
 	add	w1, w1, 1
-.LVL248:
+.LVL223:
 	add	x0, x0, 16
 	and	w1, w1, 65535
-.LVL249:
-	b	.L151
+.LVL224:
+	b	.L142
 	.cfi_endproc
 .LFE260:
 	.size	select_l2p_ram_region, .-select_l2p_ram_region
@@ -2283,78 +2115,78 @@ select_l2p_ram_region:
 	.type	FtlUpdateVaildLpn, %function
 FtlUpdateVaildLpn:
 .LFB266:
-	.loc 2 882 0
+	.loc 2 931 0
 	.cfi_startproc
-.LVL250:
-	.loc 2 885 0
-	adrp	x2, .LANCHOR59
+.LVL225:
+	.loc 2 934 0
+	adrp	x2, .LANCHOR58
 	mov	x3, x2
-	ldrh	w1, [x2, #:lo12:.LANCHOR59]
+	ldrh	w1, [x2, #:lo12:.LANCHOR58]
 	cmp	w1, 4
-	bhi	.L156
-	.loc 2 885 0 is_stmt 0 discriminator 1
-	cbnz	w0, .L156
-	.loc 2 885 0
+	bhi	.L147
+	.loc 2 934 0 is_stmt 0 discriminator 1
+	cbnz	w0, .L147
+	.loc 2 934 0
 	add	w1, w1, 1
-	strh	w1, [x2, #:lo12:.LANCHOR59]
-	.loc 2 894 0 is_stmt 1
+	strh	w1, [x2, #:lo12:.LANCHOR58]
+	.loc 2 943 0 is_stmt 1
 	ret
-.L156:
-.LBB195:
-.LBB196:
-	.loc 2 888 0
+.L147:
+.LBB207:
+.LBB208:
+	.loc 2 937 0
 	adrp	x1, .LANCHOR5
-.LBE196:
-.LBE195:
-	.loc 2 887 0
-	adrp	x0, .LANCHOR60
-.LVL251:
-	.loc 2 886 0
-	strh	wzr, [x3, #:lo12:.LANCHOR59]
-.LBB199:
-.LBB197:
-	.loc 2 890 0
+.LBE208:
+.LBE207:
+	.loc 2 936 0
+	adrp	x0, .LANCHOR59
+.LVL226:
+	.loc 2 935 0
+	strh	wzr, [x3, #:lo12:.LANCHOR58]
+.LBB211:
+.LBB209:
+	.loc 2 939 0
 	mov	w2, 0
-	.loc 2 888 0
+	.loc 2 937 0
 	ldrh	w5, [x1, #:lo12:.LANCHOR5]
-	.loc 2 890 0
-	adrp	x1, .LANCHOR43
-.LBE197:
-.LBE199:
-	.loc 2 887 0
-	str	wzr, [x0, #:lo12:.LANCHOR60]
-.LVL252:
-.LBB200:
-.LBB198:
-	.loc 2 890 0
+	.loc 2 939 0
+	adrp	x1, .LANCHOR42
+.LBE209:
+.LBE211:
+	.loc 2 936 0
+	str	wzr, [x0, #:lo12:.LANCHOR59]
+.LVL227:
+.LBB212:
+.LBB210:
+	.loc 2 939 0
 	mov	w3, 0
-	ldr	x6, [x1, #:lo12:.LANCHOR43]
+	ldr	x6, [x1, #:lo12:.LANCHOR42]
 	mov	w7, 65535
 	mov	x1, 0
-.L157:
-.LVL253:
-	.loc 2 888 0
+.L148:
+.LVL228:
+	.loc 2 937 0
 	cmp	w5, w1, uxth
-	bhi	.L159
-	cbz	w3, .L155
-	str	w2, [x0, #:lo12:.LANCHOR60]
-.L155:
+	bhi	.L150
+	cbz	w3, .L146
+	str	w2, [x0, #:lo12:.LANCHOR59]
+.L146:
 	ret
-.L159:
-	.loc 2 890 0
+.L150:
+	.loc 2 939 0
 	ldrh	w4, [x6, x1, lsl 1]
 	cmp	w4, w7
-	beq	.L158
-	.loc 2 891 0
+	beq	.L149
+	.loc 2 940 0
 	add	w2, w2, w4
 	mov	w3, 1
-.L158:
-.LVL254:
+.L149:
+.LVL229:
 	add	x1, x1, 1
-.LVL255:
-	b	.L157
-.LBE198:
-.LBE200:
+.LVL230:
+	b	.L148
+.LBE210:
+.LBE212:
 	.cfi_endproc
 .LFE266:
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
@@ -2364,19 +2196,19 @@ FtlUpdateVaildLpn:
 	.type	ftl_set_blk_mode, %function
 ftl_set_blk_mode:
 .LFB272:
-	.loc 2 1347 0
+	.loc 2 1396 0
 	.cfi_startproc
-.LVL256:
-	.loc 2 1347 0
+.LVL231:
+	.loc 2 1396 0
 	and	w0, w0, 65535
-	.loc 2 1348 0
-	cbz	w1, .L166
-	b	ftl_set_blk_mode.part.7
-.LVL257:
-.L166:
-	.loc 2 1351 0
+	.loc 2 1397 0
+	cbz	w1, .L157
+	b	ftl_set_blk_mode.part.6
+.LVL232:
+.L157:
+	.loc 2 1400 0
 	adrp	x1, .LANCHOR1
-.LVL258:
+.LVL233:
 	ubfx	x2, x0, 5, 11
 	lsl	x2, x2, 2
 	ldr	x3, [x1, #:lo12:.LANCHOR1]
@@ -2395,19 +2227,19 @@ ftl_set_blk_mode:
 	.type	ftl_get_blk_mode, %function
 ftl_get_blk_mode:
 .LFB273:
-	.loc 2 1355 0
+	.loc 2 1404 0
 	.cfi_startproc
-.LVL259:
-	.loc 2 1355 0
+.LVL234:
+	.loc 2 1404 0
 	and	w1, w0, 65535
-	.loc 2 1356 0
+	.loc 2 1405 0
 	adrp	x0, .LANCHOR1
-.LVL260:
+.LVL235:
 	ldr	x0, [x0, #:lo12:.LANCHOR1]
 	ubfx	x2, x1, 5, 11
 	ldr	w0, [x0, x2, lsl 2]
 	lsr	w0, w0, w1
-	.loc 2 1357 0
+	.loc 2 1406 0
 	and	w0, w0, 1
 	ret
 	.cfi_endproc
@@ -2419,81 +2251,81 @@ ftl_get_blk_mode:
 	.type	ftl_sb_update_avl_pages, %function
 ftl_sb_update_avl_pages:
 .LFB279:
-	.loc 2 1608 0
+	.loc 2 1657 0
 	.cfi_startproc
-.LVL261:
-	.loc 2 1608 0
+.LVL236:
+	.loc 2 1657 0
 	and	w2, w2, 65535
 	and	w6, w1, 65535
 	ubfiz	x4, x2, 1, 16
-	.loc 2 1611 0
+	.loc 2 1660 0
 	adrp	x1, .LANCHOR3
-.LVL262:
+.LVL237:
 	add	x4, x4, 16
-	.loc 2 1610 0
+	.loc 2 1659 0
 	strh	wzr, [x0, 4]
-.LVL263:
+.LVL238:
 	add	x4, x0, x4
-	.loc 2 1611 0
+	.loc 2 1660 0
 	ldrh	w3, [x1, #:lo12:.LANCHOR3]
-	.loc 2 1613 0
+	.loc 2 1662 0
 	mov	w1, 65535
-.LVL264:
-.L169:
-	.loc 2 1611 0 discriminator 1
+.LVL239:
+.L160:
+	.loc 2 1660 0 discriminator 1
 	cmp	w2, w3
-	bcc	.L171
-	.loc 2 1622 0
+	bcc	.L162
+	.loc 2 1671 0
 	adrp	x1, .LANCHOR19
 	ubfiz	x3, x3, 1, 16
 	add	x3, x3, 16
 	add	x2, x0, 16
-.LVL265:
+.LVL240:
 	ldrh	w1, [x1, #:lo12:.LANCHOR19]
 	add	x3, x0, x3
-	.loc 2 1620 0
+	.loc 2 1669 0
 	mov	w5, 65535
 	sub	w1, w1, #1
 	and	w1, w1, 65535
-	.loc 2 1622 0
+	.loc 2 1671 0
 	sub	w1, w1, w6
-.L172:
-	.loc 2 1618 0 discriminator 1
+.L163:
+	.loc 2 1667 0 discriminator 1
 	cmp	x2, x3
-	bne	.L174
-	.loc 2 1625 0
+	bne	.L165
+	.loc 2 1674 0
 	ret
-.LVL266:
-.L171:
-	.loc 2 1613 0
+.LVL241:
+.L162:
+	.loc 2 1662 0
 	ldrh	w5, [x4]
 	cmp	w5, w1
-	beq	.L170
-	.loc 2 1615 0
+	beq	.L161
+	.loc 2 1664 0
 	ldrh	w5, [x0, 4]
 	add	w5, w5, 1
 	strh	w5, [x0, 4]
-.L170:
-	.loc 2 1611 0 discriminator 2
+.L161:
+	.loc 2 1660 0 discriminator 2
 	add	w2, w2, 1
-.LVL267:
+.LVL242:
 	add	x4, x4, 2
 	and	w2, w2, 65535
-.LVL268:
-	b	.L169
-.LVL269:
-.L174:
-	.loc 2 1620 0
+.LVL243:
+	b	.L160
+.LVL244:
+.L165:
+	.loc 2 1669 0
 	ldrh	w4, [x2]
 	cmp	w4, w5
-	beq	.L173
-	.loc 2 1622 0
+	beq	.L164
+	.loc 2 1671 0
 	ldrh	w4, [x0, 4]
 	add	w4, w1, w4
 	strh	w4, [x0, 4]
-.L173:
+.L164:
 	add	x2, x2, 2
-	b	.L172
+	b	.L163
 	.cfi_endproc
 .LFE279:
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
@@ -2503,62 +2335,62 @@ ftl_sb_update_avl_pages:
 	.type	FtlSlcSuperblockCheck, %function
 FtlSlcSuperblockCheck:
 .LFB282:
-	.loc 2 2013 0
+	.loc 2 2062 0
 	.cfi_startproc
-.LVL270:
-	.loc 2 2016 0
+.LVL245:
+	.loc 2 2065 0
 	ldrh	w1, [x0, 4]
-	cbz	w1, .L175
-	.loc 2 2018 0
+	cbz	w1, .L166
+	.loc 2 2067 0
 	ldrh	w2, [x0]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L175
-.LVL271:
-.LBB203:
-.LBB204:
-	.loc 2 2020 0
+	beq	.L166
+.LVL246:
+.LBB215:
+.LBB216:
+	.loc 2 2069 0
 	ldrb	w2, [x0, 6]
 	add	x2, x2, 8
 	ldrh	w3, [x0, x2, lsl 1]
-.LVL272:
-	.loc 2 2023 0
+.LVL247:
+	.loc 2 2072 0
 	adrp	x2, .LANCHOR3
 	ldrh	w4, [x2, #:lo12:.LANCHOR3]
-	.loc 2 2021 0
+	.loc 2 2070 0
 	mov	w2, w1
-.L178:
+.L169:
 	cmp	w3, w2
-	beq	.L180
-.LVL273:
-.L175:
+	beq	.L171
+.LVL248:
+.L166:
 	ret
-.LVL274:
-.L180:
-	.loc 2 2022 0
+.LVL249:
+.L171:
+	.loc 2 2071 0
 	ldrb	w1, [x0, 6]
 	add	w1, w1, 1
 	and	w1, w1, 255
 	strb	w1, [x0, 6]
-	.loc 2 2023 0
+	.loc 2 2072 0
 	cmp	w1, w4
-	bne	.L179
-	.loc 2 2024 0
+	bne	.L170
+	.loc 2 2073 0
 	ldrh	w1, [x0, 2]
-	.loc 2 2025 0
+	.loc 2 2074 0
 	strb	wzr, [x0, 6]
-	.loc 2 2024 0
+	.loc 2 2073 0
 	add	w1, w1, 1
 	strh	w1, [x0, 2]
-.L179:
-	.loc 2 2027 0
+.L170:
+	.loc 2 2076 0
 	ldrb	w1, [x0, 6]
 	add	x1, x1, 8
 	ldrh	w3, [x0, x1, lsl 1]
-.LVL275:
-	b	.L178
-.LBE204:
-.LBE203:
+.LVL250:
+	b	.L169
+.LBE216:
+.LBE215:
 	.cfi_endproc
 .LFE282:
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
@@ -2568,70 +2400,70 @@ FtlSlcSuperblockCheck:
 	.type	make_superblock, %function
 make_superblock:
 .LFB284:
-	.loc 2 2045 0
+	.loc 2 2094 0
 	.cfi_startproc
-.LVL276:
+.LVL251:
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
 	.cfi_offset 30, -24
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	.loc 2 2048 0
+	.loc 2 2097 0
 	ldrh	w1, [x0]
-	.loc 2 2045 0
+	.loc 2 2094 0
 	str	x19, [sp, 16]
 	.cfi_offset 19, -16
-	.loc 2 2045 0
+	.loc 2 2094 0
 	mov	x19, x0
-	.loc 2 2048 0
+	.loc 2 2097 0
 	adrp	x0, .LANCHOR5
-.LVL277:
+.LVL252:
 	ldrh	w0, [x0, #:lo12:.LANCHOR5]
 	cmp	w1, w0
-	bcc	.L182
-	.loc 2 2048 0 is_stmt 0 discriminator 1
-	adrp	x1, .LANCHOR61
+	bcc	.L173
+	.loc 2 2097 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR60
 	adrp	x0, .LC1
-	mov	w2, 2048
-	add	x1, x1, :lo12:.LANCHOR61
+	mov	w2, 2097
+	add	x1, x1, :lo12:.LANCHOR60
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL278:
-.L182:
-	.loc 2 2051 0 is_stmt 1
+.LVL253:
+.L173:
+	.loc 2 2100 0 is_stmt 1
 	adrp	x0, .LANCHOR3
-	.loc 2 2052 0
+	.loc 2 2101 0
 	adrp	x7, .LANCHOR13
 	add	x6, x19, 16
 	add	x7, x7, :lo12:.LANCHOR13
-	.loc 2 2051 0
+	.loc 2 2100 0
 	ldrh	w8, [x0, #:lo12:.LANCHOR3]
 	mov	x5, 0
-	.loc 2 2049 0
+	.loc 2 2098 0
 	strh	wzr, [x19, 4]
-	.loc 2 2053 0
+	.loc 2 2102 0
 	mov	w10, -1
-	.loc 2 2050 0
+	.loc 2 2099 0
 	strb	wzr, [x19, 7]
-.LVL279:
-.L183:
-	.loc 2 2051 0 discriminator 1
+.LVL254:
+.L174:
+	.loc 2 2100 0 discriminator 1
 	cmp	w8, w5, uxth
-	bhi	.L185
-	.loc 2 2061 0
+	bhi	.L176
+	.loc 2 2110 0
 	adrp	x1, .LANCHOR19
 	ldrb	w0, [x19, 7]
 	ldrh	w1, [x1, #:lo12:.LANCHOR19]
 	mul	w0, w0, w1
 	strh	w0, [x19, 4]
-	.loc 2 2062 0
+	.loc 2 2111 0
 	mov	w0, 1
 	strb	w0, [x19, 9]
-	.loc 2 2064 0
+	.loc 2 2113 0
 	mov	w0, 0
 	ldr	x19, [sp, 16]
-.LVL280:
+.LVL255:
 	ldp	x29, x30, [sp], 32
 	.cfi_remember_state
 	.cfi_restore 30
@@ -2639,34 +2471,34 @@ make_superblock:
 	.cfi_restore 19
 	.cfi_def_cfa 31, 0
 	ret
-.LVL281:
-.L185:
+.LVL256:
+.L176:
 	.cfi_restore_state
-	.loc 2 2052 0
+	.loc 2 2101 0
 	ldrh	w1, [x19]
 	ldrb	w0, [x7, x5]
 	bl	V2P_block
-.LVL282:
+.LVL257:
 	mov	w4, w0
-.LVL283:
-	.loc 2 2053 0
+.LVL258:
+	.loc 2 2102 0
 	strh	w10, [x6]
-	.loc 2 2054 0
+	.loc 2 2103 0
 	bl	FtlBbmIsBadBlock
-.LVL284:
-	cbnz	w0, .L184
-	.loc 2 2055 0
+.LVL259:
+	cbnz	w0, .L175
+	.loc 2 2104 0
 	strh	w4, [x6]
-	.loc 2 2056 0
+	.loc 2 2105 0
 	ldrb	w0, [x19, 7]
 	add	w0, w0, 1
 	strb	w0, [x19, 7]
-.L184:
-.LVL285:
+.L175:
+.LVL260:
 	add	x5, x5, 1
-.LVL286:
+.LVL261:
 	add	x6, x6, 2
-	b	.L183
+	b	.L174
 	.cfi_endproc
 .LFE284:
 	.size	make_superblock, .-make_superblock
@@ -2676,110 +2508,110 @@ make_superblock:
 	.type	update_multiplier_value, %function
 update_multiplier_value:
 .LFB293:
-	.loc 2 2401 0
+	.loc 2 2454 0
 	.cfi_startproc
-.LVL287:
+.LVL262:
 	and	w6, w0, 65535
-	.loc 2 2405 0
+	.loc 2 2458 0
 	adrp	x0, .LANCHOR3
-.LVL288:
+.LVL263:
 	mov	x7, 0
-	.loc 2 2406 0
+	.loc 2 2459 0
 	adrp	x8, .LANCHOR13
-	.loc 2 2405 0
+	.loc 2 2458 0
 	ldrh	w10, [x0, #:lo12:.LANCHOR3]
-	.loc 2 2408 0
+	.loc 2 2461 0
 	adrp	x0, .LANCHOR19
-	.loc 2 2403 0
+	.loc 2 2456 0
 	mov	w5, 0
-	.loc 2 2406 0
+	.loc 2 2459 0
 	add	x8, x8, :lo12:.LANCHOR13
-.LVL289:
-	.loc 2 2408 0
+.LVL264:
+	.loc 2 2461 0
 	ldrh	w11, [x0, #:lo12:.LANCHOR19]
-	.loc 2 2405 0
+	.loc 2 2458 0
 	cmp	w10, w7, uxth
-	bhi	.L199
-	.loc 2 2410 0
-	cbz	w5, .L197
-	.loc 2 2411 0
+	bhi	.L190
+	.loc 2 2463 0
+	cbz	w5, .L188
+	.loc 2 2464 0
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.LVL290:
-.L198:
-	.loc 2 2412 0
-	adrp	x0, .LANCHOR41
+.LVL265:
+.L189:
+	.loc 2 2465 0
+	adrp	x0, .LANCHOR40
 	mov	w1, 6
-	ldr	x0, [x0, #:lo12:.LANCHOR41]
+	ldr	x0, [x0, #:lo12:.LANCHOR40]
 	umaddl	x6, w6, w1, x0
-.LVL291:
-	.loc 2 2414 0
+.LVL266:
+	.loc 2 2467 0
 	mov	w0, 0
-	.loc 2 2412 0
+	.loc 2 2465 0
 	strh	w5, [x6, 4]
-	.loc 2 2414 0
+	.loc 2 2467 0
 	ret
-.LVL292:
-.L192:
+.LVL267:
+.L183:
 	.cfi_def_cfa 29, 16
 	.cfi_offset 29, -16
 	.cfi_offset 30, -8
 	mov	w5, 0
-.LVL293:
-	b	.L191
-.LVL294:
-.L197:
+.LVL268:
+	b	.L182
+.LVL269:
+.L188:
 	.cfi_def_cfa 31, 0
 	.cfi_restore 29
 	.cfi_restore 30
 	mov	w5, 0
-	b	.L198
-.L199:
-	.loc 2 2401 0
+	b	.L189
+.L190:
+	.loc 2 2454 0
 	stp	x29, x30, [sp, -16]!
 	.cfi_def_cfa_offset 16
 	.cfi_offset 29, -16
 	.cfi_offset 30, -8
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-.L190:
-	.loc 2 2406 0
+.L181:
+	.loc 2 2459 0
 	ldrb	w0, [x8, x7]
 	mov	w1, w6
 	bl	V2P_block
-.LVL295:
-	.loc 2 2407 0
+.LVL270:
+	.loc 2 2460 0
 	bl	FtlBbmIsBadBlock
-.LVL296:
-	cbnz	w0, .L189
-	.loc 2 2408 0
+.LVL271:
+	cbnz	w0, .L180
+	.loc 2 2461 0
 	add	w5, w5, w11
-.LVL297:
+.LVL272:
 	and	w5, w5, 65535
-.LVL298:
-.L189:
+.LVL273:
+.L180:
 	add	x7, x7, 1
-.LVL299:
-	.loc 2 2405 0 discriminator 2
+.LVL274:
+	.loc 2 2458 0 discriminator 2
 	cmp	w10, w7, uxth
-	bhi	.L190
-	.loc 2 2410 0
-	cbz	w5, .L192
-	.loc 2 2411 0
+	bhi	.L181
+	.loc 2 2463 0
+	cbz	w5, .L183
+	.loc 2 2464 0
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.LVL300:
-.L191:
-	.loc 2 2412 0
-	adrp	x0, .LANCHOR41
+.LVL275:
+.L182:
+	.loc 2 2465 0
+	adrp	x0, .LANCHOR40
 	mov	w1, 6
-	ldr	x0, [x0, #:lo12:.LANCHOR41]
+	ldr	x0, [x0, #:lo12:.LANCHOR40]
 	umaddl	x6, w6, w1, x0
-	.loc 2 2414 0
+	.loc 2 2467 0
 	mov	w0, 0
-	.loc 2 2412 0
+	.loc 2 2465 0
 	strh	w5, [x6, 4]
-	.loc 2 2414 0
+	.loc 2 2467 0
 	ldp	x29, x30, [sp], 16
 	.cfi_restore 30
 	.cfi_restore 29
@@ -2794,33 +2626,33 @@ update_multiplier_value:
 	.type	GetFreeBlockMinEraseCount, %function
 GetFreeBlockMinEraseCount:
 .LFB294:
-	.loc 2 2417 0
+	.loc 2 2470 0
 	.cfi_startproc
-.LVL301:
-	.loc 2 2420 0
+.LVL276:
+	.loc 2 2473 0
 	adrp	x0, .LANCHOR47
 	ldr	x0, [x0, #:lo12:.LANCHOR47]
-	cbz	x0, .L202
-	.loc 2 2421 0
-	adrp	x1, .LANCHOR41
-	ldr	x1, [x1, #:lo12:.LANCHOR41]
+	cbz	x0, .L193
+	.loc 2 2474 0
+	adrp	x1, .LANCHOR40
+	ldr	x1, [x1, #:lo12:.LANCHOR40]
 	sub	x0, x0, x1
 	mov	x1, -6148914691236517206
 	asr	x0, x0, 1
 	movk	x1, 0xaaab, lsl 0
 	mul	x0, x0, x1
-	adrp	x1, .LANCHOR40
-	ldr	x1, [x1, #:lo12:.LANCHOR40]
+	adrp	x1, .LANCHOR43
+	ldr	x1, [x1, #:lo12:.LANCHOR43]
 	and	x0, x0, 65535
 	ldrh	w0, [x1, x0, lsl 1]
-.LVL302:
+.LVL277:
 	ret
-.LVL303:
-.L202:
-	.loc 2 2418 0
+.LVL278:
+.L193:
+	.loc 2 2471 0
 	mov	w0, 0
-.LVL304:
-	.loc 2 2423 0
+.LVL279:
+	.loc 2 2476 0
 	ret
 	.cfi_endproc
 .LFE294:
@@ -2831,77 +2663,77 @@ GetFreeBlockMinEraseCount:
 	.type	GetFreeBlockMaxEraseCount, %function
 GetFreeBlockMaxEraseCount:
 .LFB295:
-	.loc 2 2426 0
+	.loc 2 2479 0
 	.cfi_startproc
-.LVL305:
-	.loc 2 2431 0
+.LVL280:
+	.loc 2 2484 0
 	adrp	x1, .LANCHOR47
-	.loc 2 2426 0
+	.loc 2 2479 0
 	and	w0, w0, 65535
-	.loc 2 2431 0
+	.loc 2 2484 0
 	ldr	x1, [x1, #:lo12:.LANCHOR47]
-	cbz	x1, .L210
-	.loc 2 2432 0
+	cbz	x1, .L201
+	.loc 2 2485 0
 	adrp	x2, .LANCHOR48
 	mov	w3, 7
-	.loc 2 2436 0
+	.loc 2 2489 0
 	mov	w5, 6
 	mov	w6, 65535
-	.loc 2 2432 0
+	.loc 2 2485 0
 	ldrh	w2, [x2, #:lo12:.LANCHOR48]
 	mul	w2, w2, w3
 	asr	w2, w2, 3
-	.loc 2 2433 0
+	.loc 2 2486 0
 	cmp	w0, w2
 	csel	w0, w2, w0, gt
-.LVL306:
-	.loc 2 2434 0
-	adrp	x2, .LANCHOR41
-	ldr	x3, [x2, #:lo12:.LANCHOR41]
+.LVL281:
+	.loc 2 2487 0
+	adrp	x2, .LANCHOR40
+	ldr	x3, [x2, #:lo12:.LANCHOR40]
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
 	sub	x1, x1, x3
 	asr	x1, x1, 1
 	mul	x1, x1, x2
-	.loc 2 2435 0
+	.loc 2 2488 0
 	mov	w2, 0
-	.loc 2 2434 0
+	.loc 2 2487 0
 	and	w1, w1, 65535
-.LVL307:
-.L206:
-	.loc 2 2435 0 discriminator 1
+.LVL282:
+.L197:
+	.loc 2 2488 0 discriminator 1
 	cmp	w0, w2
-	beq	.L209
-	.loc 2 2436 0
+	beq	.L200
+	.loc 2 2489 0
 	umull	x4, w1, w5
 	ldrh	w4, [x3, x4]
 	cmp	w4, w6
-	bne	.L207
-.L209:
-	.loc 2 2440 0
-	adrp	x0, .LANCHOR40
-.LVL308:
+	bne	.L198
+.L200:
+	.loc 2 2493 0
+	adrp	x0, .LANCHOR43
+.LVL283:
 	ubfiz	x1, x1, 1, 16
-.LVL309:
-	ldr	x0, [x0, #:lo12:.LANCHOR40]
+.LVL284:
+	ldr	x0, [x0, #:lo12:.LANCHOR43]
 	ldrh	w0, [x0, x1]
-.LVL310:
+.LVL285:
 	ret
-.LVL311:
-.L207:
-	.loc 2 2435 0 discriminator 2
+.LVL286:
+.L198:
+	.loc 2 2488 0 discriminator 2
 	add	w2, w2, 1
-.LVL312:
+.LVL287:
 	mov	w1, w4
 	and	w2, w2, 65535
-.LVL313:
-	b	.L206
-.LVL314:
-.L210:
-	.loc 2 2427 0
+.LVL288:
+	b	.L197
+.LVL289:
+.L201:
+	.loc 2 2480 0
 	mov	w0, 0
-.LVL315:
-	.loc 2 2443 0
+.LVL290:
+	.loc 2 2496 0
 	ret
 	.cfi_endproc
 .LFE295:
@@ -2914,7 +2746,7 @@ FtlPrintInfo2buf:
 .LFB200:
 	.loc 3 12 0
 	.cfi_startproc
-.LVL316:
+.LVL291:
 	stp	x29, x30, [sp, -96]!
 	.cfi_def_cfa_offset 96
 	.cfi_offset 29, -96
@@ -2935,7 +2767,7 @@ FtlPrintInfo2buf:
 	.cfi_offset 21, -64
 	.cfi_offset 22, -56
 	mov	x21, x0
-.LVL317:
+.LVL292:
 	stp	x23, x24, [sp, 48]
 	.cfi_offset 23, -48
 	.cfi_offset 24, -40
@@ -2944,7 +2776,7 @@ FtlPrintInfo2buf:
 	.loc 3 12 0
 	stp	x25, x26, [sp, 64]
 	.loc 3 39 0
-	adrp	x22, .LANCHOR79
+	adrp	x22, .LANCHOR39
 	.loc 3 12 0
 	str	x27, [sp, 80]
 	.cfi_offset 25, -32
@@ -2952,9 +2784,9 @@ FtlPrintInfo2buf:
 	.cfi_offset 27, -16
 	.loc 3 16 0
 	bl	sprintf
-.LVL318:
+.LVL293:
 	add	x20, x21, x0, sxtw
-.LVL319:
+.LVL294:
 	.loc 3 17 0
 	adrp	x0, .LANCHOR26
 	adrp	x1, .LC3
@@ -2962,146 +2794,146 @@ FtlPrintInfo2buf:
 	ldr	w2, [x0, #:lo12:.LANCHOR26]
 	mov	x0, x20
 	.loc 3 39 0
-	add	x22, x22, :lo12:.LANCHOR79
+	add	x22, x22, :lo12:.LANCHOR39
 	.loc 3 50 0
 	adrp	x24, .LANCHOR51
 	.loc 3 67 0
-	adrp	x25, .LANCHOR82
+	adrp	x25, .LANCHOR80
 	.loc 3 17 0
 	bl	sprintf
-.LVL320:
+.LVL295:
 	add	x20, x20, x0, sxtw
-.LVL321:
+.LVL296:
 	.loc 3 18 0
 	mov	x0, x20
 	adrp	x1, .LC4
 	add	x1, x1, :lo12:.LC4
 	bl	sprintf
-.LVL322:
+.LVL297:
 	add	x20, x20, x0, sxtw
-.LVL323:
+.LVL298:
 	.loc 3 19 0
-	adrp	x0, .LANCHOR62
+	adrp	x0, .LANCHOR61
 	adrp	x1, .LC5
 	add	x1, x1, :lo12:.LC5
-	ldr	w2, [x0, #:lo12:.LANCHOR62]
+	ldr	w2, [x0, #:lo12:.LANCHOR61]
 	mov	x0, x20
 	bl	sprintf
-.LVL324:
+.LVL299:
 	add	x20, x20, x0, sxtw
-.LVL325:
+.LVL300:
 	.loc 3 20 0
-	adrp	x0, .LANCHOR60
+	adrp	x0, .LANCHOR59
 	adrp	x1, .LC6
 	add	x1, x1, :lo12:.LC6
-	ldr	w2, [x0, #:lo12:.LANCHOR60]
+	ldr	w2, [x0, #:lo12:.LANCHOR59]
 	mov	x0, x20
 	bl	sprintf
-.LVL326:
+.LVL301:
 	add	x20, x20, x0, sxtw
-.LVL327:
+.LVL302:
 	.loc 3 21 0
-	adrp	x0, .LANCHOR63
+	adrp	x0, .LANCHOR62
 	adrp	x1, .LC7
 	add	x1, x1, :lo12:.LC7
-	ldr	w2, [x0, #:lo12:.LANCHOR63]
+	ldr	w2, [x0, #:lo12:.LANCHOR62]
 	mov	x0, x20
 	bl	sprintf
-.LVL328:
+.LVL303:
 	add	x20, x20, x0, sxtw
-.LVL329:
+.LVL304:
 	.loc 3 22 0
-	adrp	x0, .LANCHOR64
+	adrp	x0, .LANCHOR63
 	adrp	x1, .LC8
 	add	x1, x1, :lo12:.LC8
-	ldr	w2, [x0, #:lo12:.LANCHOR64]
+	ldr	w2, [x0, #:lo12:.LANCHOR63]
 	mov	x0, x20
 	bl	sprintf
-.LVL330:
+.LVL305:
 	add	x20, x20, x0, sxtw
-.LVL331:
+.LVL306:
 	.loc 3 23 0
-	adrp	x0, .LANCHOR65
+	adrp	x0, .LANCHOR64
 	adrp	x1, .LC9
 	add	x1, x1, :lo12:.LC9
-	ldr	w2, [x0, #:lo12:.LANCHOR65]
+	ldr	w2, [x0, #:lo12:.LANCHOR64]
 	mov	x0, x20
 	bl	sprintf
-.LVL332:
+.LVL307:
 	add	x20, x20, x0, sxtw
-.LVL333:
+.LVL308:
 	.loc 3 24 0
-	adrp	x0, .LANCHOR66
+	adrp	x0, .LANCHOR65
 	adrp	x1, .LC10
 	add	x1, x1, :lo12:.LC10
-	ldr	w2, [x0, #:lo12:.LANCHOR66]
+	ldr	w2, [x0, #:lo12:.LANCHOR65]
 	mov	x0, x20
 	bl	sprintf
-.LVL334:
+.LVL309:
 	add	x20, x20, x0, sxtw
-.LVL335:
+.LVL310:
 	.loc 3 25 0
-	adrp	x0, .LANCHOR67
+	adrp	x0, .LANCHOR66
 	adrp	x1, .LC11
 	add	x1, x1, :lo12:.LC11
-	ldr	w2, [x0, #:lo12:.LANCHOR67]
+	ldr	w2, [x0, #:lo12:.LANCHOR66]
 	mov	x0, x20
 	bl	sprintf
-.LVL336:
+.LVL311:
 	add	x20, x20, x0, sxtw
-.LVL337:
+.LVL312:
 	.loc 3 26 0
-	adrp	x0, .LANCHOR68
+	adrp	x0, .LANCHOR67
 	adrp	x1, .LC12
 	add	x1, x1, :lo12:.LC12
-	ldr	w2, [x0, #:lo12:.LANCHOR68]
+	ldr	w2, [x0, #:lo12:.LANCHOR67]
 	mov	x0, x20
 	bl	sprintf
-.LVL338:
+.LVL313:
 	add	x20, x20, x0, sxtw
-.LVL339:
+.LVL314:
 	.loc 3 27 0
-	adrp	x0, .LANCHOR69
+	adrp	x0, .LANCHOR68
 	adrp	x1, .LC13
 	add	x1, x1, :lo12:.LC13
-	ldr	w2, [x0, #:lo12:.LANCHOR69]
+	ldr	w2, [x0, #:lo12:.LANCHOR68]
 	mov	x0, x20
 	lsr	w2, w2, 11
 	bl	sprintf
-.LVL340:
+.LVL315:
 	add	x20, x20, x0, sxtw
-.LVL341:
+.LVL316:
 	.loc 3 28 0
-	adrp	x0, .LANCHOR70
+	adrp	x0, .LANCHOR69
 	adrp	x1, .LC14
 	add	x1, x1, :lo12:.LC14
-	ldr	w2, [x0, #:lo12:.LANCHOR70]
+	ldr	w2, [x0, #:lo12:.LANCHOR69]
 	mov	x0, x20
 	lsr	w2, w2, 11
 	bl	sprintf
-.LVL342:
+.LVL317:
 	add	x20, x20, x0, sxtw
-.LVL343:
+.LVL318:
 	.loc 3 29 0
-	adrp	x0, .LANCHOR71
+	adrp	x0, .LANCHOR70
 	adrp	x1, .LC15
 	add	x1, x1, :lo12:.LC15
-	ldr	w2, [x0, #:lo12:.LANCHOR71]
+	ldr	w2, [x0, #:lo12:.LANCHOR70]
 	mov	x0, x20
 	bl	sprintf
-.LVL344:
+.LVL319:
 	add	x20, x20, x0, sxtw
-.LVL345:
+.LVL320:
 	.loc 3 30 0
-	adrp	x0, .LANCHOR72
+	adrp	x0, .LANCHOR71
 	adrp	x1, .LC16
 	add	x1, x1, :lo12:.LC16
-	ldr	w2, [x0, #:lo12:.LANCHOR72]
+	ldr	w2, [x0, #:lo12:.LANCHOR71]
 	mov	x0, x20
 	bl	sprintf
-.LVL346:
+.LVL321:
 	add	x20, x20, x0, sxtw
-.LVL347:
+.LVL322:
 	.loc 3 31 0
 	add	x0, x19, :lo12:.LANCHOR37
 	adrp	x1, .LC17
@@ -3109,99 +2941,99 @@ FtlPrintInfo2buf:
 	ldrh	w2, [x0, 6]
 	mov	x0, x20
 	bl	sprintf
-.LVL348:
+.LVL323:
 	add	x20, x20, x0, sxtw
-.LVL349:
+.LVL324:
 	.loc 3 32 0
 	ldrh	w2, [x23, #:lo12:.LANCHOR48]
 	mov	x0, x20
 	adrp	x1, .LC18
 	add	x1, x1, :lo12:.LC18
 	bl	sprintf
-.LVL350:
+.LVL325:
 	add	x20, x20, x0, sxtw
-.LVL351:
+.LVL326:
 	.loc 3 33 0
-	adrp	x0, .LANCHOR73
+	adrp	x0, .LANCHOR72
 	adrp	x1, .LC19
 	add	x1, x1, :lo12:.LC19
-	ldr	w2, [x0, #:lo12:.LANCHOR73]
+	ldr	w2, [x0, #:lo12:.LANCHOR72]
 	mov	x0, x20
 	bl	sprintf
-.LVL352:
+.LVL327:
 	add	x20, x20, x0, sxtw
-.LVL353:
+.LVL328:
 	.loc 3 34 0
-	adrp	x0, .LANCHOR74
+	adrp	x0, .LANCHOR73
 	adrp	x1, .LC20
 	add	x1, x1, :lo12:.LC20
-	ldr	w2, [x0, #:lo12:.LANCHOR74]
+	ldr	w2, [x0, #:lo12:.LANCHOR73]
 	mov	x0, x20
 	bl	sprintf
-.LVL354:
+.LVL329:
 	add	x20, x20, x0, sxtw
-.LVL355:
+.LVL330:
 	.loc 3 35 0
-	adrp	x0, .LANCHOR75
+	adrp	x0, .LANCHOR74
 	adrp	x1, .LC21
 	add	x1, x1, :lo12:.LC21
-	ldr	w2, [x0, #:lo12:.LANCHOR75]
+	ldr	w2, [x0, #:lo12:.LANCHOR74]
 	mov	x0, x20
 	bl	sprintf
-.LVL356:
+.LVL331:
 	add	x20, x20, x0, sxtw
-.LVL357:
+.LVL332:
 	.loc 3 36 0
-	adrp	x0, .LANCHOR76
+	adrp	x0, .LANCHOR75
 	adrp	x1, .LC22
 	add	x1, x1, :lo12:.LC22
-	ldr	w2, [x0, #:lo12:.LANCHOR76]
+	ldr	w2, [x0, #:lo12:.LANCHOR75]
 	mov	x0, x20
 	bl	sprintf
-.LVL358:
+.LVL333:
 	add	x20, x20, x0, sxtw
-.LVL359:
+.LVL334:
 	.loc 3 37 0
-	adrp	x0, .LANCHOR77
+	adrp	x0, .LANCHOR76
 	adrp	x1, .LC23
 	add	x1, x1, :lo12:.LC23
-	ldr	w2, [x0, #:lo12:.LANCHOR77]
+	ldr	w2, [x0, #:lo12:.LANCHOR76]
 	mov	x0, x20
 	bl	sprintf
-.LVL360:
+.LVL335:
 	add	x20, x20, x0, sxtw
-.LVL361:
+.LVL336:
 	.loc 3 38 0
-	adrp	x0, .LANCHOR78
+	adrp	x0, .LANCHOR77
 	adrp	x1, .LC24
 	add	x1, x1, :lo12:.LC24
-	ldr	w2, [x0, #:lo12:.LANCHOR78]
+	ldr	w2, [x0, #:lo12:.LANCHOR77]
 	mov	x0, x20
 	bl	sprintf
-.LVL362:
+.LVL337:
 	add	x20, x20, x0, sxtw
-.LVL363:
+.LVL338:
 	.loc 3 39 0
 	ldrh	w2, [x22, 30]
 	mov	x0, x20
 	adrp	x1, .LC25
 	add	x1, x1, :lo12:.LC25
 	bl	sprintf
-.LVL364:
+.LVL339:
 	add	x20, x20, x0, sxtw
-.LVL365:
+.LVL340:
 	.loc 3 40 0
 	ldrh	w2, [x22, 28]
 	mov	x0, x20
 	adrp	x1, .LC26
 	add	x1, x1, :lo12:.LC26
 	.loc 3 55 0
-	adrp	x22, .LANCHOR43
+	adrp	x22, .LANCHOR42
 	.loc 3 40 0
 	bl	sprintf
-.LVL366:
+.LVL341:
 	add	x20, x20, x0, sxtw
-.LVL367:
+.LVL342:
 	.loc 3 41 0
 	adrp	x0, .LANCHOR34
 	adrp	x1, .LC27
@@ -3209,9 +3041,9 @@ FtlPrintInfo2buf:
 	ldr	w2, [x0, #:lo12:.LANCHOR34]
 	mov	x0, x20
 	bl	sprintf
-.LVL368:
+.LVL343:
 	add	x20, x20, x0, sxtw
-.LVL369:
+.LVL344:
 	.loc 3 42 0
 	adrp	x0, .LANCHOR31
 	adrp	x1, .LC28
@@ -3219,9 +3051,9 @@ FtlPrintInfo2buf:
 	ldr	w2, [x0, #:lo12:.LANCHOR31]
 	mov	x0, x20
 	bl	sprintf
-.LVL370:
+.LVL345:
 	add	x20, x20, x0, sxtw
-.LVL371:
+.LVL346:
 	.loc 3 43 0
 	adrp	x0, .LANCHOR2
 	adrp	x1, .LC29
@@ -3229,9 +3061,9 @@ FtlPrintInfo2buf:
 	ldr	w2, [x0, #:lo12:.LANCHOR2]
 	mov	x0, x20
 	bl	sprintf
-.LVL372:
+.LVL347:
 	add	x20, x20, x0, sxtw
-.LVL373:
+.LVL348:
 	.loc 3 44 0
 	adrp	x0, .LANCHOR38+6
 	adrp	x1, .LC30
@@ -3239,9 +3071,9 @@ FtlPrintInfo2buf:
 	ldrh	w2, [x0, #:lo12:.LANCHOR38+6]
 	mov	x0, x20
 	bl	sprintf
-.LVL374:
+.LVL349:
 	add	x20, x20, x0, sxtw
-.LVL375:
+.LVL350:
 	.loc 3 45 0
 	adrp	x0, .LANCHOR5
 	adrp	x1, .LC31
@@ -3249,19 +3081,19 @@ FtlPrintInfo2buf:
 	ldrh	w2, [x0, #:lo12:.LANCHOR5]
 	mov	x0, x20
 	bl	sprintf
-.LVL376:
+.LVL351:
 	add	x20, x20, x0, sxtw
-.LVL377:
+.LVL352:
 	.loc 3 46 0
-	adrp	x0, .LANCHOR80
+	adrp	x0, .LANCHOR78
 	adrp	x1, .LC32
 	add	x1, x1, :lo12:.LC32
-	ldrh	w2, [x0, #:lo12:.LANCHOR80]
+	ldrh	w2, [x0, #:lo12:.LANCHOR78]
 	mov	x0, x20
 	bl	sprintf
-.LVL378:
+.LVL353:
 	add	x20, x20, x0, sxtw
-.LVL379:
+.LVL354:
 	.loc 3 47 0
 	adrp	x0, .LANCHOR7
 	adrp	x1, .LC33
@@ -3269,19 +3101,19 @@ FtlPrintInfo2buf:
 	ldr	w2, [x0, #:lo12:.LANCHOR7]
 	mov	x0, x20
 	bl	sprintf
-.LVL380:
+.LVL355:
 	add	x20, x20, x0, sxtw
-.LVL381:
+.LVL356:
 	.loc 3 48 0
-	adrp	x0, .LANCHOR81
+	adrp	x0, .LANCHOR79
 	adrp	x1, .LC34
 	add	x1, x1, :lo12:.LC34
-	ldrh	w2, [x0, #:lo12:.LANCHOR81]
+	ldrh	w2, [x0, #:lo12:.LANCHOR79]
 	mov	x0, x20
 	bl	sprintf
-.LVL382:
+.LVL357:
 	add	x20, x20, x0, sxtw
-.LVL383:
+.LVL358:
 	.loc 3 49 0
 	ldrh	w2, [x19, #:lo12:.LANCHOR37]
 	.loc 3 50 0
@@ -3291,60 +3123,60 @@ FtlPrintInfo2buf:
 	adrp	x1, .LC35
 	add	x1, x1, :lo12:.LC35
 	bl	sprintf
-.LVL384:
+.LVL359:
 	add	x20, x20, x0, sxtw
-.LVL385:
+.LVL360:
 	.loc 3 50 0
 	ldrh	w2, [x19, 2]
 	mov	x0, x20
 	adrp	x1, .LC36
 	add	x1, x1, :lo12:.LC36
 	bl	sprintf
-.LVL386:
+.LVL361:
 	add	x20, x20, x0, sxtw
-.LVL387:
+.LVL362:
 	.loc 3 51 0
 	ldrb	w2, [x19, 6]
 	mov	x0, x20
 	adrp	x1, .LC37
 	add	x1, x1, :lo12:.LC37
 	bl	sprintf
-.LVL388:
+.LVL363:
 	add	x20, x20, x0, sxtw
-.LVL389:
+.LVL364:
 	.loc 3 52 0
 	ldrh	w2, [x24, #:lo12:.LANCHOR51]
 	mov	x0, x20
 	adrp	x1, .LC38
 	add	x1, x1, :lo12:.LC38
 	bl	sprintf
-.LVL390:
+.LVL365:
 	add	x20, x20, x0, sxtw
-.LVL391:
+.LVL366:
 	.loc 3 53 0
 	ldrb	w2, [x19, 8]
 	mov	x0, x20
 	adrp	x1, .LC39
 	add	x1, x1, :lo12:.LC39
 	bl	sprintf
-.LVL392:
+.LVL367:
 	add	x20, x20, x0, sxtw
-.LVL393:
+.LVL368:
 	.loc 3 54 0
 	ldrh	w2, [x19, 4]
 	mov	x0, x20
 	adrp	x1, .LC40
 	add	x1, x1, :lo12:.LC40
 	bl	sprintf
-.LVL394:
+.LVL369:
 	add	x20, x20, x0, sxtw
-.LVL395:
+.LVL370:
 	.loc 3 55 0
 	ldrh	w1, [x24, #:lo12:.LANCHOR51]
 	.loc 3 56 0
 	adrp	x24, .LANCHOR52
 	.loc 3 55 0
-	ldr	x0, [x22, #:lo12:.LANCHOR43]
+	ldr	x0, [x22, #:lo12:.LANCHOR42]
 	.loc 3 56 0
 	add	x19, x24, :lo12:.LANCHOR52
 	.loc 3 55 0
@@ -3353,60 +3185,60 @@ FtlPrintInfo2buf:
 	adrp	x1, .LC41
 	add	x1, x1, :lo12:.LC41
 	bl	sprintf
-.LVL396:
+.LVL371:
 	add	x20, x20, x0, sxtw
-.LVL397:
+.LVL372:
 	.loc 3 56 0
 	ldrh	w2, [x19, 2]
 	mov	x0, x20
 	adrp	x1, .LC42
 	add	x1, x1, :lo12:.LC42
 	bl	sprintf
-.LVL398:
+.LVL373:
 	add	x20, x20, x0, sxtw
-.LVL399:
+.LVL374:
 	.loc 3 57 0
 	ldrb	w2, [x19, 6]
 	mov	x0, x20
 	adrp	x1, .LC43
 	add	x1, x1, :lo12:.LC43
 	bl	sprintf
-.LVL400:
+.LVL375:
 	add	x20, x20, x0, sxtw
-.LVL401:
+.LVL376:
 	.loc 3 58 0
 	ldrh	w2, [x24, #:lo12:.LANCHOR52]
 	mov	x0, x20
 	adrp	x1, .LC44
 	add	x1, x1, :lo12:.LC44
 	bl	sprintf
-.LVL402:
+.LVL377:
 	add	x20, x20, x0, sxtw
-.LVL403:
+.LVL378:
 	.loc 3 59 0
 	ldrb	w2, [x19, 8]
 	mov	x0, x20
 	adrp	x1, .LC45
 	add	x1, x1, :lo12:.LC45
 	bl	sprintf
-.LVL404:
+.LVL379:
 	add	x20, x20, x0, sxtw
-.LVL405:
+.LVL380:
 	.loc 3 60 0
 	ldrh	w2, [x19, 4]
 	mov	x0, x20
 	adrp	x1, .LC46
 	add	x1, x1, :lo12:.LC46
 	bl	sprintf
-.LVL406:
+.LVL381:
 	add	x20, x20, x0, sxtw
-.LVL407:
+.LVL382:
 	.loc 3 61 0
 	ldrh	w1, [x24, #:lo12:.LANCHOR52]
 	.loc 3 62 0
 	adrp	x24, .LANCHOR53
 	.loc 3 61 0
-	ldr	x0, [x22, #:lo12:.LANCHOR43]
+	ldr	x0, [x22, #:lo12:.LANCHOR42]
 	.loc 3 62 0
 	add	x19, x24, :lo12:.LANCHOR53
 	.loc 3 61 0
@@ -3415,106 +3247,106 @@ FtlPrintInfo2buf:
 	adrp	x1, .LC47
 	add	x1, x1, :lo12:.LC47
 	bl	sprintf
-.LVL408:
+.LVL383:
 	add	x20, x20, x0, sxtw
-.LVL409:
+.LVL384:
 	.loc 3 62 0
 	ldrh	w2, [x19, 2]
 	mov	x0, x20
 	adrp	x1, .LC48
 	add	x1, x1, :lo12:.LC48
 	bl	sprintf
-.LVL410:
+.LVL385:
 	add	x20, x20, x0, sxtw
-.LVL411:
+.LVL386:
 	.loc 3 63 0
 	ldrb	w2, [x19, 6]
 	mov	x0, x20
 	adrp	x1, .LC49
 	add	x1, x1, :lo12:.LC49
 	bl	sprintf
-.LVL412:
+.LVL387:
 	add	x20, x20, x0, sxtw
-.LVL413:
+.LVL388:
 	.loc 3 64 0
 	ldrh	w2, [x24, #:lo12:.LANCHOR53]
 	mov	x0, x20
 	adrp	x1, .LC50
 	add	x1, x1, :lo12:.LC50
 	.loc 3 72 0
-	adrp	x24, .LANCHOR83
-	add	x24, x24, :lo12:.LANCHOR83
+	adrp	x24, .LANCHOR81
+	add	x24, x24, :lo12:.LANCHOR81
 	.loc 3 64 0
 	bl	sprintf
-.LVL414:
+.LVL389:
 	add	x20, x20, x0, sxtw
-.LVL415:
+.LVL390:
 	.loc 3 65 0
 	ldrb	w2, [x19, 8]
 	mov	x0, x20
 	adrp	x1, .LC51
 	add	x1, x1, :lo12:.LC51
 	bl	sprintf
-.LVL416:
+.LVL391:
 	add	x20, x20, x0, sxtw
-.LVL417:
+.LVL392:
 	.loc 3 66 0
 	ldrh	w2, [x19, 4]
 	.loc 3 67 0
-	add	x19, x25, :lo12:.LANCHOR82
+	add	x19, x25, :lo12:.LANCHOR80
 	.loc 3 66 0
 	mov	x0, x20
 	adrp	x1, .LC52
 	add	x1, x1, :lo12:.LC52
 	bl	sprintf
-.LVL418:
+.LVL393:
 	add	x20, x20, x0, sxtw
-.LVL419:
+.LVL394:
 	.loc 3 67 0
 	ldrh	w2, [x19, 2]
 	mov	x0, x20
 	adrp	x1, .LC53
 	add	x1, x1, :lo12:.LC53
 	bl	sprintf
-.LVL420:
+.LVL395:
 	add	x20, x20, x0, sxtw
-.LVL421:
+.LVL396:
 	.loc 3 68 0
 	ldrb	w2, [x19, 6]
 	mov	x0, x20
 	adrp	x1, .LC54
 	add	x1, x1, :lo12:.LC54
 	bl	sprintf
-.LVL422:
+.LVL397:
 	add	x20, x20, x0, sxtw
-.LVL423:
+.LVL398:
 	.loc 3 69 0
-	ldrh	w2, [x25, #:lo12:.LANCHOR82]
+	ldrh	w2, [x25, #:lo12:.LANCHOR80]
 	mov	x0, x20
 	adrp	x1, .LC55
 	add	x1, x1, :lo12:.LC55
 	bl	sprintf
-.LVL424:
+.LVL399:
 	add	x20, x20, x0, sxtw
-.LVL425:
+.LVL400:
 	.loc 3 70 0
 	ldrb	w2, [x19, 8]
 	mov	x0, x20
 	adrp	x1, .LC56
 	add	x1, x1, :lo12:.LC56
 	bl	sprintf
-.LVL426:
+.LVL401:
 	add	x20, x20, x0, sxtw
-.LVL427:
+.LVL402:
 	.loc 3 71 0
 	ldrh	w2, [x19, 4]
 	mov	x0, x20
 	adrp	x1, .LC57
 	add	x1, x1, :lo12:.LC57
 	bl	sprintf
-.LVL428:
+.LVL403:
 	add	x20, x20, x0, sxtw
-.LVL429:
+.LVL404:
 	.loc 3 72 0
 	ldp	w4, w2, [x24, 76]
 	adrp	x1, .LC58
@@ -3522,104 +3354,104 @@ FtlPrintInfo2buf:
 	add	x1, x1, :lo12:.LC58
 	mov	x0, x20
 	bl	sprintf
-.LVL430:
+.LVL405:
 	add	x19, x20, x0, sxtw
-.LVL431:
+.LVL406:
 	.loc 3 73 0
 	ldr	w2, [x24, 72]
 	mov	x0, x19
 	adrp	x1, .LC59
 	add	x1, x1, :lo12:.LC59
 	bl	sprintf
-.LVL432:
+.LVL407:
 	add	x19, x19, x0, sxtw
-.LVL433:
+.LVL408:
 	.loc 3 74 0
 	ldr	w2, [x24, 96]
 	mov	x0, x19
 	adrp	x1, .LC60
 	add	x1, x1, :lo12:.LC60
 	bl	sprintf
-.LVL434:
+.LVL409:
 	add	x19, x19, x0, sxtw
-.LVL435:
+.LVL410:
 	.loc 3 75 0
-	adrp	x0, .LANCHOR84
+	adrp	x0, .LANCHOR82
 	adrp	x1, .LC61
 	add	x1, x1, :lo12:.LC61
-	ldrh	w2, [x0, #:lo12:.LANCHOR84]
+	ldrh	w2, [x0, #:lo12:.LANCHOR82]
 	mov	x0, x19
 	bl	sprintf
-.LVL436:
+.LVL411:
 	add	x19, x19, x0, sxtw
-.LVL437:
+.LVL412:
 	.loc 3 76 0
-	adrp	x0, .LANCHOR85
+	adrp	x0, .LANCHOR83
 	adrp	x1, .LC62
 	add	x1, x1, :lo12:.LC62
-	ldrh	w2, [x0, #:lo12:.LANCHOR85]
+	ldrh	w2, [x0, #:lo12:.LANCHOR83]
 	mov	x0, x19
 	bl	sprintf
-.LVL438:
+.LVL413:
 	add	x19, x19, x0, sxtw
-.LVL439:
+.LVL414:
 	.loc 3 77 0
-	adrp	x0, .LANCHOR86
+	adrp	x0, .LANCHOR84
 	adrp	x1, .LC63
 	add	x1, x1, :lo12:.LC63
-	ldr	w2, [x0, #:lo12:.LANCHOR86]
+	ldr	w2, [x0, #:lo12:.LANCHOR84]
 	mov	x0, x19
 	bl	sprintf
-.LVL440:
+.LVL415:
 	add	x19, x19, x0, sxtw
-.LVL441:
+.LVL416:
 	.loc 3 78 0
-	adrp	x0, .LANCHOR87
+	adrp	x0, .LANCHOR85
 	adrp	x1, .LC64
 	add	x1, x1, :lo12:.LC64
-	ldrh	w2, [x0, #:lo12:.LANCHOR87]
+	ldrh	w2, [x0, #:lo12:.LANCHOR85]
 	mov	x0, x19
 	bl	sprintf
-.LVL442:
+.LVL417:
 	add	x19, x19, x0, sxtw
-.LVL443:
+.LVL418:
 	.loc 3 79 0
 	bl	GetFreeBlockMinEraseCount
-.LVL444:
+.LVL419:
 	and	w2, w0, 65535
 	adrp	x1, .LC65
 	mov	x0, x19
 	add	x1, x1, :lo12:.LC65
 	bl	sprintf
-.LVL445:
+.LVL420:
 	add	x19, x19, x0, sxtw
-.LVL446:
+.LVL421:
 	.loc 3 80 0
 	ldrh	w0, [x23, #:lo12:.LANCHOR48]
 	bl	GetFreeBlockMaxEraseCount
-.LVL447:
+.LVL422:
 	and	w2, w0, 65535
 	adrp	x1, .LC66
 	mov	x0, x19
 	add	x1, x1, :lo12:.LC66
 	bl	sprintf
-.LVL448:
+.LVL423:
 	add	x19, x19, x0, sxtw
-.LVL449:
+.LVL424:
 	.loc 3 81 0
-	adrp	x0, .LANCHOR88
-	ldr	w0, [x0, #:lo12:.LANCHOR88]
+	adrp	x0, .LANCHOR86
+	ldr	w0, [x0, #:lo12:.LANCHOR86]
 	cmp	w0, 1
-	beq	.L212
-.L217:
+	beq	.L203
+.L208:
 	.loc 3 104 0
 	sub	w0, w19, w21
 	.loc 3 105 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
-.LVL450:
+.LVL425:
 	ldp	x21, x22, [sp, 32]
-.LVL451:
+.LVL426:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
@@ -3637,58 +3469,58 @@ FtlPrintInfo2buf:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL452:
-.L212:
+.LVL427:
+.L203:
 	.cfi_restore_state
 	.loc 3 84 0
-	ldrh	w0, [x25, #:lo12:.LANCHOR82]
+	ldrh	w0, [x25, #:lo12:.LANCHOR80]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L214
+	beq	.L205
 	.loc 3 85 0
-	ldr	x1, [x22, #:lo12:.LANCHOR43]
+	ldr	x1, [x22, #:lo12:.LANCHOR42]
 	ubfiz	x0, x0, 1, 16
 	ldrh	w2, [x1, x0]
 	mov	x0, x19
 	adrp	x1, .LC67
 	add	x1, x1, :lo12:.LC67
 	bl	sprintf
-.LVL453:
+.LVL428:
 	add	x19, x19, x0, sxtw
-.LVL454:
-.L214:
-.LBB205:
+.LVL429:
+.L205:
+.LBB217:
 	.loc 3 87 0
 	mov	w0, 0
 	.loc 3 91 0
 	adrp	x24, .LC68
 	.loc 3 87 0
 	bl	List_get_gc_head_node
-.LVL455:
+.LVL430:
 	.loc 3 91 0
 	add	x24, x24, :lo12:.LC68
 	.loc 3 87 0
 	and	w3, w0, 65535
-.LVL456:
+.LVL431:
 	.loc 3 88 0
 	mov	w23, 0
 	.loc 3 89 0
 	mov	w27, 65535
-	adrp	x20, .LANCHOR41
+	adrp	x20, .LANCHOR40
 	.loc 3 91 0
 	mov	w26, 6
-.LVL457:
-.L216:
+.LVL432:
+.L207:
 	.loc 3 89 0
 	cmp	w3, w27
-	beq	.L215
+	beq	.L206
 	.loc 3 91 0 discriminator 2
-	adrp	x0, .LANCHOR40
+	adrp	x0, .LANCHOR43
 	umull	x25, w3, w26
-	ldr	x2, [x22, #:lo12:.LANCHOR43]
+	ldr	x2, [x22, #:lo12:.LANCHOR42]
 	ubfiz	x1, x3, 1, 16
-	ldr	x4, [x0, #:lo12:.LANCHOR40]
-	ldr	x0, [x20, #:lo12:.LANCHOR41]
+	ldr	x4, [x0, #:lo12:.LANCHOR43]
+	ldr	x0, [x20, #:lo12:.LANCHOR40]
 	add	x0, x0, x25
 	ldrh	w6, [x4, x1]
 	ldrh	w4, [x2, x1]
@@ -3698,42 +3530,42 @@ FtlPrintInfo2buf:
 	mov	x0, x19
 	.loc 3 88 0 discriminator 2
 	add	w23, w23, 1
-.LVL458:
+.LVL433:
 	.loc 3 91 0 discriminator 2
 	bl	sprintf
-.LVL459:
+.LVL434:
 	add	x19, x19, x0, sxtw
-.LVL460:
+.LVL435:
 	.loc 3 92 0 discriminator 2
-	ldr	x0, [x20, #:lo12:.LANCHOR41]
+	ldr	x0, [x20, #:lo12:.LANCHOR40]
 	.loc 3 88 0 discriminator 2
 	cmp	w23, 16
 	.loc 3 92 0 discriminator 2
 	ldrh	w3, [x0, x25]
-.LVL461:
+.LVL436:
 	.loc 3 88 0 discriminator 2
-	bne	.L216
-.L215:
-.LBE205:
-.LBB206:
+	bne	.L207
+.L206:
+.LBE217:
+.LBB218:
 	.loc 3 96 0
 	adrp	x0, .LANCHOR47
 	.loc 3 100 0
 	adrp	x23, .LC69
-.LVL462:
+.LVL437:
 	add	x23, x23, :lo12:.LC69
 	.loc 3 97 0
 	mov	w22, 0
 	.loc 3 96 0
 	ldr	x3, [x0, #:lo12:.LANCHOR47]
-.LVL463:
+.LVL438:
 	.loc 3 98 0
 	mov	w25, 65535
 	.loc 3 96 0
-	ldr	x0, [x20, #:lo12:.LANCHOR41]
+	ldr	x0, [x20, #:lo12:.LANCHOR40]
 	.loc 3 100 0
 	mov	w26, 6
-	adrp	x27, .LANCHOR40
+	adrp	x27, .LANCHOR43
 	.loc 3 96 0
 	sub	x3, x3, x0
 	mov	x0, -6148914691236517206
@@ -3741,15 +3573,15 @@ FtlPrintInfo2buf:
 	movk	x0, 0xaaab, lsl 0
 	mul	x3, x3, x0
 	and	w3, w3, 65535
-.LVL464:
-.L218:
+.LVL439:
+.L209:
 	.loc 3 98 0
 	cmp	w3, w25
-	beq	.L217
+	beq	.L208
 	.loc 3 100 0 discriminator 2
 	umull	x24, w3, w26
-	ldr	x0, [x20, #:lo12:.LANCHOR41]
-	ldr	x2, [x27, #:lo12:.LANCHOR40]
+	ldr	x0, [x20, #:lo12:.LANCHOR40]
+	ldr	x2, [x27, #:lo12:.LANCHOR43]
 	ubfiz	x1, x3, 1, 16
 	add	x0, x0, x24
 	ldrh	w5, [x2, x1]
@@ -3759,20 +3591,20 @@ FtlPrintInfo2buf:
 	mov	x0, x19
 	.loc 3 97 0 discriminator 2
 	add	w22, w22, 1
-.LVL465:
+.LVL440:
 	.loc 3 100 0 discriminator 2
 	bl	sprintf
-.LVL466:
+.LVL441:
 	add	x19, x19, x0, sxtw
-.LVL467:
+.LVL442:
 	.loc 3 97 0 discriminator 2
 	cmp	w22, 4
-	beq	.L217
+	beq	.L208
 	.loc 3 101 0
-	ldr	x0, [x20, #:lo12:.LANCHOR41]
+	ldr	x0, [x20, #:lo12:.LANCHOR40]
 	ldrh	w3, [x0, x24]
-	b	.L218
-.LBE206:
+	b	.L209
+.LBE218:
 	.cfi_endproc
 .LFE200:
 	.size	FtlPrintInfo2buf, .-FtlPrintInfo2buf
@@ -3784,7 +3616,7 @@ rknand_proc_ftlread:
 .LFB201:
 	.loc 3 114 0
 	.cfi_startproc
-.LVL468:
+.LVL443:
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
@@ -3804,23 +3636,23 @@ rknand_proc_ftlread:
 	.cfi_offset 20, -8
 	.loc 3 114 0
 	mov	x20, x0
-.LVL469:
+.LVL444:
 	.loc 3 120 0
 	bl	sprintf
-.LVL470:
+.LVL445:
 	add	x19, x20, x0, sxtw
-.LVL471:
+.LVL446:
 	.loc 3 122 0
 	mov	x0, x19
 	bl	FtlPrintInfo2buf
-.LVL472:
+.LVL447:
 	add	x0, x19, x0, sxtw
-.LVL473:
+.LVL448:
 	.loc 3 124 0
 	sub	w0, w0, w20
-.LVL474:
+.LVL449:
 	ldp	x19, x20, [sp, 16]
-.LVL475:
+.LVL450:
 	ldp	x29, x30, [sp], 32
 	.cfi_restore 30
 	.cfi_restore 29
@@ -3837,82 +3669,82 @@ rknand_proc_ftlread:
 	.type	GetSwlReplaceBlock, %function
 GetSwlReplaceBlock:
 .LFB296:
-	.loc 2 2447 0
+	.loc 2 2500 0
 	.cfi_startproc
-.LVL476:
+.LVL451:
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
 	.cfi_offset 30, -24
-	.loc 2 2456 0
-	adrp	x2, .LANCHOR75
-	adrp	x10, .LANCHOR78
-	.loc 2 2447 0
+	.loc 2 2510 0
+	adrp	x2, .LANCHOR74
+	adrp	x8, .LANCHOR77
+	.loc 2 2500 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	str	x19, [sp, 16]
 	.cfi_offset 19, -16
-	.loc 2 2456 0
-	ldr	w3, [x2, #:lo12:.LANCHOR75]
-	ldr	w7, [x10, #:lo12:.LANCHOR78]
+	.loc 2 2510 0
+	ldr	w3, [x2, #:lo12:.LANCHOR74]
+	ldr	w7, [x8, #:lo12:.LANCHOR77]
 	cmp	w3, w7
-	bcs	.L227
-	.loc 2 2459 0
+	bcs	.L218
+	.loc 2 2513 0
 	adrp	x1, .LANCHOR5
-	.loc 2 2458 0
-	adrp	x0, .LANCHOR73
-	.loc 2 2459 0
+	.loc 2 2512 0
+	adrp	x0, .LANCHOR72
+	.loc 2 2513 0
 	mov	w5, 0
 	mov	w4, 0
 	ldrh	w3, [x1, #:lo12:.LANCHOR5]
-	.loc 2 2460 0
-	adrp	x1, .LANCHOR40
-	.loc 2 2458 0
-	str	wzr, [x0, #:lo12:.LANCHOR73]
-.LVL477:
-	.loc 2 2460 0
-	ldr	x6, [x1, #:lo12:.LANCHOR40]
-	.loc 2 2459 0
+	.loc 2 2514 0
+	adrp	x1, .LANCHOR43
+	.loc 2 2512 0
+	str	wzr, [x0, #:lo12:.LANCHOR72]
+.LVL452:
+	.loc 2 2514 0
+	ldr	x6, [x1, #:lo12:.LANCHOR43]
+	.loc 2 2513 0
 	mov	x1, 0
-.LVL478:
-.L228:
-	.loc 2 2459 0 is_stmt 0 discriminator 1
+.LVL453:
+.L219:
+	.loc 2 2513 0 is_stmt 0 discriminator 1
 	cmp	w3, w1
-	bhi	.L229
-	cbz	w5, .L230
-	str	w4, [x0, #:lo12:.LANCHOR73]
-.L230:
-	.loc 2 2461 0 is_stmt 1
-	ldr	w1, [x0, #:lo12:.LANCHOR73]
-.LVL479:
+	bhi	.L220
+	cbz	w5, .L221
+	str	w4, [x0, #:lo12:.LANCHOR72]
+.L221:
+	.loc 2 2515 0 is_stmt 1
+	ldr	w1, [x0, #:lo12:.LANCHOR72]
+.LVL454:
 	udiv	w3, w1, w3
-	str	w3, [x2, #:lo12:.LANCHOR75]
-	.loc 2 2462 0
-	adrp	x3, .LANCHOR74
-	ldr	w3, [x3, #:lo12:.LANCHOR74]
+	str	w3, [x2, #:lo12:.LANCHOR74]
+	.loc 2 2516 0
+	adrp	x3, .LANCHOR73
+	ldr	w3, [x3, #:lo12:.LANCHOR73]
 	sub	w1, w1, w3
 	adrp	x3, .LANCHOR14
 	ldrh	w3, [x3, #:lo12:.LANCHOR14]
 	udiv	w1, w1, w3
-	str	w1, [x0, #:lo12:.LANCHOR73]
-.L231:
-	.loc 2 2468 0
-	ldr	w8, [x2, #:lo12:.LANCHOR75]
+	str	w1, [x0, #:lo12:.LANCHOR72]
+.L222:
+	.loc 2 2522 0
+	ldr	w10, [x2, #:lo12:.LANCHOR74]
 	add	w0, w7, 256
-	cmp	w0, w8
-	bls	.L236
-	.loc 2 2468 0 is_stmt 0 discriminator 1
-	adrp	x1, .LANCHOR77
+	cmp	w0, w10
+	bls	.L227
+	.loc 2 2522 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR76
 	add	w0, w7, 768
-	ldr	w1, [x1, #:lo12:.LANCHOR77]
+	ldr	w1, [x1, #:lo12:.LANCHOR76]
 	cmp	w0, w1
-	bls	.L236
-.LVL480:
-.L239:
-	.loc 2 2469 0 is_stmt 1
+	bls	.L227
+.LVL455:
+.L229:
+	.loc 2 2523 0 is_stmt 1
 	mov	w19, 65535
-.L237:
-	.loc 2 2518 0
+.L228:
+	.loc 2 2569 0
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -3922,189 +3754,197 @@ GetSwlReplaceBlock:
 	.cfi_restore 19
 	.cfi_def_cfa 31, 0
 	ret
-.LVL481:
-.L229:
+.LVL456:
+.L220:
 	.cfi_restore_state
-	.loc 2 2460 0 discriminator 3
+	.loc 2 2514 0 discriminator 3
 	ldrh	w5, [x6, x1, lsl 1]
 	add	x1, x1, 1
-.LVL482:
+.LVL457:
 	add	w4, w4, w5
 	mov	w5, 1
-	b	.L228
-.L227:
-	.loc 2 2463 0
-	adrp	x1, .LANCHOR77
-	ldr	w0, [x1, #:lo12:.LANCHOR77]
+	b	.L219
+.L218:
+	.loc 2 2517 0
+	adrp	x1, .LANCHOR76
+	ldr	w0, [x1, #:lo12:.LANCHOR76]
 	cmp	w3, w0
-	bls	.L231
-	.loc 2 2464 0
+	bls	.L222
+	.loc 2 2518 0
 	add	w0, w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR77]
-.LVL483:
-	.loc 2 2466 0
-	adrp	x0, .LANCHOR40
-	.loc 2 2465 0
+	str	w0, [x1, #:lo12:.LANCHOR76]
+.LVL458:
+	.loc 2 2520 0
+	adrp	x0, .LANCHOR43
+	.loc 2 2519 0
 	adrp	x1, .LANCHOR5
 	add	x1, x1, :lo12:.LANCHOR5
-	.loc 2 2466 0
-	ldr	x4, [x0, #:lo12:.LANCHOR40]
-	.loc 2 2465 0
+	.loc 2 2520 0
+	ldr	x4, [x0, #:lo12:.LANCHOR43]
+	.loc 2 2519 0
 	mov	w0, 0
-.LVL484:
-.L233:
-	.loc 2 2465 0 is_stmt 0 discriminator 1
+.LVL459:
+.L224:
+	.loc 2 2519 0 is_stmt 0 discriminator 1
 	ldrh	w3, [x1]
 	cmp	w0, w3
-	bcs	.L231
-	.loc 2 2466 0 is_stmt 1 discriminator 3
+	bcs	.L222
+	.loc 2 2520 0 is_stmt 1 discriminator 3
 	ubfiz	x5, x0, 1, 32
-	.loc 2 2465 0 discriminator 3
+	.loc 2 2519 0 discriminator 3
 	add	w0, w0, 1
-.LVL485:
-	.loc 2 2466 0 discriminator 3
+.LVL460:
+	.loc 2 2520 0 discriminator 3
 	ldrh	w3, [x4, x5]
 	add	w3, w3, 1
 	strh	w3, [x4, x5]
-	b	.L233
-.LVL486:
-.L236:
-	.loc 2 2471 0
+	b	.L224
+.LVL461:
+.L227:
+	.loc 2 2525 0
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	add	w0, w0, w0, lsl 1
 	lsr	w0, w0, 2
 	bl	GetFreeBlockMaxEraseCount
-.LVL487:
+.LVL462:
 	and	w6, w0, 65535
-.LVL488:
-	.loc 2 2472 0
+.LVL463:
+	.loc 2 2526 0
 	add	w0, w7, 64
-.LVL489:
+.LVL464:
 	cmp	w6, w0
-	bcs	.L238
-	.loc 2 2472 0 is_stmt 0 discriminator 1
-	cmp	w7, 30
-	bhi	.L239
-.L238:
-	.loc 2 2476 0 is_stmt 1
-	adrp	x0, .LANCHOR42
-	ldr	x0, [x0, #:lo12:.LANCHOR42]
-	cbz	x0, .L239
-	.loc 2 2483 0
-	adrp	x1, .LANCHOR41
-	.loc 2 2484 0
+	bcc	.L229
+	.loc 2 2529 0
+	adrp	x0, .LANCHOR41
+	ldr	x0, [x0, #:lo12:.LANCHOR41]
+	cbz	x0, .L229
+	.loc 2 2533 0
+	adrp	x1, .LANCHOR5
+	.loc 2 2537 0
 	mov	w3, 65535
-	.loc 2 2483 0
-	mov	x12, -6148914691236517206
-	.loc 2 2484 0
+	.loc 2 2536 0
+	mov	x14, -6148914691236517206
+	.loc 2 2537 0
 	mov	w2, w3
-	.loc 2 2483 0
-	ldr	x5, [x1, #:lo12:.LANCHOR41]
-	.loc 2 2484 0
+	.loc 2 2533 0
+	ldrh	w13, [x1, #:lo12:.LANCHOR5]
+	.loc 2 2536 0
 	adrp	x1, .LANCHOR40
-	.loc 2 2479 0
-	mov	w11, w3
-	.loc 2 2483 0
-	movk	x12, 0xaaab, lsl 0
-	.loc 2 2484 0
-	ldr	x1, [x1, #:lo12:.LANCHOR40]
-	.loc 2 2495 0
-	mov	w13, 6
-.LVL490:
-.L240:
-	.loc 2 2479 0
-	ldrh	w4, [x0]
-	cmp	w4, w11
-	bne	.L243
+	.loc 2 2531 0
+	mov	w12, w3
+	.loc 2 2536 0
+	movk	x14, 0xaaab, lsl 0
+	ldr	x11, [x1, #:lo12:.LANCHOR40]
+	.loc 2 2537 0
+	adrp	x1, .LANCHOR43
+	.loc 2 2546 0
+	mov	w15, 6
+	.loc 2 2537 0
+	ldr	x4, [x1, #:lo12:.LANCHOR43]
+	mov	w1, 0
+.LVL465:
+.L230:
+	.loc 2 2531 0
+	ldrh	w5, [x0]
+	cmp	w5, w12
+	bne	.L233
 	mov	w19, w2
-.LVL491:
-.L242:
-	.loc 2 2498 0
+.LVL466:
+.L232:
+	.loc 2 2549 0
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L239
-	.loc 2 2500 0
+	beq	.L229
+	.loc 2 2551 0
 	ubfiz	x2, x19, 1, 32
-	ldrh	w5, [x1, x2]
-.LVL492:
-	.loc 2 2501 0
+	ldrh	w5, [x4, x2]
+.LVL467:
+	.loc 2 2552 0
 	cmp	w7, w5
-	bcs	.L244
-	.loc 2 2503 0
+	bcs	.L234
+	.loc 2 2554 0
 	bl	GetFreeBlockMinEraseCount
-.LVL493:
+.LVL468:
 	cmp	w7, w0, uxth
-	bcs	.L244
-	.loc 2 2504 0
-	str	w3, [x10, #:lo12:.LANCHOR78]
-.L244:
-	.loc 2 2506 0
-	cmp	w8, w5
-	bls	.L239
-	.loc 2 2506 0 is_stmt 0 discriminator 1
+	bcs	.L234
+	.loc 2 2555 0
+	str	w3, [x8, #:lo12:.LANCHOR77]
+.L234:
+	.loc 2 2557 0
+	cmp	w10, w5
+	bls	.L229
+	.loc 2 2557 0 is_stmt 0 discriminator 1
 	add	w0, w5, 128
 	cmp	w6, w0
-	ble	.L239
-	.loc 2 2508 0 is_stmt 1
+	ble	.L229
+	.loc 2 2559 0 is_stmt 1
 	add	w0, w5, 256
-	adrp	x1, .LANCHOR77
-	cmp	w8, w0
-	bhi	.L245
-	.loc 2 2508 0 is_stmt 0 discriminator 1
-	ldr	w3, [x1, #:lo12:.LANCHOR77]
-.LVL494:
+	adrp	x1, .LANCHOR76
+	cmp	w10, w0
+	bhi	.L235
+	.loc 2 2559 0 is_stmt 0 discriminator 1
+	ldr	w3, [x1, #:lo12:.LANCHOR76]
+.LVL469:
 	add	w0, w5, 768
 	cmp	w0, w3
-	bcs	.L239
-.L245:
-	.loc 2 2510 0 is_stmt 1
-	adrp	x0, .LANCHOR43
-	ldr	w3, [x1, #:lo12:.LANCHOR77]
+	bcs	.L229
+.L235:
+	.loc 2 2561 0 is_stmt 1
+	adrp	x0, .LANCHOR42
+	ldr	w3, [x1, #:lo12:.LANCHOR76]
 	mov	w1, w19
-	ldr	x0, [x0, #:lo12:.LANCHOR43]
+	ldr	x0, [x0, #:lo12:.LANCHOR42]
 	ldrh	w4, [x0, x2]
-	mov	w2, w8
+	mov	w2, w10
 	adrp	x0, .LC72
 	add	x0, x0, :lo12:.LC72
 	bl	printf
-.LVL495:
-	.loc 2 2511 0
-	adrp	x0, .LANCHOR89
+.LVL470:
+	.loc 2 2562 0
+	adrp	x0, .LANCHOR87
 	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR89]
-	.loc 2 2512 0
-	b	.L237
-.LVL496:
-.L243:
-	.loc 2 2481 0
-	ldrh	w14, [x0, 4]
-	cbz	w14, .L241
-	.loc 2 2483 0
-	sub	x0, x0, x5
-.LVL497:
+	str	w1, [x0, #:lo12:.LANCHOR87]
+	.loc 2 2563 0
+	b	.L228
+.LVL471:
+.L233:
+	.loc 2 2532 0
+	add	w1, w1, 1
+.LVL472:
+	and	w1, w1, 65535
+.LVL473:
+	.loc 2 2533 0
+	cmp	w1, w13
+	bhi	.L229
+	.loc 2 2535 0
+	ldrh	w16, [x0, 4]
+	cbz	w16, .L231
+	.loc 2 2536 0
+	sub	x0, x0, x11
+.LVL474:
 	asr	x0, x0, 1
-	mul	x0, x0, x12
+	mul	x0, x0, x14
 	and	w19, w0, 65535
-.LVL498:
-	.loc 2 2484 0
+.LVL475:
+	.loc 2 2537 0
 	and	x0, x0, 65535
-	ldrh	w0, [x1, x0, lsl 1]
+	ldrh	w0, [x4, x0, lsl 1]
 	cmp	w7, w0
-	bcs	.L242
-	.loc 2 2489 0
+	bcs	.L232
+	.loc 2 2541 0
 	cmp	w3, w0
-	bls	.L241
+	bls	.L231
 	mov	w3, w0
-.LVL499:
-	.loc 2 2483 0
+.LVL476:
+	.loc 2 2536 0
 	mov	w2, w19
-.LVL500:
-.L241:
-	.loc 2 2495 0
-	umaddl	x0, w4, w13, x5
-.LVL501:
-	b	.L240
+.LVL477:
+.L231:
+	.loc 2 2546 0
+	umaddl	x0, w5, w15, x11
+.LVL478:
+	b	.L230
 	.cfi_endproc
 .LFE296:
 	.size	GetSwlReplaceBlock, .-GetSwlReplaceBlock
@@ -4114,49 +3954,49 @@ GetSwlReplaceBlock:
 	.type	free_data_superblock, %function
 free_data_superblock:
 .LFB297:
-	.loc 2 2522 0
+	.loc 2 2573 0
 	.cfi_startproc
-.LVL502:
+.LVL479:
 	and	w0, w0, 65535
-	.loc 2 2523 0
+	.loc 2 2574 0
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L259
-.LVL503:
-	.loc 2 2522 0
+	beq	.L249
+.LVL480:
+	.loc 2 2573 0
 	stp	x29, x30, [sp, -16]!
 	.cfi_def_cfa_offset 16
 	.cfi_offset 29, -16
 	.cfi_offset 30, -8
-.LBB209:
-.LBB210:
-	.loc 2 2525 0
-	adrp	x2, .LANCHOR43
+.LBB221:
+.LBB222:
+	.loc 2 2576 0
+	adrp	x2, .LANCHOR42
 	ubfiz	x1, x0, 1, 16
-.LBE210:
-.LBE209:
-	.loc 2 2522 0
+.LBE222:
+.LBE221:
+	.loc 2 2573 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-.LBB212:
-.LBB211:
-	.loc 2 2525 0
-	ldr	x2, [x2, #:lo12:.LANCHOR43]
+.LBB224:
+.LBB223:
+	.loc 2 2576 0
+	ldr	x2, [x2, #:lo12:.LANCHOR42]
 	strh	wzr, [x2, x1]
-	.loc 2 2526 0
+	.loc 2 2577 0
 	bl	INSERT_FREE_LIST
-.LVL504:
-.LBE211:
-.LBE212:
-	.loc 2 2528 0
+.LVL481:
+.LBE223:
+.LBE224:
+	.loc 2 2579 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	.cfi_restore 30
 	.cfi_restore 29
 	.cfi_def_cfa 31, 0
 	ret
-.LVL505:
-.L259:
+.LVL482:
+.L249:
 	mov	w0, 0
 	ret
 	.cfi_endproc
@@ -4168,9 +4008,9 @@ free_data_superblock:
 	.type	get_new_active_ppa, %function
 get_new_active_ppa:
 .LFB300:
-	.loc 2 2655 0
+	.loc 2 2706 0
 	.cfi_startproc
-.LVL506:
+.LVL483:
 	stp	x29, x30, [sp, -48]!
 	.cfi_def_cfa_offset 48
 	.cfi_offset 29, -48
@@ -4181,128 +4021,128 @@ get_new_active_ppa:
 	.cfi_offset 19, -32
 	.cfi_offset 20, -24
 	mov	x19, x0
-	.loc 2 2659 0
+	.loc 2 2710 0
 	ldrh	w1, [x0]
 	mov	w0, 65535
-.LVL507:
-	.loc 2 2655 0
+.LVL484:
+	.loc 2 2706 0
 	str	x21, [sp, 32]
 	.cfi_offset 21, -16
-	.loc 2 2659 0
+	.loc 2 2710 0
 	cmp	w1, w0
-	bne	.L263
-	.loc 2 2659 0 is_stmt 0 discriminator 1
-	adrp	x1, .LANCHOR90
+	bne	.L253
+	.loc 2 2710 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR88
 	adrp	x0, .LC1
-	mov	w2, 2659
-	add	x1, x1, :lo12:.LANCHOR90
+	mov	w2, 2710
+	add	x1, x1, :lo12:.LANCHOR88
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL508:
-.L263:
-	.loc 2 2660 0 is_stmt 1
+.LVL485:
+.L253:
+	.loc 2 2711 0 is_stmt 1
 	adrp	x20, .LANCHOR19
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR19]
 	cmp	w1, w0
-	bne	.L264
-	.loc 2 2660 0 is_stmt 0 discriminator 1
-	adrp	x1, .LANCHOR90
+	bne	.L254
+	.loc 2 2711 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR88
 	adrp	x0, .LC1
-	mov	w2, 2660
-	add	x1, x1, :lo12:.LANCHOR90
+	mov	w2, 2711
+	add	x1, x1, :lo12:.LANCHOR88
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL509:
-.L264:
-	.loc 2 2661 0 is_stmt 1
+.LVL486:
+.L254:
+	.loc 2 2712 0 is_stmt 1
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L265
-	.loc 2 2661 0 is_stmt 0 discriminator 1
-	adrp	x1, .LANCHOR90
+	cbnz	w0, .L255
+	.loc 2 2712 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR88
 	adrp	x0, .LC1
-	mov	w2, 2661
-	add	x1, x1, :lo12:.LANCHOR90
+	mov	w2, 2712
+	add	x1, x1, :lo12:.LANCHOR88
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL510:
-.L265:
-	.loc 2 2663 0 is_stmt 1
+.LVL487:
+.L255:
+	.loc 2 2714 0 is_stmt 1
 	ldrb	w0, [x19, 6]
-	.loc 2 2666 0
+	.loc 2 2717 0
 	adrp	x1, .LANCHOR3
-	.loc 2 2662 0
+	.loc 2 2713 0
 	strb	wzr, [x19, 10]
-	.loc 2 2663 0
+	.loc 2 2714 0
 	add	x0, x0, 8
-	.loc 2 2666 0
+	.loc 2 2717 0
 	ldrh	w2, [x1, #:lo12:.LANCHOR3]
-	.loc 2 2664 0
+	.loc 2 2715 0
 	mov	w1, 65535
-	.loc 2 2663 0
+	.loc 2 2714 0
 	ldrh	w0, [x19, x0, lsl 1]
-.LVL511:
-.L266:
-	.loc 2 2664 0
+.LVL488:
+.L256:
+	.loc 2 2715 0
 	cmp	w0, w1
-	beq	.L268
-	.loc 2 2672 0
+	beq	.L258
+	.loc 2 2723 0
 	ldrh	w21, [x19, 2]
-	.loc 2 2680 0
+	.loc 2 2731 0
 	mov	w3, 65535
-	.loc 2 2673 0
+	.loc 2 2724 0
 	ldrh	w1, [x19, 4]
-	.loc 2 2672 0
+	.loc 2 2723 0
 	orr	w21, w21, w0, lsl 10
-.LVL512:
+.LVL489:
 	ldrb	w0, [x19, 6]
-.LVL513:
-	.loc 2 2673 0
+.LVL490:
+	.loc 2 2724 0
 	sub	w1, w1, #1
 	and	w1, w1, 65535
 	strh	w1, [x19, 4]
-.L270:
-	.loc 2 2675 0
+.L260:
+	.loc 2 2726 0
 	add	w0, w0, 1
 	and	w0, w0, 255
-	.loc 2 2676 0
+	.loc 2 2727 0
 	cmp	w2, w0
-	bne	.L269
-	.loc 2 2677 0
+	bne	.L259
+	.loc 2 2728 0
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-	.loc 2 2678 0
+	.loc 2 2729 0
 	mov	w0, 0
-.L269:
-	.loc 2 2680 0
+.L259:
+	.loc 2 2731 0
 	add	x4, x19, x0, sxtw 1
 	ldrh	w4, [x4, 16]
 	cmp	w4, w3
-	beq	.L270
+	beq	.L260
 	strb	w0, [x19, 6]
-	.loc 2 2682 0
+	.loc 2 2733 0
 	ldrh	w2, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR19]
 	cmp	w2, w0
-	bne	.L262
-	.loc 2 2682 0 is_stmt 0 discriminator 1
-	cbz	w1, .L262
-	.loc 2 2682 0 discriminator 2
-	adrp	x1, .LANCHOR90
+	bne	.L252
+	.loc 2 2733 0 is_stmt 0 discriminator 1
+	cbz	w1, .L252
+	.loc 2 2733 0 discriminator 2
+	adrp	x1, .LANCHOR88
 	adrp	x0, .LC1
-	mov	w2, 2682
-	add	x1, x1, :lo12:.LANCHOR90
+	mov	w2, 2733
+	add	x1, x1, :lo12:.LANCHOR88
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL514:
-.L262:
-	.loc 2 2684 0 is_stmt 1
+.LVL491:
+.L252:
+	.loc 2 2735 0 is_stmt 1
 	mov	w0, w21
 	ldr	x21, [sp, 32]
-.LVL515:
+.LVL492:
 	ldp	x19, x20, [sp, 16]
-.LVL516:
+.LVL493:
 	ldp	x29, x30, [sp], 48
 	.cfi_remember_state
 	.cfi_restore 30
@@ -4312,32 +4152,32 @@ get_new_active_ppa:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL517:
-.L268:
+.LVL494:
+.L258:
 	.cfi_restore_state
-	.loc 2 2665 0
+	.loc 2 2716 0
 	ldrb	w0, [x19, 6]
-.LVL518:
+.LVL495:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x19, 6]
-	.loc 2 2666 0
+	.loc 2 2717 0
 	cmp	w0, w2
-	bne	.L267
-	.loc 2 2667 0
+	bne	.L257
+	.loc 2 2718 0
 	ldrh	w0, [x19, 2]
-	.loc 2 2668 0
+	.loc 2 2719 0
 	strb	wzr, [x19, 6]
-	.loc 2 2667 0
+	.loc 2 2718 0
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L267:
-	.loc 2 2670 0
+.L257:
+	.loc 2 2721 0
 	ldrb	w0, [x19, 6]
 	add	x0, x0, 8
 	ldrh	w0, [x19, x0, lsl 1]
-.LVL519:
-	b	.L266
+.LVL496:
+	b	.L256
 	.cfi_endproc
 .LFE300:
 	.size	get_new_active_ppa, .-get_new_active_ppa
@@ -4351,20 +4191,20 @@ FtlGcBufInit:
 	.loc 5 22 0
 	.cfi_startproc
 	.loc 5 27 0
-	adrp	x1, .LANCHOR92
+	adrp	x1, .LANCHOR90
 	.loc 5 25 0
-	adrp	x0, .LANCHOR91
+	adrp	x0, .LANCHOR89
 	.loc 5 28 0
-	adrp	x7, .LANCHOR93
+	adrp	x7, .LANCHOR91
 	.loc 5 29 0
-	adrp	x6, .LANCHOR94
+	adrp	x6, .LANCHOR92
 	.loc 5 27 0
-	ldr	x5, [x1, #:lo12:.LANCHOR92]
+	ldr	x5, [x1, #:lo12:.LANCHOR90]
 	.loc 5 28 0
 	adrp	x1, .LANCHOR23
 	.loc 5 25 0
-	str	wzr, [x0, #:lo12:.LANCHOR91]
-.LVL520:
+	str	wzr, [x0, #:lo12:.LANCHOR89]
+.LVL497:
 	.loc 5 26 0
 	adrp	x0, .LANCHOR3
 	.loc 5 28 0
@@ -4377,15 +4217,15 @@ FtlGcBufInit:
 	.loc 5 29 0
 	ldrh	w11, [x1, #:lo12:.LANCHOR24]
 	.loc 5 30 0
-	adrp	x1, .LANCHOR95
+	adrp	x1, .LANCHOR93
 	.loc 5 28 0
-	ldr	x14, [x7, #:lo12:.LANCHOR93]
+	ldr	x14, [x7, #:lo12:.LANCHOR91]
 	mov	x3, x5
-	ldr	x4, [x1, #:lo12:.LANCHOR95]
+	ldr	x4, [x1, #:lo12:.LANCHOR93]
 	.loc 5 26 0
 	mov	w2, 0
 	.loc 5 29 0
-	ldr	x15, [x6, #:lo12:.LANCHOR94]
+	ldr	x15, [x6, #:lo12:.LANCHOR92]
 	nop // between mem op and mult-accumulate
 	umaddl	x8, w0, w8, x5
 	add	x4, x4, 8
@@ -4393,32 +4233,32 @@ FtlGcBufInit:
 	mov	w1, 0
 	.loc 5 27 0
 	mov	w16, 1
-.LVL521:
-.L278:
+.LVL498:
+.L268:
 	add	w13, w2, w10
 	add	w12, w1, w11
 	.loc 5 26 0 discriminator 1
 	cmp	x3, x8
-	bne	.L279
+	bne	.L269
 	.loc 5 34 0
-	adrp	x1, .LANCHOR96
+	adrp	x1, .LANCHOR94
 	.loc 5 36 0
-	ldr	x7, [x7, #:lo12:.LANCHOR93]
+	ldr	x7, [x7, #:lo12:.LANCHOR91]
 	.loc 5 37 0
-	ldr	x6, [x6, #:lo12:.LANCHOR94]
+	ldr	x6, [x6, #:lo12:.LANCHOR92]
 	.loc 5 35 0
 	mov	w8, 24
 	.loc 5 34 0
-	ldr	w4, [x1, #:lo12:.LANCHOR96]
-.L280:
-.LVL522:
+	ldr	w4, [x1, #:lo12:.LANCHOR94]
+.L270:
+.LVL499:
 	.loc 5 34 0 is_stmt 0 discriminator 1
 	cmp	w0, w4
-	bcc	.L281
+	bcc	.L271
 	.loc 5 39 0 is_stmt 1
 	ret
-.LVL523:
-.L279:
+.LVL500:
+.L269:
 	.loc 5 28 0 discriminator 3
 	asr	w2, w2, 2
 	.loc 5 29 0 discriminator 3
@@ -4437,9 +4277,9 @@ FtlGcBufInit:
 	add	x4, x4, 32
 	mov	w1, w12
 	mov	w2, w13
-	b	.L278
-.LVL524:
-.L281:
+	b	.L268
+.LVL501:
+.L271:
 	.loc 5 35 0 discriminator 3
 	umull	x3, w0, w8
 	.loc 5 36 0 discriminator 3
@@ -4457,14 +4297,14 @@ FtlGcBufInit:
 	mul	w1, w11, w0
 	.loc 5 34 0 discriminator 3
 	add	w0, w0, 1
-.LVL525:
+.LVL502:
 	and	w0, w0, 65535
-.LVL526:
+.LVL503:
 	.loc 5 37 0 discriminator 3
 	asr	w1, w1, 2
 	add	x1, x6, x1, sxtw 2
 	str	x1, [x2, 8]
-	b	.L280
+	b	.L270
 	.cfi_endproc
 .LFE303:
 	.size	FtlGcBufInit, .-FtlGcBufInit
@@ -4476,57 +4316,57 @@ FtlGcBufFree:
 .LFB304:
 	.loc 5 42 0
 	.cfi_startproc
-.LVL527:
+.LVL504:
 	.loc 5 47 0
-	adrp	x2, .LANCHOR96
+	adrp	x2, .LANCHOR94
 	.loc 5 46 0
 	mov	w3, 0
 	.loc 5 48 0
 	mov	w8, 24
 	.loc 5 47 0
-	ldr	w7, [x2, #:lo12:.LANCHOR96]
+	ldr	w7, [x2, #:lo12:.LANCHOR94]
 	.loc 5 48 0
-	adrp	x2, .LANCHOR92
-	ldr	x5, [x2, #:lo12:.LANCHOR92]
-.LVL528:
-.L283:
+	adrp	x2, .LANCHOR90
+	ldr	x5, [x2, #:lo12:.LANCHOR90]
+.LVL505:
+.L273:
 	.loc 5 46 0 discriminator 1
 	cmp	w3, w1
-	bcs	.L282
+	bcs	.L272
 	.loc 5 48 0
 	ubfiz	x4, x3, 5, 16
 	mov	w2, 0
 	add	x4, x0, x4
-	b	.L288
-.LVL529:
-.L284:
+	b	.L278
+.LVL506:
+.L274:
 	.loc 5 47 0 discriminator 2
 	add	w2, w2, 1
-.LVL530:
+.LVL507:
 	and	w2, w2, 65535
-.LVL531:
-.L288:
+.LVL508:
+.L278:
 	.loc 5 47 0 is_stmt 0 discriminator 1
 	cmp	w2, w7
-	bcs	.L285
+	bcs	.L275
 	.loc 5 48 0 is_stmt 1
 	umull	x6, w2, w8
 	add	x10, x5, x6
 	ldr	x11, [x5, x6]
 	ldr	x6, [x4, 8]
 	cmp	x11, x6
-	bne	.L284
+	bne	.L274
 	.loc 5 49 0
 	str	wzr, [x10, 16]
-.L285:
+.L275:
 	.loc 5 46 0 discriminator 2
 	add	w3, w3, 1
-.LVL532:
+.LVL509:
 	and	w3, w3, 65535
-.LVL533:
-	b	.L283
-.LVL534:
-.L282:
+.LVL510:
+	b	.L273
+.LVL511:
+.L272:
 	ret
 	.cfi_endproc
 .LFE304:
@@ -4539,9 +4379,9 @@ FtlGcBufAlloc:
 .LFB305:
 	.loc 5 57 0
 	.cfi_startproc
-.LVL535:
+.LVL512:
 	.loc 5 62 0
-	adrp	x2, .LANCHOR96
+	adrp	x2, .LANCHOR94
 	.loc 5 61 0
 	mov	w3, 0
 	.loc 5 63 0
@@ -4549,35 +4389,35 @@ FtlGcBufAlloc:
 	.loc 5 64 0
 	mov	w8, 1
 	.loc 5 62 0
-	ldr	w5, [x2, #:lo12:.LANCHOR96]
+	ldr	w5, [x2, #:lo12:.LANCHOR94]
 	.loc 5 63 0
-	adrp	x2, .LANCHOR92
-	ldr	x6, [x2, #:lo12:.LANCHOR92]
-.LVL536:
-.L290:
+	adrp	x2, .LANCHOR90
+	ldr	x6, [x2, #:lo12:.LANCHOR90]
+.LVL513:
+.L280:
 	.loc 5 61 0 discriminator 1
 	cmp	w3, w1
-	bcs	.L289
+	bcs	.L279
 	mov	w2, 0
-	b	.L295
-.LVL537:
-.L291:
+	b	.L285
+.LVL514:
+.L281:
 	.loc 5 62 0 discriminator 2
 	add	w2, w2, 1
-.LVL538:
+.LVL515:
 	and	w2, w2, 65535
-.LVL539:
-.L295:
+.LVL516:
+.L285:
 	.loc 5 62 0 is_stmt 0 discriminator 1
 	cmp	w2, w5
-	bcs	.L292
+	bcs	.L282
 	.loc 5 63 0 is_stmt 1
 	umaddl	x4, w2, w7, x6
 	ldr	w10, [x4, 16]
-	cbnz	w10, .L291
+	cbnz	w10, .L281
 	.loc 5 65 0
 	ubfiz	x2, x3, 5, 16
-.LVL540:
+.LVL517:
 	ldr	x10, [x4]
 	add	x2, x0, x2
 	.loc 5 64 0
@@ -4585,14 +4425,14 @@ FtlGcBufAlloc:
 	.loc 5 66 0
 	ldr	x4, [x4, 8]
 	stp	x10, x4, [x2, 8]
-.L292:
+.L282:
 	.loc 5 61 0 discriminator 2
 	add	w3, w3, 1
-.LVL541:
+.LVL518:
 	and	w3, w3, 65535
-.LVL542:
-	b	.L290
-.L289:
+.LVL519:
+	b	.L280
+.L279:
 	ret
 	.cfi_endproc
 .LFE305:
@@ -4605,35 +4445,35 @@ IsBlkInGcList:
 .LFB306:
 	.loc 5 74 0
 	.cfi_startproc
-.LVL543:
+.LVL520:
 	.loc 5 77 0
-	adrp	x1, .LANCHOR97
+	adrp	x1, .LANCHOR95
 	.loc 5 74 0
 	and	w0, w0, 65535
 	.loc 5 77 0
-	ldrh	w2, [x1, #:lo12:.LANCHOR97]
+	ldrh	w2, [x1, #:lo12:.LANCHOR95]
 	.loc 5 78 0
-	adrp	x1, .LANCHOR98
-	ldr	x3, [x1, #:lo12:.LANCHOR98]
+	adrp	x1, .LANCHOR96
+	ldr	x3, [x1, #:lo12:.LANCHOR96]
 	.loc 5 77 0
 	mov	x1, 0
-.LVL544:
-.L297:
+.LVL521:
+.L287:
 	.loc 5 77 0 is_stmt 0 discriminator 1
 	cmp	w2, w1, uxth
-	bhi	.L299
+	bhi	.L289
 	.loc 5 81 0 is_stmt 1
 	mov	w0, 0
-.LVL545:
+.LVL522:
 	ret
-.L299:
+.L289:
 	add	x1, x1, 1
-.LVL546:
+.LVL523:
 	.loc 5 78 0
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w0
-	bne	.L297
+	bne	.L287
 	.loc 5 79 0
 	mov	w0, 1
 	.loc 5 82 0
@@ -4649,7 +4489,7 @@ FtlGcUpdatePage:
 .LFB307:
 	.loc 5 85 0
 	.cfi_startproc
-.LVL547:
+.LVL524:
 	mov	w6, w0
 	mov	w10, w1
 	mov	w8, w2
@@ -4659,72 +4499,72 @@ FtlGcUpdatePage:
 	.cfi_offset 30, -8
 	.loc 5 88 0
 	lsr	w0, w0, 10
-.LVL548:
+.LVL525:
 	.loc 5 85 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	.loc 5 88 0
 	bl	P2V_block_in_plane
-.LVL549:
+.LVL526:
 	and	w7, w0, 65535
-.LVL550:
+.LVL527:
 	.loc 5 91 0
-	adrp	x4, .LANCHOR97
+	adrp	x4, .LANCHOR95
 	.loc 5 92 0
-	adrp	x2, .LANCHOR98
+	adrp	x2, .LANCHOR96
 	.loc 5 91 0
 	mov	x3, 0
-	ldrh	w1, [x4, #:lo12:.LANCHOR97]
+	ldrh	w1, [x4, #:lo12:.LANCHOR95]
 	.loc 5 92 0
-	ldr	x5, [x2, #:lo12:.LANCHOR98]
-.LVL551:
-.L302:
+	ldr	x5, [x2, #:lo12:.LANCHOR96]
+.LVL528:
+.L292:
 	and	w2, w3, 65535
-.LVL552:
+.LVL529:
 	.loc 5 91 0 discriminator 1
 	cmp	w2, w1
-	bcc	.L304
+	bcc	.L294
 	.loc 5 96 0
-	bne	.L303
+	bne	.L293
 	.loc 5 97 0
 	and	x3, x3, 65535
 	strh	w0, [x5, x3, lsl 1]
 	.loc 5 98 0
-	ldrh	w0, [x4, #:lo12:.LANCHOR97]
-.LVL553:
+	ldrh	w0, [x4, #:lo12:.LANCHOR95]
+.LVL530:
 	add	w0, w0, 1
-	strh	w0, [x4, #:lo12:.LANCHOR97]
-.LVL554:
-	b	.L303
-.LVL555:
-.L304:
+	strh	w0, [x4, #:lo12:.LANCHOR95]
+.LVL531:
+	b	.L293
+.LVL532:
+.L294:
 	add	x3, x3, 1
 	.loc 5 92 0
 	add	x2, x5, x3, lsl 1
-.LVL556:
+.LVL533:
 	ldrh	w2, [x2, -2]
 	cmp	w2, w7
-	bne	.L302
-.LVL557:
-.L303:
+	bne	.L292
+.LVL534:
+.L293:
 	.loc 5 101 0
-	adrp	x4, .LANCHOR99
-	adrp	x1, .LANCHOR100
+	adrp	x4, .LANCHOR97
+	adrp	x1, .LANCHOR98
 	mov	w3, 12
-	ldrh	w0, [x4, #:lo12:.LANCHOR99]
-	ldr	x5, [x1, #:lo12:.LANCHOR100]
+	ldrh	w0, [x4, #:lo12:.LANCHOR97]
+	ldr	x5, [x1, #:lo12:.LANCHOR98]
 	umull	x3, w0, w3
 	.loc 5 107 0
 	add	w0, w0, 1
 	.loc 5 101 0
 	add	x7, x5, x3
-.LVL558:
+.LVL535:
 	.loc 5 102 0
 	stp	w10, w8, [x7, 4]
 	.loc 5 103 0
 	str	w6, [x5, x3]
 	.loc 5 107 0
-	strh	w0, [x4, #:lo12:.LANCHOR99]
+	strh	w0, [x4, #:lo12:.LANCHOR97]
 	.loc 5 108 0
 	ldp	x29, x30, [sp], 16
 	.cfi_restore 30
@@ -4742,7 +4582,7 @@ FtlGcRefreshBlock:
 .LFB314:
 	.loc 5 345 0
 	.cfi_startproc
-.LVL559:
+.LVL536:
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
@@ -4756,31 +4596,31 @@ FtlGcRefreshBlock:
 	.loc 5 347 0
 	mov	w1, w19
 	adrp	x0, .LC73
-.LVL560:
+.LVL537:
 	add	x0, x0, :lo12:.LC73
 	bl	printf
-.LVL561:
+.LVL538:
 	.loc 5 349 0
-	adrp	x3, .LANCHOR101
-	ldrh	w4, [x3, #:lo12:.LANCHOR101]
+	adrp	x3, .LANCHOR99
+	ldrh	w4, [x3, #:lo12:.LANCHOR99]
 	cmp	w19, w4
-	beq	.L307
+	beq	.L297
 	.loc 5 349 0 is_stmt 0 discriminator 1
-	adrp	x0, .LANCHOR102
-	ldrh	w2, [x0, #:lo12:.LANCHOR102]
+	adrp	x0, .LANCHOR100
+	ldrh	w2, [x0, #:lo12:.LANCHOR100]
 	cmp	w19, w2
-	beq	.L307
+	beq	.L297
 	.loc 5 351 0 is_stmt 1
 	mov	w1, 65535
 	cmp	w4, w1
-	bne	.L308
+	bne	.L298
 	.loc 5 352 0
-	strh	w19, [x3, #:lo12:.LANCHOR101]
-.L307:
+	strh	w19, [x3, #:lo12:.LANCHOR99]
+.L297:
 	.loc 5 356 0
 	mov	w0, 0
 	ldr	x19, [sp, 16]
-.LVL562:
+.LVL539:
 	ldp	x29, x30, [sp], 32
 	.cfi_remember_state
 	.cfi_restore 30
@@ -4788,14 +4628,14 @@ FtlGcRefreshBlock:
 	.cfi_restore 19
 	.cfi_def_cfa 31, 0
 	ret
-.L308:
+.L298:
 	.cfi_restore_state
 	.loc 5 353 0
 	cmp	w2, w1
-	bne	.L307
+	bne	.L297
 	.loc 5 354 0
-	strh	w19, [x0, #:lo12:.LANCHOR102]
-	b	.L307
+	strh	w19, [x0, #:lo12:.LANCHOR100]
+	b	.L297
 	.cfi_endproc
 .LFE314:
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
@@ -4807,7 +4647,7 @@ FtlGcMarkBadPhyBlk:
 .LFB315:
 	.loc 5 359 0
 	.cfi_startproc
-.LVL563:
+.LVL540:
 	stp	x29, x30, [sp, -48]!
 	.cfi_def_cfa_offset 48
 	.cfi_offset 29, -48
@@ -4819,70 +4659,70 @@ FtlGcMarkBadPhyBlk:
 	.cfi_offset 20, -24
 	and	w20, w0, 65535
 	.loc 5 364 0
-	adrp	x19, .LANCHOR103
+	adrp	x19, .LANCHOR101
 	.loc 5 359 0
 	str	x21, [sp, 32]
 	.cfi_offset 21, -16
 	.loc 5 361 0
 	mov	w0, w20
-.LVL564:
+.LVL541:
 	bl	P2V_block_in_plane
-.LVL565:
+.LVL542:
 	.loc 5 364 0
-	ldrh	w1, [x19, #:lo12:.LANCHOR103]
+	ldrh	w1, [x19, #:lo12:.LANCHOR101]
 	mov	w2, w20
 	.loc 5 361 0
 	mov	w21, w0
-.LVL566:
+.LVL543:
 	.loc 5 364 0
 	adrp	x0, .LC74
-.LVL567:
+.LVL544:
 	add	x0, x0, :lo12:.LC74
 	bl	printf
-.LVL568:
+.LVL545:
 	.loc 5 366 0
 	mov	w0, w21
 	bl	FtlGcRefreshBlock
-.LVL569:
+.LVL546:
 	.loc 5 368 0
-	ldrh	w0, [x19, #:lo12:.LANCHOR103]
+	ldrh	w0, [x19, #:lo12:.LANCHOR101]
 	.loc 5 369 0
-	adrp	x2, .LANCHOR104
-	add	x2, x2, :lo12:.LANCHOR104
+	adrp	x2, .LANCHOR102
+	add	x2, x2, :lo12:.LANCHOR102
 	.loc 5 368 0
 	mov	x1, 0
-.LVL570:
-.L311:
+.LVL547:
+.L301:
 	.loc 5 368 0 is_stmt 0 discriminator 1
 	cmp	w0, w1, uxth
-	bhi	.L313
+	bhi	.L303
 	.loc 5 372 0 is_stmt 1
 	cmp	w0, 15
-	bhi	.L312
+	bhi	.L302
 	.loc 5 373 0
 	add	w1, w0, 1
-.LVL571:
-	strh	w1, [x19, #:lo12:.LANCHOR103]
-	adrp	x1, .LANCHOR104
-	add	x1, x1, :lo12:.LANCHOR104
+.LVL548:
+	strh	w1, [x19, #:lo12:.LANCHOR101]
+	adrp	x1, .LANCHOR102
+	add	x1, x1, :lo12:.LANCHOR102
 	strh	w20, [x1, w0, sxtw 1]
-	b	.L312
-.LVL572:
-.L313:
+	b	.L302
+.LVL549:
+.L303:
 	add	x1, x1, 1
-.LVL573:
+.LVL550:
 	.loc 5 369 0
 	add	x3, x2, x1, lsl 1
 	ldrh	w3, [x3, -2]
 	cmp	w3, w20
-	bne	.L311
-.L312:
+	bne	.L301
+.L302:
 	.loc 5 375 0
 	mov	w0, 0
 	ldr	x21, [sp, 32]
-.LVL574:
+.LVL551:
 	ldp	x19, x20, [sp, 16]
-.LVL575:
+.LVL552:
 	ldp	x29, x30, [sp], 48
 	.cfi_restore 30
 	.cfi_restore 29
@@ -4903,15 +4743,15 @@ FtlGcReFreshBadBlk:
 	.loc 5 379 0
 	.cfi_startproc
 	.loc 5 380 0
-	adrp	x0, .LANCHOR103
-	ldrh	w0, [x0, #:lo12:.LANCHOR103]
-	cbz	w0, .L322
+	adrp	x0, .LANCHOR101
+	ldrh	w0, [x0, #:lo12:.LANCHOR101]
+	cbz	w0, .L312
 	.loc 5 380 0 is_stmt 0 discriminator 1
-	adrp	x1, .LANCHOR101
-	ldrh	w2, [x1, #:lo12:.LANCHOR101]
+	adrp	x1, .LANCHOR99
+	ldrh	w2, [x1, #:lo12:.LANCHOR99]
 	mov	w1, 65535
 	cmp	w2, w1
-	bne	.L322
+	bne	.L312
 	.loc 5 379 0 is_stmt 1
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
@@ -4922,30 +4762,30 @@ FtlGcReFreshBadBlk:
 	str	x19, [sp, 16]
 	.cfi_offset 19, -16
 	.loc 5 381 0
-	adrp	x19, .LANCHOR105
-	ldrh	w1, [x19, #:lo12:.LANCHOR105]
+	adrp	x19, .LANCHOR103
+	ldrh	w1, [x19, #:lo12:.LANCHOR103]
 	cmp	w1, w0
-	bcc	.L317
+	bcc	.L307
 	.loc 5 382 0
-	strh	wzr, [x19, #:lo12:.LANCHOR105]
-.L317:
-.LBB215:
-.LBB216:
+	strh	wzr, [x19, #:lo12:.LANCHOR103]
+.L307:
+.LBB227:
+.LBB228:
 	.loc 5 383 0
-	ldrh	w1, [x19, #:lo12:.LANCHOR105]
-	adrp	x0, .LANCHOR104
-	add	x0, x0, :lo12:.LANCHOR104
+	ldrh	w1, [x19, #:lo12:.LANCHOR103]
+	adrp	x0, .LANCHOR102
+	add	x0, x0, :lo12:.LANCHOR102
 	ldrh	w0, [x0, x1, lsl 1]
 	bl	P2V_block_in_plane
-.LVL576:
+.LVL553:
 	bl	FtlGcRefreshBlock
-.LVL577:
+.LVL554:
 	.loc 5 384 0
-	ldrh	w0, [x19, #:lo12:.LANCHOR105]
+	ldrh	w0, [x19, #:lo12:.LANCHOR103]
 	add	w0, w0, 1
-	strh	w0, [x19, #:lo12:.LANCHOR105]
-.LBE216:
-.LBE215:
+	strh	w0, [x19, #:lo12:.LANCHOR103]
+.LBE228:
+.LBE227:
 	.loc 5 387 0
 	mov	w0, 0
 	ldr	x19, [sp, 16]
@@ -4955,7 +4795,7 @@ FtlGcReFreshBadBlk:
 	.cfi_restore 19
 	.cfi_def_cfa 31, 0
 	ret
-.L322:
+.L312:
 	mov	w0, 0
 	ret
 	.cfi_endproc
@@ -4969,15 +4809,15 @@ ftl_free:
 .LFB337:
 	.loc 1 24 0
 	.cfi_startproc
-.LVL578:
-.LBB217:
-.LBB218:
+.LVL555:
+.LBB229:
+.LBB230:
 	.file 6 "include/linux/compat.h"
 	.loc 6 80 0
 	b	free
-.LVL579:
-.LBE218:
-.LBE217:
+.LVL556:
+.LBE230:
+.LBE229:
 	.cfi_endproc
 .LFE337:
 	.size	ftl_free, .-ftl_free
@@ -4989,12 +4829,12 @@ ftl_malloc:
 .LFB338:
 	.loc 1 28 0
 	.cfi_startproc
-.LVL580:
+.LVL557:
 	.loc 1 29 0
 	mov	w1, 0
 	sxtw	x0, w0
 	b	kmalloc
-.LVL581:
+.LVL558:
 	.cfi_endproc
 .LFE338:
 	.size	ftl_malloc, .-ftl_malloc
@@ -5006,7 +4846,7 @@ rknand_print_hex:
 .LFB339:
 	.loc 1 33 0
 	.cfi_startproc
-.LVL582:
+.LVL559:
 	stp	x29, x30, [sp, -96]!
 	.cfi_def_cfa_offset 96
 	.cfi_offset 29, -96
@@ -5017,7 +4857,7 @@ rknand_print_hex:
 	.cfi_offset 21, -64
 	.cfi_offset 22, -56
 	mov	x22, x1
-.LVL583:
+.LVL560:
 	stp	x23, x24, [sp, 48]
 	.cfi_offset 23, -48
 	.cfi_offset 24, -40
@@ -5051,27 +4891,27 @@ rknand_print_hex:
 	mov	w20, 0
 	.loc 1 47 0
 	adrp	x26, .LC76
-.LVL584:
-.L328:
+.LVL561:
+.L318:
 	.loc 1 40 0 discriminator 1
 	cmp	w27, w19
-	bhi	.L334
+	bhi	.L324
 	.loc 1 56 0
 	ldp	x19, x20, [sp, 16]
-.LVL585:
+.LVL562:
 	.loc 1 55 0
 	adrp	x0, .LC78
 	.loc 1 56 0
 	ldp	x21, x22, [sp, 32]
-.LVL586:
+.LVL563:
 	.loc 1 55 0
 	add	x0, x0, :lo12:.LC78
 	.loc 1 56 0
 	ldp	x23, x24, [sp, 48]
-.LVL587:
+.LVL564:
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-.LVL588:
+.LVL565:
 	ldp	x29, x30, [sp], 96
 	.cfi_remember_state
 	.cfi_restore 30
@@ -5089,61 +4929,61 @@ rknand_print_hex:
 	.cfi_def_cfa 31, 0
 	.loc 1 55 0
 	b	printf
-.LVL589:
-.L334:
+.LVL566:
+.L324:
 	.cfi_restore_state
 	.loc 1 41 0
-	cbnz	w20, .L329
+	cbnz	w20, .L319
 	.loc 1 42 0
 	mov	w2, w21
 	mov	x1, x28
 	mov	x0, x24
 	bl	printf
-.LVL590:
-.L329:
+.LVL567:
+.L319:
 	.loc 1 44 0
 	cmp	w23, 4
-	bne	.L330
+	bne	.L320
 	.loc 1 45 0
 	ldr	w1, [x22, x19, lsl 2]
-.L337:
+.L327:
 	.loc 1 47 0
 	add	x0, x26, :lo12:.LC76
-.L336:
+.L326:
 	.loc 1 49 0
 	bl	printf
-.LVL591:
+.LVL568:
 	.loc 1 50 0
 	add	w20, w20, 1
-.LVL592:
+.LVL569:
 	cmp	w20, 15
-	bls	.L333
-.LVL593:
+	bls	.L323
+.LVL570:
 	.loc 1 51 0
 	mov	w20, 0
 	.loc 1 52 0
 	adrp	x0, .LC78
 	add	x0, x0, :lo12:.LC78
 	bl	printf
-.LVL594:
-.L333:
+.LVL571:
+.L323:
 	add	x19, x19, 1
-.LVL595:
+.LVL572:
 	add	w21, w21, w23
-	b	.L328
-.LVL596:
-.L330:
+	b	.L318
+.LVL573:
+.L320:
 	.loc 1 46 0
 	cmp	w23, 2
-	bne	.L332
+	bne	.L322
 	.loc 1 47 0
 	ldrsh	w1, [x22, x19, lsl 1]
-	b	.L337
-.L332:
+	b	.L327
+.L322:
 	.loc 1 49 0
 	ldrb	w1, [x22, x19]
 	mov	x0, x25
-	b	.L336
+	b	.L326
 	.cfi_endproc
 .LFE339:
 	.size	rknand_print_hex, .-rknand_print_hex
@@ -5155,17 +4995,17 @@ FlashReadPages:
 .LFB341:
 	.loc 1 85 0
 	.cfi_startproc
-.LVL597:
+.LVL574:
 	stp	x29, x30, [sp, -96]!
 	.cfi_def_cfa_offset 96
 	.cfi_offset 29, -96
 	.cfi_offset 30, -88
 	.loc 1 87 0
 	adrp	x2, .LANCHOR0
-.LVL598:
+.LVL575:
 	add	x3, x2, :lo12:.LANCHOR0
 	ubfiz	x1, x1, 5, 32
-.LVL599:
+.LVL576:
 	.loc 1 85 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
@@ -5173,13 +5013,13 @@ FlashReadPages:
 	.cfi_offset 25, -32
 	.loc 1 87 0
 	ldrh	w25, [x3, 12]
-.LVL600:
+.LVL577:
 	.loc 1 85 0
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -64
 	.cfi_offset 22, -56
 	.loc 1 92 0
-	adrp	x21, .LANCHOR106
+	adrp	x21, .LANCHOR104
 	.loc 1 85 0
 	stp	x23, x24, [sp, 48]
 	.loc 1 92 0
@@ -5194,20 +5034,20 @@ FlashReadPages:
 	mov	x19, x0
 	mov	x23, x2
 	.loc 1 92 0
-	add	x21, x21, :lo12:.LANCHOR106
+	add	x21, x21, :lo12:.LANCHOR104
 	add	x22, x22, :lo12:.LC1
-.LVL601:
-.L339:
+.LVL578:
+.L329:
 	.loc 1 91 0 discriminator 1
 	cmp	x19, x24
-	bne	.L346
+	bne	.L336
 	.loc 1 112 0
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
-.LVL602:
+.LVL579:
 	ldp	x29, x30, [sp], 96
 	.cfi_remember_state
 	.cfi_restore 30
@@ -5221,48 +5061,48 @@ FlashReadPages:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL603:
-.L346:
+.LVL580:
+.L336:
 	.cfi_restore_state
 	.loc 1 92 0
 	ldr	x0, [x19, 8]
-	cbz	x0, .L340
+	cbz	x0, .L330
 	.loc 1 92 0 is_stmt 0 discriminator 2
 	ldr	x0, [x19, 16]
-	cbnz	x0, .L341
-.L340:
+	cbnz	x0, .L331
+.L330:
 	.loc 1 92 0 discriminator 3
 	mov	w2, 92
 	mov	x1, x21
 	mov	x0, x22
 	bl	printf
-.LVL604:
-.L341:
+.LVL581:
+.L331:
 	.loc 1 93 0 is_stmt 1
 	ldr	w0, [x19, 4]
 	.loc 1 94 0
-	adrp	x20, .LANCHOR107
-	add	x20, x20, :lo12:.LANCHOR107
+	adrp	x20, .LANCHOR105
+	add	x20, x20, :lo12:.LANCHOR105
 	.loc 1 93 0
 	add	x2, x29, 88
 	add	x1, x29, 92
 	bl	l2p_addr_tran.isra.0
-.LVL605:
+.LVL582:
 	.loc 1 94 0
 	ldrb	w0, [x29, 88]
 	ldr	w1, [x29, 92]
 	ldp	x2, x3, [x19, 8]
 	ldr	x4, [x20, 24]
 	blr	x4
-.LVL606:
+.LVL583:
 	.loc 1 98 0
 	str	w0, [x19]
 	.loc 1 99 0
 	add	x0, x23, :lo12:.LANCHOR0
-.LVL607:
+.LVL584:
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
-	bne	.L343
+	bne	.L333
 	.loc 1 100 0
 	ldrb	w0, [x29, 88]
 	ldr	x4, [x20, 24]
@@ -5272,32 +5112,32 @@ FlashReadPages:
 	add	x2, x2, 2048
 	add	w1, w25, w1
 	blr	x4
-.LVL608:
+.LVL585:
 	.loc 1 104 0
 	cmn	w0, #1
-	beq	.L344
+	beq	.L334
 	.loc 1 105 0 discriminator 1
 	ldr	x0, [x19, 16]
-.LVL609:
+.LVL586:
 	.loc 1 104 0 discriminator 1
 	ldr	w1, [x0, 12]
 	cmn	w1, #1
-	bne	.L343
+	bne	.L333
 	.loc 1 105 0
 	ldr	w1, [x0, 8]
 	cmn	w1, #1
-	bne	.L343
+	bne	.L333
 	.loc 1 106 0
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L343
-.L344:
+	beq	.L333
+.L334:
 	.loc 1 108 0
 	mov	w0, -1
 	str	w0, [x19]
-.L343:
+.L333:
 	add	x19, x19, 32
-	b	.L339
+	b	.L329
 	.cfi_endproc
 .LFE341:
 	.size	FlashReadPages, .-FlashReadPages
@@ -5314,14 +5154,14 @@ FtlLoadFactoryBbt:
 	.cfi_offset 29, -112
 	.cfi_offset 30, -104
 	.loc 4 286 0
-	adrp	x2, .LANCHOR39
-	adrp	x0, .LANCHOR108
-	add	x1, x0, :lo12:.LANCHOR108
+	adrp	x2, .LANCHOR107
+	adrp	x0, .LANCHOR106
+	add	x1, x0, :lo12:.LANCHOR106
 	.loc 4 279 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	.loc 4 286 0
-	ldr	x2, [x2, #:lo12:.LANCHOR39]
+	ldr	x2, [x2, #:lo12:.LANCHOR107]
 	.loc 4 279 0
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -80
@@ -5350,12 +5190,12 @@ FtlLoadFactoryBbt:
 	.loc 4 286 0
 	str	x2, [x1, 8]
 	.loc 4 287 0
-	adrp	x2, .LANCHOR109
+	adrp	x2, .LANCHOR108
 	.loc 4 289 0
 	adrp	x23, .LANCHOR10
 	add	x20, x20, 12
 	.loc 4 287 0
-	ldr	x25, [x2, #:lo12:.LANCHOR109]
+	ldr	x25, [x2, #:lo12:.LANCHOR108]
 	.loc 4 289 0
 	add	x23, x23, :lo12:.LANCHOR10
 	mov	w21, 0
@@ -5363,20 +5203,20 @@ FtlLoadFactoryBbt:
 	mov	w27, -1
 	.loc 4 287 0
 	str	x25, [x1, 16]
-.LVL610:
-.L358:
+.LVL587:
+.L348:
 	.loc 4 289 0 discriminator 1
 	ldrh	w0, [x23]
 	cmp	w21, w0
-	bcc	.L363
+	bcc	.L353
 	.loc 4 314 0
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
-.LVL611:
+.LVL588:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-.LVL612:
+.LVL589:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	.cfi_remember_state
@@ -5394,13 +5234,13 @@ FtlLoadFactoryBbt:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL613:
-.L363:
+.LVL590:
+.L353:
 	.cfi_restore_state
 	.loc 4 291 0
 	ldrh	w19, [x26, #:lo12:.LANCHOR17]
 	.loc 4 293 0
-	add	x24, x22, :lo12:.LANCHOR108
+	add	x24, x22, :lo12:.LANCHOR106
 	.loc 4 290 0
 	strh	w27, [x20]
 	.loc 4 301 0
@@ -5408,19 +5248,19 @@ FtlLoadFactoryBbt:
 	.loc 4 291 0
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.LVL614:
-.L359:
+.LVL591:
+.L349:
 	.loc 4 291 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x28]
 	sub	w1, w0, #15
 	cmp	w1, w19
-	bgt	.L361
+	bgt	.L351
 	.loc 4 292 0 is_stmt 1
 	madd	w0, w0, w21, w19
 	.loc 4 294 0
 	mov	w2, 1
 	str	w3, [x29, 108]
-.LVL615:
+.LVL592:
 	mov	w1, w2
 	.loc 4 292 0
 	lsl	w0, w0, 10
@@ -5429,31 +5269,31 @@ FtlLoadFactoryBbt:
 	.loc 4 294 0
 	mov	x0, x24
 	bl	FlashReadPages
-.LVL616:
+.LVL593:
 	.loc 4 295 0
 	ldr	w0, [x24]
 	ldr	w3, [x29, 108]
 	cmn	w0, #1
-	beq	.L360
+	beq	.L350
 	.loc 4 301 0
 	ldrh	w0, [x25]
 	cmp	w0, w3
-	bne	.L360
+	bne	.L350
 	.loc 4 303 0
 	strh	w19, [x20]
-.L361:
+.L351:
 	.loc 4 289 0 discriminator 2
 	add	w21, w21, 1
-.LVL617:
+.LVL594:
 	add	x20, x20, 2
-	b	.L358
-.L360:
+	b	.L348
+.L350:
 	.loc 4 291 0 discriminator 2
 	sub	w19, w19, #1
-.LVL618:
+.LVL595:
 	and	w19, w19, 65535
-.LVL619:
-	b	.L359
+.LVL596:
+	b	.L349
 	.cfi_endproc
 .LFE230:
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
@@ -5465,7 +5305,7 @@ FtlGetLastWrittenPage:
 .LFB236:
 	.loc 2 47 0
 	.cfi_startproc
-.LVL620:
+.LVL597:
 	stp	x29, x30, [sp, -160]!
 	.cfi_def_cfa_offset 160
 	.cfi_offset 29, -160
@@ -5486,16 +5326,16 @@ FtlGetLastWrittenPage:
 	.cfi_offset 21, -128
 	.cfi_offset 22, -120
 	.loc 2 51 0
-	bne	.L369
+	bne	.L359
 	.loc 2 51 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR20
-.LVL621:
+.LVL598:
 	ldrh	w19, [x1, #:lo12:.LANCHOR20]
-.L370:
-.LVL622:
+.L360:
+.LVL599:
 	.loc 2 56 0 is_stmt 1 discriminator 4
 	sub	w19, w19, #1
-.LVL623:
+.LVL600:
 	.loc 2 53 0 discriminator 4
 	adrp	x1, ftl_temp_buf
 	.loc 2 56 0 discriminator 4
@@ -5508,7 +5348,7 @@ FtlGetLastWrittenPage:
 	str	x1, [x29, 72]
 	.loc 2 57 0 discriminator 4
 	orr	w0, w19, w21
-.LVL624:
+.LVL601:
 	.loc 2 54 0 discriminator 4
 	add	x1, x29, 96
 	.loc 2 57 0 discriminator 4
@@ -5517,33 +5357,33 @@ FtlGetLastWrittenPage:
 	mov	w2, w23
 	.loc 2 54 0 discriminator 4
 	str	x1, [x29, 80]
-.LVL625:
+.LVL602:
 	.loc 2 58 0 discriminator 4
 	add	x0, x29, 64
 	mov	w1, 1
 	bl	FlashReadPages
-.LVL626:
+.LVL603:
 	.loc 2 59 0 discriminator 4
 	ldr	w0, [x29, 96]
 	cmn	w0, #1
-	bne	.L371
+	bne	.L361
 	mov	w22, 0
 	.loc 2 61 0
 	mov	w24, 2
-.LVL627:
-.L372:
+.LVL604:
+.L362:
 	.loc 2 60 0
 	cmp	w22, w19
-	ble	.L375
-.LVL628:
-.L371:
+	ble	.L365
+.LVL605:
+.L361:
 	.loc 2 73 0
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
-.LVL629:
+.LVL606:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL630:
+.LVL607:
 	ldp	x29, x30, [sp], 160
 	.cfi_remember_state
 	.cfi_restore 30
@@ -5556,16 +5396,16 @@ FtlGetLastWrittenPage:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL631:
-.L369:
+.LVL608:
+.L359:
 	.cfi_restore_state
 	.loc 2 51 0 discriminator 2
 	adrp	x1, .LANCHOR19
-.LVL632:
+.LVL609:
 	ldrh	w19, [x1, #:lo12:.LANCHOR19]
-	b	.L370
-.LVL633:
-.L375:
+	b	.L360
+.LVL610:
+.L365:
 	.loc 2 61 0
 	add	w20, w22, w19
 	.loc 2 63 0
@@ -5573,7 +5413,7 @@ FtlGetLastWrittenPage:
 	mov	w1, 1
 	.loc 2 61 0
 	sdiv	w20, w20, w24
-.LVL634:
+.LVL611:
 	.loc 2 62 0
 	sxth	w0, w20
 	orr	w0, w0, w21
@@ -5581,28 +5421,28 @@ FtlGetLastWrittenPage:
 	.loc 2 63 0
 	add	x0, x29, 64
 	bl	FlashReadPages
-.LVL635:
+.LVL612:
 	.loc 2 65 0
 	ldr	w0, [x29, 96]
 	cmn	w0, #1
-	bne	.L373
+	bne	.L363
 	.loc 2 65 0 is_stmt 0 discriminator 1
 	ldr	w0, [x29, 100]
 	cmn	w0, #1
-	bne	.L373
+	bne	.L363
 	.loc 2 66 0 is_stmt 1
 	sub	w19, w20, #1
-.LVL636:
+.LVL613:
 	sxth	w19, w19
-.LVL637:
-	b	.L372
-.L373:
+.LVL614:
+	b	.L362
+.L363:
 	.loc 2 68 0
 	add	w20, w20, 1
-.LVL638:
+.LVL615:
 	sxth	w22, w20
-.LVL639:
-	b	.L372
+.LVL616:
+	b	.L362
 	.cfi_endproc
 .LFE236:
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
@@ -5614,13 +5454,13 @@ FlashProgPages:
 .LFB342:
 	.loc 1 115 0
 	.cfi_startproc
-.LVL640:
+.LVL617:
 	stp	x29, x30, [sp, -144]!
 	.cfi_def_cfa_offset 144
 	.cfi_offset 29, -144
 	.cfi_offset 30, -136
 	ubfiz	x1, x1, 5, 32
-.LVL641:
+.LVL618:
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x25, x26, [sp, 64]
@@ -5630,9 +5470,9 @@ FlashProgPages:
 	mov	w26, w3
 	.loc 1 117 0
 	adrp	x2, .LANCHOR0
-.LVL642:
+.LVL619:
 	add	x3, x2, :lo12:.LANCHOR0
-.LVL643:
+.LVL620:
 	.loc 1 115 0
 	stp	x27, x28, [sp, 80]
 	stp	x19, x20, [sp, 16]
@@ -5646,41 +5486,41 @@ FlashProgPages:
 	mov	x19, x0
 	.loc 1 117 0
 	ldrh	w27, [x3, 12]
-.LVL644:
+.LVL621:
 	.cfi_offset 21, -112
 	.cfi_offset 22, -104
 	.loc 1 122 0
-	adrp	x21, .LANCHOR110
+	adrp	x21, .LANCHOR109
 	.loc 1 115 0
 	stp	x23, x24, [sp, 48]
 	.cfi_offset 23, -96
 	.cfi_offset 24, -88
 	.loc 1 124 0
-	adrp	x22, .LANCHOR107
+	adrp	x22, .LANCHOR105
 	add	x24, x0, x1
 	mov	x23, x2
 	.loc 1 122 0
-	add	x21, x21, :lo12:.LANCHOR110
+	add	x21, x21, :lo12:.LANCHOR109
 	.loc 1 133 0
-	add	x28, x22, :lo12:.LANCHOR107
-.LVL645:
-.L378:
+	add	x28, x22, :lo12:.LANCHOR105
+.LVL622:
+.L368:
 	.loc 1 121 0 discriminator 1
 	cmp	x19, x24
-	bne	.L386
+	bne	.L376
 	.loc 1 142 0
-	cbnz	w26, .L387
-.LVL646:
-.L405:
+	cbnz	w26, .L377
+.LVL623:
+.L395:
 	.loc 1 172 0
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-.LVL647:
+.LVL624:
 	ldp	x27, x28, [sp, 80]
-.LVL648:
+.LVL625:
 	ldp	x29, x30, [sp], 144
 	.cfi_remember_state
 	.cfi_restore 30
@@ -5697,49 +5537,49 @@ FlashProgPages:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL649:
-.L386:
+.LVL626:
+.L376:
 	.cfi_restore_state
 	.loc 1 122 0
 	ldr	x0, [x19, 8]
-	cbz	x0, .L379
+	cbz	x0, .L369
 	.loc 1 122 0 is_stmt 0 discriminator 2
 	ldr	x0, [x19, 16]
-	cbnz	x0, .L380
-.L379:
+	cbnz	x0, .L370
+.L369:
 	.loc 1 122 0 discriminator 3
 	adrp	x0, .LC1
 	mov	w2, 122
 	mov	x1, x21
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL650:
-.L380:
+.LVL627:
+.L370:
 	.loc 1 123 0 is_stmt 1
 	ldr	w0, [x19, 4]
 	add	x2, x29, 104
 	add	x1, x29, 108
 	bl	l2p_addr_tran.isra.0
-.LVL651:
+.LVL628:
 	.loc 1 124 0
-	add	x0, x22, :lo12:.LANCHOR107
+	add	x0, x22, :lo12:.LANCHOR105
 	ldr	w1, [x29, 108]
 	ldp	x2, x3, [x19, 8]
 	ldr	x4, [x0, 16]
 	ldrb	w0, [x29, 104]
 	blr	x4
-.LVL652:
+.LVL629:
 	.loc 1 129 0
-	cbnz	w0, .L381
+	cbnz	w0, .L371
 	.loc 1 128 0
 	str	wzr, [x19]
-.LVL653:
-.L382:
+.LVL630:
+.L372:
 	.loc 1 132 0
 	add	x0, x23, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
-	bne	.L384
+	bne	.L374
 	.loc 1 133 0
 	ldrb	w0, [x29, 104]
 	ldr	x4, [x28, 16]
@@ -5749,26 +5589,26 @@ FlashProgPages:
 	add	x2, x2, 2048
 	add	w1, w27, w1
 	blr	x4
-.LVL654:
+.LVL631:
 	.loc 1 137 0
-	cbz	w0, .L384
+	cbz	w0, .L374
 	.loc 1 138 0
 	mov	w0, -1
-.LVL655:
+.LVL632:
 	str	w0, [x19]
-.L384:
+.L374:
 	add	x19, x19, 32
-	b	.L378
-.LVL656:
-.L381:
+	b	.L368
+.LVL633:
+.L371:
 	.loc 1 130 0
 	mov	w0, -1
-.LVL657:
+.LVL634:
 	str	w0, [x19]
-	b	.L382
-.LVL658:
-.L391:
-.LBB219:
+	b	.L372
+.LVL635:
+.L381:
+.LBB231:
 	.loc 1 147 0
 	str	wzr, [x22]
 	.loc 1 153 0
@@ -5785,76 +5625,76 @@ FlashProgPages:
 	.loc 1 153 0
 	add	x0, x29, 112
 	bl	FlashReadPages
-.LVL659:
+.LVL636:
 	.loc 1 154 0
 	ldr	w26, [x29, 112]
 	cmn	w26, #1
-	bne	.L388
+	bne	.L378
 	.loc 1 155 0
 	ldr	w1, [x20, 4]
 	adrp	x0, .LC79
 	add	x0, x0, :lo12:.LC79
 	bl	printf
-.LVL660:
+.LVL637:
 	.loc 1 156 0
 	str	w26, [x20]
-.L388:
+.L378:
 	.loc 1 158 0
 	ldr	x0, [x20, 16]
-	cbz	x0, .L389
+	cbz	x0, .L379
 	.loc 1 159 0
-	ldr	w3, [x23, #:lo12:.LANCHOR111]
+	ldr	w3, [x23, #:lo12:.LANCHOR110]
 	ldr	w2, [x0]
 	cmp	w2, w3
-	beq	.L389
+	beq	.L379
 	.loc 1 160 0
 	ldr	w1, [x20, 4]
 	adrp	x0, .LC80
 	add	x0, x0, :lo12:.LC80
 	bl	printf
-.LVL661:
+.LVL638:
 	.loc 1 161 0
 	mov	w0, -1
 	str	w0, [x20]
-.L389:
+.L379:
 	.loc 1 164 0
 	ldr	x0, [x20, 8]
-	cbz	x0, .L390
+	cbz	x0, .L380
 	.loc 1 165 0
 	ldr	w3, [x21, #:lo12:check_buf]
 	ldr	w2, [x0]
 	cmp	w2, w3
-	beq	.L390
+	beq	.L380
 	.loc 1 166 0
 	ldr	w1, [x20, 4]
 	adrp	x0, .LC81
 	add	x0, x0, :lo12:.LC81
 	bl	printf
-.LVL662:
+.LVL639:
 	.loc 1 167 0
 	mov	w0, -1
 	str	w0, [x20]
-.L390:
+.L380:
 	add	x20, x20, 32
-.L406:
-.LBE219:
+.L396:
+.LBE231:
 	.loc 1 144 0 discriminator 1
 	cmp	x20, x19
-	bne	.L391
-	b	.L405
-.LVL663:
-.L387:
-.LBB220:
+	bne	.L381
+	b	.L395
+.LVL640:
+.L377:
+.LBB232:
 	.loc 1 147 0 discriminator 1
 	adrp	x21, check_buf
 	.loc 1 148 0 discriminator 1
-	adrp	x23, .LANCHOR111
+	adrp	x23, .LANCHOR110
 	.loc 1 147 0 discriminator 1
 	add	x22, x21, :lo12:check_buf
 	.loc 1 148 0 discriminator 1
-	add	x24, x23, :lo12:.LANCHOR111
-	b	.L406
-.LBE220:
+	add	x24, x23, :lo12:.LANCHOR110
+	b	.L396
+.LBE232:
 	.cfi_endproc
 .LFE342:
 	.size	FlashProgPages, .-FlashProgPages
@@ -5866,17 +5706,17 @@ FlashEraseBlocks:
 .LFB343:
 	.loc 1 175 0
 	.cfi_startproc
-.LVL664:
+.LVL641:
 	stp	x29, x30, [sp, -80]!
 	.cfi_def_cfa_offset 80
 	.cfi_offset 29, -80
 	.cfi_offset 30, -72
 	.loc 1 178 0
 	adrp	x1, .LANCHOR0
-.LVL665:
+.LVL642:
 	add	x3, x1, :lo12:.LANCHOR0
 	ubfiz	x2, x2, 5, 32
-.LVL666:
+.LVL643:
 	.loc 1 175 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
@@ -5886,7 +5726,7 @@ FlashEraseBlocks:
 	.cfi_offset 24, -24
 	.loc 1 178 0
 	ldrh	w23, [x3, 12]
-.LVL667:
+.LVL644:
 	.loc 1 175 0
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -64
@@ -5897,21 +5737,21 @@ FlashEraseBlocks:
 	.cfi_offset 22, -40
 	mov	x20, x1
 	.loc 1 183 0
-	adrp	x21, .LANCHOR107
+	adrp	x21, .LANCHOR105
 	add	x22, x0, x2
 	.loc 1 188 0
-	add	x24, x21, :lo12:.LANCHOR107
-.LVL668:
-.L409:
+	add	x24, x21, :lo12:.LANCHOR105
+.LVL645:
+.L399:
 	.loc 1 181 0 discriminator 1
 	cmp	x19, x22
-	bne	.L415
+	bne	.L405
 	.loc 1 194 0
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL669:
+.LVL646:
 	ldp	x29, x30, [sp], 80
 	.cfi_remember_state
 	.cfi_restore 30
@@ -5924,56 +5764,56 @@ FlashEraseBlocks:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL670:
-.L415:
+.LVL647:
+.L405:
 	.cfi_restore_state
 	.loc 1 182 0
 	ldr	w0, [x19]
 	add	x2, x29, 72
 	add	x1, x29, 76
 	bl	l2p_addr_tran.isra.0
-.LVL671:
+.LVL648:
 	.loc 1 183 0
-	add	x0, x21, :lo12:.LANCHOR107
+	add	x0, x21, :lo12:.LANCHOR105
 	ldr	w1, [x29, 76]
 	ldr	x2, [x0, 8]
 	ldrb	w0, [x29, 72]
 	blr	x2
-.LVL672:
+.LVL649:
 	.loc 1 185 0
-	cbnz	w0, .L410
+	cbnz	w0, .L400
 	.loc 1 184 0
 	str	wzr, [x19, -4]
-.LVL673:
-.L411:
+.LVL650:
+.L401:
 	.loc 1 187 0
 	add	x0, x20, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
-	bne	.L413
+	bne	.L403
 	.loc 1 188 0
 	ldrb	w0, [x29, 72]
 	ldr	x2, [x24, 8]
 	ldr	w1, [x29, 76]
 	add	w1, w23, w1
 	blr	x2
-.LVL674:
+.LVL651:
 	.loc 1 189 0
-	cbz	w0, .L413
+	cbz	w0, .L403
 	.loc 1 190 0
 	mov	w0, -1
-.LVL675:
+.LVL652:
 	str	w0, [x19, -4]
-.L413:
+.L403:
 	add	x19, x19, 32
-	b	.L409
-.LVL676:
-.L410:
+	b	.L399
+.LVL653:
+.L400:
 	.loc 1 186 0
 	mov	w0, -1
-.LVL677:
+.LVL654:
 	str	w0, [x19, -4]
-	b	.L411
+	b	.L401
 	.cfi_endproc
 .LFE343:
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
@@ -5985,94 +5825,100 @@ FtlFreeSysBlkQueueIn:
 .LFB240:
 	.loc 2 98 0
 	.cfi_startproc
-.LVL678:
+.LVL655:
 	stp	x29, x30, [sp, -48]!
 	.cfi_def_cfa_offset 48
 	.cfi_offset 29, -48
 	.cfi_offset 30, -40
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	and	w20, w0, 65535
 	str	x21, [sp, 32]
 	.cfi_offset 21, -16
-	and	w21, w0, 65535
-.LBB221:
-.LBB222:
+	.loc 2 99 0
+	sub	w2, w20, #1
+	mov	w0, 65533
+.LVL656:
+	cmp	w0, w2, uxth
+	bcc	.L410
+.LBB241:
+.LBB242:
 	.loc 2 94 0
 	adrp	x0, .LANCHOR38
-.LVL679:
 	add	x2, x0, :lo12:.LANCHOR38
-.LBE222:
-.LBE221:
-	.loc 2 98 0
-	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
-	.loc 2 99 0
+	mov	x19, x0
+.LBE242:
+.LBE241:
+	.loc 2 101 0
 	ldrh	w2, [x2, 6]
 	cmp	w2, 1024
-	beq	.L420
+	beq	.L410
 	and	w1, w1, 65535
-	mov	x19, x0
-.LVL680:
-.LBB223:
-	.loc 2 101 0
-	cbz	w1, .L422
-.LBB224:
-	.loc 2 102 0
-	mov	w0, w21
-	bl	P2V_block_in_plane
-.LVL681:
-	and	w20, w0, 65535
-.LVL682:
+.LVL657:
+.LBB243:
+.LBB244:
 	.loc 2 103 0
-	adrp	x0, .LANCHOR112
-.LVL683:
-	lsl	w1, w21, 10
+	cbz	w1, .L412
+.LBB245:
 	.loc 2 104 0
+	mov	w0, w20
+	bl	P2V_block_in_plane
+.LVL658:
+	and	w21, w0, 65535
+.LVL659:
+	.loc 2 105 0
+	adrp	x0, .LANCHOR111
+.LVL660:
+	lsl	w1, w20, 10
+	.loc 2 106 0
 	mov	w2, 1
-	.loc 2 103 0
-	ldr	x0, [x0, #:lo12:.LANCHOR112]
+	.loc 2 105 0
+	ldr	x0, [x0, #:lo12:.LANCHOR111]
 	str	w1, [x0, 4]
-	.loc 2 104 0
+	.loc 2 106 0
 	mov	w1, w2
 	bl	FlashEraseBlocks
-.LVL684:
-	.loc 2 105 0
-	adrp	x1, .LANCHOR40
-	ubfiz	x0, x20, 1, 16
-	ldr	x2, [x1, #:lo12:.LANCHOR40]
+.LVL661:
+	.loc 2 107 0
+	adrp	x1, .LANCHOR43
+	ubfiz	x0, x21, 1, 16
+	ldr	x2, [x1, #:lo12:.LANCHOR43]
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-	.loc 2 106 0
-	adrp	x1, .LANCHOR76
-	ldr	w0, [x1, #:lo12:.LANCHOR76]
-	add	w0, w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR76]
-.LVL685:
-.L422:
-.LBE224:
 	.loc 2 108 0
+	adrp	x1, .LANCHOR75
+	ldr	w0, [x1, #:lo12:.LANCHOR75]
+	add	w0, w0, 1
+	str	w0, [x1, #:lo12:.LANCHOR75]
+.LVL662:
+.L412:
+.LBE245:
+	.loc 2 110 0
 	add	x0, x19, :lo12:.LANCHOR38
 	ldrh	w1, [x0, 6]
 	add	w1, w1, 1
 	strh	w1, [x0, 6]
-	.loc 2 109 0
+	.loc 2 111 0
 	ldrh	w1, [x0, 4]
 	add	x2, x0, x1, sxtw 1
-	.loc 2 110 0
+	.loc 2 112 0
 	add	w1, w1, 1
 	and	w1, w1, 1023
 	strh	w1, [x0, 4]
-	.loc 2 109 0
-	strh	w21, [x2, 8]
-.LVL686:
-.L420:
-.LBE223:
-	.loc 2 113 0
+	.loc 2 111 0
+	strh	w20, [x2, 8]
+.LVL663:
+.L410:
+.LBE244:
+.LBE243:
+	.loc 2 115 0
 	ldp	x19, x20, [sp, 16]
+.LVL664:
 	ldr	x21, [sp, 32]
-.LVL687:
 	ldp	x29, x30, [sp], 48
 	.cfi_restore 30
 	.cfi_restore 29
@@ -6092,7 +5938,7 @@ FtlLowFormatEraseBlock:
 .LFB209:
 	.loc 3 528 0
 	.cfi_startproc
-.LVL688:
+.LVL665:
 	stp	x29, x30, [sp, -144]!
 	.cfi_def_cfa_offset 144
 	.cfi_offset 29, -144
@@ -6110,20 +5956,20 @@ FtlLowFormatEraseBlock:
 	.cfi_offset 24, -88
 	and	w24, w0, 65535
 	.loc 3 538 0
-	adrp	x0, .LANCHOR113
-.LVL689:
+	adrp	x0, .LANCHOR112
+.LVL666:
 	.loc 3 528 0
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	and	w23, w1, 255
 	.loc 3 538 0
-	str	w24, [x0, #:lo12:.LANCHOR113]
-.LVL690:
+	str	w24, [x0, #:lo12:.LANCHOR112]
+.LVL667:
 	.loc 3 551 0
-	adrp	x0, .LANCHOR115
+	adrp	x0, .LANCHOR114
 	.loc 3 550 0
-	adrp	x1, .LANCHOR114
-.LVL691:
+	adrp	x1, .LANCHOR113
+.LVL668:
 	.cfi_offset 19, -128
 	.cfi_offset 20, -120
 	.cfi_offset 21, -112
@@ -6131,18 +5977,18 @@ FtlLowFormatEraseBlock:
 	.loc 3 539 0
 	adrp	x20, .LANCHOR3
 	.loc 3 540 0
-	adrp	x21, .LANCHOR112
+	adrp	x21, .LANCHOR111
 	.loc 3 551 0
-	ldr	x11, [x0, #:lo12:.LANCHOR115]
+	ldr	x11, [x0, #:lo12:.LANCHOR114]
 	adrp	x0, .LANCHOR24
 	.loc 3 539 0
 	ldrh	w8, [x20, #:lo12:.LANCHOR3]
 	.loc 3 540 0
-	ldr	x6, [x21, #:lo12:.LANCHOR112]
+	ldr	x6, [x21, #:lo12:.LANCHOR111]
 	.loc 3 536 0
 	mov	w22, 0
 	.loc 3 550 0
-	ldr	x10, [x1, #:lo12:.LANCHOR114]
+	ldr	x10, [x1, #:lo12:.LANCHOR113]
 	.loc 3 537 0
 	mov	w19, 0
 	.loc 3 551 0
@@ -6155,59 +6001,59 @@ FtlLowFormatEraseBlock:
 	.cfi_offset 27, -64
 	.cfi_offset 28, -56
 	stp	x0, x1, [x29, 120]
-.LVL692:
-.L431:
+.LVL669:
+.L421:
 	.loc 3 539 0 discriminator 1
 	cmp	w8, w5, uxth
-	bhi	.L435
+	bhi	.L425
 	.loc 3 559 0
-	cbz	w22, .L430
+	cbz	w22, .L420
 	.loc 3 562 0
 	mov	w2, w22
 	ubfiz	x22, x22, 5, 16
-.LVL693:
+.LVL670:
 	mov	x25, 0
 	mov	w1, 0
 	mov	x0, x6
 	bl	FlashEraseBlocks
-.LVL694:
-.L439:
+.LVL671:
+.L429:
 	.loc 3 564 0
-	ldr	x0, [x21, #:lo12:.LANCHOR112]
+	ldr	x0, [x21, #:lo12:.LANCHOR111]
 	add	x1, x0, x25
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	bne	.L438
+	bne	.L428
 	.loc 3 566 0
 	ldr	w0, [x1, 4]
 	.loc 3 565 0
 	add	w19, w19, 1
-.LVL695:
+.LVL672:
 	and	w19, w19, 65535
-.LVL696:
+.LVL673:
 	.loc 3 566 0
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.LVL697:
-.L438:
+.LVL674:
+.L428:
 	add	x25, x25, 32
 	.loc 3 563 0 discriminator 2
 	cmp	x25, x22
-	bne	.L439
+	bne	.L429
 	.loc 3 571 0
-	cbz	w23, .L452
-.LVL698:
+	cbz	w23, .L442
+.LVL675:
 	.loc 3 573 0
 	adrp	x0, .LANCHOR20
 	.loc 3 572 0
 	mov	w25, 1
 	.loc 3 573 0
 	ldrh	w26, [x0, #:lo12:.LANCHOR20]
-.LVL699:
+.LVL676:
 	.loc 3 574 0
 	lsr	w28, w26, 2
-.LVL700:
-.L440:
+.LVL677:
+.L430:
 	.loc 3 578 0
 	add	x0, x20, :lo12:.LANCHOR3
 	.loc 3 580 0
@@ -6218,113 +6064,113 @@ FtlLowFormatEraseBlock:
 	.loc 3 580 0
 	add	x0, x27, :lo12:.LANCHOR13
 	str	x0, [x29, 112]
-.LVL701:
-.L448:
+.LVL678:
+.L438:
 	.loc 3 578 0
 	ldr	x0, [x29, 136]
 	mov	x5, 0
 	.loc 3 579 0
-	ldr	x6, [x21, #:lo12:.LANCHOR112]
+	ldr	x6, [x21, #:lo12:.LANCHOR111]
 	.loc 3 577 0
 	mov	w20, 0
 	.loc 3 578 0
 	ldrh	w7, [x0]
 	.loc 3 587 0
-	adrp	x0, .LANCHOR116
-	ldr	x8, [x0, #:lo12:.LANCHOR116]
+	adrp	x0, .LANCHOR115
+	ldr	x8, [x0, #:lo12:.LANCHOR115]
 	.loc 3 588 0
 	ldr	x0, [x29, 128]
-	ldr	x10, [x0, #:lo12:.LANCHOR114]
+	ldr	x10, [x0, #:lo12:.LANCHOR113]
 	ldr	x0, [x29, 120]
 	ldrh	w11, [x0, #:lo12:.LANCHOR24]
-.LVL702:
-.L441:
+.LVL679:
+.L431:
 	.loc 3 578 0 discriminator 1
 	cmp	w7, w5, uxth
-	bhi	.L444
+	bhi	.L434
 	.loc 3 593 0
-	cbz	w20, .L430
+	cbz	w20, .L420
 	.loc 3 596 0
 	mov	w1, w20
 	mov	w3, 1
 	mov	w2, w25
 	mov	x0, x6
 	bl	FlashProgPages
-.LVL703:
+.LVL680:
 	mov	x27, 0
 	ubfiz	x1, x20, 5, 16
-.LVL704:
-.L447:
+.LVL681:
+.L437:
 	.loc 3 598 0
-	ldr	x0, [x21, #:lo12:.LANCHOR112]
+	ldr	x0, [x21, #:lo12:.LANCHOR111]
 	add	x3, x0, x27
 	ldr	w0, [x0, x27]
-	cbz	w0, .L446
+	cbz	w0, .L436
 	.loc 3 600 0
 	ldr	w0, [x3, 4]
 	.loc 3 599 0
 	add	w19, w19, 1
-.LVL705:
+.LVL682:
 	str	x1, [x29, 104]
 	and	w19, w19, 65535
-.LVL706:
+.LVL683:
 	.loc 3 600 0
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.LVL707:
+.LVL684:
 	ldr	x1, [x29, 104]
-.L446:
+.L436:
 	add	x27, x27, 32
 	.loc 3 597 0 discriminator 2
 	cmp	x1, x27
-	bne	.L447
+	bne	.L437
 	.loc 3 604 0
 	add	w22, w22, w28
-.LVL708:
+.LVL685:
 	and	w22, w22, 65535
-.LVL709:
+.LVL686:
 	.loc 3 605 0
 	cmp	w26, w22
-	bhi	.L448
+	bhi	.L438
 	mov	x22, 0
-.LVL710:
-.L450:
+.LVL687:
+.L440:
 	.loc 3 611 0
-	cbz	w23, .L449
+	cbz	w23, .L439
 	.loc 3 611 0 is_stmt 0 discriminator 1
-	ldr	x0, [x21, #:lo12:.LANCHOR112]
+	ldr	x0, [x21, #:lo12:.LANCHOR111]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
-	cbnz	w0, .L449
+	cbnz	w0, .L439
 	.loc 3 612 0 is_stmt 1
 	ldr	w0, [x1, 4]
 	mov	w1, 1
 	lsr	w0, w0, 10
 	bl	FtlFreeSysBlkQueueIn
-.LVL711:
-.L449:
+.LVL688:
+.L439:
 	add	x22, x22, 32
 	.loc 3 610 0 discriminator 2
 	cmp	x22, x27
-	bne	.L450
+	bne	.L440
 	.loc 3 615 0
 	cmp	w24, 63
 	ccmp	w23, 0, 0, hi
-	beq	.L430
+	beq	.L420
 	.loc 3 616 0
-	ldr	x0, [x21, #:lo12:.LANCHOR112]
+	ldr	x0, [x21, #:lo12:.LANCHOR111]
 	mov	w2, w20
 	mov	w1, w25
 	bl	FlashEraseBlocks
-.LVL712:
-.L430:
+.LVL689:
+.L420:
 	.loc 3 619 0
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
-.LVL713:
+.LVL690:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL714:
+.LVL691:
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
@@ -6343,8 +6189,8 @@ FtlLowFormatEraseBlock:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL715:
-.L435:
+.LVL692:
+.L425:
 	.cfi_restore_state
 	.loc 3 540 0
 	lsl	x0, x5, 5
@@ -6355,22 +6201,22 @@ FtlLowFormatEraseBlock:
 	.loc 3 541 0
 	ldrb	w0, [x7, x5]
 	bl	V2P_block
-.LVL716:
+.LVL693:
 	and	w13, w0, 65535
 	mov	w14, w13
-.LVL717:
+.LVL694:
 	.loc 3 543 0
-	cbz	w23, .L432
+	cbz	w23, .L422
 	.loc 3 544 0
 	bl	IsBlkInVendorPart
-.LVL718:
-	cbnz	w0, .L433
-.L432:
+.LVL695:
+	cbnz	w0, .L423
+.L422:
 	.loc 3 548 0
 	mov	w0, w14
 	bl	FtlBbmIsBadBlock
-.LVL719:
-	cbnz	w0, .L434
+.LVL696:
+	cbnz	w0, .L424
 	.loc 3 549 0
 	ubfiz	x0, x22, 5, 16
 	.loc 3 551 0
@@ -6379,12 +6225,12 @@ FtlLowFormatEraseBlock:
 	add	x0, x6, x0
 	.loc 3 552 0
 	add	w22, w22, 1
-.LVL720:
+.LVL697:
 	and	w22, w22, 65535
-.LVL721:
+.LVL698:
 	.loc 3 549 0
 	lsl	w13, w13, 10
-.LVL722:
+.LVL699:
 	.loc 3 551 0
 	asr	w1, w1, 2
 	add	x1, x11, x1, sxtw 2
@@ -6392,30 +6238,30 @@ FtlLowFormatEraseBlock:
 	str	w13, [x0, 4]
 	.loc 3 551 0
 	stp	x10, x1, [x0, 8]
-.L433:
-.LVL723:
+.L423:
+.LVL700:
 	add	x5, x5, 1
-.LVL724:
-	b	.L431
-.LVL725:
-.L434:
+.LVL701:
+	b	.L421
+.LVL702:
+.L424:
 	.loc 3 554 0
 	add	w19, w19, 1
-.LVL726:
+.LVL703:
 	and	w19, w19, 65535
-.LVL727:
-	b	.L433
-.LVL728:
-.L452:
+.LVL704:
+	b	.L423
+.LVL705:
+.L442:
 	.loc 3 534 0
 	mov	w25, 0
 	.loc 3 533 0
 	mov	w28, 6
 	.loc 3 531 0
 	mov	w26, 1
-	b	.L440
-.LVL729:
-.L444:
+	b	.L430
+.LVL706:
+.L434:
 	.loc 3 579 0
 	lsl	x0, x5, 5
 	.loc 3 580 0
@@ -6426,22 +6272,22 @@ FtlLowFormatEraseBlock:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0, x5]
 	bl	V2P_block
-.LVL730:
+.LVL707:
 	and	w12, w0, 65535
 	mov	w13, w12
-.LVL731:
+.LVL708:
 	.loc 3 581 0
-	cbz	w23, .L442
+	cbz	w23, .L432
 	.loc 3 582 0
 	bl	IsBlkInVendorPart
-.LVL732:
-	cbnz	w0, .L443
-.L442:
+.LVL709:
+	cbnz	w0, .L433
+.L432:
 	.loc 3 585 0
 	mov	w0, w13
 	bl	FtlBbmIsBadBlock
-.LVL733:
-	cbnz	w0, .L443
+.LVL710:
+	cbnz	w0, .L433
 	.loc 3 586 0
 	ubfiz	x0, x20, 5, 16
 	.loc 3 588 0
@@ -6450,12 +6296,12 @@ FtlLowFormatEraseBlock:
 	add	x0, x6, x0
 	.loc 3 589 0
 	add	w20, w20, 1
-.LVL734:
+.LVL711:
 	and	w20, w20, 65535
-.LVL735:
+.LVL712:
 	.loc 3 586 0
 	add	w12, w22, w12, lsl 10
-.LVL736:
+.LVL713:
 	.loc 3 588 0
 	asr	w1, w1, 2
 	add	x1, x10, x1, sxtw 2
@@ -6463,14 +6309,284 @@ FtlLowFormatEraseBlock:
 	str	w12, [x0, 4]
 	.loc 3 588 0
 	stp	x8, x1, [x0, 8]
-.L443:
-.LVL737:
+.L433:
+.LVL714:
 	add	x5, x5, 1
-.LVL738:
-	b	.L441
+.LVL715:
+	b	.L431
 	.cfi_endproc
 .LFE209:
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
+	.section	.text.FtlFreeSysBlkQueueOut,"ax",@progbits
+	.align	2
+	.global	FtlFreeSysBlkQueueOut
+	.type	FtlFreeSysBlkQueueOut, %function
+FtlFreeSysBlkQueueOut:
+.LFB243:
+	.loc 2 181 0
+	.cfi_startproc
+.LVL716:
+	stp	x29, x30, [sp, -64]!
+	.cfi_def_cfa_offset 64
+	.cfi_offset 29, -64
+	.cfi_offset 30, -56
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -48
+	.cfi_offset 20, -40
+.LBB246:
+.LBB247:
+	.loc 2 89 0
+	adrp	x19, .LANCHOR38
+.LBE247:
+.LBE246:
+	.loc 2 181 0
+	stp	x21, x22, [sp, 32]
+.LBB250:
+.LBB248:
+	.loc 2 89 0
+	add	x19, x19, :lo12:.LANCHOR38
+	.cfi_offset 21, -32
+	.cfi_offset 22, -24
+.LBE248:
+.LBE250:
+.LBB251:
+	.loc 2 195 0
+	adrp	x21, .LANCHOR75
+.LBE251:
+	.loc 2 181 0
+	str	x23, [sp, 48]
+	.cfi_offset 23, -16
+.LBB252:
+	.loc 2 195 0
+	add	x21, x21, :lo12:.LANCHOR75
+.LBE252:
+	.loc 2 203 0
+	adrp	x23, .LC83
+	add	x23, x23, :lo12:.LC83
+.LVL717:
+.L464:
+.LBB253:
+.LBB249:
+	.loc 2 89 0
+	ldrh	w1, [x19, 6]
+.LBE249:
+.LBE253:
+	.loc 2 186 0
+	cbz	w1, .L465
+	.loc 2 187 0
+	ldrh	w0, [x19, 2]
+	.loc 2 188 0
+	sub	w1, w1, #1
+	strh	w1, [x19, 6]
+	.loc 2 187 0
+	add	x2, x19, x0, sxtw 1
+	.loc 2 189 0
+	add	w0, w0, 1
+	and	w0, w0, 1023
+	strh	w0, [x19, 2]
+	.loc 2 187 0
+	ldrh	w20, [x2, 8]
+.LVL718:
+.LBB254:
+	.loc 2 191 0
+	mov	w0, w20
+	bl	P2V_block_in_plane
+.LVL719:
+	and	w22, w0, 65535
+.LVL720:
+	.loc 2 192 0
+	adrp	x0, .LANCHOR111
+.LVL721:
+	lsl	w1, w20, 10
+	.loc 2 193 0
+	mov	w2, 1
+	.loc 2 192 0
+	ldr	x0, [x0, #:lo12:.LANCHOR111]
+	str	w1, [x0, 4]
+	.loc 2 193 0
+	mov	w1, w2
+	bl	FlashEraseBlocks
+.LVL722:
+	.loc 2 194 0
+	adrp	x1, .LANCHOR43
+	ubfiz	x0, x22, 1, 16
+	ldr	x2, [x1, #:lo12:.LANCHOR43]
+	ldrh	w1, [x2, x0]
+	add	w1, w1, 1
+	strh	w1, [x2, x0]
+	.loc 2 195 0
+	ldr	w0, [x21]
+.LBE254:
+	.loc 2 202 0
+	sub	w1, w20, #1
+.LBB255:
+	.loc 2 195 0
+	add	w0, w0, 1
+	str	w0, [x21]
+.LBE255:
+	.loc 2 202 0
+	mov	w0, 65533
+	cmp	w0, w1, uxth
+	bcc	.L466
+	.loc 2 208 0
+	mov	w0, w20
+	ldr	x23, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+.LVL723:
+	ldp	x21, x22, [sp, 32]
+.LVL724:
+	ldp	x29, x30, [sp], 64
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 23
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL725:
+.L465:
+	.cfi_restore_state
+	.loc 2 199 0
+	adrp	x0, .LC82
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC82
+	bl	printf
+.LVL726:
+.L468:
+	b	.L468
+.LVL727:
+.L466:
+	.loc 2 203 0
+	ldrh	w2, [x19, 6]
+	mov	w1, w20
+	mov	x0, x23
+	bl	printf
+.LVL728:
+	.loc 2 205 0
+	b	.L464
+	.cfi_endproc
+.LFE243:
+	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
+	.section	.text.ftl_map_blk_alloc_new_blk,"ax",@progbits
+	.align	2
+	.global	ftl_map_blk_alloc_new_blk
+	.type	ftl_map_blk_alloc_new_blk, %function
+ftl_map_blk_alloc_new_blk:
+.LFB255:
+	.loc 2 562 0
+	.cfi_startproc
+.LVL729:
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+.LVL730:
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	mov	x19, x0
+	.loc 2 566 0
+	ldrh	w1, [x0, 10]
+	mov	w20, 0
+	ldr	x0, [x0, 16]
+.LVL731:
+	.loc 2 562 0
+	str	x21, [sp, 32]
+	.cfi_offset 21, -16
+.LVL732:
+.L472:
+	.loc 2 566 0 discriminator 1
+	cmp	w20, w1
+	beq	.L476
+	.loc 2 567 0
+	mov	x21, x0
+	ldrh	w2, [x0], 2
+	cbnz	w2, .L473
+	.loc 2 568 0
+	bl	FtlFreeSysBlkQueueOut
+.LVL733:
+	and	w1, w0, 65535
+	strh	w0, [x21]
+	.loc 2 569 0
+	sub	w2, w1, #1
+	mov	w0, 65533
+	cmp	w0, w2, uxth
+	bcs	.L474
+	.loc 2 570 0
+	adrp	x0, .LANCHOR38+6
+	ldrh	w2, [x0, #:lo12:.LANCHOR38+6]
+	adrp	x0, .LC84
+	add	x0, x0, :lo12:.LC84
+	bl	printf
+.LVL734:
+.L475:
+	b	.L475
+.L474:
+	.loc 2 576 0
+	ldr	w0, [x19, 48]
+	.loc 2 574 0
+	strh	wzr, [x19, 2]
+	.loc 2 576 0
+	add	w0, w0, 1
+	str	w0, [x19, 48]
+	.loc 2 577 0
+	ldrh	w0, [x19, 8]
+	.loc 2 575 0
+	strh	w20, [x19]
+	.loc 2 577 0
+	add	w0, w0, 1
+	strh	w0, [x19, 8]
+.L476:
+	.loc 2 581 0
+	ldrh	w0, [x19, 10]
+	cmp	w0, w20
+	bhi	.L478
+.LVL735:
+.LBB258:
+.LBB259:
+	adrp	x1, .LANCHOR116
+	adrp	x0, .LC1
+	mov	w2, 581
+	add	x1, x1, :lo12:.LANCHOR116
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL736:
+.L478:
+.LBE259:
+.LBE258:
+	.loc 2 583 0
+	mov	w0, 0
+	ldr	x21, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+.LVL737:
+	ldp	x29, x30, [sp], 48
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL738:
+.L473:
+	.cfi_restore_state
+	.loc 2 566 0 discriminator 2
+	add	w20, w20, 1
+.LVL739:
+	and	w20, w20, 65535
+.LVL740:
+	b	.L472
+	.cfi_endproc
+.LFE255:
+	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
 	.section	.text.ftl_memset,"ax",@progbits
 	.align	2
 	.global	ftl_memset
@@ -6479,11 +6595,11 @@ ftl_memset:
 .LFB346:
 	.loc 1 242 0
 	.cfi_startproc
-.LVL739:
+.LVL741:
 	.loc 1 243 0
 	uxtw	x2, w2
 	b	memset
-.LVL740:
+.LVL742:
 	.cfi_endproc
 .LFE346:
 	.size	ftl_memset, .-ftl_memset
@@ -6493,552 +6609,552 @@ ftl_memset:
 	.type	FtlMemInit, %function
 FtlMemInit:
 .LFB206:
-	.loc 3 279 0
+	.loc 3 280 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -208]!
 	.cfi_def_cfa_offset 208
 	.cfi_offset 29, -208
 	.cfi_offset 30, -200
-	.loc 3 282 0
-	adrp	x0, .LANCHOR71
-	.loc 3 297 0
+	.loc 3 283 0
+	adrp	x0, .LANCHOR70
+	.loc 3 298 0
 	mov	w1, 65535
-	.loc 3 279 0
+	.loc 3 280 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	.loc 3 282 0
-	str	wzr, [x0, #:lo12:.LANCHOR71]
 	.loc 3 283 0
-	adrp	x0, .LANCHOR72
-	.loc 3 279 0
+	str	wzr, [x0, #:lo12:.LANCHOR70]
+	.loc 3 284 0
+	adrp	x0, .LANCHOR71
+	.loc 3 280 0
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -192
 	.cfi_offset 20, -184
-	.loc 3 310 0
+	.loc 3 311 0
 	adrp	x19, .LANCHOR21
-	.loc 3 283 0
-	str	wzr, [x0, #:lo12:.LANCHOR72]
 	.loc 3 284 0
-	adrp	x0, .LANCHOR68
-	.loc 3 279 0
+	str	wzr, [x0, #:lo12:.LANCHOR71]
+	.loc 3 285 0
+	adrp	x0, .LANCHOR67
+	.loc 3 280 0
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -176
 	.cfi_offset 22, -168
-	.loc 3 312 0
+	.loc 3 313 0
 	adrp	x22, .LANCHOR3
-	.loc 3 284 0
-	str	wzr, [x0, #:lo12:.LANCHOR68]
 	.loc 3 285 0
-	adrp	x0, .LANCHOR65
-	.loc 3 279 0
+	str	wzr, [x0, #:lo12:.LANCHOR67]
+	.loc 3 286 0
+	adrp	x0, .LANCHOR64
+	.loc 3 280 0
 	stp	x23, x24, [sp, 48]
-	.loc 3 319 0
+	.loc 3 320 0
 	adrp	x21, .LANCHOR23
-	.loc 3 285 0
-	str	wzr, [x0, #:lo12:.LANCHOR65]
 	.loc 3 286 0
-	adrp	x0, .LANCHOR64
-	.loc 3 279 0
+	str	wzr, [x0, #:lo12:.LANCHOR64]
+	.loc 3 287 0
+	adrp	x0, .LANCHOR63
+	.loc 3 280 0
 	stp	x25, x26, [sp, 64]
 	.cfi_offset 23, -160
 	.cfi_offset 24, -152
 	.cfi_offset 25, -144
 	.cfi_offset 26, -136
-	.loc 3 330 0
-	adrp	x24, .LANCHOR109
-	.loc 3 286 0
-	str	wzr, [x0, #:lo12:.LANCHOR64]
+	.loc 3 331 0
+	adrp	x24, .LANCHOR108
 	.loc 3 287 0
-	adrp	x0, .LANCHOR66
-	.loc 3 279 0
+	str	wzr, [x0, #:lo12:.LANCHOR63]
+	.loc 3 288 0
+	adrp	x0, .LANCHOR65
+	.loc 3 280 0
 	stp	x27, x28, [sp, 80]
 	.cfi_offset 27, -128
 	.cfi_offset 28, -120
-	.loc 3 331 0
-	adrp	x23, .LANCHOR115
-	.loc 3 287 0
-	str	wzr, [x0, #:lo12:.LANCHOR66]
-	.loc 3 288 0
-	adrp	x0, .LANCHOR67
-	.loc 3 349 0
-	adrp	x25, .LANCHOR43
-	.loc 3 351 0
-	adrp	x27, .LANCHOR129
+	.loc 3 332 0
+	adrp	x23, .LANCHOR114
 	.loc 3 288 0
-	str	wzr, [x0, #:lo12:.LANCHOR67]
+	str	wzr, [x0, #:lo12:.LANCHOR65]
 	.loc 3 289 0
-	adrp	x0, .LANCHOR63
+	adrp	x0, .LANCHOR66
+	.loc 3 350 0
+	adrp	x25, .LANCHOR42
 	.loc 3 352 0
-	adrp	x26, .LANCHOR130
+	adrp	x27, .LANCHOR129
 	.loc 3 289 0
-	str	wzr, [x0, #:lo12:.LANCHOR63]
+	str	wzr, [x0, #:lo12:.LANCHOR66]
 	.loc 3 290 0
-	adrp	x0, .LANCHOR73
-	str	wzr, [x0, #:lo12:.LANCHOR73]
+	adrp	x0, .LANCHOR62
+	.loc 3 353 0
+	adrp	x26, .LANCHOR130
+	.loc 3 290 0
+	str	wzr, [x0, #:lo12:.LANCHOR62]
 	.loc 3 291 0
-	adrp	x0, .LANCHOR74
-	str	wzr, [x0, #:lo12:.LANCHOR74]
+	adrp	x0, .LANCHOR72
+	str	wzr, [x0, #:lo12:.LANCHOR72]
 	.loc 3 292 0
+	adrp	x0, .LANCHOR73
+	str	wzr, [x0, #:lo12:.LANCHOR73]
+	.loc 3 293 0
+	adrp	x0, .LANCHOR75
+	str	wzr, [x0, #:lo12:.LANCHOR75]
+	.loc 3 294 0
 	adrp	x0, .LANCHOR76
 	str	wzr, [x0, #:lo12:.LANCHOR76]
-	.loc 3 293 0
+	.loc 3 295 0
 	adrp	x0, .LANCHOR77
 	str	wzr, [x0, #:lo12:.LANCHOR77]
-	.loc 3 294 0
-	adrp	x0, .LANCHOR78
-	str	wzr, [x0, #:lo12:.LANCHOR78]
-	.loc 3 295 0
+	.loc 3 296 0
 	adrp	x0, .LANCHOR117
 	str	wzr, [x0, #:lo12:.LANCHOR117]
-	.loc 3 296 0
-	adrp	x0, .LANCHOR89
-	str	wzr, [x0, #:lo12:.LANCHOR89]
 	.loc 3 297 0
+	adrp	x0, .LANCHOR87
+	str	wzr, [x0, #:lo12:.LANCHOR87]
+	.loc 3 298 0
 	adrp	x0, .LANCHOR118
 	str	w1, [x0, #:lo12:.LANCHOR118]
-	.loc 3 298 0
+	.loc 3 299 0
 	adrp	x0, .LANCHOR119
-	.loc 3 301 0
-	adrp	x1, .LANCHOR101
-	.loc 3 298 0
-	str	wzr, [x0, #:lo12:.LANCHOR119]
+	.loc 3 302 0
+	adrp	x1, .LANCHOR99
 	.loc 3 299 0
-	adrp	x0, .LANCHOR86
-	str	wzr, [x0, #:lo12:.LANCHOR86]
+	str	wzr, [x0, #:lo12:.LANCHOR119]
 	.loc 3 300 0
-	adrp	x0, .LANCHOR113
-	str	wzr, [x0, #:lo12:.LANCHOR113]
+	adrp	x0, .LANCHOR84
+	str	wzr, [x0, #:lo12:.LANCHOR84]
 	.loc 3 301 0
-	mov	w0, -1
-	strh	w0, [x1, #:lo12:.LANCHOR101]
+	adrp	x0, .LANCHOR112
+	str	wzr, [x0, #:lo12:.LANCHOR112]
 	.loc 3 302 0
-	adrp	x1, .LANCHOR102
-	strh	w0, [x1, #:lo12:.LANCHOR102]
+	mov	w0, -1
+	strh	w0, [x1, #:lo12:.LANCHOR99]
 	.loc 3 303 0
-	adrp	x0, .LANCHOR84
-	mov	w1, 32
-	strh	w1, [x0, #:lo12:.LANCHOR84]
+	adrp	x1, .LANCHOR100
+	strh	w0, [x1, #:lo12:.LANCHOR100]
 	.loc 3 304 0
-	adrp	x0, .LANCHOR85
-	mov	w1, 128
-	strh	w1, [x0, #:lo12:.LANCHOR85]
+	adrp	x0, .LANCHOR82
+	mov	w1, 32
+	strh	w1, [x0, #:lo12:.LANCHOR82]
 	.loc 3 305 0
-	adrp	x0, .LANCHOR87
-	strh	wzr, [x0, #:lo12:.LANCHOR87]
+	adrp	x0, .LANCHOR83
+	mov	w1, 128
+	strh	w1, [x0, #:lo12:.LANCHOR83]
 	.loc 3 306 0
+	adrp	x0, .LANCHOR85
+	strh	wzr, [x0, #:lo12:.LANCHOR85]
+	.loc 3 307 0
+	adrp	x0, .LANCHOR101
+	strh	wzr, [x0, #:lo12:.LANCHOR101]
+	.loc 3 308 0
 	adrp	x0, .LANCHOR103
 	strh	wzr, [x0, #:lo12:.LANCHOR103]
-	.loc 3 307 0
-	adrp	x0, .LANCHOR105
-	strh	wzr, [x0, #:lo12:.LANCHOR105]
-	.loc 3 310 0
+	.loc 3 311 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR21]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-.LVL741:
-	adrp	x1, .LANCHOR98
-	str	x0, [x1, #:lo12:.LANCHOR98]
-	.loc 3 311 0
+.LVL743:
+	adrp	x1, .LANCHOR96
+	str	x0, [x1, #:lo12:.LANCHOR96]
+	.loc 3 312 0
 	mov	w0, 12
 	ldrh	w1, [x19, #:lo12:.LANCHOR21]
 	mul	w0, w1, w0
 	bl	ftl_malloc
-.LVL742:
-	.loc 3 312 0
+.LVL744:
+	.loc 3 313 0
 	ldrh	w19, [x22, #:lo12:.LANCHOR3]
-	.loc 3 311 0
-	adrp	x3, .LANCHOR100
-	str	x3, [x29, 104]
 	.loc 3 312 0
-	lsl	w20, w19, 5
-.LVL743:
+	adrp	x3, .LANCHOR98
+	str	x3, [x29, 104]
 	.loc 3 313 0
+	lsl	w20, w19, 5
+.LVL745:
+	.loc 3 314 0
 	lsl	w19, w19, 7
-	.loc 3 311 0
-	str	x0, [x3, #:lo12:.LANCHOR100]
-	.loc 3 313 0
+	.loc 3 312 0
+	str	x0, [x3, #:lo12:.LANCHOR98]
+	.loc 3 314 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL744:
+.LVL746:
 	adrp	x15, .LANCHOR120
 	str	x15, [x29, 112]
 	str	x0, [x15, #:lo12:.LANCHOR120]
-	.loc 3 314 0
+	.loc 3 315 0
 	mov	w0, w20
 	bl	ftl_malloc
-.LVL745:
+.LVL747:
 	adrp	x11, .LANCHOR121
 	str	x11, [x29, 120]
 	str	x0, [x11, #:lo12:.LANCHOR121]
-	.loc 3 315 0
+	.loc 3 316 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL746:
+.LVL748:
 	adrp	x14, .LANCHOR122
 	str	x14, [x29, 128]
 	str	x0, [x14, #:lo12:.LANCHOR122]
-	.loc 3 316 0
+	.loc 3 317 0
 	mov	w0, w20
 	bl	ftl_malloc
-.LVL747:
-	adrp	x13, .LANCHOR112
+.LVL749:
+	adrp	x13, .LANCHOR111
 	str	x13, [x29, 136]
-	str	x0, [x13, #:lo12:.LANCHOR112]
-	.loc 3 317 0
+	str	x0, [x13, #:lo12:.LANCHOR111]
+	.loc 3 318 0
 	mov	w0, w20
 	bl	ftl_malloc
-.LVL748:
+.LVL750:
+	.loc 3 321 0
+	adrp	x20, .LANCHOR94
+.LVL751:
+	.loc 3 318 0
+	adrp	x12, .LANCHOR93
 	.loc 3 320 0
-	adrp	x20, .LANCHOR96
-.LVL749:
-	.loc 3 317 0
-	adrp	x12, .LANCHOR95
-	.loc 3 319 0
 	ldrh	w19, [x21, #:lo12:.LANCHOR23]
-.LVL750:
-	.loc 3 317 0
+.LVL752:
+	.loc 3 318 0
 	str	x12, [x29, 144]
-	str	x0, [x12, #:lo12:.LANCHOR95]
-	.loc 3 320 0
+	str	x0, [x12, #:lo12:.LANCHOR93]
+	.loc 3 321 0
 	ldrh	w0, [x22, #:lo12:.LANCHOR3]
 	lsl	w0, w0, 1
 	add	w0, w0, 1
-	str	w0, [x20, #:lo12:.LANCHOR96]
-	.loc 3 321 0
+	str	w0, [x20, #:lo12:.LANCHOR94]
+	.loc 3 322 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL751:
-	adrp	x10, .LANCHOR39
+.LVL753:
+	adrp	x10, .LANCHOR107
 	str	x10, [x29, 152]
-	str	x0, [x10, #:lo12:.LANCHOR39]
-	.loc 3 322 0
+	str	x0, [x10, #:lo12:.LANCHOR107]
+	.loc 3 323 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL752:
+.LVL754:
 	adrp	x8, .LANCHOR123
 	str	x8, [x29, 160]
 	str	x0, [x8, #:lo12:.LANCHOR123]
-	.loc 3 323 0
+	.loc 3 324 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL753:
+.LVL755:
 	adrp	x7, .LANCHOR124
 	str	x7, [x29, 168]
 	str	x0, [x7, #:lo12:.LANCHOR124]
-	.loc 3 324 0
-	ldr	w0, [x20, #:lo12:.LANCHOR96]
+	.loc 3 325 0
+	ldr	w0, [x20, #:lo12:.LANCHOR94]
 	mul	w0, w19, w0
 	bl	ftl_malloc
-.LVL754:
-	adrp	x6, .LANCHOR93
+.LVL756:
+	adrp	x6, .LANCHOR91
 	str	x6, [x29, 176]
-	str	x0, [x6, #:lo12:.LANCHOR93]
-	.loc 3 325 0
+	str	x0, [x6, #:lo12:.LANCHOR91]
+	.loc 3 326 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL755:
-	adrp	x5, .LANCHOR116
+.LVL757:
+	adrp	x5, .LANCHOR115
 	str	x5, [x29, 184]
-	str	x0, [x5, #:lo12:.LANCHOR116]
-	.loc 3 326 0
+	str	x0, [x5, #:lo12:.LANCHOR115]
+	.loc 3 327 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL756:
-	.loc 3 329 0
+.LVL758:
+	.loc 3 330 0
 	adrp	x19, .LANCHOR24
-.LVL757:
-	.loc 3 326 0
-	adrp	x4, .LANCHOR114
+.LVL759:
 	.loc 3 327 0
-	ldr	w2, [x20, #:lo12:.LANCHOR96]
-	.loc 3 326 0
-	str	x4, [x29, 192]
-	str	x0, [x4, #:lo12:.LANCHOR114]
+	adrp	x4, .LANCHOR113
+	.loc 3 328 0
+	ldr	w2, [x20, #:lo12:.LANCHOR94]
 	.loc 3 327 0
+	str	x4, [x29, 192]
+	str	x0, [x4, #:lo12:.LANCHOR113]
+	.loc 3 328 0
 	mov	w0, 24
 	mul	w0, w2, w0
 	bl	ftl_malloc
-.LVL758:
-	.loc 3 329 0
+.LVL760:
+	.loc 3 330 0
 	ldrh	w28, [x19, #:lo12:.LANCHOR24]
-	.loc 3 327 0
-	adrp	x1, .LANCHOR92
-	str	x0, [x1, #:lo12:.LANCHOR92]
-	.loc 3 329 0
+	.loc 3 328 0
+	adrp	x1, .LANCHOR90
+	str	x0, [x1, #:lo12:.LANCHOR90]
+	.loc 3 330 0
 	ldrh	w0, [x22, #:lo12:.LANCHOR3]
-	.loc 3 332 0
-	adrp	x22, .LANCHOR94
-	.loc 3 329 0
-	mul	w28, w28, w0
-.LVL759:
+	.loc 3 333 0
+	adrp	x22, .LANCHOR92
 	.loc 3 330 0
+	mul	w28, w28, w0
+.LVL761:
+	.loc 3 331 0
 	mov	w0, w28
 	bl	ftl_malloc
-.LVL760:
-	str	x0, [x24, #:lo12:.LANCHOR109]
-	.loc 3 331 0
+.LVL762:
+	str	x0, [x24, #:lo12:.LANCHOR108]
+	.loc 3 332 0
 	lsl	w0, w28, 2
 	bl	ftl_malloc
-.LVL761:
-	str	x0, [x23, #:lo12:.LANCHOR115]
-	.loc 3 332 0
+.LVL763:
+	str	x0, [x23, #:lo12:.LANCHOR114]
+	.loc 3 333 0
 	ldrh	w1, [x19, #:lo12:.LANCHOR24]
-	.loc 3 335 0
+	.loc 3 336 0
 	adrp	x28, .LANCHOR125
-.LVL762:
-	.loc 3 332 0
-	ldr	w0, [x20, #:lo12:.LANCHOR96]
-	.loc 3 335 0
+.LVL764:
+	.loc 3 333 0
+	ldr	w0, [x20, #:lo12:.LANCHOR94]
+	.loc 3 336 0
 	adrp	x20, .LANCHOR6
-	.loc 3 332 0
+	.loc 3 333 0
 	mul	w0, w1, w0
 	bl	ftl_malloc
-.LVL763:
-	str	x0, [x22, #:lo12:.LANCHOR94]
-	.loc 3 335 0
+.LVL765:
+	str	x0, [x22, #:lo12:.LANCHOR92]
+	.loc 3 336 0
 	ldrh	w0, [x20, #:lo12:.LANCHOR6]
 	ubfiz	w0, w0, 1, 15
 	strh	w0, [x28, #:lo12:.LANCHOR125]
-	.loc 3 336 0
+	.loc 3 337 0
 	and	w0, w0, 65534
 	bl	ftl_malloc
-.LVL764:
+.LVL766:
 	adrp	x1, .LANCHOR126
 	str	x0, [x1, #:lo12:.LANCHOR126]
-	.loc 3 337 0
+	.loc 3 338 0
 	ldrh	w0, [x28, #:lo12:.LANCHOR125]
 	add	x0, x0, 547
 	lsr	x0, x0, 9
 	strh	w0, [x28, #:lo12:.LANCHOR125]
-	.loc 3 338 0
+	.loc 3 339 0
 	lsl	w0, w0, 9
 	bl	ftl_malloc
-.LVL765:
+.LVL767:
 	adrp	x1, .LANCHOR127
-	.loc 3 345 0
+	.loc 3 346 0
 	ldrh	w28, [x20, #:lo12:.LANCHOR6]
-	.loc 3 338 0
-	str	x0, [x1, #:lo12:.LANCHOR127]
 	.loc 3 339 0
-	adrp	x1, .LANCHOR40
-	.loc 3 345 0
+	str	x0, [x1, #:lo12:.LANCHOR127]
+	.loc 3 340 0
+	adrp	x1, .LANCHOR43
+	.loc 3 346 0
 	lsl	w28, w28, 1
-	.loc 3 339 0
+	.loc 3 340 0
 	add	x0, x0, 32
-	str	x0, [x1, #:lo12:.LANCHOR40]
-.LVL766:
-	.loc 3 347 0
+	str	x0, [x1, #:lo12:.LANCHOR43]
+.LVL768:
+	.loc 3 348 0
 	mov	w0, w28
 	bl	ftl_malloc
-.LVL767:
+.LVL769:
 	adrp	x1, .LANCHOR128
 	str	x0, [x1, #:lo12:.LANCHOR128]
-	.loc 3 349 0
-	mov	w0, w28
 	.loc 3 350 0
+	mov	w0, w28
+	.loc 3 351 0
 	adrp	x28, .LANCHOR30
-.LVL768:
-	.loc 3 349 0
-	bl	ftl_malloc
-.LVL769:
-	str	x0, [x25, #:lo12:.LANCHOR43]
 .LVL770:
 	.loc 3 350 0
+	bl	ftl_malloc
+.LVL771:
+	str	x0, [x25, #:lo12:.LANCHOR42]
+.LVL772:
+	.loc 3 351 0
 	ldr	w1, [x28, #:lo12:.LANCHOR30]
 	lsl	w19, w1, 1
-	.loc 3 351 0
+	.loc 3 352 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL771:
+.LVL773:
 	str	x0, [x27, #:lo12:.LANCHOR129]
-	.loc 3 352 0
+	.loc 3 353 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL772:
+.LVL774:
 	str	x0, [x26, #:lo12:.LANCHOR130]
-	.loc 3 353 0
-	ldrh	w0, [x20, #:lo12:.LANCHOR6]
 	.loc 3 354 0
+	ldrh	w0, [x20, #:lo12:.LANCHOR6]
+	.loc 3 355 0
 	adrp	x19, .LANCHOR27
-	.loc 3 353 0
+	.loc 3 354 0
 	lsr	w0, w0, 3
 	add	w0, w0, 4
 	bl	ftl_malloc
-.LVL773:
+.LVL775:
 	adrp	x1, .LANCHOR1
 	str	x0, [x1, #:lo12:.LANCHOR1]
-	.loc 3 354 0
+	.loc 3 355 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR27]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-.LVL774:
+.LVL776:
 	adrp	x2, .LANCHOR36
 	str	x0, [x2, #:lo12:.LANCHOR36]
-	.loc 3 355 0
+	.loc 3 356 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR27]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-.LVL775:
+.LVL777:
 	adrp	x2, .LANCHOR131
 	str	x0, [x2, #:lo12:.LANCHOR131]
-	.loc 3 356 0
+	.loc 3 357 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR27]
-	adrp	x19, .LANCHOR40
+	adrp	x19, .LANCHOR43
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-.LVL776:
+.LVL778:
 	adrp	x1, .LANCHOR132
 	str	x0, [x1, #:lo12:.LANCHOR132]
-	.loc 3 357 0
+	.loc 3 358 0
 	adrp	x1, .LANCHOR28
 	str	x1, [x29, 200]
 	ldrh	w0, [x1, #:lo12:.LANCHOR28]
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-.LVL777:
-	.loc 3 358 0
+.LVL779:
+	.loc 3 359 0
 	ldr	x1, [x29, 200]
-	.loc 3 357 0
+	.loc 3 358 0
 	adrp	x2, .LANCHOR133
 	str	x0, [x2, #:lo12:.LANCHOR133]
-	.loc 3 358 0
+	.loc 3 359 0
 	ldrh	w2, [x1, #:lo12:.LANCHOR28]
 	mov	w1, 0
 	lsl	w2, w2, 2
 	bl	ftl_memset
-.LVL778:
-	.loc 3 360 0
+.LVL780:
+	.loc 3 361 0
 	adrp	x0, .LANCHOR32
 	ldrh	w0, [x0, #:lo12:.LANCHOR32]
-	.loc 3 361 0
+	.loc 3 362 0
 	lsl	w0, w0, 2
-.LVL779:
+.LVL781:
 	bl	ftl_malloc
-.LVL780:
+.LVL782:
 	adrp	x1, .LANCHOR134
 	str	x0, [x1, #:lo12:.LANCHOR134]
-.LVL781:
-	.loc 3 362 0
+.LVL783:
+	.loc 3 363 0
 	ldr	w0, [x28, #:lo12:.LANCHOR30]
-	.loc 3 364 0
+	.loc 3 365 0
 	adrp	x28, .LANCHOR33
-	.loc 3 363 0
+	.loc 3 364 0
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-.LVL782:
+.LVL784:
 	adrp	x1, .LANCHOR135
 	str	x0, [x1, #:lo12:.LANCHOR135]
-.LVL783:
-	.loc 3 364 0
-	ldrh	w0, [x28, #:lo12:.LANCHOR33]
+.LVL785:
 	.loc 3 365 0
+	ldrh	w0, [x28, #:lo12:.LANCHOR33]
+	.loc 3 366 0
 	lsl	w0, w0, 4
-.LVL784:
-	bl	ftl_malloc
-.LVL785:
-	adrp	x1, .LANCHOR56
-	str	x0, [x1, #:lo12:.LANCHOR56]
 .LVL786:
-	.loc 3 366 0
+	bl	ftl_malloc
+.LVL787:
+	adrp	x1, .LANCHOR55
+	str	x0, [x1, #:lo12:.LANCHOR55]
+.LVL788:
+	.loc 3 367 0
 	ldrh	w1, [x28, #:lo12:.LANCHOR33]
 	ldrh	w0, [x21, #:lo12:.LANCHOR23]
-	.loc 3 371 0
+	.loc 3 372 0
 	adrp	x21, .LANCHOR10
-	.loc 3 367 0
+	.loc 3 368 0
 	mul	w0, w1, w0
-.LVL787:
+.LVL789:
 	bl	ftl_malloc
-.LVL788:
+.LVL790:
 	adrp	x1, .LANCHOR136
 	str	x0, [x1, #:lo12:.LANCHOR136]
-.LVL789:
-	.loc 3 369 0
+.LVL791:
+	.loc 3 370 0
 	mov	w0, 6
-	.loc 3 368 0
+	.loc 3 369 0
 	ldrh	w1, [x20, #:lo12:.LANCHOR6]
-	.loc 3 370 0
+	.loc 3 371 0
 	adrp	x20, .LANCHOR137
-	.loc 3 369 0
+	.loc 3 370 0
 	mul	w0, w1, w0
-.LVL790:
+.LVL792:
 	bl	ftl_malloc
-.LVL791:
-	adrp	x1, .LANCHOR41
-	str	x0, [x1, #:lo12:.LANCHOR41]
-	.loc 3 370 0
-	adrp	x0, .LANCHOR17
+.LVL793:
+	adrp	x1, .LANCHOR40
+	str	x0, [x1, #:lo12:.LANCHOR40]
 	.loc 3 371 0
+	adrp	x0, .LANCHOR17
+	.loc 3 372 0
 	ldrh	w1, [x21, #:lo12:.LANCHOR10]
-	.loc 3 370 0
+	.loc 3 371 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR17]
 	add	w0, w0, 31
 	asr	w0, w0, 5
 	strh	w0, [x20, #:lo12:.LANCHOR137]
-.LVL792:
-	.loc 3 371 0
-	mul	w0, w1, w0
-.LVL793:
+.LVL794:
 	.loc 3 372 0
+	mul	w0, w1, w0
+.LVL795:
+	.loc 3 373 0
 	lsl	w0, w0, 2
-.LVL794:
+.LVL796:
 	bl	ftl_malloc
-.LVL795:
+.LVL797:
 	ldp	x3, x15, [x29, 104]
 	adrp	x1, .LANCHOR37
-	.loc 3 374 0
+	.loc 3 375 0
 	ldrh	w20, [x20, #:lo12:.LANCHOR137]
-	.loc 3 372 0
+	.loc 3 373 0
 	add	x2, x1, :lo12:.LANCHOR37
 	ldp	x11, x14, [x29, 120]
-	.loc 3 373 0
+	.loc 3 374 0
 	mov	w30, w20
 	ldp	x13, x12, [x29, 136]
 	mov	x16, x3
 	ldp	x10, x8, [x29, 152]
-	.loc 3 372 0
+	.loc 3 373 0
 	str	x0, [x2, 32]
-.LVL796:
+.LVL798:
 	ldp	x7, x6, [x29, 168]
-	adrp	x17, .LANCHOR98
+	adrp	x17, .LANCHOR96
 	ldp	x5, x4, [x29, 184]
-	adrp	x3, .LANCHOR92
-	.loc 3 373 0
+	adrp	x3, .LANCHOR90
+	.loc 3 374 0
 	ldrh	w28, [x21, #:lo12:.LANCHOR10]
 	add	x21, x2, 40
 	mov	x0, 1
 	str	x19, [x29, 200]
-.LVL797:
-.L475:
-	.loc 3 373 0 is_stmt 0 discriminator 1
+.LVL799:
+.L482:
+	.loc 3 374 0 is_stmt 0 discriminator 1
 	cmp	w0, w28
-	bcc	.L476
+	bcc	.L483
 	mov	w2, 8
 	sub	w2, w2, w0
 	add	x2, x2, 1
-	.loc 3 379 0 is_stmt 1
+	.loc 3 380 0 is_stmt 1
 	add	x1, x1, :lo12:.LANCHOR37
-	.loc 3 373 0
+	.loc 3 374 0
 	mov	x19, 0
-.L477:
+.L484:
 	add	x19, x19, 1
-	.loc 3 377 0 discriminator 1
+	.loc 3 378 0 discriminator 1
 	cmp	x19, x2
-	bne	.L478
-	.loc 3 383 0
+	bne	.L485
+	.loc 3 384 0
 	ldr	x0, [x27, #:lo12:.LANCHOR129]
-	cbnz	x0, .L479
-.L481:
-	.loc 3 385 0
+	cbnz	x0, .L486
+.L488:
+	.loc 3 386 0
 	adrp	x1, .LANCHOR138
-	adrp	x0, .LC82
+	adrp	x0, .LC85
 	add	x1, x1, :lo12:.LANCHOR138
-	add	x0, x0, :lo12:.LC82
+	add	x0, x0, :lo12:.LC85
 	bl	printf
-.LVL798:
-	.loc 3 386 0
+.LVL800:
+	.loc 3 387 0
 	mov	w0, -1
-.L474:
-	.loc 3 484 0
+.L481:
+	.loc 3 485 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -7060,132 +7176,132 @@ FtlMemInit:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.L476:
+.L483:
 	.cfi_restore_state
-	.loc 3 374 0 discriminator 3
+	.loc 3 375 0 discriminator 3
 	ldr	x19, [x2, 32]
-	.loc 3 373 0 discriminator 3
-	add	w0, w0, 1
 	.loc 3 374 0 discriminator 3
+	add	w0, w0, 1
+	.loc 3 375 0 discriminator 3
 	add	x19, x19, x30, uxtw 2
 	add	w30, w30, w20
 	str	x19, [x21], 8
-	b	.L475
-.L478:
-	.loc 3 379 0 discriminator 2
+	b	.L482
+.L485:
+	.loc 3 380 0 discriminator 2
 	add	x20, x0, x19
 	add	x20, x1, x20, lsl 3
 	str	xzr, [x20, 24]
-	b	.L477
-.L479:
-	.loc 3 388 0
+	b	.L484
+.L486:
+	.loc 3 389 0
 	ldr	x0, [x26, #:lo12:.LANCHOR130]
-	cbz	x0, .L481
-	.loc 3 393 0
+	cbz	x0, .L488
+	.loc 3 394 0
 	adrp	x0, .LANCHOR134
 	ldr	x0, [x0, #:lo12:.LANCHOR134]
-	cbz	x0, .L481
-	.loc 3 398 0
+	cbz	x0, .L488
+	.loc 3 399 0
 	adrp	x0, .LANCHOR135
 	ldr	x0, [x0, #:lo12:.LANCHOR135]
-	cbz	x0, .L481
-	.loc 3 404 0
-	adrp	x0, .LANCHOR56
-	ldr	x0, [x0, #:lo12:.LANCHOR56]
-	cbz	x0, .L481
-	.loc 3 409 0
+	cbz	x0, .L488
+	.loc 3 405 0
+	adrp	x0, .LANCHOR55
+	ldr	x0, [x0, #:lo12:.LANCHOR55]
+	cbz	x0, .L488
+	.loc 3 410 0
 	adrp	x0, .LANCHOR136
 	ldr	x0, [x0, #:lo12:.LANCHOR136]
-	cbz	x0, .L481
-	.loc 3 414 0
-	adrp	x0, .LANCHOR41
-	ldr	x0, [x0, #:lo12:.LANCHOR41]
-	cbz	x0, .L481
-	.loc 3 419 0
+	cbz	x0, .L488
+	.loc 3 415 0
+	adrp	x0, .LANCHOR40
+	ldr	x0, [x0, #:lo12:.LANCHOR40]
+	cbz	x0, .L488
+	.loc 3 420 0
 	adrp	x0, .LANCHOR37+32
 	ldr	x0, [x0, #:lo12:.LANCHOR37+32]
-	cbz	x0, .L481
-	.loc 3 425 0
-	ldr	x0, [x25, #:lo12:.LANCHOR43]
-	cbz	x0, .L481
-	.loc 3 430 0
-	ldr	x0, [x17, #:lo12:.LANCHOR98]
-	cbz	x0, .L481
-	.loc 3 430 0 is_stmt 0 discriminator 1
-	ldr	x0, [x16, #:lo12:.LANCHOR100]
-	cbz	x0, .L481
-	.loc 3 435 0 is_stmt 1
+	cbz	x0, .L488
+	.loc 3 426 0
+	ldr	x0, [x25, #:lo12:.LANCHOR42]
+	cbz	x0, .L488
+	.loc 3 431 0
+	ldr	x0, [x17, #:lo12:.LANCHOR96]
+	cbz	x0, .L488
+	.loc 3 431 0 is_stmt 0 discriminator 1
+	ldr	x0, [x16, #:lo12:.LANCHOR98]
+	cbz	x0, .L488
+	.loc 3 436 0 is_stmt 1
 	ldr	x0, [x15, #:lo12:.LANCHOR120]
-	cbz	x0, .L481
-	.loc 3 435 0 is_stmt 0 discriminator 1
+	cbz	x0, .L488
+	.loc 3 436 0 is_stmt 0 discriminator 1
 	ldr	x0, [x14, #:lo12:.LANCHOR122]
-	cbz	x0, .L481
-	.loc 3 435 0 discriminator 2
-	ldr	x0, [x13, #:lo12:.LANCHOR112]
-	cbz	x0, .L481
-	.loc 3 435 0 discriminator 3
-	ldr	x0, [x12, #:lo12:.LANCHOR95]
-	cbz	x0, .L481
-	.loc 3 435 0 discriminator 4
+	cbz	x0, .L488
+	.loc 3 436 0 discriminator 2
+	ldr	x0, [x13, #:lo12:.LANCHOR111]
+	cbz	x0, .L488
+	.loc 3 436 0 discriminator 3
+	ldr	x0, [x12, #:lo12:.LANCHOR93]
+	cbz	x0, .L488
+	.loc 3 436 0 discriminator 4
 	ldr	x0, [x11, #:lo12:.LANCHOR121]
-	cbz	x0, .L481
-	.loc 3 440 0 is_stmt 1
-	ldr	x0, [x10, #:lo12:.LANCHOR39]
-	cbz	x0, .L481
-	.loc 3 440 0 is_stmt 0 discriminator 1
-	ldr	x0, [x8, #:lo12:.LANCHOR123]
-	cbz	x0, .L481
-	.loc 3 440 0 discriminator 2
-	ldr	x0, [x7, #:lo12:.LANCHOR124]
-	cbz	x0, .L481
-	.loc 3 440 0 discriminator 3
-	ldr	x0, [x6, #:lo12:.LANCHOR93]
-	cbz	x0, .L481
+	cbz	x0, .L488
 	.loc 3 441 0 is_stmt 1
-	ldr	x0, [x5, #:lo12:.LANCHOR116]
-	cbz	x0, .L481
+	ldr	x0, [x10, #:lo12:.LANCHOR107]
+	cbz	x0, .L488
 	.loc 3 441 0 is_stmt 0 discriminator 1
-	ldr	x0, [x4, #:lo12:.LANCHOR114]
-	cbz	x0, .L481
+	ldr	x0, [x8, #:lo12:.LANCHOR123]
+	cbz	x0, .L488
 	.loc 3 441 0 discriminator 2
-	ldr	x0, [x3, #:lo12:.LANCHOR92]
-	cbz	x0, .L481
-	.loc 3 446 0 is_stmt 1
-	ldr	x0, [x24, #:lo12:.LANCHOR109]
-	cbz	x0, .L481
-	.loc 3 446 0 is_stmt 0 discriminator 1
-	ldr	x0, [x23, #:lo12:.LANCHOR115]
-	cbz	x0, .L481
-	.loc 3 446 0 discriminator 2
-	ldr	x0, [x22, #:lo12:.LANCHOR94]
-	cbz	x0, .L481
-	.loc 3 452 0 is_stmt 1
+	ldr	x0, [x7, #:lo12:.LANCHOR124]
+	cbz	x0, .L488
+	.loc 3 441 0 discriminator 3
+	ldr	x0, [x6, #:lo12:.LANCHOR91]
+	cbz	x0, .L488
+	.loc 3 442 0 is_stmt 1
+	ldr	x0, [x5, #:lo12:.LANCHOR115]
+	cbz	x0, .L488
+	.loc 3 442 0 is_stmt 0 discriminator 1
+	ldr	x0, [x4, #:lo12:.LANCHOR113]
+	cbz	x0, .L488
+	.loc 3 442 0 discriminator 2
+	ldr	x0, [x3, #:lo12:.LANCHOR90]
+	cbz	x0, .L488
+	.loc 3 447 0 is_stmt 1
+	ldr	x0, [x24, #:lo12:.LANCHOR108]
+	cbz	x0, .L488
+	.loc 3 447 0 is_stmt 0 discriminator 1
+	ldr	x0, [x23, #:lo12:.LANCHOR114]
+	cbz	x0, .L488
+	.loc 3 447 0 discriminator 2
+	ldr	x0, [x22, #:lo12:.LANCHOR92]
+	cbz	x0, .L488
+	.loc 3 453 0 is_stmt 1
 	ldr	x0, [x29, 200]
-	ldr	x0, [x0, #:lo12:.LANCHOR40]
-	cbz	x0, .L481
-	.loc 3 452 0 is_stmt 0 discriminator 1
+	ldr	x0, [x0, #:lo12:.LANCHOR43]
+	cbz	x0, .L488
+	.loc 3 453 0 is_stmt 0 discriminator 1
 	adrp	x0, .LANCHOR126
 	ldr	x0, [x0, #:lo12:.LANCHOR126]
-	cbz	x0, .L481
-	.loc 3 458 0 is_stmt 1
+	cbz	x0, .L488
+	.loc 3 459 0 is_stmt 1
 	adrp	x0, .LANCHOR36
 	ldr	x0, [x0, #:lo12:.LANCHOR36]
-	cbz	x0, .L481
-	.loc 3 464 0
+	cbz	x0, .L488
+	.loc 3 465 0
 	adrp	x0, .LANCHOR131
 	ldr	x0, [x0, #:lo12:.LANCHOR131]
-	cbz	x0, .L481
-	.loc 3 470 0
+	cbz	x0, .L488
+	.loc 3 471 0
 	adrp	x0, .LANCHOR132
 	ldr	x0, [x0, #:lo12:.LANCHOR132]
-	cbz	x0, .L481
-	.loc 3 476 0
+	cbz	x0, .L488
+	.loc 3 477 0
 	adrp	x0, .LANCHOR133
 	ldr	x0, [x0, #:lo12:.LANCHOR133]
-	cbz	x0, .L481
-	.loc 3 483 0
+	cbz	x0, .L488
+	.loc 3 484 0
 	mov	w0, 0
-	b	.L474
+	b	.L481
 	.cfi_endproc
 .LFE206:
 	.size	FtlMemInit, .-FtlMemInit
@@ -7197,7 +7313,7 @@ FtlBbt2Bitmap:
 .LFB225:
 	.loc 4 66 0
 	.cfi_startproc
-.LVL799:
+.LVL801:
 	stp	x29, x30, [sp, -64]!
 	.cfi_def_cfa_offset 64
 	.cfi_offset 29, -64
@@ -7210,7 +7326,7 @@ FtlBbt2Bitmap:
 	mov	x22, x0
 	.loc 4 69 0
 	adrp	x0, .LANCHOR137
-.LVL800:
+.LVL802:
 	.loc 4 66 0
 	stp	x23, x24, [sp, 48]
 	.loc 4 74 0
@@ -7236,27 +7352,27 @@ FtlBbt2Bitmap:
 	.loc 4 69 0
 	lsl	w2, w2, 2
 	mov	w1, 0
-.LVL801:
+.LVL803:
 	mov	x0, x20
 	bl	ftl_memset
-.LVL802:
-.L579:
+.LVL804:
+.L586:
 	.loc 4 72 0
 	ldrh	w0, [x22, x19]
 	cmp	w0, w24
-	beq	.L576
+	beq	.L583
 	.loc 4 74 0
 	ldrh	w1, [x21]
 	cmp	w1, w0
-	bhi	.L578
+	bhi	.L585
 	.loc 4 74 0 is_stmt 0 discriminator 1
 	adrp	x0, .LC1
 	mov	w2, 74
 	mov	x1, x23
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL803:
-.L578:
+.LVL805:
+.L585:
 	.loc 4 75 0 is_stmt 1 discriminator 2
 	ldrh	w2, [x22, x19]
 	mov	w1, 1
@@ -7271,13 +7387,13 @@ FtlBbt2Bitmap:
 	orr	w1, w1, w2
 	str	w1, [x20, x0]
 	.loc 4 70 0 discriminator 2
-	bne	.L579
-.L576:
+	bne	.L586
+.L583:
 	.loc 4 77 0
 	ldp	x19, x20, [sp, 16]
-.LVL804:
+.LVL806:
 	ldp	x21, x22, [sp, 32]
-.LVL805:
+.LVL807:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	.cfi_restore 30
@@ -7316,7 +7432,7 @@ FtlBbtMemInit:
 	.loc 4 152 0
 	mov	w1, 255
 	b	ftl_memset
-.LVL806:
+.LVL808:
 	.cfi_endproc
 .LFE227:
 	.size	FtlBbtMemInit, .-FtlBbtMemInit
@@ -7328,7 +7444,7 @@ FtlFreeSysBlkQueueInit:
 .LFB237:
 	.loc 2 76 0
 	.cfi_startproc
-.LVL807:
+.LVL809:
 	stp	x29, x30, [sp, -16]!
 	.cfi_def_cfa_offset 16
 	.cfi_offset 29, -16
@@ -7349,14 +7465,14 @@ FtlFreeSysBlkQueueInit:
 	strh	wzr, [x3, 2]
 	.loc 2 83 0
 	add	x0, x3, 8
-.LVL808:
+.LVL810:
 	.loc 2 80 0
 	strh	wzr, [x3, 4]
 	.loc 2 81 0
 	strh	wzr, [x3, 6]
 	.loc 2 83 0
 	bl	ftl_memset
-.LVL809:
+.LVL811:
 	.loc 2 85 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
@@ -7373,9 +7489,9 @@ FtlFreeSysBlkQueueInit:
 	.type	load_l2p_region, %function
 load_l2p_region:
 .LFB253:
-	.loc 2 442 0
+	.loc 2 488 0
 	.cfi_startproc
-.LVL810:
+.LVL812:
 	stp	x29, x30, [sp, -80]!
 	.cfi_def_cfa_offset 80
 	.cfi_offset 29, -80
@@ -7385,9 +7501,9 @@ load_l2p_region:
 	stp	x23, x24, [sp, 48]
 	.cfi_offset 23, -32
 	.cfi_offset 24, -24
-	.loc 2 446 0
+	.loc 2 492 0
 	adrp	x23, .LANCHOR32
-	.loc 2 442 0
+	.loc 2 488 0
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -64
 	.cfi_offset 20, -56
@@ -7399,55 +7515,55 @@ load_l2p_region:
 	stp	x25, x26, [sp, 64]
 	.cfi_offset 25, -16
 	.cfi_offset 26, -8
-	.loc 2 446 0
+	.loc 2 492 0
 	ldrh	w0, [x23, #:lo12:.LANCHOR32]
-.LVL811:
+.LVL813:
 	cmp	w0, w21
-	bcs	.L587
-	.loc 2 446 0 is_stmt 0 discriminator 1
+	bcs	.L594
+	.loc 2 492 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR140
-.LVL812:
+.LVL814:
 	adrp	x0, .LC1
-	mov	w2, 446
+	mov	w2, 492
 	add	x1, x1, :lo12:.LANCHOR140
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL813:
-.L587:
-	.loc 2 447 0 is_stmt 1
+.LVL815:
+.L594:
+	.loc 2 493 0 is_stmt 1
 	adrp	x26, .LANCHOR134
 	ubfiz	x0, x21, 2, 16
-	adrp	x22, .LANCHOR56
+	adrp	x22, .LANCHOR55
 	ldr	x1, [x26, #:lo12:.LANCHOR134]
 	ldr	w24, [x1, x0]
-.LVL814:
-	.loc 2 449 0
-	cbnz	w24, .L588
-	.loc 2 450 0
-	ldr	x0, [x22, #:lo12:.LANCHOR56]
+.LVL816:
+	.loc 2 495 0
+	cbnz	w24, .L595
+	.loc 2 496 0
+	ldr	x0, [x22, #:lo12:.LANCHOR55]
 	lsl	x19, x19, 4
-.LVL815:
+.LVL817:
 	adrp	x1, .LANCHOR23
 	add	x0, x0, x19
 	ldrh	w2, [x1, #:lo12:.LANCHOR23]
 	mov	w1, 255
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-.LVL816:
-	.loc 2 451 0
-	ldr	x0, [x22, #:lo12:.LANCHOR56]
+.LVL818:
+	.loc 2 497 0
+	ldr	x0, [x22, #:lo12:.LANCHOR55]
 	add	x1, x0, x19
 	strh	w21, [x0, x19]
-	.loc 2 452 0
+	.loc 2 498 0
 	str	wzr, [x1, 4]
-.L589:
-	.loc 2 473 0
+.L596:
+	.loc 2 519 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-.LVL817:
+.LVL819:
 	ldp	x23, x24, [sp, 48]
-.LVL818:
+.LVL820:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	.cfi_remember_state
@@ -7463,85 +7579,85 @@ load_l2p_region:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL819:
-.L588:
+.LVL821:
+.L595:
 	.cfi_restore_state
-	.loc 2 456 0
-	ldr	x0, [x22, #:lo12:.LANCHOR56]
+	.loc 2 502 0
+	ldr	x0, [x22, #:lo12:.LANCHOR55]
 	lsl	x19, x19, 4
-	.loc 2 455 0
-	adrp	x20, .LANCHOR108
-	add	x20, x20, :lo12:.LANCHOR108
-	.loc 2 456 0
+	.loc 2 501 0
+	adrp	x20, .LANCHOR106
+	add	x20, x20, :lo12:.LANCHOR106
+	.loc 2 502 0
 	add	x0, x0, x19
-	.loc 2 458 0
+	.loc 2 504 0
 	mov	w2, 1
 	mov	w1, w2
-	.loc 2 455 0
+	.loc 2 501 0
 	str	w24, [x20, 4]
-	.loc 2 456 0
+	.loc 2 502 0
 	ldr	x0, [x0, 8]
 	str	x0, [x20, 8]
-	.loc 2 457 0
-	adrp	x0, .LANCHOR109
-	ldr	x0, [x0, #:lo12:.LANCHOR109]
+	.loc 2 503 0
+	adrp	x0, .LANCHOR108
+	ldr	x0, [x0, #:lo12:.LANCHOR108]
 	str	x0, [x20, 16]
-	.loc 2 458 0
+	.loc 2 504 0
 	mov	x0, x20
 	bl	FlashReadPages
-.LVL820:
-	.loc 2 459 0
+.LVL822:
+	.loc 2 505 0
 	ldr	x25, [x20, 16]
-.LVL821:
-	.loc 2 461 0
+.LVL823:
+	.loc 2 507 0
 	ldrh	w0, [x25, 8]
 	cmp	w0, w21
-	beq	.L590
-	.loc 2 462 0
+	beq	.L597
+	.loc 2 508 0
 	mov	w2, w24
 	mov	w1, w21
-	adrp	x0, .LC83
-	add	x0, x0, :lo12:.LC83
+	adrp	x0, .LC86
+	add	x0, x0, :lo12:.LC86
 	bl	printf
-.LVL822:
-	.loc 2 463 0
+.LVL824:
+	.loc 2 509 0
 	ldr	x1, [x20, 16]
 	mov	w3, 4
-	adrp	x0, .LC84
+	adrp	x0, .LC87
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC84
+	add	x0, x0, :lo12:.LC87
 	bl	rknand_print_hex
-.LVL823:
-	.loc 2 464 0
+.LVL825:
+	.loc 2 510 0
 	ldrh	w3, [x23, #:lo12:.LANCHOR32]
-	adrp	x0, .LC85
+	adrp	x0, .LC88
 	ldr	x1, [x26, #:lo12:.LANCHOR134]
 	mov	w2, 4
-	add	x0, x0, :lo12:.LC85
+	add	x0, x0, :lo12:.LC88
 	bl	rknand_print_hex
-.LVL824:
-.L590:
-	.loc 2 467 0
+.LVL826:
+.L597:
+	.loc 2 513 0
 	ldrh	w0, [x25, 8]
 	cmp	w0, w21
-	beq	.L591
-	.loc 2 467 0 is_stmt 0 discriminator 1
+	beq	.L598
+	.loc 2 513 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR140
 	adrp	x0, .LC1
-	mov	w2, 467
+	mov	w2, 513
 	add	x1, x1, :lo12:.LANCHOR140
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL825:
-.L591:
-	.loc 2 470 0 is_stmt 1
-	ldr	x0, [x22, #:lo12:.LANCHOR56]
+.LVL827:
+.L598:
+	.loc 2 516 0 is_stmt 1
+	ldr	x0, [x22, #:lo12:.LANCHOR55]
 	add	x1, x0, x19
 	str	wzr, [x1, 4]
-	.loc 2 471 0
+	.loc 2 517 0
 	strh	w21, [x0, x19]
-	.loc 2 472 0
-	b	.L589
+	.loc 2 518 0
+	b	.L596
 	.cfi_endproc
 .LFE253:
 	.size	load_l2p_region, .-load_l2p_region
@@ -7551,81 +7667,81 @@ load_l2p_region:
 	.type	ftl_free_no_use_map_blk, %function
 ftl_free_no_use_map_blk:
 .LFB254:
-	.loc 2 476 0
+	.loc 2 522 0
 	.cfi_startproc
-.LVL826:
+.LVL828:
 	stp	x29, x30, [sp, -80]!
 	.cfi_def_cfa_offset 80
 	.cfi_offset 29, -80
 	.cfi_offset 30, -72
-	.loc 2 485 0
+	.loc 2 531 0
 	mov	w1, 0
-	.loc 2 476 0
+	.loc 2 522 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -64
 	.cfi_offset 20, -56
 	mov	x19, x0
-	.loc 2 485 0
+	.loc 2 531 0
 	ldrh	w2, [x0, 10]
-	.loc 2 476 0
+	.loc 2 522 0
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -48
 	.cfi_offset 22, -40
-	.loc 2 478 0
+	.loc 2 524 0
 	ldp	x21, x20, [x0, 32]
-	.loc 2 476 0
+	.loc 2 522 0
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	.cfi_offset 23, -32
 	.cfi_offset 24, -24
 	.cfi_offset 25, -16
 	.cfi_offset 26, -8
-	.loc 2 485 0
+	.loc 2 531 0
 	lsl	w2, w2, 1
-	.loc 2 477 0
+	.loc 2 523 0
 	ldr	x23, [x0, 16]
-.LVL827:
-	.loc 2 485 0
+.LVL829:
+	.loc 2 531 0
 	mov	x0, x21
-.LVL828:
+.LVL830:
 	bl	ftl_memset
-.LVL829:
-	.loc 2 486 0
+.LVL831:
+	.loc 2 532 0
 	mov	w0, 0
-.LVL830:
-.L594:
-	.loc 2 486 0 is_stmt 0 discriminator 1
+.LVL832:
+.L601:
+	.loc 2 532 0 is_stmt 0 discriminator 1
 	ldrh	w1, [x19, 6]
 	cmp	w1, w0
-	bhi	.L598
-	.loc 2 494 0 is_stmt 1
+	bhi	.L605
+	.loc 2 540 0 is_stmt 1
 	ldrh	w26, [x21]
-.LVL831:
-	.loc 2 498 0
+.LVL833:
+	.loc 2 544 0
 	adrp	x24, .LANCHOR20
 	add	x24, x24, :lo12:.LANCHOR20
-	.loc 2 495 0
+	.loc 2 541 0
 	mov	w25, 0
-	.loc 2 497 0
+	.loc 2 543 0
 	mov	w20, 0
-.LVL832:
-.L599:
-	.loc 2 497 0 is_stmt 0 discriminator 1
+.LVL834:
+.L606:
+	.loc 2 543 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L603
-	.loc 2 513 0 is_stmt 1
+	bhi	.L610
+	.loc 2 559 0 is_stmt 1
 	mov	w0, w25
 	ldp	x19, x20, [sp, 16]
-.LVL833:
+.LVL835:
 	ldp	x21, x22, [sp, 32]
-.LVL834:
+.LVL836:
 	ldp	x23, x24, [sp, 48]
-.LVL835:
+.LVL837:
 	ldp	x25, x26, [sp, 64]
-.LVL836:
+.LVL838:
 	ldp	x29, x30, [sp], 80
 	.cfi_remember_state
 	.cfi_restore 30
@@ -7640,92 +7756,92 @@ ftl_free_no_use_map_blk:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL837:
-.L598:
+.LVL839:
+.L605:
 	.cfi_restore_state
-	.loc 2 487 0
+	.loc 2 533 0
 	ubfiz	x1, x0, 2, 16
 	ldr	w2, [x20, x1]
-	.loc 2 488 0
+	.loc 2 534 0
 	mov	w1, 0
-	.loc 2 487 0
+	.loc 2 533 0
 	ubfx	x2, x2, 10, 16
-.LVL838:
-.L595:
-	.loc 2 488 0 discriminator 1
+.LVL840:
+.L602:
+	.loc 2 534 0 discriminator 1
 	ldrh	w3, [x19, 10]
 	cmp	w3, w1
-	bhi	.L597
-	.loc 2 486 0 discriminator 2
+	bhi	.L604
+	.loc 2 532 0 discriminator 2
 	add	w0, w0, 1
-.LVL839:
+.LVL841:
 	and	w0, w0, 65535
-.LVL840:
-	b	.L594
-.L597:
-	.loc 2 489 0
+.LVL842:
+	b	.L601
+.L604:
+	.loc 2 535 0
 	ubfiz	x3, x1, 1, 16
 	ldrh	w4, [x23, x3]
 	cmp	w4, w2
-	bne	.L596
-	.loc 2 490 0
+	bne	.L603
+	.loc 2 536 0
 	ldrh	w4, [x21, x3]
 	add	w4, w4, 1
 	strh	w4, [x21, x3]
-.L596:
-	.loc 2 488 0 discriminator 2
+.L603:
+	.loc 2 534 0 discriminator 2
 	add	w1, w1, 1
-.LVL841:
-	and	w1, w1, 65535
-.LVL842:
-	b	.L595
 .LVL843:
-.L603:
-	.loc 2 498 0
+	and	w1, w1, 65535
+.LVL844:
+	b	.L602
+.LVL845:
+.L610:
+	.loc 2 544 0
 	ldrh	w0, [x19]
 	uxtw	x22, w20
 	cmp	w0, w20
-	bne	.L600
-	.loc 2 498 0 is_stmt 0 discriminator 1
+	bne	.L607
+	.loc 2 544 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x24]
 	ldrh	w1, [x19, 2]
 	cmp	w1, w0
-	bcs	.L600
-	.loc 2 499 0 is_stmt 1
+	bcs	.L607
+	.loc 2 545 0 is_stmt 1
 	strh	w0, [x21, x22, lsl 1]
-.L600:
-	.loc 2 500 0
+.L607:
+	.loc 2 546 0
 	lsl	x22, x22, 1
 	ldrh	w0, [x21, x22]
 	cmp	w26, w0
-	bls	.L601
+	bls	.L608
 	mov	w25, w20
-.LVL844:
+.LVL846:
 	mov	w26, w0
-.LVL845:
-.L601:
-	.loc 2 504 0
-	cbnz	w0, .L602
-	.loc 2 504 0 is_stmt 0 discriminator 1
+.LVL847:
+.L608:
+	.loc 2 550 0
+	cbnz	w0, .L609
+	.loc 2 550 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x23, x22]
-	cbz	w0, .L602
-	.loc 2 506 0 is_stmt 1
+	cbz	w0, .L609
+	.loc 2 552 0 is_stmt 1
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.LVL846:
-	.loc 2 507 0
+.LVL848:
+	.loc 2 553 0
 	strh	wzr, [x23, x22]
-	.loc 2 508 0
+	.loc 2 554 0
 	ldrh	w0, [x19, 8]
 	sub	w0, w0, #1
 	strh	w0, [x19, 8]
-.L602:
-	.loc 2 497 0 discriminator 2
+.L609:
+	.loc 2 543 0 discriminator 2
 	add	w20, w20, 1
-.LVL847:
+.LVL849:
 	and	w20, w20, 65535
-.LVL848:
-	b	.L599
+.LVL850:
+	b	.L606
 	.cfi_endproc
 .LFE254:
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
@@ -7735,75 +7851,75 @@ ftl_free_no_use_map_blk:
 	.type	Ftl_write_map_blk_to_last_page, %function
 Ftl_write_map_blk_to_last_page:
 .LFB257:
-	.loc 2 583 0
+	.loc 2 632 0
 	.cfi_startproc
-.LVL849:
+.LVL851:
 	stp	x29, x30, [sp, -64]!
 	.cfi_def_cfa_offset 64
 	.cfi_offset 29, -64
 	.cfi_offset 30, -56
-	.loc 2 591 0
+	.loc 2 640 0
 	mov	w1, 65535
-	.loc 2 583 0
+	.loc 2 632 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -48
 	.cfi_offset 20, -40
 	mov	x19, x0
-	.loc 2 586 0
+	.loc 2 635 0
 	ldr	x20, [x0, 16]
-.LVL850:
-	.loc 2 583 0
+.LVL852:
+	.loc 2 632 0
 	stp	x21, x22, [sp, 32]
-	.loc 2 591 0
+	.loc 2 640 0
 	ldrh	w0, [x0]
-.LVL851:
-	.loc 2 583 0
+.LVL853:
+	.loc 2 632 0
 	str	x23, [sp, 48]
 	.cfi_offset 21, -32
 	.cfi_offset 22, -24
 	.cfi_offset 23, -16
-	.loc 2 591 0
+	.loc 2 640 0
 	cmp	w0, w1
-	bne	.L609
-	.loc 2 592 0
+	bne	.L616
+	.loc 2 641 0
 	ldrh	w0, [x19, 8]
-	cbz	w0, .L610
-	.loc 2 592 0 is_stmt 0 discriminator 1
+	cbz	w0, .L617
+	.loc 2 641 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR141
 	adrp	x0, .LC1
-	mov	w2, 592
+	mov	w2, 641
 	add	x1, x1, :lo12:.LANCHOR141
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL852:
-.L610:
-	.loc 2 593 0 is_stmt 1
+.LVL854:
+.L617:
+	.loc 2 642 0 is_stmt 1
 	ldrh	w0, [x19, 8]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
-	.loc 2 594 0
+	.loc 2 643 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL853:
+.LVL855:
 	strh	w0, [x20]
-	.loc 2 597 0
+	.loc 2 646 0
 	ldr	w0, [x19, 48]
-	.loc 2 595 0
+	.loc 2 644 0
 	strh	wzr, [x19, 2]
-	.loc 2 597 0
+	.loc 2 646 0
 	add	w0, w0, 1
-	.loc 2 596 0
+	.loc 2 645 0
 	strh	wzr, [x19]
-	.loc 2 597 0
+	.loc 2 646 0
 	str	w0, [x19, 48]
-.LVL854:
-.L611:
-	.loc 2 628 0
+.LVL856:
+.L618:
+	.loc 2 677 0
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
-.LVL855:
+.LVL857:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	.cfi_remember_state
@@ -7816,108 +7932,108 @@ Ftl_write_map_blk_to_last_page:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL856:
-.L609:
+.LVL858:
+.L616:
 	.cfi_restore_state
-	.loc 2 601 0
+	.loc 2 650 0
 	ubfiz	x0, x0, 1, 16
-	.loc 2 604 0
-	adrp	x1, .LANCHOR109
-	.loc 2 603 0
-	adrp	x23, .LANCHOR39
-	.loc 2 587 0
+	.loc 2 653 0
+	adrp	x1, .LANCHOR108
+	.loc 2 652 0
+	adrp	x23, .LANCHOR107
+	.loc 2 636 0
 	ldr	x22, [x19, 40]
-	.loc 2 604 0
-	ldr	x1, [x1, #:lo12:.LANCHOR109]
-	.loc 2 601 0
+	.loc 2 653 0
+	ldr	x1, [x1, #:lo12:.LANCHOR108]
+	.loc 2 650 0
 	ldrh	w21, [x20, x0]
-	.loc 2 602 0
-	adrp	x20, .LANCHOR108
-.LVL857:
+	.loc 2 651 0
+	adrp	x20, .LANCHOR106
+.LVL859:
 	ldrh	w0, [x19, 2]
-	add	x2, x20, :lo12:.LANCHOR108
+	add	x2, x20, :lo12:.LANCHOR106
 	orr	w0, w0, w21, lsl 10
 	str	w0, [x2, 4]
-	.loc 2 603 0
-	ldr	x0, [x23, #:lo12:.LANCHOR39]
-	.loc 2 604 0
+	.loc 2 652 0
+	ldr	x0, [x23, #:lo12:.LANCHOR107]
+	.loc 2 653 0
 	str	x1, [x2, 16]
-.LVL858:
-	.loc 2 603 0
+.LVL860:
+	.loc 2 652 0
 	str	x0, [x2, 8]
-	.loc 2 607 0
+	.loc 2 656 0
 	ldr	w2, [x19, 48]
 	str	w2, [x1, 4]
-	.loc 2 608 0
+	.loc 2 657 0
 	mov	w2, -1291
 	strh	w2, [x1, 8]
-	.loc 2 609 0
+	.loc 2 658 0
 	ldrh	w2, [x19, 4]
 	strh	w2, [x1]
-	.loc 2 610 0
+	.loc 2 659 0
 	strh	w21, [x1, 2]
-	.loc 2 612 0
+	.loc 2 661 0
 	adrp	x1, .LANCHOR20
-.LVL859:
+.LVL861:
 	ldrh	w2, [x1, #:lo12:.LANCHOR20]
 	mov	w1, 255
 	lsl	w2, w2, 3
 	bl	ftl_memset
-.LVL860:
-	.loc 2 614 0
+.LVL862:
+	.loc 2 663 0
 	ldrh	w4, [x19, 6]
 	mov	x1, 0
-	.loc 2 617 0
-	ldr	x3, [x23, #:lo12:.LANCHOR39]
-	.loc 2 613 0
+	.loc 2 666 0
+	ldr	x3, [x23, #:lo12:.LANCHOR107]
+	.loc 2 662 0
 	mov	w2, 0
-.LVL861:
-.L612:
-	.loc 2 614 0 discriminator 1
+.LVL863:
+.L619:
+	.loc 2 663 0 discriminator 1
 	cmp	w4, w1, uxth
-	bhi	.L614
-	.loc 2 621 0
+	bhi	.L621
+	.loc 2 670 0
 	mov	w2, 1
-.LVL862:
+.LVL864:
 	mov	w3, 0
 	mov	w1, w2
-.LVL863:
-	add	x0, x20, :lo12:.LANCHOR108
+.LVL865:
+	add	x0, x20, :lo12:.LANCHOR106
 	bl	FlashProgPages
-.LVL864:
-	.loc 2 622 0
+.LVL866:
+	.loc 2 671 0
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-	.loc 2 626 0
+	.loc 2 675 0
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-.LVL865:
-	.loc 2 627 0
-	b	.L611
-.LVL866:
-.L614:
-	.loc 2 615 0
+.LVL867:
+	.loc 2 676 0
+	b	.L618
+.LVL868:
+.L621:
+	.loc 2 664 0
 	ldr	w0, [x22, x1, lsl 2]
 	cmp	w21, w0, lsr 10
-	bne	.L613
-	.loc 2 616 0
+	bne	.L620
+	.loc 2 665 0
 	add	w2, w2, 1
-.LVL867:
+.LVL869:
 	and	w2, w2, 65535
-.LVL868:
-	.loc 2 617 0
+.LVL870:
+	.loc 2 666 0
 	ubfiz	x0, x2, 1, 16
 	str	w1, [x3, x0, lsl 2]
-	.loc 2 618 0
+	.loc 2 667 0
 	add	x0, x0, 1
 	ldr	w5, [x22, x1, lsl 2]
 	str	w5, [x3, x0, lsl 2]
-.L613:
-.LVL869:
+.L620:
+.LVL871:
 	add	x1, x1, 1
-.LVL870:
-	b	.L612
+.LVL872:
+	b	.L619
 	.cfi_endproc
 .LFE257:
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
@@ -7927,9 +8043,9 @@ Ftl_write_map_blk_to_last_page:
 	.type	FtlMapWritePage, %function
 FtlMapWritePage:
 .LFB258:
-	.loc 2 631 0
+	.loc 2 680 0
 	.cfi_startproc
-.LVL871:
+.LVL873:
 	stp	x29, x30, [sp, -112]!
 	.cfi_def_cfa_offset 112
 	.cfi_offset 29, -112
@@ -7939,216 +8055,216 @@ FtlMapWritePage:
 	stp	x23, x24, [sp, 48]
 	.cfi_offset 23, -64
 	.cfi_offset 24, -56
-	.loc 2 637 0
-	adrp	x23, .LANCHOR67
-	.loc 2 631 0
+	.loc 2 686 0
+	adrp	x23, .LANCHOR66
+	.loc 2 680 0
 	stp	x25, x26, [sp, 64]
-	.loc 2 650 0
+	.loc 2 699 0
 	adrp	x24, .LANCHOR142
-	.loc 2 631 0
+	.loc 2 680 0
 	stp	x27, x28, [sp, 80]
 	.cfi_offset 25, -48
 	.cfi_offset 26, -40
 	.cfi_offset 27, -32
 	.cfi_offset 28, -24
-	.loc 2 638 0
+	.loc 2 687 0
 	adrp	x26, .LANCHOR20
-	.loc 2 631 0
+	.loc 2 680 0
 	stp	x19, x20, [sp, 16]
 	mov	w25, w1
 	.cfi_offset 19, -96
 	.cfi_offset 20, -88
 	mov	x19, x0
 	mov	x27, x2
-	.loc 2 637 0
-	add	x23, x23, :lo12:.LANCHOR67
-	.loc 2 650 0
+	.loc 2 686 0
+	add	x23, x23, :lo12:.LANCHOR66
+	.loc 2 699 0
 	add	x24, x24, :lo12:.LANCHOR142
-	.loc 2 671 0
+	.loc 2 720 0
 	add	x28, x26, :lo12:.LANCHOR20
-	.loc 2 631 0
+	.loc 2 680 0
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -80
 	.cfi_offset 22, -72
-	.loc 2 634 0
+	.loc 2 683 0
 	mov	w22, 0
-.LVL872:
-.L620:
-	.loc 2 637 0
+.LVL874:
+.L627:
+	.loc 2 686 0
 	ldr	w0, [x23]
-	.loc 2 638 0
+	.loc 2 687 0
 	ldrh	w1, [x19, 2]
-	.loc 2 637 0
+	.loc 2 686 0
 	add	w0, w0, 1
 	str	w0, [x23]
-	.loc 2 638 0
+	.loc 2 687 0
 	ldrh	w0, [x26, #:lo12:.LANCHOR20]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	bge	.L621
-	.loc 2 638 0 is_stmt 0 discriminator 1
+	bge	.L628
+	.loc 2 687 0 is_stmt 0 discriminator 1
 	ldrh	w1, [x19]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L622
-.L621:
-	.loc 2 639 0 is_stmt 1
+	bne	.L629
+.L628:
+	.loc 2 688 0 is_stmt 1
 	mov	x0, x19
 	bl	Ftl_write_map_blk_to_last_page
-.LVL873:
-.L622:
-	.loc 2 650 0
+.LVL875:
+.L629:
+	.loc 2 699 0
 	ldrh	w1, [x19]
 	ldr	x0, [x19, 16]
 	ldrh	w0, [x0, x1, lsl 1]
-	cbnz	w0, .L623
-	.loc 2 650 0 is_stmt 0 discriminator 1
+	cbnz	w0, .L630
+	.loc 2 699 0 is_stmt 0 discriminator 1
 	adrp	x0, .LC1
-	mov	w2, 650
+	mov	w2, 699
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL874:
-.L623:
-	.loc 2 651 0 is_stmt 1
+.LVL876:
+.L630:
+	.loc 2 700 0 is_stmt 1
 	ldrh	w1, [x19]
 	ldrh	w0, [x19, 10]
 	cmp	w1, w0
-	bcc	.L624
-	.loc 2 651 0 is_stmt 0 discriminator 1
+	bcc	.L631
+	.loc 2 700 0 is_stmt 0 discriminator 1
 	adrp	x0, .LC1
-	mov	w2, 651
+	mov	w2, 700
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL875:
-.L624:
-	.loc 2 652 0 is_stmt 1
+.LVL877:
+.L631:
+	.loc 2 701 0 is_stmt 1
 	ldrh	w1, [x19]
-	.loc 2 654 0
-	adrp	x21, .LANCHOR108
-	.loc 2 652 0
+	.loc 2 703 0
+	adrp	x21, .LANCHOR106
+	.loc 2 701 0
 	ldr	x0, [x19, 16]
-	.loc 2 654 0
-	add	x20, x21, :lo12:.LANCHOR108
-	.loc 2 658 0
+	.loc 2 703 0
+	add	x20, x21, :lo12:.LANCHOR106
+	.loc 2 707 0
 	mov	w2, 16
-	.loc 2 652 0
+	.loc 2 701 0
 	ldrh	w3, [x0, x1, lsl 1]
-.LVL876:
-	.loc 2 658 0
+.LVL878:
+	.loc 2 707 0
 	mov	w1, 0
-	.loc 2 654 0
+	.loc 2 703 0
 	ldrh	w0, [x19, 2]
 	str	w3, [x29, 108]
-	.loc 2 655 0
+	.loc 2 704 0
 	str	x27, [x20, 8]
-	.loc 2 654 0
+	.loc 2 703 0
 	orr	w0, w0, w3, lsl 10
 	str	w0, [x20, 4]
-	.loc 2 656 0
-	adrp	x0, .LANCHOR109
-	ldr	x0, [x0, #:lo12:.LANCHOR109]
+	.loc 2 705 0
+	adrp	x0, .LANCHOR108
+	ldr	x0, [x0, #:lo12:.LANCHOR108]
 	str	x0, [x20, 16]
-	.loc 2 658 0
+	.loc 2 707 0
 	bl	ftl_memset
-.LVL877:
-	.loc 2 659 0
+.LVL879:
+	.loc 2 708 0
 	ldr	x0, [x20, 16]
-.LVL878:
-	.loc 2 660 0
+.LVL880:
+	.loc 2 709 0
 	ldr	w1, [x19, 48]
-	.loc 2 663 0
+	.loc 2 712 0
 	ldr	w3, [x29, 108]
-	.loc 2 660 0
+	.loc 2 709 0
 	str	w1, [x0, 4]
-	.loc 2 662 0
+	.loc 2 711 0
 	ldrh	w1, [x19, 4]
 	strh	w1, [x0]
-	.loc 2 663 0
+	.loc 2 712 0
 	strh	w3, [x0, 2]
-	.loc 2 664 0
+	.loc 2 713 0
 	mov	w3, 1
-	.loc 2 661 0
+	.loc 2 710 0
 	strh	w25, [x0, 8]
-	.loc 2 664 0
+	.loc 2 713 0
 	mov	w1, w3
 	mov	w2, w3
 	mov	x0, x20
-.LVL879:
+.LVL881:
 	bl	FlashProgPages
-.LVL880:
-	.loc 2 665 0
+.LVL882:
+	.loc 2 714 0
 	ldrh	w0, [x19, 2]
-	.loc 2 667 0
-	ldr	w1, [x21, #:lo12:.LANCHOR108]
-	.loc 2 665 0
+	.loc 2 716 0
+	ldr	w1, [x21, #:lo12:.LANCHOR106]
+	.loc 2 714 0
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	strh	w0, [x19, 2]
-	.loc 2 667 0
+	.loc 2 716 0
 	cmn	w1, #1
-	bne	.L625
-	.loc 2 668 0
+	bne	.L632
+	.loc 2 717 0
 	ldr	w1, [x20, 4]
-	adrp	x0, .LC86
-	add	x0, x0, :lo12:.LC86
-	.loc 2 669 0
+	adrp	x0, .LC89
+	add	x0, x0, :lo12:.LC89
+	.loc 2 718 0
 	add	w22, w22, 1
-.LVL881:
+.LVL883:
 	and	w22, w22, 65535
-	.loc 2 668 0
+	.loc 2 717 0
 	bl	printf
-.LVL882:
-	.loc 2 670 0
+.LVL884:
+	.loc 2 719 0
 	ldrh	w0, [x19, 2]
 	cmp	w0, 2
-	bhi	.L626
-	.loc 2 671 0
+	bhi	.L633
+	.loc 2 720 0
 	ldrh	w0, [x28]
 	sub	w0, w0, #1
 	strh	w0, [x19, 2]
-.L626:
-	.loc 2 673 0
+.L633:
+	.loc 2 722 0
 	cmp	w22, 3
-	bls	.L627
-	.loc 2 674 0
-	add	x21, x21, :lo12:.LANCHOR108
-	adrp	x0, .LC87
+	bls	.L634
+	.loc 2 723 0
+	add	x21, x21, :lo12:.LANCHOR106
+	adrp	x0, .LC90
 	mov	w2, w22
-	add	x0, x0, :lo12:.LC87
+	add	x0, x0, :lo12:.LC90
 	ldr	w1, [x21, 4]
 	bl	printf
-.LVL883:
-.L628:
-	b	.L628
-.L627:
-	.loc 2 678 0
+.LVL885:
+.L635:
+	b	.L635
+.L634:
+	.loc 2 727 0
 	ldr	w0, [x19, 52]
-	cbz	w0, .L620
-.L637:
-	b	.L637
-.L625:
-	.loc 2 682 0
+	cbz	w0, .L627
+.L644:
+	b	.L644
+.L632:
+	.loc 2 731 0
 	cmp	w0, 1
-	beq	.L620
-	.loc 2 685 0
+	beq	.L627
+	.loc 2 734 0
 	ldr	x0, [x19, 40]
 	ldr	w1, [x20, 4]
-	.loc 2 687 0
+	.loc 2 736 0
 	ldp	x21, x22, [sp, 32]
-.LVL884:
+.LVL886:
 	ldp	x23, x24, [sp, 48]
 	ldp	x27, x28, [sp, 80]
-.LVL885:
-	.loc 2 685 0
+.LVL887:
+	.loc 2 734 0
 	str	w1, [x0, w25, uxtw 2]
-	.loc 2 687 0
+	.loc 2 736 0
 	ldp	x19, x20, [sp, 16]
-.LVL886:
+.LVL888:
 	mov	w0, 0
 	ldp	x25, x26, [sp, 64]
-.LVL887:
+.LVL889:
 	ldp	x29, x30, [sp], 112
 	.cfi_restore 30
 	.cfi_restore 29
@@ -8163,7 +8279,7 @@ FtlMapWritePage:
 	.cfi_restore 19
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
-.LVL888:
+.LVL890:
 	ret
 	.cfi_endproc
 .LFE258:
@@ -8174,9 +8290,9 @@ FtlMapWritePage:
 	.type	ftl_map_blk_gc, %function
 ftl_map_blk_gc:
 .LFB256:
-	.loc 2 537 0
+	.loc 2 586 0
 	.cfi_startproc
-.LVL889:
+.LVL891:
 	stp	x29, x30, [sp, -96]!
 	.cfi_def_cfa_offset 96
 	.cfi_offset 29, -96
@@ -8200,94 +8316,94 @@ ftl_map_blk_gc:
 	.cfi_offset 26, -24
 	.cfi_offset 27, -16
 	.cfi_offset 28, -8
-	.loc 2 541 0
+	.loc 2 590 0
 	ldr	x20, [x0, 16]
-.LVL890:
-	.loc 2 542 0
+.LVL892:
+	.loc 2 591 0
 	ldr	x24, [x0, 40]
-.LVL891:
-	.loc 2 545 0
+.LVL893:
+	.loc 2 594 0
 	bl	ftl_free_no_use_map_blk
-.LVL892:
-	.loc 2 547 0
+.LVL894:
+	.loc 2 596 0
 	ldrh	w1, [x19, 10]
 	ldrh	w2, [x19, 8]
 	sub	w1, w1, #4
 	cmp	w2, w1
-	blt	.L640
-	.loc 2 548 0
+	blt	.L647
+	.loc 2 597 0
 	ubfiz	x0, x0, 1, 16
-.LVL893:
+.LVL895:
 	ldrh	w21, [x20, x0]
-.LVL894:
-	.loc 2 549 0
-	cbz	w21, .L640
-	.loc 2 549 0 is_stmt 0 discriminator 1
+.LVL896:
+	.loc 2 598 0
+	cbz	w21, .L647
+	.loc 2 598 0 is_stmt 0 discriminator 1
 	ldr	w1, [x19, 52]
-	cbnz	w1, .L640
-	.loc 2 550 0 is_stmt 1
+	cbnz	w1, .L647
+	.loc 2 599 0 is_stmt 1
 	mov	w1, 1
 	str	w1, [x19, 52]
-	.loc 2 551 0
+	.loc 2 600 0
 	strh	wzr, [x20, x0]
-	.loc 2 552 0
+	.loc 2 601 0
 	ldrh	w0, [x19, 8]
-	.loc 2 553 0
+	.loc 2 602 0
 	ldrh	w1, [x19, 2]
-	.loc 2 552 0
+	.loc 2 601 0
 	sub	w0, w0, #1
 	strh	w0, [x19, 8]
-	.loc 2 553 0
+	.loc 2 602 0
 	ldrh	w0, [x23, #:lo12:.LANCHOR20]
 	cmp	w1, w0
-	bcc	.L641
-	.loc 2 554 0
+	bcc	.L648
+	.loc 2 603 0
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.LVL895:
-.L641:
-	.loc 2 558 0 discriminator 1
-	adrp	x25, .LANCHOR108
-	.loc 2 564 0 discriminator 1
+.LVL897:
+.L648:
+	.loc 2 607 0 discriminator 1
+	adrp	x25, .LANCHOR106
+	.loc 2 613 0 discriminator 1
 	adrp	x22, .LANCHOR143
-	.loc 2 565 0 discriminator 1
-	add	x26, x25, :lo12:.LANCHOR108
-	.loc 2 564 0 discriminator 1
+	.loc 2 614 0 discriminator 1
+	add	x26, x25, :lo12:.LANCHOR106
+	.loc 2 613 0 discriminator 1
 	add	x22, x22, :lo12:.LANCHOR143
-	.loc 2 537 0 discriminator 1
+	.loc 2 586 0 discriminator 1
 	mov	w20, 0
-.LVL896:
-.L642:
-	.loc 2 556 0 discriminator 1
+.LVL898:
+.L649:
+	.loc 2 605 0 discriminator 1
 	ldrh	w0, [x19, 6]
 	cmp	w0, w20
-	bhi	.L646
-	.loc 2 572 0
+	bhi	.L653
+	.loc 2 621 0
 	mov	w1, 1
 	mov	w0, w21
 	bl	FtlFreeSysBlkQueueIn
-.LVL897:
-	.loc 2 573 0
+.LVL899:
+	.loc 2 622 0
 	str	wzr, [x19, 52]
-.LVL898:
-.L640:
-	.loc 2 577 0
+.LVL900:
+.L647:
+	.loc 2 626 0
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x23, #:lo12:.LANCHOR20]
 	cmp	w1, w0
-	bcc	.L647
-	.loc 2 578 0
+	bcc	.L654
+	.loc 2 627 0
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.LVL899:
-.L647:
-	.loc 2 580 0
+.LVL901:
+.L654:
+	.loc 2 629 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-.LVL900:
+.LVL902:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL901:
+.LVL903:
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
@@ -8306,69 +8422,69 @@ ftl_map_blk_gc:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL902:
-.L646:
+.LVL904:
+.L653:
 	.cfi_restore_state
-	.loc 2 557 0
+	.loc 2 606 0
 	ubfiz	x27, x20, 2, 16
 	ldr	w1, [x24, x27]
 	cmp	w21, w1, lsr 10
-	bne	.L643
-	.loc 2 558 0
+	bne	.L650
+	.loc 2 607 0
 	adrp	x2, .LANCHOR123
-	add	x0, x25, :lo12:.LANCHOR108
+	add	x0, x25, :lo12:.LANCHOR106
 	ldr	x2, [x2, #:lo12:.LANCHOR123]
 	str	x2, [x0, 8]
-	.loc 2 559 0
-	adrp	x2, .LANCHOR109
-	.loc 2 560 0
+	.loc 2 608 0
+	adrp	x2, .LANCHOR108
+	.loc 2 609 0
 	str	w1, [x0, 4]
-	.loc 2 559 0
-	ldr	x28, [x2, #:lo12:.LANCHOR109]
-.LVL903:
-	.loc 2 562 0
+	.loc 2 608 0
+	ldr	x28, [x2, #:lo12:.LANCHOR108]
+.LVL905:
+	.loc 2 611 0
 	mov	w2, 1
-	.loc 2 559 0
+	.loc 2 608 0
 	str	x28, [x0, 16]
-	.loc 2 562 0
+	.loc 2 611 0
 	mov	w1, w2
 	bl	FlashReadPages
-.LVL904:
-	.loc 2 564 0
+.LVL906:
+	.loc 2 613 0
 	ldrh	w0, [x28, 8]
 	cmp	w0, w20
-	beq	.L644
-	.loc 2 564 0 is_stmt 0 discriminator 1
+	beq	.L651
+	.loc 2 613 0 is_stmt 0 discriminator 1
 	adrp	x0, .LC1
-	mov	w2, 564
+	mov	w2, 613
 	mov	x1, x22
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL905:
-.L644:
-	.loc 2 565 0 is_stmt 1
+.LVL907:
+.L651:
+	.loc 2 614 0 is_stmt 1
 	ldr	w0, [x26]
 	cmn	w0, #1
-	bne	.L645
-	.loc 2 566 0
+	bne	.L652
+	.loc 2 615 0
 	str	wzr, [x24, x27]
-.LVL906:
-.L643:
-	.loc 2 556 0 discriminator 2
-	add	w20, w20, 1
-.LVL907:
-	and	w20, w20, 65535
 .LVL908:
-	b	.L642
+.L650:
+	.loc 2 605 0 discriminator 2
+	add	w20, w20, 1
 .LVL909:
-.L645:
-	.loc 2 568 0
+	and	w20, w20, 65535
+.LVL910:
+	b	.L649
+.LVL911:
+.L652:
+	.loc 2 617 0
 	ldr	x2, [x26, 8]
 	mov	w1, w20
 	mov	x0, x19
 	bl	FtlMapWritePage
-.LVL910:
-	b	.L643
+.LVL912:
+	b	.L650
 	.cfi_endproc
 .LFE256:
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
@@ -8378,9 +8494,9 @@ ftl_map_blk_gc:
 	.type	flush_l2p_region, %function
 flush_l2p_region:
 .LFB259:
-	.loc 2 690 0
+	.loc 2 739 0
 	.cfi_startproc
-.LVL911:
+.LVL913:
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
@@ -8390,31 +8506,31 @@ flush_l2p_region:
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -16
 	.cfi_offset 20, -8
-	.loc 2 693 0
-	adrp	x20, .LANCHOR56
+	.loc 2 742 0
+	adrp	x20, .LANCHOR55
 	ubfiz	x19, x0, 4, 16
-	ldr	x0, [x20, #:lo12:.LANCHOR56]
-.LVL912:
+	ldr	x0, [x20, #:lo12:.LANCHOR55]
+.LVL914:
 	add	x1, x0, x19
-.LVL913:
-	.loc 2 694 0
+.LVL915:
+	.loc 2 743 0
 	ldr	x2, [x1, 8]
 	ldrh	w1, [x0, x19]
-.LVL914:
+.LVL916:
 	adrp	x0, .LANCHOR144
 	add	x0, x0, :lo12:.LANCHOR144
 	bl	FtlMapWritePage
-.LVL915:
-	.loc 2 695 0
-	ldr	x0, [x20, #:lo12:.LANCHOR56]
+.LVL917:
+	.loc 2 744 0
+	ldr	x0, [x20, #:lo12:.LANCHOR55]
 	add	x0, x0, x19
-	.loc 2 697 0
+	.loc 2 746 0
 	ldp	x19, x20, [sp, 16]
-	.loc 2 695 0
+	.loc 2 744 0
 	ldr	w1, [x0, 4]
 	and	w1, w1, 2147483647
 	str	w1, [x0, 4]
-	.loc 2 697 0
+	.loc 2 746 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 32
 	.cfi_restore 30
@@ -8432,9 +8548,9 @@ flush_l2p_region:
 	.type	log2phys, %function
 log2phys:
 .LFB262:
-	.loc 2 753 0
+	.loc 2 802 0
 	.cfi_startproc
-.LVL916:
+.LVL918:
 	stp	x29, x30, [sp, -80]!
 	.cfi_def_cfa_offset 80
 	.cfi_offset 29, -80
@@ -8445,10 +8561,10 @@ log2phys:
 	.cfi_offset 23, -32
 	.cfi_offset 24, -24
 	mov	x23, x1
-	.loc 2 756 0
+	.loc 2 805 0
 	adrp	x1, .LANCHOR22
-.LVL917:
-	.loc 2 753 0
+.LVL919:
+	.loc 2 802 0
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	mov	w24, w2
@@ -8456,131 +8572,131 @@ log2phys:
 	.cfi_offset 20, -56
 	.cfi_offset 21, -48
 	.cfi_offset 22, -40
-	.loc 2 756 0
+	.loc 2 805 0
 	ldrh	w19, [x1, #:lo12:.LANCHOR22]
-	.loc 2 753 0
+	.loc 2 802 0
 	str	x25, [sp, 64]
 	.cfi_offset 25, -16
-	.loc 2 756 0
+	.loc 2 805 0
 	add	w1, w19, 7
-	.loc 2 757 0
+	.loc 2 806 0
 	mov	x19, 1
-	.loc 2 756 0
+	.loc 2 805 0
 	lsr	w22, w0, w1
 	and	w22, w22, 65535
-.LVL918:
-	.loc 2 757 0
+.LVL920:
+	.loc 2 806 0
 	lsl	x19, x19, x1
-	.loc 2 759 0
-	adrp	x1, .LANCHOR62
-	.loc 2 757 0
+	.loc 2 808 0
+	adrp	x1, .LANCHOR61
+	.loc 2 806 0
 	sub	w19, w19, #1
-	.loc 2 759 0
-	ldr	w1, [x1, #:lo12:.LANCHOR62]
-	.loc 2 757 0
+	.loc 2 808 0
+	ldr	w1, [x1, #:lo12:.LANCHOR61]
+	.loc 2 806 0
 	and	w19, w19, w0
 	and	x19, x19, 65535
-.LVL919:
-	.loc 2 759 0
+.LVL921:
+	.loc 2 808 0
 	cmp	w0, w1
-	bcc	.L655
-	.loc 2 759 0 is_stmt 0 discriminator 1
+	bcc	.L662
+	.loc 2 808 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR145
 	adrp	x0, .LC1
-.LVL920:
-	mov	w2, 759
-.LVL921:
+.LVL922:
+	mov	w2, 808
+.LVL923:
 	add	x1, x1, :lo12:.LANCHOR145
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL922:
-.L655:
-	.loc 2 762 0 is_stmt 1
-	adrp	x21, .LANCHOR56
-	.loc 2 761 0
+.LVL924:
+.L662:
+	.loc 2 811 0 is_stmt 1
+	adrp	x21, .LANCHOR55
+	.loc 2 810 0
 	adrp	x0, .LANCHOR33
-	.loc 2 762 0
-	ldr	x2, [x21, #:lo12:.LANCHOR56]
-	.loc 2 761 0
+	.loc 2 811 0
+	ldr	x2, [x21, #:lo12:.LANCHOR55]
+	.loc 2 810 0
 	ldrh	w1, [x0, #:lo12:.LANCHOR33]
 	mov	x0, 0
-.LVL923:
-.L656:
+.LVL925:
+.L663:
 	and	x20, x0, 65535
-.LVL924:
-	.loc 2 761 0 is_stmt 0 discriminator 1
+.LVL926:
+	.loc 2 810 0 is_stmt 0 discriminator 1
 	cmp	w20, w1
-	bcc	.L661
-	.loc 2 776 0 is_stmt 1
+	bcc	.L668
+	.loc 2 825 0 is_stmt 1
 	bl	select_l2p_ram_region
-.LVL925:
+.LVL927:
 	and	x20, x0, 65535
-.LVL926:
-	.loc 2 777 0
-	ldr	x2, [x21, #:lo12:.LANCHOR56]
+.LVL928:
+	.loc 2 826 0
+	ldr	x2, [x21, #:lo12:.LANCHOR55]
 	ubfiz	x1, x20, 4, 16
-	.loc 2 776 0
+	.loc 2 825 0
 	mov	w25, w0
-	.loc 2 777 0
+	.loc 2 826 0
 	add	x3, x2, x1
 	ldrh	w2, [x2, x1]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L662
-	.loc 2 777 0 is_stmt 0 discriminator 1
+	beq	.L669
+	.loc 2 826 0 is_stmt 0 discriminator 1
 	ldr	w1, [x3, 4]
-	tbz	w1, #31, .L662
-	.loc 2 778 0 is_stmt 1
+	tbz	w1, #31, .L669
+	.loc 2 827 0 is_stmt 1
 	bl	flush_l2p_region
-.LVL927:
-.L662:
-	.loc 2 781 0
+.LVL929:
+.L669:
+	.loc 2 830 0
 	mov	w1, w25
 	mov	w0, w22
 	bl	load_l2p_region
-.LVL928:
-	.loc 2 782 0
-	b	.L657
-.LVL929:
-.L661:
+.LVL930:
+	.loc 2 831 0
+	b	.L664
+.LVL931:
+.L668:
 	add	x0, x0, 1
-	.loc 2 762 0
+	.loc 2 811 0
 	add	x3, x2, x0, lsl 4
 	ldrh	w3, [x3, -16]
 	cmp	w3, w22
-	bne	.L656
-.LVL930:
-.L657:
-	.loc 2 765 0
-	ldr	x0, [x21, #:lo12:.LANCHOR56]
+	bne	.L663
+.LVL932:
+.L664:
+	.loc 2 814 0
+	ldr	x0, [x21, #:lo12:.LANCHOR55]
 	add	x0, x0, x20, lsl 4
-	.loc 2 764 0
-	cbnz	w24, .L658
-	.loc 2 765 0
+	.loc 2 813 0
+	cbnz	w24, .L665
+	.loc 2 814 0
 	ldr	x0, [x0, 8]
 	ldr	w0, [x0, x19, lsl 2]
 	str	w0, [x23]
-.L659:
-	.loc 2 771 0
-	ldr	x0, [x21, #:lo12:.LANCHOR56]
+.L666:
+	.loc 2 820 0
+	ldr	x0, [x21, #:lo12:.LANCHOR55]
 	add	x20, x0, x20, lsl 4
-.LVL931:
+.LVL933:
 	ldr	w0, [x20, 4]
 	cmn	w0, #1
-	beq	.L664
-	.loc 2 772 0
+	beq	.L671
+	.loc 2 821 0
 	add	w0, w0, 1
 	str	w0, [x20, 4]
-.L664:
-	.loc 2 783 0
+.L671:
+	.loc 2 832 0
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
-.LVL932:
+.LVL934:
 	ldp	x21, x22, [sp, 32]
-.LVL933:
+.LVL935:
 	ldp	x23, x24, [sp, 48]
-.LVL934:
+.LVL936:
 	ldp	x29, x30, [sp], 80
 	.cfi_remember_state
 	.cfi_restore 30
@@ -8594,21 +8710,21 @@ log2phys:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL935:
-.L658:
+.LVL937:
+.L665:
 	.cfi_restore_state
-	.loc 2 767 0
+	.loc 2 816 0
 	ldr	x1, [x0, 8]
 	ldr	w2, [x23]
 	str	w2, [x1, x19, lsl 2]
-	.loc 2 768 0
+	.loc 2 817 0
 	ldr	w1, [x0, 4]
 	orr	w1, w1, -2147483648
 	str	w1, [x0, 4]
-	.loc 2 769 0
-	adrp	x0, .LANCHOR57
-	strh	w22, [x0, #:lo12:.LANCHOR57]
-	b	.L659
+	.loc 2 818 0
+	adrp	x0, .LANCHOR56
+	strh	w22, [x0, #:lo12:.LANCHOR56]
+	b	.L666
 	.cfi_endproc
 .LFE262:
 	.size	log2phys, .-log2phys
@@ -8618,9 +8734,9 @@ log2phys:
 	.type	FtlReUsePrevPpa, %function
 FtlReUsePrevPpa:
 .LFB280:
-	.loc 2 1628 0
+	.loc 2 1677 0
 	.cfi_startproc
-.LVL936:
+.LVL938:
 	stp	x29, x30, [sp, -80]!
 	.cfi_def_cfa_offset 80
 	.cfi_offset 29, -80
@@ -8630,110 +8746,110 @@ FtlReUsePrevPpa:
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -48
 	.cfi_offset 22, -40
-	.loc 2 1631 0
-	adrp	x22, .LANCHOR43
-	.loc 2 1628 0
+	.loc 2 1680 0
+	adrp	x22, .LANCHOR42
+	.loc 2 1677 0
 	stp	x19, x20, [sp, 16]
 	mov	w21, w0
 	str	w1, [x29, 76]
-	.loc 2 1629 0
+	.loc 2 1678 0
 	lsr	w0, w1, 10
-.LVL937:
-	.loc 2 1628 0
+.LVL939:
+	.loc 2 1677 0
 	str	x23, [sp, 48]
 	.cfi_offset 19, -64
 	.cfi_offset 20, -56
 	.cfi_offset 23, -32
-	.loc 2 1629 0
+	.loc 2 1678 0
 	bl	P2V_block_in_plane
-.LVL938:
-	.loc 2 1631 0
-	ldr	x2, [x22, #:lo12:.LANCHOR43]
-	.loc 2 1629 0
+.LVL940:
+	.loc 2 1680 0
+	ldr	x2, [x22, #:lo12:.LANCHOR42]
+	.loc 2 1678 0
 	and	w3, w0, 65535
-.LVL939:
-	.loc 2 1631 0
+.LVL941:
+	.loc 2 1680 0
 	ubfiz	x20, x3, 1, 16
 	ldrh	w1, [x2, x20]
-	cbnz	w1, .L670
-	.loc 2 1632 0
+	cbnz	w1, .L677
+	.loc 2 1681 0
 	adrp	x0, .LANCHOR47
-.LVL940:
+.LVL942:
 	ldr	x19, [x0, #:lo12:.LANCHOR47]
-	cbz	x19, .L671
-.LBB225:
-	.loc 2 1636 0
-	adrp	x2, .LANCHOR41
+	cbz	x19, .L678
+.LBB260:
+	.loc 2 1685 0
+	adrp	x2, .LANCHOR40
 	mov	x5, -6148914691236517206
 	movk	x5, 0xaaab, lsl 0
-	.loc 2 1635 0
+	.loc 2 1684 0
 	adrp	x23, .LANCHOR48
-	.loc 2 1636 0
-	ldr	x2, [x2, #:lo12:.LANCHOR41]
-	.loc 2 1644 0
+	.loc 2 1685 0
+	ldr	x2, [x2, #:lo12:.LANCHOR40]
+	.loc 2 1693 0
 	mov	w6, 65535
-	.loc 2 1635 0
+	.loc 2 1684 0
 	ldrh	w4, [x23, #:lo12:.LANCHOR48]
-.LVL941:
-	.loc 2 1636 0
+.LVL943:
+	.loc 2 1685 0
 	sub	x19, x19, x2
 	asr	x19, x19, 1
 	mul	x19, x19, x5
-	.loc 2 1644 0
+	.loc 2 1693 0
 	mov	w5, 6
-	.loc 2 1636 0
+	.loc 2 1685 0
 	and	w19, w19, 65535
-.LVL942:
-.L672:
-	.loc 2 1637 0 discriminator 1
+.LVL944:
+.L679:
+	.loc 2 1686 0 discriminator 1
 	cmp	w1, w4
-	beq	.L671
-	.loc 2 1638 0
+	beq	.L678
+	.loc 2 1687 0
 	cmp	w19, w3
-	bne	.L673
-	.loc 2 1639 0
+	bne	.L680
+	.loc 2 1688 0
 	mov	w1, w19
-.LVL943:
+.LVL945:
 	add	x0, x0, :lo12:.LANCHOR47
 	bl	List_remove_node
-.LVL944:
+.LVL946:
 	ldrh	w0, [x23, #:lo12:.LANCHOR48]
-	cbnz	w0, .L674
-	.loc 2 1639 0 is_stmt 0 discriminator 1
+	cbnz	w0, .L681
+	.loc 2 1688 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR146
 	adrp	x0, .LC1
-	mov	w2, 1639
+	mov	w2, 1688
 	add	x1, x1, :lo12:.LANCHOR146
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL945:
-.L674:
-	.loc 2 1639 0 discriminator 3
+.LVL947:
+.L681:
+	.loc 2 1688 0 discriminator 3
 	ldrh	w0, [x23, #:lo12:.LANCHOR48]
 	sub	w0, w0, #1
 	strh	w0, [x23, #:lo12:.LANCHOR48]
-	.loc 2 1640 0 is_stmt 1 discriminator 3
+	.loc 2 1689 0 is_stmt 1 discriminator 3
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-.LVL946:
-	.loc 2 1641 0 discriminator 3
-	ldr	x1, [x22, #:lo12:.LANCHOR43]
+.LVL948:
+	.loc 2 1690 0 discriminator 3
+	ldr	x1, [x22, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x20]
 	add	w0, w0, 1
 	strh	w0, [x1, x20]
-.LVL947:
-.L671:
-.LBE225:
-	.loc 2 1652 0
+.LVL949:
+.L678:
+.LBE260:
+	.loc 2 1701 0
 	add	x1, x29, 76
 	mov	w2, 1
 	mov	w0, w21
 	bl	log2phys
-.LVL948:
-	.loc 2 1653 0
+.LVL950:
+	.loc 2 1702 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-.LVL949:
+.LVL951:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	.cfi_remember_state
@@ -8746,30 +8862,30 @@ FtlReUsePrevPpa:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL950:
-.L673:
+.LVL952:
+.L680:
 	.cfi_restore_state
-.LBB226:
-	.loc 2 1644 0
+.LBB261:
+	.loc 2 1693 0
 	umull	x19, w19, w5
-.LVL951:
+.LVL953:
 	ldrh	w19, [x2, x19]
 	cmp	w19, w6
-	beq	.L671
-.LVL952:
-	.loc 2 1637 0 discriminator 2
-	add	w1, w1, 1
-.LVL953:
-	and	w1, w1, 65535
+	beq	.L678
 .LVL954:
-	b	.L672
+	.loc 2 1686 0 discriminator 2
+	add	w1, w1, 1
 .LVL955:
-.L670:
-.LBE226:
-	.loc 2 1650 0
+	and	w1, w1, 65535
+.LVL956:
+	b	.L679
+.LVL957:
+.L677:
+.LBE261:
+	.loc 2 1699 0
 	add	w1, w1, 1
 	strh	w1, [x2, x20]
-	b	.L671
+	b	.L678
 	.cfi_endproc
 .LFE280:
 	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
@@ -8779,15 +8895,15 @@ FtlReUsePrevPpa:
 	.type	ftl_scan_all_data, %function
 ftl_scan_all_data:
 .LFB291:
-	.loc 2 2275 0
+	.loc 2 2325 0
 	.cfi_startproc
 	sub	sp, sp, #96
 	.cfi_def_cfa_offset 96
-	.loc 2 2280 0
-	adrp	x0, .LC88
+	.loc 2 2330 0
+	adrp	x0, .LC91
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC88
-	.loc 2 2275 0
+	add	x0, x0, :lo12:.LC91
+	.loc 2 2325 0
 	stp	x29, x30, [sp, 16]
 	.cfi_offset 29, -80
 	.cfi_offset 30, -72
@@ -8796,33 +8912,33 @@ ftl_scan_all_data:
 	stp	x19, x20, [sp, 32]
 	.cfi_offset 19, -64
 	.cfi_offset 20, -56
-	.loc 2 2286 0
-	adrp	x20, .LANCHOR108
-	.loc 2 2275 0
+	.loc 2 2336 0
+	adrp	x20, .LANCHOR106
+	.loc 2 2325 0
 	stp	x21, x22, [sp, 48]
-	.loc 2 2281 0
+	.loc 2 2331 0
 	mov	w19, 0
 	.cfi_offset 21, -48
 	.cfi_offset 22, -40
-	adrp	x21, .LANCHOR62
-	.loc 2 2297 0
-	add	x22, x20, :lo12:.LANCHOR108
-	.loc 2 2281 0
-	add	x21, x21, :lo12:.LANCHOR62
-	.loc 2 2275 0
+	adrp	x21, .LANCHOR61
+	.loc 2 2347 0
+	add	x22, x20, :lo12:.LANCHOR106
+	.loc 2 2331 0
+	add	x21, x21, :lo12:.LANCHOR61
+	.loc 2 2325 0
 	str	x23, [sp, 64]
 	.cfi_offset 23, -32
-	.loc 2 2280 0
+	.loc 2 2330 0
 	bl	printf
-.LVL956:
-.L681:
-	.loc 2 2281 0 discriminator 1
+.LVL958:
+.L688:
+	.loc 2 2331 0 discriminator 1
 	ldr	w0, [x21]
 	cmp	w19, w0
-	bcc	.L687
-	.loc 2 2303 0
+	bcc	.L694
+	.loc 2 2353 0
 	ldp	x19, x20, [sp, 32]
-.LVL957:
+.LVL959:
 	ldp	x21, x22, [sp, 48]
 	ldp	x29, x30, [sp, 16]
 	ldr	x23, [sp, 64]
@@ -8837,84 +8953,84 @@ ftl_scan_all_data:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL958:
-.L687:
+.LVL960:
+.L694:
 	.cfi_restore_state
-	.loc 2 2282 0
+	.loc 2 2332 0
 	mov	w2, 0
 	add	x1, x29, 76
 	mov	w0, w19
 	bl	log2phys
-.LVL959:
-	.loc 2 2283 0
+.LVL961:
+	.loc 2 2333 0
 	tst	x19, 2047
-	bne	.L682
-	.loc 2 2284 0
+	bne	.L689
+	.loc 2 2334 0
 	ldr	w2, [x29, 76]
-	adrp	x0, .LC89
+	adrp	x0, .LC92
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC89
+	add	x0, x0, :lo12:.LC92
 	bl	printf
-.LVL960:
-.L682:
-	.loc 2 2285 0
+.LVL962:
+.L689:
+	.loc 2 2335 0
 	ldr	w1, [x29, 76]
 	cmn	w1, #1
-	beq	.L684
-	.loc 2 2286 0
-	add	x0, x20, :lo12:.LANCHOR108
-	.loc 2 2290 0
-	str	wzr, [x20, #:lo12:.LANCHOR108]
-	.loc 2 2292 0
+	beq	.L691
+	.loc 2 2336 0
+	add	x0, x20, :lo12:.LANCHOR106
+	.loc 2 2340 0
+	str	wzr, [x20, #:lo12:.LANCHOR106]
+	.loc 2 2342 0
 	mov	w2, 0
-	.loc 2 2286 0
+	.loc 2 2336 0
 	str	w1, [x0, 4]
-	.loc 2 2288 0
-	adrp	x1, .LANCHOR39
-	.loc 2 2287 0
+	.loc 2 2338 0
+	adrp	x1, .LANCHOR107
+	.loc 2 2337 0
 	str	w19, [x0, 24]
-	.loc 2 2288 0
-	ldr	x1, [x1, #:lo12:.LANCHOR39]
+	.loc 2 2338 0
+	ldr	x1, [x1, #:lo12:.LANCHOR107]
 	str	x1, [x0, 8]
-	.loc 2 2289 0
-	adrp	x1, .LANCHOR109
-	ldr	x23, [x1, #:lo12:.LANCHOR109]
-.LVL961:
-	.loc 2 2292 0
+	.loc 2 2339 0
+	adrp	x1, .LANCHOR108
+	ldr	x23, [x1, #:lo12:.LANCHOR108]
+.LVL963:
+	.loc 2 2342 0
 	mov	w1, 1
-	.loc 2 2289 0
+	.loc 2 2339 0
 	str	x23, [x0, 16]
-	.loc 2 2292 0
+	.loc 2 2342 0
 	bl	FlashReadPages
-.LVL962:
-	.loc 2 2293 0
-	ldr	w0, [x20, #:lo12:.LANCHOR108]
+.LVL964:
+	.loc 2 2343 0
+	ldr	w0, [x20, #:lo12:.LANCHOR106]
 	cmp	w0, 256
 	ccmn	w0, #1, 4, ne
-	beq	.L685
-	.loc 2 2294 0
+	beq	.L692
+	.loc 2 2344 0
 	ldr	w0, [x23, 8]
 	cmp	w19, w0
-	beq	.L684
-.L685:
-	.loc 2 2297 0
+	beq	.L691
+.L692:
+	.loc 2 2347 0
 	ldp	x1, x0, [x22, 8]
 	ldr	w2, [x1, 4]
 	str	w2, [sp]
 	ldr	w2, [x22, 4]
 	ldp	w3, w4, [x0]
 	ldp	w5, w6, [x0, 8]
-	adrp	x0, .LC90
+	adrp	x0, .LC93
 	ldr	w7, [x1]
-	add	x0, x0, :lo12:.LC90
+	add	x0, x0, :lo12:.LC93
 	mov	w1, w19
 	bl	printf
-.LVL963:
-.L684:
-	.loc 2 2281 0 discriminator 2
+.LVL965:
+.L691:
+	.loc 2 2331 0 discriminator 2
 	add	w19, w19, 1
-.LVL964:
-	b	.L681
+.LVL966:
+	b	.L688
 	.cfi_endproc
 .LFE291:
 	.size	ftl_scan_all_data, .-ftl_scan_all_data
@@ -8926,18 +9042,18 @@ FtlReadRefresh:
 .LFB318:
 	.loc 5 419 0
 	.cfi_startproc
-.LVL965:
+.LVL967:
 	.loc 5 425 0
-	adrp	x1, .LANCHOR83
-	add	x0, x1, :lo12:.LANCHOR83
+	adrp	x1, .LANCHOR81
+	add	x0, x1, :lo12:.LANCHOR81
 	ldr	w2, [x0, 80]
-	cbz	w2, .L690
+	cbz	w2, .L697
 	.loc 5 426 0
-	adrp	x1, .LANCHOR62
+	adrp	x1, .LANCHOR61
 	ldr	w3, [x0, 84]
-	ldr	w2, [x1, #:lo12:.LANCHOR62]
+	ldr	w2, [x1, #:lo12:.LANCHOR61]
 	cmp	w3, w2
-	bcs	.L691
+	bcs	.L698
 	.loc 5 419 0
 	stp	x29, x30, [sp, -160]!
 	.cfi_def_cfa_offset 160
@@ -8948,31 +9064,31 @@ FtlReadRefresh:
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -144
 	.cfi_offset 20, -136
-.LBB232:
-.LBB233:
+.LBB267:
+.LBB268:
 	.loc 5 428 0
 	mov	x19, x0
-	add	x20, x1, :lo12:.LANCHOR62
-.LBE233:
-.LBE232:
+	add	x20, x1, :lo12:.LANCHOR61
+.LBE268:
+.LBE267:
 	.loc 5 419 0
 	str	x21, [sp, 32]
 	.cfi_offset 21, -128
 	mov	w21, 2048
-.L696:
-.LVL966:
-.LBB238:
-.LBB235:
+.L703:
+.LVL968:
+.LBB273:
+.LBB270:
 	.loc 5 428 0
 	ldr	w0, [x19, 84]
 	ldr	w1, [x20]
 	cmp	w0, w1
-	bcs	.L693
+	bcs	.L700
 	.loc 5 430 0
 	add	x1, x29, 60
 	mov	w2, 0
 	bl	log2phys
-.LVL967:
+.LVL969:
 	.loc 5 431 0
 	ldr	w0, [x19, 84]
 	.loc 5 432 0
@@ -8982,8 +9098,8 @@ FtlReadRefresh:
 	str	w0, [x19, 84]
 	.loc 5 432 0
 	cmn	w1, #1
-	beq	.L694
-.LBB234:
+	beq	.L701
+.LBB269:
 	.loc 5 435 0
 	str	w0, [x29, 88]
 	.loc 5 436 0
@@ -9004,29 +9120,29 @@ FtlReadRefresh:
 	str	wzr, [x0, -96]!
 	.loc 5 439 0
 	bl	FlashReadPages
-.LVL968:
+.LVL970:
 	.loc 5 440 0
 	ldr	w0, [x29, 64]
 	cmp	w0, 256
-	bne	.L693
+	bne	.L700
 	.loc 5 442 0
 	ldr	w0, [x29, 60]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL969:
+.LVL971:
 	bl	FtlGcRefreshBlock
-.LVL970:
-.L693:
-.LBE234:
-.LBE235:
-.LBE238:
+.LVL972:
+.L700:
+.LBE269:
+.LBE270:
+.LBE273:
 	.loc 5 466 0
 	ldp	x19, x20, [sp, 16]
-.LBB239:
-.LBB236:
+.LBB274:
+.LBB271:
 	mov	w0, -1
-.LBE236:
-.LBE239:
+.LBE271:
+.LBE274:
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 160
 	.cfi_remember_state
@@ -9037,73 +9153,73 @@ FtlReadRefresh:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL971:
-.L694:
+.LVL973:
+.L701:
 	.cfi_restore_state
-.LBB240:
-.LBB237:
+.LBB275:
+.LBB272:
 	.loc 5 427 0
 	subs	w21, w21, #1
-.LVL972:
-	bne	.L696
-	b	.L693
-.LVL973:
-.L691:
+.LVL974:
+	bne	.L703
+	b	.L700
+.LVL975:
+.L698:
 	.cfi_def_cfa 31, 0
 	.cfi_restore 19
 	.cfi_restore 20
 	.cfi_restore 21
 	.cfi_restore 29
 	.cfi_restore 30
-.LBE237:
-.LBE240:
+.LBE272:
+.LBE275:
 	.loc 5 451 0
-	adrp	x1, .LANCHOR63
+	adrp	x1, .LANCHOR62
 	.loc 5 450 0
 	str	wzr, [x0, 84]
 	.loc 5 451 0
-	ldr	w1, [x1, #:lo12:.LANCHOR63]
+	ldr	w1, [x1, #:lo12:.LANCHOR62]
 	.loc 5 449 0
 	stp	w1, wzr, [x0, 76]
-.L700:
+.L707:
 	.loc 5 420 0
 	mov	w0, 0
 	.loc 5 465 0
 	ret
-.L690:
-.LVL974:
-.LBB241:
+.L697:
+.LVL976:
+.LBB276:
 	.loc 5 456 0
 	ldr	w4, [x0, 76]
-	adrp	x0, .LANCHOR63
-	ldr	w2, [x0, #:lo12:.LANCHOR63]
+	adrp	x0, .LANCHOR62
+	ldr	w2, [x0, #:lo12:.LANCHOR62]
 	add	w0, w2, 1048576
 	cmp	w4, w0
-	bhi	.L699
+	bhi	.L706
 	.loc 5 454 0
-	adrp	x0, .LANCHOR77
-	ldr	w0, [x0, #:lo12:.LANCHOR77]
+	adrp	x0, .LANCHOR76
+	ldr	w0, [x0, #:lo12:.LANCHOR76]
 	lsr	w3, w0, 10
 	mov	w0, 33554432
 	asr	w0, w0, w3
 	.loc 5 457 0
 	add	w0, w0, w4
 	cmp	w2, w0
-	bhi	.L699
+	bhi	.L706
 	.loc 5 458 0
-	adrp	x0, .LANCHOR79+28
-	ldrb	w0, [x0, #:lo12:.LANCHOR79+28]
-	cbnz	w0, .L700
-.L699:
+	adrp	x0, .LANCHOR39+28
+	ldrb	w0, [x0, #:lo12:.LANCHOR39+28]
+	cbnz	w0, .L707
+.L706:
 	.loc 5 460 0
-	add	x0, x1, :lo12:.LANCHOR83
+	add	x0, x1, :lo12:.LANCHOR81
 	mov	w1, 1
 	.loc 5 461 0
 	str	wzr, [x0, 84]
 	.loc 5 460 0
 	stp	w2, w1, [x0, 76]
-	b	.L700
-.LBE241:
+	b	.L707
+.LBE276:
 	.cfi_endproc
 .LFE318:
 	.size	FtlReadRefresh, .-FtlReadRefresh
@@ -9113,80 +9229,80 @@ FtlReadRefresh:
 	.type	FtlMapBlkWriteDump_data, %function
 FtlMapBlkWriteDump_data:
 .LFB267:
-	.loc 2 897 0
+	.loc 2 946 0
 	.cfi_startproc
-.LVL975:
-	.loc 2 903 0
+.LVL977:
+	.loc 2 952 0
 	ldr	w1, [x0, 56]
-	cbz	w1, .L706
-	.loc 2 897 0
+	cbz	w1, .L713
+	.loc 2 946 0
 	stp	x29, x30, [sp, -48]!
 	.cfi_def_cfa_offset 48
 	.cfi_offset 29, -48
 	.cfi_offset 30, -40
-.LVL976:
-	.loc 2 907 0
-	adrp	x1, .LANCHOR108
-	.loc 2 908 0
-	adrp	x2, .LANCHOR109
-	.loc 2 897 0
+.LVL978:
+	.loc 2 956 0
+	adrp	x1, .LANCHOR106
+	.loc 2 957 0
+	adrp	x2, .LANCHOR108
+	.loc 2 946 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -32
 	.cfi_offset 20, -24
 	mov	x19, x0
-	.loc 2 899 0
+	.loc 2 948 0
 	ldrh	w20, [x0, 6]
-	.loc 2 907 0
+	.loc 2 956 0
 	adrp	x0, .LANCHOR123
-.LVL977:
-	.loc 2 908 0
-	ldr	x2, [x2, #:lo12:.LANCHOR109]
-	.loc 2 907 0
+.LVL979:
+	.loc 2 957 0
+	ldr	x2, [x2, #:lo12:.LANCHOR108]
+	.loc 2 956 0
 	ldr	x3, [x0, #:lo12:.LANCHOR123]
-	add	x0, x1, :lo12:.LANCHOR108
-	.loc 2 899 0
+	add	x0, x1, :lo12:.LANCHOR106
+	.loc 2 948 0
 	sub	w20, w20, #1
-	.loc 2 900 0
+	.loc 2 949 0
 	ldr	x4, [x19, 40]
-	.loc 2 899 0
+	.loc 2 948 0
 	and	w20, w20, 65535
-	.loc 2 897 0
+	.loc 2 946 0
 	str	x21, [sp, 32]
 	.cfi_offset 21, -16
-	.loc 2 908 0
+	.loc 2 957 0
 	stp	x3, x2, [x0, 8]
-	.loc 2 930 0
+	.loc 2 979 0
 	ubfiz	x2, x20, 2, 16
-	.loc 2 905 0
+	.loc 2 954 0
 	str	wzr, [x19, 56]
 	mov	x21, x1
-	.loc 2 930 0
+	.loc 2 979 0
 	ldr	w2, [x4, x2]
-.LVL978:
-	.loc 2 931 0
+.LVL980:
+	.loc 2 980 0
 	str	w2, [x0, 4]
-	.loc 2 932 0
-	cbz	w2, .L708
-	.loc 2 934 0
+	.loc 2 981 0
+	cbz	w2, .L715
+	.loc 2 983 0
 	mov	w2, 1
-.LVL979:
+.LVL981:
 	mov	w1, w2
 	bl	FlashReadPages
-.LVL980:
-.L709:
-	.loc 2 941 0
-	add	x1, x21, :lo12:.LANCHOR108
+.LVL982:
+.L716:
+	.loc 2 990 0
+	add	x1, x21, :lo12:.LANCHOR106
 	mov	x0, x19
-	.loc 2 943 0
+	.loc 2 992 0
 	ldr	x21, [sp, 32]
-	.loc 2 941 0
+	.loc 2 990 0
 	ldr	x2, [x1, 8]
 	mov	w1, w20
-	.loc 2 943 0
+	.loc 2 992 0
 	ldp	x19, x20, [sp, 16]
-.LVL981:
+.LVL983:
 	ldp	x29, x30, [sp], 48
 	.cfi_remember_state
 	.cfi_restore 30
@@ -9195,22 +9311,22 @@ FtlMapBlkWriteDump_data:
 	.cfi_restore 19
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
-	.loc 2 941 0
+	.loc 2 990 0
 	b	FtlMapWritePage
-.LVL982:
-.L708:
+.LVL984:
+.L715:
 	.cfi_restore_state
-	.loc 2 938 0
+	.loc 2 987 0
 	adrp	x0, .LANCHOR23
 	mov	w1, 255
 	ldrh	w2, [x0, #:lo12:.LANCHOR23]
-.LVL983:
+.LVL985:
 	mov	x0, x3
 	bl	ftl_memset
-.LVL984:
-	b	.L709
-.LVL985:
-.L706:
+.LVL986:
+	b	.L716
+.LVL987:
+.L713:
 	.cfi_def_cfa 31, 0
 	.cfi_restore 19
 	.cfi_restore 20
@@ -9227,636 +9343,632 @@ FtlMapBlkWriteDump_data:
 	.type	FtlScanSysBlk, %function
 FtlScanSysBlk:
 .LFB270:
-	.loc 2 1095 0
+	.loc 2 1144 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -176]!
 	.cfi_def_cfa_offset 176
 	.cfi_offset 29, -176
 	.cfi_offset 30, -168
-	.loc 2 1103 0
+	.loc 2 1152 0
 	mov	w1, 0
-	.loc 2 1095 0
+	.loc 2 1144 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x25, x26, [sp, 64]
 	.cfi_offset 25, -112
 	.cfi_offset 26, -104
-	.loc 2 1103 0
+	.loc 2 1152 0
 	adrp	x25, .LANCHOR135
-	.loc 2 1095 0
+	.loc 2 1144 0
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -144
 	.cfi_offset 22, -136
-	.loc 2 1103 0
+	.loc 2 1152 0
 	adrp	x21, .LANCHOR30
 	ldr	x0, [x25, #:lo12:.LANCHOR135]
-	.loc 2 1105 0
+	.loc 2 1154 0
 	adrp	x22, .LANCHOR132
-	.loc 2 1103 0
+	.loc 2 1152 0
 	ldr	w2, [x21, #:lo12:.LANCHOR30]
-	.loc 2 1095 0
+	.loc 2 1144 0
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -160
 	.cfi_offset 20, -152
-	.loc 2 1101 0
+	.loc 2 1150 0
 	adrp	x20, .LANCHOR147
-	.loc 2 1095 0
+	.loc 2 1144 0
 	stp	x23, x24, [sp, 48]
 	.cfi_offset 23, -128
 	.cfi_offset 24, -120
-	.loc 2 1102 0
+	.loc 2 1151 0
 	adrp	x23, .LANCHOR35
-	.loc 2 1095 0
+	.loc 2 1144 0
 	stp	x27, x28, [sp, 80]
 	.cfi_offset 27, -96
 	.cfi_offset 28, -88
-	.loc 2 1104 0
+	.loc 2 1153 0
 	adrp	x27, .LANCHOR129
-	.loc 2 1103 0
+	.loc 2 1152 0
 	lsl	w2, w2, 2
-	.loc 2 1101 0
+	.loc 2 1150 0
 	strh	wzr, [x20, #:lo12:.LANCHOR147]
-	.loc 2 1102 0
+	.loc 2 1151 0
 	strh	wzr, [x23, #:lo12:.LANCHOR35]
-	.loc 2 1103 0
+	.loc 2 1152 0
 	bl	ftl_memset
-.LVL986:
-	.loc 2 1104 0
+.LVL988:
+	.loc 2 1153 0
 	ldr	x0, [x27, #:lo12:.LANCHOR129]
 	mov	w1, 0
 	ldr	w2, [x21, #:lo12:.LANCHOR30]
-	.loc 2 1105 0
+	.loc 2 1154 0
 	adrp	x19, .LANCHOR27
-	.loc 2 1106 0
+	.loc 2 1155 0
 	adrp	x28, .LANCHOR36
-	.loc 2 1107 0
-	adrp	x24, .LANCHOR81
-	.loc 2 1104 0
+	.loc 2 1156 0
+	adrp	x24, .LANCHOR79
+	.loc 2 1153 0
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL987:
-	.loc 2 1105 0
+.LVL989:
+	.loc 2 1154 0
 	ldr	x0, [x22, #:lo12:.LANCHOR132]
 	mov	w1, 0
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-.LVL988:
-	.loc 2 1106 0
+.LVL990:
+	.loc 2 1155 0
 	ldr	x0, [x28, #:lo12:.LANCHOR36]
 	mov	w1, 0
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL989:
-	.loc 2 1107 0
+.LVL991:
+	.loc 2 1156 0
 	mov	w2, 12
 	mov	w1, 255
-	add	x0, x24, :lo12:.LANCHOR81
+	add	x0, x24, :lo12:.LANCHOR79
 	bl	ftl_memset
-.LVL990:
-	.loc 2 1109 0
+.LVL992:
+	.loc 2 1158 0
 	adrp	x0, .LANCHOR5
 	stp	x22, x25, [x29, 144]
 	str	x27, [x29, 160]
 	ldrh	w0, [x0, #:lo12:.LANCHOR5]
 	str	w0, [x29, 172]
-.LVL991:
+.LVL993:
 	adrp	x0, .LANCHOR6
 	add	x0, x0, :lo12:.LANCHOR6
 	str	x0, [x29, 120]
-	.loc 2 1152 0
-	adrp	x0, .LANCHOR71
-	add	x0, x0, :lo12:.LANCHOR71
+	.loc 2 1201 0
+	adrp	x0, .LANCHOR70
+	add	x0, x0, :lo12:.LANCHOR70
 	str	x0, [x29, 112]
-.L714:
-	.loc 2 1109 0 discriminator 1
+.L721:
+	.loc 2 1158 0 discriminator 1
 	ldr	x0, [x29, 120]
 	ldr	w1, [x29, 172]
 	ldrh	w0, [x0]
 	cmp	w0, w1
-	bls	.L754
-	.loc 2 1113 0 discriminator 1
+	bls	.L761
+	.loc 2 1162 0 discriminator 1
 	adrp	x0, .LANCHOR3
-	.loc 2 1118 0 discriminator 1
+	.loc 2 1167 0 discriminator 1
 	adrp	x25, .LANCHOR120
-	.loc 2 1115 0 discriminator 1
+	.loc 2 1164 0 discriminator 1
 	adrp	x6, .LANCHOR13
-	.loc 2 1120 0 discriminator 1
+	.loc 2 1169 0 discriminator 1
 	mov	x5, 0
-	.loc 2 1113 0 discriminator 1
+	.loc 2 1162 0 discriminator 1
 	ldrh	w12, [x0, #:lo12:.LANCHOR3]
-	.loc 2 1119 0 discriminator 1
-	adrp	x0, .LANCHOR93
-	.loc 2 1118 0 discriminator 1
+	.loc 2 1168 0 discriminator 1
+	adrp	x0, .LANCHOR91
+	.loc 2 1167 0 discriminator 1
 	ldr	x7, [x25, #:lo12:.LANCHOR120]
-	.loc 2 1120 0 discriminator 1
+	.loc 2 1169 0 discriminator 1
 	mov	w22, 0
-	.loc 2 1119 0 discriminator 1
-	ldr	x11, [x0, #:lo12:.LANCHOR93]
-	.loc 2 1120 0 discriminator 1
-	adrp	x0, .LANCHOR94
-	.loc 2 1115 0 discriminator 1
+	.loc 2 1168 0 discriminator 1
+	ldr	x11, [x0, #:lo12:.LANCHOR91]
+	.loc 2 1169 0 discriminator 1
+	adrp	x0, .LANCHOR92
+	.loc 2 1164 0 discriminator 1
 	add	x6, x6, :lo12:.LANCHOR13
-	.loc 2 1120 0 discriminator 1
-	ldr	x10, [x0, #:lo12:.LANCHOR94]
+	.loc 2 1169 0 discriminator 1
+	ldr	x10, [x0, #:lo12:.LANCHOR92]
 	adrp	x0, .LANCHOR24
 	ldrh	w8, [x0, #:lo12:.LANCHOR24]
-	b	.L755
-.LVL992:
-.L716:
-	.loc 2 1115 0
+	b	.L762
+.LVL994:
+.L723:
+	.loc 2 1164 0
 	ldrh	w1, [x29, 172]
 	ldrb	w0, [x6, x5]
 	bl	V2P_block
-.LVL993:
+.LVL995:
 	and	w4, w0, 65535
-.LVL994:
-	.loc 2 1116 0
+.LVL996:
+	.loc 2 1165 0
 	bl	FtlBbmIsBadBlock
-.LVL995:
-	cbnz	w0, .L715
-	.loc 2 1118 0
+.LVL997:
+	cbnz	w0, .L722
+	.loc 2 1167 0
 	ubfiz	x0, x22, 5, 16
-	.loc 2 1120 0
+	.loc 2 1169 0
 	mul	w1, w22, w8
-	.loc 2 1118 0
+	.loc 2 1167 0
 	add	x0, x7, x0
-	.loc 2 1121 0
+	.loc 2 1170 0
 	add	w22, w22, 1
-.LVL996:
+.LVL998:
 	and	w22, w22, 65535
-.LVL997:
-	.loc 2 1118 0
+.LVL999:
+	.loc 2 1167 0
 	lsl	w4, w4, 10
-.LVL998:
-	.loc 2 1120 0
+.LVL1000:
+	.loc 2 1169 0
 	asr	w1, w1, 2
 	add	x1, x10, x1, sxtw 2
-	.loc 2 1118 0
+	.loc 2 1167 0
 	str	w4, [x0, 4]
-	.loc 2 1120 0
+	.loc 2 1169 0
 	stp	x11, x1, [x0, 8]
-.L715:
-.LVL999:
+.L722:
+.LVL1001:
 	add	x5, x5, 1
-.LVL1000:
-.L755:
-	.loc 2 1113 0 discriminator 1
+.LVL1002:
+.L762:
+	.loc 2 1162 0 discriminator 1
 	cmp	w12, w5, uxth
-	bhi	.L716
-	.loc 2 1124 0
-	cbnz	w22, .L717
-.LVL1001:
-.L753:
-	.loc 2 1109 0
+	bhi	.L723
+	.loc 2 1173 0
+	cbnz	w22, .L724
+.LVL1003:
+.L760:
+	.loc 2 1158 0
 	ldr	w0, [x29, 172]
 	add	w26, w0, 1
 	and	w0, w26, 65535
 	str	w0, [x29, 172]
-.LVL1002:
-	b	.L714
-.LVL1003:
-.L717:
-	.loc 2 1127 0
+.LVL1004:
+	b	.L721
+.LVL1005:
+.L724:
+	.loc 2 1176 0
 	mov	w1, w22
 	mov	w2, 1
 	mov	x0, x7
 	bl	FlashReadPages
-.LVL1004:
+.LVL1006:
 	ubfiz	x0, x22, 5, 16
 	mov	x22, 0
-.LVL1005:
+.LVL1007:
 	str	x0, [x29, 128]
-.LVL1006:
-	.loc 2 1162 0
+.LVL1008:
+	.loc 2 1211 0
 	adrp	x0, .LANCHOR148
 	add	x0, x0, :lo12:.LANCHOR148
 	str	x0, [x29, 136]
-.L752:
-	.loc 2 1129 0
+.L759:
+	.loc 2 1178 0
 	ldr	x0, [x25, #:lo12:.LANCHOR120]
 	add	x1, x0, x22
-	.loc 2 1132 0
+	.loc 2 1181 0
 	ldr	w0, [x0, x22]
-	.loc 2 1129 0
+	.loc 2 1178 0
 	ldr	w3, [x1, 4]
-	.loc 2 1132 0
+	.loc 2 1181 0
 	cmn	w0, #1
-	.loc 2 1130 0
+	.loc 2 1179 0
 	ldr	x27, [x1, 16]
-	.loc 2 1129 0
+	.loc 2 1178 0
 	ubfx	x26, x3, 10, 16
-.LVL1007:
-	.loc 2 1132 0
-	bne	.L720
+.LVL1009:
+	.loc 2 1181 0
+	bne	.L727
 	mov	w5, 16
-	.loc 2 1136 0
+	.loc 2 1185 0
 	mov	w7, 65535
-.L722:
-	.loc 2 1134 0
+.L729:
+	.loc 2 1183 0
 	ldr	x0, [x25, #:lo12:.LANCHOR120]
 	add	x6, x25, :lo12:.LANCHOR120
-	.loc 2 1135 0
+	.loc 2 1184 0
 	mov	w2, 1
 	str	w7, [x29, 100]
-	.loc 2 1134 0
+	.loc 2 1183 0
 	add	x0, x0, x22
 	str	x6, [x29, 104]
 	str	w5, [x29, 168]
-.LVL1008:
+.LVL1010:
 	ldr	w1, [x0, 4]
 	add	w1, w1, 1
 	str	w1, [x0, 4]
-	.loc 2 1135 0
+	.loc 2 1184 0
 	mov	w1, w2
 	bl	FlashReadPages
-.LVL1009:
-	.loc 2 1136 0
+.LVL1011:
+	.loc 2 1185 0
 	ldrh	w0, [x27]
 	ldr	w7, [x29, 100]
 	ldr	w5, [x29, 168]
 	cmp	w0, w7
 	ldr	x6, [x29, 104]
-	bne	.L719
-	.loc 2 1137 0
+	bne	.L726
+	.loc 2 1186 0
 	ldr	x0, [x6]
 	mov	w1, -1
 	str	w1, [x0, x22]
-	.loc 2 1145 0
+	.loc 2 1194 0
 	ldr	x0, [x6]
 	ldr	w0, [x0, x22]
 	cmp	w0, w1
-	bne	.L720
-.LVL1010:
-.L721:
-	.loc 2 1287 0
-	mov	w1, 1
-	b	.L791
-.LVL1011:
-.L719:
-	.loc 2 1139 0
+	bne	.L727
+.LVL1012:
+.L728:
+	.loc 2 1336 0
+	mov	w1, 0
+	mov	w0, w26
+	bl	FtlFreeSysBlkQueueIn
+.LVL1013:
+	b	.L732
+.LVL1014:
+.L726:
+	.loc 2 1188 0
 	ldr	x0, [x25, #:lo12:.LANCHOR120]
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	bne	.L720
-.LVL1012:
+	bne	.L727
+.LVL1015:
 	sub	w5, w5, #1
-.LVL1013:
-	.loc 2 1133 0 discriminator 2
+.LVL1016:
+	.loc 2 1182 0 discriminator 2
 	ands	w5, w5, 65535
-	bne	.L722
-	b	.L721
-.L720:
-	.loc 2 1147 0
-	adrp	x0, .LANCHOR71
-	ldr	w1, [x0, #:lo12:.LANCHOR71]
+	bne	.L729
+	b	.L728
+.L727:
+	.loc 2 1196 0
+	adrp	x0, .LANCHOR70
+	ldr	w1, [x0, #:lo12:.LANCHOR70]
 	ldr	w0, [x27, 4]
 	cmn	w1, #1
-	beq	.L723
-	.loc 2 1147 0 is_stmt 0 discriminator 1
+	beq	.L730
+	.loc 2 1196 0 is_stmt 0 discriminator 1
 	cmp	w1, w0
-	bhi	.L724
-.L723:
-	.loc 2 1149 0 is_stmt 1
+	bhi	.L731
+.L730:
+	.loc 2 1198 0 is_stmt 1
 	cmn	w0, #1
-	beq	.L724
-	.loc 2 1152 0
+	beq	.L731
+	.loc 2 1201 0
 	ldr	x2, [x29, 112]
 	add	w1, w0, 1
 	str	w1, [x2]
-.L724:
-	.loc 2 1157 0
+.L731:
+	.loc 2 1206 0
 	ldrh	w1, [x27]
 	mov	w2, 61604
 	cmp	w1, w2
-	beq	.L726
-	bhi	.L727
+	beq	.L733
+	bhi	.L734
 	mov	w0, 61574
 	cmp	w1, w0
-	beq	.L728
-.L725:
-	.loc 2 1128 0 discriminator 2
+	beq	.L735
+.L732:
+	.loc 2 1177 0 discriminator 2
 	ldr	x0, [x29, 128]
 	add	x22, x22, 32
 	cmp	x0, x22
-	bne	.L752
-	b	.L753
-.L727:
-	.loc 2 1157 0
+	bne	.L759
+	b	.L760
+.L734:
+	.loc 2 1206 0
 	mov	w0, 61634
 	cmp	w1, w0
-	beq	.L729
+	beq	.L736
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L725
-	.loc 2 1280 0
-	mov	w1, 0
-.L791:
-	.loc 2 1287 0
-	mov	w0, w26
-	bl	FtlFreeSysBlkQueueIn
-.LVL1014:
-	b	.L725
-.L729:
-	.loc 2 1162 0
+	beq	.L728
+	b	.L732
+.L736:
+	.loc 2 1211 0
 	ldrh	w1, [x20, #:lo12:.LANCHOR147]
 	ldr	w0, [x21, #:lo12:.LANCHOR30]
 	cmp	w1, w0
-	bls	.L731
-	.loc 2 1162 0 is_stmt 0 discriminator 1
+	bls	.L738
+	.loc 2 1211 0 is_stmt 0 discriminator 1
 	ldr	x1, [x29, 136]
 	adrp	x0, .LC1
-	mov	w2, 1162
+	mov	w2, 1211
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1015:
-.L731:
-	.loc 2 1163 0 is_stmt 1
+.LVL1017:
+.L738:
+	.loc 2 1212 0 is_stmt 1
 	ldr	w6, [x21, #:lo12:.LANCHOR30]
-	.loc 2 1165 0
+	.loc 2 1214 0
 	ldr	x3, [x29, 152]
-	.loc 2 1163 0
+	.loc 2 1212 0
 	ldrh	w1, [x20, #:lo12:.LANCHOR147]
 	and	w2, w6, 65535
 	sub	w0, w2, #1
 	sub	w2, w2, w1
 	sxth	x0, w0
-.LVL1016:
+.LVL1018:
 	sub	w2, w2, #1
-	.loc 2 1165 0
+	.loc 2 1214 0
 	ldr	x5, [x3, #:lo12:.LANCHOR135]
-	.loc 2 1163 0
+	.loc 2 1212 0
 	sxth	w2, w2
-.L732:
-	.loc 2 1163 0 is_stmt 0 discriminator 1
+.L739:
+	.loc 2 1212 0 is_stmt 0 discriminator 1
 	cmp	w0, w2
-	bgt	.L738
-	.loc 2 1186 0 is_stmt 1
-	tbz	w0, #31, .L772
-	b	.L725
-.L738:
-	.loc 2 1165 0
+	bgt	.L745
+	.loc 2 1235 0 is_stmt 1
+	tbz	w0, #31, .L779
+	b	.L732
+.L745:
+	.loc 2 1214 0
 	sxtw	x8, w0
 	ldr	w11, [x27, 4]
 	lsl	x7, x8, 2
 	add	x10, x5, x7
 	ldr	w7, [x5, x7]
 	cmp	w11, w7
-	bls	.L733
-	.loc 2 1167 0
+	bls	.L740
+	.loc 2 1216 0
 	ldr	w2, [x5]
-	cbnz	w2, .L734
-	.loc 2 1167 0 is_stmt 0 discriminator 1
+	cbnz	w2, .L741
+	.loc 2 1216 0 is_stmt 0 discriminator 1
 	cmp	w6, w1
-	beq	.L734
-	.loc 2 1172 0 is_stmt 1
+	beq	.L741
+	.loc 2 1221 0 is_stmt 1
 	add	w1, w1, 1
 	strh	w1, [x20, #:lo12:.LANCHOR147]
-.L734:
-	.loc 2 1178 0 discriminator 1
+.L741:
+	.loc 2 1227 0 discriminator 1
 	ldr	x1, [x29, 160]
 	ldr	x6, [x1, #:lo12:.LANCHOR129]
 	mov	w1, 0
-.L735:
-.LVL1017:
-	.loc 2 1175 0 discriminator 1
+.L742:
+.LVL1019:
+	.loc 2 1224 0 discriminator 1
 	cmp	w1, w0
-	bne	.L736
-	.loc 2 1180 0
+	bne	.L743
+	.loc 2 1229 0
 	ldr	w1, [x27, 4]
-.LVL1018:
+.LVL1020:
 	str	w1, [x10]
-	.loc 2 1181 0
+	.loc 2 1230 0
 	strh	w26, [x6, x8, lsl 1]
-	.loc 2 1186 0
-	tbnz	w0, #31, .L725
-	.loc 2 1193 0
+	.loc 2 1235 0
+	tbnz	w0, #31, .L732
+	.loc 2 1242 0
 	ldrh	w1, [x20, #:lo12:.LANCHOR147]
 	ldr	w2, [x21, #:lo12:.LANCHOR30]
 	sub	w2, w2, w1
 	sub	w2, w2, #1
 	cmp	w0, w2, sxth
-	bgt	.L725
-.L772:
-	.loc 2 1195 0
+	bgt	.L732
+.L779:
+	.loc 2 1244 0
 	add	w1, w1, 1
 	strh	w1, [x20, #:lo12:.LANCHOR147]
-	.loc 2 1196 0
+	.loc 2 1245 0
 	ldr	w1, [x27, 4]
 	str	w1, [x5, x0, lsl 2]
-	.loc 2 1197 0
+	.loc 2 1246 0
 	ldr	x1, [x29, 160]
 	ldr	x1, [x1, #:lo12:.LANCHOR129]
-.L790:
-	.loc 2 1241 0
+.L797:
+	.loc 2 1290 0
 	strh	w26, [x1, x0, lsl 1]
-	b	.L725
-.LVL1019:
-.L736:
-	.loc 2 1177 0 discriminator 3
+	b	.L732
+.LVL1021:
+.L743:
+	.loc 2 1226 0 discriminator 3
 	sxtw	x2, w1
 	add	w1, w1, 1
-.LVL1020:
+.LVL1022:
 	lsl	x7, x2, 2
-	.loc 2 1178 0 discriminator 3
+	.loc 2 1227 0 discriminator 3
 	lsl	x2, x2, 1
-	.loc 2 1177 0 discriminator 3
+	.loc 2 1226 0 discriminator 3
 	add	x11, x5, x7
 	sxth	w1, w1
-.LVL1021:
+.LVL1023:
 	ldr	w11, [x11, 4]
 	str	w11, [x5, x7]
-	.loc 2 1178 0 discriminator 3
+	.loc 2 1227 0 discriminator 3
 	add	x7, x6, x2
 	ldrh	w7, [x7, 2]
 	strh	w7, [x6, x2]
-	b	.L735
-.LVL1022:
-.L733:
-	sub	w0, w0, #1
-.LVL1023:
-	sxth	x0, w0
+	b	.L742
 .LVL1024:
-	b	.L732
+.L740:
+	sub	w0, w0, #1
 .LVL1025:
-.L728:
-	.loc 2 1203 0
+	sxth	x0, w0
+.LVL1026:
+	b	.L739
+.LVL1027:
+.L735:
+	.loc 2 1252 0
 	ldrh	w1, [x23, #:lo12:.LANCHOR35]
 	ldrh	w0, [x19, #:lo12:.LANCHOR27]
 	cmp	w1, w0
-	bls	.L741
-	.loc 2 1203 0 is_stmt 0 discriminator 1
+	bls	.L748
+	.loc 2 1252 0 is_stmt 0 discriminator 1
 	ldr	x1, [x29, 136]
 	adrp	x0, .LC1
-	mov	w2, 1203
+	mov	w2, 1252
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1026:
-.L741:
-	.loc 2 1204 0 is_stmt 1
+.LVL1028:
+.L748:
+	.loc 2 1253 0 is_stmt 1
 	ldrh	w6, [x19, #:lo12:.LANCHOR27]
 	ldrh	w2, [x23, #:lo12:.LANCHOR35]
 	sub	w1, w6, #1
 	sxth	x0, w1
-.LVL1027:
+.LVL1029:
 	sub	w5, w1, w2
-	.loc 2 1206 0
+	.loc 2 1255 0
 	ldr	x1, [x29, 144]
 	ldr	x1, [x1, #:lo12:.LANCHOR132]
-.L742:
-	.loc 2 1204 0 discriminator 1
+.L749:
+	.loc 2 1253 0 discriminator 1
 	cmp	w0, w5
-	ble	.L747
-	.loc 2 1206 0
+	ble	.L754
+	.loc 2 1255 0
 	sxtw	x7, w0
 	ldr	w11, [x27, 4]
 	lsl	x8, x7, 2
 	add	x10, x1, x8
 	ldr	w8, [x1, x8]
 	cmp	w11, w8
-	bls	.L743
-	.loc 2 1208 0
+	bls	.L750
+	.loc 2 1257 0
 	ldr	w5, [x1]
-	cbnz	w5, .L744
-	.loc 2 1208 0 is_stmt 0 discriminator 1
+	cbnz	w5, .L751
+	.loc 2 1257 0 is_stmt 0 discriminator 1
 	cmp	w6, w2
-	beq	.L744
-	.loc 2 1216 0 is_stmt 1
+	beq	.L751
+	.loc 2 1265 0 is_stmt 1
 	add	w2, w2, 1
 	strh	w2, [x23, #:lo12:.LANCHOR35]
-.L744:
-	.loc 2 1221 0 discriminator 1
+.L751:
+	.loc 2 1270 0 discriminator 1
 	ldr	x6, [x28, #:lo12:.LANCHOR36]
 	mov	w2, 0
-.L745:
-.LVL1028:
-	.loc 2 1218 0 discriminator 1
+.L752:
+.LVL1030:
+	.loc 2 1267 0 discriminator 1
 	cmp	w2, w0
-	bne	.L746
-	.loc 2 1223 0
+	bne	.L753
+	.loc 2 1272 0
 	ldr	w2, [x27, 4]
-.LVL1029:
+.LVL1031:
 	str	w2, [x10]
-	.loc 2 1224 0
+	.loc 2 1273 0
 	strh	w26, [x6, x7, lsl 1]
-.L747:
-	.loc 2 1229 0
-	tbnz	w0, #31, .L725
-	.loc 2 1237 0
+.L754:
+	.loc 2 1278 0
+	tbnz	w0, #31, .L732
+	.loc 2 1286 0
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	ldrh	w5, [x23, #:lo12:.LANCHOR35]
 	sub	w2, w2, #1
 	sub	w2, w2, w5
 	cmp	w0, w2, sxth
-	bgt	.L725
-	.loc 2 1239 0
+	bgt	.L732
+	.loc 2 1288 0
 	add	w5, w5, 1
-	.loc 2 1240 0
+	.loc 2 1289 0
 	ldr	w2, [x27, 4]
-	.loc 2 1239 0
+	.loc 2 1288 0
 	strh	w5, [x23, #:lo12:.LANCHOR35]
-	.loc 2 1240 0
+	.loc 2 1289 0
 	str	w2, [x1, x0, lsl 2]
-	.loc 2 1241 0
+	.loc 2 1290 0
 	ldr	x1, [x28, #:lo12:.LANCHOR36]
-	b	.L790
-.LVL1030:
-.L746:
-	.loc 2 1220 0 discriminator 3
+	b	.L797
+.LVL1032:
+.L753:
+	.loc 2 1269 0 discriminator 3
 	sxtw	x5, w2
 	add	w2, w2, 1
-.LVL1031:
+.LVL1033:
 	lsl	x8, x5, 2
-	.loc 2 1221 0 discriminator 3
+	.loc 2 1270 0 discriminator 3
 	lsl	x5, x5, 1
-	.loc 2 1220 0 discriminator 3
+	.loc 2 1269 0 discriminator 3
 	add	x11, x1, x8
 	sxth	w2, w2
-.LVL1032:
+.LVL1034:
 	ldr	w11, [x11, 4]
 	str	w11, [x1, x8]
-	.loc 2 1221 0 discriminator 3
+	.loc 2 1270 0 discriminator 3
 	add	x8, x6, x5
 	ldrh	w8, [x8, 2]
 	strh	w8, [x6, x5]
-	b	.L745
-.LVL1033:
-.L743:
-	sub	w0, w0, #1
-.LVL1034:
-	sxth	x0, w0
+	b	.L752
 .LVL1035:
-	b	.L742
+.L750:
+	sub	w0, w0, #1
 .LVL1036:
-.L726:
-	.loc 2 1248 0
-	ldrh	w5, [x24, #:lo12:.LANCHOR81]
+	sxth	x0, w0
+.LVL1037:
+	b	.L749
+.LVL1038:
+.L733:
+	.loc 2 1297 0
+	ldrh	w5, [x24, #:lo12:.LANCHOR79]
 	mov	w1, 65535
-	add	x2, x24, :lo12:.LANCHOR81
+	add	x2, x24, :lo12:.LANCHOR79
 	cmp	w5, w1
-	bne	.L749
-	.loc 2 1250 0
-	strh	w26, [x24, #:lo12:.LANCHOR81]
-	.loc 2 1251 0
+	bne	.L756
+	.loc 2 1299 0
+	strh	w26, [x24, #:lo12:.LANCHOR79]
+	.loc 2 1300 0
 	str	w0, [x2, 8]
-	b	.L725
-.L749:
-	.loc 2 1255 0
+	b	.L732
+.L756:
+	.loc 2 1304 0
 	ldrh	w0, [x2, 4]
 	cmp	w0, w1
-	beq	.L750
-	.loc 2 1256 0
+	beq	.L757
+	.loc 2 1305 0
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.LVL1037:
-.L750:
-	.loc 2 1257 0
-	add	x0, x24, :lo12:.LANCHOR81
+.LVL1039:
+.L757:
+	.loc 2 1306 0
+	add	x0, x24, :lo12:.LANCHOR79
 	ldr	w1, [x27, 4]
 	ldr	w2, [x0, 8]
 	cmp	w2, w1
-	bcs	.L751
-	.loc 2 1259 0
-	ldrh	w2, [x24, #:lo12:.LANCHOR81]
+	bcs	.L758
+	.loc 2 1308 0
+	ldrh	w2, [x24, #:lo12:.LANCHOR79]
 	strh	w2, [x0, 4]
-	.loc 2 1260 0
-	strh	w26, [x24, #:lo12:.LANCHOR81]
-	.loc 2 1261 0
+	.loc 2 1309 0
+	strh	w26, [x24, #:lo12:.LANCHOR79]
+	.loc 2 1310 0
 	str	w1, [x0, 8]
-	b	.L725
-.L751:
-	.loc 2 1265 0
+	b	.L732
+.L758:
+	.loc 2 1314 0
 	strh	w26, [x0, 4]
-	b	.L725
-.LVL1038:
-.L754:
-	.loc 2 1292 0
+	b	.L732
+.LVL1040:
+.L761:
+	.loc 2 1341 0
 	ldr	x0, [x29, 160]
 	ldr	x2, [x0, #:lo12:.LANCHOR129]
 	ldrh	w0, [x2]
-	cbz	w0, .L756
-.L759:
-	.loc 2 1310 0
+	cbz	w0, .L763
+.L766:
+	.loc 2 1359 0
 	ldr	x1, [x28, #:lo12:.LANCHOR36]
 	ldrh	w0, [x1]
-	cbz	w0, .L757
-.L758:
-	.loc 2 1328 0
+	cbz	w0, .L764
+.L765:
+	.loc 2 1377 0
 	ldrh	w1, [x20, #:lo12:.LANCHOR147]
 	ldr	w0, [x21, #:lo12:.LANCHOR30]
 	cmp	w1, w0
-	bls	.L788
-	.loc 2 1328 0 is_stmt 0 discriminator 1
+	bls	.L795
+	.loc 2 1377 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR148
 	adrp	x0, .LC1
-	mov	w2, 1328
+	mov	w2, 1377
 	add	x1, x1, :lo12:.LANCHOR148
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1039:
-.L788:
-	.loc 2 1330 0 is_stmt 1
+.LVL1041:
+.L795:
+	.loc 2 1379 0 is_stmt 1
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -9878,117 +9990,117 @@ FtlScanSysBlk:
 	.cfi_restore 19
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
-.LVL1040:
+.LVL1042:
 	ret
-.LVL1041:
-.L756:
+.LVL1043:
+.L763:
 	.cfi_restore_state
-	.loc 2 1292 0 discriminator 1
+	.loc 2 1341 0 discriminator 1
 	ldrh	w0, [x20, #:lo12:.LANCHOR147]
-	cbz	w0, .L759
-	.loc 2 1294 0 discriminator 1
+	cbz	w0, .L766
+	.loc 2 1343 0 discriminator 1
 	ldr	w1, [x21, #:lo12:.LANCHOR30]
 	mov	w0, 0
-.L760:
-.LVL1042:
+.L767:
+.LVL1044:
 	cmp	w0, w1
-	bcs	.L759
-	.loc 2 1296 0
+	bcs	.L766
+	.loc 2 1345 0
 	ldrh	w3, [x2, w0, sxtw 1]
-	cbz	w3, .L761
-	.loc 2 1301 0
+	cbz	w3, .L768
+	.loc 2 1350 0
 	ldr	x1, [x29, 152]
-	.loc 2 1298 0
+	.loc 2 1347 0
 	add	x7, x21, :lo12:.LANCHOR30
-	.loc 2 1301 0
+	.loc 2 1350 0
 	ldr	x4, [x1, #:lo12:.LANCHOR135]
 	mov	w1, w0
-.L762:
-.LVL1043:
-	.loc 2 1298 0 discriminator 1
+.L769:
+.LVL1045:
+	.loc 2 1347 0 discriminator 1
 	ldr	w3, [x7]
 	cmp	w1, w3
-	bcs	.L759
-	.loc 2 1300 0 discriminator 3
+	bcs	.L766
+	.loc 2 1349 0 discriminator 3
 	sxtw	x6, w1
 	sub	w3, w1, w0
 	lsl	x5, x6, 1
 	sxtw	x3, w3
 	add	w1, w1, 1
-.LVL1044:
-	.loc 2 1301 0 discriminator 3
+.LVL1046:
+	.loc 2 1350 0 discriminator 3
 	ldr	w6, [x4, x6, lsl 2]
 	sxth	w1, w1
-.LVL1045:
-	.loc 2 1300 0 discriminator 3
+.LVL1047:
+	.loc 2 1349 0 discriminator 3
 	ldrh	w8, [x2, x5]
 	strh	w8, [x2, x3, lsl 1]
-	.loc 2 1301 0 discriminator 3
+	.loc 2 1350 0 discriminator 3
 	str	w6, [x4, x3, lsl 2]
-	.loc 2 1302 0 discriminator 3
+	.loc 2 1351 0 discriminator 3
 	strh	wzr, [x2, x5]
-	b	.L762
-.LVL1046:
-.L761:
-	add	w0, w0, 1
-.LVL1047:
-	sxth	w0, w0
+	b	.L769
 .LVL1048:
-	b	.L760
+.L768:
+	add	w0, w0, 1
 .LVL1049:
-.L757:
-	.loc 2 1310 0 discriminator 1
+	sxth	w0, w0
+.LVL1050:
+	b	.L767
+.LVL1051:
+.L764:
+	.loc 2 1359 0 discriminator 1
 	ldrh	w0, [x23, #:lo12:.LANCHOR35]
-	cbz	w0, .L758
-	.loc 2 1312 0 discriminator 1
+	cbz	w0, .L765
+	.loc 2 1361 0 discriminator 1
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	mov	w0, 0
-.L767:
-.LVL1050:
+.L774:
+.LVL1052:
 	mov	w6, w0
 	cmp	w0, w2
-	bge	.L758
-	.loc 2 1314 0
+	bge	.L765
+	.loc 2 1363 0
 	ldrh	w3, [x1, w0, sxtw 1]
-	cbz	w3, .L768
-	.loc 2 1319 0
+	cbz	w3, .L775
+	.loc 2 1368 0
 	ldr	x2, [x29, 144]
-	.loc 2 1316 0
+	.loc 2 1365 0
 	add	x19, x19, :lo12:.LANCHOR27
-	.loc 2 1319 0
+	.loc 2 1368 0
 	ldr	x3, [x2, #:lo12:.LANCHOR132]
-.LVL1051:
-.L769:
-	.loc 2 1316 0 discriminator 1
+.LVL1053:
+.L776:
+	.loc 2 1365 0 discriminator 1
 	ldrh	w2, [x19]
 	cmp	w0, w2
-	bge	.L758
-	.loc 2 1318 0 discriminator 3
+	bge	.L765
+	.loc 2 1367 0 discriminator 3
 	sxtw	x5, w0
 	sub	w2, w0, w6
 	lsl	x4, x5, 1
 	sxtw	x2, w2
 	add	w0, w0, 1
-.LVL1052:
-	.loc 2 1319 0 discriminator 3
+.LVL1054:
+	.loc 2 1368 0 discriminator 3
 	ldr	w5, [x3, x5, lsl 2]
 	sxth	w0, w0
-.LVL1053:
-	.loc 2 1318 0 discriminator 3
+.LVL1055:
+	.loc 2 1367 0 discriminator 3
 	ldrh	w7, [x1, x4]
 	strh	w7, [x1, x2, lsl 1]
-	.loc 2 1319 0 discriminator 3
+	.loc 2 1368 0 discriminator 3
 	str	w5, [x3, x2, lsl 2]
-	.loc 2 1320 0 discriminator 3
+	.loc 2 1369 0 discriminator 3
 	strh	wzr, [x1, x4]
-	b	.L769
-.LVL1054:
-.L768:
+	b	.L776
+.LVL1056:
+.L775:
 	add	w0, w0, 1
-.LVL1055:
+.LVL1057:
 	sxth	w0, w0
-.LVL1056:
-	b	.L767
+.LVL1058:
+	b	.L774
 	.cfi_endproc
 .LFE270:
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
@@ -9998,16 +10110,16 @@ FtlScanSysBlk:
 	.type	FtlMapTblRecovery, %function
 FtlMapTblRecovery:
 .LFB275:
-	.loc 2 1466 0
+	.loc 2 1515 0
 	.cfi_startproc
-.LVL1057:
+.LVL1059:
 	stp	x29, x30, [sp, -144]!
 	.cfi_def_cfa_offset 144
 	.cfi_offset 29, -144
 	.cfi_offset 30, -136
-	.loc 2 1477 0
+	.loc 2 1526 0
 	mov	w1, 0
-	.loc 2 1466 0
+	.loc 2 1515 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
@@ -10015,166 +10127,166 @@ FtlMapTblRecovery:
 	.cfi_offset 20, -120
 	mov	x19, x0
 	stp	x23, x24, [sp, 48]
-	.loc 2 1478 0
-	adrp	x20, .LANCHOR108
+	.loc 2 1527 0
+	adrp	x20, .LANCHOR106
 	.cfi_offset 23, -96
 	.cfi_offset 24, -88
-	.loc 2 1473 0
+	.loc 2 1522 0
 	ldrh	w23, [x0, 6]
-	.loc 2 1511 0
+	.loc 2 1560 0
 	adrp	x24, .LANCHOR20
-	.loc 2 1466 0
+	.loc 2 1515 0
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -112
 	.cfi_offset 22, -104
-	.loc 2 1470 0
+	.loc 2 1519 0
 	ldr	x21, [x0, 40]
-.LVL1058:
-	.loc 2 1471 0
+.LVL1060:
+	.loc 2 1520 0
 	ldr	x22, [x0, 16]
-.LVL1059:
-	.loc 2 1477 0
+.LVL1061:
+	.loc 2 1526 0
 	lsl	w2, w23, 2
-	.loc 2 1472 0
+	.loc 2 1521 0
 	ldr	x0, [x0, 24]
-.LVL1060:
+.LVL1062:
 	str	x0, [x29, 128]
-.LVL1061:
-	.loc 2 1474 0
+.LVL1063:
+	.loc 2 1523 0
 	ldrh	w0, [x19, 8]
-.LVL1062:
-	.loc 2 1466 0
+.LVL1064:
+	.loc 2 1515 0
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	.cfi_offset 25, -80
 	.cfi_offset 26, -72
 	.cfi_offset 27, -64
 	.cfi_offset 28, -56
-	.loc 2 1486 0
+	.loc 2 1535 0
 	mov	w27, 0
-	.loc 2 1474 0
+	.loc 2 1523 0
 	str	w0, [x29, 140]
-.LVL1063:
-	.loc 2 1477 0
+.LVL1065:
+	.loc 2 1526 0
 	mov	x0, x21
 	bl	ftl_memset
-.LVL1064:
+.LVL1066:
 	str	x20, [x29, 120]
-	.loc 2 1478 0
-	adrp	x7, .LANCHOR39
-	add	x3, x20, :lo12:.LANCHOR108
+	.loc 2 1527 0
+	adrp	x7, .LANCHOR107
+	add	x3, x20, :lo12:.LANCHOR106
 	mov	x26, x7
-	.loc 2 1510 0
+	.loc 2 1559 0
 	mov	x20, x3
-	.loc 2 1478 0
-	ldr	x0, [x7, #:lo12:.LANCHOR39]
+	.loc 2 1527 0
+	ldr	x0, [x7, #:lo12:.LANCHOR107]
 	str	x0, [x3, 8]
-	.loc 2 1479 0
-	adrp	x0, .LANCHOR109
-	.loc 2 1483 0
+	.loc 2 1528 0
+	adrp	x0, .LANCHOR108
+	.loc 2 1532 0
 	stp	wzr, wzr, [x19, 48]
-	.loc 2 1479 0
-	ldr	x25, [x0, #:lo12:.LANCHOR109]
-	.loc 2 1481 0
+	.loc 2 1528 0
+	ldr	x25, [x0, #:lo12:.LANCHOR108]
+	.loc 2 1530 0
 	mov	w0, -1
-	.loc 2 1479 0
+	.loc 2 1528 0
 	str	x25, [x3, 16]
-.LVL1065:
-	.loc 2 1481 0
+.LVL1067:
+	.loc 2 1530 0
 	strh	w0, [x19]
-	.loc 2 1482 0
+	.loc 2 1531 0
 	strh	w0, [x19, 2]
-	.loc 2 1485 0
+	.loc 2 1534 0
 	mov	w0, 1
 	str	w0, [x19, 56]
-.LVL1066:
-	.loc 2 1488 0
+.LVL1068:
+	.loc 2 1537 0
 	ldr	w0, [x29, 140]
 	sub	w0, w0, #1
 	str	w0, [x29, 136]
-	.loc 2 1530 0
+	.loc 2 1579 0
 	add	x0, x24, :lo12:.LANCHOR20
 	str	x0, [x29, 112]
-.LVL1067:
-.L793:
-	.loc 2 1486 0 discriminator 1
+.LVL1069:
+.L799:
+	.loc 2 1535 0 discriminator 1
 	ldr	w0, [x29, 140]
 	cmp	w27, w0
-	bge	.L810
-	.loc 2 1488 0
+	bge	.L816
+	.loc 2 1537 0
 	ldr	w0, [x29, 136]
 	sxtw	x28, w27
 	cmp	w27, w0
-	bne	.L794
-	.loc 2 1490 0
+	bne	.L800
+	.loc 2 1539 0
 	lsl	x0, x28, 1
 	mov	w1, 1
 	add	x24, x22, x0
 	ldrh	w0, [x22, x0]
-	.loc 2 1494 0
+	.loc 2 1543 0
 	mov	w22, 0
-.LVL1068:
-	.loc 2 1490 0
+.LVL1070:
+	.loc 2 1539 0
 	bl	FtlGetLastWrittenPage
-.LVL1069:
+.LVL1071:
 	sxth	w26, w0
-.LVL1070:
-	.loc 2 1491 0
+.LVL1072:
+	.loc 2 1540 0
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-	.loc 2 1493 0
+	.loc 2 1542 0
 	ldr	x0, [x29, 128]
-	.loc 2 1492 0
+	.loc 2 1541 0
 	strh	w27, [x19]
-	.loc 2 1493 0
+	.loc 2 1542 0
 	ldr	w0, [x0, x28, lsl 2]
 	str	w0, [x19, 48]
-.LVL1071:
-	.loc 2 1496 0
+.LVL1073:
+	.loc 2 1545 0
 	ldr	x0, [x29, 120]
-	add	x20, x0, :lo12:.LANCHOR108
-.LVL1072:
-.L795:
-	.loc 2 1494 0 discriminator 1
+	add	x20, x0, :lo12:.LANCHOR106
+.LVL1074:
+.L801:
+	.loc 2 1543 0 discriminator 1
 	cmp	w22, w26
-	ble	.L797
-.LVL1073:
-.L810:
-	.loc 2 1547 0
+	ble	.L803
+.LVL1075:
+.L816:
+	.loc 2 1596 0
 	mov	x0, x19
 	bl	ftl_free_no_use_map_blk
-.LVL1074:
-	.loc 2 1548 0
+.LVL1076:
+	.loc 2 1597 0
 	adrp	x0, .LANCHOR20
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x0, #:lo12:.LANCHOR20]
 	cmp	w1, w0
-	bne	.L799
-	.loc 2 1550 0
+	bne	.L805
+	.loc 2 1599 0
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.LVL1075:
-.L799:
-	.loc 2 1553 0
+.LVL1077:
+.L805:
+	.loc 2 1602 0
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-.LVL1076:
-	.loc 2 1555 0
+.LVL1078:
+	.loc 2 1604 0
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-.LVL1077:
-	.loc 2 1557 0
+.LVL1079:
+	.loc 2 1606 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-.LVL1078:
+.LVL1080:
 	ldp	x21, x22, [sp, 32]
-.LVL1079:
+.LVL1081:
 	ldp	x23, x24, [sp, 48]
-.LVL1080:
+.LVL1082:
 	ldp	x25, x26, [sp, 64]
-.LVL1081:
+.LVL1083:
 	ldp	x27, x28, [sp, 80]
-.LVL1082:
+.LVL1084:
 	ldp	x29, x30, [sp], 144
 	.cfi_remember_state
 	.cfi_restore 30
@@ -10190,174 +10302,174 @@ FtlMapTblRecovery:
 	.cfi_restore 19
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
-.LVL1083:
+.LVL1085:
 	ret
-.LVL1084:
-.L797:
+.LVL1086:
+.L803:
 	.cfi_restore_state
-	.loc 2 1496 0
+	.loc 2 1545 0
 	ldrh	w0, [x24]
-	.loc 2 1497 0
+	.loc 2 1546 0
 	mov	w2, 1
 	mov	w1, w2
-	.loc 2 1496 0
+	.loc 2 1545 0
 	orr	w0, w22, w0, lsl 10
 	str	w0, [x20, 4]
-	.loc 2 1497 0
+	.loc 2 1546 0
 	mov	x0, x20
 	bl	FlashReadPages
-.LVL1085:
-	.loc 2 1500 0
+.LVL1087:
+	.loc 2 1549 0
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L796
-	.loc 2 1502 0
+	beq	.L802
+	.loc 2 1551 0
 	ldrh	w0, [x25, 8]
 	cmp	w23, w0
-	bls	.L796
-	.loc 2 1502 0 is_stmt 0 discriminator 1
+	bls	.L802
+	.loc 2 1551 0 is_stmt 0 discriminator 1
 	ldrh	w2, [x25]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
-	bne	.L796
-	.loc 2 1504 0 is_stmt 1
+	bne	.L802
+	.loc 2 1553 0 is_stmt 1
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x20, 4]
 	str	w1, [x21, x0]
-.L796:
+.L802:
 	add	w22, w22, 1
-.LVL1086:
-	sxth	w22, w22
-.LVL1087:
-	b	.L795
 .LVL1088:
-.L794:
-	.loc 2 1510 0
-	ldr	x0, [x26, #:lo12:.LANCHOR39]
-	.loc 2 1512 0
+	sxth	w22, w22
+.LVL1089:
+	b	.L801
+.LVL1090:
+.L800:
+	.loc 2 1559 0
+	ldr	x0, [x26, #:lo12:.LANCHOR107]
+	.loc 2 1561 0
 	mov	w2, 1
-	.loc 2 1510 0
+	.loc 2 1559 0
 	str	x0, [x20, 8]
-	.loc 2 1511 0
+	.loc 2 1560 0
 	lsl	x0, x28, 1
 	ldrh	w1, [x24, #:lo12:.LANCHOR20]
 	add	x28, x22, x0
 	ldrh	w0, [x22, x0]
 	sub	w1, w1, #1
 	orr	w0, w1, w0, lsl 10
-	.loc 2 1512 0
+	.loc 2 1561 0
 	mov	w1, w2
-	.loc 2 1511 0
+	.loc 2 1560 0
 	str	w0, [x20, 4]
-	.loc 2 1512 0
+	.loc 2 1561 0
 	mov	x0, x20
 	bl	FlashReadPages
-.LVL1089:
-	.loc 2 1515 0
+.LVL1091:
+	.loc 2 1564 0
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L812
-	.loc 2 1515 0 is_stmt 0 discriminator 1
+	beq	.L818
+	.loc 2 1564 0 is_stmt 0 discriminator 1
 	ldrh	w1, [x25]
 	ldrh	w0, [x19, 4]
 	cmp	w1, w0
-	bne	.L812
-	.loc 2 1515 0 discriminator 2
+	bne	.L818
+	.loc 2 1564 0 discriminator 2
 	ldrh	w1, [x25, 8]
 	mov	w0, 64245
 	cmp	w1, w0
-	beq	.L801
-.L812:
+	beq	.L807
+.L818:
 	mov	w5, 0
-.L802:
-.LVL1090:
-	.loc 2 1530 0 is_stmt 1 discriminator 1
+.L808:
+.LVL1092:
+	.loc 2 1579 0 is_stmt 1 discriminator 1
 	ldr	x0, [x29, 112]
 	ldrh	w0, [x0]
 	cmp	w5, w0
-	bge	.L808
-	.loc 2 1532 0
+	bge	.L814
+	.loc 2 1581 0
 	ldrh	w0, [x28]
-	.loc 2 1533 0
+	.loc 2 1582 0
 	mov	w2, 1
-	.loc 2 1532 0
+	.loc 2 1581 0
 	str	w5, [x29, 108]
-	.loc 2 1533 0
+	.loc 2 1582 0
 	mov	w1, w2
-	.loc 2 1532 0
+	.loc 2 1581 0
 	orr	w0, w5, w0, lsl 10
 	str	w0, [x20, 4]
-	.loc 2 1533 0
+	.loc 2 1582 0
 	mov	x0, x20
 	bl	FlashReadPages
-.LVL1091:
-	.loc 2 1536 0
+.LVL1093:
+	.loc 2 1585 0
 	ldr	w0, [x20]
 	ldr	w5, [x29, 108]
 	cmn	w0, #1
-	beq	.L806
-	.loc 2 1538 0
+	beq	.L812
+	.loc 2 1587 0
 	ldrh	w0, [x25, 8]
 	cmp	w23, w0
-	bls	.L806
-	.loc 2 1538 0 is_stmt 0 discriminator 1
+	bls	.L812
+	.loc 2 1587 0 is_stmt 0 discriminator 1
 	ldrh	w2, [x25]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
-	bne	.L806
-	.loc 2 1540 0 is_stmt 1
+	bne	.L812
+	.loc 2 1589 0 is_stmt 1
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x20, 4]
 	str	w1, [x21, x0]
-.L806:
+.L812:
 	add	w5, w5, 1
 	sxth	w5, w5
-.LVL1092:
-	b	.L802
-.LVL1093:
-.L801:
-	.loc 2 1518 0 discriminator 1
+.LVL1094:
+	b	.L808
+.LVL1095:
+.L807:
+	.loc 2 1567 0 discriminator 1
 	ldrh	w5, [x24, #:lo12:.LANCHOR20]
-	.loc 2 1520 0 discriminator 1
+	.loc 2 1569 0 discriminator 1
 	mov	w0, 0
-	ldr	x10, [x26, #:lo12:.LANCHOR39]
-	.loc 2 1518 0 discriminator 1
+	ldr	x10, [x26, #:lo12:.LANCHOR107]
+	.loc 2 1567 0 discriminator 1
 	sub	w5, w5, #1
-.L803:
-.LVL1094:
+.L809:
+.LVL1096:
 	cmp	w0, w5
-	blt	.L805
-.LVL1095:
-.L808:
+	blt	.L811
+.LVL1097:
+.L814:
 	add	w4, w27, 1
 	sxth	w27, w4
-.LVL1096:
-	b	.L793
-.LVL1097:
-.L805:
-	.loc 2 1520 0
+.LVL1098:
+	b	.L799
+.LVL1099:
+.L811:
+	.loc 2 1569 0
 	lsl	w2, w0, 1
 	sxtw	x2, w2
 	lsl	x1, x2, 2
 	ldrh	w1, [x10, x1]
-.LVL1098:
-	.loc 2 1521 0
+.LVL1100:
+	.loc 2 1570 0
 	cmp	w23, w1
-	bls	.L804
-	.loc 2 1523 0
+	bls	.L810
+	.loc 2 1572 0
 	add	x2, x2, 1
 	ubfiz	x1, x1, 2, 16
-.LVL1099:
+.LVL1101:
 	ldr	w2, [x10, x2, lsl 2]
-.LVL1100:
+.LVL1102:
 	str	w2, [x21, x1]
-.LVL1101:
-.L804:
+.LVL1103:
+.L810:
 	add	w0, w0, 1
-.LVL1102:
+.LVL1104:
 	sxth	w0, w0
-.LVL1103:
-	b	.L803
+.LVL1105:
+	b	.L809
 	.cfi_endproc
 .LFE275:
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
@@ -10367,53 +10479,53 @@ FtlMapTblRecovery:
 	.type	FtlLoadVonderInfo, %function
 FtlLoadVonderInfo:
 .LFB276:
-	.loc 2 1560 0
+	.loc 2 1609 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -16]!
 	.cfi_def_cfa_offset 16
 	.cfi_offset 29, -16
 	.cfi_offset 30, -8
-	.loc 2 1561 0
+	.loc 2 1610 0
 	adrp	x1, .LANCHOR27
 	adrp	x0, .LANCHOR149
 	add	x0, x0, :lo12:.LANCHOR149
-	.loc 2 1560 0
+	.loc 2 1609 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	.loc 2 1561 0
+	.loc 2 1610 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR27]
 	strh	w1, [x0, 10]
-	.loc 2 1562 0
+	.loc 2 1611 0
 	mov	w1, -3962
 	strh	w1, [x0, 4]
-	.loc 2 1563 0
+	.loc 2 1612 0
 	adrp	x1, .LANCHOR35
 	ldrh	w1, [x1, #:lo12:.LANCHOR35]
 	strh	w1, [x0, 8]
-	.loc 2 1564 0
+	.loc 2 1613 0
 	adrp	x1, .LANCHOR28
 	ldrh	w1, [x1, #:lo12:.LANCHOR28]
 	strh	w1, [x0, 6]
-	.loc 2 1565 0
+	.loc 2 1614 0
 	adrp	x1, .LANCHOR36
 	ldr	x1, [x1, #:lo12:.LANCHOR36]
 	str	x1, [x0, 16]
-	.loc 2 1566 0
+	.loc 2 1615 0
 	adrp	x1, .LANCHOR132
 	ldr	x1, [x1, #:lo12:.LANCHOR132]
 	str	x1, [x0, 24]
-	.loc 2 1567 0
+	.loc 2 1616 0
 	adrp	x1, .LANCHOR131
 	ldr	x1, [x1, #:lo12:.LANCHOR131]
 	str	x1, [x0, 32]
-	.loc 2 1568 0
+	.loc 2 1617 0
 	adrp	x1, .LANCHOR133
 	ldr	x1, [x1, #:lo12:.LANCHOR133]
 	str	x1, [x0, 40]
-	.loc 2 1570 0
+	.loc 2 1619 0
 	bl	FtlMapTblRecovery
-.LVL1104:
-	.loc 2 1573 0
+.LVL1106:
+	.loc 2 1622 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	.cfi_restore 30
@@ -10429,113 +10541,113 @@ FtlLoadVonderInfo:
 	.type	FtlL2PDataInit, %function
 FtlL2PDataInit:
 .LFB277:
-	.loc 2 1576 0
+	.loc 2 1625 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -64]!
 	.cfi_def_cfa_offset 64
 	.cfi_offset 29, -64
 	.cfi_offset 30, -56
-	.loc 2 1578 0
+	.loc 2 1627 0
 	mov	w1, 0
-	.loc 2 1576 0
+	.loc 2 1625 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -48
 	.cfi_offset 20, -40
-	.loc 2 1578 0
+	.loc 2 1627 0
 	adrp	x19, .LANCHOR130
 	adrp	x20, .LANCHOR30
-	.loc 2 1576 0
+	.loc 2 1625 0
 	stp	x21, x22, [sp, 32]
-	.loc 2 1578 0
+	.loc 2 1627 0
 	ldr	x0, [x19, #:lo12:.LANCHOR130]
 	.cfi_offset 21, -32
 	.cfi_offset 22, -24
-	.loc 2 1579 0
+	.loc 2 1628 0
 	adrp	x22, .LANCHOR23
-	.loc 2 1578 0
+	.loc 2 1627 0
 	ldr	w2, [x20, #:lo12:.LANCHOR30]
-	.loc 2 1579 0
+	.loc 2 1628 0
 	adrp	x21, .LANCHOR33
-	.loc 2 1576 0
+	.loc 2 1625 0
 	str	x23, [sp, 48]
 	.cfi_offset 23, -16
-	.loc 2 1579 0
+	.loc 2 1628 0
 	adrp	x23, .LANCHOR136
-	.loc 2 1578 0
+	.loc 2 1627 0
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL1105:
-	.loc 2 1579 0
+.LVL1107:
+	.loc 2 1628 0
 	ldrh	w0, [x21, #:lo12:.LANCHOR33]
 	mov	w1, 255
 	ldrh	w2, [x22, #:lo12:.LANCHOR23]
 	mul	w2, w2, w0
 	ldr	x0, [x23, #:lo12:.LANCHOR136]
 	bl	ftl_memset
-.LVL1106:
-	adrp	x0, .LANCHOR56
+.LVL1108:
+	adrp	x0, .LANCHOR55
 	ldrh	w3, [x21, #:lo12:.LANCHOR33]
-	.loc 2 1584 0
+	.loc 2 1633 0
 	ldr	x6, [x23, #:lo12:.LANCHOR136]
-	.loc 2 1580 0
+	.loc 2 1629 0
 	mov	x1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR56]
+	ldr	x0, [x0, #:lo12:.LANCHOR55]
 	mov	w2, -1
 	ldrh	w5, [x22, #:lo12:.LANCHOR23]
 	add	x3, x0, x3, lsl 4
-.LVL1107:
-.L823:
+.LVL1109:
+.L829:
 	add	x4, x1, x5
-	.loc 2 1580 0 is_stmt 0 discriminator 1
+	.loc 2 1629 0 is_stmt 0 discriminator 1
 	cmp	x0, x3
-	bne	.L824
-	.loc 2 1586 0 is_stmt 1
+	bne	.L830
+	.loc 2 1635 0 is_stmt 1
 	adrp	x1, .LANCHOR144
 	add	x0, x1, :lo12:.LANCHOR144
-	.loc 2 1596 0
+	.loc 2 1645 0
 	ldp	x21, x22, [sp, 32]
-	.loc 2 1587 0
+	.loc 2 1636 0
 	strh	w2, [x1, #:lo12:.LANCHOR144]
-	.loc 2 1588 0
+	.loc 2 1637 0
 	ldr	w1, [x20, #:lo12:.LANCHOR30]
 	strh	w1, [x0, 10]
-	.loc 2 1589 0
+	.loc 2 1638 0
 	mov	w1, -3902
 	strh	w1, [x0, 4]
-	.loc 2 1590 0
+	.loc 2 1639 0
 	adrp	x1, .LANCHOR147
-	.loc 2 1596 0
+	.loc 2 1645 0
 	ldr	x23, [sp, 48]
-	.loc 2 1586 0
+	.loc 2 1635 0
 	strh	w2, [x0, 2]
-	.loc 2 1590 0
+	.loc 2 1639 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR147]
 	strh	w1, [x0, 8]
-	.loc 2 1591 0
+	.loc 2 1640 0
 	adrp	x1, .LANCHOR32
 	ldrh	w1, [x1, #:lo12:.LANCHOR32]
 	strh	w1, [x0, 6]
-	.loc 2 1592 0
+	.loc 2 1641 0
 	adrp	x1, .LANCHOR129
 	ldr	x1, [x1, #:lo12:.LANCHOR129]
 	str	x1, [x0, 16]
-	.loc 2 1593 0
+	.loc 2 1642 0
 	adrp	x1, .LANCHOR135
 	ldr	x1, [x1, #:lo12:.LANCHOR135]
 	str	x1, [x0, 24]
-	.loc 2 1594 0
+	.loc 2 1643 0
 	ldr	x1, [x19, #:lo12:.LANCHOR130]
-	.loc 2 1596 0
+	.loc 2 1645 0
 	ldp	x19, x20, [sp, 16]
-	.loc 2 1594 0
+	.loc 2 1643 0
 	str	x1, [x0, 32]
-	.loc 2 1595 0
+	.loc 2 1644 0
 	adrp	x1, .LANCHOR134
 	ldr	x1, [x1, #:lo12:.LANCHOR134]
 	str	x1, [x0, 40]
-	.loc 2 1596 0
+	.loc 2 1645 0
 	ldp	x29, x30, [sp], 64
 	.cfi_remember_state
 	.cfi_restore 30
@@ -10547,21 +10659,21 @@ FtlL2PDataInit:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.L824:
+.L830:
 	.cfi_restore_state
-	.loc 2 1584 0 discriminator 3
+	.loc 2 1633 0 discriminator 3
 	and	x1, x1, -4
-	.loc 2 1583 0 discriminator 3
+	.loc 2 1632 0 discriminator 3
 	strh	w2, [x0]
-	.loc 2 1584 0 discriminator 3
+	.loc 2 1633 0 discriminator 3
 	add	x1, x6, x1
-	.loc 2 1582 0 discriminator 3
+	.loc 2 1631 0 discriminator 3
 	str	wzr, [x0, 4]
-	.loc 2 1584 0 discriminator 3
+	.loc 2 1633 0 discriminator 3
 	str	x1, [x0, 8]
 	add	x0, x0, 16
 	mov	x1, x4
-	b	.L823
+	b	.L829
 	.cfi_endproc
 .LFE277:
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
@@ -10571,7 +10683,7 @@ FtlL2PDataInit:
 	.type	FtlLoadMapInfo, %function
 FtlLoadMapInfo:
 .LFB278:
-	.loc 2 1599 0
+	.loc 2 1648 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -16]!
 	.cfi_def_cfa_offset 16
@@ -10579,15 +10691,15 @@ FtlLoadMapInfo:
 	.cfi_offset 30, -8
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	.loc 2 1600 0
+	.loc 2 1649 0
 	bl	FtlL2PDataInit
-.LVL1108:
-	.loc 2 1602 0
+.LVL1110:
+	.loc 2 1651 0
 	adrp	x0, .LANCHOR144
 	add	x0, x0, :lo12:.LANCHOR144
 	bl	FtlMapTblRecovery
-.LVL1109:
-	.loc 2 1605 0
+.LVL1111:
+	.loc 2 1654 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	.cfi_restore 30
@@ -10603,42 +10715,38 @@ FtlLoadMapInfo:
 	.type	FtlVariablesInit, %function
 FtlVariablesInit:
 .LFB207:
-	.loc 3 493 0
+	.loc 3 494 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
 	.cfi_offset 30, -24
-	.loc 3 496 0
-	adrp	x0, .LANCHOR150
 	.loc 3 497 0
+	adrp	x0, .LANCHOR150
 	mov	w1, -1
-	.loc 3 493 0
+	.loc 3 494 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	.loc 3 496 0
-	str	xzr, [x0, #:lo12:.LANCHOR150]
 	.loc 3 497 0
+	strh	w1, [x0, #:lo12:.LANCHOR150]
+	.loc 3 498 0
 	adrp	x0, .LANCHOR151
-	.loc 3 493 0
+	.loc 3 500 0
+	mov	w1, -1
+	.loc 3 494 0
 	str	x19, [sp, 16]
 	.cfi_offset 19, -16
-	.loc 3 503 0
-	adrp	x19, .LANCHOR6
-	.loc 3 497 0
-	strh	w1, [x0, #:lo12:.LANCHOR151]
 	.loc 3 498 0
+	str	wzr, [x0, #:lo12:.LANCHOR151]
+	.loc 3 499 0
 	adrp	x0, .LANCHOR152
-	.loc 3 500 0
-	mov	w1, -1
-	.loc 3 498 0
-	str	wzr, [x0, #:lo12:.LANCHOR152]
+	.loc 3 503 0
+	adrp	x19, .LANCHOR6
 	.loc 3 499 0
-	adrp	x0, .LANCHOR153
-	str	wzr, [x0, #:lo12:.LANCHOR153]
+	str	wzr, [x0, #:lo12:.LANCHOR152]
 	.loc 3 500 0
-	adrp	x0, .LANCHOR154
-	str	w1, [x0, #:lo12:.LANCHOR154]
+	adrp	x0, .LANCHOR153
+	str	w1, [x0, #:lo12:.LANCHOR153]
 	.loc 3 501 0
 	adrp	x0, .LANCHOR35
 	.loc 3 502 0
@@ -10652,15 +10760,15 @@ FtlVariablesInit:
 	ldr	x0, [x0, #:lo12:.LANCHOR36]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL1110:
+.LVL1112:
 	.loc 3 503 0
-	adrp	x0, .LANCHOR40
+	adrp	x0, .LANCHOR43
 	ldrh	w2, [x19, #:lo12:.LANCHOR6]
 	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR40]
+	ldr	x0, [x0, #:lo12:.LANCHOR43]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL1111:
+.LVL1113:
 	.loc 3 504 0
 	adrp	x0, .LANCHOR126
 	ldrh	w2, [x19, #:lo12:.LANCHOR6]
@@ -10668,27 +10776,27 @@ FtlVariablesInit:
 	ldr	x0, [x0, #:lo12:.LANCHOR126]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL1112:
+.LVL1114:
 	.loc 3 505 0
 	mov	w2, 48
 	mov	w1, 0
-	adrp	x0, .LANCHOR79
-	add	x0, x0, :lo12:.LANCHOR79
+	adrp	x0, .LANCHOR39
+	add	x0, x0, :lo12:.LANCHOR39
 	bl	ftl_memset
-.LVL1113:
+.LVL1115:
 	.loc 3 506 0
 	mov	w2, 512
 	mov	w1, 0
-	adrp	x0, .LANCHOR83
-	add	x0, x0, :lo12:.LANCHOR83
+	adrp	x0, .LANCHOR81
+	add	x0, x0, :lo12:.LANCHOR81
 	bl	ftl_memset
-.LVL1114:
+.LVL1116:
 	.loc 3 507 0
 	bl	FtlGcBufInit
-.LVL1115:
+.LVL1117:
 	.loc 3 508 0
 	bl	FtlL2PDataInit
-.LVL1116:
+.LVL1118:
 	.loc 3 510 0
 	ldr	x19, [sp, 16]
 	mov	w0, 0
@@ -10707,221 +10815,221 @@ FtlVariablesInit:
 	.type	SupperBlkListInit, %function
 SupperBlkListInit:
 .LFB285:
-	.loc 2 2067 0
+	.loc 2 2116 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -96]!
 	.cfi_def_cfa_offset 96
 	.cfi_offset 29, -96
 	.cfi_offset 30, -88
-	.loc 2 2071 0
+	.loc 2 2120 0
 	adrp	x0, .LANCHOR6
 	mov	w1, 0
-	.loc 2 2067 0
+	.loc 2 2116 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	.loc 2 2071 0
+	.loc 2 2120 0
 	ldrh	w2, [x0, #:lo12:.LANCHOR6]
 	mov	w0, 6
-	.loc 2 2067 0
+	.loc 2 2116 0
 	stp	x23, x24, [sp, 48]
 	.cfi_offset 23, -48
 	.cfi_offset 24, -40
-	.loc 2 2071 0
-	adrp	x24, .LANCHOR41
-	.loc 2 2067 0
+	.loc 2 2120 0
+	adrp	x24, .LANCHOR40
+	.loc 2 2116 0
 	stp	x19, x20, [sp, 16]
-	.loc 2 2075 0
+	.loc 2 2124 0
 	adrp	x23, .LANCHOR45
-	.loc 2 2067 0
+	.loc 2 2116 0
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 19, -80
 	.cfi_offset 20, -72
 	.cfi_offset 21, -64
 	.cfi_offset 22, -56
-	.loc 2 2076 0
+	.loc 2 2125 0
 	adrp	x22, .LANCHOR48
-	.loc 2 2071 0
+	.loc 2 2120 0
 	mul	w2, w2, w0
-	ldr	x0, [x24, #:lo12:.LANCHOR41]
-	.loc 2 2067 0
+	ldr	x0, [x24, #:lo12:.LANCHOR40]
+	.loc 2 2116 0
 	stp	x25, x26, [sp, 64]
 	.cfi_offset 25, -32
 	.cfi_offset 26, -24
-	.loc 2 2079 0
+	.loc 2 2128 0
 	adrp	x25, .LANCHOR5
-	.loc 2 2067 0
+	.loc 2 2116 0
 	str	x27, [sp, 80]
 	.cfi_offset 27, -16
-	.loc 2 2082 0
+	.loc 2 2131 0
 	adrp	x26, .LANCHOR13
-	.loc 2 2079 0
+	.loc 2 2128 0
 	add	x25, x25, :lo12:.LANCHOR5
-	.loc 2 2082 0
+	.loc 2 2131 0
 	add	x26, x26, :lo12:.LANCHOR13
-	.loc 2 2071 0
+	.loc 2 2120 0
 	bl	ftl_memset
-.LVL1117:
-	.loc 2 2077 0
+.LVL1119:
+	.loc 2 2126 0
 	mov	w21, 0
-	.loc 2 2072 0
+	.loc 2 2121 0
 	adrp	x0, .LANCHOR47
-	.loc 2 2077 0
+	.loc 2 2126 0
 	mov	w20, 0
-	.loc 2 2079 0
+	.loc 2 2128 0
 	mov	w19, 0
-	.loc 2 2075 0
+	.loc 2 2124 0
 	strh	wzr, [x23, #:lo12:.LANCHOR45]
-	.loc 2 2072 0
+	.loc 2 2121 0
 	str	xzr, [x0, #:lo12:.LANCHOR47]
-	.loc 2 2073 0
-	adrp	x0, .LANCHOR42
-	.loc 2 2076 0
+	.loc 2 2122 0
+	adrp	x0, .LANCHOR41
+	.loc 2 2125 0
 	strh	wzr, [x22, #:lo12:.LANCHOR48]
-.LVL1118:
-	.loc 2 2081 0
+.LVL1120:
+	.loc 2 2130 0
 	adrp	x27, .LANCHOR3
-	.loc 2 2073 0
-	str	xzr, [x0, #:lo12:.LANCHOR42]
-	.loc 2 2074 0
+	.loc 2 2122 0
+	str	xzr, [x0, #:lo12:.LANCHOR41]
+	.loc 2 2123 0
 	adrp	x0, .LANCHOR44
 	str	xzr, [x0, #:lo12:.LANCHOR44]
-.LVL1119:
-.L831:
-	.loc 2 2079 0 discriminator 1
+.LVL1121:
+.L837:
+	.loc 2 2128 0 discriminator 1
 	ldrh	w0, [x25]
 	cmp	w19, w0
-	bcs	.L837
-	.loc 2 2084 0
+	bcs	.L843
+	.loc 2 2133 0
 	adrp	x0, .LANCHOR19
-	.loc 2 2081 0
+	.loc 2 2130 0
 	ldrh	w8, [x27, #:lo12:.LANCHOR3]
-	.loc 2 2084 0
+	.loc 2 2133 0
 	mov	x6, 0
 	mov	w5, 0
 	ldrh	w7, [x0, #:lo12:.LANCHOR19]
-	b	.L838
-.LVL1120:
-.L833:
-	.loc 2 2082 0
+	b	.L844
+.LVL1122:
+.L839:
+	.loc 2 2131 0
 	ldrb	w0, [x26, x6]
 	mov	w1, w19
 	bl	V2P_block
-.LVL1121:
-	.loc 2 2083 0
-	bl	FtlBbmIsBadBlock
-.LVL1122:
-	cbnz	w0, .L832
-	.loc 2 2084 0
-	add	w5, w5, w7
 .LVL1123:
-	and	w5, w5, 65535
+	.loc 2 2132 0
+	bl	FtlBbmIsBadBlock
 .LVL1124:
-.L832:
-	add	x6, x6, 1
+	cbnz	w0, .L838
+	.loc 2 2133 0
+	add	w5, w5, w7
 .LVL1125:
+	and	w5, w5, 65535
+.LVL1126:
 .L838:
-	.loc 2 2081 0 discriminator 1
+	add	x6, x6, 1
+.LVL1127:
+.L844:
+	.loc 2 2130 0 discriminator 1
 	cmp	w8, w6, uxth
-	bhi	.L833
-	.loc 2 2086 0
-	cbz	w5, .L840
-	.loc 2 2087 0
+	bhi	.L839
+	.loc 2 2135 0
+	cbz	w5, .L846
+	.loc 2 2136 0
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.LVL1126:
-.L834:
-	.loc 2 2088 0
-	ldr	x1, [x24, #:lo12:.LANCHOR41]
+.LVL1128:
+.L840:
+	.loc 2 2137 0
+	ldr	x1, [x24, #:lo12:.LANCHOR40]
 	mov	w0, 6
 	umaddl	x0, w19, w0, x1
 	strh	w5, [x0, 4]
-	.loc 2 2090 0
+	.loc 2 2139 0
 	adrp	x0, .LANCHOR51
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w19
-	beq	.L835
-	.loc 2 2091 0 discriminator 1
+	beq	.L841
+	.loc 2 2140 0 discriminator 1
 	adrp	x0, .LANCHOR52
-	.loc 2 2090 0 discriminator 1
+	.loc 2 2139 0 discriminator 1
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
-	beq	.L835
-	.loc 2 2092 0
+	beq	.L841
+	.loc 2 2141 0
 	adrp	x0, .LANCHOR53
-	.loc 2 2091 0
+	.loc 2 2140 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w19
-	beq	.L835
-	.loc 2 2094 0
-	adrp	x1, .LANCHOR43
+	beq	.L841
+	.loc 2 2143 0
+	adrp	x1, .LANCHOR42
 	ubfiz	x0, x19, 1, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR43]
+	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x0]
-	cbnz	w0, .L836
-	.loc 2 2095 0
+	cbnz	w0, .L842
+	.loc 2 2144 0
 	add	w21, w21, 1
-.LVL1127:
-	.loc 2 2096 0
+.LVL1129:
+	.loc 2 2145 0
 	mov	w0, w19
-	.loc 2 2095 0
+	.loc 2 2144 0
 	and	w21, w21, 65535
-.LVL1128:
-	.loc 2 2096 0
-	bl	INSERT_FREE_LIST
-.LVL1129:
-.L835:
-	.loc 2 2079 0 discriminator 2
-	add	w19, w19, 1
 .LVL1130:
-	and	w19, w19, 65535
+	.loc 2 2145 0
+	bl	INSERT_FREE_LIST
 .LVL1131:
-	b	.L831
+.L841:
+	.loc 2 2128 0 discriminator 2
+	add	w19, w19, 1
 .LVL1132:
-.L840:
-	mov	w5, 0
+	and	w19, w19, 65535
 .LVL1133:
-	b	.L834
+	b	.L837
 .LVL1134:
-.L836:
-	.loc 2 2098 0
-	add	w20, w20, 1
+.L846:
+	mov	w5, 0
 .LVL1135:
-	.loc 2 2099 0
+	b	.L840
+.LVL1136:
+.L842:
+	.loc 2 2147 0
+	add	w20, w20, 1
+.LVL1137:
+	.loc 2 2148 0
 	mov	w0, w19
-	.loc 2 2098 0
+	.loc 2 2147 0
 	and	w20, w20, 65535
-.LVL1136:
-	.loc 2 2099 0
+.LVL1138:
+	.loc 2 2148 0
 	bl	INSERT_DATA_LIST
-.LVL1137:
-	b	.L835
-.L837:
-	.loc 2 2103 0
+.LVL1139:
+	b	.L841
+.L843:
+	.loc 2 2152 0
 	strh	w20, [x23, #:lo12:.LANCHOR45]
-	.loc 2 2105 0
+	.loc 2 2154 0
 	add	w20, w20, w21
-.LVL1138:
-	.loc 2 2104 0
+.LVL1140:
+	.loc 2 2153 0
 	strh	w21, [x22, #:lo12:.LANCHOR48]
-	.loc 2 2105 0
+	.loc 2 2154 0
 	cmp	w20, w0
-	ble	.L839
-	.loc 2 2105 0 is_stmt 0 discriminator 1
-	adrp	x1, .LANCHOR155
+	ble	.L845
+	.loc 2 2154 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR154
 	adrp	x0, .LC1
-	mov	w2, 2105
-	add	x1, x1, :lo12:.LANCHOR155
+	mov	w2, 2154
+	add	x1, x1, :lo12:.LANCHOR154
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1139:
-.L839:
-	.loc 2 2107 0 is_stmt 1
+.LVL1141:
+.L845:
+	.loc 2 2156 0 is_stmt 1
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
-.LVL1140:
+.LVL1142:
 	ldp	x21, x22, [sp, 32]
-.LVL1141:
+.LVL1143:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
@@ -10947,37 +11055,37 @@ SupperBlkListInit:
 	.type	ftl_check_vpc, %function
 ftl_check_vpc:
 .LFB290:
-	.loc 2 2223 0
+	.loc 2 2273 0
 	.cfi_startproc
-.LVL1142:
+.LVL1144:
 	stp	x29, x30, [sp, -112]!
 	.cfi_def_cfa_offset 112
 	.cfi_offset 29, -112
 	.cfi_offset 30, -104
-	.loc 2 2229 0
-	adrp	x0, .LC91
-	add	x0, x0, :lo12:.LC91
-	.loc 2 2223 0
+	.loc 2 2279 0
+	adrp	x0, .LC94
+	add	x0, x0, :lo12:.LC94
+	.loc 2 2273 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x23, x24, [sp, 48]
 	.cfi_offset 23, -64
 	.cfi_offset 24, -56
-	.loc 2 2232 0
-	adrp	x23, .LANCHOR62
-	add	x23, x23, :lo12:.LANCHOR62
-	.loc 2 2223 0
+	.loc 2 2282 0
+	adrp	x23, .LANCHOR61
+	add	x23, x23, :lo12:.LANCHOR61
+	.loc 2 2273 0
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -80
 	.cfi_offset 22, -72
-	.loc 2 2232 0
+	.loc 2 2282 0
 	mov	w22, 0
-	.loc 2 2223 0
+	.loc 2 2273 0
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
-	.loc 2 2229 0
-	adrp	x21, .LANCHOR156
-	.loc 2 2223 0
+	.loc 2 2279 0
+	adrp	x21, .LANCHOR155
+	.loc 2 2273 0
 	stp	x27, x28, [sp, 80]
 	.cfi_offset 19, -96
 	.cfi_offset 20, -88
@@ -10985,99 +11093,99 @@ ftl_check_vpc:
 	.cfi_offset 26, -40
 	.cfi_offset 27, -32
 	.cfi_offset 28, -24
-	.loc 2 2229 0
-	add	x1, x21, :lo12:.LANCHOR156
-	.loc 2 2231 0
+	.loc 2 2279 0
+	add	x1, x21, :lo12:.LANCHOR155
+	.loc 2 2281 0
 	adrp	x20, check_vpc_table
-	.loc 2 2229 0
+	.loc 2 2279 0
 	bl	printf
-.LVL1143:
-	.loc 2 2231 0
+.LVL1145:
+	.loc 2 2281 0
 	add	x19, x20, :lo12:check_vpc_table
 	mov	w2, 8192
 	mov	w1, 0
 	mov	x0, x19
 	bl	ftl_memset
-.LVL1144:
-.L843:
-	.loc 2 2232 0 discriminator 1
+.LVL1146:
+.L849:
+	.loc 2 2282 0 discriminator 1
 	ldr	w0, [x23]
 	cmp	w22, w0
-	bcc	.L845
-	.loc 2 2243 0 discriminator 1
+	bcc	.L851
+	.loc 2 2293 0 discriminator 1
 	adrp	x22, .LANCHOR5
-.LVL1145:
-	.loc 2 2247 0 discriminator 1
-	adrp	x24, .LC92
-	.loc 2 2243 0 discriminator 1
+.LVL1147:
+	.loc 2 2297 0 discriminator 1
+	adrp	x24, .LC95
+	.loc 2 2293 0 discriminator 1
 	add	x22, x22, :lo12:.LANCHOR5
-	.loc 2 2245 0 discriminator 1
+	.loc 2 2295 0 discriminator 1
 	add	x26, x20, :lo12:check_vpc_table
-	.loc 2 2247 0 discriminator 1
-	add	x24, x24, :lo12:.LC92
+	.loc 2 2297 0 discriminator 1
+	add	x24, x24, :lo12:.LC95
 	mov	w23, 0
 	mov	w19, 0
-	.loc 2 2245 0 discriminator 1
-	adrp	x25, .LANCHOR43
-.LVL1146:
-.L846:
-	.loc 2 2243 0 discriminator 1
+	.loc 2 2295 0 discriminator 1
+	adrp	x25, .LANCHOR42
+.LVL1148:
+.L852:
+	.loc 2 2293 0 discriminator 1
 	ldrh	w0, [x22]
 	cmp	w0, w19
-	bhi	.L848
-	.loc 2 2255 0
+	bhi	.L854
+	.loc 2 2305 0
 	adrp	x0, .LANCHOR47
 	ldr	x19, [x0, #:lo12:.LANCHOR47]
-.LVL1147:
-	cbz	x19, .L849
-.LBB242:
-	.loc 2 2257 0
+.LVL1149:
+	cbz	x19, .L855
+.LBB277:
+	.loc 2 2307 0
 	adrp	x0, .LANCHOR48
-	.loc 2 2263 0
-	adrp	x25, .LC93
+	.loc 2 2313 0
+	adrp	x25, .LC96
 	add	x20, x20, :lo12:check_vpc_table
-	add	x25, x25, :lo12:.LC93
-	.loc 2 2257 0
+	add	x25, x25, :lo12:.LC96
+	.loc 2 2307 0
 	ldrh	w26, [x0, #:lo12:.LANCHOR48]
-.LVL1148:
-	.loc 2 2258 0
-	adrp	x0, .LANCHOR41
+.LVL1150:
+	.loc 2 2308 0
+	adrp	x0, .LANCHOR40
 	mov	x24, x0
-	.loc 2 2259 0
+	.loc 2 2309 0
 	mov	w22, 0
-	.loc 2 2258 0
-	ldr	x1, [x0, #:lo12:.LANCHOR41]
-	.loc 2 2261 0
-	adrp	x27, .LANCHOR43
-	.loc 2 2266 0
+	.loc 2 2308 0
+	ldr	x1, [x0, #:lo12:.LANCHOR40]
+	.loc 2 2311 0
+	adrp	x27, .LANCHOR42
+	.loc 2 2316 0
 	mov	w28, 6
-	.loc 2 2258 0
+	.loc 2 2308 0
 	sub	x19, x19, x1
 	mov	x1, -6148914691236517206
 	asr	x19, x19, 1
 	movk	x1, 0xaaab, lsl 0
 	mul	x19, x19, x1
 	and	w19, w19, 65535
-.LVL1149:
-.L850:
-	.loc 2 2259 0 discriminator 1
-	cmp	w22, w26
-	bne	.L852
-.LVL1150:
-.L849:
-.LBE242:
-	.loc 2 2271 0
-	cbz	w23, .L842
 .LVL1151:
-	.loc 2 2271 0 is_stmt 0 discriminator 1
+.L856:
+	.loc 2 2309 0 discriminator 1
+	cmp	w22, w26
+	bne	.L858
+.LVL1152:
+.L855:
+.LBE277:
+	.loc 2 2321 0
+	cbz	w23, .L848
+.LVL1153:
+	.loc 2 2321 0 is_stmt 0 discriminator 1
 	adrp	x0, .LC1
-	mov	w2, 2271
-	add	x1, x21, :lo12:.LANCHOR156
+	mov	w2, 2321
+	add	x1, x21, :lo12:.LANCHOR155
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1152:
-.L842:
-	.loc 2 2272 0 is_stmt 1
+.LVL1154:
+.L848:
+	.loc 2 2322 0 is_stmt 1
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -11099,103 +11207,103 @@ ftl_check_vpc:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1153:
-.L845:
+.LVL1155:
+.L851:
 	.cfi_restore_state
-	.loc 2 2234 0
+	.loc 2 2284 0
 	mov	w2, 0
 	add	x1, x29, 108
 	mov	w0, w22
 	bl	log2phys
-.LVL1154:
-	.loc 2 2235 0
+.LVL1156:
+	.loc 2 2285 0
 	ldr	w0, [x29, 108]
 	cmn	w0, #1
-	beq	.L844
-	.loc 2 2237 0
+	beq	.L850
+	.loc 2 2287 0
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL1155:
-	.loc 2 2238 0
+.LVL1157:
+	.loc 2 2288 0
 	and	x0, x0, 65535
 	ldrh	w1, [x19, x0, lsl 1]
 	add	w1, w1, 1
 	strh	w1, [x19, x0, lsl 1]
-.LVL1156:
-.L844:
-	.loc 2 2232 0 discriminator 2
-	add	w22, w22, 1
-.LVL1157:
-	b	.L843
 .LVL1158:
-.L848:
-	.loc 2 2245 0
-	ldr	x0, [x25, #:lo12:.LANCHOR43]
+.L850:
+	.loc 2 2282 0 discriminator 2
+	add	w22, w22, 1
+.LVL1159:
+	b	.L849
+.LVL1160:
+.L854:
+	.loc 2 2295 0
+	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	ubfiz	x28, x19, 1, 16
 	sxtw	x27, w19
 	ldrh	w2, [x0, x28]
 	ldrh	w3, [x26, x27, lsl 1]
 	cmp	w2, w3
-	beq	.L847
-	.loc 2 2247 0
+	beq	.L853
+	.loc 2 2297 0
 	mov	w1, w19
 	mov	x0, x24
 	bl	printf
-.LVL1159:
-	.loc 2 2248 0
-	ldr	x0, [x25, #:lo12:.LANCHOR43]
+.LVL1161:
+	.loc 2 2298 0
+	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	mov	w1, 65535
 	ldrh	w0, [x0, x28]
 	cmp	w0, w1
-	beq	.L847
-	.loc 2 2248 0 is_stmt 0 discriminator 1
+	beq	.L853
+	.loc 2 2298 0 is_stmt 0 discriminator 1
 	ldrh	w1, [x26, x27, lsl 1]
-	.loc 2 2250 0 is_stmt 1 discriminator 1
+	.loc 2 2300 0 is_stmt 1 discriminator 1
 	cmp	w1, w0
 	csinc	w23, w23, wzr, ls
-.LVL1160:
-.L847:
-	.loc 2 2243 0 discriminator 2
-	add	w19, w19, 1
-.LVL1161:
-	and	w19, w19, 65535
 .LVL1162:
-	b	.L846
+.L853:
+	.loc 2 2293 0 discriminator 2
+	add	w19, w19, 1
 .LVL1163:
-.L852:
-.LBB243:
-	.loc 2 2261 0
-	ldr	x1, [x27, #:lo12:.LANCHOR43]
+	and	w19, w19, 65535
+.LVL1164:
+	b	.L852
+.LVL1165:
+.L858:
+.LBB278:
+	.loc 2 2311 0
+	ldr	x1, [x27, #:lo12:.LANCHOR42]
 	ubfiz	x0, x19, 1, 16
 	ldrh	w2, [x1, x0]
-	cbz	w2, .L851
-	.loc 2 2263 0
+	cbz	w2, .L857
+	.loc 2 2313 0
 	ldrh	w3, [x20, w19, sxtw 1]
-	.loc 2 2264 0
+	.loc 2 2314 0
 	mov	w23, 1
-.LVL1164:
-	.loc 2 2263 0
+.LVL1166:
+	.loc 2 2313 0
 	mov	w1, w19
 	mov	x0, x25
 	bl	printf
-.LVL1165:
-.L851:
-	.loc 2 2266 0
-	ldr	x0, [x24, #:lo12:.LANCHOR41]
+.LVL1167:
+.L857:
+	.loc 2 2316 0
+	ldr	x0, [x24, #:lo12:.LANCHOR40]
 	umull	x19, w19, w28
-.LVL1166:
+.LVL1168:
 	ldrh	w19, [x0, x19]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L849
-.LVL1167:
-	.loc 2 2259 0 discriminator 2
+	beq	.L855
+.LVL1169:
+	.loc 2 2309 0 discriminator 2
 	add	w22, w22, 1
-.LVL1168:
+.LVL1170:
 	and	w22, w22, 65535
-.LVL1169:
-	b	.L850
-.LBE243:
+.LVL1171:
+	b	.L856
+.LBE278:
 	.cfi_endproc
 .LFE290:
 	.size	ftl_check_vpc, .-ftl_check_vpc
@@ -11212,39 +11320,39 @@ FtlGcPageVarInit:
 	.cfi_offset 29, -32
 	.cfi_offset 30, -24
 	.loc 5 203 0
-	adrp	x0, .LANCHOR97
+	adrp	x0, .LANCHOR95
 	.loc 5 205 0
 	mov	w1, 255
 	.loc 5 202 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	.loc 5 203 0
-	strh	wzr, [x0, #:lo12:.LANCHOR97]
+	strh	wzr, [x0, #:lo12:.LANCHOR95]
 	.loc 5 204 0
-	adrp	x0, .LANCHOR99
+	adrp	x0, .LANCHOR97
 	.loc 5 202 0
 	str	x19, [sp, 16]
 	.cfi_offset 19, -16
 	.loc 5 205 0
 	adrp	x19, .LANCHOR21
 	.loc 5 204 0
-	strh	wzr, [x0, #:lo12:.LANCHOR99]
+	strh	wzr, [x0, #:lo12:.LANCHOR97]
 	.loc 5 205 0
-	adrp	x0, .LANCHOR98
+	adrp	x0, .LANCHOR96
 	ldrh	w2, [x19, #:lo12:.LANCHOR21]
-	ldr	x0, [x0, #:lo12:.LANCHOR98]
+	ldr	x0, [x0, #:lo12:.LANCHOR96]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL1170:
+.LVL1172:
 	.loc 5 206 0
 	ldrh	w2, [x19, #:lo12:.LANCHOR21]
 	mov	w0, 12
 	mov	w1, 255
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR100
-	ldr	x0, [x0, #:lo12:.LANCHOR100]
+	adrp	x0, .LANCHOR98
+	ldr	x0, [x0, #:lo12:.LANCHOR98]
 	bl	ftl_memset
-.LVL1171:
+.LVL1173:
 	.loc 5 208 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -11254,7 +11362,7 @@ FtlGcPageVarInit:
 	.cfi_def_cfa 31, 0
 	.loc 5 207 0
 	b	FtlGcBufInit
-.LVL1172:
+.LVL1174:
 	.cfi_endproc
 .LFE309:
 	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
@@ -11266,7 +11374,7 @@ FtlGcScanTempBlk:
 .LFB310:
 	.loc 5 211 0
 	.cfi_startproc
-.LVL1173:
+.LVL1175:
 	stp	x29, x30, [sp, -112]!
 	.cfi_def_cfa_offset 112
 	.cfi_offset 29, -112
@@ -11277,7 +11385,7 @@ FtlGcScanTempBlk:
 	.cfi_offset 21, -80
 	.cfi_offset 22, -72
 	.loc 5 220 0
-	adrp	x21, .LANCHOR157
+	adrp	x21, .LANCHOR156
 	.loc 5 211 0
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -96
@@ -11286,10 +11394,10 @@ FtlGcScanTempBlk:
 	stp	x27, x28, [sp, 80]
 	.loc 5 221 0
 	mov	w0, 65535
-.LVL1174:
+.LVL1176:
 	.loc 5 220 0
-	ldrh	w19, [x21, #:lo12:.LANCHOR157]
-.LVL1175:
+	ldrh	w19, [x21, #:lo12:.LANCHOR156]
+.LVL1177:
 	.cfi_offset 27, -32
 	.cfi_offset 28, -24
 	.loc 5 211 0
@@ -11302,27 +11410,27 @@ FtlGcScanTempBlk:
 	.cfi_offset 26, -40
 	.loc 5 221 0
 	cmp	w19, w0
-	beq	.L886
+	beq	.L892
 	.loc 5 223 0
-	cbnz	w19, .L870
-.L871:
+	cbnz	w19, .L876
+.L877:
 	.loc 5 224 0
 	bl	FtlGcPageVarInit
-.LVL1176:
-	b	.L872
-.LVL1177:
-.L886:
+.LVL1178:
+	b	.L878
+.LVL1179:
+.L892:
 	.loc 5 222 0
 	mov	w19, 0
-.LVL1178:
-.L870:
+.LVL1180:
+.L876:
 	.loc 5 223 0 discriminator 1
 	adrp	x0, .LANCHOR19
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	cmp	w0, w28
-	beq	.L871
-.LVL1179:
-.L872:
+	beq	.L877
+.LVL1181:
+.L878:
 	.loc 5 235 0
 	adrp	x27, .LANCHOR23
 	add	x27, x27, :lo12:.LANCHOR23
@@ -11330,15 +11438,15 @@ FtlGcScanTempBlk:
 	mov	w22, 0
 	.loc 5 228 0
 	mov	w23, 65535
-.LVL1180:
-.L880:
+.LVL1182:
+.L886:
 	ldrh	w0, [x20]
 	.loc 5 226 0
 	strb	wzr, [x20, 8]
-.LVL1181:
+.LVL1183:
 	.loc 5 228 0
 	cmp	w0, w23
-	beq	.L887
+	beq	.L893
 	.loc 5 236 0
 	adrp	x25, .LANCHOR24
 	.loc 5 231 0
@@ -11347,82 +11455,82 @@ FtlGcScanTempBlk:
 	add	x25, x25, :lo12:.LANCHOR24
 	.loc 5 231 0
 	add	x26, x26, :lo12:.LANCHOR3
-.L883:
-.LVL1182:
+.L889:
+.LVL1184:
 	.loc 5 235 0
-	adrp	x1, .LANCHOR93
+	adrp	x1, .LANCHOR91
 	.loc 5 234 0
 	adrp	x24, .LANCHOR120
 	.loc 5 235 0
 	ldrh	w7, [x27]
 	add	x5, x20, 16
-	ldr	x6, [x1, #:lo12:.LANCHOR93]
+	ldr	x6, [x1, #:lo12:.LANCHOR91]
 	.loc 5 236 0
-	adrp	x1, .LANCHOR94
+	adrp	x1, .LANCHOR92
 	.loc 5 234 0
 	ldr	x0, [x24, #:lo12:.LANCHOR120]
 	.loc 5 230 0
 	mov	w3, 0
 	.loc 5 236 0
-	ldr	x8, [x1, #:lo12:.LANCHOR94]
+	ldr	x8, [x1, #:lo12:.LANCHOR92]
 	ldrh	w1, [x26]
 	ldrh	w10, [x25]
 	add	x1, x1, 8
 	add	x1, x20, x1, lsl 1
-.LVL1183:
-.L874:
+.LVL1185:
+.L880:
 	.loc 5 231 0 discriminator 1
 	cmp	x1, x5
-	bne	.L876
+	bne	.L882
 	.loc 5 240 0
 	mov	w1, w3
 	str	w3, [x29, 108]
 	mov	w2, 0
 	bl	FlashReadPages
-.LVL1184:
+.LVL1186:
 	ldr	w3, [x29, 108]
 	.loc 5 241 0
 	mov	x11, 0
 	ubfiz	x12, x3, 5, 16
-.LVL1185:
-.L877:
+.LVL1187:
+.L883:
 	.loc 5 241 0 is_stmt 0 discriminator 1
 	cmp	x11, x12
-	bne	.L881
+	bne	.L887
 	.loc 5 264 0 is_stmt 1
 	add	w19, w19, 1
-.LVL1186:
+.LVL1188:
 	.loc 5 266 0
 	add	w22, w22, 1
-.LVL1187:
+.LVL1189:
 	.loc 5 264 0
 	and	w19, w19, 65535
-.LVL1188:
+.LVL1190:
 	.loc 5 268 0
 	cmp	w28, w22
 	adrp	x1, .LANCHOR19
-	bls	.L882
-.L884:
+	bls	.L888
+.L890:
 	.loc 5 274 0
 	ldrh	w0, [x1, #:lo12:.LANCHOR19]
 	cmp	w0, w19
-	bhi	.L883
-.L887:
+	bhi	.L889
+.L893:
 	.loc 5 227 0
 	mov	w2, 0
-	b	.L873
-.LVL1189:
-.L876:
+	b	.L879
+.LVL1191:
+.L882:
 	.loc 5 232 0
 	ldrh	w4, [x5]
-.LVL1190:
+.LVL1192:
 	.loc 5 233 0
 	cmp	w4, w23
-	beq	.L875
+	beq	.L881
 	.loc 5 234 0
 	ubfiz	x2, x3, 5, 16
 	orr	w4, w19, w4, lsl 10
-.LVL1191:
+.LVL1193:
 	add	x2, x0, x2
 	str	w4, [x2, 4]
 	.loc 5 235 0
@@ -11434,49 +11542,49 @@ FtlGcScanTempBlk:
 	mul	w4, w3, w10
 	.loc 5 237 0
 	add	w3, w3, 1
-.LVL1192:
+.LVL1194:
 	and	w3, w3, 65535
-.LVL1193:
+.LVL1195:
 	.loc 5 236 0
 	asr	w4, w4, 2
 	add	x4, x8, x4, sxtw 2
 	str	x4, [x2, 16]
-.L875:
-	add	x5, x5, 2
-.LVL1194:
-	b	.L874
-.LVL1195:
 .L881:
+	add	x5, x5, 2
+.LVL1196:
+	b	.L880
+.LVL1197:
+.L887:
 	.loc 5 242 0
 	ldr	x6, [x24, #:lo12:.LANCHOR120]
 	add	x5, x6, x11
 	ldr	w4, [x5, 4]
-.LVL1196:
+.LVL1198:
 	.loc 5 243 0
 	lsr	w0, w4, 10
 	bl	P2V_plane
-.LVL1197:
+.LVL1199:
 	and	w2, w0, 65535
-.LVL1198:
+.LVL1200:
 	.loc 5 245 0
 	ldr	w0, [x6, x11]
-.LVL1199:
-	cbnz	w0, .L878
+.LVL1201:
+	cbnz	w0, .L884
 	.loc 5 247 0
 	ldr	x0, [x5, 16]
-.LVL1200:
+.LVL1202:
 	add	x11, x11, 32
 	.loc 5 248 0
 	ldrh	w1, [x0]
 	cmp	w1, w23
-	bne	.L879
+	bne	.L885
 	.loc 5 249 0
-	adrp	x0, .LANCHOR153
-.LVL1201:
+	adrp	x0, .LANCHOR152
+.LVL1203:
 	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR153]
-.LVL1202:
-.L873:
+	str	w1, [x0, #:lo12:.LANCHOR152]
+.LVL1204:
+.L879:
 	.loc 5 282 0
 	strh	w19, [x20, 2]
 	.loc 5 281 0
@@ -11486,71 +11594,71 @@ FtlGcScanTempBlk:
 	.loc 5 284 0
 	mov	w1, w19
 	.loc 5 281 0
-	strh	w0, [x21, #:lo12:.LANCHOR157]
+	strh	w0, [x21, #:lo12:.LANCHOR156]
 	.loc 5 284 0
 	mov	x0, x20
 	bl	ftl_sb_update_avl_pages
-.LVL1203:
+.LVL1205:
 	.loc 5 285 0
-	b	.L885
-.LVL1204:
-.L879:
+	b	.L891
+.LVL1206:
+.L885:
 	.loc 5 252 0
 	ldp	w2, w0, [x0, 8]
-.LVL1205:
+.LVL1207:
 	mov	w1, w4
 	bl	FtlGcUpdatePage
-.LVL1206:
-	b	.L877
-.LVL1207:
-.L878:
+.LVL1208:
+	b	.L883
+.LVL1209:
+.L884:
 	.loc 5 256 0
-	adrp	x0, .LANCHOR43
+	adrp	x0, .LANCHOR42
 	ldrh	w1, [x20]
 	.loc 5 259 0
 	mov	w19, 0
-.LVL1208:
+.LVL1210:
 	.loc 5 256 0
-	ldr	x0, [x0, #:lo12:.LANCHOR43]
+	ldr	x0, [x0, #:lo12:.LANCHOR42]
 	strh	wzr, [x0, x1, lsl 1]
 	.loc 5 257 0
 	ldrh	w0, [x20]
 	bl	INSERT_FREE_LIST
-.LVL1209:
+.LVL1211:
 	.loc 5 258 0
 	mov	w0, -1
 	strh	w0, [x20]
-.LVL1210:
+.LVL1212:
 	.loc 5 260 0
 	bl	FtlGcPageVarInit
-.LVL1211:
+.LVL1213:
 	.loc 5 261 0
-	b	.L880
-.LVL1212:
-.L882:
+	b	.L886
+.LVL1214:
+.L888:
 	.loc 5 268 0 discriminator 1
-	ldrh	w0, [x21, #:lo12:.LANCHOR157]
+	ldrh	w0, [x21, #:lo12:.LANCHOR156]
 	cmp	w0, w23
-	beq	.L884
+	beq	.L890
 	.loc 5 269 0
 	add	w0, w0, w22
-	strh	w0, [x21, #:lo12:.LANCHOR157]
+	strh	w0, [x21, #:lo12:.LANCHOR156]
 	.loc 5 270 0
 	ldrh	w0, [x1, #:lo12:.LANCHOR19]
 	cmp	w0, w19
-	bls	.L884
-.LVL1213:
-.L885:
+	bls	.L890
+.LVL1215:
+.L891:
 	.loc 5 286 0
 	ldp	x19, x20, [sp, 16]
-.LVL1214:
+.LVL1216:
 	mov	w0, -1
 	ldp	x21, x22, [sp, 32]
-.LVL1215:
+.LVL1217:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-.LVL1216:
+.LVL1218:
 	ldp	x29, x30, [sp], 112
 	.cfi_restore 30
 	.cfi_restore 29
@@ -11577,7 +11685,7 @@ FlashTestBlk:
 .LFB344:
 	.loc 1 197 0
 	.cfi_startproc
-.LVL1217:
+.LVL1219:
 	stp	x29, x30, [sp, -128]!
 	.cfi_def_cfa_offset 128
 	.cfi_offset 29, -128
@@ -11591,13 +11699,13 @@ FlashTestBlk:
 	and	w19, w0, 65535
 	.loc 1 202 0
 	cmp	w19, 11
-	bls	.L895
-.LVL1218:
-.LBB246:
-.LBB247:
+	bls	.L901
+.LVL1220:
+.LBB281:
+.LBB282:
 	.loc 1 207 0
 	add	x0, x29, 64
-.LVL1219:
+.LVL1221:
 	.loc 1 208 0
 	mov	w2, 32
 	mov	w1, 165
@@ -11608,16 +11716,16 @@ FlashTestBlk:
 	stp	x20, x0, [x29, 40]
 	.loc 1 208 0
 	bl	ftl_memset
-.LVL1220:
+.LVL1222:
 	.loc 1 210 0
 	lsl	w19, w19, 10
-.LVL1221:
+.LVL1223:
 	.loc 1 209 0
 	mov	w2, 8
 	mov	w1, 90
 	mov	x0, x20
 	bl	ftl_memset
-.LVL1222:
+.LVL1224:
 	.loc 1 211 0
 	mov	w2, 1
 	.loc 1 210 0
@@ -11626,14 +11734,14 @@ FlashTestBlk:
 	mov	w1, w2
 	add	x0, x29, 32
 	bl	FlashEraseBlocks
-.LVL1223:
+.LVL1225:
 	.loc 1 212 0
 	mov	w3, 1
 	add	x0, x29, 32
 	mov	w2, w3
 	mov	w1, w3
 	bl	FlashProgPages
-.LVL1224:
+.LVL1226:
 	.loc 1 213 0
 	ldr	w0, [x29, 32]
 	.loc 1 219 0
@@ -11646,13 +11754,13 @@ FlashTestBlk:
 	.loc 1 213 0
 	csetm	w19, ne
 .LDL1:
-.LVL1225:
+.LVL1227:
 	.loc 1 219 0
 	bl	FlashEraseBlocks
-.LVL1226:
-.L893:
-.LBE247:
-.LBE246:
+.LVL1228:
+.L899:
+.LBE282:
+.LBE281:
 	.loc 1 221 0
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
@@ -11664,12 +11772,12 @@ FlashTestBlk:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1227:
-.L895:
+.LVL1229:
+.L901:
 	.cfi_restore_state
 	.loc 1 203 0
 	mov	w19, 0
-	b	.L893
+	b	.L899
 	.cfi_endproc
 .LFE344:
 	.size	FlashTestBlk, .-FlashTestBlk
@@ -11681,7 +11789,7 @@ FlashGetBadBlockList:
 .LFB345:
 	.loc 1 224 0
 	.cfi_startproc
-.LVL1228:
+.LVL1230:
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
@@ -11699,48 +11807,48 @@ FlashGetBadBlockList:
 	mov	w20, w1
 	.loc 1 227 0
 	mov	w1, 255
-.LVL1229:
+.LVL1231:
 	bl	ftl_memset
-.LVL1230:
+.LVL1232:
 	.loc 1 228 0
-	adrp	x0, .LANCHOR107
+	adrp	x0, .LANCHOR105
 	mov	w1, w20
-	ldr	x2, [x0, #:lo12:.LANCHOR107]
+	ldr	x2, [x0, #:lo12:.LANCHOR105]
 	mov	x0, x19
 	blr	x2
-.LVL1231:
+.LVL1233:
 	and	w0, w0, 65535
-.LVL1232:
+.LVL1234:
 	.loc 1 229 0
 	cmp	w0, 50
-	bls	.L898
+	bls	.L904
 	.loc 1 230 0
 	mov	w2, 256
 	mov	w1, 255
 	mov	x0, x19
-.LVL1233:
+.LVL1235:
 	bl	ftl_memset
-.LVL1234:
+.LVL1236:
 	.loc 1 231 0
 	mov	w0, 0
-.LVL1235:
-.L898:
+.LVL1237:
+.L904:
 	.loc 1 233 0
 	adrp	x1, .LANCHOR0+14
 	ldrh	w1, [x1, #:lo12:.LANCHOR0+14]
 	cmp	w1, 4
-	bne	.L902
+	bne	.L908
 	mov	x1, 0
-.L900:
-.LVL1236:
+.L906:
+.LVL1238:
 	.loc 1 234 0 discriminator 1
 	cmp	w0, w1, uxth
-	bhi	.L901
-.LVL1237:
-.L902:
+	bhi	.L907
+.LVL1239:
+.L908:
 	.loc 1 239 0
 	ldp	x19, x20, [sp, 16]
-.LVL1238:
+.LVL1240:
 	ldp	x29, x30, [sp], 32
 	.cfi_remember_state
 	.cfi_restore 30
@@ -11749,17 +11857,17 @@ FlashGetBadBlockList:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1239:
-.L901:
+.LVL1241:
+.L907:
 	.cfi_restore_state
 	.loc 1 235 0 discriminator 3
 	ldrh	w2, [x19, x1, lsl 1]
 	lsr	w2, w2, 1
 	strh	w2, [x19, x1, lsl 1]
-.LVL1240:
+.LVL1242:
 	add	x1, x1, 1
-.LVL1241:
-	b	.L900
+.LVL1243:
+	b	.L906
 	.cfi_endproc
 .LFE345:
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
@@ -11771,11 +11879,11 @@ ftl_memcpy:
 .LFB347:
 	.loc 1 247 0
 	.cfi_startproc
-.LVL1242:
+.LVL1244:
 	.loc 1 248 0
 	uxtw	x2, w2
 	b	memcpy
-.LVL1243:
+.LVL1245:
 	.cfi_endproc
 .LFE347:
 	.size	ftl_memcpy, .-ftl_memcpy
@@ -11787,7 +11895,7 @@ FtlBbmTblFlush:
 .LFB226:
 	.loc 4 80 0
 	.cfi_startproc
-.LVL1244:
+.LVL1246:
 	stp	x29, x30, [sp, -96]!
 	.cfi_def_cfa_offset 96
 	.cfi_offset 29, -96
@@ -11798,22 +11906,22 @@ FtlBbmTblFlush:
 	.cfi_offset 23, -48
 	.cfi_offset 24, -40
 	.loc 4 88 0
-	adrp	x23, .LANCHOR109
+	adrp	x23, .LANCHOR108
 	.loc 4 80 0
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -80
 	.cfi_offset 20, -72
 	.loc 4 87 0
-	adrp	x19, .LANCHOR108
+	adrp	x19, .LANCHOR106
 	.loc 4 80 0
 	stp	x21, x22, [sp, 32]
 	.loc 4 87 0
-	add	x20, x19, :lo12:.LANCHOR108
+	add	x20, x19, :lo12:.LANCHOR106
 	.cfi_offset 21, -64
 	.cfi_offset 22, -56
-	adrp	x22, .LANCHOR39
+	adrp	x22, .LANCHOR107
 	.loc 4 88 0
-	ldr	x1, [x23, #:lo12:.LANCHOR109]
+	ldr	x1, [x23, #:lo12:.LANCHOR108]
 	.loc 4 80 0
 	stp	x25, x26, [sp, 64]
 	adrp	x21, .LANCHOR37
@@ -11823,7 +11931,7 @@ FtlBbmTblFlush:
 	.cfi_offset 27, -16
 	add	x25, x21, :lo12:.LANCHOR37
 	.loc 4 87 0
-	ldr	x0, [x22, #:lo12:.LANCHOR39]
+	ldr	x0, [x22, #:lo12:.LANCHOR107]
 	.loc 4 91 0
 	adrp	x26, .LANCHOR10
 	.loc 4 88 0
@@ -11843,29 +11951,29 @@ FtlBbmTblFlush:
 	.loc 4 89 0
 	mov	w1, 0
 	bl	ftl_memset
-.LVL1245:
-.L906:
+.LVL1247:
+.L912:
 	.loc 4 91 0 discriminator 1
 	ldrh	w0, [x26]
 	cmp	w24, w0
-	blt	.L907
+	blt	.L913
 	.loc 4 94 0
-	add	x19, x19, :lo12:.LANCHOR108
+	add	x19, x19, :lo12:.LANCHOR106
 	.loc 4 98 0
 	add	x20, x21, :lo12:.LANCHOR37
 	.loc 4 95 0
 	mov	w2, 16
 	mov	w1, 255
 	.loc 4 108 0
-	adrp	x24, .LC94
-.LVL1246:
+	adrp	x24, .LC97
+.LVL1248:
 	.loc 4 110 0
 	adrp	x26, .LANCHOR20
 	.loc 4 94 0
 	ldr	x27, [x19, 16]
-.LVL1247:
+.LVL1249:
 	.loc 4 108 0
-	add	x24, x24, :lo12:.LC94
+	add	x24, x24, :lo12:.LC97
 	.loc 4 110 0
 	add	x26, x26, :lo12:.LANCHOR20
 	.loc 4 82 0
@@ -11873,7 +11981,7 @@ FtlBbmTblFlush:
 	.loc 4 95 0
 	mov	x0, x27
 	bl	ftl_memset
-.LVL1248:
+.LVL1250:
 	.loc 4 97 0
 	mov	w0, -3887
 	strh	w0, [x27]
@@ -11896,8 +12004,8 @@ FtlBbmTblFlush:
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0, #:lo12:.LANCHOR2]
 	strh	w0, [x27, 12]
-.LVL1249:
-.L908:
+.LVL1251:
+.L914:
 	.loc 4 108 0
 	ldrh	w4, [x27, 10]
 	.loc 4 107 0
@@ -11906,10 +12014,10 @@ FtlBbmTblFlush:
 	.loc 4 108 0
 	ldrh	w3, [x20, 4]
 	.loc 4 104 0
-	ldr	x0, [x22, #:lo12:.LANCHOR39]
+	ldr	x0, [x22, #:lo12:.LANCHOR107]
 	str	x0, [x19, 8]
 	.loc 4 105 0
-	ldr	x0, [x23, #:lo12:.LANCHOR109]
+	ldr	x0, [x23, #:lo12:.LANCHOR108]
 	str	x0, [x19, 16]
 	.loc 4 107 0
 	orr	w0, w2, w1, lsl 10
@@ -11920,20 +12028,20 @@ FtlBbmTblFlush:
 	.loc 4 108 0
 	mov	x0, x24
 	bl	printf
-.LVL1250:
+.LVL1252:
 	.loc 4 109 0
 	mov	w3, 1
 	mov	x0, x19
 	mov	w1, w3
 	mov	w2, w3
 	bl	FlashProgPages
-.LVL1251:
+.LVL1253:
 	.loc 4 110 0
 	ldrh	w0, [x26]
 	ldrh	w1, [x20, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L909
+	blt	.L915
 	.loc 4 113 0
 	ldr	w0, [x20, 8]
 	.loc 4 122 0
@@ -11951,13 +12059,13 @@ FtlBbmTblFlush:
 	.loc 4 118 0
 	strh	w0, [x20, 4]
 	.loc 4 121 0
-	adrp	x0, .LANCHOR112
+	adrp	x0, .LANCHOR111
 	.loc 4 116 0
 	strh	w1, [x20]
 	.loc 4 119 0
 	lsl	w1, w1, 10
 	.loc 4 121 0
-	ldr	x0, [x0, #:lo12:.LANCHOR112]
+	ldr	x0, [x0, #:lo12:.LANCHOR111]
 	.loc 4 119 0
 	str	w1, [x19, 4]
 	.loc 4 117 0
@@ -11967,15 +12075,15 @@ FtlBbmTblFlush:
 	.loc 4 122 0
 	mov	w1, w2
 	bl	FlashEraseBlocks
-.LVL1252:
+.LVL1254:
 	.loc 4 123 0
 	mov	w3, 1
 	mov	x0, x19
 	mov	w2, w3
 	mov	w1, w3
 	bl	FlashProgPages
-.LVL1253:
-.L909:
+.LVL1255:
+.L915:
 	.loc 4 126 0
 	ldrh	w0, [x20, 2]
 	add	w0, w0, 1
@@ -11983,34 +12091,34 @@ FtlBbmTblFlush:
 	.loc 4 127 0
 	ldr	w0, [x19]
 	cmn	w0, #1
-	bne	.L910
+	bne	.L916
 	.loc 4 129 0
 	ldr	w1, [x19, 4]
 	.loc 4 130 0
 	add	w21, w21, 1
-.LVL1254:
+.LVL1256:
 	.loc 4 129 0
-	adrp	x0, .LC95
+	adrp	x0, .LC98
 	.loc 4 130 0
 	and	w21, w21, 65535
 	.loc 4 129 0
-	add	x0, x0, :lo12:.LC95
+	add	x0, x0, :lo12:.LC98
 	bl	printf
-.LVL1255:
+.LVL1257:
 	.loc 4 131 0
 	cmp	w21, 3
-	bls	.L908
+	bls	.L914
 	.loc 4 132 0
 	ldr	w1, [x19, 4]
-	adrp	x0, .LC96
+	adrp	x0, .LC99
 	mov	w2, w21
-	add	x0, x0, :lo12:.LC96
+	add	x0, x0, :lo12:.LC99
 	bl	printf
-.LVL1256:
-.L912:
-	b	.L912
-.LVL1257:
-.L907:
+.LVL1258:
+.L918:
+	b	.L918
+.LVL1259:
+.L913:
 	.loc 4 92 0 discriminator 3
 	ldrh	w2, [x27]
 	ldr	x1, [x25], 8
@@ -12019,31 +12127,31 @@ FtlBbmTblFlush:
 	lsl	w2, w2, 2
 	.loc 4 91 0 discriminator 3
 	add	w24, w24, 1
-.LVL1258:
+.LVL1260:
 	.loc 4 92 0 discriminator 3
 	add	x0, x0, x3, sxtw 2
 	bl	ftl_memcpy
-.LVL1259:
-	b	.L906
-.LVL1260:
-.L913:
-	mov	w25, 1
 .LVL1261:
-	b	.L908
+	b	.L912
 .LVL1262:
-.L910:
+.L919:
+	mov	w25, 1
+.LVL1263:
+	b	.L914
+.LVL1264:
+.L916:
 	.loc 4 139 0
-	cbz	w25, .L913
+	cbz	w25, .L919
 	.loc 4 146 0
 	mov	w0, 0
 	ldr	x27, [sp, 80]
-.LVL1263:
+.LVL1265:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-.LVL1264:
+.LVL1266:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-.LVL1265:
+.LVL1267:
 	ldp	x29, x30, [sp], 96
 	.cfi_restore 30
 	.cfi_restore 29
@@ -12067,9 +12175,9 @@ FtlBbmTblFlush:
 	.type	allocate_data_superblock, %function
 allocate_data_superblock:
 .LFB298:
-	.loc 2 2531 0
+	.loc 2 2582 0
 	.cfi_startproc
-.LVL1266:
+.LVL1268:
 	stp	x29, x30, [sp, -112]!
 	.cfi_def_cfa_offset 112
 	.cfi_offset 29, -112
@@ -12079,36 +12187,36 @@ allocate_data_superblock:
 	stp	x27, x28, [sp, 80]
 	.cfi_offset 27, -32
 	.cfi_offset 28, -24
-	.loc 2 2537 0
+	.loc 2 2588 0
 	adrp	x28, .LANCHOR48
-	.loc 2 2531 0
+	.loc 2 2582 0
 	stp	x23, x24, [sp, 48]
 	.cfi_offset 23, -64
 	.cfi_offset 24, -56
-	.loc 2 2540 0
+	.loc 2 2591 0
 	add	x23, x28, :lo12:.LANCHOR48
-	.loc 2 2531 0
+	.loc 2 2582 0
 	stp	x19, x20, [sp, 16]
-	.loc 2 2537 0
+	.loc 2 2588 0
 	adrp	x27, .LANCHOR45
 	.cfi_offset 19, -96
 	.cfi_offset 20, -88
-	.loc 2 2531 0
+	.loc 2 2582 0
 	mov	x19, x0
 	stp	x21, x22, [sp, 32]
-	.loc 2 2537 0
+	.loc 2 2588 0
 	add	x0, x27, :lo12:.LANCHOR45
-.LVL1267:
-	.loc 2 2531 0
+.LVL1269:
+	.loc 2 2582 0
 	stp	x25, x26, [sp, 64]
 	.cfi_offset 21, -80
 	.cfi_offset 22, -72
 	.cfi_offset 25, -48
 	.cfi_offset 26, -40
-	.loc 2 2537 0
+	.loc 2 2588 0
 	str	x0, [x29, 104]
-.LVL1268:
-.L916:
+.LVL1270:
+.L922:
 	ldr	x1, [x29, 104]
 	adrp	x24, .LANCHOR5
 	ldrh	w0, [x28, #:lo12:.LANCHOR48]
@@ -12116,414 +12224,414 @@ allocate_data_superblock:
 	add	w0, w0, w1
 	ldrh	w1, [x24, #:lo12:.LANCHOR5]
 	cmp	w0, w1
-	ble	.L917
-	.loc 2 2537 0 is_stmt 0 discriminator 1
-	adrp	x1, .LANCHOR158
+	ble	.L923
+	.loc 2 2588 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR157
 	adrp	x0, .LC1
-	mov	w2, 2537
-	add	x1, x1, :lo12:.LANCHOR158
+	mov	w2, 2588
+	add	x1, x1, :lo12:.LANCHOR157
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1269:
-.L917:
-	.loc 2 2539 0 is_stmt 1
+.LVL1271:
+.L923:
+	.loc 2 2590 0 is_stmt 1
 	adrp	x0, .LANCHOR53
 	add	x0, x0, :lo12:.LANCHOR53
 	cmp	x19, x0
-	bne	.L942
-	.loc 2 2540 0
-	adrp	x1, .LANCHOR89
+	bne	.L948
+	.loc 2 2591 0
+	adrp	x1, .LANCHOR87
 	ldrh	w0, [x23]
-	ldr	w1, [x1, #:lo12:.LANCHOR89]
+	ldr	w1, [x1, #:lo12:.LANCHOR87]
 	mul	w1, w0, w1
 	lsr	w0, w0, 1
 	add	w0, w0, 1
 	add	w1, w0, w1, lsr 2
-.LVL1270:
-	.loc 2 2544 0
+.LVL1272:
+	.loc 2 2595 0
 	ands	w1, w1, 65535
-	beq	.L918
-	.loc 2 2545 0
+	beq	.L924
+	.loc 2 2596 0
 	sub	w1, w1, #1
-.LVL1271:
+.LVL1273:
 	and	w1, w1, 65535
-.LVL1272:
-.L918:
-	.loc 2 2546 0
+.LVL1274:
+.L924:
+	.loc 2 2597 0
 	adrp	x0, .LANCHOR47
 	add	x0, x0, :lo12:.LANCHOR47
 	bl	List_pop_index_node
-.LVL1273:
+.LVL1275:
 	and	w20, w0, 65535
-.LVL1274:
+.LVL1276:
 	ldrh	w0, [x23]
-	cbnz	w0, .L919
-	.loc 2 2546 0 is_stmt 0 discriminator 1
-	adrp	x1, .LANCHOR158
+	cbnz	w0, .L925
+	.loc 2 2597 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR157
 	adrp	x0, .LC1
-	mov	w2, 2546
-	add	x1, x1, :lo12:.LANCHOR158
+	mov	w2, 2597
+	add	x1, x1, :lo12:.LANCHOR157
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1275:
-.L919:
-	.loc 2 2546 0 discriminator 3
+.LVL1277:
+.L925:
+	.loc 2 2597 0 discriminator 3
 	ldrh	w0, [x23]
 	sub	w0, w0, #1
 	strh	w0, [x23]
-	.loc 2 2549 0 is_stmt 1 discriminator 3
+	.loc 2 2600 0 is_stmt 1 discriminator 3
 	strh	w20, [x19]
-	.loc 2 2550 0 discriminator 3
+	.loc 2 2601 0 discriminator 3
 	mov	x0, x19
 	bl	make_superblock
-.LVL1276:
-	.loc 2 2551 0 discriminator 3
+.LVL1278:
+	.loc 2 2602 0 discriminator 3
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L920
-	.loc 2 2555 0
-	adrp	x1, .LANCHOR43
+	cbnz	w0, .L926
+	.loc 2 2606 0
+	adrp	x1, .LANCHOR42
 	ubfiz	x0, x20, 1, 16
 	mov	w2, -1
-	ldr	x1, [x1, #:lo12:.LANCHOR43]
+	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	strh	w2, [x1, x0]
-	.loc 2 2556 0
+	.loc 2 2607 0
 	mov	w0, w20
 	bl	INSERT_DATA_LIST
-.LVL1277:
-	.loc 2 2557 0
+.LVL1279:
+	.loc 2 2608 0
 	ldrh	w1, [x27, #:lo12:.LANCHOR45]
 	ldrh	w0, [x23]
 	add	w0, w0, w1
 	ldrh	w1, [x24, #:lo12:.LANCHOR5]
 	cmp	w0, w1
-	ble	.L916
-	.loc 2 2557 0 is_stmt 0 discriminator 1
-	mov	w2, 2557
-	adrp	x1, .LANCHOR158
+	ble	.L922
+	.loc 2 2608 0 is_stmt 0 discriminator 1
+	mov	w2, 2608
+	adrp	x1, .LANCHOR157
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR158
+	add	x1, x1, :lo12:.LANCHOR157
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1278:
-	b	.L916
-.LVL1279:
-.L942:
-	mov	w1, 0
-	b	.L918
 .LVL1280:
-.L920:
-	.loc 2 2560 0 is_stmt 1
+	b	.L922
+.LVL1281:
+.L948:
+	mov	w1, 0
+	b	.L924
+.LVL1282:
+.L926:
+	.loc 2 2611 0 is_stmt 1
 	ldrh	w1, [x27, #:lo12:.LANCHOR45]
 	ldrh	w0, [x23]
 	add	w0, w0, w1
 	ldrh	w1, [x24, #:lo12:.LANCHOR5]
 	cmp	w0, w1
-	ble	.L922
-	.loc 2 2560 0 is_stmt 0 discriminator 1
-	adrp	x1, .LANCHOR158
+	ble	.L928
+	.loc 2 2611 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR157
 	adrp	x0, .LC1
-	mov	w2, 2560
-	add	x1, x1, :lo12:.LANCHOR158
+	mov	w2, 2611
+	add	x1, x1, :lo12:.LANCHOR157
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1281:
-.L922:
-	.loc 2 2563 0 is_stmt 1 discriminator 1
+.LVL1283:
+.L928:
+	.loc 2 2614 0 is_stmt 1 discriminator 1
 	adrp	x0, .LANCHOR3
-	.loc 2 2564 0 discriminator 1
-	adrp	x25, .LANCHOR112
+	.loc 2 2615 0 discriminator 1
+	adrp	x25, .LANCHOR111
 	add	x26, x19, 16
 	mov	w21, 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	mov	x4, x26
-	ldr	x3, [x25, #:lo12:.LANCHOR112]
-	.loc 2 2566 0 discriminator 1
+	ldr	x3, [x25, #:lo12:.LANCHOR111]
+	.loc 2 2617 0 discriminator 1
 	mov	w6, 65535
 	ubfiz	x0, x0, 5, 16
 	add	x1, x3, 8
 	add	x0, x0, 8
 	add	x0, x3, x0
-.L923:
-.LVL1282:
-	.loc 2 2563 0 discriminator 1
+.L929:
+.LVL1284:
+	.loc 2 2614 0 discriminator 1
 	cmp	x0, x1
-	bne	.L925
-	.loc 2 2571 0
-	cbnz	w21, .L926
-	.loc 2 2571 0 is_stmt 0 discriminator 1
-	adrp	x1, .LANCHOR158
+	bne	.L931
+	.loc 2 2622 0
+	cbnz	w21, .L932
+	.loc 2 2622 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR157
 	adrp	x0, .LC1
-	mov	w2, 2571
-	add	x1, x1, :lo12:.LANCHOR158
+	mov	w2, 2622
+	add	x1, x1, :lo12:.LANCHOR157
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1283:
-.L926:
-	.loc 2 2573 0 is_stmt 1
-	adrp	x0, .LANCHOR82
-	ldrh	w0, [x0, #:lo12:.LANCHOR82]
+.LVL1285:
+.L932:
+	.loc 2 2624 0 is_stmt 1
+	adrp	x0, .LANCHOR80
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w0, w20
-	bne	.L927
-	.loc 2 2573 0 is_stmt 0 discriminator 1
-	adrp	x1, .LANCHOR158
+	bne	.L933
+	.loc 2 2624 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR157
 	adrp	x0, .LC1
-	mov	w2, 2573
-	add	x1, x1, :lo12:.LANCHOR158
+	mov	w2, 2624
+	add	x1, x1, :lo12:.LANCHOR157
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1284:
-.L927:
-	.loc 2 2574 0 is_stmt 1
+.LVL1286:
+.L933:
+	.loc 2 2625 0 is_stmt 1
 	ldrb	w0, [x19, 8]
 	uxtw	x22, w20
-	adrp	x6, .LANCHOR40
+	adrp	x6, .LANCHOR43
 	adrp	x7, .LANCHOR14
-	adrp	x5, .LANCHOR73
-	adrp	x4, .LANCHOR74
-	cbnz	w0, .L928
-	.loc 2 2575 0
-	ldr	x2, [x6, #:lo12:.LANCHOR40]
+	adrp	x5, .LANCHOR72
+	adrp	x4, .LANCHOR73
+	cbnz	w0, .L934
+	.loc 2 2626 0
+	ldr	x2, [x6, #:lo12:.LANCHOR43]
 	lsl	x1, x22, 1
 	ldrh	w0, [x2, x1]
-	cbz	w0, .L929
-	.loc 2 2576 0
+	cbz	w0, .L935
+	.loc 2 2627 0
 	ldrh	w3, [x7, #:lo12:.LANCHOR14]
 	add	w0, w0, w3
-.L953:
-	.loc 2 2578 0
+.L959:
+	.loc 2 2629 0
 	strh	w0, [x2, x1]
-	.loc 2 2580 0
+	.loc 2 2631 0
 	mov	w1, 0
-	.loc 2 2579 0
-	ldr	w0, [x5, #:lo12:.LANCHOR73]
+	.loc 2 2630 0
+	ldr	w0, [x5, #:lo12:.LANCHOR72]
 	add	w0, w0, 1
-	str	w0, [x5, #:lo12:.LANCHOR73]
-	.loc 2 2580 0
+	str	w0, [x5, #:lo12:.LANCHOR72]
+	.loc 2 2631 0
 	mov	w0, w20
 	bl	ftl_set_blk_mode
-.LVL1285:
-.L931:
-	.loc 2 2587 0
-	ldr	x0, [x6, #:lo12:.LANCHOR40]
+.LVL1287:
+.L937:
+	.loc 2 2638 0
+	ldr	x0, [x6, #:lo12:.LANCHOR43]
 	lsl	x22, x22, 1
 	ldrh	w1, [x0, x22]
-	adrp	x0, .LANCHOR77
-	ldr	w2, [x0, #:lo12:.LANCHOR77]
+	adrp	x0, .LANCHOR76
+	ldr	w2, [x0, #:lo12:.LANCHOR76]
 	cmp	w1, w2
-	bls	.L932
-	.loc 2 2588 0
-	str	w1, [x0, #:lo12:.LANCHOR77]
-.L932:
-	.loc 2 2590 0
-	ldr	w2, [x5, #:lo12:.LANCHOR73]
-	ldr	w1, [x4, #:lo12:.LANCHOR74]
+	bls	.L938
+	.loc 2 2639 0
+	str	w1, [x0, #:lo12:.LANCHOR76]
+.L938:
+	.loc 2 2641 0
+	ldr	w2, [x5, #:lo12:.LANCHOR72]
+	ldr	w1, [x4, #:lo12:.LANCHOR73]
 	ldrh	w0, [x7, #:lo12:.LANCHOR14]
 	madd	w0, w0, w2, w1
 	ldrh	w1, [x24, #:lo12:.LANCHOR5]
 	udiv	w0, w0, w1
-	adrp	x1, .LANCHOR75
-	str	w0, [x1, #:lo12:.LANCHOR75]
-	.loc 2 2591 0
+	adrp	x1, .LANCHOR74
+	str	w0, [x1, #:lo12:.LANCHOR74]
+	.loc 2 2642 0
 	adrp	x0, .LANCHOR127
 	ldr	x1, [x0, #:lo12:.LANCHOR127]
 	ldr	w0, [x1, 16]
 	add	w0, w0, 1
 	str	w0, [x1, 16]
-.LVL1286:
-	.loc 2 2594 0
-	ldr	x0, [x25, #:lo12:.LANCHOR112]
+.LVL1288:
+	.loc 2 2645 0
+	ldr	x0, [x25, #:lo12:.LANCHOR111]
 	ubfiz	x1, x21, 5, 16
 	add	x1, x1, 4
 	add	x2, x0, 4
 	add	x1, x0, x1
-.LVL1287:
-.L933:
-	.loc 2 2593 0 discriminator 1
+.LVL1289:
+.L939:
+	.loc 2 2644 0 discriminator 1
 	cmp	x1, x2
-	bne	.L934
-	.loc 2 2595 0
+	bne	.L940
+	.loc 2 2646 0
 	ldrb	w1, [x19, 8]
 	mov	w2, w21
-	.loc 2 2597 0
+	.loc 2 2648 0
 	mov	x24, 0
-	.loc 2 2595 0
+	.loc 2 2646 0
 	bl	FlashEraseBlocks
-.LVL1288:
-	.loc 2 2596 0
+.LVL1290:
+	.loc 2 2647 0
 	mov	w1, 0
-.LVL1289:
-.L935:
-	.loc 2 2597 0 discriminator 1
+.LVL1291:
+.L941:
+	.loc 2 2648 0 discriminator 1
 	cmp	w21, w24, uxth
-	bhi	.L937
-	.loc 2 2608 0
-	cbz	w1, .L938
-	.loc 2 2609 0
+	bhi	.L943
+	.loc 2 2659 0
+	cbz	w1, .L944
+	.loc 2 2660 0
 	mov	w0, w20
 	bl	update_multiplier_value
-.LVL1290:
-	.loc 2 2610 0
+.LVL1292:
+	.loc 2 2661 0
 	bl	FtlBbmTblFlush
-.LVL1291:
-.L938:
-	.loc 2 2613 0
+.LVL1293:
+.L944:
+	.loc 2 2664 0
 	ldrb	w0, [x19, 7]
-	adrp	x2, .LANCHOR43
-	cbnz	w0, .L939
-	.loc 2 2615 0
-	ldr	x0, [x2, #:lo12:.LANCHOR43]
+	adrp	x2, .LANCHOR42
+	cbnz	w0, .L945
+	.loc 2 2666 0
+	ldr	x0, [x2, #:lo12:.LANCHOR42]
 	mov	w1, -1
 	strh	w1, [x0, x22]
-	.loc 2 2616 0
+	.loc 2 2667 0
 	mov	w0, w20
 	bl	INSERT_DATA_LIST
-.LVL1292:
+.LVL1294:
+	.loc 2 2668 0
+	b	.L922
+.LVL1295:
+.L931:
 	.loc 2 2617 0
-	b	.L916
-.LVL1293:
-.L925:
-	.loc 2 2566 0
 	ldrh	w2, [x4]
-	.loc 2 2565 0
+	.loc 2 2616 0
 	stp	xzr, xzr, [x1]
-	.loc 2 2566 0
+	.loc 2 2617 0
 	cmp	w2, w6
-	beq	.L924
-	.loc 2 2567 0
+	beq	.L930
+	.loc 2 2618 0
 	ubfiz	x5, x21, 5, 16
-	.loc 2 2568 0
+	.loc 2 2619 0
 	add	w21, w21, 1
-.LVL1294:
-	.loc 2 2567 0
+.LVL1296:
+	.loc 2 2618 0
 	add	x5, x3, x5
-	.loc 2 2568 0
+	.loc 2 2619 0
 	and	w21, w21, 65535
-.LVL1295:
-	.loc 2 2567 0
+.LVL1297:
+	.loc 2 2618 0
 	lsl	w2, w2, 10
 	str	w2, [x5, 4]
-.L924:
+.L930:
 	add	x1, x1, 32
 	add	x4, x4, 2
-	b	.L923
-.L929:
-	.loc 2 2578 0
+	b	.L929
+.L935:
+	.loc 2 2629 0
 	mov	w0, 2
-	b	.L953
-.L928:
-	.loc 2 2582 0
-	ldr	x2, [x6, #:lo12:.LANCHOR40]
+	b	.L959
+.L934:
+	.loc 2 2633 0
+	ldr	x2, [x6, #:lo12:.LANCHOR43]
 	lsl	x0, x22, 1
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-	.loc 2 2583 0
-	ldr	w0, [x4, #:lo12:.LANCHOR74]
+	.loc 2 2634 0
+	ldr	w0, [x4, #:lo12:.LANCHOR73]
 	add	w0, w0, 1
-	str	w0, [x4, #:lo12:.LANCHOR74]
-.LVL1296:
-.LBB248:
-.LBB249:
-	mov	w0, w20
-	bl	ftl_set_blk_mode.part.7
-.LVL1297:
-	b	.L931
+	str	w0, [x4, #:lo12:.LANCHOR73]
 .LVL1298:
-.L934:
-.LBE249:
-.LBE248:
-	.loc 2 2594 0 discriminator 3
+.LBB283:
+.LBB284:
+	mov	w0, w20
+	bl	ftl_set_blk_mode.part.6
+.LVL1299:
+	b	.L937
+.LVL1300:
+.L940:
+.LBE284:
+.LBE283:
+	.loc 2 2645 0 discriminator 3
 	ldr	w3, [x2]
 	and	w3, w3, -1024
 	str	w3, [x2], 32
-	b	.L933
-.LVL1299:
-.L937:
-	.loc 2 2598 0
-	ldr	x2, [x25, #:lo12:.LANCHOR112]
+	b	.L939
+.LVL1301:
+.L943:
+	.loc 2 2649 0
+	ldr	x2, [x25, #:lo12:.LANCHOR111]
 	lsl	x0, x24, 5
 	add	x3, x2, x0
 	ldr	w2, [x2, x0]
 	cmn	w2, #1
-	bne	.L936
-	.loc 2 2599 0
+	bne	.L942
+	.loc 2 2650 0
 	add	w1, w1, 1
-.LVL1300:
-	.loc 2 2600 0
+.LVL1302:
+	.loc 2 2651 0
 	ldr	w0, [x3, 4]
-	.loc 2 2599 0
+	.loc 2 2650 0
 	stp	w2, w1, [x29, 96]
-.LVL1301:
-	.loc 2 2601 0
+.LVL1303:
+	.loc 2 2652 0
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.LVL1302:
-	.loc 2 2603 0
+.LVL1304:
+	.loc 2 2654 0
 	ldp	w2, w1, [x29, 96]
-	.loc 2 2602 0
+	.loc 2 2653 0
 	strh	w2, [x26]
-	.loc 2 2603 0
+	.loc 2 2654 0
 	ldrb	w0, [x19, 7]
 	sub	w0, w0, #1
 	strb	w0, [x19, 7]
-.LVL1303:
-.L936:
+.LVL1305:
+.L942:
 	add	x24, x24, 1
-.LVL1304:
+.LVL1306:
 	add	x26, x26, 2
-	b	.L935
-.LVL1305:
-.L939:
-	.loc 2 2620 0
+	b	.L941
+.LVL1307:
+.L945:
+	.loc 2 2671 0
 	adrp	x1, .LANCHOR19
-	.loc 2 2624 0
-	adrp	x3, .LANCHOR71
-	.loc 2 2623 0
+	.loc 2 2675 0
+	adrp	x3, .LANCHOR70
+	.loc 2 2674 0
 	strb	wzr, [x19, 6]
-	.loc 2 2620 0
+	.loc 2 2671 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR19]
-	.loc 2 2622 0
+	.loc 2 2673 0
 	strh	wzr, [x19, 2]
-	.loc 2 2621 0
+	.loc 2 2672 0
 	strh	w20, [x19]
-	.loc 2 2620 0
+	.loc 2 2671 0
 	mul	w0, w0, w1
-	.loc 2 2624 0
-	ldr	w1, [x3, #:lo12:.LANCHOR71]
+	.loc 2 2675 0
+	ldr	w1, [x3, #:lo12:.LANCHOR70]
 	str	w1, [x19, 12]
 	add	w1, w1, 1
-	str	w1, [x3, #:lo12:.LANCHOR71]
-	.loc 2 2625 0
-	ldr	x1, [x2, #:lo12:.LANCHOR43]
-	.loc 2 2620 0
+	str	w1, [x3, #:lo12:.LANCHOR70]
+	.loc 2 2676 0
+	ldr	x1, [x2, #:lo12:.LANCHOR42]
+	.loc 2 2671 0
 	and	w0, w0, 65535
 	strh	w0, [x19, 4]
-	.loc 2 2625 0
+	.loc 2 2676 0
 	strh	w0, [x1, x22]
-	.loc 2 2626 0
+	.loc 2 2677 0
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L940
-	.loc 2 2626 0 is_stmt 0 discriminator 2
+	cbz	w0, .L946
+	.loc 2 2677 0 is_stmt 0 discriminator 2
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L941
-.L940:
-	.loc 2 2626 0 discriminator 3
-	adrp	x1, .LANCHOR158
+	cbnz	w0, .L947
+.L946:
+	.loc 2 2677 0 discriminator 3
+	adrp	x1, .LANCHOR157
 	adrp	x0, .LC1
-	mov	w2, 2626
-	add	x1, x1, :lo12:.LANCHOR158
+	mov	w2, 2677
+	add	x1, x1, :lo12:.LANCHOR157
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1306:
-.L941:
-	.loc 2 2628 0 is_stmt 1
+.LVL1308:
+.L947:
+	.loc 2 2679 0 is_stmt 1
 	ldp	x19, x20, [sp, 16]
-.LVL1307:
+.LVL1309:
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
-.LVL1308:
+.LVL1310:
 	ldp	x23, x24, [sp, 48]
-.LVL1309:
+.LVL1311:
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
@@ -12552,7 +12660,7 @@ FtlGcFreeBadSuperBlk:
 .LFB317:
 	.loc 5 390 0
 	.cfi_startproc
-.LVL1310:
+.LVL1312:
 	stp	x29, x30, [sp, -96]!
 	.cfi_def_cfa_offset 96
 	.cfi_offset 29, -96
@@ -12563,15 +12671,15 @@ FtlGcFreeBadSuperBlk:
 	.cfi_offset 21, -64
 	.cfi_offset 22, -56
 	.loc 5 395 0
-	adrp	x21, .LANCHOR103
+	adrp	x21, .LANCHOR101
 	.loc 5 390 0
 	stp	x25, x26, [sp, 64]
 	.cfi_offset 25, -32
 	.cfi_offset 26, -24
 	and	w25, w0, 65535
 	.loc 5 395 0
-	ldrh	w0, [x21, #:lo12:.LANCHOR103]
-.LVL1311:
+	ldrh	w0, [x21, #:lo12:.LANCHOR101]
+.LVL1313:
 	.loc 5 390 0
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
@@ -12582,31 +12690,31 @@ FtlGcFreeBadSuperBlk:
 	.cfi_offset 24, -40
 	.cfi_offset 27, -16
 	.loc 5 395 0
-	cbz	w0, .L955
-.LBB252:
-.LBB253:
+	cbz	w0, .L961
+.LBB287:
+.LBB288:
 	.loc 5 399 0
-	adrp	x23, .LANCHOR104
+	adrp	x23, .LANCHOR102
 	.loc 5 406 0
-	add	x24, x23, :lo12:.LANCHOR104
-.LBE253:
-.LBE252:
+	add	x24, x23, :lo12:.LANCHOR102
+.LBE288:
+.LBE287:
 	mov	w19, 0
-.L956:
-.LVL1312:
-.LBB256:
-.LBB254:
+.L962:
+.LVL1314:
+.LBB291:
+.LBB289:
 	.loc 5 396 0
 	adrp	x0, .LANCHOR3
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w0, w19
-	bhi	.L962
+	bhi	.L968
 	.loc 5 412 0
 	bl	FtlGcReFreshBadBlk
-.LVL1313:
-.L955:
-.LBE254:
-.LBE256:
+.LVL1315:
+.L961:
+.LBE289:
+.LBE291:
 	.loc 5 415 0
 	mov	w0, 0
 	ldr	x27, [sp, 80]
@@ -12614,7 +12722,7 @@ FtlGcFreeBadSuperBlk:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-.LVL1314:
+.LVL1316:
 	ldp	x29, x30, [sp], 96
 	.cfi_remember_state
 	.cfi_restore 30
@@ -12630,55 +12738,55 @@ FtlGcFreeBadSuperBlk:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1315:
-.L962:
+.LVL1317:
+.L968:
 	.cfi_restore_state
-.LBB257:
-.LBB255:
+.LBB292:
+.LBB290:
 	.loc 5 397 0
 	adrp	x0, .LANCHOR13
 	add	x0, x0, :lo12:.LANCHOR13
 	mov	w1, w25
 	.loc 5 398 0
-	add	x22, x21, :lo12:.LANCHOR103
+	add	x22, x21, :lo12:.LANCHOR101
 	mov	w20, 0
 	.loc 5 397 0
 	ldrb	w0, [x0, w19, sxtw]
 	bl	V2P_block
-.LVL1316:
+.LVL1318:
 	and	w26, w0, 65535
-.LVL1317:
-.L957:
+.LVL1319:
+.L963:
 	.loc 5 398 0
 	ldrh	w0, [x22]
 	cmp	w0, w20
-	bhi	.L961
+	bhi	.L967
 	.loc 5 396 0
 	add	w19, w19, 1
-.LVL1318:
+.LVL1320:
 	and	w19, w19, 65535
-.LVL1319:
-	b	.L956
-.L961:
+.LVL1321:
+	b	.L962
+.L967:
 	.loc 5 399 0
-	add	x0, x23, :lo12:.LANCHOR104
+	add	x0, x23, :lo12:.LANCHOR102
 	add	w27, w20, 1
 	ldrh	w0, [x0, w20, sxtw 1]
 	cmp	w0, w26
-	bne	.L958
+	bne	.L964
 	.loc 5 401 0
 	mov	w1, w26
-	adrp	x0, .LC97
-	add	x0, x0, :lo12:.LC97
+	adrp	x0, .LC100
+	add	x0, x0, :lo12:.LC100
 	bl	printf
-.LVL1320:
+.LVL1322:
 	.loc 5 403 0
 	mov	w0, w26
 	bl	FtlBbmMapBadBlock
-.LVL1321:
+.LVL1323:
 	.loc 5 404 0
 	bl	FtlBbmTblFlush
-.LVL1322:
+.LVL1324:
 	.loc 5 405 0
 	ldrh	w1, [x22]
 	.loc 5 406 0
@@ -12686,32 +12794,32 @@ FtlGcFreeBadSuperBlk:
 	and	x4, x20, 65535
 	.loc 5 405 0
 	mov	x0, 0
-.LVL1323:
-.L959:
+.LVL1325:
+.L965:
 	add	w2, w20, w0
 	cmp	w1, w2, uxth
-	bhi	.L960
+	bhi	.L966
 	.loc 5 407 0
 	sub	w1, w1, #1
 	strh	w1, [x22]
-.LVL1324:
-.L958:
+.LVL1326:
+.L964:
 	.loc 5 398 0
 	and	w20, w27, 65535
-.LVL1325:
-	b	.L957
-.LVL1326:
-.L960:
+.LVL1327:
+	b	.L963
+.LVL1328:
+.L966:
 	.loc 5 406 0
 	add	x2, x3, x0
 	ldrh	w5, [x24, x2, lsl 1]
 	add	x2, x4, x0
 	add	x0, x0, 1
-.LVL1327:
+.LVL1329:
 	strh	w5, [x24, x2, lsl 1]
-	b	.L959
-.LBE255:
-.LBE257:
+	b	.L965
+.LBE290:
+.LBE292:
 	.cfi_endproc
 .LFE317:
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
@@ -12721,70 +12829,70 @@ FtlGcFreeBadSuperBlk:
 	.type	update_vpc_list, %function
 update_vpc_list:
 .LFB301:
-	.loc 2 2687 0
+	.loc 2 2738 0
 	.cfi_startproc
-.LVL1328:
+.LVL1330:
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
 	.cfi_offset 30, -24
-	.loc 2 2688 0
-	adrp	x1, .LANCHOR43
-	.loc 2 2687 0
+	.loc 2 2739 0
+	adrp	x1, .LANCHOR42
+	.loc 2 2738 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -16
 	.cfi_offset 20, -8
-	.loc 2 2687 0
+	.loc 2 2738 0
 	and	w19, w0, 65535
-	.loc 2 2688 0
-	ldr	x1, [x1, #:lo12:.LANCHOR43]
+	.loc 2 2739 0
+	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ubfiz	x0, x19, 1, 16
-.LVL1329:
+.LVL1331:
 	ldrh	w0, [x1, x0]
-	cbnz	w0, .L968
-	.loc 2 2689 0
-	adrp	x0, .LANCHOR82
-	ldrh	w1, [x0, #:lo12:.LANCHOR82]
+	cbnz	w0, .L974
+	.loc 2 2740 0
+	adrp	x0, .LANCHOR80
+	ldrh	w1, [x0, #:lo12:.LANCHOR80]
 	cmp	w1, w19
-	bne	.L969
-	.loc 2 2691 0
+	bne	.L975
+	.loc 2 2742 0
 	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR82]
-.L970:
-.LVL1330:
-.LBB260:
-.LBB261:
-	.loc 2 2696 0
+	strh	w1, [x0, #:lo12:.LANCHOR80]
+.L976:
+.LVL1332:
+.LBB295:
+.LBB296:
+	.loc 2 2747 0
 	adrp	x20, .LANCHOR45
 	mov	w1, w19
-	adrp	x0, .LANCHOR42
-	add	x0, x0, :lo12:.LANCHOR42
+	adrp	x0, .LANCHOR41
+	add	x0, x0, :lo12:.LANCHOR41
 	bl	List_remove_node
-.LVL1331:
+.LVL1333:
 	ldrh	w0, [x20, #:lo12:.LANCHOR45]
-	cbnz	w0, .L972
-	adrp	x1, .LANCHOR159
+	cbnz	w0, .L978
+	adrp	x1, .LANCHOR158
 	adrp	x0, .LC1
-	mov	w2, 2696
-	add	x1, x1, :lo12:.LANCHOR159
+	mov	w2, 2747
+	add	x1, x1, :lo12:.LANCHOR158
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1332:
-.L972:
+.LVL1334:
+.L978:
 	ldrh	w0, [x20, #:lo12:.LANCHOR45]
 	sub	w0, w0, #1
 	strh	w0, [x20, #:lo12:.LANCHOR45]
-	.loc 2 2697 0
+	.loc 2 2748 0
 	mov	w0, w19
 	bl	free_data_superblock
-.LVL1333:
-	.loc 2 2698 0
+.LVL1335:
+	.loc 2 2749 0
 	mov	w0, w19
 	bl	FtlGcFreeBadSuperBlk
-.LVL1334:
-	.loc 2 2699 0
+.LVL1336:
+	.loc 2 2750 0
 	adrp	x0, .LANCHOR48
 	ldrh	w1, [x20, #:lo12:.LANCHOR45]
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
@@ -12792,43 +12900,43 @@ update_vpc_list:
 	adrp	x1, .LANCHOR5
 	ldrh	w1, [x1, #:lo12:.LANCHOR5]
 	cmp	w0, w1
-	ble	.L976
-	adrp	x1, .LANCHOR159
+	ble	.L982
+	adrp	x1, .LANCHOR158
 	adrp	x0, .LC1
-	mov	w2, 2699
-	add	x1, x1, :lo12:.LANCHOR159
+	mov	w2, 2750
+	add	x1, x1, :lo12:.LANCHOR158
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1335:
-.L976:
+.LVL1337:
+.L982:
 	mov	w0, 1
-	b	.L967
-.LVL1336:
-.L969:
-.LBE261:
-.LBE260:
-	.loc 2 2692 0
+	b	.L973
+.LVL1338:
+.L975:
+.LBE296:
+.LBE295:
+	.loc 2 2743 0
 	adrp	x0, .LANCHOR51
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w19
-	beq	.L975
-	.loc 2 2692 0 is_stmt 0 discriminator 1
+	beq	.L981
+	.loc 2 2743 0 is_stmt 0 discriminator 1
 	adrp	x0, .LANCHOR52
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
-	beq	.L975
-	.loc 2 2692 0 discriminator 2
+	beq	.L981
+	.loc 2 2743 0 discriminator 2
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w19
-	bne	.L970
-.L975:
-	.loc 2 2694 0 is_stmt 1
+	bne	.L976
+.L981:
+	.loc 2 2745 0 is_stmt 1
 	mov	w0, 0
-.L967:
-	.loc 2 2705 0
+.L973:
+	.loc 2 2756 0
 	ldp	x19, x20, [sp, 16]
-.LVL1337:
+.LVL1339:
 	ldp	x29, x30, [sp], 32
 	.cfi_remember_state
 	.cfi_restore 30
@@ -12837,13 +12945,13 @@ update_vpc_list:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.L968:
+.L974:
 	.cfi_restore_state
-	.loc 2 2702 0
+	.loc 2 2753 0
 	mov	w0, w19
 	bl	List_update_data_list
-.LVL1338:
-	b	.L975
+.LVL1340:
+	b	.L981
 	.cfi_endproc
 .LFE301:
 	.size	update_vpc_list, .-update_vpc_list
@@ -12853,9 +12961,9 @@ update_vpc_list:
 	.type	decrement_vpc_count, %function
 decrement_vpc_count:
 .LFB302:
-	.loc 2 2708 0
+	.loc 2 2759 0
 	.cfi_startproc
-.LVL1339:
+.LVL1341:
 	stp	x29, x30, [sp, -48]!
 	.cfi_def_cfa_offset 48
 	.cfi_offset 29, -48
@@ -12868,39 +12976,39 @@ decrement_vpc_count:
 	and	w19, w0, 65535
 	str	x21, [sp, 32]
 	.cfi_offset 21, -16
-	.loc 2 2711 0
+	.loc 2 2762 0
 	mov	w0, 65535
-.LVL1340:
+.LVL1342:
 	cmp	w19, w0
-	beq	.L979
-	.loc 2 2712 0
-	adrp	x21, .LANCHOR43
+	beq	.L985
+	.loc 2 2763 0
+	adrp	x21, .LANCHOR42
 	ubfiz	x20, x19, 1, 16
-	ldr	x1, [x21, #:lo12:.LANCHOR43]
+	ldr	x1, [x21, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x20]
-	cbnz	w0, .L980
-	.loc 2 2713 0
+	cbnz	w0, .L986
+	.loc 2 2764 0
 	mov	w2, 0
 	mov	w1, w19
-	adrp	x0, .LC98
-	add	x0, x0, :lo12:.LC98
+	adrp	x0, .LC101
+	add	x0, x0, :lo12:.LC101
 	bl	printf
-.LVL1341:
-	.loc 2 2714 0
-	ldr	x0, [x21, #:lo12:.LANCHOR43]
+.LVL1343:
+	.loc 2 2765 0
+	ldr	x0, [x21, #:lo12:.LANCHOR42]
 	ldrh	w0, [x0, x20]
-	cbz	w0, .L981
-.L986:
-.LVL1342:
-	.loc 2 2715 0 discriminator 1
+	cbz	w0, .L987
+.L992:
+.LVL1344:
+	.loc 2 2766 0 discriminator 1
 	mov	w20, 0
-.LVL1343:
-.L978:
-	.loc 2 2733 0
+.LVL1345:
+.L984:
+	.loc 2 2784 0
 	mov	w0, w20
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
-.LVL1344:
+.LVL1346:
 	ldp	x29, x30, [sp], 48
 	.cfi_remember_state
 	.cfi_restore 30
@@ -12910,73 +13018,73 @@ decrement_vpc_count:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1345:
-.L981:
+.LVL1347:
+.L987:
 	.cfi_restore_state
-	.loc 2 2714 0 discriminator 1
-	mov	w2, 2714
-	adrp	x1, .LANCHOR160
+	.loc 2 2765 0 discriminator 1
+	mov	w2, 2765
+	adrp	x1, .LANCHOR159
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR160
+	add	x1, x1, :lo12:.LANCHOR159
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1346:
-	b	.L986
-.L980:
-	.loc 2 2717 0
+.LVL1348:
+	b	.L992
+.L986:
+	.loc 2 2768 0
 	sub	w0, w0, #1
 	strh	w0, [x1, x20]
-.L979:
-	.loc 2 2721 0
-	adrp	x21, .LANCHOR151
+.L985:
+	.loc 2 2772 0
+	adrp	x21, .LANCHOR150
 	mov	w1, 65535
-	ldrh	w0, [x21, #:lo12:.LANCHOR151]
+	ldrh	w0, [x21, #:lo12:.LANCHOR150]
 	cmp	w0, w1
-	bne	.L983
-	.loc 2 2722 0
-	strh	w19, [x21, #:lo12:.LANCHOR151]
-	b	.L986
-.L983:
-	.loc 2 2724 0
+	bne	.L989
+	.loc 2 2773 0
+	strh	w19, [x21, #:lo12:.LANCHOR150]
+	b	.L992
+.L989:
+	.loc 2 2775 0
 	cmp	w19, w0
-	beq	.L986
-	.loc 2 2727 0
+	beq	.L992
+	.loc 2 2778 0
 	bl	update_vpc_list
-.LVL1347:
+.LVL1349:
 	cmp	w0, 0
-	.loc 2 2730 0
-	adrp	x1, .LANCHOR41
-	adrp	x0, .LANCHOR42
-	.loc 2 2729 0
-	strh	w19, [x21, #:lo12:.LANCHOR151]
-	.loc 2 2727 0
+	.loc 2 2781 0
+	adrp	x1, .LANCHOR40
+	adrp	x0, .LANCHOR41
+	.loc 2 2780 0
+	strh	w19, [x21, #:lo12:.LANCHOR150]
+	.loc 2 2778 0
 	cset	w20, ne
-.LVL1348:
-	.loc 2 2730 0
-	ldr	x1, [x1, #:lo12:.LANCHOR41]
-	ldr	x0, [x0, #:lo12:.LANCHOR42]
+.LVL1350:
+	.loc 2 2781 0
+	ldr	x1, [x1, #:lo12:.LANCHOR40]
+	ldr	x0, [x0, #:lo12:.LANCHOR41]
 	sub	x0, x0, x1
 	mov	x1, -6148914691236517206
 	asr	x0, x0, 1
 	movk	x1, 0xaaab, lsl 0
 	mul	x0, x0, x1
-	adrp	x1, .LANCHOR43
-	ldr	x1, [x1, #:lo12:.LANCHOR43]
+	adrp	x1, .LANCHOR42
+	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	and	x2, x0, 65535
 	ldrh	w1, [x1, x2, lsl 1]
-	cbnz	w1, .L978
-	.loc 2 2730 0 is_stmt 0 discriminator 1
+	cbnz	w1, .L984
+	.loc 2 2781 0 is_stmt 0 discriminator 1
 	cmp	w19, w0, uxth
-	beq	.L978
-	.loc 2 2730 0 discriminator 2
-	mov	w2, 2730
-	adrp	x1, .LANCHOR160
+	beq	.L984
+	.loc 2 2781 0 discriminator 2
+	mov	w2, 2781
+	adrp	x1, .LANCHOR159
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR160
+	add	x1, x1, :lo12:.LANCHOR159
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1349:
-	b	.L978
+.LVL1351:
+	b	.L984
 	.cfi_endproc
 .LFE302:
 	.size	decrement_vpc_count, .-decrement_vpc_count
@@ -12986,7 +13094,7 @@ decrement_vpc_count:
 	.type	FtlWriteDump_data, %function
 FtlWriteDump_data:
 .LFB268:
-	.loc 2 947 0 is_stmt 1
+	.loc 2 996 0 is_stmt 1
 	.cfi_startproc
 	stp	x29, x30, [sp, -128]!
 	.cfi_def_cfa_offset 128
@@ -12997,113 +13105,113 @@ FtlWriteDump_data:
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -112
 	.cfi_offset 20, -104
-	.loc 2 948 0
+	.loc 2 997 0
 	adrp	x19, .LANCHOR51
 	add	x0, x19, :lo12:.LANCHOR51
-	.loc 2 947 0
+	.loc 2 996 0
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	.loc 2 948 0
+	.loc 2 997 0
 	ldrh	w2, [x0, 4]
-	.loc 2 947 0
+	.loc 2 996 0
 	str	x25, [sp, 64]
 	.cfi_offset 21, -96
 	.cfi_offset 22, -88
 	.cfi_offset 23, -80
 	.cfi_offset 24, -72
 	.cfi_offset 25, -64
-	.loc 2 948 0
-	cbz	w2, .L988
-	.loc 2 948 0 is_stmt 0 discriminator 1
+	.loc 2 997 0
+	cbz	w2, .L994
+	.loc 2 997 0 is_stmt 0 discriminator 1
 	ldrb	w1, [x0, 8]
-	cbnz	w1, .L988
-	.loc 2 949 0 is_stmt 1
+	cbnz	w1, .L994
+	.loc 2 998 0 is_stmt 1
 	adrp	x3, .LANCHOR19
 	ldrb	w1, [x0, 7]
 	ldrh	w3, [x3, #:lo12:.LANCHOR19]
 	mul	w1, w1, w3
 	cmp	w2, w1
-	beq	.L988
-.LVL1350:
-.LBB265:
-.LBB266:
-	.loc 2 956 0
+	beq	.L994
+.LVL1352:
+.LBB300:
+.LBB301:
+	.loc 2 1005 0
 	ldrb	w0, [x0, 10]
-	cbnz	w0, .L987
-	.loc 2 951 0
-	adrp	x0, .LANCHOR62
-	.loc 2 958 0
+	cbnz	w0, .L993
+	.loc 2 1000 0
+	adrp	x0, .LANCHOR61
+	.loc 2 1007 0
 	mov	w2, 0
 	add	x1, x29, 92
-	.loc 2 951 0
-	ldr	w21, [x0, #:lo12:.LANCHOR62]
-	.loc 2 953 0
+	.loc 2 1000 0
+	ldr	w21, [x0, #:lo12:.LANCHOR61]
+	.loc 2 1002 0
 	adrp	x0, .LANCHOR3
-	.loc 2 951 0
+	.loc 2 1000 0
 	sub	w21, w21, #1
-	.loc 2 953 0
+	.loc 2 1002 0
 	ldrh	w25, [x0, #:lo12:.LANCHOR3]
-	.loc 2 958 0
+	.loc 2 1007 0
 	mov	w0, w21
 	bl	log2phys
-.LVL1351:
-	.loc 2 964 0
-	adrp	x2, .LANCHOR109
-	.loc 2 963 0
-	adrp	x0, .LANCHOR39
-	.loc 2 961 0
+.LVL1353:
+	.loc 2 1013 0
+	adrp	x2, .LANCHOR108
+	.loc 2 1012 0
+	adrp	x0, .LANCHOR107
+	.loc 2 1010 0
 	ldr	w1, [x29, 92]
-	.loc 2 964 0
-	ldr	x20, [x2, #:lo12:.LANCHOR109]
-	.loc 2 963 0
-	ldr	x0, [x0, #:lo12:.LANCHOR39]
-	.loc 2 967 0
+	.loc 2 1013 0
+	ldr	x20, [x2, #:lo12:.LANCHOR108]
+	.loc 2 1012 0
+	ldr	x0, [x0, #:lo12:.LANCHOR107]
+	.loc 2 1016 0
 	cmn	w1, #1
-	.loc 2 961 0
+	.loc 2 1010 0
 	str	w1, [x29, 100]
-	.loc 2 964 0
+	.loc 2 1013 0
 	stp	x0, x20, [x29, 104]
-.LVL1352:
-	.loc 2 962 0
+.LVL1354:
+	.loc 2 1011 0
 	str	w21, [x29, 120]
-	.loc 2 966 0
+	.loc 2 1015 0
 	str	wzr, [x20, 4]
-	.loc 2 967 0
-	beq	.L990
-	.loc 2 969 0
+	.loc 2 1016 0
+	beq	.L996
+	.loc 2 1018 0
 	mov	w2, 0
 	mov	w1, 1
 	add	x0, x29, 96
 	bl	FlashReadPages
-.LVL1353:
-.L991:
-	.loc 2 987 0
-	adrp	x23, .LANCHOR72
-	.loc 2 953 0
+.LVL1355:
+.L997:
+	.loc 2 1036 0
+	adrp	x23, .LANCHOR71
+	.loc 2 1002 0
 	lsl	w25, w25, 2
-.LVL1354:
-	.loc 2 978 0
+.LVL1356:
+	.loc 2 1027 0
 	add	x22, x19, :lo12:.LANCHOR51
-	.loc 2 987 0
-	add	x23, x23, :lo12:.LANCHOR72
-	.loc 2 975 0
+	.loc 2 1036 0
+	add	x23, x23, :lo12:.LANCHOR71
+	.loc 2 1024 0
 	mov	w0, -3947
 	mov	w24, 0
 	strh	w0, [x20]
-.L992:
-	.loc 2 976 0
+.L998:
+	.loc 2 1025 0
 	cmp	w25, w24
-	bne	.L996
-.L993:
-	.loc 2 992 0
+	bne	.L1002
+.L999:
+	.loc 2 1041 0
 	add	x19, x19, :lo12:.LANCHOR51
 	mov	w0, 1
 	strb	w0, [x19, 10]
-.LVL1355:
-.L987:
-.LBE266:
-.LBE265:
-	.loc 2 1000 0
+.LVL1357:
+.L993:
+.LBE301:
+.LBE300:
+	.loc 2 1049 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -13121,69 +13229,69 @@ FtlWriteDump_data:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1356:
-.L990:
+.LVL1358:
+.L996:
 	.cfi_restore_state
-.LBB268:
-.LBB267:
-	.loc 2 973 0
+.LBB303:
+.LBB302:
+	.loc 2 1022 0
 	adrp	x1, .LANCHOR23
 	ldrh	w2, [x1, #:lo12:.LANCHOR23]
 	mov	w1, 255
 	bl	ftl_memset
-.LVL1357:
-	b	.L991
-.LVL1358:
-.L996:
-	.loc 2 978 0
+.LVL1359:
+	b	.L997
+.LVL1360:
+.L1002:
+	.loc 2 1027 0
 	ldrh	w0, [x22, 4]
-	cbz	w0, .L993
-	.loc 2 983 0
+	cbz	w0, .L999
+	.loc 2 1032 0
 	ldr	w0, [x29, 100]
 	add	w24, w24, 1
 	stp	w21, w0, [x20, 8]
-	.loc 2 984 0
+	.loc 2 1033 0
 	ldrh	w0, [x22]
 	strh	w0, [x20, 2]
-	.loc 2 986 0
+	.loc 2 1035 0
 	mov	x0, x22
 	bl	get_new_active_ppa
-.LVL1359:
+.LVL1361:
 	str	w0, [x29, 100]
-	.loc 2 987 0
+	.loc 2 1036 0
 	ldr	w0, [x23]
-	.loc 2 988 0
+	.loc 2 1037 0
 	mov	w3, 0
-	.loc 2 987 0
+	.loc 2 1036 0
 	str	w0, [x20, 4]
-	.loc 2 988 0
+	.loc 2 1037 0
 	mov	w2, 0
-	.loc 2 987 0
+	.loc 2 1036 0
 	add	w0, w0, 1
-	.loc 2 988 0
+	.loc 2 1037 0
 	mov	w1, 1
-	.loc 2 987 0
+	.loc 2 1036 0
 	cmn	w0, #1
 	csel	w0, w0, wzr, ne
 	str	w0, [x23]
-	.loc 2 988 0
+	.loc 2 1037 0
 	add	x0, x29, 96
 	bl	FlashProgPages
-.LVL1360:
-	.loc 2 990 0
+.LVL1362:
+	.loc 2 1039 0
 	ldrh	w0, [x22]
 	bl	decrement_vpc_count
-.LVL1361:
-	b	.L992
-.LVL1362:
-.L988:
-.LBE267:
-.LBE268:
-	.loc 2 998 0
+.LVL1363:
+	b	.L998
+.LVL1364:
+.L994:
+.LBE302:
+.LBE303:
+	.loc 2 1047 0
 	add	x19, x19, :lo12:.LANCHOR51
 	strb	wzr, [x19, 10]
-	.loc 2 1000 0
-	b	.L987
+	.loc 2 1049 0
+	b	.L993
 	.cfi_endproc
 .LFE268:
 	.size	FtlWriteDump_data, .-FtlWriteDump_data
@@ -13193,7 +13301,7 @@ FtlWriteDump_data:
 	.type	l2p_flush, %function
 l2p_flush:
 .LFB261:
-	.loc 2 740 0
+	.loc 2 789 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -48]!
 	.cfi_def_cfa_offset 48
@@ -13204,29 +13312,29 @@ l2p_flush:
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -32
 	.cfi_offset 20, -24
-	.loc 2 746 0
+	.loc 2 795 0
 	adrp	x20, .LANCHOR33
 	add	x20, x20, :lo12:.LANCHOR33
-	.loc 2 740 0
+	.loc 2 789 0
 	str	x21, [sp, 32]
 	.cfi_offset 21, -16
-	.loc 2 746 0
+	.loc 2 795 0
 	mov	w19, 0
-	.loc 2 747 0
-	adrp	x21, .LANCHOR56
-	.loc 2 744 0
+	.loc 2 796 0
+	adrp	x21, .LANCHOR55
+	.loc 2 793 0
 	bl	FtlWriteDump_data
-.LVL1363:
-.L1006:
-	.loc 2 746 0 discriminator 1
+.LVL1365:
+.L1012:
+	.loc 2 795 0 discriminator 1
 	ldrh	w0, [x20]
 	cmp	w0, w19
-	bhi	.L1008
-	.loc 2 750 0
+	bhi	.L1014
+	.loc 2 799 0
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
-.LVL1364:
+.LVL1366:
 	ldp	x29, x30, [sp], 48
 	.cfi_remember_state
 	.cfi_restore 30
@@ -13236,26 +13344,26 @@ l2p_flush:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1365:
-.L1008:
+.LVL1367:
+.L1014:
 	.cfi_restore_state
-	.loc 2 747 0
-	ldr	x1, [x21, #:lo12:.LANCHOR56]
+	.loc 2 796 0
+	ldr	x1, [x21, #:lo12:.LANCHOR55]
 	ubfiz	x0, x19, 4, 16
 	add	x0, x1, x0
 	ldr	w0, [x0, 4]
-	tbz	w0, #31, .L1007
-	.loc 2 748 0
+	tbz	w0, #31, .L1013
+	.loc 2 797 0
 	mov	w0, w19
 	bl	flush_l2p_region
-.LVL1366:
-.L1007:
-	.loc 2 746 0 discriminator 2
+.LVL1368:
+.L1013:
+	.loc 2 795 0 discriminator 2
 	add	w19, w19, 1
-.LVL1367:
+.LVL1369:
 	and	w19, w19, 65535
-.LVL1368:
-	b	.L1006
+.LVL1370:
+	b	.L1012
 	.cfi_endproc
 .LFE261:
 	.size	l2p_flush, .-l2p_flush
@@ -13265,16 +13373,16 @@ l2p_flush:
 	.type	FtlRecoverySuperblock, %function
 FtlRecoverySuperblock:
 .LFB281:
-	.loc 2 1656 0
+	.loc 2 1705 0
 	.cfi_startproc
-.LVL1369:
+.LVL1371:
 	stp	x29, x30, [sp, -192]!
 	.cfi_def_cfa_offset 192
 	.cfi_offset 29, -192
 	.cfi_offset 30, -184
-	.loc 2 1670 0
+	.loc 2 1719 0
 	mov	w1, 65535
-	.loc 2 1656 0
+	.loc 2 1705 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
@@ -13282,15 +13390,15 @@ FtlRecoverySuperblock:
 	.cfi_offset 20, -168
 	mov	x19, x0
 	stp	x21, x22, [sp, 32]
-	.loc 2 1670 0
+	.loc 2 1719 0
 	ldrh	w0, [x0]
-.LVL1370:
-	.loc 2 1656 0
+.LVL1372:
+	.loc 2 1705 0
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	.loc 2 1670 0
+	.loc 2 1719 0
 	cmp	w0, w1
-	.loc 2 1656 0
+	.loc 2 1705 0
 	stp	x27, x28, [sp, 80]
 	.cfi_offset 21, -160
 	.cfi_offset 22, -152
@@ -13300,32 +13408,32 @@ FtlRecoverySuperblock:
 	.cfi_offset 26, -120
 	.cfi_offset 27, -112
 	.cfi_offset 28, -104
-	.loc 2 1670 0
-	beq	.L1134
-	.loc 2 1676 0
+	.loc 2 1719 0
+	beq	.L1140
+	.loc 2 1725 0
 	ldrb	w0, [x19, 6]
 	str	w0, [x29, 164]
-	.loc 2 1681 0
+	.loc 2 1730 0
 	adrp	x0, .LANCHOR19
-	.loc 2 1675 0
+	.loc 2 1724 0
 	ldrh	w26, [x19, 2]
-.LVL1371:
+.LVL1373:
 	str	x0, [x29, 128]
-	.loc 2 1681 0
+	.loc 2 1730 0
 	ldrh	w2, [x0, #:lo12:.LANCHOR19]
 	cmp	w2, w26
-	bne	.L1013
-	.loc 2 1682 0
+	bne	.L1019
+	.loc 2 1731 0
 	strh	wzr, [x19, 4]
-.LVL1372:
-.L1140:
-	.loc 2 1709 0
+.LVL1374:
+.L1146:
+	.loc 2 1758 0
 	strb	wzr, [x19, 6]
-.LVL1373:
-.L1134:
-	.loc 2 2010 0
+.LVL1375:
+.L1140:
+	.loc 2 2059 0
 	ldp	x19, x20, [sp, 16]
-.LVL1374:
+.LVL1376:
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -13347,54 +13455,54 @@ FtlRecoverySuperblock:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1375:
-.L1013:
+.LVL1377:
+.L1019:
 	.cfi_restore_state
-	.loc 2 1689 0
+	.loc 2 1738 0
 	ldrh	w0, [x19, 16]
-.LVL1376:
-	.loc 2 1688 0
+.LVL1378:
+	.loc 2 1737 0
 	mov	w20, 0
-.LVL1377:
-.L1014:
-	.loc 2 1690 0
+.LVL1379:
+.L1020:
+	.loc 2 1739 0
 	cmp	w0, w1
-	beq	.L1015
-	.loc 2 1697 0
+	beq	.L1021
+	.loc 2 1746 0
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
-.LVL1378:
+.LVL1380:
 	mov	w23, w0
-.LVL1379:
-	.loc 2 1705 0
+.LVL1381:
+	.loc 2 1754 0
 	cmn	w0, #1
-	beq	.L1016
-	.loc 2 1721 0
-	adrp	x1, .LANCHOR93
-	.loc 2 1717 0
+	beq	.L1022
+	.loc 2 1770 0
+	adrp	x1, .LANCHOR91
+	.loc 2 1766 0
 	adrp	x2, .LANCHOR3
-	.loc 2 1720 0
+	.loc 2 1769 0
 	adrp	x20, .LANCHOR120
-.LVL1380:
-	.loc 2 1722 0
+.LVL1382:
+	.loc 2 1771 0
 	add	x4, x19, 16
-	.loc 2 1721 0
-	ldr	x5, [x1, #:lo12:.LANCHOR93]
+	.loc 2 1770 0
+	ldr	x5, [x1, #:lo12:.LANCHOR91]
 	adrp	x1, .LANCHOR23
-	.loc 2 1720 0
+	.loc 2 1769 0
 	ldr	x0, [x20, #:lo12:.LANCHOR120]
-.LVL1381:
-	.loc 2 1722 0
+.LVL1383:
+	.loc 2 1771 0
 	mov	w22, 0
-	.loc 2 1721 0
+	.loc 2 1770 0
 	ldrh	w6, [x1, #:lo12:.LANCHOR23]
-	.loc 2 1722 0
-	adrp	x1, .LANCHOR94
-	.loc 2 1719 0
+	.loc 2 1771 0
+	adrp	x1, .LANCHOR92
+	.loc 2 1768 0
 	mov	w10, 65535
 	str	x2, [x29, 152]
-	.loc 2 1722 0
-	ldr	x7, [x1, #:lo12:.LANCHOR94]
+	.loc 2 1771 0
+	ldr	x7, [x1, #:lo12:.LANCHOR92]
 	adrp	x1, .LANCHOR24
 	ldrh	w8, [x1, #:lo12:.LANCHOR24]
 	add	x1, x19, 16
@@ -13402,910 +13510,910 @@ FtlRecoverySuperblock:
 	ldrh	w1, [x2, #:lo12:.LANCHOR3]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.L1017:
-.LVL1382:
-	.loc 2 1717 0 discriminator 1
+.L1023:
+.LVL1384:
+	.loc 2 1766 0 discriminator 1
 	cmp	x4, x1
-	bne	.L1021
-	.loc 2 1727 0
+	bne	.L1027
+	.loc 2 1776 0
 	mov	w2, 0
 	mov	w1, w22
 	bl	FlashReadPages
-.LVL1383:
-	.loc 2 1728 0
-	adrp	x0, .LANCHOR72
-	.loc 2 1730 0
+.LVL1385:
+	.loc 2 1777 0
+	adrp	x0, .LANCHOR71
+	.loc 2 1779 0
 	ldr	x4, [x20, #:lo12:.LANCHOR120]
-	.loc 2 1742 0
+	.loc 2 1791 0
 	and	w10, w23, 65535
-	.loc 2 1733 0
-	add	x7, x0, :lo12:.LANCHOR72
-	.loc 2 1728 0
-	ldr	w21, [x0, #:lo12:.LANCHOR72]
+	.loc 2 1782 0
+	add	x7, x0, :lo12:.LANCHOR71
+	.loc 2 1777 0
+	ldr	w21, [x0, #:lo12:.LANCHOR71]
 	mov	x11, x4
-	.loc 2 1666 0
+	.loc 2 1715 0
 	mov	w6, 65535
-	.loc 2 1729 0
+	.loc 2 1778 0
 	mov	w3, 0
-	.loc 2 1728 0
+	.loc 2 1777 0
 	sub	w21, w21, #1
-.LVL1384:
+.LVL1386:
 	str	x0, [x29, 144]
-.LVL1385:
-.L1022:
-	.loc 2 1729 0 discriminator 1
+.LVL1387:
+.L1028:
+	.loc 2 1778 0 discriminator 1
 	cmp	w22, w3
-	bne	.L1027
-	.loc 2 1747 0
+	bne	.L1033
+	.loc 2 1796 0
 	add	w22, w23, 1
-.LVL1386:
-	.loc 2 1749 0
+.LVL1388:
+	.loc 2 1798 0
 	ldr	w0, [x4, 4]
-	.loc 2 1747 0
+	.loc 2 1796 0
 	and	w22, w22, 65535
-.LVL1387:
-.L1136:
-	.loc 2 1753 0
+.LVL1389:
+.L1142:
+	.loc 2 1802 0
 	lsr	w0, w0, 10
 	bl	P2V_plane
-.LVL1388:
+.LVL1390:
 	and	w27, w0, 65535
-.LVL1389:
-	.loc 2 1758 0
+.LVL1391:
+	.loc 2 1807 0
 	ldr	x0, [x29, 128]
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	cmp	w0, w22
-	bne	.L1029
-	.loc 2 1759 0
+	bne	.L1035
+	.loc 2 1808 0
 	strh	w22, [x19, 2]
-	.loc 2 1760 0
+	.loc 2 1809 0
 	strb	wzr, [x19, 6]
-	.loc 2 1761 0
+	.loc 2 1810 0
 	strh	wzr, [x19, 4]
-.L1029:
-	.loc 2 1764 0
+.L1035:
+	.loc 2 1813 0
 	ldr	w0, [x29, 164]
 	cmp	w22, w26
 	cset	w1, eq
 	cmp	w27, w0
 	cset	w0, eq
 	tst	w1, w0
-	beq	.L1030
-.LVL1390:
-.L1141:
-	.loc 2 2004 0
+	beq	.L1036
+.LVL1392:
+.L1147:
+	.loc 2 2053 0
 	mov	w2, w27
 	mov	w1, w22
 	mov	x0, x19
 	bl	ftl_sb_update_avl_pages
-.LVL1391:
-	b	.L1134
-.LVL1392:
-.L1015:
-	.loc 2 1691 0
-	add	w20, w20, 1
 .LVL1393:
-	and	w20, w20, 65535
+	b	.L1140
 .LVL1394:
-	.loc 2 1692 0
-	add	x0, x19, x20, sxtw 1
+.L1021:
+	.loc 2 1740 0
+	add	w20, w20, 1
 .LVL1395:
-	ldrh	w0, [x0, 16]
+	and	w20, w20, 65535
 .LVL1396:
-	b	.L1014
+	.loc 2 1741 0
+	add	x0, x19, x20, sxtw 1
 .LVL1397:
-.L1016:
-	.loc 2 1706 0
-	cbz	w26, .L1018
-	.loc 2 1706 0 is_stmt 0 discriminator 1
-	adrp	x1, .LANCHOR161
-	adrp	x0, .LC1
+	ldrh	w0, [x0, 16]
 .LVL1398:
-	mov	w2, 1706
-	add	x1, x1, :lo12:.LANCHOR161
+	b	.L1020
+.LVL1399:
+.L1022:
+	.loc 2 1755 0
+	cbz	w26, .L1024
+	.loc 2 1755 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR160
+	adrp	x0, .LC1
+.LVL1400:
+	mov	w2, 1755
+	add	x1, x1, :lo12:.LANCHOR160
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1399:
-.L1018:
-	.loc 2 1707 0 is_stmt 1
+.LVL1401:
+.L1024:
+	.loc 2 1756 0 is_stmt 1
 	ldr	w0, [x29, 164]
 	cmp	w0, 0
 	ccmp	w20, w0, 4, ne
-	beq	.L1019
-	.loc 2 1707 0 is_stmt 0 discriminator 1
-	adrp	x1, .LANCHOR161
+	beq	.L1025
+	.loc 2 1756 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR160
 	adrp	x0, .LC1
-	mov	w2, 1707
-	add	x1, x1, :lo12:.LANCHOR161
+	mov	w2, 1756
+	add	x1, x1, :lo12:.LANCHOR160
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1400:
-.L1019:
-	.loc 2 1708 0 is_stmt 1
+.LVL1402:
+.L1025:
+	.loc 2 1757 0 is_stmt 1
 	strh	wzr, [x19, 2]
-	b	.L1140
-.LVL1401:
-.L1021:
-	.loc 2 1718 0
+	b	.L1146
+.LVL1403:
+.L1027:
+	.loc 2 1767 0
 	ldrh	w3, [x4]
-.LVL1402:
-	.loc 2 1719 0
+.LVL1404:
+	.loc 2 1768 0
 	cmp	w3, w10
-	beq	.L1020
-	.loc 2 1720 0
+	beq	.L1026
+	.loc 2 1769 0
 	ubfiz	x2, x22, 5, 16
 	orr	w3, w23, w3, lsl 10
-.LVL1403:
+.LVL1405:
 	add	x2, x0, x2
 	str	w3, [x2, 4]
-	.loc 2 1721 0
+	.loc 2 1770 0
 	mul	w3, w22, w6
 	asr	w3, w3, 2
 	add	x3, x5, x3, sxtw 2
 	str	x3, [x2, 8]
-	.loc 2 1722 0
+	.loc 2 1771 0
 	mul	w3, w22, w8
-	.loc 2 1723 0
+	.loc 2 1772 0
 	add	w22, w22, 1
-.LVL1404:
+.LVL1406:
 	and	w22, w22, 65535
-.LVL1405:
-	.loc 2 1722 0
+.LVL1407:
+	.loc 2 1771 0
 	asr	w3, w3, 2
 	add	x3, x7, x3, sxtw 2
 	str	x3, [x2, 16]
-.L1020:
+.L1026:
 	add	x4, x4, 2
-.LVL1406:
-	b	.L1017
-.LVL1407:
-.L1027:
-	.loc 2 1730 0
+.LVL1408:
+	b	.L1023
+.LVL1409:
+.L1033:
+	.loc 2 1779 0
 	ldr	w0, [x11]
-	cbnz	w0, .L1023
-	.loc 2 1731 0
+	cbnz	w0, .L1029
+	.loc 2 1780 0
 	ldr	x8, [x11, 16]
-.LVL1408:
-	.loc 2 1732 0
+.LVL1410:
+	.loc 2 1781 0
 	ldr	w5, [x8, 4]
 	cmn	w5, #1
-	beq	.L1024
-	.loc 2 1733 0
+	beq	.L1030
+	.loc 2 1782 0
 	ldr	w1, [x7]
 	mov	w0, w5
 	bl	ftl_cmp_data_ver
-.LVL1409:
-	cbz	w0, .L1024
-	.loc 2 1735 0
+.LVL1411:
+	cbz	w0, .L1030
+	.loc 2 1784 0
 	add	w5, w5, 1
 	str	w5, [x7]
-.L1024:
-	.loc 2 1738 0
+.L1030:
+	.loc 2 1787 0
 	ldr	w0, [x8]
 	cmn	w0, #1
-	bne	.L1026
-	.loc 2 1753 0
+	bne	.L1032
+	.loc 2 1802 0
 	ubfiz	x3, x3, 5, 16
-.LVL1410:
-	.loc 2 1752 0
+.LVL1412:
+	.loc 2 1801 0
 	and	w22, w23, 65535
-.LVL1411:
-	.loc 2 1753 0
+.LVL1413:
+	.loc 2 1802 0
 	add	x3, x4, x3
 	ldr	w0, [x3, 4]
-	b	.L1136
-.LVL1412:
-.L1023:
-	.loc 2 1742 0
+	b	.L1142
+.LVL1414:
+.L1029:
+	.loc 2 1791 0
 	mov	w6, w10
-.LVL1413:
-.L1026:
-	.loc 2 1729 0 discriminator 2
+.LVL1415:
+.L1032:
+	.loc 2 1778 0 discriminator 2
 	add	w3, w3, 1
-.LVL1414:
+.LVL1416:
 	add	x11, x11, 32
 	and	w3, w3, 65535
-.LVL1415:
-	b	.L1022
-.LVL1416:
-.L1030:
-	.loc 2 1770 0
+.LVL1417:
+	b	.L1028
+.LVL1418:
+.L1036:
+	.loc 2 1819 0
 	mov	w0, 65535
 	cmp	w6, w0
-	bne	.L1031
-	.loc 2 1770 0 is_stmt 0 discriminator 1
+	bne	.L1037
+	.loc 2 1819 0 is_stmt 0 discriminator 1
 	ldrb	w0, [x19, 8]
-	cbnz	w0, .L1032
-.L1031:
-.LVL1417:
-.LBB269:
-	.loc 2 1775 0 is_stmt 1
-	adrp	x25, .LANCHOR154
-	.loc 2 1774 0
+	cbnz	w0, .L1038
+.L1037:
+.LVL1419:
+.LBB304:
+	.loc 2 1824 0 is_stmt 1
+	adrp	x25, .LANCHOR153
+	.loc 2 1823 0
 	and	w28, w23, 65535
-.LVL1418:
-	.loc 2 1775 0
-	ldr	w0, [x25, #:lo12:.LANCHOR154]
+.LVL1420:
+	.loc 2 1824 0
+	ldr	w0, [x25, #:lo12:.LANCHOR153]
 	cmn	w0, #1
-	bne	.L1033
-	.loc 2 1776 0
-	str	w21, [x25, #:lo12:.LANCHOR154]
-.L1033:
-.LVL1419:
-	.loc 2 1778 0
+	bne	.L1039
+	.loc 2 1825 0
+	str	w21, [x25, #:lo12:.LANCHOR153]
+.L1039:
+.LVL1421:
+	.loc 2 1827 0
 	add	w0, w26, 7
 	cmp	w0, w23, uxth
-	bge	.L1083
-	.loc 2 1779 0
+	bge	.L1089
+	.loc 2 1828 0
 	sub	w24, w28, #7
 	and	w24, w24, 65535
-.LVL1420:
-.L1034:
-	.loc 2 1782 0 discriminator 1
+.LVL1422:
+.L1040:
+	.loc 2 1831 0 discriminator 1
 	ldr	x0, [x29, 152]
-	.loc 2 1784 0 discriminator 1
+	.loc 2 1833 0 discriminator 1
 	mov	w3, 65535
 	mov	w5, 1
-	.loc 2 1782 0 discriminator 1
+	.loc 2 1831 0 discriminator 1
 	add	x4, x0, :lo12:.LANCHOR3
-.LVL1421:
-.L1035:
-	.loc 2 1780 0 discriminator 1
+.LVL1423:
+.L1041:
+	.loc 2 1829 0 discriminator 1
 	cmp	w24, w28
-	bhi	.L1045
+	bhi	.L1051
 	ldrh	w1, [x4]
-	.loc 2 1785 0
+	.loc 2 1834 0
 	mov	w23, 0
 	ldr	x0, [x20, #:lo12:.LANCHOR120]
 	add	x1, x1, 8
 	ldr	x2, [x29, 168]
 	add	x1, x19, x1, lsl 1
-	b	.L1046
-.LVL1422:
-.L1083:
+	b	.L1052
+.LVL1424:
+.L1089:
 	mov	w24, w26
-	b	.L1034
-.LVL1423:
-.L1037:
-	.loc 2 1783 0
+	b	.L1040
+.LVL1425:
+.L1043:
+	.loc 2 1832 0
 	ldrh	w6, [x2]
-.LVL1424:
-	.loc 2 1784 0
+.LVL1426:
+	.loc 2 1833 0
 	cmp	w6, w3
-	beq	.L1036
-	.loc 2 1785 0
+	beq	.L1042
+	.loc 2 1834 0
 	ubfiz	x7, x23, 5, 16
-	.loc 2 1786 0
+	.loc 2 1835 0
 	add	w23, w23, 1
-.LVL1425:
-	.loc 2 1785 0
+.LVL1427:
+	.loc 2 1834 0
 	add	x7, x0, x7
-	.loc 2 1786 0
+	.loc 2 1835 0
 	and	w23, w23, 65535
-.LVL1426:
-	.loc 2 1785 0
+.LVL1428:
+	.loc 2 1834 0
 	orr	w6, w24, w6, lsl 10
-.LVL1427:
+.LVL1429:
 	str	w6, [x7, 4]
-.L1036:
+.L1042:
 	add	x2, x2, 2
-.LVL1428:
-.L1046:
-	.loc 2 1782 0 discriminator 1
+.LVL1430:
+.L1052:
+	.loc 2 1831 0 discriminator 1
 	cmp	x2, x1
-	bne	.L1037
-	.loc 2 1789 0
+	bne	.L1043
+	.loc 2 1838 0
 	mov	w1, w23
 	mov	w2, 0
 	str	w5, [x29, 112]
 	ubfiz	x23, x23, 5, 16
-.LVL1429:
+.LVL1431:
 	str	w3, [x29, 120]
 	add	x23, x23, 16
 	str	x4, [x29, 136]
 	bl	FlashReadPages
-.LVL1430:
-	.loc 2 1791 0
+.LVL1432:
+	.loc 2 1840 0
 	ldr	x2, [x20, #:lo12:.LANCHOR120]
-	ldr	w1, [x25, #:lo12:.LANCHOR154]
-	.loc 2 1790 0
+	ldr	w1, [x25, #:lo12:.LANCHOR153]
+	.loc 2 1839 0
 	ldr	w5, [x29, 112]
 	add	x0, x2, 16
 	ldr	w3, [x29, 120]
 	add	x23, x2, x23
 	ldr	x4, [x29, 136]
 	mov	w2, 0
-.LVL1431:
-.L1038:
-	.loc 2 1790 0 is_stmt 0 discriminator 1
-	cmp	x23, x0
-	bne	.L1043
-	cbz	w2, .L1044
-	str	w1, [x25, #:lo12:.LANCHOR154]
+.LVL1433:
 .L1044:
-	.loc 2 1780 0 is_stmt 1
+	.loc 2 1839 0 is_stmt 0 discriminator 1
+	cmp	x23, x0
+	bne	.L1049
+	cbz	w2, .L1050
+	str	w1, [x25, #:lo12:.LANCHOR153]
+.L1050:
+	.loc 2 1829 0 is_stmt 1
 	add	w24, w24, 1
-.LVL1432:
+.LVL1434:
 	and	w24, w24, 65535
-.LVL1433:
-	b	.L1035
-.L1043:
-	.loc 2 1791 0
+.LVL1435:
+	b	.L1041
+.L1049:
+	.loc 2 1840 0
 	ldr	w6, [x0, -16]
-	cbz	w6, .L1039
-	cbz	w2, .L1032
-	str	w1, [x25, #:lo12:.LANCHOR154]
-.LVL1434:
-.L1032:
-.LBE269:
-	.loc 2 1814 0
+	cbz	w6, .L1045
+	cbz	w2, .L1038
+	str	w1, [x25, #:lo12:.LANCHOR153]
+.LVL1436:
+.L1038:
+.LBE304:
+	.loc 2 1863 0
 	mov	w1, 1
-	adrp	x0, .LANCHOR162
-	.loc 2 1815 0
+	adrp	x0, .LANCHOR161
+	.loc 2 1864 0
 	mov	w23, w26
-	.loc 2 1975 0
-	adrp	x28, .LANCHOR154
-	.loc 2 1814 0
-	strh	w1, [x0, #:lo12:.LANCHOR162]
-	.loc 2 1815 0
+	.loc 2 2024 0
+	adrp	x28, .LANCHOR153
+	.loc 2 1863 0
+	strh	w1, [x0, #:lo12:.LANCHOR161]
+	.loc 2 1864 0
 	adrp	x0, .LANCHOR144
 	add	x0, x0, :lo12:.LANCHOR144
 	bl	FtlMapBlkWriteDump_data
-.LVL1435:
-.LBB270:
-	.loc 2 1897 0
-	add	x0, x28, :lo12:.LANCHOR154
+.LVL1437:
+.LBB305:
+	.loc 2 1946 0
+	add	x0, x28, :lo12:.LANCHOR153
 	str	x0, [x29, 104]
-.LVL1436:
-.L1047:
+.LVL1438:
+.L1053:
 	ldr	x1, [x29, 152]
-.LBE270:
-	.loc 2 1820 0
+.LBE305:
+	.loc 2 1869 0
 	mov	w24, 0
-	.loc 2 1824 0
+	.loc 2 1873 0
 	ldr	x0, [x20, #:lo12:.LANCHOR120]
-	.loc 2 1823 0
+	.loc 2 1872 0
 	mov	w5, 65535
-	.loc 2 1821 0
+	.loc 2 1870 0
 	ldr	x2, [x29, 168]
 	ldrh	w1, [x1, #:lo12:.LANCHOR3]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.LVL1437:
-.L1048:
-	.loc 2 1821 0 is_stmt 0 discriminator 1
+.LVL1439:
+.L1054:
+	.loc 2 1870 0 is_stmt 0 discriminator 1
 	cmp	x1, x2
-	bne	.L1050
-	.loc 2 1828 0 is_stmt 1
+	bne	.L1056
+	.loc 2 1877 0 is_stmt 1
 	mov	w2, 0
 	mov	w1, w24
 	bl	FlashReadPages
-.LVL1438:
-	.loc 2 1829 0
+.LVL1440:
+	.loc 2 1878 0
 	mov	x25, 0
 	ubfiz	x0, x24, 5, 16
 	str	x0, [x29, 112]
-	.loc 2 1969 0
-	adrp	x0, .LANCHOR163
-	add	x0, x0, :lo12:.LANCHOR163
+	.loc 2 2018 0
+	adrp	x0, .LANCHOR162
+	add	x0, x0, :lo12:.LANCHOR162
 	str	x0, [x29, 120]
-.LVL1439:
-.L1051:
-	.loc 2 1829 0 discriminator 1
+.LVL1441:
+.L1057:
+	.loc 2 1878 0 discriminator 1
 	ldr	x0, [x29, 112]
 	cmp	x25, x0
-	bne	.L1077
-	.loc 2 1983 0
+	bne	.L1083
+	.loc 2 2032 0
 	ldr	x0, [x29, 128]
-	.loc 2 1982 0
+	.loc 2 2031 0
 	add	w23, w23, 1
-.LVL1440:
+.LVL1442:
 	and	w23, w23, 65535
-.LVL1441:
-	.loc 2 1983 0
+.LVL1443:
+	.loc 2 2032 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	cmp	w0, w23
-	bne	.L1047
-	.loc 2 1986 0
+	bne	.L1053
+	.loc 2 2035 0
 	ldr	x0, [x29, 152]
-	.loc 2 1988 0
+	.loc 2 2037 0
 	mov	w2, 65535
-	.loc 2 1984 0
+	.loc 2 2033 0
 	strh	w23, [x19, 2]
-	.loc 2 1985 0
+	.loc 2 2034 0
 	strh	wzr, [x19, 4]
-.LVL1442:
-	.loc 2 1986 0
+.LVL1444:
+	.loc 2 2035 0
 	ldrh	w1, [x0, #:lo12:.LANCHOR3]
 	mov	w0, 0
-.LVL1443:
-.L1078:
-	.loc 2 1986 0 is_stmt 0 discriminator 1
+.LVL1445:
+.L1084:
+	.loc 2 2035 0 is_stmt 0 discriminator 1
 	cmp	w0, w1
-	beq	.L1134
-.LVL1444:
-	.loc 2 1988 0 is_stmt 1
+	beq	.L1140
+.LVL1446:
+	.loc 2 2037 0 is_stmt 1
 	ldr	x4, [x29, 168]
 	ldrh	w3, [x4], 2
 	str	x4, [x29, 168]
-.LVL1445:
+.LVL1447:
 	cmp	w3, w2
-	beq	.L1079
-	.loc 2 1989 0
+	beq	.L1085
+	.loc 2 2038 0
 	strb	w0, [x19, 6]
-.LVL1446:
-	.loc 2 1990 0
-	b	.L1134
-.LVL1447:
-.L1039:
-.LBB271:
-	.loc 2 1792 0
-	ldr	x6, [x0]
 .LVL1448:
-	.loc 2 1793 0
+	.loc 2 2039 0
+	b	.L1140
+.LVL1449:
+.L1045:
+.LBB306:
+	.loc 2 1841 0
+	ldr	x6, [x0]
+.LVL1450:
+	.loc 2 1842 0
 	ldrh	w7, [x6]
 	cmp	w7, w3
-	beq	.L1042
-	.loc 2 1795 0
+	beq	.L1048
+	.loc 2 1844 0
 	ldr	w6, [x6, 4]
-.LVL1449:
+.LVL1451:
 	cmn	w6, #1
 	csel	w1, w1, w6, eq
 	csel	w2, w2, w5, eq
-.L1042:
+.L1048:
 	add	x0, x0, 32
-.LVL1450:
-	b	.L1038
-.LVL1451:
-.L1045:
-	.loc 2 1809 0
-	mov	w0, -1
-	str	w0, [x25, #:lo12:.LANCHOR154]
-	b	.L1032
 .LVL1452:
-.L1050:
-.LBE271:
-	.loc 2 1822 0
-	ldrh	w3, [x2]
+	b	.L1044
 .LVL1453:
-	.loc 2 1823 0
+.L1051:
+	.loc 2 1858 0
+	mov	w0, -1
+	str	w0, [x25, #:lo12:.LANCHOR153]
+	b	.L1038
+.LVL1454:
+.L1056:
+.LBE306:
+	.loc 2 1871 0
+	ldrh	w3, [x2]
+.LVL1455:
+	.loc 2 1872 0
 	cmp	w3, w5
-	beq	.L1049
-	.loc 2 1824 0
+	beq	.L1055
+	.loc 2 1873 0
 	ubfiz	x4, x24, 5, 16
-	.loc 2 1825 0
+	.loc 2 1874 0
 	add	w24, w24, 1
-.LVL1454:
-	.loc 2 1824 0
+.LVL1456:
+	.loc 2 1873 0
 	add	x4, x0, x4
-	.loc 2 1825 0
+	.loc 2 1874 0
 	and	w24, w24, 65535
-.LVL1455:
-	.loc 2 1824 0
+.LVL1457:
+	.loc 2 1873 0
 	orr	w3, w23, w3, lsl 10
-.LVL1456:
+.LVL1458:
 	str	w3, [x4, 4]
-.L1049:
+.L1055:
 	add	x2, x2, 2
-.LVL1457:
-	b	.L1048
-.LVL1458:
-.L1077:
-	.loc 2 1830 0
+.LVL1459:
+	b	.L1054
+.LVL1460:
+.L1083:
+	.loc 2 1879 0
 	ldr	x4, [x20, #:lo12:.LANCHOR120]
 	add	x4, x4, x25
 	ldr	w5, [x4, 4]
 	str	w5, [x29, 188]
-	.loc 2 1831 0
+	.loc 2 1880 0
 	lsr	w0, w5, 10
 	bl	P2V_plane
-.LVL1459:
+.LVL1461:
 	and	w0, w0, 65535
-.LVL1460:
-	.loc 2 1833 0
+.LVL1462:
+	.loc 2 1882 0
 	cmp	w23, w26
-	bcc	.L1052
-	.loc 2 1833 0 is_stmt 0 discriminator 1
+	bcc	.L1058
+	.loc 2 1882 0 is_stmt 0 discriminator 1
 	ldr	w1, [x29, 164]
 	ccmp	w1, w0, 0, eq
-	bhi	.L1052
-	.loc 2 1837 0 is_stmt 1
+	bhi	.L1058
+	.loc 2 1886 0 is_stmt 1
 	cmp	w23, w22
 	ccmp	w27, w0, 0, eq
-	beq	.L1053
-.LVL1461:
-	.loc 2 1841 0
+	beq	.L1059
+.LVL1463:
+	.loc 2 1890 0
 	ldr	w0, [x4]
-.LVL1462:
+.LVL1464:
 	cmn	w0, #1
-	beq	.L1054
-	.loc 2 1842 0
+	beq	.L1060
+	.loc 2 1891 0
 	ldr	x3, [x4, 16]
-.LVL1463:
-	.loc 2 1843 0
+.LVL1465:
+	.loc 2 1892 0
 	mov	w0, 61589
 	ldrh	w1, [x3]
 	cmp	w1, w0
-	beq	.L1055
-.LVL1464:
-.L1061:
-.LBB272:
-	.loc 2 1876 0
+	beq	.L1061
+.LVL1466:
+.L1067:
+.LBB307:
+	.loc 2 1925 0
 	ldrh	w0, [x19]
-.LVL1465:
-.L1139:
-.LBE272:
-	.loc 2 1960 0
+.LVL1467:
+.L1145:
+.LBE307:
+	.loc 2 2009 0
 	bl	decrement_vpc_count
-.LVL1466:
-.L1052:
+.LVL1468:
+.L1058:
 	add	x25, x25, 32
-	b	.L1051
-.LVL1467:
-.L1055:
-	.loc 2 1849 0
+	b	.L1057
+.LVL1469:
+.L1061:
+	.loc 2 1898 0
 	ldr	w21, [x3, 4]
-.LVL1468:
-	.loc 2 1850 0
+.LVL1470:
+	.loc 2 1899 0
 	cmn	w21, #1
-	beq	.L1056
-	.loc 2 1851 0 discriminator 1
+	beq	.L1062
+	.loc 2 1900 0 discriminator 1
 	ldr	x0, [x29, 144]
-	ldr	w1, [x0, #:lo12:.LANCHOR72]
+	ldr	w1, [x0, #:lo12:.LANCHOR71]
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-.LVL1469:
-	.loc 2 1850 0 discriminator 1
-	cbz	w0, .L1056
-	.loc 2 1853 0
+.LVL1471:
+	.loc 2 1899 0 discriminator 1
+	cbz	w0, .L1062
+	.loc 2 1902 0
 	ldr	x1, [x29, 144]
 	add	w0, w21, 1
-	str	w0, [x1, #:lo12:.LANCHOR72]
-.L1056:
-	.loc 2 1858 0
+	str	w0, [x1, #:lo12:.LANCHOR71]
+.L1062:
+	.loc 2 1907 0
 	ldp	w24, w0, [x3, 8]
-	.loc 2 1859 0
+	.loc 2 1908 0
 	add	x1, x29, 184
-	.loc 2 1858 0
+	.loc 2 1907 0
 	str	w0, [x29, 180]
-	.loc 2 1859 0
+	.loc 2 1908 0
 	mov	w2, 0
 	mov	w0, w24
 	bl	log2phys
-.LVL1470:
-	.loc 2 1860 0
-	ldr	w1, [x28, #:lo12:.LANCHOR154]
+.LVL1472:
+	.loc 2 1909 0
+	ldr	w1, [x28, #:lo12:.LANCHOR153]
 	cmn	w1, #1
-	beq	.L1057
-	.loc 2 1861 0 discriminator 1
+	beq	.L1063
+	.loc 2 1910 0 discriminator 1
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-.LVL1471:
-	.loc 2 1860 0 discriminator 1
-	cbz	w0, .L1057
-.LBB273:
-	.loc 2 1865 0
+.LVL1473:
+	.loc 2 1909 0 discriminator 1
+	cbz	w0, .L1063
+.LBB308:
+	.loc 2 1914 0
 	ldr	w1, [x29, 180]
 	cmn	w1, #1
-	beq	.L1058
-	.loc 2 1866 0
+	beq	.L1064
+	.loc 2 1915 0
 	ldr	x0, [x20, #:lo12:.LANCHOR120]
-	.loc 2 1868 0
+	.loc 2 1917 0
 	mov	w2, 0
-	.loc 2 1866 0
+	.loc 2 1915 0
 	add	x0, x0, x25
 	ldr	x3, [x0, 16]
-	.loc 2 1867 0
+	.loc 2 1916 0
 	str	w1, [x0, 4]
-	.loc 2 1868 0
+	.loc 2 1917 0
 	mov	w1, 1
-	.loc 2 1866 0
+	.loc 2 1915 0
 	str	x3, [x29, 136]
-.LVL1472:
-	.loc 2 1868 0
+.LVL1474:
+	.loc 2 1917 0
 	bl	FlashReadPages
-.LVL1473:
-	.loc 2 1881 0
+.LVL1475:
+	.loc 2 1930 0
 	ldr	x0, [x20, #:lo12:.LANCHOR120]
 	ldr	x3, [x29, 136]
 	add	x4, x0, x25
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	bne	.L1059
-.LVL1474:
-.L1060:
-	.loc 2 1913 0
+	bne	.L1065
+.LVL1476:
+.L1066:
+	.loc 2 1962 0
 	mov	w0, -1
 	str	w0, [x29, 180]
-	.loc 2 1914 0
+	.loc 2 1963 0
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-.LVL1475:
-.L1068:
-.LBE273:
-	.loc 2 1954 0
+.LVL1477:
+.L1074:
+.LBE308:
+	.loc 2 2003 0
 	ldr	w3, [x29, 180]
 	cmn	w3, #1
-	beq	.L1052
-.L1082:
-	.loc 2 1956 0
+	beq	.L1058
+.L1088:
+	.loc 2 2005 0
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
-.LVL1476:
+.LVL1478:
 	and	w24, w0, 65535
-	.loc 2 1957 0
+	.loc 2 2006 0
 	adrp	x0, .LANCHOR5
-	.loc 2 1956 0
+	.loc 2 2005 0
 	mov	w3, w24
-.LVL1477:
-	.loc 2 1957 0
+.LVL1479:
+	.loc 2 2006 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR5]
 	cmp	w0, w24
-	bhi	.L1073
-	.loc 2 1957 0 is_stmt 0 discriminator 1
-	mov	w2, 1957
-	adrp	x1, .LANCHOR161
+	bhi	.L1079
+	.loc 2 2006 0 is_stmt 0 discriminator 1
+	mov	w2, 2006
+	adrp	x1, .LANCHOR160
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR161
+	add	x1, x1, :lo12:.LANCHOR160
 	add	x0, x0, :lo12:.LC1
 	str	w24, [x29, 136]
 	bl	printf
-.LVL1478:
+.LVL1480:
 	ldr	w3, [x29, 136]
-.LVL1479:
-.L1073:
-	.loc 2 1958 0 is_stmt 1
-	adrp	x1, .LANCHOR43
+.LVL1481:
+.L1079:
+	.loc 2 2007 0 is_stmt 1
+	adrp	x1, .LANCHOR42
 	ubfiz	x0, x24, 1, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR43]
+	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1074
-	.loc 2 1960 0
+	cbz	w0, .L1080
+	.loc 2 2009 0
 	mov	w0, w3
-	b	.L1139
-.LVL1480:
-.L1058:
-.LBB274:
-	.loc 2 1872 0
+	b	.L1145
+.LVL1482:
+.L1064:
+.LBB309:
+	.loc 2 1921 0
 	ldp	w1, w0, [x29, 184]
 	cmp	w1, w0
-	bne	.L1061
-	.loc 2 1873 0
+	bne	.L1067
+	.loc 2 1922 0
 	mov	w2, 1
 	add	x1, x29, 180
 	mov	w0, w24
 	bl	log2phys
-.LVL1481:
-	b	.L1061
-.LVL1482:
-.L1059:
-	.loc 2 1881 0 discriminator 1
+.LVL1483:
+	b	.L1067
+.LVL1484:
+.L1065:
+	.loc 2 1930 0 discriminator 1
 	ldr	w0, [x3, 8]
 	cmp	w24, w0
-	bne	.L1060
-	.loc 2 1869 0 discriminator 2
+	bne	.L1066
+	.loc 2 1918 0 discriminator 2
 	ldr	w0, [x3, 4]
 	str	w0, [x29, 136]
-.LVL1483:
+.LVL1485:
 	str	x3, [x29, 96]
-	.loc 2 1882 0 discriminator 2
+	.loc 2 1931 0 discriminator 2
 	uxtw	x1, w0
-	ldr	w0, [x28, #:lo12:.LANCHOR154]
+	ldr	w0, [x28, #:lo12:.LANCHOR153]
 	bl	ftl_cmp_data_ver
-.LVL1484:
-	.loc 2 1881 0 discriminator 2
-	cbz	w0, .L1060
-	.loc 2 1883 0
+.LVL1486:
+	.loc 2 1930 0 discriminator 2
+	cbz	w0, .L1066
+	.loc 2 1932 0
 	ldp	w0, w1, [x29, 184]
 	ldr	x3, [x29, 96]
 	cmp	w0, w1
-	.loc 2 1885 0
+	.loc 2 1934 0
 	ldr	w1, [x29, 180]
-	.loc 2 1883 0
-	bne	.L1063
-.L1137:
-	.loc 2 1909 0
+	.loc 2 1932 0
+	bne	.L1069
+.L1143:
+	.loc 2 1958 0
 	mov	w0, w24
 	bl	FtlReUsePrevPpa
-.LVL1485:
-	b	.L1060
-.L1063:
-	.loc 2 1886 0
+.LVL1487:
+	b	.L1066
+.L1069:
+	.loc 2 1935 0
 	cmp	w0, w1
-	beq	.L1060
-	.loc 2 1887 0
+	beq	.L1066
+	.loc 2 1936 0
 	cmn	w0, #1
-	beq	.L1064
-.LVL1486:
-	.loc 2 1888 0
+	beq	.L1070
+.LVL1488:
+	.loc 2 1937 0
 	ldr	x3, [x4, 16]
-	.loc 2 1890 0
+	.loc 2 1939 0
 	mov	w2, 0
-	.loc 2 1889 0
+	.loc 2 1938 0
 	str	w0, [x4, 4]
-	.loc 2 1890 0
+	.loc 2 1939 0
 	mov	w1, 1
-	.loc 2 1888 0
+	.loc 2 1937 0
 	str	x3, [x29, 96]
-	.loc 2 1890 0
+	.loc 2 1939 0
 	mov	x0, x4
 	bl	FlashReadPages
-.LVL1487:
+.LVL1489:
 	ldr	x3, [x29, 96]
-.LVL1488:
-.L1065:
-	.loc 2 1895 0
+.LVL1490:
+.L1071:
+	.loc 2 1944 0
 	ldr	x0, [x20, #:lo12:.LANCHOR120]
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	beq	.L1066
-	.loc 2 1897 0
+	beq	.L1072
+	.loc 2 1946 0
 	ldr	x0, [x29, 104]
-	.loc 2 1896 0
+	.loc 2 1945 0
 	ldr	w3, [x3, 4]
-.LVL1489:
-	.loc 2 1897 0
+.LVL1491:
+	.loc 2 1946 0
 	mov	w1, w3
 	ldr	w0, [x0]
 	bl	ftl_cmp_data_ver
-.LVL1490:
-	cbz	w0, .L1066
-	.loc 2 1898 0
+.LVL1492:
+	cbz	w0, .L1072
+	.loc 2 1947 0
 	ldr	w0, [x29, 136]
 	mov	w1, w3
 	bl	ftl_cmp_data_ver
-.LVL1491:
-	cbz	w0, .L1060
-.LVL1492:
-.L1066:
-	.loc 2 1909 0
+.LVL1493:
+	cbz	w0, .L1066
+.LVL1494:
+.L1072:
+	.loc 2 1958 0
 	ldr	w1, [x29, 180]
-	b	.L1137
-.L1064:
-	.loc 2 1892 0
+	b	.L1143
+.L1070:
+	.loc 2 1941 0
 	str	w0, [x4]
-	b	.L1065
-.L1057:
-.LBE274:
-	.loc 2 1915 0
+	b	.L1071
+.L1063:
+.LBE309:
+	.loc 2 1964 0
 	ldp	w1, w0, [x29, 184]
 	cmp	w1, w0
-	beq	.L1068
-	.loc 2 1917 0
+	beq	.L1074
+	.loc 2 1966 0
 	mov	w2, 1
 	add	x1, x29, 188
 	mov	w0, w24
 	bl	log2phys
-.LVL1493:
-	.loc 2 1918 0
+.LVL1495:
+	.loc 2 1967 0
 	ldr	w3, [x29, 184]
 	cmn	w3, #1
-	beq	.L1068
-	.loc 2 1918 0 is_stmt 0 discriminator 1
+	beq	.L1074
+	.loc 2 1967 0 is_stmt 0 discriminator 1
 	ldr	w0, [x29, 180]
 	cmp	w3, w0
-	beq	.L1082
-	.loc 2 1919 0 is_stmt 1
+	beq	.L1088
+	.loc 2 1968 0 is_stmt 1
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
-.LVL1494:
-	.loc 2 1921 0
+.LVL1496:
+	.loc 2 1970 0
 	adrp	x1, .LANCHOR51
-	.loc 2 1919 0
+	.loc 2 1968 0
 	and	w0, w0, 65535
-.LVL1495:
-	.loc 2 1921 0
+.LVL1497:
+	.loc 2 1970 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR51]
 	cmp	w1, w0
-	beq	.L1072
-	.loc 2 1922 0 discriminator 1
+	beq	.L1078
+	.loc 2 1971 0 discriminator 1
 	adrp	x1, .LANCHOR52
-	.loc 2 1921 0 discriminator 1
+	.loc 2 1970 0 discriminator 1
 	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	beq	.L1072
-	.loc 2 1923 0
+	beq	.L1078
+	.loc 2 1972 0
 	adrp	x1, .LANCHOR53
-	.loc 2 1922 0
+	.loc 2 1971 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L1068
-.L1072:
-.LVL1496:
-.LBB275:
-	.loc 2 1927 0
+	bne	.L1074
+.L1078:
+.LVL1498:
+.LBB310:
+	.loc 2 1976 0
 	ldr	x0, [x20, #:lo12:.LANCHOR120]
-.LVL1497:
-	.loc 2 1930 0
+.LVL1499:
+	.loc 2 1979 0
 	mov	w2, 0
 	mov	w1, 1
-	.loc 2 1927 0
+	.loc 2 1976 0
 	ldr	x4, [x0, 16]
-	.loc 2 1929 0
+	.loc 2 1978 0
 	str	w3, [x0, 4]
-	.loc 2 1927 0
+	.loc 2 1976 0
 	str	x4, [x29, 136]
-.LVL1498:
-	.loc 2 1930 0
+.LVL1500:
+	.loc 2 1979 0
 	bl	FlashReadPages
-.LVL1499:
-	.loc 2 1933 0
+.LVL1501:
+	.loc 2 1982 0
 	ldr	x0, [x20, #:lo12:.LANCHOR120]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L1068
-	.loc 2 1934 0
+	beq	.L1074
+	.loc 2 1983 0
 	ldr	x4, [x29, 136]
 	mov	w0, w21
 	ldr	w1, [x4, 4]
 	bl	ftl_cmp_data_ver
-.LVL1500:
-	cbnz	w0, .L1068
-	.loc 2 1941 0
+.LVL1502:
+	cbnz	w0, .L1074
+	.loc 2 1990 0
 	mov	w2, 1
 	add	x1, x29, 184
 	mov	w0, w24
 	bl	log2phys
-.LVL1501:
-	b	.L1068
-.LVL1502:
-.L1074:
-.LBE275:
-	.loc 2 1962 0
-	mov	w1, w24
-	adrp	x0, .LC99
-	add	x0, x0, :lo12:.LC99
-	bl	printf
 .LVL1503:
-	b	.L1052
+	b	.L1074
 .LVL1504:
-.L1054:
-	.loc 2 1969 0
+.L1080:
+.LBE310:
+	.loc 2 2011 0
+	mov	w1, w24
+	adrp	x0, .LC102
+	add	x0, x0, :lo12:.LC102
+	bl	printf
+.LVL1505:
+	b	.L1058
+.LVL1506:
+.L1060:
+	.loc 2 2018 0
 	ldr	x0, [x29, 120]
 	ldr	w0, [x0]
 	cmp	w0, 31
-	bhi	.L1075
-	.loc 2 1970 0
-	adrp	x1, .LANCHOR164
-	add	x1, x1, :lo12:.LANCHOR164
+	bhi	.L1081
+	.loc 2 2019 0
+	adrp	x1, .LANCHOR163
+	add	x1, x1, :lo12:.LANCHOR163
 	str	w5, [x1, w0, uxtw 2]
-	.loc 2 1971 0
+	.loc 2 2020 0
 	add	w0, w0, 1
 	ldr	x1, [x29, 120]
 	str	w0, [x1]
-.L1075:
-	.loc 2 1973 0
+.L1081:
+	.loc 2 2022 0
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-.LVL1505:
-	.loc 2 1975 0
-	ldr	w0, [x28, #:lo12:.LANCHOR154]
+.LVL1507:
+	.loc 2 2024 0
+	ldr	w0, [x28, #:lo12:.LANCHOR153]
 	cmn	w0, #1
-	bne	.L1076
-.L1138:
-	.loc 2 1978 0
-	str	w21, [x28, #:lo12:.LANCHOR154]
-	b	.L1052
-.L1076:
-	.loc 2 1977 0
+	bne	.L1082
+.L1144:
+	.loc 2 2027 0
+	str	w21, [x28, #:lo12:.LANCHOR153]
+	b	.L1058
+.L1082:
+	.loc 2 2026 0
 	cmp	w21, w0
-	bcs	.L1052
-	b	.L1138
-.LVL1506:
-.L1079:
-	.loc 2 1986 0 discriminator 2
-	add	w0, w0, 1
-.LVL1507:
-	and	w0, w0, 65535
+	bcs	.L1058
+	b	.L1144
 .LVL1508:
-	b	.L1078
+.L1085:
+	.loc 2 2035 0 discriminator 2
+	add	w0, w0, 1
 .LVL1509:
-.L1053:
-	.loc 2 2002 0
+	and	w0, w0, 65535
+.LVL1510:
+	b	.L1084
+.LVL1511:
+.L1059:
+	.loc 2 2051 0
 	strb	w27, [x19, 6]
-	.loc 2 2003 0
+	.loc 2 2052 0
 	strh	w22, [x19, 2]
-	b	.L1141
+	b	.L1147
 	.cfi_endproc
 .LFE281:
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
@@ -14315,141 +14423,147 @@ FtlRecoverySuperblock:
 	.type	FtlSuperblockPowerLostFix, %function
 FtlSuperblockPowerLostFix:
 .LFB288:
-	.loc 2 2156 0
+	.loc 2 2205 0
 	.cfi_startproc
-.LVL1510:
-	stp	x29, x30, [sp, -96]!
-	.cfi_def_cfa_offset 96
-	.cfi_offset 29, -96
-	.cfi_offset 30, -88
+.LVL1512:
+	stp	x29, x30, [sp, -80]!
+	.cfi_def_cfa_offset 80
+	.cfi_offset 29, -80
+	.cfi_offset 30, -72
+	.loc 2 2213 0
+	adrp	x1, .LANCHOR108
+	.loc 2 2205 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -80
-	.cfi_offset 20, -72
-	.loc 2 2178 0
-	adrp	x20, .LANCHOR72
-	.loc 2 2156 0
+	.cfi_offset 19, -64
+	.cfi_offset 20, -56
 	mov	x19, x0
-	.loc 2 2178 0
-	add	x20, x20, :lo12:.LANCHOR72
-	.loc 2 2156 0
-	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -64
-	.cfi_offset 22, -56
-	.loc 2 2162 0
-	mov	w21, 7
-	.loc 2 2156 0
-	str	x23, [sp, 48]
-	.cfi_offset 23, -48
-	.loc 2 2168 0
-	mov	w22, -1
-	.loc 2 2169 0
-	adrp	x23, .LANCHOR39
-.LVL1511:
-.L1143:
-	.loc 2 2162 0
-	subs	w21, w21, #1
-.LVL1512:
-	beq	.L1145
+	.loc 2 2211 0
+	mov	w0, -1
 .LVL1513:
-	.loc 2 2163 0
-	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1144
+	.loc 2 2213 0
+	ldr	x20, [x1, #:lo12:.LANCHOR108]
+	.loc 2 2211 0
+	str	w0, [x29, 72]
+	.loc 2 2212 0
+	adrp	x0, .LANCHOR107
+	.loc 2 2205 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -48
+	.cfi_offset 22, -40
+	.loc 2 2216 0
+	mov	w1, -3
+	.loc 2 2212 0
+	ldr	x0, [x0, #:lo12:.LANCHOR107]
+	.loc 2 2229 0
+	adrp	x21, .LANCHOR71
+	.loc 2 2213 0
+	str	x20, [x29, 64]
 .LVL1514:
-.L1145:
-	.loc 2 2183 0
+	.loc 2 2229 0
+	add	x21, x21, :lo12:.LANCHOR71
+	.loc 2 2212 0
+	str	x0, [x29, 56]
+	.loc 2 2223 0
+	mov	w22, 7
+	.loc 2 2216 0
+	str	w1, [x20, 8]
+	.loc 2 2217 0
+	mov	w1, -2
+	str	w1, [x20, 12]
+	.loc 2 2218 0
+	ldrh	w1, [x19]
+	strh	w1, [x20, 2]
+	.loc 2 2219 0
+	strh	wzr, [x20]
+	.loc 2 2220 0
+	mov	w1, 61589
+	str	w1, [x0]
+	.loc 2 2221 0
+	mov	w1, 22136
+	movk	w1, 0x1234, lsl 16
+	str	w1, [x0, 4]
+.LVL1515:
+.L1149:
+	.loc 2 2223 0
+	subs	w22, w22, #1
+.LVL1516:
+	beq	.L1151
+.LVL1517:
+	.loc 2 2224 0
+	ldrh	w0, [x19, 4]
+	cbnz	w0, .L1150
+.LVL1518:
+.L1151:
+	.loc 2 2234 0
 	ldrh	w0, [x19]
-	adrp	x1, .LANCHOR43
+	adrp	x1, .LANCHOR42
 	ldrh	w3, [x19, 4]
-	ldr	x2, [x1, #:lo12:.LANCHOR43]
+	ldr	x2, [x1, #:lo12:.LANCHOR42]
 	lsl	x0, x0, 1
 	ldrh	w1, [x2, x0]
 	sub	w1, w1, w3
 	strh	w1, [x2, x0]
-	.loc 2 2184 0
+	.loc 2 2235 0
 	adrp	x0, .LANCHOR19
-	.loc 2 2185 0
+	.loc 2 2236 0
 	strb	wzr, [x19, 6]
-	.loc 2 2186 0
+	.loc 2 2237 0
 	strh	wzr, [x19, 4]
-	.loc 2 2184 0
+	.loc 2 2235 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	strh	w0, [x19, 2]
-	.loc 2 2188 0
+	.loc 2 2238 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x19, x20, [sp, 16]
-.LVL1515:
-	ldr	x23, [sp, 48]
-	ldp	x29, x30, [sp], 96
+.LVL1519:
+	ldp	x29, x30, [sp], 80
 	.cfi_remember_state
 	.cfi_restore 30
 	.cfi_restore 29
-	.cfi_restore 23
 	.cfi_restore 21
 	.cfi_restore 22
 	.cfi_restore 19
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1516:
-.L1144:
+.LVL1520:
+.L1150:
 	.cfi_restore_state
-	.loc 2 2165 0
+	.loc 2 2226 0
 	mov	x0, x19
 	bl	get_new_active_ppa
-.LVL1517:
-	str	w0, [x29, 68]
-	.loc 2 2166 0
+.LVL1521:
+	str	w0, [x29, 52]
+	.loc 2 2227 0
 	cmn	w0, #1
-	beq	.L1145
-	.loc 2 2169 0
-	ldr	x0, [x23, #:lo12:.LANCHOR39]
-	.loc 2 2179 0
+	beq	.L1151
+	.loc 2 2229 0
+	ldr	w0, [x21]
+	.loc 2 2230 0
 	mov	w3, 0
-	.loc 2 2169 0
-	str	x0, [x29, 72]
-	.loc 2 2179 0
+	.loc 2 2229 0
+	str	w0, [x20, 4]
+	.loc 2 2230 0
 	mov	w2, 0
-	.loc 2 2170 0
-	adrp	x0, .LANCHOR109
-	.loc 2 2168 0
-	str	w22, [x29, 88]
-	.loc 2 2170 0
-	ldr	x1, [x0, #:lo12:.LANCHOR109]
-	str	x1, [x29, 80]
-.LVL1518:
-	.loc 2 2175 0
-	ldrh	w0, [x19]
-	strh	w0, [x1, 2]
-	.loc 2 2178 0
-	ldr	w0, [x20]
-	.loc 2 2173 0
-	stp	w0, w22, [x1, 4]
-	.loc 2 2178 0
+	.loc 2 2229 0
 	add	w0, w0, 1
-	.loc 2 2176 0
-	strh	wzr, [x1]
-	.loc 2 2178 0
+	.loc 2 2230 0
+	mov	w1, 1
+	.loc 2 2229 0
 	cmn	w0, #1
-	.loc 2 2174 0
-	str	w22, [x1, 12]
-	.loc 2 2178 0
 	csel	w0, w0, wzr, ne
-	.loc 2 2179 0
-	mov	w1, 1
-.LVL1519:
-	.loc 2 2178 0
-	str	w0, [x20]
-	.loc 2 2179 0
-	add	x0, x29, 64
+	str	w0, [x21]
+	.loc 2 2230 0
+	add	x0, x29, 48
 	bl	FlashProgPages
-.LVL1520:
-	.loc 2 2180 0
+.LVL1522:
+	.loc 2 2231 0
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-.LVL1521:
-	b	.L1143
+.LVL1523:
+	b	.L1149
 	.cfi_endproc
 .LFE288:
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
@@ -14471,7 +14585,7 @@ FtlLoadBbt:
 	.cfi_offset 23, -32
 	.cfi_offset 24, -24
 	.loc 4 180 0
-	adrp	x23, .LANCHOR39
+	adrp	x23, .LANCHOR107
 	.loc 4 173 0
 	stp	x19, x20, [sp, 16]
 	.loc 4 184 0
@@ -14483,9 +14597,9 @@ FtlLoadBbt:
 	.cfi_offset 21, -48
 	.cfi_offset 22, -40
 	.loc 4 180 0
-	adrp	x22, .LANCHOR108
-	add	x20, x22, :lo12:.LANCHOR108
-	ldr	x0, [x23, #:lo12:.LANCHOR39]
+	adrp	x22, .LANCHOR106
+	add	x20, x22, :lo12:.LANCHOR106
+	ldr	x0, [x23, #:lo12:.LANCHOR107]
 	.loc 4 173 0
 	str	x25, [sp, 64]
 	.cfi_offset 25, -16
@@ -14494,25 +14608,25 @@ FtlLoadBbt:
 	.loc 4 180 0
 	str	x0, [x20, 8]
 	.loc 4 181 0
-	adrp	x0, .LANCHOR109
-	ldr	x21, [x0, #:lo12:.LANCHOR109]
+	adrp	x0, .LANCHOR108
+	ldr	x21, [x0, #:lo12:.LANCHOR108]
 	str	x21, [x20, 16]
-.LVL1522:
+.LVL1524:
 	.loc 4 183 0
 	bl	FtlBbtMemInit
-.LVL1523:
+.LVL1525:
 	.loc 4 184 0
 	ldrh	w19, [x24, #:lo12:.LANCHOR17]
 	add	x24, x24, :lo12:.LANCHOR17
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.LVL1524:
-.L1155:
+.LVL1526:
+.L1161:
 	.loc 4 184 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x24]
 	sub	w0, w0, #15
 	cmp	w0, w19
-	bgt	.L1158
+	bgt	.L1164
 	.loc 4 185 0 is_stmt 1
 	lsl	w0, w19, 10
 	.loc 4 186 0
@@ -14523,11 +14637,11 @@ FtlLoadBbt:
 	mov	w1, w2
 	mov	x0, x20
 	bl	FlashReadPages
-.LVL1525:
+.LVL1527:
 	.loc 4 187 0
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L1156
+	bne	.L1162
 	.loc 4 188 0
 	ldr	w0, [x20, 4]
 	.loc 4 189 0
@@ -14539,16 +14653,16 @@ FtlLoadBbt:
 	.loc 4 189 0
 	mov	x0, x20
 	bl	FlashReadPages
-.LVL1526:
-.L1156:
+.LVL1528:
+.L1162:
 	.loc 4 191 0
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L1157
+	beq	.L1163
 	.loc 4 196 0
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	bne	.L1157
+	bne	.L1163
 	.loc 4 198 0
 	adrp	x1, .LANCHOR37
 	add	x0, x1, :lo12:.LANCHOR37
@@ -14559,21 +14673,21 @@ FtlLoadBbt:
 	.loc 4 200 0
 	ldrh	w1, [x21, 8]
 	strh	w1, [x0, 4]
-.L1158:
+.L1164:
 	.loc 4 216 0
 	adrp	x19, .LANCHOR37
-.LVL1527:
+.LVL1529:
 	mov	w0, 65535
 	add	x20, x19, :lo12:.LANCHOR37
 	ldrh	w1, [x19, #:lo12:.LANCHOR37]
 	cmp	w1, w0
-	beq	.L1172
+	beq	.L1178
 	.loc 4 222 0
 	ldrh	w1, [x20, 4]
 	cmp	w1, w0
-	beq	.L1162
+	beq	.L1168
 	.loc 4 224 0
-	add	x0, x22, :lo12:.LANCHOR108
+	add	x0, x22, :lo12:.LANCHOR106
 	lsl	w1, w1, 10
 	.loc 4 225 0
 	mov	w2, 1
@@ -14582,21 +14696,21 @@ FtlLoadBbt:
 	.loc 4 225 0
 	mov	w1, w2
 	bl	FlashReadPages
-.LVL1528:
+.LVL1530:
 	.loc 4 226 0
-	ldr	w0, [x22, #:lo12:.LANCHOR108]
+	ldr	w0, [x22, #:lo12:.LANCHOR106]
 	cmn	w0, #1
-	beq	.L1162
+	beq	.L1168
 	.loc 4 229 0
 	ldrh	w1, [x21]
 	mov	w0, 61649
 	cmp	w1, w0
-	bne	.L1162
+	bne	.L1168
 	.loc 4 229 0 is_stmt 0 discriminator 1
 	ldr	w1, [x20, 8]
 	ldr	w0, [x21, 4]
 	cmp	w0, w1
-	bls	.L1162
+	bls	.L1168
 	.loc 4 231 0 is_stmt 1
 	ldrh	w1, [x20, 4]
 	.loc 4 232 0
@@ -14607,7 +14721,7 @@ FtlLoadBbt:
 	strh	w1, [x19, #:lo12:.LANCHOR37]
 	.loc 4 233 0
 	strh	w0, [x20, 4]
-.L1162:
+.L1168:
 	.loc 4 238 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR37]
 	add	x24, x19, :lo12:.LANCHOR37
@@ -14616,26 +14730,26 @@ FtlLoadBbt:
 	mov	w25, 61649
 	.loc 4 238 0
 	bl	FtlGetLastWrittenPage
-.LVL1529:
+.LVL1531:
 	sxth	w20, w0
-.LVL1530:
+.LVL1532:
 	.loc 4 239 0
 	add	w0, w0, 1
 	strh	w0, [x24, 2]
 	.loc 4 243 0
-	add	x24, x22, :lo12:.LANCHOR108
-.L1164:
+	add	x24, x22, :lo12:.LANCHOR106
+.L1170:
 	.loc 4 241 0
-	tbz	w20, #31, .L1167
+	tbz	w20, #31, .L1173
 	.loc 4 254 0
-	adrp	x1, .LANCHOR165
+	adrp	x1, .LANCHOR164
 	adrp	x0, .LC1
 	mov	w2, 254
-	add	x1, x1, :lo12:.LANCHOR165
+	add	x1, x1, :lo12:.LANCHOR164
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1531:
-.L1166:
+.LVL1533:
+.L1172:
 	.loc 4 255 0
 	add	x0, x19, :lo12:.LANCHOR37
 	ldrh	w1, [x21, 10]
@@ -14644,29 +14758,29 @@ FtlLoadBbt:
 	mov	w1, 65535
 	ldrh	w0, [x21, 12]
 	cmp	w0, w1
-	beq	.L1169
+	beq	.L1175
 	.loc 4 259 0
 	adrp	x1, .LANCHOR2
 	ldr	w2, [x1, #:lo12:.LANCHOR2]
 	cmp	w0, w2
-	beq	.L1169
+	beq	.L1175
 	.loc 4 259 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR6
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	lsr	w1, w1, 2
 	cmp	w2, w1
-	bcs	.L1169
+	bcs	.L1175
 	.loc 4 261 0 is_stmt 1
 	cmp	w0, w1
-	bcs	.L1169
+	bcs	.L1175
 	.loc 4 263 0
 	bl	FtlSysBlkNumInit
-.LVL1532:
-.L1169:
+.LVL1534:
+.L1175:
 	add	x19, x19, :lo12:.LANCHOR37
 	.loc 4 268 0 discriminator 1
 	adrp	x21, .LANCHOR10
-.LVL1533:
+.LVL1535:
 	.loc 4 269 0 discriminator 1
 	adrp	x23, .LANCHOR137
 	add	x19, x19, 32
@@ -14674,19 +14788,19 @@ FtlLoadBbt:
 	add	x21, x21, :lo12:.LANCHOR10
 	.loc 4 269 0 discriminator 1
 	add	x23, x23, :lo12:.LANCHOR137
-	add	x22, x22, :lo12:.LANCHOR108
+	add	x22, x22, :lo12:.LANCHOR106
 	.loc 4 173 0 discriminator 1
 	mov	w20, 0
-.LVL1534:
-.L1170:
+.LVL1536:
+.L1176:
 	.loc 4 268 0 discriminator 1
 	ldrh	w0, [x21]
 	cmp	w20, w0
-	bcc	.L1171
+	bcc	.L1177
 	.loc 4 275 0
 	mov	w0, 0
-.LVL1535:
-.L1154:
+.LVL1537:
+.L1160:
 	.loc 4 276 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -14705,17 +14819,17 @@ FtlLoadBbt:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1536:
-.L1157:
+.LVL1538:
+.L1163:
 	.cfi_restore_state
 	.loc 4 184 0 discriminator 2
 	sub	w19, w19, #1
-.LVL1537:
-	and	w19, w19, 65535
-.LVL1538:
-	b	.L1155
 .LVL1539:
-.L1167:
+	and	w19, w19, 65535
+.LVL1540:
+	b	.L1161
+.LVL1541:
+.L1173:
 	.loc 4 243 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR37]
 	.loc 4 245 0
@@ -14725,28 +14839,28 @@ FtlLoadBbt:
 	orr	w0, w20, w0, lsl 10
 	str	w0, [x24, 4]
 	.loc 4 244 0
-	ldr	x0, [x23, #:lo12:.LANCHOR39]
+	ldr	x0, [x23, #:lo12:.LANCHOR107]
 	str	x0, [x24, 8]
 	.loc 4 245 0
 	mov	x0, x24
 	bl	FlashReadPages
-.LVL1540:
+.LVL1542:
 	.loc 4 247 0
 	ldr	w0, [x24]
 	cmn	w0, #1
-	beq	.L1165
+	beq	.L1171
 	.loc 4 247 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	beq	.L1166
-.L1165:
+	beq	.L1172
+.L1171:
 	sub	w20, w20, #1
-.LVL1541:
-	sxth	w20, w20
-.LVL1542:
-	b	.L1164
 .LVL1543:
-.L1171:
+	sxth	w20, w20
+.LVL1544:
+	b	.L1170
+.LVL1545:
+.L1177:
 	.loc 4 269 0 is_stmt 1 discriminator 3
 	ldrh	w2, [x23]
 	ldr	x0, [x22, 8]
@@ -14754,18 +14868,18 @@ FtlLoadBbt:
 	lsl	w2, w2, 2
 	.loc 4 268 0 discriminator 3
 	add	w20, w20, 1
-.LVL1544:
+.LVL1546:
 	.loc 4 269 0 discriminator 3
 	add	x1, x0, x1, lsl 2
 	ldr	x0, [x19], 8
 	bl	ftl_memcpy
-.LVL1545:
-	b	.L1170
-.LVL1546:
-.L1172:
+.LVL1547:
+	b	.L1176
+.LVL1548:
+.L1178:
 	.loc 4 218 0
 	mov	w0, -1
-	b	.L1154
+	b	.L1160
 	.cfi_endproc
 .LFE229:
 	.size	FtlLoadBbt, .-FtlLoadBbt
@@ -14806,105 +14920,105 @@ FtlMakeBbt:
 	.cfi_offset 28, -40
 	.loc 4 325 0
 	bl	FtlBbtMemInit
-.LVL1547:
+.LVL1549:
 	.loc 4 326 0
 	bl	FtlLoadFactoryBbt
-.LVL1548:
+.LVL1550:
 	.loc 4 328 0
-	adrp	x28, .LANCHOR108
+	adrp	x28, .LANCHOR106
 	add	x21, x21, 12
 	.loc 4 356 0
-	add	x25, x28, :lo12:.LANCHOR108
+	add	x25, x28, :lo12:.LANCHOR106
 	.loc 4 327 0
 	adrp	x0, .LANCHOR10
 	add	x0, x0, :lo12:.LANCHOR10
 	str	x0, [x29, 120]
-.LVL1549:
-.L1185:
+.LVL1551:
+.L1191:
 	.loc 4 327 0 is_stmt 0 discriminator 1
 	ldr	x0, [x29, 120]
 	ldrh	w0, [x0]
 	cmp	w22, w0
-	bcc	.L1191
+	bcc	.L1197
 	.loc 4 381 0 is_stmt 1 discriminator 1
 	adrp	x21, .LANCHOR25
 	add	x21, x21, :lo12:.LANCHOR25
 	mov	w19, 0
-.L1192:
-.LVL1550:
+.L1198:
+.LVL1552:
 	ldrh	w0, [x21]
 	cmp	w0, w19
-	bhi	.L1193
+	bhi	.L1199
 	.loc 4 387 0
 	add	x21, x20, :lo12:.LANCHOR37
 	.loc 4 396 0
 	mov	w22, 65535
-.LVL1551:
+.LVL1553:
 	.loc 4 387 0
 	ldrh	w19, [x21, 12]
-.LVL1552:
+.LVL1554:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.LVL1553:
-.L1194:
+.LVL1555:
+.L1200:
 	.loc 4 387 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x21, 12]
 	sub	w0, w0, #47
 	cmp	w0, w19
-	bgt	.L1198
+	bgt	.L1204
 	.loc 4 389 0 is_stmt 1
 	mov	w0, w19
 	bl	FtlBbmIsBadBlock
-.LVL1554:
+.LVL1556:
 	cmp	w0, 1
-	beq	.L1195
+	beq	.L1201
 	.loc 4 391 0
 	mov	w0, w19
 	bl	FlashTestBlk
-.LVL1555:
-	cbz	w0, .L1196
+.LVL1557:
+	cbz	w0, .L1202
 	.loc 4 393 0
 	mov	w0, w19
 	bl	FtlBbmMapBadBlock
-.LVL1556:
-.L1195:
+.LVL1558:
+.L1201:
 	.loc 4 387 0 discriminator 2
 	sub	w19, w19, #1
-.LVL1557:
-	and	w19, w19, 65535
-.LVL1558:
-	b	.L1194
 .LVL1559:
-.L1191:
+	and	w19, w19, 65535
+.LVL1560:
+	b	.L1200
+.LVL1561:
+.L1197:
 	.loc 4 329 0
-	adrp	x2, .LANCHOR109
+	adrp	x2, .LANCHOR108
 	.loc 4 328 0
-	adrp	x0, .LANCHOR39
-	add	x19, x28, :lo12:.LANCHOR108
+	adrp	x0, .LANCHOR107
+	add	x19, x28, :lo12:.LANCHOR106
 	.loc 4 331 0
 	ldrh	w1, [x21]
 	.loc 4 328 0
-	ldr	x0, [x0, #:lo12:.LANCHOR39]
+	ldr	x0, [x0, #:lo12:.LANCHOR107]
 	.loc 4 331 0
 	mov	w3, 65535
 	.loc 4 329 0
-	ldr	x26, [x2, #:lo12:.LANCHOR109]
+	ldr	x26, [x2, #:lo12:.LANCHOR108]
 	.loc 4 331 0
 	cmp	w1, w3
 	.loc 4 329 0
 	stp	x0, x26, [x19, 8]
-.LVL1560:
+.LVL1562:
 	adrp	x23, .LANCHOR17
 	str	x2, [x29, 112]
 	.loc 4 331 0
-	beq	.L1186
+	beq	.L1192
 	.loc 4 333 0
 	ldrh	w4, [x23, #:lo12:.LANCHOR17]
 	.loc 4 335 0
 	mov	w2, 1
 	.loc 4 333 0
 	madd	w27, w4, w22, w1
-.LVL1561:
+.LVL1563:
 	.loc 4 335 0
 	mov	w1, w2
 	.loc 4 334 0
@@ -14913,7 +15027,7 @@ FtlMakeBbt:
 	.loc 4 335 0
 	mov	x0, x19
 	bl	FlashReadPages
-.LVL1562:
+.LVL1564:
 	.loc 4 336 0
 	ldr	x1, [x19, 8]
 	ldr	x0, [x24]
@@ -14921,30 +15035,30 @@ FtlMakeBbt:
 	add	w2, w2, 7
 	lsr	w2, w2, 3
 	bl	ftl_memcpy
-.LVL1563:
-.L1187:
+.LVL1565:
+.L1193:
 	.loc 4 376 0 discriminator 2
 	mov	w0, w27
 	.loc 4 327 0 discriminator 2
 	add	w22, w22, 1
-.LVL1564:
+.LVL1566:
 	.loc 4 376 0 discriminator 2
 	bl	FtlBbmMapBadBlock
-.LVL1565:
+.LVL1567:
 	add	x24, x24, 8
 	add	x21, x21, 2
-	b	.L1185
-.LVL1566:
-.L1186:
+	b	.L1191
+.LVL1568:
+.L1192:
 	.loc 4 340 0
 	mov	w1, w22
 	bl	FlashGetBadBlockList
-.LVL1567:
+.LVL1569:
 	.loc 4 341 0
 	ldr	x0, [x19, 8]
 	ldr	x1, [x24]
 	bl	FtlBbt2Bitmap
-.LVL1568:
+.LVL1570:
 	.loc 4 343 0
 	ldrh	w19, [x23, #:lo12:.LANCHOR17]
 	.loc 4 345 0
@@ -14957,17 +15071,17 @@ FtlMakeBbt:
 	add	x0, x0, :lo12:.LANCHOR137
 	.loc 4 343 0
 	and	w19, w19, 65535
-.LVL1569:
+.LVL1571:
 	.loc 4 357 0
 	str	x0, [x29, 104]
-.L1188:
+.L1194:
 	.loc 4 345 0
 	ldrh	w0, [x23]
 	madd	w0, w22, w0, w19
 	bl	FtlBbmIsBadBlock
-.LVL1570:
+.LVL1572:
 	cmp	w0, 1
-	beq	.L1189
+	beq	.L1195
 	.loc 4 350 0
 	ldr	x0, [x29, 112]
 	mov	w2, 16
@@ -14975,16 +15089,16 @@ FtlMakeBbt:
 	strh	w19, [x21]
 	.loc 4 350 0
 	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR109]
+	ldr	x0, [x0, #:lo12:.LANCHOR108]
 	bl	ftl_memset
-.LVL1571:
+.LVL1573:
 	.loc 4 351 0
-	adrp	x0, .LANCHOR39
+	adrp	x0, .LANCHOR107
 	mov	w2, 4096
 	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR39]
+	ldr	x0, [x0, #:lo12:.LANCHOR107]
 	bl	ftl_memset
-.LVL1572:
+.LVL1574:
 	.loc 4 352 0
 	mov	w0, -3872
 	strh	w0, [x26]
@@ -14999,7 +15113,7 @@ FtlMakeBbt:
 	str	wzr, [x26, 4]
 	.loc 4 355 0
 	madd	w27, w4, w22, w0
-.LVL1573:
+.LVL1575:
 	.loc 4 356 0
 	lsl	w0, w27, 10
 	str	w0, [x25, 4]
@@ -15009,76 +15123,76 @@ FtlMakeBbt:
 	ldr	x0, [x25, 8]
 	lsl	w2, w2, 2
 	bl	ftl_memcpy
-.LVL1574:
+.LVL1576:
 	.loc 4 358 0
 	mov	w2, 1
 	mov	x0, x25
 	mov	w1, w2
 	bl	FlashEraseBlocks
-.LVL1575:
+.LVL1577:
 	.loc 4 359 0
 	mov	w3, 1
 	mov	x0, x25
 	mov	w2, w3
 	mov	w1, w3
 	bl	FlashProgPages
-.LVL1576:
+.LVL1578:
 	.loc 4 360 0
 	ldr	w0, [x25]
 	cmn	w0, #1
-	bne	.L1187
+	bne	.L1193
 	.loc 4 362 0
 	mov	w0, w27
 	bl	FtlBbmMapBadBlock
-.LVL1577:
+.LVL1579:
 	.loc 4 363 0
-	b	.L1188
-.LVL1578:
-.L1189:
+	b	.L1194
+.LVL1580:
+.L1195:
 	.loc 4 347 0
 	sub	w19, w19, #1
-.LVL1579:
-	and	w19, w19, 65535
-.LVL1580:
-	b	.L1188
 .LVL1581:
-.L1193:
+	and	w19, w19, 65535
+.LVL1582:
+	b	.L1194
+.LVL1583:
+.L1199:
 	.loc 4 383 0 discriminator 3
 	mov	w0, w19
 	.loc 4 381 0 discriminator 3
 	add	w19, w19, 1
-.LVL1582:
+.LVL1584:
 	.loc 4 383 0 discriminator 3
 	bl	FtlBbmMapBadBlock
-.LVL1583:
+.LVL1585:
 	.loc 4 381 0 discriminator 3
 	and	w19, w19, 65535
-.LVL1584:
-	b	.L1192
-.LVL1585:
-.L1196:
+.LVL1586:
+	b	.L1198
+.LVL1587:
+.L1202:
 	.loc 4 396 0
 	ldrh	w0, [x21]
 	cmp	w0, w22
-	bne	.L1197
+	bne	.L1203
 	.loc 4 398 0
 	strh	w19, [x21]
-	b	.L1195
-.L1197:
+	b	.L1201
+.L1203:
 	.loc 4 402 0
 	strh	w19, [x21, 4]
-.L1198:
+.L1204:
 	.loc 4 414 0
-	adrp	x0, .LANCHOR112
+	adrp	x0, .LANCHOR111
 	.loc 4 411 0
 	add	x19, x20, :lo12:.LANCHOR37
-.LVL1586:
+.LVL1588:
 	.loc 4 414 0
 	ldrh	w1, [x20, #:lo12:.LANCHOR37]
 	.loc 4 416 0
 	mov	w2, 2
 	.loc 4 414 0
-	ldr	x0, [x0, #:lo12:.LANCHOR112]
+	ldr	x0, [x0, #:lo12:.LANCHOR111]
 	.loc 4 413 0
 	str	wzr, [x19, 8]
 	.loc 4 414 0
@@ -15094,18 +15208,18 @@ FtlMakeBbt:
 	.loc 4 416 0
 	mov	w1, 1
 	bl	FlashEraseBlocks
-.LVL1587:
+.LVL1589:
 	.loc 4 418 0
 	ldrh	w0, [x20, #:lo12:.LANCHOR37]
 	bl	FtlBbmMapBadBlock
-.LVL1588:
+.LVL1590:
 	.loc 4 419 0
 	ldrh	w0, [x19, 4]
 	bl	FtlBbmMapBadBlock
-.LVL1589:
+.LVL1591:
 	.loc 4 421 0
 	bl	FtlBbmTblFlush
-.LVL1590:
+.LVL1592:
 	.loc 4 426 0
 	strh	wzr, [x19, 2]
 	.loc 4 422 0
@@ -15117,14 +15231,14 @@ FtlMakeBbt:
 	str	w0, [x19, 8]
 	.loc 4 424 0
 	ldrh	w0, [x20, #:lo12:.LANCHOR37]
-.LVL1591:
+.LVL1593:
 	.loc 4 427 0
 	strh	w0, [x19, 4]
 	.loc 4 425 0
 	strh	w1, [x20, #:lo12:.LANCHOR37]
 	.loc 4 429 0
 	bl	FtlBbmTblFlush
-.LVL1592:
+.LVL1594:
 	.loc 4 432 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
@@ -15156,9 +15270,9 @@ FtlMakeBbt:
 	.type	FtlVendorPartWrite, %function
 FtlVendorPartWrite:
 .LFB263:
-	.loc 2 786 0
+	.loc 2 835 0
 	.cfi_startproc
-.LVL1593:
+.LVL1595:
 	stp	x29, x30, [sp, -208]!
 	.cfi_def_cfa_offset 208
 	.cfi_offset 29, -208
@@ -15170,22 +15284,22 @@ FtlVendorPartWrite:
 	.cfi_offset 20, -184
 	mov	w20, w1
 	stp	x27, x28, [sp, 80]
-	.loc 2 794 0
+	.loc 2 843 0
 	add	w1, w0, w1
-.LVL1594:
+.LVL1596:
 	.cfi_offset 27, -128
 	.cfi_offset 28, -120
-	.loc 2 786 0
+	.loc 2 835 0
 	mov	w28, w0
-.LVL1595:
-	.loc 2 794 0
+.LVL1597:
+	.loc 2 843 0
 	adrp	x0, .LANCHOR16
-.LVL1596:
-	.loc 2 786 0
+.LVL1598:
+	.loc 2 835 0
 	stp	x21, x22, [sp, 32]
-	.loc 2 794 0
+	.loc 2 843 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR16]
-	.loc 2 786 0
+	.loc 2 835 0
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	.cfi_offset 21, -176
@@ -15194,40 +15308,40 @@ FtlVendorPartWrite:
 	.cfi_offset 24, -152
 	.cfi_offset 25, -144
 	.cfi_offset 26, -136
-	.loc 2 794 0
+	.loc 2 843 0
 	cmp	w1, w0
-	bhi	.L1212
-	.loc 2 791 0
+	bhi	.L1218
+	.loc 2 840 0
 	adrp	x0, .LANCHOR22
-	.loc 2 799 0
+	.loc 2 848 0
 	adrp	x25, .LANCHOR12
-	.loc 2 809 0
+	.loc 2 858 0
 	adrp	x26, .LANCHOR23
 	mov	x24, x2
-	.loc 2 791 0
+	.loc 2 840 0
 	ldrh	w21, [x0, #:lo12:.LANCHOR22]
-	.loc 2 799 0
+	.loc 2 848 0
 	add	x25, x25, :lo12:.LANCHOR12
-	.loc 2 809 0
+	.loc 2 858 0
 	add	x26, x26, :lo12:.LANCHOR23
-	.loc 2 791 0
+	.loc 2 840 0
 	mov	w23, 0
 	lsr	w21, w28, w21
-.LVL1597:
-.L1206:
-	.loc 2 797 0
-	cbnz	w20, .L1211
-.LVL1598:
-.L1204:
-	.loc 2 820 0
+.LVL1599:
+.L1212:
+	.loc 2 846 0
+	cbnz	w20, .L1217
+.LVL1600:
+.L1210:
+	.loc 2 869 0
 	mov	w0, w23
 	ldp	x19, x20, [sp, 16]
-.LVL1599:
+.LVL1601:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-.LVL1600:
+.LVL1602:
 	ldp	x29, x30, [sp], 208
 	.cfi_remember_state
 	.cfi_restore 30
@@ -15244,111 +15358,111 @@ FtlVendorPartWrite:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1601:
-.L1211:
+.LVL1603:
+.L1217:
 	.cfi_restore_state
-	.loc 2 799 0
+	.loc 2 848 0
 	ldrh	w1, [x25]
-	.loc 2 798 0
+	.loc 2 847 0
 	adrp	x0, .LANCHOR133
 	adrp	x27, .LANCHOR124
 	ldr	x0, [x0, #:lo12:.LANCHOR133]
-	.loc 2 799 0
+	.loc 2 848 0
 	udiv	w22, w28, w1
-	.loc 2 798 0
+	.loc 2 847 0
 	ldr	w2, [x0, w21, uxtw 2]
-.LVL1602:
-	.loc 2 802 0
+.LVL1604:
+	.loc 2 851 0
 	and	w0, w20, 65535
-	.loc 2 799 0
+	.loc 2 848 0
 	msub	w22, w22, w1, w28
-.LVL1603:
-	.loc 2 800 0
+.LVL1605:
+	.loc 2 849 0
 	sub	w19, w1, w22
 	and	w19, w19, 65535
-.LVL1604:
-	.loc 2 802 0
+.LVL1606:
+	.loc 2 851 0
 	cmp	w20, w19
 	csel	w19, w0, w19, cc
-.LVL1605:
-	.loc 2 803 0
-	cbz	w2, .L1208
-	.loc 2 803 0 is_stmt 0 discriminator 1
+.LVL1607:
+	.loc 2 852 0
+	cbz	w2, .L1214
+	.loc 2 852 0 is_stmt 0 discriminator 1
 	cmp	w19, w1
-	beq	.L1208
-	.loc 2 805 0 is_stmt 1
+	beq	.L1214
+	.loc 2 854 0 is_stmt 1
 	ldr	x0, [x27, #:lo12:.LANCHOR124]
 	str	x0, [x29, 120]
-	.loc 2 806 0
+	.loc 2 855 0
 	add	x0, x29, 144
-	.loc 2 804 0
+	.loc 2 853 0
 	str	w2, [x29, 116]
-	.loc 2 807 0
+	.loc 2 856 0
 	mov	w2, 1
-.LVL1606:
-	.loc 2 806 0
+.LVL1608:
+	.loc 2 855 0
 	str	x0, [x29, 128]
-	.loc 2 807 0
+	.loc 2 856 0
 	mov	w1, w2
 	add	x0, x29, 112
-.LVL1607:
+.LVL1609:
 	bl	FlashReadPages
-.LVL1608:
-.L1209:
-	.loc 2 811 0
+.LVL1610:
+.L1215:
+	.loc 2 860 0
 	lsl	w4, w19, 9
 	ldr	x0, [x27, #:lo12:.LANCHOR124]
 	lsl	w22, w22, 7
-.LVL1609:
+.LVL1611:
 	mov	w2, w4
 	mov	x1, x24
 	str	w4, [x29, 108]
 	add	x0, x0, x22, sxtw 2
 	bl	ftl_memcpy
-.LVL1610:
-	.loc 2 812 0
+.LVL1612:
+	.loc 2 861 0
 	ldr	x2, [x27, #:lo12:.LANCHOR124]
 	mov	w1, w21
 	adrp	x0, .LANCHOR149
 	add	x0, x0, :lo12:.LANCHOR149
-	.loc 2 815 0
+	.loc 2 864 0
 	sub	w20, w20, w19
-.LVL1611:
-	.loc 2 816 0
+.LVL1613:
+	.loc 2 865 0
 	add	w28, w28, w19
-.LVL1612:
-	.loc 2 814 0
+.LVL1614:
+	.loc 2 863 0
 	add	w21, w21, 1
-.LVL1613:
-	.loc 2 812 0
+.LVL1615:
+	.loc 2 861 0
 	bl	FtlMapWritePage
-.LVL1614:
-	.loc 2 813 0
+.LVL1616:
+	.loc 2 862 0
 	cmn	w0, #1
-	.loc 2 817 0
+	.loc 2 866 0
 	ldr	w4, [x29, 108]
-	.loc 2 813 0
+	.loc 2 862 0
 	csinv	w23, w23, wzr, ne
-.LVL1615:
-	.loc 2 817 0
-	add	x24, x24, x4, sxtw
-.LVL1616:
-	b	.L1206
 .LVL1617:
-.L1208:
-	.loc 2 809 0
-	ldrh	w2, [x26]
+	.loc 2 866 0
+	add	x24, x24, x4, sxtw
 .LVL1618:
+	b	.L1212
+.LVL1619:
+.L1214:
+	.loc 2 858 0
+	ldrh	w2, [x26]
+.LVL1620:
 	mov	w1, 0
 	ldr	x0, [x27, #:lo12:.LANCHOR124]
 	bl	ftl_memset
-.LVL1619:
-	b	.L1209
-.LVL1620:
-.L1212:
-	.loc 2 795 0
+.LVL1621:
+	b	.L1215
+.LVL1622:
+.L1218:
+	.loc 2 844 0
 	mov	w23, -1
-	b	.L1204
+	b	.L1210
 	.cfi_endproc
 .LFE263:
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
@@ -15358,81 +15472,81 @@ FtlVendorPartWrite:
 	.type	Ftl_save_ext_data, %function
 Ftl_save_ext_data:
 .LFB286:
-	.loc 2 2110 0
+	.loc 2 2159 0
 	.cfi_startproc
-	.loc 2 2111 0
-	adrp	x0, .LANCHOR83
-	add	x2, x0, :lo12:.LANCHOR83
-	ldr	w1, [x0, #:lo12:.LANCHOR83]
+	.loc 2 2160 0
+	adrp	x0, .LANCHOR81
+	add	x2, x0, :lo12:.LANCHOR81
+	ldr	w1, [x0, #:lo12:.LANCHOR81]
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1217
-.LBB278:
-.LBB279:
-	.loc 2 2112 0
-	mov	w0, 64
-	.loc 2 2125 0
+	bne	.L1223
+.LBB313:
+.LBB314:
+	.loc 2 2161 0
+	mov	w0, 68
+	.loc 2 2174 0
 	mov	w1, 1
-	.loc 2 2112 0
+	.loc 2 2161 0
 	movk	w0, 0x5000, lsl 16
 	str	w0, [x2, 4]
-	.loc 2 2113 0
+	.loc 2 2162 0
+	adrp	x0, .LANCHOR68
+	ldr	w0, [x0, #:lo12:.LANCHOR68]
+	str	w0, [x2, 88]
+	.loc 2 2163 0
 	adrp	x0, .LANCHOR69
 	ldr	w0, [x0, #:lo12:.LANCHOR69]
-	str	w0, [x2, 88]
-	.loc 2 2114 0
-	adrp	x0, .LANCHOR70
-	ldr	w0, [x0, #:lo12:.LANCHOR70]
 	str	w0, [x2, 92]
-	.loc 2 2115 0
-	adrp	x0, .LANCHOR68
-	ldr	w0, [x0, #:lo12:.LANCHOR68]
+	.loc 2 2164 0
+	adrp	x0, .LANCHOR67
+	ldr	w0, [x0, #:lo12:.LANCHOR67]
 	str	w0, [x2, 8]
-	.loc 2 2116 0
-	adrp	x0, .LANCHOR65
-	ldr	w0, [x0, #:lo12:.LANCHOR65]
+	.loc 2 2165 0
+	adrp	x0, .LANCHOR64
+	ldr	w0, [x0, #:lo12:.LANCHOR64]
 	str	w0, [x2, 12]
-	.loc 2 2117 0
-	adrp	x0, .LANCHOR63
-	ldr	w0, [x0, #:lo12:.LANCHOR63]
+	.loc 2 2166 0
+	adrp	x0, .LANCHOR62
+	ldr	w0, [x0, #:lo12:.LANCHOR62]
 	str	w0, [x2, 16]
-	.loc 2 2118 0
-	adrp	x0, .LANCHOR67
-	ldr	w0, [x0, #:lo12:.LANCHOR67]
+	.loc 2 2167 0
+	adrp	x0, .LANCHOR66
+	ldr	w0, [x0, #:lo12:.LANCHOR66]
 	str	w0, [x2, 20]
-	.loc 2 2119 0
-	adrp	x0, .LANCHOR74
-	ldr	w0, [x0, #:lo12:.LANCHOR74]
+	.loc 2 2168 0
+	adrp	x0, .LANCHOR73
+	ldr	w0, [x0, #:lo12:.LANCHOR73]
 	str	w0, [x2, 28]
-	.loc 2 2120 0
-	adrp	x0, .LANCHOR76
-	ldr	w0, [x0, #:lo12:.LANCHOR76]
+	.loc 2 2169 0
+	adrp	x0, .LANCHOR75
+	ldr	w0, [x0, #:lo12:.LANCHOR75]
 	str	w0, [x2, 32]
-	.loc 2 2121 0
-	adrp	x0, .LANCHOR64
-	ldr	w0, [x0, #:lo12:.LANCHOR64]
+	.loc 2 2170 0
+	adrp	x0, .LANCHOR63
+	ldr	w0, [x0, #:lo12:.LANCHOR63]
 	str	w0, [x2, 36]
-	.loc 2 2122 0
-	adrp	x0, .LANCHOR66
-	ldr	w0, [x0, #:lo12:.LANCHOR66]
+	.loc 2 2171 0
+	adrp	x0, .LANCHOR65
+	ldr	w0, [x0, #:lo12:.LANCHOR65]
 	str	w0, [x2, 40]
-	.loc 2 2123 0
+	.loc 2 2172 0
+	adrp	x0, .LANCHOR76
+	ldr	w0, [x0, #:lo12:.LANCHOR76]
+	str	w0, [x2, 44]
+	.loc 2 2173 0
 	adrp	x0, .LANCHOR77
 	ldr	w0, [x0, #:lo12:.LANCHOR77]
-	str	w0, [x2, 44]
-	.loc 2 2124 0
-	adrp	x0, .LANCHOR78
-	ldr	w0, [x0, #:lo12:.LANCHOR78]
 	str	w0, [x2, 48]
-	.loc 2 2125 0
+	.loc 2 2174 0
 	mov	w0, 0
 	b	FtlVendorPartWrite
-.LVL1621:
-.L1217:
+.LVL1623:
+.L1223:
 	ret
-.LBE279:
-.LBE278:
+.LBE314:
+.LBE313:
 	.cfi_endproc
 .LFE286:
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
@@ -15442,84 +15556,84 @@ Ftl_save_ext_data:
 	.type	FtlEctTblFlush, %function
 FtlEctTblFlush:
 .LFB265:
-	.loc 2 861 0
+	.loc 2 910 0
 	.cfi_startproc
-.LVL1622:
-	.loc 2 864 0
-	adrp	x2, .LANCHOR166
-	ldrh	w1, [x2, #:lo12:.LANCHOR166]
+.LVL1624:
+	.loc 2 913 0
+	adrp	x2, .LANCHOR165
+	ldrh	w1, [x2, #:lo12:.LANCHOR165]
 	cmp	w1, 31
-	bhi	.L1223
-	.loc 2 865 0
+	bhi	.L1229
+	.loc 2 914 0
 	add	w1, w1, 1
-	strh	w1, [x2, #:lo12:.LANCHOR166]
-.LVL1623:
-	.loc 2 866 0
+	strh	w1, [x2, #:lo12:.LANCHOR165]
+.LVL1625:
+	.loc 2 915 0
 	mov	w1, 1
-.LVL1624:
-.L1220:
+.LVL1626:
+.L1226:
 	adrp	x2, .LANCHOR127
-	.loc 2 868 0
-	cbnz	w0, .L1221
-	.loc 2 868 0 is_stmt 0 discriminator 1
+	.loc 2 917 0
+	cbnz	w0, .L1227
+	.loc 2 917 0 is_stmt 0 discriminator 1
 	ldr	x0, [x2, #:lo12:.LANCHOR127]
-.LVL1625:
+.LVL1627:
 	ldr	w3, [x0, 20]
 	ldr	w0, [x0, 16]
 	add	w1, w1, w3
-.LVL1626:
+.LVL1628:
 	cmp	w0, w1
-	bcc	.L1225
-.L1221:
-	.loc 2 861 0 is_stmt 1
+	bcc	.L1231
+.L1227:
+	.loc 2 910 0 is_stmt 1
 	stp	x29, x30, [sp, -16]!
 	.cfi_def_cfa_offset 16
 	.cfi_offset 29, -16
 	.cfi_offset 30, -8
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	.loc 2 870 0
+	.loc 2 919 0
 	ldr	x2, [x2, #:lo12:.LANCHOR127]
 	ldr	w0, [x2, 16]
 	str	w0, [x2, 20]
-	.loc 2 871 0
+	.loc 2 920 0
 	mov	w0, 17221
-	.loc 2 874 0
+	.loc 2 923 0
 	str	wzr, [x2, 4]
-	.loc 2 871 0
+	.loc 2 920 0
 	movk	w0, 0x4254, lsl 16
 	str	w0, [x2]
-	.loc 2 872 0
+	.loc 2 921 0
 	adrp	x0, .LANCHOR125
 	ldrh	w1, [x0, #:lo12:.LANCHOR125]
 	lsl	w0, w1, 9
 	str	w0, [x2, 12]
-	.loc 2 873 0
+	.loc 2 922 0
 	ldr	w0, [x2, 8]
 	add	w0, w0, 1
 	str	w0, [x2, 8]
-	.loc 2 875 0
+	.loc 2 924 0
 	mov	w0, 64
 	bl	FtlVendorPartWrite
-.LVL1627:
-	.loc 2 876 0
+.LVL1629:
+	.loc 2 925 0
 	bl	Ftl_save_ext_data
-.LVL1628:
-	.loc 2 878 0
+.LVL1630:
+	.loc 2 927 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	.cfi_restore 30
 	.cfi_restore 29
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1629:
-.L1223:
-	.loc 2 862 0
+.LVL1631:
+.L1229:
+	.loc 2 911 0
 	mov	w1, 32
-	b	.L1220
-.LVL1630:
-.L1225:
-	.loc 2 878 0
+	b	.L1226
+.LVL1632:
+.L1231:
+	.loc 2 927 0
 	mov	w0, 0
 	ret
 	.cfi_endproc
@@ -15531,9 +15645,9 @@ FtlEctTblFlush:
 	.type	FtlVendorPartRead, %function
 FtlVendorPartRead:
 .LFB264:
-	.loc 2 823 0
+	.loc 2 872 0
 	.cfi_startproc
-.LVL1631:
+.LVL1633:
 	stp	x29, x30, [sp, -208]!
 	.cfi_def_cfa_offset 208
 	.cfi_offset 29, -208
@@ -15545,22 +15659,22 @@ FtlVendorPartRead:
 	.cfi_offset 20, -184
 	mov	w20, w1
 	stp	x21, x22, [sp, 32]
-	.loc 2 832 0
+	.loc 2 881 0
 	add	w1, w0, w1
-.LVL1632:
+.LVL1634:
 	.cfi_offset 21, -176
 	.cfi_offset 22, -168
-	.loc 2 823 0
+	.loc 2 872 0
 	mov	w21, w0
-.LVL1633:
-	.loc 2 832 0
+.LVL1635:
+	.loc 2 881 0
 	adrp	x0, .LANCHOR16
-.LVL1634:
-	.loc 2 823 0
+.LVL1636:
+	.loc 2 872 0
 	stp	x23, x24, [sp, 48]
-	.loc 2 832 0
+	.loc 2 881 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR16]
-	.loc 2 823 0
+	.loc 2 872 0
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	.cfi_offset 23, -160
@@ -15569,34 +15683,34 @@ FtlVendorPartRead:
 	.cfi_offset 26, -136
 	.cfi_offset 27, -128
 	.cfi_offset 28, -120
-	.loc 2 832 0
+	.loc 2 881 0
 	cmp	w1, w0
-	bhi	.L1235
-	.loc 2 828 0
+	bhi	.L1241
+	.loc 2 877 0
 	adrp	x0, .LANCHOR22
-	.loc 2 836 0
+	.loc 2 885 0
 	adrp	x24, .LANCHOR12
 	mov	x23, x2
 	add	x24, x24, :lo12:.LANCHOR12
-	.loc 2 828 0
+	.loc 2 877 0
 	ldrh	w3, [x0, #:lo12:.LANCHOR22]
 	mov	w22, 0
-	.loc 2 835 0
+	.loc 2 884 0
 	adrp	x25, .LANCHOR133
-	.loc 2 828 0
+	.loc 2 877 0
 	lsr	w26, w21, w3
-.LVL1635:
-.L1229:
-	.loc 2 834 0
-	cbnz	w20, .L1234
-.LVL1636:
-.L1227:
-	.loc 2 857 0
+.LVL1637:
+.L1235:
+	.loc 2 883 0
+	cbnz	w20, .L1240
+.LVL1638:
+.L1233:
+	.loc 2 906 0
 	mov	w0, w22
 	ldp	x19, x20, [sp, 16]
-.LVL1637:
+.LVL1639:
 	ldp	x21, x22, [sp, 32]
-.LVL1638:
+.LVL1640:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
@@ -15616,105 +15730,105 @@ FtlVendorPartRead:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1639:
-.L1234:
+.LVL1641:
+.L1240:
 	.cfi_restore_state
-	.loc 2 836 0
+	.loc 2 885 0
 	ldrh	w19, [x24]
-	.loc 2 835 0
+	.loc 2 884 0
 	ldr	x0, [x25, #:lo12:.LANCHOR133]
-	.loc 2 836 0
+	.loc 2 885 0
 	udiv	w27, w21, w19
-	.loc 2 835 0
+	.loc 2 884 0
 	ldr	w1, [x0, w26, uxtw 2]
-.LVL1640:
-	.loc 2 839 0
+.LVL1642:
+	.loc 2 888 0
 	and	w0, w20, 65535
-	.loc 2 836 0
+	.loc 2 885 0
 	msub	w27, w27, w19, w21
-.LVL1641:
-	.loc 2 837 0
+.LVL1643:
+	.loc 2 886 0
 	sub	w19, w19, w27
 	and	w19, w19, 65535
-.LVL1642:
-	.loc 2 839 0
+.LVL1644:
+	.loc 2 888 0
 	cmp	w20, w19
 	csel	w19, w0, w19, cc
-.LVL1643:
+.LVL1645:
 	lsl	w28, w19, 9
-	.loc 2 840 0
-	cbz	w1, .L1231
-	.loc 2 842 0
+	.loc 2 889 0
+	cbz	w1, .L1237
+	.loc 2 891 0
 	adrp	x4, .LANCHOR124
-	.loc 2 844 0
+	.loc 2 893 0
 	mov	w2, 1
-	.loc 2 842 0
+	.loc 2 891 0
 	str	x4, [x29, 104]
-	.loc 2 847 0
+	.loc 2 896 0
 	lsl	w27, w27, 7
-.LVL1644:
-	.loc 2 842 0
+.LVL1646:
+	.loc 2 891 0
 	ldr	x0, [x4, #:lo12:.LANCHOR124]
 	str	x0, [x29, 120]
-	.loc 2 843 0
+	.loc 2 892 0
 	add	x0, x29, 144
-	.loc 2 841 0
+	.loc 2 890 0
 	str	w1, [x29, 116]
-	.loc 2 844 0
+	.loc 2 893 0
 	mov	w1, w2
-.LVL1645:
-	.loc 2 843 0
+.LVL1647:
+	.loc 2 892 0
 	str	x0, [x29, 128]
-	.loc 2 844 0
+	.loc 2 893 0
 	add	x0, x29, 112
-.LVL1646:
+.LVL1648:
 	bl	FlashReadPages
-.LVL1647:
-	.loc 2 847 0
+.LVL1649:
+	.loc 2 896 0
 	ldr	x4, [x29, 104]
 	mov	w2, w28
-	.loc 2 846 0
+	.loc 2 895 0
 	ldr	w0, [x29, 112]
 	cmn	w0, #1
-	.loc 2 847 0
+	.loc 2 896 0
 	mov	x0, x23
 	ldr	x1, [x4, #:lo12:.LANCHOR124]
-	.loc 2 846 0
+	.loc 2 895 0
 	csinv	w22, w22, wzr, ne
-.LVL1648:
-	.loc 2 847 0
+.LVL1650:
+	.loc 2 896 0
 	add	x1, x1, x27, sxtw 2
 	bl	ftl_memcpy
-.LVL1649:
-.L1233:
-	.loc 2 851 0
-	add	w26, w26, 1
-.LVL1650:
-	.loc 2 852 0
-	sub	w20, w20, w19
 .LVL1651:
-	.loc 2 853 0
-	add	w21, w21, w19
+.L1239:
+	.loc 2 900 0
+	add	w26, w26, 1
 .LVL1652:
-	.loc 2 854 0
-	add	x23, x23, x28, sxtw
+	.loc 2 901 0
+	sub	w20, w20, w19
 .LVL1653:
-	b	.L1229
+	.loc 2 902 0
+	add	w21, w21, w19
 .LVL1654:
-.L1231:
-	.loc 2 849 0
+	.loc 2 903 0
+	add	x23, x23, x28, sxtw
+.LVL1655:
+	b	.L1235
+.LVL1656:
+.L1237:
+	.loc 2 898 0
 	mov	w2, w28
 	mov	w1, 0
-.LVL1655:
+.LVL1657:
 	mov	x0, x23
 	bl	ftl_memset
-.LVL1656:
-	b	.L1233
-.LVL1657:
-.L1235:
-	.loc 2 833 0
+.LVL1658:
+	b	.L1239
+.LVL1659:
+.L1241:
+	.loc 2 882 0
 	mov	w22, -1
-	b	.L1227
+	b	.L1233
 	.cfi_endproc
 .LFE264:
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
@@ -15724,54 +15838,54 @@ FtlVendorPartRead:
 	.type	FtlLoadEctTbl, %function
 FtlLoadEctTbl:
 .LFB271:
-	.loc 2 1334 0
+	.loc 2 1383 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
 	.cfi_offset 30, -24
-	.loc 2 1335 0
+	.loc 2 1384 0
 	mov	w0, 64
-	.loc 2 1334 0
+	.loc 2 1383 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -16
 	.cfi_offset 20, -8
-	.loc 2 1335 0
+	.loc 2 1384 0
 	adrp	x19, .LANCHOR127
 	adrp	x20, .LANCHOR125
 	ldr	x2, [x19, #:lo12:.LANCHOR127]
 	ldrh	w1, [x20, #:lo12:.LANCHOR125]
 	bl	FtlVendorPartRead
-.LVL1658:
-	.loc 2 1336 0
+.LVL1660:
+	.loc 2 1385 0
 	ldr	x0, [x19, #:lo12:.LANCHOR127]
 	ldr	w1, [x0]
 	mov	w0, 17221
 	movk	w0, 0x4254, lsl 16
 	cmp	w1, w0
-	beq	.L1238
-.LBB282:
-.LBB283:
-	.loc 2 1338 0
-	adrp	x1, .LC100
+	beq	.L1244
+.LBB317:
+.LBB318:
+	.loc 2 1387 0
+	adrp	x1, .LC103
 	adrp	x0, .LC71
-	add	x1, x1, :lo12:.LC100
+	add	x1, x1, :lo12:.LC103
 	add	x0, x0, :lo12:.LC71
 	bl	printf
-.LVL1659:
-	.loc 2 1339 0
+.LVL1661:
+	.loc 2 1388 0
 	ldr	x0, [x19, #:lo12:.LANCHOR127]
 	mov	w1, 0
 	ldrh	w2, [x20, #:lo12:.LANCHOR125]
 	lsl	w2, w2, 9
 	bl	ftl_memset
-.LVL1660:
-.L1238:
-.LBE283:
-.LBE282:
-	.loc 2 1344 0
+.LVL1662:
+.L1244:
+.LBE318:
+.LBE317:
+	.loc 2 1393 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -15790,113 +15904,113 @@ FtlLoadEctTbl:
 	.type	Ftl_load_ext_data, %function
 Ftl_load_ext_data:
 .LFB287:
-	.loc 2 2130 0
+	.loc 2 2179 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -48]!
 	.cfi_def_cfa_offset 48
 	.cfi_offset 29, -48
 	.cfi_offset 30, -40
-	.loc 2 2131 0
+	.loc 2 2180 0
 	mov	w1, 1
 	mov	w0, 0
-	.loc 2 2130 0
+	.loc 2 2179 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -32
 	.cfi_offset 20, -24
-	.loc 2 2131 0
-	adrp	x19, .LANCHOR83
-	.loc 2 2130 0
+	.loc 2 2180 0
+	adrp	x19, .LANCHOR81
+	.loc 2 2179 0
 	str	x21, [sp, 32]
 	.cfi_offset 21, -16
-	.loc 2 2131 0
-	add	x21, x19, :lo12:.LANCHOR83
+	.loc 2 2180 0
+	add	x21, x19, :lo12:.LANCHOR81
 	mov	x2, x21
 	bl	FtlVendorPartRead
-.LVL1661:
-	.loc 2 2132 0
-	ldr	w0, [x19, #:lo12:.LANCHOR83]
+.LVL1663:
+	.loc 2 2181 0
+	ldr	w0, [x19, #:lo12:.LANCHOR81]
 	mov	w20, 19539
 	movk	w20, 0x4654, lsl 16
 	cmp	w0, w20
-	beq	.L1241
-	.loc 2 2133 0
+	beq	.L1247
+	.loc 2 2182 0
 	mov	w2, 512
 	mov	w1, 0
 	mov	x0, x21
 	bl	ftl_memset
-.LVL1662:
-	.loc 2 2134 0
-	str	w20, [x19, #:lo12:.LANCHOR83]
-.L1241:
-	.loc 2 2137 0
-	ldr	w1, [x19, #:lo12:.LANCHOR83]
-	add	x0, x19, :lo12:.LANCHOR83
+.LVL1664:
+	.loc 2 2183 0
+	str	w20, [x19, #:lo12:.LANCHOR81]
+.L1247:
+	.loc 2 2186 0
+	ldr	w1, [x19, #:lo12:.LANCHOR81]
+	add	x0, x19, :lo12:.LANCHOR81
 	cmp	w1, w20
-	adrp	x1, .LANCHOR74
-	bne	.L1242
-	.loc 2 2138 0
-	adrp	x2, .LANCHOR69
+	adrp	x1, .LANCHOR73
+	bne	.L1248
+	.loc 2 2187 0
+	adrp	x2, .LANCHOR68
 	ldr	w3, [x0, 88]
-	str	w3, [x2, #:lo12:.LANCHOR69]
-	.loc 2 2139 0
-	adrp	x2, .LANCHOR70
+	str	w3, [x2, #:lo12:.LANCHOR68]
+	.loc 2 2188 0
+	adrp	x2, .LANCHOR69
 	ldr	w3, [x0, 92]
-	str	w3, [x2, #:lo12:.LANCHOR70]
-	.loc 2 2140 0
-	adrp	x2, .LANCHOR68
+	str	w3, [x2, #:lo12:.LANCHOR69]
+	.loc 2 2189 0
+	adrp	x2, .LANCHOR67
 	ldr	w3, [x0, 8]
-	str	w3, [x2, #:lo12:.LANCHOR68]
-	.loc 2 2141 0
-	adrp	x2, .LANCHOR65
+	str	w3, [x2, #:lo12:.LANCHOR67]
+	.loc 2 2190 0
+	adrp	x2, .LANCHOR64
 	ldr	w3, [x0, 12]
-	str	w3, [x2, #:lo12:.LANCHOR65]
-	.loc 2 2142 0
-	adrp	x2, .LANCHOR63
+	str	w3, [x2, #:lo12:.LANCHOR64]
+	.loc 2 2191 0
+	adrp	x2, .LANCHOR62
 	ldr	w3, [x0, 16]
-	str	w3, [x2, #:lo12:.LANCHOR63]
-	.loc 2 2143 0
-	adrp	x2, .LANCHOR67
+	str	w3, [x2, #:lo12:.LANCHOR62]
+	.loc 2 2192 0
+	adrp	x2, .LANCHOR66
 	ldr	w3, [x0, 20]
-	str	w3, [x2, #:lo12:.LANCHOR67]
-	.loc 2 2145 0
+	str	w3, [x2, #:lo12:.LANCHOR66]
+	.loc 2 2194 0
 	ldp	w2, w3, [x0, 28]
-	.loc 2 2144 0
-	str	w2, [x1, #:lo12:.LANCHOR74]
-	.loc 2 2145 0
-	adrp	x2, .LANCHOR76
-	str	w3, [x2, #:lo12:.LANCHOR76]
-	.loc 2 2146 0
-	adrp	x2, .LANCHOR64
+	.loc 2 2193 0
+	str	w2, [x1, #:lo12:.LANCHOR73]
+	.loc 2 2194 0
+	adrp	x2, .LANCHOR75
+	str	w3, [x2, #:lo12:.LANCHOR75]
+	.loc 2 2195 0
+	adrp	x2, .LANCHOR63
 	ldr	w3, [x0, 36]
-	str	w3, [x2, #:lo12:.LANCHOR64]
-	.loc 2 2147 0
-	adrp	x2, .LANCHOR66
+	str	w3, [x2, #:lo12:.LANCHOR63]
+	.loc 2 2196 0
+	adrp	x2, .LANCHOR65
 	ldr	w3, [x0, 40]
-	str	w3, [x2, #:lo12:.LANCHOR66]
-	.loc 2 2148 0
-	adrp	x2, .LANCHOR77
+	str	w3, [x2, #:lo12:.LANCHOR65]
+	.loc 2 2197 0
+	adrp	x2, .LANCHOR76
 	ldr	w3, [x0, 44]
-	str	w3, [x2, #:lo12:.LANCHOR77]
-	.loc 2 2149 0
+	str	w3, [x2, #:lo12:.LANCHOR76]
+	.loc 2 2198 0
 	ldr	w2, [x0, 48]
-	adrp	x0, .LANCHOR78
-	str	w2, [x0, #:lo12:.LANCHOR78]
-.L1242:
-	.loc 2 2152 0
+	adrp	x0, .LANCHOR77
+	str	w2, [x0, #:lo12:.LANCHOR77]
+.L1248:
+	.loc 2 2201 0
 	adrp	x0, .LANCHOR14
-	adrp	x2, .LANCHOR73
-	ldr	w1, [x1, #:lo12:.LANCHOR74]
+	adrp	x2, .LANCHOR72
+	ldr	w1, [x1, #:lo12:.LANCHOR73]
 	ldrh	w0, [x0, #:lo12:.LANCHOR14]
-	ldr	w2, [x2, #:lo12:.LANCHOR73]
-	.loc 2 2153 0
+	ldr	w2, [x2, #:lo12:.LANCHOR72]
+	.loc 2 2202 0
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
-	.loc 2 2152 0
+	.loc 2 2201 0
 	madd	w0, w0, w2, w1
 	adrp	x1, .LANCHOR5
-	.loc 2 2153 0
+	.loc 2 2202 0
 	ldp	x29, x30, [sp], 48
 	.cfi_restore 30
 	.cfi_restore 29
@@ -15904,12 +16018,12 @@ Ftl_load_ext_data:
 	.cfi_restore 19
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
-	.loc 2 2152 0
+	.loc 2 2201 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR5]
 	udiv	w0, w0, w1
-	adrp	x1, .LANCHOR75
-	str	w0, [x1, #:lo12:.LANCHOR75]
-	.loc 2 2153 0
+	adrp	x1, .LANCHOR74
+	str	w0, [x1, #:lo12:.LANCHOR74]
+	.loc 2 2202 0
 	ret
 	.cfi_endproc
 .LFE287:
@@ -15920,184 +16034,184 @@ Ftl_load_ext_data:
 	.type	FtlVpcTblFlush, %function
 FtlVpcTblFlush:
 .LFB269:
-	.loc 2 1004 0
+	.loc 2 1053 0
 	.cfi_startproc
-.LVL1663:
+.LVL1665:
 	stp	x29, x30, [sp, -112]!
 	.cfi_def_cfa_offset 112
 	.cfi_offset 29, -112
 	.cfi_offset 30, -104
-	.loc 2 1013 0
-	adrp	x1, .LANCHOR81
-	.loc 2 1019 0
+	.loc 2 1062 0
+	adrp	x1, .LANCHOR79
+	.loc 2 1068 0
 	mov	w2, 19539
-	.loc 2 1004 0
+	.loc 2 1053 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x25, x26, [sp, 64]
 	.cfi_offset 25, -48
 	.cfi_offset 26, -40
-	.loc 2 1011 0
-	adrp	x25, .LANCHOR109
-	.loc 2 1004 0
+	.loc 2 1060 0
+	adrp	x25, .LANCHOR108
+	.loc 2 1053 0
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -80
 	.cfi_offset 22, -72
-	.loc 2 1010 0
-	adrp	x22, .LANCHOR108
-	.loc 2 1004 0
+	.loc 2 1059 0
+	adrp	x22, .LANCHOR106
+	.loc 2 1053 0
 	stp	x23, x24, [sp, 48]
 	.cfi_offset 23, -64
 	.cfi_offset 24, -56
-	.loc 2 1010 0
-	adrp	x24, .LANCHOR39
-	.loc 2 1004 0
+	.loc 2 1059 0
+	adrp	x24, .LANCHOR107
+	.loc 2 1053 0
 	stp	x27, x28, [sp, 80]
 	.cfi_offset 27, -32
 	.cfi_offset 28, -24
-	.loc 2 1010 0
-	add	x28, x22, :lo12:.LANCHOR108
-	.loc 2 1011 0
-	ldr	x21, [x25, #:lo12:.LANCHOR109]
-	.loc 2 1019 0
+	.loc 2 1059 0
+	add	x28, x22, :lo12:.LANCHOR106
+	.loc 2 1060 0
+	ldr	x21, [x25, #:lo12:.LANCHOR108]
+	.loc 2 1068 0
 	movk	w2, 0x4654, lsl 16
-	.loc 2 1004 0
+	.loc 2 1053 0
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -96
 	.cfi_offset 20, -88
-	.loc 2 1013 0
-	add	x19, x1, :lo12:.LANCHOR81
-	.loc 2 1010 0
-	ldr	x0, [x24, #:lo12:.LANCHOR39]
-	.loc 2 1041 0
-	adrp	x23, .LANCHOR71
-	.loc 2 1013 0
-	ldrh	w1, [x1, #:lo12:.LANCHOR81]
-	.loc 2 1057 0
+	.loc 2 1062 0
+	add	x19, x1, :lo12:.LANCHOR79
+	.loc 2 1059 0
+	ldr	x0, [x24, #:lo12:.LANCHOR107]
+	.loc 2 1090 0
+	adrp	x23, .LANCHOR70
+	.loc 2 1062 0
+	ldrh	w1, [x1, #:lo12:.LANCHOR79]
+	.loc 2 1106 0
 	adrp	x27, .LANCHOR20
-	.loc 2 1011 0
+	.loc 2 1060 0
 	stp	x0, x21, [x28, 8]
-.LVL1664:
-	.loc 2 1005 0
+.LVL1666:
+	.loc 2 1054 0
 	mov	w26, 65535
-	.loc 2 1013 0
+	.loc 2 1062 0
 	strh	w1, [x21, 2]
-	.loc 2 1014 0
+	.loc 2 1063 0
 	mov	w1, -3932
 	strh	w1, [x21]
-	.loc 2 1015 0
+	.loc 2 1064 0
 	ldr	w1, [x19, 8]
-	.loc 2 1016 0
+	.loc 2 1065 0
 	stp	w1, wzr, [x21, 4]
-	.loc 2 1019 0
-	adrp	x1, .LANCHOR79
-	add	x20, x1, :lo12:.LANCHOR79
-	.loc 2 1017 0
+	.loc 2 1068 0
+	adrp	x1, .LANCHOR39
+	add	x20, x1, :lo12:.LANCHOR39
+	.loc 2 1066 0
 	str	wzr, [x21, 12]
-	.loc 2 1019 0
-	str	w2, [x1, #:lo12:.LANCHOR79]
-	.loc 2 1020 0
-	mov	w1, 64
+	.loc 2 1068 0
+	str	w2, [x1, #:lo12:.LANCHOR39]
+	.loc 2 1069 0
+	mov	w1, 68
 	movk	w1, 0x5000, lsl 16
 	str	w1, [x20, 4]
-	.loc 2 1021 0
+	.loc 2 1070 0
 	ldrh	w1, [x19, 6]
-	.loc 2 1024 0
+	.loc 2 1073 0
 	adrp	x2, .LANCHOR51
-	.loc 2 1021 0
+	.loc 2 1070 0
 	strh	w1, [x20, 8]
-	.loc 2 1022 0
+	.loc 2 1071 0
 	adrp	x1, .LANCHOR10
 	ldrh	w1, [x1, #:lo12:.LANCHOR10]
 	strb	w1, [x20, 10]
-	.loc 2 1024 0
+	.loc 2 1073 0
 	add	x1, x2, :lo12:.LANCHOR51
 	ldrh	w2, [x2, #:lo12:.LANCHOR51]
 	strh	w2, [x20, 14]
-	.loc 2 1025 0
+	.loc 2 1074 0
 	ldrh	w2, [x1, 2]
 	ldrb	w3, [x1, 6]
-	.loc 2 1026 0
+	.loc 2 1075 0
 	ldrb	w1, [x1, 8]
 	strb	w1, [x20, 11]
-	.loc 2 1025 0
+	.loc 2 1074 0
 	orr	w2, w3, w2, lsl 6
 	strh	w2, [x20, 16]
-	.loc 2 1028 0
+	.loc 2 1077 0
 	adrp	x2, .LANCHOR52
 	add	x1, x2, :lo12:.LANCHOR52
 	ldrh	w2, [x2, #:lo12:.LANCHOR52]
-	.loc 2 1029 0
+	.loc 2 1078 0
 	ldrb	w3, [x1, 6]
-	.loc 2 1028 0
+	.loc 2 1077 0
 	strh	w2, [x20, 18]
-	.loc 2 1029 0
+	.loc 2 1078 0
 	ldrh	w2, [x1, 2]
-	.loc 2 1030 0
+	.loc 2 1079 0
 	ldrb	w1, [x1, 8]
 	strb	w1, [x20, 12]
-	.loc 2 1029 0
+	.loc 2 1078 0
 	orr	w2, w3, w2, lsl 6
 	strh	w2, [x20, 20]
-	.loc 2 1032 0
+	.loc 2 1081 0
 	adrp	x2, .LANCHOR53
 	add	x1, x2, :lo12:.LANCHOR53
 	ldrh	w2, [x2, #:lo12:.LANCHOR53]
-	.loc 2 1033 0
+	.loc 2 1082 0
 	ldrb	w3, [x1, 6]
-	.loc 2 1032 0
+	.loc 2 1081 0
 	strh	w2, [x20, 22]
-	.loc 2 1033 0
+	.loc 2 1082 0
 	ldrh	w2, [x1, 2]
-	.loc 2 1034 0
+	.loc 2 1083 0
 	ldrb	w1, [x1, 8]
 	strb	w1, [x20, 13]
-	.loc 2 1036 0
-	adrp	x1, .LANCHOR73
-	.loc 2 1033 0
+	.loc 2 1085 0
+	adrp	x1, .LANCHOR72
+	.loc 2 1082 0
 	orr	w2, w3, w2, lsl 6
 	strh	w2, [x20, 24]
-	.loc 2 1036 0
-	ldr	w1, [x1, #:lo12:.LANCHOR73]
+	.loc 2 1085 0
+	ldr	w1, [x1, #:lo12:.LANCHOR72]
 	str	w1, [x20, 32]
-	.loc 2 1041 0
-	ldr	w1, [x23, #:lo12:.LANCHOR71]
+	.loc 2 1090 0
+	ldr	w1, [x23, #:lo12:.LANCHOR70]
 	str	w1, [x20, 40]
-	.loc 2 1042 0
-	adrp	x1, .LANCHOR72
-	ldr	w1, [x1, #:lo12:.LANCHOR72]
+	.loc 2 1091 0
+	adrp	x1, .LANCHOR71
+	ldr	w1, [x1, #:lo12:.LANCHOR71]
 	str	w1, [x20, 36]
-	.loc 2 1047 0
+	.loc 2 1096 0
 	adrp	x1, .LANCHOR23
 	ldrh	w2, [x1, #:lo12:.LANCHOR23]
 	mov	w1, 255
 	bl	ftl_memset
-.LVL1665:
-	.loc 2 1048 0
+.LVL1667:
+	.loc 2 1097 0
 	ldr	x0, [x28, 8]
 	mov	x1, x20
 	mov	w2, 48
-	.loc 2 1049 0
+	.loc 2 1098 0
 	adrp	x20, .LANCHOR5
-	.loc 2 1048 0
+	.loc 2 1097 0
 	bl	ftl_memcpy
-.LVL1666:
-	.loc 2 1049 0
-	adrp	x1, .LANCHOR43
+.LVL1668:
+	.loc 2 1098 0
+	adrp	x1, .LANCHOR42
 	ldrh	w2, [x20, #:lo12:.LANCHOR5]
 	ldr	x0, [x28, 8]
-	ldr	x1, [x1, #:lo12:.LANCHOR43]
+	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	lsl	w2, w2, 1
 	add	x0, x0, 48
 	bl	ftl_memcpy
-.LVL1667:
-	.loc 2 1050 0
+.LVL1669:
+	.loc 2 1099 0
 	ldrh	w0, [x20, #:lo12:.LANCHOR5]
 	adrp	x1, .LANCHOR1
 	ldr	x3, [x28, 8]
-	.loc 2 1007 0
+	.loc 2 1056 0
 	mov	w20, 0
-	.loc 2 1050 0
+	.loc 2 1099 0
 	ldr	x1, [x1, #:lo12:.LANCHOR1]
 	lsr	w2, w0, 3
 	ubfiz	x0, x0, 1, 16
@@ -16106,157 +16220,157 @@ FtlVpcTblFlush:
 	and	x0, x0, -4
 	add	x0, x3, x0
 	bl	ftl_memcpy
-.LVL1668:
-	.loc 2 1051 0
+.LVL1670:
+	.loc 2 1100 0
 	mov	w0, 0
 	bl	FtlUpdateVaildLpn
-.LVL1669:
-	.loc 2 1077 0
+.LVL1671:
+	.loc 2 1126 0
 	add	x0, x27, :lo12:.LANCHOR20
 	str	x0, [x29, 104]
-.LVL1670:
-.L1245:
-	.loc 2 1053 0
-	ldr	x0, [x24, #:lo12:.LANCHOR39]
-	.loc 2 1056 0
+.LVL1672:
+.L1251:
+	.loc 2 1102 0
+	ldr	x0, [x24, #:lo12:.LANCHOR107]
+	.loc 2 1105 0
 	mov	w3, 1
-	.loc 2 1053 0
+	.loc 2 1102 0
 	str	x0, [x28, 8]
-	.loc 2 1056 0
+	.loc 2 1105 0
 	mov	w2, w3
-	.loc 2 1054 0
-	ldr	x0, [x25, #:lo12:.LANCHOR109]
-	.loc 2 1055 0
+	.loc 2 1103 0
+	ldr	x0, [x25, #:lo12:.LANCHOR108]
+	.loc 2 1104 0
 	ldrh	w1, [x19, 2]
-	.loc 2 1054 0
+	.loc 2 1103 0
 	str	x0, [x28, 16]
-	.loc 2 1055 0
+	.loc 2 1104 0
 	ldrh	w0, [x19]
 	orr	w0, w1, w0, lsl 10
-	.loc 2 1056 0
+	.loc 2 1105 0
 	mov	w1, w3
-	.loc 2 1055 0
+	.loc 2 1104 0
 	str	w0, [x28, 4]
-	.loc 2 1056 0
+	.loc 2 1105 0
 	mov	x0, x28
 	bl	FlashProgPages
-.LVL1671:
-	.loc 2 1057 0
+.LVL1673:
+	.loc 2 1106 0
 	ldrh	w0, [x27, #:lo12:.LANCHOR20]
 	ldrh	w1, [x19, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L1246
-	.loc 2 1059 0
+	blt	.L1252
+	.loc 2 1108 0
 	ldrh	w0, [x19]
-	.loc 2 1058 0
+	.loc 2 1107 0
 	ldrh	w26, [x19, 4]
-.LVL1672:
-	.loc 2 1060 0
+.LVL1674:
+	.loc 2 1109 0
 	strh	wzr, [x19, 2]
-	.loc 2 1059 0
+	.loc 2 1108 0
 	strh	w0, [x19, 4]
-	.loc 2 1061 0
+	.loc 2 1110 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL1673:
+.LVL1675:
 	strh	w0, [x19]
-	.loc 2 1066 0
-	ldr	w1, [x23, #:lo12:.LANCHOR71]
-	.loc 2 1070 0
+	.loc 2 1115 0
+	ldr	w1, [x23, #:lo12:.LANCHOR70]
+	.loc 2 1119 0
 	mov	w3, 1
-	.loc 2 1066 0
+	.loc 2 1115 0
 	str	w1, [x19, 8]
 	add	w2, w1, 1
-	str	w2, [x23, #:lo12:.LANCHOR71]
-	.loc 2 1067 0
+	str	w2, [x23, #:lo12:.LANCHOR70]
+	.loc 2 1116 0
 	ubfiz	w2, w0, 10, 16
 	str	w2, [x28, 4]
-	.loc 2 1069 0
+	.loc 2 1118 0
 	strh	w0, [x21, 2]
-	.loc 2 1070 0
+	.loc 2 1119 0
 	mov	w2, w3
-	.loc 2 1068 0
+	.loc 2 1117 0
 	str	w1, [x21, 4]
-	.loc 2 1070 0
+	.loc 2 1119 0
 	mov	x0, x28
 	mov	w1, w3
 	bl	FlashProgPages
-.LVL1674:
-.L1246:
-	.loc 2 1072 0
+.LVL1676:
+.L1252:
+	.loc 2 1121 0
 	ldrh	w0, [x19, 2]
-	.loc 2 1073 0
+	.loc 2 1122 0
 	ldr	w1, [x28]
-	.loc 2 1072 0
+	.loc 2 1121 0
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	strh	w0, [x19, 2]
-	.loc 2 1073 0
+	.loc 2 1122 0
 	cmn	w1, #1
-	bne	.L1247
-	.loc 2 1075 0
+	bne	.L1253
+	.loc 2 1124 0
 	cmp	w0, 1
-	bne	.L1248
-	.loc 2 1075 0 is_stmt 0 discriminator 1
-	adrp	x1, .LANCHOR167
+	bne	.L1254
+	.loc 2 1124 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR166
 	adrp	x0, .LC1
-	mov	w2, 1075
-	add	x1, x1, :lo12:.LANCHOR167
+	mov	w2, 1124
+	add	x1, x1, :lo12:.LANCHOR166
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1675:
-.L1248:
-	.loc 2 1076 0 is_stmt 1
+.LVL1677:
+.L1254:
+	.loc 2 1125 0 is_stmt 1
 	ldrh	w0, [x19, 2]
 	cmp	w0, 1
-	bne	.L1249
-	.loc 2 1077 0
+	bne	.L1255
+	.loc 2 1126 0
 	ldr	x0, [x29, 104]
 	ldrh	w0, [x0]
 	sub	w0, w0, #1
 	strh	w0, [x19, 2]
-.L1249:
-	.loc 2 1078 0
+.L1255:
+	.loc 2 1127 0
 	add	w20, w20, 1
-.LVL1676:
+.LVL1678:
 	and	w20, w20, 65535
-.LVL1677:
-	.loc 2 1079 0
+.LVL1679:
+	.loc 2 1128 0
 	cmp	w20, 3
-	bls	.L1245
-	.loc 2 1080 0
-	add	x22, x22, :lo12:.LANCHOR108
-	adrp	x0, .LC101
+	bls	.L1251
+	.loc 2 1129 0
+	add	x22, x22, :lo12:.LANCHOR106
+	adrp	x0, .LC104
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC101
+	add	x0, x0, :lo12:.LC104
 	ldr	w1, [x22, 4]
 	bl	printf
-.LVL1678:
-.L1251:
-	b	.L1251
-.L1247:
-	.loc 2 1086 0
+.LVL1680:
+.L1257:
+	b	.L1257
+.L1253:
+	.loc 2 1135 0
 	cmp	w0, 1
-	beq	.L1245
-	.loc 2 1089 0
+	beq	.L1251
+	.loc 2 1138 0
 	mov	w0, 65535
 	cmp	w26, w0
-	beq	.L1252
-	.loc 2 1090 0
+	beq	.L1258
+	.loc 2 1139 0
 	mov	w1, 1
 	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-.LVL1679:
-.L1252:
-	.loc 2 1092 0
+.LVL1681:
+.L1258:
+	.loc 2 1141 0
 	ldp	x19, x20, [sp, 16]
-.LVL1680:
+.LVL1682:
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
-.LVL1681:
+.LVL1683:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-.LVL1682:
+.LVL1684:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	.cfi_restore 30
@@ -16276,87 +16390,330 @@ FtlVpcTblFlush:
 	.cfi_endproc
 .LFE269:
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
+	.section	.text.FtlSysFlush,"ax",@progbits
+	.align	2
+	.global	FtlSysFlush
+	.type	FtlSysFlush, %function
+FtlSysFlush:
+.LFB212:
+	.loc 3 797 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -16]!
+	.cfi_def_cfa_offset 16
+	.cfi_offset 29, -16
+	.cfi_offset 30, -8
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 3 799 0
+	bl	l2p_flush
+.LVL1685:
+	.loc 3 800 0
+	mov	w0, 1
+	bl	FtlEctTblFlush
+.LVL1686:
+	.loc 3 801 0
+	bl	FtlVpcTblFlush
+.LVL1687:
+	.loc 3 803 0
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE212:
+	.size	FtlSysFlush, .-FtlSysFlush
+	.section	.text.sftl_deinit,"ax",@progbits
+	.align	2
+	.global	sftl_deinit
+	.type	sftl_deinit, %function
+sftl_deinit:
+.LFB213:
+	.loc 3 806 0
+	.cfi_startproc
+	.loc 3 807 0
+	adrp	x0, .LANCHOR86
+	ldr	w0, [x0, #:lo12:.LANCHOR86]
+	cmp	w0, 1
+	bne	.L1268
+	.loc 3 806 0
+	stp	x29, x30, [sp, -16]!
+	.cfi_def_cfa_offset 16
+	.cfi_offset 29, -16
+	.cfi_offset 30, -8
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 3 808 0
+	bl	FtlSysFlush
+.LVL1688:
+	.loc 3 810 0
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+	ret
+.L1268:
+	mov	w0, 0
+	ret
+	.cfi_endproc
+.LFE213:
+	.size	sftl_deinit, .-sftl_deinit
+	.section	.text.FtlDiscard,"ax",@progbits
+	.align	2
+	.global	FtlDiscard
+	.type	FtlDiscard, %function
+FtlDiscard:
+.LFB218:
+	.loc 3 1121 0
+	.cfi_startproc
+.LVL1689:
+	stp	x29, x30, [sp, -80]!
+	.cfi_def_cfa_offset 80
+	.cfi_offset 29, -80
+	.cfi_offset 30, -72
+	.loc 3 1128 0
+	add	w2, w0, w1
+	.loc 3 1121 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -64
+	.cfi_offset 20, -56
+	mov	w19, w1
+	.loc 3 1128 0
+	adrp	x1, .LANCHOR34
+.LVL1690:
+	.loc 3 1121 0
+	stp	x21, x22, [sp, 32]
+	str	x23, [sp, 48]
+	.cfi_offset 21, -48
+	.cfi_offset 22, -40
+	.cfi_offset 23, -32
+	.loc 3 1128 0
+	ldr	w1, [x1, #:lo12:.LANCHOR34]
+	cmp	w2, w1
+	bhi	.L1279
+	.loc 3 1131 0
+	cmp	w19, 31
+	bhi	.L1273
+.LVL1691:
+.L1287:
+	.loc 3 1164 0
+	mov	w0, 0
+.L1271:
+	.loc 3 1165 0
+	ldp	x19, x20, [sp, 16]
+.LVL1692:
+	ldp	x21, x22, [sp, 32]
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 23
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL1693:
+.L1273:
+	.cfi_restore_state
+	.loc 3 1136 0
+	adrp	x21, .LANCHOR12
+	ldrh	w1, [x21, #:lo12:.LANCHOR12]
+	udiv	w20, w0, w1
+.LVL1694:
+	.loc 3 1137 0
+	msub	w0, w1, w20, w0
+.LVL1695:
+	.loc 3 1138 0
+	ands	w0, w0, 65535
+	beq	.L1274
+.LVL1696:
+	.loc 3 1139 0
+	sub	w1, w1, w0
+.LVL1697:
+	.loc 3 1140 0
+	add	w20, w20, 1
+.LVL1698:
+	.loc 3 1139 0
+	cmp	w1, w19
+	csel	w1, w1, w19, ls
+	.loc 3 1141 0
+	sub	w19, w19, w1, uxth
+.LVL1699:
+.L1274:
+	.loc 3 1148 0
+	adrp	x22, .LANCHOR167
+	.loc 3 1149 0
+	adrp	x23, .LANCHOR63
+	.loc 3 1148 0
+	add	x22, x22, :lo12:.LANCHOR167
+	.loc 3 1149 0
+	add	x23, x23, :lo12:.LANCHOR63
+	.loc 3 1144 0
+	mov	w0, -1
+.LVL1700:
+	str	w0, [x29, 76]
+.LVL1701:
+.L1275:
+	.loc 3 1145 0
+	ldrh	w0, [x21, #:lo12:.LANCHOR12]
+	cmp	w19, w0
+	bcs	.L1277
+	.loc 3 1158 0
+	adrp	x0, .LANCHOR167
+	ldr	w1, [x0, #:lo12:.LANCHOR167]
+	cmp	w1, 32
+	bls	.L1287
+	.loc 3 1160 0
+	str	wzr, [x0, #:lo12:.LANCHOR167]
+	.loc 3 1161 0
+	bl	l2p_flush
+.LVL1702:
+	.loc 3 1162 0
+	bl	FtlVpcTblFlush
+.LVL1703:
+	b	.L1287
+.L1277:
+	.loc 3 1146 0
+	mov	w2, 0
+	add	x1, x29, 72
+	mov	w0, w20
+	bl	log2phys
+.LVL1704:
+	.loc 3 1147 0
+	ldr	w0, [x29, 72]
+	cmn	w0, #1
+	beq	.L1276
+	.loc 3 1148 0
+	ldr	w0, [x22]
+	.loc 3 1150 0
+	mov	w2, 1
+	add	x1, x29, 76
+	.loc 3 1148 0
+	add	w0, w0, 1
+	str	w0, [x22]
+	.loc 3 1149 0
+	ldr	w0, [x23]
+	add	w0, w0, 1
+	str	w0, [x23]
+	.loc 3 1150 0
+	mov	w0, w20
+	bl	log2phys
+.LVL1705:
+	.loc 3 1151 0
+	ldr	w0, [x29, 72]
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+.LVL1706:
+	.loc 3 1152 0
+	bl	decrement_vpc_count
+.LVL1707:
+.L1276:
+	.loc 3 1155 0
+	ldrh	w0, [x21, #:lo12:.LANCHOR12]
+	.loc 3 1154 0
+	add	w20, w20, 1
+.LVL1708:
+	.loc 3 1155 0
+	sub	w19, w19, w0
+.LVL1709:
+	b	.L1275
+.LVL1710:
+.L1279:
+	.loc 3 1129 0
+	mov	w0, -1
+.LVL1711:
+	b	.L1271
+	.cfi_endproc
+.LFE218:
+	.size	FtlDiscard, .-FtlDiscard
 	.section	.text.FtlVpcCheckAndModify,"ax",@progbits
 	.align	2
 	.global	FtlVpcCheckAndModify
 	.type	FtlVpcCheckAndModify, %function
 FtlVpcCheckAndModify:
 .LFB289:
-	.loc 2 2192 0
+	.loc 2 2242 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -96]!
 	.cfi_def_cfa_offset 96
 	.cfi_offset 29, -96
 	.cfi_offset 30, -88
-	.loc 2 2197 0
+	.loc 2 2247 0
 	adrp	x1, .LANCHOR168
-	adrp	x0, .LC91
+	adrp	x0, .LC94
 	add	x1, x1, :lo12:.LANCHOR168
-	.loc 2 2192 0
+	.loc 2 2242 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.loc 2 2197 0
-	add	x0, x0, :lo12:.LC91
-	.loc 2 2192 0
+	.loc 2 2247 0
+	add	x0, x0, :lo12:.LC94
+	.loc 2 2242 0
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 19, -80
 	.cfi_offset 20, -72
 	.cfi_offset 21, -64
 	.cfi_offset 22, -56
-	.loc 2 2198 0
+	.loc 2 2248 0
 	adrp	x20, .LANCHOR128
-	.loc 2 2192 0
+	.loc 2 2242 0
 	stp	x23, x24, [sp, 48]
-	.loc 2 2199 0
-	adrp	x21, .LANCHOR62
-	.loc 2 2192 0
+	.loc 2 2249 0
+	adrp	x21, .LANCHOR61
+	.loc 2 2242 0
 	str	x25, [sp, 64]
 	.cfi_offset 23, -48
 	.cfi_offset 24, -40
 	.cfi_offset 25, -32
-	.loc 2 2197 0
+	.loc 2 2247 0
 	bl	printf
-.LVL1683:
-	.loc 2 2198 0
+.LVL1712:
+	.loc 2 2248 0
 	adrp	x0, .LANCHOR6
-	.loc 2 2199 0
+	.loc 2 2249 0
 	mov	w19, 0
-	add	x21, x21, :lo12:.LANCHOR62
-	.loc 2 2198 0
+	add	x21, x21, :lo12:.LANCHOR61
+	.loc 2 2248 0
 	mov	w1, 0
 	ldrh	w2, [x0, #:lo12:.LANCHOR6]
 	ldr	x0, [x20, #:lo12:.LANCHOR128]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL1684:
-.L1258:
-	.loc 2 2199 0 discriminator 1
+.LVL1713:
+.L1289:
+	.loc 2 2249 0 discriminator 1
 	ldr	w0, [x21]
 	cmp	w19, w0
-	bcc	.L1260
-	.loc 2 2206 0 discriminator 1
+	bcc	.L1291
+	.loc 2 2256 0 discriminator 1
 	adrp	x22, .LANCHOR5
-	.loc 2 2209 0 discriminator 1
-	adrp	x23, .LC102
-	.loc 2 2206 0 discriminator 1
+	.loc 2 2259 0 discriminator 1
+	adrp	x23, .LC105
+	.loc 2 2256 0 discriminator 1
 	add	x22, x22, :lo12:.LANCHOR5
-	.loc 2 2209 0 discriminator 1
-	add	x23, x23, :lo12:.LC102
+	.loc 2 2259 0 discriminator 1
+	add	x23, x23, :lo12:.LC105
 	mov	w19, 0
-.LVL1685:
-	.loc 2 2207 0 discriminator 1
-	adrp	x25, .LANCHOR43
+.LVL1714:
+	.loc 2 2257 0 discriminator 1
+	adrp	x25, .LANCHOR42
 	mov	w24, 65535
-.L1261:
-.LVL1686:
-	.loc 2 2206 0 discriminator 1
+.L1292:
+.LVL1715:
+	.loc 2 2256 0 discriminator 1
 	ldrh	w0, [x22]
 	cmp	w0, w19
-	bhi	.L1265
-	.loc 2 2218 0
+	bhi	.L1296
+	.loc 2 2268 0
 	ldp	x19, x20, [sp, 16]
-.LVL1687:
+.LVL1716:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
@@ -16373,90 +16730,90 @@ FtlVpcCheckAndModify:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1688:
-.L1260:
+.LVL1717:
+.L1291:
 	.cfi_restore_state
-	.loc 2 2200 0
+	.loc 2 2250 0
 	mov	w2, 0
 	add	x1, x29, 92
 	mov	w0, w19
 	bl	log2phys
-.LVL1689:
-	.loc 2 2201 0
+.LVL1718:
+	.loc 2 2251 0
 	ldr	w0, [x29, 92]
 	cmn	w0, #1
-	beq	.L1259
-	.loc 2 2202 0
+	beq	.L1290
+	.loc 2 2252 0
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL1690:
-	.loc 2 2203 0
+.LVL1719:
+	.loc 2 2253 0
 	ldr	x2, [x20, #:lo12:.LANCHOR128]
 	ubfiz	x0, x0, 1, 16
-.LVL1691:
+.LVL1720:
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-.L1259:
-	.loc 2 2199 0 discriminator 2
+.L1290:
+	.loc 2 2249 0 discriminator 2
 	add	w19, w19, 1
-.LVL1692:
-	b	.L1258
-.LVL1693:
-.L1265:
-	.loc 2 2207 0
-	ldr	x0, [x25, #:lo12:.LANCHOR43]
+.LVL1721:
+	b	.L1289
+.LVL1722:
+.L1296:
+	.loc 2 2257 0
+	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	ubfiz	x21, x19, 1, 16
 	ldrh	w2, [x0, x21]
 	ldr	x0, [x20, #:lo12:.LANCHOR128]
 	ldrh	w3, [x0, x21]
 	cmp	w2, w3
-	beq	.L1263
-	.loc 2 2207 0 is_stmt 0 discriminator 1
+	beq	.L1294
+	.loc 2 2257 0 is_stmt 0 discriminator 1
 	cmp	w2, w24
-	beq	.L1263
-	.loc 2 2209 0 is_stmt 1
+	beq	.L1294
+	.loc 2 2259 0 is_stmt 1
 	mov	w1, w19
 	mov	x0, x23
 	bl	printf
-.LVL1694:
-	.loc 2 2210 0
+.LVL1723:
+	.loc 2 2260 0
 	adrp	x0, .LANCHOR51
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w19
-	beq	.L1263
-	.loc 2 2210 0 is_stmt 0 discriminator 1
+	beq	.L1294
+	.loc 2 2260 0 is_stmt 0 discriminator 1
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w19
-	beq	.L1263
-	.loc 2 2210 0 discriminator 2
+	beq	.L1294
+	.loc 2 2260 0 discriminator 2
 	adrp	x0, .LANCHOR52
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
-	beq	.L1263
-	.loc 2 2211 0 is_stmt 1
+	beq	.L1294
+	.loc 2 2261 0 is_stmt 1
 	ldr	x0, [x20, #:lo12:.LANCHOR128]
 	ldrh	w1, [x0, x21]
-	ldr	x0, [x25, #:lo12:.LANCHOR43]
+	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	strh	w1, [x0, x21]
-	.loc 2 2212 0
+	.loc 2 2262 0
 	mov	w0, w19
 	bl	update_vpc_list
-.LVL1695:
-	.loc 2 2213 0
+.LVL1724:
+	.loc 2 2263 0
 	bl	l2p_flush
-.LVL1696:
-	.loc 2 2214 0
+.LVL1725:
+	.loc 2 2264 0
 	bl	FtlVpcTblFlush
-.LVL1697:
-.L1263:
-	.loc 2 2206 0 discriminator 2
+.LVL1726:
+.L1294:
+	.loc 2 2256 0 discriminator 2
 	add	w19, w19, 1
-.LVL1698:
+.LVL1727:
 	and	w19, w19, 65535
-.LVL1699:
-	b	.L1261
+.LVL1728:
+	b	.L1292
 	.cfi_endproc
 .LFE289:
 	.size	FtlVpcCheckAndModify, .-FtlVpcCheckAndModify
@@ -16466,9 +16823,9 @@ FtlVpcCheckAndModify:
 	.type	allocate_new_data_superblock, %function
 allocate_new_data_superblock:
 .LFB299:
-	.loc 2 2631 0
+	.loc 2 2682 0
 	.cfi_startproc
-.LVL1700:
+.LVL1729:
 	stp	x29, x30, [sp, -48]!
 	.cfi_def_cfa_offset 48
 	.cfi_offset 29, -48
@@ -16478,93 +16835,93 @@ allocate_new_data_superblock:
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -32
 	.cfi_offset 20, -24
-	.loc 2 2632 0
+	.loc 2 2683 0
 	ldrh	w19, [x0]
-.LVL1701:
-	.loc 2 2631 0
+.LVL1730:
+	.loc 2 2682 0
 	str	x21, [sp, 32]
 	.cfi_offset 21, -16
-	.loc 2 2631 0
+	.loc 2 2682 0
 	mov	x21, x0
-	.loc 2 2633 0
+	.loc 2 2684 0
 	adrp	x0, .LANCHOR5
-.LVL1702:
+.LVL1731:
 	ldrh	w0, [x0, #:lo12:.LANCHOR5]
 	cmp	w0, w19
-	bcs	.L1271
-	.loc 2 2633 0 is_stmt 0 discriminator 1
+	bcs	.L1302
+	.loc 2 2684 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR169
 	adrp	x0, .LC1
-	mov	w2, 2633
+	mov	w2, 2684
 	add	x1, x1, :lo12:.LANCHOR169
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1703:
-.L1271:
-	.loc 2 2635 0 is_stmt 1
+.LVL1732:
+.L1302:
+	.loc 2 2686 0 is_stmt 1
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1272
-	.loc 2 2636 0
-	adrp	x1, .LANCHOR43
+	beq	.L1303
+	.loc 2 2687 0
+	adrp	x1, .LANCHOR42
 	ubfiz	x0, x19, 1, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR43]
+	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1273
-	.loc 2 2637 0
-	mov	w0, w19
-	bl	INSERT_DATA_LIST
-.LVL1704:
-.L1272:
-	.loc 2 2642 0
-	adrp	x1, .LANCHOR151
-	.loc 2 2641 0
+	cbz	w0, .L1304
+	.loc 2 2688 0
+	mov	w0, w19
+	bl	INSERT_DATA_LIST
+.LVL1733:
+.L1303:
+	.loc 2 2693 0
+	adrp	x1, .LANCHOR150
+	.loc 2 2692 0
 	mov	w0, 1
 	strb	w0, [x21, 8]
-	.loc 2 2642 0
+	.loc 2 2693 0
 	mov	w2, 65535
-	ldrh	w0, [x1, #:lo12:.LANCHOR151]
+	ldrh	w0, [x1, #:lo12:.LANCHOR150]
 	mov	x20, x1
 	cmp	w0, w2
-	beq	.L1274
-	.loc 2 2643 0
+	beq	.L1305
+	.loc 2 2694 0
 	cmp	w19, w0
-	bne	.L1275
-	.loc 2 2643 0 is_stmt 0 discriminator 1
-	adrp	x2, .LANCHOR43
+	bne	.L1306
+	.loc 2 2694 0 is_stmt 0 discriminator 1
+	adrp	x2, .LANCHOR42
 	ubfiz	x1, x0, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR43]
+	ldr	x2, [x2, #:lo12:.LANCHOR42]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1276
-.L1275:
-	.loc 2 2644 0 is_stmt 1
+	cbz	w1, .L1307
+.L1306:
+	.loc 2 2695 0 is_stmt 1
 	bl	update_vpc_list
-.LVL1705:
-.L1276:
-	.loc 2 2645 0
+.LVL1734:
+.L1307:
+	.loc 2 2696 0
 	mov	w0, -1
-	strh	w0, [x20, #:lo12:.LANCHOR151]
-.L1274:
-	.loc 2 2647 0
+	strh	w0, [x20, #:lo12:.LANCHOR150]
+.L1305:
+	.loc 2 2698 0
 	mov	x0, x21
 	bl	allocate_data_superblock
-.LVL1706:
-	.loc 2 2648 0
+.LVL1735:
+	.loc 2 2699 0
 	bl	l2p_flush
-.LVL1707:
-	.loc 2 2649 0
+.LVL1736:
+	.loc 2 2700 0
 	mov	w0, 0
 	bl	FtlEctTblFlush
-.LVL1708:
-	.loc 2 2650 0
+.LVL1737:
+	.loc 2 2701 0
 	bl	FtlVpcTblFlush
-.LVL1709:
-	.loc 2 2652 0
+.LVL1738:
+	.loc 2 2703 0
 	ldr	x21, [sp, 32]
-.LVL1710:
+.LVL1739:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-.LVL1711:
+.LVL1740:
 	ldp	x29, x30, [sp], 48
 	.cfi_remember_state
 	.cfi_restore 30
@@ -16574,14 +16931,14 @@ allocate_new_data_superblock:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1712:
-.L1273:
+.LVL1741:
+.L1304:
 	.cfi_restore_state
-	.loc 2 2639 0
+	.loc 2 2690 0
 	mov	w0, w19
 	bl	INSERT_FREE_LIST
-.LVL1713:
-	b	.L1272
+.LVL1742:
+	b	.L1303
 	.cfi_endproc
 .LFE299:
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
@@ -16593,14 +16950,14 @@ FtlProgPages:
 .LFB215:
 	.loc 3 904 0
 	.cfi_startproc
-.LVL1714:
+.LVL1743:
 	stp	x29, x30, [sp, -96]!
 	.cfi_def_cfa_offset 96
 	.cfi_offset 29, -96
 	.cfi_offset 30, -88
 	.loc 3 911 0
 	mov	w2, 0
-.LVL1715:
+.LVL1744:
 	.loc 3 904 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
@@ -16624,41 +16981,41 @@ FtlProgPages:
 	adrp	x24, .LANCHOR19
 	.loc 3 911 0
 	ldrb	w3, [x3, 9]
-.LVL1716:
+.LVL1745:
 	.loc 3 926 0
-	adrp	x23, .LANCHOR83
+	adrp	x23, .LANCHOR81
 	add	x21, x0, x21
 	.loc 3 918 0
 	add	x24, x24, :lo12:.LANCHOR19
 	.loc 3 926 0
-	add	x23, x23, :lo12:.LANCHOR83
+	add	x23, x23, :lo12:.LANCHOR81
 	.loc 3 911 0
 	bl	FlashProgPages
-.LVL1717:
-.L1282:
+.LVL1746:
+.L1313:
 	.loc 3 913 0 discriminator 1
 	cmp	x20, x21
-	beq	.L1289
+	beq	.L1320
 	sub	x22, x20, #4
 	.loc 3 917 0
-	adrp	x25, .LANCHOR43
-	b	.L1290
-.L1285:
+	adrp	x25, .LANCHOR42
+	b	.L1321
+.L1316:
 	.loc 3 915 0
 	ldr	w0, [x20]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL1718:
+.LVL1747:
 	.loc 3 916 0
 	ldrh	w1, [x19]
 	cmp	w1, w0, uxth
-	bne	.L1283
+	bne	.L1314
 	.loc 3 917 0
-	ldr	x2, [x25, #:lo12:.LANCHOR43]
+	ldr	x2, [x25, #:lo12:.LANCHOR42]
 	ubfiz	x1, x1, 1, 16
 	ldrh	w3, [x19, 4]
 	ldrh	w0, [x2, x1]
-.LVL1719:
+.LVL1748:
 	sub	w0, w0, w3
 	strh	w0, [x2, x1]
 	.loc 3 919 0
@@ -16668,15 +17025,15 @@ FtlProgPages:
 	strh	w0, [x19, 2]
 	.loc 3 920 0
 	strh	wzr, [x19, 4]
-.L1283:
+.L1314:
 	.loc 3 922 0
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1284
+	cbnz	w0, .L1315
 	.loc 3 923 0
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.LVL1720:
-.L1284:
+.LVL1749:
+.L1315:
 	.loc 3 926 0
 	ldr	w0, [x23, 96]
 	add	w0, w0, 1
@@ -16685,11 +17042,11 @@ FtlProgPages:
 	ldr	w0, [x20]
 	lsr	w0, w0, 10
 	bl	FtlGcMarkBadPhyBlk
-.LVL1721:
+.LVL1750:
 	.loc 3 928 0
 	mov	x0, x19
 	bl	get_new_active_ppa
-.LVL1722:
+.LVL1751:
 	.loc 3 929 0
 	str	w0, [x20]
 	.loc 3 930 0
@@ -16701,18 +17058,18 @@ FtlProgPages:
 	ldrb	w3, [x19, 9]
 	mov	x0, x22
 	bl	FlashProgPages
-.LVL1723:
-.L1290:
+.LVL1752:
+.L1321:
 	.loc 3 914 0
 	ldr	w0, [x20, -4]
 	cmn	w0, #1
-	beq	.L1285
+	beq	.L1316
 	.loc 3 933 0
 	adrp	x0, .LANCHOR3
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1286
+	bcc	.L1317
 	.loc 3 933 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR170
 	adrp	x0, .LC1
@@ -16720,8 +17077,8 @@ FtlProgPages:
 	add	x1, x1, :lo12:.LANCHOR170
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1724:
-.L1286:
+.LVL1753:
+.L1317:
 	.loc 3 934 0 is_stmt 1
 	add	x1, x29, 96
 	ldr	w0, [x22, 4]
@@ -16732,49 +17089,49 @@ FtlProgPages:
 	.loc 3 935 0
 	ldr	w0, [x22, 24]
 	bl	log2phys
-.LVL1725:
+.LVL1754:
 	.loc 3 937 0
 	ldr	x0, [x22, 16]
 	ldr	w3, [x0, 12]
-.LVL1726:
+.LVL1755:
 	.loc 3 939 0
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
-.LVL1727:
+.LVL1756:
 	and	w1, w0, 65535
 	mov	w22, w1
-.LVL1728:
+.LVL1757:
 	.loc 3 940 0
 	cmn	w3, #1
-	beq	.L1287
+	beq	.L1318
 	.loc 3 942 0
-	adrp	x2, .LANCHOR43
+	adrp	x2, .LANCHOR42
 	ubfiz	x0, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR43]
+	ldr	x2, [x2, #:lo12:.LANCHOR42]
 	ldrh	w0, [x2, x0]
-	cbnz	w0, .L1288
+	cbnz	w0, .L1319
 	.loc 3 943 0
-	adrp	x0, .LC103
+	adrp	x0, .LC106
 	mov	w2, 0
-	add	x0, x0, :lo12:.LC103
+	add	x0, x0, :lo12:.LC106
 	bl	printf
-.LVL1729:
-.L1288:
+.LVL1758:
+.L1319:
 	.loc 3 944 0
 	mov	w0, w22
 	bl	decrement_vpc_count
-.LVL1730:
-.L1287:
+.LVL1759:
+.L1318:
 	add	x20, x20, 32
-	b	.L1282
-.LVL1731:
-.L1289:
+	b	.L1313
+.LVL1760:
+.L1320:
 	.loc 3 948 0
 	adrp	x0, .LANCHOR3
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1281
+	bcc	.L1312
 	.loc 3 948 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR170
 	adrp	x0, .LC1
@@ -16782,11 +17139,11 @@ FtlProgPages:
 	add	x1, x1, :lo12:.LANCHOR170
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1732:
-.L1281:
+.LVL1761:
+.L1312:
 	.loc 3 949 0 is_stmt 1
 	ldp	x19, x20, [sp, 16]
-.LVL1733:
+.LVL1762:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
@@ -16805,297 +17162,6 @@ FtlProgPages:
 	.cfi_endproc
 .LFE215:
 	.size	FtlProgPages, .-FtlProgPages
-	.section	.text.FtlCacheWriteBack,"ax",@progbits
-	.align	2
-	.global	FtlCacheWriteBack
-	.type	FtlCacheWriteBack, %function
-FtlCacheWriteBack:
-.LFB216:
-	.loc 3 952 0
-	.cfi_startproc
-	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	str	x19, [sp, 16]
-	.cfi_offset 19, -16
-	.loc 3 953 0
-	adrp	x19, .LANCHOR150
-	ldr	x0, [x19, #:lo12:.LANCHOR150]
-	cbz	x0, .L1297
-	.loc 3 954 0
-	adrp	x1, .LANCHOR171
-	mov	w2, 0
-	ldr	x3, [x1, #:lo12:.LANCHOR171]
-	mov	w1, 1
-	bl	FtlProgPages
-.LVL1734:
-	.loc 3 955 0
-	str	xzr, [x19, #:lo12:.LANCHOR150]
-.L1297:
-	.loc 3 958 0
-	mov	w0, 0
-	ldr	x19, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_def_cfa 31, 0
-	ret
-	.cfi_endproc
-.LFE216:
-	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
-	.section	.text.FtlSysFlush,"ax",@progbits
-	.align	2
-	.global	FtlSysFlush
-	.type	FtlSysFlush, %function
-FtlSysFlush:
-.LFB212:
-	.loc 3 797 0
-	.cfi_startproc
-	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 3 798 0
-	bl	FtlCacheWriteBack
-.LVL1735:
-	.loc 3 799 0
-	bl	l2p_flush
-.LVL1736:
-	.loc 3 800 0
-	mov	w0, 1
-	bl	FtlEctTblFlush
-.LVL1737:
-	.loc 3 801 0
-	bl	FtlVpcTblFlush
-.LVL1738:
-	.loc 3 803 0
-	mov	w0, 0
-	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
-	ret
-	.cfi_endproc
-.LFE212:
-	.size	FtlSysFlush, .-FtlSysFlush
-	.section	.text.sftl_deinit,"ax",@progbits
-	.align	2
-	.global	sftl_deinit
-	.type	sftl_deinit, %function
-sftl_deinit:
-.LFB213:
-	.loc 3 806 0
-	.cfi_startproc
-	.loc 3 807 0
-	adrp	x0, .LANCHOR88
-	ldr	w0, [x0, #:lo12:.LANCHOR88]
-	cmp	w0, 1
-	bne	.L1307
-	.loc 3 806 0
-	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 3 808 0
-	bl	FtlSysFlush
-.LVL1739:
-	.loc 3 810 0
-	mov	w0, 0
-	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
-	ret
-.L1307:
-	mov	w0, 0
-	ret
-	.cfi_endproc
-.LFE213:
-	.size	sftl_deinit, .-sftl_deinit
-	.section	.text.FtlDiscard,"ax",@progbits
-	.align	2
-	.global	FtlDiscard
-	.type	FtlDiscard, %function
-FtlDiscard:
-.LFB218:
-	.loc 3 1157 0
-	.cfi_startproc
-.LVL1740:
-	stp	x29, x30, [sp, -80]!
-	.cfi_def_cfa_offset 80
-	.cfi_offset 29, -80
-	.cfi_offset 30, -72
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -64
-	.cfi_offset 20, -56
-	mov	w20, w0
-	mov	w19, w1
-	.loc 3 1164 0
-	add	w1, w0, w1
-.LVL1741:
-	adrp	x0, .LANCHOR34
-.LVL1742:
-	.loc 3 1157 0
-	stp	x21, x22, [sp, 32]
-	str	x23, [sp, 48]
-	.cfi_offset 21, -48
-	.cfi_offset 22, -40
-	.cfi_offset 23, -32
-	.loc 3 1164 0
-	ldr	w0, [x0, #:lo12:.LANCHOR34]
-	cmp	w1, w0
-	bhi	.L1318
-	.loc 3 1167 0
-	cmp	w19, 31
-	bhi	.L1312
-.LVL1743:
-.L1326:
-	.loc 3 1200 0
-	mov	w0, 0
-.L1310:
-	.loc 3 1201 0
-	ldp	x19, x20, [sp, 16]
-.LVL1744:
-	ldp	x21, x22, [sp, 32]
-	ldr	x23, [sp, 48]
-	ldp	x29, x30, [sp], 80
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 23
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
-	ret
-.LVL1745:
-.L1312:
-	.cfi_restore_state
-	.loc 3 1172 0
-	adrp	x22, .LANCHOR12
-	.loc 3 1170 0
-	bl	FtlCacheWriteBack
-.LVL1746:
-	.loc 3 1172 0
-	ldrh	w1, [x22, #:lo12:.LANCHOR12]
-	udiv	w21, w20, w1
-.LVL1747:
-	.loc 3 1173 0
-	msub	w20, w1, w21, w20
-.LVL1748:
-	.loc 3 1174 0
-	ands	w20, w20, 65535
-	beq	.L1313
-.LVL1749:
-	.loc 3 1175 0
-	sub	w1, w1, w20
-.LVL1750:
-	.loc 3 1176 0
-	add	w21, w21, 1
-.LVL1751:
-	.loc 3 1175 0
-	cmp	w1, w19
-	csel	w1, w1, w19, ls
-	.loc 3 1177 0
-	sub	w19, w19, w1, uxth
-.LVL1752:
-.L1313:
-	.loc 3 1184 0
-	adrp	x20, .LANCHOR172
-.LVL1753:
-	.loc 3 1185 0
-	adrp	x23, .LANCHOR64
-	.loc 3 1184 0
-	add	x20, x20, :lo12:.LANCHOR172
-	.loc 3 1185 0
-	add	x23, x23, :lo12:.LANCHOR64
-	.loc 3 1180 0
-	mov	w0, -1
-	str	w0, [x29, 76]
-.LVL1754:
-.L1314:
-	.loc 3 1181 0
-	ldrh	w0, [x22, #:lo12:.LANCHOR12]
-	cmp	w19, w0
-	bcs	.L1316
-	.loc 3 1194 0
-	adrp	x0, .LANCHOR172
-	ldr	w1, [x0, #:lo12:.LANCHOR172]
-	cmp	w1, 32
-	bls	.L1326
-	.loc 3 1196 0
-	str	wzr, [x0, #:lo12:.LANCHOR172]
-	.loc 3 1197 0
-	bl	l2p_flush
-.LVL1755:
-	.loc 3 1198 0
-	bl	FtlVpcTblFlush
-.LVL1756:
-	b	.L1326
-.L1316:
-	.loc 3 1182 0
-	mov	w2, 0
-	add	x1, x29, 72
-	mov	w0, w21
-	bl	log2phys
-.LVL1757:
-	.loc 3 1183 0
-	ldr	w0, [x29, 72]
-	cmn	w0, #1
-	beq	.L1315
-	.loc 3 1184 0
-	ldr	w0, [x20]
-	.loc 3 1186 0
-	mov	w2, 1
-	add	x1, x29, 76
-	.loc 3 1184 0
-	add	w0, w0, 1
-	str	w0, [x20]
-	.loc 3 1185 0
-	ldr	w0, [x23]
-	add	w0, w0, 1
-	str	w0, [x23]
-	.loc 3 1186 0
-	mov	w0, w21
-	bl	log2phys
-.LVL1758:
-	.loc 3 1187 0
-	ldr	w0, [x29, 72]
-	lsr	w0, w0, 10
-	bl	P2V_block_in_plane
-.LVL1759:
-	.loc 3 1188 0
-	bl	decrement_vpc_count
-.LVL1760:
-.L1315:
-	.loc 3 1191 0
-	ldrh	w0, [x22, #:lo12:.LANCHOR12]
-	.loc 3 1190 0
-	add	w21, w21, 1
-.LVL1761:
-	.loc 3 1191 0
-	sub	w19, w19, w0
-.LVL1762:
-	b	.L1314
-.LVL1763:
-.L1318:
-	.loc 3 1165 0
-	mov	w0, -1
-	b	.L1310
-	.cfi_endproc
-.LFE218:
-	.size	FtlDiscard, .-FtlDiscard
 	.section	.text.FtlGcFreeTempBlock,"ax",@progbits
 	.align	2
 	.global	FtlGcFreeTempBlock
@@ -17104,7 +17170,7 @@ FtlGcFreeTempBlock:
 .LFB308:
 	.loc 5 112 0
 	.cfi_startproc
-.LVL1764:
+.LVL1763:
 	stp	x29, x30, [sp, -112]!
 	.cfi_def_cfa_offset 112
 	.cfi_offset 29, -112
@@ -17141,21 +17207,21 @@ FtlGcFreeTempBlock:
 	.cfi_offset 27, -32
 	.loc 5 115 0
 	ldrh	w1, [x21, #:lo12:.LANCHOR19]
-.LVL1765:
+.LVL1764:
 	.loc 5 119 0
 	bne	.L1328
-.LVL1766:
+.LVL1765:
 .L1338:
 	.loc 5 152 0
-	adrp	x0, .LANCHOR153
+	adrp	x0, .LANCHOR152
 	.loc 5 153 0
-	ldrh	w1, [x19, #:lo12:.LANCHOR53]
-	add	x22, x19, :lo12:.LANCHOR53
+	ldrh	w2, [x19, #:lo12:.LANCHOR53]
+	mov	w1, 65535
 	.loc 5 152 0
-	str	wzr, [x0, #:lo12:.LANCHOR153]
+	str	wzr, [x0, #:lo12:.LANCHOR152]
 	.loc 5 153 0
-	mov	w0, 65535
-	cmp	w1, w0
+	cmp	w2, w1
+	add	x0, x19, :lo12:.LANCHOR53
 	bne	.L1351
 .L1354:
 	.loc 5 198 0
@@ -17182,36 +17248,36 @@ FtlGcFreeTempBlock:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1767:
+.LVL1766:
 .L1328:
 	.cfi_restore_state
 	.loc 5 121 0
 	cbz	w0, .L1331
-.LVL1768:
+.LVL1767:
 	.loc 5 123 0
-	adrp	x0, .LANCHOR157
-.LVL1769:
-	ldrh	w3, [x0, #:lo12:.LANCHOR157]
+	adrp	x0, .LANCHOR156
+.LVL1768:
+	ldrh	w3, [x0, #:lo12:.LANCHOR156]
 	cmp	w3, w2
 	beq	.L1332
 .L1333:
 	.loc 5 122 0
 	mov	w1, 2
-.LVL1770:
+.LVL1769:
 .L1331:
 	.loc 5 131 0
 	add	x0, x19, :lo12:.LANCHOR53
 	bl	FtlGcScanTempBlk
-.LVL1771:
+.LVL1770:
 	str	w0, [x29, 108]
 	.loc 5 132 0
 	cmn	w0, #1
 	beq	.L1334
 	.loc 5 135 0
-	adrp	x0, .LANCHOR40
+	adrp	x0, .LANCHOR43
 	ubfiz	x20, x20, 1, 16
-.LVL1772:
-	ldr	x1, [x0, #:lo12:.LANCHOR40]
+.LVL1771:
+	ldr	x1, [x0, #:lo12:.LANCHOR43]
 	ldrh	w0, [x1, x20]
 	cmp	w0, 4
 	bls	.L1335
@@ -17221,16 +17287,16 @@ FtlGcFreeTempBlock:
 	.loc 5 137 0
 	mov	w0, 1
 	bl	FtlEctTblFlush
-.LVL1773:
+.LVL1772:
 .L1335:
 	.loc 5 139 0
-	adrp	x0, .LANCHOR153
+	adrp	x0, .LANCHOR152
 	mov	x19, x0
-	ldr	w1, [x0, #:lo12:.LANCHOR153]
+	ldr	w1, [x0, #:lo12:.LANCHOR152]
 	cbnz	w1, .L1336
 	.loc 5 140 0
-	adrp	x0, .LANCHOR83
-	add	x0, x0, :lo12:.LANCHOR83
+	adrp	x0, .LANCHOR81
+	add	x0, x0, :lo12:.LANCHOR81
 	ldr	w1, [x0, 96]
 	add	w1, w1, 1
 	str	w1, [x0, 96]
@@ -17238,154 +17304,151 @@ FtlGcFreeTempBlock:
 	ldr	w0, [x29, 108]
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.LVL1774:
+.LVL1773:
 	.loc 5 142 0
 	bl	FtlBbmTblFlush
-.LVL1775:
+.LVL1774:
 .L1336:
 	.loc 5 144 0
-	str	wzr, [x19, #:lo12:.LANCHOR153]
+	str	wzr, [x19, #:lo12:.LANCHOR152]
 .L1347:
 	.loc 5 149 0
 	mov	w0, 1
 	b	.L1327
-.LVL1776:
+.LVL1775:
 .L1332:
 	.loc 5 124 0
-	strh	wzr, [x0, #:lo12:.LANCHOR157]
+	strh	wzr, [x0, #:lo12:.LANCHOR156]
 	.loc 5 125 0
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 17
 	bhi	.L1333
 	b	.L1331
-.LVL1777:
+.LVL1776:
 .L1334:
 	.loc 5 148 0
-	adrp	x0, .LANCHOR157
-	ldrh	w1, [x0, #:lo12:.LANCHOR157]
+	adrp	x0, .LANCHOR156
+	ldrh	w1, [x0, #:lo12:.LANCHOR156]
 	mov	w0, 65535
 	cmp	w1, w0
 	bne	.L1347
 	b	.L1338
-.LVL1778:
+.LVL1777:
 .L1351:
-	.loc 5 160 0
-	bl	FtlCacheWriteBack
-.LVL1779:
 	.loc 5 162 0
-	adrp	x20, .LANCHOR99
-	ldrb	w0, [x22, 7]
+	ldrb	w0, [x0, 7]
+	adrp	x20, .LANCHOR97
 	ldrh	w2, [x21, #:lo12:.LANCHOR19]
-	ldrh	w1, [x20, #:lo12:.LANCHOR99]
+	ldrh	w1, [x20, #:lo12:.LANCHOR97]
 	mul	w0, w0, w2
 	cmp	w1, w0
 	beq	.L1339
 	.loc 5 162 0 is_stmt 0 discriminator 1
-	adrp	x1, .LANCHOR173
+	adrp	x1, .LANCHOR171
 	adrp	x0, .LC1
 	mov	w2, 162
-	add	x1, x1, :lo12:.LANCHOR173
+	add	x1, x1, :lo12:.LANCHOR171
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1780:
+.LVL1778:
 .L1339:
 	.loc 5 163 0 is_stmt 1
 	add	x0, x19, :lo12:.LANCHOR53
-	adrp	x23, .LANCHOR43
+	adrp	x23, .LANCHOR42
 	ldrh	w3, [x21, #:lo12:.LANCHOR19]
 	.loc 5 168 0
-	adrp	x25, .LANCHOR62
+	adrp	x25, .LANCHOR61
 	.loc 5 163 0
 	ldrh	w2, [x19, #:lo12:.LANCHOR53]
 	.loc 5 168 0
-	adrp	x26, .LANCHOR173
+	adrp	x26, .LANCHOR171
 	.loc 5 163 0
 	ldrb	w0, [x0, 7]
 	.loc 5 168 0
-	add	x25, x25, :lo12:.LANCHOR62
+	add	x25, x25, :lo12:.LANCHOR61
 	.loc 5 163 0
-	ldr	x1, [x23, #:lo12:.LANCHOR43]
+	ldr	x1, [x23, #:lo12:.LANCHOR42]
 	.loc 5 168 0
-	add	x26, x26, :lo12:.LANCHOR173
+	add	x26, x26, :lo12:.LANCHOR171
 	.loc 5 165 0
 	mov	w21, 0
 	.loc 5 163 0
 	mul	w0, w0, w3
 	strh	w0, [x1, x2, lsl 1]
 	.loc 5 164 0
-	adrp	x1, .LANCHOR68
-	ldrh	w0, [x20, #:lo12:.LANCHOR99]
-	ldr	w2, [x1, #:lo12:.LANCHOR68]
+	adrp	x1, .LANCHOR67
+	ldrh	w0, [x20, #:lo12:.LANCHOR97]
+	ldr	w2, [x1, #:lo12:.LANCHOR67]
 	add	w0, w0, w2
-	str	w0, [x1, #:lo12:.LANCHOR68]
-.LVL1781:
+	str	w0, [x1, #:lo12:.LANCHOR67]
+.LVL1779:
 .L1340:
 	.loc 5 165 0 discriminator 1
-	ldrh	w0, [x20, #:lo12:.LANCHOR99]
+	ldrh	w0, [x20, #:lo12:.LANCHOR97]
 	cmp	w0, w21
 	bhi	.L1344
 	.loc 5 181 0
 	mov	w0, -1
 	bl	decrement_vpc_count
-.LVL1782:
+.LVL1780:
 	.loc 5 182 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR53]
-	ldr	x2, [x23, #:lo12:.LANCHOR43]
+	ldr	x2, [x23, #:lo12:.LANCHOR42]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
 	cbz	w1, .L1345
 	.loc 5 183 0
 	bl	INSERT_DATA_LIST
-.LVL1783:
+.LVL1781:
 .L1346:
 	.loc 5 188 0
-	adrp	x0, .LANCHOR97
+	adrp	x0, .LANCHOR95
 	.loc 5 186 0
 	mov	w21, -1
-.LVL1784:
+.LVL1782:
 	.loc 5 187 0
-	strh	wzr, [x20, #:lo12:.LANCHOR99]
+	strh	wzr, [x20, #:lo12:.LANCHOR97]
 	.loc 5 186 0
 	strh	w21, [x19, #:lo12:.LANCHOR53]
 	.loc 5 188 0
-	strh	wzr, [x0, #:lo12:.LANCHOR97]
+	strh	wzr, [x0, #:lo12:.LANCHOR95]
 	.loc 5 189 0
 	bl	l2p_flush
-.LVL1785:
+.LVL1783:
 	.loc 5 190 0
 	bl	FtlVpcTblFlush
-.LVL1786:
+.LVL1784:
 	.loc 5 191 0
 	adrp	x0, .LANCHOR48
 	ldrh	w1, [x0, #:lo12:.LANCHOR48]
-	adrp	x0, .LANCHOR80
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR78
+	ldrh	w0, [x0, #:lo12:.LANCHOR78]
 	add	w0, w0, w0, lsl 1
 	cmp	w1, w0, lsr 2
 	ble	.L1354
 	.loc 5 192 0
-	adrp	x0, .LANCHOR82
+	adrp	x0, .LANCHOR80
 	.loc 5 193 0
 	mov	w1, 20
 	.loc 5 192 0
-	strh	w21, [x0, #:lo12:.LANCHOR82]
+	strh	w21, [x0, #:lo12:.LANCHOR80]
 	.loc 5 193 0
-	adrp	x0, .LANCHOR84
-	strh	w1, [x0, #:lo12:.LANCHOR84]
+	adrp	x0, .LANCHOR82
+	strh	w1, [x0, #:lo12:.LANCHOR82]
 	b	.L1354
-.LVL1787:
+.LVL1785:
 .L1344:
 	.loc 5 166 0
-	adrp	x0, .LANCHOR100
+	adrp	x0, .LANCHOR98
 	mov	w24, 12
-	ldr	x27, [x0, #:lo12:.LANCHOR100]
+	ldr	x27, [x0, #:lo12:.LANCHOR98]
 	umull	x24, w21, w24
 	.loc 5 168 0
 	ldr	w0, [x25]
 	.loc 5 166 0
 	add	x22, x27, x24
-.LVL1788:
+.LVL1786:
 	.loc 5 168 0
 	ldr	w1, [x22, 8]
 	cmp	w1, w0
@@ -17396,14 +17459,14 @@ FtlGcFreeTempBlock:
 	mov	x1, x26
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1789:
+.LVL1787:
 .L1341:
 	.loc 5 169 0 is_stmt 1
 	ldr	w0, [x22, 8]
 	add	x1, x29, 108
 	mov	w2, 0
 	bl	log2phys
-.LVL1790:
+.LVL1788:
 	.loc 5 170 0
 	ldr	w0, [x27, x24]
 	ldr	w1, [x29, 108]
@@ -17412,29 +17475,29 @@ FtlGcFreeTempBlock:
 	.loc 5 171 0
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL1791:
+.LVL1789:
 	mov	w24, w0
-.LVL1792:
+.LVL1790:
 	.loc 5 172 0
 	ldr	w0, [x22, 8]
-.LVL1793:
+.LVL1791:
 	mov	w2, 1
 	add	x1, x22, 4
 	bl	log2phys
-.LVL1794:
+.LVL1792:
 	.loc 5 173 0
 	mov	w0, w24
-.LVL1795:
+.LVL1793:
 .L1353:
 	.loc 5 177 0
 	bl	decrement_vpc_count
-.LVL1796:
+.LVL1794:
 .L1343:
 	.loc 5 165 0 discriminator 2
 	add	w21, w21, 1
-.LVL1797:
+.LVL1795:
 	and	w21, w21, 65535
-.LVL1798:
+.LVL1796:
 	b	.L1340
 .L1342:
 	.loc 5 175 0
@@ -17444,11 +17507,11 @@ FtlGcFreeTempBlock:
 	.loc 5 177 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR53]
 	b	.L1353
-.LVL1799:
+.LVL1797:
 .L1345:
 	.loc 5 185 0
 	bl	INSERT_FREE_LIST
-.LVL1800:
+.LVL1798:
 	b	.L1346
 	.cfi_endproc
 .LFE308:
@@ -17477,29 +17540,29 @@ FtlGcPageRecovery:
 	ldrh	w1, [x20, #:lo12:.LANCHOR19]
 	mov	x0, x19
 	bl	FtlGcScanTempBlk
-.LVL1801:
+.LVL1799:
 	.loc 5 291 0
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR19]
 	cmp	w1, w0
 	bcc	.L1355
-.LBB286:
-.LBB287:
+.LBB321:
+.LBB322:
 	.loc 5 293 0
 	adrp	x0, .LANCHOR144
 	add	x0, x0, :lo12:.LANCHOR144
 	bl	FtlMapBlkWriteDump_data
-.LVL1802:
+.LVL1800:
 	.loc 5 294 0
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
-.LVL1803:
+.LVL1801:
 	.loc 5 295 0
-	adrp	x0, .LANCHOR153
-	str	wzr, [x0, #:lo12:.LANCHOR153]
+	adrp	x0, .LANCHOR152
+	str	wzr, [x0, #:lo12:.LANCHOR152]
 .L1355:
-.LBE287:
-.LBE286:
+.LBE322:
+.LBE321:
 	.loc 5 297 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -17518,52 +17581,52 @@ FtlGcPageRecovery:
 	.type	FtlPowerLostRecovery, %function
 FtlPowerLostRecovery:
 .LFB283:
-	.loc 2 2032 0
+	.loc 2 2081 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
 	.cfi_offset 30, -24
-	.loc 2 2033 0
-	adrp	x0, .LANCHOR163
-	.loc 2 2032 0
+	.loc 2 2082 0
+	adrp	x0, .LANCHOR162
+	.loc 2 2081 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	str	x19, [sp, 16]
 	.cfi_offset 19, -16
-	.loc 2 2035 0
+	.loc 2 2084 0
 	adrp	x19, .LANCHOR51
 	add	x19, x19, :lo12:.LANCHOR51
-	.loc 2 2033 0
-	str	wzr, [x0, #:lo12:.LANCHOR163]
-	.loc 2 2035 0
+	.loc 2 2082 0
+	str	wzr, [x0, #:lo12:.LANCHOR162]
+	.loc 2 2084 0
 	mov	x0, x19
 	bl	FtlRecoverySuperblock
-.LVL1804:
-	.loc 2 2036 0
+.LVL1802:
+	.loc 2 2085 0
 	mov	x0, x19
-	.loc 2 2037 0
+	.loc 2 2086 0
 	adrp	x19, .LANCHOR52
-	.loc 2 2036 0
+	.loc 2 2085 0
 	bl	FtlSlcSuperblockCheck
-.LVL1805:
-	.loc 2 2037 0
+.LVL1803:
+	.loc 2 2086 0
 	add	x19, x19, :lo12:.LANCHOR52
 	mov	x0, x19
 	bl	FtlRecoverySuperblock
-.LVL1806:
-	.loc 2 2038 0
+.LVL1804:
+	.loc 2 2087 0
 	mov	x0, x19
 	bl	FtlSlcSuperblockCheck
-.LVL1807:
-	.loc 2 2039 0
+.LVL1805:
+	.loc 2 2088 0
 	bl	FtlGcPageRecovery
-.LVL1808:
-	.loc 2 2040 0
+.LVL1806:
+	.loc 2 2089 0
 	mov	w0, -1
 	bl	decrement_vpc_count
-.LVL1809:
-	.loc 2 2042 0
+.LVL1807:
+	.loc 2 2091 0
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -17597,18 +17660,18 @@ Ftl_gc_temp_data_write_back:
 	.cfi_offset 19, -16
 	.cfi_offset 20, -8
 	.loc 5 320 0
-	adrp	x19, .LANCHOR91
+	adrp	x19, .LANCHOR89
 	adrp	x20, .LANCHOR121
-	ldr	w1, [x19, #:lo12:.LANCHOR91]
+	ldr	w1, [x19, #:lo12:.LANCHOR89]
 	.loc 5 321 0
-	add	x19, x19, :lo12:.LANCHOR91
+	add	x19, x19, :lo12:.LANCHOR89
 	.loc 5 320 0
 	ldr	x0, [x20, #:lo12:.LANCHOR121]
 	bl	FlashProgPages
-.LVL1810:
+.LVL1808:
 	.loc 5 321 0
 	mov	w11, 0
-.LVL1811:
+.LVL1809:
 .L1361:
 	.loc 5 321 0 is_stmt 0 discriminator 1
 	ldr	w1, [x19]
@@ -17617,7 +17680,7 @@ Ftl_gc_temp_data_write_back:
 	.loc 5 335 0 is_stmt 1
 	ldr	x0, [x20, #:lo12:.LANCHOR121]
 	bl	FtlGcBufFree
-.LVL1812:
+.LVL1810:
 	.loc 5 336 0
 	str	wzr, [x19]
 	.loc 5 337 0
@@ -17627,9 +17690,9 @@ Ftl_gc_temp_data_write_back:
 	.loc 5 338 0
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
-.LVL1813:
+.LVL1811:
 	b	.L1367
-.LVL1814:
+.LVL1812:
 .L1364:
 	.loc 5 322 0
 	ldr	x2, [x20, #:lo12:.LANCHOR121]
@@ -17640,15 +17703,15 @@ Ftl_gc_temp_data_write_back:
 	bne	.L1362
 	.loc 5 323 0
 	adrp	x0, .LANCHOR53
-	adrp	x3, .LANCHOR43
+	adrp	x3, .LANCHOR42
 	ldrh	w4, [x0, #:lo12:.LANCHOR53]
-	ldr	x3, [x3, #:lo12:.LANCHOR43]
+	ldr	x3, [x3, #:lo12:.LANCHOR42]
 	strh	wzr, [x3, x4, lsl 1]
 	.loc 5 324 0
 	strh	w2, [x0, #:lo12:.LANCHOR53]
 	.loc 5 325 0
-	adrp	x0, .LANCHOR83
-	add	x0, x0, :lo12:.LANCHOR83
+	adrp	x0, .LANCHOR81
+	add	x0, x0, :lo12:.LANCHOR81
 	ldr	w2, [x0, 96]
 	add	w2, w2, 1
 	str	w2, [x0, 96]
@@ -17656,13 +17719,13 @@ Ftl_gc_temp_data_write_back:
 	ldr	w0, [x1, 4]
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.LVL1815:
+.LVL1813:
 	.loc 5 327 0
 	bl	FtlBbmTblFlush
-.LVL1816:
+.LVL1814:
 	.loc 5 328 0
 	bl	FtlGcPageVarInit
-.LVL1817:
+.LVL1815:
 .L1367:
 	.loc 5 339 0
 	mov	w0, 1
@@ -17677,25 +17740,25 @@ Ftl_gc_temp_data_write_back:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1818:
+.LVL1816:
 .L1362:
 	.cfi_restore_state
 	.loc 5 331 0 discriminator 2
 	ldr	x0, [x1, 16]
-.LVL1819:
+.LVL1817:
 	.loc 5 332 0 discriminator 2
 	ldr	w1, [x1, 4]
 	ldp	w2, w0, [x0, 8]
-.LVL1820:
+.LVL1818:
 	bl	FtlGcUpdatePage
-.LVL1821:
+.LVL1819:
 	.loc 5 321 0 discriminator 2
 	add	w11, w11, 1
-.LVL1822:
+.LVL1820:
 	and	w11, w11, 65535
-.LVL1823:
+.LVL1821:
 	b	.L1361
-.LVL1824:
+.LVL1822:
 .L1365:
 	.loc 5 341 0
 	mov	w0, 0
@@ -17733,35 +17796,32 @@ Ftl_get_new_temp_ppa:
 	ldrh	w0, [x1, 4]
 	cbnz	w0, .L1370
 .L1369:
-	.loc 5 302 0 is_stmt 1
-	bl	FtlCacheWriteBack
-.LVL1825:
-	.loc 5 303 0
+	.loc 5 303 0 is_stmt 1
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
-.LVL1826:
+.LVL1823:
 	.loc 5 304 0
 	add	x0, x19, :lo12:.LANCHOR53
 	strb	wzr, [x0, 8]
 	.loc 5 305 0
 	bl	allocate_data_superblock
-.LVL1827:
+.LVL1824:
 	.loc 5 306 0
+	adrp	x0, .LANCHOR95
+	strh	wzr, [x0, #:lo12:.LANCHOR95]
+	.loc 5 307 0
 	adrp	x0, .LANCHOR97
 	strh	wzr, [x0, #:lo12:.LANCHOR97]
-	.loc 5 307 0
-	adrp	x0, .LANCHOR99
-	strh	wzr, [x0, #:lo12:.LANCHOR99]
 	.loc 5 308 0
 	bl	l2p_flush
-.LVL1828:
+.LVL1825:
 	.loc 5 309 0
 	mov	w0, 0
 	bl	FtlEctTblFlush
-.LVL1829:
+.LVL1826:
 	.loc 5 310 0
 	bl	FtlVpcTblFlush
-.LVL1830:
+.LVL1827:
 .L1370:
 	.loc 5 312 0
 	add	x0, x19, :lo12:.LANCHOR53
@@ -17774,7 +17834,7 @@ Ftl_get_new_temp_ppa:
 	.cfi_def_cfa 31, 0
 	.loc 5 312 0
 	b	get_new_active_ppa
-.LVL1831:
+.LVL1828:
 	.cfi_endproc
 .LFE312:
 	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
@@ -17786,7 +17846,7 @@ rk_ftl_garbage_collect:
 .LFB319:
 	.loc 5 470 0
 	.cfi_startproc
-.LVL1832:
+.LVL1829:
 	stp	x29, x30, [sp, -192]!
 	.cfi_def_cfa_offset 192
 	.cfi_offset 29, -192
@@ -17802,7 +17862,7 @@ rk_ftl_garbage_collect:
 	stp	x19, x20, [sp, 16]
 	.loc 5 478 0
 	ldr	w1, [x22, #:lo12:.LANCHOR117]
-.LVL1833:
+.LVL1830:
 	.loc 5 470 0
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
@@ -17824,36 +17884,36 @@ rk_ftl_garbage_collect:
 	bls	.L1444
 	mov	w24, w0
 	.loc 5 485 0
-	adrp	x0, .LANCHOR157
-.LVL1834:
-	ldrh	w1, [x0, #:lo12:.LANCHOR157]
+	adrp	x0, .LANCHOR156
+.LVL1831:
+	ldrh	w1, [x0, #:lo12:.LANCHOR156]
 	mov	w0, 65535
 	cmp	w1, w0
 	bne	.L1374
 .L1377:
-.LVL1835:
-.LBB291:
-.LBB292:
+.LVL1832:
+.LBB326:
+.LBB327:
 	.loc 5 489 0
-	adrp	x0, .LANCHOR102
+	adrp	x0, .LANCHOR100
 	mov	w3, 65535
-	ldrh	w2, [x0, #:lo12:.LANCHOR102]
+	ldrh	w2, [x0, #:lo12:.LANCHOR100]
 	cmp	w2, w3
 	bne	.L1375
 .L1376:
 	.loc 5 496 0
-	adrp	x2, .LANCHOR86
+	adrp	x2, .LANCHOR84
 	.loc 5 497 0
-	adrp	x19, .LANCHOR82
+	adrp	x19, .LANCHOR80
 	mov	w20, 65535
 	.loc 5 496 0
-	ldr	w1, [x2, #:lo12:.LANCHOR86]
+	ldr	w1, [x2, #:lo12:.LANCHOR84]
 	.loc 5 497 0
-	ldrh	w0, [x19, #:lo12:.LANCHOR82]
+	ldrh	w0, [x19, #:lo12:.LANCHOR80]
 	.loc 5 496 0
 	add	w1, w1, 1
 	add	w1, w1, w24, lsl 7
-	str	w1, [x2, #:lo12:.LANCHOR86]
+	str	w1, [x2, #:lo12:.LANCHOR84]
 	.loc 5 497 0
 	cmp	w0, w20
 	bne	.L1378
@@ -17861,8 +17921,8 @@ rk_ftl_garbage_collect:
 	ldrh	w20, [x3, #:lo12:.LANCHOR53]
 	cmp	w20, w0
 	bne	.L1447
-	adrp	x0, .LANCHOR101
-	ldrh	w21, [x0, #:lo12:.LANCHOR101]
+	adrp	x0, .LANCHOR99
+	ldrh	w21, [x0, #:lo12:.LANCHOR99]
 	cmp	w21, w20
 	bne	.L1378
 	.loc 5 498 0
@@ -17874,64 +17934,64 @@ rk_ftl_garbage_collect:
 	csel	w0, w0, w3, cc
 	cmp	w1, w0
 	bls	.L1450
-.LBB293:
+.LBB328:
 	.loc 5 502 0
-	adrp	x0, .LANCHOR174
+	adrp	x0, .LANCHOR172
 	.loc 5 501 0
-	str	wzr, [x2, #:lo12:.LANCHOR86]
+	str	wzr, [x2, #:lo12:.LANCHOR84]
 	.loc 5 502 0
-	strh	wzr, [x0, #:lo12:.LANCHOR174]
+	strh	wzr, [x0, #:lo12:.LANCHOR172]
 	.loc 5 503 0
 	bl	GetSwlReplaceBlock
-.LVL1836:
+.LVL1833:
 	and	w20, w0, 65535
-.LVL1837:
+.LVL1834:
 	.loc 5 504 0
 	cmp	w20, w21
 	bne	.L1451
 	.loc 5 505 0
-	adrp	x5, .LANCHOR85
+	adrp	x5, .LANCHOR83
 	ldrh	w1, [x23, #:lo12:.LANCHOR48]
-	ldrh	w0, [x5, #:lo12:.LANCHOR85]
-.LVL1838:
+	ldrh	w0, [x5, #:lo12:.LANCHOR83]
+.LVL1835:
 	cmp	w1, w0
 	bcs	.L1381
 	.loc 5 506 0
 	mov	w0, 64
 	bl	List_get_gc_head_node
-.LVL1839:
+.LVL1836:
 	and	w0, w0, 65535
-.LVL1840:
+.LVL1837:
 	.loc 5 507 0
 	cmp	w0, w20
 	beq	.L1383
 	.loc 5 508 0
-	adrp	x1, .LANCHOR43
+	adrp	x1, .LANCHOR42
 	ubfiz	x0, x0, 1, 16
-.LVL1841:
-	ldr	x1, [x1, #:lo12:.LANCHOR43]
+.LVL1838:
+	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x0]
 	cmp	w0, 7
 	bhi	.L1384
 	.loc 5 509 0
 	mov	w0, 0
 	bl	List_get_gc_head_node
-.LVL1842:
+.LVL1839:
 	and	w21, w0, 65535
-.LVL1843:
+.LVL1840:
 	.loc 5 510 0
 	mov	w0, 128
-	strh	w0, [x5, #:lo12:.LANCHOR85]
+	strh	w0, [x5, #:lo12:.LANCHOR83]
 	.loc 5 520 0
 	cmp	w21, w20
 	bne	.L1380
-.LVL1844:
+.LVL1841:
 .L1383:
 	.loc 5 523 0
 	bl	FtlGcReFreshBadBlk
-.LVL1845:
+.LVL1842:
 .L1378:
-.LBE293:
+.LBE328:
 	.loc 5 527 0
 	cmp	w24, 0
 	mov	w0, 65535
@@ -17951,12 +18011,12 @@ rk_ftl_garbage_collect:
 	bls	.L1388
 	.loc 5 531 0
 	lsr	w21, w21, 5
-.LVL1846:
+.LVL1843:
 .L1387:
 	.loc 5 539 0
-	adrp	x2, .LANCHOR84
+	adrp	x2, .LANCHOR82
 	mov	x3, x2
-	ldrh	w1, [x2, #:lo12:.LANCHOR84]
+	ldrh	w1, [x2, #:lo12:.LANCHOR82]
 	cmp	w1, w0
 	bcs	.L1391
 	.loc 5 540 0
@@ -17965,37 +18025,37 @@ rk_ftl_garbage_collect:
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w1
 	bne	.L1392
-	adrp	x1, .LANCHOR101
-	ldrh	w1, [x1, #:lo12:.LANCHOR101]
+	adrp	x1, .LANCHOR99
+	ldrh	w1, [x1, #:lo12:.LANCHOR99]
 	cmp	w1, w0
 	bne	.L1392
 	.loc 5 542 0
-	adrp	x0, .LANCHOR174
-	ldrh	w0, [x0, #:lo12:.LANCHOR174]
+	adrp	x0, .LANCHOR172
+	ldrh	w0, [x0, #:lo12:.LANCHOR172]
 	cbnz	w0, .L1393
-	adrp	x1, .LANCHOR62
-	adrp	x4, .LANCHOR60
-	ldr	w1, [x1, #:lo12:.LANCHOR62]
-	ldr	w4, [x4, #:lo12:.LANCHOR60]
+	adrp	x1, .LANCHOR61
+	adrp	x4, .LANCHOR59
+	ldr	w1, [x1, #:lo12:.LANCHOR61]
+	ldr	w4, [x4, #:lo12:.LANCHOR59]
 	add	w1, w1, w1, lsl 1
 	cmp	w4, w1, lsr 2
 	bcs	.L1394
 .L1393:
 	.loc 5 543 0
-	adrp	x1, .LANCHOR80
-	ldrh	w1, [x1, #:lo12:.LANCHOR80]
+	adrp	x1, .LANCHOR78
+	ldrh	w1, [x1, #:lo12:.LANCHOR78]
 	add	w1, w1, w1, lsl 1
 	asr	w1, w1, 2
-	strh	w1, [x3, #:lo12:.LANCHOR84]
+	strh	w1, [x3, #:lo12:.LANCHOR82]
 .L1395:
 	.loc 5 546 0
-	adrp	x1, .LANCHOR89
-	str	wzr, [x1, #:lo12:.LANCHOR89]
-.LVL1847:
+	adrp	x1, .LANCHOR87
+	str	wzr, [x1, #:lo12:.LANCHOR87]
+.LVL1844:
 .L1372:
-.LBE292:
-.LBE291:
-	.loc 5 758 0
+.LBE327:
+.LBE326:
+	.loc 5 754 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -18017,7 +18077,7 @@ rk_ftl_garbage_collect:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1848:
+.LVL1845:
 .L1374:
 	.cfi_restore_state
 	.loc 5 485 0 discriminator 1
@@ -18028,183 +18088,183 @@ rk_ftl_garbage_collect:
 	.loc 5 486 0
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
-.LVL1849:
+.LVL1846:
 	cbz	w0, .L1377
 	.loc 5 487 0
 	mov	w0, 1
 	b	.L1372
-.LVL1850:
+.LVL1847:
 .L1375:
-.LBB296:
-.LBB295:
+.LBB331:
+.LBB330:
 	.loc 5 489 0
-	adrp	x1, .LANCHOR101
-	ldrh	w4, [x1, #:lo12:.LANCHOR101]
+	adrp	x1, .LANCHOR99
+	ldrh	w4, [x1, #:lo12:.LANCHOR99]
 	cmp	w4, w3
 	bne	.L1376
 	.loc 5 490 0
-	strh	w2, [x1, #:lo12:.LANCHOR101]
+	strh	w2, [x1, #:lo12:.LANCHOR99]
 	.loc 5 491 0
 	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR102]
+	strh	w1, [x0, #:lo12:.LANCHOR100]
 	b	.L1376
-.LVL1851:
+.LVL1848:
 .L1384:
-.LBB294:
+.LBB329:
 	.loc 5 512 0
 	mov	w0, 64
 .L1476:
 	.loc 5 516 0
-	strh	w0, [x5, #:lo12:.LANCHOR85]
+	strh	w0, [x5, #:lo12:.LANCHOR83]
 	b	.L1383
 .L1381:
 	mov	w0, 80
 	b	.L1476
-.LVL1852:
+.LVL1849:
 .L1451:
 	.loc 5 504 0
 	mov	w21, w20
-.LVL1853:
+.LVL1850:
 .L1380:
 	.loc 5 521 0
-	adrp	x1, .LANCHOR40
+	adrp	x1, .LANCHOR43
 	ubfiz	x0, x21, 1, 32
-	adrp	x3, .LANCHOR84
+	adrp	x3, .LANCHOR82
 	mov	w20, w21
-	ldr	x2, [x1, #:lo12:.LANCHOR40]
-	adrp	x1, .LANCHOR43
-	ldrh	w5, [x3, #:lo12:.LANCHOR84]
-	ldr	x1, [x1, #:lo12:.LANCHOR43]
+	ldr	x2, [x1, #:lo12:.LANCHOR43]
+	adrp	x1, .LANCHOR42
+	ldrh	w5, [x3, #:lo12:.LANCHOR82]
+	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w4, [x2, x0]
 	ldrh	w2, [x23, #:lo12:.LANCHOR48]
 	ldrh	w3, [x1, x0]
 	mov	w1, w21
-	adrp	x0, .LC104
-	add	x0, x0, :lo12:.LC104
+	adrp	x0, .LC107
+	add	x0, x0, :lo12:.LC107
 	bl	printf
-.LVL1854:
+.LVL1851:
 	b	.L1383
-.LVL1855:
+.LVL1852:
 .L1447:
-.LBE294:
+.LBE329:
 	.loc 5 473 0
 	mov	w20, w0
 	b	.L1378
 .L1450:
 	mov	w20, w21
 	b	.L1378
-.LVL1856:
+.LVL1853:
 .L1388:
 	.loc 5 532 0
 	cmp	w0, 12
 	bls	.L1389
 	.loc 5 533 0
 	lsr	w21, w21, 4
-.LVL1857:
+.LVL1854:
 	b	.L1387
-.LVL1858:
+.LVL1855:
 .L1389:
 	.loc 5 534 0
 	cmp	w0, 8
 	bls	.L1387
 	.loc 5 535 0
 	lsr	w21, w21, 2
-.LVL1859:
+.LVL1856:
 	b	.L1387
-.LVL1860:
+.LVL1857:
 .L1452:
 	.loc 5 529 0
 	mov	w21, 1
 	b	.L1387
-.LVL1861:
+.LVL1858:
 .L1394:
 	.loc 5 545 0
 	mov	w1, 18
-	strh	w1, [x2, #:lo12:.LANCHOR84]
+	strh	w1, [x2, #:lo12:.LANCHOR82]
 	b	.L1395
 .L1392:
 	.loc 5 549 0
-	adrp	x0, .LANCHOR80
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR78
+	ldrh	w0, [x0, #:lo12:.LANCHOR78]
 	add	w0, w0, w0, lsl 1
 	asr	w0, w0, 2
-	strh	w0, [x3, #:lo12:.LANCHOR84]
+	strh	w0, [x3, #:lo12:.LANCHOR82]
 .L1391:
 	.loc 5 551 0
-	adrp	x0, .LANCHOR103
-	ldrh	w0, [x0, #:lo12:.LANCHOR103]
+	adrp	x0, .LANCHOR101
+	ldrh	w0, [x0, #:lo12:.LANCHOR101]
 	cbz	w0, .L1453
 	.loc 5 552 0
 	add	w21, w21, 32
-.LVL1862:
+.LVL1859:
 	and	w21, w21, 65535
-.LVL1863:
+.LVL1860:
 .L1453:
 	.loc 5 551 0
 	mov	w20, 65535
-.LVL1864:
+.LVL1861:
 .L1397:
-	.loc 5 597 0
-	ldrh	w0, [x19, #:lo12:.LANCHOR82]
+	.loc 5 595 0
+	ldrh	w0, [x19, #:lo12:.LANCHOR80]
 	mov	w1, 65535
 	cmp	w0, w1
 	bne	.L1406
-	.loc 5 598 0
+	.loc 5 596 0
 	cmp	w20, w0
 	beq	.L1407
-	.loc 5 599 0
-	strh	w20, [x19, #:lo12:.LANCHOR82]
-.LVL1865:
+	.loc 5 597 0
+	strh	w20, [x19, #:lo12:.LANCHOR80]
+.LVL1862:
 .L1408:
-	.loc 5 610 0
-	add	x0, x19, :lo12:.LANCHOR82
-	.loc 5 611 0
+	.loc 5 606 0
+	add	x0, x19, :lo12:.LANCHOR80
+	.loc 5 607 0
 	mov	w1, 65535
-	.loc 5 610 0
+	.loc 5 606 0
 	strb	wzr, [x0, 8]
-	.loc 5 611 0
-	ldrh	w0, [x19, #:lo12:.LANCHOR82]
+	.loc 5 607 0
+	ldrh	w0, [x19, #:lo12:.LANCHOR80]
 	cmp	w0, w1
 	beq	.L1406
-	.loc 5 612 0
+	.loc 5 608 0
 	bl	IsBlkInGcList
-.LVL1866:
+.LVL1863:
 	cbz	w0, .L1411
-	.loc 5 613 0
+	.loc 5 609 0
 	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR82]
+	strh	w0, [x19, #:lo12:.LANCHOR80]
 .L1411:
-	.loc 5 615 0
-	ldrh	w1, [x19, #:lo12:.LANCHOR82]
+	.loc 5 611 0
+	ldrh	w1, [x19, #:lo12:.LANCHOR80]
 	mov	w0, 65535
-	add	x23, x19, :lo12:.LANCHOR82
+	add	x23, x19, :lo12:.LANCHOR80
 	cmp	w1, w0
 	beq	.L1406
-	.loc 5 616 0
+	.loc 5 612 0
 	mov	x0, x23
 	bl	make_superblock
-.LVL1867:
-	.loc 5 619 0
-	adrp	x0, .LANCHOR175
-	.loc 5 620 0
-	ldrh	w1, [x19, #:lo12:.LANCHOR82]
-	.loc 5 617 0
+.LVL1864:
+	.loc 5 615 0
+	adrp	x0, .LANCHOR173
+	.loc 5 616 0
+	ldrh	w1, [x19, #:lo12:.LANCHOR80]
+	.loc 5 613 0
 	strh	wzr, [x23, 2]
-	.loc 5 619 0
-	strh	wzr, [x0, #:lo12:.LANCHOR175]
-	.loc 5 620 0
-	adrp	x0, .LANCHOR43
-	.loc 5 618 0
+	.loc 5 615 0
+	strh	wzr, [x0, #:lo12:.LANCHOR173]
+	.loc 5 616 0
+	adrp	x0, .LANCHOR42
+	.loc 5 614 0
 	strb	wzr, [x23, 6]
-	.loc 5 620 0
-	ldr	x0, [x0, #:lo12:.LANCHOR43]
+	.loc 5 616 0
+	ldr	x0, [x0, #:lo12:.LANCHOR42]
 	ldrh	w1, [x0, x1, lsl 1]
-	adrp	x0, .LANCHOR176
-	strh	w1, [x0, #:lo12:.LANCHOR176]
+	adrp	x0, .LANCHOR174
+	strh	w1, [x0, #:lo12:.LANCHOR174]
 .L1406:
-	.loc 5 625 0
+	.loc 5 621 0
 	adrp	x0, .LANCHOR51
-	ldrh	w1, [x19, #:lo12:.LANCHOR82]
+	ldrh	w1, [x19, #:lo12:.LANCHOR80]
 	str	x0, [x29, 136]
 	ldrh	w2, [x0, #:lo12:.LANCHOR51]
 	cmp	w2, w1
@@ -18214,132 +18274,132 @@ rk_ftl_garbage_collect:
 	ldrh	w2, [x0, #:lo12:.LANCHOR52]
 	cmp	w2, w1
 	beq	.L1412
-	.loc 5 635 0
-	adrp	x24, .LANCHOR87
-.LVL1868:
-	.loc 5 657 0
-	add	x0, x24, :lo12:.LANCHOR87
+	.loc 5 631 0
+	adrp	x24, .LANCHOR85
+.LVL1865:
+	.loc 5 653 0
+	add	x0, x24, :lo12:.LANCHOR85
 	str	x0, [x29, 160]
 .L1413:
-	.loc 5 631 0
-	ldrh	w1, [x19, #:lo12:.LANCHOR82]
+	.loc 5 627 0
+	ldrh	w1, [x19, #:lo12:.LANCHOR80]
 	mov	w0, 65535
 	cmp	w1, w0
 	bne	.L1414
-	.loc 5 632 0
-	adrp	x0, .LANCHOR89
-	.loc 5 645 0
+	.loc 5 628 0
+	adrp	x0, .LANCHOR87
+	.loc 5 641 0
 	adrp	x25, .LANCHOR19
 	add	x25, x25, :lo12:.LANCHOR19
-	.loc 5 632 0
-	str	wzr, [x0, #:lo12:.LANCHOR89]
+	.loc 5 628 0
+	str	wzr, [x0, #:lo12:.LANCHOR87]
 .L1415:
-	.loc 5 635 0
-	ldrh	w5, [x24, #:lo12:.LANCHOR87]
-	add	x7, x24, :lo12:.LANCHOR87
+	.loc 5 631 0
+	ldrh	w5, [x24, #:lo12:.LANCHOR85]
+	add	x7, x24, :lo12:.LANCHOR85
 	mov	w0, w5
 	bl	List_get_gc_head_node
-.LVL1869:
+.LVL1866:
 	and	w6, w0, 65535
-	strh	w6, [x19, #:lo12:.LANCHOR82]
-	.loc 5 636 0
+	strh	w6, [x19, #:lo12:.LANCHOR80]
+	.loc 5 632 0
 	mov	w0, 65535
 	cmp	w6, w0
 	bne	.L1416
-	.loc 5 637 0
+	.loc 5 633 0
 	strh	wzr, [x7]
-	.loc 5 638 0
+	.loc 5 634 0
 	mov	w0, 8
 	b	.L1372
-.LVL1870:
+.LVL1867:
 .L1386:
 	.loc 5 557 0
 	adrp	x1, .LANCHOR53
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	cmp	w1, w0
 	bne	.L1456
-	adrp	x0, .LANCHOR101
-	ldrh	w0, [x0, #:lo12:.LANCHOR101]
+	adrp	x0, .LANCHOR99
+	ldrh	w0, [x0, #:lo12:.LANCHOR99]
 	cmp	w0, w1
 	bne	.L1456
 	cmp	w20, w0
 	bne	.L1456
-	ldrh	w0, [x19, #:lo12:.LANCHOR82]
+	ldrh	w0, [x19, #:lo12:.LANCHOR80]
 	cmp	w0, w20
 	beq	.L1398
-.LVL1871:
+.LVL1868:
 .L1456:
 	.loc 5 556 0
 	mov	w21, 1
 	b	.L1397
-.LVL1872:
+.LVL1869:
 .L1398:
 	.loc 5 558 0
-	adrp	x0, .LANCHOR89
+	adrp	x0, .LANCHOR87
 	.loc 5 560 0
 	adrp	x21, .LANCHOR48
-	adrp	x23, .LANCHOR174
+	adrp	x23, .LANCHOR172
 	.loc 5 558 0
-	str	wzr, [x0, #:lo12:.LANCHOR89]
+	str	wzr, [x0, #:lo12:.LANCHOR87]
 	.loc 5 560 0
-	adrp	x0, .LANCHOR84
+	adrp	x0, .LANCHOR82
 	ldrh	w6, [x21, #:lo12:.LANCHOR48]
 	mov	x2, x0
-	ldrh	w1, [x0, #:lo12:.LANCHOR84]
+	ldrh	w1, [x0, #:lo12:.LANCHOR82]
 	cmp	w1, w6
 	.loc 5 561 0
-	ldrh	w1, [x23, #:lo12:.LANCHOR174]
+	ldrh	w1, [x23, #:lo12:.LANCHOR172]
 	.loc 5 560 0
 	bcs	.L1399
 	.loc 5 561 0
 	cbnz	w1, .L1400
-	adrp	x1, .LANCHOR62
-	adrp	x3, .LANCHOR60
-	ldr	w1, [x1, #:lo12:.LANCHOR62]
-	ldr	w3, [x3, #:lo12:.LANCHOR60]
+	adrp	x1, .LANCHOR61
+	adrp	x3, .LANCHOR59
+	ldr	w1, [x1, #:lo12:.LANCHOR61]
+	ldr	w3, [x3, #:lo12:.LANCHOR59]
 	add	w1, w1, w1, lsl 1
 	cmp	w3, w1, lsr 2
 	bcs	.L1401
 .L1400:
 	.loc 5 562 0
-	adrp	x0, .LANCHOR80
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR78
+	ldrh	w0, [x0, #:lo12:.LANCHOR78]
 	add	w0, w0, w0, lsl 1
 	asr	w0, w0, 2
-	strh	w0, [x2, #:lo12:.LANCHOR84]
-.LVL1873:
+	strh	w0, [x2, #:lo12:.LANCHOR82]
+.LVL1870:
 .L1477:
 	.loc 5 578 0
 	bl	FtlReadRefresh
-.LVL1874:
+.LVL1871:
 	.loc 5 579 0
-	ldrh	w0, [x23, #:lo12:.LANCHOR174]
+	ldrh	w0, [x23, #:lo12:.LANCHOR172]
 	b	.L1372
-.LVL1875:
+.LVL1872:
 .L1401:
 	.loc 5 564 0
 	mov	w1, 18
-	strh	w1, [x0, #:lo12:.LANCHOR84]
+	strh	w1, [x0, #:lo12:.LANCHOR82]
 	b	.L1477
 .L1399:
 	.loc 5 572 0
 	cbnz	w1, .L1456
 	.loc 5 573 0
-	adrp	x1, .LANCHOR80
-	ldrh	w5, [x1, #:lo12:.LANCHOR80]
+	adrp	x1, .LANCHOR78
+	ldrh	w5, [x1, #:lo12:.LANCHOR78]
 	add	w1, w5, w5, lsl 1
 	asr	w1, w1, 2
-	strh	w1, [x0, #:lo12:.LANCHOR84]
+	strh	w1, [x0, #:lo12:.LANCHOR82]
 	.loc 5 574 0
 	mov	w0, 0
 	bl	List_get_gc_head_node
-.LVL1876:
+.LVL1873:
 	.loc 5 575 0
 	ubfiz	x0, x0, 1, 16
-.LVL1877:
-	adrp	x1, .LANCHOR43
+.LVL1874:
+	adrp	x1, .LANCHOR42
 	adrp	x2, .LANCHOR3
-	ldr	x1, [x1, #:lo12:.LANCHOR43]
+	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w2, [x2, #:lo12:.LANCHOR3]
 	ldrh	w1, [x1, x0]
 	adrp	x0, .LANCHOR20
@@ -18358,111 +18418,111 @@ rk_ftl_garbage_collect:
 	.loc 5 585 0
 	mov	w0, -1
 	bl	decrement_vpc_count
-.LVL1878:
+.LVL1875:
 	.loc 5 586 0
 	ldrh	w0, [x21, #:lo12:.LANCHOR48]
 	add	w0, w0, 1
 	b	.L1372
-.LVL1879:
+.LVL1876:
 .L1407:
-	.loc 5 600 0
-	adrp	x0, .LANCHOR101
-	ldrh	w1, [x0, #:lo12:.LANCHOR101]
+	.loc 5 598 0
+	adrp	x0, .LANCHOR99
+	ldrh	w1, [x0, #:lo12:.LANCHOR99]
 	cmp	w1, w20
 	beq	.L1408
-	.loc 5 604 0
-	adrp	x2, .LANCHOR43
+	.loc 5 600 0
+	adrp	x2, .LANCHOR42
 	ubfiz	x1, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR43]
+	ldr	x2, [x2, #:lo12:.LANCHOR42]
 	ldrh	w1, [x2, x1]
 	cbnz	w1, .L1409
-	.loc 5 605 0
+	.loc 5 601 0
 	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR101]
+	strh	w1, [x0, #:lo12:.LANCHOR99]
 .L1409:
-	.loc 5 606 0
-	ldrh	w1, [x0, #:lo12:.LANCHOR101]
-	strh	w1, [x19, #:lo12:.LANCHOR82]
-	.loc 5 607 0
+	.loc 5 602 0
+	ldrh	w1, [x0, #:lo12:.LANCHOR99]
+	strh	w1, [x19, #:lo12:.LANCHOR80]
+	.loc 5 603 0
 	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR101]
+	strh	w1, [x0, #:lo12:.LANCHOR99]
 	b	.L1408
-.LVL1880:
+.LVL1877:
 .L1412:
-	.loc 5 626 0
+	.loc 5 622 0
 	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR82]
-.LVL1881:
+	strh	w0, [x19, #:lo12:.LANCHOR80]
+.LVL1878:
 .L1478:
-	.loc 5 734 0
-	adrp	x0, .LANCHOR174
-	ldrh	w0, [x0, #:lo12:.LANCHOR174]
+	.loc 5 730 0
+	adrp	x0, .LANCHOR172
+	ldrh	w0, [x0, #:lo12:.LANCHOR172]
 	b	.L1372
-.LVL1882:
+.LVL1879:
 .L1416:
-	.loc 5 640 0
+	.loc 5 636 0
 	mov	w0, w6
 	bl	IsBlkInGcList
-.LVL1883:
+.LVL1880:
 	add	w5, w5, 1
 	cbz	w0, .L1417
-	.loc 5 641 0
-	strh	w5, [x24, #:lo12:.LANCHOR87]
+	.loc 5 637 0
+	strh	w5, [x24, #:lo12:.LANCHOR85]
 	b	.L1415
 .L1417:
-	.loc 5 645 0
-	adrp	x23, .LANCHOR43
+	.loc 5 641 0
+	adrp	x23, .LANCHOR42
 	adrp	x4, .LANCHOR3
 	ldrh	w0, [x25]
 	ubfiz	x1, x6, 1, 16
-	ldr	x2, [x23, #:lo12:.LANCHOR43]
-	.loc 5 644 0
+	ldr	x2, [x23, #:lo12:.LANCHOR42]
+	.loc 5 640 0
 	and	w5, w5, 65535
-	.loc 5 645 0
+	.loc 5 641 0
 	ldrh	w4, [x4, #:lo12:.LANCHOR3]
-	.loc 5 644 0
-	strh	w5, [x24, #:lo12:.LANCHOR87]
-	.loc 5 645 0
+	.loc 5 640 0
+	strh	w5, [x24, #:lo12:.LANCHOR85]
+	.loc 5 641 0
 	ldrh	w3, [x2, x1]
 	mul	w0, w0, w4
 	cmp	w3, w0, asr 1
 	bgt	.L1419
-	.loc 5 646 0
+	.loc 5 642 0
 	cmp	w5, 48
 	bls	.L1420
 	cmp	w3, 8
 	bls	.L1420
-	adrp	x3, .LANCHOR97
-	ldrh	w3, [x3, #:lo12:.LANCHOR97]
+	adrp	x3, .LANCHOR95
+	ldrh	w3, [x3, #:lo12:.LANCHOR95]
 	cmp	w3, 35
 	bhi	.L1420
 .L1419:
-	.loc 5 647 0
+	.loc 5 643 0
 	ldr	x3, [x29, 160]
 	strh	wzr, [x3]
 .L1420:
-	.loc 5 649 0
+	.loc 5 645 0
 	ldrh	w1, [x2, x1]
 	cmp	w0, w1
 	bgt	.L1421
 	mov	w0, 65535
 	cmp	w20, w0
 	bne	.L1421
-	.loc 5 650 0
+	.loc 5 646 0
 	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR82]
-	.loc 5 651 0
-	adrp	x0, .LANCHOR87
-	strh	wzr, [x0, #:lo12:.LANCHOR87]
+	strh	w0, [x19, #:lo12:.LANCHOR80]
+	.loc 5 647 0
+	adrp	x0, .LANCHOR85
+	strh	wzr, [x0, #:lo12:.LANCHOR85]
 	b	.L1478
 .L1421:
-	.loc 5 655 0
+	.loc 5 651 0
 	cbnz	w1, .L1422
-	.loc 5 656 0
+	.loc 5 652 0
 	mov	w0, -1
 	bl	decrement_vpc_count
-.LVL1884:
-	.loc 5 657 0
+.LVL1881:
+	.loc 5 653 0
 	ldr	x0, [x29, 160]
 	ldr	x1, [x29, 160]
 	ldrh	w0, [x0]
@@ -18470,296 +18530,296 @@ rk_ftl_garbage_collect:
 	strh	w0, [x1]
 	b	.L1415
 .L1422:
-	.loc 5 660 0
-	add	x0, x19, :lo12:.LANCHOR82
+	.loc 5 656 0
+	add	x0, x19, :lo12:.LANCHOR80
 	strb	wzr, [x0, 8]
-	.loc 5 662 0
+	.loc 5 658 0
 	ldr	x0, [x29, 136]
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w6
 	bne	.L1423
-	adrp	x1, .LANCHOR177
+	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
-	mov	w2, 662
-	add	x1, x1, :lo12:.LANCHOR177
+	mov	w2, 658
+	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1885:
+.LVL1882:
 .L1423:
-	.loc 5 663 0
+	.loc 5 659 0
 	ldr	x0, [x29, 128]
-	ldrh	w1, [x19, #:lo12:.LANCHOR82]
+	ldrh	w1, [x19, #:lo12:.LANCHOR80]
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w1, w0
 	bne	.L1424
-	adrp	x1, .LANCHOR177
+	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
-	mov	w2, 663
-	add	x1, x1, :lo12:.LANCHOR177
+	mov	w2, 659
+	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1886:
+.LVL1883:
 .L1424:
-	.loc 5 664 0
+	.loc 5 660 0
 	adrp	x0, .LANCHOR53
-	ldrh	w1, [x19, #:lo12:.LANCHOR82]
+	ldrh	w1, [x19, #:lo12:.LANCHOR80]
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w1, w0
 	bne	.L1425
-	adrp	x1, .LANCHOR177
+	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
-	mov	w2, 664
-	add	x1, x1, :lo12:.LANCHOR177
+	mov	w2, 660
+	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1887:
+.LVL1884:
 .L1425:
-	.loc 5 665 0
-	add	x25, x19, :lo12:.LANCHOR82
+	.loc 5 661 0
+	add	x25, x19, :lo12:.LANCHOR80
 	mov	x0, x25
 	bl	make_superblock
-.LVL1888:
-	.loc 5 666 0
-	adrp	x0, .LANCHOR175
-	.loc 5 667 0
-	ldrh	w1, [x19, #:lo12:.LANCHOR82]
-	.loc 5 666 0
-	strh	wzr, [x0, #:lo12:.LANCHOR175]
-	.loc 5 667 0
-	ldr	x0, [x23, #:lo12:.LANCHOR43]
+.LVL1885:
+	.loc 5 662 0
+	adrp	x0, .LANCHOR173
+	.loc 5 663 0
+	ldrh	w1, [x19, #:lo12:.LANCHOR80]
+	.loc 5 662 0
+	strh	wzr, [x0, #:lo12:.LANCHOR173]
+	.loc 5 663 0
+	ldr	x0, [x23, #:lo12:.LANCHOR42]
 	ldrh	w1, [x0, x1, lsl 1]
-	adrp	x0, .LANCHOR176
-	.loc 5 668 0
+	adrp	x0, .LANCHOR174
+	.loc 5 664 0
 	strh	wzr, [x25, 2]
-	.loc 5 667 0
-	strh	w1, [x0, #:lo12:.LANCHOR176]
-	.loc 5 669 0
+	.loc 5 663 0
+	strh	w1, [x0, #:lo12:.LANCHOR174]
+	.loc 5 665 0
 	strb	wzr, [x25, 6]
 .L1414:
-	.loc 5 675 0
+	.loc 5 671 0
 	bl	FtlReadRefresh
-.LVL1889:
-	.loc 5 679 0
+.LVL1886:
+	.loc 5 675 0
 	adrp	x1, .LANCHOR19
-	.loc 5 678 0
+	.loc 5 674 0
 	mov	w0, 1
 	str	w0, [x22, #:lo12:.LANCHOR117]
-	.loc 5 679 0
+	.loc 5 675 0
 	ldrh	w0, [x1, #:lo12:.LANCHOR19]
 	str	w0, [x29, 172]
-.LVL1890:
-	.loc 5 680 0
-	add	x0, x19, :lo12:.LANCHOR82
+.LVL1887:
+	.loc 5 676 0
+	add	x0, x19, :lo12:.LANCHOR80
 	str	x1, [x29, 120]
 	ldr	w3, [x29, 172]
 	ldrh	w0, [x0, 2]
 	add	w2, w0, w21
 	cmp	w2, w3
 	ble	.L1426
-	.loc 5 681 0
+	.loc 5 677 0
 	sub	w21, w3, w0
-.LVL1891:
+.LVL1888:
 	and	w21, w21, 65535
-.LVL1892:
+.LVL1889:
 .L1426:
-	.loc 5 704 0
-	adrp	x0, .LANCHOR175
-	.loc 5 693 0
+	.loc 5 700 0
+	adrp	x0, .LANCHOR173
+	.loc 5 689 0
 	mov	w27, 0
-	.loc 5 704 0
-	add	x0, x0, :lo12:.LANCHOR175
+	.loc 5 700 0
+	add	x0, x0, :lo12:.LANCHOR173
 	str	x0, [x29, 152]
-.LVL1893:
+.LVL1890:
 .L1427:
-	.loc 5 683 0
+	.loc 5 679 0
 	cmp	w21, w27, uxth
 	bls	.L1435
-	.loc 5 688 0
-	add	x1, x19, :lo12:.LANCHOR82
-	.loc 5 685 0
+	.loc 5 684 0
+	add	x1, x19, :lo12:.LANCHOR80
+	.loc 5 681 0
 	adrp	x0, .LANCHOR3
-	.loc 5 688 0
-	adrp	x25, .LANCHOR95
+	.loc 5 684 0
+	adrp	x25, .LANCHOR93
 	add	x1, x1, 16
-	.loc 5 685 0
+	.loc 5 681 0
 	ldrh	w7, [x0, #:lo12:.LANCHOR3]
-	.loc 5 688 0
+	.loc 5 684 0
 	mov	w23, 0
 	ldrh	w4, [x1, -14]
 	mov	w2, 0
-	ldr	x0, [x25, #:lo12:.LANCHOR95]
-	.loc 5 687 0
+	ldr	x0, [x25, #:lo12:.LANCHOR93]
+	.loc 5 683 0
 	mov	w6, 65535
-	.loc 5 688 0
+	.loc 5 684 0
 	add	w4, w4, w27
 	b	.L1436
-.LVL1894:
+.LVL1891:
 .L1429:
-	.loc 5 686 0
+	.loc 5 682 0
 	ldrh	w3, [x1]
-.LVL1895:
-	.loc 5 687 0
+.LVL1892:
+	.loc 5 683 0
 	cmp	w3, w6
 	beq	.L1428
-	.loc 5 688 0
+	.loc 5 684 0
 	ubfiz	x5, x23, 5, 16
-	.loc 5 689 0
+	.loc 5 685 0
 	add	w23, w23, 1
-.LVL1896:
-	.loc 5 688 0
+.LVL1893:
+	.loc 5 684 0
 	add	x5, x0, x5
-	.loc 5 689 0
+	.loc 5 685 0
 	and	w23, w23, 65535
-.LVL1897:
-	.loc 5 688 0
+.LVL1894:
+	.loc 5 684 0
 	orr	w3, w4, w3, lsl 10
-.LVL1898:
+.LVL1895:
 	str	w3, [x5, 4]
 .L1428:
-	.loc 5 685 0
+	.loc 5 681 0
 	add	w2, w2, 1
-.LVL1899:
+.LVL1896:
 	add	x1, x1, 2
-.LVL1900:
+.LVL1897:
 	and	w2, w2, 65535
-.LVL1901:
+.LVL1898:
 .L1436:
 	cmp	w2, w7
 	bne	.L1429
-	.loc 5 693 0
-	add	x1, x19, :lo12:.LANCHOR82
-	.loc 5 705 0
-	adrp	x26, .LANCHOR91
-	add	x26, x26, :lo12:.LANCHOR91
-	.loc 5 693 0
+	.loc 5 689 0
+	add	x1, x19, :lo12:.LANCHOR80
+	.loc 5 701 0
+	adrp	x26, .LANCHOR89
+	add	x26, x26, :lo12:.LANCHOR89
+	.loc 5 689 0
 	ldrb	w2, [x1, 8]
-.LVL1902:
+.LVL1899:
 	mov	w1, w23
 	bl	FlashReadPages
-.LVL1903:
+.LVL1900:
 	ubfiz	x0, x23, 5, 16
 	mov	x23, 0
-.LVL1904:
+.LVL1901:
 	str	x0, [x29, 144]
-.LVL1905:
+.LVL1902:
 .L1430:
-	.loc 5 695 0
+	.loc 5 691 0
 	ldr	x0, [x29, 144]
 	cmp	x0, x23
 	bne	.L1434
-.LVL1906:
+.LVL1903:
 	add	w27, w27, 1
-.LVL1907:
+.LVL1904:
 	b	.L1427
-.LVL1908:
+.LVL1905:
 .L1434:
-	.loc 5 696 0
-	ldr	x0, [x25, #:lo12:.LANCHOR95]
+	.loc 5 692 0
+	ldr	x0, [x25, #:lo12:.LANCHOR93]
 	add	x1, x0, x23
-.LVL1909:
-	.loc 5 697 0
+.LVL1906:
+	.loc 5 693 0
 	ldr	w0, [x0, x23]
 	cmn	w0, #1
 	beq	.L1431
-	.loc 5 696 0
+	.loc 5 692 0
 	ldr	x28, [x1, 16]
-	.loc 5 697 0
+	.loc 5 693 0
 	mov	w0, 61589
 	ldrh	w1, [x28]
-.LVL1910:
+.LVL1907:
 	cmp	w1, w0
 	bne	.L1431
-	.loc 5 699 0
+	.loc 5 695 0
 	ldr	w4, [x28, 8]
-.LVL1911:
-	.loc 5 700 0
+.LVL1908:
+	.loc 5 696 0
 	cmn	w4, #1
 	bne	.L1432
 	str	w4, [x29, 112]
-	mov	w2, 700
-	adrp	x1, .LANCHOR177
+	mov	w2, 696
+	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR177
+	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1912:
+.LVL1909:
 	ldr	w4, [x29, 112]
-.LVL1913:
+.LVL1910:
 .L1432:
-	.loc 5 701 0
+	.loc 5 697 0
 	mov	w2, 0
 	add	x1, x29, 188
 	mov	w0, w4
 	bl	log2phys
-.LVL1914:
-	.loc 5 702 0
-	ldr	x0, [x25, #:lo12:.LANCHOR95]
+.LVL1911:
+	.loc 5 698 0
+	ldr	x0, [x25, #:lo12:.LANCHOR93]
 	ldr	w1, [x29, 188]
 	add	x0, x0, x23
 	ldr	w2, [x0, 4]
 	cmp	w2, w1
 	bne	.L1431
-	.loc 5 704 0
+	.loc 5 700 0
 	ldr	x1, [x29, 152]
-	.loc 5 705 0
+	.loc 5 701 0
 	adrp	x4, .LANCHOR121
-	.loc 5 704 0
+	.loc 5 700 0
 	ldr	x2, [x29, 152]
-	.loc 5 705 0
+	.loc 5 701 0
 	ldr	w0, [x0, 24]
-	.loc 5 704 0
+	.loc 5 700 0
 	ldrh	w1, [x1]
 	add	w1, w1, 1
 	strh	w1, [x2]
-	.loc 5 705 0
+	.loc 5 701 0
 	ldr	x2, [x4, #:lo12:.LANCHOR121]
 	ldr	w1, [x26]
 	add	x1, x2, x1, lsl 5
 	stp	x4, x1, [x29, 104]
 	str	w0, [x1, 24]
-	.loc 5 706 0
+	.loc 5 702 0
 	bl	Ftl_get_new_temp_ppa
-.LVL1915:
+.LVL1912:
 	ldp	x4, x1, [x29, 104]
-	.loc 5 707 0
+	.loc 5 703 0
 	ldr	x2, [x4, #:lo12:.LANCHOR121]
-	.loc 5 706 0
+	.loc 5 702 0
 	str	w0, [x1, 4]
-	.loc 5 707 0
+	.loc 5 703 0
 	ldr	w1, [x26]
 	ubfiz	x0, x1, 5, 32
-	.loc 5 715 0
+	.loc 5 711 0
 	add	w1, w1, 1
-	.loc 5 707 0
+	.loc 5 703 0
 	add	x2, x2, x0
-	ldr	x0, [x25, #:lo12:.LANCHOR95]
+	ldr	x0, [x25, #:lo12:.LANCHOR93]
 	add	x0, x0, x23
 	ldr	x4, [x0, 8]
 	str	x4, [x2, 8]
-	.loc 5 708 0
+	.loc 5 704 0
 	ldr	x4, [x0, 16]
 	str	x4, [x2, 16]
-	.loc 5 709 0
+	.loc 5 705 0
 	ldr	w2, [x29, 188]
 	str	w2, [x28, 12]
-	.loc 5 710 0
+	.loc 5 706 0
 	adrp	x2, .LANCHOR53
 	add	x11, x2, :lo12:.LANCHOR53
 	ldrh	w2, [x2, #:lo12:.LANCHOR53]
 	strh	w2, [x28, 2]
-	.loc 5 713 0
-	adrp	x2, .LANCHOR72
-	.loc 5 715 0
+	.loc 5 709 0
+	adrp	x2, .LANCHOR71
+	.loc 5 711 0
 	str	w1, [x26]
-	.loc 5 716 0
+	.loc 5 712 0
 	mov	w1, 1
-	.loc 5 713 0
-	ldr	w2, [x2, #:lo12:.LANCHOR72]
+	.loc 5 709 0
+	ldr	w2, [x2, #:lo12:.LANCHOR71]
 	str	w2, [x28, 4]
-	.loc 5 716 0
+	.loc 5 712 0
 	bl	FtlGcBufAlloc
-.LVL1916:
-	.loc 5 717 0
+.LVL1913:
+	.loc 5 713 0
 	ldrb	w1, [x11, 7]
 	ldr	w0, [x26]
 	cmp	w1, w0
@@ -18767,108 +18827,105 @@ rk_ftl_garbage_collect:
 	ldrh	w0, [x11, 4]
 	cbnz	w0, .L1431
 .L1433:
-	.loc 5 718 0
+	.loc 5 714 0
 	bl	Ftl_gc_temp_data_write_back
-.LVL1917:
+.LVL1914:
 	cbz	w0, .L1431
-.LVL1918:
+.LVL1915:
 .L1479:
-	.loc 5 733 0
+	.loc 5 729 0
 	str	wzr, [x22, #:lo12:.LANCHOR117]
 	b	.L1478
-.LVL1919:
+.LVL1916:
 .L1431:
 	add	x23, x23, 32
 	b	.L1430
 .L1435:
-	.loc 5 727 0
-	add	x1, x19, :lo12:.LANCHOR82
+	.loc 5 723 0
+	add	x1, x19, :lo12:.LANCHOR80
 	ldrh	w0, [x1, 2]
 	add	w21, w21, w0
-.LVL1920:
-	.loc 5 729 0
+.LVL1917:
+	.loc 5 725 0
 	ldr	w0, [x29, 172]
-	.loc 5 727 0
+	.loc 5 723 0
 	and	w21, w21, 65535
 	strh	w21, [x1, 2]
-	.loc 5 729 0
+	.loc 5 725 0
 	cmp	w0, w21
 	bls	.L1437
-	adrp	x0, .LANCHOR175
-	ldrh	w1, [x0, #:lo12:.LANCHOR175]
-	adrp	x0, .LANCHOR176
-	ldrh	w0, [x0, #:lo12:.LANCHOR176]
+	adrp	x0, .LANCHOR173
+	ldrh	w1, [x0, #:lo12:.LANCHOR173]
+	adrp	x0, .LANCHOR174
+	ldrh	w0, [x0, #:lo12:.LANCHOR174]
 	cmp	w1, w0
 	bne	.L1438
 .L1437:
-	.loc 5 731 0
-	adrp	x0, .LANCHOR91
-	ldr	w0, [x0, #:lo12:.LANCHOR91]
+	.loc 5 727 0
+	adrp	x0, .LANCHOR89
+	ldr	w0, [x0, #:lo12:.LANCHOR89]
 	cbz	w0, .L1439
-	.loc 5 732 0
+	.loc 5 728 0
 	bl	Ftl_gc_temp_data_write_back
-.LVL1921:
+.LVL1918:
 	cbnz	w0, .L1479
 .L1439:
-	.loc 5 737 0
-	adrp	x0, .LANCHOR175
-	ldrh	w0, [x0, #:lo12:.LANCHOR175]
+	.loc 5 733 0
+	adrp	x0, .LANCHOR173
+	ldrh	w0, [x0, #:lo12:.LANCHOR173]
 	cbnz	w0, .L1440
-	ldrh	w0, [x19, #:lo12:.LANCHOR82]
-	adrp	x1, .LANCHOR43
-	ldr	x1, [x1, #:lo12:.LANCHOR43]
+	ldrh	w0, [x19, #:lo12:.LANCHOR80]
+	adrp	x1, .LANCHOR42
+	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	lsl	x0, x0, 1
 	ldrh	w2, [x1, x0]
 	cbz	w2, .L1440
-	.loc 5 739 0
+	.loc 5 735 0
 	strh	wzr, [x1, x0]
-	.loc 5 740 0
-	ldrh	w0, [x19, #:lo12:.LANCHOR82]
+	.loc 5 736 0
+	ldrh	w0, [x19, #:lo12:.LANCHOR80]
 	bl	update_vpc_list
-.LVL1922:
-	.loc 5 741 0
-	bl	FtlCacheWriteBack
-.LVL1923:
-	.loc 5 742 0
+.LVL1919:
+	.loc 5 738 0
 	bl	l2p_flush
-.LVL1924:
-	.loc 5 743 0
+.LVL1920:
+	.loc 5 739 0
 	bl	FtlVpcTblFlush
-.LVL1925:
+.LVL1921:
 .L1440:
-	.loc 5 745 0
+	.loc 5 741 0
 	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR82]
+	strh	w0, [x19, #:lo12:.LANCHOR80]
 .L1438:
-	.loc 5 747 0
+	.loc 5 743 0
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 2
 	bhi	.L1441
-	.loc 5 749 0
+	.loc 5 745 0
 	ldr	x0, [x29, 120]
 	ldrh	w21, [x0, #:lo12:.LANCHOR19]
-.LVL1926:
+.LVL1922:
 	b	.L1413
-.LVL1927:
+.LVL1923:
 .L1441:
-	.loc 5 754 0
-	adrp	x1, .LANCHOR174
-	.loc 5 752 0
+	.loc 5 750 0
+	adrp	x1, .LANCHOR172
+	.loc 5 748 0
 	str	wzr, [x22, #:lo12:.LANCHOR117]
-	.loc 5 754 0
-	ldrh	w1, [x1, #:lo12:.LANCHOR174]
-	.loc 5 755 0
+	.loc 5 750 0
+	ldrh	w1, [x1, #:lo12:.LANCHOR172]
+	.loc 5 751 0
 	cmp	w1, 0
 	csinc	w0, w1, w0, ne
 	b	.L1372
-.LVL1928:
+.LVL1924:
 .L1444:
-.LBE295:
-.LBE296:
+.LBE330:
+.LBE331:
 	.loc 5 479 0
 	mov	w0, 0
-.LVL1929:
+.LVL1925:
 	b	.L1372
 	.cfi_endproc
 .LFE319:
@@ -18879,13 +18936,13 @@ rk_ftl_garbage_collect:
 	.type	sftl_gc, %function
 sftl_gc:
 .LFB320:
-	.loc 5 761 0
+	.loc 5 757 0
 	.cfi_startproc
-	.loc 5 762 0
+	.loc 5 758 0
 	mov	w1, 1
 	mov	w0, w1
 	b	rk_ftl_garbage_collect
-.LVL1930:
+.LVL1926:
 	.cfi_endproc
 .LFE320:
 	.size	sftl_gc, .-sftl_gc
@@ -18897,7 +18954,7 @@ FtlRead:
 .LFB214:
 	.loc 3 814 0
 	.cfi_startproc
-.LVL1931:
+.LVL1927:
 	stp	x29, x30, [sp, -176]!
 	.cfi_def_cfa_offset 176
 	.cfi_offset 29, -176
@@ -18930,26 +18987,26 @@ FtlRead:
 	bne	.L1482
 	.loc 3 825 0
 	mov	x2, x3
-.LVL1932:
+.LVL1928:
 	mov	w1, w27
-.LVL1933:
+.LVL1929:
 	add	w0, w19, 256
-.LVL1934:
+.LVL1930:
 	bl	FtlVendorPartRead
-.LVL1935:
+.LVL1931:
 	mov	w21, w0
-.LVL1936:
+.LVL1932:
 .L1481:
 	.loc 3 901 0
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
-.LVL1937:
+.LVL1933:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL1938:
+.LVL1934:
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-.LVL1939:
+.LVL1935:
 	ldp	x29, x30, [sp], 176
 	.cfi_remember_state
 	.cfi_restore 30
@@ -18966,7 +19023,7 @@ FtlRead:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1940:
+.LVL1936:
 .L1482:
 	.cfi_restore_state
 	.loc 3 830 0
@@ -18974,30 +19031,25 @@ FtlRead:
 	str	w0, [x29, 140]
 	adrp	x0, .LANCHOR34
 	add	w1, w1, w2
-.LVL1941:
+.LVL1937:
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	cmp	w1, w0
 	bhi	.L1502
 	.loc 3 830 0 is_stmt 0 discriminator 1
-	adrp	x0, .LANCHOR88
-	ldr	w21, [x0, #:lo12:.LANCHOR88]
+	adrp	x0, .LANCHOR86
+	ldr	w21, [x0, #:lo12:.LANCHOR86]
 	cmn	w21, #1
 	beq	.L1481
 	.loc 3 835 0 is_stmt 1
 	adrp	x22, .LANCHOR12
-	.loc 3 833 0
-	bl	FtlCacheWriteBack
-.LVL1942:
 	.loc 3 836 0
-	add	w1, w19, w27
+	sub	w24, w1, #1
+	.loc 3 841 0
+	adrp	x1, .LANCHOR62
 	.loc 3 840 0
 	mov	w25, 0
 	.loc 3 835 0
 	ldrh	w0, [x22, #:lo12:.LANCHOR12]
-	.loc 3 836 0
-	sub	w24, w1, #1
-	.loc 3 841 0
-	adrp	x1, .LANCHOR63
 	.loc 3 815 0
 	mov	w21, 0
 	.loc 3 851 0
@@ -19006,35 +19058,36 @@ FtlRead:
 	stp	wzr, wzr, [x29, 144]
 	.loc 3 835 0
 	udiv	w26, w19, w0
-.LVL1943:
+.LVL1938:
 	.loc 3 836 0
 	udiv	w24, w24, w0
-.LVL1944:
+.LVL1939:
 	.loc 3 835 0
 	mov	w20, w26
 	.loc 3 837 0
 	sub	w0, w24, w26
 	add	w0, w0, 1
 	stp	wzr, w0, [x29, 152]
-.LVL1945:
+.LVL1940:
 	.loc 3 841 0
-	ldr	w0, [x1, #:lo12:.LANCHOR63]
-.LVL1946:
+	ldr	w0, [x1, #:lo12:.LANCHOR62]
+.LVL1941:
 	ldr	w2, [x29, 156]
+.LVL1942:
 	add	w0, w0, w2
-	str	w0, [x1, #:lo12:.LANCHOR63]
+	str	w0, [x1, #:lo12:.LANCHOR62]
 	.loc 3 886 0
-	adrp	x0, .LANCHOR83
-	add	x0, x0, :lo12:.LANCHOR83
+	adrp	x0, .LANCHOR81
+	add	x0, x0, :lo12:.LANCHOR81
 	str	x0, [x29, 128]
-.LVL1947:
+.LVL1943:
 .L1484:
 	.loc 3 842 0
 	ldr	w0, [x29, 156]
 	cbnz	w0, .L1500
 	.loc 3 898 0
-	adrp	x0, .LANCHOR103
-	ldrh	w0, [x0, #:lo12:.LANCHOR103]
+	adrp	x0, .LANCHOR101
+	ldrh	w0, [x0, #:lo12:.LANCHOR101]
 	cbnz	w0, .L1501
 	.loc 3 898 0 is_stmt 0 discriminator 1
 	adrp	x0, .LANCHOR48
@@ -19046,7 +19099,7 @@ FtlRead:
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-.LVL1948:
+.LVL1944:
 	b	.L1481
 .L1500:
 	.loc 3 843 0
@@ -19054,7 +19107,7 @@ FtlRead:
 	mov	w2, 0
 	mov	w0, w20
 	bl	log2phys
-.LVL1949:
+.LVL1945:
 	.loc 3 844 0
 	ldr	w1, [x29, 172]
 	cmn	w1, #1
@@ -19063,21 +19116,21 @@ FtlRead:
 	add	x5, x22, :lo12:.LANCHOR12
 	mov	w4, 0
 .L1486:
-.LVL1950:
+.LVL1946:
 	ldrh	w0, [x5]
 	cmp	w4, w0
 	bcc	.L1488
-.LVL1951:
+.LVL1947:
 .L1489:
 	.loc 3 874 0
 	ldr	w0, [x29, 156]
 	.loc 3 872 0
 	add	w20, w20, 1
-.LVL1952:
+.LVL1948:
 	.loc 3 874 0
 	subs	w0, w0, #1
 	str	w0, [x29, 156]
-.LVL1953:
+.LVL1949:
 	beq	.L1493
 	.loc 3 874 0 is_stmt 0 discriminator 1
 	adrp	x0, .LANCHOR3
@@ -19092,7 +19145,7 @@ FtlRead:
 	mov	w1, w25
 	mov	w2, 0
 	bl	FlashReadPages
-.LVL1954:
+.LVL1950:
 	.loc 3 883 0
 	ldr	w0, [x29, 144]
 	lsl	w0, w0, 9
@@ -19106,9 +19159,9 @@ FtlRead:
 	str	w0, [x29, 112]
 	ubfiz	x0, x25, 5, 32
 	mov	x25, 0
-.LVL1955:
+.LVL1951:
 	str	x0, [x29, 104]
-.LVL1956:
+.LVL1952:
 	.loc 3 883 0
 	add	x0, x22, :lo12:.LANCHOR12
 	str	x0, [x29, 96]
@@ -19121,8 +19174,8 @@ FtlRead:
 	bne	.L1495
 	.loc 3 879 0
 	ldr	x1, [x0, 8]
-	adrp	x0, .LANCHOR116
-	ldr	x0, [x0, #:lo12:.LANCHOR116]
+	adrp	x0, .LANCHOR115
+	ldr	x0, [x0, #:lo12:.LANCHOR115]
 	cmp	x1, x0
 	bne	.L1496
 	.loc 3 880 0
@@ -19133,7 +19186,7 @@ FtlRead:
 .L1513:
 	.loc 3 883 0
 	bl	ftl_memcpy
-.LVL1957:
+.LVL1953:
 .L1496:
 	.loc 3 885 0
 	ldr	x0, [x28, #:lo12:.LANCHOR120]
@@ -19145,28 +19198,28 @@ FtlRead:
 	ldr	x1, [x29, 128]
 	.loc 3 887 0
 	mov	w21, w0
-.LVL1958:
+.LVL1954:
 	.loc 3 886 0
 	ldr	x2, [x29, 128]
 	ldr	w1, [x1, 72]
 	add	w1, w1, 1
 	str	w1, [x2, 72]
-.LVL1959:
+.LVL1955:
 .L1498:
 	.loc 3 877 0 discriminator 2
 	ldr	x0, [x29, 104]
 	add	x25, x25, 32
-.LVL1960:
+.LVL1956:
 	cmp	x0, x25
 	bne	.L1499
 	.loc 3 894 0
 	mov	w25, 0
 	b	.L1484
-.LVL1961:
+.LVL1957:
 .L1488:
 	.loc 3 846 0
 	madd	w0, w20, w0, w4
-.LVL1962:
+.LVL1958:
 	.loc 3 847 0
 	cmp	w19, w0
 	bhi	.L1487
@@ -19176,7 +19229,7 @@ FtlRead:
 	bls	.L1487
 	.loc 3 848 0 is_stmt 1
 	sub	w0, w0, w19
-.LVL1963:
+.LVL1959:
 	str	x5, [x29, 112]
 	lsl	w0, w0, 9
 	str	w4, [x29, 120]
@@ -19184,16 +19237,16 @@ FtlRead:
 	mov	w1, 0
 	add	x0, x23, x0
 	bl	ftl_memset
-.LVL1964:
+.LVL1960:
 	ldr	w4, [x29, 120]
 	ldr	x5, [x29, 112]
-.LVL1965:
+.LVL1961:
 .L1487:
 	.loc 3 845 0 discriminator 2
 	add	w4, w4, 1
-.LVL1966:
+.LVL1962:
 	b	.L1486
-.LVL1967:
+.LVL1963:
 .L1485:
 	.loc 3 851 0
 	ldr	x2, [x28, #:lo12:.LANCHOR120]
@@ -19206,42 +19259,42 @@ FtlRead:
 	.loc 3 852 0
 	bne	.L1490
 	.loc 3 853 0
-	adrp	x1, .LANCHOR116
-	ldr	x1, [x1, #:lo12:.LANCHOR116]
+	adrp	x1, .LANCHOR115
+	ldr	x1, [x1, #:lo12:.LANCHOR115]
 	str	x1, [x0, 8]
 	.loc 3 854 0
 	ldrh	w1, [x22, #:lo12:.LANCHOR12]
 	udiv	w2, w19, w1
 	msub	w2, w2, w1, w19
 	str	w2, [x29, 152]
-.LVL1968:
+.LVL1964:
 	.loc 3 855 0
 	sub	w2, w1, w2
-.LVL1969:
+.LVL1965:
 	cmp	w27, w2
 	csel	w2, w27, w2, ls
-.LVL1970:
+.LVL1966:
 	str	w2, [x29, 148]
-.LVL1971:
+.LVL1967:
 	.loc 3 857 0
 	cmp	w1, w2
 	bne	.L1491
 	.loc 3 858 0
 	str	x23, [x0, 8]
-.LVL1972:
+.LVL1968:
 .L1491:
 	.loc 3 867 0
 	adrp	x1, .LANCHOR24
-	adrp	x2, .LANCHOR115
+	adrp	x2, .LANCHOR114
 	.loc 3 868 0
 	str	w20, [x0, 24]
 	.loc 3 867 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR24]
-	ldr	x2, [x2, #:lo12:.LANCHOR115]
+	ldr	x2, [x2, #:lo12:.LANCHOR114]
 	mul	w1, w1, w25
 	.loc 3 869 0
 	add	w25, w25, 1
-.LVL1973:
+.LVL1969:
 	.loc 3 867 0
 	and	x1, x1, 4294967292
 	add	x1, x2, x1
@@ -19254,21 +19307,21 @@ FtlRead:
 	.loc 3 861 0
 	ldrh	w2, [x22, #:lo12:.LANCHOR12]
 	.loc 3 860 0
-	adrp	x1, .LANCHOR114
+	adrp	x1, .LANCHOR113
 	.loc 3 861 0
 	ldr	w3, [x29, 140]
 	.loc 3 860 0
-	ldr	x1, [x1, #:lo12:.LANCHOR114]
+	ldr	x1, [x1, #:lo12:.LANCHOR113]
 	str	x1, [x0, 8]
 	.loc 3 861 0
 	mul	w1, w20, w2
 	sub	w3, w3, w1
 	str	w3, [x29, 144]
-.LVL1974:
+.LVL1970:
 	.loc 3 862 0
 	cmp	w2, w3
 	bne	.L1491
-.LVL1975:
+.LVL1971:
 .L1512:
 	.loc 3 865 0
 	sub	w1, w1, w19
@@ -19280,15 +19333,15 @@ FtlRead:
 	ldrh	w1, [x22, #:lo12:.LANCHOR12]
 	mul	w1, w1, w20
 	b	.L1512
-.LVL1976:
+.LVL1972:
 .L1495:
 	.loc 3 881 0
 	cmp	w24, w1
 	bne	.L1496
 	.loc 3 882 0
 	ldr	x1, [x0, 8]
-	adrp	x0, .LANCHOR114
-	ldr	x0, [x0, #:lo12:.LANCHOR114]
+	adrp	x0, .LANCHOR113
+	ldr	x0, [x0, #:lo12:.LANCHOR113]
 	cmp	x1, x0
 	bne	.L1496
 	.loc 3 883 0
@@ -19304,19 +19357,19 @@ FtlRead:
 	.loc 3 889 0
 	cmp	w0, 256
 	bne	.L1498
-.LBB297:
+.LBB332:
 	.loc 3 890 0
 	ldr	w0, [x1, 4]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL1977:
+.LVL1973:
 	.loc 3 891 0
 	bl	FtlGcRefreshBlock
-.LVL1978:
+.LVL1974:
 	b	.L1498
-.LVL1979:
+.LVL1975:
 .L1502:
-.LBE297:
+.LBE332:
 	.loc 3 831 0
 	mov	w21, -1
 	b	.L1481
@@ -19329,19 +19382,19 @@ FtlRead:
 	.type	sftl_read, %function
 sftl_read:
 .LFB219:
-	.loc 3 1204 0
+	.loc 3 1168 0
 	.cfi_startproc
-.LVL1980:
-	.loc 3 1205 0
+.LVL1976:
+	.loc 3 1169 0
 	mov	x3, x2
 	mov	w2, w1
-.LVL1981:
+.LVL1977:
 	mov	w1, w0
-.LVL1982:
+.LVL1978:
 	mov	w0, 0
-.LVL1983:
+.LVL1979:
 	b	FtlRead
-.LVL1984:
+.LVL1980:
 	.cfi_endproc
 .LFE219:
 	.size	sftl_read, .-sftl_read
@@ -19351,56 +19404,56 @@ sftl_read:
 	.type	FtlWrite, %function
 FtlWrite:
 .LFB217:
-	.loc 3 962 0
+	.loc 3 958 0
 	.cfi_startproc
-.LVL1985:
+.LVL1981:
 	stp	x29, x30, [sp, -240]!
 	.cfi_def_cfa_offset 240
 	.cfi_offset 29, -240
 	.cfi_offset 30, -232
 	and	w0, w0, 255
-	.loc 3 970 0
+	.loc 3 966 0
 	cmp	w0, 16
-	.loc 3 962 0
+	.loc 3 958 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -208
 	.cfi_offset 22, -200
-	mov	w22, w1
-	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -192
-	.cfi_offset 24, -184
-	mov	w24, w2
+	mov	w21, w1
 	stp	x25, x26, [sp, 64]
 	.cfi_offset 25, -176
 	.cfi_offset 26, -168
-	mov	x25, x3
+	mov	x26, x3
 	stp	x19, x20, [sp, 16]
+	stp	x23, x24, [sp, 48]
 	stp	x27, x28, [sp, 80]
 	.cfi_offset 19, -224
 	.cfi_offset 20, -216
+	.cfi_offset 23, -192
+	.cfi_offset 24, -184
 	.cfi_offset 27, -160
 	.cfi_offset 28, -152
-	.loc 3 970 0
+	.loc 3 958 0
+	str	w2, [x29, 176]
+	.loc 3 966 0
 	bne	.L1516
-	.loc 3 971 0
+	.loc 3 967 0
+	add	w0, w1, 256
+.LVL1982:
+	ldr	w1, [x29, 176]
+.LVL1983:
 	mov	x2, x3
-.LVL1986:
-	mov	w1, w24
-.LVL1987:
-	add	w0, w22, 256
-.LVL1988:
+.LVL1984:
 	bl	FtlVendorPartWrite
-.LVL1989:
+.LVL1985:
 .L1515:
-	.loc 3 1153 0
+	.loc 3 1117 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL1990:
 	ldp	x25, x26, [sp, 64]
-.LVL1991:
+.LVL1986:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 240
 	.cfi_remember_state
@@ -19417,678 +19470,596 @@ FtlWrite:
 	.cfi_restore 19
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
+.LVL1987:
 	ret
-.LVL1992:
+.LVL1988:
 .L1516:
 	.cfi_restore_state
-	.loc 3 974 0
+	.loc 3 970 0
+	ldr	w0, [x29, 176]
+	add	w0, w1, w0
+	str	w0, [x29, 168]
 	adrp	x0, .LANCHOR34
-	add	w2, w1, w2
-.LVL1993:
+	ldr	w1, [x29, 168]
+.LVL1989:
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
-	cmp	w2, w0
-	bhi	.L1556
-	.loc 3 974 0 is_stmt 0 discriminator 1
-	adrp	x0, .LANCHOR88
-	ldr	w0, [x0, #:lo12:.LANCHOR88]
+	cmp	w1, w0
+	bhi	.L1551
+	.loc 3 970 0 is_stmt 0 discriminator 1
+	adrp	x0, .LANCHOR86
+	ldr	w0, [x0, #:lo12:.LANCHOR86]
 	cmn	w0, #1
 	beq	.L1515
-	.loc 3 977 0 is_stmt 1
-	adrp	x0, .LANCHOR178
-	.loc 3 978 0
-	adrp	x3, .LANCHOR12
-.LVL1994:
-	.loc 3 977 0
+	.loc 3 973 0 is_stmt 1
+	adrp	x0, .LANCHOR176
 	mov	w1, 2048
-.LVL1995:
-	.loc 3 979 0
-	sub	w2, w2, #1
-	.loc 3 977 0
-	str	w1, [x0, #:lo12:.LANCHOR178]
+	.loc 3 974 0
+	adrp	x22, .LANCHOR12
+	.loc 3 973 0
+	str	w1, [x0, #:lo12:.LANCHOR176]
+	.loc 3 975 0
+	ldr	w1, [x29, 168]
+	.loc 3 974 0
+	ldrh	w0, [x22, #:lo12:.LANCHOR12]
+	.loc 3 975 0
+	sub	w1, w1, #1
+	.loc 3 974 0
+	udiv	w25, w21, w0
+.LVL1990:
+	.loc 3 975 0
+	udiv	w0, w1, w0
 	.loc 3 978 0
-	ldrh	w1, [x3, #:lo12:.LANCHOR12]
-	str	x3, [x29, 176]
-	.loc 3 979 0
-	udiv	w0, w2, w1
-	.loc 3 982 0
-	adrp	x2, .LANCHOR65
+	adrp	x1, .LANCHOR64
+	.loc 3 975 0
+	str	w0, [x29, 156]
+.LVL1991:
+	.loc 3 976 0
+	sub	w0, w0, w25
+.LVL1992:
+	add	w24, w0, 1
+.LVL1993:
+	str	w0, [x29, 152]
 	.loc 3 978 0
-	udiv	w21, w22, w1
-.LVL1996:
-	.loc 3 979 0
-	str	w0, [x29, 168]
-.LVL1997:
-	.loc 3 980 0
-	sub	w23, w0, w21
-	.loc 3 982 0
-	ldr	w0, [x2, #:lo12:.LANCHOR65]
-.LVL1998:
-	.loc 3 980 0
-	add	w26, w23, 1
-.LVL1999:
-	.loc 3 982 0
-	add	w0, w0, w26
-	str	w0, [x2, #:lo12:.LANCHOR65]
-	.loc 3 983 0
-	adrp	x0, .LANCHOR150
-	str	x0, [x29, 120]
-	ldr	x2, [x0, #:lo12:.LANCHOR150]
-	cbz	x2, .L1518
+	ldr	w0, [x1, #:lo12:.LANCHOR64]
+	add	w0, w0, w24
+	str	w0, [x1, #:lo12:.LANCHOR64]
+.LVL1994:
 	.loc 3 984 0
-	ldr	w0, [x2, 24]
-	cmp	w21, w0
-	beq	.L1519
-	.loc 3 985 0
-	bl	FtlCacheWriteBack
-.LVL2000:
-.L1518:
-	.loc 3 1008 0
-	adrp	x0, .LANCHOR179
-	str	x0, [x29, 152]
-	ldr	w1, [x0, #:lo12:.LANCHOR179]
+	adrp	x0, .LANCHOR177
+	str	x0, [x29, 160]
+	ldr	w1, [x0, #:lo12:.LANCHOR177]
 	adrp	x0, .LANCHOR51
 	add	x19, x0, :lo12:.LANCHOR51
-	cbz	w1, .L1521
-	.loc 3 1008 0 is_stmt 0 discriminator 1
+	cbz	w1, .L1518
+	.loc 3 984 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1521
-	.loc 3 1009 0 is_stmt 1
+	cbnz	w0, .L1518
+	.loc 3 985 0 is_stmt 1
 	adrp	x19, .LANCHOR52
 	add	x19, x19, :lo12:.LANCHOR52
-.L1521:
-	mov	w20, w21
-	.loc 3 1023 0
+.L1518:
+	mov	w20, w25
+	.loc 3 999 0
 	adrp	x0, .LANCHOR52
 	add	x0, x0, :lo12:.LANCHOR52
 	str	x0, [x29, 96]
-.LVL2001:
-.L1522:
-	.loc 3 1011 0
-	cbnz	w26, .L1552
-	.loc 3 1137 0
-	ldr	w0, [x29, 168]
-	sub	w1, w0, w21
+.LVL1995:
+.L1519:
+	.loc 3 987 0
+	cbnz	w24, .L1547
+	.loc 3 1101 0
+	ldr	w1, [x29, 152]
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-.LVL2002:
-	.loc 3 1139 0
+.LVL1996:
+	.loc 3 1103 0
 	adrp	x0, .LANCHOR48
-	mov	x20, x0
-.LVL2003:
+	mov	x22, x0
 	ldrh	w1, [x0, #:lo12:.LANCHOR48]
 	cmp	w1, 15
-	bhi	.L1553
-	.loc 3 1141 0
-	adrp	x22, .LANCHOR101
-.LVL2004:
-	.loc 3 1143 0
-	adrp	x21, .LANCHOR85
-.LVL2005:
-	.loc 3 1144 0
-	adrp	x19, .LANCHOR84
-.LVL2006:
-	.loc 3 1141 0
-	add	x22, x22, :lo12:.LANCHOR101
-	.loc 3 1143 0
-	add	x21, x21, :lo12:.LANCHOR85
-	.loc 3 1144 0
-	add	x19, x19, :lo12:.LANCHOR84
-.L1571:
-	.loc 3 1141 0
-	adrp	x0, .LANCHOR82
-	mov	w1, 65535
-	ldrh	w0, [x0, #:lo12:.LANCHOR82]
-	cmp	w0, w1
-	bne	.L1554
-	.loc 3 1141 0 is_stmt 0 discriminator 1
-	ldrh	w1, [x22]
-	cmp	w1, w0
-	bne	.L1554
-	.loc 3 1142 0 is_stmt 1
-	mov	w0, 0
-	bl	List_get_gc_head_node
-.LVL2007:
-	bl	FtlGcRefreshBlock
-.LVL2008:
-.L1554:
-	.loc 3 1143 0
-	mov	w0, 128
-	.loc 3 1145 0
-	mov	w1, 1
-	.loc 3 1143 0
-	strh	w0, [x21]
-	.loc 3 1144 0
-	strh	w0, [x19]
-	.loc 3 1145 0
-	mov	w0, w1
-	bl	rk_ftl_garbage_collect
-.LVL2009:
-	.loc 3 1146 0
-	mov	w1, 1
-	mov	w0, 0
-	bl	rk_ftl_garbage_collect
-.LVL2010:
-	.loc 3 1147 0
-	ldrh	w0, [x20, #:lo12:.LANCHOR48]
-	cmp	w0, 8
-	bls	.L1571
-	b	.L1553
-.LVL2011:
-.L1519:
-	.loc 3 987 0
-	adrp	x3, .LANCHOR66
-	ldr	w0, [x3, #:lo12:.LANCHOR66]
-	add	w0, w0, 1
-	str	w0, [x3, #:lo12:.LANCHOR66]
-	.loc 3 988 0
-	msub	w0, w21, w1, w22
-.LVL2012:
-	.loc 3 992 0
-	ldr	x3, [x2, 8]
-	.loc 3 989 0
-	sub	w1, w1, w0
-.LVL2013:
-	cmp	w24, w1
-	.loc 3 992 0
-	lsl	w0, w0, 9
-.LVL2014:
-	csel	w19, w24, w1, ls
-.LVL2015:
-	add	x0, x3, x0
-	lsl	w20, w19, 9
-	mov	x1, x25
-	mov	w2, w20
-	bl	ftl_memcpy
-.LVL2016:
-	.loc 3 994 0
-	cbnz	w23, .L1520
-.LVL2017:
-.L1553:
-	.loc 3 995 0
+	bls	.L1548
+.LVL1997:
+.L1550:
+	.loc 3 1116 0
 	mov	w0, 0
 	b	.L1515
-.LVL2018:
-.L1520:
-	.loc 3 996 0
-	sub	w24, w24, w19
-.LVL2019:
-	.loc 3 997 0
-	add	w22, w22, w19
-.LVL2020:
-	.loc 3 998 0
-	add	x25, x25, x20
-.LVL2021:
-	.loc 3 999 0
-	add	w21, w21, 1
-.LVL2022:
-	.loc 3 1000 0
-	bl	FtlCacheWriteBack
-.LVL2023:
-	mov	w26, w23
-	b	.L1518
-.LVL2024:
-.L1552:
-	.loc 3 1012 0
+.LVL1998:
+.L1547:
+	.loc 3 988 0
 	adrp	x0, .LANCHOR3
 	ldrb	w2, [x19, 6]
-	str	x0, [x29, 128]
+	str	x0, [x29, 120]
 	ldrh	w1, [x0, #:lo12:.LANCHOR3]
 	cmp	w2, w1
-	bcc	.L1523
-	.loc 3 1012 0 is_stmt 0 discriminator 1
-	adrp	x1, .LANCHOR180
+	bcc	.L1520
+	.loc 3 988 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR178
 	adrp	x0, .LC1
-	mov	w2, 1012
-	add	x1, x1, :lo12:.LANCHOR180
+	mov	w2, 988
+	add	x1, x1, :lo12:.LANCHOR178
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2025:
-.L1523:
-	.loc 3 1013 0 is_stmt 1
+.LVL1999:
+.L1520:
+	.loc 3 989 0 is_stmt 1
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1524
-	.loc 3 1014 0
-	bl	FtlCacheWriteBack
-.LVL2026:
-	.loc 3 1016 0
+	cbnz	w0, .L1521
+	.loc 3 992 0
 	adrp	x0, .LANCHOR51
 	add	x0, x0, :lo12:.LANCHOR51
 	cmp	x19, x0
-	bne	.L1525
-	.loc 3 1017 0
+	bne	.L1522
+	.loc 3 993 0
 	adrp	x0, .LANCHOR52
 	add	x0, x0, :lo12:.LANCHOR52
 	ldrh	w1, [x0, 4]
-	cbnz	w1, .L1526
-	.loc 3 1018 0
+	cbnz	w1, .L1523
+	.loc 3 994 0
 	bl	allocate_new_data_superblock
-.LVL2027:
-	.loc 3 1019 0
-	ldr	x0, [x29, 152]
-	str	wzr, [x0, #:lo12:.LANCHOR179]
-.L1526:
-	.loc 3 1021 0
+.LVL2000:
+	.loc 3 995 0
+	ldr	x0, [x29, 160]
+	str	wzr, [x0, #:lo12:.LANCHOR177]
+.L1523:
+	.loc 3 997 0
 	adrp	x0, .LANCHOR51
 	add	x19, x0, :lo12:.LANCHOR51
-.LVL2028:
+.LVL2001:
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.LVL2029:
-	.loc 3 1022 0
-	ldr	x0, [x29, 152]
-	ldr	w0, [x0, #:lo12:.LANCHOR179]
-	.loc 3 1023 0
+.LVL2002:
+	.loc 3 998 0
+	ldr	x0, [x29, 160]
+	ldr	w0, [x0, #:lo12:.LANCHOR177]
+	.loc 3 999 0
 	cmp	w0, 0
 	ldr	x0, [x29, 96]
 	csel	x19, x0, x19, ne
-.L1527:
-.LVL2030:
-	.loc 3 1033 0
+.L1524:
+.LVL2003:
+	.loc 3 1009 0
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1524
-	.loc 3 1034 0
+	cbnz	w0, .L1521
+	.loc 3 1010 0
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.LVL2031:
-.L1524:
-	.loc 3 1043 0
+.LVL2004:
+.L1521:
+	.loc 3 1019 0
 	ldrh	w0, [x19, 4]
-	.loc 3 1041 0
+	.loc 3 1017 0
 	ldrb	w1, [x19, 7]
-	cmp	w0, w26
-	csel	w0, w0, w26, ls
+	cmp	w0, w24
+	csel	w0, w0, w24, ls
 	lsl	w1, w1, 2
-	cmp	w0, w1
-	csel	w0, w0, w1, ls
-	str	w0, [x29, 160]
-.LVL2032:
-	.loc 3 1045 0
-	ldr	x0, [x29, 128]
-.LVL2033:
+	cmp	w1, w0
+	csel	w0, w1, w0, ls
+	str	w0, [x29, 148]
+.LVL2005:
+	.loc 3 1021 0
+	ldr	x0, [x29, 120]
+.LVL2006:
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1528
-	.loc 3 1045 0 is_stmt 0 discriminator 1
-	adrp	x1, .LANCHOR180
+	bcc	.L1525
+	.loc 3 1021 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR178
 	adrp	x0, .LC1
-	mov	w2, 1045
-	add	x1, x1, :lo12:.LANCHOR180
+	mov	w2, 1021
+	add	x1, x1, :lo12:.LANCHOR178
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2034:
-.L1528:
-	.loc 3 1055 0 is_stmt 1 discriminator 1
+.LVL2007:
+.L1525:
+	.loc 3 1031 0 is_stmt 1 discriminator 1
 	adrp	x0, .LANCHOR24
 	add	x0, x0, :lo12:.LANCHOR24
-	.loc 3 1068 0 discriminator 1
+	.loc 3 1044 0 discriminator 1
 	str	xzr, [x29, 184]
-	.loc 3 1055 0 discriminator 1
+	.loc 3 1031 0 discriminator 1
 	str	x0, [x29, 112]
-	.loc 3 1101 0 discriminator 1
+	.loc 3 1077 0 discriminator 1
 	adrp	x0, .LANCHOR23
 	add	x0, x0, :lo12:.LANCHOR23
 	str	x0, [x29, 104]
-.L1529:
-	.loc 3 1046 0 discriminator 1
-	ldr	w1, [x29, 160]
+.L1526:
+	.loc 3 1022 0 discriminator 1
+	ldr	w1, [x29, 148]
 	adrp	x28, .LANCHOR122
-	ldr	w27, [x29, 184]
-.LVL2035:
-	cmp	w27, w1
-	bcc	.L1550
-	mov	x27, x1
-.L1530:
-.LVL2036:
-	.loc 3 1133 0
+	ldr	w23, [x29, 184]
+.LVL2008:
+	cmp	w23, w1
+	bcc	.L1545
+	mov	x23, x1
+.L1527:
+.LVL2009:
+	.loc 3 1097 0
 	ldr	x0, [x28, #:lo12:.LANCHOR122]
 	mov	x3, x19
 	mov	w2, 0
-	mov	w1, w27
+	mov	w1, w23
 	bl	FtlProgPages
-.LVL2037:
-	.loc 3 1134 0
-	cmp	w26, w27
-	bcs	.L1551
-	.loc 3 1134 0 is_stmt 0 discriminator 1
-	adrp	x1, .LANCHOR180
+.LVL2010:
+	.loc 3 1098 0
+	cmp	w24, w23
+	bcs	.L1546
+	.loc 3 1098 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR178
 	adrp	x0, .LC1
-	mov	w2, 1134
-	add	x1, x1, :lo12:.LANCHOR180
+	mov	w2, 1098
+	add	x1, x1, :lo12:.LANCHOR178
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2038:
-.L1551:
-	.loc 3 1135 0 is_stmt 1
-	sub	w26, w26, w27
-.LVL2039:
-	b	.L1522
-.LVL2040:
-.L1525:
-	.loc 3 1027 0
-	ldr	x1, [x29, 152]
-	str	wzr, [x1, #:lo12:.LANCHOR179]
-	.loc 3 1028 0
+.LVL2011:
+.L1546:
+	.loc 3 1099 0 is_stmt 1
+	sub	w24, w24, w23
+.LVL2012:
+	b	.L1519
+.LVL2013:
+.L1522:
+	.loc 3 1003 0
+	ldr	x1, [x29, 160]
+	str	wzr, [x1, #:lo12:.LANCHOR177]
+	.loc 3 1004 0
 	ldrh	w1, [x0, 4]
-	cbnz	w1, .L1561
-	.loc 3 1029 0
+	cbnz	w1, .L1556
+	.loc 3 1005 0
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.LVL2041:
-	b	.L1527
-.L1561:
-	mov	x19, x0
-.LVL2042:
+.LVL2014:
 	b	.L1524
-.LVL2043:
-.L1550:
-	.loc 3 1047 0
+.L1556:
+	mov	x19, x0
+.LVL2015:
+	b	.L1521
+.LVL2016:
+.L1545:
+	.loc 3 1023 0
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1530
-	.loc 3 1051 0
+	cbz	w0, .L1527
+	.loc 3 1027 0
 	add	x1, x29, 204
 	mov	w2, 0
 	mov	w0, w20
 	bl	log2phys
-.LVL2044:
-	.loc 3 1052 0
+.LVL2017:
+	.loc 3 1028 0
 	mov	x0, x19
 	bl	get_new_active_ppa
-.LVL2045:
+.LVL2018:
 	ldr	x1, [x29, 184]
-	lsl	x23, x1, 5
-	.loc 3 1054 0
+	lsl	x27, x1, 5
+	.loc 3 1030 0
 	ldr	x1, [x28, #:lo12:.LANCHOR122]
-	add	x1, x1, x23
+	add	x1, x1, x27
 	str	w0, [x1, 4]
-	.loc 3 1055 0
+	.loc 3 1031 0
 	ldr	x0, [x29, 112]
-.LVL2046:
-	.loc 3 1056 0
+.LVL2019:
+	.loc 3 1032 0
 	str	w20, [x1, 24]
-	.loc 3 1055 0
+	.loc 3 1031 0
 	ldrh	w2, [x0]
-	mul	w27, w27, w2
-	and	x0, x27, 4294967292
-	str	x0, [x29, 144]
-	adrp	x0, .LANCHOR115
-	ldr	x3, [x29, 144]
-	ldr	x0, [x0, #:lo12:.LANCHOR115]
+	mul	w23, w23, w2
+	and	x0, x23, 4294967292
 	str	x0, [x29, 136]
-	add	x27, x0, x3
-.LVL2047:
-	str	x27, [x1, 16]
-	.loc 3 1059 0
-	mov	x0, x27
+	adrp	x0, .LANCHOR114
+	ldr	x3, [x29, 136]
+	ldr	x0, [x0, #:lo12:.LANCHOR114]
+	str	x0, [x29, 128]
+	add	x23, x0, x3
+.LVL2020:
+	str	x23, [x1, 16]
+	.loc 3 1035 0
+	mov	x0, x23
 	mov	w1, 0
-.LVL2048:
+.LVL2021:
 	bl	ftl_memset
-.LVL2049:
-	.loc 3 1061 0
-	ldr	w0, [x29, 168]
-	cmp	w20, w21
+.LVL2022:
+	.loc 3 1037 0
+	ldr	w0, [x29, 156]
+	cmp	w20, w25
 	ccmp	w20, w0, 4, ne
-	bne	.L1531
-	.loc 3 1062 0
-	cmp	w20, w21
-	bne	.L1532
-	.loc 3 1063 0
-	ldr	x0, [x29, 176]
-	ldrh	w2, [x0, #:lo12:.LANCHOR12]
-	udiv	w0, w22, w2
-	msub	w0, w0, w2, w22
-	str	w0, [x29, 164]
-.LVL2050:
-	.loc 3 1064 0
-	sub	w2, w2, w0
-	cmp	w2, w24
-	csel	w0, w2, w24, ls
-.LVL2051:
+	bne	.L1528
+	.loc 3 1038 0
+	cmp	w20, w25
+	bne	.L1529
+	.loc 3 1039 0
+	ldrh	w2, [x22, #:lo12:.LANCHOR12]
+	udiv	w0, w21, w2
+	msub	w0, w0, w2, w21
 	str	w0, [x29, 172]
-.LVL2052:
-.L1533:
-	.loc 3 1072 0
-	ldr	x0, [x29, 176]
-	ldr	w1, [x29, 172]
-	ldrh	w0, [x0, #:lo12:.LANCHOR12]
+.LVL2023:
+	.loc 3 1040 0
+	sub	w2, w2, w0
+	ldr	w0, [x29, 176]
+.LVL2024:
+	cmp	w2, w0
+	csel	w0, w2, w0, ls
+	str	w0, [x29, 180]
+.LVL2025:
+.L1530:
+	.loc 3 1048 0
+	ldrh	w0, [x22, #:lo12:.LANCHOR12]
+	ldr	w1, [x29, 180]
 	cmp	w1, w0
-	.loc 3 1074 0
+	.loc 3 1050 0
 	ldr	x0, [x28, #:lo12:.LANCHOR122]
-	.loc 3 1072 0
-	bne	.L1534
-	.loc 3 1074 0
-	add	x23, x0, x23
-	.loc 3 1073 0
-	cmp	w20, w21
-	bne	.L1535
-	.loc 3 1074 0
-	str	x25, [x23, 8]
-.LVL2053:
-.L1536:
-	.loc 3 1119 0
-	ldr	x0, [x29, 128]
+	.loc 3 1048 0
+	bne	.L1531
+	.loc 3 1050 0
+	add	x3, x0, x27
+	.loc 3 1049 0
+	cmp	w20, w25
+	bne	.L1532
+	.loc 3 1050 0
+	str	x26, [x3, 8]
+.LVL2026:
+.L1533:
+	.loc 3 1089 0
+	ldr	x0, [x29, 120]
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1547
-	.loc 3 1119 0 is_stmt 0 discriminator 1
-	adrp	x1, .LANCHOR180
+	bcc	.L1542
+	.loc 3 1089 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR178
 	adrp	x0, .LC1
-	mov	w2, 1119
-	add	x1, x1, :lo12:.LANCHOR180
+	mov	w2, 1089
+	add	x1, x1, :lo12:.LANCHOR178
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2054:
-.L1547:
-	.loc 3 1120 0 is_stmt 1
-	ldp	x1, x2, [x29, 136]
+.LVL2027:
+.L1542:
+	.loc 3 1090 0 is_stmt 1
+	ldp	x1, x2, [x29, 128]
 	mov	w0, -3947
 	strh	w0, [x1, x2]
-	.loc 3 1121 0
-	adrp	x1, .LANCHOR72
-	ldr	w0, [x1, #:lo12:.LANCHOR72]
-	.loc 3 1122 0
-	stp	w0, w20, [x27, 4]
-	.loc 3 1125 0
+	.loc 3 1091 0
+	adrp	x1, .LANCHOR71
+	ldr	w0, [x1, #:lo12:.LANCHOR71]
+	.loc 3 1092 0
+	stp	w0, w20, [x23, 4]
+	.loc 3 1095 0
 	add	w20, w20, 1
-.LVL2055:
-	.loc 3 1121 0
+.LVL2028:
+	.loc 3 1091 0
 	add	w0, w0, 1
 	cmn	w0, #1
 	csel	w0, w0, wzr, ne
-	str	w0, [x1, #:lo12:.LANCHOR72]
-	.loc 3 1123 0
+	str	w0, [x1, #:lo12:.LANCHOR71]
+	.loc 3 1093 0
 	ldr	w0, [x29, 204]
-	str	w0, [x27, 12]
-	.loc 3 1124 0
+	str	w0, [x23, 12]
+	.loc 3 1094 0
 	ldrh	w0, [x19]
-	strh	w0, [x27, 2]
+	strh	w0, [x23, 2]
 	ldr	x0, [x29, 184]
 	add	x0, x0, 1
 	str	x0, [x29, 184]
-	b	.L1529
-.LVL2056:
-.L1532:
-	.loc 3 1069 0
-	ldr	x0, [x29, 176]
-	add	w2, w22, w24
-	.loc 3 1068 0
-	str	wzr, [x29, 164]
-	.loc 3 1069 0
-	ldrh	w0, [x0, #:lo12:.LANCHOR12]
-	msub	w2, w20, w0, w2
+	b	.L1526
+.LVL2029:
+.L1529:
+	.loc 3 1045 0
+	ldr	w0, [x29, 168]
+	ldrh	w2, [x22, #:lo12:.LANCHOR12]
+	.loc 3 1044 0
+	str	wzr, [x29, 172]
+	.loc 3 1045 0
+	msub	w2, w20, w2, w0
 	and	w0, w2, 65535
-	str	w0, [x29, 172]
-.LVL2057:
-	b	.L1533
-.LVL2058:
-.L1535:
-	.loc 3 1076 0
-	ldr	w0, [x29, 172]
-.LVL2059:
-.L1574:
-	.loc 3 1117 0
+	str	w0, [x29, 180]
+.LVL2030:
+	b	.L1530
+.LVL2031:
+.L1532:
+	.loc 3 1052 0
+	ldr	w0, [x29, 180]
+.LVL2032:
+.L1563:
+	.loc 3 1087 0
 	mul	w0, w0, w20
-	sub	w0, w0, w22
+	sub	w0, w0, w21
 	lsl	w0, w0, 9
-	add	x0, x25, x0
-	str	x0, [x23, 8]
-	b	.L1536
-.LVL2060:
-.L1534:
-	.loc 3 1080 0
-	add	x0, x0, x23
-	.loc 3 1079 0
-	cmp	w20, w21
-	bne	.L1537
-	.loc 3 1080 0
-	adrp	x1, .LANCHOR116
-	ldr	x1, [x1, #:lo12:.LANCHOR116]
-.L1573:
-	.loc 3 1082 0
+	add	x0, x26, x0
+	str	x0, [x3, 8]
+	b	.L1533
+.LVL2033:
+.L1531:
+	.loc 3 1056 0
+	add	x0, x0, x27
+	.loc 3 1055 0
+	cmp	w20, w25
+	bne	.L1534
+	.loc 3 1056 0
+	adrp	x1, .LANCHOR115
+	ldr	x1, [x1, #:lo12:.LANCHOR115]
+.L1562:
+	.loc 3 1058 0
 	str	x1, [x0, 8]
-	.loc 3 1084 0
+	.loc 3 1060 0
 	ldr	w0, [x29, 204]
 	cmn	w0, #1
-	beq	.L1539
-.LBB298:
-	.loc 3 1086 0
+	beq	.L1536
+.LBB333:
+	.loc 3 1062 0
 	str	w0, [x29, 212]
-	.loc 3 1090 0
+	.loc 3 1066 0
 	mov	w2, 0
-	.loc 3 1088 0
+	.loc 3 1064 0
 	ldr	x0, [x28, #:lo12:.LANCHOR122]
-	.loc 3 1087 0
+	.loc 3 1063 0
 	str	w20, [x29, 232]
-	.loc 3 1088 0
-	add	x0, x0, x23
-	.loc 3 1089 0
+	.loc 3 1064 0
+	add	x0, x0, x27
+	.loc 3 1065 0
 	ldp	x1, x0, [x0, 8]
 	stp	x1, x0, [x29, 216]
-	.loc 3 1090 0
+	.loc 3 1066 0
 	mov	w1, 1
 	add	x0, x29, 208
 	bl	FlashReadPages
-.LVL2061:
-	.loc 3 1091 0
+.LVL2034:
+	.loc 3 1067 0
 	ldr	w0, [x29, 208]
 	cmn	w0, #1
-	bne	.L1540
-	.loc 3 1092 0
-	adrp	x0, .LANCHOR83
-	add	x0, x0, :lo12:.LANCHOR83
+	bne	.L1537
+	.loc 3 1068 0
+	adrp	x0, .LANCHOR81
+	add	x0, x0, :lo12:.LANCHOR81
 	ldr	w1, [x0, 72]
 	add	w1, w1, 1
 	str	w1, [x0, 72]
-.L1543:
-	ldr	w0, [x29, 172]
-.LBE298:
-	.loc 3 1104 0
-	cmp	w20, w21
+.L1540:
+	ldr	w0, [x29, 180]
+.LBE333:
+	.loc 3 1080 0
+	cmp	w20, w25
 	lsl	w2, w0, 9
-	bne	.L1544
-	.loc 3 1105 0
-	ldr	x1, [x28, #:lo12:.LANCHOR122]
-	ldr	w0, [x29, 164]
-	add	x1, x1, x23
+	bne	.L1541
+	.loc 3 1081 0
+	ldr	x0, [x28, #:lo12:.LANCHOR122]
+	mov	x1, x26
+	add	x3, x0, x27
+	ldr	w0, [x29, 172]
+	ldr	x3, [x3, 8]
 	lsl	w0, w0, 9
-	ldr	x3, [x1, 8]
-	mov	x1, x25
 	add	x0, x3, x0
+.L1564:
+	.loc 3 1083 0
 	bl	ftl_memcpy
-.LVL2062:
-	.loc 3 1109 0
-	ldr	w0, [x29, 168]
-	cmp	w20, w0
-	bne	.L1536
-.L1545:
-	.loc 3 1110 0
-	ldrh	w0, [x19, 4]
-	cbz	w0, .L1536
-	.loc 3 1111 0
-	ldr	x0, [x28, #:lo12:.LANCHOR122]
-	add	x23, x0, x23
-	ldr	x0, [x29, 120]
-	str	x23, [x0, #:lo12:.LANCHOR150]
-	.loc 3 1112 0
-	adrp	x0, .LANCHOR171
-	str	x19, [x0, #:lo12:.LANCHOR171]
-	b	.L1536
+.LVL2035:
+	b	.L1533
+.L1534:
+	.loc 3 1058 0
+	adrp	x1, .LANCHOR113
+	ldr	x1, [x1, #:lo12:.LANCHOR113]
+	b	.L1562
 .L1537:
-	.loc 3 1082 0
-	adrp	x1, .LANCHOR114
-	ldr	x1, [x1, #:lo12:.LANCHOR114]
-	b	.L1573
-.L1540:
-.LBB299:
-	.loc 3 1094 0
-	ldr	w1, [x27, 8]
+.LBB334:
+	.loc 3 1070 0
+	ldr	w1, [x23, 8]
 	cmp	w20, w1
-	beq	.L1542
-	.loc 3 1095 0
-	adrp	x0, .LANCHOR83
-	add	x0, x0, :lo12:.LANCHOR83
+	beq	.L1539
+	.loc 3 1071 0
+	adrp	x0, .LANCHOR81
+	add	x0, x0, :lo12:.LANCHOR81
 	ldr	w2, [x0, 72]
 	add	w2, w2, 1
 	str	w2, [x0, 72]
-	.loc 3 1096 0
-	adrp	x0, .LC105
+	.loc 3 1072 0
+	adrp	x0, .LC108
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC105
+	add	x0, x0, :lo12:.LC108
 	bl	printf
-.LVL2063:
-.L1542:
-	.loc 3 1098 0
-	ldr	w0, [x27, 8]
+.LVL2036:
+.L1539:
+	.loc 3 1074 0
+	ldr	w0, [x23, 8]
 	cmp	w20, w0
-	beq	.L1543
-	.loc 3 1098 0 is_stmt 0 discriminator 1
-	mov	w2, 1098
-	adrp	x1, .LANCHOR180
+	beq	.L1540
+	.loc 3 1074 0 is_stmt 0 discriminator 1
+	mov	w2, 1074
+	adrp	x1, .LANCHOR178
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR180
+	add	x1, x1, :lo12:.LANCHOR178
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2064:
-	b	.L1543
-.LVL2065:
-.L1539:
-.LBE299:
-	.loc 3 1101 0 is_stmt 1
+.LVL2037:
+	b	.L1540
+.LVL2038:
+.L1536:
+.LBE334:
+	.loc 3 1077 0 is_stmt 1
 	ldr	x0, [x28, #:lo12:.LANCHOR122]
 	ldr	x1, [x29, 104]
-	add	x0, x0, x23
+	add	x0, x0, x27
 	ldrh	w2, [x1]
 	mov	w1, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-.LVL2066:
-	b	.L1543
-.L1544:
-	.loc 3 1107 0
-	ldr	x0, [x29, 176]
-	ldrh	w1, [x0, #:lo12:.LANCHOR12]
+.LVL2039:
+	b	.L1540
+.L1541:
+	.loc 3 1083 0
+	ldrh	w1, [x22, #:lo12:.LANCHOR12]
 	ldr	x0, [x28, #:lo12:.LANCHOR122]
-	add	x0, x0, x23
+	add	x3, x0, x27
 	mul	w1, w1, w20
-	ldr	x0, [x0, 8]
-	sub	w1, w1, w22
+	sub	w1, w1, w21
+	ldr	x0, [x3, 8]
 	lsl	w1, w1, 9
-	add	x1, x25, x1
-	bl	ftl_memcpy
-.LVL2067:
-	b	.L1545
-.LVL2068:
-.L1531:
-	.loc 3 1117 0
+	add	x1, x26, x1
+	b	.L1564
+.LVL2040:
+.L1528:
+	.loc 3 1087 0
 	ldr	x0, [x28, #:lo12:.LANCHOR122]
-	add	x23, x0, x23
-	ldr	x0, [x29, 176]
-	ldrh	w0, [x0, #:lo12:.LANCHOR12]
-	b	.L1574
-.LVL2069:
-.L1556:
-	.loc 3 975 0
+	add	x3, x0, x27
+	ldrh	w0, [x22, #:lo12:.LANCHOR12]
+	b	.L1563
+.LVL2041:
+.L1548:
+	.loc 3 1105 0
+	adrp	x21, .LANCHOR99
+.LVL2042:
+	.loc 3 1107 0
+	adrp	x20, .LANCHOR83
+.LVL2043:
+	.loc 3 1108 0
+	adrp	x19, .LANCHOR82
+.LVL2044:
+	.loc 3 1105 0
+	add	x21, x21, :lo12:.LANCHOR99
+	.loc 3 1107 0
+	add	x20, x20, :lo12:.LANCHOR83
+	.loc 3 1108 0
+	add	x19, x19, :lo12:.LANCHOR82
+.L1560:
+	.loc 3 1105 0
+	adrp	x0, .LANCHOR80
+	mov	w1, 65535
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	cmp	w0, w1
+	bne	.L1549
+	.loc 3 1105 0 is_stmt 0 discriminator 1
+	ldrh	w1, [x21]
+	cmp	w1, w0
+	bne	.L1549
+	.loc 3 1106 0 is_stmt 1
+	mov	w0, 0
+	bl	List_get_gc_head_node
+.LVL2045:
+	bl	FtlGcRefreshBlock
+.LVL2046:
+.L1549:
+	.loc 3 1107 0
+	mov	w0, 128
+	.loc 3 1109 0
+	mov	w1, 1
+	.loc 3 1107 0
+	strh	w0, [x20]
+	.loc 3 1108 0
+	strh	w0, [x19]
+	.loc 3 1109 0
+	mov	w0, w1
+	bl	rk_ftl_garbage_collect
+.LVL2047:
+	.loc 3 1110 0
+	mov	w1, 1
+	mov	w0, 0
+	bl	rk_ftl_garbage_collect
+.LVL2048:
+	.loc 3 1111 0
+	ldrh	w0, [x22, #:lo12:.LANCHOR48]
+	cmp	w0, 8
+	bls	.L1560
+	b	.L1550
+.LVL2049:
+.L1551:
+	.loc 3 971 0
 	mov	w0, -1
 	b	.L1515
 	.cfi_endproc
@@ -20100,19 +20071,19 @@ FtlWrite:
 	.type	sftl_write, %function
 sftl_write:
 .LFB220:
-	.loc 3 1209 0
+	.loc 3 1173 0
 	.cfi_startproc
-.LVL2070:
-	.loc 3 1210 0
+.LVL2050:
+	.loc 3 1174 0
 	mov	x3, x2
 	mov	w2, w1
-.LVL2071:
+.LVL2051:
 	mov	w1, w0
-.LVL2072:
+.LVL2052:
 	mov	w0, 0
-.LVL2073:
+.LVL2053:
 	b	FtlWrite
-.LVL2074:
+.LVL2054:
 	.cfi_endproc
 .LFE220:
 	.size	sftl_write, .-sftl_write
@@ -20122,73 +20093,73 @@ sftl_write:
 	.type	FtlLoadSysInfo, %function
 FtlLoadSysInfo:
 .LFB274:
-	.loc 2 1360 0
+	.loc 2 1409 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -96]!
 	.cfi_def_cfa_offset 96
 	.cfi_offset 29, -96
 	.cfi_offset 30, -88
-	.loc 2 1368 0
+	.loc 2 1417 0
 	mov	w1, 0
-	.loc 2 1360 0
+	.loc 2 1409 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -80
 	.cfi_offset 20, -72
-	.loc 2 1365 0
-	adrp	x19, .LANCHOR108
-	.loc 2 1360 0
+	.loc 2 1414 0
+	adrp	x19, .LANCHOR106
+	.loc 2 1409 0
 	stp	x23, x24, [sp, 48]
 	.cfi_offset 23, -48
 	.cfi_offset 24, -40
-	.loc 2 1365 0
-	adrp	x23, .LANCHOR39
-	.loc 2 1360 0
+	.loc 2 1414 0
+	adrp	x23, .LANCHOR107
+	.loc 2 1409 0
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -64
 	.cfi_offset 22, -56
-	.loc 2 1365 0
-	add	x21, x19, :lo12:.LANCHOR108
-	.loc 2 1360 0
+	.loc 2 1414 0
+	add	x21, x19, :lo12:.LANCHOR106
+	.loc 2 1409 0
 	stp	x25, x26, [sp, 64]
 	.cfi_offset 25, -32
 	.cfi_offset 26, -24
-	.loc 2 1366 0
-	adrp	x26, .LANCHOR109
-	.loc 2 1360 0
+	.loc 2 1415 0
+	adrp	x26, .LANCHOR108
+	.loc 2 1409 0
 	stp	x27, x28, [sp, 80]
 	.cfi_offset 27, -16
 	.cfi_offset 28, -8
-	.loc 2 1368 0
-	adrp	x25, .LANCHOR43
-	.loc 2 1365 0
-	ldr	x0, [x23, #:lo12:.LANCHOR39]
-	.loc 2 1368 0
+	.loc 2 1417 0
+	adrp	x25, .LANCHOR42
+	.loc 2 1414 0
+	ldr	x0, [x23, #:lo12:.LANCHOR107]
+	.loc 2 1417 0
 	adrp	x24, .LANCHOR5
-	.loc 2 1365 0
+	.loc 2 1414 0
 	str	x0, [x21, 8]
-	.loc 2 1369 0
-	adrp	x20, .LANCHOR81
-	.loc 2 1366 0
-	ldr	x0, [x26, #:lo12:.LANCHOR109]
+	.loc 2 1418 0
+	adrp	x20, .LANCHOR79
+	.loc 2 1415 0
+	ldr	x0, [x26, #:lo12:.LANCHOR108]
 	str	x0, [x21, 16]
-	.loc 2 1368 0
-	ldr	x0, [x25, #:lo12:.LANCHOR43]
+	.loc 2 1417 0
+	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	ldrh	w2, [x24, #:lo12:.LANCHOR5]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL2075:
-	.loc 2 1369 0
-	ldrh	w0, [x20, #:lo12:.LANCHOR81]
+.LVL2055:
+	.loc 2 1418 0
+	ldrh	w0, [x20, #:lo12:.LANCHOR79]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L1577
-.L1585:
-	.loc 2 1370 0
+	bne	.L1567
+.L1575:
+	.loc 2 1419 0
 	mov	w0, -1
-.L1576:
-	.loc 2 1463 0
+.L1566:
+	.loc 2 1512 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -20210,71 +20181,71 @@ FtlLoadSysInfo:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.L1577:
+.L1567:
 	.cfi_restore_state
-	add	x27, x20, :lo12:.LANCHOR81
-	.loc 2 1372 0
+	add	x27, x20, :lo12:.LANCHOR79
+	.loc 2 1421 0
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
-.LVL2076:
+.LVL2056:
 	sxth	w22, w0
-.LVL2077:
-	.loc 2 1373 0
+.LVL2057:
+	.loc 2 1422 0
 	add	w0, w0, 1
-	.loc 2 1382 0
+	.loc 2 1431 0
 	mov	w28, 61604
-	.loc 2 1373 0
+	.loc 2 1422 0
 	strh	w0, [x27, 2]
-	.loc 2 1381 0
+	.loc 2 1430 0
 	mov	w27, 19539
 	movk	w27, 0x4654, lsl 16
-.L1579:
-	.loc 2 1375 0
-	tbz	w22, #31, .L1582
-	.loc 2 1388 0
-	adrp	x1, .LANCHOR181
+.L1569:
+	.loc 2 1424 0
+	tbz	w22, #31, .L1572
+	.loc 2 1437 0
+	adrp	x1, .LANCHOR179
 	adrp	x0, .LC1
-	mov	w2, 1388
-	add	x1, x1, :lo12:.LANCHOR181
+	mov	w2, 1437
+	add	x1, x1, :lo12:.LANCHOR179
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2078:
-.L1581:
-	.loc 2 1390 0
+.LVL2058:
+.L1571:
+	.loc 2 1439 0
 	adrp	x1, .LANCHOR23
 	ldrh	w0, [x24, #:lo12:.LANCHOR5]
 	ldrh	w1, [x1, #:lo12:.LANCHOR23]
 	add	x0, x0, 24
 	cmp	x1, x0, lsl 1
-	bcs	.L1584
-	.loc 2 1390 0 is_stmt 0 discriminator 1
-	adrp	x1, .LANCHOR181
+	bcs	.L1574
+	.loc 2 1439 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR179
 	adrp	x0, .LC1
-	mov	w2, 1390
-	add	x1, x1, :lo12:.LANCHOR181
+	mov	w2, 1439
+	add	x1, x1, :lo12:.LANCHOR179
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2079:
-.L1584:
-	.loc 2 1392 0 is_stmt 1
-	add	x22, x19, :lo12:.LANCHOR108
-.LVL2080:
-	adrp	x19, .LANCHOR79
-	add	x21, x19, :lo12:.LANCHOR79
+.LVL2059:
+.L1574:
+	.loc 2 1441 0 is_stmt 1
+	add	x22, x19, :lo12:.LANCHOR106
+.LVL2060:
+	adrp	x19, .LANCHOR39
+	add	x21, x19, :lo12:.LANCHOR39
 	mov	w2, 48
 	mov	x0, x21
 	ldr	x1, [x22, 8]
 	bl	ftl_memcpy
-.LVL2081:
-	.loc 2 1393 0
-	ldr	x0, [x25, #:lo12:.LANCHOR43]
+.LVL2061:
+	.loc 2 1442 0
+	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	ldrh	w2, [x24, #:lo12:.LANCHOR5]
 	ldr	x1, [x22, 8]
 	lsl	w2, w2, 1
 	add	x1, x1, 48
 	bl	ftl_memcpy
-.LVL2082:
-	.loc 2 1394 0
+.LVL2062:
+	.loc 2 1443 0
 	ldrh	w1, [x24, #:lo12:.LANCHOR5]
 	ldr	x0, [x22, 8]
 	lsr	w2, w1, 3
@@ -20286,267 +20257,267 @@ FtlLoadSysInfo:
 	adrp	x0, .LANCHOR1
 	ldr	x0, [x0, #:lo12:.LANCHOR1]
 	bl	ftl_memcpy
-.LVL2083:
-	.loc 2 1396 0
-	ldr	w1, [x19, #:lo12:.LANCHOR79]
+.LVL2063:
+	.loc 2 1445 0
+	ldr	w1, [x19, #:lo12:.LANCHOR39]
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1585
-	.loc 2 1399 0
-	add	x20, x20, :lo12:.LANCHOR81
-	.loc 2 1400 0
+	bne	.L1575
+	.loc 2 1448 0
+	add	x20, x20, :lo12:.LANCHOR79
+	.loc 2 1449 0
 	adrp	x0, .LANCHOR10
-	.loc 2 1399 0
+	.loc 2 1448 0
 	ldrh	w1, [x21, 8]
-	.loc 2 1400 0
+	.loc 2 1449 0
 	ldrb	w2, [x21, 10]
 	ldrh	w0, [x0, #:lo12:.LANCHOR10]
-	.loc 2 1399 0
+	.loc 2 1448 0
 	strh	w1, [x20, 6]
-	.loc 2 1400 0
+	.loc 2 1449 0
 	cmp	w2, w0
-	bne	.L1585
-	.loc 2 1403 0
-	adrp	x0, .LANCHOR182
-	.loc 2 1404 0
-	adrp	x2, .LANCHOR62
-	.loc 2 1406 0
+	bne	.L1575
+	.loc 2 1452 0
+	adrp	x0, .LANCHOR180
+	.loc 2 1453 0
+	adrp	x2, .LANCHOR61
+	.loc 2 1455 0
 	adrp	x3, .LANCHOR3
-	.loc 2 1403 0
-	str	w1, [x0, #:lo12:.LANCHOR182]
-	.loc 2 1404 0
+	.loc 2 1452 0
+	str	w1, [x0, #:lo12:.LANCHOR180]
+	.loc 2 1453 0
 	adrp	x0, .LANCHOR19
-	.loc 2 1406 0
+	.loc 2 1455 0
 	ldrh	w3, [x3, #:lo12:.LANCHOR3]
-	.loc 2 1404 0
+	.loc 2 1453 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	mul	w0, w0, w1
-	str	w0, [x2, #:lo12:.LANCHOR62]
-	.loc 2 1405 0
+	str	w0, [x2, #:lo12:.LANCHOR61]
+	.loc 2 1454 0
 	adrp	x2, .LANCHOR12
 	ldrh	w2, [x2, #:lo12:.LANCHOR12]
 	mul	w0, w2, w0
 	adrp	x2, .LANCHOR34
 	str	w0, [x2, #:lo12:.LANCHOR34]
-	.loc 2 1406 0
+	.loc 2 1455 0
 	adrp	x0, .LANCHOR7
 	ldr	w2, [x0, #:lo12:.LANCHOR7]
 	adrp	x0, .LANCHOR37+6
 	ldrh	w0, [x0, #:lo12:.LANCHOR37+6]
-	.loc 2 1412 0
+	.loc 2 1461 0
 	cmp	w1, w2
-	.loc 2 1406 0
+	.loc 2 1455 0
 	sub	w0, w2, w0
 	sub	w0, w0, w1
 	udiv	w0, w0, w3
-	adrp	x3, .LANCHOR80
-	strh	w0, [x3, #:lo12:.LANCHOR80]
-	.loc 2 1412 0
-	bls	.L1586
-	.loc 2 1412 0 is_stmt 0 discriminator 1
-	adrp	x1, .LANCHOR181
+	adrp	x3, .LANCHOR78
+	strh	w0, [x3, #:lo12:.LANCHOR78]
+	.loc 2 1461 0
+	bls	.L1576
+	.loc 2 1461 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR179
 	adrp	x0, .LC1
-	mov	w2, 1412
-	add	x1, x1, :lo12:.LANCHOR181
+	mov	w2, 1461
+	add	x1, x1, :lo12:.LANCHOR179
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2084:
-.L1586:
-	.loc 2 1414 0 is_stmt 1
-	add	x1, x19, :lo12:.LANCHOR79
+.LVL2064:
+.L1576:
+	.loc 2 1463 0 is_stmt 1
+	add	x1, x19, :lo12:.LANCHOR39
 	adrp	x0, .LANCHOR51
 	add	x3, x0, :lo12:.LANCHOR51
-	.loc 2 1419 0
-	adrp	x20, .LANCHOR82
-	.loc 2 1415 0
+	.loc 2 1468 0
+	adrp	x20, .LANCHOR80
+	.loc 2 1464 0
 	ldrh	w2, [x1, 16]
-	.loc 2 1414 0
+	.loc 2 1463 0
 	ldrh	w6, [x1, 14]
 	strh	w6, [x0, #:lo12:.LANCHOR51]
-	.loc 2 1415 0
+	.loc 2 1464 0
 	lsr	w4, w2, 6
-	.loc 2 1416 0
+	.loc 2 1465 0
 	and	w2, w2, 63
 	strb	w2, [x3, 6]
-	.loc 2 1417 0
+	.loc 2 1466 0
 	ldrb	w2, [x1, 11]
 	strb	w2, [x3, 8]
-	.loc 2 1419 0
-	add	x2, x20, :lo12:.LANCHOR82
-	.loc 2 1415 0
+	.loc 2 1468 0
+	add	x2, x20, :lo12:.LANCHOR80
+	.loc 2 1464 0
 	strh	w4, [x3, 2]
-	.loc 2 1419 0
+	.loc 2 1468 0
 	mov	w3, -1
-	strh	w3, [x20, #:lo12:.LANCHOR82]
-	.loc 2 1420 0
+	strh	w3, [x20, #:lo12:.LANCHOR80]
+	.loc 2 1469 0
 	strh	wzr, [x2, 2]
-	.loc 2 1421 0
+	.loc 2 1470 0
 	strb	wzr, [x2, 6]
-	.loc 2 1422 0
+	.loc 2 1471 0
 	strb	wzr, [x2, 8]
-	.loc 2 1424 0
+	.loc 2 1473 0
 	adrp	x2, .LANCHOR52
 	ldrh	w3, [x1, 18]
 	add	x4, x2, :lo12:.LANCHOR52
 	strh	w3, [x2, #:lo12:.LANCHOR52]
 	mov	x21, x2
-	.loc 2 1425 0
+	.loc 2 1474 0
 	ldrh	w3, [x1, 20]
 	lsr	w5, w3, 6
-	.loc 2 1426 0
+	.loc 2 1475 0
 	and	w3, w3, 63
 	strb	w3, [x4, 6]
-	.loc 2 1427 0
+	.loc 2 1476 0
 	ldrb	w3, [x1, 12]
-	.loc 2 1425 0
+	.loc 2 1474 0
 	strh	w5, [x4, 2]
-	.loc 2 1427 0
+	.loc 2 1476 0
 	strb	w3, [x4, 8]
-	.loc 2 1429 0
+	.loc 2 1478 0
 	adrp	x4, .LANCHOR53
 	ldrh	w3, [x1, 22]
 	add	x5, x4, :lo12:.LANCHOR53
 	strh	w3, [x4, #:lo12:.LANCHOR53]
 	mov	x22, x4
-	.loc 2 1430 0
+	.loc 2 1479 0
 	ldrh	w3, [x1, 24]
 	lsr	w7, w3, 6
-	.loc 2 1431 0
+	.loc 2 1480 0
 	and	w3, w3, 63
 	strb	w3, [x5, 6]
-	.loc 2 1432 0
+	.loc 2 1481 0
 	ldrb	w3, [x1, 13]
 	strb	w3, [x5, 8]
-	.loc 2 1434 0
-	adrp	x3, .LANCHOR68
-	.loc 2 1430 0
+	.loc 2 1483 0
+	adrp	x3, .LANCHOR67
+	.loc 2 1479 0
 	strh	w7, [x5, 2]
-	.loc 2 1439 0
+	.loc 2 1488 0
 	ldr	w5, [x1, 32]
-	.loc 2 1434 0
-	str	wzr, [x3, #:lo12:.LANCHOR68]
-	.loc 2 1435 0
-	adrp	x3, .LANCHOR65
-	str	wzr, [x3, #:lo12:.LANCHOR65]
-	.loc 2 1436 0
-	adrp	x3, .LANCHOR63
-	str	wzr, [x3, #:lo12:.LANCHOR63]
-	.loc 2 1437 0
-	adrp	x3, .LANCHOR67
+	.loc 2 1483 0
 	str	wzr, [x3, #:lo12:.LANCHOR67]
-	.loc 2 1439 0
-	adrp	x3, .LANCHOR73
-	str	w5, [x3, #:lo12:.LANCHOR73]
-	.loc 2 1440 0
-	adrp	x3, .LANCHOR74
-	str	wzr, [x3, #:lo12:.LANCHOR74]
-	.loc 2 1441 0
-	adrp	x3, .LANCHOR77
-	str	wzr, [x3, #:lo12:.LANCHOR77]
-	.loc 2 1442 0
+	.loc 2 1484 0
+	adrp	x3, .LANCHOR64
+	str	wzr, [x3, #:lo12:.LANCHOR64]
+	.loc 2 1485 0
+	adrp	x3, .LANCHOR62
+	str	wzr, [x3, #:lo12:.LANCHOR62]
+	.loc 2 1486 0
 	adrp	x3, .LANCHOR66
 	str	wzr, [x3, #:lo12:.LANCHOR66]
-	.loc 2 1444 0
+	.loc 2 1488 0
+	adrp	x3, .LANCHOR72
+	str	w5, [x3, #:lo12:.LANCHOR72]
+	.loc 2 1489 0
+	adrp	x3, .LANCHOR73
+	str	wzr, [x3, #:lo12:.LANCHOR73]
+	.loc 2 1490 0
+	adrp	x3, .LANCHOR76
+	str	wzr, [x3, #:lo12:.LANCHOR76]
+	.loc 2 1491 0
+	adrp	x3, .LANCHOR65
+	str	wzr, [x3, #:lo12:.LANCHOR65]
+	.loc 2 1493 0
 	ldr	w3, [x1, 40]
-	adrp	x1, .LANCHOR71
-	ldr	w5, [x1, #:lo12:.LANCHOR71]
+	adrp	x1, .LANCHOR70
+	ldr	w5, [x1, #:lo12:.LANCHOR70]
 	cmp	w3, w5
-	bls	.L1587
-	.loc 2 1445 0
-	str	w3, [x1, #:lo12:.LANCHOR71]
-.L1587:
-	.loc 2 1447 0
-	add	x19, x19, :lo12:.LANCHOR79
-	adrp	x1, .LANCHOR72
-	ldr	w3, [x1, #:lo12:.LANCHOR72]
+	bls	.L1577
+	.loc 2 1494 0
+	str	w3, [x1, #:lo12:.LANCHOR70]
+.L1577:
+	.loc 2 1496 0
+	add	x19, x19, :lo12:.LANCHOR39
+	adrp	x1, .LANCHOR71
+	ldr	w3, [x1, #:lo12:.LANCHOR71]
 	ldr	w2, [x19, 36]
 	cmp	w2, w3
-	bls	.L1588
-	.loc 2 1448 0
-	str	w2, [x1, #:lo12:.LANCHOR72]
-.L1588:
-	.loc 2 1450 0
+	bls	.L1578
+	.loc 2 1497 0
+	str	w2, [x1, #:lo12:.LANCHOR71]
+.L1578:
+	.loc 2 1499 0
 	mov	w1, 65535
 	cmp	w6, w1
-	beq	.L1589
-	.loc 2 1451 0
+	beq	.L1579
+	.loc 2 1500 0
 	add	x0, x0, :lo12:.LANCHOR51
 	bl	make_superblock
-.LVL2085:
-.L1589:
-	.loc 2 1453 0
+.LVL2065:
+.L1579:
+	.loc 2 1502 0
 	ldrh	w2, [x21, #:lo12:.LANCHOR52]
 	mov	w1, 65535
 	add	x0, x21, :lo12:.LANCHOR52
 	cmp	w2, w1
-	beq	.L1590
-	.loc 2 1454 0
+	beq	.L1580
+	.loc 2 1503 0
 	bl	make_superblock
-.LVL2086:
-.L1590:
-	.loc 2 1456 0
+.LVL2066:
+.L1580:
+	.loc 2 1505 0
 	ldrh	w2, [x22, #:lo12:.LANCHOR53]
 	mov	w1, 65535
 	add	x0, x22, :lo12:.LANCHOR53
 	cmp	w2, w1
-	beq	.L1591
-	.loc 2 1457 0
+	beq	.L1581
+	.loc 2 1506 0
 	bl	make_superblock
-.LVL2087:
-.L1591:
-	.loc 2 1459 0
-	ldrh	w2, [x20, #:lo12:.LANCHOR82]
+.LVL2067:
+.L1581:
+	.loc 2 1508 0
+	ldrh	w2, [x20, #:lo12:.LANCHOR80]
 	mov	w1, 65535
-	add	x0, x20, :lo12:.LANCHOR82
+	add	x0, x20, :lo12:.LANCHOR80
 	cmp	w2, w1
-	beq	.L1592
-	.loc 2 1460 0
+	beq	.L1582
+	.loc 2 1509 0
 	bl	make_superblock
-.LVL2088:
-.L1592:
-	.loc 2 1462 0
-	mov	w0, 0
-	b	.L1576
-.LVL2089:
+.LVL2068:
 .L1582:
-	.loc 2 1376 0
-	ldrh	w0, [x20, #:lo12:.LANCHOR81]
-	.loc 2 1378 0
+	.loc 2 1511 0
+	mov	w0, 0
+	b	.L1566
+.LVL2069:
+.L1572:
+	.loc 2 1425 0
+	ldrh	w0, [x20, #:lo12:.LANCHOR79]
+	.loc 2 1427 0
 	mov	w2, 1
 	mov	w1, w2
-	.loc 2 1376 0
+	.loc 2 1425 0
 	orr	w0, w22, w0, lsl 10
 	str	w0, [x21, 4]
-	.loc 2 1377 0
-	ldr	x0, [x23, #:lo12:.LANCHOR39]
+	.loc 2 1426 0
+	ldr	x0, [x23, #:lo12:.LANCHOR107]
 	str	x0, [x21, 8]
-	.loc 2 1378 0
+	.loc 2 1427 0
 	mov	x0, x21
 	bl	FlashReadPages
-.LVL2090:
-	.loc 2 1381 0
+.LVL2070:
+	.loc 2 1430 0
 	ldr	w0, [x21]
 	cmn	w0, #1
-	beq	.L1580
-	.loc 2 1382 0 discriminator 1
-	ldr	x0, [x23, #:lo12:.LANCHOR39]
-	.loc 2 1381 0 discriminator 1
+	beq	.L1570
+	.loc 2 1431 0 discriminator 1
+	ldr	x0, [x23, #:lo12:.LANCHOR107]
+	.loc 2 1430 0 discriminator 1
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L1580
-	.loc 2 1383 0
-	ldr	x0, [x26, #:lo12:.LANCHOR109]
+	bne	.L1570
+	.loc 2 1432 0
+	ldr	x0, [x26, #:lo12:.LANCHOR108]
 	ldrh	w0, [x0]
-	.loc 2 1382 0
+	.loc 2 1431 0
 	cmp	w0, w28
-	beq	.L1581
-.L1580:
+	beq	.L1571
+.L1570:
 	sub	w22, w22, #1
-.LVL2091:
+.LVL2071:
 	sxth	w22, w22
-.LVL2092:
-	b	.L1579
+.LVL2072:
+	b	.L1569
 	.cfi_endproc
 .LFE274:
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
@@ -20556,51 +20527,51 @@ FtlLoadSysInfo:
 	.type	FtlSysBlkInit, %function
 FtlSysBlkInit:
 .LFB292:
-	.loc 2 2306 0
+	.loc 2 2356 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -64]!
 	.cfi_def_cfa_offset 64
 	.cfi_offset 29, -64
 	.cfi_offset 30, -56
-	.loc 2 2312 0
+	.loc 2 2362 0
 	adrp	x0, .LANCHOR4
-	.loc 2 2306 0
+	.loc 2 2356 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	.loc 2 2312 0
+	.loc 2 2362 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR4]
-	.loc 2 2306 0
+	.loc 2 2356 0
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -48
 	.cfi_offset 20, -40
-	.loc 2 2310 0
-	adrp	x20, .LANCHOR162
-	.loc 2 2306 0
+	.loc 2 2360 0
+	adrp	x20, .LANCHOR161
+	.loc 2 2356 0
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	.cfi_offset 21, -32
 	.cfi_offset 22, -24
 	.cfi_offset 23, -16
 	.cfi_offset 24, -8
-	.loc 2 2310 0
-	strh	wzr, [x20, #:lo12:.LANCHOR162]
-	.loc 2 2312 0
+	.loc 2 2360 0
+	strh	wzr, [x20, #:lo12:.LANCHOR161]
+	.loc 2 2362 0
 	bl	FtlFreeSysBlkQueueInit
-.LVL2093:
-	.loc 2 2313 0
+.LVL2073:
+	.loc 2 2363 0
 	bl	FtlScanSysBlk
-.LVL2094:
-	.loc 2 2314 0
-	adrp	x0, .LANCHOR81
-	ldrh	w1, [x0, #:lo12:.LANCHOR81]
+.LVL2074:
+	.loc 2 2364 0
+	adrp	x0, .LANCHOR79
+	ldrh	w1, [x0, #:lo12:.LANCHOR79]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1599
-.L1601:
-	.loc 2 2315 0
+	bne	.L1589
+.L1591:
+	.loc 2 2365 0
 	mov	w23, -1
-.L1598:
-	.loc 2 2398 0
+.L1588:
+	.loc 2 2451 0
 	mov	w0, w23
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -20617,201 +20588,204 @@ FtlSysBlkInit:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.L1599:
+.L1589:
 	.cfi_restore_state
-	.loc 2 2317 0
+	.loc 2 2367 0
 	bl	FtlLoadSysInfo
-.LVL2095:
+.LVL2075:
 	mov	w23, w0
-	cbnz	w0, .L1601
-	.loc 2 2320 0
+	cbnz	w0, .L1591
+	.loc 2 2370 0
 	bl	FtlLoadMapInfo
-.LVL2096:
-	.loc 2 2321 0
+.LVL2076:
+	.loc 2 2371 0
 	bl	FtlLoadVonderInfo
-.LVL2097:
-	.loc 2 2322 0
+.LVL2077:
+	.loc 2 2372 0
 	bl	Ftl_load_ext_data
-.LVL2098:
-	.loc 2 2324 0
+.LVL2078:
+	.loc 2 2374 0
 	bl	FtlLoadEctTbl
-.LVL2099:
-	.loc 2 2325 0
+.LVL2079:
+	.loc 2 2375 0
 	bl	FtlFreeSysBLkSort
-.LVL2100:
-	.loc 2 2327 0
+.LVL2080:
+	.loc 2 2377 0
 	bl	SupperBlkListInit
-.LVL2101:
-	.loc 2 2328 0
+.LVL2081:
+	.loc 2 2378 0
 	bl	FtlPowerLostRecovery
-.LVL2102:
-	.loc 2 2330 0
+.LVL2082:
+	.loc 2 2380 0
 	mov	w0, 1
 	bl	FtlUpdateVaildLpn
-.LVL2103:
-.LBB303:
-.LBB304:
-	.loc 2 2332 0
+.LVL2083:
+.LBB338:
+.LBB339:
+	.loc 2 2382 0
 	adrp	x0, .LANCHOR33
 	ldrh	w2, [x0, #:lo12:.LANCHOR33]
-	.loc 2 2333 0
-	adrp	x0, .LANCHOR56
-	ldr	x1, [x0, #:lo12:.LANCHOR56]
-	.loc 2 2332 0
+	.loc 2 2383 0
+	adrp	x0, .LANCHOR55
+	ldr	x1, [x0, #:lo12:.LANCHOR55]
+	.loc 2 2382 0
 	mov	w0, 0
 	add	x1, x1, 4
-.L1602:
-.LVL2104:
+.L1592:
+.LVL2084:
 	cmp	w0, w2
-	bge	.L1607
-	.loc 2 2333 0
+	bge	.L1597
+	.loc 2 2383 0
 	ldr	w3, [x1], 16
-	tbz	w3, #31, .L1603
-.L1607:
-	.loc 2 2336 0
-	adrp	x19, .LANCHOR79
-	add	x3, x19, :lo12:.LANCHOR79
-	.loc 2 2338 0
+	tbz	w3, #31, .L1593
+.L1597:
+	.loc 2 2386 0
+	adrp	x19, .LANCHOR39
+	add	x3, x19, :lo12:.LANCHOR39
+	.loc 2 2388 0
 	cmp	w0, w2
 	adrp	x22, .LANCHOR51
-	.loc 2 2336 0
+	.loc 2 2386 0
 	ldrh	w1, [x3, 28]
 	add	w1, w1, 1
 	strh	w1, [x3, 28]
-	.loc 2 2338 0
-	bge	.L1613
-.LVL2105:
-.L1604:
-	.loc 2 2339 0
+	.loc 2 2388 0
+	bge	.L1601
+.LVL2085:
+.L1594:
+	.loc 2 2389 0
 	add	x21, x22, :lo12:.LANCHOR51
-	.loc 2 2340 0
+	.loc 2 2390 0
 	adrp	x24, .LANCHOR52
-	.loc 2 2339 0
+	.loc 2 2389 0
 	mov	x0, x21
-	.loc 2 2340 0
+	.loc 2 2390 0
 	add	x20, x24, :lo12:.LANCHOR52
-	.loc 2 2339 0
+	.loc 2 2389 0
 	bl	FtlSuperblockPowerLostFix
-.LVL2106:
-	.loc 2 2340 0
+.LVL2086:
+	.loc 2 2390 0
 	mov	x0, x20
 	bl	FtlSuperblockPowerLostFix
-.LVL2107:
-.LBB305:
-	.loc 2 2346 0
-	adrp	x0, .LANCHOR43
+.LVL2087:
+.LBB340:
+	.loc 2 2396 0
+	adrp	x0, .LANCHOR42
 	ldrh	w3, [x21, 4]
-	ldr	x1, [x0, #:lo12:.LANCHOR43]
+	ldr	x1, [x0, #:lo12:.LANCHOR42]
 	ldrh	w0, [x22, #:lo12:.LANCHOR51]
 	lsl	x0, x0, 1
 	ldrh	w2, [x1, x0]
 	sub	w2, w2, w3
-	.loc 2 2347 0
+	.loc 2 2397 0
 	adrp	x3, .LANCHOR19
-	.loc 2 2346 0
+	.loc 2 2396 0
 	strh	w2, [x1, x0]
-	.loc 2 2348 0
+	.loc 2 2398 0
 	strb	wzr, [x21, 6]
-	.loc 2 2347 0
+	.loc 2 2397 0
 	ldrh	w0, [x3, #:lo12:.LANCHOR19]
 	strh	w0, [x21, 2]
-	.loc 2 2352 0
+	.loc 2 2402 0
 	ldrh	w0, [x24, #:lo12:.LANCHOR52]
-	.loc 2 2349 0
+	.loc 2 2399 0
 	strh	wzr, [x21, 4]
-.LVL2108:
-	.loc 2 2352 0
+.LVL2088:
+	.loc 2 2402 0
 	ldrh	w4, [x20, 4]
 	lsl	x0, x0, 1
 	ldrh	w2, [x1, x0]
 	sub	w2, w2, w4
 	strh	w2, [x1, x0]
-	.loc 2 2354 0
+	.loc 2 2404 0
 	strb	wzr, [x20, 6]
-	.loc 2 2353 0
+	.loc 2 2403 0
 	ldrh	w0, [x3, #:lo12:.LANCHOR19]
 	strh	w0, [x20, 2]
-	.loc 2 2355 0
+	.loc 2 2405 0
 	strh	wzr, [x20, 4]
-.LBE305:
-	.loc 2 2359 0
+.LBE340:
+	.loc 2 2409 0
 	adrp	x0, .LANCHOR144
 	add	x0, x0, :lo12:.LANCHOR144
 	bl	FtlMapBlkWriteDump_data
-.LVL2109:
-	.loc 2 2360 0
+.LVL2089:
+	.loc 2 2410 0
 	adrp	x0, .LANCHOR149
 	add	x0, x0, :lo12:.LANCHOR149
 	bl	FtlMapBlkWriteDump_data
-.LVL2110:
-	.loc 2 2372 0
-	add	x1, x19, :lo12:.LANCHOR79
+.LVL2090:
+	.loc 2 2422 0
+	add	x1, x19, :lo12:.LANCHOR39
 	ldrh	w0, [x1, 30]
 	add	w0, w0, 1
 	strh	w0, [x1, 30]
-	.loc 2 2373 0
+	.loc 2 2423 0
 	bl	l2p_flush
-.LVL2111:
-	.loc 2 2374 0
-	bl	FtlVpcTblFlush
-.LVL2112:
-	.loc 2 2375 0
+.LVL2091:
+	.loc 2 2424 0
 	bl	FtlVpcTblFlush
-.LVL2113:
-	b	.L1608
-.LVL2114:
+.LVL2092:
 .L1603:
-	.loc 2 2332 0
-	add	w0, w0, 1
-.LVL2115:
-	b	.L1602
-.L1613:
-	.loc 2 2338 0
-	ldrh	w0, [x20, #:lo12:.LANCHOR162]
-.LVL2116:
-	cbnz	w0, .L1604
-.L1608:
-	.loc 2 2379 0
+	.loc 2 2428 0
+	bl	FtlVpcTblFlush
+.LVL2093:
+	.loc 2 2432 0
+	add	x21, x22, :lo12:.LANCHOR51
 	ldrh	w0, [x22, #:lo12:.LANCHOR51]
 	mov	w1, 65535
-	add	x21, x22, :lo12:.LANCHOR51
 	cmp	w0, w1
-	beq	.L1609
+	beq	.L1600
 	ldrh	w1, [x21, 4]
-	cbnz	w1, .L1609
-	.loc 2 2381 0
+	cbnz	w1, .L1600
+	.loc 2 2434 0
 	adrp	x22, .LANCHOR52
 	add	x20, x22, :lo12:.LANCHOR52
-	.loc 2 2380 0
+	.loc 2 2433 0
 	ldrh	w1, [x20, 4]
-	cbnz	w1, .L1609
-	.loc 2 2382 0
+	cbnz	w1, .L1600
+	.loc 2 2435 0
 	bl	FtlGcRefreshBlock
-.LVL2117:
-	.loc 2 2383 0
+.LVL2094:
+	.loc 2 2436 0
 	ldrh	w0, [x22, #:lo12:.LANCHOR52]
 	bl	FtlGcRefreshBlock
-.LVL2118:
-	.loc 2 2384 0
+.LVL2095:
+	.loc 2 2437 0
 	mov	x0, x21
 	bl	allocate_new_data_superblock
-.LVL2119:
-	.loc 2 2385 0
+.LVL2096:
+	.loc 2 2438 0
 	mov	x0, x20
 	bl	allocate_new_data_superblock
-.LVL2120:
-.L1609:
-	.loc 2 2390 0
-	add	x19, x19, :lo12:.LANCHOR79
+.LVL2097:
+.L1600:
+	.loc 2 2443 0
+	add	x19, x19, :lo12:.LANCHOR39
 	ldrh	w0, [x19, 28]
 	tst	x0, 31
-	bne	.L1598
-	.loc 2 2391 0
+	bne	.L1588
+	.loc 2 2444 0
 	bl	FtlVpcCheckAndModify
-.LVL2121:
-	b	.L1598
-.LBE304:
-.LBE303:
+.LVL2098:
+	b	.L1588
+.LVL2099:
+.L1593:
+	.loc 2 2382 0
+	add	w0, w0, 1
+.LVL2100:
+	b	.L1592
+.L1601:
+	.loc 2 2388 0
+	ldrh	w0, [x20, #:lo12:.LANCHOR161]
+.LVL2101:
+	cbnz	w0, .L1594
+	.loc 2 2427 0
+	bl	l2p_flush
+.LVL2102:
+	b	.L1603
+.LBE339:
+.LBE338:
 	.cfi_endproc
 .LFE292:
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
@@ -20828,7 +20802,7 @@ ftl_low_format:
 	.cfi_offset 29, -80
 	.cfi_offset 30, -72
 	.loc 3 630 0
-	adrp	x0, .LANCHOR72
+	adrp	x0, .LANCHOR71
 	.loc 3 623 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
@@ -20838,7 +20812,7 @@ ftl_low_format:
 	.loc 3 631 0
 	adrp	x24, .LANCHOR4
 	.loc 3 630 0
-	str	wzr, [x0, #:lo12:.LANCHOR72]
+	str	wzr, [x0, #:lo12:.LANCHOR71]
 	.loc 3 631 0
 	ldrh	w0, [x24, #:lo12:.LANCHOR4]
 	.loc 3 623 0
@@ -20846,7 +20820,7 @@ ftl_low_format:
 	.cfi_offset 19, -64
 	.cfi_offset 20, -56
 	.loc 3 629 0
-	adrp	x20, .LANCHOR71
+	adrp	x20, .LANCHOR70
 	.loc 3 623 0
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
@@ -20855,22 +20829,22 @@ ftl_low_format:
 	.cfi_offset 25, -16
 	.cfi_offset 26, -8
 	.loc 3 629 0
-	str	wzr, [x20, #:lo12:.LANCHOR71]
+	str	wzr, [x20, #:lo12:.LANCHOR70]
 	.loc 3 631 0
 	bl	FtlFreeSysBlkQueueInit
-.LVL2122:
+.LVL2103:
 	.loc 3 632 0
 	bl	FtlLoadBbt
-.LVL2123:
-	cbz	w0, .L1616
+.LVL2104:
+	cbz	w0, .L1605
 	.loc 3 633 0
 	bl	FtlMakeBbt
-.LVL2124:
-.L1616:
+.LVL2105:
+.L1605:
 	.loc 3 635 0 discriminator 1
 	adrp	x23, .LANCHOR12
 	.loc 3 636 0 discriminator 1
-	adrp	x0, .LANCHOR116
+	adrp	x0, .LANCHOR115
 	.loc 3 637 0 discriminator 1
 	mov	w6, 23752
 	.loc 3 635 0 discriminator 1
@@ -20878,20 +20852,20 @@ ftl_low_format:
 	.loc 3 637 0 discriminator 1
 	movk	w6, 0xa0f, lsl 16
 	.loc 3 636 0 discriminator 1
-	ldr	x4, [x0, #:lo12:.LANCHOR116]
+	ldr	x4, [x0, #:lo12:.LANCHOR115]
 	.loc 3 637 0 discriminator 1
-	adrp	x0, .LANCHOR114
+	adrp	x0, .LANCHOR113
 	.loc 3 635 0 discriminator 1
 	lsl	w1, w1, 7
 	.loc 3 637 0 discriminator 1
-	ldr	x5, [x0, #:lo12:.LANCHOR114]
+	ldr	x5, [x0, #:lo12:.LANCHOR113]
 	mov	w0, 0
-.L1617:
-.LVL2125:
+.L1606:
+.LVL2106:
 	.loc 3 635 0 discriminator 1
 	cmp	w0, w1
-	blt	.L1618
-.LVL2126:
+	blt	.L1607
+.LVL2107:
 	.loc 3 642 0
 	adrp	x21, .LANCHOR5
 	adrp	x22, .LANCHOR6
@@ -20900,94 +20874,94 @@ ftl_low_format:
 	mov	w19, 0
 	.loc 3 642 0
 	ldrh	w25, [x21, #:lo12:.LANCHOR5]
-.LVL2127:
-.L1619:
+.LVL2108:
+.L1608:
 	.loc 3 642 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x26]
 	cmp	w0, w25
-	bhi	.L1620
+	bhi	.L1609
 	.loc 3 645 0 is_stmt 1
 	adrp	x25, .LANCHOR3
-.LVL2128:
+.LVL2109:
 	sub	w1, w19, #2
 	ldrh	w0, [x25, #:lo12:.LANCHOR3]
 	cmp	w1, w0, lsl 1
-	bgt	.L1621
-.LVL2129:
-.L1625:
+	bgt	.L1610
+.LVL2110:
+.L1614:
 	.loc 3 656 0
 	add	x26, x21, :lo12:.LANCHOR5
 	.loc 3 641 0
 	mov	w19, 0
 	mov	w24, 0
-.L1622:
-.LVL2130:
+.L1611:
+.LVL2111:
 	.loc 3 656 0 discriminator 1
 	ldrh	w0, [x26]
 	cmp	w0, w24
-	bhi	.L1626
+	bhi	.L1615
 	.loc 3 658 0
-	adrp	x0, .LANCHOR113
+	adrp	x0, .LANCHOR112
 	ldrh	w1, [x22, #:lo12:.LANCHOR6]
 	.loc 3 661 0
 	ldrh	w4, [x25, #:lo12:.LANCHOR3]
 	.loc 3 662 0
-	adrp	x2, .LANCHOR80
+	adrp	x2, .LANCHOR78
 	.loc 3 658 0
-	str	w1, [x0, #:lo12:.LANCHOR113]
+	str	w1, [x0, #:lo12:.LANCHOR112]
 	.loc 3 661 0
 	adrp	x0, .LANCHOR7
-	adrp	x3, .LANCHOR62
+	adrp	x3, .LANCHOR61
 	ldr	w1, [x0, #:lo12:.LANCHOR7]
 	udiv	w5, w1, w4
 	.loc 3 662 0
 	ubfx	x0, x5, 5, 16
 	.loc 3 661 0
-	str	w5, [x3, #:lo12:.LANCHOR62]
+	str	w5, [x3, #:lo12:.LANCHOR61]
 	.loc 3 662 0
 	add	w6, w0, 36
-	strh	w6, [x2, #:lo12:.LANCHOR80]
+	strh	w6, [x2, #:lo12:.LANCHOR78]
 	.loc 3 663 0
 	mov	w6, 24
 	mul	w6, w4, w6
 	cmp	w19, w6
-	ble	.L1627
+	ble	.L1616
 	.loc 3 664 0
 	sub	w1, w1, w19
 	udiv	w1, w1, w4
-	str	w1, [x3, #:lo12:.LANCHOR62]
+	str	w1, [x3, #:lo12:.LANCHOR61]
 	.loc 3 665 0
 	lsr	w1, w1, 5
 	add	w1, w1, 24
-	strh	w1, [x2, #:lo12:.LANCHOR80]
-.L1627:
+	strh	w1, [x2, #:lo12:.LANCHOR78]
+.L1616:
 	.loc 3 668 0
 	adrp	x1, .LANCHOR15
 	ldrh	w1, [x1, #:lo12:.LANCHOR15]
-	cbz	w1, .L1629
+	cbz	w1, .L1618
 	.loc 3 669 0
-	ldrh	w6, [x2, #:lo12:.LANCHOR80]
+	ldrh	w6, [x2, #:lo12:.LANCHOR78]
 	add	w6, w6, w1, lsr 1
-	strh	w6, [x2, #:lo12:.LANCHOR80]
+	strh	w6, [x2, #:lo12:.LANCHOR78]
 	.loc 3 670 0
 	mul	w6, w1, w4
 	cmp	w19, w6
-	bge	.L1629
+	bge	.L1618
 	.loc 3 672 0
 	add	w1, w1, 32
 	.loc 3 671 0
-	str	w5, [x3, #:lo12:.LANCHOR62]
+	str	w5, [x3, #:lo12:.LANCHOR61]
 	.loc 3 672 0
 	add	w1, w0, w1
-	strh	w1, [x2, #:lo12:.LANCHOR80]
-.L1629:
+	strh	w1, [x2, #:lo12:.LANCHOR78]
+.L1618:
 	.loc 3 677 0
-	ldrh	w1, [x2, #:lo12:.LANCHOR80]
-	adrp	x25, .LANCHOR182
-	ldr	w0, [x3, #:lo12:.LANCHOR62]
+	ldrh	w1, [x2, #:lo12:.LANCHOR78]
+	adrp	x25, .LANCHOR180
+	ldr	w0, [x3, #:lo12:.LANCHOR61]
 	.loc 3 687 0
-	adrp	x24, .LANCHOR43
-.LVL2131:
+	adrp	x24, .LANCHOR42
+.LVL2112:
 	.loc 3 677 0
 	sub	w0, w0, w1
 	.loc 3 678 0
@@ -20995,13 +20969,13 @@ ftl_low_format:
 	ldrh	w1, [x1, #:lo12:.LANCHOR19]
 	.loc 3 677 0
 	mul	w0, w0, w4
-	str	w0, [x25, #:lo12:.LANCHOR182]
+	str	w0, [x25, #:lo12:.LANCHOR180]
 	.loc 3 678 0
 	mul	w0, w1, w0
 	.loc 3 679 0
 	ldrh	w1, [x23, #:lo12:.LANCHOR12]
 	.loc 3 678 0
-	str	w0, [x3, #:lo12:.LANCHOR62]
+	str	w0, [x3, #:lo12:.LANCHOR61]
 	.loc 3 689 0
 	mov	w23, -1
 	.loc 3 679 0
@@ -21010,25 +20984,25 @@ ftl_low_format:
 	str	w0, [x1, #:lo12:.LANCHOR34]
 	.loc 3 684 0
 	bl	FtlBbmTblFlush
-.LVL2132:
+.LVL2113:
 	.loc 3 687 0
-	ldr	x0, [x24, #:lo12:.LANCHOR43]
+	ldr	x0, [x24, #:lo12:.LANCHOR42]
 	mov	w1, 0
 	ldrh	w2, [x22, #:lo12:.LANCHOR6]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL2133:
+.LVL2114:
 	.loc 3 688 0
-	adrp	x0, .LANCHOR60
+	adrp	x0, .LANCHOR59
 	.loc 3 689 0
-	adrp	x1, .LANCHOR82
+	adrp	x1, .LANCHOR80
 	.loc 3 698 0
 	ldrh	w2, [x21, #:lo12:.LANCHOR5]
 	.loc 3 688 0
-	str	wzr, [x0, #:lo12:.LANCHOR60]
+	str	wzr, [x0, #:lo12:.LANCHOR59]
 	.loc 3 689 0
-	add	x0, x1, :lo12:.LANCHOR82
-	strh	w23, [x1, #:lo12:.LANCHOR82]
+	add	x0, x1, :lo12:.LANCHOR80
+	strh	w23, [x1, #:lo12:.LANCHOR80]
 	.loc 3 698 0
 	mov	w1, 255
 	lsr	w2, w2, 3
@@ -21041,7 +21015,7 @@ ftl_low_format:
 	.loc 3 694 0
 	adrp	x0, .LANCHOR51
 	add	x19, x0, :lo12:.LANCHOR51
-.LVL2134:
+.LVL2115:
 	.loc 3 696 0
 	strh	wzr, [x0, #:lo12:.LANCHOR51]
 	.loc 3 697 0
@@ -21057,18 +21031,18 @@ ftl_low_format:
 	strb	wzr, [x19, 6]
 	.loc 3 698 0
 	bl	ftl_memset
-.LVL2135:
-.L1631:
+.LVL2116:
+.L1620:
 	.loc 3 701 0
 	mov	x0, x19
 	bl	make_superblock
-.LVL2136:
+.LVL2117:
 	.loc 3 702 0
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1632
+	cbnz	w1, .L1621
 	.loc 3 705 0
-	ldr	x1, [x24, #:lo12:.LANCHOR43]
+	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	.loc 3 706 0
@@ -21076,103 +21050,103 @@ ftl_low_format:
 	add	w0, w0, 1
 	strh	w0, [x19]
 	.loc 3 707 0
-	b	.L1631
-.LVL2137:
-.L1618:
+	b	.L1620
+.LVL2118:
+.L1607:
 	.loc 3 636 0 discriminator 3
 	ubfiz	x3, x0, 2, 16
 	mvn	w2, w0
 	orr	w2, w0, w2, lsl 16
 	.loc 3 635 0 discriminator 3
 	add	w0, w0, 1
-.LVL2138:
+.LVL2119:
 	and	w0, w0, 65535
-.LVL2139:
+.LVL2120:
 	.loc 3 636 0 discriminator 3
 	str	w2, [x4, x3]
 	.loc 3 637 0 discriminator 3
 	str	w6, [x5, x3]
-	b	.L1617
-.LVL2140:
-.L1620:
+	b	.L1606
+.LVL2121:
+.L1609:
 	.loc 3 643 0 discriminator 3
 	mov	w0, w25
 	mov	w1, 1
 	.loc 3 642 0 discriminator 3
 	add	w25, w25, 1
-.LVL2141:
+.LVL2122:
 	.loc 3 643 0 discriminator 3
 	bl	FtlLowFormatEraseBlock
-.LVL2142:
+.LVL2123:
 	add	w19, w19, w0
-.LVL2143:
+.LVL2124:
 	.loc 3 642 0 discriminator 3
 	and	w25, w25, 65535
 	.loc 3 643 0 discriminator 3
 	and	w19, w19, 65535
-.LVL2144:
-	b	.L1619
-.LVL2145:
-.L1621:
+.LVL2125:
+	b	.L1608
+.LVL2126:
+.L1610:
 	.loc 3 647 0
 	udiv	w0, w19, w0
 	adrp	x1, .LANCHOR31
 	ldr	w19, [x1, #:lo12:.LANCHOR31]
-.LVL2146:
+.LVL2127:
 	add	w0, w0, w19
 	bl	FtlSysBlkNumInit
-.LVL2147:
+.LVL2128:
 	.loc 3 648 0
 	ldrh	w0, [x24, #:lo12:.LANCHOR4]
 	.loc 3 650 0
 	add	x24, x22, :lo12:.LANCHOR6
 	.loc 3 648 0
 	bl	FtlFreeSysBlkQueueInit
-.LVL2148:
+.LVL2129:
 	.loc 3 650 0
 	ldrh	w19, [x21, #:lo12:.LANCHOR5]
-.LVL2149:
-.L1623:
+.LVL2130:
+.L1612:
 	.loc 3 650 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x24]
 	cmp	w0, w19
-	bls	.L1625
+	bls	.L1614
 	.loc 3 651 0 is_stmt 1 discriminator 3
 	mov	w0, w19
 	.loc 3 650 0 discriminator 3
 	add	w19, w19, 1
-.LVL2150:
+.LVL2131:
 	.loc 3 651 0 discriminator 3
 	mov	w1, 1
 	.loc 3 650 0 discriminator 3
 	and	w19, w19, 65535
 	.loc 3 651 0 discriminator 3
 	bl	FtlLowFormatEraseBlock
-.LVL2151:
-	b	.L1623
-.LVL2152:
-.L1626:
+.LVL2132:
+	b	.L1612
+.LVL2133:
+.L1615:
 	.loc 3 657 0 discriminator 3
 	mov	w0, w24
 	mov	w1, 0
 	.loc 3 656 0 discriminator 3
 	add	w24, w24, 1
-.LVL2153:
+.LVL2134:
 	.loc 3 657 0 discriminator 3
 	bl	FtlLowFormatEraseBlock
-.LVL2154:
+.LVL2135:
 	add	w19, w19, w0
-.LVL2155:
+.LVL2136:
 	.loc 3 656 0 discriminator 3
 	and	w24, w24, 65535
 	.loc 3 657 0 discriminator 3
 	and	w19, w19, 65535
-.LVL2156:
-	b	.L1622
-.LVL2157:
-.L1632:
+.LVL2137:
+	b	.L1611
+.LVL2138:
+.L1621:
 	.loc 3 709 0
-	ldr	w1, [x20, #:lo12:.LANCHOR71]
+	ldr	w1, [x20, #:lo12:.LANCHOR70]
 	.loc 3 710 0
 	ubfiz	x0, x0, 1, 16
 	.loc 3 709 0
@@ -21181,9 +21155,9 @@ ftl_low_format:
 	mov	w23, -1
 	.loc 3 709 0
 	add	w1, w1, 1
-	str	w1, [x20, #:lo12:.LANCHOR71]
+	str	w1, [x20, #:lo12:.LANCHOR70]
 	.loc 3 710 0
-	ldr	x1, [x24, #:lo12:.LANCHOR43]
+	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ldrh	w2, [x19, 4]
 	strh	w2, [x1, x0]
 	.loc 3 712 0
@@ -21205,17 +21179,17 @@ ftl_low_format:
 	strb	wzr, [x0, 6]
 	.loc 3 715 0
 	strb	w1, [x0, 8]
-.L1633:
+.L1622:
 	.loc 3 717 0
 	mov	x0, x19
 	bl	make_superblock
-.LVL2158:
+.LVL2139:
 	.loc 3 718 0
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1634
+	cbnz	w1, .L1623
 	.loc 3 721 0
-	ldr	x1, [x24, #:lo12:.LANCHOR43]
+	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	.loc 3 722 0
@@ -21223,57 +21197,57 @@ ftl_low_format:
 	add	w0, w0, 1
 	strh	w0, [x19]
 	.loc 3 723 0
-	b	.L1633
-.L1634:
+	b	.L1622
+.L1623:
 	.loc 3 725 0
-	ldr	w1, [x20, #:lo12:.LANCHOR71]
+	ldr	w1, [x20, #:lo12:.LANCHOR70]
 	.loc 3 726 0
 	ubfiz	x0, x0, 1, 16
 	.loc 3 725 0
 	str	w1, [x19, 12]
-	.loc 3 727 0
-	mov	w4, -1
-	.loc 3 725 0
 	add	w1, w1, 1
-	str	w1, [x20, #:lo12:.LANCHOR71]
+	str	w1, [x20, #:lo12:.LANCHOR70]
 	.loc 3 726 0
-	ldr	x1, [x24, #:lo12:.LANCHOR43]
+	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ldrh	w2, [x19, 4]
+	.loc 3 727 0
+	mov	w19, -1
+	.loc 3 726 0
 	strh	w2, [x1, x0]
 	.loc 3 727 0
 	adrp	x0, .LANCHOR53
-	strh	w4, [x0, #:lo12:.LANCHOR53]
+	strh	w19, [x0, #:lo12:.LANCHOR53]
 	.loc 3 730 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL2159:
-	adrp	x2, .LANCHOR81
-	add	x1, x2, :lo12:.LANCHOR81
-	strh	w0, [x2, #:lo12:.LANCHOR81]
+.LVL2140:
+	adrp	x2, .LANCHOR79
+	add	x1, x2, :lo12:.LANCHOR79
+	strh	w0, [x2, #:lo12:.LANCHOR79]
 	.loc 3 733 0
-	ldr	w0, [x25, #:lo12:.LANCHOR182]
+	ldr	w0, [x25, #:lo12:.LANCHOR180]
 	strh	w0, [x1, 6]
 	.loc 3 734 0
-	ldr	w0, [x20, #:lo12:.LANCHOR71]
+	ldr	w0, [x20, #:lo12:.LANCHOR70]
 	str	w0, [x1, 8]
 	add	w0, w0, 1
 	.loc 3 731 0
 	strh	wzr, [x1, 2]
 	.loc 3 732 0
-	strh	w4, [x1, 4]
+	strh	w19, [x1, 4]
 	.loc 3 734 0
-	str	w0, [x20, #:lo12:.LANCHOR71]
+	str	w0, [x20, #:lo12:.LANCHOR70]
 	.loc 3 735 0
 	bl	FtlVpcTblFlush
-.LVL2160:
+.LVL2141:
 	.loc 3 736 0
 	bl	FtlSysBlkInit
-.LVL2161:
-	cbnz	w0, .L1635
+.LVL2142:
+	cbnz	w0, .L1624
 	.loc 3 737 0
-	adrp	x0, .LANCHOR88
+	adrp	x0, .LANCHOR86
 	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR88]
-.L1635:
+	str	w1, [x0, #:lo12:.LANCHOR86]
+.L1624:
 	.loc 3 739 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
@@ -21304,7 +21278,7 @@ sftl_init:
 .LFB211:
 	.loc 3 743 0
 	.cfi_startproc
-.LVL2162:
+.LVL2143:
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
@@ -21320,62 +21294,62 @@ sftl_init:
 	str	x19, [sp, 16]
 	.cfi_offset 19, -16
 	.loc 3 746 0
-	adrp	x19, .LANCHOR88
-	str	w0, [x19, #:lo12:.LANCHOR88]
+	adrp	x19, .LANCHOR86
+	str	w0, [x19, #:lo12:.LANCHOR86]
 	.loc 3 749 0
 	adrp	x0, .LC71
 	add	x0, x0, :lo12:.LC71
 	bl	printf
-.LVL2163:
+.LVL2144:
 	.loc 3 750 0
 	adrp	x0, .LANCHOR0
 	add	x0, x0, :lo12:.LANCHOR0
 	bl	FtlConstantsInit
-.LVL2164:
+.LVL2145:
 	.loc 3 751 0
 	bl	FtlMemInit
-.LVL2165:
+.LVL2146:
 	.loc 3 752 0
 	bl	FtlVariablesInit
-.LVL2166:
+.LVL2147:
 	.loc 3 753 0
 	adrp	x0, .LANCHOR4
 	ldrh	w0, [x0, #:lo12:.LANCHOR4]
 	bl	FtlFreeSysBlkQueueInit
-.LVL2167:
+.LVL2148:
 .LDL2:
 	.loc 3 756 0
 	bl	FtlLoadBbt
-.LVL2168:
-	cbnz	w0, .L1644
+.LVL2149:
+	cbnz	w0, .L1633
 	.loc 3 767 0
 	bl	FtlSysBlkInit
-.LVL2169:
-	cbnz	w0, .L1644
+.LVL2150:
+	cbnz	w0, .L1633
 	.loc 3 779 0
 	mov	w0, 1
-	str	w0, [x19, #:lo12:.LANCHOR88]
+	str	w0, [x19, #:lo12:.LANCHOR86]
 	.loc 3 783 0
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 15
-	bhi	.L1644
+	bhi	.L1633
 	mov	w19, 8129
-.L1643:
-.LVL2170:
-.LBB306:
+.L1632:
+.LVL2151:
+.LBB341:
 	.loc 3 786 0 discriminator 3
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-.LVL2171:
+.LVL2152:
 	.loc 3 785 0 discriminator 3
 	subs	w19, w19, #1
-.LVL2172:
-	bne	.L1643
-.LVL2173:
-.L1644:
-.LBE306:
+.LVL2153:
+	bne	.L1632
+.LVL2154:
+.L1633:
+.LBE341:
 	.loc 3 794 0
 	mov	w0, 0
 	ldr	x19, [sp, 16]
@@ -21396,11 +21370,11 @@ ftl_memcmp:
 .LFB348:
 	.loc 1 252 0
 	.cfi_startproc
-.LVL2174:
+.LVL2155:
 	.loc 1 253 0
 	uxtw	x2, w2
 	b	memcmp
-.LVL2175:
+.LVL2156:
 	.cfi_endproc
 .LFE348:
 	.size	ftl_memcmp, .-ftl_memcmp
@@ -21502,7 +21476,6 @@ ftl_memcmp:
 	.global	p_sys_data_buf_1
 	.global	p_sys_data_buf
 	.global	p_plane_order_table
-	.global	g_req_cache
 	.global	req_gc_dst
 	.global	req_gc
 	.global	req_erase
@@ -21561,7 +21534,7 @@ DeviceCapacity:
 	.zero	4
 	.section	.bss.FtlUpdateVaildLpnCount,"aw",@nobits
 	.align	1
-	.set	.LANCHOR59,. + 0
+	.set	.LANCHOR58,. + 0
 	.type	FtlUpdateVaildLpnCount, %object
 	.size	FtlUpdateVaildLpnCount, 2
 FtlUpdateVaildLpnCount:
@@ -21617,7 +21590,7 @@ c_ftl_nand_data_blks_per_plane:
 	.zero	2
 	.section	.bss.c_ftl_nand_data_op_blks_per_plane,"aw",@nobits
 	.align	1
-	.set	.LANCHOR80,. + 0
+	.set	.LANCHOR78,. + 0
 	.type	c_ftl_nand_data_op_blks_per_plane, %object
 	.size	c_ftl_nand_data_op_blks_per_plane, 2
 c_ftl_nand_data_op_blks_per_plane:
@@ -21785,7 +21758,7 @@ c_ftl_vendor_part_size:
 	.zero	2
 	.section	.bss.c_gc_page_buf_num,"aw",@nobits
 	.align	2
-	.set	.LANCHOR96,. + 0
+	.set	.LANCHOR94,. + 0
 	.type	c_gc_page_buf_num, %object
 	.size	c_gc_page_buf_num, 4
 c_gc_page_buf_num:
@@ -21805,7 +21778,7 @@ check_buf:
 	.zero	4096
 	.section	.bss.check_spare_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR111,. + 0
+	.set	.LANCHOR110,. + 0
 	.type	check_spare_buf, %object
 	.size	check_spare_buf, 512
 check_spare_buf:
@@ -21818,7 +21791,7 @@ check_vpc_table:
 	.zero	16384
 	.section	.bss.ftl_gc_temp_power_lost_recovery_flag,"aw",@nobits
 	.align	2
-	.set	.LANCHOR153,. + 0
+	.set	.LANCHOR152,. + 0
 	.type	ftl_gc_temp_power_lost_recovery_flag, %object
 	.size	ftl_gc_temp_power_lost_recovery_flag, 4
 ftl_gc_temp_power_lost_recovery_flag:
@@ -21852,7 +21825,7 @@ gSysFreeQueue:
 	.zero	2056
 	.section	.bss.gSysInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR81,. + 0
+	.set	.LANCHOR79,. + 0
 	.type	gSysInfo, %object
 	.size	gSysInfo, 12
 gSysInfo:
@@ -21866,14 +21839,14 @@ gVendorBlkInfo:
 	.zero	64
 	.section	.bss.g_GlobalDataVersion,"aw",@nobits
 	.align	2
-	.set	.LANCHOR72,. + 0
+	.set	.LANCHOR71,. + 0
 	.type	g_GlobalDataVersion, %object
 	.size	g_GlobalDataVersion, 4
 g_GlobalDataVersion:
 	.zero	4
 	.section	.bss.g_GlobalSysVersion,"aw",@nobits
 	.align	2
-	.set	.LANCHOR71,. + 0
+	.set	.LANCHOR70,. + 0
 	.type	g_GlobalSysVersion, %object
 	.size	g_GlobalSysVersion, 4
 g_GlobalSysVersion:
@@ -21887,21 +21860,21 @@ g_MaxLbaSector:
 	.zero	4
 	.section	.bss.g_MaxLbn,"aw",@nobits
 	.align	2
-	.set	.LANCHOR182,. + 0
+	.set	.LANCHOR180,. + 0
 	.type	g_MaxLbn, %object
 	.size	g_MaxLbn, 4
 g_MaxLbn:
 	.zero	4
 	.section	.bss.g_MaxLpn,"aw",@nobits
 	.align	2
-	.set	.LANCHOR62,. + 0
+	.set	.LANCHOR61,. + 0
 	.type	g_MaxLpn, %object
 	.size	g_MaxLpn, 4
 g_MaxLpn:
 	.zero	4
 	.section	.bss.g_VaildLpn,"aw",@nobits
 	.align	2
-	.set	.LANCHOR60,. + 0
+	.set	.LANCHOR59,. + 0
 	.type	g_VaildLpn, %object
 	.size	g_VaildLpn, 4
 g_VaildLpn:
@@ -21922,7 +21895,7 @@ g_buffer_superblock:
 	.zero	48
 	.section	.bss.g_cur_erase_blk,"aw",@nobits
 	.align	2
-	.set	.LANCHOR113,. + 0
+	.set	.LANCHOR112,. + 0
 	.type	g_cur_erase_blk, %object
 	.size	g_cur_erase_blk, 4
 g_cur_erase_blk:
@@ -21936,70 +21909,70 @@ g_ect_tbl_info_size:
 	.zero	2
 	.section	.bss.g_ect_tbl_power_up_flush,"aw",@nobits
 	.align	1
-	.set	.LANCHOR166,. + 0
+	.set	.LANCHOR165,. + 0
 	.type	g_ect_tbl_power_up_flush, %object
 	.size	g_ect_tbl_power_up_flush, 2
 g_ect_tbl_power_up_flush:
 	.zero	2
 	.section	.bss.g_ftl_nand_free_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR178,. + 0
+	.set	.LANCHOR176,. + 0
 	.type	g_ftl_nand_free_count, %object
 	.size	g_ftl_nand_free_count, 4
 g_ftl_nand_free_count:
 	.zero	4
 	.section	.bss.g_gc_bad_block_gc_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR105,. + 0
+	.set	.LANCHOR103,. + 0
 	.type	g_gc_bad_block_gc_index, %object
 	.size	g_gc_bad_block_gc_index, 2
 g_gc_bad_block_gc_index:
 	.zero	2
 	.section	.bss.g_gc_bad_block_temp_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR103,. + 0
+	.set	.LANCHOR101,. + 0
 	.type	g_gc_bad_block_temp_num, %object
 	.size	g_gc_bad_block_temp_num, 2
 g_gc_bad_block_temp_num:
 	.zero	2
 	.section	.bss.g_gc_bad_block_temp_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR104,. + 0
+	.set	.LANCHOR102,. + 0
 	.type	g_gc_bad_block_temp_tbl, %object
 	.size	g_gc_bad_block_temp_tbl, 34
 g_gc_bad_block_temp_tbl:
 	.zero	34
 	.section	.bss.g_gc_blk_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR87,. + 0
+	.set	.LANCHOR85,. + 0
 	.type	g_gc_blk_index, %object
 	.size	g_gc_blk_index, 2
 g_gc_blk_index:
 	.zero	2
 	.section	.bss.g_gc_blk_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR97,. + 0
+	.set	.LANCHOR95,. + 0
 	.type	g_gc_blk_num, %object
 	.size	g_gc_blk_num, 2
 g_gc_blk_num:
 	.zero	2
 	.section	.bss.g_gc_cur_blk_max_valid_pages,"aw",@nobits
 	.align	1
-	.set	.LANCHOR176,. + 0
+	.set	.LANCHOR174,. + 0
 	.type	g_gc_cur_blk_max_valid_pages, %object
 	.size	g_gc_cur_blk_max_valid_pages, 2
 g_gc_cur_blk_max_valid_pages:
 	.zero	2
 	.section	.bss.g_gc_cur_blk_valid_pages,"aw",@nobits
 	.align	1
-	.set	.LANCHOR175,. + 0
+	.set	.LANCHOR173,. + 0
 	.type	g_gc_cur_blk_valid_pages, %object
 	.size	g_gc_cur_blk_valid_pages, 2
 g_gc_cur_blk_valid_pages:
 	.zero	2
 	.section	.bss.g_gc_free_blk_threshold,"aw",@nobits
 	.align	1
-	.set	.LANCHOR84,. + 0
+	.set	.LANCHOR82,. + 0
 	.type	g_gc_free_blk_threshold, %object
 	.size	g_gc_free_blk_threshold, 2
 g_gc_free_blk_threshold:
@@ -22020,49 +21993,49 @@ g_gc_head_data_block_count:
 	.zero	4
 	.section	.bss.g_gc_merge_free_blk_threshold,"aw",@nobits
 	.align	1
-	.set	.LANCHOR85,. + 0
+	.set	.LANCHOR83,. + 0
 	.type	g_gc_merge_free_blk_threshold, %object
 	.size	g_gc_merge_free_blk_threshold, 2
 g_gc_merge_free_blk_threshold:
 	.zero	2
 	.section	.bss.g_gc_next_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR101,. + 0
+	.set	.LANCHOR99,. + 0
 	.type	g_gc_next_blk, %object
 	.size	g_gc_next_blk, 2
 g_gc_next_blk:
 	.zero	2
 	.section	.bss.g_gc_next_blk_1,"aw",@nobits
 	.align	1
-	.set	.LANCHOR102,. + 0
+	.set	.LANCHOR100,. + 0
 	.type	g_gc_next_blk_1, %object
 	.size	g_gc_next_blk_1, 2
 g_gc_next_blk_1:
 	.zero	2
 	.section	.bss.g_gc_num_req,"aw",@nobits
 	.align	2
-	.set	.LANCHOR91,. + 0
+	.set	.LANCHOR89,. + 0
 	.type	g_gc_num_req, %object
 	.size	g_gc_num_req, 4
 g_gc_num_req:
 	.zero	4
 	.section	.bss.g_gc_page_offset,"aw",@nobits
 	.align	1
-	.set	.LANCHOR99,. + 0
+	.set	.LANCHOR97,. + 0
 	.type	g_gc_page_offset, %object
 	.size	g_gc_page_offset, 2
 g_gc_page_offset:
 	.zero	2
 	.section	.bss.g_gc_skip_write_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR86,. + 0
+	.set	.LANCHOR84,. + 0
 	.type	g_gc_skip_write_count, %object
 	.size	g_gc_skip_write_count, 4
 g_gc_skip_write_count:
 	.zero	4
 	.section	.bss.g_gc_superblock,"aw",@nobits
 	.align	3
-	.set	.LANCHOR82,. + 0
+	.set	.LANCHOR80,. + 0
 	.type	g_gc_superblock, %object
 	.size	g_gc_superblock, 48
 g_gc_superblock:
@@ -22083,35 +22056,35 @@ g_in_gc_progress:
 	.zero	4
 	.section	.bss.g_in_swl_replace,"aw",@nobits
 	.align	2
-	.set	.LANCHOR89,. + 0
+	.set	.LANCHOR87,. + 0
 	.type	g_in_swl_replace, %object
 	.size	g_in_swl_replace, 4
 g_in_swl_replace:
 	.zero	4
 	.section	.bss.g_l2p_last_update_region_id,"aw",@nobits
 	.align	1
-	.set	.LANCHOR57,. + 0
+	.set	.LANCHOR56,. + 0
 	.type	g_l2p_last_update_region_id, %object
 	.size	g_l2p_last_update_region_id, 2
 g_l2p_last_update_region_id:
 	.zero	2
 	.section	.bss.g_max_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR77,. + 0
+	.set	.LANCHOR76,. + 0
 	.type	g_max_erase_count, %object
 	.size	g_max_erase_count, 4
 g_max_erase_count:
 	.zero	4
 	.section	.bss.g_min_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR78,. + 0
+	.set	.LANCHOR77,. + 0
 	.type	g_min_erase_count, %object
 	.size	g_min_erase_count, 4
 g_min_erase_count:
 	.zero	4
 	.section	.bss.g_nand_ops,"aw",@nobits
 	.align	3
-	.set	.LANCHOR107,. + 0
+	.set	.LANCHOR105,. + 0
 	.type	g_nand_ops, %object
 	.size	g_nand_ops, 32
 g_nand_ops:
@@ -22139,91 +22112,84 @@ g_num_free_superblocks:
 	.zero	2
 	.section	.bss.g_power_lost_recovery_flag,"aw",@nobits
 	.align	1
-	.set	.LANCHOR162,. + 0
+	.set	.LANCHOR161,. + 0
 	.type	g_power_lost_recovery_flag, %object
 	.size	g_power_lost_recovery_flag, 2
 g_power_lost_recovery_flag:
 	.zero	2
 	.section	.bss.g_recovery_page_min_ver,"aw",@nobits
 	.align	2
-	.set	.LANCHOR154,. + 0
+	.set	.LANCHOR153,. + 0
 	.type	g_recovery_page_min_ver, %object
 	.size	g_recovery_page_min_ver, 4
 g_recovery_page_min_ver:
 	.zero	4
 	.section	.bss.g_recovery_page_num,"aw",@nobits
 	.align	2
-	.set	.LANCHOR163,. + 0
+	.set	.LANCHOR162,. + 0
 	.type	g_recovery_page_num, %object
 	.size	g_recovery_page_num, 4
 g_recovery_page_num:
 	.zero	4
 	.section	.bss.g_recovery_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR164,. + 0
+	.set	.LANCHOR163,. + 0
 	.type	g_recovery_ppa_tbl, %object
 	.size	g_recovery_ppa_tbl, 128
 g_recovery_ppa_tbl:
 	.zero	128
-	.section	.bss.g_req_cache,"aw",@nobits
-	.align	3
-	.set	.LANCHOR150,. + 0
-	.type	g_req_cache, %object
-	.size	g_req_cache, 8
-g_req_cache:
-	.zero	8
 	.section	.bss.g_sys_ext_data,"aw",@nobits
 	.align	3
-	.set	.LANCHOR83,. + 0
+	.set	.LANCHOR81,. + 0
 	.type	g_sys_ext_data, %object
 	.size	g_sys_ext_data, 512
 g_sys_ext_data:
 	.zero	512
 	.section	.bss.g_sys_save_data,"aw",@nobits
 	.align	3
-	.set	.LANCHOR79,. + 0
+	.set	.LANCHOR39,. + 0
 	.type	g_sys_save_data, %object
 	.size	g_sys_save_data, 48
 g_sys_save_data:
 	.zero	48
 	.section	.bss.g_tmp_data_superblock_id,"aw",@nobits
 	.align	1
-	.set	.LANCHOR151,. + 0
+	.set	.LANCHOR150,. + 0
 	.type	g_tmp_data_superblock_id, %object
 	.size	g_tmp_data_superblock_id, 2
 g_tmp_data_superblock_id:
 	.zero	2
 	.section	.bss.g_totle_avg_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR75,. + 0
+	.set	.LANCHOR74,. + 0
 	.type	g_totle_avg_erase_count, %object
 	.size	g_totle_avg_erase_count, 4
 g_totle_avg_erase_count:
 	.zero	4
 	.section	.bss.g_totle_cache_write_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR66,. + 0
+	.set	.LANCHOR65,. + 0
 	.type	g_totle_cache_write_count, %object
 	.size	g_totle_cache_write_count, 4
 g_totle_cache_write_count:
 	.zero	4
 	.section	.bss.g_totle_discard_page_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR64,. + 0
+	.set	.LANCHOR63,. + 0
 	.type	g_totle_discard_page_count, %object
 	.size	g_totle_discard_page_count, 4
 g_totle_discard_page_count:
 	.zero	4
 	.section	.bss.g_totle_gc_page_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR68,. + 0
+	.set	.LANCHOR67,. + 0
 	.type	g_totle_gc_page_count, %object
 	.size	g_totle_gc_page_count, 4
 g_totle_gc_page_count:
 	.zero	4
 	.section	.bss.g_totle_l2p_write_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR67,. + 0
+	.set	.LANCHOR66,. + 0
 	.type	g_totle_l2p_write_count, %object
 	.size	g_totle_l2p_write_count, 4
 g_totle_l2p_write_count:
@@ -22237,42 +22203,42 @@ g_totle_map_block:
 	.zero	2
 	.section	.bss.g_totle_mlc_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR73,. + 0
+	.set	.LANCHOR72,. + 0
 	.type	g_totle_mlc_erase_count, %object
 	.size	g_totle_mlc_erase_count, 4
 g_totle_mlc_erase_count:
 	.zero	4
 	.section	.bss.g_totle_read_page_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR63,. + 0
+	.set	.LANCHOR62,. + 0
 	.type	g_totle_read_page_count, %object
 	.size	g_totle_read_page_count, 4
 g_totle_read_page_count:
 	.zero	4
 	.section	.bss.g_totle_read_sector,"aw",@nobits
 	.align	2
-	.set	.LANCHOR70,. + 0
+	.set	.LANCHOR69,. + 0
 	.type	g_totle_read_sector, %object
 	.size	g_totle_read_sector, 4
 g_totle_read_sector:
 	.zero	4
 	.section	.bss.g_totle_slc_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR74,. + 0
+	.set	.LANCHOR73,. + 0
 	.type	g_totle_slc_erase_count, %object
 	.size	g_totle_slc_erase_count, 4
 g_totle_slc_erase_count:
 	.zero	4
 	.section	.bss.g_totle_swl_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR152,. + 0
+	.set	.LANCHOR151,. + 0
 	.type	g_totle_swl_count, %object
 	.size	g_totle_swl_count, 4
 g_totle_swl_count:
 	.zero	4
 	.section	.bss.g_totle_sys_slc_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR76,. + 0
+	.set	.LANCHOR75,. + 0
 	.type	g_totle_sys_slc_erase_count, %object
 	.size	g_totle_sys_slc_erase_count, 4
 g_totle_sys_slc_erase_count:
@@ -22286,28 +22252,28 @@ g_totle_vendor_block:
 	.zero	2
 	.section	.bss.g_totle_write_page_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR65,. + 0
+	.set	.LANCHOR64,. + 0
 	.type	g_totle_write_page_count, %object
 	.size	g_totle_write_page_count, 4
 g_totle_write_page_count:
 	.zero	4
 	.section	.bss.g_totle_write_sector,"aw",@nobits
 	.align	2
-	.set	.LANCHOR69,. + 0
+	.set	.LANCHOR68,. + 0
 	.type	g_totle_write_sector, %object
 	.size	g_totle_write_sector, 4
 g_totle_write_sector:
 	.zero	4
 	.section	.bss.gc_discard_updated,"aw",@nobits
 	.align	2
-	.set	.LANCHOR172,. + 0
+	.set	.LANCHOR167,. + 0
 	.type	gc_discard_updated, %object
 	.size	gc_discard_updated, 4
 gc_discard_updated:
 	.zero	4
 	.section	.bss.gc_ink_free_return_value,"aw",@nobits
 	.align	1
-	.set	.LANCHOR174,. + 0
+	.set	.LANCHOR172,. + 0
 	.type	gc_ink_free_return_value, %object
 	.size	gc_ink_free_return_value, 2
 gc_ink_free_return_value:
@@ -22321,14 +22287,13 @@ gp_ect_tbl_info:
 	.zero	8
 	.section	.bss.gp_gc_page_buf_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR92,. + 0
+	.set	.LANCHOR90,. + 0
 	.type	gp_gc_page_buf_info, %object
 	.size	gp_gc_page_buf_info, 8
 gp_gc_page_buf_info:
 	.zero	8
 	.section	.bss.gp_last_act_superblock,"aw",@nobits
 	.align	3
-	.set	.LANCHOR171,. + 0
 	.type	gp_last_act_superblock, %object
 	.size	gp_last_act_superblock, 8
 gp_last_act_superblock:
@@ -22342,14 +22307,14 @@ p_blk_mode_table:
 	.zero	8
 	.section	.bss.p_data_block_list_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR42,. + 0
+	.set	.LANCHOR41,. + 0
 	.type	p_data_block_list_head, %object
 	.size	p_data_block_list_head, 8
 p_data_block_list_head:
 	.zero	8
 	.section	.bss.p_data_block_list_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR41,. + 0
+	.set	.LANCHOR40,. + 0
 	.type	p_data_block_list_table, %object
 	.size	p_data_block_list_table, 8
 p_data_block_list_table:
@@ -22363,7 +22328,7 @@ p_data_block_list_tail:
 	.zero	8
 	.section	.bss.p_erase_count_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR40,. + 0
+	.set	.LANCHOR43,. + 0
 	.type	p_erase_count_table, %object
 	.size	p_erase_count_table, 8
 p_erase_count_table:
@@ -22377,49 +22342,49 @@ p_free_data_block_list_head:
 	.zero	8
 	.section	.bss.p_gc_blk_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR98,. + 0
+	.set	.LANCHOR96,. + 0
 	.type	p_gc_blk_tbl, %object
 	.size	p_gc_blk_tbl, 8
 p_gc_blk_tbl:
 	.zero	8
 	.section	.bss.p_gc_data_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR93,. + 0
+	.set	.LANCHOR91,. + 0
 	.type	p_gc_data_buf, %object
 	.size	p_gc_data_buf, 8
 p_gc_data_buf:
 	.zero	8
 	.section	.bss.p_gc_page_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR100,. + 0
+	.set	.LANCHOR98,. + 0
 	.type	p_gc_page_info, %object
 	.size	p_gc_page_info, 8
 p_gc_page_info:
 	.zero	8
 	.section	.bss.p_gc_spare_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR94,. + 0
+	.set	.LANCHOR92,. + 0
 	.type	p_gc_spare_buf, %object
 	.size	p_gc_spare_buf, 8
 p_gc_spare_buf:
 	.zero	8
 	.section	.bss.p_io_data_buf_0,"aw",@nobits
 	.align	3
-	.set	.LANCHOR116,. + 0
+	.set	.LANCHOR115,. + 0
 	.type	p_io_data_buf_0, %object
 	.size	p_io_data_buf_0, 8
 p_io_data_buf_0:
 	.zero	8
 	.section	.bss.p_io_data_buf_1,"aw",@nobits
 	.align	3
-	.set	.LANCHOR114,. + 0
+	.set	.LANCHOR113,. + 0
 	.type	p_io_data_buf_1, %object
 	.size	p_io_data_buf_1, 8
 p_io_data_buf_1:
 	.zero	8
 	.section	.bss.p_io_spare_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR115,. + 0
+	.set	.LANCHOR114,. + 0
 	.type	p_io_spare_buf, %object
 	.size	p_io_spare_buf, 8
 p_io_spare_buf:
@@ -22433,7 +22398,7 @@ p_l2p_map_buf:
 	.zero	8
 	.section	.bss.p_l2p_ram_map,"aw",@nobits
 	.align	3
-	.set	.LANCHOR56,. + 0
+	.set	.LANCHOR55,. + 0
 	.type	p_l2p_ram_map, %object
 	.size	p_l2p_ram_map, 8
 p_l2p_ram_map:
@@ -22482,7 +22447,7 @@ p_swl_mul_table:
 	.zero	8
 	.section	.bss.p_sys_data_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR39,. + 0
+	.set	.LANCHOR107,. + 0
 	.type	p_sys_data_buf, %object
 	.size	p_sys_data_buf, 8
 p_sys_data_buf:
@@ -22496,7 +22461,7 @@ p_sys_data_buf_1:
 	.zero	8
 	.section	.bss.p_sys_spare_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR109,. + 0
+	.set	.LANCHOR108,. + 0
 	.type	p_sys_spare_buf, %object
 	.size	p_sys_spare_buf, 8
 p_sys_spare_buf:
@@ -22510,7 +22475,7 @@ p_valid_page_count_check_table:
 	.zero	8
 	.section	.bss.p_valid_page_count_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR43,. + 0
+	.set	.LANCHOR42,. + 0
 	.type	p_valid_page_count_table, %object
 	.size	p_valid_page_count_table, 8
 p_valid_page_count_table:
@@ -22552,14 +22517,14 @@ p_vendor_region_ppn_table:
 	.zero	8
 	.section	.bss.req_erase,"aw",@nobits
 	.align	3
-	.set	.LANCHOR112,. + 0
+	.set	.LANCHOR111,. + 0
 	.type	req_erase, %object
 	.size	req_erase, 8
 req_erase:
 	.zero	8
 	.section	.bss.req_gc,"aw",@nobits
 	.align	3
-	.set	.LANCHOR95,. + 0
+	.set	.LANCHOR93,. + 0
 	.type	req_gc, %object
 	.size	req_gc, 8
 req_gc:
@@ -22587,28 +22552,28 @@ req_read:
 	.zero	8
 	.section	.bss.req_sys,"aw",@nobits
 	.align	3
-	.set	.LANCHOR108,. + 0
+	.set	.LANCHOR106,. + 0
 	.type	req_sys, %object
 	.size	req_sys, 32
 req_sys:
 	.zero	32
 	.section	.data.ftl_gc_temp_block_bops_scan_page_addr,"aw",@progbits
 	.align	1
-	.set	.LANCHOR157,. + 0
+	.set	.LANCHOR156,. + 0
 	.type	ftl_gc_temp_block_bops_scan_page_addr, %object
 	.size	ftl_gc_temp_block_bops_scan_page_addr, 2
 ftl_gc_temp_block_bops_scan_page_addr:
 	.hword	-1
 	.section	.data.gFtlInitStatus,"aw",@progbits
 	.align	2
-	.set	.LANCHOR88,. + 0
+	.set	.LANCHOR86,. + 0
 	.type	gFtlInitStatus, %object
 	.size	gFtlInitStatus, 4
 gFtlInitStatus:
 	.word	-1
 	.section	.data.power_up_flag,"aw",@progbits
 	.align	2
-	.set	.LANCHOR179,. + 0
+	.set	.LANCHOR177,. + 0
 	.type	power_up_flag, %object
 	.size	power_up_flag, 4
 power_up_flag:
@@ -22624,14 +22589,19 @@ power_up_flag:
 .LC0:
 	.string	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\n"
 	.section	.rodata.FtlBbmTblFlush.str1.1,"aMS",@progbits,1
-.LC94:
+.LC97:
 	.string	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\n"
-.LC95:
+.LC98:
 	.string	"FtlBbmTblFlush error:%x\n"
-.LC96:
+.LC99:
 	.string	"FtlBbmTblFlush error = %x error count = %d\n"
+	.section	.rodata.FtlFreeSysBlkQueueOut.str1.1,"aMS",@progbits,1
+.LC82:
+	.string	"FtlFreeSysBlkQueueOut free count = %d\n"
+.LC83:
+	.string	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\n"
 	.section	.rodata.FtlGcFreeBadSuperBlk.str1.1,"aMS",@progbits,1
-.LC97:
+.LC100:
 	.string	"FtlGcFreeBadSuperBlk 0x%x\n"
 	.section	.rodata.FtlGcMarkBadPhyBlk.str1.1,"aMS",@progbits,1
 .LC74:
@@ -22640,15 +22610,15 @@ power_up_flag:
 .LC73:
 	.string	"FtlGcRefreshBlock  0x%x\n"
 	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",@progbits,1
-.LC100:
+.LC103:
 	.string	"no ect"
 	.section	.rodata.FtlMapWritePage.str1.1,"aMS",@progbits,1
-.LC86:
+.LC89:
 	.string	"FtlMapWritePage error = %x \n"
-.LC87:
+.LC90:
 	.string	"FtlMapWritePage error = %x error count = %d\n"
 	.section	.rodata.FtlMemInit.str1.1,"aMS",@progbits,1
-.LC82:
+.LC85:
 	.string	"%s error allocating memory. return -1\n"
 	.section	.rodata.FtlPrintInfo2buf.str1.1,"aMS",@progbits,1
 .LC2:
@@ -22788,19 +22758,19 @@ power_up_flag:
 .LC69:
 	.string	"free %d. [0x%x] 0x%x  0x%x\n"
 	.section	.rodata.FtlProgPages.str1.1,"aMS",@progbits,1
-.LC103:
+.LC106:
 	.string	"Ftlwrite decrement_vpc_count %x = %d\n"
 	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",@progbits,1
-.LC99:
+.LC102:
 	.string	"spuer block %x vpn is 0\n "
 	.section	.rodata.FtlVpcCheckAndModify.str1.1,"aMS",@progbits,1
-.LC102:
+.LC105:
 	.string	"FtlCheckVpc %x = %x  %x\n"
 	.section	.rodata.FtlVpcTblFlush.str1.1,"aMS",@progbits,1
-.LC101:
+.LC104:
 	.string	"FtlVpcTblFlush error = %x error count = %d\n"
 	.section	.rodata.FtlWrite.str1.1,"aMS",@progbits,1
-.LC105:
+.LC108:
 	.string	"FtlWrite: lpa error:%x %x\n"
 	.section	.rodata.GetSwlReplaceBlock.str1.1,"aMS",@progbits,1
 .LC72:
@@ -22808,184 +22778,184 @@ power_up_flag:
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",@progbits,1
 .LC1:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
-	.section	.rodata.__func__.6104,"a",@progbits
+	.section	.rodata.__func__.6107,"a",@progbits
 	.align	3
 	.set	.LANCHOR138,. + 0
-	.type	__func__.6104, %object
-	.size	__func__.6104, 11
-__func__.6104:
+	.type	__func__.6107, %object
+	.size	__func__.6107, 11
+__func__.6107:
 	.string	"FtlMemInit"
-	.section	.rodata.__func__.6228,"a",@progbits
+	.section	.rodata.__func__.6231,"a",@progbits
 	.align	3
 	.set	.LANCHOR170,. + 0
-	.type	__func__.6228, %object
-	.size	__func__.6228, 13
-__func__.6228:
+	.type	__func__.6231, %object
+	.size	__func__.6231, 13
+__func__.6231:
 	.string	"FtlProgPages"
-	.section	.rodata.__func__.6256,"a",@progbits
+	.section	.rodata.__func__.6259,"a",@progbits
 	.align	3
-	.set	.LANCHOR180,. + 0
-	.type	__func__.6256, %object
-	.size	__func__.6256, 9
-__func__.6256:
+	.set	.LANCHOR178,. + 0
+	.type	__func__.6259, %object
+	.size	__func__.6259, 9
+__func__.6259:
 	.string	"FtlWrite"
-	.section	.rodata.__func__.6320,"a",@progbits
+	.section	.rodata.__func__.6323,"a",@progbits
 	.align	3
 	.set	.LANCHOR139,. + 0
-	.type	__func__.6320, %object
-	.size	__func__.6320, 14
-__func__.6320:
+	.type	__func__.6323, %object
+	.size	__func__.6323, 14
+__func__.6323:
 	.string	"FtlBbt2Bitmap"
-	.section	.rodata.__func__.6363,"a",@progbits
+	.section	.rodata.__func__.6366,"a",@progbits
 	.align	3
-	.set	.LANCHOR165,. + 0
-	.type	__func__.6363, %object
-	.size	__func__.6363, 11
-__func__.6363:
+	.set	.LANCHOR164,. + 0
+	.type	__func__.6366, %object
+	.size	__func__.6366, 11
+__func__.6366:
 	.string	"FtlLoadBbt"
-	.section	.rodata.__func__.6486,"a",@progbits
+	.section	.rodata.__func__.6483,"a",@progbits
 	.align	3
 	.set	.LANCHOR49,. + 0
-	.type	__func__.6486, %object
-	.size	__func__.6486, 17
-__func__.6486:
+	.type	__func__.6483, %object
+	.size	__func__.6483, 17
+__func__.6483:
 	.string	"INSERT_FREE_LIST"
-	.section	.rodata.__func__.6491,"a",@progbits
+	.section	.rodata.__func__.6488,"a",@progbits
 	.align	3
 	.set	.LANCHOR46,. + 0
-	.type	__func__.6491, %object
-	.size	__func__.6491, 17
-__func__.6491:
+	.type	__func__.6488, %object
+	.size	__func__.6488, 17
+__func__.6488:
 	.string	"INSERT_DATA_LIST"
-	.section	.rodata.__func__.6521,"a",@progbits
+	.section	.rodata.__func__.6519,"a",@progbits
 	.align	3
 	.set	.LANCHOR50,. + 0
-	.type	__func__.6521, %object
-	.size	__func__.6521, 17
-__func__.6521:
+	.type	__func__.6519, %object
+	.size	__func__.6519, 17
+__func__.6519:
 	.string	"List_remove_node"
-	.section	.rodata.__func__.6553,"a",@progbits
+	.section	.rodata.__func__.6551,"a",@progbits
 	.align	3
 	.set	.LANCHOR54,. + 0
-	.type	__func__.6553, %object
-	.size	__func__.6553, 22
-__func__.6553:
+	.type	__func__.6551, %object
+	.size	__func__.6551, 22
+__func__.6551:
 	.string	"List_update_data_list"
-	.section	.rodata.__func__.6562,"a",@progbits
+	.section	.rodata.__func__.6560,"a",@progbits
 	.align	3
 	.set	.LANCHOR140,. + 0
-	.type	__func__.6562, %object
-	.size	__func__.6562, 16
-__func__.6562:
+	.type	__func__.6560, %object
+	.size	__func__.6560, 16
+__func__.6560:
 	.string	"load_l2p_region"
-	.section	.rodata.__func__.6594,"a",@progbits
+	.section	.rodata.__func__.6593,"a",@progbits
 	.align	3
-	.set	.LANCHOR55,. + 0
-	.type	__func__.6594, %object
-	.size	__func__.6594, 26
-__func__.6594:
+	.set	.LANCHOR116,. + 0
+	.type	__func__.6593, %object
+	.size	__func__.6593, 26
+__func__.6593:
 	.string	"ftl_map_blk_alloc_new_blk"
-	.section	.rodata.__func__.6605,"a",@progbits
+	.section	.rodata.__func__.6604,"a",@progbits
 	.align	3
 	.set	.LANCHOR143,. + 0
-	.type	__func__.6605, %object
-	.size	__func__.6605, 15
-__func__.6605:
+	.type	__func__.6604, %object
+	.size	__func__.6604, 15
+__func__.6604:
 	.string	"ftl_map_blk_gc"
-	.section	.rodata.__func__.6619,"a",@progbits
+	.section	.rodata.__func__.6618,"a",@progbits
 	.align	3
 	.set	.LANCHOR141,. + 0
-	.type	__func__.6619, %object
-	.size	__func__.6619, 31
-__func__.6619:
+	.type	__func__.6618, %object
+	.size	__func__.6618, 31
+__func__.6618:
 	.string	"Ftl_write_map_blk_to_last_page"
-	.section	.rodata.__func__.6633,"a",@progbits
+	.section	.rodata.__func__.6632,"a",@progbits
 	.align	3
 	.set	.LANCHOR142,. + 0
-	.type	__func__.6633, %object
-	.size	__func__.6633, 16
-__func__.6633:
+	.type	__func__.6632, %object
+	.size	__func__.6632, 16
+__func__.6632:
 	.string	"FtlMapWritePage"
-	.section	.rodata.__func__.6658,"a",@progbits
+	.section	.rodata.__func__.6657,"a",@progbits
 	.align	3
-	.set	.LANCHOR58,. + 0
-	.type	__func__.6658, %object
-	.size	__func__.6658, 22
-__func__.6658:
+	.set	.LANCHOR57,. + 0
+	.type	__func__.6657, %object
+	.size	__func__.6657, 22
+__func__.6657:
 	.string	"select_l2p_ram_region"
-	.section	.rodata.__func__.6675,"a",@progbits
+	.section	.rodata.__func__.6674,"a",@progbits
 	.align	3
 	.set	.LANCHOR145,. + 0
-	.type	__func__.6675, %object
-	.size	__func__.6675, 9
-__func__.6675:
+	.type	__func__.6674, %object
+	.size	__func__.6674, 9
+__func__.6674:
 	.string	"log2phys"
-	.section	.rodata.__func__.6748,"a",@progbits
+	.section	.rodata.__func__.6747,"a",@progbits
 	.align	3
-	.set	.LANCHOR167,. + 0
-	.type	__func__.6748, %object
-	.size	__func__.6748, 15
-__func__.6748:
+	.set	.LANCHOR166,. + 0
+	.type	__func__.6747, %object
+	.size	__func__.6747, 15
+__func__.6747:
 	.string	"FtlVpcTblFlush"
-	.section	.rodata.__func__.6770,"a",@progbits
+	.section	.rodata.__func__.6769,"a",@progbits
 	.align	3
 	.set	.LANCHOR148,. + 0
-	.type	__func__.6770, %object
-	.size	__func__.6770, 14
-__func__.6770:
+	.type	__func__.6769, %object
+	.size	__func__.6769, 14
+__func__.6769:
 	.string	"FtlScanSysBlk"
-	.section	.rodata.__func__.6827,"a",@progbits
+	.section	.rodata.__func__.6826,"a",@progbits
 	.align	3
-	.set	.LANCHOR181,. + 0
-	.type	__func__.6827, %object
-	.size	__func__.6827, 15
-__func__.6827:
+	.set	.LANCHOR179,. + 0
+	.type	__func__.6826, %object
+	.size	__func__.6826, 15
+__func__.6826:
 	.string	"FtlLoadSysInfo"
-	.section	.rodata.__func__.6890,"a",@progbits
+	.section	.rodata.__func__.6889,"a",@progbits
 	.align	3
 	.set	.LANCHOR146,. + 0
-	.type	__func__.6890, %object
-	.size	__func__.6890, 16
-__func__.6890:
+	.type	__func__.6889, %object
+	.size	__func__.6889, 16
+__func__.6889:
 	.string	"FtlReUsePrevPpa"
-	.section	.rodata.__func__.6924,"a",@progbits
+	.section	.rodata.__func__.6923,"a",@progbits
 	.align	3
-	.set	.LANCHOR161,. + 0
-	.type	__func__.6924, %object
-	.size	__func__.6924, 22
-__func__.6924:
+	.set	.LANCHOR160,. + 0
+	.type	__func__.6923, %object
+	.size	__func__.6923, 22
+__func__.6923:
 	.string	"FtlRecoverySuperblock"
-	.section	.rodata.__func__.6981,"a",@progbits
+	.section	.rodata.__func__.6980,"a",@progbits
 	.align	3
-	.set	.LANCHOR61,. + 0
-	.type	__func__.6981, %object
-	.size	__func__.6981, 16
-__func__.6981:
+	.set	.LANCHOR60,. + 0
+	.type	__func__.6980, %object
+	.size	__func__.6980, 16
+__func__.6980:
 	.string	"make_superblock"
-	.section	.rodata.__func__.7002,"a",@progbits
+	.section	.rodata.__func__.7001,"a",@progbits
 	.align	3
-	.set	.LANCHOR155,. + 0
-	.type	__func__.7002, %object
-	.size	__func__.7002, 18
-__func__.7002:
+	.set	.LANCHOR154,. + 0
+	.type	__func__.7001, %object
+	.size	__func__.7001, 18
+__func__.7001:
 	.string	"SupperBlkListInit"
-	.section	.rodata.__func__.7027,"a",@progbits
+	.section	.rodata.__func__.7026,"a",@progbits
 	.align	3
 	.set	.LANCHOR168,. + 0
-	.type	__func__.7027, %object
-	.size	__func__.7027, 21
-__func__.7027:
+	.type	__func__.7026, %object
+	.size	__func__.7026, 21
+__func__.7026:
 	.string	"FtlVpcCheckAndModify"
-	.section	.rodata.__func__.7043,"a",@progbits
+	.section	.rodata.__func__.7042,"a",@progbits
 	.align	3
-	.set	.LANCHOR156,. + 0
-	.type	__func__.7043, %object
-	.size	__func__.7043, 14
-__func__.7043:
+	.set	.LANCHOR155,. + 0
+	.type	__func__.7042, %object
+	.size	__func__.7042, 14
+__func__.7042:
 	.string	"ftl_check_vpc"
 	.section	.rodata.__func__.7127,"a",@progbits
 	.align	3
-	.set	.LANCHOR158,. + 0
+	.set	.LANCHOR157,. + 0
 	.type	__func__.7127, %object
 	.size	__func__.7127, 25
 __func__.7127:
@@ -22999,79 +22969,82 @@ __func__.7148:
 	.string	"allocate_new_data_superblock"
 	.section	.rodata.__func__.7155,"a",@progbits
 	.align	3
-	.set	.LANCHOR90,. + 0
+	.set	.LANCHOR88,. + 0
 	.type	__func__.7155, %object
 	.size	__func__.7155, 19
 __func__.7155:
 	.string	"get_new_active_ppa"
 	.section	.rodata.__func__.7168,"a",@progbits
 	.align	3
-	.set	.LANCHOR159,. + 0
+	.set	.LANCHOR158,. + 0
 	.type	__func__.7168, %object
 	.size	__func__.7168, 16
 __func__.7168:
 	.string	"update_vpc_list"
 	.section	.rodata.__func__.7175,"a",@progbits
 	.align	3
-	.set	.LANCHOR160,. + 0
+	.set	.LANCHOR159,. + 0
 	.type	__func__.7175, %object
 	.size	__func__.7175, 20
 __func__.7175:
 	.string	"decrement_vpc_count"
 	.section	.rodata.__func__.7245,"a",@progbits
 	.align	3
-	.set	.LANCHOR173,. + 0
+	.set	.LANCHOR171,. + 0
 	.type	__func__.7245, %object
 	.size	__func__.7245, 19
 __func__.7245:
 	.string	"FtlGcFreeTempBlock"
 	.section	.rodata.__func__.7351,"a",@progbits
 	.align	3
-	.set	.LANCHOR177,. + 0
+	.set	.LANCHOR175,. + 0
 	.type	__func__.7351, %object
 	.size	__func__.7351, 23
 __func__.7351:
 	.string	"rk_ftl_garbage_collect"
 	.section	.rodata.__func__.7615,"a",@progbits
 	.align	3
-	.set	.LANCHOR106,. + 0
+	.set	.LANCHOR104,. + 0
 	.type	__func__.7615, %object
 	.size	__func__.7615, 15
 __func__.7615:
 	.string	"FlashReadPages"
 	.section	.rodata.__func__.7632,"a",@progbits
 	.align	3
-	.set	.LANCHOR110,. + 0
+	.set	.LANCHOR109,. + 0
 	.type	__func__.7632, %object
 	.size	__func__.7632, 15
 __func__.7632:
 	.string	"FlashProgPages"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",@progbits,1
-.LC98:
+.LC101:
 	.string	"decrement_vpc_count %x = %d\n"
 	.section	.rodata.ftl_check_vpc.str1.1,"aMS",@progbits,1
-.LC91:
+.LC94:
 	.string	"...%s enter...\n"
-.LC92:
+.LC95:
 	.string	"FtlCheckVpc2 %x = %x  %x\n"
-.LC93:
+.LC96:
 	.string	"free blk vpc error %x = %x  %x\n"
+	.section	.rodata.ftl_map_blk_alloc_new_blk.str1.1,"aMS",@progbits,1
+.LC84:
+	.string	"FtlFreeSysBlkQueueOut = %x, free count = %d\n"
 	.section	.rodata.ftl_scan_all_data.str1.1,"aMS",@progbits,1
-.LC88:
+.LC91:
 	.string	"ftl_scan_all_data = %x\n"
-.LC89:
+.LC92:
 	.string	"scan lpa = %x ppa= %x\n"
-.LC90:
+.LC93:
 	.string	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\n"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",@progbits,1
-.LC83:
+.LC86:
 	.string	"region_id = %x phyAddr = %x\n"
-.LC84:
+.LC87:
 	.string	"spare:"
-.LC85:
+.LC88:
 	.string	"map_ppn:"
 	.section	.rodata.rk_ftl_garbage_collect.str1.1,"aMS",@progbits,1
-.LC104:
+.LC107:
 	.string	"SWL %x, FSB = %x vpc= %x,ec=%x th=%x\n"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
 .LC75:
@@ -23084,7 +23057,7 @@ __func__.7632:
 	.string	"\n"
 	.section	.rodata.rknand_proc_ftlread.str1.1,"aMS",@progbits,1
 .LC70:
-	.string	"SFTL version: 5.0.43 20180116"
+	.string	"SFTL version: 5.0.44 20180713"
 .LC71:
 	.string	"%s\n"
 	.text
@@ -23116,16 +23089,16 @@ __func__.7632:
 	.file 31 "include/log.h"
 	.section	.debug_info,"",@progbits
 .Ldebug_info0:
-	.4byte	0xa977
+	.4byte	0xa979
 	.2byte	0x4
 	.4byte	.Ldebug_abbrev0
 	.byte	0x8
 	.uleb128 0x1
-	.4byte	.LASF882
+	.4byte	.LASF880
 	.byte	0xc
-	.4byte	.LASF883
-	.4byte	.LASF884
-	.4byte	.Ldebug_ranges0+0x330
+	.4byte	.LASF881
+	.4byte	.LASF882
+	.4byte	.Ldebug_ranges0+0x3c0
 	.8byte	0
 	.4byte	.Ldebug_line0
 	.uleb128 0x2
@@ -26344,106 +26317,98 @@ __func__.7632:
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	req_gc_dst
-	.uleb128 0x28
-	.4byte	.LASF443
-	.byte	0x1b
-	.byte	0x4d
-	.4byte	0x1abc
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_req_cache
 	.uleb128 0xa
 	.4byte	0xdbe
-	.4byte	0x1b3b
+	.4byte	0x1b26
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x1f
 	.byte	0
 	.uleb128 0x28
-	.4byte	.LASF444
+	.4byte	.LASF443
 	.byte	0x1b
-	.byte	0x4f
-	.4byte	0x1b2b
+	.byte	0x4d
+	.4byte	0x1b16
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_plane_order_table
 	.uleb128 0x28
-	.4byte	.LASF445
+	.4byte	.LASF444
 	.byte	0x1b
-	.byte	0x51
+	.byte	0x4f
 	.4byte	0x1001
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_sys_data_buf
 	.uleb128 0x28
-	.4byte	.LASF446
+	.4byte	.LASF445
 	.byte	0x1b
-	.byte	0x52
+	.byte	0x50
 	.4byte	0x1001
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_sys_data_buf_1
 	.uleb128 0x28
-	.4byte	.LASF447
+	.4byte	.LASF446
 	.byte	0x1b
-	.byte	0x53
+	.byte	0x51
 	.4byte	0x1001
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_vendor_data_buf
 	.uleb128 0x28
-	.4byte	.LASF448
+	.4byte	.LASF447
 	.byte	0x1b
-	.byte	0x54
+	.byte	0x52
 	.4byte	0x1001
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_sys_spare_buf
 	.uleb128 0x28
-	.4byte	.LASF449
+	.4byte	.LASF448
 	.byte	0x1b
-	.byte	0x55
+	.byte	0x53
 	.4byte	0x1001
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_io_data_buf_0
 	.uleb128 0x28
-	.4byte	.LASF450
+	.4byte	.LASF449
 	.byte	0x1b
-	.byte	0x56
+	.byte	0x54
 	.4byte	0x1001
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_io_data_buf_1
 	.uleb128 0x28
-	.4byte	.LASF451
+	.4byte	.LASF450
 	.byte	0x1b
-	.byte	0x57
+	.byte	0x55
 	.4byte	0x1001
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_io_spare_buf
 	.uleb128 0x28
-	.4byte	.LASF452
+	.4byte	.LASF451
 	.byte	0x1b
-	.byte	0x58
+	.byte	0x56
 	.4byte	0x1001
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_gc_spare_buf
 	.uleb128 0x28
-	.4byte	.LASF453
+	.4byte	.LASF452
 	.byte	0x1b
-	.byte	0x59
+	.byte	0x57
 	.4byte	0x1001
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_gc_data_buf
 	.uleb128 0x28
-	.4byte	.LASF454
+	.4byte	.LASF453
 	.byte	0x1b
-	.byte	0x5a
-	.4byte	0x1c22
+	.byte	0x58
+	.4byte	0x1c0d
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	gp_gc_page_buf_info
@@ -26451,26 +26416,26 @@ __func__.7632:
 	.byte	0x8
 	.4byte	0x16d6
 	.uleb128 0x28
-	.4byte	.LASF455
+	.4byte	.LASF454
 	.byte	0x1b
-	.byte	0x5b
+	.byte	0x59
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	c_gc_page_buf_num
 	.uleb128 0x28
-	.4byte	.LASF456
+	.4byte	.LASF455
 	.byte	0x1b
-	.byte	0x5c
+	.byte	0x5a
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_gc_num_req
 	.uleb128 0x28
-	.4byte	.LASF457
+	.4byte	.LASF456
 	.byte	0x1b
-	.byte	0x5d
-	.4byte	0x1c67
+	.byte	0x5b
+	.4byte	0x1c52
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	gp_ect_tbl_info
@@ -26478,146 +26443,146 @@ __func__.7632:
 	.byte	0x8
 	.4byte	0x113b
 	.uleb128 0x28
-	.4byte	.LASF458
+	.4byte	.LASF457
 	.byte	0x1b
-	.byte	0x5e
+	.byte	0x5c
 	.4byte	0xdc9
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_ect_tbl_info_size
 	.uleb128 0x28
-	.4byte	.LASF459
+	.4byte	.LASF458
 	.byte	0x1b
-	.byte	0x5f
+	.byte	0x5d
 	.4byte	0x10f8
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_erase_count_table
 	.uleb128 0x28
-	.4byte	.LASF460
+	.4byte	.LASF459
 	.byte	0x1b
-	.byte	0x61
+	.byte	0x5f
 	.4byte	0x10f8
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_swl_mul_table
 	.uleb128 0x28
-	.4byte	.LASF461
+	.4byte	.LASF460
 	.byte	0x1b
-	.byte	0x62
+	.byte	0x60
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_totle_swl_count
 	.uleb128 0x28
-	.4byte	.LASF462
+	.4byte	.LASF461
 	.byte	0x1b
-	.byte	0x63
+	.byte	0x61
 	.4byte	0x10f8
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_valid_page_count_table
 	.uleb128 0x28
-	.4byte	.LASF463
+	.4byte	.LASF462
 	.byte	0x1b
-	.byte	0x64
+	.byte	0x62
 	.4byte	0x10f8
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_valid_page_count_check_table
 	.uleb128 0x28
-	.4byte	.LASF464
+	.4byte	.LASF463
 	.byte	0x1b
-	.byte	0x65
+	.byte	0x63
 	.4byte	0x1001
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_blk_mode_table
 	.uleb128 0x28
-	.4byte	.LASF465
+	.4byte	.LASF464
 	.byte	0x1b
-	.byte	0x67
+	.byte	0x65
 	.4byte	0x10f8
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_map_block_table
 	.uleb128 0x28
-	.4byte	.LASF466
+	.4byte	.LASF465
 	.byte	0x1b
-	.byte	0x68
+	.byte	0x66
 	.4byte	0x10f8
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_map_block_valid_page_count
 	.uleb128 0x28
-	.4byte	.LASF467
+	.4byte	.LASF466
 	.byte	0x1b
-	.byte	0x69
+	.byte	0x67
 	.4byte	0x1001
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_map_block_ver_table
 	.uleb128 0x28
-	.4byte	.LASF468
+	.4byte	.LASF467
 	.byte	0x1b
-	.byte	0x6a
+	.byte	0x68
 	.4byte	0x1001
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_map_region_ppn_table
 	.uleb128 0x28
-	.4byte	.LASF469
+	.4byte	.LASF468
 	.byte	0x1b
-	.byte	0x6b
+	.byte	0x69
 	.4byte	0xdc9
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_totle_map_block
 	.uleb128 0x28
-	.4byte	.LASF470
+	.4byte	.LASF469
 	.byte	0x1b
-	.byte	0x6d
+	.byte	0x6b
 	.4byte	0x10f8
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_vendor_block_table
 	.uleb128 0x28
-	.4byte	.LASF471
+	.4byte	.LASF470
 	.byte	0x1b
-	.byte	0x6e
+	.byte	0x6c
 	.4byte	0x10f8
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_vendor_block_valid_page_count
 	.uleb128 0x28
-	.4byte	.LASF472
+	.4byte	.LASF471
 	.byte	0x1b
-	.byte	0x6f
+	.byte	0x6d
 	.4byte	0x1001
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_vendor_block_ver_table
 	.uleb128 0x28
-	.4byte	.LASF473
+	.4byte	.LASF472
 	.byte	0x1b
-	.byte	0x70
+	.byte	0x6e
 	.4byte	0x1001
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_vendor_region_ppn_table
 	.uleb128 0x28
-	.4byte	.LASF474
+	.4byte	.LASF473
 	.byte	0x1b
-	.byte	0x71
+	.byte	0x6f
 	.4byte	0xdc9
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_totle_vendor_block
 	.uleb128 0x28
-	.4byte	.LASF475
+	.4byte	.LASF474
 	.byte	0x1b
-	.byte	0x73
-	.4byte	0x1de7
+	.byte	0x71
+	.4byte	0x1dd2
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_l2p_ram_map
@@ -26625,26 +26590,26 @@ __func__.7632:
 	.byte	0x8
 	.4byte	0x10fe
 	.uleb128 0x28
-	.4byte	.LASF476
+	.4byte	.LASF475
 	.byte	0x1b
-	.byte	0x74
+	.byte	0x72
 	.4byte	0x1001
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_l2p_map_buf
 	.uleb128 0x28
-	.4byte	.LASF477
+	.4byte	.LASF476
 	.byte	0x1b
-	.byte	0x75
+	.byte	0x73
 	.4byte	0xdc9
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_l2p_last_update_region_id
 	.uleb128 0x28
-	.4byte	.LASF478
+	.4byte	.LASF477
 	.byte	0x1b
-	.byte	0x7c
-	.4byte	0x1e2c
+	.byte	0x7a
+	.4byte	0x1e17
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_data_block_list_table
@@ -26652,82 +26617,82 @@ __func__.7632:
 	.byte	0x8
 	.4byte	0x1573
 	.uleb128 0x28
-	.4byte	.LASF479
+	.4byte	.LASF478
 	.byte	0x1b
-	.byte	0x7d
-	.4byte	0x1e2c
+	.byte	0x7b
+	.4byte	0x1e17
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_free_data_block_list_head
 	.uleb128 0x28
-	.4byte	.LASF480
+	.4byte	.LASF479
 	.byte	0x1b
-	.byte	0x7f
-	.4byte	0x1e2c
+	.byte	0x7d
+	.4byte	0x1e17
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_data_block_list_head
 	.uleb128 0x28
-	.4byte	.LASF481
+	.4byte	.LASF480
 	.byte	0x1b
-	.byte	0x80
-	.4byte	0x1e2c
+	.byte	0x7e
+	.4byte	0x1e17
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_data_block_list_tail
 	.uleb128 0x28
-	.4byte	.LASF482
+	.4byte	.LASF481
 	.byte	0x1b
-	.byte	0x81
+	.byte	0x7f
 	.4byte	0xdc9
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_num_free_superblocks
 	.uleb128 0x28
-	.4byte	.LASF483
+	.4byte	.LASF482
 	.byte	0x1b
-	.byte	0x82
+	.byte	0x80
 	.4byte	0xdc9
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_num_data_superblocks
 	.uleb128 0x28
-	.4byte	.LASF484
+	.4byte	.LASF483
 	.byte	0x1b
-	.byte	0x83
+	.byte	0x81
 	.4byte	0x15ff
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_active_superblock
 	.uleb128 0x28
-	.4byte	.LASF485
+	.4byte	.LASF484
 	.byte	0x1b
-	.byte	0x84
+	.byte	0x82
 	.4byte	0x15ff
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_buffer_superblock
 	.uleb128 0x28
-	.4byte	.LASF486
+	.4byte	.LASF485
 	.byte	0x1b
-	.byte	0x85
+	.byte	0x83
 	.4byte	0x15ff
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_gc_temp_superblock
 	.uleb128 0x28
-	.4byte	.LASF487
+	.4byte	.LASF486
 	.byte	0x1b
-	.byte	0x86
+	.byte	0x84
 	.4byte	0x15ff
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_gc_superblock
 	.uleb128 0x28
-	.4byte	.LASF488
+	.4byte	.LASF487
 	.byte	0x1b
-	.byte	0x87
-	.4byte	0x1f04
+	.byte	0x85
+	.4byte	0x1eef
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	gp_last_act_superblock
@@ -26735,26 +26700,26 @@ __func__.7632:
 	.byte	0x8
 	.4byte	0x15ff
 	.uleb128 0x28
-	.4byte	.LASF489
+	.4byte	.LASF488
 	.byte	0x1b
-	.byte	0x88
+	.byte	0x86
 	.4byte	0x1320
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_sys_save_data
 	.uleb128 0x28
-	.4byte	.LASF490
+	.4byte	.LASF489
 	.byte	0x1b
-	.byte	0x89
+	.byte	0x87
 	.4byte	0x141d
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_sys_ext_data
 	.uleb128 0x28
-	.4byte	.LASF491
+	.4byte	.LASF490
 	.byte	0x1b
-	.byte	0x8b
-	.4byte	0x1f49
+	.byte	0x89
+	.4byte	0x1f34
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_gc_page_info
@@ -26762,368 +26727,368 @@ __func__.7632:
 	.byte	0x8
 	.4byte	0x16a1
 	.uleb128 0x28
-	.4byte	.LASF492
+	.4byte	.LASF491
 	.byte	0x1b
-	.byte	0x8c
+	.byte	0x8a
 	.4byte	0x10f8
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_gc_blk_tbl
 	.uleb128 0x28
-	.4byte	.LASF493
+	.4byte	.LASF492
 	.byte	0x1b
-	.byte	0x8d
+	.byte	0x8b
 	.4byte	0xdc9
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_gc_blk_num
 	.uleb128 0x28
-	.4byte	.LASF494
+	.4byte	.LASF493
 	.byte	0x1b
-	.byte	0x8e
+	.byte	0x8c
 	.4byte	0xdc9
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_gc_page_offset
 	.uleb128 0x28
-	.4byte	.LASF495
+	.4byte	.LASF494
 	.byte	0x1b
-	.byte	0x8f
+	.byte	0x8d
 	.4byte	0xdc9
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_gc_cur_blk_valid_pages
 	.uleb128 0x28
-	.4byte	.LASF496
+	.4byte	.LASF495
 	.byte	0x1b
-	.byte	0x90
+	.byte	0x8e
 	.4byte	0xdc9
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_gc_cur_blk_max_valid_pages
 	.uleb128 0x28
-	.4byte	.LASF497
+	.4byte	.LASF496
 	.byte	0x1b
-	.byte	0x91
+	.byte	0x8f
 	.4byte	0xdc9
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_gc_next_blk
 	.uleb128 0x28
-	.4byte	.LASF498
+	.4byte	.LASF497
 	.byte	0x1b
-	.byte	0x92
+	.byte	0x90
 	.4byte	0xdc9
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_gc_next_blk_1
 	.uleb128 0x28
-	.4byte	.LASF499
+	.4byte	.LASF498
 	.byte	0x1b
-	.byte	0x93
+	.byte	0x91
 	.4byte	0xdc9
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_gc_bad_block_temp_num
 	.uleb128 0x28
-	.4byte	.LASF500
+	.4byte	.LASF499
 	.byte	0x1b
-	.byte	0x94
+	.byte	0x92
 	.4byte	0xdc9
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_gc_bad_block_gc_index
 	.uleb128 0xa
 	.4byte	0xdc9
-	.4byte	0x201c
+	.4byte	0x2007
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x10
 	.byte	0
 	.uleb128 0x28
-	.4byte	.LASF501
+	.4byte	.LASF500
 	.byte	0x1b
-	.byte	0x95
-	.4byte	0x200c
+	.byte	0x93
+	.4byte	0x1ff7
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_gc_bad_block_temp_tbl
 	.uleb128 0x28
-	.4byte	.LASF502
+	.4byte	.LASF501
 	.byte	0x1b
-	.byte	0x97
+	.byte	0x95
 	.4byte	0xdc9
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_gc_free_blk_threshold
 	.uleb128 0x28
-	.4byte	.LASF503
+	.4byte	.LASF502
 	.byte	0x1b
-	.byte	0x98
+	.byte	0x96
 	.4byte	0xdc9
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_gc_merge_free_blk_threshold
 	.uleb128 0x28
-	.4byte	.LASF504
+	.4byte	.LASF503
 	.byte	0x1b
-	.byte	0x99
+	.byte	0x97
 	.4byte	0xdc9
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_gc_blk_index
 	.uleb128 0x28
-	.4byte	.LASF505
+	.4byte	.LASF504
 	.byte	0x1b
-	.byte	0x9b
+	.byte	0x99
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_totle_gc_page_count
 	.uleb128 0x28
-	.4byte	.LASF506
+	.4byte	.LASF505
 	.byte	0x1b
-	.byte	0x9c
+	.byte	0x9a
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_totle_write_page_count
 	.uleb128 0x28
-	.4byte	.LASF507
+	.4byte	.LASF506
 	.byte	0x1b
-	.byte	0x9d
+	.byte	0x9b
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_totle_write_sector
 	.uleb128 0x28
-	.4byte	.LASF508
+	.4byte	.LASF507
 	.byte	0x1b
-	.byte	0x9e
+	.byte	0x9c
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_totle_read_sector
 	.uleb128 0x28
-	.4byte	.LASF509
+	.4byte	.LASF508
 	.byte	0x1b
-	.byte	0xa0
+	.byte	0x9e
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_totle_discard_page_count
 	.uleb128 0x28
-	.4byte	.LASF510
+	.4byte	.LASF509
 	.byte	0x1b
-	.byte	0xa1
+	.byte	0x9f
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_totle_read_page_count
 	.uleb128 0x28
-	.4byte	.LASF511
+	.4byte	.LASF510
 	.byte	0x1b
-	.byte	0xa2
+	.byte	0xa0
 	.4byte	0xdc9
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_tmp_data_superblock_id
 	.uleb128 0x28
-	.4byte	.LASF512
+	.4byte	.LASF511
 	.byte	0x1b
-	.byte	0xa3
+	.byte	0xa1
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_totle_cache_write_count
 	.uleb128 0x28
-	.4byte	.LASF513
+	.4byte	.LASF512
 	.byte	0x1b
-	.byte	0xa4
+	.byte	0xa2
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_totle_l2p_write_count
 	.uleb128 0x28
-	.4byte	.LASF514
+	.4byte	.LASF513
 	.byte	0x1b
-	.byte	0xa6
+	.byte	0xa4
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_totle_mlc_erase_count
 	.uleb128 0x28
-	.4byte	.LASF515
+	.4byte	.LASF514
 	.byte	0x1b
-	.byte	0xa7
+	.byte	0xa5
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_totle_avg_erase_count
 	.uleb128 0x28
-	.4byte	.LASF516
+	.4byte	.LASF515
 	.byte	0x1b
-	.byte	0xa8
+	.byte	0xa6
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_min_erase_count
 	.uleb128 0x28
-	.4byte	.LASF517
+	.4byte	.LASF516
 	.byte	0x1b
-	.byte	0xa9
+	.byte	0xa7
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_totle_slc_erase_count
 	.uleb128 0x28
-	.4byte	.LASF518
+	.4byte	.LASF517
 	.byte	0x1b
-	.byte	0xaa
+	.byte	0xa8
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_totle_sys_slc_erase_count
 	.uleb128 0x28
-	.4byte	.LASF519
+	.4byte	.LASF518
 	.byte	0x1b
-	.byte	0xab
+	.byte	0xa9
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_max_erase_count
 	.uleb128 0x28
-	.4byte	.LASF520
+	.4byte	.LASF519
 	.byte	0x1b
-	.byte	0xac
+	.byte	0xaa
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_in_gc_progress
 	.uleb128 0x28
-	.4byte	.LASF521
+	.4byte	.LASF520
 	.byte	0x1b
-	.byte	0xad
+	.byte	0xab
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_in_swl_replace
 	.uleb128 0x28
-	.4byte	.LASF522
+	.4byte	.LASF521
 	.byte	0x1b
-	.byte	0xae
+	.byte	0xac
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_ftl_nand_free_count
 	.uleb128 0x28
-	.4byte	.LASF523
+	.4byte	.LASF522
 	.byte	0x1b
-	.byte	0xaf
+	.byte	0xad
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_gc_head_data_block
 	.uleb128 0x28
-	.4byte	.LASF524
+	.4byte	.LASF523
 	.byte	0x1b
-	.byte	0xb0
+	.byte	0xae
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_gc_head_data_block_count
 	.uleb128 0x28
-	.4byte	.LASF525
+	.4byte	.LASF524
 	.byte	0x1b
-	.byte	0xb1
+	.byte	0xaf
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_gc_skip_write_count
 	.uleb128 0x28
-	.4byte	.LASF526
+	.4byte	.LASF525
 	.byte	0x1b
-	.byte	0xb2
+	.byte	0xb0
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_cur_erase_blk
 	.uleb128 0x28
-	.4byte	.LASF527
+	.4byte	.LASF526
 	.byte	0x1b
-	.byte	0xb4
+	.byte	0xb2
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_recovery_page_num
 	.uleb128 0x28
-	.4byte	.LASF528
+	.4byte	.LASF527
 	.byte	0x1b
-	.byte	0xb5
+	.byte	0xb3
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_recovery_page_min_ver
 	.uleb128 0xa
 	.4byte	0xdd4
-	.4byte	0x2278
+	.4byte	0x2263
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x1f
 	.byte	0
 	.uleb128 0x28
-	.4byte	.LASF529
+	.4byte	.LASF528
 	.byte	0x1b
-	.byte	0xb6
-	.4byte	0x2268
+	.byte	0xb4
+	.4byte	0x2253
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_recovery_ppa_tbl
 	.uleb128 0x28
-	.4byte	.LASF530
+	.4byte	.LASF529
 	.byte	0x1b
-	.byte	0xb7
+	.byte	0xb5
 	.4byte	0xdc9
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	c_mlc_erase_count_value
 	.uleb128 0x28
-	.4byte	.LASF531
+	.4byte	.LASF530
 	.byte	0x1b
-	.byte	0xb8
+	.byte	0xb6
 	.4byte	0xdc9
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_power_lost_recovery_flag
 	.uleb128 0x4
-	.4byte	.LASF532
+	.4byte	.LASF531
 	.byte	0x18
 	.byte	0x14
 	.4byte	0xe44
 	.uleb128 0x4
-	.4byte	.LASF533
+	.4byte	.LASF532
 	.byte	0x18
 	.byte	0x15
 	.4byte	0xe44
 	.uleb128 0x4
-	.4byte	.LASF534
+	.4byte	.LASF533
 	.byte	0x18
 	.byte	0x16
 	.4byte	0xee6
 	.uleb128 0xa
 	.4byte	0xb9
-	.4byte	0x22e9
+	.4byte	0x22d4
 	.uleb128 0x15
 	.4byte	0xda
 	.2byte	0x3ff
 	.byte	0
 	.uleb128 0x4
-	.4byte	.LASF535
+	.4byte	.LASF534
 	.byte	0x18
 	.byte	0x17
-	.4byte	0x22d8
+	.4byte	0x22c3
 	.uleb128 0x28
-	.4byte	.LASF536
+	.4byte	.LASF535
 	.byte	0x3
 	.byte	0x6
 	.4byte	0xdd4
@@ -27131,7 +27096,7 @@ __func__.7632:
 	.byte	0x3
 	.8byte	DeviceCapacity
 	.uleb128 0x28
-	.4byte	.LASF537
+	.4byte	.LASF536
 	.byte	0x3
 	.byte	0x7
 	.4byte	0xdd4
@@ -27139,74 +27104,74 @@ __func__.7632:
 	.byte	0x3
 	.8byte	gFtlInitStatus
 	.uleb128 0x4
-	.4byte	.LASF538
+	.4byte	.LASF537
 	.byte	0x3
 	.byte	0x6d
 	.4byte	0xdd4
 	.uleb128 0x4
-	.4byte	.LASF539
+	.4byte	.LASF538
 	.byte	0x3
 	.byte	0x6e
 	.4byte	0xdd4
 	.uleb128 0x4
-	.4byte	.LASF540
+	.4byte	.LASF539
 	.byte	0x3
 	.byte	0x6f
 	.4byte	0xdd4
 	.uleb128 0x4
-	.4byte	.LASF541
+	.4byte	.LASF540
 	.byte	0x3
 	.byte	0x70
 	.4byte	0xdd4
 	.uleb128 0x29
-	.4byte	.LASF542
+	.4byte	.LASF541
 	.byte	0x3
-	.2byte	0x3c0
+	.2byte	0x3bc
 	.4byte	0x5b
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	power_up_flag
 	.uleb128 0x2a
-	.4byte	.LASF546
+	.4byte	.LASF545
 	.byte	0x3
-	.2byte	0x483
+	.2byte	0x45f
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	gc_discard_updated
 	.uleb128 0x29
-	.4byte	.LASF543
+	.4byte	.LASF542
 	.byte	0x2
-	.2byte	0x35b
+	.2byte	0x38c
 	.4byte	0xdc9
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_ect_tbl_power_up_flush
 	.uleb128 0x29
-	.4byte	.LASF544
+	.4byte	.LASF543
 	.byte	0x2
-	.2byte	0x370
+	.2byte	0x3a1
 	.4byte	0xdc9
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	FtlUpdateVaildLpnCount
 	.uleb128 0xa
 	.4byte	0xdc9
-	.4byte	0x23b3
+	.4byte	0x239e
 	.uleb128 0x15
 	.4byte	0xda
 	.2byte	0x1fff
 	.byte	0
 	.uleb128 0x29
-	.4byte	.LASF545
+	.4byte	.LASF544
 	.byte	0x2
-	.2byte	0x8ad
-	.4byte	0x23a2
+	.2byte	0x8df
+	.4byte	0x238d
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	check_vpc_table
 	.uleb128 0x2b
-	.4byte	.LASF547
+	.4byte	.LASF546
 	.byte	0x5
 	.byte	0x6d
 	.4byte	0xdc9
@@ -27214,7 +27179,7 @@ __func__.7632:
 	.byte	0x3
 	.8byte	ftl_gc_temp_block_bops_scan_page_addr
 	.uleb128 0x29
-	.4byte	.LASF548
+	.4byte	.LASF547
 	.byte	0x5
 	.2byte	0x1d4
 	.4byte	0xdc9
@@ -27222,26 +27187,26 @@ __func__.7632:
 	.byte	0x3
 	.8byte	gc_ink_free_return_value
 	.uleb128 0xc
-	.4byte	.LASF549
+	.4byte	.LASF548
 	.byte	0x1c
 	.2byte	0x3ba
 	.4byte	0x10b
 	.uleb128 0xc
-	.4byte	.LASF550
+	.4byte	.LASF549
 	.byte	0x1c
 	.2byte	0x3bb
 	.4byte	0x10b
 	.uleb128 0xc
-	.4byte	.LASF551
+	.4byte	.LASF550
 	.byte	0x1c
 	.2byte	0x3bc
 	.4byte	0x10b
 	.uleb128 0xf
-	.4byte	.LASF552
+	.4byte	.LASF551
 	.byte	0x4
 	.byte	0x6
 	.byte	0xc
-	.4byte	0x2431
+	.4byte	0x241c
 	.uleb128 0x16
 	.string	"pid"
 	.byte	0x6
@@ -27250,37 +27215,37 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x4
-	.4byte	.LASF553
+	.4byte	.LASF552
 	.byte	0x6
 	.byte	0x10
-	.4byte	0x243c
+	.4byte	0x2427
 	.uleb128 0x8
 	.byte	0x8
-	.4byte	0x2418
+	.4byte	0x2403
 	.uleb128 0x2c
-	.4byte	0x22c2
+	.4byte	0x22ad
 	.byte	0x1
 	.byte	0x10
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_nand_phy_info
 	.uleb128 0x2c
-	.4byte	0x22cd
+	.4byte	0x22b8
 	.byte	0x1
 	.byte	0x11
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_nand_ops
 	.uleb128 0x2b
-	.4byte	.LASF554
+	.4byte	.LASF553
 	.byte	0x1
 	.byte	0x13
-	.4byte	0x22d8
+	.4byte	0x22c3
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	check_buf
 	.uleb128 0x2c
-	.4byte	0x22e9
+	.4byte	0x22d4
 	.byte	0x1
 	.byte	0x14
 	.uleb128 0x9
@@ -27288,21 +27253,21 @@ __func__.7632:
 	.8byte	ftl_temp_buf
 	.uleb128 0xa
 	.4byte	0xb9
-	.4byte	0x249a
+	.4byte	0x2485
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x7f
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF555
+	.4byte	.LASF554
 	.byte	0x1
 	.byte	0x15
-	.4byte	0x248a
+	.4byte	0x2475
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	check_spare_buf
 	.uleb128 0x2d
-	.4byte	.LASF558
+	.4byte	.LASF557
 	.byte	0x1
 	.byte	0xfb
 	.4byte	0x5b
@@ -27310,28 +27275,28 @@ __func__.7632:
 	.8byte	.LFE348-.LFB348
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2527
+	.4byte	0x2512
 	.uleb128 0x2e
-	.4byte	.LASF556
+	.4byte	.LASF555
 	.byte	0x1
 	.byte	0xfb
 	.4byte	0x12c
-	.4byte	.LLST470
+	.4byte	.LLST469
 	.uleb128 0x2e
-	.4byte	.LASF557
+	.4byte	.LASF556
 	.byte	0x1
 	.byte	0xfb
 	.4byte	0x12c
-	.4byte	.LLST471
+	.4byte	.LLST470
 	.uleb128 0x2e
 	.4byte	.LASF325
 	.byte	0x1
 	.byte	0xfb
 	.4byte	0x30
-	.4byte	.LLST472
+	.4byte	.LLST471
 	.uleb128 0x2f
-	.8byte	.LVL2175
-	.4byte	0xa92a
+	.8byte	.LVL2156
+	.4byte	0xa92c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -27359,7 +27324,7 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF559
+	.4byte	.LASF558
 	.byte	0x1
 	.byte	0xf6
 	.4byte	0x12c
@@ -27367,28 +27332,28 @@ __func__.7632:
 	.8byte	.LFE347-.LFB347
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x259f
+	.4byte	0x258a
 	.uleb128 0x2e
-	.4byte	.LASF560
+	.4byte	.LASF559
 	.byte	0x1
 	.byte	0xf6
 	.4byte	0x12c
-	.4byte	.LLST305
+	.4byte	.LLST304
 	.uleb128 0x2e
-	.4byte	.LASF561
+	.4byte	.LASF560
 	.byte	0x1
 	.byte	0xf6
 	.4byte	0x16f
-	.4byte	.LLST306
+	.4byte	.LLST305
 	.uleb128 0x2e
 	.4byte	.LASF30
 	.byte	0x1
 	.byte	0xf6
 	.4byte	0x30
-	.4byte	.LLST307
+	.4byte	.LLST306
 	.uleb128 0x2f
-	.8byte	.LVL1243
-	.4byte	0xa935
+	.8byte	.LVL1245
+	.4byte	0xa937
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -27416,7 +27381,7 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF562
+	.4byte	.LASF561
 	.byte	0x1
 	.byte	0xf1
 	.4byte	0x12c
@@ -27424,28 +27389,28 @@ __func__.7632:
 	.8byte	.LFE346-.LFB346
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2611
+	.4byte	0x25fc
 	.uleb128 0x31
 	.string	"s"
 	.byte	0x1
 	.byte	0xf1
 	.4byte	0x12c
-	.4byte	.LLST198
+	.4byte	.LLST197
 	.uleb128 0x31
 	.string	"c"
 	.byte	0x1
 	.byte	0xf1
 	.4byte	0x5b
-	.4byte	.LLST199
+	.4byte	.LLST198
 	.uleb128 0x31
 	.string	"n"
 	.byte	0x1
 	.byte	0xf1
 	.4byte	0x30
-	.4byte	.LLST200
+	.4byte	.LLST199
 	.uleb128 0x2f
-	.8byte	.LVL740
-	.4byte	0xa941
+	.8byte	.LVL742
+	.4byte	0xa943
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -27473,7 +27438,7 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF563
+	.4byte	.LASF562
 	.byte	0x1
 	.byte	0xdf
 	.4byte	0xae
@@ -27481,35 +27446,35 @@ __func__.7632:
 	.8byte	.LFE345-.LFB345
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x26cd
+	.4byte	0x26b8
 	.uleb128 0x2e
-	.4byte	.LASF564
+	.4byte	.LASF563
 	.byte	0x1
 	.byte	0xdf
 	.4byte	0xf37
-	.4byte	.LLST301
+	.4byte	.LLST300
 	.uleb128 0x31
 	.string	"die"
 	.byte	0x1
 	.byte	0xdf
 	.4byte	0xb9
-	.4byte	.LLST302
+	.4byte	.LLST301
 	.uleb128 0x32
 	.4byte	.LASF325
 	.byte	0x1
 	.byte	0xe1
 	.4byte	0xa3
-	.4byte	.LLST303
+	.4byte	.LLST302
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x1
 	.byte	0xe1
 	.4byte	0xa3
-	.4byte	.LLST304
+	.4byte	.LLST303
 	.uleb128 0x34
-	.8byte	.LVL1230
-	.4byte	0x259f
-	.4byte	0x2691
+	.8byte	.LVL1232
+	.4byte	0x258a
+	.4byte	0x267c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -27530,8 +27495,8 @@ __func__.7632:
 	.2byte	0x100
 	.byte	0
 	.uleb128 0x35
-	.8byte	.LVL1231
-	.4byte	0x26ab
+	.8byte	.LVL1233
+	.4byte	0x2696
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -27546,8 +27511,8 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1234
-	.4byte	0x259f
+	.8byte	.LVL1236
+	.4byte	0x258a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -27569,14 +27534,14 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x37
-	.4byte	.LASF589
+	.4byte	.LASF588
 	.byte	0x1
 	.byte	0xc4
 	.4byte	0xddf
 	.byte	0x1
-	.4byte	0x2711
+	.4byte	0x26fc
 	.uleb128 0x38
-	.4byte	.LASF577
+	.4byte	.LASF576
 	.byte	0x1
 	.byte	0xc4
 	.4byte	0xdc9
@@ -27586,10 +27551,10 @@ __func__.7632:
 	.byte	0xc6
 	.4byte	0xddf
 	.uleb128 0x3a
-	.4byte	.LASF565
+	.4byte	.LASF564
 	.byte	0x1
 	.byte	0xc7
-	.4byte	0x2711
+	.4byte	0x26fc
 	.uleb128 0x39
 	.string	"req"
 	.byte	0x1
@@ -27602,13 +27567,13 @@ __func__.7632:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xdd4
-	.4byte	0x2721
+	.4byte	0x270c
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0xf
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LASF566
+	.4byte	.LASF565
 	.byte	0x1
 	.byte	0xae
 	.4byte	0xae
@@ -27616,31 +27581,31 @@ __func__.7632:
 	.8byte	.LFE343-.LFB343
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x27e7
+	.4byte	0x27d2
 	.uleb128 0x2e
-	.4byte	.LASF567
+	.4byte	.LASF566
 	.byte	0x1
 	.byte	0xae
 	.4byte	0x12c
-	.4byte	.LLST177
+	.4byte	.LLST168
 	.uleb128 0x2e
-	.4byte	.LASF568
+	.4byte	.LASF567
 	.byte	0x1
 	.byte	0xae
 	.4byte	0xb9
-	.4byte	.LLST178
+	.4byte	.LLST169
 	.uleb128 0x2e
-	.4byte	.LASF569
+	.4byte	.LASF568
 	.byte	0x1
 	.byte	0xae
 	.4byte	0xb9
-	.4byte	.LLST179
+	.4byte	.LLST170
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x1
 	.byte	0xb0
 	.4byte	0xb9
-	.4byte	.LLST180
+	.4byte	.LLST171
 	.uleb128 0x3d
 	.string	"cs"
 	.byte	0x1
@@ -27654,9 +27619,9 @@ __func__.7632:
 	.byte	0x1
 	.byte	0xb0
 	.4byte	0xb9
-	.4byte	.LLST181
+	.4byte	.LLST172
 	.uleb128 0x2b
-	.4byte	.LASF570
+	.4byte	.LASF569
 	.byte	0x1
 	.byte	0xb0
 	.4byte	0xb9
@@ -27668,16 +27633,16 @@ __func__.7632:
 	.byte	0x1
 	.byte	0xb1
 	.4byte	0x1abc
-	.4byte	.LLST182
+	.4byte	.LLST173
 	.uleb128 0x32
-	.4byte	.LASF571
+	.4byte	.LASF570
 	.byte	0x1
 	.byte	0xb2
 	.4byte	0xb9
-	.4byte	.LLST183
+	.4byte	.LLST174
 	.uleb128 0x36
-	.8byte	.LVL671
-	.4byte	0x973d
+	.8byte	.LVL648
+	.4byte	0x963e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -27691,14 +27656,14 @@ __func__.7632:
 	.byte	0x72
 	.sleb128 0
 	.uleb128 0x3e
-	.4byte	0x2aad
+	.4byte	0x2a98
 	.uleb128 0x2
 	.byte	0x83
 	.sleb128 -4
 	.byte	0
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LASF572
+	.4byte	.LASF571
 	.byte	0x1
 	.byte	0x72
 	.4byte	0xae
@@ -27706,37 +27671,37 @@ __func__.7632:
 	.8byte	.LFE342-.LFB342
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x298f
+	.4byte	0x297a
 	.uleb128 0x2e
-	.4byte	.LASF567
+	.4byte	.LASF566
 	.byte	0x1
 	.byte	0x72
 	.4byte	0x12c
-	.4byte	.LLST169
+	.4byte	.LLST160
 	.uleb128 0x2e
-	.4byte	.LASF569
+	.4byte	.LASF568
 	.byte	0x1
 	.byte	0x72
 	.4byte	0xb9
-	.4byte	.LLST170
+	.4byte	.LLST161
 	.uleb128 0x2e
-	.4byte	.LASF568
+	.4byte	.LASF567
 	.byte	0x1
 	.byte	0x72
 	.4byte	0xb9
-	.4byte	.LLST171
+	.4byte	.LLST162
 	.uleb128 0x2e
-	.4byte	.LASF573
+	.4byte	.LASF572
 	.byte	0x1
 	.byte	0x72
 	.4byte	0xb9
-	.4byte	.LLST172
+	.4byte	.LLST163
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x1
 	.byte	0x74
 	.4byte	0xb9
-	.4byte	.LLST173
+	.4byte	.LLST164
 	.uleb128 0x3d
 	.string	"cs"
 	.byte	0x1
@@ -27750,9 +27715,9 @@ __func__.7632:
 	.byte	0x1
 	.byte	0x74
 	.4byte	0xb9
-	.4byte	.LLST174
+	.4byte	.LLST165
 	.uleb128 0x2b
-	.4byte	.LASF570
+	.4byte	.LASF569
 	.byte	0x1
 	.byte	0x74
 	.4byte	0xb9
@@ -27760,28 +27725,28 @@ __func__.7632:
 	.byte	0x91
 	.sleb128 -36
 	.uleb128 0x32
-	.4byte	.LASF571
+	.4byte	.LASF570
 	.byte	0x1
 	.byte	0x75
 	.4byte	0xb9
-	.4byte	.LLST175
+	.4byte	.LLST166
 	.uleb128 0x33
 	.string	"req"
 	.byte	0x1
 	.byte	0x76
 	.4byte	0x1abc
-	.4byte	.LLST176
+	.4byte	.LLST167
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x299f
+	.4byte	.LASF573
+	.4byte	0x298a
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	__func__.7632
 	.uleb128 0x40
 	.4byte	.Ldebug_ranges0+0xd0
-	.4byte	0x2941
+	.4byte	0x292c
 	.uleb128 0x2b
-	.4byte	.LASF575
+	.4byte	.LASF574
 	.byte	0x1
 	.byte	0x91
 	.4byte	0xdf5
@@ -27789,9 +27754,9 @@ __func__.7632:
 	.byte	0x91
 	.sleb128 -32
 	.uleb128 0x34
-	.8byte	.LVL659
-	.4byte	0x29a4
-	.4byte	0x28e7
+	.8byte	.LVL636
+	.4byte	0x298f
+	.4byte	0x28d2
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -27811,9 +27776,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL660
-	.4byte	0xa94d
-	.4byte	0x2906
+	.8byte	.LVL637
+	.4byte	0xa94f
+	.4byte	0x28f1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -27822,9 +27787,9 @@ __func__.7632:
 	.8byte	.LC79
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL661
-	.4byte	0xa94d
-	.4byte	0x2925
+	.8byte	.LVL638
+	.4byte	0xa94f
+	.4byte	0x2910
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -27833,8 +27798,8 @@ __func__.7632:
 	.8byte	.LC80
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL662
-	.4byte	0xa94d
+	.8byte	.LVL639
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -27844,9 +27809,9 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL650
-	.4byte	0xa94d
-	.4byte	0x296c
+	.8byte	.LVL627
+	.4byte	0xa94f
+	.4byte	0x2957
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -27867,8 +27832,8 @@ __func__.7632:
 	.byte	0x7a
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL651
-	.4byte	0x973d
+	.8byte	.LVL628
+	.4byte	0x963e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -27882,7 +27847,7 @@ __func__.7632:
 	.byte	0x72
 	.sleb128 0
 	.uleb128 0x3e
-	.4byte	0x2aad
+	.4byte	0x2a98
 	.uleb128 0x2
 	.byte	0x83
 	.sleb128 0
@@ -27890,15 +27855,15 @@ __func__.7632:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x299f
+	.4byte	0x298a
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0xe
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x298f
+	.4byte	0x297a
 	.uleb128 0x3c
-	.4byte	.LASF576
+	.4byte	.LASF575
 	.byte	0x1
 	.byte	0x54
 	.4byte	0xae
@@ -27906,31 +27871,31 @@ __func__.7632:
 	.8byte	.LFE341-.LFB341
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2a9d
+	.4byte	0x2a88
 	.uleb128 0x2e
-	.4byte	.LASF567
+	.4byte	.LASF566
 	.byte	0x1
 	.byte	0x54
 	.4byte	0x12c
-	.4byte	.LLST154
+	.4byte	.LLST145
 	.uleb128 0x2e
-	.4byte	.LASF569
+	.4byte	.LASF568
 	.byte	0x1
 	.byte	0x54
 	.4byte	0xb9
-	.4byte	.LLST155
+	.4byte	.LLST146
 	.uleb128 0x2e
-	.4byte	.LASF568
+	.4byte	.LASF567
 	.byte	0x1
 	.byte	0x54
 	.4byte	0xb9
-	.4byte	.LLST156
+	.4byte	.LLST147
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x1
 	.byte	0x56
 	.4byte	0xb9
-	.4byte	.LLST157
+	.4byte	.LLST148
 	.uleb128 0x3d
 	.string	"cs"
 	.byte	0x1
@@ -27944,9 +27909,9 @@ __func__.7632:
 	.byte	0x1
 	.byte	0x56
 	.4byte	0xb9
-	.4byte	.LLST158
+	.4byte	.LLST149
 	.uleb128 0x2b
-	.4byte	.LASF570
+	.4byte	.LASF569
 	.byte	0x1
 	.byte	0x56
 	.4byte	0xb9
@@ -27954,26 +27919,26 @@ __func__.7632:
 	.byte	0x91
 	.sleb128 -4
 	.uleb128 0x32
-	.4byte	.LASF571
+	.4byte	.LASF570
 	.byte	0x1
 	.byte	0x57
 	.4byte	0xb9
-	.4byte	.LLST159
+	.4byte	.LLST150
 	.uleb128 0x39
 	.string	"req"
 	.byte	0x1
 	.byte	0x58
 	.4byte	0x1abc
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x299f
+	.4byte	.LASF573
+	.4byte	0x298a
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	__func__.7615
 	.uleb128 0x34
-	.8byte	.LVL604
-	.4byte	0xa94d
-	.4byte	0x2a7a
+	.8byte	.LVL581
+	.4byte	0xa94f
+	.4byte	0x2a65
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -27994,8 +27959,8 @@ __func__.7632:
 	.byte	0x5c
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL605
-	.4byte	0x973d
+	.8byte	.LVL582
+	.4byte	0x963e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -28009,41 +27974,41 @@ __func__.7632:
 	.byte	0x72
 	.sleb128 0
 	.uleb128 0x3e
-	.4byte	0x2aad
+	.4byte	0x2a98
 	.uleb128 0x2
 	.byte	0x83
 	.sleb128 0
 	.byte	0
 	.byte	0
 	.uleb128 0x41
-	.4byte	.LASF885
+	.4byte	.LASF883
 	.byte	0x1
 	.byte	0x3a
 	.4byte	0xb9
 	.byte	0x1
-	.4byte	0x2b1c
+	.4byte	0x2b07
 	.uleb128 0x42
 	.string	"req"
 	.byte	0x1
 	.byte	0x3a
 	.4byte	0x1abc
 	.uleb128 0x38
-	.4byte	.LASF570
+	.4byte	.LASF569
 	.byte	0x1
 	.byte	0x3a
 	.4byte	0xe3e
 	.uleb128 0x38
-	.4byte	.LASF578
+	.4byte	.LASF577
 	.byte	0x1
 	.byte	0x3a
 	.4byte	0xe3e
 	.uleb128 0x3a
-	.4byte	.LASF579
+	.4byte	.LASF578
 	.byte	0x1
 	.byte	0x3c
 	.4byte	0xa3
 	.uleb128 0x3a
-	.4byte	.LASF580
+	.4byte	.LASF579
 	.byte	0x1
 	.byte	0x3c
 	.4byte	0xa3
@@ -28058,7 +28023,7 @@ __func__.7632:
 	.byte	0x3d
 	.4byte	0xa3
 	.uleb128 0x3a
-	.4byte	.LASF581
+	.4byte	.LASF580
 	.byte	0x1
 	.byte	0x3e
 	.4byte	0xb9
@@ -28068,78 +28033,78 @@ __func__.7632:
 	.byte	0x3f
 	.4byte	0xb9
 	.uleb128 0x3a
-	.4byte	.LASF582
+	.4byte	.LASF581
 	.byte	0x1
 	.byte	0x40
 	.4byte	0xb9
 	.byte	0
 	.uleb128 0x43
-	.4byte	.LASF585
+	.4byte	.LASF584
 	.byte	0x1
 	.byte	0x20
 	.8byte	.LFB339
 	.8byte	.LFE339-.LFB339
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2c25
+	.4byte	0x2c10
 	.uleb128 0x31
 	.string	"s"
 	.byte	0x1
 	.byte	0x20
 	.4byte	0xfa
-	.4byte	.LLST145
+	.4byte	.LLST136
 	.uleb128 0x31
 	.string	"buf"
 	.byte	0x1
 	.byte	0x20
 	.4byte	0x12c
-	.4byte	.LLST146
+	.4byte	.LLST137
 	.uleb128 0x2e
-	.4byte	.LASF583
+	.4byte	.LASF582
 	.byte	0x1
 	.byte	0x20
 	.4byte	0x5b
-	.4byte	.LLST147
+	.4byte	.LLST138
 	.uleb128 0x31
 	.string	"len"
 	.byte	0x1
 	.byte	0x20
 	.4byte	0x5b
-	.4byte	.LLST148
+	.4byte	.LLST139
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x1
 	.byte	0x22
 	.4byte	0xb9
-	.4byte	.LLST149
+	.4byte	.LLST140
 	.uleb128 0x33
 	.string	"j"
 	.byte	0x1
 	.byte	0x22
 	.4byte	0xb9
-	.4byte	.LLST150
+	.4byte	.LLST141
 	.uleb128 0x33
 	.string	"p8"
 	.byte	0x1
 	.byte	0x23
 	.4byte	0xfa
-	.4byte	.LLST151
+	.4byte	.LLST142
 	.uleb128 0x33
 	.string	"p16"
 	.byte	0x1
 	.byte	0x24
-	.4byte	0x2c25
-	.4byte	.LLST152
+	.4byte	0x2c10
+	.4byte	.LLST143
 	.uleb128 0x33
 	.string	"p32"
 	.byte	0x1
 	.byte	0x25
 	.4byte	0xe3e
-	.4byte	.LLST153
+	.4byte	.LLST144
 	.uleb128 0x44
-	.8byte	.LVL589
-	.4byte	0xa94d
-	.4byte	0x2bd8
+	.8byte	.LVL566
+	.4byte	0xa94f
+	.4byte	0x2bc3
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28148,9 +28113,9 @@ __func__.7632:
 	.8byte	.LC78
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL590
-	.4byte	0xa94d
-	.4byte	0x2bfc
+	.8byte	.LVL567
+	.4byte	0xa94f
+	.4byte	0x2be7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28171,11 +28136,11 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL591
-	.4byte	0xa94d
+	.8byte	.LVL568
+	.4byte	0xa94f
 	.uleb128 0x36
-	.8byte	.LVL594
-	.4byte	0xa94d
+	.8byte	.LVL571
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28188,7 +28153,7 @@ __func__.7632:
 	.byte	0x8
 	.4byte	0x74
 	.uleb128 0x2d
-	.4byte	.LASF584
+	.4byte	.LASF583
 	.byte	0x1
 	.byte	0x1b
 	.4byte	0x12c
@@ -28196,16 +28161,16 @@ __func__.7632:
 	.8byte	.LFE338-.LFB338
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2c7c
+	.4byte	0x2c67
 	.uleb128 0x2e
 	.4byte	.LASF30
 	.byte	0x1
 	.byte	0x1b
 	.4byte	0x5b
-	.4byte	.LLST144
+	.4byte	.LLST135
 	.uleb128 0x2f
-	.8byte	.LVL581
-	.4byte	0xa958
+	.8byte	.LVL558
+	.4byte	0xa95a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28227,32 +28192,32 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x43
-	.4byte	.LASF586
+	.4byte	.LASF585
 	.byte	0x1
 	.byte	0x17
 	.8byte	.LFB337
 	.8byte	.LFE337-.LFB337
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2cdf
+	.4byte	0x2cca
 	.uleb128 0x31
 	.string	"buf"
 	.byte	0x1
 	.byte	0x17
 	.4byte	0x12c
-	.4byte	.LLST142
+	.4byte	.LLST133
 	.uleb128 0x46
-	.4byte	0x2cdf
-	.8byte	.LBB217
-	.8byte	.LBE217-.LBB217
+	.4byte	0x2cca
+	.8byte	.LBB229
+	.8byte	.LBE229-.LBB229
 	.byte	0x1
 	.byte	0x19
 	.uleb128 0x47
-	.4byte	0x2ceb
-	.4byte	.LLST143
+	.4byte	0x2cd6
+	.4byte	.LLST134
 	.uleb128 0x2f
-	.8byte	.LVL579
-	.4byte	0xa963
+	.8byte	.LVL556
+	.4byte	0xa965
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28264,30 +28229,30 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF886
+	.4byte	.LASF884
 	.byte	0x6
 	.byte	0x4e
 	.byte	0x3
-	.4byte	0x2cf7
+	.4byte	0x2ce2
 	.uleb128 0x38
-	.4byte	.LASF587
+	.4byte	.LASF586
 	.byte	0x6
 	.byte	0x4e
 	.4byte	0x16f
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF588
+	.4byte	.LASF587
 	.byte	0x5
-	.2byte	0x2f8
+	.2byte	0x2f4
 	.4byte	0xb9
 	.8byte	.LFB320
 	.8byte	.LFE320-.LFB320
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2d32
+	.4byte	0x2d1d
 	.uleb128 0x2f
-	.8byte	.LVL1930
-	.4byte	0x2d32
+	.8byte	.LVL1926
+	.4byte	0x2d1d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28301,24 +28266,24 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x4a
-	.4byte	.LASF590
+	.4byte	.LASF589
 	.byte	0x5
 	.2byte	0x1d5
 	.4byte	0x5b
 	.byte	0x1
-	.4byte	0x2dff
+	.4byte	0x2dea
 	.uleb128 0x4b
-	.4byte	.LASF591
+	.4byte	.LASF590
 	.byte	0x5
 	.2byte	0x1d5
 	.4byte	0xdd4
 	.uleb128 0x4b
-	.4byte	.LASF592
+	.4byte	.LASF591
 	.byte	0x5
 	.2byte	0x1d5
 	.4byte	0xdd4
 	.uleb128 0x4c
-	.4byte	.LASF593
+	.4byte	.LASF592
 	.byte	0x5
 	.2byte	0x1d7
 	.4byte	0xdc9
@@ -28333,7 +28298,7 @@ __func__.7632:
 	.2byte	0x1d8
 	.4byte	0xdd4
 	.uleb128 0x4c
-	.4byte	.LASF594
+	.4byte	.LASF593
 	.byte	0x5
 	.2byte	0x1d9
 	.4byte	0xdc9
@@ -28343,45 +28308,45 @@ __func__.7632:
 	.2byte	0x1da
 	.4byte	0xdc9
 	.uleb128 0x4c
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x5
 	.2byte	0x1da
 	.4byte	0xdc9
 	.uleb128 0x4c
-	.4byte	.LASF596
+	.4byte	.LASF595
 	.byte	0x5
 	.2byte	0x1da
 	.4byte	0xdc9
 	.uleb128 0x4c
-	.4byte	.LASF597
+	.4byte	.LASF596
 	.byte	0x5
 	.2byte	0x1da
 	.4byte	0xdc9
 	.uleb128 0x4c
-	.4byte	.LASF598
+	.4byte	.LASF597
 	.byte	0x5
 	.2byte	0x1db
 	.4byte	0xdc9
 	.uleb128 0x4c
-	.4byte	.LASF599
+	.4byte	.LASF598
 	.byte	0x5
 	.2byte	0x1dc
-	.4byte	0x2dff
+	.4byte	0x2dea
 	.uleb128 0x4e
-	.4byte	.LASF600
+	.4byte	.LASF599
 	.byte	0x5
-	.2byte	0x276
+	.2byte	0x272
 	.uleb128 0x4e
-	.4byte	.LASF601
+	.4byte	.LASF600
 	.byte	0x5
-	.2byte	0x279
+	.2byte	0x275
 	.uleb128 0x4f
-	.4byte	.LASF574
-	.4byte	0x2e15
-	.4byte	.LASF590
+	.4byte	.LASF573
+	.4byte	0x2e00
+	.4byte	.LASF589
 	.uleb128 0x50
 	.uleb128 0x4c
-	.4byte	.LASF602
+	.4byte	.LASF601
 	.byte	0x5
 	.2byte	0x1f3
 	.4byte	0xdc9
@@ -28392,20 +28357,20 @@ __func__.7632:
 	.4byte	0x1238
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x2e15
+	.4byte	0x2e00
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x16
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x2e05
+	.4byte	0x2df0
 	.uleb128 0x4a
-	.4byte	.LASF603
+	.4byte	.LASF602
 	.byte	0x5
 	.2byte	0x1a2
 	.4byte	0x5b
 	.byte	0x1
-	.4byte	0x2e7a
+	.4byte	0x2e65
 	.uleb128 0x4d
 	.string	"ret"
 	.byte	0x5
@@ -28422,40 +28387,40 @@ __func__.7632:
 	.2byte	0x1a6
 	.4byte	0xdd4
 	.uleb128 0x4c
-	.4byte	.LASF565
+	.4byte	.LASF564
 	.byte	0x5
 	.2byte	0x1a7
-	.4byte	0x2711
+	.4byte	0x26fc
 	.uleb128 0x51
-	.4byte	0x2e6b
+	.4byte	0x2e56
 	.uleb128 0x4c
-	.4byte	.LASF604
+	.4byte	.LASF603
 	.byte	0x5
 	.2byte	0x1b1
 	.4byte	0xdf5
 	.byte	0
 	.uleb128 0x50
 	.uleb128 0x4c
-	.4byte	.LASF605
+	.4byte	.LASF604
 	.byte	0x5
 	.2byte	0x1c6
 	.4byte	0xdd4
 	.byte	0
 	.byte	0
 	.uleb128 0x4a
-	.4byte	.LASF606
+	.4byte	.LASF605
 	.byte	0x5
 	.2byte	0x185
 	.4byte	0x5b
 	.byte	0x1
-	.4byte	0x2ec4
+	.4byte	0x2eaf
 	.uleb128 0x4b
-	.4byte	.LASF607
+	.4byte	.LASF606
 	.byte	0x5
 	.2byte	0x185
 	.4byte	0xdc9
 	.uleb128 0x4c
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x5
 	.2byte	0x187
 	.4byte	0xdc9
@@ -28476,13 +28441,13 @@ __func__.7632:
 	.4byte	0xdc9
 	.byte	0
 	.uleb128 0x52
-	.4byte	.LASF715
+	.4byte	.LASF714
 	.byte	0x5
 	.2byte	0x17a
 	.4byte	0x5b
 	.byte	0x1
 	.uleb128 0x49
-	.4byte	.LASF608
+	.4byte	.LASF607
 	.byte	0x5
 	.2byte	0x166
 	.4byte	0x5b
@@ -28490,29 +28455,29 @@ __func__.7632:
 	.8byte	.LFE315-.LFB315
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2f73
+	.4byte	0x2f5e
 	.uleb128 0x53
 	.4byte	.LASF388
 	.byte	0x5
 	.2byte	0x166
 	.4byte	0xdc9
-	.4byte	.LLST139
+	.4byte	.LLST130
 	.uleb128 0x54
 	.string	"i"
 	.byte	0x5
 	.2byte	0x168
 	.4byte	0xdc9
-	.4byte	.LLST140
+	.4byte	.LLST131
 	.uleb128 0x55
-	.4byte	.LASF609
+	.4byte	.LASF608
 	.byte	0x5
 	.2byte	0x169
 	.4byte	0xdc9
-	.4byte	.LLST141
+	.4byte	.LLST132
 	.uleb128 0x34
-	.8byte	.LVL565
-	.4byte	0x6d71
-	.4byte	0x2f39
+	.8byte	.LVL542
+	.4byte	0x6d33
+	.4byte	0x2f24
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28521,9 +28486,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL568
-	.4byte	0xa94d
-	.4byte	0x2f5e
+	.8byte	.LVL545
+	.4byte	0xa94f
+	.4byte	0x2f49
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28538,8 +28503,8 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL569
-	.4byte	0x2f73
+	.8byte	.LVL546
+	.4byte	0x2f5e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28549,7 +28514,7 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF610
+	.4byte	.LASF609
 	.byte	0x5
 	.2byte	0x158
 	.4byte	0x5b
@@ -28557,16 +28522,16 @@ __func__.7632:
 	.8byte	.LFE314-.LFB314
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2fc7
+	.4byte	0x2fb2
 	.uleb128 0x53
-	.4byte	.LASF587
+	.4byte	.LASF586
 	.byte	0x5
 	.2byte	0x158
 	.4byte	0xdc9
-	.4byte	.LLST138
+	.4byte	.LLST129
 	.uleb128 0x36
-	.8byte	.LVL561
-	.4byte	0xa94d
+	.8byte	.LVL538
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28582,7 +28547,7 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF611
+	.4byte	.LASF610
 	.byte	0x5
 	.2byte	0x13b
 	.4byte	0xdd4
@@ -28590,23 +28555,23 @@ __func__.7632:
 	.8byte	.LFE313-.LFB313
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x308d
+	.4byte	0x3078
 	.uleb128 0x54
 	.string	"i"
 	.byte	0x5
 	.2byte	0x13d
 	.4byte	0xdc9
-	.4byte	.LLST411
+	.4byte	.LLST410
 	.uleb128 0x55
-	.4byte	.LASF599
+	.4byte	.LASF598
 	.byte	0x5
 	.2byte	0x13e
-	.4byte	0x2dff
-	.4byte	.LLST412
+	.4byte	0x2dea
+	.4byte	.LLST411
 	.uleb128 0x34
-	.8byte	.LVL1810
-	.4byte	0x27e7
-	.4byte	0x3023
+	.8byte	.LVL1808
+	.4byte	0x27d2
+	.4byte	0x300e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
@@ -28619,9 +28584,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1812
-	.4byte	0x3641
-	.4byte	0x3041
+	.8byte	.LVL1810
+	.4byte	0x3612
+	.4byte	0x302c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28636,9 +28601,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1813
-	.4byte	0x3320
-	.4byte	0x3058
+	.8byte	.LVL1811
+	.4byte	0x32fe
+	.4byte	0x3043
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28646,20 +28611,20 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1815
-	.4byte	0x75ef
+	.8byte	.LVL1813
+	.4byte	0x75b1
 	.uleb128 0x45
-	.8byte	.LVL1816
-	.4byte	0x7342
+	.8byte	.LVL1814
+	.4byte	0x7304
 	.uleb128 0x45
-	.8byte	.LVL1817
-	.4byte	0x32c5
+	.8byte	.LVL1815
+	.4byte	0x32a3
 	.uleb128 0x45
-	.8byte	.LVL1821
-	.4byte	0x3532
+	.8byte	.LVL1819
+	.4byte	0x3503
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF612
+	.4byte	.LASF611
 	.byte	0x5
 	.2byte	0x12b
 	.4byte	0xdd4
@@ -28667,14 +28632,11 @@ __func__.7632:
 	.8byte	.LFE312-.LFB312
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x313f
-	.uleb128 0x45
-	.8byte	.LVL1825
-	.4byte	0x7d59
+	.4byte	0x311d
 	.uleb128 0x34
-	.8byte	.LVL1826
-	.4byte	0x3320
-	.4byte	0x30d3
+	.8byte	.LVL1823
+	.4byte	0x32fe
+	.4byte	0x30b1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28682,9 +28644,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1827
-	.4byte	0x3a52
-	.4byte	0x30f2
+	.8byte	.LVL1824
+	.4byte	0x3a23
+	.4byte	0x30d0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28693,12 +28655,12 @@ __func__.7632:
 	.8byte	.LANCHOR53
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1828
-	.4byte	0x5d63
+	.8byte	.LVL1825
+	.4byte	0x5d49
 	.uleb128 0x34
-	.8byte	.LVL1829
-	.4byte	0x5968
-	.4byte	0x3116
+	.8byte	.LVL1826
+	.4byte	0x594e
+	.4byte	0x30f4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28706,11 +28668,11 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1830
-	.4byte	0x5694
+	.8byte	.LVL1827
+	.4byte	0x567a
 	.uleb128 0x2f
-	.8byte	.LVL1831
-	.4byte	0x3804
+	.8byte	.LVL1828
+	.4byte	0x37d5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28720,12 +28682,12 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x56
-	.4byte	.LASF671
+	.4byte	.LASF670
 	.byte	0x5
 	.2byte	0x120
 	.byte	0x1
 	.uleb128 0x2d
-	.4byte	.LASF613
+	.4byte	.LASF612
 	.byte	0x5
 	.byte	0xd2
 	.4byte	0xdd4
@@ -28733,99 +28695,99 @@ __func__.7632:
 	.8byte	.LFE310-.LFB310
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x32c5
+	.4byte	0x32a3
 	.uleb128 0x2e
-	.4byte	.LASF614
+	.4byte	.LASF613
 	.byte	0x5
 	.byte	0xd2
-	.4byte	0x1f04
-	.4byte	.LLST288
+	.4byte	0x1eef
+	.4byte	.LLST287
 	.uleb128 0x2e
-	.4byte	.LASF615
+	.4byte	.LASF614
 	.byte	0x5
 	.byte	0xd2
 	.4byte	0xdd4
-	.4byte	.LLST289
+	.4byte	.LLST288
 	.uleb128 0x32
-	.4byte	.LASF597
+	.4byte	.LASF596
 	.byte	0x5
 	.byte	0xd4
 	.4byte	0xdc9
-	.4byte	.LLST290
+	.4byte	.LLST289
 	.uleb128 0x32
-	.4byte	.LASF569
+	.4byte	.LASF568
 	.byte	0x5
 	.byte	0xd5
 	.4byte	0xdc9
-	.4byte	.LLST291
+	.4byte	.LLST290
 	.uleb128 0x33
 	.string	"req"
 	.byte	0x5
 	.byte	0xd5
 	.4byte	0xdc9
-	.4byte	.LLST292
+	.4byte	.LLST291
 	.uleb128 0x32
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x5
 	.byte	0xd6
 	.4byte	0xdc9
-	.4byte	.LLST293
+	.4byte	.LLST292
 	.uleb128 0x32
 	.4byte	.LASF382
 	.byte	0x5
 	.byte	0xd6
 	.4byte	0xdc9
-	.4byte	.LLST294
+	.4byte	.LLST293
 	.uleb128 0x32
 	.4byte	.LASF380
 	.byte	0x5
 	.byte	0xd6
 	.4byte	0xdc9
-	.4byte	.LLST295
+	.4byte	.LLST294
 	.uleb128 0x32
-	.4byte	.LASF616
+	.4byte	.LASF615
 	.byte	0x5
 	.byte	0xd7
 	.4byte	0xdd4
-	.4byte	.LLST296
+	.4byte	.LLST295
 	.uleb128 0x32
-	.4byte	.LASF617
+	.4byte	.LASF616
 	.byte	0x5
 	.byte	0xd8
 	.4byte	0xdd4
-	.4byte	.LLST297
+	.4byte	.LLST296
 	.uleb128 0x57
-	.4byte	.LASF618
+	.4byte	.LASF617
 	.byte	0x5
 	.byte	0xd9
 	.4byte	0xdd4
 	.sleb128 -1
 	.uleb128 0x32
-	.4byte	.LASF599
+	.4byte	.LASF598
 	.byte	0x5
 	.byte	0xda
-	.4byte	0x2dff
-	.4byte	.LLST298
+	.4byte	0x2dea
+	.4byte	.LLST297
 	.uleb128 0x58
-	.4byte	.LASF619
+	.4byte	.LASF618
 	.byte	0x5
 	.byte	0xe1
 	.uleb128 0x58
-	.4byte	.LASF620
+	.4byte	.LASF619
 	.byte	0x5
 	.byte	0xe5
 	.uleb128 0x59
-	.4byte	.LASF689
+	.4byte	.LASF688
 	.byte	0x5
 	.2byte	0x117
-	.8byte	.L873
+	.8byte	.L879
 	.uleb128 0x45
-	.8byte	.LVL1176
-	.4byte	0x32c5
+	.8byte	.LVL1178
+	.4byte	0x32a3
 	.uleb128 0x34
-	.8byte	.LVL1184
-	.4byte	0x29a4
-	.4byte	0x3265
+	.8byte	.LVL1186
+	.4byte	0x298f
+	.4byte	0x3243
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -28841,9 +28803,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1197
-	.4byte	0x6db1
-	.4byte	0x327f
+	.8byte	.LVL1199
+	.4byte	0x6d73
+	.4byte	0x325d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28854,9 +28816,9 @@ __func__.7632:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1203
-	.4byte	0x4ee3
-	.4byte	0x329d
+	.8byte	.LVL1205
+	.4byte	0x4ec4
+	.4byte	0x327b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28871,28 +28833,28 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1206
-	.4byte	0x3532
-	.uleb128 0x45
-	.8byte	.LVL1209
-	.4byte	0x695b
+	.8byte	.LVL1208
+	.4byte	0x3503
 	.uleb128 0x45
 	.8byte	.LVL1211
-	.4byte	0x32c5
+	.4byte	0x6951
+	.uleb128 0x45
+	.8byte	.LVL1213
+	.4byte	0x32a3
 	.byte	0
 	.uleb128 0x43
-	.4byte	.LASF621
+	.4byte	.LASF620
 	.byte	0x5
 	.byte	0xc9
 	.8byte	.LFB309
 	.8byte	.LFE309-.LFB309
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3320
+	.4byte	0x32fe
 	.uleb128 0x34
-	.8byte	.LVL1170
-	.4byte	0x259f
-	.4byte	0x32fa
+	.8byte	.LVL1172
+	.4byte	0x258a
+	.4byte	0x32d8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -28901,9 +28863,9 @@ __func__.7632:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1171
-	.4byte	0x259f
-	.4byte	0x3312
+	.8byte	.LVL1173
+	.4byte	0x258a
+	.4byte	0x32f0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -28912,11 +28874,11 @@ __func__.7632:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x5a
-	.8byte	.LVL1172
-	.4byte	0x3695
+	.8byte	.LVL1174
+	.4byte	0x3666
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF622
+	.4byte	.LASF621
 	.byte	0x5
 	.byte	0x6f
 	.4byte	0x5b
@@ -28924,27 +28886,27 @@ __func__.7632:
 	.8byte	.LFE308-.LFB308
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x351d
+	.4byte	0x34ee
 	.uleb128 0x2e
-	.4byte	.LASF623
+	.4byte	.LASF622
 	.byte	0x5
 	.byte	0x6f
 	.4byte	0x5b
-	.4byte	.LLST406
+	.4byte	.LLST405
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x5
 	.byte	0x71
 	.4byte	0xdc9
-	.4byte	.LLST407
+	.4byte	.LLST406
 	.uleb128 0x32
-	.4byte	.LASF624
+	.4byte	.LASF623
 	.byte	0x5
 	.byte	0x71
 	.4byte	0xdc9
-	.4byte	.LLST408
+	.4byte	.LLST407
 	.uleb128 0x2b
-	.4byte	.LASF625
+	.4byte	.LASF624
 	.byte	0x5
 	.byte	0x72
 	.4byte	0xdd4
@@ -28952,36 +28914,36 @@ __func__.7632:
 	.byte	0x91
 	.sleb128 -4
 	.uleb128 0x32
-	.4byte	.LASF626
+	.4byte	.LASF625
 	.byte	0x5
 	.byte	0x73
 	.4byte	0xdd4
-	.4byte	.LLST409
+	.4byte	.LLST408
 	.uleb128 0x2b
-	.4byte	.LASF614
+	.4byte	.LASF613
 	.byte	0x5
 	.byte	0x74
-	.4byte	0x1f04
+	.4byte	0x1eef
 	.uleb128 0xa
 	.byte	0x3
 	.8byte	g_gc_temp_superblock
 	.byte	0x9f
 	.uleb128 0x32
-	.4byte	.LASF627
+	.4byte	.LASF626
 	.byte	0x5
 	.byte	0x75
-	.4byte	0x1f49
-	.4byte	.LLST410
+	.4byte	0x1f34
+	.4byte	.LLST409
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x352d
+	.4byte	.LASF573
+	.4byte	0x34fe
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	__func__.7245
 	.uleb128 0x34
-	.8byte	.LVL1771
-	.4byte	0x3148
-	.4byte	0x33e0
+	.8byte	.LVL1770
+	.4byte	0x3126
+	.4byte	0x33be
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28990,9 +28952,9 @@ __func__.7632:
 	.8byte	.LANCHOR53
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1773
-	.4byte	0x5968
-	.4byte	0x33f7
+	.8byte	.LVL1772
+	.4byte	0x594e
+	.4byte	0x33d5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29000,18 +28962,15 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1774
-	.4byte	0x75ef
-	.uleb128 0x45
-	.8byte	.LVL1775
-	.4byte	0x7342
+	.8byte	.LVL1773
+	.4byte	0x75b1
 	.uleb128 0x45
-	.8byte	.LVL1779
-	.4byte	0x7d59
+	.8byte	.LVL1774
+	.4byte	0x7304
 	.uleb128 0x34
-	.8byte	.LVL1780
-	.4byte	0xa94d
-	.4byte	0x3450
+	.8byte	.LVL1778
+	.4byte	0xa94f
+	.4byte	0x3421
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29023,7 +28982,7 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR173
+	.8byte	.LANCHOR171
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
@@ -29032,9 +28991,9 @@ __func__.7632:
 	.byte	0xa2
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1782
-	.4byte	0x36c0
-	.4byte	0x3468
+	.8byte	.LVL1780
+	.4byte	0x3691
+	.4byte	0x3439
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29043,18 +29002,18 @@ __func__.7632:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1783
-	.4byte	0x6936
+	.8byte	.LVL1781
+	.4byte	0x692c
 	.uleb128 0x45
-	.8byte	.LVL1785
-	.4byte	0x5d63
+	.8byte	.LVL1783
+	.4byte	0x5d49
 	.uleb128 0x45
-	.8byte	.LVL1786
-	.4byte	0x5694
+	.8byte	.LVL1784
+	.4byte	0x567a
 	.uleb128 0x34
-	.8byte	.LVL1789
-	.4byte	0xa94d
-	.4byte	0x34ba
+	.8byte	.LVL1787
+	.4byte	0xa94f
+	.4byte	0x348b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29075,9 +29034,9 @@ __func__.7632:
 	.byte	0xa8
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1790
-	.4byte	0x5c36
-	.4byte	0x34d8
+	.8byte	.LVL1788
+	.4byte	0x5c1c
+	.4byte	0x34a9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -29091,12 +29050,12 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1791
-	.4byte	0x6d71
+	.8byte	.LVL1789
+	.4byte	0x6d33
 	.uleb128 0x34
-	.8byte	.LVL1794
-	.4byte	0x5c36
-	.4byte	0x3502
+	.8byte	.LVL1792
+	.4byte	0x5c1c
+	.4byte	0x34d3
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -29110,63 +29069,63 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1796
-	.4byte	0x36c0
+	.8byte	.LVL1794
+	.4byte	0x3691
 	.uleb128 0x45
-	.8byte	.LVL1800
-	.4byte	0x695b
+	.8byte	.LVL1798
+	.4byte	0x6951
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x352d
+	.4byte	0x34fe
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x12
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x351d
+	.4byte	0x34ee
 	.uleb128 0x43
-	.4byte	.LASF628
+	.4byte	.LASF627
 	.byte	0x5
 	.byte	0x54
 	.8byte	.LFB307
 	.8byte	.LFE307-.LFB307
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x35af
+	.4byte	0x3580
 	.uleb128 0x2e
-	.4byte	.LASF629
+	.4byte	.LASF628
 	.byte	0x5
 	.byte	0x54
 	.4byte	0xdd4
-	.4byte	.LLST133
+	.4byte	.LLST124
 	.uleb128 0x2e
 	.4byte	.LASF391
 	.byte	0x5
 	.byte	0x54
 	.4byte	0xdd4
-	.4byte	.LLST134
+	.4byte	.LLST125
 	.uleb128 0x31
 	.string	"lpa"
 	.byte	0x5
 	.byte	0x54
 	.4byte	0xdd4
-	.4byte	.LLST135
+	.4byte	.LLST126
 	.uleb128 0x32
-	.4byte	.LASF630
+	.4byte	.LASF629
 	.byte	0x5
 	.byte	0x56
 	.4byte	0xdc9
-	.4byte	.LLST136
+	.4byte	.LLST127
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x5
 	.byte	0x57
 	.4byte	0xdc9
-	.4byte	.LLST137
+	.4byte	.LLST128
 	.uleb128 0x36
-	.8byte	.LVL549
-	.4byte	0x6d71
+	.8byte	.LVL526
+	.4byte	0x6d33
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29178,7 +29137,7 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF631
+	.4byte	.LASF630
 	.byte	0x5
 	.byte	0x49
 	.4byte	0xdd4
@@ -29186,29 +29145,29 @@ __func__.7632:
 	.8byte	.LFE306-.LFB306
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x35ed
+	.4byte	0x35be
 	.uleb128 0x31
 	.string	"blk"
 	.byte	0x5
 	.byte	0x49
 	.4byte	0xdc9
-	.4byte	.LLST131
+	.4byte	.LLST122
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x5
 	.byte	0x4b
 	.4byte	0xdc9
-	.4byte	.LLST132
+	.4byte	.LLST123
 	.byte	0
 	.uleb128 0x43
-	.4byte	.LASF632
+	.4byte	.LASF631
 	.byte	0x5
 	.byte	0x38
 	.8byte	.LFB305
 	.8byte	.LFE305-.LFB305
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3641
+	.4byte	0x3612
 	.uleb128 0x5b
 	.string	"req"
 	.byte	0x5
@@ -29217,7 +29176,7 @@ __func__.7632:
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5c
-	.4byte	.LASF633
+	.4byte	.LASF632
 	.byte	0x5
 	.byte	0x38
 	.4byte	0xdd4
@@ -29228,23 +29187,23 @@ __func__.7632:
 	.byte	0x5
 	.byte	0x3a
 	.4byte	0xdc9
-	.4byte	.LLST129
+	.4byte	.LLST120
 	.uleb128 0x32
-	.4byte	.LASF634
+	.4byte	.LASF633
 	.byte	0x5
 	.byte	0x3b
 	.4byte	0xdc9
-	.4byte	.LLST130
+	.4byte	.LLST121
 	.byte	0
 	.uleb128 0x43
-	.4byte	.LASF635
+	.4byte	.LASF634
 	.byte	0x5
 	.byte	0x29
 	.8byte	.LFB304
 	.8byte	.LFE304-.LFB304
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3695
+	.4byte	0x3666
 	.uleb128 0x5b
 	.string	"req"
 	.byte	0x5
@@ -29253,7 +29212,7 @@ __func__.7632:
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5c
-	.4byte	.LASF633
+	.4byte	.LASF632
 	.byte	0x5
 	.byte	0x29
 	.4byte	0xdd4
@@ -29264,68 +29223,68 @@ __func__.7632:
 	.byte	0x5
 	.byte	0x2b
 	.4byte	0xdc9
-	.4byte	.LLST127
+	.4byte	.LLST118
 	.uleb128 0x32
-	.4byte	.LASF634
+	.4byte	.LASF633
 	.byte	0x5
 	.byte	0x2c
 	.4byte	0xdc9
-	.4byte	.LLST128
+	.4byte	.LLST119
 	.byte	0
 	.uleb128 0x43
-	.4byte	.LASF636
+	.4byte	.LASF635
 	.byte	0x5
 	.byte	0x15
 	.8byte	.LFB303
 	.8byte	.LFE303-.LFB303
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x36c0
+	.4byte	0x3691
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x5
 	.byte	0x17
 	.4byte	0xdc9
-	.4byte	.LLST126
+	.4byte	.LLST117
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF637
+	.4byte	.LASF636
 	.byte	0x2
-	.2byte	0xa93
+	.2byte	0xac6
 	.4byte	0x5b
 	.8byte	.LFB302
 	.8byte	.LFE302-.LFB302
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x37af
+	.4byte	0x3780
 	.uleb128 0x53
-	.4byte	.LASF624
+	.4byte	.LASF623
 	.byte	0x2
-	.2byte	0xa93
+	.2byte	0xac6
 	.4byte	0xdc9
-	.4byte	.LLST325
+	.4byte	.LLST324
 	.uleb128 0x54
 	.string	"ret"
 	.byte	0x2
-	.2byte	0xa95
+	.2byte	0xac8
 	.4byte	0x5b
-	.4byte	.LLST326
+	.4byte	.LLST325
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x37bf
+	.4byte	.LASF573
+	.4byte	0x3790
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	__func__.7175
 	.uleb128 0x34
-	.8byte	.LVL1341
-	.4byte	0xa94d
-	.4byte	0x373f
+	.8byte	.LVL1343
+	.4byte	0xa94f
+	.4byte	0x3710
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC98
+	.8byte	.LC101
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -29339,9 +29298,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1346
-	.4byte	0xa94d
-	.4byte	0x3772
+	.8byte	.LVL1348
+	.4byte	0xa94f
+	.4byte	0x3743
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29353,20 +29312,20 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR160
+	.8byte	.LANCHOR159
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xa9a
+	.2byte	0xacd
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1347
-	.4byte	0x37c4
-	.uleb128 0x36
 	.8byte	.LVL1349
-	.4byte	0xa94d
+	.4byte	0x3795
+	.uleb128 0x36
+	.8byte	.LVL1351
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29378,88 +29337,88 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR160
+	.8byte	.LANCHOR159
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xaaa
+	.2byte	0xadd
 	.byte	0
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x37bf
+	.4byte	0x3790
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x13
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x37af
+	.4byte	0x3780
 	.uleb128 0x4a
-	.4byte	.LASF638
+	.4byte	.LASF637
 	.byte	0x2
-	.2byte	0xa7e
+	.2byte	0xab1
 	.4byte	0x5b
 	.byte	0x1
-	.4byte	0x37ef
+	.4byte	0x37c0
 	.uleb128 0x4b
-	.4byte	.LASF624
+	.4byte	.LASF623
 	.byte	0x2
-	.2byte	0xa7e
+	.2byte	0xab1
 	.4byte	0xdc9
 	.uleb128 0x4f
-	.4byte	.LASF574
-	.4byte	0x37ff
-	.4byte	.LASF638
+	.4byte	.LASF573
+	.4byte	0x37d0
+	.4byte	.LASF637
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x37ff
+	.4byte	0x37d0
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0xf
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x37ef
+	.4byte	0x37c0
 	.uleb128 0x49
-	.4byte	.LASF639
+	.4byte	.LASF638
 	.byte	0x2
-	.2byte	0xa5e
+	.2byte	0xa91
 	.4byte	0xdd4
 	.8byte	.LFB300
 	.8byte	.LFE300-.LFB300
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3932
+	.4byte	0x3903
 	.uleb128 0x53
-	.4byte	.LASF640
+	.4byte	.LASF639
 	.byte	0x2
-	.2byte	0xa5e
-	.4byte	0x1f04
-	.4byte	.LLST123
+	.2byte	0xa91
+	.4byte	0x1eef
+	.4byte	.LLST114
 	.uleb128 0x55
-	.4byte	.LASF597
+	.4byte	.LASF596
 	.byte	0x2
-	.2byte	0xa60
+	.2byte	0xa93
 	.4byte	0xdc9
-	.4byte	.LLST124
+	.4byte	.LLST115
 	.uleb128 0x55
-	.4byte	.LASF641
+	.4byte	.LASF640
 	.byte	0x2
-	.2byte	0xa61
+	.2byte	0xa94
 	.4byte	0xdd4
-	.4byte	.LLST125
+	.4byte	.LLST116
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x352d
+	.4byte	.LASF573
+	.4byte	0x34fe
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	__func__.7155
 	.uleb128 0x34
-	.8byte	.LVL508
-	.4byte	0xa94d
-	.4byte	0x389c
+	.8byte	.LVL485
+	.4byte	0xa94f
+	.4byte	0x386d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29471,18 +29430,18 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR90
+	.8byte	.LANCHOR88
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xa63
+	.2byte	0xa96
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL509
-	.4byte	0xa94d
-	.4byte	0x38cf
+	.8byte	.LVL486
+	.4byte	0xa94f
+	.4byte	0x38a0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29494,18 +29453,18 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR90
+	.8byte	.LANCHOR88
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xa64
+	.2byte	0xa97
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL510
-	.4byte	0xa94d
-	.4byte	0x3902
+	.8byte	.LVL487
+	.4byte	0xa94f
+	.4byte	0x38d3
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29517,17 +29476,17 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR90
+	.8byte	.LANCHOR88
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xa65
+	.2byte	0xa98
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL514
-	.4byte	0xa94d
+	.8byte	.LVL491
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29539,47 +29498,47 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR90
+	.8byte	.LANCHOR88
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xa7a
+	.2byte	0xaad
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF642
+	.4byte	.LASF641
 	.byte	0x2
-	.2byte	0xa46
+	.2byte	0xa79
 	.4byte	0x5b
 	.8byte	.LFB299
 	.8byte	.LFE299-.LFB299
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3a3d
+	.4byte	0x3a0e
 	.uleb128 0x53
-	.4byte	.LASF640
+	.4byte	.LASF639
 	.byte	0x2
-	.2byte	0xa46
-	.4byte	0x1f04
-	.4byte	.LLST391
+	.2byte	0xa79
+	.4byte	0x1eef
+	.4byte	.LLST396
 	.uleb128 0x55
-	.4byte	.LASF624
+	.4byte	.LASF623
 	.byte	0x2
-	.2byte	0xa48
+	.2byte	0xa7b
 	.4byte	0xdc9
-	.4byte	.LLST392
+	.4byte	.LLST397
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x3a4d
+	.4byte	.LASF573
+	.4byte	0x3a1e
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	__func__.7148
 	.uleb128 0x34
-	.8byte	.LVL1703
-	.4byte	0xa94d
-	.4byte	0x39ba
+	.8byte	.LVL1732
+	.4byte	0xa94f
+	.4byte	0x398b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29597,12 +29556,12 @@ __func__.7632:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xa49
+	.2byte	0xa7c
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1704
-	.4byte	0x6936
-	.4byte	0x39d2
+	.8byte	.LVL1733
+	.4byte	0x692c
+	.4byte	0x39a3
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29611,12 +29570,12 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1705
-	.4byte	0x37c4
+	.8byte	.LVL1734
+	.4byte	0x3795
 	.uleb128 0x34
-	.8byte	.LVL1706
-	.4byte	0x3a52
-	.4byte	0x39f7
+	.8byte	.LVL1735
+	.4byte	0x3a23
+	.4byte	0x39c8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29625,12 +29584,12 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1707
-	.4byte	0x5d63
+	.8byte	.LVL1736
+	.4byte	0x5d49
 	.uleb128 0x34
-	.8byte	.LVL1708
-	.4byte	0x5968
-	.4byte	0x3a1b
+	.8byte	.LVL1737
+	.4byte	0x594e
+	.4byte	0x39ec
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29638,11 +29597,11 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1709
-	.4byte	0x5694
+	.8byte	.LVL1738
+	.4byte	0x567a
 	.uleb128 0x36
-	.8byte	.LVL1713
-	.4byte	0x695b
+	.8byte	.LVL1742
+	.4byte	0x6951
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29653,95 +29612,95 @@ __func__.7632:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x3a4d
+	.4byte	0x3a1e
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x1c
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x3a3d
+	.4byte	0x3a0e
 	.uleb128 0x49
-	.4byte	.LASF643
+	.4byte	.LASF642
 	.byte	0x2
-	.2byte	0x9e2
+	.2byte	0xa15
 	.4byte	0x5b
 	.8byte	.LFB298
 	.8byte	.LFE298-.LFB298
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3d7d
+	.4byte	0x3d4e
 	.uleb128 0x5d
 	.string	"p"
 	.byte	0x2
-	.2byte	0x9e2
-	.4byte	0x1f04
-	.4byte	.LLST312
+	.2byte	0xa15
+	.4byte	0x1eef
+	.4byte	.LLST311
 	.uleb128 0x55
-	.4byte	.LASF644
+	.4byte	.LASF643
 	.byte	0x2
-	.2byte	0x9e4
+	.2byte	0xa17
 	.4byte	0xdc9
-	.4byte	.LLST313
+	.4byte	.LLST312
 	.uleb128 0x4c
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x2
-	.2byte	0x9e5
+	.2byte	0xa18
 	.4byte	0xdc9
 	.uleb128 0x55
-	.4byte	.LASF569
+	.4byte	.LASF568
 	.byte	0x2
-	.2byte	0x9e5
+	.2byte	0xa18
 	.4byte	0xdc9
-	.4byte	.LLST314
+	.4byte	.LLST313
 	.uleb128 0x54
 	.string	"n"
 	.byte	0x2
-	.2byte	0x9e5
+	.2byte	0xa18
 	.4byte	0xdc9
-	.4byte	.LLST315
+	.4byte	.LLST314
 	.uleb128 0x4c
-	.4byte	.LASF597
+	.4byte	.LASF596
 	.byte	0x2
-	.2byte	0x9e5
+	.2byte	0xa18
 	.4byte	0xdc9
 	.uleb128 0x55
-	.4byte	.LASF645
+	.4byte	.LASF644
 	.byte	0x2
-	.2byte	0x9e6
+	.2byte	0xa19
 	.4byte	0x5b
-	.4byte	.LLST316
+	.4byte	.LLST315
 	.uleb128 0x55
-	.4byte	.LASF646
+	.4byte	.LASF645
 	.byte	0x2
-	.2byte	0x9e7
+	.2byte	0xa1a
 	.4byte	0xdc9
-	.4byte	.LLST317
+	.4byte	.LLST316
 	.uleb128 0x4e
-	.4byte	.LASF647
+	.4byte	.LASF646
 	.byte	0x2
-	.2byte	0x9e8
+	.2byte	0xa1b
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x3d8d
+	.4byte	.LASF573
+	.4byte	0x3d5e
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	__func__.7127
 	.uleb128 0x5e
-	.4byte	0x5413
-	.8byte	.LBB248
-	.8byte	.LBE248-.LBB248
+	.4byte	0x53f4
+	.8byte	.LBB283
+	.8byte	.LBE283-.LBB283
 	.byte	0x2
-	.2byte	0xa18
-	.4byte	0x3b4d
+	.2byte	0xa4b
+	.4byte	0x3b1e
 	.uleb128 0x47
-	.4byte	0x542c
-	.4byte	.LLST318
+	.4byte	0x540d
+	.4byte	.LLST317
 	.uleb128 0x47
-	.4byte	0x5420
-	.4byte	.LLST319
+	.4byte	0x5401
+	.4byte	.LLST318
 	.uleb128 0x36
-	.8byte	.LVL1297
-	.4byte	0x979f
+	.8byte	.LVL1299
+	.4byte	0x96a0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29749,15 +29708,15 @@ __func__.7632:
 	.byte	0x84
 	.sleb128 0
 	.uleb128 0x3e
-	.4byte	0x542c
+	.4byte	0x540d
 	.uleb128 0x1
 	.byte	0x31
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1269
-	.4byte	0xa94d
-	.4byte	0x3b80
+	.8byte	.LVL1271
+	.4byte	0xa94f
+	.4byte	0x3b51
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29769,18 +29728,18 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR158
+	.8byte	.LANCHOR157
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x9e9
+	.2byte	0xa1c
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1273
-	.4byte	0x66ea
-	.4byte	0x3b9f
+	.8byte	.LVL1275
+	.4byte	0x66d0
+	.4byte	0x3b70
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29789,9 +29748,9 @@ __func__.7632:
 	.8byte	.LANCHOR47
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1275
-	.4byte	0xa94d
-	.4byte	0x3bd2
+	.8byte	.LVL1277
+	.4byte	0xa94f
+	.4byte	0x3ba3
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29803,18 +29762,18 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR158
+	.8byte	.LANCHOR157
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x9f2
+	.2byte	0xa25
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1276
-	.4byte	0x460e
-	.4byte	0x3bea
+	.8byte	.LVL1278
+	.4byte	0x45ef
+	.4byte	0x3bbb
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29823,9 +29782,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1277
-	.4byte	0x6936
-	.4byte	0x3c02
+	.8byte	.LVL1279
+	.4byte	0x692c
+	.4byte	0x3bd3
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29834,9 +29793,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1278
-	.4byte	0xa94d
-	.4byte	0x3c35
+	.8byte	.LVL1280
+	.4byte	0xa94f
+	.4byte	0x3c06
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29848,18 +29807,18 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR158
+	.8byte	.LANCHOR157
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x9fd
+	.2byte	0xa30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1281
-	.4byte	0xa94d
-	.4byte	0x3c68
+	.8byte	.LVL1283
+	.4byte	0xa94f
+	.4byte	0x3c39
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29871,18 +29830,18 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR158
+	.8byte	.LANCHOR157
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xa00
+	.2byte	0xa33
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1283
-	.4byte	0xa94d
-	.4byte	0x3c9b
+	.8byte	.LVL1285
+	.4byte	0xa94f
+	.4byte	0x3c6c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29894,18 +29853,18 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR158
+	.8byte	.LANCHOR157
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xa0b
+	.2byte	0xa3e
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1284
-	.4byte	0xa94d
-	.4byte	0x3cce
+	.8byte	.LVL1286
+	.4byte	0xa94f
+	.4byte	0x3c9f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29917,18 +29876,18 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR158
+	.8byte	.LANCHOR157
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xa0d
+	.2byte	0xa40
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1285
-	.4byte	0x5413
-	.4byte	0x3ceb
+	.8byte	.LVL1287
+	.4byte	0x53f4
+	.4byte	0x3cbc
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29942,9 +29901,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1288
-	.4byte	0x2721
-	.4byte	0x3d03
+	.8byte	.LVL1290
+	.4byte	0x270c
+	.4byte	0x3cd4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
@@ -29953,9 +29912,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1290
-	.4byte	0x3f10
-	.4byte	0x3d1b
+	.8byte	.LVL1292
+	.4byte	0x3ef1
+	.4byte	0x3cec
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29964,12 +29923,12 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1291
-	.4byte	0x7342
+	.8byte	.LVL1293
+	.4byte	0x7304
 	.uleb128 0x34
-	.8byte	.LVL1292
-	.4byte	0x6936
-	.4byte	0x3d40
+	.8byte	.LVL1294
+	.4byte	0x692c
+	.4byte	0x3d11
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29978,11 +29937,11 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1302
-	.4byte	0x75ef
+	.8byte	.LVL1304
+	.4byte	0x75b1
 	.uleb128 0x36
-	.8byte	.LVL1306
-	.4byte	0xa94d
+	.8byte	.LVL1308
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29994,98 +29953,104 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR158
+	.8byte	.LANCHOR157
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xa42
+	.2byte	0xa75
 	.byte	0
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x3d8d
+	.4byte	0x3d5e
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x18
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x3d7d
+	.4byte	0x3d4e
 	.uleb128 0x4a
-	.4byte	.LASF648
+	.4byte	.LASF647
 	.byte	0x2
-	.2byte	0x9d9
+	.2byte	0xa0c
 	.4byte	0x5b
 	.byte	0x1
-	.4byte	0x3db0
+	.4byte	0x3d81
 	.uleb128 0x4b
-	.4byte	.LASF624
+	.4byte	.LASF623
 	.byte	0x2
-	.2byte	0x9d9
+	.2byte	0xa0c
 	.4byte	0xdc9
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF649
+	.4byte	.LASF648
 	.byte	0x2
-	.2byte	0x98e
+	.2byte	0x9c3
 	.4byte	0xdc9
 	.8byte	.LFB296
 	.8byte	.LFE296-.LFB296
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3e7c
+	.4byte	0x3e5d
+	.uleb128 0x55
+	.4byte	.LASF649
+	.byte	0x2
+	.2byte	0x9c5
+	.4byte	0xdc9
+	.4byte	.LLST104
 	.uleb128 0x55
 	.4byte	.LASF650
 	.byte	0x2
-	.2byte	0x990
+	.2byte	0x9c6
 	.4byte	0xdc9
-	.4byte	.LLST114
+	.4byte	.LLST105
 	.uleb128 0x55
 	.4byte	.LASF651
 	.byte	0x2
-	.2byte	0x991
+	.2byte	0x9c7
 	.4byte	0xdc9
-	.4byte	.LLST115
+	.4byte	.LLST106
 	.uleb128 0x55
 	.4byte	.LASF652
 	.byte	0x2
-	.2byte	0x992
-	.4byte	0xdc9
-	.4byte	.LLST116
+	.2byte	0x9c8
+	.4byte	0x1e17
+	.4byte	.LLST107
 	.uleb128 0x55
 	.4byte	.LASF653
 	.byte	0x2
-	.2byte	0x993
-	.4byte	0x1e2c
-	.4byte	.LLST117
-	.uleb128 0x55
-	.4byte	.LASF654
-	.byte	0x2
-	.2byte	0x994
+	.2byte	0x9c9
 	.4byte	0xdc9
-	.4byte	.LLST118
+	.4byte	.LLST108
 	.uleb128 0x55
-	.4byte	.LASF655
+	.4byte	.LASF654
 	.byte	0x2
-	.2byte	0x995
+	.2byte	0x9ca
 	.4byte	0xdc9
-	.4byte	.LLST119
+	.4byte	.LLST109
 	.uleb128 0x54
 	.string	"i"
 	.byte	0x2
-	.2byte	0x996
+	.2byte	0x9cb
 	.4byte	0xdd4
-	.4byte	.LLST120
+	.4byte	.LLST110
+	.uleb128 0x55
+	.4byte	.LASF325
+	.byte	0x2
+	.2byte	0x9cc
+	.4byte	0xdc9
+	.4byte	.LLST111
 	.uleb128 0x45
-	.8byte	.LVL487
-	.4byte	0x3e7c
+	.8byte	.LVL462
+	.4byte	0x3e5d
 	.uleb128 0x45
-	.8byte	.LVL493
-	.4byte	0x3edd
+	.8byte	.LVL468
+	.4byte	0x3ebe
 	.uleb128 0x36
-	.8byte	.LVL495
-	.4byte	0xa94d
+	.8byte	.LVL470
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30101,95 +30066,95 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF656
+	.4byte	.LASF655
 	.byte	0x2
-	.2byte	0x979
+	.2byte	0x9ae
 	.4byte	0xdc9
 	.8byte	.LFB295
 	.8byte	.LFE295-.LFB295
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3edd
+	.4byte	0x3ebe
 	.uleb128 0x53
 	.4byte	.LASF236
 	.byte	0x2
-	.2byte	0x979
+	.2byte	0x9ae
 	.4byte	0xdc9
-	.4byte	.LLST103
+	.4byte	.LLST93
 	.uleb128 0x55
-	.4byte	.LASF657
+	.4byte	.LASF656
 	.byte	0x2
-	.2byte	0x97b
+	.2byte	0x9b0
 	.4byte	0xdc9
-	.4byte	.LLST104
+	.4byte	.LLST94
 	.uleb128 0x55
-	.4byte	.LASF587
+	.4byte	.LASF586
 	.byte	0x2
-	.2byte	0x97c
+	.2byte	0x9b1
 	.4byte	0xdc9
-	.4byte	.LLST105
+	.4byte	.LLST95
 	.uleb128 0x54
 	.string	"i"
 	.byte	0x2
-	.2byte	0x97d
+	.2byte	0x9b2
 	.4byte	0xdc9
-	.4byte	.LLST106
+	.4byte	.LLST96
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF658
+	.4byte	.LASF657
 	.byte	0x2
-	.2byte	0x970
+	.2byte	0x9a5
 	.4byte	0xdc9
 	.8byte	.LFB294
 	.8byte	.LFE294-.LFB294
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3f10
+	.4byte	0x3ef1
 	.uleb128 0x55
-	.4byte	.LASF652
+	.4byte	.LASF651
 	.byte	0x2
-	.2byte	0x972
+	.2byte	0x9a7
 	.4byte	0xdc9
-	.4byte	.LLST102
+	.4byte	.LLST92
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF659
+	.4byte	.LASF658
 	.byte	0x2
-	.2byte	0x960
+	.2byte	0x995
 	.4byte	0x5b
 	.8byte	.LFB293
 	.8byte	.LFE293-.LFB293
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3f98
+	.4byte	0x3f79
 	.uleb128 0x53
-	.4byte	.LASF624
+	.4byte	.LASF623
 	.byte	0x2
-	.2byte	0x960
+	.2byte	0x995
 	.4byte	0xdc9
-	.4byte	.LLST98
+	.4byte	.LLST88
 	.uleb128 0x55
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x2
-	.2byte	0x962
+	.2byte	0x997
 	.4byte	0xdc9
-	.4byte	.LLST99
+	.4byte	.LLST89
 	.uleb128 0x55
-	.4byte	.LASF597
+	.4byte	.LASF596
 	.byte	0x2
-	.2byte	0x962
+	.2byte	0x997
 	.4byte	0xdc9
-	.4byte	.LLST100
+	.4byte	.LLST90
 	.uleb128 0x55
 	.4byte	.LASF375
 	.byte	0x2
-	.2byte	0x963
+	.2byte	0x998
 	.4byte	0xdc9
-	.4byte	.LLST101
+	.4byte	.LLST91
 	.uleb128 0x34
-	.8byte	.LVL295
-	.4byte	0x6e0c
-	.4byte	0x3f8a
+	.8byte	.LVL270
+	.4byte	0x6dce
+	.4byte	0x3f6b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -30198,68 +30163,68 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL296
-	.4byte	0x7560
+	.8byte	.LVL271
+	.4byte	0x7522
 	.byte	0
 	.uleb128 0x4a
-	.4byte	.LASF660
+	.4byte	.LASF659
 	.byte	0x2
-	.2byte	0x901
+	.2byte	0x933
 	.4byte	0x5b
 	.byte	0x1
-	.4byte	0x3fc2
+	.4byte	0x3fa3
 	.uleb128 0x4d
 	.string	"i"
 	.byte	0x2
-	.2byte	0x903
+	.2byte	0x935
 	.4byte	0x5b
 	.uleb128 0x50
 	.uleb128 0x4c
-	.4byte	.LASF614
+	.4byte	.LASF613
 	.byte	0x2
-	.2byte	0x928
-	.4byte	0x1f04
+	.2byte	0x95a
+	.4byte	0x1eef
 	.byte	0
 	.byte	0
 	.uleb128 0x5f
-	.4byte	.LASF661
+	.4byte	.LASF660
 	.byte	0x2
-	.2byte	0x8e2
+	.2byte	0x914
 	.8byte	.LFB291
 	.8byte	.LFE291-.LFB291
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x40c6
+	.4byte	0x40a7
 	.uleb128 0x54
 	.string	"i"
 	.byte	0x2
-	.2byte	0x8e4
+	.2byte	0x916
 	.4byte	0x5b
-	.4byte	.LLST251
+	.4byte	.LLST250
 	.uleb128 0x60
 	.string	"ppa"
 	.byte	0x2
-	.2byte	0x8e5
+	.2byte	0x917
 	.4byte	0xdd4
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -4
 	.uleb128 0x55
-	.4byte	.LASF662
+	.4byte	.LASF661
 	.byte	0x2
-	.2byte	0x8e6
-	.4byte	0x2dff
-	.4byte	.LLST252
+	.2byte	0x918
+	.4byte	0x2dea
+	.4byte	.LLST251
 	.uleb128 0x34
-	.8byte	.LVL956
-	.4byte	0xa94d
-	.4byte	0x4032
+	.8byte	.LVL958
+	.4byte	0xa94f
+	.4byte	0x4013
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC88
+	.8byte	.LC91
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -30268,9 +30233,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL959
-	.4byte	0x5c36
-	.4byte	0x4056
+	.8byte	.LVL961
+	.4byte	0x5c1c
+	.4byte	0x4037
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30290,15 +30255,15 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL960
-	.4byte	0xa94d
-	.4byte	0x407b
+	.8byte	.LVL962
+	.4byte	0xa94f
+	.4byte	0x405c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC89
+	.8byte	.LC92
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -30307,15 +30272,15 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL962
-	.4byte	0x29a4
-	.4byte	0x40a4
+	.8byte	.LVL964
+	.4byte	0x298f
+	.4byte	0x4085
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR108
+	.8byte	.LANCHOR106
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -30328,14 +30293,14 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL963
-	.4byte	0xa94d
+	.8byte	.LVL965
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC90
+	.8byte	.LC93
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -30345,30 +30310,30 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x5f
-	.4byte	.LASF663
+	.4byte	.LASF662
 	.byte	0x2
-	.2byte	0x8ae
+	.2byte	0x8e0
 	.8byte	.LFB290
 	.8byte	.LFE290-.LFB290
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4248
+	.4byte	0x4229
 	.uleb128 0x54
 	.string	"i"
 	.byte	0x2
-	.2byte	0x8b0
+	.2byte	0x8e2
 	.4byte	0xdc9
-	.4byte	.LLST283
+	.4byte	.LLST282
 	.uleb128 0x54
 	.string	"lpn"
 	.byte	0x2
-	.2byte	0x8b1
+	.2byte	0x8e3
 	.4byte	0xdd4
-	.4byte	.LLST284
+	.4byte	.LLST283
 	.uleb128 0x2a
-	.4byte	.LASF664
+	.4byte	.LASF663
 	.byte	0x2
-	.2byte	0x8b2
+	.2byte	0x8e4
 	.4byte	0xdd4
 	.uleb128 0x2
 	.byte	0x91
@@ -30376,33 +30341,33 @@ __func__.7632:
 	.uleb128 0x54
 	.string	"blk"
 	.byte	0x2
-	.2byte	0x8b3
+	.2byte	0x8e5
 	.4byte	0xdc9
-	.4byte	.LLST285
+	.4byte	.LLST284
 	.uleb128 0x55
-	.4byte	.LASF665
+	.4byte	.LASF664
 	.byte	0x2
-	.2byte	0x8b4
+	.2byte	0x8e6
 	.4byte	0xdc9
-	.4byte	.LLST286
+	.4byte	.LLST285
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x4258
+	.4byte	.LASF573
+	.4byte	0x4239
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.7043
+	.8byte	__func__.7042
 	.uleb128 0x40
-	.4byte	.Ldebug_ranges0+0x180
-	.4byte	0x4178
+	.4byte	.Ldebug_ranges0+0x210
+	.4byte	0x4159
 	.uleb128 0x55
 	.4byte	.LASF236
 	.byte	0x2
-	.2byte	0x8d1
+	.2byte	0x903
 	.4byte	0xdc9
-	.4byte	.LLST287
+	.4byte	.LLST286
 	.uleb128 0x36
-	.8byte	.LVL1165
-	.4byte	0xa94d
+	.8byte	.LVL1167
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30418,26 +30383,26 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1143
-	.4byte	0xa94d
-	.4byte	0x41a4
+	.8byte	.LVL1145
+	.4byte	0xa94f
+	.4byte	0x4185
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC91
+	.8byte	.LC94
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR156
+	.8byte	.LANCHOR155
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1144
-	.4byte	0x259f
-	.4byte	0x41c9
+	.8byte	.LVL1146
+	.4byte	0x258a
+	.4byte	0x41aa
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30458,9 +30423,9 @@ __func__.7632:
 	.2byte	0x2000
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1152
-	.4byte	0xa94d
-	.4byte	0x41fc
+	.8byte	.LVL1154
+	.4byte	0xa94f
+	.4byte	0x41dd
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30472,18 +30437,18 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR156
+	.8byte	.LANCHOR155
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x8df
+	.2byte	0x911
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1154
-	.4byte	0x5c36
-	.4byte	0x4220
+	.8byte	.LVL1156
+	.4byte	0x5c1c
+	.4byte	0x4201
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30503,11 +30468,11 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1155
-	.4byte	0x6d71
+	.8byte	.LVL1157
+	.4byte	0x6d33
 	.uleb128 0x36
-	.8byte	.LVL1159
-	.4byte	0xa94d
+	.8byte	.LVL1161
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30524,38 +30489,38 @@ __func__.7632:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x4258
+	.4byte	0x4239
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0xd
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x4248
+	.4byte	0x4229
 	.uleb128 0x5f
-	.4byte	.LASF666
+	.4byte	.LASF665
 	.byte	0x2
-	.2byte	0x88f
+	.2byte	0x8c1
 	.8byte	.LFB289
 	.8byte	.LFE289-.LFB289
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4391
+	.4byte	0x4372
 	.uleb128 0x54
 	.string	"i"
 	.byte	0x2
-	.2byte	0x891
+	.2byte	0x8c3
 	.4byte	0xdc9
-	.4byte	.LLST388
+	.4byte	.LLST393
 	.uleb128 0x54
 	.string	"lpn"
 	.byte	0x2
-	.2byte	0x892
+	.2byte	0x8c4
 	.4byte	0xdd4
-	.4byte	.LLST389
+	.4byte	.LLST394
 	.uleb128 0x2a
-	.4byte	.LASF664
+	.4byte	.LASF663
 	.byte	0x2
-	.2byte	0x893
+	.2byte	0x8c5
 	.4byte	0xdd4
 	.uleb128 0x2
 	.byte	0x91
@@ -30563,25 +30528,25 @@ __func__.7632:
 	.uleb128 0x54
 	.string	"blk"
 	.byte	0x2
-	.2byte	0x894
+	.2byte	0x8c6
 	.4byte	0xdc9
-	.4byte	.LLST390
+	.4byte	.LLST395
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x43a1
+	.4byte	.LASF573
+	.4byte	0x4382
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.7027
+	.8byte	__func__.7026
 	.uleb128 0x34
-	.8byte	.LVL1683
-	.4byte	0xa94d
-	.4byte	0x42f7
+	.8byte	.LVL1712
+	.4byte	0xa94f
+	.4byte	0x42d8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC91
+	.8byte	.LC94
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -30590,9 +30555,9 @@ __func__.7632:
 	.8byte	.LANCHOR168
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1684
-	.4byte	0x259f
-	.4byte	0x430f
+	.8byte	.LVL1713
+	.4byte	0x258a
+	.4byte	0x42f0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -30601,9 +30566,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1689
-	.4byte	0x5c36
-	.4byte	0x4333
+	.8byte	.LVL1718
+	.4byte	0x5c1c
+	.4byte	0x4314
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30623,12 +30588,12 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1690
-	.4byte	0x6d71
+	.8byte	.LVL1719
+	.4byte	0x6d33
 	.uleb128 0x34
-	.8byte	.LVL1694
-	.4byte	0xa94d
-	.4byte	0x435e
+	.8byte	.LVL1723
+	.4byte	0xa94f
+	.4byte	0x433f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30643,9 +30608,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1695
-	.4byte	0x37c4
-	.4byte	0x4376
+	.8byte	.LVL1724
+	.4byte	0x3795
+	.4byte	0x4357
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30654,66 +30619,66 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1696
-	.4byte	0x5d63
+	.8byte	.LVL1725
+	.4byte	0x5d49
 	.uleb128 0x45
-	.8byte	.LVL1697
-	.4byte	0x5694
+	.8byte	.LVL1726
+	.4byte	0x567a
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x43a1
+	.4byte	0x4382
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x14
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x4391
+	.4byte	0x4372
 	.uleb128 0x5f
-	.4byte	.LASF667
+	.4byte	.LASF666
 	.byte	0x2
-	.2byte	0x86b
+	.2byte	0x89c
 	.8byte	.LFB288
 	.8byte	.LFE288-.LFB288
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x445e
+	.4byte	0x443f
 	.uleb128 0x53
-	.4byte	.LASF614
+	.4byte	.LASF613
 	.byte	0x2
-	.2byte	0x86b
-	.4byte	0x1f04
-	.4byte	.LLST356
+	.2byte	0x89c
+	.4byte	0x1eef
+	.4byte	.LLST355
 	.uleb128 0x2a
-	.4byte	.LASF668
+	.4byte	.LASF667
 	.byte	0x2
-	.2byte	0x86d
+	.2byte	0x89e
 	.4byte	0xdf5
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -32
 	.uleb128 0x55
-	.4byte	.LASF599
+	.4byte	.LASF598
 	.byte	0x2
-	.2byte	0x86e
-	.4byte	0x2dff
-	.4byte	.LLST357
+	.2byte	0x89f
+	.4byte	0x2dea
+	.4byte	.LLST356
 	.uleb128 0x55
-	.4byte	.LASF669
+	.4byte	.LASF668
 	.byte	0x2
-	.2byte	0x86f
+	.2byte	0x8a0
 	.4byte	0x5b
-	.4byte	.LLST358
+	.4byte	.LLST357
 	.uleb128 0x61
 	.4byte	.LASF384
 	.byte	0x2
-	.2byte	0x870
+	.2byte	0x8a1
 	.4byte	0xdd4
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1517
-	.4byte	0x3804
-	.4byte	0x4428
+	.8byte	.LVL1521
+	.4byte	0x37d5
+	.4byte	0x4409
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30722,15 +30687,15 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1520
-	.4byte	0x27e7
-	.4byte	0x4450
+	.8byte	.LVL1522
+	.4byte	0x27d2
+	.4byte	0x4431
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x3
 	.byte	0x8f
-	.sleb128 112
+	.sleb128 80
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -30748,22 +30713,22 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1521
-	.4byte	0x36c0
+	.8byte	.LVL1523
+	.4byte	0x3691
 	.byte	0
 	.uleb128 0x5f
-	.4byte	.LASF670
+	.4byte	.LASF669
 	.byte	0x2
-	.2byte	0x851
+	.2byte	0x882
 	.8byte	.LFB287
 	.8byte	.LFE287-.LFB287
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x44bf
+	.4byte	0x44a0
 	.uleb128 0x34
-	.8byte	.LVL1661
-	.4byte	0x59d0
-	.4byte	0x449e
+	.8byte	.LVL1663
+	.4byte	0x59b6
+	.4byte	0x447f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30782,8 +30747,8 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1662
-	.4byte	0x259f
+	.8byte	.LVL1664
+	.4byte	0x258a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30804,66 +30769,66 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x56
-	.4byte	.LASF672
+	.4byte	.LASF671
 	.byte	0x2
-	.2byte	0x83d
+	.2byte	0x86e
 	.byte	0x1
 	.uleb128 0x49
-	.4byte	.LASF673
+	.4byte	.LASF672
 	.byte	0x2
-	.2byte	0x812
+	.2byte	0x843
 	.4byte	0x5b
 	.8byte	.LFB285
 	.8byte	.LFE285-.LFB285
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x45f9
+	.4byte	0x45da
 	.uleb128 0x55
-	.4byte	.LASF650
+	.4byte	.LASF649
+	.byte	0x2
+	.2byte	0x845
+	.4byte	0xdc9
+	.4byte	.LLST276
+	.uleb128 0x55
+	.4byte	.LASF594
 	.byte	0x2
-	.2byte	0x814
+	.2byte	0x845
 	.4byte	0xdc9
 	.4byte	.LLST277
 	.uleb128 0x55
-	.4byte	.LASF595
+	.4byte	.LASF596
 	.byte	0x2
-	.2byte	0x814
+	.2byte	0x845
 	.4byte	0xdc9
 	.4byte	.LLST278
 	.uleb128 0x55
-	.4byte	.LASF597
+	.4byte	.LASF375
 	.byte	0x2
-	.2byte	0x814
+	.2byte	0x845
 	.4byte	0xdc9
 	.4byte	.LLST279
 	.uleb128 0x55
-	.4byte	.LASF375
+	.4byte	.LASF673
 	.byte	0x2
-	.2byte	0x814
+	.2byte	0x846
 	.4byte	0xdc9
 	.4byte	.LLST280
 	.uleb128 0x55
 	.4byte	.LASF674
 	.byte	0x2
-	.2byte	0x815
+	.2byte	0x846
 	.4byte	0xdc9
 	.4byte	.LLST281
-	.uleb128 0x55
-	.4byte	.LASF675
-	.byte	0x2
-	.2byte	0x815
-	.4byte	0xdc9
-	.4byte	.LLST282
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x4609
+	.4byte	.LASF573
+	.4byte	0x45ea
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.7002
+	.8byte	__func__.7001
 	.uleb128 0x34
-	.8byte	.LVL1117
-	.4byte	0x259f
-	.4byte	0x4574
+	.8byte	.LVL1119
+	.4byte	0x258a
+	.4byte	0x4555
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -30871,9 +30836,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1121
-	.4byte	0x6e0c
-	.4byte	0x458c
+	.8byte	.LVL1123
+	.4byte	0x6dce
+	.4byte	0x456d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -30882,12 +30847,12 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1122
-	.4byte	0x7560
+	.8byte	.LVL1124
+	.4byte	0x7522
 	.uleb128 0x34
-	.8byte	.LVL1129
-	.4byte	0x695b
-	.4byte	0x45b1
+	.8byte	.LVL1131
+	.4byte	0x6951
+	.4byte	0x4592
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30896,9 +30861,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1137
-	.4byte	0x6936
-	.4byte	0x45c9
+	.8byte	.LVL1139
+	.4byte	0x692c
+	.4byte	0x45aa
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30907,8 +30872,8 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1139
-	.4byte	0xa94d
+	.8byte	.LVL1141
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30920,62 +30885,62 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR155
+	.8byte	.LANCHOR154
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x839
+	.2byte	0x86a
 	.byte	0
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x4609
+	.4byte	0x45ea
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x11
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x45f9
+	.4byte	0x45da
 	.uleb128 0x49
-	.4byte	.LASF676
+	.4byte	.LASF675
 	.byte	0x2
-	.2byte	0x7fc
+	.2byte	0x82d
 	.4byte	0x5b
 	.8byte	.LFB284
 	.8byte	.LFE284-.LFB284
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x46c6
+	.4byte	0x46a7
 	.uleb128 0x5d
 	.string	"p"
 	.byte	0x2
-	.2byte	0x7fc
-	.4byte	0x1f04
-	.4byte	.LLST95
+	.2byte	0x82d
+	.4byte	0x1eef
+	.4byte	.LLST85
 	.uleb128 0x55
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x2
-	.2byte	0x7fe
+	.2byte	0x82f
 	.4byte	0xdc9
-	.4byte	.LLST96
+	.4byte	.LLST86
 	.uleb128 0x55
-	.4byte	.LASF597
+	.4byte	.LASF596
 	.byte	0x2
-	.2byte	0x7fe
+	.2byte	0x82f
 	.4byte	0xdc9
-	.4byte	.LLST97
+	.4byte	.LLST87
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x37ff
+	.4byte	.LASF573
+	.4byte	0x37d0
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6981
+	.8byte	__func__.6980
 	.uleb128 0x34
-	.8byte	.LVL278
-	.4byte	0xa94d
-	.4byte	0x46a4
+	.8byte	.LVL253
+	.4byte	0xa94f
+	.4byte	0x4685
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30987,20 +30952,20 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR61
+	.8byte	.LANCHOR60
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x800
+	.2byte	0x831
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL282
-	.4byte	0x6e0c
+	.8byte	.LVL257
+	.4byte	0x6dce
 	.uleb128 0x36
-	.8byte	.LVL284
-	.4byte	0x7560
+	.8byte	.LVL259
+	.4byte	0x7522
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31010,19 +30975,19 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF677
+	.4byte	.LASF676
 	.byte	0x2
-	.2byte	0x7ef
+	.2byte	0x820
 	.4byte	0x5b
 	.8byte	.LFB283
 	.8byte	.LFE283-.LFB283
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x476a
+	.4byte	0x474b
 	.uleb128 0x34
-	.8byte	.LVL1804
-	.4byte	0x4790
-	.4byte	0x4700
+	.8byte	.LVL1802
+	.4byte	0x4771
+	.4byte	0x46e1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31031,9 +30996,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1805
-	.4byte	0x476a
-	.4byte	0x4718
+	.8byte	.LVL1803
+	.4byte	0x474b
+	.4byte	0x46f9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31042,9 +31007,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1806
-	.4byte	0x4790
-	.4byte	0x4730
+	.8byte	.LVL1804
+	.4byte	0x4771
+	.4byte	0x4711
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31053,9 +31018,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1807
-	.4byte	0x476a
-	.4byte	0x4748
+	.8byte	.LVL1805
+	.4byte	0x474b
+	.4byte	0x4729
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31064,11 +31029,11 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1808
-	.4byte	0x313f
+	.8byte	.LVL1806
+	.4byte	0x311d
 	.uleb128 0x36
-	.8byte	.LVL1809
-	.4byte	0x36c0
+	.8byte	.LVL1807
+	.4byte	0x3691
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31078,226 +31043,226 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x62
-	.4byte	.LASF713
+	.4byte	.LASF712
 	.byte	0x2
-	.2byte	0x7dc
+	.2byte	0x80d
 	.byte	0x1
-	.4byte	0x4790
+	.4byte	0x4771
 	.uleb128 0x4b
-	.4byte	.LASF640
+	.4byte	.LASF639
 	.byte	0x2
-	.2byte	0x7dc
-	.4byte	0x1f04
+	.2byte	0x80d
+	.4byte	0x1eef
 	.uleb128 0x4c
-	.4byte	.LASF597
+	.4byte	.LASF596
 	.byte	0x2
-	.2byte	0x7de
+	.2byte	0x80f
 	.4byte	0xdc9
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF678
+	.4byte	.LASF677
 	.byte	0x2
-	.2byte	0x677
+	.2byte	0x6a8
 	.4byte	0x5b
 	.8byte	.LFB281
 	.8byte	.LFE281-.LFB281
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4d8d
+	.4byte	0x4d6e
 	.uleb128 0x53
-	.4byte	.LASF614
+	.4byte	.LASF613
+	.byte	0x2
+	.2byte	0x6a8
+	.4byte	0x1eef
+	.4byte	.LLST330
+	.uleb128 0x55
+	.4byte	.LASF678
 	.byte	0x2
-	.2byte	0x677
-	.4byte	0x1f04
+	.2byte	0x6aa
+	.4byte	0xdc9
 	.4byte	.LLST331
 	.uleb128 0x55
 	.4byte	.LASF679
 	.byte	0x2
-	.2byte	0x679
+	.2byte	0x6aa
 	.4byte	0xdc9
 	.4byte	.LLST332
 	.uleb128 0x55
-	.4byte	.LASF680
+	.4byte	.LASF594
 	.byte	0x2
-	.2byte	0x679
+	.2byte	0x6ab
 	.4byte	0xdc9
 	.4byte	.LLST333
 	.uleb128 0x55
-	.4byte	.LASF595
+	.4byte	.LASF382
 	.byte	0x2
-	.2byte	0x67a
+	.2byte	0x6ab
 	.4byte	0xdc9
 	.4byte	.LLST334
 	.uleb128 0x55
-	.4byte	.LASF382
+	.4byte	.LASF380
 	.byte	0x2
-	.2byte	0x67a
+	.2byte	0x6ab
 	.4byte	0xdc9
 	.4byte	.LLST335
 	.uleb128 0x55
-	.4byte	.LASF380
+	.4byte	.LASF680
 	.byte	0x2
-	.2byte	0x67a
+	.2byte	0x6ac
 	.4byte	0xdc9
 	.4byte	.LLST336
 	.uleb128 0x55
 	.4byte	.LASF681
 	.byte	0x2
-	.2byte	0x67b
+	.2byte	0x6ac
 	.4byte	0xdc9
 	.4byte	.LLST337
 	.uleb128 0x55
-	.4byte	.LASF682
+	.4byte	.LASF596
 	.byte	0x2
-	.2byte	0x67b
+	.2byte	0x6ad
 	.4byte	0xdc9
 	.4byte	.LLST338
 	.uleb128 0x55
-	.4byte	.LASF597
+	.4byte	.LASF682
 	.byte	0x2
-	.2byte	0x67c
-	.4byte	0xdc9
+	.2byte	0x6ae
+	.4byte	0x5b
 	.4byte	.LLST339
 	.uleb128 0x55
 	.4byte	.LASF683
 	.byte	0x2
-	.2byte	0x67d
-	.4byte	0x5b
-	.4byte	.LLST340
-	.uleb128 0x55
-	.4byte	.LASF684
-	.byte	0x2
-	.2byte	0x67d
+	.2byte	0x6ae
 	.4byte	0x5b
-	.4byte	.LLST340
+	.4byte	.LLST339
 	.uleb128 0x55
-	.4byte	.LASF569
+	.4byte	.LASF568
 	.byte	0x2
-	.2byte	0x67e
+	.2byte	0x6af
 	.4byte	0xdc9
-	.4byte	.LLST342
+	.4byte	.LLST341
 	.uleb128 0x54
 	.string	"n"
 	.byte	0x2
-	.2byte	0x67e
+	.2byte	0x6af
 	.4byte	0xdc9
-	.4byte	.LLST343
+	.4byte	.LLST342
 	.uleb128 0x54
 	.string	"req"
 	.byte	0x2
-	.2byte	0x67e
+	.2byte	0x6af
 	.4byte	0xdc9
-	.4byte	.LLST344
+	.4byte	.LLST343
 	.uleb128 0x60
 	.string	"lpa"
 	.byte	0x2
-	.2byte	0x67f
+	.2byte	0x6b0
 	.4byte	0xdd4
 	.uleb128 0x1
 	.byte	0x68
 	.uleb128 0x2a
-	.4byte	.LASF664
+	.4byte	.LASF663
 	.byte	0x2
-	.2byte	0x67f
+	.2byte	0x6b0
 	.4byte	0xdd4
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -12
 	.uleb128 0x2a
-	.4byte	.LASF625
+	.4byte	.LASF624
 	.byte	0x2
-	.2byte	0x67f
+	.2byte	0x6b0
 	.4byte	0xdd4
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -8
 	.uleb128 0x2a
-	.4byte	.LASF616
+	.4byte	.LASF615
 	.byte	0x2
-	.2byte	0x67f
+	.2byte	0x6b0
 	.4byte	0xdd4
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -4
 	.uleb128 0x55
-	.4byte	.LASF630
+	.4byte	.LASF629
+	.byte	0x2
+	.2byte	0x6b1
+	.4byte	0xdc9
+	.4byte	.LLST344
+	.uleb128 0x55
+	.4byte	.LASF684
 	.byte	0x2
-	.2byte	0x680
+	.2byte	0x6b1
 	.4byte	0xdc9
 	.4byte	.LLST345
 	.uleb128 0x55
 	.4byte	.LASF685
 	.byte	0x2
-	.2byte	0x680
-	.4byte	0xdc9
+	.2byte	0x6b2
+	.4byte	0xdd4
 	.4byte	.LLST346
 	.uleb128 0x55
 	.4byte	.LASF686
 	.byte	0x2
-	.2byte	0x681
-	.4byte	0xdd4
+	.2byte	0x6b3
+	.4byte	0xdc9
 	.4byte	.LLST347
 	.uleb128 0x55
-	.4byte	.LASF687
+	.4byte	.LASF598
 	.byte	0x2
-	.2byte	0x682
-	.4byte	0xdc9
+	.2byte	0x6b4
+	.4byte	0x2dea
 	.4byte	.LLST348
-	.uleb128 0x55
-	.4byte	.LASF599
-	.byte	0x2
-	.2byte	0x683
-	.4byte	0x2dff
-	.4byte	.LLST349
 	.uleb128 0x61
-	.4byte	.LASF688
+	.4byte	.LASF687
 	.byte	0x2
-	.2byte	0x684
+	.2byte	0x6b5
 	.4byte	0xdd4
 	.byte	0
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x4d9d
+	.4byte	.LASF573
+	.4byte	0x4d7e
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6924
+	.8byte	__func__.6923
 	.uleb128 0x59
-	.4byte	.LASF690
+	.4byte	.LASF689
 	.byte	0x2
-	.2byte	0x713
-	.8byte	.L1032
+	.2byte	0x744
+	.8byte	.L1038
 	.uleb128 0x59
-	.4byte	.LASF620
+	.4byte	.LASF619
 	.byte	0x2
-	.2byte	0x71b
-	.8byte	.L1047
+	.2byte	0x74c
+	.8byte	.L1053
 	.uleb128 0x59
-	.4byte	.LASF691
+	.4byte	.LASF690
 	.byte	0x2
-	.2byte	0x7ce
-	.8byte	.L1053
+	.2byte	0x7ff
+	.8byte	.L1059
 	.uleb128 0x4e
-	.4byte	.LASF692
+	.4byte	.LASF691
 	.byte	0x2
-	.2byte	0x7d8
+	.2byte	0x809
 	.uleb128 0x40
-	.4byte	.Ldebug_ranges0+0x220
-	.4byte	0x49b0
+	.4byte	.Ldebug_ranges0+0x2b0
+	.4byte	0x4991
 	.uleb128 0x55
-	.4byte	.LASF693
+	.4byte	.LASF692
 	.byte	0x2
-	.2byte	0x6eb
+	.2byte	0x71c
 	.4byte	0xdd4
-	.4byte	.LLST350
+	.4byte	.LLST349
 	.uleb128 0x55
-	.4byte	.LASF694
+	.4byte	.LASF693
 	.byte	0x2
-	.2byte	0x6ec
+	.2byte	0x71d
 	.4byte	0xdd4
-	.4byte	.LLST351
+	.4byte	.LLST350
 	.uleb128 0x36
-	.8byte	.LVL1430
-	.4byte	0x29a4
+	.8byte	.LVL1432
+	.4byte	0x298f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
@@ -31306,24 +31271,24 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x40
-	.4byte	.Ldebug_ranges0+0x250
-	.4byte	0x4aab
+	.4byte	.Ldebug_ranges0+0x2e0
+	.4byte	0x4a8c
 	.uleb128 0x55
-	.4byte	.LASF695
+	.4byte	.LASF694
 	.byte	0x2
-	.2byte	0x746
+	.2byte	0x777
 	.4byte	0xdd4
-	.4byte	.LLST352
+	.4byte	.LLST351
 	.uleb128 0x55
-	.4byte	.LASF696
+	.4byte	.LASF695
 	.byte	0x2
-	.2byte	0x747
+	.2byte	0x778
 	.4byte	0xdd4
-	.4byte	.LLST353
+	.4byte	.LLST352
 	.uleb128 0x34
-	.8byte	.LVL1473
-	.4byte	0x29a4
-	.4byte	0x49f5
+	.8byte	.LVL1475
+	.4byte	0x298f
+	.4byte	0x49d6
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -31336,12 +31301,12 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1475
-	.4byte	0x36c0
+	.8byte	.LVL1477
+	.4byte	0x3691
 	.uleb128 0x34
-	.8byte	.LVL1481
-	.4byte	0x5c36
-	.4byte	0x4a26
+	.8byte	.LVL1483
+	.4byte	0x5c1c
+	.4byte	0x4a07
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31361,9 +31326,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1484
-	.4byte	0x6d22
-	.4byte	0x4a41
+	.8byte	.LVL1486
+	.4byte	0x6ce4
+	.4byte	0x4a22
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -31374,9 +31339,9 @@ __func__.7632:
 	.byte	0x4
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1485
-	.4byte	0x4da2
-	.4byte	0x4a59
+	.8byte	.LVL1487
+	.4byte	0x4d83
+	.4byte	0x4a3a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31385,9 +31350,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1487
-	.4byte	0x29a4
-	.4byte	0x4a75
+	.8byte	.LVL1489
+	.4byte	0x298f
+	.4byte	0x4a56
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -31400,9 +31365,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1490
-	.4byte	0x6d22
-	.4byte	0x4a8d
+	.8byte	.LVL1492
+	.4byte	0x6ce4
+	.4byte	0x4a6e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -31411,8 +31376,8 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1491
-	.4byte	0x6d22
+	.8byte	.LVL1493
+	.4byte	0x6ce4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31430,25 +31395,25 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x63
-	.8byte	.LBB275
-	.8byte	.LBE275-.LBB275
-	.4byte	0x4b35
+	.8byte	.LBB310
+	.8byte	.LBE310-.LBB310
+	.4byte	0x4b16
 	.uleb128 0x55
-	.4byte	.LASF697
+	.4byte	.LASF696
 	.byte	0x2
-	.2byte	0x785
+	.2byte	0x7b6
 	.4byte	0xdd4
-	.4byte	.LLST354
+	.4byte	.LLST353
 	.uleb128 0x55
-	.4byte	.LASF696
+	.4byte	.LASF695
 	.byte	0x2
-	.2byte	0x786
+	.2byte	0x7b7
 	.4byte	0xdd4
-	.4byte	.LLST355
+	.4byte	.LLST354
 	.uleb128 0x34
-	.8byte	.LVL1499
-	.4byte	0x29a4
-	.4byte	0x4afc
+	.8byte	.LVL1501
+	.4byte	0x298f
+	.4byte	0x4add
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -31461,9 +31426,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1500
-	.4byte	0x6d22
-	.4byte	0x4b14
+	.8byte	.LVL1502
+	.4byte	0x6ce4
+	.4byte	0x4af5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31472,8 +31437,8 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1501
-	.4byte	0x5c36
+	.8byte	.LVL1503
+	.4byte	0x5c1c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31494,9 +31459,9 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1378
-	.4byte	0x6c45
-	.4byte	0x4b4c
+	.8byte	.LVL1380
+	.4byte	0x6c07
+	.4byte	0x4b2d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -31504,9 +31469,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1383
-	.4byte	0x29a4
-	.4byte	0x4b69
+	.8byte	.LVL1385
+	.4byte	0x298f
+	.4byte	0x4b4a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -31520,12 +31485,12 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1388
-	.4byte	0x6db1
+	.8byte	.LVL1390
+	.4byte	0x6d73
 	.uleb128 0x34
-	.8byte	.LVL1391
-	.4byte	0x4ee3
-	.4byte	0x4b9a
+	.8byte	.LVL1393
+	.4byte	0x4ec4
+	.4byte	0x4b7b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31546,9 +31511,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1399
-	.4byte	0xa94d
-	.4byte	0x4bcd
+	.8byte	.LVL1401
+	.4byte	0xa94f
+	.4byte	0x4bae
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31560,18 +31525,18 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR161
+	.8byte	.LANCHOR160
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x6aa
+	.2byte	0x6db
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1400
-	.4byte	0xa94d
-	.4byte	0x4c00
+	.8byte	.LVL1402
+	.4byte	0xa94f
+	.4byte	0x4be1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31583,18 +31548,18 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR161
+	.8byte	.LANCHOR160
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x6ab
+	.2byte	0x6dc
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1409
-	.4byte	0x6d22
-	.4byte	0x4c18
+	.8byte	.LVL1411
+	.4byte	0x6ce4
+	.4byte	0x4bf9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31603,9 +31568,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1435
-	.4byte	0x588f
-	.4byte	0x4c37
+	.8byte	.LVL1437
+	.4byte	0x5875
+	.4byte	0x4c18
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31614,9 +31579,9 @@ __func__.7632:
 	.8byte	.LANCHOR144
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1438
-	.4byte	0x29a4
-	.4byte	0x4c54
+	.8byte	.LVL1440
+	.4byte	0x298f
+	.4byte	0x4c35
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -31630,9 +31595,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1459
-	.4byte	0x6db1
-	.4byte	0x4c6e
+	.8byte	.LVL1461
+	.4byte	0x6d73
+	.4byte	0x4c4f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31643,12 +31608,12 @@ __func__.7632:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1466
-	.4byte	0x36c0
+	.8byte	.LVL1468
+	.4byte	0x3691
 	.uleb128 0x34
-	.8byte	.LVL1469
-	.4byte	0x6d22
-	.4byte	0x4c93
+	.8byte	.LVL1471
+	.4byte	0x6ce4
+	.4byte	0x4c74
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31657,9 +31622,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1470
-	.4byte	0x5c36
-	.4byte	0x4cb7
+	.8byte	.LVL1472
+	.4byte	0x5c1c
+	.4byte	0x4c98
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31679,9 +31644,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1471
-	.4byte	0x6d22
-	.4byte	0x4ccf
+	.8byte	.LVL1473
+	.4byte	0x6ce4
+	.4byte	0x4cb0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31690,9 +31655,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1476
-	.4byte	0x6d71
-	.4byte	0x4ce9
+	.8byte	.LVL1478
+	.4byte	0x6d33
+	.4byte	0x4cca
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31703,9 +31668,9 @@ __func__.7632:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1478
-	.4byte	0xa94d
-	.4byte	0x4d1c
+	.8byte	.LVL1480
+	.4byte	0xa94f
+	.4byte	0x4cfd
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31717,18 +31682,18 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR161
+	.8byte	.LANCHOR160
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x7a5
+	.2byte	0x7d6
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1493
-	.4byte	0x5c36
-	.4byte	0x4d40
+	.8byte	.LVL1495
+	.4byte	0x5c1c
+	.4byte	0x4d21
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31748,9 +31713,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1494
-	.4byte	0x6d71
-	.4byte	0x4d5a
+	.8byte	.LVL1496
+	.4byte	0x6d33
+	.4byte	0x4d3b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31761,15 +31726,15 @@ __func__.7632:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1503
-	.4byte	0xa94d
-	.4byte	0x4d7f
+	.8byte	.LVL1505
+	.4byte	0xa94f
+	.4byte	0x4d60
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC99
+	.8byte	.LC102
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -31778,76 +31743,76 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1505
-	.4byte	0x36c0
+	.8byte	.LVL1507
+	.4byte	0x3691
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x4d9d
+	.4byte	0x4d7e
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x15
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x4d8d
+	.4byte	0x4d6e
 	.uleb128 0x5f
-	.4byte	.LASF698
+	.4byte	.LASF697
 	.byte	0x2
-	.2byte	0x65b
+	.2byte	0x68c
 	.8byte	.LFB280
 	.8byte	.LFE280-.LFB280
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4ee3
+	.4byte	0x4ec4
 	.uleb128 0x5d
 	.string	"lpa"
 	.byte	0x2
-	.2byte	0x65b
+	.2byte	0x68c
 	.4byte	0xdd4
-	.4byte	.LLST245
+	.4byte	.LLST244
 	.uleb128 0x53
-	.4byte	.LASF664
+	.4byte	.LASF663
 	.byte	0x2
-	.2byte	0x65b
+	.2byte	0x68c
 	.4byte	0xdd4
-	.4byte	.LLST246
+	.4byte	.LLST245
 	.uleb128 0x55
-	.4byte	.LASF630
+	.4byte	.LASF629
 	.byte	0x2
-	.2byte	0x65d
+	.2byte	0x68e
 	.4byte	0xdc9
-	.4byte	.LLST247
+	.4byte	.LLST246
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x37ff
+	.4byte	.LASF573
+	.4byte	0x37d0
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6890
+	.8byte	__func__.6889
 	.uleb128 0x40
-	.4byte	.Ldebug_ranges0+0x100
-	.4byte	0x4ea7
+	.4byte	.Ldebug_ranges0+0x190
+	.4byte	0x4e88
 	.uleb128 0x54
 	.string	"i"
 	.byte	0x2
-	.2byte	0x661
+	.2byte	0x692
 	.4byte	0xdc9
-	.4byte	.LLST248
+	.4byte	.LLST247
 	.uleb128 0x55
-	.4byte	.LASF587
+	.4byte	.LASF586
 	.byte	0x2
-	.2byte	0x662
+	.2byte	0x693
 	.4byte	0xdc9
-	.4byte	.LLST249
+	.4byte	.LLST248
 	.uleb128 0x55
 	.4byte	.LASF236
 	.byte	0x2
-	.2byte	0x663
+	.2byte	0x694
 	.4byte	0xdc9
-	.4byte	.LLST250
+	.4byte	.LLST249
 	.uleb128 0x34
-	.8byte	.LVL944
-	.4byte	0x6761
-	.4byte	0x4e5f
+	.8byte	.LVL946
+	.4byte	0x6747
+	.4byte	0x4e40
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31862,9 +31827,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL945
-	.4byte	0xa94d
-	.4byte	0x4e92
+	.8byte	.LVL947
+	.4byte	0xa94f
+	.4byte	0x4e73
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31882,11 +31847,11 @@ __func__.7632:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x667
+	.2byte	0x698
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL946
-	.4byte	0x6936
+	.8byte	.LVL948
+	.4byte	0x692c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31896,9 +31861,9 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL938
-	.4byte	0x6d71
-	.4byte	0x4ec2
+	.8byte	.LVL940
+	.4byte	0x6d33
+	.4byte	0x4ea3
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31910,8 +31875,8 @@ __func__.7632:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL948
-	.4byte	0x5c36
+	.8byte	.LVL950
+	.4byte	0x5c1c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31932,56 +31897,56 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x5f
-	.4byte	.LASF699
+	.4byte	.LASF698
 	.byte	0x2
-	.2byte	0x647
+	.2byte	0x678
 	.8byte	.LFB279
 	.8byte	.LFE279-.LFB279
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4f40
+	.4byte	0x4f21
 	.uleb128 0x64
-	.4byte	.LASF614
+	.4byte	.LASF613
 	.byte	0x2
-	.2byte	0x647
-	.4byte	0x1f04
+	.2byte	0x678
+	.4byte	0x1eef
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x53
 	.4byte	.LASF380
 	.byte	0x2
-	.2byte	0x647
+	.2byte	0x678
 	.4byte	0xdc9
-	.4byte	.LLST90
+	.4byte	.LLST80
 	.uleb128 0x53
 	.4byte	.LASF382
 	.byte	0x2
-	.2byte	0x647
+	.2byte	0x678
 	.4byte	0xdc9
-	.4byte	.LLST91
+	.4byte	.LLST81
 	.uleb128 0x55
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x2
-	.2byte	0x649
+	.2byte	0x67a
 	.4byte	0xdc9
-	.4byte	.LLST92
+	.4byte	.LLST82
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF700
+	.4byte	.LASF699
 	.byte	0x2
-	.2byte	0x63e
+	.2byte	0x66f
 	.4byte	0x5b
 	.8byte	.LFB278
 	.8byte	.LFE278-.LFB278
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4f8b
+	.4byte	0x4f6c
 	.uleb128 0x45
-	.8byte	.LVL1108
-	.4byte	0x4f8b
+	.8byte	.LVL1110
+	.4byte	0x4f6c
 	.uleb128 0x36
-	.8byte	.LVL1109
-	.4byte	0x5023
+	.8byte	.LVL1111
+	.4byte	0x5004
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31991,24 +31956,24 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x5f
-	.4byte	.LASF701
+	.4byte	.LASF700
 	.byte	0x2
-	.2byte	0x627
+	.2byte	0x658
 	.8byte	.LFB277
 	.8byte	.LFE277-.LFB277
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4fe5
+	.4byte	0x4fc6
 	.uleb128 0x55
 	.4byte	.LASF330
 	.byte	0x2
-	.2byte	0x629
+	.2byte	0x65a
 	.4byte	0xdc9
-	.4byte	.LLST276
+	.4byte	.LLST275
 	.uleb128 0x34
-	.8byte	.LVL1105
-	.4byte	0x259f
-	.4byte	0x4fd0
+	.8byte	.LVL1107
+	.4byte	0x258a
+	.4byte	0x4fb1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32016,8 +31981,8 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1106
-	.4byte	0x259f
+	.8byte	.LVL1108
+	.4byte	0x258a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32027,18 +31992,18 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF702
+	.4byte	.LASF701
 	.byte	0x2
-	.2byte	0x617
+	.2byte	0x648
 	.4byte	0x5b
 	.8byte	.LFB276
 	.8byte	.LFE276-.LFB276
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5023
+	.4byte	0x5004
 	.uleb128 0x36
-	.8byte	.LVL1104
-	.4byte	0x5023
+	.8byte	.LVL1106
+	.4byte	0x5004
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32048,85 +32013,85 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF703
+	.4byte	.LASF702
 	.byte	0x2
-	.2byte	0x5b9
+	.2byte	0x5ea
 	.4byte	0x5b
 	.8byte	.LFB275
 	.8byte	.LFE275-.LFB275
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x51f5
+	.4byte	0x51d6
 	.uleb128 0x53
-	.4byte	.LASF704
+	.4byte	.LASF703
 	.byte	0x2
-	.2byte	0x5b9
-	.4byte	0x51f5
-	.4byte	.LLST265
+	.2byte	0x5ea
+	.4byte	0x51d6
+	.4byte	.LLST264
 	.uleb128 0x55
-	.4byte	.LASF705
+	.4byte	.LASF704
 	.byte	0x2
-	.2byte	0x5bb
+	.2byte	0x5ec
 	.4byte	0xdea
-	.4byte	.LLST266
+	.4byte	.LLST265
 	.uleb128 0x55
 	.4byte	.LASF299
 	.byte	0x2
-	.2byte	0x5bb
+	.2byte	0x5ec
 	.4byte	0xdea
-	.4byte	.LLST267
+	.4byte	.LLST266
 	.uleb128 0x55
-	.4byte	.LASF706
+	.4byte	.LASF705
 	.byte	0x2
-	.2byte	0x5bc
+	.2byte	0x5ed
 	.4byte	0xdea
-	.4byte	.LLST268
+	.4byte	.LLST267
 	.uleb128 0x55
 	.4byte	.LASF330
 	.byte	0x2
-	.2byte	0x5bd
+	.2byte	0x5ee
 	.4byte	0xdc9
-	.4byte	.LLST269
+	.4byte	.LLST268
 	.uleb128 0x55
-	.4byte	.LASF707
+	.4byte	.LASF706
 	.byte	0x2
-	.2byte	0x5be
+	.2byte	0x5ef
 	.4byte	0x1001
-	.4byte	.LLST270
+	.4byte	.LLST269
 	.uleb128 0x55
 	.4byte	.LASF310
 	.byte	0x2
-	.2byte	0x5bf
+	.2byte	0x5f0
 	.4byte	0x10f8
-	.4byte	.LLST271
+	.4byte	.LLST270
 	.uleb128 0x55
 	.4byte	.LASF311
 	.byte	0x2
-	.2byte	0x5c0
+	.2byte	0x5f1
 	.4byte	0x1001
-	.4byte	.LLST272
+	.4byte	.LLST271
 	.uleb128 0x55
 	.4byte	.LASF307
 	.byte	0x2
-	.2byte	0x5c1
+	.2byte	0x5f2
 	.4byte	0xdc9
-	.4byte	.LLST273
+	.4byte	.LLST272
 	.uleb128 0x55
-	.4byte	.LASF708
+	.4byte	.LASF707
 	.byte	0x2
-	.2byte	0x5c2
+	.2byte	0x5f3
 	.4byte	0xdc9
-	.4byte	.LLST274
+	.4byte	.LLST273
 	.uleb128 0x55
-	.4byte	.LASF709
+	.4byte	.LASF708
 	.byte	0x2
-	.2byte	0x5c3
-	.4byte	0x51fb
-	.4byte	.LLST275
+	.2byte	0x5f4
+	.4byte	0x51dc
+	.4byte	.LLST274
 	.uleb128 0x34
-	.8byte	.LVL1064
-	.4byte	0x259f
-	.4byte	0x511b
+	.8byte	.LVL1066
+	.4byte	0x258a
+	.4byte	0x50fc
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32149,9 +32114,9 @@ __func__.7632:
 	.byte	0x24
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1069
-	.4byte	0x6c45
-	.4byte	0x5132
+	.8byte	.LVL1071
+	.4byte	0x6c07
+	.4byte	0x5113
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32159,9 +32124,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1074
-	.4byte	0x635a
-	.4byte	0x514a
+	.8byte	.LVL1076
+	.4byte	0x6340
+	.4byte	0x512b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32170,9 +32135,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1075
-	.4byte	0x6302
-	.4byte	0x5162
+	.8byte	.LVL1077
+	.4byte	0x62e8
+	.4byte	0x5143
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32181,9 +32146,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1076
-	.4byte	0x6188
-	.4byte	0x517a
+	.8byte	.LVL1078
+	.4byte	0x616e
+	.4byte	0x515b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32192,9 +32157,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1077
-	.4byte	0x6188
-	.4byte	0x5192
+	.8byte	.LVL1079
+	.4byte	0x616e
+	.4byte	0x5173
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32203,9 +32168,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1085
-	.4byte	0x29a4
-	.4byte	0x51b4
+	.8byte	.LVL1087
+	.4byte	0x298f
+	.4byte	0x5195
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32224,9 +32189,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1089
-	.4byte	0x29a4
-	.4byte	0x51d6
+	.8byte	.LVL1091
+	.4byte	0x298f
+	.4byte	0x51b7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32245,8 +32210,8 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1091
-	.4byte	0x29a4
+	.8byte	.LVL1093
+	.4byte	0x298f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32272,31 +32237,31 @@ __func__.7632:
 	.byte	0x8
 	.4byte	0x1280
 	.uleb128 0x49
-	.4byte	.LASF710
+	.4byte	.LASF709
 	.byte	0x2
-	.2byte	0x54f
+	.2byte	0x580
 	.4byte	0x5b
 	.8byte	.LFB274
 	.8byte	.LFE274-.LFB274
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x53e0
+	.4byte	0x53c1
 	.uleb128 0x55
-	.4byte	.LASF706
+	.4byte	.LASF705
 	.byte	0x2
-	.2byte	0x551
+	.2byte	0x582
 	.4byte	0xdea
-	.4byte	.LLST463
+	.4byte	.LLST462
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x299f
+	.4byte	.LASF573
+	.4byte	0x298a
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6827
+	.8byte	__func__.6826
 	.uleb128 0x34
-	.8byte	.LVL2075
-	.4byte	0x259f
-	.4byte	0x525d
+	.8byte	.LVL2055
+	.4byte	0x258a
+	.4byte	0x523e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32304,9 +32269,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2076
-	.4byte	0x6c45
-	.4byte	0x5274
+	.8byte	.LVL2056
+	.4byte	0x6c07
+	.4byte	0x5255
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32314,9 +32279,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2078
-	.4byte	0xa94d
-	.4byte	0x52a7
+	.8byte	.LVL2058
+	.4byte	0xa94f
+	.4byte	0x5288
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32328,18 +32293,18 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR181
+	.8byte	.LANCHOR179
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x56c
+	.2byte	0x59d
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2079
-	.4byte	0xa94d
-	.4byte	0x52da
+	.8byte	.LVL2059
+	.4byte	0xa94f
+	.4byte	0x52bb
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32351,18 +32316,18 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR181
+	.8byte	.LANCHOR179
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x56e
+	.2byte	0x59f
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2081
-	.4byte	0x2527
-	.4byte	0x52f8
+	.8byte	.LVL2061
+	.4byte	0x2512
+	.4byte	0x52d9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32377,15 +32342,15 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2082
-	.4byte	0x2527
+	.8byte	.LVL2062
+	.4byte	0x2512
 	.uleb128 0x45
-	.8byte	.LVL2083
-	.4byte	0x2527
+	.8byte	.LVL2063
+	.4byte	0x2512
 	.uleb128 0x34
-	.8byte	.LVL2084
-	.4byte	0xa94d
-	.4byte	0x5345
+	.8byte	.LVL2064
+	.4byte	0xa94f
+	.4byte	0x5326
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32397,18 +32362,18 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR181
+	.8byte	.LANCHOR179
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x584
+	.2byte	0x5b5
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2085
-	.4byte	0x460e
-	.4byte	0x5364
+	.8byte	.LVL2065
+	.4byte	0x45ef
+	.4byte	0x5345
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32417,9 +32382,9 @@ __func__.7632:
 	.8byte	.LANCHOR51
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2086
-	.4byte	0x460e
-	.4byte	0x5383
+	.8byte	.LVL2066
+	.4byte	0x45ef
+	.4byte	0x5364
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32428,9 +32393,9 @@ __func__.7632:
 	.8byte	.LANCHOR52
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2087
-	.4byte	0x460e
-	.4byte	0x53a2
+	.8byte	.LVL2067
+	.4byte	0x45ef
+	.4byte	0x5383
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32439,19 +32404,19 @@ __func__.7632:
 	.8byte	.LANCHOR53
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2088
-	.4byte	0x460e
-	.4byte	0x53c1
+	.8byte	.LVL2068
+	.4byte	0x45ef
+	.4byte	0x53a2
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR82
+	.8byte	.LANCHOR80
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL2090
-	.4byte	0x29a4
+	.8byte	.LVL2070
+	.4byte	0x298f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32471,107 +32436,107 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF711
+	.4byte	.LASF710
 	.byte	0x2
-	.2byte	0x54a
+	.2byte	0x57b
 	.4byte	0x5b
 	.8byte	.LFB273
 	.8byte	.LFE273-.LFB273
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5413
+	.4byte	0x53f4
 	.uleb128 0x53
-	.4byte	.LASF712
+	.4byte	.LASF711
 	.byte	0x2
-	.2byte	0x54a
+	.2byte	0x57b
 	.4byte	0xdc9
-	.4byte	.LLST89
+	.4byte	.LLST79
 	.byte	0
 	.uleb128 0x62
-	.4byte	.LASF714
+	.4byte	.LASF713
 	.byte	0x2
-	.2byte	0x542
+	.2byte	0x573
 	.byte	0x1
-	.4byte	0x5439
+	.4byte	0x541a
 	.uleb128 0x4b
-	.4byte	.LASF712
+	.4byte	.LASF711
 	.byte	0x2
-	.2byte	0x542
+	.2byte	0x573
 	.4byte	0xdc9
 	.uleb128 0x4b
-	.4byte	.LASF591
+	.4byte	.LASF590
 	.byte	0x2
-	.2byte	0x542
+	.2byte	0x573
 	.4byte	0x5b
 	.byte	0
 	.uleb128 0x52
-	.4byte	.LASF716
+	.4byte	.LASF715
 	.byte	0x2
-	.2byte	0x535
+	.2byte	0x566
 	.4byte	0x5b
 	.byte	0x1
 	.uleb128 0x49
-	.4byte	.LASF717
+	.4byte	.LASF716
 	.byte	0x2
-	.2byte	0x446
+	.2byte	0x477
 	.4byte	0x5b
 	.8byte	.LFB270
 	.8byte	.LFE270-.LFB270
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5694
+	.4byte	0x567a
 	.uleb128 0x55
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x2
-	.2byte	0x448
+	.2byte	0x479
 	.4byte	0xdc9
-	.4byte	.LLST258
+	.4byte	.LLST257
 	.uleb128 0x55
-	.4byte	.LASF718
+	.4byte	.LASF717
 	.byte	0x2
-	.2byte	0x448
+	.2byte	0x479
 	.4byte	0xdc9
-	.4byte	.LLST259
+	.4byte	.LLST258
 	.uleb128 0x55
 	.4byte	.LASF388
 	.byte	0x2
-	.2byte	0x449
+	.2byte	0x47a
 	.4byte	0xdc9
-	.4byte	.LLST260
+	.4byte	.LLST259
 	.uleb128 0x55
-	.4byte	.LASF569
+	.4byte	.LASF568
 	.byte	0x2
-	.2byte	0x449
+	.2byte	0x47a
 	.4byte	0xdc9
-	.4byte	.LLST261
+	.4byte	.LLST260
 	.uleb128 0x54
 	.string	"i"
 	.byte	0x2
-	.2byte	0x44a
+	.2byte	0x47b
 	.4byte	0xdea
-	.4byte	.LLST262
+	.4byte	.LLST261
 	.uleb128 0x54
 	.string	"j"
 	.byte	0x2
-	.2byte	0x44a
+	.2byte	0x47b
 	.4byte	0xdea
-	.4byte	.LLST263
+	.4byte	.LLST262
 	.uleb128 0x55
-	.4byte	.LASF719
+	.4byte	.LASF718
 	.byte	0x2
-	.2byte	0x44b
-	.4byte	0x51fb
-	.4byte	.LLST264
+	.2byte	0x47c
+	.4byte	0x51dc
+	.4byte	.LLST263
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x4258
+	.4byte	.LASF573
+	.4byte	0x4239
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6770
+	.8byte	__func__.6769
 	.uleb128 0x34
-	.8byte	.LVL986
-	.4byte	0x259f
-	.4byte	0x54fe
+	.8byte	.LVL988
+	.4byte	0x258a
+	.4byte	0x54df
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32579,9 +32544,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL987
-	.4byte	0x259f
-	.4byte	0x5515
+	.8byte	.LVL989
+	.4byte	0x258a
+	.4byte	0x54f6
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32589,9 +32554,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL988
-	.4byte	0x259f
-	.4byte	0x552c
+	.8byte	.LVL990
+	.4byte	0x258a
+	.4byte	0x550d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32599,9 +32564,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL989
-	.4byte	0x259f
-	.4byte	0x5543
+	.8byte	.LVL991
+	.4byte	0x258a
+	.4byte	0x5524
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32609,15 +32574,15 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL990
-	.4byte	0x259f
-	.4byte	0x556d
+	.8byte	.LVL992
+	.4byte	0x258a
+	.4byte	0x554e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR81
+	.8byte	.LANCHOR79
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32631,9 +32596,9 @@ __func__.7632:
 	.byte	0x3c
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL993
-	.4byte	0x6e0c
-	.4byte	0x5588
+	.8byte	.LVL995
+	.4byte	0x6dce
+	.4byte	0x5569
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32644,9 +32609,9 @@ __func__.7632:
 	.byte	0x2
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL995
-	.4byte	0x7560
-	.4byte	0x55a0
+	.8byte	.LVL997
+	.4byte	0x7522
+	.4byte	0x5581
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32655,9 +32620,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1004
-	.4byte	0x29a4
-	.4byte	0x55bd
+	.8byte	.LVL1006
+	.4byte	0x298f
+	.4byte	0x559e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32671,9 +32636,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1009
-	.4byte	0x29a4
-	.4byte	0x55d9
+	.8byte	.LVL1011
+	.4byte	0x298f
+	.4byte	0x55ba
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32686,20 +32651,25 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1014
-	.4byte	0x6afa
-	.4byte	0x55f1
+	.8byte	.LVL1013
+	.4byte	0x6b48
+	.4byte	0x55d7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x8a
 	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1015
-	.4byte	0xa94d
-	.4byte	0x561f
+	.8byte	.LVL1017
+	.4byte	0xa94f
+	.4byte	0x5605
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32718,12 +32688,12 @@ __func__.7632:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x48a
+	.2byte	0x4bb
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1026
-	.4byte	0xa94d
-	.4byte	0x564d
+	.8byte	.LVL1028
+	.4byte	0xa94f
+	.4byte	0x5633
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32742,12 +32712,12 @@ __func__.7632:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x4b3
+	.2byte	0x4e4
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1037
-	.4byte	0x6afa
-	.4byte	0x5664
+	.8byte	.LVL1039
+	.4byte	0x6b48
+	.4byte	0x564a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32755,8 +32725,8 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1039
-	.4byte	0xa94d
+	.8byte	.LVL1041
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32774,51 +32744,51 @@ __func__.7632:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x530
+	.2byte	0x561
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF720
+	.4byte	.LASF719
 	.byte	0x2
-	.2byte	0x3eb
+	.2byte	0x41c
 	.4byte	0x5b
 	.8byte	.LFB269
 	.8byte	.LFE269-.LFB269
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x583d
+	.4byte	0x5823
 	.uleb128 0x55
 	.4byte	.LASF300
 	.byte	0x2
-	.2byte	0x3ed
+	.2byte	0x41e
 	.4byte	0xdc9
-	.4byte	.LLST385
+	.4byte	.LLST384
 	.uleb128 0x55
-	.4byte	.LASF721
+	.4byte	.LASF720
 	.byte	0x2
-	.2byte	0x3ee
-	.4byte	0x583d
-	.4byte	.LLST386
+	.2byte	0x41f
+	.4byte	0x5823
+	.4byte	.LLST385
 	.uleb128 0x55
-	.4byte	.LASF722
+	.4byte	.LASF721
 	.byte	0x2
-	.2byte	0x3ef
+	.2byte	0x420
 	.4byte	0xdc9
-	.4byte	.LLST387
+	.4byte	.LLST386
 	.uleb128 0x4e
-	.4byte	.LASF723
+	.4byte	.LASF722
 	.byte	0x2
-	.2byte	0x41c
+	.2byte	0x44d
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x299f
+	.4byte	.LASF573
+	.4byte	0x298a
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6748
+	.8byte	__func__.6747
 	.uleb128 0x34
-	.8byte	.LVL1665
-	.4byte	0x259f
-	.4byte	0x5719
+	.8byte	.LVL1667
+	.4byte	0x258a
+	.4byte	0x56ff
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32827,15 +32797,15 @@ __func__.7632:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1666
-	.4byte	0x2527
-	.4byte	0x573e
+	.8byte	.LVL1668
+	.4byte	0x2512
+	.4byte	0x5724
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR79
+	.8byte	.LANCHOR39
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
@@ -32844,15 +32814,15 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1667
-	.4byte	0x2527
+	.8byte	.LVL1669
+	.4byte	0x2512
 	.uleb128 0x45
-	.8byte	.LVL1668
-	.4byte	0x2527
+	.8byte	.LVL1670
+	.4byte	0x2512
 	.uleb128 0x34
-	.8byte	.LVL1669
-	.4byte	0x5944
-	.4byte	0x5770
+	.8byte	.LVL1671
+	.4byte	0x592a
+	.4byte	0x5756
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32861,9 +32831,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1671
-	.4byte	0x27e7
-	.4byte	0x5797
+	.8byte	.LVL1673
+	.4byte	0x27d2
+	.4byte	0x577d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32887,12 +32857,12 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1673
-	.4byte	0x6980
+	.8byte	.LVL1675
+	.4byte	0x6976
 	.uleb128 0x34
-	.8byte	.LVL1674
-	.4byte	0x27e7
-	.4byte	0x57cb
+	.8byte	.LVL1676
+	.4byte	0x27d2
+	.4byte	0x57b1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32916,9 +32886,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1675
-	.4byte	0xa94d
-	.4byte	0x57fe
+	.8byte	.LVL1677
+	.4byte	0xa94f
+	.4byte	0x57e4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32930,24 +32900,24 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR167
+	.8byte	.LANCHOR166
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x433
+	.2byte	0x464
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1678
-	.4byte	0xa94d
-	.4byte	0x5823
+	.8byte	.LVL1680
+	.4byte	0xa94f
+	.4byte	0x5809
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC101
+	.8byte	.LC104
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
@@ -32956,8 +32926,8 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1679
-	.4byte	0x6afa
+	.8byte	.LVL1681
+	.4byte	0x6b48
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32975,82 +32945,82 @@ __func__.7632:
 	.byte	0x8
 	.4byte	0x12d8
 	.uleb128 0x62
-	.4byte	.LASF724
+	.4byte	.LASF723
 	.byte	0x2
-	.2byte	0x3b2
+	.2byte	0x3e3
 	.byte	0x1
-	.4byte	0x588f
+	.4byte	0x5875
 	.uleb128 0x50
 	.uleb128 0x4d
 	.string	"lpa"
 	.byte	0x2
-	.2byte	0x3b7
+	.2byte	0x3e8
 	.4byte	0xdd4
 	.uleb128 0x4d
 	.string	"ppa"
 	.byte	0x2
-	.2byte	0x3b8
+	.2byte	0x3e9
 	.4byte	0xdd4
 	.uleb128 0x4c
-	.4byte	.LASF725
+	.4byte	.LASF724
 	.byte	0x2
-	.2byte	0x3b9
+	.2byte	0x3ea
 	.4byte	0xdd4
 	.uleb128 0x4c
-	.4byte	.LASF668
+	.4byte	.LASF667
 	.byte	0x2
-	.2byte	0x3ba
+	.2byte	0x3eb
 	.4byte	0xdf5
 	.uleb128 0x4c
-	.4byte	.LASF599
+	.4byte	.LASF598
 	.byte	0x2
-	.2byte	0x3bb
-	.4byte	0x2dff
+	.2byte	0x3ec
+	.4byte	0x2dea
 	.byte	0
 	.byte	0
 	.uleb128 0x5f
-	.4byte	.LASF726
+	.4byte	.LASF725
 	.byte	0x2
-	.2byte	0x380
+	.2byte	0x3b1
 	.8byte	.LFB267
 	.8byte	.LFE267-.LFB267
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5944
+	.4byte	0x592a
 	.uleb128 0x53
-	.4byte	.LASF704
+	.4byte	.LASF703
 	.byte	0x2
-	.2byte	0x380
-	.4byte	0x51f5
-	.4byte	.LLST254
+	.2byte	0x3b1
+	.4byte	0x51d6
+	.4byte	.LLST253
 	.uleb128 0x54
 	.string	"ppa"
 	.byte	0x2
-	.2byte	0x382
+	.2byte	0x3b3
 	.4byte	0xdd4
-	.4byte	.LLST255
+	.4byte	.LLST254
 	.uleb128 0x55
 	.4byte	.LASF317
 	.byte	0x2
-	.2byte	0x383
+	.2byte	0x3b4
 	.4byte	0xdc9
-	.4byte	.LLST256
+	.4byte	.LLST255
 	.uleb128 0x55
-	.4byte	.LASF707
+	.4byte	.LASF706
 	.byte	0x2
-	.2byte	0x384
+	.2byte	0x3b5
 	.4byte	0x1001
-	.4byte	.LLST257
+	.4byte	.LLST256
 	.uleb128 0x34
-	.8byte	.LVL980
-	.4byte	0x29a4
-	.4byte	0x5916
+	.8byte	.LVL982
+	.4byte	0x298f
+	.4byte	0x58fc
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR108
+	.8byte	.LANCHOR106
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -33063,9 +33033,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x44
-	.8byte	.LVL982
-	.4byte	0x5ea6
-	.4byte	0x592f
+	.8byte	.LVL984
+	.4byte	0x5e8c
+	.4byte	0x5915
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33075,8 +33045,8 @@ __func__.7632:
 	.byte	0x50
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL984
-	.4byte	0x259f
+	.8byte	.LVL986
+	.4byte	0x258a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -33086,48 +33056,48 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x62
-	.4byte	.LASF727
+	.4byte	.LASF726
 	.byte	0x2
-	.2byte	0x371
+	.2byte	0x3a2
 	.byte	0x1
-	.4byte	0x5968
+	.4byte	0x594e
 	.uleb128 0x4b
 	.4byte	.LASF393
 	.byte	0x2
-	.2byte	0x371
+	.2byte	0x3a2
 	.4byte	0xdd4
 	.uleb128 0x4d
 	.string	"i"
 	.byte	0x2
-	.2byte	0x373
+	.2byte	0x3a4
 	.4byte	0xdc9
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF728
+	.4byte	.LASF727
 	.byte	0x2
-	.2byte	0x35c
+	.2byte	0x38d
 	.4byte	0x5b
 	.8byte	.LFB265
 	.8byte	.LFE265-.LFB265
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x59d0
+	.4byte	0x59b6
 	.uleb128 0x53
-	.4byte	.LASF729
+	.4byte	.LASF728
 	.byte	0x2
-	.2byte	0x35c
+	.2byte	0x38d
 	.4byte	0xdd4
-	.4byte	.LLST375
+	.4byte	.LLST374
 	.uleb128 0x55
-	.4byte	.LASF730
+	.4byte	.LASF729
 	.byte	0x2
-	.2byte	0x35e
+	.2byte	0x38f
 	.4byte	0xdd4
-	.4byte	.LLST376
+	.4byte	.LLST375
 	.uleb128 0x34
-	.8byte	.LVL1627
-	.4byte	0x5af8
-	.4byte	0x59c2
+	.8byte	.LVL1629
+	.4byte	0x5ade
+	.4byte	0x59a8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33136,87 +33106,87 @@ __func__.7632:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1628
-	.4byte	0x44bf
+	.8byte	.LVL1630
+	.4byte	0x44a0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF731
+	.4byte	.LASF730
 	.byte	0x2
-	.2byte	0x336
+	.2byte	0x367
 	.4byte	0xdd4
 	.8byte	.LFB264
 	.8byte	.LFE264-.LFB264
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5af2
+	.4byte	0x5ad8
+	.uleb128 0x53
+	.4byte	.LASF731
+	.byte	0x2
+	.2byte	0x367
+	.4byte	0xdd4
+	.4byte	.LLST376
 	.uleb128 0x53
 	.4byte	.LASF732
 	.byte	0x2
-	.2byte	0x336
+	.2byte	0x367
 	.4byte	0xdd4
 	.4byte	.LLST377
 	.uleb128 0x53
 	.4byte	.LASF733
 	.byte	0x2
-	.2byte	0x336
-	.4byte	0xdd4
+	.2byte	0x367
+	.4byte	0x5ad8
 	.4byte	.LLST378
-	.uleb128 0x53
-	.4byte	.LASF734
-	.byte	0x2
-	.2byte	0x336
-	.4byte	0x5af2
-	.4byte	.LLST379
 	.uleb128 0x54
 	.string	"len"
 	.byte	0x2
-	.2byte	0x338
+	.2byte	0x369
 	.4byte	0xdc9
-	.4byte	.LLST380
+	.4byte	.LLST379
 	.uleb128 0x55
-	.4byte	.LASF735
+	.4byte	.LASF734
 	.byte	0x2
-	.2byte	0x338
+	.2byte	0x369
 	.4byte	0xdc9
-	.4byte	.LLST381
+	.4byte	.LLST380
 	.uleb128 0x54
 	.string	"ppn"
 	.byte	0x2
-	.2byte	0x339
+	.2byte	0x36a
 	.4byte	0xdd4
-	.4byte	.LLST382
+	.4byte	.LLST381
 	.uleb128 0x55
-	.4byte	.LASF736
+	.4byte	.LASF735
 	.byte	0x2
-	.2byte	0x33a
+	.2byte	0x36b
 	.4byte	0xdd4
-	.4byte	.LLST383
+	.4byte	.LLST382
 	.uleb128 0x60
 	.string	"req"
 	.byte	0x2
-	.2byte	0x33b
+	.2byte	0x36c
 	.4byte	0xdf5
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -96
 	.uleb128 0x55
-	.4byte	.LASF737
+	.4byte	.LASF736
 	.byte	0x2
-	.2byte	0x33c
+	.2byte	0x36d
 	.4byte	0xdd4
-	.4byte	.LLST384
+	.4byte	.LLST383
 	.uleb128 0x2a
-	.4byte	.LASF565
+	.4byte	.LASF564
 	.byte	0x2
-	.2byte	0x33d
-	.4byte	0x2711
+	.2byte	0x36e
+	.4byte	0x26fc
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -64
 	.uleb128 0x34
-	.8byte	.LVL1647
-	.4byte	0x29a4
-	.4byte	0x5ab4
+	.8byte	.LVL1649
+	.4byte	0x298f
+	.4byte	0x5a9a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33235,9 +33205,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1649
-	.4byte	0x2527
-	.4byte	0x5ad2
+	.8byte	.LVL1651
+	.4byte	0x2512
+	.4byte	0x5ab8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33252,8 +33222,8 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1656
-	.4byte	0x259f
+	.8byte	.LVL1658
+	.4byte	0x258a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33277,83 +33247,83 @@ __func__.7632:
 	.byte	0x8
 	.4byte	0xdbe
 	.uleb128 0x49
-	.4byte	.LASF738
+	.4byte	.LASF737
 	.byte	0x2
-	.2byte	0x311
+	.2byte	0x342
 	.4byte	0xdd4
 	.8byte	.LFB263
 	.8byte	.LFE263-.LFB263
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5c36
+	.4byte	0x5c1c
+	.uleb128 0x53
+	.4byte	.LASF731
+	.byte	0x2
+	.2byte	0x342
+	.4byte	0xdd4
+	.4byte	.LLST366
 	.uleb128 0x53
 	.4byte	.LASF732
 	.byte	0x2
-	.2byte	0x311
+	.2byte	0x342
 	.4byte	0xdd4
 	.4byte	.LLST367
 	.uleb128 0x53
 	.4byte	.LASF733
 	.byte	0x2
-	.2byte	0x311
-	.4byte	0xdd4
+	.2byte	0x342
+	.4byte	0x5ad8
 	.4byte	.LLST368
-	.uleb128 0x53
-	.4byte	.LASF734
-	.byte	0x2
-	.2byte	0x311
-	.4byte	0x5af2
-	.4byte	.LLST369
 	.uleb128 0x54
 	.string	"len"
 	.byte	0x2
-	.2byte	0x313
+	.2byte	0x344
 	.4byte	0xdc9
-	.4byte	.LLST370
+	.4byte	.LLST369
 	.uleb128 0x55
-	.4byte	.LASF735
+	.4byte	.LASF734
 	.byte	0x2
-	.2byte	0x313
+	.2byte	0x344
 	.4byte	0xdc9
-	.4byte	.LLST371
+	.4byte	.LLST370
 	.uleb128 0x54
 	.string	"ppn"
 	.byte	0x2
-	.2byte	0x314
+	.2byte	0x345
 	.4byte	0xdd4
-	.4byte	.LLST372
+	.4byte	.LLST371
 	.uleb128 0x55
-	.4byte	.LASF736
+	.4byte	.LASF735
 	.byte	0x2
-	.2byte	0x315
+	.2byte	0x346
 	.4byte	0xdd4
-	.4byte	.LLST373
+	.4byte	.LLST372
 	.uleb128 0x60
 	.string	"req"
 	.byte	0x2
-	.2byte	0x316
+	.2byte	0x347
 	.4byte	0xdf5
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -96
 	.uleb128 0x55
-	.4byte	.LASF737
+	.4byte	.LASF736
 	.byte	0x2
-	.2byte	0x317
+	.2byte	0x348
 	.4byte	0xdd4
-	.4byte	.LLST374
+	.4byte	.LLST373
 	.uleb128 0x2a
-	.4byte	.LASF565
+	.4byte	.LASF564
 	.byte	0x2
-	.2byte	0x318
-	.4byte	0x2711
+	.2byte	0x349
+	.4byte	0x26fc
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -64
 	.uleb128 0x34
-	.8byte	.LVL1608
-	.4byte	0x29a4
-	.4byte	0x5bdc
+	.8byte	.LVL1610
+	.4byte	0x298f
+	.4byte	0x5bc2
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33372,9 +33342,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1610
-	.4byte	0x2527
-	.4byte	0x5bfd
+	.8byte	.LVL1612
+	.4byte	0x2512
+	.4byte	0x5be3
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -33391,9 +33361,9 @@ __func__.7632:
 	.byte	0x4
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1614
-	.4byte	0x5ea6
-	.4byte	0x5c22
+	.8byte	.LVL1616
+	.4byte	0x5e8c
+	.4byte	0x5c08
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33408,8 +33378,8 @@ __func__.7632:
 	.sleb128 -1
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1619
-	.4byte	0x259f
+	.8byte	.LVL1621
+	.4byte	0x258a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -33418,66 +33388,66 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF739
+	.4byte	.LASF738
 	.byte	0x2
-	.2byte	0x2f0
+	.2byte	0x321
 	.4byte	0x5b
 	.8byte	.LFB262
 	.8byte	.LFE262-.LFB262
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5d4e
+	.4byte	0x5d34
 	.uleb128 0x5d
 	.string	"lpn"
 	.byte	0x2
-	.2byte	0x2f0
+	.2byte	0x321
 	.4byte	0xdd4
-	.4byte	.LLST239
+	.4byte	.LLST238
 	.uleb128 0x5d
 	.string	"ppn"
 	.byte	0x2
-	.2byte	0x2f0
+	.2byte	0x321
 	.4byte	0x1001
-	.4byte	.LLST240
+	.4byte	.LLST239
 	.uleb128 0x53
-	.4byte	.LASF740
+	.4byte	.LASF739
 	.byte	0x2
-	.2byte	0x2f0
+	.2byte	0x321
 	.4byte	0x5b
+	.4byte	.LLST240
+	.uleb128 0x55
+	.4byte	.LASF740
+	.byte	0x2
+	.2byte	0x323
+	.4byte	0xdc9
 	.4byte	.LLST241
 	.uleb128 0x55
 	.4byte	.LASF741
 	.byte	0x2
-	.2byte	0x2f2
+	.2byte	0x323
 	.4byte	0xdc9
 	.4byte	.LLST242
 	.uleb128 0x55
 	.4byte	.LASF742
 	.byte	0x2
-	.2byte	0x2f2
+	.2byte	0x323
 	.4byte	0xdc9
 	.4byte	.LLST243
-	.uleb128 0x55
-	.4byte	.LASF743
-	.byte	0x2
-	.2byte	0x2f2
-	.4byte	0xdc9
-	.4byte	.LLST244
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x5d5e
+	.4byte	.LASF573
+	.4byte	0x5d44
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6675
+	.8byte	__func__.6674
 	.uleb128 0x59
-	.4byte	.LASF744
+	.4byte	.LASF743
 	.byte	0x2
-	.2byte	0x2fb
-	.8byte	.L657
+	.2byte	0x32c
+	.8byte	.L664
 	.uleb128 0x34
-	.8byte	.LVL922
-	.4byte	0xa94d
-	.4byte	0x5d0e
+	.8byte	.LVL924
+	.4byte	0xa94f
+	.4byte	0x5cf4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33495,15 +33465,15 @@ __func__.7632:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x2f7
+	.2byte	0x328
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL925
-	.4byte	0x5db5
-	.uleb128 0x34
 	.8byte	.LVL927
-	.4byte	0x5e48
-	.4byte	0x5d33
+	.4byte	0x5d9b
+	.uleb128 0x34
+	.8byte	.LVL929
+	.4byte	0x5e2e
+	.4byte	0x5d19
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33512,8 +33482,8 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL928
-	.4byte	0x643d
+	.8byte	.LVL930
+	.4byte	0x6423
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33530,35 +33500,35 @@ __func__.7632:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x5d5e
+	.4byte	0x5d44
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x8
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x5d4e
+	.4byte	0x5d34
 	.uleb128 0x49
-	.4byte	.LASF745
+	.4byte	.LASF744
 	.byte	0x2
-	.2byte	0x2e3
+	.2byte	0x314
 	.4byte	0x5b
 	.8byte	.LFB261
 	.8byte	.LFE261-.LFB261
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5db5
+	.4byte	0x5d9b
 	.uleb128 0x54
 	.string	"i"
 	.byte	0x2
-	.2byte	0x2e5
+	.2byte	0x316
 	.4byte	0xdc9
-	.4byte	.LLST330
+	.4byte	.LLST329
 	.uleb128 0x45
-	.8byte	.LVL1363
-	.4byte	0x5843
+	.8byte	.LVL1365
+	.4byte	0x5829
 	.uleb128 0x36
-	.8byte	.LVL1366
-	.4byte	0x5e48
+	.8byte	.LVL1368
+	.4byte	0x5e2e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33568,42 +33538,42 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF746
+	.4byte	.LASF745
 	.byte	0x2
-	.2byte	0x2bb
+	.2byte	0x2ec
 	.4byte	0xdc9
 	.8byte	.LFB260
 	.8byte	.LFE260-.LFB260
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5e48
+	.4byte	0x5e2e
 	.uleb128 0x54
 	.string	"i"
 	.byte	0x2
-	.2byte	0x2bd
+	.2byte	0x2ee
 	.4byte	0xdc9
-	.4byte	.LLST83
+	.4byte	.LLST73
 	.uleb128 0x55
-	.4byte	.LASF747
+	.4byte	.LASF746
 	.byte	0x2
-	.2byte	0x2be
+	.2byte	0x2ef
 	.4byte	0xdc9
-	.4byte	.LLST84
+	.4byte	.LLST74
 	.uleb128 0x55
-	.4byte	.LASF748
+	.4byte	.LASF747
 	.byte	0x2
-	.2byte	0x2bf
+	.2byte	0x2f0
 	.4byte	0xdd4
-	.4byte	.LLST85
+	.4byte	.LLST75
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x4d9d
+	.4byte	.LASF573
+	.4byte	0x4d7e
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6658
+	.8byte	__func__.6657
 	.uleb128 0x36
-	.8byte	.LVL237
-	.4byte	0xa94d
+	.8byte	.LVL212
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33615,40 +33585,40 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR58
+	.8byte	.LANCHOR57
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x2df
+	.2byte	0x310
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF749
+	.4byte	.LASF748
 	.byte	0x2
-	.2byte	0x2b1
+	.2byte	0x2e2
 	.4byte	0x5b
 	.8byte	.LFB259
 	.8byte	.LFE259-.LFB259
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5ea6
+	.4byte	0x5e8c
 	.uleb128 0x53
-	.4byte	.LASF741
+	.4byte	.LASF740
 	.byte	0x2
-	.2byte	0x2b1
+	.2byte	0x2e2
 	.4byte	0xdc9
-	.4byte	.LLST237
+	.4byte	.LLST236
 	.uleb128 0x55
 	.4byte	.LASF317
 	.byte	0x2
-	.2byte	0x2b3
+	.2byte	0x2e4
 	.4byte	0xdd4
-	.4byte	.LLST238
+	.4byte	.LLST237
 	.uleb128 0x36
-	.8byte	.LVL915
-	.4byte	0x5ea6
+	.8byte	.LVL917
+	.4byte	0x5e8c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33658,65 +33628,65 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF750
+	.4byte	.LASF749
 	.byte	0x2
-	.2byte	0x276
+	.2byte	0x2a7
 	.4byte	0x5b
 	.8byte	.LFB258
 	.8byte	.LFE258-.LFB258
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6037
+	.4byte	0x601d
 	.uleb128 0x53
-	.4byte	.LASF704
+	.4byte	.LASF703
 	.byte	0x2
-	.2byte	0x276
-	.4byte	0x51f5
-	.4byte	.LLST224
+	.2byte	0x2a7
+	.4byte	0x51d6
+	.4byte	.LLST223
 	.uleb128 0x53
 	.4byte	.LASF317
 	.byte	0x2
-	.2byte	0x276
+	.2byte	0x2a7
 	.4byte	0xdd4
-	.4byte	.LLST225
+	.4byte	.LLST224
 	.uleb128 0x53
-	.4byte	.LASF734
+	.4byte	.LASF733
 	.byte	0x2
-	.2byte	0x276
+	.2byte	0x2a7
 	.4byte	0x1001
-	.4byte	.LLST226
+	.4byte	.LLST225
 	.uleb128 0x55
 	.4byte	.LASF388
 	.byte	0x2
-	.2byte	0x278
+	.2byte	0x2a9
 	.4byte	0xdd4
-	.4byte	.LLST227
+	.4byte	.LLST226
 	.uleb128 0x55
-	.4byte	.LASF709
+	.4byte	.LASF708
 	.byte	0x2
-	.2byte	0x279
-	.4byte	0x51fb
-	.4byte	.LLST228
+	.2byte	0x2aa
+	.4byte	0x51dc
+	.4byte	.LLST227
 	.uleb128 0x55
-	.4byte	.LASF722
+	.4byte	.LASF721
 	.byte	0x2
-	.2byte	0x27a
+	.2byte	0x2ab
 	.4byte	0xdc9
-	.4byte	.LLST229
+	.4byte	.LLST228
 	.uleb128 0x4e
-	.4byte	.LASF751
+	.4byte	.LASF750
 	.byte	0x2
-	.2byte	0x27c
+	.2byte	0x2ad
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x37ff
+	.4byte	.LASF573
+	.4byte	0x37d0
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6633
+	.8byte	__func__.6632
 	.uleb128 0x34
-	.8byte	.LVL873
-	.4byte	0x6037
-	.4byte	0x5f5b
+	.8byte	.LVL875
+	.4byte	0x601d
+	.4byte	0x5f41
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33725,9 +33695,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL874
-	.4byte	0xa94d
-	.4byte	0x5f87
+	.8byte	.LVL876
+	.4byte	0xa94f
+	.4byte	0x5f6d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33745,12 +33715,12 @@ __func__.7632:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x28a
+	.2byte	0x2bb
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL875
-	.4byte	0xa94d
-	.4byte	0x5fb3
+	.8byte	.LVL877
+	.4byte	0xa94f
+	.4byte	0x5f99
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33768,12 +33738,12 @@ __func__.7632:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x28b
+	.2byte	0x2bc
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL877
-	.4byte	0x259f
-	.4byte	0x5fcf
+	.8byte	.LVL879
+	.4byte	0x258a
+	.4byte	0x5fb5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -33786,9 +33756,9 @@ __func__.7632:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL880
-	.4byte	0x27e7
-	.4byte	0x5ff6
+	.8byte	.LVL882
+	.4byte	0x27d2
+	.4byte	0x5fdc
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33812,25 +33782,25 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL882
-	.4byte	0xa94d
-	.4byte	0x6015
+	.8byte	.LVL884
+	.4byte	0xa94f
+	.4byte	0x5ffb
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC86
+	.8byte	.LC89
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL883
-	.4byte	0xa94d
+	.8byte	.LVL885
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC87
+	.8byte	.LC90
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
@@ -33840,66 +33810,66 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF752
+	.4byte	.LASF751
 	.byte	0x2
-	.2byte	0x246
+	.2byte	0x277
 	.4byte	0x5b
 	.8byte	.LFB257
 	.8byte	.LFE257-.LFB257
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6173
+	.4byte	0x6159
 	.uleb128 0x53
-	.4byte	.LASF704
+	.4byte	.LASF703
 	.byte	0x2
-	.2byte	0x246
-	.4byte	0x51f5
-	.4byte	.LLST218
+	.2byte	0x277
+	.4byte	0x51d6
+	.4byte	.LLST217
 	.uleb128 0x4c
 	.4byte	.LASF388
 	.byte	0x2
-	.2byte	0x248
+	.2byte	0x279
 	.4byte	0xdc9
 	.uleb128 0x55
 	.4byte	.LASF330
 	.byte	0x2
-	.2byte	0x248
+	.2byte	0x279
 	.4byte	0xdc9
-	.4byte	.LLST219
+	.4byte	.LLST218
 	.uleb128 0x55
-	.4byte	.LASF753
+	.4byte	.LASF752
 	.byte	0x2
-	.2byte	0x249
+	.2byte	0x27a
 	.4byte	0xdc9
-	.4byte	.LLST220
+	.4byte	.LLST219
 	.uleb128 0x55
-	.4byte	.LASF754
+	.4byte	.LASF753
 	.byte	0x2
-	.2byte	0x24a
+	.2byte	0x27b
 	.4byte	0x10f8
-	.4byte	.LLST221
+	.4byte	.LLST220
 	.uleb128 0x55
-	.4byte	.LASF707
+	.4byte	.LASF706
 	.byte	0x2
-	.2byte	0x24b
+	.2byte	0x27c
 	.4byte	0x1001
-	.4byte	.LLST222
+	.4byte	.LLST221
 	.uleb128 0x55
-	.4byte	.LASF709
+	.4byte	.LASF708
 	.byte	0x2
-	.2byte	0x24c
-	.4byte	0x51fb
-	.4byte	.LLST223
+	.2byte	0x27d
+	.4byte	0x51dc
+	.4byte	.LLST222
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x6183
+	.4byte	.LASF573
+	.4byte	0x6169
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6619
+	.8byte	__func__.6618
 	.uleb128 0x34
-	.8byte	.LVL852
-	.4byte	0xa94d
-	.4byte	0x610b
+	.8byte	.LVL854
+	.4byte	0xa94f
+	.4byte	0x60f1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33917,15 +33887,15 @@ __func__.7632:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x250
+	.2byte	0x281
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL853
-	.4byte	0x6980
+	.8byte	.LVL855
+	.4byte	0x6976
 	.uleb128 0x34
-	.8byte	.LVL860
-	.4byte	0x259f
-	.4byte	0x6130
+	.8byte	.LVL862
+	.4byte	0x258a
+	.4byte	0x6116
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -33934,15 +33904,15 @@ __func__.7632:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL864
-	.4byte	0x27e7
-	.4byte	0x615e
+	.8byte	.LVL866
+	.4byte	0x27d2
+	.4byte	0x6144
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR108
+	.8byte	.LANCHOR106
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -33960,8 +33930,8 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL865
-	.4byte	0x6188
+	.8byte	.LVL867
+	.4byte	0x616e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33972,75 +33942,75 @@ __func__.7632:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x6183
+	.4byte	0x6169
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x1e
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x6173
+	.4byte	0x6159
 	.uleb128 0x49
-	.4byte	.LASF755
+	.4byte	.LASF754
 	.byte	0x2
-	.2byte	0x218
+	.2byte	0x249
 	.4byte	0x5b
 	.8byte	.LFB256
 	.8byte	.LFE256-.LFB256
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6302
+	.4byte	0x62e8
 	.uleb128 0x53
-	.4byte	.LASF704
+	.4byte	.LASF703
+	.byte	0x2
+	.2byte	0x249
+	.4byte	0x51d6
+	.4byte	.LLST229
+	.uleb128 0x55
+	.4byte	.LASF755
 	.byte	0x2
-	.2byte	0x218
-	.4byte	0x51f5
+	.2byte	0x24b
+	.4byte	0xdc9
 	.4byte	.LLST230
 	.uleb128 0x55
 	.4byte	.LASF756
 	.byte	0x2
-	.2byte	0x21a
+	.2byte	0x24c
 	.4byte	0xdc9
 	.4byte	.LLST231
 	.uleb128 0x55
-	.4byte	.LASF757
+	.4byte	.LASF330
 	.byte	0x2
-	.2byte	0x21b
+	.2byte	0x24d
 	.4byte	0xdc9
 	.4byte	.LLST232
 	.uleb128 0x55
-	.4byte	.LASF330
+	.4byte	.LASF753
 	.byte	0x2
-	.2byte	0x21c
-	.4byte	0xdc9
+	.2byte	0x24e
+	.4byte	0x10f8
 	.4byte	.LLST233
 	.uleb128 0x55
-	.4byte	.LASF754
+	.4byte	.LASF706
 	.byte	0x2
-	.2byte	0x21d
-	.4byte	0x10f8
+	.2byte	0x24f
+	.4byte	0x1001
 	.4byte	.LLST234
 	.uleb128 0x55
-	.4byte	.LASF707
+	.4byte	.LASF708
 	.byte	0x2
-	.2byte	0x21e
-	.4byte	0x1001
+	.2byte	0x250
+	.4byte	0x51dc
 	.4byte	.LLST235
-	.uleb128 0x55
-	.4byte	.LASF709
-	.byte	0x2
-	.2byte	0x21f
-	.4byte	0x51fb
-	.4byte	.LLST236
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x299f
+	.4byte	.LASF573
+	.4byte	0x298a
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6605
+	.8byte	__func__.6604
 	.uleb128 0x34
-	.8byte	.LVL892
-	.4byte	0x635a
-	.4byte	0x6245
+	.8byte	.LVL894
+	.4byte	0x6340
+	.4byte	0x622b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34049,9 +34019,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL895
-	.4byte	0x6302
-	.4byte	0x625d
+	.8byte	.LVL897
+	.4byte	0x62e8
+	.4byte	0x6243
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34060,9 +34030,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL897
-	.4byte	0x6afa
-	.4byte	0x627a
+	.8byte	.LVL899
+	.4byte	0x6b48
+	.4byte	0x6260
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34076,9 +34046,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL899
-	.4byte	0x6302
-	.4byte	0x6292
+	.8byte	.LVL901
+	.4byte	0x62e8
+	.4byte	0x6278
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34087,15 +34057,15 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL904
-	.4byte	0x29a4
-	.4byte	0x62bb
+	.8byte	.LVL906
+	.4byte	0x298f
+	.4byte	0x62a1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR108
+	.8byte	.LANCHOR106
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -34108,9 +34078,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL905
-	.4byte	0xa94d
-	.4byte	0x62e7
+	.8byte	.LVL907
+	.4byte	0xa94f
+	.4byte	0x62cd
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34128,11 +34098,11 @@ __func__.7632:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x234
+	.2byte	0x265
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL910
-	.4byte	0x5ea6
+	.8byte	.LVL912
+	.4byte	0x5e8c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34148,109 +34118,109 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x4a
-	.4byte	.LASF758
+	.4byte	.LASF757
 	.byte	0x2
-	.2byte	0x203
+	.2byte	0x231
 	.4byte	0x5b
 	.byte	0x1
-	.4byte	0x6345
+	.4byte	0x632b
 	.uleb128 0x4b
-	.4byte	.LASF704
+	.4byte	.LASF703
 	.byte	0x2
-	.2byte	0x203
-	.4byte	0x51f5
+	.2byte	0x231
+	.4byte	0x51d6
 	.uleb128 0x4c
-	.4byte	.LASF759
+	.4byte	.LASF758
 	.byte	0x2
-	.2byte	0x205
+	.2byte	0x233
 	.4byte	0xdc9
 	.uleb128 0x4c
-	.4byte	.LASF754
+	.4byte	.LASF753
 	.byte	0x2
-	.2byte	0x206
+	.2byte	0x234
 	.4byte	0x10f8
 	.uleb128 0x4f
-	.4byte	.LASF574
-	.4byte	0x6355
-	.4byte	.LASF758
+	.4byte	.LASF573
+	.4byte	0x633b
+	.4byte	.LASF757
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x6355
+	.4byte	0x633b
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x19
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x6345
+	.4byte	0x632b
 	.uleb128 0x49
-	.4byte	.LASF760
+	.4byte	.LASF759
 	.byte	0x2
-	.2byte	0x1db
+	.2byte	0x209
 	.4byte	0x5b
 	.8byte	.LFB254
 	.8byte	.LFE254-.LFB254
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x643d
+	.4byte	0x6423
 	.uleb128 0x53
-	.4byte	.LASF704
+	.4byte	.LASF703
 	.byte	0x2
-	.2byte	0x1db
-	.4byte	0x51f5
-	.4byte	.LLST209
+	.2byte	0x209
+	.4byte	0x51d6
+	.4byte	.LLST208
 	.uleb128 0x55
-	.4byte	.LASF754
+	.4byte	.LASF753
 	.byte	0x2
-	.2byte	0x1dd
+	.2byte	0x20b
 	.4byte	0x10f8
-	.4byte	.LLST210
+	.4byte	.LLST209
 	.uleb128 0x55
-	.4byte	.LASF707
+	.4byte	.LASF706
 	.byte	0x2
-	.2byte	0x1de
+	.2byte	0x20c
 	.4byte	0x1001
-	.4byte	.LLST211
+	.4byte	.LLST210
 	.uleb128 0x55
-	.4byte	.LASF761
+	.4byte	.LASF760
 	.byte	0x2
-	.2byte	0x1df
+	.2byte	0x20d
 	.4byte	0x10f8
-	.4byte	.LLST212
+	.4byte	.LLST211
 	.uleb128 0x55
 	.4byte	.LASF388
 	.byte	0x2
-	.2byte	0x1e0
+	.2byte	0x20e
 	.4byte	0xdc9
-	.4byte	.LLST213
+	.4byte	.LLST212
 	.uleb128 0x55
 	.4byte	.LASF330
 	.byte	0x2
-	.2byte	0x1e0
+	.2byte	0x20e
 	.4byte	0xdc9
-	.4byte	.LLST214
+	.4byte	.LLST213
 	.uleb128 0x55
-	.4byte	.LASF759
+	.4byte	.LASF758
 	.byte	0x2
-	.2byte	0x1e1
+	.2byte	0x20f
 	.4byte	0xdc9
-	.4byte	.LLST215
+	.4byte	.LLST214
 	.uleb128 0x55
-	.4byte	.LASF762
+	.4byte	.LASF761
 	.byte	0x2
-	.2byte	0x1e2
+	.2byte	0x210
 	.4byte	0xdc9
-	.4byte	.LLST216
+	.4byte	.LLST215
 	.uleb128 0x55
-	.4byte	.LASF757
+	.4byte	.LASF756
 	.byte	0x2
-	.2byte	0x1e3
+	.2byte	0x211
 	.4byte	0xdc9
-	.4byte	.LLST217
+	.4byte	.LLST216
 	.uleb128 0x34
-	.8byte	.LVL829
-	.4byte	0x259f
-	.4byte	0x6429
+	.8byte	.LVL831
+	.4byte	0x258a
+	.4byte	0x640f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34264,8 +34234,8 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL846
-	.4byte	0x6afa
+	.8byte	.LVL848
+	.4byte	0x6b48
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -34274,50 +34244,50 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF763
+	.4byte	.LASF762
 	.byte	0x2
-	.2byte	0x1b9
+	.2byte	0x1e7
 	.4byte	0x5b
 	.8byte	.LFB253
 	.8byte	.LFE253-.LFB253
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x65c5
+	.4byte	0x65ab
 	.uleb128 0x53
 	.4byte	.LASF317
 	.byte	0x2
-	.2byte	0x1b9
+	.2byte	0x1e7
 	.4byte	0xdc9
-	.4byte	.LLST206
+	.4byte	.LLST205
 	.uleb128 0x53
-	.4byte	.LASF741
+	.4byte	.LASF740
 	.byte	0x2
-	.2byte	0x1b9
+	.2byte	0x1e7
 	.4byte	0xdc9
-	.4byte	.LLST207
+	.4byte	.LLST206
 	.uleb128 0x2a
-	.4byte	.LASF709
+	.4byte	.LASF708
 	.byte	0x2
-	.2byte	0x1bb
-	.4byte	0x51fb
+	.2byte	0x1e9
+	.4byte	0x51dc
 	.uleb128 0x1
 	.byte	0x69
 	.uleb128 0x55
-	.4byte	.LASF764
+	.4byte	.LASF763
 	.byte	0x2
-	.2byte	0x1bc
+	.2byte	0x1ea
 	.4byte	0xdd4
-	.4byte	.LLST208
+	.4byte	.LLST207
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x37ff
+	.4byte	.LASF573
+	.4byte	0x37d0
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6562
+	.8byte	__func__.6560
 	.uleb128 0x34
-	.8byte	.LVL813
-	.4byte	0xa94d
-	.4byte	0x64e3
+	.8byte	.LVL815
+	.4byte	0xa94f
+	.4byte	0x64c9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34335,12 +34305,12 @@ __func__.7632:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x1be
+	.2byte	0x1ec
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL816
-	.4byte	0x259f
-	.4byte	0x64fb
+	.8byte	.LVL818
+	.4byte	0x258a
+	.4byte	0x64e1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -34349,9 +34319,9 @@ __func__.7632:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL820
-	.4byte	0x29a4
-	.4byte	0x651d
+	.8byte	.LVL822
+	.4byte	0x298f
+	.4byte	0x6503
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34370,15 +34340,15 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL822
-	.4byte	0xa94d
-	.4byte	0x6548
+	.8byte	.LVL824
+	.4byte	0xa94f
+	.4byte	0x652e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC83
+	.8byte	.LC86
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -34393,15 +34363,15 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL823
-	.4byte	0x2b1c
-	.4byte	0x6571
+	.8byte	.LVL825
+	.4byte	0x2b07
+	.4byte	0x6557
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC84
+	.8byte	.LC87
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
@@ -34414,15 +34384,15 @@ __func__.7632:
 	.byte	0x34
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL824
-	.4byte	0x2b1c
-	.4byte	0x6595
+	.8byte	.LVL826
+	.4byte	0x2b07
+	.4byte	0x657b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC85
+	.8byte	.LC88
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
@@ -34430,8 +34400,8 @@ __func__.7632:
 	.byte	0x34
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL825
-	.4byte	0xa94d
+	.8byte	.LVL827
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34449,109 +34419,109 @@ __func__.7632:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x1d3
+	.2byte	0x201
 	.byte	0
 	.byte	0
 	.uleb128 0x4a
-	.4byte	.LASF765
+	.4byte	.LASF764
 	.byte	0x2
-	.2byte	0x193
+	.2byte	0x1bf
 	.4byte	0x5b
 	.byte	0x1
-	.4byte	0x6644
+	.4byte	0x662a
 	.uleb128 0x4b
-	.4byte	.LASF650
+	.4byte	.LASF649
 	.byte	0x2
-	.2byte	0x193
+	.2byte	0x1bf
 	.4byte	0xdc9
 	.uleb128 0x4c
-	.4byte	.LASF766
+	.4byte	.LASF765
 	.byte	0x2
-	.2byte	0x195
+	.2byte	0x1c1
 	.4byte	0xdc9
 	.uleb128 0x4c
-	.4byte	.LASF767
+	.4byte	.LASF766
 	.byte	0x2
-	.2byte	0x196
+	.2byte	0x1c2
 	.4byte	0xdc9
 	.uleb128 0x4c
-	.4byte	.LASF768
+	.4byte	.LASF767
 	.byte	0x2
-	.2byte	0x197
+	.2byte	0x1c3
 	.4byte	0xdd4
 	.uleb128 0x4c
-	.4byte	.LASF769
+	.4byte	.LASF768
 	.byte	0x2
-	.2byte	0x199
+	.2byte	0x1c5
 	.4byte	0xdc9
 	.uleb128 0x4c
-	.4byte	.LASF770
+	.4byte	.LASF769
 	.byte	0x2
-	.2byte	0x19a
+	.2byte	0x1c6
 	.4byte	0xdd4
 	.uleb128 0x4c
-	.4byte	.LASF653
+	.4byte	.LASF652
 	.byte	0x2
-	.2byte	0x19b
-	.4byte	0x1e2c
+	.2byte	0x1c7
+	.4byte	0x1e17
 	.uleb128 0x4c
-	.4byte	.LASF771
+	.4byte	.LASF770
 	.byte	0x2
-	.2byte	0x19b
-	.4byte	0x1e2c
+	.2byte	0x1c7
+	.4byte	0x1e17
 	.uleb128 0x4f
-	.4byte	.LASF574
-	.4byte	0x4d9d
-	.4byte	.LASF765
+	.4byte	.LASF573
+	.4byte	0x4d7e
+	.4byte	.LASF764
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF772
+	.4byte	.LASF771
 	.byte	0x2
-	.2byte	0x17f
+	.2byte	0x1ab
 	.4byte	0x5b
 	.8byte	.LFB251
 	.8byte	.LFE251-.LFB251
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6697
+	.4byte	0x667d
 	.uleb128 0x53
 	.4byte	.LASF236
 	.byte	0x2
-	.2byte	0x17f
+	.2byte	0x1ab
 	.4byte	0xdc9
-	.4byte	.LLST67
+	.4byte	.LLST61
 	.uleb128 0x55
-	.4byte	.LASF650
+	.4byte	.LASF649
 	.byte	0x2
-	.2byte	0x181
+	.2byte	0x1ad
 	.4byte	0xdc9
-	.4byte	.LLST68
+	.4byte	.LLST62
 	.uleb128 0x55
-	.4byte	.LASF653
+	.4byte	.LASF652
 	.byte	0x2
-	.2byte	0x182
-	.4byte	0x1e2c
-	.4byte	.LLST69
+	.2byte	0x1ae
+	.4byte	0x1e17
+	.4byte	.LLST63
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF773
+	.4byte	.LASF772
 	.byte	0x2
-	.2byte	0x17a
+	.2byte	0x1a6
 	.4byte	0x5b
 	.8byte	.LFB250
 	.8byte	.LFE250-.LFB250
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x66e4
+	.4byte	0x66ca
 	.uleb128 0x53
-	.4byte	.LASF774
+	.4byte	.LASF773
 	.byte	0x2
-	.2byte	0x17a
-	.4byte	0x66e4
-	.4byte	.LLST66
+	.2byte	0x1a6
+	.4byte	0x66ca
+	.4byte	.LLST60
 	.uleb128 0x2f
-	.8byte	.LVL187
-	.4byte	0x66ea
+	.8byte	.LVL168
+	.4byte	0x66d0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34568,44 +34538,44 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x8
-	.4byte	0x1e2c
+	.4byte	0x1e17
 	.uleb128 0x49
-	.4byte	.LASF775
+	.4byte	.LASF774
 	.byte	0x2
-	.2byte	0x167
+	.2byte	0x193
 	.4byte	0x5b
 	.8byte	.LFB249
 	.8byte	.LFE249-.LFB249
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6761
+	.4byte	0x6747
 	.uleb128 0x53
-	.4byte	.LASF774
+	.4byte	.LASF773
 	.byte	0x2
-	.2byte	0x167
-	.4byte	0x66e4
-	.4byte	.LLST62
+	.2byte	0x193
+	.4byte	0x66ca
+	.4byte	.LLST56
 	.uleb128 0x53
 	.4byte	.LASF236
 	.byte	0x2
-	.2byte	0x167
+	.2byte	0x193
 	.4byte	0xdc9
-	.4byte	.LLST63
+	.4byte	.LLST57
 	.uleb128 0x55
-	.4byte	.LASF650
+	.4byte	.LASF649
 	.byte	0x2
-	.2byte	0x169
+	.2byte	0x195
 	.4byte	0xdc9
-	.4byte	.LLST64
+	.4byte	.LLST58
 	.uleb128 0x55
-	.4byte	.LASF653
+	.4byte	.LASF652
 	.byte	0x2
-	.2byte	0x16a
-	.4byte	0x1e2c
-	.4byte	.LLST65
+	.2byte	0x196
+	.4byte	0x1e17
+	.4byte	.LLST59
 	.uleb128 0x36
-	.8byte	.LVL178
-	.4byte	0x6761
+	.8byte	.LVL159
+	.4byte	0x6747
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -34615,48 +34585,48 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF776
+	.4byte	.LASF775
 	.byte	0x2
-	.2byte	0x14c
+	.2byte	0x176
 	.4byte	0x5b
 	.8byte	.LFB248
 	.8byte	.LFE248-.LFB248
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6806
+	.4byte	0x67ec
 	.uleb128 0x53
-	.4byte	.LASF774
+	.4byte	.LASF773
 	.byte	0x2
-	.2byte	0x14c
-	.4byte	0x66e4
-	.4byte	.LLST58
+	.2byte	0x176
+	.4byte	0x66ca
+	.4byte	.LLST52
 	.uleb128 0x53
-	.4byte	.LASF650
+	.4byte	.LASF649
 	.byte	0x2
-	.2byte	0x14c
+	.2byte	0x176
 	.4byte	0xdc9
-	.4byte	.LLST59
+	.4byte	.LLST53
 	.uleb128 0x55
-	.4byte	.LASF653
+	.4byte	.LASF652
 	.byte	0x2
-	.2byte	0x14e
-	.4byte	0x1e2c
-	.4byte	.LLST60
+	.2byte	0x178
+	.4byte	0x1e17
+	.4byte	.LLST54
 	.uleb128 0x55
-	.4byte	.LASF777
+	.4byte	.LASF776
 	.byte	0x2
-	.2byte	0x14e
-	.4byte	0x1e2c
-	.4byte	.LLST61
+	.2byte	0x178
+	.4byte	0x1e17
+	.4byte	.LLST55
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x6816
+	.4byte	.LASF573
+	.4byte	0x67fc
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6521
+	.8byte	__func__.6519
 	.uleb128 0x36
-	.8byte	.LVL164
-	.4byte	0xa94d
+	.8byte	.LVL144
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34674,384 +34644,407 @@ __func__.7632:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x151
+	.2byte	0x17b
 	.byte	0
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x6816
+	.4byte	0x67fc
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x10
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x6806
+	.4byte	0x67ec
 	.uleb128 0x49
-	.4byte	.LASF778
+	.4byte	.LASF777
 	.byte	0x2
-	.2byte	0x11b
+	.2byte	0x145
 	.4byte	0x5b
 	.8byte	.LFB247
 	.8byte	.LFE247-.LFB247
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x689c
+	.4byte	0x6882
 	.uleb128 0x53
-	.4byte	.LASF650
+	.4byte	.LASF649
 	.byte	0x2
-	.2byte	0x11b
+	.2byte	0x145
 	.4byte	0xdc9
-	.4byte	.LLST51
+	.4byte	.LLST45
 	.uleb128 0x55
-	.4byte	.LASF653
+	.4byte	.LASF652
 	.byte	0x2
-	.2byte	0x11d
-	.4byte	0x1e2c
-	.4byte	.LLST52
+	.2byte	0x147
+	.4byte	0x1e17
+	.4byte	.LLST46
 	.uleb128 0x55
-	.4byte	.LASF777
+	.4byte	.LASF776
 	.byte	0x2
-	.2byte	0x11d
-	.4byte	0x1e2c
-	.4byte	.LLST53
+	.2byte	0x147
+	.4byte	0x1e17
+	.4byte	.LLST47
 	.uleb128 0x2a
-	.4byte	.LASF779
+	.4byte	.LASF778
 	.byte	0x2
-	.2byte	0x11e
+	.2byte	0x148
 	.4byte	0xdc9
 	.uleb128 0x1
 	.byte	0x5d
 	.uleb128 0x55
-	.4byte	.LASF780
+	.4byte	.LASF779
 	.byte	0x2
-	.2byte	0x11f
+	.2byte	0x149
 	.4byte	0xdc9
-	.4byte	.LLST54
+	.4byte	.LLST48
 	.uleb128 0x55
-	.4byte	.LASF781
+	.4byte	.LASF780
 	.byte	0x2
-	.2byte	0x120
+	.2byte	0x14a
 	.4byte	0xdc9
-	.4byte	.LLST55
+	.4byte	.LLST49
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF782
+	.4byte	.LASF781
 	.byte	0x2
-	.byte	0xd8
+	.byte	0xf8
 	.4byte	0x5b
 	.8byte	.LFB246
 	.8byte	.LFE246-.LFB246
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6936
+	.4byte	0x692c
 	.uleb128 0x2e
-	.4byte	.LASF650
+	.4byte	.LASF649
 	.byte	0x2
-	.byte	0xd8
+	.byte	0xf8
 	.4byte	0xdc9
-	.4byte	.LLST41
+	.4byte	.LLST34
 	.uleb128 0x32
-	.4byte	.LASF653
+	.4byte	.LASF652
 	.byte	0x2
-	.byte	0xda
-	.4byte	0x1e2c
-	.4byte	.LLST42
+	.byte	0xfa
+	.4byte	0x1e17
+	.4byte	.LLST35
 	.uleb128 0x32
-	.4byte	.LASF777
+	.4byte	.LASF776
 	.byte	0x2
-	.byte	0xda
-	.4byte	0x1e2c
-	.4byte	.LLST43
+	.byte	0xfa
+	.4byte	0x1e17
+	.4byte	.LLST36
 	.uleb128 0x32
-	.4byte	.LASF783
+	.4byte	.LASF782
 	.byte	0x2
-	.byte	0xdb
+	.byte	0xfb
 	.4byte	0xdc9
-	.4byte	.LLST44
+	.4byte	.LLST37
 	.uleb128 0x32
-	.4byte	.LASF784
+	.4byte	.LASF783
 	.byte	0x2
-	.byte	0xdc
+	.byte	0xfc
 	.4byte	0xdc9
-	.4byte	.LLST45
+	.4byte	.LLST38
 	.uleb128 0x32
-	.4byte	.LASF768
+	.4byte	.LASF767
 	.byte	0x2
-	.byte	0xdd
+	.byte	0xfd
 	.4byte	0xdd4
-	.4byte	.LLST46
+	.4byte	.LLST39
 	.uleb128 0x32
-	.4byte	.LASF785
+	.4byte	.LASF784
 	.byte	0x2
-	.byte	0xde
+	.byte	0xfe
 	.4byte	0xdd4
-	.4byte	.LLST47
+	.4byte	.LLST40
 	.uleb128 0x32
-	.4byte	.LASF781
+	.4byte	.LASF780
 	.byte	0x2
-	.byte	0xdf
+	.byte	0xff
 	.4byte	0xdc9
-	.4byte	.LLST48
+	.4byte	.LLST41
+	.uleb128 0x55
+	.4byte	.LASF325
+	.byte	0x2
+	.2byte	0x100
+	.4byte	0xdc9
+	.4byte	.LLST42
 	.byte	0
 	.uleb128 0x65
-	.4byte	.LASF786
+	.4byte	.LASF785
 	.byte	0x2
-	.byte	0xb9
+	.byte	0xd9
 	.byte	0x1
-	.4byte	0x695b
+	.4byte	0x6951
 	.uleb128 0x38
-	.4byte	.LASF650
+	.4byte	.LASF649
 	.byte	0x2
-	.byte	0xb9
+	.byte	0xd9
 	.4byte	0xdc9
 	.uleb128 0x4f
-	.4byte	.LASF574
-	.4byte	0x6816
-	.4byte	.LASF786
+	.4byte	.LASF573
+	.4byte	0x67fc
+	.4byte	.LASF785
 	.byte	0
 	.uleb128 0x65
-	.4byte	.LASF787
+	.4byte	.LASF786
 	.byte	0x2
-	.byte	0xb2
+	.byte	0xd2
 	.byte	0x1
-	.4byte	0x6980
+	.4byte	0x6976
 	.uleb128 0x38
-	.4byte	.LASF650
+	.4byte	.LASF649
 	.byte	0x2
-	.byte	0xb2
+	.byte	0xd2
 	.4byte	0xdc9
 	.uleb128 0x4f
-	.4byte	.LASF574
-	.4byte	0x6816
-	.4byte	.LASF787
+	.4byte	.LASF573
+	.4byte	0x67fc
+	.4byte	.LASF786
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF788
+	.4byte	.LASF787
 	.byte	0x2
-	.byte	0xa4
+	.byte	0xb4
 	.4byte	0xdc9
 	.8byte	.LFB243
 	.8byte	.LFE243-.LFB243
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x69eb
+	.4byte	0x6a64
 	.uleb128 0x33
 	.string	"tmp"
 	.byte	0x2
-	.byte	0xa6
+	.byte	0xb6
 	.4byte	0xdc9
-	.4byte	.LLST39
-	.uleb128 0x63
-	.8byte	.LBB176
-	.8byte	.LBE176-.LBB176
-	.4byte	0x69d3
-	.uleb128 0x33
+	.4byte	.LLST191
+	.uleb128 0x3d
 	.string	"Q"
 	.byte	0x2
-	.byte	0xa9
-	.4byte	0x69eb
-	.4byte	.LLST40
-	.byte	0
+	.byte	0xb7
+	.4byte	0x6a64
+	.uleb128 0xa
+	.byte	0x3
+	.8byte	gSysFreeQueue
+	.byte	0x9f
 	.uleb128 0x66
-	.4byte	0x6bcd
-	.8byte	.LBB174
-	.8byte	.LBE174-.LBB174
+	.4byte	.LASF788
 	.byte	0x2
-	.byte	0xa8
+	.byte	0xb9
+	.8byte	.L464
+	.uleb128 0x40
+	.4byte	.Ldebug_ranges0+0x140
+	.4byte	0x6a12
+	.uleb128 0x32
+	.4byte	.LASF789
+	.byte	0x2
+	.byte	0xbf
+	.4byte	0xdc9
+	.4byte	.LLST192
+	.uleb128 0x34
+	.8byte	.LVL719
+	.4byte	0x6d33
+	.4byte	0x69f9
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL722
+	.4byte	0x270c
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x67
+	.4byte	0x6b8f
+	.8byte	.LBB246
+	.4byte	.Ldebug_ranges0+0x100
+	.byte	0x2
+	.byte	0xba
+	.uleb128 0x34
+	.8byte	.LVL726
+	.4byte	0xa94f
+	.4byte	0x6a49
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC82
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL728
+	.4byte	0xa94f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
 	.byte	0
 	.uleb128 0x8
 	.byte	0x8
 	.4byte	0x15a4
 	.uleb128 0x2d
-	.4byte	.LASF789
+	.4byte	.LASF790
 	.byte	0x2
-	.byte	0x92
+	.byte	0xa2
 	.4byte	0x5b
 	.8byte	.LFB242
 	.8byte	.LFE242-.LFB242
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6a65
+	.4byte	0x6ade
 	.uleb128 0x31
 	.string	"blk"
 	.byte	0x2
-	.byte	0x92
+	.byte	0xa2
 	.4byte	0xdc9
-	.4byte	.LLST36
+	.4byte	.LLST31
 	.uleb128 0x33
 	.string	"ret"
 	.byte	0x2
-	.byte	0x94
+	.byte	0xa4
 	.4byte	0x5b
-	.4byte	.LLST37
+	.4byte	.LLST32
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x2
-	.byte	0x95
+	.byte	0xa5
 	.4byte	0xdd4
-	.4byte	.LLST38
+	.4byte	.LLST33
 	.uleb128 0x3d
 	.string	"Q"
 	.byte	0x2
-	.byte	0x96
-	.4byte	0x69eb
+	.byte	0xa6
+	.4byte	0x6a64
 	.uleb128 0xa
 	.byte	0x3
 	.8byte	gSysFreeQueue
 	.byte	0x9f
 	.uleb128 0x67
-	.4byte	0x6bc1
-	.8byte	.LBB170
+	.4byte	0x6b83
+	.8byte	.LBB189
 	.4byte	.Ldebug_ranges0+0x30
 	.byte	0x2
-	.byte	0x98
+	.byte	0xa8
 	.byte	0
 	.uleb128 0x43
-	.4byte	.LASF790
+	.4byte	.LASF791
 	.byte	0x2
-	.byte	0x73
+	.byte	0x75
 	.8byte	.LFB241
 	.8byte	.LFE241-.LFB241
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6afa
-	.uleb128 0x33
-	.string	"i"
+	.4byte	0x6b48
+	.uleb128 0x2b
+	.4byte	.LASF325
 	.byte	0x2
-	.byte	0x75
-	.4byte	0xdc9
-	.4byte	.LLST30
-	.uleb128 0x33
-	.string	"tmp"
+	.byte	0x77
+	.4byte	0xddf
+	.uleb128 0x12
+	.byte	0x3
+	.8byte	g_sys_save_data+28
+	.byte	0x94
 	.byte	0x2
-	.byte	0x75
-	.4byte	0xdc9
-	.4byte	.LLST31
+	.byte	0x4f
+	.byte	0x1a
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
 	.uleb128 0x33
-	.string	"j"
-	.byte	0x2
-	.byte	0x75
-	.4byte	0xdc9
-	.4byte	.LLST32
-	.uleb128 0x32
-	.4byte	.LASF602
-	.byte	0x2
-	.byte	0x76
-	.4byte	0xdc9
-	.4byte	.LLST33
-	.uleb128 0x32
-	.4byte	.LASF791
+	.string	"i"
 	.byte	0x2
-	.byte	0x77
+	.byte	0x78
 	.4byte	0xdc9
-	.4byte	.LLST34
-	.uleb128 0x32
-	.4byte	.LASF792
+	.4byte	.LLST30
+	.uleb128 0x3d
+	.string	"blk"
 	.byte	0x2
 	.byte	0x78
-	.4byte	0xdd4
-	.4byte	.LLST35
+	.4byte	0xdc9
+	.uleb128 0x1
+	.byte	0x57
 	.uleb128 0x3d
 	.string	"Q"
 	.byte	0x2
 	.byte	0x79
-	.4byte	0x69eb
+	.4byte	0x6a64
 	.uleb128 0xa
 	.byte	0x3
 	.8byte	gSysFreeQueue
 	.byte	0x9f
-	.uleb128 0x45
-	.8byte	.LVL79
-	.4byte	0x6d71
 	.byte	0
-	.uleb128 0x43
-	.4byte	.LASF793
+	.uleb128 0x65
+	.4byte	.LASF792
 	.byte	0x2
 	.byte	0x61
-	.8byte	.LFB240
-	.8byte	.LFE240-.LFB240
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6bc1
-	.uleb128 0x31
+	.byte	0x1
+	.4byte	0x6b83
+	.uleb128 0x42
 	.string	"blk"
 	.byte	0x2
 	.byte	0x61
 	.4byte	0xdc9
-	.4byte	.LLST184
-	.uleb128 0x2e
-	.4byte	.LASF794
+	.uleb128 0x38
+	.4byte	.LASF793
 	.byte	0x2
 	.byte	0x61
 	.4byte	0xdc9
-	.4byte	.LLST185
-	.uleb128 0x63
-	.8byte	.LBB223
-	.8byte	.LBE223-.LBB223
-	.4byte	0x6ba9
-	.uleb128 0x33
+	.uleb128 0x50
+	.uleb128 0x39
 	.string	"Q"
 	.byte	0x2
-	.byte	0x64
-	.4byte	0x69eb
-	.4byte	.LLST186
-	.uleb128 0x68
-	.8byte	.LBB224
-	.8byte	.LBE224-.LBB224
-	.uleb128 0x32
-	.4byte	.LASF795
-	.byte	0x2
 	.byte	0x66
+	.4byte	0x6a64
+	.uleb128 0x50
+	.uleb128 0x3a
+	.4byte	.LASF789
+	.byte	0x2
+	.byte	0x68
 	.4byte	0xdc9
-	.4byte	.LLST187
-	.uleb128 0x34
-	.8byte	.LVL681
-	.4byte	0x6d71
-	.4byte	0x6b8f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL684
-	.4byte	0x2721
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x66
-	.4byte	0x6bc1
-	.8byte	.LBB221
-	.8byte	.LBE221-.LBB221
-	.byte	0x2
-	.byte	0x63
 	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF796
+	.uleb128 0x68
+	.4byte	.LASF794
 	.byte	0x2
 	.byte	0x5c
 	.4byte	0xdc9
 	.byte	0x1
-	.uleb128 0x69
-	.4byte	.LASF797
+	.uleb128 0x68
+	.4byte	.LASF795
 	.byte	0x2
 	.byte	0x57
 	.4byte	0xdc9
 	.byte	0x1
 	.uleb128 0x2d
-	.4byte	.LASF798
+	.4byte	.LASF796
 	.byte	0x2
 	.byte	0x4b
 	.4byte	0xdc9
@@ -35059,25 +35052,25 @@ __func__.7632:
 	.8byte	.LFE237-.LFB237
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6c45
+	.4byte	0x6c07
 	.uleb128 0x31
 	.string	"max"
 	.byte	0x2
 	.byte	0x4b
 	.4byte	0xdc9
-	.4byte	.LLST205
+	.4byte	.LLST204
 	.uleb128 0x3d
 	.string	"Q"
 	.byte	0x2
 	.byte	0x4d
-	.4byte	0x69eb
+	.4byte	0x6a64
 	.uleb128 0xa
 	.byte	0x3
 	.8byte	gSysFreeQueue
 	.byte	0x9f
 	.uleb128 0x36
-	.8byte	.LVL809
-	.4byte	0x259f
+	.8byte	.LVL811
+	.4byte	0x258a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35098,7 +35091,7 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF799
+	.4byte	.LASF797
 	.byte	0x2
 	.byte	0x2e
 	.4byte	0x5b
@@ -35106,19 +35099,19 @@ __func__.7632:
 	.8byte	.LFE236-.LFB236
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6d22
+	.4byte	0x6ce4
 	.uleb128 0x2e
 	.4byte	.LASF388
 	.byte	0x2
 	.byte	0x2e
 	.4byte	0xdd4
-	.4byte	.LLST163
+	.4byte	.LLST154
 	.uleb128 0x2e
-	.4byte	.LASF568
+	.4byte	.LASF567
 	.byte	0x2
 	.byte	0x2e
 	.4byte	0x5b
-	.4byte	.LLST164
+	.4byte	.LLST155
 	.uleb128 0x3d
 	.string	"req"
 	.byte	0x2
@@ -35132,37 +35125,37 @@ __func__.7632:
 	.byte	0x2
 	.byte	0x31
 	.4byte	0xdea
-	.4byte	.LLST165
+	.4byte	.LLST156
 	.uleb128 0x32
-	.4byte	.LASF800
+	.4byte	.LASF798
 	.byte	0x2
 	.byte	0x31
 	.4byte	0xdea
-	.4byte	.LLST166
+	.4byte	.LLST157
 	.uleb128 0x33
 	.string	"mid"
 	.byte	0x2
 	.byte	0x31
 	.4byte	0xdea
-	.4byte	.LLST167
+	.4byte	.LLST158
 	.uleb128 0x2b
-	.4byte	.LASF801
+	.4byte	.LASF799
 	.byte	0x2
 	.byte	0x32
-	.4byte	0x2711
+	.4byte	0x26fc
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -64
 	.uleb128 0x32
-	.4byte	.LASF802
+	.4byte	.LASF800
 	.byte	0x2
 	.byte	0x33
 	.4byte	0xdc9
-	.4byte	.LLST168
+	.4byte	.LLST159
 	.uleb128 0x34
-	.8byte	.LVL626
-	.4byte	0x29a4
-	.4byte	0x6d01
+	.8byte	.LVL603
+	.4byte	0x298f
+	.4byte	0x6cc3
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35182,8 +35175,8 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL635
-	.4byte	0x29a4
+	.8byte	.LVL612
+	.4byte	0x298f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35204,7 +35197,7 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF803
+	.4byte	.LASF801
 	.byte	0x2
 	.byte	0x1e
 	.4byte	0xdd4
@@ -35212,15 +35205,15 @@ __func__.7632:
 	.8byte	.LFE235-.LFB235
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6d71
+	.4byte	0x6d33
 	.uleb128 0x2e
-	.4byte	.LASF804
+	.4byte	.LASF802
 	.byte	0x2
 	.byte	0x1e
 	.4byte	0xdd4
 	.4byte	.LLST27
 	.uleb128 0x2e
-	.4byte	.LASF805
+	.4byte	.LASF803
 	.byte	0x2
 	.byte	0x1e
 	.4byte	0xdd4
@@ -35233,7 +35226,7 @@ __func__.7632:
 	.4byte	.LLST29
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF806
+	.4byte	.LASF804
 	.byte	0x2
 	.byte	0x14
 	.4byte	0xdc9
@@ -35241,22 +35234,22 @@ __func__.7632:
 	.8byte	.LFE234-.LFB234
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6db1
+	.4byte	0x6d73
 	.uleb128 0x2e
-	.4byte	.LASF597
+	.4byte	.LASF596
 	.byte	0x2
 	.byte	0x14
 	.4byte	0xdc9
 	.4byte	.LLST25
 	.uleb128 0x32
-	.4byte	.LASF718
+	.4byte	.LASF717
 	.byte	0x2
 	.byte	0x16
 	.4byte	0xdc9
 	.4byte	.LLST26
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF807
+	.4byte	.LASF805
 	.byte	0x2
 	.byte	0xc
 	.4byte	0xdc9
@@ -35264,15 +35257,15 @@ __func__.7632:
 	.8byte	.LFE233-.LFB233
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6e0c
+	.4byte	0x6dce
 	.uleb128 0x2e
-	.4byte	.LASF597
+	.4byte	.LASF596
 	.byte	0x2
 	.byte	0xc
 	.4byte	0xdc9
 	.4byte	.LLST24
 	.uleb128 0x2b
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x2
 	.byte	0xe
 	.4byte	0xdc9
@@ -35302,7 +35295,7 @@ __func__.7632:
 	.byte	0x9f
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF808
+	.4byte	.LASF806
 	.byte	0x2
 	.byte	0x4
 	.4byte	0xdc9
@@ -35310,29 +35303,29 @@ __func__.7632:
 	.8byte	.LFE232-.LFB232
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6e59
+	.4byte	0x6e1b
 	.uleb128 0x2e
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x2
 	.byte	0x4
 	.4byte	0xdc9
 	.4byte	.LLST22
 	.uleb128 0x5c
-	.4byte	.LASF718
+	.4byte	.LASF717
 	.byte	0x2
 	.byte	0x4
 	.4byte	0xdc9
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x32
-	.4byte	.LASF587
+	.4byte	.LASF586
 	.byte	0x2
 	.byte	0x6
 	.4byte	0xdc9
 	.4byte	.LLST23
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF809
+	.4byte	.LASF807
 	.byte	0x4
 	.2byte	0x13c
 	.4byte	0xddf
@@ -35340,45 +35333,45 @@ __func__.7632:
 	.8byte	.LFE231-.LFB231
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x70a4
+	.4byte	0x7066
 	.uleb128 0x54
 	.string	"die"
 	.byte	0x4
 	.2byte	0x13e
 	.4byte	0xdd4
-	.4byte	.LLST363
+	.4byte	.LLST362
 	.uleb128 0x54
 	.string	"blk"
 	.byte	0x4
 	.2byte	0x13f
 	.4byte	0xdc9
-	.4byte	.LLST364
+	.4byte	.LLST363
 	.uleb128 0x55
-	.4byte	.LASF577
+	.4byte	.LASF576
 	.byte	0x4
 	.2byte	0x140
 	.4byte	0xdd4
-	.4byte	.LLST365
+	.4byte	.LLST364
 	.uleb128 0x55
-	.4byte	.LASF810
+	.4byte	.LASF808
 	.byte	0x4
 	.2byte	0x142
-	.4byte	0x70a4
-	.4byte	.LLST366
+	.4byte	0x7066
+	.4byte	.LLST365
 	.uleb128 0x4e
-	.4byte	.LASF811
+	.4byte	.LASF809
 	.byte	0x4
 	.2byte	0x158
 	.uleb128 0x45
-	.8byte	.LVL1547
-	.4byte	0x72fe
+	.8byte	.LVL1549
+	.4byte	0x72c0
 	.uleb128 0x45
-	.8byte	.LVL1548
-	.4byte	0x70aa
+	.8byte	.LVL1550
+	.4byte	0x706c
 	.uleb128 0x34
-	.8byte	.LVL1554
-	.4byte	0x7560
-	.4byte	0x6ef5
+	.8byte	.LVL1556
+	.4byte	0x7522
+	.4byte	0x6eb7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35387,9 +35380,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1555
-	.4byte	0x26cd
-	.4byte	0x6f0d
+	.8byte	.LVL1557
+	.4byte	0x26b8
+	.4byte	0x6ecf
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35398,9 +35391,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1556
-	.4byte	0x75ef
-	.4byte	0x6f25
+	.8byte	.LVL1558
+	.4byte	0x75b1
+	.4byte	0x6ee7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35409,9 +35402,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1562
-	.4byte	0x29a4
-	.4byte	0x6f47
+	.8byte	.LVL1564
+	.4byte	0x298f
+	.4byte	0x6f09
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35430,12 +35423,12 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1563
-	.4byte	0x2527
-	.uleb128 0x34
 	.8byte	.LVL1565
-	.4byte	0x75ef
-	.4byte	0x6f6c
+	.4byte	0x2512
+	.uleb128 0x34
+	.8byte	.LVL1567
+	.4byte	0x75b1
+	.4byte	0x6f2e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35444,9 +35437,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1567
-	.4byte	0x2611
-	.4byte	0x6f84
+	.8byte	.LVL1569
+	.4byte	0x25fc
+	.4byte	0x6f46
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -35455,15 +35448,15 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1568
-	.4byte	0x74bc
-	.uleb128 0x45
 	.8byte	.LVL1570
-	.4byte	0x7560
+	.4byte	0x747e
+	.uleb128 0x45
+	.8byte	.LVL1572
+	.4byte	0x7522
 	.uleb128 0x34
-	.8byte	.LVL1571
-	.4byte	0x259f
-	.4byte	0x6fba
+	.8byte	.LVL1573
+	.4byte	0x258a
+	.4byte	0x6f7c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -35476,9 +35469,9 @@ __func__.7632:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1572
-	.4byte	0x259f
-	.4byte	0x6fd8
+	.8byte	.LVL1574
+	.4byte	0x258a
+	.4byte	0x6f9a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -35492,12 +35485,12 @@ __func__.7632:
 	.2byte	0x1000
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1574
-	.4byte	0x2527
+	.8byte	.LVL1576
+	.4byte	0x2512
 	.uleb128 0x34
-	.8byte	.LVL1575
-	.4byte	0x2721
-	.4byte	0x7007
+	.8byte	.LVL1577
+	.4byte	0x270c
+	.4byte	0x6fc9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35516,9 +35509,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1576
-	.4byte	0x27e7
-	.4byte	0x702e
+	.8byte	.LVL1578
+	.4byte	0x27d2
+	.4byte	0x6ff0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35542,9 +35535,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1577
-	.4byte	0x75ef
-	.4byte	0x7046
+	.8byte	.LVL1579
+	.4byte	0x75b1
+	.4byte	0x7008
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35553,12 +35546,12 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1583
-	.4byte	0x75ef
+	.8byte	.LVL1585
+	.4byte	0x75b1
 	.uleb128 0x34
-	.8byte	.LVL1587
-	.4byte	0x2721
-	.4byte	0x706f
+	.8byte	.LVL1589
+	.4byte	0x270c
+	.4byte	0x7031
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -35571,23 +35564,23 @@ __func__.7632:
 	.byte	0x32
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1588
-	.4byte	0x75ef
-	.uleb128 0x45
-	.8byte	.LVL1589
-	.4byte	0x75ef
-	.uleb128 0x45
 	.8byte	.LVL1590
-	.4byte	0x7342
+	.4byte	0x75b1
+	.uleb128 0x45
+	.8byte	.LVL1591
+	.4byte	0x75b1
 	.uleb128 0x45
 	.8byte	.LVL1592
-	.4byte	0x7342
+	.4byte	0x7304
+	.uleb128 0x45
+	.8byte	.LVL1594
+	.4byte	0x7304
 	.byte	0
 	.uleb128 0x8
 	.byte	0x8
 	.4byte	0x11c8
 	.uleb128 0x49
-	.4byte	.LASF812
+	.4byte	.LASF810
 	.byte	0x4
 	.2byte	0x116
 	.4byte	0x5b
@@ -35595,33 +35588,33 @@ __func__.7632:
 	.8byte	.LFE230-.LFB230
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7127
+	.4byte	0x70e9
 	.uleb128 0x54
 	.string	"die"
 	.byte	0x4
 	.2byte	0x118
 	.4byte	0xdd4
-	.4byte	.LLST160
+	.4byte	.LLST151
 	.uleb128 0x54
 	.string	"blk"
 	.byte	0x4
 	.2byte	0x119
 	.4byte	0xdc9
-	.4byte	.LLST161
+	.4byte	.LLST152
 	.uleb128 0x4c
-	.4byte	.LASF813
+	.4byte	.LASF811
 	.byte	0x4
 	.2byte	0x11a
 	.4byte	0xdd4
 	.uleb128 0x55
-	.4byte	.LASF810
+	.4byte	.LASF808
 	.byte	0x4
 	.2byte	0x11b
-	.4byte	0x70a4
-	.4byte	.LLST162
+	.4byte	0x7066
+	.4byte	.LLST153
 	.uleb128 0x36
-	.8byte	.LVL616
-	.4byte	0x29a4
+	.8byte	.LVL593
+	.4byte	0x298f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35641,7 +35634,7 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF814
+	.4byte	.LASF812
 	.byte	0x4
 	.byte	0xac
 	.4byte	0x5b
@@ -35649,44 +35642,44 @@ __func__.7632:
 	.8byte	.LFE229-.LFB229
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7295
+	.4byte	0x7257
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x4
 	.byte	0xae
 	.4byte	0xdd4
-	.4byte	.LLST359
+	.4byte	.LLST358
 	.uleb128 0x33
 	.string	"blk"
 	.byte	0x4
 	.byte	0xaf
 	.4byte	0xdc9
-	.4byte	.LLST360
+	.4byte	.LLST359
 	.uleb128 0x32
-	.4byte	.LASF706
+	.4byte	.LASF705
 	.byte	0x4
 	.byte	0xb0
 	.4byte	0xdea
-	.4byte	.LLST361
+	.4byte	.LLST360
 	.uleb128 0x32
-	.4byte	.LASF810
+	.4byte	.LASF808
 	.byte	0x4
 	.byte	0xb1
-	.4byte	0x70a4
-	.4byte	.LLST362
+	.4byte	0x7066
+	.4byte	.LLST361
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x72a5
+	.4byte	.LASF573
+	.4byte	0x7267
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6363
+	.8byte	__func__.6366
 	.uleb128 0x45
-	.8byte	.LVL1523
-	.4byte	0x72fe
-	.uleb128 0x34
 	.8byte	.LVL1525
-	.4byte	0x29a4
-	.4byte	0x71c4
+	.4byte	0x72c0
+	.uleb128 0x34
+	.8byte	.LVL1527
+	.4byte	0x298f
+	.4byte	0x7186
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35705,9 +35698,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1526
-	.4byte	0x29a4
-	.4byte	0x71e6
+	.8byte	.LVL1528
+	.4byte	0x298f
+	.4byte	0x71a8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35726,15 +35719,15 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1528
-	.4byte	0x29a4
-	.4byte	0x720f
+	.8byte	.LVL1530
+	.4byte	0x298f
+	.4byte	0x71d1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR108
+	.8byte	.LANCHOR106
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -35747,9 +35740,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1529
-	.4byte	0x6c45
-	.4byte	0x7226
+	.8byte	.LVL1531
+	.4byte	0x6c07
+	.4byte	0x71e8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -35757,9 +35750,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1531
-	.4byte	0xa94d
-	.4byte	0x7258
+	.8byte	.LVL1533
+	.4byte	0xa94f
+	.4byte	0x721a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35771,7 +35764,7 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR165
+	.8byte	.LANCHOR164
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
@@ -35780,12 +35773,12 @@ __func__.7632:
 	.byte	0xfe
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1532
-	.4byte	0x8b93
+	.8byte	.LVL1534
+	.4byte	0x8a94
 	.uleb128 0x34
-	.8byte	.LVL1540
-	.4byte	0x29a4
-	.4byte	0x7287
+	.8byte	.LVL1542
+	.4byte	0x298f
+	.4byte	0x7249
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35804,20 +35797,20 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1545
-	.4byte	0x2527
+	.8byte	.LVL1547
+	.4byte	0x2512
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x72a5
+	.4byte	0x7267
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0xa
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x7295
+	.4byte	0x7257
 	.uleb128 0x2d
-	.4byte	.LASF815
+	.4byte	.LASF813
 	.byte	0x4
 	.byte	0x9c
 	.4byte	0xdc9
@@ -35825,7 +35818,7 @@ __func__.7632:
 	.8byte	.LFE228-.LFB228
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x72fe
+	.4byte	0x72c0
 	.uleb128 0x33
 	.string	"blk"
 	.byte	0x4
@@ -35833,14 +35826,14 @@ __func__.7632:
 	.4byte	0xdc9
 	.4byte	.LLST20
 	.uleb128 0x32
-	.4byte	.LASF816
+	.4byte	.LASF814
 	.byte	0x4
 	.byte	0x9f
 	.4byte	0xdc9
 	.4byte	.LLST21
 	.uleb128 0x36
 	.8byte	.LVL53
-	.4byte	0x7560
+	.4byte	0x7522
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35850,17 +35843,17 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x43
-	.4byte	.LASF817
+	.4byte	.LASF815
 	.byte	0x4
 	.byte	0x94
 	.8byte	.LFB227
 	.8byte	.LFE227-.LFB227
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7342
+	.4byte	0x7304
 	.uleb128 0x2f
-	.8byte	.LVL806
-	.4byte	0x259f
+	.8byte	.LVL808
+	.4byte	0x258a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35881,7 +35874,7 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF818
+	.4byte	.LASF816
 	.byte	0x4
 	.byte	0x4f
 	.4byte	0x5b
@@ -35889,42 +35882,42 @@ __func__.7632:
 	.8byte	.LFE226-.LFB226
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x74bc
+	.4byte	0x747e
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x4
 	.byte	0x51
 	.4byte	0x5b
-	.4byte	.LLST308
+	.4byte	.LLST307
 	.uleb128 0x32
-	.4byte	.LASF819
+	.4byte	.LASF817
 	.byte	0x4
 	.byte	0x52
 	.4byte	0x5b
-	.4byte	.LLST309
+	.4byte	.LLST308
 	.uleb128 0x32
-	.4byte	.LASF810
+	.4byte	.LASF808
 	.byte	0x4
 	.byte	0x53
-	.4byte	0x70a4
-	.4byte	.LLST310
+	.4byte	0x7066
+	.4byte	.LLST309
 	.uleb128 0x32
-	.4byte	.LASF722
+	.4byte	.LASF721
 	.byte	0x4
 	.byte	0x54
 	.4byte	0xdc9
-	.4byte	.LLST311
+	.4byte	.LLST310
 	.uleb128 0x58
-	.4byte	.LASF820
+	.4byte	.LASF818
 	.byte	0x4
 	.byte	0x67
-	.uleb128 0x6a
-	.4byte	.LASF574
-	.4byte	0x299f
+	.uleb128 0x69
+	.4byte	.LASF573
+	.4byte	0x298a
 	.uleb128 0x34
-	.8byte	.LVL1245
-	.4byte	0x259f
-	.4byte	0x73c5
+	.8byte	.LVL1247
+	.4byte	0x258a
+	.4byte	0x7387
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -35933,9 +35926,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1248
-	.4byte	0x259f
-	.4byte	0x73e8
+	.8byte	.LVL1250
+	.4byte	0x258a
+	.4byte	0x73aa
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35955,9 +35948,9 @@ __func__.7632:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1250
-	.4byte	0xa94d
-	.4byte	0x7400
+	.8byte	.LVL1252
+	.4byte	0xa94f
+	.4byte	0x73c2
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35966,9 +35959,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1251
-	.4byte	0x27e7
-	.4byte	0x7427
+	.8byte	.LVL1253
+	.4byte	0x27d2
+	.4byte	0x73e9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35992,9 +35985,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1252
-	.4byte	0x2721
-	.4byte	0x7443
+	.8byte	.LVL1254
+	.4byte	0x270c
+	.4byte	0x7405
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -36007,9 +36000,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1253
-	.4byte	0x27e7
-	.4byte	0x746a
+	.8byte	.LVL1255
+	.4byte	0x27d2
+	.4byte	0x742c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36033,26 +36026,26 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1255
-	.4byte	0xa94d
-	.4byte	0x7489
+	.8byte	.LVL1257
+	.4byte	0xa94f
+	.4byte	0x744b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC95
+	.8byte	.LC98
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1256
-	.4byte	0xa94d
-	.4byte	0x74ae
+	.8byte	.LVL1258
+	.4byte	0xa94f
+	.4byte	0x7470
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC96
+	.8byte	.LC99
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
@@ -36061,45 +36054,45 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1259
-	.4byte	0x2527
+	.8byte	.LVL1261
+	.4byte	0x2512
 	.byte	0
 	.uleb128 0x43
-	.4byte	.LASF821
+	.4byte	.LASF819
 	.byte	0x4
 	.byte	0x41
 	.8byte	.LFB225
 	.8byte	.LFE225-.LFB225
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7558
+	.4byte	0x751a
 	.uleb128 0x2e
-	.4byte	.LASF754
+	.4byte	.LASF753
 	.byte	0x4
 	.byte	0x41
 	.4byte	0x10f8
-	.4byte	.LLST203
+	.4byte	.LLST202
 	.uleb128 0x2e
-	.4byte	.LASF822
+	.4byte	.LASF820
 	.byte	0x4
 	.byte	0x41
 	.4byte	0x1001
-	.4byte	.LLST204
+	.4byte	.LLST203
 	.uleb128 0x39
 	.string	"i"
 	.byte	0x4
 	.byte	0x43
 	.4byte	0xdd4
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x4258
+	.4byte	.LASF573
+	.4byte	0x4239
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6320
+	.8byte	__func__.6323
 	.uleb128 0x34
-	.8byte	.LVL802
-	.4byte	0x259f
-	.4byte	0x7530
+	.8byte	.LVL804
+	.4byte	0x258a
+	.4byte	0x74f2
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36113,8 +36106,8 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL803
-	.4byte	0xa94d
+	.8byte	.LVL805
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36135,13 +36128,13 @@ __func__.7632:
 	.byte	0x4a
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
-	.4byte	.LASF823
+	.uleb128 0x6a
+	.4byte	.LASF821
 	.byte	0x4
 	.byte	0x26
 	.byte	0x1
 	.uleb128 0x2d
-	.4byte	.LASF824
+	.4byte	.LASF822
 	.byte	0x4
 	.byte	0x17
 	.4byte	0x5b
@@ -36149,7 +36142,7 @@ __func__.7632:
 	.8byte	.LFE223-.LFB223
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x75ef
+	.4byte	0x75b1
 	.uleb128 0x2e
 	.4byte	.LASF388
 	.byte	0x4
@@ -36169,7 +36162,7 @@ __func__.7632:
 	.4byte	0xdd4
 	.4byte	.LLST18
 	.uleb128 0x2b
-	.4byte	.LASF822
+	.4byte	.LASF820
 	.byte	0x4
 	.byte	0x1b
 	.4byte	0x1001
@@ -36199,14 +36192,14 @@ __func__.7632:
 	.8byte	gBbtInfo
 	.byte	0x22
 	.uleb128 0x32
-	.4byte	.LASF582
+	.4byte	.LASF581
 	.byte	0x4
 	.byte	0x1c
 	.4byte	0xdc9
 	.4byte	.LLST19
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF825
+	.4byte	.LASF823
 	.byte	0x4
 	.byte	0x4
 	.4byte	0x5b
@@ -36214,7 +36207,7 @@ __func__.7632:
 	.8byte	.LFE222-.LFB222
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7673
+	.4byte	0x7635
 	.uleb128 0x2e
 	.4byte	.LASF388
 	.byte	0x4
@@ -36228,20 +36221,20 @@ __func__.7632:
 	.4byte	0xdd4
 	.4byte	.LLST13
 	.uleb128 0x32
-	.4byte	.LASF822
+	.4byte	.LASF820
 	.byte	0x4
 	.byte	0x7
 	.4byte	0x1001
 	.4byte	.LLST14
 	.uleb128 0x32
-	.4byte	.LASF582
+	.4byte	.LASF581
 	.byte	0x4
 	.byte	0x8
 	.4byte	0xdc9
 	.4byte	.LLST15
 	.uleb128 0x36
 	.8byte	.LVL44
-	.4byte	0xa94d
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36260,46 +36253,46 @@ __func__.7632:
 	.byte	0x1a
 	.byte	0
 	.byte	0
-	.uleb128 0x6c
-	.4byte	.LASF887
+	.uleb128 0x6b
+	.4byte	.LASF885
 	.byte	0x3
-	.2byte	0x4bd
+	.2byte	0x499
 	.4byte	0xdd4
 	.8byte	.LFB221
 	.8byte	.LFE221-.LFB221
 	.uleb128 0x1
 	.byte	0x9c
 	.uleb128 0x49
-	.4byte	.LASF826
+	.4byte	.LASF824
 	.byte	0x3
-	.2byte	0x4b8
+	.2byte	0x494
 	.4byte	0x5b
 	.8byte	.LFB220
 	.8byte	.LFE220-.LFB220
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x770c
+	.4byte	0x76ce
 	.uleb128 0x53
 	.4byte	.LASF236
 	.byte	0x3
-	.2byte	0x4b8
+	.2byte	0x494
 	.4byte	0xb9
-	.4byte	.LLST460
+	.4byte	.LLST459
 	.uleb128 0x53
 	.4byte	.LASF325
 	.byte	0x3
-	.2byte	0x4b8
+	.2byte	0x494
 	.4byte	0xb9
-	.4byte	.LLST461
+	.4byte	.LLST460
 	.uleb128 0x5d
 	.string	"buf"
 	.byte	0x3
-	.2byte	0x4b8
-	.4byte	0x770c
-	.4byte	.LLST462
+	.2byte	0x494
+	.4byte	0x76ce
+	.4byte	.LLST461
 	.uleb128 0x2f
-	.8byte	.LVL2074
-	.4byte	0x78b7
+	.8byte	.LVL2054
+	.4byte	0x786c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36332,36 +36325,36 @@ __func__.7632:
 	.byte	0x8
 	.4byte	0x94
 	.uleb128 0x49
-	.4byte	.LASF827
+	.4byte	.LASF825
 	.byte	0x3
-	.2byte	0x4b3
+	.2byte	0x48f
 	.4byte	0x5b
 	.8byte	.LFB219
 	.8byte	.LFE219-.LFB219
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x778d
+	.4byte	0x774f
 	.uleb128 0x53
 	.4byte	.LASF236
 	.byte	0x3
-	.2byte	0x4b3
+	.2byte	0x48f
 	.4byte	0xb9
-	.4byte	.LLST442
+	.4byte	.LLST441
 	.uleb128 0x53
 	.4byte	.LASF325
 	.byte	0x3
-	.2byte	0x4b3
+	.2byte	0x48f
 	.4byte	0xb9
-	.4byte	.LLST443
+	.4byte	.LLST442
 	.uleb128 0x5d
 	.string	"buf"
 	.byte	0x3
-	.2byte	0x4b3
-	.4byte	0x770c
-	.4byte	.LLST444
+	.2byte	0x48f
+	.4byte	0x76ce
+	.4byte	.LLST443
 	.uleb128 0x2f
-	.8byte	.LVL1984
-	.4byte	0x7fdd
+	.8byte	.LVL1980
+	.4byte	0x7ef8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36391,85 +36384,82 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF828
+	.4byte	.LASF826
 	.byte	0x3
-	.2byte	0x484
+	.2byte	0x460
 	.4byte	0x5b
 	.8byte	.LFB218
 	.8byte	.LFE218-.LFB218
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x78b7
+	.4byte	0x786c
 	.uleb128 0x53
-	.4byte	.LASF732
+	.4byte	.LASF731
 	.byte	0x3
-	.2byte	0x484
+	.2byte	0x460
 	.4byte	0xdd4
-	.4byte	.LLST400
+	.4byte	.LLST387
 	.uleb128 0x53
-	.4byte	.LASF733
+	.4byte	.LASF732
 	.byte	0x3
-	.2byte	0x484
+	.2byte	0x460
 	.4byte	0xdd4
-	.4byte	.LLST401
+	.4byte	.LLST388
 	.uleb128 0x55
-	.4byte	.LASF735
+	.4byte	.LASF734
 	.byte	0x3
-	.2byte	0x486
+	.2byte	0x462
 	.4byte	0xdc9
-	.4byte	.LLST402
+	.4byte	.LLST389
 	.uleb128 0x54
 	.string	"tmp"
 	.byte	0x3
-	.2byte	0x487
+	.2byte	0x463
 	.4byte	0xdc9
-	.4byte	.LLST403
+	.4byte	.LLST390
 	.uleb128 0x54
 	.string	"lpa"
 	.byte	0x3
-	.2byte	0x488
+	.2byte	0x464
 	.4byte	0xdd4
-	.4byte	.LLST404
+	.4byte	.LLST391
 	.uleb128 0x2a
-	.4byte	.LASF664
+	.4byte	.LASF663
 	.byte	0x3
-	.2byte	0x489
+	.2byte	0x465
 	.4byte	0xdd4
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -8
 	.uleb128 0x2a
-	.4byte	.LASF641
+	.4byte	.LASF640
 	.byte	0x3
-	.2byte	0x489
+	.2byte	0x465
 	.4byte	0xdd4
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -4
 	.uleb128 0x55
-	.4byte	.LASF630
+	.4byte	.LASF629
 	.byte	0x3
-	.2byte	0x48a
+	.2byte	0x466
 	.4byte	0xdc9
-	.4byte	.LLST405
-	.uleb128 0x45
-	.8byte	.LVL1746
-	.4byte	0x7d59
+	.4byte	.LLST392
 	.uleb128 0x45
-	.8byte	.LVL1755
-	.4byte	0x5d63
+	.8byte	.LVL1702
+	.4byte	0x5d49
 	.uleb128 0x45
-	.8byte	.LVL1756
-	.4byte	0x5694
+	.8byte	.LVL1703
+	.4byte	0x567a
 	.uleb128 0x34
-	.8byte	.LVL1757
-	.4byte	0x5c36
-	.4byte	0x7878
+	.8byte	.LVL1704
+	.4byte	0x5c1c
+	.4byte	0x782d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x85
+	.byte	0x84
 	.sleb128 0
 	.uleb128 0x30
 	.uleb128 0x1
@@ -36484,14 +36474,14 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1758
-	.4byte	0x5c36
-	.4byte	0x789c
+	.8byte	.LVL1705
+	.4byte	0x5c1c
+	.4byte	0x7851
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x85
+	.byte	0x84
 	.sleb128 0
 	.uleb128 0x30
 	.uleb128 0x1
@@ -36506,74 +36496,74 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1759
-	.4byte	0x6d71
+	.8byte	.LVL1706
+	.4byte	0x6d33
 	.uleb128 0x45
-	.8byte	.LVL1760
-	.4byte	0x36c0
+	.8byte	.LVL1707
+	.4byte	0x3691
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF829
+	.4byte	.LASF827
 	.byte	0x3
-	.2byte	0x3c1
+	.2byte	0x3bd
 	.4byte	0x5b
 	.8byte	.LFB217
 	.8byte	.LFE217-.LFB217
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7d59
+	.4byte	0x7ca2
 	.uleb128 0x5d
 	.string	"LUN"
 	.byte	0x3
-	.2byte	0x3c1
+	.2byte	0x3bd
 	.4byte	0xdbe
+	.4byte	.LLST444
+	.uleb128 0x53
+	.4byte	.LASF731
+	.byte	0x3
+	.2byte	0x3bd
+	.4byte	0xdd4
 	.4byte	.LLST445
 	.uleb128 0x53
 	.4byte	.LASF732
 	.byte	0x3
-	.2byte	0x3c1
+	.2byte	0x3bd
 	.4byte	0xdd4
 	.4byte	.LLST446
 	.uleb128 0x53
 	.4byte	.LASF733
 	.byte	0x3
-	.2byte	0x3c1
-	.4byte	0xdd4
+	.2byte	0x3bd
+	.4byte	0x5ad8
 	.4byte	.LLST447
-	.uleb128 0x53
-	.4byte	.LASF734
-	.byte	0x3
-	.2byte	0x3c1
-	.4byte	0x5af2
-	.4byte	.LLST448
 	.uleb128 0x55
-	.4byte	.LASF599
+	.4byte	.LASF598
 	.byte	0x3
-	.2byte	0x3c3
-	.4byte	0x2dff
-	.4byte	.LLST449
+	.2byte	0x3bf
+	.4byte	0x2dea
+	.4byte	.LLST448
 	.uleb128 0x54
 	.string	"lpa"
 	.byte	0x3
-	.2byte	0x3c4
+	.2byte	0x3c0
 	.4byte	0xdd4
-	.4byte	.LLST450
+	.4byte	.LLST449
 	.uleb128 0x55
-	.4byte	.LASF830
+	.4byte	.LASF828
 	.byte	0x3
-	.2byte	0x3c4
+	.2byte	0x3c0
 	.4byte	0xdd4
-	.4byte	.LLST451
+	.4byte	.LLST450
 	.uleb128 0x55
-	.4byte	.LASF831
+	.4byte	.LASF829
 	.byte	0x3
-	.2byte	0x3c4
+	.2byte	0x3c0
 	.4byte	0xdd4
-	.4byte	.LLST452
+	.4byte	.LLST451
 	.uleb128 0x2a
-	.4byte	.LASF664
+	.4byte	.LASF663
 	.byte	0x3
-	.2byte	0x3c5
+	.2byte	0x3c1
 	.4byte	0xdd4
 	.uleb128 0x2
 	.byte	0x91
@@ -36581,66 +36571,66 @@ __func__.7632:
 	.uleb128 0x54
 	.string	"ppa"
 	.byte	0x3
-	.2byte	0x3c5
+	.2byte	0x3c1
 	.4byte	0xdd4
-	.4byte	.LLST453
+	.4byte	.LLST452
 	.uleb128 0x54
 	.string	"i"
 	.byte	0x3
-	.2byte	0x3c6
+	.2byte	0x3c2
+	.4byte	0xdd4
+	.4byte	.LLST453
+	.uleb128 0x55
+	.4byte	.LASF830
+	.byte	0x3
+	.2byte	0x3c2
 	.4byte	0xdd4
 	.4byte	.LLST454
 	.uleb128 0x55
-	.4byte	.LASF832
+	.4byte	.LASF595
 	.byte	0x3
-	.2byte	0x3c6
+	.2byte	0x3c2
 	.4byte	0xdd4
 	.4byte	.LLST455
 	.uleb128 0x55
-	.4byte	.LASF596
+	.4byte	.LASF831
 	.byte	0x3
-	.2byte	0x3c6
+	.2byte	0x3c3
 	.4byte	0xdd4
 	.4byte	.LLST456
 	.uleb128 0x55
-	.4byte	.LASF833
+	.4byte	.LASF832
 	.byte	0x3
-	.2byte	0x3c7
+	.2byte	0x3c3
 	.4byte	0xdd4
 	.4byte	.LLST457
 	.uleb128 0x55
-	.4byte	.LASF834
+	.4byte	.LASF639
 	.byte	0x3
-	.2byte	0x3c7
-	.4byte	0xdd4
+	.2byte	0x3c4
+	.4byte	0x1eef
 	.4byte	.LLST458
-	.uleb128 0x55
-	.4byte	.LASF640
-	.byte	0x3
-	.2byte	0x3c8
-	.4byte	0x1f04
-	.4byte	.LLST459
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x5d5e
+	.4byte	.LASF573
+	.4byte	0x5d44
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6256
+	.8byte	__func__.6259
 	.uleb128 0x40
-	.4byte	.Ldebug_ranges0+0x300
-	.4byte	0x7a79
+	.4byte	.Ldebug_ranges0+0x390
+	.4byte	0x7a2e
 	.uleb128 0x2a
-	.4byte	.LASF604
+	.4byte	.LASF603
 	.byte	0x3
-	.2byte	0x43d
+	.2byte	0x425
 	.4byte	0xdf5
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -32
 	.uleb128 0x34
-	.8byte	.LVL2061
-	.4byte	0x29a4
-	.4byte	0x7a24
+	.8byte	.LVL2034
+	.4byte	0x298f
+	.4byte	0x79d9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36659,15 +36649,15 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2063
-	.4byte	0xa94d
-	.4byte	0x7a49
+	.8byte	.LVL2036
+	.4byte	0xa94f
+	.4byte	0x79fe
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC105
+	.8byte	.LC108
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
@@ -36676,8 +36666,8 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL2064
-	.4byte	0xa94d
+	.8byte	.LVL2037
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36689,45 +36679,44 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR180
+	.8byte	.LANCHOR178
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x44a
+	.2byte	0x432
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1989
-	.4byte	0x5af8
-	.4byte	0x7a9e
+	.8byte	.LVL1985
+	.4byte	0x5ade
+	.4byte	0x7a56
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x3
-	.byte	0x86
+	.byte	0x85
 	.sleb128 256
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
+	.uleb128 0x5
+	.byte	0x8f
+	.sleb128 352
+	.byte	0x94
+	.byte	0x4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
-	.byte	0x89
+	.byte	0x8a
 	.sleb128 0
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL2000
-	.4byte	0x7d59
 	.uleb128 0x34
-	.8byte	.LVL2002
-	.4byte	0x2d32
-	.4byte	0x7ace
+	.8byte	.LVL1996
+	.4byte	0x2d1d
+	.4byte	0x7a76
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36736,82 +36725,16 @@ __func__.7632:
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x8
+	.uleb128 0x5
 	.byte	0x8f
-	.sleb128 344
+	.sleb128 328
 	.byte	0x94
 	.byte	0x4
-	.byte	0x85
-	.sleb128 0
-	.byte	0x1c
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2007
-	.4byte	0x6644
-	.4byte	0x7ae5
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL2008
-	.4byte	0x2f73
 	.uleb128 0x34
-	.8byte	.LVL2009
-	.4byte	0x2d32
-	.4byte	0x7b0e
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2010
-	.4byte	0x2d32
-	.4byte	0x7b2a
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2016
-	.4byte	0x2527
-	.4byte	0x7b48
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x89
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL2023
-	.4byte	0x7d59
-	.uleb128 0x34
-	.8byte	.LVL2025
-	.4byte	0xa94d
-	.4byte	0x7b88
+	.8byte	.LVL1999
+	.4byte	0xa94f
+	.4byte	0x7aa9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36823,21 +36746,18 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR180
+	.8byte	.LANCHOR178
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x3f4
+	.2byte	0x3dc
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL2026
-	.4byte	0x7d59
 	.uleb128 0x34
-	.8byte	.LVL2027
-	.4byte	0x3932
-	.4byte	0x7bb4
+	.8byte	.LVL2000
+	.4byte	0x3903
+	.4byte	0x7ac8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36846,9 +36766,9 @@ __func__.7632:
 	.8byte	.LANCHOR52
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2029
-	.4byte	0x3932
-	.4byte	0x7bcc
+	.8byte	.LVL2002
+	.4byte	0x3903
+	.4byte	0x7ae0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36857,9 +36777,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2031
-	.4byte	0x3932
-	.4byte	0x7be4
+	.8byte	.LVL2004
+	.4byte	0x3903
+	.4byte	0x7af8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36868,9 +36788,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2034
-	.4byte	0xa94d
-	.4byte	0x7c17
+	.8byte	.LVL2007
+	.4byte	0xa94f
+	.4byte	0x7b2b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36882,23 +36802,23 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR180
+	.8byte	.LANCHOR178
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x415
+	.2byte	0x3fd
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2037
-	.4byte	0x7d94
-	.4byte	0x7c3a
+	.8byte	.LVL2010
+	.4byte	0x7caf
+	.4byte	0x7b4e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x8b
+	.byte	0x87
 	.sleb128 0
 	.uleb128 0x30
 	.uleb128 0x1
@@ -36913,9 +36833,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2038
-	.4byte	0xa94d
-	.4byte	0x7c6d
+	.8byte	.LVL2011
+	.4byte	0xa94f
+	.4byte	0x7b81
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36927,18 +36847,18 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR180
+	.8byte	.LANCHOR178
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x46e
+	.2byte	0x44a
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2041
-	.4byte	0x3932
-	.4byte	0x7c85
+	.8byte	.LVL2014
+	.4byte	0x3903
+	.4byte	0x7b99
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36947,9 +36867,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2044
-	.4byte	0x5c36
-	.4byte	0x7ca9
+	.8byte	.LVL2017
+	.4byte	0x5c1c
+	.4byte	0x7bbd
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36969,9 +36889,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2045
-	.4byte	0x3804
-	.4byte	0x7cc1
+	.8byte	.LVL2018
+	.4byte	0x37d5
+	.4byte	0x7bd5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36980,14 +36900,14 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2049
-	.4byte	0x259f
-	.4byte	0x7cde
+	.8byte	.LVL2022
+	.4byte	0x258a
+	.4byte	0x7bf2
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x8b
+	.byte	0x87
 	.sleb128 0
 	.uleb128 0x30
 	.uleb128 0x1
@@ -36996,9 +36916,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2054
-	.4byte	0xa94d
-	.4byte	0x7d11
+	.8byte	.LVL2027
+	.4byte	0xa94f
+	.4byte	0x7c25
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37010,107 +36930,109 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR180
+	.8byte	.LANCHOR178
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x45f
+	.2byte	0x441
 	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL2035
+	.4byte	0x2512
 	.uleb128 0x34
-	.8byte	.LVL2062
-	.4byte	0x2527
-	.4byte	0x7d34
+	.8byte	.LVL2039
+	.4byte	0x258a
+	.4byte	0x7c49
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x2
-	.byte	0x89
-	.sleb128 0
-	.uleb128 0x30
 	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x7
-	.byte	0x8f
-	.sleb128 348
-	.byte	0x94
-	.byte	0x4
-	.byte	0x39
-	.byte	0x24
+	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2066
-	.4byte	0x259f
-	.4byte	0x7d4b
+	.8byte	.LVL2045
+	.4byte	0x662a
+	.4byte	0x7c60
 	.uleb128 0x30
 	.uleb128 0x1
-	.byte	0x51
+	.byte	0x50
 	.uleb128 0x1
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2067
-	.4byte	0x2527
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF835
-	.byte	0x3
-	.2byte	0x3b7
-	.4byte	0x5b
-	.8byte	.LFB216
-	.8byte	.LFE216-.LFB216
+	.8byte	.LVL2046
+	.4byte	0x2f5e
+	.uleb128 0x34
+	.8byte	.LVL2047
+	.4byte	0x2d1d
+	.4byte	0x7c89
+	.uleb128 0x30
 	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7d94
-	.uleb128 0x36
-	.8byte	.LVL1734
-	.4byte	0x7d94
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x1
 	.byte	0x31
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL2048
+	.4byte	0x2d1d
 	.uleb128 0x30
 	.uleb128 0x1
-	.byte	0x52
+	.byte	0x50
 	.uleb128 0x1
 	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
 	.byte	0
 	.byte	0
+	.uleb128 0x52
+	.4byte	.LASF833
+	.byte	0x3
+	.2byte	0x3b7
+	.4byte	0x5b
+	.byte	0x1
 	.uleb128 0x5f
-	.4byte	.LASF836
+	.4byte	.LASF834
 	.byte	0x3
 	.2byte	0x387
 	.8byte	.LFB215
 	.8byte	.LFE215-.LFB215
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7fc8
+	.4byte	0x7ee3
 	.uleb128 0x5d
 	.string	"req"
 	.byte	0x3
 	.2byte	0x387
 	.4byte	0x1abc
-	.4byte	.LLST393
+	.4byte	.LLST398
 	.uleb128 0x53
-	.4byte	.LASF596
+	.4byte	.LASF595
 	.byte	0x3
 	.2byte	0x387
 	.4byte	0xdd4
-	.4byte	.LLST394
+	.4byte	.LLST399
 	.uleb128 0x53
-	.4byte	.LASF837
+	.4byte	.LASF835
 	.byte	0x3
 	.2byte	0x387
 	.4byte	0xdd4
-	.4byte	.LLST395
+	.4byte	.LLST400
 	.uleb128 0x53
-	.4byte	.LASF640
+	.4byte	.LASF639
 	.byte	0x3
 	.2byte	0x387
-	.4byte	0x1f04
-	.4byte	.LLST396
+	.4byte	0x1eef
+	.4byte	.LLST401
 	.uleb128 0x4d
 	.string	"i"
 	.byte	0x3
@@ -37125,39 +37047,39 @@ __func__.7632:
 	.byte	0x91
 	.sleb128 -4
 	.uleb128 0x55
-	.4byte	.LASF664
+	.4byte	.LASF663
 	.byte	0x3
 	.2byte	0x38a
 	.4byte	0xdd4
-	.4byte	.LLST397
+	.4byte	.LLST402
 	.uleb128 0x55
-	.4byte	.LASF624
+	.4byte	.LASF623
 	.byte	0x3
 	.2byte	0x38b
 	.4byte	0xdc9
-	.4byte	.LLST398
+	.4byte	.LLST403
 	.uleb128 0x55
-	.4byte	.LASF599
+	.4byte	.LASF598
 	.byte	0x3
 	.2byte	0x38c
-	.4byte	0x2dff
-	.4byte	.LLST399
+	.4byte	0x2dea
+	.4byte	.LLST404
 	.uleb128 0x61
-	.4byte	.LASF688
+	.4byte	.LASF687
 	.byte	0x3
 	.2byte	0x38d
 	.4byte	0xdd4
 	.byte	0
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x7fd8
+	.4byte	.LASF573
+	.4byte	0x7ef3
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6228
+	.8byte	__func__.6231
 	.uleb128 0x34
-	.8byte	.LVL1717
-	.4byte	0x27e7
-	.4byte	0x7e7f
+	.8byte	.LVL1746
+	.4byte	0x27d2
+	.4byte	0x7d9a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37178,12 +37100,12 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1718
-	.4byte	0x6d71
+	.8byte	.LVL1747
+	.4byte	0x6d33
 	.uleb128 0x34
-	.8byte	.LVL1720
-	.4byte	0x3932
-	.4byte	0x7ea4
+	.8byte	.LVL1749
+	.4byte	0x3903
+	.4byte	0x7dbf
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37192,12 +37114,12 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1721
-	.4byte	0x2ed1
+	.8byte	.LVL1750
+	.4byte	0x2ebc
 	.uleb128 0x34
-	.8byte	.LVL1722
-	.4byte	0x3804
-	.4byte	0x7ec9
+	.8byte	.LVL1751
+	.4byte	0x37d5
+	.4byte	0x7de4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37206,9 +37128,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1723
-	.4byte	0x27e7
-	.4byte	0x7eeb
+	.8byte	.LVL1752
+	.4byte	0x27d2
+	.4byte	0x7e06
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37227,9 +37149,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1724
-	.4byte	0xa94d
-	.4byte	0x7f1e
+	.8byte	.LVL1753
+	.4byte	0xa94f
+	.4byte	0x7e39
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37250,9 +37172,9 @@ __func__.7632:
 	.2byte	0x3a5
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1725
-	.4byte	0x5c36
-	.4byte	0x7f3c
+	.8byte	.LVL1754
+	.4byte	0x5c1c
+	.4byte	0x7e57
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37266,9 +37188,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1727
-	.4byte	0x6d71
-	.4byte	0x7f56
+	.8byte	.LVL1756
+	.4byte	0x6d33
+	.4byte	0x7e71
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37279,15 +37201,15 @@ __func__.7632:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1729
-	.4byte	0xa94d
-	.4byte	0x7f80
+	.8byte	.LVL1758
+	.4byte	0xa94f
+	.4byte	0x7e9b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC103
+	.8byte	.LC106
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37301,9 +37223,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1730
-	.4byte	0x36c0
-	.4byte	0x7f98
+	.8byte	.LVL1759
+	.4byte	0x3691
+	.4byte	0x7eb3
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37312,8 +37234,8 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1732
-	.4byte	0xa94d
+	.8byte	.LVL1761
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37336,15 +37258,15 @@ __func__.7632:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x7fd8
+	.4byte	0x7ef3
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0xc
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x7fc8
+	.4byte	0x7ee3
 	.uleb128 0x49
-	.4byte	.LASF838
+	.4byte	.LASF836
 	.byte	0x3
 	.2byte	0x32d
 	.4byte	0x5b
@@ -37352,12 +37274,18 @@ __func__.7632:
 	.8byte	.LFE214-.LFB214
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8203
+	.4byte	0x8111
 	.uleb128 0x5d
 	.string	"LUN"
 	.byte	0x3
 	.2byte	0x32d
 	.4byte	0xdbe
+	.4byte	.LLST424
+	.uleb128 0x53
+	.4byte	.LASF731
+	.byte	0x3
+	.2byte	0x32d
+	.4byte	0xdd4
 	.4byte	.LLST425
 	.uleb128 0x53
 	.4byte	.LASF732
@@ -37369,44 +37297,38 @@ __func__.7632:
 	.4byte	.LASF733
 	.byte	0x3
 	.2byte	0x32d
-	.4byte	0xdd4
+	.4byte	0x5ad8
 	.4byte	.LLST427
-	.uleb128 0x53
-	.4byte	.LASF734
-	.byte	0x3
-	.2byte	0x32d
-	.4byte	0x5af2
-	.4byte	.LLST428
 	.uleb128 0x54
 	.string	"ret"
 	.byte	0x3
 	.2byte	0x32f
 	.4byte	0x5b
-	.4byte	.LLST429
+	.4byte	.LLST428
 	.uleb128 0x55
-	.4byte	.LASF830
+	.4byte	.LASF828
 	.byte	0x3
 	.2byte	0x330
 	.4byte	0xdd4
-	.4byte	.LLST430
+	.4byte	.LLST429
 	.uleb128 0x55
-	.4byte	.LASF831
+	.4byte	.LASF829
 	.byte	0x3
 	.2byte	0x330
 	.4byte	0xdd4
-	.4byte	.LLST431
+	.4byte	.LLST430
 	.uleb128 0x55
-	.4byte	.LASF839
+	.4byte	.LASF837
 	.byte	0x3
 	.2byte	0x330
 	.4byte	0xdd4
-	.4byte	.LLST432
+	.4byte	.LLST431
 	.uleb128 0x54
 	.string	"lpa"
 	.byte	0x3
 	.2byte	0x331
 	.4byte	0xdd4
-	.4byte	.LLST433
+	.4byte	.LLST432
 	.uleb128 0x60
 	.string	"ppa"
 	.byte	0x3
@@ -37420,64 +37342,64 @@ __func__.7632:
 	.byte	0x3
 	.2byte	0x333
 	.4byte	0xdd4
-	.4byte	.LLST434
+	.4byte	.LLST433
 	.uleb128 0x55
-	.4byte	.LASF596
+	.4byte	.LASF595
 	.byte	0x3
 	.2byte	0x333
 	.4byte	0xdd4
-	.4byte	.LLST435
+	.4byte	.LLST434
 	.uleb128 0x55
-	.4byte	.LASF832
+	.4byte	.LASF830
 	.byte	0x3
 	.2byte	0x333
 	.4byte	0xdd4
-	.4byte	.LLST436
+	.4byte	.LLST435
 	.uleb128 0x55
-	.4byte	.LASF840
+	.4byte	.LASF838
 	.byte	0x3
 	.2byte	0x334
 	.4byte	0xdd4
-	.4byte	.LLST437
+	.4byte	.LLST436
 	.uleb128 0x55
-	.4byte	.LASF841
+	.4byte	.LASF839
 	.byte	0x3
 	.2byte	0x334
 	.4byte	0xdd4
-	.4byte	.LLST438
+	.4byte	.LLST437
 	.uleb128 0x55
-	.4byte	.LASF842
+	.4byte	.LASF840
 	.byte	0x3
 	.2byte	0x335
 	.4byte	0xdd4
-	.4byte	.LLST439
+	.4byte	.LLST438
 	.uleb128 0x55
-	.4byte	.LASF843
+	.4byte	.LASF841
 	.byte	0x3
 	.2byte	0x336
 	.4byte	0xdd4
-	.4byte	.LLST440
+	.4byte	.LLST439
 	.uleb128 0x63
-	.8byte	.LBB297
-	.8byte	.LBE297-.LBB297
-	.4byte	0x814c
+	.8byte	.LBB332
+	.8byte	.LBE332-.LBB332
+	.4byte	0x8067
 	.uleb128 0x55
-	.4byte	.LASF587
+	.4byte	.LASF586
 	.byte	0x3
 	.2byte	0x37a
 	.4byte	0xdc9
-	.4byte	.LLST441
+	.4byte	.LLST440
 	.uleb128 0x45
-	.8byte	.LVL1977
-	.4byte	0x6d71
+	.8byte	.LVL1973
+	.4byte	0x6d33
 	.uleb128 0x45
-	.8byte	.LVL1978
-	.4byte	0x2f73
+	.8byte	.LVL1974
+	.4byte	0x2f5e
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1935
-	.4byte	0x59d0
-	.4byte	0x8171
+	.8byte	.LVL1931
+	.4byte	0x59b6
+	.4byte	0x808c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37497,13 +37419,10 @@ __func__.7632:
 	.byte	0x87
 	.sleb128 0
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1942
-	.4byte	0x7d59
 	.uleb128 0x34
-	.8byte	.LVL1948
-	.4byte	0x2d32
-	.4byte	0x819a
+	.8byte	.LVL1944
+	.4byte	0x2d1d
+	.4byte	0x80a8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37516,9 +37435,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1949
-	.4byte	0x5c36
-	.4byte	0x81be
+	.8byte	.LVL1945
+	.4byte	0x5c1c
+	.4byte	0x80cc
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37538,9 +37457,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1954
-	.4byte	0x29a4
-	.4byte	0x81db
+	.8byte	.LVL1950
+	.4byte	0x298f
+	.4byte	0x80e9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37554,11 +37473,11 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1957
-	.4byte	0x2527
+	.8byte	.LVL1953
+	.4byte	0x2512
 	.uleb128 0x36
-	.8byte	.LVL1964
-	.4byte	0x259f
+	.8byte	.LVL1960
+	.4byte	0x258a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37573,7 +37492,7 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF844
+	.4byte	.LASF842
 	.byte	0x3
 	.2byte	0x325
 	.4byte	0x5b
@@ -37581,13 +37500,13 @@ __func__.7632:
 	.8byte	.LFE213-.LFB213
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8233
+	.4byte	0x8141
 	.uleb128 0x45
-	.8byte	.LVL1739
-	.4byte	0x8233
+	.8byte	.LVL1688
+	.4byte	0x8141
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF845
+	.4byte	.LASF843
 	.byte	0x3
 	.2byte	0x31c
 	.4byte	0x5b
@@ -37595,17 +37514,14 @@ __func__.7632:
 	.8byte	.LFE212-.LFB212
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8294
-	.uleb128 0x45
-	.8byte	.LVL1735
-	.4byte	0x7d59
+	.4byte	0x8195
 	.uleb128 0x45
-	.8byte	.LVL1736
-	.4byte	0x5d63
+	.8byte	.LVL1685
+	.4byte	0x5d49
 	.uleb128 0x34
-	.8byte	.LVL1737
-	.4byte	0x5968
-	.4byte	0x8286
+	.8byte	.LVL1686
+	.4byte	0x594e
+	.4byte	0x8187
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37613,11 +37529,11 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1738
-	.4byte	0x5694
+	.8byte	.LVL1687
+	.4byte	0x567a
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF846
+	.4byte	.LASF844
 	.byte	0x3
 	.2byte	0x2e6
 	.4byte	0x5b
@@ -37625,34 +37541,34 @@ __func__.7632:
 	.8byte	.LFE211-.LFB211
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x83a6
+	.4byte	0x82a7
 	.uleb128 0x2a
-	.4byte	.LASF847
+	.4byte	.LASF845
 	.byte	0x3
 	.2byte	0x2e8
-	.4byte	0x83a6
+	.4byte	0x82a7
 	.uleb128 0xa
 	.byte	0x3
 	.8byte	g_nand_phy_info
 	.byte	0x9f
 	.uleb128 0x59
-	.4byte	.LASF848
+	.4byte	.LASF846
 	.byte	0x3
 	.2byte	0x2f3
 	.8byte	.LDL2
 	.uleb128 0x63
-	.8byte	.LBB306
-	.8byte	.LBE306-.LBB306
-	.4byte	0x8319
+	.8byte	.LBB341
+	.8byte	.LBE341-.LBB341
+	.4byte	0x821a
 	.uleb128 0x54
 	.string	"i"
 	.byte	0x3
 	.2byte	0x310
 	.4byte	0xdd4
-	.4byte	.LLST469
+	.4byte	.LLST468
 	.uleb128 0x36
-	.8byte	.LVL2171
-	.4byte	0x2d32
+	.8byte	.LVL2152
+	.4byte	0x2d1d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37666,9 +37582,9 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2163
-	.4byte	0xa94d
-	.4byte	0x8345
+	.8byte	.LVL2144
+	.4byte	0xa94f
+	.4byte	0x8246
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37683,9 +37599,9 @@ __func__.7632:
 	.8byte	.LC70
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2164
-	.4byte	0x8b23
-	.4byte	0x8364
+	.8byte	.LVL2145
+	.4byte	0x8a24
+	.4byte	0x8265
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37694,26 +37610,26 @@ __func__.7632:
 	.8byte	.LANCHOR0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2165
-	.4byte	0x882f
+	.8byte	.LVL2146
+	.4byte	0x8730
 	.uleb128 0x45
-	.8byte	.LVL2166
-	.4byte	0x8758
+	.8byte	.LVL2147
+	.4byte	0x8659
 	.uleb128 0x45
-	.8byte	.LVL2167
-	.4byte	0x6bd9
+	.8byte	.LVL2148
+	.4byte	0x6b9b
 	.uleb128 0x45
-	.8byte	.LVL2168
-	.4byte	0x7127
+	.8byte	.LVL2149
+	.4byte	0x70e9
 	.uleb128 0x45
-	.8byte	.LVL2169
-	.4byte	0x3f98
+	.8byte	.LVL2150
+	.4byte	0x3f79
 	.byte	0
 	.uleb128 0x8
 	.byte	0x8
 	.4byte	0xee1
 	.uleb128 0x49
-	.4byte	.LASF849
+	.4byte	.LASF847
 	.byte	0x3
 	.2byte	0x26e
 	.4byte	0x5b
@@ -37721,57 +37637,57 @@ __func__.7632:
 	.8byte	.LFE210-.LFB210
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8546
+	.4byte	0x8447
 	.uleb128 0x55
-	.4byte	.LASF718
+	.4byte	.LASF717
 	.byte	0x3
 	.2byte	0x270
 	.4byte	0xdc9
-	.4byte	.LLST465
+	.4byte	.LLST464
 	.uleb128 0x55
-	.4byte	.LASF850
+	.4byte	.LASF848
 	.byte	0x3
 	.2byte	0x270
 	.4byte	0xdc9
-	.4byte	.LLST466
+	.4byte	.LLST465
 	.uleb128 0x55
-	.4byte	.LASF851
+	.4byte	.LASF849
 	.byte	0x3
 	.2byte	0x271
 	.4byte	0xdc9
-	.4byte	.LLST467
+	.4byte	.LLST466
 	.uleb128 0x54
 	.string	"i"
 	.byte	0x3
 	.2byte	0x272
 	.4byte	0xdc9
-	.4byte	.LLST468
+	.4byte	.LLST467
 	.uleb128 0x59
-	.4byte	.LASF852
+	.4byte	.LASF850
 	.byte	0x3
 	.2byte	0x2bc
-	.8byte	.L1631
+	.8byte	.L1620
 	.uleb128 0x59
-	.4byte	.LASF853
+	.4byte	.LASF851
 	.byte	0x3
 	.2byte	0x2cc
-	.8byte	.L1633
+	.8byte	.L1622
 	.uleb128 0x45
-	.8byte	.LVL2122
-	.4byte	0x6bd9
+	.8byte	.LVL2103
+	.4byte	0x6b9b
 	.uleb128 0x45
-	.8byte	.LVL2123
-	.4byte	0x7127
+	.8byte	.LVL2104
+	.4byte	0x70e9
 	.uleb128 0x45
-	.8byte	.LVL2124
-	.4byte	0x6e59
+	.8byte	.LVL2105
+	.4byte	0x6e1b
 	.uleb128 0x45
-	.8byte	.LVL2132
-	.4byte	0x7342
+	.8byte	.LVL2113
+	.4byte	0x7304
 	.uleb128 0x34
-	.8byte	.LVL2133
-	.4byte	0x259f
-	.4byte	0x8477
+	.8byte	.LVL2114
+	.4byte	0x258a
+	.4byte	0x8378
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37779,9 +37695,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2135
-	.4byte	0x259f
-	.4byte	0x848f
+	.8byte	.LVL2116
+	.4byte	0x258a
+	.4byte	0x8390
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37790,9 +37706,9 @@ __func__.7632:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2136
-	.4byte	0x460e
-	.4byte	0x84a7
+	.8byte	.LVL2117
+	.4byte	0x45ef
+	.4byte	0x83a8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37801,9 +37717,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2142
-	.4byte	0x8546
-	.4byte	0x84be
+	.8byte	.LVL2123
+	.4byte	0x8447
+	.4byte	0x83bf
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37811,15 +37727,15 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2147
-	.4byte	0x8b93
+	.8byte	.LVL2128
+	.4byte	0x8a94
 	.uleb128 0x45
-	.8byte	.LVL2148
-	.4byte	0x6bd9
+	.8byte	.LVL2129
+	.4byte	0x6b9b
 	.uleb128 0x34
-	.8byte	.LVL2151
-	.4byte	0x8546
-	.4byte	0x84ef
+	.8byte	.LVL2132
+	.4byte	0x8447
+	.4byte	0x83f0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37827,9 +37743,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2154
-	.4byte	0x8546
-	.4byte	0x8506
+	.8byte	.LVL2135
+	.4byte	0x8447
+	.4byte	0x8407
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37837,9 +37753,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2158
-	.4byte	0x460e
-	.4byte	0x851e
+	.8byte	.LVL2139
+	.4byte	0x45ef
+	.4byte	0x841f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37848,17 +37764,17 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2159
-	.4byte	0x6980
+	.8byte	.LVL2140
+	.4byte	0x6976
 	.uleb128 0x45
-	.8byte	.LVL2160
-	.4byte	0x5694
+	.8byte	.LVL2141
+	.4byte	0x567a
 	.uleb128 0x45
-	.8byte	.LVL2161
-	.4byte	0x3f98
+	.8byte	.LVL2142
+	.4byte	0x3f79
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF854
+	.4byte	.LASF852
 	.byte	0x3
 	.2byte	0x20f
 	.4byte	0x5b
@@ -37866,76 +37782,76 @@ __func__.7632:
 	.8byte	.LFE209-.LFB209
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x872e
+	.4byte	0x862f
 	.uleb128 0x53
-	.4byte	.LASF718
+	.4byte	.LASF717
 	.byte	0x3
 	.2byte	0x20f
 	.4byte	0xdc9
-	.4byte	.LLST188
+	.4byte	.LLST181
 	.uleb128 0x53
-	.4byte	.LASF855
+	.4byte	.LASF853
 	.byte	0x3
 	.2byte	0x20f
 	.4byte	0xdbe
-	.4byte	.LLST189
+	.4byte	.LLST182
 	.uleb128 0x55
-	.4byte	.LASF850
+	.4byte	.LASF848
 	.byte	0x3
 	.2byte	0x211
 	.4byte	0xdc9
-	.4byte	.LLST190
+	.4byte	.LLST183
 	.uleb128 0x55
-	.4byte	.LASF569
+	.4byte	.LASF568
 	.byte	0x3
 	.2byte	0x211
 	.4byte	0xdc9
-	.4byte	.LLST191
+	.4byte	.LLST184
 	.uleb128 0x55
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x3
 	.2byte	0x212
 	.4byte	0xdc9
-	.4byte	.LLST192
+	.4byte	.LLST185
 	.uleb128 0x55
 	.4byte	.LASF388
 	.byte	0x3
 	.2byte	0x212
 	.4byte	0xdc9
-	.4byte	.LLST193
+	.4byte	.LLST186
 	.uleb128 0x55
-	.4byte	.LASF856
+	.4byte	.LASF854
 	.byte	0x3
 	.2byte	0x213
 	.4byte	0xdc9
-	.4byte	.LLST194
+	.4byte	.LLST187
 	.uleb128 0x55
-	.4byte	.LASF857
+	.4byte	.LASF855
 	.byte	0x3
 	.2byte	0x214
 	.4byte	0xdc9
-	.4byte	.LLST195
+	.4byte	.LLST188
 	.uleb128 0x55
-	.4byte	.LASF858
+	.4byte	.LASF856
 	.byte	0x3
 	.2byte	0x215
 	.4byte	0xdc9
-	.4byte	.LLST196
+	.4byte	.LLST189
 	.uleb128 0x55
-	.4byte	.LASF859
+	.4byte	.LASF857
 	.byte	0x3
 	.2byte	0x216
 	.4byte	0xdc9
-	.4byte	.LLST197
+	.4byte	.LLST190
 	.uleb128 0x59
-	.4byte	.LASF860
+	.4byte	.LASF858
 	.byte	0x3
 	.2byte	0x240
-	.8byte	.L440
+	.8byte	.L430
 	.uleb128 0x34
-	.8byte	.LVL694
-	.4byte	0x2721
-	.4byte	0x862f
+	.8byte	.LVL671
+	.4byte	0x270c
+	.4byte	0x8530
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37943,12 +37859,12 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL697
-	.4byte	0x75ef
+	.8byte	.LVL674
+	.4byte	0x75b1
 	.uleb128 0x34
-	.8byte	.LVL703
-	.4byte	0x27e7
-	.4byte	0x865f
+	.8byte	.LVL680
+	.4byte	0x27d2
+	.4byte	0x8560
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37968,12 +37884,12 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL707
-	.4byte	0x75ef
+	.8byte	.LVL684
+	.4byte	0x75b1
 	.uleb128 0x34
-	.8byte	.LVL711
-	.4byte	0x6afa
-	.4byte	0x8683
+	.8byte	.LVL688
+	.4byte	0x6b48
+	.4byte	0x8584
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37981,9 +37897,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL712
-	.4byte	0x2721
-	.4byte	0x86a1
+	.8byte	.LVL689
+	.4byte	0x270c
+	.4byte	0x85a2
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37998,9 +37914,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL716
-	.4byte	0x6e0c
-	.4byte	0x86b9
+	.8byte	.LVL693
+	.4byte	0x6dce
+	.4byte	0x85ba
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -38009,9 +37925,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL718
-	.4byte	0x872e
-	.4byte	0x86d1
+	.8byte	.LVL695
+	.4byte	0x862f
+	.4byte	0x85d2
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38020,9 +37936,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL719
-	.4byte	0x7560
-	.4byte	0x86e9
+	.8byte	.LVL696
+	.4byte	0x7522
+	.4byte	0x85ea
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38031,9 +37947,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL730
-	.4byte	0x6e0c
-	.4byte	0x8701
+	.8byte	.LVL707
+	.4byte	0x6dce
+	.4byte	0x8602
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -38042,9 +37958,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL732
-	.4byte	0x872e
-	.4byte	0x8719
+	.8byte	.LVL709
+	.4byte	0x862f
+	.4byte	0x861a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38053,8 +37969,8 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL733
-	.4byte	0x7560
+	.8byte	.LVL710
+	.4byte	0x7522
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38064,37 +37980,37 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x4a
-	.4byte	.LASF861
+	.4byte	.LASF859
 	.byte	0x3
 	.2byte	0x201
 	.4byte	0x5b
 	.byte	0x1
-	.4byte	0x8758
+	.4byte	0x8659
 	.uleb128 0x4b
 	.4byte	.LASF388
 	.byte	0x3
 	.2byte	0x201
 	.4byte	0xdc9
 	.uleb128 0x4c
-	.4byte	.LASF862
+	.4byte	.LASF860
 	.byte	0x3
 	.2byte	0x203
 	.4byte	0xdc9
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF863
+	.4byte	.LASF861
 	.byte	0x3
-	.2byte	0x1ec
+	.2byte	0x1ed
 	.4byte	0x5b
 	.8byte	.LFB207
 	.8byte	.LFE207-.LFB207
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x882f
+	.4byte	0x8730
 	.uleb128 0x34
-	.8byte	.LVL1110
-	.4byte	0x259f
-	.4byte	0x8791
+	.8byte	.LVL1112
+	.4byte	0x258a
+	.4byte	0x8692
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -38102,9 +38018,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1111
-	.4byte	0x259f
-	.4byte	0x87a8
+	.8byte	.LVL1113
+	.4byte	0x258a
+	.4byte	0x86a9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -38112,9 +38028,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1112
-	.4byte	0x259f
-	.4byte	0x87bf
+	.8byte	.LVL1114
+	.4byte	0x258a
+	.4byte	0x86c0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -38122,15 +38038,15 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1113
-	.4byte	0x259f
-	.4byte	0x87e9
+	.8byte	.LVL1115
+	.4byte	0x258a
+	.4byte	0x86ea
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR79
+	.8byte	.LANCHOR39
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -38144,15 +38060,15 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1114
-	.4byte	0x259f
-	.4byte	0x8814
+	.8byte	.LVL1116
+	.4byte	0x258a
+	.4byte	0x8715
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR83
+	.8byte	.LANCHOR81
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -38166,50 +38082,50 @@ __func__.7632:
 	.2byte	0x200
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1115
-	.4byte	0x3695
+	.8byte	.LVL1117
+	.4byte	0x3666
 	.uleb128 0x45
-	.8byte	.LVL1116
-	.4byte	0x4f8b
+	.8byte	.LVL1118
+	.4byte	0x4f6c
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF864
+	.4byte	.LASF862
 	.byte	0x3
-	.2byte	0x116
+	.2byte	0x117
 	.4byte	0x5b
 	.8byte	.LFB206
 	.8byte	.LFE206-.LFB206
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8b23
+	.4byte	0x8a24
 	.uleb128 0x54
 	.string	"i"
 	.byte	0x3
-	.2byte	0x118
+	.2byte	0x119
 	.4byte	0xdd4
-	.4byte	.LLST201
+	.4byte	.LLST200
 	.uleb128 0x55
-	.4byte	.LASF865
+	.4byte	.LASF863
 	.byte	0x3
-	.2byte	0x119
+	.2byte	0x11a
 	.4byte	0xdd4
-	.4byte	.LLST202
+	.4byte	.LLST201
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x72a5
+	.4byte	.LASF573
+	.4byte	0x7267
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6104
+	.8byte	__func__.6107
 	.uleb128 0x45
-	.8byte	.LVL741
-	.4byte	0x2c2b
+	.8byte	.LVL743
+	.4byte	0x2c16
 	.uleb128 0x45
-	.8byte	.LVL742
-	.4byte	0x2c2b
-	.uleb128 0x34
 	.8byte	.LVL744
-	.4byte	0x2c2b
-	.4byte	0x88b4
+	.4byte	0x2c16
+	.uleb128 0x34
+	.8byte	.LVL746
+	.4byte	0x2c16
+	.4byte	0x87b5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38218,9 +38134,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL745
-	.4byte	0x2c2b
-	.4byte	0x88cc
+	.8byte	.LVL747
+	.4byte	0x2c16
+	.4byte	0x87cd
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38229,9 +38145,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL746
-	.4byte	0x2c2b
-	.4byte	0x88e4
+	.8byte	.LVL748
+	.4byte	0x2c16
+	.4byte	0x87e5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38240,9 +38156,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL747
-	.4byte	0x2c2b
-	.4byte	0x88fc
+	.8byte	.LVL749
+	.4byte	0x2c16
+	.4byte	0x87fd
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38251,9 +38167,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL748
-	.4byte	0x2c2b
-	.4byte	0x8914
+	.8byte	.LVL750
+	.4byte	0x2c16
+	.4byte	0x8815
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38262,9 +38178,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL751
-	.4byte	0x2c2b
-	.4byte	0x892c
+	.8byte	.LVL753
+	.4byte	0x2c16
+	.4byte	0x882d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38273,9 +38189,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL752
-	.4byte	0x2c2b
-	.4byte	0x8944
+	.8byte	.LVL754
+	.4byte	0x2c16
+	.4byte	0x8845
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38284,9 +38200,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL753
-	.4byte	0x2c2b
-	.4byte	0x895c
+	.8byte	.LVL755
+	.4byte	0x2c16
+	.4byte	0x885d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38295,12 +38211,12 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL754
-	.4byte	0x2c2b
+	.8byte	.LVL756
+	.4byte	0x2c16
 	.uleb128 0x34
-	.8byte	.LVL755
-	.4byte	0x2c2b
-	.4byte	0x8981
+	.8byte	.LVL757
+	.4byte	0x2c16
+	.4byte	0x8882
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38309,9 +38225,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL756
-	.4byte	0x2c2b
-	.4byte	0x8999
+	.8byte	.LVL758
+	.4byte	0x2c16
+	.4byte	0x889a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38320,12 +38236,12 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL758
-	.4byte	0x2c2b
-	.uleb128 0x34
 	.8byte	.LVL760
-	.4byte	0x2c2b
-	.4byte	0x89be
+	.4byte	0x2c16
+	.uleb128 0x34
+	.8byte	.LVL762
+	.4byte	0x2c16
+	.4byte	0x88bf
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38334,9 +38250,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL761
-	.4byte	0x2c2b
-	.4byte	0x89d8
+	.8byte	.LVL763
+	.4byte	0x2c16
+	.4byte	0x88d9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38347,18 +38263,18 @@ __func__.7632:
 	.byte	0x24
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL763
-	.4byte	0x2c2b
+	.8byte	.LVL765
+	.4byte	0x2c16
 	.uleb128 0x45
-	.8byte	.LVL764
-	.4byte	0x2c2b
+	.8byte	.LVL766
+	.4byte	0x2c16
 	.uleb128 0x45
-	.8byte	.LVL765
-	.4byte	0x2c2b
-	.uleb128 0x34
 	.8byte	.LVL767
-	.4byte	0x2c2b
-	.4byte	0x8a17
+	.4byte	0x2c16
+	.uleb128 0x34
+	.8byte	.LVL769
+	.4byte	0x2c16
+	.4byte	0x8918
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38367,12 +38283,12 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL769
-	.4byte	0x2c2b
-	.uleb128 0x34
 	.8byte	.LVL771
-	.4byte	0x2c2b
-	.4byte	0x8a3c
+	.4byte	0x2c16
+	.uleb128 0x34
+	.8byte	.LVL773
+	.4byte	0x2c16
+	.4byte	0x893d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38381,9 +38297,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL772
-	.4byte	0x2c2b
-	.4byte	0x8a54
+	.8byte	.LVL774
+	.4byte	0x2c16
+	.4byte	0x8955
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38392,24 +38308,24 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL773
-	.4byte	0x2c2b
-	.uleb128 0x45
-	.8byte	.LVL774
-	.4byte	0x2c2b
-	.uleb128 0x45
 	.8byte	.LVL775
-	.4byte	0x2c2b
+	.4byte	0x2c16
 	.uleb128 0x45
 	.8byte	.LVL776
-	.4byte	0x2c2b
+	.4byte	0x2c16
 	.uleb128 0x45
 	.8byte	.LVL777
-	.4byte	0x2c2b
-	.uleb128 0x34
+	.4byte	0x2c16
+	.uleb128 0x45
 	.8byte	.LVL778
-	.4byte	0x259f
-	.4byte	0x8aac
+	.4byte	0x2c16
+	.uleb128 0x45
+	.8byte	.LVL779
+	.4byte	0x2c16
+	.uleb128 0x34
+	.8byte	.LVL780
+	.4byte	0x258a
+	.4byte	0x89ad
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -38417,32 +38333,32 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL780
-	.4byte	0x2c2b
-	.uleb128 0x45
 	.8byte	.LVL782
-	.4byte	0x2c2b
+	.4byte	0x2c16
 	.uleb128 0x45
-	.8byte	.LVL785
-	.4byte	0x2c2b
+	.8byte	.LVL784
+	.4byte	0x2c16
 	.uleb128 0x45
-	.8byte	.LVL788
-	.4byte	0x2c2b
+	.8byte	.LVL787
+	.4byte	0x2c16
 	.uleb128 0x45
-	.8byte	.LVL791
-	.4byte	0x2c2b
+	.8byte	.LVL790
+	.4byte	0x2c16
 	.uleb128 0x45
-	.8byte	.LVL795
-	.4byte	0x2c2b
+	.8byte	.LVL793
+	.4byte	0x2c16
+	.uleb128 0x45
+	.8byte	.LVL797
+	.4byte	0x2c16
 	.uleb128 0x36
-	.8byte	.LVL798
-	.4byte	0xa94d
+	.8byte	.LVL800
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC82
+	.8byte	.LC85
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -38452,34 +38368,34 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF866
+	.4byte	.LASF864
 	.byte	0x3
-	.byte	0xb6
+	.byte	0xb7
 	.4byte	0x5b
 	.8byte	.LFB205
 	.8byte	.LFE205-.LFB205
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8b93
+	.4byte	0x8a94
 	.uleb128 0x2e
-	.4byte	.LASF847
+	.4byte	.LASF845
 	.byte	0x3
-	.byte	0xb6
-	.4byte	0x83a6
+	.byte	0xb7
+	.4byte	0x82a7
 	.4byte	.LLST8
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x3
-	.byte	0xb8
+	.byte	0xb9
 	.4byte	0xdd4
 	.4byte	.LLST9
 	.uleb128 0x45
 	.8byte	.LVL30
-	.4byte	0x8bdc
+	.4byte	0x8add
 	.uleb128 0x34
 	.8byte	.LVL31
-	.4byte	0x8bdc
-	.4byte	0x8b85
+	.4byte	0x8add
+	.4byte	0x8a86
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38489,39 +38405,39 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x45
 	.8byte	.LVL33
-	.4byte	0x8b93
+	.4byte	0x8a94
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF867
+	.4byte	.LASF865
 	.byte	0x3
-	.byte	0xa4
+	.byte	0xa5
 	.4byte	0x5b
 	.8byte	.LFB204
 	.8byte	.LFE204-.LFB204
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8bc4
+	.4byte	0x8ac5
 	.uleb128 0x2e
-	.4byte	.LASF868
+	.4byte	.LASF866
 	.byte	0x3
-	.byte	0xa4
+	.byte	0xa5
 	.4byte	0xdc9
 	.4byte	.LLST7
 	.byte	0
 	.uleb128 0x65
-	.4byte	.LASF869
+	.4byte	.LASF867
 	.byte	0x3
-	.byte	0x9e
+	.byte	0x9f
 	.byte	0x1
-	.4byte	0x8bdc
+	.4byte	0x8add
 	.uleb128 0x38
-	.4byte	.LASF870
+	.4byte	.LASF868
 	.byte	0x3
-	.byte	0x9e
+	.byte	0x9f
 	.4byte	0xdd4
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF871
+	.4byte	.LASF869
 	.byte	0x3
 	.byte	0x7f
 	.4byte	0xdc9
@@ -38529,7 +38445,7 @@ __func__.7632:
 	.8byte	.LFE202-.LFB202
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8c29
+	.4byte	0x8b2a
 	.uleb128 0x31
 	.string	"num"
 	.byte	0x3
@@ -38543,14 +38459,14 @@ __func__.7632:
 	.4byte	0xdc9
 	.4byte	.LLST5
 	.uleb128 0x32
-	.4byte	.LASF872
+	.4byte	.LASF870
 	.byte	0x3
 	.byte	0x82
 	.4byte	0xdd4
 	.4byte	.LLST6
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF873
+	.4byte	.LASF871
 	.byte	0x3
 	.byte	0x71
 	.4byte	0x5b
@@ -38558,23 +38474,23 @@ __func__.7632:
 	.8byte	.LFE201-.LFB201
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8caf
+	.4byte	0x8bb0
 	.uleb128 0x2e
 	.4byte	.LASF299
 	.byte	0x3
 	.byte	0x71
 	.4byte	0xfa
-	.4byte	.LLST112
+	.4byte	.LLST102
 	.uleb128 0x33
 	.string	"buf"
 	.byte	0x3
 	.byte	0x73
 	.4byte	0xfa
-	.4byte	.LLST113
+	.4byte	.LLST103
 	.uleb128 0x34
-	.8byte	.LVL470
-	.4byte	0xa96f
-	.4byte	0x8c9a
+	.8byte	.LVL445
+	.4byte	0xa971
+	.4byte	0x8b9b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38595,8 +38511,8 @@ __func__.7632:
 	.8byte	.LC70
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL472
-	.4byte	0x8caf
+	.8byte	.LVL447
+	.4byte	0x8bb0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38606,7 +38522,7 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF874
+	.4byte	.LASF872
 	.byte	0x3
 	.byte	0xb
 	.4byte	0x5b
@@ -38614,39 +38530,39 @@ __func__.7632:
 	.8byte	.LFE200-.LFB200
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x973d
+	.4byte	0x963e
 	.uleb128 0x2e
 	.4byte	.LASF299
 	.byte	0x3
 	.byte	0xb
 	.4byte	0xfa
-	.4byte	.LLST107
+	.4byte	.LLST97
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x3
 	.byte	0xd
 	.4byte	0x5b
-	.4byte	.LLST108
+	.4byte	.LLST98
 	.uleb128 0x33
 	.string	"buf"
 	.byte	0x3
 	.byte	0xe
 	.4byte	0xfa
-	.4byte	.LLST109
+	.4byte	.LLST99
 	.uleb128 0x63
-	.8byte	.LBB205
-	.8byte	.LBE205-.LBB205
-	.4byte	0x8d57
+	.8byte	.LBB217
+	.8byte	.LBE217-.LBB217
+	.4byte	0x8c58
 	.uleb128 0x32
-	.4byte	.LASF587
+	.4byte	.LASF586
 	.byte	0x3
 	.byte	0x57
 	.4byte	0xdc9
-	.4byte	.LLST110
+	.4byte	.LLST100
 	.uleb128 0x34
-	.8byte	.LVL455
-	.4byte	0x6644
-	.4byte	0x8d36
+	.8byte	.LVL430
+	.4byte	0x662a
+	.4byte	0x8c37
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38654,8 +38570,8 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL459
-	.4byte	0xa96f
+	.8byte	.LVL434
+	.4byte	0xa971
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38677,18 +38593,18 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x63
-	.8byte	.LBB206
-	.8byte	.LBE206-.LBB206
-	.4byte	0x8d9c
+	.8byte	.LBB218
+	.8byte	.LBE218-.LBB218
+	.4byte	0x8c9d
 	.uleb128 0x32
-	.4byte	.LASF587
+	.4byte	.LASF586
 	.byte	0x3
 	.byte	0x60
 	.4byte	0xdc9
-	.4byte	.LLST111
+	.4byte	.LLST101
 	.uleb128 0x36
-	.8byte	.LVL466
-	.4byte	0xa96f
+	.8byte	.LVL441
+	.4byte	0xa971
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38710,9 +38626,9 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL318
-	.4byte	0xa96f
-	.4byte	0x8dc1
+	.8byte	.LVL293
+	.4byte	0xa971
+	.4byte	0x8cc2
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38727,9 +38643,9 @@ __func__.7632:
 	.8byte	.LC2
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL320
-	.4byte	0xa96f
-	.4byte	0x8de6
+	.8byte	.LVL295
+	.4byte	0xa971
+	.4byte	0x8ce7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38744,9 +38660,9 @@ __func__.7632:
 	.8byte	.LC3
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL322
-	.4byte	0xa96f
-	.4byte	0x8e0b
+	.8byte	.LVL297
+	.4byte	0xa971
+	.4byte	0x8d0c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38761,9 +38677,9 @@ __func__.7632:
 	.8byte	.LC4
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL324
-	.4byte	0xa96f
-	.4byte	0x8e30
+	.8byte	.LVL299
+	.4byte	0xa971
+	.4byte	0x8d31
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38778,9 +38694,9 @@ __func__.7632:
 	.8byte	.LC5
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL326
-	.4byte	0xa96f
-	.4byte	0x8e55
+	.8byte	.LVL301
+	.4byte	0xa971
+	.4byte	0x8d56
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38795,9 +38711,9 @@ __func__.7632:
 	.8byte	.LC6
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL328
-	.4byte	0xa96f
-	.4byte	0x8e7a
+	.8byte	.LVL303
+	.4byte	0xa971
+	.4byte	0x8d7b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38812,9 +38728,9 @@ __func__.7632:
 	.8byte	.LC7
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL330
-	.4byte	0xa96f
-	.4byte	0x8e9f
+	.8byte	.LVL305
+	.4byte	0xa971
+	.4byte	0x8da0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38829,9 +38745,9 @@ __func__.7632:
 	.8byte	.LC8
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL332
-	.4byte	0xa96f
-	.4byte	0x8ec4
+	.8byte	.LVL307
+	.4byte	0xa971
+	.4byte	0x8dc5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38846,9 +38762,9 @@ __func__.7632:
 	.8byte	.LC9
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL334
-	.4byte	0xa96f
-	.4byte	0x8ee9
+	.8byte	.LVL309
+	.4byte	0xa971
+	.4byte	0x8dea
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38863,9 +38779,9 @@ __func__.7632:
 	.8byte	.LC10
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL336
-	.4byte	0xa96f
-	.4byte	0x8f0e
+	.8byte	.LVL311
+	.4byte	0xa971
+	.4byte	0x8e0f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38880,9 +38796,9 @@ __func__.7632:
 	.8byte	.LC11
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL338
-	.4byte	0xa96f
-	.4byte	0x8f33
+	.8byte	.LVL313
+	.4byte	0xa971
+	.4byte	0x8e34
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38897,9 +38813,9 @@ __func__.7632:
 	.8byte	.LC12
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL340
-	.4byte	0xa96f
-	.4byte	0x8f58
+	.8byte	.LVL315
+	.4byte	0xa971
+	.4byte	0x8e59
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38914,9 +38830,9 @@ __func__.7632:
 	.8byte	.LC13
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL342
-	.4byte	0xa96f
-	.4byte	0x8f7d
+	.8byte	.LVL317
+	.4byte	0xa971
+	.4byte	0x8e7e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38931,9 +38847,9 @@ __func__.7632:
 	.8byte	.LC14
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL344
-	.4byte	0xa96f
-	.4byte	0x8fa2
+	.8byte	.LVL319
+	.4byte	0xa971
+	.4byte	0x8ea3
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38948,9 +38864,9 @@ __func__.7632:
 	.8byte	.LC15
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL346
-	.4byte	0xa96f
-	.4byte	0x8fc7
+	.8byte	.LVL321
+	.4byte	0xa971
+	.4byte	0x8ec8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38965,9 +38881,9 @@ __func__.7632:
 	.8byte	.LC16
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL348
-	.4byte	0xa96f
-	.4byte	0x8fec
+	.8byte	.LVL323
+	.4byte	0xa971
+	.4byte	0x8eed
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38982,9 +38898,9 @@ __func__.7632:
 	.8byte	.LC17
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL350
-	.4byte	0xa96f
-	.4byte	0x9011
+	.8byte	.LVL325
+	.4byte	0xa971
+	.4byte	0x8f12
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38999,9 +38915,9 @@ __func__.7632:
 	.8byte	.LC18
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL352
-	.4byte	0xa96f
-	.4byte	0x9036
+	.8byte	.LVL327
+	.4byte	0xa971
+	.4byte	0x8f37
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39016,9 +38932,9 @@ __func__.7632:
 	.8byte	.LC19
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL354
-	.4byte	0xa96f
-	.4byte	0x905b
+	.8byte	.LVL329
+	.4byte	0xa971
+	.4byte	0x8f5c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39033,9 +38949,9 @@ __func__.7632:
 	.8byte	.LC20
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL356
-	.4byte	0xa96f
-	.4byte	0x9080
+	.8byte	.LVL331
+	.4byte	0xa971
+	.4byte	0x8f81
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39050,9 +38966,9 @@ __func__.7632:
 	.8byte	.LC21
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL358
-	.4byte	0xa96f
-	.4byte	0x90a5
+	.8byte	.LVL333
+	.4byte	0xa971
+	.4byte	0x8fa6
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39067,9 +38983,9 @@ __func__.7632:
 	.8byte	.LC22
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL360
-	.4byte	0xa96f
-	.4byte	0x90ca
+	.8byte	.LVL335
+	.4byte	0xa971
+	.4byte	0x8fcb
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39084,9 +39000,9 @@ __func__.7632:
 	.8byte	.LC23
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL362
-	.4byte	0xa96f
-	.4byte	0x90ef
+	.8byte	.LVL337
+	.4byte	0xa971
+	.4byte	0x8ff0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39101,9 +39017,9 @@ __func__.7632:
 	.8byte	.LC24
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL364
-	.4byte	0xa96f
-	.4byte	0x9114
+	.8byte	.LVL339
+	.4byte	0xa971
+	.4byte	0x9015
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39118,9 +39034,9 @@ __func__.7632:
 	.8byte	.LC25
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL366
-	.4byte	0xa96f
-	.4byte	0x9139
+	.8byte	.LVL341
+	.4byte	0xa971
+	.4byte	0x903a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39135,9 +39051,9 @@ __func__.7632:
 	.8byte	.LC26
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL368
-	.4byte	0xa96f
-	.4byte	0x915e
+	.8byte	.LVL343
+	.4byte	0xa971
+	.4byte	0x905f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39152,9 +39068,9 @@ __func__.7632:
 	.8byte	.LC27
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL370
-	.4byte	0xa96f
-	.4byte	0x9183
+	.8byte	.LVL345
+	.4byte	0xa971
+	.4byte	0x9084
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39169,9 +39085,9 @@ __func__.7632:
 	.8byte	.LC28
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL372
-	.4byte	0xa96f
-	.4byte	0x91a8
+	.8byte	.LVL347
+	.4byte	0xa971
+	.4byte	0x90a9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39186,9 +39102,9 @@ __func__.7632:
 	.8byte	.LC29
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL374
-	.4byte	0xa96f
-	.4byte	0x91cd
+	.8byte	.LVL349
+	.4byte	0xa971
+	.4byte	0x90ce
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39203,9 +39119,9 @@ __func__.7632:
 	.8byte	.LC30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL376
-	.4byte	0xa96f
-	.4byte	0x91f2
+	.8byte	.LVL351
+	.4byte	0xa971
+	.4byte	0x90f3
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39220,9 +39136,9 @@ __func__.7632:
 	.8byte	.LC31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL378
-	.4byte	0xa96f
-	.4byte	0x9217
+	.8byte	.LVL353
+	.4byte	0xa971
+	.4byte	0x9118
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39237,9 +39153,9 @@ __func__.7632:
 	.8byte	.LC32
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL380
-	.4byte	0xa96f
-	.4byte	0x923c
+	.8byte	.LVL355
+	.4byte	0xa971
+	.4byte	0x913d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39254,9 +39170,9 @@ __func__.7632:
 	.8byte	.LC33
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL382
-	.4byte	0xa96f
-	.4byte	0x9261
+	.8byte	.LVL357
+	.4byte	0xa971
+	.4byte	0x9162
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39271,9 +39187,9 @@ __func__.7632:
 	.8byte	.LC34
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL384
-	.4byte	0xa96f
-	.4byte	0x9286
+	.8byte	.LVL359
+	.4byte	0xa971
+	.4byte	0x9187
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39288,9 +39204,9 @@ __func__.7632:
 	.8byte	.LC35
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL386
-	.4byte	0xa96f
-	.4byte	0x92ab
+	.8byte	.LVL361
+	.4byte	0xa971
+	.4byte	0x91ac
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39305,9 +39221,9 @@ __func__.7632:
 	.8byte	.LC36
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL388
-	.4byte	0xa96f
-	.4byte	0x92d0
+	.8byte	.LVL363
+	.4byte	0xa971
+	.4byte	0x91d1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39322,9 +39238,9 @@ __func__.7632:
 	.8byte	.LC37
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL390
-	.4byte	0xa96f
-	.4byte	0x92f5
+	.8byte	.LVL365
+	.4byte	0xa971
+	.4byte	0x91f6
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39339,9 +39255,9 @@ __func__.7632:
 	.8byte	.LC38
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL392
-	.4byte	0xa96f
-	.4byte	0x931a
+	.8byte	.LVL367
+	.4byte	0xa971
+	.4byte	0x921b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39356,9 +39272,9 @@ __func__.7632:
 	.8byte	.LC39
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL394
-	.4byte	0xa96f
-	.4byte	0x933f
+	.8byte	.LVL369
+	.4byte	0xa971
+	.4byte	0x9240
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39373,9 +39289,9 @@ __func__.7632:
 	.8byte	.LC40
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL396
-	.4byte	0xa96f
-	.4byte	0x9364
+	.8byte	.LVL371
+	.4byte	0xa971
+	.4byte	0x9265
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39390,9 +39306,9 @@ __func__.7632:
 	.8byte	.LC41
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL398
-	.4byte	0xa96f
-	.4byte	0x9389
+	.8byte	.LVL373
+	.4byte	0xa971
+	.4byte	0x928a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39407,9 +39323,9 @@ __func__.7632:
 	.8byte	.LC42
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL400
-	.4byte	0xa96f
-	.4byte	0x93ae
+	.8byte	.LVL375
+	.4byte	0xa971
+	.4byte	0x92af
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39424,9 +39340,9 @@ __func__.7632:
 	.8byte	.LC43
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL402
-	.4byte	0xa96f
-	.4byte	0x93d3
+	.8byte	.LVL377
+	.4byte	0xa971
+	.4byte	0x92d4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39441,9 +39357,9 @@ __func__.7632:
 	.8byte	.LC44
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL404
-	.4byte	0xa96f
-	.4byte	0x93f8
+	.8byte	.LVL379
+	.4byte	0xa971
+	.4byte	0x92f9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39458,9 +39374,9 @@ __func__.7632:
 	.8byte	.LC45
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL406
-	.4byte	0xa96f
-	.4byte	0x941d
+	.8byte	.LVL381
+	.4byte	0xa971
+	.4byte	0x931e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39475,9 +39391,9 @@ __func__.7632:
 	.8byte	.LC46
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL408
-	.4byte	0xa96f
-	.4byte	0x9442
+	.8byte	.LVL383
+	.4byte	0xa971
+	.4byte	0x9343
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39492,9 +39408,9 @@ __func__.7632:
 	.8byte	.LC47
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL410
-	.4byte	0xa96f
-	.4byte	0x9467
+	.8byte	.LVL385
+	.4byte	0xa971
+	.4byte	0x9368
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39509,9 +39425,9 @@ __func__.7632:
 	.8byte	.LC48
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL412
-	.4byte	0xa96f
-	.4byte	0x948c
+	.8byte	.LVL387
+	.4byte	0xa971
+	.4byte	0x938d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39526,9 +39442,9 @@ __func__.7632:
 	.8byte	.LC49
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL414
-	.4byte	0xa96f
-	.4byte	0x94b1
+	.8byte	.LVL389
+	.4byte	0xa971
+	.4byte	0x93b2
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39543,9 +39459,9 @@ __func__.7632:
 	.8byte	.LC50
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL416
-	.4byte	0xa96f
-	.4byte	0x94d6
+	.8byte	.LVL391
+	.4byte	0xa971
+	.4byte	0x93d7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39560,9 +39476,9 @@ __func__.7632:
 	.8byte	.LC51
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL418
-	.4byte	0xa96f
-	.4byte	0x94fb
+	.8byte	.LVL393
+	.4byte	0xa971
+	.4byte	0x93fc
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39577,9 +39493,9 @@ __func__.7632:
 	.8byte	.LC52
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL420
-	.4byte	0xa96f
-	.4byte	0x9520
+	.8byte	.LVL395
+	.4byte	0xa971
+	.4byte	0x9421
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39594,9 +39510,9 @@ __func__.7632:
 	.8byte	.LC53
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL422
-	.4byte	0xa96f
-	.4byte	0x9545
+	.8byte	.LVL397
+	.4byte	0xa971
+	.4byte	0x9446
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39611,9 +39527,9 @@ __func__.7632:
 	.8byte	.LC54
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL424
-	.4byte	0xa96f
-	.4byte	0x956a
+	.8byte	.LVL399
+	.4byte	0xa971
+	.4byte	0x946b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39628,9 +39544,9 @@ __func__.7632:
 	.8byte	.LC55
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL426
-	.4byte	0xa96f
-	.4byte	0x958f
+	.8byte	.LVL401
+	.4byte	0xa971
+	.4byte	0x9490
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39645,9 +39561,9 @@ __func__.7632:
 	.8byte	.LC56
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL428
-	.4byte	0xa96f
-	.4byte	0x95b4
+	.8byte	.LVL403
+	.4byte	0xa971
+	.4byte	0x94b5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39662,9 +39578,9 @@ __func__.7632:
 	.8byte	.LC57
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL430
-	.4byte	0xa96f
-	.4byte	0x95d9
+	.8byte	.LVL405
+	.4byte	0xa971
+	.4byte	0x94da
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39679,9 +39595,9 @@ __func__.7632:
 	.8byte	.LC58
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL432
-	.4byte	0xa96f
-	.4byte	0x95fe
+	.8byte	.LVL407
+	.4byte	0xa971
+	.4byte	0x94ff
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39696,9 +39612,9 @@ __func__.7632:
 	.8byte	.LC59
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL434
-	.4byte	0xa96f
-	.4byte	0x9623
+	.8byte	.LVL409
+	.4byte	0xa971
+	.4byte	0x9524
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39713,9 +39629,9 @@ __func__.7632:
 	.8byte	.LC60
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL436
-	.4byte	0xa96f
-	.4byte	0x9648
+	.8byte	.LVL411
+	.4byte	0xa971
+	.4byte	0x9549
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39730,9 +39646,9 @@ __func__.7632:
 	.8byte	.LC61
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL438
-	.4byte	0xa96f
-	.4byte	0x966d
+	.8byte	.LVL413
+	.4byte	0xa971
+	.4byte	0x956e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39747,9 +39663,9 @@ __func__.7632:
 	.8byte	.LC62
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL440
-	.4byte	0xa96f
-	.4byte	0x9692
+	.8byte	.LVL415
+	.4byte	0xa971
+	.4byte	0x9593
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39764,9 +39680,9 @@ __func__.7632:
 	.8byte	.LC63
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL442
-	.4byte	0xa96f
-	.4byte	0x96b7
+	.8byte	.LVL417
+	.4byte	0xa971
+	.4byte	0x95b8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39781,12 +39697,12 @@ __func__.7632:
 	.8byte	.LC64
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL444
-	.4byte	0x3edd
+	.8byte	.LVL419
+	.4byte	0x3ebe
 	.uleb128 0x34
-	.8byte	.LVL445
-	.4byte	0xa96f
-	.4byte	0x96e9
+	.8byte	.LVL420
+	.4byte	0xa971
+	.4byte	0x95ea
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39801,12 +39717,12 @@ __func__.7632:
 	.8byte	.LC65
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL447
-	.4byte	0x3e7c
+	.8byte	.LVL422
+	.4byte	0x3e5d
 	.uleb128 0x34
-	.8byte	.LVL448
-	.4byte	0xa96f
-	.4byte	0x971b
+	.8byte	.LVL423
+	.4byte	0xa971
+	.4byte	0x961c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39821,8 +39737,8 @@ __func__.7632:
 	.8byte	.LC66
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL453
-	.4byte	0xa96f
+	.8byte	.LVL428
+	.4byte	0xa971
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39837,143 +39753,149 @@ __func__.7632:
 	.8byte	.LC67
 	.byte	0
 	.byte	0
-	.uleb128 0x6d
-	.4byte	0x2a9d
+	.uleb128 0x6c
+	.4byte	0x2a88
 	.8byte	.LFB349
 	.8byte	.LFE349-.LFB349
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x979f
-	.uleb128 0x6e
-	.4byte	0x2ab8
+	.4byte	0x96a0
+	.uleb128 0x6d
+	.4byte	0x2aa3
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x6e
-	.4byte	0x2ac3
+	.uleb128 0x6d
+	.4byte	0x2aae
 	.uleb128 0x1
 	.byte	0x52
+	.uleb128 0x6e
+	.4byte	0x2a98
 	.uleb128 0x6f
-	.4byte	0x2aad
-	.uleb128 0x70
-	.4byte	0x2ace
+	.4byte	0x2ab9
 	.4byte	.LLST0
-	.uleb128 0x71
-	.4byte	0x2ad9
 	.uleb128 0x70
-	.4byte	0x2ae4
+	.4byte	0x2ac4
+	.uleb128 0x6f
+	.4byte	0x2acf
 	.4byte	.LLST1
-	.uleb128 0x72
-	.4byte	0x2aef
+	.uleb128 0x71
+	.4byte	0x2ada
 	.uleb128 0x1
 	.byte	0x56
-	.uleb128 0x72
-	.4byte	0x2afa
+	.uleb128 0x71
+	.4byte	0x2ae5
 	.uleb128 0x1
 	.byte	0x54
-	.uleb128 0x70
-	.4byte	0x2b05
+	.uleb128 0x6f
+	.4byte	0x2af0
 	.4byte	.LLST2
-	.uleb128 0x71
-	.4byte	0x2b10
+	.uleb128 0x70
+	.4byte	0x2afb
 	.byte	0
-	.uleb128 0x6d
-	.4byte	0x5413
-	.8byte	.LFB356
-	.8byte	.LFE356-.LFB356
+	.uleb128 0x6c
+	.4byte	0x53f4
+	.8byte	.LFB355
+	.8byte	.LFE355-.LFB355
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x97d0
+	.4byte	0x96d1
 	.uleb128 0x47
-	.4byte	0x5420
+	.4byte	0x5401
 	.4byte	.LLST3
-	.uleb128 0x6e
-	.4byte	0x542c
+	.uleb128 0x6d
+	.4byte	0x540d
 	.uleb128 0x6
 	.byte	0xfa
-	.4byte	0x542c
+	.4byte	0x540d
 	.byte	0x9f
 	.byte	0
-	.uleb128 0x6d
-	.4byte	0x8bc4
+	.uleb128 0x6c
+	.4byte	0x8ac5
 	.8byte	.LFB203
 	.8byte	.LFE203-.LFB203
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x97f3
-	.uleb128 0x6e
-	.4byte	0x8bd0
+	.4byte	0x96f4
+	.uleb128 0x6d
+	.4byte	0x8ad1
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0
-	.uleb128 0x6d
-	.4byte	0x872e
+	.uleb128 0x6c
+	.4byte	0x862f
 	.8byte	.LFB208
 	.8byte	.LFE208-.LFB208
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9837
+	.4byte	0x9738
 	.uleb128 0x47
-	.4byte	0x873f
+	.4byte	0x8640
 	.4byte	.LLST10
-	.uleb128 0x71
-	.4byte	0x874b
-	.uleb128 0x73
+	.uleb128 0x70
+	.4byte	0x864c
+	.uleb128 0x72
 	.4byte	.Ldebug_ranges0+0
-	.uleb128 0x6f
-	.4byte	0x873f
-	.uleb128 0x73
+	.uleb128 0x6e
+	.4byte	0x8640
+	.uleb128 0x72
 	.4byte	.Ldebug_ranges0+0
-	.uleb128 0x70
-	.4byte	0x9817
+	.uleb128 0x6f
+	.4byte	0x9718
 	.4byte	.LLST11
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x74
-	.4byte	0x7558
+	.uleb128 0x73
+	.4byte	0x7ca2
+	.8byte	.LFB216
+	.8byte	.LFE216-.LFB216
+	.uleb128 0x1
+	.byte	0x9c
+	.uleb128 0x73
+	.4byte	0x751a
 	.8byte	.LFB224
 	.8byte	.LFE224-.LFB224
 	.uleb128 0x1
 	.byte	0x9c
-	.uleb128 0x74
-	.4byte	0x6bcd
+	.uleb128 0x73
+	.4byte	0x6b8f
 	.8byte	.LFB238
 	.8byte	.LFE238-.LFB238
 	.uleb128 0x1
 	.byte	0x9c
-	.uleb128 0x74
-	.4byte	0x6bc1
+	.uleb128 0x73
+	.4byte	0x6b83
 	.8byte	.LFB239
 	.8byte	.LFE239-.LFB239
 	.uleb128 0x1
 	.byte	0x9c
-	.uleb128 0x6d
-	.4byte	0x6936
+	.uleb128 0x6c
+	.4byte	0x692c
 	.8byte	.LFB245
 	.8byte	.LFE245-.LFB245
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x991f
+	.4byte	0x9837
 	.uleb128 0x47
-	.4byte	0x6942
-	.4byte	.LLST49
-	.uleb128 0x71
-	.4byte	0x694d
+	.4byte	0x6938
+	.4byte	.LLST43
+	.uleb128 0x70
+	.4byte	0x6943
 	.uleb128 0x63
-	.8byte	.LBB179
-	.8byte	.LBE179-.LBB179
-	.4byte	0x9909
+	.8byte	.LBB195
+	.8byte	.LBE195-.LBB195
+	.4byte	0x9821
 	.uleb128 0x47
-	.4byte	0x6942
-	.4byte	.LLST50
-	.uleb128 0x68
-	.8byte	.LBB180
-	.8byte	.LBE180-.LBB180
-	.uleb128 0x71
-	.4byte	0x98a0
+	.4byte	0x6938
+	.4byte	.LLST44
+	.uleb128 0x74
+	.8byte	.LBB196
+	.8byte	.LBE196-.LBB196
+	.uleb128 0x70
+	.4byte	0x97b8
 	.uleb128 0x2f
-	.8byte	.LVL139
-	.4byte	0xa94d
+	.8byte	.LVL119
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39991,13 +39913,13 @@ __func__.7632:
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x8
-	.byte	0xbd
+	.byte	0xdd
 	.byte	0
 	.byte	0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL137
-	.4byte	0x689c
+	.8byte	.LVL117
+	.4byte	0x6882
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40007,33 +39929,33 @@ __func__.7632:
 	.byte	0x50
 	.byte	0
 	.byte	0
-	.uleb128 0x6d
-	.4byte	0x695b
+	.uleb128 0x6c
+	.4byte	0x6951
 	.8byte	.LFB244
 	.8byte	.LFE244-.LFB244
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x99c2
+	.4byte	0x98da
 	.uleb128 0x47
-	.4byte	0x6967
-	.4byte	.LLST56
-	.uleb128 0x71
-	.4byte	0x6972
+	.4byte	0x695d
+	.4byte	.LLST50
+	.uleb128 0x70
+	.4byte	0x6968
 	.uleb128 0x63
-	.8byte	.LBB183
-	.8byte	.LBE183-.LBB183
-	.4byte	0x99ac
+	.8byte	.LBB199
+	.8byte	.LBE199-.LBB199
+	.4byte	0x98c4
 	.uleb128 0x47
-	.4byte	0x6967
-	.4byte	.LLST57
-	.uleb128 0x68
-	.8byte	.LBB184
-	.8byte	.LBE184-.LBB184
-	.uleb128 0x71
-	.4byte	0x9943
+	.4byte	0x695d
+	.4byte	.LLST51
+	.uleb128 0x74
+	.8byte	.LBB200
+	.8byte	.LBE200-.LBB200
+	.uleb128 0x70
+	.4byte	0x985b
 	.uleb128 0x2f
-	.8byte	.LVL159
-	.4byte	0xa94d
+	.8byte	.LVL139
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40051,13 +39973,13 @@ __func__.7632:
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x8
-	.byte	0xb6
+	.byte	0xd6
 	.byte	0
 	.byte	0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL157
-	.4byte	0x681b
+	.8byte	.LVL137
+	.4byte	0x6801
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40067,68 +39989,68 @@ __func__.7632:
 	.byte	0x50
 	.byte	0
 	.byte	0
-	.uleb128 0x6d
-	.4byte	0x65c5
+	.uleb128 0x6c
+	.4byte	0x65ab
 	.8byte	.LFB252
 	.8byte	.LFE252-.LFB252
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9b1f
+	.4byte	0x9a37
 	.uleb128 0x47
-	.4byte	0x65d6
-	.4byte	.LLST70
-	.uleb128 0x71
-	.4byte	0x65e2
-	.uleb128 0x71
-	.4byte	0x65ee
-	.uleb128 0x71
-	.4byte	0x65fa
-	.uleb128 0x71
-	.4byte	0x6606
-	.uleb128 0x71
-	.4byte	0x6612
-	.uleb128 0x71
-	.4byte	0x661e
-	.uleb128 0x71
-	.4byte	0x662a
-	.uleb128 0x71
-	.4byte	0x6636
-	.uleb128 0x68
-	.8byte	.LBB187
-	.8byte	.LBE187-.LBB187
-	.uleb128 0x47
-	.4byte	0x65d6
-	.4byte	.LLST71
-	.uleb128 0x68
-	.8byte	.LBB188
-	.8byte	.LBE188-.LBB188
+	.4byte	0x65bc
+	.4byte	.LLST64
 	.uleb128 0x70
-	.4byte	0x99e6
-	.4byte	.LLST72
+	.4byte	0x65c8
 	.uleb128 0x70
-	.4byte	0x99eb
-	.4byte	.LLST73
+	.4byte	0x65d4
 	.uleb128 0x70
-	.4byte	0x99f0
-	.4byte	.LLST74
+	.4byte	0x65e0
 	.uleb128 0x70
-	.4byte	0x99f5
-	.4byte	.LLST75
+	.4byte	0x65ec
 	.uleb128 0x70
-	.4byte	0x99fa
-	.4byte	.LLST76
+	.4byte	0x65f8
 	.uleb128 0x70
-	.4byte	0x99ff
-	.4byte	.LLST77
+	.4byte	0x6604
 	.uleb128 0x70
-	.4byte	0x9a04
-	.4byte	.LLST78
-	.uleb128 0x71
-	.4byte	0x9a09
+	.4byte	0x6610
+	.uleb128 0x70
+	.4byte	0x661c
+	.uleb128 0x74
+	.8byte	.LBB203
+	.8byte	.LBE203-.LBB203
+	.uleb128 0x47
+	.4byte	0x65bc
+	.4byte	.LLST65
+	.uleb128 0x74
+	.8byte	.LBB204
+	.8byte	.LBE204-.LBB204
+	.uleb128 0x6f
+	.4byte	0x98fe
+	.4byte	.LLST66
+	.uleb128 0x6f
+	.4byte	0x9903
+	.4byte	.LLST67
+	.uleb128 0x6f
+	.4byte	0x9908
+	.4byte	.LLST68
+	.uleb128 0x6f
+	.4byte	0x990d
+	.4byte	.LLST69
+	.uleb128 0x6f
+	.4byte	0x9912
+	.4byte	.LLST70
+	.uleb128 0x6f
+	.4byte	0x9917
+	.4byte	.LLST71
+	.uleb128 0x6f
+	.4byte	0x991c
+	.4byte	.LLST72
+	.uleb128 0x70
+	.4byte	0x9921
 	.uleb128 0x34
-	.8byte	.LVL205
-	.4byte	0xa94d
-	.4byte	0x9ab0
+	.8byte	.LVL189
+	.4byte	0xa94f
+	.4byte	0x99c8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40146,18 +40068,18 @@ __func__.7632:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x1aa
+	.2byte	0x1d6
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL213
-	.4byte	0x6761
-	.4byte	0x9ad5
+	.8byte	.LVL199
+	.4byte	0x6747
+	.4byte	0x99ed
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR42
+	.8byte	.LANCHOR41
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -40166,9 +40088,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL214
-	.4byte	0xa94d
-	.4byte	0x9b08
+	.8byte	.LVL200
+	.4byte	0xa94f
+	.4byte	0x9a20
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40186,11 +40108,11 @@ __func__.7632:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x1b3
+	.2byte	0x1e1
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL215
-	.4byte	0x6936
+	.8byte	.LVL201
+	.4byte	0x692c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40201,113 +40123,51 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x6d
-	.4byte	0x6302
-	.8byte	.LFB255
-	.8byte	.LFE255-.LFB255
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x9bd7
-	.uleb128 0x47
-	.4byte	0x6313
-	.4byte	.LLST79
-	.uleb128 0x70
-	.4byte	0x631f
-	.4byte	.LLST80
-	.uleb128 0x70
-	.4byte	0x632b
-	.4byte	.LLST81
-	.uleb128 0x71
-	.4byte	0x6337
-	.uleb128 0x63
-	.8byte	.LBB191
-	.8byte	.LBE191-.LBB191
-	.4byte	0x9bc9
-	.uleb128 0x47
-	.4byte	0x6313
-	.4byte	.LLST82
-	.uleb128 0x68
-	.8byte	.LBB192
-	.8byte	.LBE192-.LBB192
-	.uleb128 0x71
-	.4byte	0x9b43
-	.uleb128 0x71
-	.4byte	0x9b4c
-	.uleb128 0x71
-	.4byte	0x9b55
-	.uleb128 0x36
-	.8byte	.LVL221
-	.4byte	0xa94d
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR55
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x214
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL223
-	.4byte	0x6980
-	.byte	0
-	.uleb128 0x6d
-	.4byte	0x5944
+	.uleb128 0x6c
+	.4byte	0x592a
 	.8byte	.LFB266
 	.8byte	.LFE266-.LFB266
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9c1d
+	.4byte	0x9a7d
 	.uleb128 0x47
-	.4byte	0x5951
-	.4byte	.LLST86
+	.4byte	0x5937
+	.4byte	.LLST76
 	.uleb128 0x75
-	.4byte	0x595d
+	.4byte	0x5943
 	.byte	0
-	.uleb128 0x73
+	.uleb128 0x72
 	.4byte	.Ldebug_ranges0+0x60
-	.uleb128 0x6e
-	.4byte	0x5951
+	.uleb128 0x6d
+	.4byte	0x5937
 	.uleb128 0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.uleb128 0x73
+	.uleb128 0x72
 	.4byte	.Ldebug_ranges0+0x60
-	.uleb128 0x71
-	.4byte	0x9bfb
+	.uleb128 0x70
+	.4byte	0x9a5b
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x6d
-	.4byte	0x5413
+	.uleb128 0x6c
+	.4byte	0x53f4
 	.8byte	.LFB272
 	.8byte	.LFE272-.LFB272
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9c69
+	.4byte	0x9ac9
 	.uleb128 0x47
-	.4byte	0x5420
-	.4byte	.LLST87
+	.4byte	0x5401
+	.4byte	.LLST77
 	.uleb128 0x47
-	.4byte	0x542c
-	.4byte	.LLST88
+	.4byte	0x540d
+	.4byte	.LLST78
 	.uleb128 0x2f
-	.8byte	.LVL257
-	.4byte	0x979f
+	.8byte	.LVL232
+	.4byte	0x96a0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40316,59 +40176,59 @@ __func__.7632:
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x3e
-	.4byte	0x542c
+	.4byte	0x540d
 	.uleb128 0x3
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0
 	.byte	0
-	.uleb128 0x6d
-	.4byte	0x476a
+	.uleb128 0x6c
+	.4byte	0x474b
 	.8byte	.LFB282
 	.8byte	.LFE282-.LFB282
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9cc7
-	.uleb128 0x6e
-	.4byte	0x4777
+	.4byte	0x9b27
+	.uleb128 0x6d
+	.4byte	0x4758
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x71
-	.4byte	0x4783
-	.uleb128 0x68
-	.8byte	.LBB203
-	.8byte	.LBE203-.LBB203
-	.uleb128 0x47
-	.4byte	0x4777
-	.4byte	.LLST93
-	.uleb128 0x68
-	.8byte	.LBB204
-	.8byte	.LBE204-.LBB204
 	.uleb128 0x70
-	.4byte	0x9c8b
-	.4byte	.LLST94
+	.4byte	0x4764
+	.uleb128 0x74
+	.8byte	.LBB215
+	.8byte	.LBE215-.LBB215
+	.uleb128 0x47
+	.4byte	0x4758
+	.4byte	.LLST83
+	.uleb128 0x74
+	.8byte	.LBB216
+	.8byte	.LBE216-.LBB216
+	.uleb128 0x6f
+	.4byte	0x9aeb
+	.4byte	.LLST84
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x6d
-	.4byte	0x3d92
+	.uleb128 0x6c
+	.4byte	0x3d63
 	.8byte	.LFB297
 	.8byte	.LFE297-.LFB297
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9d10
+	.4byte	0x9b70
 	.uleb128 0x47
-	.4byte	0x3da3
-	.4byte	.LLST121
-	.uleb128 0x73
+	.4byte	0x3d74
+	.4byte	.LLST112
+	.uleb128 0x72
 	.4byte	.Ldebug_ranges0+0xa0
 	.uleb128 0x47
-	.4byte	0x3da3
-	.4byte	.LLST122
+	.4byte	0x3d74
+	.4byte	.LLST113
 	.uleb128 0x36
-	.8byte	.LVL504
-	.4byte	0x695b
+	.8byte	.LVL481
+	.4byte	0x6951
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40379,67 +40239,208 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x6d
-	.4byte	0x2ec4
+	.uleb128 0x6c
+	.4byte	0x2eaf
 	.8byte	.LFB316
 	.8byte	.LFE316-.LFB316
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9d46
+	.4byte	0x9ba6
 	.uleb128 0x45
-	.8byte	.LVL576
-	.4byte	0x6d71
+	.8byte	.LVL553
+	.4byte	0x6d33
 	.uleb128 0x45
-	.8byte	.LVL577
-	.4byte	0x2f73
+	.8byte	.LVL554
+	.4byte	0x2f5e
 	.byte	0
-	.uleb128 0x6d
-	.4byte	0x2e1a
+	.uleb128 0x6c
+	.4byte	0x6b48
+	.8byte	.LFB240
+	.8byte	.LFE240-.LFB240
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x9c75
+	.uleb128 0x47
+	.4byte	0x6b54
+	.4byte	.LLST175
+	.uleb128 0x47
+	.4byte	0x6b5f
+	.4byte	.LLST176
+	.uleb128 0x76
+	.4byte	0x6b83
+	.8byte	.LBB241
+	.8byte	.LBE241-.LBB241
+	.byte	0x2
+	.byte	0x65
+	.uleb128 0x74
+	.8byte	.LBB243
+	.8byte	.LBE243-.LBB243
+	.uleb128 0x47
+	.4byte	0x6b5f
+	.4byte	.LLST177
+	.uleb128 0x47
+	.4byte	0x6b54
+	.4byte	.LLST178
+	.uleb128 0x74
+	.8byte	.LBB244
+	.8byte	.LBE244-.LBB244
+	.uleb128 0x6f
+	.4byte	0x6b6b
+	.4byte	.LLST179
+	.uleb128 0x74
+	.8byte	.LBB245
+	.8byte	.LBE245-.LBB245
+	.uleb128 0x6f
+	.4byte	0x6b75
+	.4byte	.LLST180
+	.uleb128 0x34
+	.8byte	.LVL658
+	.4byte	0x6d33
+	.4byte	0x9c59
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL661
+	.4byte	0x270c
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x6c
+	.4byte	0x62e8
+	.8byte	.LFB255
+	.8byte	.LFE255-.LFB255
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x9d48
+	.uleb128 0x47
+	.4byte	0x62f9
+	.4byte	.LLST193
+	.uleb128 0x6f
+	.4byte	0x6305
+	.4byte	.LLST194
+	.uleb128 0x6f
+	.4byte	0x6311
+	.4byte	.LLST195
+	.uleb128 0x70
+	.4byte	0x631d
+	.uleb128 0x63
+	.8byte	.LBB258
+	.8byte	.LBE258-.LBB258
+	.4byte	0x9d1f
+	.uleb128 0x47
+	.4byte	0x62f9
+	.4byte	.LLST196
+	.uleb128 0x74
+	.8byte	.LBB259
+	.8byte	.LBE259-.LBB259
+	.uleb128 0x70
+	.4byte	0x9c99
+	.uleb128 0x70
+	.4byte	0x9ca2
+	.uleb128 0x70
+	.4byte	0x9cab
+	.uleb128 0x36
+	.8byte	.LVL736
+	.4byte	0xa94f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR116
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x245
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL733
+	.4byte	0x6976
+	.uleb128 0x36
+	.8byte	.LVL734
+	.4byte	0xa94f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC84
+	.byte	0
+	.byte	0
+	.uleb128 0x6c
+	.4byte	0x2e05
 	.8byte	.LFB318
 	.8byte	.LFE318-.LFB318
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9e40
+	.4byte	0x9e42
 	.uleb128 0x75
-	.4byte	0x2e2b
+	.4byte	0x2e16
 	.byte	0
-	.uleb128 0x71
-	.4byte	0x2e37
-	.uleb128 0x71
-	.4byte	0x2e41
-	.uleb128 0x71
-	.4byte	0x2e4d
+	.uleb128 0x70
+	.4byte	0x2e22
+	.uleb128 0x70
+	.4byte	0x2e2c
+	.uleb128 0x70
+	.4byte	0x2e38
 	.uleb128 0x40
-	.4byte	.Ldebug_ranges0+0x130
-	.4byte	0x9e15
-	.uleb128 0x71
-	.4byte	0x9d61
+	.4byte	.Ldebug_ranges0+0x1c0
+	.4byte	0x9e17
 	.uleb128 0x70
-	.4byte	0x9d67
-	.4byte	.LLST253
-	.uleb128 0x72
-	.4byte	0x9d6c
+	.4byte	0x9d63
+	.uleb128 0x6f
+	.4byte	0x9d69
+	.4byte	.LLST252
+	.uleb128 0x71
+	.4byte	0x9d6e
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -100
-	.uleb128 0x72
-	.4byte	0x9d71
+	.uleb128 0x71
+	.4byte	0x9d73
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -64
 	.uleb128 0x63
-	.8byte	.LBB234
-	.8byte	.LBE234-.LBB234
-	.4byte	0x9dfa
-	.uleb128 0x72
-	.4byte	0x2e5e
+	.8byte	.LBB269
+	.8byte	.LBE269-.LBB269
+	.4byte	0x9dfc
+	.uleb128 0x71
+	.4byte	0x2e49
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -96
 	.uleb128 0x34
-	.8byte	.LVL968
-	.4byte	0x29a4
-	.4byte	0x9ddf
+	.8byte	.LVL970
+	.4byte	0x298f
+	.4byte	0x9de1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40458,15 +40459,15 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL969
-	.4byte	0x6d71
+	.8byte	.LVL971
+	.4byte	0x6d33
 	.uleb128 0x45
-	.8byte	.LVL970
-	.4byte	0x2f73
+	.8byte	.LVL972
+	.4byte	0x2f5e
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL967
-	.4byte	0x5c36
+	.8byte	.LVL969
+	.4byte	0x5c1c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -40480,11 +40481,11 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.byte	0
-	.uleb128 0x68
-	.8byte	.LBB241
-	.8byte	.LBE241-.LBB241
-	.uleb128 0x72
-	.4byte	0x2e6c
+	.uleb128 0x74
+	.8byte	.LBB276
+	.8byte	.LBE276-.LBB276
+	.uleb128 0x71
+	.4byte	0x2e57
 	.uleb128 0x12
 	.byte	0x40
 	.byte	0x45
@@ -40499,51 +40500,51 @@ __func__.7632:
 	.byte	0x9f
 	.byte	0
 	.byte	0
-	.uleb128 0x6d
-	.4byte	0x26cd
+	.uleb128 0x6c
+	.4byte	0x26b8
 	.8byte	.LFB344
 	.8byte	.LFE344-.LFB344
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9f74
+	.4byte	0x9f76
 	.uleb128 0x47
-	.4byte	0x26dd
-	.4byte	.LLST299
+	.4byte	0x26c8
+	.4byte	.LLST298
 	.uleb128 0x75
-	.4byte	0x26e8
+	.4byte	0x26d3
 	.byte	0
-	.uleb128 0x71
-	.4byte	0x26f3
-	.uleb128 0x71
-	.4byte	0x26fe
-	.uleb128 0x68
-	.8byte	.LBB246
-	.8byte	.LBE246-.LBB246
+	.uleb128 0x70
+	.4byte	0x26de
+	.uleb128 0x70
+	.4byte	0x26e9
+	.uleb128 0x74
+	.8byte	.LBB281
+	.8byte	.LBE281-.LBB281
 	.uleb128 0x47
-	.4byte	0x26dd
-	.4byte	.LLST300
-	.uleb128 0x68
-	.8byte	.LBB247
-	.8byte	.LBE247-.LBB247
+	.4byte	0x26c8
+	.4byte	.LLST299
+	.uleb128 0x74
+	.8byte	.LBB282
+	.8byte	.LBE282-.LBB282
+	.uleb128 0x70
+	.4byte	0x9e66
 	.uleb128 0x71
-	.4byte	0x9e64
-	.uleb128 0x72
-	.4byte	0x9e6a
+	.4byte	0x9e6c
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -64
-	.uleb128 0x72
-	.4byte	0x9e6f
+	.uleb128 0x71
+	.4byte	0x9e71
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -96
-	.uleb128 0x76
-	.4byte	0x2709
+	.uleb128 0x77
+	.4byte	0x26f4
 	.8byte	.LDL1
 	.uleb128 0x34
-	.8byte	.LVL1220
-	.4byte	0x259f
-	.4byte	0x9ee7
+	.8byte	.LVL1222
+	.4byte	0x258a
+	.4byte	0x9ee9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40564,9 +40565,9 @@ __func__.7632:
 	.byte	0x20
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1222
-	.4byte	0x259f
-	.4byte	0x9f0a
+	.8byte	.LVL1224
+	.4byte	0x258a
+	.4byte	0x9f0c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40586,9 +40587,9 @@ __func__.7632:
 	.byte	0x38
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1223
-	.4byte	0x2721
-	.4byte	0x9f2c
+	.8byte	.LVL1225
+	.4byte	0x270c
+	.4byte	0x9f2e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40607,9 +40608,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1224
-	.4byte	0x27e7
-	.4byte	0x9f53
+	.8byte	.LVL1226
+	.4byte	0x27d2
+	.4byte	0x9f55
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40633,8 +40634,8 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1226
-	.4byte	0x2721
+	.8byte	.LVL1228
+	.4byte	0x270c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40655,51 +40656,51 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x6d
-	.4byte	0x2e7a
+	.uleb128 0x6c
+	.4byte	0x2e65
 	.8byte	.LFB317
 	.8byte	.LFE317-.LFB317
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0xa04d
+	.4byte	0xa04f
 	.uleb128 0x47
-	.4byte	0x2e8b
-	.4byte	.LLST320
-	.uleb128 0x71
-	.4byte	0x2e97
-	.uleb128 0x71
-	.4byte	0x2ea3
-	.uleb128 0x71
-	.4byte	0x2ead
-	.uleb128 0x71
-	.4byte	0x2eb7
-	.uleb128 0x73
-	.4byte	.Ldebug_ranges0+0x1b0
-	.uleb128 0x6f
-	.4byte	0x2e8b
-	.uleb128 0x73
-	.4byte	.Ldebug_ranges0+0x1b0
+	.4byte	0x2e76
+	.4byte	.LLST319
 	.uleb128 0x70
-	.4byte	0x9f98
-	.4byte	.LLST321
+	.4byte	0x2e82
+	.uleb128 0x70
+	.4byte	0x2e8e
+	.uleb128 0x70
+	.4byte	0x2e98
+	.uleb128 0x70
+	.4byte	0x2ea2
 	.uleb128 0x72
-	.4byte	0x9f9d
+	.4byte	.Ldebug_ranges0+0x240
+	.uleb128 0x6e
+	.4byte	0x2e76
+	.uleb128 0x72
+	.4byte	.Ldebug_ranges0+0x240
+	.uleb128 0x6f
+	.4byte	0x9f9a
+	.4byte	.LLST320
+	.uleb128 0x71
+	.4byte	0x9f9f
 	.uleb128 0x1
 	.byte	0x64
-	.uleb128 0x70
-	.4byte	0x9fa2
-	.4byte	.LLST322
-	.uleb128 0x72
-	.4byte	0x9fa7
+	.uleb128 0x6f
+	.4byte	0x9fa4
+	.4byte	.LLST321
+	.uleb128 0x71
+	.4byte	0x9fa9
 	.uleb128 0x1
 	.byte	0x6a
 	.uleb128 0x45
-	.8byte	.LVL1313
-	.4byte	0x2ec4
+	.8byte	.LVL1315
+	.4byte	0x2eaf
 	.uleb128 0x34
-	.8byte	.LVL1316
-	.4byte	0x6e0c
-	.4byte	0xa000
+	.8byte	.LVL1318
+	.4byte	0x6dce
+	.4byte	0xa002
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -40708,15 +40709,15 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1320
-	.4byte	0xa94d
-	.4byte	0xa025
+	.8byte	.LVL1322
+	.4byte	0xa94f
+	.4byte	0xa027
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC97
+	.8byte	.LC100
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -40725,9 +40726,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1321
-	.4byte	0x75ef
-	.4byte	0xa03d
+	.8byte	.LVL1323
+	.4byte	0x75b1
+	.4byte	0xa03f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40736,45 +40737,45 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1322
-	.4byte	0x7342
+	.8byte	.LVL1324
+	.4byte	0x7304
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x6d
-	.4byte	0x37c4
+	.uleb128 0x6c
+	.4byte	0x3795
 	.8byte	.LFB301
 	.8byte	.LFE301-.LFB301
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0xa178
+	.4byte	0xa17a
 	.uleb128 0x47
-	.4byte	0x37d5
-	.4byte	.LLST323
-	.uleb128 0x71
-	.4byte	0x37e1
+	.4byte	0x37a6
+	.4byte	.LLST322
+	.uleb128 0x70
+	.4byte	0x37b2
 	.uleb128 0x63
-	.8byte	.LBB260
-	.8byte	.LBE260-.LBB260
-	.4byte	0xa163
+	.8byte	.LBB295
+	.8byte	.LBE295-.LBB295
+	.4byte	0xa165
 	.uleb128 0x47
-	.4byte	0x37d5
-	.4byte	.LLST324
-	.uleb128 0x68
-	.8byte	.LBB261
-	.8byte	.LBE261-.LBB261
-	.uleb128 0x71
-	.4byte	0xa071
+	.4byte	0x37a6
+	.4byte	.LLST323
+	.uleb128 0x74
+	.8byte	.LBB296
+	.8byte	.LBE296-.LBB296
+	.uleb128 0x70
+	.4byte	0xa073
 	.uleb128 0x34
-	.8byte	.LVL1331
-	.4byte	0x6761
-	.4byte	0xa0cf
+	.8byte	.LVL1333
+	.4byte	0x6747
+	.4byte	0xa0d1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR42
+	.8byte	.LANCHOR41
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -40783,9 +40784,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1332
-	.4byte	0xa94d
-	.4byte	0xa102
+	.8byte	.LVL1334
+	.4byte	0xa94f
+	.4byte	0xa104
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40797,18 +40798,18 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR159
+	.8byte	.LANCHOR158
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xa88
+	.2byte	0xabb
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1333
-	.4byte	0x3d92
-	.4byte	0xa11a
+	.8byte	.LVL1335
+	.4byte	0x3d63
+	.4byte	0xa11c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40817,9 +40818,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1334
-	.4byte	0x2e7a
-	.4byte	0xa132
+	.8byte	.LVL1336
+	.4byte	0x2e65
+	.4byte	0xa134
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40828,8 +40829,8 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1335
-	.4byte	0xa94d
+	.8byte	.LVL1337
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40841,19 +40842,19 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR159
+	.8byte	.LANCHOR158
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xa8b
+	.2byte	0xabe
 	.byte	0
 	.byte	0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1338
-	.4byte	0x65c5
+	.8byte	.LVL1340
+	.4byte	0x65ab
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40862,38 +40863,38 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x6d
-	.4byte	0x5843
+	.uleb128 0x6c
+	.4byte	0x5829
 	.8byte	.LFB268
 	.8byte	.LFE268-.LFB268
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0xa271
-	.uleb128 0x73
-	.4byte	.Ldebug_ranges0+0x1f0
-	.uleb128 0x70
-	.4byte	0x5851
-	.4byte	.LLST327
+	.4byte	0xa273
 	.uleb128 0x72
-	.4byte	0x585d
+	.4byte	.Ldebug_ranges0+0x280
+	.uleb128 0x6f
+	.4byte	0x5837
+	.4byte	.LLST326
+	.uleb128 0x71
+	.4byte	0x5843
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -36
-	.uleb128 0x70
-	.4byte	0x5869
-	.4byte	.LLST328
-	.uleb128 0x72
-	.4byte	0x5875
+	.uleb128 0x6f
+	.4byte	0x584f
+	.4byte	.LLST327
+	.uleb128 0x71
+	.4byte	0x585b
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -32
-	.uleb128 0x70
-	.4byte	0x5881
-	.4byte	.LLST329
+	.uleb128 0x6f
+	.4byte	0x5867
+	.4byte	.LLST328
 	.uleb128 0x34
-	.8byte	.LVL1351
-	.4byte	0x5c36
-	.4byte	0xa1e7
+	.8byte	.LVL1353
+	.4byte	0x5c1c
+	.4byte	0xa1e9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40913,9 +40914,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1353
-	.4byte	0x29a4
-	.4byte	0xa20a
+	.8byte	.LVL1355
+	.4byte	0x298f
+	.4byte	0xa20c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40934,9 +40935,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1357
-	.4byte	0x259f
-	.4byte	0xa222
+	.8byte	.LVL1359
+	.4byte	0x258a
+	.4byte	0xa224
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -40945,9 +40946,9 @@ __func__.7632:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1359
-	.4byte	0x3804
-	.4byte	0xa23a
+	.8byte	.LVL1361
+	.4byte	0x37d5
+	.4byte	0xa23c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40956,9 +40957,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1360
-	.4byte	0x27e7
-	.4byte	0xa262
+	.8byte	.LVL1362
+	.4byte	0x27d2
+	.4byte	0xa264
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40982,20 +40983,20 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1361
-	.4byte	0x36c0
+	.8byte	.LVL1363
+	.4byte	0x3691
 	.byte	0
 	.byte	0
-	.uleb128 0x6d
-	.4byte	0x44bf
+	.uleb128 0x6c
+	.4byte	0x44a0
 	.8byte	.LFB286
 	.8byte	.LFE286-.LFB286
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0xa2b2
+	.4byte	0xa2b4
 	.uleb128 0x2f
-	.8byte	.LVL1621
-	.4byte	0x5af8
+	.8byte	.LVL1623
+	.4byte	0x5ade
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41011,20 +41012,20 @@ __func__.7632:
 	.byte	0x52
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR83
+	.8byte	.LANCHOR81
 	.byte	0
 	.byte	0
-	.uleb128 0x6d
-	.4byte	0x5439
+	.uleb128 0x6c
+	.4byte	0x541a
 	.8byte	.LFB271
 	.8byte	.LFE271-.LFB271
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0xa325
+	.4byte	0xa327
 	.uleb128 0x34
-	.8byte	.LVL1658
-	.4byte	0x59d0
-	.4byte	0xa2e5
+	.8byte	.LVL1660
+	.4byte	0x59b6
+	.4byte	0xa2e7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41033,9 +41034,9 @@ __func__.7632:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1659
-	.4byte	0xa94d
-	.4byte	0xa311
+	.8byte	.LVL1661
+	.4byte	0xa94f
+	.4byte	0xa313
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41047,11 +41048,11 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC100
+	.8byte	.LC103
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1660
-	.4byte	0x259f
+	.8byte	.LVL1662
+	.4byte	0x258a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -41059,17 +41060,17 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.byte	0
-	.uleb128 0x6d
-	.4byte	0x313f
+	.uleb128 0x6c
+	.4byte	0x311d
 	.8byte	.LFB311
 	.8byte	.LFE311-.LFB311
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0xa38b
+	.4byte	0xa38d
 	.uleb128 0x34
-	.8byte	.LVL1801
-	.4byte	0x3148
-	.4byte	0xa358
+	.8byte	.LVL1799
+	.4byte	0x3126
+	.4byte	0xa35a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41078,9 +41079,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1802
-	.4byte	0x588f
-	.4byte	0xa377
+	.8byte	.LVL1800
+	.4byte	0x5875
+	.4byte	0xa379
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41089,8 +41090,8 @@ __func__.7632:
 	.8byte	.LANCHOR144
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1803
-	.4byte	0x3320
+	.8byte	.LVL1801
+	.4byte	0x32fe
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41098,103 +41099,103 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.byte	0
-	.uleb128 0x6d
-	.4byte	0x2d32
+	.uleb128 0x6c
+	.4byte	0x2d1d
 	.8byte	.LFB319
 	.8byte	.LFE319-.LFB319
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0xa74d
+	.4byte	0xa742
 	.uleb128 0x47
-	.4byte	0x2d43
-	.4byte	.LLST413
+	.4byte	0x2d2e
+	.4byte	.LLST412
 	.uleb128 0x47
-	.4byte	0x2d4f
-	.4byte	.LLST414
+	.4byte	0x2d3a
+	.4byte	.LLST413
 	.uleb128 0x75
-	.4byte	0x2d5b
+	.4byte	0x2d46
 	.byte	0x1
-	.uleb128 0x71
-	.4byte	0x2d67
-	.uleb128 0x71
-	.4byte	0x2d73
-	.uleb128 0x77
-	.4byte	0x2d7f
+	.uleb128 0x70
+	.4byte	0x2d52
+	.uleb128 0x70
+	.4byte	0x2d5e
+	.uleb128 0x78
+	.4byte	0x2d6a
 	.sleb128 -1
-	.uleb128 0x71
-	.4byte	0x2d8b
-	.uleb128 0x71
-	.4byte	0x2d97
-	.uleb128 0x71
-	.4byte	0x2da3
-	.uleb128 0x71
-	.4byte	0x2daf
-	.uleb128 0x71
-	.4byte	0x2dbb
-	.uleb128 0x71
-	.4byte	0x2dc7
-	.uleb128 0x71
-	.4byte	0x2de3
+	.uleb128 0x70
+	.4byte	0x2d76
+	.uleb128 0x70
+	.4byte	0x2d82
+	.uleb128 0x70
+	.4byte	0x2d8e
+	.uleb128 0x70
+	.4byte	0x2d9a
+	.uleb128 0x70
+	.4byte	0x2da6
+	.uleb128 0x70
+	.4byte	0x2db2
+	.uleb128 0x70
+	.4byte	0x2dce
 	.uleb128 0x40
-	.4byte	.Ldebug_ranges0+0x2a0
-	.4byte	0xa739
+	.4byte	.Ldebug_ranges0+0x330
+	.4byte	0xa72e
 	.uleb128 0x47
-	.4byte	0x2d4f
-	.4byte	.LLST415
+	.4byte	0x2d3a
+	.4byte	.LLST414
 	.uleb128 0x47
-	.4byte	0x2d43
+	.4byte	0x2d2e
+	.4byte	.LLST415
+	.uleb128 0x72
+	.4byte	.Ldebug_ranges0+0x330
+	.uleb128 0x70
+	.4byte	0xa3ba
+	.uleb128 0x6f
+	.4byte	0xa3c0
 	.4byte	.LLST416
-	.uleb128 0x73
-	.4byte	.Ldebug_ranges0+0x2a0
 	.uleb128 0x71
-	.4byte	0xa3b8
-	.uleb128 0x70
-	.4byte	0xa3be
-	.4byte	.LLST417
-	.uleb128 0x72
-	.4byte	0xa3c3
+	.4byte	0xa3c5
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -4
-	.uleb128 0x71
-	.4byte	0xa3c8
 	.uleb128 0x70
-	.4byte	0xa3ce
+	.4byte	0xa3ca
+	.uleb128 0x6f
+	.4byte	0xa3d0
+	.4byte	.LLST417
+	.uleb128 0x6f
+	.4byte	0xa3d5
 	.4byte	.LLST418
-	.uleb128 0x70
-	.4byte	0xa3d3
+	.uleb128 0x6f
+	.4byte	0xa3da
 	.4byte	.LLST419
-	.uleb128 0x70
-	.4byte	0xa3d8
+	.uleb128 0x6f
+	.4byte	0xa3df
 	.4byte	.LLST420
-	.uleb128 0x70
-	.4byte	0xa3dd
+	.uleb128 0x6f
+	.4byte	0xa3e4
 	.4byte	.LLST421
-	.uleb128 0x70
-	.4byte	0xa3e2
+	.uleb128 0x6f
+	.4byte	0xa3e9
 	.4byte	.LLST422
+	.uleb128 0x79
+	.4byte	0x2dbe
+	.uleb128 0x79
+	.4byte	0x2dc6
 	.uleb128 0x70
-	.4byte	0xa3e7
-	.4byte	.LLST423
-	.uleb128 0x78
-	.4byte	0x2dd3
-	.uleb128 0x78
-	.4byte	0x2ddb
-	.uleb128 0x71
-	.4byte	0xa3ec
+	.4byte	0xa3ee
 	.uleb128 0x40
-	.4byte	.Ldebug_ranges0+0x2d0
-	.4byte	0xa4ee
-	.uleb128 0x70
-	.4byte	0x2df1
-	.4byte	.LLST424
+	.4byte	.Ldebug_ranges0+0x360
+	.4byte	0xa4f0
+	.uleb128 0x6f
+	.4byte	0x2ddc
+	.4byte	.LLST423
 	.uleb128 0x45
-	.8byte	.LVL1836
-	.4byte	0x3db0
+	.8byte	.LVL1833
+	.4byte	0x3d81
 	.uleb128 0x34
-	.8byte	.LVL1839
-	.4byte	0x6644
-	.4byte	0xa4a8
+	.8byte	.LVL1836
+	.4byte	0x662a
+	.4byte	0xa4aa
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41203,9 +41204,9 @@ __func__.7632:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1842
-	.4byte	0x6644
-	.4byte	0xa4bf
+	.8byte	.LVL1839
+	.4byte	0x662a
+	.4byte	0xa4c1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41213,17 +41214,17 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1845
-	.4byte	0x2ec4
+	.8byte	.LVL1842
+	.4byte	0x2eaf
 	.uleb128 0x36
-	.8byte	.LVL1854
-	.4byte	0xa94d
+	.8byte	.LVL1851
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC104
+	.8byte	.LC107
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -41233,12 +41234,12 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1866
-	.4byte	0x35af
+	.8byte	.LVL1863
+	.4byte	0x3580
 	.uleb128 0x34
-	.8byte	.LVL1867
-	.4byte	0x460e
-	.4byte	0xa513
+	.8byte	.LVL1864
+	.4byte	0x45ef
+	.4byte	0xa515
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41247,9 +41248,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1869
-	.4byte	0x6644
-	.4byte	0xa52b
+	.8byte	.LVL1866
+	.4byte	0x662a
+	.4byte	0xa52d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41258,12 +41259,12 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1874
-	.4byte	0x2e1a
+	.8byte	.LVL1871
+	.4byte	0x2e05
 	.uleb128 0x34
-	.8byte	.LVL1876
-	.4byte	0x6644
-	.4byte	0xa54f
+	.8byte	.LVL1873
+	.4byte	0x662a
+	.4byte	0xa551
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41271,9 +41272,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1878
-	.4byte	0x36c0
-	.4byte	0xa567
+	.8byte	.LVL1875
+	.4byte	0x3691
+	.4byte	0xa569
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41282,9 +41283,9 @@ __func__.7632:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1883
-	.4byte	0x35af
-	.4byte	0xa57f
+	.8byte	.LVL1880
+	.4byte	0x3580
+	.4byte	0xa581
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41293,9 +41294,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1884
-	.4byte	0x36c0
-	.4byte	0xa597
+	.8byte	.LVL1881
+	.4byte	0x3691
+	.4byte	0xa599
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41304,9 +41305,9 @@ __func__.7632:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1885
-	.4byte	0xa94d
-	.4byte	0xa5ca
+	.8byte	.LVL1882
+	.4byte	0xa94f
+	.4byte	0xa5cc
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41318,18 +41319,18 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR177
+	.8byte	.LANCHOR175
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x296
+	.2byte	0x292
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1886
-	.4byte	0xa94d
-	.4byte	0xa5fd
+	.8byte	.LVL1883
+	.4byte	0xa94f
+	.4byte	0xa5ff
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41341,18 +41342,18 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR177
+	.8byte	.LANCHOR175
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x297
+	.2byte	0x293
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1887
-	.4byte	0xa94d
-	.4byte	0xa630
+	.8byte	.LVL1884
+	.4byte	0xa94f
+	.4byte	0xa632
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41364,18 +41365,18 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR177
+	.8byte	.LANCHOR175
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x298
+	.2byte	0x294
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1888
-	.4byte	0x460e
-	.4byte	0xa648
+	.8byte	.LVL1885
+	.4byte	0x45ef
+	.4byte	0xa64a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41384,12 +41385,12 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1889
-	.4byte	0x2e1a
+	.8byte	.LVL1886
+	.4byte	0x2e05
 	.uleb128 0x34
-	.8byte	.LVL1903
-	.4byte	0x29a4
-	.4byte	0xa66d
+	.8byte	.LVL1900
+	.4byte	0x298f
+	.4byte	0xa66f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -41398,9 +41399,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1912
-	.4byte	0xa94d
-	.4byte	0xa6a0
+	.8byte	.LVL1909
+	.4byte	0xa94f
+	.4byte	0xa6a2
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41412,18 +41413,18 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR177
+	.8byte	.LANCHOR175
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x2bc
+	.2byte	0x2b8
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1914
-	.4byte	0x5c36
-	.4byte	0xa6be
+	.8byte	.LVL1911
+	.4byte	0x5c1c
+	.4byte	0xa6c0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -41437,12 +41438,12 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1915
-	.4byte	0x308d
+	.8byte	.LVL1912
+	.4byte	0x3078
 	.uleb128 0x34
-	.8byte	.LVL1916
-	.4byte	0x35ed
-	.4byte	0xa6e9
+	.8byte	.LVL1913
+	.4byte	0x35be
+	.4byte	0xa6eb
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41457,28 +41458,25 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1917
-	.4byte	0x2fc7
-	.uleb128 0x45
-	.8byte	.LVL1921
-	.4byte	0x2fc7
+	.8byte	.LVL1914
+	.4byte	0x2fb2
 	.uleb128 0x45
-	.8byte	.LVL1922
-	.4byte	0x37c4
+	.8byte	.LVL1918
+	.4byte	0x2fb2
 	.uleb128 0x45
-	.8byte	.LVL1923
-	.4byte	0x7d59
+	.8byte	.LVL1919
+	.4byte	0x3795
 	.uleb128 0x45
-	.8byte	.LVL1924
-	.4byte	0x5d63
+	.8byte	.LVL1920
+	.4byte	0x5d49
 	.uleb128 0x45
-	.8byte	.LVL1925
-	.4byte	0x5694
+	.8byte	.LVL1921
+	.4byte	0x567a
 	.byte	0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1849
-	.4byte	0x3320
+	.8byte	.LVL1846
+	.4byte	0x32fe
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41486,34 +41484,34 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.byte	0
-	.uleb128 0x6d
-	.4byte	0x3f98
+	.uleb128 0x6c
+	.4byte	0x3f79
 	.8byte	.LFB292
 	.8byte	.LFE292-.LFB292
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0xa92a
+	.4byte	0xa92c
 	.uleb128 0x75
-	.4byte	0x3fa9
+	.4byte	0x3f8a
 	.byte	0
 	.uleb128 0x63
-	.8byte	.LBB304
-	.8byte	.LBE304-.LBB304
-	.4byte	0xa894
-	.uleb128 0x71
-	.4byte	0xa768
-	.uleb128 0x63
-	.8byte	.LBB305
-	.8byte	.LBE305-.LBB305
-	.4byte	0xa7a7
+	.8byte	.LBB339
+	.8byte	.LBE339-.LBB339
+	.4byte	0xa896
 	.uleb128 0x70
-	.4byte	0x3fb4
-	.4byte	.LLST464
+	.4byte	0xa75d
+	.uleb128 0x63
+	.8byte	.LBB340
+	.8byte	.LBE340-.LBB340
+	.4byte	0xa79c
+	.uleb128 0x6f
+	.4byte	0x3f95
+	.4byte	.LLST463
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2106
-	.4byte	0x43a6
-	.4byte	0xa7bf
+	.8byte	.LVL2086
+	.4byte	0x4387
+	.4byte	0xa7b4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41522,9 +41520,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2107
-	.4byte	0x43a6
-	.4byte	0xa7d7
+	.8byte	.LVL2087
+	.4byte	0x4387
+	.4byte	0xa7cc
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41533,9 +41531,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2109
-	.4byte	0x588f
-	.4byte	0xa7f6
+	.8byte	.LVL2089
+	.4byte	0x5875
+	.4byte	0xa7eb
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41544,9 +41542,9 @@ __func__.7632:
 	.8byte	.LANCHOR144
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2110
-	.4byte	0x588f
-	.4byte	0xa815
+	.8byte	.LVL2090
+	.4byte	0x5875
+	.4byte	0xa80a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41555,24 +41553,24 @@ __func__.7632:
 	.8byte	.LANCHOR149
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2111
-	.4byte	0x5d63
+	.8byte	.LVL2091
+	.4byte	0x5d49
 	.uleb128 0x45
-	.8byte	.LVL2112
-	.4byte	0x5694
+	.8byte	.LVL2092
+	.4byte	0x567a
 	.uleb128 0x45
-	.8byte	.LVL2113
-	.4byte	0x5694
+	.8byte	.LVL2093
+	.4byte	0x567a
 	.uleb128 0x45
-	.8byte	.LVL2117
-	.4byte	0x2f73
+	.8byte	.LVL2094
+	.4byte	0x2f5e
 	.uleb128 0x45
-	.8byte	.LVL2118
-	.4byte	0x2f73
+	.8byte	.LVL2095
+	.4byte	0x2f5e
 	.uleb128 0x34
-	.8byte	.LVL2119
-	.4byte	0x3932
-	.4byte	0xa86e
+	.8byte	.LVL2096
+	.4byte	0x3903
+	.4byte	0xa863
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41581,9 +41579,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2120
-	.4byte	0x3932
-	.4byte	0xa886
+	.8byte	.LVL2097
+	.4byte	0x3903
+	.4byte	0xa87b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41592,42 +41590,45 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2121
-	.4byte	0x425d
+	.8byte	.LVL2098
+	.4byte	0x423e
+	.uleb128 0x45
+	.8byte	.LVL2102
+	.4byte	0x5d49
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2093
-	.4byte	0x6bd9
+	.8byte	.LVL2073
+	.4byte	0x6b9b
 	.uleb128 0x45
-	.8byte	.LVL2094
-	.4byte	0x5446
+	.8byte	.LVL2074
+	.4byte	0x5427
 	.uleb128 0x45
-	.8byte	.LVL2095
-	.4byte	0x5201
+	.8byte	.LVL2075
+	.4byte	0x51e2
 	.uleb128 0x45
-	.8byte	.LVL2096
-	.4byte	0x4f40
+	.8byte	.LVL2076
+	.4byte	0x4f21
 	.uleb128 0x45
-	.8byte	.LVL2097
-	.4byte	0x4fe5
+	.8byte	.LVL2077
+	.4byte	0x4fc6
 	.uleb128 0x45
-	.8byte	.LVL2098
-	.4byte	0x445e
+	.8byte	.LVL2078
+	.4byte	0x443f
 	.uleb128 0x45
-	.8byte	.LVL2099
-	.4byte	0x5439
+	.8byte	.LVL2079
+	.4byte	0x541a
 	.uleb128 0x45
-	.8byte	.LVL2100
-	.4byte	0x6a65
+	.8byte	.LVL2080
+	.4byte	0x6ade
 	.uleb128 0x45
-	.8byte	.LVL2101
-	.4byte	0x44c8
+	.8byte	.LVL2081
+	.4byte	0x44a9
 	.uleb128 0x45
-	.8byte	.LVL2102
-	.4byte	0x46c6
+	.8byte	.LVL2082
+	.4byte	0x46a7
 	.uleb128 0x36
-	.8byte	.LVL2103
-	.4byte	0x5944
+	.8byte	.LVL2083
+	.4byte	0x592a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41635,39 +41636,39 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.byte	0
-	.uleb128 0x79
-	.4byte	.LASF875
-	.4byte	.LASF875
+	.uleb128 0x7a
+	.4byte	.LASF873
+	.4byte	.LASF873
 	.byte	0xb
 	.byte	0x72
-	.uleb128 0x7a
-	.4byte	.LASF876
-	.4byte	.LASF876
+	.uleb128 0x7b
+	.4byte	.LASF874
+	.4byte	.LASF874
 	.byte	0x1c
 	.2byte	0x16d
-	.uleb128 0x7a
-	.4byte	.LASF877
-	.4byte	.LASF877
+	.uleb128 0x7b
+	.4byte	.LASF875
+	.4byte	.LASF875
 	.byte	0x1c
 	.2byte	0x16c
-	.uleb128 0x79
-	.4byte	.LASF878
-	.4byte	.LASF878
+	.uleb128 0x7a
+	.4byte	.LASF876
+	.4byte	.LASF876
 	.byte	0x1d
 	.byte	0x12
-	.uleb128 0x79
-	.4byte	.LASF879
-	.4byte	.LASF879
+	.uleb128 0x7a
+	.4byte	.LASF877
+	.4byte	.LASF877
 	.byte	0x6
 	.byte	0x35
-	.uleb128 0x7a
-	.4byte	.LASF880
-	.4byte	.LASF880
+	.uleb128 0x7b
+	.4byte	.LASF878
+	.4byte	.LASF878
 	.byte	0x1c
 	.2byte	0x399
-	.uleb128 0x79
-	.4byte	.LASF881
-	.4byte	.LASF881
+	.uleb128 0x7a
+	.4byte	.LASF879
+	.4byte	.LASF879
 	.byte	0x1e
 	.byte	0x6d
 	.byte	0
@@ -43077,18 +43078,16 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x66
-	.uleb128 0x1d
+	.uleb128 0xa
 	.byte	0
-	.uleb128 0x31
-	.uleb128 0x13
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x12
-	.uleb128 0x7
-	.uleb128 0x58
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
 	.uleb128 0xb
-	.uleb128 0x59
+	.uleb128 0x3b
 	.uleb128 0xb
+	.uleb128 0x11
+	.uleb128 0x1
 	.byte	0
 	.byte	0
 	.uleb128 0x67
@@ -43107,15 +43106,6 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x68
-	.uleb128 0xb
-	.byte	0x1
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x12
-	.uleb128 0x7
-	.byte	0
-	.byte	0
-	.uleb128 0x69
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -43134,7 +43124,7 @@ __func__.7632:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x6a
+	.uleb128 0x69
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -43145,7 +43135,7 @@ __func__.7632:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
+	.uleb128 0x6a
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -43162,7 +43152,7 @@ __func__.7632:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x6c
+	.uleb128 0x6b
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -43187,7 +43177,7 @@ __func__.7632:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x6d
+	.uleb128 0x6c
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x31
@@ -43204,7 +43194,7 @@ __func__.7632:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x6e
+	.uleb128 0x6d
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
@@ -43213,14 +43203,14 @@ __func__.7632:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x6f
+	.uleb128 0x6e
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x70
+	.uleb128 0x6f
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -43229,14 +43219,14 @@ __func__.7632:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x71
+	.uleb128 0x70
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x72
+	.uleb128 0x71
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -43245,14 +43235,14 @@ __func__.7632:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x73
+	.uleb128 0x72
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x55
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x74
+	.uleb128 0x73
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x31
@@ -43267,6 +43257,15 @@ __func__.7632:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
+	.uleb128 0x74
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.byte	0
+	.byte	0
 	.uleb128 0x75
 	.uleb128 0x34
 	.byte	0
@@ -43277,15 +43276,30 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x76
-	.uleb128 0xa
+	.uleb128 0x1d
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.uleb128 0x11
 	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0xb
 	.byte	0
 	.byte	0
 	.uleb128 0x77
+	.uleb128 0xa
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.byte	0
+	.byte	0
+	.uleb128 0x78
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -43294,14 +43308,14 @@ __func__.7632:
 	.uleb128 0xd
 	.byte	0
 	.byte	0
-	.uleb128 0x78
+	.uleb128 0x79
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x79
+	.uleb128 0x7a
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -43318,7 +43332,7 @@ __func__.7632:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x7a
+	.uleb128 0x7b
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -43338,12 +43352,12 @@ __func__.7632:
 	.byte	0
 	.section	.debug_loc,"",@progbits
 .Ldebug_loc0:
-.LLST470:
-	.8byte	.LVL2174
-	.8byte	.LVL2175-1
+.LLST469:
+	.8byte	.LVL2155
+	.8byte	.LVL2156-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2175-1
+	.8byte	.LVL2156-1
 	.8byte	.LFE348
 	.2byte	0x4
 	.byte	0xf3
@@ -43352,12 +43366,12 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST471:
-	.8byte	.LVL2174
-	.8byte	.LVL2175-1
+.LLST470:
+	.8byte	.LVL2155
+	.8byte	.LVL2156-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL2175-1
+	.8byte	.LVL2156-1
 	.8byte	.LFE348
 	.2byte	0x4
 	.byte	0xf3
@@ -43366,12 +43380,12 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST472:
-	.8byte	.LVL2174
-	.8byte	.LVL2175-1
+.LLST471:
+	.8byte	.LVL2155
+	.8byte	.LVL2156-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL2175-1
+	.8byte	.LVL2156-1
 	.8byte	.LFE348
 	.2byte	0x4
 	.byte	0xf3
@@ -43380,12 +43394,12 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST305:
-	.8byte	.LVL1242
-	.8byte	.LVL1243-1
+.LLST304:
+	.8byte	.LVL1244
+	.8byte	.LVL1245-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1243-1
+	.8byte	.LVL1245-1
 	.8byte	.LFE347
 	.2byte	0x4
 	.byte	0xf3
@@ -43394,12 +43408,12 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST306:
-	.8byte	.LVL1242
-	.8byte	.LVL1243-1
+.LLST305:
+	.8byte	.LVL1244
+	.8byte	.LVL1245-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1243-1
+	.8byte	.LVL1245-1
 	.8byte	.LFE347
 	.2byte	0x4
 	.byte	0xf3
@@ -43408,12 +43422,12 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST307:
-	.8byte	.LVL1242
-	.8byte	.LVL1243-1
+.LLST306:
+	.8byte	.LVL1244
+	.8byte	.LVL1245-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1243-1
+	.8byte	.LVL1245-1
 	.8byte	.LFE347
 	.2byte	0x4
 	.byte	0xf3
@@ -43422,12 +43436,12 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST198:
-	.8byte	.LVL739
-	.8byte	.LVL740-1
+.LLST197:
+	.8byte	.LVL741
+	.8byte	.LVL742-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL740-1
+	.8byte	.LVL742-1
 	.8byte	.LFE346
 	.2byte	0x4
 	.byte	0xf3
@@ -43436,12 +43450,12 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST199:
-	.8byte	.LVL739
-	.8byte	.LVL740-1
+.LLST198:
+	.8byte	.LVL741
+	.8byte	.LVL742-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL740-1
+	.8byte	.LVL742-1
 	.8byte	.LFE346
 	.2byte	0x4
 	.byte	0xf3
@@ -43450,12 +43464,12 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST200:
-	.8byte	.LVL739
-	.8byte	.LVL740-1
+.LLST199:
+	.8byte	.LVL741
+	.8byte	.LVL742-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL740-1
+	.8byte	.LVL742-1
 	.8byte	.LFE346
 	.2byte	0x4
 	.byte	0xf3
@@ -43464,89 +43478,89 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST301:
-	.8byte	.LVL1228
-	.8byte	.LVL1230-1
+.LLST300:
+	.8byte	.LVL1230
+	.8byte	.LVL1232-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1230-1
-	.8byte	.LVL1238
+	.8byte	.LVL1232-1
+	.8byte	.LVL1240
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1238
-	.8byte	.LVL1239
+	.8byte	.LVL1240
+	.8byte	.LVL1241
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1239
+	.8byte	.LVL1241
 	.8byte	.LFE345
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST302:
-	.8byte	.LVL1228
-	.8byte	.LVL1229
+.LLST301:
+	.8byte	.LVL1230
+	.8byte	.LVL1231
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1229
-	.8byte	.LVL1238
+	.8byte	.LVL1231
+	.8byte	.LVL1240
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1238
-	.8byte	.LVL1239
+	.8byte	.LVL1240
+	.8byte	.LVL1241
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL1239
+	.8byte	.LVL1241
 	.8byte	.LFE345
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST303:
-	.8byte	.LVL1232
-	.8byte	.LVL1233
-	.2byte	0x1
-	.byte	0x50
+.LLST302:
 	.8byte	.LVL1234
 	.8byte	.LVL1235
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1236
+	.8byte	.LVL1237
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1235
+	.8byte	.LVL1237
 	.8byte	.LFE345
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST304:
-	.8byte	.LVL1236
-	.8byte	.LVL1237
-	.2byte	0x1
-	.byte	0x51
+.LLST303:
+	.8byte	.LVL1238
 	.8byte	.LVL1239
-	.8byte	.LVL1240
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1240
 	.8byte	.LVL1241
+	.8byte	.LVL1242
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1242
+	.8byte	.LVL1243
 	.2byte	0x3
 	.byte	0x71
 	.sleb128 1
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST177:
-	.8byte	.LVL664
-	.8byte	.LVL668
+.LLST168:
+	.8byte	.LVL641
+	.8byte	.LVL645
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL668
+	.8byte	.LVL645
 	.8byte	.LFE343
 	.2byte	0x4
 	.byte	0xf3
@@ -43555,12 +43569,12 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST178:
-	.8byte	.LVL664
-	.8byte	.LVL665
+.LLST169:
+	.8byte	.LVL641
+	.8byte	.LVL642
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL665
+	.8byte	.LVL642
 	.8byte	.LFE343
 	.2byte	0x4
 	.byte	0xf3
@@ -43569,12 +43583,12 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST179:
-	.8byte	.LVL664
-	.8byte	.LVL666
+.LLST170:
+	.8byte	.LVL641
+	.8byte	.LVL643
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL666
+	.8byte	.LVL643
 	.8byte	.LFE343
 	.2byte	0x4
 	.byte	0xf3
@@ -43583,35 +43597,35 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST180:
-	.8byte	.LVL667
-	.8byte	.LVL668
+.LLST171:
+	.8byte	.LVL644
+	.8byte	.LVL645
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST181:
-	.8byte	.LVL672
-	.8byte	.LVL673
+.LLST172:
+	.8byte	.LVL649
+	.8byte	.LVL650
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL674
-	.8byte	.LVL675
+	.8byte	.LVL651
+	.8byte	.LVL652
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL676
-	.8byte	.LVL677
+	.8byte	.LVL653
+	.8byte	.LVL654
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST182:
-	.8byte	.LVL664
-	.8byte	.LVL668
+.LLST173:
+	.8byte	.LVL641
+	.8byte	.LVL645
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL668
+	.8byte	.LVL645
 	.8byte	.LFE343
 	.2byte	0x4
 	.byte	0xf3
@@ -43620,56 +43634,56 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST183:
-	.8byte	.LVL667
-	.8byte	.LVL669
+.LLST174:
+	.8byte	.LVL644
+	.8byte	.LVL646
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL670
+	.8byte	.LVL647
 	.8byte	.LFE343
 	.2byte	0x1
 	.byte	0x67
 	.8byte	0
 	.8byte	0
-.LLST169:
-	.8byte	.LVL640
-	.8byte	.LVL645
+.LLST160:
+	.8byte	.LVL617
+	.8byte	.LVL622
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL645
-	.8byte	.LVL646
+	.8byte	.LVL622
+	.8byte	.LVL623
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL646
-	.8byte	.LVL649
+	.8byte	.LVL623
+	.8byte	.LVL626
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL649
-	.8byte	.LVL658
+	.8byte	.LVL626
+	.8byte	.LVL635
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL658
-	.8byte	.LVL663
+	.8byte	.LVL635
+	.8byte	.LVL640
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL663
+	.8byte	.LVL640
 	.8byte	.LFE342
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST170:
-	.8byte	.LVL640
-	.8byte	.LVL641
+.LLST161:
+	.8byte	.LVL617
+	.8byte	.LVL618
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL641
+	.8byte	.LVL618
 	.8byte	.LFE342
 	.2byte	0x4
 	.byte	0xf3
@@ -43678,134 +43692,134 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST171:
-	.8byte	.LVL640
-	.8byte	.LVL642
+.LLST162:
+	.8byte	.LVL617
+	.8byte	.LVL619
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL642
-	.8byte	.LVL647
+	.8byte	.LVL619
+	.8byte	.LVL624
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL647
-	.8byte	.LVL649
+	.8byte	.LVL624
+	.8byte	.LVL626
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x52
 	.byte	0x9f
-	.8byte	.LVL649
+	.8byte	.LVL626
 	.8byte	.LFE342
 	.2byte	0x1
 	.byte	0x69
 	.8byte	0
 	.8byte	0
-.LLST172:
-	.8byte	.LVL640
-	.8byte	.LVL643
+.LLST163:
+	.8byte	.LVL617
+	.8byte	.LVL620
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL643
-	.8byte	.LVL646
+	.8byte	.LVL620
+	.8byte	.LVL623
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL646
-	.8byte	.LVL649
+	.8byte	.LVL623
+	.8byte	.LVL626
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x53
 	.byte	0x9f
-	.8byte	.LVL649
-	.8byte	.LVL658
+	.8byte	.LVL626
+	.8byte	.LVL635
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL658
-	.8byte	.LVL663
+	.8byte	.LVL635
+	.8byte	.LVL640
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x53
 	.byte	0x9f
-	.8byte	.LVL663
+	.8byte	.LVL640
 	.8byte	.LFE342
 	.2byte	0x1
 	.byte	0x6a
 	.8byte	0
 	.8byte	0
-.LLST173:
-	.8byte	.LVL644
-	.8byte	.LVL645
+.LLST164:
+	.8byte	.LVL621
+	.8byte	.LVL622
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST174:
-	.8byte	.LVL652
-	.8byte	.LVL653
+.LLST165:
+	.8byte	.LVL629
+	.8byte	.LVL630
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL654
-	.8byte	.LVL655
+	.8byte	.LVL631
+	.8byte	.LVL632
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL656
-	.8byte	.LVL657
+	.8byte	.LVL633
+	.8byte	.LVL634
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST175:
-	.8byte	.LVL644
-	.8byte	.LVL648
+.LLST166:
+	.8byte	.LVL621
+	.8byte	.LVL625
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL649
+	.8byte	.LVL626
 	.8byte	.LFE342
 	.2byte	0x1
 	.byte	0x6b
 	.8byte	0
 	.8byte	0
-.LLST176:
-	.8byte	.LVL644
-	.8byte	.LVL645
+.LLST167:
+	.8byte	.LVL621
+	.8byte	.LVL622
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL645
-	.8byte	.LVL646
+	.8byte	.LVL622
+	.8byte	.LVL623
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL646
-	.8byte	.LVL649
+	.8byte	.LVL623
+	.8byte	.LVL626
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL649
-	.8byte	.LVL658
+	.8byte	.LVL626
+	.8byte	.LVL635
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL658
-	.8byte	.LVL663
+	.8byte	.LVL635
+	.8byte	.LVL640
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL663
+	.8byte	.LVL640
 	.8byte	.LFE342
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL597
-	.8byte	.LVL601
+.LLST145:
+	.8byte	.LVL574
+	.8byte	.LVL578
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL601
+	.8byte	.LVL578
 	.8byte	.LFE341
 	.2byte	0x4
 	.byte	0xf3
@@ -43814,12 +43828,12 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST155:
-	.8byte	.LVL597
-	.8byte	.LVL599
+.LLST146:
+	.8byte	.LVL574
+	.8byte	.LVL576
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL599
+	.8byte	.LVL576
 	.8byte	.LFE341
 	.2byte	0x4
 	.byte	0xf3
@@ -43828,12 +43842,12 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST156:
-	.8byte	.LVL597
-	.8byte	.LVL598
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+	.8byte	.LVL574
+	.8byte	.LVL575
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL598
+	.8byte	.LVL575
 	.8byte	.LFE341
 	.2byte	0x4
 	.byte	0xf3
@@ -43842,252 +43856,252 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST157:
-	.8byte	.LVL600
-	.8byte	.LVL601
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+	.8byte	.LVL577
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 	.byte	0x9f
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL606
-	.8byte	.LVL607
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+	.8byte	.LVL583
+	.8byte	.LVL584
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL607
-	.8byte	.LVL608-1
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+	.8byte	.LVL585-1
 	.2byte	0x2
 	.byte	0x83
 	.sleb128 0
-	.8byte	.LVL608
-	.8byte	.LVL609
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+	.8byte	.LVL586
 	.2byte	0x1
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 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL600
-	.8byte	.LVL602
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 	.2byte	0x1
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 	.8byte	.LFE341
 	.2byte	0x1
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 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL582
-	.8byte	.LVL584
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 	.2byte	0x1
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-	.8byte	.LVL588
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 	.2byte	0x1
 	.byte	0x6c
-	.8byte	.LVL588
-	.8byte	.LVL589
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 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL589
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 	.8byte	.LFE339
 	.2byte	0x1
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 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL582
-	.8byte	.LVL584
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-	.8byte	.LVL586
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 	.2byte	0x1
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-	.8byte	.LVL586
-	.8byte	.LVL589
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 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
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 	.8byte	.LFE339
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 	.8byte	0
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-	.8byte	.LVL582
-	.8byte	.LVL584
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 	.2byte	0x1
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 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL587
-	.8byte	.LVL589
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 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x52
 	.byte	0x9f
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 	.8byte	.LFE339
 	.2byte	0x1
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 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL582
-	.8byte	.LVL584
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 	.2byte	0x1
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 	.2byte	0x1
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 	.uleb128 0x1
 	.byte	0x53
 	.byte	0x9f
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 	.8byte	0
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-	.8byte	.LVL583
-	.8byte	.LVL584
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-	.8byte	.LVL585
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-	.8byte	.LVL595
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 	.2byte	0x3
 	.byte	0x83
 	.sleb128 1
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-	.8byte	.LVL583
-	.8byte	.LVL584
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-	.8byte	.LVL585
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-	.8byte	.LVL594
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 	.8byte	0
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-	.8byte	.LVL583
-	.8byte	.LVL584
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 	.uleb128 0x1
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 	.8byte	0
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-	.8byte	.LVL583
-	.8byte	.LVL584
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-	.8byte	.LVL589
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 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL589
+	.8byte	.LVL566
 	.8byte	.LFE339
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL583
-	.8byte	.LVL584
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+	.8byte	.LVL561
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL584
-	.8byte	.LVL586
+	.8byte	.LVL561
+	.8byte	.LVL563
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL586
-	.8byte	.LVL589
+	.8byte	.LVL563
+	.8byte	.LVL566
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL589
+	.8byte	.LVL566
 	.8byte	.LFE339
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL580
-	.8byte	.LVL581-1
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+	.8byte	.LVL557
+	.8byte	.LVL558-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL581-1
+	.8byte	.LVL558-1
 	.8byte	.LFE338
 	.2byte	0x4
 	.byte	0xf3
@@ -44096,12 +44110,12 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST142:
-	.8byte	.LVL578
-	.8byte	.LVL579-1
+.LLST133:
+	.8byte	.LVL555
+	.8byte	.LVL556-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL579-1
+	.8byte	.LVL556-1
 	.8byte	.LFE337
 	.2byte	0x4
 	.byte	0xf3
@@ -44110,12 +44124,12 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST143:
-	.8byte	.LVL578
-	.8byte	.LVL579-1
+.LLST134:
+	.8byte	.LVL555
+	.8byte	.LVL556-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL579-1
+	.8byte	.LVL556-1
 	.8byte	.LFE337
 	.2byte	0x4
 	.byte	0xf3
@@ -44124,16 +44138,16 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST139:
-	.8byte	.LVL563
-	.8byte	.LVL564
+.LLST130:
+	.8byte	.LVL540
+	.8byte	.LVL541
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL564
-	.8byte	.LVL575
+	.8byte	.LVL541
+	.8byte	.LVL552
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL575
+	.8byte	.LVL552
 	.8byte	.LFE315
 	.2byte	0x4
 	.byte	0xf3
@@ -44142,47 +44156,47 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST140:
-	.8byte	.LVL569
-	.8byte	.LVL570
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+	.8byte	.LVL546
+	.8byte	.LVL547
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL570
-	.8byte	.LVL571
+	.8byte	.LVL547
+	.8byte	.LVL548
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL572
-	.8byte	.LVL573
+	.8byte	.LVL549
+	.8byte	.LVL550
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL566
-	.8byte	.LVL567
+.LLST132:
+	.8byte	.LVL543
+	.8byte	.LVL544
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL567
-	.8byte	.LVL574
+	.8byte	.LVL544
+	.8byte	.LVL551
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL559
-	.8byte	.LVL560
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+	.8byte	.LVL536
+	.8byte	.LVL537
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL560
-	.8byte	.LVL561-1
+	.8byte	.LVL537
+	.8byte	.LVL538-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL561-1
-	.8byte	.LVL562
+	.8byte	.LVL538-1
+	.8byte	.LVL539
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL562
+	.8byte	.LVL539
 	.8byte	.LFE314
 	.2byte	0x4
 	.byte	0xf3
@@ -44191,37 +44205,37 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL1810
-	.8byte	.LVL1811
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+	.8byte	.LVL1809
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1811
-	.8byte	.LVL1812-1
+	.8byte	.LVL1809
+	.8byte	.LVL1810-1
 	.2byte	0x1
 	.byte	0x5b
-	.8byte	.LVL1814
-	.8byte	.LVL1815-1
+	.8byte	.LVL1812
+	.8byte	.LVL1813-1
 	.2byte	0x1
 	.byte	0x5b
-	.8byte	.LVL1818
-	.8byte	.LVL1822
+	.8byte	.LVL1816
+	.8byte	.LVL1820
 	.2byte	0x1
 	.byte	0x5b
-	.8byte	.LVL1823
-	.8byte	.LVL1824
+	.8byte	.LVL1821
+	.8byte	.LVL1822
 	.2byte	0x1
 	.byte	0x5b
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL1819
-	.8byte	.LVL1820
+.LLST411:
+	.8byte	.LVL1817
+	.8byte	.LVL1818
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1820
-	.8byte	.LVL1821-1
+	.8byte	.LVL1818
+	.8byte	.LVL1819-1
 	.2byte	0x17
 	.byte	0x7b
 	.sleb128 0
@@ -44238,16 +44252,16 @@ __func__.7632:
 	.uleb128 0x10
 	.8byte	0
 	.8byte	0
-.LLST288:
-	.8byte	.LVL1173
-	.8byte	.LVL1174
+.LLST287:
+	.8byte	.LVL1175
+	.8byte	.LVL1176
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1174
-	.8byte	.LVL1214
+	.8byte	.LVL1176
+	.8byte	.LVL1216
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1214
+	.8byte	.LVL1216
 	.8byte	.LFE310
 	.2byte	0x4
 	.byte	0xf3
@@ -44256,24 +44270,24 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST289:
-	.8byte	.LVL1173
-	.8byte	.LVL1176-1
+.LLST288:
+	.8byte	.LVL1175
+	.8byte	.LVL1178-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1176-1
-	.8byte	.LVL1177
+	.8byte	.LVL1178-1
+	.8byte	.LVL1179
 	.2byte	0x1
 	.byte	0x6c
-	.8byte	.LVL1177
 	.8byte	.LVL1179
+	.8byte	.LVL1181
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1179
-	.8byte	.LVL1216
+	.8byte	.LVL1181
+	.8byte	.LVL1218
 	.2byte	0x1
 	.byte	0x6c
-	.8byte	.LVL1216
+	.8byte	.LVL1218
 	.8byte	.LFE310
 	.2byte	0x4
 	.byte	0xf3
@@ -44282,188 +44296,188 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL1190
-	.8byte	.LVL1191
+.LLST289:
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+	.8byte	.LVL1193
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL1191
-	.8byte	.LVL1194
+	.8byte	.LVL1193
+	.8byte	.LVL1196
 	.2byte	0x2
 	.byte	0x75
 	.sleb128 0
-	.8byte	.LVL1194
-	.8byte	.LVL1195
+	.8byte	.LVL1196
+	.8byte	.LVL1197
 	.2byte	0x2
 	.byte	0x75
 	.sleb128 -2
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL1182
-	.8byte	.LVL1183
+.LLST290:
+	.8byte	.LVL1184
+	.8byte	.LVL1185
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1183
-	.8byte	.LVL1184-1
+	.8byte	.LVL1185
+	.8byte	.LVL1186-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1189
-	.8byte	.LVL1192
+	.8byte	.LVL1191
+	.8byte	.LVL1194
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1193
 	.8byte	.LVL1195
+	.8byte	.LVL1197
 	.2byte	0x1
 	.byte	0x53
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL1184
-	.8byte	.LVL1185
+.LLST291:
+	.8byte	.LVL1186
+	.8byte	.LVL1187
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL1182
-	.8byte	.LVL1183
+.LLST292:
+	.8byte	.LVL1184
+	.8byte	.LVL1185
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST294:
-	.8byte	.LVL1181
-	.8byte	.LVL1185
+.LLST293:
+	.8byte	.LVL1183
+	.8byte	.LVL1187
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1188
-	.8byte	.LVL1195
+	.8byte	.LVL1190
+	.8byte	.LVL1197
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1198
-	.8byte	.LVL1199
+	.8byte	.LVL1200
+	.8byte	.LVL1201
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1199
-	.8byte	.LVL1203-1
+	.8byte	.LVL1201
+	.8byte	.LVL1205-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1204
-	.8byte	.LVL1205
+	.8byte	.LVL1206
+	.8byte	.LVL1207
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1207
-	.8byte	.LVL1209-1
+	.8byte	.LVL1209
+	.8byte	.LVL1211-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1212
-	.8byte	.LVL1213
+	.8byte	.LVL1214
+	.8byte	.LVL1215
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST295:
-	.8byte	.LVL1175
-	.8byte	.LVL1186
-	.2byte	0x1
-	.byte	0x63
+.LLST294:
+	.8byte	.LVL1177
 	.8byte	.LVL1188
-	.8byte	.LVL1208
 	.2byte	0x1
 	.byte	0x63
+	.8byte	.LVL1190
 	.8byte	.LVL1210
+	.2byte	0x1
+	.byte	0x63
 	.8byte	.LVL1212
+	.8byte	.LVL1214
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1212
 	.8byte	.LVL1214
+	.8byte	.LVL1216
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST296:
-	.8byte	.LVL1196
-	.8byte	.LVL1202
+.LLST295:
+	.8byte	.LVL1198
+	.8byte	.LVL1204
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL1204
-	.8byte	.LVL1206-1
+	.8byte	.LVL1206
+	.8byte	.LVL1208-1
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL1207
-	.8byte	.LVL1209-1
+	.8byte	.LVL1209
+	.8byte	.LVL1211-1
 	.2byte	0x1
 	.byte	0x54
 	.8byte	0
 	.8byte	0
-.LLST297:
-	.8byte	.LVL1173
-	.8byte	.LVL1180
+.LLST296:
+	.8byte	.LVL1175
+	.8byte	.LVL1182
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1180
-	.8byte	.LVL1187
+	.8byte	.LVL1182
+	.8byte	.LVL1189
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1187
-	.8byte	.LVL1188
+	.8byte	.LVL1189
+	.8byte	.LVL1190
 	.2byte	0x3
 	.byte	0x86
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL1188
-	.8byte	.LVL1215
+	.8byte	.LVL1190
+	.8byte	.LVL1217
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST298:
-	.8byte	.LVL1200
-	.8byte	.LVL1201
+.LLST297:
+	.8byte	.LVL1202
+	.8byte	.LVL1203
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1201
-	.8byte	.LVL1202
+	.8byte	.LVL1203
+	.8byte	.LVL1204
 	.2byte	0x2
 	.byte	0x75
 	.sleb128 16
-	.8byte	.LVL1204
-	.8byte	.LVL1205
+	.8byte	.LVL1206
+	.8byte	.LVL1207
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1205
-	.8byte	.LVL1206-1
+	.8byte	.LVL1207
+	.8byte	.LVL1208-1
 	.2byte	0x2
 	.byte	0x75
 	.sleb128 16
 	.8byte	0
 	.8byte	0
-.LLST406:
-	.8byte	.LVL1764
-	.8byte	.LVL1766
+.LLST405:
+	.8byte	.LVL1763
+	.8byte	.LVL1765
 	.2byte	0x1
 	.byte	0x50
+	.8byte	.LVL1765
 	.8byte	.LVL1766
-	.8byte	.LVL1767
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1767
-	.8byte	.LVL1769
+	.8byte	.LVL1766
+	.8byte	.LVL1768
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1769
+	.8byte	.LVL1768
 	.8byte	.LFE308
 	.2byte	0x4
 	.byte	0xf3
@@ -44472,117 +44486,117 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST407:
-	.8byte	.LVL1778
-	.8byte	.LVL1781
+.LLST406:
+	.8byte	.LVL1777
+	.8byte	.LVL1779
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1781
-	.8byte	.LVL1784
+	.8byte	.LVL1779
+	.8byte	.LVL1782
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1787
-	.8byte	.LVL1797
+	.8byte	.LVL1785
+	.8byte	.LVL1795
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1798
+	.8byte	.LVL1796
 	.8byte	.LFE308
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST408:
-	.8byte	.LVL1770
-	.8byte	.LVL1772
+.LLST407:
+	.8byte	.LVL1769
+	.8byte	.LVL1771
 	.2byte	0x1
 	.byte	0x64
+	.8byte	.LVL1776
 	.8byte	.LVL1777
-	.8byte	.LVL1778
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1792
-	.8byte	.LVL1793
+	.8byte	.LVL1790
+	.8byte	.LVL1791
 	.2byte	0x1
 	.byte	0x50
+	.8byte	.LVL1791
 	.8byte	.LVL1793
-	.8byte	.LVL1795
 	.2byte	0x1
 	.byte	0x68
 	.8byte	0
 	.8byte	0
-.LLST409:
+.LLST408:
+	.8byte	.LVL1764
 	.8byte	.LVL1765
-	.8byte	.LVL1766
 	.2byte	0x1
 	.byte	0x51
+	.8byte	.LVL1766
 	.8byte	.LVL1767
-	.8byte	.LVL1768
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1768
-	.8byte	.LVL1770
+	.8byte	.LVL1767
+	.8byte	.LVL1769
 	.2byte	0x2
 	.byte	0x32
 	.byte	0x9f
-	.8byte	.LVL1770
-	.8byte	.LVL1771-1
+	.8byte	.LVL1769
+	.8byte	.LVL1770-1
 	.2byte	0x1
 	.byte	0x51
+	.8byte	.LVL1775
 	.8byte	.LVL1776
-	.8byte	.LVL1777
 	.2byte	0x2
 	.byte	0x32
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST410:
-	.8byte	.LVL1788
-	.8byte	.LVL1799
+.LLST409:
+	.8byte	.LVL1786
+	.8byte	.LVL1797
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST133:
-	.8byte	.LVL547
-	.8byte	.LVL548
+.LLST124:
+	.8byte	.LVL524
+	.8byte	.LVL525
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL548
+	.8byte	.LVL525
 	.8byte	.LFE307
 	.2byte	0x1
 	.byte	0x56
 	.8byte	0
 	.8byte	0
-.LLST134:
-	.8byte	.LVL547
-	.8byte	.LVL549-1
+.LLST125:
+	.8byte	.LVL524
+	.8byte	.LVL526-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL549-1
+	.8byte	.LVL526-1
 	.8byte	.LFE307
 	.2byte	0x1
 	.byte	0x5a
 	.8byte	0
 	.8byte	0
-.LLST135:
-	.8byte	.LVL547
-	.8byte	.LVL549-1
+.LLST126:
+	.8byte	.LVL524
+	.8byte	.LVL526-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL549-1
+	.8byte	.LVL526-1
 	.8byte	.LFE307
 	.2byte	0x1
 	.byte	0x58
 	.8byte	0
 	.8byte	0
-.LLST136:
-	.8byte	.LVL550
-	.8byte	.LVL553
+.LLST127:
+	.8byte	.LVL527
+	.8byte	.LVL530
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL553
-	.8byte	.LVL554
+	.8byte	.LVL530
+	.8byte	.LVL531
 	.2byte	0x7
 	.byte	0x73
 	.sleb128 0
@@ -44591,38 +44605,38 @@ __func__.7632:
 	.byte	0x75
 	.sleb128 0
 	.byte	0x22
-	.8byte	.LVL554
-	.8byte	.LVL555
+	.8byte	.LVL531
+	.8byte	.LVL532
 	.2byte	0x1
 	.byte	0x57
-	.8byte	.LVL555
-	.8byte	.LVL557
+	.8byte	.LVL532
+	.8byte	.LVL534
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL557
-	.8byte	.LVL558
+	.8byte	.LVL534
+	.8byte	.LVL535
 	.2byte	0x1
 	.byte	0x57
 	.8byte	0
 	.8byte	0
-.LLST137:
-	.8byte	.LVL550
-	.8byte	.LVL551
+.LLST128:
+	.8byte	.LVL527
+	.8byte	.LVL528
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL552
-	.8byte	.LVL556
+	.8byte	.LVL529
+	.8byte	.LVL533
 	.2byte	0x1
 	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST131:
-	.8byte	.LVL543
-	.8byte	.LVL545
+.LLST122:
+	.8byte	.LVL520
+	.8byte	.LVL522
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL545
+	.8byte	.LVL522
 	.8byte	.LFE306
 	.2byte	0x4
 	.byte	0xf3
@@ -44631,102 +44645,102 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST132:
-	.8byte	.LVL543
-	.8byte	.LVL544
+.LLST123:
+	.8byte	.LVL520
+	.8byte	.LVL521
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL544
-	.8byte	.LVL546
+	.8byte	.LVL521
+	.8byte	.LVL523
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST129:
-	.8byte	.LVL537
-	.8byte	.LVL538
+.LLST120:
+	.8byte	.LVL514
+	.8byte	.LVL515
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL539
-	.8byte	.LVL540
+	.8byte	.LVL516
+	.8byte	.LVL517
 	.2byte	0x1
 	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST130:
-	.8byte	.LVL535
-	.8byte	.LVL536
+.LLST121:
+	.8byte	.LVL512
+	.8byte	.LVL513
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL536
-	.8byte	.LVL541
+	.8byte	.LVL513
+	.8byte	.LVL518
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL542
+	.8byte	.LVL519
 	.8byte	.LFE305
 	.2byte	0x1
 	.byte	0x53
 	.8byte	0
 	.8byte	0
-.LLST127:
-	.8byte	.LVL529
-	.8byte	.LVL530
+.LLST118:
+	.8byte	.LVL506
+	.8byte	.LVL507
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL531
-	.8byte	.LVL534
+	.8byte	.LVL508
+	.8byte	.LVL511
 	.2byte	0x1
 	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST128:
-	.8byte	.LVL527
-	.8byte	.LVL528
+.LLST119:
+	.8byte	.LVL504
+	.8byte	.LVL505
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL528
-	.8byte	.LVL532
+	.8byte	.LVL505
+	.8byte	.LVL509
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL533
+	.8byte	.LVL510
 	.8byte	.LFE304
 	.2byte	0x1
 	.byte	0x53
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL520
-	.8byte	.LVL521
+.LLST117:
+	.8byte	.LVL497
+	.8byte	.LVL498
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL522
-	.8byte	.LVL523
+	.8byte	.LVL499
+	.8byte	.LVL500
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL524
-	.8byte	.LVL525
+	.8byte	.LVL501
+	.8byte	.LVL502
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL526
+	.8byte	.LVL503
 	.8byte	.LFE303
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST325:
-	.8byte	.LVL1339
-	.8byte	.LVL1340
+.LLST324:
+	.8byte	.LVL1341
+	.8byte	.LVL1342
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1340
-	.8byte	.LVL1344
+	.8byte	.LVL1342
+	.8byte	.LVL1346
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1344
+	.8byte	.LVL1346
 	.8byte	.LFE302
 	.2byte	0x4
 	.byte	0xf3
@@ -44735,76 +44749,76 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST326:
-	.8byte	.LVL1339
-	.8byte	.LVL1343
+.LLST325:
+	.8byte	.LVL1341
+	.8byte	.LVL1345
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1345
-	.8byte	.LVL1348
+	.8byte	.LVL1347
+	.8byte	.LVL1350
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1348
+	.8byte	.LVL1350
 	.8byte	.LFE302
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST123:
-	.8byte	.LVL506
-	.8byte	.LVL507
+.LLST114:
+	.8byte	.LVL483
+	.8byte	.LVL484
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL507
-	.8byte	.LVL516
+	.8byte	.LVL484
+	.8byte	.LVL493
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL516
-	.8byte	.LVL517
+	.8byte	.LVL493
+	.8byte	.LVL494
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL517
+	.8byte	.LVL494
 	.8byte	.LFE300
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST124:
-	.8byte	.LVL511
-	.8byte	.LVL513
+.LLST115:
+	.8byte	.LVL488
+	.8byte	.LVL490
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL517
-	.8byte	.LVL518
+	.8byte	.LVL494
+	.8byte	.LVL495
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL519
+	.8byte	.LVL496
 	.8byte	.LFE300
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST125:
-	.8byte	.LVL506
-	.8byte	.LVL512
+.LLST116:
+	.8byte	.LVL483
+	.8byte	.LVL489
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL512
-	.8byte	.LVL515
+	.8byte	.LVL489
+	.8byte	.LVL492
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL515
-	.8byte	.LVL517
+	.8byte	.LVL492
+	.8byte	.LVL494
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL517
+	.8byte	.LVL494
 	.8byte	.LFE300
 	.2byte	0x3
 	.byte	0x9
@@ -44812,49 +44826,49 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST391:
-	.8byte	.LVL1700
-	.8byte	.LVL1702
+.LLST396:
+	.8byte	.LVL1729
+	.8byte	.LVL1731
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1702
-	.8byte	.LVL1710
+	.8byte	.LVL1731
+	.8byte	.LVL1739
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1710
-	.8byte	.LVL1712
+	.8byte	.LVL1739
+	.8byte	.LVL1741
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1712
+	.8byte	.LVL1741
 	.8byte	.LFE299
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST392:
-	.8byte	.LVL1701
-	.8byte	.LVL1711
+.LLST397:
+	.8byte	.LVL1730
+	.8byte	.LVL1740
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1712
+	.8byte	.LVL1741
 	.8byte	.LFE299
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST312:
-	.8byte	.LVL1266
-	.8byte	.LVL1267
+.LLST311:
+	.8byte	.LVL1268
+	.8byte	.LVL1269
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1267
-	.8byte	.LVL1307
+	.8byte	.LVL1269
+	.8byte	.LVL1309
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1307
+	.8byte	.LVL1309
 	.8byte	.LFE298
 	.2byte	0x4
 	.byte	0xf3
@@ -44863,277 +44877,302 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST313:
-	.8byte	.LVL1274
-	.8byte	.LVL1279
+.LLST312:
+	.8byte	.LVL1276
+	.8byte	.LVL1281
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1280
-	.8byte	.LVL1307
+	.8byte	.LVL1282
+	.8byte	.LVL1309
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST314:
-	.8byte	.LVL1282
-	.8byte	.LVL1294
+.LLST313:
+	.8byte	.LVL1284
+	.8byte	.LVL1296
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1295
-	.8byte	.LVL1308
+	.8byte	.LVL1297
+	.8byte	.LVL1310
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST315:
-	.8byte	.LVL1286
-	.8byte	.LVL1287
+.LLST314:
+	.8byte	.LVL1288
+	.8byte	.LVL1289
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1288
-	.8byte	.LVL1289
+	.8byte	.LVL1290
+	.8byte	.LVL1291
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1289
-	.8byte	.LVL1293
+	.8byte	.LVL1291
+	.8byte	.LVL1295
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1299
-	.8byte	.LVL1303
+	.8byte	.LVL1301
+	.8byte	.LVL1305
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1303
-	.8byte	.LVL1304
+	.8byte	.LVL1305
+	.8byte	.LVL1306
 	.2byte	0x3
 	.byte	0x88
 	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL1305
-	.8byte	.LVL1309
+	.8byte	.LVL1307
+	.8byte	.LVL1311
 	.2byte	0x1
 	.byte	0x68
 	.8byte	0
 	.8byte	0
-.LLST316:
-	.8byte	.LVL1288
-	.8byte	.LVL1289
+.LLST315:
+	.8byte	.LVL1290
+	.8byte	.LVL1291
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1289
-	.8byte	.LVL1290-1
+	.8byte	.LVL1291
+	.8byte	.LVL1292-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1299
-	.8byte	.LVL1300
+	.8byte	.LVL1301
+	.8byte	.LVL1302
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1300
-	.8byte	.LVL1301
+	.8byte	.LVL1302
+	.8byte	.LVL1303
 	.2byte	0x3
 	.byte	0x71
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL1301
-	.8byte	.LVL1302-1
+	.8byte	.LVL1303
+	.8byte	.LVL1304-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1302-1
-	.8byte	.LVL1303
+	.8byte	.LVL1304-1
+	.8byte	.LVL1305
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 196
-	.8byte	.LVL1303
 	.8byte	.LVL1305
+	.8byte	.LVL1307
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST317:
-	.8byte	.LVL1266
+.LLST316:
 	.8byte	.LVL1268
+	.8byte	.LVL1270
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1270
-	.8byte	.LVL1271
+	.8byte	.LVL1272
+	.8byte	.LVL1273
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1271
-	.8byte	.LVL1272
+	.8byte	.LVL1273
+	.8byte	.LVL1274
 	.2byte	0x3
 	.byte	0x71
 	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL1272
-	.8byte	.LVL1273-1
+	.8byte	.LVL1274
+	.8byte	.LVL1275-1
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST318:
-	.8byte	.LVL1296
+.LLST317:
 	.8byte	.LVL1298
+	.8byte	.LVL1300
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST319:
-	.8byte	.LVL1296
+.LLST318:
 	.8byte	.LVL1298
+	.8byte	.LVL1300
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST114:
-	.8byte	.LVL476
-	.8byte	.LVL480
+.LLST104:
+	.8byte	.LVL451
+	.8byte	.LVL455
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL481
-	.8byte	.LVL490
+	.8byte	.LVL456
+	.8byte	.LVL465
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL498
-	.8byte	.LVL500
+	.8byte	.LVL475
+	.8byte	.LVL477
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST115:
-	.8byte	.LVL476
-	.8byte	.LVL480
+.LLST105:
+	.8byte	.LVL451
+	.8byte	.LVL455
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL481
-	.8byte	.LVL490
+	.8byte	.LVL456
+	.8byte	.LVL465
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL490
-	.8byte	.LVL491
+	.8byte	.LVL465
+	.8byte	.LVL466
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL491
-	.8byte	.LVL496
+	.8byte	.LVL466
+	.8byte	.LVL471
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL496
+	.8byte	.LVL471
 	.8byte	.LFE296
 	.2byte	0x1
 	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST116:
-	.8byte	.LVL476
-	.8byte	.LVL480
+.LLST106:
+	.8byte	.LVL451
+	.8byte	.LVL455
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL481
-	.8byte	.LVL490
+	.8byte	.LVL456
+	.8byte	.LVL465
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL490
-	.8byte	.LVL494
+	.8byte	.LVL465
+	.8byte	.LVL469
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL496
-	.8byte	.LVL499
+	.8byte	.LVL471
+	.8byte	.LVL476
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL500
+	.8byte	.LVL477
 	.8byte	.LFE296
 	.2byte	0x1
 	.byte	0x53
 	.8byte	0
 	.8byte	0
-.LLST117:
-	.8byte	.LVL490
-	.8byte	.LVL491
+.LLST107:
+	.8byte	.LVL465
+	.8byte	.LVL466
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL496
-	.8byte	.LVL497
+	.8byte	.LVL471
+	.8byte	.LVL474
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL501
+	.8byte	.LVL478
 	.8byte	.LFE296
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST118:
-	.8byte	.LVL488
-	.8byte	.LVL489
+.LLST108:
+	.8byte	.LVL463
+	.8byte	.LVL464
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL489
-	.8byte	.LVL495-1
+	.8byte	.LVL464
+	.8byte	.LVL470-1
 	.2byte	0x1
 	.byte	0x56
-	.8byte	.LVL496
+	.8byte	.LVL471
 	.8byte	.LFE296
 	.2byte	0x1
 	.byte	0x56
 	.8byte	0
 	.8byte	0
-.LLST119:
-	.8byte	.LVL492
-	.8byte	.LVL495-1
+.LLST109:
+	.8byte	.LVL467
+	.8byte	.LVL470-1
 	.2byte	0x1
 	.byte	0x55
 	.8byte	0
 	.8byte	0
-.LLST120:
-	.8byte	.LVL477
-	.8byte	.LVL478
+.LLST110:
+	.8byte	.LVL452
+	.8byte	.LVL453
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL478
-	.8byte	.LVL479
+	.8byte	.LVL453
+	.8byte	.LVL454
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL481
-	.8byte	.LVL482
+	.8byte	.LVL456
+	.8byte	.LVL457
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL483
-	.8byte	.LVL484
+	.8byte	.LVL458
+	.8byte	.LVL459
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL484
-	.8byte	.LVL486
+	.8byte	.LVL459
+	.8byte	.LVL461
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST103:
-	.8byte	.LVL305
-	.8byte	.LVL306
+.LLST111:
+	.8byte	.LVL451
+	.8byte	.LVL455
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL456
+	.8byte	.LVL465
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL465
+	.8byte	.LVL468-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL471
+	.8byte	.LVL472
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL473
+	.8byte	.LFE296
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST93:
+	.8byte	.LVL280
+	.8byte	.LVL281
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL306
-	.8byte	.LVL308
+	.8byte	.LVL281
+	.8byte	.LVL283
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL308
-	.8byte	.LVL311
+	.8byte	.LVL283
+	.8byte	.LVL286
 	.2byte	0x41
 	.byte	0x3
 	.8byte	g_num_free_superblocks
@@ -45181,11 +45220,11 @@ __func__.7632:
 	.byte	0x16
 	.byte	0x13
 	.byte	0x9f
-	.8byte	.LVL311
-	.8byte	.LVL314
+	.8byte	.LVL286
+	.8byte	.LVL289
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL314
+	.8byte	.LVL289
 	.8byte	.LFE295
 	.2byte	0x4
 	.byte	0xf3
@@ -45194,80 +45233,80 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST104:
-	.8byte	.LVL305
-	.8byte	.LVL310
+.LLST94:
+	.8byte	.LVL280
+	.8byte	.LVL285
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL310
-	.8byte	.LVL311
+	.8byte	.LVL285
+	.8byte	.LVL286
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL311
-	.8byte	.LVL315
+	.8byte	.LVL286
+	.8byte	.LVL290
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL315
+	.8byte	.LVL290
 	.8byte	.LFE295
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST105:
-	.8byte	.LVL307
-	.8byte	.LVL309
+.LLST95:
+	.8byte	.LVL282
+	.8byte	.LVL284
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL311
-	.8byte	.LVL314
+	.8byte	.LVL286
+	.8byte	.LVL289
 	.2byte	0x1
 	.byte	0x54
 	.8byte	0
 	.8byte	0
-.LLST106:
-	.8byte	.LVL307
-	.8byte	.LVL312
+.LLST96:
+	.8byte	.LVL282
+	.8byte	.LVL287
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL313
-	.8byte	.LVL314
+	.8byte	.LVL288
+	.8byte	.LVL289
 	.2byte	0x1
 	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST102:
-	.8byte	.LVL301
-	.8byte	.LVL302
+.LLST92:
+	.8byte	.LVL276
+	.8byte	.LVL277
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL302
-	.8byte	.LVL303
+	.8byte	.LVL277
+	.8byte	.LVL278
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL303
-	.8byte	.LVL304
+	.8byte	.LVL278
+	.8byte	.LVL279
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL304
+	.8byte	.LVL279
 	.8byte	.LFE294
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST98:
-	.8byte	.LVL287
-	.8byte	.LVL288
+.LLST88:
+	.8byte	.LVL262
+	.8byte	.LVL263
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL288
-	.8byte	.LVL291
+	.8byte	.LVL263
+	.8byte	.LVL266
 	.2byte	0x1
 	.byte	0x56
-	.8byte	.LVL291
+	.8byte	.LVL266
 	.8byte	.LFE293
 	.2byte	0x4
 	.byte	0xf3
@@ -45276,452 +45315,451 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST99:
-	.8byte	.LVL287
-	.8byte	.LVL289
+.LLST89:
+	.8byte	.LVL262
+	.8byte	.LVL264
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL289
-	.8byte	.LVL298
+	.8byte	.LVL264
+	.8byte	.LVL273
 	.2byte	0x1
 	.byte	0x57
-	.8byte	.LVL298
-	.8byte	.LVL299
+	.8byte	.LVL273
+	.8byte	.LVL274
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL299
+	.8byte	.LVL274
 	.8byte	.LFE293
 	.2byte	0x1
 	.byte	0x57
 	.8byte	0
 	.8byte	0
-.LLST100:
-	.8byte	.LVL295
-	.8byte	.LVL296-1
+.LLST90:
+	.8byte	.LVL270
+	.8byte	.LVL271-1
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST101:
-	.8byte	.LVL287
-	.8byte	.LVL289
+.LLST91:
+	.8byte	.LVL262
+	.8byte	.LVL264
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL289
-	.8byte	.LVL293
+	.8byte	.LVL264
+	.8byte	.LVL268
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL294
-	.8byte	.LVL297
+	.8byte	.LVL269
+	.8byte	.LVL272
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL298
+	.8byte	.LVL273
 	.8byte	.LFE293
 	.2byte	0x1
 	.byte	0x55
 	.8byte	0
 	.8byte	0
-.LLST251:
-	.8byte	.LVL956
-	.8byte	.LVL957
+.LLST250:
+	.8byte	.LVL958
+	.8byte	.LVL959
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL958
+	.8byte	.LVL960
 	.8byte	.LFE291
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST252:
-	.8byte	.LVL961
+.LLST251:
 	.8byte	.LVL963
+	.8byte	.LVL965
 	.2byte	0x1
 	.byte	0x67
 	.8byte	0
 	.8byte	0
-.LLST283:
-	.8byte	.LVL1146
-	.8byte	.LVL1147
+.LLST282:
+	.8byte	.LVL1148
+	.8byte	.LVL1149
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1149
-	.8byte	.LVL1150
+	.8byte	.LVL1151
+	.8byte	.LVL1152
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1158
-	.8byte	.LVL1161
+	.8byte	.LVL1160
+	.8byte	.LVL1163
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1162
-	.8byte	.LVL1163
+	.8byte	.LVL1164
+	.8byte	.LVL1165
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1163
-	.8byte	.LVL1168
+	.8byte	.LVL1165
+	.8byte	.LVL1170
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1169
+	.8byte	.LVL1171
 	.8byte	.LFE290
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST284:
-	.8byte	.LVL1144
-	.8byte	.LVL1145
+.LLST283:
+	.8byte	.LVL1146
+	.8byte	.LVL1147
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1153
-	.8byte	.LVL1158
+	.8byte	.LVL1155
+	.8byte	.LVL1160
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST285:
-	.8byte	.LVL1149
-	.8byte	.LVL1150
+.LLST284:
+	.8byte	.LVL1151
+	.8byte	.LVL1152
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1155
-	.8byte	.LVL1156
+	.8byte	.LVL1157
+	.8byte	.LVL1158
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1163
-	.8byte	.LVL1166
+	.8byte	.LVL1165
+	.8byte	.LVL1168
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1167
+	.8byte	.LVL1169
 	.8byte	.LFE290
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST286:
-	.8byte	.LVL1142
-	.8byte	.LVL1146
+.LLST285:
+	.8byte	.LVL1144
+	.8byte	.LVL1148
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1146
-	.8byte	.LVL1151
+	.8byte	.LVL1148
+	.8byte	.LVL1153
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1151
-	.8byte	.LVL1152
+	.8byte	.LVL1153
+	.8byte	.LVL1154
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.8byte	.LVL1153
-	.8byte	.LVL1158
+	.8byte	.LVL1155
+	.8byte	.LVL1160
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1158
-	.8byte	.LVL1164
+	.8byte	.LVL1160
+	.8byte	.LVL1166
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1165
+	.8byte	.LVL1167
 	.8byte	.LFE290
 	.2byte	0x1
 	.byte	0x67
 	.8byte	0
 	.8byte	0
-.LLST287:
-	.8byte	.LVL1148
+.LLST286:
 	.8byte	.LVL1150
+	.8byte	.LVL1152
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL1163
+	.8byte	.LVL1165
 	.8byte	.LFE290
 	.2byte	0x1
 	.byte	0x6a
 	.8byte	0
 	.8byte	0
-.LLST388:
-	.8byte	.LVL1686
-	.8byte	.LVL1687
+.LLST393:
+	.8byte	.LVL1715
+	.8byte	.LVL1716
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1693
-	.8byte	.LVL1698
+	.8byte	.LVL1722
+	.8byte	.LVL1727
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1699
+	.8byte	.LVL1728
 	.8byte	.LFE289
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST389:
-	.8byte	.LVL1684
-	.8byte	.LVL1685
+.LLST394:
+	.8byte	.LVL1713
+	.8byte	.LVL1714
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1688
-	.8byte	.LVL1693
+	.8byte	.LVL1717
+	.8byte	.LVL1722
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST390:
-	.8byte	.LVL1690
-	.8byte	.LVL1691
+.LLST395:
+	.8byte	.LVL1719
+	.8byte	.LVL1720
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST356:
-	.8byte	.LVL1510
-	.8byte	.LVL1511
+.LLST355:
+	.8byte	.LVL1512
+	.8byte	.LVL1513
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1511
-	.8byte	.LVL1515
+	.8byte	.LVL1513
+	.8byte	.LVL1519
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1515
-	.8byte	.LVL1516
+	.8byte	.LVL1519
+	.8byte	.LVL1520
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1516
+	.8byte	.LVL1520
 	.8byte	.LFE288
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST357:
-	.8byte	.LVL1518
+.LLST356:
+	.8byte	.LVL1514
 	.8byte	.LVL1519
 	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1519
-	.8byte	.LVL1520-1
-	.2byte	0x9
-	.byte	0x3
-	.8byte	p_sys_spare_buf
+	.byte	0x64
+	.8byte	.LVL1520
+	.8byte	.LFE288
+	.2byte	0x1
+	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST358:
-	.8byte	.LVL1510
-	.8byte	.LVL1511
+.LLST357:
+	.8byte	.LVL1512
+	.8byte	.LVL1515
 	.2byte	0x2
 	.byte	0x36
 	.byte	0x9f
-	.8byte	.LVL1511
-	.8byte	.LVL1512
+	.8byte	.LVL1515
+	.8byte	.LVL1516
 	.2byte	0x3
-	.byte	0x85
+	.byte	0x86
 	.sleb128 -2
 	.byte	0x9f
-	.8byte	.LVL1512
-	.8byte	.LVL1513
+	.8byte	.LVL1516
+	.8byte	.LVL1517
 	.2byte	0x3
-	.byte	0x85
+	.byte	0x86
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL1513
-	.8byte	.LVL1514
+	.8byte	.LVL1517
+	.8byte	.LVL1518
 	.2byte	0x3
-	.byte	0x85
+	.byte	0x86
 	.sleb128 -2
 	.byte	0x9f
-	.8byte	.LVL1516
+	.8byte	.LVL1520
 	.8byte	.LFE288
 	.2byte	0x3
-	.byte	0x85
+	.byte	0x86
 	.sleb128 -2
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST277:
-	.8byte	.LVL1118
-	.8byte	.LVL1119
+.LLST276:
+	.8byte	.LVL1120
+	.8byte	.LVL1121
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1119
-	.8byte	.LVL1130
+	.8byte	.LVL1121
+	.8byte	.LVL1132
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1131
-	.8byte	.LVL1140
+	.8byte	.LVL1133
+	.8byte	.LVL1142
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST278:
-	.8byte	.LVL1120
-	.8byte	.LVL1124
+.LLST277:
+	.8byte	.LVL1122
+	.8byte	.LVL1126
 	.2byte	0x1
 	.byte	0x56
-	.8byte	.LVL1124
-	.8byte	.LVL1125
+	.8byte	.LVL1126
+	.8byte	.LVL1127
 	.2byte	0x3
 	.byte	0x76
 	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL1125
-	.8byte	.LVL1129-1
+	.8byte	.LVL1127
+	.8byte	.LVL1131-1
 	.2byte	0x1
 	.byte	0x56
-	.8byte	.LVL1132
-	.8byte	.LVL1137-1
+	.8byte	.LVL1134
+	.8byte	.LVL1139-1
 	.2byte	0x1
 	.byte	0x56
 	.8byte	0
 	.8byte	0
-.LLST279:
-	.8byte	.LVL1121
-	.8byte	.LVL1122-1
+.LLST278:
+	.8byte	.LVL1123
+	.8byte	.LVL1124-1
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST280:
-	.8byte	.LVL1120
-	.8byte	.LVL1123
+.LLST279:
+	.8byte	.LVL1122
+	.8byte	.LVL1125
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL1124
-	.8byte	.LVL1129-1
+	.8byte	.LVL1126
+	.8byte	.LVL1131-1
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL1132
-	.8byte	.LVL1133
+	.8byte	.LVL1134
+	.8byte	.LVL1135
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL1134
-	.8byte	.LVL1137-1
+	.8byte	.LVL1136
+	.8byte	.LVL1139-1
 	.2byte	0x1
 	.byte	0x55
 	.8byte	0
 	.8byte	0
-.LLST281:
-	.8byte	.LVL1118
-	.8byte	.LVL1119
+.LLST280:
+	.8byte	.LVL1120
+	.8byte	.LVL1121
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1119
-	.8byte	.LVL1135
+	.8byte	.LVL1121
+	.8byte	.LVL1137
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1136
 	.8byte	.LVL1138
+	.8byte	.LVL1140
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1138
-	.8byte	.LVL1139-1
+	.8byte	.LVL1140
+	.8byte	.LVL1141-1
 	.2byte	0x9
 	.byte	0x3
 	.8byte	g_num_data_superblocks
 	.8byte	0
 	.8byte	0
-.LLST282:
-	.8byte	.LVL1118
-	.8byte	.LVL1119
+.LLST281:
+	.8byte	.LVL1120
+	.8byte	.LVL1121
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1119
-	.8byte	.LVL1127
+	.8byte	.LVL1121
+	.8byte	.LVL1129
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1128
-	.8byte	.LVL1141
+	.8byte	.LVL1130
+	.8byte	.LVL1143
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST95:
-	.8byte	.LVL276
-	.8byte	.LVL277
+.LLST85:
+	.8byte	.LVL251
+	.8byte	.LVL252
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL277
-	.8byte	.LVL280
+	.8byte	.LVL252
+	.8byte	.LVL255
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL280
-	.8byte	.LVL281
+	.8byte	.LVL255
+	.8byte	.LVL256
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL281
+	.8byte	.LVL256
 	.8byte	.LFE284
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST96:
-	.8byte	.LVL279
-	.8byte	.LVL285
+.LLST86:
+	.8byte	.LVL254
+	.8byte	.LVL260
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL285
-	.8byte	.LVL286
+	.8byte	.LVL260
+	.8byte	.LVL261
 	.2byte	0x3
 	.byte	0x75
 	.sleb128 1
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST97:
-	.8byte	.LVL283
-	.8byte	.LVL284-1
+.LLST87:
+	.8byte	.LVL258
+	.8byte	.LVL259-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL284-1
+	.8byte	.LVL259-1
 	.8byte	.LFE284
 	.2byte	0x1
 	.byte	0x54
 	.8byte	0
 	.8byte	0
-.LLST331:
-	.8byte	.LVL1369
-	.8byte	.LVL1370
+.LLST330:
+	.8byte	.LVL1371
+	.8byte	.LVL1372
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1370
-	.8byte	.LVL1374
+	.8byte	.LVL1372
+	.8byte	.LVL1376
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1374
-	.8byte	.LVL1375
+	.8byte	.LVL1376
+	.8byte	.LVL1377
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1375
+	.8byte	.LVL1377
 	.8byte	.LFE281
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST332:
-	.8byte	.LVL1371
+.LLST331:
 	.8byte	.LVL1373
+	.8byte	.LVL1375
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL1375
+	.8byte	.LVL1377
 	.8byte	.LFE281
 	.2byte	0x1
 	.byte	0x6a
 	.8byte	0
 	.8byte	0
-.LLST333:
-	.8byte	.LVL1371
-	.8byte	.LVL1372
+.LLST332:
+	.8byte	.LVL1373
+	.8byte	.LVL1374
 	.2byte	0x8
 	.byte	0x83
 	.sleb128 6
@@ -45731,8 +45769,8 @@ __func__.7632:
 	.byte	0xff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL1372
-	.8byte	.LVL1373
+	.8byte	.LVL1374
+	.8byte	.LVL1375
 	.2byte	0x9
 	.byte	0x8f
 	.sleb128 324
@@ -45742,8 +45780,8 @@ __func__.7632:
 	.byte	0xff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL1375
-	.8byte	.LVL1378-1
+	.8byte	.LVL1377
+	.8byte	.LVL1380-1
 	.2byte	0x8
 	.byte	0x83
 	.sleb128 6
@@ -45753,8 +45791,8 @@ __func__.7632:
 	.byte	0xff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL1378-1
-	.8byte	.LVL1392
+	.8byte	.LVL1380-1
+	.8byte	.LVL1394
 	.2byte	0x9
 	.byte	0x8f
 	.sleb128 324
@@ -45764,8 +45802,8 @@ __func__.7632:
 	.byte	0xff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL1392
-	.8byte	.LVL1397
+	.8byte	.LVL1394
+	.8byte	.LVL1399
 	.2byte	0x8
 	.byte	0x83
 	.sleb128 6
@@ -45775,7 +45813,7 @@ __func__.7632:
 	.byte	0xff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL1397
+	.8byte	.LVL1399
 	.8byte	.LFE281
 	.2byte	0x9
 	.byte	0x8f
@@ -45788,51 +45826,51 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST334:
-	.8byte	.LVL1375
+.LLST333:
 	.8byte	.LVL1377
+	.8byte	.LVL1379
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1377
-	.8byte	.LVL1380
+	.8byte	.LVL1379
+	.8byte	.LVL1382
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1392
-	.8byte	.LVL1393
+	.8byte	.LVL1394
+	.8byte	.LVL1395
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1394
-	.8byte	.LVL1401
+	.8byte	.LVL1396
+	.8byte	.LVL1403
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1436
-	.8byte	.LVL1437
+	.8byte	.LVL1438
+	.8byte	.LVL1439
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1442
-	.8byte	.LVL1443
+	.8byte	.LVL1444
+	.8byte	.LVL1445
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1443
-	.8byte	.LVL1447
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1506
-	.8byte	.LVL1507
+	.8byte	.LVL1445
+	.8byte	.LVL1449
 	.2byte	0x1
 	.byte	0x50
 	.8byte	.LVL1508
 	.8byte	.LVL1509
 	.2byte	0x1
 	.byte	0x50
+	.8byte	.LVL1510
+	.8byte	.LVL1511
+	.2byte	0x1
+	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST335:
-	.8byte	.LVL1435
-	.8byte	.LVL1436
+.LLST334:
+	.8byte	.LVL1437
+	.8byte	.LVL1438
 	.2byte	0x9
 	.byte	0x8f
 	.sleb128 324
@@ -45842,476 +45880,476 @@ __func__.7632:
 	.byte	0xff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL1460
 	.8byte	.LVL1462
+	.8byte	.LVL1464
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1509
+	.8byte	.LVL1511
 	.8byte	.LFE281
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST336:
-	.8byte	.LVL1419
-	.8byte	.LVL1420
-	.2byte	0x1
-	.byte	0x6a
+.LLST335:
 	.8byte	.LVL1421
 	.8byte	.LVL1422
 	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL1422
-	.8byte	.LVL1423
-	.2byte	0x1
 	.byte	0x6a
 	.8byte	.LVL1423
-	.8byte	.LVL1432
+	.8byte	.LVL1424
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1433
+	.8byte	.LVL1424
+	.8byte	.LVL1425
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL1425
 	.8byte	.LVL1434
 	.2byte	0x1
 	.byte	0x68
 	.8byte	.LVL1435
 	.8byte	.LVL1436
 	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL1437
+	.8byte	.LVL1438
+	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL1436
-	.8byte	.LVL1440
+	.8byte	.LVL1438
+	.8byte	.LVL1442
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1441
-	.8byte	.LVL1447
+	.8byte	.LVL1443
+	.8byte	.LVL1449
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1447
-	.8byte	.LVL1452
+	.8byte	.LVL1449
+	.8byte	.LVL1454
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1452
+	.8byte	.LVL1454
 	.8byte	.LFE281
 	.2byte	0x1
 	.byte	0x67
 	.8byte	0
 	.8byte	0
-.LLST337:
-	.8byte	.LVL1389
-	.8byte	.LVL1392
+.LLST336:
+	.8byte	.LVL1391
+	.8byte	.LVL1394
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL1416
+	.8byte	.LVL1418
 	.8byte	.LFE281
 	.2byte	0x1
 	.byte	0x6b
 	.8byte	0
 	.8byte	0
-.LLST338:
-	.8byte	.LVL1387
-	.8byte	.LVL1392
+.LLST337:
+	.8byte	.LVL1389
+	.8byte	.LVL1394
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1411
-	.8byte	.LVL1412
+	.8byte	.LVL1413
+	.8byte	.LVL1414
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1416
+	.8byte	.LVL1418
 	.8byte	.LFE281
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST339:
-	.8byte	.LVL1376
-	.8byte	.LVL1378-1
+.LLST338:
+	.8byte	.LVL1378
+	.8byte	.LVL1380-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1392
-	.8byte	.LVL1395
+	.8byte	.LVL1394
+	.8byte	.LVL1397
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1396
-	.8byte	.LVL1397
+	.8byte	.LVL1398
+	.8byte	.LVL1399
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1402
-	.8byte	.LVL1403
+	.8byte	.LVL1404
+	.8byte	.LVL1405
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1403
-	.8byte	.LVL1406
+	.8byte	.LVL1405
+	.8byte	.LVL1408
 	.2byte	0x2
 	.byte	0x74
 	.sleb128 0
-	.8byte	.LVL1406
-	.8byte	.LVL1407
+	.8byte	.LVL1408
+	.8byte	.LVL1409
 	.2byte	0x2
 	.byte	0x74
 	.sleb128 -2
-	.8byte	.LVL1424
-	.8byte	.LVL1427
+	.8byte	.LVL1426
+	.8byte	.LVL1429
 	.2byte	0x1
 	.byte	0x56
-	.8byte	.LVL1427
-	.8byte	.LVL1428
+	.8byte	.LVL1429
+	.8byte	.LVL1430
 	.2byte	0x2
 	.byte	0x72
 	.sleb128 0
-	.8byte	.LVL1444
-	.8byte	.LVL1445
+	.8byte	.LVL1446
+	.8byte	.LVL1447
 	.2byte	0x6
 	.byte	0x8f
 	.sleb128 328
 	.byte	0x6
 	.byte	0x32
 	.byte	0x1c
-	.8byte	.LVL1445
-	.8byte	.LVL1446
+	.8byte	.LVL1447
+	.8byte	.LVL1448
 	.2byte	0x2
 	.byte	0x74
 	.sleb128 -4
-	.8byte	.LVL1453
-	.8byte	.LVL1456
+	.8byte	.LVL1455
+	.8byte	.LVL1458
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1456
-	.8byte	.LVL1457
+	.8byte	.LVL1458
+	.8byte	.LVL1459
 	.2byte	0x2
 	.byte	0x72
 	.sleb128 0
-	.8byte	.LVL1457
-	.8byte	.LVL1458
+	.8byte	.LVL1459
+	.8byte	.LVL1460
 	.2byte	0x2
 	.byte	0x72
 	.sleb128 -2
-	.8byte	.LVL1506
-	.8byte	.LVL1509
+	.8byte	.LVL1508
+	.8byte	.LVL1511
 	.2byte	0x2
 	.byte	0x74
 	.sleb128 -4
 	.8byte	0
 	.8byte	0
-.LLST340:
-	.8byte	.LVL1379
+.LLST339:
 	.8byte	.LVL1381
+	.8byte	.LVL1383
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1381
-	.8byte	.LVL1390
+	.8byte	.LVL1383
+	.8byte	.LVL1392
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1397
-	.8byte	.LVL1398
+	.8byte	.LVL1399
+	.8byte	.LVL1400
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1398
-	.8byte	.LVL1421
+	.8byte	.LVL1400
+	.8byte	.LVL1423
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1422
-	.8byte	.LVL1423
+	.8byte	.LVL1424
+	.8byte	.LVL1425
 	.2byte	0x1
 	.byte	0x67
 	.8byte	0
 	.8byte	0
-.LLST342:
-	.8byte	.LVL1382
-	.8byte	.LVL1386
+.LLST341:
+	.8byte	.LVL1384
+	.8byte	.LVL1388
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1401
-	.8byte	.LVL1404
+	.8byte	.LVL1403
+	.8byte	.LVL1406
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1405
-	.8byte	.LVL1411
+	.8byte	.LVL1407
+	.8byte	.LVL1413
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1412
-	.8byte	.LVL1416
+	.8byte	.LVL1414
+	.8byte	.LVL1418
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1423
 	.8byte	.LVL1425
+	.8byte	.LVL1427
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1426
-	.8byte	.LVL1429
+	.8byte	.LVL1428
+	.8byte	.LVL1431
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1436
-	.8byte	.LVL1437
+	.8byte	.LVL1438
+	.8byte	.LVL1439
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1437
 	.8byte	.LVL1439
+	.8byte	.LVL1441
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1452
 	.8byte	.LVL1454
+	.8byte	.LVL1456
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1455
-	.8byte	.LVL1458
+	.8byte	.LVL1457
+	.8byte	.LVL1460
 	.2byte	0x1
 	.byte	0x68
 	.8byte	0
 	.8byte	0
-.LLST343:
-	.8byte	.LVL1384
-	.8byte	.LVL1385
+.LLST342:
+	.8byte	.LVL1386
+	.8byte	.LVL1387
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1385
 	.8byte	.LVL1387
+	.8byte	.LVL1389
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1407
-	.8byte	.LVL1410
+	.8byte	.LVL1409
+	.8byte	.LVL1412
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1412
 	.8byte	.LVL1414
+	.8byte	.LVL1416
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1415
-	.8byte	.LVL1416
+	.8byte	.LVL1417
+	.8byte	.LVL1418
 	.2byte	0x1
 	.byte	0x53
 	.8byte	0
 	.8byte	0
-.LLST344:
-	.8byte	.LVL1430
-	.8byte	.LVL1431
+.LLST343:
+	.8byte	.LVL1432
+	.8byte	.LVL1433
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1438
-	.8byte	.LVL1439
+	.8byte	.LVL1440
+	.8byte	.LVL1441
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST345:
-	.8byte	.LVL1461
-	.8byte	.LVL1465
+.LLST344:
+	.8byte	.LVL1463
+	.8byte	.LVL1467
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1467
-	.8byte	.LVL1477
+	.8byte	.LVL1469
+	.8byte	.LVL1479
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1477
-	.8byte	.LVL1480
+	.8byte	.LVL1479
+	.8byte	.LVL1482
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1480
-	.8byte	.LVL1502
+	.8byte	.LVL1482
+	.8byte	.LVL1504
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1502
 	.8byte	.LVL1504
+	.8byte	.LVL1506
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1504
 	.8byte	.LVL1506
+	.8byte	.LVL1508
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST346:
-	.8byte	.LVL1461
-	.8byte	.LVL1465
+.LLST345:
+	.8byte	.LVL1463
+	.8byte	.LVL1467
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1467
-	.8byte	.LVL1475
+	.8byte	.LVL1469
+	.8byte	.LVL1477
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1480
-	.8byte	.LVL1495
+	.8byte	.LVL1482
+	.8byte	.LVL1497
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1495
 	.8byte	.LVL1497
+	.8byte	.LVL1499
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1504
 	.8byte	.LVL1506
+	.8byte	.LVL1508
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST347:
-	.8byte	.LVL1384
-	.8byte	.LVL1392
+.LLST346:
+	.8byte	.LVL1386
+	.8byte	.LVL1394
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1407
+	.8byte	.LVL1409
 	.8byte	.LFE281
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST348:
-	.8byte	.LVL1369
-	.8byte	.LVL1373
+.LLST347:
+	.8byte	.LVL1371
+	.8byte	.LVL1375
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1375
-	.8byte	.LVL1385
+	.8byte	.LVL1377
+	.8byte	.LVL1387
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1385
-	.8byte	.LVL1390
+	.8byte	.LVL1387
+	.8byte	.LVL1392
 	.2byte	0x1
 	.byte	0x56
-	.8byte	.LVL1392
-	.8byte	.LVL1407
+	.8byte	.LVL1394
+	.8byte	.LVL1409
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1407
-	.8byte	.LVL1418
+	.8byte	.LVL1409
+	.8byte	.LVL1420
 	.2byte	0x1
 	.byte	0x56
-	.8byte	.LVL1418
-	.8byte	.LVL1434
+	.8byte	.LVL1420
+	.8byte	.LVL1436
 	.2byte	0x1
 	.byte	0x6c
-	.8byte	.LVL1447
-	.8byte	.LVL1452
+	.8byte	.LVL1449
+	.8byte	.LVL1454
 	.2byte	0x1
 	.byte	0x6c
 	.8byte	0
 	.8byte	0
-.LLST349:
-	.8byte	.LVL1408
-	.8byte	.LVL1412
+.LLST348:
+	.8byte	.LVL1410
+	.8byte	.LVL1414
 	.2byte	0x1
 	.byte	0x58
-	.8byte	.LVL1448
-	.8byte	.LVL1449
+	.8byte	.LVL1450
+	.8byte	.LVL1451
 	.2byte	0x1
 	.byte	0x56
-	.8byte	.LVL1449
-	.8byte	.LVL1450
+	.8byte	.LVL1451
+	.8byte	.LVL1452
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 0
-	.8byte	.LVL1450
-	.8byte	.LVL1451
+	.8byte	.LVL1452
+	.8byte	.LVL1453
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 -32
-	.8byte	.LVL1463
-	.8byte	.LVL1464
+	.8byte	.LVL1465
+	.8byte	.LVL1466
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1467
-	.8byte	.LVL1470-1
+	.8byte	.LVL1469
+	.8byte	.LVL1472-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1472
-	.8byte	.LVL1473-1
+	.8byte	.LVL1474
+	.8byte	.LVL1475-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1473-1
-	.8byte	.LVL1474
+	.8byte	.LVL1475-1
+	.8byte	.LVL1476
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 296
-	.8byte	.LVL1482
-	.8byte	.LVL1483
+	.8byte	.LVL1484
+	.8byte	.LVL1485
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 296
-	.8byte	.LVL1486
-	.8byte	.LVL1487-1
+	.8byte	.LVL1488
+	.8byte	.LVL1489-1
 	.2byte	0x2
 	.byte	0x74
 	.sleb128 16
-	.8byte	.LVL1487-1
-	.8byte	.LVL1488
+	.8byte	.LVL1489-1
+	.8byte	.LVL1490
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 256
-	.8byte	.LVL1498
-	.8byte	.LVL1499-1
+	.8byte	.LVL1500
+	.8byte	.LVL1501-1
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL1499-1
-	.8byte	.LVL1502
+	.8byte	.LVL1501-1
+	.8byte	.LVL1504
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 296
 	.8byte	0
 	.8byte	0
-.LLST350:
-	.8byte	.LVL1417
-	.8byte	.LVL1434
+.LLST349:
+	.8byte	.LVL1419
+	.8byte	.LVL1436
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1447
-	.8byte	.LVL1452
+	.8byte	.LVL1449
+	.8byte	.LVL1454
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST351:
-	.8byte	.LVL1417
-	.8byte	.LVL1421
+.LLST350:
+	.8byte	.LVL1419
+	.8byte	.LVL1423
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1422
-	.8byte	.LVL1423
+	.8byte	.LVL1424
+	.8byte	.LVL1425
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST352:
-	.8byte	.LVL1473
-	.8byte	.LVL1474
+.LLST351:
+	.8byte	.LVL1475
+	.8byte	.LVL1476
 	.2byte	0x6
 	.byte	0x8f
 	.sleb128 296
 	.byte	0x6
 	.byte	0x23
 	.uleb128 0x4
-	.8byte	.LVL1482
-	.8byte	.LVL1483
+	.8byte	.LVL1484
+	.8byte	.LVL1485
 	.2byte	0x6
 	.byte	0x8f
 	.sleb128 296
@@ -46320,23 +46358,23 @@ __func__.7632:
 	.uleb128 0x4
 	.8byte	0
 	.8byte	0
-.LLST353:
-	.8byte	.LVL1489
-	.8byte	.LVL1492
+.LLST352:
+	.8byte	.LVL1491
+	.8byte	.LVL1494
 	.2byte	0x1
 	.byte	0x53
 	.8byte	0
 	.8byte	0
-.LLST354:
-	.8byte	.LVL1496
-	.8byte	.LVL1502
+.LLST353:
+	.8byte	.LVL1498
+	.8byte	.LVL1504
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST355:
-	.8byte	.LVL1499
-	.8byte	.LVL1500-1
+.LLST354:
+	.8byte	.LVL1501
+	.8byte	.LVL1502-1
 	.2byte	0x6
 	.byte	0x8f
 	.sleb128 296
@@ -46345,112 +46383,112 @@ __func__.7632:
 	.uleb128 0x4
 	.8byte	0
 	.8byte	0
-.LLST245:
-	.8byte	.LVL936
-	.8byte	.LVL937
+.LLST244:
+	.8byte	.LVL938
+	.8byte	.LVL939
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL937
-	.8byte	.LVL949
+	.8byte	.LVL939
+	.8byte	.LVL951
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL949
-	.8byte	.LVL950
+	.8byte	.LVL951
+	.8byte	.LVL952
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL950
+	.8byte	.LVL952
 	.8byte	.LFE280
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST246:
-	.8byte	.LVL936
-	.8byte	.LVL938-1
+.LLST245:
+	.8byte	.LVL938
+	.8byte	.LVL940-1
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST247:
-	.8byte	.LVL939
-	.8byte	.LVL940
+.LLST246:
+	.8byte	.LVL941
+	.8byte	.LVL942
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL940
-	.8byte	.LVL944-1
+	.8byte	.LVL942
+	.8byte	.LVL946-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL950
-	.8byte	.LVL955
+	.8byte	.LVL952
+	.8byte	.LVL957
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL955
+	.8byte	.LVL957
 	.8byte	.LFE280
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST248:
-	.8byte	.LVL942
-	.8byte	.LVL943
+.LLST247:
+	.8byte	.LVL944
+	.8byte	.LVL945
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL950
-	.8byte	.LVL953
+	.8byte	.LVL952
+	.8byte	.LVL955
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL954
-	.8byte	.LVL955
+	.8byte	.LVL956
+	.8byte	.LVL957
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST249:
-	.8byte	.LVL942
-	.8byte	.LVL947
+.LLST248:
+	.8byte	.LVL944
+	.8byte	.LVL949
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL950
-	.8byte	.LVL951
+	.8byte	.LVL952
+	.8byte	.LVL953
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL952
-	.8byte	.LVL955
+	.8byte	.LVL954
+	.8byte	.LVL957
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST250:
-	.8byte	.LVL941
-	.8byte	.LVL944-1
+.LLST249:
+	.8byte	.LVL943
+	.8byte	.LVL946-1
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL950
-	.8byte	.LVL955
+	.8byte	.LVL952
+	.8byte	.LVL957
 	.2byte	0x1
 	.byte	0x54
 	.8byte	0
 	.8byte	0
-.LLST90:
-	.8byte	.LVL261
-	.8byte	.LVL262
+.LLST80:
+	.8byte	.LVL236
+	.8byte	.LVL237
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL262
+	.8byte	.LVL237
 	.8byte	.LFE279
 	.2byte	0x1
 	.byte	0x56
 	.8byte	0
 	.8byte	0
-.LLST91:
-	.8byte	.LVL261
-	.8byte	.LVL264
+.LLST81:
+	.8byte	.LVL236
+	.8byte	.LVL239
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL264
+	.8byte	.LVL239
 	.8byte	.LFE279
 	.2byte	0x4
 	.byte	0xf3
@@ -46459,125 +46497,125 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST92:
-	.8byte	.LVL263
-	.8byte	.LVL265
+.LLST82:
+	.8byte	.LVL238
+	.8byte	.LVL240
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL266
-	.8byte	.LVL267
+	.8byte	.LVL241
+	.8byte	.LVL242
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL268
-	.8byte	.LVL269
+	.8byte	.LVL243
+	.8byte	.LVL244
 	.2byte	0x1
 	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST276:
-	.8byte	.LVL1106
-	.8byte	.LVL1107
+.LLST275:
+	.8byte	.LVL1108
+	.8byte	.LVL1109
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST265:
-	.8byte	.LVL1057
-	.8byte	.LVL1060
+.LLST264:
+	.8byte	.LVL1059
+	.8byte	.LVL1062
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1060
-	.8byte	.LVL1078
+	.8byte	.LVL1062
+	.8byte	.LVL1080
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1078
-	.8byte	.LVL1084
+	.8byte	.LVL1080
+	.8byte	.LVL1086
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1084
+	.8byte	.LVL1086
 	.8byte	.LFE275
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST266:
-	.8byte	.LVL1066
-	.8byte	.LVL1067
+.LLST265:
+	.8byte	.LVL1068
+	.8byte	.LVL1069
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1067
-	.8byte	.LVL1082
+	.8byte	.LVL1069
+	.8byte	.LVL1084
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL1084
+	.8byte	.LVL1086
 	.8byte	.LFE275
 	.2byte	0x1
 	.byte	0x6b
 	.8byte	0
 	.8byte	0
-.LLST267:
-	.8byte	.LVL1071
-	.8byte	.LVL1072
+.LLST266:
+	.8byte	.LVL1073
+	.8byte	.LVL1074
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1072
-	.8byte	.LVL1073
+	.8byte	.LVL1074
+	.8byte	.LVL1075
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1084
 	.8byte	.LVL1086
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL1087
 	.8byte	.LVL1088
 	.2byte	0x1
 	.byte	0x66
+	.8byte	.LVL1089
 	.8byte	.LVL1090
-	.8byte	.LVL1091-1
 	.2byte	0x1
-	.byte	0x55
+	.byte	0x66
 	.8byte	.LVL1092
-	.8byte	.LVL1093
+	.8byte	.LVL1093-1
 	.2byte	0x1
 	.byte	0x55
 	.8byte	.LVL1094
 	.8byte	.LVL1095
 	.2byte	0x1
-	.byte	0x50
+	.byte	0x55
+	.8byte	.LVL1096
 	.8byte	.LVL1097
-	.8byte	.LVL1102
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1103
+	.8byte	.LVL1099
+	.8byte	.LVL1104
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1105
 	.8byte	.LFE275
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST268:
-	.8byte	.LVL1070
-	.8byte	.LVL1073
+.LLST267:
+	.8byte	.LVL1072
+	.8byte	.LVL1075
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL1084
-	.8byte	.LVL1088
+	.8byte	.LVL1086
+	.8byte	.LVL1090
 	.2byte	0x1
 	.byte	0x6a
 	.8byte	0
 	.8byte	0
-.LLST269:
-	.8byte	.LVL1098
-	.8byte	.LVL1099
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1099
+.LLST268:
 	.8byte	.LVL1100
+	.8byte	.LVL1101
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1101
+	.8byte	.LVL1102
 	.2byte	0x7
 	.byte	0x72
 	.sleb128 -1
@@ -46586,8 +46624,8 @@ __func__.7632:
 	.byte	0x7a
 	.sleb128 0
 	.byte	0x22
-	.8byte	.LVL1100
-	.8byte	.LVL1101
+	.8byte	.LVL1102
+	.8byte	.LVL1103
 	.2byte	0xf
 	.byte	0x70
 	.sleb128 0
@@ -46606,200 +46644,196 @@ __func__.7632:
 	.byte	0x22
 	.8byte	0
 	.8byte	0
-.LLST270:
-	.8byte	.LVL1058
-	.8byte	.LVL1079
+.LLST269:
+	.8byte	.LVL1060
+	.8byte	.LVL1081
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1084
+	.8byte	.LVL1086
 	.8byte	.LFE275
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST271:
-	.8byte	.LVL1059
-	.8byte	.LVL1068
+.LLST270:
+	.8byte	.LVL1061
+	.8byte	.LVL1070
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1088
+	.8byte	.LVL1090
 	.8byte	.LFE275
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST272:
-	.8byte	.LVL1061
-	.8byte	.LVL1062
+.LLST271:
+	.8byte	.LVL1063
+	.8byte	.LVL1064
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1062
-	.8byte	.LVL1064-1
+	.8byte	.LVL1064
+	.8byte	.LVL1066-1
 	.2byte	0x2
 	.byte	0x83
 	.sleb128 24
-	.8byte	.LVL1064-1
-	.8byte	.LVL1083
+	.8byte	.LVL1066-1
+	.8byte	.LVL1085
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 256
-	.8byte	.LVL1083
-	.8byte	.LVL1084
+	.8byte	.LVL1085
+	.8byte	.LVL1086
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 112
-	.8byte	.LVL1084
+	.8byte	.LVL1086
 	.8byte	.LFE275
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 256
 	.8byte	0
 	.8byte	0
-.LLST273:
-	.8byte	.LVL1061
-	.8byte	.LVL1080
+.LLST272:
+	.8byte	.LVL1063
+	.8byte	.LVL1082
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1084
+	.8byte	.LVL1086
 	.8byte	.LFE275
 	.2byte	0x1
 	.byte	0x67
 	.8byte	0
 	.8byte	0
-.LLST274:
-	.8byte	.LVL1063
-	.8byte	.LVL1083
+.LLST273:
+	.8byte	.LVL1065
+	.8byte	.LVL1085
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 268
-	.8byte	.LVL1083
-	.8byte	.LVL1084
+	.8byte	.LVL1085
+	.8byte	.LVL1086
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 124
-	.8byte	.LVL1084
+	.8byte	.LVL1086
 	.8byte	.LFE275
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 268
 	.8byte	0
 	.8byte	0
-.LLST275:
-	.8byte	.LVL1065
-	.8byte	.LVL1081
+.LLST274:
+	.8byte	.LVL1067
+	.8byte	.LVL1083
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL1084
+	.8byte	.LVL1086
 	.8byte	.LFE275
 	.2byte	0x1
 	.byte	0x69
 	.8byte	0
 	.8byte	0
-.LLST463:
-	.8byte	.LVL2077
-	.8byte	.LVL2080
+.LLST462:
+	.8byte	.LVL2057
+	.8byte	.LVL2060
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL2089
-	.8byte	.LVL2091
+	.8byte	.LVL2069
+	.8byte	.LVL2071
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL2092
+	.8byte	.LVL2072
 	.8byte	.LFE274
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST89:
-	.8byte	.LVL259
-	.8byte	.LVL260
+.LLST79:
+	.8byte	.LVL234
+	.8byte	.LVL235
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL260
+	.8byte	.LVL235
 	.8byte	.LFE273
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST258:
-	.8byte	.LVL992
-	.8byte	.LVL999
+.LLST257:
+	.8byte	.LVL994
+	.8byte	.LVL1001
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL999
-	.8byte	.LVL1000
+	.8byte	.LVL1001
+	.8byte	.LVL1002
 	.2byte	0x3
 	.byte	0x75
 	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL1000
-	.8byte	.LVL1001
+	.8byte	.LVL1002
+	.8byte	.LVL1003
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL1003
-	.8byte	.LVL1004-1
+	.8byte	.LVL1005
+	.8byte	.LVL1006-1
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL1004
 	.8byte	.LVL1006
+	.8byte	.LVL1008
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST259:
-	.8byte	.LVL991
-	.8byte	.LVL1040
+.LLST258:
+	.8byte	.LVL993
+	.8byte	.LVL1042
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 332
-	.8byte	.LVL1040
-	.8byte	.LVL1041
+	.8byte	.LVL1042
+	.8byte	.LVL1043
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 156
-	.8byte	.LVL1041
+	.8byte	.LVL1043
 	.8byte	.LFE270
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 332
 	.8byte	0
 	.8byte	0
-.LLST260:
-	.8byte	.LVL994
-	.8byte	.LVL995-1
+.LLST259:
+	.8byte	.LVL996
+	.8byte	.LVL997-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL995-1
-	.8byte	.LVL998
+	.8byte	.LVL997-1
+	.8byte	.LVL1000
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL1007
-	.8byte	.LVL1038
+	.8byte	.LVL1009
+	.8byte	.LVL1040
 	.2byte	0x1
 	.byte	0x6a
 	.8byte	0
 	.8byte	0
-.LLST261:
-	.8byte	.LVL992
-	.8byte	.LVL996
+.LLST260:
+	.8byte	.LVL994
+	.8byte	.LVL998
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL997
-	.8byte	.LVL1001
+	.8byte	.LVL999
+	.8byte	.LVL1003
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1003
 	.8byte	.LVL1005
+	.8byte	.LVL1007
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST262:
-	.8byte	.LVL1017
-	.8byte	.LVL1018
-	.2byte	0x1
-	.byte	0x51
+.LLST261:
 	.8byte	.LVL1019
 	.8byte	.LVL1020
 	.2byte	0x1
@@ -46808,10 +46842,10 @@ __func__.7632:
 	.8byte	.LVL1022
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1028
-	.8byte	.LVL1029
+	.8byte	.LVL1023
+	.8byte	.LVL1024
 	.2byte	0x1
-	.byte	0x52
+	.byte	0x51
 	.8byte	.LVL1030
 	.8byte	.LVL1031
 	.2byte	0x1
@@ -46820,11 +46854,11 @@ __func__.7632:
 	.8byte	.LVL1033
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1042
-	.8byte	.LVL1047
+	.8byte	.LVL1034
+	.8byte	.LVL1035
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1048
+	.byte	0x52
+	.8byte	.LVL1044
 	.8byte	.LVL1049
 	.2byte	0x1
 	.byte	0x50
@@ -46832,19 +46866,23 @@ __func__.7632:
 	.8byte	.LVL1051
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1054
-	.8byte	.LVL1055
+	.8byte	.LVL1052
+	.8byte	.LVL1053
 	.2byte	0x1
 	.byte	0x50
 	.8byte	.LVL1056
+	.8byte	.LVL1057
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1058
 	.8byte	.LFE270
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST263:
-	.8byte	.LVL1008
+.LLST262:
 	.8byte	.LVL1010
+	.8byte	.LVL1012
 	.2byte	0x8
 	.byte	0x40
 	.byte	0x8f
@@ -46853,8 +46891,8 @@ __func__.7632:
 	.byte	0x2
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL1011
-	.8byte	.LVL1012
+	.8byte	.LVL1014
+	.8byte	.LVL1015
 	.2byte	0x8
 	.byte	0x40
 	.byte	0x8f
@@ -46863,145 +46901,145 @@ __func__.7632:
 	.byte	0x2
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL1012
-	.8byte	.LVL1013
+	.8byte	.LVL1015
+	.8byte	.LVL1016
 	.2byte	0x5
 	.byte	0x41
 	.byte	0x75
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL1016
-	.8byte	.LVL1023
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1024
+	.8byte	.LVL1018
 	.8byte	.LVL1025
 	.2byte	0x1
 	.byte	0x50
+	.8byte	.LVL1026
 	.8byte	.LVL1027
-	.8byte	.LVL1034
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1035
+	.8byte	.LVL1029
 	.8byte	.LVL1036
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1043
-	.8byte	.LVL1044
+	.8byte	.LVL1037
+	.8byte	.LVL1038
 	.2byte	0x1
-	.byte	0x51
+	.byte	0x50
 	.8byte	.LVL1045
 	.8byte	.LVL1046
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1051
-	.8byte	.LVL1052
+	.8byte	.LVL1047
+	.8byte	.LVL1048
 	.2byte	0x1
-	.byte	0x50
+	.byte	0x51
 	.8byte	.LVL1053
 	.8byte	.LVL1054
 	.2byte	0x1
 	.byte	0x50
+	.8byte	.LVL1055
+	.8byte	.LVL1056
+	.2byte	0x1
+	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST264:
-	.8byte	.LVL1007
-	.8byte	.LVL1038
+.LLST263:
+	.8byte	.LVL1009
+	.8byte	.LVL1040
 	.2byte	0x1
 	.byte	0x6b
 	.8byte	0
 	.8byte	0
-.LLST385:
-	.8byte	.LVL1663
-	.8byte	.LVL1670
+.LLST384:
+	.8byte	.LVL1665
+	.8byte	.LVL1672
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1670
-	.8byte	.LVL1682
+	.8byte	.LVL1672
+	.8byte	.LVL1684
 	.2byte	0x1
 	.byte	0x6a
 	.8byte	0
 	.8byte	0
-.LLST386:
-	.8byte	.LVL1664
-	.8byte	.LVL1681
+.LLST385:
+	.8byte	.LVL1666
+	.8byte	.LVL1683
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST387:
-	.8byte	.LVL1663
-	.8byte	.LVL1670
+.LLST386:
+	.8byte	.LVL1665
+	.8byte	.LVL1672
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1670
-	.8byte	.LVL1676
+	.8byte	.LVL1672
+	.8byte	.LVL1678
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1677
-	.8byte	.LVL1680
+	.8byte	.LVL1679
+	.8byte	.LVL1682
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST254:
-	.8byte	.LVL975
+.LLST253:
 	.8byte	.LVL977
+	.8byte	.LVL979
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL977
-	.8byte	.LVL981
+	.8byte	.LVL979
+	.8byte	.LVL983
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL981
-	.8byte	.LVL982-1
+	.8byte	.LVL983
+	.8byte	.LVL984-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL982-1
-	.8byte	.LVL982
+	.8byte	.LVL984-1
+	.8byte	.LVL984
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL982
-	.8byte	.LVL985
+	.8byte	.LVL984
+	.8byte	.LVL987
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL985
+	.8byte	.LVL987
 	.8byte	.LFE267
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST255:
-	.8byte	.LVL978
-	.8byte	.LVL979
+.LLST254:
+	.8byte	.LVL980
+	.8byte	.LVL981
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL979
-	.8byte	.LVL980-1
+	.8byte	.LVL981
+	.8byte	.LVL982-1
 	.2byte	0x9
 	.byte	0x3
 	.8byte	req_sys+4
-	.8byte	.LVL982
-	.8byte	.LVL983
+	.8byte	.LVL984
+	.8byte	.LVL985
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL983
-	.8byte	.LVL984-1
+	.8byte	.LVL985
+	.8byte	.LVL986-1
 	.2byte	0x9
 	.byte	0x3
 	.8byte	req_sys+4
 	.8byte	0
 	.8byte	0
-.LLST256:
-	.8byte	.LVL975
-	.8byte	.LVL976
+.LLST255:
+	.8byte	.LVL977
+	.8byte	.LVL978
 	.2byte	0x7
 	.byte	0x70
 	.sleb128 6
@@ -47010,7 +47048,7 @@ __func__.7632:
 	.byte	0x31
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL985
+	.8byte	.LVL987
 	.8byte	.LFE267
 	.2byte	0x7
 	.byte	0x70
@@ -47022,36 +47060,36 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST257:
-	.8byte	.LVL975
-	.8byte	.LVL976
+.LLST256:
+	.8byte	.LVL977
+	.8byte	.LVL978
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 40
-	.8byte	.LVL985
+	.8byte	.LVL987
 	.8byte	.LFE267
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 40
 	.8byte	0
 	.8byte	0
-.LLST375:
-	.8byte	.LVL1622
-	.8byte	.LVL1625
+.LLST374:
+	.8byte	.LVL1624
+	.8byte	.LVL1627
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1625
-	.8byte	.LVL1629
+	.8byte	.LVL1627
+	.8byte	.LVL1631
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1629
-	.8byte	.LVL1630
+	.8byte	.LVL1631
+	.8byte	.LVL1632
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1630
+	.8byte	.LVL1632
 	.8byte	.LFE265
 	.2byte	0x4
 	.byte	0xf3
@@ -47060,93 +47098,93 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST376:
-	.8byte	.LVL1622
-	.8byte	.LVL1623
+.LLST375:
+	.8byte	.LVL1624
+	.8byte	.LVL1625
 	.2byte	0x3
 	.byte	0x8
 	.byte	0x20
 	.byte	0x9f
-	.8byte	.LVL1623
-	.8byte	.LVL1624
+	.8byte	.LVL1625
+	.8byte	.LVL1626
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.8byte	.LVL1624
 	.8byte	.LVL1626
+	.8byte	.LVL1628
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1629
-	.8byte	.LVL1630
+	.8byte	.LVL1631
+	.8byte	.LVL1632
 	.2byte	0x3
 	.byte	0x8
 	.byte	0x20
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST377:
-	.8byte	.LVL1631
-	.8byte	.LVL1634
+.LLST376:
+	.8byte	.LVL1633
+	.8byte	.LVL1636
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1634
-	.8byte	.LVL1638
+	.8byte	.LVL1636
+	.8byte	.LVL1640
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1639
+	.8byte	.LVL1641
 	.8byte	.LFE264
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST378:
-	.8byte	.LVL1631
-	.8byte	.LVL1632
+.LLST377:
+	.8byte	.LVL1633
+	.8byte	.LVL1634
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1632
-	.8byte	.LVL1637
+	.8byte	.LVL1634
+	.8byte	.LVL1639
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1639
+	.8byte	.LVL1641
 	.8byte	.LFE264
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST379:
-	.8byte	.LVL1631
-	.8byte	.LVL1635
+.LLST378:
+	.8byte	.LVL1633
+	.8byte	.LVL1637
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1635
-	.8byte	.LVL1636
+	.8byte	.LVL1637
+	.8byte	.LVL1638
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1639
-	.8byte	.LVL1657
+	.8byte	.LVL1641
+	.8byte	.LVL1659
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1657
+	.8byte	.LVL1659
 	.8byte	.LFE264
 	.2byte	0x1
 	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST380:
-	.8byte	.LVL1642
-	.8byte	.LVL1657
+.LLST379:
+	.8byte	.LVL1644
+	.8byte	.LVL1659
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST381:
-	.8byte	.LVL1641
-	.8byte	.LVL1644
+.LLST380:
+	.8byte	.LVL1643
+	.8byte	.LVL1646
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL1644
-	.8byte	.LVL1647-1
+	.8byte	.LVL1646
+	.8byte	.LVL1649-1
 	.2byte	0x28
 	.byte	0x85
 	.sleb128 0
@@ -47173,33 +47211,33 @@ __func__.7632:
 	.byte	0x1e
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL1654
-	.8byte	.LVL1657
+	.8byte	.LVL1656
+	.8byte	.LVL1659
 	.2byte	0x1
 	.byte	0x6b
 	.8byte	0
 	.8byte	0
-.LLST382:
-	.8byte	.LVL1640
-	.8byte	.LVL1645
+.LLST381:
+	.8byte	.LVL1642
+	.8byte	.LVL1647
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1645
-	.8byte	.LVL1646
+	.8byte	.LVL1647
+	.8byte	.LVL1648
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 212
-	.8byte	.LVL1646
-	.8byte	.LVL1647-1
+	.8byte	.LVL1648
+	.8byte	.LVL1649-1
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 4
-	.8byte	.LVL1654
-	.8byte	.LVL1655
+	.8byte	.LVL1656
+	.8byte	.LVL1657
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1655
-	.8byte	.LVL1656-1
+	.8byte	.LVL1657
+	.8byte	.LVL1658-1
 	.2byte	0x16
 	.byte	0x8a
 	.sleb128 0
@@ -47214,30 +47252,30 @@ __func__.7632:
 	.byte	0x22
 	.8byte	0
 	.8byte	0
-.LLST383:
-	.8byte	.LVL1631
-	.8byte	.LVL1635
+.LLST382:
+	.8byte	.LVL1633
+	.8byte	.LVL1637
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1635
-	.8byte	.LVL1636
+	.8byte	.LVL1637
+	.8byte	.LVL1638
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1639
-	.8byte	.LVL1657
+	.8byte	.LVL1641
+	.8byte	.LVL1659
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1657
+	.8byte	.LVL1659
 	.8byte	.LFE264
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST384:
-	.8byte	.LVL1633
-	.8byte	.LVL1634
+.LLST383:
+	.8byte	.LVL1635
+	.8byte	.LVL1636
 	.2byte	0x13
 	.byte	0x70
 	.sleb128 0
@@ -47250,8 +47288,8 @@ __func__.7632:
 	.byte	0x1a
 	.byte	0x25
 	.byte	0x9f
-	.8byte	.LVL1634
-	.8byte	.LVL1635
+	.8byte	.LVL1636
+	.8byte	.LVL1637
 	.2byte	0x13
 	.byte	0x85
 	.sleb128 0
@@ -47264,15 +47302,15 @@ __func__.7632:
 	.byte	0x1a
 	.byte	0x25
 	.byte	0x9f
-	.8byte	.LVL1635
-	.8byte	.LVL1636
+	.8byte	.LVL1637
+	.8byte	.LVL1638
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL1639
-	.8byte	.LVL1657
+	.8byte	.LVL1641
+	.8byte	.LVL1659
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL1657
+	.8byte	.LVL1659
 	.8byte	.LFE264
 	.2byte	0x13
 	.byte	0x85
@@ -47288,102 +47326,102 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST367:
-	.8byte	.LVL1593
-	.8byte	.LVL1596
+.LLST366:
+	.8byte	.LVL1595
+	.8byte	.LVL1598
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1596
-	.8byte	.LVL1600
+	.8byte	.LVL1598
+	.8byte	.LVL1602
 	.2byte	0x1
 	.byte	0x6c
-	.8byte	.LVL1601
-	.8byte	.LVL1612
+	.8byte	.LVL1603
+	.8byte	.LVL1614
 	.2byte	0x1
 	.byte	0x6c
-	.8byte	.LVL1615
+	.8byte	.LVL1617
 	.8byte	.LFE263
 	.2byte	0x1
 	.byte	0x6c
 	.8byte	0
 	.8byte	0
-.LLST368:
-	.8byte	.LVL1593
-	.8byte	.LVL1594
+.LLST367:
+	.8byte	.LVL1595
+	.8byte	.LVL1596
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1594
-	.8byte	.LVL1599
+	.8byte	.LVL1596
+	.8byte	.LVL1601
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1601
-	.8byte	.LVL1611
+	.8byte	.LVL1603
+	.8byte	.LVL1613
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1615
+	.8byte	.LVL1617
 	.8byte	.LFE263
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST369:
-	.8byte	.LVL1593
-	.8byte	.LVL1597
+.LLST368:
+	.8byte	.LVL1595
+	.8byte	.LVL1599
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1597
-	.8byte	.LVL1598
+	.8byte	.LVL1599
+	.8byte	.LVL1600
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1601
-	.8byte	.LVL1620
+	.8byte	.LVL1603
+	.8byte	.LVL1622
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1620
+	.8byte	.LVL1622
 	.8byte	.LFE263
 	.2byte	0x1
 	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST370:
-	.8byte	.LVL1604
-	.8byte	.LVL1620
+.LLST369:
+	.8byte	.LVL1606
+	.8byte	.LVL1622
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST371:
-	.8byte	.LVL1603
-	.8byte	.LVL1609
+.LLST370:
+	.8byte	.LVL1605
+	.8byte	.LVL1611
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1617
-	.8byte	.LVL1620
+	.8byte	.LVL1619
+	.8byte	.LVL1622
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST372:
-	.8byte	.LVL1602
-	.8byte	.LVL1606
+.LLST371:
+	.8byte	.LVL1604
+	.8byte	.LVL1608
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1606
-	.8byte	.LVL1607
+	.8byte	.LVL1608
+	.8byte	.LVL1609
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 212
-	.8byte	.LVL1607
-	.8byte	.LVL1608-1
+	.8byte	.LVL1609
+	.8byte	.LVL1610-1
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 4
-	.8byte	.LVL1617
-	.8byte	.LVL1618
+	.8byte	.LVL1619
+	.8byte	.LVL1620
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1618
-	.8byte	.LVL1619-1
+	.8byte	.LVL1620
+	.8byte	.LVL1621-1
 	.2byte	0x16
 	.byte	0x85
 	.sleb128 0
@@ -47398,30 +47436,30 @@ __func__.7632:
 	.byte	0x22
 	.8byte	0
 	.8byte	0
-.LLST373:
-	.8byte	.LVL1593
-	.8byte	.LVL1597
+.LLST372:
+	.8byte	.LVL1595
+	.8byte	.LVL1599
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1597
-	.8byte	.LVL1598
+	.8byte	.LVL1599
+	.8byte	.LVL1600
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1601
-	.8byte	.LVL1620
+	.8byte	.LVL1603
+	.8byte	.LVL1622
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1620
+	.8byte	.LVL1622
 	.8byte	.LFE263
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST374:
-	.8byte	.LVL1595
-	.8byte	.LVL1596
+.LLST373:
+	.8byte	.LVL1597
+	.8byte	.LVL1598
 	.2byte	0x13
 	.byte	0x70
 	.sleb128 0
@@ -47434,8 +47472,8 @@ __func__.7632:
 	.byte	0x1a
 	.byte	0x25
 	.byte	0x9f
-	.8byte	.LVL1596
-	.8byte	.LVL1597
+	.8byte	.LVL1598
+	.8byte	.LVL1599
 	.2byte	0x13
 	.byte	0x8c
 	.sleb128 0
@@ -47448,29 +47486,29 @@ __func__.7632:
 	.byte	0x1a
 	.byte	0x25
 	.byte	0x9f
-	.8byte	.LVL1597
-	.8byte	.LVL1598
+	.8byte	.LVL1599
+	.8byte	.LVL1600
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1601
-	.8byte	.LVL1613
+	.8byte	.LVL1603
+	.8byte	.LVL1615
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1613
-	.8byte	.LVL1614-1
+	.8byte	.LVL1615
+	.8byte	.LVL1616-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1614-1
-	.8byte	.LVL1615
+	.8byte	.LVL1616-1
+	.8byte	.LVL1617
 	.2byte	0x3
 	.byte	0x85
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL1615
-	.8byte	.LVL1620
+	.8byte	.LVL1617
+	.8byte	.LVL1622
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1620
+	.8byte	.LVL1622
 	.8byte	.LFE263
 	.2byte	0x13
 	.byte	0x8c
@@ -47486,12 +47524,12 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST239:
-	.8byte	.LVL916
-	.8byte	.LVL920
+.LLST238:
+	.8byte	.LVL918
+	.8byte	.LVL922
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL920
+	.8byte	.LVL922
 	.8byte	.LFE262
 	.2byte	0x4
 	.byte	0xf3
@@ -47500,199 +47538,199 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST240:
-	.8byte	.LVL916
-	.8byte	.LVL917
+.LLST239:
+	.8byte	.LVL918
+	.8byte	.LVL919
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL917
-	.8byte	.LVL934
+	.8byte	.LVL919
+	.8byte	.LVL936
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL934
-	.8byte	.LVL935
+	.8byte	.LVL936
+	.8byte	.LVL937
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL935
+	.8byte	.LVL937
 	.8byte	.LFE262
 	.2byte	0x1
 	.byte	0x67
 	.8byte	0
 	.8byte	0
-.LLST241:
-	.8byte	.LVL916
-	.8byte	.LVL921
+.LLST240:
+	.8byte	.LVL918
+	.8byte	.LVL923
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL921
-	.8byte	.LVL934
+	.8byte	.LVL923
+	.8byte	.LVL936
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL934
-	.8byte	.LVL935
+	.8byte	.LVL936
+	.8byte	.LVL937
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x52
 	.byte	0x9f
-	.8byte	.LVL935
+	.8byte	.LVL937
 	.8byte	.LFE262
 	.2byte	0x1
 	.byte	0x68
 	.8byte	0
 	.8byte	0
-.LLST242:
-	.8byte	.LVL922
-	.8byte	.LVL923
+.LLST241:
+	.8byte	.LVL924
+	.8byte	.LVL925
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL924
 	.8byte	.LVL926
+	.8byte	.LVL928
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL926
-	.8byte	.LVL927-1
+	.8byte	.LVL928
+	.8byte	.LVL929-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL927-1
-	.8byte	.LVL929
+	.8byte	.LVL929-1
+	.8byte	.LVL931
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL929
 	.8byte	.LVL931
+	.8byte	.LVL933
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL935
+	.8byte	.LVL937
 	.8byte	.LFE262
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST243:
-	.8byte	.LVL918
-	.8byte	.LVL933
+.LLST242:
+	.8byte	.LVL920
+	.8byte	.LVL935
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL935
+	.8byte	.LVL937
 	.8byte	.LFE262
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST244:
-	.8byte	.LVL919
-	.8byte	.LVL932
+.LLST243:
+	.8byte	.LVL921
+	.8byte	.LVL934
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL935
+	.8byte	.LVL937
 	.8byte	.LFE262
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST330:
-	.8byte	.LVL1363
-	.8byte	.LVL1364
+.LLST329:
+	.8byte	.LVL1365
+	.8byte	.LVL1366
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1365
 	.8byte	.LVL1367
+	.8byte	.LVL1369
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1368
+	.8byte	.LVL1370
 	.8byte	.LFE261
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST83:
-	.8byte	.LVL228
-	.8byte	.LVL229
+.LLST73:
+	.8byte	.LVL203
+	.8byte	.LVL204
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL230
-	.8byte	.LVL231
+	.8byte	.LVL205
+	.8byte	.LVL206
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL231
-	.8byte	.LVL233
+	.8byte	.LVL206
+	.8byte	.LVL208
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL235
-	.8byte	.LVL236
+	.8byte	.LVL210
+	.8byte	.LVL211
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL238
-	.8byte	.LVL239
+	.8byte	.LVL213
+	.8byte	.LVL214
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL240
-	.8byte	.LVL243
+	.8byte	.LVL215
+	.8byte	.LVL218
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL244
-	.8byte	.LVL248
+	.8byte	.LVL219
+	.8byte	.LVL223
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL249
+	.8byte	.LVL224
 	.8byte	.LFE260
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST84:
-	.8byte	.LVL232
-	.8byte	.LVL234
+.LLST74:
+	.8byte	.LVL207
+	.8byte	.LVL209
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL235
-	.8byte	.LVL238
+	.8byte	.LVL210
+	.8byte	.LVL213
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL240
+	.8byte	.LVL215
 	.8byte	.LFE260
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST85:
-	.8byte	.LVL232
-	.8byte	.LVL235
+.LLST75:
+	.8byte	.LVL207
+	.8byte	.LVL210
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL235
-	.8byte	.LVL237-1
+	.8byte	.LVL210
+	.8byte	.LVL212-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL240
-	.8byte	.LVL241
+	.8byte	.LVL215
+	.8byte	.LVL216
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL242
-	.8byte	.LVL245
+	.8byte	.LVL217
+	.8byte	.LVL220
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL245
-	.8byte	.LVL246
+	.8byte	.LVL220
+	.8byte	.LVL221
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL247
+	.8byte	.LVL222
 	.8byte	.LFE260
 	.2byte	0x1
 	.byte	0x53
 	.8byte	0
 	.8byte	0
-.LLST237:
-	.8byte	.LVL911
-	.8byte	.LVL912
+.LLST236:
+	.8byte	.LVL913
+	.8byte	.LVL914
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL912
+	.8byte	.LVL914
 	.8byte	.LFE259
 	.2byte	0x4
 	.byte	0xf3
@@ -47701,9 +47739,9 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST238:
-	.8byte	.LVL913
-	.8byte	.LVL914
+.LLST237:
+	.8byte	.LVL915
+	.8byte	.LVL916
 	.2byte	0x9
 	.byte	0x71
 	.sleb128 0
@@ -47713,22 +47751,22 @@ __func__.7632:
 	.2byte	0xffff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL914
-	.8byte	.LVL915-1
+	.8byte	.LVL916
+	.8byte	.LVL917-1
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST224:
-	.8byte	.LVL871
-	.8byte	.LVL872
+.LLST223:
+	.8byte	.LVL873
+	.8byte	.LVL874
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL872
-	.8byte	.LVL886
+	.8byte	.LVL874
+	.8byte	.LVL888
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL886
+	.8byte	.LVL888
 	.8byte	.LFE258
 	.2byte	0x4
 	.byte	0xf3
@@ -47737,16 +47775,16 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST225:
-	.8byte	.LVL871
-	.8byte	.LVL872
+.LLST224:
+	.8byte	.LVL873
+	.8byte	.LVL874
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL872
-	.8byte	.LVL887
+	.8byte	.LVL874
+	.8byte	.LVL889
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL887
+	.8byte	.LVL889
 	.8byte	.LFE258
 	.2byte	0x4
 	.byte	0xf3
@@ -47755,16 +47793,16 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST226:
-	.8byte	.LVL871
-	.8byte	.LVL872
+.LLST225:
+	.8byte	.LVL873
+	.8byte	.LVL874
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL872
-	.8byte	.LVL885
+	.8byte	.LVL874
+	.8byte	.LVL887
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL885
+	.8byte	.LVL887
 	.8byte	.LFE258
 	.2byte	0x4
 	.byte	0xf3
@@ -47773,9 +47811,9 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST227:
-	.8byte	.LVL876
-	.8byte	.LVL877-1
+.LLST226:
+	.8byte	.LVL878
+	.8byte	.LVL879-1
 	.2byte	0x7
 	.byte	0x73
 	.sleb128 0
@@ -47783,8 +47821,8 @@ __func__.7632:
 	.2byte	0xffff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL877-1
-	.8byte	.LVL888
+	.8byte	.LVL879-1
+	.8byte	.LVL890
 	.2byte	0xa
 	.byte	0x8f
 	.sleb128 204
@@ -47794,7 +47832,7 @@ __func__.7632:
 	.2byte	0xffff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL888
+	.8byte	.LVL890
 	.8byte	.LFE258
 	.2byte	0xa
 	.byte	0x8f
@@ -47807,379 +47845,379 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST228:
-	.8byte	.LVL878
-	.8byte	.LVL879
+.LLST227:
+	.8byte	.LVL880
+	.8byte	.LVL881
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL879
-	.8byte	.LVL880-1
+	.8byte	.LVL881
+	.8byte	.LVL882-1
 	.2byte	0x9
 	.byte	0x3
 	.8byte	req_sys+16
 	.8byte	0
 	.8byte	0
-.LLST229:
-	.8byte	.LVL871
-	.8byte	.LVL872
+.LLST228:
+	.8byte	.LVL873
+	.8byte	.LVL874
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL872
-	.8byte	.LVL881
+	.8byte	.LVL874
+	.8byte	.LVL883
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL882
 	.8byte	.LVL884
+	.8byte	.LVL886
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST218:
-	.8byte	.LVL849
+.LLST217:
 	.8byte	.LVL851
+	.8byte	.LVL853
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL851
-	.8byte	.LVL855
+	.8byte	.LVL853
+	.8byte	.LVL857
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL855
-	.8byte	.LVL856
+	.8byte	.LVL857
+	.8byte	.LVL858
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL856
+	.8byte	.LVL858
 	.8byte	.LFE257
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST219:
-	.8byte	.LVL860
-	.8byte	.LVL861
+.LLST218:
+	.8byte	.LVL862
+	.8byte	.LVL863
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL861
 	.8byte	.LVL863
+	.8byte	.LVL865
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL866
-	.8byte	.LVL869
+	.8byte	.LVL868
+	.8byte	.LVL871
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL869
-	.8byte	.LVL870
+	.8byte	.LVL871
+	.8byte	.LVL872
 	.2byte	0x3
 	.byte	0x71
 	.sleb128 1
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST220:
-	.8byte	.LVL860
-	.8byte	.LVL861
+.LLST219:
+	.8byte	.LVL862
+	.8byte	.LVL863
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL861
-	.8byte	.LVL862
+	.8byte	.LVL863
+	.8byte	.LVL864
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL866
-	.8byte	.LVL867
+	.8byte	.LVL868
+	.8byte	.LVL869
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL868
+	.8byte	.LVL870
 	.8byte	.LFE257
 	.2byte	0x1
 	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST221:
-	.8byte	.LVL850
-	.8byte	.LVL854
+.LLST220:
+	.8byte	.LVL852
+	.8byte	.LVL856
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL856
-	.8byte	.LVL857
+	.8byte	.LVL858
+	.8byte	.LVL859
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL857
-	.8byte	.LVL860-1
+	.8byte	.LVL859
+	.8byte	.LVL862-1
 	.2byte	0x2
 	.byte	0x83
 	.sleb128 16
 	.8byte	0
 	.8byte	0
-.LLST222:
-	.8byte	.LVL850
-	.8byte	.LVL851
+.LLST221:
+	.8byte	.LVL852
+	.8byte	.LVL853
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 40
-	.8byte	.LVL851
-	.8byte	.LVL852-1
+	.8byte	.LVL853
+	.8byte	.LVL854-1
 	.2byte	0x2
 	.byte	0x83
 	.sleb128 40
-	.8byte	.LVL856
-	.8byte	.LVL860-1
+	.8byte	.LVL858
+	.8byte	.LVL862-1
 	.2byte	0x2
 	.byte	0x83
 	.sleb128 40
 	.8byte	0
 	.8byte	0
-.LLST223:
-	.8byte	.LVL858
-	.8byte	.LVL859
+.LLST222:
+	.8byte	.LVL860
+	.8byte	.LVL861
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL859
-	.8byte	.LVL860-1
+	.8byte	.LVL861
+	.8byte	.LVL862-1
 	.2byte	0x9
 	.byte	0x3
 	.8byte	p_sys_spare_buf
 	.8byte	0
 	.8byte	0
-.LLST230:
-	.8byte	.LVL889
-	.8byte	.LVL892-1
+.LLST229:
+	.8byte	.LVL891
+	.8byte	.LVL894-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL892-1
-	.8byte	.LVL900
+	.8byte	.LVL894-1
+	.8byte	.LVL902
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL900
 	.8byte	.LVL902
+	.8byte	.LVL904
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL902
+	.8byte	.LVL904
 	.8byte	.LFE256
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST231:
-	.8byte	.LVL894
-	.8byte	.LVL898
+.LLST230:
+	.8byte	.LVL896
+	.8byte	.LVL900
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL902
+	.8byte	.LVL904
 	.8byte	.LFE256
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST232:
-	.8byte	.LVL892
-	.8byte	.LVL893
+.LLST231:
+	.8byte	.LVL894
+	.8byte	.LVL895
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST233:
-	.8byte	.LVL896
+.LLST232:
 	.8byte	.LVL898
+	.8byte	.LVL900
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL902
-	.8byte	.LVL907
+	.8byte	.LVL904
+	.8byte	.LVL909
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL908
+	.8byte	.LVL910
 	.8byte	.LFE256
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST234:
-	.8byte	.LVL890
-	.8byte	.LVL896
+.LLST233:
+	.8byte	.LVL892
+	.8byte	.LVL898
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST235:
-	.8byte	.LVL891
-	.8byte	.LVL901
+.LLST234:
+	.8byte	.LVL893
+	.8byte	.LVL903
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL902
+	.8byte	.LVL904
 	.8byte	.LFE256
 	.2byte	0x1
 	.byte	0x68
 	.8byte	0
 	.8byte	0
-.LLST236:
-	.8byte	.LVL903
-	.8byte	.LVL906
+.LLST235:
+	.8byte	.LVL905
+	.8byte	.LVL908
 	.2byte	0x1
 	.byte	0x6c
-	.8byte	.LVL909
+	.8byte	.LVL911
 	.8byte	.LFE256
 	.2byte	0x1
 	.byte	0x6c
 	.8byte	0
 	.8byte	0
-.LLST209:
-	.8byte	.LVL826
+.LLST208:
 	.8byte	.LVL828
+	.8byte	.LVL830
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL828
-	.8byte	.LVL833
+	.8byte	.LVL830
+	.8byte	.LVL835
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL833
-	.8byte	.LVL837
+	.8byte	.LVL835
+	.8byte	.LVL839
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL837
+	.8byte	.LVL839
 	.8byte	.LFE254
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST210:
-	.8byte	.LVL827
-	.8byte	.LVL835
+.LLST209:
+	.8byte	.LVL829
+	.8byte	.LVL837
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL837
+	.8byte	.LVL839
 	.8byte	.LFE254
 	.2byte	0x1
 	.byte	0x67
 	.8byte	0
 	.8byte	0
-.LLST211:
-	.8byte	.LVL827
-	.8byte	.LVL832
+.LLST210:
+	.8byte	.LVL829
+	.8byte	.LVL834
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL837
-	.8byte	.LVL843
+	.8byte	.LVL839
+	.8byte	.LVL845
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST212:
-	.8byte	.LVL827
-	.8byte	.LVL834
+.LLST211:
+	.8byte	.LVL829
+	.8byte	.LVL836
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL837
+	.8byte	.LVL839
 	.8byte	.LFE254
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST213:
-	.8byte	.LVL838
-	.8byte	.LVL843
+.LLST212:
+	.8byte	.LVL840
+	.8byte	.LVL845
 	.2byte	0x1
 	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST214:
-	.8byte	.LVL829
-	.8byte	.LVL830
+.LLST213:
+	.8byte	.LVL831
+	.8byte	.LVL832
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL830
 	.8byte	.LVL832
+	.8byte	.LVL834
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL837
 	.8byte	.LVL839
+	.8byte	.LVL841
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL840
-	.8byte	.LVL843
+	.8byte	.LVL842
+	.8byte	.LVL845
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST215:
-	.8byte	.LVL831
-	.8byte	.LVL832
+.LLST214:
+	.8byte	.LVL833
+	.8byte	.LVL834
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL832
-	.8byte	.LVL833
+	.8byte	.LVL834
+	.8byte	.LVL835
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL838
-	.8byte	.LVL841
+	.8byte	.LVL840
+	.8byte	.LVL843
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL842
-	.8byte	.LVL843
+	.8byte	.LVL844
+	.8byte	.LVL845
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL843
-	.8byte	.LVL847
+	.8byte	.LVL845
+	.8byte	.LVL849
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL848
+	.8byte	.LVL850
 	.8byte	.LFE254
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST216:
-	.8byte	.LVL831
-	.8byte	.LVL836
+.LLST215:
+	.8byte	.LVL833
+	.8byte	.LVL838
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL843
+	.8byte	.LVL845
 	.8byte	.LFE254
 	.2byte	0x1
 	.byte	0x6a
 	.8byte	0
 	.8byte	0
-.LLST217:
-	.8byte	.LVL831
-	.8byte	.LVL832
+.LLST216:
+	.8byte	.LVL833
+	.8byte	.LVL834
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL832
-	.8byte	.LVL836
+	.8byte	.LVL834
+	.8byte	.LVL838
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL843
-	.8byte	.LVL844
+	.8byte	.LVL845
+	.8byte	.LVL846
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL845
+	.8byte	.LVL847
 	.8byte	.LFE254
 	.2byte	0x1
 	.byte	0x69
 	.8byte	0
 	.8byte	0
-.LLST206:
-	.8byte	.LVL810
-	.8byte	.LVL811
+.LLST205:
+	.8byte	.LVL812
+	.8byte	.LVL813
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL811
-	.8byte	.LVL817
+	.8byte	.LVL813
+	.8byte	.LVL819
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL817
+	.8byte	.LVL819
 	.8byte	.LFE253
 	.2byte	0x4
 	.byte	0xf3
@@ -48188,16 +48226,16 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST207:
-	.8byte	.LVL810
+.LLST206:
 	.8byte	.LVL812
+	.8byte	.LVL814
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL812
-	.8byte	.LVL815
+	.8byte	.LVL814
+	.8byte	.LVL817
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL815
+	.8byte	.LVL817
 	.8byte	.LFE253
 	.2byte	0x4
 	.byte	0xf3
@@ -48206,41 +48244,41 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST208:
-	.8byte	.LVL814
-	.8byte	.LVL818
+.LLST207:
+	.8byte	.LVL816
+	.8byte	.LVL820
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL819
+	.8byte	.LVL821
 	.8byte	.LFE253
 	.2byte	0x1
 	.byte	0x68
 	.8byte	0
 	.8byte	0
-.LLST67:
-	.8byte	.LVL188
-	.8byte	.LVL189
+.LLST61:
+	.8byte	.LVL169
+	.8byte	.LVL170
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL189
-	.8byte	.LVL192
+	.8byte	.LVL170
+	.8byte	.LVL173
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL194
+	.8byte	.LVL175
 	.8byte	.LFE251
 	.2byte	0x1
 	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST68:
-	.8byte	.LVL188
-	.8byte	.LVL196
+.LLST62:
+	.8byte	.LVL169
+	.8byte	.LVL177
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL196
-	.8byte	.LVL197
+	.8byte	.LVL177
+	.8byte	.LVL178
 	.2byte	0x8
 	.byte	0x71
 	.sleb128 0
@@ -48252,27 +48290,27 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST69:
-	.8byte	.LVL190
-	.8byte	.LVL191
+.LLST63:
+	.8byte	.LVL171
+	.8byte	.LVL172
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL193
-	.8byte	.LVL195
+	.8byte	.LVL174
+	.8byte	.LVL176
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL196
-	.8byte	.LVL197
+	.8byte	.LVL177
+	.8byte	.LVL178
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST66:
-	.8byte	.LVL186
-	.8byte	.LVL187-1
+.LLST60:
+	.8byte	.LVL167
+	.8byte	.LVL168-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL187-1
+	.8byte	.LVL168-1
 	.8byte	.LFE250
 	.2byte	0x4
 	.byte	0xf3
@@ -48281,23 +48319,23 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST62:
-	.8byte	.LVL173
-	.8byte	.LVL178-1
+.LLST56:
+	.8byte	.LVL154
+	.8byte	.LVL159-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL178-1
-	.8byte	.LVL180
+	.8byte	.LVL159-1
+	.8byte	.LVL161
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL180
-	.8byte	.LVL185
+	.8byte	.LVL161
+	.8byte	.LVL166
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL185
+	.8byte	.LVL166
 	.8byte	.LFE249
 	.2byte	0x4
 	.byte	0xf3
@@ -48306,41 +48344,41 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST63:
-	.8byte	.LVL173
-	.8byte	.LVL174
+.LLST57:
+	.8byte	.LVL154
+	.8byte	.LVL155
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL174
-	.8byte	.LVL177
+	.8byte	.LVL155
+	.8byte	.LVL158
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL180
-	.8byte	.LVL181
+	.8byte	.LVL161
+	.8byte	.LVL162
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL183
+	.8byte	.LVL164
 	.8byte	.LFE249
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST64:
-	.8byte	.LVL173
-	.8byte	.LVL176
+.LLST58:
+	.8byte	.LVL154
+	.8byte	.LVL157
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL176
-	.8byte	.LVL179
+	.8byte	.LVL157
+	.8byte	.LVL160
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL179
-	.8byte	.LVL180
+	.8byte	.LVL160
+	.8byte	.LVL161
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL180
+	.8byte	.LVL161
 	.8byte	.LFE249
 	.2byte	0x3
 	.byte	0x9
@@ -48348,45 +48386,45 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST65:
-	.8byte	.LVL174
-	.8byte	.LVL175
+.LLST59:
+	.8byte	.LVL155
+	.8byte	.LVL156
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL180
-	.8byte	.LVL184
+	.8byte	.LVL161
+	.8byte	.LVL165
 	.2byte	0x1
 	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST58:
-	.8byte	.LVL160
-	.8byte	.LVL161
+.LLST52:
+	.8byte	.LVL140
+	.8byte	.LVL141
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL161
-	.8byte	.LVL166
+	.8byte	.LVL141
+	.8byte	.LVL146
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL166
-	.8byte	.LVL168
+	.8byte	.LVL146
+	.8byte	.LVL148
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL168
+	.8byte	.LVL148
 	.8byte	.LFE248
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST59:
-	.8byte	.LVL160
-	.8byte	.LVL163
+.LLST53:
+	.8byte	.LVL140
+	.8byte	.LVL143
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL163
+	.8byte	.LVL143
 	.8byte	.LFE248
 	.2byte	0x4
 	.byte	0xf3
@@ -48395,13 +48433,13 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST60:
-	.8byte	.LVL162
-	.8byte	.LVL165
+.LLST54:
+	.8byte	.LVL142
+	.8byte	.LVL145
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL165
-	.8byte	.LVL166
+	.8byte	.LVL145
+	.8byte	.LVL146
 	.2byte	0x6
 	.byte	0x87
 	.sleb128 0
@@ -48409,8 +48447,8 @@ __func__.7632:
 	.sleb128 0
 	.byte	0x22
 	.byte	0x9f
-	.8byte	.LVL166
-	.8byte	.LVL167
+	.8byte	.LVL146
+	.8byte	.LVL147
 	.2byte	0xd
 	.byte	0xf3
 	.uleb128 0x1
@@ -48424,15 +48462,30 @@ __func__.7632:
 	.sleb128 0
 	.byte	0x22
 	.byte	0x9f
-	.8byte	.LVL168
+	.8byte	.LVL148
 	.8byte	.LFE248
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST61:
-	.8byte	.LVL169
-	.8byte	.LVL170
+.LLST55:
+	.8byte	.LVL149
+	.8byte	.LVL150
+	.2byte	0x14
+	.byte	0x71
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x3
+	.8byte	p_data_block_list_table
+	.byte	0x6
+	.byte	0x22
+	.byte	0x9f
+	.8byte	.LVL150
+	.8byte	.LVL151
 	.2byte	0x16
 	.byte	0x83
 	.sleb128 2
@@ -48448,8 +48501,8 @@ __func__.7632:
 	.byte	0x6
 	.byte	0x22
 	.byte	0x9f
-	.8byte	.LVL171
-	.8byte	.LVL172
+	.8byte	.LVL152
+	.8byte	.LVL153
 	.2byte	0xc
 	.byte	0x70
 	.sleb128 0
@@ -48458,11 +48511,11 @@ __func__.7632:
 	.byte	0x1a
 	.byte	0x36
 	.byte	0x1e
-	.byte	0x73
+	.byte	0x72
 	.sleb128 0
 	.byte	0x22
 	.byte	0x9f
-	.8byte	.LVL172
+	.8byte	.LVL153
 	.8byte	.LFE248
 	.2byte	0xe
 	.byte	0x83
@@ -48474,18 +48527,18 @@ __func__.7632:
 	.byte	0x1a
 	.byte	0x36
 	.byte	0x1e
-	.byte	0x73
+	.byte	0x72
 	.sleb128 0
 	.byte	0x22
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST51:
-	.8byte	.LVL140
-	.8byte	.LVL143
+.LLST45:
+	.8byte	.LVL120
+	.8byte	.LVL123
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL143
+	.8byte	.LVL123
 	.8byte	.LFE247
 	.2byte	0x4
 	.byte	0xf3
@@ -48494,16 +48547,16 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST52:
-	.8byte	.LVL141
-	.8byte	.LVL142
+.LLST46:
+	.8byte	.LVL121
+	.8byte	.LVL122
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL144
-	.8byte	.LVL154
+	.8byte	.LVL124
+	.8byte	.LVL134
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL154
+	.8byte	.LVL134
 	.8byte	.LFE247
 	.2byte	0x6
 	.byte	0x73
@@ -48514,20 +48567,20 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST53:
-	.8byte	.LVL145
-	.8byte	.LVL146
+.LLST47:
+	.8byte	.LVL125
+	.8byte	.LVL126
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL146
+	.8byte	.LVL126
 	.8byte	.LFE247
 	.2byte	0x1
 	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST54:
-	.8byte	.LVL146
-	.8byte	.LVL147
+.LLST48:
+	.8byte	.LVL126
+	.8byte	.LVL127
 	.2byte	0xb
 	.byte	0x71
 	.sleb128 0
@@ -48539,8 +48592,8 @@ __func__.7632:
 	.byte	0x7b
 	.sleb128 0
 	.byte	0x22
-	.8byte	.LVL148
-	.8byte	.LVL150
+	.8byte	.LVL128
+	.8byte	.LVL130
 	.2byte	0xb
 	.byte	0x71
 	.sleb128 0
@@ -48552,8 +48605,8 @@ __func__.7632:
 	.byte	0x7b
 	.sleb128 0
 	.byte	0x22
-	.8byte	.LVL151
-	.8byte	.LVL152
+	.8byte	.LVL131
+	.8byte	.LVL132
 	.2byte	0xb
 	.byte	0x71
 	.sleb128 0
@@ -48567,21 +48620,21 @@ __func__.7632:
 	.byte	0x22
 	.8byte	0
 	.8byte	0
-.LLST55:
-	.8byte	.LVL146
-	.8byte	.LVL148
+.LLST49:
+	.8byte	.LVL126
+	.8byte	.LVL128
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL148
-	.8byte	.LVL151
+	.8byte	.LVL128
+	.8byte	.LVL131
 	.2byte	0x1
 	.byte	0x5a
-	.8byte	.LVL151
-	.8byte	.LVL153
+	.8byte	.LVL131
+	.8byte	.LVL133
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL153
-	.8byte	.LVL155
+	.8byte	.LVL133
+	.8byte	.LVL135
 	.2byte	0x5
 	.byte	0x73
 	.sleb128 0
@@ -48590,12 +48643,12 @@ __func__.7632:
 	.byte	0x22
 	.8byte	0
 	.8byte	0
-.LLST41:
-	.8byte	.LVL108
-	.8byte	.LVL111
+.LLST34:
+	.8byte	.LVL88
+	.8byte	.LVL91
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL111
+	.8byte	.LVL91
 	.8byte	.LFE246
 	.2byte	0x4
 	.byte	0xf3
@@ -48604,65 +48657,43 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST42:
-	.8byte	.LVL109
-	.8byte	.LVL110
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL112
-	.8byte	.LVL129
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL129
-	.8byte	.LVL130
-	.2byte	0x6
-	.byte	0x74
-	.sleb128 0
-	.byte	0x7d
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.8byte	.LVL130
-	.8byte	.LVL134
+.LLST35:
+	.8byte	.LVL89
+	.8byte	.LVL90
 	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL134
+	.byte	0x55
+	.8byte	.LVL92
 	.8byte	.LFE246
-	.2byte	0x6
-	.byte	0x74
-	.sleb128 0
-	.byte	0x7d
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
+	.2byte	0x1
+	.byte	0x55
 	.8byte	0
 	.8byte	0
-.LLST43:
-	.8byte	.LVL116
-	.8byte	.LVL118
+.LLST36:
+	.8byte	.LVL96
+	.8byte	.LVL98
 	.2byte	0x1
 	.byte	0x5c
-	.8byte	.LVL118
+	.8byte	.LVL98
 	.8byte	.LFE246
 	.2byte	0x1
-	.byte	0x52
+	.byte	0x54
 	.8byte	0
 	.8byte	0
-.LLST44:
-	.8byte	.LVL113
-	.8byte	.LVL114
+.LLST37:
+	.8byte	.LVL93
+	.8byte	.LVL94
 	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL114
-	.8byte	.LVL118
+	.byte	0x57
+	.8byte	.LVL94
+	.8byte	.LVL98
 	.2byte	0x5
-	.byte	0x7e
+	.byte	0x80
 	.sleb128 0
 	.byte	0x72
 	.sleb128 0
 	.byte	0x22
-	.8byte	.LVL118
-	.8byte	.LVL124
+	.8byte	.LVL98
+	.8byte	.LVL105
 	.2byte	0xd
 	.byte	0x70
 	.sleb128 0
@@ -48671,11 +48702,11 @@ __func__.7632:
 	.byte	0xc
 	.4byte	0x1fffe
 	.byte	0x1a
-	.byte	0x7e
+	.byte	0x80
 	.sleb128 0
 	.byte	0x22
-	.8byte	.LVL126
-	.8byte	.LVL128
+	.8byte	.LVL107
+	.8byte	.LVL109
 	.2byte	0xd
 	.byte	0x70
 	.sleb128 0
@@ -48684,11 +48715,11 @@ __func__.7632:
 	.byte	0xc
 	.4byte	0x1fffe
 	.byte	0x1a
-	.byte	0x7e
+	.byte	0x80
 	.sleb128 0
 	.byte	0x22
-	.8byte	.LVL130
-	.8byte	.LVL133
+	.8byte	.LVL111
+	.8byte	.LVL113
 	.2byte	0xd
 	.byte	0x70
 	.sleb128 0
@@ -48697,78 +48728,47 @@ __func__.7632:
 	.byte	0xc
 	.4byte	0x1fffe
 	.byte	0x1a
-	.byte	0x7e
+	.byte	0x80
 	.sleb128 0
 	.byte	0x22
 	.8byte	0
 	.8byte	0
-.LLST45:
-	.8byte	.LVL119
-	.8byte	.LVL120
+.LLST38:
+	.8byte	.LVL101
+	.8byte	.LVL102
 	.2byte	0x1
-	.byte	0x56
-	.8byte	.LVL120
-	.8byte	.LVL122
+	.byte	0x53
+	.8byte	.LVL102
+	.8byte	.LVL105
 	.2byte	0x5
-	.byte	0x7e
-	.sleb128 0
-	.byte	0x81
-	.sleb128 0
-	.byte	0x22
-	.8byte	.LVL122
-	.8byte	.LVL124
-	.2byte	0xd
-	.byte	0x71
+	.byte	0x80
 	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0xc
-	.4byte	0x1fffe
-	.byte	0x1a
-	.byte	0x7e
+	.byte	0x8e
 	.sleb128 0
 	.byte	0x22
-	.8byte	.LVL126
-	.8byte	.LVL127
+	.8byte	.LVL107
+	.8byte	.LVL109
 	.2byte	0x5
-	.byte	0x7e
-	.sleb128 0
-	.byte	0x81
-	.sleb128 0
-	.byte	0x22
-	.8byte	.LVL127
-	.8byte	.LVL128
-	.2byte	0xd
-	.byte	0x71
+	.byte	0x80
 	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0xc
-	.4byte	0x1fffe
-	.byte	0x1a
-	.byte	0x7e
+	.byte	0x8e
 	.sleb128 0
 	.byte	0x22
-	.8byte	.LVL130
-	.8byte	.LVL132
-	.2byte	0xd
-	.byte	0x71
+	.8byte	.LVL111
+	.8byte	.LVL113
+	.2byte	0x5
+	.byte	0x80
 	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0xc
-	.4byte	0x1fffe
-	.byte	0x1a
-	.byte	0x7e
+	.byte	0x8e
 	.sleb128 0
 	.byte	0x22
 	.8byte	0
 	.8byte	0
-.LLST46:
-	.8byte	.LVL113
-	.8byte	.LVL114
+.LLST39:
+	.8byte	.LVL93
+	.8byte	.LVL94
 	.2byte	0xe
-	.byte	0x75
+	.byte	0x77
 	.sleb128 0
 	.byte	0xa
 	.2byte	0xffff
@@ -48780,10 +48780,10 @@ __func__.7632:
 	.byte	0x1a
 	.byte	0x1e
 	.byte	0x9f
-	.8byte	.LVL114
-	.8byte	.LVL115
+	.8byte	.LVL94
+	.8byte	.LVL95
 	.2byte	0x13
-	.byte	0x7e
+	.byte	0x80
 	.sleb128 0
 	.byte	0x72
 	.sleb128 0
@@ -48800,10 +48800,10 @@ __func__.7632:
 	.byte	0x1a
 	.byte	0x1e
 	.byte	0x9f
-	.8byte	.LVL115
-	.8byte	.LVL116
+	.8byte	.LVL95
+	.8byte	.LVL96
 	.2byte	0x15
-	.byte	0x7e
+	.byte	0x80
 	.sleb128 0
 	.byte	0x72
 	.sleb128 0
@@ -48813,7 +48813,7 @@ __func__.7632:
 	.byte	0xa
 	.2byte	0xffff
 	.byte	0x1a
-	.byte	0x73
+	.byte	0x75
 	.sleb128 4
 	.byte	0x94
 	.byte	0x2
@@ -48822,34 +48822,34 @@ __func__.7632:
 	.byte	0x1a
 	.byte	0x1e
 	.byte	0x9f
-	.8byte	.LVL116
+	.8byte	.LVL96
 	.8byte	.LFE246
 	.2byte	0x1
-	.byte	0x55
+	.byte	0x57
 	.8byte	0
 	.8byte	0
-.LLST47:
-	.8byte	.LVL119
-	.8byte	.LVL120
+.LLST40:
+	.8byte	.LVL101
+	.8byte	.LVL102
 	.2byte	0xe
-	.byte	0x76
+	.byte	0x73
 	.sleb128 0
 	.byte	0xa
 	.2byte	0xffff
 	.byte	0x1a
-	.byte	0x8e
+	.byte	0x83
 	.sleb128 0
 	.byte	0xa
 	.2byte	0xffff
 	.byte	0x1a
 	.byte	0x1e
 	.byte	0x9f
-	.8byte	.LVL120
-	.8byte	.LVL121
+	.8byte	.LVL102
+	.8byte	.LVL103
 	.2byte	0x13
-	.byte	0x7e
+	.byte	0x80
 	.sleb128 0
-	.byte	0x81
+	.byte	0x8e
 	.sleb128 0
 	.byte	0x22
 	.byte	0x94
@@ -48857,28 +48857,23 @@ __func__.7632:
 	.byte	0xa
 	.2byte	0xffff
 	.byte	0x1a
-	.byte	0x8e
+	.byte	0x83
 	.sleb128 0
 	.byte	0xa
 	.2byte	0xffff
 	.byte	0x1a
 	.byte	0x1e
 	.byte	0x9f
-	.8byte	.LVL121
-	.8byte	.LVL123
+	.8byte	.LVL103
+	.8byte	.LVL104
 	.2byte	0x1
-	.byte	0x56
-	.8byte	.LVL123
-	.8byte	.LVL124
-	.2byte	0x25
-	.byte	0x71
+	.byte	0x53
+	.8byte	.LVL104
+	.8byte	.LVL105
+	.2byte	0x29
+	.byte	0x80
 	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0xc
-	.4byte	0x1fffe
-	.byte	0x1a
-	.byte	0x7e
+	.byte	0x8e
 	.sleb128 0
 	.byte	0x22
 	.byte	0x94
@@ -48886,13 +48881,23 @@ __func__.7632:
 	.byte	0xa
 	.2byte	0xffff
 	.byte	0x1a
-	.byte	0x8e
-	.sleb128 0
+	.byte	0x74
+	.sleb128 4
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
 	.byte	0x1e
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x8e
+	.byte	0x7b
 	.sleb128 0
+	.byte	0x74
+	.sleb128 4
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
 	.byte	0x8
 	.byte	0x20
 	.byte	0x24
@@ -48903,21 +48908,16 @@ __func__.7632:
 	.byte	0x16
 	.byte	0x13
 	.byte	0x9f
-	.8byte	.LVL126
-	.8byte	.LVL127
+	.8byte	.LVL107
+	.8byte	.LVL108
 	.2byte	0x1
-	.byte	0x56
-	.8byte	.LVL127
-	.8byte	.LVL128
-	.2byte	0x25
-	.byte	0x71
+	.byte	0x53
+	.8byte	.LVL108
+	.8byte	.LVL109
+	.2byte	0x29
+	.byte	0x80
 	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0xc
-	.4byte	0x1fffe
-	.byte	0x1a
-	.byte	0x7e
+	.byte	0x8e
 	.sleb128 0
 	.byte	0x22
 	.byte	0x94
@@ -48925,13 +48925,23 @@ __func__.7632:
 	.byte	0xa
 	.2byte	0xffff
 	.byte	0x1a
-	.byte	0x8e
-	.sleb128 0
+	.byte	0x74
+	.sleb128 4
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
 	.byte	0x1e
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x8e
+	.byte	0x7b
 	.sleb128 0
+	.byte	0x74
+	.sleb128 4
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
 	.byte	0x8
 	.byte	0x20
 	.byte	0x24
@@ -48942,17 +48952,12 @@ __func__.7632:
 	.byte	0x16
 	.byte	0x13
 	.byte	0x9f
-	.8byte	.LVL130
-	.8byte	.LVL132
-	.2byte	0x25
-	.byte	0x71
+	.8byte	.LVL111
+	.8byte	.LVL112
+	.2byte	0x29
+	.byte	0x80
 	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0xc
-	.4byte	0x1fffe
-	.byte	0x1a
-	.byte	0x7e
+	.byte	0x8e
 	.sleb128 0
 	.byte	0x22
 	.byte	0x94
@@ -48960,13 +48965,23 @@ __func__.7632:
 	.byte	0xa
 	.2byte	0xffff
 	.byte	0x1a
-	.byte	0x8e
-	.sleb128 0
+	.byte	0x74
+	.sleb128 4
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
 	.byte	0x1e
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x8e
+	.byte	0x7b
 	.sleb128 0
+	.byte	0x74
+	.sleb128 4
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
 	.byte	0x8
 	.byte	0x20
 	.byte	0x24
@@ -48979,75 +48994,99 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST48:
-	.8byte	.LVL117
-	.8byte	.LVL125
+.LLST41:
+	.8byte	.LVL97
+	.8byte	.LVL106
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL125
-	.8byte	.LVL126
+	.8byte	.LVL106
+	.8byte	.LVL107
 	.2byte	0x5
-	.byte	0x74
+	.byte	0x76
 	.sleb128 0
 	.byte	0x7d
 	.sleb128 0
 	.byte	0x22
-	.8byte	.LVL126
-	.8byte	.LVL129
+	.8byte	.LVL107
+	.8byte	.LVL110
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL130
-	.8byte	.LVL133
+	.8byte	.LVL111
+	.8byte	.LVL113
 	.2byte	0x1
-	.byte	0x56
-	.8byte	.LVL133
-	.8byte	.LVL135
+	.byte	0x53
+	.8byte	.LVL113
+	.8byte	.LVL115
 	.2byte	0x5
-	.byte	0x74
+	.byte	0x76
 	.sleb128 0
 	.byte	0x7d
 	.sleb128 0
 	.byte	0x22
 	.8byte	0
 	.8byte	0
-.LLST39:
-	.8byte	.LVL103
-	.8byte	.LVL105
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
+.LLST42:
+	.8byte	.LVL88
+	.8byte	.LVL98
+	.2byte	0x2
+	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL105
-	.8byte	.LVL106
+	.8byte	.LVL98
+	.8byte	.LVL99
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL106
-	.8byte	.LVL107
+	.byte	0x52
+	.8byte	.LVL100
+	.8byte	.LVL110
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL111
+	.8byte	.LVL114
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST191:
+	.8byte	.LVL716
+	.8byte	.LVL717
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL107
-	.8byte	.LFE243
+	.8byte	.LVL718
+	.8byte	.LVL723
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL723
+	.8byte	.LVL725
 	.2byte	0x1
 	.byte	0x50
+	.8byte	.LVL727
+	.8byte	.LFE243
+	.2byte	0x1
+	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST40:
-	.8byte	.LVL104
-	.8byte	.LVL106
-	.2byte	0xa
-	.byte	0x3
-	.8byte	gSysFreeQueue
-	.byte	0x9f
+.LLST192:
+	.8byte	.LVL720
+	.8byte	.LVL721
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL721
+	.8byte	.LVL724
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL727
+	.8byte	.LFE243
+	.2byte	0x1
+	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST36:
-	.8byte	.LVL96
-	.8byte	.LVL99
+.LLST31:
+	.8byte	.LVL81
+	.8byte	.LVL84
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL99
+	.8byte	.LVL84
 	.8byte	.LFE242
 	.2byte	0x4
 	.byte	0xf3
@@ -49056,182 +49095,56 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST37:
-	.8byte	.LVL96
-	.8byte	.LVL102
+.LLST32:
+	.8byte	.LVL81
+	.8byte	.LVL87
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL102
+	.8byte	.LVL87
 	.8byte	.LFE242
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST38:
-	.8byte	.LVL97
-	.8byte	.LVL98
+.LLST33:
+	.8byte	.LVL82
+	.8byte	.LVL83
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL100
+	.8byte	.LVL85
 	.8byte	.LFE242
 	.2byte	0x1
 	.byte	0x53
 	.8byte	0
 	.8byte	0
 .LLST30:
-	.8byte	.LVL75
-	.8byte	.LVL76
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
 	.8byte	.LVL76
 	.8byte	.LVL77
 	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL77
-	.8byte	.LVL78
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL78
-	.8byte	.LVL81
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL81
-	.8byte	.LVL82
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 1
-	.byte	0x9f
-	.8byte	.LVL83
-	.8byte	.LVL87
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL92
-	.8byte	.LFE241
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST31:
-	.8byte	.LVL83
-	.8byte	.LVL85
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL85
-	.8byte	.LVL88
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL92
-	.8byte	.LFE241
-	.2byte	0x1
-	.byte	0x51
-	.8byte	0
-	.8byte	0
-.LLST32:
-	.8byte	.LVL84
-	.8byte	.LVL85
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL85
-	.8byte	.LVL86
-	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL92
-	.8byte	.LVL94
+	.8byte	.LVL78
+	.8byte	.LVL79
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL95
+	.8byte	.LVL80
 	.8byte	.LFE241
 	.2byte	0x1
 	.byte	0x54
 	.8byte	0
 	.8byte	0
-.LLST33:
-	.8byte	.LVL90
-	.8byte	.LVL91
-	.2byte	0x1
-	.byte	0x54
-	.8byte	0
-	.8byte	0
-.LLST34:
-	.8byte	.LVL79
-	.8byte	.LVL80
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST35:
-	.8byte	.LVL89
-	.8byte	.LVL91
-	.2byte	0x1
-	.byte	0x5b
-	.8byte	0
-	.8byte	0
-.LLST184:
-	.8byte	.LVL678
-	.8byte	.LVL679
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL679
-	.8byte	.LVL687
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL687
-	.8byte	.LFE240
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST185:
-	.8byte	.LVL678
-	.8byte	.LVL681-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL681-1
-	.8byte	.LFE240
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST186:
-	.8byte	.LVL680
-	.8byte	.LVL686
-	.2byte	0xa
-	.byte	0x3
-	.8byte	gSysFreeQueue
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST187:
-	.8byte	.LVL682
-	.8byte	.LVL683
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL683
-	.8byte	.LVL685
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST205:
-	.8byte	.LVL807
-	.8byte	.LVL808
+.LLST204:
+	.8byte	.LVL809
+	.8byte	.LVL810
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL808
-	.8byte	.LVL809-1
+	.8byte	.LVL810
+	.8byte	.LVL811-1
 	.2byte	0x9
 	.byte	0x3
 	.8byte	gSysFreeQueue
-	.8byte	.LVL809-1
+	.8byte	.LVL811-1
 	.8byte	.LFE237
 	.2byte	0x4
 	.byte	0xf3
@@ -49240,23 +49153,23 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST163:
-	.8byte	.LVL620
-	.8byte	.LVL624
+.LLST154:
+	.8byte	.LVL597
+	.8byte	.LVL601
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL624
-	.8byte	.LVL631
+	.8byte	.LVL601
+	.8byte	.LVL608
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL631
-	.8byte	.LVL633
+	.8byte	.LVL608
+	.8byte	.LVL610
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL633
+	.8byte	.LVL610
 	.8byte	.LFE236
 	.2byte	0x4
 	.byte	0xf3
@@ -49265,69 +49178,69 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST164:
-	.8byte	.LVL620
-	.8byte	.LVL621
+.LLST155:
+	.8byte	.LVL597
+	.8byte	.LVL598
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL621
-	.8byte	.LVL630
+	.8byte	.LVL598
+	.8byte	.LVL607
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL630
-	.8byte	.LVL631
+	.8byte	.LVL607
+	.8byte	.LVL608
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL631
-	.8byte	.LVL632
+	.8byte	.LVL608
+	.8byte	.LVL609
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL632
+	.8byte	.LVL609
 	.8byte	.LFE236
 	.2byte	0x1
 	.byte	0x67
 	.8byte	0
 	.8byte	0
-.LLST165:
-	.8byte	.LVL625
-	.8byte	.LVL627
+.LLST156:
+	.8byte	.LVL602
+	.8byte	.LVL604
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL627
-	.8byte	.LVL628
+	.8byte	.LVL604
+	.8byte	.LVL605
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL633
+	.8byte	.LVL610
 	.8byte	.LFE236
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST166:
-	.8byte	.LVL625
-	.8byte	.LVL629
+.LLST157:
+	.8byte	.LVL602
+	.8byte	.LVL606
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL633
-	.8byte	.LVL636
+	.8byte	.LVL610
+	.8byte	.LVL613
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL637
+	.8byte	.LVL614
 	.8byte	.LFE236
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST167:
-	.8byte	.LVL634
-	.8byte	.LVL638
+.LLST158:
+	.8byte	.LVL611
+	.8byte	.LVL615
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL638
+	.8byte	.LVL615
 	.8byte	.LFE236
 	.2byte	0x3
 	.byte	0x84
@@ -49335,9 +49248,9 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST168:
-	.8byte	.LVL622
-	.8byte	.LVL623
+.LLST159:
+	.8byte	.LVL599
+	.8byte	.LVL600
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
@@ -49613,179 +49526,179 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST363:
-	.8byte	.LVL1548
-	.8byte	.LVL1549
+.LLST362:
+	.8byte	.LVL1550
+	.8byte	.LVL1551
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1549
 	.8byte	.LVL1551
+	.8byte	.LVL1553
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1559
-	.8byte	.LVL1564
+	.8byte	.LVL1561
+	.8byte	.LVL1566
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1564
-	.8byte	.LVL1565
+	.8byte	.LVL1566
+	.8byte	.LVL1567
 	.2byte	0x3
 	.byte	0x86
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL1565
-	.8byte	.LVL1585
+	.8byte	.LVL1567
+	.8byte	.LVL1587
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST364:
-	.8byte	.LVL1550
+.LLST363:
 	.8byte	.LVL1552
+	.8byte	.LVL1554
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1553
-	.8byte	.LVL1557
+	.8byte	.LVL1555
+	.8byte	.LVL1559
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1558
-	.8byte	.LVL1559
+	.8byte	.LVL1560
+	.8byte	.LVL1561
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1569
-	.8byte	.LVL1579
+	.8byte	.LVL1571
+	.8byte	.LVL1581
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1580
 	.8byte	.LVL1582
+	.8byte	.LVL1584
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1582
-	.8byte	.LVL1583-1
+	.8byte	.LVL1584
+	.8byte	.LVL1585-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1584
 	.8byte	.LVL1586
+	.8byte	.LVL1588
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1591
-	.8byte	.LVL1592-1
+	.8byte	.LVL1593
+	.8byte	.LVL1594-1
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST365:
-	.8byte	.LVL1561
-	.8byte	.LVL1566
+.LLST364:
+	.8byte	.LVL1563
+	.8byte	.LVL1568
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL1573
-	.8byte	.LVL1578
+	.8byte	.LVL1575
+	.8byte	.LVL1580
 	.2byte	0x1
 	.byte	0x6b
 	.8byte	0
 	.8byte	0
-.LLST366:
-	.8byte	.LVL1560
-	.8byte	.LVL1581
+.LLST365:
+	.8byte	.LVL1562
+	.8byte	.LVL1583
 	.2byte	0x1
 	.byte	0x6a
 	.8byte	0
 	.8byte	0
-.LLST160:
-	.8byte	.LVL610
-	.8byte	.LVL611
+.LLST151:
+	.8byte	.LVL587
+	.8byte	.LVL588
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL613
+	.8byte	.LVL590
 	.8byte	.LFE230
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST161:
-	.8byte	.LVL614
-	.8byte	.LVL618
+.LLST152:
+	.8byte	.LVL591
+	.8byte	.LVL595
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL619
+	.8byte	.LVL596
 	.8byte	.LFE230
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST162:
-	.8byte	.LVL610
-	.8byte	.LVL612
+.LLST153:
+	.8byte	.LVL587
+	.8byte	.LVL589
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL613
+	.8byte	.LVL590
 	.8byte	.LFE230
 	.2byte	0x1
 	.byte	0x69
 	.8byte	0
 	.8byte	0
-.LLST359:
-	.8byte	.LVL1534
-	.8byte	.LVL1535
+.LLST358:
+	.8byte	.LVL1536
+	.8byte	.LVL1537
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1543
-	.8byte	.LVL1544
+	.8byte	.LVL1545
+	.8byte	.LVL1546
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1544
-	.8byte	.LVL1545
+	.8byte	.LVL1546
+	.8byte	.LVL1547
 	.2byte	0x3
 	.byte	0x84
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL1545
-	.8byte	.LVL1546
+	.8byte	.LVL1547
+	.8byte	.LVL1548
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST360:
-	.8byte	.LVL1524
-	.8byte	.LVL1527
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1536
-	.8byte	.LVL1537
+.LLST359:
+	.8byte	.LVL1526
+	.8byte	.LVL1529
 	.2byte	0x1
 	.byte	0x63
 	.8byte	.LVL1538
 	.8byte	.LVL1539
 	.2byte	0x1
 	.byte	0x63
+	.8byte	.LVL1540
+	.8byte	.LVL1541
+	.2byte	0x1
+	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST361:
-	.8byte	.LVL1530
-	.8byte	.LVL1534
+.LLST360:
+	.8byte	.LVL1532
+	.8byte	.LVL1536
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1539
 	.8byte	.LVL1541
+	.8byte	.LVL1543
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1542
-	.8byte	.LVL1543
+	.8byte	.LVL1544
+	.8byte	.LVL1545
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST362:
-	.8byte	.LVL1522
-	.8byte	.LVL1533
+.LLST361:
+	.8byte	.LVL1524
+	.8byte	.LVL1535
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1536
-	.8byte	.LVL1543
+	.8byte	.LVL1538
+	.8byte	.LVL1545
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1546
+	.8byte	.LVL1548
 	.8byte	.LFE229
 	.2byte	0x1
 	.byte	0x65
@@ -49823,102 +49736,102 @@ __func__.7632:
 	.byte	0x55
 	.8byte	0
 	.8byte	0
-.LLST308:
-	.8byte	.LVL1245
-	.8byte	.LVL1246
+.LLST307:
+	.8byte	.LVL1247
+	.8byte	.LVL1248
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1257
-	.8byte	.LVL1258
+	.8byte	.LVL1259
+	.8byte	.LVL1260
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1258
-	.8byte	.LVL1259
+	.8byte	.LVL1260
+	.8byte	.LVL1261
 	.2byte	0x3
 	.byte	0x88
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL1259
-	.8byte	.LVL1260
+	.8byte	.LVL1261
+	.8byte	.LVL1262
 	.2byte	0x1
 	.byte	0x68
 	.8byte	0
 	.8byte	0
-.LLST309:
-	.8byte	.LVL1244
-	.8byte	.LVL1249
+.LLST308:
+	.8byte	.LVL1246
+	.8byte	.LVL1251
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1249
-	.8byte	.LVL1257
+	.8byte	.LVL1251
+	.8byte	.LVL1259
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL1257
-	.8byte	.LVL1260
+	.8byte	.LVL1259
+	.8byte	.LVL1262
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1260
-	.8byte	.LVL1261
+	.8byte	.LVL1262
+	.8byte	.LVL1263
 	.2byte	0x3
 	.byte	0x89
 	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL1262
-	.8byte	.LVL1265
+	.8byte	.LVL1264
+	.8byte	.LVL1267
 	.2byte	0x3
 	.byte	0x89
 	.sleb128 1
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST310:
-	.8byte	.LVL1247
-	.8byte	.LVL1257
+.LLST309:
+	.8byte	.LVL1249
+	.8byte	.LVL1259
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL1260
-	.8byte	.LVL1263
+	.8byte	.LVL1262
+	.8byte	.LVL1265
 	.2byte	0x1
 	.byte	0x6b
 	.8byte	0
 	.8byte	0
-.LLST311:
-	.8byte	.LVL1244
-	.8byte	.LVL1249
+.LLST310:
+	.8byte	.LVL1246
+	.8byte	.LVL1251
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1249
-	.8byte	.LVL1254
+	.8byte	.LVL1251
+	.8byte	.LVL1256
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1255
 	.8byte	.LVL1257
+	.8byte	.LVL1259
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1257
-	.8byte	.LVL1260
+	.8byte	.LVL1259
+	.8byte	.LVL1262
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1260
-	.8byte	.LVL1264
+	.8byte	.LVL1262
+	.8byte	.LVL1266
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST203:
-	.8byte	.LVL799
-	.8byte	.LVL800
+.LLST202:
+	.8byte	.LVL801
+	.8byte	.LVL802
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL800
-	.8byte	.LVL805
+	.8byte	.LVL802
+	.8byte	.LVL807
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL805
+	.8byte	.LVL807
 	.8byte	.LFE225
 	.2byte	0x4
 	.byte	0xf3
@@ -49927,16 +49840,16 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST204:
-	.8byte	.LVL799
+.LLST203:
 	.8byte	.LVL801
+	.8byte	.LVL803
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL801
-	.8byte	.LVL804
+	.8byte	.LVL803
+	.8byte	.LVL806
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL804
+	.8byte	.LVL806
 	.8byte	.LFE225
 	.2byte	0x4
 	.byte	0xf3
@@ -50269,16 +50182,16 @@ __func__.7632:
 	.byte	0x53
 	.8byte	0
 	.8byte	0
-.LLST460:
-	.8byte	.LVL2070
-	.8byte	.LVL2073
+.LLST459:
+	.8byte	.LVL2050
+	.8byte	.LVL2053
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2073
-	.8byte	.LVL2074-1
+	.8byte	.LVL2053
+	.8byte	.LVL2054-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL2074-1
+	.8byte	.LVL2054-1
 	.8byte	.LFE220
 	.2byte	0x4
 	.byte	0xf3
@@ -50287,16 +50200,16 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST461:
-	.8byte	.LVL2070
-	.8byte	.LVL2072
+.LLST460:
+	.8byte	.LVL2050
+	.8byte	.LVL2052
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL2072
-	.8byte	.LVL2074-1
+	.8byte	.LVL2052
+	.8byte	.LVL2054-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL2074-1
+	.8byte	.LVL2054-1
 	.8byte	.LFE220
 	.2byte	0x4
 	.byte	0xf3
@@ -50305,16 +50218,16 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST462:
-	.8byte	.LVL2070
-	.8byte	.LVL2071
+.LLST461:
+	.8byte	.LVL2050
+	.8byte	.LVL2051
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL2071
-	.8byte	.LVL2074-1
+	.8byte	.LVL2051
+	.8byte	.LVL2054-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL2074-1
+	.8byte	.LVL2054-1
 	.8byte	.LFE220
 	.2byte	0x4
 	.byte	0xf3
@@ -50323,16 +50236,16 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST442:
-	.8byte	.LVL1980
-	.8byte	.LVL1983
+.LLST441:
+	.8byte	.LVL1976
+	.8byte	.LVL1979
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1983
-	.8byte	.LVL1984-1
+	.8byte	.LVL1979
+	.8byte	.LVL1980-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1984-1
+	.8byte	.LVL1980-1
 	.8byte	.LFE219
 	.2byte	0x4
 	.byte	0xf3
@@ -50341,16 +50254,16 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST443:
-	.8byte	.LVL1980
-	.8byte	.LVL1982
+.LLST442:
+	.8byte	.LVL1976
+	.8byte	.LVL1978
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1982
-	.8byte	.LVL1984-1
+	.8byte	.LVL1978
+	.8byte	.LVL1980-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1984-1
+	.8byte	.LVL1980-1
 	.8byte	.LFE219
 	.2byte	0x4
 	.byte	0xf3
@@ -50359,16 +50272,16 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST444:
-	.8byte	.LVL1980
-	.8byte	.LVL1981
+.LLST443:
+	.8byte	.LVL1976
+	.8byte	.LVL1977
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1981
-	.8byte	.LVL1984-1
+	.8byte	.LVL1977
+	.8byte	.LVL1980-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1984-1
+	.8byte	.LVL1980-1
 	.8byte	.LFE219
 	.2byte	0x4
 	.byte	0xf3
@@ -50377,61 +50290,64 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST400:
-	.8byte	.LVL1740
-	.8byte	.LVL1742
+.LLST387:
+	.8byte	.LVL1689
+	.8byte	.LVL1691
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1742
-	.8byte	.LVL1743
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL1743
-	.8byte	.LVL1745
+	.8byte	.LVL1691
+	.8byte	.LVL1693
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1745
-	.8byte	.LVL1748
+	.8byte	.LVL1693
+	.8byte	.LVL1695
 	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL1748
-	.8byte	.LVL1763
+	.byte	0x50
+	.8byte	.LVL1695
+	.8byte	.LVL1710
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1763
-	.8byte	.LFE218
+	.8byte	.LVL1710
+	.8byte	.LVL1711
 	.2byte	0x1
-	.byte	0x64
+	.byte	0x50
+	.8byte	.LVL1711
+	.8byte	.LFE218
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST401:
-	.8byte	.LVL1740
-	.8byte	.LVL1741
+.LLST388:
+	.8byte	.LVL1689
+	.8byte	.LVL1690
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1741
-	.8byte	.LVL1744
+	.8byte	.LVL1690
+	.8byte	.LVL1692
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1745
+	.8byte	.LVL1693
 	.8byte	.LFE218
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST402:
-	.8byte	.LVL1748
-	.8byte	.LVL1753
+.LLST389:
+	.8byte	.LVL1695
+	.8byte	.LVL1700
 	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL1753
-	.8byte	.LVL1754
+	.byte	0x50
+	.8byte	.LVL1700
+	.8byte	.LVL1701
 	.2byte	0x2a
 	.byte	0xf3
 	.uleb128 0x1
@@ -50462,16 +50378,16 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST403:
-	.8byte	.LVL1749
-	.8byte	.LVL1750
+.LLST390:
+	.8byte	.LVL1696
+	.8byte	.LVL1697
 	.2byte	0x25
 	.byte	0x71
 	.sleb128 0
 	.byte	0xa
 	.2byte	0xffff
 	.byte	0x1a
-	.byte	0x84
+	.byte	0x70
 	.sleb128 0
 	.byte	0xa
 	.2byte	0xffff
@@ -50494,8 +50410,8 @@ __func__.7632:
 	.byte	0x16
 	.byte	0x13
 	.byte	0x9f
-	.8byte	.LVL1750
-	.8byte	.LVL1752
+	.8byte	.LVL1697
+	.8byte	.LVL1699
 	.2byte	0x2e
 	.byte	0x3
 	.8byte	c_ftl_nand_sec_pre_page
@@ -50504,7 +50420,7 @@ __func__.7632:
 	.byte	0xa
 	.2byte	0xffff
 	.byte	0x1a
-	.byte	0x84
+	.byte	0x70
 	.sleb128 0
 	.byte	0xa
 	.2byte	0xffff
@@ -50529,26 +50445,26 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST404:
-	.8byte	.LVL1747
-	.8byte	.LVL1763
+.LLST391:
+	.8byte	.LVL1694
+	.8byte	.LVL1710
 	.2byte	0x1
-	.byte	0x65
+	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST405:
-	.8byte	.LVL1759
-	.8byte	.LVL1760-1
+.LLST392:
+	.8byte	.LVL1706
+	.8byte	.LVL1707-1
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST445:
-	.8byte	.LVL1985
-	.8byte	.LVL1988
+.LLST444:
+	.8byte	.LVL1981
+	.8byte	.LVL1982
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1988
+	.8byte	.LVL1982
 	.8byte	.LFE217
 	.2byte	0x4
 	.byte	0xf3
@@ -50557,196 +50473,211 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST446:
+.LLST445:
+	.8byte	.LVL1981
+	.8byte	.LVL1983
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1983
 	.8byte	.LVL1985
-	.8byte	.LVL1987
 	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL1985
+	.8byte	.LVL1988
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
 	.byte	0x51
-	.8byte	.LVL1987
+	.byte	0x9f
+	.8byte	.LVL1988
 	.8byte	.LVL1989
 	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL1992
-	.8byte	.LVL1995
-	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1995
-	.8byte	.LVL2004
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL2011
-	.8byte	.LVL2017
+	.8byte	.LVL1989
+	.8byte	.LVL1997
 	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL2018
-	.8byte	.LVL2069
+	.byte	0x65
+	.8byte	.LVL1997
+	.8byte	.LVL1998
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL1998
+	.8byte	.LVL2042
 	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL2069
+	.byte	0x65
+	.8byte	.LVL2042
+	.8byte	.LVL2049
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL2049
 	.8byte	.LFE217
 	.2byte	0x1
-	.byte	0x51
+	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST447:
-	.8byte	.LVL1985
-	.8byte	.LVL1986
+.LLST446:
+	.8byte	.LVL1981
+	.8byte	.LVL1984
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1986
-	.8byte	.LVL1990
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL1992
-	.8byte	.LVL1993
+	.8byte	.LVL1984
+	.8byte	.LVL1987
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 352
+	.8byte	.LVL1987
+	.8byte	.LVL1988
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 112
+	.8byte	.LVL1988
+	.8byte	.LVL1995
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1993
+	.8byte	.LVL1995
+	.8byte	.LVL2049
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 352
+	.8byte	.LVL2049
 	.8byte	.LFE217
 	.2byte	0x1
-	.byte	0x68
+	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST448:
-	.8byte	.LVL1985
-	.8byte	.LVL1989-1
+.LLST447:
+	.8byte	.LVL1981
+	.8byte	.LVL1985-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1989-1
-	.8byte	.LVL1991
+	.8byte	.LVL1985-1
+	.8byte	.LVL1986
 	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL1992
-	.8byte	.LVL1994
+	.byte	0x6a
+	.8byte	.LVL1986
+	.8byte	.LVL1988
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL1988
+	.8byte	.LVL1995
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1994
-	.8byte	.LVL2069
+	.8byte	.LVL1995
+	.8byte	.LVL2049
 	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL2069
+	.byte	0x6a
+	.8byte	.LVL2049
 	.8byte	.LFE217
 	.2byte	0x1
 	.byte	0x53
 	.8byte	0
 	.8byte	0
-.LLST449:
-	.8byte	.LVL2047
-	.8byte	.LVL2069
+.LLST448:
+	.8byte	.LVL2020
+	.8byte	.LVL2041
 	.2byte	0x1
-	.byte	0x6b
+	.byte	0x67
 	.8byte	0
 	.8byte	0
-.LLST450:
-	.8byte	.LVL2000
-	.8byte	.LVL2001
+.LLST449:
+	.8byte	.LVL1994
+	.8byte	.LVL1995
 	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL2001
-	.8byte	.LVL2003
+	.byte	0x69
+	.8byte	.LVL1995
+	.8byte	.LVL1997
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL2024
-	.8byte	.LVL2069
+	.8byte	.LVL1998
+	.8byte	.LVL2043
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST451:
-	.8byte	.LVL1996
-	.8byte	.LVL2005
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL2011
-	.8byte	.LVL2017
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL2018
-	.8byte	.LVL2069
+.LLST450:
+	.8byte	.LVL1990
+	.8byte	.LVL2049
 	.2byte	0x1
-	.byte	0x65
+	.byte	0x69
 	.8byte	0
 	.8byte	0
-.LLST452:
-	.8byte	.LVL1997
-	.8byte	.LVL1998
+.LLST451:
+	.8byte	.LVL1991
+	.8byte	.LVL1992
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1998
-	.8byte	.LVL2069
+	.8byte	.LVL1992
+	.8byte	.LVL2049
 	.2byte	0x3
 	.byte	0x8f
-	.sleb128 344
+	.sleb128 332
 	.8byte	0
 	.8byte	0
-.LLST453:
-	.8byte	.LVL2045
-	.8byte	.LVL2046
+.LLST452:
+	.8byte	.LVL2018
+	.8byte	.LVL2019
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2046
-	.8byte	.LVL2048
+	.8byte	.LVL2019
+	.8byte	.LVL2021
 	.2byte	0x2
 	.byte	0x71
 	.sleb128 4
-	.8byte	.LVL2048
-	.8byte	.LVL2049-1
+	.8byte	.LVL2021
+	.8byte	.LVL2022-1
 	.2byte	0xf
 	.byte	0x3
 	.8byte	req_prgm
 	.byte	0x6
-	.byte	0x87
+	.byte	0x8b
 	.sleb128 0
 	.byte	0x22
 	.byte	0x23
 	.uleb128 0x4
 	.8byte	0
 	.8byte	0
-.LLST454:
-	.8byte	.LVL2035
-	.8byte	.LVL2040
+.LLST453:
+	.8byte	.LVL2008
+	.8byte	.LVL2013
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 360
-	.8byte	.LVL2043
-	.8byte	.LVL2055
+	.8byte	.LVL2016
+	.8byte	.LVL2028
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 360
-	.8byte	.LVL2055
-	.8byte	.LVL2056
+	.8byte	.LVL2028
+	.8byte	.LVL2029
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL2056
-	.8byte	.LVL2069
+	.8byte	.LVL2029
+	.8byte	.LVL2041
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 360
 	.8byte	0
 	.8byte	0
-.LLST455:
-	.8byte	.LVL1999
-	.8byte	.LVL2016
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL2016
-	.8byte	.LVL2017
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL2018
-	.8byte	.LVL2024
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL2024
-	.8byte	.LVL2069
+.LLST454:
+	.8byte	.LVL1993
+	.8byte	.LVL2049
 	.2byte	0x1
-	.byte	0x6a
+	.byte	0x68
 	.8byte	0
 	.8byte	0
-.LLST456:
-	.8byte	.LVL2031
-	.8byte	.LVL2032
+.LLST455:
+	.8byte	.LVL2004
+	.8byte	.LVL2005
 	.2byte	0x21
 	.byte	0x83
 	.sleb128 7
@@ -50761,7 +50692,7 @@ __func__.7632:
 	.byte	0xc
 	.4byte	0xffffffff
 	.byte	0x1a
-	.byte	0x8a
+	.byte	0x88
 	.sleb128 0
 	.byte	0x16
 	.byte	0x14
@@ -50774,155 +50705,122 @@ __func__.7632:
 	.byte	0x16
 	.byte	0x13
 	.byte	0x9f
-	.8byte	.LVL2032
-	.8byte	.LVL2033
+	.8byte	.LVL2005
+	.8byte	.LVL2006
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2033
-	.8byte	.LVL2036
+	.8byte	.LVL2006
+	.8byte	.LVL2009
 	.2byte	0x3
 	.byte	0x8f
-	.sleb128 336
-	.8byte	.LVL2036
-	.8byte	.LVL2040
+	.sleb128 324
+	.8byte	.LVL2009
+	.8byte	.LVL2013
 	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL2043
-	.8byte	.LVL2069
+	.byte	0x67
+	.8byte	.LVL2016
+	.8byte	.LVL2041
 	.2byte	0x3
 	.byte	0x8f
-	.sleb128 336
+	.sleb128 324
 	.8byte	0
 	.8byte	0
-.LLST457:
-	.8byte	.LVL2000
-	.8byte	.LVL2001
+.LLST456:
+	.8byte	.LVL1994
+	.8byte	.LVL1995
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL2012
-	.8byte	.LVL2014
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL2014
-	.8byte	.LVL2016-1
-	.2byte	0x16
-	.byte	0x86
-	.sleb128 0
-	.byte	0x3
-	.8byte	c_ftl_nand_sec_pre_page
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x85
-	.sleb128 0
-	.byte	0x1e
-	.byte	0x1c
-	.byte	0x9f
-	.8byte	.LVL2050
-	.8byte	.LVL2051
+	.8byte	.LVL2023
+	.8byte	.LVL2024
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2051
-	.8byte	.LVL2053
+	.8byte	.LVL2024
+	.8byte	.LVL2026
 	.2byte	0x3
 	.byte	0x8f
-	.sleb128 340
-	.8byte	.LVL2056
-	.8byte	.LVL2058
+	.sleb128 348
+	.8byte	.LVL2029
+	.8byte	.LVL2031
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL2058
-	.8byte	.LVL2059
+	.8byte	.LVL2031
+	.8byte	.LVL2032
 	.2byte	0x3
 	.byte	0x8f
-	.sleb128 340
-	.8byte	.LVL2060
-	.8byte	.LVL2068
+	.sleb128 348
+	.8byte	.LVL2033
+	.8byte	.LVL2040
 	.2byte	0x3
 	.byte	0x8f
-	.sleb128 340
+	.sleb128 348
 	.8byte	0
 	.8byte	0
-.LLST458:
-	.8byte	.LVL2000
-	.8byte	.LVL2001
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL2013
-	.8byte	.LVL2015
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL2015
-	.8byte	.LVL2017
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL2018
-	.8byte	.LVL2024
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL2052
-	.8byte	.LVL2053
+.LLST457:
+	.8byte	.LVL1994
+	.8byte	.LVL1995
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL2025
+	.8byte	.LVL2026
 	.2byte	0x3
 	.byte	0x8f
-	.sleb128 348
-	.8byte	.LVL2057
-	.8byte	.LVL2058
+	.sleb128 356
+	.8byte	.LVL2030
+	.8byte	.LVL2031
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2058
-	.8byte	.LVL2059
+	.8byte	.LVL2031
+	.8byte	.LVL2032
 	.2byte	0x3
 	.byte	0x8f
-	.sleb128 348
-	.8byte	.LVL2060
-	.8byte	.LVL2068
+	.sleb128 356
+	.8byte	.LVL2033
+	.8byte	.LVL2040
 	.2byte	0x3
 	.byte	0x8f
-	.sleb128 348
+	.sleb128 356
 	.8byte	0
 	.8byte	0
-.LLST459:
-	.8byte	.LVL2000
-	.8byte	.LVL2001
+.LLST458:
+	.8byte	.LVL1994
+	.8byte	.LVL1995
 	.2byte	0xa
 	.byte	0x3
 	.8byte	g_active_superblock
 	.byte	0x9f
-	.8byte	.LVL2001
-	.8byte	.LVL2006
+	.8byte	.LVL1995
+	.8byte	.LVL1997
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2024
-	.8byte	.LVL2028
+	.8byte	.LVL1998
+	.8byte	.LVL2001
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2030
-	.8byte	.LVL2042
+	.8byte	.LVL2003
+	.8byte	.LVL2015
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2043
-	.8byte	.LVL2069
+	.8byte	.LVL2016
+	.8byte	.LVL2044
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST393:
-	.8byte	.LVL1714
-	.8byte	.LVL1717-1
+.LLST398:
+	.8byte	.LVL1743
+	.8byte	.LVL1746-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1717-1
-	.8byte	.LVL1717
+	.8byte	.LVL1746-1
+	.8byte	.LVL1746
 	.2byte	0x3
 	.byte	0x84
 	.sleb128 -4
 	.byte	0x9f
-	.8byte	.LVL1717
+	.8byte	.LVL1746
 	.8byte	.LFE215
 	.2byte	0x4
 	.byte	0xf3
@@ -50931,12 +50829,12 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST394:
-	.8byte	.LVL1714
-	.8byte	.LVL1717-1
+.LLST399:
+	.8byte	.LVL1743
+	.8byte	.LVL1746-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1717-1
+	.8byte	.LVL1746-1
 	.8byte	.LFE215
 	.2byte	0x4
 	.byte	0xf3
@@ -50945,12 +50843,12 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST395:
-	.8byte	.LVL1714
-	.8byte	.LVL1715
+.LLST400:
+	.8byte	.LVL1743
+	.8byte	.LVL1744
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1715
+	.8byte	.LVL1744
 	.8byte	.LFE215
 	.2byte	0x4
 	.byte	0xf3
@@ -50959,16 +50857,16 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST396:
-	.8byte	.LVL1714
-	.8byte	.LVL1716
+.LLST401:
+	.8byte	.LVL1743
+	.8byte	.LVL1745
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1716
-	.8byte	.LVL1733
+	.8byte	.LVL1745
+	.8byte	.LVL1762
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1733
+	.8byte	.LVL1762
 	.8byte	.LFE215
 	.2byte	0x4
 	.byte	0xf3
@@ -50977,42 +50875,42 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST397:
-	.8byte	.LVL1726
-	.8byte	.LVL1729-1
+.LLST402:
+	.8byte	.LVL1755
+	.8byte	.LVL1758-1
 	.2byte	0x1
 	.byte	0x53
 	.8byte	0
 	.8byte	0
-.LLST398:
-	.8byte	.LVL1718
-	.8byte	.LVL1719
+.LLST403:
+	.8byte	.LVL1747
+	.8byte	.LVL1748
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1728
-	.8byte	.LVL1729-1
+	.8byte	.LVL1757
+	.8byte	.LVL1758-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1729-1
-	.8byte	.LVL1731
+	.8byte	.LVL1758-1
+	.8byte	.LVL1760
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST399:
-	.8byte	.LVL1725
-	.8byte	.LVL1727-1
+.LLST404:
+	.8byte	.LVL1754
+	.8byte	.LVL1756-1
 	.2byte	0x2
 	.byte	0x86
 	.sleb128 16
 	.8byte	0
 	.8byte	0
-.LLST425:
-	.8byte	.LVL1931
-	.8byte	.LVL1934
+.LLST424:
+	.8byte	.LVL1927
+	.8byte	.LVL1930
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1934
+	.8byte	.LVL1930
 	.8byte	.LFE214
 	.2byte	0x4
 	.byte	0xf3
@@ -51021,139 +50919,139 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST426:
-	.8byte	.LVL1931
-	.8byte	.LVL1933
+.LLST425:
+	.8byte	.LVL1927
+	.8byte	.LVL1929
 	.2byte	0x1
 	.byte	0x51
+	.8byte	.LVL1929
 	.8byte	.LVL1933
-	.8byte	.LVL1937
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1937
-	.8byte	.LVL1940
+	.8byte	.LVL1933
+	.8byte	.LVL1936
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL1940
-	.8byte	.LVL1941
+	.8byte	.LVL1936
+	.8byte	.LVL1937
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1941
+	.8byte	.LVL1937
 	.8byte	.LFE214
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST427:
-	.8byte	.LVL1931
-	.8byte	.LVL1932
+.LLST426:
+	.8byte	.LVL1927
+	.8byte	.LVL1928
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1932
-	.8byte	.LVL1939
+	.8byte	.LVL1928
+	.8byte	.LVL1935
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL1939
-	.8byte	.LVL1940
+	.8byte	.LVL1935
+	.8byte	.LVL1936
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x52
 	.byte	0x9f
-	.8byte	.LVL1940
-	.8byte	.LVL1942-1
+	.8byte	.LVL1936
+	.8byte	.LVL1942
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1942-1
-	.8byte	.LVL1979
+	.8byte	.LVL1942
+	.8byte	.LVL1975
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL1979
+	.8byte	.LVL1975
 	.8byte	.LFE214
 	.2byte	0x1
 	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST428:
-	.8byte	.LVL1931
-	.8byte	.LVL1935-1
+.LLST427:
+	.8byte	.LVL1927
+	.8byte	.LVL1931-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1935-1
-	.8byte	.LVL1938
+	.8byte	.LVL1931-1
+	.8byte	.LVL1934
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1938
-	.8byte	.LVL1940
+	.8byte	.LVL1934
+	.8byte	.LVL1936
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x53
 	.byte	0x9f
-	.8byte	.LVL1940
-	.8byte	.LVL1942-1
+	.8byte	.LVL1936
+	.8byte	.LVL1943
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1942-1
-	.8byte	.LVL1979
+	.8byte	.LVL1943
+	.8byte	.LVL1975
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1979
+	.8byte	.LVL1975
 	.8byte	.LFE214
 	.2byte	0x1
 	.byte	0x53
 	.8byte	0
 	.8byte	0
-.LLST429:
-	.8byte	.LVL1931
-	.8byte	.LVL1936
+.LLST428:
+	.8byte	.LVL1927
+	.8byte	.LVL1932
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1940
-	.8byte	.LVL1947
+	.8byte	.LVL1936
+	.8byte	.LVL1943
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1947
-	.8byte	.LVL1958
+	.8byte	.LVL1943
+	.8byte	.LVL1954
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1960
-	.8byte	.LVL1979
+	.8byte	.LVL1956
+	.8byte	.LVL1975
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1979
+	.8byte	.LVL1975
 	.8byte	.LFE214
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST430:
-	.8byte	.LVL1943
-	.8byte	.LVL1979
+.LLST429:
+	.8byte	.LVL1938
+	.8byte	.LVL1975
 	.2byte	0x1
 	.byte	0x6a
 	.8byte	0
 	.8byte	0
-.LLST431:
-	.8byte	.LVL1944
-	.8byte	.LVL1979
+.LLST430:
+	.8byte	.LVL1939
+	.8byte	.LVL1975
 	.2byte	0x1
 	.byte	0x68
 	.8byte	0
 	.8byte	0
-.LLST432:
-	.8byte	.LVL1962
-	.8byte	.LVL1963
+.LLST431:
+	.8byte	.LVL1958
+	.8byte	.LVL1959
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1963
-	.8byte	.LVL1964-1
+	.8byte	.LVL1959
+	.8byte	.LVL1960-1
 	.2byte	0x16
 	.byte	0x3
 	.8byte	c_ftl_nand_sec_pre_page
@@ -51171,53 +51069,53 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST433:
-	.8byte	.LVL1945
-	.8byte	.LVL1947
+.LLST432:
+	.8byte	.LVL1940
+	.8byte	.LVL1943
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL1947
-	.8byte	.LVL1979
+	.8byte	.LVL1943
+	.8byte	.LVL1975
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST434:
-	.8byte	.LVL1954
-	.8byte	.LVL1956
+.LLST433:
+	.8byte	.LVL1950
+	.8byte	.LVL1952
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST435:
-	.8byte	.LVL1945
-	.8byte	.LVL1947
+.LLST434:
+	.8byte	.LVL1940
+	.8byte	.LVL1943
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1947
-	.8byte	.LVL1955
+	.8byte	.LVL1943
+	.8byte	.LVL1951
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL1961
-	.8byte	.LVL1976
+	.8byte	.LVL1957
+	.8byte	.LVL1972
 	.2byte	0x1
 	.byte	0x69
 	.8byte	0
 	.8byte	0
-.LLST436:
-	.8byte	.LVL1945
-	.8byte	.LVL1946
+.LLST435:
+	.8byte	.LVL1940
+	.8byte	.LVL1941
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1946
-	.8byte	.LVL1952
+	.8byte	.LVL1941
+	.8byte	.LVL1948
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 300
-	.8byte	.LVL1952
-	.8byte	.LVL1953
+	.8byte	.LVL1948
+	.8byte	.LVL1949
 	.2byte	0x8
 	.byte	0x8f
 	.sleb128 300
@@ -51226,62 +51124,62 @@ __func__.7632:
 	.byte	0x31
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL1961
-	.8byte	.LVL1976
+	.8byte	.LVL1957
+	.8byte	.LVL1972
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 300
 	.8byte	0
 	.8byte	0
-.LLST437:
-	.8byte	.LVL1931
-	.8byte	.LVL1936
+.LLST436:
+	.8byte	.LVL1927
+	.8byte	.LVL1932
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1940
-	.8byte	.LVL1947
+	.8byte	.LVL1936
+	.8byte	.LVL1943
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1947
-	.8byte	.LVL1968
+	.8byte	.LVL1943
+	.8byte	.LVL1964
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 296
-	.8byte	.LVL1968
-	.8byte	.LVL1969
+	.8byte	.LVL1964
+	.8byte	.LVL1965
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1969
-	.8byte	.LVL1979
+	.8byte	.LVL1965
+	.8byte	.LVL1975
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 296
-	.8byte	.LVL1979
+	.8byte	.LVL1975
 	.8byte	.LFE214
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST438:
-	.8byte	.LVL1940
-	.8byte	.LVL1947
+.LLST437:
+	.8byte	.LVL1936
+	.8byte	.LVL1943
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1947
-	.8byte	.LVL1969
+	.8byte	.LVL1943
+	.8byte	.LVL1965
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 292
-	.8byte	.LVL1969
-	.8byte	.LVL1970
+	.8byte	.LVL1965
+	.8byte	.LVL1966
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1970
-	.8byte	.LVL1971
+	.8byte	.LVL1966
+	.8byte	.LVL1967
 	.2byte	0x9
 	.byte	0x71
 	.sleb128 0
@@ -51291,79 +51189,79 @@ __func__.7632:
 	.byte	0x4
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL1971
-	.8byte	.LVL1972
+	.8byte	.LVL1967
+	.8byte	.LVL1968
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1972
-	.8byte	.LVL1979
+	.8byte	.LVL1968
+	.8byte	.LVL1975
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 292
-	.8byte	.LVL1979
+	.8byte	.LVL1975
 	.8byte	.LFE214
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST439:
-	.8byte	.LVL1940
-	.8byte	.LVL1947
+.LLST438:
+	.8byte	.LVL1936
+	.8byte	.LVL1943
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1947
-	.8byte	.LVL1974
+	.8byte	.LVL1943
+	.8byte	.LVL1970
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 288
-	.8byte	.LVL1974
-	.8byte	.LVL1975
+	.8byte	.LVL1970
+	.8byte	.LVL1971
 	.2byte	0x1
 	.byte	0x53
+	.8byte	.LVL1971
 	.8byte	.LVL1975
-	.8byte	.LVL1979
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 288
-	.8byte	.LVL1979
+	.8byte	.LVL1975
 	.8byte	.LFE214
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST440:
-	.8byte	.LVL1950
-	.8byte	.LVL1951
+.LLST439:
+	.8byte	.LVL1946
+	.8byte	.LVL1947
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL1961
-	.8byte	.LVL1964-1
+	.8byte	.LVL1957
+	.8byte	.LVL1960-1
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL1964-1
-	.8byte	.LVL1965
+	.8byte	.LVL1960-1
+	.8byte	.LVL1961
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 264
-	.8byte	.LVL1966
-	.8byte	.LVL1967
+	.8byte	.LVL1962
+	.8byte	.LVL1963
 	.2byte	0x1
 	.byte	0x54
 	.8byte	0
 	.8byte	0
-.LLST441:
-	.8byte	.LVL1977
-	.8byte	.LVL1978-1
+.LLST440:
+	.8byte	.LVL1973
+	.8byte	.LVL1974-1
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST469:
-	.8byte	.LVL2170
-	.8byte	.LVL2171
+.LLST468:
+	.8byte	.LVL2151
+	.8byte	.LVL2152
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x1fc1
@@ -51371,8 +51269,8 @@ __func__.7632:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL2171
-	.8byte	.LVL2172
+	.8byte	.LVL2152
+	.8byte	.LVL2153
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x1fc2
@@ -51380,8 +51278,8 @@ __func__.7632:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL2172
-	.8byte	.LVL2173
+	.8byte	.LVL2153
+	.8byte	.LVL2154
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x1fc1
@@ -51391,118 +51289,118 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST465:
-	.8byte	.LVL2127
-	.8byte	.LVL2128
+.LLST464:
+	.8byte	.LVL2108
+	.8byte	.LVL2109
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL2130
-	.8byte	.LVL2131
+	.8byte	.LVL2111
+	.8byte	.LVL2112
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL2140
-	.8byte	.LVL2141
+	.8byte	.LVL2121
+	.8byte	.LVL2122
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL2141
-	.8byte	.LVL2142-1
+	.8byte	.LVL2122
+	.8byte	.LVL2123-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2144
-	.8byte	.LVL2145
+	.8byte	.LVL2125
+	.8byte	.LVL2126
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL2149
-	.8byte	.LVL2150
+	.8byte	.LVL2130
+	.8byte	.LVL2131
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2150
-	.8byte	.LVL2151-1
+	.8byte	.LVL2131
+	.8byte	.LVL2132-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2151
-	.8byte	.LVL2152
+	.8byte	.LVL2132
+	.8byte	.LVL2133
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2152
-	.8byte	.LVL2153
+	.8byte	.LVL2133
+	.8byte	.LVL2134
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL2153
-	.8byte	.LVL2154-1
+	.8byte	.LVL2134
+	.8byte	.LVL2135-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2156
-	.8byte	.LVL2157
+	.8byte	.LVL2137
+	.8byte	.LVL2138
 	.2byte	0x1
 	.byte	0x68
 	.8byte	0
 	.8byte	0
-.LLST466:
-	.8byte	.LVL2130
-	.8byte	.LVL2134
+.LLST465:
+	.8byte	.LVL2111
+	.8byte	.LVL2115
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2152
-	.8byte	.LVL2155
+	.8byte	.LVL2133
+	.8byte	.LVL2136
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2156
-	.8byte	.LVL2157
+	.8byte	.LVL2137
+	.8byte	.LVL2138
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST467:
-	.8byte	.LVL2126
-	.8byte	.LVL2127
+.LLST466:
+	.8byte	.LVL2107
+	.8byte	.LVL2108
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL2127
-	.8byte	.LVL2129
+	.8byte	.LVL2108
+	.8byte	.LVL2110
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2140
-	.8byte	.LVL2143
+	.8byte	.LVL2121
+	.8byte	.LVL2124
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2144
-	.8byte	.LVL2146
+	.8byte	.LVL2125
+	.8byte	.LVL2127
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2148
-	.8byte	.LVL2149
+	.8byte	.LVL2129
+	.8byte	.LVL2130
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST468:
-	.8byte	.LVL2125
-	.8byte	.LVL2127
+.LLST467:
+	.8byte	.LVL2106
+	.8byte	.LVL2108
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2137
-	.8byte	.LVL2138
+	.8byte	.LVL2118
+	.8byte	.LVL2119
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2139
-	.8byte	.LVL2140
+	.8byte	.LVL2120
+	.8byte	.LVL2121
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST188:
-	.8byte	.LVL688
-	.8byte	.LVL689
+.LLST181:
+	.8byte	.LVL665
+	.8byte	.LVL666
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL689
-	.8byte	.LVL714
+	.8byte	.LVL666
+	.8byte	.LVL691
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL714
+	.8byte	.LVL691
 	.8byte	.LFE209
 	.2byte	0x4
 	.byte	0xf3
@@ -51511,16 +51409,16 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST189:
-	.8byte	.LVL688
-	.8byte	.LVL691
+.LLST182:
+	.8byte	.LVL665
+	.8byte	.LVL668
 	.2byte	0x1
 	.byte	0x51
+	.8byte	.LVL668
 	.8byte	.LVL691
-	.8byte	.LVL714
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL714
+	.8byte	.LVL691
 	.8byte	.LFE209
 	.2byte	0x4
 	.byte	0xf3
@@ -51529,256 +51427,256 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST190:
-	.8byte	.LVL688
-	.8byte	.LVL692
+.LLST183:
+	.8byte	.LVL665
+	.8byte	.LVL669
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL692
-	.8byte	.LVL695
+	.8byte	.LVL669
+	.8byte	.LVL672
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL696
-	.8byte	.LVL705
+	.8byte	.LVL673
+	.8byte	.LVL682
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL706
-	.8byte	.LVL713
+	.8byte	.LVL683
+	.8byte	.LVL690
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL715
-	.8byte	.LVL726
+	.8byte	.LVL692
+	.8byte	.LVL703
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL727
+	.8byte	.LVL704
 	.8byte	.LFE209
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST191:
-	.8byte	.LVL688
-	.8byte	.LVL692
+.LLST184:
+	.8byte	.LVL665
+	.8byte	.LVL669
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL692
-	.8byte	.LVL693
+	.8byte	.LVL669
+	.8byte	.LVL670
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL701
-	.8byte	.LVL702
+	.8byte	.LVL678
+	.8byte	.LVL679
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL702
-	.8byte	.LVL712
+	.8byte	.LVL679
+	.8byte	.LVL689
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL715
-	.8byte	.LVL720
+	.8byte	.LVL692
+	.8byte	.LVL697
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL721
-	.8byte	.LVL728
+	.8byte	.LVL698
+	.8byte	.LVL705
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL729
-	.8byte	.LVL734
+	.8byte	.LVL706
+	.8byte	.LVL711
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL735
+	.8byte	.LVL712
 	.8byte	.LFE209
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST192:
-	.8byte	.LVL690
-	.8byte	.LVL692
+.LLST185:
+	.8byte	.LVL667
+	.8byte	.LVL669
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL692
-	.8byte	.LVL694-1
+	.8byte	.LVL669
+	.8byte	.LVL671-1
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL701
-	.8byte	.LVL702
+	.8byte	.LVL678
+	.8byte	.LVL679
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL702
-	.8byte	.LVL703-1
+	.8byte	.LVL679
+	.8byte	.LVL680-1
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL703
-	.8byte	.LVL704
+	.8byte	.LVL680
+	.8byte	.LVL681
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL715
-	.8byte	.LVL723
+	.8byte	.LVL692
+	.8byte	.LVL700
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL723
-	.8byte	.LVL724
+	.8byte	.LVL700
+	.8byte	.LVL701
 	.2byte	0x3
 	.byte	0x75
 	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL725
-	.8byte	.LVL728
+	.8byte	.LVL702
+	.8byte	.LVL705
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL729
-	.8byte	.LVL737
+	.8byte	.LVL706
+	.8byte	.LVL714
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL737
-	.8byte	.LVL738
+	.8byte	.LVL714
+	.8byte	.LVL715
 	.2byte	0x3
 	.byte	0x75
 	.sleb128 1
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST193:
-	.8byte	.LVL717
-	.8byte	.LVL722
+.LLST186:
+	.8byte	.LVL694
+	.8byte	.LVL699
 	.2byte	0x1
 	.byte	0x5d
-	.8byte	.LVL722
-	.8byte	.LVL725
+	.8byte	.LVL699
+	.8byte	.LVL702
 	.2byte	0x1
 	.byte	0x5e
-	.8byte	.LVL725
-	.8byte	.LVL728
+	.8byte	.LVL702
+	.8byte	.LVL705
 	.2byte	0x1
 	.byte	0x5d
-	.8byte	.LVL731
-	.8byte	.LVL736
+	.8byte	.LVL708
+	.8byte	.LVL713
 	.2byte	0x1
 	.byte	0x5c
-	.8byte	.LVL736
+	.8byte	.LVL713
 	.8byte	.LFE209
 	.2byte	0x1
 	.byte	0x5d
 	.8byte	0
 	.8byte	0
-.LLST194:
-	.8byte	.LVL688
-	.8byte	.LVL699
+.LLST187:
+	.8byte	.LVL665
+	.8byte	.LVL676
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.8byte	.LVL699
-	.8byte	.LVL700
+	.8byte	.LVL676
+	.8byte	.LVL677
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL701
-	.8byte	.LVL712
+	.8byte	.LVL678
+	.8byte	.LVL689
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL715
-	.8byte	.LVL729
+	.8byte	.LVL692
+	.8byte	.LVL706
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.8byte	.LVL729
+	.8byte	.LVL706
 	.8byte	.LFE209
 	.2byte	0x1
 	.byte	0x6a
 	.8byte	0
 	.8byte	0
-.LLST195:
-	.8byte	.LVL688
-	.8byte	.LVL701
+.LLST188:
+	.8byte	.LVL665
+	.8byte	.LVL678
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL701
-	.8byte	.LVL708
+	.8byte	.LVL678
+	.8byte	.LVL685
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL709
-	.8byte	.LVL710
+	.8byte	.LVL686
+	.8byte	.LVL687
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL715
-	.8byte	.LVL729
+	.8byte	.LVL692
+	.8byte	.LVL706
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL729
+	.8byte	.LVL706
 	.8byte	.LFE209
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST196:
-	.8byte	.LVL688
-	.8byte	.LVL700
+.LLST189:
+	.8byte	.LVL665
+	.8byte	.LVL677
 	.2byte	0x2
 	.byte	0x36
 	.byte	0x9f
-	.8byte	.LVL701
-	.8byte	.LVL712
+	.8byte	.LVL678
+	.8byte	.LVL689
 	.2byte	0x1
 	.byte	0x6c
-	.8byte	.LVL715
-	.8byte	.LVL729
+	.8byte	.LVL692
+	.8byte	.LVL706
 	.2byte	0x2
 	.byte	0x36
 	.byte	0x9f
-	.8byte	.LVL729
+	.8byte	.LVL706
 	.8byte	.LFE209
 	.2byte	0x1
 	.byte	0x6c
 	.8byte	0
 	.8byte	0
-.LLST197:
-	.8byte	.LVL688
-	.8byte	.LVL698
+.LLST190:
+	.8byte	.LVL665
+	.8byte	.LVL675
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL698
-	.8byte	.LVL700
+	.8byte	.LVL675
+	.8byte	.LVL677
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.8byte	.LVL701
-	.8byte	.LVL712
+	.8byte	.LVL678
+	.8byte	.LVL689
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL715
-	.8byte	.LVL729
+	.8byte	.LVL692
+	.8byte	.LVL706
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL729
+	.8byte	.LVL706
 	.8byte	.LFE209
 	.2byte	0x1
 	.byte	0x69
 	.8byte	0
 	.8byte	0
-.LLST201:
-	.8byte	.LVL796
-	.8byte	.LVL797
+.LLST200:
+	.8byte	.LVL798
+	.8byte	.LVL799
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST202:
-	.8byte	.LVL743
-	.8byte	.LVL749
+.LLST201:
+	.8byte	.LVL745
+	.8byte	.LVL751
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL750
-	.8byte	.LVL757
+	.8byte	.LVL752
+	.8byte	.LVL759
 	.2byte	0x7
 	.byte	0x83
 	.sleb128 0
@@ -51786,20 +51684,20 @@ __func__.7632:
 	.2byte	0xffff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL759
-	.8byte	.LVL762
+	.8byte	.LVL761
+	.8byte	.LVL764
 	.2byte	0x1
 	.byte	0x6c
-	.8byte	.LVL766
 	.8byte	.LVL768
+	.8byte	.LVL770
 	.2byte	0x1
 	.byte	0x6c
-	.8byte	.LVL768
-	.8byte	.LVL769-1
-	.2byte	0x1
-	.byte	0x50
 	.8byte	.LVL770
 	.8byte	.LVL771-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL772
+	.8byte	.LVL773-1
 	.2byte	0xe
 	.byte	0x3
 	.8byte	c_ftl_nand_max_map_blks
@@ -51808,8 +51706,8 @@ __func__.7632:
 	.byte	0x31
 	.byte	0x24
 	.byte	0x9f
-	.8byte	.LVL778
-	.8byte	.LVL779
+	.8byte	.LVL780
+	.8byte	.LVL781
 	.2byte	0x12
 	.byte	0x3
 	.8byte	c_ftl_nand_map_region_num
@@ -51821,12 +51719,12 @@ __func__.7632:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.8byte	.LVL779
-	.8byte	.LVL780-1
-	.2byte	0x1
-	.byte	0x50
 	.8byte	.LVL781
 	.8byte	.LVL782-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL783
+	.8byte	.LVL784-1
 	.2byte	0xe
 	.byte	0x3
 	.8byte	c_ftl_nand_max_map_blks
@@ -51835,8 +51733,8 @@ __func__.7632:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.8byte	.LVL783
-	.8byte	.LVL784
+	.8byte	.LVL785
+	.8byte	.LVL786
 	.2byte	0x12
 	.byte	0x3
 	.8byte	c_ftl_nand_l2pmap_ram_region_num
@@ -51848,12 +51746,12 @@ __func__.7632:
 	.byte	0x34
 	.byte	0x24
 	.byte	0x9f
-	.8byte	.LVL784
-	.8byte	.LVL785-1
+	.8byte	.LVL786
+	.8byte	.LVL787-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL786
-	.8byte	.LVL787
+	.8byte	.LVL788
+	.8byte	.LVL789
 	.2byte	0x20
 	.byte	0x3
 	.8byte	c_ftl_nand_l2pmap_ram_region_num
@@ -51871,12 +51769,12 @@ __func__.7632:
 	.byte	0x1a
 	.byte	0x1e
 	.byte	0x9f
-	.8byte	.LVL787
-	.8byte	.LVL788-1
+	.8byte	.LVL789
+	.8byte	.LVL790-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL789
-	.8byte	.LVL790
+	.8byte	.LVL791
+	.8byte	.LVL792
 	.2byte	0x12
 	.byte	0x3
 	.8byte	c_ftl_nand_blk_pre_plane
@@ -51888,12 +51786,12 @@ __func__.7632:
 	.byte	0x36
 	.byte	0x1e
 	.byte	0x9f
-	.8byte	.LVL790
-	.8byte	.LVL791-1
+	.8byte	.LVL792
+	.8byte	.LVL793-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL792
-	.8byte	.LVL793
+	.8byte	.LVL794
+	.8byte	.LVL795
 	.2byte	0x15
 	.byte	0x3
 	.8byte	c_ftl_nand_die_num
@@ -51908,8 +51806,8 @@ __func__.7632:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.8byte	.LVL793
-	.8byte	.LVL794
+	.8byte	.LVL795
+	.8byte	.LVL796
 	.2byte	0x26
 	.byte	0x3
 	.8byte	c_ftl_nand_blks_per_die
@@ -51933,8 +51831,8 @@ __func__.7632:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.8byte	.LVL794
-	.8byte	.LVL795-1
+	.8byte	.LVL796
+	.8byte	.LVL797-1
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
@@ -52049,16 +51947,16 @@ __func__.7632:
 	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST112:
-	.8byte	.LVL468
-	.8byte	.LVL470-1
+.LLST102:
+	.8byte	.LVL443
+	.8byte	.LVL445-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL470-1
-	.8byte	.LVL475
+	.8byte	.LVL445-1
+	.8byte	.LVL450
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL475
+	.8byte	.LVL450
 	.8byte	.LFE201
 	.2byte	0x4
 	.byte	0xf3
@@ -52067,21 +51965,21 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST113:
-	.8byte	.LVL469
-	.8byte	.LVL470-1
+.LLST103:
+	.8byte	.LVL444
+	.8byte	.LVL445-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL470-1
-	.8byte	.LVL471
+	.8byte	.LVL445-1
+	.8byte	.LVL446
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL471
-	.8byte	.LVL472
+	.8byte	.LVL446
+	.8byte	.LVL447
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL472
-	.8byte	.LVL473
+	.8byte	.LVL447
+	.8byte	.LVL448
 	.2byte	0xc
 	.byte	0x70
 	.sleb128 0
@@ -52095,118 +51993,118 @@ __func__.7632:
 	.sleb128 0
 	.byte	0x22
 	.byte	0x9f
-	.8byte	.LVL473
-	.8byte	.LVL474
+	.8byte	.LVL448
+	.8byte	.LVL449
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST107:
-	.8byte	.LVL316
-	.8byte	.LVL318-1
+.LLST97:
+	.8byte	.LVL291
+	.8byte	.LVL293-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL318-1
-	.8byte	.LVL451
+	.8byte	.LVL293-1
+	.8byte	.LVL426
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL451
-	.8byte	.LVL452
+	.8byte	.LVL426
+	.8byte	.LVL427
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL452
+	.8byte	.LVL427
 	.8byte	.LFE200
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST108:
-	.8byte	.LVL456
-	.8byte	.LVL457
+.LLST98:
+	.8byte	.LVL431
+	.8byte	.LVL432
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL457
-	.8byte	.LVL458
+	.8byte	.LVL432
+	.8byte	.LVL433
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL458
-	.8byte	.LVL459-1
+	.8byte	.LVL433
+	.8byte	.LVL434-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL459-1
-	.8byte	.LVL461
+	.8byte	.LVL434-1
+	.8byte	.LVL436
 	.2byte	0x3
 	.byte	0x87
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL461
-	.8byte	.LVL462
+	.8byte	.LVL436
+	.8byte	.LVL437
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL464
-	.8byte	.LVL465
+	.8byte	.LVL439
+	.8byte	.LVL440
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL465
-	.8byte	.LVL466-1
+	.8byte	.LVL440
+	.8byte	.LVL441-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL466-1
-	.8byte	.LVL467
+	.8byte	.LVL441-1
+	.8byte	.LVL442
 	.2byte	0x3
 	.byte	0x86
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL467
+	.8byte	.LVL442
 	.8byte	.LFE200
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST109:
-	.8byte	.LVL317
-	.8byte	.LVL318-1
+.LLST99:
+	.8byte	.LVL292
+	.8byte	.LVL293-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL318-1
-	.8byte	.LVL319
+	.8byte	.LVL293-1
+	.8byte	.LVL294
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL319
-	.8byte	.LVL431
+	.8byte	.LVL294
+	.8byte	.LVL406
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL431
-	.8byte	.LVL450
+	.8byte	.LVL406
+	.8byte	.LVL425
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL452
+	.8byte	.LVL427
 	.8byte	.LFE200
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST110:
-	.8byte	.LVL456
-	.8byte	.LVL459-1
+.LLST100:
+	.8byte	.LVL431
+	.8byte	.LVL434-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL461
-	.8byte	.LVL463
+	.8byte	.LVL436
+	.8byte	.LVL438
 	.2byte	0x1
 	.byte	0x53
 	.8byte	0
 	.8byte	0
-.LLST111:
-	.8byte	.LVL464
-	.8byte	.LVL466-1
+.LLST101:
+	.8byte	.LVL439
+	.8byte	.LVL441-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL467
+	.8byte	.LVL442
 	.8byte	.LFE200
 	.2byte	0xd
 	.byte	0x3
@@ -52248,7 +52146,7 @@ __func__.7632:
 	.2byte	0x1
 	.byte	0x50
 	.8byte	.LVL11
-	.8byte	.LFE356
+	.8byte	.LFE355
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -52281,12 +52179,12 @@ __func__.7632:
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST49:
-	.8byte	.LVL136
-	.8byte	.LVL137-1
+.LLST43:
+	.8byte	.LVL116
+	.8byte	.LVL117-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL137-1
+	.8byte	.LVL117-1
 	.8byte	.LFE245
 	.2byte	0x4
 	.byte	0xf3
@@ -52295,9 +52193,9 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST50:
-	.8byte	.LVL138
-	.8byte	.LVL139
+.LLST44:
+	.8byte	.LVL118
+	.8byte	.LVL119
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -52305,12 +52203,12 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST56:
-	.8byte	.LVL156
-	.8byte	.LVL157-1
+.LLST50:
+	.8byte	.LVL136
+	.8byte	.LVL137-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL157-1
+	.8byte	.LVL137-1
 	.8byte	.LFE244
 	.2byte	0x4
 	.byte	0xf3
@@ -52319,9 +52217,9 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST57:
-	.8byte	.LVL158
-	.8byte	.LVL159
+.LLST51:
+	.8byte	.LVL138
+	.8byte	.LVL139
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -52329,16 +52227,16 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST70:
-	.8byte	.LVL198
-	.8byte	.LVL199
+.LLST64:
+	.8byte	.LVL179
+	.8byte	.LVL180
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL199
-	.8byte	.LVL216
+	.8byte	.LVL180
+	.8byte	.LVL202
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL216
+	.8byte	.LVL202
 	.8byte	.LFE252
 	.2byte	0x4
 	.byte	0xf3
@@ -52347,24 +52245,24 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST71:
-	.8byte	.LVL200
-	.8byte	.LVL215
+.LLST65:
+	.8byte	.LVL181
+	.8byte	.LVL201
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST72:
-	.8byte	.LVL206
-	.8byte	.LVL207
+.LLST66:
+	.8byte	.LVL190
+	.8byte	.LVL192
 	.2byte	0x5
-	.byte	0x71
+	.byte	0x70
 	.sleb128 0
 	.byte	0x36
 	.byte	0x1b
 	.byte	0x9f
-	.8byte	.LVL207
-	.8byte	.LVL213-1
+	.8byte	.LVL192
+	.8byte	.LVL199-1
 	.2byte	0xd
 	.byte	0x86
 	.sleb128 2
@@ -52380,97 +52278,167 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST73:
-	.8byte	.LVL202
-	.8byte	.LVL205-1
-	.2byte	0x13
+.LLST67:
+	.8byte	.LVL183
+	.8byte	.LVL185
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL185
+	.8byte	.LVL188
+	.2byte	0xd
 	.byte	0x83
 	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
+	.byte	0x31
+	.byte	0x24
+	.byte	0xc
+	.4byte	0x1fffe
 	.byte	0x1a
+	.byte	0x72
+	.sleb128 0
+	.byte	0x22
+	.8byte	.LVL188
+	.8byte	.LVL189-1
+	.2byte	0x15
+	.byte	0x83
+	.sleb128 0
 	.byte	0x31
 	.byte	0x24
+	.byte	0xc
+	.4byte	0x1fffe
+	.byte	0x1a
 	.byte	0x3
 	.8byte	p_valid_page_count_table
 	.byte	0x6
 	.byte	0x22
 	.8byte	0
 	.8byte	0
-.LLST74:
-	.8byte	.LVL203
-	.8byte	.LVL211
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST75:
-	.8byte	.LVL206
-	.8byte	.LVL207
-	.2byte	0x11
-	.byte	0x71
+.LLST68:
+	.8byte	.LVL184
+	.8byte	.LVL185
+	.2byte	0xe
+	.byte	0x84
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x70
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.8byte	.LVL185
+	.8byte	.LVL186
+	.2byte	0x1b
+	.byte	0x83
 	.sleb128 0
-	.byte	0x36
-	.byte	0x1b
 	.byte	0x31
 	.byte	0x24
-	.byte	0x3
-	.8byte	p_valid_page_count_table
-	.byte	0x6
+	.byte	0xc
+	.4byte	0x1fffe
+	.byte	0x1a
+	.byte	0x72
+	.sleb128 0
 	.byte	0x22
-	.8byte	.LVL207
-	.8byte	.LVL213-1
-	.2byte	0x19
-	.byte	0x86
-	.sleb128 2
 	.byte	0x94
 	.byte	0x2
 	.byte	0xa
 	.2byte	0xffff
 	.byte	0x1a
-	.byte	0x36
+	.byte	0x70
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
 	.byte	0x1e
-	.byte	0x36
-	.byte	0x1b
+	.byte	0x9f
+	.8byte	.LVL186
+	.8byte	.LVL187
+	.2byte	0x1d
+	.byte	0x83
+	.sleb128 0
 	.byte	0x31
 	.byte	0x24
-	.byte	0x3
-	.8byte	p_valid_page_count_table
-	.byte	0x6
+	.byte	0xc
+	.4byte	0x1fffe
+	.byte	0x1a
+	.byte	0x72
+	.sleb128 0
 	.byte	0x22
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x86
+	.sleb128 4
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.8byte	.LVL187
+	.8byte	.LVL196
+	.2byte	0x1
+	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST76:
-	.8byte	.LVL209
-	.8byte	.LVL212
+.LLST69:
+	.8byte	.LVL191
+	.8byte	.LVL197
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST70:
+	.8byte	.LVL193
+	.8byte	.LVL195
+	.2byte	0xe
+	.byte	0x71
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x72
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.8byte	.LVL195
+	.8byte	.LVL198
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST77:
+.LLST71:
+	.8byte	.LVL182
 	.8byte	.LVL201
-	.8byte	.LVL215
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST78:
-	.8byte	.LVL206
-	.8byte	.LVL207
+.LLST72:
+	.8byte	.LVL190
+	.8byte	.LVL192
 	.2byte	0xe
 	.byte	0x3
 	.8byte	p_data_block_list_table
 	.byte	0x6
-	.byte	0x71
+	.byte	0x70
 	.sleb128 0
 	.byte	0x22
 	.byte	0x9f
-	.8byte	.LVL207
-	.8byte	.LVL208
+	.8byte	.LVL192
+	.8byte	.LVL194
 	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL208
-	.8byte	.LVL213-1
+	.byte	0x50
+	.8byte	.LVL194
+	.8byte	.LVL199-1
 	.2byte	0x16
 	.byte	0x86
 	.sleb128 2
@@ -52488,78 +52456,88 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST79:
-	.8byte	.LVL217
-	.8byte	.LVL219
+.LLST76:
+	.8byte	.LVL225
+	.8byte	.LVL226
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL219
-	.8byte	.LVL221-1
+	.8byte	.LVL226
+	.8byte	.LFE266
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST77:
+	.8byte	.LVL231
+	.8byte	.LVL232-1
 	.2byte	0x1
-	.byte	0x54
-	.8byte	.LVL221-1
-	.8byte	.LVL222
+	.byte	0x50
+	.8byte	.LVL232-1
+	.8byte	.LFE272
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL222
-	.8byte	.LVL224
+	.8byte	0
+	.8byte	0
+.LLST78:
+	.8byte	.LVL231
+	.8byte	.LVL232-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL232-1
+	.8byte	.LVL232
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL232
+	.8byte	.LVL233
 	.2byte	0x1
-	.byte	0x54
-	.8byte	.LVL224
-	.8byte	.LVL225
+	.byte	0x51
+	.8byte	.LVL233
+	.8byte	.LFE272
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
-	.byte	0x50
+	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL225
-	.8byte	.LFE255
-	.2byte	0x1
-	.byte	0x54
 	.8byte	0
 	.8byte	0
-.LLST80:
-	.8byte	.LVL217
-	.8byte	.LVL219
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL219
-	.8byte	.LVL221-1
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL222
-	.8byte	.LVL224
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL225
-	.8byte	.LVL226
+.LLST83:
+	.8byte	.LVL246
+	.8byte	.LVL248
 	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL227
-	.8byte	.LFE255
+	.byte	0x50
+	.8byte	.LVL249
+	.8byte	.LFE282
 	.2byte	0x1
-	.byte	0x55
+	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST81:
-	.8byte	.LVL217
-	.8byte	.LVL218
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 16
+.LLST84:
+	.8byte	.LVL247
+	.8byte	.LVL248
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL249
+	.8byte	.LFE282
+	.2byte	0x1
+	.byte	0x53
 	.8byte	0
 	.8byte	0
-.LLST82:
-	.8byte	.LVL220
-	.8byte	.LVL221-1
+.LLST112:
+	.8byte	.LVL479
+	.8byte	.LVL481-1
 	.2byte	0x1
-	.byte	0x54
-	.8byte	.LVL221-1
-	.8byte	.LVL222
+	.byte	0x50
+	.8byte	.LVL481-1
+	.8byte	.LFE297
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -52567,13 +52545,13 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST86:
-	.8byte	.LVL250
-	.8byte	.LVL251
+.LLST113:
+	.8byte	.LVL480
+	.8byte	.LVL481-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL251
-	.8byte	.LFE266
+	.8byte	.LVL481-1
+	.8byte	.LVL482
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -52581,13 +52559,17 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST87:
-	.8byte	.LVL256
-	.8byte	.LVL257-1
+.LLST175:
+	.8byte	.LVL655
+	.8byte	.LVL656
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL257-1
-	.8byte	.LFE272
+	.8byte	.LVL656
+	.8byte	.LVL664
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL664
+	.8byte	.LFE240
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -52595,24 +52577,27 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST88:
-	.8byte	.LVL256
-	.8byte	.LVL257-1
+.LLST176:
+	.8byte	.LVL655
+	.8byte	.LVL658-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL257-1
-	.8byte	.LVL257
+	.8byte	.LVL658-1
+	.8byte	.LFE240
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL257
-	.8byte	.LVL258
+	.8byte	0
+	.8byte	0
+.LLST177:
+	.8byte	.LVL657
+	.8byte	.LVL658-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL258
-	.8byte	.LFE272
+	.8byte	.LVL658-1
+	.8byte	.LVL663
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -52620,59 +52605,93 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST93:
-	.8byte	.LVL271
-	.8byte	.LVL273
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL274
-	.8byte	.LFE282
+.LLST178:
+	.8byte	.LVL657
+	.8byte	.LVL663
 	.2byte	0x1
-	.byte	0x50
+	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST94:
-	.8byte	.LVL272
-	.8byte	.LVL273
+.LLST179:
+	.8byte	.LVL657
+	.8byte	.LVL663
+	.2byte	0xa
+	.byte	0x3
+	.8byte	gSysFreeQueue
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST180:
+	.8byte	.LVL659
+	.8byte	.LVL660
 	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL274
-	.8byte	.LFE282
+	.byte	0x50
+	.8byte	.LVL660
+	.8byte	.LVL662
 	.2byte	0x1
-	.byte	0x53
+	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST121:
-	.8byte	.LVL502
-	.8byte	.LVL504-1
+.LLST193:
+	.8byte	.LVL729
+	.8byte	.LVL731
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL504-1
-	.8byte	.LFE297
+	.8byte	.LVL731
+	.8byte	.LVL737
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL737
+	.8byte	.LVL738
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
+	.8byte	.LVL738
+	.8byte	.LFE255
+	.2byte	0x1
+	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST122:
-	.8byte	.LVL503
-	.8byte	.LVL504-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL504-1
-	.8byte	.LVL505
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
+.LLST194:
+	.8byte	.LVL729
+	.8byte	.LVL732
+	.2byte	0x2
+	.byte	0x30
 	.byte	0x9f
+	.8byte	.LVL732
+	.8byte	.LVL737
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL738
+	.8byte	.LVL739
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL740
+	.8byte	.LFE255
+	.2byte	0x1
+	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST253:
-	.8byte	.LVL966
-	.8byte	.LVL970
+.LLST195:
+	.8byte	.LVL729
+	.8byte	.LVL730
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 16
+	.8byte	0
+	.8byte	0
+.LLST196:
+	.8byte	.LVL735
+	.8byte	.LVL736
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST252:
+	.8byte	.LVL968
+	.8byte	.LVL972
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x800
@@ -52680,8 +52699,8 @@ __func__.7632:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL971
-	.8byte	.LVL972
+	.8byte	.LVL973
+	.8byte	.LVL974
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x801
@@ -52689,8 +52708,8 @@ __func__.7632:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL972
-	.8byte	.LVL973
+	.8byte	.LVL974
+	.8byte	.LVL975
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x800
@@ -52700,35 +52719,35 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST299:
-	.8byte	.LVL1217
+.LLST298:
 	.8byte	.LVL1219
+	.8byte	.LVL1221
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1219
 	.8byte	.LVL1221
+	.8byte	.LVL1223
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1221
-	.8byte	.LVL1227
+	.8byte	.LVL1223
+	.8byte	.LVL1229
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1227
+	.8byte	.LVL1229
 	.8byte	.LFE344
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST300:
-	.8byte	.LVL1218
-	.8byte	.LVL1221
+.LLST299:
+	.8byte	.LVL1220
+	.8byte	.LVL1223
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1221
-	.8byte	.LVL1226
+	.8byte	.LVL1223
+	.8byte	.LVL1228
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -52736,16 +52755,16 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST320:
-	.8byte	.LVL1310
-	.8byte	.LVL1311
+.LLST319:
+	.8byte	.LVL1312
+	.8byte	.LVL1313
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1311
-	.8byte	.LVL1314
+	.8byte	.LVL1313
+	.8byte	.LVL1316
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL1314
+	.8byte	.LVL1316
 	.8byte	.LFE317
 	.2byte	0x4
 	.byte	0xf3
@@ -52754,28 +52773,28 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST321:
-	.8byte	.LVL1312
-	.8byte	.LVL1313
+.LLST320:
+	.8byte	.LVL1314
+	.8byte	.LVL1315
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1315
-	.8byte	.LVL1318
+	.8byte	.LVL1317
+	.8byte	.LVL1320
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1319
+	.8byte	.LVL1321
 	.8byte	.LFE317
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST322:
-	.8byte	.LVL1322
-	.8byte	.LVL1323
+.LLST321:
+	.8byte	.LVL1324
+	.8byte	.LVL1325
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1323
-	.8byte	.LVL1324
+	.8byte	.LVL1325
+	.8byte	.LVL1326
 	.2byte	0x6
 	.byte	0x70
 	.sleb128 0
@@ -52783,8 +52802,8 @@ __func__.7632:
 	.sleb128 0
 	.byte	0x22
 	.byte	0x9f
-	.8byte	.LVL1326
-	.8byte	.LVL1327
+	.8byte	.LVL1328
+	.8byte	.LVL1329
 	.2byte	0x6
 	.byte	0x70
 	.sleb128 0
@@ -52794,16 +52813,16 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST323:
-	.8byte	.LVL1328
-	.8byte	.LVL1329
+.LLST322:
+	.8byte	.LVL1330
+	.8byte	.LVL1331
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1329
-	.8byte	.LVL1337
+	.8byte	.LVL1331
+	.8byte	.LVL1339
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1337
+	.8byte	.LVL1339
 	.8byte	.LFE301
 	.2byte	0x4
 	.byte	0xf3
@@ -52812,16 +52831,16 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST324:
-	.8byte	.LVL1330
-	.8byte	.LVL1336
+.LLST323:
+	.8byte	.LVL1332
+	.8byte	.LVL1338
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST327:
-	.8byte	.LVL1350
-	.8byte	.LVL1351-1
+.LLST326:
+	.8byte	.LVL1352
+	.8byte	.LVL1353-1
 	.2byte	0xe
 	.byte	0x3
 	.8byte	g_MaxLpn
@@ -52832,9 +52851,9 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST328:
-	.8byte	.LVL1350
-	.8byte	.LVL1351-1
+.LLST327:
+	.8byte	.LVL1352
+	.8byte	.LVL1353-1
 	.2byte	0x12
 	.byte	0x3
 	.8byte	c_ftl_nand_planes_num
@@ -52846,8 +52865,8 @@ __func__.7632:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.8byte	.LVL1351-1
-	.8byte	.LVL1354
+	.8byte	.LVL1353-1
+	.8byte	.LVL1356
 	.2byte	0x9
 	.byte	0x89
 	.sleb128 0
@@ -52857,8 +52876,8 @@ __func__.7632:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.8byte	.LVL1356
 	.8byte	.LVL1358
+	.8byte	.LVL1360
 	.2byte	0x9
 	.byte	0x89
 	.sleb128 0
@@ -52870,60 +52889,60 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST329:
-	.8byte	.LVL1352
-	.8byte	.LVL1355
+.LLST328:
+	.8byte	.LVL1354
+	.8byte	.LVL1357
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1356
-	.8byte	.LVL1362
+	.8byte	.LVL1358
+	.8byte	.LVL1364
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST413:
-	.8byte	.LVL1832
-	.8byte	.LVL1834
+.LLST412:
+	.8byte	.LVL1829
+	.8byte	.LVL1831
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1834
-	.8byte	.LVL1847
+	.8byte	.LVL1831
+	.8byte	.LVL1844
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1847
-	.8byte	.LVL1848
+	.8byte	.LVL1844
+	.8byte	.LVL1845
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1848
-	.8byte	.LVL1868
+	.8byte	.LVL1845
+	.8byte	.LVL1865
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1868
-	.8byte	.LVL1870
+	.8byte	.LVL1865
+	.8byte	.LVL1867
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1870
-	.8byte	.LVL1881
+	.8byte	.LVL1867
+	.8byte	.LVL1878
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1881
-	.8byte	.LVL1928
+	.8byte	.LVL1878
+	.8byte	.LVL1924
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1928
-	.8byte	.LVL1929
+	.8byte	.LVL1924
+	.8byte	.LVL1925
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1929
+	.8byte	.LVL1925
 	.8byte	.LFE319
 	.2byte	0x4
 	.byte	0xf3
@@ -52932,12 +52951,12 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST414:
-	.8byte	.LVL1832
-	.8byte	.LVL1833
+.LLST413:
+	.8byte	.LVL1829
+	.8byte	.LVL1830
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1833
+	.8byte	.LVL1830
 	.8byte	.LFE319
 	.2byte	0x4
 	.byte	0xf3
@@ -52946,16 +52965,16 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST415:
-	.8byte	.LVL1835
-	.8byte	.LVL1847
+.LLST414:
+	.8byte	.LVL1832
+	.8byte	.LVL1844
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL1850
-	.8byte	.LVL1928
+	.8byte	.LVL1847
+	.8byte	.LVL1924
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -52963,28 +52982,28 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST416:
-	.8byte	.LVL1835
-	.8byte	.LVL1847
+.LLST415:
+	.8byte	.LVL1832
+	.8byte	.LVL1844
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1850
-	.8byte	.LVL1868
+	.8byte	.LVL1847
+	.8byte	.LVL1865
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1868
-	.8byte	.LVL1870
+	.8byte	.LVL1865
+	.8byte	.LVL1867
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1870
-	.8byte	.LVL1881
+	.8byte	.LVL1867
+	.8byte	.LVL1878
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1881
-	.8byte	.LVL1928
+	.8byte	.LVL1878
+	.8byte	.LVL1924
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -52992,120 +53011,120 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST417:
-	.8byte	.LVL1911
-	.8byte	.LVL1912-1
+.LLST416:
+	.8byte	.LVL1908
+	.8byte	.LVL1909-1
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL1912-1
-	.8byte	.LVL1913
+	.8byte	.LVL1909-1
+	.8byte	.LVL1910
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 272
 	.8byte	0
 	.8byte	0
-.LLST418:
-	.8byte	.LVL1892
-	.8byte	.LVL1893
+.LLST417:
+	.8byte	.LVL1889
+	.8byte	.LVL1890
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1893
-	.8byte	.LVL1906
+	.8byte	.LVL1890
+	.8byte	.LVL1903
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL1906
-	.8byte	.LVL1907
+	.8byte	.LVL1903
+	.8byte	.LVL1904
 	.2byte	0x3
 	.byte	0x8b
 	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL1908
-	.8byte	.LVL1928
+	.8byte	.LVL1905
+	.8byte	.LVL1924
 	.2byte	0x1
 	.byte	0x6b
 	.8byte	0
 	.8byte	0
-.LLST419:
-	.8byte	.LVL1894
-	.8byte	.LVL1899
+.LLST418:
+	.8byte	.LVL1891
+	.8byte	.LVL1896
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1901
-	.8byte	.LVL1902
+	.8byte	.LVL1898
+	.8byte	.LVL1899
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1903
-	.8byte	.LVL1905
+	.8byte	.LVL1900
+	.8byte	.LVL1902
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST420:
-	.8byte	.LVL1894
-	.8byte	.LVL1896
+.LLST419:
+	.8byte	.LVL1891
+	.8byte	.LVL1893
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1897
-	.8byte	.LVL1904
+	.8byte	.LVL1894
+	.8byte	.LVL1901
 	.2byte	0x1
 	.byte	0x67
 	.8byte	0
 	.8byte	0
-.LLST421:
+.LLST420:
+	.8byte	.LVL1892
 	.8byte	.LVL1895
-	.8byte	.LVL1898
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1898
-	.8byte	.LVL1900
+	.8byte	.LVL1895
+	.8byte	.LVL1897
 	.2byte	0x2
 	.byte	0x71
 	.sleb128 0
-	.8byte	.LVL1900
-	.8byte	.LVL1901
+	.8byte	.LVL1897
+	.8byte	.LVL1898
 	.2byte	0x2
 	.byte	0x71
 	.sleb128 -2
 	.8byte	0
 	.8byte	0
-.LLST422:
-	.8byte	.LVL1890
-	.8byte	.LVL1928
+.LLST421:
+	.8byte	.LVL1887
+	.8byte	.LVL1924
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 332
 	.8byte	0
 	.8byte	0
-.LLST423:
-	.8byte	.LVL1909
-	.8byte	.LVL1910
+.LLST422:
+	.8byte	.LVL1906
+	.8byte	.LVL1907
 	.2byte	0x2
 	.byte	0x71
 	.sleb128 16
-	.8byte	.LVL1910
-	.8byte	.LVL1918
+	.8byte	.LVL1907
+	.8byte	.LVL1915
 	.2byte	0x1
 	.byte	0x6c
 	.8byte	0
 	.8byte	0
-.LLST424:
-	.8byte	.LVL1840
-	.8byte	.LVL1841
+.LLST423:
+	.8byte	.LVL1837
+	.8byte	.LVL1838
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST464:
-	.8byte	.LVL2107
-	.8byte	.LVL2108
+.LLST463:
+	.8byte	.LVL2087
+	.8byte	.LVL2088
 	.2byte	0xa
 	.byte	0x3
 	.8byte	g_active_superblock
 	.byte	0x9f
-	.8byte	.LVL2108
-	.8byte	.LVL2114
+	.8byte	.LVL2088
+	.8byte	.LVL2092
 	.2byte	0xa
 	.byte	0x3
 	.8byte	g_buffer_superblock
@@ -53122,8 +53141,8 @@ __func__.7632:
 	.2byte	0
 	.8byte	.LFB349
 	.8byte	.LFE349-.LFB349
-	.8byte	.LFB356
-	.8byte	.LFE356-.LFB356
+	.8byte	.LFB355
+	.8byte	.LFE355-.LFB355
 	.8byte	.LFB202
 	.8byte	.LFE202-.LFB202
 	.8byte	.LFB203
@@ -53134,6 +53153,8 @@ __func__.7632:
 	.8byte	.LFE205-.LFB205
 	.8byte	.LFB208
 	.8byte	.LFE208-.LFB208
+	.8byte	.LFB216
+	.8byte	.LFE216-.LFB216
 	.8byte	.LFB221
 	.8byte	.LFE221-.LFB221
 	.8byte	.LFB222
@@ -53160,8 +53181,6 @@ __func__.7632:
 	.8byte	.LFE241-.LFB241
 	.8byte	.LFB242
 	.8byte	.LFE242-.LFB242
-	.8byte	.LFB243
-	.8byte	.LFE243-.LFB243
 	.8byte	.LFB246
 	.8byte	.LFE246-.LFB246
 	.8byte	.LFB245
@@ -53180,8 +53199,6 @@ __func__.7632:
 	.8byte	.LFE251-.LFB251
 	.8byte	.LFB252
 	.8byte	.LFE252-.LFB252
-	.8byte	.LFB255
-	.8byte	.LFE255-.LFB255
 	.8byte	.LFB260
 	.8byte	.LFE260-.LFB260
 	.8byte	.LFB266
@@ -53248,6 +53265,10 @@ __func__.7632:
 	.8byte	.LFE240-.LFB240
 	.8byte	.LFB209
 	.8byte	.LFE209-.LFB209
+	.8byte	.LFB243
+	.8byte	.LFE243-.LFB243
+	.8byte	.LFB255
+	.8byte	.LFE255-.LFB255
 	.8byte	.LFB346
 	.8byte	.LFE346-.LFB346
 	.8byte	.LFB206
@@ -53342,20 +53363,18 @@ __func__.7632:
 	.8byte	.LFE287-.LFB287
 	.8byte	.LFB269
 	.8byte	.LFE269-.LFB269
-	.8byte	.LFB289
-	.8byte	.LFE289-.LFB289
-	.8byte	.LFB299
-	.8byte	.LFE299-.LFB299
-	.8byte	.LFB215
-	.8byte	.LFE215-.LFB215
-	.8byte	.LFB216
-	.8byte	.LFE216-.LFB216
 	.8byte	.LFB212
 	.8byte	.LFE212-.LFB212
 	.8byte	.LFB213
 	.8byte	.LFE213-.LFB213
 	.8byte	.LFB218
 	.8byte	.LFE218-.LFB218
+	.8byte	.LFB289
+	.8byte	.LFE289-.LFB289
+	.8byte	.LFB299
+	.8byte	.LFE299-.LFB299
+	.8byte	.LFB215
+	.8byte	.LFE215-.LFB215
 	.8byte	.LFB308
 	.8byte	.LFE308-.LFB308
 	.8byte	.LFB311
@@ -53392,112 +53411,130 @@ __func__.7632:
 	.8byte	0
 	.section	.debug_ranges,"",@progbits
 .Ldebug_ranges0:
-	.8byte	.LBB166
-	.8byte	.LBE166
-	.8byte	.LBB169
-	.8byte	.LBE169
-	.8byte	0
-	.8byte	0
-	.8byte	.LBB170
-	.8byte	.LBE170
-	.8byte	.LBB173
-	.8byte	.LBE173
+	.8byte	.LBB185
+	.8byte	.LBE185
+	.8byte	.LBB188
+	.8byte	.LBE188
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB195
-	.8byte	.LBE195
-	.8byte	.LBB199
-	.8byte	.LBE199
-	.8byte	.LBB200
-	.8byte	.LBE200
+	.8byte	.LBB189
+	.8byte	.LBE189
+	.8byte	.LBB192
+	.8byte	.LBE192
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB209
-	.8byte	.LBE209
+	.8byte	.LBB207
+	.8byte	.LBE207
+	.8byte	.LBB211
+	.8byte	.LBE211
 	.8byte	.LBB212
 	.8byte	.LBE212
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB219
-	.8byte	.LBE219
-	.8byte	.LBB220
-	.8byte	.LBE220
-	.8byte	0
-	.8byte	0
-	.8byte	.LBB225
-	.8byte	.LBE225
-	.8byte	.LBB226
-	.8byte	.LBE226
+	.8byte	.LBB221
+	.8byte	.LBE221
+	.8byte	.LBB224
+	.8byte	.LBE224
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB233
-	.8byte	.LBE233
-	.8byte	.LBB235
-	.8byte	.LBE235
-	.8byte	.LBB236
-	.8byte	.LBE236
-	.8byte	.LBB237
-	.8byte	.LBE237
+	.8byte	.LBB231
+	.8byte	.LBE231
+	.8byte	.LBB232
+	.8byte	.LBE232
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB242
-	.8byte	.LBE242
-	.8byte	.LBB243
-	.8byte	.LBE243
+	.8byte	.LBB246
+	.8byte	.LBE246
+	.8byte	.LBB250
+	.8byte	.LBE250
+	.8byte	.LBB253
+	.8byte	.LBE253
 	.8byte	0
 	.8byte	0
+	.8byte	.LBB251
+	.8byte	.LBE251
 	.8byte	.LBB252
 	.8byte	.LBE252
-	.8byte	.LBB256
-	.8byte	.LBE256
-	.8byte	.LBB257
-	.8byte	.LBE257
-	.8byte	0
+	.8byte	.LBB254
+	.8byte	.LBE254
+	.8byte	.LBB255
+	.8byte	.LBE255
 	.8byte	0
-	.8byte	.LBB266
-	.8byte	.LBE266
-	.8byte	.LBB267
-	.8byte	.LBE267
 	.8byte	0
-	.8byte	0
-	.8byte	.LBB269
-	.8byte	.LBE269
-	.8byte	.LBB271
-	.8byte	.LBE271
+	.8byte	.LBB260
+	.8byte	.LBE260
+	.8byte	.LBB261
+	.8byte	.LBE261
 	.8byte	0
 	.8byte	0
+	.8byte	.LBB268
+	.8byte	.LBE268
 	.8byte	.LBB270
 	.8byte	.LBE270
+	.8byte	.LBB271
+	.8byte	.LBE271
 	.8byte	.LBB272
 	.8byte	.LBE272
-	.8byte	.LBB273
-	.8byte	.LBE273
-	.8byte	.LBB274
-	.8byte	.LBE274
 	.8byte	0
 	.8byte	0
+	.8byte	.LBB277
+	.8byte	.LBE277
+	.8byte	.LBB278
+	.8byte	.LBE278
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB287
+	.8byte	.LBE287
 	.8byte	.LBB291
 	.8byte	.LBE291
-	.8byte	.LBB296
-	.8byte	.LBE296
+	.8byte	.LBB292
+	.8byte	.LBE292
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB301
+	.8byte	.LBE301
+	.8byte	.LBB302
+	.8byte	.LBE302
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB304
+	.8byte	.LBE304
+	.8byte	.LBB306
+	.8byte	.LBE306
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB305
+	.8byte	.LBE305
+	.8byte	.LBB307
+	.8byte	.LBE307
+	.8byte	.LBB308
+	.8byte	.LBE308
+	.8byte	.LBB309
+	.8byte	.LBE309
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB326
+	.8byte	.LBE326
+	.8byte	.LBB331
+	.8byte	.LBE331
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB293
-	.8byte	.LBE293
-	.8byte	.LBB294
-	.8byte	.LBE294
+	.8byte	.LBB328
+	.8byte	.LBE328
+	.8byte	.LBB329
+	.8byte	.LBE329
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB298
-	.8byte	.LBE298
-	.8byte	.LBB299
-	.8byte	.LBE299
+	.8byte	.LBB333
+	.8byte	.LBE333
+	.8byte	.LBB334
+	.8byte	.LBE334
 	.8byte	0
 	.8byte	0
 	.8byte	.LFB349
 	.8byte	.LFE349
-	.8byte	.LFB356
-	.8byte	.LFE356
+	.8byte	.LFB355
+	.8byte	.LFE355
 	.8byte	.LFB202
 	.8byte	.LFE202
 	.8byte	.LFB203
@@ -53508,6 +53545,8 @@ __func__.7632:
 	.8byte	.LFE205
 	.8byte	.LFB208
 	.8byte	.LFE208
+	.8byte	.LFB216
+	.8byte	.LFE216
 	.8byte	.LFB221
 	.8byte	.LFE221
 	.8byte	.LFB222
@@ -53534,8 +53573,6 @@ __func__.7632:
 	.8byte	.LFE241
 	.8byte	.LFB242
 	.8byte	.LFE242
-	.8byte	.LFB243
-	.8byte	.LFE243
 	.8byte	.LFB246
 	.8byte	.LFE246
 	.8byte	.LFB245
@@ -53554,8 +53591,6 @@ __func__.7632:
 	.8byte	.LFE251
 	.8byte	.LFB252
 	.8byte	.LFE252
-	.8byte	.LFB255
-	.8byte	.LFE255
 	.8byte	.LFB260
 	.8byte	.LFE260
 	.8byte	.LFB266
@@ -53622,6 +53657,10 @@ __func__.7632:
 	.8byte	.LFE240
 	.8byte	.LFB209
 	.8byte	.LFE209
+	.8byte	.LFB243
+	.8byte	.LFE243
+	.8byte	.LFB255
+	.8byte	.LFE255
 	.8byte	.LFB346
 	.8byte	.LFE346
 	.8byte	.LFB206
@@ -53716,20 +53755,18 @@ __func__.7632:
 	.8byte	.LFE287
 	.8byte	.LFB269
 	.8byte	.LFE269
-	.8byte	.LFB289
-	.8byte	.LFE289
-	.8byte	.LFB299
-	.8byte	.LFE299
-	.8byte	.LFB215
-	.8byte	.LFE215
-	.8byte	.LFB216
-	.8byte	.LFE216
 	.8byte	.LFB212
 	.8byte	.LFE212
 	.8byte	.LFB213
 	.8byte	.LFE213
 	.8byte	.LFB218
 	.8byte	.LFE218
+	.8byte	.LFB289
+	.8byte	.LFE289
+	.8byte	.LFB299
+	.8byte	.LFE299
+	.8byte	.LFB215
+	.8byte	.LFE215
 	.8byte	.LFB308
 	.8byte	.LFE308
 	.8byte	.LFB311
@@ -53767,37 +53804,37 @@ __func__.7632:
 	.section	.debug_line,"",@progbits
 .Ldebug_line0:
 	.section	.debug_str,"MS",@progbits,1
-.LASF728:
+.LASF727:
 	.string	"FtlEctTblFlush"
-.LASF593:
+.LASF592:
 	.string	"gc_page_num"
-.LASF609:
+.LASF608:
 	.string	"superBlk"
-.LASF499:
+.LASF498:
 	.string	"g_gc_bad_block_temp_num"
 .LASF363:
 	.string	"all_blk_used_slc_mode"
 .LASF43:
 	.string	"reserved"
-.LASF508:
+.LASF507:
 	.string	"g_totle_read_sector"
-.LASF574:
+.LASF573:
 	.string	"__func__"
 .LASF419:
 	.string	"c_ftl_nand_sys_blks_per_plane"
-.LASF733:
+.LASF732:
 	.string	"nSec"
-.LASF729:
+.LASF728:
 	.string	"forceFlush"
 .LASF107:
 	.string	"bootm_headers"
-.LASF453:
+.LASF452:
 	.string	"p_gc_data_buf"
 .LASF125:
 	.string	"rd_end"
-.LASF492:
+.LASF491:
 	.string	"p_gc_blk_tbl"
-.LASF788:
+.LASF787:
 	.string	"FtlFreeSysBlkQueueOut"
 .LASF324:
 	.string	"ftl_bbt_blk_header"
@@ -53805,33 +53842,33 @@ __func__.7632:
 	.string	"eth_device"
 .LASF306:
 	.string	"sign"
-.LASF833:
+.LASF831:
 	.string	"sctidx"
-.LASF670:
+.LASF669:
 	.string	"Ftl_load_ext_data"
 .LASF96:
 	.string	"ih_comp"
-.LASF587:
+.LASF586:
 	.string	"block"
 .LASF22:
 	.string	"_Bool"
-.LASF652:
+.LASF651:
 	.string	"min_ec"
-.LASF604:
+.LASF603:
 	.string	"req_read_temp"
 .LASF279:
 	.string	"p_spare"
-.LASF686:
+.LASF685:
 	.string	"recovery_cur_page_ver"
-.LASF506:
+.LASF505:
 	.string	"g_totle_write_page_count"
 .LASF245:
 	.string	"net_root_path"
-.LASF625:
+.LASF624:
 	.string	"lookup_ppa"
-.LASF818:
+.LASF816:
 	.string	"FtlBbmTblFlush"
-.LASF612:
+.LASF611:
 	.string	"Ftl_get_new_temp_ppa"
 .LASF327:
 	.string	"ftl_data_blk_header"
@@ -53845,74 +53882,74 @@ __func__.7632:
 	.string	"des_ppa"
 .LASF237:
 	.string	"priv"
-.LASF778:
+.LASF777:
 	.string	"insert_free_list"
-.LASF882:
+.LASF880:
 	.ascii	"GNU C11 6.3.1 20170404 -ms"
 	.string	"trict-align -march=armv8-a+nosimd -mlittle-endian -mabi=lp64 -g -Os -fno-builtin -ffreestanding -fshort-wchar -fno-stack-protector -fno-delete-null-pointer-checks -fstack-usage -fno-pic -ffunction-sections -fdata-sections -ffixed-r9 -fno-common -ffixed-x18"
 .LASF21:
 	.string	"___strtok"
 .LASF198:
 	.string	"UCLASS_SPI_GENERIC"
-.LASF477:
+.LASF476:
 	.string	"g_l2p_last_update_region_id"
-.LASF699:
+.LASF698:
 	.string	"ftl_sb_update_avl_pages"
-.LASF572:
+.LASF571:
 	.string	"FlashProgPages"
-.LASF857:
+.LASF855:
 	.string	"test_page_num"
-.LASF685:
+.LASF684:
 	.string	"lookup_superblock_id"
 .LASF420:
 	.string	"c_ftl_nand_init_sys_blks_per_plane"
-.LASF866:
+.LASF864:
 	.string	"FtlConstantsInit"
-.LASF596:
+.LASF595:
 	.string	"num_io"
-.LASF869:
+.LASF867:
 	.string	"FtlPrintInfo"
-.LASF745:
+.LASF744:
 	.string	"l2p_flush"
 .LASF378:
 	.string	"rear"
 .LASF305:
 	.string	"ftl_l2p_map_info"
-.LASF521:
+.LASF520:
 	.string	"g_in_swl_replace"
 .LASF404:
 	.string	"c_ftl_nand_page_pre_slc_blk"
 .LASF243:
 	.string	"net_nis_domain"
-.LASF765:
+.LASF764:
 	.string	"List_update_data_list"
-.LASF853:
+.LASF851:
 	.string	"create_first_buffer_superblock"
-.LASF503:
+.LASF502:
 	.string	"g_gc_merge_free_blk_threshold"
-.LASF694:
+.LASF693:
 	.string	"last_mlc_page_version"
-.LASF631:
+.LASF630:
 	.string	"IsBlkInGcList"
 .LASF235:
 	.string	"next"
 .LASF312:
 	.string	"pBlkVpcTbl"
-.LASF698:
+.LASF697:
 	.string	"FtlReUsePrevPpa"
-.LASF659:
+.LASF658:
 	.string	"update_multiplier_value"
 .LASF411:
 	.string	"c_ftl_nand_totle_phy_blks"
-.LASF875:
+.LASF873:
 	.string	"memcmp"
 .LASF421:
 	.string	"c_ftl_nand_max_sys_blks"
-.LASF577:
-	.string	"PhyBlk"
 .LASF576:
+	.string	"PhyBlk"
+.LASF575:
 	.string	"FlashReadPages"
-.LASF479:
+.LASF478:
 	.string	"p_free_data_block_list_head"
 .LASF148:
 	.string	"UCLASS_AHCI"
@@ -53920,29 +53957,29 @@ __func__.7632:
 	.string	"UCLASS_I2C_MUX"
 .LASF263:
 	.string	"uclass_id"
-.LASF601:
+.LASF600:
 	.string	"get_new_gc_superblock"
-.LASF623:
+.LASF622:
 	.string	"BOPS_EN"
 .LASF241:
 	.string	"net_netmask"
-.LASF850:
+.LASF848:
 	.string	"bad_block_cnt"
 .LASF424:
 	.string	"c_ftl_nand_max_data_blks"
-.LASF560:
+.LASF559:
 	.string	"pvTo"
 .LASF117:
 	.string	"fit_noffset_rd"
 .LASF192:
 	.string	"UCLASS_RTC"
-.LASF810:
+.LASF808:
 	.string	"pBbtHeader"
 .LASF46:
 	.string	"bi_memsize"
 .LASF47:
 	.string	"bi_flashstart"
-.LASF762:
+.LASF761:
 	.string	"minValidPageCount"
 .LASF232:
 	.string	"recv"
@@ -53952,11 +53989,11 @@ __func__.7632:
 	.string	"UCLASS_SYSCON"
 .LASF153:
 	.string	"UCLASS_DISPLAY"
-.LASF519:
+.LASF518:
 	.string	"g_max_erase_count"
-.LASF568:
+.LASF567:
 	.string	"flash_type"
-.LASF529:
+.LASF528:
 	.string	"g_recovery_ppa_tbl"
 .LASF71:
 	.string	"IRQ_STACK_START_IN"
@@ -53964,23 +54001,23 @@ __func__.7632:
 	.string	"bi_dram"
 .LASF191:
 	.string	"UCLASS_RKNAND"
-.LASF581:
+.LASF580:
 	.string	"die_index"
-.LASF805:
+.LASF803:
 	.string	"ver2"
 .LASF434:
 	.string	"gSysFreeQueue"
 .LASF159:
 	.string	"UCLASS_I2C_EEPROM"
-.LASF533:
+.LASF532:
 	.string	"g_nand_phy_info"
-.LASF555:
+.LASF554:
 	.string	"check_spare_buf"
 .LASF144:
 	.string	"UCLASS_PCI_EMUL"
 .LASF72:
 	.string	"fdt_header"
-.LASF586:
+.LASF585:
 	.string	"ftl_free"
 .LASF429:
 	.string	"g_MaxLpn"
@@ -53988,23 +54025,23 @@ __func__.7632:
 	.string	"bufferPageOffset"
 .LASF387:
 	.string	"reversed"
-.LASF507:
+.LASF506:
 	.string	"g_totle_write_sector"
 .LASF75:
 	.string	"off_dt_struct"
 .LASF417:
 	.string	"c_ftl_nand_max_vendor_blks"
-.LASF769:
+.LASF768:
 	.string	"prev_valid_page_count"
-.LASF874:
+.LASF872:
 	.string	"FtlPrintInfo2buf"
-.LASF480:
+.LASF479:
 	.string	"p_data_block_list_head"
 .LASF265:
 	.string	"NETLOOP_CONTINUE"
-.LASF807:
+.LASF805:
 	.string	"P2V_plane"
-.LASF486:
+.LASF485:
 	.string	"g_gc_temp_superblock"
 .LASF195:
 	.string	"UCLASS_SPI"
@@ -54012,7 +54049,7 @@ __func__.7632:
 	.string	"c_ftl_nand_max_map_blks"
 .LASF302:
 	.string	"BbtMap"
-.LASF744:
+.LASF743:
 	.string	"found_lpa"
 .LASF209:
 	.string	"UCLASS_VIDEO_CONSOLE"
@@ -54020,31 +54057,31 @@ __func__.7632:
 	.string	"last_refresh_read_count"
 .LASF207:
 	.string	"UCLASS_VIDEO"
-.LASF616:
+.LASF615:
 	.string	"current_ppa"
-.LASF852:
+.LASF850:
 	.string	"create_first_active_superblock"
 .LASF313:
 	.string	"pMapPpnTbl"
 .LASF269:
 	.string	"net_state"
-.LASF725:
+.LASF724:
 	.string	"num_page"
 .LASF425:
 	.string	"ftl_gc_temp_power_lost_recovery_flag"
-.LASF615:
+.LASF614:
 	.string	"totle_num"
-.LASF732:
+.LASF731:
 	.string	"Index"
-.LASF682:
+.LASF681:
 	.string	"next_free_active_page"
-.LASF607:
+.LASF606:
 	.string	"spperBlk"
 .LASF65:
 	.string	"IRQ_STACK_START"
 .LASF132:
 	.string	"verify"
-.LASF714:
+.LASF713:
 	.string	"ftl_set_blk_mode"
 .LASF266:
 	.string	"NETLOOP_RESTART"
@@ -54052,27 +54089,27 @@ __func__.7632:
 	.string	"uint8"
 .LASF353:
 	.string	"write_page_count"
-.LASF611:
+.LASF610:
 	.string	"Ftl_gc_temp_data_write_back"
 .LASF295:
 	.string	"erase_blk"
-.LASF723:
+.LASF722:
 	.string	"re_save_vpndata"
-.LASF463:
+.LASF462:
 	.string	"p_valid_page_count_check_table"
-.LASF502:
+.LASF501:
 	.string	"g_gc_free_blk_threshold"
-.LASF482:
+.LASF481:
 	.string	"g_num_free_superblocks"
 .LASF226:
 	.string	"s_addr"
-.LASF820:
+.LASF818:
 	.string	"re_save_bbmdata"
 .LASF200:
 	.string	"UCLASS_SYSRESET"
-.LASF628:
+.LASF627:
 	.string	"FtlGcUpdatePage"
-.LASF812:
+.LASF810:
 	.string	"FtlLoadFactoryBbt"
 .LASF289:
 	.string	"sec_per_blk"
@@ -54086,11 +54123,11 @@ __func__.7632:
 	.string	"UCLASS_CROS_EC"
 .LASF407:
 	.string	"c_ftl_nand_sec_pre_page_shift"
-.LASF789:
+.LASF790:
 	.string	"IsInFreeQueue"
 .LASF236:
 	.string	"index"
-.LASF746:
+.LASF745:
 	.string	"select_l2p_ram_region"
 .LASF335:
 	.string	"maxDieNum"
@@ -54098,29 +54135,29 @@ __func__.7632:
 	.string	"byte_per_sec"
 .LASF278:
 	.string	"p_data"
-.LASF528:
+.LASF527:
 	.string	"g_recovery_page_min_ver"
-.LASF571:
+.LASF570:
 	.string	"block_size"
 .LASF90:
 	.string	"ih_load"
-.LASF836:
+.LASF834:
 	.string	"FtlProgPages"
-.LASF665:
+.LASF664:
 	.string	"error_flag"
 .LASF403:
 	.string	"c_ftl_nand_page_pre_blk"
-.LASF795:
+.LASF789:
 	.string	"blk_Id"
 .LASF213:
 	.string	"UCLASS_KEY"
-.LASF876:
+.LASF874:
 	.string	"memcpy"
 .LASF67:
 	.string	"_datarel_start_ofs"
 .LASF373:
 	.string	"List_Node"
-.LASF578:
+.LASF577:
 	.string	"p_die"
 .LASF314:
 	.string	"in_gc_mode"
@@ -54132,15 +54169,15 @@ __func__.7632:
 	.string	"UCLASS_IRQ"
 .LASF6:
 	.string	"__u8"
-.LASF494:
+.LASF493:
 	.string	"g_gc_page_offset"
 .LASF240:
 	.string	"net_gateway"
-.LASF803:
+.LASF801:
 	.string	"ftl_cmp_data_ver"
 .LASF430:
 	.string	"g_VaildLpn"
-.LASF471:
+.LASF470:
 	.string	"p_vendor_block_valid_page_count"
 .LASF262:
 	.string	"net_ping_ip"
@@ -54148,41 +54185,41 @@ __func__.7632:
 	.string	"type"
 .LASF40:
 	.string	"lmb_region"
-.LASF633:
+.LASF632:
 	.string	"numREQ"
 .LASF34:
 	.string	"protect"
-.LASF856:
+.LASF854:
 	.string	"max_test_page_num"
-.LASF705:
+.LASF704:
 	.string	"blk_id"
 .LASF349:
 	.string	"GlobalDataVersion"
-.LASF794:
+.LASF793:
 	.string	"erase_flag"
 .LASF362:
 	.string	"last_refresh_data_times"
-.LASF708:
+.LASF707:
 	.string	"totleBlkNum"
-.LASF679:
+.LASF678:
 	.string	"saved_active_page"
-.LASF777:
+.LASF776:
 	.string	"pTmp"
-.LASF605:
+.LASF604:
 	.string	"add_count"
-.LASF547:
+.LASF546:
 	.string	"ftl_gc_temp_block_bops_scan_page_addr"
 .LASF394:
 	.string	"c_ftl_nand_type"
-.LASF774:
+.LASF773:
 	.string	"pHead"
-.LASF688:
+.LASF687:
 	.string	"recovery_flash_mode"
 .LASF138:
 	.string	"UCLASS_TEST"
-.LASF485:
+.LASF484:
 	.string	"g_buffer_superblock"
-.LASF650:
+.LASF649:
 	.string	"node_id"
 .LASF397:
 	.string	"c_ftl_nand_blks_per_die"
@@ -54194,7 +54231,7 @@ __func__.7632:
 	.string	"legacy_hdr_valid"
 .LASF203:
 	.string	"UCLASS_TPM"
-.LASF575:
+.LASF574:
 	.string	"read_req"
 .LASF432:
 	.string	"gBbtInfo"
@@ -54204,23 +54241,23 @@ __func__.7632:
 	.string	"sector_count"
 .LASF406:
 	.string	"c_ftl_nand_sec_pre_page"
-.LASF591:
+.LASF590:
 	.string	"mode"
-.LASF814:
+.LASF812:
 	.string	"FtlLoadBbt"
-.LASF561:
+.LASF560:
 	.string	"pvForm"
 .LASF323:
 	.string	"padding"
-.LASF460:
+.LASF459:
 	.string	"p_swl_mul_table"
-.LASF629:
+.LASF628:
 	.string	"src_ppa"
-.LASF683:
+.LASF682:
 	.string	"detected_active_page"
 .LASF389:
 	.string	"ftl_gc_page_item"
-.LASF549:
+.LASF548:
 	.string	"mem_malloc_start"
 .LASF210:
 	.string	"UCLASS_VIDEO_CRTC"
@@ -54228,127 +54265,125 @@ __func__.7632:
 	.string	"bi_ethspeed"
 .LASF98:
 	.string	"image_header_t"
-.LASF771:
+.LASF770:
 	.string	"pPrev"
-.LASF474:
+.LASF473:
 	.string	"g_totle_vendor_block"
-.LASF624:
+.LASF623:
 	.string	"superblock_id"
-.LASF595:
+.LASF594:
 	.string	"plane"
 .LASF11:
 	.string	"phys_addr_t"
 .LASF95:
 	.string	"ih_type"
-.LASF846:
+.LASF844:
 	.string	"sftl_init"
 .LASF2:
 	.string	"unsigned char"
-.LASF613:
+.LASF612:
 	.string	"FtlGcScanTempBlk"
 .LASF109:
 	.string	"legacy_hdr_os_copy"
-.LASF761:
+.LASF760:
 	.string	"vpcTbl"
 .LASF176:
 	.string	"UCLASS_PANEL_BACKLIGHT"
 .LASF339:
 	.string	"activeSuperblockId"
-.LASF804:
+.LASF802:
 	.string	"ver1"
 .LASF280:
 	.string	"nand_phy_info"
-.LASF760:
+.LASF759:
 	.string	"ftl_free_no_use_map_blk"
-.LASF806:
+.LASF804:
 	.string	"P2V_block_in_plane"
-.LASF556:
+.LASF555:
 	.string	"str1"
-.LASF557:
+.LASF556:
 	.string	"str2"
-.LASF719:
+.LASF718:
 	.string	"pMapHeader"
 .LASF140:
 	.string	"UCLASS_TEST_BUS"
-.LASF717:
+.LASF716:
 	.string	"FtlScanSysBlk"
 .LASF52:
 	.string	"bi_arm_freq"
-.LASF696:
+.LASF695:
 	.string	"lookup_ppa_ver"
-.LASF753:
+.LASF752:
 	.string	"region_num"
-.LASF476:
+.LASF475:
 	.string	"p_l2p_map_buf"
-.LASF488:
+.LASF487:
 	.string	"gp_last_act_superblock"
-.LASF871:
+.LASF869:
 	.string	"Ftl_log2"
-.LASF448:
+.LASF447:
 	.string	"p_sys_spare_buf"
 .LASF165:
 	.string	"UCLASS_LED"
-.LASF552:
+.LASF551:
 	.string	"p_current"
-.LASF647:
+.LASF646:
 	.string	"get_new_id"
 .LASF253:
 	.string	"net_rx_packet_len"
 .LASF255:
 	.string	"net_null_ethaddr"
-.LASF543:
+.LASF542:
 	.string	"g_ect_tbl_power_up_flush"
-.LASF597:
+.LASF596:
 	.string	"physical_block"
 .LASF32:
 	.string	"flash_id"
-.LASF839:
+.LASF837:
 	.string	"absolute_sector"
 .LASF222:
 	.string	"load_addr"
 .LASF347:
 	.string	"PowerLostTimes"
-.LASF501:
+.LASF500:
 	.string	"g_gc_bad_block_temp_tbl"
-.LASF886:
+.LASF884:
 	.string	"kfree"
-.LASF464:
+.LASF463:
 	.string	"p_blk_mode_table"
-.LASF776:
+.LASF775:
 	.string	"List_remove_node"
 .LASF291:
 	.string	"reserved_blk"
-.LASF734:
+.LASF733:
 	.string	"pBuf"
-.LASF792:
-	.string	"tmp_ec"
-.LASF484:
+.LASF483:
 	.string	"g_active_superblock"
-.LASF690:
+.LASF689:
 	.string	"recovery_super_page"
 .LASF437:
 	.string	"req_sys"
 .LASF381:
 	.string	"available_pages"
-.LASF800:
+.LASF798:
 	.string	"high"
-.LASF834:
+.LASF832:
 	.string	"nscts"
 .LASF410:
 	.string	"c_ftl_nand_reserved_blks"
-.LASF701:
+.LASF700:
 	.string	"FtlL2PDataInit"
 .LASF230:
 	.string	"init"
 .LASF215:
 	.string	"UCLASS_CHARGE_DISPLAY"
-.LASF573:
+.LASF572:
 	.string	"check"
 .LASF145:
 	.string	"UCLASS_USB_EMUL"
-.LASF798:
+.LASF796:
 	.string	"FtlFreeSysBlkQueueInit"
-.LASF678:
+.LASF677:
 	.string	"FtlRecoverySuperblock"
 .LASF396:
 	.string	"c_ftl_nand_planes_per_die"
@@ -54358,23 +54393,23 @@ __func__.7632:
 	.string	"ecc_bits"
 .LASF293:
 	.string	"nand_ops"
-.LASF602:
+.LASF601:
 	.string	"tmp_blk"
-.LASF523:
+.LASF522:
 	.string	"g_gc_head_data_block"
-.LASF829:
+.LASF827:
 	.string	"FtlWrite"
 .LASF182:
 	.string	"UCLASS_PINCTRL"
-.LASF832:
+.LASF830:
 	.string	"num_lpa"
-.LASF868:
+.LASF866:
 	.string	"blkNum"
 .LASF364:
 	.string	"SlcPartLbaEndSector"
 .LASF84:
 	.string	"fdt32_t"
-.LASF469:
+.LASF468:
 	.string	"g_totle_map_block"
 .LASF375:
 	.string	"value"
@@ -54384,11 +54419,11 @@ __func__.7632:
 	.string	"image_len"
 .LASF441:
 	.string	"req_gc"
-.LASF855:
+.LASF853:
 	.string	"is_sys_blk"
 .LASF42:
 	.string	"memory"
-.LASF822:
+.LASF820:
 	.string	"bitmap"
 .LASF319:
 	.string	"ftl_ect_tbl_info"
@@ -54396,53 +54431,53 @@ __func__.7632:
 	.string	"UCLASS_USB_DEV_GENERIC"
 .LASF212:
 	.string	"UCLASS_FG"
-.LASF756:
+.LASF755:
 	.string	"lastMapBlk"
 .LASF370:
 	.string	"totle_write_sector"
-.LASF522:
+.LASF521:
 	.string	"g_ftl_nand_free_count"
-.LASF627:
+.LASF626:
 	.string	"p_gc_page"
 .LASF20:
 	.string	"errno"
-.LASF532:
+.LASF531:
 	.string	"gNandPhyInfo"
-.LASF862:
+.LASF860:
 	.string	"ven_blk"
 .LASF30:
 	.string	"size"
 .LASF244:
 	.string	"net_hostname"
-.LASF773:
+.LASF772:
 	.string	"List_pop_head_node"
 .LASF308:
 	.string	"BlkNum"
-.LASF851:
+.LASF849:
 	.string	"sys_bad_block_cnt"
-.LASF599:
+.LASF598:
 	.string	"p_dataHeader"
-.LASF781:
+.LASF780:
 	.string	"tmp_id"
-.LASF603:
+.LASF602:
 	.string	"FtlReadRefresh"
-.LASF646:
+.LASF645:
 	.string	"free_blk_index"
-.LASF821:
+.LASF819:
 	.string	"FtlBbt2Bitmap"
-.LASF663:
+.LASF662:
 	.string	"ftl_check_vpc"
 .LASF108:
 	.string	"legacy_hdr_os"
 .LASF100:
 	.string	"image_start"
-.LASF580:
+.LASF579:
 	.string	"page_index"
 .LASF18:
 	.string	"uint8_t"
 .LASF55:
 	.string	"bi_bootflags"
-.LASF487:
+.LASF486:
 	.string	"g_gc_superblock"
 .LASF303:
 	.string	"ftl_sys_info"
@@ -54452,13 +54487,13 @@ __func__.7632:
 	.string	"front"
 .LASF175:
 	.string	"UCLASS_PANEL"
-.LASF472:
+.LASF471:
 	.string	"p_vendor_block_ver_table"
 .LASF204:
 	.string	"UCLASS_USB"
-.LASF517:
+.LASF516:
 	.string	"g_totle_slc_erase_count"
-.LASF461:
+.LASF460:
 	.string	"g_totle_swl_count"
 .LASF139:
 	.string	"UCLASS_TEST_FDT"
@@ -54468,27 +54503,27 @@ __func__.7632:
 	.string	"gcTempSuperblockId"
 .LASF238:
 	.string	"eth_current"
-.LASF767:
+.LASF766:
 	.string	"node_valid_page_count"
 .LASF53:
 	.string	"bi_dsp_freq"
 .LASF5:
 	.string	"uchar"
-.LASF669:
+.LASF668:
 	.string	"pages"
 .LASF89:
 	.string	"ih_size"
-.LASF570:
+.LASF569:
 	.string	"addr"
 .LASF142:
 	.string	"UCLASS_SPI_EMUL"
-.LASF864:
+.LASF862:
 	.string	"FtlMemInit"
-.LASF819:
+.LASF817:
 	.string	"write_count"
-.LASF664:
+.LASF663:
 	.string	"prev_ppa"
-.LASF589:
+.LASF588:
 	.string	"FlashTestBlk"
 .LASF179:
 	.string	"UCLASS_PCI_GENERIC"
@@ -54496,15 +54531,15 @@ __func__.7632:
 	.string	"bi_sramstart"
 .LASF66:
 	.string	"FIQ_STACK_START"
-.LASF873:
+.LASF871:
 	.string	"rknand_proc_ftlread"
 .LASF228:
 	.string	"enetaddr"
 .LASF181:
 	.string	"UCLASS_PINCONFIG"
-.LASF742:
+.LASF741:
 	.string	"l2p_region_id"
-.LASF554:
+.LASF553:
 	.string	"check_buf"
 .LASF190:
 	.string	"UCLASS_RESET"
@@ -54518,47 +54553,49 @@ __func__.7632:
 	.string	"slc_erase_count"
 .LASF60:
 	.string	"bi_busfreq"
-.LASF770:
+.LASF769:
 	.string	"prev_multiplier_value"
-.LASF497:
+.LASF496:
 	.string	"g_gc_next_blk"
-.LASF516:
+.LASF515:
 	.string	"g_min_erase_count"
 .LASF149:
 	.string	"UCLASS_BLK"
-.LASF546:
+.LASF545:
 	.string	"gc_discard_updated"
-.LASF738:
+.LASF737:
 	.string	"FtlVendorPartWrite"
-.LASF622:
+.LASF621:
 	.string	"FtlGcFreeTempBlock"
 .LASF248:
 	.string	"net_ip"
 .LASF229:
 	.string	"iobase"
-.LASF658:
+.LASF657:
 	.string	"GetFreeBlockMinEraseCount"
+.LASF788:
+	.string	"remalloc"
 .LASF336:
 	.string	"activeFlashMode"
 .LASF92:
 	.string	"ih_dcrc"
 .LASF35:
 	.string	"flash_info_t"
-.LASF656:
+.LASF655:
 	.string	"GetFreeBlockMaxEraseCount"
-.LASF712:
+.LASF711:
 	.string	"sblk"
-.LASF755:
+.LASF754:
 	.string	"ftl_map_blk_gc"
-.LASF878:
+.LASF876:
 	.string	"printf"
 .LASF59:
 	.string	"bi_intfreq"
 .LASF223:
 	.string	"save_addr"
-.LASF538:
+.LASF537:
 	.string	"TotleReadBufferCount1"
-.LASF567:
+.LASF566:
 	.string	"request"
 .LASF330:
 	.string	"regionId"
@@ -54570,35 +54607,35 @@ __func__.7632:
 	.string	"gc_page_count"
 .LASF49:
 	.string	"bi_flashoffset"
-.LASF541:
+.LASF540:
 	.string	"TotleReadBufferMatchCount"
 .LASF438:
 	.string	"req_read"
-.LASF752:
+.LASF751:
 	.string	"Ftl_write_map_blk_to_last_page"
-.LASF466:
+.LASF465:
 	.string	"p_map_block_valid_page_count"
 .LASF167:
 	.string	"UCLASS_MAILBOX"
-.LASF793:
+.LASF792:
 	.string	"FtlFreeSysBlkQueueIn"
 .LASF366:
 	.string	"readErrorCount"
-.LASF588:
+.LASF587:
 	.string	"sftl_gc"
-.LASF797:
+.LASF795:
 	.string	"FtlFreeSysBlkQueueEmpty"
-.LASF763:
+.LASF762:
 	.string	"load_l2p_region"
-.LASF640:
+.LASF639:
 	.string	"p_superblock"
 .LASF301:
 	.string	"fBbtBlk"
 .LASF77:
 	.string	"off_mem_rsvmap"
-.LASF445:
+.LASF444:
 	.string	"p_sys_data_buf"
-.LASF885:
+.LASF883:
 	.string	"l2p_addr_tran"
 .LASF164:
 	.string	"UCLASS_KEYBOARD"
@@ -54606,69 +54643,69 @@ __func__.7632:
 	.string	"page_per_slc_blk"
 .LASF398:
 	.string	"c_ftl_nand_blks_per_die_shift"
-.LASF739:
+.LASF738:
 	.string	"log2phys"
-.LASF478:
+.LASF477:
 	.string	"p_data_block_list_table"
 .LASF171:
 	.string	"UCLASS_MOD_EXP"
-.LASF645:
+.LASF644:
 	.string	"num_bad_block"
 .LASF85:
 	.string	"image_header"
-.LASF702:
+.LASF701:
 	.string	"FtlLoadVonderInfo"
-.LASF614:
+.LASF613:
 	.string	"pSuperblock"
-.LASF535:
+.LASF534:
 	.string	"ftl_temp_buf"
 .LASF384:
 	.string	"flash_mode"
-.LASF514:
+.LASF513:
 	.string	"g_totle_mlc_erase_count"
 .LASF79:
 	.string	"last_comp_version"
 .LASF415:
 	.string	"c_ftl_nand_map_blks_per_plane"
-.LASF811:
+.LASF809:
 	.string	"re_try_next_blk"
 .LASF56:
 	.string	"bi_ip_addr"
-.LASF579:
+.LASF578:
 	.string	"block_index"
 .LASF36:
 	.string	"flash_info"
-.LASF496:
+.LASF495:
 	.string	"g_gc_cur_blk_max_valid_pages"
 .LASF16:
 	.string	"ushort"
-.LASF764:
+.LASF763:
 	.string	"phyAddr"
 .LASF73:
 	.string	"magic"
-.LASF791:
-	.string	"tmp_blk_id"
-.LASF877:
+.LASF875:
 	.string	"memset"
 .LASF242:
 	.string	"net_dns_server"
-.LASF562:
+.LASF561:
 	.string	"ftl_memset"
-.LASF831:
+.LASF829:
 	.string	"end_lpa"
-.LASF736:
+.LASF882:
+	.string	"/home/ldq/rk-linux/u-boot-debug"
+.LASF735:
 	.string	"result"
-.LASF626:
+.LASF625:
 	.string	"scan_page_num"
 .LASF267:
 	.string	"NETLOOP_SUCCESS"
 .LASF27:
 	.string	"name"
-.LASF512:
+.LASF511:
 	.string	"g_totle_cache_write_count"
-.LASF768:
+.LASF767:
 	.string	"node_multiplier_value"
-.LASF759:
+.LASF758:
 	.string	"blk_index"
 .LASF69:
 	.string	"_datarellocal_start_ofs"
@@ -54680,31 +54717,31 @@ __func__.7632:
 	.string	"fit_hdr_setup"
 .LASF150:
 	.string	"UCLASS_CLK"
-.LASF687:
+.LASF686:
 	.string	"detected_error_page"
 .LASF129:
 	.string	"initrd_end"
-.LASF620:
+.LASF619:
 	.string	"read_super_page"
 .LASF219:
 	.string	"monitor_flash_len"
-.LASF621:
+.LASF620:
 	.string	"FtlGcPageVarInit"
-.LASF823:
+.LASF821:
 	.string	"FtlBbtInfoPrint"
-.LASF530:
+.LASF529:
 	.string	"c_mlc_erase_count_value"
-.LASF551:
+.LASF550:
 	.string	"mem_malloc_brk"
-.LASF483:
+.LASF482:
 	.string	"g_num_data_superblocks"
-.LASF754:
+.LASF753:
 	.string	"blkTbl"
 .LASF348:
 	.string	"mlc_erase_count"
 .LASF12:
 	.string	"phys_size_t"
-.LASF716:
+.LASF715:
 	.string	"FtlLoadEctTbl"
 .LASF62:
 	.string	"bi_boot_params"
@@ -54712,11 +54749,11 @@ __func__.7632:
 	.string	"UCLASS_RC"
 .LASF51:
 	.string	"bi_sramsize"
-.LASF881:
+.LASF879:
 	.string	"sprintf"
-.LASF608:
+.LASF607:
 	.string	"FtlGcMarkBadPhyBlk"
-.LASF642:
+.LASF641:
 	.string	"allocate_new_data_superblock"
 .LASF13:
 	.string	"sizetype"
@@ -54728,9 +54765,9 @@ __func__.7632:
 	.string	"GlobalSysVersion"
 .LASF329:
 	.string	"ftl_map_blk_header"
-.LASF600:
+.LASF599:
 	.string	"gc_next_superblock"
-.LASF813:
+.LASF811:
 	.string	"blkAddr"
 .LASF193:
 	.string	"UCLASS_SCSI"
@@ -54740,21 +54777,21 @@ __func__.7632:
 	.string	"signed char"
 .LASF250:
 	.string	"net_tx_packet"
-.LASF697:
+.LASF696:
 	.string	"current_ppa_ver"
-.LASF785:
+.LASF784:
 	.string	"tmp_multiplier_value"
-.LASF566:
+.LASF565:
 	.string	"FlashEraseBlocks"
 .LASF33:
 	.string	"start"
-.LASF830:
+.LASF828:
 	.string	"start_lpa"
-.LASF553:
+.LASF552:
 	.string	"current"
 .LASF218:
 	.string	"LOGF_MAX_CATEGORIES"
-.LASF518:
+.LASF517:
 	.string	"g_totle_sys_slc_erase_count"
 .LASF300:
 	.string	"prev_id"
@@ -54766,37 +54803,37 @@ __func__.7632:
 	.string	"count"
 .LASF146:
 	.string	"UCLASS_SIMPLE_BUS"
-.LASF539:
+.LASF538:
 	.string	"TotleReadBufferCount2"
-.LASF540:
+.LASF539:
 	.string	"TotleReadBufferCount3"
-.LASF455:
+.LASF454:
 	.string	"c_gc_page_buf_num"
-.LASF720:
+.LASF719:
 	.string	"FtlVpcTblFlush"
 .LASF189:
 	.string	"UCLASS_REMOTEPROC"
-.LASF743:
+.LASF742:
 	.string	"lpn_index"
 .LASF118:
 	.string	"fit_hdr_fdt"
-.LASF632:
+.LASF631:
 	.string	"FtlGcBufAlloc"
-.LASF569:
+.LASF568:
 	.string	"num_req"
-.LASF779:
+.LASF778:
 	.string	"node_erase_count"
 .LASF254:
 	.string	"net_bcast_ethaddr"
-.LASF737:
+.LASF736:
 	.string	"ppn_index"
-.LASF796:
+.LASF794:
 	.string	"FtlFreeSysBlkQueueFull"
 .LASF133:
 	.string	"state"
 .LASF48:
 	.string	"bi_flashsize"
-.LASF747:
+.LASF746:
 	.string	"target_region"
 .LASF19:
 	.string	"__be32"
@@ -54806,31 +54843,31 @@ __func__.7632:
 	.string	"c_ftl_vendor_part_size"
 .LASF251:
 	.string	"net_rx_packets"
-.LASF827:
+.LASF825:
 	.string	"sftl_read"
-.LASF452:
+.LASF451:
 	.string	"p_gc_spare_buf"
 .LASF151:
 	.string	"UCLASS_CPU"
-.LASF467:
+.LASF466:
 	.string	"p_map_block_ver_table"
-.LASF456:
+.LASF455:
 	.string	"g_gc_num_req"
-.LASF449:
+.LASF448:
 	.string	"p_io_data_buf_0"
-.LASF450:
+.LASF449:
 	.string	"p_io_data_buf_1"
 .LASF68:
 	.string	"_datarelrolocal_start_ofs"
-.LASF684:
+.LASF683:
 	.string	"mlc_detected_active_page"
-.LASF854:
+.LASF852:
 	.string	"FtlLowFormatEraseBlock"
 .LASF317:
 	.string	"region_id"
 .LASF326:
 	.string	"sysBlksPerPlane"
-.LASF817:
+.LASF815:
 	.string	"FtlBbtMemInit"
 .LASF309:
 	.string	"maxBlkNum"
@@ -54838,25 +54875,25 @@ __func__.7632:
 	.string	"c_ftl_nand_die_num"
 .LASF286:
 	.string	"page_per_blk"
-.LASF722:
+.LASF721:
 	.string	"prog_error_count"
 .LASF372:
 	.string	"progErrorCount"
 .LASF259:
 	.string	"net_boot_file_name"
-.LASF495:
+.LASF494:
 	.string	"g_gc_cur_blk_valid_pages"
 .LASF233:
 	.string	"halt"
-.LASF654:
+.LASF653:
 	.string	"maxFreeBlockEraseCount"
 .LASF86:
 	.string	"ih_magic"
-.LASF582:
+.LASF581:
 	.string	"block_in_die"
-.LASF457:
+.LASF456:
 	.string	"gp_ect_tbl_info"
-.LASF655:
+.LASF654:
 	.string	"minDataBlockEraseCount"
 .LASF17:
 	.string	"ulong"
@@ -54868,41 +54905,41 @@ __func__.7632:
 	.string	"__u32"
 .LASF249:
 	.string	"net_server_ip"
-.LASF786:
+.LASF785:
 	.string	"INSERT_DATA_LIST"
 .LASF206:
 	.string	"UCLASS_USB_HUB"
-.LASF826:
+.LASF824:
 	.string	"sftl_write"
-.LASF444:
+.LASF443:
 	.string	"p_plane_order_table"
-.LASF782:
+.LASF781:
 	.string	"insert_data_list"
 .LASF70:
 	.string	"_datarelro_start_ofs"
-.LASF619:
+.LASF618:
 	.string	"ReInit"
 .LASF172:
 	.string	"UCLASS_MTD"
 .LASF134:
 	.string	"bootm_headers_t"
-.LASF730:
+.LASF729:
 	.string	"ec_mod_count"
-.LASF565:
+.LASF564:
 	.string	"spare"
-.LASF527:
+.LASF526:
 	.string	"g_recovery_page_num"
 .LASF15:
 	.string	"long int"
-.LASF668:
+.LASF667:
 	.string	"req_temp"
 .LASF141:
 	.string	"UCLASS_TEST_PROBE"
-.LASF883:
+.LASF881:
 	.string	"drivers/rkflash/rksftl/rk_sftl.c"
-.LASF660:
+.LASF659:
 	.string	"FtlSysBlkInit"
-.LASF524:
+.LASF523:
 	.string	"g_gc_head_data_block_count"
 .LASF297:
 	.string	"read_page"
@@ -54914,73 +54951,73 @@ __func__.7632:
 	.string	"UCLASS_DMA"
 .LASF426:
 	.string	"g_GlobalSysVersion"
-.LASF511:
+.LASF510:
 	.string	"g_tmp_data_superblock_id"
-.LASF872:
+.LASF870:
 	.string	"limit"
-.LASF661:
+.LASF660:
 	.string	"ftl_scan_all_data"
 .LASF331:
 	.string	"ftl_sys_blk_header"
 .LASF393:
 	.string	"flag"
-.LASF470:
+.LASF469:
 	.string	"p_vendor_block_table"
-.LASF680:
+.LASF679:
 	.string	"saved_active_plane"
-.LASF748:
+.LASF747:
 	.string	"hit_count"
-.LASF715:
+.LASF714:
 	.string	"FtlGcReFreshBadBlk"
 .LASF380:
 	.string	"current_page"
 .LASF201:
 	.string	"UCLASS_THERMAL"
-.LASF815:
+.LASF813:
 	.string	"FtlBbtCalcTotleCnt"
-.LASF787:
+.LASF786:
 	.string	"INSERT_FREE_LIST"
-.LASF563:
+.LASF562:
 	.string	"FlashGetBadBlockList"
-.LASF695:
+.LASF694:
 	.string	"prev_ppa_ver"
 .LASF246:
 	.string	"net_ethaddr"
 .LASF225:
 	.string	"in_addr"
-.LASF845:
+.LASF843:
 	.string	"FtlSysFlush"
 .LASF99:
 	.string	"image_info"
 .LASF88:
 	.string	"ih_time"
-.LASF610:
+.LASF609:
 	.string	"FtlGcRefreshBlock"
 .LASF334:
 	.string	"ftl_sys_save_info"
-.LASF772:
+.LASF771:
 	.string	"List_get_gc_head_node"
 .LASF399:
 	.string	"c_ftl_nand_planes_num"
-.LASF809:
+.LASF807:
 	.string	"FtlMakeBbt"
 .LASF37:
 	.string	"long double"
-.LASF481:
+.LASF480:
 	.string	"p_data_block_list_tail"
-.LASF493:
+.LASF492:
 	.string	"g_gc_blk_num"
 .LASF81:
 	.string	"size_dt_strings"
 .LASF271:
 	.string	"uint16"
-.LASF606:
+.LASF605:
 	.string	"FtlGcFreeBadSuperBlk"
 .LASF106:
 	.string	"image_info_t"
-.LASF704:
+.LASF703:
 	.string	"pMapBlockInfo"
-.LASF618:
+.LASF617:
 	.string	"error_phy_page"
 .LASF3:
 	.string	"long unsigned int"
@@ -55000,17 +55037,17 @@ __func__.7632:
 	.string	"net_server_ethaddr"
 .LASF208:
 	.string	"UCLASS_VIDEO_BRIDGE"
-.LASF692:
+.LASF691:
 	.string	"function_exit"
 .LASF135:
 	.string	"images"
-.LASF525:
+.LASF524:
 	.string	"g_gc_skip_write_count"
-.LASF585:
+.LASF584:
 	.string	"rknand_print_hex"
-.LASF636:
+.LASF635:
 	.string	"FtlGcBufInit"
-.LASF446:
+.LASF445:
 	.string	"p_sys_data_buf_1"
 .LASF14:
 	.string	"char"
@@ -55018,11 +55055,11 @@ __func__.7632:
 	.string	"pBlkTbl"
 .LASF113:
 	.string	"fit_uname_os"
-.LASF500:
+.LASF499:
 	.string	"g_gc_bad_block_gc_index"
-.LASF693:
+.LASF692:
 	.string	"last_page_version"
-.LASF802:
+.LASF800:
 	.string	"pagePreBlk"
 .LASF281:
 	.string	"nand_type"
@@ -55030,15 +55067,15 @@ __func__.7632:
 	.string	"fit_hdr_os"
 .LASF283:
 	.string	"plane_per_die"
-.LASF490:
+.LASF489:
 	.string	"g_sys_ext_data"
 .LASF272:
 	.string	"uint32"
-.LASF564:
+.LASF563:
 	.string	"table"
 .LASF299:
 	.string	"page"
-.LASF643:
+.LASF642:
 	.string	"allocate_data_superblock"
 .LASF316:
 	.string	"ftl_l2p_ram_map_info"
@@ -55048,75 +55085,75 @@ __func__.7632:
 	.string	"net_loop_state"
 .LASF433:
 	.string	"gSysInfo"
-.LASF630:
+.LASF629:
 	.string	"prev_superblock_id"
 .LASF196:
 	.string	"UCLASS_SPMI"
-.LASF757:
+.LASF756:
 	.string	"minValidPageIndex"
-.LASF842:
+.LASF840:
 	.string	"last_lpa_nscts"
 .LASF194:
 	.string	"UCLASS_SERIAL"
-.LASF710:
+.LASF709:
 	.string	"FtlLoadSysInfo"
 .LASF440:
 	.string	"req_erase"
 .LASF320:
 	.string	"hash"
-.LASF545:
+.LASF544:
 	.string	"check_vpc_table"
 .LASF180:
 	.string	"UCLASS_PHY"
 .LASF54:
 	.string	"bi_ddr_freq"
-.LASF859:
+.LASF857:
 	.string	"test_mode"
-.LASF828:
+.LASF826:
 	.string	"FtlDiscard"
-.LASF671:
+.LASF670:
 	.string	"FtlGcPageRecovery"
 .LASF105:
 	.string	"arch"
-.LASF510:
+.LASF509:
 	.string	"g_totle_read_page_count"
-.LASF711:
+.LASF710:
 	.string	"ftl_get_blk_mode"
-.LASF741:
+.LASF740:
 	.string	"ram_region_id"
 .LASF435:
 	.string	"gL2pMapInfo"
 .LASF322:
 	.string	"lastEc"
-.LASF843:
+.LASF841:
 	.string	"sector"
-.LASF558:
+.LASF557:
 	.string	"ftl_memcmp"
-.LASF468:
+.LASF467:
 	.string	"p_map_region_ppn_table"
 .LASF120:
 	.string	"fit_noffset_fdt"
-.LASF867:
+.LASF865:
 	.string	"FtlSysBlkNumInit"
-.LASF672:
+.LASF671:
 	.string	"Ftl_save_ext_data"
 .LASF116:
 	.string	"fit_uname_rd"
-.LASF649:
+.LASF648:
 	.string	"GetSwlReplaceBlock"
 .LASF359:
 	.string	"max_erase_count"
-.LASF475:
+.LASF474:
 	.string	"p_l2p_ram_map"
-.LASF634:
+.LASF633:
 	.string	"req_num"
 .LASF115:
 	.string	"fit_hdr_rd"
 .LASF268:
 	.string	"NETLOOP_FAIL"
-.LASF824:
+.LASF822:
 	.string	"FtlBbmIsBadBlock"
-.LASF667:
+.LASF666:
 	.string	"FtlSuperblockPowerLostFix"
 .LASF157:
 	.string	"UCLASS_FIRMWARE"
@@ -55124,13 +55161,13 @@ __func__.7632:
 	.string	"fit_noffset_setup"
 .LASF401:
 	.string	"c_ftl_nand_ext_blk_pre_plane"
-.LASF550:
+.LASF549:
 	.string	"mem_malloc_end"
-.LASF451:
+.LASF450:
 	.string	"p_io_spare_buf"
 .LASF185:
 	.string	"UCLASS_POWER_DOMAIN"
-.LASF520:
+.LASF519:
 	.string	"g_in_gc_progress"
 .LASF168:
 	.string	"UCLASS_MASS_STORAGE"
@@ -55140,7 +55177,7 @@ __func__.7632:
 	.string	"UCLASS_NORTHBRIDGE"
 .LASF422:
 	.string	"c_ftl_nand_data_blks_per_plane"
-.LASF617:
+.LASF616:
 	.string	"page_count"
 .LASF298:
 	.string	"ftl_bbt_info"
@@ -55148,49 +55185,47 @@ __func__.7632:
 	.string	"UCLASS_I2C_GENERIC"
 .LASF231:
 	.string	"send"
-.LASF531:
+.LASF530:
 	.string	"g_power_lost_recovery_flag"
-.LASF592:
+.LASF591:
 	.string	"numPages"
-.LASF447:
+.LASF446:
 	.string	"p_vendor_data_buf"
 .LASF354:
 	.string	"read_page_count"
 .LASF234:
 	.string	"write_hwaddr"
-.LASF726:
+.LASF725:
 	.string	"FtlMapBlkWriteDump_data"
-.LASF835:
+.LASF833:
 	.string	"FtlCacheWriteBack"
-.LASF700:
+.LASF699:
 	.string	"FtlLoadMapInfo"
-.LASF808:
+.LASF806:
 	.string	"V2P_block"
-.LASF721:
+.LASF720:
 	.string	"pSysHeader"
-.LASF673:
+.LASF672:
 	.string	"SupperBlkListInit"
-.LASF707:
+.LASF706:
 	.string	"ppnTbl"
-.LASF847:
+.LASF845:
 	.string	"pNand"
-.LASF559:
+.LASF558:
 	.string	"ftl_memcpy"
 .LASF346:
 	.string	"PowerOnTimes"
-.LASF505:
+.LASF504:
 	.string	"g_totle_gc_page_count"
 .LASF24:
 	.string	"_binary_u_boot_bin_start"
-.LASF674:
+.LASF673:
 	.string	"num_data_node"
 .LASF400:
 	.string	"c_ftl_nand_blk_pre_plane"
-.LASF884:
-	.string	"/home/ldq/rk-linux/u-boot-release"
 .LASF64:
 	.string	"bd_t"
-.LASF706:
+.LASF705:
 	.string	"lastWritePage"
 .LASF91:
 	.string	"ih_ep"
@@ -55200,7 +55235,7 @@ __func__.7632:
 	.string	"fit_uname_fdt"
 .LASF187:
 	.string	"UCLASS_RAM"
-.LASF675:
+.LASF674:
 	.string	"num_free_node"
 .LASF379:
 	.string	"ftl_superblock_info"
@@ -55208,43 +55243,41 @@ __func__.7632:
 	.string	"ft_addr"
 .LASF357:
 	.string	"sys_slc_erase_count"
-.LASF513:
+.LASF512:
 	.string	"g_totle_l2p_write_count"
 .LASF220:
 	.string	"__dtb_dt_begin"
 .LASF217:
 	.string	"UCLASS_INVALID"
-.LASF443:
-	.string	"g_req_cache"
-.LASF594:
+.LASF593:
 	.string	"gc_blk"
 .LASF277:
 	.string	"page_addr"
-.LASF865:
+.LASF863:
 	.string	"mem_size"
-.LASF858:
+.LASF856:
 	.string	"test_page_step"
-.LASF689:
+.LASF688:
 	.string	"read_super_page_end"
 .LASF368:
 	.string	"refresh_enable_mode"
-.LASF848:
+.LASF846:
 	.string	"load_bbt"
-.LASF861:
+.LASF859:
 	.string	"IsBlkInVendorPart"
 .LASF402:
 	.string	"c_ftl_nand_bbm_buf_size"
-.LASF783:
+.LASF782:
 	.string	"node_data_count"
-.LASF583:
+.LASF582:
 	.string	"width"
 .LASF39:
 	.string	"base"
-.LASF887:
+.LASF885:
 	.string	"sftl_get_density"
-.LASF840:
+.LASF838:
 	.string	"first_lpa_sctidx"
-.LASF590:
+.LASF589:
 	.string	"rk_ftl_garbage_collect"
 .LASF328:
 	.string	"lastPpa"
@@ -55252,19 +55285,19 @@ __func__.7632:
 	.string	"fit_uname_cfg"
 .LASF344:
 	.string	"gcTempPageOffset"
-.LASF637:
+.LASF636:
 	.string	"decrement_vpc_count"
 .LASF386:
 	.string	"dump_writed"
-.LASF749:
+.LASF748:
 	.string	"flush_l2p_region"
 .LASF130:
 	.string	"cmdline_start"
-.LASF536:
+.LASF535:
 	.string	"DeviceCapacity"
 .LASF355:
 	.string	"l2p_write_count"
-.LASF548:
+.LASF547:
 	.string	"gc_ink_free_return_value"
 .LASF358:
 	.string	"discard_page_count"
@@ -55276,45 +55309,45 @@ __func__.7632:
 	.string	"long long unsigned int"
 .LASF274:
 	.string	"int16"
-.LASF849:
+.LASF847:
 	.string	"ftl_low_format"
-.LASF735:
+.LASF734:
 	.string	"offset"
-.LASF504:
+.LASF503:
 	.string	"g_gc_blk_index"
 .LASF439:
 	.string	"req_prgm"
 .LASF436:
 	.string	"gVendorBlkInfo"
-.LASF677:
+.LASF676:
 	.string	"FtlPowerLostRecovery"
-.LASF462:
+.LASF461:
 	.string	"p_valid_page_count_table"
-.LASF703:
+.LASF702:
 	.string	"FtlMapTblRecovery"
 .LASF156:
 	.string	"UCLASS_GPIO"
-.LASF870:
+.LASF868:
 	.string	"debug_flag"
-.LASF498:
+.LASF497:
 	.string	"g_gc_next_blk_1"
 .LASF76:
 	.string	"off_dt_strings"
 .LASF376:
 	.string	"sys_blk_queue"
-.LASF648:
+.LASF647:
 	.string	"free_data_superblock"
-.LASF860:
+.LASF858:
 	.string	"re_test_next_page"
 .LASF61:
 	.string	"bi_arch_number"
-.LASF750:
+.LASF749:
 	.string	"FtlMapWritePage"
-.LASF784:
+.LASF783:
 	.string	"tmp_data_count"
 .LASF26:
 	.string	"ide_bus_offset"
-.LASF740:
+.LASF739:
 	.string	"action"
 .LASF408:
 	.string	"c_ftl_nand_byte_pre_page"
@@ -55322,11 +55355,11 @@ __func__.7632:
 	.string	"UCLASS_COUNT"
 .LASF174:
 	.string	"UCLASS_NVME"
-.LASF644:
+.LASF643:
 	.string	"new_id"
 .LASF345:
 	.string	"cache_write_count"
-.LASF641:
+.LASF640:
 	.string	"new_ppa"
 .LASF258:
 	.string	"net_restart_wrap"
@@ -55346,41 +55379,41 @@ __func__.7632:
 	.string	"totleEc"
 .LASF38:
 	.string	"lmb_property"
-.LASF458:
+.LASF457:
 	.string	"g_ect_tbl_info_size"
 .LASF338:
 	.string	"gcTempFlashMode"
 .LASF431:
 	.string	"g_MaxLbn"
-.LASF534:
+.LASF533:
 	.string	"g_nand_ops"
-.LASF584:
+.LASF583:
 	.string	"ftl_malloc"
-.LASF841:
+.LASF839:
 	.string	"first_lpa_nscts"
 .LASF183:
 	.string	"UCLASS_PMIC"
 .LASF318:
 	.string	"L2PMap"
-.LASF766:
+.LASF765:
 	.string	"prev_node_id"
-.LASF454:
+.LASF453:
 	.string	"gp_gc_page_buf_info"
-.LASF509:
+.LASF508:
 	.string	"g_totle_discard_page_count"
-.LASF657:
+.LASF656:
 	.string	"max_ec"
-.LASF537:
+.LASF536:
 	.string	"gFtlInitStatus"
 .LASF9:
 	.string	"long long int"
-.LASF459:
+.LASF458:
 	.string	"p_erase_count_table"
-.LASF825:
+.LASF823:
 	.string	"FtlBbmMapBadBlock"
 .LASF427:
 	.string	"g_GlobalDataVersion"
-.LASF718:
+.LASF717:
 	.string	"block_in_plane"
 .LASF128:
 	.string	"initrd_start"
@@ -55388,43 +55421,43 @@ __func__.7632:
 	.string	"g_MaxLbaSector"
 .LASF382:
 	.string	"current_plane"
-.LASF880:
+.LASF878:
 	.string	"free"
 .LASF383:
 	.string	"num_planes"
-.LASF801:
+.LASF799:
 	.string	"spareBuf"
-.LASF731:
+.LASF730:
 	.string	"FtlVendorPartRead"
-.LASF724:
+.LASF723:
 	.string	"FtlWriteDump_data"
 .LASF197:
 	.string	"UCLASS_SPI_FLASH"
 .LASF202:
 	.string	"UCLASS_TIMER"
-.LASF799:
+.LASF797:
 	.string	"FtlGetLastWrittenPage"
-.LASF662:
+.LASF661:
 	.string	"pDataHeader"
-.LASF542:
+.LASF541:
 	.string	"power_up_flag"
 .LASF365:
 	.string	"inkDie_write_and_check_en"
 .LASF413:
 	.string	"c_ftl_nand_l2pmap_ram_region_num"
-.LASF844:
+.LASF842:
 	.string	"sftl_deinit"
-.LASF816:
+.LASF814:
 	.string	"totle_count"
 .LASF282:
 	.string	"die_num"
-.LASF751:
+.LASF750:
 	.string	"update_map_block"
 .LASF307:
 	.string	"maxRegion"
-.LASF681:
+.LASF680:
 	.string	"next_free_active_plane"
-.LASF491:
+.LASF490:
 	.string	"p_gc_page_info"
 .LASF256:
 	.string	"net_our_vlan"
@@ -55432,29 +55465,29 @@ __func__.7632:
 	.string	"totle_power_on_run_times"
 .LASF93:
 	.string	"ih_os"
-.LASF526:
+.LASF525:
 	.string	"g_cur_erase_blk"
 .LASF184:
 	.string	"UCLASS_PWM"
-.LASF635:
+.LASF634:
 	.string	"FtlGcBufFree"
-.LASF775:
+.LASF774:
 	.string	"List_pop_index_node"
-.LASF691:
+.LASF690:
 	.string	"scan_completed"
-.LASF638:
+.LASF637:
 	.string	"update_vpc_list"
 .LASF170:
 	.string	"UCLASS_MMC"
-.LASF465:
+.LASF464:
 	.string	"p_map_block_table"
-.LASF544:
+.LASF543:
 	.string	"FtlUpdateVaildLpnCount"
 .LASF332:
 	.string	"res32_0"
 .LASF333:
 	.string	"res32_1"
-.LASF727:
+.LASF726:
 	.string	"FtlUpdateVaildLpn"
 .LASF390:
 	.string	"scr_ppa"
@@ -55464,43 +55497,43 @@ __func__.7632:
 	.string	"save_size"
 .LASF78:
 	.string	"version"
-.LASF653:
+.LASF652:
 	.string	"pNode"
-.LASF639:
+.LASF638:
 	.string	"get_new_active_ppa"
-.LASF879:
+.LASF877:
 	.string	"kmalloc"
 .LASF25:
 	.string	"_binary_u_boot_bin_end"
-.LASF598:
+.LASF597:
 	.string	"max_gc_page_num"
 .LASF1:
 	.string	"unsigned int"
-.LASF713:
+.LASF712:
 	.string	"FtlSlcSuperblockCheck"
-.LASF515:
+.LASF514:
 	.string	"g_totle_avg_erase_count"
-.LASF837:
+.LASF835:
 	.string	"flashType"
-.LASF790:
+.LASF791:
 	.string	"FtlFreeSysBLkSort"
-.LASF780:
+.LASF779:
 	.string	"tmp_erase_count"
 .LASF83:
 	.string	"working_fdt"
-.LASF863:
+.LASF861:
 	.string	"FtlVariablesInit"
 .LASF392:
 	.string	"ftl_gc_page_buffer"
 .LASF239:
 	.string	"push_packet"
-.LASF709:
+.LASF708:
 	.string	"pMapBlkHeader"
 .LASF82:
 	.string	"size_dt_struct"
-.LASF473:
+.LASF472:
 	.string	"p_vendor_region_ppn_table"
-.LASF676:
+.LASF675:
 	.string	"make_superblock"
 .LASF97:
 	.string	"ih_name"
@@ -55510,11 +55543,11 @@ __func__.7632:
 	.string	"bufferFlashMode"
 .LASF7:
 	.string	"short int"
-.LASF838:
+.LASF836:
 	.string	"FtlRead"
 .LASF74:
 	.string	"totalsize"
-.LASF758:
+.LASF757:
 	.string	"ftl_map_blk_alloc_new_blk"
 .LASF385:
 	.string	"check_en"
@@ -55524,7 +55557,7 @@ __func__.7632:
 	.string	"prev"
 .LASF423:
 	.string	"c_ftl_nand_data_op_blks_per_plane"
-.LASF651:
+.LASF650:
 	.string	"min_ec_id"
 .LASF388:
 	.string	"phyBlk"
@@ -55532,7 +55565,7 @@ __func__.7632:
 	.string	"net_boot_file_size"
 .LASF412:
 	.string	"c_ftl_nand_map_region_num"
-.LASF666:
+.LASF665:
 	.string	"FtlVpcCheckAndModify"
 .LASF127:
 	.string	"ft_len"
@@ -55540,7 +55573,7 @@ __func__.7632:
 	.string	"UCLASS_REGULATOR"
 .LASF311:
 	.string	"pBlkVerTbl"
-.LASF489:
+.LASF488:
 	.string	"g_sys_save_data"
 .LASF124:
 	.string	"rd_start"

commit bcf9093629cab1bad23d1df024aa508ac0797803
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Thu Jun 28 15:27:43 2018 +0800

    drm/rocckhip: fix panic when enable hdmi at uboot
    
    hdmi without panel, so we must confirm panel->func
    and panel_data->panel isn't NULL.
    
    Change-Id: I87abec5d04e26bdab4cb643f7ed5757f3e31c918
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 83f645bda5..fdf1131605 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -575,6 +575,58 @@ static int display_set_plane(struct display_state *state)
 	return 0;
 }
 
+static int display_panel_prepare(struct display_state *state)
+{
+	struct panel_state *panel_state = &state->panel_state;
+	const struct rockchip_panel *panel = panel_state->panel;
+
+	if (!panel || !panel->funcs || !panel->funcs->prepare) {
+		printf("%s: failed to find panel prepare funcs\n", __func__);
+		return -ENODEV;
+	}
+
+	return panel->funcs->prepare(state);
+}
+
+static int display_panel_enable(struct display_state *state)
+{
+	struct panel_state *panel_state = &state->panel_state;
+	const struct rockchip_panel *panel = panel_state->panel;
+
+	if (!panel || !panel->funcs || !panel->funcs->enable) {
+		printf("%s: failed to find panel enable funcs\n", __func__);
+		return -ENODEV;
+	}
+
+	return panel->funcs->enable(state);
+}
+
+static void display_panel_unprepare(struct display_state *state)
+{
+	struct panel_state *panel_state = &state->panel_state;
+	const struct rockchip_panel *panel = panel_state->panel;
+
+	if (!panel || !panel->funcs || !panel->funcs->unprepare) {
+		printf("%s: failed to find panel unprepare funcs\n", __func__);
+		return;
+	}
+
+	panel->funcs->unprepare(state);
+}
+
+static void display_panel_disable(struct display_state *state)
+{
+	struct panel_state *panel_state = &state->panel_state;
+	const struct rockchip_panel *panel = panel_state->panel;
+
+	if (!panel || !panel->funcs || !panel->funcs->disable) {
+		printf("%s: failed to find panel disable funcs\n", __func__);
+		return;
+	}
+
+	panel->funcs->disable(state);
+}
+
 static int display_enable(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
@@ -583,9 +635,6 @@ static int display_enable(struct display_state *state)
 	struct crtc_state *crtc_state = &state->crtc_state;
 	const struct rockchip_crtc *crtc = crtc_state->crtc;
 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
-	struct panel_state *panel_state = &state->panel_state;
-	const struct rockchip_panel *panel = panel_state->panel;
-	const struct rockchip_panel_funcs *panel_funcs = panel->funcs;
 	int ret = 0;
 
 	display_init(state);
@@ -608,18 +657,12 @@ static int display_enable(struct display_state *state)
 			goto unprepare_crtc;
 	}
 
-	if (panel_funcs->prepare) {
-		ret = panel_funcs->prepare(state);
-		if (ret) {
-			printf("failed to prepare panel\n");
-			goto unprepare_conn;
-		}
-	}
+	display_panel_prepare(state);
 
 	if (crtc_funcs->enable) {
 		ret = crtc_funcs->enable(state);
 		if (ret)
-			goto unprepare_panel;
+			goto unprepare_conn;
 	}
 
 	if (conn_funcs->enable) {
@@ -628,33 +671,20 @@ static int display_enable(struct display_state *state)
 			goto disable_crtc;
 	}
 
-	if (panel_funcs->enable) {
-		ret = panel_funcs->enable(state);
-		if (ret) {
-			printf("failed to enable panel\n");
-			goto disable_conn;
-		}
-	}
+	display_panel_enable(state);
 
 	state->is_enable = true;
-
 	return 0;
 
-disable_conn:
-	if (conn_funcs->unprepare)
-		conn_funcs->unprepare(state);
 disable_crtc:
 	if (crtc_funcs->disable)
 		crtc_funcs->disable(state);
-unprepare_crtc:
-	if (crtc_funcs->unprepare)
-		crtc_funcs->unprepare(state);
-unprepare_panel:
-	if (panel_funcs->unprepare)
-		panel_funcs->unprepare(state);
 unprepare_conn:
 	if (conn_funcs->unprepare)
 		conn_funcs->unprepare(state);
+unprepare_crtc:
+	if (crtc_funcs->unprepare)
+		crtc_funcs->unprepare(state);
 	return ret;
 }
 
@@ -666,9 +696,6 @@ static int display_disable(struct display_state *state)
 	struct crtc_state *crtc_state = &state->crtc_state;
 	const struct rockchip_crtc *crtc = crtc_state->crtc;
 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
-	struct panel_state *panel_state = &state->panel_state;
-	const struct rockchip_panel *panel = panel_state->panel;
-	const struct rockchip_panel_funcs *panel_funcs = panel->funcs;
 
 	if (!state->is_init)
 		return 0;
@@ -676,8 +703,7 @@ static int display_disable(struct display_state *state)
 	if (!state->is_enable)
 		return 0;
 
-	if (panel_funcs->disable)
-		panel_funcs->disable(state);
+	display_panel_disable(state);
 
 	if (crtc_funcs->disable)
 		crtc_funcs->disable(state);
@@ -685,8 +711,7 @@ static int display_disable(struct display_state *state)
 	if (conn_funcs->disable)
 		conn_funcs->disable(state);
 
-	if (panel_funcs->unprepare)
-		panel_funcs->unprepare(state);
+	display_panel_unprepare(state);
 
 	if (conn_funcs->unprepare)
 		conn_funcs->unprepare(state);

commit d94724f7476bd65311d31cde7108b47ad84b9114
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Jul 12 20:38:12 2018 +0800

    rockchip: board: do not probe mmc/nand in init_kernel_dtb()
    
    The rkimg_bootdev cmd will do it instead.
    
    Change-Id: Ic4bef6e5d14837e80c185fc2cd1123f34b015054
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 4618b4bb4c..a474cf0a5b 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -173,30 +173,12 @@ int board_late_init(void)
 int init_kernel_dtb(void)
 {
 	int ret = 0;
-	struct mmc *mmc;
-	struct udevice *dev;
 	ulong fdt_addr = 0;
 
 	ret = mmc_initialize(gd->bd);
 	if (ret)
-		goto scan_nand;
-	mmc = find_mmc_device(0);
-	if (!mmc) {
-		printf("no mmc device at slot 0\n");
-		goto scan_nand;
-	}
-	ret = mmc_init(mmc);
-	if (!ret)
-		goto init_dtb;
-	printf("%s mmc init fail %d\n", __func__, ret);
-scan_nand:
-	ret = uclass_get_device(UCLASS_RKNAND, 0, &dev);
-	if (ret) {
-		printf("%s: Cannot find rknand device\n", __func__);
-		return -1;
-	}
+		debug("%s mmc initialized fail\n", __func__);
 
-init_dtb:
 	fdt_addr = env_get_ulong("fdt_addr_r", 16, 0);
 	if (!fdt_addr) {
 		printf("No Found FDT Load Address.\n");

commit af2632579617bf0c6ad9a64e3026ea6ca3a3016f
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Wed Jul 4 18:07:12 2018 +0800

    rockchip: rkflash: remove caching last few sectors in ftl_write
    
    1.In ftl_write, if last few sectors are smaller than one page, them'll
    be cached, and join with next ftl ops. When download image in loader
    mode, them wont be download to flash when power off in some cases, and
    it's unacceptable.
    
    Change-Id: I2375a6be8b1fa5b41dfdc962d2c3824d92ba25ef
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/rk_sftl_arm_v7.S b/drivers/rkflash/rk_sftl_arm_v7.S
index ba840ce85f..466f5ff3fa 100644
--- a/drivers/rkflash/rk_sftl_arm_v7.S
+++ b/drivers/rkflash/rk_sftl_arm_v7.S
@@ -1,8 +1,8 @@
 /*
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
- * SPDX-License-Identifier:	GPL-2.0
- * date: 2018-06-20
+ * SPDX-License-Identifier:    GPL-2.0
+ * date: 2018-07-04
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -19998,7 +19998,7 @@ FtlWrite:
 	.loc 3 962 0
 	mov	r8, r1
 	str	r2, [sp, #16]
-	str	r3, [sp, #4]
+	str	r3, [sp]
 	.loc 3 970 0
 	bne	.L1676
 	.loc 3 971 0
@@ -20015,261 +20015,138 @@ FtlWrite:
 	add	sp, sp, #64
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
+.LVL1876:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1876:
+.LVL1877:
 .L1676:
 	.cfi_restore_state
 	.loc 3 974 0
 	ldr	r3, [sp, #16]
-.LVL1877:
+.LVL1878:
 	adds	r5, r1, r3
-	ldr	r3, .L1741
+	ldr	r3, .L1736
 	ldr	r3, [r3]
 	cmp	r5, r3
-	bhi	.L1718
+	bhi	.L1716
 	.loc 3 974 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1741+4
+	ldr	r3, .L1736+4
 	ldr	r0, [r3]
-.LVL1878:
+.LVL1879:
 	adds	r4, r0, #1
 	beq	.L1675
 	.loc 3 977 0 is_stmt 1
-	ldr	r3, .L1741+8
+	ldr	r3, .L1736+8
 	mov	r2, #2048
-.LVL1879:
+.LVL1880:
 	.loc 3 978 0
 	mov	r0, r8
 	.loc 3 977 0
 	str	r2, [r3]
 	.loc 3 978 0
-	ldr	r3, .L1741+12
+	ldr	r3, .L1736+12
 	ldrh	r4, [r3]
 	mov	r1, r4
-.LVL1880:
-	bl	__aeabi_uidiv
 .LVL1881:
+	bl	__aeabi_uidiv
+.LVL1882:
 	.loc 3 979 0
 	mov	r1, r4
 	.loc 3 978 0
-	str	r0, [sp]
-.LVL1882:
+	mov	r10, r0
+.LVL1883:
 	.loc 3 979 0
 	subs	r0, r5, #1
-.LVL1883:
-	bl	__aeabi_uidiv
 .LVL1884:
-	.loc 3 980 0
-	ldr	r2, [sp]
-	.loc 3 979 0
-	str	r0, [sp, #20]
+	bl	__aeabi_uidiv
 .LVL1885:
-	.loc 3 980 0
-	subs	r5, r0, r2
 	.loc 3 982 0
-	ldr	r2, .L1741+16
+	ldr	r2, .L1736+16
 	.loc 3 980 0
+	sub	r5, r0, r10
 	adds	r3, r5, #1
 	.loc 3 982 0
 	adds	r1, r5, #1
 	.loc 3 980 0
-	str	r3, [sp, #8]
-.LVL1886:
+	str	r3, [sp, #12]
 	.loc 3 982 0
 	ldr	r3, [r2]
+	.loc 3 979 0
+	str	r0, [sp, #20]
+.LVL1886:
+	.loc 3 982 0
 	add	r3, r3, r1
 	str	r3, [r2]
 	.loc 3 983 0
-	ldr	r3, .L1741+20
+	ldr	r3, .L1736+20
 	ldr	r7, [r3]
 	cbz	r7, .L1678
 	.loc 3 984 0
 	ldr	r3, [r7, #16]
-	ldr	r2, [sp]
-	cmp	r2, r3
+	cmp	r10, r3
 	beq	.L1679
 	.loc 3 985 0
 	bl	FtlCacheWriteBack
 .LVL1887:
 .L1678:
 	.loc 3 1008 0
-	ldr	r3, .L1741+24
-	ldr	r4, .L1741+28
+	ldr	r3, .L1736+24
+	ldr	r4, .L1736+28
 	ldr	r3, [r3]
 	cbz	r3, .L1681
 	.loc 3 1008 0 is_stmt 0 discriminator 1
 	ldrh	r2, [r4, #4]
 	.loc 3 1009 0 is_stmt 1 discriminator 1
-	ldr	r3, .L1741+32
+	ldr	r3, .L1736+32
 	cmp	r2, #0
 	it	eq
 	moveq	r4, r3
 .L1681:
 	.loc 3 1068 0
-	ldr	r6, [sp]
+	mov	r6, r10
 .LVL1888:
 .L1682:
 	.loc 3 1011 0
-	ldr	r3, [sp, #8]
-	cmp	r3, #0
-	beq	.L1716
-	.loc 3 1012 0
-	ldr	r3, .L1741+36
-	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-	ldrh	r3, [r3]
-	cmp	r2, r3
-	bcc	.L1683
-	.loc 3 1012 0 is_stmt 0 discriminator 1
-	mov	r2, #1012
-	ldr	r1, .L1741+40
-	ldr	r0, .L1741+44
-	bl	printf
-.LVL1889:
-.L1683:
-	.loc 3 1013 0 is_stmt 1
-	ldrh	r7, [r4, #4]
-	cbnz	r7, .L1684
-	.loc 3 1014 0
-	bl	FtlCacheWriteBack
-.LVL1890:
-	.loc 3 1016 0
-	ldr	r3, .L1741+28
-	ldr	r5, .L1741+24
-	cmp	r4, r3
-	bne	.L1685
-	.loc 3 1017 0
-	ldr	r0, .L1741+32
-	ldrh	r4, [r0, #4]
-.LVL1891:
-	cbnz	r4, .L1686
-	.loc 3 1018 0
-	bl	allocate_new_data_superblock
-.LVL1892:
-	.loc 3 1019 0
-	str	r4, [r5]
-.L1686:
-	.loc 3 1021 0
-	ldr	r0, .L1741+28
-	bl	allocate_new_data_superblock
-.LVL1893:
-	.loc 3 1023 0
-	ldr	r4, .L1741+28
-	.loc 3 1022 0
-	ldr	r2, [r5]
-	.loc 3 1023 0
-	ldr	r3, .L1741+32
-	cmp	r2, #0
-	it	ne
-	movne	r4, r3
-.L1687:
-.LVL1894:
-	.loc 3 1033 0
-	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1684
-	.loc 3 1034 0
-	mov	r0, r4
-	bl	allocate_new_data_superblock
-.LVL1895:
-.L1684:
-	.loc 3 1041 0
-	ldrb	r2, [r4, #7]	@ zero_extendqisi2
-	.loc 3 1043 0
-	ldrh	r3, [r4, #4]
-	ldr	r1, [sp, #8]
-	.loc 3 1041 0
-	lsls	r2, r2, #2
-	cmp	r3, r1
-	it	cs
-	movcs	r3, r1
-	cmp	r2, r3
-	it	cs
-	movcs	r2, r3
-	.loc 3 1045 0
-	ldr	r3, .L1741+36
-	str	r2, [sp, #36]
-.LVL1896:
-	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-.LVL1897:
-	ldrh	r3, [r3]
-	cmp	r2, r3
-	bcc	.L1688
-	.loc 3 1045 0 is_stmt 0 discriminator 1
-	movw	r2, #1045
-	ldr	r1, .L1741+40
-	ldr	r0, .L1741+44
-	bl	printf
-.LVL1898:
-.L1688:
-	.loc 3 1054 0 is_stmt 1 discriminator 1
-	ldr	r10, .L1741+80
-	.loc 3 1068 0 discriminator 1
-	mov	fp, #0
-.L1689:
-.LVL1899:
-	.loc 3 1046 0 discriminator 1
-	ldr	r3, [sp, #36]
-	cmp	fp, r3
-	bne	.L1710
-.L1690:
-.LVL1900:
-	.loc 3 1127 0
-	ldr	r3, .L1741+20
-	ldr	r3, [r3]
+	ldr	r3, [sp, #12]
 	cmp	r3, #0
-	beq	.L1711
-.LVL1901:
-	.loc 3 1129 0
-	ldr	r3, [sp, #8]
-	.loc 3 1130 0
-	subs	fp, fp, #1
-.LVL1902:
-	.loc 3 1129 0
-	add	r3, r3, #-1
-	str	r3, [sp, #8]
-.LVL1903:
-	.loc 3 1130 0
-	bne	.L1711
-.LVL1904:
-.L1716:
+	bne	.L1712
 	.loc 3 1137 0
-	ldr	r2, [sp]
-	movs	r0, #0
 	ldr	r3, [sp, #20]
-.LVL1905:
 	.loc 3 1139 0
-	ldr	r4, .L1741+48
-.LVL1906:
+	ldr	r4, .L1736+36
+.LVL1889:
 	.loc 3 1137 0
-	subs	r1, r3, r2
+	ldr	r0, [sp, #12]
+	sub	r1, r3, r10
 	bl	rk_ftl_garbage_collect
-.LVL1907:
+.LVL1890:
 	.loc 3 1139 0
 	ldrh	r2, [r4]
 	cmp	r2, #15
 	bhi	.L1713
 	.loc 3 1141 0
-	ldr	r5, .L1741+52
-	ldr	r6, .L1741+56
-.LVL1908:
-.L1737:
+	ldr	r5, .L1736+40
+	ldr	r6, .L1736+44
+.LVL1891:
+.L1732:
 	ldrh	r3, [r5]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1717
+	bne	.L1714
 	.loc 3 1141 0 is_stmt 0 discriminator 1
 	ldrh	r2, [r6]
 	cmp	r2, r3
-	bne	.L1717
+	bne	.L1714
 	.loc 3 1142 0 is_stmt 1
 	movs	r0, #0
 	bl	List_get_gc_head_node
-.LVL1909:
+.LVL1892:
 	uxth	r0, r0
 	bl	FtlGcRefreshBlock
-.LVL1910:
-.L1717:
+.LVL1893:
+.L1714:
 	.loc 3 1143 0
-	ldr	r2, .L1741+60
+	ldr	r2, .L1736+48
 	movs	r3, #128
 	.loc 3 1145 0
 	movs	r1, #1
@@ -20277,38 +20154,37 @@ FtlWrite:
 	.loc 3 1143 0
 	strh	r3, [r2]	@ movhi
 	.loc 3 1144 0
-	ldr	r2, .L1741+64
+	ldr	r2, .L1736+52
 	strh	r3, [r2]	@ movhi
 	.loc 3 1145 0
 	bl	rk_ftl_garbage_collect
-.LVL1911:
+.LVL1894:
 	.loc 3 1146 0
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
-.LVL1912:
+.LVL1895:
 	.loc 3 1147 0
 	ldrh	r3, [r4]
 	cmp	r3, #8
-	bls	.L1737
+	bls	.L1732
 	b	.L1713
-.LVL1913:
+.LVL1896:
 .L1679:
 	.loc 3 987 0
-	ldr	r2, .L1741+68
-.LVL1914:
+	ldr	r2, .L1736+56
 	.loc 3 988 0
 	mov	r1, r4
-.LVL1915:
+.LVL1897:
 	mov	r0, r8
-.LVL1916:
+.LVL1898:
 	.loc 3 987 0
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
 	.loc 3 988 0
 	bl	__aeabi_uidivmod
-.LVL1917:
+.LVL1899:
 	ldr	r2, [sp, #16]
 	.loc 3 989 0
 	subs	r4, r4, r1
@@ -20316,72 +20192,200 @@ FtlWrite:
 	ldr	r0, [r7, #8]
 	.loc 3 988 0
 	mov	r3, r1
-.LVL1918:
+.LVL1900:
 	.loc 3 992 0
-	ldr	r1, [sp, #4]
-.LVL1919:
+	ldr	r1, [sp]
+.LVL1901:
 	cmp	r4, r2
 	it	cs
 	movcs	r4, r2
-.LVL1920:
+.LVL1902:
 	lsls	r6, r4, #9
 	add	r0, r0, r3, lsl #9
 	mov	r2, r6
 	bl	ftl_memcpy
-.LVL1921:
+.LVL1903:
 	.loc 3 994 0
 	cbnz	r5, .L1680
-.LVL1922:
+.LVL1904:
 .L1713:
 	.loc 3 995 0
 	movs	r0, #0
 	b	.L1675
-.LVL1923:
+.LVL1905:
 .L1680:
 	.loc 3 996 0
 	ldr	r3, [sp, #16]
 	.loc 3 997 0
 	add	r8, r8, r4
-.LVL1924:
+.LVL1906:
+	.loc 3 999 0
+	add	r10, r10, #1
+.LVL1907:
 	.loc 3 996 0
 	subs	r3, r3, r4
 	str	r3, [sp, #16]
-.LVL1925:
+.LVL1908:
 	.loc 3 998 0
-	ldr	r3, [sp, #4]
-.LVL1926:
-	add	r3, r3, r6
-	str	r3, [sp, #4]
-.LVL1927:
-	.loc 3 999 0
 	ldr	r3, [sp]
-.LVL1928:
-	adds	r3, r3, #1
+.LVL1909:
+	add	r3, r3, r6
 	str	r3, [sp]
-.LVL1929:
+.LVL1910:
 	.loc 3 1000 0
 	bl	FtlCacheWriteBack
-.LVL1930:
-	str	r5, [sp, #8]
+.LVL1911:
+	str	r5, [sp, #12]
 	b	.L1678
-.LVL1931:
+.LVL1912:
+.L1712:
+	.loc 3 1012 0
+	ldr	r3, .L1736+60
+.LVL1913:
+	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L1683
+	.loc 3 1012 0 is_stmt 0 discriminator 1
+	mov	r2, #1012
+	ldr	r1, .L1736+64
+	ldr	r0, .L1736+68
+	bl	printf
+.LVL1914:
+.L1683:
+	.loc 3 1013 0 is_stmt 1
+	ldrh	r7, [r4, #4]
+	cbnz	r7, .L1684
+	.loc 3 1014 0
+	bl	FtlCacheWriteBack
+.LVL1915:
+	.loc 3 1016 0
+	ldr	r3, .L1736+28
+	ldr	r5, .L1736+24
+	cmp	r4, r3
+	bne	.L1685
+	.loc 3 1017 0
+	ldr	r0, .L1736+32
+	ldrh	r4, [r0, #4]
+.LVL1916:
+	cbnz	r4, .L1686
+	.loc 3 1018 0
+	bl	allocate_new_data_superblock
+.LVL1917:
+	.loc 3 1019 0
+	str	r4, [r5]
+.L1686:
+	.loc 3 1021 0
+	ldr	r0, .L1736+28
+	bl	allocate_new_data_superblock
+.LVL1918:
+	.loc 3 1023 0
+	ldr	r4, .L1736+28
+	.loc 3 1022 0
+	ldr	r2, [r5]
+	.loc 3 1023 0
+	ldr	r3, .L1736+32
+	cmp	r2, #0
+	it	ne
+	movne	r4, r3
+.L1687:
+.LVL1919:
+	.loc 3 1033 0
+	ldrh	r3, [r4, #4]
+	cbnz	r3, .L1684
+	.loc 3 1034 0
+	mov	r0, r4
+	bl	allocate_new_data_superblock
+.LVL1920:
+.L1684:
+	.loc 3 1041 0
+	ldrb	r2, [r4, #7]	@ zero_extendqisi2
+	.loc 3 1043 0
+	ldrh	r3, [r4, #4]
+	ldr	r1, [sp, #12]
+	.loc 3 1041 0
+	lsls	r2, r2, #2
+	cmp	r3, r1
+	it	cs
+	movcs	r3, r1
+	cmp	r2, r3
+	it	cs
+	movcs	r2, r3
+	.loc 3 1045 0
+	ldr	r3, .L1736+60
+	str	r2, [sp, #36]
+.LVL1921:
+	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+.LVL1922:
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L1688
+	.loc 3 1045 0 is_stmt 0 discriminator 1
+	movw	r2, #1045
+	ldr	r1, .L1736+64
+	ldr	r0, .L1736+68
+	bl	printf
+.LVL1923:
+.L1688:
+	.loc 3 1054 0 is_stmt 1 discriminator 1
+	ldr	fp, .L1736+72
+	.loc 3 1068 0 discriminator 1
+	movs	r3, #0
+	str	r3, [sp, #4]
+.L1689:
+.LVL1924:
+	.loc 3 1046 0 discriminator 1
+	ldr	r3, [sp, #4]
+	ldr	r2, [sp, #36]
+	cmp	r3, r2
+	bne	.L1710
+.L1690:
+.LVL1925:
+	.loc 3 1133 0
+	ldr	r0, .L1736+72
+	mov	r3, r4
+	movs	r2, #0
+	ldr	r1, [sp, #4]
+	ldr	r0, [r0]
+	bl	FtlProgPages
+.LVL1926:
+	.loc 3 1134 0
+	ldr	r3, [sp, #4]
+	ldr	r2, [sp, #12]
+	cmp	r3, r2
+	bls	.L1711
+	.loc 3 1134 0 is_stmt 0 discriminator 1
+	movw	r2, #1134
+	ldr	r1, .L1736+64
+	ldr	r0, .L1736+68
+	bl	printf
+.LVL1927:
+.L1711:
+	.loc 3 1135 0 is_stmt 1
+	ldr	r3, [sp, #12]
+	ldr	r2, [sp, #4]
+	subs	r3, r3, r2
+	str	r3, [sp, #12]
+.LVL1928:
+	b	.L1682
+.LVL1929:
 .L1685:
 	.loc 3 1028 0
 	ldrh	r2, [r3, #4]
 	.loc 3 1027 0
 	str	r7, [r5]
 	.loc 3 1028 0
-	cbnz	r2, .L1723
+	cbnz	r2, .L1721
 	.loc 3 1029 0
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-.LVL1932:
+.LVL1930:
 	b	.L1687
-.L1723:
+.L1721:
 	mov	r4, r3
-.LVL1933:
+.LVL1931:
 	b	.L1684
-.LVL1934:
+.LVL1932:
 .L1710:
 	.loc 3 1047 0
 	ldrh	r2, [r4, #4]
@@ -20393,29 +20397,30 @@ FtlWrite:
 	mov	r0, r6
 	movs	r7, #20
 	bl	log2phys
-.LVL1935:
+.LVL1933:
 	.loc 3 1052 0
 	mov	r0, r4
-	mul	r7, r7, fp
 	bl	get_new_active_ppa
-.LVL1936:
-	.loc 3 1055 0
-	ldr	r3, .L1741+72
+.LVL1934:
+	ldr	r3, [sp, #4]
 	.loc 3 1054 0
-	ldr	r1, [r10]
+	ldr	r1, [fp]
+	muls	r7, r3, r7
 	.loc 3 1055 0
+	ldr	r3, .L1736+76
 	ldrh	r2, [r3]
+	ldr	r3, [sp, #4]
 	.loc 3 1054 0
 	add	r1, r1, r7
 	str	r0, [r1, #4]
 	.loc 3 1056 0
 	str	r6, [r1, #16]
-.LVL1937:
+.LVL1935:
 	.loc 3 1055 0
-	mul	r0, r2, fp
-.LVL1938:
+	mul	r0, r2, r3
+.LVL1936:
 	bic	r3, r0, #3
-	ldr	r0, .L1741+76
+	ldr	r0, .L1736+80
 	str	r3, [sp, #28]
 	ldr	r3, [r0]
 	ldr	r0, [sp, #28]
@@ -20425,23 +20430,22 @@ FtlWrite:
 	.loc 3 1059 0
 	mov	r0, r3
 	movs	r1, #0
-.LVL1939:
+.LVL1937:
 	.loc 3 1055 0
-	str	r3, [sp, #12]
-.LVL1940:
+	str	r3, [sp, #8]
+.LVL1938:
 	.loc 3 1059 0
 	bl	ftl_memset
-.LVL1941:
+.LVL1939:
 	.loc 3 1061 0
-	ldr	r3, [sp]
-	ldr	r2, .L1741+12
-	cmp	r6, r3
+	cmp	r6, r10
+	ldr	r2, .L1736+12
 	beq	.L1691
 	.loc 3 1061 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #20]
 	cmp	r6, r3
-	bne	.L1736
-.LVL1942:
+	bne	.L1731
+.LVL1940:
 	.loc 3 1069 0 is_stmt 1
 	ldrh	r2, [r2]
 	ldr	r3, [sp, #16]
@@ -20453,11 +20457,11 @@ FtlWrite:
 	.loc 3 1069 0
 	subs	r5, r5, r2
 	uxth	r5, r5
-.LVL1943:
+.LVL1941:
 	b	.L1694
-.L1742:
+.L1737:
 	.align	2
-.L1741:
+.L1736:
 	.word	.LANCHOR34
 	.word	.LANCHOR88
 	.word	.LANCHOR178
@@ -20467,59 +20471,56 @@ FtlWrite:
 	.word	.LANCHOR179
 	.word	.LANCHOR51
 	.word	.LANCHOR52
-	.word	.LANCHOR3
-	.word	.LANCHOR180
-	.word	.LC1
 	.word	.LANCHOR48
 	.word	.LANCHOR82
 	.word	.LANCHOR101
 	.word	.LANCHOR85
 	.word	.LANCHOR84
 	.word	.LANCHOR66
+	.word	.LANCHOR3
+	.word	.LANCHOR180
+	.word	.LC1
+	.word	.LANCHOR122
 	.word	.LANCHOR24
 	.word	.LANCHOR115
-	.word	.LANCHOR122
-.LVL1944:
+.LVL1942:
 .L1691:
 	.loc 3 1063 0
 	ldrh	r5, [r2]
 	mov	r0, r8
 	mov	r1, r5
 	bl	__aeabi_uidivmod
-.LVL1945:
+.LVL1943:
 	ldr	r3, [sp, #16]
 	.loc 3 1064 0
 	subs	r5, r5, r1
 	.loc 3 1063 0
 	str	r1, [sp, #24]
-.LVL1946:
+.LVL1944:
 	cmp	r5, r3
 	it	cs
 	movcs	r5, r3
-.LVL1947:
+.LVL1945:
 .L1694:
 	.loc 3 1072 0
-	ldr	r2, .L1743
-	.loc 3 1073 0
-	ldr	r3, [sp]
-	.loc 3 1072 0
+	ldr	r2, .L1738
 	ldrh	r2, [r2]
 	cmp	r5, r2
 	.loc 3 1074 0
-	ldr	r2, [r10]
+	ldr	r2, [fp]
 	.loc 3 1072 0
 	bne	.L1695
 	.loc 3 1073 0
-	cmp	r6, r3
+	cmp	r6, r10
 	.loc 3 1074 0
 	add	r7, r7, r2
 	.loc 3 1076 0
 	ittet	ne
 	mulne	r5, r5, r6
-.LVL1948:
-	ldrne	r3, [sp, #4]
+.LVL1946:
+	ldrne	r3, [sp]
 	.loc 3 1074 0
-	ldreq	r3, [sp, #4]
+	ldreq	r3, [sp]
 	.loc 3 1076 0
 	subne	r5, r5, r8
 	.loc 3 1074 0
@@ -20528,39 +20529,35 @@ FtlWrite:
 	.loc 3 1076 0
 	addne	r5, r3, r5, lsl #9
 	strne	r5, [r7, #8]
-.LVL1949:
+.LVL1947:
 .L1697:
 	.loc 3 1119 0
-	ldr	r3, .L1743+4
+	ldr	r3, .L1738+4
 	ldrb	r1, [r4, #6]	@ zero_extendqisi2
 	ldrh	r2, [r3]
 	cmp	r1, r2
 	bcc	.L1707
 	.loc 3 1119 0 is_stmt 0 discriminator 1
 	movw	r2, #1119
-	ldr	r1, .L1743+8
-	ldr	r0, .L1743+12
+	ldr	r1, .L1738+8
+	ldr	r0, .L1738+12
 	bl	printf
-.LVL1950:
+.LVL1948:
 .L1707:
 	.loc 3 1120 0 is_stmt 1
 	ldr	r3, [sp, #32]
 	movw	r2, #61589
 	ldr	r1, [sp, #28]
-	.loc 3 1046 0
-	add	fp, fp, #1
-.LVL1951:
-	.loc 3 1120 0
 	strh	r2, [r3, r1]	@ movhi
 	.loc 3 1121 0
-	ldr	r1, .L1743+16
-	ldr	r3, [sp, #12]
+	ldr	r1, .L1738+16
+	ldr	r3, [sp, #8]
 	ldr	r2, [r1]
 	str	r2, [r3, #4]
 	adds	r2, r2, #1
 	adds	r3, r2, #1
 	.loc 3 1122 0
-	ldr	r3, [sp, #12]
+	ldr	r3, [sp, #8]
 	.loc 3 1121 0
 	it	eq
 	moveq	r2, #0
@@ -20571,23 +20568,28 @@ FtlWrite:
 	str	r6, [r3, #8]
 	.loc 3 1125 0
 	adds	r6, r6, #1
-.LVL1952:
+.LVL1949:
 	.loc 3 1123 0
 	str	r2, [r3, #12]
 	.loc 3 1124 0
 	ldrh	r2, [r4]
 	strh	r2, [r3, #2]	@ movhi
+	.loc 3 1046 0
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #1
+	str	r3, [sp, #4]
+.LVL1950:
 	b	.L1689
-.LVL1953:
+.LVL1951:
 .L1695:
 	.loc 3 1079 0
-	cmp	r6, r3
+	cmp	r6, r10
 	.loc 3 1080 0
 	add	r2, r2, r7
 	ite	eq
-	ldreq	r1, .L1743+20
+	ldreq	r1, .L1738+20
 	.loc 3 1082 0
-	ldrne	r1, .L1743+24
+	ldrne	r1, .L1738+24
 	ldr	r1, [r1]
 	str	r1, [r2, #8]
 	.loc 3 1084 0
@@ -20600,7 +20602,7 @@ FtlWrite:
 	.loc 3 1090 0
 	add	r0, sp, #44
 	.loc 3 1088 0
-	ldr	r2, [r10]
+	ldr	r2, [fp]
 	.loc 3 1087 0
 	str	r6, [sp, #60]
 	.loc 3 1088 0
@@ -20617,34 +20619,33 @@ FtlWrite:
 	.loc 3 1090 0
 	movs	r2, #0
 	bl	FlashReadPages
-.LVL1954:
+.LVL1952:
 	.loc 3 1091 0
 	ldr	r2, [sp, #44]
 	adds	r2, r2, #1
 	bne	.L1701
 	.loc 3 1092 0
-	ldr	r1, .L1743+28
+	ldr	r1, .L1738+28
 	ldr	r2, [r1, #72]
 	adds	r2, r2, #1
 	str	r2, [r1, #72]
 .L1704:
 .LBE300:
 	.loc 3 1104 0
-	ldr	r3, [sp]
-	lsls	r2, r5, #9
-	cmp	r6, r3
+	cmp	r6, r10
+	lsl	r2, r5, #9
 	bne	.L1705
 	.loc 3 1105 0
-	ldr	r1, [r10]
+	ldr	r1, [fp]
 	ldr	r3, [sp, #24]
 	add	r1, r1, r7
 	ldr	r0, [r1, #8]
-	ldr	r1, [sp, #4]
+	ldr	r1, [sp]
 	add	r0, r0, r3, lsl #9
-.L1739:
+.L1734:
 	.loc 3 1107 0
 	bl	ftl_memcpy
-.LVL1955:
+.LVL1953:
 	.loc 3 1109 0
 	ldr	r3, [sp, #20]
 	cmp	r6, r3
@@ -20654,117 +20655,90 @@ FtlWrite:
 	cmp	r2, #0
 	beq	.L1697
 	.loc 3 1111 0
-	ldr	r2, [r10]
+	ldr	r2, [fp]
 	add	r7, r7, r2
-	ldr	r2, .L1743+32
+	ldr	r2, .L1738+32
 	str	r7, [r2]
 	.loc 3 1112 0
-	ldr	r2, .L1743+36
+	ldr	r2, .L1738+36
 	str	r4, [r2]
 	b	.L1697
 .L1701:
 .LBB301:
 	.loc 3 1094 0
-	ldr	r3, [sp, #12]
+	ldr	r3, [sp, #8]
 	ldr	r1, [r3, #8]
 	cmp	r6, r1
 	beq	.L1703
 	.loc 3 1095 0
-	ldr	r0, .L1743+28
+	ldr	r0, .L1738+28
 	ldr	r2, [r0, #72]
 	adds	r2, r2, #1
 	str	r2, [r0, #72]
 	.loc 3 1096 0
 	mov	r2, r6
-	ldr	r0, .L1743+40
+	ldr	r0, .L1738+40
 	bl	printf
-.LVL1956:
+.LVL1954:
 .L1703:
 	.loc 3 1098 0
-	ldr	r3, [sp, #12]
+	ldr	r3, [sp, #8]
 	ldr	r2, [r3, #8]
 	cmp	r6, r2
 	beq	.L1704
 	.loc 3 1098 0 is_stmt 0 discriminator 1
 	movw	r2, #1098
-	ldr	r1, .L1743+8
-	ldr	r0, .L1743+12
+	ldr	r1, .L1738+8
+	ldr	r0, .L1738+12
 	bl	printf
-.LVL1957:
+.LVL1955:
 	b	.L1704
-.LVL1958:
+.LVL1956:
 .L1700:
 .LBE301:
 	.loc 3 1101 0 is_stmt 1
-	ldr	r2, [r10]
+	ldr	r2, [fp]
 	movs	r1, #0
 	adds	r0, r2, r7
-	ldr	r2, .L1743+44
+	ldr	r2, .L1738+44
 	ldr	r0, [r0, #8]
 	ldrh	r2, [r2]
 	bl	ftl_memset
-.LVL1959:
+.LVL1957:
 	b	.L1704
 .L1705:
 	.loc 3 1107 0
-	ldr	r1, .L1743
-	ldr	r0, [r10]
-	ldr	r3, [sp, #4]
+	ldr	r1, .L1738
+	ldr	r0, [fp]
+	ldr	r3, [sp]
 	ldrh	r1, [r1]
 	add	r0, r0, r7
 	ldr	r0, [r0, #8]
 	muls	r1, r6, r1
 	sub	r1, r1, r8
 	add	r1, r3, r1, lsl #9
-	b	.L1739
-.LVL1960:
-.L1736:
+	b	.L1734
+.LVL1958:
+.L1731:
 	.loc 3 1117 0
 	ldrh	r2, [r2]
-	ldr	r3, [sp, #4]
-	ldr	r1, [r10]
+	ldr	r3, [sp]
+	ldr	r1, [fp]
 	muls	r2, r6, r2
 	add	r7, r7, r1
 	sub	r2, r2, r8
 	add	r2, r3, r2, lsl #9
 	str	r2, [r7, #8]
 	b	.L1697
-.LVL1961:
-.L1711:
-	.loc 3 1133 0
-	ldr	r0, .L1743+48
-	mov	r3, r4
-	movs	r2, #0
-	mov	r1, fp
-	ldr	r0, [r0]
-	bl	FtlProgPages
-.LVL1962:
-	.loc 3 1134 0
-	ldr	r3, [sp, #8]
-	cmp	r3, fp
-	bcs	.L1714
-	.loc 3 1134 0 is_stmt 0 discriminator 1
-	movw	r2, #1134
-	ldr	r1, .L1743+8
-	ldr	r0, .L1743+12
-	bl	printf
-.LVL1963:
-.L1714:
-	.loc 3 1135 0 is_stmt 1
-	ldr	r3, [sp, #8]
-	sub	r3, r3, fp
-	str	r3, [sp, #8]
-.LVL1964:
-	b	.L1682
-.LVL1965:
-.L1718:
+.LVL1959:
+.L1716:
 	.loc 3 975 0
 	mov	r0, #-1
-.LVL1966:
+.LVL1960:
 	b	.L1675
-.L1744:
+.L1739:
 	.align	2
-.L1743:
+.L1738:
 	.word	.LANCHOR12
 	.word	.LANCHOR3
 	.word	.LANCHOR180
@@ -20777,7 +20751,6 @@ FtlWrite:
 	.word	.LANCHOR171
 	.word	.LC105
 	.word	.LANCHOR23
-	.word	.LANCHOR122
 	.cfi_endproc
 .LFE220:
 	.size	FtlWrite, .-FtlWrite
@@ -20796,17 +20769,17 @@ sftl_write:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL1967:
+.LVL1961:
 	.loc 3 1210 0
 	mov	r3, r2
 	mov	r2, r1
-.LVL1968:
+.LVL1962:
 	mov	r1, r0
-.LVL1969:
+.LVL1963:
 	movs	r0, #0
-.LVL1970:
+.LVL1964:
 	b	FtlWrite
-.LVL1971:
+.LVL1965:
 	.cfi_endproc
 .LFE223:
 	.size	sftl_write, .-sftl_write
@@ -20837,21 +20810,21 @@ FtlLoadSysInfo:
 	.loc 2 1368 0
 	movs	r1, #0
 	.loc 2 1365 0
-	ldr	r8, .L1767+136
+	ldr	r8, .L1762+136
 	.loc 2 1368 0
-	ldr	r5, .L1767
+	ldr	r5, .L1762
 	.loc 2 1365 0
 	ldr	r3, [r8]
-	ldr	r4, .L1767+4
+	ldr	r4, .L1762+4
 	.loc 2 1366 0
-	ldr	r10, .L1767+140
+	ldr	r10, .L1762+140
 	.loc 2 1368 0
 	ldrh	r2, [r5]
-	ldr	r7, .L1767+8
+	ldr	r7, .L1762+8
 	.loc 2 1365 0
 	str	r3, [r4, #8]
 	.loc 2 1369 0
-	ldr	r6, .L1767+12
+	ldr	r6, .L1762+12
 	.loc 2 1366 0
 	ldr	r3, [r10]
 	.loc 2 1368 0
@@ -20861,24 +20834,24 @@ FtlLoadSysInfo:
 	str	r3, [r4, #12]
 	.loc 2 1368 0
 	bl	ftl_memset
-.LVL1972:
+.LVL1966:
 	.loc 2 1369 0
 	ldrh	r0, [r6]
 	movw	r3, #65535
 	str	r7, [sp]
 	cmp	r0, r3
-	bne	.L1747
-.L1755:
+	bne	.L1742
+.L1750:
 	.loc 2 1370 0
 	mov	r0, #-1
-.L1746:
+.L1741:
 	.loc 2 1463 0
 	add	sp, sp, #8
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1747:
+.L1742:
 	.cfi_restore_state
 	.loc 2 1372 0
 	movs	r1, #1
@@ -20886,48 +20859,48 @@ FtlLoadSysInfo:
 	mov	fp, r4
 	.loc 2 1372 0
 	bl	FtlGetLastWrittenPage
-.LVL1973:
+.LVL1967:
 	.loc 2 1381 0
-	ldr	r3, .L1767+16
+	ldr	r3, .L1762+16
 	.loc 2 1372 0
 	sxth	r7, r0
-.LVL1974:
+.LVL1968:
 	.loc 2 1373 0
 	adds	r0, r0, #1
 	strh	r0, [r6, #2]	@ movhi
-.L1749:
+.L1744:
 	.loc 2 1375 0
 	cmp	r7, #0
-	bge	.L1752
+	bge	.L1747
 	.loc 2 1388 0
 	movw	r2, #1388
-	ldr	r1, .L1767+20
-	ldr	r0, .L1767+24
+	ldr	r1, .L1762+20
+	ldr	r0, .L1762+24
 	bl	printf
-.LVL1975:
-.L1751:
+.LVL1969:
+.L1746:
 	.loc 2 1390 0
-	ldr	r2, .L1767+28
+	ldr	r2, .L1762+28
 	ldrh	r3, [r5]
 	ldrh	r2, [r2]
 	adds	r3, r3, #24
 	cmp	r2, r3, lsl #1
-	bcs	.L1754
+	bcs	.L1749
 	.loc 2 1390 0 is_stmt 0 discriminator 1
 	movw	r2, #1390
-	ldr	r1, .L1767+20
-	ldr	r0, .L1767+24
+	ldr	r1, .L1762+20
+	ldr	r0, .L1762+24
 	bl	printf
-.LVL1976:
-.L1754:
+.LVL1970:
+.L1749:
 	.loc 2 1392 0 is_stmt 1
-	ldr	r7, .L1767+32
-.LVL1977:
+	ldr	r7, .L1762+32
+.LVL1971:
 	movs	r2, #48
 	ldr	r1, [r4, #8]
 	mov	r0, r7
 	bl	ftl_memcpy
-.LVL1978:
+.LVL1972:
 	.loc 2 1393 0
 	ldrh	r2, [r5]
 	ldr	r1, [r4, #8]
@@ -20936,7 +20909,7 @@ FtlLoadSysInfo:
 	adds	r1, r1, #48
 	ldr	r0, [r3]
 	bl	ftl_memcpy
-.LVL1979:
+.LVL1973:
 	.loc 2 1394 0
 	ldrh	r1, [r5]
 	ldr	r3, [r4, #8]
@@ -20947,17 +20920,17 @@ FtlLoadSysInfo:
 	adds	r2, r2, #4
 	bic	r1, r1, #3
 	add	r1, r1, r3
-	ldr	r3, .L1767+36
+	ldr	r3, .L1762+36
 	ldr	r0, [r3]
 	bl	ftl_memcpy
-.LVL1980:
+.LVL1974:
 	.loc 2 1396 0
 	ldr	r2, [r7]
-	ldr	r3, .L1767+16
+	ldr	r3, .L1762+16
 	cmp	r2, r3
-	bne	.L1755
+	bne	.L1750
 	.loc 2 1400 0
-	ldr	r3, .L1767+40
+	ldr	r3, .L1762+40
 	ldrb	r2, [r7, #10]	@ zero_extendqisi2
 	.loc 2 1399 0
 	ldrh	r5, [r7, #8]
@@ -20967,56 +20940,56 @@ FtlLoadSysInfo:
 	strh	r5, [r6, #6]	@ movhi
 	.loc 2 1400 0
 	cmp	r2, r3
-	bne	.L1755
+	bne	.L1750
 	.loc 2 1403 0
-	ldr	r3, .L1767+44
+	ldr	r3, .L1762+44
 	.loc 2 1404 0
-	ldr	r2, .L1767+48
+	ldr	r2, .L1762+48
 	.loc 2 1403 0
 	str	r5, [r3]
 	.loc 2 1404 0
-	ldr	r3, .L1767+52
+	ldr	r3, .L1762+52
 	ldrh	r3, [r3]
 	muls	r3, r5, r3
 	str	r3, [r2]
 	.loc 2 1405 0
-	ldr	r2, .L1767+56
+	ldr	r2, .L1762+56
 	ldrh	r2, [r2]
 	muls	r3, r2, r3
-	ldr	r2, .L1767+60
+	ldr	r2, .L1762+60
 	str	r3, [r2]
 	.loc 2 1406 0
-	ldr	r3, .L1767+64
+	ldr	r3, .L1762+64
 	ldr	r6, [r3]
-	ldr	r3, .L1767+68
+	ldr	r3, .L1762+68
 	ldrh	r0, [r3, #6]
-	ldr	r3, .L1767+72
+	ldr	r3, .L1762+72
 	subs	r0, r6, r0
 	ldrh	r1, [r3]
 	subs	r0, r0, r5
 	bl	__aeabi_uidiv
-.LVL1981:
-	ldr	r3, .L1767+76
+.LVL1975:
+	ldr	r3, .L1762+76
 	.loc 2 1412 0
 	cmp	r5, r6
 	.loc 2 1406 0
 	strh	r0, [r3]	@ movhi
 	.loc 2 1412 0
-	bls	.L1756
+	bls	.L1751
 	.loc 2 1412 0 is_stmt 0 discriminator 1
 	movw	r2, #1412
-	ldr	r1, .L1767+20
-	ldr	r0, .L1767+24
+	ldr	r1, .L1762+20
+	ldr	r0, .L1762+24
 	bl	printf
-.LVL1982:
-.L1756:
+.LVL1976:
+.L1751:
 	.loc 2 1415 0 is_stmt 1
 	ldrh	r2, [r4, #16]
 	.loc 2 1414 0
-	ldr	r3, .L1767+80
+	ldr	r3, .L1762+80
 	ldrh	ip, [r4, #14]
 	.loc 2 1419 0
-	ldr	r7, .L1767+84
+	ldr	r7, .L1762+84
 	.loc 2 1415 0
 	lsrs	r1, r2, #6
 	.loc 2 1416 0
@@ -21027,7 +21000,7 @@ FtlLoadSysInfo:
 	.loc 2 1415 0
 	strh	r1, [r3, #2]	@ movhi
 	.loc 2 1424 0
-	ldr	r1, .L1767+88
+	ldr	r1, .L1762+88
 	.loc 2 1417 0
 	strb	r2, [r3, #8]
 	.loc 2 1424 0
@@ -21063,7 +21036,7 @@ FtlLoadSysInfo:
 	.loc 2 1427 0
 	strb	r2, [r1, #8]
 	.loc 2 1429 0
-	ldr	r2, .L1767+92
+	ldr	r2, .L1762+92
 	strh	r5, [r2]	@ movhi
 	.loc 2 1430 0
 	ldrh	r5, [r4, #24]
@@ -21080,35 +21053,35 @@ FtlLoadSysInfo:
 	.loc 2 1432 0
 	strb	r5, [r2, #8]
 	.loc 2 1434 0
-	ldr	r5, .L1767+96
+	ldr	r5, .L1762+96
 	str	r3, [r5]
 	.loc 2 1435 0
-	ldr	r5, .L1767+100
+	ldr	r5, .L1762+100
 	str	r3, [r5]
 	.loc 2 1436 0
-	ldr	r5, .L1767+104
+	ldr	r5, .L1762+104
 	str	r3, [r5]
 	.loc 2 1437 0
-	ldr	r5, .L1767+108
+	ldr	r5, .L1762+108
 	str	r3, [r5]
 	.loc 2 1439 0
-	ldr	r5, .L1767+112
+	ldr	r5, .L1762+112
 	str	r6, [r5]
 	mov	r6, r1
 	.loc 2 1440 0
-	ldr	r5, .L1767+116
+	ldr	r5, .L1762+116
 	str	r3, [r5]
 	.loc 2 1441 0
-	ldr	r5, .L1767+120
+	ldr	r5, .L1762+120
 	str	r3, [r5]
 	.loc 2 1442 0
-	ldr	r5, .L1767+124
+	ldr	r5, .L1762+124
 	.loc 2 1444 0
 	ldr	lr, [r4, #40]
 	.loc 2 1442 0
 	str	r3, [r5]
 	.loc 2 1444 0
-	ldr	r3, .L1767+128
+	ldr	r3, .L1762+128
 	ldr	r5, [r3]
 	cmp	lr, r5
 	mov	r5, r2
@@ -21116,7 +21089,7 @@ FtlLoadSysInfo:
 	it	hi
 	strhi	lr, [r3]
 	.loc 2 1447 0
-	ldr	r3, .L1767+132
+	ldr	r3, .L1762+132
 	ldr	r2, [r4, #36]
 	ldr	r1, [r3]
 	cmp	r2, r1
@@ -21126,47 +21099,47 @@ FtlLoadSysInfo:
 	.loc 2 1450 0
 	movw	r3, #65535
 	cmp	ip, r3
-	beq	.L1759
+	beq	.L1754
 	.loc 2 1451 0
-	ldr	r0, .L1767+80
+	ldr	r0, .L1762+80
 	bl	make_superblock
-.LVL1983:
-.L1759:
+.LVL1977:
+.L1754:
 	.loc 2 1453 0
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1760
+	beq	.L1755
 	.loc 2 1454 0
-	ldr	r0, .L1767+88
+	ldr	r0, .L1762+88
 	bl	make_superblock
-.LVL1984:
-.L1760:
+.LVL1978:
+.L1755:
 	.loc 2 1456 0
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1761
+	beq	.L1756
 	.loc 2 1457 0
-	ldr	r0, .L1767+92
+	ldr	r0, .L1762+92
 	bl	make_superblock
-.LVL1985:
-.L1761:
+.LVL1979:
+.L1756:
 	.loc 2 1459 0
 	ldrh	r2, [r7]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1762
+	beq	.L1757
 	.loc 2 1460 0
-	ldr	r0, .L1767+84
+	ldr	r0, .L1762+84
 	bl	make_superblock
-.LVL1986:
-.L1762:
+.LVL1980:
+.L1757:
 	.loc 2 1462 0
 	movs	r0, #0
-	b	.L1746
-.LVL1987:
-.L1752:
+	b	.L1741
+.LVL1981:
+.L1747:
 	.loc 2 1376 0
 	ldrh	r2, [r6]
 	.loc 2 1378 0
@@ -21182,34 +21155,34 @@ FtlLoadSysInfo:
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL1988:
+.LVL1982:
 	.loc 2 1381 0
 	ldr	r2, [r4]
 	ldr	r3, [sp, #4]
 	adds	r2, r2, #1
-	beq	.L1750
+	beq	.L1745
 	.loc 2 1382 0 discriminator 1
 	ldr	r2, [r8]
 	.loc 2 1381 0 discriminator 1
 	ldr	r2, [r2]
 	cmp	r2, r3
-	bne	.L1750
+	bne	.L1745
 	.loc 2 1383 0
 	ldr	r2, [r10]
 	ldrh	r1, [r2]
 	.loc 2 1382 0
 	movw	r2, #61604
 	cmp	r1, r2
-	beq	.L1751
-.L1750:
+	beq	.L1746
+.L1745:
 	subs	r7, r7, #1
-.LVL1989:
+.LVL1983:
 	sxth	r7, r7
-.LVL1990:
-	b	.L1749
-.L1768:
+.LVL1984:
+	b	.L1744
+.L1763:
 	.align	2
-.L1767:
+.L1762:
 	.word	.LANCHOR5
 	.word	.LANCHOR108
 	.word	.LANCHOR43
@@ -21273,117 +21246,117 @@ FtlSysBlkInit:
 	.cfi_offset 14, -4
 	.loc 2 2310 0
 	movs	r3, #0
-	ldr	r6, .L1785
+	ldr	r6, .L1780
 	strh	r3, [r6]	@ movhi
 	.loc 2 2312 0
-	ldr	r3, .L1785+4
+	ldr	r3, .L1780+4
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
-.LVL1991:
+.LVL1985:
 	.loc 2 2313 0
 	bl	FtlScanSysBlk
-.LVL1992:
+.LVL1986:
 	.loc 2 2314 0
-	ldr	r3, .L1785+8
+	ldr	r3, .L1780+8
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1770
-.L1772:
+	bne	.L1765
+.L1767:
 	.loc 2 2315 0
 	mov	r7, #-1
-.L1769:
+.L1764:
 	.loc 2 2398 0
 	mov	r0, r7
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1770:
+.L1765:
 	.loc 2 2317 0
 	bl	FtlLoadSysInfo
-.LVL1993:
+.LVL1987:
 	mov	r7, r0
 	cmp	r0, #0
-	bne	.L1772
+	bne	.L1767
 	.loc 2 2320 0
 	bl	FtlLoadMapInfo
-.LVL1994:
+.LVL1988:
 	.loc 2 2321 0
 	bl	FtlLoadVonderInfo
-.LVL1995:
+.LVL1989:
 	.loc 2 2322 0
 	bl	Ftl_load_ext_data
-.LVL1996:
+.LVL1990:
 	.loc 2 2324 0
 	bl	FtlLoadEctTbl
-.LVL1997:
+.LVL1991:
 	.loc 2 2325 0
 	bl	FtlFreeSysBLkSort
-.LVL1998:
+.LVL1992:
 	.loc 2 2327 0
 	bl	SupperBlkListInit
-.LVL1999:
+.LVL1993:
 	.loc 2 2328 0
 	bl	FtlPowerLostRecovery
-.LVL2000:
+.LVL1994:
 	.loc 2 2330 0
 	movs	r0, #1
 	bl	FtlUpdateVaildLpn
-.LVL2001:
+.LVL1995:
 .LBB305:
 .LBB306:
 	.loc 2 2332 0
-	ldr	r3, .L1785+12
+	ldr	r3, .L1780+12
 	.loc 2 2333 0
 	movs	r0, #12
 	.loc 2 2332 0
 	ldrh	r1, [r3]
 	.loc 2 2333 0
-	ldr	r3, .L1785+16
+	ldr	r3, .L1780+16
 	ldr	r2, [r3]
 	.loc 2 2332 0
 	mov	r3, r7
-.L1773:
-.LVL2002:
+.L1768:
+.LVL1996:
 	cmp	r3, r1
-	bge	.L1778
+	bge	.L1773
 	.loc 2 2333 0
 	mla	r4, r0, r3, r2
 	ldr	r4, [r4, #4]
 	cmp	r4, #0
-	bge	.L1774
-.L1778:
+	bge	.L1769
+.L1773:
 	.loc 2 2336 0
-	ldr	r4, .L1785+20
+	ldr	r4, .L1780+20
 	.loc 2 2338 0
 	cmp	r3, r1
-	ldr	r5, .L1785+24
+	ldr	r5, .L1780+24
 	.loc 2 2336 0
 	ldrh	r2, [r4, #28]
 	add	r2, r2, #1
 	strh	r2, [r4, #28]	@ movhi
 	.loc 2 2338 0
-	bge	.L1784
-.LVL2003:
-.L1775:
+	bge	.L1779
+.LVL1997:
+.L1770:
 	.loc 2 2340 0
-	ldr	r6, .L1785+28
+	ldr	r6, .L1780+28
 	.loc 2 2339 0
-	ldr	r0, .L1785+24
+	ldr	r0, .L1780+24
 	bl	FtlSuperblockPowerLostFix
-.LVL2004:
+.LVL1998:
 	.loc 2 2340 0
 	mov	r0, r6
 	bl	FtlSuperblockPowerLostFix
-.LVL2005:
+.LVL1999:
 .LBB307:
 	.loc 2 2346 0
-	ldr	r3, .L1785+32
+	ldr	r3, .L1780+32
 	ldrh	r1, [r5]
 	ldrh	r0, [r5, #4]
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
 	.loc 2 2347 0
-	ldr	r0, .L1785+36
+	ldr	r0, .L1780+36
 	.loc 2 2346 0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
 	.loc 2 2352 0
@@ -21399,7 +21372,7 @@ FtlSysBlkInit:
 	strb	r3, [r5, #6]
 	.loc 2 2349 0
 	strh	r3, [r5, #4]	@ movhi
-.LVL2006:
+.LVL2000:
 	.loc 2 2352 0
 	ldrh	r1, [r2, ip, lsl #1]
 	sub	r1, r1, lr
@@ -21408,7 +21381,7 @@ FtlSysBlkInit:
 	ldrh	r2, [r0]
 .LBE307:
 	.loc 2 2359 0
-	ldr	r0, .L1785+40
+	ldr	r0, .L1780+40
 .LBB308:
 	.loc 2 2354 0
 	strb	r3, [r6, #6]
@@ -21419,77 +21392,77 @@ FtlSysBlkInit:
 .LBE308:
 	.loc 2 2359 0
 	bl	FtlMapBlkWriteDump_data
-.LVL2007:
+.LVL2001:
 	.loc 2 2360 0
-	ldr	r0, .L1785+44
+	ldr	r0, .L1780+44
 	bl	FtlMapBlkWriteDump_data
-.LVL2008:
+.LVL2002:
 	.loc 2 2372 0
 	ldrh	r3, [r4, #30]
 	adds	r3, r3, #1
 	strh	r3, [r4, #30]	@ movhi
 	.loc 2 2373 0
 	bl	l2p_flush
-.LVL2009:
+.LVL2003:
 	.loc 2 2374 0
 	bl	FtlVpcTblFlush
-.LVL2010:
+.LVL2004:
 	.loc 2 2375 0
 	bl	FtlVpcTblFlush
-.LVL2011:
-	b	.L1779
-.LVL2012:
-.L1774:
+.LVL2005:
+	b	.L1774
+.LVL2006:
+.L1769:
 	.loc 2 2332 0
 	adds	r3, r3, #1
-.LVL2013:
-	b	.L1773
-.L1784:
+.LVL2007:
+	b	.L1768
+.L1779:
 	.loc 2 2338 0
 	ldrh	r3, [r6]
-.LVL2014:
+.LVL2008:
 	cmp	r3, #0
-	bne	.L1775
-.L1779:
+	bne	.L1770
+.L1774:
 	.loc 2 2379 0
 	ldrh	r0, [r5]
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1780
+	beq	.L1775
 	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1780
+	cbnz	r3, .L1775
 	.loc 2 2381 0
-	ldr	r5, .L1785+28
+	ldr	r5, .L1780+28
 	.loc 2 2380 0
 	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1780
+	cbnz	r3, .L1775
 	.loc 2 2382 0
 	bl	FtlGcRefreshBlock
-.LVL2015:
+.LVL2009:
 	.loc 2 2383 0
 	ldrh	r0, [r5]
 	bl	FtlGcRefreshBlock
-.LVL2016:
+.LVL2010:
 	.loc 2 2384 0
-	ldr	r0, .L1785+24
+	ldr	r0, .L1780+24
 	bl	allocate_new_data_superblock
-.LVL2017:
+.LVL2011:
 	.loc 2 2385 0
 	mov	r0, r5
 	bl	allocate_new_data_superblock
-.LVL2018:
-.L1780:
+.LVL2012:
+.L1775:
 	.loc 2 2390 0
 	ldrh	r3, [r4, #28]
 	lsls	r3, r3, #27
-	bne	.L1769
+	bne	.L1764
 	.loc 2 2391 0
 	bl	FtlVpcCheckAndModify
-.LVL2019:
-	b	.L1769
-.L1786:
+.LVL2013:
+	b	.L1764
+.L1781:
 	.align	2
-.L1785:
+.L1780:
 	.word	.LANCHOR162
 	.word	.LANCHOR4
 	.word	.LANCHOR81
@@ -21534,11 +21507,11 @@ ftl_low_format:
 	.loc 3 629 0
 	movs	r3, #0
 	.loc 3 631 0
-	ldr	r6, .L1811
+	ldr	r6, .L1806
 	.loc 3 630 0
-	ldr	r2, .L1811+4
+	ldr	r2, .L1806+4
 	.loc 3 629 0
-	ldr	r5, .L1811+8
+	ldr	r5, .L1806+8
 	.loc 3 631 0
 	ldrh	r0, [r6]
 	.loc 3 630 0
@@ -21547,96 +21520,96 @@ ftl_low_format:
 	str	r3, [r5]
 	.loc 3 631 0
 	bl	FtlFreeSysBlkQueueInit
-.LVL2020:
+.LVL2014:
 	.loc 3 632 0
 	bl	FtlLoadBbt
-.LVL2021:
-	cbz	r0, .L1788
+.LVL2015:
+	cbz	r0, .L1783
 	.loc 3 633 0
 	bl	FtlMakeBbt
-.LVL2022:
-.L1788:
+.LVL2016:
+.L1783:
 	.loc 3 635 0 discriminator 1
-	ldr	r3, .L1811+12
+	ldr	r3, .L1806+12
 	.loc 3 636 0 discriminator 1
-	ldr	r2, .L1811+16
+	ldr	r2, .L1806+16
 	.loc 3 637 0 discriminator 1
-	ldr	ip, .L1811+100
+	ldr	ip, .L1806+100
 	.loc 3 635 0 discriminator 1
 	ldrh	r1, [r3]
 	.loc 3 636 0 discriminator 1
 	ldr	r4, [r2]
 	.loc 3 637 0 discriminator 1
-	ldr	r2, .L1811+20
+	ldr	r2, .L1806+20
 	str	r3, [sp, #4]
 	.loc 3 635 0 discriminator 1
 	lsls	r1, r1, #7
 	.loc 3 637 0 discriminator 1
 	ldr	r7, [r2]
 	movs	r2, #0
-.L1789:
-.LVL2023:
+.L1784:
+.LVL2017:
 	.loc 3 635 0 discriminator 1
 	uxth	r3, r2
 	adds	r2, r2, #1
-.LVL2024:
+.LVL2018:
 	cmp	r3, r1
-	blt	.L1790
-.LVL2025:
+	blt	.L1785
+.LVL2019:
 	.loc 3 642 0
-	ldr	r3, .L1811+24
-.LVL2026:
+	ldr	r3, .L1806+24
+.LVL2020:
 	.loc 3 641 0
 	movs	r7, #0
 	.loc 3 642 0
-	ldr	r10, .L1811+104
+	ldr	r10, .L1806+104
 	ldrh	r4, [r3]
-.LVL2027:
+.LVL2021:
 	mov	r8, r3
 	mov	fp, r10
-.LVL2028:
-.L1791:
+.LVL2022:
+.L1786:
 	.loc 3 642 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r10]
 	cmp	r3, r4
-	bhi	.L1792
+	bhi	.L1787
 	.loc 3 645 0 is_stmt 1
-	ldr	r4, .L1811+28
-.LVL2029:
+	ldr	r4, .L1806+28
+.LVL2023:
 	subs	r3, r7, #2
 	ldrh	r1, [r4]
 	cmp	r3, r1, lsl #1
-	bgt	.L1793
-.LVL2030:
-.L1797:
+	bgt	.L1788
+.LVL2024:
+.L1792:
 	.loc 3 641 0
 	movs	r6, #0
 	mov	r7, r6
-.L1794:
+.L1789:
 	.loc 3 656 0 discriminator 1
 	ldrh	r3, [r8]
 	uxth	r0, r6
-.LVL2031:
+.LVL2025:
 	adds	r6, r6, #1
 	cmp	r3, r0
-	bhi	.L1798
+	bhi	.L1793
 	.loc 3 658 0
 	ldrh	r2, [fp]
-	ldr	r3, .L1811+32
+	ldr	r3, .L1806+32
 	.loc 3 661 0
 	ldrh	r4, [r4]
-	ldr	r6, .L1811+36
+	ldr	r6, .L1806+36
 	.loc 3 658 0
 	str	r2, [r3]
 	.loc 3 661 0
-	ldr	r3, .L1811+40
+	ldr	r3, .L1806+40
 	mov	r1, r4
 	ldr	r2, [r3]
 	mov	r0, r2
-.LVL2032:
+.LVL2026:
 	str	r2, [sp, #12]
 	bl	__aeabi_uidiv
-.LVL2033:
+.LVL2027:
 	.loc 3 662 0
 	ubfx	r10, r0, #5, #16
 	.loc 3 661 0
@@ -21644,21 +21617,21 @@ ftl_low_format:
 	str	r0, [r6]
 	.loc 3 662 0
 	add	r1, r10, #36
-	ldr	r0, .L1811+44
+	ldr	r0, .L1806+44
 	strh	r1, [r0]	@ movhi
 	.loc 3 663 0
 	movs	r1, #24
 	muls	r1, r4, r1
 	str	r0, [sp]
 	cmp	r7, r1
-	ble	.L1799
+	ble	.L1794
 	.loc 3 664 0
 	ldr	r2, [sp, #12]
 	mov	r1, r4
 	str	r3, [sp, #8]
 	subs	r0, r2, r7
 	bl	__aeabi_uidiv
-.LVL2034:
+.LVL2028:
 	.loc 3 665 0
 	ldr	r3, [sp]
 	.loc 3 664 0
@@ -21668,13 +21641,13 @@ ftl_low_format:
 	adds	r0, r0, #24
 	strh	r0, [r3]	@ movhi
 	ldr	r3, [sp, #8]
-.L1799:
+.L1794:
 	.loc 3 668 0
-	ldr	r2, .L1811+48
+	ldr	r2, .L1806+48
 	ldrh	r2, [r2]
-	cbz	r2, .L1801
+	cbz	r2, .L1796
 	.loc 3 669 0
-	ldr	r1, .L1811+44
+	ldr	r1, .L1806+44
 	ldrh	r0, [r1]
 	add	r0, r0, r2, lsr #1
 	strh	r0, [r1]	@ movhi
@@ -21689,20 +21662,20 @@ ftl_low_format:
 	.loc 3 672 0
 	addlt	r2, r2, r10
 	strhlt	r2, [r1]	@ movhi
-.L1801:
+.L1796:
 	.loc 3 677 0
 	ldr	r3, [sp]
-	ldr	r7, .L1811+52
-.LVL2035:
+	ldr	r7, .L1806+52
+.LVL2029:
 	.loc 3 687 0
-	ldr	r10, .L1811+108
+	ldr	r10, .L1806+108
 	.loc 3 677 0
 	ldrh	r2, [r3]
 	ldr	r3, [r6]
 	subs	r3, r3, r2
 	muls	r4, r3, r4
 	.loc 3 678 0
-	ldr	r3, .L1811+56
+	ldr	r3, .L1806+56
 	ldrh	r3, [r3]
 	.loc 3 677 0
 	str	r4, [r7]
@@ -21714,25 +21687,25 @@ ftl_low_format:
 	.loc 3 678 0
 	str	r4, [r6]
 	.loc 3 694 0
-	ldr	r6, .L1811+60
+	ldr	r6, .L1806+60
 	.loc 3 679 0
 	muls	r4, r3, r4
-	ldr	r3, .L1811+64
+	ldr	r3, .L1806+64
 	str	r4, [r3]
 	.loc 3 689 0
 	movw	r4, #65535
 	.loc 3 684 0
 	bl	FtlBbmTblFlush
-.LVL2036:
+.LVL2030:
 	.loc 3 687 0
 	ldrh	r2, [fp]
 	movs	r1, #0
 	ldr	r0, [r10]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-.LVL2037:
+.LVL2031:
 	.loc 3 688 0
-	ldr	r2, .L1811+68
+	ldr	r2, .L1806+68
 	movs	r3, #0
 	.loc 3 694 0
 	strh	r3, [r6, #2]	@ movhi
@@ -21743,7 +21716,7 @@ ftl_low_format:
 	.loc 3 688 0
 	str	r3, [r2]
 	.loc 3 689 0
-	ldr	r2, .L1811+72
+	ldr	r2, .L1806+72
 	.loc 3 696 0
 	strh	r3, [r6]	@ movhi
 	.loc 3 690 0
@@ -21764,21 +21737,21 @@ ftl_low_format:
 	.loc 3 701 0
 	mov	r10, r6
 	.loc 3 698 0
-	ldr	r3, .L1811+76
+	ldr	r3, .L1806+76
 	lsrs	r2, r2, #3
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL2038:
-.L1803:
+.LVL2032:
+.L1798:
 	.loc 3 701 0
 	mov	r0, r10
 	bl	make_superblock
-.LVL2039:
+.LVL2033:
 	.loc 3 702 0
 	ldrb	r3, [r6, #7]	@ zero_extendqisi2
 	ldrh	r2, [r6]
 	cmp	r3, #0
-	bne	.L1804
+	bne	.L1799
 	.loc 3 705 0
 	ldr	r3, [r8]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
@@ -21787,92 +21760,92 @@ ftl_low_format:
 	adds	r3, r3, #1
 	strh	r3, [r6]	@ movhi
 	.loc 3 707 0
-	b	.L1803
-.LVL2040:
-.L1790:
+	b	.L1798
+.LVL2034:
+.L1785:
 	.loc 3 636 0 discriminator 3
 	mvns	r0, r3
 	orr	r0, r3, r0, lsl #16
 	str	r0, [r4, r3, lsl #2]
 	.loc 3 637 0 discriminator 3
 	str	ip, [r7, r3, lsl #2]
-.LVL2041:
-	b	.L1789
-.LVL2042:
-.L1792:
+.LVL2035:
+	b	.L1784
+.LVL2036:
+.L1787:
 	.loc 3 643 0 discriminator 3
 	mov	r0, r4
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
-.LVL2043:
+.LVL2037:
 	.loc 3 642 0 discriminator 3
 	adds	r4, r4, #1
-.LVL2044:
+.LVL2038:
 	.loc 3 643 0 discriminator 3
 	add	r7, r7, r0
-.LVL2045:
+.LVL2039:
 	uxth	r7, r7
-.LVL2046:
+.LVL2040:
 	.loc 3 642 0 discriminator 3
 	uxth	r4, r4
-.LVL2047:
-	b	.L1791
-.LVL2048:
-.L1793:
+.LVL2041:
+	b	.L1786
+.LVL2042:
+.L1788:
 	.loc 3 647 0
 	mov	r0, r7
 	bl	__aeabi_uidiv
-.LVL2049:
-	ldr	r3, .L1811+80
+.LVL2043:
+	ldr	r3, .L1806+80
 	ldr	r3, [r3]
 	add	r0, r0, r3
 	uxth	r0, r0
 	bl	FtlSysBlkNumInit
-.LVL2050:
+.LVL2044:
 	.loc 3 648 0
 	ldrh	r0, [r6]
 	bl	FtlFreeSysBlkQueueInit
-.LVL2051:
+.LVL2045:
 	.loc 3 650 0
 	ldrh	r6, [r8]
-.LVL2052:
-.L1795:
+.LVL2046:
+.L1790:
 	.loc 3 650 0 is_stmt 0 discriminator 1
 	ldrh	r3, [fp]
 	cmp	r3, r6
-	bls	.L1797
+	bls	.L1792
 	.loc 3 651 0 is_stmt 1 discriminator 3
 	mov	r0, r6
 	movs	r1, #1
 	.loc 3 650 0 discriminator 3
 	adds	r6, r6, #1
-.LVL2053:
+.LVL2047:
 	.loc 3 651 0 discriminator 3
 	bl	FtlLowFormatEraseBlock
-.LVL2054:
+.LVL2048:
 	.loc 3 650 0 discriminator 3
 	uxth	r6, r6
-.LVL2055:
-	b	.L1795
-.LVL2056:
-.L1798:
+.LVL2049:
+	b	.L1790
+.LVL2050:
+.L1793:
 	.loc 3 657 0 discriminator 3
 	movs	r1, #0
 	bl	FtlLowFormatEraseBlock
-.LVL2057:
+.LVL2051:
 	add	r7, r7, r0
-.LVL2058:
+.LVL2052:
 	uxth	r7, r7
-.LVL2059:
-	b	.L1794
-.LVL2060:
-.L1804:
+.LVL2053:
+	b	.L1789
+.LVL2054:
+.L1799:
 	.loc 3 709 0
 	ldr	r3, [r5]
 	.loc 3 710 0
 	ldrh	r1, [r6, #4]
 	.loc 3 712 0
-	ldr	r4, .L1811+84
+	ldr	r4, .L1806+84
 	.loc 3 709 0
 	str	r3, [r6, #12]
 	adds	r3, r3, #1
@@ -21898,15 +21871,15 @@ ftl_low_format:
 	.loc 3 715 0
 	movs	r3, #1
 	strb	r3, [r4, #8]
-.L1805:
+.L1800:
 	.loc 3 717 0
 	mov	r0, r10
 	bl	make_superblock
-.LVL2061:
+.LVL2055:
 	.loc 3 718 0
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r4]
-	cbnz	r3, .L1806
+	cbnz	r3, .L1801
 	.loc 3 721 0
 	ldr	r3, [r8]
 	strh	r6, [r3, r2, lsl #1]	@ movhi
@@ -21915,8 +21888,8 @@ ftl_low_format:
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
 	.loc 3 723 0
-	b	.L1805
-.L1806:
+	b	.L1800
+.L1801:
 	.loc 3 725 0
 	ldr	r3, [r5]
 	.loc 3 726 0
@@ -21931,12 +21904,12 @@ ftl_low_format:
 	ldr	r3, [r8]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
 	.loc 3 727 0
-	ldr	r3, .L1811+88
+	ldr	r3, .L1806+88
 	strh	r4, [r3]	@ movhi
 	.loc 3 730 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL2062:
-	ldr	r3, .L1811+92
+.LVL2056:
+	ldr	r3, .L1806+92
 	.loc 3 731 0
 	movs	r2, #0
 	strh	r2, [r3, #2]	@ movhi
@@ -21955,25 +21928,25 @@ ftl_low_format:
 	str	r2, [r5]
 	.loc 3 735 0
 	bl	FtlVpcTblFlush
-.LVL2063:
+.LVL2057:
 	.loc 3 736 0
 	bl	FtlSysBlkInit
-.LVL2064:
-	cbnz	r0, .L1807
+.LVL2058:
+	cbnz	r0, .L1802
 	.loc 3 737 0
-	ldr	r3, .L1811+96
+	ldr	r3, .L1806+96
 	movs	r2, #1
 	str	r2, [r3]
-.L1807:
+.L1802:
 	.loc 3 739 0
 	movs	r0, #0
 	add	sp, sp, #16
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1812:
+.L1807:
 	.align	2
-.L1811:
+.L1806:
 	.word	.LANCHOR4
 	.word	.LANCHOR72
 	.word	.LANCHOR71
@@ -22019,76 +21992,76 @@ sftl_init:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2065:
+.LVL2059:
 	push	{r4, lr}
 	.cfi_def_cfa_offset 8
 	.cfi_offset 4, -8
 	.cfi_offset 14, -4
 	.loc 3 746 0
 	mov	r3, #-1
-	ldr	r4, .L1819
+	ldr	r4, .L1814
 	.loc 3 749 0
-	ldr	r1, .L1819+4
-	ldr	r0, .L1819+8
+	ldr	r1, .L1814+4
+	ldr	r0, .L1814+8
 	.loc 3 746 0
 	str	r3, [r4]
 	.loc 3 749 0
 	bl	printf
-.LVL2066:
+.LVL2060:
 	.loc 3 750 0
-	ldr	r0, .L1819+12
+	ldr	r0, .L1814+12
 	bl	FtlConstantsInit
-.LVL2067:
+.LVL2061:
 	.loc 3 751 0
 	bl	FtlMemInit
-.LVL2068:
+.LVL2062:
 	.loc 3 752 0
 	bl	FtlVariablesInit
-.LVL2069:
+.LVL2063:
 	.loc 3 753 0
-	ldr	r3, .L1819+16
+	ldr	r3, .L1814+16
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
-.LVL2070:
+.LVL2064:
 .LDL2:
 	.loc 3 756 0
 	bl	FtlLoadBbt
-.LVL2071:
-	cbnz	r0, .L1817
+.LVL2065:
+	cbnz	r0, .L1812
 	.loc 3 767 0
 	bl	FtlSysBlkInit
-.LVL2072:
-	cbnz	r0, .L1817
+.LVL2066:
+	cbnz	r0, .L1812
 	.loc 3 779 0
 	movs	r3, #1
 	str	r3, [r4]
 	.loc 3 783 0
-	ldr	r3, .L1819+20
+	ldr	r3, .L1814+20
 	ldrh	r3, [r3]
 	cmp	r3, #15
-	bhi	.L1817
+	bhi	.L1812
 	movw	r4, #8129
-.L1816:
-.LVL2073:
+.L1811:
+.LVL2067:
 .LBB309:
 	.loc 3 786 0 discriminator 3
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
-.LVL2074:
+.LVL2068:
 	.loc 3 785 0 discriminator 3
 	subs	r4, r4, #1
-.LVL2075:
-	bne	.L1816
-.LVL2076:
-.L1817:
+.LVL2069:
+	bne	.L1811
+.LVL2070:
+.L1812:
 .LBE309:
 	.loc 3 794 0
 	movs	r0, #0
 	pop	{r4, pc}
-.L1820:
+.L1815:
 	.align	2
-.L1819:
+.L1814:
 	.word	.LANCHOR88
 	.word	.LC70
 	.word	.LC71
@@ -22113,10 +22086,10 @@ ftl_memcmp:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL2077:
+.LVL2071:
 	.loc 1 253 0
 	b	memcmp
-.LVL2078:
+.LVL2072:
 	.cfi_endproc
 .LFE351:
 	.size	ftl_memcmp, .-ftl_memcmp
@@ -23800,7 +23773,7 @@ __func__.9940:
 	.file 31 "include/log.h"
 	.section	.debug_info,"",%progbits
 .Ldebug_info0:
-	.4byte	0x92b3
+	.4byte	0x92b5
 	.2byte	0x4
 	.4byte	.Ldebug_abbrev0
 	.byte	0x4
@@ -28014,8 +27987,8 @@ __func__.9940:
 	.4byte	0x7b
 	.4byte	.LLST457
 	.uleb128 0x2d
-	.4byte	.LVL2078
-	.4byte	0x9266
+	.4byte	.LVL2072
+	.4byte	0x9268
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28069,7 +28042,7 @@ __func__.9940:
 	.4byte	.LLST289
 	.uleb128 0x2d
 	.4byte	.LVL1162
-	.4byte	0x9271
+	.4byte	0x9273
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28123,7 +28096,7 @@ __func__.9940:
 	.4byte	.LLST193
 	.uleb128 0x2d
 	.4byte	.LVL698
-	.4byte	0x927d
+	.4byte	0x927f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28353,7 +28326,7 @@ __func__.9940:
 	.byte	0x58
 	.uleb128 0x34
 	.4byte	.LVL630
-	.4byte	0x842d
+	.4byte	0x842f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -28488,7 +28461,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL619
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x2620
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -28499,7 +28472,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL620
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x2637
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -28510,7 +28483,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x34
 	.4byte	.LVL621
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28521,7 +28494,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL611
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x2671
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -28544,7 +28517,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL612
-	.4byte	0x842d
+	.4byte	0x842f
 	.4byte	0x2693
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -28667,7 +28640,7 @@ __func__.9940:
 	.4byte	__func__.10310
 	.uleb128 0x32
 	.4byte	.LVL568
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x2784
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -28690,7 +28663,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL569
-	.4byte	0x842d
+	.4byte	0x842f
 	.4byte	0x27a6
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -28844,7 +28817,7 @@ __func__.9940:
 	.4byte	.LLST152
 	.uleb128 0x43
 	.4byte	.LVL557
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x28e2
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -28855,7 +28828,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL558
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x2905
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -28878,10 +28851,10 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x44
 	.4byte	.LVL560
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x34
 	.4byte	.LVL562
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28911,7 +28884,7 @@ __func__.9940:
 	.4byte	.LLST143
 	.uleb128 0x2d
 	.4byte	.LVL552
-	.4byte	0x9294
+	.4byte	0x9296
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28952,7 +28925,7 @@ __func__.9940:
 	.4byte	.LLST142
 	.uleb128 0x2d
 	.4byte	.LVL550
-	.4byte	0x929f
+	.4byte	0x92a1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29222,7 +29195,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL539
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x2c15
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -29266,7 +29239,7 @@ __func__.9940:
 	.4byte	.LLST137
 	.uleb128 0x34
 	.4byte	.LVL535
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29372,7 +29345,7 @@ __func__.9940:
 	.4byte	0x2d93
 	.uleb128 0x44
 	.4byte	.LVL1708
-	.4byte	0x6ede
+	.4byte	0x6ee0
 	.uleb128 0x32
 	.4byte	.LVL1709
 	.4byte	0x2f42
@@ -29722,10 +29695,10 @@ __func__.9940:
 	.4byte	0x6657
 	.uleb128 0x44
 	.4byte	.LVL1669
-	.4byte	0x6ede
+	.4byte	0x6ee0
 	.uleb128 0x32
 	.4byte	.LVL1670
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x303b
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -29768,7 +29741,7 @@ __func__.9940:
 	.4byte	0x4d75
 	.uleb128 0x32
 	.4byte	.LVL1679
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x3090
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -30037,7 +30010,7 @@ __func__.9940:
 	.4byte	__func__.9870
 	.uleb128 0x32
 	.4byte	.LVL1259
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x32bf
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -30054,7 +30027,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1263
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x32df
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -30144,7 +30117,7 @@ __func__.9940:
 	.4byte	__func__.9850
 	.uleb128 0x32
 	.4byte	.LVL490
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x33be
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -30167,7 +30140,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL491
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x33e5
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -30190,7 +30163,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL492
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x340c
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -30213,7 +30186,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x34
 	.4byte	.LVL496
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30265,7 +30238,7 @@ __func__.9940:
 	.4byte	__func__.9843
 	.uleb128 0x32
 	.4byte	.LVL1595
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x349e
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -30422,7 +30395,7 @@ __func__.9940:
 	.4byte	.LLST302
 	.uleb128 0x34
 	.4byte	.LVL1215
-	.4byte	0x8487
+	.4byte	0x8489
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30437,7 +30410,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1186
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x3621
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -30471,7 +30444,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1192
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x365f
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -30516,7 +30489,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1195
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x36ae
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -30539,7 +30512,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1198
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x36d5
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -30562,7 +30535,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1200
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x36fc
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -30585,7 +30558,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1201
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x3723
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -30663,7 +30636,7 @@ __func__.9940:
 	.4byte	0x688f
 	.uleb128 0x34
 	.4byte	.LVL1224
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30766,7 +30739,7 @@ __func__.9940:
 	.4byte	0x38fb
 	.uleb128 0x34
 	.4byte	.LVL478
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30947,7 +30920,7 @@ __func__.9940:
 	.4byte	.LLST239
 	.uleb128 0x32
 	.4byte	.LVL909
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x3a26
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -30986,7 +30959,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL912
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x3a5f
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -31024,7 +30997,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x34
 	.4byte	.LVL915
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31098,7 +31071,7 @@ __func__.9940:
 	.4byte	.LLST270
 	.uleb128 0x34
 	.4byte	.LVL1080
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31115,7 +31088,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1073
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x3b60
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -31155,7 +31128,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1085
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x3ba8
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -31203,7 +31176,7 @@ __func__.9940:
 	.4byte	0x6189
 	.uleb128 0x34
 	.4byte	.LVL1092
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31270,7 +31243,7 @@ __func__.9940:
 	.4byte	__func__.9722
 	.uleb128 0x32
 	.4byte	.LVL1577
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x3c81
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -31323,7 +31296,7 @@ __func__.9940:
 	.4byte	0x6189
 	.uleb128 0x32
 	.4byte	.LVL1587
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x3cda
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -31605,7 +31578,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x34
 	.4byte	.LVL1070
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31672,7 +31645,7 @@ __func__.9940:
 	.4byte	__func__.9676
 	.uleb128 0x32
 	.4byte	.LVL271
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x3faa
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -32242,7 +32215,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1314
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x443b
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -32265,7 +32238,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1315
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x4462
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -32428,7 +32401,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1396
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x4567
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -32490,7 +32463,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1420
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x45bd
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -32591,7 +32564,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL900
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x46ac
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -33029,7 +33002,7 @@ __func__.9940:
 	.byte	0x3
 	.4byte	__func__.9522
 	.uleb128 0x32
-	.4byte	.LVL1972
+	.4byte	.LVL1966
 	.4byte	0x230c
 	.4byte	0x49f3
 	.uleb128 0x2e
@@ -33039,7 +33012,7 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1973
+	.4byte	.LVL1967
 	.4byte	0x6078
 	.4byte	0x4a06
 	.uleb128 0x2e
@@ -33049,8 +33022,8 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1975
-	.4byte	0x9289
+	.4byte	.LVL1969
+	.4byte	0x928b
 	.4byte	0x4a2d
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -33072,8 +33045,8 @@ __func__.9940:
 	.2byte	0x56c
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1976
-	.4byte	0x9289
+	.4byte	.LVL1970
+	.4byte	0x928b
 	.4byte	0x4a54
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -33095,7 +33068,7 @@ __func__.9940:
 	.2byte	0x56e
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1978
+	.4byte	.LVL1972
 	.4byte	0x22a6
 	.4byte	0x4a6e
 	.uleb128 0x2e
@@ -33112,14 +33085,14 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1979
+	.4byte	.LVL1973
 	.4byte	0x22a6
 	.uleb128 0x44
-	.4byte	.LVL1980
+	.4byte	.LVL1974
 	.4byte	0x22a6
 	.uleb128 0x32
-	.4byte	.LVL1982
-	.4byte	0x9289
+	.4byte	.LVL1976
+	.4byte	0x928b
 	.4byte	0x4aa7
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -33141,7 +33114,7 @@ __func__.9940:
 	.2byte	0x584
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1983
+	.4byte	.LVL1977
 	.4byte	0x3f2e
 	.4byte	0x4abe
 	.uleb128 0x2e
@@ -33152,7 +33125,7 @@ __func__.9940:
 	.4byte	.LANCHOR51
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1984
+	.4byte	.LVL1978
 	.4byte	0x3f2e
 	.4byte	0x4ad2
 	.uleb128 0x2e
@@ -33163,7 +33136,7 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1985
+	.4byte	.LVL1979
 	.4byte	0x3f2e
 	.4byte	0x4ae6
 	.uleb128 0x2e
@@ -33174,7 +33147,7 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1986
+	.4byte	.LVL1980
 	.4byte	0x3f2e
 	.4byte	0x4afa
 	.uleb128 0x2e
@@ -33185,7 +33158,7 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1988
+	.4byte	.LVL1982
 	.4byte	0x26b9
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -33447,7 +33420,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL964
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x4d17
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -33470,7 +33443,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL973
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x4d3e
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -33503,7 +33476,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x34
 	.4byte	.LVL984
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33664,7 +33637,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1571
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x4ea3
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -33687,7 +33660,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1574
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x4ec0
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -34227,7 +34200,7 @@ __func__.9940:
 	.4byte	.L741
 	.uleb128 0x32
 	.4byte	.LVL880
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x5331
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -34347,7 +34320,7 @@ __func__.9940:
 	.4byte	__func__.9353
 	.uleb128 0x34
 	.4byte	.LVL233
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34470,7 +34443,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL836
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x554a
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -34493,7 +34466,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL837
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x5571
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -34557,7 +34530,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL844
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x55c3
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -34568,7 +34541,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x34
 	.4byte	.LVL845
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34642,7 +34615,7 @@ __func__.9940:
 	.4byte	__func__.9314
 	.uleb128 0x32
 	.4byte	.LVL813
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x5699
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -34853,7 +34826,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL864
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x5835
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -35063,7 +35036,7 @@ __func__.9940:
 	.4byte	__func__.9257
 	.uleb128 0x32
 	.4byte	.LVL776
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x59ff
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -35118,7 +35091,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL782
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x5a54
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -35178,7 +35151,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x34
 	.4byte	.LVL785
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -35404,7 +35377,7 @@ __func__.9940:
 	.4byte	__func__.9216
 	.uleb128 0x34
 	.4byte	.LVL168
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36488,7 +36461,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1445
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x659c
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -36511,7 +36484,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x44
 	.4byte	.LVL1446
-	.4byte	0x7ae3
+	.4byte	0x7ae5
 	.uleb128 0x32
 	.4byte	.LVL1454
 	.4byte	0x26b9
@@ -36679,7 +36652,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1169
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x6704
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -36757,7 +36730,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1174
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x6779
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -36768,7 +36741,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1175
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x6796
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -36837,7 +36810,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x34
 	.4byte	.LVL767
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36940,7 +36913,7 @@ __func__.9940:
 	.4byte	.LLST16
 	.uleb128 0x34
 	.4byte	.LVL45
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36999,7 +36972,7 @@ __func__.9940:
 	.4byte	0x6989
 	.4byte	.LLST447
 	.uleb128 0x2d
-	.4byte	.LVL1971
+	.4byte	.LVL1965
 	.4byte	0x6b02
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -37062,7 +37035,7 @@ __func__.9940:
 	.4byte	.LLST429
 	.uleb128 0x2d
 	.4byte	.LVL1870
-	.4byte	0x7108
+	.4byte	0x710a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37155,7 +37128,7 @@ __func__.9940:
 	.4byte	.LLST390
 	.uleb128 0x44
 	.4byte	.LVL1635
-	.4byte	0x6ede
+	.4byte	0x6ee0
 	.uleb128 0x44
 	.4byte	.LVL1645
 	.4byte	0x537a
@@ -37222,7 +37195,7 @@ __func__.9940:
 	.4byte	.LFE220-.LFB220
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6ede
+	.4byte	0x6ee0
 	.uleb128 0x5d
 	.ascii	"LUN\000"
 	.byte	0x3
@@ -37339,7 +37312,7 @@ __func__.9940:
 	.byte	0x91
 	.sleb128 -52
 	.uleb128 0x32
-	.4byte	.LVL1954
+	.4byte	.LVL1952
 	.4byte	0x26b9
 	.4byte	0x6c5e
 	.uleb128 0x2e
@@ -37360,8 +37333,8 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1956
-	.4byte	0x9289
+	.4byte	.LVL1954
+	.4byte	0x928b
 	.4byte	0x6c7b
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -37377,8 +37350,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1957
-	.4byte	0x9289
+	.4byte	.LVL1955
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37402,7 +37375,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1875
 	.4byte	0x5156
-	.4byte	0x6cc4
+	.4byte	0x6cc3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37419,18 +37392,104 @@ __func__.9940:
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
+	.uleb128 0x3
+	.byte	0x7d
+	.sleb128 0
+	.byte	0x6
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1887
+	.4byte	0x6ee0
+	.uleb128 0x32
+	.4byte	.LVL1890
+	.4byte	0x29fd
+	.4byte	0x6ced
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
 	.uleb128 0x4
 	.byte	0x91
-	.sleb128 -92
+	.sleb128 -84
+	.byte	0x6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x7
+	.byte	0x91
+	.sleb128 -76
 	.byte	0x6
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1892
+	.4byte	0x5b34
+	.4byte	0x6d00
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1887
-	.4byte	0x6ede
+	.4byte	.LVL1893
+	.4byte	0x2c26
 	.uleb128 0x32
-	.4byte	.LVL1889
-	.4byte	0x9289
-	.4byte	0x6cf4
+	.4byte	.LVL1894
+	.4byte	0x29fd
+	.4byte	0x6d21
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1895
+	.4byte	0x29fd
+	.4byte	0x6d39
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1903
+	.4byte	0x22a6
+	.4byte	0x6d54
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x7d
+	.sleb128 0
+	.byte	0x6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1911
+	.4byte	0x6ee0
+	.uleb128 0x32
+	.4byte	.LVL1914
+	.4byte	0x928b
+	.4byte	0x6d84
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37451,12 +37510,12 @@ __func__.9940:
 	.2byte	0x3f4
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1890
-	.4byte	0x6ede
+	.4byte	.LVL1915
+	.4byte	0x6ee0
 	.uleb128 0x32
-	.4byte	.LVL1892
+	.4byte	.LVL1917
 	.4byte	0x3430
-	.4byte	0x6d14
+	.4byte	0x6da4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37465,9 +37524,9 @@ __func__.9940:
 	.4byte	.LANCHOR52
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1893
+	.4byte	.LVL1918
 	.4byte	0x3430
-	.4byte	0x6d2b
+	.4byte	0x6dbb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37476,9 +37535,9 @@ __func__.9940:
 	.4byte	.LANCHOR51
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1895
+	.4byte	.LVL1920
 	.4byte	0x3430
-	.4byte	0x6d3f
+	.4byte	0x6dcf
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37487,9 +37546,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1898
-	.4byte	0x9289
-	.4byte	0x6d66
+	.4byte	.LVL1923
+	.4byte	0x928b
+	.4byte	0x6df6
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37510,94 +37569,55 @@ __func__.9940:
 	.2byte	0x415
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1907
-	.4byte	0x29fd
-	.4byte	0x6d85
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
+	.4byte	.LVL1926
+	.4byte	0x6f0f
+	.4byte	0x6e17
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x8
+	.uleb128 0x4
 	.byte	0x91
-	.sleb128 -76
-	.byte	0x6
-	.byte	0x7d
-	.sleb128 0
+	.sleb128 -92
 	.byte	0x6
-	.byte	0x1c
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1909
-	.4byte	0x5b34
-	.4byte	0x6d98
 	.uleb128 0x2e
 	.uleb128 0x1
-	.byte	0x50
+	.byte	0x52
 	.uleb128 0x1
 	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1910
-	.4byte	0x2c26
-	.uleb128 0x32
-	.4byte	.LVL1911
-	.4byte	0x29fd
-	.4byte	0x6db9
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
 	.uleb128 0x2e
 	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1912
-	.4byte	0x29fd
-	.4byte	0x6dd1
+	.4byte	.LVL1927
+	.4byte	0x928b
+	.4byte	0x6e3e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1921
-	.4byte	0x22a6
-	.4byte	0x6ded
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -92
-	.byte	0x6
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR180
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x46e
 	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1930
-	.4byte	0x6ede
 	.uleb128 0x32
-	.4byte	.LVL1932
+	.4byte	.LVL1930
 	.4byte	0x3430
-	.4byte	0x6e0a
+	.4byte	0x6e52
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37606,9 +37626,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1935
+	.4byte	.LVL1933
 	.4byte	0x5279
-	.4byte	0x6e29
+	.4byte	0x6e71
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37628,9 +37648,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1936
+	.4byte	.LVL1934
 	.4byte	0x333e
-	.4byte	0x6e3d
+	.4byte	0x6e85
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37639,15 +37659,15 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1941
+	.4byte	.LVL1939
 	.4byte	0x230c
-	.4byte	0x6e58
+	.4byte	0x6ea0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x4
 	.byte	0x91
-	.sleb128 -84
+	.sleb128 -88
 	.byte	0x6
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -37656,9 +37676,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1950
-	.4byte	0x9289
-	.4byte	0x6e7f
+	.4byte	.LVL1948
+	.4byte	0x928b
+	.4byte	0x6ec7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37679,62 +37699,17 @@ __func__.9940:
 	.2byte	0x45f
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1955
+	.4byte	.LVL1953
 	.4byte	0x22a6
-	.uleb128 0x32
-	.4byte	.LVL1959
+	.uleb128 0x34
+	.4byte	.LVL1957
 	.4byte	0x230c
-	.4byte	0x6e9b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x1
 	.byte	0x30
 	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1962
-	.4byte	0x6f0d
-	.4byte	0x6eba
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL1963
-	.4byte	0x9289
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR180
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x46e
-	.byte	0
 	.byte	0
 	.uleb128 0x48
 	.4byte	.LASF835
@@ -37745,10 +37720,10 @@ __func__.9940:
 	.4byte	.LFE219-.LFB219
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6f0d
+	.4byte	0x6f0f
 	.uleb128 0x34
 	.4byte	.LVL1626
-	.4byte	0x6f0d
+	.4byte	0x6f0f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -37769,7 +37744,7 @@ __func__.9940:
 	.4byte	.LFE218-.LFB218
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x70f3
+	.4byte	0x70f5
 	.uleb128 0x5d
 	.ascii	"req\000"
 	.byte	0x3
@@ -37834,14 +37809,14 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x7103
+	.4byte	0x7105
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.8923
 	.uleb128 0x32
 	.4byte	.LVL1607
 	.4byte	0x251a
-	.4byte	0x6fec
+	.4byte	0x6fee
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37867,7 +37842,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1610
 	.4byte	0x3430
-	.4byte	0x7009
+	.4byte	0x700b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37881,7 +37856,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1612
 	.4byte	0x333e
-	.4byte	0x7026
+	.4byte	0x7028
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37892,7 +37867,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1613
 	.4byte	0x251a
-	.4byte	0x7044
+	.4byte	0x7046
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37912,8 +37887,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1614
-	.4byte	0x9289
-	.4byte	0x706b
+	.4byte	0x928b
+	.4byte	0x706d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37936,7 +37911,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1615
 	.4byte	0x5279
-	.4byte	0x7084
+	.4byte	0x7086
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -37952,7 +37927,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1617
 	.4byte	0x6189
-	.4byte	0x709e
+	.4byte	0x70a0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37968,8 +37943,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1620
-	.4byte	0x9289
-	.4byte	0x70bb
+	.4byte	0x928b
+	.4byte	0x70bd
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37986,7 +37961,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1621
 	.4byte	0x3259
-	.4byte	0x70cf
+	.4byte	0x70d1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37996,7 +37971,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x34
 	.4byte	.LVL1624
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38019,13 +37994,13 @@ __func__.9940:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x7103
+	.4byte	0x7105
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0xc
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x70f3
+	.4byte	0x70f5
 	.uleb128 0x5c
 	.4byte	.LASF838
 	.byte	0x3
@@ -38035,7 +38010,7 @@ __func__.9940:
 	.4byte	.LFE217-.LFB217
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x72fb
+	.4byte	0x72fd
 	.uleb128 0x5d
 	.ascii	"LUN\000"
 	.byte	0x3
@@ -38143,7 +38118,7 @@ __func__.9940:
 	.uleb128 0x61
 	.4byte	.LBB299
 	.4byte	.LBE299-.LBB299
-	.4byte	0x725f
+	.4byte	0x7261
 	.uleb128 0x54
 	.4byte	.LASF587
 	.byte	0x3
@@ -38160,7 +38135,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1819
 	.4byte	0x503e
-	.4byte	0x7281
+	.4byte	0x7283
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38183,11 +38158,11 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x44
 	.4byte	.LVL1825
-	.4byte	0x6ede
+	.4byte	0x6ee0
 	.uleb128 0x32
 	.4byte	.LVL1834
 	.4byte	0x29fd
-	.4byte	0x72a2
+	.4byte	0x72a4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38202,7 +38177,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1836
 	.4byte	0x5279
-	.4byte	0x72c1
+	.4byte	0x72c3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38224,7 +38199,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1842
 	.4byte	0x26b9
-	.4byte	0x72db
+	.4byte	0x72dd
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38266,10 +38241,10 @@ __func__.9940:
 	.4byte	.LFE216-.LFB216
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x731f
+	.4byte	0x7321
 	.uleb128 0x44
 	.4byte	.LVL1631
-	.4byte	0x731f
+	.4byte	0x7321
 	.byte	0
 	.uleb128 0x48
 	.4byte	.LASF845
@@ -38280,17 +38255,17 @@ __func__.9940:
 	.4byte	.LFE215-.LFB215
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7368
+	.4byte	0x736a
 	.uleb128 0x44
 	.4byte	.LVL1627
-	.4byte	0x6ede
+	.4byte	0x6ee0
 	.uleb128 0x44
 	.4byte	.LVL1628
 	.4byte	0x537a
 	.uleb128 0x32
 	.4byte	.LVL1629
 	.4byte	0x4fe6
-	.4byte	0x735e
+	.4byte	0x7360
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38310,12 +38285,12 @@ __func__.9940:
 	.4byte	.LFE214-.LFB214
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7436
+	.4byte	0x7438
 	.uleb128 0x28
 	.4byte	.LASF847
 	.byte	0x3
 	.2byte	0x2e8
-	.4byte	0x7436
+	.4byte	0x7438
 	.uleb128 0x6
 	.byte	0x3
 	.4byte	g_nand_phy_info
@@ -38328,7 +38303,7 @@ __func__.9940:
 	.uleb128 0x61
 	.4byte	.LBB309
 	.4byte	.LBE309-.LBB309
-	.4byte	0x73d1
+	.4byte	0x73d3
 	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x3
@@ -38336,7 +38311,7 @@ __func__.9940:
 	.4byte	0xdc5
 	.4byte	.LLST454
 	.uleb128 0x34
-	.4byte	.LVL2074
+	.4byte	.LVL2068
 	.4byte	0x29fd
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -38351,9 +38326,9 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2066
-	.4byte	0x9289
-	.4byte	0x73f1
+	.4byte	.LVL2060
+	.4byte	0x928b
+	.4byte	0x73f3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38368,9 +38343,9 @@ __func__.9940:
 	.4byte	.LC70
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2067
-	.4byte	0x7a87
-	.4byte	0x7408
+	.4byte	.LVL2061
+	.4byte	0x7a89
+	.4byte	0x740a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38379,19 +38354,19 @@ __func__.9940:
 	.4byte	.LANCHOR0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL2068
-	.4byte	0x782a
+	.4byte	.LVL2062
+	.4byte	0x782c
 	.uleb128 0x44
-	.4byte	.LVL2069
-	.4byte	0x777a
+	.4byte	.LVL2063
+	.4byte	0x777c
 	.uleb128 0x44
-	.4byte	.LVL2070
+	.4byte	.LVL2064
 	.4byte	0x601f
 	.uleb128 0x44
-	.4byte	.LVL2071
+	.4byte	.LVL2065
 	.4byte	0x649e
 	.uleb128 0x44
-	.4byte	.LVL2072
+	.4byte	.LVL2066
 	.4byte	0x399e
 	.byte	0
 	.uleb128 0x8
@@ -38406,7 +38381,7 @@ __func__.9940:
 	.4byte	.LFE213-.LFB213
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7592
+	.4byte	0x7594
 	.uleb128 0x54
 	.4byte	.LASF718
 	.byte	0x3
@@ -38435,28 +38410,28 @@ __func__.9940:
 	.4byte	.LASF852
 	.byte	0x3
 	.2byte	0x2bc
-	.4byte	.L1803
+	.4byte	.L1798
 	.uleb128 0x58
 	.4byte	.LASF853
 	.byte	0x3
 	.2byte	0x2cc
-	.4byte	.L1805
+	.4byte	.L1800
 	.uleb128 0x44
-	.4byte	.LVL2020
+	.4byte	.LVL2014
 	.4byte	0x601f
 	.uleb128 0x44
-	.4byte	.LVL2021
+	.4byte	.LVL2015
 	.4byte	0x649e
 	.uleb128 0x44
-	.4byte	.LVL2022
+	.4byte	.LVL2016
 	.4byte	0x6240
 	.uleb128 0x44
-	.4byte	.LVL2036
+	.4byte	.LVL2030
 	.4byte	0x6657
 	.uleb128 0x32
-	.4byte	.LVL2037
+	.4byte	.LVL2031
 	.4byte	0x230c
-	.4byte	0x74e3
+	.4byte	0x74e5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38464,9 +38439,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2038
+	.4byte	.LVL2032
 	.4byte	0x230c
-	.4byte	0x74f7
+	.4byte	0x74f9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38475,9 +38450,9 @@ __func__.9940:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2039
+	.4byte	.LVL2033
 	.4byte	0x3f2e
-	.4byte	0x750b
+	.4byte	0x750d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38486,9 +38461,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2043
-	.4byte	0x7592
-	.4byte	0x7524
+	.4byte	.LVL2037
+	.4byte	0x7594
+	.4byte	0x7526
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38502,15 +38477,15 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL2050
-	.4byte	0x7ae3
+	.4byte	.LVL2044
+	.4byte	0x7ae5
 	.uleb128 0x44
-	.4byte	.LVL2051
+	.4byte	.LVL2045
 	.4byte	0x601f
 	.uleb128 0x32
-	.4byte	.LVL2054
-	.4byte	0x7592
-	.4byte	0x754f
+	.4byte	.LVL2048
+	.4byte	0x7594
+	.4byte	0x7551
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38524,9 +38499,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2057
-	.4byte	0x7592
-	.4byte	0x7562
+	.4byte	.LVL2051
+	.4byte	0x7594
+	.4byte	0x7564
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38534,9 +38509,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2061
+	.4byte	.LVL2055
 	.4byte	0x3f2e
-	.4byte	0x7576
+	.4byte	0x7578
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38545,13 +38520,13 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL2062
+	.4byte	.LVL2056
 	.4byte	0x5e26
 	.uleb128 0x44
-	.4byte	.LVL2063
+	.4byte	.LVL2057
 	.4byte	0x4d75
 	.uleb128 0x44
-	.4byte	.LVL2064
+	.4byte	.LVL2058
 	.4byte	0x399e
 	.byte	0
 	.uleb128 0x48
@@ -38563,7 +38538,7 @@ __func__.9940:
 	.4byte	.LFE212-.LFB212
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7750
+	.4byte	0x7752
 	.uleb128 0x52
 	.4byte	.LASF718
 	.byte	0x3
@@ -38632,7 +38607,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL645
 	.4byte	0x2464
-	.4byte	0x7672
+	.4byte	0x7674
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38649,7 +38624,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL653
 	.4byte	0x251a
-	.4byte	0x7698
+	.4byte	0x769a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38678,7 +38653,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL660
 	.4byte	0x2464
-	.4byte	0x76b2
+	.4byte	0x76b4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38695,7 +38670,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL662
 	.4byte	0x61f9
-	.4byte	0x76c8
+	.4byte	0x76ca
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38707,8 +38682,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL664
-	.4byte	0x7750
-	.4byte	0x76dc
+	.4byte	0x7752
+	.4byte	0x76de
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38719,7 +38694,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL665
 	.4byte	0x682c
-	.4byte	0x76f0
+	.4byte	0x76f2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38733,7 +38708,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL680
 	.4byte	0x61f9
-	.4byte	0x770f
+	.4byte	0x7711
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38745,8 +38720,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL682
-	.4byte	0x7750
-	.4byte	0x7723
+	.4byte	0x7752
+	.4byte	0x7725
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38757,7 +38732,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL683
 	.4byte	0x682c
-	.4byte	0x7737
+	.4byte	0x7739
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38784,7 +38759,7 @@ __func__.9940:
 	.2byte	0x201
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x777a
+	.4byte	0x777c
 	.uleb128 0x4a
 	.4byte	.LASF388
 	.byte	0x3
@@ -38805,11 +38780,11 @@ __func__.9940:
 	.4byte	.LFE210-.LFB210
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x782a
+	.4byte	0x782c
 	.uleb128 0x32
 	.4byte	.LVL1041
 	.4byte	0x230c
-	.4byte	0x77a8
+	.4byte	0x77aa
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38820,7 +38795,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1042
 	.4byte	0x230c
-	.4byte	0x77bc
+	.4byte	0x77be
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38831,7 +38806,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1043
 	.4byte	0x230c
-	.4byte	0x77d0
+	.4byte	0x77d2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38842,7 +38817,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1044
 	.4byte	0x230c
-	.4byte	0x77f3
+	.4byte	0x77f5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38865,7 +38840,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1045
 	.4byte	0x230c
-	.4byte	0x7817
+	.4byte	0x7819
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38901,7 +38876,7 @@ __func__.9940:
 	.4byte	.LFE209-.LFB209
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7a87
+	.4byte	0x7a89
 	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x3
@@ -38929,7 +38904,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL702
 	.4byte	0x2928
-	.4byte	0x7897
+	.4byte	0x7899
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38940,7 +38915,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL703
 	.4byte	0x2928
-	.4byte	0x78ab
+	.4byte	0x78ad
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38951,7 +38926,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL704
 	.4byte	0x2928
-	.4byte	0x78bf
+	.4byte	0x78c1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38962,7 +38937,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL705
 	.4byte	0x2928
-	.4byte	0x78d3
+	.4byte	0x78d5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38973,7 +38948,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL706
 	.4byte	0x2928
-	.4byte	0x78e7
+	.4byte	0x78e9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38984,7 +38959,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL708
 	.4byte	0x2928
-	.4byte	0x78fb
+	.4byte	0x78fd
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38995,7 +38970,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL709
 	.4byte	0x2928
-	.4byte	0x790f
+	.4byte	0x7911
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39006,7 +38981,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL710
 	.4byte	0x2928
-	.4byte	0x7923
+	.4byte	0x7925
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39020,7 +38995,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL712
 	.4byte	0x2928
-	.4byte	0x7940
+	.4byte	0x7942
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39031,7 +39006,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL713
 	.4byte	0x2928
-	.4byte	0x7954
+	.4byte	0x7956
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39045,7 +39020,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL717
 	.4byte	0x2928
-	.4byte	0x7971
+	.4byte	0x7973
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39056,7 +39031,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL718
 	.4byte	0x2928
-	.4byte	0x7987
+	.4byte	0x7989
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39078,7 +39053,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL724
 	.4byte	0x2928
-	.4byte	0x79b6
+	.4byte	0x79b8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39089,7 +39064,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL725
 	.4byte	0x2928
-	.4byte	0x79ca
+	.4byte	0x79cc
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39100,7 +39075,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL729
 	.4byte	0x2928
-	.4byte	0x79de
+	.4byte	0x79e0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39111,7 +39086,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL730
 	.4byte	0x2928
-	.4byte	0x79f2
+	.4byte	0x79f4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39137,7 +39112,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL737
 	.4byte	0x230c
-	.4byte	0x7a34
+	.4byte	0x7a36
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -39166,7 +39141,7 @@ __func__.9940:
 	.4byte	0x2928
 	.uleb128 0x34
 	.4byte	.LVL759
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39190,12 +39165,12 @@ __func__.9940:
 	.4byte	.LFE208-.LFB208
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7ae3
+	.4byte	0x7ae5
 	.uleb128 0x2c
 	.4byte	.LASF847
 	.byte	0x3
 	.byte	0xb6
-	.4byte	0x7436
+	.4byte	0x7438
 	.4byte	.LLST10
 	.uleb128 0x3b
 	.ascii	"i\000"
@@ -39205,11 +39180,11 @@ __func__.9940:
 	.4byte	.LLST11
 	.uleb128 0x44
 	.4byte	.LVL30
-	.4byte	0x7b24
+	.4byte	0x7b26
 	.uleb128 0x32
 	.4byte	.LVL31
-	.4byte	0x7b24
-	.4byte	0x7ad9
+	.4byte	0x7b26
+	.4byte	0x7adb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39219,7 +39194,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x44
 	.4byte	.LVL35
-	.4byte	0x7ae3
+	.4byte	0x7ae5
 	.byte	0
 	.uleb128 0x2b
 	.4byte	.LASF867
@@ -39230,7 +39205,7 @@ __func__.9940:
 	.4byte	.LFE207-.LFB207
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7b0c
+	.4byte	0x7b0e
 	.uleb128 0x2c
 	.4byte	.LASF868
 	.byte	0x3
@@ -39243,7 +39218,7 @@ __func__.9940:
 	.byte	0x3
 	.byte	0x9e
 	.byte	0x1
-	.4byte	0x7b24
+	.4byte	0x7b26
 	.uleb128 0x36
 	.4byte	.LASF870
 	.byte	0x3
@@ -39259,7 +39234,7 @@ __func__.9940:
 	.4byte	.LFE205-.LFB205
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7b69
+	.4byte	0x7b6b
 	.uleb128 0x2f
 	.ascii	"num\000"
 	.byte	0x3
@@ -39288,7 +39263,7 @@ __func__.9940:
 	.4byte	.LFE204-.LFB204
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7bd7
+	.4byte	0x7bd9
 	.uleb128 0x2c
 	.4byte	.LASF299
 	.byte	0x3
@@ -39303,8 +39278,8 @@ __func__.9940:
 	.4byte	.LLST112
 	.uleb128 0x32
 	.4byte	.LVL451
-	.4byte	0x92ab
-	.4byte	0x7bc6
+	.4byte	0x92ad
+	.4byte	0x7bc8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39326,7 +39301,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x34
 	.4byte	.LVL453
-	.4byte	0x7bd7
+	.4byte	0x7bd9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39344,7 +39319,7 @@ __func__.9940:
 	.4byte	.LFE203-.LFB203
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x842d
+	.4byte	0x842f
 	.uleb128 0x2c
 	.4byte	.LASF299
 	.byte	0x3
@@ -39366,7 +39341,7 @@ __func__.9940:
 	.uleb128 0x61
 	.4byte	.LBB211
 	.4byte	.LBE211-.LBB211
-	.4byte	0x7c6b
+	.4byte	0x7c6d
 	.uleb128 0x30
 	.4byte	.LASF587
 	.byte	0x3
@@ -39376,7 +39351,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL437
 	.4byte	0x5b34
-	.4byte	0x7c4b
+	.4byte	0x7c4d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39386,7 +39361,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x34
 	.4byte	.LVL439
-	.4byte	0x92ab
+	.4byte	0x92ad
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39410,7 +39385,7 @@ __func__.9940:
 	.uleb128 0x61
 	.4byte	.LBB212
 	.4byte	.LBE212-.LBB212
-	.4byte	0x7ca4
+	.4byte	0x7ca6
 	.uleb128 0x30
 	.4byte	.LASF587
 	.byte	0x3
@@ -39419,7 +39394,7 @@ __func__.9940:
 	.4byte	.LLST110
 	.uleb128 0x34
 	.4byte	.LVL447
-	.4byte	0x92ab
+	.4byte	0x92ad
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39442,8 +39417,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL302
-	.4byte	0x92ab
-	.4byte	0x7cc1
+	.4byte	0x92ad
+	.4byte	0x7cc3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39459,8 +39434,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL304
-	.4byte	0x92ab
-	.4byte	0x7cde
+	.4byte	0x92ad
+	.4byte	0x7ce0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39476,8 +39451,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL306
-	.4byte	0x92ab
-	.4byte	0x7cfb
+	.4byte	0x92ad
+	.4byte	0x7cfd
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39493,8 +39468,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL308
-	.4byte	0x92ab
-	.4byte	0x7d18
+	.4byte	0x92ad
+	.4byte	0x7d1a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39510,8 +39485,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL310
-	.4byte	0x92ab
-	.4byte	0x7d35
+	.4byte	0x92ad
+	.4byte	0x7d37
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39527,8 +39502,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL312
-	.4byte	0x92ab
-	.4byte	0x7d52
+	.4byte	0x92ad
+	.4byte	0x7d54
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39544,8 +39519,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL314
-	.4byte	0x92ab
-	.4byte	0x7d6f
+	.4byte	0x92ad
+	.4byte	0x7d71
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39561,8 +39536,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL316
-	.4byte	0x92ab
-	.4byte	0x7d8c
+	.4byte	0x92ad
+	.4byte	0x7d8e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39578,8 +39553,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL318
-	.4byte	0x92ab
-	.4byte	0x7da9
+	.4byte	0x92ad
+	.4byte	0x7dab
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39595,8 +39570,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL320
-	.4byte	0x92ab
-	.4byte	0x7dc6
+	.4byte	0x92ad
+	.4byte	0x7dc8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39612,8 +39587,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL322
-	.4byte	0x92ab
-	.4byte	0x7de3
+	.4byte	0x92ad
+	.4byte	0x7de5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39629,8 +39604,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL324
-	.4byte	0x92ab
-	.4byte	0x7e00
+	.4byte	0x92ad
+	.4byte	0x7e02
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39646,8 +39621,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL326
-	.4byte	0x92ab
-	.4byte	0x7e1d
+	.4byte	0x92ad
+	.4byte	0x7e1f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39663,8 +39638,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL328
-	.4byte	0x92ab
-	.4byte	0x7e3a
+	.4byte	0x92ad
+	.4byte	0x7e3c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39680,8 +39655,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL330
-	.4byte	0x92ab
-	.4byte	0x7e57
+	.4byte	0x92ad
+	.4byte	0x7e59
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39697,8 +39672,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL332
-	.4byte	0x92ab
-	.4byte	0x7e74
+	.4byte	0x92ad
+	.4byte	0x7e76
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39714,8 +39689,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL334
-	.4byte	0x92ab
-	.4byte	0x7e91
+	.4byte	0x92ad
+	.4byte	0x7e93
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39731,8 +39706,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL336
-	.4byte	0x92ab
-	.4byte	0x7eae
+	.4byte	0x92ad
+	.4byte	0x7eb0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39748,8 +39723,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL338
-	.4byte	0x92ab
-	.4byte	0x7ecb
+	.4byte	0x92ad
+	.4byte	0x7ecd
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39765,8 +39740,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL340
-	.4byte	0x92ab
-	.4byte	0x7ee8
+	.4byte	0x92ad
+	.4byte	0x7eea
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39782,8 +39757,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL342
-	.4byte	0x92ab
-	.4byte	0x7f05
+	.4byte	0x92ad
+	.4byte	0x7f07
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39799,8 +39774,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL344
-	.4byte	0x92ab
-	.4byte	0x7f22
+	.4byte	0x92ad
+	.4byte	0x7f24
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39816,8 +39791,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL346
-	.4byte	0x92ab
-	.4byte	0x7f3f
+	.4byte	0x92ad
+	.4byte	0x7f41
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39833,8 +39808,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL348
-	.4byte	0x92ab
-	.4byte	0x7f5c
+	.4byte	0x92ad
+	.4byte	0x7f5e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39850,8 +39825,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL350
-	.4byte	0x92ab
-	.4byte	0x7f79
+	.4byte	0x92ad
+	.4byte	0x7f7b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39867,8 +39842,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL352
-	.4byte	0x92ab
-	.4byte	0x7f96
+	.4byte	0x92ad
+	.4byte	0x7f98
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39884,8 +39859,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL354
-	.4byte	0x92ab
-	.4byte	0x7fb3
+	.4byte	0x92ad
+	.4byte	0x7fb5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39901,8 +39876,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL356
-	.4byte	0x92ab
-	.4byte	0x7fd0
+	.4byte	0x92ad
+	.4byte	0x7fd2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39918,8 +39893,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL358
-	.4byte	0x92ab
-	.4byte	0x7fed
+	.4byte	0x92ad
+	.4byte	0x7fef
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39935,8 +39910,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL360
-	.4byte	0x92ab
-	.4byte	0x800a
+	.4byte	0x92ad
+	.4byte	0x800c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39952,8 +39927,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL362
-	.4byte	0x92ab
-	.4byte	0x8027
+	.4byte	0x92ad
+	.4byte	0x8029
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39969,8 +39944,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL364
-	.4byte	0x92ab
-	.4byte	0x8044
+	.4byte	0x92ad
+	.4byte	0x8046
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39986,8 +39961,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL366
-	.4byte	0x92ab
-	.4byte	0x8061
+	.4byte	0x92ad
+	.4byte	0x8063
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40003,8 +39978,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL368
-	.4byte	0x92ab
-	.4byte	0x807e
+	.4byte	0x92ad
+	.4byte	0x8080
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40020,8 +39995,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL370
-	.4byte	0x92ab
-	.4byte	0x809b
+	.4byte	0x92ad
+	.4byte	0x809d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40037,8 +40012,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL372
-	.4byte	0x92ab
-	.4byte	0x80b8
+	.4byte	0x92ad
+	.4byte	0x80ba
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40054,8 +40029,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL374
-	.4byte	0x92ab
-	.4byte	0x80d5
+	.4byte	0x92ad
+	.4byte	0x80d7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40071,8 +40046,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL376
-	.4byte	0x92ab
-	.4byte	0x80f2
+	.4byte	0x92ad
+	.4byte	0x80f4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40088,8 +40063,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL378
-	.4byte	0x92ab
-	.4byte	0x810f
+	.4byte	0x92ad
+	.4byte	0x8111
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40105,8 +40080,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL380
-	.4byte	0x92ab
-	.4byte	0x812c
+	.4byte	0x92ad
+	.4byte	0x812e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40122,8 +40097,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL382
-	.4byte	0x92ab
-	.4byte	0x8149
+	.4byte	0x92ad
+	.4byte	0x814b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40139,8 +40114,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL384
-	.4byte	0x92ab
-	.4byte	0x8166
+	.4byte	0x92ad
+	.4byte	0x8168
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40156,8 +40131,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL386
-	.4byte	0x92ab
-	.4byte	0x8183
+	.4byte	0x92ad
+	.4byte	0x8185
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40173,8 +40148,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL388
-	.4byte	0x92ab
-	.4byte	0x81a0
+	.4byte	0x92ad
+	.4byte	0x81a2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40190,8 +40165,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL390
-	.4byte	0x92ab
-	.4byte	0x81bd
+	.4byte	0x92ad
+	.4byte	0x81bf
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40207,8 +40182,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL392
-	.4byte	0x92ab
-	.4byte	0x81da
+	.4byte	0x92ad
+	.4byte	0x81dc
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40224,8 +40199,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL394
-	.4byte	0x92ab
-	.4byte	0x81f7
+	.4byte	0x92ad
+	.4byte	0x81f9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40241,8 +40216,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL396
-	.4byte	0x92ab
-	.4byte	0x8214
+	.4byte	0x92ad
+	.4byte	0x8216
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40258,8 +40233,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL398
-	.4byte	0x92ab
-	.4byte	0x8231
+	.4byte	0x92ad
+	.4byte	0x8233
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40275,8 +40250,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL400
-	.4byte	0x92ab
-	.4byte	0x824e
+	.4byte	0x92ad
+	.4byte	0x8250
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40292,8 +40267,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL402
-	.4byte	0x92ab
-	.4byte	0x826b
+	.4byte	0x92ad
+	.4byte	0x826d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40309,8 +40284,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL404
-	.4byte	0x92ab
-	.4byte	0x8288
+	.4byte	0x92ad
+	.4byte	0x828a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40326,8 +40301,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL406
-	.4byte	0x92ab
-	.4byte	0x82a5
+	.4byte	0x92ad
+	.4byte	0x82a7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40343,8 +40318,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL408
-	.4byte	0x92ab
-	.4byte	0x82c2
+	.4byte	0x92ad
+	.4byte	0x82c4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40360,8 +40335,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL410
-	.4byte	0x92ab
-	.4byte	0x82df
+	.4byte	0x92ad
+	.4byte	0x82e1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40377,8 +40352,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL412
-	.4byte	0x92ab
-	.4byte	0x82fc
+	.4byte	0x92ad
+	.4byte	0x82fe
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40394,8 +40369,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL414
-	.4byte	0x92ab
-	.4byte	0x8319
+	.4byte	0x92ad
+	.4byte	0x831b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40411,8 +40386,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL416
-	.4byte	0x92ab
-	.4byte	0x8336
+	.4byte	0x92ad
+	.4byte	0x8338
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40428,8 +40403,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL418
-	.4byte	0x92ab
-	.4byte	0x8353
+	.4byte	0x92ad
+	.4byte	0x8355
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40445,8 +40420,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL420
-	.4byte	0x92ab
-	.4byte	0x8370
+	.4byte	0x92ad
+	.4byte	0x8372
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40462,8 +40437,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL422
-	.4byte	0x92ab
-	.4byte	0x838d
+	.4byte	0x92ad
+	.4byte	0x838f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40479,8 +40454,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL424
-	.4byte	0x92ab
-	.4byte	0x83aa
+	.4byte	0x92ad
+	.4byte	0x83ac
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40496,8 +40471,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL426
-	.4byte	0x92ab
-	.4byte	0x83c7
+	.4byte	0x92ad
+	.4byte	0x83c9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40516,8 +40491,8 @@ __func__.9940:
 	.4byte	0x38fb
 	.uleb128 0x32
 	.4byte	.LVL429
-	.4byte	0x92ab
-	.4byte	0x83ed
+	.4byte	0x92ad
+	.4byte	0x83ef
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40536,8 +40511,8 @@ __func__.9940:
 	.4byte	0x38a2
 	.uleb128 0x32
 	.4byte	.LVL432
-	.4byte	0x92ab
-	.4byte	0x8413
+	.4byte	0x92ad
+	.4byte	0x8415
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40553,7 +40528,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x34
 	.4byte	.LVL435
-	.4byte	0x92ab
+	.4byte	0x92ad
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40574,7 +40549,7 @@ __func__.9940:
 	.4byte	.LFE352-.LFB352
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8487
+	.4byte	0x8489
 	.uleb128 0x46
 	.4byte	0x27d2
 	.4byte	.LLST0
@@ -40607,7 +40582,7 @@ __func__.9940:
 	.4byte	.LFE359-.LFB359
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x84b0
+	.4byte	0x84b2
 	.uleb128 0x46
 	.4byte	0x4b4d
 	.4byte	.LLST5
@@ -40619,37 +40594,37 @@ __func__.9940:
 	.byte	0x9f
 	.byte	0
 	.uleb128 0x72
-	.4byte	0x7b0c
+	.4byte	0x7b0e
 	.4byte	.LFB206
 	.4byte	.LFE206-.LFB206
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x84cb
+	.4byte	0x84cd
 	.uleb128 0x73
-	.4byte	0x7b18
+	.4byte	0x7b1a
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0
 	.uleb128 0x72
-	.4byte	0x7750
+	.4byte	0x7752
 	.4byte	.LFB211
 	.4byte	.LFE211-.LFB211
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8503
+	.4byte	0x8505
 	.uleb128 0x46
-	.4byte	0x7761
+	.4byte	0x7763
 	.4byte	.LLST12
 	.uleb128 0x70
-	.4byte	0x776d
+	.4byte	0x776f
 	.uleb128 0x74
 	.4byte	.Ldebug_ranges0+0
 	.uleb128 0x6f
-	.4byte	0x7761
+	.4byte	0x7763
 	.uleb128 0x74
 	.4byte	.Ldebug_ranges0+0
 	.uleb128 0x70
-	.4byte	0x84e7
+	.4byte	0x84e9
 	.byte	0
 	.byte	0
 	.byte	0
@@ -40677,7 +40652,7 @@ __func__.9940:
 	.4byte	.LFE248-.LFB248
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8597
+	.4byte	0x8599
 	.uleb128 0x46
 	.4byte	0x5de8
 	.4byte	.LLST52
@@ -40685,16 +40660,16 @@ __func__.9940:
 	.4byte	0x5df3
 	.uleb128 0x3e
 	.4byte	.Ldebug_ranges0+0x30
-	.4byte	0x858d
+	.4byte	0x858f
 	.uleb128 0x6f
 	.4byte	0x5de8
 	.uleb128 0x74
 	.4byte	.Ldebug_ranges0+0x30
 	.uleb128 0x70
-	.4byte	0x854c
+	.4byte	0x854e
 	.uleb128 0x2d
 	.4byte	.LVL144
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40726,7 +40701,7 @@ __func__.9940:
 	.4byte	.LFE247-.LFB247
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x85fe
+	.4byte	0x8600
 	.uleb128 0x46
 	.4byte	0x5e0d
 	.4byte	.LLST58
@@ -40734,16 +40709,16 @@ __func__.9940:
 	.4byte	0x5e18
 	.uleb128 0x3e
 	.4byte	.Ldebug_ranges0+0x48
-	.4byte	0x85f4
+	.4byte	0x85f6
 	.uleb128 0x6f
 	.4byte	0x5e0d
 	.uleb128 0x74
 	.4byte	.Ldebug_ranges0+0x48
 	.uleb128 0x70
-	.4byte	0x85b3
+	.4byte	0x85b5
 	.uleb128 0x2d
 	.4byte	.LVL163
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40775,7 +40750,7 @@ __func__.9940:
 	.4byte	.LFE255-.LFB255
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x871f
+	.4byte	0x8721
 	.uleb128 0x46
 	.4byte	0x5ac6
 	.4byte	.LLST70
@@ -40805,32 +40780,32 @@ __func__.9940:
 	.4byte	.LBB192
 	.4byte	.LBE192-.LBB192
 	.uleb128 0x71
-	.4byte	0x861a
+	.4byte	0x861c
 	.4byte	.LLST72
 	.uleb128 0x71
-	.4byte	0x861f
+	.4byte	0x8621
 	.4byte	.LLST73
 	.uleb128 0x71
-	.4byte	0x8624
+	.4byte	0x8626
 	.4byte	.LLST74
 	.uleb128 0x71
-	.4byte	0x8629
+	.4byte	0x862b
 	.4byte	.LLST75
 	.uleb128 0x71
-	.4byte	0x862e
+	.4byte	0x8630
 	.4byte	.LLST76
 	.uleb128 0x71
-	.4byte	0x8633
+	.4byte	0x8635
 	.4byte	.LLST77
 	.uleb128 0x71
-	.4byte	0x8638
+	.4byte	0x863a
 	.4byte	.LLST78
 	.uleb128 0x70
-	.4byte	0x863d
+	.4byte	0x863f
 	.uleb128 0x32
 	.4byte	.LVL206
-	.4byte	0x9289
-	.4byte	0x86c8
+	.4byte	0x928b
+	.4byte	0x86ca
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40853,7 +40828,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL213
 	.4byte	0x5c31
-	.4byte	0x86e5
+	.4byte	0x86e7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40869,8 +40844,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL214
-	.4byte	0x9289
-	.4byte	0x870c
+	.4byte	0x928b
+	.4byte	0x870e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40909,7 +40884,7 @@ __func__.9940:
 	.4byte	.LFE258-.LFB258
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x87af
+	.4byte	0x87b1
 	.uleb128 0x46
 	.4byte	0x585d
 	.4byte	.LLST79
@@ -40924,7 +40899,7 @@ __func__.9940:
 	.uleb128 0x61
 	.4byte	.LBB195
 	.4byte	.LBE195-.LBB195
-	.4byte	0x87a5
+	.4byte	0x87a7
 	.uleb128 0x46
 	.4byte	0x585d
 	.4byte	.LLST82
@@ -40932,14 +40907,14 @@ __func__.9940:
 	.4byte	.LBB196
 	.4byte	.LBE196-.LBB196
 	.uleb128 0x70
-	.4byte	0x873b
+	.4byte	0x873d
 	.uleb128 0x70
-	.4byte	0x8744
+	.4byte	0x8746
 	.uleb128 0x70
-	.4byte	0x874d
+	.4byte	0x874f
 	.uleb128 0x34
 	.4byte	.LVL220
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40971,7 +40946,7 @@ __func__.9940:
 	.4byte	.LFE269-.LFB269
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x87ed
+	.4byte	0x87ef
 	.uleb128 0x46
 	.4byte	0x4fcf
 	.4byte	.LLST86
@@ -40990,7 +40965,7 @@ __func__.9940:
 	.uleb128 0x74
 	.4byte	.Ldebug_ranges0+0x60
 	.uleb128 0x70
-	.4byte	0x87cb
+	.4byte	0x87cd
 	.byte	0
 	.byte	0
 	.byte	0
@@ -41000,7 +40975,7 @@ __func__.9940:
 	.4byte	.LFE275-.LFB275
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8826
+	.4byte	0x8828
 	.uleb128 0x46
 	.4byte	0x4b4d
 	.4byte	.LLST87
@@ -41009,7 +40984,7 @@ __func__.9940:
 	.4byte	.LLST88
 	.uleb128 0x2d
 	.4byte	.LVL248
-	.4byte	0x8487
+	.4byte	0x8489
 	.uleb128 0x3c
 	.4byte	0x4b59
 	.uleb128 0x3
@@ -41024,7 +40999,7 @@ __func__.9940:
 	.4byte	.LFE285-.LFB285
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x886c
+	.4byte	0x886e
 	.uleb128 0x73
 	.4byte	0x4055
 	.uleb128 0x1
@@ -41041,7 +41016,7 @@ __func__.9940:
 	.4byte	.LBB210
 	.4byte	.LBE210-.LBB210
 	.uleb128 0x71
-	.4byte	0x8840
+	.4byte	0x8842
 	.4byte	.LLST94
 	.byte	0
 	.byte	0
@@ -41052,7 +41027,7 @@ __func__.9940:
 	.4byte	.LFE300-.LFB300
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x88a5
+	.4byte	0x88a7
 	.uleb128 0x46
 	.4byte	0x37d4
 	.4byte	.LLST120
@@ -41073,7 +41048,7 @@ __func__.9940:
 	.4byte	.LFE319-.LFB319
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x88cb
+	.4byte	0x88cd
 	.uleb128 0x44
 	.4byte	.LVL547
 	.4byte	0x6189
@@ -41087,7 +41062,7 @@ __func__.9940:
 	.4byte	.LFE321-.LFB321
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8998
+	.4byte	0x899a
 	.uleb128 0x76
 	.4byte	0x2af6
 	.byte	0
@@ -41099,26 +41074,26 @@ __func__.9940:
 	.4byte	0x2b18
 	.uleb128 0x3e
 	.4byte	.Ldebug_ranges0+0xb8
-	.4byte	0x897a
+	.4byte	0x897c
 	.uleb128 0x70
-	.4byte	0x88de
+	.4byte	0x88e0
 	.uleb128 0x71
-	.4byte	0x88e4
+	.4byte	0x88e6
 	.4byte	.LLST240
 	.uleb128 0x77
-	.4byte	0x88e9
+	.4byte	0x88eb
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -104
 	.uleb128 0x77
-	.4byte	0x88ee
+	.4byte	0x88f0
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -80
 	.uleb128 0x61
 	.4byte	.LBB238
 	.4byte	.LBE238-.LBB238
-	.4byte	0x8964
+	.4byte	0x8966
 	.uleb128 0x77
 	.4byte	0x2b29
 	.uleb128 0x3
@@ -41127,7 +41102,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL920
 	.4byte	0x26b9
-	.4byte	0x8951
+	.4byte	0x8953
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41192,7 +41167,7 @@ __func__.9940:
 	.4byte	.LFE347-.LFB347
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8aa0
+	.4byte	0x8aa2
 	.uleb128 0x46
 	.4byte	0x2420
 	.4byte	.LLST282
@@ -41213,14 +41188,14 @@ __func__.9940:
 	.4byte	.LBB246
 	.4byte	.LBE246-.LBB246
 	.uleb128 0x70
-	.4byte	0x89b4
+	.4byte	0x89b6
 	.uleb128 0x77
-	.4byte	0x89ba
+	.4byte	0x89bc
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -80
 	.uleb128 0x77
-	.4byte	0x89bf
+	.4byte	0x89c1
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -100
@@ -41230,7 +41205,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1145
 	.4byte	0x230c
-	.4byte	0x8a20
+	.4byte	0x8a22
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41253,7 +41228,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1146
 	.4byte	0x230c
-	.4byte	0x8a3f
+	.4byte	0x8a41
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41275,7 +41250,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1147
 	.4byte	0x2464
-	.4byte	0x8a5e
+	.4byte	0x8a60
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41296,7 +41271,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1148
 	.4byte	0x251a
-	.4byte	0x8a82
+	.4byte	0x8a84
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41348,7 +41323,7 @@ __func__.9940:
 	.4byte	.LFE320-.LFB320
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8b59
+	.4byte	0x8b5b
 	.uleb128 0x46
 	.4byte	0x2b56
 	.4byte	.LLST303
@@ -41367,16 +41342,16 @@ __func__.9940:
 	.uleb128 0x74
 	.4byte	.Ldebug_ranges0+0xe8
 	.uleb128 0x71
-	.4byte	0x8abc
+	.4byte	0x8abe
 	.4byte	.LLST304
 	.uleb128 0x71
-	.4byte	0x8ac1
+	.4byte	0x8ac3
 	.4byte	.LLST305
 	.uleb128 0x71
-	.4byte	0x8ac6
+	.4byte	0x8ac8
 	.4byte	.LLST306
 	.uleb128 0x77
-	.4byte	0x8acb
+	.4byte	0x8acd
 	.uleb128 0x1
 	.byte	0x5b
 	.uleb128 0x44
@@ -41385,7 +41360,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1230
 	.4byte	0x61f9
-	.4byte	0x8b1e
+	.4byte	0x8b20
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -41395,8 +41370,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1236
-	.4byte	0x9289
-	.4byte	0x8b39
+	.4byte	0x928b
+	.4byte	0x8b3b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41414,7 +41389,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1237
 	.4byte	0x688f
-	.4byte	0x8b4d
+	.4byte	0x8b4f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41434,7 +41409,7 @@ __func__.9940:
 	.4byte	.LFE304-.LFB304
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8c39
+	.4byte	0x8c3b
 	.uleb128 0x46
 	.4byte	0x330f
 	.4byte	.LLST307
@@ -41443,7 +41418,7 @@ __func__.9940:
 	.uleb128 0x61
 	.4byte	.LBB261
 	.4byte	.LBE261-.LBB261
-	.4byte	0x8c2f
+	.4byte	0x8c31
 	.uleb128 0x46
 	.4byte	0x330f
 	.4byte	.LLST308
@@ -41451,11 +41426,11 @@ __func__.9940:
 	.4byte	.LBB262
 	.4byte	.LBE262-.LBB262
 	.uleb128 0x70
-	.4byte	0x8b75
+	.4byte	0x8b77
 	.uleb128 0x32
 	.4byte	.LVL1248
 	.4byte	0x5c31
-	.4byte	0x8bbb
+	.4byte	0x8bbd
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41471,8 +41446,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1249
-	.4byte	0x9289
-	.4byte	0x8be2
+	.4byte	0x928b
+	.4byte	0x8be4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41495,7 +41470,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1250
 	.4byte	0x37c3
-	.4byte	0x8bf6
+	.4byte	0x8bf8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41506,7 +41481,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1251
 	.4byte	0x2b45
-	.4byte	0x8c0a
+	.4byte	0x8c0c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41516,7 +41491,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x34
 	.4byte	.LVL1252
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41548,7 +41523,7 @@ __func__.9940:
 	.4byte	.LFE271-.LFB271
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8d11
+	.4byte	0x8d13
 	.uleb128 0x74
 	.4byte	.Ldebug_ranges0+0x108
 	.uleb128 0x71
@@ -41573,7 +41548,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1269
 	.4byte	0x5279
-	.4byte	0x8c9c
+	.4byte	0x8c9e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41596,7 +41571,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1271
 	.4byte	0x26b9
-	.4byte	0x8cbb
+	.4byte	0x8cbd
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41618,7 +41593,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1275
 	.4byte	0x230c
-	.4byte	0x8ccf
+	.4byte	0x8cd1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -41629,7 +41604,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1277
 	.4byte	0x333e
-	.4byte	0x8ce3
+	.4byte	0x8ce5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41640,7 +41615,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1278
 	.4byte	0x251a
-	.4byte	0x8d06
+	.4byte	0x8d08
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41674,7 +41649,7 @@ __func__.9940:
 	.4byte	.LFE289-.LFB289
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8d42
+	.4byte	0x8d44
 	.uleb128 0x2d
 	.4byte	.LVL1527
 	.4byte	0x5156
@@ -41702,11 +41677,11 @@ __func__.9940:
 	.4byte	.LFE274-.LFB274
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8d99
+	.4byte	0x8d9b
 	.uleb128 0x32
 	.4byte	.LVL1553
 	.4byte	0x503e
-	.4byte	0x8d69
+	.4byte	0x8d6b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41716,8 +41691,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1554
-	.4byte	0x9289
-	.4byte	0x8d89
+	.4byte	0x928b
+	.4byte	0x8d8b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41747,11 +41722,11 @@ __func__.9940:
 	.4byte	.LFE314-.LFB314
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8de7
+	.4byte	0x8de9
 	.uleb128 0x32
 	.4byte	.LVL1690
 	.4byte	0x2d9c
-	.4byte	0x8dc0
+	.4byte	0x8dc2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41762,7 +41737,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1691
 	.4byte	0x4f28
-	.4byte	0x8dd7
+	.4byte	0x8dd9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41786,7 +41761,7 @@ __func__.9940:
 	.4byte	.LFE322-.LFB322
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9106
+	.4byte	0x9108
 	.uleb128 0x46
 	.4byte	0x2a0e
 	.4byte	.LLST398
@@ -41819,7 +41794,7 @@ __func__.9940:
 	.4byte	0x2aae
 	.uleb128 0x3e
 	.4byte	.Ldebug_ranges0+0x158
-	.4byte	0x90f6
+	.4byte	0x90f8
 	.uleb128 0x46
 	.4byte	0x2a1a
 	.4byte	.LLST400
@@ -41829,44 +41804,44 @@ __func__.9940:
 	.uleb128 0x74
 	.4byte	.Ldebug_ranges0+0x158
 	.uleb128 0x70
-	.4byte	0x8e0c
+	.4byte	0x8e0e
 	.uleb128 0x71
-	.4byte	0x8e12
+	.4byte	0x8e14
 	.4byte	.LLST402
 	.uleb128 0x77
-	.4byte	0x8e17
+	.4byte	0x8e19
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -36
 	.uleb128 0x70
-	.4byte	0x8e1c
+	.4byte	0x8e1e
 	.uleb128 0x71
-	.4byte	0x8e22
+	.4byte	0x8e24
 	.4byte	.LLST403
 	.uleb128 0x71
-	.4byte	0x8e27
+	.4byte	0x8e29
 	.4byte	.LLST404
 	.uleb128 0x71
-	.4byte	0x8e2c
+	.4byte	0x8e2e
 	.4byte	.LLST405
 	.uleb128 0x71
-	.4byte	0x8e31
+	.4byte	0x8e33
 	.4byte	.LLST406
 	.uleb128 0x71
-	.4byte	0x8e36
+	.4byte	0x8e38
 	.4byte	.LLST407
 	.uleb128 0x71
-	.4byte	0x8e3b
+	.4byte	0x8e3d
 	.4byte	.LLST408
 	.uleb128 0x7a
 	.4byte	0x2a9e
 	.uleb128 0x7a
 	.4byte	0x2aa6
 	.uleb128 0x70
-	.4byte	0x8e40
+	.4byte	0x8e42
 	.uleb128 0x3e
 	.4byte	.Ldebug_ranges0+0x178
-	.4byte	0x8f2b
+	.4byte	0x8f2d
 	.uleb128 0x71
 	.4byte	0x2abc
 	.4byte	.LLST409
@@ -41876,7 +41851,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1721
 	.4byte	0x5b34
-	.4byte	0x8ef4
+	.4byte	0x8ef6
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41887,7 +41862,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1723
 	.4byte	0x5b34
-	.4byte	0x8f08
+	.4byte	0x8f0a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41900,7 +41875,7 @@ __func__.9940:
 	.4byte	0x2b8f
 	.uleb128 0x34
 	.4byte	.LVL1738
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41921,7 +41896,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1750
 	.4byte	0x3f2e
-	.4byte	0x8f48
+	.4byte	0x8f4a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41932,7 +41907,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1751
 	.4byte	0x5b34
-	.4byte	0x8f5c
+	.4byte	0x8f5e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41949,7 +41924,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1759
 	.4byte	0x3259
-	.4byte	0x8f82
+	.4byte	0x8f84
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41960,7 +41935,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1764
 	.4byte	0x3168
-	.4byte	0x8f99
+	.4byte	0x8f9b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41973,7 +41948,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1765
 	.4byte	0x3259
-	.4byte	0x8fad
+	.4byte	0x8faf
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41983,8 +41958,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1766
-	.4byte	0x9289
-	.4byte	0x8fd4
+	.4byte	0x928b
+	.4byte	0x8fd6
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42006,8 +41981,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1767
-	.4byte	0x9289
-	.4byte	0x8ffb
+	.4byte	0x928b
+	.4byte	0x8ffd
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42029,8 +42004,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1768
-	.4byte	0x9289
-	.4byte	0x9022
+	.4byte	0x928b
+	.4byte	0x9024
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42053,7 +42028,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1769
 	.4byte	0x3f2e
-	.4byte	0x9036
+	.4byte	0x9038
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42067,7 +42042,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1780
 	.4byte	0x26b9
-	.4byte	0x9055
+	.4byte	0x9057
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -42078,8 +42053,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1789
-	.4byte	0x9289
-	.4byte	0x907c
+	.4byte	0x928b
+	.4byte	0x907e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42102,7 +42077,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1790
 	.4byte	0x5279
-	.4byte	0x909b
+	.4byte	0x909d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42127,7 +42102,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1793
 	.4byte	0x319e
-	.4byte	0x90be
+	.4byte	0x90c0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42152,7 +42127,7 @@ __func__.9940:
 	.4byte	0x32fe
 	.uleb128 0x44
 	.4byte	.LVL1801
-	.4byte	0x6ede
+	.4byte	0x6ee0
 	.uleb128 0x44
 	.4byte	.LVL1802
 	.4byte	0x537a
@@ -42177,27 +42152,27 @@ __func__.9940:
 	.4byte	.LFE295-.LFB295
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9266
+	.4byte	0x9268
 	.uleb128 0x76
 	.4byte	0x39af
 	.byte	0
 	.uleb128 0x61
 	.4byte	.LBB306
 	.4byte	.LBE306-.LBB306
-	.4byte	0x91fc
+	.4byte	0x91fe
 	.uleb128 0x70
-	.4byte	0x9119
+	.4byte	0x911b
 	.uleb128 0x3e
 	.4byte	.Ldebug_ranges0+0x1a8
-	.4byte	0x9144
+	.4byte	0x9146
 	.uleb128 0x71
 	.4byte	0x39ba
 	.4byte	.LLST449
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2004
+	.4byte	.LVL1998
 	.4byte	0x3d16
-	.4byte	0x9158
+	.4byte	0x915a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42206,9 +42181,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2005
+	.4byte	.LVL1999
 	.4byte	0x3d16
-	.4byte	0x916c
+	.4byte	0x916e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42217,9 +42192,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2007
+	.4byte	.LVL2001
 	.4byte	0x4f28
-	.4byte	0x9183
+	.4byte	0x9185
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42228,9 +42203,9 @@ __func__.9940:
 	.4byte	.LANCHOR144
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2008
+	.4byte	.LVL2002
 	.4byte	0x4f28
-	.4byte	0x919a
+	.4byte	0x919c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42239,24 +42214,24 @@ __func__.9940:
 	.4byte	.LANCHOR149
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL2009
+	.4byte	.LVL2003
 	.4byte	0x537a
 	.uleb128 0x44
-	.4byte	.LVL2010
+	.4byte	.LVL2004
 	.4byte	0x4d75
 	.uleb128 0x44
-	.4byte	.LVL2011
+	.4byte	.LVL2005
 	.4byte	0x4d75
 	.uleb128 0x44
-	.4byte	.LVL2015
+	.4byte	.LVL2009
 	.4byte	0x2c26
 	.uleb128 0x44
-	.4byte	.LVL2016
+	.4byte	.LVL2010
 	.4byte	0x2c26
 	.uleb128 0x32
-	.4byte	.LVL2017
+	.4byte	.LVL2011
 	.4byte	0x3430
-	.4byte	0x91de
+	.4byte	0x91e0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42265,9 +42240,9 @@ __func__.9940:
 	.4byte	.LANCHOR51
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2018
+	.4byte	.LVL2012
 	.4byte	0x3430
-	.4byte	0x91f2
+	.4byte	0x91f4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42276,41 +42251,41 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL2019
+	.4byte	.LVL2013
 	.4byte	0x3bff
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1991
+	.4byte	.LVL1985
 	.4byte	0x601f
 	.uleb128 0x44
-	.4byte	.LVL1992
+	.4byte	.LVL1986
 	.4byte	0x4b73
 	.uleb128 0x44
-	.4byte	.LVL1993
+	.4byte	.LVL1987
 	.4byte	0x49a7
 	.uleb128 0x44
-	.4byte	.LVL1994
+	.4byte	.LVL1988
 	.4byte	0x4749
 	.uleb128 0x44
-	.4byte	.LVL1995
+	.4byte	.LVL1989
 	.4byte	0x47ca
 	.uleb128 0x44
-	.4byte	.LVL1996
+	.4byte	.LVL1990
 	.4byte	0x3db9
 	.uleb128 0x44
-	.4byte	.LVL1997
+	.4byte	.LVL1991
 	.4byte	0x4b66
 	.uleb128 0x44
-	.4byte	.LVL1998
+	.4byte	.LVL1992
 	.4byte	0x5ee3
 	.uleb128 0x44
-	.4byte	.LVL1999
+	.4byte	.LVL1993
 	.4byte	0x3e13
 	.uleb128 0x44
-	.4byte	.LVL2000
+	.4byte	.LVL1994
 	.4byte	0x3fc4
 	.uleb128 0x34
-	.4byte	.LVL2001
+	.4byte	.LVL1995
 	.4byte	0x4fc2
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -44071,11 +44046,11 @@ __func__.9940:
 	.section	.debug_loc,"",%progbits
 .Ldebug_loc0:
 .LLST455:
-	.4byte	.LVL2077
-	.4byte	.LVL2078-1
+	.4byte	.LVL2071
+	.4byte	.LVL2072-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL2078-1
+	.4byte	.LVL2072-1
 	.4byte	.LFE351
 	.2byte	0x4
 	.byte	0xf3
@@ -44085,11 +44060,11 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST456:
-	.4byte	.LVL2077
-	.4byte	.LVL2078-1
+	.4byte	.LVL2071
+	.4byte	.LVL2072-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL2078-1
+	.4byte	.LVL2072-1
 	.4byte	.LFE351
 	.2byte	0x4
 	.byte	0xf3
@@ -44099,11 +44074,11 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST457:
-	.4byte	.LVL2077
-	.4byte	.LVL2078-1
+	.4byte	.LVL2071
+	.4byte	.LVL2072-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL2078-1
+	.4byte	.LVL2072-1
 	.4byte	.LFE351
 	.2byte	0x4
 	.byte	0xf3
@@ -47179,15 +47154,15 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST448:
-	.4byte	.LVL1974
-	.4byte	.LVL1977
+	.4byte	.LVL1968
+	.4byte	.LVL1971
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1987
-	.4byte	.LVL1989
+	.4byte	.LVL1981
+	.4byte	.LVL1983
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1990
+	.4byte	.LVL1984
 	.4byte	.LFE277
 	.2byte	0x1
 	.byte	0x57
@@ -50125,15 +50100,15 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST445:
-	.4byte	.LVL1967
-	.4byte	.LVL1970
+	.4byte	.LVL1961
+	.4byte	.LVL1964
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1970
-	.4byte	.LVL1971-1
+	.4byte	.LVL1964
+	.4byte	.LVL1965-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1971-1
+	.4byte	.LVL1965-1
 	.4byte	.LFE223
 	.2byte	0x4
 	.byte	0xf3
@@ -50143,15 +50118,15 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST446:
-	.4byte	.LVL1967
-	.4byte	.LVL1969
+	.4byte	.LVL1961
+	.4byte	.LVL1963
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1969
-	.4byte	.LVL1971-1
+	.4byte	.LVL1963
+	.4byte	.LVL1965-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1971-1
+	.4byte	.LVL1965-1
 	.4byte	.LFE223
 	.2byte	0x4
 	.byte	0xf3
@@ -50161,15 +50136,15 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST447:
-	.4byte	.LVL1967
-	.4byte	.LVL1968
+	.4byte	.LVL1961
+	.4byte	.LVL1962
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1968
-	.4byte	.LVL1971-1
+	.4byte	.LVL1962
+	.4byte	.LVL1965-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1971-1
+	.4byte	.LVL1965-1
 	.4byte	.LFE223
 	.2byte	0x4
 	.byte	0xf3
@@ -50359,28 +50334,28 @@ __func__.9940:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL1874
-	.4byte	.LVL1876
+	.4byte	.LVL1877
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1876
-	.4byte	.LVL1878
+	.4byte	.LVL1877
+	.4byte	.LVL1879
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1878
-	.4byte	.LVL1965
+	.4byte	.LVL1879
+	.4byte	.LVL1959
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1965
-	.4byte	.LVL1966
+	.4byte	.LVL1959
+	.4byte	.LVL1960
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1966
+	.4byte	.LVL1960
 	.4byte	.LFE220
 	.2byte	0x4
 	.byte	0xf3
@@ -50395,29 +50370,29 @@ __func__.9940:
 	.2byte	0x1
 	.byte	0x51
 	.4byte	.LVL1873
-	.4byte	.LVL1876
+	.4byte	.LVL1877
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL1876
-	.4byte	.LVL1880
+	.4byte	.LVL1877
+	.4byte	.LVL1881
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1880
-	.4byte	.LVL1924
+	.4byte	.LVL1881
+	.4byte	.LVL1906
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL1924
-	.4byte	.LVL1925
+	.4byte	.LVL1906
+	.4byte	.LVL1908
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL1925
-	.4byte	.LVL1965
+	.4byte	.LVL1908
+	.4byte	.LVL1959
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL1965
+	.4byte	.LVL1959
 	.4byte	.LFE220
 	.2byte	0x1
 	.byte	0x51
@@ -50429,29 +50404,29 @@ __func__.9940:
 	.2byte	0x1
 	.byte	0x52
 	.4byte	.LVL1872
-	.4byte	.LVL1876
+	.4byte	.LVL1877
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -80
-	.4byte	.LVL1876
-	.4byte	.LVL1879
+	.4byte	.LVL1877
+	.4byte	.LVL1880
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1879
-	.4byte	.LVL1925
+	.4byte	.LVL1880
+	.4byte	.LVL1908
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -80
-	.4byte	.LVL1925
-	.4byte	.LVL1926
+	.4byte	.LVL1908
+	.4byte	.LVL1909
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1926
-	.4byte	.LVL1965
+	.4byte	.LVL1909
+	.4byte	.LVL1959
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -80
-	.4byte	.LVL1965
+	.4byte	.LVL1959
 	.4byte	.LFE220
 	.2byte	0x1
 	.byte	0x52
@@ -50464,116 +50439,111 @@ __func__.9940:
 	.byte	0x53
 	.4byte	.LVL1875-1
 	.4byte	.LVL1876
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL1876
+	.4byte	.LVL1877
 	.2byte	0x3
 	.byte	0x91
-	.sleb128 -92
-	.4byte	.LVL1876
+	.sleb128 -96
 	.4byte	.LVL1877
+	.4byte	.LVL1878
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1877
-	.4byte	.LVL1927
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -92
-	.4byte	.LVL1927
-	.4byte	.LVL1928
+	.4byte	.LVL1878
+	.4byte	.LVL1910
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL1910
+	.4byte	.LVL1911-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1928
+	.4byte	.LVL1911-1
 	.4byte	.LFE220
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -92
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
 	.4byte	0
 	.4byte	0
 .LLST434:
-	.4byte	.LVL1937
-	.4byte	.LVL1940
+	.4byte	.LVL1935
+	.4byte	.LVL1938
 	.2byte	0x3
 	.byte	0x91
-	.sleb128 -84
+	.sleb128 -88
 	.4byte	0
 	.4byte	0
 .LLST435:
 	.4byte	.LVL1887
 	.4byte	.LVL1888
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
+	.2byte	0x1
+	.byte	0x5a
 	.4byte	.LVL1888
-	.4byte	.LVL1908
+	.4byte	.LVL1891
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1931
-	.4byte	.LVL1965
+	.4byte	.LVL1912
+	.4byte	.LVL1959
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
 .LLST436:
-	.4byte	.LVL1882
 	.4byte	.LVL1883
+	.4byte	.LVL1884
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1883
-	.4byte	.LVL1913
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	.LVL1913
-	.4byte	.LVL1914
+	.4byte	.LVL1884
+	.4byte	.LVL1907
 	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1914
-	.4byte	.LVL1929
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	.LVL1929
-	.4byte	.LVL1930-1
+	.byte	0x5a
+	.4byte	.LVL1907
+	.4byte	.LVL1910
+	.2byte	0x3
+	.byte	0x7a
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL1910
+	.4byte	.LVL1959
 	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1930-1
-	.4byte	.LVL1965
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
+	.byte	0x5a
 	.4byte	0
 	.4byte	0
 .LLST437:
-	.4byte	.LVL1885
+	.4byte	.LVL1886
 	.4byte	.LVL1887-1
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL1887-1
-	.4byte	.LVL1913
+	.4byte	.LVL1896
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -76
-	.4byte	.LVL1913
-	.4byte	.LVL1916
+	.4byte	.LVL1896
+	.4byte	.LVL1898
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1916
-	.4byte	.LVL1965
+	.4byte	.LVL1898
+	.4byte	.LVL1959
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -76
 	.4byte	0
 	.4byte	0
 .LLST438:
+	.4byte	.LVL1934
 	.4byte	.LVL1936
-	.4byte	.LVL1938
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1938
-	.4byte	.LVL1939
+	.4byte	.LVL1936
+	.4byte	.LVL1937
 	.2byte	0x2
 	.byte	0x71
 	.sleb128 4
-	.4byte	.LVL1939
-	.4byte	.LVL1941-1
+	.4byte	.LVL1937
+	.4byte	.LVL1939-1
 	.2byte	0xb
 	.byte	0x3
 	.4byte	req_prgm
@@ -50586,30 +50556,29 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST439:
-	.4byte	.LVL1899
-	.4byte	.LVL1902
+	.4byte	.LVL1924
+	.4byte	.LVL1929
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -92
+	.4byte	.LVL1932
+	.4byte	.LVL1933-1
 	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1902
-	.4byte	.LVL1904
+	.byte	0x53
+	.4byte	.LVL1933-1
+	.4byte	.LVL1950
 	.2byte	0x3
-	.byte	0x7b
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1934
+	.byte	0x91
+	.sleb128 -92
+	.4byte	.LVL1950
 	.4byte	.LVL1951
 	.2byte	0x1
-	.byte	0x5b
+	.byte	0x53
 	.4byte	.LVL1951
-	.4byte	.LVL1952
+	.4byte	.LVL1959
 	.2byte	0x3
-	.byte	0x7b
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL1952
-	.4byte	.LVL1961
-	.2byte	0x1
-	.byte	0x5b
+	.byte	0x91
+	.sleb128 -92
 	.4byte	0
 	.4byte	0
 .LLST440:
@@ -50618,50 +50587,50 @@ __func__.9940:
 	.2byte	0x1
 	.byte	0x51
 	.4byte	.LVL1887-1
-	.4byte	.LVL1903
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -88
-	.4byte	.LVL1903
-	.4byte	.LVL1905
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1905
-	.4byte	.LVL1913
+	.4byte	.LVL1896
 	.2byte	0x3
 	.byte	0x91
-	.sleb128 -88
-	.4byte	.LVL1913
-	.4byte	.LVL1915
+	.sleb128 -84
+	.4byte	.LVL1896
+	.4byte	.LVL1897
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1915
-	.4byte	.LVL1921
+	.4byte	.LVL1897
+	.4byte	.LVL1903
 	.2byte	0x3
 	.byte	0x91
-	.sleb128 -88
-	.4byte	.LVL1921
-	.4byte	.LVL1922
+	.sleb128 -84
+	.4byte	.LVL1903
+	.4byte	.LVL1904
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1923
-	.4byte	.LVL1931
+	.4byte	.LVL1905
+	.4byte	.LVL1912
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1931
-	.4byte	.LVL1964
+	.4byte	.LVL1912
+	.4byte	.LVL1913
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1913
+	.4byte	.LVL1928
 	.2byte	0x3
 	.byte	0x91
-	.sleb128 -88
-	.4byte	.LVL1964
-	.4byte	.LVL1965
+	.sleb128 -84
+	.4byte	.LVL1928
+	.4byte	.LVL1929
 	.2byte	0x1
 	.byte	0x53
+	.4byte	.LVL1929
+	.4byte	.LVL1959
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -84
 	.4byte	0
 	.4byte	0
 .LLST441:
-	.4byte	.LVL1895
-	.4byte	.LVL1896
+	.4byte	.LVL1920
+	.4byte	.LVL1921
 	.2byte	0x1f
 	.byte	0x74
 	.sleb128 7
@@ -50678,7 +50647,7 @@ __func__.9940:
 	.byte	0x24
 	.byte	0x22
 	.byte	0x91
-	.sleb128 -88
+	.sleb128 -84
 	.byte	0x6
 	.byte	0x16
 	.byte	0x14
@@ -50692,38 +50661,25 @@ __func__.9940:
 	.byte	0x16
 	.byte	0x13
 	.byte	0x9f
-	.4byte	.LVL1896
-	.4byte	.LVL1897
+	.4byte	.LVL1921
+	.4byte	.LVL1922
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1897
-	.4byte	.LVL1900
+	.4byte	.LVL1922
+	.4byte	.LVL1925
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -60
-	.4byte	.LVL1900
-	.4byte	.LVL1901
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1901
-	.4byte	.LVL1902
+	.4byte	.LVL1925
+	.4byte	.LVL1929
 	.2byte	0x3
-	.byte	0x7b
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL1902
-	.4byte	.LVL1904
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1934
-	.4byte	.LVL1961
+	.byte	0x91
+	.sleb128 -92
+	.4byte	.LVL1932
+	.4byte	.LVL1959
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -60
-	.4byte	.LVL1961
-	.4byte	.LVL1965
-	.2byte	0x1
-	.byte	0x5b
 	.4byte	0
 	.4byte	0
 .LLST442:
@@ -50732,30 +50688,30 @@ __func__.9940:
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1918
-	.4byte	.LVL1919
+	.4byte	.LVL1900
+	.4byte	.LVL1901
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1919
-	.4byte	.LVL1921-1
+	.4byte	.LVL1901
+	.4byte	.LVL1903-1
 	.2byte	0x1
 	.byte	0x53
+	.4byte	.LVL1940
 	.4byte	.LVL1942
-	.4byte	.LVL1944
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1946
-	.4byte	.LVL1947
+	.4byte	.LVL1944
+	.4byte	.LVL1945
 	.2byte	0x1
 	.byte	0x51
+	.4byte	.LVL1945
 	.4byte	.LVL1947
-	.4byte	.LVL1949
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -72
-	.4byte	.LVL1953
-	.4byte	.LVL1960
+	.4byte	.LVL1951
+	.4byte	.LVL1958
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -72
@@ -50767,24 +50723,24 @@ __func__.9940:
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1918
-	.4byte	.LVL1922
+	.4byte	.LVL1900
+	.4byte	.LVL1904
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1923
-	.4byte	.LVL1931
+	.4byte	.LVL1905
+	.4byte	.LVL1912
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1943
-	.4byte	.LVL1944
+	.4byte	.LVL1941
+	.4byte	.LVL1942
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1947
-	.4byte	.LVL1948
+	.4byte	.LVL1945
+	.4byte	.LVL1946
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1953
-	.4byte	.LVL1960
+	.4byte	.LVL1951
+	.4byte	.LVL1958
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
@@ -50797,19 +50753,19 @@ __func__.9940:
 	.4byte	g_active_superblock
 	.byte	0x9f
 	.4byte	.LVL1888
-	.4byte	.LVL1891
+	.4byte	.LVL1889
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1894
-	.4byte	.LVL1906
+	.4byte	.LVL1912
+	.4byte	.LVL1916
 	.2byte	0x1
 	.byte	0x54
+	.4byte	.LVL1919
 	.4byte	.LVL1931
-	.4byte	.LVL1933
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1934
-	.4byte	.LVL1965
+	.4byte	.LVL1932
+	.4byte	.LVL1959
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
@@ -51272,8 +51228,8 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST454:
-	.4byte	.LVL2073
-	.4byte	.LVL2074
+	.4byte	.LVL2067
+	.4byte	.LVL2068
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x1fc1
@@ -51281,8 +51237,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL2074
-	.4byte	.LVL2075
+	.4byte	.LVL2068
+	.4byte	.LVL2069
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x1fc2
@@ -51290,8 +51246,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL2075
-	.4byte	.LVL2076
+	.4byte	.LVL2069
+	.4byte	.LVL2070
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x1fc1
@@ -51302,95 +51258,95 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST450:
-	.4byte	.LVL2027
-	.4byte	.LVL2029
+	.4byte	.LVL2021
+	.4byte	.LVL2023
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL2031
-	.4byte	.LVL2032
+	.4byte	.LVL2025
+	.4byte	.LVL2026
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL2042
-	.4byte	.LVL2044
+	.4byte	.LVL2036
+	.4byte	.LVL2038
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL2047
-	.4byte	.LVL2048
+	.4byte	.LVL2041
+	.4byte	.LVL2042
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL2052
-	.4byte	.LVL2053
+	.4byte	.LVL2046
+	.4byte	.LVL2047
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL2055
-	.4byte	.LVL2056
+	.4byte	.LVL2049
+	.4byte	.LVL2050
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL2056
-	.4byte	.LVL2057-1
+	.4byte	.LVL2050
+	.4byte	.LVL2051-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL2059
-	.4byte	.LVL2060
+	.4byte	.LVL2053
+	.4byte	.LVL2054
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
 .LLST451:
-	.4byte	.LVL2031
-	.4byte	.LVL2035
+	.4byte	.LVL2025
+	.4byte	.LVL2029
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL2056
-	.4byte	.LVL2058
+	.4byte	.LVL2050
+	.4byte	.LVL2052
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL2059
-	.4byte	.LVL2060
+	.4byte	.LVL2053
+	.4byte	.LVL2054
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
 .LLST452:
-	.4byte	.LVL2025
-	.4byte	.LVL2028
+	.4byte	.LVL2019
+	.4byte	.LVL2022
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL2028
-	.4byte	.LVL2030
+	.4byte	.LVL2022
+	.4byte	.LVL2024
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL2042
-	.4byte	.LVL2045
+	.4byte	.LVL2036
+	.4byte	.LVL2039
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL2046
-	.4byte	.LVL2051
+	.4byte	.LVL2040
+	.4byte	.LVL2045
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL2051
-	.4byte	.LVL2052
+	.4byte	.LVL2045
+	.4byte	.LVL2046
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
 .LLST453:
-	.4byte	.LVL2023
-	.4byte	.LVL2024
+	.4byte	.LVL2017
+	.4byte	.LVL2018
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL2024
-	.4byte	.LVL2026
+	.4byte	.LVL2018
+	.4byte	.LVL2020
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL2040
-	.4byte	.LVL2041
+	.4byte	.LVL2034
+	.4byte	.LVL2035
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL2041
-	.4byte	.LVL2042
+	.4byte	.LVL2035
+	.4byte	.LVL2036
 	.2byte	0x1
 	.byte	0x52
 	.4byte	0
@@ -53119,14 +53075,14 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST449:
-	.4byte	.LVL2005
-	.4byte	.LVL2006
+	.4byte	.LVL1999
+	.4byte	.LVL2000
 	.2byte	0x6
 	.byte	0x3
 	.4byte	g_active_superblock
 	.byte	0x9f
+	.4byte	.LVL2000
 	.4byte	.LVL2006
-	.4byte	.LVL2012
 	.2byte	0x6
 	.byte	0x3
 	.4byte	g_buffer_superblock
diff --git a/drivers/rkflash/rk_sftl_arm_v8.S b/drivers/rkflash/rk_sftl_arm_v8.S
index c2d0171805..a808dd6611 100644
--- a/drivers/rkflash/rk_sftl_arm_v8.S
+++ b/drivers/rkflash/rk_sftl_arm_v8.S
@@ -1,8 +1,8 @@
 /*
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
- * SPDX-License-Identifier:	GPL-2.0
- * date: 2018-06-20
+ * SPDX-License-Identifier:    GPL-2.0
+ * date: 2018-07-04
  */
 	.arch armv8-a+nosimd
 	.file	"rk_sftl.c"
@@ -19364,22 +19364,22 @@ FtlWrite:
 	.loc 3 962 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	stp	x25, x26, [sp, 64]
-	.cfi_offset 25, -176
-	.cfi_offset 26, -168
-	mov	w25, w2
 	stp	x21, x22, [sp, 32]
-	mov	x26, x3
-	stp	x19, x20, [sp, 16]
 	.cfi_offset 21, -208
 	.cfi_offset 22, -200
-	.cfi_offset 19, -224
-	.cfi_offset 20, -216
 	mov	w22, w1
 	stp	x23, x24, [sp, 48]
-	stp	x27, x28, [sp, 80]
 	.cfi_offset 23, -192
 	.cfi_offset 24, -184
+	mov	w24, w2
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 25, -176
+	.cfi_offset 26, -168
+	mov	x25, x3
+	stp	x19, x20, [sp, 16]
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 19, -224
+	.cfi_offset 20, -216
 	.cfi_offset 27, -160
 	.cfi_offset 28, -152
 	.loc 3 970 0
@@ -19387,7 +19387,7 @@ FtlWrite:
 	.loc 3 971 0
 	mov	x2, x3
 .LVL1986:
-	mov	w1, w25
+	mov	w1, w24
 .LVL1987:
 	add	w0, w22, 256
 .LVL1988:
@@ -19398,8 +19398,9 @@ FtlWrite:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
 .LVL1990:
+	ldp	x25, x26, [sp, 64]
+.LVL1991:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 240
 	.cfi_remember_state
@@ -19417,16 +19418,16 @@ FtlWrite:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1991:
+.LVL1992:
 .L1516:
 	.cfi_restore_state
 	.loc 3 974 0
 	adrp	x0, .LANCHOR34
 	add	w2, w1, w2
-.LVL1992:
+.LVL1993:
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	cmp	w2, w0
-	bhi	.L1558
+	bhi	.L1556
 	.loc 3 974 0 is_stmt 0 discriminator 1
 	adrp	x0, .LANCHOR88
 	ldr	w0, [x0, #:lo12:.LANCHOR88]
@@ -19436,10 +19437,10 @@ FtlWrite:
 	adrp	x0, .LANCHOR178
 	.loc 3 978 0
 	adrp	x3, .LANCHOR12
-.LVL1993:
+.LVL1994:
 	.loc 3 977 0
 	mov	w1, 2048
-.LVL1994:
+.LVL1995:
 	.loc 3 979 0
 	sub	w2, w2, #1
 	.loc 3 977 0
@@ -19453,24 +19454,24 @@ FtlWrite:
 	adrp	x2, .LANCHOR65
 	.loc 3 978 0
 	udiv	w21, w22, w1
-.LVL1995:
+.LVL1996:
 	.loc 3 979 0
 	str	w0, [x29, 168]
-.LVL1996:
+.LVL1997:
 	.loc 3 980 0
 	sub	w23, w0, w21
 	.loc 3 982 0
 	ldr	w0, [x2, #:lo12:.LANCHOR65]
-.LVL1997:
-	.loc 3 980 0
-	add	w24, w23, 1
 .LVL1998:
+	.loc 3 980 0
+	add	w26, w23, 1
+.LVL1999:
 	.loc 3 982 0
-	add	w0, w0, w24
+	add	w0, w0, w26
 	str	w0, [x2, #:lo12:.LANCHOR65]
 	.loc 3 983 0
 	adrp	x0, .LANCHOR150
-	str	x0, [x29, 128]
+	str	x0, [x29, 120]
 	ldr	x2, [x0, #:lo12:.LANCHOR150]
 	cbz	x2, .L1518
 	.loc 3 984 0
@@ -19479,7 +19480,7 @@ FtlWrite:
 	beq	.L1519
 	.loc 3 985 0
 	bl	FtlCacheWriteBack
-.LVL1999:
+.LVL2000:
 .L1518:
 	.loc 3 1008 0
 	adrp	x0, .LANCHOR179
@@ -19499,15 +19500,138 @@ FtlWrite:
 	.loc 3 1023 0
 	adrp	x0, .LANCHOR52
 	add	x0, x0, :lo12:.LANCHOR52
-	str	x0, [x29, 104]
-.LVL2000:
+	str	x0, [x29, 96]
+.LVL2001:
 .L1522:
 	.loc 3 1011 0
-	cbz	w24, .L1556
+	cbnz	w26, .L1552
+	.loc 3 1137 0
+	ldr	w0, [x29, 168]
+	sub	w1, w0, w21
+	mov	w0, 0
+	bl	rk_ftl_garbage_collect
+.LVL2002:
+	.loc 3 1139 0
+	adrp	x0, .LANCHOR48
+	mov	x20, x0
+.LVL2003:
+	ldrh	w1, [x0, #:lo12:.LANCHOR48]
+	cmp	w1, 15
+	bhi	.L1553
+	.loc 3 1141 0
+	adrp	x22, .LANCHOR101
+.LVL2004:
+	.loc 3 1143 0
+	adrp	x21, .LANCHOR85
+.LVL2005:
+	.loc 3 1144 0
+	adrp	x19, .LANCHOR84
+.LVL2006:
+	.loc 3 1141 0
+	add	x22, x22, :lo12:.LANCHOR101
+	.loc 3 1143 0
+	add	x21, x21, :lo12:.LANCHOR85
+	.loc 3 1144 0
+	add	x19, x19, :lo12:.LANCHOR84
+.L1571:
+	.loc 3 1141 0
+	adrp	x0, .LANCHOR82
+	mov	w1, 65535
+	ldrh	w0, [x0, #:lo12:.LANCHOR82]
+	cmp	w0, w1
+	bne	.L1554
+	.loc 3 1141 0 is_stmt 0 discriminator 1
+	ldrh	w1, [x22]
+	cmp	w1, w0
+	bne	.L1554
+	.loc 3 1142 0 is_stmt 1
+	mov	w0, 0
+	bl	List_get_gc_head_node
+.LVL2007:
+	bl	FtlGcRefreshBlock
+.LVL2008:
+.L1554:
+	.loc 3 1143 0
+	mov	w0, 128
+	.loc 3 1145 0
+	mov	w1, 1
+	.loc 3 1143 0
+	strh	w0, [x21]
+	.loc 3 1144 0
+	strh	w0, [x19]
+	.loc 3 1145 0
+	mov	w0, w1
+	bl	rk_ftl_garbage_collect
+.LVL2009:
+	.loc 3 1146 0
+	mov	w1, 1
+	mov	w0, 0
+	bl	rk_ftl_garbage_collect
+.LVL2010:
+	.loc 3 1147 0
+	ldrh	w0, [x20, #:lo12:.LANCHOR48]
+	cmp	w0, 8
+	bls	.L1571
+	b	.L1553
+.LVL2011:
+.L1519:
+	.loc 3 987 0
+	adrp	x3, .LANCHOR66
+	ldr	w0, [x3, #:lo12:.LANCHOR66]
+	add	w0, w0, 1
+	str	w0, [x3, #:lo12:.LANCHOR66]
+	.loc 3 988 0
+	msub	w0, w21, w1, w22
+.LVL2012:
+	.loc 3 992 0
+	ldr	x3, [x2, 8]
+	.loc 3 989 0
+	sub	w1, w1, w0
+.LVL2013:
+	cmp	w24, w1
+	.loc 3 992 0
+	lsl	w0, w0, 9
+.LVL2014:
+	csel	w19, w24, w1, ls
+.LVL2015:
+	add	x0, x3, x0
+	lsl	w20, w19, 9
+	mov	x1, x25
+	mov	w2, w20
+	bl	ftl_memcpy
+.LVL2016:
+	.loc 3 994 0
+	cbnz	w23, .L1520
+.LVL2017:
+.L1553:
+	.loc 3 995 0
+	mov	w0, 0
+	b	.L1515
+.LVL2018:
+.L1520:
+	.loc 3 996 0
+	sub	w24, w24, w19
+.LVL2019:
+	.loc 3 997 0
+	add	w22, w22, w19
+.LVL2020:
+	.loc 3 998 0
+	add	x25, x25, x20
+.LVL2021:
+	.loc 3 999 0
+	add	w21, w21, 1
+.LVL2022:
+	.loc 3 1000 0
+	bl	FtlCacheWriteBack
+.LVL2023:
+	mov	w26, w23
+	b	.L1518
+.LVL2024:
+.L1552:
 	.loc 3 1012 0
 	adrp	x0, .LANCHOR3
 	ldrb	w2, [x19, 6]
-	str	x0, [x29, 120]
+	str	x0, [x29, 128]
 	ldrh	w1, [x0, #:lo12:.LANCHOR3]
 	cmp	w2, w1
 	bcc	.L1523
@@ -19518,14 +19642,14 @@ FtlWrite:
 	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2001:
+.LVL2025:
 .L1523:
 	.loc 3 1013 0 is_stmt 1
 	ldrh	w0, [x19, 4]
 	cbnz	w0, .L1524
 	.loc 3 1014 0
 	bl	FtlCacheWriteBack
-.LVL2002:
+.LVL2026:
 	.loc 3 1016 0
 	adrp	x0, .LANCHOR51
 	add	x0, x0, :lo12:.LANCHOR51
@@ -19538,7 +19662,7 @@ FtlWrite:
 	cbnz	w1, .L1526
 	.loc 3 1018 0
 	bl	allocate_new_data_superblock
-.LVL2003:
+.LVL2027:
 	.loc 3 1019 0
 	ldr	x0, [x29, 152]
 	str	wzr, [x0, #:lo12:.LANCHOR179]
@@ -19546,41 +19670,41 @@ FtlWrite:
 	.loc 3 1021 0
 	adrp	x0, .LANCHOR51
 	add	x19, x0, :lo12:.LANCHOR51
-.LVL2004:
+.LVL2028:
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.LVL2005:
+.LVL2029:
 	.loc 3 1022 0
 	ldr	x0, [x29, 152]
 	ldr	w0, [x0, #:lo12:.LANCHOR179]
 	.loc 3 1023 0
 	cmp	w0, 0
-	ldr	x0, [x29, 104]
+	ldr	x0, [x29, 96]
 	csel	x19, x0, x19, ne
 .L1527:
-.LVL2006:
+.LVL2030:
 	.loc 3 1033 0
 	ldrh	w0, [x19, 4]
 	cbnz	w0, .L1524
 	.loc 3 1034 0
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.LVL2007:
+.LVL2031:
 .L1524:
 	.loc 3 1043 0
 	ldrh	w0, [x19, 4]
 	.loc 3 1041 0
 	ldrb	w1, [x19, 7]
-	cmp	w0, w24
-	csel	w0, w0, w24, ls
+	cmp	w0, w26
+	csel	w0, w0, w26, ls
 	lsl	w1, w1, 2
 	cmp	w0, w1
 	csel	w0, w0, w1, ls
 	str	w0, [x29, 160]
-.LVL2008:
+.LVL2032:
 	.loc 3 1045 0
-	ldr	x0, [x29, 120]
-.LVL2009:
+	ldr	x0, [x29, 128]
+.LVL2033:
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
@@ -19592,179 +19716,71 @@ FtlWrite:
 	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2010:
+.LVL2034:
 .L1528:
 	.loc 3 1055 0 is_stmt 1 discriminator 1
 	adrp	x0, .LANCHOR24
-	adrp	x28, .LANCHOR122
 	add	x0, x0, :lo12:.LANCHOR24
 	.loc 3 1068 0 discriminator 1
 	str	xzr, [x29, 184]
 	.loc 3 1055 0 discriminator 1
 	str	x0, [x29, 112]
+	.loc 3 1101 0 discriminator 1
+	adrp	x0, .LANCHOR23
+	add	x0, x0, :lo12:.LANCHOR23
+	str	x0, [x29, 104]
 .L1529:
 	.loc 3 1046 0 discriminator 1
 	ldr	w1, [x29, 160]
+	adrp	x28, .LANCHOR122
 	ldr	w27, [x29, 184]
-.LVL2011:
+.LVL2035:
 	cmp	w27, w1
 	bcc	.L1550
 	mov	x27, x1
 .L1530:
-.LVL2012:
-	.loc 3 1127 0
-	ldr	x0, [x29, 128]
-	ldr	x0, [x0, #:lo12:.LANCHOR150]
-	cbz	x0, .L1551
-.LVL2013:
-	.loc 3 1129 0
-	sub	w24, w24, #1
-.LVL2014:
-	.loc 3 1130 0
-	subs	w27, w27, #1
-.LVL2015:
-	bne	.L1551
-.LVL2016:
-.L1556:
-	.loc 3 1137 0
-	ldr	w0, [x29, 168]
-	sub	w1, w0, w21
-	mov	w0, 0
-	bl	rk_ftl_garbage_collect
-.LVL2017:
-	.loc 3 1139 0
-	adrp	x0, .LANCHOR48
-	mov	x22, x0
-.LVL2018:
-	ldrh	w1, [x0, #:lo12:.LANCHOR48]
-	cmp	w1, 15
-	bhi	.L1553
-	.loc 3 1141 0
-	adrp	x21, .LANCHOR101
-.LVL2019:
-	.loc 3 1143 0
-	adrp	x20, .LANCHOR85
-.LVL2020:
-	.loc 3 1144 0
-	adrp	x19, .LANCHOR84
-.LVL2021:
-	.loc 3 1141 0
-	add	x21, x21, :lo12:.LANCHOR101
-	.loc 3 1143 0
-	add	x20, x20, :lo12:.LANCHOR85
-	.loc 3 1144 0
-	add	x19, x19, :lo12:.LANCHOR84
-.L1576:
-	.loc 3 1141 0
-	adrp	x0, .LANCHOR82
-	mov	w1, 65535
-	ldrh	w0, [x0, #:lo12:.LANCHOR82]
-	cmp	w0, w1
-	bne	.L1557
-	.loc 3 1141 0 is_stmt 0 discriminator 1
-	ldrh	w1, [x21]
-	cmp	w1, w0
-	bne	.L1557
-	.loc 3 1142 0 is_stmt 1
-	mov	w0, 0
-	bl	List_get_gc_head_node
-.LVL2022:
-	bl	FtlGcRefreshBlock
-.LVL2023:
-.L1557:
-	.loc 3 1143 0
-	mov	w0, 128
-	.loc 3 1145 0
-	mov	w1, 1
-	.loc 3 1143 0
-	strh	w0, [x20]
-	.loc 3 1144 0
-	strh	w0, [x19]
-	.loc 3 1145 0
-	mov	w0, w1
-	bl	rk_ftl_garbage_collect
-.LVL2024:
-	.loc 3 1146 0
-	mov	w1, 1
-	mov	w0, 0
-	bl	rk_ftl_garbage_collect
-.LVL2025:
-	.loc 3 1147 0
-	ldrh	w0, [x22, #:lo12:.LANCHOR48]
-	cmp	w0, 8
-	bls	.L1576
-	b	.L1553
-.LVL2026:
-.L1519:
-	.loc 3 987 0
-	adrp	x3, .LANCHOR66
-	ldr	w0, [x3, #:lo12:.LANCHOR66]
-	add	w0, w0, 1
-	str	w0, [x3, #:lo12:.LANCHOR66]
-	.loc 3 988 0
-	msub	w0, w21, w1, w22
-.LVL2027:
-	.loc 3 992 0
-	ldr	x3, [x2, 8]
-	.loc 3 989 0
-	sub	w1, w1, w0
-.LVL2028:
-	cmp	w25, w1
-	.loc 3 992 0
-	lsl	w0, w0, 9
-.LVL2029:
-	csel	w19, w25, w1, ls
-.LVL2030:
-	add	x0, x3, x0
-	lsl	w20, w19, 9
-	mov	x1, x26
-	mov	w2, w20
-	bl	ftl_memcpy
-.LVL2031:
-	.loc 3 994 0
-	cbnz	w23, .L1520
-.LVL2032:
-.L1553:
-	.loc 3 995 0
-	mov	w0, 0
-	b	.L1515
-.LVL2033:
-.L1520:
-	.loc 3 996 0
-	sub	w25, w25, w19
-.LVL2034:
-	.loc 3 997 0
-	add	w22, w22, w19
-.LVL2035:
-	.loc 3 998 0
-	add	x26, x26, x20
 .LVL2036:
-	.loc 3 999 0
-	add	w21, w21, 1
+	.loc 3 1133 0
+	ldr	x0, [x28, #:lo12:.LANCHOR122]
+	mov	x3, x19
+	mov	w2, 0
+	mov	w1, w27
+	bl	FtlProgPages
 .LVL2037:
-	.loc 3 1000 0
-	bl	FtlCacheWriteBack
+	.loc 3 1134 0
+	cmp	w26, w27
+	bcs	.L1551
+	.loc 3 1134 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR180
+	adrp	x0, .LC1
+	mov	w2, 1134
+	add	x1, x1, :lo12:.LANCHOR180
+	add	x0, x0, :lo12:.LC1
+	bl	printf
 .LVL2038:
-	mov	w24, w23
-	b	.L1518
+.L1551:
+	.loc 3 1135 0 is_stmt 1
+	sub	w26, w26, w27
 .LVL2039:
+	b	.L1522
+.LVL2040:
 .L1525:
 	.loc 3 1027 0
 	ldr	x1, [x29, 152]
 	str	wzr, [x1, #:lo12:.LANCHOR179]
 	.loc 3 1028 0
 	ldrh	w1, [x0, 4]
-	cbnz	w1, .L1563
+	cbnz	w1, .L1561
 	.loc 3 1029 0
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.LVL2040:
+.LVL2041:
 	b	.L1527
-.L1563:
+.L1561:
 	mov	x19, x0
-.LVL2041:
-	b	.L1524
 .LVL2042:
+	b	.L1524
+.LVL2043:
 .L1550:
 	.loc 3 1047 0
 	ldrh	w0, [x19, 4]
@@ -19774,21 +19790,20 @@ FtlWrite:
 	mov	w2, 0
 	mov	w0, w20
 	bl	log2phys
-.LVL2043:
+.LVL2044:
 	.loc 3 1052 0
 	mov	x0, x19
 	bl	get_new_active_ppa
-.LVL2044:
+.LVL2045:
 	ldr	x1, [x29, 184]
 	lsl	x23, x1, 5
 	.loc 3 1054 0
-	adrp	x1, .LANCHOR122
-	ldr	x1, [x1, #:lo12:.LANCHOR122]
+	ldr	x1, [x28, #:lo12:.LANCHOR122]
 	add	x1, x1, x23
 	str	w0, [x1, 4]
 	.loc 3 1055 0
 	ldr	x0, [x29, 112]
-.LVL2045:
+.LVL2046:
 	.loc 3 1056 0
 	str	w20, [x1, 24]
 	.loc 3 1055 0
@@ -19801,14 +19816,14 @@ FtlWrite:
 	ldr	x0, [x0, #:lo12:.LANCHOR115]
 	str	x0, [x29, 136]
 	add	x27, x0, x3
-.LVL2046:
+.LVL2047:
 	str	x27, [x1, 16]
 	.loc 3 1059 0
 	mov	x0, x27
 	mov	w1, 0
-.LVL2047:
-	bl	ftl_memset
 .LVL2048:
+	bl	ftl_memset
+.LVL2049:
 	.loc 3 1061 0
 	ldr	w0, [x29, 168]
 	cmp	w20, w21
@@ -19823,14 +19838,14 @@ FtlWrite:
 	udiv	w0, w22, w2
 	msub	w0, w0, w2, w22
 	str	w0, [x29, 164]
-.LVL2049:
+.LVL2050:
 	.loc 3 1064 0
 	sub	w2, w2, w0
-	cmp	w2, w25
-	csel	w0, w2, w25, ls
-.LVL2050:
-	str	w0, [x29, 172]
+	cmp	w2, w24
+	csel	w0, w2, w24, ls
 .LVL2051:
+	str	w0, [x29, 172]
+.LVL2052:
 .L1533:
 	.loc 3 1072 0
 	ldr	x0, [x29, 176]
@@ -19847,11 +19862,11 @@ FtlWrite:
 	cmp	w20, w21
 	bne	.L1535
 	.loc 3 1074 0
-	str	x26, [x23, 8]
-.LVL2052:
+	str	x25, [x23, 8]
+.LVL2053:
 .L1536:
 	.loc 3 1119 0
-	ldr	x0, [x29, 120]
+	ldr	x0, [x29, 128]
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
@@ -19863,7 +19878,7 @@ FtlWrite:
 	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2053:
+.LVL2054:
 .L1547:
 	.loc 3 1120 0 is_stmt 1
 	ldp	x1, x2, [x29, 136]
@@ -19876,7 +19891,7 @@ FtlWrite:
 	stp	w0, w20, [x27, 4]
 	.loc 3 1125 0
 	add	w20, w20, 1
-.LVL2054:
+.LVL2055:
 	.loc 3 1121 0
 	add	w0, w0, 1
 	cmn	w0, #1
@@ -19892,11 +19907,11 @@ FtlWrite:
 	add	x0, x0, 1
 	str	x0, [x29, 184]
 	b	.L1529
-.LVL2055:
+.LVL2056:
 .L1532:
 	.loc 3 1069 0
 	ldr	x0, [x29, 176]
-	add	w2, w22, w25
+	add	w2, w22, w24
 	.loc 3 1068 0
 	str	wzr, [x29, 164]
 	.loc 3 1069 0
@@ -19904,22 +19919,22 @@ FtlWrite:
 	msub	w2, w20, w0, w2
 	and	w0, w2, 65535
 	str	w0, [x29, 172]
-.LVL2056:
-	b	.L1533
 .LVL2057:
+	b	.L1533
+.LVL2058:
 .L1535:
 	.loc 3 1076 0
 	ldr	w0, [x29, 172]
-.LVL2058:
-.L1579:
+.LVL2059:
+.L1574:
 	.loc 3 1117 0
 	mul	w0, w0, w20
 	sub	w0, w0, w22
 	lsl	w0, w0, 9
-	add	x0, x26, x0
+	add	x0, x25, x0
 	str	x0, [x23, 8]
 	b	.L1536
-.LVL2059:
+.LVL2060:
 .L1534:
 	.loc 3 1080 0
 	add	x0, x0, x23
@@ -19929,7 +19944,7 @@ FtlWrite:
 	.loc 3 1080 0
 	adrp	x1, .LANCHOR116
 	ldr	x1, [x1, #:lo12:.LANCHOR116]
-.L1578:
+.L1573:
 	.loc 3 1082 0
 	str	x1, [x0, 8]
 	.loc 3 1084 0
@@ -19954,7 +19969,7 @@ FtlWrite:
 	mov	w1, 1
 	add	x0, x29, 208
 	bl	FlashReadPages
-.LVL2060:
+.LVL2061:
 	.loc 3 1091 0
 	ldr	w0, [x29, 208]
 	cmn	w0, #1
@@ -19977,11 +19992,11 @@ FtlWrite:
 	ldr	w0, [x29, 164]
 	add	x1, x1, x23
 	lsl	w0, w0, 9
-	ldr	x4, [x1, 8]
-	mov	x1, x26
-	add	x0, x4, x0
+	ldr	x3, [x1, 8]
+	mov	x1, x25
+	add	x0, x3, x0
 	bl	ftl_memcpy
-.LVL2061:
+.LVL2062:
 	.loc 3 1109 0
 	ldr	w0, [x29, 168]
 	cmp	w20, w0
@@ -19993,7 +20008,7 @@ FtlWrite:
 	.loc 3 1111 0
 	ldr	x0, [x28, #:lo12:.LANCHOR122]
 	add	x23, x0, x23
-	ldr	x0, [x29, 128]
+	ldr	x0, [x29, 120]
 	str	x23, [x0, #:lo12:.LANCHOR150]
 	.loc 3 1112 0
 	adrp	x0, .LANCHOR171
@@ -20003,7 +20018,7 @@ FtlWrite:
 	.loc 3 1082 0
 	adrp	x1, .LANCHOR114
 	ldr	x1, [x1, #:lo12:.LANCHOR114]
-	b	.L1578
+	b	.L1573
 .L1540:
 .LBB299:
 	.loc 3 1094 0
@@ -20021,7 +20036,7 @@ FtlWrite:
 	mov	w2, w20
 	add	x0, x0, :lo12:.LC105
 	bl	printf
-.LVL2062:
+.LVL2063:
 .L1542:
 	.loc 3 1098 0
 	ldr	w0, [x27, 8]
@@ -20034,20 +20049,20 @@ FtlWrite:
 	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2063:
-	b	.L1543
 .LVL2064:
+	b	.L1543
+.LVL2065:
 .L1539:
 .LBE299:
 	.loc 3 1101 0 is_stmt 1
 	ldr	x0, [x28, #:lo12:.LANCHOR122]
-	adrp	x1, .LANCHOR23
+	ldr	x1, [x29, 104]
 	add	x0, x0, x23
-	ldrh	w2, [x1, #:lo12:.LANCHOR23]
+	ldrh	w2, [x1]
 	mov	w1, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-.LVL2065:
+.LVL2066:
 	b	.L1543
 .L1544:
 	.loc 3 1107 0
@@ -20059,47 +20074,20 @@ FtlWrite:
 	ldr	x0, [x0, 8]
 	sub	w1, w1, w22
 	lsl	w1, w1, 9
-	add	x1, x26, x1
+	add	x1, x25, x1
 	bl	ftl_memcpy
-.LVL2066:
-	b	.L1545
 .LVL2067:
+	b	.L1545
+.LVL2068:
 .L1531:
 	.loc 3 1117 0
-	adrp	x0, .LANCHOR122
-	ldr	x0, [x0, #:lo12:.LANCHOR122]
+	ldr	x0, [x28, #:lo12:.LANCHOR122]
 	add	x23, x0, x23
 	ldr	x0, [x29, 176]
 	ldrh	w0, [x0, #:lo12:.LANCHOR12]
-	b	.L1579
-.LVL2068:
-.L1551:
-	.loc 3 1133 0
-	adrp	x0, .LANCHOR122
-	mov	x3, x19
-	mov	w2, 0
-	mov	w1, w27
-	ldr	x0, [x0, #:lo12:.LANCHOR122]
-	bl	FtlProgPages
+	b	.L1574
 .LVL2069:
-	.loc 3 1134 0
-	cmp	w24, w27
-	bcs	.L1554
-	.loc 3 1134 0 is_stmt 0 discriminator 1
-	adrp	x1, .LANCHOR180
-	adrp	x0, .LC1
-	mov	w2, 1134
-	add	x1, x1, :lo12:.LANCHOR180
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.LVL2070:
-.L1554:
-	.loc 3 1135 0 is_stmt 1
-	sub	w24, w24, w27
-.LVL2071:
-	b	.L1522
-.LVL2072:
-.L1558:
+.L1556:
 	.loc 3 975 0
 	mov	w0, -1
 	b	.L1515
@@ -20114,17 +20102,17 @@ sftl_write:
 .LFB220:
 	.loc 3 1209 0
 	.cfi_startproc
-.LVL2073:
+.LVL2070:
 	.loc 3 1210 0
 	mov	x3, x2
 	mov	w2, w1
-.LVL2074:
+.LVL2071:
 	mov	w1, w0
-.LVL2075:
+.LVL2072:
 	mov	w0, 0
-.LVL2076:
+.LVL2073:
 	b	FtlWrite
-.LVL2077:
+.LVL2074:
 	.cfi_endproc
 .LFE220:
 	.size	sftl_write, .-sftl_write
@@ -20190,16 +20178,16 @@ FtlLoadSysInfo:
 	ldrh	w2, [x24, #:lo12:.LANCHOR5]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL2078:
+.LVL2075:
 	.loc 2 1369 0
 	ldrh	w0, [x20, #:lo12:.LANCHOR81]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L1582
-.L1590:
+	bne	.L1577
+.L1585:
 	.loc 2 1370 0
 	mov	w0, -1
-.L1581:
+.L1576:
 	.loc 2 1463 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -20222,15 +20210,15 @@ FtlLoadSysInfo:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.L1582:
+.L1577:
 	.cfi_restore_state
 	add	x27, x20, :lo12:.LANCHOR81
 	.loc 2 1372 0
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
-.LVL2079:
+.LVL2076:
 	sxth	w22, w0
-.LVL2080:
+.LVL2077:
 	.loc 2 1373 0
 	add	w0, w0, 1
 	.loc 2 1382 0
@@ -20240,9 +20228,9 @@ FtlLoadSysInfo:
 	.loc 2 1381 0
 	mov	w27, 19539
 	movk	w27, 0x4654, lsl 16
-.L1584:
+.L1579:
 	.loc 2 1375 0
-	tbz	w22, #31, .L1587
+	tbz	w22, #31, .L1582
 	.loc 2 1388 0
 	adrp	x1, .LANCHOR181
 	adrp	x0, .LC1
@@ -20250,15 +20238,15 @@ FtlLoadSysInfo:
 	add	x1, x1, :lo12:.LANCHOR181
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2081:
-.L1586:
+.LVL2078:
+.L1581:
 	.loc 2 1390 0
 	adrp	x1, .LANCHOR23
 	ldrh	w0, [x24, #:lo12:.LANCHOR5]
 	ldrh	w1, [x1, #:lo12:.LANCHOR23]
 	add	x0, x0, 24
 	cmp	x1, x0, lsl 1
-	bcs	.L1589
+	bcs	.L1584
 	.loc 2 1390 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR181
 	adrp	x0, .LC1
@@ -20266,18 +20254,18 @@ FtlLoadSysInfo:
 	add	x1, x1, :lo12:.LANCHOR181
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2082:
-.L1589:
+.LVL2079:
+.L1584:
 	.loc 2 1392 0 is_stmt 1
 	add	x22, x19, :lo12:.LANCHOR108
-.LVL2083:
+.LVL2080:
 	adrp	x19, .LANCHOR79
 	add	x21, x19, :lo12:.LANCHOR79
 	mov	w2, 48
 	mov	x0, x21
 	ldr	x1, [x22, 8]
 	bl	ftl_memcpy
-.LVL2084:
+.LVL2081:
 	.loc 2 1393 0
 	ldr	x0, [x25, #:lo12:.LANCHOR43]
 	ldrh	w2, [x24, #:lo12:.LANCHOR5]
@@ -20285,7 +20273,7 @@ FtlLoadSysInfo:
 	lsl	w2, w2, 1
 	add	x1, x1, 48
 	bl	ftl_memcpy
-.LVL2085:
+.LVL2082:
 	.loc 2 1394 0
 	ldrh	w1, [x24, #:lo12:.LANCHOR5]
 	ldr	x0, [x22, 8]
@@ -20298,13 +20286,13 @@ FtlLoadSysInfo:
 	adrp	x0, .LANCHOR1
 	ldr	x0, [x0, #:lo12:.LANCHOR1]
 	bl	ftl_memcpy
-.LVL2086:
+.LVL2083:
 	.loc 2 1396 0
 	ldr	w1, [x19, #:lo12:.LANCHOR79]
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1590
+	bne	.L1585
 	.loc 2 1399 0
 	add	x20, x20, :lo12:.LANCHOR81
 	.loc 2 1400 0
@@ -20318,7 +20306,7 @@ FtlLoadSysInfo:
 	strh	w1, [x20, 6]
 	.loc 2 1400 0
 	cmp	w2, w0
-	bne	.L1590
+	bne	.L1585
 	.loc 2 1403 0
 	adrp	x0, .LANCHOR182
 	.loc 2 1404 0
@@ -20355,7 +20343,7 @@ FtlLoadSysInfo:
 	adrp	x3, .LANCHOR80
 	strh	w0, [x3, #:lo12:.LANCHOR80]
 	.loc 2 1412 0
-	bls	.L1591
+	bls	.L1586
 	.loc 2 1412 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR181
 	adrp	x0, .LC1
@@ -20363,8 +20351,8 @@ FtlLoadSysInfo:
 	add	x1, x1, :lo12:.LANCHOR181
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2087:
-.L1591:
+.LVL2084:
+.L1586:
 	.loc 2 1414 0 is_stmt 1
 	add	x1, x19, :lo12:.LANCHOR79
 	adrp	x0, .LANCHOR51
@@ -20464,64 +20452,64 @@ FtlLoadSysInfo:
 	adrp	x1, .LANCHOR71
 	ldr	w5, [x1, #:lo12:.LANCHOR71]
 	cmp	w3, w5
-	bls	.L1592
+	bls	.L1587
 	.loc 2 1445 0
 	str	w3, [x1, #:lo12:.LANCHOR71]
-.L1592:
+.L1587:
 	.loc 2 1447 0
 	add	x19, x19, :lo12:.LANCHOR79
 	adrp	x1, .LANCHOR72
 	ldr	w3, [x1, #:lo12:.LANCHOR72]
 	ldr	w2, [x19, 36]
 	cmp	w2, w3
-	bls	.L1593
+	bls	.L1588
 	.loc 2 1448 0
 	str	w2, [x1, #:lo12:.LANCHOR72]
-.L1593:
+.L1588:
 	.loc 2 1450 0
 	mov	w1, 65535
 	cmp	w6, w1
-	beq	.L1594
+	beq	.L1589
 	.loc 2 1451 0
 	add	x0, x0, :lo12:.LANCHOR51
 	bl	make_superblock
-.LVL2088:
-.L1594:
+.LVL2085:
+.L1589:
 	.loc 2 1453 0
 	ldrh	w2, [x21, #:lo12:.LANCHOR52]
 	mov	w1, 65535
 	add	x0, x21, :lo12:.LANCHOR52
 	cmp	w2, w1
-	beq	.L1595
+	beq	.L1590
 	.loc 2 1454 0
 	bl	make_superblock
-.LVL2089:
-.L1595:
+.LVL2086:
+.L1590:
 	.loc 2 1456 0
 	ldrh	w2, [x22, #:lo12:.LANCHOR53]
 	mov	w1, 65535
 	add	x0, x22, :lo12:.LANCHOR53
 	cmp	w2, w1
-	beq	.L1596
+	beq	.L1591
 	.loc 2 1457 0
 	bl	make_superblock
-.LVL2090:
-.L1596:
+.LVL2087:
+.L1591:
 	.loc 2 1459 0
 	ldrh	w2, [x20, #:lo12:.LANCHOR82]
 	mov	w1, 65535
 	add	x0, x20, :lo12:.LANCHOR82
 	cmp	w2, w1
-	beq	.L1597
+	beq	.L1592
 	.loc 2 1460 0
 	bl	make_superblock
-.LVL2091:
-.L1597:
+.LVL2088:
+.L1592:
 	.loc 2 1462 0
 	mov	w0, 0
-	b	.L1581
-.LVL2092:
-.L1587:
+	b	.L1576
+.LVL2089:
+.L1582:
 	.loc 2 1376 0
 	ldrh	w0, [x20, #:lo12:.LANCHOR81]
 	.loc 2 1378 0
@@ -20536,29 +20524,29 @@ FtlLoadSysInfo:
 	.loc 2 1378 0
 	mov	x0, x21
 	bl	FlashReadPages
-.LVL2093:
+.LVL2090:
 	.loc 2 1381 0
 	ldr	w0, [x21]
 	cmn	w0, #1
-	beq	.L1585
+	beq	.L1580
 	.loc 2 1382 0 discriminator 1
 	ldr	x0, [x23, #:lo12:.LANCHOR39]
 	.loc 2 1381 0 discriminator 1
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L1585
+	bne	.L1580
 	.loc 2 1383 0
 	ldr	x0, [x26, #:lo12:.LANCHOR109]
 	ldrh	w0, [x0]
 	.loc 2 1382 0
 	cmp	w0, w28
-	beq	.L1586
-.L1585:
+	beq	.L1581
+.L1580:
 	sub	w22, w22, #1
-.LVL2094:
+.LVL2091:
 	sxth	w22, w22
-.LVL2095:
-	b	.L1584
+.LVL2092:
+	b	.L1579
 	.cfi_endproc
 .LFE274:
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
@@ -20598,20 +20586,20 @@ FtlSysBlkInit:
 	strh	wzr, [x20, #:lo12:.LANCHOR162]
 	.loc 2 2312 0
 	bl	FtlFreeSysBlkQueueInit
-.LVL2096:
+.LVL2093:
 	.loc 2 2313 0
 	bl	FtlScanSysBlk
-.LVL2097:
+.LVL2094:
 	.loc 2 2314 0
 	adrp	x0, .LANCHOR81
 	ldrh	w1, [x0, #:lo12:.LANCHOR81]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1604
-.L1606:
+	bne	.L1599
+.L1601:
 	.loc 2 2315 0
 	mov	w23, -1
-.L1603:
+.L1598:
 	.loc 2 2398 0
 	mov	w0, w23
 	ldp	x19, x20, [sp, 16]
@@ -20629,38 +20617,38 @@ FtlSysBlkInit:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.L1604:
+.L1599:
 	.cfi_restore_state
 	.loc 2 2317 0
 	bl	FtlLoadSysInfo
-.LVL2098:
+.LVL2095:
 	mov	w23, w0
-	cbnz	w0, .L1606
+	cbnz	w0, .L1601
 	.loc 2 2320 0
 	bl	FtlLoadMapInfo
-.LVL2099:
+.LVL2096:
 	.loc 2 2321 0
 	bl	FtlLoadVonderInfo
-.LVL2100:
+.LVL2097:
 	.loc 2 2322 0
 	bl	Ftl_load_ext_data
-.LVL2101:
+.LVL2098:
 	.loc 2 2324 0
 	bl	FtlLoadEctTbl
-.LVL2102:
+.LVL2099:
 	.loc 2 2325 0
 	bl	FtlFreeSysBLkSort
-.LVL2103:
+.LVL2100:
 	.loc 2 2327 0
 	bl	SupperBlkListInit
-.LVL2104:
+.LVL2101:
 	.loc 2 2328 0
 	bl	FtlPowerLostRecovery
-.LVL2105:
+.LVL2102:
 	.loc 2 2330 0
 	mov	w0, 1
 	bl	FtlUpdateVaildLpn
-.LVL2106:
+.LVL2103:
 .LBB303:
 .LBB304:
 	.loc 2 2332 0
@@ -20672,14 +20660,14 @@ FtlSysBlkInit:
 	.loc 2 2332 0
 	mov	w0, 0
 	add	x1, x1, 4
-.L1607:
-.LVL2107:
+.L1602:
+.LVL2104:
 	cmp	w0, w2
-	bge	.L1612
+	bge	.L1607
 	.loc 2 2333 0
 	ldr	w3, [x1], 16
-	tbz	w3, #31, .L1608
-.L1612:
+	tbz	w3, #31, .L1603
+.L1607:
 	.loc 2 2336 0
 	adrp	x19, .LANCHOR79
 	add	x3, x19, :lo12:.LANCHOR79
@@ -20691,9 +20679,9 @@ FtlSysBlkInit:
 	add	w1, w1, 1
 	strh	w1, [x3, 28]
 	.loc 2 2338 0
-	bge	.L1618
-.LVL2108:
-.L1609:
+	bge	.L1613
+.LVL2105:
+.L1604:
 	.loc 2 2339 0
 	add	x21, x22, :lo12:.LANCHOR51
 	.loc 2 2340 0
@@ -20704,11 +20692,11 @@ FtlSysBlkInit:
 	add	x20, x24, :lo12:.LANCHOR52
 	.loc 2 2339 0
 	bl	FtlSuperblockPowerLostFix
-.LVL2109:
+.LVL2106:
 	.loc 2 2340 0
 	mov	x0, x20
 	bl	FtlSuperblockPowerLostFix
-.LVL2110:
+.LVL2107:
 .LBB305:
 	.loc 2 2346 0
 	adrp	x0, .LANCHOR43
@@ -20731,7 +20719,7 @@ FtlSysBlkInit:
 	ldrh	w0, [x24, #:lo12:.LANCHOR52]
 	.loc 2 2349 0
 	strh	wzr, [x21, 4]
-.LVL2111:
+.LVL2108:
 	.loc 2 2352 0
 	ldrh	w4, [x20, 4]
 	lsl	x0, x0, 1
@@ -20750,12 +20738,12 @@ FtlSysBlkInit:
 	adrp	x0, .LANCHOR144
 	add	x0, x0, :lo12:.LANCHOR144
 	bl	FtlMapBlkWriteDump_data
-.LVL2112:
+.LVL2109:
 	.loc 2 2360 0
 	adrp	x0, .LANCHOR149
 	add	x0, x0, :lo12:.LANCHOR149
 	bl	FtlMapBlkWriteDump_data
-.LVL2113:
+.LVL2110:
 	.loc 2 2372 0
 	add	x1, x19, :lo12:.LANCHOR79
 	ldrh	w0, [x1, 30]
@@ -20763,65 +20751,65 @@ FtlSysBlkInit:
 	strh	w0, [x1, 30]
 	.loc 2 2373 0
 	bl	l2p_flush
-.LVL2114:
+.LVL2111:
 	.loc 2 2374 0
 	bl	FtlVpcTblFlush
-.LVL2115:
+.LVL2112:
 	.loc 2 2375 0
 	bl	FtlVpcTblFlush
-.LVL2116:
-	b	.L1613
-.LVL2117:
-.L1608:
+.LVL2113:
+	b	.L1608
+.LVL2114:
+.L1603:
 	.loc 2 2332 0
 	add	w0, w0, 1
-.LVL2118:
-	b	.L1607
-.L1618:
+.LVL2115:
+	b	.L1602
+.L1613:
 	.loc 2 2338 0
 	ldrh	w0, [x20, #:lo12:.LANCHOR162]
-.LVL2119:
-	cbnz	w0, .L1609
-.L1613:
+.LVL2116:
+	cbnz	w0, .L1604
+.L1608:
 	.loc 2 2379 0
 	ldrh	w0, [x22, #:lo12:.LANCHOR51]
 	mov	w1, 65535
 	add	x21, x22, :lo12:.LANCHOR51
 	cmp	w0, w1
-	beq	.L1614
+	beq	.L1609
 	ldrh	w1, [x21, 4]
-	cbnz	w1, .L1614
+	cbnz	w1, .L1609
 	.loc 2 2381 0
 	adrp	x22, .LANCHOR52
 	add	x20, x22, :lo12:.LANCHOR52
 	.loc 2 2380 0
 	ldrh	w1, [x20, 4]
-	cbnz	w1, .L1614
+	cbnz	w1, .L1609
 	.loc 2 2382 0
 	bl	FtlGcRefreshBlock
-.LVL2120:
+.LVL2117:
 	.loc 2 2383 0
 	ldrh	w0, [x22, #:lo12:.LANCHOR52]
 	bl	FtlGcRefreshBlock
-.LVL2121:
+.LVL2118:
 	.loc 2 2384 0
 	mov	x0, x21
 	bl	allocate_new_data_superblock
-.LVL2122:
+.LVL2119:
 	.loc 2 2385 0
 	mov	x0, x20
 	bl	allocate_new_data_superblock
-.LVL2123:
-.L1614:
+.LVL2120:
+.L1609:
 	.loc 2 2390 0
 	add	x19, x19, :lo12:.LANCHOR79
 	ldrh	w0, [x19, 28]
 	tst	x0, 31
-	bne	.L1603
+	bne	.L1598
 	.loc 2 2391 0
 	bl	FtlVpcCheckAndModify
-.LVL2124:
-	b	.L1603
+.LVL2121:
+	b	.L1598
 .LBE304:
 .LBE303:
 	.cfi_endproc
@@ -20870,15 +20858,15 @@ ftl_low_format:
 	str	wzr, [x20, #:lo12:.LANCHOR71]
 	.loc 3 631 0
 	bl	FtlFreeSysBlkQueueInit
-.LVL2125:
+.LVL2122:
 	.loc 3 632 0
 	bl	FtlLoadBbt
-.LVL2126:
-	cbz	w0, .L1621
+.LVL2123:
+	cbz	w0, .L1616
 	.loc 3 633 0
 	bl	FtlMakeBbt
-.LVL2127:
-.L1621:
+.LVL2124:
+.L1616:
 	.loc 3 635 0 discriminator 1
 	adrp	x23, .LANCHOR12
 	.loc 3 636 0 discriminator 1
@@ -20898,12 +20886,12 @@ ftl_low_format:
 	.loc 3 637 0 discriminator 1
 	ldr	x5, [x0, #:lo12:.LANCHOR114]
 	mov	w0, 0
-.L1622:
-.LVL2128:
+.L1617:
+.LVL2125:
 	.loc 3 635 0 discriminator 1
 	cmp	w0, w1
-	blt	.L1623
-.LVL2129:
+	blt	.L1618
+.LVL2126:
 	.loc 3 642 0
 	adrp	x21, .LANCHOR5
 	adrp	x22, .LANCHOR6
@@ -20912,32 +20900,32 @@ ftl_low_format:
 	mov	w19, 0
 	.loc 3 642 0
 	ldrh	w25, [x21, #:lo12:.LANCHOR5]
-.LVL2130:
-.L1624:
+.LVL2127:
+.L1619:
 	.loc 3 642 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x26]
 	cmp	w0, w25
-	bhi	.L1625
+	bhi	.L1620
 	.loc 3 645 0 is_stmt 1
 	adrp	x25, .LANCHOR3
-.LVL2131:
+.LVL2128:
 	sub	w1, w19, #2
 	ldrh	w0, [x25, #:lo12:.LANCHOR3]
 	cmp	w1, w0, lsl 1
-	bgt	.L1626
-.LVL2132:
-.L1630:
+	bgt	.L1621
+.LVL2129:
+.L1625:
 	.loc 3 656 0
 	add	x26, x21, :lo12:.LANCHOR5
 	.loc 3 641 0
 	mov	w19, 0
 	mov	w24, 0
-.L1627:
-.LVL2133:
+.L1622:
+.LVL2130:
 	.loc 3 656 0 discriminator 1
 	ldrh	w0, [x26]
 	cmp	w0, w24
-	bhi	.L1631
+	bhi	.L1626
 	.loc 3 658 0
 	adrp	x0, .LANCHOR113
 	ldrh	w1, [x22, #:lo12:.LANCHOR6]
@@ -20963,7 +20951,7 @@ ftl_low_format:
 	mov	w6, 24
 	mul	w6, w4, w6
 	cmp	w19, w6
-	ble	.L1632
+	ble	.L1627
 	.loc 3 664 0
 	sub	w1, w1, w19
 	udiv	w1, w1, w4
@@ -20972,11 +20960,11 @@ ftl_low_format:
 	lsr	w1, w1, 5
 	add	w1, w1, 24
 	strh	w1, [x2, #:lo12:.LANCHOR80]
-.L1632:
+.L1627:
 	.loc 3 668 0
 	adrp	x1, .LANCHOR15
 	ldrh	w1, [x1, #:lo12:.LANCHOR15]
-	cbz	w1, .L1634
+	cbz	w1, .L1629
 	.loc 3 669 0
 	ldrh	w6, [x2, #:lo12:.LANCHOR80]
 	add	w6, w6, w1, lsr 1
@@ -20984,7 +20972,7 @@ ftl_low_format:
 	.loc 3 670 0
 	mul	w6, w1, w4
 	cmp	w19, w6
-	bge	.L1634
+	bge	.L1629
 	.loc 3 672 0
 	add	w1, w1, 32
 	.loc 3 671 0
@@ -20992,14 +20980,14 @@ ftl_low_format:
 	.loc 3 672 0
 	add	w1, w0, w1
 	strh	w1, [x2, #:lo12:.LANCHOR80]
-.L1634:
+.L1629:
 	.loc 3 677 0
 	ldrh	w1, [x2, #:lo12:.LANCHOR80]
 	adrp	x25, .LANCHOR182
 	ldr	w0, [x3, #:lo12:.LANCHOR62]
 	.loc 3 687 0
 	adrp	x24, .LANCHOR43
-.LVL2134:
+.LVL2131:
 	.loc 3 677 0
 	sub	w0, w0, w1
 	.loc 3 678 0
@@ -21022,14 +21010,14 @@ ftl_low_format:
 	str	w0, [x1, #:lo12:.LANCHOR34]
 	.loc 3 684 0
 	bl	FtlBbmTblFlush
-.LVL2135:
+.LVL2132:
 	.loc 3 687 0
 	ldr	x0, [x24, #:lo12:.LANCHOR43]
 	mov	w1, 0
 	ldrh	w2, [x22, #:lo12:.LANCHOR6]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL2136:
+.LVL2133:
 	.loc 3 688 0
 	adrp	x0, .LANCHOR60
 	.loc 3 689 0
@@ -21053,7 +21041,7 @@ ftl_low_format:
 	.loc 3 694 0
 	adrp	x0, .LANCHOR51
 	add	x19, x0, :lo12:.LANCHOR51
-.LVL2137:
+.LVL2134:
 	.loc 3 696 0
 	strh	wzr, [x0, #:lo12:.LANCHOR51]
 	.loc 3 697 0
@@ -21069,16 +21057,16 @@ ftl_low_format:
 	strb	wzr, [x19, 6]
 	.loc 3 698 0
 	bl	ftl_memset
-.LVL2138:
-.L1636:
+.LVL2135:
+.L1631:
 	.loc 3 701 0
 	mov	x0, x19
 	bl	make_superblock
-.LVL2139:
+.LVL2136:
 	.loc 3 702 0
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1637
+	cbnz	w1, .L1632
 	.loc 3 705 0
 	ldr	x1, [x24, #:lo12:.LANCHOR43]
 	ubfiz	x0, x0, 1, 16
@@ -21088,101 +21076,101 @@ ftl_low_format:
 	add	w0, w0, 1
 	strh	w0, [x19]
 	.loc 3 707 0
-	b	.L1636
-.LVL2140:
-.L1623:
+	b	.L1631
+.LVL2137:
+.L1618:
 	.loc 3 636 0 discriminator 3
 	ubfiz	x3, x0, 2, 16
 	mvn	w2, w0
 	orr	w2, w0, w2, lsl 16
 	.loc 3 635 0 discriminator 3
 	add	w0, w0, 1
-.LVL2141:
+.LVL2138:
 	and	w0, w0, 65535
-.LVL2142:
+.LVL2139:
 	.loc 3 636 0 discriminator 3
 	str	w2, [x4, x3]
 	.loc 3 637 0 discriminator 3
 	str	w6, [x5, x3]
-	b	.L1622
-.LVL2143:
-.L1625:
+	b	.L1617
+.LVL2140:
+.L1620:
 	.loc 3 643 0 discriminator 3
 	mov	w0, w25
 	mov	w1, 1
 	.loc 3 642 0 discriminator 3
 	add	w25, w25, 1
-.LVL2144:
+.LVL2141:
 	.loc 3 643 0 discriminator 3
 	bl	FtlLowFormatEraseBlock
-.LVL2145:
+.LVL2142:
 	add	w19, w19, w0
-.LVL2146:
+.LVL2143:
 	.loc 3 642 0 discriminator 3
 	and	w25, w25, 65535
 	.loc 3 643 0 discriminator 3
 	and	w19, w19, 65535
-.LVL2147:
-	b	.L1624
-.LVL2148:
-.L1626:
+.LVL2144:
+	b	.L1619
+.LVL2145:
+.L1621:
 	.loc 3 647 0
 	udiv	w0, w19, w0
 	adrp	x1, .LANCHOR31
 	ldr	w19, [x1, #:lo12:.LANCHOR31]
-.LVL2149:
+.LVL2146:
 	add	w0, w0, w19
 	bl	FtlSysBlkNumInit
-.LVL2150:
+.LVL2147:
 	.loc 3 648 0
 	ldrh	w0, [x24, #:lo12:.LANCHOR4]
 	.loc 3 650 0
 	add	x24, x22, :lo12:.LANCHOR6
 	.loc 3 648 0
 	bl	FtlFreeSysBlkQueueInit
-.LVL2151:
+.LVL2148:
 	.loc 3 650 0
 	ldrh	w19, [x21, #:lo12:.LANCHOR5]
-.LVL2152:
-.L1628:
+.LVL2149:
+.L1623:
 	.loc 3 650 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x24]
 	cmp	w0, w19
-	bls	.L1630
+	bls	.L1625
 	.loc 3 651 0 is_stmt 1 discriminator 3
 	mov	w0, w19
 	.loc 3 650 0 discriminator 3
 	add	w19, w19, 1
-.LVL2153:
+.LVL2150:
 	.loc 3 651 0 discriminator 3
 	mov	w1, 1
 	.loc 3 650 0 discriminator 3
 	and	w19, w19, 65535
 	.loc 3 651 0 discriminator 3
 	bl	FtlLowFormatEraseBlock
-.LVL2154:
-	b	.L1628
-.LVL2155:
-.L1631:
+.LVL2151:
+	b	.L1623
+.LVL2152:
+.L1626:
 	.loc 3 657 0 discriminator 3
 	mov	w0, w24
 	mov	w1, 0
 	.loc 3 656 0 discriminator 3
 	add	w24, w24, 1
-.LVL2156:
+.LVL2153:
 	.loc 3 657 0 discriminator 3
 	bl	FtlLowFormatEraseBlock
-.LVL2157:
+.LVL2154:
 	add	w19, w19, w0
-.LVL2158:
+.LVL2155:
 	.loc 3 656 0 discriminator 3
 	and	w24, w24, 65535
 	.loc 3 657 0 discriminator 3
 	and	w19, w19, 65535
-.LVL2159:
-	b	.L1627
-.LVL2160:
-.L1637:
+.LVL2156:
+	b	.L1622
+.LVL2157:
+.L1632:
 	.loc 3 709 0
 	ldr	w1, [x20, #:lo12:.LANCHOR71]
 	.loc 3 710 0
@@ -21217,15 +21205,15 @@ ftl_low_format:
 	strb	wzr, [x0, 6]
 	.loc 3 715 0
 	strb	w1, [x0, 8]
-.L1638:
+.L1633:
 	.loc 3 717 0
 	mov	x0, x19
 	bl	make_superblock
-.LVL2161:
+.LVL2158:
 	.loc 3 718 0
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1639
+	cbnz	w1, .L1634
 	.loc 3 721 0
 	ldr	x1, [x24, #:lo12:.LANCHOR43]
 	ubfiz	x0, x0, 1, 16
@@ -21235,8 +21223,8 @@ ftl_low_format:
 	add	w0, w0, 1
 	strh	w0, [x19]
 	.loc 3 723 0
-	b	.L1638
-.L1639:
+	b	.L1633
+.L1634:
 	.loc 3 725 0
 	ldr	w1, [x20, #:lo12:.LANCHOR71]
 	.loc 3 726 0
@@ -21257,7 +21245,7 @@ ftl_low_format:
 	strh	w4, [x0, #:lo12:.LANCHOR53]
 	.loc 3 730 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL2162:
+.LVL2159:
 	adrp	x2, .LANCHOR81
 	add	x1, x2, :lo12:.LANCHOR81
 	strh	w0, [x2, #:lo12:.LANCHOR81]
@@ -21276,16 +21264,16 @@ ftl_low_format:
 	str	w0, [x20, #:lo12:.LANCHOR71]
 	.loc 3 735 0
 	bl	FtlVpcTblFlush
-.LVL2163:
+.LVL2160:
 	.loc 3 736 0
 	bl	FtlSysBlkInit
-.LVL2164:
-	cbnz	w0, .L1640
+.LVL2161:
+	cbnz	w0, .L1635
 	.loc 3 737 0
 	adrp	x0, .LANCHOR88
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR88]
-.L1640:
+.L1635:
 	.loc 3 739 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
@@ -21316,7 +21304,7 @@ sftl_init:
 .LFB211:
 	.loc 3 743 0
 	.cfi_startproc
-.LVL2165:
+.LVL2162:
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
@@ -21338,32 +21326,32 @@ sftl_init:
 	adrp	x0, .LC71
 	add	x0, x0, :lo12:.LC71
 	bl	printf
-.LVL2166:
+.LVL2163:
 	.loc 3 750 0
 	adrp	x0, .LANCHOR0
 	add	x0, x0, :lo12:.LANCHOR0
 	bl	FtlConstantsInit
-.LVL2167:
+.LVL2164:
 	.loc 3 751 0
 	bl	FtlMemInit
-.LVL2168:
+.LVL2165:
 	.loc 3 752 0
 	bl	FtlVariablesInit
-.LVL2169:
+.LVL2166:
 	.loc 3 753 0
 	adrp	x0, .LANCHOR4
 	ldrh	w0, [x0, #:lo12:.LANCHOR4]
 	bl	FtlFreeSysBlkQueueInit
-.LVL2170:
+.LVL2167:
 .LDL2:
 	.loc 3 756 0
 	bl	FtlLoadBbt
-.LVL2171:
-	cbnz	w0, .L1649
+.LVL2168:
+	cbnz	w0, .L1644
 	.loc 3 767 0
 	bl	FtlSysBlkInit
-.LVL2172:
-	cbnz	w0, .L1649
+.LVL2169:
+	cbnz	w0, .L1644
 	.loc 3 779 0
 	mov	w0, 1
 	str	w0, [x19, #:lo12:.LANCHOR88]
@@ -21371,22 +21359,22 @@ sftl_init:
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 15
-	bhi	.L1649
+	bhi	.L1644
 	mov	w19, 8129
-.L1648:
-.LVL2173:
+.L1643:
+.LVL2170:
 .LBB306:
 	.loc 3 786 0 discriminator 3
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-.LVL2174:
+.LVL2171:
 	.loc 3 785 0 discriminator 3
 	subs	w19, w19, #1
-.LVL2175:
-	bne	.L1648
-.LVL2176:
-.L1649:
+.LVL2172:
+	bne	.L1643
+.LVL2173:
+.L1644:
 .LBE306:
 	.loc 3 794 0
 	mov	w0, 0
@@ -21408,11 +21396,11 @@ ftl_memcmp:
 .LFB348:
 	.loc 1 252 0
 	.cfi_startproc
-.LVL2177:
+.LVL2174:
 	.loc 1 253 0
 	uxtw	x2, w2
 	b	memcmp
-.LVL2178:
+.LVL2175:
 	.cfi_endproc
 .LFE348:
 	.size	ftl_memcmp, .-ftl_memcmp
@@ -23128,7 +23116,7 @@ __func__.7632:
 	.file 31 "include/log.h"
 	.section	.debug_info,"",@progbits
 .Ldebug_info0:
-	.4byte	0xa973
+	.4byte	0xa977
 	.2byte	0x4
 	.4byte	.Ldebug_abbrev0
 	.byte	0x8
@@ -27342,8 +27330,8 @@ __func__.7632:
 	.4byte	0x30
 	.4byte	.LLST472
 	.uleb128 0x2f
-	.8byte	.LVL2178
-	.4byte	0xa926
+	.8byte	.LVL2175
+	.4byte	0xa92a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -27400,7 +27388,7 @@ __func__.7632:
 	.4byte	.LLST307
 	.uleb128 0x2f
 	.8byte	.LVL1243
-	.4byte	0xa931
+	.4byte	0xa935
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -27457,7 +27445,7 @@ __func__.7632:
 	.4byte	.LLST200
 	.uleb128 0x2f
 	.8byte	.LVL740
-	.4byte	0xa93d
+	.4byte	0xa941
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -27689,7 +27677,7 @@ __func__.7632:
 	.4byte	.LLST183
 	.uleb128 0x36
 	.8byte	.LVL671
-	.4byte	0x9739
+	.4byte	0x973d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -27824,7 +27812,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL660
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x2906
 	.uleb128 0x30
 	.uleb128 0x1
@@ -27835,7 +27823,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL661
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x2925
 	.uleb128 0x30
 	.uleb128 0x1
@@ -27846,7 +27834,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x36
 	.8byte	.LVL662
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -27857,7 +27845,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL650
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x296c
 	.uleb128 0x30
 	.uleb128 0x1
@@ -27880,7 +27868,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x36
 	.8byte	.LVL651
-	.4byte	0x9739
+	.4byte	0x973d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -27984,7 +27972,7 @@ __func__.7632:
 	.8byte	__func__.7615
 	.uleb128 0x34
 	.8byte	.LVL604
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x2a7a
 	.uleb128 0x30
 	.uleb128 0x1
@@ -28007,7 +27995,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x36
 	.8byte	.LVL605
-	.4byte	0x9739
+	.4byte	0x973d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -28150,7 +28138,7 @@ __func__.7632:
 	.4byte	.LLST153
 	.uleb128 0x44
 	.8byte	.LVL589
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x2bd8
 	.uleb128 0x30
 	.uleb128 0x1
@@ -28161,7 +28149,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL590
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x2bfc
 	.uleb128 0x30
 	.uleb128 0x1
@@ -28184,10 +28172,10 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x45
 	.8byte	.LVL591
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x36
 	.8byte	.LVL594
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28217,7 +28205,7 @@ __func__.7632:
 	.4byte	.LLST144
 	.uleb128 0x2f
 	.8byte	.LVL581
-	.4byte	0xa954
+	.4byte	0xa958
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28264,7 +28252,7 @@ __func__.7632:
 	.4byte	.LLST143
 	.uleb128 0x2f
 	.8byte	.LVL579
-	.4byte	0xa95f
+	.4byte	0xa963
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28534,7 +28522,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL568
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x2f5e
 	.uleb128 0x30
 	.uleb128 0x1
@@ -28578,7 +28566,7 @@ __func__.7632:
 	.4byte	.LLST138
 	.uleb128 0x36
 	.8byte	.LVL561
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28682,7 +28670,7 @@ __func__.7632:
 	.4byte	0x313f
 	.uleb128 0x45
 	.8byte	.LVL1825
-	.4byte	0x7d55
+	.4byte	0x7d59
 	.uleb128 0x34
 	.8byte	.LVL1826
 	.4byte	0x3320
@@ -29019,10 +29007,10 @@ __func__.7632:
 	.4byte	0x7342
 	.uleb128 0x45
 	.8byte	.LVL1779
-	.4byte	0x7d55
+	.4byte	0x7d59
 	.uleb128 0x34
 	.8byte	.LVL1780
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x3450
 	.uleb128 0x30
 	.uleb128 0x1
@@ -29065,7 +29053,7 @@ __func__.7632:
 	.4byte	0x5694
 	.uleb128 0x34
 	.8byte	.LVL1789
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x34ba
 	.uleb128 0x30
 	.uleb128 0x1
@@ -29330,7 +29318,7 @@ __func__.7632:
 	.8byte	__func__.7175
 	.uleb128 0x34
 	.8byte	.LVL1341
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x373f
 	.uleb128 0x30
 	.uleb128 0x1
@@ -29352,7 +29340,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1346
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x3772
 	.uleb128 0x30
 	.uleb128 0x1
@@ -29378,7 +29366,7 @@ __func__.7632:
 	.4byte	0x37c4
 	.uleb128 0x36
 	.8byte	.LVL1349
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29470,7 +29458,7 @@ __func__.7632:
 	.8byte	__func__.7155
 	.uleb128 0x34
 	.8byte	.LVL508
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x389c
 	.uleb128 0x30
 	.uleb128 0x1
@@ -29493,7 +29481,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL509
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x38cf
 	.uleb128 0x30
 	.uleb128 0x1
@@ -29516,7 +29504,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL510
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x3902
 	.uleb128 0x30
 	.uleb128 0x1
@@ -29539,7 +29527,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x36
 	.8byte	.LVL514
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29590,7 +29578,7 @@ __func__.7632:
 	.8byte	__func__.7148
 	.uleb128 0x34
 	.8byte	.LVL1703
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x39ba
 	.uleb128 0x30
 	.uleb128 0x1
@@ -29753,7 +29741,7 @@ __func__.7632:
 	.4byte	.LLST319
 	.uleb128 0x36
 	.8byte	.LVL1297
-	.4byte	0x979b
+	.4byte	0x979f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29768,7 +29756,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1269
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x3b80
 	.uleb128 0x30
 	.uleb128 0x1
@@ -29802,7 +29790,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1275
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x3bd2
 	.uleb128 0x30
 	.uleb128 0x1
@@ -29847,7 +29835,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1278
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x3c35
 	.uleb128 0x30
 	.uleb128 0x1
@@ -29870,7 +29858,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1281
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x3c68
 	.uleb128 0x30
 	.uleb128 0x1
@@ -29893,7 +29881,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1283
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x3c9b
 	.uleb128 0x30
 	.uleb128 0x1
@@ -29916,7 +29904,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1284
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x3cce
 	.uleb128 0x30
 	.uleb128 0x1
@@ -29994,7 +29982,7 @@ __func__.7632:
 	.4byte	0x75ef
 	.uleb128 0x36
 	.8byte	.LVL1306
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30097,7 +30085,7 @@ __func__.7632:
 	.4byte	0x3edd
 	.uleb128 0x36
 	.8byte	.LVL495
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30264,7 +30252,7 @@ __func__.7632:
 	.4byte	.LLST252
 	.uleb128 0x34
 	.8byte	.LVL956
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x4032
 	.uleb128 0x30
 	.uleb128 0x1
@@ -30303,7 +30291,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL960
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x407b
 	.uleb128 0x30
 	.uleb128 0x1
@@ -30341,7 +30329,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x36
 	.8byte	.LVL963
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30414,7 +30402,7 @@ __func__.7632:
 	.4byte	.LLST287
 	.uleb128 0x36
 	.8byte	.LVL1165
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30431,7 +30419,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1143
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x41a4
 	.uleb128 0x30
 	.uleb128 0x1
@@ -30471,7 +30459,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1152
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x41fc
 	.uleb128 0x30
 	.uleb128 0x1
@@ -30519,7 +30507,7 @@ __func__.7632:
 	.4byte	0x6d71
 	.uleb128 0x36
 	.8byte	.LVL1159
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30586,7 +30574,7 @@ __func__.7632:
 	.8byte	__func__.7027
 	.uleb128 0x34
 	.8byte	.LVL1683
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x42f7
 	.uleb128 0x30
 	.uleb128 0x1
@@ -30639,7 +30627,7 @@ __func__.7632:
 	.4byte	0x6d71
 	.uleb128 0x34
 	.8byte	.LVL1694
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x435e
 	.uleb128 0x30
 	.uleb128 0x1
@@ -30920,7 +30908,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x36
 	.8byte	.LVL1139
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30986,7 +30974,7 @@ __func__.7632:
 	.8byte	__func__.6981
 	.uleb128 0x34
 	.8byte	.LVL278
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x46a4
 	.uleb128 0x30
 	.uleb128 0x1
@@ -31559,7 +31547,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1399
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x4bcd
 	.uleb128 0x30
 	.uleb128 0x1
@@ -31582,7 +31570,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1400
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x4c00
 	.uleb128 0x30
 	.uleb128 0x1
@@ -31716,7 +31704,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1478
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x4d1c
 	.uleb128 0x30
 	.uleb128 0x1
@@ -31774,7 +31762,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1503
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x4d7f
 	.uleb128 0x30
 	.uleb128 0x1
@@ -31875,7 +31863,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL945
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x4e92
 	.uleb128 0x30
 	.uleb128 0x1
@@ -32306,7 +32294,7 @@ __func__.7632:
 	.byte	0x3
 	.8byte	__func__.6827
 	.uleb128 0x34
-	.8byte	.LVL2078
+	.8byte	.LVL2075
 	.4byte	0x259f
 	.4byte	0x525d
 	.uleb128 0x30
@@ -32316,7 +32304,7 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2079
+	.8byte	.LVL2076
 	.4byte	0x6c45
 	.4byte	0x5274
 	.uleb128 0x30
@@ -32326,8 +32314,8 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2081
-	.4byte	0xa949
+	.8byte	.LVL2078
+	.4byte	0xa94d
 	.4byte	0x52a7
 	.uleb128 0x30
 	.uleb128 0x1
@@ -32349,8 +32337,8 @@ __func__.7632:
 	.2byte	0x56c
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2082
-	.4byte	0xa949
+	.8byte	.LVL2079
+	.4byte	0xa94d
 	.4byte	0x52da
 	.uleb128 0x30
 	.uleb128 0x1
@@ -32372,7 +32360,7 @@ __func__.7632:
 	.2byte	0x56e
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2084
+	.8byte	.LVL2081
 	.4byte	0x2527
 	.4byte	0x52f8
 	.uleb128 0x30
@@ -32389,14 +32377,14 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2085
+	.8byte	.LVL2082
 	.4byte	0x2527
 	.uleb128 0x45
-	.8byte	.LVL2086
+	.8byte	.LVL2083
 	.4byte	0x2527
 	.uleb128 0x34
-	.8byte	.LVL2087
-	.4byte	0xa949
+	.8byte	.LVL2084
+	.4byte	0xa94d
 	.4byte	0x5345
 	.uleb128 0x30
 	.uleb128 0x1
@@ -32418,7 +32406,7 @@ __func__.7632:
 	.2byte	0x584
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2088
+	.8byte	.LVL2085
 	.4byte	0x460e
 	.4byte	0x5364
 	.uleb128 0x30
@@ -32429,7 +32417,7 @@ __func__.7632:
 	.8byte	.LANCHOR51
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2089
+	.8byte	.LVL2086
 	.4byte	0x460e
 	.4byte	0x5383
 	.uleb128 0x30
@@ -32440,7 +32428,7 @@ __func__.7632:
 	.8byte	.LANCHOR52
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2090
+	.8byte	.LVL2087
 	.4byte	0x460e
 	.4byte	0x53a2
 	.uleb128 0x30
@@ -32451,7 +32439,7 @@ __func__.7632:
 	.8byte	.LANCHOR53
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2091
+	.8byte	.LVL2088
 	.4byte	0x460e
 	.4byte	0x53c1
 	.uleb128 0x30
@@ -32462,7 +32450,7 @@ __func__.7632:
 	.8byte	.LANCHOR82
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL2093
+	.8byte	.LVL2090
 	.4byte	0x29a4
 	.uleb128 0x30
 	.uleb128 0x1
@@ -32710,7 +32698,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1015
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x561f
 	.uleb128 0x30
 	.uleb128 0x1
@@ -32734,7 +32722,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1026
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x564d
 	.uleb128 0x30
 	.uleb128 0x1
@@ -32768,7 +32756,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x36
 	.8byte	.LVL1039
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32929,7 +32917,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1675
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x57fe
 	.uleb128 0x30
 	.uleb128 0x1
@@ -32952,7 +32940,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1678
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x5823
 	.uleb128 0x30
 	.uleb128 0x1
@@ -33488,7 +33476,7 @@ __func__.7632:
 	.8byte	.L657
 	.uleb128 0x34
 	.8byte	.LVL922
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x5d0e
 	.uleb128 0x30
 	.uleb128 0x1
@@ -33615,7 +33603,7 @@ __func__.7632:
 	.8byte	__func__.6658
 	.uleb128 0x36
 	.8byte	.LVL237
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33738,7 +33726,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL874
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x5f87
 	.uleb128 0x30
 	.uleb128 0x1
@@ -33761,7 +33749,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL875
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x5fb3
 	.uleb128 0x30
 	.uleb128 0x1
@@ -33825,7 +33813,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL882
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x6015
 	.uleb128 0x30
 	.uleb128 0x1
@@ -33836,7 +33824,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x36
 	.8byte	.LVL883
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33910,7 +33898,7 @@ __func__.7632:
 	.8byte	__func__.6619
 	.uleb128 0x34
 	.8byte	.LVL852
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x610b
 	.uleb128 0x30
 	.uleb128 0x1
@@ -34121,7 +34109,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL905
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x62e7
 	.uleb128 0x30
 	.uleb128 0x1
@@ -34328,7 +34316,7 @@ __func__.7632:
 	.8byte	__func__.6562
 	.uleb128 0x34
 	.8byte	.LVL813
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x64e3
 	.uleb128 0x30
 	.uleb128 0x1
@@ -34383,7 +34371,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL822
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x6548
 	.uleb128 0x30
 	.uleb128 0x1
@@ -34443,7 +34431,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x36
 	.8byte	.LVL825
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34668,7 +34656,7 @@ __func__.7632:
 	.8byte	__func__.6521
 	.uleb128 0x36
 	.8byte	.LVL164
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35770,7 +35758,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1531
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x7258
 	.uleb128 0x30
 	.uleb128 0x1
@@ -35793,7 +35781,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x45
 	.8byte	.LVL1532
-	.4byte	0x8b8f
+	.4byte	0x8b93
 	.uleb128 0x34
 	.8byte	.LVL1540
 	.4byte	0x29a4
@@ -35968,7 +35956,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1250
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x7400
 	.uleb128 0x30
 	.uleb128 0x1
@@ -36046,7 +36034,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1255
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x7489
 	.uleb128 0x30
 	.uleb128 0x1
@@ -36057,7 +36045,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1256
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x74ae
 	.uleb128 0x30
 	.uleb128 0x1
@@ -36126,7 +36114,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x36
 	.8byte	.LVL803
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36253,7 +36241,7 @@ __func__.7632:
 	.4byte	.LLST15
 	.uleb128 0x36
 	.8byte	.LVL44
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36310,7 +36298,7 @@ __func__.7632:
 	.4byte	0x770c
 	.4byte	.LLST462
 	.uleb128 0x2f
-	.8byte	.LVL2077
+	.8byte	.LVL2074
 	.4byte	0x78b7
 	.uleb128 0x30
 	.uleb128 0x1
@@ -36373,7 +36361,7 @@ __func__.7632:
 	.4byte	.LLST444
 	.uleb128 0x2f
 	.8byte	.LVL1984
-	.4byte	0x7fd9
+	.4byte	0x7fdd
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36466,7 +36454,7 @@ __func__.7632:
 	.4byte	.LLST405
 	.uleb128 0x45
 	.8byte	.LVL1746
-	.4byte	0x7d55
+	.4byte	0x7d59
 	.uleb128 0x45
 	.8byte	.LVL1755
 	.4byte	0x5d63
@@ -36533,7 +36521,7 @@ __func__.7632:
 	.8byte	.LFE217-.LFB217
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7d55
+	.4byte	0x7d59
 	.uleb128 0x5d
 	.string	"LUN"
 	.byte	0x3
@@ -36650,7 +36638,7 @@ __func__.7632:
 	.byte	0x91
 	.sleb128 -32
 	.uleb128 0x34
-	.8byte	.LVL2060
+	.8byte	.LVL2061
 	.4byte	0x29a4
 	.4byte	0x7a24
 	.uleb128 0x30
@@ -36671,8 +36659,8 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2062
-	.4byte	0xa949
+	.8byte	.LVL2063
+	.4byte	0xa94d
 	.4byte	0x7a49
 	.uleb128 0x30
 	.uleb128 0x1
@@ -36688,8 +36676,8 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL2063
-	.4byte	0xa949
+	.8byte	.LVL2064
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36724,22 +36712,106 @@ __func__.7632:
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL2000
+	.4byte	0x7d59
+	.uleb128 0x34
+	.8byte	.LVL2002
+	.4byte	0x2d32
+	.4byte	0x7ace
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x8
+	.byte	0x8f
+	.sleb128 344
+	.byte	0x94
+	.byte	0x4
+	.byte	0x85
+	.sleb128 0
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2007
+	.4byte	0x6644
+	.4byte	0x7ae5
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL2008
+	.4byte	0x2f73
+	.uleb128 0x34
+	.8byte	.LVL2009
+	.4byte	0x2d32
+	.4byte	0x7b0e
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2010
+	.4byte	0x2d32
+	.4byte	0x7b2a
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2016
+	.4byte	0x2527
+	.4byte	0x7b48
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
 	.byte	0x89
 	.sleb128 0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
-	.byte	0x8a
+	.byte	0x84
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1999
-	.4byte	0x7d55
+	.8byte	.LVL2023
+	.4byte	0x7d59
 	.uleb128 0x34
-	.8byte	.LVL2001
-	.4byte	0xa949
-	.4byte	0x7ade
+	.8byte	.LVL2025
+	.4byte	0xa94d
+	.4byte	0x7b88
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36760,12 +36832,12 @@ __func__.7632:
 	.2byte	0x3f4
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2002
-	.4byte	0x7d55
+	.8byte	.LVL2026
+	.4byte	0x7d59
 	.uleb128 0x34
-	.8byte	.LVL2003
+	.8byte	.LVL2027
 	.4byte	0x3932
-	.4byte	0x7b0a
+	.4byte	0x7bb4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36774,9 +36846,9 @@ __func__.7632:
 	.8byte	.LANCHOR52
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2005
+	.8byte	.LVL2029
 	.4byte	0x3932
-	.4byte	0x7b22
+	.4byte	0x7bcc
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36785,9 +36857,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2007
+	.8byte	.LVL2031
 	.4byte	0x3932
-	.4byte	0x7b3a
+	.4byte	0x7be4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36796,9 +36868,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2010
-	.4byte	0xa949
-	.4byte	0x7b6d
+	.8byte	.LVL2034
+	.4byte	0xa94d
+	.4byte	0x7c17
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36819,93 +36891,54 @@ __func__.7632:
 	.2byte	0x415
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2017
-	.4byte	0x2d32
-	.4byte	0x7b90
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
+	.8byte	.LVL2037
+	.4byte	0x7d94
+	.4byte	0x7c3a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x8
-	.byte	0x8f
-	.sleb128 344
-	.byte	0x94
-	.byte	0x4
-	.byte	0x85
+	.uleb128 0x2
+	.byte	0x8b
 	.sleb128 0
-	.byte	0x1c
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2022
-	.4byte	0x6644
-	.4byte	0x7ba7
 	.uleb128 0x30
 	.uleb128 0x1
-	.byte	0x50
+	.byte	0x52
 	.uleb128 0x1
 	.byte	0x30
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL2023
-	.4byte	0x2f73
-	.uleb128 0x34
-	.8byte	.LVL2024
-	.4byte	0x2d32
-	.4byte	0x7bd0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
 	.uleb128 0x30
 	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2025
-	.4byte	0x2d32
-	.4byte	0x7bec
+	.8byte	.LVL2038
+	.4byte	0xa94d
+	.4byte	0x7c6d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2031
-	.4byte	0x2527
-	.4byte	0x7c0a
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8a
-	.sleb128 0
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR180
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x46e
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL2038
-	.4byte	0x7d55
 	.uleb128 0x34
-	.8byte	.LVL2040
+	.8byte	.LVL2041
 	.4byte	0x3932
-	.4byte	0x7c2f
+	.4byte	0x7c85
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36914,9 +36947,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2043
+	.8byte	.LVL2044
 	.4byte	0x5c36
-	.4byte	0x7c53
+	.4byte	0x7ca9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36936,9 +36969,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2044
+	.8byte	.LVL2045
 	.4byte	0x3804
-	.4byte	0x7c6b
+	.4byte	0x7cc1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36947,9 +36980,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2048
+	.8byte	.LVL2049
 	.4byte	0x259f
-	.4byte	0x7c88
+	.4byte	0x7cde
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36963,9 +36996,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2053
-	.4byte	0xa949
-	.4byte	0x7cbb
+	.8byte	.LVL2054
+	.4byte	0xa94d
+	.4byte	0x7d11
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36986,14 +37019,14 @@ __func__.7632:
 	.2byte	0x45f
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2061
+	.8byte	.LVL2062
 	.4byte	0x2527
-	.4byte	0x7cde
+	.4byte	0x7d34
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x8a
+	.byte	0x89
 	.sleb128 0
 	.uleb128 0x30
 	.uleb128 0x1
@@ -37007,9 +37040,9 @@ __func__.7632:
 	.byte	0x24
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2065
+	.8byte	.LVL2066
 	.4byte	0x259f
-	.4byte	0x7cf5
+	.4byte	0x7d4b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37017,52 +37050,8 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2066
+	.8byte	.LVL2067
 	.4byte	0x2527
-	.uleb128 0x34
-	.8byte	.LVL2069
-	.4byte	0x7d90
-	.4byte	0x7d25
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8b
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL2070
-	.4byte	0xa949
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR180
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x46e
-	.byte	0
 	.byte	0
 	.uleb128 0x49
 	.4byte	.LASF835
@@ -37073,10 +37062,10 @@ __func__.7632:
 	.8byte	.LFE216-.LFB216
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7d90
+	.4byte	0x7d94
 	.uleb128 0x36
 	.8byte	.LVL1734
-	.4byte	0x7d90
+	.4byte	0x7d94
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37097,7 +37086,7 @@ __func__.7632:
 	.8byte	.LFE215-.LFB215
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7fc4
+	.4byte	0x7fc8
 	.uleb128 0x5d
 	.string	"req"
 	.byte	0x3
@@ -37161,14 +37150,14 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x7fd4
+	.4byte	0x7fd8
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	__func__.6228
 	.uleb128 0x34
 	.8byte	.LVL1717
 	.4byte	0x27e7
-	.4byte	0x7e7b
+	.4byte	0x7e7f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37194,7 +37183,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1720
 	.4byte	0x3932
-	.4byte	0x7ea0
+	.4byte	0x7ea4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37208,7 +37197,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1722
 	.4byte	0x3804
-	.4byte	0x7ec5
+	.4byte	0x7ec9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37219,7 +37208,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1723
 	.4byte	0x27e7
-	.4byte	0x7ee7
+	.4byte	0x7eeb
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37239,8 +37228,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1724
-	.4byte	0xa949
-	.4byte	0x7f1a
+	.4byte	0xa94d
+	.4byte	0x7f1e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37263,7 +37252,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1725
 	.4byte	0x5c36
-	.4byte	0x7f38
+	.4byte	0x7f3c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37279,7 +37268,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1727
 	.4byte	0x6d71
-	.4byte	0x7f52
+	.4byte	0x7f56
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37291,8 +37280,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1729
-	.4byte	0xa949
-	.4byte	0x7f7c
+	.4byte	0xa94d
+	.4byte	0x7f80
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37314,7 +37303,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1730
 	.4byte	0x36c0
-	.4byte	0x7f94
+	.4byte	0x7f98
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37324,7 +37313,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x36
 	.8byte	.LVL1732
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37347,13 +37336,13 @@ __func__.7632:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x7fd4
+	.4byte	0x7fd8
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0xc
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x7fc4
+	.4byte	0x7fc8
 	.uleb128 0x49
 	.4byte	.LASF838
 	.byte	0x3
@@ -37363,7 +37352,7 @@ __func__.7632:
 	.8byte	.LFE214-.LFB214
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x81ff
+	.4byte	0x8203
 	.uleb128 0x5d
 	.string	"LUN"
 	.byte	0x3
@@ -37471,7 +37460,7 @@ __func__.7632:
 	.uleb128 0x63
 	.8byte	.LBB297
 	.8byte	.LBE297-.LBB297
-	.4byte	0x8148
+	.4byte	0x814c
 	.uleb128 0x55
 	.4byte	.LASF587
 	.byte	0x3
@@ -37488,7 +37477,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1935
 	.4byte	0x59d0
-	.4byte	0x816d
+	.4byte	0x8171
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37510,11 +37499,11 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x45
 	.8byte	.LVL1942
-	.4byte	0x7d55
+	.4byte	0x7d59
 	.uleb128 0x34
 	.8byte	.LVL1948
 	.4byte	0x2d32
-	.4byte	0x8196
+	.4byte	0x819a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37529,7 +37518,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1949
 	.4byte	0x5c36
-	.4byte	0x81ba
+	.4byte	0x81be
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37551,7 +37540,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1954
 	.4byte	0x29a4
-	.4byte	0x81d7
+	.4byte	0x81db
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37592,10 +37581,10 @@ __func__.7632:
 	.8byte	.LFE213-.LFB213
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x822f
+	.4byte	0x8233
 	.uleb128 0x45
 	.8byte	.LVL1739
-	.4byte	0x822f
+	.4byte	0x8233
 	.byte	0
 	.uleb128 0x49
 	.4byte	.LASF845
@@ -37606,17 +37595,17 @@ __func__.7632:
 	.8byte	.LFE212-.LFB212
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8290
+	.4byte	0x8294
 	.uleb128 0x45
 	.8byte	.LVL1735
-	.4byte	0x7d55
+	.4byte	0x7d59
 	.uleb128 0x45
 	.8byte	.LVL1736
 	.4byte	0x5d63
 	.uleb128 0x34
 	.8byte	.LVL1737
 	.4byte	0x5968
-	.4byte	0x8282
+	.4byte	0x8286
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37636,12 +37625,12 @@ __func__.7632:
 	.8byte	.LFE211-.LFB211
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x83a2
+	.4byte	0x83a6
 	.uleb128 0x2a
 	.4byte	.LASF847
 	.byte	0x3
 	.2byte	0x2e8
-	.4byte	0x83a2
+	.4byte	0x83a6
 	.uleb128 0xa
 	.byte	0x3
 	.8byte	g_nand_phy_info
@@ -37654,7 +37643,7 @@ __func__.7632:
 	.uleb128 0x63
 	.8byte	.LBB306
 	.8byte	.LBE306-.LBB306
-	.4byte	0x8315
+	.4byte	0x8319
 	.uleb128 0x54
 	.string	"i"
 	.byte	0x3
@@ -37662,7 +37651,7 @@ __func__.7632:
 	.4byte	0xdd4
 	.4byte	.LLST469
 	.uleb128 0x36
-	.8byte	.LVL2174
+	.8byte	.LVL2171
 	.4byte	0x2d32
 	.uleb128 0x30
 	.uleb128 0x1
@@ -37677,9 +37666,9 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2166
-	.4byte	0xa949
-	.4byte	0x8341
+	.8byte	.LVL2163
+	.4byte	0xa94d
+	.4byte	0x8345
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37694,9 +37683,9 @@ __func__.7632:
 	.8byte	.LC70
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2167
-	.4byte	0x8b1f
-	.4byte	0x8360
+	.8byte	.LVL2164
+	.4byte	0x8b23
+	.4byte	0x8364
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37705,19 +37694,19 @@ __func__.7632:
 	.8byte	.LANCHOR0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2168
-	.4byte	0x882b
+	.8byte	.LVL2165
+	.4byte	0x882f
 	.uleb128 0x45
-	.8byte	.LVL2169
-	.4byte	0x8754
+	.8byte	.LVL2166
+	.4byte	0x8758
 	.uleb128 0x45
-	.8byte	.LVL2170
+	.8byte	.LVL2167
 	.4byte	0x6bd9
 	.uleb128 0x45
-	.8byte	.LVL2171
+	.8byte	.LVL2168
 	.4byte	0x7127
 	.uleb128 0x45
-	.8byte	.LVL2172
+	.8byte	.LVL2169
 	.4byte	0x3f98
 	.byte	0
 	.uleb128 0x8
@@ -37732,7 +37721,7 @@ __func__.7632:
 	.8byte	.LFE210-.LFB210
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8542
+	.4byte	0x8546
 	.uleb128 0x55
 	.4byte	.LASF718
 	.byte	0x3
@@ -37761,28 +37750,28 @@ __func__.7632:
 	.4byte	.LASF852
 	.byte	0x3
 	.2byte	0x2bc
-	.8byte	.L1636
+	.8byte	.L1631
 	.uleb128 0x59
 	.4byte	.LASF853
 	.byte	0x3
 	.2byte	0x2cc
-	.8byte	.L1638
+	.8byte	.L1633
 	.uleb128 0x45
-	.8byte	.LVL2125
+	.8byte	.LVL2122
 	.4byte	0x6bd9
 	.uleb128 0x45
-	.8byte	.LVL2126
+	.8byte	.LVL2123
 	.4byte	0x7127
 	.uleb128 0x45
-	.8byte	.LVL2127
+	.8byte	.LVL2124
 	.4byte	0x6e59
 	.uleb128 0x45
-	.8byte	.LVL2135
+	.8byte	.LVL2132
 	.4byte	0x7342
 	.uleb128 0x34
-	.8byte	.LVL2136
+	.8byte	.LVL2133
 	.4byte	0x259f
-	.4byte	0x8473
+	.4byte	0x8477
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37790,9 +37779,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2138
+	.8byte	.LVL2135
 	.4byte	0x259f
-	.4byte	0x848b
+	.4byte	0x848f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37801,9 +37790,9 @@ __func__.7632:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2139
+	.8byte	.LVL2136
 	.4byte	0x460e
-	.4byte	0x84a3
+	.4byte	0x84a7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37812,9 +37801,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2145
-	.4byte	0x8542
-	.4byte	0x84ba
+	.8byte	.LVL2142
+	.4byte	0x8546
+	.4byte	0x84be
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37822,15 +37811,15 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2150
-	.4byte	0x8b8f
+	.8byte	.LVL2147
+	.4byte	0x8b93
 	.uleb128 0x45
-	.8byte	.LVL2151
+	.8byte	.LVL2148
 	.4byte	0x6bd9
 	.uleb128 0x34
-	.8byte	.LVL2154
-	.4byte	0x8542
-	.4byte	0x84eb
+	.8byte	.LVL2151
+	.4byte	0x8546
+	.4byte	0x84ef
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37838,9 +37827,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2157
-	.4byte	0x8542
-	.4byte	0x8502
+	.8byte	.LVL2154
+	.4byte	0x8546
+	.4byte	0x8506
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37848,9 +37837,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2161
+	.8byte	.LVL2158
 	.4byte	0x460e
-	.4byte	0x851a
+	.4byte	0x851e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37859,13 +37848,13 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2162
+	.8byte	.LVL2159
 	.4byte	0x6980
 	.uleb128 0x45
-	.8byte	.LVL2163
+	.8byte	.LVL2160
 	.4byte	0x5694
 	.uleb128 0x45
-	.8byte	.LVL2164
+	.8byte	.LVL2161
 	.4byte	0x3f98
 	.byte	0
 	.uleb128 0x49
@@ -37877,7 +37866,7 @@ __func__.7632:
 	.8byte	.LFE209-.LFB209
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x872a
+	.4byte	0x872e
 	.uleb128 0x53
 	.4byte	.LASF718
 	.byte	0x3
@@ -37946,7 +37935,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL694
 	.4byte	0x2721
-	.4byte	0x862b
+	.4byte	0x862f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37959,7 +37948,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL703
 	.4byte	0x27e7
-	.4byte	0x865b
+	.4byte	0x865f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37984,7 +37973,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL711
 	.4byte	0x6afa
-	.4byte	0x867f
+	.4byte	0x8683
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37994,7 +37983,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL712
 	.4byte	0x2721
-	.4byte	0x869d
+	.4byte	0x86a1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -38011,7 +38000,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL716
 	.4byte	0x6e0c
-	.4byte	0x86b5
+	.4byte	0x86b9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -38021,8 +38010,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL718
-	.4byte	0x872a
-	.4byte	0x86cd
+	.4byte	0x872e
+	.4byte	0x86d1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38033,7 +38022,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL719
 	.4byte	0x7560
-	.4byte	0x86e5
+	.4byte	0x86e9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38044,7 +38033,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL730
 	.4byte	0x6e0c
-	.4byte	0x86fd
+	.4byte	0x8701
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -38054,8 +38043,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL732
-	.4byte	0x872a
-	.4byte	0x8715
+	.4byte	0x872e
+	.4byte	0x8719
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38080,7 +38069,7 @@ __func__.7632:
 	.2byte	0x201
 	.4byte	0x5b
 	.byte	0x1
-	.4byte	0x8754
+	.4byte	0x8758
 	.uleb128 0x4b
 	.4byte	.LASF388
 	.byte	0x3
@@ -38101,11 +38090,11 @@ __func__.7632:
 	.8byte	.LFE207-.LFB207
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x882b
+	.4byte	0x882f
 	.uleb128 0x34
 	.8byte	.LVL1110
 	.4byte	0x259f
-	.4byte	0x878d
+	.4byte	0x8791
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -38115,7 +38104,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1111
 	.4byte	0x259f
-	.4byte	0x87a4
+	.4byte	0x87a8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -38125,7 +38114,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1112
 	.4byte	0x259f
-	.4byte	0x87bb
+	.4byte	0x87bf
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -38135,7 +38124,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1113
 	.4byte	0x259f
-	.4byte	0x87e5
+	.4byte	0x87e9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38157,7 +38146,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1114
 	.4byte	0x259f
-	.4byte	0x8810
+	.4byte	0x8814
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38192,7 +38181,7 @@ __func__.7632:
 	.8byte	.LFE206-.LFB206
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8b1f
+	.4byte	0x8b23
 	.uleb128 0x54
 	.string	"i"
 	.byte	0x3
@@ -38220,7 +38209,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL744
 	.4byte	0x2c2b
-	.4byte	0x88b0
+	.4byte	0x88b4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38231,7 +38220,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL745
 	.4byte	0x2c2b
-	.4byte	0x88c8
+	.4byte	0x88cc
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38242,7 +38231,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL746
 	.4byte	0x2c2b
-	.4byte	0x88e0
+	.4byte	0x88e4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38253,7 +38242,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL747
 	.4byte	0x2c2b
-	.4byte	0x88f8
+	.4byte	0x88fc
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38264,7 +38253,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL748
 	.4byte	0x2c2b
-	.4byte	0x8910
+	.4byte	0x8914
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38275,7 +38264,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL751
 	.4byte	0x2c2b
-	.4byte	0x8928
+	.4byte	0x892c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38286,7 +38275,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL752
 	.4byte	0x2c2b
-	.4byte	0x8940
+	.4byte	0x8944
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38297,7 +38286,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL753
 	.4byte	0x2c2b
-	.4byte	0x8958
+	.4byte	0x895c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38311,7 +38300,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL755
 	.4byte	0x2c2b
-	.4byte	0x897d
+	.4byte	0x8981
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38322,7 +38311,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL756
 	.4byte	0x2c2b
-	.4byte	0x8995
+	.4byte	0x8999
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38336,7 +38325,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL760
 	.4byte	0x2c2b
-	.4byte	0x89ba
+	.4byte	0x89be
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38347,7 +38336,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL761
 	.4byte	0x2c2b
-	.4byte	0x89d4
+	.4byte	0x89d8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38369,7 +38358,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL767
 	.4byte	0x2c2b
-	.4byte	0x8a13
+	.4byte	0x8a17
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38383,7 +38372,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL771
 	.4byte	0x2c2b
-	.4byte	0x8a38
+	.4byte	0x8a3c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38394,7 +38383,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL772
 	.4byte	0x2c2b
-	.4byte	0x8a50
+	.4byte	0x8a54
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38420,7 +38409,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL778
 	.4byte	0x259f
-	.4byte	0x8aa8
+	.4byte	0x8aac
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -38447,7 +38436,7 @@ __func__.7632:
 	.4byte	0x2c2b
 	.uleb128 0x36
 	.8byte	.LVL798
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38471,12 +38460,12 @@ __func__.7632:
 	.8byte	.LFE205-.LFB205
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8b8f
+	.4byte	0x8b93
 	.uleb128 0x2e
 	.4byte	.LASF847
 	.byte	0x3
 	.byte	0xb6
-	.4byte	0x83a2
+	.4byte	0x83a6
 	.4byte	.LLST8
 	.uleb128 0x33
 	.string	"i"
@@ -38486,11 +38475,11 @@ __func__.7632:
 	.4byte	.LLST9
 	.uleb128 0x45
 	.8byte	.LVL30
-	.4byte	0x8bd8
+	.4byte	0x8bdc
 	.uleb128 0x34
 	.8byte	.LVL31
-	.4byte	0x8bd8
-	.4byte	0x8b81
+	.4byte	0x8bdc
+	.4byte	0x8b85
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38500,7 +38489,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x45
 	.8byte	.LVL33
-	.4byte	0x8b8f
+	.4byte	0x8b93
 	.byte	0
 	.uleb128 0x2d
 	.4byte	.LASF867
@@ -38511,7 +38500,7 @@ __func__.7632:
 	.8byte	.LFE204-.LFB204
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8bc0
+	.4byte	0x8bc4
 	.uleb128 0x2e
 	.4byte	.LASF868
 	.byte	0x3
@@ -38524,7 +38513,7 @@ __func__.7632:
 	.byte	0x3
 	.byte	0x9e
 	.byte	0x1
-	.4byte	0x8bd8
+	.4byte	0x8bdc
 	.uleb128 0x38
 	.4byte	.LASF870
 	.byte	0x3
@@ -38540,7 +38529,7 @@ __func__.7632:
 	.8byte	.LFE202-.LFB202
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8c25
+	.4byte	0x8c29
 	.uleb128 0x31
 	.string	"num"
 	.byte	0x3
@@ -38569,7 +38558,7 @@ __func__.7632:
 	.8byte	.LFE201-.LFB201
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8cab
+	.4byte	0x8caf
 	.uleb128 0x2e
 	.4byte	.LASF299
 	.byte	0x3
@@ -38584,8 +38573,8 @@ __func__.7632:
 	.4byte	.LLST113
 	.uleb128 0x34
 	.8byte	.LVL470
-	.4byte	0xa96b
-	.4byte	0x8c96
+	.4byte	0xa96f
+	.4byte	0x8c9a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38607,7 +38596,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x36
 	.8byte	.LVL472
-	.4byte	0x8cab
+	.4byte	0x8caf
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38625,7 +38614,7 @@ __func__.7632:
 	.8byte	.LFE200-.LFB200
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9739
+	.4byte	0x973d
 	.uleb128 0x2e
 	.4byte	.LASF299
 	.byte	0x3
@@ -38647,7 +38636,7 @@ __func__.7632:
 	.uleb128 0x63
 	.8byte	.LBB205
 	.8byte	.LBE205-.LBB205
-	.4byte	0x8d53
+	.4byte	0x8d57
 	.uleb128 0x32
 	.4byte	.LASF587
 	.byte	0x3
@@ -38657,7 +38646,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL455
 	.4byte	0x6644
-	.4byte	0x8d32
+	.4byte	0x8d36
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38666,7 +38655,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x36
 	.8byte	.LVL459
-	.4byte	0xa96b
+	.4byte	0xa96f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38690,7 +38679,7 @@ __func__.7632:
 	.uleb128 0x63
 	.8byte	.LBB206
 	.8byte	.LBE206-.LBB206
-	.4byte	0x8d98
+	.4byte	0x8d9c
 	.uleb128 0x32
 	.4byte	.LASF587
 	.byte	0x3
@@ -38699,7 +38688,7 @@ __func__.7632:
 	.4byte	.LLST111
 	.uleb128 0x36
 	.8byte	.LVL466
-	.4byte	0xa96b
+	.4byte	0xa96f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38722,8 +38711,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL318
-	.4byte	0xa96b
-	.4byte	0x8dbd
+	.4byte	0xa96f
+	.4byte	0x8dc1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38739,8 +38728,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL320
-	.4byte	0xa96b
-	.4byte	0x8de2
+	.4byte	0xa96f
+	.4byte	0x8de6
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38756,8 +38745,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL322
-	.4byte	0xa96b
-	.4byte	0x8e07
+	.4byte	0xa96f
+	.4byte	0x8e0b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38773,8 +38762,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL324
-	.4byte	0xa96b
-	.4byte	0x8e2c
+	.4byte	0xa96f
+	.4byte	0x8e30
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38790,8 +38779,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL326
-	.4byte	0xa96b
-	.4byte	0x8e51
+	.4byte	0xa96f
+	.4byte	0x8e55
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38807,8 +38796,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL328
-	.4byte	0xa96b
-	.4byte	0x8e76
+	.4byte	0xa96f
+	.4byte	0x8e7a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38824,8 +38813,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL330
-	.4byte	0xa96b
-	.4byte	0x8e9b
+	.4byte	0xa96f
+	.4byte	0x8e9f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38841,8 +38830,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL332
-	.4byte	0xa96b
-	.4byte	0x8ec0
+	.4byte	0xa96f
+	.4byte	0x8ec4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38858,8 +38847,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL334
-	.4byte	0xa96b
-	.4byte	0x8ee5
+	.4byte	0xa96f
+	.4byte	0x8ee9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38875,8 +38864,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL336
-	.4byte	0xa96b
-	.4byte	0x8f0a
+	.4byte	0xa96f
+	.4byte	0x8f0e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38892,8 +38881,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL338
-	.4byte	0xa96b
-	.4byte	0x8f2f
+	.4byte	0xa96f
+	.4byte	0x8f33
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38909,8 +38898,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL340
-	.4byte	0xa96b
-	.4byte	0x8f54
+	.4byte	0xa96f
+	.4byte	0x8f58
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38926,8 +38915,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL342
-	.4byte	0xa96b
-	.4byte	0x8f79
+	.4byte	0xa96f
+	.4byte	0x8f7d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38943,8 +38932,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL344
-	.4byte	0xa96b
-	.4byte	0x8f9e
+	.4byte	0xa96f
+	.4byte	0x8fa2
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38960,8 +38949,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL346
-	.4byte	0xa96b
-	.4byte	0x8fc3
+	.4byte	0xa96f
+	.4byte	0x8fc7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38977,8 +38966,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL348
-	.4byte	0xa96b
-	.4byte	0x8fe8
+	.4byte	0xa96f
+	.4byte	0x8fec
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38994,8 +38983,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL350
-	.4byte	0xa96b
-	.4byte	0x900d
+	.4byte	0xa96f
+	.4byte	0x9011
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39011,8 +39000,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL352
-	.4byte	0xa96b
-	.4byte	0x9032
+	.4byte	0xa96f
+	.4byte	0x9036
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39028,8 +39017,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL354
-	.4byte	0xa96b
-	.4byte	0x9057
+	.4byte	0xa96f
+	.4byte	0x905b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39045,8 +39034,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL356
-	.4byte	0xa96b
-	.4byte	0x907c
+	.4byte	0xa96f
+	.4byte	0x9080
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39062,8 +39051,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL358
-	.4byte	0xa96b
-	.4byte	0x90a1
+	.4byte	0xa96f
+	.4byte	0x90a5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39079,8 +39068,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL360
-	.4byte	0xa96b
-	.4byte	0x90c6
+	.4byte	0xa96f
+	.4byte	0x90ca
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39096,8 +39085,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL362
-	.4byte	0xa96b
-	.4byte	0x90eb
+	.4byte	0xa96f
+	.4byte	0x90ef
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39113,8 +39102,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL364
-	.4byte	0xa96b
-	.4byte	0x9110
+	.4byte	0xa96f
+	.4byte	0x9114
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39130,8 +39119,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL366
-	.4byte	0xa96b
-	.4byte	0x9135
+	.4byte	0xa96f
+	.4byte	0x9139
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39147,8 +39136,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL368
-	.4byte	0xa96b
-	.4byte	0x915a
+	.4byte	0xa96f
+	.4byte	0x915e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39164,8 +39153,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL370
-	.4byte	0xa96b
-	.4byte	0x917f
+	.4byte	0xa96f
+	.4byte	0x9183
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39181,8 +39170,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL372
-	.4byte	0xa96b
-	.4byte	0x91a4
+	.4byte	0xa96f
+	.4byte	0x91a8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39198,8 +39187,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL374
-	.4byte	0xa96b
-	.4byte	0x91c9
+	.4byte	0xa96f
+	.4byte	0x91cd
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39215,8 +39204,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL376
-	.4byte	0xa96b
-	.4byte	0x91ee
+	.4byte	0xa96f
+	.4byte	0x91f2
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39232,8 +39221,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL378
-	.4byte	0xa96b
-	.4byte	0x9213
+	.4byte	0xa96f
+	.4byte	0x9217
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39249,8 +39238,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL380
-	.4byte	0xa96b
-	.4byte	0x9238
+	.4byte	0xa96f
+	.4byte	0x923c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39266,8 +39255,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL382
-	.4byte	0xa96b
-	.4byte	0x925d
+	.4byte	0xa96f
+	.4byte	0x9261
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39283,8 +39272,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL384
-	.4byte	0xa96b
-	.4byte	0x9282
+	.4byte	0xa96f
+	.4byte	0x9286
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39300,8 +39289,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL386
-	.4byte	0xa96b
-	.4byte	0x92a7
+	.4byte	0xa96f
+	.4byte	0x92ab
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39317,8 +39306,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL388
-	.4byte	0xa96b
-	.4byte	0x92cc
+	.4byte	0xa96f
+	.4byte	0x92d0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39334,8 +39323,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL390
-	.4byte	0xa96b
-	.4byte	0x92f1
+	.4byte	0xa96f
+	.4byte	0x92f5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39351,8 +39340,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL392
-	.4byte	0xa96b
-	.4byte	0x9316
+	.4byte	0xa96f
+	.4byte	0x931a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39368,8 +39357,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL394
-	.4byte	0xa96b
-	.4byte	0x933b
+	.4byte	0xa96f
+	.4byte	0x933f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39385,8 +39374,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL396
-	.4byte	0xa96b
-	.4byte	0x9360
+	.4byte	0xa96f
+	.4byte	0x9364
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39402,8 +39391,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL398
-	.4byte	0xa96b
-	.4byte	0x9385
+	.4byte	0xa96f
+	.4byte	0x9389
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39419,8 +39408,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL400
-	.4byte	0xa96b
-	.4byte	0x93aa
+	.4byte	0xa96f
+	.4byte	0x93ae
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39436,8 +39425,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL402
-	.4byte	0xa96b
-	.4byte	0x93cf
+	.4byte	0xa96f
+	.4byte	0x93d3
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39453,8 +39442,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL404
-	.4byte	0xa96b
-	.4byte	0x93f4
+	.4byte	0xa96f
+	.4byte	0x93f8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39470,8 +39459,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL406
-	.4byte	0xa96b
-	.4byte	0x9419
+	.4byte	0xa96f
+	.4byte	0x941d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39487,8 +39476,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL408
-	.4byte	0xa96b
-	.4byte	0x943e
+	.4byte	0xa96f
+	.4byte	0x9442
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39504,8 +39493,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL410
-	.4byte	0xa96b
-	.4byte	0x9463
+	.4byte	0xa96f
+	.4byte	0x9467
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39521,8 +39510,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL412
-	.4byte	0xa96b
-	.4byte	0x9488
+	.4byte	0xa96f
+	.4byte	0x948c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39538,8 +39527,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL414
-	.4byte	0xa96b
-	.4byte	0x94ad
+	.4byte	0xa96f
+	.4byte	0x94b1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39555,8 +39544,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL416
-	.4byte	0xa96b
-	.4byte	0x94d2
+	.4byte	0xa96f
+	.4byte	0x94d6
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39572,8 +39561,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL418
-	.4byte	0xa96b
-	.4byte	0x94f7
+	.4byte	0xa96f
+	.4byte	0x94fb
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39589,8 +39578,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL420
-	.4byte	0xa96b
-	.4byte	0x951c
+	.4byte	0xa96f
+	.4byte	0x9520
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39606,8 +39595,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL422
-	.4byte	0xa96b
-	.4byte	0x9541
+	.4byte	0xa96f
+	.4byte	0x9545
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39623,8 +39612,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL424
-	.4byte	0xa96b
-	.4byte	0x9566
+	.4byte	0xa96f
+	.4byte	0x956a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39640,8 +39629,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL426
-	.4byte	0xa96b
-	.4byte	0x958b
+	.4byte	0xa96f
+	.4byte	0x958f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39657,8 +39646,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL428
-	.4byte	0xa96b
-	.4byte	0x95b0
+	.4byte	0xa96f
+	.4byte	0x95b4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39674,8 +39663,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL430
-	.4byte	0xa96b
-	.4byte	0x95d5
+	.4byte	0xa96f
+	.4byte	0x95d9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39691,8 +39680,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL432
-	.4byte	0xa96b
-	.4byte	0x95fa
+	.4byte	0xa96f
+	.4byte	0x95fe
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39708,8 +39697,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL434
-	.4byte	0xa96b
-	.4byte	0x961f
+	.4byte	0xa96f
+	.4byte	0x9623
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39725,8 +39714,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL436
-	.4byte	0xa96b
-	.4byte	0x9644
+	.4byte	0xa96f
+	.4byte	0x9648
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39742,8 +39731,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL438
-	.4byte	0xa96b
-	.4byte	0x9669
+	.4byte	0xa96f
+	.4byte	0x966d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39759,8 +39748,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL440
-	.4byte	0xa96b
-	.4byte	0x968e
+	.4byte	0xa96f
+	.4byte	0x9692
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39776,8 +39765,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL442
-	.4byte	0xa96b
-	.4byte	0x96b3
+	.4byte	0xa96f
+	.4byte	0x96b7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39796,8 +39785,8 @@ __func__.7632:
 	.4byte	0x3edd
 	.uleb128 0x34
 	.8byte	.LVL445
-	.4byte	0xa96b
-	.4byte	0x96e5
+	.4byte	0xa96f
+	.4byte	0x96e9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39816,8 +39805,8 @@ __func__.7632:
 	.4byte	0x3e7c
 	.uleb128 0x34
 	.8byte	.LVL448
-	.4byte	0xa96b
-	.4byte	0x9717
+	.4byte	0xa96f
+	.4byte	0x971b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39833,7 +39822,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x36
 	.8byte	.LVL453
-	.4byte	0xa96b
+	.4byte	0xa96f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39854,7 +39843,7 @@ __func__.7632:
 	.8byte	.LFE349-.LFB349
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x979b
+	.4byte	0x979f
 	.uleb128 0x6e
 	.4byte	0x2ab8
 	.uleb128 0x1
@@ -39893,7 +39882,7 @@ __func__.7632:
 	.8byte	.LFE356-.LFB356
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x97cc
+	.4byte	0x97d0
 	.uleb128 0x47
 	.4byte	0x5420
 	.4byte	.LLST3
@@ -39905,37 +39894,37 @@ __func__.7632:
 	.byte	0x9f
 	.byte	0
 	.uleb128 0x6d
-	.4byte	0x8bc0
+	.4byte	0x8bc4
 	.8byte	.LFB203
 	.8byte	.LFE203-.LFB203
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x97ef
+	.4byte	0x97f3
 	.uleb128 0x6e
-	.4byte	0x8bcc
+	.4byte	0x8bd0
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0
 	.uleb128 0x6d
-	.4byte	0x872a
+	.4byte	0x872e
 	.8byte	.LFB208
 	.8byte	.LFE208-.LFB208
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9833
+	.4byte	0x9837
 	.uleb128 0x47
-	.4byte	0x873b
+	.4byte	0x873f
 	.4byte	.LLST10
 	.uleb128 0x71
-	.4byte	0x8747
+	.4byte	0x874b
 	.uleb128 0x73
 	.4byte	.Ldebug_ranges0+0
 	.uleb128 0x6f
-	.4byte	0x873b
+	.4byte	0x873f
 	.uleb128 0x73
 	.4byte	.Ldebug_ranges0+0
 	.uleb128 0x70
-	.4byte	0x9813
+	.4byte	0x9817
 	.4byte	.LLST11
 	.byte	0
 	.byte	0
@@ -39964,7 +39953,7 @@ __func__.7632:
 	.8byte	.LFE245-.LFB245
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x991b
+	.4byte	0x991f
 	.uleb128 0x47
 	.4byte	0x6942
 	.4byte	.LLST49
@@ -39973,7 +39962,7 @@ __func__.7632:
 	.uleb128 0x63
 	.8byte	.LBB179
 	.8byte	.LBE179-.LBB179
-	.4byte	0x9905
+	.4byte	0x9909
 	.uleb128 0x47
 	.4byte	0x6942
 	.4byte	.LLST50
@@ -39981,10 +39970,10 @@ __func__.7632:
 	.8byte	.LBB180
 	.8byte	.LBE180-.LBB180
 	.uleb128 0x71
-	.4byte	0x989c
+	.4byte	0x98a0
 	.uleb128 0x2f
 	.8byte	.LVL139
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40024,7 +40013,7 @@ __func__.7632:
 	.8byte	.LFE244-.LFB244
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x99be
+	.4byte	0x99c2
 	.uleb128 0x47
 	.4byte	0x6967
 	.4byte	.LLST56
@@ -40033,7 +40022,7 @@ __func__.7632:
 	.uleb128 0x63
 	.8byte	.LBB183
 	.8byte	.LBE183-.LBB183
-	.4byte	0x99a8
+	.4byte	0x99ac
 	.uleb128 0x47
 	.4byte	0x6967
 	.4byte	.LLST57
@@ -40041,10 +40030,10 @@ __func__.7632:
 	.8byte	.LBB184
 	.8byte	.LBE184-.LBB184
 	.uleb128 0x71
-	.4byte	0x993f
+	.4byte	0x9943
 	.uleb128 0x2f
 	.8byte	.LVL159
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40084,7 +40073,7 @@ __func__.7632:
 	.8byte	.LFE252-.LFB252
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9b1b
+	.4byte	0x9b1f
 	.uleb128 0x47
 	.4byte	0x65d6
 	.4byte	.LLST70
@@ -40114,32 +40103,32 @@ __func__.7632:
 	.8byte	.LBB188
 	.8byte	.LBE188-.LBB188
 	.uleb128 0x70
-	.4byte	0x99e2
+	.4byte	0x99e6
 	.4byte	.LLST72
 	.uleb128 0x70
-	.4byte	0x99e7
+	.4byte	0x99eb
 	.4byte	.LLST73
 	.uleb128 0x70
-	.4byte	0x99ec
+	.4byte	0x99f0
 	.4byte	.LLST74
 	.uleb128 0x70
-	.4byte	0x99f1
+	.4byte	0x99f5
 	.4byte	.LLST75
 	.uleb128 0x70
-	.4byte	0x99f6
+	.4byte	0x99fa
 	.4byte	.LLST76
 	.uleb128 0x70
-	.4byte	0x99fb
+	.4byte	0x99ff
 	.4byte	.LLST77
 	.uleb128 0x70
-	.4byte	0x9a00
+	.4byte	0x9a04
 	.4byte	.LLST78
 	.uleb128 0x71
-	.4byte	0x9a05
+	.4byte	0x9a09
 	.uleb128 0x34
 	.8byte	.LVL205
-	.4byte	0xa949
-	.4byte	0x9aac
+	.4byte	0xa94d
+	.4byte	0x9ab0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40162,7 +40151,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL213
 	.4byte	0x6761
-	.4byte	0x9ad1
+	.4byte	0x9ad5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40178,8 +40167,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL214
-	.4byte	0xa949
-	.4byte	0x9b04
+	.4byte	0xa94d
+	.4byte	0x9b08
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40218,7 +40207,7 @@ __func__.7632:
 	.8byte	.LFE255-.LFB255
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9bd3
+	.4byte	0x9bd7
 	.uleb128 0x47
 	.4byte	0x6313
 	.4byte	.LLST79
@@ -40233,7 +40222,7 @@ __func__.7632:
 	.uleb128 0x63
 	.8byte	.LBB191
 	.8byte	.LBE191-.LBB191
-	.4byte	0x9bc5
+	.4byte	0x9bc9
 	.uleb128 0x47
 	.4byte	0x6313
 	.4byte	.LLST82
@@ -40241,14 +40230,14 @@ __func__.7632:
 	.8byte	.LBB192
 	.8byte	.LBE192-.LBB192
 	.uleb128 0x71
-	.4byte	0x9b3f
+	.4byte	0x9b43
 	.uleb128 0x71
-	.4byte	0x9b48
+	.4byte	0x9b4c
 	.uleb128 0x71
-	.4byte	0x9b51
+	.4byte	0x9b55
 	.uleb128 0x36
 	.8byte	.LVL221
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40280,7 +40269,7 @@ __func__.7632:
 	.8byte	.LFE266-.LFB266
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9c19
+	.4byte	0x9c1d
 	.uleb128 0x47
 	.4byte	0x5951
 	.4byte	.LLST86
@@ -40299,7 +40288,7 @@ __func__.7632:
 	.uleb128 0x73
 	.4byte	.Ldebug_ranges0+0x60
 	.uleb128 0x71
-	.4byte	0x9bf7
+	.4byte	0x9bfb
 	.byte	0
 	.byte	0
 	.byte	0
@@ -40309,7 +40298,7 @@ __func__.7632:
 	.8byte	.LFE272-.LFB272
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9c65
+	.4byte	0x9c69
 	.uleb128 0x47
 	.4byte	0x5420
 	.4byte	.LLST87
@@ -40318,7 +40307,7 @@ __func__.7632:
 	.4byte	.LLST88
 	.uleb128 0x2f
 	.8byte	.LVL257
-	.4byte	0x979b
+	.4byte	0x979f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40340,7 +40329,7 @@ __func__.7632:
 	.8byte	.LFE282-.LFB282
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9cc3
+	.4byte	0x9cc7
 	.uleb128 0x6e
 	.4byte	0x4777
 	.uleb128 0x1
@@ -40357,7 +40346,7 @@ __func__.7632:
 	.8byte	.LBB204
 	.8byte	.LBE204-.LBB204
 	.uleb128 0x70
-	.4byte	0x9c87
+	.4byte	0x9c8b
 	.4byte	.LLST94
 	.byte	0
 	.byte	0
@@ -40368,7 +40357,7 @@ __func__.7632:
 	.8byte	.LFE297-.LFB297
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9d0c
+	.4byte	0x9d10
 	.uleb128 0x47
 	.4byte	0x3da3
 	.4byte	.LLST121
@@ -40396,7 +40385,7 @@ __func__.7632:
 	.8byte	.LFE316-.LFB316
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9d42
+	.4byte	0x9d46
 	.uleb128 0x45
 	.8byte	.LVL576
 	.4byte	0x6d71
@@ -40410,7 +40399,7 @@ __func__.7632:
 	.8byte	.LFE318-.LFB318
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9e3c
+	.4byte	0x9e40
 	.uleb128 0x75
 	.4byte	0x2e2b
 	.byte	0
@@ -40422,26 +40411,26 @@ __func__.7632:
 	.4byte	0x2e4d
 	.uleb128 0x40
 	.4byte	.Ldebug_ranges0+0x130
-	.4byte	0x9e11
+	.4byte	0x9e15
 	.uleb128 0x71
-	.4byte	0x9d5d
+	.4byte	0x9d61
 	.uleb128 0x70
-	.4byte	0x9d63
+	.4byte	0x9d67
 	.4byte	.LLST253
 	.uleb128 0x72
-	.4byte	0x9d68
+	.4byte	0x9d6c
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -100
 	.uleb128 0x72
-	.4byte	0x9d6d
+	.4byte	0x9d71
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -64
 	.uleb128 0x63
 	.8byte	.LBB234
 	.8byte	.LBE234-.LBB234
-	.4byte	0x9df6
+	.4byte	0x9dfa
 	.uleb128 0x72
 	.4byte	0x2e5e
 	.uleb128 0x3
@@ -40450,7 +40439,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL968
 	.4byte	0x29a4
-	.4byte	0x9ddb
+	.4byte	0x9ddf
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40516,7 +40505,7 @@ __func__.7632:
 	.8byte	.LFE344-.LFB344
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9f70
+	.4byte	0x9f74
 	.uleb128 0x47
 	.4byte	0x26dd
 	.4byte	.LLST299
@@ -40537,14 +40526,14 @@ __func__.7632:
 	.8byte	.LBB247
 	.8byte	.LBE247-.LBB247
 	.uleb128 0x71
-	.4byte	0x9e60
+	.4byte	0x9e64
 	.uleb128 0x72
-	.4byte	0x9e66
+	.4byte	0x9e6a
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -64
 	.uleb128 0x72
-	.4byte	0x9e6b
+	.4byte	0x9e6f
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -96
@@ -40554,7 +40543,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1220
 	.4byte	0x259f
-	.4byte	0x9ee3
+	.4byte	0x9ee7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40577,7 +40566,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1222
 	.4byte	0x259f
-	.4byte	0x9f06
+	.4byte	0x9f0a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40599,7 +40588,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1223
 	.4byte	0x2721
-	.4byte	0x9f28
+	.4byte	0x9f2c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40620,7 +40609,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1224
 	.4byte	0x27e7
-	.4byte	0x9f4f
+	.4byte	0x9f53
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40672,7 +40661,7 @@ __func__.7632:
 	.8byte	.LFE317-.LFB317
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0xa049
+	.4byte	0xa04d
 	.uleb128 0x47
 	.4byte	0x2e8b
 	.4byte	.LLST320
@@ -40691,17 +40680,17 @@ __func__.7632:
 	.uleb128 0x73
 	.4byte	.Ldebug_ranges0+0x1b0
 	.uleb128 0x70
-	.4byte	0x9f94
+	.4byte	0x9f98
 	.4byte	.LLST321
 	.uleb128 0x72
-	.4byte	0x9f99
+	.4byte	0x9f9d
 	.uleb128 0x1
 	.byte	0x64
 	.uleb128 0x70
-	.4byte	0x9f9e
+	.4byte	0x9fa2
 	.4byte	.LLST322
 	.uleb128 0x72
-	.4byte	0x9fa3
+	.4byte	0x9fa7
 	.uleb128 0x1
 	.byte	0x6a
 	.uleb128 0x45
@@ -40710,7 +40699,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1316
 	.4byte	0x6e0c
-	.4byte	0x9ffc
+	.4byte	0xa000
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -40720,8 +40709,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1320
-	.4byte	0xa949
-	.4byte	0xa021
+	.4byte	0xa94d
+	.4byte	0xa025
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40738,7 +40727,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1321
 	.4byte	0x75ef
-	.4byte	0xa039
+	.4byte	0xa03d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40758,7 +40747,7 @@ __func__.7632:
 	.8byte	.LFE301-.LFB301
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0xa174
+	.4byte	0xa178
 	.uleb128 0x47
 	.4byte	0x37d5
 	.4byte	.LLST323
@@ -40767,7 +40756,7 @@ __func__.7632:
 	.uleb128 0x63
 	.8byte	.LBB260
 	.8byte	.LBE260-.LBB260
-	.4byte	0xa15f
+	.4byte	0xa163
 	.uleb128 0x47
 	.4byte	0x37d5
 	.4byte	.LLST324
@@ -40775,11 +40764,11 @@ __func__.7632:
 	.8byte	.LBB261
 	.8byte	.LBE261-.LBB261
 	.uleb128 0x71
-	.4byte	0xa06d
+	.4byte	0xa071
 	.uleb128 0x34
 	.8byte	.LVL1331
 	.4byte	0x6761
-	.4byte	0xa0cb
+	.4byte	0xa0cf
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40795,8 +40784,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1332
-	.4byte	0xa949
-	.4byte	0xa0fe
+	.4byte	0xa94d
+	.4byte	0xa102
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40819,7 +40808,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1333
 	.4byte	0x3d92
-	.4byte	0xa116
+	.4byte	0xa11a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40830,7 +40819,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1334
 	.4byte	0x2e7a
-	.4byte	0xa12e
+	.4byte	0xa132
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40840,7 +40829,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x36
 	.8byte	.LVL1335
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40879,7 +40868,7 @@ __func__.7632:
 	.8byte	.LFE268-.LFB268
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0xa26d
+	.4byte	0xa271
 	.uleb128 0x73
 	.4byte	.Ldebug_ranges0+0x1f0
 	.uleb128 0x70
@@ -40904,7 +40893,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1351
 	.4byte	0x5c36
-	.4byte	0xa1e3
+	.4byte	0xa1e7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40926,7 +40915,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1353
 	.4byte	0x29a4
-	.4byte	0xa206
+	.4byte	0xa20a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40947,7 +40936,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1357
 	.4byte	0x259f
-	.4byte	0xa21e
+	.4byte	0xa222
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -40958,7 +40947,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1359
 	.4byte	0x3804
-	.4byte	0xa236
+	.4byte	0xa23a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40969,7 +40958,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1360
 	.4byte	0x27e7
-	.4byte	0xa25e
+	.4byte	0xa262
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41003,7 +40992,7 @@ __func__.7632:
 	.8byte	.LFE286-.LFB286
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0xa2ae
+	.4byte	0xa2b2
 	.uleb128 0x2f
 	.8byte	.LVL1621
 	.4byte	0x5af8
@@ -41031,11 +41020,11 @@ __func__.7632:
 	.8byte	.LFE271-.LFB271
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0xa321
+	.4byte	0xa325
 	.uleb128 0x34
 	.8byte	.LVL1658
 	.4byte	0x59d0
-	.4byte	0xa2e1
+	.4byte	0xa2e5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41045,8 +41034,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1659
-	.4byte	0xa949
-	.4byte	0xa30d
+	.4byte	0xa94d
+	.4byte	0xa311
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41076,11 +41065,11 @@ __func__.7632:
 	.8byte	.LFE311-.LFB311
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0xa387
+	.4byte	0xa38b
 	.uleb128 0x34
 	.8byte	.LVL1801
 	.4byte	0x3148
-	.4byte	0xa354
+	.4byte	0xa358
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41091,7 +41080,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1802
 	.4byte	0x588f
-	.4byte	0xa373
+	.4byte	0xa377
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41115,7 +41104,7 @@ __func__.7632:
 	.8byte	.LFE319-.LFB319
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0xa749
+	.4byte	0xa74d
 	.uleb128 0x47
 	.4byte	0x2d43
 	.4byte	.LLST413
@@ -41148,7 +41137,7 @@ __func__.7632:
 	.4byte	0x2de3
 	.uleb128 0x40
 	.4byte	.Ldebug_ranges0+0x2a0
-	.4byte	0xa735
+	.4byte	0xa739
 	.uleb128 0x47
 	.4byte	0x2d4f
 	.4byte	.LLST415
@@ -41158,44 +41147,44 @@ __func__.7632:
 	.uleb128 0x73
 	.4byte	.Ldebug_ranges0+0x2a0
 	.uleb128 0x71
-	.4byte	0xa3b4
+	.4byte	0xa3b8
 	.uleb128 0x70
-	.4byte	0xa3ba
+	.4byte	0xa3be
 	.4byte	.LLST417
 	.uleb128 0x72
-	.4byte	0xa3bf
+	.4byte	0xa3c3
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -4
 	.uleb128 0x71
-	.4byte	0xa3c4
+	.4byte	0xa3c8
 	.uleb128 0x70
-	.4byte	0xa3ca
+	.4byte	0xa3ce
 	.4byte	.LLST418
 	.uleb128 0x70
-	.4byte	0xa3cf
+	.4byte	0xa3d3
 	.4byte	.LLST419
 	.uleb128 0x70
-	.4byte	0xa3d4
+	.4byte	0xa3d8
 	.4byte	.LLST420
 	.uleb128 0x70
-	.4byte	0xa3d9
+	.4byte	0xa3dd
 	.4byte	.LLST421
 	.uleb128 0x70
-	.4byte	0xa3de
+	.4byte	0xa3e2
 	.4byte	.LLST422
 	.uleb128 0x70
-	.4byte	0xa3e3
+	.4byte	0xa3e7
 	.4byte	.LLST423
 	.uleb128 0x78
 	.4byte	0x2dd3
 	.uleb128 0x78
 	.4byte	0x2ddb
 	.uleb128 0x71
-	.4byte	0xa3e8
+	.4byte	0xa3ec
 	.uleb128 0x40
 	.4byte	.Ldebug_ranges0+0x2d0
-	.4byte	0xa4ea
+	.4byte	0xa4ee
 	.uleb128 0x70
 	.4byte	0x2df1
 	.4byte	.LLST424
@@ -41205,7 +41194,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1839
 	.4byte	0x6644
-	.4byte	0xa4a4
+	.4byte	0xa4a8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41216,7 +41205,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1842
 	.4byte	0x6644
-	.4byte	0xa4bb
+	.4byte	0xa4bf
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41228,7 +41217,7 @@ __func__.7632:
 	.4byte	0x2ec4
 	.uleb128 0x36
 	.8byte	.LVL1854
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41249,7 +41238,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1867
 	.4byte	0x460e
-	.4byte	0xa50f
+	.4byte	0xa513
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41260,7 +41249,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1869
 	.4byte	0x6644
-	.4byte	0xa527
+	.4byte	0xa52b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41274,7 +41263,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1876
 	.4byte	0x6644
-	.4byte	0xa54b
+	.4byte	0xa54f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41284,7 +41273,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1878
 	.4byte	0x36c0
-	.4byte	0xa563
+	.4byte	0xa567
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41295,7 +41284,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1883
 	.4byte	0x35af
-	.4byte	0xa57b
+	.4byte	0xa57f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41306,7 +41295,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1884
 	.4byte	0x36c0
-	.4byte	0xa593
+	.4byte	0xa597
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41316,8 +41305,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1885
-	.4byte	0xa949
-	.4byte	0xa5c6
+	.4byte	0xa94d
+	.4byte	0xa5ca
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41339,8 +41328,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1886
-	.4byte	0xa949
-	.4byte	0xa5f9
+	.4byte	0xa94d
+	.4byte	0xa5fd
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41362,8 +41351,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1887
-	.4byte	0xa949
-	.4byte	0xa62c
+	.4byte	0xa94d
+	.4byte	0xa630
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41386,7 +41375,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1888
 	.4byte	0x460e
-	.4byte	0xa644
+	.4byte	0xa648
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41400,7 +41389,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1903
 	.4byte	0x29a4
-	.4byte	0xa669
+	.4byte	0xa66d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -41410,8 +41399,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1912
-	.4byte	0xa949
-	.4byte	0xa69c
+	.4byte	0xa94d
+	.4byte	0xa6a0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41434,7 +41423,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1914
 	.4byte	0x5c36
-	.4byte	0xa6ba
+	.4byte	0xa6be
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -41453,7 +41442,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1916
 	.4byte	0x35ed
-	.4byte	0xa6e5
+	.4byte	0xa6e9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41478,7 +41467,7 @@ __func__.7632:
 	.4byte	0x37c4
 	.uleb128 0x45
 	.8byte	.LVL1923
-	.4byte	0x7d55
+	.4byte	0x7d59
 	.uleb128 0x45
 	.8byte	.LVL1924
 	.4byte	0x5d63
@@ -41503,28 +41492,28 @@ __func__.7632:
 	.8byte	.LFE292-.LFB292
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0xa926
+	.4byte	0xa92a
 	.uleb128 0x75
 	.4byte	0x3fa9
 	.byte	0
 	.uleb128 0x63
 	.8byte	.LBB304
 	.8byte	.LBE304-.LBB304
-	.4byte	0xa890
+	.4byte	0xa894
 	.uleb128 0x71
-	.4byte	0xa764
+	.4byte	0xa768
 	.uleb128 0x63
 	.8byte	.LBB305
 	.8byte	.LBE305-.LBB305
-	.4byte	0xa7a3
+	.4byte	0xa7a7
 	.uleb128 0x70
 	.4byte	0x3fb4
 	.4byte	.LLST464
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2109
+	.8byte	.LVL2106
 	.4byte	0x43a6
-	.4byte	0xa7bb
+	.4byte	0xa7bf
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41533,9 +41522,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2110
+	.8byte	.LVL2107
 	.4byte	0x43a6
-	.4byte	0xa7d3
+	.4byte	0xa7d7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41544,9 +41533,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2112
+	.8byte	.LVL2109
 	.4byte	0x588f
-	.4byte	0xa7f2
+	.4byte	0xa7f6
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41555,9 +41544,9 @@ __func__.7632:
 	.8byte	.LANCHOR144
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2113
+	.8byte	.LVL2110
 	.4byte	0x588f
-	.4byte	0xa811
+	.4byte	0xa815
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41566,24 +41555,24 @@ __func__.7632:
 	.8byte	.LANCHOR149
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2114
+	.8byte	.LVL2111
 	.4byte	0x5d63
 	.uleb128 0x45
-	.8byte	.LVL2115
+	.8byte	.LVL2112
 	.4byte	0x5694
 	.uleb128 0x45
-	.8byte	.LVL2116
+	.8byte	.LVL2113
 	.4byte	0x5694
 	.uleb128 0x45
-	.8byte	.LVL2120
+	.8byte	.LVL2117
 	.4byte	0x2f73
 	.uleb128 0x45
-	.8byte	.LVL2121
+	.8byte	.LVL2118
 	.4byte	0x2f73
 	.uleb128 0x34
-	.8byte	.LVL2122
+	.8byte	.LVL2119
 	.4byte	0x3932
-	.4byte	0xa86a
+	.4byte	0xa86e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41592,9 +41581,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2123
+	.8byte	.LVL2120
 	.4byte	0x3932
-	.4byte	0xa882
+	.4byte	0xa886
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41603,41 +41592,41 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2124
+	.8byte	.LVL2121
 	.4byte	0x425d
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2096
+	.8byte	.LVL2093
 	.4byte	0x6bd9
 	.uleb128 0x45
-	.8byte	.LVL2097
+	.8byte	.LVL2094
 	.4byte	0x5446
 	.uleb128 0x45
-	.8byte	.LVL2098
+	.8byte	.LVL2095
 	.4byte	0x5201
 	.uleb128 0x45
-	.8byte	.LVL2099
+	.8byte	.LVL2096
 	.4byte	0x4f40
 	.uleb128 0x45
-	.8byte	.LVL2100
+	.8byte	.LVL2097
 	.4byte	0x4fe5
 	.uleb128 0x45
-	.8byte	.LVL2101
+	.8byte	.LVL2098
 	.4byte	0x445e
 	.uleb128 0x45
-	.8byte	.LVL2102
+	.8byte	.LVL2099
 	.4byte	0x5439
 	.uleb128 0x45
-	.8byte	.LVL2103
+	.8byte	.LVL2100
 	.4byte	0x6a65
 	.uleb128 0x45
-	.8byte	.LVL2104
+	.8byte	.LVL2101
 	.4byte	0x44c8
 	.uleb128 0x45
-	.8byte	.LVL2105
+	.8byte	.LVL2102
 	.4byte	0x46c6
 	.uleb128 0x36
-	.8byte	.LVL2106
+	.8byte	.LVL2103
 	.4byte	0x5944
 	.uleb128 0x30
 	.uleb128 0x1
@@ -43350,11 +43339,11 @@ __func__.7632:
 	.section	.debug_loc,"",@progbits
 .Ldebug_loc0:
 .LLST470:
-	.8byte	.LVL2177
-	.8byte	.LVL2178-1
+	.8byte	.LVL2174
+	.8byte	.LVL2175-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2178-1
+	.8byte	.LVL2175-1
 	.8byte	.LFE348
 	.2byte	0x4
 	.byte	0xf3
@@ -43364,11 +43353,11 @@ __func__.7632:
 	.8byte	0
 	.8byte	0
 .LLST471:
-	.8byte	.LVL2177
-	.8byte	.LVL2178-1
+	.8byte	.LVL2174
+	.8byte	.LVL2175-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL2178-1
+	.8byte	.LVL2175-1
 	.8byte	.LFE348
 	.2byte	0x4
 	.byte	0xf3
@@ -43378,11 +43367,11 @@ __func__.7632:
 	.8byte	0
 	.8byte	0
 .LLST472:
-	.8byte	.LVL2177
-	.8byte	.LVL2178-1
+	.8byte	.LVL2174
+	.8byte	.LVL2175-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL2178-1
+	.8byte	.LVL2175-1
 	.8byte	.LFE348
 	.2byte	0x4
 	.byte	0xf3
@@ -46707,15 +46696,15 @@ __func__.7632:
 	.8byte	0
 	.8byte	0
 .LLST463:
+	.8byte	.LVL2077
 	.8byte	.LVL2080
-	.8byte	.LVL2083
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL2092
-	.8byte	.LVL2094
+	.8byte	.LVL2089
+	.8byte	.LVL2091
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL2095
+	.8byte	.LVL2092
 	.8byte	.LFE274
 	.2byte	0x1
 	.byte	0x66
@@ -50281,15 +50270,15 @@ __func__.7632:
 	.8byte	0
 	.8byte	0
 .LLST460:
+	.8byte	.LVL2070
 	.8byte	.LVL2073
-	.8byte	.LVL2076
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2076
-	.8byte	.LVL2077-1
+	.8byte	.LVL2073
+	.8byte	.LVL2074-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL2077-1
+	.8byte	.LVL2074-1
 	.8byte	.LFE220
 	.2byte	0x4
 	.byte	0xf3
@@ -50299,15 +50288,15 @@ __func__.7632:
 	.8byte	0
 	.8byte	0
 .LLST461:
-	.8byte	.LVL2073
-	.8byte	.LVL2075
+	.8byte	.LVL2070
+	.8byte	.LVL2072
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL2075
-	.8byte	.LVL2077-1
+	.8byte	.LVL2072
+	.8byte	.LVL2074-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL2077-1
+	.8byte	.LVL2074-1
 	.8byte	.LFE220
 	.2byte	0x4
 	.byte	0xf3
@@ -50317,15 +50306,15 @@ __func__.7632:
 	.8byte	0
 	.8byte	0
 .LLST462:
-	.8byte	.LVL2073
-	.8byte	.LVL2074
+	.8byte	.LVL2070
+	.8byte	.LVL2071
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL2074
-	.8byte	.LVL2077-1
+	.8byte	.LVL2071
+	.8byte	.LVL2074-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL2077-1
+	.8byte	.LVL2074-1
 	.8byte	.LFE220
 	.2byte	0x4
 	.byte	0xf3
@@ -50577,23 +50566,23 @@ __func__.7632:
 	.8byte	.LVL1989
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1991
-	.8byte	.LVL1994
+	.8byte	.LVL1992
+	.8byte	.LVL1995
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1994
-	.8byte	.LVL2018
+	.8byte	.LVL1995
+	.8byte	.LVL2004
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL2026
-	.8byte	.LVL2032
+	.8byte	.LVL2011
+	.8byte	.LVL2017
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL2033
-	.8byte	.LVL2072
+	.8byte	.LVL2018
+	.8byte	.LVL2069
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL2072
+	.8byte	.LVL2069
 	.8byte	.LFE217
 	.2byte	0x1
 	.byte	0x51
@@ -50607,15 +50596,15 @@ __func__.7632:
 	.8byte	.LVL1986
 	.8byte	.LVL1990
 	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL1991
+	.byte	0x68
 	.8byte	.LVL1992
+	.8byte	.LVL1993
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1992
+	.8byte	.LVL1993
 	.8byte	.LFE217
 	.2byte	0x1
-	.byte	0x69
+	.byte	0x68
 	.8byte	0
 	.8byte	0
 .LLST448:
@@ -50624,84 +50613,84 @@ __func__.7632:
 	.2byte	0x1
 	.byte	0x53
 	.8byte	.LVL1989-1
-	.8byte	.LVL1990
-	.2byte	0x1
-	.byte	0x6a
 	.8byte	.LVL1991
-	.8byte	.LVL1993
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL1992
+	.8byte	.LVL1994
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1993
-	.8byte	.LVL2072
+	.8byte	.LVL1994
+	.8byte	.LVL2069
 	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL2072
+	.byte	0x69
+	.8byte	.LVL2069
 	.8byte	.LFE217
 	.2byte	0x1
 	.byte	0x53
 	.8byte	0
 	.8byte	0
 .LLST449:
-	.8byte	.LVL2046
-	.8byte	.LVL2068
+	.8byte	.LVL2047
+	.8byte	.LVL2069
 	.2byte	0x1
 	.byte	0x6b
 	.8byte	0
 	.8byte	0
 .LLST450:
-	.8byte	.LVL1999
 	.8byte	.LVL2000
+	.8byte	.LVL2001
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL2000
-	.8byte	.LVL2020
+	.8byte	.LVL2001
+	.8byte	.LVL2003
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL2039
-	.8byte	.LVL2072
+	.8byte	.LVL2024
+	.8byte	.LVL2069
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
 .LLST451:
-	.8byte	.LVL1995
-	.8byte	.LVL2019
+	.8byte	.LVL1996
+	.8byte	.LVL2005
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL2026
-	.8byte	.LVL2032
+	.8byte	.LVL2011
+	.8byte	.LVL2017
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL2033
-	.8byte	.LVL2072
+	.8byte	.LVL2018
+	.8byte	.LVL2069
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
 .LLST452:
-	.8byte	.LVL1996
 	.8byte	.LVL1997
+	.8byte	.LVL1998
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1997
-	.8byte	.LVL2072
+	.8byte	.LVL1998
+	.8byte	.LVL2069
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 344
 	.8byte	0
 	.8byte	0
 .LLST453:
-	.8byte	.LVL2044
 	.8byte	.LVL2045
+	.8byte	.LVL2046
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2045
-	.8byte	.LVL2047
+	.8byte	.LVL2046
+	.8byte	.LVL2048
 	.2byte	0x2
 	.byte	0x71
 	.sleb128 4
-	.8byte	.LVL2047
-	.8byte	.LVL2048-1
+	.8byte	.LVL2048
+	.8byte	.LVL2049-1
 	.2byte	0xf
 	.byte	0x3
 	.8byte	req_prgm
@@ -50714,50 +50703,50 @@ __func__.7632:
 	.8byte	0
 	.8byte	0
 .LLST454:
-	.8byte	.LVL2011
-	.8byte	.LVL2016
+	.8byte	.LVL2035
+	.8byte	.LVL2040
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 360
-	.8byte	.LVL2042
-	.8byte	.LVL2054
+	.8byte	.LVL2043
+	.8byte	.LVL2055
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 360
-	.8byte	.LVL2054
 	.8byte	.LVL2055
+	.8byte	.LVL2056
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL2055
-	.8byte	.LVL2072
+	.8byte	.LVL2056
+	.8byte	.LVL2069
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 360
 	.8byte	0
 	.8byte	0
 .LLST455:
-	.8byte	.LVL1998
-	.8byte	.LVL2031
+	.8byte	.LVL1999
+	.8byte	.LVL2016
 	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL2031
-	.8byte	.LVL2032
+	.byte	0x6a
+	.8byte	.LVL2016
+	.8byte	.LVL2017
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL2033
-	.8byte	.LVL2039
+	.8byte	.LVL2018
+	.8byte	.LVL2024
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL2039
-	.8byte	.LVL2072
+	.8byte	.LVL2024
+	.8byte	.LVL2069
 	.2byte	0x1
-	.byte	0x68
+	.byte	0x6a
 	.8byte	0
 	.8byte	0
 .LLST456:
-	.8byte	.LVL2007
-	.8byte	.LVL2008
+	.8byte	.LVL2031
+	.8byte	.LVL2032
 	.2byte	0x21
 	.byte	0x83
 	.sleb128 7
@@ -50772,7 +50761,7 @@ __func__.7632:
 	.byte	0xc
 	.4byte	0xffffffff
 	.byte	0x1a
-	.byte	0x88
+	.byte	0x8a
 	.sleb128 0
 	.byte	0x16
 	.byte	0x14
@@ -50785,52 +50774,38 @@ __func__.7632:
 	.byte	0x16
 	.byte	0x13
 	.byte	0x9f
-	.8byte	.LVL2008
-	.8byte	.LVL2009
+	.8byte	.LVL2032
+	.8byte	.LVL2033
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2009
-	.8byte	.LVL2012
+	.8byte	.LVL2033
+	.8byte	.LVL2036
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 336
-	.8byte	.LVL2012
-	.8byte	.LVL2013
-	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL2013
-	.8byte	.LVL2015
-	.2byte	0x3
-	.byte	0x8b
-	.sleb128 -1
-	.byte	0x9f
-	.8byte	.LVL2015
-	.8byte	.LVL2016
+	.8byte	.LVL2036
+	.8byte	.LVL2040
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL2042
-	.8byte	.LVL2068
+	.8byte	.LVL2043
+	.8byte	.LVL2069
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 336
-	.8byte	.LVL2068
-	.8byte	.LVL2072
-	.2byte	0x1
-	.byte	0x6b
 	.8byte	0
 	.8byte	0
 .LLST457:
-	.8byte	.LVL1999
 	.8byte	.LVL2000
+	.8byte	.LVL2001
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL2027
-	.8byte	.LVL2029
+	.8byte	.LVL2012
+	.8byte	.LVL2014
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2029
-	.8byte	.LVL2031-1
+	.8byte	.LVL2014
+	.8byte	.LVL2016-1
 	.2byte	0x16
 	.byte	0x86
 	.sleb128 0
@@ -50846,92 +50821,92 @@ __func__.7632:
 	.byte	0x1e
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL2049
 	.8byte	.LVL2050
+	.8byte	.LVL2051
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2050
-	.8byte	.LVL2052
+	.8byte	.LVL2051
+	.8byte	.LVL2053
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 340
-	.8byte	.LVL2055
-	.8byte	.LVL2057
+	.8byte	.LVL2056
+	.8byte	.LVL2058
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL2057
 	.8byte	.LVL2058
+	.8byte	.LVL2059
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 340
-	.8byte	.LVL2059
-	.8byte	.LVL2067
+	.8byte	.LVL2060
+	.8byte	.LVL2068
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 340
 	.8byte	0
 	.8byte	0
 .LLST458:
-	.8byte	.LVL1999
 	.8byte	.LVL2000
+	.8byte	.LVL2001
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL2028
-	.8byte	.LVL2030
+	.8byte	.LVL2013
+	.8byte	.LVL2015
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL2030
-	.8byte	.LVL2032
+	.8byte	.LVL2015
+	.8byte	.LVL2017
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2033
-	.8byte	.LVL2039
+	.8byte	.LVL2018
+	.8byte	.LVL2024
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2051
 	.8byte	.LVL2052
+	.8byte	.LVL2053
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 348
-	.8byte	.LVL2056
 	.8byte	.LVL2057
+	.8byte	.LVL2058
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2057
 	.8byte	.LVL2058
+	.8byte	.LVL2059
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 348
-	.8byte	.LVL2059
-	.8byte	.LVL2067
+	.8byte	.LVL2060
+	.8byte	.LVL2068
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 348
 	.8byte	0
 	.8byte	0
 .LLST459:
-	.8byte	.LVL1999
 	.8byte	.LVL2000
+	.8byte	.LVL2001
 	.2byte	0xa
 	.byte	0x3
 	.8byte	g_active_superblock
 	.byte	0x9f
-	.8byte	.LVL2000
-	.8byte	.LVL2004
-	.2byte	0x1
-	.byte	0x63
+	.8byte	.LVL2001
 	.8byte	.LVL2006
-	.8byte	.LVL2021
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2039
-	.8byte	.LVL2041
+	.8byte	.LVL2024
+	.8byte	.LVL2028
 	.2byte	0x1
 	.byte	0x63
+	.8byte	.LVL2030
 	.8byte	.LVL2042
-	.8byte	.LVL2072
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL2043
+	.8byte	.LVL2069
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
@@ -51387,8 +51362,8 @@ __func__.7632:
 	.8byte	0
 	.8byte	0
 .LLST469:
-	.8byte	.LVL2173
-	.8byte	.LVL2174
+	.8byte	.LVL2170
+	.8byte	.LVL2171
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x1fc1
@@ -51396,8 +51371,8 @@ __func__.7632:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL2174
-	.8byte	.LVL2175
+	.8byte	.LVL2171
+	.8byte	.LVL2172
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x1fc2
@@ -51405,8 +51380,8 @@ __func__.7632:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL2175
-	.8byte	.LVL2176
+	.8byte	.LVL2172
+	.8byte	.LVL2173
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x1fc1
@@ -51417,103 +51392,103 @@ __func__.7632:
 	.8byte	0
 	.8byte	0
 .LLST465:
-	.8byte	.LVL2130
-	.8byte	.LVL2131
+	.8byte	.LVL2127
+	.8byte	.LVL2128
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL2133
-	.8byte	.LVL2134
+	.8byte	.LVL2130
+	.8byte	.LVL2131
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL2143
-	.8byte	.LVL2144
+	.8byte	.LVL2140
+	.8byte	.LVL2141
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL2144
-	.8byte	.LVL2145-1
+	.8byte	.LVL2141
+	.8byte	.LVL2142-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2147
-	.8byte	.LVL2148
+	.8byte	.LVL2144
+	.8byte	.LVL2145
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL2152
-	.8byte	.LVL2153
+	.8byte	.LVL2149
+	.8byte	.LVL2150
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2153
-	.8byte	.LVL2154-1
+	.8byte	.LVL2150
+	.8byte	.LVL2151-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2154
-	.8byte	.LVL2155
+	.8byte	.LVL2151
+	.8byte	.LVL2152
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2155
-	.8byte	.LVL2156
+	.8byte	.LVL2152
+	.8byte	.LVL2153
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL2156
-	.8byte	.LVL2157-1
+	.8byte	.LVL2153
+	.8byte	.LVL2154-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2159
-	.8byte	.LVL2160
+	.8byte	.LVL2156
+	.8byte	.LVL2157
 	.2byte	0x1
 	.byte	0x68
 	.8byte	0
 	.8byte	0
 .LLST466:
-	.8byte	.LVL2133
-	.8byte	.LVL2137
+	.8byte	.LVL2130
+	.8byte	.LVL2134
 	.2byte	0x1
 	.byte	0x63
+	.8byte	.LVL2152
 	.8byte	.LVL2155
-	.8byte	.LVL2158
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2159
-	.8byte	.LVL2160
+	.8byte	.LVL2156
+	.8byte	.LVL2157
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
 .LLST467:
-	.8byte	.LVL2129
-	.8byte	.LVL2130
+	.8byte	.LVL2126
+	.8byte	.LVL2127
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL2130
-	.8byte	.LVL2132
+	.8byte	.LVL2127
+	.8byte	.LVL2129
 	.2byte	0x1
 	.byte	0x63
+	.8byte	.LVL2140
 	.8byte	.LVL2143
-	.8byte	.LVL2146
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2147
-	.8byte	.LVL2149
+	.8byte	.LVL2144
+	.8byte	.LVL2146
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2151
-	.8byte	.LVL2152
+	.8byte	.LVL2148
+	.8byte	.LVL2149
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
 .LLST468:
-	.8byte	.LVL2128
-	.8byte	.LVL2130
+	.8byte	.LVL2125
+	.8byte	.LVL2127
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2140
-	.8byte	.LVL2141
+	.8byte	.LVL2137
+	.8byte	.LVL2138
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2142
-	.8byte	.LVL2143
+	.8byte	.LVL2139
+	.8byte	.LVL2140
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
@@ -53123,14 +53098,14 @@ __func__.7632:
 	.8byte	0
 	.8byte	0
 .LLST464:
-	.8byte	.LVL2110
-	.8byte	.LVL2111
+	.8byte	.LVL2107
+	.8byte	.LVL2108
 	.2byte	0xa
 	.byte	0x3
 	.8byte	g_active_superblock
 	.byte	0x9f
-	.8byte	.LVL2111
-	.8byte	.LVL2117
+	.8byte	.LVL2108
+	.8byte	.LVL2114
 	.2byte	0xa
 	.byte	0x3
 	.8byte	g_buffer_superblock

commit 08eb34f0b422ef51e12ba982bb74ca8079c4aa04
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Wed Jun 13 17:41:19 2018 +0800

    rockchip: dts: rk3308: enable sfc node
    
    Change-Id: I333d21506492afd9a3515fb803f477d26f4dc201
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-evb-u-boot.dtsi b/arch/arm/dts/rk3308-evb-u-boot.dtsi
index 60bad75b5d..f1ee370846 100644
--- a/arch/arm/dts/rk3308-evb-u-boot.dtsi
+++ b/arch/arm/dts/rk3308-evb-u-boot.dtsi
@@ -29,6 +29,11 @@
 	status = "okay";
 };
 
+&sfc {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 &uart2 {
 	u-boot,dm-pre-reloc;
 	clock-frequency = <24000000>;

commit b88d7442a3a9c93f71688bdeea0d85795e8ccbec
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Wed Jun 13 17:37:22 2018 +0800

    rockchip: configs: rk3308: change to sftl and enable sfc devices
    
    Change-Id: I7d835f10d65aed321d578bf93486cee62f37d07a
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index 956d8385d7..6a67a31103 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -42,7 +42,10 @@ CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_DM_RESET=y
-CONFIG_RKNAND=y
+CONFIG_RKFLASH=y
+CONFIG_RKNANDC_NAND=y
+CONFIG_RKSFC_NOR=y
+CONFIG_RKSFC_NAND=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF0C0000
 CONFIG_DEBUG_UART_CLOCK=24000000

commit 7a39aeb5cd9ccf6a9fae5d1f81f1270ec988e2a0
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Jun 26 10:54:48 2018 +0800

    rockchip: rk3399: update doc for u-boot.itb write position
    
    u-boot.itb will use the same position as uboot.img
    
    Change-Id: I839c947a0221d347e5810d1fc8bbae655aba429b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/board/rockchip/evb_rk3399/README b/board/rockchip/evb_rk3399/README
index 7da7c848bd..1b9a6ff09b 100644
--- a/board/rockchip/evb_rk3399/README
+++ b/board/rockchip/evb_rk3399/README
@@ -99,7 +99,7 @@ Flash the image with U-Boot SPL(option 1)
 Power on(or reset with RESET KEY) with MASKROM KEY preesed, and then:
   > rkdeveloptool db rkbin/rk33/rk3399_loader_v1.08.106.bin
   > rkdeveloptool wl 64 u-boot/idbspl.img
-  > rkdeveloptool wl 512 u-boot/u-boot.itb
+  > rkdeveloptool wl 0x4000 u-boot/u-boot.itb
   > rkdeveloptool rd
 
 Flash the image with Rockchip miniloader(option 2)

commit 7070f875d9a30c6679578cffafe6c355d54c3030
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 10 15:30:43 2018 +0800

    make.sh: support hex prefix with "0x" or "0X" for <addr> subcmd
    
    Command:
            ./make.sh <addr>
    
    Change-Id: Iea2cf4009ed39989796a15556490db70b12696fc
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 1d1dce90e7..4b84bfd446 100755
--- a/make.sh
+++ b/make.sh
@@ -136,7 +136,7 @@ prepare()
 
 		*)
 		#Func address is valid ?
-		if [ -z $(echo ${FUNCADDR} | sed 's/[0-9,a-f,A-F]//g') ]; then
+		if [ -z $(echo ${FUNCADDR} | sed 's/[0-9,a-f,A-F,x,X]//g') ]; then
 			return
 		elif [ ! -f configs/${BOARD}_defconfig ]; then
 			echo
@@ -245,7 +245,13 @@ sub_commands()
 
 		*)
 		# Search function and code position of address
-		if [ -z $(echo ${FUNCADDR} | sed 's/[0-9,a-f,A-F]//g') ] && [ ${FUNCADDR} ]; then
+		if [ -z $(echo ${FUNCADDR} | sed 's/[0-9,a-f,A-F,x,X]//g') ] && [ ${FUNCADDR} ]; then
+			# With prefix: '0x' or '0X'
+			if [ `echo ${FUNCADDR} | sed -n "/0[x,X]/p" | wc -l` -ne 0 ]; then
+				FUNCADDR=`echo $FUNCADDR | awk '{ print strtonum($0) }'`
+				FUNCADDR=`echo "obase=16;${FUNCADDR}"|bc |tr '[A-Z]' '[a-z]'`
+			fi
+
 			echo
 			sed -n "/${FUNCADDR}/p" ${OUTDIR}/u-boot.sym
 			${TOOLCHAIN_ADDR2LINE} -e ${OUTDIR}/u-boot ${FUNCADDR}

commit 6a7642592aeb7ed15f259e5d89ddf2c21d158f0b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 10 15:22:12 2018 +0800

    make.sh: update help info
    
    Change-Id: Ia3a56c4173184a1871ab765c661726fb1fc66d2c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 1a72d3effe..1d1dce90e7 100755
--- a/make.sh
+++ b/make.sh
@@ -47,29 +47,36 @@ PLATFORM_AARCH32=
 help()
 {
 	echo
-	echo "Usage: ./make.sh [board|subcmd] [O=<dir>]"
+	echo "Usage:"
+	echo "	./make.sh [board|subcmd] [O=<dir>]"
+	echo
+	echo "	 - board: board name of defconfig"
+	echo "	 - subcmd: loader|loader-all|trust|uboot|elf|map|sym|<addr>|"
+	echo "	 - O=<dir>: assigned output directory"
 	echo
 	echo "Example:"
 	echo
-	echo "1. Build:"
-	echo "	./make.sh evb-rk3399     	---- build for evb-rk3399_defconfig"
+	echo "1. Build board:"
+	echo "	./make.sh evb-rk3399            ---- build for evb-rk3399_defconfig"
 	echo "	./make.sh evb-rk3399 O=rockdev  ---- build for evb-rk3399_defconfig with output dir "./rockdev""
-	echo "	./make.sh firefly-rk3288 	---- build for firefly-rk3288_defconfig"
-	echo "	./make.sh			---- build with exist .config"
+	echo "	./make.sh firefly-rk3288        ---- build for firefly-rk3288_defconfig"
+	echo "	./make.sh                       ---- build with exist .config"
 	echo
 	echo "	After build, images of uboot, loader and trust are all generated."
 	echo
-	echo "2. Subcmd helper:"
-	echo "	./make.sh trust		--- pack trust.img without rebuild project"
-	echo "	./make.sh loader	--- pack loader bin without rebuild project"
-	echo "	./make.sh uboot		--- pack uboot.img without rebuild project"
+	echo "2. Pack helper:"
+	echo "	./make.sh trust         --- pack trust.img"
+	echo "	./make.sh uboot         --- pack uboot.img"
+	echo "	./make.sh loader        --- pack loader bin"
+	echo "	./make.sh loader-all	--- pack loader bin (all supported loaders)"
 	echo
 	echo "3. Debug helper:"
-	echo "	./make.sh elf		--- dump elf file with -D(default)"
-	echo "	./make.sh elf-S		--- dump elf file with -S"
-	echo "	./make.sh <addr>	--- dump function name and code position of address"
-	echo "	./make.sh map		--- cat u-boot.map"
-	echo "	./make.sh sym		--- cat u-boot.sym"
+	echo "	./make.sh elf           --- dump elf file with -D(default)"
+	echo "	./make.sh elf-S         --- dump elf file with -S"
+	echo "	./make.sh elf-d         --- dump elf file with -d"
+	echo "	./make.sh <addr>        --- dump function symbol and code position of address"
+	echo "	./make.sh map           --- cat u-boot.map"
+	echo "	./make.sh sym           --- cat u-boot.sym"
 }
 
 prepare()

commit 5c75ab41e7fc7f81e8c09c68b23c40a5c039aecd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 10 15:18:43 2018 +0800

    make.sh: support pack all loaders
    
    Command:
            ./make.sh loader-all
    
    Change-Id: I458c30f6505eaace52858254277905e163255fa2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 247c40fe03..1a72d3effe 100755
--- a/make.sh
+++ b/make.sh
@@ -84,7 +84,7 @@ prepare()
 	else
 		case $BOARD in
 			# Parse from exit .config
-			''|elf*|trust|loader|uboot|map|sym)
+			''|elf*|loader*|trust|uboot|map|sym)
 			count=`find -name .config | wc -l`
 			dir=`find -name .config`
 			# Good, find only one .config
@@ -124,7 +124,7 @@ prepare()
 		;;
 
 		#Subcmd
-		''|elf*|trust|loader|uboot|map|sym)
+		''|elf*|loader*|trust|uboot|map|sym)
 		;;
 
 		*)
@@ -194,7 +194,7 @@ select_toolchain()
 
 sub_commands()
 {
-	local cmd=${SUBCMD%-*} elfopt=${SUBCMD#*-}
+	local cmd=${SUBCMD%-*} opt=${SUBCMD#*-}
 
 	case $cmd in
 		elf)
@@ -203,10 +203,10 @@ sub_commands()
 			exit 1
 		else
 			# default 'cmd' without option, use '-D'
-			if [ "${cmd}" = 'elf' -a "${elfopt}" = 'elf' ]; then
-				elfopt=D
+			if [ "${cmd}" = 'elf' -a "${opt}" = 'elf' ]; then
+				opt=D
 			fi
-			${TOOLCHAIN_OBJDUMP} -${elfopt} ${OUTDIR}/u-boot | less
+			${TOOLCHAIN_OBJDUMP} -${opt} ${OUTDIR}/u-boot | less
 			exit 0
 		fi
 		;;
@@ -227,7 +227,7 @@ sub_commands()
 		;;
 
 		loader)
-		pack_loader_image
+		pack_loader_image ${opt}
 		exit 0
 		;;
 
@@ -330,7 +330,7 @@ pack_uboot_image()
 
 pack_loader_image()
 {
-	local files ini
+	local mode=$1 files ini
 
 	if [ ! -f ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini ]; then
 		echo "pack loader failed! Can't find: ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini"
@@ -338,14 +338,20 @@ pack_loader_image()
 	fi
 
 	cd ${RKBIN}
-	files=`ls ${RKBIN}/RKBOOT/${RKCHIP}MINIALL*.ini`
-	for ini in $files
-	do
-		if [ -f "$ini" ]; then
-			${RKTOOLS}/boot_merger --replace tools/rk_tools/ ./ $ini
-			echo "pack loader okay! Input: $ini"
-		fi
-	done
+
+	if [ "${mode}" = 'all' ]; then
+		files=`ls ${RKBIN}/RKBOOT/${RKCHIP}MINIALL*.ini`
+		for ini in $files
+		do
+			if [ -f "$ini" ]; then
+				${RKTOOLS}/boot_merger --replace tools/rk_tools/ ./ $ini
+				echo "pack loader okay! Input: $ini"
+			fi
+		done
+	else
+		${RKTOOLS}/boot_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini
+		echo "pack loader okay! Input: ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini"
+	fi
 
 	cd - && mv ${RKBIN}/*_loader_*.bin ./
 }

commit b8654f90c4b59f1e8eb9edb71e6cd19fac5fd167
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Fri Jul 6 15:11:00 2018 +0800

    arm: dts: rockchip: update display node default status
    
    if you want to enable display at uboot you need to set
    the following node status to okay:
    
    1. display_subsystem
    2. route_rgb
    3. vop
    4. rgb
    5. backlight
    6. pwm1[depend on your hardware]
    7. panel[update timing and init cmd]
    
    Change-Id: I18b8857d49350ee870522599c9986d749b51bca0
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-evb.dts b/arch/arm/dts/rk3308-evb.dts
index 3ee81a23f4..87012226ba 100644
--- a/arch/arm/dts/rk3308-evb.dts
+++ b/arch/arm/dts/rk3308-evb.dts
@@ -131,6 +131,7 @@
 		rockchip,data-mapping = "vesa";
 		rockchip,data-width = <18>;
 		rockchip,output = "rgb";
+		rgb-mode = "p666";
 		status = "disabled";
 		pinctrl-names = "default";
 		pinctrl-0 = <&spi_init_cmd>;
@@ -269,6 +270,10 @@
 
 };
 
+&display_subsystem {
+	status = "disabled";
+};
+
 &emmc {
 	cap-mmc-highspeed;
 	mmc-hs200-1_8v;
@@ -282,6 +287,10 @@
 	status = "okay";
 };
 
+&pwm1 {
+	status = "disabled";
+};
+
 &saradc {
 	status = "okay";
 };
@@ -310,10 +319,6 @@
 	status = "okay";
 };
 
-&rgb {
-	status = "disabled";
-};
-
 &route_rgb {
 	status = "disabled";
 };

commit 67b9012c2960b8752d1c1ddade2c04626ebbb0e1
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Fri Jul 6 15:25:36 2018 +0800

    drm/rockchip: add support mcu screen
    
    the mcu screen need send init command through crtc, so we add
    the function display_send_mcu_cmd() from panel to crtc.
    
    Change-Id: Ide4a6043dff0a7b0040bf62b1aa1814f3c365235
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_crtc.h b/drivers/video/drm/rockchip_crtc.h
index 44a5012461..27bd7a6c03 100644
--- a/drivers/video/drm/rockchip_crtc.h
+++ b/drivers/video/drm/rockchip_crtc.h
@@ -21,6 +21,7 @@ struct rockchip_crtc_funcs {
 	int (*disable)(struct display_state *state);
 	void (*unprepare)(struct display_state *state);
 	int (*fixup_dts)(struct display_state *state, void *blob);
+	int (*send_mcu_cmd)(struct display_state *state, u32 type, u32 value);
 };
 
 struct vop_data;
diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index f9d1919918..83f645bda5 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -537,6 +537,25 @@ deinit:
 	return ret;
 }
 
+int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val)
+{
+	struct crtc_state *crtc_state = &state->crtc_state;
+	const struct rockchip_crtc *crtc = crtc_state->crtc;
+	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
+	int ret;
+
+	if (!state->is_init)
+		return -EINVAL;
+
+	if (crtc_funcs->send_mcu_cmd) {
+		ret = crtc_funcs->send_mcu_cmd(state, type, val);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
 static int display_set_plane(struct display_state *state)
 {
 	struct crtc_state *crtc_state = &state->crtc_state;
@@ -764,6 +783,37 @@ err:
 	return 0;
 }
 
+static int get_crtc_mcu_mode(struct crtc_state *crtc_state)
+{
+	ofnode mcu_node;
+	int total_pixel, cs_pst, cs_pend, rw_pst, rw_pend;
+
+	mcu_node = dev_read_subnode(crtc_state->dev, "mcu-timing");
+
+#define FDT_GET_MCU_INT(val, name) \
+	do { \
+		val = ofnode_read_s32_default(mcu_node, name, -1); \
+		if (val < 0) { \
+			printf("Can't get %s\n", name); \
+			return -ENXIO; \
+		} \
+	} while (0)
+
+	FDT_GET_MCU_INT(total_pixel, "mcu-pix-total");
+	FDT_GET_MCU_INT(cs_pst, "mcu-cs-pst");
+	FDT_GET_MCU_INT(cs_pend, "mcu-cs-pend");
+	FDT_GET_MCU_INT(rw_pst, "mcu-rw-pst");
+	FDT_GET_MCU_INT(rw_pend, "mcu-rw-pend");
+
+	crtc_state->mcu_timing.mcu_pix_total = total_pixel;
+	crtc_state->mcu_timing.mcu_cs_pst = cs_pst;
+	crtc_state->mcu_timing.mcu_cs_pend = cs_pend;
+	crtc_state->mcu_timing.mcu_rw_pst = rw_pst;
+	crtc_state->mcu_timing.mcu_rw_pend = rw_pend;
+
+	return 0;
+}
+
 struct rockchip_logo_cache *find_or_alloc_logo_cache(const char *bmp)
 {
 	struct rockchip_logo_cache *tmp, *logo_cache = NULL;
@@ -1084,6 +1134,7 @@ static int rockchip_display_probe(struct udevice *dev)
 		s->crtc_state.crtc = crtc;
 		s->crtc_state.crtc_id = get_crtc_id(np_to_ofnode(ep_node));
 		s->node = node;
+		get_crtc_mcu_mode(&s->crtc_state);
 
 		if (connector_panel_init(s)) {
 			printf("Warn: Failed to init panel drivers\n");
diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index 0f216f9b98..bd11805fe7 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -35,6 +35,12 @@ enum rockchip_cmd_type {
 	CMD_TYPE_MCU
 };
 
+enum rockchip_mcu_cmd {
+	MCU_WRCMD = 0,
+	MCU_WRDATA,
+	MCU_SETBYPASS,
+};
+
 /*
  * display output interface supported by rockchip lcdc
  */
@@ -47,6 +53,15 @@ enum rockchip_cmd_type {
 /* for use special outface */
 #define ROCKCHIP_OUT_MODE_AAAA	15
 
+struct rockchip_mcu_timing {
+	int mcu_pix_total;
+	int mcu_cs_pst;
+	int mcu_cs_pend;
+	int mcu_rw_pst;
+	int mcu_rw_pend;
+	int mcu_hold_mode;
+};
+
 struct crtc_state {
 	struct udevice *dev;
 	const struct rockchip_crtc *crtc;
@@ -67,6 +82,7 @@ struct crtc_state {
 	int crtc_y;
 	int crtc_w;
 	int crtc_h;
+	struct rockchip_mcu_timing mcu_timing;
 };
 
 struct panel_state {
@@ -152,5 +168,6 @@ struct display_state {
 };
 
 int drm_mode_vrefresh(const struct drm_display_mode *mode);
+int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val);
 
 #endif
diff --git a/drivers/video/drm/rockchip_panel.c b/drivers/video/drm/rockchip_panel.c
index 6605b4ef93..10cd29384c 100644
--- a/drivers/video/drm/rockchip_panel.c
+++ b/drivers/video/drm/rockchip_panel.c
@@ -156,6 +156,30 @@ static void rockchip_panel_write_spi_cmds(struct rockchip_panel_priv *priv,
 	dm_gpio_set_value(&priv->spi_cs_gpio, 1);
 }
 
+static int rockchip_panel_send_mcu_cmds(struct display_state *state,
+					struct rockchip_panel_cmds *cmds)
+{
+	int i;
+
+	if (!cmds)
+		return -EINVAL;
+
+	display_send_mcu_cmd(state, MCU_SETBYPASS, 1);
+	for (i = 0; i < cmds->cmd_cnt; i++) {
+		struct rockchip_cmd_desc *desc = &cmds->cmds[i];
+		int value = 0;
+
+		value = desc->payload[0];
+		display_send_mcu_cmd(state, desc->header.data_type, value);
+
+		if (desc->header.delay_ms)
+			mdelay(desc->header.delay_ms);
+	}
+	display_send_mcu_cmd(state, MCU_SETBYPASS, 0);
+
+	return 0;
+}
+
 static int rockchip_panel_send_spi_cmds(struct display_state *state,
 					struct rockchip_panel_cmds *cmds)
 {
@@ -259,6 +283,8 @@ static int rockchip_panel_prepare(struct display_state *state)
 		if (priv->cmd_type == CMD_TYPE_SPI)
 			ret = rockchip_panel_send_spi_cmds(state,
 							   plat->on_cmds);
+		else if (priv->cmd_type == CMD_TYPE_MCU)
+			ret = rockchip_panel_send_mcu_cmds(state, plat->on_cmds);
 		else
 			ret = rockchip_panel_send_dsi_cmds(state,
 							   plat->on_cmds);
@@ -285,6 +311,9 @@ static void rockchip_panel_unprepare(struct display_state *state)
 		if (priv->cmd_type == CMD_TYPE_SPI)
 			ret = rockchip_panel_send_spi_cmds(state,
 							   plat->off_cmds);
+		else if (priv->cmd_type == CMD_TYPE_MCU)
+			ret = rockchip_panel_send_mcu_cmds(state,
+							   plat->off_cmds);
 		else
 			ret = rockchip_panel_send_dsi_cmds(state,
 							   plat->off_cmds);
diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index 201fd20082..28dc622fbd 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -178,6 +178,21 @@ static void vop_post_config(struct display_state *state, struct vop *vop)
 	}
 }
 
+static void vop_mcu_mode(struct display_state *state, struct vop *vop)
+{
+	struct crtc_state *crtc_state = &state->crtc_state;
+
+	VOP_CTRL_SET(vop, mcu_clk_sel, 1);
+	VOP_CTRL_SET(vop, mcu_type, 1);
+
+	VOP_CTRL_SET(vop, mcu_hold_mode, 1);
+	VOP_CTRL_SET(vop, mcu_pix_total, crtc_state->mcu_timing.mcu_pix_total);
+	VOP_CTRL_SET(vop, mcu_cs_pst, crtc_state->mcu_timing.mcu_cs_pst);
+	VOP_CTRL_SET(vop, mcu_cs_pend, crtc_state->mcu_timing.mcu_cs_pend);
+	VOP_CTRL_SET(vop, mcu_rw_pst, crtc_state->mcu_timing.mcu_rw_pst);
+	VOP_CTRL_SET(vop, mcu_rw_pend, crtc_state->mcu_timing.mcu_rw_pend);
+}
+
 static int rockchip_vop_init(struct display_state *state)
 {
 	struct crtc_state *crtc_state = &state->crtc_state;
@@ -421,10 +436,11 @@ static int rockchip_vop_init(struct display_state *state)
 	VOP_CTRL_SET(vop, core_dclk_div,
 		     !!(mode->flags & DRM_MODE_FLAG_DBLCLK));
 
-	VOP_CTRL_SET(vop, standby, 1);
 	VOP_LINE_FLAG_SET(vop, line_flag_num[0], act_end - 3);
 	VOP_LINE_FLAG_SET(vop, line_flag_num[1],
 			  act_end - us_to_vertical_line(mode, 1000));
+	if (state->crtc_state.mcu_timing.mcu_pix_total > 0)
+		vop_mcu_mode(state, vop);
 	vop_cfg_done(vop);
 
 	return 0;
@@ -632,6 +648,8 @@ static int rockchip_vop_enable(struct display_state *state)
 
 	VOP_CTRL_SET(vop, standby, 0);
 	vop_cfg_done(vop);
+	if (crtc_state->mcu_timing.mcu_pix_total > 0)
+		VOP_CTRL_SET(vop, mcu_hold_mode, 0);
 
 	return 0;
 }
@@ -688,6 +706,34 @@ static int rockchip_vop_fixup_dts(struct display_state *state, void *blob)
 	return 0;
 }
 
+static int rockchip_vop_send_mcu_cmd(struct display_state *state,
+				     u32 type, u32 value)
+{
+	struct crtc_state *crtc_state = &state->crtc_state;
+	struct vop *vop = crtc_state->private;
+
+	if (vop) {
+		switch (type) {
+		case MCU_WRCMD:
+			VOP_CTRL_SET(vop, mcu_rs, 0);
+			VOP_CTRL_SET(vop, mcu_rw_bypass_port, value);
+			VOP_CTRL_SET(vop, mcu_rs, 1);
+			break;
+		case MCU_WRDATA:
+			VOP_CTRL_SET(vop, mcu_rs, 1);
+			VOP_CTRL_SET(vop, mcu_rw_bypass_port, value);
+			break;
+		case MCU_SETBYPASS:
+			VOP_CTRL_SET(vop, mcu_bypass, value ? 1 : 0);
+			break;
+		default:
+			break;
+		}
+	}
+
+	return 0;
+}
+
 const struct rockchip_crtc_funcs rockchip_vop_funcs = {
 	.init = rockchip_vop_init,
 	.set_plane = rockchip_vop_set_plane,
@@ -695,4 +741,5 @@ const struct rockchip_crtc_funcs rockchip_vop_funcs = {
 	.enable = rockchip_vop_enable,
 	.disable = rockchip_vop_disable,
 	.fixup_dts = rockchip_vop_fixup_dts,
+	.send_mcu_cmd = rockchip_vop_send_mcu_cmd,
 };

commit 937d9ddabdce8054236aeacd8c601fff26c947f5
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Fri Jul 6 15:25:02 2018 +0800

    drm/rockchip: px30 vop: add mcu register config
    
    Change-Id: I77d571233abd4fd3998b1916ff1576c01c1e90d4
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index 8dee6129e1..66c9713e26 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -506,6 +506,20 @@ static const struct vop_ctrl px30_ctrl_data = {
 	.cabc_stage_down = VOP_REG(PX30_CABC_CTRL2, 0xff, 0),
 	.cabc_global_dn = VOP_REG(PX30_CABC_CTRL3, 0xff, 0),
 	.cabc_global_dn_limit_en = VOP_REG(PX30_CABC_CTRL3, 0x1, 8),
+
+	.mcu_pix_total = VOP_REG(RK3366_LIT_MCU_CTRL, 0x3f, 0),
+	.mcu_cs_pst = VOP_REG(RK3366_LIT_MCU_CTRL, 0xf, 6),
+	.mcu_cs_pend = VOP_REG(RK3366_LIT_MCU_CTRL, 0x3f, 10),
+	.mcu_rw_pst = VOP_REG(RK3366_LIT_MCU_CTRL, 0xf, 16),
+	.mcu_rw_pend = VOP_REG(RK3366_LIT_MCU_CTRL, 0x3f, 20),
+	.mcu_clk_sel = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 26),
+	.mcu_hold_mode = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 27),
+	.mcu_frame_st = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 28),
+	.mcu_rs = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 29),
+	.mcu_bypass = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 30),
+	.mcu_type = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 31),
+	.mcu_rw_bypass_port = VOP_REG(RK3366_LIT_MCU_RW_BYPASS_PORT,
+				      0xffffffff, 0),
 };
 
 static const struct vop_line_flag rk3366_vop_lite_line_flag = {

commit 3afe53975c4c28ebab9d7845b6e8bad3b4a57667
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Jul 10 14:43:00 2018 +0800

    clk: rockchip: rk3288: add PLL_LIMIT_FREQ
    
    npll is for dclk, add PLL_LIMIT_FREQ for better jitter.
    
    Change-Id: I6ac09e9bdbd1bef0eddb37835100be782b772d54
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index c18d7819bc..44ecb71958 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -223,6 +223,7 @@ static int rkclk_configure_ddr(struct rk3288_cru *cru, struct rk3288_grf *grf,
 #define VCO_MIN_KHZ	440000
 #define FREF_MAX_KHZ	2200000
 #define FREF_MIN_KHZ	269
+#define PLL_LIMIT_FREQ	600000000
 
 static int pll_para_config(ulong freq_hz, struct pll_div *div, uint *ext_div)
 {
@@ -241,7 +242,7 @@ static int pll_para_config(ulong freq_hz, struct pll_div *div, uint *ext_div)
 
 	no = DIV_ROUND_UP(VCO_MIN_KHZ, freq_khz);
 	if (ext_div) {
-		*ext_div = DIV_ROUND_UP(no, max_no);
+		*ext_div = DIV_ROUND_UP(PLL_LIMIT_FREQ, freq_hz);
 		no = DIV_ROUND_UP(no, *ext_div);
 	}
 

commit 426b906c9427503d8b30a2c2c2527327fd0dbce1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 3 15:43:26 2018 +0800

    rockchip: vendor: fix compile warning
    
    error: cast from pointer to integer of different size [-Werror=pointer-to-int-cast]
    
    Change-Id: I4773ec9983f2b4302832ad78671168b6529b1ac2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/vendor.c b/arch/arm/mach-rockchip/vendor.c
index 4963bb6748..4b7e7140ea 100755
--- a/arch/arm/mach-rockchip/vendor.c
+++ b/arch/arm/mach-rockchip/vendor.c
@@ -452,8 +452,8 @@ void vendor_test_reset(void)
 	vendor_info.hdr->version = 1;
 	vendor_info.hdr->tag = VENDOR_TAG;
 	/* data field length */
-	vendor_info.hdr->free_size =
-		((u32)vendor_info.hash - (u32)vendor_info.data);
+	vendor_info.hdr->free_size = (unsigned long)vendor_info.hash -
+				     (unsigned long)vendor_info.data;
 	*(vendor_info.version2) = vendor_info.hdr->version;
 	/* write to flash. */
 	for (i = 0; i < VENDOR_PART_NUM; i++)
@@ -481,14 +481,16 @@ int vendor_storage_test(void)
 	switch (bootdev_type) {
 	case IF_TYPE_MMC:
 		item_num = EMMC_VENDOR_ITEM_NUM;
-		total_size = (u32)vendor_info.hash - (u32)vendor_info.data;
+		total_size = (unsigned long)vendor_info.hash -
+			     (unsigned long)vendor_info.data;
 		size = total_size/item_num;
 		break;
 	case IF_TYPE_RKNAND:
 	case IF_TYPE_SPINOR:
 	case IF_TYPE_SPINAND:
 		item_num = FLASH_VENDOR_ITEM_NUM;
-		total_size = (u32)vendor_info.hash - (u32)vendor_info.data;
+		total_size = (unsigned long)vendor_info.hash -
+			     (unsigned long)vendor_info.data;
 		size = total_size/item_num;
 		break;
 	default:

commit 0d889c3a8dec6f562895fe516b5a285679b14b7b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 3 11:27:58 2018 +0800

    tools: env: make fw_printenv statically linked
    
    this makes sure fw_printenv works normally on most
    platforms without care about C library.
    
    Change-Id: If3b942d2fadb293eeeb00695a10b708847a827ad
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/tools/env/Makefile b/tools/env/Makefile
index 95b28c0b3a..6a61bfaba4 100644
--- a/tools/env/Makefile
+++ b/tools/env/Makefile
@@ -16,6 +16,8 @@ HOST_EXTRACFLAGS  = $(patsubst -I%,-idirafter%, $(filter -I%, $(UBOOTINCLUDE)))
 		-DUSE_HOSTCC \
 		-DTEXT_BASE=$(TEXT_BASE)
 
+HOSTLDFLAGS = -static
+
 ifeq ($(MTD_VERSION),old)
 HOST_EXTRACFLAGS += -DMTD_OLD
 endif

commit 53ea579188c07b09d7f73701a69b238f2eabfab3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jul 6 20:34:33 2018 +0800

    make.sh: support get function symbol and addr2line
    
    Command:
            ./make.sh [func address]
    
    Example:
            >> ./make.sh 000000000024fb1c
    
            >> 000000000024fb1c l     F .text  000000000000004c spi_child_pre_probe
            >> /home/guest/u-boot/drivers/spi/spi-uclass.c:153
    
    Change-Id: I6f413631fad6c51a79a35d3794d636fec6beef5b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index d6a53dc066..247c40fe03 100755
--- a/make.sh
+++ b/make.sh
@@ -2,6 +2,7 @@
 set -e
 BOARD=$1
 SUBCMD=$1
+FUNCADDR=$1
 JOB=`sed -n "N;/processor/p" /proc/cpuinfo|wc -l`
 SUPPORT_LIST=`ls configs/*[r,p][x,v,k][0-9][0-9]*_defconfig`
 
@@ -10,6 +11,8 @@ SUPPORT_LIST=`ls configs/*[r,p][x,v,k][0-9][0-9]*_defconfig`
 RKBIN_TOOLS=../rkbin/tools
 
 # User's GCC toolchain and relative path
+ADDR2LINE_ARM32=arm-linux-gnueabihf-addr2line
+ADDR2LINE_ARM64=aarch64-linux-gnu-addr2line
 OBJ_ARM32=arm-linux-gnueabihf-objdump
 OBJ_ARM64=aarch64-linux-gnu-objdump
 GCC_ARM32=arm-linux-gnueabihf-
@@ -28,6 +31,7 @@ RKBIN=
 # Declare global toolchain path for CROSS_COMPILE, updated in select_toolchain()
 TOOLCHAIN_GCC=
 TOOLCHAIN_OBJDUMP=
+TOOLCHAIN_ADDR2LINE=
 
 # Declare global default output dir and cmd, update in prepare()
 OUTDIR=$2
@@ -63,6 +67,7 @@ help()
 	echo "3. Debug helper:"
 	echo "	./make.sh elf		--- dump elf file with -D(default)"
 	echo "	./make.sh elf-S		--- dump elf file with -S"
+	echo "	./make.sh <addr>	--- dump function name and code position of address"
 	echo "	./make.sh map		--- cat u-boot.map"
 	echo "	./make.sh sym		--- cat u-boot.sym"
 }
@@ -71,19 +76,22 @@ prepare()
 {
 	local absolute_path cmd dir count
 
-	# Parse output directory
+	# Parse output directory 'O=<dir>'
 	cmd=${OUTDIR%=*}
 	if [ "${cmd}" = 'O' ]; then
 		OUTDIR=${OUTDIR#*=}
 		OUTOPT=O=${OUTDIR}
 	else
 		case $BOARD in
+			# Parse from exit .config
 			''|elf*|trust|loader|uboot|map|sym)
 			count=`find -name .config | wc -l`
 			dir=`find -name .config`
+			# Good, find only one .config
 			if [ $count -eq 1 ]; then
 				dir=${dir%/*}
 				OUTDIR=${dir#*/}
+				# Set OUTOPT if not current directory
 				if [ $OUTDIR != '.' ]; then
 					OUTOPT=O=${OUTDIR}
 				fi
@@ -109,17 +117,21 @@ prepare()
 
 	# Parse help and make defconfig
 	case $BOARD in
-		#help
+		#Help
 		--help|-help|help|--h|-h)
 		help
 		exit 0
 		;;
-		#subcmd
+
+		#Subcmd
 		''|elf*|trust|loader|uboot|map|sym)
 		;;
 
 		*)
-		if [ ! -f configs/${BOARD}_defconfig ]; then
+		#Func address is valid ?
+		if [ -z $(echo ${FUNCADDR} | sed 's/[0-9,a-f,A-F]//g') ]; then
+			return
+		elif [ ! -f configs/${BOARD}_defconfig ]; then
 			echo
 			echo "Can't find: configs/${BOARD}_defconfig"
 			echo
@@ -160,6 +172,7 @@ select_toolchain()
 			absolute_path=$(cd `dirname ${TOOLCHAIN_ARM64}`; pwd)
 			TOOLCHAIN_GCC=${absolute_path}/bin/${GCC_ARM64}
 			TOOLCHAIN_OBJDUMP=${absolute_path}/bin/${OBJ_ARM64}
+			TOOLCHAIN_ADDR2LINE=${absolute_path}/bin/${ADDR2LINE_ARM64}
 		else
 			echo "Can't find toolchain: ${TOOLCHAIN_ARM64}"
 			exit 1
@@ -169,13 +182,14 @@ select_toolchain()
 			absolute_path=$(cd `dirname ${TOOLCHAIN_ARM32}`; pwd)
 			TOOLCHAIN_GCC=${absolute_path}/bin/${GCC_ARM32}
 			TOOLCHAIN_OBJDUMP=${absolute_path}/bin/${OBJ_ARM32}
+			TOOLCHAIN_ADDR2LINE=${absolute_path}/bin/${ADDR2LINE_ARM32}
 		else
 			echo "Can't find toolchain: ${TOOLCHAIN_ARM32}"
 			exit 1
 		fi
 	fi
 
-	echo "toolchain: ${TOOLCHAIN_GCC}"
+	# echo "toolchain: ${TOOLCHAIN_GCC}"
 }
 
 sub_commands()
@@ -223,6 +237,13 @@ sub_commands()
 		;;
 
 		*)
+		# Search function and code position of address
+		if [ -z $(echo ${FUNCADDR} | sed 's/[0-9,a-f,A-F]//g') ] && [ ${FUNCADDR} ]; then
+			echo
+			sed -n "/${FUNCADDR}/p" ${OUTDIR}/u-boot.sym
+			${TOOLCHAIN_ADDR2LINE} -e ${OUTDIR}/u-boot ${FUNCADDR}
+			exit 0
+		fi
 		;;
 	esac
 }

commit 4ffb5e6c045ffa9c36397aef8677a5b4b4e52176
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Wed Jun 13 18:35:13 2018 +0800

    clk: rockchip: rk3308: Modify the print format of clk
    
    Change-Id: Idb56e8c662fafe443e8f271046d8b6298b1ca5ec
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index 6d2c6818fe..93e4e7d6fb 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -1152,7 +1152,7 @@ int soc_clk_dump(void)
 		return ret;
 	}
 
-	printf("CLK:");
+	printf("CLK:\n");
 	for (i = 0; i < clk_count; i++) {
 		clk_dump = &clks_dump[i];
 		if (clk_dump->name) {
@@ -1165,18 +1165,18 @@ int soc_clk_dump(void)
 			clk_free(&clk);
 			if (i == 0) {
 				if (rate < 0)
-					printf("%10s%20s\n", clk_dump->name,
+					printf("%s %s\n", clk_dump->name,
 					       "unknown");
 				else
-					printf("%10s%20lu Hz\n", clk_dump->name,
-					       rate);
+					printf("%s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
 			} else {
 				if (rate < 0)
-					printf("%14s%20s\n", clk_dump->name,
+					printf("%s %s\n", clk_dump->name,
 					       "unknown");
 				else
-					printf("%14s%20lu Hz\n", clk_dump->name,
-					       rate);
+					printf("%s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
 			}
 		}
 	}

commit e27c054accf03ff4aba0a25d12c0e6a69d197d11
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Fri Jul 6 18:35:21 2018 +0800

    rockchip: clk: rk3308: Correct clock divisor range assertions
    
    Change-Id: I97e8b1b5c454d9cea4126a302491a63f1d57b430
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index de0f32459d..6d2c6818fe 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -313,7 +313,7 @@ static ulong rk3308_i2c_set_clk(struct clk *clk, uint hz)
 	u32 src_clk_div, con_id;
 
 	src_clk_div = DIV_ROUND_UP(priv->dpll_hz, hz);
-	assert(src_clk_div - 1 < 127);
+	assert(src_clk_div - 1 <= 127);
 
 	switch (clk->id) {
 	case SCLK_I2C0:
@@ -433,7 +433,7 @@ static ulong rk3308_saradc_set_clk(struct clk *clk, uint hz)
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz);
-	assert(src_clk_div - 1 < 2047);
+	assert(src_clk_div - 1 <= 2047);
 
 	rk_clrsetreg(&cru->clksel_con[34],
 		     CLK_SARADC_DIV_CON_MASK,
@@ -476,7 +476,7 @@ static ulong rk3308_spi_set_clk(struct clk *clk, uint hz)
 	u32 src_clk_div, con_id;
 
 	src_clk_div = DIV_ROUND_UP(priv->dpll_hz, hz);
-	assert(src_clk_div - 1 < 127);
+	assert(src_clk_div - 1 <= 127);
 
 	switch (clk->id) {
 	case SCLK_SPI0:
@@ -520,7 +520,7 @@ static ulong rk3308_pwm_set_clk(struct clk *clk, uint hz)
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(priv->dpll_hz, hz);
-	assert(src_clk_div - 1 < 127);
+	assert(src_clk_div - 1 <= 127);
 
 	rk_clrsetreg(&cru->clksel_con[29],
 		     CLK_PWM_PLL_SEL_MASK | CLK_PWM_DIV_CON_MASK,
@@ -653,7 +653,7 @@ static ulong rk3308_bus_set_clk(struct rk3308_clk_priv *priv, ulong clk_id,
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(priv->dpll_hz, hz);
-	assert(src_clk_div - 1 < 31);
+	assert(src_clk_div - 1 <= 31);
 
 	/*
 	 * select dpll as pd_bus bus clock source and
@@ -716,7 +716,7 @@ static ulong rk3308_peri_set_clk(struct rk3308_clk_priv *priv, ulong clk_id,
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(priv->dpll_hz, hz);
-	assert(src_clk_div - 1 < 31);
+	assert(src_clk_div - 1 <= 31);
 
 	/*
 	 * select dpll as pd_peri bus clock source and
@@ -775,7 +775,7 @@ static ulong rk3308_audio_set_clk(struct rk3308_clk_priv *priv, ulong clk_id,
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(priv->vpll0_hz, hz);
-	assert(src_clk_div - 1 < 31);
+	assert(src_clk_div - 1 <= 31);
 
 	/*
 	 * select vpll0 as audio bus clock source and

commit cb981eea7f8bf4140582e538792b59c1b282eef4
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Fri Jul 6 18:33:18 2018 +0800

    rockchip: clk: px30: Correct clock divisor range assertions
    
    Change-Id: Ie187ca603b47bfedaa33041ce85e78be7d4b5b23
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 87705cf542..087664a419 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -323,7 +323,7 @@ static ulong px30_i2c_set_clk(struct px30_clk_priv *priv, ulong clk_id, uint hz)
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
-	assert(src_clk_div - 1 < 127);
+	assert(src_clk_div - 1 <= 127);
 
 	switch (clk_id) {
 	case SCLK_I2C0:
@@ -382,7 +382,7 @@ static ulong px30_nandc_set_clk(struct px30_clk_priv *priv,
 	/* Select nandc source from GPLL by default */
 	/* nandc clock defaulg div 2 internal, need provide double in cru */
 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, set_rate);
-	assert(src_clk_div - 1 < 31);
+	assert(src_clk_div - 1 <= 31);
 
 	rk_clrsetreg(&cru->clksel_con[15],
 		     NANDC_CLK_SEL_MASK | NANDC_PLL_MASK |
@@ -495,7 +495,7 @@ static ulong px30_pwm_set_clk(struct px30_clk_priv *priv, ulong clk_id, uint hz)
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
-	assert(src_clk_div - 1 < 127);
+	assert(src_clk_div - 1 <= 127);
 
 	switch (clk_id) {
 	case SCLK_PWM0:
@@ -537,7 +537,7 @@ static ulong px30_saradc_set_clk(struct px30_clk_priv *priv, uint hz)
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz);
-	assert(src_clk_div - 1 < 2047);
+	assert(src_clk_div - 1 <= 2047);
 
 	rk_clrsetreg(&cru->clksel_con[55],
 		     CLK_SARADC_DIV_CON_MASK,
@@ -574,7 +574,7 @@ static ulong px30_spi_set_clk(struct px30_clk_priv *priv, ulong clk_id, uint hz)
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
-	assert(src_clk_div - 1 < 127);
+	assert(src_clk_div - 1 <= 127);
 
 	switch (clk_id) {
 	case SCLK_SPI0:
@@ -628,7 +628,7 @@ static ulong px30_vop_set_clk(struct px30_clk_priv *priv, ulong clk_id, uint hz)
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
-	assert(src_clk_div - 1 < 31);
+	assert(src_clk_div - 1 <= 31);
 
 	switch (clk_id) {
 	case ACLK_VOPB:
@@ -700,7 +700,7 @@ static ulong px30_bus_set_clk(struct px30_clk_priv *priv, ulong clk_id,
 	switch (clk_id) {
 	case ACLK_BUS_PRE:
 		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
-		assert(src_clk_div - 1 < 31);
+		assert(src_clk_div - 1 <= 31);
 		rk_clrsetreg(&cru->clksel_con[23],
 			     BUS_PLL_SEL_MASK | BUS_ACLK_DIV_MASK,
 			     BUS_PLL_SEL_GPLL << BUS_PLL_SEL_SHIFT |
@@ -708,7 +708,7 @@ static ulong px30_bus_set_clk(struct px30_clk_priv *priv, ulong clk_id,
 		break;
 	case HCLK_BUS_PRE:
 		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
-		assert(src_clk_div - 1 < 31);
+		assert(src_clk_div - 1 <= 31);
 		rk_clrsetreg(&cru->clksel_con[24],
 			     BUS_PLL_SEL_MASK | BUS_HCLK_DIV_MASK,
 			     BUS_PLL_SEL_GPLL << BUS_PLL_SEL_SHIFT |
@@ -717,7 +717,7 @@ static ulong px30_bus_set_clk(struct px30_clk_priv *priv, ulong clk_id,
 	case PCLK_BUS_PRE:
 		src_clk_div =
 			DIV_ROUND_UP(px30_bus_get_clk(priv, ACLK_BUS_PRE), hz);
-		assert(src_clk_div - 1 < 3);
+		assert(src_clk_div - 1 <= 3);
 		rk_clrsetreg(&cru->clksel_con[24],
 			     BUS_PCLK_DIV_MASK,
 			     (src_clk_div - 1) << BUS_PCLK_DIV_SHIFT);
@@ -760,7 +760,7 @@ static ulong px30_peri_set_clk(struct px30_clk_priv *priv, ulong clk_id,
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
-	assert(src_clk_div - 1 < 31);
+	assert(src_clk_div - 1 <= 31);
 
 	/*
 	 * select gpll as pd_peri bus clock source and
@@ -1219,7 +1219,7 @@ static ulong px30_pclk_pmu_set_pmuclk(struct px30_pmuclk_priv *priv, ulong hz)
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
-	assert(src_clk_div - 1 < 31);
+	assert(src_clk_div - 1 <= 31);
 
 	rk_clrsetreg(&pmucru->pmu_clksel_con[0],
 		     CLK_PMU_PCLK_DIV_MASK,

commit 6944022d144469efd258f42e8b2af7af1f76a3cc
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Mon Jul 9 14:17:56 2018 +0800

    clk: rockchip: rk3399: remove pll init
    
    use the dts node to set rate by:
    assigned-clocks = <&cru PLL_GPLL>;
    assigned-clock-rates = <800000000>;
    
    Change-Id: I2a674213509308fcd5ad27239bdf261c428d8027
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index f7683ab33b..8ece6e9578 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -50,9 +50,6 @@ struct pll_div {
 	.fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ),\
 	.postdiv1 = _postdiv1, .postdiv2 = _postdiv2, .freq = hz};
 
-static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 1, 3, 1);
-static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 1, 2, 2);
-static const struct pll_div npll_init_cfg = PLL_DIVISORS(NPLL_HZ, 1, 2, 2);
 #if !defined(CONFIG_SPL_BUILD)
 static const struct pll_div ppll_init_cfg = PLL_DIVISORS(PPLL_HZ, 2, 2, 1);
 #endif
@@ -1158,11 +1155,6 @@ static void rkclk_init(struct rk3399_cru *cru)
 	rk_clrsetreg(&cru->clksel_con[19], 0xffff, 0x033f);
 	rk_clrsetreg(&cru->clksel_con[56], 0x0003, 0x0003);
 
-	/* configure gpll cpll */
-	rkclk_set_pll(&cru->gpll_con[0], &gpll_init_cfg);
-	rkclk_set_pll(&cru->cpll_con[0], &cpll_init_cfg);
-	rkclk_set_pll(&cru->npll_con[0], &npll_init_cfg);
-
 	/* configure perihp aclk, hclk, pclk */
 	aclk_div = GPLL_HZ / PERIHP_ACLK_HZ - 1;
 	assert((aclk_div + 1) * PERIHP_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);

commit 6e4c159cf46cc2d683b6f3a058c6a225b055d40f
Author: William Wu <william.wu@rock-chips.com>
Date:   Mon Jul 9 10:59:19 2018 +0800

    usb: dwc3: get rid of debug compile error
    
    When enable debug option to compile, it will give the
    following error, this patch is used to get rid of it.
    
    error: ‘flags’ is used uninitialized in this function [-Werror=uninitialized]
    
    Change-Id: Iba4cd59ab28eb7a48490e45842541f0418239e17
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/drivers/usb/dwc3/ep0.c b/drivers/usb/dwc3/ep0.c
index e61d98046f..4f32ceb271 100644
--- a/drivers/usb/dwc3/ep0.c
+++ b/drivers/usb/dwc3/ep0.c
@@ -217,7 +217,7 @@ int dwc3_gadget_ep0_queue(struct usb_ep *ep, struct usb_request *request,
 	struct dwc3_ep			*dep = to_dwc3_ep(ep);
 	struct dwc3			*dwc = dep->dwc;
 
-	unsigned long			flags;
+	unsigned long			flags = 0;
 
 	int				ret;
 
@@ -284,7 +284,7 @@ int __dwc3_gadget_ep0_set_halt(struct usb_ep *ep, int value)
 
 int dwc3_gadget_ep0_set_halt(struct usb_ep *ep, int value)
 {
-	unsigned long			flags;
+	unsigned long			flags = 0;
 	int				ret;
 
 	spin_lock_irqsave(&dwc->lock, flags);
diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index e065c5aeb3..af71b62a5d 100644
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -594,7 +594,7 @@ static int dwc3_gadget_ep_enable(struct usb_ep *ep,
 		const struct usb_endpoint_descriptor *desc)
 {
 	struct dwc3_ep			*dep;
-	unsigned long			flags;
+	unsigned long			flags = 0;
 	int				ret;
 
 	if (!ep || !desc || desc->bDescriptorType != USB_DT_ENDPOINT) {
@@ -642,7 +642,7 @@ static int dwc3_gadget_ep_enable(struct usb_ep *ep,
 static int dwc3_gadget_ep_disable(struct usb_ep *ep)
 {
 	struct dwc3_ep			*dep;
-	unsigned long			flags;
+	unsigned long			flags = 0;
 	int				ret;
 
 	if (!ep) {
@@ -1064,7 +1064,7 @@ static int dwc3_gadget_ep_queue(struct usb_ep *ep, struct usb_request *request,
 	struct dwc3_request		*req = to_dwc3_request(request);
 	struct dwc3_ep			*dep = to_dwc3_ep(ep);
 
-	unsigned long			flags;
+	unsigned long			flags = 0;
 
 	int				ret;
 
@@ -1103,7 +1103,7 @@ static int dwc3_gadget_ep_dequeue(struct usb_ep *ep,
 	struct dwc3_ep			*dep = to_dwc3_ep(ep);
 	struct dwc3			*dwc = dep->dwc;
 
-	unsigned long			flags;
+	unsigned long			flags = 0;
 	int				ret = 0;
 
 	spin_lock_irqsave(&dwc->lock, flags);
@@ -1185,7 +1185,7 @@ static int dwc3_gadget_ep_set_halt(struct usb_ep *ep, int value)
 {
 	struct dwc3_ep			*dep = to_dwc3_ep(ep);
 
-	unsigned long			flags;
+	unsigned long			flags = 0;
 
 	int				ret;
 
@@ -1199,7 +1199,7 @@ static int dwc3_gadget_ep_set_halt(struct usb_ep *ep, int value)
 static int dwc3_gadget_ep_set_wedge(struct usb_ep *ep)
 {
 	struct dwc3_ep			*dep = to_dwc3_ep(ep);
-	unsigned long			flags;
+	unsigned long			flags = 0;
 	int				ret;
 
 	spin_lock_irqsave(&dwc->lock, flags);
@@ -1260,7 +1260,7 @@ static int dwc3_gadget_wakeup(struct usb_gadget *g)
 	struct dwc3		*dwc = gadget_to_dwc(g);
 
 	unsigned long		timeout;
-	unsigned long		flags;
+	unsigned long		flags = 0;
 
 	u32			reg;
 
@@ -1339,7 +1339,7 @@ static int dwc3_gadget_set_selfpowered(struct usb_gadget *g,
 		int is_selfpowered)
 {
 	struct dwc3		*dwc = gadget_to_dwc(g);
-	unsigned long		flags;
+	unsigned long		flags = 0;
 
 	spin_lock_irqsave(&dwc->lock, flags);
 	dwc->is_selfpowered = !!is_selfpowered;
@@ -1405,7 +1405,7 @@ static int dwc3_gadget_run_stop(struct dwc3 *dwc, int is_on, int suspend)
 static int dwc3_gadget_pullup(struct usb_gadget *g, int is_on)
 {
 	struct dwc3		*dwc = gadget_to_dwc(g);
-	unsigned long		flags;
+	unsigned long		flags = 0;
 	int			ret;
 
 	is_on = !!is_on;
@@ -1446,7 +1446,7 @@ static int dwc3_gadget_start(struct usb_gadget *g,
 {
 	struct dwc3		*dwc = gadget_to_dwc(g);
 	struct dwc3_ep		*dep;
-	unsigned long		flags;
+	unsigned long		flags = 0;
 	int			ret = 0;
 	u32			reg;
 
@@ -1545,7 +1545,7 @@ err1:
 static int dwc3_gadget_stop(struct usb_gadget *g)
 {
 	struct dwc3		*dwc = gadget_to_dwc(g);
-	unsigned long		flags;
+	unsigned long		flags = 0;
 
 	spin_lock_irqsave(&dwc->lock, flags);
 
@@ -2490,7 +2490,7 @@ static irqreturn_t dwc3_process_event_buf(struct dwc3 *dwc, u32 buf)
 static irqreturn_t dwc3_thread_interrupt(int irq, void *_dwc)
 {
 	struct dwc3 *dwc = _dwc;
-	unsigned long flags;
+	unsigned long flags = 0;
 	irqreturn_t ret = IRQ_NONE;
 	int i;
 

commit e7b5bb3cc9527752c2c01acb4325fc0721fb75aa
Author: William Wu <william.wu@rock-chips.com>
Date:   Mon Jul 9 08:55:21 2018 +0800

    rockchip: usb: dwc2: support rk3288 usb with kernel dtb
    
    Whit kernel dtb support, we need to get rk3288 dwc2 otg
    node by compatible "rockchip,rk3288_usb20_otg" rather than
    "snps,dwc2", because rk3288 dwc2 otg uses rockchip legacy
    dwc2 driver "dwc_otg_310".
    
    Change-Id: Ib7b536e554776f1dd09d34d0a2ac1754df9c753e
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index aea9dc2d64..4618b4bb4c 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -320,9 +320,21 @@ int board_usb_init(int index, enum usb_init_type init)
 		node = fdt_node_offset_by_compatible(blob, node,
 					"snps,dwc2");
 	}
+
 	if (!matched) {
-		debug("Not found usb_otg device\n");
-		return -ENODEV;
+		/*
+		 * With kernel dtb support, rk3288 dwc2 otg node
+		 * use the rockchip legacy dwc2 driver "dwc_otg_310"
+		 * with the compatible "rockchip,rk3288_usb20_otg".
+		 */
+		node = fdt_node_offset_by_compatible(blob, -1,
+				"rockchip,rk3288_usb20_otg");
+		if (node > 0) {
+			matched = true;
+		} else {
+			pr_err("Not found usb_otg device\n");
+			return -ENODEV;
+		}
 	}
 
 	reg = fdt_getprop(blob, node, "reg", NULL);
diff --git a/drivers/usb/phy/rockchip_usb2_phy.c b/drivers/usb/phy/rockchip_usb2_phy.c
index 720014a6ce..133664b380 100644
--- a/drivers/usb/phy/rockchip_usb2_phy.c
+++ b/drivers/usb/phy/rockchip_usb2_phy.c
@@ -87,8 +87,19 @@ static int otg_phy_parse(struct dwc2_udc *dev)
 	}
 
 	if (!matched) {
-		pr_err("Not found usb_otg device\n");
-		return -ENODEV;
+		/*
+		 * With kernel dtb support, rk3288 dwc2 otg node
+		 * use the rockchip legacy dwc2 driver "dwc_otg_310"
+		 * with the compatible "rockchip,rk3288_usb20_otg".
+		 */
+		node = fdt_node_offset_by_compatible(blob, -1,
+				"rockchip,rk3288_usb20_otg");
+		if (node > 0) {
+			matched = true;
+		} else {
+			pr_err("Not found usb_otg device\n");
+			return -ENODEV;
+		}
 	}
 
 	/* Find the usb phy node */

commit 00129fb35e18b7c7c58d07e31fc9451558acb1a1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jul 4 16:38:46 2018 +0800

    env: add env_update_filter()
    
    provide ignore option to filter unused key words from a
    list of new string which is ready to be appended.
    
    Change-Id: I82d61ee21ec658e73549de42ad94ed259582cb7a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/cmd/nvedit.c b/cmd/nvedit.c
index c063abfd2e..96a4fab1c7 100644
--- a/cmd/nvedit.c
+++ b/cmd/nvedit.c
@@ -401,7 +401,8 @@ static int env_replace(const char *varname, const char *substr,
 
 #define ARGS_ITEM_NUM	50
 
-int env_update(const char *varname, const char *varvalue)
+int env_update_filter(const char *varname, const char *varvalue,
+		      const char *ignore)
 {
 	/* 'a_' means "varargs_'; 'v_' means 'varvalue_' */
 	char *varargs;
@@ -421,6 +422,8 @@ int env_update(const char *varname, const char *varvalue)
 	varargs = env_get(varname);
 	if (!varargs) {
 		env_set(varname, varvalue);
+		if (ignore && strstr(varvalue, ignore))
+			env_delete(varname, ignore);
 		return 0;
 	}
 
@@ -455,6 +458,13 @@ int env_update(const char *varname, const char *varvalue)
 	v_item = strtok(v_string_tok, " ");
 	while (v_item && j < ARGS_ITEM_NUM) {
 		debug("%s: <v_item %d>: %s\n", __func__, j, v_item);
+
+		/* filter ignore string */
+		if (ignore && strstr(v_item, ignore)) {
+			v_item = strtok(NULL, " ");
+			continue;
+		}
+
 		if (strstr(v_item, "="))
 			v_items[j++] = v_item;
 		else
@@ -517,6 +527,11 @@ int env_update(const char *varname, const char *varvalue)
 	return 0;
 }
 
+int env_update(const char *varname, const char *varvalue)
+{
+	return env_update_filter(varname, varvalue, NULL);
+}
+
 int env_exist(const char *varname, const char *varvalue)
 {
 	char *value;
diff --git a/include/common.h b/include/common.h
index 8230914d7a..a53559a3e5 100644
--- a/include/common.h
+++ b/include/common.h
@@ -329,6 +329,19 @@ int env_get_yesno(const char *var);
  */
 int env_set(const char *varname, const char *value);
 
+/**
+ * env_update() - update sub value of an environment variable
+ *
+ * This add/append/replace the sub value of an environment variable.
+ *
+ * @varname: Variable to adjust
+ * @valude: Value to append/replace
+ * @ignore: Value to be ignore if in varvalue
+ * @return 0 if OK, 1 on error
+ */
+int env_update_filter(const char *varname, const char *varvalue,
+		      const char *ignore);
+
 /**
  * env_update() - update sub value of an environment variable
  *

commit c204540bc37e824ff67199d56bcc291c3c5e4347
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 9 10:40:03 2018 +0800

    regulator: rk8xx: remove REG_DCDC_UV_ACT setting
    
    no special reason to remove, just to keep the same setting
    with rkdevelop which is stable.
    
    Change-Id: I3fe810d7080e29525cdf24c4475b0acb5380a9c5
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/rk8xx.c b/drivers/power/regulator/rk8xx.c
index 5fe2fdef16..69b1515c3f 100644
--- a/drivers/power/regulator/rk8xx.c
+++ b/drivers/power/regulator/rk8xx.c
@@ -322,10 +322,6 @@ static int _buck_set_enable(struct udevice *pmic, int buck, bool enable)
 					      0, 3 << (buck * 2));
 			if (ret)
 				return ret;
-			ret = pmic_clrsetbits(pmic, REG_DCDC_UV_ACT,
-					      1 << buck, 0);
-			if (ret)
-				return ret;
 		}
 		ret = pmic_clrsetbits(pmic, REG_DCDC_EN, mask,
 				      enable ? mask : 0);

commit 537b230e8fb44493edfd55a2a0735b4475e2485e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jul 6 16:51:00 2018 +0800

    regulator: pwm: support "rockchip,pwm_voltage" init voltage
    
    1. add this property to compabile legacy pwm regulator driver
       on rkdevelop;
    2. give default init voltage 1.1v;
    
    Change-Id: I7b1f989c28d91edd6e467ae1ba94299c6d695afb
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/pwm_regulator.c b/drivers/power/regulator/pwm_regulator.c
index 6cc6efa49d..7710e7960b 100644
--- a/drivers/power/regulator/pwm_regulator.c
+++ b/drivers/power/regulator/pwm_regulator.c
@@ -105,7 +105,14 @@ static int pwm_regulator_ofdata_to_platdata(struct udevice *dev)
 
 	priv->init_voltage = dev_read_u32_default(dev, "regulator-init-microvolt", -1);
 	if (priv->init_voltage < 0) {
-		debug("Cannot find regulator pwm init_voltage\n");
+		debug("Cannot find 'regulator-init-microvolt'\n");
+
+		/*
+		 * 1. Compatible legacy pwm-regulator driver on rkdevelop;
+		 * 2. Give pwm-regulator default init voltage 1.1v;
+		 */
+		priv->init_voltage = dev_read_u32_default(dev, "rockchip,pwm_voltage",
+							  1100000);
 	}
 
 	ret = uclass_get_device_by_ofnode(UCLASS_PWM, args.node, &priv->pwm);
@@ -129,8 +136,11 @@ static int pwm_regulator_probe(struct udevice *dev)
 	priv->max_voltage = uc_pdata->max_uV;
 	priv->min_voltage = uc_pdata->min_uV;
 
-	if (priv->init_voltage)
+	if (priv->init_voltage > 0) {
+		printf("pwm-regulator(%s): init %d uV\n",
+		       dev->name, priv->init_voltage);
 		pwm_regulator_set_voltage(dev, priv->init_voltage);
+	}
 
 	return 0;
 }

commit a538876eebaf41333f49422a77885ed6f3fcac59
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 9 10:29:11 2018 +0800

    dm: regulator: print init voltage
    
    Change-Id: I266a76f43485eac8770e51787985b93992ef0668
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/regulator-uclass.c b/drivers/power/regulator/regulator-uclass.c
index 4f50945f2f..145e7a5572 100644
--- a/drivers/power/regulator/regulator-uclass.c
+++ b/drivers/power/regulator/regulator-uclass.c
@@ -249,8 +249,13 @@ int regulator_autoset(struct udevice *dev)
 
 	if (uc_pdata->flags & REGULATOR_FLAG_AUTOSET_UV)
 		ret = regulator_set_value(dev, uc_pdata->min_uV);
-	if (uc_pdata->init_uV > 0)
+	if (uc_pdata->init_uV > 0) {
 		ret = regulator_set_value(dev, uc_pdata->init_uV);
+		if (!ret)
+			printf("regulator(%s) init %d uV\n",
+			       dev->name, uc_pdata->init_uV);
+	}
+
 	if (!ret && (uc_pdata->flags & REGULATOR_FLAG_AUTOSET_UA))
 		ret = regulator_set_current(dev, uc_pdata->min_uA);
 

commit fe9a00a2067c67e587f4db6cb05f3220e89c31d0
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Wed Jul 4 18:07:34 2018 +0800

    drivers: rknand: zftl fix 2cs 3d mlc nand gc fail issue
    
    bug:
    1ppa = 2212a00, status = 0, 2d1db 2bc05 spare: 3a20ea 2d1dc 22bc05 0
    1ppa = 2212a00, status = 1, 3b8ef 25fe52 spare: 3a6bfa 3c5d6 5fe53 2
    1ppa = 2212a00, status = 0, 2d1db 2bc05 spare: 3a20ea 2d1dc 22bc05 0
    1ppa = 2212a00, status = 1, 3b8ef 25fe52 spare: 3a6bfa 3c5d6 5fe53 2
    
    Change-Id: I30c0789a8629ec76ab126b1ac7a49fe6bf7ff061
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/drivers/rknand/rk_zftl_arm_v8.S b/drivers/rknand/rk_zftl_arm_v8.S
index b85cec9848..6cf6fd60b1 100644
--- a/drivers/rknand/rk_zftl_arm_v8.S
+++ b/drivers/rknand/rk_zftl_arm_v8.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2018-06-15
+ * date: 2018-07-04
  */
 	.arch armv8-a
 	.file	"rk_zftl_arm_v8.S"
@@ -3288,7 +3288,7 @@ gc_write_completed:
 	bl	printf
 	adrp	x1, .LANCHOR67
 	adrp	x0, .LC0
-	mov	w2, 539
+	mov	w2, 544
 	add	x1, x1, :lo12:.LANCHOR67
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -3327,7 +3327,7 @@ gc_write_completed:
 	beq	.L614
 	adrp	x1, .LANCHOR67
 	adrp	x0, .LC0
-	mov	w2, 546
+	mov	w2, 551
 	add	x1, x1, :lo12:.LANCHOR67
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -4905,7 +4905,7 @@ gc_free_src_blk:
 .L872:
 	adrp	x1, .LANCHOR103
 	adrp	x0, .LC0
-	mov	w2, 793
+	mov	w2, 798
 	add	x1, x1, :lo12:.LANCHOR103
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -7544,10 +7544,9 @@ gc_static_wearleveling:
 	cmp	w2, w0
 	ble	.L1254
 	ldr	w0, [x4, x3]
-	add	w2, w21, 2
 	ubfx	x0, x0, 11, 8
-	cmp	w0, w2
-	ble	.L1255
+	cmp	w0, w21
+	bls	.L1255
 	cbz	w1, .L1254
 	ldrh	w0, [x4, x3]
 	and	w0, w0, 2047
@@ -7605,13 +7604,13 @@ gc_static_wearleveling:
 	cmp	w0, w2
 	ble	.L1254
 	ldrh	w0, [x4, x3]
-	add	w2, w20, 2
+	add	w2, w20, 8
 	and	w0, w0, 2047
 	cmp	w0, w2
 	ble	.L1256
 	cbz	w1, .L1254
 	ldr	w0, [x4, x3]
-	add	w1, w21, 2
+	add	w1, w21, 4
 	ubfx	x0, x0, 11, 8
 	cmp	w0, w1
 	bgt	.L1254
@@ -11776,154 +11775,6 @@ sblk_read_page:
 	bl	queue_remove_completed_req
 	b	.L2017
 	.size	sblk_read_page, .-sblk_read_page
-	.section	.text.gc_check_data_one_wl,"ax",@progbits
-	.align	2
-	.global	gc_check_data_one_wl
-	.type	gc_check_data_one_wl, %function
-gc_check_data_one_wl:
-	sub	sp, sp, #112
-	adrp	x0, .LANCHOR10
-	stp	x29, x30, [sp, 16]
-	add	x29, sp, 16
-	stp	x19, x20, [sp, 32]
-	adrp	x19, .LANCHOR62
-	add	x20, x19, :lo12:.LANCHOR62
-	stp	x21, x22, [sp, 48]
-	ldr	x21, [x0, #:lo12:.LANCHOR10]
-	stp	x23, x24, [sp, 64]
-	ldr	x0, [x20, 8]
-	stp	x25, x26, [sp, 80]
-	str	x27, [sp, 96]
-	cbnz	x0, .L2032
-	mov	w0, 1
-	bl	buf_alloc
-	str	x0, [x20, 8]
-.L2032:
-	add	x0, x19, :lo12:.LANCHOR62
-	ldr	x20, [x0, 8]
-	cbnz	x20, .L2033
-	adrp	x1, .LANCHOR167
-	adrp	x0, .LC0
-	mov	w2, 366
-	add	x1, x1, :lo12:.LANCHOR167
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2033:
-	adrp	x26, .LANCHOR105
-	adrp	x27, .LANCHOR68
-	add	x25, x21, 96
-	add	x26, x26, :lo12:.LANCHOR105
-	add	x27, x27, :lo12:.LANCHOR68
-	mov	w24, 0
-.L2034:
-	ldrb	w0, [x21, 89]
-	cmp	w24, w0
-	bge	.L2043
-	mov	w23, 1
-	add	x22, x19, :lo12:.LANCHOR62
-	b	.L2044
-.L2042:
-	ldrh	w0, [x25]
-	ldrh	w1, [x26]
-	ldrb	w2, [x27]
-	cmp	w2, 3
-	mul	w1, w0, w1
-	ldrh	w0, [x22, 16]
-	bne	.L2035
-	add	w0, w0, w1
-	orr	w0, w0, w23, lsl 24
-.L2055:
-	str	w0, [x20, 40]
-	mov	w1, 1
-	mov	x0, x20
-	bl	sblk_read_page
-	ldr	w2, [x20, 52]
-	adrp	x1, .LANCHOR147
-	cmn	w2, #1
-	beq	.L2038
-	ldrh	w0, [x22, 22]
-	ldr	x4, [x1, #:lo12:.LANCHOR147]
-	ldr	x3, [x20, 24]
-	lsl	x0, x0, 2
-	ldr	w5, [x4, x0]
-	ldr	w4, [x3, 4]
-	cmp	w5, w4
-	bne	.L2038
-	adrp	x4, .LANCHOR148
-	ldr	x4, [x4, #:lo12:.LANCHOR148]
-	ldr	w4, [x4, x0]
-	ldr	w0, [x3, 8]
-	cmp	w4, w0
-	beq	.L2039
-.L2038:
-	ldrh	w0, [x22, 22]
-	ldr	x1, [x1, #:lo12:.LANCHOR147]
-	lsl	x0, x0, 2
-	ldr	w3, [x1, x0]
-	cmn	w3, #1
-	beq	.L2039
-	adrp	x1, .LANCHOR14
-	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 10, .L2040
-	ldr	x1, [x20, 24]
-	adrp	x4, .LANCHOR148
-	ldr	x4, [x4, #:lo12:.LANCHOR148]
-	ldr	w5, [x1, 12]
-	str	w5, [sp]
-	ldr	w4, [x4, x0]
-	adrp	x0, .LC120
-	ldp	w5, w6, [x1]
-	add	x0, x0, :lo12:.LC120
-	ldr	w7, [x1, 8]
-	ldr	w1, [x20, 40]
-	bl	printf
-.L2040:
-	adrp	x0, .LANCHOR9
-	ldrh	w1, [x21, 80]
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
-	strh	wzr, [x0, x1, lsl 1]
-	mov	w0, -1
-.L2031:
-	ldp	x19, x20, [sp, 32]
-	ldp	x21, x22, [sp, 48]
-	ldp	x23, x24, [sp, 64]
-	ldp	x25, x26, [sp, 80]
-	ldp	x29, x30, [sp, 16]
-	ldr	x27, [sp, 96]
-	add	sp, sp, 112
-	ret
-.L2035:
-	cmp	w2, 2
-	bne	.L2037
-	sub	w0, w0, #1
-	add	w1, w23, w1
-	add	w0, w0, w1
-	orr	w0, w0, 33554432
-	b	.L2055
-.L2037:
-	add	w0, w0, w1
-	b	.L2055
-.L2039:
-	ldrh	w0, [x22, 22]
-	add	w23, w23, 1
-	add	w0, w0, 1
-	strh	w0, [x22, 22]
-.L2044:
-	ldrh	w0, [x22, 20]
-	cmp	w23, w0
-	ble	.L2042
-	add	w24, w24, 1
-	add	x25, x25, 2
-	b	.L2034
-.L2043:
-.L2041:
-	add	x19, x19, :lo12:.LANCHOR62
-	ldrh	w0, [x19, 16]
-	add	w0, w0, 1
-	strh	w0, [x19, 16]
-	mov	w0, 0
-	b	.L2031
-	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
 	.section	.text.flash_prog_page,"ax",@progbits
 	.align	2
 	.global	flash_prog_page
@@ -11949,22 +11800,22 @@ flash_prog_page:
 	add	x23, x25, x23, lsl 8
 	and	w24, w1, 2097151
 	ubfx	x28, x21, 24, 2
-	tbz	x0, 4, .L2057
-	adrp	x0, .LC121
+	tbz	x0, 4, .L2032
+	adrp	x0, .LC120
 	mov	w3, w4
 	mov	w2, w28
-	add	x0, x0, :lo12:.LC121
+	add	x0, x0, :lo12:.LC120
 	bl	printf
-.L2057:
+.L2032:
 	bl	nandc_wait_flash_ready
 	mov	w0, w20
 	bl	hynix_reconfig_rr_para
 	mov	w0, w20
 	bl	nandc_cs
 	mov	w0, w20
-	cbnz	w28, .L2058
+	cbnz	w28, .L2033
 	bl	zftl_flash_enter_slc_mode
-.L2059:
+.L2034:
 	add	x19, x25, x19, lsl 8
 	mov	w0, 128
 	str	w0, [x19, 2056]
@@ -11993,15 +11844,15 @@ flash_prog_page:
 	mov	w2, w0
 	bl	nandc_de_cs.constprop.29
 	and	w19, w2, 4
-	tbz	x2, 2, .L2056
+	tbz	x2, 2, .L2031
 	ldr	w0, [x22, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2056
-	adrp	x0, .LC122
+	tbz	x0, 12, .L2031
+	adrp	x0, .LC121
 	mov	w2, w19
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC122
+	add	x0, x0, :lo12:.LC121
 	bl	printf
-.L2056:
+.L2031:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -12010,9 +11861,9 @@ flash_prog_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2058:
+.L2033:
 	bl	zftl_flash_exit_slc_mode
-	b	.L2059
+	b	.L2034
 	.size	flash_prog_page, .-flash_prog_page
 	.section	.text.flash_test_blk,"ax",@progbits
 	.align	2
@@ -12026,12 +11877,12 @@ flash_test_blk:
 	stp	x21, x22, [sp, 32]
 	ands	w21, w0, 255
 	str	x23, [sp, 48]
-	bne	.L2072
-	adrp	x0, .LANCHOR168
-	ldrb	w0, [x0, #:lo12:.LANCHOR168]
+	bne	.L2047
+	adrp	x0, .LANCHOR167
+	ldrb	w0, [x0, #:lo12:.LANCHOR167]
 	cmp	w0, w19
-	bhi	.L2076
-.L2072:
+	bhi	.L2051
+.L2047:
 	adrp	x22, .LANCHOR160
 	adrp	x23, .LANCHOR161
 	mov	w2, 32
@@ -12049,7 +11900,7 @@ flash_test_blk:
 	mov	w1, w20
 	bl	flash_erase_block
 	cmn	w0, #1
-	beq	.L2074
+	beq	.L2049
 	adrp	x19, .LANCHOR34
 	add	x19, x19, :lo12:.LANCHOR34
 	ldr	x3, [x22, #:lo12:.LANCHOR160]
@@ -12059,7 +11910,7 @@ flash_test_blk:
 	ldrb	w4, [x19, 9]
 	bl	flash_prog_page
 	cmn	w0, #1
-	beq	.L2074
+	beq	.L2049
 	ldrb	w4, [x19, 9]
 	mov	w1, w20
 	ldr	x3, [x22, #:lo12:.LANCHOR160]
@@ -12068,35 +11919,35 @@ flash_test_blk:
 	bl	flash_read_page
 	mov	w19, w0
 	cmn	w0, #1
-	beq	.L2074
+	beq	.L2049
 	ldr	x0, [x23, #:lo12:.LANCHOR161]
 	ldr	w1, [x0]
 	mov	w0, 23130
 	movk	w0, 0x5a5a, lsl 16
 	cmp	w1, w0
-	bne	.L2074
+	bne	.L2049
 	ldr	x0, [x22, #:lo12:.LANCHOR160]
 	ldr	w1, [x0]
 	mov	w0, 42405
 	movk	w0, 0xa5a5, lsl 16
 	cmp	w1, w0
-	beq	.L2075
-.L2074:
+	beq	.L2050
+.L2049:
 	mov	w19, -1
-.L2075:
+.L2050:
 	mov	w1, w20
 	mov	w0, w21
 	bl	flash_erase_block
 	mov	w0, w19
-.L2071:
+.L2046:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2076:
+.L2051:
 	mov	w0, 0
-	b	.L2071
+	b	.L2046
 	.size	flash_test_blk, .-flash_test_blk
 	.section	.text.id_block_prog_msb_ff_data,"ax",@progbits
 	.align	2
@@ -12107,45 +11958,45 @@ id_block_prog_msb_ff_data:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	and	w22, w0, 255
-	adrp	x0, .LANCHOR169
+	adrp	x0, .LANCHOR168
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
-	ldrb	w0, [x0, #:lo12:.LANCHOR169]
+	ldrb	w0, [x0, #:lo12:.LANCHOR168]
 	str	x25, [sp, 64]
-	cbnz	w0, .L2087
+	cbnz	w0, .L2062
 	adrp	x20, .LANCHOR34
 	add	x20, x20, :lo12:.LANCHOR34
 	ldrb	w0, [x20, 19]
 	sub	w0, w0, #5
 	and	w3, w0, 255
 	cmp	w3, 63
-	bhi	.L2087
+	bhi	.L2062
 	and	w19, w2, 65535
 	mov	x2, 16391
 	movk	x2, 0x4000, lsl 16
 	movk	x2, 0x8000, lsl 48
 	lsr	x0, x2, x3
-	tbz	x0, 0, .L2087
+	tbz	x0, 0, .L2062
 	adrp	x21, .LANCHOR133
 	mov	w23, w1
 	add	x21, x21, :lo12:.LANCHOR133
 	mov	w25, 65535
 	adrp	x24, .LANCHOR151
-.L2089:
+.L2064:
 	ldrh	w0, [x20, 10]
 	cmp	w0, w19
-	bhi	.L2090
-.L2087:
+	bhi	.L2065
+.L2062:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2090:
+.L2065:
 	ldrh	w0, [x21, w19, sxtw 1]
 	cmp	w0, w25
-	bne	.L2087
+	bne	.L2062
 	ldr	x0, [x24, #:lo12:.LANCHOR151]
 	mov	w2, 16384
 	mov	w1, 255
@@ -12158,7 +12009,7 @@ id_block_prog_msb_ff_data:
 	mov	w0, w22
 	and	w19, w19, 65535
 	bl	flash_prog_page
-	b	.L2089
+	b	.L2064
 	.size	id_block_prog_msb_ff_data, .-id_block_prog_msb_ff_data
 	.section	.text.idb_write_data,"ax",@progbits
 	.align	2
@@ -12175,16 +12026,16 @@ idb_write_data:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	bls	.L2093
+	bls	.L2068
 	cmp	w1, 575
-	bhi	.L2094
-	adrp	x0, .LANCHOR170
+	bhi	.L2069
+	adrp	x0, .LANCHOR169
 	mov	x1, x2
 	mov	w2, 1
 	cmp	w4, 64
-	str	w2, [x0, #:lo12:.LANCHOR170]
+	str	w2, [x0, #:lo12:.LANCHOR169]
 	adrp	x0, idb_buf
-	bhi	.L2095
+	bhi	.L2070
 	mov	w2, 64
 	sub	w4, w2, w4
 	sub	w2, w3, w4
@@ -12192,9 +12043,9 @@ idb_write_data:
 	lsl	w2, w2, 9
 	add	x1, x1, x4
 	add	x0, x0, :lo12:idb_buf
-.L2171:
+.L2146:
 	bl	ftl_memcpy
-.L2150:
+.L2125:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -12203,7 +12054,7 @@ idb_write_data:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 256
 	ret
-.L2095:
+.L2070:
 	mov	w2, 576
 	sub	w2, w2, w4
 	cmp	w3, w2
@@ -12213,14 +12064,14 @@ idb_write_data:
 	add	x0, x0, :lo12:idb_buf
 	lsl	w2, w2, 9
 	add	x0, x0, x4
-	b	.L2171
-.L2093:
+	b	.L2146
+.L2068:
 	cmp	w1, 575
-	bls	.L2150
-.L2094:
-	adrp	x0, .LANCHOR170
-	ldr	w0, [x0, #:lo12:.LANCHOR170]
-	cbz	w0, .L2150
+	bls	.L2125
+.L2069:
+	adrp	x0, .LANCHOR169
+	ldr	w0, [x0, #:lo12:.LANCHOR169]
+	cbz	w0, .L2125
 	adrp	x3, .LANCHOR34
 	add	x1, x3, :lo12:.LANCHOR34
 	str	x3, [x29, 176]
@@ -12242,9 +12093,9 @@ idb_write_data:
 	cmp	w27, 512
 	csel	w27, w27, w0, lt
 	mov	w0, 0
-.L2100:
+.L2075:
 	ldr	w5, [x1]
-	cbnz	w5, .L2098
+	cbnz	w5, .L2073
 	ldr	w5, [x6, w0, uxtw 2]
 	add	w0, w0, 1
 	str	w5, [x1], -4
@@ -12252,19 +12103,19 @@ idb_write_data:
 	sub	w2, w2, #1
 	csel	w0, w0, wzr, cc
 	cmp	w2, 4096
-	bne	.L2100
-.L2098:
+	bne	.L2075
+.L2073:
 	add	x0, x3, :lo12:idb_buf
 	mov	w3, w27
 	ldr	w1, [x0, w2, uxtw 2]
-	adrp	x0, .LC123
-	add	x0, x0, :lo12:.LC123
+	adrp	x0, .LC122
+	add	x0, x0, :lo12:.LC122
 	bl	printf
 	stp	wzr, wzr, [x29, 168]
 	adrp	x0, gp_flash_check_buf
 	add	x0, x0, :lo12:gp_flash_check_buf
 	str	x0, [x29, 184]
-.L2134:
+.L2109:
 	adrp	x0, gp_flash_check_buf
 	add	x20, x0, :lo12:gp_flash_check_buf
 	mov	w1, 0
@@ -12277,7 +12128,7 @@ idb_write_data:
 	add	x0, x0, x1, uxtw
 	ldrb	w0, [x0, 32]
 	cmp	w0, 255
-	beq	.L2101
+	beq	.L2076
 	ldr	w1, [x29, 132]
 	adrp	x19, .LANCHOR45
 	mul	w26, w0, w1
@@ -12297,11 +12148,11 @@ idb_write_data:
 	msub	w23, w23, w22, w26
 	sub	w24, w26, w23
 	cmp	w26, w24
-	bne	.L2140
+	bne	.L2115
 	adrp	x0, .LANCHOR27
 	ldrb	w0, [x0, #:lo12:.LANCHOR27]
 	cmp	w0, 9
-	bne	.L2140
+	bne	.L2115
 	mov	w2, 1024
 	mov	w1, 0
 	mov	x0, x20
@@ -12337,19 +12188,19 @@ idb_write_data:
 	str	w0, [x1, 8]
 	sub	w0, w27, #4
 	str	w0, [x29, 164]
-.L2102:
+.L2077:
 	adrp	x22, idb_buf
-	adrp	x28, .LANCHOR169
+	adrp	x28, .LANCHOR168
 	add	x22, x22, :lo12:idb_buf
-	add	x0, x28, :lo12:.LANCHOR169
+	add	x0, x28, :lo12:.LANCHOR168
 	adrp	x25, .LANCHOR3
 	str	x0, [x29, 152]
 	mov	w20, 0
 	add	x0, x25, :lo12:.LANCHOR3
 	str	x0, [x29, 144]
-.L2104:
+.L2079:
 	cmp	w27, w20
-	bhi	.L2115
+	bhi	.L2090
 	ldr	x0, [x29, 176]
 	add	x25, x19, :lo12:.LANCHOR45
 	strb	wzr, [x19, #:lo12:.LANCHOR45]
@@ -12375,10 +12226,10 @@ idb_write_data:
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
 	str	x0, [x29, 104]
-.L2116:
+.L2091:
 	ldr	w0, [x29, 160]
 	cmp	w22, w0
-	bcc	.L2130
+	bcc	.L2105
 	adrp	x0, .LANCHOR45
 	ldrb	w1, [x29, 128]
 	adrp	x3, idb_buf
@@ -12387,21 +12238,21 @@ idb_write_data:
 	mov	x1, 0
 	ldr	w0, [x29, 164]
 	lsl	w0, w0, 7
-.L2131:
+.L2106:
 	mov	w19, w1
 	cmp	w1, w0
-	bcc	.L2132
+	bcc	.L2107
 	ldr	w0, [x29, 168]
 	add	w0, w0, 1
 	str	w0, [x29, 168]
 	cmp	w0, 5
-	bls	.L2101
-	b	.L2136
-.L2140:
+	bls	.L2076
+	b	.L2111
+.L2115:
 	mov	x6, 0
 	str	w27, [x29, 164]
-	b	.L2102
-.L2115:
+	b	.L2077
+.L2090:
 	ldr	x2, [x29, 152]
 	add	w5, w23, w20
 	lsr	w5, w5, 2
@@ -12409,30 +12260,30 @@ idb_write_data:
 	add	w1, w5, 1
 	ldrb	w2, [x2]
 	ldrh	w0, [x0, w1, sxtw 1]
-	cbz	w2, .L2106
+	cbz	w2, .L2081
 	adrp	x0, .LANCHOR1
 	ldrb	w3, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w1, 1
 	cmp	w3, 0
 	csel	w0, w0, w1, ne
-.L2106:
+.L2081:
 	adrp	x1, .LANCHOR27
 	ldrb	w1, [x1, #:lo12:.LANCHOR27]
 	cmp	w1, 9
-	bne	.L2108
-.L2169:
+	bne	.L2083
+.L2144:
 	str	w0, [x29, 192]
 	mov	w0, 61424
 	str	w0, [x29, 196]
 	ldr	x0, [x29, 144]
 	ldrh	w0, [x0, w5, sxtw 1]
-	cbnz	w2, .L2110
+	cbnz	w2, .L2085
 	mov	w5, w0
-.L2111:
+.L2086:
 	mul	w1, w21, w5
 	adrp	x2, .LANCHOR43
 	adrp	x0, .LANCHOR17
-	cbnz	x6, .L2112
+	cbnz	x6, .L2087
 	ldr	x3, [x29, 176]
 	add	w1, w1, w24
 	ldrb	w7, [x2, #:lo12:.LANCHOR43]
@@ -12452,31 +12303,31 @@ idb_write_data:
 	ldr	w7, [x29, 160]
 	mov	w0, w7
 	bl	nandc_bch_sel
-	ldrb	w0, [x28, #:lo12:.LANCHOR169]
+	ldrb	w0, [x28, #:lo12:.LANCHOR168]
 	ldr	w5, [x29, 140]
-	cbnz	w0, .L2113
+	cbnz	w0, .L2088
 	udiv	w1, w24, w21
 	add	w2, w5, 1
 	bl	id_block_prog_msb_ff_data
-.L2113:
+.L2088:
 	add	x22, x22, 2048
-.L2114:
+.L2089:
 	add	w20, w20, 4
 	mov	x6, 0
 	and	w20, w20, 65535
-	b	.L2104
-.L2108:
+	b	.L2079
+.L2083:
 	sub	w0, w0, #1
 	lsl	w0, w0, 2
-	b	.L2169
-.L2110:
+	b	.L2144
+.L2085:
 	adrp	x0, .LANCHOR1
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w5, 1
 	cmp	w1, 0
 	csel	w5, w0, w5, ne
-	b	.L2111
-.L2112:
+	b	.L2086
+.L2087:
 	ldr	x3, [x29, 176]
 	add	w1, w1, w24
 	ldrb	w7, [x2, #:lo12:.LANCHOR43]
@@ -12495,21 +12346,21 @@ idb_write_data:
 	ldr	w7, [x29, 160]
 	mov	w0, w7
 	bl	nandc_bch_sel
-	b	.L2114
-.L2130:
+	b	.L2089
+.L2105:
 	add	w19, w28, w22
 	ldr	w0, [x29, 152]
-	adrp	x1, .LANCHOR169
+	adrp	x1, .LANCHOR168
 	sub	w24, w21, w0
 	ldr	x0, [x29, 104]
 	udiv	w19, w19, w21
-	ldrb	w1, [x1, #:lo12:.LANCHOR169]
+	ldrb	w1, [x1, #:lo12:.LANCHOR168]
 	and	w24, w24, 65535
 	and	w19, w19, 65535
 	ldrh	w0, [x0, w19, sxtw 1]
-	cbnz	w1, .L2117
+	cbnz	w1, .L2092
 	mov	w19, w0
-.L2118:
+.L2093:
 	adrp	x0, .LANCHOR17
 	ldr	w1, [x29, 136]
 	ldrb	w23, [x0, #:lo12:.LANCHOR17]
@@ -12529,7 +12380,7 @@ idb_write_data:
 	adrp	x0, .LANCHOR20
 	add	x0, x0, :lo12:.LANCHOR20
 	str	x0, [x29, 112]
-.L2119:
+.L2094:
 	mov	w4, w21
 	add	x3, x29, 192
 	mov	x2, x20
@@ -12538,32 +12389,32 @@ idb_write_data:
 	bl	flash_read_page
 	mov	w5, w0
 	cmn	w0, #1
-	bne	.L2120
+	bne	.L2095
 	ldrb	w6, [x25]
-	cbnz	w6, .L2121
-.L2124:
+	cbnz	w6, .L2096
+.L2099:
 	adrp	x0, .LANCHOR156
 	ldr	x6, [x0, #:lo12:.LANCHOR156]
-	cbnz	x6, .L2122
-.L2123:
+	cbnz	x6, .L2097
+.L2098:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
-	cbz	w0, .L2120
+	cbz	w0, .L2095
 	mov	w4, w21
 	add	x3, x29, 192
 	mov	x2, x20
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_ddr_tuning_read
-	b	.L2170
-.L2117:
+	b	.L2145
+.L2092:
 	adrp	x0, .LANCHOR1
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w19, 1
 	cmp	w1, 0
 	csel	w19, w0, w19, ne
-	b	.L2118
-.L2121:
+	b	.L2093
+.L2096:
 	str	w6, [x29, 100]
 	mov	w4, w21
 	str	w5, [x29, 120]
@@ -12577,21 +12428,21 @@ idb_write_data:
 	ldr	w6, [x29, 100]
 	strb	w6, [x25]
 	ldr	w5, [x29, 120]
-	beq	.L2124
-.L2170:
+	beq	.L2099
+.L2145:
 	mov	w5, w0
-.L2120:
+.L2095:
 	cmn	w5, #1
 	cset	w3, eq
 	cmp	w23, 16
 	cset	w0, ne
 	tst	w3, w0
-	beq	.L2126
+	beq	.L2101
 	mov	w0, 16
 	mov	w23, 16
 	bl	nandc_bch_sel
-	b	.L2119
-.L2122:
+	b	.L2094
+.L2097:
 	str	w5, [x29, 120]
 	mov	w4, w21
 	add	x3, x29, 192
@@ -12601,9 +12452,9 @@ idb_write_data:
 	blr	x6
 	cmn	w0, #1
 	ldr	w5, [x29, 120]
-	beq	.L2123
-	b	.L2170
-.L2126:
+	beq	.L2098
+	b	.L2145
+.L2101:
 	ldr	w0, [x29, 124]
 	bl	nandc_bch_sel
 	cmp	w3, 0
@@ -12613,62 +12464,62 @@ idb_write_data:
 	ldr	w0, [x29, 136]
 	cmp	w22, 0
 	ccmp	w26, w0, 0, eq
-	bne	.L2128
+	bne	.L2103
 	ldr	w0, [x29, 144]
-	cbnz	w0, .L2128
+	cbnz	w0, .L2103
 	ldr	w1, [x20]
 	mov	w0, 18766
 	movk	w0, 0x464e, lsl 16
 	cmp	w1, w0
-	bne	.L2128
+	bne	.L2103
 	ldr	w0, [x29, 160]
 	ldrb	w21, [x20, 17]
 	add	w0, w0, w24
 	str	w0, [x29, 160]
-.L2129:
+.L2104:
 	add	w22, w24, w22
 	and	w22, w22, 65535
-	b	.L2116
-.L2128:
+	b	.L2091
+.L2103:
 	ubfiz	x0, x24, 9, 16
 	str	wzr, [x29, 152]
 	add	x20, x20, x0
-	b	.L2129
-.L2132:
+	b	.L2104
+.L2107:
 	ldr	x4, [x29, 184]
 	lsl	x2, x1, 2
 	add	x1, x1, 1
 	ldr	w4, [x2, x4]
 	ldr	w2, [x3, x2]
 	cmp	w4, w2
-	beq	.L2131
+	beq	.L2106
 	ldr	x0, [x29, 184]
 	mov	w2, 512
 	mov	w1, 0
 	bl	ftl_memset
 	mov	w1, w19
-	adrp	x0, .LC124
-	add	x0, x0, :lo12:.LC124
+	adrp	x0, .LC123
+	add	x0, x0, :lo12:.LC123
 	bl	printf
 	mov	w1, w26
 	mov	w0, 0
 	bl	flash_erase_block
-.L2101:
+.L2076:
 	ldr	w0, [x29, 172]
 	add	w0, w0, 1
 	str	w0, [x29, 172]
 	cmp	w0, 4
-	bne	.L2134
+	bne	.L2109
 	ldr	w0, [x29, 168]
-	cbnz	w0, .L2136
-	adrp	x0, .LC125
+	cbnz	w0, .L2111
+	adrp	x0, .LC124
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC125
+	add	x0, x0, :lo12:.LC124
 	bl	printf
-.L2136:
-	adrp	x0, .LANCHOR170
-	str	wzr, [x0, #:lo12:.LANCHOR170]
-	b	.L2150
+.L2111:
+	adrp	x0, .LANCHOR169
+	str	wzr, [x0, #:lo12:.LANCHOR169]
+	b	.L2125
 	.size	idb_write_data, .-idb_write_data
 	.section	.text.flash_start_tlc_page_prog,"ax",@progbits
 	.align	2
@@ -12691,14 +12542,14 @@ flash_start_tlc_page_prog:
 	mov	x23, x5
 	mov	x24, x6
 	cmp	w0, w19
-	bhi	.L2173
-	adrp	x1, .LANCHOR171
+	bhi	.L2148
+	adrp	x1, .LANCHOR170
 	adrp	x0, .LC0
 	mov	w2, 648
-	add	x1, x1, :lo12:.LANCHOR171
+	add	x1, x1, :lo12:.LANCHOR170
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2173:
+.L2148:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w4, [x0, w19, sxtw]
@@ -12706,12 +12557,12 @@ flash_start_tlc_page_prog:
 	ldr	x19, [x0, #:lo12:.LANCHOR13]
 	mov	w0, w4
 	bl	nandc_cs
-	cbz	w25, .L2174
+	cbz	w25, .L2149
 	sxtw	x0, w4
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 8
 	str	w25, [x0, 8]
-.L2174:
+.L2149:
 	ubfiz	x4, x4, 8, 8
 	mov	w0, 128
 	add	x19, x19, x4
@@ -12811,21 +12662,21 @@ sblk_tlc_prog_one_page:
 	mov	x19, x0
 	ldr	x0, [x0]
 	ldr	w20, [x0, 40]
-.L2182:
+.L2157:
 	mov	w1, 1
 	mov	w0, w20
 	bl	queue_lun_state
-	cbnz	w0, .L2183
+	cbnz	w0, .L2158
 	mov	x0, x19
 	bl	queue_tlc_prog_cmd
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2183:
+.L2158:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2182
+	b	.L2157
 	.size	sblk_tlc_prog_one_page, .-sblk_tlc_prog_one_page
 	.section	.text.sblk_xlc_prog_pages,"ax",@progbits
 	.align	2
@@ -12842,13 +12693,13 @@ sblk_xlc_prog_pages:
 	stp	x23, x24, [sp, 48]
 	mov	w24, w2
 	ldr	w20, [x0, 40]
-.L2186:
+.L2161:
 	mov	w1, 1
 	mov	w0, w20
 	bl	queue_lun_state
-	cbnz	w0, .L2187
+	cbnz	w0, .L2162
 	cmp	w24, 2
-	bne	.L2188
+	bne	.L2163
 	ldr	x0, [x19]
 	mov	w2, 17
 	ldr	x1, [x22]
@@ -12928,21 +12779,21 @@ sblk_xlc_prog_pages:
 	adrp	x0, .LANCHOR53
 	add	x0, x0, :lo12:.LANCHOR53
 	bl	buf_add_tail
-.L2189:
+.L2164:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2187:
+.L2162:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2186
-.L2188:
+	b	.L2161
+.L2163:
 	mov	x0, x19
 	bl	queue_tlc_prog_cmd
-	b	.L2189
+	b	.L2164
 	.size	sblk_xlc_prog_pages, .-sblk_xlc_prog_pages
 	.section	.text.flash_start_page_prog,"ax",@progbits
 	.align	2
@@ -12965,40 +12816,40 @@ flash_start_page_prog:
 	ubfx	x27, x1, 21, 3
 	ubfx	x22, x1, 24, 2
 	cmp	w0, w27
-	bhi	.L2192
-	adrp	x1, .LANCHOR172
+	bhi	.L2167
+	adrp	x1, .LANCHOR171
 	adrp	x0, .LC0
 	mov	w2, 699
-	add	x1, x1, :lo12:.LANCHOR172
+	add	x1, x1, :lo12:.LANCHOR171
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2192:
+.L2167:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w21, [x0, w27, sxtw]
 	adrp	x0, .LANCHOR13
 	ldr	x19, [x0, #:lo12:.LANCHOR13]
 	bl	nandc_rdy_status
-	cbnz	w0, .L2193
+	cbnz	w0, .L2168
 	ldrb	w0, [x23, #:lo12:.LANCHOR18]
 	cmp	w0, 1
-	bne	.L2194
+	bne	.L2169
 	bl	nandc_wait_flash_ready
-.L2193:
+.L2168:
 	mov	w0, w21
 	bl	hynix_reconfig_rr_para
 	mov	w0, w21
 	bl	nandc_cs
-	cbnz	w22, .L2195
+	cbnz	w22, .L2170
 	mov	w0, w20
 	bl	slc_phy_page_address_calc
 	mov	w20, w0
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L2196
+	cbz	w0, .L2171
 	mov	w0, w21
 	bl	zftl_flash_enter_slc_mode
-.L2196:
+.L2171:
 	ubfiz	x21, x21, 8, 8
 	mov	w0, 128
 	add	x19, x19, x21
@@ -13028,16 +12879,16 @@ flash_start_page_prog:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 96
 	b	nandc_de_cs.constprop.29
-.L2194:
+.L2169:
 	mov	w2, 64
 	mov	w1, w20
 	mov	w0, w27
 	bl	flash_wait_device_ready_raw
-	b	.L2193
-.L2195:
+	b	.L2168
+.L2170:
 	mov	w0, w21
 	bl	zftl_flash_exit_slc_mode
-	b	.L2196
+	b	.L2171
 	.size	flash_start_page_prog, .-flash_start_page_prog
 	.section	.text.queue_prog_cmd,"ax",@progbits
 	.align	2
@@ -13056,23 +12907,23 @@ queue_prog_cmd:
 	ldr	w3, [x19, 40]
 	ldrb	w1, [x0, #:lo12:.LANCHOR53]
 	cmp	w1, 255
-	beq	.L2202
+	beq	.L2177
 	adrp	x2, .LANCHOR49
 	add	x2, x2, :lo12:.LANCHOR49
 	ubfx	x3, x3, 21, 3
 	mov	x6, x2
-.L2204:
+.L2179:
 	add	x4, x2, x1, lsl 6
 	ldr	w5, [x4, 40]
 	ubfx	x5, x5, 21, 3
 	cmp	w3, w5
-	bne	.L2203
+	bne	.L2178
 	ldrb	w5, [x4, 58]
 	cmp	w5, 6
-	bne	.L2203
+	bne	.L2178
 	mov	w1, 3
 	strb	w1, [x4, 58]
-.L2202:
+.L2177:
 	mov	w1, 3
 	strb	w1, [x19, 58]
 	mov	w1, 1
@@ -13084,12 +12935,12 @@ queue_prog_cmd:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	buf_add_tail
-.L2203:
+.L2178:
 	lsl	x1, x1, 6
 	ldrb	w1, [x6, x1]
 	cmp	w1, 255
-	bne	.L2204
-	b	.L2202
+	bne	.L2179
+	b	.L2177
 	.size	queue_prog_cmd, .-queue_prog_cmd
 	.section	.text.sblk_prog_page,"ax",@progbits
 	.align	2
@@ -13106,25 +12957,25 @@ sblk_prog_page:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	cbz	w0, .L2211
+	cbz	w0, .L2186
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2211
+	tbz	x0, 8, .L2186
 	ldr	w1, [x19, 40]
-	adrp	x0, .LC126
+	adrp	x0, .LC125
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC126
+	add	x0, x0, :lo12:.LC125
 	bl	printf
-.L2211:
+.L2186:
 	adrp	x25, .LANCHOR38
 	adrp	x23, .LANCHOR49
 	add	x25, x25, :lo12:.LANCHOR38
 	add	x23, x23, :lo12:.LANCHOR49
 	mov	w21, 0
 	mov	w24, 1
-.L2212:
-	cbnz	w20, .L2223
-.L2236:
+.L2187:
+	cbnz	w20, .L2198
+.L2211:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -13133,49 +12984,49 @@ sblk_prog_page:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2223:
+.L2198:
 	ldrb	w26, [x19]
 	ldr	w22, [x19, 40]
-.L2213:
+.L2188:
 	mov	w1, 1
 	mov	w0, w22
 	bl	queue_lun_state
-	cbnz	w0, .L2214
+	cbnz	w0, .L2189
 	cmp	w20, 1
-	beq	.L2215
+	beq	.L2190
 	ldrb	w0, [x25]
-	cbnz	w0, .L2216
-.L2215:
+	cbnz	w0, .L2191
+.L2190:
 	mov	x0, x19
 	bl	queue_prog_cmd
-.L2217:
+.L2192:
 	subs	w20, w20, #1
-	beq	.L2236
+	beq	.L2211
 	ubfiz	x19, x26, 6, 8
 	add	x19, x23, x19
-	b	.L2212
-.L2214:
+	b	.L2187
+.L2189:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2213
-.L2216:
+	b	.L2188
+.L2191:
 	ldrb	w0, [x19]
 	ubfx	x27, x22, 21, 3
 	cmp	w0, 255
-	bne	.L2218
-	adrp	x1, .LANCHOR173
+	bne	.L2193
+	adrp	x1, .LANCHOR172
 	adrp	x0, .LC0
 	mov	w2, 546
-	add	x1, x1, :lo12:.LANCHOR173
+	add	x1, x1, :lo12:.LANCHOR172
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2218:
+.L2193:
 	ldrb	w0, [x19]
 	add	x0, x23, x0, lsl 6
 	ldr	w5, [x0, 40]
 	ubfx	x0, x5, 21, 3
 	cmp	w27, w0
-	bne	.L2219
+	bne	.L2194
 	adrp	x0, .LANCHOR99
 	ldrh	w2, [x0, #:lo12:.LANCHOR99]
 	adrp	x0, .LANCHOR98
@@ -13198,9 +13049,9 @@ sblk_prog_page:
 	cmp	w4, w0
 	and	w1, w1, w5
 	ccmp	w22, w1, 0, ne
-	bne	.L2219
+	bne	.L2194
 	cmp	w21, w3
-	beq	.L2219
+	beq	.L2194
 	ldr	w1, [x19, 40]
 	mov	w0, 17
 	ldr	x2, [x19, 8]
@@ -13216,12 +13067,12 @@ sblk_prog_page:
 	adrp	x0, .LANCHOR53
 	add	x0, x0, :lo12:.LANCHOR53
 	bl	buf_add_tail
-	b	.L2217
-.L2219:
+	b	.L2192
+.L2194:
 	mov	x0, x19
 	mov	w21, 0
 	bl	queue_prog_cmd
-	b	.L2217
+	b	.L2192
 	.size	sblk_prog_page, .-sblk_prog_page
 	.section	.text.ftl_flush,"ax",@progbits
 	.align	2
@@ -13234,17 +13085,17 @@ ftl_flush:
 	ldrb	w1, [x0, #:lo12:.LANCHOR119]
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	adrp	x20, .LANCHOR174
-	cbz	w1, .L2239
-	ldrb	w2, [x20, #:lo12:.LANCHOR174]
+	adrp	x20, .LANCHOR173
+	cbz	w1, .L2214
+	ldrb	w2, [x20, #:lo12:.LANCHOR173]
 	adrp	x0, .LANCHOR49
 	add	x0, x0, :lo12:.LANCHOR49
 	add	x0, x0, x2, lsl 6
 	bl	sblk_prog_page
-.L2239:
+.L2214:
 	mov	w0, -1
 	strb	wzr, [x19, #:lo12:.LANCHOR119]
-	strb	w0, [x20, #:lo12:.LANCHOR174]
+	strb	w0, [x20, #:lo12:.LANCHOR173]
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	ldp	x19, x20, [sp, 16]
@@ -13273,43 +13124,43 @@ flash_prog_page_en:
 	and	w21, w5, 255
 	ubfx	x19, x20, 24, 2
 	cmp	w0, w22
-	bhi	.L2245
-	adrp	x1, .LANCHOR175
+	bhi	.L2220
+	adrp	x1, .LANCHOR174
 	adrp	x0, .LC0
 	mov	w2, 473
-	add	x1, x1, :lo12:.LANCHOR175
+	add	x1, x1, :lo12:.LANCHOR174
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2245:
+.L2220:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w26, [x0, w22, sxtw]
-	cbnz	w19, .L2255
+	cbnz	w19, .L2230
 	adrp	x0, .LANCHOR0
 	ldrb	w1, [x0, #:lo12:.LANCHOR0]
 	adrp	x0, .LANCHOR1
-	cbz	w1, .L2247
+	cbz	w1, .L2222
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
-	cbz	w1, .L2255
-.L2247:
+	cbz	w1, .L2230
+.L2222:
 	adrp	x1, .LANCHOR2
 	ldrb	w0, [x0, #:lo12:.LANCHOR1]
 	ldrh	w1, [x1, #:lo12:.LANCHOR2]
 	udiv	w19, w20, w1
 	mul	w19, w19, w1
 	sub	w1, w20, w19
-	cbz	w0, .L2248
+	cbz	w0, .L2223
 	add	w19, w19, w1, lsl 1
-.L2246:
+.L2221:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 4, .L2249
-	adrp	x0, .LC127
+	tbz	x0, 4, .L2224
+	adrp	x0, .LC126
 	mov	w2, w20
 	mov	w1, w26
-	add	x0, x0, :lo12:.LC127
+	add	x0, x0, :lo12:.LC126
 	bl	printf
-.L2249:
+.L2224:
 	mov	w1, w19
 	mov	w4, w25
 	mov	x3, x23
@@ -13317,7 +13168,7 @@ flash_prog_page_en:
 	mov	w0, w26
 	bl	flash_prog_page
 	mov	w19, w0
-	cbz	w21, .L2250
+	cbz	w21, .L2225
 	adrp	x26, .LANCHOR160
 	adrp	x21, .LANCHOR161
 	mov	w4, w25
@@ -13328,57 +13179,57 @@ flash_prog_page_en:
 	bl	flash_read_page_en
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2251
+	beq	.L2226
 	ldr	x0, [x21, #:lo12:.LANCHOR161]
 	ldr	w1, [x24]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	bne	.L2251
+	bne	.L2226
 	ldr	x0, [x26, #:lo12:.LANCHOR160]
 	ldr	w1, [x23]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	beq	.L2250
-.L2251:
+	beq	.L2225
+.L2226:
 	ldr	x1, [x26, #:lo12:.LANCHOR160]
 	mov	w3, 4
-	adrp	x0, .LC128
+	adrp	x0, .LC127
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC128
+	add	x0, x0, :lo12:.LC127
 	bl	rknand_print_hex
 	ldr	x1, [x21, #:lo12:.LANCHOR161]
 	mov	w3, 4
-	adrp	x0, .LC129
+	adrp	x0, .LC128
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC129
+	add	x0, x0, :lo12:.LC128
 	bl	rknand_print_hex
-.L2252:
+.L2227:
 	mov	w1, w20
-	adrp	x0, .LC130
-	add	x0, x0, :lo12:.LC130
+	adrp	x0, .LC129
+	add	x0, x0, :lo12:.LC129
 	bl	printf
 	mov	w2, 499
-	adrp	x1, .LANCHOR175
+	adrp	x1, .LANCHOR174
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR175
+	add	x1, x1, :lo12:.LANCHOR174
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	mov	w0, -1
-	b	.L2253
-.L2248:
+	b	.L2228
+.L2223:
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
 	ldrh	w0, [x0, w1, uxtw 1]
 	add	w19, w0, w19
-	b	.L2246
-.L2255:
+	b	.L2221
+.L2230:
 	mov	w19, w20
-	b	.L2246
-.L2250:
+	b	.L2221
+.L2225:
 	mov	w0, w19
 	cmn	w19, #1
-	beq	.L2252
-.L2253:
+	beq	.L2227
+.L2228:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -13396,7 +13247,7 @@ ftl_test_block:
 	stp	x23, x24, [sp, 48]
 	adrp	x24, ftl_tmp_buffer
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR176
+	adrp	x25, .LANCHOR175
 	stp	x21, x22, [sp, 32]
 	adrp	x26, .LANCHOR106
 	and	w21, w0, 65535
@@ -13409,45 +13260,45 @@ ftl_test_block:
 	str	x0, [x29, 112]
 	str	wzr, [x24, #:lo12:ftl_tmp_buffer]
 	add	x0, x27, :lo12:.LANCHOR98
-	str	wzr, [x25, #:lo12:.LANCHOR176]
+	str	wzr, [x25, #:lo12:.LANCHOR175]
 	str	x0, [x29, 96]
-.L2267:
+.L2242:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
 	cmp	w0, w20
-	bls	.L2277
+	bls	.L2252
 	add	x0, x27, :lo12:.LANCHOR98
 	mov	w22, 0
 	str	x0, [x29, 120]
 	adrp	x0, .LANCHOR14
 	add	x0, x0, :lo12:.LANCHOR14
 	str	x0, [x29, 104]
-	b	.L2278
-.L2276:
+	b	.L2253
+.L2251:
 	ldr	x0, [x29, 104]
 	ldr	w0, [x0]
-	tbz	x0, 12, .L2268
-	adrp	x0, .LC131
+	tbz	x0, 12, .L2243
+	adrp	x0, .LC130
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC131
+	add	x0, x0, :lo12:.LC130
 	bl	printf
-.L2268:
+.L2243:
 	ldr	x0, [x29, 96]
 	ldrb	w19, [x0]
 	madd	w19, w21, w19, w22
 	and	w19, w19, 65535
-	cbnz	w20, .L2269
+	cbnz	w20, .L2244
 	adrp	x0, .LANCHOR26
 	ldr	x0, [x0, #:lo12:.LANCHOR26]
 	ldrb	w0, [x0, 47]
 	cmp	w0, w19
-	bcs	.L2270
-.L2269:
+	bcs	.L2245
+.L2244:
 	and	w28, w20, 255
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_check_bad_block
-	cbnz	w0, .L2270
+	cbnz	w0, .L2245
 	adrp	x0, .LANCHOR105
 	mov	w1, w23
 	ldrh	w7, [x0, #:lo12:.LANCHOR105]
@@ -13455,62 +13306,62 @@ ftl_test_block:
 	mul	w26, w7, w19
 	mov	w2, w26
 	bl	flash_erase_block_en
-	cbz	w0, .L2271
+	cbz	w0, .L2246
 	adrp	x0, .LANCHOR68
 	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w0, 2
-	bne	.L2293
+	bne	.L2268
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L2293
+	cbz	w0, .L2268
 	mov	w2, w26
 	mov	w1, 1
 	mov	w0, w28
 	bl	flash_erase_block_en
-	cbnz	w0, .L2293
-.L2275:
+	cbnz	w0, .L2268
+.L2250:
 	adrp	x0, .LANCHOR68
 	mov	w23, 1
 	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	add	w26, w26, w0, lsl 24
-.L2274:
+.L2249:
 	adrp	x0, .LANCHOR121
 	mov	w5, 1
-	add	x3, x25, :lo12:.LANCHOR176
+	add	x3, x25, :lo12:.LANCHOR175
 	add	x2, x24, :lo12:ftl_tmp_buffer
 	ldrb	w4, [x0, #:lo12:.LANCHOR121]
 	mov	w1, w26
 	mov	w0, w28
 	bl	flash_prog_page_en
-	cbz	w0, .L2270
-.L2293:
+	cbz	w0, .L2245
+.L2268:
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_mask_bad_block
-.L2270:
+.L2245:
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L2278:
+.L2253:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, w22
-	bhi	.L2276
+	bhi	.L2251
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2267
-.L2271:
-	cbz	w23, .L2274
-	b	.L2275
-.L2277:
-	cbz	w23, .L2279
-	adrp	x0, .LANCHOR7
+	b	.L2242
+.L2246:
+	cbz	w23, .L2249
+	b	.L2250
+.L2252:
+	cbz	w23, .L2254
+	adrp	x0, .LANCHOR7
 	mov	w1, 2
 	ldr	x0, [x0, #:lo12:.LANCHOR7]
 	add	x21, x0, x21, uxth 2
 	ldrb	w0, [x21, 2]
 	bfi	w0, w1, 3, 2
 	strb	w0, [x21, 2]
-.L2279:
+.L2254:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -13545,18 +13396,18 @@ ftl_prog_page:
 	bl	flash_prog_page_en
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L2294
+	bne	.L2269
 	mov	w2, 2151
-	adrp	x1, .LANCHOR177
+	adrp	x1, .LANCHOR176
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR177
+	add	x1, x1, :lo12:.LANCHOR176
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	adrp	x0, .LC130
+	adrp	x0, .LC129
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC130
+	add	x0, x0, :lo12:.LC129
 	bl	printf
-.L2294:
+.L2269:
 	mov	w0, w19
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -13575,24 +13426,24 @@ ftl_info_flush:
 	stp	x21, x22, [sp, 32]
 	adrp	x21, .LANCHOR121
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR179
+	adrp	x22, .LANCHOR178
 	stp	x25, x26, [sp, 64]
 	adrp	x23, .LANCHOR105
 	stp	x27, x28, [sp, 80]
 	mov	x26, x23
 	ldrb	w2, [x21, #:lo12:.LANCHOR121]
-	add	x25, x22, :lo12:.LANCHOR179
+	add	x25, x22, :lo12:.LANCHOR178
 	add	x28, x23, :lo12:.LANCHOR105
 	mov	w24, 0
 	stp	x19, x20, [sp, 16]
 	mov	w27, w0
-	adrp	x20, .LANCHOR178
+	adrp	x20, .LANCHOR177
 	lsl	w2, w2, 1
-	add	x0, x20, :lo12:.LANCHOR178
+	add	x0, x20, :lo12:.LANCHOR177
 	bl	ftl_memset
-.L2298:
-	add	x0, x22, :lo12:.LANCHOR179
-	ldrb	w6, [x22, #:lo12:.LANCHOR179]
+.L2273:
+	add	x0, x22, :lo12:.LANCHOR178
+	ldrb	w6, [x22, #:lo12:.LANCHOR178]
 	ldrh	w19, [x23, #:lo12:.LANCHOR105]
 	ldrh	w4, [x0, 2]
 	adrp	x0, .LANCHOR97
@@ -13600,41 +13451,41 @@ ftl_info_flush:
 	ldr	w3, [x0, 4]
 	add	w3, w3, 1
 	str	w3, [x0, 4]
-	add	x0, x20, :lo12:.LANCHOR178
-	str	w27, [x20, #:lo12:.LANCHOR178]
+	add	x0, x20, :lo12:.LANCHOR177
+	str	w27, [x20, #:lo12:.LANCHOR177]
 	str	w3, [x0, 4]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2299
+	tbz	x0, 12, .L2274
 	mov	w2, w4
 	mov	w1, w6
 	str	w4, [x29, 96]
-	adrp	x0, .LC132
+	adrp	x0, .LC131
 	str	w6, [x29, 104]
-	add	x0, x0, :lo12:.LC132
+	add	x0, x0, :lo12:.LC131
 	bl	printf
 	ldr	w4, [x29, 96]
 	ldr	w6, [x29, 104]
-.L2299:
+.L2274:
 	adrp	x1, .LANCHOR80
 	ldrh	w0, [x25, 2]
 	ldrh	w1, [x1, #:lo12:.LANCHOR80]
 	cmp	w1, w0
-	bhi	.L2300
-	adrp	x19, .LANCHOR180
+	bhi	.L2275
+	adrp	x19, .LANCHOR179
 	adrp	x3, .LC0
-	add	x19, x19, :lo12:.LANCHOR180
+	add	x19, x19, :lo12:.LANCHOR179
 	add	x3, x3, :lo12:.LC0
-.L2307:
+.L2282:
 	ldrb	w0, [x25, 1]
 	adrp	x4, .LANCHOR26
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x25, 1]
 	cmp	w0, 7
-	bls	.L2301
+	bls	.L2276
 	mov	x0, 0
-.L2306:
+.L2281:
 	ldr	x2, [x4, #:lo12:.LANCHOR26]
 	add	w1, w0, 8
 	and	w24, w0, 65535
@@ -13643,24 +13494,24 @@ ftl_info_flush:
 	add	w1, w2, 127
 	and	w1, w1, 255
 	cmp	w1, 125
-	bhi	.L2302
+	bhi	.L2277
 	mov	x0, x3
 	stp	x4, x3, [x29, 96]
 	mov	w2, 742
 	mov	x1, x19
 	bl	printf
 	ldp	x4, x3, [x29, 96]
-.L2305:
+.L2280:
 	strb	w24, [x25, 1]
 	mov	w24, 1
-.L2301:
+.L2276:
 	ldr	x0, [x4, #:lo12:.LANCHOR26]
 	ldrb	w1, [x25, 1]
 	add	x0, x0, x1
 	ldrb	w0, [x0, 40]
 	strb	w0, [x25]
 	cmp	w0, 255
-	beq	.L2307
+	beq	.L2282
 	ldrh	w19, [x28]
 	mul	w19, w19, w0
 	mov	w0, 0
@@ -13668,7 +13519,7 @@ ftl_info_flush:
 	bl	flash_erase_block
 	ldrb	w4, [x21, #:lo12:.LANCHOR121]
 	mov	w1, w19
-	add	x3, x20, :lo12:.LANCHOR178
+	add	x3, x20, :lo12:.LANCHOR177
 	adrp	x2, ftl_info_data_buffer
 	mov	w0, 0
 	add	x2, x2, :lo12:ftl_info_data_buffer
@@ -13676,53 +13527,53 @@ ftl_info_flush:
 	bl	ftl_prog_page
 	mov	w0, 1
 	strh	w0, [x25, 2]
-.L2308:
+.L2283:
 	ldrb	w4, [x21, #:lo12:.LANCHOR121]
 	mov	w1, w19
-	add	x3, x20, :lo12:.LANCHOR178
+	add	x3, x20, :lo12:.LANCHOR177
 	adrp	x2, ftl_info_data_buffer
 	mov	w0, 0
 	add	x2, x2, :lo12:ftl_info_data_buffer
 	bl	ftl_prog_page
 	cmn	w0, #1
 	ldrh	w1, [x25, 2]
-	adrp	x0, .LANCHOR181
+	adrp	x0, .LANCHOR180
 	add	w1, w1, 1
 	strh	w1, [x25, 2]
-	beq	.L2309
-	ldrb	w1, [x0, #:lo12:.LANCHOR181]
-	cbz	w1, .L2310
-.L2309:
-	strb	wzr, [x0, #:lo12:.LANCHOR181]
-	b	.L2298
-.L2302:
+	beq	.L2284
+	ldrb	w1, [x0, #:lo12:.LANCHOR180]
+	cbz	w1, .L2285
+.L2284:
+	strb	wzr, [x0, #:lo12:.LANCHOR180]
+	b	.L2273
+.L2277:
 	cmp	w2, 255
-	bne	.L2305
+	bne	.L2280
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L2306
+	bne	.L2281
 	mov	w24, w0
-	b	.L2305
-.L2300:
+	b	.L2280
+.L2275:
 	madd	w19, w19, w6, w4
-	cbnz	w0, .L2308
+	cbnz	w0, .L2283
 	mov	w1, w19
 	bl	flash_erase_block
-	b	.L2308
-.L2310:
-	cbnz	w24, .L2311
-.L2319:
-	adrp	x0, .LANCHOR179
-	ldrb	w0, [x0, #:lo12:.LANCHOR179]
+	b	.L2283
+.L2285:
+	cbnz	w24, .L2286
+.L2294:
+	adrp	x0, .LANCHOR178
+	ldrb	w0, [x0, #:lo12:.LANCHOR178]
 	cmp	w0, 255
-	bne	.L2313
-	adrp	x1, .LANCHOR180
+	bne	.L2288
+	adrp	x1, .LANCHOR179
 	adrp	x0, .LC0
 	mov	w2, 778
-	add	x1, x1, :lo12:.LANCHOR180
+	add	x1, x1, :lo12:.LANCHOR179
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2313:
+.L2288:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -13731,17 +13582,17 @@ ftl_info_flush:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2311:
+.L2286:
 	ldrb	w19, [x25, 1]
-	adrp	x20, .LANCHOR180
+	adrp	x20, .LANCHOR179
 	adrp	x21, .LC0
-	add	x20, x20, :lo12:.LANCHOR180
+	add	x20, x20, :lo12:.LANCHOR179
 	add	w19, w19, 1
 	add	x21, x21, :lo12:.LC0
 	adrp	x22, .LANCHOR26
-.L2314:
+.L2289:
 	cmp	w19, 7
-	bhi	.L2319
+	bhi	.L2294
 	ldr	x1, [x22, #:lo12:.LANCHOR26]
 	add	w0, w19, 8
 	add	x0, x1, x0, sxtw
@@ -13749,24 +13600,24 @@ ftl_info_flush:
 	add	w0, w23, 127
 	and	w0, w0, 255
 	cmp	w0, 125
-	bhi	.L2315
+	bhi	.L2290
 	mov	w2, 771
 	mov	x1, x20
 	mov	x0, x21
 	bl	printf
-.L2316:
+.L2291:
 	ldrh	w1, [x26, #:lo12:.LANCHOR105]
 	mov	w0, 0
 	mul	w1, w1, w23
 	bl	flash_erase_block
-	b	.L2317
-.L2315:
+	b	.L2292
+.L2290:
 	cmp	w23, 255
-	bne	.L2316
-.L2317:
+	bne	.L2291
+.L2292:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L2314
+	b	.L2289
 	.size	ftl_info_flush, .-ftl_info_flush
 	.section	.text.ftl_info_blk_init,"ax",@progbits
 	.align	2
@@ -13774,17 +13625,17 @@ ftl_info_flush:
 	.type	ftl_info_blk_init, %function
 ftl_info_blk_init:
 	stp	x29, x30, [sp, -128]!
-	adrp	x0, .LANCHOR182
-	adrp	x1, .LANCHOR181
+	adrp	x0, .LANCHOR181
+	adrp	x1, .LANCHOR180
 	mov	w2, 16384
 	add	x29, sp, 0
-	strb	wzr, [x0, #:lo12:.LANCHOR182]
+	strb	wzr, [x0, #:lo12:.LANCHOR181]
 	mov	w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR181]
-	adrp	x1, .LANCHOR183
+	strb	w0, [x1, #:lo12:.LANCHOR180]
+	adrp	x1, .LANCHOR182
 	stp	x19, x20, [sp, 16]
 	adrp	x20, ftl_info_data_buffer
-	strb	w0, [x1, #:lo12:.LANCHOR183]
+	strb	w0, [x1, #:lo12:.LANCHOR182]
 	adrp	x1, .LANCHOR7
 	add	x0, x20, :lo12:ftl_info_data_buffer
 	stp	x21, x22, [sp, 32]
@@ -13793,7 +13644,7 @@ ftl_info_blk_init:
 	adrp	x22, .LANCHOR97
 	stp	x25, x26, [sp, 64]
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
-	adrp	x21, .LANCHOR179
+	adrp	x21, .LANCHOR178
 	stp	x23, x24, [sp, 48]
 	adrp	x23, .LANCHOR26
 	stp	x27, x28, [sp, 80]
@@ -13809,7 +13660,7 @@ ftl_info_blk_init:
 	bl	ftl_memset
 	adrp	x25, .LANCHOR121
 	ldr	x1, [x23, #:lo12:.LANCHOR26]
-	add	x0, x21, :lo12:.LANCHOR179
+	add	x0, x21, :lo12:.LANCHOR178
 	mov	w27, 21574
 	add	x26, x26, :lo12:.LANCHOR105
 	add	x25, x25, :lo12:.LANCHOR121
@@ -13817,9 +13668,9 @@ ftl_info_blk_init:
 	strb	wzr, [x0, 1]
 	movk	w27, 0x494c, lsl 16
 	ldrb	w1, [x1, 40]
-	strb	w1, [x21, #:lo12:.LANCHOR179]
+	strb	w1, [x21, #:lo12:.LANCHOR178]
 	strh	wzr, [x0, 2]
-.L2335:
+.L2310:
 	ldr	x1, [x23, #:lo12:.LANCHOR26]
 	add	w0, w19, 8
 	sxth	w24, w19
@@ -13827,26 +13678,26 @@ ftl_info_blk_init:
 	add	x0, x1, x0, sxtw
 	ldrb	w0, [x0, 32]
 	cmp	w0, 255
-	bne	.L2334
-.L2339:
+	bne	.L2309
+.L2314:
 	sub	x19, x19, #1
 	cmn	x19, #1
-	bne	.L2335
+	bne	.L2310
 	mov	w24, 0
-.L2336:
+.L2311:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2340
+	tbz	x0, 12, .L2315
 	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	mov	w2, 4800
 	mov	w1, w19
 	ldr	w3, [x0]
-	adrp	x0, .LC134
-	add	x0, x0, :lo12:.LC134
+	adrp	x0, .LC133
+	add	x0, x0, :lo12:.LC133
 	bl	printf
-.L2340:
+.L2315:
 	cmn	w19, #1
-	bne	.L2341
+	bne	.L2316
 	mov	w1, 0
 	mov	w2, 16384
 	add	x0, x20, :lo12:ftl_info_data_buffer
@@ -13855,11 +13706,11 @@ ftl_info_blk_init:
 	mov	w1, 21574
 	movk	w1, 0x494c, lsl 16
 	str	w1, [x0]
-	mov	w1, 8
+	mov	w1, 9
 	movk	w1, 0x6, lsl 16
 	str	w1, [x0, 12]
 	mov	w0, w19
-.L2333:
+.L2308:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -13867,12 +13718,12 @@ ftl_info_blk_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2334:
+.L2309:
 	ldrh	w6, [x26]
 	add	x8, x20, :lo12:ftl_info_data_buffer
 	ldrb	w4, [x25]
-	adrp	x7, .LANCHOR178
-	add	x7, x7, :lo12:.LANCHOR178
+	adrp	x7, .LANCHOR177
+	add	x7, x7, :lo12:.LANCHOR177
 	mov	x2, x8
 	mov	x3, x7
 	stp	x7, x8, [x29, 104]
@@ -13885,7 +13736,7 @@ ftl_info_blk_init:
 	cmn	w0, #1
 	ldr	w6, [x29, 124]
 	ldp	x7, x8, [x29, 104]
-	bne	.L2337
+	bne	.L2312
 	ldrb	w4, [x25]
 	mov	x3, x7
 	mov	x2, x8
@@ -13893,30 +13744,30 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_read_page
 	mov	w5, w0
-.L2337:
+.L2312:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2338
+	tbz	x0, 12, .L2313
 	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	mov	w2, w5
 	str	w5, [x29, 124]
 	mov	w3, 672
 	mov	w1, w28
 	ldr	w4, [x0]
-	adrp	x0, .LC133
-	add	x0, x0, :lo12:.LC133
+	adrp	x0, .LC132
+	add	x0, x0, :lo12:.LC132
 	bl	printf
 	ldr	w5, [x29, 124]
-.L2338:
+.L2313:
 	cmn	w5, #1
-	beq	.L2339
+	beq	.L2314
 	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L2339
+	bne	.L2314
 	mov	w19, w24
-	b	.L2336
-.L2341:
+	b	.L2311
+.L2316:
 	ldr	x1, [x23, #:lo12:.LANCHOR26]
 	add	w0, w24, 8
 	add	x20, x20, :lo12:ftl_info_data_buffer
@@ -13928,11 +13779,11 @@ ftl_info_blk_init:
 	add	x26, x26, :lo12:.LANCHOR121
 	movk	w27, 0x494c, lsl 16
 	ldrb	w1, [x0, 32]
-	add	x0, x21, :lo12:.LANCHOR179
-	strb	w1, [x21, #:lo12:.LANCHOR179]
+	add	x0, x21, :lo12:.LANCHOR178
+	strb	w1, [x21, #:lo12:.LANCHOR178]
 	strb	w24, [x0, 1]
-	adrp	x24, .LANCHOR178
-	add	x24, x24, :lo12:.LANCHOR178
+	adrp	x24, .LANCHOR177
+	add	x24, x24, :lo12:.LANCHOR177
 	mov	w0, 0
 	mov	x3, x24
 	bl	flash_get_last_written_page
@@ -13940,11 +13791,11 @@ ftl_info_blk_init:
 	add	w0, w0, 1
 	and	w19, w0, 65535
 	adrp	x0, .LANCHOR105
-	ldrb	w25, [x21, #:lo12:.LANCHOR179]
+	ldrb	w25, [x21, #:lo12:.LANCHOR178]
 	ldrh	w0, [x0, #:lo12:.LANCHOR105]
 	madd	w25, w25, w0, w23
-.L2343:
-	tbnz	w23, #31, .L2346
+.L2318:
+	tbnz	w23, #31, .L2321
 	ldrb	w4, [x26]
 	mov	x3, x24
 	mov	x2, x20
@@ -13952,13 +13803,13 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_read_page
 	cmn	w0, #1
-	beq	.L2344
+	beq	.L2319
 	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L2344
-.L2346:
-	add	x21, x21, :lo12:.LANCHOR179
+	bne	.L2319
+.L2321:
+	add	x21, x21, :lo12:.LANCHOR178
 	strh	w19, [x21, 2]
 	bl	ftl_tmp_into_update
 	ldr	x1, [x22, #:lo12:.LANCHOR97]
@@ -13970,12 +13821,12 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_info_flush
 	mov	w0, 0
-	b	.L2333
-.L2344:
+	b	.L2308
+.L2319:
 	sub	w23, w23, #1
 	sub	w25, w25, #1
 	sxth	w23, w23
-	b	.L2343
+	b	.L2318
 	.size	ftl_info_blk_init, .-ftl_info_blk_init
 	.section	.text.ftl_ext_info_flush,"ax",@progbits
 	.align	2
@@ -13992,21 +13843,21 @@ ftl_ext_info_flush:
 	ldr	w1, [x0, 520]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbz	w1, .L2362
+	cbz	w1, .L2337
 	str	wzr, [x0, 520]
-.L2362:
+.L2337:
 	adrp	x20, .LANCHOR80
-	adrp	x22, .LANCHOR184
+	adrp	x22, .LANCHOR183
 	adrp	x21, .LANCHOR99
 	add	x20, x20, :lo12:.LANCHOR80
-	add	x22, x22, :lo12:.LANCHOR184
+	add	x22, x22, :lo12:.LANCHOR183
 	add	x21, x21, :lo12:.LANCHOR99
 	mov	w0, 0
 	bl	ftl_total_vpn_update
-.L2363:
+.L2338:
 	adrp	x23, .LANCHOR97
 	mov	x24, x23
-.L2366:
+.L2341:
 	ldr	x0, [x23, #:lo12:.LANCHOR97]
 	ldr	w1, [x0, 56]
 	add	w1, w1, 1
@@ -14014,26 +13865,26 @@ ftl_ext_info_flush:
 	ldrh	w1, [x0, 140]
 	ldrh	w0, [x20]
 	cmp	w1, w0
-	bcc	.L2364
+	bcc	.L2339
 	bl	ftl_ext_alloc_new_blk
-.L2364:
+.L2339:
 	ldr	x0, [x24, #:lo12:.LANCHOR97]
 	ldrh	w1, [x0, 130]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2365
+	bne	.L2340
 	adrp	x0, .LC0
 	mov	w2, 1747
 	mov	x1, x22
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2365:
+.L2340:
 	ldr	x1, [x24, #:lo12:.LANCHOR97]
 	mov	w19, 21
 	ldrh	w0, [x21]
 	adrp	x26, .LANCHOR121
-	adrp	x27, .LANCHOR178
-	add	x25, x27, :lo12:.LANCHOR178
+	adrp	x27, .LANCHOR177
+	add	x25, x27, :lo12:.LANCHOR177
 	sub	w0, w19, w0
 	mov	w19, 1
 	ldrh	w2, [x1, 130]
@@ -14055,7 +13906,7 @@ ftl_ext_info_flush:
 	mov	w1, w19
 	ldrb	w4, [x26, #:lo12:.LANCHOR121]
 	mov	x3, x25
-	str	wzr, [x27, #:lo12:.LANCHOR178]
+	str	wzr, [x27, #:lo12:.LANCHOR177]
 	adrp	x2, ftl_ext_info_data_buffer
 	add	x2, x2, :lo12:ftl_ext_info_data_buffer
 	ldr	w0, [x0, 56]
@@ -14068,16 +13919,16 @@ ftl_ext_info_flush:
 	and	w1, w1, 65535
 	strh	w1, [x2, 140]
 	cmp	w1, 1
-	beq	.L2366
+	beq	.L2341
 	cmn	w0, #1
-	adrp	x0, .LANCHOR183
-	beq	.L2367
-	ldrb	w1, [x0, #:lo12:.LANCHOR183]
-	cbz	w1, .L2368
-.L2367:
-	strb	wzr, [x0, #:lo12:.LANCHOR183]
-	b	.L2363
-.L2368:
+	adrp	x0, .LANCHOR182
+	beq	.L2342
+	ldrb	w1, [x0, #:lo12:.LANCHOR182]
+	cbz	w1, .L2343
+.L2342:
+	strb	wzr, [x0, #:lo12:.LANCHOR182]
+	b	.L2338
+.L2343:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -14104,11 +13955,11 @@ ftl_ext_info_init:
 	stp	x21, x22, [sp, 32]
 	stp	x27, x28, [sp, 80]
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR178
+	adrp	x24, .LANCHOR177
 	ldrh	w1, [x0, 130]
 	adrp	x0, .LANCHOR99
 	stp	x25, x26, [sp, 64]
-	add	x3, x24, :lo12:.LANCHOR178
+	add	x3, x24, :lo12:.LANCHOR177
 	ldrh	w0, [x0, #:lo12:.LANCHOR99]
 	adrp	x25, ftl_ext_info_data_buffer
 	add	x2, x25, :lo12:ftl_ext_info_data_buffer
@@ -14125,18 +13976,18 @@ ftl_ext_info_init:
 	sxth	w22, w0
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2379
+	tbz	x0, 12, .L2354
 	ldr	x0, [x20, #:lo12:.LANCHOR97]
-	adrp	x1, .LANCHOR185
+	adrp	x1, .LANCHOR184
 	and	w4, w21, 65535
 	mov	w3, w22
 	mov	w2, 1791
-	add	x1, x1, :lo12:.LANCHOR185
+	add	x1, x1, :lo12:.LANCHOR184
 	ldrh	w5, [x0, 130]
-	adrp	x0, .LC135
-	add	x0, x0, :lo12:.LC135
+	adrp	x0, .LC134
+	add	x0, x0, :lo12:.LC134
 	bl	printf
-.L2379:
+.L2354:
 	adrp	x26, .LANCHOR121
 	adrp	x28, .LANCHOR105
 	mov	w5, 20038
@@ -14144,14 +13995,14 @@ ftl_ext_info_init:
 	add	x28, x28, :lo12:.LANCHOR105
 	mov	w23, 0
 	movk	w5, 0x4549, lsl 16
-.L2380:
+.L2355:
 	and	w21, w22, 65535
 	sub	w0, w21, w23
-	tbnz	x0, 15, .L2385
+	tbnz	x0, 15, .L2360
 	ldrh	w0, [x28]
 	sub	w1, w22, w23
 	ldrb	w4, [x26]
-	add	x3, x24, :lo12:.LANCHOR178
+	add	x3, x24, :lo12:.LANCHOR177
 	str	w5, [x29, 108]
 	add	x2, x25, :lo12:ftl_ext_info_data_buffer
 	madd	w1, w0, w19, w1
@@ -14160,22 +14011,22 @@ ftl_ext_info_init:
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
 	ldr	w5, [x29, 108]
-	beq	.L2381
+	beq	.L2356
 	adrp	x0, .LANCHOR10
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x0]
 	cmp	w0, w5
-	bne	.L2381
-.L2385:
+	bne	.L2356
+.L2360:
 	bl	zftl_sblk_list_init
 	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	ldrh	w1, [x0, 140]
 	cmp	w1, w22
-	bgt	.L2383
+	bgt	.L2358
 	add	w21, w21, 1
 	strh	w21, [x0, 140]
 	bl	ftl_ext_info_flush
-.L2383:
+.L2358:
 	adrp	x0, .LANCHOR10
 	mov	w1, -1
 	ldp	x19, x20, [sp, 16]
@@ -14196,9 +14047,9 @@ ftl_ext_info_init:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 112
 	ret
-.L2381:
+.L2356:
 	add	w23, w23, 1
-	b	.L2380
+	b	.L2355
 	.size	ftl_ext_info_init, .-ftl_ext_info_init
 	.section	.text.ftl_low_format_data_init,"ax",@progbits
 	.align	2
@@ -14231,14 +14082,14 @@ ftl_low_format_data_init:
 	mov	w0, 65533
 	sub	w1, w20, #1
 	cmp	w0, w1, uxth
-	bcs	.L2394
-	adrp	x1, .LANCHOR186
+	bcs	.L2369
+	adrp	x1, .LANCHOR185
 	adrp	x0, .LC0
 	mov	w2, 1974
-	add	x1, x1, :lo12:.LANCHOR186
+	add	x1, x1, :lo12:.LANCHOR185
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2394:
+.L2369:
 	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	w2, 256
 	mov	w1, 255
@@ -14262,8 +14113,8 @@ ftl_low_format_data_init:
 	strh	w1, [x0, 694]
 	mov	w1, 1
 	strh	w1, [x0, 688]
-	adrp	x1, .LANCHOR187
-	ldrh	w1, [x1, #:lo12:.LANCHOR187]
+	adrp	x1, .LANCHOR186
+	ldrh	w1, [x1, #:lo12:.LANCHOR186]
 	strh	w1, [x0, 698]
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	mov	w1, 20038
@@ -14330,13 +14181,13 @@ ftl_low_format_data_init:
 ftl_low_format:
 	stp	x29, x30, [sp, -80]!
 	mov	w1, 0
-	adrp	x0, .LC136
-	add	x0, x0, :lo12:.LC136
+	adrp	x0, .LC135
+	add	x0, x0, :lo12:.LC135
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR188
+	adrp	x20, .LANCHOR187
 	stp	x21, x22, [sp, 32]
-	add	x20, x20, :lo12:.LANCHOR188
+	add	x20, x20, :lo12:.LANCHOR187
 	stp	x25, x26, [sp, 64]
 	adrp	x22, .LANCHOR26
 	mov	x25, x22
@@ -14344,30 +14195,30 @@ ftl_low_format:
 	mov	w19, 8
 	adrp	x23, .LC0
 	bl	printf
-.L2399:
+.L2374:
 	ldr	x0, [x22, #:lo12:.LANCHOR26]
 	add	x0, x0, x19, sxtw
 	ldrb	w21, [x0, 32]
 	add	w0, w21, 127
 	and	w0, w0, 255
 	cmp	w0, 125
-	bhi	.L2397
+	bhi	.L2372
 	mov	w2, 2028
 	mov	x1, x20
 	add	x0, x23, :lo12:.LC0
 	bl	printf
-.L2397:
+.L2372:
 	cmp	w21, 255
-	beq	.L2398
+	beq	.L2373
 	adrp	x0, .LANCHOR105
 	ldrh	w1, [x0, #:lo12:.LANCHOR105]
 	mov	w0, 0
 	mul	w1, w1, w21
 	bl	flash_erase_block
-.L2398:
+.L2373:
 	add	w19, w19, 1
 	cmp	w19, 16
-	bne	.L2399
+	bne	.L2374
 	bl	sblk_init
 	adrp	x22, .LANCHOR7
 	bl	ftl_info_blk_init
@@ -14381,9 +14232,9 @@ ftl_low_format:
 	mov	w3, 1
 	ldrh	w2, [x19, #:lo12:.LANCHOR6]
 	add	x2, x0, x2, lsl 2
-.L2400:
+.L2375:
 	cmp	x0, x2
-	bne	.L2401
+	bne	.L2376
 	adrp	x21, .LANCHOR97
 	mov	w1, 21574
 	adrp	x24, .LANCHOR59
@@ -14394,11 +14245,11 @@ ftl_low_format:
 	mov	w26, 1
 	strh	wzr, [x0, 148]
 	str	w1, [x0]
-.L2402:
+.L2377:
 	ldrh	w0, [x19, #:lo12:.LANCHOR6]
 	adrp	x23, .LANCHOR98
 	cmp	w0, w20
-	bhi	.L2410
+	bhi	.L2385
 	ldr	x0, [x25, #:lo12:.LANCHOR26]
 	mov	w4, 3
 	ldrb	w2, [x23, #:lo12:.LANCHOR98]
@@ -14417,7 +14268,7 @@ ftl_low_format:
 	add	x0, x0, 4
 	add	w20, w5, 1
 	add	x0, x1, x0
-.L2413:
+.L2388:
 	cmp	w2, 4
 	add	x1, x1, 4
 	csel	w7, w10, w4, eq
@@ -14426,7 +14277,7 @@ ftl_low_format:
 	orr	w7, w7, -32
 	strb	w7, [x1, -2]
 	cmp	x1, x0
-	bne	.L2413
+	bne	.L2388
 	mul	w5, w5, w8
 	mov	w4, 16
 	add	w0, w3, w8
@@ -14438,14 +14289,14 @@ ftl_low_format:
 	add	w4, w20, w4
 	and	w4, w4, 65535
 	strh	w4, [x6, 134]
-	tbz	x0, 12, .L2414
-	adrp	x0, .LC137
+	tbz	x0, 12, .L2389
+	adrp	x0, .LC136
 	mov	w3, w20
 	mov	w2, 128
 	mov	w1, 2074
-	add	x0, x0, :lo12:.LC137
+	add	x0, x0, :lo12:.LC136
 	bl	printf
-.L2414:
+.L2389:
 	ldr	x0, [x21, #:lo12:.LANCHOR97]
 	mov	w2, 128
 	mov	w1, 255
@@ -14468,9 +14319,9 @@ ftl_low_format:
 	lsl	w4, w4, w0
 	and	w1, w1, 65535
 	and	w4, w4, 65535
-.L2415:
+.L2390:
 	cmp	w20, w12
-	bcc	.L2421
+	bcc	.L2396
 	ldrh	w0, [x19, #:lo12:.LANCHOR6]
 	strh	w3, [x2, 112]
 	sub	w0, w0, w12
@@ -14486,14 +14337,14 @@ ftl_low_format:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2401:
+.L2376:
 	ldrb	w1, [x0, 2]
 	add	x0, x0, 4
 	and	w1, w1, 31
 	bfi	w1, w3, 3, 2
 	strb	w1, [x0, -2]
-	b	.L2400
-.L2410:
+	b	.L2375
+.L2385:
 	strh	w20, [x24]
 	mov	w0, w20
 	bl	ftl_test_block
@@ -14507,16 +14358,16 @@ ftl_low_format:
 	mov	w8, 0
 	mul	w12, w20, w11
 	add	x6, x6, x20, uxth 2
-.L2403:
+.L2378:
 	cmp	w8, w14
-	bcs	.L2407
+	bcs	.L2382
 	add	w15, w11, w7
-	b	.L2408
-.L2406:
+	b	.L2383
+.L2381:
 	add	w1, w7, w12
 	mov	w0, w8
 	bl	flash_check_bad_block
-	cbz	w0, .L2404
+	cbz	w0, .L2379
 	ldrb	w1, [x6, 3]
 	lsl	w0, w26, w7
 	orr	w0, w0, w1
@@ -14524,29 +14375,29 @@ ftl_low_format:
 	ldrh	w0, [x13, 148]
 	add	w0, w0, 1
 	strh	w0, [x13, 148]
-.L2405:
+.L2380:
 	add	w7, w7, 1
-.L2408:
+.L2383:
 	cmp	w7, w15
-	bne	.L2406
+	bne	.L2381
 	add	w8, w8, 1
 	sub	w12, w12, w11
 	and	w8, w8, 65535
-	b	.L2403
-.L2404:
+	b	.L2378
+.L2379:
 	add	w10, w10, 1
 	and	w10, w10, 65535
-	b	.L2405
-.L2407:
-	cbnz	w10, .L2409
+	b	.L2380
+.L2382:
+	cbnz	w10, .L2384
 	ldrb	w0, [x6, 2]
 	orr	w0, w0, -32
 	strb	w0, [x6, 2]
-.L2409:
+.L2384:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2402
-.L2421:
+	b	.L2377
+.L2396:
 	add	x10, x14, x20, uxth 2
 	mov	w6, 0
 	mov	w8, 0
@@ -14554,48 +14405,48 @@ ftl_low_format:
 	ldrb	w0, [x10, 2]
 	orr	w0, w0, -32
 	strb	w0, [x10, 2]
-.L2416:
+.L2391:
 	cmp	w5, w15
-	bcc	.L2423
+	bcc	.L2398
 	add	w20, w20, 1
 	add	w1, w16, w1
 	and	w20, w20, 65535
 	and	w1, w1, 65535
-	b	.L2415
-.L2419:
+	b	.L2390
+.L2394:
 	ldrb	w11, [x10, 3]
 	add	w17, w8, w7
 	asr	w11, w11, w17
-	tbnz	x11, 0, .L2417
+	tbnz	x11, 0, .L2392
 	cmp	w13, 1
-	bls	.L2422
+	bls	.L2397
 	and	w0, w0, 1
 	add	w0, w1, w0
 	and	w0, w0, 65535
-.L2418:
+.L2393:
 	add	x11, x2, x3, sxtw 1
 	add	w3, w3, 1
 	and	w3, w3, 65535
 	add	w0, w0, w6
 	strh	w0, [x11, 160]
-.L2417:
+.L2392:
 	add	x7, x7, 1
-.L2420:
+.L2395:
 	and	w0, w7, 65535
 	cmp	w0, w16
-	bcc	.L2419
+	bcc	.L2394
 	add	w5, w5, 1
 	add	w6, w6, w4
 	and	w5, w5, 65535
 	add	w8, w8, w13
 	and	w6, w6, 65535
-	b	.L2416
-.L2422:
+	b	.L2391
+.L2397:
 	mov	w0, w1
-	b	.L2418
-.L2423:
+	b	.L2393
+.L2398:
 	mov	x7, 0
-	b	.L2420
+	b	.L2395
 	.size	ftl_low_format, .-ftl_low_format
 	.section	.text.ftl_re_low_format,"ax",@progbits
 	.align	2
@@ -14604,8 +14455,8 @@ ftl_low_format:
 ftl_re_low_format:
 	stp	x29, x30, [sp, -16]!
 	mov	w1, 1
-	adrp	x0, .LC138
-	add	x0, x0, :lo12:.LC138
+	adrp	x0, .LC137
+	add	x0, x0, :lo12:.LC137
 	add	x29, sp, 0
 	bl	printf
 	bl	sblk_init
@@ -14622,9 +14473,9 @@ ftl_re_low_format:
 	ldr	x2, [x2, #:lo12:.LANCHOR7]
 	ldrh	w1, [x0, 134]
 	add	x2, x2, x1, uxth 2
-.L2434:
+.L2409:
 	cmp	w1, w7
-	bcc	.L2438
+	bcc	.L2413
 	strh	w5, [x0, 114]
 	strh	w4, [x0, 118]
 	strh	w3, [x0, 116]
@@ -14635,29 +14486,29 @@ ftl_re_low_format:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L2438:
+.L2413:
 	ldrb	w6, [x2, 2]
 	and	w8, w6, 31
 	strb	w8, [x2, 2]
 	ands	w6, w6, 24
-	bne	.L2435
+	bne	.L2410
 	add	w5, w5, 1
 	and	w5, w5, 65535
-.L2436:
+.L2411:
 	add	w1, w1, 1
 	add	x2, x2, 4
 	and	w1, w1, 65535
-	b	.L2434
-.L2435:
+	b	.L2409
+.L2410:
 	cmp	w6, 16
-	bne	.L2437
+	bne	.L2412
 	add	w4, w4, 1
 	and	w4, w4, 65535
-	b	.L2436
-.L2437:
+	b	.L2411
+.L2412:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L2436
+	b	.L2411
 	.size	ftl_re_low_format, .-ftl_re_low_format
 	.section	.text.ftl_prog_ppa_page,"ax",@progbits
 	.align	2
@@ -14679,7 +14530,7 @@ ftl_prog_ppa_page:
 ftl_write_last_log_page:
 	ldrh	w1, [x0, 6]
 	cmp	w1, 1
-	bne	.L2443
+	bne	.L2418
 	stp	x29, x30, [sp, -48]!
 	adrp	x1, .LANCHOR111
 	add	x29, sp, 0
@@ -14691,15 +14542,15 @@ ftl_write_last_log_page:
 	bl	ftl_get_new_free_page
 	mov	w21, w0
 	cmn	w0, #1
-	beq	.L2444
+	beq	.L2419
 	ldrh	w0, [x19]
 	add	x20, x20, x22, uxth 2
 	bl	ftl_vpn_decrement
-	adrp	x0, .LANCHOR176
+	adrp	x0, .LANCHOR175
 	mov	w1, 15555
-	add	x6, x0, :lo12:.LANCHOR176
+	add	x6, x0, :lo12:.LANCHOR175
 	movk	w1, 0xf55f, lsl 16
-	str	w1, [x0, #:lo12:.LANCHOR176]
+	str	w1, [x0, #:lo12:.LANCHOR175]
 	adrp	x0, .LANCHOR80
 	ldrh	w1, [x0, #:lo12:.LANCHOR80]
 	adrp	x0, .LANCHOR73
@@ -14716,13 +14567,13 @@ ftl_write_last_log_page:
 	mov	w0, w21
 	str	wzr, [x6, 12]
 	bl	ftl_prog_ppa_page
-.L2444:
+.L2419:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L2443:
+.L2418:
 	mov	w0, -1
 	ret
 	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
@@ -14742,41 +14593,41 @@ ftl_open_sblk_recovery:
 	mov	x25, x1
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
-	tbz	x0, 12, .L2450
+	tbz	x0, 12, .L2425
 	ldrh	w1, [x28, 2]
-	adrp	x0, .LC139
-	add	x0, x0, :lo12:.LC139
+	adrp	x0, .LC138
+	add	x0, x0, :lo12:.LC138
 	bl	printf
-.L2450:
+.L2425:
 	ldr	w0, [x22, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2451
+	tbz	x0, 12, .L2426
 	ldrb	w1, [x28, 5]
-	adrp	x0, .LC140
-	add	x0, x0, :lo12:.LC140
+	adrp	x0, .LC139
+	add	x0, x0, :lo12:.LC139
 	bl	printf
-.L2451:
+.L2426:
 	ldr	w0, [x22, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2452
+	tbz	x0, 12, .L2427
 	ldrh	w1, [x28]
-	adrp	x0, .LC141
-	add	x0, x0, :lo12:.LC141
+	adrp	x0, .LC140
+	add	x0, x0, :lo12:.LC140
 	bl	printf
-.L2452:
+.L2427:
 	ldr	w0, [x22, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2453
+	tbz	x0, 12, .L2428
 	ldrh	w2, [x28, 18]
-	adrp	x0, .LC142
+	adrp	x0, .LC141
 	ldrh	w1, [x28, 16]
-	add	x0, x0, :lo12:.LC142
+	add	x0, x0, :lo12:.LC141
 	bl	printf
-.L2453:
+.L2428:
 	ldrh	w0, [x28, 10]
 	strh	w0, [x28, 14]
 	adrp	x0, .LANCHOR6
 	ldrh	w1, [x28]
 	ldrh	w0, [x0, #:lo12:.LANCHOR6]
 	cmp	w1, w0
-	bcs	.L2449
+	bcs	.L2424
 	mov	w0, 1
 	bl	buf_alloc
 	ldrb	w20, [x28, 5]
@@ -14787,11 +14638,11 @@ ftl_open_sblk_recovery:
 	add	x0, x26, :lo12:.LANCHOR121
 	adrp	x23, .LANCHOR80
 	str	x0, [x29, 128]
-.L2456:
+.L2431:
 	ldrh	w0, [x23, #:lo12:.LANCHOR80]
 	cmp	w0, w21
-	bhi	.L2469
-.L2459:
+	bhi	.L2444
+.L2434:
 	ldrh	w0, [x28, 10]
 	ldrh	w1, [x28, 6]
 	ldrh	w2, [x23, #:lo12:.LANCHOR80]
@@ -14801,22 +14652,22 @@ ftl_open_sblk_recovery:
 	strb	w20, [x28, 5]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L2470
-	adrp	x1, .LANCHOR189
+	beq	.L2445
+	adrp	x1, .LANCHOR188
 	adrp	x0, .LC0
 	mov	w2, 1473
-	add	x1, x1, :lo12:.LANCHOR189
+	add	x1, x1, :lo12:.LANCHOR188
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2470:
+.L2445:
 	adrp	x21, .LANCHOR111
 	ldrh	w3, [x28, 10]
 	mov	w0, 0
 	mov	w1, 0
 	ldr	x5, [x21, #:lo12:.LANCHOR111]
-.L2471:
+.L2446:
 	cmp	w1, w3
-	bcc	.L2473
+	bcc	.L2448
 	ldrb	w20, [x28, 9]
 	adrp	x24, .LANCHOR9
 	ldrh	w1, [x23, #:lo12:.LANCHOR80]
@@ -14824,32 +14675,32 @@ ftl_open_sblk_recovery:
 	ldr	w0, [x22, #:lo12:.LANCHOR14]
 	sub	w20, w20, w3
 	and	w20, w20, 65535
-	tbz	x0, 12, .L2474
+	tbz	x0, 12, .L2449
 	ldrh	w1, [x28]
 	ldr	x2, [x24, #:lo12:.LANCHOR9]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w3, [x2, x0]
-	adrp	x0, .LC143
+	adrp	x0, .LC142
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC143
+	add	x0, x0, :lo12:.LC142
 	bl	printf
-.L2474:
+.L2449:
 	ldr	x0, [x24, #:lo12:.LANCHOR9]
 	adrp	x25, .LANCHOR121
 	ldrh	w1, [x28]
 	adrp	x24, .LANCHOR73
-	adrp	x26, .LC144
+	adrp	x26, .LC143
 	add	x24, x24, :lo12:.LANCHOR73
 	add	x25, x25, :lo12:.LANCHOR121
-	add	x26, x26, :lo12:.LC144
+	add	x26, x26, :lo12:.LC143
 	strh	w20, [x0, x1, lsl 1]
 	mov	w20, 0
 	mov	x0, x19
 	bl	buf_free
-.L2475:
+.L2450:
 	ldrb	w0, [x24]
 	cmp	w20, w0, lsl 1
-	bcc	.L2478
+	bcc	.L2453
 	ldrh	w1, [x28, 12]
 	ldrh	w0, [x23, #:lo12:.LANCHOR80]
 	ldrb	w2, [x28, 9]
@@ -14859,17 +14710,17 @@ ftl_open_sblk_recovery:
 	ldr	x1, [x21, #:lo12:.LANCHOR111]
 	ldr	w0, [x1, x0]
 	cmn	w0, #1
-	beq	.L2479
-	adrp	x1, .LANCHOR189
+	beq	.L2454
+	adrp	x1, .LANCHOR188
 	adrp	x0, .LC0
 	mov	w2, 1503
-	add	x1, x1, :lo12:.LANCHOR189
+	add	x1, x1, :lo12:.LANCHOR188
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2479:
+.L2454:
 	ldrh	w0, [x28, 6]
 	cmp	w0, 1
-	bne	.L2449
+	bne	.L2424
 	ldp	x19, x20, [sp, 16]
 	mov	x0, x28
 	ldp	x21, x22, [sp, 32]
@@ -14878,25 +14729,25 @@ ftl_open_sblk_recovery:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	b	ftl_write_last_log_page
-.L2469:
+.L2444:
 	ldrb	w20, [x28, 5]
 	adrp	x24, .LANCHOR105
 	add	x0, x24, :lo12:.LANCHOR105
 	str	x0, [x29, 136]
-.L2457:
+.L2432:
 	ldrb	w0, [x28, 9]
 	cmp	w0, w20
-	bhi	.L2468
+	bhi	.L2443
 	add	w21, w21, 1
 	strb	wzr, [x28, 5]
 	and	w21, w21, 65535
-	b	.L2456
-.L2468:
+	b	.L2431
+.L2443:
 	add	x0, x28, x20, sxtw 1
 	mov	w1, 65535
 	ldrh	w0, [x0, 16]
 	cmp	w0, w1
-	beq	.L2458
+	beq	.L2433
 	ldr	x1, [x29, 136]
 	ldrb	w3, [x26, #:lo12:.LANCHOR121]
 	ldr	x2, [x19, 24]
@@ -14906,36 +14757,36 @@ ftl_open_sblk_recovery:
 	bl	ftl_read_ppa_page
 	mov	w24, w0
 	cmp	w0, 512
-	beq	.L2459
+	beq	.L2434
 	cmn	w0, #1
-	beq	.L2460
+	beq	.L2435
 	ldr	x0, [x19, 24]
 	ldr	w1, [x0]
 	cmn	w1, #1
-	bne	.L2460
+	bne	.L2435
 	ldr	w0, [x0, 4]
 	cmn	w0, #1
-	bne	.L2460
+	bne	.L2435
 	ldr	x0, [x19, 8]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L2459
-.L2460:
-	adrp	x0, .LANCHOR182
+	beq	.L2434
+.L2435:
+	adrp	x0, .LANCHOR181
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR182]
+	strb	w1, [x0, #:lo12:.LANCHOR181]
 	ldrb	w0, [x28, 9]
 	ldrh	w1, [x28, 10]
 	madd	w0, w0, w21, w20
 	cmp	w1, w0
-	beq	.L2461
-	adrp	x1, .LANCHOR189
+	beq	.L2436
+	adrp	x1, .LANCHOR188
 	adrp	x0, .LC0
 	mov	w2, 1396
-	add	x1, x1, :lo12:.LANCHOR189
+	add	x1, x1, :lo12:.LANCHOR188
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2461:
+.L2436:
 	ldrh	w0, [x28, 10]
 	ldrh	w1, [x28, 6]
 	ldrb	w2, [x28, 9]
@@ -14943,28 +14794,28 @@ ftl_open_sblk_recovery:
 	ldrh	w0, [x23, #:lo12:.LANCHOR80]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L2462
-	adrp	x1, .LANCHOR189
+	beq	.L2437
+	adrp	x1, .LANCHOR188
 	adrp	x0, .LC0
 	mov	w2, 1397
-	add	x1, x1, :lo12:.LANCHOR189
+	add	x1, x1, :lo12:.LANCHOR188
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2462:
+.L2437:
 	cmn	w24, #1
-	beq	.L2464
+	beq	.L2439
 	ldr	x0, [x19, 24]
 	ldr	w0, [x0, 4]
 	cmn	w0, #1
-	beq	.L2464
+	beq	.L2439
 	bl	lpa_hash_get_ppa
-	cbz	x25, .L2466
+	cbz	x25, .L2441
 	ldr	x3, [x19, 24]
 	ldr	w1, [x3, 8]
 	cmp	w0, w1
-	beq	.L2466
+	beq	.L2441
 	cmn	w0, #1
-	beq	.L2466
+	beq	.L2441
 	adrp	x6, .LANCHOR99
 	mov	w5, 21
 	mov	w27, 1
@@ -14979,11 +14830,11 @@ ftl_open_sblk_recovery:
 	udiv	w1, w1, w2
 	ldrh	w2, [x25]
 	cmp	w2, w1, uxth
-	bne	.L2466
+	bne	.L2441
 	ldr	x1, [x29, 128]
-	adrp	x8, .LANCHOR178
+	adrp	x8, .LANCHOR177
 	ldr	w10, [x3]
-	add	x2, x8, :lo12:.LANCHOR178
+	add	x2, x8, :lo12:.LANCHOR177
 	stp	w5, w10, [x29, 112]
 	str	x8, [x29, 120]
 	ldrb	w3, [x1]
@@ -14992,13 +14843,13 @@ ftl_open_sblk_recovery:
 	bl	ftl_read_ppa_page
 	ldr	x8, [x29, 120]
 	ldr	w10, [x29, 116]
-	ldr	w0, [x8, #:lo12:.LANCHOR178]
+	ldr	w0, [x8, #:lo12:.LANCHOR177]
 	cmp	w10, w0
-	bhi	.L2466
+	bhi	.L2441
 	ldr	x0, [x19, 24]
 	ldr	w0, [x0, 8]
 	cmn	w0, #1
-	beq	.L2464
+	beq	.L2439
 	ldp	x7, x6, [x29, 96]
 	ldr	w5, [x29, 112]
 	ldrh	w1, [x6, #:lo12:.LANCHOR99]
@@ -15010,7 +14861,7 @@ ftl_open_sblk_recovery:
 	ldrb	w0, [x7, #:lo12:.LANCHOR98]
 	udiv	w0, w27, w0
 	bl	ftl_vpn_decrement
-.L2464:
+.L2439:
 	ldrh	w0, [x28, 6]
 	mov	w27, 1
 	sub	w0, w0, #1
@@ -15018,37 +14869,37 @@ ftl_open_sblk_recovery:
 	ldrh	w0, [x28, 10]
 	add	w0, w0, 1
 	strh	w0, [x28, 10]
-.L2458:
+.L2433:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2457
-.L2473:
+	b	.L2432
+.L2448:
 	ldrh	w2, [x28, 12]
 	add	w2, w2, w1
 	ldr	w2, [x5, x2, lsl 2]
 	cmn	w2, #1
-	beq	.L2472
+	beq	.L2447
 	add	w20, w0, 1
 	and	w0, w20, 65535
-.L2472:
+.L2447:
 	add	w1, w1, 1
-	b	.L2471
-.L2478:
-	cbz	w27, .L2476
+	b	.L2446
+.L2453:
+	cbz	w27, .L2451
 	ldrh	w0, [x28, 6]
 	cmp	w0, 1
-	bls	.L2476
+	bls	.L2451
 	mov	x0, x28
 	bl	ftl_get_new_free_page
 	mov	w4, w0
 	ldr	w0, [x22, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2477
+	tbz	x0, 12, .L2452
 	mov	w1, w4
 	str	w4, [x29, 136]
 	mov	x0, x26
 	bl	printf
 	ldr	w4, [x29, 136]
-.L2477:
+.L2452:
 	adrp	x0, .LANCHOR97
 	ldr	x2, [x19, 24]
 	ldr	x1, [x19, 8]
@@ -15064,37 +14915,37 @@ ftl_open_sblk_recovery:
 	bl	ftl_prog_ppa_page
 	ldrh	w0, [x28]
 	bl	ftl_vpn_decrement
-.L2476:
+.L2451:
 	add	w20, w20, 1
-	b	.L2475
-.L2466:
+	b	.L2450
+.L2441:
 	ldr	x3, [x19, 24]
 	adrp	x0, .LANCHOR118
 	ldr	w0, [x0, #:lo12:.LANCHOR118]
 	ldr	w1, [x3, 4]
 	cmp	w1, w0
-	bcs	.L2464
+	bcs	.L2439
 	ldrb	w0, [x28, 9]
 	ldrh	w1, [x23, #:lo12:.LANCHOR80]
 	ldrh	w2, [x28, 10]
 	mul	w0, w0, w1
 	sub	w0, w0, #1
 	cmp	w2, w0
-	bge	.L2464
+	bge	.L2439
 	adrp	x0, .LANCHOR97
 	ldr	w1, [x3]
 	ldr	x0, [x0, #:lo12:.LANCHOR97]
 	ldr	w5, [x0, 8]
 	cmp	w1, w5
-	bls	.L2467
+	bls	.L2442
 	str	w1, [x0, 8]
-.L2467:
+.L2442:
 	ldrh	w0, [x28, 12]
 	add	w2, w2, w0
 	ldp	w0, w1, [x3, 4]
 	bl	lpa_hash_update_ppa
-	b	.L2464
-.L2449:
+	b	.L2439
+.L2424:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -15124,7 +14975,7 @@ pm_write_page:
 	add	x22, x22, :lo12:.LANCHOR105
 	mov	w24, 65535
 	str	x27, [sp, 80]
-.L2529:
+.L2504:
 	ldr	x0, [x23, #:lo12:.LANCHOR97]
 	ldr	w1, [x0, 48]
 	ldrh	w2, [x0, 696]
@@ -15132,37 +14983,37 @@ pm_write_page:
 	str	w1, [x0, 48]
 	ldrh	w1, [x21]
 	cmp	w2, w1
-	bcs	.L2530
+	bcs	.L2505
 	ldrh	w0, [x0, 692]
 	cmp	w0, w24
-	bne	.L2531
-.L2530:
+	bne	.L2506
+.L2505:
 	bl	pm_alloc_new_blk
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2531:
+.L2506:
 	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	ldrh	w0, [x0, 692]
 	cmp	w0, w24
-	bne	.L2532
-	adrp	x1, .LANCHOR190
+	bne	.L2507
+	adrp	x1, .LANCHOR189
 	adrp	x0, .LC0
 	mov	w2, 230
-	add	x1, x1, :lo12:.LANCHOR190
+	add	x1, x1, :lo12:.LANCHOR189
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2532:
+.L2507:
 	ldr	x0, [x20, #:lo12:.LANCHOR97]
-	adrp	x27, .LANCHOR191
+	adrp	x27, .LANCHOR190
 	ldrh	w1, [x22]
 	mov	w2, 64
 	ldrh	w26, [x0, 692]
 	ldrh	w0, [x0, 696]
 	madd	w26, w26, w1, w0
-	ldr	x0, [x27, #:lo12:.LANCHOR191]
+	ldr	x0, [x27, #:lo12:.LANCHOR190]
 	mov	w1, 0
 	bl	ftl_memset
-	ldr	x3, [x27, #:lo12:.LANCHOR191]
+	ldr	x3, [x27, #:lo12:.LANCHOR190]
 	mov	x2, x25
 	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	str	w19, [x3]
@@ -15179,28 +15030,28 @@ pm_write_page:
 	and	w1, w1, 65535
 	strh	w1, [x2, 696]
 	cmp	w1, 1
-	adrp	x1, .LANCHOR192
-	beq	.L2533
-	ldrb	w3, [x1, #:lo12:.LANCHOR192]
-	cbz	w3, .L2534
-.L2533:
-	strb	wzr, [x1, #:lo12:.LANCHOR192]
-	b	.L2529
-.L2534:
+	adrp	x1, .LANCHOR191
+	beq	.L2508
+	ldrb	w3, [x1, #:lo12:.LANCHOR191]
+	cbz	w3, .L2509
+.L2508:
+	strb	wzr, [x1, #:lo12:.LANCHOR191]
+	b	.L2504
+.L2509:
 	cmn	w0, #1
-	bne	.L2536
+	bne	.L2511
 	mov	w1, w26
-	adrp	x0, .LC145
-	add	x0, x0, :lo12:.LC145
+	adrp	x0, .LC144
+	add	x0, x0, :lo12:.LC144
 	bl	printf
-	b	.L2529
-.L2536:
+	b	.L2504
+.L2511:
 	ldrh	w0, [x2, 698]
 	cmp	w19, w0
-	bcs	.L2537
+	bcs	.L2512
 	add	x19, x2, x19, uxtw 2
 	str	w26, [x19, 704]
-.L2537:
+.L2512:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -15224,14 +15075,14 @@ flash_info_flush:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2543
-	adrp	x2, .LANCHOR193
+	tbz	x0, 12, .L2518
+	adrp	x2, .LANCHOR192
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR193
+	add	x2, x2, :lo12:.LANCHOR192
 	mov	w1, 251
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2543:
+.L2518:
 	adrp	x23, .LANCHOR158
 	adrp	x20, .LANCHOR26
 	mov	w2, 64
@@ -15239,18 +15090,18 @@ flash_info_flush:
 	ldr	x0, [x23, #:lo12:.LANCHOR158]
 	adrp	x21, .LANCHOR159
 	adrp	x22, .LANCHOR2
-	adrp	x24, .LC147
+	adrp	x24, .LC146
 	adrp	x25, .LANCHOR135
 	add	x22, x22, :lo12:.LANCHOR2
-	add	x24, x24, :lo12:.LC147
+	add	x24, x24, :lo12:.LC146
 	add	x25, x25, :lo12:.LANCHOR135
 	bl	ftl_memset
 	add	x27, x21, :lo12:.LANCHOR159
 	ldr	x1, [x20, #:lo12:.LANCHOR26]
 	mov	w3, 16
 	mov	w2, 4
-	adrp	x0, .LC146
-	add	x0, x0, :lo12:.LC146
+	adrp	x0, .LC145
+	add	x0, x0, :lo12:.LC145
 	mov	w26, 0
 	bl	rknand_print_hex
 	ldr	x6, [x20, #:lo12:.LANCHOR26]
@@ -15258,7 +15109,7 @@ flash_info_flush:
 	ldr	w1, [x6, 8]
 	bl	js_hash
 	str	w0, [x6, 12]
-.L2544:
+.L2519:
 	add	x28, x21, :lo12:.LANCHOR159
 	ldrb	w4, [x21, #:lo12:.LANCHOR159]
 	ldrh	w19, [x22]
@@ -15273,7 +15124,7 @@ flash_info_flush:
 	sub	w0, w0, #1
 	cmp	w1, w0
 	ldp	w3, w4, [x29, 104]
-	blt	.L2545
+	blt	.L2520
 	ldr	x6, [x20, #:lo12:.LANCHOR26]
 	ldrb	w7, [x28, 1]
 	strh	wzr, [x28, 2]
@@ -15292,18 +15143,18 @@ flash_info_flush:
 	ldrh	w19, [x22]
 	str	w0, [x6, 12]
 	mul	w19, w19, w7
-.L2554:
+.L2529:
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_erase_block
-	b	.L2546
-.L2549:
+	b	.L2521
+.L2524:
 	mov	w26, 1
-	b	.L2544
-.L2545:
+	b	.L2519
+.L2520:
 	madd	w19, w19, w4, w3
-	cbz	w1, .L2554
-.L2546:
+	cbz	w1, .L2529
+.L2521:
 	ldr	x2, [x20, #:lo12:.LANCHOR26]
 	mov	w1, w19
 	ldr	x3, [x23, #:lo12:.LANCHOR158]
@@ -15320,14 +15171,14 @@ flash_info_flush:
 	ldrh	w1, [x27, 2]
 	add	w1, w1, 1
 	strh	w1, [x27, 2]
-	bne	.L2547
+	bne	.L2522
 	mov	w1, w19
-	adrp	x0, .LC148
-	add	x0, x0, :lo12:.LC148
+	adrp	x0, .LC147
+	add	x0, x0, :lo12:.LC147
 	bl	printf
-	b	.L2544
-.L2547:
-	cbz	w26, .L2549
+	b	.L2519
+.L2522:
+	cbz	w26, .L2524
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -15352,14 +15203,14 @@ nand_flash_init:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2556
-	adrp	x2, .LANCHOR194
+	tbz	x0, 12, .L2531
+	adrp	x2, .LANCHOR193
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR194
+	add	x2, x2, :lo12:.LANCHOR193
 	mov	w1, 2209
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2556:
+.L2531:
 	mov	x0, x19
 	adrp	x23, .LANCHOR16
 	bl	nandc_init
@@ -15387,20 +15238,20 @@ nand_flash_init:
 	adrp	x0, .LANCHOR136
 	add	x0, x0, :lo12:.LANCHOR136
 	bl	ftl_memset
-.L2562:
+.L2537:
 	mov	x1, x24
 	mov	w0, w22
 	bl	flash_read_id
 	strb	w27, [x22, x25]
-	cbnz	x22, .L2557
+	cbnz	x22, .L2532
 	ldrb	w0, [x26]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bls	.L2558
-.L2560:
+	bls	.L2533
+.L2535:
 	mov	w19, -2
-.L2555:
+.L2530:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -15409,55 +15260,55 @@ nand_flash_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2558:
+.L2533:
 	ldrb	w0, [x26, 1]
 	cmp	w0, 255
-	beq	.L2560
-.L2557:
+	beq	.L2535
+.L2532:
 	ldrb	w0, [x24]
 	cmp	w0, 181
-	bne	.L2561
+	bne	.L2536
 	strb	w28, [x24]
-.L2561:
+.L2536:
 	add	x22, x22, 1
 	add	x24, x24, 8
 	cmp	x22, 4
-	bne	.L2562
-	adrp	x0, .LANCHOR195
-	add	x8, x0, :lo12:.LANCHOR195
+	bne	.L2537
+	adrp	x0, .LANCHOR194
+	add	x8, x0, :lo12:.LANCHOR194
 	add	x8, x8, 1
 	mov	x7, x0
 	add	x12, x20, :lo12:.LANCHOR41
 	mov	x10, 0
-.L2565:
+.L2540:
 	ldrb	w2, [x8, -1]
 	mov	w11, w10
 	lsl	x24, x10, 5
 	mov	x1, x12
 	mov	x0, x8
 	bl	flash_mem_cmp8
-	cbnz	w0, .L2563
-	add	x0, x7, :lo12:.LANCHOR195
+	cbnz	w0, .L2538
+	add	x0, x7, :lo12:.LANCHOR194
 	ubfiz	x11, x11, 5, 32
 	add	x24, x0, x24
 	add	x0, x0, x11
-	adrp	x1, .LANCHOR196
-	add	x4, x1, :lo12:.LANCHOR196
+	adrp	x1, .LANCHOR195
+	add	x4, x1, :lo12:.LANCHOR195
 	ldrb	w3, [x0, 22]
 	mov	x0, 0
-.L2564:
+.L2539:
 	lsl	x5, x0, 5
 	mov	w2, w0
 	ldrb	w5, [x5, x4]
 	cmp	w5, w3
-	beq	.L2566
+	beq	.L2541
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L2564
+	bne	.L2539
 	mov	w2, w0
-.L2566:
+.L2541:
 	ubfiz	x0, x2, 5, 32
-	add	x1, x1, :lo12:.LANCHOR196
+	add	x1, x1, :lo12:.LANCHOR195
 	add	x1, x1, x0
 	mov	w2, 32
 	adrp	x0, .LANCHOR19
@@ -15471,33 +15322,33 @@ nand_flash_init:
 	bl	ftl_memcpy
 	ldrb	w0, [x24, #:lo12:.LANCHOR27]
 	cmp	w0, 8
-	bhi	.L2567
+	bhi	.L2542
 	ldrb	w1, [x22, 20]
 	cmp	w1, 60
-	bls	.L2568
+	bls	.L2543
 	mov	w1, 60
 	strb	w1, [x22, 20]
-.L2568:
+.L2543:
 	cmp	w0, 8
-	bne	.L2567
+	bne	.L2542
 	ldrb	w0, [x20, #:lo12:.LANCHOR41]
 	cmp	w0, 44
-	bne	.L2567
+	bne	.L2542
 	add	x0, x19, :lo12:.LANCHOR34
 	ldrb	w1, [x0, 28]
 	cmp	w1, 3
-	bne	.L2567
+	bne	.L2542
 	strb	wzr, [x0, 28]
-.L2567:
+.L2542:
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2569
-	adrp	x2, .LANCHOR194
+	tbz	x0, 12, .L2544
+	adrp	x2, .LANCHOR193
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR194
+	add	x2, x2, :lo12:.LANCHOR193
 	mov	w1, 2233
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2569:
+.L2544:
 	mov	w0, 16384
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR161
@@ -15523,8 +15374,8 @@ nand_flash_init:
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR158
 	str	x0, [x1, #:lo12:.LANCHOR158]
-	adrp	x0, .LANCHOR168
-	strb	wzr, [x0, #:lo12:.LANCHOR168]
+	adrp	x0, .LANCHOR167
+	strb	wzr, [x0, #:lo12:.LANCHOR167]
 	bl	flash_die_info_init
 	ldrb	w0, [x20, 18]
 	bl	flash_lsb_page_tbl_build
@@ -15560,65 +15411,65 @@ nand_flash_init:
 	strb	w2, [x1, #:lo12:.LANCHOR17]
 	ldrb	w2, [x24, #:lo12:.LANCHOR27]
 	cmp	w2, 9
-	bne	.L2570
+	bne	.L2545
 	mov	w2, 70
 	strb	w2, [x1, #:lo12:.LANCHOR17]
-.L2570:
+.L2545:
 	add	x19, x19, :lo12:.LANCHOR34
-	adrp	x1, .LANCHOR169
+	adrp	x1, .LANCHOR168
 	adrp	x25, .LANCHOR23
-	strb	w0, [x1, #:lo12:.LANCHOR169]
+	strb	w0, [x1, #:lo12:.LANCHOR168]
 	ldrh	w1, [x19, 16]
 	ldrb	w0, [x19, 19]
 	strb	w0, [x25, #:lo12:.LANCHOR23]
-	tbz	x1, 6, .L2572
+	tbz	x1, 6, .L2547
 	sub	w1, w0, #17
 	and	w1, w1, 255
 	cmp	w1, 2
-	bhi	.L2573
+	bhi	.L2548
 	adrp	x1, micron_read_retrial
 	add	x1, x1, :lo12:micron_read_retrial
 	str	x1, [x20, #:lo12:.LANCHOR156]
 	cmp	w0, 19
 	adrp	x0, .LANCHOR154
-	beq	.L2574
+	beq	.L2549
 	mov	w1, 7
-.L2618:
+.L2593:
 	strb	w1, [x0, #:lo12:.LANCHOR154]
-	b	.L2572
-.L2563:
+	b	.L2547
+.L2538:
 	add	x10, x10, 1
 	add	x8, x8, 32
 	cmp	x10, 30
-	bne	.L2565
-	b	.L2560
-.L2574:
+	bne	.L2540
+	b	.L2535
+.L2549:
 	mov	w1, 15
-	b	.L2618
-.L2573:
+	b	.L2593
+.L2548:
 	sub	w1, w0, #65
 	cmp	w0, 33
 	and	w1, w1, 255
 	ccmp	w1, 1, 0, ne
-	bhi	.L2576
+	bhi	.L2551
 	adrp	x0, toshiba_read_retrial
 	add	x0, x0, :lo12:toshiba_read_retrial
 	str	x0, [x20, #:lo12:.LANCHOR156]
 	adrp	x0, .LANCHOR25
 	mov	w1, 4
 	strb	w1, [x0, #:lo12:.LANCHOR25]
-.L2620:
+.L2595:
 	mov	w1, 7
 	adrp	x0, .LANCHOR154
-	b	.L2618
-.L2576:
+	b	.L2593
+.L2551:
 	sub	w2, w0, #34
 	sub	w1, w0, #67
 	and	w2, w2, 255
 	and	w1, w1, 255
 	cmp	w2, 1
 	ccmp	w1, 1, 0, hi
-	bhi	.L2577
+	bhi	.L2552
 	adrp	x2, toshiba_read_retrial
 	add	x2, x2, :lo12:toshiba_read_retrial
 	str	x2, [x20, #:lo12:.LANCHOR156]
@@ -15626,87 +15477,87 @@ nand_flash_init:
 	mov	w2, 68
 	ccmp	w0, w2, 4, ne
 	adrp	x0, .LANCHOR154
-	beq	.L2578
+	beq	.L2553
 	mov	w2, 7
-.L2617:
+.L2592:
 	strb	w2, [x0, #:lo12:.LANCHOR154]
 	cmp	w1, 1
 	adrp	x0, .LANCHOR25
-	bhi	.L2580
+	bhi	.L2555
 	mov	w1, 4
-.L2619:
+.L2594:
 	strb	w1, [x0, #:lo12:.LANCHOR25]
-.L2572:
+.L2547:
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2581
-	adrp	x2, .LANCHOR194
+	tbz	x0, 12, .L2556
+	adrp	x2, .LANCHOR193
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR194
+	add	x2, x2, :lo12:.LANCHOR193
 	mov	w1, 2281
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2581:
+.L2556:
 	adrp	x24, .LANCHOR20
 	ldrb	w0, [x23, #:lo12:.LANCHOR42]
 	strb	wzr, [x24, #:lo12:.LANCHOR20]
-	tbz	x0, 0, .L2582
+	tbz	x0, 0, .L2557
 	mov	w0, 4
 	bl	nandc_set_if_mode
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
-.L2621:
+.L2596:
 	bl	nandc_set_if_mode
 	bl	flash_info_blk_init
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L2584
+	bne	.L2559
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2585
-	adrp	x2, .LANCHOR194
+	tbz	x0, 12, .L2560
+	adrp	x2, .LANCHOR193
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR194
+	add	x2, x2, :lo12:.LANCHOR193
 	mov	w1, 2301
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2585:
+.L2560:
 	ldr	x0, [x22, #:lo12:.LANCHOR26]
 	mov	w1, 17
 	strb	w1, [x0, 32]
-	b	.L2555
-.L2578:
+	b	.L2530
+.L2553:
 	mov	w2, 17
-	b	.L2617
-.L2580:
+	b	.L2592
+.L2555:
 	mov	w1, 5
-	b	.L2619
-.L2577:
+	b	.L2594
+.L2552:
 	sub	w0, w0, #36
 	and	w0, w0, 255
 	cmp	w0, 1
-	bhi	.L2572
+	bhi	.L2547
 	adrp	x0, toshiba_3d_read_retrial
 	add	x0, x0, :lo12:toshiba_3d_read_retrial
 	str	x0, [x20, #:lo12:.LANCHOR156]
-	b	.L2620
-.L2582:
+	b	.L2595
+.L2557:
 	mov	w0, 4
-	b	.L2621
-.L2584:
+	b	.L2596
+.L2559:
 	ldrb	w0, [x25, #:lo12:.LANCHOR23]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 6
-	bhi	.L2586
+	bhi	.L2561
 	adrp	x0, hynix_read_retrial
 	add	x0, x0, :lo12:hynix_read_retrial
 	str	x0, [x20, #:lo12:.LANCHOR156]
-.L2586:
+.L2561:
 	ldrb	w0, [x23, #:lo12:.LANCHOR42]
-	tbz	x0, 2, .L2588
+	tbz	x0, 2, .L2563
 	ldr	x0, [x22, #:lo12:.LANCHOR26]
 	ldrb	w0, [x0, 19]
-	cbz	w0, .L2588
+	cbz	w0, .L2563
 	adrp	x0, .LANCHOR159
 	ldrb	w1, [x0, #:lo12:.LANCHOR159]
 	adrp	x0, .LANCHOR2
@@ -15715,23 +15566,23 @@ nand_flash_init:
 	mov	w0, 0
 	bl	flash_ddr_para_scan
 	ldrb	w0, [x24, #:lo12:.LANCHOR20]
-	cbnz	w0, .L2588
+	cbnz	w0, .L2563
 	ldr	x0, [x22, #:lo12:.LANCHOR26]
 	strb	wzr, [x0, 19]
 	bl	flash_info_flush
-.L2588:
+.L2563:
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2590
-	adrp	x2, .LANCHOR194
+	tbz	x0, 12, .L2565
+	adrp	x2, .LANCHOR193
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR194
+	add	x2, x2, :lo12:.LANCHOR193
 	mov	w1, 2356
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2590:
+.L2565:
 	bl	nand_flash_print_info
 	mov	w19, 0
-	b	.L2555
+	b	.L2530
 	.size	nand_flash_init, .-nand_flash_init
 	.section	.text.ftl_sysblk_dump,"ax",@progbits
 	.align	2
@@ -15759,20 +15610,20 @@ ftl_sysblk_dump:
 	add	x27, x27, :lo12:.LANCHOR105
 	add	x28, x28, :lo12:.LANCHOR121
 	mov	w19, 0
-.L2623:
+.L2598:
 	ldrh	w0, [x26]
 	cmp	w0, w19
-	bhi	.L2625
+	bhi	.L2600
 	mov	x0, x25
 	bl	buf_free
-	cbz	w20, .L2626
-	adrp	x1, .LANCHOR197
+	cbz	w20, .L2601
+	adrp	x1, .LANCHOR196
 	adrp	x0, .LC0
 	mov	w2, 1339
-	add	x1, x1, :lo12:.LANCHOR197
+	add	x1, x1, :lo12:.LANCHOR196
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2626:
+.L2601:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
@@ -15782,7 +15633,7 @@ ftl_sysblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 144
 	ret
-.L2625:
+.L2600:
 	ldrh	w21, [x27]
 	ldrb	w3, [x28]
 	ldr	x1, [x25, 8]
@@ -15811,19 +15662,19 @@ ftl_sysblk_dump:
 	mov	w1, w23
 	ldp	w5, w6, [x0]
 	ldr	w7, [x0, 8]
-	adrp	x0, .LC149
-	add	x0, x0, :lo12:.LC149
+	adrp	x0, .LC148
+	add	x0, x0, :lo12:.LC148
 	bl	printf
 	mov	w3, 32
 	mov	w2, 4
 	add	x1, x24, 704
-	adrp	x0, .LC150
-	add	x0, x0, :lo12:.LC150
+	adrp	x0, .LC149
+	add	x0, x0, :lo12:.LC149
 	bl	rknand_print_hex
 	cmp	w22, 512
 	ccmn	w22, #1, 4, ne
 	csinc	w20, w20, wzr, ne
-	b	.L2623
+	b	.L2598
 	.size	ftl_sysblk_dump, .-ftl_sysblk_dump
 	.section	.text.dump_ftl_info,"ax",@progbits
 	.align	2
@@ -15834,32 +15685,32 @@ dump_ftl_info:
 	adrp	x0, .LANCHOR51
 	add	x29, sp, 0
 	ldrb	w1, [x0, #:lo12:.LANCHOR51]
-	adrp	x0, .LC151
+	adrp	x0, .LC150
 	stp	x19, x20, [sp, 16]
-	add	x0, x0, :lo12:.LC151
+	add	x0, x0, :lo12:.LC150
 	stp	x21, x22, [sp, 32]
 	adrp	x22, .LANCHOR97
 	adrp	x19, .LANCHOR10
 	adrp	x20, .LANCHOR80
 	bl	printf
 	adrp	x21, .LANCHOR6
-	adrp	x0, .LANCHOR179
-	add	x1, x0, :lo12:.LANCHOR179
+	adrp	x0, .LANCHOR178
+	add	x1, x0, :lo12:.LANCHOR178
 	ldrh	w3, [x1, 2]
 	ldrb	w2, [x1, 1]
-	ldrb	w1, [x0, #:lo12:.LANCHOR179]
-	adrp	x0, .LC152
-	add	x0, x0, :lo12:.LC152
+	ldrb	w1, [x0, #:lo12:.LANCHOR178]
+	adrp	x0, .LC151
+	add	x0, x0, :lo12:.LC151
 	bl	printf
 	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	ldrh	w2, [x0, 140]
 	ldrh	w1, [x0, 130]
-	adrp	x0, .LC153
-	add	x0, x0, :lo12:.LC153
+	adrp	x0, .LC152
+	add	x0, x0, :lo12:.LC152
 	bl	printf
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
-	adrp	x0, .LC154
-	add	x0, x0, :lo12:.LC154
+	adrp	x0, .LC153
+	add	x0, x0, :lo12:.LC153
 	ldrh	w5, [x1, 26]
 	ldrh	w4, [x1, 22]
 	ldrb	w3, [x1, 21]
@@ -15867,8 +15718,8 @@ dump_ftl_info:
 	ldrh	w1, [x1, 16]
 	bl	printf
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
-	adrp	x0, .LC155
-	add	x0, x0, :lo12:.LC155
+	adrp	x0, .LC154
+	add	x0, x0, :lo12:.LC154
 	ldrh	w5, [x1, 58]
 	ldrh	w4, [x1, 54]
 	ldrb	w3, [x1, 53]
@@ -15877,8 +15728,8 @@ dump_ftl_info:
 	bl	printf
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
 	adrp	x19, .LANCHOR73
-	adrp	x0, .LC156
-	add	x0, x0, :lo12:.LC156
+	adrp	x0, .LC155
+	add	x0, x0, :lo12:.LC155
 	ldrh	w5, [x1, 90]
 	ldrh	w4, [x1, 86]
 	ldrb	w3, [x1, 85]
@@ -15891,21 +15742,21 @@ dump_ftl_info:
 	mul	w3, w3, w0
 	adrp	x0, .LANCHOR111
 	ldr	x1, [x0, #:lo12:.LANCHOR111]
-	adrp	x0, .LC157
+	adrp	x0, .LC156
 	lsl	w3, w3, 1
-	add	x0, x0, :lo12:.LC157
+	add	x0, x0, :lo12:.LC156
 	bl	rknand_print_hex
 	adrp	x0, .LANCHOR9
 	ldrh	w3, [x21, #:lo12:.LANCHOR6]
 	mov	w2, 2
 	ldr	x1, [x0, #:lo12:.LANCHOR9]
-	adrp	x0, .LC158
-	add	x0, x0, :lo12:.LC158
+	adrp	x0, .LC157
+	add	x0, x0, :lo12:.LC157
 	bl	rknand_print_hex
 	ldr	x1, [x22, #:lo12:.LANCHOR97]
 	mov	w2, 4
-	adrp	x0, .LC150
-	add	x0, x0, :lo12:.LC150
+	adrp	x0, .LC149
+	add	x0, x0, :lo12:.LC149
 	add	x1, x1, 704
 	ldrh	w3, [x1, -6]
 	bl	rknand_print_hex
@@ -15913,15 +15764,15 @@ dump_ftl_info:
 	ldrh	w3, [x21, #:lo12:.LANCHOR6]
 	mov	w2, 4
 	ldr	x1, [x0, #:lo12:.LANCHOR7]
-	adrp	x0, .LC159
-	add	x0, x0, :lo12:.LC159
+	adrp	x0, .LC158
+	add	x0, x0, :lo12:.LC158
 	bl	rknand_print_hex
 	mov	w3, 256
 	mov	w2, 2
 	adrp	x1, .LANCHOR110
-	adrp	x0, .LC160
+	adrp	x0, .LC159
 	add	x1, x1, :lo12:.LANCHOR110
-	add	x0, x0, :lo12:.LC160
+	add	x0, x0, :lo12:.LC159
 	bl	rknand_print_hex
 	ldrb	w0, [x19, #:lo12:.LANCHOR73]
 	mov	w2, 2
@@ -15933,8 +15784,8 @@ dump_ftl_info:
 	ldp	x29, x30, [sp], 48
 	lsl	w3, w3, 1
 	ldr	x1, [x0, #:lo12:.LANCHOR112]
-	adrp	x0, .LC161
-	add	x0, x0, :lo12:.LC161
+	adrp	x0, .LC160
+	add	x0, x0, :lo12:.LC160
 	b	rknand_print_hex
 	.size	dump_ftl_info, .-dump_ftl_info
 	.section	.text.pm_ppa_update_check,"ax",@progbits
@@ -15961,20 +15812,20 @@ pm_ppa_update_check:
 	ubfx	x3, x3, 5, 3
 	cmp	w3, 1
 	ccmp	w3, 7, 4, ne
-	bne	.L2637
+	bne	.L2612
 	stp	x29, x30, [sp, -16]!
 	mov	w3, w2
 	mov	w2, w1
 	mov	x1, x0
 	add	x29, sp, 0
-	adrp	x0, .LC162
-	add	x0, x0, :lo12:.LC162
+	adrp	x0, .LC161
+	add	x0, x0, :lo12:.LC161
 	bl	printf
 	bl	dump_ftl_info
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
-.L2637:
+.L2612:
 	mov	w0, 0
 	ret
 	.size	pm_ppa_update_check, .-pm_ppa_update_check
@@ -15990,42 +15841,42 @@ load_l2p_region:
 	and	w19, w0, 65535
 	stp	x23, x24, [sp, 48]
 	cmp	w20, 31
-	bls	.L2643
-	adrp	x1, .LANCHOR198
+	bls	.L2618
+	adrp	x1, .LANCHOR197
 	adrp	x0, .LC0
 	mov	w2, 31
-	add	x1, x1, :lo12:.LANCHOR198
+	add	x1, x1, :lo12:.LANCHOR197
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2643:
+.L2618:
 	adrp	x22, .LANCHOR97
 	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	ldrh	w2, [x0, 698]
 	cmp	w2, w19
-	bcs	.L2644
+	bcs	.L2619
 	mov	w1, w19
-	adrp	x0, .LC163
-	add	x0, x0, :lo12:.LC163
+	adrp	x0, .LC162
+	add	x0, x0, :lo12:.LC162
 	bl	printf
-	adrp	x0, .LANCHOR199
+	adrp	x0, .LANCHOR198
 	mov	w1, 255
-	ldrh	w2, [x0, #:lo12:.LANCHOR199]
+	ldrh	w2, [x0, #:lo12:.LANCHOR198]
 	mov	x0, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
 	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	ldrh	w0, [x0, 698]
 	cmp	w0, w19
-	bcs	.L2646
+	bcs	.L2621
 	mov	w2, 35
-.L2651:
-	adrp	x1, .LANCHOR198
+.L2626:
+	adrp	x1, .LANCHOR197
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR198
+	add	x1, x1, :lo12:.LANCHOR197
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L2646
-.L2644:
+	b	.L2621
+.L2619:
 	add	x0, x0, x19, sxtw 2
 	sbfiz	x20, x20, 4, 32
 	ldr	w21, [x0, 704]
@@ -16034,69 +15885,69 @@ load_l2p_region:
 	add	x23, x0, x20
 	strh	w19, [x0, x20]
 	strh	wzr, [x23, 2]
-	cbnz	w21, .L2647
+	cbnz	w21, .L2622
 	mov	w2, 0
 	mov	w1, w19
-	adrp	x0, .LC164
-	add	x0, x0, :lo12:.LC164
+	adrp	x0, .LC163
+	add	x0, x0, :lo12:.LC163
 	bl	printf
-	adrp	x0, .LANCHOR199
+	adrp	x0, .LANCHOR198
 	mov	w1, 255
-	ldrh	w2, [x0, #:lo12:.LANCHOR199]
+	ldrh	w2, [x0, #:lo12:.LANCHOR198]
 	ldr	x0, [x23, 8]
 	bl	ftl_memset
-.L2646:
+.L2621:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2647:
-	adrp	x20, .LANCHOR191
+.L2622:
+	adrp	x20, .LANCHOR190
 	adrp	x24, .LANCHOR121
 	ldr	x1, [x23, 8]
 	mov	w0, w21
-	ldr	x2, [x20, #:lo12:.LANCHOR191]
+	ldr	x2, [x20, #:lo12:.LANCHOR190]
 	ldrb	w3, [x24, #:lo12:.LANCHOR121]
 	bl	ftl_read_ppa_page
-	ldr	x1, [x20, #:lo12:.LANCHOR191]
+	ldr	x1, [x20, #:lo12:.LANCHOR190]
 	ldr	w2, [x1]
 	cmp	w2, w19
-	beq	.L2648
+	beq	.L2623
 	mov	w4, w21
 	mov	w3, w0
 	mov	w1, w19
-	adrp	x0, .LC165
-	add	x0, x0, :lo12:.LC165
+	adrp	x0, .LC164
+	add	x0, x0, :lo12:.LC164
 	bl	printf
 	ldr	x1, [x22, #:lo12:.LANCHOR97]
 	mov	w2, 4
-	adrp	x0, .LC166
-	add	x0, x0, :lo12:.LC166
+	adrp	x0, .LC165
+	add	x0, x0, :lo12:.LC165
 	add	x1, x1, 704
 	ldrh	w3, [x1, -6]
 	bl	rknand_print_hex
 	ldr	x1, [x23, 8]
 	mov	w2, 4
 	ldrb	w3, [x24, #:lo12:.LANCHOR121]
-	adrp	x0, .LC167
-	add	x0, x0, :lo12:.LC167
+	adrp	x0, .LC166
+	add	x0, x0, :lo12:.LC166
 	lsl	w3, w3, 7
 	bl	rknand_print_hex
-	ldr	x1, [x20, #:lo12:.LANCHOR191]
-	adrp	x0, .LC168
+	ldr	x1, [x20, #:lo12:.LANCHOR190]
+	adrp	x0, .LC167
 	mov	w3, 16
 	mov	w2, 4
-	add	x0, x0, :lo12:.LC168
+	add	x0, x0, :lo12:.LC167
 	bl	rknand_print_hex
-.L2648:
-	ldr	x0, [x20, #:lo12:.LANCHOR191]
+.L2623:
+	ldr	x0, [x20, #:lo12:.LANCHOR190]
 	ldr	w0, [x0]
 	cmp	w19, w0
-	beq	.L2646
+	beq	.L2621
 	mov	w2, 59
-	b	.L2651
+	b	.L2626
 	.size	load_l2p_region, .-load_l2p_region
 	.section	.text.pm_gc,"ax",@progbits
 	.align	2
@@ -16116,21 +15967,21 @@ pm_gc:
 	str	x25, [sp, 64]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L2654
+	blt	.L2629
 	bl	pm_free_sblk
 	ldr	x2, [x20, #:lo12:.LANCHOR97]
 	ldrh	w1, [x19, #:lo12:.LANCHOR141]
 	sub	w1, w1, #1
 	ldrh	w3, [x2, 688]
 	cmp	w3, w1
-	blt	.L2654
+	blt	.L2629
 	add	x0, x2, x0, uxth 1
 	ldrh	w21, [x0, 416]
 	mov	w0, 65535
 	cmp	w21, w0
-	bne	.L2656
-	adrp	x1, .LANCHOR200
-	add	x1, x1, :lo12:.LANCHOR200
+	bne	.L2631
+	adrp	x1, .LANCHOR199
+	add	x1, x1, :lo12:.LANCHOR199
 	mov	w2, 131
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
@@ -16139,7 +15990,7 @@ pm_gc:
 	ldr	x1, [x20, #:lo12:.LANCHOR97]
 	add	x0, x1, x0, uxth 1
 	ldrh	w21, [x0, 416]
-.L2656:
+.L2631:
 	bl	pm_select_ram_region
 	and	x24, x0, 65535
 	adrp	x1, .LANCHOR130
@@ -16151,28 +16002,28 @@ pm_gc:
 	ldrh	w0, [x2, x0]
 	mov	w2, 65535
 	cmp	w0, w2
-	beq	.L2657
+	beq	.L2632
 	ldr	x1, [x19, 8]
-	cbz	x1, .L2657
+	cbz	x1, .L2632
 	ldrsh	w2, [x19, 2]
-	tbz	w2, #31, .L2657
+	tbz	w2, #31, .L2632
 	bl	pm_write_page
 	ldrh	w0, [x19, 2]
 	and	w0, w0, 32767
 	strh	w0, [x19, 2]
-.L2657:
+.L2632:
 	add	x1, x23, :lo12:.LANCHOR130
 	adrp	x25, .LANCHOR99
 	add	x24, x1, x24, lsl 4
 	add	x25, x25, :lo12:.LANCHOR99
 	mov	w19, 0
-.L2658:
+.L2633:
 	ldr	x1, [x20, #:lo12:.LANCHOR97]
 	ldrh	w0, [x1, 698]
 	cmp	w0, w19
-	bhi	.L2660
+	bhi	.L2635
 	bl	pm_free_sblk
-.L2654:
+.L2629:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -16180,7 +16031,7 @@ pm_gc:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2660:
+.L2635:
 	add	x1, x1, x19, sxtw 2
 	ldrh	w3, [x25]
 	mov	w0, 21
@@ -16195,7 +16046,7 @@ pm_gc:
 	ldrb	w1, [x1, #:lo12:.LANCHOR98]
 	udiv	w0, w0, w1
 	cmp	w21, w0, uxth
-	bne	.L2659
+	bne	.L2634
 	mov	w1, w22
 	mov	w0, w19
 	bl	load_l2p_region
@@ -16204,10 +16055,10 @@ pm_gc:
 	bl	pm_write_page
 	mov	w0, -1
 	strh	w0, [x24]
-.L2659:
+.L2634:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L2658
+	b	.L2633
 	.size	pm_gc, .-pm_gc
 	.section	.text.pm_flush_id,"ax",@progbits
 	.align	2
@@ -16229,10 +16080,10 @@ pm_flush_id:
 	strh	w0, [x19, 2]
 	adrp	x19, .LANCHOR128
 	ldr	w0, [x19, #:lo12:.LANCHOR128]
-	cbz	w0, .L2666
+	cbz	w0, .L2641
 	bl	pm_gc
 	str	wzr, [x19, #:lo12:.LANCHOR128]
-.L2666:
+.L2641:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -16250,17 +16101,17 @@ pm_flush:
 	add	x19, x19, :lo12:.LANCHOR130
 	mov	w20, 0
 	add	x19, x19, 2
-.L2673:
+.L2648:
 	ldrsh	w0, [x19]
-	tbz	w0, #31, .L2672
+	tbz	w0, #31, .L2647
 	mov	w0, w20
 	bl	pm_flush_id
-.L2672:
+.L2647:
 	add	w20, w20, 1
 	add	x19, x19, 16
 	and	w20, w20, 65535
 	cmp	w20, 32
-	bne	.L2673
+	bne	.L2648
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -16314,35 +16165,35 @@ pm_init:
 	stp	x21, x22, [sp, 32]
 	adrp	x20, .LANCHOR130
 	str	wzr, [x0, #:lo12:.LANCHOR128]
-	adrp	x0, .LANCHOR192
+	adrp	x0, .LANCHOR191
 	stp	x25, x26, [sp, 64]
 	add	x19, x20, :lo12:.LANCHOR130
-	strb	w1, [x0, #:lo12:.LANCHOR192]
+	strb	w1, [x0, #:lo12:.LANCHOR191]
 	mov	w0, 64
 	stp	x27, x28, [sp, 80]
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR191
+	adrp	x1, .LANCHOR190
 	adrp	x22, .LANCHOR121
 	add	x23, x19, 512
 	mov	x21, x1
 	add	x22, x22, :lo12:.LANCHOR121
-	str	x0, [x1, #:lo12:.LANCHOR191]
+	str	x0, [x1, #:lo12:.LANCHOR190]
 	mov	w25, -1
-.L2683:
+.L2658:
 	strh	w25, [x19]
 	strh	wzr, [x19, 2]
-	cbz	w24, .L2682
+	cbz	w24, .L2657
 	ldrb	w0, [x22]
 	lsl	w0, w0, 9
 	bl	ftl_malloc
 	str	x0, [x19, 8]
-.L2682:
+.L2657:
 	add	x19, x19, 16
 	cmp	x19, x23
-	bne	.L2683
+	bne	.L2658
 	add	x0, x20, :lo12:.LANCHOR130
 	adrp	x19, .LANCHOR97
-	ldr	x24, [x21, #:lo12:.LANCHOR191]
+	ldr	x24, [x21, #:lo12:.LANCHOR190]
 	mov	w4, 4
 	ldr	x25, [x0, 8]
 	mov	x3, x24
@@ -16356,11 +16207,11 @@ pm_init:
 	mov	w23, w26
 	ldrh	w2, [x0, 696]
 	cmp	w2, w26
-	bgt	.L2684
+	bgt	.L2659
 	ldrh	w1, [x0, 692]
 	mov	w3, w26
-	adrp	x0, .LC169
-	add	x0, x0, :lo12:.LC169
+	adrp	x0, .LC168
+	add	x0, x0, :lo12:.LC168
 	adrp	x27, .LANCHOR105
 	adrp	x28, .LANCHOR121
 	add	x27, x27, :lo12:.LANCHOR105
@@ -16368,14 +16219,14 @@ pm_init:
 	bl	printf
 	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	ldrsh	w21, [x0, 696]
-.L2685:
+.L2660:
 	cmp	w21, w26
-	ble	.L2687
-	adrp	x0, .LANCHOR182
+	ble	.L2662
+	adrp	x0, .LANCHOR181
 	mov	w1, 1
 	add	x20, x20, :lo12:.LANCHOR130
 	add	w23, w23, 1
-	strb	w1, [x0, #:lo12:.LANCHOR182]
+	strb	w1, [x0, #:lo12:.LANCHOR181]
 	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	strh	w23, [x0, 696]
 	bl	pm_free_sblk
@@ -16385,7 +16236,7 @@ pm_init:
 	ldr	x1, [x20, 8]
 	mov	w0, -1
 	bl	pm_write_page
-.L2684:
+.L2659:
 	bl	pm_free_sblk
 	bl	pm_gc
 	mov	w0, 0
@@ -16396,7 +16247,7 @@ pm_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2687:
+.L2662:
 	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	x3, x24
 	ldrh	w1, [x27]
@@ -16415,25 +16266,25 @@ pm_init:
 	ldrh	w3, [x0, 694]
 	add	w1, w1, 1
 	str	w1, [x0, 48]
-	adrp	x0, .LC170
-	add	x0, x0, :lo12:.LC170
+	adrp	x0, .LC169
+	add	x0, x0, :lo12:.LC169
 	ldr	w1, [x24]
 	bl	printf
 	ldr	w4, [x29, 108]
 	cmp	w4, 512
 	ccmn	w4, #1, 4, ne
-	beq	.L2686
+	beq	.L2661
 	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	ldr	w0, [x24]
 	ldrh	w2, [x1, 698]
 	cmp	w0, w2
-	bcs	.L2686
+	bcs	.L2661
 	add	x0, x1, x0, uxtw 2
 	str	w22, [x0, 704]
-.L2686:
+.L2661:
 	add	w21, w21, 1
 	sxth	w21, w21
-	b	.L2685
+	b	.L2660
 	.size	pm_init, .-pm_init
 	.section	.text.pm_log2phys,"ax",@progbits
 	.align	2
@@ -16458,51 +16309,51 @@ pm_log2phys:
 	cmp	w0, w2
 	and	w25, w21, 65535
 	msub	w20, w25, w20, w0
-	bcc	.L2697
+	bcc	.L2672
 	mov	w1, w0
-	adrp	x0, .LC171
-	add	x0, x0, :lo12:.LC171
+	adrp	x0, .LC170
+	add	x0, x0, :lo12:.LC170
 	bl	printf
 	mov	w0, -1
-.L2696:
+.L2671:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2697:
+.L2672:
 	adrp	x24, .LANCHOR130
 	add	x0, x24, :lo12:.LANCHOR130
 	and	x20, x20, 65535
 	add	x0, x0, 8
 	mov	x19, 0
-.L2703:
+.L2678:
 	ldr	x1, [x0]
-	cbz	x1, .L2699
+	cbz	x1, .L2674
 	ldrh	w1, [x0, -8]
 	cmp	w1, w25
-	bne	.L2699
-.L2700:
-	cbnz	w23, .L2701
+	bne	.L2674
+.L2675:
+	cbnz	w23, .L2676
 	add	x0, x24, :lo12:.LANCHOR130
 	add	x0, x0, x19, lsl 4
 	ldr	x0, [x0, 8]
 	ldr	w0, [x0, x20, lsl 2]
 	str	w0, [x22]
-.L2702:
+.L2677:
 	add	x24, x24, :lo12:.LANCHOR130
 	add	x19, x24, x19, lsl 4
 	ldrh	w0, [x19, 2]
 	mvn	x1, x0
 	tst	x1, 32767
-	beq	.L2705
+	beq	.L2680
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L2705:
+.L2680:
 	mov	w0, 0
-	b	.L2696
-.L2701:
+	b	.L2671
+.L2676:
 	add	x0, x24, :lo12:.LANCHOR130
 	ldr	w2, [x22]
 	add	x0, x0, x19, lsl 4
@@ -16513,13 +16364,13 @@ pm_log2phys:
 	strh	w1, [x0, 2]
 	adrp	x0, .LANCHOR131
 	strb	w21, [x0, #:lo12:.LANCHOR131]
-	b	.L2702
-.L2699:
+	b	.L2677
+.L2674:
 	add	w19, w19, 1
 	add	x0, x0, 16
 	and	x19, x19, 65535
 	cmp	w19, 32
-	bne	.L2703
+	bne	.L2678
 	bl	pm_select_ram_region
 	and	x19, x0, 65535
 	sbfiz	x1, x19, 4, 32
@@ -16529,17 +16380,17 @@ pm_log2phys:
 	ldrh	w2, [x2, x1]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L2704
+	beq	.L2679
 	ldrsh	w1, [x3, 2]
-	tbz	w1, #31, .L2704
+	tbz	w1, #31, .L2679
 	bl	pm_flush_id
-.L2704:
-	adrp	x0, .LANCHOR201
+.L2679:
+	adrp	x0, .LANCHOR200
 	mov	w1, w26
-	strb	w19, [x0, #:lo12:.LANCHOR201]
+	strb	w19, [x0, #:lo12:.LANCHOR200]
 	mov	w0, w25
 	bl	load_l2p_region
-	b	.L2700
+	b	.L2675
 	.size	pm_log2phys, .-pm_log2phys
 	.section	.text.gc_recovery,"ax",@progbits
 	.align	2
@@ -16567,7 +16418,7 @@ gc_recovery:
 	mov	w0, 65535
 	cmp	w1, w0
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
-	beq	.L2712
+	beq	.L2687
 	mov	w1, -1
 	strh	w1, [x0, 130]
 	mov	w0, 1
@@ -16587,29 +16438,29 @@ gc_recovery:
 	ldrb	w0, [x2, #:lo12:.LANCHOR68]
 	str	w1, [x29, 200]
 	cmp	w0, 3
-	bne	.L2713
+	bne	.L2688
 	adrp	x0, .LANCHOR80
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	sub	w0, w0, #1
 	add	w0, w0, w1
 	orr	w0, w0, 50331648
-.L2757:
+.L2732:
 	str	w0, [x25, 40]
-.L2714:
+.L2689:
 	mov	w1, 1
 	mov	x0, x25
 	bl	sblk_read_page
 	ldr	w0, [x25, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2715
+	beq	.L2690
 	ldr	x0, [x25, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L2716
-.L2715:
+	beq	.L2691
+.L2690:
 	mov	x0, x25
 	bl	buf_free
 	ldr	x1, [x25, 24]
@@ -16622,13 +16473,13 @@ gc_recovery:
 	str	w2, [sp]
 	ldp	w3, w4, [x0]
 	ldp	w5, w6, [x0, 8]
-	adrp	x0, .LC172
+	adrp	x0, .LC171
 	ldr	w7, [x1]
-	add	x0, x0, :lo12:.LC172
+	add	x0, x0, :lo12:.LC171
 	ldr	w1, [x25, 40]
 	ldr	w2, [x25, 52]
 	bl	printf
-.L2761:
+.L2736:
 	adrp	x0, .LANCHOR9
 	ldrh	w1, [x20, 80]
 	mov	w28, 0
@@ -16637,11 +16488,11 @@ gc_recovery:
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	ldrh	w1, [x20, 80]
 	strh	w1, [x0, 130]
-.L2717:
+.L2692:
 	ldrh	w1, [x20, 80]
 	mov	w2, w28
-	adrp	x0, .LC174
-	add	x0, x0, :lo12:.LC174
+	adrp	x0, .LC173
+	add	x0, x0, :lo12:.LC173
 	bl	printf
 	mov	w0, -1
 	strh	w0, [x20, 80]
@@ -16651,9 +16502,9 @@ gc_recovery:
 	mov	w1, 65535
 	ldrh	w0, [x0, 130]
 	cmp	w0, w1
-	beq	.L2744
+	beq	.L2719
 	bl	ftl_free_sblk
-.L2744:
+.L2719:
 	adrp	x0, .LANCHOR97
 	ldr	x1, [x0, #:lo12:.LANCHOR97]
 	mov	w0, -1
@@ -16662,7 +16513,7 @@ gc_recovery:
 	strh	w0, [x1, 130]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2711:
+.L2686:
 	ldp	x19, x20, [sp, 48]
 	ldp	x21, x22, [sp, 64]
 	ldp	x23, x24, [sp, 80]
@@ -16671,16 +16522,16 @@ gc_recovery:
 	ldp	x29, x30, [sp, 32]
 	add	sp, sp, 240
 	ret
-.L2713:
+.L2688:
 	cmp	w0, 2
-	bne	.L2714
+	bne	.L2689
 	adrp	x0, .LANCHOR80
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	add	w0, w1, w0, lsl 1
 	sub	w0, w0, #1
 	orr	w0, w0, 33554432
-	b	.L2757
-.L2716:
+	b	.L2732
+.L2691:
 	adrp	x19, .LANCHOR72
 	adrp	x22, .LANCHOR73
 	adrp	x23, .LANCHOR147
@@ -16706,29 +16557,29 @@ gc_recovery:
 	ldr	x0, [x29, 168]
 	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w0, 2
-	beq	.L2718
-.L2758:
+	beq	.L2693
+.L2733:
 	str	w0, [x29, 184]
-	adrp	x26, .LC173
+	adrp	x26, .LC172
 	ldr	x0, [x29, 152]
 	mov	w22, 0
 	mov	w28, 0
 	add	x0, x0, :lo12:.LANCHOR105
 	str	x0, [x29, 128]
-	add	x0, x26, :lo12:.LC173
+	add	x0, x26, :lo12:.LC172
 	str	x0, [x29, 120]
-.L2720:
+.L2695:
 	sub	w0, w22, #1
 	str	w0, [x29, 188]
 	cmp	w22, w14
-	beq	.L2729
+	beq	.L2704
 	mov	x27, 0
-	b	.L2730
-.L2718:
+	b	.L2705
+.L2693:
 	lsl	w14, w14, 1
 	mov	w0, 1
-	b	.L2758
-.L2726:
+	b	.L2733
+.L2701:
 	ldr	x1, [x29, 128]
 	ldr	x0, [x29, 160]
 	ldrh	w1, [x1]
@@ -16738,10 +16589,10 @@ gc_recovery:
 	str	w0, [x29, 200]
 	ldrb	w1, [x1]
 	cmp	w1, 3
-	bne	.L2721
+	bne	.L2696
 	add	w0, w22, w0
 	orr	w0, w0, w26, lsl 24
-.L2759:
+.L2734:
 	str	w0, [x25, 40]
 	mov	w1, 1
 	str	w14, [x29, 112]
@@ -16753,13 +16604,13 @@ gc_recovery:
 	ldr	x0, [x25, 24]
 	ldr	w6, [x0, 4]
 	cmp	w3, w6
-	bne	.L2724
+	bne	.L2699
 	ldr	x1, [x24, #:lo12:.LANCHOR148]
 	ldr	w2, [x1, x19]
 	ldr	w1, [x0, 8]
 	cmp	w2, w1
-	beq	.L2725
-.L2724:
+	beq	.L2700
+.L2699:
 	ldr	x1, [x24, #:lo12:.LANCHOR148]
 	ldr	w2, [x0, 12]
 	str	w2, [sp]
@@ -16775,35 +16626,35 @@ gc_recovery:
 	ldr	w14, [x29, 112]
 	ldr	w0, [x0, x19]
 	cmn	w0, #1
-	beq	.L2725
+	beq	.L2700
 	mov	x0, x25
 	bl	buf_free
-	b	.L2761
-.L2721:
+	b	.L2736
+.L2696:
 	cmp	w1, 2
-	bne	.L2723
+	bne	.L2698
 	ldr	w1, [x29, 188]
 	add	w0, w0, w1
 	add	w0, w0, w26
 	orr	w0, w0, 33554432
-	b	.L2759
-.L2723:
+	b	.L2734
+.L2698:
 	add	w0, w22, w0
-	b	.L2759
-.L2725:
+	b	.L2734
+.L2700:
 	add	w28, w28, 1
 	add	w26, w26, 1
 	add	x19, x19, 4
-.L2728:
+.L2703:
 	ldr	w0, [x29, 184]
 	cmp	w0, w26
-	bcs	.L2726
+	bcs	.L2701
 	add	x27, x27, 1
-.L2730:
+.L2705:
 	ldr	x0, [x29, 176]
 	ldrb	w0, [x0, 9]
 	cmp	w0, w27
-	ble	.L2727
+	ble	.L2702
 	add	x0, x20, x27, lsl 1
 	str	x0, [x29, 160]
 	ldr	x0, [x29, 168]
@@ -16811,11 +16662,11 @@ gc_recovery:
 	mov	w26, 1
 	add	x0, x0, :lo12:.LANCHOR68
 	str	x0, [x29, 136]
-	b	.L2728
-.L2727:
+	b	.L2703
+.L2702:
 	add	w22, w22, 1
-	b	.L2720
-.L2729:
+	b	.L2695
+.L2704:
 	mov	x0, x25
 	bl	buf_free
 	ldr	x3, [x29, 144]
@@ -16834,20 +16685,20 @@ gc_recovery:
 	adrp	x0, .LANCHOR99
 	add	x0, x0, :lo12:.LANCHOR99
 	str	x0, [x29, 112]
-.L2731:
+.L2706:
 	sub	w0, w27, #1
 	str	w0, [x29, 136]
 	cmp	w22, w27
-	beq	.L2742
+	beq	.L2717
 	mov	x26, 0
-	b	.L2743
-.L2739:
+	b	.L2718
+.L2714:
 	ldr	w0, [x29, 188]
 	ldr	x1, [x23, #:lo12:.LANCHOR147]
 	sbfiz	x0, x0, 2, 32
 	ldr	w6, [x1, x0]
 	cmn	w6, #1
-	beq	.L2732
+	beq	.L2707
 	ldr	x1, [x24, #:lo12:.LANCHOR148]
 	str	w6, [x29, 108]
 	ldr	w0, [x1, x0]
@@ -16857,14 +16708,14 @@ gc_recovery:
 	str	w0, [x29, 204]
 	cmn	w0, #1
 	ldr	w6, [x29, 108]
-	bne	.L2733
+	bne	.L2708
 	mov	w0, w6
 	str	w6, [x29, 108]
 	mov	w2, 0
 	add	x1, x29, 204
 	bl	pm_log2phys
 	ldr	w6, [x29, 108]
-.L2733:
+.L2708:
 	ldr	x0, [x29, 128]
 	ldr	x1, [x29, 152]
 	ldrh	w0, [x0, 96]
@@ -16873,10 +16724,10 @@ gc_recovery:
 	ldr	x1, [x29, 168]
 	ldrb	w1, [x1, #:lo12:.LANCHOR68]
 	cmp	w1, 3
-	bne	.L2734
+	bne	.L2709
 	add	w0, w27, w0
 	orr	w0, w0, w25, lsl 24
-.L2760:
+.L2735:
 	str	w0, [x29, 200]
 	mov	w19, 21
 	ldr	x0, [x29, 112]
@@ -16894,14 +16745,14 @@ gc_recovery:
 	ldr	w0, [x29, 204]
 	cmp	w1, w0
 	and	x19, x19, 65535
-	bne	.L2737
+	bne	.L2712
 	add	x1, x29, 200
 	mov	w0, w6
 	bl	pm_log2phys
 	add	w28, w28, 1
 	mov	w0, w19
 	bl	ftl_vpn_decrement
-.L2738:
+.L2713:
 	ldr	w0, [x29, 188]
 	add	w0, w0, 1
 	str	w0, [x29, 188]
@@ -16910,66 +16761,66 @@ gc_recovery:
 	add	x0, x0, x19, lsl 2
 	ldrb	w0, [x0, 2]
 	tst	w0, 224
-	bne	.L2732
+	bne	.L2707
 	ldr	x0, [x29, 144]
 	lsl	x19, x19, 1
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x0, x19]
-	cbz	w1, .L2732
+	cbz	w1, .L2707
 	strh	wzr, [x0, x19]
-.L2732:
+.L2707:
 	add	w25, w25, 1
-.L2741:
+.L2716:
 	ldr	w0, [x29, 184]
 	cmp	w0, w25
-	bcs	.L2739
+	bcs	.L2714
 	add	x26, x26, 1
-.L2743:
+.L2718:
 	ldr	x0, [x29, 176]
 	ldrb	w0, [x0, 9]
 	cmp	w0, w26
-	ble	.L2740
+	ble	.L2715
 	add	x0, x20, x26, lsl 1
 	mov	w25, 1
 	str	x0, [x29, 128]
 	adrp	x0, .LANCHOR98
 	add	x0, x0, :lo12:.LANCHOR98
 	str	x0, [x29, 120]
-	b	.L2741
-.L2734:
+	b	.L2716
+.L2709:
 	cmp	w1, 2
-	bne	.L2736
+	bne	.L2711
 	ldr	w1, [x29, 136]
 	add	w0, w0, w1
 	add	w0, w0, w25
 	orr	w0, w0, 33554432
-	b	.L2760
-.L2736:
+	b	.L2735
+.L2711:
 	add	w0, w27, w0
-	b	.L2760
-.L2737:
+	b	.L2735
+.L2712:
 	ldr	w1, [x29, 200]
 	cmp	w0, w1
 	cinc	w28, w28, eq
-	b	.L2738
-.L2740:
+	b	.L2713
+.L2715:
 	add	w27, w27, 1
-	b	.L2731
-.L2742:
+	b	.L2706
+.L2717:
 	ldr	x0, [x29, 144]
 	ldrh	w1, [x20, 80]
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	strh	w28, [x0, x1, lsl 1]
-	b	.L2717
-.L2712:
+	b	.L2692
+.L2687:
 	ldrh	w0, [x0, 130]
 	cmp	w0, w1
-	beq	.L2711
+	beq	.L2686
 	adrp	x19, .LANCHOR97
 	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	ldrh	w1, [x1, 126]
 	cmp	w1, w0
-	bne	.L2746
+	bne	.L2721
 	bl	pm_flush
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	ldrh	w0, [x0, 130]
@@ -16979,11 +16830,11 @@ gc_recovery:
 	strh	w1, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2746:
+.L2721:
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	mov	w1, -1
 	strh	w1, [x0, 130]
-	b	.L2711
+	b	.L2686
 	.size	gc_recovery, .-gc_recovery
 	.section	.text.zftl_init,"ax",@progbits
 	.align	2
@@ -17005,21 +16856,21 @@ zftl_init:
 	strb	w0, [x1, #:lo12:.LANCHOR124]
 	adrp	x1, .LANCHOR125
 	stp	x23, x24, [sp, 48]
-	adrp	x20, .LANCHOR199
+	adrp	x20, .LANCHOR198
 	strb	wzr, [x1, #:lo12:.LANCHOR125]
-	adrp	x1, .LANCHOR174
+	adrp	x1, .LANCHOR173
 	stp	x25, x26, [sp, 64]
 	adrp	x23, .LANCHOR6
-	strb	w0, [x1, #:lo12:.LANCHOR174]
+	strb	w0, [x1, #:lo12:.LANCHOR173]
 	adrp	x0, .LANCHOR119
 	mov	w1, -1
 	stp	x27, x28, [sp, 80]
 	strb	wzr, [x0, #:lo12:.LANCHOR119]
-	adrp	x0, .LANCHOR202
-	str	w1, [x0, #:lo12:.LANCHOR202]
-	adrp	x1, .LC175
+	adrp	x0, .LANCHOR201
+	str	w1, [x0, #:lo12:.LANCHOR201]
+	adrp	x1, .LC174
 	adrp	x0, .LC91
-	add	x1, x1, :lo12:.LC175
+	add	x1, x1, :lo12:.LC174
 	add	x0, x0, :lo12:.LC91
 	bl	printf
 	adrp	x1, .LANCHOR34
@@ -17050,14 +16901,14 @@ zftl_init:
 	strh	w8, [x22, #:lo12:.LANCHOR80]
 	mul	w6, w6, w3
 	strh	w4, [x1, #:lo12:.LANCHOR105]
-	strh	w10, [x20, #:lo12:.LANCHOR199]
+	strh	w10, [x20, #:lo12:.LANCHOR198]
 	mov	w3, 1
 	and	w6, w6, 255
 	mov	w1, 0
 	strb	w6, [x21, #:lo12:.LANCHOR73]
-.L2763:
+.L2738:
 	cmp	w4, w3
-	bcs	.L2764
+	bcs	.L2739
 	mul	w2, w0, w2
 	adrp	x3, .LANCHOR99
 	sub	w1, w1, #1
@@ -17066,9 +16917,9 @@ zftl_init:
 	mov	w1, 1
 	mul	w3, w2, w7
 	lsr	w11, w3, 21
-.L2765:
+.L2740:
 	cmp	w11, w1
-	bcs	.L2766
+	bcs	.L2741
 	mov	w1, 57344
 	sub	w4, w4, #1
 	movk	w1, 0x1c, lsl 16
@@ -17076,9 +16927,9 @@ zftl_init:
 	adrp	x28, .LANCHOR118
 	sub	w11, w10, #1
 	mul	w1, w6, w1
-	adrp	x24, .LANCHOR187
+	adrp	x24, .LANCHOR186
 	mul	w8, w8, w6
-	adrp	x27, .LANCHOR204
+	adrp	x27, .LANCHOR203
 	mul	w2, w2, w6
 	adrp	x26, .LANCHOR141
 	lsl	w1, w1, w4
@@ -17086,10 +16937,10 @@ zftl_init:
 	sub	w2, w2, #1
 	adrp	x25, .LANCHOR84
 	str	w1, [x4, #:lo12:.LANCHOR58]
-	adrp	x4, .LANCHOR203
-	str	w3, [x4, #:lo12:.LANCHOR203]
+	adrp	x4, .LANCHOR202
+	str	w3, [x4, #:lo12:.LANCHOR202]
 	add	w3, w1, 24576
-	str	w3, [x27, #:lo12:.LANCHOR204]
+	str	w3, [x27, #:lo12:.LANCHOR203]
 	udiv	w0, w3, w0
 	udiv	w3, w3, w2
 	adrp	x2, .LANCHOR101
@@ -17097,7 +16948,7 @@ zftl_init:
 	add	w0, w11, w0, lsl 2
 	add	w3, w3, 8
 	udiv	w0, w0, w10
-	strh	w0, [x24, #:lo12:.LANCHOR187]
+	strh	w0, [x24, #:lo12:.LANCHOR186]
 	ubfiz	w0, w0, 4, 16
 	sdiv	w0, w0, w8
 	adrp	x8, .LANCHOR88
@@ -17110,10 +16961,10 @@ zftl_init:
 	lsr	w0, w7, 4
 	strh	w0, [x25, #:lo12:.LANCHOR84]
 	cmp	w0, 79
-	bhi	.L2767
+	bhi	.L2742
 	mov	w0, 80
 	strh	w0, [x25, #:lo12:.LANCHOR84]
-.L2767:
+.L2742:
 	adrp	x7, .LANCHOR102
 	mov	w0, 2000
 	adrp	x3, .LANCHOR100
@@ -17130,11 +16981,11 @@ zftl_init:
 	mov	w8, 32
 	cmp	w5, 2
 	strh	w8, [x0, #:lo12:.LANCHOR8]
-	beq	.L2768
+	beq	.L2743
 	adrp	x5, .LANCHOR70
 	ldrb	w5, [x5, #:lo12:.LANCHOR70]
-	cbz	w5, .L2769
-.L2768:
+	cbz	w5, .L2744
+.L2743:
 	mov	w5, 150
 	strh	w5, [x3, #:lo12:.LANCHOR100]
 	mov	w3, 64
@@ -17143,80 +16994,80 @@ zftl_init:
 	strh	w2, [x0, #:lo12:.LANCHOR8]
 	adrp	x2, .LANCHOR0
 	ldrb	w2, [x2, #:lo12:.LANCHOR0]
-	cbnz	w2, .L2769
+	cbnz	w2, .L2744
 	mov	w2, 4
 	strh	w2, [x0, #:lo12:.LANCHOR8]
 	mov	w0, 600
 	strh	w0, [x7, #:lo12:.LANCHOR102]
 	mov	w0, 128
 	strh	w0, [x6, #:lo12:.LANCHOR140]
-.L2769:
+.L2744:
 	adrp	x19, .LANCHOR14
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2771
+	tbz	x0, 12, .L2746
 	str	x4, [x29, 96]
+	adrp	x0, .LC175
+	add	x0, x0, :lo12:.LC175
+	bl	printf
+	ldr	x4, [x29, 96]
+.L2746:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2747
+	ldr	w1, [x4, #:lo12:.LANCHOR202]
 	adrp	x0, .LC176
 	add	x0, x0, :lo12:.LC176
 	bl	printf
-	ldr	x4, [x29, 96]
-.L2771:
+.L2747:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2772
-	ldr	w1, [x4, #:lo12:.LANCHOR203]
+	tbz	x0, 12, .L2748
+	ldr	w1, [x28, #:lo12:.LANCHOR118]
 	adrp	x0, .LC177
 	add	x0, x0, :lo12:.LC177
 	bl	printf
-.L2772:
+.L2748:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2773
-	ldr	w1, [x28, #:lo12:.LANCHOR118]
+	tbz	x0, 12, .L2749
+	ldr	w1, [x27, #:lo12:.LANCHOR203]
 	adrp	x0, .LC178
 	add	x0, x0, :lo12:.LC178
 	bl	printf
-.L2773:
+.L2749:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2774
-	ldr	w1, [x27, #:lo12:.LANCHOR204]
+	tbz	x0, 12, .L2750
+	ldrh	w1, [x24, #:lo12:.LANCHOR186]
 	adrp	x0, .LC179
 	add	x0, x0, :lo12:.LC179
 	bl	printf
-.L2774:
+.L2750:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2775
-	ldrh	w1, [x24, #:lo12:.LANCHOR187]
+	tbz	x0, 12, .L2751
+	ldrh	w1, [x20, #:lo12:.LANCHOR198]
 	adrp	x0, .LC180
 	add	x0, x0, :lo12:.LC180
 	bl	printf
-.L2775:
+.L2751:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2776
-	ldrh	w1, [x20, #:lo12:.LANCHOR199]
+	tbz	x0, 12, .L2752
+	ldrh	w1, [x26, #:lo12:.LANCHOR141]
 	adrp	x0, .LC181
 	add	x0, x0, :lo12:.LC181
 	bl	printf
-.L2776:
+.L2752:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2777
-	ldrh	w1, [x26, #:lo12:.LANCHOR141]
+	tbz	x0, 12, .L2753
+	ldrh	w1, [x25, #:lo12:.LANCHOR84]
 	adrp	x0, .LC182
 	add	x0, x0, :lo12:.LC182
 	bl	printf
-.L2777:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2778
-	ldrh	w1, [x25, #:lo12:.LANCHOR84]
-	adrp	x0, .LC183
-	add	x0, x0, :lo12:.LC183
-	bl	printf
-.L2778:
+.L2753:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2779
+	tbz	x0, 12, .L2754
 	ldr	x0, [x29, 104]
 	ldrh	w1, [x0, #:lo12:.LANCHOR88]
-	adrp	x0, .LC184
-	add	x0, x0, :lo12:.LC184
+	adrp	x0, .LC183
+	add	x0, x0, :lo12:.LC183
 	bl	printf
-.L2779:
+.L2754:
 	bl	buf_init
 	adrp	x25, .LANCHOR10
 	ldrh	w1, [x23, #:lo12:.LANCHOR6]
@@ -17248,15 +17099,15 @@ zftl_init:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	add	x1, x2, x1, sxtw 2
 	str	x1, [x25, #:lo12:.LANCHOR10]
-	tbz	x0, 12, .L2780
-	adrp	x0, .LC185
-	add	x0, x0, :lo12:.LC185
+	tbz	x0, 12, .L2755
+	adrp	x0, .LC184
+	add	x0, x0, :lo12:.LC184
 	bl	printf
-.L2780:
+.L2755:
 	ldrh	w0, [x22, #:lo12:.LANCHOR80]
 	ldrb	w21, [x21, #:lo12:.LANCHOR73]
 	ldrh	w1, [x23, #:lo12:.LANCHOR6]
-	ldrh	w22, [x24, #:lo12:.LANCHOR187]
+	ldrh	w22, [x24, #:lo12:.LANCHOR186]
 	mul	w21, w0, w21
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	add	w21, w1, w21, lsl 2
@@ -17265,37 +17116,37 @@ zftl_init:
 	add	w22, w1, w22, lsl 2
 	add	w21, w21, 632
 	add	w22, w22, 704
-	tbz	x0, 12, .L2781
-	ldrh	w3, [x20, #:lo12:.LANCHOR199]
-	adrp	x0, .LC186
+	tbz	x0, 12, .L2756
+	ldrh	w3, [x20, #:lo12:.LANCHOR198]
+	adrp	x0, .LC185
 	mov	w2, w22
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC186
+	add	x0, x0, :lo12:.LC185
 	bl	printf
-.L2781:
-	ldrh	w0, [x20, #:lo12:.LANCHOR199]
+.L2756:
+	ldrh	w0, [x20, #:lo12:.LANCHOR198]
 	cmp	w21, w0
-	bhi	.L2782
+	bhi	.L2757
 	cmp	w22, w0
-	bls	.L2783
-.L2782:
-.L2826:
-	b	.L2826
-.L2764:
+	bls	.L2758
+.L2757:
+.L2801:
+	b	.L2801
+.L2739:
 	add	w1, w1, 1
 	lsl	w3, w3, 1
 	and	w1, w1, 65535
-	b	.L2763
-.L2766:
+	b	.L2738
+.L2741:
 	add	w4, w4, 1
 	lsl	w1, w1, 1
 	and	w4, w4, 65535
-	b	.L2765
-.L2783:
+	b	.L2740
+.L2758:
 	bl	sblk_init
 	bl	ftl_info_blk_init
 	cmn	w0, #1
-	beq	.L2762
+	beq	.L2737
 	bl	ftl_ext_info_init
 	adrp	x19, .LANCHOR97
 	mov	w0, 1
@@ -17326,20 +17177,20 @@ zftl_init:
 	bl	pm_flush
 	mov	w0, 1
 	bl	ftl_total_vpn_update
-	adrp	x0, .LANCHOR182
-	ldrb	w0, [x0, #:lo12:.LANCHOR182]
-	cbz	w0, .L2785
+	adrp	x0, .LANCHOR181
+	ldrb	w0, [x0, #:lo12:.LANCHOR181]
+	cbz	w0, .L2760
 	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	ldr	w0, [x1, 68]
 	add	w0, w0, 1
 	str	w0, [x1, 68]
-.L2785:
+.L2760:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
 	bl	print_ftl_debug_info
 	mov	w0, 0
-.L2762:
+.L2737:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -17357,14 +17208,14 @@ rk_ftl_init:
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	bl	nand_flash_init
-	cbnz	w0, .L2830
+	cbnz	w0, .L2805
 	bl	zftl_init
-.L2830:
+.L2805:
 	mov	w19, w0
 	bl	idb_init
 	mov	w1, w19
-	adrp	x0, .LC187
-	add	x0, x0, :lo12:.LC187
+	adrp	x0, .LC186
+	add	x0, x0, :lo12:.LC186
 	bl	printf
 	mov	w0, w19
 	ldr	x19, [sp, 16]
@@ -17393,12 +17244,12 @@ gc_update_l2p_map_new:
 	ldrb	w1, [x1, 9]
 	mul	w26, w26, w1
 	ldr	w1, [x24, #:lo12:.LANCHOR14]
-	tbz	x1, 8, .L2833
+	tbz	x1, 8, .L2808
 	ldrh	w1, [x21, 80]
-	adrp	x0, .LC188
-	add	x0, x0, :lo12:.LC188
+	adrp	x0, .LC187
+	add	x0, x0, :lo12:.LC187
 	bl	printf
-.L2833:
+.L2808:
 	adrp	x23, .LANCHOR9
 	ldrh	w1, [x21, 80]
 	sub	w2, w26, #1
@@ -17409,12 +17260,12 @@ gc_update_l2p_map_new:
 	adrp	x0, .LANCHOR121
 	add	x0, x0, :lo12:.LANCHOR121
 	str	x0, [x29, 104]
-.L2834:
+.L2809:
 	mov	w28, w22
 	cmp	w26, w22
-	bhi	.L2844
+	bhi	.L2819
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2845
+	tbz	x0, 8, .L2820
 	ldr	x0, [x29, 128]
 	mov	w3, w25
 	ldr	x1, [x23, #:lo12:.LANCHOR9]
@@ -17422,22 +17273,22 @@ gc_update_l2p_map_new:
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldrh	w2, [x1, x2, lsl 1]
 	ldrh	w1, [x0, 80]
-	adrp	x0, .LC191
-	add	x0, x0, :lo12:.LC191
+	adrp	x0, .LC190
+	add	x0, x0, :lo12:.LC190
 	bl	printf
-.L2845:
+.L2820:
 	ldrh	w1, [x21, 80]
 	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, x1, lsl 1]
 	cmp	w25, w0
-	beq	.L2846
-	adrp	x1, .LANCHOR205
+	beq	.L2821
+	adrp	x1, .LANCHOR204
 	adrp	x0, .LC0
-	mov	w2, 483
-	add	x1, x1, :lo12:.LANCHOR205
+	mov	w2, 488
+	add	x1, x1, :lo12:.LANCHOR204
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2846:
+.L2821:
 	ldrh	w1, [x21, 80]
 	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	strh	w25, [x0, x1, lsl 1]
@@ -17450,13 +17301,13 @@ gc_update_l2p_map_new:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L2844:
+.L2819:
 	adrp	x27, .LANCHOR147
 	lsl	x19, x22, 2
 	ldr	x0, [x27, #:lo12:.LANCHOR147]
 	ldr	w2, [x0, x19]
 	cmn	w2, #1
-	beq	.L2835
+	beq	.L2810
 	adrp	x0, .LANCHOR121
 	ldrb	w20, [x0, #:lo12:.LANCHOR121]
 	lsl	w20, w20, 7
@@ -17464,42 +17315,42 @@ gc_update_l2p_map_new:
 	and	w0, w20, 65535
 	str	w0, [x29, 156]
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2836
+	tbz	x0, 8, .L2811
 	ldr	w1, [x29, 156]
-	adrp	x0, .LC189
+	adrp	x0, .LC188
 	mov	w3, w22
-	add	x0, x0, :lo12:.LC189
+	add	x0, x0, :lo12:.LC188
 	bl	printf
-.L2836:
+.L2811:
 	sub	w28, w26, w28
 	add	x28, x28, x22
 	lsl	x0, x28, 2
 	str	x0, [x29, 144]
-	adrp	x0, .LC190
-	add	x0, x0, :lo12:.LC190
+	adrp	x0, .LC189
+	add	x0, x0, :lo12:.LC189
 	str	x0, [x29, 120]
 	adrp	x0, .LANCHOR99
 	add	x0, x0, :lo12:.LANCHOR99
 	str	x0, [x29, 112]
-.L2837:
+.L2812:
 	ldr	x0, [x29, 144]
 	cmp	x0, x19
-	bne	.L2843
-.L2835:
+	bne	.L2818
+.L2810:
 	add	x22, x22, 1
-	b	.L2834
-.L2843:
+	b	.L2809
+.L2818:
 	ldr	x0, [x27, #:lo12:.LANCHOR147]
 	ldr	w20, [x0, x19]
 	cmn	w20, #1
-	beq	.L2838
+	beq	.L2813
 	ldr	x0, [x29, 104]
 	ldr	w1, [x29, 156]
 	ldrb	w0, [x0]
 	lsl	w0, w0, 7
 	udiv	w0, w20, w0
 	cmp	w1, w0, uxth
-	bne	.L2838
+	bne	.L2813
 	adrp	x0, .LANCHOR148
 	ldr	x0, [x0, #:lo12:.LANCHOR148]
 	ldr	w28, [x0, x19]
@@ -17507,15 +17358,15 @@ gc_update_l2p_map_new:
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 172]
 	cmn	w0, #1
-	bne	.L2839
+	bne	.L2814
 	mov	w2, 0
 	add	x1, x29, 172
 	mov	w0, w20
 	bl	pm_log2phys
-.L2839:
+.L2814:
 	ldr	w3, [x29, 172]
 	cmp	w28, w3
-	bne	.L2840
+	bne	.L2815
 	adrp	x0, .LANCHOR149
 	mov	w2, 1
 	add	x1, x29, 168
@@ -17537,25 +17388,25 @@ gc_update_l2p_map_new:
 	adrp	x0, .LANCHOR98
 	ldrb	w0, [x0, #:lo12:.LANCHOR98]
 	udiv	w0, w28, w0
-.L2866:
+.L2841:
 	bl	ftl_vpn_decrement
 	ldr	x0, [x27, #:lo12:.LANCHOR147]
 	mov	w1, -1
 	str	w1, [x0, x19]
-.L2838:
+.L2813:
 	add	x19, x19, 4
-	b	.L2837
-.L2840:
+	b	.L2812
+.L2815:
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2842
+	tbz	x0, 8, .L2817
 	ldr	x0, [x29, 120]
 	mov	w2, w28
 	mov	w1, w20
 	bl	printf
-.L2842:
+.L2817:
 	ldr	x0, [x29, 136]
 	ldrh	w0, [x0]
-	b	.L2866
+	b	.L2841
 	.size	gc_update_l2p_map_new, .-gc_update_l2p_map_new
 	.section	.text.gc_scan_src_blk_one_page,"ax",@progbits
 	.align	2
@@ -17579,17 +17430,17 @@ gc_scan_src_blk_one_page:
 	adrp	x2, .LANCHOR73
 	ldrb	w4, [x2, #:lo12:.LANCHOR73]
 	ldrh	w2, [x1, 2]
-.L2868:
+.L2843:
 	cmp	w3, w7
-	beq	.L2870
-	cbz	w6, .L2871
+	beq	.L2845
+	cbz	w6, .L2846
 	add	x1, x19, :lo12:.LANCHOR62
 	strb	w0, [x1, 4]
-.L2871:
-	cbz	w5, .L2872
+.L2846:
+	cbz	w5, .L2847
 	add	x0, x19, :lo12:.LANCHOR62
 	strh	w2, [x0, 2]
-.L2872:
+.L2847:
 	adrp	x0, .LANCHOR105
 	ldrh	w22, [x0, #:lo12:.LANCHOR105]
 	adrp	x0, .LANCHOR68
@@ -17597,25 +17448,25 @@ gc_scan_src_blk_one_page:
 	ldrb	w1, [x0, #:lo12:.LANCHOR68]
 	mul	w22, w22, w3
 	cmp	w1, 2
-	bne	.L2873
+	bne	.L2848
 	add	x0, x19, :lo12:.LANCHOR62
 	ldrb	w1, [x0, 6]
-	cbnz	w1, .L2873
+	cbnz	w1, .L2848
 	ldrh	w0, [x0, 2]
 	add	w22, w22, w0, lsl 1
-.L2874:
+.L2849:
 	add	x1, x19, :lo12:.LANCHOR62
 	ldrb	w0, [x1, 4]
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x1, 4]
 	cmp	w4, w0
-	bne	.L2875
+	bne	.L2850
 	ldrh	w0, [x1, 2]
 	strb	wzr, [x1, 4]
 	add	w0, w0, 1
 	strh	w0, [x1, 2]
-.L2875:
+.L2850:
 	mov	w0, 1
 	add	x19, x19, :lo12:.LANCHOR62
 	bl	buf_alloc
@@ -17623,15 +17474,15 @@ gc_scan_src_blk_one_page:
 	mov	x21, x0
 	mov	w20, 0
 	adrp	x24, .LANCHOR65
-.L2885:
+.L2860:
 	ldrb	w0, [x19, 6]
 	cmp	w0, 3
-	bne	.L2876
-	cbz	w20, .L2877
-.L2876:
+	bne	.L2851
+	cbz	w20, .L2852
+.L2851:
 	cmp	w0, w20
-	bgt	.L2878
-.L2886:
+	bgt	.L2853
+.L2861:
 	mov	x0, x21
 	bl	buf_free
 	ldp	x19, x20, [sp, 16]
@@ -17640,33 +17491,33 @@ gc_scan_src_blk_one_page:
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2870:
+.L2845:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	cmp	w0, w4
-	bne	.L2869
+	bne	.L2844
 	add	w2, w2, 1
 	mov	w5, 1
 	and	w2, w2, 65535
 	mov	w0, 0
-.L2869:
+.L2844:
 	add	x3, x1, x0, sxtw 1
 	mov	w6, 1
 	ldrh	w3, [x3, 40]
-	b	.L2868
-.L2873:
+	b	.L2843
+.L2848:
 	add	x0, x19, :lo12:.LANCHOR62
 	ldrh	w0, [x0, 2]
 	add	w22, w0, w22
-	b	.L2874
-.L2878:
+	b	.L2849
+.L2853:
 	ldrb	w1, [x23]
 	cmp	w1, 2
-	bne	.L2879
-	cbnz	w0, .L2879
+	bne	.L2854
+	cbnz	w0, .L2854
 	add	w0, w20, w22
 	orr	w0, w0, 33554432
-.L2899:
+.L2874:
 	str	w0, [x21, 40]
 	mov	w1, 1
 	mov	x0, x21
@@ -17674,40 +17525,40 @@ gc_scan_src_blk_one_page:
 	ldr	w0, [x21, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2882
+	beq	.L2857
 	ldr	x0, [x21, 24]
 	ldr	w25, [x0, 4]
 	mov	w0, w25
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 92]
 	cmn	w0, #1
-	bne	.L2883
+	bne	.L2858
 	mov	w2, 0
 	add	x1, x29, 92
 	mov	w0, w25
 	bl	pm_log2phys
-.L2883:
+.L2858:
 	ldr	w0, [x29, 92]
 	cmp	w22, w0
-	bne	.L2882
+	bne	.L2857
 	ldrh	w0, [x19, 24]
 	ldr	x2, [x24, #:lo12:.LANCHOR65]
 	ubfiz	x1, x0, 2, 16
 	add	w0, w0, 1
 	str	w22, [x2, x1]
 	strh	w0, [x19, 24]
-.L2882:
+.L2857:
 	ldrh	w0, [x19, 26]
 	add	w0, w0, 1
 	strh	w0, [x19, 26]
-.L2877:
+.L2852:
 	add	w20, w20, 1
 	cmp	w20, 4
-	bne	.L2885
-	b	.L2886
-.L2879:
+	bne	.L2860
+	b	.L2861
+.L2854:
 	orr	w0, w22, w20, lsl 24
-	b	.L2899
+	b	.L2874
 	.size	gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page
 	.section	.text.gc_scan_src_blk,"ax",@progbits
 	.align	2
@@ -17724,42 +17575,42 @@ gc_scan_src_blk:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w1, w0
-	bne	.L2901
-	adrp	x1, .LANCHOR206
+	bne	.L2876
+	adrp	x1, .LANCHOR205
 	adrp	x0, .LC0
-	mov	w2, 920
-	add	x1, x1, :lo12:.LANCHOR206
+	mov	w2, 925
+	add	x1, x1, :lo12:.LANCHOR205
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2901:
+.L2876:
 	ldrh	w1, [x19, #:lo12:.LANCHOR62]
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L2921
+	beq	.L2896
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2903
+	tbz	x0, 8, .L2878
 	adrp	x2, .LANCHOR9
 	ubfiz	x0, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC192
-	add	x0, x0, :lo12:.LC192
+	adrp	x0, .LC191
+	add	x0, x0, :lo12:.LC191
 	bl	printf
-.L2903:
+.L2878:
 	ldrh	w0, [x19, #:lo12:.LANCHOR62]
 	add	x14, x19, :lo12:.LANCHOR62
 	add	x1, x14, 40
 	bl	ftl_get_blk_list_in_sblk
 	and	w1, w0, 255
 	strb	w1, [x14, 5]
-	cbnz	w1, .L2904
+	cbnz	w1, .L2879
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR62]
-.L2921:
+.L2896:
 	mov	w0, 0
-	b	.L2900
-.L2904:
+	b	.L2875
+.L2879:
 	adrp	x4, .LANCHOR7
 	ldrh	w3, [x19, #:lo12:.LANCHOR62]
 	mov	x22, x4
@@ -17769,59 +17620,59 @@ gc_scan_src_blk:
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 32
-	beq	.L2905
+	beq	.L2880
 	cmp	w1, 224
-	beq	.L2905
-	cbz	w1, .L2906
+	beq	.L2880
+	cbz	w1, .L2881
 	adrp	x1, .LANCHOR10
 	ldr	x1, [x1, #:lo12:.LANCHOR10]
 	ldrh	w3, [x1, 16]
 	cmp	w3, w2
-	beq	.L2905
+	beq	.L2880
 	ldrh	w3, [x1, 48]
 	cmp	w3, w2
-	beq	.L2905
+	beq	.L2880
 	ldrh	w1, [x1, 80]
 	cmp	w1, w2
-	bne	.L2935
-.L2905:
+	bne	.L2910
+.L2880:
 	add	x0, x19, :lo12:.LANCHOR62
 	mov	w1, -1
 	strh	w1, [x19, #:lo12:.LANCHOR62]
 	strh	wzr, [x0, 24]
-	b	.L2921
-.L2906:
+	b	.L2896
+.L2881:
 	adrp	x0, .LANCHOR9
 	mov	x20, x0
 	ldr	x1, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x1, x3, lsl 1]
-	cbz	w1, .L2908
-	adrp	x1, .LANCHOR206
+	cbz	w1, .L2883
+	adrp	x1, .LANCHOR205
 	adrp	x0, .LC0
-	mov	w2, 940
-	add	x1, x1, :lo12:.LANCHOR206
+	mov	w2, 945
+	add	x1, x1, :lo12:.LANCHOR205
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2908:
+.L2883:
 	ldrh	w1, [x19, #:lo12:.LANCHOR62]
 	ldr	x0, [x20, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x1, lsl 1]
-	b	.L2905
-.L2935:
+	b	.L2880
+.L2910:
 	and	w0, w0, 255
 	sub	w0, w0, #1
 	add	x0, x14, x0, sxtw 1
 	ldrh	w21, [x0, 40]
 	mov	w0, 65535
 	cmp	w21, w0
-	bne	.L2909
-	adrp	x1, .LANCHOR206
+	bne	.L2884
+	adrp	x1, .LANCHOR205
 	adrp	x0, .LC0
-	mov	w2, 948
-	add	x1, x1, :lo12:.LANCHOR206
+	mov	w2, 953
+	add	x1, x1, :lo12:.LANCHOR205
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2909:
+.L2884:
 	adrp	x1, .LANCHOR105
 	ldr	x3, [x22, #:lo12:.LANCHOR7]
 	adrp	x2, .LANCHOR80
@@ -17837,14 +17688,14 @@ gc_scan_src_blk:
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 160
-	bne	.L2922
+	bne	.L2897
 	adrp	x1, .LANCHOR68
 	ldrb	w21, [x1, #:lo12:.LANCHOR68]
 	cmp	w21, 2
 	orr	w20, w20, w21, lsl 24
-	beq	.L2911
+	beq	.L2886
 	and	w21, w21, 65535
-.L2910:
+.L2885:
 	add	x22, x19, :lo12:.LANCHOR62
 	orr	w20, w0, w20
 	mov	w0, 1
@@ -17870,41 +17721,41 @@ gc_scan_src_blk:
 	ldr	w0, [x25, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L2912
-.L2937:
+	bne	.L2887
+.L2912:
 	mov	x0, x25
 	bl	buf_free
 	mov	w0, -1
-.L2900:
+.L2875:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2911:
+.L2886:
 	ldrh	w0, [x23, #:lo12:.LANCHOR72]
 	sub	w0, w0, #1
 	and	w0, w0, 65535
-	b	.L2910
-.L2922:
+	b	.L2885
+.L2897:
 	mov	w21, 1
-	b	.L2910
-.L2912:
+	b	.L2885
+.L2887:
 	ldr	x0, [x25, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L2913
-	mov	w2, 980
-	adrp	x1, .LANCHOR206
+	beq	.L2888
+	mov	w2, 985
+	adrp	x1, .LANCHOR205
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR206
+	add	x1, x1, :lo12:.LANCHOR205
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L2937
-.L2913:
+	b	.L2912
+.L2888:
 	ldrb	w0, [x23, #:lo12:.LANCHOR73]
 	adrp	x22, .LANCHOR99
 	ldrh	w1, [x24, #:lo12:.LANCHOR80]
@@ -17916,9 +17767,9 @@ gc_scan_src_blk:
 	mul	w0, w0, w1
 	mul	w21, w21, w0
 	and	w21, w21, 65535
-.L2914:
+.L2889:
 	cmp	w21, w26
-	bgt	.L2919
+	bgt	.L2894
 	mov	x0, x25
 	bl	buf_free
 	adrp	x0, .LANCHOR9
@@ -17930,11 +17781,11 @@ gc_scan_src_blk:
 	ldrh	w3, [x3, 24]
 	ldrh	w2, [x4, x2]
 	cmp	w2, w3
-	beq	.L2920
-	adrp	x0, .LC193
-	add	x0, x0, :lo12:.LC193
+	beq	.L2895
+	adrp	x0, .LC192
+	add	x0, x0, :lo12:.LC192
 	bl	printf
-.L2920:
+.L2895:
 	add	x0, x19, :lo12:.LANCHOR62
 	ldrh	w2, [x19, #:lo12:.LANCHOR62]
 	ldr	x1, [x20, #:lo12:.LANCHOR9]
@@ -17942,20 +17793,20 @@ gc_scan_src_blk:
 	strh	w3, [x1, x2, lsl 1]
 	strh	wzr, [x0, 28]
 	ldrh	w0, [x0, 24]
-	b	.L2900
-.L2919:
+	b	.L2875
+.L2894:
 	ldr	w0, [x24, x26, lsl 2]
 	cmn	w0, #1
-	beq	.L2916
+	beq	.L2891
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 92]
 	cmn	w0, #1
-	bne	.L2917
+	bne	.L2892
 	ldr	w0, [x24, x26, lsl 2]
 	mov	w2, 0
 	add	x1, x29, 92
 	bl	pm_log2phys
-.L2917:
+.L2892:
 	ldrh	w1, [x22]
 	mov	w0, 21
 	ldr	w3, [x29, 92]
@@ -17970,16 +17821,16 @@ gc_scan_src_blk:
 	udiv	w0, w0, w1
 	add	x1, x19, :lo12:.LANCHOR62
 	cmp	w0, w2
-	bne	.L2916
+	bne	.L2891
 	ldrh	w0, [x1, 24]
 	ldr	x4, [x20, #:lo12:.LANCHOR65]
 	ubfiz	x2, x0, 2, 16
 	add	w0, w0, 1
 	str	w3, [x4, x2]
 	strh	w0, [x1, 24]
-.L2916:
+.L2891:
 	add	x26, x26, 1
-	b	.L2914
+	b	.L2889
 	.size	gc_scan_src_blk, .-gc_scan_src_blk
 	.section	.text.gc_scan_static_data,"ax",@progbits
 	.align	2
@@ -17995,13 +17846,13 @@ gc_scan_static_data:
 	ldr	w1, [x0, 544]
 	str	x23, [sp, 48]
 	cmn	w1, #1
-	beq	.L2939
-	adrp	x21, .LANCHOR207
+	beq	.L2914
+	adrp	x21, .LANCHOR206
 	adrp	x22, .LC0
-	add	x21, x21, :lo12:.LANCHOR207
+	add	x21, x21, :lo12:.LANCHOR206
 	add	x22, x22, :lo12:.LC0
 	mov	w20, 11
-.L2947:
+.L2922:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w2, 0
 	add	x1, x29, 76
@@ -18009,7 +17860,7 @@ gc_scan_static_data:
 	bl	pm_log2phys
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L2940
+	beq	.L2915
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 76]
@@ -18019,7 +17870,7 @@ gc_scan_static_data:
 	bl	sblk_read_page
 	ldr	w0, [x23, 52]
 	cmp	w0, 256
-	bne	.L2941
+	bne	.L2916
 	adrp	x0, .LANCHOR99
 	ldr	w2, [x29, 76]
 	mov	w1, 1
@@ -18035,21 +17886,21 @@ gc_scan_static_data:
 	mov	w2, 0
 	udiv	w0, w0, w3
 	bl	gc_add_sblk
-.L2941:
+.L2916:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldr	x1, [x23, 24]
 	ldr	w0, [x0, 544]
 	ldr	w1, [x1, 4]
 	cmp	w1, w0
-	beq	.L2942
-	mov	w2, 1419
+	beq	.L2917
+	mov	w2, 1424
 	mov	x1, x21
 	mov	x0, x22
 	bl	printf
-.L2942:
+.L2917:
 	mov	x0, x23
 	bl	buf_free
-.L2940:
+.L2915:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	adrp	x2, .LANCHOR118
 	ldr	w2, [x2, #:lo12:.LANCHOR118]
@@ -18057,7 +17908,7 @@ gc_scan_static_data:
 	add	w1, w1, 1
 	str	w1, [x0, 544]
 	cmp	w1, w2
-	bcc	.L2943
+	bcc	.L2918
 	mov	w1, -1
 	str	w1, [x0, 544]
 	ldr	w1, [x0, 548]
@@ -18068,42 +17919,42 @@ gc_scan_static_data:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2938:
+.L2913:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2943:
+.L2918:
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	bne	.L2938
+	bne	.L2913
 	sub	w20, w20, #1
 	ands	w20, w20, 65535
-	bne	.L2947
-	b	.L2938
-.L2939:
+	bne	.L2922
+	b	.L2913
+.L2914:
 	ldr	w1, [x0, 536]
 	adrp	x3, .LANCHOR97
 	ldr	w2, [x0, 12]
 	add	w1, w1, 12959744
 	add	w1, w1, 256
 	cmp	w2, w1
-	bhi	.L2949
+	bhi	.L2924
 	ldr	x4, [x3, #:lo12:.LANCHOR97]
 	ldr	w1, [x0, 540]
 	add	w1, w1, 98304
 	ldr	w4, [x4, 44]
 	add	w1, w1, 1696
 	cmp	w4, w1
-	bls	.L2938
-.L2949:
+	bls	.L2913
+.L2924:
 	ldr	x1, [x3, #:lo12:.LANCHOR97]
 	ldr	w1, [x1, 44]
 	str	w1, [x0, 540]
 	str	w2, [x0, 536]
 	str	wzr, [x0, 544]
-	b	.L2938
+	b	.L2913
 	.size	gc_scan_static_data, .-gc_scan_static_data
 	.section	.text.ftl_sblk_dump,"ax",@progbits
 	.align	2
@@ -18129,29 +17980,29 @@ ftl_sblk_dump:
 	ldrb	w2, [x1, 2]
 	mov	w1, w21
 	ldrh	w4, [x0, x23]
-	adrp	x0, .LC194
+	adrp	x0, .LC193
 	ubfx	x5, x5, 11, 8
-	add	x0, x0, :lo12:.LC194
+	add	x0, x0, :lo12:.LC193
 	ubfx	x3, x2, 3, 2
 	and	w4, w4, 2047
 	ubfx	x2, x2, 5, 3
 	bl	printf
 	mov	w0, 65535
 	cmp	w21, w0
-	beq	.L2976
+	beq	.L2951
 	adrp	x0, .LANCHOR6
 	ldrh	w0, [x0, #:lo12:.LANCHOR6]
 	cmp	w0, w21
-	bls	.L2976
+	bls	.L2951
 	ldr	x0, [x24, #:lo12:.LANCHOR7]
 	add	x0, x0, x23
 	ldrb	w0, [x0, 2]
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L2977
+	bne	.L2952
 	adrp	x0, .LANCHOR68
 	ldrb	w25, [x0, #:lo12:.LANCHOR68]
-.L2957:
+.L2932:
 	add	x28, x29, 224
 	adrp	x19, .LANCHOR80
 	mov	w0, w21
@@ -18167,11 +18018,11 @@ ftl_sblk_dump:
 	strb	wzr, [x29, 197]
 	mov	w3, w25
 	strh	wzr, [x29, 194]
-	adrp	x0, .LC195
+	adrp	x0, .LC194
 	mul	w1, w1, w2
 	strh	wzr, [x29, 202]
 	strh	w1, [x29, 198]
-	add	x0, x0, :lo12:.LC195
+	add	x0, x0, :lo12:.LC194
 	ldr	x1, [x24, #:lo12:.LANCHOR7]
 	add	x1, x1, x23
 	ldrb	w2, [x1, 2]
@@ -18186,36 +18037,36 @@ ftl_sblk_dump:
 	adrp	x0, .LANCHOR105
 	add	x0, x0, :lo12:.LANCHOR105
 	str	x0, [x29, 112]
-.L2958:
+.L2933:
 	ldr	x0, [x29, 136]
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w0, w20
-	bls	.L2973
+	bls	.L2948
 	lsl	w0, w20, 1
 	str	wzr, [x29, 172]
 	sub	w0, w0, #1
 	str	w0, [x29, 160]
-	adrp	x0, .LC149
-	add	x0, x0, :lo12:.LC149
+	adrp	x0, .LC148
+	add	x0, x0, :lo12:.LC148
 	str	x0, [x29, 120]
-	b	.L2974
-.L2977:
+	b	.L2949
+.L2952:
 	mov	w25, 1
-	b	.L2957
-.L2970:
+	b	.L2932
+.L2945:
 	ldr	x0, [x29, 128]
 	ldrh	w10, [x28, x0]
 	mov	w0, 65535
 	cmp	w10, w0
-	beq	.L2959
+	beq	.L2934
 	ldr	x0, [x29, 112]
 	cmp	w25, 3
 	ldrh	w19, [x0]
 	mul	w19, w19, w10
-	bne	.L2960
+	bne	.L2935
 	add	w19, w20, w19
 	orr	w19, w19, w22, lsl 24
-.L2961:
+.L2936:
 	str	w19, [x26, 40]
 	mov	w1, 1
 	str	w10, [x29, 104]
@@ -18257,22 +18108,22 @@ ftl_sblk_dump:
 	and	w0, w0, 224
 	cmp	w0, 224
 	ccmp	w0, w1, 4, ne
-	beq	.L2959
+	beq	.L2934
 	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L2964
+	bne	.L2939
 	ldr	x0, [x26, 24]
 	mov	w2, 0
 	add	x1, x29, 188
 	ldr	w0, [x0, 4]
 	bl	pm_log2phys
-.L2964:
+.L2939:
 	ldr	w0, [x29, 188]
 	cmp	w19, w0
-	bne	.L2965
+	bne	.L2940
 	ldr	w0, [x29, 168]
 	mov	w1, w19
 	add	w0, w0, 1
@@ -18280,81 +18131,81 @@ ftl_sblk_dump:
 	ldr	x0, [x26, 24]
 	ldr	w3, [x29, 168]
 	ldr	w2, [x0, 4]
-	adrp	x0, .LC196
-	add	x0, x0, :lo12:.LC196
+	adrp	x0, .LC195
+	add	x0, x0, :lo12:.LC195
 	bl	printf
-.L2965:
+.L2940:
 	ldr	x0, [x29, 152]
-	cbz	x0, .L2967
+	cbz	x0, .L2942
 	ubfiz	x19, x27, 2, 32
 	ldr	w2, [x0, x19]
 	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	cmp	w0, w2
-	beq	.L2968
+	beq	.L2943
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2968
-	adrp	x0, .LC197
+	tbz	x0, 12, .L2943
+	adrp	x0, .LC196
 	mov	w1, w27
-	add	x0, x0, :lo12:.LC197
+	add	x0, x0, :lo12:.LC196
 	bl	printf
-.L2968:
+.L2943:
 	ldr	x1, [x26, 24]
 	ldr	x0, [x29, 152]
 	ldr	w1, [x1, 4]
 	ldr	w0, [x0, x19]
 	cmp	w1, w0
-	beq	.L2967
+	beq	.L2942
 	cmn	w0, #1
-	beq	.L2967
-	adrp	x1, .LANCHOR208
+	beq	.L2942
+	adrp	x1, .LANCHOR207
 	adrp	x0, .LC0
 	mov	w2, 1300
-	add	x1, x1, :lo12:.LANCHOR208
+	add	x1, x1, :lo12:.LANCHOR207
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2967:
+.L2942:
 	add	w27, w27, 1
-.L2959:
+.L2934:
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L2972:
+.L2947:
 	cmp	w25, w22
-	bcs	.L2970
+	bcs	.L2945
 	ldr	w0, [x29, 172]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	str	w0, [x29, 172]
-.L2974:
+.L2949:
 	ldrb	w0, [x29, 201]
 	ldr	w1, [x29, 172]
 	cmp	w0, w1
-	bls	.L2971
+	bls	.L2946
 	ldrsw	x0, [x29, 172]
 	mov	w22, 1
 	add	x0, x0, 8
 	lsl	x0, x0, 1
 	str	x0, [x29, 128]
-	b	.L2972
-.L2960:
+	b	.L2947
+.L2935:
 	cmp	w25, 2
-	bne	.L2962
+	bne	.L2937
 	ldr	w0, [x29, 160]
 	add	w19, w19, w0
 	adrp	x0, .LANCHOR68
 	add	w19, w19, w22
 	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	orr	w19, w19, w0, lsl 24
-	b	.L2961
-.L2962:
+	b	.L2936
+.L2937:
 	add	w19, w20, w19
-	b	.L2961
-.L2971:
+	b	.L2936
+.L2946:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2958
-.L2973:
+	b	.L2933
+.L2948:
 	mov	x0, x26
 	bl	buf_free
 	adrp	x0, .LANCHOR9
@@ -18363,11 +18214,11 @@ ftl_sblk_dump:
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w2, [x0, x1, lsl 1]
 	mov	w1, w21
-	adrp	x0, .LC198
-	add	x0, x0, :lo12:.LC198
+	adrp	x0, .LC197
+	add	x0, x0, :lo12:.LC197
 	bl	printf
 	ldr	w0, [x29, 164]
-.L2955:
+.L2930:
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
 	ldp	x23, x24, [sp, 96]
@@ -18376,9 +18227,9 @@ ftl_sblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 272
 	ret
-.L2976:
+.L2951:
 	mov	w0, 0
-	b	.L2955
+	b	.L2930
 	.size	ftl_sblk_dump, .-ftl_sblk_dump
 	.section	.text.zftl_read,"ax",@progbits
 	.align	2
@@ -18398,22 +18249,22 @@ zftl_read:
 	stp	x23, x24, [sp, 48]
 	mov	x22, x3
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2988
+	tbz	x0, 12, .L2963
 	mov	w3, w2
-	adrp	x0, .LC199
+	adrp	x0, .LC198
 	mov	w2, w1
-	add	x0, x0, :lo12:.LC199
+	add	x0, x0, :lo12:.LC198
 	mov	w1, w20
 	bl	printf
-.L2988:
-	cbnz	w20, .L2989
+.L2963:
+	cbnz	w20, .L2964
 	adrp	x0, .LANCHOR58
 	mov	w20, 24576
 	ldr	w0, [x0, #:lo12:.LANCHOR58]
-.L2990:
+.L2965:
 	add	w1, w19, w26
 	cmp	w0, w1
-	bcc	.L3018
+	bcc	.L2993
 	adrp	x1, .LANCHOR97
 	add	w20, w20, w19
 	add	w3, w26, w20
@@ -18435,10 +18286,10 @@ zftl_read:
 	sub	w25, w2, w27
 	str	w2, [x29, 156]
 	add	w25, w25, 1
-.L2992:
-	cbnz	w25, .L3016
+.L2967:
+	cbnz	w25, .L2991
 	ldr	w0, [x29, 164]
-.L2987:
+.L2962:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -18446,22 +18297,22 @@ zftl_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L2989:
+.L2964:
 	cmp	w20, 3
-	bhi	.L3018
+	bhi	.L2993
 	lsl	w20, w20, 13
 	mov	w0, 8192
-	b	.L2990
-.L3016:
+	b	.L2965
+.L2991:
 	ldr	x0, [x29, 168]
 	cmp	w21, w27
 	ldrb	w1, [x0, #:lo12:.LANCHOR121]
 	ldr	w0, [x29, 156]
 	and	w19, w1, 65535
 	ccmp	w21, w0, 4, ne
-	bne	.L3019
-	cmp	w21, w27
 	bne	.L2994
+	cmp	w21, w27
+	bne	.L2969
 	udiv	w24, w20, w1
 	and	w0, w26, 65535
 	msub	w1, w24, w1, w20
@@ -18470,17 +18321,17 @@ zftl_read:
 	and	w19, w19, 65535
 	cmp	w26, w19
 	csel	w19, w0, w19, cc
-.L2993:
+.L2968:
 	adrp	x23, .LANCHOR49
 	add	x1, x23, :lo12:.LANCHOR49
 	add	x1, x1, 2
 	mov	w0, 0
-.L2997:
+.L2972:
 	ldr	w2, [x1, 34]
 	cmp	w21, w2
-	bne	.L2995
+	bne	.L2970
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L2995
+	tbz	x2, 3, .L2970
 	add	x1, x23, :lo12:.LANCHOR49
 	ubfiz	x0, x0, 6, 32
 	add	x0, x1, x0
@@ -18492,87 +18343,87 @@ zftl_read:
 	add	x22, x22, x19
 	add	x1, x1, x24
 	bl	ftl_memcpy
-.L2996:
+.L2971:
 	add	w21, w21, 1
 	sub	w25, w25, #1
-.L3003:
+.L2978:
 	adrp	x0, .LANCHOR51
 	ldrb	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, 2
-	bls	.L3004
-	cbnz	w25, .L2992
-.L3004:
+	bls	.L2979
+	cbnz	w25, .L2967
+.L2979:
 	adrp	x0, .LANCHOR125
 	ldrb	w1, [x0, #:lo12:.LANCHOR125]
-	cbz	w1, .L2992
+	cbz	w1, .L2967
 	adrp	x24, .LANCHOR124
 	add	x0, x23, :lo12:.LANCHOR49
 	ldrb	w2, [x24, #:lo12:.LANCHOR124]
 	add	x0, x0, x2, lsl 6
 	bl	sblk_read_page
-	adrp	x0, .LANCHOR209
-	add	x0, x0, :lo12:.LANCHOR209
+	adrp	x0, .LANCHOR208
+	add	x0, x0, :lo12:.LANCHOR208
 	str	x0, [x29, 136]
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	str	x0, [x29, 128]
-.L3006:
+.L2981:
 	ldrb	w0, [x28]
-	cbnz	w0, .L3015
+	cbnz	w0, .L2990
 	mov	w0, -1
 	strb	wzr, [x28]
 	strb	w0, [x24, #:lo12:.LANCHOR124]
-	b	.L2992
-.L2994:
+	b	.L2967
+.L2969:
 	ldr	w0, [x29, 160]
 	msub	w19, w1, w21, w0
 	and	w19, w19, 255
-.L3019:
+.L2994:
 	mov	w24, 0
-	b	.L2993
-.L2995:
+	b	.L2968
+.L2970:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 32
-	bne	.L2997
+	bne	.L2972
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L2998
+	bne	.L2973
 	mov	w2, 0
 	add	x1, x29, 188
 	mov	w0, w21
 	bl	pm_log2phys
-.L2998:
+.L2973:
 	ldr	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L2999
+	bne	.L2974
 	ldr	x0, [x29, 168]
 	mov	w19, 0
 	add	x24, x0, :lo12:.LANCHOR121
-.L3000:
+.L2975:
 	ldrb	w0, [x24]
 	cmp	w19, w0
-	bcs	.L2996
+	bcs	.L2971
 	madd	w0, w21, w0, w19
 	cmp	w20, w0
-	bhi	.L3001
+	bhi	.L2976
 	ldr	w1, [x29, 160]
 	cmp	w1, w0
-	bls	.L3001
+	bls	.L2976
 	mov	x0, x22
 	add	x22, x22, 512
 	mov	w2, 512
 	mov	w1, 0
 	bl	ftl_memset
-.L3001:
+.L2976:
 	add	w19, w19, 1
-	b	.L3000
-.L2999:
+	b	.L2975
+.L2974:
 	mov	w0, 0
 	bl	buf_alloc
-	cbz	x0, .L3003
+	cbz	x0, .L2978
 	ldr	x2, [x29, 120]
 	ldr	x3, [x2, #:lo12:.LANCHOR97]
 	ldr	w2, [x3, 40]
@@ -18587,15 +18438,15 @@ zftl_read:
 	stp	w21, w2, [x0, 36]
 	str	w2, [x0, 44]
 	bl	zftl_add_read_buf
-	b	.L2996
-.L3015:
+	b	.L2971
+.L2990:
 	ldrb	w0, [x24, #:lo12:.LANCHOR124]
 	cmp	w0, 255
-	bne	.L3007
+	bne	.L2982
 	ldp	x0, x1, [x29, 128]
 	mov	w2, 1064
 	bl	printf
-.L3007:
+.L2982:
 	ldrb	w19, [x24, #:lo12:.LANCHOR124]
 	add	x0, x23, :lo12:.LANCHOR49
 	ubfiz	x1, x19, 6, 8
@@ -18607,21 +18458,21 @@ zftl_read:
 	strb	w0, [x24, #:lo12:.LANCHOR124]
 	ldr	w8, [x1, 52]
 	cmn	w8, #1
-	bne	.L3008
+	bne	.L2983
 	adrp	x0, .LANCHOR10
 	str	w8, [x29, 164]
 	ldr	x1, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x1, 552]
 	add	w0, w0, 1
 	str	w0, [x1, 552]
-.L3009:
+.L2984:
 	add	x10, x23, :lo12:.LANCHOR49
 	add	x10, x10, x19, lsl 6
 	ldr	x0, [x10, 24]
 	ldr	w2, [x10, 36]
 	ldr	w1, [x0, 4]
 	cmp	w1, w2
-	beq	.L3010
+	beq	.L2985
 	adrp	x1, .LANCHOR10
 	str	w8, [x29, 152]
 	str	x10, [x29, 112]
@@ -18632,9 +18483,9 @@ zftl_read:
 	ldrb	w1, [x10, 1]
 	ldp	w4, w5, [x0]
 	ldp	w6, w7, [x0, 8]
-	adrp	x0, .LC201
+	adrp	x0, .LC200
 	ldr	w3, [x10, 40]
-	add	x0, x0, :lo12:.LC201
+	add	x0, x0, :lo12:.LC200
 	bl	printf
 	ldr	x10, [x29, 112]
 	adrp	x0, .LANCHOR99
@@ -18653,28 +18504,28 @@ zftl_read:
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
 	ldr	w8, [x29, 152]
-.L3010:
+.L2985:
 	add	x0, x23, :lo12:.LANCHOR49
 	add	x0, x0, x19, lsl 6
 	ldr	x1, [x0, 24]
 	ldr	w0, [x0, 36]
 	ldr	w1, [x1, 4]
 	cmp	w1, w0
-	bne	.L3011
+	bne	.L2986
 	cmn	w8, #1
-	bne	.L3012
-.L3011:
+	bne	.L2987
+.L2986:
 	ldp	x0, x1, [x29, 128]
 	mov	w2, 1085
 	bl	printf
-.L3012:
+.L2987:
 	add	x0, x23, :lo12:.LANCHOR49
 	add	x19, x0, x19, lsl 6
 	ldr	x0, [x29, 168]
 	ldrb	w2, [x19, 56]
 	ldrb	w0, [x0, #:lo12:.LANCHOR121]
 	cmp	w0, w2
-	bls	.L3013
+	bls	.L2988
 	ldrb	w0, [x19, 57]
 	lsl	w2, w2, 9
 	ldr	x1, [x19, 8]
@@ -18682,7 +18533,7 @@ zftl_read:
 	add	x1, x1, x0
 	ldr	x0, [x19, 16]
 	bl	ftl_memcpy
-.L3014:
+.L2989:
 	ldr	x1, [x29, 144]
 	adrp	x0, .LANCHOR127
 	add	x0, x0, :lo12:.LANCHOR127
@@ -18692,10 +18543,10 @@ zftl_read:
 	ldrb	w0, [x28]
 	sub	w0, w0, #1
 	strb	w0, [x28]
-	b	.L3006
-.L3008:
+	b	.L2981
+.L2983:
 	cmp	w8, 256
-	bne	.L3009
+	bne	.L2984
 	adrp	x0, .LANCHOR99
 	mov	w4, 21
 	ldp	w2, w3, [x1, 36]
@@ -18710,8 +18561,8 @@ zftl_read:
 	adrp	x0, .LANCHOR98
 	ldrb	w0, [x0, #:lo12:.LANCHOR98]
 	udiv	w4, w4, w0
-	adrp	x0, .LC200
-	add	x0, x0, :lo12:.LC200
+	adrp	x0, .LC199
+	add	x0, x0, :lo12:.LC199
 	stp	w8, w4, [x29, 108]
 	and	w1, w4, 65535
 	bl	printf
@@ -18722,15 +18573,15 @@ zftl_read:
 	mov	w1, w5
 	bl	gc_add_sblk
 	ldr	w8, [x29, 108]
-	b	.L3009
-.L3013:
+	b	.L2984
+.L2988:
 	ldrb	w0, [x19, 2]
 	and	w0, w0, -9
 	strb	w0, [x19, 2]
-	b	.L3014
-.L3018:
+	b	.L2989
+.L2993:
 	mov	w0, -1
-	b	.L2987
+	b	.L2962
 	.size	zftl_read, .-zftl_read
 	.section	.text.zftl_vendor_read,"ax",@progbits
 	.align	2
@@ -18795,102 +18646,286 @@ ftl_read:
 	and	w0, w0, 255
 	b	zftl_read
 	.size	ftl_read, .-ftl_read
-	.section	.text.ftl_update_l2p_map,"ax",@progbits
+	.section	.text.gc_check_data_one_wl,"ax",@progbits
 	.align	2
-	.global	ftl_update_l2p_map
-	.type	ftl_update_l2p_map, %function
-ftl_update_l2p_map:
-	stp	x29, x30, [sp, -128]!
-	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	mov	x22, x0
-	stp	x19, x20, [sp, 16]
-	adrp	x0, .LANCHOR80
-	stp	x23, x24, [sp, 48]
-	stp	x25, x26, [sp, 64]
-	stp	x27, x28, [sp, 80]
-	ldrh	w23, [x0, #:lo12:.LANCHOR80]
-	ldrb	w0, [x22, 9]
-	ldrh	w19, [x22, 12]
-	mul	w23, w23, w0
-	adrp	x0, .LANCHOR111
-	str	x0, [x29, 104]
-	ldr	x1, [x0, #:lo12:.LANCHOR111]
-	add	x19, x1, x19, lsl 2
-	add	x1, x19, x23, sxtw 2
-	ldr	w1, [x1, -4]
-	cmn	w1, #1
-	beq	.L3041
-	adrp	x1, .LANCHOR210
+	.global	gc_check_data_one_wl
+	.type	gc_check_data_one_wl, %function
+gc_check_data_one_wl:
+	sub	sp, sp, #128
+	stp	x29, x30, [sp, 16]
+	add	x29, sp, 16
+	stp	x19, x20, [sp, 32]
+	adrp	x19, .LANCHOR62
+	stp	x21, x22, [sp, 48]
+	add	x22, x19, :lo12:.LANCHOR62
+	adrp	x20, .LANCHOR10
+	stp	x23, x24, [sp, 64]
+	stp	x25, x26, [sp, 80]
+	ldr	x0, [x22, 8]
+	stp	x27, x28, [sp, 96]
+	ldr	x21, [x20, #:lo12:.LANCHOR10]
+	cbnz	x0, .L3016
+	mov	w0, 1
+	bl	buf_alloc
+	str	x0, [x22, 8]
+.L3016:
+	add	x0, x19, :lo12:.LANCHOR62
+	ldr	x22, [x0, 8]
+	cbnz	x22, .L3017
+	adrp	x1, .LANCHOR209
 	adrp	x0, .LC0
-	mov	w2, 1576
-	add	x1, x1, :lo12:.LANCHOR210
+	mov	w2, 366
+	add	x1, x1, :lo12:.LANCHOR209
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3041:
-	adrp	x27, .LANCHOR121
-	mov	x24, 0
-	add	x0, x27, :lo12:.LANCHOR121
-	mov	w21, 0
-	str	x0, [x29, 96]
-.L3042:
-	cmp	w24, w23
-	blt	.L3048
-	adrp	x0, .LANCHOR14
-	adrp	x19, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3049
-	ldrh	w1, [x22]
-	ldr	x2, [x19, #:lo12:.LANCHOR9]
-	ubfiz	x0, x1, 1, 16
-	ldrh	w3, [x2, x0]
-	adrp	x0, .LC205
-	mov	w2, w21
-	add	x0, x0, :lo12:.LC205
-	bl	printf
-.L3049:
-	ldrh	w1, [x22]
-	ldr	x0, [x19, #:lo12:.LANCHOR9]
-	ldp	x23, x24, [sp, 48]
-	ldp	x19, x20, [sp, 16]
-	strh	w21, [x0, x1, lsl 1]
-	ldp	x25, x26, [sp, 64]
-	ldp	x21, x22, [sp, 32]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 128
-	ret
-.L3048:
-	ldr	w2, [x19, x24, lsl 2]
-	cmn	w2, #1
-	beq	.L3043
-	ldrb	w20, [x27, #:lo12:.LANCHOR121]
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	lsl	w20, w20, 7
-	udiv	w20, w2, w20
-	and	w20, w20, 65535
-	tbz	x0, 12, .L3044
-	adrp	x0, .LC202
-	mov	w3, w24
-	mov	w1, w20
+.L3017:
+	adrp	x2, .LANCHOR105
+	add	x28, x21, 96
+	add	x27, x21, 80
+	add	x2, x2, :lo12:.LANCHOR105
+	mov	w26, 0
+.L3018:
+	ldrb	w0, [x27, 9]
+	cmp	w26, w0
+	bge	.L3027
+	adrp	x25, .LANCHOR68
+	mov	w24, 1
+	add	x23, x19, :lo12:.LANCHOR62
+	add	x25, x25, :lo12:.LANCHOR68
+	b	.L3028
+.L3026:
+	ldrh	w0, [x28]
+	ldrh	w1, [x2]
+	ldrb	w3, [x25]
+	cmp	w3, 3
+	mul	w1, w0, w1
+	ldrh	w0, [x23, 16]
+	bne	.L3019
+	add	w0, w0, w1
+	orr	w0, w0, w24, lsl 24
+.L3040:
+	str	w0, [x22, 40]
+	mov	w1, 1
+	str	x2, [x29, 104]
+	mov	x0, x22
+	bl	sblk_read_page
+	ldr	w0, [x22, 52]
+	adrp	x1, .LANCHOR147
+	ldr	x2, [x29, 104]
+	cmn	w0, #1
+	beq	.L3022
+	ldrh	w0, [x23, 22]
+	ldr	x4, [x1, #:lo12:.LANCHOR147]
+	ldr	x3, [x22, 24]
+	lsl	x0, x0, 2
+	ldr	w5, [x4, x0]
+	ldr	w4, [x3, 4]
+	cmp	w5, w4
+	bne	.L3022
+	adrp	x4, .LANCHOR148
+	ldr	x4, [x4, #:lo12:.LANCHOR148]
+	ldr	w4, [x4, x0]
+	ldr	w0, [x3, 8]
+	cmp	w4, w0
+	beq	.L3023
+.L3022:
+	add	x4, x1, :lo12:.LANCHOR147
+	ldrh	w0, [x23, 22]
+	ldr	x1, [x1, #:lo12:.LANCHOR147]
+	ldr	w0, [x1, x0, lsl 2]
+	cmn	w0, #1
+	beq	.L3023
+	adrp	x19, .LANCHOR72
+	ldrb	w3, [x27, 9]
+	str	x4, [x29, 104]
+	mov	w2, 4
+	ldrh	w0, [x19, #:lo12:.LANCHOR72]
+	mul	w3, w3, w0
+	adrp	x0, .LC201
+	add	x0, x0, :lo12:.LC201
+	bl	rknand_print_hex
+	ldrh	w0, [x19, #:lo12:.LANCHOR72]
+	adrp	x19, .LANCHOR148
+	ldrb	w3, [x27, 9]
+	mov	w2, 4
+	ldr	x1, [x19, #:lo12:.LANCHOR148]
+	mul	w3, w3, w0
+	adrp	x0, .LC202
 	add	x0, x0, :lo12:.LC202
+	bl	rknand_print_hex
+	adrp	x0, .LANCHOR14
+	ldr	x4, [x29, 104]
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 10, .L3024
+	ldr	x1, [x22, 24]
+	ldrh	w0, [x23, 22]
+	ldr	x2, [x4]
+	ldr	x3, [x19, #:lo12:.LANCHOR148]
+	lsl	x0, x0, 2
+	ldr	w4, [x1, 12]
+	str	w4, [sp]
+	ldr	w4, [x3, x0]
+	ldp	w5, w6, [x1]
+	ldr	w3, [x2, x0]
+	adrp	x0, .LC203
+	ldr	w7, [x1, 8]
+	add	x0, x0, :lo12:.LC203
+	ldr	w1, [x22, 40]
+	ldr	w2, [x22, 52]
 	bl	printf
-.L3044:
+.L3024:
+	ldr	x0, [x20, #:lo12:.LANCHOR10]
+	mov	x1, 0
+	ldrh	w0, [x0, 80]
+	bl	ftl_sblk_dump
+	adrp	x0, .LANCHOR9
+	ldrh	w1, [x21, 80]
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	strh	wzr, [x0, x1, lsl 1]
+	mov	w0, -1
+.L3015:
+	ldp	x19, x20, [sp, 32]
+	ldp	x21, x22, [sp, 48]
+	ldp	x23, x24, [sp, 64]
+	ldp	x25, x26, [sp, 80]
+	ldp	x27, x28, [sp, 96]
+	ldp	x29, x30, [sp, 16]
+	add	sp, sp, 128
+	ret
+.L3019:
+	cmp	w3, 2
+	bne	.L3021
+	sub	w0, w0, #1
+	add	w1, w24, w1
+	add	w0, w0, w1
+	orr	w0, w0, 33554432
+	b	.L3040
+.L3021:
+	add	w0, w0, w1
+	b	.L3040
+.L3023:
+	ldrh	w0, [x23, 22]
+	add	w24, w24, 1
+	add	w0, w0, 1
+	strh	w0, [x23, 22]
+.L3028:
+	ldrh	w0, [x23, 20]
+	cmp	w24, w0
+	ble	.L3026
+	add	w26, w26, 1
+	add	x28, x28, 2
+	b	.L3018
+.L3027:
+	add	x19, x19, :lo12:.LANCHOR62
+	ldrh	w0, [x19, 16]
+	add	w1, w0, 1
+	strh	w1, [x19, 16]
+	adrp	x1, .LANCHOR104
+	ldrb	w1, [x1, #:lo12:.LANCHOR104]
+	cbz	w1, .L3029
+	add	w0, w0, 2
+	strh	w0, [x19, 16]
+.L3029:
+.L3025:
+	mov	w0, 0
+	b	.L3015
+	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
+	.section	.text.ftl_update_l2p_map,"ax",@progbits
+	.align	2
+	.global	ftl_update_l2p_map
+	.type	ftl_update_l2p_map, %function
+ftl_update_l2p_map:
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	mov	x22, x0
+	stp	x19, x20, [sp, 16]
+	adrp	x0, .LANCHOR80
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	ldrh	w23, [x0, #:lo12:.LANCHOR80]
+	ldrb	w0, [x22, 9]
+	ldrh	w19, [x22, 12]
+	mul	w23, w23, w0
+	adrp	x0, .LANCHOR111
+	str	x0, [x29, 104]
+	ldr	x1, [x0, #:lo12:.LANCHOR111]
+	add	x19, x1, x19, lsl 2
+	add	x1, x19, x23, sxtw 2
+	ldr	w1, [x1, -4]
+	cmn	w1, #1
+	beq	.L3042
+	adrp	x1, .LANCHOR210
+	adrp	x0, .LC0
+	mov	w2, 1576
+	add	x1, x1, :lo12:.LANCHOR210
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L3042:
+	adrp	x27, .LANCHOR121
+	mov	x24, 0
+	add	x0, x27, :lo12:.LANCHOR121
+	mov	w21, 0
+	str	x0, [x29, 96]
+.L3043:
+	cmp	w24, w23
+	blt	.L3049
+	adrp	x0, .LANCHOR14
+	adrp	x19, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L3050
+	ldrh	w1, [x22]
+	ldr	x2, [x19, #:lo12:.LANCHOR9]
+	ubfiz	x0, x1, 1, 16
+	ldrh	w3, [x2, x0]
+	adrp	x0, .LC207
+	mov	w2, w21
+	add	x0, x0, :lo12:.LC207
+	bl	printf
+.L3050:
+	ldrh	w1, [x22]
+	ldr	x0, [x19, #:lo12:.LANCHOR9]
+	ldp	x23, x24, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	strh	w21, [x0, x1, lsl 1]
+	ldp	x25, x26, [sp, 64]
+	ldp	x21, x22, [sp, 32]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+.L3049:
+	ldr	w2, [x19, x24, lsl 2]
+	cmn	w2, #1
+	beq	.L3044
+	ldrb	w20, [x27, #:lo12:.LANCHOR121]
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	lsl	w20, w20, 7
+	udiv	w20, w2, w20
+	and	w20, w20, 65535
+	tbz	x0, 12, .L3045
+	adrp	x0, .LC204
+	mov	w3, w24
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC204
+	bl	printf
+.L3045:
 	adrp	x25, .LANCHOR105
-	adrp	x26, .LC203
+	adrp	x26, .LC205
 	mov	x28, x24
 	add	x25, x25, :lo12:.LANCHOR105
-	add	x26, x26, :lo12:.LC203
-.L3047:
+	add	x26, x26, :lo12:.LC205
+.L3048:
 	ldr	w1, [x19, x28, lsl 2]
 	cmn	w1, #1
-	beq	.L3045
+	beq	.L3046
 	ldr	x0, [x29, 96]
 	ldrb	w2, [x0]
 	lsl	w2, w2, 7
 	udiv	w1, w1, w2
 	cmp	w20, w1, uxth
-	bne	.L3045
+	bne	.L3046
 	ldrb	w0, [x22, 9]
 	sdiv	w1, w28, w0
 	msub	w0, w1, w0, w28
@@ -18902,15 +18937,15 @@ ftl_update_l2p_map:
 	str	w2, [x29, 124]
 	ldr	w1, [x19, x28, lsl 2]
 	bl	pm_ppa_update_check
-	cbz	w0, .L3046
+	cbz	w0, .L3047
 	ldr	x0, [x29, 104]
 	mov	w3, w23
 	mov	w2, 4
 	ldr	x1, [x0, #:lo12:.LANCHOR111]
-	adrp	x0, .LC204
-	add	x0, x0, :lo12:.LC204
+	adrp	x0, .LC206
+	add	x0, x0, :lo12:.LC206
 	bl	rknand_print_hex
-.L3046:
+.L3047:
 	ldr	w0, [x19, x28, lsl 2]
 	add	w21, w21, 1
 	mov	w2, 1
@@ -18919,13 +18954,13 @@ ftl_update_l2p_map:
 	bl	pm_log2phys
 	mov	w0, -1
 	str	w0, [x19, x28, lsl 2]
-.L3045:
+.L3046:
 	add	x28, x28, 1
 	cmp	w23, w28
-	bgt	.L3047
-.L3043:
+	bgt	.L3048
+.L3044:
 	add	x24, x24, 1
-	b	.L3042
+	b	.L3043
 	.size	ftl_update_l2p_map, .-ftl_update_l2p_map
 	.section	.text.ftl_alloc_new_data_sblk,"ax",@progbits
 	.align	2
@@ -18941,9 +18976,9 @@ ftl_alloc_new_data_sblk:
 	ldrh	w0, [x19]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3071
+	beq	.L3072
 	bl	zftl_insert_data_list
-.L3071:
+.L3072:
 	adrp	x0, .LANCHOR10
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	add	x0, x0, 16
@@ -18975,10 +19010,10 @@ ftl_write_commit:
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-.L3076:
+.L3077:
 	adrp	x2, .LANCHOR57
 	ldrb	w1, [x2, #:lo12:.LANCHOR57]
-	cbz	w1, .L3078
+	cbz	w1, .L3079
 	adrp	x3, .LANCHOR56
 	adrp	x0, .LANCHOR49
 	add	x0, x0, :lo12:.LANCHOR49
@@ -18997,24 +19032,24 @@ ftl_write_commit:
 	mov	x19, x0
 	ldr	w1, [x0, #:lo12:.LANCHOR118]
 	cmp	w2, w1
-	bcc	.L3080
+	bcc	.L3081
 	adrp	x1, .LANCHOR211
 	adrp	x0, .LC0
 	mov	w2, 495
 	add	x1, x1, :lo12:.LANCHOR211
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3080:
+.L3081:
 	ldr	x0, [x29, 112]
 	ldr	w1, [x19, #:lo12:.LANCHOR118]
 	add	x0, x23, x0, lsl 6
 	ldr	w22, [x0, 36]
 	cmp	w22, w1
-	bcc	.L3081
+	bcc	.L3082
 	ldr	x0, [x29, 120]
 	bl	buf_free
 	mov	w0, -1
-.L3075:
+.L3076:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -19022,7 +19057,7 @@ ftl_write_commit:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L3081:
+.L3082:
 	ldrb	w21, [x0, 57]
 	ldrb	w20, [x0, 56]
 	ldr	x26, [x0, 8]
@@ -19030,17 +19065,17 @@ ftl_write_commit:
 	adrp	x0, .LANCHOR119
 	str	x0, [x29, 104]
 	ldrb	w1, [x0, #:lo12:.LANCHOR119]
-	cbz	w1, .L3083
-	adrp	x0, .LANCHOR174
-	ldrb	w1, [x0, #:lo12:.LANCHOR174]
+	cbz	w1, .L3084
+	adrp	x0, .LANCHOR173
+	ldrb	w1, [x0, #:lo12:.LANCHOR173]
 	add	x1, x23, x1, lsl 6
-.L3084:
+.L3085:
 	ldrb	w0, [x1]
 	cmp	w0, 255
-	bne	.L3085
+	bne	.L3086
 	ldr	w0, [x1, 36]
 	cmp	w22, w0
-	bne	.L3083
+	bne	.L3084
 	ldr	x0, [x1, 8]
 	ubfiz	x21, x21, 9, 8
 	lsl	w2, w20, 9
@@ -19049,33 +19084,33 @@ ftl_write_commit:
 	bl	ftl_memcpy
 	ldr	x0, [x29, 120]
 	bl	buf_free
-	b	.L3076
-.L3085:
+	b	.L3077
+.L3086:
 	ubfiz	x1, x0, 6, 8
 	add	x1, x23, x1
-	b	.L3084
-.L3083:
+	b	.L3085
+.L3084:
 	mov	w0, w22
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 140]
 	cmn	w0, #1
-	bne	.L3087
+	bne	.L3088
 	mov	w2, 0
 	add	x1, x29, 140
 	mov	w0, w22
 	bl	pm_log2phys
-.L3087:
+.L3088:
 	adrp	x25, .LANCHOR10
 	add	x1, x23, 2
 	mov	w0, 0
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 16
-.L3090:
+.L3091:
 	ldr	w2, [x1, 34]
 	cmp	w22, w2
-	bne	.L3088
+	bne	.L3089
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L3088
+	tbz	x2, 3, .L3089
 	ubfiz	x0, x0, 6, 32
 	and	w2, w2, -9
 	add	x0, x23, x0
@@ -19083,50 +19118,50 @@ ftl_write_commit:
 	ldr	x24, [x0, 8]
 	ldr	w0, [x0, 40]
 	str	w0, [x29, 140]
-.L3089:
+.L3090:
 	adrp	x0, .LANCHOR121
 	str	x0, [x29, 96]
 	ldrb	w1, [x0, #:lo12:.LANCHOR121]
 	cmp	w20, w1
-	bcs	.L3114
+	bcs	.L3115
 	add	w20, w21, w20
-	cbz	x24, .L3092
-	cbz	w21, .L3093
+	cbz	x24, .L3093
+	cbz	w21, .L3094
 	lsl	w2, w21, 9
 	mov	x1, x24
 	mov	x0, x26
 	bl	ftl_memcpy
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 48
-.L3093:
+.L3094:
 	ldr	x0, [x29, 96]
 	ldrb	w2, [x0, #:lo12:.LANCHOR121]
 	cmp	w20, w2
-	bcc	.L3094
+	bcc	.L3095
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 16
-.L3114:
+.L3115:
 	mov	w24, 0
-	b	.L3091
-.L3088:
+	b	.L3092
+.L3089:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 32
-	bne	.L3090
+	bne	.L3091
 	mov	x24, 0
-	b	.L3089
-.L3094:
+	b	.L3090
+.L3095:
 	ubfiz	x0, x20, 9, 9
 	sub	w2, w2, w20
 	add	x1, x24, x0
 	lsl	w2, w2, 9
 	add	x0, x26, x0
 	bl	ftl_memcpy
-	b	.L3114
-.L3092:
+	b	.L3115
+.L3093:
 	ldr	w0, [x29, 140]
 	cmn	w0, #1
-	beq	.L3095
+	beq	.L3096
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 140]
@@ -19139,11 +19174,11 @@ ftl_write_commit:
 	ldr	w0, [x0, 4]
 	add	w24, w24, 1
 	cmp	w22, w0
-	bne	.L3096
+	bne	.L3097
 	ldr	w0, [x27, 52]
 	cmn	w0, #1
-	bne	.L3097
-.L3096:
+	bne	.L3098
+.L3097:
 	ldr	x1, [x25, #:lo12:.LANCHOR10]
 	mov	w3, w22
 	ldr	w4, [x27, 52]
@@ -19151,53 +19186,53 @@ ftl_write_commit:
 	ldr	w0, [x1, 552]
 	add	w0, w0, 1
 	str	w0, [x1, 552]
-	adrp	x0, .LC206
-	add	x0, x0, :lo12:.LC206
+	adrp	x0, .LC208
+	add	x0, x0, :lo12:.LC208
 	ldrb	w1, [x27, 1]
 	bl	printf
 	ldr	x1, [x27, 24]
 	mov	w3, 4
-	adrp	x0, .LC168
+	adrp	x0, .LC167
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC168
+	add	x0, x0, :lo12:.LC167
 	bl	rknand_print_hex
-.L3097:
+.L3098:
 	ldr	x0, [x27, 24]
 	ldr	w0, [x0, 4]
 	cmp	w22, w0
-	bne	.L3098
+	bne	.L3099
 	ldr	w0, [x27, 52]
 	cmn	w0, #1
-	bne	.L3099
-.L3098:
+	bne	.L3100
+.L3099:
 	adrp	x1, .LANCHOR211
 	adrp	x0, .LC0
 	mov	w2, 566
 	add	x1, x1, :lo12:.LANCHOR211
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3099:
-	cbz	w21, .L3100
+.L3100:
+	cbz	w21, .L3101
 	ldr	w0, [x29, 140]
 	lsl	w2, w21, 9
 	cmn	w0, #1
-	beq	.L3101
+	beq	.L3102
 	ldr	x1, [x27, 8]
 	mov	x0, x26
 	bl	ftl_memcpy
-.L3102:
+.L3103:
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 48
-.L3100:
+.L3101:
 	ldr	x0, [x29, 96]
 	ldrb	w2, [x0, #:lo12:.LANCHOR121]
 	cmp	w20, w2
-	bcc	.L3103
-	bls	.L3104
+	bcc	.L3104
+	bls	.L3105
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 16
-.L3104:
-	cbz	x27, .L3091
+.L3105:
+	cbz	x27, .L3092
 	ldrb	w0, [x27, 2]
 	mov	x1, x27
 	and	w0, w0, -9
@@ -19207,17 +19242,17 @@ ftl_write_commit:
 	bl	buf_remove_buf
 	mov	x0, x27
 	bl	buf_free
-.L3091:
+.L3092:
 	ldrh	w0, [x19, 6]
-	cbnz	w0, .L3106
+	cbnz	w0, .L3107
 	bl	ftl_flush
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L3106:
+.L3107:
 	mov	x0, x19
 	bl	ftl_get_new_free_page
 	ldr	x1, [x29, 112]
-	adrp	x20, .LANCHOR174
+	adrp	x20, .LANCHOR173
 	lsl	x2, x1, 6
 	add	x1, x23, x2
 	ldr	w3, [x1, 32]
@@ -19238,7 +19273,7 @@ ftl_write_commit:
 	sub	w0, w0, #1
 	strh	w0, [x1, 48]
 	ldr	x1, [x29, 120]
-	add	x0, x20, :lo12:.LANCHOR174
+	add	x0, x20, :lo12:.LANCHOR173
 	bl	buf_add_tail
 	ldr	x0, [x29, 104]
 	ldrb	w2, [x0, #:lo12:.LANCHOR119]
@@ -19249,22 +19284,22 @@ ftl_write_commit:
 	cmp	w2, 2
 	str	wzr, [x0, #:lo12:.LANCHOR212]
 	ldrh	w0, [x19, 6]
-	bhi	.L3107
+	bhi	.L3108
 	cmp	w0, 1
-	bne	.L3079
-.L3107:
+	bne	.L3080
+.L3108:
 	ldrb	w1, [x19, 5]
 	cmp	w1, 0
 	mov	w1, 0
 	cset	w4, ne
 	cmp	w0, 1
-	ldrb	w0, [x20, #:lo12:.LANCHOR174]
+	ldrb	w0, [x20, #:lo12:.LANCHOR173]
 	csinc	w4, w2, w4, eq
 	mov	w3, w0
-.L3111:
+.L3112:
 	cmp	w1, w4
-	bne	.L3112
-	strb	w3, [x20, #:lo12:.LANCHOR174]
+	bne	.L3113
+	strb	w3, [x20, #:lo12:.LANCHOR173]
 	and	w1, w1, 255
 	ldr	x3, [x29, 104]
 	sub	w2, w2, w1
@@ -19274,58 +19309,58 @@ ftl_write_commit:
 	bl	sblk_prog_page
 	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bne	.L3079
+	bne	.L3080
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	mov	x0, x19
 	bl	ftl_write_last_log_page
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L3079:
+.L3080:
 	adrp	x0, .LANCHOR57
 	ldrb	w0, [x0, #:lo12:.LANCHOR57]
-	cbnz	w0, .L3076
-.L3078:
+	cbnz	w0, .L3077
+.L3079:
 	bl	ftl_write_completed
 	mov	w0, 0
-	b	.L3075
-.L3103:
+	b	.L3076
+.L3104:
 	ldr	w0, [x29, 140]
 	sub	w2, w2, w20
 	lsl	w2, w2, 9
 	cmn	w0, #1
 	ubfiz	x0, x20, 7, 9
-	beq	.L3105
+	beq	.L3106
 	ldr	x1, [x27, 8]
 	lsl	x0, x0, 2
 	add	x1, x1, x0
 	add	x0, x26, x0
 	bl	ftl_memcpy
-	b	.L3104
-.L3105:
+	b	.L3105
+.L3106:
 	mov	w1, 0
 	add	x0, x26, x0, lsl 2
 	bl	ftl_memset
-	b	.L3104
-.L3112:
+	b	.L3105
+.L3113:
 	ubfiz	x3, x3, 6, 8
 	add	w1, w1, 1
 	ldrb	w3, [x23, x3]
-	b	.L3111
-.L3113:
+	b	.L3112
+.L3114:
 	lsl	w2, w21, 9
 	mov	x27, 0
 	mov	w24, 0
-.L3101:
+.L3102:
 	mov	w1, 0
 	mov	x0, x26
 	bl	ftl_memset
-	b	.L3102
-.L3095:
-	cbnz	w21, .L3113
+	b	.L3103
+.L3096:
+	cbnz	w21, .L3114
 	mov	w24, 0
 	mov	x27, 0
-	b	.L3100
+	b	.L3101
 	.size	ftl_write_commit, .-ftl_write_commit
 	.section	.text.gc_do_copy_back,"ax",@progbits
 	.align	2
@@ -19342,10 +19377,10 @@ gc_do_copy_back:
 	stp	x23, x24, [sp, 64]
 	stp	x25, x26, [sp, 80]
 	stp	x27, x28, [sp, 96]
-	cbnz	w0, .L3137
+	cbnz	w0, .L3138
 	bl	buf_alloc
 	mov	x19, x0
-	cbz	x0, .L3136
+	cbz	x0, .L3137
 	adrp	x20, .LANCHOR62
 	add	x3, x20, :lo12:.LANCHOR62
 	ldrh	w2, [x3, 26]
@@ -19361,52 +19396,52 @@ gc_do_copy_back:
 	ldr	w0, [x19, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3139
+	bne	.L3140
 	adrp	x1, .LANCHOR213
 	adrp	x0, .LC0
-	mov	w2, 595
+	mov	w2, 600
 	add	x1, x1, :lo12:.LANCHOR213
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3139:
+.L3140:
 	ldr	x0, [x19, 24]
 	ldr	w21, [x0, 4]
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 160]
 	cmn	w0, #1
-	bne	.L3140
+	bne	.L3141
 	mov	w2, 0
 	add	x1, x29, 160
 	mov	w0, w21
 	bl	pm_log2phys
-.L3140:
+.L3141:
 	ldr	w23, [x29, 160]
 	cmp	w22, w23
-	bne	.L3141
+	bne	.L3142
 	adrp	x0, .LANCHOR49
 	add	x0, x0, :lo12:.LANCHOR49
 	add	x1, x0, 2
 	add	x0, x0, 2050
-.L3144:
+.L3145:
 	ldr	w2, [x1, 34]
 	cmp	w21, w2
-	bne	.L3142
+	bne	.L3143
 	ldrb	w2, [x1]
-	tbz	x2, 1, .L3142
+	tbz	x2, 1, .L3143
 	mov	x0, x19
 	bl	buf_free
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3136
+	tbz	x0, 8, .L3137
 	add	x20, x20, :lo12:.LANCHOR62
-	adrp	x0, .LC207
+	adrp	x0, .LC209
 	mov	w2, w22
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC207
+	add	x0, x0, :lo12:.LC209
 	ldrh	w3, [x20, 26]
 	bl	printf
-.L3136:
+.L3137:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -19415,10 +19450,10 @@ gc_do_copy_back:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 224
 	ret
-.L3142:
+.L3143:
 	add	x1, x1, 64
 	cmp	x0, x1
-	bne	.L3144
+	bne	.L3145
 	adrp	x0, .LANCHOR121
 	mov	w1, 10
 	strb	wzr, [x19, 57]
@@ -19433,19 +19468,19 @@ gc_do_copy_back:
 	str	w0, [x19, 32]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3145
+	tbz	x0, 8, .L3146
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	add	x1, x20, :lo12:.LANCHOR62
 	mov	w3, w0
 	mov	w4, w22
-	adrp	x0, .LC208
+	adrp	x0, .LC210
 	mov	w2, w23
-	add	x0, x0, :lo12:.LC208
+	add	x0, x0, :lo12:.LC210
 	ldrh	w5, [x1, 26]
 	mov	w1, w21
 	bl	printf
-.L3145:
+.L3146:
 	mov	x0, x19
 	bl	ftl_gc_write_buf
 	bl	ftl_write_commit
@@ -19458,27 +19493,27 @@ gc_do_copy_back:
 	ldrh	w0, [x20, 28]
 	add	w0, w0, 1
 	strh	w0, [x20, 28]
-	b	.L3136
-.L3141:
+	b	.L3137
+.L3142:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3146
+	tbz	x0, 8, .L3147
 	add	x20, x20, :lo12:.LANCHOR62
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	mov	w3, w0
 	mov	w4, w22
-	adrp	x0, .LC208
+	adrp	x0, .LC210
 	ldrh	w5, [x20, 26]
 	mov	w2, w23
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC208
+	add	x0, x0, :lo12:.LC210
 	bl	printf
-.L3146:
+.L3147:
 	mov	x0, x19
 	bl	buf_free
-	b	.L3136
-.L3137:
+	b	.L3137
+.L3138:
 	adrp	x1, .LANCHOR10
 	adrp	x0, .LANCHOR68
 	stp	x0, x1, [x29, 128]
@@ -19487,10 +19522,10 @@ gc_do_copy_back:
 	ldrb	w25, [x0, #:lo12:.LANCHOR68]
 	add	x22, x22, 80
 	cmp	w25, 3
-	bne	.L3147
+	bne	.L3148
 	adrp	x0, .LANCHOR70
 	ldrb	w0, [x0, #:lo12:.LANCHOR70]
-	cbz	w0, .L3148
+	cbz	w0, .L3149
 	add	x0, x24, :lo12:.LANCHOR62
 	ldrb	w19, [x22, 9]
 	ldrh	w20, [x0, 314]
@@ -19499,7 +19534,7 @@ gc_do_copy_back:
 	sdiv	w21, w20, w21
 	madd	w19, w21, w19, w20
 	and	w19, w19, 65535
-.L3149:
+.L3150:
 	adrp	x1, .LANCHOR72
 	ldrb	w0, [x22, 9]
 	add	x4, x24, :lo12:.LANCHOR62
@@ -19511,13 +19546,13 @@ gc_do_copy_back:
 	adrp	x0, .LANCHOR148
 	ldr	x7, [x0, #:lo12:.LANCHOR148]
 	sub	w3, w3, #1
-.L3152:
+.L3153:
 	cmp	w2, w8
-	blt	.L3154
-.L3181:
+	blt	.L3155
+.L3182:
 	mov	w23, 1
-	b	.L3150
-.L3148:
+	b	.L3151
+.L3149:
 	add	x0, x24, :lo12:.LANCHOR62
 	ldrb	w20, [x22, 9]
 	ldrh	w1, [x0, 314]
@@ -19533,12 +19568,12 @@ gc_do_copy_back:
 	madd	w20, w21, w20, w19
 	add	w20, w20, w20, lsl 1
 	and	w20, w20, 65535
-	beq	.L3149
-.L3150:
+	beq	.L3150
+.L3151:
 	adrp	x0, .LANCHOR14
 	str	x0, [x29, 112]
 	ldr	w1, [x0, #:lo12:.LANCHOR14]
-	tbz	x1, 8, .L3155
+	tbz	x1, 8, .L3156
 	adrp	x0, .LANCHOR148
 	ubfiz	x1, x20, 2, 16
 	mov	w6, w20
@@ -19546,18 +19581,18 @@ gc_do_copy_back:
 	ldr	x2, [x0, #:lo12:.LANCHOR148]
 	add	x0, x24, :lo12:.LANCHOR62
 	ldrh	w4, [x0, 314]
-	adrp	x0, .LC209
+	adrp	x0, .LC211
 	ldr	w5, [x2, x1]
-	add	x0, x0, :lo12:.LC209
+	add	x0, x0, :lo12:.LC211
 	mov	w2, w23
 	mov	w1, w21
 	bl	printf
-.L3155:
+.L3156:
 	adrp	x0, .LANCHOR49
 	str	wzr, [x29, 152]
 	add	x0, x0, :lo12:.LANCHOR49
 	str	x0, [x29, 120]
-.L3156:
+.L3157:
 	ldrb	w2, [x22, 9]
 	ldr	w0, [x29, 152]
 	ldrh	w26, [x29, 152]
@@ -19565,27 +19600,27 @@ gc_do_copy_back:
 	str	w0, [x29, 156]
 	mul	w1, w25, w2
 	cmp	w0, w1
-	blt	.L3168
+	blt	.L3169
 	ldr	x0, [x29, 128]
 	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w0, 3
 	add	x0, x29, 160
-	beq	.L3169
+	beq	.L3170
 	sub	w3, w1, #1
 	mov	w2, 0
-.L3170:
+.L3171:
 	cmp	w2, w3
-	blt	.L3176
+	blt	.L3177
 	ldr	x0, [x0, w3, sxtw 3]
 	mov	w2, -1
 	strb	w2, [x0]
 	ldr	x0, [x29, 160]
 	bl	sblk_prog_page
-	b	.L3175
-.L3147:
+	b	.L3176
+.L3148:
 	adrp	x0, .LANCHOR104
 	ldrb	w0, [x0, #:lo12:.LANCHOR104]
-	cbnz	w0, .L3151
+	cbnz	w0, .L3152
 	add	x0, x24, :lo12:.LANCHOR62
 	ldrb	w19, [x22, 9]
 	mov	w25, 1
@@ -19593,8 +19628,8 @@ gc_do_copy_back:
 	sdiv	w21, w20, w19
 	msub	w19, w21, w19, w20
 	and	w19, w19, 65535
-	b	.L3149
-.L3151:
+	b	.L3150
+.L3152:
 	add	x0, x24, :lo12:.LANCHOR62
 	ldrb	w19, [x22, 9]
 	mov	w25, 2
@@ -19602,28 +19637,28 @@ gc_do_copy_back:
 	sdiv	w21, w20, w19
 	msub	w19, w21, w19, w20
 	and	w19, w19, 65535
-	b	.L3149
-.L3154:
+	b	.L3150
+.L3155:
 	add	w5, w20, w2
 	cmp	w5, w3
-	beq	.L3181
+	beq	.L3182
 	sbfiz	x5, x5, 2, 32
 	ldr	w0, [x7, x5]
 	cmn	w0, #1
-	bne	.L3153
+	bne	.L3154
 	ldrh	w6, [x4, 26]
 	cmp	w6, w10
-	bcs	.L3136
+	bcs	.L3137
 	mov	w0, w6
 	bl	gc_get_src_ppa_from_index
 	add	w6, w6, 1
 	strh	w6, [x4, 26]
 	str	w0, [x7, x5]
-.L3153:
+.L3154:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-	b	.L3152
-.L3168:
+	b	.L3153
+.L3169:
 	ldr	w0, [x29, 156]
 	add	w0, w20, w0
 	str	w0, [x29, 144]
@@ -19632,11 +19667,11 @@ gc_do_copy_back:
 	ldr	x0, [x0, #:lo12:.LANCHOR69]
 	ldrb	w0, [x0, x27]
 	cmp	w0, 255
-	bne	.L3157
+	bne	.L3158
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbnz	x0, .L3158
+	cbnz	x0, .L3159
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	bl	gc_write_completed
@@ -19644,8 +19679,8 @@ gc_do_copy_back:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbz	x0, .L3136
-.L3158:
+	cbz	x0, .L3137
+.L3159:
 	adrp	x0, .LANCHOR69
 	ldrb	w1, [x28, 1]
 	adrp	x5, .LANCHOR72
@@ -19665,7 +19700,7 @@ gc_do_copy_back:
 	mul	w0, w0, w7
 	sub	w0, w0, #1
 	cmp	w1, w0
-	bne	.L3159
+	bne	.L3160
 	adrp	x0, .LANCHOR147
 	adrp	x4, .LANCHOR73
 	stp	x6, x5, [x29, 96]
@@ -19711,7 +19746,7 @@ gc_do_copy_back:
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x0, 132]
 	str	w0, [x6, 8]
-.L3157:
+.L3158:
 	adrp	x0, .LANCHOR69
 	ldr	w5, [x29, 156]
 	add	x1, x29, 160
@@ -19730,7 +19765,7 @@ gc_do_copy_back:
 	strb	w23, [x3, 61]
 	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w0, 3
-	bne	.L3163
+	bne	.L3164
 	udiv	w0, w26, w0
 	adrp	x6, .LANCHOR105
 	ldrh	w6, [x6, #:lo12:.LANCHOR105]
@@ -19748,10 +19783,10 @@ gc_do_copy_back:
 	ldr	x3, [x5, #:lo12:.LANCHOR149]
 	orr	w0, w1, w0, lsl 24
 	str	w0, [x3, x6, lsl 2]
-.L3164:
+.L3165:
 	ldr	x0, [x29, 112]
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3167
+	tbz	x0, 8, .L3168
 	ldr	x0, [x29, 120]
 	ldrb	w4, [x4, x27]
 	ldr	w1, [x29, 156]
@@ -19765,19 +19800,19 @@ gc_do_copy_back:
 	str	w0, [sp, 8]
 	mov	w0, 3
 	udiv	w26, w26, w0
-	adrp	x0, .LC210
-	add	x0, x0, :lo12:.LC210
+	adrp	x0, .LC212
+	add	x0, x0, :lo12:.LC212
 	add	w26, w26, w19
 	str	w26, [sp]
 	ldr	w5, [x2, 40]
 	mov	w2, w23
 	bl	printf
-.L3167:
+.L3168:
 	ldr	w0, [x29, 152]
 	add	w0, w0, 1
 	str	w0, [x29, 152]
-	b	.L3156
-.L3159:
+	b	.L3157
+.L3160:
 	lsl	x0, x27, 2
 	str	x0, [x29, 144]
 	ldr	x0, [x6, #:lo12:.LANCHOR148]
@@ -19790,7 +19825,7 @@ gc_do_copy_back:
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3161
+	bne	.L3162
 	adrp	x0, .LANCHOR99
 	ldr	w1, [x28, 40]
 	ldrh	w4, [x0, #:lo12:.LANCHOR99]
@@ -19809,30 +19844,30 @@ gc_do_copy_back:
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3161
+	bne	.L3162
 	ldr	x0, [x28, 24]
 	mov	w1, -1
 	str	w1, [x0, 4]
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmp	w0, w1, 4, ne
-	bne	.L3161
+	bne	.L3162
 	adrp	x1, .LANCHOR213
 	adrp	x0, .LC0
-	mov	w2, 710
+	mov	w2, 715
 	add	x1, x1, :lo12:.LANCHOR213
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3161:
+.L3162:
 	ldr	x0, [x28, 24]
 	adrp	x1, .LANCHOR118
 	ldr	w1, [x1, #:lo12:.LANCHOR118]
 	ldr	w2, [x0, 4]
 	cmp	w2, w1
-	bcc	.L3162
+	bcc	.L3163
 	mov	w1, -1
 	str	w1, [x0, 4]
-.L3162:
+.L3163:
 	adrp	x1, .LANCHOR147
 	lsl	x3, x27, 2
 	ldr	w2, [x0, 4]
@@ -19840,32 +19875,32 @@ gc_do_copy_back:
 	str	w2, [x1, x3]
 	ldr	w1, [x28, 40]
 	str	w1, [x0, 8]
-	b	.L3157
-.L3163:
+	b	.L3158
+.L3164:
 	cmp	w0, 2
-	bne	.L3165
+	bne	.L3166
 	adrp	x0, .LANCHOR104
 	adrp	x1, .LANCHOR105
 	ldrb	w0, [x0, #:lo12:.LANCHOR104]
-	cbnz	w0, .L3166
+	cbnz	w0, .L3167
 	ldr	w0, [x29, 156]
 	ldrh	w1, [x1, #:lo12:.LANCHOR105]
 	add	w0, w19, w0
 	add	x0, x22, x0, sxtw 1
 	ldrh	w0, [x0, 16]
 	madd	w0, w0, w1, w21
-.L3224:
+.L3225:
 	orr	w0, w0, 33554432
 	str	w0, [x3, 40]
-.L3165:
+.L3166:
 	ldr	x0, [x29, 120]
 	add	x0, x0, x2, lsl 6
 	ldrh	w1, [x0, 48]
 	ldr	w3, [x0, 40]
 	ldr	x0, [x5, #:lo12:.LANCHOR149]
 	str	w3, [x0, x1, lsl 2]
-	b	.L3164
-.L3166:
+	b	.L3165
+.L3167:
 	add	w0, w19, w26, lsr 1
 	ldrh	w1, [x1, #:lo12:.LANCHOR105]
 	add	x0, x22, x0, sxtw 1
@@ -19873,32 +19908,32 @@ gc_do_copy_back:
 	madd	w0, w0, w1, w21
 	and	w1, w26, 1
 	add	w0, w0, w1
-	b	.L3224
-.L3169:
+	b	.L3225
+.L3170:
 	adrp	x1, .LANCHOR70
 	ldrb	w3, [x1, #:lo12:.LANCHOR70]
 	ldr	x1, [x29, 160]
-	cbz	w3, .L3171
-.L3174:
+	cbz	w3, .L3172
+.L3175:
 	strb	wzr, [x1, 60]
-	b	.L3172
-.L3171:
+	b	.L3173
+.L3172:
 	cmp	w23, 1
-	bne	.L3173
+	bne	.L3174
 	mov	w3, 9
-.L3223:
+.L3224:
 	strb	w3, [x1, 60]
-.L3172:
+.L3173:
 	add	x1, x0, 24
 	bl	sblk_xlc_prog_pages
-.L3175:
+.L3176:
 	adrp	x1, .LANCHOR70
 	ldrb	w3, [x22, 9]
 	ldrb	w1, [x1, #:lo12:.LANCHOR70]
 	and	w0, w3, 65535
-	cbz	w1, .L3177
+	cbz	w1, .L3178
 	add	w0, w0, w0, lsl 1
-.L3178:
+.L3179:
 	adrp	x1, .LANCHOR97
 	add	x24, x24, :lo12:.LANCHOR62
 	ldr	x1, [x1, #:lo12:.LANCHOR97]
@@ -19913,34 +19948,34 @@ gc_do_copy_back:
 	ldrh	w1, [x1, #:lo12:.LANCHOR72]
 	mul	w1, w1, w3
 	cmp	w0, w1
-	blt	.L3179
+	blt	.L3180
 	ldr	x0, [x29, 136]
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	strh	wzr, [x0, 86]
-.L3179:
+.L3180:
 	bl	gc_write_completed
-	b	.L3136
-.L3173:
+	b	.L3137
+.L3174:
 	cmp	w23, 2
-	bne	.L3174
+	bne	.L3175
 	mov	w3, 13
-	b	.L3223
-.L3176:
+	b	.L3224
+.L3177:
 	ldr	x4, [x0, w2, sxtw 3]
 	add	w2, w2, 1
 	ldr	x5, [x0, w2, sxtw 3]
 	and	w2, w2, 65535
 	ldrb	w5, [x5, 1]
 	strb	w5, [x4]
-	b	.L3170
-.L3177:
+	b	.L3171
+.L3178:
 	adrp	x1, .LANCHOR104
 	ldrb	w2, [x1, #:lo12:.LANCHOR104]
 	mov	w1, w0
 	ubfiz	w0, w0, 1, 15
 	cmp	w2, 0
 	csel	w0, w0, w1, ne
-	b	.L3178
+	b	.L3179
 	.size	gc_do_copy_back, .-gc_do_copy_back
 	.section	.text.zftl_do_gc,"ax",@progbits
 	.align	2
@@ -19965,35 +20000,35 @@ zftl_do_gc:
 	stp	x27, x28, [sp, 96]
 	ldr	x24, [x23, #:lo12:.LANCHOR10]
 	cmp	w1, 6
-	bhi	.L3330
+	bhi	.L3333
 	mov	w26, w0
 	and	w21, w21, 65535
-	adrp	x0, .L3228
-	add	x0, x0, :lo12:.L3228
+	adrp	x0, .L3229
+	add	x0, x0, :lo12:.L3229
 	ldrh	w0, [x0,w1,uxtw #1]
-	adr	x1, .Lrtx3228
+	adr	x1, .Lrtx3229
 	add	x0, x1, w0, sxth #2
 	br	x0
-.Lrtx3228:
+.Lrtx3229:
 	.section	.rodata.zftl_do_gc,"a",@progbits
 	.align	0
 	.align	2
-.L3228:
-	.2byte	(.L3227 - .Lrtx3228) / 4
-	.2byte	(.L3229 - .Lrtx3228) / 4
-	.2byte	(.L3230 - .Lrtx3228) / 4
-	.2byte	(.L3231 - .Lrtx3228) / 4
-	.2byte	(.L3232 - .Lrtx3228) / 4
-	.2byte	(.L3233 - .Lrtx3228) / 4
-	.2byte	(.L3234 - .Lrtx3228) / 4
+.L3229:
+	.2byte	(.L3228 - .Lrtx3229) / 4
+	.2byte	(.L3230 - .Lrtx3229) / 4
+	.2byte	(.L3231 - .Lrtx3229) / 4
+	.2byte	(.L3232 - .Lrtx3229) / 4
+	.2byte	(.L3233 - .Lrtx3229) / 4
+	.2byte	(.L3234 - .Lrtx3229) / 4
+	.2byte	(.L3235 - .Lrtx3229) / 4
 	.section	.text.zftl_do_gc
-.L3233:
+.L3234:
 	adrp	x20, .LANCHOR62
 	add	x24, x20, :lo12:.LANCHOR62
 	mov	w22, 0
-.L3235:
+.L3236:
 	bl	gc_check_data_one_wl
-	cbz	w0, .L3326
+	cbz	w0, .L3329
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	add	x20, x20, :lo12:.LANCHOR62
 	strh	wzr, [x20, 56]
@@ -20010,8 +20045,8 @@ zftl_do_gc:
 	bl	buf_free
 	strb	wzr, [x19, #:lo12:.LANCHOR145]
 	str	xzr, [x20, 8]
-	b	.L3394
-.L3227:
+	b	.L3397
+.L3228:
 	adrp	x0, .LANCHOR92
 	adrp	x28, .LANCHOR85
 	adrp	x27, .LANCHOR83
@@ -20025,16 +20060,16 @@ zftl_do_gc:
 	mov	w0, 65535
 	and	w25, w25, 65535
 	cmp	w1, w0
-	beq	.L3236
-	cbnz	w26, .L3237
+	beq	.L3237
+	cbnz	w26, .L3238
 	adrp	x0, .LANCHOR74
 	ldrh	w0, [x0, #:lo12:.LANCHOR74]
 	cmp	w21, w0, lsl 1
-	blt	.L3237
-.L3330:
+	blt	.L3238
+.L3333:
 	mov	w20, 16
-	b	.L3225
-.L3237:
+	b	.L3226
+.L3238:
 	adrp	x5, .LANCHOR82
 	mov	w1, 5
 	adrp	x26, .LANCHOR71
@@ -20046,7 +20081,7 @@ zftl_do_gc:
 	and	w3, w0, 65535
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L3238
+	beq	.L3239
 	adrp	x4, .LANCHOR9
 	ubfiz	x3, x3, 1, 16
 	adrp	x1, .LANCHOR146
@@ -20059,120 +20094,120 @@ zftl_do_gc:
 	adrp	x4, .LANCHOR80
 	ldrh	w4, [x4, #:lo12:.LANCHOR80]
 	cmp	w4, w3
-	bcs	.L3239
+	bcs	.L3240
 	adrp	x1, .LANCHOR6
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	cmp	w2, w1, lsr 4
-	bls	.L3238
+	bls	.L3239
 	adrp	x1, .LANCHOR86
 	ldrh	w1, [x1, #:lo12:.LANCHOR86]
 	cmp	w1, w3
-	bls	.L3238
-.L3239:
+	bls	.L3239
+.L3240:
 	ldrb	w2, [x26, #:lo12:.LANCHOR71]
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L3240
+	cbz	w0, .L3241
 	mov	w0, 1
 	str	wzr, [x20, #:lo12:.LANCHOR146]
 	strb	w0, [x19, #:lo12:.LANCHOR145]
-	b	.L3330
-.L3238:
+	b	.L3333
+.L3239:
 	strh	wzr, [x5, #:lo12:.LANCHOR82]
-.L3240:
+.L3241:
 	cmp	w22, 15
-	bls	.L3332
+	bls	.L3335
 	adrp	x0, .LANCHOR87
 	ldrh	w1, [x0, #:lo12:.LANCHOR87]
 	adrp	x0, .LANCHOR88
 	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w1, w0
-	bhi	.L3332
+	bhi	.L3335
 	cmp	w25, 0
 	cset	w20, eq
 	add	w20, w20, 1
-.L3241:
+.L3242:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3242
+	tbz	x0, 8, .L3243
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	mov	w4, w22
 	ldrb	w2, [x26, #:lo12:.LANCHOR71]
 	mov	w3, w21
-	mov	w1, 1848
+	mov	w1, 1853
 	ldrh	w7, [x0, 122]
 	ldrh	w6, [x0, 120]
 	ldrh	w5, [x0, 124]
 	ldrh	w0, [x24, 80]
 	str	w0, [sp]
-	adrp	x0, .LC211
-	add	x0, x0, :lo12:.LC211
+	adrp	x0, .LC213
+	add	x0, x0, :lo12:.LC213
 	bl	printf
-.L3242:
+.L3243:
 	ldrb	w0, [x26, #:lo12:.LANCHOR71]
 	mov	w2, 1
 	mov	w1, w20
 	bl	gc_search_src_blk
 	cmp	w0, 0
-	ble	.L3243
-.L3244:
+	ble	.L3244
+.L3245:
 	mov	w0, 1
-.L3396:
+.L3399:
 	strb	w0, [x19, #:lo12:.LANCHOR145]
-	b	.L3330
-.L3332:
+	b	.L3333
+.L3335:
 	mov	w20, 2
-	b	.L3241
-.L3243:
+	b	.L3242
+.L3244:
 	ldrb	w0, [x26, #:lo12:.LANCHOR71]
 	mov	w2, 1
 	mov	w1, 3
 	bl	gc_search_src_blk
 	cmp	w0, 0
-	bgt	.L3244
-	b	.L3330
-.L3236:
+	bgt	.L3245
+	b	.L3333
+.L3237:
 	cmp	w26, 1
-	bne	.L3246
+	bne	.L3247
 	bl	gc_scan_static_data
 	adrp	x24, .LANCHOR71
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	ldrh	w0, [x0, 122]
-	cbz	w0, .L3247
-.L3248:
+	cbz	w0, .L3248
+.L3249:
 	mov	w0, 1
 	strb	w0, [x24, #:lo12:.LANCHOR71]
-	b	.L3396
-.L3247:
+	b	.L3399
+.L3248:
 	bl	gc_static_wearleveling
 	mov	w20, w0
-	cbnz	w0, .L3248
-	cbnz	w22, .L3249
-.L3253:
+	cbnz	w0, .L3249
+	cbnz	w22, .L3250
+.L3254:
 	mov	w20, 16
-.L3250:
+.L3251:
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	adrp	x3, .LANCHOR71
 	mov	w1, 1
 	mov	x23, x3
 	strb	w1, [x3, #:lo12:.LANCHOR71]
 	ldrh	w5, [x0, 124]
-	cbz	w5, .L3258
+	cbz	w5, .L3259
 	strb	w1, [x19, #:lo12:.LANCHOR145]
 	adrp	x1, .LANCHOR14
 	strb	wzr, [x3, #:lo12:.LANCHOR71]
 	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 8, .L3225
+	tbz	x1, 8, .L3226
 	ldrh	w7, [x0, 122]
 	mov	w4, w22
 	ldrh	w6, [x0, 120]
 	mov	w3, w21
-	adrp	x0, .LC212
+	adrp	x0, .LC214
 	mov	w2, 0
-	mov	w1, 1946
-	add	x0, x0, :lo12:.LC212
+	mov	w1, 1951
+	add	x0, x0, :lo12:.LC214
 	bl	printf
-.L3225:
+.L3226:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
@@ -20182,25 +20217,25 @@ zftl_do_gc:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 128
 	ret
-.L3249:
+.L3250:
 	cmp	w21, w25
 	adrp	x1, .LANCHOR87
 	adrp	x2, .LANCHOR84
-	bcs	.L3251
+	bcs	.L3252
 	ldrh	w0, [x2, #:lo12:.LANCHOR84]
 	cmp	w21, w0, lsl 1
-	blt	.L3252
-.L3251:
+	blt	.L3253
+.L3252:
 	ldrh	w2, [x2, #:lo12:.LANCHOR84]
 	add	w0, w21, w25
 	cmp	w0, w2, lsl 1
-	blt	.L3252
+	blt	.L3253
 	adrp	x0, .LANCHOR88
 	ldrh	w2, [x1, #:lo12:.LANCHOR87]
 	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w2, w0
-	bcc	.L3253
-.L3252:
+	bcc	.L3254
+.L3253:
 	adrp	x5, .LANCHOR146
 	adrp	x2, .LANCHOR6
 	mov	w6, 1
@@ -20210,17 +20245,17 @@ zftl_do_gc:
 	add	w0, w0, 1
 	str	w0, [x5, #:lo12:.LANCHOR146]
 	cmp	w0, w2, lsr 5
-	bls	.L3254
+	bls	.L3255
 	ldrh	w0, [x1, #:lo12:.LANCHOR87]
 	cmp	w0, w22
-	bls	.L3254
+	bls	.L3255
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3253
+	beq	.L3254
 	adrp	x1, .LANCHOR9
 	ubfiz	x0, x0, 1, 16
 	adrp	x2, .LANCHOR73
@@ -20231,82 +20266,82 @@ zftl_do_gc:
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	bgt	.L3253
+	bgt	.L3254
 	mov	w0, w6
 	str	wzr, [x5, #:lo12:.LANCHOR146]
 	mov	w2, 4
 	mov	w1, 2
-.L3384:
+.L3387:
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-	cbz	w0, .L3253
-	b	.L3244
-.L3254:
+	cbz	w0, .L3254
+	b	.L3245
+.L3255:
 	adrp	x0, .LANCHOR88
 	ldrh	w1, [x1, #:lo12:.LANCHOR87]
 	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w1, w0
-	bcc	.L3256
+	bcc	.L3257
 	mov	w2, 1
 	mov	w1, 2
 	mov	w0, w2
-	b	.L3384
-.L3256:
+	b	.L3387
+.L3257:
 	ldrh	w0, [x28, #:lo12:.LANCHOR85]
-	cbnz	w0, .L3257
+	cbnz	w0, .L3258
 	ldrh	w0, [x27, #:lo12:.LANCHOR83]
 	cmp	w0, 8
-	bls	.L3250
-.L3257:
+	bls	.L3251
+.L3258:
 	mov	w1, 1
 	mov	w2, 4
 	mov	w0, w1
-	b	.L3384
-.L3246:
+	b	.L3387
+.L3247:
 	adrp	x0, .LANCHOR74
 	ldrh	w0, [x0, #:lo12:.LANCHOR74]
 	cmp	w0, w21
-	bcc	.L3330
-	b	.L3253
-.L3258:
+	bcc	.L3333
+	b	.L3254
+.L3259:
 	adrp	x2, .LANCHOR74
 	mov	x24, x2
 	ldrh	w4, [x2, #:lo12:.LANCHOR74]
 	cmp	w21, w4
-	bcs	.L3259
-	cbz	w22, .L3260
+	bcs	.L3260
+	cbz	w22, .L3261
 	cmp	w22, 16
-	bls	.L3261
+	bls	.L3262
 	adrp	x0, .LANCHOR87
 	ldrh	w2, [x0, #:lo12:.LANCHOR87]
 	adrp	x0, .LANCHOR88
 	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w2, w0
-	bhi	.L3261
+	bhi	.L3262
 	str	x3, [x29, 104]
 	mov	w2, 4
 	mov	w0, w1
 	bl	gc_search_src_blk
 	ldr	x3, [x29, 104]
 	tst	w0, 65535
-	bne	.L3262
+	bne	.L3263
 	ldrb	w0, [x3, #:lo12:.LANCHOR71]
 	mov	w2, 4
 	mov	w1, 3
-.L3386:
+.L3389:
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
+.L3264:
+	cbnz	w0, .L3266
+	b	.L3226
 .L3263:
-	cbnz	w0, .L3265
-	b	.L3225
-.L3262:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	and	w3, w0, 65535
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L3265
+	beq	.L3266
 	adrp	x4, .LANCHOR9
 	ubfiz	x3, x3, 1, 16
 	adrp	x1, .LANCHOR146
@@ -20319,16 +20354,16 @@ zftl_do_gc:
 	adrp	x4, .LANCHOR80
 	ldrh	w4, [x4, #:lo12:.LANCHOR80]
 	cmp	w4, w3
-	bcs	.L3266
+	bcs	.L3267
 	adrp	x1, .LANCHOR6
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	cmp	w2, w1, lsr 4
-	bls	.L3265
+	bls	.L3266
 	adrp	x1, .LANCHOR86
 	ldrh	w1, [x1, #:lo12:.LANCHOR86]
 	cmp	w1, w3
-	bls	.L3265
-.L3266:
+	bls	.L3266
+.L3267:
 	ldrb	w2, [x23, #:lo12:.LANCHOR71]
 	mov	w1, 0
 	bl	gc_add_sblk
@@ -20336,67 +20371,67 @@ zftl_do_gc:
 	adrp	x0, .LANCHOR116
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR116]
-.L3265:
+.L3266:
 	mov	w0, 1
 	strb	w0, [x19, #:lo12:.LANCHOR145]
-	b	.L3225
-.L3261:
+	b	.L3226
+.L3262:
 	mov	w2, 1
 	mov	w0, w2
 	mov	w1, 2
-.L3393:
+.L3396:
 	bl	gc_search_src_blk
 	tst	w0, 65535
-	bne	.L3265
+	bne	.L3266
 	mov	w2, 2
-.L3389:
+.L3392:
 	mov	w1, 3
 	ldrb	w0, [x23, #:lo12:.LANCHOR71]
-	b	.L3386
-.L3260:
+	b	.L3389
+.L3261:
 	adrp	x1, .LANCHOR14
 	strb	wzr, [x3, #:lo12:.LANCHOR71]
 	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 8, .L3268
+	tbz	x1, 8, .L3269
 	ldrh	w7, [x0, 122]
 	mov	w5, 0
 	ldrh	w6, [x0, 120]
 	mov	w4, 0
-	adrp	x0, .LC212
+	adrp	x0, .LC214
 	mov	w3, w21
 	mov	w2, 0
-	mov	w1, 1976
-	add	x0, x0, :lo12:.LC212
+	mov	w1, 1981
+	add	x0, x0, :lo12:.LC214
 	bl	printf
-.L3268:
+.L3269:
 	cmp	w21, 16
-	bls	.L3269
+	bls	.L3270
 	mov	w2, 4
-	b	.L3389
-.L3269:
+	b	.L3392
+.L3270:
 	mov	w2, 1
 	ldrb	w0, [x23, #:lo12:.LANCHOR71]
 	mov	w1, w2
-	b	.L3393
-.L3259:
+	b	.L3396
+.L3260:
 	cmp	w26, 1
-	bne	.L3225
+	bne	.L3226
 	cmp	w21, w4, lsl 1
-	bge	.L3270
+	bge	.L3271
 	cmp	w25, w22, lsr 1
-	bcs	.L3271
+	bcs	.L3272
 	adrp	x0, .LANCHOR87
 	ldrh	w1, [x0, #:lo12:.LANCHOR87]
 	adrp	x0, .LANCHOR88
 	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w1, w0
-	bcs	.L3271
+	bcs	.L3272
 	adrp	x0, .LANCHOR84
 	ldrh	w0, [x0, #:lo12:.LANCHOR84]
 	lsr	w0, w0, 2
 	strh	w0, [x2, #:lo12:.LANCHOR74]
-	b	.L3225
-.L3271:
+	b	.L3226
+.L3272:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
@@ -20404,21 +20439,21 @@ zftl_do_gc:
 	mov	w1, 65535
 	mov	w3, w26
 	cmp	w26, w1
-	bne	.L3272
-.L3277:
+	bne	.L3273
+.L3278:
 	cmp	w22, 1
-	bhi	.L3273
-.L3274:
+	bhi	.L3274
+.L3275:
 	cmp	w21, w25
 	adrp	x21, .LANCHOR84
-	bcs	.L3281
+	bcs	.L3282
 	strb	wzr, [x23, #:lo12:.LANCHOR71]
 	mov	w0, 4
 	bl	zftl_get_gc_node.part.9
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3281
+	beq	.L3282
 	adrp	x1, .LANCHOR9
 	ubfiz	x0, x0, 1, 16
 	adrp	x2, .LANCHOR73
@@ -20429,13 +20464,13 @@ zftl_do_gc:
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	mul	w0, w0, w2
 	cmp	w1, w0, lsr 1
-	ble	.L3283
-.L3281:
+	ble	.L3284
+.L3282:
 	ldrh	w0, [x21, #:lo12:.LANCHOR84]
 	lsr	w0, w0, 2
 	strh	w0, [x24, #:lo12:.LANCHOR74]
-	b	.L3225
-.L3272:
+	b	.L3226
+.L3273:
 	adrp	x2, .LANCHOR146
 	adrp	x4, .LANCHOR6
 	uxtw	x26, w26
@@ -20445,14 +20480,14 @@ zftl_do_gc:
 	str	w1, [x2, #:lo12:.LANCHOR146]
 	cmp	w1, w4, lsr 4
 	adrp	x4, .LANCHOR9
-	bls	.L3275
+	bls	.L3276
 	ldr	x1, [x4, #:lo12:.LANCHOR9]
 	str	wzr, [x2, #:lo12:.LANCHOR146]
 	ldrh	w2, [x1, x26, lsl 1]
 	adrp	x1, .LANCHOR86
 	ldrh	w1, [x1, #:lo12:.LANCHOR86]
 	cmp	w2, w1
-	bcs	.L3275
+	bcs	.L3276
 	str	x4, [x29, 96]
 	mov	w2, 1
 	str	w3, [x29, 104]
@@ -20460,167 +20495,167 @@ zftl_do_gc:
 	bl	gc_add_sblk
 	ldr	w3, [x29, 104]
 	ldr	x4, [x29, 96]
-	cbnz	w0, .L3265
-.L3275:
+	cbnz	w0, .L3266
+.L3276:
 	ldr	x0, [x4, #:lo12:.LANCHOR9]
 	ldrh	w1, [x0, x26, lsl 1]
 	adrp	x0, .LANCHOR80
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w1, w0, lsr 1
-	bhi	.L3276
+	bhi	.L3277
 	mov	w2, 0
 	mov	w1, 1
 	mov	w0, w3
 	bl	gc_add_sblk
-	b	.L3265
-.L3276:
+	b	.L3266
+.L3277:
 	ldrh	w2, [x27, #:lo12:.LANCHOR83]
 	ldrh	w0, [x28, #:lo12:.LANCHOR85]
 	add	w0, w0, w2
 	adrp	x2, .LANCHOR84
 	ldrh	w2, [x2, #:lo12:.LANCHOR84]
 	cmp	w0, w2, lsl 1
-	ble	.L3277
+	ble	.L3278
 	adrp	x0, .LANCHOR86
 	ldrh	w0, [x0, #:lo12:.LANCHOR86]
 	cmp	w0, w1
-	bcc	.L3274
-	b	.L3277
-.L3273:
+	bcc	.L3275
+	b	.L3278
+.L3274:
 	mov	w1, 1
 	strb	w1, [x23, #:lo12:.LANCHOR71]
 	cmp	w22, 16
-	bls	.L3278
+	bls	.L3279
 	adrp	x0, .LANCHOR87
 	ldrh	w2, [x0, #:lo12:.LANCHOR87]
 	adrp	x0, .LANCHOR88
 	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w2, w0
-	bhi	.L3278
+	bhi	.L3279
 	mov	w2, 4
 	mov	w0, w1
 	bl	gc_search_src_blk
 	ands	w0, w0, 65535
-	bne	.L3279
+	bne	.L3280
 	mov	w2, 4
-.L3385:
+.L3388:
 	ldrb	w0, [x23, #:lo12:.LANCHOR71]
 	mov	w1, 3
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-.L3279:
+.L3280:
 	adrp	x1, .LANCHOR84
 	cmp	w21, w25, lsr 1
 	ldrh	w1, [x1, #:lo12:.LANCHOR84]
-	bls	.L3387
+	bls	.L3390
 	lsr	w1, w1, 2
-.L3388:
+.L3391:
 	strh	w1, [x24, #:lo12:.LANCHOR74]
-	b	.L3263
-.L3278:
+	b	.L3264
+.L3279:
 	mov	w2, 1
 	mov	w1, 2
 	mov	w0, w2
 	bl	gc_search_src_blk
 	ands	w0, w0, 65535
-	bne	.L3279
+	bne	.L3280
 	mov	w2, 2
-	b	.L3385
-.L3283:
+	b	.L3388
+.L3284:
 	mov	w1, 3
 	mov	w2, 4
 	mov	w0, 0
 	bl	gc_search_src_blk
 	ldrh	w1, [x21, #:lo12:.LANCHOR84]
 	and	w0, w0, 65535
-.L3387:
+.L3390:
 	lsr	w1, w1, 1
-	b	.L3388
-.L3270:
+	b	.L3391
+.L3271:
 	adrp	x0, .LANCHOR84
 	mov	w20, 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR84]
 	lsr	w0, w0, 2
 	strh	w0, [x2, #:lo12:.LANCHOR74]
-	b	.L3225
-.L3229:
+	b	.L3226
+.L3230:
 	adrp	x7, .LANCHOR62
 	mov	w0, 65535
 	ldrh	w1, [x7, #:lo12:.LANCHOR62]
 	cmp	w1, w0
-	bne	.L3284
+	bne	.L3285
 	bl	gc_get_src_blk
 	strh	w0, [x7, #:lo12:.LANCHOR62]
-.L3284:
+.L3285:
 	ldrh	w3, [x7, #:lo12:.LANCHOR62]
 	mov	w0, 65535
 	add	x1, x7, :lo12:.LANCHOR62
 	cmp	w3, w0
-	beq	.L3395
+	beq	.L3398
 	adrp	x0, .LANCHOR7
 	ldrh	w5, [x1, 56]
 	uxtw	x4, w3
 	ldr	x2, [x0, #:lo12:.LANCHOR7]
 	add	x2, x2, x4, lsl 2
-	cbz	w5, .L3286
+	cbz	w5, .L3287
 	add	x1, x1, 58
 	mov	w0, 0
-.L3288:
+.L3289:
 	ldrh	w6, [x1], 2
 	cmp	w6, w3
-	bne	.L3287
-.L3292:
+	bne	.L3288
+.L3293:
 	adrp	x0, .LANCHOR62
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR62]
-	b	.L3330
-.L3287:
+	b	.L3333
+.L3288:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w5, w0
-	bne	.L3288
-.L3286:
+	bne	.L3289
+.L3287:
 	ldrb	w0, [x2, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L3289
+	beq	.L3290
 	tst	w0, 192
-	bne	.L3290
-.L3289:
+	bne	.L3291
+.L3290:
 	adrp	x0, .LANCHOR9
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, x4, lsl 1]
-	cbz	w0, .L3292
-	mov	w2, 2209
+	cbz	w0, .L3293
+	mov	w2, 2214
 	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3292
-.L3290:
+	b	.L3293
+.L3291:
 	mov	w0, 2
-	b	.L3396
-.L3230:
+	b	.L3399
+.L3231:
 	bl	gc_scan_src_blk
 	cmn	w0, #1
-	bne	.L3293
+	bne	.L3294
 	mov	w0, 3
-	b	.L3396
-.L3293:
+	b	.L3399
+.L3294:
 	adrp	x20, .LANCHOR62
 	mov	w2, 65535
 	add	x0, x20, :lo12:.LANCHOR62
 	ldrh	w1, [x20, #:lo12:.LANCHOR62]
 	cmp	w1, w2
-	beq	.L3244
+	beq	.L3245
 	ldrh	w2, [x0, 24]
-	cbz	w2, .L3294
+	cbz	w2, .L3295
 	mov	w1, 4
 	strh	wzr, [x0, 26]
 	strb	w1, [x19, #:lo12:.LANCHOR145]
-	b	.L3330
-.L3294:
+	b	.L3333
+.L3295:
 	mov	w0, 1
 	strb	w0, [x19, #:lo12:.LANCHOR145]
 	adrp	x0, .LANCHOR9
@@ -20628,14 +20663,14 @@ zftl_do_gc:
 	mov	x19, x0
 	ldr	x2, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L3295
+	cbz	w1, .L3296
 	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
-	mov	w2, 2237
+	mov	w2, 2242
 	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3295:
+.L3296:
 	ldrh	w0, [x20, #:lo12:.LANCHOR62]
 	add	x21, x20, :lo12:.LANCHOR62
 	bl	ftl_free_sblk
@@ -20646,70 +20681,70 @@ zftl_do_gc:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w0, 8
-	bhi	.L3296
+	bhi	.L3297
 	strh	w0, [x21, 30]
-	b	.L3292
-.L3296:
+	b	.L3293
+.L3297:
 	strh	wzr, [x21, 30]
 	bl	ftl_flush
 	bl	pm_flush
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L3292
-.L3231:
+	b	.L3293
+.L3232:
 	adrp	x20, .LANCHOR62
 	adrp	x23, .LANCHOR80
 	add	x22, x20, :lo12:.LANCHOR62
 	add	x23, x23, :lo12:.LANCHOR80
-.L3365:
+.L3368:
 	bl	gc_scan_src_blk_one_page
 	ldrh	w1, [x22, 2]
 	ldrh	w0, [x23]
 	cmp	w1, w0
-	bcs	.L3298
+	bcs	.L3299
 	cmp	w21, 7
-	bls	.L3365
-	b	.L3330
-.L3298:
+	bls	.L3368
+	b	.L3333
+.L3299:
 	ldrh	w3, [x22, 24]
 	adrp	x0, .LANCHOR14
-	cbz	w3, .L3299
+	cbz	w3, .L3300
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	mov	w1, 4
 	strh	wzr, [x22, 26]
 	strb	w1, [x19, #:lo12:.LANCHOR145]
 	adrp	x19, .LANCHOR9
-	tbz	x0, 8, .L3300
+	tbz	x0, 8, .L3301
 	ldrh	w1, [x22]
 	ldr	x2, [x19, #:lo12:.LANCHOR9]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC213
-	add	x0, x0, :lo12:.LC213
+	adrp	x0, .LC215
+	add	x0, x0, :lo12:.LC215
 	bl	printf
-.L3300:
+.L3301:
 	ldrh	w2, [x20, #:lo12:.LANCHOR62]
 	add	x0, x20, :lo12:.LANCHOR62
 	ldr	x1, [x19, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, 24]
 	ldrh	w1, [x1, x2, lsl 1]
 	cmp	w1, w0
-	beq	.L3301
+	beq	.L3302
 	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
-	mov	w2, 2271
+	mov	w2, 2276
 	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3301:
+.L3302:
 	add	x0, x20, :lo12:.LANCHOR62
 	ldrh	w1, [x20, #:lo12:.LANCHOR62]
 	ldrh	w2, [x0, 24]
 	ldr	x0, [x19, #:lo12:.LANCHOR9]
 	strh	w2, [x0, x1, lsl 1]
-	b	.L3330
-.L3299:
+	b	.L3333
+.L3300:
 	adrp	x2, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	ldrh	w1, [x22]
@@ -20717,27 +20752,27 @@ zftl_do_gc:
 	mov	w2, 1
 	strb	w2, [x19, #:lo12:.LANCHOR145]
 	add	x21, x21, x1, uxth 2
-	tbz	x0, 8, .L3302
+	tbz	x0, 8, .L3303
 	ldrb	w2, [x21, 2]
-	adrp	x0, .LC214
-	add	x0, x0, :lo12:.LC214
+	adrp	x0, .LC216
+	add	x0, x0, :lo12:.LC216
 	ubfx	x2, x2, 5, 3
 	bl	printf
-.L3302:
+.L3303:
 	ldrb	w0, [x21, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L3303
+	beq	.L3304
 	tst	w0, 192
-	bne	.L3304
-.L3303:
+	bne	.L3305
+.L3304:
 	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
-	mov	w2, 2281
+	mov	w2, 2286
 	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3304:
+.L3305:
 	ldrh	w0, [x20, #:lo12:.LANCHOR62]
 	add	x19, x20, :lo12:.LANCHOR62
 	bl	ftl_free_sblk
@@ -20747,56 +20782,56 @@ zftl_do_gc:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w0, 8
-	bhi	.L3305
+	bhi	.L3306
 	strh	w0, [x19, 30]
-	b	.L3330
-.L3305:
+	b	.L3333
+.L3306:
 	strh	wzr, [x19, 30]
-.L3394:
+.L3397:
 	bl	flt_sys_flush
-	b	.L3330
-.L3232:
+	b	.L3333
+.L3233:
 	ldrh	w1, [x24, 80]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L3306
+	bne	.L3307
 	adrp	x0, .LANCHOR71
 	ldrb	w22, [x0, #:lo12:.LANCHOR71]
 	cmp	w22, 1
-	bne	.L3306
+	bne	.L3307
 	bl	ftl_flush
 	adrp	x0, .LANCHOR62
 	add	x1, x0, :lo12:.LANCHOR62
 	mov	x20, x0
 	ldrh	w1, [x1, 318]
-	cbz	w1, .L3307
+	cbz	w1, .L3308
 	mov	w0, w22
 	mov	w1, 5
-.L3391:
+.L3394:
 	bl	zftl_gc_get_free_sblk
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L3309
+	beq	.L3310
 	adrp	x0, .LANCHOR7
 	ldr	x21, [x0, #:lo12:.LANCHOR7]
 	add	x21, x21, x19, uxth 2
 	ldrb	w0, [x21, 2]
 	tst	w0, 224
-	beq	.L3310
+	beq	.L3311
 	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
-	mov	w2, 2310
+	mov	w2, 2315
 	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3310:
+.L3311:
 	ldrb	w0, [x21, 2]
 	mov	w1, 5
 	bfi	w0, w1, 5, 3
 	orr	w0, w0, 16
 	strb	w0, [x21, 2]
-.L3329:
+.L3332:
 	mov	w1, 1
 	mov	w0, w19
 	bl	ftl_erase_sblk
@@ -20859,12 +20894,12 @@ zftl_do_gc:
 	strh	wzr, [x0, 320]
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L3330
-.L3307:
+	b	.L3333
+.L3308:
 	mov	w1, 5
 	mov	w0, 0
-	b	.L3391
-.L3306:
+	b	.L3394
+.L3307:
 	cmp	w26, 1
 	mov	w22, 4
 	csinc	w22, w22, wzr, eq
@@ -20877,24 +20912,24 @@ zftl_do_gc:
 	add	x25, x25, :lo12:.LANCHOR71
 	add	x20, x21, :lo12:.LANCHOR62
 	add	x26, x24, 80
-.L3313:
+.L3314:
 	sub	w22, w22, #1
 	and	w22, w22, 255
 	cmp	w22, 255
-	beq	.L3330
+	beq	.L3333
 	bl	gc_do_copy_back
 	ldrb	w0, [x25]
-	cbnz	w0, .L3314
+	cbnz	w0, .L3315
 	adrp	x0, .LANCHOR51
 	ldrb	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, 3
-	bhi	.L3315
+	bhi	.L3316
 	bl	ftl_write_commit
-.L3315:
+.L3316:
 	ldrh	w1, [x20, 26]
 	ldrh	w0, [x20, 24]
 	cmp	w1, w0
-	bcc	.L3313
+	bcc	.L3314
 	mov	w0, 1
 	strb	w0, [x19, #:lo12:.LANCHOR145]
 	bl	ftl_write_commit
@@ -20904,35 +20939,35 @@ zftl_do_gc:
 	mov	x19, x0
 	ldr	x1, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x1, x2, lsl 1]
-	cbz	w1, .L3317
+	cbz	w1, .L3318
 	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
-	mov	w2, 2385
+	mov	w2, 2390
 	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3317:
+.L3318:
 	ldrh	w0, [x21, #:lo12:.LANCHOR62]
 	ldr	x2, [x19, #:lo12:.LANCHOR9]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L3318
+	cbnz	w1, .L3319
 	bl	ftl_free_sblk
-	b	.L3292
-.L3318:
+	b	.L3293
+.L3319:
 	mov	w2, 1
 	mov	w1, 0
 	bl	gc_add_sblk
-	b	.L3292
-.L3314:
+	b	.L3293
+.L3315:
 	ldrh	w0, [x20, 320]
-	cbz	w0, .L3319
+	cbz	w0, .L3320
 	ldr	w0, [x20, 324]
 	strh	wzr, [x20, 320]
 	cmn	w0, #1
-	beq	.L3320
+	beq	.L3321
 	bl	ftl_mask_bad_block
-.L3320:
+.L3321:
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	add	x20, x21, :lo12:.LANCHOR62
 	strh	wzr, [x20, 56]
@@ -20947,28 +20982,28 @@ zftl_do_gc:
 	strh	w0, [x2, 126]
 	strh	w0, [x1, 130]
 	ldr	x0, [x20, 8]
-	cbz	x0, .L3321
+	cbz	x0, .L3322
 	bl	buf_free
-.L3321:
+.L3322:
 	add	x21, x21, :lo12:.LANCHOR62
 	str	xzr, [x21, 8]
 	bl	flt_sys_flush
-	mov	w2, 2421
+	mov	w2, 2426
 	strb	wzr, [x19, #:lo12:.LANCHOR145]
 	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3330
-.L3319:
+	b	.L3333
+.L3320:
 	ldrh	w0, [x26, 6]
 	ldrh	w1, [x20, 26]
 	cmp	w0, 1
 	ldrh	w0, [x20, 24]
-	bls	.L3322
+	bls	.L3323
 	cmp	w1, w0
-	bcc	.L3313
+	bcc	.L3314
 	mov	w0, 1
 	strb	w0, [x19, #:lo12:.LANCHOR145]
 	ldrh	w0, [x20, 56]
@@ -20979,12 +21014,12 @@ zftl_do_gc:
 	strh	w1, [x0, 58]
 	mov	w0, -1
 	strh	w0, [x20]
-	b	.L3330
-.L3322:
+	b	.L3333
+.L3323:
 	mov	w2, 5
 	strb	w2, [x19, #:lo12:.LANCHOR145]
 	cmp	w1, w0
-	bcc	.L3323
+	bcc	.L3324
 	ldrh	w0, [x20, 56]
 	add	w1, w0, 1
 	strh	w1, [x20, 56]
@@ -20993,7 +21028,7 @@ zftl_do_gc:
 	strh	w1, [x0, 58]
 	mov	w0, -1
 	strh	w0, [x20]
-.L3323:
+.L3324:
 	bl	ftl_flush
 	bl	sblk_wait_write_queue_completed
 	bl	gc_write_completed
@@ -21011,37 +21046,40 @@ zftl_do_gc:
 	strh	w1, [x0, 18]
 	cmp	w2, 2
 	strh	w2, [x0, 20]
-	bne	.L3324
+	bne	.L3326
 	ubfiz	w1, w1, 1, 15
 	strh	w1, [x0, 18]
+	adrp	x1, .LANCHOR104
+	ldrb	w1, [x1, #:lo12:.LANCHOR104]
+	cbnz	w1, .L3326
 	mov	w1, 1
 	strh	w1, [x0, 20]
-.L3324:
+.L3326:
 	add	x21, x21, :lo12:.LANCHOR62
 	strh	wzr, [x21, 22]
-	b	.L3330
-.L3326:
+	b	.L3333
+.L3329:
 	ldrh	w1, [x24, 16]
 	ldrh	w0, [x24, 18]
 	cmp	w1, w0
-	bcc	.L3327
+	bcc	.L3330
 	mov	w0, 6
 	strb	w0, [x19, #:lo12:.LANCHOR145]
 	ldr	x0, [x24, 8]
 	bl	buf_free
 	str	xzr, [x24, 8]
-	b	.L3330
-.L3327:
+	b	.L3333
+.L3330:
 	cmp	w21, 15
-	bls	.L3235
+	bls	.L3236
 	cmp	w26, 1
-	bne	.L3330
+	bne	.L3333
 	add	w22, w22, 1
 	and	w22, w22, 255
 	cmp	w22, 4
-	bls	.L3235
-	b	.L3330
-.L3234:
+	bls	.L3236
+	b	.L3333
+.L3235:
 	bl	gc_update_l2p_map_new
 	mov	w20, -1
 	bl	gc_free_src_blk
@@ -21054,17 +21092,17 @@ zftl_do_gc:
 	strh	w20, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L3395:
+.L3398:
 	strb	wzr, [x19, #:lo12:.LANCHOR145]
-	b	.L3330
-.L3309:
-	mov	w2, 2316
+	b	.L3333
+.L3310:
+	mov	w2, 2321
 	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3329
+	b	.L3332
 	.size	zftl_do_gc, .-zftl_do_gc
 	.section	.text.zftl_write,"ax",@progbits
 	.align	2
@@ -21084,22 +21122,22 @@ zftl_write:
 	stp	x21, x22, [sp, 32]
 	mov	x24, x3
 	stp	x25, x26, [sp, 64]
-	tbz	x0, 12, .L3398
+	tbz	x0, 12, .L3401
 	mov	w3, w2
-	adrp	x0, .LC215
+	adrp	x0, .LC217
 	mov	w2, w1
-	add	x0, x0, :lo12:.LC215
+	add	x0, x0, :lo12:.LC217
 	mov	w1, w27
 	bl	printf
-.L3398:
-	cbnz	w27, .L3399
+.L3401:
+	cbnz	w27, .L3402
 	adrp	x0, .LANCHOR58
 	mov	w27, 24576
 	ldr	w0, [x0, #:lo12:.LANCHOR58]
-.L3400:
+.L3403:
 	add	w1, w19, w20
 	cmp	w0, w1
-	bcc	.L3414
+	bcc	.L3417
 	adrp	x23, .LANCHOR121
 	add	w27, w27, w19
 	sub	w19, w20, #1
@@ -21114,8 +21152,8 @@ zftl_write:
 	mov	w26, w22
 	sub	w21, w19, w22
 	add	w21, w21, 1
-.L3402:
-	cbnz	w21, .L3410
+.L3405:
+	cbnz	w21, .L3413
 	adrp	x20, .LANCHOR90
 	adrp	x19, .LANCHOR94
 	add	x20, x20, :lo12:.LANCHOR90
@@ -21125,14 +21163,14 @@ zftl_write:
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
-.L3411:
+.L3414:
 	ldrh	w0, [x20]
 	ldrh	w1, [x19]
 	add	w0, w0, w1
 	cmp	w0, 7
-	ble	.L3412
+	ble	.L3415
 	mov	w0, 0
-.L3397:
+.L3400:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -21140,28 +21178,28 @@ zftl_write:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L3399:
+.L3402:
 	cmp	w27, 3
-	bhi	.L3414
+	bhi	.L3417
 	lsl	w27, w27, 13
 	mov	w0, 8192
-	b	.L3400
-.L3410:
+	b	.L3403
+.L3413:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbnz	x0, .L3403
+	cbnz	x0, .L3406
 	bl	ftl_write_commit
-	b	.L3402
-.L3403:
+	b	.L3405
+.L3406:
 	ldrb	w3, [x23]
 	cmp	w26, w22
 	strb	wzr, [x0, 57]
 	ccmp	w26, w19, 4, ne
 	strb	w3, [x0, 56]
-	bne	.L3406
+	bne	.L3409
 	cmp	w26, w22
-	bne	.L3407
+	bne	.L3410
 	udiv	w0, w27, w3
 	msub	w0, w0, w3, w27
 	and	w0, w0, 255
@@ -21170,9 +21208,9 @@ zftl_write:
 	and	w3, w3, 255
 	cmp	w20, w3
 	csel	w3, w20, w3, cc
-.L3419:
+.L3422:
 	strb	w3, [x28, 56]
-.L3406:
+.L3409:
 	ldr	x3, [x28, 8]
 	mov	x1, x24
 	ldrb	w0, [x28, 57]
@@ -21194,19 +21232,19 @@ zftl_write:
 	ldrb	w0, [x28, 56]
 	ubfiz	x0, x0, 9, 8
 	add	x24, x24, x0
-	b	.L3402
-.L3407:
+	b	.L3405
+.L3410:
 	ldr	w0, [x29, 108]
 	msub	w3, w3, w26, w0
-	b	.L3419
-.L3412:
+	b	.L3422
+.L3415:
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
-	b	.L3411
-.L3414:
+	b	.L3414
+.L3417:
 	mov	w0, -1
-	b	.L3397
+	b	.L3400
 	.size	zftl_write, .-zftl_write
 	.section	.text.zftl_vendor_write,"ax",@progbits
 	.align	2
@@ -21265,12 +21303,12 @@ ftl_write:
 	mov	x20, x3
 	mov	w22, w1
 	ands	w21, w0, 255
-	bne	.L3425
+	bne	.L3428
 	mov	w3, w2
 	mov	w0, 0
 	mov	x2, x20
 	bl	idb_write_data
-.L3425:
+.L3428:
 	mov	x3, x20
 	mov	w2, w19
 	mov	w1, w22
@@ -21297,7 +21335,7 @@ zftl_discard:
 	cmp	w2, w1
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	bcc	.L3448
+	bcc	.L3451
 	adrp	x24, .LANCHOR216
 	add	w22, w0, 24576
 	adrp	x0, .LANCHOR14
@@ -21306,14 +21344,14 @@ zftl_discard:
 	ldr	w2, [x0, #:lo12:.LANCHOR14]
 	add	w1, w19, w1
 	str	w1, [x24, #:lo12:.LANCHOR216]
-	tbz	x2, 12, .L3429
-	adrp	x0, .LC216
+	tbz	x2, 12, .L3432
+	adrp	x0, .LC218
 	mov	w4, 0
 	mov	w3, w19
 	mov	w2, w22
-	add	x0, x0, :lo12:.LC216
+	add	x0, x0, :lo12:.LC218
 	bl	printf
-.L3429:
+.L3432:
 	adrp	x23, .LANCHOR97
 	adrp	x26, .LANCHOR121
 	ldr	x0, [x23, #:lo12:.LANCHOR97]
@@ -21325,7 +21363,7 @@ zftl_discard:
 	ldrb	w21, [x26, #:lo12:.LANCHOR121]
 	udiv	w20, w22, w21
 	msub	w25, w20, w21, w22
-	cbz	w25, .L3430
+	cbz	w25, .L3433
 	sub	w21, w21, w25
 	mov	w0, w20
 	cmp	w21, w19
@@ -21333,20 +21371,20 @@ zftl_discard:
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	bne	.L3431
+	bne	.L3434
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
-.L3431:
+.L3434:
 	ldr	w0, [x29, 120]
 	and	w28, w21, 65535
 	cmn	w0, #1
-	beq	.L3433
+	beq	.L3436
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x3, x0
-	cbz	x0, .L3433
+	cbz	x0, .L3436
 	strb	w25, [x0, 57]
 	ubfiz	x25, x25, 9, 25
 	strb	w21, [x0, 56]
@@ -21365,53 +21403,53 @@ zftl_discard:
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3433:
+.L3436:
 	add	w20, w20, 1
 	sub	w19, w19, w28
-.L3430:
-	cbz	w19, .L3435
+.L3433:
+	cbz	w19, .L3438
 	bl	ftl_flush
-.L3435:
+.L3438:
 	adrp	x25, .LANCHOR99
 	add	x21, x26, :lo12:.LANCHOR121
 	add	x25, x25, :lo12:.LANCHOR99
 	mov	w0, -1
 	str	w0, [x29, 124]
-.L3436:
+.L3439:
 	ldrb	w0, [x21]
 	cmp	w19, w0
-	bcs	.L3441
-	cbz	w19, .L3443
+	bcs	.L3444
+	cbz	w19, .L3446
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	bne	.L3444
+	bne	.L3447
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
-.L3444:
+.L3447:
 	ldr	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3443
+	beq	.L3446
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x21, x0
-	cbz	x0, .L3443
+	cbz	x0, .L3446
 	strb	wzr, [x0, 57]
 	strb	w19, [x0, 56]
 	stp	w27, w20, [x21, 32]
 	ldrb	w0, [x26, #:lo12:.LANCHOR121]
 	cmp	w19, w0
-	bcc	.L3446
+	bcc	.L3449
 	adrp	x1, .LANCHOR217
 	adrp	x0, .LC0
 	mov	w2, 1235
 	add	x1, x1, :lo12:.LANCHOR217
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3446:
+.L3449:
 	ldr	x0, [x21, 8]
 	lsl	w2, w19, 9
 	mov	w1, 0
@@ -21423,38 +21461,38 @@ zftl_discard:
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3443:
+.L3446:
 	ldr	w1, [x24, #:lo12:.LANCHOR216]
 	cmp	w1, 8192
-	bls	.L3449
+	bls	.L3452
 	ldr	x0, [x29, 104]
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3447
-	adrp	x0, .LC216
+	tbz	x0, 12, .L3450
+	adrp	x0, .LC218
 	mov	w4, 0
 	mov	w3, w19
 	mov	w2, w22
-	add	x0, x0, :lo12:.LC216
+	add	x0, x0, :lo12:.LC218
 	bl	printf
-.L3447:
+.L3450:
 	str	wzr, [x24, #:lo12:.LANCHOR216]
 	bl	flt_sys_flush
 	adrp	x0, .LANCHOR116
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR116]
-.L3449:
+.L3452:
 	mov	w0, 0
-	b	.L3427
-.L3441:
+	b	.L3430
+.L3444:
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3437
+	beq	.L3440
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbz	x0, .L3439
+	cbz	x0, .L3442
 	ldrb	w2, [x21]
 	mov	w1, 0
 	strb	w2, [x0, 56]
@@ -21466,24 +21504,24 @@ zftl_discard:
 	mov	x0, x28
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-.L3475:
+.L3478:
 	ldr	x1, [x23, #:lo12:.LANCHOR97]
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3439:
+.L3442:
 	ldrb	w0, [x21]
 	add	w20, w20, 1
 	sub	w19, w19, w0
-	b	.L3436
-.L3437:
+	b	.L3439
+.L3440:
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
 	ldr	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3439
+	beq	.L3442
 	add	x1, x29, 124
 	mov	w2, 1
 	mov	w0, w20
@@ -21501,10 +21539,10 @@ zftl_discard:
 	ldrb	w1, [x1, #:lo12:.LANCHOR98]
 	udiv	w0, w0, w1
 	bl	ftl_vpn_decrement
-	b	.L3475
-.L3448:
+	b	.L3478
+.L3451:
 	mov	w0, -1
-.L3427:
+.L3430:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -21706,7 +21744,7 @@ _c_ftl_block_align_addr:
 	.zero	2
 	.section	.bss._c_ftl_byte_pre_page,"aw",@nobits
 	.align	1
-	.set	.LANCHOR199,. + 0
+	.set	.LANCHOR198,. + 0
 	.type	_c_ftl_byte_pre_page, %object
 	.size	_c_ftl_byte_pre_page, 2
 _c_ftl_byte_pre_page:
@@ -21757,7 +21795,7 @@ _c_ftl_planes_per_die:
 	.zero	1
 	.section	.bss._c_ftl_pm_page_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR187,. + 0
+	.set	.LANCHOR186,. + 0
 	.type	_c_ftl_pm_page_num, %object
 	.size	_c_ftl_pm_page_num, 2
 _c_ftl_pm_page_num:
@@ -21812,7 +21850,7 @@ _c_swl_xlc_gc_th:
 	.zero	2
 	.section	.bss._c_totle_data_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR204,. + 0
+	.set	.LANCHOR203,. + 0
 	.type	_c_totle_data_density, %object
 	.size	_c_totle_data_density, 4
 _c_totle_data_density:
@@ -21826,7 +21864,7 @@ _c_totle_log_page:
 	.zero	4
 	.section	.bss._c_totle_phy_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR203,. + 0
+	.set	.LANCHOR202,. + 0
 	.type	_c_totle_phy_density, %object
 	.size	_c_totle_phy_density, 4
 _c_totle_phy_density:
@@ -21933,7 +21971,7 @@ free_xlc_sblk:
 ftl_ext_info_data_buffer:
 	.zero	16384
 	.section	.bss.ftl_ext_info_first_write,"aw",@nobits
-	.set	.LANCHOR183,. + 0
+	.set	.LANCHOR182,. + 0
 	.type	ftl_ext_info_first_write, %object
 	.size	ftl_ext_info_first_write, 1
 ftl_ext_info_first_write:
@@ -21953,7 +21991,7 @@ ftl_info_data_buffer:
 	.zero	16384
 	.section	.bss.ftl_info_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR178,. + 0
+	.set	.LANCHOR177,. + 0
 	.type	ftl_info_spare, %object
 	.size	ftl_info_spare, 256
 ftl_info_spare:
@@ -21966,7 +22004,7 @@ ftl_info_spare:
 ftl_low_format_cur_blk:
 	.zero	2
 	.section	.bss.ftl_power_lost_flag,"aw",@nobits
-	.set	.LANCHOR182,. + 0
+	.set	.LANCHOR181,. + 0
 	.type	ftl_power_lost_flag, %object
 	.size	ftl_power_lost_flag, 1
 ftl_power_lost_flag:
@@ -22007,7 +22045,7 @@ ftl_sblk_vpn:
 ftl_sblk_vpn_update_id:
 	.zero	2
 	.section	.bss.ftl_sys_info_first_write,"aw",@nobits
-	.set	.LANCHOR181,. + 0
+	.set	.LANCHOR180,. + 0
 	.type	ftl_sys_info_first_write, %object
 	.size	ftl_sys_info_first_write, 1
 ftl_sys_info_first_write:
@@ -22020,7 +22058,7 @@ ftl_tmp_buffer:
 	.zero	16384
 	.section	.bss.ftl_tmp_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR176,. + 0
+	.set	.LANCHOR175,. + 0
 	.type	ftl_tmp_spare, %object
 	.size	ftl_tmp_spare, 256
 ftl_tmp_spare:
@@ -22112,7 +22150,7 @@ g_flash_multi_page_read_en:
 g_flash_page_buffer:
 	.zero	8
 	.section	.bss.g_flash_reversd_blks,"aw",@nobits
-	.set	.LANCHOR168,. + 0
+	.set	.LANCHOR167,. + 0
 	.type	g_flash_reversd_blks, %object
 	.size	g_flash_reversd_blks, 1
 g_flash_reversd_blks:
@@ -22159,7 +22197,7 @@ g_flash_toggle_mode_en:
 	.zero	1
 	.section	.bss.g_ftl_info_blk,"aw",@nobits
 	.align	6
-	.set	.LANCHOR179,. + 0
+	.set	.LANCHOR178,. + 0
 	.type	g_ftl_info_blk, %object
 	.size	g_ftl_info_blk, 4
 g_ftl_info_blk:
@@ -22178,7 +22216,7 @@ g_gc_info:
 g_idb_ecc_bits:
 	.zero	1
 	.section	.bss.g_idb_slc_mode_enable,"aw",@nobits
-	.set	.LANCHOR169,. + 0
+	.set	.LANCHOR168,. + 0
 	.type	g_idb_slc_mode_enable, %object
 	.size	g_idb_slc_mode_enable, 1
 g_idb_slc_mode_enable:
@@ -22249,7 +22287,7 @@ g_nandc_ver:
 	.zero	1
 	.section	.bss.g_pm_spare,"aw",@nobits
 	.align	3
-	.set	.LANCHOR191,. + 0
+	.set	.LANCHOR190,. + 0
 	.type	g_pm_spare, %object
 	.size	g_pm_spare, 8
 g_pm_spare:
@@ -22507,7 +22545,7 @@ idb_buf:
 	.zero	262144
 	.section	.bss.idb_need_write_back,"aw",@nobits
 	.align	2
-	.set	.LANCHOR170,. + 0
+	.set	.LANCHOR169,. + 0
 	.type	idb_need_write_back, %object
 	.size	idb_need_write_back, 4
 idb_need_write_back:
@@ -22557,7 +22595,7 @@ p_free_buf_head:
 p_read_ahead_ext_buf:
 	.zero	8
 	.section	.bss.pm_first_write,"aw",@nobits
-	.set	.LANCHOR192,. + 0
+	.set	.LANCHOR191,. + 0
 	.type	pm_first_write, %object
 	.size	pm_first_write, 1
 pm_first_write:
@@ -22570,7 +22608,7 @@ pm_first_write:
 pm_gc_enable:
 	.zero	4
 	.section	.bss.pm_last_load_ram_id,"aw",@nobits
-	.set	.LANCHOR201,. + 0
+	.set	.LANCHOR200,. + 0
 	.type	pm_last_load_ram_id, %object
 	.size	pm_last_load_ram_id, 1
 pm_last_load_ram_id:
@@ -22590,7 +22628,7 @@ pm_ram_info:
 	.zero	512
 	.section	.bss.read_ahead_lpa,"aw",@nobits
 	.align	2
-	.set	.LANCHOR202,. + 0
+	.set	.LANCHOR201,. + 0
 	.type	read_ahead_lpa, %object
 	.size	read_ahead_lpa, 4
 read_ahead_lpa:
@@ -22664,7 +22702,7 @@ write_buf_head:
 write_commit_count:
 	.zero	1
 	.section	.bss.write_commit_head,"aw",@nobits
-	.set	.LANCHOR174,. + 0
+	.set	.LANCHOR173,. + 0
 	.type	write_commit_head, %object
 	.size	write_commit_head, 1
 write_commit_head:
@@ -22753,7 +22791,7 @@ hy_f26_ref_value:
 	.byte	-37
 	.section	.data.nand_opt_para,"aw",@progbits
 	.align	3
-	.set	.LANCHOR196,. + 0
+	.set	.LANCHOR195,. + 0
 	.type	nand_opt_para, %object
 	.size	nand_opt_para, 128
 nand_opt_para:
@@ -23598,7 +23636,7 @@ zftl_debug:
 	.word	17476
 	.section	.data.zftl_nand_flash_para_tbl,"aw",@progbits
 	.align	3
-	.set	.LANCHOR195,. + 0
+	.set	.LANCHOR194,. + 0
 	.type	zftl_nand_flash_para_tbl, %object
 	.size	zftl_nand_flash_para_tbl, 960
 zftl_nand_flash_para_tbl:
@@ -24458,7 +24496,7 @@ __func__.10066:
 	.string	"_list_update_data_list"
 	.section	.rodata.__func__.10174,"a",@progbits
 	.align	3
-	.set	.LANCHOR180,. + 0
+	.set	.LANCHOR179,. + 0
 	.type	__func__.10174, %object
 	.size	__func__.10174, 15
 __func__.10174:
@@ -24486,21 +24524,21 @@ __func__.10257:
 	.string	"ftl_free_sys_blk"
 	.section	.rodata.__func__.10292,"a",@progbits
 	.align	3
-	.set	.LANCHOR208,. + 0
+	.set	.LANCHOR207,. + 0
 	.type	__func__.10292, %object
 	.size	__func__.10292, 14
 __func__.10292:
 	.string	"ftl_sblk_dump"
 	.section	.rodata.__func__.10316,"a",@progbits
 	.align	3
-	.set	.LANCHOR197,. + 0
+	.set	.LANCHOR196,. + 0
 	.type	__func__.10316, %object
 	.size	__func__.10316, 16
 __func__.10316:
 	.string	"ftl_sysblk_dump"
 	.section	.rodata.__func__.10335,"a",@progbits
 	.align	3
-	.set	.LANCHOR189,. + 0
+	.set	.LANCHOR188,. + 0
 	.type	__func__.10335, %object
 	.size	__func__.10335, 23
 __func__.10335:
@@ -24535,35 +24573,35 @@ __func__.10411:
 	.string	"ftl_ext_alloc_new_blk"
 	.section	.rodata.__func__.10436,"a",@progbits
 	.align	3
-	.set	.LANCHOR184,. + 0
+	.set	.LANCHOR183,. + 0
 	.type	__func__.10436, %object
 	.size	__func__.10436, 19
 __func__.10436:
 	.string	"ftl_ext_info_flush"
 	.section	.rodata.__func__.10448,"a",@progbits
 	.align	3
-	.set	.LANCHOR185,. + 0
+	.set	.LANCHOR184,. + 0
 	.type	__func__.10448, %object
 	.size	__func__.10448, 18
 __func__.10448:
 	.string	"ftl_ext_info_init"
 	.section	.rodata.__func__.10485,"a",@progbits
 	.align	3
-	.set	.LANCHOR186,. + 0
+	.set	.LANCHOR185,. + 0
 	.type	__func__.10485, %object
 	.size	__func__.10485, 25
 __func__.10485:
 	.string	"ftl_low_format_data_init"
 	.section	.rodata.__func__.10500,"a",@progbits
 	.align	3
-	.set	.LANCHOR188,. + 0
+	.set	.LANCHOR187,. + 0
 	.type	__func__.10500, %object
 	.size	__func__.10500, 15
 __func__.10500:
 	.string	"ftl_low_format"
 	.section	.rodata.__func__.10548,"a",@progbits
 	.align	3
-	.set	.LANCHOR177,. + 0
+	.set	.LANCHOR176,. + 0
 	.type	__func__.10548, %object
 	.size	__func__.10548, 14
 __func__.10548:
@@ -24577,7 +24615,7 @@ __func__.10665:
 	.string	"queue_wait_first_req_completed"
 	.section	.rodata.__func__.10718,"a",@progbits
 	.align	3
-	.set	.LANCHOR173,. + 0
+	.set	.LANCHOR172,. + 0
 	.type	__func__.10718, %object
 	.size	__func__.10718, 15
 __func__.10718:
@@ -24591,7 +24629,7 @@ __func__.10745:
 	.string	"sblk_read_page"
 	.section	.rodata.__func__.10784,"a",@progbits
 	.align	3
-	.set	.LANCHOR198,. + 0
+	.set	.LANCHOR197,. + 0
 	.type	__func__.10784, %object
 	.size	__func__.10784, 16
 __func__.10784:
@@ -24605,7 +24643,7 @@ __func__.10798:
 	.string	"pm_free_sblk"
 	.section	.rodata.__func__.10818,"a",@progbits
 	.align	3
-	.set	.LANCHOR200,. + 0
+	.set	.LANCHOR199,. + 0
 	.type	__func__.10818, %object
 	.size	__func__.10818, 6
 __func__.10818:
@@ -24619,7 +24657,7 @@ __func__.10834:
 	.string	"pm_alloc_new_blk"
 	.section	.rodata.__func__.10844,"a",@progbits
 	.align	3
-	.set	.LANCHOR190,. + 0
+	.set	.LANCHOR189,. + 0
 	.type	__func__.10844, %object
 	.size	__func__.10844, 14
 __func__.10844:
@@ -24640,7 +24678,7 @@ __func__.8511:
 	.string	"flash_read_page_en"
 	.section	.rodata.__func__.8540,"a",@progbits
 	.align	3
-	.set	.LANCHOR175,. + 0
+	.set	.LANCHOR174,. + 0
 	.type	__func__.8540, %object
 	.size	__func__.8540, 19
 __func__.8540:
@@ -24668,14 +24706,14 @@ __func__.8580:
 	.string	"flash_wait_device_ready_raw"
 	.section	.rodata.__func__.8604,"a",@progbits
 	.align	3
-	.set	.LANCHOR171,. + 0
+	.set	.LANCHOR170,. + 0
 	.type	__func__.8604, %object
 	.size	__func__.8604, 26
 __func__.8604:
 	.string	"flash_start_tlc_page_prog"
 	.section	.rodata.__func__.8622,"a",@progbits
 	.align	3
-	.set	.LANCHOR172,. + 0
+	.set	.LANCHOR171,. + 0
 	.type	__func__.8622, %object
 	.size	__func__.8622, 22
 __func__.8622:
@@ -24724,7 +24762,7 @@ __func__.8992:
 	.string	"nand_flash_print_info"
 	.section	.rodata.__func__.9036,"a",@progbits
 	.align	3
-	.set	.LANCHOR194,. + 0
+	.set	.LANCHOR193,. + 0
 	.type	__func__.9036, %object
 	.size	__func__.9036, 16
 __func__.9036:
@@ -24773,7 +24811,7 @@ __func__.9269:
 	.string	"flash_into_data_init"
 	.section	.rodata.__func__.9291,"a",@progbits
 	.align	3
-	.set	.LANCHOR193,. + 0
+	.set	.LANCHOR192,. + 0
 	.type	__func__.9291, %object
 	.size	__func__.9291, 17
 __func__.9291:
@@ -24808,7 +24846,7 @@ __func__.9476:
 	.string	"zftl_add_read_buf"
 	.section	.rodata.__func__.9509,"a",@progbits
 	.align	3
-	.set	.LANCHOR209,. + 0
+	.set	.LANCHOR208,. + 0
 	.type	__func__.9509, %object
 	.size	__func__.9509, 10
 __func__.9509:
@@ -24829,14 +24867,14 @@ __func__.9659:
 	.string	"gc_add_sblk"
 	.section	.rodata.__func__.9680,"a",@progbits
 	.align	3
-	.set	.LANCHOR167,. + 0
+	.set	.LANCHOR209,. + 0
 	.type	__func__.9680, %object
 	.size	__func__.9680, 21
 __func__.9680:
 	.string	"gc_check_data_one_wl"
 	.section	.rodata.__func__.9714,"a",@progbits
 	.align	3
-	.set	.LANCHOR205,. + 0
+	.set	.LANCHOR204,. + 0
 	.type	__func__.9714, %object
 	.size	__func__.9714, 22
 __func__.9714:
@@ -24864,14 +24902,14 @@ __func__.9778:
 	.string	"gc_free_src_blk"
 	.section	.rodata.__func__.9823,"a",@progbits
 	.align	3
-	.set	.LANCHOR206,. + 0
+	.set	.LANCHOR205,. + 0
 	.type	__func__.9823, %object
 	.size	__func__.9823, 16
 __func__.9823:
 	.string	"gc_scan_src_blk"
 	.section	.rodata.__func__.9881,"a",@progbits
 	.align	3
-	.set	.LANCHOR207,. + 0
+	.set	.LANCHOR206,. + 0
 	.type	__func__.9881, %object
 	.size	__func__.9881, 20
 __func__.9881:
@@ -24887,27 +24925,27 @@ __func__.9948:
 .LC0:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
 	.section	.rodata.dump_ftl_info.str1.1,"aMS",@progbits,1
-.LC151:
+.LC150:
 	.string	"free_buf_count: %d\n"
-.LC152:
+.LC151:
 	.string	"g_ftl_info_blk blk:0x%x, index:0x%x, page:0x%x\n"
-.LC153:
+.LC152:
 	.string	"ftl_ext_info_blk blk:0x%x, page:0x%x\n"
-.LC154:
+.LC153:
 	.string	"ac_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC155:
+.LC154:
 	.string	"tmp_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC156:
+.LC155:
 	.string	"gc_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC157:
+.LC156:
 	.string	"lpa:"
-.LC158:
+.LC157:
 	.string	"vpn:"
-.LC159:
+.LC158:
 	.string	"sblk:"
-.LC160:
+.LC159:
 	.string	"lpa_hash:"
-.LC161:
+.LC160:
 	.string	"lpa_hash_index:"
 	.section	.rodata.dump_sblk_queue.str1.1,"aMS",@progbits,1
 .LC68:
@@ -24946,11 +24984,11 @@ __func__.9948:
 .LC116:
 	.string	"no sys info %x\n"
 	.section	.rodata.flash_info_flush.str1.1,"aMS",@progbits,1
-.LC146:
+.LC145:
 	.string	"finfo:"
-.LC147:
+.LC146:
 	.string	"flash_info_flush id = %x, page = %x\n"
-.LC148:
+.LC147:
 	.string	"sys_info_flush error:%x\n"
 	.section	.rodata.flash_into_data_init.str1.1,"aMS",@progbits,1
 .LC84:
@@ -24959,18 +24997,18 @@ __func__.9948:
 .LC40:
 	.string	"flash_mask_bad_block %d %d\n"
 	.section	.rodata.flash_prog_page.str1.1,"aMS",@progbits,1
-.LC121:
+.LC120:
 	.string	"flash_prog_page %x %x %x\n"
-.LC122:
+.LC121:
 	.string	"flash_prog_page page_addr = %x status = %x\n"
 	.section	.rodata.flash_prog_page_en.str1.1,"aMS",@progbits,1
-.LC127:
+.LC126:
 	.string	"flash_prog_page_en:%x %x\n"
-.LC128:
+.LC127:
 	.string	"spare"
-.LC129:
+.LC128:
 	.string	"data"
-.LC130:
+.LC129:
 	.string	"write error: %x\n"
 	.section	.rodata.flash_read_id.str1.1,"aMS",@progbits,1
 .LC38:
@@ -24992,7 +25030,7 @@ __func__.9948:
 .LC67:
 	.string	"alloc sblk %x %d\n"
 	.section	.rodata.ftl_ext_info_init.str1.1,"aMS",@progbits,1
-.LC135:
+.LC134:
 	.string	"%s %d %d %x %x\n"
 	.section	.rodata.ftl_free_sblk.str1.1,"aMS",@progbits,1
 .LC55:
@@ -25000,70 +25038,70 @@ __func__.9948:
 .LC56:
 	.string	"swl_slc_free_mini_ec_blk sblk %x\n"
 	.section	.rodata.ftl_info_blk_init.str1.1,"aMS",@progbits,1
-.LC133:
+.LC132:
 	.string	"%d %x @%d %x\n"
-.LC134:
+.LC133:
 	.string	"ftl_info_blk_init %d %d %x\n"
 	.section	.rodata.ftl_info_flush.str1.1,"aMS",@progbits,1
-.LC132:
+.LC131:
 	.string	"g_ftl_info_blk blk = %x, page = %x version = %d\n"
 	.section	.rodata.ftl_low_format.str1.1,"aMS",@progbits,1
-.LC136:
+.LC135:
 	.string	"ftl_low_format %d\n"
-.LC137:
+.LC136:
 	.string	"low format %d %d %d %d\n"
 	.section	.rodata.ftl_mask_bad_block.str1.1,"aMS",@progbits,1
 .LC60:
 	.string	"mask bad block:cs %x block: %x\n"
 	.section	.rodata.ftl_open_sblk_recovery.str1.1,"aMS",@progbits,1
-.LC139:
+.LC138:
 	.string	"saved_active_page  = %x\n"
-.LC140:
+.LC139:
 	.string	"saved_active_plane = %x\n"
-.LC141:
+.LC140:
 	.string	"sblk = %x\n"
-.LC142:
+.LC141:
 	.string	"phy_blk = %x %x\n"
-.LC143:
+.LC142:
 	.string	"sblk = %x, vpn0 = %d, vpn1 = %d\n"
-.LC144:
+.LC143:
 	.string	"dump write = %x\n"
 	.section	.rodata.ftl_re_low_format.str1.1,"aMS",@progbits,1
-.LC138:
+.LC137:
 	.string	"re low format %d\n"
 	.section	.rodata.ftl_sblk_dump.str1.1,"aMS",@progbits,1
-.LC194:
+.LC193:
 	.string	"ftl_sblk_dump = %x %d %d %d %d\n"
-.LC195:
+.LC194:
 	.string	"ftl_sblk_dump = %x %x %x %x\n"
-.LC196:
+.LC195:
 	.string	"page_addr = %x, lpa=%x vpn = %d\n"
-.LC197:
+.LC196:
 	.string	"index= %x, lpa=%x\n"
-.LC198:
+.LC197:
 	.string	"block = %x, vpn=%x check vpn = %d\n"
 	.section	.rodata.ftl_sysblk_dump.str1.1,"aMS",@progbits,1
-.LC149:
+.LC148:
 	.string	"blk= %x, page=%x, ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
-.LC150:
+.LC149:
 	.string	"l2p:"
 	.section	.rodata.ftl_test_block.str1.1,"aMS",@progbits,1
-.LC131:
+.LC130:
 	.string	"low format %d\n"
 	.section	.rodata.ftl_update_l2p_map.str1.1,"aMS",@progbits,1
-.LC202:
+.LC204:
 	.string	"ftl_update_l2p_map: %x %x %x\n"
-.LC203:
+.LC205:
 	.string	"ftl_update_l2p_map"
-.LC204:
+.LC206:
 	.string	"lpa_tbl:"
-.LC205:
+.LC207:
 	.string	"sblk %x vpn: %d %d\n"
 	.section	.rodata.ftl_vpn_decrement.str1.1,"aMS",@progbits,1
 .LC59:
 	.string	"ftl_vpn_decrement %x = %d\n"
 	.section	.rodata.ftl_write_commit.str1.1,"aMS",@progbits,1
-.LC206:
+.LC208:
 	.string	"%d read error: ppa:%x, lpa:%x, status:%x\n"
 	.section	.rodata.ftl_write_completed.str1.1,"aMS",@progbits,1
 .LC66:
@@ -25074,16 +25112,20 @@ __func__.9948:
 .LC42:
 	.string	"gc_add_sblk = %d, %d, %d,last update:%d, %d\n"
 	.section	.rodata.gc_check_data_one_wl.str1.1,"aMS",@progbits,1
-.LC120:
-	.string	"1ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
+.LC201:
+	.string	"gc_lpa:"
+.LC202:
+	.string	"gc_ppa:"
+.LC203:
+	.string	"err: ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
 	.section	.rodata.gc_do_copy_back.str1.1,"aMS",@progbits,1
-.LC207:
+.LC209:
 	.string	"gc page in buf: lpa %x ppa = %x pageindex= %x\n"
-.LC208:
+.LC210:
 	.string	"gc_do_copy_back: lpa %x des_ppa = %x %x gc_ppa= %x page_index= %d\n"
-.LC209:
+.LC211:
 	.string	"gc_do_copy_back: %x %x %x %x gc_ppa:%x %x\n"
-.LC210:
+.LC212:
 	.string	"%d prog_step: %x %x buf id= %x ppa = %x hash=%x id = %x plane = %x lpa=%x\n"
 	.section	.rodata.gc_free_src_blk.str1.1,"aMS",@progbits,1
 .LC57:
@@ -25094,16 +25136,16 @@ __func__.9948:
 .LC45:
 	.string	"%d gc_free_temp_buf buf id= %x\n"
 	.section	.rodata.gc_recovery.str1.1,"aMS",@progbits,1
-.LC172:
+.LC171:
 	.string	"ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
-.LC173:
+.LC172:
 	.string	"ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
-.LC174:
+.LC173:
 	.string	"gc_recovery: %x vpn = %x\n"
 	.section	.rodata.gc_scan_src_blk.str1.1,"aMS",@progbits,1
-.LC192:
+.LC191:
 	.string	"gc_scan_src_blk = %x, vpn = %d\n"
-.LC193:
+.LC192:
 	.string	"gc_scan_src_blk = %x, s vpn0 = %d, c vpn1 = %d\n"
 	.section	.rodata.gc_search_src_blk.str1.1,"aMS",@progbits,1
 .LC47:
@@ -25130,13 +25172,13 @@ __func__.9948:
 .LC81:
 	.string	"swl add slc gc  = %x, %d, %d, %d, %d, %d\n"
 	.section	.rodata.gc_update_l2p_map_new.str1.1,"aMS",@progbits,1
-.LC188:
+.LC187:
 	.string	"gc_update_l2p_map_new sblk %x\n"
-.LC189:
+.LC188:
 	.string	"gc_update_l2p_map_new: %x %x %x\n"
-.LC190:
+.LC189:
 	.string	"lpa: %x %x %x\n"
-.LC191:
+.LC190:
 	.string	"gc_update_l2p_map_new: %x vpn = %x vpn1 = %x done\n"
 	.section	.rodata.gc_write_completed.str1.1,"aMS",@progbits,1
 .LC43:
@@ -25152,24 +25194,24 @@ __func__.9948:
 .LC108:
 	.string	"hynix RR %d row=%x, count %d, status=%d\n"
 	.section	.rodata.idb_write_data.str1.1,"aMS",@progbits,1
-.LC123:
+.LC122:
 	.string	"1 write_idblock fix data %x %x %x\n"
-.LC124:
+.LC123:
 	.string	"write_idblock check fail! %x\n"
-.LC125:
+.LC124:
 	.string	"write_idblock fail! %x\n"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",@progbits,1
-.LC163:
+.LC162:
 	.string	"region_id = %d, pm_max_region = %d\n"
-.LC164:
+.LC163:
 	.string	"load_l2p_region no ppa = %x , %x, all setting 0xff....\n"
-.LC165:
+.LC164:
 	.string	"load_l2p_region = %x,%x,%x, %x\n"
-.LC166:
+.LC165:
 	.string	"pm_ppa:"
-.LC167:
+.LC166:
 	.string	"data:"
-.LC168:
+.LC167:
 	.string	"spare:"
 	.section	.rodata.lpa_rebuild_hash.str1.1,"aMS",@progbits,1
 .LC72:
@@ -25274,18 +25316,18 @@ __func__.9948:
 .LC83:
 	.string	"ftl_free_no_use_map_blk %x %x %x %d\n"
 	.section	.rodata.pm_init.str1.1,"aMS",@progbits,1
-.LC169:
+.LC168:
 	.string	"pm_init posr %x %x %x\n"
-.LC170:
+.LC169:
 	.string	"pm_init recovery %x %x %x\n"
 	.section	.rodata.pm_log2phys.str1.1,"aMS",@progbits,1
-.LC171:
+.LC170:
 	.string	"pm_log2phys  lpn = %d, max lpn = %d\n"
 	.section	.rodata.pm_ppa_update_check.str1.1,"aMS",@progbits,1
-.LC162:
+.LC161:
 	.string	"%s w error lpn = %x, max ppa = %d\n"
 	.section	.rodata.pm_write_page.str1.1,"aMS",@progbits,1
-.LC145:
+.LC144:
 	.string	"pm_write_page write error: %x\n"
 	.section	.rodata.print_ftl_debug_info.str1.1,"aMS",@progbits,1
 .LC61:
@@ -25446,7 +25488,7 @@ random_seed:
 	.hword	17598
 	.hword	28087
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",@progbits,1
-.LC187:
+.LC186:
 	.string	"zftl_init %x\n"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
 .LC88:
@@ -25461,7 +25503,7 @@ random_seed:
 .LC39:
 	.string	"bad block test:%x %x\n"
 	.section	.rodata.sblk_prog_page.str1.1,"aMS",@progbits,1
-.LC126:
+.LC125:
 	.string	"sblk_prog_page ppa = %x, count = %d\n"
 	.section	.rodata.toshiba_15ref_value,"a",@progbits
 	.align	3
@@ -26059,16 +26101,16 @@ toshiba_ref_value:
 	.byte	12
 	.byte	112
 	.section	.rodata.zftl_discard.str1.1,"aMS",@progbits,1
-.LC216:
+.LC218:
 	.string	"ftl_discard:(%x, %x, %x, %x)\n"
 	.section	.rodata.zftl_do_gc.str1.1,"aMS",@progbits,1
-.LC211:
+.LC213:
 	.string	"gc %d: %d %d %d %d %d %d %d\n"
-.LC212:
+.LC214:
 	.string	"gc %d: %d %d %d %d %d %d\n"
-.LC213:
+.LC215:
 	.string	"GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\n"
-.LC214:
+.LC216:
 	.string	"gc free %x, %d\n"
 	.section	.rodata.zftl_gc_get_free_sblk.str1.1,"aMS",@progbits,1
 .LC49:
@@ -26081,41 +26123,41 @@ toshiba_ref_value:
 .LC52:
 	.string	"swl_slc_free_mini_ec_blk alloc sblk %x\n"
 	.section	.rodata.zftl_init.str1.1,"aMS",@progbits,1
+.LC174:
+	.string	"FTL version: 6.0.9 20180704"
 .LC175:
-	.string	"FTL version: 6.0.8 20180615"
-.LC176:
 	.string	"_c_user_data_density := %d\n"
-.LC177:
+.LC176:
 	.string	"_c_totle_phy_density := %d\n"
-.LC178:
+.LC177:
 	.string	"_c_totle_log_page := %d\n"
-.LC179:
+.LC178:
 	.string	"_c_totle_data_density := %d\n"
-.LC180:
+.LC179:
 	.string	"_c_ftl_pm_page_num := %d\n"
-.LC181:
+.LC180:
 	.string	"_c_ftl_byte_pre_page := %d\n"
-.LC182:
+.LC181:
 	.string	"_c_max_pm_sblk := %d\n"
-.LC183:
+.LC182:
 	.string	"_min_slc_super_block := %d\n"
-.LC184:
+.LC183:
 	.string	"_max_xlc_super_block := %d\n"
-.LC185:
+.LC184:
 	.string	"gp_ftl_ext_info %p %p %p\n"
-.LC186:
+.LC185:
 	.string	"flash info size: %d %d %d\n"
 	.section	.rodata.zftl_read.str1.1,"aMS",@progbits,1
-.LC199:
+.LC198:
 	.string	"ftl_read %x %x %x\n"
-.LC200:
+.LC199:
 	.string	"ftl_read refresh =%x, lpa = %x, ppa= %x\n"
-.LC201:
+.LC200:
 	.string	"id=%d, lpa = %x, ppa = %x spare = %x %x %x %x\n"
 	.section	.rodata.zftl_sblk_list_init.str1.1,"aMS",@progbits,1
 .LC82:
 	.string	"free blk vpn error: %x %x\n"
 	.section	.rodata.zftl_write.str1.1,"aMS",@progbits,1
-.LC215:
+.LC217:
 	.string	"ftlwrite %x %x %x\n"
 	.hidden	free

commit 6651d4c0fb8433da6f9737983230f0dd687b8fb1
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Jul 3 19:22:24 2018 +0800

    dev_desc: judge dev_desc whether NULL or not before use it
    
    Change-Id: I9d0e2d207a143a02949fbdff2d9ad39f154e4f3e
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
old mode 100644
new mode 100755
index faa85d022a..1d972941bf
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -180,6 +180,10 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 	}
 
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -ENODEV;
+	}
 	hdr = memalign(ARCH_DMA_MINALIGN, RK_BLK_SIZE);
 	if (!hdr) {
 		printf("%s out of memory!\n", __func__);
@@ -323,6 +327,10 @@ int rockchip_read_resource_file(void *buf, const char *name,
 		len = file->f_size;
 	blks = DIV_ROUND_UP(len, RK_BLK_SIZE);
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -ENODEV;
+	}
 	ret = blk_dread(dev_desc, file->rsce_base + file->f_offset + offset,
 			blks, buf);
 	if (ret != blks)
diff --git a/arch/arm/mach-rockchip/vendor.c b/arch/arm/mach-rockchip/vendor.c
old mode 100644
new mode 100755
index cef6e5254d..4963bb6748
--- a/arch/arm/mach-rockchip/vendor.c
+++ b/arch/arm/mach-rockchip/vendor.c
@@ -111,6 +111,10 @@ static int vendor_ops(u8 *buffer, u32 addr, u32 n_sec, int write)
 	int ret = 0;
 
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -ENODEV;
+	}
 	/* Get the offset address according to the device type */
 	switch (dev_desc->if_type) {
 	case IF_TYPE_MMC:
diff --git a/cmd/bootrkp.c b/cmd/bootrkp.c
old mode 100644
new mode 100755
index c97e44f4db..fd104f4874
--- a/cmd/bootrkp.c
+++ b/cmd/bootrkp.c
@@ -24,6 +24,10 @@ static int do_boot_rockchip(cmd_tbl_t *cmdtp, int flag, int argc,
 	int i = 0;
 
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -ENODEV;
+	}
 
 #ifdef CONFIG_OPTEE_CLIENT
 	disk_partition_t misc_part_info;
diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
old mode 100644
new mode 100755
index 0252924c59..4de48926ea
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -221,6 +221,11 @@ static void rkloader_set_bootloader_msg(struct bootloader_message *bmsg)
 	disk_partition_t part_info;
 
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return;
+	}
+
 	int ret = part_get_info_by_name(dev_desc, PART_MISC,
 			&part_info);
 	if (ret < 0) {
@@ -253,6 +258,11 @@ void board_run_recovery_wipe_data(void)
 
 	printf("Rebooting into recovery to do wipe_data\n");
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return;
+	}
+
 	int ret;
 
 	ret = part_get_info_by_name(dev_desc, PART_MISC,
@@ -310,6 +320,10 @@ int rockchip_get_boot_mode(void)
 		return boot_mode;
 
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -ENODEV;
+	}
 	ret = part_get_info_by_name(dev_desc, PART_MISC,
 			&part_info);
 	if (ret < 0) {
diff --git a/common/fb_mmc.c b/common/fb_mmc.c
old mode 100644
new mode 100755
index 48ec1cf0d9..4fdafabe53
--- a/common/fb_mmc.c
+++ b/common/fb_mmc.c
@@ -301,6 +301,10 @@ void fb_mmc_flash_write(const char *cmd, void *download_buffer,
 #endif
 #ifdef CONFIG_RKIMG_BOOTLOADER
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return;
+	}
 #else
 	dev_desc = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV);
 #endif
@@ -412,6 +416,10 @@ void fb_mmc_erase(const char *cmd, char *response)
 
 #ifdef CONFIG_RKIMG_BOOTLOADER
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return;
+	}
 #else
 	dev_desc = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV);
 #endif
diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 6570aef9b2..b6edd661e9 100755
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -1232,6 +1232,10 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 		struct blk_desc *dev_desc;
 		disk_partition_t part_info;
 		dev_desc = rockchip_get_bootdev();
+		if (!dev_desc) {
+			printf("%s: dev_desc is NULL!\n", __func__);
+			return;
+		}
 		int ret = part_get_info_by_name(dev_desc, "userdata",
 				&part_info);
 		if (ret < 0) {
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
old mode 100644
new mode 100755
index e5400a2ed6..8c7c3dc1b7
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -23,6 +23,10 @@ void test_optee(void)
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return;
+	}
 
 	debug("testmm start\n");
 	OpteeClientApiLibInitialize();
@@ -132,6 +136,10 @@ uint32_t trusty_read_rollback_index(uint32_t slot, uint64_t *value)
 
 	struct blk_desc *dev_desc;
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
 
 	b2hs((uint8_t *)&slot, hs, 4, 9);
 	debug("testmm start\n");
@@ -216,6 +224,10 @@ uint32_t trusty_write_rollback_index(uint32_t slot, uint64_t value)
 	uint8_t hs[9];
 	struct blk_desc *dev_desc;
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
 
 	b2hs((uint8_t *)&slot, hs, 4, 9);
 	OpteeClientApiLibInitialize();
@@ -299,6 +311,10 @@ uint32_t trusty_read_permanent_attributes(uint8_t *attributes, uint32_t size)
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
 
 	debug("testmm start\n");
 	OpteeClientApiLibInitialize();
@@ -378,6 +394,10 @@ uint32_t trusty_write_permanent_attributes(uint8_t *attributes, uint32_t size)
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
 
 	debug("testmm start\n");
 	OpteeClientApiLibInitialize();
@@ -458,6 +478,10 @@ uint32_t trusty_read_lock_state(uint8_t *lock_state)
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
 
 	debug("testmm start\n");
 	OpteeClientApiLibInitialize();
@@ -537,6 +561,10 @@ uint32_t trusty_write_lock_state(uint8_t lock_state)
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
 
 	debug("testmm start\n");
 	OpteeClientApiLibInitialize();
@@ -617,6 +645,10 @@ uint32_t trusty_read_flash_lock_state(uint8_t *flash_lock_state)
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
 
 	debug("testmm start\n");
 	OpteeClientApiLibInitialize();
@@ -697,6 +729,10 @@ uint32_t trusty_write_flash_lock_state(uint8_t flash_lock_state)
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
 
 	debug("testmm start\n");
 	OpteeClientApiLibInitialize();
@@ -780,6 +816,10 @@ TEEC_Result read_from_keymaster(uint8_t *filename,
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
 
 	debug("read_from_keymaster start\n");
 	OpteeClientApiLibInitialize();
@@ -863,6 +903,10 @@ uint32_t write_to_keymaster(uint8_t *filename,
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
 
 	debug("write_to_keymaster\n");
 	OpteeClientApiLibInitialize();
@@ -1302,6 +1346,10 @@ uint32_t trusty_read_permanent_attributes_flag(uint8_t *attributes)
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
 
 	debug("testmm start\n");
 	OpteeClientApiLibInitialize();
@@ -1380,6 +1428,10 @@ uint32_t trusty_write_permanent_attributes_flag(uint8_t attributes)
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
 
 	debug("testmm start\n");
 	OpteeClientApiLibInitialize();
@@ -1462,6 +1514,10 @@ uint32_t trusty_attest_dh(uint8_t *dh, uint32_t *dh_size)
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
 
 	OpteeClientApiLibInitialize();
 
@@ -1531,6 +1587,10 @@ uint32_t trusty_attest_uuid(uint8_t *uuid, uint32_t *uuid_size)
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
 
 	OpteeClientApiLibInitialize();
 
@@ -1607,6 +1667,10 @@ uint32_t trusty_attest_get_ca(uint8_t *operation_start,
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
 
 	OpteeClientApiLibInitialize();
 
@@ -1685,6 +1749,10 @@ uint32_t trusty_attest_set_ca(uint8_t *ca_response, uint32_t *ca_response_size)
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
 

commit 94685712a7e743bebac51d4f67256e0175709796
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Jul 3 18:15:49 2018 +0800

    rockchip: common: fix scan mmc 1 bug
    
    Set detect mmc 1 and rkimgtest mmc 1 at the same
    level. If not, the devtype will be set as default
    when run rkimgtest mmc 1 fail but not scan other
    storge devices.
    
    Change-Id: I971ea5a8e70f17641483f00b8d467ac5757ca533
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index 4c8220e8bd..4df4e0ef1e 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -86,9 +86,8 @@
 
 #define RKIMG_DET_BOOTDEV \
 	"rkimg_bootdev=" \
-	"if mmc dev 1; then " \
-		"if rkimgtest mmc 1; then " \
-		"setenv devtype mmc; setenv devnum 1; echo Boot from SDcard; fi;" \
+	"if mmc dev 1 && rkimgtest mmc 1; then " \
+		"setenv devtype mmc; setenv devnum 1; echo Boot from SDcard;" \
 	"elif mmc dev 0; then " \
 		"setenv devtype mmc; setenv devnum 0;" \
 	"elif rknand dev 0; then " \

commit 05f86d2dcb32d8c1c687b81446fb940dfe6b1e55
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Thu Jun 28 19:30:48 2018 +0800

    rockchip: configs: evb-aarch-rk3308: enable rkflash driver for aarch32 evb
    
    1.Change to slc ftl for rk Slc Nand Flash devices;
    2.Enabel spi nand, spi nor drivers.
    
    Change-Id: I3314b4dfcfff356a37d50934b1235d8304b738fa
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/configs/evb-aarch32-rk3308_defconfig b/configs/evb-aarch32-rk3308_defconfig
index 80d7028268..bfb681e62c 100644
--- a/configs/evb-aarch32-rk3308_defconfig
+++ b/configs/evb-aarch32-rk3308_defconfig
@@ -43,7 +43,10 @@ CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_DM_RESET=y
-CONFIG_RKNAND=y
+CONFIG_RKFLASH=y
+CONFIG_RKNANDC_NAND=y
+CONFIG_RKSFC_NOR=y
+CONFIG_RKSFC_NAND=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF0C0000
 CONFIG_DEBUG_UART_CLOCK=24000000

commit 4aae031371b0f968793a0b7b290ca5239592516d
Author: shengfei Xu <xsf@rock-chips.com>
Date:   Fri Jun 29 14:13:10 2018 +0800

    fuel gauge: rk817: fix the fuel gauge error
    
    The GAS_GUAGE_Q_INIT was written to the wrong value causing the fuel gauge to fail.
    
    Change-Id: Idbafc110deef6f6ce93dac9a0ad81974d1f112a9
    Signed-off-by: shengfei Xu <xsf@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk817.c b/drivers/power/fuel_gauge/fg_rk817.c
index c6e4b3bfef..78b3113ea7 100644
--- a/drivers/power/fuel_gauge/fg_rk817.c
+++ b/drivers/power/fuel_gauge/fg_rk817.c
@@ -812,7 +812,7 @@ static void rk817_bat_not_first_pwron(struct rk817_battery_device *battery)
 		battery->remain_cap = rk817_bat_get_capacity_uah(battery);
 		battery->rsoc = rk817_bat_get_rsoc(battery);
 		pre_soc = battery->rsoc;
-		pre_cap = battery->remain_cap;
+		pre_cap = battery->remain_cap / 1000;
 		goto finish;
 	}
 finish:

commit 04d4208bc859b5627fe5079144a82e35f5d3451e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 2 11:14:14 2018 +0800

    regulator: rk8xx: fix LDO 'config_reg' missing
    
    1. use 'NA' to indicate not unsed or not exist configure;
    2. there is not configure register for ldo, so define it as NA;
    
    Change-Id: Ic87e5c9fe6128c14a47a306a8726c487d5b96664
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/rk8xx.c b/drivers/power/regulator/rk8xx.c
index f3f9620280..5fe2fdef16 100644
--- a/drivers/power/regulator/rk8xx.c
+++ b/drivers/power/regulator/rk8xx.c
@@ -20,6 +20,9 @@
 #define ENABLE_DRIVER
 #endif
 
+/* Not used or exisit register and configure */
+#define NA			-1
+
 /* Field Definitions */
 #define RK808_BUCK_VSEL_MASK	0x3f
 #define RK808_BUCK4_VSEL_MASK	0xf
@@ -89,7 +92,7 @@ struct rk8xx_reg_info {
 static const struct rk8xx_reg_info rk808_buck[] = {
 	{ 712500,   12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK808_BUCK_VSEL_MASK, },
 	{ 712500,   12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK808_BUCK_VSEL_MASK, },
-	{ 712500,   12500, -1, -1, REG_BUCK3_CONFIG, RK808_BUCK_VSEL_MASK, },
+	{ 712500,   12500, NA,		      NA,		  REG_BUCK3_CONFIG, RK808_BUCK_VSEL_MASK, },
 	{ 1800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, REG_BUCK4_CONFIG, RK808_BUCK4_VSEL_MASK, },
 };
 
@@ -103,17 +106,17 @@ static const struct rk8xx_reg_info rk816_buck[] = {
 	{ 1800000, 200000, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x3c, },
 	{ 2300000,      0, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x3f, },
 	/* buck 3 */
-	{ 712500, 12500, -1, -1, REG_BUCK3_CONFIG, RK818_BUCK_VSEL_MASK, },
+	{ 712500,   12500, NA,		      NA,		  REG_BUCK3_CONFIG, RK818_BUCK_VSEL_MASK, },
 	/* buck 4 */
 	{  800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, REG_BUCK4_CONFIG, RK818_BUCK4_VSEL_MASK, },
 };
 
 static const struct rk8xx_reg_info rk809_buck5[] = {
 	/* buck 5 */
-	{ 1500000,	0, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), -1, RK809_BUCK5_VSEL_MASK, 0x00, },
-	{ 1800000, 200000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), -1, RK809_BUCK5_VSEL_MASK, 0x01, },
-	{ 2800000, 200000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), -1, RK809_BUCK5_VSEL_MASK, 0x04, },
-	{ 3300000, 300000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), -1, RK809_BUCK5_VSEL_MASK, 0x06, },
+	{ 1500000,	0, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), NA, RK809_BUCK5_VSEL_MASK, 0x00, },
+	{ 1800000, 200000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), NA, RK809_BUCK5_VSEL_MASK, 0x01, },
+	{ 2800000, 200000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), NA, RK809_BUCK5_VSEL_MASK, 0x04, },
+	{ 3300000, 300000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), NA, RK809_BUCK5_VSEL_MASK, 0x06, },
 };
 
 static const struct rk8xx_reg_info rk817_buck[] = {
@@ -138,70 +141,70 @@ static const struct rk8xx_reg_info rk817_buck[] = {
 static const struct rk8xx_reg_info rk818_buck[] = {
 	{ 712500,   12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, },
 	{ 712500,   12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, },
-	{ 712500,   12500, -1, -1, REG_BUCK3_CONFIG, RK818_BUCK_VSEL_MASK, },
+	{ 712500,   12500, NA,		      NA,		  REG_BUCK3_CONFIG, RK818_BUCK_VSEL_MASK, },
 	{ 1800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, REG_BUCK4_CONFIG, RK818_BUCK4_VSEL_MASK, },
 };
 
 #ifdef ENABLE_DRIVER
 static const struct rk8xx_reg_info rk808_ldo[] = {
-	{ 1800000, 100000, REG_LDO1_ON_VSEL, REG_LDO1_SLP_VSEL, RK808_LDO_VSEL_MASK, },
-	{ 1800000, 100000, REG_LDO2_ON_VSEL, REG_LDO2_SLP_VSEL, RK808_LDO_VSEL_MASK, },
-	{  800000, 100000, REG_LDO3_ON_VSEL, REG_LDO3_SLP_VSEL, RK808_BUCK4_VSEL_MASK, },
-	{ 1800000, 100000, REG_LDO4_ON_VSEL, REG_LDO4_SLP_VSEL, RK808_LDO_VSEL_MASK, },
-	{ 1800000, 100000, REG_LDO5_ON_VSEL, REG_LDO5_SLP_VSEL, RK808_LDO_VSEL_MASK, },
-	{  800000, 100000, REG_LDO6_ON_VSEL, REG_LDO6_SLP_VSEL, RK808_LDO_VSEL_MASK, },
-	{  800000, 100000, REG_LDO7_ON_VSEL, REG_LDO7_SLP_VSEL, RK808_LDO_VSEL_MASK, },
-	{ 1800000, 100000, REG_LDO8_ON_VSEL, REG_LDO8_SLP_VSEL, RK808_LDO_VSEL_MASK, },
+	{ 1800000, 100000, REG_LDO1_ON_VSEL, REG_LDO1_SLP_VSEL, NA, RK808_LDO_VSEL_MASK, },
+	{ 1800000, 100000, REG_LDO2_ON_VSEL, REG_LDO2_SLP_VSEL, NA, RK808_LDO_VSEL_MASK, },
+	{  800000, 100000, REG_LDO3_ON_VSEL, REG_LDO3_SLP_VSEL, NA, RK808_BUCK4_VSEL_MASK, },
+	{ 1800000, 100000, REG_LDO4_ON_VSEL, REG_LDO4_SLP_VSEL, NA, RK808_LDO_VSEL_MASK, },
+	{ 1800000, 100000, REG_LDO5_ON_VSEL, REG_LDO5_SLP_VSEL, NA, RK808_LDO_VSEL_MASK, },
+	{  800000, 100000, REG_LDO6_ON_VSEL, REG_LDO6_SLP_VSEL, NA, RK808_LDO_VSEL_MASK, },
+	{  800000, 100000, REG_LDO7_ON_VSEL, REG_LDO7_SLP_VSEL, NA, RK808_LDO_VSEL_MASK, },
+	{ 1800000, 100000, REG_LDO8_ON_VSEL, REG_LDO8_SLP_VSEL, NA, RK808_LDO_VSEL_MASK, },
 };
 
 static const struct rk8xx_reg_info rk816_ldo[] = {
-	{ 800000, 100000, REG_LDO1_ON_VSEL, REG_LDO1_SLP_VSEL, RK818_LDO_VSEL_MASK, },
-	{ 800000, 100000, REG_LDO2_ON_VSEL, REG_LDO2_SLP_VSEL, RK818_LDO_VSEL_MASK, },
-	{ 800000, 100000, REG_LDO3_ON_VSEL, REG_LDO3_SLP_VSEL, RK818_LDO_VSEL_MASK, },
-	{ 800000, 100000, REG_LDO4_ON_VSEL, REG_LDO4_SLP_VSEL, RK818_LDO_VSEL_MASK, },
-	{ 800000, 100000, REG_LDO5_ON_VSEL, REG_LDO5_SLP_VSEL, RK818_LDO_VSEL_MASK, },
-	{ 800000, 100000, REG_LDO6_ON_VSEL, REG_LDO6_SLP_VSEL, RK818_LDO_VSEL_MASK, },
+	{ 800000, 100000, REG_LDO1_ON_VSEL, REG_LDO1_SLP_VSEL, NA, RK818_LDO_VSEL_MASK, },
+	{ 800000, 100000, REG_LDO2_ON_VSEL, REG_LDO2_SLP_VSEL, NA, RK818_LDO_VSEL_MASK, },
+	{ 800000, 100000, REG_LDO3_ON_VSEL, REG_LDO3_SLP_VSEL, NA, RK818_LDO_VSEL_MASK, },
+	{ 800000, 100000, REG_LDO4_ON_VSEL, REG_LDO4_SLP_VSEL, NA, RK818_LDO_VSEL_MASK, },
+	{ 800000, 100000, REG_LDO5_ON_VSEL, REG_LDO5_SLP_VSEL, NA, RK818_LDO_VSEL_MASK, },
+	{ 800000, 100000, REG_LDO6_ON_VSEL, REG_LDO6_SLP_VSEL, NA, RK818_LDO_VSEL_MASK, },
 };
 
 static const struct rk8xx_reg_info rk817_ldo[] = {
 	/* ldo1 */
-	{  600000, 25000, RK817_LDO_ON_VSEL(1), RK817_LDO_SLP_VSEL(1), RK817_LDO_VSEL_MASK, 0x00, },
-	{ 3400000,     0, RK817_LDO_ON_VSEL(1), RK817_LDO_SLP_VSEL(1), RK817_LDO_VSEL_MASK, 0x70, },
+	{  600000, 25000, RK817_LDO_ON_VSEL(1), RK817_LDO_SLP_VSEL(1), NA, RK817_LDO_VSEL_MASK, 0x00, },
+	{ 3400000,     0, RK817_LDO_ON_VSEL(1), RK817_LDO_SLP_VSEL(1), NA, RK817_LDO_VSEL_MASK, 0x70, },
 	/* ldo2 */
-	{  600000, 25000, RK817_LDO_ON_VSEL(2), RK817_LDO_SLP_VSEL(2), RK817_LDO_VSEL_MASK, 0x00, },
-	{ 3400000,     0, RK817_LDO_ON_VSEL(2), RK817_LDO_SLP_VSEL(2), RK817_LDO_VSEL_MASK, 0x70, },
+	{  600000, 25000, RK817_LDO_ON_VSEL(2), RK817_LDO_SLP_VSEL(2), NA, RK817_LDO_VSEL_MASK, 0x00, },
+	{ 3400000,     0, RK817_LDO_ON_VSEL(2), RK817_LDO_SLP_VSEL(2), NA, RK817_LDO_VSEL_MASK, 0x70, },
 	/* ldo3 */
-	{  600000, 25000, RK817_LDO_ON_VSEL(3), RK817_LDO_SLP_VSEL(3), RK817_LDO_VSEL_MASK, 0x00, },
-	{ 3400000,     0, RK817_LDO_ON_VSEL(3), RK817_LDO_SLP_VSEL(3), RK817_LDO_VSEL_MASK, 0x70, },
+	{  600000, 25000, RK817_LDO_ON_VSEL(3), RK817_LDO_SLP_VSEL(3), NA, RK817_LDO_VSEL_MASK, 0x00, },
+	{ 3400000,     0, RK817_LDO_ON_VSEL(3), RK817_LDO_SLP_VSEL(3), NA, RK817_LDO_VSEL_MASK, 0x70, },
 	/* ldo4 */
-	{  600000, 25000, RK817_LDO_ON_VSEL(4), RK817_LDO_SLP_VSEL(4), RK817_LDO_VSEL_MASK, 0x00, },
-	{ 3400000,     0, RK817_LDO_ON_VSEL(4), RK817_LDO_SLP_VSEL(4), RK817_LDO_VSEL_MASK, 0x70, },
+	{  600000, 25000, RK817_LDO_ON_VSEL(4), RK817_LDO_SLP_VSEL(4), NA, RK817_LDO_VSEL_MASK, 0x00, },
+	{ 3400000,     0, RK817_LDO_ON_VSEL(4), RK817_LDO_SLP_VSEL(4), NA, RK817_LDO_VSEL_MASK, 0x70, },
 	/* ldo5 */
-	{  600000, 25000, RK817_LDO_ON_VSEL(5), RK817_LDO_SLP_VSEL(5), RK817_LDO_VSEL_MASK, 0x00, },
-	{ 3400000,     0, RK817_LDO_ON_VSEL(5), RK817_LDO_SLP_VSEL(5), RK817_LDO_VSEL_MASK, 0x70, },
+	{  600000, 25000, RK817_LDO_ON_VSEL(5), RK817_LDO_SLP_VSEL(5), NA, RK817_LDO_VSEL_MASK, 0x00, },
+	{ 3400000,     0, RK817_LDO_ON_VSEL(5), RK817_LDO_SLP_VSEL(5), NA, RK817_LDO_VSEL_MASK, 0x70, },
 	/* ldo6 */
-	{  600000, 25000, RK817_LDO_ON_VSEL(6), RK817_LDO_SLP_VSEL(6), RK817_LDO_VSEL_MASK, 0x00, },
-	{ 3400000,     0, RK817_LDO_ON_VSEL(6), RK817_LDO_SLP_VSEL(6), RK817_LDO_VSEL_MASK, 0x70, },
+	{  600000, 25000, RK817_LDO_ON_VSEL(6), RK817_LDO_SLP_VSEL(6), NA, RK817_LDO_VSEL_MASK, 0x00, },
+	{ 3400000,     0, RK817_LDO_ON_VSEL(6), RK817_LDO_SLP_VSEL(6), NA, RK817_LDO_VSEL_MASK, 0x70, },
 	/* ldo7 */
-	{  600000, 25000, RK817_LDO_ON_VSEL(7), RK817_LDO_SLP_VSEL(7), RK817_LDO_VSEL_MASK, 0x00, },
-	{ 3400000,     0, RK817_LDO_ON_VSEL(7), RK817_LDO_SLP_VSEL(7), RK817_LDO_VSEL_MASK, 0x70, },
+	{  600000, 25000, RK817_LDO_ON_VSEL(7), RK817_LDO_SLP_VSEL(7), NA, RK817_LDO_VSEL_MASK, 0x00, },
+	{ 3400000,     0, RK817_LDO_ON_VSEL(7), RK817_LDO_SLP_VSEL(7), NA, RK817_LDO_VSEL_MASK, 0x70, },
 	/* ldo8 */
-	{  600000, 25000, RK817_LDO_ON_VSEL(8), RK817_LDO_SLP_VSEL(8), RK817_LDO_VSEL_MASK, 0x00, },
-	{ 3400000,     0, RK817_LDO_ON_VSEL(8), RK817_LDO_SLP_VSEL(8), RK817_LDO_VSEL_MASK, 0x70, },
+	{  600000, 25000, RK817_LDO_ON_VSEL(8), RK817_LDO_SLP_VSEL(8), NA, RK817_LDO_VSEL_MASK, 0x00, },
+	{ 3400000,     0, RK817_LDO_ON_VSEL(8), RK817_LDO_SLP_VSEL(8), NA, RK817_LDO_VSEL_MASK, 0x70, },
 	/* ldo9 */
-	{  600000, 25000, RK817_LDO_ON_VSEL(9), RK817_LDO_SLP_VSEL(9), RK817_LDO_VSEL_MASK, 0x00, },
-	{ 3400000,     0, RK817_LDO_ON_VSEL(9), RK817_LDO_SLP_VSEL(9), RK817_LDO_VSEL_MASK, 0x70, },
+	{  600000, 25000, RK817_LDO_ON_VSEL(9), RK817_LDO_SLP_VSEL(9), NA, RK817_LDO_VSEL_MASK, 0x00, },
+	{ 3400000,     0, RK817_LDO_ON_VSEL(9), RK817_LDO_SLP_VSEL(9), NA, RK817_LDO_VSEL_MASK, 0x70, },
 };
 
 static const struct rk8xx_reg_info rk818_ldo[] = {
-	{ 1800000, 100000, REG_LDO1_ON_VSEL, REG_LDO1_SLP_VSEL, RK818_LDO_VSEL_MASK, },
-	{ 1800000, 100000, REG_LDO2_ON_VSEL, REG_LDO2_SLP_VSEL, RK818_LDO_VSEL_MASK, },
-	{  800000, 100000, REG_LDO3_ON_VSEL, REG_LDO3_SLP_VSEL, RK818_LDO3_ON_VSEL_MASK, },
-	{ 1800000, 100000, REG_LDO4_ON_VSEL, REG_LDO4_SLP_VSEL, RK818_LDO_VSEL_MASK, },
-	{ 1800000, 100000, REG_LDO5_ON_VSEL, REG_LDO5_SLP_VSEL, RK818_LDO_VSEL_MASK, },
-	{  800000, 100000, REG_LDO6_ON_VSEL, REG_LDO6_SLP_VSEL, RK818_LDO_VSEL_MASK, },
-	{  800000, 100000, REG_LDO7_ON_VSEL, REG_LDO7_SLP_VSEL, RK818_LDO_VSEL_MASK, },
-	{ 1800000, 100000, REG_LDO8_ON_VSEL, REG_LDO8_SLP_VSEL, RK818_LDO_VSEL_MASK, },
+	{ 1800000, 100000, REG_LDO1_ON_VSEL, REG_LDO1_SLP_VSEL, NA, RK818_LDO_VSEL_MASK, },
+	{ 1800000, 100000, REG_LDO2_ON_VSEL, REG_LDO2_SLP_VSEL, NA, RK818_LDO_VSEL_MASK, },
+	{  800000, 100000, REG_LDO3_ON_VSEL, REG_LDO3_SLP_VSEL, NA, RK818_LDO3_ON_VSEL_MASK, },
+	{ 1800000, 100000, REG_LDO4_ON_VSEL, REG_LDO4_SLP_VSEL, NA, RK818_LDO_VSEL_MASK, },
+	{ 1800000, 100000, REG_LDO5_ON_VSEL, REG_LDO5_SLP_VSEL, NA, RK818_LDO_VSEL_MASK, },
+	{  800000, 100000, REG_LDO6_ON_VSEL, REG_LDO6_SLP_VSEL, NA, RK818_LDO_VSEL_MASK, },
+	{  800000, 100000, REG_LDO7_ON_VSEL, REG_LDO7_SLP_VSEL, NA, RK818_LDO_VSEL_MASK, },
+	{ 1800000, 100000, REG_LDO8_ON_VSEL, REG_LDO8_SLP_VSEL, NA, RK818_LDO_VSEL_MASK, },
 };
 #endif
 
@@ -275,7 +278,7 @@ static int _buck_set_value(struct udevice *pmic, int buck, int uvolt)
 	int mask = info->vsel_mask;
 	int val;
 
-	if (info->vsel_reg == -1)
+	if (info->vsel_reg == NA)
 		return -ENOSYS;
 
 	if (info->step_uv == 0)	/* Fixed voltage */
@@ -358,7 +361,7 @@ static int _buck_set_suspend_value(struct udevice *pmic, int buck, int uvolt)
 	int mask = info->vsel_mask;
 	int val;
 
-	if (info->vsel_sleep_reg == -1)
+	if (info->vsel_sleep_reg == NA)
 		return -ENOSYS;
 
 	if (info->step_uv == 0)
@@ -421,7 +424,7 @@ static int _buck_set_ramp_delay(struct udevice *pmic, int buck, u32 ramp_delay)
 	struct rk8xx_priv *priv = dev_get_priv(pmic);
 	u32 ramp_value, ramp_mask;
 
-	if (info->config_reg == -1)
+	if (info->config_reg == NA)
 		return -ENOSYS;
 
 	switch (priv->variant) {
@@ -698,7 +701,7 @@ static int buck_get_value(struct udevice *dev)
 	int mask = info->vsel_mask;
 	int ret, val;
 
-	if (info->vsel_reg == -1)
+	if (info->vsel_reg == NA)
 		return -ENOSYS;
 
 	ret = pmic_reg_read(dev->parent, info->vsel_reg);
@@ -758,7 +761,7 @@ static int ldo_get_value(struct udevice *dev)
 	int mask = info->vsel_mask;
 	int ret, val;
 
-	if (info->vsel_reg == -1)
+	if (info->vsel_reg == NA)
 		return -ENOSYS;
 	ret = pmic_reg_read(dev->parent, info->vsel_reg);
 	if (ret < 0)
@@ -775,7 +778,7 @@ static int ldo_set_value(struct udevice *dev, int uvolt)
 	int mask = info->vsel_mask;
 	int val;
 
-	if (info->vsel_reg == -1)
+	if (info->vsel_reg == NA)
 		return -ENOSYS;
 
 	if (info->step_uv == 0)
@@ -796,7 +799,7 @@ static int ldo_set_suspend_value(struct udevice *dev, int uvolt)
 	int mask = info->vsel_mask;
 	int val;
 
-	if (info->vsel_sleep_reg == -1)
+	if (info->vsel_sleep_reg == NA)
 		return -ENOSYS;
 
 	if (info->step_uv == 0)

commit d9d90a730437e3fae3b6e92c5a07b7406e1009ca
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jun 28 16:04:57 2018 +0800

    make.sh: pack all loader image for target platform
    
    mainly for rk3399 ini files:
            RK3399MINIALL.ini
            RK3399MINIALL_SPINOR.ini
    
    Change-Id: I025c98c2cb0a4e8d6070efe1999797c90b113036
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index aeb808b098..d6a53dc066 100755
--- a/make.sh
+++ b/make.sh
@@ -309,15 +309,24 @@ pack_uboot_image()
 
 pack_loader_image()
 {
+	local files ini
+
 	if [ ! -f ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini ]; then
 		echo "pack loader failed! Can't find: ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini"
 		return
 	fi
 
 	cd ${RKBIN}
-	${RKTOOLS}/boot_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini
+	files=`ls ${RKBIN}/RKBOOT/${RKCHIP}MINIALL*.ini`
+	for ini in $files
+	do
+		if [ -f "$ini" ]; then
+			${RKTOOLS}/boot_merger --replace tools/rk_tools/ ./ $ini
+			echo "pack loader okay! Input: $ini"
+		fi
+	done
+
 	cd - && mv ${RKBIN}/*_loader_*.bin ./
-	echo "pack loader okay! Input: ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini"
 }
 
 pack_trust_image()

commit b62551987d806134802370b59fc0d63317f4058c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jun 28 15:13:15 2018 +0800

    make.sh: clean up
    
    1. improve help description;
    2. support subcmd without [board] option;
    3. imporve 'O=<dir>' support;
    4. imporve code format;
    
    Change-Id: I7bb0d6176ce856750cfbcd234edfb8b237ea424a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 0569f4851d..aeb808b098 100755
--- a/make.sh
+++ b/make.sh
@@ -1,9 +1,9 @@
 #!/bin/sh
 set -e
 BOARD=$1
-SUBCMD=$2
+SUBCMD=$1
 JOB=`sed -n "N;/processor/p" /proc/cpuinfo|wc -l`
-SUPPORT_LIST=`ls configs/*-[r,p][x,v,k][0-9][0-9]*_defconfig`
+SUPPORT_LIST=`ls configs/*[r,p][x,v,k][0-9][0-9]*_defconfig`
 
 ########################################### User can modify #############################################
 # User's rkbin tool relative path
@@ -30,7 +30,7 @@ TOOLCHAIN_GCC=
 TOOLCHAIN_OBJDUMP=
 
 # Declare global default output dir and cmd, update in prepare()
-OUTDIR=
+OUTDIR=$2
 OUTOPT=
 
 # Declare global plaform configure, updated in fixup_platform_configure()
@@ -40,40 +40,101 @@ PLATFORM_UBOOT_IMG_SIZE=
 PLATFORM_TRUST_IMG_SIZE=
 PLATFORM_AARCH32=
 #########################################################################################################
+help()
+{
+	echo
+	echo "Usage: ./make.sh [board|subcmd] [O=<dir>]"
+	echo
+	echo "Example:"
+	echo
+	echo "1. Build:"
+	echo "	./make.sh evb-rk3399     	---- build for evb-rk3399_defconfig"
+	echo "	./make.sh evb-rk3399 O=rockdev  ---- build for evb-rk3399_defconfig with output dir "./rockdev""
+	echo "	./make.sh firefly-rk3288 	---- build for firefly-rk3288_defconfig"
+	echo "	./make.sh			---- build with exist .config"
+	echo
+	echo "	After build, images of uboot, loader and trust are all generated."
+	echo
+	echo "2. Subcmd helper:"
+	echo "	./make.sh trust		--- pack trust.img without rebuild project"
+	echo "	./make.sh loader	--- pack loader bin without rebuild project"
+	echo "	./make.sh uboot		--- pack uboot.img without rebuild project"
+	echo
+	echo "3. Debug helper:"
+	echo "	./make.sh elf		--- dump elf file with -D(default)"
+	echo "	./make.sh elf-S		--- dump elf file with -S"
+	echo "	./make.sh map		--- cat u-boot.map"
+	echo "	./make.sh sym		--- cat u-boot.sym"
+}
 
 prepare()
 {
-	local absolute_path cmd
+	local absolute_path cmd dir count
 
-	# Assign output directory
-	cmd=${SUBCMD%=*}
+	# Parse output directory
+	cmd=${OUTDIR%=*}
 	if [ "${cmd}" = 'O' ]; then
-		OUTDIR=${SUBCMD#*=}
+		OUTDIR=${OUTDIR#*=}
 		OUTOPT=O=${OUTDIR}
 	else
-		OUTDIR=.
-	fi
+		case $BOARD in
+			''|elf*|trust|loader|uboot|map|sym)
+			count=`find -name .config | wc -l`
+			dir=`find -name .config`
+			if [ $count -eq 1 ]; then
+				dir=${dir%/*}
+				OUTDIR=${dir#*/}
+				if [ $OUTDIR != '.' ]; then
+					OUTOPT=O=${OUTDIR}
+				fi
+			elif [ $count -eq 0 ]; then
+				echo
+				echo "Build failed, Can't find .config"
+				help
+				exit 1
+			else
+				echo
+				echo "Build failed, find $count '.config': "
+				echo "$dir"
+				echo "Please leave only one of them"
+				exit 1
+			fi
+			;;
 
-	# Check invalid args and help
-	if [ "$BOARD" = '--help' -o "$BOARD" = '-help' -o "$BOARD" = 'help' -o "$BOARD" = '-h' -o "$BOARD" = '--h' ]; then
-		echo
-		echo "Usage: ./make.sh [board]"
-		echo "Example:"
-		echo "./make.sh		 ---- build with exist .config"
-		echo "./make.sh evb-rk3399     ---- build for evb-rk3399_defconfig"
-		echo "./make.sh firefly-rk3288 ---- build for firefly-rk3288_defconfig"
-		exit 1
-	elif [ $BOARD ] && [ ! -f configs/${BOARD}_defconfig ]; then
-		echo
-		echo "Can't find: configs/${BOARD}_defconfig"
-		echo
-		echo "******** Rockchip Support List *************"
-		echo "${SUPPORT_LIST}"
-		echo "********************************************"
-		echo
-		exit 1
+			*)
+			OUTDIR=.
+			;;
+		esac
 	fi
 
+	# Parse help and make defconfig
+	case $BOARD in
+		#help
+		--help|-help|help|--h|-h)
+		help
+		exit 0
+		;;
+		#subcmd
+		''|elf*|trust|loader|uboot|map|sym)
+		;;
+
+		*)
+		if [ ! -f configs/${BOARD}_defconfig ]; then
+			echo
+			echo "Can't find: configs/${BOARD}_defconfig"
+			echo
+			echo "******** Rockchip Support List *************"
+			echo "${SUPPORT_LIST}"
+			echo "********************************************"
+			echo
+			exit 1
+		else
+			echo "make for ${BOARD}_defconfig by -j${JOB}"
+			make ${BOARD}_defconfig ${OUTOPT}
+		fi
+		;;
+	esac
+
 	# Initialize RKBIN and RKTOOLS
 	if [ -d ${RKBIN_TOOLS} ]; then
 		absolute_path=$(cd `dirname ${RKBIN_TOOLS}`; pwd)
@@ -90,14 +151,6 @@ prepare()
 	fi
 }
 
-make_defconfig()
-{
-	if [ $BOARD ]; then
-		echo "make for ${BOARD}_defconfig by -j${JOB}"
-		make ${BOARD}_defconfig ${OUTOPT}
-	fi
-}
-
 select_toolchain()
 {
 	local absolute_path
@@ -125,39 +178,53 @@ select_toolchain()
 	echo "toolchain: ${TOOLCHAIN_GCC}"
 }
 
-# Support subcmd:
-#	./make.sh evb-rk3288 elf	--- dump elf file with -D(default)
-#	./make.sh evb-rk3288 elf-S	--- dump elf file with -S
-#	./make.sh evb-rk3288 trust	--- pack trust.img without compile u-boot
-#	./make.sh evb-rk3288 loader	--- pack loader bin without compile u-boot
-#	./make.sh evb-rk3288 uboot	--- pack uboot.img without compile u-boot
 sub_commands()
 {
-	local elf=${SUBCMD%-*} opt=${SUBCMD#*-}
+	local cmd=${SUBCMD%-*} elfopt=${SUBCMD#*-}
 
-	if [ "$elf" = 'elf' ]; then
+	case $cmd in
+		elf)
 		if [ ! -f ${OUTDIR}/u-boot ]; then
 			echo "Can't find elf file: ${OUTDIR}/u-boot"
 			exit 1
 		else
-			# default 'elf' without option, use '-D'
-			if [ "${elf}" = 'elf' -a "${opt}" = 'elf' ]; then
-				opt=D
+			# default 'cmd' without option, use '-D'
+			if [ "${cmd}" = 'elf' -a "${elfopt}" = 'elf' ]; then
+				elfopt=D
 			fi
-
-			${TOOLCHAIN_OBJDUMP} -${opt} ${OUTDIR}/u-boot | less
+			${TOOLCHAIN_OBJDUMP} -${elfopt} ${OUTDIR}/u-boot | less
 			exit 0
 		fi
-	elif [ "$SUBCMD" = 'trust' ]; then
+		;;
+
+		map)
+		cat ${OUTDIR}/u-boot.map | less
+		exit 0
+		;;
+
+		sym)
+		cat ${OUTDIR}/u-boot.sym | less
+		exit 0
+		;;
+
+		trust)
 		pack_trust_image
 		exit 0
-	elif [ "$SUBCMD" = 'loader' ]; then
+		;;
+
+		loader)
 		pack_loader_image
 		exit 0
-	elif [ "$SUBCMD" = 'uboot' ]; then
+		;;
+
+		uboot)
 		pack_uboot_image
 		exit 0
-	fi
+		;;
+
+		*)
+		;;
+	esac
 }
 
 # Support platform special configure
@@ -321,7 +388,6 @@ finish()
 }
 
 prepare
-make_defconfig
 select_toolchain
 fixup_platform_configure
 sub_commands

commit 312bdeaca51588802c22e640a8ab8bc60cd2bf54
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jun 22 21:22:48 2018 +0800

    configs: rockchip: rk3288_defconfig
    
    Change-Id: I4c1bec92a5a2452e4afe5d3b0a1ff2694ceaccff
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3288_defconfig b/configs/rk3288_defconfig
new file mode 100644
index 0000000000..c7ddda3cc2
--- /dev/null
+++ b/configs/rk3288_defconfig
@@ -0,0 +1,92 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_ROCKCHIP_RK3288=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_TARGET_EVB_RK3288=y
+CONFIG_SPL_STACK_R_ADDR=0x80000
+CONFIG_DEFAULT_DEVICE_TREE="rk3288-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_BOOTDELAY=0
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_ISO_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_SPL_PARTITION_UUIDS=y
+CONFIG_RKPARM_PARTITION=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_RK8XX_PWRKEY=y
+CONFIG_ADC_KEY=y
+CONFIG_GPIO_KEY=y
+CONFIG_RK_KEY=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_DM_FUEL_GAUGE=y
+CONFIG_POWER_FG_RK818=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_ACT8846=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_ACT8846=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_DM_CHARGE_DISPLAY=y
+CONFIG_CHARGE_ANIMATION=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_DEBUG_UART_BASE=0xff690000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x320a
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_VIDEO_ROCKCHIP_MAX_YRES=1200
+CONFIG_DISPLAY_ROCKCHIP_MIPI=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_DRM_ROCKCHIP_LVDS=y
+CONFIG_DRM_ROCKCHIP_RGB=y
+CONFIG_LCD=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_CMD_DHRYSTONE=y
+CONFIG_ERRNO_STR=y
+CONFIG_TEST_ROCKCHIP=y

commit 5b0c392267d45861a502496a4983fd5739a6fea1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 25 09:47:43 2018 +0800

    configs: rk3399: enable more configure
    
    Change-Id: Iaccea12ffa788a2ff07bd33601c3712d50e5b0d9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
index 93039bff52..6d318ec834 100644
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -12,6 +12,7 @@ CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
+CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y
@@ -47,6 +48,10 @@ CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_ADC_KEY=y
+CONFIG_GPIO_KEY=y
+CONFIG_RK_KEY=y
 CONFIG_MISC=y
 CONFIG_ROCKCHIP_EFUSE=y
 CONFIG_MMC_DW=y
@@ -58,11 +63,15 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
+CONFIG_DM_FUEL_GAUGE=y
+CONFIG_POWER_FG_RK818=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_REGULATOR_RK8XX=y
+CONFIG_DM_CHARGE_DISPLAY=y
+CONFIG_CHARGE_ANIMATION=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
@@ -103,3 +112,4 @@ CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_ERRNO_STR=y
+CONFIG_TEST_ROCKCHIP=y

commit f98160cbddbe17305948e3073b8c7aa610b5845a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jun 29 10:09:29 2018 +0800

    dm: regulator: verbose more regulator configure message
    
    regulator_show() is used as an debug way, so its verbose
    message should be detail enough, this helps a lot.
    
    Change-Id: Iabe5fc65e8b6ff27b9c92bc3f0b6948e1013a9c8
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/regulator-uclass.c b/drivers/power/regulator/regulator-uclass.c
index 88f0cf54a7..4f50945f2f 100644
--- a/drivers/power/regulator/regulator-uclass.c
+++ b/drivers/power/regulator/regulator-uclass.c
@@ -267,13 +267,19 @@ static void regulator_show(struct udevice *dev, int ret)
 	uc_pdata = dev_get_uclass_platdata(dev);
 
 	printf("%s@%s: ", dev->name, uc_pdata->name);
-	if (uc_pdata->flags & REGULATOR_FLAG_AUTOSET_UV)
-		printf("set %d uV", uc_pdata->min_uV);
-	if (uc_pdata->flags & REGULATOR_FLAG_AUTOSET_UA)
-		printf("; set %d uA", uc_pdata->min_uA);
-	printf("; enabling");
+	printf("%duV <-> %duV, set %duV, %s",
+	       uc_pdata->min_uV, uc_pdata->max_uV, uc_pdata->min_uV,
+	       (uc_pdata->always_on || uc_pdata->boot_on) ?
+	       "enabling" : "not enabling");
 	if (ret)
 		printf(" (ret: %d)", ret);
+
+	printf("; supsend %duV, %s",
+	       uc_pdata->suspend_uV,
+	       uc_pdata->suspend_on ? "enabling" : "not enabling");
+	if (uc_pdata->init_uV != -ENODATA)
+		printf("; init %duV", uc_pdata->init_uV);
+
 	printf("\n");
 }
 
@@ -435,10 +441,8 @@ int regulators_enable_boot_on(bool verbose)
 	     dev;
 	     uclass_next_device(&dev)) {
 		ret = regulator_autoset(dev);
-		if (ret == -EMEDIUMTYPE) {
+		if (ret == -EMEDIUMTYPE)
 			ret = 0;
-			continue;
-		}
 		if (verbose)
 			regulator_show(dev, ret);
 		if (ret == -ENOSYS)

commit 34483cf7020bb195dfb6d239f73edde86fcd812e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jun 28 09:56:50 2018 +0800

    dm: regulator: make suspend and normal configure non relative
    
    suspend configure result should not influence normal configure
    
    Change-Id: I7107ad5f3303d1f1456ada5949deced5fa8e4ec2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/regulator-uclass.c b/drivers/power/regulator/regulator-uclass.c
index b4e91251de..88f0cf54a7 100644
--- a/drivers/power/regulator/regulator-uclass.c
+++ b/drivers/power/regulator/regulator-uclass.c
@@ -234,9 +234,15 @@ int regulator_autoset(struct udevice *dev)
 	if (uc_pdata->ramp_delay != -ENODATA)
 		regulator_set_ramp_delay(dev, uc_pdata->ramp_delay);
 
+	/*
+	 * Suspend configure is not necessary and should not influence normal
+	 * configure, so that we set "ret=0" even failed here.
+	 */
 	ret = regulator_set_suspend_enable(dev, uc_pdata->suspend_on);
 	if (!ret && uc_pdata->suspend_on)
-		ret = regulator_set_suspend_value(dev, uc_pdata->suspend_uV);
+		regulator_set_suspend_value(dev, uc_pdata->suspend_uV);
+	else
+		ret = 0;
 
 	if (!uc_pdata->always_on && !uc_pdata->boot_on)
 		return -EMEDIUMTYPE;

commit 7dc573239eaf3d56689b68a919435e61e960fd25
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 25 11:33:57 2018 +0800

    fuel gauge: rk818: clean up
    
    this is a initial version porting from rkdevelop
    commit: 64f6c0e.
    
    Change-Id: Iadc46282e0782d0cd985cb0ee9d317cb5d94f41e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk818.c b/drivers/power/fuel_gauge/fg_rk818.c
index b05a2100da..34b1cbbe69 100644
--- a/drivers/power/fuel_gauge/fg_rk818.c
+++ b/drivers/power/fuel_gauge/fg_rk818.c
@@ -12,6 +12,9 @@
 #include <asm/gpio.h>
 #include <common.h>
 #include <power/pmic.h>
+#include <dm/uclass-internal.h>
+#include <power/charge_display.h>
+#include <power/charge_animation.h>
 #include <power/fuel_gauge.h>
 #include <power/rk8xx_pmic.h>
 #include <linux/usb/phy-rockchip-inno-usb2.h>
@@ -33,7 +36,6 @@ static int dbg_enable = 0;
 
 /* THERMAL_REG */
 #define TEMP_105C		(0x02 << 2)
-#define TEMP_115C		(0x03 << 2)
 #define FB_TEMP_MSK		0x0c
 
 /* CHRG_CTRL_REG2 */
@@ -73,7 +75,11 @@ static int dbg_enable = 0;
 /* CHRG_USB_CTRL */
 #define CHRG_EN			(1 << 7)
 
+/* ADC_CTRL_REG */
 #define ADC_TS2_EN		(1 << 4)
+#define ADC_TS1_EN		(1 << 5)
+
+/* TS_CTRL_REG */
 #define TS2_ADC_MODE		(1 << 5)
 
 /* SUP_STS_REG */
@@ -99,6 +105,7 @@ static int dbg_enable = 0;
 #define FINISH_CALI_CURR	1500
 #define TERM_CALI_CURR		600
 #define	VIRTUAL_POWER_VOL	4200
+#define	VIRTUAL_POWER_CUR	1000
 #define	VIRTUAL_POWER_SOC	66
 #define SECONDS(n)		((n) * 1000)
 
@@ -133,18 +140,30 @@ static int dbg_enable = 0;
 #define TS2_VOL_MULTI		0
 #define TS2_CHECK_CNT		5
 
-#define DIV(x)			((x) ? (x) : 1)
+#define ADC_CUR_MSK		0x03
+#define ADC_CUR_20UA		0x00
+#define ADC_CUR_40UA		0x01
+#define ADC_CUR_60UA		0x02
+#define ADC_CUR_80UA		0x03
 
-/* charger type definition */
-enum charger_type {
-	NO_CHARGER = 0,
-	USB_CHARGER,
-	AC_CHARGER,
-	DC_CHARGER,
-	UNDEF_CHARGER,
-};
+#define NTC_CALC_FACTOR_80UA	7
+#define NTC_CALC_FACTOR_60UA	9
+#define NTC_CALC_FACTOR_40UA	13
+#define NTC_CALC_FACTOR_20UA	27
+#define NTC_80UA_MAX_MEASURE	27500
+#define NTC_60UA_MAX_MEASURE	36666
+#define NTC_40UA_MAX_MEASURE	55000
+#define NTC_20UA_MAX_MEASURE	110000
+
+#define ZERO_MIN_VOLTAGE	3800
+
+#define TS1_NOT_READY		0xabcdabcd
 
-struct battery_info {
+#define DIV(x)			((x) ? (x) : 1)
+
+/***********************************************************/
+struct battery_priv {
+	struct udevice *dev;
 	int		chrg_type;
 	int		poffset;
 	int		bat_res;
@@ -162,6 +181,12 @@ struct battery_info {
 	int		nac;
 	u32		*ocv_table;
 	u32		ocv_size;
+	u32		*ntc_table;
+	u32		ntc_size;
+	u32		ntc_factor;
+	u32		ntc_uA;
+	int		ntc_degree_from;
+	int		temperature;
 	int		virtual_power;
 	int		ts2_vol_multi;
 	int		pwroff_min;
@@ -187,7 +212,7 @@ struct battery_info {
 	int		sm_meet_soc;
 	u8		halt_cnt;
 	u8		dc_active_level;
-	bool		dc_is_valid;
+	u8		dc_is_valid;
 	bool		is_halt;
 	bool		is_ocv_calib;
 	bool		is_max_soc_offset;
@@ -198,10 +223,13 @@ struct battery_info {
 	int		pwr_vol;
 };
 
-static struct udevice *g_pmic_dev;
-
-/* TODO */
-#define CONFIG_SCREEN_ON_VOL_THRESD	3400
+enum charger_type {
+	NO_CHARGER = 0,
+	USB_CHARGER,
+	AC_CHARGER,
+	DC_CHARGER,
+	UNDEF_CHARGER,
+};
 
 static const u32 CHRG_VOL_SEL[] = {
 	4050, 4100, 4150, 4200, 4250, 4300, 4350
@@ -215,101 +243,106 @@ static const u32 CHRG_CUR_INPUT[] = {
 	450, 800, 850, 1000, 1250, 1500, 1750, 2000, 2250, 2500, 2750, 3000
 };
 
-static int rk818_bat_read(u8 reg)
+static int rk818_bat_read(struct battery_priv *di, u8 reg)
 {
-	return pmic_reg_read(g_pmic_dev, reg);
+	return pmic_reg_read(di->dev->parent, reg);
 }
 
-static void rk818_bat_write(u8 reg, u8 buf)
+static void rk818_bat_write(struct battery_priv *di, u8 reg, u8 buf)
 {
-	pmic_reg_write(g_pmic_dev, reg, buf);
+	pmic_reg_write(di->dev->parent, reg, buf);
 }
 
 static int rk818_bat_dwc_otg_check_dpdm(void)
 {
+#ifdef CONFIG_PHY_ROCKCHIP_INNO_USB2
 	return rockchip_chg_get_type();
+#else
+	debug("rockchip_chg_get_type() is not implement\n");
+	return NO_CHARGER;
+#endif
 }
 
-static int rk818_bat_get_rsoc(struct battery_info *di)
+static int rk818_bat_get_rsoc(struct battery_priv *di)
 {
 	return (di->remain_cap + di->fcc / 200) * 100 / DIV(di->fcc);
 }
 
-static int rk818_bat_get_dsoc(struct  battery_info *di)
+static int rk818_bat_get_dsoc(struct  battery_priv *di)
 {
-	return rk818_bat_read(SOC_REG);
+	return rk818_bat_read(di, SOC_REG);
 }
 
-static void rk818_bat_enable_gauge(struct battery_info *di)
+static void rk818_bat_enable_gauge(struct battery_priv *di)
 {
 	u8 val;
 
-	val = rk818_bat_read(TS_CTRL_REG);
+	val = rk818_bat_read(di, TS_CTRL_REG);
 	val |= GG_EN;
-	rk818_bat_write(TS_CTRL_REG, val);
+	rk818_bat_write(di, TS_CTRL_REG, val);
 }
 
-static int rk818_bat_get_vcalib0(struct battery_info *di)
+static int rk818_bat_get_vcalib0(struct battery_priv *di)
 {
 	int val = 0;
 
-	val |= rk818_bat_read(VCALIB0_REGL) << 0;
-	val |= rk818_bat_read(VCALIB0_REGH) << 8;
+	val |= rk818_bat_read(di, VCALIB0_REGL) << 0;
+	val |= rk818_bat_read(di, VCALIB0_REGH) << 8;
 
 	return val;
 }
 
-static int rk818_bat_get_vcalib1(struct battery_info *di)
+static int rk818_bat_get_vcalib1(struct battery_priv *di)
 {
 	int val = 0;
 
-	val |= rk818_bat_read(VCALIB1_REGL) << 0;
-	val |= rk818_bat_read(VCALIB1_REGH) << 8;
+	val |= rk818_bat_read(di, VCALIB1_REGL) << 0;
+	val |= rk818_bat_read(di, VCALIB1_REGH) << 8;
 
 	return val;
 }
 
-static int rk818_bat_get_coffset(struct battery_info *di)
+static int rk818_bat_get_ioffset(struct battery_priv *di)
 {
 	int val = 0;
 
-	val |= rk818_bat_read(CAL_OFFSET_REGL) << 0;
-	val |= rk818_bat_read(CAL_OFFSET_REGH) << 8;
+	val |= rk818_bat_read(di, IOFFSET_REGL) << 0;
+	val |= rk818_bat_read(di, IOFFSET_REGH) << 8;
 
-	DBG("<%s>. coffset: 0x%x\n", __func__, val);
+	DBG("<%s>. ioffset: 0x%x\n", __func__, val);
 	return val;
 }
 
-static void rk818_bat_set_coffset(struct battery_info *di, int val)
+static int rk818_bat_get_coffset(struct battery_priv *di)
 {
-	u8 buf;
+	int val = 0;
 
-	buf = (val >> 0) & 0xff;
-	rk818_bat_write(CAL_OFFSET_REGL, buf);
-	buf = (val >> 8) & 0xff;
-	rk818_bat_write(CAL_OFFSET_REGH, buf);
+	val |= rk818_bat_read(di, CAL_OFFSET_REGL) << 0;
+	val |= rk818_bat_read(di, CAL_OFFSET_REGH) << 8;
 
-	DBG("<%s>. set coffset: 0x%x\n", __func__, val);
+	DBG("<%s>. coffset: 0x%x\n", __func__, val);
+	return val;
 }
 
-static int rk818_bat_get_ioffset(struct battery_info *di)
+static void rk818_bat_set_coffset(struct battery_priv *di, int val)
 {
-	int val = 0;
+	u8 buf;
 
-	val |= rk818_bat_read(IOFFSET_REGL) << 0;
-	val |= rk818_bat_read(IOFFSET_REGH) << 8;
+	buf = (val >> 0) & 0xff;
+	rk818_bat_write(di, CAL_OFFSET_REGL, buf);
+	buf = (val >> 8) & 0xff;
+	rk818_bat_write(di, CAL_OFFSET_REGH, buf);
 
-	DBG("<%s>. ioffset: 0x%x\n", __func__, val);
-	return val;
+	DBG("<%s>. set coffset: 0x%x\n", __func__, val);
 }
 
-static void rk818_bat_init_coffset(struct battery_info *di)
+static void rk818_bat_init_coffset(struct battery_priv *di)
 {
 	int ioffset, coffset;
 
 	ioffset = rk818_bat_get_ioffset(di);
 
-	di->poffset = rk818_bat_read(POFFSET_REG);
+	di->poffset = rk818_bat_read(di, POFFSET_REG);
 	if (!di->poffset)
 		di->poffset = DEFAULT_POFFSET;
 
@@ -320,7 +353,7 @@ static void rk818_bat_init_coffset(struct battery_info *di)
 	rk818_bat_set_coffset(di, coffset);
 }
 
-static void rk818_bat_init_voltage_kb(struct battery_info *di)
+static void rk818_bat_init_voltage_kb(struct battery_priv *di)
 {
 	int vcalib0, vcalib1;
 
@@ -331,23 +364,23 @@ static void rk818_bat_init_voltage_kb(struct battery_info *di)
 	DBG("%s. vk=%d, vb=%d\n", __func__, di->voltage_k, di->voltage_b);
 }
 
-static int rk818_bat_get_ocv_voltage(struct battery_info *di)
+static int rk818_bat_get_ocv_voltage(struct battery_priv *di)
 {
 	int vol, val = 0;
 
-	val |= rk818_bat_read(BAT_OCV_REGL) << 0;
-	val |= rk818_bat_read(BAT_OCV_REGH) << 8;
+	val |= rk818_bat_read(di, BAT_OCV_REGL) << 0;
+	val |= rk818_bat_read(di, BAT_OCV_REGH) << 8;
 	vol = di->voltage_k * val / 1000 + di->voltage_b;
 
 	return vol;
 }
 
-static int rk818_bat_get_avg_current(struct battery_info *di)
+static int rk818_bat_get_avg_current(struct battery_priv *di)
 {
 	int val = 0;
 
-	val |= rk818_bat_read(BAT_CUR_AVG_REGL) << 0;
-	val |= rk818_bat_read(BAT_CUR_AVG_REGH) << 8;
+	val |= rk818_bat_read(di, BAT_CUR_AVG_REGL) << 0;
+	val |= rk818_bat_read(di, BAT_CUR_AVG_REGH) << 8;
 
 	if (val & 0x800)
 		val -= 4096;
@@ -356,29 +389,63 @@ static int rk818_bat_get_avg_current(struct battery_info *di)
 	return val;
 }
 
-static int rk818_bat_get_avg_voltage(struct battery_info *di)
+static int rk818_bat_get_avg_voltage(struct battery_priv *di)
 {
 	int vol, val = 0;
 
-	val |= rk818_bat_read(BAT_VOL_REGL) << 0;
-	val |= rk818_bat_read(BAT_VOL_REGH) << 8;
+	val |= rk818_bat_read(di, BAT_VOL_REGL) << 0;
+	val |= rk818_bat_read(di, BAT_VOL_REGH) << 8;
 	vol = di->voltage_k * val / 1000 + di->voltage_b;
 
 	return vol;
 }
 
-static int rk818_bat_get_est_voltage(struct battery_info *di)
+static int rk818_bat_get_est_voltage(struct battery_priv *di)
 {
+	struct charge_animation_pdata *pdata = NULL;
+	struct udevice *dev;
 	int est_vol, vol, curr;
+	int plugin, timeout = 0;
+	int low_power_voltage = 0;
+
+	uclass_find_first_device(UCLASS_CHARGE_DISPLAY, &dev);
+	pdata = dev_get_platdata(dev);
+	low_power_voltage = pdata->low_power_voltage;
 
 	vol = rk818_bat_get_avg_voltage(di);
 	curr = rk818_bat_get_avg_current(di);
+	plugin = rk818_bat_read(di, VB_MON_REG) & PLUG_IN_STS ? 1 : 0;
+	if (di->is_first_power_on || (!plugin && curr >= 0) || (plugin && curr <= 0)) {
+		DBG("%s: curr=%d, plugin=%d, first_on=%d\n",
+		    __func__, curr, plugin, di->is_first_power_on);
+		curr = 0;
+	}
 	est_vol = vol - (di->bat_res * curr / 1000);
 
-	return (est_vol > 2800) ? est_vol : vol;
+	while ((est_vol <= low_power_voltage) &&
+	       (vol <= low_power_voltage)) {
+		mdelay(100);
+
+		/* Update */
+		vol = rk818_bat_get_avg_voltage(di);
+		curr = rk818_bat_get_avg_current(di);
+		plugin = rk818_bat_read(di, VB_MON_REG) & PLUG_IN_STS;
+		if (di->is_first_power_on || (!plugin && curr >= 0) || (plugin && curr <= 0)) {
+			DBG("%s: while curr=%d, plugin=%d, first_on=%d\n",
+			    __func__, curr, plugin, di->is_first_power_on);
+			curr = 0;
+		}
+		est_vol = vol - (di->bat_res * curr / 1000);
+
+		timeout++;
+		if (timeout >= 5)
+			break;
+	}
+
+	return (est_vol >= low_power_voltage) ? est_vol : vol;
 }
 
-static u8 rk818_bat_finish_ma(struct battery_info *di, int fcc)
+static u8 rk818_bat_finish_ma(struct battery_priv *di, int fcc)
 {
 	u8 ma;
 
@@ -396,7 +463,7 @@ static u8 rk818_bat_finish_ma(struct battery_info *di, int fcc)
 	return ma;
 }
 
-static void rk818_bat_select_chrg_cv(struct battery_info *di)
+static void rk818_bat_select_chrg_cv(struct battery_priv *di)
 {
 	int index, chrg_vol_sel, chrg_cur_sel, chrg_cur_input;
 
@@ -432,7 +499,7 @@ static void rk818_bat_select_chrg_cv(struct battery_info *di)
 	    __func__, di->chrg_vol_sel, di->chrg_cur_input, di->chrg_cur_sel);
 }
 
-static void rk818_bat_init_chrg_config(struct battery_info *di)
+static void rk818_bat_init_chrg_config(struct battery_priv *di)
 {
 	u8 chrg_ctrl1, usb_ctrl, chrg_ctrl2, chrg_ctrl3;
 	u8 sup_sts, ggcon, thermal, finish_ma;
@@ -440,12 +507,12 @@ static void rk818_bat_init_chrg_config(struct battery_info *di)
 	rk818_bat_select_chrg_cv(di);
 	finish_ma = rk818_bat_finish_ma(di, di->fcc);
 
-	ggcon = rk818_bat_read(GGCON_REG);
-	sup_sts = rk818_bat_read(SUP_STS_REG);
-	usb_ctrl = rk818_bat_read(USB_CTRL_REG);
-	thermal = rk818_bat_read(THERMAL_REG);
-	chrg_ctrl2 = rk818_bat_read(CHRG_CTRL_REG2);
-	chrg_ctrl3 = rk818_bat_read(CHRG_CTRL_REG3);
+	ggcon = rk818_bat_read(di, GGCON_REG);
+	sup_sts = rk818_bat_read(di, SUP_STS_REG);
+	usb_ctrl = rk818_bat_read(di, USB_CTRL_REG);
+	thermal = rk818_bat_read(di, THERMAL_REG);
+	chrg_ctrl2 = rk818_bat_read(di, CHRG_CTRL_REG2);
+	chrg_ctrl3 = rk818_bat_read(di, CHRG_CTRL_REG3);
 
 	/* set charge current and voltage */
 	usb_ctrl &= ~INPUT_CUR_MSK;
@@ -473,13 +540,13 @@ static void rk818_bat_init_chrg_config(struct battery_info *di)
 	/* adc current mode */
 	ggcon |= ADC_CUR_MODE;
 
-	rk818_bat_write(GGCON_REG, ggcon);
-	rk818_bat_write(SUP_STS_REG, sup_sts);
-	rk818_bat_write(USB_CTRL_REG, usb_ctrl);
-	rk818_bat_write(THERMAL_REG, thermal);
-	rk818_bat_write(CHRG_CTRL_REG1, chrg_ctrl1);
-	rk818_bat_write(CHRG_CTRL_REG2, chrg_ctrl2);
-	rk818_bat_write(CHRG_CTRL_REG3, chrg_ctrl3);
+	rk818_bat_write(di, GGCON_REG, ggcon);
+	rk818_bat_write(di, SUP_STS_REG, sup_sts);
+	rk818_bat_write(di, USB_CTRL_REG, usb_ctrl);
+	rk818_bat_write(di, THERMAL_REG, thermal);
+	rk818_bat_write(di, CHRG_CTRL_REG1, chrg_ctrl1);
+	rk818_bat_write(di, CHRG_CTRL_REG2, chrg_ctrl2);
+	rk818_bat_write(di, CHRG_CTRL_REG3, chrg_ctrl3);
 }
 
 static u32 interpolate(int value, u32 *table, int size)
@@ -529,7 +596,7 @@ static int32_t ab_div_c(u32 a, u32 b, u32 c)
 	return ans;
 }
 
-static int rk818_bat_vol_to_cap(struct battery_info *di, int voltage)
+static int rk818_bat_vol_to_cap(struct battery_priv *di, int voltage)
 {
 	u32 *ocv_table, tmp;
 	int ocv_size, ocv_cap;
@@ -542,7 +609,7 @@ static int rk818_bat_vol_to_cap(struct battery_info *di, int voltage)
 	return ocv_cap;
 }
 
-static int rk818_bat_vol_to_soc(struct battery_info *di, int voltage)
+static int rk818_bat_vol_to_soc(struct battery_priv *di, int voltage)
 {
 	u32 *ocv_table, tmp;
 	int ocv_size, ocv_soc;
@@ -555,40 +622,40 @@ static int rk818_bat_vol_to_soc(struct battery_info *di, int voltage)
 	return ocv_soc;
 }
 
-static int rk818_bat_get_prev_cap(struct battery_info *di)
+static int rk818_bat_get_prev_cap(struct battery_priv *di)
 {
 	int val = 0;
 
-	val |= rk818_bat_read(REMAIN_CAP_REG3) << 24;
-	val |= rk818_bat_read(REMAIN_CAP_REG2) << 16;
-	val |= rk818_bat_read(REMAIN_CAP_REG1) << 8;
-	val |= rk818_bat_read(REMAIN_CAP_REG0) << 0;
+	val |= rk818_bat_read(di, REMAIN_CAP_REG3) << 24;
+	val |= rk818_bat_read(di, REMAIN_CAP_REG2) << 16;
+	val |= rk818_bat_read(di, REMAIN_CAP_REG1) << 8;
+	val |= rk818_bat_read(di, REMAIN_CAP_REG0) << 0;
 
 	return val;
 }
 
-static void rk818_bat_save_fcc(struct battery_info *di, u32 cap)
+static void rk818_bat_save_fcc(struct battery_priv *di, u32 cap)
 {
 	u8 buf;
 
 	buf = (cap >> 24) & 0xff;
-	rk818_bat_write(NEW_FCC_REG3, buf);
+	rk818_bat_write(di, NEW_FCC_REG3, buf);
 	buf = (cap >> 16) & 0xff;
-	rk818_bat_write(NEW_FCC_REG2, buf);
+	rk818_bat_write(di, NEW_FCC_REG2, buf);
 	buf = (cap >> 8) & 0xff;
-	rk818_bat_write(NEW_FCC_REG1, buf);
+	rk818_bat_write(di, NEW_FCC_REG1, buf);
 	buf = (cap >> 0) & 0xff;
-	rk818_bat_write(NEW_FCC_REG0, buf);
+	rk818_bat_write(di, NEW_FCC_REG0, buf);
 }
 
-static int rk818_bat_get_fcc(struct battery_info *di)
+static int rk818_bat_get_fcc(struct battery_priv *di)
 {
 	int val = 0;
 
-	val |= rk818_bat_read(NEW_FCC_REG3) << 24;
-	val |= rk818_bat_read(NEW_FCC_REG2) << 16;
-	val |= rk818_bat_read(NEW_FCC_REG1) << 8;
-	val |= rk818_bat_read(NEW_FCC_REG0) << 0;
+	val |= rk818_bat_read(di, NEW_FCC_REG3) << 24;
+	val |= rk818_bat_read(di, NEW_FCC_REG2) << 16;
+	val |= rk818_bat_read(di, NEW_FCC_REG1) << 8;
+	val |= rk818_bat_read(di, NEW_FCC_REG0) << 0;
 
 	if (val < MIN_FCC)
 		val = di->design_cap;
@@ -598,31 +665,53 @@ static int rk818_bat_get_fcc(struct battery_info *di)
 	return val;
 }
 
-static int rk818_bat_get_pwroff_min(struct battery_info *di)
+static int rk818_bat_get_pwroff_min(struct battery_priv *di)
 {
 	u8 cur, last;
 
-	cur = rk818_bat_read(NON_ACT_TIMER_CNT_REG);
-	last = rk818_bat_read(NON_ACT_TIMER_CNT_SAVE_REG);
-	rk818_bat_write(NON_ACT_TIMER_CNT_SAVE_REG, cur);
+	cur = rk818_bat_read(di, NON_ACT_TIMER_CNT_REG);
+	last = rk818_bat_read(di, NON_ACT_TIMER_CNT_SAVE_REG);
+	rk818_bat_write(di, NON_ACT_TIMER_CNT_SAVE_REG, cur);
 
 	return (cur != last) ? cur : 0;
 }
 
-static int rk818_bat_get_coulomb_cap(struct battery_info *di)
+static int rk818_bat_get_coulomb_cap(struct battery_priv *di)
 {
 	int val = 0;
 
-	val |= rk818_bat_read(GASCNT_REG3) << 24;
-	val |= rk818_bat_read(GASCNT_REG2) << 16;
-	val |= rk818_bat_read(GASCNT_REG1) << 8;
-	val |= rk818_bat_read(GASCNT_REG0) << 0;
+	val |= rk818_bat_read(di, GASCNT_REG3) << 24;
+	val |= rk818_bat_read(di, GASCNT_REG2) << 16;
+	val |= rk818_bat_read(di, GASCNT_REG1) << 8;
+	val |= rk818_bat_read(di, GASCNT_REG0) << 0;
 	val /= 2390;
 
 	return val * di->res_div;
 }
 
-static void rk818_bat_init_capacity(struct battery_info *di, u32 capacity)
+static void rk818_bat_save_cap(struct battery_priv *di, int cap)
+{
+	u8 buf;
+	static int old_cap;
+
+	if (old_cap == cap)
+		return;
+
+	if (cap >= di->qmax)
+		cap = di->qmax;
+
+	old_cap = cap;
+	buf = (cap >> 24) & 0xff;
+	rk818_bat_write(di, REMAIN_CAP_REG3, buf);
+	buf = (cap >> 16) & 0xff;
+	rk818_bat_write(di, REMAIN_CAP_REG2, buf);
+	buf = (cap >> 8) & 0xff;
+	rk818_bat_write(di, REMAIN_CAP_REG1, buf);
+	buf = (cap >> 0) & 0xff;
+	rk818_bat_write(di, REMAIN_CAP_REG0, buf);
+}
+
+static void rk818_bat_init_capacity(struct battery_priv *di, u32 capacity)
 {
 	u8 buf;
 	u32 cap;
@@ -634,30 +723,31 @@ static void rk818_bat_init_capacity(struct battery_info *di, u32 capacity)
 
 	cap = capacity * 2390 / di->res_div;
 	buf = (cap >> 24) & 0xff;
-	rk818_bat_write(GASCNT_CAL_REG3, buf);
+	rk818_bat_write(di, GASCNT_CAL_REG3, buf);
 	buf = (cap >> 16) & 0xff;
-	rk818_bat_write(GASCNT_CAL_REG2, buf);
+	rk818_bat_write(di, GASCNT_CAL_REG2, buf);
 	buf = (cap >> 8) & 0xff;
-	rk818_bat_write(GASCNT_CAL_REG1, buf);
+	rk818_bat_write(di, GASCNT_CAL_REG1, buf);
 	buf = (cap >> 0) & 0xff;
-	rk818_bat_write(GASCNT_CAL_REG0, buf);
+	rk818_bat_write(di, GASCNT_CAL_REG0, buf);
 
 	di->remain_cap = rk818_bat_get_coulomb_cap(di);
 	di->rsoc = rk818_bat_get_rsoc(di);
+	rk818_bat_save_cap(di, di->remain_cap);
 }
 
-static bool is_rk818_bat_ocv_valid(struct battery_info *di)
+static bool is_rk818_bat_ocv_valid(struct battery_priv *di)
 {
 	return di->pwroff_min >= 30 ? true : false;
 }
 
-static int rk818_bat_get_usb_state(struct battery_info *di)
+static int rk818_bat_get_usb_state(struct battery_priv *di)
 {
 	int charger_type;
 
 	switch (rk818_bat_dwc_otg_check_dpdm()) {
 	case 0:
-		if ((rk818_bat_read(VB_MON_REG) & PLUG_IN_STS) != 0)
+		if ((rk818_bat_read(di, VB_MON_REG) & PLUG_IN_STS) != 0)
 			charger_type = DC_CHARGER;
 		else
 			charger_type = NO_CHARGER;
@@ -676,63 +766,81 @@ static int rk818_bat_get_usb_state(struct battery_info *di)
 	return charger_type;
 }
 
-static void rk818_bat_clr_initialized_state(struct battery_info *di)
+static void rk818_bat_clr_initialized_state(struct battery_priv *di)
 {
 	u8 val;
 
-	val = rk818_bat_read(MISC_MARK_REG);
+	val = rk818_bat_read(di, MISC_MARK_REG);
 	val &= ~FG_INIT;
-	rk818_bat_write(MISC_MARK_REG, val);
+	rk818_bat_write(di, MISC_MARK_REG, val);
 }
 
-static bool rk818_bat_is_initialized(struct battery_info *di)
+static bool rk818_bat_is_initialized(struct battery_priv *di)
 {
-	return (rk818_bat_read(MISC_MARK_REG) & FG_INIT) ? true : false;
+	return (rk818_bat_read(di, MISC_MARK_REG) & FG_INIT) ? true : false;
 }
 
-static void rk818_bat_set_initialized_state(struct battery_info *di)
+static void rk818_bat_set_initialized_state(struct battery_priv *di)
 {
 	u8 val;
 
-	val = rk818_bat_read(MISC_MARK_REG);
+	val = rk818_bat_read(di, MISC_MARK_REG);
 	if (rk818_bat_get_usb_state(di) != NO_CHARGER) {
 		val |= FG_INIT;
-		rk818_bat_write(MISC_MARK_REG, val);
-		BAT_INFO("fuel gauge initialized... estv=%d, ch=%d\n",
+		rk818_bat_write(di, MISC_MARK_REG, val);
+		BAT_INFO("initialized... estv=%d, ch=%d\n",
 			 rk818_bat_get_est_voltage(di),
 			 rk818_bat_get_usb_state(di));
 	}
 }
 
-static void rk818_bat_first_pwron(struct battery_info *di)
+static void rk818_bat_save_dsoc(struct  battery_priv *di, u8 save_soc)
 {
-	int ocv_vol;
+	static int old_soc = -1;
+
+	if (old_soc != save_soc) {
+		old_soc = save_soc;
+		rk818_bat_write(di, SOC_REG, save_soc);
+	}
+}
+
+static void rk818_bat_first_pwron(struct battery_priv *di)
+{
+	int ocv_vol, vol, curr;
 
 	rk818_bat_save_fcc(di, di->design_cap);
 	ocv_vol = rk818_bat_get_ocv_voltage(di);
+	curr = rk818_bat_get_avg_current(di);
 	di->fcc = rk818_bat_get_fcc(di);
 	di->nac = rk818_bat_vol_to_cap(di, ocv_vol);
 	di->rsoc = rk818_bat_vol_to_soc(di, ocv_vol);
 	di->dsoc = di->rsoc;
+	vol = rk818_bat_get_avg_voltage(di);
+	if (ocv_vol < vol) {
+		BAT_INFO("%s: ocv voltage %d\n", __func__, ocv_vol);
+		ocv_vol = vol;
+	}
+	rk818_bat_save_dsoc(di, di->dsoc);
 	rk818_bat_init_capacity(di, di->nac);
 	rk818_bat_set_initialized_state(di);
-	BAT_INFO("first power on: soc=%d\n", di->dsoc);
+	BAT_INFO("first power on: soc=%d, Vavg=%d, Vocv=%d, c=%d, ch=%d, fcc=%d\n",
+		 di->dsoc, vol, ocv_vol, curr, rk818_bat_get_usb_state(di), di->fcc);
 }
 
-static u8 rk818_bat_get_halt_cnt(struct battery_info *di)
+static u8 rk818_bat_get_halt_cnt(struct battery_priv *di)
 {
-	return rk818_bat_read(HALT_CNT_REG);
+	return rk818_bat_read(di, HALT_CNT_REG);
 }
 
-static void rk818_bat_inc_halt_cnt(struct battery_info *di)
+static void rk818_bat_inc_halt_cnt(struct battery_priv *di)
 {
 	u8 cnt;
 
-	cnt = rk818_bat_read(HALT_CNT_REG);
-	rk818_bat_write(HALT_CNT_REG, ++cnt);
+	cnt = rk818_bat_read(di, HALT_CNT_REG);
+	rk818_bat_write(di, HALT_CNT_REG, ++cnt);
 }
 
-static bool is_rk818_bat_last_halt(struct battery_info *di)
+static bool is_rk818_bat_last_halt(struct battery_priv *di)
 {
 	int pre_cap = rk818_bat_get_prev_cap(di);
 	int now_cap = rk818_bat_get_coulomb_cap(di);
@@ -746,14 +854,16 @@ static bool is_rk818_bat_last_halt(struct battery_info *di)
 	}
 }
 
-static void rk818_bat_not_first_pwron(struct battery_info *di)
+static void rk818_bat_not_first_pwron(struct battery_priv *di)
 {
-	int pre_soc, pre_cap, ocv_cap, ocv_soc, ocv_vol, now_cap;
+	int pre_soc, pre_cap, ocv_cap = 0, ocv_soc = 0, ocv_vol, now_cap;
+	int voltage;
 
 	di->fcc = rk818_bat_get_fcc(di);
 	pre_soc = rk818_bat_get_dsoc(di);
 	pre_cap = rk818_bat_get_prev_cap(di);
 	now_cap = rk818_bat_get_coulomb_cap(di);
+	voltage = rk818_bat_get_est_voltage(di);
 	di->pwr_dsoc = pre_soc;
 	di->pwr_rsoc = (now_cap + di->fcc / 200) * 100 / DIV(di->fcc);
 	di->is_halt = is_rk818_bat_last_halt(di);
@@ -783,44 +893,52 @@ static void rk818_bat_not_first_pwron(struct battery_info *di)
 			di->is_max_soc_offset = true;
 		}
 		BAT_INFO("OCV calib: cap=%d, rsoc=%d\n", ocv_cap, ocv_soc);
+	} else if ((pre_soc == 0) && (voltage >= ZERO_MIN_VOLTAGE)) {
+		if (now_cap < 0)
+			now_cap = 0;
+		rk818_bat_init_capacity(di, now_cap);
+		pre_cap = di->remain_cap;
+		pre_soc = di->rsoc;
+		BAT_INFO("zero calib: voltage=%d\n", voltage);
 	}
 finish:
 	di->dsoc = pre_soc;
 	di->nac = pre_cap;
 	rk818_bat_init_capacity(di, di->nac);
+	rk818_bat_save_dsoc(di, di->dsoc);
 	rk818_bat_set_initialized_state(di);
-	BAT_INFO("dl=%d rl=%d cap=%d m=%d v=%d ov=%d c=%d pl=%d ch=%d Ver=%s\n",
+	BAT_INFO("dl=%d rl=%d cap=%d m=%d v=%d ov=%d c=%d pl=%d ch=%d fcc=%d, Ver=%s\n",
 		 di->dsoc, di->rsoc, di->remain_cap, di->pwroff_min,
 		 rk818_bat_get_avg_voltage(di), rk818_bat_get_ocv_voltage(di),
 		 rk818_bat_get_avg_current(di), rk818_bat_get_dsoc(di),
-		 rk818_bat_get_usb_state(di), DRIVER_VERSION
+		 rk818_bat_get_usb_state(di), di->fcc, DRIVER_VERSION
 		 );
 }
 
-static bool is_rk818_bat_first_poweron(struct battery_info *di)
+static bool is_rk818_bat_first_poweron(struct battery_priv *di)
 {
 	u8 buf;
 
-	buf = rk818_bat_read(GGSTS_REG);
+	buf = rk818_bat_read(di, GGSTS_REG);
 	if (buf & BAT_CON) {
 		buf &= ~BAT_CON;
-		rk818_bat_write(GGSTS_REG, buf);
+		rk818_bat_write(di, GGSTS_REG, buf);
 		return true;
 	}
 
 	return false;
 }
 
-static bool rk818_bat_ocv_sw_reset(struct battery_info *di)
+static bool rk818_bat_ocv_sw_reset(struct battery_priv *di)
 {
 	u8 buf;
 
-	buf = rk818_bat_read(MISC_MARK_REG);
+	buf = rk818_bat_read(di, MISC_MARK_REG);
 	if (((buf & FG_RESET_LATE) && di->pwroff_min >= 30) ||
 	    (buf & FG_RESET_NOW)) {
 		buf &= ~FG_RESET_LATE;
 		buf &= ~FG_RESET_NOW;
-		rk818_bat_write(MISC_MARK_REG, buf);
+		rk818_bat_write(di, MISC_MARK_REG, buf);
 		BAT_INFO("manual reset fuel gauge\n");
 		return true;
 	} else {
@@ -828,10 +946,42 @@ static bool rk818_bat_ocv_sw_reset(struct battery_info *di)
 	}
 }
 
-void rk818_bat_init_rsoc(struct battery_info *di)
+static void rk818_bat_init_rsoc(struct battery_priv *di)
 {
-	di->pwroff_min = rk818_bat_get_pwroff_min(di);
+	int charger, voltage, initialize = 0;
+	struct charge_animation_pdata *pdata;
+	struct udevice *dev;
+
+	uclass_find_first_device(UCLASS_CHARGE_DISPLAY, &dev);
+	pdata = dev_get_platdata(dev);
+
+	charger = rk818_bat_get_usb_state(di);
+	voltage = rk818_bat_get_est_voltage(di);
 	di->is_first_power_on = is_rk818_bat_first_poweron(di);
+
+	/*
+	 * Do rsoc initialization only when:
+	 *
+	 * 1. first power on;
+	 * 2. charger online + voltage lower than low_power_voltage;
+	 * 3. charger online + uboot_charge enabled.
+	 * 4. dsoc is 0 but voltage high, obvious wrong.
+	 */
+	if (di->is_first_power_on) {
+		initialize = 1;
+	} else if ((di->dsoc == 0) && (voltage >= ZERO_MIN_VOLTAGE)) {
+		initialize = 1;
+	} else if (charger != NO_CHARGER) {
+		if (voltage < pdata->low_power_voltage + 50)
+			initialize = 1;
+		else if (pdata->uboot_charge)
+			initialize = 1;
+	}
+
+	if (!initialize)
+		return;
+
+	di->pwroff_min = rk818_bat_get_pwroff_min(di);
 	di->is_sw_reset = rk818_bat_ocv_sw_reset(di);
 
 	if (di->is_first_power_on || di->is_sw_reset)
@@ -840,7 +990,7 @@ void rk818_bat_init_rsoc(struct battery_info *di)
 		rk818_bat_not_first_pwron(di);
 }
 
-static int rk818_bat_calc_linek(struct battery_info *di)
+static int rk818_bat_calc_linek(struct battery_priv *di)
 {
 	int linek, diff, delta;
 
@@ -869,7 +1019,44 @@ static int rk818_bat_calc_linek(struct battery_info *di)
 	return linek;
 }
 
-static void rk818_bat_init_ts2(struct battery_info *di)
+static void rk818_bat_init_ts1(struct battery_priv *di)
+{
+	u8 buf;
+	u32 *ntc_table = di->ntc_table;
+
+	if (!di->ntc_size)
+		return;
+
+	/* select uA */
+	buf = rk818_bat_read(di, TS_CTRL_REG);
+	buf &= ~ADC_CUR_MSK;
+	/* chose suitable UA for temperature detect */
+	if (ntc_table[0] < NTC_80UA_MAX_MEASURE) {
+		di->ntc_factor = NTC_CALC_FACTOR_80UA;
+		di->ntc_uA = 80;
+		buf |= ADC_CUR_80UA;
+	} else if (ntc_table[0] < NTC_60UA_MAX_MEASURE) {
+		di->ntc_factor = NTC_CALC_FACTOR_60UA;
+		di->ntc_uA = 60;
+		buf |= ADC_CUR_60UA;
+	} else if (ntc_table[0] < NTC_40UA_MAX_MEASURE) {
+		di->ntc_factor = NTC_CALC_FACTOR_40UA;
+		di->ntc_uA = 40;
+		buf |= ADC_CUR_40UA;
+	} else {
+		di->ntc_factor = NTC_CALC_FACTOR_20UA;
+		di->ntc_uA = 20;
+		buf |= ADC_CUR_20UA;
+	}
+	rk818_bat_write(di, TS_CTRL_REG, buf);
+
+	/* ADC_TS1_EN */
+	buf = rk818_bat_read(di, ADC_CTRL_REG);
+	buf |= ADC_TS1_EN;
+	rk818_bat_write(di, ADC_CTRL_REG, buf);
+}
+
+static void rk818_bat_init_ts2(struct battery_priv *di)
 {
 	u8 buf;
 
@@ -877,37 +1064,32 @@ static void rk818_bat_init_ts2(struct battery_info *di)
 		return;
 
 	/* TS2 adc mode */
-	buf = rk818_bat_read(TS_CTRL_REG);
+	buf = rk818_bat_read(di, TS_CTRL_REG);
 	buf |= TS2_ADC_MODE;
-	rk818_bat_write(TS_CTRL_REG, buf);
+	rk818_bat_write(di, TS_CTRL_REG, buf);
 
 	/* TS2 adc enable */
-	buf = rk818_bat_read(ADC_CTRL_REG);
+	buf = rk818_bat_read(di, ADC_CTRL_REG);
 	buf |= ADC_TS2_EN;
-	rk818_bat_write(ADC_CTRL_REG, buf);
+	rk818_bat_write(di, ADC_CTRL_REG, buf);
 }
 
-static int rk818_fg_init(struct battery_info *di)
+static int rk818_fg_init(struct battery_priv *di)
 {
+	int cap;
+
 	rk818_bat_enable_gauge(di);
 	rk818_bat_init_voltage_kb(di);
 	rk818_bat_init_coffset(di);
+	rk818_bat_init_ts1(di);
 	rk818_bat_init_ts2(di);
 	rk818_bat_clr_initialized_state(di);
+	cap = rk818_bat_get_coulomb_cap(di);
 	di->dsoc = rk818_bat_get_dsoc(di);
+	di->rsoc = (cap + di->fcc / 200) * 100 / DIV(di->fcc);
 
-	/*
-	 * it's better to init fg in kernel,
-	 * so avoid init in uboot as far as possible
-	 */
-	if (rk818_bat_get_usb_state(di) != NO_CHARGER) {
-		if (rk818_bat_get_est_voltage(di) < CONFIG_SCREEN_ON_VOL_THRESD)
-			rk818_bat_init_rsoc(di);
-#ifdef CONFIG_UBOOT_CHARGE
-		else
-			rk818_bat_init_rsoc(di);
-#endif
-	}
+	/* dsoc and rsoc maybe initialized here */
+	rk818_bat_init_rsoc(di);
 
 	rk818_bat_init_chrg_config(di);
 	di->voltage_avg = rk818_bat_get_avg_voltage(di);
@@ -918,30 +1100,34 @@ static int rk818_fg_init(struct battery_info *di)
 	di->term_sig_base = get_timer(0);
 	di->pwr_vol = di->voltage_avg;
 
+	DBG("%s: dsoc=%d, rsoc=%d, v=%d, ov=%d, c=%d, estv=%d\n",
+	    __func__, di->dsoc, di->rsoc, di->voltage_avg, di->voltage_ocv,
+	    di->current_avg, rk818_bat_get_est_voltage(di));
+
 	return 0;
 }
 
-static bool is_rk818_bat_exist(struct  battery_info *di)
+static bool is_rk818_bat_exist(struct  battery_priv *di)
 {
-	return (rk818_bat_read(SUP_STS_REG) & BAT_EXS) ? true : false;
+	return (rk818_bat_read(di, SUP_STS_REG) & BAT_EXS) ? true : false;
 }
 
-static void rk818_bat_set_current(int input_current)
+static void rk818_bat_set_current(struct battery_priv *di, int input_current)
 {
 	u8 usb_ctrl;
 
-	usb_ctrl = rk818_bat_read(USB_CTRL_REG);
+	usb_ctrl = rk818_bat_read(di, USB_CTRL_REG);
 	usb_ctrl &= ~INPUT_CUR_MSK;
 	usb_ctrl |= (input_current);
-	rk818_bat_write(USB_CTRL_REG, usb_ctrl);
+	rk818_bat_write(di, USB_CTRL_REG, usb_ctrl);
 }
 
-static int rk818_bat_get_ts2_voltage(struct battery_info *di)
+static int rk818_bat_get_ts2_voltage(struct battery_priv *di)
 {
 	u32 val = 0;
 
-	val |= rk818_bat_read(RK818_TS2_ADC_REGL) << 0;
-	val |= rk818_bat_read(RK818_TS2_ADC_REGH) << 8;
+	val |= rk818_bat_read(di, RK818_TS2_ADC_REGL) << 0;
+	val |= rk818_bat_read(di, RK818_TS2_ADC_REGH) << 8;
 
 	/* refer voltage 2.2V, 12bit adc accuracy */
 	val = val * 2200 * di->ts2_vol_multi / 4095;
@@ -950,11 +1136,11 @@ static int rk818_bat_get_ts2_voltage(struct battery_info *di)
 	return val;
 }
 
-static void rk818_bat_ts2_update_current(struct battery_info *di)
+static void rk818_bat_ts2_update_current(struct battery_priv *di)
 {
 	int ts2_vol, input_current, invalid_cnt = 0, confirm_cnt = 0;
 
-	rk818_bat_set_current(ILIM_450MA);
+	rk818_bat_set_current(di, ILIM_450MA);
 	input_current = ILIM_850MA;
 	while (input_current < di->chrg_cur_input) {
 		mdelay(100);
@@ -970,7 +1156,7 @@ static void rk818_bat_ts2_update_current(struct battery_info *di)
 
 			/* if fail, set max input current as default */
 			input_current = di->chrg_cur_input;
-			rk818_bat_set_current(input_current);
+			rk818_bat_set_current(di, input_current);
 			break;
 		}
 
@@ -978,7 +1164,7 @@ static void rk818_bat_ts2_update_current(struct battery_info *di)
 		if (ts2_vol >= TS2_THRESHOLD_VOL) {
 			/* update input current */
 			input_current++;
-			rk818_bat_set_current(input_current);
+			rk818_bat_set_current(di, input_current);
 			DBG("********* input=%d\n",
 			    CHRG_CUR_INPUT[input_current & 0x0f]);
 		} else {
@@ -995,7 +1181,7 @@ static void rk818_bat_ts2_update_current(struct battery_info *di)
 			if (input_current == ILIM_80MA ||
 			    input_current < 0)
 				input_current = ILIM_450MA;
-			rk818_bat_set_current(input_current);
+			rk818_bat_set_current(di, input_current);
 			break;
 		}
 	}
@@ -1004,31 +1190,34 @@ static void rk818_bat_ts2_update_current(struct battery_info *di)
 		 CHRG_CUR_INPUT[input_current]);
 }
 
-static void rk818_bat_charger_setting(struct battery_info *di, int charger)
+static void rk818_bat_charger_setting(struct battery_priv *di, int charger)
 {
 	static u8 old_charger = UNDEF_CHARGER;
+	struct charge_animation_pdata *pdata;
+	struct udevice *dev;
+	int low_power_voltage = 0;
+
+	uclass_find_first_device(UCLASS_CHARGE_DISPLAY, &dev);
+	pdata = dev_get_platdata(dev);
+	low_power_voltage = pdata->low_power_voltage;
 
 	/* charger changed */
 	if (old_charger != charger) {
 		if (charger == NO_CHARGER) {
 			BAT_INFO("NO_CHARGER\n");
-			rk818_bat_set_current(ILIM_450MA);
+			rk818_bat_set_current(di, ILIM_450MA);
 		} else if (charger == USB_CHARGER) {
 			BAT_INFO("USB_CHARGER\n");
-			rk818_bat_set_current(ILIM_450MA);
+			rk818_bat_set_current(di, ILIM_450MA);
 		} else if (charger == DC_CHARGER || charger == AC_CHARGER) {
-#ifdef CONFIG_UBOOT_CHARGE
-			if (di->ts2_vol_multi) {
-#else
-			if ((rk818_bat_get_est_voltage(di) <
-			     CONFIG_SCREEN_ON_VOL_THRESD) &&
-			    (di->ts2_vol_multi)) {
-#endif
+			if (pdata->uboot_charge && di->ts2_vol_multi) {
+				rk818_bat_ts2_update_current(di);
+			} else if ((rk818_bat_get_est_voltage(di) < low_power_voltage) &&
+				   (di->ts2_vol_multi)) {
 				rk818_bat_ts2_update_current(di);
 			} else {
-				rk818_bat_set_current(di->chrg_cur_input);
-				BAT_INFO("DC_CHARGER charge_cur_input=%d\n",
-					 CHRG_CUR_INPUT[di->chrg_cur_input]);
+				rk818_bat_set_current(di, di->chrg_cur_input);
+				BAT_INFO("DC_CHARGER\n");
 			}
 		} else {
 			BAT_INFO("charger setting error %d\n", charger);
@@ -1038,7 +1227,7 @@ static void rk818_bat_charger_setting(struct battery_info *di, int charger)
 	}
 }
 
-static int rk818_bat_get_dc_state(struct battery_info *di)
+static int rk818_bat_get_dc_state(struct battery_priv *di)
 {
 	if (!di->dc_is_valid)
 		return NO_CHARGER;
@@ -1046,12 +1235,12 @@ static int rk818_bat_get_dc_state(struct battery_info *di)
 	return dm_gpio_get_value(di->dc_det) ? DC_CHARGER : NO_CHARGER;
 }
 
-static int rk818_bat_get_charger_type(struct battery_info *di)
+static int rk818_bat_get_charger_type(struct battery_priv *di)
 {
 	int charger_type = NO_CHARGER;
 
 	/* check by ic hardware: this check make check work safer */
-	if ((rk818_bat_read(VB_MON_REG) & PLUG_IN_STS) == 0)
+	if ((rk818_bat_read(di, VB_MON_REG) & PLUG_IN_STS) == 0)
 		return NO_CHARGER;
 
 	/* virtual or bat not exist */
@@ -1067,43 +1256,11 @@ static int rk818_bat_get_charger_type(struct battery_info *di)
 	return rk818_bat_get_usb_state(di);
 }
 
-static void rk818_bat_save_dsoc(struct battery_info *di, u8 save_soc)
-{
-	static int old_soc = -1;
-
-	if (old_soc != save_soc) {
-		old_soc = save_soc;
-		rk818_bat_write(SOC_REG, save_soc);
-	}
-}
-
-static void rk818_bat_save_cap(struct battery_info *di, int cap)
-{
-	u8 buf;
-	static int old_cap;
-
-	if (old_cap == cap)
-		return;
-
-	if (cap >= di->qmax)
-		cap = di->qmax;
-
-	old_cap = cap;
-	buf = (cap >> 24) & 0xff;
-	rk818_bat_write(REMAIN_CAP_REG3, buf);
-	buf = (cap >> 16) & 0xff;
-	rk818_bat_write(REMAIN_CAP_REG2, buf);
-	buf = (cap >> 8) & 0xff;
-	rk818_bat_write(REMAIN_CAP_REG1, buf);
-	buf = (cap >> 0) & 0xff;
-	rk818_bat_write(REMAIN_CAP_REG0, buf);
-}
-
-static u8 rk818_bat_get_chrg_status(struct battery_info *di)
+static u8 rk818_bat_get_chrg_status(struct battery_priv *di)
 {
 	u8 status;
 
-	status = rk818_bat_read(SUP_STS_REG) & BAT_STATUS_MSK;
+	status = rk818_bat_read(di, SUP_STS_REG) & BAT_STATUS_MSK;
 	switch (status) {
 	case CHARGE_OFF:
 		DBG("CHARGE-OFF...\n");
@@ -1142,7 +1299,7 @@ static u8 rk818_bat_get_chrg_status(struct battery_info *di)
 	return status;
 }
 
-static void rk818_bat_finish_chrg(struct battery_info *di)
+static void rk818_bat_finish_chrg(struct battery_priv *di)
 {
 	u32 tgt_sec = 0;
 
@@ -1157,7 +1314,7 @@ static void rk818_bat_finish_chrg(struct battery_info *di)
 	    get_timer(di->finish_chrg_base));
 }
 
-static void rk818_bat_debug_info(struct battery_info *di)
+static void rk818_bat_debug_info(struct battery_priv *di)
 {
 	u8 sup_sts, ggcon, ggsts, vb_mod, rtc, thermal, misc;
 	u8 usb_ctrl, chrg_ctrl1, chrg_ctrl2, chrg_ctrl3;
@@ -1165,17 +1322,17 @@ static void rk818_bat_debug_info(struct battery_info *di)
 
 	if (!dbg_enable)
 		return;
-	ggcon = rk818_bat_read(GGCON_REG);
-	ggsts = rk818_bat_read(GGSTS_REG);
-	sup_sts = rk818_bat_read(SUP_STS_REG);
-	usb_ctrl = rk818_bat_read(USB_CTRL_REG);
-	thermal = rk818_bat_read(THERMAL_REG);
-	vb_mod = rk818_bat_read(VB_MON_REG);
-	misc = rk818_bat_read(MISC_MARK_REG);
-	rtc = rk818_bat_read(SECONDS_REG);
-	chrg_ctrl1 = rk818_bat_read(CHRG_CTRL_REG1);
-	chrg_ctrl2 = rk818_bat_read(CHRG_CTRL_REG2);
-	chrg_ctrl3 = rk818_bat_read(CHRG_CTRL_REG3);
+	ggcon = rk818_bat_read(di, GGCON_REG);
+	ggsts = rk818_bat_read(di, GGSTS_REG);
+	sup_sts = rk818_bat_read(di, SUP_STS_REG);
+	usb_ctrl = rk818_bat_read(di, USB_CTRL_REG);
+	thermal = rk818_bat_read(di, THERMAL_REG);
+	vb_mod = rk818_bat_read(di, VB_MON_REG);
+	misc = rk818_bat_read(di, MISC_MARK_REG);
+	rtc = rk818_bat_read(di, SECONDS_REG);
+	chrg_ctrl1 = rk818_bat_read(di, CHRG_CTRL_REG1);
+	chrg_ctrl2 = rk818_bat_read(di, CHRG_CTRL_REG2);
+	chrg_ctrl3 = rk818_bat_read(di, CHRG_CTRL_REG3);
 
 	DBG("\n---------------------- DEBUG REGS ------------------------\n"
 	    "GGCON=0x%2x, GGSTS=0x%2x, RTC=0x%2x, SUP_STS= 0x%2x\n"
@@ -1189,7 +1346,7 @@ static void rk818_bat_debug_info(struct battery_info *di)
 	    "K=%d, old_cap=%d, charger=%s, Is=%d, Ip=%d, Vs=%d\n"
 	    "min=%d, meet: soc=%d, calc: dsoc=%d, rsoc=%d, Vocv=%d\n"
 	    "off: i=0x%x, c=0x%x, max=%d, ocv_c=%d, halt: st=%d, cnt=%d\n"
-	    "pwr: dsoc=%d, rsoc=%d, vol=%d, Res=%d, exist=%d\n",
+	    "pwr: dsoc=%d, rsoc=%d, vol=%d, Res=%d, mode=%s, T=%d'C\n",
 	    di->dsoc, rk818_bat_get_rsoc(di), rk818_bat_get_avg_voltage(di),
 	    rk818_bat_get_avg_current(di), di->remain_cap, di->fcc,
 	    di->rsoc - di->dsoc,
@@ -1201,13 +1358,15 @@ static void rk818_bat_debug_info(struct battery_info *di)
 	    rk818_bat_get_ocv_voltage(di), rk818_bat_get_ioffset(di),
 	    rk818_bat_get_coffset(di), di->is_max_soc_offset,
 	    di->is_ocv_calib, di->is_halt, di->halt_cnt, di->pwr_dsoc,
-	    di->pwr_rsoc, di->pwr_vol, di->sample_res, is_rk818_bat_exist(di)
+	    di->pwr_rsoc, di->pwr_vol, di->sample_res,
+	    di->virtual_power ? "VIRTUAL" : "BAT",
+	    di->temperature
 	    );
 	rk818_bat_get_chrg_status(di);
 	DBG("###########################################################\n");
 }
 
-static void rk818_bat_linek_algorithm(struct battery_info *di)
+static void rk818_bat_linek_algorithm(struct battery_priv *di)
 {
 	int delta_cap, ydsoc, tmp;
 	u8 chg_st = rk818_bat_get_chrg_status(di);
@@ -1245,31 +1404,31 @@ static void rk818_bat_linek_algorithm(struct battery_info *di)
 	    di->calc_dsoc, di->calc_rsoc, di->sm_meet_soc);
 }
 
-static void rk818_bat_set_term_mode(struct battery_info *di, int mode)
+static void rk818_bat_set_term_mode(struct battery_priv *di, int mode)
 {
 	u8 buf;
 
-	buf = rk818_bat_read(CHRG_CTRL_REG3);
+	buf = rk818_bat_read(di, CHRG_CTRL_REG3);
 	buf &= ~CHRG_TERM_SIG_MSK;
 	buf |= mode;
-	rk818_bat_write(CHRG_CTRL_REG3, buf);
+	rk818_bat_write(di, CHRG_CTRL_REG3, buf);
 
 	DBG("set charge to %s term mode\n", mode ? "digital" : "analog");
 }
 
-static int rk818_bat_get_iadc(struct battery_info *di)
+static int rk818_bat_get_iadc(struct battery_priv *di)
 {
 	int val = 0;
 
-	val |= rk818_bat_read(BAT_CUR_AVG_REGL) << 0;
-	val |= rk818_bat_read(BAT_CUR_AVG_REGH) << 8;
+	val |= rk818_bat_read(di, BAT_CUR_AVG_REGL) << 0;
+	val |= rk818_bat_read(di, BAT_CUR_AVG_REGH) << 8;
 	if (val > 2047)
 		val -= 4096;
 
 	return val;
 }
 
-static bool rk818_bat_adc_calib(struct battery_info *di)
+static bool rk818_bat_adc_calib(struct battery_priv *di)
 {
 	int i, ioffset, coffset, adc;
 
@@ -1286,7 +1445,7 @@ static bool rk818_bat_adc_calib(struct battery_info *di)
 			coffset = rk818_bat_get_coffset(di);
 			ioffset = rk818_bat_get_ioffset(di);
 			di->poffset = coffset - ioffset;
-			rk818_bat_write(POFFSET_REG, di->poffset);
+			rk818_bat_write(di, POFFSET_REG, di->poffset);
 			BAT_INFO("new offset:c=0x%x, i=0x%x, p=0x%x\n",
 				 coffset, ioffset, di->poffset);
 			return true;
@@ -1300,12 +1459,13 @@ static bool rk818_bat_adc_calib(struct battery_info *di)
 	return false;
 }
 
-static void rk818_bat_smooth_charge(struct battery_info *di)
+static void rk818_bat_smooth_charge(struct battery_priv *di)
 {
 	u8 chg_st = rk818_bat_get_chrg_status(di);
 
 	/* set terminal charge mode */
 	if (di->term_sig_base && get_timer(di->term_sig_base) > SECONDS(1)) {
+		DBG("%s: terminal signal finish mode\n", __func__);
 		rk818_bat_set_term_mode(di, CHRG_TERM_DIG_SIGNAL);
 		di->term_sig_base = 0;
 	}
@@ -1324,17 +1484,18 @@ static void rk818_bat_smooth_charge(struct battery_info *di)
 	if (di->remain_cap > di->fcc) {
 		di->sm_old_cap -= (di->remain_cap - di->fcc);
 		rk818_bat_init_capacity(di, di->fcc);
+		DBG("%s: init capacity: %d\n", __func__, di->fcc);
 	}
 
 	/* finish charge step */
 	if (chg_st == CHARGE_FINISH) {
-		DBG("finish charge step...\n");
+		DBG("%s: finish charge step...\n", __func__);
 		if (di->adc_allow_update)
 			di->adc_allow_update = !rk818_bat_adc_calib(di);
 		rk818_bat_finish_chrg(di);
 		rk818_bat_init_capacity(di, di->fcc);
 	} else {
-		DBG("smooth charge step...\n");
+		DBG("%s: smooth charge step...\n", __func__);
 		di->adc_allow_update = true;
 		di->finish_chrg_base = get_timer(0);
 		rk818_bat_linek_algorithm(di);
@@ -1346,16 +1507,169 @@ static void rk818_bat_smooth_charge(struct battery_info *di)
 	else if (di->dsoc < 0)
 		di->dsoc = 0;
 
+	DBG("%s: save dsoc=%d and rsoc=%d\n",
+	    __func__, di->dsoc, rk818_bat_get_rsoc(di));
+
 	rk818_bat_save_dsoc(di, di->dsoc);
 	rk818_bat_save_cap(di, di->remain_cap);
 out:
 	rk818_bat_debug_info(di);
 }
 
-static int rk818_bat_update_get_soc(struct udevice *dev)
+/*
+ * Due to hardware design issue, Vdelta = "(R_sample + R_other) * I_avg" will be
+ * included into TS1 adc value. We must subtract it to get correct adc value.
+ * The solution:
+ *
+ * (1) calculate Vdelta:
+ *
+ *   adc1 - Vdelta    ua1			  (adc2 * ua1) - (adc1 * ua2)
+ *   ------------- = -----  ==> equals: Vdelta = -----------------------------
+ *   adc2 - Vdelta    ua2				ua1 - ua2
+ *
+ *
+ * (2) calculate correct ADC value:
+ *
+ *     charging: ADC = adc1 - abs(Vdelta);
+ *  discharging: ADC = adc1 + abs(Vdelta);
+ */
+static int rk818_bat_get_ntc_res(struct battery_priv *di)
 {
-	struct battery_info *di = dev_get_priv(dev);
+	static int adc1 = 0, adc2 = 0, ua1 = 0, ua2 = 0;
+	static int adc1_update = 0, first_in = 1;
 	static ulong seconds;
+	int v_delta, val, res;
+	u8 buf;
+
+	/* hold adc1 and wait 1s for adc2 updated */
+	if (!adc1_update) {
+		/* update flag and init adc1,adc2 !! */
+		adc1_update = 1;
+		seconds = get_timer(0);
+		adc1 = 0;
+		adc2 = 0;
+
+		/* read sample ua1 */
+		buf = rk818_bat_read(di, TS_CTRL_REG);
+		DBG("<%s>. read adc1, sample uA=%d\n",
+		    __func__, ((buf & 0x03) + 1) * 20);
+
+		/* read adc adc1 */
+		ua1 = di->ntc_uA;
+		adc1 |= rk818_bat_read(di, TS_ADC_REGL) << 0;
+		adc1 |= rk818_bat_read(di, TS_ADC_REGH) << 8;
+
+		/* chose reference UA for adc2 */
+		ua2 = (ua1 != 20) ? 20 : 40;
+		buf = rk818_bat_read(di, TS_CTRL_REG);
+		buf &= ~ADC_CUR_MSK;
+		buf |= ((ua2 - 20) / 20);
+		rk818_bat_write(di, TS_CTRL_REG, buf);
+	}
+
+	/* wait 1s for adc2 updated */
+	if (get_timer(seconds) < SECONDS(1)) {
+		if (first_in)
+			first_in = 0;
+		else
+			return TS1_NOT_READY;
+	}
+
+	/* update flags ! */
+	adc1_update = 0;
+
+	/* read sample ua2 */
+	buf = rk818_bat_read(di, TS_CTRL_REG);
+	DBG("<%s>. read adc2, sample uA=%d\n",
+	    __func__, ((buf & 0x03) + 1) * 20);
+
+	/* read adc adc2 */
+	adc2 |= rk818_bat_read(di, TS_ADC_REGL) << 0;
+	adc2 |= rk818_bat_read(di, TS_ADC_REGH) << 8;
+
+	DBG("<%s>. ua1=%d, ua2=%d, adc1=%d, adc2=%d\n",
+	    __func__, ua1, ua2, adc1, adc2);
+
+	/* calculate delta voltage */
+	if (adc2 != adc1)
+		v_delta = abs((adc2 * ua1 - adc1 * ua2) / (ua2 - ua1));
+	else
+		v_delta = 0;
+
+	/* considering current avg direction, calcuate real adc value */
+	val = (di->current_avg >= 0) ? (adc1 - v_delta) : (adc1 + v_delta);
+
+	DBG("<%s>. Iavg=%d, Vdelta=%d, Vadc=%d\n",
+	    __func__, di->current_avg, v_delta, val);
+
+	res = val * di->ntc_factor;
+
+	DBG("<%s>. val=%d, ntc_res=%d, ntc_factor=%d\n",
+	    __func__, val, res, di->ntc_factor);
+
+	DBG("<%s>. t=[%d'C(%d) ~ %dC(%d)]\n", __func__,
+	    di->ntc_degree_from, di->ntc_table[0],
+	    di->ntc_degree_from + di->ntc_size - 1,
+	    di->ntc_table[di->ntc_size - 1]);
+
+	rk818_bat_init_ts1(di);
+
+	return res;
+}
+
+static int rk818_bat_update_temperature(struct battery_priv *di)
+{
+	static int first_time = 1, old_temperature = 25;
+	u32 ntc_size, *ntc_table;
+	int i, res, temp;
+
+	ntc_table = di->ntc_table;
+	ntc_size = di->ntc_size;
+
+	if (ntc_size) {
+		res = rk818_bat_get_ntc_res(di);
+		if (res == TS1_NOT_READY) {
+			di->temperature = old_temperature;
+			return TS1_NOT_READY;
+		}
+
+		if (res < ntc_table[ntc_size - 1]) {
+			di->temperature = di->ntc_degree_from;
+			old_temperature = di->ntc_degree_from;
+			printf("bat ntc upper max degree: R=%d\n", res);
+		} else if (res > ntc_table[0]) {
+			di->temperature = di->ntc_degree_from + di->ntc_size - 1;
+			old_temperature = di->ntc_degree_from + di->ntc_size - 1;
+			printf("bat ntc lower min degree: R=%d\n", res);
+		} else {
+			for (i = 0; i < ntc_size; i++) {
+				if (res >= ntc_table[i])
+					break;
+			}
+
+			/* if first in, init old_temperature */
+			temp = (i + di->ntc_degree_from);
+			if (first_time) {
+				di->temperature = temp;
+				old_temperature = temp;
+				first_time = 0;
+			}
+
+			old_temperature = temp;
+			di->temperature = temp;
+		}
+	}
+
+	DBG("temperature=%d\n", di->temperature);
+
+	return 0;
+}
+
+static int rk818_bat_update_get_soc(struct udevice *dev)
+{
+	struct battery_priv *di = dev_get_priv(dev);
+	static ulong seconds, ts1_seconds;
+	int wait;
 
 	/* set charge current */
 	di->chrg_type =
@@ -1363,9 +1677,21 @@ static int rk818_bat_update_get_soc(struct udevice *dev)
 	rk818_bat_charger_setting(di, di->chrg_type);
 
 	/* fg calc every 5 seconds */
-	if (!seconds)
+	if (!seconds || !ts1_seconds) {
 		seconds = get_timer(0);
+		ts1_seconds = get_timer(0);
+	}
+
+	/* temperature calc every 5 seconds */
+	if (get_timer(ts1_seconds) >= SECONDS(5)) {
+		DBG("%s: update temperature\n", __func__);
+		wait = rk818_bat_update_temperature(di);
+		if (!wait)
+			ts1_seconds = get_timer(0);
+	}
+
 	if (get_timer(seconds) >= SECONDS(5)) {
+		DBG("%s: smooth charge\n", __func__);
 		seconds = get_timer(0);
 		rk818_bat_smooth_charge(di);
 	}
@@ -1377,9 +1703,19 @@ static int rk818_bat_update_get_soc(struct udevice *dev)
 		return VIRTUAL_POWER_SOC;
 }
 
+static int rk818_bat_update_get_current(struct udevice *dev)
+{
+	struct battery_priv *di = dev_get_priv(dev);
+
+	if (!di->virtual_power && di->voltage_k)
+		return rk818_bat_get_avg_current(di);
+	else
+		return VIRTUAL_POWER_CUR;
+}
+
 static int rk818_bat_update_get_voltage(struct udevice *dev)
 {
-	struct battery_info *di = dev_get_priv(dev);
+	struct battery_priv *di = dev_get_priv(dev);
 
 	if (!di->virtual_power && di->voltage_k)
 		return rk818_bat_get_est_voltage(di);
@@ -1389,39 +1725,36 @@ static int rk818_bat_update_get_voltage(struct udevice *dev)
 
 static bool rk818_bat_update_get_chrg_online(struct udevice *dev)
 {
-	return rk818_bat_dwc_otg_check_dpdm();
+	struct battery_priv *di = dev_get_priv(dev);
+
+	return rk818_bat_get_charger_type(di);
 }
 
 static struct dm_fuel_gauge_ops fg_ops = {
 	.get_soc = rk818_bat_update_get_soc,
 	.get_voltage = rk818_bat_update_get_voltage,
+	.get_current = rk818_bat_update_get_current,
 	.get_chrg_online = rk818_bat_update_get_chrg_online,
 };
 
-static int rk818_bat_parse_dt(struct battery_info *di, void const *blob)
+static int rk818_fg_ofdata_to_platdata(struct udevice *dev)
 {
-	int node, parent, len, err;
+	struct rk8xx_priv *rk8xx = dev_get_priv(dev->parent);
+	struct battery_priv *di = dev_get_priv(dev);
+	u32 sign, degree_from[2];
 	const char *prop;
+	int len, ret;
 
-	parent = fdt_node_offset_by_compatible(blob, 0, "rockchip,rk818");
-	if (parent < 0) {
-		printf("can't find rockchip,rk818 node\n");
-		return -ENODEV;
-	}
-
-	if (!fdtdec_get_is_enabled(blob, parent)) {
-		DBG("rk818 node disabled\n");
-		return -ENODEV;
-	}
-
-	node = fdt_subnode_offset_namelen(blob, parent, "battery", 7);
-	if (node < 0) {
-		printf("can't find battery node\n");
-		di->chrg_cur_input = ILIM_2000MA;
+	if (rk8xx->variant != 0x8180) {
+		debug("%s: Not support pmic variant: rk%x\n",
+		      __func__, rk8xx->variant);
 		return -EINVAL;
+	} else {
+		di->dev = dev;
 	}
 
-	prop = fdt_getprop(blob, node, "ocv_table", &len);
+	/* Parse ocv table */
+	prop = dev_read_prop(dev, "ocv_table", &len);
 	if (!prop) {
 		printf("can't find ocv_table prop\n");
 		return -EINVAL;
@@ -1434,43 +1767,95 @@ static int rk818_bat_parse_dt(struct battery_info *di, void const *blob)
 	}
 
 	di->ocv_size = len / 4;
-	err = fdtdec_get_int_array(blob, node, "ocv_table",
-				   di->ocv_table, di->ocv_size);
-	if (err < 0) {
-		printf("read ocv_table error\n");
+	if (dev_read_u32_array(dev, "ocv_table",
+			       di->ocv_table, di->ocv_size)) {
+		printf("can't read ocv_table\n");
 		free(di->ocv_table);
 		return -EINVAL;
 	}
 
-	di->design_cap = fdtdec_get_int(blob, node, "design_capacity", -1);
+	/* Parse neccessay */
+	di->design_cap = dev_read_u32_default(dev, "design_capacity", -1);
 	if (di->design_cap < 0) {
-		printf("read design_capacity error\n");
+		printf("can't read design_capacity\n");
 		return -EINVAL;
 	}
 
-	di->qmax = fdtdec_get_int(blob, node, "design_qmax", -1);
+	di->qmax = dev_read_u32_default(dev, "design_qmax", -1);
 	if (di->qmax < 0) {
-		printf("read design_qmax error\n");
+		printf("can't read design_qmax\n");
 		return -EINVAL;
 	}
 
-	di->dts_vol_sel = fdtdec_get_int(blob, node, "max_chrg_voltage", 4200);
-	di->dts_cur_input = fdtdec_get_int(blob, node,
-					   "max_input_current", 2000);
-	di->dts_cur_sel = fdtdec_get_int(blob, node, "max_chrg_current", 1200);
-	di->sample_res = fdtdec_get_int(blob, node, "sample_res",
-					SAMPLE_RES_20mR);
+	/* Parse un-neccessay */
+	di->dts_vol_sel = dev_read_u32_default(dev, "max_chrg_voltage", 4200);
+	if (di->dts_vol_sel < 0)
+		di->dts_vol_sel = dev_read_u32_default(dev,
+						"max_charge_voltagemV", 4200);
+
+	di->dts_cur_input = dev_read_u32_default(dev, "max_input_current", 2000);
+	if (di->dts_cur_input < 0)
+		di->dts_cur_input = dev_read_u32_default(dev,
+						"max_input_currentmA", 2000);
+
+	di->dts_cur_sel = dev_read_u32_default(dev, "max_chrg_current", 1200);
+	if (di->dts_cur_sel < 0)
+		di->dts_cur_sel = dev_read_u32_default(dev,
+						"max_chrg_currentmA", 1400);
+
+	di->max_soc_offset = dev_read_u32_default(dev, "max_soc_offset", 70);
+	di->virtual_power = dev_read_u32_default(dev, "virtual_power", 0);
+	di->bat_res = dev_read_u32_default(dev, "bat_res", 135);
+	di->sample_res = dev_read_u32_default(dev, "sample_res", SAMPLE_RES_20mR);
+	di->ts2_vol_multi = dev_read_u32_default(dev, "ts2_vol_multi", 0);
+
 	di->res_div = (di->sample_res == SAMPLE_RES_20mR) ?
-		       SAMPLE_RES_DIV1 : SAMPLE_RES_DIV2;
-	di->max_soc_offset = fdtdec_get_int(blob, node, "max_soc_offset", 70);
-	di->virtual_power = fdtdec_get_int(blob, node, "virtual_power", 0);
-	di->ts2_vol_multi = fdtdec_get_int(blob, node, "ts2_vol_multi", 0);
-	di->bat_res = fdtdec_get_int(blob, node, "bat_res", 135);
-	if (!gpio_request_by_name_nodev(offset_to_ofnode(node), "dc_det_gpio",
-					0, di->dc_det, GPIOD_IS_IN)) {
-		di->dc_is_valid = true;
+				SAMPLE_RES_DIV1 : SAMPLE_RES_DIV2;
+
+	ret = gpio_request_by_name_nodev(dev_ofnode(dev), "dc_det_gpio",
+					 0, di->dc_det, GPIOD_IS_IN);
+	if (!ret) {
+		di->dc_is_valid = 1;
+		debug("DC is valid\n");
+	} else {
+		debug("DC is invalid, ret=%d\n", ret);
 	}
 
+	prop = dev_read_prop(dev, "ntc_table", &len);
+	if (!prop) {
+		di->ntc_size = 0;
+	} else {
+		ret = dev_read_u32_array(dev, "ntc_degree_from",
+					 degree_from, ARRAY_SIZE(degree_from));
+		if (ret < 0) {
+			printf("invalid ntc_degree_from\n");
+			return -EINVAL;
+		}
+
+		sign = degree_from[0];
+		di->ntc_degree_from = degree_from[1];
+		if (sign)
+			di->ntc_degree_from = -di->ntc_degree_from;
+
+		di->ntc_size = len / sizeof(u32);
+	}
+
+	if (di->ntc_size) {
+		di->ntc_table = calloc(len, 1);
+		if (!di->ntc_table) {
+			printf("calloc ocv_table fail\n");
+			return -ENOMEM;
+		}
+
+		ret = dev_read_u32_array(dev, "ntc_table",
+					 di->ntc_table, di->ntc_size);
+		if (ret < 0) {
+			printf("read ntc_table array failed\n");
+			return ret;
+		}
+	}
+
+	/* Is battery attached */
 	if (!is_rk818_bat_exist(di))
 		di->virtual_power = 1;
 
@@ -1482,26 +1867,26 @@ static int rk818_bat_parse_dt(struct battery_info *di, void const *blob)
 	DBG("design_qmax:%d\n", di->qmax);
 	DBG("max_soc_offset:%d\n", di->max_soc_offset);
 	DBG("sample_res:%d\n", di->sample_res);
+	DBG("virtual_power:%d\n", di->virtual_power);
+	DBG("ts2_vol_multi:%d\n", di->ts2_vol_multi);
+	DBG("dc det: %d\n", di->dc_is_valid);
+	DBG("ntc_size:%d\n", di->ntc_size);
+	DBG("ntc_degree_from:%d\n", di->ntc_degree_from);
+	DBG("ntc_degree_to:%d\n", di->ntc_degree_from + di->ntc_size - 1);
 
 	return 0;
 }
 
 static int rk818_fg_probe(struct udevice *dev)
 {
-	struct rk8xx_priv *priv = dev_get_priv(dev->parent);
-	struct battery_info *di = dev_get_priv(dev);
-	int ret;
+	struct rk8xx_priv *rk8xx = dev_get_priv(dev->parent);
+	struct battery_priv *di = dev_get_priv(dev);
 
-	if (priv->variant != 0x8180) {
-		debug("Not support pmic variant: rk%x\n", priv->variant);
+	if (rk8xx->variant != 0x8180) {
+		printf("Not support pmic variant: rk%x\n", rk8xx->variant);
 		return -EINVAL;
 	}
 
-	g_pmic_dev = dev->parent;
-	ret = rk818_bat_parse_dt(di, gd->fdt_blob);
-	if (ret)
-		return ret;
-
 	return rk818_fg_init(di);
 }
 
@@ -1510,5 +1895,6 @@ U_BOOT_DRIVER(rk818_fg) = {
 	.id = UCLASS_FG,
 	.probe = rk818_fg_probe,
 	.ops = &fg_ops,
-	.priv_auto_alloc_size = sizeof(struct battery_info),
+	.ofdata_to_platdata = rk818_fg_ofdata_to_platdata,
+	.priv_auto_alloc_size = sizeof(struct battery_priv),
 };

commit 3476b70682dd46083e03689eec7675878f9f9814
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 25 18:57:21 2018 +0800

    include: rk_timer_irq: add rk3399 TIMER_CTRL definition
    
    Change-Id: I2e88b19b722a7f6a9171c5f1bbfbd7592c525f8c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/rk_timer_irq.h b/include/rk_timer_irq.h
index 315761efff..d44277bacf 100644
--- a/include/rk_timer_irq.h
+++ b/include/rk_timer_irq.h
@@ -9,9 +9,14 @@
 
 #include <irq-platform.h>
 
+#ifdef CONFIG_ROCKCHIP_RK3399
+#define TIMER_CTRL		0x1c
+#else
+#define TIMER_CTRL		0x10
+#endif
+
 #define TIMER_LOAD_COUNT0	0x00
 #define TIMER_LOAD_COUNT1	0x04
-#define TIMER_CTRL		0x10
 #define TIMER_INTSTATUS		0x18
 
 #define TIMER_EN		BIT(0)

commit cf49f6adf1fb0dfee3536a201ec79e371ac594b8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 25 11:47:02 2018 +0800

    power: charge animation: add debug message
    
    Change-Id: Ib96ab67e9e2657385f19c9e2ab2ed518da0ad2f8
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 2b374f2364..519a3a81c9 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -331,7 +331,7 @@ static int charge_animation_show(struct udevice *dev)
 
 	/* If there is preboot command, exit */
 	if (preboot) {
-		debug("preboot: %s\n", preboot);
+		debug("exit charge, due to preboot: %s\n", preboot);
 		return 0;
 	}
 
@@ -347,8 +347,10 @@ static int charge_animation_show(struct udevice *dev)
 
 	/* Not charger online, exit */
 	charging = fuel_gauge_get_chrg_online(fg);
-	if (charging <= 0)
+	if (charging <= 0) {
+		debug("exit charge, due to charger offline\n");
 		return 0;
+	}
 
 	/* Enter android charge, set property for kernel */
 	if (pdata->android_charge) {
@@ -357,8 +359,10 @@ static int charge_animation_show(struct udevice *dev)
 	}
 
 	/* Not enable U-Boot charge, exit */
-	if (!pdata->uboot_charge)
+	if (!pdata->uboot_charge) {
+		debug("exit charge, due to not enable uboot charge\n");
 		return 0;
+	}
 
 	voltage = fuel_gauge_get_voltage(fg);
 	if (voltage < 0) {
@@ -616,7 +620,10 @@ static int charge_animation_probe(struct udevice *dev)
 	/* Get PMIC: used for power off system  */
 	ret = uclass_get_device(UCLASS_PMIC, 0, &pmic);
 	if (ret) {
-		printf("Get UCLASS PMIC failed: %d\n", ret);
+		if (ret == -ENODEV)
+			printf("Can't find PMIC\n");
+		else
+			printf("Get UCLASS PMIC failed: %d\n", ret);
 		return ret;
 	}
 	priv->pmic = pmic;
@@ -624,7 +631,10 @@ static int charge_animation_probe(struct udevice *dev)
 	/* Get fuel gauge: used for charging */
 	ret = uclass_get_device(UCLASS_FG, 0, &fg);
 	if (ret) {
-		printf("Get UCLASS FG failed: %d\n", ret);
+		if (ret == -ENODEV)
+			printf("Can't find FG\n");
+		else
+			printf("Get UCLASS FG failed: %d\n", ret);
 		return ret;
 	}
 	priv->fg = fg;

commit eeb3338caa2195b79978366268a139a3a882880b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 25 11:46:25 2018 +0800

    rockchip: board: print debug when not find charge display driver
    
    Change-Id: Ie75068bed96ef146e4dd949bd698ae64317a16b0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 05c5ae668f..aea9dc2d64 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -117,6 +117,8 @@ static int charge_display(void)
 		if (ret != -ENODEV) {
 			printf("Get UCLASS CHARGE DISPLAY failed: %d\n", ret);
 			return ret;
+		} else {
+			debug("Can't find charge display driver\n");
 		}
 		return 0;
 	}

commit b609c2e80d6aa607831d080bf3fa953a2553c58c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 25 11:30:55 2018 +0800

    fuel gauge: Kconfig: remove defaut y for rk816
    
    Change-Id: I37534b0128e596a005c318e39e4b54382752b273
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/Kconfig b/drivers/power/fuel_gauge/Kconfig
index ef0ea6a4ed..c61b911884 100644
--- a/drivers/power/fuel_gauge/Kconfig
+++ b/drivers/power/fuel_gauge/Kconfig
@@ -26,6 +26,5 @@ config POWER_FG_RK817
 config POWER_FG_RK816
 	bool "RK816 Fuel gauge support"
 	depends on DM_FUEL_GAUGE && PMIC_RK8XX
-	default y
 	help
 	  This adds support for RK816 fuel gauge support.

commit fb6848b7497e63b454482b90ec552992c62e0fe3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 25 11:24:15 2018 +0800

    input: Kconfig: add rk817 help descripiton for RK8XX_PWRKEY
    
    Change-Id: Ic5e0265cb046c5c5796542f6f12d1f588b7fa05c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig
index 6a88c7918e..7d48cfe526 100644
--- a/drivers/input/Kconfig
+++ b/drivers/input/Kconfig
@@ -46,10 +46,10 @@ config I8042_KEYB
 	  handled by the keyboard itself.
 
 config RK8XX_PWRKEY
-	bool "Enable RK805/816 pwrkey support"
+	bool "Enable RK805/816/817 pwrkey support"
 	depends on DM_KEY && PMIC_RK8XX
 	help
-	  This adds a driver for the RK805/816 pwrkey support.
+	  This adds a driver for the RK805/816/817 pwrkey support.
 
 config ADC_KEY
 	bool "Enable adc keys support"

commit a0ad9ed1292b91ee52adef957f943a7efc9cb389
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 25 11:15:06 2018 +0800

    input: rk key: fix compile warning
    
    Change-Id: I357db633bbd904d00757a909665f8f624ef2b50d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/rk_key.c b/drivers/input/rk_key.c
index bc127c6841..cf5e7a865a 100644
--- a/drivers/input/rk_key.c
+++ b/drivers/input/rk_key.c
@@ -136,7 +136,7 @@ static int rk_keys_read(struct udevice *dev, int code)
 	struct rk_key_priv *priv = dev_get_priv(dev);
 	struct input_key *key = dev_get_platdata(dev);
 	int report = KEY_NOT_EXIST;
-	int max, min, i = 0;
+	int i = 0;
 	unsigned int adcval;
 
 	for (i = 0; i < priv->key_nr; i++) {
@@ -149,10 +149,10 @@ static int rk_keys_read(struct udevice *dev, int code)
 				printf("%s: failed to read saradc\n",
 				       key[i].name);
 			} else {
-				report = key_parse_adc_event(key[i], adcval);
+				report = key_parse_adc_event(&key[i], adcval);
 			}
 		} else {
-			report = key_parse_gpio_event(key[i]);
+			report = key_parse_gpio_event(&key[i]);
 		}
 		break;
 	}

commit 7b0adbaa7dd44e658135de06e194bfaf83ff6eeb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 25 11:14:49 2018 +0800

    input: gpio key: fix compile warning
    
    Change-Id: I897c625d623365a7f9bc49fb4ceb1ed9057cd103
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/gpio_key.c b/drivers/input/gpio_key.c
index 9bf124d0f2..d41fef6eda 100644
--- a/drivers/input/gpio_key.c
+++ b/drivers/input/gpio_key.c
@@ -110,7 +110,7 @@ static int gpio_key_read(struct udevice *dev, int code)
 	for (i = 0; i < priv->key_nr; i++) {
 		if (key[i].code != code)
 			continue;
-		report = key_parse_gpio_event(key[i]);
+		report = key_parse_gpio_event(&key[i]);
 		break;
 	}
 

commit 917ec9ee71575c5dad706a2d766dbe12e2a29645
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jun 22 21:25:14 2018 +0800

    power: pwm regulator: make message from printf to debug
    
    Change-Id: I7e9b2a6bcfe437f01bb318281110935aaf029619
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/pwm_regulator.c b/drivers/power/regulator/pwm_regulator.c
index ffa26a1c6c..6cc6efa49d 100644
--- a/drivers/power/regulator/pwm_regulator.c
+++ b/drivers/power/regulator/pwm_regulator.c
@@ -105,7 +105,7 @@ static int pwm_regulator_ofdata_to_platdata(struct udevice *dev)
 
 	priv->init_voltage = dev_read_u32_default(dev, "regulator-init-microvolt", -1);
 	if (priv->init_voltage < 0) {
-		printf("Cannot find regulator pwm init_voltage\n");
+		debug("Cannot find regulator pwm init_voltage\n");
 	}
 
 	ret = uclass_get_device_by_ofnode(UCLASS_PWM, args.node, &priv->pwm);

commit a38e17c3f42c5c5553f69c263667937ffe27383b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jun 21 18:59:53 2018 +0800

    rockchip: board: add message when using kernel dtb
    
    Change-Id: Iace236ec6244a0239868de2fa063b0747eec76c3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index fe40897830..05c5ae668f 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -213,6 +213,8 @@ init_dtb:
 
 	gd->fdt_blob = (void *)fdt_addr;
 
+	printf("Using kernel dtb\n");
+
 	return 0;
 }
 #endif

commit 012251d262bef02b2e6e8ef89a969bff5df7ee45
Author: Wu Liangqing <wlq@rock-chips.com>
Date:   Thu Jun 28 20:01:14 2018 +0800

    config: evb-px30: enable CONFIG_RKPARM_PARTITION
    
    sync from evb-rk3326_deconfig
    
    Change-Id: Ic417542064801bc8b5ab585c49cbe27cd8b5beb3
    Signed-off-by: Wu Liangqing <wlq@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
old mode 100644
new mode 100755
index 35803f05b9..1b9c740d50
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -26,6 +26,7 @@ CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
+CONFIG_RKPARM_PARTITION=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_REGMAP=y

commit 11277c78078c3767d1758fa2d040be70951c5b9a
Author: William Wu <william.wu@rock-chips.com>
Date:   Wed Jun 27 18:50:15 2018 +0800

    rockchip: dts: rk3399: use u-boot,dm-pre-reloc for dwc3
    
    We use dt-spl.dtb for dwc3 xhci when CONFIG_USING_KERNEL_DTB is
    enabled, so set the dwc3 on rk3399 boards as u-boot,dm-pre-reloc
    to make sure it will builtin dt-spl.dtb.
    
    Change-Id: Ibdceebd819bee0b102180f1f0e65fd963af380c0
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi
index 7bd104fb3f..8000614357 100644
--- a/arch/arm/dts/rk3399-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-u-boot.dtsi
@@ -53,6 +53,14 @@
 	u-boot,dm-pre-reloc;
 };
 
+&dwc3_typec0 {
+	u-boot,dm-pre-reloc;
+};
+
+&dwc3_typec1 {
+	u-boot,dm-pre-reloc;
+};
+
 &emmc_phy {
 	u-boot,dm-pre-reloc;
 };

commit 0a3a50d644f6912e34f70b806727e6624497dff1
Author: William Wu <william.wu@rock-chips.com>
Date:   Wed Jun 27 18:06:22 2018 +0800

    rockchip: clk: rk3399: add phy 480MHz clks for usb Host0/1
    
    In kernel dtb, the rk3399 usb Host0/1 use SCLK_USBPHY0/1_480M_SRC
    in addition to HCLK_HOST0/1 and HCLK_HOST0/1_ARB. This patch adds
    the phy 480MHz clks for usb Host0/1 to ensure the generic ehci-driver
    (ehci-generic.c) to enable the clocks successfully.
    
    Change-Id: I0790e949bca0d7bdc4179f3232b29aa58436593f
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 6bd7092dbb..f7683ab33b 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -1121,8 +1121,10 @@ static int rk3399_clk_enable(struct clk *clk)
 	switch (clk->id) {
 	case HCLK_HOST0:
 	case HCLK_HOST0_ARB:
+	case SCLK_USBPHY0_480M_SRC:
 	case HCLK_HOST1:
 	case HCLK_HOST1_ARB:
+	case SCLK_USBPHY1_480M_SRC:
 		return 0;
 	}
 

commit 6bfdfc4f06129283b7d3c9caa66fc89e97fc5189
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Mon Jun 25 15:55:48 2018 +0800

    clk: rockchip: rk3399: support dual pll for vop
    
    set the vop's parent just vpll and cpll,
    set vop parent in dts node,the same as kernel setting.
    i.e:
    &vopb {
            status = "okay";
            assigned-clocks = <&cru DCLK_VOP0_DIV>;
            assigned-clock-parents = <&cru PLL_VPLL>;
    };
    &vopl {
            status = "okay";
            assigned-clocks = <&cru DCLK_VOP1_DIV>;
            assigned-clock-parents = <&cru PLL_CPLL>;
    };
    
    Change-Id: I07ab4e2837cf7fc0860e8b4d14adb8936f5cb27a
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
index 045b481ca0..9c4104845d 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
@@ -71,8 +71,9 @@ check_member(rk3399_cru, sdio1_con[1], 0x594);
 #define KHz		1000
 #define OSC_HZ		(24*MHz)
 #define APLL_HZ		(600*MHz)
-#define GPLL_HZ		(594*MHz)
+#define GPLL_HZ		(800 * MHz)
 #define CPLL_HZ		(384*MHz)
+#define NPLL_HZ		(600 * MHz)
 #define PPLL_HZ		(676*MHz)
 
 #define PMU_PCLK_HZ	(48*MHz)
@@ -104,4 +105,18 @@ enum cpu_cluster {
 	CPU_CLUSTER_BIG,
 };
 
+enum rk3399_pll_id {
+	APLLL_ID = 0,
+	APLLB_ID,
+	DPLL_ID,
+	CPLL_ID,
+	GPLL_ID,
+	NPLL_ID,
+	VPLL_ID,
+
+	PPLL_ID,
+
+	END_PLL_ID
+};
+
 #endif	/* __ASM_ARCH_CRU_RK3399_H_ */
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index c19912ab69..6bd7092dbb 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -50,8 +50,9 @@ struct pll_div {
 	.fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ),\
 	.postdiv1 = _postdiv1, .postdiv2 = _postdiv2, .freq = hz};
 
-static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 2, 1);
+static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 1, 3, 1);
 static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 1, 2, 2);
+static const struct pll_div npll_init_cfg = PLL_DIVISORS(NPLL_HZ, 1, 2, 2);
 #if !defined(CONFIG_SPL_BUILD)
 static const struct pll_div ppll_init_cfg = PLL_DIVISORS(PPLL_HZ, 2, 2, 1);
 #endif
@@ -195,6 +196,7 @@ enum {
 	ACLK_VOP_PLL_SEL_SHIFT		= 6,
 	ACLK_VOP_PLL_SEL_MASK		= 0x3 << ACLK_VOP_PLL_SEL_SHIFT,
 	ACLK_VOP_PLL_SEL_CPLL		= 0x1,
+	ACLK_VOP_PLL_SEL_GPLL		= 0x2,
 	ACLK_VOP_DIV_CON_SHIFT		= 0,
 	ACLK_VOP_DIV_CON_MASK		= 0x1f << ACLK_VOP_DIV_CON_SHIFT,
 
@@ -205,6 +207,7 @@ enum {
 	DCLK_VOP_PLL_SEL_SHIFT          = 8,
 	DCLK_VOP_PLL_SEL_MASK           = 3 << DCLK_VOP_PLL_SEL_SHIFT,
 	DCLK_VOP_PLL_SEL_VPLL           = 0,
+	DCLK_VOP_PLL_SEL_CPLL           = 1,
 	DCLK_VOP_DIV_CON_MASK           = 0xff,
 	DCLK_VOP_DIV_CON_SHIFT          = 0,
 
@@ -290,6 +293,31 @@ enum {
  * FBDIV = Integer value programmed into feedback divide
  *
  */
+
+static uint32_t rkclk_pll_get_rate(u32 *pll_con)
+{
+	u32 refdiv, fbdiv, postdiv1, postdiv2;
+	u32 con;
+
+	con = readl(&pll_con[3]);
+	switch ((con & PLL_MODE_MASK) >> PLL_MODE_SHIFT) {
+	case PLL_MODE_SLOW:
+		return OSC_HZ;
+	case PLL_MODE_NORM:
+		/* normal mode */
+		con = readl(&pll_con[0]);
+		fbdiv = (con & PLL_FBDIV_MASK) >> PLL_FBDIV_SHIFT;
+		con = readl(&pll_con[1]);
+		postdiv1 = (con & PLL_POSTDIV1_MASK) >> PLL_POSTDIV1_SHIFT;
+		postdiv2 = (con & PLL_POSTDIV2_MASK) >> PLL_POSTDIV2_SHIFT;
+		refdiv = (con & PLL_REFDIV_MASK) >> PLL_REFDIV_SHIFT;
+		return (24 * fbdiv / (refdiv * postdiv1 * postdiv2)) * 1000000;
+	case PLL_MODE_DEEP:
+	default:
+		return 32768;
+	}
+}
+
 static void rkclk_set_pll(u32 *pll_con, const struct pll_div *div)
 {
 	/* All 8 PLLs have same VCO and output frequency range restrictions. */
@@ -333,6 +361,42 @@ static void rkclk_set_pll(u32 *pll_con, const struct pll_div *div)
 		     PLL_MODE_NORM << PLL_MODE_SHIFT);
 }
 
+static ulong rk3399_pll_get_rate(struct rk3399_clk_priv *priv,
+				 enum rk3399_pll_id pll_id)
+{
+	struct rk3399_cru *cru = priv->cru;
+	u32 *pll_con;
+
+	switch (pll_id) {
+	case PLL_APLLL:
+		pll_con = &cru->apll_l_con[0];
+		break;
+	case PLL_APLLB:
+		pll_con = &cru->apll_b_con[0];
+		break;
+	case PLL_DPLL:
+		pll_con = &cru->dpll_con[0];
+		break;
+	case PLL_CPLL:
+		pll_con = &cru->cpll_con[0];
+		break;
+	case PLL_GPLL:
+		pll_con = &cru->gpll_con[0];
+		break;
+	case PLL_NPLL:
+		pll_con = &cru->npll_con[0];
+		break;
+	case PLL_VPLL:
+		pll_con = &cru->vpll_con[0];
+		break;
+	default:
+		pll_con = &cru->vpll_con[0];
+		break;
+	}
+
+	return rkclk_pll_get_rate(pll_con);
+}
+
 static int pll_para_config(u32 freq_hz, struct pll_div *div)
 {
 	u32 ref_khz = OSC_HZ / KHz, refdiv, fbdiv = 0;
@@ -635,12 +699,15 @@ static ulong rk3399_spi_set_clk(struct rk3399_cru *cru, ulong clk_id, uint hz)
 	return rk3399_spi_get_clk(cru, clk_id);
 }
 
+#define RK3399_LIMIT_PLL_DCLK_VOP	(600 * 1000000)
+#define RK3399_LIMIT_PLL_ACLK_VOP	(400 * 1000000)
+
 static ulong rk3399_vop_set_clk(struct rk3399_cru *cru, ulong clk_id, u32 hz)
 {
-	struct pll_div vpll_config = {0};
-	int aclk_vop = 198*MHz;
+	struct pll_div vpll_config = {0}, cpll_config = {0};
+	int aclk_vop = RK3399_LIMIT_PLL_ACLK_VOP;
 	void *aclkreg_addr, *dclkreg_addr;
-	u32 div;
+	u32 div = 1;
 
 	switch (clk_id) {
 	case DCLK_VOP0:
@@ -655,26 +722,30 @@ static ulong rk3399_vop_set_clk(struct rk3399_cru *cru, ulong clk_id, u32 hz)
 		return -EINVAL;
 	}
 	/* vop aclk source clk: cpll */
-	div = CPLL_HZ / aclk_vop;
+	div = GPLL_HZ / aclk_vop;
 	assert(div - 1 <= 31);
 
 	rk_clrsetreg(aclkreg_addr,
 		     ACLK_VOP_PLL_SEL_MASK | ACLK_VOP_DIV_CON_MASK,
-		     ACLK_VOP_PLL_SEL_CPLL << ACLK_VOP_PLL_SEL_SHIFT |
+		     ACLK_VOP_PLL_SEL_GPLL << ACLK_VOP_PLL_SEL_SHIFT |
 		     (div - 1) << ACLK_VOP_DIV_CON_SHIFT);
 
-	/* vop dclk source from vpll, and equals to vpll(means div == 1) */
-	if (pll_para_config(hz, &vpll_config))
-		return -1;
+	div = DIV_ROUND_UP(RK3399_LIMIT_PLL_DCLK_VOP, hz);
 
-	rkclk_set_pll(&cru->vpll_con[0], &vpll_config);
+	if (readl(dclkreg_addr) & DCLK_VOP_PLL_SEL_MASK) {
+		if (pll_para_config(div * hz, &cpll_config))
+			return -1;
+		rkclk_set_pll(&cru->cpll_con[0], &cpll_config);
+	} else {
+		if (pll_para_config(div * hz, &vpll_config))
+			return -1;
+		rkclk_set_pll(&cru->vpll_con[0], &vpll_config);
+	}
 
 	rk_clrsetreg(dclkreg_addr,
-		     DCLK_VOP_DCLK_SEL_MASK | DCLK_VOP_PLL_SEL_MASK|
-		     DCLK_VOP_DIV_CON_MASK,
+		     DCLK_VOP_DCLK_SEL_MASK | DCLK_VOP_DIV_CON_MASK,
 		     DCLK_VOP_DCLK_SEL_DIVOUT << DCLK_VOP_DCLK_SEL_SHIFT |
-		     DCLK_VOP_PLL_SEL_VPLL << DCLK_VOP_PLL_SEL_SHIFT |
-		     (1 - 1) << DCLK_VOP_DIV_CON_SHIFT);
+		     (div - 1) << DCLK_VOP_DIV_CON_SHIFT);
 
 	return hz;
 }
@@ -853,8 +924,15 @@ static ulong rk3399_clk_get_rate(struct clk *clk)
 	ulong rate = 0;
 
 	switch (clk->id) {
-	case 0 ... 63:
-		return 0;
+	case PLL_APLLL:
+	case PLL_APLLB:
+	case PLL_DPLL:
+	case PLL_CPLL:
+	case PLL_GPLL:
+	case PLL_NPLL:
+	case PLL_VPLL:
+		rate = rk3399_pll_get_rate(priv, clk->id - 1);
+		break;
 	case HCLK_SDMMC:
 	case SCLK_SDMMC:
 	case SCLK_EMMC:
@@ -997,11 +1075,41 @@ static int __maybe_unused rk3399_gmac_set_parent(struct clk *clk, struct clk *pa
 	return -EINVAL;
 }
 
+static int __maybe_unused rk3399_dclk_vop_set_parent(struct clk *clk,
+						     struct clk *parent)
+{
+	struct rk3399_clk_priv *priv = dev_get_priv(clk->dev);
+	void *dclkreg_addr;
+
+	switch (clk->id) {
+	case DCLK_VOP0_DIV:
+		dclkreg_addr = &priv->cru->clksel_con[49];
+		break;
+	case DCLK_VOP1_DIV:
+		dclkreg_addr = &priv->cru->clksel_con[50];
+		break;
+	default:
+		return -EINVAL;
+	}
+	if (parent->id == PLL_CPLL) {
+		rk_clrsetreg(dclkreg_addr, DCLK_VOP_PLL_SEL_MASK,
+			     DCLK_VOP_PLL_SEL_CPLL << DCLK_VOP_PLL_SEL_SHIFT);
+	} else {
+		rk_clrsetreg(dclkreg_addr, DCLK_VOP_PLL_SEL_MASK,
+			     DCLK_VOP_PLL_SEL_VPLL << DCLK_VOP_PLL_SEL_SHIFT);
+	}
+
+	return 0;
+}
+
 static int __maybe_unused rk3399_clk_set_parent(struct clk *clk, struct clk *parent)
 {
 	switch (clk->id) {
 	case SCLK_RMII_SRC:
 		return rk3399_gmac_set_parent(clk, parent);
+	case DCLK_VOP0_DIV:
+	case DCLK_VOP1_DIV:
+		return rk3399_dclk_vop_set_parent(clk, parent);
 	}
 
 	debug("%s: unsupported clk %ld\n", __func__, clk->id);
@@ -1051,6 +1159,7 @@ static void rkclk_init(struct rk3399_cru *cru)
 	/* configure gpll cpll */
 	rkclk_set_pll(&cru->gpll_con[0], &gpll_init_cfg);
 	rkclk_set_pll(&cru->cpll_con[0], &cpll_init_cfg);
+	rkclk_set_pll(&cru->npll_con[0], &npll_init_cfg);
 
 	/* configure perihp aclk, hclk, pclk */
 	aclk_div = GPLL_HZ / PERIHP_ACLK_HZ - 1;
diff --git a/include/dt-bindings/clock/rk3399-cru.h b/include/dt-bindings/clock/rk3399-cru.h
index d4bdcc663f..e479e0f47a 100644
--- a/include/dt-bindings/clock/rk3399-cru.h
+++ b/include/dt-bindings/clock/rk3399-cru.h
@@ -7,6 +7,8 @@
 #ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3399_H
 #define _DT_BINDINGS_CLK_ROCKCHIP_RK3399_H
 
+#define RK3399_TWO_PLL_FOR_VOP
+
 /* core clocks */
 #define PLL_APLLL			1
 #define PLL_APLLB			2

commit 051c625387506ec6c338ba88c1f192b93b1b4f04
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jun 25 16:21:42 2018 +0800

    android: fix android_bootloader_message_write bug
    
    Acording to rockchip, the bootloader message is storaged
    in the misc, and the offset address is BOOTLOADER_MESSAGE_BLK_OFFSET
    blocks. But the offset address is zero in the normal state.
    So add the CONFIG_RKIMG_BOOTLOADER to seperate it.
    
    Change-Id: Ie4cd473ff9a32f578fe901b48689e60c7a28012a
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 272dc450b4..add6003397 100755
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -85,8 +85,13 @@ static int android_bootloader_message_write(
 	const disk_partition_t *part_info,
 	struct android_bootloader_message *message)
 {
+#ifdef CONFIG_RKIMG_BOOTLOADER
+	ulong message_blocks = sizeof(struct android_bootloader_message) /
+	    part_info->blksz + BOOTLOADER_MESSAGE_BLK_OFFSET;
+#else
 	ulong message_blocks = sizeof(struct android_bootloader_message) /
 	    part_info->blksz;
+#endif
 	if (message_blocks > part_info->size) {
 		printf("misc partition too small.\n");
 		return -1;

commit 8e652a339fad93ed73eae33979d213b5aae422d5
Author: William Wu <william.wu@rock-chips.com>
Date:   Wed Jun 27 17:31:16 2018 +0800

    rockchip: dts: rk3399-evb: fix the vcc5v0_host regulator
    
    The vcc5v0_host regulator is used for USB Host Vbus control
    on rk3399-evb. Set both the "regulator-min-microvolt" and
    "regulator-max-microvolt" to 5000000 for the vcc5v0_host,
    and enable it when boot.
    
    Change-Id: Ia77e99b1b2dfa9876d7c5739f683952a8fc44c09
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts
index a4ddd0075e..1a9e87c342 100644
--- a/arch/arm/dts/rk3399-evb.dts
+++ b/arch/arm/dts/rk3399-evb.dts
@@ -61,6 +61,10 @@
 		compatible = "regulator-fixed";
 		regulator-name = "vcc5v0_host";
 		gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+		regulator-boot-on;
 	};
 
 	vcc5v0_typec0: vcc5v0-typec0-en {

commit f13b6e2815f862dc0eaba3e6f84349c94310afa4
Author: William Wu <william.wu@rock-chips.com>
Date:   Wed Jun 27 17:17:07 2018 +0800

    rockchip: config: enable ohci support for rk3399
    
    We have added OHCI nodes in rk3399 device-tree, so let's
    enable OHCI config to support USB 1.1/1.0 in rk3399 boards.
    
    Change-Id: I0a2af0e404b281c6bec627dc7871471043b8a65a
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index 2a907019bd..305f0a405d 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -78,6 +78,8 @@ CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
index f84e81afef..93039bff52 100644
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -77,6 +77,8 @@ CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_STORAGE=y
diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index 20dfd2d71f..bf5f445011 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -77,4 +77,8 @@
 
 /* enable usb config for usb ether */
 
+/* rockchip ohci host driver */
+#define CONFIG_USB_OHCI_NEW
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	1
+
 #endif

commit 2878d5a3aa974f0ba8f7c78842eb5ddf2c55cd93
Author: William Wu <william.wu@rock-chips.com>
Date:   Wed Jun 27 16:28:51 2018 +0800

    usb: dwc3: init phy utmi width in platform data
    
    On rk3399 board, we need to configure phy interface UTMI+ width
    to 16 bits via the property "snps,phyif-utmi-bits" of dwc3 node.
    But we can't the get the property from kernel dtb. So this patch
    initialize the phy interface UTMI+ width in dwc3 platform data,
    and not dependent on the property in dtb.
    
    Change-Id: I3f6b05e0d72806242a128c85f82b260f61ac4f95
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c b/board/rockchip/evb_rk3399/evb-rk3399.c
index c2b6d83d5c..b6f730852a 100644
--- a/board/rockchip/evb_rk3399/evb-rk3399.c
+++ b/board/rockchip/evb_rk3399/evb-rk3399.c
@@ -194,6 +194,7 @@ static struct dwc3_device dwc3_device_data = {
 	.dr_mode = USB_DR_MODE_PERIPHERAL,
 	.index = 0,
 	.dis_u2_susphy_quirk = 1,
+	.usb2_phyif_utmi_width = 16,
 };
 
 int usb_gadget_handle_interrupts(void)
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 1cbf17967a..d073f30cf0 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -694,6 +694,9 @@ int dwc3_uboot_init(struct dwc3_device *dwc3_dev)
 
 	dwc->index = dwc3_dev->index;
 
+	if (dwc3_dev->usb2_phyif_utmi_width)
+		dwc->usb2_phyif_utmi_width = dwc3_dev->usb2_phyif_utmi_width;
+
 	node = fdt_node_offset_by_compatible(blob, -1,
 			"rockchip,rk3399-xhci");
 	if (node < 0)
diff --git a/include/dwc3-uboot.h b/include/dwc3-uboot.h
index 7af2ad11e4..cc9ffe8825 100644
--- a/include/dwc3-uboot.h
+++ b/include/dwc3-uboot.h
@@ -33,6 +33,7 @@ struct dwc3_device {
 	unsigned dis_u2_susphy_quirk;
 	unsigned tx_de_emphasis_quirk;
 	unsigned tx_de_emphasis;
+	unsigned usb2_phyif_utmi_width;
 	int index;
 };
 

commit 6281205a07d87a6722d342cddc8a4dfd33eafa20
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Wed Jun 27 11:49:21 2018 +0800

    rockchip: rkflash: update spi nand ECC strategy
    
    1.Read ECC status according to each flash's identify Internal ECC;
    2.Refresh data before reach ECC Flipping Bits.
    
    Change-Id: I346167d4c252261813ff0a6bb670a64bec6026dd
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/sfc_nand.c b/drivers/rkflash/sfc_nand.c
index 2bfd63b331..51edb6fcb0 100644
--- a/drivers/rkflash/sfc_nand.c
+++ b/drivers/rkflash/sfc_nand.c
@@ -16,29 +16,31 @@
 
 static struct nand_info spi_nand_tbl[] = {
 	/* TC58CVG0S0HxAIx */
-	{0x98C2, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x02, 0xD8, 0x00, 18, 8, 0xB0, 0XFF, 4, 8},
+	{0x98C2, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x02, 0xD8, 0x00, 18, 8, 0xB0, 0XFF, 4, 8, NULL},
 	/* TC58CVG1S0HxAIx */
-	{0x98CB, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x02, 0xD8, 0x00, 19, 8, 0xB0, 0XFF, 4, 8},
+	{0x98CB, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x02, 0xD8, 0x00, 19, 8, 0xB0, 0XFF, 4, 8, NULL},
 	/* MX35LF1GE4AB */
-	{0xC212, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xB0, 0, 4, 8},
+	{0xC212, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 4, 0xB0, 0, 4, 8, &sfc_nand_ecc_status_sp1},
 	/* MX35LF2GE4AB */
-	{0xC222, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 1, 0xB0, 0, 4, 8},
+	{0xC222, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 4, 0xB0, 0, 4, 8, &sfc_nand_ecc_status_sp1},
 	/* GD5F1GQ4UAYIG */
-	{0xC8F1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xB0, 0, 4, 8},
-	/* GD5F2GQ40BY2GR */
-	{0xC8D2, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xB0, 0, 4, 8},
+	{0xC8F1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 8, 0xB0, 0, 4, 8, NULL},
 	/* MT29F1G01ZAC */
-	{0x2C12, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x00, 18, 1, 0xB0, 0, 4, 8},
-	/* GD5F1GQ4U */
-	{0xC8B1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xB0, 0, 4, 8},
-	/* GD5F2GQ4U */
-	{0xC8B2, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 1, 0xB0, 0, 4, 8},
+	{0x2C12, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x00, 18, 1, 0xB0, 0, 4, 8, &sfc_nand_ecc_status_sp1},
+	/* GD5F2GQ40BY2GR */
+	{0xC8D2, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 8, 0xB0, 0, 4, 8, &sfc_nand_ecc_status_sp3},
 	/* GD5F1GQ4U */
-	{0xC8D1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xB0, 0, 4, 8},
+	{0xC8D1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 8, 0xB0, 0, 4, 8, &sfc_nand_ecc_status_sp3},
 	/* IS37SML01G1 */
-	{0xC821, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x00, 18, 1, 0xB0, 0XFF, 8, 12},
+	{0xC821, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x00, 18, 1, 0xB0, 0XFF, 8, 12, &sfc_nand_ecc_status_sp1},
 	/* W25N01GV */
-	{0xEFAA, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xFF, 0XFF, 4, 20},
+	{0xEFAA, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xFF, 0XFF, 4, 20, &sfc_nand_ecc_status_sp1},
+	/* HYF2GQ4UAACAE */
+	{0xC952, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 14, 0xB0, 0, 4, 36, NULL},
+	/* HYF2GQ4UDACAE */
+	{0xC922, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 4, 0xB0, 0, 4, 20, NULL},
+	/* HYF1GQ4UDACAE */
+	{0xC921, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 4, 0xB0, 0, 4, 20, NULL},
 };
 
 static u8 id_byte[8];
@@ -141,6 +143,122 @@ static int sfc_nand_wait_busy(u8 *data, int timeout)
 	return -1;
 }
 
+/*
+ * ecc default:
+ * 0, No bit errors were detected
+ * 1, Bit errors were detected and corrected.
+ * 2, Multiple bit errors were detected and not corrected.
+ * 3, Bits errors were detected and corrected, bit error count
+ *	exceed the bit flip detection threshold
+ */
+static u32 sfc_nand_ecc_status(void)
+{
+	int ret;
+	u32 i;
+	u8 ecc;
+	u8 status;
+	u32 timeout = 1000 * 1000;
+
+	for (i = 0; i < timeout; i++) {
+		ret = sfc_nand_read_feature(0xC0, &status);
+		if (ret != SFC_OK)
+			return SFC_NAND_ECC_ERROR;
+		if (!(status & (1 << 0)))
+			break;
+		sfc_delay(1);
+	}
+
+	ecc = (status >> 4) & 0x03;
+
+	if (ecc <= 1)
+		ret = SFC_NAND_ECC_OK;
+	else if (ecc == 2)
+		ret = SFC_NAND_ECC_ERROR;
+	else
+		ret = SFC_NAND_ECC_REFRESH;
+
+	return ret;
+}
+
+/*
+ * ecc spectial type1:
+ * 0x00, No bit errors were detected;
+ * 0x01, Bits errors were detected and corrected, bit error count
+ *	may reach the bit flip detection threshold;
+ * 0x10, Multiple bit errors were detected and not corrected;
+ * 0x11, Reserved.
+ */
+u32 sfc_nand_ecc_status_sp1(void)
+{
+	int ret;
+	u32 i;
+	u8 ecc;
+	u8 status;
+	u32 timeout = 1000 * 1000;
+
+	for (i = 0; i < timeout; i++) {
+		ret = sfc_nand_read_feature(0xC0, &status);
+		if (ret != SFC_OK)
+			return SFC_NAND_ECC_ERROR;
+		if (!(status & (1 << 0)))
+			break;
+		sfc_delay(1);
+	}
+
+	ecc = (status >> 4) & 0x03;
+
+	if (ecc == 0)
+		ret = SFC_NAND_ECC_OK;
+	else if (ecc == 1)
+		ret = SFC_NAND_ECC_REFRESH;
+	else
+		ret = SFC_NAND_ECC_ERROR;
+
+	return ret;
+}
+
+/*
+ * ecc spectial type3:
+ * [0x0000, 0x0011], No bit errors were detected;
+ * [0x0100, 0x0111], Bit errors were detected and corrected. Not
+ *	reach Flipping Bits;
+ * [0x1000, 0x1011], Multiple bit errors were detected and
+ *	not corrected.
+ * [0x1100, 0x1111], Bit error count equals the bit flip
+ *	detectionthreshold
+ */
+u32 sfc_nand_ecc_status_sp3(void)
+{
+	int ret;
+	u32 i;
+	u8 ecc;
+	u8 status, status1;
+	u32 timeout = 1000 * 1000;
+
+	for (i = 0; i < timeout; i++) {
+		ret = sfc_nand_read_feature(0xC0, &status);
+		if (ret != SFC_OK)
+			return SFC_NAND_ECC_ERROR;
+		ret = sfc_nand_read_feature(0xF0, &status1);
+		if (ret != SFC_OK)
+			return SFC_NAND_ECC_ERROR;
+		if (!(status & (1 << 0)))
+			break;
+		sfc_delay(1);
+	}
+
+	ecc = (status >> 4) & 0x03;
+	ecc = (ecc << 2) | ((status1 >> 4) & 0x03);
+	if (ecc < 7)
+		ret = SFC_NAND_ECC_OK;
+	else if (ecc == 7 || ecc >= 12)
+		ret = SFC_NAND_ECC_REFRESH;
+	else
+		ret = SFC_NAND_ECC_ERROR;
+
+	return ret;
+}
+
 static u32 sfc_nand_erase_block(u8 cs, u32 addr)
 {
 	int ret;
@@ -210,8 +328,7 @@ static u32 sfc_nand_read_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
 	int ret;
 	union SFCCMD_DATA sfcmd;
 	union SFCCTRL_DATA sfctrl;
-	u8 status;
-	u8 ecc;
+	u32 ecc_result;
 	u32 data_sz = 2048;
 	u32 spare_offs_1 = p_nand_info->spare_offs_1;
 	u32 spare_offs_2 = p_nand_info->spare_offs_2;
@@ -222,8 +339,11 @@ static u32 sfc_nand_read_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
 	sfcmd.b.addrbits = SFC_ADDR_24BITS;
 	sfc_request(sfcmd.d32, 0, addr, p_data);
 
-	sfc_nand_wait_busy(&status, 1000 * 1000);
-	ecc = (status >> 4) & 0x03;
+	if (p_nand_info->ecc_status)
+		ecc_result = p_nand_info->ecc_status();
+	else
+		ecc_result = sfc_nand_ecc_status();
+
 	if (sfc_nand_dev.read_lines == DATA_LINES_X4 &&
 	    p_nand_info->QE_address == 0xFF &&
 	    sfc_get_version() != SFC_VER_3)
@@ -245,41 +365,14 @@ static u32 sfc_nand_read_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
 	if (ret != SFC_OK)
 		return SFC_NAND_ECC_ERROR;
 
-	/*
-	 * ecc status:
-	 * 0, No bit errors were detected
-	 * 1, Bit errors were detected and corrected. If max_ecc_bits equals 1,
-	 *	Bit error count exceed the bit flip detection threshold.
-	 * 2, Multiple bit errors were detected and not corrected.
-	 * 3, If max_ecc_bits equals 1, reserved, else bit errors were detected
-	 *	and corrected, bit error count exceed the bit flip detection
-	 *	threshold
-	 */
-
-	if (ecc == 0) {
-		ret = SFC_NAND_ECC_OK;
-	} else if (ecc == 1) {
-		if (p_nand_info->max_ecc_bits == 1)
-			ret = SFC_NAND_ECC_REFRESH;
-		else
-			ret = SFC_NAND_ECC_OK;
-	} else if (ecc == 2) {
-		ret = SFC_NAND_ECC_ERROR;
-	} else {
-		if (p_nand_info->max_ecc_bits == 1)
-			ret = SFC_NAND_ECC_ERROR;
-		else
-			ret = SFC_NAND_ECC_REFRESH;
-	}
-
-	if (ret != SFC_NAND_ECC_OK) {
-		PRINT_SFC_E("%s[0x%x], ret=0x%x\n", __func__, addr, ret);
+	if (ecc_result != SFC_NAND_ECC_OK) {
+		PRINT_SFC_E("%s[0x%x], ret=0x%x\n", __func__, addr, ecc_result);
 		if (p_data)
 			PRINT_SFC_HEX("data:", p_data, 4, 8);
 		if (p_spare)
 			PRINT_SFC_HEX("spare:", p_spare, 4, 2);
 	}
-	return ret;
+	return ecc_result;
 }
 
 static int sfc_nand_read_id_raw(u8 *data)
diff --git a/drivers/rkflash/sfc_nand.h b/drivers/rkflash/sfc_nand.h
old mode 100644
new mode 100755
index 4b96d5b9f2..d5f0086ac7
--- a/drivers/rkflash/sfc_nand.h
+++ b/drivers/rkflash/sfc_nand.h
@@ -114,9 +114,12 @@ struct nand_info {
 
 	u8 spare_offs_1;
 	u8 spare_offs_2;
+	u32 (*ecc_status)(void);
 };
 
 u32 sfc_nand_init(void);
 int sfc_nand_read_id(u8 *buf);
+u32 sfc_nand_ecc_status_sp1(void);
+u32 sfc_nand_ecc_status_sp3(void);
 
 #endif

commit dbd4fb93593a946586bb62292b428b4eb371b341
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 27 10:09:03 2018 +0800

    configs: evb-px30: sync configure from evb-rk3326
    
    Change-Id: Ic86230e31828f6216dc8ec3b12ab0db84089d4e3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 421784c4ba..35803f05b9 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -49,6 +49,7 @@ CONFIG_REGULATOR_PWM=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_REGULATOR_RK8XX=y
 CONFIG_DM_CHARGE_DISPLAY=y
+CONFIG_CHARGE_ANIMATION=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_DM_RESET=y
@@ -85,3 +86,7 @@ CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V2=y
+CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
+CONFIG_TEST_ROCKCHIP=y

commit d443b7d532035de255d35965824fefc965ef385e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 25 14:49:06 2018 +0800

    make.sh: parse RKCHIP from .config
    
    this makes RKCHIP non relative about build command,
    but we have to do special fixup for rk3326 and rk3126
    board defconfig, because they contain px30 and rk3128
    in the .config file.
    
    Change-Id: Ia1974f2c8961b0a698d32f45effa4ddfe4177b0b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 5a4772fbea..0569f4851d 100755
--- a/make.sh
+++ b/make.sh
@@ -2,8 +2,6 @@
 set -e
 BOARD=$1
 SUBCMD=$2
-RKCHIP=$(echo ${BOARD##*-} | tr '[a-z]' '[A-Z]')
-ORG_RKCHIP=$RKCHIP
 JOB=`sed -n "N;/processor/p" /proc/cpuinfo|wc -l`
 SUPPORT_LIST=`ls configs/*-[r,p][x,v,k][0-9][0-9]*_defconfig`
 
@@ -20,6 +18,9 @@ TOOLCHAIN_ARM32=../prebuilts/gcc/linux-x86/arm/gcc-linaro-6.3.1-2017.05-x86_64_a
 TOOLCHAIN_ARM64=../prebuilts/gcc/linux-x86/aarch64/gcc-linaro-6.3.1-2017.05-x86_64_aarch64-linux-gnu/bin
 
 ########################################### User not touch #############################################
+# Declare global INI file searching index name for every chip, update in fixup_platform_configure()
+RKCHIP=
+
 # Declare global rkbin RKTOOLS and rkbin repository path, updated in prepare()
 RKTOOLS=
 RKBIN=
@@ -42,7 +43,7 @@ PLATFORM_AARCH32=
 
 prepare()
 {
-	local absolute_path cmd count
+	local absolute_path cmd
 
 	# Assign output directory
 	cmd=${SUBCMD%=*}
@@ -73,23 +74,6 @@ prepare()
 		exit 1
 	fi
 
-	# Get RKCHIP from exist .config file
-	if [ "$RKCHIP" = '' ]; then
-		count=`grep -c '^CONFIG_ROCKCHIP_[R,P][X,V,K][0-9][0-9]' ${OUTDIR}/.config`
-		RKCHIP=`grep '^CONFIG_ROCKCHIP_[R,P][X,V,K][0-9][0-9]' ${OUTDIR}/.config`
-		if [ $count -gt 1 ]; then
-			echo "Find $count SoC in .config file:"
-			echo "$RKCHIP"
-			echo
-			echo "I'm confused, please compile with [board], like: ./make.sh [board]"
-			exit 1
-		else
-			RKCHIP=${RKCHIP%=*}
-			RKCHIP=${RKCHIP##*_}
-			ORG_RKCHIP=$RKCHIP
-		fi
-	fi
-
 	# Initialize RKBIN and RKTOOLS
 	if [ -d ${RKBIN_TOOLS} ]; then
 		absolute_path=$(cd `dirname ${RKBIN_TOOLS}`; pwd)
@@ -183,9 +167,29 @@ sub_commands()
 #	4. fixup ARM64 cpu boot with AArch32
 fixup_platform_configure()
 {
-# <1> Fixup chip name for searching trust/loader ini files
-	if [ "$RKCHIP" = 'RK3228' -o "$RKCHIP" = 'RK3229' ]; then
-		RKCHIP=RK322X
+	local count plat
+
+# <1> Get RKCHIP for searching trust/loader ini files
+	count=`grep -c '^CONFIG_ROCKCHIP_[R,P][X,V,K][0-9][0-9]' ${OUTDIR}/.config`
+	RKCHIP=`grep '^CONFIG_ROCKCHIP_[R,P][X,V,K][0-9][0-9]' ${OUTDIR}/.config`
+
+	if [ $count -eq 1 ]; then
+		RKCHIP=${RKCHIP%=*}
+		RKCHIP=${RKCHIP##*_}
+	elif [ $count -gt 1 ]; then
+		# Is RK3126 ?
+		plat=`grep '^CONFIG_ROCKCHIP_[R,P][X,V,K][0-9][0-9]' ${OUTDIR}/.config | sed -n "/CONFIG_ROCKCHIP_RK3126=y/p"`
+		if [ "$plat" = 'CONFIG_ROCKCHIP_RK3126=y' ]; then
+			RKCHIP=RK3126
+		fi
+		# Is RK3326 ?
+		plat=`grep '^CONFIG_ROCKCHIP_[R,P][X,V,K][0-9][0-9]' ${OUTDIR}/.config | sed -n "/CONFIG_ROCKCHIP_RK3326=y/p"`
+		if [ "$plat" = 'CONFIG_ROCKCHIP_RK3326=y' ]; then
+			RKCHIP=RK3326
+		fi
+	else
+		echo "Can't get Rockchip SoC definition in .config"
+		exit 1
 	fi
 
 # <2> Fixup rsa/sha pack mode for platforms
@@ -310,9 +314,9 @@ finish()
 {
 	echo
 	if [ "$BOARD" = '' ]; then
-		echo "Platform ${ORG_RKCHIP}${PLATFORM_AARCH32} is build OK, with exist .config"
+		echo "Platform ${RKCHIP}${PLATFORM_AARCH32} is build OK, with exist .config"
 	else
-		echo "Platform ${ORG_RKCHIP}${PLATFORM_AARCH32} is build OK, with new .config(make ${BOARD}_defconfig)"
+		echo "Platform ${RKCHIP}${PLATFORM_AARCH32} is build OK, with new .config(make ${BOARD}_defconfig)"
 	fi
 }
 

commit dda95de75171f2bc385b904940b757feca810912
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Wed Jun 20 17:26:23 2018 +0800

    rockchip: rkflash: move ftl_free to ftl lib
    
    1.Move ftl_free to .S code to avoid compile redefinition error;
    2.Add ftl code date.
    
    Change-Id: I098e5a1b3185d2e21dcbc68ae316819eb748494f
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/rk_sftl_arm_v7.S b/drivers/rkflash/rk_sftl_arm_v7.S
index e383c55612..ba840ce85f 100644
--- a/drivers/rkflash/rk_sftl_arm_v7.S
+++ b/drivers/rkflash/rk_sftl_arm_v7.S
@@ -2,8 +2,8 @@
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:	GPL-2.0
+ * date: 2018-06-20
  */
-
 	.arch armv7-a
 	.eabi_attribute 20, 1
 	.eabi_attribute 21, 1
@@ -27,9 +27,9 @@
 	.fpu softvfp
 	.type	l2p_addr_tran.isra.0, %function
 l2p_addr_tran.isra.0:
-.LFB351:
-	.file 1 "drivers/rkflash/sftl_flash.c"
-	.loc 1 54 0
+.LFB352:
+	.file 1 "drivers/rkflash/rksftl/sftl_flash.c"
+	.loc 1 58 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
@@ -44,58 +44,58 @@ l2p_addr_tran.isra.0:
 	.cfi_offset 8, -12
 	.cfi_offset 10, -8
 	.cfi_offset 14, -4
-	.loc 1 70 0
+	.loc 1 74 0
 	lsrs	r7, r0, #10
-	.loc 1 62 0
+	.loc 1 66 0
 	ldr	r3, .L3
-	.loc 1 54 0
+	.loc 1 58 0
 	mov	r8, r1
 	mov	r6, r0
-	.loc 1 71 0
+	.loc 1 75 0
 	uxth	r0, r7
-	.loc 1 54 0
+	.loc 1 58 0
 	mov	r10, r2
-	.loc 1 72 0
+	.loc 1 76 0
 	uxth	r7, r7
-	.loc 1 62 0
+	.loc 1 66 0
 	ldrh	r4, [r3, #8]
 .LVL1:
-	.loc 1 74 0
+	.loc 1 78 0
 	ubfx	r6, r6, #0, #10
-	.loc 1 63 0
+	.loc 1 67 0
 	ldrh	r5, [r3, #10]
 .LVL2:
-	.loc 1 64 0
+	.loc 1 68 0
 	ldrh	r3, [r3, #14]
 	cmp	r3, #4
-	.loc 1 65 0
+	.loc 1 69 0
 	itt	eq
 	lsreq	r4, r4, #1
 .LVL3:
-	.loc 1 66 0
+	.loc 1 70 0
 	lsleq	r5, r5, #1
 .LVL4:
-	.loc 1 71 0
+	.loc 1 75 0
 	mov	r1, r4
 .LVL5:
-	.loc 1 66 0
+	.loc 1 70 0
 	it	eq
 	uxtheq	r5, r5
 .LVL6:
-	.loc 1 71 0
+	.loc 1 75 0
 	bl	__aeabi_uidiv
 .LVL7:
 	uxth	r0, r0
 .LVL8:
-	.loc 1 72 0
+	.loc 1 76 0
 	mls	r4, r0, r4, r7
 .LVL9:
-	.loc 1 74 0
+	.loc 1 78 0
 	mla	r4, r5, r4, r6
 	str	r4, [r8]
-	.loc 1 75 0
+	.loc 1 79 0
 	str	r0, [r10]
-	.loc 1 78 0
+	.loc 1 82 0
 	movs	r0, #0
 .LVL10:
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
@@ -105,7 +105,7 @@ l2p_addr_tran.isra.0:
 .L3:
 	.word	.LANCHOR0
 	.cfi_endproc
-.LFE351:
+.LFE352:
 	.size	l2p_addr_tran.isra.0, .-l2p_addr_tran.isra.0
 	.section	.text.ftl_set_blk_mode.part.7,"ax",%progbits
 	.align	1
@@ -115,8 +115,8 @@ l2p_addr_tran.isra.0:
 	.fpu softvfp
 	.type	ftl_set_blk_mode.part.7, %function
 ftl_set_blk_mode.part.7:
-.LFB358:
-	.file 2 "drivers/rkflash/sftl_sys.c"
+.LFB359:
+	.file 2 "drivers/rkflash/rksftl/sftl_sys.c"
 	.loc 2 1346 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
@@ -140,7 +140,7 @@ ftl_set_blk_mode.part.7:
 .L6:
 	.word	.LANCHOR1
 	.cfi_endproc
-.LFE358:
+.LFE359:
 	.size	ftl_set_blk_mode.part.7, .-ftl_set_blk_mode.part.7
 	.section	.text.Ftl_log2,"ax",%progbits
 	.align	1
@@ -152,7 +152,7 @@ ftl_set_blk_mode.part.7:
 	.type	Ftl_log2, %function
 Ftl_log2:
 .LFB205:
-	.file 3 "drivers/rkflash/sftl_plat.c"
+	.file 3 "drivers/rkflash/rksftl/sftl_plat.c"
 	.loc 3 128 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
@@ -596,8 +596,8 @@ IsBlkInVendorPart:
 	ldr	r3, .L34
 	ldrh	r3, [r3]
 	cbz	r3, .L33
-.LBB164:
-.LBB165:
+.LBB166:
+.LBB167:
 	.loc 3 519 0
 	ldr	r3, .L34+4
 	.loc 3 518 0
@@ -611,16 +611,16 @@ IsBlkInVendorPart:
 	cmp	r3, r2
 	bne	.L30
 .L33:
-.LBE165:
-.LBE164:
+.LBE167:
+.LBE166:
 	.loc 3 524 0
 	movs	r0, #0
 .LVL37:
 	bx	lr
 .LVL38:
 .L30:
-.LBB167:
-.LBB166:
+.LBB169:
+.LBB168:
 	.loc 3 519 0
 	ldrh	r1, [r3], #2
 	cmp	r0, r1
@@ -628,8 +628,8 @@ IsBlkInVendorPart:
 	.loc 3 520 0
 	movs	r0, #1
 .LVL39:
-.LBE166:
-.LBE167:
+.LBE168:
+.LBE169:
 	.loc 3 525 0
 	bx	lr
 .L35:
@@ -678,7 +678,7 @@ sftl_get_density:
 	.type	FtlBbmMapBadBlock, %function
 FtlBbmMapBadBlock:
 .LFB225:
-	.file 4 "drivers/rkflash/sftl_bbm.c"
+	.file 4 "drivers/rkflash/rksftl/sftl_bbm.c"
 	.loc 4 5 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
@@ -1317,24 +1317,24 @@ IsInFreeQueue:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 .LVL99:
-.LBB168:
-.LBB169:
+.LBB170:
+.LBB171:
 	.loc 2 94 0
 	ldr	r3, .L90
-.LBE169:
-.LBE168:
+.LBE171:
+.LBE170:
 	.loc 2 147 0
 	push	{r4, r5, lr}
 	.cfi_def_cfa_offset 12
 	.cfi_offset 4, -12
 	.cfi_offset 5, -8
 	.cfi_offset 14, -4
-.LBB171:
-.LBB170:
+.LBB173:
+.LBB172:
 	.loc 2 94 0
 	ldrh	r4, [r3, #6]
-.LBE170:
-.LBE171:
+.LBE172:
+.LBE173:
 	.loc 2 152 0
 	cmp	r4, #1024
 	beq	.L88
@@ -1394,17 +1394,17 @@ FtlFreeSysBlkQueueOut:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 .LVL106:
-.LBB172:
-.LBB173:
+.LBB174:
+.LBB175:
 	.loc 2 89 0
 	ldr	r2, .L95
 	ldrh	r1, [r2, #6]
-.LBE173:
-.LBE172:
+.LBE175:
+.LBE174:
 	.loc 2 168 0
 	cbz	r1, .L94
 .LVL107:
-.LBB174:
+.LBB176:
 	.loc 2 170 0
 	ldrh	r3, [r2, #2]
 	.loc 2 171 0
@@ -1423,7 +1423,7 @@ FtlFreeSysBlkQueueOut:
 	bx	lr
 .LVL109:
 .L94:
-.LBE174:
+.LBE176:
 	.loc 2 166 0
 	movw	r0, #65535
 .LVL110:
@@ -1673,21 +1673,21 @@ INSERT_DATA_LIST:
 	cmp	r2, r3
 	bcs	.L113
 .LVL143:
-.LBB177:
-.LBB178:
+.LBB179:
+.LBB180:
 	movs	r2, #189
 	ldr	r1, .L115+8
 	ldr	r0, .L115+12
-.LBE178:
-.LBE177:
+.LBE180:
+.LBE179:
 	.loc 2 190 0
 	pop	{r3, lr}
 	.cfi_remember_state
 	.cfi_restore 14
 	.cfi_restore 3
 	.cfi_def_cfa_offset 0
-.LBB180:
-.LBB179:
+.LBB182:
+.LBB181:
 	.loc 2 189 0
 	b	printf
 .LVL144:
@@ -1701,8 +1701,8 @@ INSERT_DATA_LIST:
 	.word	.LANCHOR5
 	.word	.LANCHOR46
 	.word	.LC1
-.LBE179:
-.LBE180:
+.LBE181:
+.LBE182:
 	.cfi_endproc
 .LFE248:
 	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
@@ -1883,21 +1883,21 @@ INSERT_FREE_LIST:
 	cmp	r2, r3
 	bcs	.L126
 .LVL162:
-.LBB183:
-.LBB184:
+.LBB185:
+.LBB186:
 	movs	r2, #182
 	ldr	r1, .L128+8
 	ldr	r0, .L128+12
-.LBE184:
-.LBE183:
+.LBE186:
+.LBE185:
 	.loc 2 183 0
 	pop	{r3, lr}
 	.cfi_remember_state
 	.cfi_restore 14
 	.cfi_restore 3
 	.cfi_def_cfa_offset 0
-.LBB186:
-.LBB185:
+.LBB188:
+.LBB187:
 	.loc 2 182 0
 	b	printf
 .LVL163:
@@ -1911,8 +1911,8 @@ INSERT_FREE_LIST:
 	.word	.LANCHOR5
 	.word	.LANCHOR49
 	.word	.LC1
-.LBE185:
-.LBE186:
+.LBE187:
+.LBE188:
 	.cfi_endproc
 .LFE247:
 	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
@@ -2256,8 +2256,8 @@ List_update_data_list:
 	cmp	r3, r0
 	beq	.L159
 .LVL199:
-.LBB189:
-.LBB190:
+.LBB191:
+.LBB192:
 	.loc 2 416 0 is_stmt 1
 	ldr	r6, .L165+12
 	movs	r3, #6
@@ -2359,8 +2359,8 @@ List_update_data_list:
 	bl	INSERT_DATA_LIST
 .LVL215:
 .L159:
-.LBE190:
-.LBE189:
+.LBE192:
+.LBE191:
 	.loc 2 439 0
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, pc}
@@ -2420,8 +2420,8 @@ ftl_map_blk_alloc_new_blk:
 	bcc	.L170
 .LVL219:
 .L171:
-.LBB193:
-.LBB194:
+.LBB195:
+.LBB196:
 	.loc 2 532 0 is_stmt 1
 	mov	r2, #532
 	ldr	r1, .L177
@@ -2431,8 +2431,8 @@ ftl_map_blk_alloc_new_blk:
 	b	.L172
 .LVL221:
 .L170:
-.LBE194:
-.LBE193:
+.LBE196:
+.LBE195:
 	.loc 2 521 0
 	mov	r7, r2
 	adds	r3, r3, #1
@@ -2658,39 +2658,39 @@ FtlUpdateVaildLpn:
 .L192:
 	.loc 2 886 0
 	movs	r3, #0
-.LBB197:
-.LBB198:
+.LBB199:
+.LBB200:
 	.loc 2 888 0
 	ldr	r0, .L201+4
 .LVL245:
-.LBE198:
-.LBE197:
+.LBE200:
+.LBE199:
 	.loc 2 886 0
 	strh	r3, [r1]	@ movhi
-.LBB202:
-.LBB199:
+.LBB204:
+.LBB201:
 	.loc 2 890 0
 	movw	r6, #65535
 	ldr	r1, .L201+8
 	ldrh	r4, [r0]
 	mov	r0, r3
-.LBE199:
-.LBE202:
+.LBE201:
+.LBE204:
 	.loc 2 887 0
 	ldr	r2, .L201+12
-.LBB203:
-.LBB200:
+.LBB205:
+.LBB202:
 	.loc 2 890 0
 	ldr	r1, [r1]
-.LBE200:
-.LBE203:
+.LBE202:
+.LBE205:
 	.loc 2 887 0
 	str	r3, [r2]
 .LVL246:
 	add	r4, r1, r4, lsl #1
 .L193:
-.LBB204:
-.LBB201:
+.LBB206:
+.LBB203:
 	.loc 2 888 0
 	cmp	r1, r4
 	bne	.L195
@@ -2714,8 +2714,8 @@ FtlUpdateVaildLpn:
 	.word	.LANCHOR5
 	.word	.LANCHOR43
 	.word	.LANCHOR60
-.LBE201:
-.LBE204:
+.LBE203:
+.LBE206:
 	.cfi_endproc
 .LFE269:
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
@@ -2924,8 +2924,8 @@ FtlSlcSuperblockCheck:
 	cmp	r2, r3
 	beq	.L219
 .LVL264:
-.LBB207:
-.LBB208:
+.LBB209:
+.LBB210:
 	.loc 2 2020 0
 	ldrb	r2, [r0, #6]	@ zero_extendqisi2
 	.loc 2 2025 0
@@ -2973,8 +2973,8 @@ FtlSlcSuperblockCheck:
 	.align	2
 .L225:
 	.word	.LANCHOR3
-.LBE208:
-.LBE207:
+.LBE210:
+.LBE209:
 	.cfi_endproc
 .LFE285:
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
@@ -4147,7 +4147,7 @@ FtlPrintInfo2buf:
 	add	r4, r4, r0
 .LVL436:
 .L260:
-.LBB209:
+.LBB211:
 	.loc 3 87 0
 	movs	r0, #0
 	ldr	r5, .L272+68
@@ -4199,8 +4199,8 @@ FtlPrintInfo2buf:
 	.loc 3 88 0 discriminator 2
 	bne	.L262
 .L261:
-.LBE209:
-.LBB210:
+.LBE211:
+.LBB212:
 	.loc 3 96 0
 	ldr	r3, .L272+76
 .LVL443:
@@ -4283,7 +4283,7 @@ FtlPrintInfo2buf:
 	.word	-1431655765
 	.word	.LANCHOR40
 	.word	.LC69
-.LBE210:
+.LBE212:
 	.cfi_endproc
 .LFE203:
 	.size	FtlPrintInfo2buf, .-FtlPrintInfo2buf
@@ -4665,8 +4665,8 @@ free_data_superblock:
 	cmp	r0, r2
 	beq	.L309
 .LVL486:
-.LBB213:
-.LBB214:
+.LBB215:
+.LBB216:
 	.loc 2 2525 0
 	ldr	r2, .L310
 	movs	r1, #0
@@ -4676,8 +4676,8 @@ free_data_superblock:
 	bl	INSERT_FREE_LIST
 .LVL487:
 .L309:
-.LBE214:
-.LBE213:
+.LBE216:
+.LBE215:
 	.loc 2 2528 0
 	movs	r0, #0
 	pop	{r3, pc}
@@ -4867,7 +4867,7 @@ get_new_active_ppa:
 	.type	FtlGcBufInit, %function
 FtlGcBufInit:
 .LFB306:
-	.file 5 "drivers/rkflash/sftl_gc.c"
+	.file 5 "drivers/rkflash/rksftl/sftl_gc.c"
 	.loc 5 22 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
@@ -5541,8 +5541,8 @@ FtlGcReFreshBadBlk:
 	itt	cs
 	movcs	r3, #0
 	strhcs	r3, [r4]	@ movhi
-.LBB217:
-.LBB218:
+.LBB219:
+.LBB220:
 	.loc 5 383 0
 	ldr	r3, .L383+12
 	ldrh	r2, [r4]
@@ -5556,8 +5556,8 @@ FtlGcReFreshBadBlk:
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
 .L378:
-.LBE218:
-.LBE217:
+.LBE220:
+.LBE219:
 	.loc 5 387 0
 	movs	r0, #0
 	pop	{r4, pc}
@@ -5571,6 +5571,33 @@ FtlGcReFreshBadBlk:
 	.cfi_endproc
 .LFE319:
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
+	.section	.text.ftl_free,"ax",%progbits
+	.align	1
+	.global	ftl_free
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_free, %function
+ftl_free:
+.LFB340:
+	.loc 1 24 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL549:
+.LBB221:
+.LBB222:
+	.file 6 "include/linux/compat.h"
+	.loc 6 80 0
+	b	free
+.LVL550:
+.LBE222:
+.LBE221:
+	.cfi_endproc
+.LFE340:
+	.size	ftl_free, .-ftl_free
 	.section	.text.ftl_malloc,"ax",%progbits
 	.align	1
 	.global	ftl_malloc
@@ -5580,19 +5607,19 @@ FtlGcReFreshBadBlk:
 	.fpu softvfp
 	.type	ftl_malloc, %function
 ftl_malloc:
-.LFB340:
-	.loc 1 24 0
+.LFB341:
+	.loc 1 28 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL549:
-	.loc 1 25 0
+.LVL551:
+	.loc 1 29 0
 	movs	r1, #0
 	b	kmalloc
-.LVL550:
+.LVL552:
 	.cfi_endproc
-.LFE340:
+.LFE341:
 	.size	ftl_malloc, .-ftl_malloc
 	.section	.text.rknand_print_hex,"ax",%progbits
 	.align	1
@@ -5603,12 +5630,12 @@ ftl_malloc:
 	.fpu softvfp
 	.type	rknand_print_hex, %function
 rknand_print_hex:
-.LFB341:
-	.loc 1 29 0
+.LFB342:
+	.loc 1 33 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL551:
+.LVL553:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
 	.cfi_offset 4, -32
@@ -5619,26 +5646,26 @@ rknand_print_hex:
 	.cfi_offset 10, -12
 	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	.loc 1 36 0
+	.loc 1 40 0
 	movs	r6, #0
-	.loc 1 29 0
+	.loc 1 33 0
 	mov	fp, r0
 	mov	r7, r1
-.LVL552:
+.LVL554:
 	mov	r8, r2
 	mov	r10, r3
-	.loc 1 35 0
+	.loc 1 39 0
 	mov	r5, r6
-	.loc 1 36 0
+	.loc 1 40 0
 	mov	r4, r6
-.LVL553:
-.L387:
-	.loc 1 36 0 is_stmt 0 discriminator 1
+.LVL555:
+.L388:
+	.loc 1 40 0 is_stmt 0 discriminator 1
 	cmp	r4, r10
-	bcc	.L393
-	.loc 1 51 0 is_stmt 1
-	ldr	r0, .L396
-	.loc 1 52 0
+	bcc	.L394
+	.loc 1 55 0 is_stmt 1
+	ldr	r0, .L397
+	.loc 1 56 0
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_remember_state
 	.cfi_restore 14
@@ -5650,73 +5677,73 @@ rknand_print_hex:
 	.cfi_restore 5
 	.cfi_restore 4
 	.cfi_def_cfa_offset 0
-.LVL554:
-	.loc 1 51 0
+.LVL556:
+	.loc 1 55 0
 	b	printf
-.LVL555:
-.L393:
+.LVL557:
+.L394:
 	.cfi_restore_state
-	.loc 1 37 0
-	cbnz	r5, .L388
-	.loc 1 38 0
+	.loc 1 41 0
+	cbnz	r5, .L389
+	.loc 1 42 0
 	mov	r2, r6
 	mov	r1, fp
-	ldr	r0, .L396+4
+	ldr	r0, .L397+4
 	bl	printf
-.LVL556:
-.L388:
-	.loc 1 40 0
+.LVL558:
+.L389:
+	.loc 1 44 0
 	cmp	r8, #4
-	bne	.L389
-	.loc 1 41 0
+	bne	.L390
+	.loc 1 45 0
 	ldr	r1, [r7, r4, lsl #2]
+.L396:
+	.loc 1 47 0
+	ldr	r0, .L397+8
 .L395:
-	.loc 1 43 0
-	ldr	r0, .L396+8
-.L394:
-	.loc 1 46 0
+	.loc 1 50 0
 	adds	r5, r5, #1
-.LVL557:
-	.loc 1 45 0
+.LVL559:
+	.loc 1 49 0
 	bl	printf
-.LVL558:
-	.loc 1 46 0
+.LVL560:
+	.loc 1 50 0
 	cmp	r5, #15
-	bls	.L392
-.LVL559:
-	.loc 1 47 0
+	bls	.L393
+.LVL561:
+	.loc 1 51 0
 	movs	r5, #0
-	.loc 1 48 0
-	ldr	r0, .L396
+	.loc 1 52 0
+	ldr	r0, .L397
 	bl	printf
-.LVL560:
-.L392:
-	.loc 1 36 0 discriminator 2
+.LVL562:
+.L393:
+	.loc 1 40 0 discriminator 2
 	adds	r4, r4, #1
-.LVL561:
+.LVL563:
 	add	r6, r6, r8
-	b	.L387
-.L389:
-	.loc 1 42 0
+	b	.L388
+.L390:
+	.loc 1 46 0
 	cmp	r8, #2
-	bne	.L391
-	.loc 1 43 0
+	bne	.L392
+	.loc 1 47 0
 	ldrsh	r1, [r7, r4, lsl #1]
-	b	.L395
-.L391:
-	.loc 1 45 0
+	b	.L396
+.L392:
+	.loc 1 49 0
 	ldrb	r1, [r7, r4]	@ zero_extendqisi2
-	ldr	r0, .L396+12
-	b	.L394
-.L397:
+	ldr	r0, .L397+12
+	b	.L395
+.L398:
 	.align	2
-.L396:
+.L397:
 	.word	.LC78
 	.word	.LC75
 	.word	.LC76
 	.word	.LC77
 	.cfi_endproc
-.LFE341:
+.LFE342:
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.FlashReadPages,"ax",%progbits
 	.align	1
@@ -5727,12 +5754,12 @@ rknand_print_hex:
 	.fpu softvfp
 	.type	FlashReadPages, %function
 FlashReadPages:
-.LFB343:
-	.loc 1 81 0
+.LFB344:
+	.loc 1 85 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL562:
+.LVL564:
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 48
 	.cfi_offset 4, -32
@@ -5743,75 +5770,75 @@ FlashReadPages:
 	.cfi_offset 10, -12
 	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	.loc 1 81 0
+	.loc 1 85 0
 	mov	r8, r1
-	.loc 1 83 0
-	ldr	r3, .L416
-	mov	r4, r0
 	.loc 1 87 0
+	ldr	r3, .L417
+	mov	r4, r0
+	.loc 1 91 0
 	movs	r5, #0
-	.loc 1 88 0
-	ldr	fp, .L416+12
-	.loc 1 83 0
+	.loc 1 92 0
+	ldr	fp, .L417+12
+	.loc 1 87 0
 	ldrh	r2, [r3, #12]
-.LVL563:
+.LVL565:
 	mov	r10, r3
 	str	r2, [sp, #4]
-.LVL564:
-.L399:
-	.loc 1 87 0 discriminator 1
+.LVL566:
+.L400:
+	.loc 1 91 0 discriminator 1
 	cmp	r5, r8
-	bne	.L406
-	.loc 1 108 0
+	bne	.L407
+	.loc 1 112 0
 	movs	r0, #0
 	add	sp, sp, #16
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL565:
-.L406:
+.LVL567:
+.L407:
 	.cfi_restore_state
-	.loc 1 88 0
+	.loc 1 92 0
 	ldr	r3, [r4, #8]
-	cbz	r3, .L400
-	.loc 1 88 0 is_stmt 0 discriminator 2
+	cbz	r3, .L401
+	.loc 1 92 0 is_stmt 0 discriminator 2
 	ldr	r3, [r4, #12]
-	cbnz	r3, .L401
-.L400:
-	.loc 1 88 0 discriminator 3
-	movs	r2, #88
-	ldr	r1, .L416+4
+	cbnz	r3, .L402
+.L401:
+	.loc 1 92 0 discriminator 3
+	movs	r2, #92
+	ldr	r1, .L417+4
 	mov	r0, fp
 	bl	printf
-.LVL566:
-.L401:
-	.loc 1 90 0 is_stmt 1
-	ldr	r6, .L416+8
-	.loc 1 89 0
+.LVL568:
+.L402:
+	.loc 1 94 0 is_stmt 1
+	ldr	r6, .L417+8
+	.loc 1 93 0
 	add	r2, sp, #8
 	add	r1, sp, #12
 	ldr	r0, [r4, #4]
 	bl	l2p_addr_tran.isra.0
-.LVL567:
-	.loc 1 90 0
+.LVL569:
+	.loc 1 94 0
 	ldr	r3, [r4, #12]
 	ldr	r2, [r4, #8]
 	ldr	r1, [sp, #12]
 	ldrb	r0, [sp, #8]	@ zero_extendqisi2
 	ldr	r7, [r6, #12]
 	blx	r7
-.LVL568:
-	.loc 1 95 0
+.LVL570:
+	.loc 1 99 0
 	ldrh	r3, [r10, #14]
-	.loc 1 94 0
+	.loc 1 98 0
 	str	r0, [r4]
-	.loc 1 95 0
+	.loc 1 99 0
 	cmp	r3, #4
-	bne	.L403
-	.loc 1 96 0
+	bne	.L404
+	.loc 1 100 0
 	ldr	r0, [sp, #4]
-.LVL569:
+.LVL571:
 	ldr	r3, [r4, #12]
 	ldr	r2, [r4, #8]
 	ldr	r1, [sp, #12]
@@ -5821,45 +5848,45 @@ FlashReadPages:
 	add	r1, r1, r0
 	ldrb	r0, [sp, #8]	@ zero_extendqisi2
 	blx	r6
-.LVL570:
-	.loc 1 100 0
+.LVL572:
+	.loc 1 104 0
 	adds	r0, r0, #1
-.LVL571:
-	beq	.L404
-	.loc 1 101 0 discriminator 1
+.LVL573:
+	beq	.L405
+	.loc 1 105 0 discriminator 1
 	ldr	r3, [r4, #12]
-	.loc 1 100 0 discriminator 1
+	.loc 1 104 0 discriminator 1
 	ldr	r2, [r3, #12]
 	adds	r2, r2, #1
-	bne	.L403
-	.loc 1 101 0
+	bne	.L404
+	.loc 1 105 0
 	ldr	r2, [r3, #8]
 	adds	r2, r2, #1
-	bne	.L403
-	.loc 1 102 0
+	bne	.L404
+	.loc 1 106 0
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L403
-.L404:
-	.loc 1 104 0
+	beq	.L404
+.L405:
+	.loc 1 108 0
 	mov	r3, #-1
 	str	r3, [r4]
-.LVL572:
-.L403:
-	.loc 1 87 0 discriminator 2
+.LVL574:
+.L404:
+	.loc 1 91 0 discriminator 2
 	adds	r5, r5, #1
-.LVL573:
+.LVL575:
 	adds	r4, r4, #20
-	b	.L399
-.L417:
+	b	.L400
+.L418:
 	.align	2
-.L416:
+.L417:
 	.word	.LANCHOR0
 	.word	.LANCHOR106
 	.word	.LANCHOR107
 	.word	.LC1
 	.cfi_endproc
-.LFE343:
+.LFE344:
 	.size	FlashReadPages, .-FlashReadPages
 	.section	.text.FtlLoadFactoryBbt,"ax",%progbits
 	.align	1
@@ -5876,7 +5903,7 @@ FtlLoadFactoryBbt:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	.loc 4 286 0
-	ldr	r3, .L428
+	ldr	r3, .L429
 	.loc 4 279 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
@@ -5891,54 +5918,54 @@ FtlLoadFactoryBbt:
 	.loc 4 289 0
 	movs	r6, #0
 	.loc 4 286 0
-	ldr	r5, .L428+4
+	ldr	r5, .L429+4
 	ldr	r3, [r3]
-	ldr	r7, .L428+8
+	ldr	r7, .L429+8
 	.loc 4 291 0
-	ldr	r10, .L428+20
+	ldr	r10, .L429+20
 	.loc 4 286 0
 	str	r3, [r5, #8]
 	.loc 4 287 0
-	ldr	r3, .L428+12
+	ldr	r3, .L429+12
 	ldr	r8, [r3]
 	str	r8, [r5, #12]
-.LVL574:
-.L419:
+.LVL576:
+.L420:
 	.loc 4 289 0 discriminator 1
-	ldr	r3, .L428+16
+	ldr	r3, .L429+16
 	ldrh	r3, [r3]
 	cmp	r6, r3
-	bcc	.L424
+	bcc	.L425
 	.loc 4 314 0
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL575:
-.L424:
+.LVL577:
+.L425:
 	.loc 4 291 0
 	ldrh	r4, [r10]
 	.loc 4 290 0
 	movw	r3, #65535
 	.loc 4 294 0
-	ldr	fp, .L428+4
+	ldr	fp, .L429+4
 	.loc 4 290 0
 	strh	r3, [r7, #2]!	@ movhi
 	.loc 4 291 0
 	subs	r4, r4, #1
 	uxth	r4, r4
-.LVL576:
-.L420:
+.LVL578:
+.L421:
 	.loc 4 291 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r10]
 	sub	r2, r3, #15
 	cmp	r2, r4
-	bgt	.L422
-.LVL577:
+	bgt	.L423
+.LVL579:
 	.loc 4 292 0 is_stmt 1
 	mla	r3, r6, r3, r4
-.LVL578:
+.LVL580:
 	.loc 4 294 0
 	movs	r2, #1
-.LVL579:
+.LVL581:
 	mov	r1, r2
 	mov	r0, fp
 	.loc 4 292 0
@@ -5947,33 +5974,33 @@ FtlLoadFactoryBbt:
 	str	r3, [r5, #4]
 	.loc 4 294 0
 	bl	FlashReadPages
-.LVL580:
+.LVL582:
 	.loc 4 295 0
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L421
+	beq	.L422
 	.loc 4 301 0
 	ldrh	r2, [r8]
 	movw	r3, #61664
 	cmp	r2, r3
-	bne	.L421
+	bne	.L422
 	.loc 4 303 0
 	strh	r4, [r7]	@ movhi
-.L422:
+.L423:
 	.loc 4 289 0 discriminator 2
 	adds	r6, r6, #1
-.LVL581:
-	b	.L419
-.L421:
+.LVL583:
+	b	.L420
+.L422:
 	.loc 4 291 0 discriminator 2
 	subs	r4, r4, #1
-.LVL582:
+.LVL584:
 	uxth	r4, r4
-.LVL583:
-	b	.L420
-.L429:
+.LVL585:
+	b	.L421
+.L430:
 	.align	2
-.L428:
+.L429:
 	.word	.LANCHOR39
 	.word	.LANCHOR108
 	.word	.LANCHOR37+10
@@ -5997,7 +6024,7 @@ FtlGetLastWrittenPage:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL584:
+.LVL586:
 	.loc 2 51 0
 	cmp	r1, #1
 	.loc 2 47 0
@@ -6011,7 +6038,7 @@ FtlGetLastWrittenPage:
 	.cfi_offset 14, -4
 	.loc 2 51 0
 	it	eq
-	ldreq	r3, .L439
+	ldreq	r3, .L440
 	.loc 2 47 0
 	sub	sp, sp, #88
 	.cfi_def_cfa_offset 112
@@ -6021,48 +6048,48 @@ FtlGetLastWrittenPage:
 	mov	r2, r1
 	.loc 2 51 0
 	it	ne
-	ldrne	r3, .L439+4
+	ldrne	r3, .L440+4
 	.loc 2 47 0
 	mov	r6, r1
 	.loc 2 58 0
 	add	r0, sp, #4
-.LVL585:
+.LVL587:
 	movs	r1, #1
-.LVL586:
+.LVL588:
 	.loc 2 51 0
 	ldrh	r5, [r3]
-.LVL587:
+.LVL589:
 	.loc 2 53 0
-	ldr	r3, .L439+8
+	ldr	r3, .L440+8
 	.loc 2 56 0
 	subs	r5, r5, #1
-.LVL588:
+.LVL590:
 	sxth	r5, r5
-.LVL589:
+.LVL591:
 	.loc 2 53 0
 	str	r3, [sp, #12]
 	.loc 2 54 0
 	add	r3, sp, #24
 	str	r3, [sp, #16]
-.LVL590:
+.LVL592:
 	.loc 2 57 0
 	orr	r3, r5, r7
 	str	r3, [sp, #8]
 	.loc 2 58 0
 	bl	FlashReadPages
-.LVL591:
+.LVL593:
 	.loc 2 59 0
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	bne	.L433
+	bne	.L434
 	mov	r8, #0
-.LVL592:
-.L434:
+.LVL594:
+.L435:
 	.loc 2 60 0
 	cmp	r8, r5
-	ble	.L437
-.LVL593:
-.L433:
+	ble	.L438
+.LVL595:
+.L434:
 	.loc 2 73 0
 	mov	r0, r5
 	add	sp, sp, #88
@@ -6070,8 +6097,8 @@ FtlGetLastWrittenPage:
 	.cfi_def_cfa_offset 24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL594:
-.L437:
+.LVL596:
+.L438:
 	.cfi_restore_state
 	.loc 2 61 0
 	add	r3, r8, r5
@@ -6084,39 +6111,39 @@ FtlGetLastWrittenPage:
 	add	r0, sp, #4
 	.loc 2 61 0
 	asrs	r4, r3, #1
-.LVL595:
+.LVL597:
 	.loc 2 62 0
 	sxth	r3, r4
 	orrs	r3, r3, r7
 	str	r3, [sp, #8]
 	.loc 2 63 0
 	bl	FlashReadPages
-.LVL596:
+.LVL598:
 	.loc 2 65 0
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	bne	.L435
+	bne	.L436
 	.loc 2 65 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
-	bne	.L435
+	bne	.L436
 	.loc 2 66 0 is_stmt 1
 	subs	r4, r4, #1
-.LVL597:
-	sxth	r5, r4
-.LVL598:
-	b	.L434
 .LVL599:
-.L435:
+	sxth	r5, r4
+.LVL600:
+	b	.L435
+.LVL601:
+.L436:
 	.loc 2 68 0
 	adds	r4, r4, #1
-.LVL600:
+.LVL602:
 	sxth	r8, r4
-.LVL601:
-	b	.L434
-.L440:
+.LVL603:
+	b	.L435
+.L441:
 	.align	2
-.L439:
+.L440:
 	.word	.LANCHOR20
 	.word	.LANCHOR19
 	.word	ftl_temp_buf
@@ -6132,12 +6159,12 @@ FtlGetLastWrittenPage:
 	.fpu softvfp
 	.type	FlashProgPages, %function
 FlashProgPages:
-.LFB344:
-	.loc 1 111 0
+.LFB345:
+	.loc 1 115 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL602:
+.LVL604:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
 	.cfi_offset 4, -32
@@ -6150,84 +6177,84 @@ FlashProgPages:
 	.cfi_offset 14, -4
 	sub	sp, sp, #40
 	.cfi_def_cfa_offset 72
-	.loc 1 111 0
+	.loc 1 115 0
 	str	r3, [sp]
 	mov	r10, r1
 	mov	r7, r2
 	mov	r4, r0
-	.loc 1 113 0
-	ldr	r3, .L471
-.LVL603:
 	.loc 1 117 0
+	ldr	r3, .L472
+.LVL605:
+	.loc 1 121 0
 	mov	r5, r0
 	movs	r6, #0
-	.loc 1 113 0
+	.loc 1 117 0
 	ldrh	r8, [r3, #12]
-.LVL604:
+.LVL606:
 	str	r3, [sp, #4]
-.LVL605:
-.L442:
-	.loc 1 117 0 discriminator 1
+.LVL607:
+.L443:
+	.loc 1 121 0 discriminator 1
 	cmp	r6, r10
-	bne	.L450
-	.loc 1 138 0
+	bne	.L451
+	.loc 1 142 0
 	ldr	r3, [sp]
 	cmp	r3, #0
-	bne	.L457
-.LVL606:
-.L470:
-	.loc 1 168 0
+	bne	.L458
+.LVL608:
+.L471:
+	.loc 1 172 0
 	movs	r0, #0
 	add	sp, sp, #40
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
-.LVL607:
+.LVL609:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL608:
-.L450:
+.LVL610:
+.L451:
 	.cfi_restore_state
-	.loc 1 118 0
+	.loc 1 122 0
 	ldr	r3, [r5, #8]
-	cbz	r3, .L443
-	.loc 1 118 0 is_stmt 0 discriminator 2
+	cbz	r3, .L444
+	.loc 1 122 0 is_stmt 0 discriminator 2
 	ldr	r3, [r5, #12]
-	cbnz	r3, .L444
-.L443:
-	.loc 1 118 0 discriminator 3
-	movs	r2, #118
-	ldr	r1, .L471+4
-	ldr	r0, .L471+8
-	bl	printf
-.LVL609:
+	cbnz	r3, .L445
 .L444:
-	.loc 1 119 0 is_stmt 1
+	.loc 1 122 0 discriminator 3
+	movs	r2, #122
+	ldr	r1, .L472+4
+	ldr	r0, .L472+8
+	bl	printf
+.LVL611:
+.L445:
+	.loc 1 123 0 is_stmt 1
 	add	r2, sp, #12
 	add	r1, sp, #16
 	ldr	r0, [r5, #4]
 	bl	l2p_addr_tran.isra.0
-.LVL610:
-	.loc 1 120 0
-	ldr	r3, .L471+12
+.LVL612:
+	.loc 1 124 0
+	ldr	r3, .L472+12
 	ldr	r2, [r5, #8]
 	ldr	r1, [sp, #16]
 	ldr	fp, [r3, #8]
 	ldrb	r0, [sp, #12]	@ zero_extendqisi2
 	ldr	r3, [r5, #12]
 	blx	fp
-.LVL611:
-	.loc 1 125 0
-	cbnz	r0, .L445
-	.loc 1 124 0
-	str	r0, [r5]
-.L446:
+.LVL613:
+	.loc 1 129 0
+	cbnz	r0, .L446
 	.loc 1 128 0
+	str	r0, [r5]
+.L447:
+	.loc 1 132 0
 	ldr	r3, [sp, #4]
 	ldrh	r3, [r3, #14]
 	cmp	r3, #4
-	bne	.L448
-	.loc 1 129 0
-	ldr	r1, .L471+12
+	bne	.L449
+	.loc 1 133 0
+	ldr	r1, .L472+12
 	ldr	r3, [r5, #12]
 	ldr	r2, [r5, #8]
 	ldr	fp, [r1, #8]
@@ -6235,123 +6262,123 @@ FlashProgPages:
 	adds	r3, r3, #8
 	add	r2, r2, #2048
 	ldrb	r0, [sp, #12]	@ zero_extendqisi2
-.LVL612:
+.LVL614:
 	add	r1, r1, r8
 	blx	fp
-.LVL613:
-	.loc 1 133 0
-	cbz	r0, .L448
-	.loc 1 134 0
+.LVL615:
+	.loc 1 137 0
+	cbz	r0, .L449
+	.loc 1 138 0
 	mov	r3, #-1
 	str	r3, [r5]
-.L448:
-	.loc 1 117 0 discriminator 2
+.L449:
+	.loc 1 121 0 discriminator 2
 	adds	r6, r6, #1
-.LVL614:
+.LVL616:
 	adds	r5, r5, #20
-	b	.L442
-.L445:
-	.loc 1 126 0
+	b	.L443
+.L446:
+	.loc 1 130 0
 	mov	r3, #-1
 	str	r3, [r5]
-	b	.L446
-.LVL615:
-.L455:
-.LBB219:
-	.loc 1 143 0
+	b	.L447
+.LVL617:
+.L456:
+.LBB223:
+	.loc 1 147 0
 	movs	r3, #0
-	.loc 1 149 0
+	.loc 1 153 0
 	mov	r2, r7
-	.loc 1 143 0
+	.loc 1 147 0
 	str	r3, [r8]
-	.loc 1 149 0
+	.loc 1 153 0
 	movs	r1, #1
-	.loc 1 144 0
+	.loc 1 148 0
 	str	r3, [r10]
-	.loc 1 149 0
+	.loc 1 153 0
 	add	r0, sp, #20
-	.loc 1 145 0
+	.loc 1 149 0
 	ldr	r3, [r4, #4]
-	.loc 1 146 0
+	.loc 1 150 0
 	str	r8, [sp, #28]
-	.loc 1 147 0
+	.loc 1 151 0
 	str	r10, [sp, #32]
-	.loc 1 145 0
-	str	r3, [sp, #24]
 	.loc 1 149 0
+	str	r3, [sp, #24]
+	.loc 1 153 0
 	bl	FlashReadPages
-.LVL616:
-	.loc 1 150 0
+.LVL618:
+	.loc 1 154 0
 	ldr	fp, [sp, #20]
 	cmp	fp, #-1
-	bne	.L452
-	.loc 1 151 0
+	bne	.L453
+	.loc 1 155 0
 	ldr	r1, [r4, #4]
-	ldr	r0, .L471+16
+	ldr	r0, .L472+16
 	bl	printf
-.LVL617:
-	.loc 1 152 0
+.LVL619:
+	.loc 1 156 0
 	str	fp, [r4]
-.L452:
-	.loc 1 154 0
+.L453:
+	.loc 1 158 0
 	ldr	r3, [r4, #12]
-	cbz	r3, .L453
-	.loc 1 155 0
+	cbz	r3, .L454
+	.loc 1 159 0
 	ldr	r2, [r3]
 	ldr	r3, [r10]
 	cmp	r2, r3
-	beq	.L453
-	.loc 1 156 0
+	beq	.L454
+	.loc 1 160 0
 	ldr	r1, [r4, #4]
-	ldr	r0, .L471+20
+	ldr	r0, .L472+20
 	bl	printf
-.LVL618:
-	.loc 1 157 0
+.LVL620:
+	.loc 1 161 0
 	mov	r3, #-1
 	str	r3, [r4]
-.L453:
-	.loc 1 160 0
+.L454:
+	.loc 1 164 0
 	ldr	r3, [r4, #8]
-	cbz	r3, .L454
-	.loc 1 161 0
+	cbz	r3, .L455
+	.loc 1 165 0
 	ldr	r2, [r3]
 	ldr	r3, [r8]
 	cmp	r2, r3
-	beq	.L454
-	.loc 1 162 0
+	beq	.L455
+	.loc 1 166 0
 	ldr	r1, [r4, #4]
-	ldr	r0, .L471+24
+	ldr	r0, .L472+24
 	bl	printf
-.LVL619:
-	.loc 1 163 0
+.LVL621:
+	.loc 1 167 0
 	mov	r3, #-1
 	str	r3, [r4]
-.L454:
-.LBE219:
-	.loc 1 140 0 discriminator 2
+.L455:
+.LBE223:
+	.loc 1 144 0 discriminator 2
 	adds	r5, r5, #1
-.LVL620:
-	adds	r4, r4, #20
-.LVL621:
-.L451:
-	.loc 1 140 0 is_stmt 0 discriminator 1
-	cmp	r6, r5
-	bne	.L455
-	b	.L470
 .LVL622:
-.L457:
-	movs	r5, #0
-.LBB220:
-	.loc 1 143 0 is_stmt 1
-	ldr	r8, .L471+28
+	adds	r4, r4, #20
 .LVL623:
-	.loc 1 144 0
-	ldr	r10, .L471+32
+.L452:
+	.loc 1 144 0 is_stmt 0 discriminator 1
+	cmp	r6, r5
+	bne	.L456
+	b	.L471
 .LVL624:
-	b	.L451
-.L472:
+.L458:
+	movs	r5, #0
+.LBB224:
+	.loc 1 147 0 is_stmt 1
+	ldr	r8, .L472+28
+.LVL625:
+	.loc 1 148 0
+	ldr	r10, .L472+32
+.LVL626:
+	b	.L452
+.L473:
 	.align	2
-.L471:
+.L472:
 	.word	.LANCHOR0
 	.word	.LANCHOR110
 	.word	.LC1
@@ -6361,9 +6388,9 @@ FlashProgPages:
 	.word	.LC81
 	.word	check_buf
 	.word	.LANCHOR111
-.LBE220:
+.LBE224:
 	.cfi_endproc
-.LFE344:
+.LFE345:
 	.size	FlashProgPages, .-FlashProgPages
 	.section	.text.FlashEraseBlocks,"ax",%progbits
 	.align	1
@@ -6374,12 +6401,12 @@ FlashProgPages:
 	.fpu softvfp
 	.type	FlashEraseBlocks, %function
 FlashEraseBlocks:
-.LFB345:
-	.loc 1 171 0
+.LFB346:
+	.loc 1 175 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL625:
+.LVL627:
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
 	.cfi_def_cfa_offset 40
 	.cfi_offset 4, -28
@@ -6389,84 +6416,84 @@ FlashEraseBlocks:
 	.cfi_offset 8, -12
 	.cfi_offset 10, -8
 	.cfi_offset 14, -4
-	.loc 1 171 0
+	.loc 1 175 0
 	mov	r7, r2
-	.loc 1 174 0
-	ldr	r5, .L484
+	.loc 1 178 0
+	ldr	r5, .L485
 	adds	r4, r0, #4
-	.loc 1 177 0
+	.loc 1 181 0
 	movs	r6, #0
-	.loc 1 179 0
-	ldr	r10, .L484+4
-	.loc 1 174 0
+	.loc 1 183 0
+	ldr	r10, .L485+4
+	.loc 1 178 0
 	ldrh	r8, [r5, #12]
-.LVL626:
-.L474:
-	.loc 1 177 0 discriminator 1
+.LVL628:
+.L475:
+	.loc 1 181 0 discriminator 1
 	cmp	r6, r7
-	bne	.L480
-	.loc 1 190 0
+	bne	.L481
+	.loc 1 194 0
 	movs	r0, #0
 	add	sp, sp, #12
 	.cfi_remember_state
 	.cfi_def_cfa_offset 28
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.LVL627:
-.L480:
+.LVL629:
+.L481:
 	.cfi_restore_state
-	.loc 1 178 0
+	.loc 1 182 0
 	add	r1, sp, #4
 	mov	r2, sp
 	ldr	r0, [r4]
 	bl	l2p_addr_tran.isra.0
-.LVL628:
-	.loc 1 179 0
+.LVL630:
+	.loc 1 183 0
 	ldr	r3, [r10, #4]
 	ldr	r1, [sp, #4]
 	ldrb	r0, [sp]	@ zero_extendqisi2
 	blx	r3
-.LVL629:
-	.loc 1 181 0
-	cbnz	r0, .L475
-	.loc 1 180 0
+.LVL631:
+	.loc 1 185 0
+	cbnz	r0, .L476
+	.loc 1 184 0
 	str	r0, [r4, #-4]
-.L476:
-	.loc 1 183 0
+.L477:
+	.loc 1 187 0
 	ldrh	r3, [r5, #14]
 	cmp	r3, #4
-	bne	.L478
-	.loc 1 184 0
+	bne	.L479
+	.loc 1 188 0
 	ldr	r1, [sp, #4]
 	ldr	r3, [r10, #4]
 	ldrb	r0, [sp]	@ zero_extendqisi2
-.LVL630:
+.LVL632:
 	add	r1, r1, r8
 	blx	r3
-.LVL631:
-	.loc 1 185 0
-	cbz	r0, .L478
-	.loc 1 186 0
+.LVL633:
+	.loc 1 189 0
+	cbz	r0, .L479
+	.loc 1 190 0
 	mov	r3, #-1
 	str	r3, [r4, #-4]
-.L478:
-	.loc 1 177 0 discriminator 2
+.L479:
+	.loc 1 181 0 discriminator 2
 	adds	r6, r6, #1
-.LVL632:
+.LVL634:
 	adds	r4, r4, #20
-	b	.L474
-.L475:
-	.loc 1 182 0
+	b	.L475
+.L476:
+	.loc 1 186 0
 	mov	r3, #-1
 	str	r3, [r4, #-4]
-	b	.L476
-.L485:
+	b	.L477
+.L486:
 	.align	2
-.L484:
+.L485:
 	.word	.LANCHOR0
 	.word	.LANCHOR107
 	.cfi_endproc
-.LFE345:
+.LFE346:
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
 	.section	.text.FtlFreeSysBlkQueueIn,"ax",%progbits
 	.align	1
@@ -6482,7 +6509,7 @@ FtlFreeSysBlkQueueIn:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL633:
+.LVL635:
 	push	{r4, r5, r6, lr}
 	.cfi_def_cfa_offset 16
 	.cfi_offset 4, -16
@@ -6491,29 +6518,29 @@ FtlFreeSysBlkQueueIn:
 	.cfi_offset 14, -4
 	.loc 2 98 0
 	mov	r5, r0
-.LBB221:
-.LBB222:
+.LBB225:
+.LBB226:
 	.loc 2 94 0
-	ldr	r4, .L495
-.LBE222:
-.LBE221:
+	ldr	r4, .L496
+.LBE226:
+.LBE225:
 	.loc 2 99 0
 	ldrh	r3, [r4, #6]
 	cmp	r3, #1024
-	beq	.L486
-.LVL634:
-.LBB223:
+	beq	.L487
+.LVL636:
+.LBB227:
 	.loc 2 101 0
-	cbz	r1, .L488
-.LBB224:
+	cbz	r1, .L489
+.LBB228:
 	.loc 2 102 0
 	bl	P2V_block_in_plane
-.LVL635:
+.LVL637:
 	.loc 2 103 0
-	ldr	r3, .L495+4
+	ldr	r3, .L496+4
 	.loc 2 102 0
 	mov	r6, r0
-.LVL636:
+.LVL638:
 	.loc 2 104 0
 	movs	r2, #1
 	mov	r1, r2
@@ -6523,21 +6550,21 @@ FtlFreeSysBlkQueueIn:
 	str	r3, [r0, #4]
 	.loc 2 104 0
 	bl	FlashEraseBlocks
-.LVL637:
+.LVL639:
 	.loc 2 105 0
-	ldr	r3, .L495+8
+	ldr	r3, .L496+8
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r6, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r6, lsl #1]	@ movhi
 	.loc 2 106 0
-	ldr	r2, .L495+12
+	ldr	r2, .L496+12
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
-.LVL638:
-.L488:
-.LBE224:
+.LVL640:
+.L489:
+.LBE228:
 	.loc 2 108 0
 	ldrh	r3, [r4, #6]
 	adds	r3, r3, #1
@@ -6552,17 +6579,17 @@ FtlFreeSysBlkQueueIn:
 	strh	r5, [r4, r2, lsl #1]	@ movhi
 	.loc 2 110 0
 	strh	r3, [r4, #4]	@ movhi
-.LVL639:
-.L486:
+.LVL641:
+.L487:
 	pop	{r4, r5, r6, pc}
-.L496:
+.L497:
 	.align	2
-.L495:
+.L496:
 	.word	.LANCHOR38
 	.word	.LANCHOR112
 	.word	.LANCHOR40
 	.word	.LANCHOR76
-.LBE223:
+.LBE227:
 	.cfi_endproc
 .LFE243:
 	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
@@ -6580,9 +6607,9 @@ FtlLowFormatEraseBlock:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL640:
+.LVL642:
 	.loc 3 538 0
-	ldr	r3, .L540
+	ldr	r3, .L541
 	.loc 3 528 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
@@ -6597,7 +6624,7 @@ FtlLowFormatEraseBlock:
 	sub	sp, sp, #32
 	.cfi_def_cfa_offset 64
 	.loc 3 540 0
-	ldr	r6, .L540+4
+	ldr	r6, .L541+4
 	.loc 3 539 0
 	mov	fp, #0
 	.loc 3 536 0
@@ -6606,11 +6633,11 @@ FtlLowFormatEraseBlock:
 	mov	r4, fp
 	.loc 3 538 0
 	str	r0, [r3]
-.LVL641:
+.LVL643:
 	.loc 3 540 0
 	mov	r10, #20
 	.loc 3 539 0
-	ldr	r3, .L540+8
+	ldr	r3, .L541+8
 	.loc 3 540 0
 	ldr	r8, [r6]
 	.loc 3 528 0
@@ -6622,26 +6649,26 @@ FtlLowFormatEraseBlock:
 	.loc 3 539 0
 	str	r3, [sp, #8]
 	.loc 3 550 0
-	ldr	r3, .L540+12
+	ldr	r3, .L541+12
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
 	.loc 3 551 0
-	ldr	r3, .L540+16
+	ldr	r3, .L541+16
 	ldr	r3, [r3]
 	str	r3, [sp, #16]
-	ldr	r3, .L540+20
+	ldr	r3, .L541+20
 	ldrh	r3, [r3]
 	str	r3, [sp, #20]
-.LVL642:
-.L498:
+.LVL644:
+.L499:
 	.loc 3 539 0 discriminator 1
 	ldr	r3, [sp, #8]
 	uxth	r2, fp
 	cmp	r3, r2
-	bhi	.L502
+	bhi	.L503
 	.loc 3 559 0
 	cmp	r5, #0
-	beq	.L497
+	beq	.L498
 	.loc 3 562 0
 	mov	r0, r8
 	.loc 3 563 0
@@ -6652,34 +6679,34 @@ FtlLowFormatEraseBlock:
 	mov	r2, r5
 	movs	r1, #0
 	bl	FlashEraseBlocks
-.LVL643:
-.L505:
+.LVL645:
+.L506:
 	.loc 3 563 0 discriminator 1
 	uxth	r3, r7
 	cmp	r5, r3
-	bhi	.L507
+	bhi	.L508
 	.loc 3 571 0
 	ldr	r3, [sp]
 	cmp	r3, #0
-	beq	.L523
-.LVL644:
+	beq	.L524
+.LVL646:
 	.loc 3 573 0
-	ldr	r3, .L540+24
+	ldr	r3, .L541+24
 	.loc 3 572 0
 	mov	r8, #1
 	.loc 3 573 0
 	ldrh	r10, [r3]
-.LVL645:
+.LVL647:
 	.loc 3 574 0
 	lsr	r3, r10, #2
 	str	r3, [sp, #12]
-.LVL646:
-.L508:
+.LVL648:
+.L509:
 	movs	r6, #0
-.LVL647:
-.L517:
+.LVL649:
+.L518:
 	.loc 3 578 0
-	ldr	r3, .L540+8
+	ldr	r3, .L541+8
 	mov	fp, #0
 	.loc 3 577 0
 	mov	r5, fp
@@ -6687,88 +6714,88 @@ FtlLowFormatEraseBlock:
 	ldrh	r3, [r3]
 	str	r3, [sp, #16]
 	.loc 3 579 0
-	ldr	r3, .L540+4
+	ldr	r3, .L541+4
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
 	.loc 3 587 0
-	ldr	r3, .L540+28
+	ldr	r3, .L541+28
 	ldr	r3, [r3]
 	str	r3, [sp, #20]
 	.loc 3 588 0
-	ldr	r3, .L540+12
+	ldr	r3, .L541+12
 	ldr	r3, [r3]
 	str	r3, [sp, #24]
-	ldr	r3, .L540+20
+	ldr	r3, .L541+20
 	ldrh	r3, [r3]
 	str	r3, [sp, #28]
-.LVL648:
-.L509:
+.LVL650:
+.L510:
 	.loc 3 578 0 discriminator 1
 	ldr	r3, [sp, #16]
 	uxth	r2, fp
 	cmp	r3, r2
-	bhi	.L512
+	bhi	.L513
 	.loc 3 593 0
-	cbz	r5, .L497
+	cbz	r5, .L498
 	.loc 3 598 0
-	ldr	fp, .L540+4
-.LVL649:
+	ldr	fp, .L541+4
+.LVL651:
 	.loc 3 596 0
 	movs	r3, #1
 	mov	r2, r8
-.LVL650:
+.LVL652:
 	mov	r1, r5
 	ldr	r0, [sp, #8]
 	.loc 3 597 0
 	movs	r7, #0
 	.loc 3 596 0
 	bl	FlashProgPages
-.LVL651:
+.LVL653:
 	.loc 3 598 0
 	movs	r3, #20
-.LVL652:
-.L514:
+.LVL654:
+.L515:
 	.loc 3 597 0 discriminator 1
 	uxth	r2, r7
 	cmp	r5, r2
-	bhi	.L516
+	bhi	.L517
 	.loc 3 604 0
 	ldr	r3, [sp, #12]
 	add	r6, r6, r3
-.LVL653:
+.LVL655:
 	uxth	r6, r6
-.LVL654:
+.LVL656:
 	.loc 3 605 0
 	cmp	r10, r6
-	bhi	.L517
+	bhi	.L518
 	.loc 3 611 0 discriminator 1
-	ldr	r7, .L540+4
-.LVL655:
+	ldr	r7, .L541+4
+.LVL657:
 	movs	r6, #0
-.LVL656:
+.LVL658:
 	mov	r10, #20
-.LVL657:
-.L518:
+.LVL659:
+.L519:
 	.loc 3 610 0 discriminator 1
 	uxth	r3, r6
 	cmp	r5, r3
-	bhi	.L520
+	bhi	.L521
 	.loc 3 615 0
 	ldr	r3, [sp, #4]
 	cmp	r3, #63
-	bls	.L521
+	bls	.L522
 	.loc 3 615 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp]
-	cbz	r3, .L497
-.L521:
+	cbz	r3, .L498
+.L522:
 	.loc 3 616 0 is_stmt 1
-	ldr	r3, .L540+4
+	ldr	r3, .L541+4
 	mov	r2, r5
 	mov	r1, r8
 	ldr	r0, [r3]
 	bl	FlashEraseBlocks
-.LVL658:
-.L497:
+.LVL660:
+.L498:
 	.loc 3 619 0
 	mov	r0, r4
 	add	sp, sp, #32
@@ -6776,8 +6803,8 @@ FtlLowFormatEraseBlock:
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL659:
-.L502:
+.LVL661:
+.L503:
 	.cfi_restore_state
 	.loc 3 540 0
 	mul	r2, r10, fp
@@ -6787,27 +6814,27 @@ FtlLowFormatEraseBlock:
 	.loc 3 540 0
 	str	r3, [r8, r2]
 	.loc 3 541 0
-	ldr	r3, .L540+32
+	ldr	r3, .L541+32
 	ldrb	r0, [r3, fp]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL660:
+.LVL662:
 	.loc 3 543 0
 	ldr	r3, [sp]
 	.loc 3 541 0
 	mov	r7, r0
-.LVL661:
+.LVL663:
 	.loc 3 543 0
-	cbz	r3, .L499
+	cbz	r3, .L500
 	.loc 3 544 0
 	bl	IsBlkInVendorPart
-.LVL662:
-	cbnz	r0, .L500
-.L499:
+.LVL664:
+	cbnz	r0, .L501
+.L500:
 	.loc 3 548 0
 	mov	r0, r7
 	bl	FtlBbmIsBadBlock
-.LVL663:
-	cbnz	r0, .L501
+.LVL665:
+	cbnz	r0, .L502
 	.loc 3 549 0
 	mla	r1, r10, r5, r8
 	.loc 3 550 0
@@ -6825,52 +6852,52 @@ FtlLowFormatEraseBlock:
 	ldr	r3, [sp, #16]
 	.loc 3 552 0
 	adds	r5, r5, #1
-.LVL664:
+.LVL666:
 	uxth	r5, r5
-.LVL665:
+.LVL667:
 	.loc 3 551 0
 	bic	r2, r2, #3
 	add	r2, r2, r3
 	str	r2, [r1, #12]
-.L500:
-.LVL666:
-	add	fp, fp, #1
-.LVL667:
-	b	.L498
-.LVL668:
 .L501:
-	.loc 3 554 0
-	adds	r4, r4, #1
+.LVL668:
+	add	fp, fp, #1
 .LVL669:
-	uxth	r4, r4
+	b	.L499
 .LVL670:
-	b	.L500
+.L502:
+	.loc 3 554 0
+	adds	r4, r4, #1
 .LVL671:
-.L507:
+	uxth	r4, r4
+.LVL672:
+	b	.L501
+.LVL673:
+.L508:
 	.loc 3 564 0
 	mul	r3, r8, r7
 	ldr	r2, [r6]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
 	adds	r3, r3, #1
-	bne	.L506
+	bne	.L507
 	.loc 3 566 0
 	ldr	r0, [r1, #4]
 	.loc 3 565 0
 	adds	r4, r4, #1
-.LVL672:
+.LVL674:
 	uxth	r4, r4
-.LVL673:
+.LVL675:
 	.loc 3 566 0
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.LVL674:
-.L506:
-	adds	r7, r7, #1
-.LVL675:
-	b	.L505
 .LVL676:
-.L523:
+.L507:
+	adds	r7, r7, #1
+.LVL677:
+	b	.L506
+.LVL678:
+.L524:
 	.loc 3 533 0
 	movs	r3, #6
 	.loc 3 534 0
@@ -6879,9 +6906,9 @@ FtlLowFormatEraseBlock:
 	str	r3, [sp, #12]
 	.loc 3 531 0
 	mov	r10, #1
-	b	.L508
-.LVL677:
-.L512:
+	b	.L509
+.LVL679:
+.L513:
 	.loc 3 579 0
 	movs	r3, #20
 	mul	r2, r3, fp
@@ -6890,28 +6917,28 @@ FtlLowFormatEraseBlock:
 	movs	r3, #0
 	str	r3, [r1, r2]
 	.loc 3 580 0
-	ldr	r3, .L540+32
+	ldr	r3, .L541+32
 	ldr	r1, [sp, #4]
 	ldrb	r0, [r3, fp]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL678:
+.LVL680:
 	.loc 3 581 0
 	ldr	r3, [sp]
 	.loc 3 580 0
 	mov	r7, r0
-.LVL679:
+.LVL681:
 	.loc 3 581 0
-	cbz	r3, .L510
+	cbz	r3, .L511
 	.loc 3 582 0
 	bl	IsBlkInVendorPart
-.LVL680:
-	cbnz	r0, .L511
-.L510:
+.LVL682:
+	cbnz	r0, .L512
+.L511:
 	.loc 3 585 0
 	mov	r0, r7
 	bl	FtlBbmIsBadBlock
-.LVL681:
-	cbnz	r0, .L511
+.LVL683:
+	cbnz	r0, .L512
 	.loc 3 586 0
 	ldr	r3, [sp, #8]
 	movs	r2, #20
@@ -6929,68 +6956,68 @@ FtlLowFormatEraseBlock:
 	ldr	r3, [sp, #24]
 	.loc 3 589 0
 	adds	r5, r5, #1
-.LVL682:
+.LVL684:
 	uxth	r5, r5
-.LVL683:
+.LVL685:
 	.loc 3 588 0
 	bic	r2, r2, #3
 	add	r2, r2, r3
 	str	r2, [r1, #12]
-.L511:
-.LVL684:
-	add	fp, fp, #1
-.LVL685:
-	b	.L509
+.L512:
 .LVL686:
-.L516:
+	add	fp, fp, #1
+.LVL687:
+	b	.L510
+.LVL688:
+.L517:
 	.loc 3 598 0
 	mul	r2, r3, r7
 	ldr	r1, [fp]
 	adds	r0, r1, r2
 	ldr	r2, [r1, r2]
-	cbz	r2, .L515
+	cbz	r2, .L516
 	.loc 3 600 0
 	ldr	r0, [r0, #4]
 	.loc 3 599 0
 	adds	r4, r4, #1
-.LVL687:
+.LVL689:
 	str	r3, [sp, #8]
 	uxth	r4, r4
-.LVL688:
+.LVL690:
 	.loc 3 600 0
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.LVL689:
-	ldr	r3, [sp, #8]
-.L515:
-.LVL690:
-	adds	r7, r7, #1
 .LVL691:
-	b	.L514
+	ldr	r3, [sp, #8]
+.L516:
 .LVL692:
-.L520:
+	adds	r7, r7, #1
+.LVL693:
+	b	.L515
+.LVL694:
+.L521:
 	.loc 3 611 0
 	ldr	r3, [sp]
-	cbz	r3, .L519
+	cbz	r3, .L520
 	.loc 3 611 0 is_stmt 0 discriminator 1
 	mul	r3, r10, r6
 	ldr	r2, [r7]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
-	cbnz	r3, .L519
+	cbnz	r3, .L520
 	.loc 3 612 0 is_stmt 1
 	ldr	r0, [r1, #4]
 	movs	r1, #1
 	ubfx	r0, r0, #10, #16
 	bl	FtlFreeSysBlkQueueIn
-.LVL693:
-.L519:
+.LVL695:
+.L520:
 	adds	r6, r6, #1
-.LVL694:
-	b	.L518
-.L541:
+.LVL696:
+	b	.L519
+.L542:
 	.align	2
-.L540:
+.L541:
 	.word	.LANCHOR113
 	.word	.LANCHOR112
 	.word	.LANCHOR3
@@ -7012,18 +7039,18 @@ FtlLowFormatEraseBlock:
 	.fpu softvfp
 	.type	ftl_memset, %function
 ftl_memset:
-.LFB348:
-	.loc 1 238 0
+.LFB349:
+	.loc 1 242 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL695:
-	.loc 1 239 0
+.LVL697:
+	.loc 1 243 0
 	b	memset
-.LVL696:
+.LVL698:
 	.cfi_endproc
-.LFE348:
+.LFE349:
 	.size	ftl_memset, .-ftl_memset
 	.section	.text.FtlMemInit,"ax",%progbits
 	.align	1
@@ -7051,114 +7078,114 @@ FtlMemInit:
 	.cfi_offset 14, -4
 	.loc 3 282 0
 	movs	r1, #0
-	ldr	r3, .L644
+	ldr	r3, .L645
 	.loc 3 311 0
 	mov	r8, #12
 	.loc 3 297 0
-	ldr	r2, .L644+4
+	ldr	r2, .L645+4
 	.loc 3 282 0
 	str	r1, [r3]
 	.loc 3 283 0
-	ldr	r3, .L644+8
+	ldr	r3, .L645+8
 	.loc 3 310 0
-	ldr	r4, .L644+12
+	ldr	r4, .L645+12
 	.loc 3 307 0
 	str	r1, [sp, #4]
 	.loc 3 283 0
 	str	r1, [r3]
 	.loc 3 284 0
-	ldr	r3, .L644+16
+	ldr	r3, .L645+16
 	.loc 3 310 0
 	ldrh	r0, [r4]
 	.loc 3 312 0
-	ldr	fp, .L644+288
+	ldr	fp, .L645+288
 	.loc 3 284 0
 	str	r1, [r3]
 	.loc 3 285 0
-	ldr	r3, .L644+20
+	ldr	r3, .L645+20
 	.loc 3 310 0
 	lsls	r0, r0, #1
 	.loc 3 316 0
-	ldr	r10, .L644+292
+	ldr	r10, .L645+292
 	.loc 3 320 0
-	ldr	r5, .L644+24
+	ldr	r5, .L645+24
 	.loc 3 285 0
 	str	r1, [r3]
 	.loc 3 286 0
-	ldr	r3, .L644+28
+	ldr	r3, .L645+28
 	.loc 3 323 0
-	ldr	r7, .L644+32
+	ldr	r7, .L645+32
 	.loc 3 286 0
 	str	r1, [r3]
 	.loc 3 287 0
-	ldr	r3, .L644+36
+	ldr	r3, .L645+36
 	str	r1, [r3]
 	.loc 3 288 0
-	ldr	r3, .L644+40
+	ldr	r3, .L645+40
 	str	r1, [r3]
 	.loc 3 289 0
-	ldr	r3, .L644+44
+	ldr	r3, .L645+44
 	str	r1, [r3]
 	.loc 3 290 0
-	ldr	r3, .L644+48
+	ldr	r3, .L645+48
 	str	r1, [r3]
 	.loc 3 291 0
-	ldr	r3, .L644+52
+	ldr	r3, .L645+52
 	str	r1, [r3]
 	.loc 3 292 0
-	ldr	r3, .L644+56
+	ldr	r3, .L645+56
 	str	r1, [r3]
 	.loc 3 293 0
-	ldr	r3, .L644+60
+	ldr	r3, .L645+60
 	str	r1, [r3]
 	.loc 3 294 0
-	ldr	r3, .L644+64
+	ldr	r3, .L645+64
 	str	r1, [r3]
 	.loc 3 295 0
-	ldr	r3, .L644+68
+	ldr	r3, .L645+68
 	str	r1, [r3]
 	.loc 3 296 0
-	ldr	r3, .L644+72
+	ldr	r3, .L645+72
 	str	r1, [r3]
 	.loc 3 297 0
 	movw	r3, #65535
 	str	r3, [r2]
 	.loc 3 298 0
-	ldr	r2, .L644+76
+	ldr	r2, .L645+76
 	str	r1, [r2]
 	.loc 3 299 0
-	ldr	r2, .L644+80
+	ldr	r2, .L645+80
 	str	r1, [r2]
 	.loc 3 300 0
-	ldr	r2, .L644+84
+	ldr	r2, .L645+84
 	str	r1, [r2]
 	.loc 3 301 0
-	ldr	r2, .L644+88
+	ldr	r2, .L645+88
 	strh	r3, [r2]	@ movhi
 	.loc 3 302 0
-	ldr	r2, .L644+92
+	ldr	r2, .L645+92
 	strh	r3, [r2]	@ movhi
 	.loc 3 303 0
 	movs	r2, #32
-	ldr	r3, .L644+96
+	ldr	r3, .L645+96
 	strh	r2, [r3]	@ movhi
 	.loc 3 304 0
 	movs	r2, #128
-	ldr	r3, .L644+100
+	ldr	r3, .L645+100
 	strh	r2, [r3]	@ movhi
 	.loc 3 305 0
-	ldr	r3, .L644+104
+	ldr	r3, .L645+104
 	strh	r1, [r3]	@ movhi
 	.loc 3 306 0
-	ldr	r3, .L644+108
+	ldr	r3, .L645+108
 	strh	r1, [r3]	@ movhi
 	.loc 3 307 0
-	ldr	r3, .L644+112
+	ldr	r3, .L645+112
 	strh	r1, [r3]	@ movhi
 	.loc 3 310 0
 	bl	ftl_malloc
-.LVL697:
-	ldr	r3, .L644+116
+.LVL699:
+	ldr	r3, .L645+116
 	str	r0, [r3]
 	.loc 3 311 0
 	ldrh	r0, [r4]
@@ -7167,107 +7194,107 @@ FtlMemInit:
 	.loc 3 311 0
 	mul	r0, r8, r0
 	bl	ftl_malloc
-.LVL698:
+.LVL700:
 	.loc 3 312 0
 	ldrh	r2, [fp]
 	.loc 3 311 0
-	ldr	r3, .L644+120
+	ldr	r3, .L645+120
 	.loc 3 312 0
 	muls	r4, r2, r4
-.LVL699:
+.LVL701:
 	.loc 3 311 0
 	str	r0, [r3]
 	.loc 3 313 0
 	lsls	r6, r4, #2
 	mov	r0, r6
 	bl	ftl_malloc
-.LVL700:
-	ldr	r3, .L644+124
+.LVL702:
+	ldr	r3, .L645+124
 	str	r0, [r3]
 	.loc 3 314 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL701:
-	ldr	r3, .L644+128
+.LVL703:
+	ldr	r3, .L645+128
 	str	r0, [r3]
 	.loc 3 315 0
 	mov	r0, r6
 	bl	ftl_malloc
-.LVL702:
-	ldr	r3, .L644+132
+.LVL704:
+	ldr	r3, .L645+132
 	.loc 3 324 0
-	ldr	r6, .L644+136
+	ldr	r6, .L645+136
 	.loc 3 315 0
 	str	r0, [r3]
 	.loc 3 316 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL703:
+.LVL705:
 	str	r0, [r10]
 	.loc 3 317 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL704:
-	ldr	r3, .L644+140
+.LVL706:
+	ldr	r3, .L645+140
 	.loc 3 320 0
 	ldrh	r2, [fp]
 	.loc 3 317 0
 	str	r0, [r3]
 	.loc 3 319 0
-	ldr	r3, .L644+144
+	ldr	r3, .L645+144
 	.loc 3 320 0
 	lsls	r2, r2, #1
 	.loc 3 319 0
 	ldrh	r4, [r3]
-.LVL705:
+.LVL707:
 	.loc 3 320 0
 	adds	r2, r2, #1
 	str	r2, [r5]
 	.loc 3 321 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL706:
-	ldr	r3, .L644+148
+.LVL708:
+	ldr	r3, .L645+148
 	str	r0, [r3]
 	.loc 3 322 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL707:
-	ldr	r3, .L644+152
+.LVL709:
+	ldr	r3, .L645+152
 	str	r0, [r3]
 	.loc 3 323 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL708:
+.LVL710:
 	str	r0, [r7]
 	.loc 3 324 0
 	ldr	r0, [r5]
 	muls	r0, r4, r0
 	bl	ftl_malloc
-.LVL709:
+.LVL711:
 	str	r0, [r6]
 	.loc 3 325 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL710:
-	ldr	r2, .L644+156
+.LVL712:
+	ldr	r2, .L645+156
 	str	r0, [r2]
 	.loc 3 326 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL711:
-	ldr	r2, .L644+160
+.LVL713:
+	ldr	r2, .L645+160
 	.loc 3 329 0
-	ldr	r4, .L644+164
-.LVL712:
+	ldr	r4, .L645+164
+.LVL714:
 	.loc 3 326 0
 	str	r0, [r2]
 	.loc 3 327 0
 	ldr	r0, [r5]
 	mul	r0, r8, r0
 	bl	ftl_malloc
-.LVL713:
-	ldr	r2, .L644+168
+.LVL715:
+	ldr	r2, .L645+168
 	.loc 3 329 0
 	ldrh	r3, [fp]
 	.loc 3 327 0
@@ -7275,30 +7302,30 @@ FtlMemInit:
 	.loc 3 329 0
 	ldrh	r2, [r4]
 	mul	fp, r3, r2
-.LVL714:
+.LVL716:
 	.loc 3 330 0
 	mov	r0, fp
 	bl	ftl_malloc
-.LVL715:
-	ldr	r2, .L644+172
+.LVL717:
+	ldr	r2, .L645+172
 	str	r0, [r2]
 	.loc 3 331 0
 	lsl	r0, fp, #2
 	bl	ftl_malloc
-.LVL716:
-	ldr	r3, .L644+176
+.LVL718:
+	ldr	r3, .L645+176
 	str	r0, [r3]
 	.loc 3 332 0
 	ldrh	r3, [r4]
 	ldr	r0, [r5]
 	.loc 3 335 0
-	ldr	r4, .L644+180
-	ldr	r5, .L644+184
+	ldr	r4, .L645+180
+	ldr	r5, .L645+184
 	.loc 3 332 0
 	muls	r0, r3, r0
 	bl	ftl_malloc
-.LVL717:
-	ldr	r3, .L644+188
+.LVL719:
+	ldr	r3, .L645+188
 	str	r0, [r3]
 	.loc 3 335 0
 	ldrh	r0, [r4]
@@ -7307,13 +7334,13 @@ FtlMemInit:
 	strh	r0, [r5]	@ movhi
 	.loc 3 336 0
 	bl	ftl_malloc
-.LVL718:
-	ldr	r3, .L644+192
+.LVL720:
+	ldr	r3, .L645+192
 	str	r0, [r3]
 	.loc 3 337 0
 	ldrh	r3, [r5]
 	.loc 3 338 0
-	ldr	r0, .L644+196
+	ldr	r0, .L645+196
 	.loc 3 337 0
 	addw	r3, r3, #547
 	lsrs	r3, r3, #9
@@ -7323,55 +7350,55 @@ FtlMemInit:
 	strh	r3, [r5]	@ movhi
 	.loc 3 338 0
 	bl	ftl_malloc
-.LVL719:
+.LVL721:
 	.loc 3 345 0
 	ldrh	fp, [r4]
-.LVL720:
+.LVL722:
 	.loc 3 338 0
-	ldr	r3, .L644+200
+	ldr	r3, .L645+200
 	str	r0, [r3]
 	.loc 3 345 0
 	lsl	fp, fp, #1
 	.loc 3 339 0
-	ldr	r3, .L644+204
+	ldr	r3, .L645+204
 	adds	r0, r0, #32
 	str	r0, [r3]
-.LVL721:
+.LVL723:
 	.loc 3 347 0
 	mov	r0, fp
 	bl	ftl_malloc
-.LVL722:
-	ldr	r3, .L644+208
+.LVL724:
+	ldr	r3, .L645+208
 	str	r0, [r3]
 	.loc 3 349 0
 	mov	r0, fp
 	bl	ftl_malloc
-.LVL723:
+.LVL725:
 	.loc 3 350 0
-	ldr	fp, .L644+296
-.LVL724:
+	ldr	fp, .L645+296
+.LVL726:
 	.loc 3 349 0
-	ldr	r3, .L644+212
+	ldr	r3, .L645+212
 	str	r0, [r3]
-.LVL725:
+.LVL727:
 	.loc 3 350 0
 	ldr	r3, [fp]
 	lsls	r5, r3, #1
-.LVL726:
+.LVL728:
 	.loc 3 351 0
 	mov	r0, r5
 	bl	ftl_malloc
-.LVL727:
-	ldr	r2, .L644+216
+.LVL729:
+	ldr	r2, .L645+216
 	str	r0, [r2]
 	.loc 3 352 0
 	mov	r0, r5
 	bl	ftl_malloc
-.LVL728:
-	ldr	r3, .L644+220
+.LVL730:
+	ldr	r3, .L645+220
 	.loc 3 354 0
-	ldr	r5, .L644+224
-.LVL729:
+	ldr	r5, .L645+224
+.LVL731:
 	.loc 3 352 0
 	str	r0, [r3]
 	.loc 3 353 0
@@ -7379,42 +7406,42 @@ FtlMemInit:
 	lsrs	r0, r0, #3
 	adds	r0, r0, #4
 	bl	ftl_malloc
-.LVL730:
-	ldr	r3, .L644+228
+.LVL732:
+	ldr	r3, .L645+228
 	str	r0, [r3]
 	.loc 3 354 0
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-.LVL731:
-	ldr	r2, .L644+232
+.LVL733:
+	ldr	r2, .L645+232
 	str	r0, [r2]
 	.loc 3 355 0
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-.LVL732:
-	ldr	r2, .L644+236
+.LVL734:
+	ldr	r2, .L645+236
 	str	r0, [r2]
 	.loc 3 356 0
 	ldrh	r0, [r5]
-	ldr	r5, .L644+120
+	ldr	r5, .L645+120
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-.LVL733:
-	ldr	r3, .L644+240
+.LVL735:
+	ldr	r3, .L645+240
 	str	r0, [r3]
 	.loc 3 357 0
-	ldr	r3, .L644+244
+	ldr	r3, .L645+244
 	ldrh	r0, [r3]
 	str	r3, [sp]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-.LVL734:
+.LVL736:
 	.loc 3 358 0
 	ldr	r3, [sp]
 	.loc 3 357 0
-	ldr	r2, .L644+248
+	ldr	r2, .L645+248
 	.loc 3 358 0
 	ldr	r1, [sp, #4]
 	.loc 3 357 0
@@ -7423,73 +7450,73 @@ FtlMemInit:
 	ldrh	r2, [r3]
 	lsls	r2, r2, #2
 	bl	ftl_memset
-.LVL735:
+.LVL737:
 	.loc 3 360 0
-	ldr	r3, .L644+252
+	ldr	r3, .L645+252
 	ldrh	r0, [r3]
 	.loc 3 361 0
 	lsls	r0, r0, #2
-.LVL736:
+.LVL738:
 	bl	ftl_malloc
-.LVL737:
-	ldr	r3, .L644+256
+.LVL739:
+	ldr	r3, .L645+256
 	str	r0, [r3]
-.LVL738:
+.LVL740:
 	.loc 3 362 0
 	ldr	r0, [fp]
 	.loc 3 364 0
-	ldr	fp, .L644+300
+	ldr	fp, .L645+300
 	.loc 3 363 0
 	lsls	r0, r0, #2
-.LVL739:
+.LVL741:
 	bl	ftl_malloc
-.LVL740:
-	ldr	r3, .L644+260
+.LVL742:
+	ldr	r3, .L645+260
 	str	r0, [r3]
-.LVL741:
+.LVL743:
 	.loc 3 364 0
 	ldrh	r0, [fp]
 	.loc 3 365 0
 	mul	r0, r8, r0
-.LVL742:
+.LVL744:
 	.loc 3 371 0
-	ldr	r8, .L644+304
+	ldr	r8, .L645+304
 	.loc 3 365 0
 	bl	ftl_malloc
-.LVL743:
+.LVL745:
 	.loc 3 366 0
-	ldr	r2, .L644+144
+	ldr	r2, .L645+144
 	.loc 3 365 0
-	ldr	r3, .L644+264
+	ldr	r3, .L645+264
 	str	r0, [r3]
-.LVL744:
+.LVL746:
 	.loc 3 366 0
 	ldrh	r0, [r2]
 	ldrh	r3, [fp]
-	ldr	fp, .L644+132
+	ldr	fp, .L645+132
 	.loc 3 367 0
 	muls	r0, r3, r0
-.LVL745:
+.LVL747:
 	bl	ftl_malloc
-.LVL746:
-	ldr	r3, .L644+268
+.LVL748:
+	ldr	r3, .L645+268
 	str	r0, [r3]
-.LVL747:
+.LVL749:
 	.loc 3 369 0
 	movs	r0, #6
 	.loc 3 368 0
 	ldrh	r3, [r4]
 	.loc 3 370 0
-	ldr	r4, .L644+272
+	ldr	r4, .L645+272
 	.loc 3 369 0
 	muls	r0, r3, r0
-.LVL748:
+.LVL750:
 	bl	ftl_malloc
-.LVL749:
-	ldr	r3, .L644+276
+.LVL751:
+	ldr	r3, .L645+276
 	str	r0, [r3]
 	.loc 3 370 0
-	ldr	r3, .L644+280
+	ldr	r3, .L645+280
 	ldrh	r0, [r3]
 	.loc 3 371 0
 	ldrh	r3, [r8]
@@ -7497,32 +7524,32 @@ FtlMemInit:
 	adds	r0, r0, #31
 	asrs	r0, r0, #5
 	strh	r0, [r4]	@ movhi
-.LVL750:
+.LVL752:
 	.loc 3 371 0
 	muls	r0, r3, r0
-.LVL751:
+.LVL753:
 	.loc 3 372 0
 	lsls	r0, r0, #2
-.LVL752:
+.LVL754:
 	bl	ftl_malloc
-.LVL753:
-	ldr	r2, .L644+284
+.LVL755:
+	ldr	r2, .L645+284
 	str	r5, [sp, #4]
-	ldr	r5, .L644+124
+	ldr	r5, .L645+124
 	mov	r1, r2
 	.loc 3 373 0
 	ldrh	r3, [r8]
 	.loc 3 372 0
 	str	r0, [r1, #28]!
-.LVL754:
+.LVL756:
 	.loc 3 374 0
 	ldrh	r0, [r4]
-	ldr	r8, .L644+140
-	ldr	lr, .L644+148
-	b	.L645
-.L646:
+	ldr	r8, .L645+140
+	ldr	lr, .L645+148
+	b	.L646
+.L647:
 	.align	2
-.L644:
+.L645:
 	.word	.LANCHOR71
 	.word	.LANCHOR118
 	.word	.LANCHOR72
@@ -7600,223 +7627,223 @@ FtlMemInit:
 	.word	.LANCHOR30
 	.word	.LANCHOR33
 	.word	.LANCHOR10
-.L645:
-	ldr	ip, .L647+100
+.L646:
+	ldr	ip, .L648+100
 	lsls	r0, r0, #2
 	str	r5, [sp, #8]
-	ldr	r5, .L647
+	ldr	r5, .L648
 	.loc 3 373 0
 	str	r3, [sp]
 	mov	r4, r0
 	movs	r3, #1
 	str	r5, [sp, #12]
-.LVL755:
-.L544:
+.LVL757:
+.L545:
 	.loc 3 373 0 is_stmt 0 discriminator 1
 	ldr	r5, [sp]
 	cmp	r3, r5
-	bcc	.L545
+	bcc	.L546
 	add	r3, r2, r3, lsl #2
-.LVL756:
-	ldr	r1, .L647+4
+.LVL758:
+	ldr	r1, .L648+4
 	.loc 3 379 0 is_stmt 1
 	movs	r0, #0
 	adds	r3, r3, #24
-.L546:
+.L547:
 	.loc 3 377 0 discriminator 1
 	cmp	r1, r3
-	bne	.L547
+	bne	.L548
 	.loc 3 383 0
-	ldr	r3, .L647+8
+	ldr	r3, .L648+8
 	ldr	r3, [r3]
-	cbnz	r3, .L548
-.L550:
+	cbnz	r3, .L549
+.L551:
 	.loc 3 385 0
-	ldr	r1, .L647+12
-	ldr	r0, .L647+16
+	ldr	r1, .L648+12
+	ldr	r0, .L648+16
 	bl	printf
-.LVL757:
+.LVL759:
 	.loc 3 386 0
 	mov	r0, #-1
-.L543:
+.L544:
 	.loc 3 484 0
 	add	sp, sp, #16
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL758:
-.L545:
+.LVL760:
+.L546:
 	.cfi_restore_state
 	.loc 3 374 0 discriminator 3
 	ldr	r5, [r2, #28]
 	.loc 3 373 0 discriminator 3
 	adds	r3, r3, #1
-.LVL759:
+.LVL761:
 	.loc 3 374 0 discriminator 3
 	add	r5, r5, r4
 	add	r4, r4, r0
 	str	r5, [r1, #4]!
-	b	.L544
-.LVL760:
-.L547:
+	b	.L545
+.LVL762:
+.L548:
 	.loc 3 379 0 discriminator 2
 	str	r0, [r3, #4]!
-	b	.L546
-.L548:
+	b	.L547
+.L549:
 	.loc 3 388 0
-	ldr	r3, .L647+20
+	ldr	r3, .L648+20
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 393 0
-	ldr	r3, .L647+24
+	ldr	r3, .L648+24
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 398 0
-	ldr	r3, .L647+28
+	ldr	r3, .L648+28
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 404 0
-	ldr	r3, .L647+32
+	ldr	r3, .L648+32
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 409 0
-	ldr	r3, .L647+36
+	ldr	r3, .L648+36
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 414 0
-	ldr	r3, .L647+40
+	ldr	r3, .L648+40
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 419 0
 	ldr	r3, [r2, #28]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 425 0
-	ldr	r3, .L647+44
+	ldr	r3, .L648+44
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 430 0
-	ldr	r3, .L647+48
+	ldr	r3, .L648+48
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 430 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #4]
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 435 0 is_stmt 1
 	ldr	r3, [sp, #8]
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 435 0 is_stmt 0 discriminator 1
 	ldr	r3, [fp]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 435 0 discriminator 2
 	ldr	r3, [r10]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 435 0 discriminator 3
 	ldr	r3, [r8]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 435 0 discriminator 4
 	ldr	r3, [sp, #12]
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 440 0 is_stmt 1
 	ldr	r3, [lr]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 440 0 is_stmt 0 discriminator 1
 	ldr	r3, [ip]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 440 0 discriminator 2
 	ldr	r3, [r7]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 440 0 discriminator 3
 	ldr	r3, [r6]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 441 0 is_stmt 1
-	ldr	r3, .L647+52
+	ldr	r3, .L648+52
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 441 0 is_stmt 0 discriminator 1
-	ldr	r3, .L647+56
+	ldr	r3, .L648+56
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 441 0 discriminator 2
-	ldr	r3, .L647+60
+	ldr	r3, .L648+60
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 446 0 is_stmt 1
-	ldr	r3, .L647+64
+	ldr	r3, .L648+64
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 446 0 is_stmt 0 discriminator 1
-	ldr	r3, .L647+68
+	ldr	r3, .L648+68
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 446 0 discriminator 2
-	ldr	r3, .L647+72
+	ldr	r3, .L648+72
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 452 0 is_stmt 1
-	ldr	r3, .L647+76
+	ldr	r3, .L648+76
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 452 0 is_stmt 0 discriminator 1
-	ldr	r3, .L647+80
+	ldr	r3, .L648+80
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 458 0 is_stmt 1
-	ldr	r3, .L647+84
+	ldr	r3, .L648+84
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 464 0
-	ldr	r3, .L647+88
+	ldr	r3, .L648+88
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 470 0
-	ldr	r3, .L647+92
+	ldr	r3, .L648+92
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 476 0
-	ldr	r3, .L647+96
+	ldr	r3, .L648+96
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 483 0
 	movs	r0, #0
-	b	.L543
-.L648:
+	b	.L544
+.L649:
 	.align	2
-.L647:
+.L648:
 	.word	.LANCHOR121
 	.word	.LANCHOR37+56
 	.word	.LANCHOR129
@@ -7860,9 +7887,9 @@ FtlBbt2Bitmap:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL761:
+.LVL763:
 	.loc 4 69 0
-	ldr	r3, .L655
+	ldr	r3, .L656
 	.loc 4 66 0
 	push	{r4, r5, r6, r7, r8, lr}
 	.cfi_def_cfa_offset 24
@@ -7875,7 +7902,7 @@ FtlBbt2Bitmap:
 	.loc 4 66 0
 	mov	r5, r0
 	.loc 4 74 0
-	ldr	r7, .L655+4
+	ldr	r7, .L656+4
 	.loc 4 66 0
 	mov	r6, r1
 	subs	r4, r5, #2
@@ -7883,32 +7910,32 @@ FtlBbt2Bitmap:
 	.loc 4 69 0
 	ldrh	r2, [r3]
 	movs	r1, #0
-.LVL762:
+.LVL764:
 	.loc 4 74 0
-	ldr	r8, .L655+12
+	ldr	r8, .L656+12
 	.loc 4 69 0
 	mov	r0, r6
-.LVL763:
+.LVL765:
 	lsls	r2, r2, #2
 	bl	ftl_memset
-.LVL764:
-.L652:
+.LVL766:
+.L653:
 	.loc 4 72 0
 	ldrh	r3, [r4, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L649
+	beq	.L650
 	.loc 4 74 0
 	ldrh	r2, [r7]
 	cmp	r2, r3
-	bhi	.L651
+	bhi	.L652
 	.loc 4 74 0 is_stmt 0 discriminator 1
 	movs	r2, #74
 	mov	r1, r8
-	ldr	r0, .L655+8
+	ldr	r0, .L656+8
 	bl	printf
-.LVL765:
-.L651:
+.LVL767:
+.L652:
 	.loc 4 75 0 is_stmt 1 discriminator 2
 	ldrh	r3, [r4, #2]!
 	movs	r2, #1
@@ -7922,13 +7949,13 @@ FtlBbt2Bitmap:
 	orr	r2, r2, r3
 	str	r2, [r6, r1, lsl #2]
 	.loc 4 70 0 discriminator 2
-	bne	.L652
-.L649:
+	bne	.L653
+.L650:
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL766:
-.L656:
+.LVL768:
+.L657:
 	.align	2
-.L655:
+.L656:
 	.word	.LANCHOR137
 	.word	.LANCHOR17
 	.word	.LC1
@@ -7952,7 +7979,7 @@ FtlBbtMemInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	.loc 4 150 0
-	ldr	r0, .L658
+	ldr	r0, .L659
 	movw	r3, #65535
 	.loc 4 152 0
 	movs	r2, #16
@@ -7965,10 +7992,10 @@ FtlBbtMemInit:
 	.loc 4 152 0
 	adds	r0, r0, #12
 	b	ftl_memset
-.LVL767:
-.L659:
+.LVL769:
+.L660:
 	.align	2
-.L658:
+.L659:
 	.word	.LANCHOR37
 	.cfi_endproc
 .LFE230:
@@ -7987,9 +8014,9 @@ FtlFreeSysBlkQueueInit:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL768:
+.LVL770:
 	.loc 2 79 0
-	ldr	r3, .L661
+	ldr	r3, .L662
 	.loc 2 83 0
 	mov	r2, #2048
 	.loc 2 76 0
@@ -8011,15 +8038,15 @@ FtlFreeSysBlkQueueInit:
 	strh	r0, [r3], #8	@ movhi
 	.loc 2 83 0
 	mov	r0, r3
-.LVL769:
+.LVL771:
 	bl	ftl_memset
-.LVL770:
+.LVL772:
 	.loc 2 85 0
 	mov	r0, r4
 	pop	{r4, pc}
-.L662:
+.L663:
 	.align	2
-.L661:
+.L662:
 	.word	.LANCHOR38
 	.cfi_endproc
 .LFE240:
@@ -8038,9 +8065,9 @@ load_l2p_region:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL771:
+.LVL773:
 	.loc 2 446 0
-	ldr	r3, .L669
+	ldr	r3, .L670
 	.loc 2 442 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 40
@@ -8059,43 +8086,43 @@ load_l2p_region:
 	ldrh	r2, [r3]
 	str	r3, [sp, #4]
 	cmp	r2, r0
-	bcs	.L664
+	bcs	.L665
 	.loc 2 446 0 is_stmt 0 discriminator 1
 	mov	r2, #446
-	ldr	r1, .L669+4
-.LVL772:
-	ldr	r0, .L669+8
-.LVL773:
-	bl	printf
+	ldr	r1, .L670+4
 .LVL774:
-.L664:
+	ldr	r0, .L670+8
+.LVL775:
+	bl	printf
+.LVL776:
+.L665:
 	.loc 2 447 0 is_stmt 1
-	ldr	fp, .L669+40
+	ldr	fp, .L670+40
 	movs	r4, #12
-	ldr	r7, .L669+12
+	ldr	r7, .L670+12
 	ldr	r3, [fp]
 	ldr	r8, [r3, r5, lsl #2]
-.LVL775:
+.LVL777:
 	.loc 2 449 0
 	cmp	r8, #0
-	bne	.L665
+	bne	.L666
 	.loc 2 450 0
 	mul	r4, r4, r10
 	ldr	r2, [r7]
 	movs	r1, #255
 	adds	r0, r2, r4
-	ldr	r2, .L669+16
+	ldr	r2, .L670+16
 	ldr	r0, [r0, #8]
 	ldrh	r2, [r2]
 	bl	ftl_memset
-.LVL776:
+.LVL778:
 	.loc 2 451 0
 	ldr	r2, [r7]
 	adds	r1, r2, r4
 	strh	r5, [r2, r4]	@ movhi
 	.loc 2 452 0
 	str	r8, [r1, #4]
-.L666:
+.L667:
 	.loc 2 473 0
 	movs	r0, #0
 	add	sp, sp, #8
@@ -8103,14 +8130,14 @@ load_l2p_region:
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL777:
-.L665:
+.LVL779:
+.L666:
 	.cfi_restore_state
 	.loc 2 456 0
 	mul	r4, r4, r10
 	ldr	r2, [r7]
 	.loc 2 455 0
-	ldr	r6, .L669+20
+	ldr	r6, .L670+20
 	.loc 2 456 0
 	add	r2, r2, r4
 	.loc 2 458 0
@@ -8122,54 +8149,54 @@ load_l2p_region:
 	.loc 2 456 0
 	str	r2, [r6, #8]
 	.loc 2 457 0
-	ldr	r2, .L669+24
+	ldr	r2, .L670+24
 	ldr	r2, [r2]
 	str	r2, [r6, #12]
 	.loc 2 458 0
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL778:
+.LVL780:
 	.loc 2 459 0
 	ldr	r10, [r6, #12]
-.LVL779:
+.LVL781:
 	.loc 2 461 0
 	ldrh	r2, [r10, #8]
 	cmp	r2, r5
-	beq	.L667
+	beq	.L668
 	.loc 2 462 0
 	mov	r2, r8
 	mov	r1, r5
-	ldr	r0, .L669+28
+	ldr	r0, .L670+28
 	bl	printf
-.LVL780:
+.LVL782:
 	.loc 2 463 0
 	movs	r3, #4
 	ldr	r1, [r6, #12]
 	mov	r2, r3
-	ldr	r0, .L669+32
+	ldr	r0, .L670+32
 	bl	rknand_print_hex
-.LVL781:
+.LVL783:
 	.loc 2 464 0
 	ldr	r3, [sp, #4]
 	movs	r2, #4
 	ldr	r1, [fp]
-	ldr	r0, .L669+36
+	ldr	r0, .L670+36
 	ldrh	r3, [r3]
 	bl	rknand_print_hex
-.LVL782:
-.L667:
+.LVL784:
+.L668:
 	.loc 2 467 0
 	ldrh	r3, [r10, #8]
 	cmp	r3, r5
-	beq	.L668
+	beq	.L669
 	.loc 2 467 0 is_stmt 0 discriminator 1
 	movw	r2, #467
-	ldr	r1, .L669+4
-	ldr	r0, .L669+8
+	ldr	r1, .L670+4
+	ldr	r0, .L670+8
 	bl	printf
-.LVL783:
-.L668:
+.LVL785:
+.L669:
 	.loc 2 470 0 is_stmt 1
 	ldr	r3, [r7]
 	movs	r1, #0
@@ -8178,10 +8205,10 @@ load_l2p_region:
 	.loc 2 471 0
 	strh	r5, [r3, r4]	@ movhi
 	.loc 2 472 0
-	b	.L666
-.L670:
+	b	.L667
+.L671:
 	.align	2
-.L669:
+.L670:
 	.word	.LANCHOR32
 	.word	.LANCHOR140
 	.word	.LC1
@@ -8210,7 +8237,7 @@ ftl_free_no_use_map_blk:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL784:
+.LVL786:
 	.loc 2 485 0
 	ldrh	r2, [r0, #10]
 	.loc 2 476 0
@@ -8232,45 +8259,45 @@ ftl_free_no_use_map_blk:
 	movs	r1, #0
 	.loc 2 477 0
 	ldr	r10, [r0, #12]
-.LVL785:
+.LVL787:
 	.loc 2 485 0
 	lsls	r2, r2, #1
 	.loc 2 478 0
 	ldr	r6, [r0, #24]
-.LVL786:
+.LVL788:
 	.loc 2 485 0
 	mov	r0, r5
-.LVL787:
+.LVL789:
 	bl	ftl_memset
-.LVL788:
+.LVL790:
 	.loc 2 486 0
 	movs	r3, #0
-.LVL789:
-.L672:
+.LVL791:
+.L673:
 	.loc 2 486 0 is_stmt 0 discriminator 1
 	ldrh	r1, [r4, #6]
 	uxth	r2, r3
 	cmp	r1, r2
-	bhi	.L676
+	bhi	.L677
 	.loc 2 494 0 is_stmt 1
 	ldrh	r3, [r5]
-.LVL790:
+.LVL792:
 	.loc 2 497 0
 	movs	r6, #0
-.LVL791:
+.LVL793:
 	.loc 2 498 0
-	ldr	r2, .L685
-.LVL792:
+	ldr	r2, .L686
+.LVL794:
 	.loc 2 495 0
 	mov	fp, r6
-.LVL793:
-.L677:
+.LVL795:
+.L678:
 	.loc 2 497 0 discriminator 1
 	ldrh	r0, [r4, #10]
 	uxth	r1, r6
-.LVL794:
+.LVL796:
 	cmp	r0, r1
-	bhi	.L681
+	bhi	.L682
 	.loc 2 513 0
 	mov	r0, fp
 	add	sp, sp, #8
@@ -8278,8 +8305,8 @@ ftl_free_no_use_map_blk:
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL795:
-.L676:
+.LVL797:
+.L677:
 	.cfi_restore_state
 	.loc 2 487 0
 	uxth	r2, r3
@@ -8288,23 +8315,23 @@ ftl_free_no_use_map_blk:
 	movs	r2, #0
 	.loc 2 487 0
 	ubfx	r1, r1, #10, #16
-.LVL796:
-.L673:
+.LVL798:
+.L674:
 	.loc 2 488 0 discriminator 1
 	ldrh	r7, [r4, #10]
 	uxth	r0, r2
 	cmp	r7, r0
-	bhi	.L675
-.LVL797:
-	adds	r3, r3, #1
-.LVL798:
-	b	.L672
+	bhi	.L676
 .LVL799:
-.L675:
+	adds	r3, r3, #1
+.LVL800:
+	b	.L673
+.LVL801:
+.L676:
 	.loc 2 489 0
 	uxth	r0, r2
 	adds	r2, r2, #1
-.LVL800:
+.LVL802:
 	ldrh	r7, [r10, r0, lsl #1]
 	cmp	r7, r1
 	.loc 2 490 0
@@ -8312,15 +8339,15 @@ ftl_free_no_use_map_blk:
 	ldrheq	r7, [r5, r0, lsl #1]
 	addeq	r7, r7, #1
 	strheq	r7, [r5, r0, lsl #1]	@ movhi
-.LVL801:
-	b	.L673
-.LVL802:
-.L681:
+.LVL803:
+	b	.L674
+.LVL804:
+.L682:
 	.loc 2 498 0
 	ldrh	r0, [r4]
 	uxth	r7, r6
 	cmp	r0, r1
-	bne	.L678
+	bne	.L679
 	.loc 2 498 0 is_stmt 0 discriminator 1
 	ldrh	r0, [r2]
 	ldrh	ip, [r4, #2]
@@ -8328,27 +8355,27 @@ ftl_free_no_use_map_blk:
 	.loc 2 499 0 is_stmt 1 discriminator 1
 	it	cc
 	strhcc	r0, [r5, r7, lsl #1]	@ movhi
-.L678:
+.L679:
 	.loc 2 500 0
 	ldrh	r8, [r5, r7, lsl #1]
 	cmp	r3, r8
 	itt	hi
 	movhi	fp, r1
 	movhi	r3, r8
-.LVL803:
+.LVL805:
 	.loc 2 504 0
 	cmp	r8, #0
-	bne	.L680
+	bne	.L681
 	.loc 2 504 0 is_stmt 0 discriminator 1
 	ldrh	r0, [r10, r7, lsl #1]
-	cbz	r0, .L680
+	cbz	r0, .L681
 	.loc 2 506 0 is_stmt 1
 	movs	r1, #1
-.LVL804:
+.LVL806:
 	str	r2, [sp, #4]
 	str	r3, [sp]
 	bl	FtlFreeSysBlkQueueIn
-.LVL805:
+.LVL807:
 	.loc 2 507 0
 	strh	r8, [r10, r7, lsl #1]	@ movhi
 	.loc 2 508 0
@@ -8357,14 +8384,14 @@ ftl_free_no_use_map_blk:
 	ldr	r3, [sp]
 	subs	r1, r1, #1
 	strh	r1, [r4, #8]	@ movhi
-.LVL806:
-.L680:
+.LVL808:
+.L681:
 	adds	r6, r6, #1
-.LVL807:
-	b	.L677
-.L686:
+.LVL809:
+	b	.L678
+.L687:
 	.align	2
-.L685:
+.L686:
 	.word	.LANCHOR20
 	.cfi_endproc
 .LFE257:
@@ -8383,7 +8410,7 @@ Ftl_write_map_blk_to_last_page:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL808:
+.LVL810:
 	push	{r3, r4, r5, r6, r7, lr}
 	.cfi_def_cfa_offset 24
 	.cfi_offset 3, -24
@@ -8399,28 +8426,28 @@ Ftl_write_map_blk_to_last_page:
 	mov	r4, r0
 	.loc 2 586 0
 	ldr	r5, [r0, #12]
-.LVL809:
+.LVL811:
 	.loc 2 591 0
 	cmp	r3, r2
-	bne	.L688
+	bne	.L689
 	.loc 2 592 0
 	ldrh	r3, [r0, #8]
-	cbz	r3, .L689
+	cbz	r3, .L690
 	.loc 2 592 0 is_stmt 0 discriminator 1
 	mov	r2, #592
-	ldr	r1, .L697
-	ldr	r0, .L697+4
-.LVL810:
+	ldr	r1, .L698
+	ldr	r0, .L698+4
+.LVL812:
 	bl	printf
-.LVL811:
-.L689:
+.LVL813:
+.L690:
 	.loc 2 593 0 is_stmt 1
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
 	.loc 2 594 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL812:
+.LVL814:
 	.loc 2 595 0
 	movs	r3, #0
 	.loc 2 594 0
@@ -8433,40 +8460,40 @@ Ftl_write_map_blk_to_last_page:
 	ldr	r3, [r4, #28]
 	adds	r3, r3, #1
 	str	r3, [r4, #28]
-.LVL813:
-.L690:
+.LVL815:
+.L691:
 	.loc 2 628 0
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.LVL814:
-.L688:
+.LVL816:
+.L689:
 	.loc 2 601 0
 	ldrh	r5, [r5, r3, lsl #1]
-.LVL815:
+.LVL817:
 	.loc 2 612 0
 	movs	r1, #255
 	.loc 2 602 0
 	ldrh	r3, [r0, #2]
-	ldr	r2, .L697+8
+	ldr	r2, .L698+8
 	.loc 2 603 0
-	ldr	r7, .L697+12
+	ldr	r7, .L698+12
 	.loc 2 587 0
 	ldr	r6, [r0, #24]
 	.loc 2 602 0
 	orr	r3, r3, r5, lsl #10
 	.loc 2 603 0
 	ldr	r0, [r7]
-.LVL816:
+.LVL818:
 	.loc 2 602 0
 	str	r3, [r2, #4]
 	.loc 2 604 0
-	ldr	r3, .L697+16
+	ldr	r3, .L698+16
 	.loc 2 603 0
 	str	r0, [r2, #8]
 	.loc 2 604 0
 	ldr	r3, [r3]
 	str	r3, [r2, #12]
-.LVL817:
+.LVL819:
 	.loc 2 607 0
 	ldr	r2, [r4, #28]
 	str	r2, [r3, #4]
@@ -8480,12 +8507,12 @@ Ftl_write_map_blk_to_last_page:
 	.loc 2 609 0
 	strh	r2, [r3]	@ movhi
 	.loc 2 612 0
-	ldr	r3, .L697+20
-.LVL818:
+	ldr	r3, .L698+20
+.LVL820:
 	ldrh	r2, [r3]
 	lsls	r2, r2, #3
 	bl	ftl_memset
-.LVL819:
+.LVL821:
 	.loc 2 614 0
 	ldrh	ip, [r4, #6]
 	movs	r3, #0
@@ -8493,22 +8520,22 @@ Ftl_write_map_blk_to_last_page:
 	ldr	r1, [r7]
 	.loc 2 613 0
 	mov	r2, r3
-.LVL820:
-.L691:
+.LVL822:
+.L692:
 	.loc 2 614 0 discriminator 1
 	uxth	r0, r3
 	cmp	ip, r0
-	bhi	.L693
+	bhi	.L694
 	.loc 2 621 0
 	movs	r2, #1
-.LVL821:
+.LVL823:
 	movs	r3, #0
-.LVL822:
+.LVL824:
 	mov	r1, r2
-	ldr	r0, .L697+8
-.LVL823:
+	ldr	r0, .L698+8
+.LVL825:
 	bl	FlashProgPages
-.LVL824:
+.LVL826:
 	.loc 2 622 0
 	ldrh	r3, [r4, #2]
 	.loc 2 626 0
@@ -8518,34 +8545,34 @@ Ftl_write_map_blk_to_last_page:
 	strh	r3, [r4, #2]	@ movhi
 	.loc 2 626 0
 	bl	ftl_map_blk_gc
-.LVL825:
+.LVL827:
 	.loc 2 627 0
-	b	.L690
-.LVL826:
-.L693:
+	b	.L691
+.LVL828:
+.L694:
 	.loc 2 615 0
 	ldr	r0, [r6, r3, lsl #2]
 	cmp	r5, r0, lsr #10
-	bne	.L692
+	bne	.L693
 	.loc 2 616 0
 	adds	r2, r2, #1
-.LVL827:
+.LVL829:
 	uxth	r2, r2
-.LVL828:
+.LVL830:
 	.loc 2 617 0
 	str	r3, [r1, r2, lsl #3]
 	.loc 2 618 0
 	add	r7, r1, r2, lsl #3
 	ldr	r0, [r6, r3, lsl #2]
 	str	r0, [r7, #4]
-.L692:
-.LVL829:
+.L693:
+.LVL831:
 	adds	r3, r3, #1
-.LVL830:
-	b	.L691
-.L698:
+.LVL832:
+	b	.L692
+.L699:
 	.align	2
-.L697:
+.L698:
 	.word	.LANCHOR141
 	.word	.LC1
 	.word	.LANCHOR108
@@ -8569,7 +8596,7 @@ FtlMapWritePage:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL831:
+.LVL833:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 40
 	.cfi_offset 4, -32
@@ -8583,7 +8610,7 @@ FtlMapWritePage:
 	.loc 2 631 0
 	mov	r4, r0
 	.loc 2 638 0
-	ldr	r8, .L718+28
+	ldr	r8, .L719+28
 	.loc 2 631 0
 	mov	r7, r1
 	.loc 2 634 0
@@ -8591,10 +8618,10 @@ FtlMapWritePage:
 	.loc 2 631 0
 	str	r2, [sp, #4]
 	mov	fp, r8
-.LVL832:
-.L700:
+.LVL834:
+.L701:
 	.loc 2 637 0
-	ldr	r2, .L718
+	ldr	r2, .L719
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
@@ -8603,42 +8630,42 @@ FtlMapWritePage:
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	bge	.L701
+	bge	.L702
 	.loc 2 638 0 is_stmt 0 discriminator 1
 	ldrh	r2, [r4]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L702
-.L701:
+	bne	.L703
+.L702:
 	.loc 2 639 0 is_stmt 1
 	mov	r0, r4
 	bl	Ftl_write_map_blk_to_last_page
-.LVL833:
-.L702:
+.LVL835:
+.L703:
 	.loc 2 650 0
 	ldrh	r2, [r4]
 	ldr	r3, [r4, #12]
 	ldrh	r3, [r3, r2, lsl #1]
-	cbnz	r3, .L703
+	cbnz	r3, .L704
 	.loc 2 650 0 is_stmt 0 discriminator 1
 	movw	r2, #650
-	ldr	r1, .L718+4
-	ldr	r0, .L718+8
+	ldr	r1, .L719+4
+	ldr	r0, .L719+8
 	bl	printf
-.LVL834:
-.L703:
+.LVL836:
+.L704:
 	.loc 2 651 0 is_stmt 1
 	ldrh	r2, [r4]
 	ldrh	r3, [r4, #10]
 	cmp	r2, r3
-	bcc	.L704
+	bcc	.L705
 	.loc 2 651 0 is_stmt 0 discriminator 1
 	movw	r2, #651
-	ldr	r1, .L718+4
-	ldr	r0, .L718+8
+	ldr	r1, .L719+4
+	ldr	r0, .L719+8
 	bl	printf
-.LVL835:
-.L704:
+.LVL837:
+.L705:
 	.loc 2 652 0 is_stmt 1
 	ldrh	r2, [r4]
 	.loc 2 658 0
@@ -8646,10 +8673,10 @@ FtlMapWritePage:
 	.loc 2 652 0
 	ldr	r3, [r4, #12]
 	.loc 2 654 0
-	ldr	r5, .L718+12
+	ldr	r5, .L719+12
 	.loc 2 652 0
 	ldrh	r10, [r3, r2, lsl #1]
-.LVL836:
+.LVL838:
 	.loc 2 654 0
 	ldrh	r2, [r4, #2]
 	.loc 2 655 0
@@ -8661,7 +8688,7 @@ FtlMapWritePage:
 	.loc 2 654 0
 	str	r2, [r5, #4]
 	.loc 2 656 0
-	ldr	r2, .L718+16
+	ldr	r2, .L719+16
 	ldr	r0, [r2]
 	.loc 2 658 0
 	movs	r2, #16
@@ -8669,10 +8696,10 @@ FtlMapWritePage:
 	str	r0, [r5, #12]
 	.loc 2 658 0
 	bl	ftl_memset
-.LVL837:
+.LVL839:
 	.loc 2 659 0
 	ldr	r2, [r5, #12]
-.LVL838:
+.LVL840:
 	.loc 2 664 0
 	movs	r3, #1
 	.loc 2 660 0
@@ -8691,10 +8718,10 @@ FtlMapWritePage:
 	strh	r1, [r2]	@ movhi
 	.loc 2 664 0
 	mov	r2, r3
-.LVL839:
+.LVL841:
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL840:
+.LVL842:
 	.loc 2 665 0
 	ldrh	r2, [r4, #2]
 	.loc 2 667 0
@@ -8707,19 +8734,19 @@ FtlMapWritePage:
 	.loc 2 665 0
 	strh	r2, [r4, #2]	@ movhi
 	.loc 2 667 0
-	bne	.L705
+	bne	.L706
 	.loc 2 668 0
 	ldr	r1, [r5, #4]
 	.loc 2 669 0
 	adds	r6, r6, #1
-.LVL841:
+.LVL843:
 	.loc 2 668 0
-	ldr	r0, .L718+20
+	ldr	r0, .L719+20
 	.loc 2 669 0
 	uxth	r6, r6
 	.loc 2 668 0
 	bl	printf
-.LVL842:
+.LVL844:
 	.loc 2 670 0
 	ldrh	r2, [r4, #2]
 	cmp	r2, #2
@@ -8730,26 +8757,26 @@ FtlMapWritePage:
 	strhls	r2, [r4, #2]	@ movhi
 	.loc 2 673 0
 	cmp	r6, #3
-	bls	.L707
+	bls	.L708
 	.loc 2 674 0
 	mov	r2, r6
 	ldr	r1, [r5, #4]
-	ldr	r0, .L718+24
+	ldr	r0, .L719+24
 	bl	printf
-.LVL843:
+.LVL845:
+.L709:
+	b	.L709
 .L708:
-	b	.L708
-.L707:
 	.loc 2 678 0
 	ldr	r3, [r4, #32]
 	cmp	r3, #0
-	beq	.L700
-.L717:
-	b	.L717
-.L705:
+	beq	.L701
+.L718:
+	b	.L718
+.L706:
 	.loc 2 682 0
 	cmp	r2, #1
-	beq	.L700
+	beq	.L701
 	.loc 2 685 0
 	ldr	r2, [r5, #4]
 	.loc 2 687 0
@@ -8762,10 +8789,10 @@ FtlMapWritePage:
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL844:
-.L719:
+.LVL846:
+.L720:
 	.align	2
-.L718:
+.L719:
 	.word	.LANCHOR67
 	.word	.LANCHOR142
 	.word	.LC1
@@ -8791,7 +8818,7 @@ ftl_map_blk_gc:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL845:
+.LVL847:
 	.loc 2 542 0
 	ldr	r3, [r0, #24]
 	.loc 2 537 0
@@ -8809,28 +8836,28 @@ ftl_map_blk_gc:
 	mov	r4, r0
 	.loc 2 541 0
 	ldr	r5, [r0, #12]
-.LVL846:
+.LVL848:
 	.loc 2 542 0
 	str	r3, [sp]
-.LVL847:
+.LVL849:
 	.loc 2 545 0
 	bl	ftl_free_no_use_map_blk
-.LVL848:
+.LVL850:
 	.loc 2 547 0
 	ldrh	r3, [r4, #10]
 	ldrh	r2, [r4, #8]
 	subs	r3, r3, #4
 	cmp	r2, r3
-	blt	.L721
+	blt	.L722
 	.loc 2 548 0
 	uxth	r0, r0
 	ldrh	r7, [r5, r0, lsl #1]
-.LVL849:
+.LVL851:
 	.loc 2 549 0
-	cbz	r7, .L721
+	cbz	r7, .L722
 	.loc 2 549 0 is_stmt 0 discriminator 1
 	ldr	r3, [r4, #32]
-	cbnz	r3, .L721
+	cbnz	r3, .L722
 	.loc 2 550 0 is_stmt 1
 	movs	r2, #1
 	str	r2, [r4, #32]
@@ -8844,125 +8871,125 @@ ftl_map_blk_gc:
 	subs	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
 	.loc 2 553 0
-	ldr	r3, .L732
+	ldr	r3, .L733
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L722
+	bcc	.L723
 	.loc 2 554 0
 	mov	r0, r4
-.LVL850:
+.LVL852:
 	bl	ftl_map_blk_alloc_new_blk
-.LVL851:
-.L722:
+.LVL853:
+.L723:
 	.loc 2 558 0 discriminator 1
-	ldr	r5, .L732+4
-.LVL852:
+	ldr	r5, .L733+4
+.LVL854:
 	.loc 2 537 0 discriminator 1
 	movs	r6, #0
 	.loc 2 558 0 discriminator 1
-	ldr	fp, .L732+20
-.L723:
+	ldr	fp, .L733+20
+.L724:
 	.loc 2 556 0 discriminator 1
 	ldrh	r3, [r4, #6]
 	uxth	r10, r6
-.LVL853:
+.LVL855:
 	cmp	r3, r10
-	bhi	.L727
+	bhi	.L728
 	.loc 2 572 0
 	movs	r1, #1
 	mov	r0, r7
 	bl	FtlFreeSysBlkQueueIn
-.LVL854:
+.LVL856:
 	.loc 2 573 0
 	movs	r3, #0
 	str	r3, [r4, #32]
-.LVL855:
-.L721:
+.LVL857:
+.L722:
 	.loc 2 577 0
-	ldr	r3, .L732
+	ldr	r3, .L733
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L728
+	bcc	.L729
 	.loc 2 578 0
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.LVL856:
-.L728:
+.LVL858:
+.L729:
 	.loc 2 580 0
 	movs	r0, #0
 	add	sp, sp, #8
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
-.LVL857:
+.LVL859:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL858:
-.L727:
+.LVL860:
+.L728:
 	.cfi_restore_state
 	.loc 2 557 0
 	ldr	r3, [sp]
 	uxth	r8, r6
 	ldr	r2, [r3, r8, lsl #2]
 	cmp	r7, r2, lsr #10
-	bne	.L724
+	bne	.L725
 	.loc 2 558 0
 	ldr	r3, [fp]
 	.loc 2 560 0
 	str	r2, [r5, #4]
-.LVL859:
+.LVL861:
 	.loc 2 562 0
 	movs	r2, #1
 	mov	r1, r2
-	ldr	r0, .L732+4
+	ldr	r0, .L733+4
 	.loc 2 558 0
 	str	r3, [r5, #8]
 	.loc 2 559 0
-	ldr	r3, .L732+8
+	ldr	r3, .L733+8
 	ldr	r3, [r3]
 	str	r3, [r5, #12]
 	str	r3, [sp, #4]
-.LVL860:
+.LVL862:
 	.loc 2 562 0
 	bl	FlashReadPages
-.LVL861:
+.LVL863:
 	.loc 2 564 0
 	ldr	r3, [sp, #4]
 	ldrh	r3, [r3, #8]
 	cmp	r3, r10
-	beq	.L725
+	beq	.L726
 	.loc 2 564 0 is_stmt 0 discriminator 1
 	mov	r2, #564
-	ldr	r1, .L732+12
-	ldr	r0, .L732+16
+	ldr	r1, .L733+12
+	ldr	r0, .L733+16
 	bl	printf
-.LVL862:
-.L725:
+.LVL864:
+.L726:
 	.loc 2 565 0 is_stmt 1
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	bne	.L726
+	bne	.L727
 	.loc 2 566 0
 	ldr	r2, [sp]
 	movs	r3, #0
 	str	r3, [r2, r8, lsl #2]
-.L724:
-.LVL863:
-	adds	r6, r6, #1
-.LVL864:
-	b	.L723
+.L725:
 .LVL865:
-.L726:
+	adds	r6, r6, #1
+.LVL866:
+	b	.L724
+.LVL867:
+.L727:
 	.loc 2 568 0
 	ldr	r2, [r5, #8]
 	mov	r1, r8
 	mov	r0, r4
 	bl	FtlMapWritePage
-.LVL866:
-	b	.L724
-.L733:
+.LVL868:
+	b	.L725
+.L734:
 	.align	2
-.L732:
+.L733:
 	.word	.LANCHOR20
 	.word	.LANCHOR108
 	.word	.LANCHOR109
@@ -8986,7 +9013,7 @@ flush_l2p_region:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL867:
+.LVL869:
 	push	{r3, r4, r5, lr}
 	.cfi_def_cfa_offset 16
 	.cfi_offset 3, -16
@@ -8995,21 +9022,21 @@ flush_l2p_region:
 	.cfi_offset 14, -4
 	.loc 2 693 0
 	movs	r4, #12
-	ldr	r5, .L735
+	ldr	r5, .L736
 	muls	r4, r0, r4
 	.loc 2 694 0
-	ldr	r0, .L735+4
-.LVL868:
+	ldr	r0, .L736+4
+.LVL870:
 	.loc 2 693 0
 	ldr	r3, [r5]
 	adds	r2, r3, r4
-.LVL869:
+.LVL871:
 	.loc 2 694 0
 	ldrh	r1, [r3, r4]
-.LVL870:
+.LVL872:
 	ldr	r2, [r2, #8]
 	bl	FtlMapWritePage
-.LVL871:
+.LVL873:
 	.loc 2 695 0
 	ldr	r3, [r5]
 	.loc 2 697 0
@@ -9021,9 +9048,9 @@ flush_l2p_region:
 	str	r3, [r4, #4]
 	.loc 2 697 0
 	pop	{r3, r4, r5, pc}
-.L736:
+.L737:
 	.align	2
-.L735:
+.L736:
 	.word	.LANCHOR56
 	.word	.LANCHOR144
 	.cfi_endproc
@@ -9043,9 +9070,9 @@ log2phys:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL872:
+.LVL874:
 	.loc 2 756 0
-	ldr	r3, .L751
+	ldr	r3, .L752
 	.loc 2 753 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
@@ -9070,118 +9097,118 @@ log2phys:
 	.loc 2 757 0
 	lsls	r4, r4, r3
 	.loc 2 759 0
-	ldr	r3, .L751+4
+	ldr	r3, .L752+4
 	.loc 2 757 0
 	subs	r4, r4, #1
 	.loc 2 756 0
 	uxth	r8, r8
-.LVL873:
+.LVL875:
 	.loc 2 757 0
 	ands	r4, r4, r0
 	.loc 2 759 0
 	ldr	r3, [r3]
 	.loc 2 757 0
 	uxth	r4, r4
-.LVL874:
+.LVL876:
 	.loc 2 759 0
 	cmp	r0, r3
-	bcc	.L738
+	bcc	.L739
 	.loc 2 759 0 is_stmt 0 discriminator 1
 	movw	r2, #759
-.LVL875:
-	ldr	r1, .L751+8
-.LVL876:
-	ldr	r0, .L751+12
 .LVL877:
-	bl	printf
+	ldr	r1, .L752+8
 .LVL878:
-.L738:
+	ldr	r0, .L752+12
+.LVL879:
+	bl	printf
+.LVL880:
+.L739:
 	.loc 2 762 0 is_stmt 1
-	ldr	r6, .L751+16
+	ldr	r6, .L752+16
 	mov	fp, #12
 	.loc 2 761 0
-	ldr	r3, .L751+20
+	ldr	r3, .L752+20
 	.loc 2 762 0
 	ldr	r1, [r6]
 	.loc 2 761 0
 	ldrh	r2, [r3]
 	movs	r3, #0
-.LVL879:
-.L739:
+.LVL881:
+.L740:
 	uxth	r5, r3
-.LVL880:
+.LVL882:
 	.loc 2 761 0 is_stmt 0 discriminator 1
 	cmp	r5, r2
-	bcc	.L744
+	bcc	.L745
 	.loc 2 776 0 is_stmt 1
 	bl	select_l2p_ram_region
-.LVL881:
+.LVL883:
 	.loc 2 777 0
 	mul	fp, fp, r0
 	ldr	r3, [r6]
 	.loc 2 776 0
 	mov	r5, r0
-.LVL882:
+.LVL884:
 	.loc 2 777 0
 	ldrh	r1, [r3, fp]
 	add	r2, r3, fp
 	movw	r3, #65535
 	cmp	r1, r3
-	beq	.L745
+	beq	.L746
 	.loc 2 777 0 is_stmt 0 discriminator 1
 	ldr	r3, [r2, #4]
 	cmp	r3, #0
-	bge	.L745
+	bge	.L746
 	.loc 2 778 0 is_stmt 1
 	bl	flush_l2p_region
-.LVL883:
-.L745:
+.LVL885:
+.L746:
 	.loc 2 781 0
 	mov	r1, r5
 	mov	r0, r8
 	bl	load_l2p_region
-.LVL884:
+.LVL886:
 	.loc 2 782 0
-	b	.L740
-.LVL885:
-.L744:
+	b	.L741
+.LVL887:
+.L745:
 	adds	r3, r3, #1
 	.loc 2 762 0
 	mla	r0, fp, r3, r1
 	ldrh	r0, [r0, #-12]
 	cmp	r0, r8
-	bne	.L739
-.LVL886:
-.L740:
+	bne	.L740
+.LVL888:
+.L741:
 	.loc 2 765 0
 	ldr	r2, [r6]
 	movs	r3, #12
 	mla	r3, r3, r5, r2
 	.loc 2 764 0
 	cmp	r10, #0
-	bne	.L741
+	bne	.L742
 	.loc 2 765 0
 	ldr	r3, [r3, #8]
 	ldr	r3, [r3, r4, lsl #2]
 	str	r3, [r7]
-.L742:
+.L743:
 	.loc 2 771 0
 	ldr	r2, [r6]
 	movs	r3, #12
 	mla	r5, r3, r5, r2
-.LVL887:
+.LVL889:
 	ldr	r3, [r5, #4]
 	adds	r2, r3, #1
-	beq	.L748
+	beq	.L749
 	.loc 2 772 0
 	adds	r3, r3, #1
 	str	r3, [r5, #4]
-.L748:
+.L749:
 	.loc 2 783 0
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL888:
-.L741:
+.LVL890:
+.L742:
 	.loc 2 767 0
 	ldr	r1, [r7]
 	ldr	r2, [r3, #8]
@@ -9191,12 +9218,12 @@ log2phys:
 	orr	r2, r2, #-2147483648
 	str	r2, [r3, #4]
 	.loc 2 769 0
-	ldr	r3, .L751+24
+	ldr	r3, .L752+24
 	strh	r8, [r3]	@ movhi
-	b	.L742
-.L752:
+	b	.L743
+.L753:
 	.align	2
-.L751:
+.L752:
 	.word	.LANCHOR22
 	.word	.LANCHOR62
 	.word	.LANCHOR145
@@ -9221,7 +9248,7 @@ FtlReUsePrevPpa:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL889:
+.LVL891:
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	.cfi_def_cfa_offset 32
 	.cfi_offset 4, -24
@@ -9233,43 +9260,43 @@ FtlReUsePrevPpa:
 	.loc 2 1628 0
 	mov	r6, r0
 	.loc 2 1631 0
-	ldr	r5, .L763
+	ldr	r5, .L764
 	.loc 2 1629 0
 	ubfx	r0, r1, #10, #16
-.LVL890:
+.LVL892:
 	.loc 2 1628 0
 	str	r1, [sp, #4]
 	.loc 2 1629 0
 	bl	P2V_block_in_plane
-.LVL891:
+.LVL893:
 	.loc 2 1631 0
 	ldr	r2, [r5]
 	.loc 2 1629 0
 	mov	r7, r0
-.LVL892:
+.LVL894:
 	.loc 2 1631 0
 	ldrh	r3, [r2, r0, lsl #1]
-	cbnz	r3, .L754
+	cbnz	r3, .L755
 	.loc 2 1632 0
-	ldr	r2, .L763+4
+	ldr	r2, .L764+4
 	ldr	r4, [r2]
 	cmp	r4, #0
-	beq	.L755
-.LBB225:
+	beq	.L756
+.LBB229:
 	.loc 2 1636 0
-	ldr	r2, .L763+8
+	ldr	r2, .L764+8
 	.loc 2 1644 0
 	movw	lr, #65535
 	.loc 2 1636 0
-	ldr	ip, .L763+24
+	ldr	ip, .L764+24
 	.loc 2 1635 0
-	ldr	r0, .L763+12
-.LVL893:
+	ldr	r0, .L764+12
+.LVL895:
 	.loc 2 1636 0
 	ldr	r2, [r2]
 	.loc 2 1635 0
 	ldrh	r1, [r0]
-.LVL894:
+.LVL896:
 	mov	r8, r0
 	.loc 2 1636 0
 	subs	r4, r4, r2
@@ -9279,30 +9306,30 @@ FtlReUsePrevPpa:
 	mov	ip, #6
 	.loc 2 1636 0
 	uxth	r4, r4
-.LVL895:
-.L756:
+.LVL897:
+.L757:
 	.loc 2 1637 0 discriminator 1
 	uxth	r0, r3
 	cmp	r1, r0
-	bls	.L755
+	bls	.L756
 	.loc 2 1638 0
 	cmp	r4, r7
-	bne	.L757
+	bne	.L758
 	.loc 2 1639 0
 	mov	r1, r4
-.LVL896:
-	ldr	r0, .L763+4
+.LVL898:
+	ldr	r0, .L764+4
 	bl	List_remove_node
-.LVL897:
+.LVL899:
 	ldrh	r3, [r8]
-	cbnz	r3, .L758
+	cbnz	r3, .L759
 	.loc 2 1639 0 is_stmt 0 discriminator 1
 	movw	r2, #1639
-	ldr	r1, .L763+16
-	ldr	r0, .L763+20
+	ldr	r1, .L764+16
+	ldr	r0, .L764+20
 	bl	printf
-.LVL898:
-.L758:
+.LVL900:
+.L759:
 	.loc 2 1639 0 discriminator 3
 	ldrh	r3, [r8]
 	.loc 2 1640 0 is_stmt 1 discriminator 3
@@ -9312,46 +9339,46 @@ FtlReUsePrevPpa:
 	strh	r3, [r8]	@ movhi
 	.loc 2 1640 0 discriminator 3
 	bl	INSERT_DATA_LIST
-.LVL899:
+.LVL901:
 	.loc 2 1641 0 discriminator 3
 	ldr	r2, [r5]
 	ldrh	r3, [r2, r7, lsl #1]
-.LVL900:
-.L754:
-.LBE225:
+.LVL902:
+.L755:
+.LBE229:
 	.loc 2 1650 0
 	adds	r3, r3, #1
 	strh	r3, [r2, r7, lsl #1]	@ movhi
-	b	.L755
-.LVL901:
-.L757:
-.LBB226:
+	b	.L756
+.LVL903:
+.L758:
+.LBB230:
 	.loc 2 1644 0
 	mul	r4, ip, r4
-.LVL902:
+.LVL904:
 	adds	r3, r3, #1
-.LVL903:
+.LVL905:
 	ldrh	r4, [r2, r4]
 	cmp	r4, lr
-	bne	.L756
-.LVL904:
-.L755:
-.LBE226:
+	bne	.L757
+.LVL906:
+.L756:
+.LBE230:
 	.loc 2 1652 0
 	movs	r2, #1
 	add	r1, sp, #4
 	mov	r0, r6
 	bl	log2phys
-.LVL905:
+.LVL907:
 	.loc 2 1653 0
 	add	sp, sp, #8
 	.cfi_def_cfa_offset 24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL906:
-.L764:
+.LVL908:
+.L765:
 	.align	2
-.L763:
+.L764:
 	.word	.LANCHOR43
 	.word	.LANCHOR47
 	.word	.LANCHOR41
@@ -9386,54 +9413,54 @@ ftl_scan_all_data:
 	.cfi_offset 14, -4
 	.loc 2 2281 0
 	movs	r5, #0
-	ldr	r7, .L779
+	ldr	r7, .L780
 	.loc 2 2275 0
 	sub	sp, sp, #32
 	.cfi_def_cfa_offset 56
 	.loc 2 2280 0
 	movs	r1, #0
 	.loc 2 2284 0
-	ldr	r8, .L779+24
+	ldr	r8, .L780+24
 	.loc 2 2280 0
-	ldr	r0, .L779+4
+	ldr	r0, .L780+4
 	bl	printf
-.LVL907:
-.L766:
+.LVL909:
+.L767:
 	.loc 2 2281 0 discriminator 1
 	ldr	r3, [r7]
 	cmp	r5, r3
-	bcc	.L772
+	bcc	.L773
 	.loc 2 2303 0
 	add	sp, sp, #32
 	.cfi_remember_state
 	.cfi_def_cfa_offset 24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL908:
-.L772:
+.LVL910:
+.L773:
 	.cfi_restore_state
 	.loc 2 2282 0
 	movs	r2, #0
 	add	r1, sp, #28
 	mov	r0, r5
 	bl	log2phys
-.LVL909:
+.LVL911:
 	.loc 2 2283 0
 	ubfx	r3, r5, #0, #11
-	cbnz	r3, .L767
+	cbnz	r3, .L768
 	.loc 2 2284 0
 	ldr	r2, [sp, #28]
 	mov	r1, r5
 	mov	r0, r8
 	bl	printf
-.LVL910:
-.L767:
+.LVL912:
+.L768:
 	.loc 2 2285 0
 	ldr	r3, [sp, #28]
 	adds	r2, r3, #1
-	beq	.L769
+	beq	.L770
 	.loc 2 2286 0
-	ldr	r4, .L779+8
+	ldr	r4, .L780+8
 	.loc 2 2290 0
 	movs	r2, #0
 	.loc 2 2292 0
@@ -9443,7 +9470,7 @@ ftl_scan_all_data:
 	.loc 2 2292 0
 	mov	r0, r4
 	.loc 2 2288 0
-	ldr	r3, .L779+12
+	ldr	r3, .L780+12
 	.loc 2 2287 0
 	str	r5, [r4, #16]
 	.loc 2 2290 0
@@ -9452,29 +9479,29 @@ ftl_scan_all_data:
 	ldr	r3, [r3]
 	str	r3, [r4, #8]
 	.loc 2 2289 0
-	ldr	r3, .L779+16
+	ldr	r3, .L780+16
 	ldr	r6, [r3]
-.LVL911:
+.LVL913:
 	str	r6, [r4, #12]
 	.loc 2 2292 0
 	bl	FlashReadPages
-.LVL912:
+.LVL914:
 	.loc 2 2293 0
 	ldr	r3, [r4]
 	cmp	r3, #256
-	beq	.L770
+	beq	.L771
 	.loc 2 2293 0 is_stmt 0 discriminator 1
 	adds	r3, r3, #1
-	beq	.L770
+	beq	.L771
 	.loc 2 2294 0 is_stmt 1
 	ldr	r3, [r6, #8]
 	cmp	r5, r3
-	beq	.L769
-.L770:
+	beq	.L770
+.L771:
 	.loc 2 2297 0
 	ldr	r2, [r4, #8]
 	ldr	r3, [r4, #12]
-	ldr	r0, .L779+20
+	ldr	r0, .L780+20
 	ldr	r1, [r2, #4]
 	str	r1, [sp, #16]
 	mov	r1, r5
@@ -9489,15 +9516,15 @@ ftl_scan_all_data:
 	ldr	r2, [r4, #4]
 	ldr	r3, [r3]
 	bl	printf
-.LVL913:
-.L769:
+.LVL915:
+.L770:
 	.loc 2 2281 0 discriminator 2
 	adds	r5, r5, #1
-.LVL914:
-	b	.L766
-.L780:
+.LVL916:
+	b	.L767
+.L781:
 	.align	2
-.L779:
+.L780:
 	.word	.LANCHOR62
 	.word	.LC88
 	.word	.LANCHOR108
@@ -9522,9 +9549,9 @@ FtlReadRefresh:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL915:
+.LVL917:
 	.loc 5 425 0
-	ldr	r3, .L794
+	ldr	r3, .L795
 	.loc 5 419 0
 	push	{r4, r5, r6, lr}
 	.cfi_def_cfa_offset 16
@@ -9538,28 +9565,28 @@ FtlReadRefresh:
 	.loc 5 425 0
 	ldr	r0, [r3, #80]
 	cmp	r0, #0
-	beq	.L782
+	beq	.L783
 	.loc 5 426 0
-	ldr	r6, .L794+4
+	ldr	r6, .L795+4
 	ldr	r0, [r3, #84]
 	ldr	r1, [r6]
 	cmp	r0, r1
-	bcs	.L783
+	bcs	.L784
 	mov	r5, #2048
-.L788:
-.LVL916:
-.LBB232:
-.LBB233:
+.L789:
+.LVL918:
+.LBB236:
+.LBB237:
 	.loc 5 428 0
 	ldr	r0, [r4, #84]
 	ldr	r3, [r6]
 	cmp	r0, r3
-	bcs	.L785
+	bcs	.L786
 	.loc 5 430 0
 	movs	r2, #0
 	mov	r1, sp
 	bl	log2phys
-.LVL917:
+.LVL919:
 	.loc 5 432 0
 	ldr	r2, [sp]
 	.loc 5 431 0
@@ -9570,14 +9597,14 @@ FtlReadRefresh:
 	add	r3, r3, #1
 	str	r3, [r4, #84]
 	.loc 5 432 0
-	beq	.L786
-.LBB234:
+	beq	.L787
+.LBB238:
 	.loc 5 435 0
 	str	r3, [sp, #20]
 	.loc 5 438 0
 	add	r0, sp, #88
 	.loc 5 436 0
-	ldr	r3, .L794+8
+	ldr	r3, .L795+8
 	.loc 5 439 0
 	movs	r1, #1
 	.loc 5 434 0
@@ -9592,46 +9619,46 @@ FtlReadRefresh:
 	str	r3, [sp, #16]
 	.loc 5 439 0
 	bl	FlashReadPages
-.LVL918:
+.LVL920:
 	.loc 5 440 0
 	ldr	r3, [sp, #4]
 	cmp	r3, #256
-	bne	.L785
+	bne	.L786
 	.loc 5 442 0
 	ldr	r0, [sp]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL919:
+.LVL921:
 	bl	FtlGcRefreshBlock
-.LVL920:
-.L785:
-.LBE234:
+.LVL922:
+.L786:
+.LBE238:
 	mov	r0, #-1
-.L781:
-.LBE233:
-.LBE232:
+.L782:
+.LBE237:
+.LBE236:
 	.loc 5 466 0
 	add	sp, sp, #88
 	.cfi_remember_state
 	.cfi_def_cfa_offset 16
 	@ sp needed
 	pop	{r4, r5, r6, pc}
-.LVL921:
-.L786:
+.LVL923:
+.L787:
 	.cfi_restore_state
-.LBB236:
-.LBB235:
+.LBB240:
+.LBB239:
 	.loc 5 427 0
 	subs	r5, r5, #1
-.LVL922:
-	bne	.L788
-	b	.L785
-.LVL923:
-.L783:
-.LBE235:
-.LBE236:
+.LVL924:
+	bne	.L789
+	b	.L786
+.LVL925:
+.L784:
+.LBE239:
+.LBE240:
 	.loc 5 451 0
-	ldr	r2, .L794+12
+	ldr	r2, .L795+12
 	.loc 5 449 0
 	movs	r0, #0
 	str	r0, [r3, #80]
@@ -9640,19 +9667,19 @@ FtlReadRefresh:
 	.loc 5 451 0
 	ldr	r2, [r2]
 	str	r2, [r3, #76]
-	b	.L781
-.L782:
-.LVL924:
-.LBB237:
+	b	.L782
+.L783:
+.LVL926:
+.LBB241:
 	.loc 5 456 0
 	ldr	r1, [r3, #76]
-	ldr	r3, .L794+12
+	ldr	r3, .L795+12
 	ldr	r5, [r3]
 	add	r3, r5, #1048576
 	cmp	r1, r3
-	bhi	.L791
+	bhi	.L792
 	.loc 5 454 0
-	ldr	r3, .L794+16
+	ldr	r3, .L795+16
 	ldr	r2, [r3]
 	mov	r3, #33554432
 	lsrs	r2, r2, #10
@@ -9660,13 +9687,13 @@ FtlReadRefresh:
 	.loc 5 457 0
 	add	r3, r3, r1
 	cmp	r5, r3
-	bhi	.L791
+	bhi	.L792
 	.loc 5 458 0
-	ldr	r3, .L794+20
+	ldr	r3, .L795+20
 	ldrb	r3, [r3, #28]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L781
-.L791:
+	bne	.L782
+.L792:
 	.loc 5 460 0
 	movs	r3, #1
 	.loc 5 461 0
@@ -9677,17 +9704,17 @@ FtlReadRefresh:
 	str	r0, [r4, #84]
 	.loc 5 462 0
 	str	r5, [r4, #76]
-	b	.L781
-.L795:
+	b	.L782
+.L796:
 	.align	2
-.L794:
+.L795:
 	.word	.LANCHOR83
 	.word	.LANCHOR62
 	.word	ftl_temp_buf
 	.word	.LANCHOR63
 	.word	.LANCHOR77
 	.word	.LANCHOR79
-.LBE237:
+.LBE241:
 	.cfi_endproc
 .LFE321:
 	.size	FtlReadRefresh, .-FtlReadRefresh
@@ -9705,7 +9732,7 @@ FtlMapBlkWriteDump_data:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL925:
+.LVL927:
 	.loc 2 903 0
 	ldr	r3, [r0, #36]
 	.loc 2 897 0
@@ -9718,7 +9745,7 @@ FtlMapBlkWriteDump_data:
 	.loc 2 897 0
 	mov	r6, r0
 	.loc 2 903 0
-	cbz	r3, .L796
+	cbz	r3, .L797
 	.loc 2 899 0
 	ldrh	r5, [r0, #6]
 	.loc 2 905 0
@@ -9730,19 +9757,19 @@ FtlMapBlkWriteDump_data:
 	.loc 2 899 0
 	subs	r5, r5, #1
 	.loc 2 907 0
-	ldr	r3, .L800
+	ldr	r3, .L801
 	.loc 2 908 0
-	ldr	r1, .L800+4
+	ldr	r1, .L801+4
 	.loc 2 930 0
 	uxth	r5, r5
 	.loc 2 907 0
-	ldr	r4, .L800+8
+	ldr	r4, .L801+8
 	.loc 2 930 0
 	ldr	r2, [r2, r5, lsl #2]
-.LVL926:
+.LVL928:
 	.loc 2 907 0
 	ldr	r0, [r3]
-.LVL927:
+.LVL929:
 	.loc 2 908 0
 	ldr	r1, [r1]
 	.loc 2 931 0
@@ -9752,15 +9779,15 @@ FtlMapBlkWriteDump_data:
 	.loc 2 908 0
 	str	r1, [r4, #12]
 	.loc 2 932 0
-	cbz	r2, .L798
+	cbz	r2, .L799
 	.loc 2 934 0
 	movs	r2, #1
-.LVL928:
+.LVL930:
 	mov	r0, r4
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL929:
-.L799:
+.LVL931:
+.L800:
 	.loc 2 941 0
 	ldr	r2, [r4, #8]
 	mov	r1, r5
@@ -9773,26 +9800,26 @@ FtlMapBlkWriteDump_data:
 	.cfi_restore 5
 	.cfi_restore 4
 	.cfi_def_cfa_offset 0
-.LVL930:
+.LVL932:
 	.loc 2 941 0
 	b	FtlMapWritePage
-.LVL931:
-.L798:
+.LVL933:
+.L799:
 	.cfi_restore_state
 	.loc 2 938 0
-	ldr	r3, .L800+12
+	ldr	r3, .L801+12
 	movs	r1, #255
 	ldrh	r2, [r3]
-.LVL932:
-	bl	ftl_memset
-.LVL933:
-	b	.L799
 .LVL934:
-.L796:
+	bl	ftl_memset
+.LVL935:
+	b	.L800
+.LVL936:
+.L797:
 	pop	{r4, r5, r6, pc}
-.L801:
+.L802:
 	.align	2
-.L800:
+.L801:
 	.word	.LANCHOR123
 	.word	.LANCHOR109
 	.word	.LANCHOR108
@@ -9827,119 +9854,119 @@ FtlScanSysBlk:
 	.loc 2 1101 0
 	movs	r4, #0
 	.loc 2 1103 0
-	ldr	r5, .L883
+	ldr	r5, .L884
 	.loc 2 1095 0
 	sub	sp, sp, #32
 	.cfi_def_cfa_offset 64
 	.loc 2 1103 0
 	mov	r1, r4
 	.loc 2 1102 0
-	ldr	r3, .L883+4
+	ldr	r3, .L884+4
 	.loc 2 1103 0
 	ldr	r2, [r5]
 	.loc 2 1101 0
-	ldr	r6, .L883+8
+	ldr	r6, .L884+8
 	.loc 2 1102 0
 	strh	r4, [r3]	@ movhi
 	.loc 2 1103 0
-	ldr	r3, .L883+12
+	ldr	r3, .L884+12
 	lsls	r2, r2, #2
 	.loc 2 1101 0
 	strh	r4, [r6]	@ movhi
 	.loc 2 1105 0
-	ldr	r7, .L883+16
+	ldr	r7, .L884+16
 	.loc 2 1103 0
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL935:
+.LVL937:
 	.loc 2 1104 0
 	ldr	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L883+20
+	ldr	r3, .L884+20
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL936:
+.LVL938:
 	.loc 2 1105 0
 	ldrh	r2, [r7]
 	mov	r1, r4
-	ldr	r3, .L883+24
+	ldr	r3, .L884+24
 	lsls	r2, r2, #2
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL937:
+.LVL939:
 	.loc 2 1106 0
 	ldrh	r2, [r7]
 	mov	r1, r4
-	ldr	r3, .L883+28
+	ldr	r3, .L884+28
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL938:
+.LVL940:
 	.loc 2 1107 0
 	movs	r2, #12
 	movs	r1, #255
-	ldr	r0, .L883+32
+	ldr	r0, .L884+32
 	bl	ftl_memset
-.LVL939:
+.LVL941:
 	.loc 2 1109 0
-	ldr	r3, .L883+36
+	ldr	r3, .L884+36
 	str	r6, [sp, #12]
 	str	r5, [sp, #16]
 	ldrh	r3, [r3]
 	str	r3, [sp, #4]
-.LVL940:
-.L803:
+.LVL942:
+.L804:
 	.loc 2 1109 0 is_stmt 0 discriminator 1
-	ldr	r3, .L883+40
+	ldr	r3, .L884+40
 	ldr	r2, [sp, #4]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bls	.L844
+	bls	.L845
 	.loc 2 1113 0 is_stmt 1 discriminator 1
-	ldr	r3, .L883+44
+	ldr	r3, .L884+44
 	.loc 2 1120 0 discriminator 1
 	movs	r5, #0
-	ldr	r1, .L883+48
+	ldr	r1, .L884+48
 	mov	fp, r5
 	.loc 2 1118 0 discriminator 1
 	movs	r7, #20
 	.loc 2 1113 0 discriminator 1
 	ldrh	r8, [r3]
 	.loc 2 1118 0 discriminator 1
-	ldr	r3, .L883+52
+	ldr	r3, .L884+52
 	.loc 2 1120 0 discriminator 1
 	ldr	r2, [r1]
-	ldr	r1, .L883+56
+	ldr	r1, .L884+56
 	.loc 2 1118 0 discriminator 1
 	ldr	r6, [r3]
 	.loc 2 1119 0 discriminator 1
-	ldr	r3, .L883+60
+	ldr	r3, .L884+60
 	.loc 2 1120 0 discriminator 1
 	str	r2, [sp, #8]
 	ldrh	r10, [r1]
 	.loc 2 1119 0 discriminator 1
 	ldr	r3, [r3]
 	.loc 2 1115 0 discriminator 1
-	ldr	r2, .L883+64
-	b	.L845
-.LVL941:
-.L805:
+	ldr	r2, .L884+64
+	b	.L846
+.LVL943:
+.L806:
 	.loc 2 1115 0 is_stmt 0
 	ldrb	r0, [r2, r5]	@ zero_extendqisi2
 	ldr	r1, [sp, #4]
 	str	r3, [sp, #28]
 	str	r2, [sp, #24]
 	bl	V2P_block
-.LVL942:
+.LVL944:
 	str	r0, [sp, #20]
-.LVL943:
+.LVL945:
 	.loc 2 1116 0 is_stmt 1
 	bl	FtlBbmIsBadBlock
-.LVL944:
+.LVL946:
 	ldr	r2, [sp, #24]
 	ldr	r3, [sp, #28]
-	cbnz	r0, .L804
+	cbnz	r0, .L805
 	.loc 2 1118 0
 	ldr	r1, [sp, #20]
 	mla	r0, r7, fp, r6
@@ -9959,29 +9986,29 @@ FtlScanSysBlk:
 	.loc 2 1121 0
 	add	r1, fp, #1
 	uxth	fp, r1
-.LVL945:
-.L804:
+.LVL947:
+.L805:
 	adds	r5, r5, #1
-.LVL946:
-.L845:
+.LVL948:
+.L846:
 	.loc 2 1113 0 discriminator 1
 	uxth	r1, r5
 	cmp	r8, r1
-	bhi	.L805
+	bhi	.L806
 	.loc 2 1124 0
 	cmp	fp, #0
-	bne	.L806
-.LVL947:
-.L843:
+	bne	.L807
+.LVL949:
+.L844:
 	.loc 2 1109 0
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	str	r3, [sp, #4]
-.LVL948:
-	b	.L803
-.LVL949:
-.L806:
+.LVL950:
+	b	.L804
+.LVL951:
+.L807:
 	.loc 2 1128 0
 	movs	r7, #0
 	.loc 2 1127 0
@@ -9989,14 +10016,14 @@ FtlScanSysBlk:
 	mov	r1, fp
 	mov	r0, r6
 	bl	FlashReadPages
-.LVL950:
-.L807:
+.LVL952:
+.L808:
 	.loc 2 1128 0 discriminator 1
 	uxth	r3, r7
 	cmp	fp, r3
-	bls	.L843
+	bls	.L844
 	.loc 2 1129 0
-	ldr	r3, .L883+52
+	ldr	r3, .L884+52
 	mov	r8, #20
 	mul	r8, r8, r7
 	ldr	r3, [r3]
@@ -10011,14 +10038,14 @@ FtlScanSysBlk:
 	adds	r3, r3, #1
 	.loc 2 1129 0
 	ubfx	r5, r5, #10, #16
-.LVL951:
+.LVL953:
 	.loc 2 1132 0
-	bne	.L810
+	bne	.L811
 	mov	r10, #16
-.L812:
-.LVL952:
+.L813:
+.LVL954:
 	.loc 2 1134 0
-	ldr	r3, .L883+52
+	ldr	r3, .L884+52
 	.loc 2 1135 0
 	movs	r2, #1
 	mov	r1, r2
@@ -10030,115 +10057,115 @@ FtlScanSysBlk:
 	str	r3, [r0, #4]
 	.loc 2 1135 0
 	bl	FlashReadPages
-.LVL953:
+.LVL955:
 	.loc 2 1136 0
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
 	.loc 2 1137 0
-	ldr	r3, .L883+52
+	ldr	r3, .L884+52
 	ldr	r3, [r3]
 	.loc 2 1136 0
-	bne	.L809
+	bne	.L810
 	.loc 2 1137 0
 	mov	r2, #-1
 	str	r2, [r3, r8]
 	.loc 2 1145 0
-	ldr	r3, .L883+52
+	ldr	r3, .L884+52
 	ldr	r3, [r3]
 	ldr	r3, [r3, r8]
 	cmp	r3, r2
-	bne	.L810
-.LVL954:
-.L811:
+	bne	.L811
+.LVL956:
+.L812:
 	.loc 2 1287 0
 	movs	r1, #1
-	b	.L882
-.LVL955:
-.L809:
+	b	.L883
+.LVL957:
+.L810:
 	.loc 2 1139 0
 	ldr	r3, [r3, r8]
 	adds	r3, r3, #1
-	bne	.L810
-.LVL956:
+	bne	.L811
+.LVL958:
 	add	r10, r10, #-1
-.LVL957:
+.LVL959:
 	uxth	r10, r10
 	.loc 2 1133 0 discriminator 2
 	cmp	r10, #0
-	bne	.L812
-	b	.L811
-.L810:
+	bne	.L813
+	b	.L812
+.L811:
 	.loc 2 1147 0
-	ldr	r3, .L883+68
+	ldr	r3, .L884+68
 	ldr	r2, [r3]
 	ldr	r3, [r6, #4]
 	adds	r1, r2, #1
-	beq	.L813
+	beq	.L814
 	.loc 2 1147 0 is_stmt 0 discriminator 1
 	cmp	r2, r3
-	bhi	.L814
-.L813:
+	bhi	.L815
+.L814:
 	.loc 2 1149 0 is_stmt 1
 	adds	r2, r3, #1
 	.loc 2 1152 0
 	ittt	ne
-	ldrne	r1, .L883+68
+	ldrne	r1, .L884+68
 	addne	r2, r3, #1
 	strne	r2, [r1]
-.L814:
+.L815:
 	.loc 2 1157 0
 	ldrh	r2, [r6]
 	movw	r1, #61604
 	cmp	r2, r1
-	beq	.L816
-	bhi	.L817
+	beq	.L817
+	bhi	.L818
 	movw	r3, #61574
 	cmp	r2, r3
-	beq	.L818
-.L815:
-.LVL958:
-	adds	r7, r7, #1
-.LVL959:
-	b	.L807
+	beq	.L819
+.L816:
 .LVL960:
-.L817:
+	adds	r7, r7, #1
+.LVL961:
+	b	.L808
+.LVL962:
+.L818:
 	movw	r3, #61634
 	cmp	r2, r3
-	beq	.L819
+	beq	.L820
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L815
+	bne	.L816
 	.loc 2 1280 0
 	movs	r1, #0
-.L882:
+.L883:
 	.loc 2 1287 0
 	mov	r0, r5
 	bl	FtlFreeSysBlkQueueIn
-.LVL961:
-	b	.L815
-.L819:
+.LVL963:
+	b	.L816
+.L820:
 	.loc 2 1162 0
-	ldr	r3, .L883+8
+	ldr	r3, .L884+8
 	ldrh	r2, [r3]
-	ldr	r3, .L883
+	ldr	r3, .L884
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bls	.L821
+	bls	.L822
 	.loc 2 1162 0 is_stmt 0 discriminator 1
 	movw	r2, #1162
-	ldr	r1, .L883+72
-	ldr	r0, .L883+76
+	ldr	r1, .L884+72
+	ldr	r0, .L884+76
 	bl	printf
-.LVL962:
-.L821:
+.LVL964:
+.L822:
 	.loc 2 1163 0 is_stmt 1
 	ldr	r3, [sp, #16]
 	ldr	r2, [sp, #12]
 	ldr	r1, [r3]
 	ldrh	r0, [r2]
 	.loc 2 1165 0
-	ldr	r2, .L883+12
+	ldr	r2, .L884+12
 	.loc 2 1163 0
 	uxth	r10, r1
 	.loc 2 1165 0
@@ -10148,48 +10175,48 @@ FtlScanSysBlk:
 	sub	r10, r10, r0
 	add	r10, r10, #-1
 	sxth	r3, r3
-.LVL963:
+.LVL965:
 	sxth	r10, r10
-.L822:
+.L823:
 	.loc 2 1163 0 is_stmt 0 discriminator 1
 	cmp	r3, r10
-	bgt	.L828
+	bgt	.L829
 	.loc 2 1186 0 is_stmt 1
 	cmp	r3, #0
-	bge	.L860
-	b	.L815
-.L828:
+	bge	.L861
+	b	.L816
+.L829:
 	.loc 2 1165 0
 	ldr	r2, [ip, r3, lsl #2]
 	add	r8, ip, r3, lsl #2
 	ldr	r4, [r6, #4]
 	cmp	r4, r2
-	bls	.L823
+	bls	.L824
 	.loc 2 1167 0
 	ldr	r2, [ip]
-	cbnz	r2, .L824
+	cbnz	r2, .L825
 	.loc 2 1167 0 is_stmt 0 discriminator 1
 	cmp	r1, r0
 	.loc 2 1172 0 is_stmt 1 discriminator 1
 	ittt	ne
-	ldrne	r2, .L883+8
+	ldrne	r2, .L884+8
 	addne	r0, r0, #1
 	strhne	r0, [r2]	@ movhi
-.L824:
+.L825:
 	.loc 2 1178 0 discriminator 1
-	ldr	r2, .L883+20
+	ldr	r2, .L884+20
 	.loc 2 1175 0 discriminator 1
 	uxth	r10, r3
 	.loc 2 1178 0 discriminator 1
 	ldr	r0, [r2]
 	movs	r2, #0
-.L825:
+.L826:
 	.loc 2 1175 0 discriminator 1
 	uxth	lr, r2
 	sxth	r1, r2
-.LVL964:
+.LVL966:
 	cmp	r10, lr
-	bhi	.L826
+	bhi	.L827
 	.loc 2 1180 0
 	ldr	r2, [r6, #4]
 	.loc 2 1186 0
@@ -10199,35 +10226,35 @@ FtlScanSysBlk:
 	.loc 2 1181 0
 	strh	r5, [r0, r3, lsl #1]	@ movhi
 	.loc 2 1186 0
-	blt	.L815
+	blt	.L816
 	.loc 2 1193 0
-	ldr	r2, .L883+8
+	ldr	r2, .L884+8
 	ldrh	r0, [r2]
-	ldr	r2, .L883
+	ldr	r2, .L884
 	ldr	r2, [r2]
 	subs	r2, r2, r0
 	subs	r2, r2, #1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L815
-.LVL965:
-.L860:
+	bgt	.L816
+.LVL967:
+.L861:
 	.loc 2 1195 0
-	ldr	r2, .L883+8
+	ldr	r2, .L884+8
 	adds	r0, r0, #1
 	strh	r0, [r2]	@ movhi
 	.loc 2 1196 0
 	ldr	r2, [r6, #4]
 	str	r2, [ip, r3, lsl #2]
 	.loc 2 1197 0
-	ldr	r2, .L883+20
-.L880:
+	ldr	r2, .L884+20
+.L881:
 	.loc 2 1241 0
 	ldr	r2, [r2]
 	strh	r5, [r2, r3, lsl #1]	@ movhi
-	b	.L815
-.LVL966:
-.L826:
+	b	.L816
+.LVL968:
+.L827:
 	.loc 2 1177 0 discriminator 3
 	add	lr, ip, r1, lsl #2
 	adds	r2, r2, #1
@@ -10239,17 +10266,17 @@ FtlScanSysBlk:
 	str	r4, [ip, r1, lsl #2]
 	.loc 2 1178 0 discriminator 3
 	strh	lr, [r0, r1, lsl #1]	@ movhi
-.LVL967:
-	b	.L825
-.L823:
+.LVL969:
+	b	.L826
+.L824:
 	subs	r3, r3, #1
-.LVL968:
+.LVL970:
 	sxth	r3, r3
-.LVL969:
-	b	.L822
-.L884:
+.LVL971:
+	b	.L823
+.L885:
 	.align	2
-.L883:
+.L884:
 	.word	.LANCHOR30
 	.word	.LANCHOR35
 	.word	.LANCHOR147
@@ -10270,24 +10297,24 @@ FtlScanSysBlk:
 	.word	.LANCHOR71
 	.word	.LANCHOR148
 	.word	.LC1
-.LVL970:
-.L818:
+.LVL972:
+.L819:
 	.loc 2 1203 0
-	ldr	r8, .L885+12
-	ldr	r10, .L885+20
+	ldr	r8, .L886+12
+	ldr	r10, .L886+20
 	ldrh	r2, [r8]
 	ldrh	r3, [r10]
 	cmp	r2, r3
-	bls	.L831
+	bls	.L832
 	.loc 2 1203 0 is_stmt 0 discriminator 1
 	movw	r2, #1203
-	ldr	r1, .L885
-	ldr	r0, .L885+4
+	ldr	r1, .L886
+	ldr	r0, .L886+4
 	bl	printf
-.LVL971:
-.L831:
+.LVL973:
+.L832:
 	.loc 2 1206 0 is_stmt 1
-	ldr	r2, .L885+8
+	ldr	r2, .L886+8
 	.loc 2 1204 0
 	ldrh	lr, [r10]
 	ldrh	ip, [r8]
@@ -10296,63 +10323,63 @@ FtlScanSysBlk:
 	.loc 2 1204 0
 	add	r10, lr, #-1
 	sxth	r3, r10
-.LVL972:
+.LVL974:
 	sub	r10, r10, ip
-.L832:
+.L833:
 	.loc 2 1204 0 is_stmt 0 discriminator 1
 	cmp	r3, r10
-	ble	.L837
+	ble	.L838
 	.loc 2 1206 0 is_stmt 1
 	ldr	r1, [r6, #4]
 	add	r8, r0, r3, lsl #2
 	ldr	r2, [r0, r3, lsl #2]
 	cmp	r1, r2
-	bls	.L833
+	bls	.L834
 	.loc 2 1208 0
 	ldr	r2, [r0]
-	cbnz	r2, .L834
+	cbnz	r2, .L835
 	.loc 2 1208 0 is_stmt 0 discriminator 1
 	cmp	lr, ip
 	.loc 2 1216 0 is_stmt 1 discriminator 1
 	ittt	ne
-	ldrne	r2, .L885+12
+	ldrne	r2, .L886+12
 	addne	ip, ip, #1
 	strhne	ip, [r2]	@ movhi
-.L834:
+.L835:
 	.loc 2 1221 0 discriminator 1
-	ldr	r2, .L885+16
+	ldr	r2, .L886+16
 	.loc 2 1218 0 discriminator 1
 	uxth	r10, r3
 	.loc 2 1221 0 discriminator 1
 	ldr	ip, [r2]
 	movs	r2, #0
-.L835:
+.L836:
 	.loc 2 1218 0 discriminator 1
 	uxth	lr, r2
 	sxth	r1, r2
-.LVL973:
+.LVL975:
 	cmp	r10, lr
-	bhi	.L836
+	bhi	.L837
 	.loc 2 1223 0
 	ldr	r2, [r6, #4]
 	str	r2, [r8]
 	.loc 2 1224 0
 	strh	r5, [ip, r3, lsl #1]	@ movhi
-.LVL974:
-.L837:
+.LVL976:
+.L838:
 	.loc 2 1229 0
 	cmp	r3, #0
-	blt	.L815
+	blt	.L816
 	.loc 2 1237 0
-	ldr	r2, .L885+20
-	ldr	ip, .L885+12
+	ldr	r2, .L886+20
+	ldr	ip, .L886+12
 	ldrh	r2, [r2]
 	ldrh	r1, [ip]
 	subs	r2, r2, #1
 	subs	r2, r2, r1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L815
+	bgt	.L816
 	.loc 2 1240 0
 	ldr	r2, [r6, #4]
 	.loc 2 1239 0
@@ -10361,10 +10388,10 @@ FtlScanSysBlk:
 	.loc 2 1240 0
 	str	r2, [r0, r3, lsl #2]
 	.loc 2 1241 0
-	ldr	r2, .L885+16
-	b	.L880
-.LVL975:
-.L836:
+	ldr	r2, .L886+16
+	b	.L881
+.LVL977:
+.L837:
 	.loc 2 1220 0 discriminator 3
 	add	lr, r0, r1, lsl #2
 	adds	r2, r2, #1
@@ -10376,80 +10403,80 @@ FtlScanSysBlk:
 	str	r4, [r0, r1, lsl #2]
 	.loc 2 1221 0 discriminator 3
 	strh	lr, [ip, r1, lsl #1]	@ movhi
-.LVL976:
-	b	.L835
-.L833:
-	subs	r3, r3, #1
-.LVL977:
-	sxth	r3, r3
 .LVL978:
-	b	.L832
+	b	.L836
+.L834:
+	subs	r3, r3, #1
 .LVL979:
-.L816:
+	sxth	r3, r3
+.LVL980:
+	b	.L833
+.LVL981:
+.L817:
 	.loc 2 1248 0
-	ldr	r8, .L885+40
+	ldr	r8, .L886+40
 	movw	r2, #65535
 	ldrh	r1, [r8]
 	cmp	r1, r2
-	bne	.L839
-.L881:
+	bne	.L840
+.L882:
 	.loc 2 1260 0
 	strh	r5, [r8]	@ movhi
 	.loc 2 1261 0
 	str	r3, [r8, #8]
-	b	.L815
-.L839:
+	b	.L816
+.L840:
 	.loc 2 1255 0
 	ldrh	r0, [r8, #4]
 	cmp	r0, r2
-	beq	.L840
+	beq	.L841
 	.loc 2 1256 0
 	movs	r1, #1
 	bl	FtlFreeSysBlkQueueIn
-.LVL980:
-.L840:
+.LVL982:
+.L841:
 	.loc 2 1257 0
 	ldr	r3, [r6, #4]
 	ldr	r2, [r8, #8]
 	cmp	r2, r3
-	bcs	.L841
+	bcs	.L842
 	.loc 2 1259 0
 	ldrh	r2, [r8]
 	strh	r2, [r8, #4]	@ movhi
-	b	.L881
-.L841:
+	b	.L882
+.L842:
 	.loc 2 1265 0
 	strh	r5, [r8, #4]	@ movhi
-	b	.L815
-.LVL981:
-.L844:
+	b	.L816
+.LVL983:
+.L845:
 	.loc 2 1292 0
-	ldr	r3, .L885+24
+	ldr	r3, .L886+24
 	ldr	r2, [r3]
 	ldrh	r3, [r2]
-	cbz	r3, .L846
-.L849:
+	cbz	r3, .L847
+.L850:
 	.loc 2 1310 0
-	ldr	r3, .L885+16
+	ldr	r3, .L886+16
 	ldr	r4, [r3]
 	ldrh	r2, [r4]
 	cmp	r2, #0
-	beq	.L847
-.L848:
+	beq	.L848
+.L849:
 	.loc 2 1328 0
-	ldr	r3, .L885+28
+	ldr	r3, .L886+28
 	ldrh	r2, [r3]
-	ldr	r3, .L885+32
+	ldr	r3, .L886+32
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bls	.L879
+	bls	.L880
 	.loc 2 1328 0 is_stmt 0 discriminator 1
 	mov	r2, #1328
-	ldr	r1, .L885
-	ldr	r0, .L885+4
+	ldr	r1, .L886
+	ldr	r0, .L886+4
 	bl	printf
-.LVL982:
-.L879:
+.LVL984:
+.L880:
 	.loc 2 1330 0 is_stmt 1
 	movs	r0, #0
 	add	sp, sp, #32
@@ -10457,40 +10484,40 @@ FtlScanSysBlk:
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL983:
-.L846:
+.LVL985:
+.L847:
 	.cfi_restore_state
 	.loc 2 1292 0 discriminator 1
-	ldr	r1, .L885+28
+	ldr	r1, .L886+28
 	ldrh	r1, [r1]
 	cmp	r1, #0
-	beq	.L849
+	beq	.L850
 	.loc 2 1294 0 discriminator 1
-	ldr	r5, .L885+32
+	ldr	r5, .L886+32
 	ldr	r0, [r5]
-.L850:
+.L851:
 	sxth	r1, r3
-.LVL984:
+.LVL986:
 	cmp	r1, r0
-	bcs	.L849
+	bcs	.L850
 	.loc 2 1296 0
 	ldrh	r4, [r2, r1, lsl #1]
 	adds	r3, r3, #1
 	cmp	r4, #0
-	beq	.L850
+	beq	.L851
 	.loc 2 1301 0
-	ldr	r3, .L885+36
+	ldr	r3, .L886+36
 	.loc 2 1302 0
 	movs	r6, #0
 	.loc 2 1301 0
 	ldr	r0, [r3]
 	mov	r3, r1
-.L851:
-.LVL985:
+.L852:
+.LVL987:
 	.loc 2 1298 0 discriminator 1
 	ldr	r4, [r5]
 	cmp	r3, r4
-	bcs	.L849
+	bcs	.L850
 	.loc 2 1300 0 discriminator 3
 	ldrh	r7, [r2, r3, lsl #1]
 	subs	r4, r3, r1
@@ -10501,43 +10528,43 @@ FtlScanSysBlk:
 	.loc 2 1302 0 discriminator 3
 	strh	r6, [r2, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
-.LVL986:
-	sxth	r3, r3
-.LVL987:
-	b	.L851
 .LVL988:
-.L847:
+	sxth	r3, r3
+.LVL989:
+	b	.L852
+.LVL990:
+.L848:
 	.loc 2 1310 0 discriminator 1
-	ldr	r3, .L885+12
+	ldr	r3, .L886+12
 	ldrh	r3, [r3]
 	cmp	r3, #0
-	beq	.L848
+	beq	.L849
 	.loc 2 1312 0 discriminator 1
-	ldr	r5, .L885+20
+	ldr	r5, .L886+20
 	ldrh	r1, [r5]
-.L856:
+.L857:
 	sxth	r3, r2
-.LVL989:
+.LVL991:
 	cmp	r3, r1
 	mov	r6, r3
-	bge	.L848
+	bge	.L849
 	.loc 2 1314 0
 	ldrh	r0, [r4, r3, lsl #1]
 	adds	r2, r2, #1
 	cmp	r0, #0
-	beq	.L856
+	beq	.L857
 	.loc 2 1319 0
-	ldr	r2, .L885+8
+	ldr	r2, .L886+8
 	.loc 2 1320 0
 	movs	r0, #0
 	.loc 2 1319 0
 	ldr	r2, [r2]
-.LVL990:
-.L857:
+.LVL992:
+.L858:
 	.loc 2 1316 0 discriminator 1
 	ldrh	r1, [r5]
 	cmp	r3, r1
-	bge	.L848
+	bge	.L849
 	.loc 2 1318 0 discriminator 3
 	ldrh	r7, [r4, r3, lsl #1]
 	subs	r1, r3, r6
@@ -10549,11 +10576,11 @@ FtlScanSysBlk:
 	.loc 2 1320 0 discriminator 3
 	strh	r0, [r4, r3, lsl #1]	@ movhi
 	sxth	r3, r1
-.LVL991:
-	b	.L857
-.L886:
+.LVL993:
+	b	.L858
+.L887:
 	.align	2
-.L885:
+.L886:
 	.word	.LANCHOR148
 	.word	.LC1
 	.word	.LANCHOR132
@@ -10582,7 +10609,7 @@ FtlMapTblRecovery:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL992:
+.LVL994:
 	.loc 2 1472 0
 	ldr	r3, [r0, #16]
 	.loc 2 1477 0
@@ -10608,7 +10635,7 @@ FtlMapTblRecovery:
 	movs	r6, #0
 	.loc 2 1470 0
 	ldr	r8, [r0, #24]
-.LVL993:
+.LVL995:
 	.loc 2 1472 0
 	str	r3, [sp, #12]
 	.loc 2 1474 0
@@ -10617,20 +10644,20 @@ FtlMapTblRecovery:
 	lsl	r2, fp, #2
 	.loc 2 1471 0
 	ldr	r10, [r0, #12]
-.LVL994:
+.LVL996:
 	.loc 2 1477 0
 	mov	r0, r8
-.LVL995:
+.LVL997:
 	.loc 2 1478 0
-	ldr	r5, .L914
+	ldr	r5, .L915
 	.loc 2 1474 0
 	str	r3, [sp, #4]
-.LVL996:
+.LVL998:
 	.loc 2 1477 0
 	bl	ftl_memset
-.LVL997:
+.LVL999:
 	.loc 2 1478 0
-	ldr	r3, .L914+4
+	ldr	r3, .L915+4
 	.loc 2 1483 0
 	str	r6, [r4, #32]
 	.loc 2 1484 0
@@ -10642,13 +10669,13 @@ FtlMapTblRecovery:
 	.loc 2 1478 0
 	str	r2, [r5, #8]
 	.loc 2 1479 0
-	ldr	r2, .L914+8
+	ldr	r2, .L915+8
 	ldr	r7, [r2]
 	.loc 2 1481 0
 	movw	r2, #65535
 	.loc 2 1479 0
 	str	r7, [r5, #12]
-.LVL998:
+.LVL1000:
 	.loc 2 1481 0
 	strh	r2, [r4]	@ movhi
 	.loc 2 1482 0
@@ -10656,33 +10683,33 @@ FtlMapTblRecovery:
 	.loc 2 1485 0
 	movs	r2, #1
 	str	r2, [r4, #36]
-.LVL999:
-.L888:
+.LVL1001:
+.L889:
 	.loc 2 1486 0 discriminator 1
 	ldr	r2, [sp, #4]
 	sxth	r3, r6
-.LVL1000:
+.LVL1002:
 	cmp	r3, r2
-	bge	.L905
+	bge	.L906
 	.loc 2 1488 0
 	ldr	r2, [sp, #4]
 	subs	r2, r2, #1
 	cmp	r3, r2
 	lsl	r2, r3, #1
-	bne	.L889
+	bne	.L890
 	.loc 2 1490 0
 	ldrh	r0, [r10, r3, lsl #1]
 	movs	r1, #1
 	add	r5, r10, r2
 	str	r3, [sp, #4]
-.LVL1001:
+.LVL1003:
 	bl	FtlGetLastWrittenPage
-.LVL1002:
+.LVL1004:
 	.loc 2 1493 0
 	ldr	r3, [sp, #12]
 	.loc 2 1490 0
 	sxth	r10, r0
-.LVL1003:
+.LVL1005:
 	.loc 2 1492 0
 	strh	r6, [r4]	@ movhi
 	.loc 2 1494 0
@@ -10697,41 +10724,41 @@ FtlMapTblRecovery:
 	.loc 2 1493 0
 	ldr	r3, [r2, r3, lsl #2]
 	str	r3, [r4, #28]
-.LVL1004:
+.LVL1006:
 	.loc 2 1496 0
-	ldr	r3, .L914
-.LVL1005:
-.L890:
+	ldr	r3, .L915
+.LVL1007:
+.L891:
 	sxth	r2, r6
-.LVL1006:
+.LVL1008:
 	.loc 2 1494 0 discriminator 1
 	cmp	r2, r10
-	ble	.L892
-.LVL1007:
-.L905:
+	ble	.L893
+.LVL1009:
+.L906:
 	.loc 2 1547 0
 	mov	r0, r4
 	bl	ftl_free_no_use_map_blk
-.LVL1008:
+.LVL1010:
 	.loc 2 1548 0
-	ldr	r3, .L914+12
+	ldr	r3, .L915+12
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L894
+	bne	.L895
 	.loc 2 1550 0
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.LVL1009:
-.L894:
+.LVL1011:
+.L895:
 	.loc 2 1553 0
 	mov	r0, r4
 	bl	ftl_map_blk_gc
-.LVL1010:
+.LVL1012:
 	.loc 2 1555 0
 	mov	r0, r4
 	bl	ftl_map_blk_gc
-.LVL1011:
+.LVL1013:
 	.loc 2 1557 0
 	movs	r0, #0
 	add	sp, sp, #24
@@ -10739,32 +10766,32 @@ FtlMapTblRecovery:
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1012:
-.L892:
+.LVL1014:
+.L893:
 	.cfi_restore_state
 	.loc 2 1496 0
 	ldrh	r1, [r5]
 	.loc 2 1497 0
-	ldr	r0, .L914
+	ldr	r0, .L915
 	.loc 2 1496 0
 	str	r3, [sp, #4]
 	orr	r2, r2, r1, lsl #10
-.LVL1013:
+.LVL1015:
 	str	r2, [r3, #4]
 	.loc 2 1497 0
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL1014:
+.LVL1016:
 	.loc 2 1500 0
 	ldr	r3, [sp, #4]
 	ldr	r2, [r3]
 	adds	r2, r2, #1
-	beq	.L891
+	beq	.L892
 	.loc 2 1502 0
 	ldrh	r2, [r7, #8]
 	cmp	fp, r2
-	bls	.L891
+	bls	.L892
 	.loc 2 1502 0 is_stmt 0 discriminator 1
 	ldrh	r1, [r4, #4]
 	ldrh	r0, [r7]
@@ -10773,27 +10800,27 @@ FtlMapTblRecovery:
 	itt	eq
 	ldreq	r1, [r3, #4]
 	streq	r1, [r8, r2, lsl #2]
-.L891:
-.LVL1015:
-	adds	r6, r6, #1
-.LVL1016:
-	b	.L890
+.L892:
 .LVL1017:
-.L889:
+	adds	r6, r6, #1
+.LVL1018:
+	b	.L891
+.LVL1019:
+.L890:
 	.loc 2 1510 0
 	ldr	r1, [sp, #8]
 	.loc 2 1511 0
 	add	r2, r10, r2
 	str	r2, [sp, #16]
 	.loc 2 1512 0
-	ldr	r0, .L914
+	ldr	r0, .L915
 	.loc 2 1510 0
 	ldr	r1, [r1]
 	str	r1, [r5, #8]
 	.loc 2 1511 0
 	ldrh	r1, [r10, r3, lsl #1]
-	ldr	r3, .L914+12
-.LVL1018:
+	ldr	r3, .L915+12
+.LVL1020:
 	ldrh	r2, [r3]
 	str	r3, [sp, #20]
 	subs	r2, r2, #1
@@ -10803,57 +10830,57 @@ FtlMapTblRecovery:
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL1019:
+.LVL1021:
 	.loc 2 1515 0
 	ldr	r2, [r5]
 	adds	r2, r2, #1
-	beq	.L907
+	beq	.L908
 	.loc 2 1515 0 is_stmt 0 discriminator 1
 	ldrh	r1, [r7]
 	ldrh	r2, [r4, #4]
 	ldr	r3, [sp, #20]
 	cmp	r1, r2
-	bne	.L907
+	bne	.L908
 	.loc 2 1515 0 discriminator 2
 	ldrh	r1, [r7, #8]
 	movw	r2, #64245
 	cmp	r1, r2
-	beq	.L896
-.L907:
+	beq	.L897
+.L908:
 	movs	r3, #0
-.L897:
-.LVL1020:
+.L898:
+.LVL1022:
 	.loc 2 1530 0 is_stmt 1 discriminator 1
-	ldr	r1, .L914+12
+	ldr	r1, .L915+12
 	sxth	r2, r3
 	ldrh	r1, [r1]
 	cmp	r2, r1
-	bge	.L903
+	bge	.L904
 	str	r3, [sp, #20]
 	.loc 2 1532 0
 	ldr	r3, [sp, #16]
-.LVL1021:
+.LVL1023:
 	.loc 2 1533 0
-	ldr	r0, .L914
+	ldr	r0, .L915
 	.loc 2 1532 0
 	ldrh	r1, [r3]
 	orr	r2, r2, r1, lsl #10
-.LVL1022:
+.LVL1024:
 	str	r2, [r5, #4]
 	.loc 2 1533 0
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL1023:
+.LVL1025:
 	.loc 2 1536 0
 	ldr	r2, [r5]
 	ldr	r3, [sp, #20]
 	adds	r2, r2, #1
-	beq	.L901
+	beq	.L902
 	.loc 2 1538 0
 	ldrh	r2, [r7, #8]
 	cmp	fp, r2
-	bls	.L901
+	bls	.L902
 	.loc 2 1538 0 is_stmt 0 discriminator 1
 	ldrh	r1, [r4, #4]
 	ldrh	r0, [r7]
@@ -10862,12 +10889,12 @@ FtlMapTblRecovery:
 	itt	eq
 	ldreq	r1, [r5, #4]
 	streq	r1, [r8, r2, lsl #2]
-.L901:
-.LVL1024:
+.L902:
+.LVL1026:
 	adds	r3, r3, #1
-.LVL1025:
-	b	.L897
-.L896:
+.LVL1027:
+	b	.L898
+.L897:
 	.loc 2 1518 0 discriminator 1
 	ldrh	r2, [r3]
 	.loc 2 1520 0 discriminator 1
@@ -10877,25 +10904,25 @@ FtlMapTblRecovery:
 	subs	r2, r2, #1
 	.loc 2 1520 0 discriminator 1
 	ldr	ip, [r3]
-.L898:
+.L899:
 	sxth	r3, r1
-.LVL1026:
+.LVL1028:
 	.loc 2 1518 0 discriminator 1
 	cmp	r3, r2
-	blt	.L900
-.L903:
-.LVL1027:
-	adds	r6, r6, #1
-.LVL1028:
-	b	.L888
+	blt	.L901
+.L904:
 .LVL1029:
-.L900:
+	adds	r6, r6, #1
+.LVL1030:
+	b	.L889
+.LVL1031:
+.L901:
 	.loc 2 1520 0
 	lsls	r0, r3, #3
 	ldr	r3, [ip, r3, lsl #3]
-.LVL1030:
+.LVL1032:
 	adds	r1, r1, #1
-.LVL1031:
+.LVL1033:
 	.loc 2 1521 0
 	uxth	lr, r3
 	cmp	fp, lr
@@ -10903,13 +10930,13 @@ FtlMapTblRecovery:
 	itttt	hi
 	addhi	r0, r0, ip
 	movhi	r3, lr
-.LVL1032:
+.LVL1034:
 	ldrhi	r0, [r0, #4]
 	strhi	r0, [r8, r3, lsl #2]
-	b	.L898
-.L915:
+	b	.L899
+.L916:
 	.align	2
-.L914:
+.L915:
 	.word	.LANCHOR108
 	.word	.LANCHOR39
 	.word	.LANCHOR109
@@ -10936,46 +10963,46 @@ FtlLoadVonderInfo:
 	.cfi_offset 3, -8
 	.cfi_offset 14, -4
 	.loc 2 1561 0
-	ldr	r3, .L917
-	ldr	r0, .L917+4
+	ldr	r3, .L918
+	ldr	r0, .L918+4
 	ldrh	r3, [r3]
 	strh	r3, [r0, #10]	@ movhi
 	.loc 2 1562 0
 	movw	r3, #61574
 	strh	r3, [r0, #4]	@ movhi
 	.loc 2 1563 0
-	ldr	r3, .L917+8
+	ldr	r3, .L918+8
 	ldrh	r3, [r3]
 	strh	r3, [r0, #8]	@ movhi
 	.loc 2 1564 0
-	ldr	r3, .L917+12
+	ldr	r3, .L918+12
 	ldrh	r3, [r3]
 	strh	r3, [r0, #6]	@ movhi
 	.loc 2 1565 0
-	ldr	r3, .L917+16
+	ldr	r3, .L918+16
 	ldr	r3, [r3]
 	str	r3, [r0, #12]
 	.loc 2 1566 0
-	ldr	r3, .L917+20
+	ldr	r3, .L918+20
 	ldr	r3, [r3]
 	str	r3, [r0, #16]
 	.loc 2 1567 0
-	ldr	r3, .L917+24
+	ldr	r3, .L918+24
 	ldr	r3, [r3]
 	str	r3, [r0, #20]
 	.loc 2 1568 0
-	ldr	r3, .L917+28
+	ldr	r3, .L918+28
 	ldr	r3, [r3]
 	str	r3, [r0, #24]
 	.loc 2 1570 0
 	bl	FtlMapTblRecovery
-.LVL1033:
+.LVL1035:
 	.loc 2 1573 0
 	movs	r0, #0
 	pop	{r3, pc}
-.L918:
+.L919:
 	.align	2
-.L917:
+.L918:
 	.word	.LANCHOR27
 	.word	.LANCHOR149
 	.word	.LANCHOR35
@@ -11011,20 +11038,20 @@ FtlL2PDataInit:
 	.cfi_offset 14, -4
 	.loc 2 1578 0
 	movs	r1, #0
-	ldr	r5, .L922
-	ldr	r4, .L922+4
+	ldr	r5, .L923
+	ldr	r4, .L923+4
 	ldr	r2, [r5]
 	.loc 2 1579 0
-	ldr	r7, .L922+8
-	ldr	r6, .L922+12
+	ldr	r7, .L923+8
+	ldr	r6, .L923+12
 	.loc 2 1578 0
 	ldr	r0, [r4]
 	lsls	r2, r2, #1
 	.loc 2 1579 0
-	ldr	r8, .L922+44
+	ldr	r8, .L923+44
 	.loc 2 1578 0
 	bl	ftl_memset
-.LVL1034:
+.LVL1036:
 	.loc 2 1579 0
 	ldrh	r3, [r7]
 	movs	r1, #255
@@ -11032,8 +11059,8 @@ FtlL2PDataInit:
 	ldr	r0, [r8]
 	muls	r2, r3, r2
 	bl	ftl_memset
-.LVL1035:
-	ldr	r3, .L922+16
+.LVL1037:
+	ldr	r3, .L923+16
 	movw	r0, #65535
 	ldrh	r1, [r6]
 	.loc 2 1584 0
@@ -11047,15 +11074,15 @@ FtlL2PDataInit:
 	movs	r3, #0
 	.loc 2 1582 0
 	mov	lr, r3
-.LVL1036:
-.L920:
+.LVL1038:
+.L921:
 	adds	r2, r2, #12
 	adds	r6, r3, r7
 	.loc 2 1580 0 discriminator 1
 	cmp	r2, r1
-	bne	.L921
+	bne	.L922
 	.loc 2 1586 0
-	ldr	r3, .L922+20
+	ldr	r3, .L923+20
 	.loc 2 1588 0
 	ldr	r2, [r5]
 	.loc 2 1586 0
@@ -11066,33 +11093,33 @@ FtlL2PDataInit:
 	movw	r2, #61634
 	strh	r2, [r3, #4]	@ movhi
 	.loc 2 1590 0
-	ldr	r2, .L922+24
+	ldr	r2, .L923+24
 	.loc 2 1587 0
 	strh	r0, [r3]	@ movhi
 	.loc 2 1590 0
 	ldrh	r2, [r2]
 	strh	r2, [r3, #8]	@ movhi
 	.loc 2 1591 0
-	ldr	r2, .L922+28
+	ldr	r2, .L923+28
 	ldrh	r2, [r2]
 	strh	r2, [r3, #6]	@ movhi
 	.loc 2 1592 0
-	ldr	r2, .L922+32
+	ldr	r2, .L923+32
 	ldr	r2, [r2]
 	str	r2, [r3, #12]
 	.loc 2 1593 0
-	ldr	r2, .L922+36
+	ldr	r2, .L923+36
 	ldr	r2, [r2]
 	str	r2, [r3, #16]
 	.loc 2 1594 0
 	ldr	r2, [r4]
 	str	r2, [r3, #20]
 	.loc 2 1595 0
-	ldr	r2, .L922+40
+	ldr	r2, .L923+40
 	ldr	r2, [r2]
 	str	r2, [r3, #24]
 	pop	{r4, r5, r6, r7, r8, pc}
-.L921:
+.L922:
 	.loc 2 1584 0 discriminator 3
 	bic	r3, r3, #3
 	.loc 2 1582 0 discriminator 3
@@ -11104,10 +11131,10 @@ FtlL2PDataInit:
 	.loc 2 1584 0 discriminator 3
 	str	r3, [r2, #-4]
 	mov	r3, r6
-	b	.L920
-.L923:
+	b	.L921
+.L924:
 	.align	2
-.L922:
+.L923:
 	.word	.LANCHOR30
 	.word	.LANCHOR130
 	.word	.LANCHOR23
@@ -11143,17 +11170,17 @@ FtlLoadMapInfo:
 	.cfi_offset 14, -4
 	.loc 2 1600 0
 	bl	FtlL2PDataInit
-.LVL1037:
+.LVL1039:
 	.loc 2 1602 0
-	ldr	r0, .L925
+	ldr	r0, .L926
 	bl	FtlMapTblRecovery
-.LVL1038:
+.LVL1040:
 	.loc 2 1605 0
 	movs	r0, #0
 	pop	{r3, pc}
-.L926:
+.L927:
 	.align	2
-.L925:
+.L926:
 	.word	.LANCHOR144
 	.cfi_endproc
 .LFE281:
@@ -11180,80 +11207,80 @@ FtlVariablesInit:
 	.cfi_offset 14, -4
 	.loc 3 496 0
 	movs	r4, #0
-	ldr	r3, .L928
+	ldr	r3, .L929
 	.loc 3 497 0
 	movw	r2, #65535
 	.loc 3 502 0
 	mov	r1, r4
 	.loc 3 503 0
-	ldr	r5, .L928+4
+	ldr	r5, .L929+4
 	.loc 3 496 0
 	str	r4, [r3]
 	.loc 3 497 0
-	ldr	r3, .L928+8
+	ldr	r3, .L929+8
 	strh	r2, [r3]	@ movhi
 	.loc 3 500 0
 	mov	r2, #-1
 	.loc 3 498 0
-	ldr	r3, .L928+12
+	ldr	r3, .L929+12
 	str	r4, [r3]
 	.loc 3 499 0
-	ldr	r3, .L928+16
+	ldr	r3, .L929+16
 	str	r4, [r3]
 	.loc 3 500 0
-	ldr	r3, .L928+20
+	ldr	r3, .L929+20
 	str	r2, [r3]
 	.loc 3 501 0
-	ldr	r3, .L928+24
+	ldr	r3, .L929+24
 	strh	r4, [r3]	@ movhi
 	.loc 3 502 0
-	ldr	r3, .L928+28
+	ldr	r3, .L929+28
 	ldrh	r2, [r3]
-	ldr	r3, .L928+32
+	ldr	r3, .L929+32
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL1039:
+.LVL1041:
 	.loc 3 503 0
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L928+36
+	ldr	r3, .L929+36
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL1040:
+.LVL1042:
 	.loc 3 504 0
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L928+40
+	ldr	r3, .L929+40
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL1041:
+.LVL1043:
 	.loc 3 505 0
 	mov	r1, r4
 	movs	r2, #48
-	ldr	r0, .L928+44
+	ldr	r0, .L929+44
 	bl	ftl_memset
-.LVL1042:
+.LVL1044:
 	.loc 3 506 0
 	mov	r2, #512
 	mov	r1, r4
-	ldr	r0, .L928+48
+	ldr	r0, .L929+48
 	bl	ftl_memset
-.LVL1043:
+.LVL1045:
 	.loc 3 507 0
 	bl	FtlGcBufInit
-.LVL1044:
+.LVL1046:
 	.loc 3 508 0
 	bl	FtlL2PDataInit
-.LVL1045:
+.LVL1047:
 	.loc 3 510 0
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L929:
+.L930:
 	.align	2
-.L928:
+.L929:
 	.word	.LANCHOR150
 	.word	.LANCHOR6
 	.word	.LANCHOR151
@@ -11296,12 +11323,12 @@ SupperBlkListInit:
 	.cfi_offset 14, -4
 	.loc 2 2071 0
 	movs	r2, #6
-	ldr	r3, .L941
+	ldr	r3, .L942
 	movs	r1, #0
 	.loc 2 2072 0
 	movs	r4, #0
 	.loc 2 2071 0
-	ldr	r5, .L941+4
+	ldr	r5, .L942+4
 	.loc 2 2077 0
 	mov	r8, r4
 	.loc 2 2071 0
@@ -11313,84 +11340,84 @@ SupperBlkListInit:
 	mov	r10, r5
 	muls	r2, r3, r2
 	bl	ftl_memset
-.LVL1046:
+.LVL1048:
 	.loc 2 2072 0
-	ldr	r3, .L941+8
+	ldr	r3, .L942+8
 	.loc 2 2075 0
-	ldr	r2, .L941+12
+	ldr	r2, .L942+12
 	.loc 2 2072 0
 	str	r4, [r3]
 	.loc 2 2073 0
-	ldr	r3, .L941+16
+	ldr	r3, .L942+16
 	.loc 2 2075 0
 	strh	r4, [r2]	@ movhi
 	str	r2, [sp, #4]
 	.loc 2 2073 0
 	str	r4, [r3]
 	.loc 2 2074 0
-	ldr	r3, .L941+20
+	ldr	r3, .L942+20
 	str	r4, [r3]
 	.loc 2 2076 0
-	ldr	r3, .L941+24
+	ldr	r3, .L942+24
 	mov	fp, r3
 	strh	r4, [r3]	@ movhi
-.LVL1047:
-.L931:
+.LVL1049:
+.L932:
 	.loc 2 2079 0 discriminator 1
-	ldr	r3, .L941+28
+	ldr	r3, .L942+28
 	uxth	r7, r4
-.LVL1048:
+.LVL1050:
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	bcs	.L937
+	bcs	.L938
 	.loc 2 2081 0
-	ldr	r3, .L941+32
+	ldr	r3, .L942+32
 	ldrh	r2, [r3]
 	.loc 2 2084 0
-	ldr	r3, .L941+36
+	ldr	r3, .L942+36
 	ldrh	r3, [r3]
 	str	r3, [sp]
 	movs	r3, #0
 	mov	r5, r3
-	b	.L938
-.LVL1049:
-.L933:
+	b	.L939
+.LVL1051:
+.L934:
 	str	r2, [sp, #12]
 	.loc 2 2082 0
 	mov	r1, r7
-	ldr	r2, .L941+40
+	ldr	r2, .L942+40
 	str	r3, [sp, #8]
 	ldrb	r0, [r2, r3]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL1050:
+.LVL1052:
 	.loc 2 2083 0
 	bl	FtlBbmIsBadBlock
-.LVL1051:
+.LVL1053:
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #12]
-	cbnz	r0, .L932
+	cbnz	r0, .L933
 	.loc 2 2084 0
 	ldr	r1, [sp]
 	add	r5, r5, r1
-.LVL1052:
+.LVL1054:
 	uxth	r5, r5
-.LVL1053:
-.L932:
+.LVL1055:
+.L933:
 	adds	r3, r3, #1
-.LVL1054:
-.L938:
+.LVL1056:
+.L939:
 	.loc 2 2081 0 discriminator 1
 	uxth	r1, r3
 	cmp	r2, r1
-	bhi	.L933
+	bhi	.L934
 	.loc 2 2086 0
-	cbz	r5, .L940
+	cbz	r5, .L941
 	.loc 2 2087 0
 	mov	r1, r5
 	mov	r0, #32768
 	bl	__aeabi_idiv
-.LVL1055:
-.L934:
+.LVL1057:
+.L935:
 	.loc 2 2088 0
 	ldr	r1, [r10]
 	uxth	r2, r4
@@ -11398,63 +11425,63 @@ SupperBlkListInit:
 	mla	r3, r3, r2, r1
 	strh	r0, [r3, #4]	@ movhi
 	.loc 2 2090 0
-	ldr	r3, .L941+44
+	ldr	r3, .L942+44
 	ldrh	r3, [r3]
 	cmp	r3, r7
-	beq	.L935
+	beq	.L936
 	.loc 2 2091 0 discriminator 1
-	ldr	r3, .L941+48
+	ldr	r3, .L942+48
 	.loc 2 2090 0 discriminator 1
 	ldrh	r3, [r3]
 	cmp	r3, r7
-	beq	.L935
+	beq	.L936
 	.loc 2 2092 0
-	ldr	r3, .L941+52
+	ldr	r3, .L942+52
 	.loc 2 2091 0
 	ldrh	r3, [r3]
 	cmp	r3, r7
-	beq	.L935
+	beq	.L936
 	.loc 2 2094 0
-	ldr	r3, .L941+56
+	ldr	r3, .L942+56
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r2, lsl #1]
-	cbnz	r3, .L936
+	cbnz	r3, .L937
 	.loc 2 2095 0
 	add	r8, r8, #1
-.LVL1056:
+.LVL1058:
 	.loc 2 2096 0
 	mov	r0, r7
-.LVL1057:
+.LVL1059:
 	.loc 2 2095 0
 	uxth	r8, r8
-.LVL1058:
+.LVL1060:
 	.loc 2 2096 0
 	bl	INSERT_FREE_LIST
-.LVL1059:
-.L935:
-	adds	r4, r4, #1
-.LVL1060:
-	b	.L931
 .LVL1061:
-.L940:
-	mov	r0, r5
-	b	.L934
-.LVL1062:
 .L936:
+	adds	r4, r4, #1
+.LVL1062:
+	b	.L932
+.LVL1063:
+.L941:
+	mov	r0, r5
+	b	.L935
+.LVL1064:
+.L937:
 	.loc 2 2098 0
 	adds	r6, r6, #1
-.LVL1063:
+.LVL1065:
 	.loc 2 2099 0
 	mov	r0, r7
-.LVL1064:
+.LVL1066:
 	.loc 2 2098 0
 	uxth	r6, r6
-.LVL1065:
+.LVL1067:
 	.loc 2 2099 0
 	bl	INSERT_DATA_LIST
-.LVL1066:
-	b	.L935
-.L937:
+.LVL1068:
+	b	.L936
+.L938:
 	.loc 2 2103 0
 	ldr	r2, [sp, #4]
 	.loc 2 2104 0
@@ -11463,26 +11490,26 @@ SupperBlkListInit:
 	strh	r6, [r2]	@ movhi
 	.loc 2 2105 0
 	add	r6, r6, r8
-.LVL1067:
+.LVL1069:
 	cmp	r6, r3
-	ble	.L939
+	ble	.L940
 	.loc 2 2105 0 is_stmt 0 discriminator 1
 	movw	r2, #2105
-	ldr	r1, .L941+60
-	ldr	r0, .L941+64
+	ldr	r1, .L942+60
+	ldr	r0, .L942+64
 	bl	printf
-.LVL1068:
-.L939:
+.LVL1070:
+.L940:
 	.loc 2 2107 0 is_stmt 1
 	movs	r0, #0
 	add	sp, sp, #16
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1069:
-.L942:
+.LVL1071:
+.L943:
 	.align	2
-.L941:
+.L942:
 	.word	.LANCHOR6
 	.word	.LANCHOR41
 	.word	.LANCHOR47
@@ -11517,7 +11544,7 @@ ftl_check_vpc:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1070:
+.LVL1072:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 40
 	.cfi_offset 4, -32
@@ -11530,177 +11557,177 @@ ftl_check_vpc:
 	.cfi_offset 14, -4
 	.loc 2 2232 0
 	movs	r4, #0
-	ldr	r6, .L967
+	ldr	r6, .L968
 	.loc 2 2238 0
-	ldr	r5, .L967+4
+	ldr	r5, .L968+4
 	.loc 2 2229 0
-	ldr	r1, .L967+8
-	ldr	r0, .L967+12
+	ldr	r1, .L968+8
+	ldr	r0, .L968+12
 	bl	printf
-.LVL1071:
+.LVL1073:
 	.loc 2 2231 0
 	mov	r2, #8192
 	movs	r1, #0
-	ldr	r0, .L967+4
+	ldr	r0, .L968+4
 	bl	ftl_memset
-.LVL1072:
-.L944:
+.LVL1074:
+.L945:
 	.loc 2 2232 0 discriminator 1
 	ldr	r3, [r6]
 	cmp	r4, r3
-	bcc	.L946
+	bcc	.L947
 	.loc 2 2243 0 discriminator 1
-	ldr	r10, .L967+48
+	ldr	r10, .L968+48
 	movs	r4, #0
-.LVL1073:
+.LVL1075:
 	.loc 2 2245 0 discriminator 1
-	ldr	r7, .L967+16
+	ldr	r7, .L968+16
 	mov	r6, r4
-.LVL1074:
-.L947:
+.LVL1076:
+.L948:
 	.loc 2 2243 0 discriminator 1
 	ldrh	r2, [r10]
 	uxth	r3, r4
 	cmp	r2, r3
-	bhi	.L949
+	bhi	.L950
 	.loc 2 2255 0
-	ldr	r3, .L967+20
+	ldr	r3, .L968+20
 	ldr	r4, [r3]
-.LVL1075:
-	cbz	r4, .L950
-.LBB238:
+.LVL1077:
+	cbz	r4, .L951
+.LBB242:
 	.loc 2 2257 0
-	ldr	r3, .L967+24
+	ldr	r3, .L968+24
 	.loc 2 2259 0
 	mov	r8, #0
 	.loc 2 2258 0
-	ldr	r5, .L967+28
+	ldr	r5, .L968+28
 	.loc 2 2261 0
-	ldr	r10, .L967+16
+	ldr	r10, .L968+16
 	.loc 2 2257 0
 	ldrh	r7, [r3]
-.LVL1076:
+.LVL1078:
 	.loc 2 2258 0
 	ldr	r3, [r5]
 	.loc 2 2263 0
-	ldr	fp, .L967+4
+	ldr	fp, .L968+4
 	.loc 2 2258 0
 	subs	r4, r4, r3
-	ldr	r3, .L967+32
+	ldr	r3, .L968+32
 	asrs	r4, r4, #1
 	muls	r4, r3, r4
 	uxth	r4, r4
-.LVL1077:
-.L951:
+.LVL1079:
+.L952:
 	.loc 2 2259 0 discriminator 1
 	uxth	r3, r8
 	cmp	r7, r3
-	bls	.L950
+	bls	.L951
 	.loc 2 2261 0
 	ldr	r3, [r10]
 	ldrh	r2, [r3, r4, lsl #1]
-	cbz	r2, .L952
+	cbz	r2, .L953
 	.loc 2 2264 0
 	movs	r6, #1
 	.loc 2 2263 0
 	ldrh	r3, [fp, r4, lsl #1]
 	mov	r1, r4
-	ldr	r0, .L967+36
+	ldr	r0, .L968+36
 	bl	printf
-.LVL1078:
-.L952:
+.LVL1080:
+.L953:
 	.loc 2 2266 0
 	movs	r3, #6
 	ldr	r2, [r5]
 	muls	r4, r3, r4
-.LVL1079:
+.LVL1081:
 	movw	r3, #65535
 	add	r8, r8, #1
-.LVL1080:
+.LVL1082:
 	ldrh	r4, [r2, r4]
 	cmp	r4, r3
-	bne	.L951
-.LVL1081:
-.L950:
-.LBE238:
+	bne	.L952
+.LVL1083:
+.L951:
+.LBE242:
 	.loc 2 2271 0
-	cbz	r6, .L943
-.LVL1082:
+	cbz	r6, .L944
+.LVL1084:
 	.loc 2 2271 0 is_stmt 0 discriminator 1
 	movw	r2, #2271
-	ldr	r1, .L967+8
-	ldr	r0, .L967+40
+	ldr	r1, .L968+8
+	ldr	r0, .L968+40
 	bl	printf
-.LVL1083:
-.L943:
+.LVL1085:
+.L944:
 	.loc 2 2272 0 is_stmt 1
 	add	sp, sp, #8
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1084:
-.L946:
+.LVL1086:
+.L947:
 	.cfi_restore_state
 	.loc 2 2234 0
 	movs	r2, #0
 	add	r1, sp, #4
 	mov	r0, r4
 	bl	log2phys
-.LVL1085:
+.LVL1087:
 	.loc 2 2235 0
 	ldr	r0, [sp, #4]
 	adds	r3, r0, #1
-	beq	.L945
+	beq	.L946
 	.loc 2 2237 0
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1086:
+.LVL1088:
 	.loc 2 2238 0
 	ldrh	r3, [r5, r0, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r5, r0, lsl #1]	@ movhi
-.LVL1087:
-.L945:
+.LVL1089:
+.L946:
 	.loc 2 2232 0 discriminator 2
 	adds	r4, r4, #1
-.LVL1088:
-	b	.L944
-.LVL1089:
-.L949:
+.LVL1090:
+	b	.L945
+.LVL1091:
+.L950:
 	.loc 2 2245 0
 	ldr	r3, [r7]
 	uxth	r5, r4
-	ldr	r8, .L967+4
+	ldr	r8, .L968+4
 	ldrh	r2, [r3, r5, lsl #1]
 	ldrh	r3, [r8, r5, lsl #1]
 	cmp	r2, r3
-	beq	.L948
+	beq	.L949
 	.loc 2 2247 0
 	mov	r1, r5
-	ldr	r0, .L967+44
+	ldr	r0, .L968+44
 	bl	printf
-.LVL1090:
+.LVL1092:
 	.loc 2 2248 0
 	ldr	r3, [r7]
 	movw	r2, #65535
 	ldrh	r3, [r3, r5, lsl #1]
 	cmp	r3, r2
-	beq	.L948
+	beq	.L949
 	.loc 2 2248 0 is_stmt 0 discriminator 1
 	ldrh	r2, [r8, r5, lsl #1]
 	.loc 2 2250 0 is_stmt 1 discriminator 1
 	cmp	r2, r3
 	it	hi
 	movhi	r6, #1
-.LVL1091:
-.L948:
+.LVL1093:
+.L949:
 	adds	r4, r4, #1
-.LVL1092:
-	b	.L947
-.L968:
+.LVL1094:
+	b	.L948
+.L969:
 	.align	2
-.L967:
+.L968:
 	.word	.LANCHOR62
 	.word	check_vpc_table
 	.word	.LANCHOR156
@@ -11732,7 +11759,7 @@ FtlGcPageVarInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	.loc 5 203 0
-	ldr	r2, .L970
+	ldr	r2, .L971
 	movs	r3, #0
 	.loc 5 202 0
 	push	{r4, lr}
@@ -11741,28 +11768,28 @@ FtlGcPageVarInit:
 	.cfi_offset 14, -4
 	.loc 5 205 0
 	movs	r1, #255
-	ldr	r4, .L970+4
+	ldr	r4, .L971+4
 	.loc 5 203 0
 	strh	r3, [r2]	@ movhi
 	.loc 5 204 0
-	ldr	r2, .L970+8
+	ldr	r2, .L971+8
 	strh	r3, [r2]	@ movhi
 	.loc 5 205 0
 	ldrh	r2, [r4]
-	ldr	r3, .L970+12
+	ldr	r3, .L971+12
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL1093:
+.LVL1095:
 	.loc 5 206 0
 	ldrh	r3, [r4]
 	movs	r2, #12
 	movs	r1, #255
 	muls	r2, r3, r2
-	ldr	r3, .L970+16
+	ldr	r3, .L971+16
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL1094:
+.LVL1096:
 	.loc 5 208 0
 	pop	{r4, lr}
 	.cfi_restore 14
@@ -11770,10 +11797,10 @@ FtlGcPageVarInit:
 	.cfi_def_cfa_offset 0
 	.loc 5 207 0
 	b	FtlGcBufInit
-.LVL1095:
-.L971:
+.LVL1097:
+.L972:
 	.align	2
-.L970:
+.L971:
 	.word	.LANCHOR98
 	.word	.LANCHOR21
 	.word	.LANCHOR99
@@ -11796,9 +11823,9 @@ FtlGcScanTempBlk:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1096:
+.LVL1098:
 	.loc 5 220 0
-	ldr	r3, .L995
+	ldr	r3, .L996
 	.loc 5 211 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
@@ -11817,50 +11844,50 @@ FtlGcScanTempBlk:
 	str	r1, [sp, #8]
 	.loc 5 220 0
 	ldrh	r4, [r3]
-.LVL1097:
+.LVL1099:
 	.loc 5 221 0
 	movw	r3, #65535
 	cmp	r4, r3
-	beq	.L989
+	beq	.L990
 	.loc 5 223 0
-	cbnz	r4, .L973
-.L974:
+	cbnz	r4, .L974
+.L975:
 	.loc 5 224 0
 	bl	FtlGcPageVarInit
-.LVL1098:
-	b	.L975
-.LVL1099:
-.L989:
+.LVL1100:
+	b	.L976
+.LVL1101:
+.L990:
 	.loc 5 222 0
 	movs	r4, #0
-.LVL1100:
-.L973:
+.LVL1102:
+.L974:
 	.loc 5 223 0 discriminator 1
-	ldr	r3, .L995+4
+	ldr	r3, .L996+4
 	ldr	r2, [sp, #8]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	beq	.L974
-.LVL1101:
-.L975:
+	beq	.L975
+.LVL1103:
+.L976:
 	.loc 5 222 0
 	movs	r7, #0
-.LVL1102:
-.L983:
+.LVL1104:
+.L984:
 	.loc 5 228 0
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	.loc 5 226 0
 	movs	r0, #0
 	strb	r0, [r5, #8]
-.LVL1103:
+.LVL1105:
 	.loc 5 228 0
 	cmp	r2, r3
-	beq	.L976
-.L986:
-.LVL1104:
+	beq	.L977
+.L987:
+.LVL1106:
 	.loc 5 231 0
-	ldr	r3, .L995+8
+	ldr	r3, .L996+8
 	movs	r2, #0
 	add	ip, r5, #16
 	.loc 5 230 0
@@ -11872,78 +11899,78 @@ FtlGcScanTempBlk:
 	.loc 5 231 0
 	ldrh	fp, [r3]
 	.loc 5 234 0
-	ldr	r3, .L995+12
+	ldr	r3, .L996+12
 	ldr	r3, [r3]
 	str	r3, [sp, #4]
 	.loc 5 235 0
-	ldr	r3, .L995+16
+	ldr	r3, .L996+16
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L995+20
+	ldr	r3, .L996+20
 	ldrh	r3, [r3]
 	str	r3, [sp, #16]
 	.loc 5 236 0
-	ldr	r3, .L995+24
+	ldr	r3, .L996+24
 	ldr	r3, [r3]
 	str	r3, [sp, #20]
-	ldr	r3, .L995+28
+	ldr	r3, .L996+28
 	ldrh	r10, [r3]
-.LVL1105:
-.L977:
+.LVL1107:
+.L978:
 	.loc 5 231 0 discriminator 1
 	uxth	r3, r2
 	cmp	fp, r3
-	bhi	.L979
+	bhi	.L980
 	.loc 5 241 0
 	mov	r8, #0
 	.loc 5 242 0
 	mov	fp, #20
 	.loc 5 240 0
 	movs	r2, #0
-.LVL1106:
+.LVL1108:
 	mov	r1, r6
 	ldr	r0, [sp, #4]
 	bl	FlashReadPages
-.LVL1107:
-.L980:
+.LVL1109:
+.L981:
 	.loc 5 241 0 discriminator 1
 	uxth	r3, r8
 	cmp	r6, r3
-	bhi	.L984
+	bhi	.L985
 	.loc 5 268 0
 	ldr	r3, [sp, #8]
 	.loc 5 266 0
 	adds	r7, r7, #1
-.LVL1108:
+.LVL1110:
 	.loc 5 264 0
 	adds	r4, r4, #1
-.LVL1109:
-	ldr	r2, .L995+4
+.LVL1111:
+	ldr	r2, .L996+4
 	uxth	r4, r4
-.LVL1110:
+.LVL1112:
 	.loc 5 268 0
 	cmp	r3, r7
-	bls	.L985
-.L987:
+	bls	.L986
+.L988:
 	.loc 5 274 0
 	ldrh	r3, [r2]
 	cmp	r3, r4
-	bhi	.L986
+	bhi	.L987
 	.loc 5 265 0
 	movs	r0, #0
-	b	.L976
-.LVL1111:
-.L979:
+	b	.L977
+.LVL1113:
+.L980:
 	.loc 5 232 0
 	ldrh	r3, [ip], #2
-.LVL1112:
+.LVL1114:
 	.loc 5 233 0
 	cmp	r3, lr
-	beq	.L978
+	beq	.L979
 	.loc 5 234 0
 	ldr	r1, [sp, #4]
 	orr	r3, r4, r3, lsl #10
-.LVL1113:
+.LVL1115:
 	.loc 5 235 0
 	ldr	r0, [sp, #12]
 	.loc 5 234 0
@@ -11962,61 +11989,61 @@ FtlGcScanTempBlk:
 	mul	r3, r10, r6
 	.loc 5 237 0
 	adds	r6, r6, #1
-.LVL1114:
+.LVL1116:
 	uxth	r6, r6
-.LVL1115:
+.LVL1117:
 	.loc 5 236 0
 	bic	r3, r3, #3
 	add	r3, r3, r0
 	str	r3, [r1, #12]
-.L978:
-.LVL1116:
-	adds	r2, r2, #1
-.LVL1117:
-	b	.L977
+.L979:
 .LVL1118:
-.L984:
+	adds	r2, r2, #1
+.LVL1119:
+	b	.L978
+.LVL1120:
+.L985:
 	.loc 5 242 0
-	ldr	r3, .L995+12
+	ldr	r3, .L996+12
 	mul	r10, fp, r8
 	ldr	r2, [r3]
 	add	r3, r2, r10
 	str	r2, [sp, #16]
 	ldr	r1, [r3, #4]
 	str	r3, [sp, #12]
-.LVL1119:
+.LVL1121:
 	.loc 5 243 0
 	ubfx	r0, r1, #10, #16
 	str	r1, [sp, #4]
 	bl	P2V_plane
-.LVL1120:
+.LVL1122:
 	.loc 5 245 0
 	ldr	r2, [sp, #16]
 	ldr	r2, [r2, r10]
-	cbnz	r2, .L981
+	cbnz	r2, .L982
 	.loc 5 247 0
 	ldr	r3, [sp, #12]
 	.loc 5 248 0
 	movw	r2, #65535
 	add	r8, r8, #1
-.LVL1121:
+.LVL1123:
 	ldr	r1, [sp, #4]
 	.loc 5 247 0
 	ldr	r3, [r3, #12]
-.LVL1122:
+.LVL1124:
 	.loc 5 248 0
 	ldrh	ip, [r3]
 	cmp	ip, r2
-	bne	.L982
+	bne	.L983
 	.loc 5 249 0
-	ldr	r3, .L995+32
-.LVL1123:
+	ldr	r3, .L996+32
+.LVL1125:
 	movs	r2, #1
 	str	r2, [r3]
-.LVL1124:
-.L976:
+.LVL1126:
+.L977:
 	.loc 5 281 0
-	ldr	r3, .L995
+	ldr	r3, .L996
 	movw	r2, #65535
 	.loc 5 283 0
 	strb	r0, [r5, #6]
@@ -12029,70 +12056,70 @@ FtlGcScanTempBlk:
 	.loc 5 284 0
 	mov	r2, r0
 	mov	r0, r5
-.LVL1125:
+.LVL1127:
 	bl	ftl_sb_update_avl_pages
-.LVL1126:
+.LVL1128:
 	.loc 5 285 0
-	b	.L988
-.LVL1127:
-.L982:
+	b	.L989
+.LVL1129:
+.L983:
 	.loc 5 252 0
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
-.LVL1128:
-	bl	FtlGcUpdatePage
-.LVL1129:
-	b	.L980
 .LVL1130:
-.L981:
+	bl	FtlGcUpdatePage
+.LVL1131:
+	b	.L981
+.LVL1132:
+.L982:
 	.loc 5 256 0
-	ldr	r3, .L995+36
+	ldr	r3, .L996+36
 	movs	r4, #0
-.LVL1131:
+.LVL1133:
 	ldrh	r2, [r5]
 	ldr	r3, [r3]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
 	.loc 5 257 0
 	ldrh	r0, [r5]
-.LVL1132:
+.LVL1134:
 	bl	INSERT_FREE_LIST
-.LVL1133:
+.LVL1135:
 	.loc 5 258 0
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.LVL1134:
+.LVL1136:
 	.loc 5 260 0
 	bl	FtlGcPageVarInit
-.LVL1135:
+.LVL1137:
 	.loc 5 261 0
-	b	.L983
-.LVL1136:
-.L985:
+	b	.L984
+.LVL1138:
+.L986:
 	.loc 5 268 0 discriminator 1
-	ldr	r1, .L995
+	ldr	r1, .L996
 	movw	r0, #65535
 	ldrh	r3, [r1]
 	cmp	r3, r0
-	beq	.L987
+	beq	.L988
 	.loc 5 269 0
 	add	r3, r3, r7
 	strh	r3, [r1]	@ movhi
 	.loc 5 270 0
 	ldrh	r3, [r2]
 	cmp	r3, r4
-	bls	.L987
-.LVL1137:
-.L988:
+	bls	.L988
+.LVL1139:
+.L989:
 	.loc 5 286 0
 	mov	r0, #-1
 	add	sp, sp, #24
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1138:
-.L996:
+.LVL1140:
+.L997:
 	.align	2
-.L995:
+.L996:
 	.word	.LANCHOR157
 	.word	.LANCHOR19
 	.word	.LANCHOR3
@@ -12115,15 +12142,15 @@ FtlGcScanTempBlk:
 	.fpu softvfp
 	.type	FlashTestBlk, %function
 FlashTestBlk:
-.LFB346:
-	.loc 1 193 0
+.LFB347:
+	.loc 1 197 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1139:
-	.loc 1 198 0
+.LVL1141:
+	.loc 1 202 0
 	cmp	r0, #11
-	.loc 1 193 0
+	.loc 1 197 0
 	push	{r4, r5, lr}
 	.cfi_def_cfa_offset 12
 	.cfi_offset 4, -12
@@ -12132,89 +12159,89 @@ FlashTestBlk:
 	mov	r4, r0
 	sub	sp, sp, #92
 	.cfi_def_cfa_offset 104
-	.loc 1 198 0
-	bls	.L999
-.LVL1140:
-.LBB241:
-.LBB242:
 	.loc 1 202 0
-	ldr	r5, .L1000
-	.loc 1 203 0
+	bls	.L1000
+.LVL1142:
+.LBB245:
+.LBB246:
+	.loc 1 206 0
+	ldr	r5, .L1001
+	.loc 1 207 0
 	add	r0, sp, #24
-.LVL1141:
-	.loc 1 204 0
+.LVL1143:
+	.loc 1 208 0
 	movs	r2, #32
 	movs	r1, #165
-	.loc 1 203 0
+	.loc 1 207 0
 	str	r0, [sp, #16]
-	.loc 1 206 0
+	.loc 1 210 0
 	lsls	r4, r4, #10
-.LVL1142:
-	.loc 1 202 0
+.LVL1144:
+	.loc 1 206 0
 	str	r5, [sp, #12]
-	.loc 1 204 0
+	.loc 1 208 0
 	bl	ftl_memset
-.LVL1143:
-	.loc 1 205 0
+.LVL1145:
+	.loc 1 209 0
 	movs	r2, #8
 	movs	r1, #90
 	mov	r0, r5
 	bl	ftl_memset
-.LVL1144:
-	.loc 1 207 0
+.LVL1146:
+	.loc 1 211 0
 	movs	r2, #1
 	add	r0, sp, #4
 	mov	r1, r2
-	.loc 1 206 0
+	.loc 1 210 0
 	str	r4, [sp, #8]
-	.loc 1 207 0
+	.loc 1 211 0
 	bl	FlashEraseBlocks
-.LVL1145:
-	.loc 1 208 0
+.LVL1147:
+	.loc 1 212 0
 	movs	r3, #1
 	add	r0, sp, #4
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL1146:
-	.loc 1 209 0
+.LVL1148:
+	.loc 1 213 0
 	ldr	r4, [sp, #4]
-	.loc 1 215 0
+	.loc 1 219 0
 	movs	r2, #1
 	movs	r1, #0
 	add	r0, sp, #4
-	.loc 1 209 0
+	.loc 1 213 0
 	adds	r4, r4, #0
 	it	ne
 	movne	r4, #1
 	negs	r4, r4
 .LDL1:
-.LVL1147:
-	.loc 1 215 0
+.LVL1149:
+	.loc 1 219 0
 	bl	FlashEraseBlocks
-.LVL1148:
-.L997:
-.LBE242:
-.LBE241:
-	.loc 1 217 0
+.LVL1150:
+.L998:
+.LBE246:
+.LBE245:
+	.loc 1 221 0
 	mov	r0, r4
 	add	sp, sp, #92
 	.cfi_remember_state
 	.cfi_def_cfa_offset 12
 	@ sp needed
 	pop	{r4, r5, pc}
-.LVL1149:
-.L999:
+.LVL1151:
+.L1000:
 	.cfi_restore_state
-	.loc 1 199 0
+	.loc 1 203 0
 	movs	r4, #0
-	b	.L997
-.L1001:
+	b	.L998
+.L1002:
 	.align	2
-.L1000:
+.L1001:
 	.word	ftl_temp_buf
 	.cfi_endproc
-.LFE346:
+.LFE347:
 	.size	FlashTestBlk, .-FlashTestBlk
 	.section	.text.FlashGetBadBlockList,"ax",%progbits
 	.align	1
@@ -12225,81 +12252,81 @@ FlashTestBlk:
 	.fpu softvfp
 	.type	FlashGetBadBlockList, %function
 FlashGetBadBlockList:
-.LFB347:
-	.loc 1 220 0
+.LFB348:
+	.loc 1 224 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1150:
+.LVL1152:
 	push	{r3, r4, r5, lr}
 	.cfi_def_cfa_offset 16
 	.cfi_offset 3, -16
 	.cfi_offset 4, -12
 	.cfi_offset 5, -8
 	.cfi_offset 14, -4
-	.loc 1 223 0
+	.loc 1 227 0
 	mov	r2, #256
-	.loc 1 220 0
+	.loc 1 224 0
 	mov	r5, r1
-	.loc 1 223 0
+	.loc 1 227 0
 	movs	r1, #255
-.LVL1151:
-	.loc 1 220 0
+.LVL1153:
+	.loc 1 224 0
 	mov	r4, r0
-	.loc 1 223 0
+	.loc 1 227 0
 	bl	ftl_memset
-.LVL1152:
-	.loc 1 224 0
-	ldr	r3, .L1009
+.LVL1154:
+	.loc 1 228 0
+	ldr	r3, .L1010
 	mov	r1, r5
 	mov	r0, r4
 	ldr	r3, [r3]
 	blx	r3
-.LVL1153:
+.LVL1155:
 	uxth	r0, r0
-.LVL1154:
-	.loc 1 225 0
+.LVL1156:
+	.loc 1 229 0
 	cmp	r0, #50
-	bls	.L1003
-	.loc 1 226 0
+	bls	.L1004
+	.loc 1 230 0
 	mov	r2, #256
 	movs	r1, #255
 	mov	r0, r4
-.LVL1155:
+.LVL1157:
 	bl	ftl_memset
-.LVL1156:
-	.loc 1 227 0
+.LVL1158:
+	.loc 1 231 0
 	movs	r0, #0
-.LVL1157:
-.L1003:
-	.loc 1 229 0
-	ldr	r3, .L1009+4
+.LVL1159:
+.L1004:
+	.loc 1 233 0
+	ldr	r3, .L1010+4
 	ldrh	r3, [r3, #14]
 	cmp	r3, #4
-	bne	.L1008
+	bne	.L1009
 	add	r1, r4, r0, lsl #1
 	mov	r3, r4
-.L1005:
-	.loc 1 230 0 discriminator 1
+.L1006:
+	.loc 1 234 0 discriminator 1
 	cmp	r3, r1
-	bne	.L1006
-.L1008:
-	.loc 1 235 0
+	bne	.L1007
+.L1009:
+	.loc 1 239 0
 	pop	{r3, r4, r5, pc}
-.LVL1158:
-.L1006:
-	.loc 1 231 0 discriminator 3
+.LVL1160:
+.L1007:
+	.loc 1 235 0 discriminator 3
 	ldrh	r2, [r3]
 	lsrs	r2, r2, #1
 	strh	r2, [r3], #2	@ movhi
-	b	.L1005
-.L1010:
+	b	.L1006
+.L1011:
 	.align	2
-.L1009:
+.L1010:
 	.word	.LANCHOR107
 	.word	.LANCHOR0
 	.cfi_endproc
-.LFE347:
+.LFE348:
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
 	.section	.text.ftl_memcpy,"ax",%progbits
 	.align	1
@@ -12310,18 +12337,18 @@ FlashGetBadBlockList:
 	.fpu softvfp
 	.type	ftl_memcpy, %function
 ftl_memcpy:
-.LFB349:
-	.loc 1 243 0
+.LFB350:
+	.loc 1 247 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL1159:
-	.loc 1 244 0
+.LVL1161:
+	.loc 1 248 0
 	b	memcpy
-.LVL1160:
+.LVL1162:
 	.cfi_endproc
-.LFE349:
+.LFE350:
 	.size	ftl_memcpy, .-ftl_memcpy
 	.section	.text.FtlBbmTblFlush,"ax",%progbits
 	.align	1
@@ -12337,7 +12364,7 @@ FtlBbmTblFlush:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1161:
+.LVL1163:
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 48
 	.cfi_offset 4, -32
@@ -12351,25 +12378,25 @@ FtlBbmTblFlush:
 	.loc 4 91 0
 	movs	r4, #0
 	.loc 4 88 0
-	ldr	r7, .L1021
+	ldr	r7, .L1022
 	.loc 4 89 0
 	movs	r1, #0
 	.loc 4 87 0
-	ldr	r5, .L1021+4
+	ldr	r5, .L1022+4
 	.loc 4 88 0
 	ldr	r3, [r7]
 	mov	fp, r7
 	.loc 4 87 0
-	ldr	r8, .L1021+48
-	ldr	r6, .L1021+8
+	ldr	r8, .L1022+48
+	ldr	r6, .L1022+8
 	.loc 4 88 0
 	str	r3, [r5, #12]
 	.loc 4 91 0
-	ldr	r7, .L1021+12
+	ldr	r7, .L1022+12
 	.loc 4 89 0
-	ldr	r3, .L1021+16
+	ldr	r3, .L1022+16
 	.loc 4 92 0
-	ldr	r10, .L1021+52
+	ldr	r10, .L1022+52
 	.loc 4 87 0
 	ldr	r0, [r8]
 	.loc 4 89 0
@@ -12378,20 +12405,20 @@ FtlBbmTblFlush:
 	str	r0, [r5, #8]
 	.loc 4 89 0
 	bl	ftl_memset
-.LVL1162:
-.L1013:
+.LVL1164:
+.L1014:
 	.loc 4 91 0 discriminator 1
 	ldrh	r3, [r7]
 	cmp	r4, r3
-	blt	.L1014
+	blt	.L1015
 	.loc 4 94 0
 	ldr	r6, [r5, #12]
-.LVL1163:
+.LVL1165:
 	.loc 4 95 0
 	movs	r2, #16
 	.loc 4 98 0
-	ldr	r4, .L1021+20
-.LVL1164:
+	ldr	r4, .L1022+20
+.LVL1166:
 	.loc 4 95 0
 	movs	r1, #255
 	.loc 4 84 0
@@ -12399,7 +12426,7 @@ FtlBbmTblFlush:
 	.loc 4 95 0
 	mov	r0, r6
 	bl	ftl_memset
-.LVL1165:
+.LVL1167:
 	.loc 4 97 0
 	movw	r3, #61649
 	mov	r10, r4
@@ -12420,11 +12447,11 @@ FtlBbmTblFlush:
 	ldrh	r3, [r4, #6]
 	strh	r3, [r6, #10]	@ movhi
 	.loc 4 102 0
-	ldr	r3, .L1021+24
+	ldr	r3, .L1022+24
 	ldr	r3, [r3]
 	strh	r3, [r6, #12]	@ movhi
-.LVL1166:
-.L1015:
+.LVL1168:
+.L1016:
 	.loc 4 104 0
 	ldr	r3, [r8]
 	.loc 4 107 0
@@ -12447,23 +12474,23 @@ FtlBbmTblFlush:
 	.loc 4 108 0
 	ldrh	r3, [r4, #4]
 	str	r0, [sp]
-	ldr	r0, .L1021+28
+	ldr	r0, .L1022+28
 	bl	printf
-.LVL1167:
+.LVL1169:
 	.loc 4 109 0
 	movs	r3, #1
-	ldr	r0, .L1021+4
+	ldr	r0, .L1022+4
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL1168:
+.LVL1170:
 	.loc 4 110 0
-	ldr	r3, .L1021+32
+	ldr	r3, .L1022+32
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1016
+	blt	.L1017
 	.loc 4 113 0
 	ldr	r3, [r4, #8]
 	.loc 4 117 0
@@ -12484,7 +12511,7 @@ FtlBbmTblFlush:
 	.loc 4 118 0
 	strh	r2, [r4, #4]	@ movhi
 	.loc 4 121 0
-	ldr	r2, .L1021+36
+	ldr	r2, .L1022+36
 	.loc 4 116 0
 	strh	r3, [r4]	@ movhi
 	.loc 4 119 0
@@ -12501,15 +12528,15 @@ FtlBbmTblFlush:
 	str	r3, [r0, #4]
 	.loc 4 122 0
 	bl	FlashEraseBlocks
-.LVL1169:
+.LVL1171:
 	.loc 4 123 0
 	movs	r3, #1
-	ldr	r0, .L1021+4
+	ldr	r0, .L1022+4
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL1170:
-.L1016:
+.LVL1172:
+.L1017:
 	.loc 4 126 0
 	ldrh	r3, [r10, #2]
 	adds	r3, r3, #1
@@ -12517,31 +12544,31 @@ FtlBbmTblFlush:
 	.loc 4 127 0
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	bne	.L1017
+	bne	.L1018
 	.loc 4 130 0
 	adds	r7, r7, #1
-.LVL1171:
+.LVL1173:
 	.loc 4 129 0
 	ldr	r1, [r5, #4]
 	.loc 4 130 0
 	uxth	r7, r7
 	.loc 4 129 0
-	ldr	r0, .L1021+40
+	ldr	r0, .L1022+40
 	bl	printf
-.LVL1172:
+.LVL1174:
 	.loc 4 131 0
 	cmp	r7, #3
-	bls	.L1015
+	bls	.L1016
 	.loc 4 132 0
 	mov	r2, r7
 	ldr	r1, [r5, #4]
-	ldr	r0, .L1021+44
+	ldr	r0, .L1022+44
 	bl	printf
-.LVL1173:
-.L1019:
-	b	.L1019
-.LVL1174:
-.L1014:
+.LVL1175:
+.L1020:
+	b	.L1020
+.LVL1176:
+.L1015:
 	.loc 4 92 0 discriminator 3
 	ldrh	r2, [r10]
 	ldr	r3, [r5, #8]
@@ -12550,35 +12577,35 @@ FtlBbmTblFlush:
 	lsls	r2, r2, #2
 	.loc 4 91 0 discriminator 3
 	adds	r4, r4, #1
-.LVL1175:
+.LVL1177:
 	.loc 4 92 0 discriminator 3
 	add	r0, r3, r0, lsl #2
 	bl	ftl_memcpy
-.LVL1176:
-	b	.L1013
-.LVL1177:
-.L1020:
-	movs	r3, #1
 .LVL1178:
-	str	r3, [sp, #12]
+	b	.L1014
 .LVL1179:
-	b	.L1015
+.L1021:
+	movs	r3, #1
 .LVL1180:
-.L1017:
+	str	r3, [sp, #12]
+.LVL1181:
+	b	.L1016
+.LVL1182:
+.L1018:
 	.loc 4 139 0
 	ldr	r3, [sp, #12]
 	cmp	r3, #0
-	beq	.L1020
+	beq	.L1021
 	.loc 4 146 0
 	movs	r0, #0
 	add	sp, sp, #16
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1181:
-.L1022:
+.LVL1183:
+.L1023:
 	.align	2
-.L1021:
+.L1022:
 	.word	.LANCHOR109
 	.word	.LANCHOR108
 	.word	.LANCHOR37+24
@@ -12610,7 +12637,7 @@ allocate_data_superblock:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1182:
+.LVL1184:
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 48
 	.cfi_offset 4, -32
@@ -12623,32 +12650,32 @@ allocate_data_superblock:
 	.cfi_offset 14, -4
 	.loc 2 2531 0
 	mov	r4, r0
-	ldr	r8, .L1061
-.LVL1183:
-.L1024:
+	ldr	r8, .L1062
+.LVL1185:
+.L1025:
 	.loc 2 2537 0
-	ldr	r3, .L1061
-	ldr	r6, .L1061+4
-	ldr	fp, .L1061+76
+	ldr	r3, .L1062
+	ldr	r6, .L1062+4
+	ldr	fp, .L1062+76
 	ldrh	r3, [r3]
 	ldrh	r2, [r6]
 	add	r3, r3, r2
 	ldrh	r2, [fp]
 	cmp	r3, r2
-	ble	.L1025
+	ble	.L1026
 	.loc 2 2537 0 is_stmt 0 discriminator 1
 	movw	r2, #2537
-	ldr	r1, .L1061+8
-	ldr	r0, .L1061+12
+	ldr	r1, .L1062+8
+	ldr	r0, .L1062+12
 	bl	printf
-.LVL1184:
-.L1025:
+.LVL1186:
+.L1026:
 	.loc 2 2539 0 is_stmt 1
-	ldr	r3, .L1061+16
+	ldr	r3, .L1062+16
 	cmp	r4, r3
-	bne	.L1050
+	bne	.L1051
 	.loc 2 2540 0
-	ldr	r2, .L1061+20
+	ldr	r2, .L1062+20
 	ldrh	r3, [r8]
 	ldr	r2, [r2]
 	lsrs	r1, r3, #1
@@ -12656,31 +12683,31 @@ allocate_data_superblock:
 	adds	r1, r1, #1
 	add	r1, r1, r2, lsr #2
 	uxth	r1, r1
-.LVL1185:
+.LVL1187:
 	.loc 2 2544 0
-	cbz	r1, .L1026
+	cbz	r1, .L1027
 	.loc 2 2545 0
 	subs	r1, r1, #1
-.LVL1186:
+.LVL1188:
 	uxth	r1, r1
-.LVL1187:
-.L1026:
+.LVL1189:
+.L1027:
 	.loc 2 2546 0
-	ldr	r0, .L1061+24
+	ldr	r0, .L1062+24
 	bl	List_pop_index_node
-.LVL1188:
+.LVL1190:
 	ldrh	r3, [r8]
 	mov	r5, r0
 	uxth	r7, r0
-.LVL1189:
-	cbnz	r3, .L1027
+.LVL1191:
+	cbnz	r3, .L1028
 	.loc 2 2546 0 is_stmt 0 discriminator 1
 	movw	r2, #2546
-	ldr	r1, .L1061+8
-	ldr	r0, .L1061+12
+	ldr	r1, .L1062+8
+	ldr	r0, .L1062+12
 	bl	printf
-.LVL1190:
-.L1027:
+.LVL1192:
+.L1028:
 	.loc 2 2546 0 discriminator 3
 	ldrh	r3, [r8]
 	.loc 2 2550 0 is_stmt 1 discriminator 3
@@ -12692,12 +12719,12 @@ allocate_data_superblock:
 	strh	r7, [r4]	@ movhi
 	.loc 2 2550 0 discriminator 3
 	bl	make_superblock
-.LVL1191:
+.LVL1193:
 	.loc 2 2551 0 discriminator 3
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1028
+	cbnz	r3, .L1029
 	.loc 2 2555 0
-	ldr	r3, .L1061+28
+	ldr	r3, .L1062+28
 	uxth	r5, r5
 	movw	r2, #65535
 	.loc 2 2556 0
@@ -12707,46 +12734,46 @@ allocate_data_superblock:
 	strh	r2, [r3, r5, lsl #1]	@ movhi
 	.loc 2 2556 0
 	bl	INSERT_DATA_LIST
-.LVL1192:
+.LVL1194:
 	.loc 2 2557 0
 	ldrh	r2, [r6]
 	ldrh	r3, [r8]
 	add	r3, r3, r2
 	ldrh	r2, [fp]
 	cmp	r3, r2
-	ble	.L1024
+	ble	.L1025
 	.loc 2 2557 0 is_stmt 0 discriminator 1
 	movw	r2, #2557
-	ldr	r1, .L1061+8
-	ldr	r0, .L1061+12
+	ldr	r1, .L1062+8
+	ldr	r0, .L1062+12
 	bl	printf
-.LVL1193:
-	b	.L1024
-.LVL1194:
-.L1050:
-	movs	r1, #0
-	b	.L1026
 .LVL1195:
-.L1028:
+	b	.L1025
+.LVL1196:
+.L1051:
+	movs	r1, #0
+	b	.L1027
+.LVL1197:
+.L1029:
 	.loc 2 2560 0 is_stmt 1
 	ldrh	r2, [r6]
 	ldrh	r3, [r8]
 	add	r3, r3, r2
 	ldrh	r2, [fp]
 	cmp	r3, r2
-	ble	.L1030
+	ble	.L1031
 	.loc 2 2560 0 is_stmt 0 discriminator 1
 	mov	r2, #2560
-	ldr	r1, .L1061+8
-	ldr	r0, .L1061+12
+	ldr	r1, .L1062+8
+	ldr	r0, .L1062+12
 	bl	printf
-.LVL1196:
-.L1030:
+.LVL1198:
+.L1031:
 	.loc 2 2564 0 is_stmt 1 discriminator 1
-	ldr	r3, .L1061+32
+	ldr	r3, .L1062+32
 	movs	r6, #0
 	.loc 2 2563 0 discriminator 1
-	ldr	r2, .L1061+36
+	ldr	r2, .L1062+36
 	add	ip, r4, #16
 	.loc 2 2564 0 discriminator 1
 	mov	lr, r6
@@ -12761,51 +12788,51 @@ allocate_data_superblock:
 	mov	r3, r0
 	mla	r1, r2, r1, r0
 	str	r1, [sp]
-.L1031:
-.LVL1197:
+.L1032:
+.LVL1199:
 	.loc 2 2563 0 discriminator 1
 	ldr	r2, [sp]
 	cmp	r2, r3
-	bne	.L1033
+	bne	.L1034
 	.loc 2 2571 0
-	cbnz	r6, .L1034
+	cbnz	r6, .L1035
 	.loc 2 2571 0 is_stmt 0 discriminator 1
 	movw	r2, #2571
-	ldr	r1, .L1061+8
-	ldr	r0, .L1061+12
+	ldr	r1, .L1062+8
+	ldr	r0, .L1062+12
 	bl	printf
-.LVL1198:
-.L1034:
+.LVL1200:
+.L1035:
 	.loc 2 2573 0 is_stmt 1
-	ldr	r3, .L1061+40
+	ldr	r3, .L1062+40
 	ldrh	r3, [r3]
 	cmp	r3, r7
-	bne	.L1035
+	bne	.L1036
 	.loc 2 2573 0 is_stmt 0 discriminator 1
 	movw	r2, #2573
-	ldr	r1, .L1061+8
-	ldr	r0, .L1061+12
+	ldr	r1, .L1062+8
+	ldr	r0, .L1062+12
 	bl	printf
-.LVL1199:
-.L1035:
+.LVL1201:
+.L1036:
 	.loc 2 2574 0 is_stmt 1
 	ldrb	r1, [r4, #8]	@ zero_extendqisi2
 	uxth	r5, r5
-	ldr	r2, .L1061+44
-	ldr	r3, .L1061+48
-	ldr	r10, .L1061+80
+	ldr	r2, .L1062+44
+	ldr	r3, .L1062+48
+	ldr	r10, .L1062+80
 	cmp	r1, #0
-	bne	.L1036
+	bne	.L1037
 	.loc 2 2575 0
 	ldr	r0, [r2]
 	ldrh	lr, [r0, r5, lsl #1]
 	cmp	lr, #0
-	beq	.L1037
+	beq	.L1038
 	.loc 2 2576 0
-	ldr	r1, .L1061+52
+	ldr	r1, .L1062+52
 	ldrh	ip, [r1]
 	add	r1, lr, ip
-.L1060:
+.L1061:
 	.loc 2 2578 0
 	strh	r1, [r0, r5, lsl #1]	@ movhi
 	.loc 2 2580 0
@@ -12819,16 +12846,16 @@ allocate_data_superblock:
 	.loc 2 2580 0
 	movs	r1, #0
 	bl	ftl_set_blk_mode
-.LVL1200:
+.LVL1202:
 	ldr	r3, [sp]
 	ldr	r2, [sp, #4]
-.L1039:
+.L1040:
 	.loc 2 2587 0
 	ldr	r2, [r2]
 	lsls	r1, r5, #1
 	str	r1, [sp]
 	ldrh	r0, [r2, r5, lsl #1]
-	ldr	r2, .L1061+56
+	ldr	r2, .L1062+56
 	ldr	r1, [r2]
 	cmp	r0, r1
 	.loc 2 2590 0
@@ -12837,38 +12864,38 @@ allocate_data_superblock:
 	it	hi
 	strhi	r0, [r2]
 	.loc 2 2590 0
-	ldr	r2, .L1061+52
+	ldr	r2, .L1062+52
 	ldr	r0, [r3]
 	ldr	r3, [r10]
 	ldrh	r2, [r2]
 	mla	r0, r0, r2, r3
 	bl	__aeabi_uidiv
-.LVL1201:
-	ldr	r3, .L1061+60
+.LVL1203:
+	ldr	r3, .L1062+60
 	.loc 2 2594 0
-	ldr	ip, .L1061+84
+	ldr	ip, .L1062+84
 	.loc 2 2590 0
 	str	r0, [r3]
 	.loc 2 2591 0
-	ldr	r3, .L1061+64
+	ldr	r3, .L1062+64
 	ldr	r2, [r3]
 	ldr	r3, [r2, #16]
 	adds	r3, r3, #1
 	str	r3, [r2, #16]
-.LVL1202:
+.LVL1204:
 	movs	r2, #20
 	.loc 2 2594 0
-	ldr	r3, .L1061+32
+	ldr	r3, .L1062+32
 	ldr	r0, [r3]
 	adds	r3, r0, #4
 	mla	r2, r2, r6, r0
 	adds	r2, r2, #24
-.LVL1203:
-.L1041:
+.LVL1205:
+.L1042:
 	adds	r3, r3, #20
 	.loc 2 2593 0 discriminator 1
 	cmp	r2, r3
-	bne	.L1042
+	bne	.L1043
 	.loc 2 2595 0
 	ldrb	r1, [r4, #8]	@ zero_extendqisi2
 	mov	r2, r6
@@ -12876,32 +12903,32 @@ allocate_data_superblock:
 	mov	r10, #0
 	.loc 2 2595 0
 	bl	FlashEraseBlocks
-.LVL1204:
+.LVL1206:
 	.loc 2 2596 0
 	mov	r3, r10
 	.loc 2 2598 0
 	movs	r1, #20
-.LVL1205:
-.L1043:
+.LVL1207:
+.L1044:
 	.loc 2 2597 0 discriminator 1
 	uxth	r2, r10
 	cmp	r6, r2
-	bhi	.L1045
+	bhi	.L1046
 	.loc 2 2608 0
-	cbz	r3, .L1046
+	cbz	r3, .L1047
 	.loc 2 2609 0
 	mov	r0, r7
 	bl	update_multiplier_value
-.LVL1206:
+.LVL1208:
 	.loc 2 2610 0
 	bl	FtlBbmTblFlush
-.LVL1207:
-.L1046:
+.LVL1209:
+.L1047:
 	.loc 2 2613 0
 	ldrb	r2, [r4, #7]	@ zero_extendqisi2
-	ldr	r1, .L1061+28
+	ldr	r1, .L1062+28
 	cmp	r2, #0
-	bne	.L1047
+	bne	.L1048
 	.loc 2 2615 0
 	ldr	r3, [r1]
 	movw	r2, #65535
@@ -12911,11 +12938,11 @@ allocate_data_superblock:
 	strh	r2, [r3, r5, lsl #1]	@ movhi
 	.loc 2 2616 0
 	bl	INSERT_DATA_LIST
-.LVL1208:
+.LVL1210:
 	.loc 2 2617 0
-	b	.L1024
-.LVL1209:
-.L1033:
+	b	.L1025
+.LVL1211:
+.L1034:
 	.loc 2 2566 0
 	ldrh	r1, [ip], #2
 	.loc 2 2564 0
@@ -12924,26 +12951,26 @@ allocate_data_superblock:
 	str	lr, [r3, #12]
 	.loc 2 2566 0
 	cmp	r1, r10
-	beq	.L1032
+	beq	.L1033
 	.loc 2 2567 0
 	ldr	r2, [sp, #4]
 	lsls	r1, r1, #10
 	mla	r2, r2, r6, r0
 	.loc 2 2568 0
 	adds	r6, r6, #1
-.LVL1210:
+.LVL1212:
 	uxth	r6, r6
-.LVL1211:
+.LVL1213:
 	.loc 2 2567 0
 	str	r1, [r2, #4]
-.L1032:
+.L1033:
 	adds	r3, r3, #20
-	b	.L1031
-.L1037:
+	b	.L1032
+.L1038:
 	.loc 2 2578 0
 	movs	r1, #2
-	b	.L1060
-.L1036:
+	b	.L1061
+.L1037:
 	.loc 2 2582 0
 	ldr	r0, [r2]
 	str	r3, [sp, #4]
@@ -12951,56 +12978,56 @@ allocate_data_superblock:
 	ldrh	r1, [r0, r5, lsl #1]
 	adds	r1, r1, #1
 	strh	r1, [r0, r5, lsl #1]	@ movhi
-.LBB243:
-.LBB244:
+.LBB247:
+.LBB248:
 	mov	r0, r7
-.LBE244:
-.LBE243:
+.LBE248:
+.LBE247:
 	.loc 2 2583 0
 	ldr	r1, [r10]
 	adds	r1, r1, #1
 	str	r1, [r10]
-.LVL1212:
-.LBB246:
-.LBB245:
+.LVL1214:
+.LBB250:
+.LBB249:
 	bl	ftl_set_blk_mode.part.7
-.LVL1213:
+.LVL1215:
 	ldm	sp, {r2, r3}
-	b	.L1039
-.LVL1214:
-.L1042:
-.LBE245:
-.LBE246:
+	b	.L1040
+.LVL1216:
+.L1043:
+.LBE249:
+.LBE250:
 	.loc 2 2594 0 discriminator 3
 	ldr	r1, [r3, #-20]
 	and	r1, r1, ip
 	str	r1, [r3, #-20]
-	b	.L1041
-.LVL1215:
-.L1045:
+	b	.L1042
+.LVL1217:
+.L1046:
 	.loc 2 2598 0
-	ldr	r0, .L1061+32
+	ldr	r0, .L1062+32
 	mul	r2, r1, r10
 	ldr	r0, [r0]
 	add	ip, r0, r2
 	ldr	r2, [r0, r2]
 	adds	r0, r2, #1
-	bne	.L1044
+	bne	.L1045
 	.loc 2 2600 0
 	ldr	r0, [ip, #4]
 	.loc 2 2599 0
 	adds	r3, r3, #1
-.LVL1216:
+.LVL1218:
 	str	r1, [sp, #12]
 	str	r2, [sp, #8]
 	.loc 2 2601 0
 	ubfx	r0, r0, #10, #16
 	.loc 2 2599 0
 	str	r3, [sp, #4]
-.LVL1217:
+.LVL1219:
 	.loc 2 2601 0
 	bl	FtlBbmMapBadBlock
-.LVL1218:
+.LVL1220:
 	.loc 2 2602 0
 	ldr	r2, [sp, #8]
 	add	r0, r4, r10, lsl #1
@@ -13013,17 +13040,17 @@ allocate_data_superblock:
 	ldrb	r2, [r4, #7]	@ zero_extendqisi2
 	subs	r2, r2, #1
 	strb	r2, [r4, #7]
-.LVL1219:
-.L1044:
-	add	r10, r10, #1
-.LVL1220:
-	b	.L1043
 .LVL1221:
-.L1047:
+.L1045:
+	add	r10, r10, #1
+.LVL1222:
+	b	.L1044
+.LVL1223:
+.L1048:
 	.loc 2 2620 0
-	ldr	r3, .L1061+68
+	ldr	r3, .L1062+68
 	.loc 2 2624 0
-	ldr	r0, .L1061+72
+	ldr	r0, .L1062+72
 	.loc 2 2620 0
 	ldrh	r3, [r3]
 	.loc 2 2621 0
@@ -13050,28 +13077,28 @@ allocate_data_superblock:
 	strh	r3, [r2, r1]	@ movhi
 	.loc 2 2626 0
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L1048
+	cbz	r3, .L1049
 	.loc 2 2626 0 is_stmt 0 discriminator 2
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1049
-.L1048:
+	cbnz	r3, .L1050
+.L1049:
 	.loc 2 2626 0 discriminator 3
 	movw	r2, #2626
-	ldr	r1, .L1061+8
-	ldr	r0, .L1061+12
+	ldr	r1, .L1062+8
+	ldr	r0, .L1062+12
 	bl	printf
-.LVL1222:
-.L1049:
+.LVL1224:
+.L1050:
 	.loc 2 2628 0 is_stmt 1
 	movs	r0, #0
 	add	sp, sp, #16
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1223:
-.L1062:
+.LVL1225:
+.L1063:
 	.align	2
-.L1061:
+.L1062:
 	.word	.LANCHOR48
 	.word	.LANCHOR45
 	.word	.LANCHOR158
@@ -13111,7 +13138,7 @@ FtlGcFreeBadSuperBlk:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1224:
+.LVL1226:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 40
 	.cfi_offset 4, -32
@@ -13125,32 +13152,32 @@ FtlGcFreeBadSuperBlk:
 	.loc 5 390 0
 	mov	r10, r0
 	.loc 5 395 0
-	ldr	r4, .L1075
+	ldr	r4, .L1076
 	ldrh	r3, [r4]
-	cbz	r3, .L1064
-.LBB249:
-.LBB250:
+	cbz	r3, .L1065
+.LBB253:
+.LBB254:
 	.loc 5 399 0
-	ldr	r8, .L1075+16
-.LBE250:
-.LBE249:
+	ldr	r8, .L1076+16
+.LBE254:
+.LBE253:
 	movs	r6, #0
-.LVL1225:
-.L1065:
-.LBB253:
-.LBB251:
+.LVL1227:
+.L1066:
+.LBB257:
+.LBB255:
 	.loc 5 396 0
-	ldr	r3, .L1075+4
+	ldr	r3, .L1076+4
 	ldrh	r2, [r3]
 	uxth	r3, r6
 	cmp	r2, r3
-	bhi	.L1071
+	bhi	.L1072
 	.loc 5 412 0
 	bl	FtlGcReFreshBadBlk
-.LVL1226:
-.L1064:
-.LBE251:
-.LBE253:
+.LVL1228:
+.L1065:
+.LBE255:
+.LBE257:
 	.loc 5 415 0
 	movs	r0, #0
 	add	sp, sp, #8
@@ -13158,95 +13185,95 @@ FtlGcFreeBadSuperBlk:
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1227:
-.L1071:
+.LVL1229:
+.L1072:
 	.cfi_restore_state
-.LBB254:
-.LBB252:
+.LBB258:
+.LBB256:
 	.loc 5 397 0
-	ldr	r2, .L1075+8
+	ldr	r2, .L1076+8
 	uxth	r3, r6
 	mov	r1, r10
 	movs	r7, #0
 	ldrb	r0, [r2, r3]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL1228:
+.LVL1230:
 	.loc 5 401 0
-	ldr	r2, .L1075+12
+	ldr	r2, .L1076+12
 	.loc 5 397 0
 	mov	fp, r0
-.LVL1229:
-.L1066:
+.LVL1231:
+.L1067:
 	.loc 5 398 0
 	ldrh	r3, [r4]
 	uxth	r5, r7
-.LVL1230:
-	cmp	r3, r5
-	bhi	.L1070
-.LVL1231:
-	adds	r6, r6, #1
 .LVL1232:
-	b	.L1065
+	cmp	r3, r5
+	bhi	.L1071
 .LVL1233:
-.L1070:
+	adds	r6, r6, #1
+.LVL1234:
+	b	.L1066
+.LVL1235:
+.L1071:
 	.loc 5 399 0
 	uxth	r3, r7
 	ldrh	r1, [r8, r3, lsl #1]
 	cmp	r1, fp
-	bne	.L1067
+	bne	.L1068
 	.loc 5 401 0
 	mov	r1, fp
 	mov	r0, r2
 	str	r3, [sp, #4]
 	str	r2, [sp]
 	bl	printf
-.LVL1234:
+.LVL1236:
 	.loc 5 403 0
 	mov	r0, fp
 	bl	FtlBbmMapBadBlock
-.LVL1235:
+.LVL1237:
 	.loc 5 404 0
 	bl	FtlBbmTblFlush
-.LVL1236:
+.LVL1238:
 	ldr	r3, [sp, #4]
 	.loc 5 405 0
 	ldrh	r1, [r4]
 	ldr	r2, [sp]
 	add	r3, r8, r3, lsl #1
-.LVL1237:
-.L1068:
+.LVL1239:
+.L1069:
 	cmp	r5, r1
-	bcc	.L1069
+	bcc	.L1070
 	.loc 5 407 0
 	subs	r1, r1, #1
 	strh	r1, [r4]	@ movhi
-.LVL1238:
-.L1067:
-	adds	r7, r7, #1
-.LVL1239:
-	b	.L1066
 .LVL1240:
-.L1069:
+.L1068:
+	adds	r7, r7, #1
+.LVL1241:
+	b	.L1067
+.LVL1242:
+.L1070:
 	.loc 5 406 0
 	ldrh	r0, [r3, #2]!
 	.loc 5 405 0
 	adds	r5, r5, #1
-.LVL1241:
+.LVL1243:
 	uxth	r5, r5
-.LVL1242:
+.LVL1244:
 	.loc 5 406 0
 	strh	r0, [r3, #-2]	@ movhi
-	b	.L1068
-.L1076:
+	b	.L1069
+.L1077:
 	.align	2
-.L1075:
+.L1076:
 	.word	.LANCHOR103
 	.word	.LANCHOR3
 	.word	.LANCHOR13
 	.word	.LC97
 	.word	.LANCHOR104
-.LBE252:
-.LBE254:
+.LBE256:
+.LBE258:
 	.cfi_endproc
 .LFE320:
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
@@ -13264,7 +13291,7 @@ update_vpc_list:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1243:
+.LVL1245:
 	push	{r3, r4, r5, lr}
 	.cfi_def_cfa_offset 16
 	.cfi_offset 3, -16
@@ -13274,38 +13301,38 @@ update_vpc_list:
 	.loc 2 2687 0
 	mov	r4, r0
 	.loc 2 2688 0
-	ldr	r3, .L1087
+	ldr	r3, .L1088
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	bne	.L1078
+	bne	.L1079
 	.loc 2 2689 0
-	ldr	r2, .L1087+4
+	ldr	r2, .L1088+4
 	ldrh	r1, [r2]
 	cmp	r1, r0
-	bne	.L1079
+	bne	.L1080
 	.loc 2 2691 0
 	movw	r3, #65535
 	strh	r3, [r2]	@ movhi
-.L1080:
-.LVL1244:
-.LBB257:
-.LBB258:
+.L1081:
+.LVL1246:
+.LBB261:
+.LBB262:
 	.loc 2 2696 0
-	ldr	r5, .L1087+8
+	ldr	r5, .L1088+8
 	mov	r1, r4
-	ldr	r0, .L1087+12
-.LVL1245:
+	ldr	r0, .L1088+12
+.LVL1247:
 	bl	List_remove_node
-.LVL1246:
+.LVL1248:
 	ldrh	r3, [r5]
-	cbnz	r3, .L1082
+	cbnz	r3, .L1083
 	movw	r2, #2696
-	ldr	r1, .L1087+16
-	ldr	r0, .L1087+20
+	ldr	r1, .L1088+16
+	ldr	r0, .L1088+20
 	bl	printf
-.LVL1247:
-.L1082:
+.LVL1249:
+.L1083:
 	ldrh	r3, [r5]
 	.loc 2 2697 0
 	mov	r0, r4
@@ -13314,63 +13341,63 @@ update_vpc_list:
 	strh	r3, [r5]	@ movhi
 	.loc 2 2697 0
 	bl	free_data_superblock
-.LVL1248:
+.LVL1250:
 	.loc 2 2698 0
 	mov	r0, r4
 	bl	FtlGcFreeBadSuperBlk
-.LVL1249:
+.LVL1251:
 	.loc 2 2699 0
-	ldr	r3, .L1087+24
+	ldr	r3, .L1088+24
 	ldrh	r2, [r5]
 	ldrh	r3, [r3]
 	add	r3, r3, r2
-	ldr	r2, .L1087+28
+	ldr	r2, .L1088+28
 	ldrh	r2, [r2]
 	cmp	r3, r2
-	ble	.L1086
+	ble	.L1087
 	movw	r2, #2699
-	ldr	r1, .L1087+16
-	ldr	r0, .L1087+20
+	ldr	r1, .L1088+16
+	ldr	r0, .L1088+20
 	bl	printf
-.LVL1250:
-.L1086:
+.LVL1252:
+.L1087:
 	movs	r3, #1
-	b	.L1077
-.LVL1251:
-.L1079:
-.LBE258:
-.LBE257:
+	b	.L1078
+.LVL1253:
+.L1080:
+.LBE262:
+.LBE261:
 	.loc 2 2692 0
-	ldr	r2, .L1087+32
+	ldr	r2, .L1088+32
 	ldrh	r2, [r2]
 	cmp	r2, r0
-	beq	.L1077
+	beq	.L1078
 	.loc 2 2692 0 is_stmt 0 discriminator 1
-	ldr	r2, .L1087+36
+	ldr	r2, .L1088+36
 	ldrh	r2, [r2]
 	cmp	r2, r0
-	beq	.L1077
+	beq	.L1078
 	.loc 2 2692 0 discriminator 2
-	ldr	r2, .L1087+40
+	ldr	r2, .L1088+40
 	ldrh	r2, [r2]
 	cmp	r2, r0
-	bne	.L1080
-.LVL1252:
-.L1077:
+	bne	.L1081
+.LVL1254:
+.L1078:
 	.loc 2 2705 0 is_stmt 1
 	mov	r0, r3
 	pop	{r3, r4, r5, pc}
-.LVL1253:
-.L1078:
+.LVL1255:
+.L1079:
 	.loc 2 2702 0
 	bl	List_update_data_list
-.LVL1254:
+.LVL1256:
 	.loc 2 2704 0
 	movs	r3, #0
-	b	.L1077
-.L1088:
+	b	.L1078
+.L1089:
 	.align	2
-.L1087:
+.L1088:
 	.word	.LANCHOR43
 	.word	.LANCHOR82
 	.word	.LANCHOR45
@@ -13399,7 +13426,7 @@ decrement_vpc_count:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1255:
+.LVL1257:
 	.loc 2 2711 0
 	movw	r3, #65535
 	.loc 2 2708 0
@@ -13414,75 +13441,75 @@ decrement_vpc_count:
 	.loc 2 2708 0
 	mov	r4, r0
 	.loc 2 2711 0
-	beq	.L1090
+	beq	.L1091
 	.loc 2 2712 0
-	ldr	r5, .L1098
+	ldr	r5, .L1099
 	ldr	r3, [r5]
 	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L1091
+	cbnz	r2, .L1092
 	.loc 2 2713 0
 	mov	r1, r0
-	ldr	r0, .L1098+4
-.LVL1256:
+	ldr	r0, .L1099+4
+.LVL1258:
 	bl	printf
-.LVL1257:
+.LVL1259:
 	.loc 2 2714 0
 	ldr	r3, [r5]
 	ldrh	r5, [r3, r4, lsl #1]
-	cbz	r5, .L1092
-.L1096:
+	cbz	r5, .L1093
+.L1097:
 	.loc 2 2723 0
 	movs	r5, #0
-.LVL1258:
-.L1089:
+.LVL1260:
+.L1090:
 	.loc 2 2733 0
 	mov	r0, r5
 	pop	{r4, r5, r6, pc}
-.LVL1259:
-.L1092:
+.LVL1261:
+.L1093:
 	.loc 2 2714 0 discriminator 1
 	movw	r2, #2714
-.LVL1260:
-.L1097:
+.LVL1262:
+.L1098:
 	.loc 2 2730 0 discriminator 2
-	ldr	r1, .L1098+8
-	ldr	r0, .L1098+12
+	ldr	r1, .L1099+8
+	ldr	r0, .L1099+12
 	bl	printf
-.LVL1261:
-	b	.L1089
-.LVL1262:
-.L1091:
+.LVL1263:
+	b	.L1090
+.LVL1264:
+.L1092:
 	.loc 2 2717 0
 	subs	r2, r2, #1
 	strh	r2, [r3, r0, lsl #1]	@ movhi
-.L1090:
+.L1091:
 	.loc 2 2721 0
-	ldr	r6, .L1098+16
+	ldr	r6, .L1099+16
 	movw	r3, #65535
 	ldrh	r0, [r6]
-.LVL1263:
+.LVL1265:
 	cmp	r0, r3
-	bne	.L1094
+	bne	.L1095
 	.loc 2 2722 0
 	strh	r4, [r6]	@ movhi
-	b	.L1096
-.L1094:
+	b	.L1097
+.L1095:
 	.loc 2 2724 0
 	cmp	r4, r0
-	beq	.L1096
+	beq	.L1097
 	.loc 2 2727 0
 	bl	update_vpc_list
-.LVL1264:
+.LVL1266:
 	.loc 2 2730 0
-	ldr	r3, .L1098+20
+	ldr	r3, .L1099+20
 	.loc 2 2727 0
 	adds	r5, r0, #0
 	.loc 2 2730 0
-	ldr	r2, .L1098+24
+	ldr	r2, .L1099+24
 	.loc 2 2727 0
 	it	ne
 	movne	r5, #1
-.LVL1265:
+.LVL1267:
 	.loc 2 2729 0
 	strh	r4, [r6]	@ movhi
 	.loc 2 2730 0
@@ -13490,23 +13517,23 @@ decrement_vpc_count:
 	ldr	r2, [r2]
 	subs	r3, r3, r2
 	asrs	r2, r3, #1
-	ldr	r3, .L1098+28
+	ldr	r3, .L1099+28
 	muls	r3, r2, r3
-	ldr	r2, .L1098
+	ldr	r2, .L1099
 	ldr	r2, [r2]
 	uxth	r1, r3
 	ldrh	r2, [r2, r1, lsl #1]
 	cmp	r2, #0
-	bne	.L1089
+	bne	.L1090
 	.loc 2 2730 0 is_stmt 0 discriminator 1
 	cmp	r4, r1
-	beq	.L1089
+	beq	.L1090
 	.loc 2 2730 0 discriminator 2
 	movw	r2, #2730
-	b	.L1097
-.L1099:
+	b	.L1098
+.L1100:
 	.align	2
-.L1098:
+.L1099:
 	.word	.LANCHOR43
 	.word	.LC98
 	.word	.LANCHOR160
@@ -13545,36 +13572,36 @@ FtlWriteDump_data:
 	sub	sp, sp, #24
 	.cfi_def_cfa_offset 56
 	.loc 2 948 0
-	ldr	r4, .L1119
+	ldr	r4, .L1120
 	ldrh	r2, [r4, #4]
 	cmp	r2, #0
-	beq	.L1101
+	beq	.L1102
 	.loc 2 948 0 is_stmt 0 discriminator 1
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1101
+	bne	.L1102
 	.loc 2 949 0 is_stmt 1
-	ldr	r3, .L1119+4
+	ldr	r3, .L1120+4
 	ldrb	r1, [r4, #7]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	muls	r3, r1, r3
 	cmp	r2, r3
-	beq	.L1101
-.LVL1266:
-.LBB262:
-.LBB263:
+	beq	.L1102
+.LVL1268:
+.LBB266:
+.LBB267:
 	.loc 2 956 0
 	ldrb	r7, [r4, #10]	@ zero_extendqisi2
-	cbnz	r7, .L1100
+	cbnz	r7, .L1101
 	.loc 2 951 0
-	ldr	r3, .L1119+8
+	ldr	r3, .L1120+8
 	.loc 2 958 0
 	mov	r2, r7
 	mov	r1, sp
 	.loc 2 951 0
 	ldr	r6, [r3]
 	.loc 2 953 0
-	ldr	r3, .L1119+12
+	ldr	r3, .L1120+12
 	.loc 2 951 0
 	subs	r6, r6, #1
 	.loc 2 958 0
@@ -13583,9 +13610,9 @@ FtlWriteDump_data:
 	ldrh	r8, [r3]
 	.loc 2 958 0
 	bl	log2phys
-.LVL1267:
+.LVL1269:
 	.loc 2 963 0
-	ldr	r2, .L1119+16
+	ldr	r2, .L1120+16
 	.loc 2 961 0
 	ldr	r3, [sp]
 	.loc 2 962 0
@@ -13593,7 +13620,7 @@ FtlWriteDump_data:
 	.loc 2 963 0
 	ldr	r0, [r2]
 	.loc 2 964 0
-	ldr	r2, .L1119+20
+	ldr	r2, .L1120+20
 	.loc 2 961 0
 	str	r3, [sp, #8]
 	.loc 2 967 0
@@ -13603,67 +13630,67 @@ FtlWriteDump_data:
 	.loc 2 964 0
 	ldr	r5, [r2]
 	str	r5, [sp, #16]
-.LVL1268:
+.LVL1270:
 	.loc 2 966 0
 	str	r7, [r5, #4]
 	.loc 2 967 0
-	beq	.L1103
+	beq	.L1104
 	.loc 2 969 0
 	mov	r2, r7
 	movs	r1, #1
 	add	r0, sp, #4
 	bl	FlashReadPages
-.LVL1269:
-.L1104:
+.LVL1271:
+.L1105:
 	.loc 2 986 0
-	ldr	fp, .L1119
+	ldr	fp, .L1120
 	.loc 2 953 0
 	lsl	r8, r8, #2
-.LVL1270:
+.LVL1272:
 	.loc 2 987 0
-	ldr	r10, .L1119+28
+	ldr	r10, .L1120+28
 	.loc 2 975 0
 	movs	r7, #0
 	movw	r3, #61589
 	strh	r3, [r5]	@ movhi
-.L1105:
+.L1106:
 	.loc 2 976 0
 	cmp	r8, r7
-	bne	.L1109
-.L1106:
+	bne	.L1110
+.L1107:
 	.loc 2 992 0
 	movs	r3, #1
-.LVL1271:
-.L1118:
-.LBE263:
-.LBE262:
+.LVL1273:
+.L1119:
+.LBE267:
+.LBE266:
 	.loc 2 998 0
 	strb	r3, [r4, #10]
-.L1100:
+.L1101:
 	.loc 2 1000 0
 	add	sp, sp, #24
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1272:
-.L1103:
+.LVL1274:
+.L1104:
 	.cfi_restore_state
-.LBB265:
-.LBB264:
+.LBB269:
+.LBB268:
 	.loc 2 973 0
-	ldr	r3, .L1119+24
+	ldr	r3, .L1120+24
 	movs	r1, #255
 	ldrh	r2, [r3]
 	bl	ftl_memset
-.LVL1273:
-	b	.L1104
-.LVL1274:
-.L1109:
+.LVL1275:
+	b	.L1105
+.LVL1276:
+.L1110:
 	.loc 2 978 0
 	ldrh	r3, [r4, #4]
 	cmp	r3, #0
-	beq	.L1106
+	beq	.L1107
 	.loc 2 983 0
 	ldr	r3, [sp, #8]
 	.loc 2 986 0
@@ -13678,7 +13705,7 @@ FtlWriteDump_data:
 	strh	r3, [r5, #2]	@ movhi
 	.loc 2 986 0
 	bl	get_new_active_ppa
-.LVL1275:
+.LVL1277:
 	.loc 2 987 0
 	ldr	r3, [r10]
 	.loc 2 988 0
@@ -13698,22 +13725,22 @@ FtlWriteDump_data:
 	movs	r3, #0
 	mov	r2, r3
 	bl	FlashProgPages
-.LVL1276:
+.LVL1278:
 	.loc 2 990 0
 	ldrh	r0, [r4]
 	bl	decrement_vpc_count
-.LVL1277:
-	b	.L1105
-.LVL1278:
-.L1101:
-.LBE264:
-.LBE265:
+.LVL1279:
+	b	.L1106
+.LVL1280:
+.L1102:
+.LBE268:
+.LBE269:
 	.loc 2 998 0
 	movs	r3, #0
-	b	.L1118
-.L1120:
+	b	.L1119
+.L1121:
 	.align	2
-.L1119:
+.L1120:
 	.word	.LANCHOR51
 	.word	.LANCHOR19
 	.word	.LANCHOR62
@@ -13747,25 +13774,25 @@ l2p_flush:
 	.cfi_offset 14, -4
 	.loc 2 746 0
 	movs	r4, #0
-	ldr	r5, .L1125
+	ldr	r5, .L1126
 	.loc 2 747 0
-	ldr	r6, .L1125+4
+	ldr	r6, .L1126+4
 	.loc 2 744 0
 	bl	FtlWriteDump_data
-.LVL1279:
-.L1122:
+.LVL1281:
+.L1123:
 	.loc 2 746 0 discriminator 1
 	ldrh	r3, [r5]
 	uxth	r0, r4
-.LVL1280:
+.LVL1282:
 	cmp	r3, r0
-	bhi	.L1124
+	bhi	.L1125
 	.loc 2 750 0
 	movs	r0, #0
-.LVL1281:
+.LVL1283:
 	pop	{r4, r5, r6, pc}
-.LVL1282:
-.L1124:
+.LVL1284:
+.L1125:
 	.loc 2 747 0
 	ldr	r2, [r6]
 	uxth	r3, r4
@@ -13773,17 +13800,17 @@ l2p_flush:
 	mla	r3, r1, r3, r2
 	ldr	r3, [r3, #4]
 	cmp	r3, #0
-	bge	.L1123
+	bge	.L1124
 	.loc 2 748 0
 	bl	flush_l2p_region
-.LVL1283:
-.L1123:
+.LVL1285:
+.L1124:
 	adds	r4, r4, #1
-.LVL1284:
-	b	.L1122
-.L1126:
+.LVL1286:
+	b	.L1123
+.L1127:
 	.align	2
-.L1125:
+.L1126:
 	.word	.LANCHOR33
 	.word	.LANCHOR56
 	.cfi_endproc
@@ -13803,7 +13830,7 @@ FtlRecoverySuperblock:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 48
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1285:
+.LVL1287:
 	.loc 2 1670 0
 	ldrh	r3, [r0]
 	movw	r2, #65535
@@ -13823,32 +13850,32 @@ FtlRecoverySuperblock:
 	.cfi_def_cfa_offset 80
 	.loc 2 1670 0
 	cmp	r3, r2
-	beq	.L1256
+	beq	.L1257
 	.loc 2 1675 0
 	ldrh	r3, [r0, #2]
 	str	r3, [sp, #4]
-.LVL1286:
+.LVL1288:
 	.loc 2 1676 0
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	.loc 2 1681 0
 	ldr	r1, [sp, #4]
 	.loc 2 1676 0
 	str	r3, [sp, #20]
-.LVL1287:
+.LVL1289:
 	.loc 2 1681 0
-	ldr	r3, .L1264
+	ldr	r3, .L1265
 	ldrh	r3, [r3]
 	cmp	r3, r1
 	mov	r3, #0
-	bne	.L1130
+	bne	.L1131
 	.loc 2 1682 0
 	strh	r3, [r0, #4]	@ movhi
-.LVL1288:
-.L1262:
+.LVL1290:
+.L1263:
 	.loc 2 1989 0
 	strb	r3, [r8, #6]
-.LVL1289:
-.L1256:
+.LVL1291:
+.L1257:
 	.loc 2 2010 0
 	movs	r0, #0
 	add	sp, sp, #48
@@ -13856,35 +13883,35 @@ FtlRecoverySuperblock:
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1290:
-.L1130:
+.LVL1292:
+.L1131:
 	.cfi_restore_state
 	.loc 2 1689 0
 	ldrh	r0, [r0, #16]
-.LVL1291:
-.L1131:
+.LVL1293:
+.L1132:
 	.loc 2 1690 0
 	cmp	r0, r2
 	uxth	r5, r3
-.LVL1292:
+.LVL1294:
 	add	r3, r3, #1
-	beq	.L1132
+	beq	.L1133
 	.loc 2 1697 0
 	movs	r1, #1
 	bl	FtlGetLastWrittenPage
-.LVL1293:
+.LVL1295:
 	mov	r4, r0
-.LVL1294:
+.LVL1296:
 	.loc 2 1705 0
 	adds	r0, r0, #1
-.LVL1295:
-	beq	.L1133
+.LVL1297:
+	beq	.L1134
 	.loc 2 1717 0
-	ldr	r3, .L1264+4
+	ldr	r3, .L1265+4
 	.loc 2 1722 0
 	movs	r2, #0
 	mov	r5, r2
-.LVL1296:
+.LVL1298:
 	.loc 2 1719 0
 	movw	fp, #65535
 	.loc 2 1720 0
@@ -13892,37 +13919,37 @@ FtlRecoverySuperblock:
 	.loc 2 1717 0
 	ldrh	ip, [r3]
 	.loc 2 1720 0
-	ldr	r3, .L1264+8
+	ldr	r3, .L1265+8
 	ldr	r0, [r3]
 	.loc 2 1721 0
-	ldr	r3, .L1264+12
+	ldr	r3, .L1265+12
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
-	ldr	r3, .L1264+16
+	ldr	r3, .L1265+16
 	ldrh	r7, [r3]
 	.loc 2 1722 0
-	ldr	r3, .L1264+20
+	ldr	r3, .L1265+20
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L1264+24
+	ldr	r3, .L1265+24
 	ldrh	lr, [r3]
 	add	r3, r8, #16
 	str	r3, [sp, #16]
 	str	r3, [sp]
-.L1134:
-.LVL1297:
+.L1135:
+.LVL1299:
 	.loc 2 1717 0 discriminator 1
 	uxth	r3, r2
 	cmp	ip, r3
-	bhi	.L1138
+	bhi	.L1139
 	.loc 2 1727 0
 	movs	r2, #0
-.LVL1298:
+.LVL1300:
 	mov	r1, r5
 	bl	FlashReadPages
-.LVL1299:
+.LVL1301:
 	.loc 2 1728 0
-	ldr	r2, .L1264+28
+	ldr	r2, .L1265+28
 	.loc 2 1742 0
 	uxth	r1, r4
 	.loc 2 1666 0
@@ -13933,44 +13960,44 @@ FtlRecoverySuperblock:
 	ldr	r3, [r2]
 	subs	r3, r3, #1
 	str	r3, [sp]
-.LVL1300:
+.LVL1302:
 	.loc 2 1730 0
-	ldr	r3, .L1264+8
-.LVL1301:
+	ldr	r3, .L1265+8
+.LVL1303:
 	ldr	r10, [r3]
 	.loc 2 1729 0
 	movs	r3, #0
 	mov	r7, r10
-.LVL1302:
-.L1139:
+.LVL1304:
+.L1140:
 	uxth	r1, r3
-.LVL1303:
+.LVL1305:
 	.loc 2 1729 0 is_stmt 0 discriminator 1
 	cmp	r5, r1
-	bhi	.L1144
+	bhi	.L1145
 	.loc 2 1745 0 is_stmt 1
-	bne	.L1142
+	bne	.L1143
 	.loc 2 1747 0
 	adds	r3, r4, #1
 	uxth	r3, r3
 	str	r3, [sp, #8]
-.LVL1304:
-.L1257:
+.LVL1306:
+.L1258:
 	.loc 2 1753 0
 	ldr	r0, [r10, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_plane
-.LVL1305:
+.LVL1307:
 	.loc 2 1758 0
-	ldr	r3, .L1264
+	ldr	r3, .L1265
 	.loc 2 1753 0
 	mov	r10, r0
-.LVL1306:
+.LVL1308:
 	.loc 2 1758 0
 	ldr	r2, [sp, #8]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bne	.L1146
+	bne	.L1147
 	.loc 2 1759 0
 	ldrh	r3, [sp, #8]
 	strh	r3, [r8, #2]	@ movhi
@@ -13979,65 +14006,65 @@ FtlRecoverySuperblock:
 	strb	r3, [r8, #6]
 	.loc 2 1761 0
 	strh	r3, [r8, #4]	@ movhi
-.L1146:
+.L1147:
 	.loc 2 1764 0
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #4]
 	cmp	r3, r2
-	bne	.L1147
+	bne	.L1148
 	.loc 2 1764 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #20]
 	cmp	r10, r3
-	bne	.L1147
+	bne	.L1148
 	.loc 2 1765 0 is_stmt 1
 	ldr	r1, [sp, #8]
 	mov	r2, r10
-.LVL1307:
-.L1263:
+.LVL1309:
+.L1264:
 	.loc 2 2004 0
 	mov	r0, r8
 	bl	ftl_sb_update_avl_pages
-.LVL1308:
-	b	.L1256
-.LVL1309:
-.L1132:
+.LVL1310:
+	b	.L1257
+.LVL1311:
+.L1133:
 	.loc 2 1692 0
 	uxth	r1, r3
 	adds	r1, r1, #8
 	ldrh	r0, [r8, r1, lsl #1]
-.LVL1310:
-	b	.L1131
-.LVL1311:
-.L1133:
+.LVL1312:
+	b	.L1132
+.LVL1313:
+.L1134:
 	.loc 2 1706 0
 	ldr	r3, [sp, #4]
-	cbz	r3, .L1135
+	cbz	r3, .L1136
 	.loc 2 1706 0 is_stmt 0 discriminator 1
 	movw	r2, #1706
-	ldr	r1, .L1264+32
-	ldr	r0, .L1264+36
+	ldr	r1, .L1265+32
+	ldr	r0, .L1265+36
 	bl	printf
-.LVL1312:
-.L1135:
+.LVL1314:
+.L1136:
 	.loc 2 1707 0 is_stmt 1
 	ldr	r3, [sp, #20]
-	cbz	r3, .L1136
+	cbz	r3, .L1137
 	.loc 2 1707 0 is_stmt 0 discriminator 1
 	cmp	r5, r3
-	beq	.L1136
+	beq	.L1137
 	.loc 2 1707 0 discriminator 2
 	movw	r2, #1707
-	ldr	r1, .L1264+32
-	ldr	r0, .L1264+36
+	ldr	r1, .L1265+32
+	ldr	r0, .L1265+36
 	bl	printf
-.LVL1313:
-.L1136:
+.LVL1315:
+.L1137:
 	.loc 2 1708 0 is_stmt 1
 	movs	r3, #0
 	strh	r3, [r8, #2]	@ movhi
-	b	.L1262
-.LVL1314:
-.L1138:
+	b	.L1263
+.LVL1316:
+.L1139:
 	.loc 2 1718 0
 	ldr	r1, [sp]
 	ldrh	r3, [r1], #2
@@ -14045,16 +14072,16 @@ FtlRecoverySuperblock:
 	cmp	r3, fp
 	.loc 2 1718 0
 	str	r1, [sp]
-.LVL1315:
+.LVL1317:
 	.loc 2 1719 0
-	beq	.L1137
+	beq	.L1138
 	.loc 2 1720 0
 	mla	r1, r10, r5, r0
 	.loc 2 1721 0
 	ldr	r6, [sp, #8]
 	.loc 2 1720 0
 	orr	r3, r4, r3, lsl #10
-.LVL1316:
+.LVL1318:
 	str	r3, [r1, #4]
 	.loc 2 1721 0
 	mul	r3, r7, r5
@@ -14068,96 +14095,96 @@ FtlRecoverySuperblock:
 	mul	r3, lr, r5
 	.loc 2 1723 0
 	adds	r5, r5, #1
-.LVL1317:
+.LVL1319:
 	uxth	r5, r5
-.LVL1318:
+.LVL1320:
 	.loc 2 1722 0
 	bic	r3, r3, #3
 	add	r3, r3, r6
 	str	r3, [r1, #12]
-.L1137:
-.LVL1319:
-	adds	r2, r2, #1
-.LVL1320:
-	b	.L1134
+.L1138:
 .LVL1321:
-.L1144:
+	adds	r2, r2, #1
+.LVL1322:
+	b	.L1135
+.LVL1323:
+.L1145:
 	.loc 2 1730 0
 	ldr	r1, [r7]
-.LVL1322:
-	cbnz	r1, .L1140
+.LVL1324:
+	cbnz	r1, .L1141
 	.loc 2 1731 0
 	ldr	r1, [r7, #12]
 	.loc 2 1732 0
 	ldr	r6, [r1, #4]
 	.loc 2 1731 0
 	str	r1, [sp, #8]
-.LVL1323:
+.LVL1325:
 	.loc 2 1732 0
 	adds	r1, r6, #1
-.LVL1324:
-	beq	.L1141
+.LVL1326:
+	beq	.L1142
 	.loc 2 1733 0
 	ldr	r1, [r2]
 	mov	r0, r6
 	bl	ftl_cmp_data_ver
-.LVL1325:
-	cbz	r0, .L1141
+.LVL1327:
+	cbz	r0, .L1142
 	.loc 2 1735 0
 	adds	r6, r6, #1
 	str	r6, [r2]
-.L1141:
+.L1142:
 	.loc 2 1738 0
 	ldr	r1, [sp, #8]
 	ldr	r1, [r1]
 	adds	r1, r1, #1
-	bne	.L1143
-.LVL1326:
-.L1142:
+	bne	.L1144
+.LVL1328:
+.L1143:
 	.loc 2 1752 0
 	uxth	r2, r4
 	.loc 2 1753 0
 	uxth	r3, r3
 	.loc 2 1752 0
 	str	r2, [sp, #8]
-.LVL1327:
+.LVL1329:
 	.loc 2 1753 0
 	movs	r2, #20
 	mla	r10, r2, r3, r10
-	b	.L1257
-.LVL1328:
-.L1140:
+	b	.L1258
+.LVL1330:
+.L1141:
 	.loc 2 1742 0
 	ldr	fp, [sp, #12]
-.LVL1329:
-.L1143:
+.LVL1331:
+.L1144:
 	adds	r3, r3, #1
-.LVL1330:
+.LVL1332:
 	adds	r7, r7, #20
-	b	.L1139
-.LVL1331:
-.L1147:
+	b	.L1140
+.LVL1333:
+.L1148:
 	.loc 2 1770 0
 	movw	r3, #65535
 	cmp	fp, r3
-	bne	.L1148
+	bne	.L1149
 	.loc 2 1770 0 is_stmt 0 discriminator 1
 	ldrb	r3, [r8, #8]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1149
-.L1148:
-.LVL1332:
-.LBB266:
+	bne	.L1150
+.L1149:
+.LVL1334:
+.LBB270:
 	.loc 2 1775 0 is_stmt 1
-	ldr	r3, .L1264+40
+	ldr	r3, .L1265+40
 	.loc 2 1774 0
 	uxth	r6, r4
-.LVL1333:
+.LVL1335:
 	.loc 2 1778 0
 	uxth	r4, r4
-.LVL1334:
+.LVL1336:
 	.loc 2 1785 0
-	ldr	r7, .L1264+8
+	ldr	r7, .L1265+8
 	.loc 2 1775 0
 	ldr	r2, [r3]
 	adds	r2, r2, #1
@@ -14165,7 +14192,7 @@ FtlRecoverySuperblock:
 	itt	eq
 	ldreq	r2, [sp]
 	streq	r2, [r3]
-.LVL1335:
+.LVL1337:
 	.loc 2 1778 0
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #7
@@ -14175,13 +14202,13 @@ FtlRecoverySuperblock:
 	subgt	r4, r6, #7
 	ldrle	r4, [sp, #4]
 	uxthgt	r4, r4
-.LVL1336:
-.L1152:
+.LVL1338:
+.L1153:
 	.loc 2 1780 0 discriminator 1
 	cmp	r4, r6
-	bhi	.L1162
+	bhi	.L1163
 	.loc 2 1782 0
-	ldr	r3, .L1264+4
+	ldr	r3, .L1265+4
 	.loc 2 1784 0
 	movw	lr, #65535
 	.loc 2 1785 0
@@ -14194,9 +14221,9 @@ FtlRecoverySuperblock:
 	str	r3, [sp, #12]
 	movs	r3, #0
 	mov	r5, r3
-	b	.L1163
-.LVL1337:
-.L1154:
+	b	.L1164
+.LVL1339:
+.L1155:
 	.loc 2 1783 0
 	ldr	r1, [sp, #12]
 	ldrh	r2, [r1], #2
@@ -14204,37 +14231,37 @@ FtlRecoverySuperblock:
 	cmp	r2, lr
 	.loc 2 1783 0
 	str	r1, [sp, #12]
-.LVL1338:
+.LVL1340:
 	.loc 2 1784 0
-	beq	.L1153
+	beq	.L1154
 	.loc 2 1785 0
 	mla	r1, ip, r5, r0
 	.loc 2 1786 0
 	adds	r5, r5, #1
-.LVL1339:
+.LVL1341:
 	.loc 2 1785 0
 	orr	r2, r4, r2, lsl #10
-.LVL1340:
+.LVL1342:
 	.loc 2 1786 0
 	uxth	r5, r5
-.LVL1341:
+.LVL1343:
 	.loc 2 1785 0
 	str	r2, [r1, #4]
-.L1153:
-.LVL1342:
+.L1154:
+.LVL1344:
 	adds	r3, r3, #1
-.LVL1343:
-.L1163:
+.LVL1345:
+.L1164:
 	.loc 2 1782 0 discriminator 1
 	uxth	r2, r3
 	cmp	fp, r2
-	bhi	.L1154
+	bhi	.L1155
 	.loc 2 1789 0
 	mov	r1, r5
 	movs	r2, #0
 	bl	FlashReadPages
-.LVL1344:
-	ldr	r3, .L1264+40
+.LVL1346:
+	ldr	r3, .L1265+40
 	movs	r1, #20
 	.loc 2 1790 0
 	movs	r0, #0
@@ -14243,24 +14270,24 @@ FtlRecoverySuperblock:
 	ldr	r2, [r3]
 	ldr	r3, [r7]
 	mla	r5, r1, r5, r3
-.LVL1345:
-.L1155:
+.LVL1347:
+.L1156:
 	.loc 2 1790 0 discriminator 1
 	cmp	r3, r5
-	bne	.L1160
-	cbz	r0, .L1161
-	ldr	r3, .L1264+40
+	bne	.L1161
+	cbz	r0, .L1162
+	ldr	r3, .L1265+40
 	str	r2, [r3]
-.L1161:
+.L1162:
 	.loc 2 1780 0
 	adds	r4, r4, #1
-.LVL1346:
+.LVL1348:
 	uxth	r4, r4
-.LVL1347:
-	b	.L1152
-.L1265:
+.LVL1349:
+	b	.L1153
+.L1266:
 	.align	2
-.L1264:
+.L1265:
 	.word	.LANCHOR19
 	.word	.LANCHOR3
 	.word	.LANCHOR120
@@ -14272,36 +14299,36 @@ FtlRecoverySuperblock:
 	.word	.LANCHOR161
 	.word	.LC1
 	.word	.LANCHOR154
-.L1160:
+.L1161:
 	.loc 2 1791 0
 	ldr	r1, [r3]
 	cmp	r1, #0
-	beq	.L1156
-	cbz	r0, .L1149
-.L1258:
+	beq	.L1157
+	cbz	r0, .L1150
+.L1259:
 	.loc 2 1809 0
-	ldr	r3, .L1266
+	ldr	r3, .L1267
 	str	r2, [r3]
-.LVL1348:
-.L1149:
-.LBE266:
+.LVL1350:
+.L1150:
+.LBE270:
 	.loc 2 1814 0
-	ldr	r3, .L1266+4
+	ldr	r3, .L1267+4
 	movs	r2, #1
 	.loc 2 1815 0
-	ldr	r0, .L1266+8
+	ldr	r0, .L1267+8
 	.loc 2 1824 0
-	ldr	r6, .L1266+12
+	ldr	r6, .L1267+12
 	.loc 2 1814 0
 	strh	r2, [r3]	@ movhi
 	.loc 2 1815 0
 	bl	FtlMapBlkWriteDump_data
-.LVL1349:
+.LVL1351:
 	ldr	fp, [sp, #4]
-.LVL1350:
-.L1164:
+.LVL1352:
+.L1165:
 	.loc 2 1821 0
-	ldr	r3, .L1266+16
+	ldr	r3, .L1267+16
 	.loc 2 1823 0
 	movw	lr, #65535
 	.loc 2 1824 0
@@ -14313,41 +14340,41 @@ FtlRecoverySuperblock:
 	movs	r3, #0
 	.loc 2 1820 0
 	str	r3, [sp, #12]
-.LVL1351:
-.L1165:
+.LVL1353:
+.L1166:
 	.loc 2 1821 0 discriminator 1
 	uxth	r2, r3
 	cmp	r2, r4
-	bcc	.L1167
+	bcc	.L1168
 	.loc 2 1828 0
 	movs	r2, #0
 	ldr	r1, [sp, #12]
 	bl	FlashReadPages
-.LVL1352:
+.LVL1354:
 	.loc 2 1829 0
 	movs	r3, #0
-.LVL1353:
-.L1261:
+.LVL1355:
+.L1262:
 	str	r3, [sp, #24]
-.LVL1354:
+.LVL1356:
 	.loc 2 1829 0 is_stmt 0 discriminator 2
 	ldr	r2, [sp, #12]
 	ldrh	r3, [sp, #24]
 	cmp	r2, r3
-	bhi	.L1196
+	bhi	.L1197
 	.loc 2 1983 0 is_stmt 1
-	ldr	r3, .L1266+20
+	ldr	r3, .L1267+20
 	.loc 2 1982 0
 	add	fp, fp, #1
-.LVL1355:
+.LVL1357:
 	uxth	fp, fp
-.LVL1356:
+.LVL1358:
 	.loc 2 1983 0
 	ldrh	r3, [r3]
 	cmp	r3, fp
-	bne	.L1164
+	bne	.L1165
 	.loc 2 1986 0
-	ldr	r2, .L1266+16
+	ldr	r2, .L1267+16
 	.loc 2 1988 0
 	movw	r0, #65535
 	.loc 2 1985 0
@@ -14356,15 +14383,15 @@ FtlRecoverySuperblock:
 	strh	fp, [r8, #2]	@ movhi
 	.loc 2 1985 0
 	strh	r3, [r8, #4]	@ movhi
-.LVL1357:
+.LVL1359:
 	.loc 2 1986 0
 	ldrh	r2, [r2]
-.LVL1358:
-.L1197:
+.LVL1360:
+.L1198:
 	.loc 2 1986 0 is_stmt 0 discriminator 1
 	uxth	r1, r3
 	cmp	r1, r2
-	bcs	.L1256
+	bcs	.L1257
 	.loc 2 1987 0 is_stmt 1
 	ldr	r1, [sp, #16]
 	ldrh	r4, [r1], #2
@@ -14372,52 +14399,52 @@ FtlRecoverySuperblock:
 	cmp	r4, r0
 	.loc 2 1987 0
 	str	r1, [sp, #16]
-.LVL1359:
+.LVL1361:
 	add	r1, r3, #1
 	.loc 2 1988 0
-	bne	.L1262
+	bne	.L1263
 	mov	r3, r1
-.LVL1360:
-	b	.L1197
-.LVL1361:
-.L1156:
-.LBB267:
+.LVL1362:
+	b	.L1198
+.LVL1363:
+.L1157:
+.LBB271:
 	.loc 2 1792 0
 	ldr	r1, [r3, #12]
-.LVL1362:
+.LVL1364:
 	.loc 2 1793 0
 	ldrh	lr, [r1]
 	cmp	lr, ip
-	beq	.L1159
+	beq	.L1160
 	.loc 2 1795 0
 	ldr	r1, [r1, #4]
-.LVL1363:
+.LVL1365:
 	cmp	r1, #-1
 	itt	ne
 	movne	r2, r1
 	movne	r0, #1
-.L1159:
+.L1160:
 	adds	r3, r3, #20
-.LVL1364:
-	b	.L1155
-.LVL1365:
-.L1162:
+.LVL1366:
+	b	.L1156
+.LVL1367:
+.L1163:
 	.loc 2 1809 0
 	mov	r2, #-1
-	b	.L1258
-.LVL1366:
-.L1167:
-.LBE267:
+	b	.L1259
+.LVL1368:
+.L1168:
+.LBE271:
 	.loc 2 1822 0
 	ldrh	r2, [r1], #2
-.LVL1367:
+.LVL1369:
 	.loc 2 1823 0
 	cmp	r2, lr
-	beq	.L1166
+	beq	.L1167
 	.loc 2 1824 0
 	ldr	r5, [sp, #12]
 	orr	r2, fp, r2, lsl #10
-.LVL1368:
+.LVL1370:
 	mla	ip, r7, r5, r0
 	str	r2, [ip, #4]
 	.loc 2 1825 0
@@ -14425,13 +14452,13 @@ FtlRecoverySuperblock:
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r2, [sp, #12]
-.LVL1369:
-.L1166:
-	adds	r3, r3, #1
-.LVL1370:
-	b	.L1165
 .LVL1371:
-.L1196:
+.L1167:
+	adds	r3, r3, #1
+.LVL1372:
+	b	.L1166
+.LVL1373:
+.L1197:
 	ldr	r3, [sp, #24]
 	movs	r5, #20
 	muls	r5, r3, r5
@@ -14446,87 +14473,87 @@ FtlRecoverySuperblock:
 	str	r4, [sp, #44]
 	.loc 2 1831 0
 	bl	P2V_plane
-.LVL1372:
+.LVL1374:
 	.loc 2 1833 0
 	ldr	r3, [sp, #4]
 	cmp	fp, r3
-	bcc	.L1169
+	bcc	.L1170
 	.loc 2 1833 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #28]
-	bne	.L1170
+	bne	.L1171
 	.loc 2 1834 0 is_stmt 1
 	ldr	r2, [sp, #20]
 	cmp	r2, r0
-	bhi	.L1169
-.L1170:
+	bhi	.L1170
+.L1171:
 	.loc 2 1837 0
 	ldr	r2, [sp, #8]
 	cmp	fp, r2
-	bne	.L1171
+	bne	.L1172
 	.loc 2 1837 0 is_stmt 0 discriminator 1
 	cmp	r10, r0
-	beq	.L1172
-.L1171:
-.LVL1373:
+	beq	.L1173
+.L1172:
+.LVL1375:
 	.loc 2 1841 0 is_stmt 1
 	ldr	r3, [r3, r5]
 	adds	r3, r3, #1
-	beq	.L1173
+	beq	.L1174
 	.loc 2 1842 0
 	ldr	r3, [r7, #12]
-.LVL1374:
+.LVL1376:
 	.loc 2 1843 0
 	movw	r2, #61589
 	ldrh	r1, [r3]
 	cmp	r1, r2
-	beq	.L1174
-.LVL1375:
-.L1180:
-.LBB268:
+	beq	.L1175
+.LVL1377:
+.L1181:
+.LBB272:
 	.loc 2 1876 0
 	ldrh	r0, [r8]
-.LVL1376:
-.L1260:
-.LBE268:
+.LVL1378:
+.L1261:
+.LBE272:
 	.loc 2 1960 0
 	bl	decrement_vpc_count
-.LVL1377:
-.L1169:
+.LVL1379:
+.L1170:
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	b	.L1261
-.LVL1378:
-.L1174:
+	b	.L1262
+.LVL1380:
+.L1175:
 	.loc 2 1849 0
 	ldr	r2, [r3, #4]
 	str	r2, [sp]
-.LVL1379:
+.LVL1381:
 	.loc 2 1850 0
 	adds	r2, r2, #1
-.LVL1380:
-	beq	.L1175
+.LVL1382:
+	beq	.L1176
 	.loc 2 1851 0 discriminator 1
-	ldr	r2, .L1266+24
+	ldr	r2, .L1267+24
 	ldr	r0, [sp]
-.LVL1381:
+.LVL1383:
 	ldr	r1, [r2]
 	bl	ftl_cmp_data_ver
-.LVL1382:
+.LVL1384:
 	.loc 2 1850 0 discriminator 1
-	cbz	r0, .L1175
+	cbz	r0, .L1176
 	.loc 2 1853 0
 	ldr	r1, [sp]
 	adds	r1, r1, #1
 	str	r1, [r2]
-.L1175:
+.L1176:
 	.loc 2 1857 0
 	ldr	r4, [r3, #8]
-.LVL1383:
+.LVL1385:
 	.loc 2 1859 0
 	add	r1, sp, #40
 	.loc 2 1858 0
 	ldr	r3, [r3, #12]
-.LVL1384:
+.LVL1386:
 	.loc 2 1859 0
 	movs	r2, #0
 	mov	r0, r4
@@ -14534,24 +14561,24 @@ FtlRecoverySuperblock:
 	str	r3, [sp, #36]
 	.loc 2 1859 0
 	bl	log2phys
-.LVL1385:
+.LVL1387:
 	.loc 2 1860 0
-	ldr	r3, .L1266
+	ldr	r3, .L1267
 	ldr	r1, [r3]
 	adds	r3, r1, #1
-	beq	.L1176
+	beq	.L1177
 	.loc 2 1861 0 discriminator 1
 	ldr	r0, [sp]
 	bl	ftl_cmp_data_ver
-.LVL1386:
+.LVL1388:
 	.loc 2 1860 0 discriminator 1
 	cmp	r0, #0
-	beq	.L1176
-.LBB269:
+	beq	.L1177
+.LBB273:
 	.loc 2 1865 0
 	ldr	r3, [sp, #36]
 	adds	r7, r3, #1
-	beq	.L1177
+	beq	.L1178
 	.loc 2 1866 0
 	ldr	r0, [r6]
 	.loc 2 1868 0
@@ -14563,18 +14590,18 @@ FtlRecoverySuperblock:
 	str	r3, [r0, #4]
 	.loc 2 1866 0
 	ldr	r7, [r0, #12]
-.LVL1387:
+.LVL1389:
 	.loc 2 1868 0
 	bl	FlashReadPages
-.LVL1388:
+.LVL1390:
 	.loc 2 1881 0
 	ldr	r2, [r6]
 	ldr	r1, [r2, r5]
 	adds	r3, r2, r5
 	adds	r1, r1, #1
-	bne	.L1178
-.LVL1389:
-.L1179:
+	bne	.L1179
+.LVL1391:
+.L1180:
 	.loc 2 1913 0
 	mov	r3, #-1
 	.loc 2 1914 0
@@ -14583,67 +14610,67 @@ FtlRecoverySuperblock:
 	str	r3, [sp, #36]
 	.loc 2 1914 0
 	bl	decrement_vpc_count
-.LVL1390:
-.L1187:
-.LBE269:
+.LVL1392:
+.L1188:
+.LBE273:
 	.loc 2 1954 0
 	ldr	r7, [sp, #36]
 	adds	r0, r7, #1
-	beq	.L1169
-.L1200:
+	beq	.L1170
+.L1201:
 	.loc 2 1956 0
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-.LVL1391:
+.LVL1393:
 	.loc 2 1957 0
-	ldr	r3, .L1266+28
+	ldr	r3, .L1267+28
 	.loc 2 1956 0
 	mov	r4, r0
-.LVL1392:
+.LVL1394:
 	.loc 2 1957 0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bhi	.L1192
+	bhi	.L1193
 	.loc 2 1957 0 is_stmt 0 discriminator 1
 	movw	r2, #1957
-	ldr	r1, .L1266+32
-	ldr	r0, .L1266+36
-.LVL1393:
+	ldr	r1, .L1267+32
+	ldr	r0, .L1267+36
+.LVL1395:
 	bl	printf
-.LVL1394:
-.L1192:
+.LVL1396:
+.L1193:
 	.loc 2 1958 0 is_stmt 1
-	ldr	r3, .L1266+40
+	ldr	r3, .L1267+40
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
 	cmp	r3, #0
-	beq	.L1193
+	beq	.L1194
 	.loc 2 1960 0
 	mov	r0, r4
-	b	.L1260
-.LVL1395:
-.L1177:
-.LBB270:
+	b	.L1261
+.LVL1397:
+.L1178:
+.LBB274:
 	.loc 2 1872 0
 	ldr	r3, [sp, #44]
 	ldr	r2, [sp, #40]
 	cmp	r2, r3
-	bne	.L1180
+	bne	.L1181
 	.loc 2 1873 0
 	movs	r2, #1
 	add	r1, sp, #36
 	mov	r0, r4
 	bl	log2phys
-.LVL1396:
-	b	.L1180
-.LVL1397:
-.L1178:
+.LVL1398:
+	b	.L1181
+.LVL1399:
+.L1179:
 	.loc 2 1881 0 discriminator 1
 	ldr	r1, [r7, #8]
 	cmp	r4, r1
-	bne	.L1179
+	bne	.L1180
 	.loc 2 1882 0 discriminator 2
-	ldr	r0, .L1266
+	ldr	r0, .L1267
 	.loc 2 1869 0 discriminator 2
 	ldr	r1, [r7, #4]
 	.loc 2 1882 0 discriminator 2
@@ -14652,31 +14679,31 @@ FtlRecoverySuperblock:
 	str	r1, [sp, #28]
 	.loc 2 1882 0 discriminator 2
 	bl	ftl_cmp_data_ver
-.LVL1398:
+.LVL1400:
 	.loc 2 1881 0 discriminator 2
 	cmp	r0, #0
-	beq	.L1179
+	beq	.L1180
 	.loc 2 1883 0
 	ldr	r1, [sp, #40]
 	ldr	r0, [sp, #44]
 	cmp	r1, r0
-	bne	.L1182
-.L1185:
+	bne	.L1183
+.L1186:
 	.loc 2 1909 0
 	ldr	r1, [sp, #36]
 	mov	r0, r4
 	bl	FtlReUsePrevPpa
-.LVL1399:
-	b	.L1179
-.L1182:
+.LVL1401:
+	b	.L1180
+.L1183:
 	.loc 2 1886 0
 	ldr	r0, [sp, #36]
 	cmp	r1, r0
-	beq	.L1179
+	beq	.L1180
 	.loc 2 1887 0
 	adds	r0, r1, #1
-	beq	.L1183
-.LVL1400:
+	beq	.L1184
+.LVL1402:
 	.loc 2 1889 0
 	str	r1, [r3, #4]
 	.loc 2 1890 0
@@ -14687,41 +14714,41 @@ FtlRecoverySuperblock:
 	ldr	r7, [r3, #12]
 	.loc 2 1890 0
 	bl	FlashReadPages
-.LVL1401:
-.L1184:
+.LVL1403:
+.L1185:
 	.loc 2 1895 0
 	ldr	r3, [r6]
 	ldr	r3, [r3, r5]
 	adds	r3, r3, #1
-	beq	.L1185
+	beq	.L1186
 	.loc 2 1896 0
 	ldr	r3, [r7, #4]
-.LVL1402:
+.LVL1404:
 	.loc 2 1897 0
-	ldr	r2, .L1266
+	ldr	r2, .L1267
 	mov	r1, r3
 	ldr	r0, [r2]
 	bl	ftl_cmp_data_ver
-.LVL1403:
+.LVL1405:
 	cmp	r0, #0
-	beq	.L1185
+	beq	.L1186
 	.loc 2 1898 0
 	mov	r1, r3
 	ldr	r0, [sp, #28]
 	bl	ftl_cmp_data_ver
-.LVL1404:
-	cmp	r0, #0
-	beq	.L1179
-.LVL1405:
-	b	.L1185
 .LVL1406:
-.L1183:
+	cmp	r0, #0
+	beq	.L1180
+.LVL1407:
+	b	.L1186
+.LVL1408:
+.L1184:
 	.loc 2 1892 0
 	str	r1, [r2, r5]
-	b	.L1184
-.L1267:
+	b	.L1185
+.L1268:
 	.align	2
-.L1266:
+.L1267:
 	.word	.LANCHOR154
 	.word	.LANCHOR162
 	.word	.LANCHOR144
@@ -14733,55 +14760,55 @@ FtlRecoverySuperblock:
 	.word	.LANCHOR161
 	.word	.LC1
 	.word	.LANCHOR43
-.LVL1407:
-.L1176:
-.LBE270:
+.LVL1409:
+.L1177:
+.LBE274:
 	.loc 2 1915 0
 	ldr	r3, [sp, #44]
 	ldr	r2, [sp, #40]
 	cmp	r2, r3
-	beq	.L1187
+	beq	.L1188
 	.loc 2 1917 0
 	movs	r2, #1
 	add	r1, sp, #44
 	mov	r0, r4
 	bl	log2phys
-.LVL1408:
+.LVL1410:
 	.loc 2 1918 0
 	ldr	r7, [sp, #40]
 	adds	r5, r7, #1
-	beq	.L1187
+	beq	.L1188
 	.loc 2 1918 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #36]
 	cmp	r7, r3
-	beq	.L1200
+	beq	.L1201
 	.loc 2 1919 0 is_stmt 1
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-.LVL1409:
+.LVL1411:
 	.loc 2 1921 0
-	ldr	r3, .L1268
+	ldr	r3, .L1269
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L1191
+	beq	.L1192
 	.loc 2 1922 0 discriminator 1
-	ldr	r3, .L1268+4
+	ldr	r3, .L1269+4
 	.loc 2 1921 0 discriminator 1
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L1191
+	beq	.L1192
 	.loc 2 1923 0
-	ldr	r3, .L1268+8
+	ldr	r3, .L1269+8
 	.loc 2 1922 0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L1187
-.L1191:
-.LVL1410:
-.LBB271:
+	bne	.L1188
+.L1192:
+.LVL1412:
+.LBB275:
 	.loc 2 1927 0
 	ldr	r0, [r6]
-.LVL1411:
+.LVL1413:
 	.loc 2 1930 0
 	movs	r2, #0
 	movs	r1, #1
@@ -14789,80 +14816,80 @@ FtlRecoverySuperblock:
 	str	r7, [r0, #4]
 	.loc 2 1927 0
 	ldr	r5, [r0, #12]
-.LVL1412:
+.LVL1414:
 	.loc 2 1930 0
 	bl	FlashReadPages
-.LVL1413:
+.LVL1415:
 	.loc 2 1933 0
 	ldr	r3, [r6]
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L1187
+	beq	.L1188
 	.loc 2 1934 0
 	ldr	r1, [r5, #4]
 	ldr	r0, [sp]
 	bl	ftl_cmp_data_ver
-.LVL1414:
+.LVL1416:
 	cmp	r0, #0
-	bne	.L1187
+	bne	.L1188
 	.loc 2 1941 0
 	movs	r2, #1
 	add	r1, sp, #40
-.LVL1415:
+.LVL1417:
 	mov	r0, r4
 	bl	log2phys
-.LVL1416:
-	b	.L1187
-.LVL1417:
-.L1193:
-.LBE271:
+.LVL1418:
+	b	.L1188
+.LVL1419:
+.L1194:
+.LBE275:
 	.loc 2 1962 0
 	mov	r1, r4
-	ldr	r0, .L1268+12
+	ldr	r0, .L1269+12
 	bl	printf
-.LVL1418:
-	b	.L1169
-.LVL1419:
-.L1173:
+.LVL1420:
+	b	.L1170
+.LVL1421:
+.L1174:
 	.loc 2 1969 0
-	ldr	r3, .L1268+16
+	ldr	r3, .L1269+16
 	ldr	r3, [r3]
 	cmp	r3, #31
-	bhi	.L1194
+	bhi	.L1195
 	.loc 2 1970 0
-	ldr	r2, .L1268+20
+	ldr	r2, .L1269+20
 	str	r4, [r2, r3, lsl #2]
 	.loc 2 1971 0
 	adds	r3, r3, #1
-	ldr	r2, .L1268+16
+	ldr	r2, .L1269+16
 	str	r3, [r2]
-.L1194:
+.L1195:
 	.loc 2 1973 0
 	ldrh	r0, [r8]
-.LVL1420:
+.LVL1422:
 	bl	decrement_vpc_count
-.LVL1421:
+.LVL1423:
 	.loc 2 1975 0
-	ldr	r3, .L1268+24
+	ldr	r3, .L1269+24
 	ldr	r2, [r3]
 	adds	r1, r2, #1
-	bne	.L1195
+	bne	.L1196
 	.loc 2 1976 0
 	ldr	r2, [sp]
-.L1259:
+.L1260:
 	.loc 2 1978 0
 	str	r2, [r3]
-	b	.L1169
-.L1195:
+	b	.L1170
+.L1196:
 	.loc 2 1977 0
 	ldr	r1, [sp]
 	cmp	r1, r2
-	bcs	.L1169
+	bcs	.L1170
 	.loc 2 1978 0
 	mov	r2, r1
-	b	.L1259
-.LVL1422:
-.L1172:
+	b	.L1260
+.LVL1424:
+.L1173:
 	.loc 2 2002 0
 	strb	r10, [r8, #6]
 	.loc 2 2004 0
@@ -14871,10 +14898,10 @@ FtlRecoverySuperblock:
 	strh	fp, [r8, #2]	@ movhi
 	.loc 2 2004 0
 	mov	r1, fp
-	b	.L1263
-.L1269:
+	b	.L1264
+.L1270:
 	.align	2
-.L1268:
+.L1269:
 	.word	.LANCHOR51
 	.word	.LANCHOR52
 	.word	.LANCHOR53
@@ -14899,7 +14926,7 @@ FtlSuperblockPowerLostFix:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1423:
+.LVL1425:
 	push	{r4, r5, r6, r7, lr}
 	.cfi_def_cfa_offset 20
 	.cfi_offset 4, -20
@@ -14909,28 +14936,28 @@ FtlSuperblockPowerLostFix:
 	.cfi_offset 14, -4
 	mov	r4, r0
 	.loc 2 2169 0
-	ldr	r6, .L1281
+	ldr	r6, .L1282
 	.loc 2 2156 0
 	sub	sp, sp, #28
 	.cfi_def_cfa_offset 48
 	.loc 2 2162 0
 	movs	r5, #7
 	.loc 2 2170 0
-	ldr	r7, .L1281+4
-.LVL1424:
-.L1271:
+	ldr	r7, .L1282+4
+.LVL1426:
+.L1272:
 	.loc 2 2162 0
 	subs	r5, r5, #1
-.LVL1425:
-	beq	.L1273
-.LVL1426:
+.LVL1427:
+	beq	.L1274
+.LVL1428:
 	.loc 2 2163 0
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1272
-.LVL1427:
-.L1273:
+	cbnz	r3, .L1273
+.LVL1429:
+.L1274:
 	.loc 2 2183 0
-	ldr	r3, .L1281+8
+	ldr	r3, .L1282+8
 	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
 	ldr	r2, [r3]
@@ -14938,7 +14965,7 @@ FtlSuperblockPowerLostFix:
 	subs	r3, r3, r0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
 	.loc 2 2184 0
-	ldr	r3, .L1281+12
+	ldr	r3, .L1282+12
 	ldrh	r3, [r3]
 	strh	r3, [r4, #2]	@ movhi
 	.loc 2 2185 0
@@ -14952,17 +14979,17 @@ FtlSuperblockPowerLostFix:
 	.cfi_def_cfa_offset 20
 	@ sp needed
 	pop	{r4, r5, r6, r7, pc}
-.LVL1428:
-.L1272:
+.LVL1430:
+.L1273:
 	.cfi_restore_state
 	.loc 2 2165 0
 	mov	r0, r4
 	bl	get_new_active_ppa
-.LVL1429:
+.LVL1431:
 	str	r0, [sp, #8]
 	.loc 2 2166 0
 	adds	r0, r0, #1
-	beq	.L1273
+	beq	.L1274
 	.loc 2 2170 0
 	ldr	r1, [r7]
 	.loc 2 2168 0
@@ -14970,12 +14997,12 @@ FtlSuperblockPowerLostFix:
 	.loc 2 2169 0
 	ldr	r2, [r6]
 	.loc 2 2178 0
-	ldr	r0, .L1281+16
+	ldr	r0, .L1282+16
 	.loc 2 2168 0
 	str	r3, [sp, #20]
 	.loc 2 2170 0
 	str	r1, [sp, #16]
-.LVL1430:
+.LVL1432:
 	.loc 2 2169 0
 	str	r2, [sp, #12]
 	.loc 2 2174 0
@@ -14996,7 +15023,7 @@ FtlSuperblockPowerLostFix:
 	strh	r3, [r1]	@ movhi
 	.loc 2 2178 0
 	adds	r1, r2, #1
-.LVL1431:
+.LVL1433:
 	it	eq
 	moveq	r2, r3
 	.loc 2 2179 0
@@ -15007,15 +15034,15 @@ FtlSuperblockPowerLostFix:
 	mov	r2, r3
 	add	r0, sp, #4
 	bl	FlashProgPages
-.LVL1432:
+.LVL1434:
 	.loc 2 2180 0
 	ldrh	r0, [r4]
 	bl	decrement_vpc_count
-.LVL1433:
-	b	.L1271
-.L1282:
+.LVL1435:
+	b	.L1272
+.L1283:
 	.align	2
-.L1281:
+.L1282:
 	.word	.LANCHOR39
 	.word	.LANCHOR109
 	.word	.LANCHOR43
@@ -15049,34 +15076,34 @@ FtlLoadBbt:
 	.cfi_offset 10, -8
 	.cfi_offset 14, -4
 	.loc 4 180 0
-	ldr	r8, .L1312+40
-	ldr	r4, .L1312
+	ldr	r8, .L1313+40
+	ldr	r4, .L1313
 	ldr	r3, [r8]
 	.loc 4 184 0
-	ldr	r7, .L1312+4
+	ldr	r7, .L1313+4
 	.loc 4 186 0
 	mov	r10, r4
 	.loc 4 180 0
 	str	r3, [r4, #8]
 	.loc 4 181 0
-	ldr	r3, .L1312+8
+	ldr	r3, .L1313+8
 	ldr	r6, [r3]
 	str	r6, [r4, #12]
-.LVL1434:
+.LVL1436:
 	.loc 4 183 0
 	bl	FtlBbtMemInit
-.LVL1435:
+.LVL1437:
 	.loc 4 184 0
 	ldrh	r5, [r7]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.LVL1436:
-.L1284:
+.LVL1438:
+.L1285:
 	.loc 4 184 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r7]
 	subs	r3, r3, #15
 	cmp	r3, r5
-	bgt	.L1287
+	bgt	.L1288
 	.loc 4 185 0 is_stmt 1
 	lsls	r3, r5, #10
 	.loc 4 186 0
@@ -15087,11 +15114,11 @@ FtlLoadBbt:
 	str	r3, [r4, #4]
 	.loc 4 186 0
 	bl	FlashReadPages
-.LVL1437:
+.LVL1439:
 	.loc 4 187 0
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	bne	.L1285
+	bne	.L1286
 	.loc 4 188 0
 	ldr	r3, [r4, #4]
 	.loc 4 189 0
@@ -15103,19 +15130,19 @@ FtlLoadBbt:
 	str	r3, [r4, #4]
 	.loc 4 189 0
 	bl	FlashReadPages
-.LVL1438:
-.L1285:
+.LVL1440:
+.L1286:
 	.loc 4 191 0
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L1286
+	beq	.L1287
 	.loc 4 196 0
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L1286
+	bne	.L1287
 	.loc 4 198 0
-	ldr	r3, .L1312+12
+	ldr	r3, .L1313+12
 	.loc 4 199 0
 	ldr	r2, [r6, #4]
 	.loc 4 198 0
@@ -15125,43 +15152,43 @@ FtlLoadBbt:
 	.loc 4 200 0
 	ldrh	r2, [r6, #8]
 	strh	r2, [r3, #4]	@ movhi
-.L1287:
+.L1288:
 	.loc 4 216 0
-	ldr	r5, .L1312+12
-.LVL1439:
+	ldr	r5, .L1313+12
+.LVL1441:
 	movw	r2, #65535
 	ldrh	r3, [r5]
 	cmp	r3, r2
-	beq	.L1301
+	beq	.L1302
 	.loc 4 222 0
 	ldrh	r3, [r5, #4]
 	cmp	r3, r2
-	beq	.L1291
+	beq	.L1292
 	.loc 4 224 0
 	lsls	r3, r3, #10
 	.loc 4 225 0
 	movs	r2, #1
 	mov	r1, r2
-	ldr	r0, .L1312
+	ldr	r0, .L1313
 	.loc 4 224 0
 	str	r3, [r4, #4]
 	.loc 4 225 0
 	bl	FlashReadPages
-.LVL1440:
+.LVL1442:
 	.loc 4 226 0
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L1291
+	beq	.L1292
 	.loc 4 229 0
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L1291
+	bne	.L1292
 	.loc 4 229 0 is_stmt 0 discriminator 1
 	ldr	r3, [r6, #4]
 	ldr	r2, [r5, #8]
 	cmp	r3, r2
-	bls	.L1291
+	bls	.L1292
 	.loc 4 231 0 is_stmt 1
 	ldrh	r2, [r5, #4]
 	.loc 4 232 0
@@ -15172,30 +15199,30 @@ FtlLoadBbt:
 	strh	r2, [r5]	@ movhi
 	.loc 4 233 0
 	strh	r3, [r5, #4]	@ movhi
-.L1291:
+.L1292:
 	.loc 4 245 0
-	ldr	r10, .L1312
+	ldr	r10, .L1313
 	.loc 4 238 0
 	movs	r1, #1
 	ldrh	r0, [r5]
 	bl	FtlGetLastWrittenPage
-.LVL1441:
+.LVL1443:
 	sxth	r7, r0
-.LVL1442:
+.LVL1444:
 	.loc 4 239 0
 	adds	r0, r0, #1
 	strh	r0, [r5, #2]	@ movhi
-.L1293:
+.L1294:
 	.loc 4 241 0
 	cmp	r7, #0
-	bge	.L1296
+	bge	.L1297
 	.loc 4 254 0
 	movs	r2, #254
-	ldr	r1, .L1312+16
-	ldr	r0, .L1312+20
+	ldr	r1, .L1313+16
+	ldr	r0, .L1313+20
 	bl	printf
-.LVL1443:
-.L1295:
+.LVL1445:
+.L1296:
 	.loc 4 255 0
 	ldrh	r3, [r6, #10]
 	.loc 4 257 0
@@ -15205,53 +15232,53 @@ FtlLoadBbt:
 	.loc 4 257 0
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1298
+	beq	.L1299
 	.loc 4 259 0
-	ldr	r3, .L1312+24
+	ldr	r3, .L1313+24
 	ldr	r2, [r3]
 	cmp	r0, r2
-	beq	.L1298
+	beq	.L1299
 	.loc 4 259 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1312+28
+	ldr	r3, .L1313+28
 	ldrh	r3, [r3]
 	lsrs	r3, r3, #2
 	cmp	r2, r3
-	bcs	.L1298
+	bcs	.L1299
 	.loc 4 261 0 is_stmt 1
 	cmp	r0, r3
-	bcs	.L1298
+	bcs	.L1299
 	.loc 4 263 0
 	bl	FtlSysBlkNumInit
-.LVL1444:
-.L1298:
-	ldr	r6, .L1312+32
-.LVL1445:
+.LVL1446:
+.L1299:
+	ldr	r6, .L1313+32
+.LVL1447:
 	.loc 4 173 0 discriminator 1
 	movs	r5, #0
 	.loc 4 268 0 discriminator 1
-	ldr	r7, .L1312+36
-.LVL1446:
+	ldr	r7, .L1313+36
+.LVL1448:
 	.loc 4 269 0 discriminator 1
-	ldr	r8, .L1312+44
-.L1299:
-.LVL1447:
+	ldr	r8, .L1313+44
+.L1300:
+.LVL1449:
 	.loc 4 268 0 discriminator 1
 	ldrh	r3, [r7]
 	cmp	r5, r3
-	bcc	.L1300
+	bcc	.L1301
 	.loc 4 275 0
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.LVL1448:
-.L1286:
+.LVL1450:
+.L1287:
 	.loc 4 184 0 discriminator 2
 	subs	r5, r5, #1
-.LVL1449:
-	uxth	r5, r5
-.LVL1450:
-	b	.L1284
 .LVL1451:
-.L1296:
+	uxth	r5, r5
+.LVL1452:
+	b	.L1285
+.LVL1453:
+.L1297:
 	.loc 4 243 0
 	ldrh	r3, [r5]
 	.loc 4 245 0
@@ -15266,24 +15293,24 @@ FtlLoadBbt:
 	str	r3, [r4, #8]
 	.loc 4 245 0
 	bl	FlashReadPages
-.LVL1452:
+.LVL1454:
 	.loc 4 247 0
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L1294
+	beq	.L1295
 	.loc 4 247 0 is_stmt 0 discriminator 1
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	beq	.L1295
-.L1294:
+	beq	.L1296
+.L1295:
 	subs	r7, r7, #1
-.LVL1453:
-	sxth	r7, r7
-.LVL1454:
-	b	.L1293
 .LVL1455:
-.L1300:
+	sxth	r7, r7
+.LVL1456:
+	b	.L1294
+.LVL1457:
+.L1301:
 	.loc 4 269 0 is_stmt 1 discriminator 3
 	ldrh	r2, [r8]
 	ldr	r1, [r4, #8]
@@ -15292,20 +15319,20 @@ FtlLoadBbt:
 	mla	r1, r5, r2, r1
 	.loc 4 268 0 discriminator 3
 	adds	r5, r5, #1
-.LVL1456:
+.LVL1458:
 	.loc 4 269 0 discriminator 3
 	bl	ftl_memcpy
-.LVL1457:
-	b	.L1299
-.LVL1458:
-.L1301:
+.LVL1459:
+	b	.L1300
+.LVL1460:
+.L1302:
 	.loc 4 218 0
 	mov	r0, #-1
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.LVL1459:
-.L1313:
+.LVL1461:
+.L1314:
 	.align	2
-.L1312:
+.L1313:
 	.word	.LANCHOR108
 	.word	.LANCHOR17
 	.word	.LANCHOR109
@@ -15347,79 +15374,79 @@ FtlMakeBbt:
 	.cfi_offset 14, -4
 	.loc 4 327 0
 	movs	r6, #0
-	ldr	r7, .L1333
+	ldr	r7, .L1334
 	.loc 4 325 0
 	bl	FtlBbtMemInit
-.LVL1460:
+.LVL1462:
 	sub	r8, r7, #18
 	.loc 4 326 0
 	bl	FtlLoadFactoryBbt
-.LVL1461:
-.L1315:
+.LVL1463:
+.L1316:
 	.loc 4 327 0 discriminator 1
-	ldr	r3, .L1333+4
+	ldr	r3, .L1334+4
 	ldrh	r3, [r3]
 	cmp	r6, r3
-	bcc	.L1321
+	bcc	.L1322
 	.loc 4 381 0 discriminator 1
-	ldr	r5, .L1333+8
+	ldr	r5, .L1334+8
 	movs	r4, #0
-.L1322:
+.L1323:
 	ldrh	r3, [r5]
 	uxth	r0, r4
-.LVL1462:
+.LVL1464:
 	adds	r4, r4, #1
 	cmp	r3, r0
-	bhi	.L1323
+	bhi	.L1324
 	.loc 4 387 0
-	ldr	r4, .L1333+12
+	ldr	r4, .L1334+12
 	.loc 4 396 0
 	movw	r6, #65535
-.LVL1463:
+.LVL1465:
 	.loc 4 387 0
 	ldrh	r5, [r4, #12]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.LVL1464:
-.L1324:
+.LVL1466:
+.L1325:
 	.loc 4 387 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r4, #12]
 	subs	r3, r3, #47
 	cmp	r3, r5
-	bgt	.L1328
+	bgt	.L1329
 	.loc 4 389 0 is_stmt 1
 	mov	r0, r5
 	bl	FtlBbmIsBadBlock
-.LVL1465:
+.LVL1467:
 	cmp	r0, #1
-	beq	.L1325
+	beq	.L1326
 	.loc 4 391 0
 	mov	r0, r5
 	bl	FlashTestBlk
-.LVL1466:
+.LVL1468:
 	cmp	r0, #0
-	beq	.L1326
+	beq	.L1327
 	.loc 4 393 0
 	mov	r0, r5
 	bl	FtlBbmMapBadBlock
-.LVL1467:
-.L1325:
+.LVL1469:
+.L1326:
 	.loc 4 387 0 discriminator 2
 	subs	r5, r5, #1
-.LVL1468:
-	uxth	r5, r5
-.LVL1469:
-	b	.L1324
 .LVL1470:
-.L1321:
+	uxth	r5, r5
+.LVL1471:
+	b	.L1325
+.LVL1472:
+.L1322:
 	.loc 4 328 0
-	ldr	r3, .L1333+16
+	ldr	r3, .L1334+16
 	.loc 4 329 0
-	ldr	r5, .L1333+20
+	ldr	r5, .L1334+20
 	.loc 4 331 0
 	ldrh	r2, [r8, #2]!
 	.loc 4 328 0
-	ldr	r4, .L1333+24
+	ldr	r4, .L1334+24
 	ldr	r0, [r3]
 	.loc 4 331 0
 	movw	r3, #65535
@@ -15428,14 +15455,14 @@ FtlMakeBbt:
 	.loc 4 331 0
 	cmp	r2, r3
 	mov	fp, r4
-	ldr	r3, .L1333+28
+	ldr	r3, .L1334+28
 	.loc 4 328 0
 	str	r0, [r4, #8]
 	.loc 4 329 0
 	str	r10, [r4, #12]
-.LVL1471:
+.LVL1473:
 	.loc 4 331 0
-	beq	.L1316
+	beq	.L1317
 	.loc 4 333 0
 	ldrh	r5, [r3]
 	.loc 4 335 0
@@ -15443,7 +15470,7 @@ FtlMakeBbt:
 	.loc 4 333 0
 	str	r3, [sp]
 	mla	r5, r6, r5, r2
-.LVL1472:
+.LVL1474:
 	.loc 4 334 0
 	lsls	r2, r5, #10
 	str	r2, [r4, #4]
@@ -15451,7 +15478,7 @@ FtlMakeBbt:
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL1473:
+.LVL1475:
 	.loc 4 336 0
 	ldr	r3, [sp]
 	ldr	r1, [r4, #8]
@@ -15460,30 +15487,30 @@ FtlMakeBbt:
 	adds	r2, r2, #7
 	asrs	r2, r2, #3
 	bl	ftl_memcpy
-.LVL1474:
-.L1317:
+.LVL1476:
+.L1318:
 	.loc 4 376 0 discriminator 2
 	uxth	r0, r5
 	.loc 4 327 0 discriminator 2
 	adds	r6, r6, #1
-.LVL1475:
+.LVL1477:
 	adds	r7, r7, #4
 	.loc 4 376 0 discriminator 2
 	bl	FtlBbmMapBadBlock
-.LVL1476:
-	b	.L1315
-.LVL1477:
-.L1316:
+.LVL1478:
+	b	.L1316
+.LVL1479:
+.L1317:
 	.loc 4 340 0
 	mov	r1, r6
 	str	r3, [sp]
 	bl	FlashGetBadBlockList
-.LVL1478:
+.LVL1480:
 	.loc 4 341 0
 	ldr	r0, [r4, #8]
 	ldr	r1, [r7]
 	bl	FtlBbt2Bitmap
-.LVL1479:
+.LVL1481:
 	.loc 4 343 0
 	ldr	r3, [sp]
 	.loc 4 350 0
@@ -15492,17 +15519,17 @@ FtlMakeBbt:
 	ldrh	r4, [r3]
 	subs	r4, r4, #1
 	uxth	r4, r4
-.LVL1480:
-.L1318:
+.LVL1482:
+.L1319:
 	.loc 4 345 0
 	ldr	r3, [sp]
 	ldrh	r0, [r3]
 	smlabb	r0, r0, r6, r4
 	uxth	r0, r0
 	bl	FtlBbmIsBadBlock
-.LVL1481:
+.LVL1483:
 	cmp	r0, #1
-	beq	.L1319
+	beq	.L1320
 	.loc 4 350 0
 	ldr	r3, [sp, #4]
 	movs	r2, #16
@@ -15512,14 +15539,14 @@ FtlMakeBbt:
 	.loc 4 350 0
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL1482:
+.LVL1484:
 	.loc 4 351 0
-	ldr	r3, .L1333+16
+	ldr	r3, .L1334+16
 	mov	r2, #4096
 	movs	r1, #0
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL1483:
+.LVL1485:
 	.loc 4 355 0
 	ldr	r2, [sp]
 	.loc 4 352 0
@@ -15539,71 +15566,71 @@ FtlMakeBbt:
 	strh	r3, [r10, #2]	@ movhi
 	.loc 4 355 0
 	mla	r5, r6, r5, r3
-.LVL1484:
+.LVL1486:
 	.loc 4 356 0
 	lsls	r3, r5, #10
 	str	r3, [fp, #4]
 	.loc 4 357 0
-	ldr	r3, .L1333+32
+	ldr	r3, .L1334+32
 	ldrh	r2, [r3]
 	lsls	r2, r2, #2
 	bl	ftl_memcpy
-.LVL1485:
+.LVL1487:
 	.loc 4 358 0
 	movs	r2, #1
-	ldr	r0, .L1333+24
+	ldr	r0, .L1334+24
 	mov	r1, r2
 	bl	FlashEraseBlocks
-.LVL1486:
+.LVL1488:
 	.loc 4 359 0
 	movs	r3, #1
-	ldr	r0, .L1333+24
+	ldr	r0, .L1334+24
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL1487:
+.LVL1489:
 	.loc 4 360 0
 	ldr	r3, [fp]
 	adds	r3, r3, #1
-	bne	.L1317
+	bne	.L1318
 	.loc 4 362 0
 	uxth	r0, r5
 	bl	FtlBbmMapBadBlock
-.LVL1488:
+.LVL1490:
 	.loc 4 363 0
-	b	.L1318
-.LVL1489:
-.L1319:
+	b	.L1319
+.LVL1491:
+.L1320:
 	.loc 4 347 0
 	subs	r4, r4, #1
-.LVL1490:
-	uxth	r4, r4
-.LVL1491:
-	b	.L1318
 .LVL1492:
-.L1323:
-	.loc 4 383 0 discriminator 3
-	bl	FtlBbmMapBadBlock
+	uxth	r4, r4
 .LVL1493:
-	b	.L1322
+	b	.L1319
 .LVL1494:
-.L1326:
+.L1324:
+	.loc 4 383 0 discriminator 3
+	bl	FtlBbmMapBadBlock
+.LVL1495:
+	b	.L1323
+.LVL1496:
+.L1327:
 	.loc 4 396 0
 	ldrh	r3, [r4]
 	cmp	r3, r6
-	bne	.L1327
+	bne	.L1328
 	.loc 4 398 0
 	strh	r5, [r4]	@ movhi
-	b	.L1325
-.L1327:
+	b	.L1326
+.L1328:
 	.loc 4 402 0
 	strh	r5, [r4, #4]	@ movhi
-.L1328:
+.L1329:
 	.loc 4 414 0
-	ldr	r3, .L1333+36
+	ldr	r3, .L1334+36
 	.loc 4 411 0
 	movs	r5, #0
-.LVL1495:
+.LVL1497:
 	.loc 4 413 0
 	str	r5, [r4, #8]
 	.loc 4 416 0
@@ -15622,18 +15649,18 @@ FtlMakeBbt:
 	str	r3, [r0, #24]
 	.loc 4 416 0
 	bl	FlashEraseBlocks
-.LVL1496:
+.LVL1498:
 	.loc 4 418 0
 	ldrh	r0, [r4]
 	bl	FtlBbmMapBadBlock
-.LVL1497:
+.LVL1499:
 	.loc 4 419 0
 	ldrh	r0, [r4, #4]
 	bl	FtlBbmMapBadBlock
-.LVL1498:
+.LVL1500:
 	.loc 4 421 0
 	bl	FtlBbmTblFlush
-.LVL1499:
+.LVL1501:
 	.loc 4 422 0
 	ldr	r3, [r4, #8]
 	.loc 4 425 0
@@ -15645,23 +15672,23 @@ FtlMakeBbt:
 	str	r3, [r4, #8]
 	.loc 4 424 0
 	ldrh	r3, [r4]
-.LVL1500:
+.LVL1502:
 	.loc 4 425 0
 	strh	r2, [r4]	@ movhi
 	.loc 4 427 0
 	strh	r3, [r4, #4]	@ movhi
 	.loc 4 429 0
 	bl	FtlBbmTblFlush
-.LVL1501:
+.LVL1503:
 	.loc 4 432 0
 	mov	r0, r5
 	add	sp, sp, #8
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1334:
+.L1335:
 	.align	2
-.L1333:
+.L1334:
 	.word	.LANCHOR37+28
 	.word	.LANCHOR10
 	.word	.LANCHOR25
@@ -15689,9 +15716,9 @@ FtlVendorPartWrite:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1502:
+.LVL1504:
 	.loc 2 794 0
-	ldr	r3, .L1347
+	ldr	r3, .L1348
 	.loc 2 786 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
@@ -15709,78 +15736,78 @@ FtlVendorPartWrite:
 	str	r2, [sp]
 	.loc 2 794 0
 	adds	r2, r0, r1
-.LVL1503:
+.LVL1505:
 	.loc 2 786 0
 	mov	r7, r0
 	mov	r5, r1
 	.loc 2 794 0
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1343
+	bhi	.L1344
 	.loc 2 791 0
-	ldr	r3, .L1347+4
+	ldr	r3, .L1348+4
 	mov	r8, #0
 	ldrh	r6, [r3]
 	lsr	r6, r0, r6
 	lsl	fp, r6, #2
-.LVL1504:
-.L1337:
+.LVL1506:
+.L1338:
 	.loc 2 797 0
-	cbnz	r5, .L1342
-.LVL1505:
-.L1335:
+	cbnz	r5, .L1343
+.LVL1507:
+.L1336:
 	.loc 2 820 0
 	mov	r0, r8
 	add	sp, sp, #104
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
-.LVL1506:
+.LVL1508:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1507:
-.L1342:
+.LVL1509:
+.L1343:
 	.cfi_restore_state
 	.loc 2 798 0
-	ldr	r3, .L1347+8
+	ldr	r3, .L1348+8
 	.loc 2 799 0
 	mov	r0, r7
-	ldr	r10, .L1347+24
+	ldr	r10, .L1348+24
 	.loc 2 798 0
 	ldr	r3, [r3]
 	ldr	r2, [r3, fp]
 	.loc 2 799 0
-	ldr	r3, .L1347+12
+	ldr	r3, .L1348+12
 	.loc 2 798 0
 	str	r2, [sp, #12]
-.LVL1508:
+.LVL1510:
 	.loc 2 799 0
 	ldrh	r3, [r3]
 	mov	r1, r3
 	str	r3, [sp, #8]
 	bl	__aeabi_uidivmod
-.LVL1509:
+.LVL1511:
 	.loc 2 800 0
 	ldr	r3, [sp, #8]
 	.loc 2 801 0
 	ldr	r2, [sp, #12]
 	.loc 2 799 0
 	str	r1, [sp, #4]
-.LVL1510:
+.LVL1512:
 	.loc 2 800 0
 	subs	r4, r3, r1
 	uxth	r4, r4
-.LVL1511:
+.LVL1513:
 	.loc 2 801 0
 	cmp	r5, r4
 	.loc 2 802 0
 	it	cc
 	uxthcc	r4, r5
-.LVL1512:
+.LVL1514:
 	.loc 2 803 0
-	cbz	r2, .L1339
+	cbz	r2, .L1340
 	.loc 2 803 0 is_stmt 0 discriminator 1
 	cmp	r4, r3
-	beq	.L1339
+	beq	.L1340
 	.loc 2 805 0 is_stmt 1
 	ldr	r3, [r10]
 	.loc 2 807 0
@@ -15797,69 +15824,69 @@ FtlVendorPartWrite:
 	str	r3, [sp, #32]
 	.loc 2 807 0
 	bl	FlashReadPages
-.LVL1513:
-.L1340:
+.LVL1515:
+.L1341:
 	.loc 2 811 0
 	lsls	r3, r4, #9
 	ldr	r0, [r10]
 	.loc 2 815 0
 	subs	r5, r5, r4
-.LVL1514:
+.LVL1516:
 	.loc 2 811 0
 	mov	r2, r3
 	str	r3, [sp, #8]
 	ldm	sp, {r1, r3}
 	.loc 2 816 0
 	add	r7, r7, r4
-.LVL1515:
+.LVL1517:
 	add	fp, fp, #4
 	.loc 2 811 0
 	add	r0, r0, r3, lsl #9
 	bl	ftl_memcpy
-.LVL1516:
+.LVL1518:
 	.loc 2 812 0
 	ldr	r2, [r10]
 	mov	r1, r6
-	ldr	r0, .L1347+16
+	ldr	r0, .L1348+16
 	.loc 2 814 0
 	adds	r6, r6, #1
-.LVL1517:
+.LVL1519:
 	.loc 2 812 0
 	bl	FtlMapWritePage
-.LVL1518:
+.LVL1520:
 	.loc 2 817 0
 	ldr	r3, [sp]
 	.loc 2 813 0
 	adds	r0, r0, #1
 	it	eq
 	moveq	r8, #-1
-.LVL1519:
+.LVL1521:
 	.loc 2 817 0
 	mov	r2, r3
 	ldr	r3, [sp, #8]
 	add	r2, r2, r3
 	str	r2, [sp]
-.LVL1520:
-	b	.L1337
-.LVL1521:
-.L1339:
+.LVL1522:
+	b	.L1338
+.LVL1523:
+.L1340:
 	.loc 2 809 0
-	ldr	r3, .L1347+20
+	ldr	r3, .L1348+20
 	movs	r1, #0
 	ldr	r0, [r10]
 	ldrh	r2, [r3]
-.LVL1522:
-	bl	ftl_memset
-.LVL1523:
-	b	.L1340
 .LVL1524:
-.L1343:
+	bl	ftl_memset
+.LVL1525:
+	b	.L1341
+.LVL1526:
+.L1344:
 	.loc 2 795 0
 	mov	r8, #-1
-	b	.L1335
-.L1348:
+	b	.L1336
+.L1349:
 	.align	2
-.L1347:
+.L1348:
 	.word	.LANCHOR16
 	.word	.LANCHOR22
 	.word	.LANCHOR133
@@ -15886,76 +15913,76 @@ Ftl_save_ext_data:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	.loc 2 2111 0
-	ldr	r2, .L1351
-	ldr	r3, .L1351+4
+	ldr	r2, .L1352
+	ldr	r3, .L1352+4
 	ldr	r1, [r2]
 	cmp	r1, r3
-	bne	.L1349
-.LBB274:
-.LBB275:
+	bne	.L1350
+.LBB278:
+.LBB279:
 	.loc 2 2112 0
-	ldr	r3, .L1351+8
+	ldr	r3, .L1352+8
 	.loc 2 2125 0
 	movs	r1, #1
 	movs	r0, #0
 	.loc 2 2112 0
 	str	r3, [r2, #4]
 	.loc 2 2113 0
-	ldr	r3, .L1351+12
+	ldr	r3, .L1352+12
 	ldr	r3, [r3]
 	str	r3, [r2, #88]
 	.loc 2 2114 0
-	ldr	r3, .L1351+16
+	ldr	r3, .L1352+16
 	ldr	r3, [r3]
 	str	r3, [r2, #92]
 	.loc 2 2115 0
-	ldr	r3, .L1351+20
+	ldr	r3, .L1352+20
 	ldr	r3, [r3]
 	str	r3, [r2, #8]
 	.loc 2 2116 0
-	ldr	r3, .L1351+24
+	ldr	r3, .L1352+24
 	ldr	r3, [r3]
 	str	r3, [r2, #12]
 	.loc 2 2117 0
-	ldr	r3, .L1351+28
+	ldr	r3, .L1352+28
 	ldr	r3, [r3]
 	str	r3, [r2, #16]
 	.loc 2 2118 0
-	ldr	r3, .L1351+32
+	ldr	r3, .L1352+32
 	ldr	r3, [r3]
 	str	r3, [r2, #20]
 	.loc 2 2119 0
-	ldr	r3, .L1351+36
+	ldr	r3, .L1352+36
 	ldr	r3, [r3]
 	str	r3, [r2, #28]
 	.loc 2 2120 0
-	ldr	r3, .L1351+40
+	ldr	r3, .L1352+40
 	ldr	r3, [r3]
 	str	r3, [r2, #32]
 	.loc 2 2121 0
-	ldr	r3, .L1351+44
+	ldr	r3, .L1352+44
 	ldr	r3, [r3]
 	str	r3, [r2, #36]
 	.loc 2 2122 0
-	ldr	r3, .L1351+48
+	ldr	r3, .L1352+48
 	ldr	r3, [r3]
 	str	r3, [r2, #40]
 	.loc 2 2123 0
-	ldr	r3, .L1351+52
+	ldr	r3, .L1352+52
 	ldr	r3, [r3]
 	str	r3, [r2, #44]
 	.loc 2 2124 0
-	ldr	r3, .L1351+56
+	ldr	r3, .L1352+56
 	ldr	r3, [r3]
 	str	r3, [r2, #48]
 	.loc 2 2125 0
 	b	FtlVendorPartWrite
-.LVL1525:
-.L1349:
+.LVL1527:
+.L1350:
 	bx	lr
-.L1352:
+.L1353:
 	.align	2
-.L1351:
+.L1352:
 	.word	.LANCHOR83
 	.word	1179929683
 	.word	1342177344
@@ -15971,8 +15998,8 @@ Ftl_save_ext_data:
 	.word	.LANCHOR66
 	.word	.LANCHOR77
 	.word	.LANCHOR78
-.LBE275:
-.LBE274:
+.LBE279:
+.LBE278:
 	.cfi_endproc
 .LFE289:
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
@@ -15990,9 +16017,9 @@ FtlEctTblFlush:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1526:
+.LVL1528:
 	.loc 2 864 0
-	ldr	r2, .L1358
+	ldr	r2, .L1359
 	.loc 2 861 0
 	push	{r3, lr}
 	.cfi_def_cfa_offset 8
@@ -16008,23 +16035,23 @@ FtlEctTblFlush:
 	movhi	r3, #32
 	.loc 2 865 0
 	strhls	r3, [r2]	@ movhi
-.LVL1527:
+.LVL1529:
 	.loc 2 866 0
 	movls	r3, #1
-.LVL1528:
-	ldr	r2, .L1358+4
+.LVL1530:
+	ldr	r2, .L1359+4
 	.loc 2 868 0
-	cbnz	r0, .L1355
+	cbnz	r0, .L1356
 	.loc 2 868 0 is_stmt 0 discriminator 1
 	ldr	r1, [r2]
 	ldr	r0, [r1, #20]
-.LVL1529:
+.LVL1531:
 	ldr	r1, [r1, #16]
 	add	r3, r3, r0
-.LVL1530:
+.LVL1532:
 	cmp	r1, r3
-	bcc	.L1356
-.L1355:
+	bcc	.L1357
+.L1356:
 	.loc 2 870 0 is_stmt 1
 	ldr	r2, [r2]
 	.loc 2 875 0
@@ -16033,10 +16060,10 @@ FtlEctTblFlush:
 	ldr	r3, [r2, #16]
 	str	r3, [r2, #20]
 	.loc 2 871 0
-	ldr	r3, .L1358+8
+	ldr	r3, .L1359+8
 	str	r3, [r2]
 	.loc 2 872 0
-	ldr	r3, .L1358+12
+	ldr	r3, .L1359+12
 	ldrh	r1, [r3]
 	lsls	r3, r1, #9
 	str	r3, [r2, #12]
@@ -16049,17 +16076,17 @@ FtlEctTblFlush:
 	str	r3, [r2, #4]
 	.loc 2 875 0
 	bl	FtlVendorPartWrite
-.LVL1531:
+.LVL1533:
 	.loc 2 876 0
 	bl	Ftl_save_ext_data
-.LVL1532:
-.L1356:
+.LVL1534:
+.L1357:
 	.loc 2 878 0
 	movs	r0, #0
 	pop	{r3, pc}
-.L1359:
+.L1360:
 	.align	2
-.L1358:
+.L1359:
 	.word	.LANCHOR166
 	.word	.LANCHOR127
 	.word	1112818501
@@ -16081,9 +16108,9 @@ FtlVendorPartRead:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1533:
+.LVL1535:
 	.loc 2 832 0
-	ldr	r3, .L1369
+	ldr	r3, .L1370
 	.loc 2 823 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
@@ -16098,7 +16125,7 @@ FtlVendorPartRead:
 	mov	r8, r2
 	.loc 2 832 0
 	adds	r2, r0, r1
-.LVL1534:
+.LVL1536:
 	.loc 2 823 0
 	sub	sp, sp, #104
 	.cfi_def_cfa_offset 136
@@ -16108,23 +16135,23 @@ FtlVendorPartRead:
 	.loc 2 832 0
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1368
+	bhi	.L1369
 	.loc 2 828 0
-	ldr	r3, .L1369+4
+	ldr	r3, .L1370+4
 	movs	r7, #0
 	.loc 2 842 0
-	ldr	fp, .L1369+16
+	ldr	fp, .L1370+16
 	.loc 2 828 0
 	ldrh	r3, [r3]
 	lsr	r3, r0, r3
 	lsls	r3, r3, #2
 	str	r3, [sp, #4]
-.LVL1535:
-.L1362:
+.LVL1537:
+.L1363:
 	.loc 2 834 0
-	cbnz	r5, .L1367
-.LVL1536:
-.L1360:
+	cbnz	r5, .L1368
+.LVL1538:
+.L1361:
 	.loc 2 857 0
 	mov	r0, r7
 	add	sp, sp, #104
@@ -16132,11 +16159,11 @@ FtlVendorPartRead:
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1537:
-.L1367:
+.LVL1539:
+.L1368:
 	.cfi_restore_state
 	.loc 2 835 0
-	ldr	r3, .L1369+8
+	ldr	r3, .L1370+8
 	.loc 2 836 0
 	mov	r0, r6
 	.loc 2 835 0
@@ -16144,15 +16171,15 @@ FtlVendorPartRead:
 	ldr	r3, [r3]
 	ldr	r3, [r3, r2]
 	.loc 2 836 0
-	ldr	r2, .L1369+12
+	ldr	r2, .L1370+12
 	.loc 2 835 0
 	str	r3, [sp, #12]
-.LVL1538:
+.LVL1540:
 	.loc 2 836 0
 	ldrh	r4, [r2]
 	mov	r1, r4
 	bl	__aeabi_uidivmod
-.LVL1539:
+.LVL1541:
 	.loc 2 837 0
 	subs	r4, r4, r1
 	.loc 2 838 0
@@ -16161,16 +16188,16 @@ FtlVendorPartRead:
 	uxth	r4, r4
 	.loc 2 836 0
 	str	r1, [sp, #8]
-.LVL1540:
+.LVL1542:
 	.loc 2 838 0
 	cmp	r5, r4
 	.loc 2 839 0
 	it	cc
 	uxthcc	r4, r5
-.LVL1541:
+.LVL1543:
 	lsl	r10, r4, #9
 	.loc 2 840 0
-	cbz	r3, .L1364
+	cbz	r3, .L1365
 	.loc 2 841 0
 	str	r3, [sp, #24]
 	.loc 2 844 0
@@ -16187,7 +16214,7 @@ FtlVendorPartRead:
 	str	r3, [sp, #32]
 	.loc 2 844 0
 	bl	FlashReadPages
-.LVL1542:
+.LVL1544:
 	.loc 2 845 0
 	ldr	r3, [sp, #20]
 	.loc 2 847 0
@@ -16201,42 +16228,42 @@ FtlVendorPartRead:
 	.loc 2 846 0
 	it	eq
 	moveq	r7, #-1
-.LVL1543:
+.LVL1545:
 	.loc 2 847 0
 	add	r1, r1, r3, lsl #9
 	bl	ftl_memcpy
-.LVL1544:
-.L1366:
+.LVL1546:
+.L1367:
 	ldr	r3, [sp, #4]
 	.loc 2 852 0
 	subs	r5, r5, r4
-.LVL1545:
+.LVL1547:
 	.loc 2 853 0
 	add	r6, r6, r4
-.LVL1546:
+.LVL1548:
 	.loc 2 854 0
 	add	r8, r8, r10
-.LVL1547:
+.LVL1549:
 	adds	r3, r3, #4
 	str	r3, [sp, #4]
-	b	.L1362
-.LVL1548:
-.L1364:
+	b	.L1363
+.LVL1550:
+.L1365:
 	.loc 2 849 0
 	mov	r2, r10
 	mov	r1, r3
 	mov	r0, r8
 	bl	ftl_memset
-.LVL1549:
-	b	.L1366
-.LVL1550:
-.L1368:
+.LVL1551:
+	b	.L1367
+.LVL1552:
+.L1369:
 	.loc 2 833 0
 	mov	r7, #-1
-	b	.L1360
-.L1370:
+	b	.L1361
+.L1371:
 	.align	2
-.L1369:
+.L1370:
 	.word	.LANCHOR16
 	.word	.LANCHOR22
 	.word	.LANCHOR133
@@ -16267,41 +16294,41 @@ FtlLoadEctTbl:
 	.cfi_offset 14, -4
 	.loc 2 1335 0
 	movs	r0, #64
-	ldr	r4, .L1373
-	ldr	r5, .L1373+4
+	ldr	r4, .L1374
+	ldr	r5, .L1374+4
 	ldr	r2, [r4]
 	ldrh	r1, [r5]
 	bl	FtlVendorPartRead
-.LVL1551:
+.LVL1553:
 	.loc 2 1336 0
 	ldr	r3, [r4]
 	ldr	r2, [r3]
-	ldr	r3, .L1373+8
+	ldr	r3, .L1374+8
 	cmp	r2, r3
-	beq	.L1372
-.LBB278:
-.LBB279:
+	beq	.L1373
+.LBB282:
+.LBB283:
 	.loc 2 1338 0
-	ldr	r1, .L1373+12
-	ldr	r0, .L1373+16
+	ldr	r1, .L1374+12
+	ldr	r0, .L1374+16
 	bl	printf
-.LVL1552:
+.LVL1554:
 	.loc 2 1339 0
 	ldrh	r2, [r5]
 	movs	r1, #0
 	ldr	r0, [r4]
 	lsls	r2, r2, #9
 	bl	ftl_memset
-.LVL1553:
-.L1372:
-.LBE279:
-.LBE278:
+.LVL1555:
+.L1373:
+.LBE283:
+.LBE282:
 	.loc 2 1344 0
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L1374:
+.L1375:
 	.align	2
-.L1373:
+.L1374:
 	.word	.LANCHOR127
 	.word	.LANCHOR125
 	.word	1112818501
@@ -16332,55 +16359,55 @@ Ftl_load_ext_data:
 	.cfi_offset 14, -4
 	.loc 2 2131 0
 	movs	r1, #1
-	ldr	r4, .L1378
+	ldr	r4, .L1379
 	movs	r0, #0
 	.loc 2 2132 0
-	ldr	r5, .L1378+4
+	ldr	r5, .L1379+4
 	.loc 2 2131 0
 	mov	r2, r4
 	bl	FtlVendorPartRead
-.LVL1554:
+.LVL1556:
 	.loc 2 2132 0
 	ldr	r3, [r4]
 	cmp	r3, r5
-	beq	.L1376
+	beq	.L1377
 	.loc 2 2133 0
 	mov	r2, #512
 	movs	r1, #0
 	mov	r0, r4
 	bl	ftl_memset
-.LVL1555:
+.LVL1557:
 	.loc 2 2134 0
 	str	r5, [r4]
-.L1376:
+.L1377:
 	.loc 2 2137 0
 	ldr	r3, [r4]
 	cmp	r3, r5
-	ldr	r3, .L1378+8
-	bne	.L1377
+	ldr	r3, .L1379+8
+	bne	.L1378
 	.loc 2 2138 0
 	ldr	r1, [r4, #88]
-	ldr	r2, .L1378+12
+	ldr	r2, .L1379+12
 	str	r1, [r2]
 	.loc 2 2139 0
 	ldr	r1, [r4, #92]
-	ldr	r2, .L1378+16
+	ldr	r2, .L1379+16
 	str	r1, [r2]
 	.loc 2 2140 0
 	ldr	r1, [r4, #8]
-	ldr	r2, .L1378+20
+	ldr	r2, .L1379+20
 	str	r1, [r2]
 	.loc 2 2141 0
 	ldr	r1, [r4, #12]
-	ldr	r2, .L1378+24
+	ldr	r2, .L1379+24
 	str	r1, [r2]
 	.loc 2 2142 0
 	ldr	r1, [r4, #16]
-	ldr	r2, .L1378+28
+	ldr	r2, .L1379+28
 	str	r1, [r2]
 	.loc 2 2143 0
 	ldr	r1, [r4, #20]
-	ldr	r2, .L1378+32
+	ldr	r2, .L1379+32
 	str	r1, [r2]
 	.loc 2 2144 0
 	ldr	r2, [r4, #28]
@@ -16389,42 +16416,42 @@ Ftl_load_ext_data:
 	.loc 2 2144 0
 	str	r2, [r3]
 	.loc 2 2145 0
-	ldr	r2, .L1378+36
+	ldr	r2, .L1379+36
 	str	r1, [r2]
 	.loc 2 2146 0
 	ldr	r1, [r4, #36]
-	ldr	r2, .L1378+40
+	ldr	r2, .L1379+40
 	str	r1, [r2]
 	.loc 2 2147 0
 	ldr	r1, [r4, #40]
-	ldr	r2, .L1378+44
+	ldr	r2, .L1379+44
 	str	r1, [r2]
 	.loc 2 2148 0
 	ldr	r1, [r4, #44]
-	ldr	r2, .L1378+48
+	ldr	r2, .L1379+48
 	str	r1, [r2]
 	.loc 2 2149 0
 	ldr	r1, [r4, #48]
-	ldr	r2, .L1378+52
+	ldr	r2, .L1379+52
 	str	r1, [r2]
-.L1377:
+.L1378:
 	.loc 2 2152 0
-	ldr	r1, .L1378+56
-	ldr	r2, .L1378+60
+	ldr	r1, .L1379+56
+	ldr	r2, .L1379+60
 	ldr	r3, [r3]
 	ldr	r0, [r1]
 	ldrh	r2, [r2]
-	ldr	r1, .L1378+64
+	ldr	r1, .L1379+64
 	mla	r0, r0, r2, r3
 	ldrh	r1, [r1]
 	bl	__aeabi_uidiv
-.LVL1556:
-	ldr	r3, .L1378+68
+.LVL1558:
+	ldr	r3, .L1379+68
 	str	r0, [r3]
 	pop	{r3, r4, r5, pc}
-.L1379:
+.L1380:
 	.align	2
-.L1378:
+.L1379:
 	.word	.LANCHOR83
 	.word	1179929683
 	.word	.LANCHOR74
@@ -16460,7 +16487,7 @@ FtlVpcTblFlush:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1557:
+.LVL1559:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 40
 	.cfi_offset 4, -32
@@ -16474,13 +16501,13 @@ FtlVpcTblFlush:
 	.loc 2 1016 0
 	movs	r6, #0
 	.loc 2 1013 0
-	ldr	r3, .L1392
+	ldr	r3, .L1393
 	.loc 2 1005 0
 	movw	fp, #65535
 	.loc 2 1010 0
-	ldr	r8, .L1392+80
+	ldr	r8, .L1393+80
 	.loc 2 1011 0
-	ldr	r10, .L1392+84
+	ldr	r10, .L1393+84
 	.loc 2 1013 0
 	ldrh	r2, [r3]
 	.loc 2 1010 0
@@ -16488,16 +16515,16 @@ FtlVpcTblFlush:
 	.loc 2 1011 0
 	ldr	r7, [r10]
 	.loc 2 1010 0
-	ldr	r5, .L1392+4
+	ldr	r5, .L1393+4
 	.loc 2 1019 0
-	ldr	r4, .L1392+8
+	ldr	r4, .L1393+8
 	.loc 2 1020 0
-	ldr	r1, .L1392+12
+	ldr	r1, .L1393+12
 	.loc 2 1010 0
 	str	r0, [r5, #8]
 	.loc 2 1011 0
 	str	r7, [r5, #12]
-.LVL1558:
+.LVL1560:
 	.loc 2 1013 0
 	strh	r2, [r7, #2]	@ movhi
 	.loc 2 1014 0
@@ -16512,7 +16539,7 @@ FtlVpcTblFlush:
 	.loc 2 1015 0
 	str	r2, [r7, #4]
 	.loc 2 1020 0
-	ldr	r2, .L1392+16
+	ldr	r2, .L1393+16
 	.loc 2 1021 0
 	str	r3, [sp, #4]
 	.loc 2 1020 0
@@ -16521,11 +16548,11 @@ FtlVpcTblFlush:
 	ldrh	r2, [r3, #6]
 	strh	r2, [r4, #8]	@ movhi
 	.loc 2 1022 0
-	ldr	r2, .L1392+20
+	ldr	r2, .L1393+20
 	ldrh	r2, [r2]
 	strb	r2, [r4, #10]
 	.loc 2 1024 0
-	ldr	r2, .L1392+24
+	ldr	r2, .L1393+24
 	ldrh	r1, [r2]
 	.loc 2 1025 0
 	ldrh	ip, [r2, #2]
@@ -16539,7 +16566,7 @@ FtlVpcTblFlush:
 	.loc 2 1025 0
 	orr	r1, r1, ip, lsl #6
 	.loc 2 1028 0
-	ldr	r2, .L1392+28
+	ldr	r2, .L1393+28
 	.loc 2 1025 0
 	strh	r1, [r4, #16]	@ movhi
 	.loc 2 1028 0
@@ -16558,7 +16585,7 @@ FtlVpcTblFlush:
 	.loc 2 1030 0
 	strb	r2, [r4, #12]
 	.loc 2 1032 0
-	ldr	r2, .L1392+32
+	ldr	r2, .L1393+32
 	ldrh	r1, [r2]
 	.loc 2 1033 0
 	ldrh	ip, [r2, #2]
@@ -16572,7 +16599,7 @@ FtlVpcTblFlush:
 	.loc 2 1033 0
 	orr	r1, r1, ip, lsl #6
 	.loc 2 1036 0
-	ldr	r2, .L1392+36
+	ldr	r2, .L1393+36
 	.loc 2 1033 0
 	strh	r1, [r4, #24]	@ movhi
 	.loc 2 1047 0
@@ -16581,39 +16608,39 @@ FtlVpcTblFlush:
 	ldr	r2, [r2]
 	str	r2, [r4, #32]
 	.loc 2 1041 0
-	ldr	r2, .L1392+40
+	ldr	r2, .L1393+40
 	ldr	r2, [r2]
 	str	r2, [r4, #40]
 	.loc 2 1042 0
-	ldr	r2, .L1392+44
+	ldr	r2, .L1393+44
 	ldr	r2, [r2]
 	str	r2, [r4, #36]
 	.loc 2 1047 0
-	ldr	r2, .L1392+48
+	ldr	r2, .L1393+48
 	ldrh	r2, [r2]
 	bl	ftl_memset
-.LVL1559:
+.LVL1561:
 	.loc 2 1048 0
 	mov	r1, r4
 	.loc 2 1049 0
-	ldr	r4, .L1392+52
+	ldr	r4, .L1393+52
 	.loc 2 1048 0
 	movs	r2, #48
 	ldr	r0, [r5, #8]
 	bl	ftl_memcpy
-.LVL1560:
+.LVL1562:
 	.loc 2 1049 0
 	ldrh	r2, [r4]
 	ldr	r0, [r5, #8]
-	ldr	r1, .L1392+56
+	ldr	r1, .L1393+56
 	lsls	r2, r2, #1
 	adds	r0, r0, #48
 	ldr	r1, [r1]
 	bl	ftl_memcpy
-.LVL1561:
+.LVL1563:
 	.loc 2 1050 0
 	ldrh	r0, [r4]
-	ldr	r1, .L1392+60
+	ldr	r1, .L1393+60
 	ldr	r4, [r5, #8]
 	lsrs	r2, r0, #3
 	adds	r0, r0, #24
@@ -16623,21 +16650,21 @@ FtlVpcTblFlush:
 	bic	r0, r0, #3
 	add	r0, r0, r4
 	bl	ftl_memcpy
-.LVL1562:
+.LVL1564:
 	.loc 2 1051 0
 	mov	r0, r6
 	bl	FtlUpdateVaildLpn
-.LVL1563:
+.LVL1565:
 	ldr	r3, [sp, #4]
 	mov	r4, r3
-.LVL1564:
-.L1381:
+.LVL1566:
+.L1382:
 	.loc 2 1053 0
 	ldr	r3, [r8]
 	.loc 2 1055 0
 	ldrh	r2, [r4]
 	.loc 2 1056 0
-	ldr	r0, .L1392+4
+	ldr	r0, .L1393+4
 	.loc 2 1053 0
 	str	r3, [r5, #8]
 	.loc 2 1054 0
@@ -16652,19 +16679,19 @@ FtlVpcTblFlush:
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL1565:
+.LVL1567:
 	.loc 2 1057 0
-	ldr	r3, .L1392+64
+	ldr	r3, .L1393+64
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1382
+	blt	.L1383
 	.loc 2 1059 0
 	ldrh	r3, [r4]
 	.loc 2 1058 0
 	ldrh	fp, [r4, #4]
-.LVL1566:
+.LVL1568:
 	.loc 2 1059 0
 	strh	r3, [r4, #4]	@ movhi
 	.loc 2 1060 0
@@ -16672,9 +16699,9 @@ FtlVpcTblFlush:
 	strh	r3, [r4, #2]	@ movhi
 	.loc 2 1061 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL1567:
+.LVL1569:
 	.loc 2 1066 0
-	ldr	r2, .L1392+40
+	ldr	r2, .L1393+40
 	.loc 2 1061 0
 	strh	r0, [r4]	@ movhi
 	.loc 2 1066 0
@@ -16694,10 +16721,10 @@ FtlVpcTblFlush:
 	.loc 2 1070 0
 	mov	r2, r3
 	mov	r1, r3
-	ldr	r0, .L1392+4
+	ldr	r0, .L1393+4
 	bl	FlashProgPages
-.LVL1568:
-.L1382:
+.LVL1570:
+.L1383:
 	.loc 2 1072 0
 	ldrh	r3, [r4, #2]
 	.loc 2 1073 0
@@ -16710,67 +16737,67 @@ FtlVpcTblFlush:
 	.loc 2 1072 0
 	strh	r3, [r4, #2]	@ movhi
 	.loc 2 1073 0
-	bne	.L1383
+	bne	.L1384
 	.loc 2 1075 0
 	cmp	r3, #1
-	bne	.L1384
+	bne	.L1385
 	.loc 2 1075 0 is_stmt 0 discriminator 1
 	movw	r2, #1075
-	ldr	r1, .L1392+68
-	ldr	r0, .L1392+72
+	ldr	r1, .L1393+68
+	ldr	r0, .L1393+72
 	bl	printf
-.LVL1569:
-.L1384:
+.LVL1571:
+.L1385:
 	.loc 2 1076 0 is_stmt 1
 	ldrh	r3, [r4, #2]
 	.loc 2 1078 0
 	adds	r6, r6, #1
-.LVL1570:
+.LVL1572:
 	uxth	r6, r6
-.LVL1571:
+.LVL1573:
 	.loc 2 1076 0
 	cmp	r3, #1
 	.loc 2 1077 0
 	itttt	eq
-	ldreq	r3, .L1392+64
+	ldreq	r3, .L1393+64
 	ldrheq	r3, [r3]
 	addeq	r3, r3, #-1
 	strheq	r3, [r4, #2]	@ movhi
 	.loc 2 1079 0
 	cmp	r6, #3
-	bls	.L1381
+	bls	.L1382
 	.loc 2 1080 0
 	mov	r2, r6
 	ldr	r1, [r5, #4]
-	ldr	r0, .L1392+76
+	ldr	r0, .L1393+76
 	bl	printf
-.LVL1572:
-.L1387:
-	b	.L1387
-.L1383:
+.LVL1574:
+.L1388:
+	b	.L1388
+.L1384:
 	.loc 2 1086 0
 	cmp	r3, #1
-	beq	.L1381
+	beq	.L1382
 	.loc 2 1089 0
 	movw	r3, #65535
 	cmp	fp, r3
-	beq	.L1388
+	beq	.L1389
 	.loc 2 1090 0
 	movs	r1, #1
 	mov	r0, fp
 	bl	FtlFreeSysBlkQueueIn
-.LVL1573:
-.L1388:
+.LVL1575:
+.L1389:
 	.loc 2 1092 0
 	movs	r0, #0
 	add	sp, sp, #8
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1574:
-.L1393:
+.LVL1576:
+.L1394:
 	.align	2
-.L1392:
+.L1393:
 	.word	.LANCHOR81
 	.word	.LANCHOR108
 	.word	.LANCHOR79
@@ -16822,76 +16849,76 @@ FtlVpcCheckAndModify:
 	.loc 2 2199 0
 	movs	r5, #0
 	.loc 2 2197 0
-	ldr	r1, .L1406
-	ldr	r0, .L1406+4
+	ldr	r1, .L1407
+	ldr	r0, .L1407+4
 	bl	printf
-.LVL1575:
+.LVL1577:
 	.loc 2 2198 0
-	ldr	r3, .L1406+8
+	ldr	r3, .L1407+8
 	movs	r1, #0
-	ldr	r4, .L1406+12
+	ldr	r4, .L1407+12
 	.loc 2 2199 0
-	ldr	r6, .L1406+16
+	ldr	r6, .L1407+16
 	.loc 2 2198 0
 	ldrh	r2, [r3]
 	ldr	r0, [r4]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-.LVL1576:
-.L1395:
+.LVL1578:
+.L1396:
 	.loc 2 2199 0 discriminator 1
 	ldr	r3, [r6]
 	cmp	r5, r3
-	bcc	.L1397
+	bcc	.L1398
 	.loc 2 2206 0 discriminator 1
-	ldr	r10, .L1406+36
+	ldr	r10, .L1407+36
 	movs	r7, #0
 	.loc 2 2207 0 discriminator 1
-	ldr	r8, .L1406+40
-.LVL1577:
-.L1398:
+	ldr	r8, .L1407+40
+.LVL1579:
+.L1399:
 	.loc 2 2206 0 discriminator 1
 	ldrh	r3, [r10]
 	uxth	r5, r7
-.LVL1578:
+.LVL1580:
 	cmp	r3, r5
-	bhi	.L1402
+	bhi	.L1403
 	.loc 2 2218 0
 	add	sp, sp, #12
 	.cfi_remember_state
 	.cfi_def_cfa_offset 28
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.LVL1579:
-.L1397:
+.LVL1581:
+.L1398:
 	.cfi_restore_state
 	.loc 2 2200 0
 	movs	r2, #0
 	add	r1, sp, #4
 	mov	r0, r5
 	bl	log2phys
-.LVL1580:
+.LVL1582:
 	.loc 2 2201 0
 	ldr	r0, [sp, #4]
 	adds	r3, r0, #1
-	beq	.L1396
+	beq	.L1397
 	.loc 2 2202 0
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1581:
+.LVL1583:
 	.loc 2 2203 0
 	ldr	r2, [r4]
 	ldrh	r3, [r2, r0, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r0, lsl #1]	@ movhi
-.LVL1582:
-.L1396:
+.LVL1584:
+.L1397:
 	.loc 2 2199 0 discriminator 2
 	adds	r5, r5, #1
-.LVL1583:
-	b	.L1395
-.LVL1584:
-.L1402:
+.LVL1585:
+	b	.L1396
+.LVL1586:
+.L1403:
 	.loc 2 2207 0
 	ldr	r3, [r8]
 	uxth	r6, r7
@@ -16899,31 +16926,31 @@ FtlVpcCheckAndModify:
 	ldr	r3, [r4]
 	ldrh	r3, [r3, r6, lsl #1]
 	cmp	r2, r3
-	beq	.L1400
+	beq	.L1401
 	.loc 2 2207 0 is_stmt 0 discriminator 1
 	movw	r1, #65535
 	cmp	r2, r1
-	beq	.L1400
+	beq	.L1401
 	.loc 2 2209 0 is_stmt 1
 	mov	r1, r6
-	ldr	r0, .L1406+20
+	ldr	r0, .L1407+20
 	bl	printf
-.LVL1585:
+.LVL1587:
 	.loc 2 2210 0
-	ldr	r3, .L1406+24
+	ldr	r3, .L1407+24
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	beq	.L1400
+	beq	.L1401
 	.loc 2 2210 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1406+28
+	ldr	r3, .L1407+28
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	beq	.L1400
+	beq	.L1401
 	.loc 2 2210 0 discriminator 2
-	ldr	r3, .L1406+32
+	ldr	r3, .L1407+32
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	beq	.L1400
+	beq	.L1401
 	.loc 2 2211 0 is_stmt 1
 	ldr	r3, [r4]
 	.loc 2 2212 0
@@ -16934,20 +16961,20 @@ FtlVpcCheckAndModify:
 	strh	r2, [r3, r6, lsl #1]	@ movhi
 	.loc 2 2212 0
 	bl	update_vpc_list
-.LVL1586:
+.LVL1588:
 	.loc 2 2213 0
 	bl	l2p_flush
-.LVL1587:
+.LVL1589:
 	.loc 2 2214 0
 	bl	FtlVpcTblFlush
-.LVL1588:
-.L1400:
+.LVL1590:
+.L1401:
 	adds	r7, r7, #1
-.LVL1589:
-	b	.L1398
-.L1407:
+.LVL1591:
+	b	.L1399
+.L1408:
 	.align	2
-.L1406:
+.L1407:
 	.word	.LANCHOR168
 	.word	.LC91
 	.word	.LANCHOR6
@@ -16976,9 +17003,9 @@ allocate_new_data_superblock:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1590:
+.LVL1592:
 	.loc 2 2633 0
-	ldr	r3, .L1418
+	ldr	r3, .L1419
 	.loc 2 2631 0
 	push	{r4, r5, r6, lr}
 	.cfi_def_cfa_offset 16
@@ -16990,37 +17017,37 @@ allocate_new_data_superblock:
 	mov	r6, r0
 	.loc 2 2632 0
 	ldrh	r4, [r0]
-.LVL1591:
+.LVL1593:
 	.loc 2 2633 0
 	ldrh	r3, [r3]
 	cmp	r3, r4
-	bcs	.L1409
+	bcs	.L1410
 	.loc 2 2633 0 is_stmt 0 discriminator 1
 	movw	r2, #2633
-	ldr	r1, .L1418+4
-	ldr	r0, .L1418+8
-.LVL1592:
+	ldr	r1, .L1419+4
+	ldr	r0, .L1419+8
+.LVL1594:
 	bl	printf
-.LVL1593:
-.L1409:
+.LVL1595:
+.L1410:
 	.loc 2 2635 0 is_stmt 1
 	movw	r3, #65535
 	cmp	r4, r3
-	beq	.L1410
+	beq	.L1411
 	.loc 2 2636 0
-	ldr	r3, .L1418+12
+	ldr	r3, .L1419+12
 	.loc 2 2637 0
 	mov	r0, r4
 	.loc 2 2636 0
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
-	cbz	r3, .L1411
+	cbz	r3, .L1412
 	.loc 2 2637 0
 	bl	INSERT_DATA_LIST
-.LVL1594:
-.L1410:
+.LVL1596:
+.L1411:
 	.loc 2 2642 0
-	ldr	r5, .L1418+16
+	ldr	r5, .L1419+16
 	movw	r2, #65535
 	.loc 2 2641 0
 	movs	r3, #1
@@ -17028,50 +17055,50 @@ allocate_new_data_superblock:
 	.loc 2 2642 0
 	ldrh	r0, [r5]
 	cmp	r0, r2
-	beq	.L1412
+	beq	.L1413
 	.loc 2 2643 0
 	cmp	r4, r0
-	bne	.L1413
+	bne	.L1414
 	.loc 2 2643 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1418+12
+	ldr	r3, .L1419+12
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L1414
-.L1413:
+	cbz	r3, .L1415
+.L1414:
 	.loc 2 2644 0 is_stmt 1
 	bl	update_vpc_list
-.LVL1595:
-.L1414:
+.LVL1597:
+.L1415:
 	.loc 2 2645 0
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.L1412:
+.L1413:
 	.loc 2 2647 0
 	mov	r0, r6
 	bl	allocate_data_superblock
-.LVL1596:
+.LVL1598:
 	.loc 2 2648 0
 	bl	l2p_flush
-.LVL1597:
+.LVL1599:
 	.loc 2 2649 0
 	movs	r0, #0
 	bl	FtlEctTblFlush
-.LVL1598:
+.LVL1600:
 	.loc 2 2650 0
 	bl	FtlVpcTblFlush
-.LVL1599:
+.LVL1601:
 	.loc 2 2652 0
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.LVL1600:
-.L1411:
+.LVL1602:
+.L1412:
 	.loc 2 2639 0
 	bl	INSERT_FREE_LIST
-.LVL1601:
-	b	.L1410
-.L1419:
+.LVL1603:
+	b	.L1411
+.L1420:
 	.align	2
-.L1418:
+.L1419:
 	.word	.LANCHOR5
 	.word	.LANCHOR169
 	.word	.LC1
@@ -17094,7 +17121,7 @@ FtlProgPages:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1602:
+.LVL1604:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 40
 	.cfi_offset 4, -32
@@ -17108,43 +17135,43 @@ FtlProgPages:
 	.loc 3 913 0
 	movs	r6, #0
 	.loc 3 917 0
-	ldr	r8, .L1434+24
+	ldr	r8, .L1435+24
 	.loc 3 904 0
 	mov	r4, r3
 	.loc 3 911 0
 	movs	r2, #0
-.LVL1603:
+.LVL1605:
 	.loc 3 904 0
 	mov	r5, r0
 	.loc 3 911 0
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
-.LVL1604:
+.LVL1606:
 	.loc 3 904 0
 	mov	r10, r1
 	.loc 3 911 0
 	bl	FlashProgPages
-.LVL1605:
-.L1421:
+.LVL1607:
+.L1422:
 	.loc 3 913 0 discriminator 1
 	cmp	r6, r10
-	beq	.L1428
+	beq	.L1429
 	.loc 3 918 0
-	ldr	r7, .L1434
-	b	.L1429
-.L1424:
+	ldr	r7, .L1435
+	b	.L1430
+.L1425:
 	.loc 3 915 0
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1606:
+.LVL1608:
 	.loc 3 916 0
 	ldrh	r3, [r4]
 	cmp	r3, r0
-	bne	.L1422
+	bne	.L1423
 	.loc 3 917 0
 	ldr	r1, [r8]
 	ldrh	r0, [r4, #4]
-.LVL1607:
+.LVL1609:
 	ldrh	r2, [r1, r3, lsl #1]
 	subs	r2, r2, r0
 	strh	r2, [r1, r3, lsl #1]	@ movhi
@@ -17156,17 +17183,17 @@ FtlProgPages:
 	strb	r3, [r4, #6]
 	.loc 3 920 0
 	strh	r3, [r4, #4]	@ movhi
-.L1422:
+.L1423:
 	.loc 3 922 0
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1423
+	cbnz	r3, .L1424
 	.loc 3 923 0
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-.LVL1608:
-.L1423:
+.LVL1610:
+.L1424:
 	.loc 3 926 0
-	ldr	r2, .L1434+4
+	ldr	r2, .L1435+4
 	ldr	r3, [r2, #96]
 	adds	r3, r3, #1
 	str	r3, [r2, #96]
@@ -17174,11 +17201,11 @@ FtlProgPages:
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	FtlGcMarkBadPhyBlk
-.LVL1609:
+.LVL1611:
 	.loc 3 928 0
 	mov	r0, r4
 	bl	get_new_active_ppa
-.LVL1610:
+.LVL1612:
 	.loc 3 930 0
 	movs	r2, #0
 	.loc 3 929 0
@@ -17190,25 +17217,25 @@ FtlProgPages:
 	ldrb	r3, [r4, #9]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	FlashProgPages
-.LVL1611:
-.L1429:
+.LVL1613:
+.L1430:
 	.loc 3 914 0
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L1424
+	beq	.L1425
 	.loc 3 933 0
-	ldr	r3, .L1434+8
+	ldr	r3, .L1435+8
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1425
+	bcc	.L1426
 	.loc 3 933 0 is_stmt 0 discriminator 1
 	movw	r2, #933
-	ldr	r1, .L1434+12
-	ldr	r0, .L1434+16
+	ldr	r1, .L1435+12
+	ldr	r0, .L1435+16
 	bl	printf
-.LVL1612:
-.L1425:
+.LVL1614:
+.L1426:
 	.loc 3 934 0 is_stmt 1
 	ldr	r3, [r5, #4]
 	add	r1, sp, #8
@@ -17219,67 +17246,67 @@ FtlProgPages:
 	str	r3, [r1, #-4]!
 	.loc 3 935 0
 	bl	log2phys
-.LVL1613:
+.LVL1615:
 	.loc 3 937 0
 	ldr	r3, [r5, #12]
 	ldr	fp, [r3, #12]
-.LVL1614:
+.LVL1616:
 	.loc 3 939 0
 	ubfx	r0, fp, #10, #16
 	bl	P2V_block_in_plane
-.LVL1615:
+.LVL1617:
 	.loc 3 940 0
 	cmp	fp, #-1
 	.loc 3 939 0
 	mov	r7, r0
-.LVL1616:
+.LVL1618:
 	.loc 3 940 0
-	beq	.L1426
+	beq	.L1427
 	.loc 3 942 0
 	ldr	r3, [r8]
 	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L1427
+	cbnz	r2, .L1428
 	.loc 3 943 0
 	mov	r1, r0
-	ldr	r0, .L1434+20
-.LVL1617:
+	ldr	r0, .L1435+20
+.LVL1619:
 	bl	printf
-.LVL1618:
-.L1427:
+.LVL1620:
+.L1428:
 	.loc 3 944 0
 	mov	r0, r7
 	bl	decrement_vpc_count
-.LVL1619:
-.L1426:
+.LVL1621:
+.L1427:
 	.loc 3 913 0 discriminator 2
 	adds	r6, r6, #1
-.LVL1620:
+.LVL1622:
 	adds	r5, r5, #20
-	b	.L1421
-.LVL1621:
-.L1428:
+	b	.L1422
+.LVL1623:
+.L1429:
 	.loc 3 948 0
-	ldr	r3, .L1434+8
+	ldr	r3, .L1435+8
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1420
+	bcc	.L1421
 	.loc 3 948 0 is_stmt 0 discriminator 1
 	mov	r2, #948
-	ldr	r1, .L1434+12
-	ldr	r0, .L1434+16
+	ldr	r1, .L1435+12
+	ldr	r0, .L1435+16
 	bl	printf
-.LVL1622:
-.L1420:
+.LVL1624:
+.L1421:
 	.loc 3 949 0 is_stmt 1
 	add	sp, sp, #8
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1623:
-.L1435:
+.LVL1625:
+.L1436:
 	.align	2
-.L1434:
+.L1435:
 	.word	.LANCHOR19
 	.word	.LANCHOR83
 	.word	.LANCHOR3
@@ -17309,26 +17336,26 @@ FtlCacheWriteBack:
 	.cfi_offset 4, -8
 	.cfi_offset 14, -4
 	.loc 3 953 0
-	ldr	r4, .L1441
+	ldr	r4, .L1442
 	ldr	r0, [r4]
-	cbz	r0, .L1437
+	cbz	r0, .L1438
 	.loc 3 954 0
-	ldr	r3, .L1441+4
+	ldr	r3, .L1442+4
 	movs	r2, #0
 	movs	r1, #1
 	ldr	r3, [r3]
 	bl	FtlProgPages
-.LVL1624:
+.LVL1626:
 	.loc 3 955 0
 	movs	r3, #0
 	str	r3, [r4]
-.L1437:
+.L1438:
 	.loc 3 958 0
 	movs	r0, #0
 	pop	{r4, pc}
-.L1442:
+.L1443:
 	.align	2
-.L1441:
+.L1442:
 	.word	.LANCHOR150
 	.word	.LANCHOR171
 	.cfi_endproc
@@ -17354,17 +17381,17 @@ FtlSysFlush:
 	.cfi_offset 14, -4
 	.loc 3 798 0
 	bl	FtlCacheWriteBack
-.LVL1625:
+.LVL1627:
 	.loc 3 799 0
 	bl	l2p_flush
-.LVL1626:
+.LVL1628:
 	.loc 3 800 0
 	movs	r0, #1
 	bl	FtlEctTblFlush
-.LVL1627:
+.LVL1629:
 	.loc 3 801 0
 	bl	FtlVpcTblFlush
-.LVL1628:
+.LVL1630:
 	.loc 3 803 0
 	movs	r0, #0
 	pop	{r3, pc}
@@ -17390,20 +17417,20 @@ sftl_deinit:
 	.cfi_offset 3, -8
 	.cfi_offset 14, -4
 	.loc 3 807 0
-	ldr	r3, .L1446
+	ldr	r3, .L1447
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L1445
+	bne	.L1446
 	.loc 3 808 0
 	bl	FtlSysFlush
-.LVL1629:
-.L1445:
+.LVL1631:
+.L1446:
 	.loc 3 810 0
 	movs	r0, #0
 	pop	{r3, pc}
-.L1447:
+.L1448:
 	.align	2
-.L1446:
+.L1447:
 	.word	.LANCHOR88
 	.cfi_endproc
 .LFE216:
@@ -17422,9 +17449,9 @@ FtlDiscard:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1630:
+.LVL1632:
 	.loc 3 1164 0
-	ldr	r3, .L1463
+	ldr	r3, .L1464
 	adds	r2, r0, r1
 	.loc 3 1157 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
@@ -17441,54 +17468,54 @@ FtlDiscard:
 	.loc 3 1164 0
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1456
+	bhi	.L1457
 	.loc 3 1167 0
 	cmp	r1, #31
-	bhi	.L1450
-.LVL1631:
-.L1455:
+	bhi	.L1451
+.LVL1633:
+.L1456:
 	.loc 3 1168 0
 	movs	r0, #0
-.L1448:
+.L1449:
 	.loc 3 1201 0
 	add	sp, sp, #8
 	.cfi_remember_state
 	.cfi_def_cfa_offset 24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL1632:
-.L1450:
+.LVL1634:
+.L1451:
 	.cfi_restore_state
 	.loc 3 1172 0
-	ldr	r8, .L1463+12
+	ldr	r8, .L1464+12
 	.loc 3 1170 0
 	bl	FtlCacheWriteBack
-.LVL1633:
+.LVL1635:
 	.loc 3 1172 0
 	mov	r0, r6
 	ldrh	r4, [r8]
 	mov	r1, r4
 	bl	__aeabi_uidiv
-.LVL1634:
+.LVL1636:
 	.loc 3 1173 0
 	smulbb	r3, r0, r4
 	.loc 3 1172 0
 	mov	r7, r0
-.LVL1635:
+.LVL1637:
 	.loc 3 1173 0
 	subs	r6, r6, r3
-.LVL1636:
+.LVL1638:
 	uxth	r6, r6
-.LVL1637:
+.LVL1639:
 	.loc 3 1174 0
-	cbz	r6, .L1451
-.LVL1638:
+	cbz	r6, .L1452
+.LVL1640:
 	.loc 3 1175 0
 	subs	r4, r4, r6
-.LVL1639:
+.LVL1641:
 	.loc 3 1176 0
 	adds	r7, r7, #1
-.LVL1640:
+.LVL1642:
 	.loc 3 1175 0
 	cmp	r4, r5
 	it	cs
@@ -17496,48 +17523,48 @@ FtlDiscard:
 	uxth	r4, r4
 	.loc 3 1177 0
 	subs	r5, r5, r4
-.LVL1641:
-.L1451:
+.LVL1643:
+.L1452:
 	.loc 3 1184 0
-	ldr	r4, .L1463+4
+	ldr	r4, .L1464+4
 	.loc 3 1180 0
 	mov	r3, #-1
 	.loc 3 1185 0
-	ldr	r6, .L1463+8
-.LVL1642:
+	ldr	r6, .L1464+8
+.LVL1644:
 	.loc 3 1180 0
 	str	r3, [sp, #4]
-.L1452:
+.L1453:
 	.loc 3 1181 0
 	ldrh	r3, [r8]
 	cmp	r5, r3
-	bcs	.L1454
+	bcs	.L1455
 	.loc 3 1194 0
-	ldr	r3, .L1463+4
+	ldr	r3, .L1464+4
 	ldr	r2, [r3]
 	cmp	r2, #32
-	bls	.L1455
+	bls	.L1456
 	.loc 3 1196 0
 	movs	r4, #0
 	str	r4, [r3]
 	.loc 3 1197 0
 	bl	l2p_flush
-.LVL1643:
+.LVL1645:
 	.loc 3 1198 0
 	bl	FtlVpcTblFlush
-.LVL1644:
-	b	.L1455
-.L1454:
+.LVL1646:
+	b	.L1456
+.L1455:
 	.loc 3 1182 0
 	movs	r2, #0
 	mov	r1, sp
 	mov	r0, r7
 	bl	log2phys
-.LVL1645:
+.LVL1647:
 	.loc 3 1183 0
 	ldr	r3, [sp]
 	adds	r3, r3, #1
-	beq	.L1453
+	beq	.L1454
 	.loc 3 1184 0
 	ldr	r3, [r4]
 	.loc 3 1186 0
@@ -17553,34 +17580,34 @@ FtlDiscard:
 	str	r3, [r6]
 	.loc 3 1186 0
 	bl	log2phys
-.LVL1646:
+.LVL1648:
 	.loc 3 1187 0
 	ldr	r0, [sp]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1647:
+.LVL1649:
 	.loc 3 1188 0
 	bl	decrement_vpc_count
-.LVL1648:
-.L1453:
+.LVL1650:
+.L1454:
 	.loc 3 1191 0
 	ldrh	r3, [r8]
 	.loc 3 1190 0
 	adds	r7, r7, #1
-.LVL1649:
+.LVL1651:
 	.loc 3 1191 0
 	subs	r5, r5, r3
-.LVL1650:
-	b	.L1452
-.LVL1651:
-.L1456:
+.LVL1652:
+	b	.L1453
+.LVL1653:
+.L1457:
 	.loc 3 1165 0
 	mov	r0, #-1
-.LVL1652:
-	b	.L1448
-.L1464:
+.LVL1654:
+	b	.L1449
+.L1465:
 	.align	2
-.L1463:
+.L1464:
 	.word	.LANCHOR34
 	.word	.LANCHOR172
 	.word	.LANCHOR64
@@ -17602,7 +17629,7 @@ FtlGcFreeTempBlock:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1653:
+.LVL1655:
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 48
 	.cfi_offset 4, -32
@@ -17615,69 +17642,69 @@ FtlGcFreeTempBlock:
 	.cfi_offset 14, -4
 	.loc 5 119 0
 	movw	r2, #65535
-	ldr	r4, .L1491
+	ldr	r4, .L1492
 	.loc 5 115 0
-	ldr	r6, .L1491+4
+	ldr	r6, .L1492+4
 	.loc 5 119 0
 	ldrh	r5, [r4]
 	.loc 5 115 0
 	ldrh	r1, [r6]
-.LVL1654:
+.LVL1656:
 	.loc 5 119 0
 	cmp	r5, r2
-	bne	.L1466
-.LVL1655:
-.L1476:
+	bne	.L1467
+.LVL1657:
+.L1477:
 	.loc 5 152 0
-	ldr	r3, .L1491+8
+	ldr	r3, .L1492+8
 	movs	r2, #0
 	str	r2, [r3]
 	.loc 5 153 0
 	movw	r3, #65535
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	bne	.L1489
-.L1467:
+	bne	.L1490
+.L1468:
 	.loc 5 154 0
 	movs	r0, #0
-.L1465:
+.L1466:
 	.loc 5 199 0
 	add	sp, sp, #16
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1656:
-.L1466:
+.LVL1658:
+.L1467:
 	.cfi_restore_state
 	.loc 5 121 0
-	cbz	r0, .L1469
-.LVL1657:
+	cbz	r0, .L1470
+.LVL1659:
 	.loc 5 123 0
-	ldr	r3, .L1491+12
+	ldr	r3, .L1492+12
 	ldrh	r0, [r3]
-.LVL1658:
+.LVL1660:
 	cmp	r0, r2
-	beq	.L1470
-.L1471:
+	beq	.L1471
+.L1472:
 	.loc 5 122 0
 	movs	r1, #2
-.LVL1659:
-.L1469:
+.LVL1661:
+.L1470:
 	.loc 5 131 0
-	ldr	r0, .L1491
+	ldr	r0, .L1492
 	bl	FtlGcScanTempBlk
-.LVL1660:
+.LVL1662:
 	str	r0, [sp, #12]
 	.loc 5 132 0
 	adds	r0, r0, #1
-	beq	.L1472
+	beq	.L1473
 	.loc 5 135 0
-	ldr	r3, .L1491+16
+	ldr	r3, .L1492+16
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r5, lsl #1]
 	cmp	r3, #4
-	bls	.L1473
+	bls	.L1474
 	.loc 5 136 0
 	subs	r3, r3, #5
 	.loc 5 137 0
@@ -17686,14 +17713,14 @@ FtlGcFreeTempBlock:
 	strh	r3, [r2, r5, lsl #1]	@ movhi
 	.loc 5 137 0
 	bl	FtlEctTblFlush
-.LVL1661:
-.L1473:
+.LVL1663:
+.L1474:
 	.loc 5 139 0
-	ldr	r4, .L1491+8
+	ldr	r4, .L1492+8
 	ldr	r2, [r4]
-	cbnz	r2, .L1474
+	cbnz	r2, .L1475
 	.loc 5 140 0
-	ldr	r2, .L1491+20
+	ldr	r2, .L1492+20
 	.loc 5 141 0
 	ldr	r0, [sp, #12]
 	.loc 5 140 0
@@ -17705,65 +17732,65 @@ FtlGcFreeTempBlock:
 	str	r3, [r2, #96]
 	.loc 5 141 0
 	bl	FtlBbmMapBadBlock
-.LVL1662:
+.LVL1664:
 	.loc 5 142 0
 	bl	FtlBbmTblFlush
-.LVL1663:
-.L1474:
+.LVL1665:
+.L1475:
 	.loc 5 144 0
 	movs	r3, #0
 	str	r3, [r4]
-.L1485:
+.L1486:
 	.loc 5 149 0
 	movs	r0, #1
-	b	.L1465
-.LVL1664:
-.L1470:
+	b	.L1466
+.LVL1666:
+.L1471:
 	.loc 5 124 0
 	movs	r2, #0
 	strh	r2, [r3]	@ movhi
 	.loc 5 125 0
-	ldr	r3, .L1491+24
+	ldr	r3, .L1492+24
 	ldrh	r3, [r3]
 	cmp	r3, #17
-	bhi	.L1471
-	b	.L1469
-.LVL1665:
-.L1472:
+	bhi	.L1472
+	b	.L1470
+.LVL1667:
+.L1473:
 	.loc 5 148 0
-	ldr	r3, .L1491+12
+	ldr	r3, .L1492+12
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1485
-	b	.L1476
-.LVL1666:
-.L1489:
+	bne	.L1486
+	b	.L1477
+.LVL1668:
+.L1490:
 	.loc 5 160 0
 	bl	FtlCacheWriteBack
-.LVL1667:
+.LVL1669:
 	.loc 5 162 0
 	ldrb	r1, [r4, #7]	@ zero_extendqisi2
 	ldrh	r3, [r6]
-	ldr	r5, .L1491+28
+	ldr	r5, .L1492+28
 	muls	r3, r1, r3
 	ldrh	r2, [r5]
 	cmp	r2, r3
-	beq	.L1477
+	beq	.L1478
 	.loc 5 162 0 is_stmt 0 discriminator 1
 	movs	r2, #162
-	ldr	r1, .L1491+32
-	ldr	r0, .L1491+36
+	ldr	r1, .L1492+32
+	ldr	r0, .L1492+36
 	bl	printf
-.LVL1668:
-.L1477:
+.LVL1670:
+.L1478:
 	.loc 5 163 0 is_stmt 1
 	ldrh	r6, [r6]
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	ldr	r2, .L1491+40
+	ldr	r2, .L1492+40
 	ldrh	r0, [r4]
 	.loc 5 168 0
-	ldr	fp, .L1491+68
+	ldr	fp, .L1492+68
 	.loc 5 163 0
 	smulbb	r3, r3, r6
 	ldr	r1, [r2]
@@ -17773,38 +17800,38 @@ FtlGcFreeTempBlock:
 	.loc 5 163 0
 	strh	r3, [r1, r0, lsl #1]	@ movhi
 	.loc 5 164 0
-	ldr	r1, .L1491+44
+	ldr	r1, .L1492+44
 	ldrh	r3, [r5]
 	ldr	r0, [r1]
 	add	r3, r3, r0
 	str	r3, [r1]
-.LVL1669:
-.L1478:
+.LVL1671:
+.L1479:
 	.loc 5 165 0 discriminator 1
 	ldrh	r2, [r5]
 	uxth	r3, r6
 	cmp	r2, r3
-	bhi	.L1482
+	bhi	.L1483
 	.loc 5 181 0
 	movw	r0, #65535
 	bl	decrement_vpc_count
-.LVL1670:
+.LVL1672:
 	.loc 5 182 0
 	ldr	r3, [sp, #4]
 	ldrh	r0, [r4]
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	beq	.L1483
+	beq	.L1484
 	.loc 5 183 0
 	bl	INSERT_DATA_LIST
-.LVL1671:
-.L1484:
+.LVL1673:
+.L1485:
 	.loc 5 188 0
-	ldr	r3, .L1491+48
+	ldr	r3, .L1492+48
 	.loc 5 186 0
 	movw	r6, #65535
-.LVL1672:
+.LVL1674:
 	strh	r6, [r4]	@ movhi
 	.loc 5 187 0
 	movs	r4, #0
@@ -17813,30 +17840,30 @@ FtlGcFreeTempBlock:
 	strh	r4, [r3]	@ movhi
 	.loc 5 189 0
 	bl	l2p_flush
-.LVL1673:
+.LVL1675:
 	.loc 5 190 0
 	bl	FtlVpcTblFlush
-.LVL1674:
+.LVL1676:
 	.loc 5 191 0
-	ldr	r3, .L1491+24
+	ldr	r3, .L1492+24
 	ldrh	r2, [r3]
-	ldr	r3, .L1491+52
+	ldr	r3, .L1492+52
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, asr #2
-	ble	.L1467
+	ble	.L1468
 	.loc 5 192 0
-	ldr	r3, .L1491+56
+	ldr	r3, .L1492+56
 	.loc 5 193 0
 	movs	r2, #20
 	.loc 5 192 0
 	strh	r6, [r3]	@ movhi
 	.loc 5 193 0
-	ldr	r3, .L1491+60
+	ldr	r3, .L1492+60
 	strh	r2, [r3]	@ movhi
-	b	.L1467
-.LVL1675:
-.L1482:
+	b	.L1468
+.LVL1677:
+.L1483:
 	.loc 5 166 0
 	uxth	r3, r6
 	movs	r7, #12
@@ -17844,75 +17871,75 @@ FtlGcFreeTempBlock:
 	ldr	r2, [fp]
 	.loc 5 166 0
 	muls	r7, r3, r7
-	ldr	r3, .L1491+64
+	ldr	r3, .L1492+64
 	ldr	r8, [r3]
 	add	r10, r8, r7
-.LVL1676:
+.LVL1678:
 	.loc 5 168 0
 	ldr	r1, [r10, #8]
 	cmp	r1, r2
-	bcc	.L1479
+	bcc	.L1480
 	.loc 5 168 0 is_stmt 0 discriminator 1
 	movs	r2, #168
-	ldr	r1, .L1491+32
-	ldr	r0, .L1491+36
+	ldr	r1, .L1492+32
+	ldr	r0, .L1492+36
 	bl	printf
-.LVL1677:
-.L1479:
+.LVL1679:
+.L1480:
 	.loc 5 169 0 is_stmt 1
 	movs	r2, #0
 	add	r1, sp, #12
 	ldr	r0, [r10, #8]
 	bl	log2phys
-.LVL1678:
+.LVL1680:
 	.loc 5 170 0
 	ldr	r2, [sp, #12]
 	ldr	r0, [r8, r7]
 	cmp	r0, r2
-	bne	.L1480
+	bne	.L1481
 	.loc 5 171 0
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1679:
+.LVL1681:
 	.loc 5 172 0
 	movs	r2, #1
 	.loc 5 171 0
 	mov	r7, r0
-.LVL1680:
+.LVL1682:
 	.loc 5 172 0
 	add	r1, r10, #4
 	ldr	r0, [r10, #8]
 	bl	log2phys
-.LVL1681:
+.LVL1683:
 	.loc 5 173 0
 	mov	r0, r7
-.LVL1682:
-.L1490:
+.LVL1684:
+.L1491:
 	.loc 5 177 0
 	bl	decrement_vpc_count
-.LVL1683:
-.L1481:
-	adds	r6, r6, #1
-.LVL1684:
-	b	.L1478
 .LVL1685:
-.L1480:
+.L1482:
+	adds	r6, r6, #1
+.LVL1686:
+	b	.L1479
+.LVL1687:
+.L1481:
 	.loc 5 175 0
 	ldr	r3, [r10, #4]
 	cmp	r2, r3
-	beq	.L1481
+	beq	.L1482
 	.loc 5 177 0
 	ldrh	r0, [r4]
-	b	.L1490
-.LVL1686:
-.L1483:
+	b	.L1491
+.LVL1688:
+.L1484:
 	.loc 5 185 0
 	bl	INSERT_FREE_LIST
-.LVL1687:
-	b	.L1484
-.L1492:
+.LVL1689:
+	b	.L1485
+.L1493:
 	.align	2
-.L1491:
+.L1492:
 	.word	.LANCHOR53
 	.word	.LANCHOR19
 	.word	.LANCHOR153
@@ -17955,42 +17982,42 @@ FtlGcPageRecovery:
 	.cfi_offset 5, -8
 	.cfi_offset 14, -4
 	.loc 5 290 0
-	ldr	r4, .L1495
-	ldr	r5, .L1495+4
+	ldr	r4, .L1496
+	ldr	r5, .L1496+4
 	ldrh	r1, [r4]
 	mov	r0, r5
 	bl	FtlGcScanTempBlk
-.LVL1688:
+.LVL1690:
 	.loc 5 291 0
 	ldrh	r2, [r5, #2]
 	ldrh	r3, [r4]
 	cmp	r2, r3
-	bcc	.L1493
-.LBB282:
-.LBB283:
+	bcc	.L1494
+.LBB286:
+.LBB287:
 	.loc 5 293 0
-	ldr	r0, .L1495+8
+	ldr	r0, .L1496+8
 	bl	FtlMapBlkWriteDump_data
-.LVL1689:
+.LVL1691:
 	.loc 5 294 0
 	movs	r0, #0
 	bl	FtlGcFreeTempBlock
-.LVL1690:
+.LVL1692:
 	.loc 5 295 0
-	ldr	r3, .L1495+12
+	ldr	r3, .L1496+12
 	movs	r2, #0
 	str	r2, [r3]
-.L1493:
+.L1494:
 	pop	{r3, r4, r5, pc}
-.L1496:
+.L1497:
 	.align	2
-.L1495:
+.L1496:
 	.word	.LANCHOR19
 	.word	.LANCHOR53
 	.word	.LANCHOR144
 	.word	.LANCHOR153
-.LBE283:
-.LBE282:
+.LBE287:
+.LBE286:
 	.cfi_endproc
 .LFE314:
 	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
@@ -18017,44 +18044,44 @@ FtlPowerLostRecovery:
 	.loc 2 2033 0
 	movs	r4, #0
 	.loc 2 2035 0
-	ldr	r5, .L1498
+	ldr	r5, .L1499
 	.loc 2 2033 0
-	ldr	r3, .L1498+4
+	ldr	r3, .L1499+4
 	.loc 2 2035 0
 	mov	r0, r5
 	.loc 2 2033 0
 	str	r4, [r3]
 	.loc 2 2035 0
 	bl	FtlRecoverySuperblock
-.LVL1691:
+.LVL1693:
 	.loc 2 2036 0
 	mov	r0, r5
 	.loc 2 2037 0
-	ldr	r5, .L1498+8
+	ldr	r5, .L1499+8
 	.loc 2 2036 0
 	bl	FtlSlcSuperblockCheck
-.LVL1692:
+.LVL1694:
 	.loc 2 2037 0
 	mov	r0, r5
 	bl	FtlRecoverySuperblock
-.LVL1693:
+.LVL1695:
 	.loc 2 2038 0
 	mov	r0, r5
 	bl	FtlSlcSuperblockCheck
-.LVL1694:
+.LVL1696:
 	.loc 2 2039 0
 	bl	FtlGcPageRecovery
-.LVL1695:
+.LVL1697:
 	.loc 2 2040 0
 	movw	r0, #65535
 	bl	decrement_vpc_count
-.LVL1696:
+.LVL1698:
 	.loc 2 2042 0
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L1499:
+.L1500:
 	.align	2
-.L1498:
+.L1499:
 	.word	.LANCHOR51
 	.word	.LANCHOR163
 	.word	.LANCHOR52
@@ -18085,62 +18112,62 @@ Ftl_gc_temp_data_write_back:
 	.cfi_offset 14, -4
 	.loc 5 320 0
 	movs	r3, #0
-	ldr	r4, .L1507
+	ldr	r4, .L1508
 	.loc 5 321 0
 	movs	r6, #0
 	.loc 5 322 0
 	movs	r7, #20
 	.loc 5 320 0
 	mov	r2, r3
-	ldr	r5, .L1507+4
+	ldr	r5, .L1508+4
 	ldr	r1, [r4]
 	ldr	r0, [r5]
 	bl	FlashProgPages
-.LVL1697:
-.L1501:
+.LVL1699:
+.L1502:
 	.loc 5 321 0 discriminator 1
 	ldr	r1, [r4]
 	uxth	r3, r6
 	cmp	r1, r3
-	bhi	.L1504
+	bhi	.L1505
 	.loc 5 335 0
 	ldr	r0, [r5]
 	bl	FtlGcBufFree
-.LVL1698:
+.LVL1700:
 	.loc 5 337 0
-	ldr	r3, .L1507+8
+	ldr	r3, .L1508+8
 	.loc 5 336 0
 	movs	r0, #0
 	str	r0, [r4]
 	.loc 5 337 0
 	ldrh	r3, [r3, #4]
-	cbnz	r3, .L1500
+	cbnz	r3, .L1501
 	.loc 5 338 0
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
-.LVL1699:
-	b	.L1506
-.L1504:
+.LVL1701:
+	b	.L1507
+.L1505:
 	.loc 5 322 0
 	muls	r3, r7, r3
 	ldr	r2, [r5]
 	adds	r6, r6, #1
-.LVL1700:
+.LVL1702:
 	adds	r1, r2, r3
 	ldr	r2, [r2, r3]
 	adds	r3, r2, #1
-	bne	.L1502
+	bne	.L1503
 	.loc 5 323 0
-	ldr	r3, .L1507+8
+	ldr	r3, .L1508+8
 	movs	r5, #0
-	ldr	r0, .L1507+12
+	ldr	r0, .L1508+12
 	ldrh	r4, [r3]
 	ldr	r0, [r0]
 	strh	r5, [r0, r4, lsl #1]	@ movhi
 	.loc 5 324 0
 	strh	r2, [r3]	@ movhi
 	.loc 5 325 0
-	ldr	r2, .L1507+16
+	ldr	r2, .L1508+16
 	.loc 5 326 0
 	ldr	r0, [r1, #4]
 	.loc 5 325 0
@@ -18152,33 +18179,33 @@ Ftl_gc_temp_data_write_back:
 	str	r3, [r2, #96]
 	.loc 5 326 0
 	bl	FtlBbmMapBadBlock
-.LVL1701:
+.LVL1703:
 	.loc 5 327 0
 	bl	FtlBbmTblFlush
-.LVL1702:
+.LVL1704:
 	.loc 5 328 0
 	bl	FtlGcPageVarInit
-.LVL1703:
-.L1506:
+.LVL1705:
+.L1507:
 	.loc 5 339 0
 	movs	r0, #1
-.L1500:
+.L1501:
 	.loc 5 342 0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1502:
+.L1503:
 	.loc 5 331 0 discriminator 2
 	ldr	r3, [r1, #12]
-.LVL1704:
+.LVL1706:
 	.loc 5 332 0 discriminator 2
 	ldr	r1, [r1, #4]
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
 	bl	FtlGcUpdatePage
-.LVL1705:
-	b	.L1501
-.L1508:
+.LVL1707:
+	b	.L1502
+.L1509:
 	.align	2
-.L1507:
+.L1508:
 	.word	.LANCHOR91
 	.word	.LANCHOR121
 	.word	.LANCHOR53
@@ -18209,50 +18236,50 @@ Ftl_get_new_temp_ppa:
 	.cfi_offset 14, -4
 	.loc 5 301 0
 	movw	r3, #65535
-	ldr	r4, .L1512
+	ldr	r4, .L1513
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	beq	.L1510
+	beq	.L1511
 	.loc 5 301 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1511
-.L1510:
+	cbnz	r3, .L1512
+.L1511:
 	.loc 5 302 0 is_stmt 1
 	bl	FtlCacheWriteBack
-.LVL1706:
+.LVL1708:
 	.loc 5 303 0
 	movs	r0, #0
 	.loc 5 304 0
 	movs	r5, #0
 	.loc 5 303 0
 	bl	FtlGcFreeTempBlock
-.LVL1707:
+.LVL1709:
 	.loc 5 305 0
-	ldr	r0, .L1512
+	ldr	r0, .L1513
 	.loc 5 304 0
 	strb	r5, [r4, #8]
 	.loc 5 305 0
 	bl	allocate_data_superblock
-.LVL1708:
+.LVL1710:
 	.loc 5 306 0
-	ldr	r3, .L1512+4
+	ldr	r3, .L1513+4
 	strh	r5, [r3]	@ movhi
 	.loc 5 307 0
-	ldr	r3, .L1512+8
+	ldr	r3, .L1513+8
 	strh	r5, [r3]	@ movhi
 	.loc 5 308 0
 	bl	l2p_flush
-.LVL1709:
+.LVL1711:
 	.loc 5 309 0
 	mov	r0, r5
 	bl	FtlEctTblFlush
-.LVL1710:
+.LVL1712:
 	.loc 5 310 0
 	bl	FtlVpcTblFlush
-.LVL1711:
-.L1511:
+.LVL1713:
+.L1512:
 	.loc 5 312 0
-	ldr	r0, .L1512
+	ldr	r0, .L1513
 	.loc 5 313 0
 	pop	{r3, r4, r5, lr}
 	.cfi_restore 14
@@ -18262,10 +18289,10 @@ Ftl_get_new_temp_ppa:
 	.cfi_def_cfa_offset 0
 	.loc 5 312 0
 	b	get_new_active_ppa
-.LVL1712:
-.L1513:
+.LVL1714:
+.L1514:
 	.align	2
-.L1512:
+.L1513:
 	.word	.LANCHOR53
 	.word	.LANCHOR98
 	.word	.LANCHOR99
@@ -18286,9 +18313,9 @@ rk_ftl_garbage_collect:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1713:
+.LVL1715:
 	.loc 5 478 0
-	ldr	r3, .L1632
+	ldr	r3, .L1633
 	.loc 5 470 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
@@ -18305,36 +18332,36 @@ rk_ftl_garbage_collect:
 	.cfi_def_cfa_offset 80
 	.loc 5 478 0
 	ldr	r0, [r3]
-.LVL1714:
+.LVL1716:
 	cmp	r0, #0
-	bne	.L1589
+	bne	.L1590
 	.loc 5 481 0
-	ldr	r3, .L1632+4
+	ldr	r3, .L1633+4
 	ldrh	r3, [r3]
 	cmp	r3, #47
-	bls	.L1514
+	bls	.L1515
 	.loc 5 485 0
-	ldr	r3, .L1632+8
+	ldr	r3, .L1633+8
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1516
-.LVL1715:
-.L1519:
-.LBB287:
-.LBB288:
+	bne	.L1517
+.LVL1717:
+.L1520:
+.LBB291:
+.LBB292:
 	.loc 5 489 0
-	ldr	r3, .L1632+12
+	ldr	r3, .L1633+12
 	movw	r4, #65535
 	ldrh	r0, [r3]
 	cmp	r0, r4
-	bne	.L1517
-.L1518:
+	bne	.L1518
+.L1519:
 	.loc 5 496 0
-	ldr	r2, .L1632+16
+	ldr	r2, .L1633+16
 	.loc 5 497 0
 	movw	r5, #65535
-	ldr	r6, .L1632+20
+	ldr	r6, .L1633+20
 	.loc 5 496 0
 	ldr	r3, [r2]
 	.loc 5 497 0
@@ -18347,17 +18374,17 @@ rk_ftl_garbage_collect:
 	.loc 5 496 0
 	str	r3, [r2]
 	.loc 5 497 0
-	bne	.L1520
-	ldr	r1, .L1632+24
+	bne	.L1521
+	ldr	r1, .L1633+24
 	ldrh	r1, [r1]
 	cmp	r1, r0
-	bne	.L1521
-	ldr	r0, .L1632+28
+	bne	.L1522
+	ldr	r0, .L1633+28
 	ldrh	r10, [r0]
 	cmp	r10, r1
-	bne	.L1522
+	bne	.L1523
 	.loc 5 498 0
-	ldr	r1, .L1632+32
+	ldr	r1, .L1633+32
 	ldrh	r0, [r1]
 	mov	r8, r1
 	cmp	r0, #24
@@ -18365,10 +18392,10 @@ rk_ftl_garbage_collect:
 	movcc	r1, #5120
 	movcs	r1, #1024
 	cmp	r3, r1
-	bls	.L1522
-.LBB289:
+	bls	.L1523
+.LBB293:
 	.loc 5 502 0
-	ldr	r3, .L1632+36
+	ldr	r3, .L1633+36
 	.loc 5 501 0
 	movs	r4, #0
 	str	r4, [r2]
@@ -18376,152 +18403,152 @@ rk_ftl_garbage_collect:
 	strh	r4, [r3]	@ movhi
 	.loc 5 503 0
 	bl	GetSwlReplaceBlock
-.LVL1716:
+.LVL1718:
 	.loc 5 504 0
 	cmp	r0, r10
 	.loc 5 503 0
 	mov	r5, r0
-.LVL1717:
+.LVL1719:
 	.loc 5 504 0
-	bne	.L1593
+	bne	.L1594
 	.loc 5 505 0
-	ldr	r10, .L1632+96
+	ldr	r10, .L1633+96
 	ldrh	r2, [r8]
 	ldrh	r3, [r10]
 	cmp	r2, r3
-	bcs	.L1525
+	bcs	.L1526
 	.loc 5 506 0
 	movs	r0, #64
-.LVL1718:
+.LVL1720:
 	bl	List_get_gc_head_node
-.LVL1719:
+.LVL1721:
 	.loc 5 507 0
 	uxth	r3, r0
 	cmp	r3, r5
-	beq	.L1527
+	beq	.L1528
 	.loc 5 508 0
 	mov	r0, r3
-	ldr	r3, .L1632+40
+	ldr	r3, .L1633+40
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #7
-	bhi	.L1528
+	bhi	.L1529
 	.loc 5 509 0
 	mov	r0, r4
-.LVL1720:
+.LVL1722:
 	bl	List_get_gc_head_node
-.LVL1721:
+.LVL1723:
 	uxth	r4, r0
-.LVL1722:
+.LVL1724:
 	.loc 5 510 0
 	movs	r3, #128
 	strh	r3, [r10]	@ movhi
 	.loc 5 520 0
 	cmp	r4, r5
-	bne	.L1524
-.LVL1723:
-.L1527:
+	bne	.L1525
+.LVL1725:
+.L1528:
 	.loc 5 523 0
 	bl	FtlGcReFreshBadBlk
-.LVL1724:
-.LBE289:
+.LVL1726:
+.LBE293:
 	.loc 5 527 0
 	cmp	r7, #0
-	bne	.L1530
+	bne	.L1531
 	movw	r3, #65535
 	cmp	r5, r3
-	bne	.L1530
-.LVL1725:
-.L1587:
+	bne	.L1531
+.LVL1727:
+.L1588:
 	.loc 5 528 0
-	ldr	r3, .L1632+32
+	ldr	r3, .L1633+32
 	ldrh	r3, [r3]
 	cmp	r3, #24
-	bhi	.L1594
-	ldr	r2, .L1632+44
+	bhi	.L1595
+	ldr	r2, .L1633+44
 	.loc 5 530 0
 	cmp	r3, #16
 	.loc 5 531 0
 	ldrh	r4, [r2]
 	.loc 5 530 0
-	bls	.L1532
+	bls	.L1533
 	.loc 5 531 0
 	lsrs	r4, r4, #5
-.LVL1726:
-.L1531:
+.LVL1728:
+.L1532:
 	.loc 5 539 0
-	ldr	r2, .L1632+48
+	ldr	r2, .L1633+48
 	ldrh	r1, [r2]
 	cmp	r1, r3
 	mov	r1, r2
-	bcs	.L1535
+	bcs	.L1536
 	.loc 5 540 0
-	ldr	r3, .L1632+24
+	ldr	r3, .L1633+24
 	movw	r0, #65535
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L1536
-	ldr	r0, .L1632+28
+	bne	.L1537
+	ldr	r0, .L1633+28
 	ldrh	r0, [r0]
 	cmp	r0, r3
-	bne	.L1536
+	bne	.L1537
 	.loc 5 542 0
-	ldr	r3, .L1632+36
+	ldr	r3, .L1633+36
 	ldrh	r0, [r3]
-	cbnz	r0, .L1537
-	ldr	r3, .L1632+52
-	ldr	r4, .L1632+56
-.LVL1727:
+	cbnz	r0, .L1538
+	ldr	r3, .L1633+52
+	ldr	r4, .L1633+56
+.LVL1729:
 	ldr	r3, [r3]
 	ldr	r4, [r4]
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, lsr #2
-	bcs	.L1538
-.L1537:
+	bcs	.L1539
+.L1538:
 	.loc 5 543 0
-	ldr	r3, .L1632+60
+	ldr	r3, .L1633+60
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r1]	@ movhi
-.L1539:
+.L1540:
 	.loc 5 546 0
-	ldr	r3, .L1632+64
+	ldr	r3, .L1633+64
 	movs	r2, #0
 	str	r2, [r3]
-.LVL1728:
-.L1514:
-.LBE288:
-.LBE287:
+.LVL1730:
+.L1515:
+.LBE292:
+.LBE291:
 	.loc 5 758 0
 	add	sp, sp, #48
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1729:
-.L1516:
+.LVL1731:
+.L1517:
 	.cfi_restore_state
 	.loc 5 485 0 discriminator 1
-	ldr	r2, .L1632+24
+	ldr	r2, .L1633+24
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L1519
+	beq	.L1520
 	.loc 5 486 0
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
-.LVL1730:
+.LVL1732:
 	cmp	r0, #0
-	beq	.L1519
+	beq	.L1520
 	.loc 5 487 0
 	movs	r0, #1
-	b	.L1514
-.LVL1731:
-.L1517:
-.LBB293:
-.LBB291:
+	b	.L1515
+.LVL1733:
+.L1518:
+.LBB297:
+.LBB295:
 	.loc 5 489 0
-	ldr	r1, .L1632+28
+	ldr	r1, .L1633+28
 	ldrh	r2, [r1]
 	cmp	r2, r4
 	.loc 5 490 0
@@ -18529,108 +18556,108 @@ rk_ftl_garbage_collect:
 	strheq	r0, [r1]	@ movhi
 	.loc 5 491 0
 	strheq	r2, [r3]	@ movhi
-	b	.L1518
-.LVL1732:
-.L1528:
-.LBB290:
+	b	.L1519
+.LVL1734:
+.L1529:
+.LBB294:
 	.loc 5 512 0
 	movs	r3, #64
-.LVL1733:
-.L1626:
+.LVL1735:
+.L1627:
 	.loc 5 516 0
 	strh	r3, [r10]	@ movhi
-	b	.L1527
-.LVL1734:
-.L1525:
+	b	.L1528
+.LVL1736:
+.L1526:
 	movs	r3, #80
-	b	.L1626
-.L1593:
+	b	.L1627
+.L1594:
 	.loc 5 504 0
 	mov	r4, r0
-.LVL1735:
-.L1524:
+.LVL1737:
+.L1525:
 	.loc 5 521 0
-	ldr	r3, .L1632+40
+	ldr	r3, .L1633+40
 	mov	r5, r4
-	ldr	r1, .L1632+48
+	ldr	r1, .L1633+48
 	ldrh	r2, [r8]
 	ldr	r3, [r3]
 	ldrh	r1, [r1]
-	ldr	r0, .L1632+68
+	ldr	r0, .L1633+68
 	ldrh	r3, [r3, r4, lsl #1]
 	str	r1, [sp, #4]
-	ldr	r1, .L1632+72
+	ldr	r1, .L1633+72
 	ldr	r1, [r1]
 	ldrh	r1, [r1, r4, lsl #1]
 	str	r1, [sp]
 	mov	r1, r4
 	bl	printf
-.LVL1736:
-	b	.L1527
-.LVL1737:
-.L1532:
-.LBE290:
+.LVL1738:
+	b	.L1528
+.LVL1739:
+.L1533:
+.LBE294:
 	.loc 5 532 0
 	cmp	r3, #12
-	bls	.L1533
+	bls	.L1534
 	.loc 5 533 0
 	lsrs	r4, r4, #4
-.LVL1738:
-	b	.L1531
-.LVL1739:
-.L1533:
+.LVL1740:
+	b	.L1532
+.LVL1741:
+.L1534:
 	.loc 5 534 0
 	cmp	r3, #8
-	bls	.L1531
+	bls	.L1532
 	.loc 5 535 0
 	lsrs	r4, r4, #2
-.LVL1740:
-	b	.L1531
-.LVL1741:
-.L1594:
+.LVL1742:
+	b	.L1532
+.LVL1743:
+.L1595:
 	.loc 5 529 0
 	movs	r4, #1
-	b	.L1531
-.L1538:
+	b	.L1532
+.L1539:
 	.loc 5 545 0
 	movs	r3, #18
 	strh	r3, [r2]	@ movhi
-	b	.L1539
-.LVL1742:
-.L1536:
+	b	.L1540
+.LVL1744:
+.L1537:
 	.loc 5 549 0
-	ldr	r3, .L1632+60
+	ldr	r3, .L1633+60
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r1]	@ movhi
-.L1535:
+.L1536:
 	.loc 5 551 0
-	ldr	r3, .L1632+76
+	ldr	r3, .L1633+76
 	ldrh	r3, [r3]
-	cbz	r3, .L1595
+	cbz	r3, .L1596
 	.loc 5 552 0
 	adds	r4, r4, #32
-.LVL1743:
+.LVL1745:
 	uxth	r4, r4
-.LVL1744:
-.L1595:
+.LVL1746:
+.L1596:
 	.loc 5 551 0
 	movw	r5, #65535
-.LVL1745:
-.L1541:
+.LVL1747:
+.L1542:
 	.loc 5 597 0
 	ldrh	r3, [r6]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1550
+	bne	.L1551
 	.loc 5 598 0
 	cmp	r5, r3
-	beq	.L1551
+	beq	.L1552
 	.loc 5 599 0
 	strh	r5, [r6]	@ movhi
-.LVL1746:
-.L1552:
+.LVL1748:
+.L1553:
 	.loc 5 611 0
 	ldrh	r0, [r6]
 	movw	r7, #65535
@@ -18639,25 +18666,25 @@ rk_ftl_garbage_collect:
 	strb	r3, [r6, #8]
 	.loc 5 611 0
 	cmp	r0, r7
-	beq	.L1550
+	beq	.L1551
 	.loc 5 612 0
 	bl	IsBlkInGcList
-.LVL1747:
-	cbz	r0, .L1555
+.LVL1749:
+	cbz	r0, .L1556
 	.loc 5 613 0
 	strh	r7, [r6]	@ movhi
-.L1555:
+.L1556:
 	.loc 5 615 0
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1550
+	beq	.L1551
 	.loc 5 616 0
-	ldr	r0, .L1632+20
+	ldr	r0, .L1633+20
 	bl	make_superblock
-.LVL1748:
+.LVL1750:
 	.loc 5 619 0
-	ldr	r2, .L1632+80
+	ldr	r2, .L1633+80
 	.loc 5 617 0
 	movs	r3, #0
 	strh	r3, [r6, #2]	@ movhi
@@ -18666,43 +18693,43 @@ rk_ftl_garbage_collect:
 	.loc 5 619 0
 	strh	r3, [r2]	@ movhi
 	.loc 5 620 0
-	ldr	r3, .L1632+40
+	ldr	r3, .L1633+40
 	ldrh	r2, [r6]
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r2, lsl #1]
-	ldr	r3, .L1632+84
+	ldr	r3, .L1633+84
 	strh	r2, [r3]	@ movhi
-.L1550:
+.L1551:
 	.loc 5 625 0
-	ldr	r2, .L1632+88
+	ldr	r2, .L1633+88
 	ldrh	r3, [r6]
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L1556
-	ldr	r2, .L1632+92
+	beq	.L1557
+	ldr	r2, .L1633+92
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L1556
+	beq	.L1557
 	.loc 5 631 0
-	ldr	r6, .L1632+20
+	ldr	r6, .L1633+20
 	mov	fp, r6
-.L1557:
+.L1558:
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1558
+	bne	.L1559
 	.loc 5 635 0
-	ldr	r8, .L1632+100
+	ldr	r8, .L1633+100
 	.loc 5 632 0
 	movs	r2, #0
-	ldr	r3, .L1632+64
+	ldr	r3, .L1633+64
 	str	r2, [r3]
-.L1559:
+.L1560:
 	.loc 5 635 0
 	ldrh	r7, [r8]
 	mov	r0, r7
 	bl	List_get_gc_head_node
-.LVL1749:
+.LVL1751:
 	uxth	r3, r0
 	.loc 5 636 0
 	movw	r1, #65535
@@ -18710,59 +18737,59 @@ rk_ftl_garbage_collect:
 	.loc 5 635 0
 	strh	r3, [fp]	@ movhi
 	.loc 5 636 0
-	bne	.L1560
+	bne	.L1561
 	.loc 5 637 0
 	movs	r3, #0
 	.loc 5 638 0
 	movs	r0, #8
 	.loc 5 637 0
 	strh	r3, [r8]	@ movhi
-	b	.L1514
-.LVL1750:
-.L1542:
+	b	.L1515
+.LVL1752:
+.L1543:
 	.loc 5 558 0
-	ldr	r3, .L1632+64
+	ldr	r3, .L1633+64
 	movs	r2, #0
 	.loc 5 560 0
-	ldr	r1, .L1632+48
-	ldr	r4, .L1632+32
+	ldr	r1, .L1633+48
+	ldr	r4, .L1633+32
 	.loc 5 558 0
 	str	r2, [r3]
 	.loc 5 560 0
 	ldrh	r3, [r1]
 	mov	r2, r1
 	ldrh	r8, [r4]
-	ldr	r5, .L1632+36
+	ldr	r5, .L1633+36
 	cmp	r3, r8
-	bcs	.L1543
+	bcs	.L1544
 	.loc 5 561 0
 	ldrh	r3, [r5]
-	cbnz	r3, .L1544
-	ldr	r3, .L1632+52
-	ldr	r0, .L1632+56
+	cbnz	r3, .L1545
+	ldr	r3, .L1633+52
+	ldr	r0, .L1633+56
 	ldr	r3, [r3]
 	ldr	r0, [r0]
 	add	r3, r3, r3, lsl #1
 	cmp	r0, r3, lsr #2
-	bcs	.L1545
-.L1544:
+	bcs	.L1546
+.L1545:
 	.loc 5 562 0
-	ldr	r3, .L1632+60
+	ldr	r3, .L1633+60
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r2]	@ movhi
-.LVL1751:
-.L1629:
+.LVL1753:
+.L1630:
 	.loc 5 578 0
 	bl	FtlReadRefresh
-.LVL1752:
+.LVL1754:
 	.loc 5 579 0
 	ldrh	r0, [r5]
-	b	.L1514
-.L1633:
+	b	.L1515
+.L1634:
 	.align	2
-.L1632:
+.L1633:
 	.word	.LANCHOR117
 	.word	.LANCHOR45
 	.word	.LANCHOR157
@@ -18789,115 +18816,115 @@ rk_ftl_garbage_collect:
 	.word	.LANCHOR52
 	.word	.LANCHOR85
 	.word	.LANCHOR87
-.LVL1753:
-.L1545:
+.LVL1755:
+.L1546:
 	.loc 5 564 0
 	movs	r3, #18
 	strh	r3, [r1]	@ movhi
-	b	.L1629
-.L1543:
+	b	.L1630
+.L1544:
 	.loc 5 572 0
 	ldrh	r0, [r5]
 	cmp	r0, #0
-	bne	.L1547
+	bne	.L1548
 	.loc 5 573 0
-	ldr	r3, .L1634
+	ldr	r3, .L1635
 	ldrh	r7, [r3]
-.LVL1754:
+.LVL1756:
 	add	r2, r7, r7, lsl #1
 	asrs	r2, r2, #2
 	strh	r2, [r1]	@ movhi
 	.loc 5 574 0
 	bl	List_get_gc_head_node
-.LVL1755:
+.LVL1757:
 	.loc 5 575 0
-	ldr	r3, .L1634+4
+	ldr	r3, .L1635+4
 	uxth	r0, r0
-	ldr	r2, .L1634+8
+	ldr	r2, .L1635+8
 	ldr	r3, [r3]
 	ldrh	r2, [r2]
 	ldrh	r1, [r3, r0, lsl #1]
-	ldr	r3, .L1634+12
+	ldr	r3, .L1635+12
 	ldrh	r3, [r3]
 	muls	r2, r3, r2
 	cmp	r1, r2, asr #1
-	ble	.L1548
+	ble	.L1549
 	.loc 5 576 0
 	subs	r3, r7, #1
 	.loc 5 575 0
 	cmp	r8, r3
-	bge	.L1629
-.L1548:
+	bge	.L1630
+.L1549:
 	.loc 5 584 0
 	cmp	r1, #0
-	bne	.L1547
+	bne	.L1548
 	.loc 5 585 0
 	movw	r0, #65535
-.LVL1756:
+.LVL1758:
 	bl	decrement_vpc_count
-.LVL1757:
+.LVL1759:
 	.loc 5 586 0
 	ldrh	r0, [r4]
 	adds	r0, r0, #1
-	b	.L1514
-.LVL1758:
-.L1551:
+	b	.L1515
+.LVL1760:
+.L1552:
 	.loc 5 600 0
-	ldr	r3, .L1634+16
+	ldr	r3, .L1635+16
 	ldrh	r2, [r3]
 	cmp	r2, r5
-	beq	.L1552
+	beq	.L1553
 	.loc 5 604 0
-	ldr	r1, .L1634+4
+	ldr	r1, .L1635+4
 	ldr	r1, [r1]
 	ldrh	r2, [r1, r2, lsl #1]
-	cbnz	r2, .L1553
+	cbnz	r2, .L1554
 	.loc 5 605 0
 	strh	r5, [r3]	@ movhi
-.L1553:
+.L1554:
 	.loc 5 606 0
 	ldrh	r2, [r3]
 	strh	r2, [r6]	@ movhi
 	.loc 5 607 0
 	movw	r2, #65535
 	strh	r2, [r3]	@ movhi
-	b	.L1552
-.LVL1759:
-.L1556:
+	b	.L1553
+.LVL1761:
+.L1557:
 	.loc 5 626 0
 	movw	r3, #65535
 	strh	r3, [r6]	@ movhi
-.LVL1760:
-.L1630:
+.LVL1762:
+.L1631:
 	.loc 5 652 0
-	ldr	r3, .L1634+20
+	ldr	r3, .L1635+20
 	ldrh	r0, [r3]
-	b	.L1514
-.LVL1761:
-.L1560:
+	b	.L1515
+.LVL1763:
+.L1561:
 	str	r0, [sp, #16]
 	.loc 5 640 0
 	mov	r0, r3
 	str	r3, [sp, #12]
 	adds	r7, r7, #1
 	bl	IsBlkInGcList
-.LVL1762:
+.LVL1764:
 	ldr	r3, [sp, #12]
 	ldr	r2, [sp, #16]
-	cbz	r0, .L1561
+	cbz	r0, .L1562
 	.loc 5 641 0
 	strh	r7, [r8]	@ movhi
-	b	.L1559
-.L1561:
+	b	.L1560
+.L1562:
 	.loc 5 645 0
 	uxth	r0, r2
-	ldr	r2, .L1634+24
-	ldr	r10, .L1634+4
+	ldr	r2, .L1635+24
+	ldr	r10, .L1635+4
 	.loc 5 644 0
 	uxth	r7, r7
 	.loc 5 645 0
 	ldrh	lr, [r2]
-	ldr	r2, .L1634+8
+	ldr	r2, .L1635+8
 	ldr	r1, [r10]
 	.loc 5 644 0
 	strh	r7, [r8]	@ movhi
@@ -18906,96 +18933,96 @@ rk_ftl_garbage_collect:
 	ldrh	ip, [r1, r0, lsl #1]
 	mul	lr, r2, lr
 	cmp	ip, lr, asr #1
-	bgt	.L1563
+	bgt	.L1564
 	.loc 5 646 0
 	cmp	r7, #48
-	bls	.L1564
+	bls	.L1565
 	cmp	ip, #8
-	bls	.L1564
-	ldr	r7, .L1634+28
+	bls	.L1565
+	ldr	r7, .L1635+28
 	ldrh	r7, [r7]
 	cmp	r7, #35
-	bhi	.L1564
-.L1563:
+	bhi	.L1565
+.L1564:
 	.loc 5 647 0
-	ldr	r2, .L1634+32
+	ldr	r2, .L1635+32
 	movs	r7, #0
 	strh	r7, [r2]	@ movhi
-.L1564:
+.L1565:
 	.loc 5 649 0
 	ldrh	r1, [r1, r0, lsl #1]
 	cmp	lr, r1
-	bgt	.L1565
+	bgt	.L1566
 	movw	r2, #65535
 	cmp	r5, r2
-	bne	.L1565
+	bne	.L1566
 	.loc 5 651 0
-	ldr	r2, .L1634+32
+	ldr	r2, .L1635+32
 	movs	r3, #0
 	.loc 5 650 0
 	strh	r5, [fp]	@ movhi
 	.loc 5 651 0
 	strh	r3, [r2]	@ movhi
-	b	.L1630
-.L1565:
+	b	.L1631
+.L1566:
 	.loc 5 655 0
-	cbnz	r1, .L1566
+	cbnz	r1, .L1567
 	.loc 5 656 0
 	movw	r0, #65535
 	bl	decrement_vpc_count
-.LVL1763:
+.LVL1765:
 	.loc 5 657 0
-	ldr	r3, .L1634+32
-	ldr	r2, .L1634+32
+	ldr	r3, .L1635+32
+	ldr	r2, .L1635+32
 	ldrh	r3, [r3]
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
-	b	.L1559
-.L1566:
+	b	.L1560
+.L1567:
 	.loc 5 660 0
 	movs	r2, #0
 	strb	r2, [fp, #8]
 	.loc 5 662 0
-	ldr	r2, .L1634+36
+	ldr	r2, .L1635+36
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bne	.L1567
+	bne	.L1568
 	movw	r2, #662
-	ldr	r1, .L1634+40
-	ldr	r0, .L1634+44
+	ldr	r1, .L1635+40
+	ldr	r0, .L1635+44
 	bl	printf
-.LVL1764:
-.L1567:
+.LVL1766:
+.L1568:
 	.loc 5 663 0
-	ldr	r3, .L1634+48
+	ldr	r3, .L1635+48
 	ldrh	r2, [fp]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1568
+	bne	.L1569
 	movw	r2, #663
-	ldr	r1, .L1634+40
-	ldr	r0, .L1634+44
+	ldr	r1, .L1635+40
+	ldr	r0, .L1635+44
 	bl	printf
-.LVL1765:
-.L1568:
+.LVL1767:
+.L1569:
 	.loc 5 664 0
-	ldr	r3, .L1634+52
+	ldr	r3, .L1635+52
 	ldrh	r2, [fp]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1569
+	bne	.L1570
 	mov	r2, #664
-	ldr	r1, .L1634+40
-	ldr	r0, .L1634+44
+	ldr	r1, .L1635+40
+	ldr	r0, .L1635+44
 	bl	printf
-.LVL1766:
-.L1569:
+.LVL1768:
+.L1570:
 	.loc 5 665 0
 	mov	r0, r6
 	bl	make_superblock
-.LVL1767:
+.LVL1769:
 	.loc 5 666 0
-	ldr	r2, .L1634+56
+	ldr	r2, .L1635+56
 	movs	r3, #0
 	.loc 5 667 0
 	ldrh	r1, [fp]
@@ -19004,26 +19031,26 @@ rk_ftl_garbage_collect:
 	.loc 5 667 0
 	ldr	r2, [r10]
 	ldrh	r1, [r2, r1, lsl #1]
-	ldr	r2, .L1634+60
+	ldr	r2, .L1635+60
 	.loc 5 668 0
 	strh	r3, [fp, #2]	@ movhi
 	.loc 5 669 0
 	strb	r3, [fp, #6]
 	.loc 5 667 0
 	strh	r1, [r2]	@ movhi
-.L1558:
+.L1559:
 	.loc 5 675 0
 	bl	FtlReadRefresh
-.LVL1768:
+.LVL1770:
 	.loc 5 678 0
-	ldr	r3, .L1634+64
+	ldr	r3, .L1635+64
 	movs	r2, #1
 	str	r2, [r3]
 	.loc 5 679 0
-	ldr	r3, .L1634+24
+	ldr	r3, .L1635+24
 	ldrh	r3, [r3]
 	str	r3, [sp, #28]
-.LVL1769:
+.LVL1771:
 	.loc 5 680 0
 	ldrh	r3, [fp, #2]
 	ldr	r1, [sp, #28]
@@ -19033,50 +19060,50 @@ rk_ftl_garbage_collect:
 	itt	gt
 	movgt	r2, r1
 	subgt	r4, r2, r3
-.LVL1770:
+.LVL1772:
 	.loc 5 693 0
 	mov	r3, #0
 	.loc 5 681 0
 	it	gt
 	uxthgt	r4, r4
-.LVL1771:
-.L1628:
+.LVL1773:
+.L1629:
 	str	r3, [sp, #24]
-.LVL1772:
+.LVL1774:
 	.loc 5 683 0
 	ldrh	r3, [sp, #24]
 	cmp	r4, r3
-	bls	.L1579
+	bls	.L1580
 	.loc 5 685 0
-	ldr	r3, .L1634+8
+	ldr	r3, .L1635+8
 	.loc 5 687 0
 	movw	r10, #65535
 	.loc 5 688 0
 	ldrh	r8, [r6, #2]
-	ldr	r1, .L1634+68
+	ldr	r1, .L1635+68
 	.loc 5 685 0
 	ldrh	ip, [r3]
 	.loc 5 688 0
-	ldr	r3, .L1634+72
+	ldr	r3, .L1635+72
 	ldr	r0, [r3]
 	ldr	r3, [sp, #24]
 	add	r8, r8, r3
 	movs	r3, #0
 	str	r3, [sp, #12]
-	b	.L1580
-.LVL1773:
-.L1573:
+	b	.L1581
+.LVL1775:
+.L1574:
 	.loc 5 686 0
 	ldrh	r2, [r1, #2]!
-.LVL1774:
+.LVL1776:
 	.loc 5 687 0
 	cmp	r2, r10
-	beq	.L1572
+	beq	.L1573
 	.loc 5 688 0
 	ldr	r7, [sp, #12]
 	mov	lr, #20
 	orr	r2, r8, r2, lsl #10
-.LVL1775:
+.LVL1777:
 	mla	lr, lr, r7, r0
 	str	r2, [lr, #4]
 	.loc 5 689 0
@@ -19084,37 +19111,37 @@ rk_ftl_garbage_collect:
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r2, [sp, #12]
-.LVL1776:
-.L1572:
+.LVL1778:
+.L1573:
 	adds	r3, r3, #1
-.LVL1777:
-.L1580:
+.LVL1779:
+.L1581:
 	.loc 5 685 0
 	uxth	r2, r3
 	cmp	ip, r2
-	bhi	.L1573
+	bhi	.L1574
 	.loc 5 693 0
 	ldrb	r2, [r6, #8]	@ zero_extendqisi2
 	ldr	r1, [sp, #12]
 	bl	FlashReadPages
-.LVL1778:
+.LVL1780:
 	movs	r3, #0
-.LVL1779:
-.L1627:
+.LVL1781:
+.L1628:
 	str	r3, [sp, #20]
-.LVL1780:
+.LVL1782:
 	.loc 5 695 0
 	ldr	r2, [sp, #12]
 	ldrh	r3, [sp, #20]
 	cmp	r2, r3
-	bhi	.L1578
-.LVL1781:
+	bhi	.L1579
+.LVL1783:
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	b	.L1628
-.L1635:
+	b	.L1629
+.L1636:
 	.align	2
-.L1634:
+.L1635:
 	.word	.LANCHOR80
 	.word	.LANCHOR43
 	.word	.LANCHOR3
@@ -19134,72 +19161,72 @@ rk_ftl_garbage_collect:
 	.word	.LANCHOR117
 	.word	.LANCHOR82+14
 	.word	.LANCHOR95
-.LVL1782:
-.L1578:
+.LVL1784:
+.L1579:
 	ldr	r3, [sp, #20]
 	movs	r7, #20
 	muls	r7, r3, r7
 	.loc 5 696 0
-	ldr	r3, .L1636
+	ldr	r3, .L1637
 	ldr	r3, [r3]
 	adds	r2, r3, r7
-.LVL1783:
+.LVL1785:
 	.loc 5 697 0
 	ldr	r3, [r3, r7]
 	adds	r3, r3, #1
-	beq	.L1575
+	beq	.L1576
 	.loc 5 696 0
 	ldr	r3, [r2, #12]
 	.loc 5 697 0
 	ldrh	r2, [r3]
-.LVL1784:
+.LVL1786:
 	.loc 5 696 0
 	str	r3, [sp, #16]
 	.loc 5 697 0
 	movw	r3, #61589
-.LVL1785:
+.LVL1787:
 	cmp	r2, r3
-	bne	.L1575
+	bne	.L1576
 	.loc 5 699 0
 	ldr	r3, [sp, #16]
 	ldr	r8, [r3, #8]
-.LVL1786:
+.LVL1788:
 	.loc 5 700 0
 	cmp	r8, #-1
-	bne	.L1576
+	bne	.L1577
 	mov	r2, #700
-	ldr	r1, .L1636+4
-	ldr	r0, .L1636+8
+	ldr	r1, .L1637+4
+	ldr	r0, .L1637+8
 	bl	printf
-.LVL1787:
-.L1576:
+.LVL1789:
+.L1577:
 	.loc 5 701 0
 	movs	r2, #0
 	add	r1, sp, #44
 	mov	r0, r8
 	bl	log2phys
-.LVL1788:
+.LVL1790:
 	.loc 5 702 0
-	ldr	r3, .L1636
+	ldr	r3, .L1637
 	ldr	r1, [r3]
 	ldr	r3, [sp, #44]
 	add	r1, r1, r7
 	ldr	r2, [r1, #4]
 	cmp	r2, r3
-	bne	.L1575
+	bne	.L1576
 	.loc 5 704 0
-	ldr	r2, .L1636+12
+	ldr	r2, .L1637+12
 	.loc 5 705 0
 	mov	r10, #20
-	ldr	r8, .L1636+36
-.LVL1789:
+	ldr	r8, .L1637+36
+.LVL1791:
 	ldr	r1, [r1, #16]
 	.loc 5 704 0
 	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
 	.loc 5 705 0
-	ldr	r2, .L1636+16
+	ldr	r2, .L1637+16
 	ldr	r3, [r8]
 	ldr	r0, [r2]
 	str	r2, [sp, #36]
@@ -19208,7 +19235,7 @@ rk_ftl_garbage_collect:
 	str	r3, [sp, #32]
 	.loc 5 706 0
 	bl	Ftl_get_new_temp_ppa
-.LVL1790:
+.LVL1792:
 	ldr	r3, [sp, #32]
 	.loc 5 707 0
 	ldr	r2, [sp, #36]
@@ -19220,14 +19247,14 @@ rk_ftl_garbage_collect:
 	ldr	r2, [r2]
 	ldr	r3, [r8]
 	mla	r10, r10, r3, r2
-	ldr	r2, .L1636
+	ldr	r2, .L1637
 	.loc 5 715 0
 	adds	r3, r3, #1
 	.loc 5 707 0
 	ldr	r0, [r2]
 	add	r0, r0, r7
 	.loc 5 710 0
-	ldr	r7, .L1636+20
+	ldr	r7, .L1637+20
 	.loc 5 707 0
 	ldr	r2, [r0, #8]
 	str	r2, [r10, #8]
@@ -19241,7 +19268,7 @@ rk_ftl_garbage_collect:
 	ldrh	r2, [r7]
 	strh	r2, [r1, #2]	@ movhi
 	.loc 5 713 0
-	ldr	r2, .L1636+24
+	ldr	r2, .L1637+24
 	.loc 5 715 0
 	str	r3, [r8]
 	.loc 5 713 0
@@ -19250,37 +19277,37 @@ rk_ftl_garbage_collect:
 	.loc 5 716 0
 	movs	r1, #1
 	bl	FtlGcBufAlloc
-.LVL1791:
+.LVL1793:
 	.loc 5 717 0
 	ldrb	r2, [r7, #7]	@ zero_extendqisi2
 	ldr	r3, [r8]
 	cmp	r2, r3
-	beq	.L1577
+	beq	.L1578
 	ldrh	r3, [r7, #4]
-	cbnz	r3, .L1575
-.L1577:
+	cbnz	r3, .L1576
+.L1578:
 	.loc 5 718 0
 	bl	Ftl_gc_temp_data_write_back
-.LVL1792:
-	cbz	r0, .L1575
-.LVL1793:
-.L1631:
+.LVL1794:
+	cbz	r0, .L1576
+.LVL1795:
+.L1632:
 	.loc 5 733 0
-	ldr	r3, .L1636+28
+	ldr	r3, .L1637+28
 	movs	r2, #0
 	str	r2, [r3]
-	b	.L1630
-.LVL1794:
-.L1575:
+	b	.L1631
+.LVL1796:
+.L1576:
 	ldr	r3, [sp, #20]
 	adds	r3, r3, #1
-	b	.L1627
-.LVL1795:
-.L1579:
+	b	.L1628
+.LVL1797:
+.L1580:
 	.loc 5 727 0
 	ldrh	r3, [r6, #2]
 	add	r4, r4, r3
-.LVL1796:
+.LVL1798:
 	.loc 5 729 0
 	ldr	r3, [sp, #28]
 	.loc 5 727 0
@@ -19290,134 +19317,134 @@ rk_ftl_garbage_collect:
 	.loc 5 727 0
 	strh	r4, [r6, #2]	@ movhi
 	.loc 5 729 0
-	bls	.L1581
-	ldr	r3, .L1636+12
+	bls	.L1582
+	ldr	r3, .L1637+12
 	ldrh	r2, [r3]
-	ldr	r3, .L1636+32
+	ldr	r3, .L1637+32
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1582
-.L1581:
+	bne	.L1583
+.L1582:
 	.loc 5 731 0
-	ldr	r3, .L1636+36
+	ldr	r3, .L1637+36
 	ldr	r3, [r3]
-	cbz	r3, .L1583
+	cbz	r3, .L1584
 	.loc 5 732 0
 	bl	Ftl_gc_temp_data_write_back
-.LVL1797:
+.LVL1799:
 	cmp	r0, #0
-	bne	.L1631
-.L1583:
+	bne	.L1632
+.L1584:
 	.loc 5 737 0
-	ldr	r3, .L1636+12
+	ldr	r3, .L1637+12
 	ldrh	r1, [r3]
-	cbnz	r1, .L1584
-	ldr	r3, .L1636+40
+	cbnz	r1, .L1585
+	ldr	r3, .L1637+40
 	ldrh	r2, [r6]
 	ldr	r3, [r3]
 	ldrh	r0, [r3, r2, lsl #1]
-	cbz	r0, .L1584
+	cbz	r0, .L1585
 	.loc 5 739 0
 	strh	r1, [r3, r2, lsl #1]	@ movhi
 	.loc 5 740 0
 	ldrh	r0, [r6]
 	bl	update_vpc_list
-.LVL1798:
+.LVL1800:
 	.loc 5 741 0
 	bl	FtlCacheWriteBack
-.LVL1799:
+.LVL1801:
 	.loc 5 742 0
 	bl	l2p_flush
-.LVL1800:
+.LVL1802:
 	.loc 5 743 0
 	bl	FtlVpcTblFlush
-.LVL1801:
-.L1584:
+.LVL1803:
+.L1585:
 	.loc 5 745 0
 	movw	r3, #65535
 	strh	r3, [r6]	@ movhi
-.L1582:
+.L1583:
 	.loc 5 747 0
-	ldr	r3, .L1636+44
+	ldr	r3, .L1637+44
 	ldrh	r3, [r3]
 	cmp	r3, #2
-	bhi	.L1585
+	bhi	.L1586
 	.loc 5 749 0
-	ldr	r3, .L1636+48
+	ldr	r3, .L1637+48
 	ldrh	r4, [r3]
-.LVL1802:
-	b	.L1557
-.LVL1803:
-.L1585:
+.LVL1804:
+	b	.L1558
+.LVL1805:
+.L1586:
 	.loc 5 752 0
-	ldr	r2, .L1636+28
+	ldr	r2, .L1637+28
 	movs	r1, #0
 	str	r1, [r2]
 	.loc 5 754 0
-	ldr	r2, .L1636+52
+	ldr	r2, .L1637+52
 	ldrh	r0, [r2]
 	cmp	r0, #0
-	bne	.L1514
+	bne	.L1515
 	.loc 5 757 0
 	adds	r0, r3, #1
-.LVL1804:
-	b	.L1514
-.LVL1805:
-.L1589:
-.LBE291:
-.LBE293:
+.LVL1806:
+	b	.L1515
+.LVL1807:
+.L1590:
+.LBE295:
+.LBE297:
 	.loc 5 479 0
 	movs	r0, #0
-	b	.L1514
-.LVL1806:
-.L1520:
-.LBB294:
-.LBB292:
+	b	.L1515
+.LVL1808:
+.L1521:
+.LBB298:
+.LBB296:
 	.loc 5 527 0
 	cmp	r7, #0
-	beq	.L1587
-.LVL1807:
-.L1530:
+	beq	.L1588
+.LVL1809:
+.L1531:
 	.loc 5 557 0
-	ldr	r3, .L1636+20
+	ldr	r3, .L1637+20
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1598
-.LVL1808:
-.L1588:
-	ldr	r3, .L1636+56
+	bne	.L1599
+.LVL1810:
+.L1589:
+	ldr	r3, .L1637+56
 	movw	r2, #65535
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bne	.L1598
+	bne	.L1599
 	cmp	r5, r3
-	bne	.L1598
+	bne	.L1599
 	ldrh	r3, [r6]
 	cmp	r3, r5
-	beq	.L1542
-.LVL1809:
-.L1547:
+	beq	.L1543
+.LVL1811:
+.L1548:
 	.loc 5 556 0
 	movw	r5, #65535
-.L1598:
+.L1599:
 	movs	r4, #1
-	b	.L1541
-.LVL1810:
-.L1522:
+	b	.L1542
+.LVL1812:
+.L1523:
 	.loc 5 527 0
 	cmp	r7, #0
-	beq	.L1587
+	beq	.L1588
 	movw	r5, #65535
-	b	.L1588
-.LVL1811:
-.L1521:
+	b	.L1589
+.LVL1813:
+.L1522:
 	cmp	r7, #0
-	bne	.L1547
-	b	.L1587
-.L1637:
+	bne	.L1548
+	b	.L1588
+.L1638:
 	.align	2
-.L1636:
+.L1637:
 	.word	.LANCHOR95
 	.word	.LANCHOR177
 	.word	.LC1
@@ -19433,8 +19460,8 @@ rk_ftl_garbage_collect:
 	.word	.LANCHOR19
 	.word	.LANCHOR174
 	.word	.LANCHOR101
-.LBE292:
-.LBE294:
+.LBE296:
+.LBE298:
 	.cfi_endproc
 .LFE322:
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
@@ -19457,7 +19484,7 @@ sftl_gc:
 	movs	r1, #1
 	mov	r0, r1
 	b	rk_ftl_garbage_collect
-.LVL1812:
+.LVL1814:
 	.cfi_endproc
 .LFE323:
 	.size	sftl_gc, .-sftl_gc
@@ -19475,7 +19502,7 @@ FtlRead:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1813:
+.LVL1815:
 	.loc 3 824 0
 	cmp	r0, #16
 	.loc 3 814 0
@@ -19496,19 +19523,19 @@ FtlRead:
 	mov	r8, r3
 	str	r2, [sp, #32]
 	.loc 3 824 0
-	bne	.L1640
+	bne	.L1641
 	.loc 3 825 0
 	mov	r2, r3
-.LVL1814:
+.LVL1816:
 	ldr	r1, [sp, #32]
-.LVL1815:
+.LVL1817:
 	add	r0, r6, #256
-.LVL1816:
+.LVL1818:
 	bl	FtlVendorPartRead
-.LVL1817:
+.LVL1819:
 	str	r0, [sp, #4]
-.LVL1818:
-.L1639:
+.LVL1820:
+.L1640:
 	.loc 3 901 0
 	ldr	r0, [sp, #4]
 	add	sp, sp, #56
@@ -19516,31 +19543,31 @@ FtlRead:
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1819:
-.L1640:
+.LVL1821:
+.L1641:
 	.cfi_restore_state
 	.loc 3 830 0
 	ldr	r3, [sp, #32]
-.LVL1820:
+.LVL1822:
 	adds	r3, r1, r3
 	str	r3, [sp, #12]
-	ldr	r3, .L1671
+	ldr	r3, .L1672
 	ldr	r2, [sp, #12]
-.LVL1821:
+.LVL1823:
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1660
+	bhi	.L1661
 	.loc 3 830 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1671+4
+	ldr	r3, .L1672+4
 	ldr	r3, [r3]
 	adds	r0, r3, #1
-.LVL1822:
-	beq	.L1661
+.LVL1824:
+	beq	.L1662
 	.loc 3 833 0 is_stmt 1
 	bl	FtlCacheWriteBack
-.LVL1823:
+.LVL1825:
 	.loc 3 835 0
-	ldr	r3, .L1671+8
+	ldr	r3, .L1672+8
 	mov	r0, r6
 	.loc 3 828 0
 	movs	r7, #0
@@ -19550,40 +19577,40 @@ FtlRead:
 	ldrh	r4, [r3]
 	mov	r1, r4
 	bl	__aeabi_uidiv
-.LVL1824:
+.LVL1826:
 	.loc 3 836 0
 	ldr	r3, [sp, #12]
 	mov	r1, r4
 	.loc 3 835 0
 	str	r0, [sp, #16]
-.LVL1825:
+.LVL1827:
 	.loc 3 836 0
 	subs	r0, r3, #1
-.LVL1826:
+.LVL1828:
 	bl	__aeabi_uidiv
-.LVL1827:
+.LVL1829:
 	.loc 3 837 0
 	ldr	r3, [sp, #16]
 	.loc 3 841 0
-	ldr	r2, .L1671+12
+	ldr	r2, .L1672+12
 	.loc 3 835 0
 	ldr	r4, [sp, #16]
 	.loc 3 837 0
 	rsb	r3, r3, #1
 	.loc 3 836 0
 	str	r0, [sp, #20]
-.LVL1828:
+.LVL1830:
 	.loc 3 837 0
 	add	r3, r3, r0
 	.loc 3 828 0
 	str	r7, [sp, #28]
 	.loc 3 837 0
 	str	r3, [sp, #8]
-.LVL1829:
+.LVL1831:
 	.loc 3 841 0
 	ldr	r1, [sp, #8]
 	ldr	r3, [r2]
-.LVL1830:
+.LVL1832:
 	.loc 3 820 0
 	str	r7, [sp, #24]
 	.loc 3 815 0
@@ -19591,71 +19618,71 @@ FtlRead:
 	.loc 3 841 0
 	add	r3, r3, r1
 	str	r3, [r2]
-.LVL1831:
-.L1642:
+.LVL1833:
+.L1643:
 	.loc 3 842 0
 	ldr	r3, [sp, #8]
-	cbnz	r3, .L1658
+	cbnz	r3, .L1659
 	.loc 3 898 0
-	ldr	r3, .L1671+16
+	ldr	r3, .L1672+16
 	ldrh	r3, [r3]
-	cbnz	r3, .L1659
+	cbnz	r3, .L1660
 	.loc 3 898 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1671+20
+	ldr	r3, .L1672+20
 	ldrh	r3, [r3]
 	cmp	r3, #31
-	bhi	.L1639
-.L1659:
+	bhi	.L1640
+.L1660:
 	.loc 3 899 0 is_stmt 1
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
-.LVL1832:
-	b	.L1639
-.LVL1833:
-.L1658:
+.LVL1834:
+	b	.L1640
+.LVL1835:
+.L1659:
 	.loc 3 843 0
 	add	r1, sp, #52
 	movs	r2, #0
 	mov	r0, r4
 	bl	log2phys
-.LVL1834:
+.LVL1836:
 	.loc 3 844 0
 	ldr	r3, [sp, #52]
 	adds	r1, r3, #1
-	bne	.L1643
+	bne	.L1644
 	.loc 3 845 0 discriminator 1
-	ldr	fp, .L1671+8
+	ldr	fp, .L1672+8
 	mov	r10, #0
-.L1644:
-.LVL1835:
+.L1645:
+.LVL1837:
 	ldrh	r0, [fp]
 	cmp	r10, r0
-	bcc	.L1646
-.LVL1836:
-.L1647:
+	bcc	.L1647
+.LVL1838:
+.L1648:
 	.loc 3 874 0
 	ldr	r3, [sp, #8]
 	.loc 3 872 0
 	adds	r4, r4, #1
-.LVL1837:
+.LVL1839:
 	.loc 3 874 0
 	subs	r3, r3, #1
-.LVL1838:
+.LVL1840:
 	str	r3, [sp, #8]
-	beq	.L1651
+	beq	.L1652
 	.loc 3 874 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1671+24
-.LVL1839:
+	ldr	r3, .L1672+24
+.LVL1841:
 	ldrh	r3, [r3]
 	cmp	r5, r3, lsl #2
-	bne	.L1642
-.L1651:
+	bne	.L1643
+.L1652:
 	.loc 3 875 0 is_stmt 1
 	cmp	r5, #0
-	beq	.L1642
+	beq	.L1643
 	.loc 3 876 0
-	ldr	r3, .L1671+28
+	ldr	r3, .L1672+28
 	movs	r2, #0
 	mov	r1, r5
 	.loc 3 877 0
@@ -19663,7 +19690,7 @@ FtlRead:
 	.loc 3 876 0
 	ldr	r0, [r3]
 	bl	FlashReadPages
-.LVL1840:
+.LVL1842:
 	.loc 3 883 0
 	lsls	r3, r7, #9
 	str	r3, [sp, #44]
@@ -19674,89 +19701,89 @@ FtlRead:
 	ldr	r3, [sp, #28]
 	lsls	r3, r3, #9
 	str	r3, [sp, #40]
-.LVL1841:
-.L1657:
+.LVL1843:
+.L1658:
 	movs	r3, #20
 	mul	fp, r3, r10
 	.loc 3 878 0
-	ldr	r3, .L1671+28
+	ldr	r3, .L1672+28
 	ldr	r2, [r3]
 	ldr	r3, [sp, #16]
 	add	r2, r2, fp
 	ldr	r1, [r2, #16]
 	cmp	r3, r1
-	bne	.L1653
+	bne	.L1654
 	.loc 3 879 0
 	ldr	r1, [r2, #8]
-	ldr	r2, .L1671+32
+	ldr	r2, .L1672+32
 	ldr	r2, [r2]
 	cmp	r1, r2
-	bne	.L1654
+	bne	.L1655
 	.loc 3 880 0
 	ldr	r3, [sp, #36]
 	mov	r0, r8
 	ldr	r2, [sp, #40]
 	add	r1, r1, r3
-.L1670:
+.L1671:
 	.loc 3 883 0
 	bl	ftl_memcpy
-.LVL1842:
-.L1654:
+.LVL1844:
+.L1655:
 	.loc 3 885 0
-	ldr	r3, .L1671+28
+	ldr	r3, .L1672+28
 	ldr	r2, [r3]
 	ldr	r3, [r2, fp]
 	add	r1, r2, fp
 	adds	r2, r3, #1
-	bne	.L1655
+	bne	.L1656
 	.loc 3 886 0
-	ldr	r1, .L1671+36
+	ldr	r1, .L1672+36
 	.loc 3 887 0
 	str	r3, [sp, #4]
 	.loc 3 886 0
 	ldr	r2, [r1, #72]
 	adds	r2, r2, #1
 	str	r2, [r1, #72]
-.LVL1843:
-.L1656:
+.LVL1845:
+.L1657:
 	.loc 3 877 0 discriminator 2
 	add	r10, r10, #1
-.LVL1844:
+.LVL1846:
 	cmp	r5, r10
-	bne	.L1657
+	bne	.L1658
 	.loc 3 894 0
 	movs	r5, #0
-.LVL1845:
-	b	.L1642
-.LVL1846:
-.L1646:
+.LVL1847:
+	b	.L1643
+.LVL1848:
+.L1647:
 	.loc 3 846 0
 	mla	r0, r0, r4, r10
-.LVL1847:
+.LVL1849:
 	.loc 3 847 0
 	cmp	r6, r0
-	bhi	.L1645
+	bhi	.L1646
 	.loc 3 847 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #12]
 	cmp	r3, r0
-	bls	.L1645
+	bls	.L1646
 	.loc 3 848 0 is_stmt 1
 	subs	r0, r0, r6
-.LVL1848:
+.LVL1850:
 	mov	r2, #512
 	movs	r1, #0
 	add	r0, r8, r0, lsl #9
 	bl	ftl_memset
-.LVL1849:
-.L1645:
+.LVL1851:
+.L1646:
 	.loc 3 845 0 discriminator 2
 	add	r10, r10, #1
-.LVL1850:
-	b	.L1644
-.LVL1851:
-.L1643:
+.LVL1852:
+	b	.L1645
+.LVL1853:
+.L1644:
 	.loc 3 851 0
-	ldr	r2, .L1671+28
+	ldr	r2, .L1672+28
 	mov	r10, #20
 	ldr	r2, [r2]
 	mla	r10, r10, r5, r2
@@ -19764,10 +19791,10 @@ FtlRead:
 	.loc 3 852 0
 	ldr	r3, [sp, #16]
 	cmp	r4, r3
-	ldr	r3, .L1671+8
-	bne	.L1648
+	ldr	r3, .L1672+8
+	bne	.L1649
 	.loc 3 853 0
-	ldr	r2, .L1671+32
+	ldr	r2, .L1672+32
 	.loc 3 854 0
 	mov	r0, r6
 	ldrh	fp, [r3]
@@ -19779,29 +19806,29 @@ FtlRead:
 	str	r2, [r10, #8]
 	.loc 3 854 0
 	bl	__aeabi_uidivmod
-.LVL1852:
+.LVL1854:
 	ldr	r2, [sp, #32]
 	.loc 3 855 0
 	sub	r3, fp, r1
 	.loc 3 854 0
 	str	r1, [sp, #24]
-.LVL1853:
+.LVL1855:
 	cmp	r3, r2
 	it	cs
 	movcs	r3, r2
-.LVL1854:
+.LVL1856:
 	.loc 3 857 0
 	cmp	fp, r3
 	str	r3, [sp, #28]
-.LVL1855:
-	bne	.L1649
+.LVL1857:
+	bne	.L1650
 	.loc 3 858 0
 	str	r8, [r10, #8]
-.LVL1856:
-.L1649:
+.LVL1858:
+.L1650:
 	.loc 3 867 0
-	ldr	r3, .L1671+40
-	ldr	r2, .L1671+44
+	ldr	r3, .L1672+40
+	ldr	r2, .L1672+44
 	.loc 3 868 0
 	str	r4, [r10, #16]
 	.loc 3 867 0
@@ -19810,19 +19837,19 @@ FtlRead:
 	muls	r3, r5, r3
 	.loc 3 869 0
 	adds	r5, r5, #1
-.LVL1857:
+.LVL1859:
 	.loc 3 867 0
 	bic	r3, r3, #3
 	add	r3, r3, r2
 	str	r3, [r10, #12]
-	b	.L1647
-.L1648:
+	b	.L1648
+.L1649:
 	.loc 3 859 0
 	ldr	r2, [sp, #20]
 	cmp	r4, r2
-	bne	.L1650
+	bne	.L1651
 	.loc 3 860 0
-	ldr	r2, .L1671+48
+	ldr	r2, .L1672+48
 	.loc 3 861 0
 	ldr	r1, [sp, #12]
 	.loc 3 860 0
@@ -19832,67 +19859,67 @@ FtlRead:
 	ldrh	r2, [r3]
 	mul	r3, r2, r4
 	subs	r7, r1, r3
-.LVL1858:
+.LVL1860:
 	.loc 3 862 0
 	cmp	r2, r7
-	bne	.L1649
-.L1669:
+	bne	.L1650
+.L1670:
 	.loc 3 865 0
 	subs	r3, r3, r6
 	add	r3, r8, r3, lsl #9
 	str	r3, [r10, #8]
-	b	.L1649
-.L1650:
+	b	.L1650
+.L1651:
 	ldrh	r3, [r3]
 	muls	r3, r4, r3
-	b	.L1669
-.LVL1859:
-.L1653:
+	b	.L1670
+.LVL1861:
+.L1654:
 	.loc 3 881 0
 	ldr	r3, [sp, #20]
 	cmp	r3, r1
-	bne	.L1654
+	bne	.L1655
 	.loc 3 882 0
-	ldr	r3, .L1671+48
+	ldr	r3, .L1672+48
 	ldr	r1, [r2, #8]
 	ldr	r2, [r3]
 	cmp	r1, r2
-	bne	.L1654
+	bne	.L1655
 	.loc 3 883 0
-	ldr	r2, .L1671+8
+	ldr	r2, .L1672+8
 	ldr	r3, [sp, #20]
 	ldrh	r0, [r2]
 	ldr	r2, [sp, #44]
 	muls	r0, r3, r0
 	subs	r0, r0, r6
 	add	r0, r8, r0, lsl #9
-	b	.L1670
-.L1655:
+	b	.L1671
+.L1656:
 	.loc 3 889 0
 	cmp	r3, #256
-	bne	.L1656
-.LBB295:
+	bne	.L1657
+.LBB299:
 	.loc 3 890 0
 	ldr	r0, [r1, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1860:
+.LVL1862:
 	.loc 3 891 0
 	bl	FtlGcRefreshBlock
-.LVL1861:
-	b	.L1656
-.LVL1862:
-.L1660:
-.LBE295:
-	.loc 3 831 0
-	mov	r3, #-1
 .LVL1863:
+	b	.L1657
+.LVL1864:
 .L1661:
+.LBE299:
+	.loc 3 831 0
+	mov	r3, #-1
+.LVL1865:
+.L1662:
 	str	r3, [sp, #4]
-	b	.L1639
-.L1672:
+	b	.L1640
+.L1673:
 	.align	2
-.L1671:
+.L1672:
 	.word	.LANCHOR34
 	.word	.LANCHOR88
 	.word	.LANCHOR12
@@ -19924,17 +19951,17 @@ sftl_read:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL1864:
+.LVL1866:
 	.loc 3 1205 0
 	mov	r3, r2
 	mov	r2, r1
-.LVL1865:
+.LVL1867:
 	mov	r1, r0
-.LVL1866:
+.LVL1868:
 	movs	r0, #0
-.LVL1867:
+.LVL1869:
 	b	FtlRead
-.LVL1868:
+.LVL1870:
 	.cfi_endproc
 .LFE222:
 	.size	sftl_read, .-sftl_read
@@ -19952,7 +19979,7 @@ FtlWrite:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 64
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1869:
+.LVL1871:
 	.loc 3 970 0
 	cmp	r0, #16
 	.loc 3 962 0
@@ -19973,177 +20000,177 @@ FtlWrite:
 	str	r2, [sp, #16]
 	str	r3, [sp, #4]
 	.loc 3 970 0
-	bne	.L1675
+	bne	.L1676
 	.loc 3 971 0
 	mov	r2, r3
-.LVL1870:
+.LVL1872:
 	ldr	r1, [sp, #16]
-.LVL1871:
+.LVL1873:
 	add	r0, r8, #256
-.LVL1872:
+.LVL1874:
 	bl	FtlVendorPartWrite
-.LVL1873:
-.L1674:
+.LVL1875:
+.L1675:
 	.loc 3 1153 0
 	add	sp, sp, #64
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1874:
-.L1675:
+.LVL1876:
+.L1676:
 	.cfi_restore_state
 	.loc 3 974 0
 	ldr	r3, [sp, #16]
-.LVL1875:
+.LVL1877:
 	adds	r5, r1, r3
-	ldr	r3, .L1740
+	ldr	r3, .L1741
 	ldr	r3, [r3]
 	cmp	r5, r3
-	bhi	.L1717
+	bhi	.L1718
 	.loc 3 974 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1740+4
+	ldr	r3, .L1741+4
 	ldr	r0, [r3]
-.LVL1876:
+.LVL1878:
 	adds	r4, r0, #1
-	beq	.L1674
+	beq	.L1675
 	.loc 3 977 0 is_stmt 1
-	ldr	r3, .L1740+8
+	ldr	r3, .L1741+8
 	mov	r2, #2048
-.LVL1877:
+.LVL1879:
 	.loc 3 978 0
 	mov	r0, r8
 	.loc 3 977 0
 	str	r2, [r3]
 	.loc 3 978 0
-	ldr	r3, .L1740+12
+	ldr	r3, .L1741+12
 	ldrh	r4, [r3]
 	mov	r1, r4
-.LVL1878:
+.LVL1880:
 	bl	__aeabi_uidiv
-.LVL1879:
+.LVL1881:
 	.loc 3 979 0
 	mov	r1, r4
 	.loc 3 978 0
 	str	r0, [sp]
-.LVL1880:
+.LVL1882:
 	.loc 3 979 0
 	subs	r0, r5, #1
-.LVL1881:
+.LVL1883:
 	bl	__aeabi_uidiv
-.LVL1882:
+.LVL1884:
 	.loc 3 980 0
 	ldr	r2, [sp]
 	.loc 3 979 0
 	str	r0, [sp, #20]
-.LVL1883:
+.LVL1885:
 	.loc 3 980 0
 	subs	r5, r0, r2
 	.loc 3 982 0
-	ldr	r2, .L1740+16
+	ldr	r2, .L1741+16
 	.loc 3 980 0
 	adds	r3, r5, #1
 	.loc 3 982 0
 	adds	r1, r5, #1
 	.loc 3 980 0
 	str	r3, [sp, #8]
-.LVL1884:
+.LVL1886:
 	.loc 3 982 0
 	ldr	r3, [r2]
 	add	r3, r3, r1
 	str	r3, [r2]
 	.loc 3 983 0
-	ldr	r3, .L1740+20
+	ldr	r3, .L1741+20
 	ldr	r7, [r3]
-	cbz	r7, .L1677
+	cbz	r7, .L1678
 	.loc 3 984 0
 	ldr	r3, [r7, #16]
 	ldr	r2, [sp]
 	cmp	r2, r3
-	beq	.L1678
+	beq	.L1679
 	.loc 3 985 0
 	bl	FtlCacheWriteBack
-.LVL1885:
-.L1677:
+.LVL1887:
+.L1678:
 	.loc 3 1008 0
-	ldr	r3, .L1740+24
-	ldr	r4, .L1740+28
+	ldr	r3, .L1741+24
+	ldr	r4, .L1741+28
 	ldr	r3, [r3]
-	cbz	r3, .L1680
+	cbz	r3, .L1681
 	.loc 3 1008 0 is_stmt 0 discriminator 1
 	ldrh	r2, [r4, #4]
 	.loc 3 1009 0 is_stmt 1 discriminator 1
-	ldr	r3, .L1740+32
+	ldr	r3, .L1741+32
 	cmp	r2, #0
 	it	eq
 	moveq	r4, r3
-.L1680:
+.L1681:
 	.loc 3 1068 0
 	ldr	r6, [sp]
-.LVL1886:
-.L1681:
+.LVL1888:
+.L1682:
 	.loc 3 1011 0
 	ldr	r3, [sp, #8]
 	cmp	r3, #0
-	beq	.L1715
+	beq	.L1716
 	.loc 3 1012 0
-	ldr	r3, .L1740+36
+	ldr	r3, .L1741+36
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1682
+	bcc	.L1683
 	.loc 3 1012 0 is_stmt 0 discriminator 1
 	mov	r2, #1012
-	ldr	r1, .L1740+40
-	ldr	r0, .L1740+44
+	ldr	r1, .L1741+40
+	ldr	r0, .L1741+44
 	bl	printf
-.LVL1887:
-.L1682:
+.LVL1889:
+.L1683:
 	.loc 3 1013 0 is_stmt 1
 	ldrh	r7, [r4, #4]
-	cbnz	r7, .L1683
+	cbnz	r7, .L1684
 	.loc 3 1014 0
 	bl	FtlCacheWriteBack
-.LVL1888:
+.LVL1890:
 	.loc 3 1016 0
-	ldr	r3, .L1740+28
-	ldr	r5, .L1740+24
+	ldr	r3, .L1741+28
+	ldr	r5, .L1741+24
 	cmp	r4, r3
-	bne	.L1684
+	bne	.L1685
 	.loc 3 1017 0
-	ldr	r0, .L1740+32
+	ldr	r0, .L1741+32
 	ldrh	r4, [r0, #4]
-.LVL1889:
-	cbnz	r4, .L1685
+.LVL1891:
+	cbnz	r4, .L1686
 	.loc 3 1018 0
 	bl	allocate_new_data_superblock
-.LVL1890:
+.LVL1892:
 	.loc 3 1019 0
 	str	r4, [r5]
-.L1685:
+.L1686:
 	.loc 3 1021 0
-	ldr	r0, .L1740+28
+	ldr	r0, .L1741+28
 	bl	allocate_new_data_superblock
-.LVL1891:
+.LVL1893:
 	.loc 3 1023 0
-	ldr	r4, .L1740+28
+	ldr	r4, .L1741+28
 	.loc 3 1022 0
 	ldr	r2, [r5]
 	.loc 3 1023 0
-	ldr	r3, .L1740+32
+	ldr	r3, .L1741+32
 	cmp	r2, #0
 	it	ne
 	movne	r4, r3
-.L1686:
-.LVL1892:
+.L1687:
+.LVL1894:
 	.loc 3 1033 0
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1683
+	cbnz	r3, .L1684
 	.loc 3 1034 0
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-.LVL1893:
-.L1683:
+.LVL1895:
+.L1684:
 	.loc 3 1041 0
 	ldrb	r2, [r4, #7]	@ zero_extendqisi2
 	.loc 3 1043 0
@@ -20158,91 +20185,91 @@ FtlWrite:
 	it	cs
 	movcs	r2, r3
 	.loc 3 1045 0
-	ldr	r3, .L1740+36
+	ldr	r3, .L1741+36
 	str	r2, [sp, #36]
-.LVL1894:
+.LVL1896:
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-.LVL1895:
+.LVL1897:
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1687
+	bcc	.L1688
 	.loc 3 1045 0 is_stmt 0 discriminator 1
 	movw	r2, #1045
-	ldr	r1, .L1740+40
-	ldr	r0, .L1740+44
+	ldr	r1, .L1741+40
+	ldr	r0, .L1741+44
 	bl	printf
-.LVL1896:
-.L1687:
+.LVL1898:
+.L1688:
 	.loc 3 1054 0 is_stmt 1 discriminator 1
-	ldr	r10, .L1740+80
+	ldr	r10, .L1741+80
 	.loc 3 1068 0 discriminator 1
 	mov	fp, #0
-.L1688:
-.LVL1897:
+.L1689:
+.LVL1899:
 	.loc 3 1046 0 discriminator 1
 	ldr	r3, [sp, #36]
 	cmp	fp, r3
-	bne	.L1709
-.L1689:
-.LVL1898:
+	bne	.L1710
+.L1690:
+.LVL1900:
 	.loc 3 1127 0
-	ldr	r3, .L1740+20
+	ldr	r3, .L1741+20
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L1710
-.LVL1899:
+	beq	.L1711
+.LVL1901:
 	.loc 3 1129 0
 	ldr	r3, [sp, #8]
 	.loc 3 1130 0
 	subs	fp, fp, #1
-.LVL1900:
+.LVL1902:
 	.loc 3 1129 0
 	add	r3, r3, #-1
 	str	r3, [sp, #8]
-.LVL1901:
+.LVL1903:
 	.loc 3 1130 0
-	bne	.L1710
-.LVL1902:
-.L1715:
+	bne	.L1711
+.LVL1904:
+.L1716:
 	.loc 3 1137 0
 	ldr	r2, [sp]
 	movs	r0, #0
 	ldr	r3, [sp, #20]
-.LVL1903:
+.LVL1905:
 	.loc 3 1139 0
-	ldr	r4, .L1740+48
-.LVL1904:
+	ldr	r4, .L1741+48
+.LVL1906:
 	.loc 3 1137 0
 	subs	r1, r3, r2
 	bl	rk_ftl_garbage_collect
-.LVL1905:
+.LVL1907:
 	.loc 3 1139 0
 	ldrh	r2, [r4]
 	cmp	r2, #15
-	bhi	.L1712
+	bhi	.L1713
 	.loc 3 1141 0
-	ldr	r5, .L1740+52
-	ldr	r6, .L1740+56
-.LVL1906:
-.L1736:
+	ldr	r5, .L1741+52
+	ldr	r6, .L1741+56
+.LVL1908:
+.L1737:
 	ldrh	r3, [r5]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1716
+	bne	.L1717
 	.loc 3 1141 0 is_stmt 0 discriminator 1
 	ldrh	r2, [r6]
 	cmp	r2, r3
-	bne	.L1716
+	bne	.L1717
 	.loc 3 1142 0 is_stmt 1
 	movs	r0, #0
 	bl	List_get_gc_head_node
-.LVL1907:
+.LVL1909:
 	uxth	r0, r0
 	bl	FtlGcRefreshBlock
-.LVL1908:
-.L1716:
+.LVL1910:
+.L1717:
 	.loc 3 1143 0
-	ldr	r2, .L1740+60
+	ldr	r2, .L1741+60
 	movs	r3, #128
 	.loc 3 1145 0
 	movs	r1, #1
@@ -20250,38 +20277,38 @@ FtlWrite:
 	.loc 3 1143 0
 	strh	r3, [r2]	@ movhi
 	.loc 3 1144 0
-	ldr	r2, .L1740+64
+	ldr	r2, .L1741+64
 	strh	r3, [r2]	@ movhi
 	.loc 3 1145 0
 	bl	rk_ftl_garbage_collect
-.LVL1909:
+.LVL1911:
 	.loc 3 1146 0
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
-.LVL1910:
+.LVL1912:
 	.loc 3 1147 0
 	ldrh	r3, [r4]
 	cmp	r3, #8
-	bls	.L1736
-	b	.L1712
-.LVL1911:
-.L1678:
+	bls	.L1737
+	b	.L1713
+.LVL1913:
+.L1679:
 	.loc 3 987 0
-	ldr	r2, .L1740+68
-.LVL1912:
+	ldr	r2, .L1741+68
+.LVL1914:
 	.loc 3 988 0
 	mov	r1, r4
-.LVL1913:
+.LVL1915:
 	mov	r0, r8
-.LVL1914:
+.LVL1916:
 	.loc 3 987 0
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
 	.loc 3 988 0
 	bl	__aeabi_uidivmod
-.LVL1915:
+.LVL1917:
 	ldr	r2, [sp, #16]
 	.loc 3 989 0
 	subs	r4, r4, r1
@@ -20289,91 +20316,91 @@ FtlWrite:
 	ldr	r0, [r7, #8]
 	.loc 3 988 0
 	mov	r3, r1
-.LVL1916:
+.LVL1918:
 	.loc 3 992 0
 	ldr	r1, [sp, #4]
-.LVL1917:
+.LVL1919:
 	cmp	r4, r2
 	it	cs
 	movcs	r4, r2
-.LVL1918:
+.LVL1920:
 	lsls	r6, r4, #9
 	add	r0, r0, r3, lsl #9
 	mov	r2, r6
 	bl	ftl_memcpy
-.LVL1919:
+.LVL1921:
 	.loc 3 994 0
-	cbnz	r5, .L1679
-.LVL1920:
-.L1712:
+	cbnz	r5, .L1680
+.LVL1922:
+.L1713:
 	.loc 3 995 0
 	movs	r0, #0
-	b	.L1674
-.LVL1921:
-.L1679:
+	b	.L1675
+.LVL1923:
+.L1680:
 	.loc 3 996 0
 	ldr	r3, [sp, #16]
 	.loc 3 997 0
 	add	r8, r8, r4
-.LVL1922:
+.LVL1924:
 	.loc 3 996 0
 	subs	r3, r3, r4
 	str	r3, [sp, #16]
-.LVL1923:
+.LVL1925:
 	.loc 3 998 0
 	ldr	r3, [sp, #4]
-.LVL1924:
+.LVL1926:
 	add	r3, r3, r6
 	str	r3, [sp, #4]
-.LVL1925:
+.LVL1927:
 	.loc 3 999 0
 	ldr	r3, [sp]
-.LVL1926:
+.LVL1928:
 	adds	r3, r3, #1
 	str	r3, [sp]
-.LVL1927:
+.LVL1929:
 	.loc 3 1000 0
 	bl	FtlCacheWriteBack
-.LVL1928:
+.LVL1930:
 	str	r5, [sp, #8]
-	b	.L1677
-.LVL1929:
-.L1684:
+	b	.L1678
+.LVL1931:
+.L1685:
 	.loc 3 1028 0
 	ldrh	r2, [r3, #4]
 	.loc 3 1027 0
 	str	r7, [r5]
 	.loc 3 1028 0
-	cbnz	r2, .L1722
+	cbnz	r2, .L1723
 	.loc 3 1029 0
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-.LVL1930:
-	b	.L1686
-.L1722:
-	mov	r4, r3
-.LVL1931:
-	b	.L1683
 .LVL1932:
-.L1709:
+	b	.L1687
+.L1723:
+	mov	r4, r3
+.LVL1933:
+	b	.L1684
+.LVL1934:
+.L1710:
 	.loc 3 1047 0
 	ldrh	r2, [r4, #4]
 	cmp	r2, #0
-	beq	.L1689
+	beq	.L1690
 	.loc 3 1051 0
 	movs	r2, #0
 	add	r1, sp, #40
 	mov	r0, r6
 	movs	r7, #20
 	bl	log2phys
-.LVL1933:
+.LVL1935:
 	.loc 3 1052 0
 	mov	r0, r4
 	mul	r7, r7, fp
 	bl	get_new_active_ppa
-.LVL1934:
+.LVL1936:
 	.loc 3 1055 0
-	ldr	r3, .L1740+72
+	ldr	r3, .L1741+72
 	.loc 3 1054 0
 	ldr	r1, [r10]
 	.loc 3 1055 0
@@ -20383,12 +20410,12 @@ FtlWrite:
 	str	r0, [r1, #4]
 	.loc 3 1056 0
 	str	r6, [r1, #16]
-.LVL1935:
+.LVL1937:
 	.loc 3 1055 0
 	mul	r0, r2, fp
-.LVL1936:
+.LVL1938:
 	bic	r3, r0, #3
-	ldr	r0, .L1740+76
+	ldr	r0, .L1741+76
 	str	r3, [sp, #28]
 	ldr	r3, [r0]
 	ldr	r0, [sp, #28]
@@ -20398,23 +20425,23 @@ FtlWrite:
 	.loc 3 1059 0
 	mov	r0, r3
 	movs	r1, #0
-.LVL1937:
+.LVL1939:
 	.loc 3 1055 0
 	str	r3, [sp, #12]
-.LVL1938:
+.LVL1940:
 	.loc 3 1059 0
 	bl	ftl_memset
-.LVL1939:
+.LVL1941:
 	.loc 3 1061 0
 	ldr	r3, [sp]
-	ldr	r2, .L1740+12
+	ldr	r2, .L1741+12
 	cmp	r6, r3
-	beq	.L1690
+	beq	.L1691
 	.loc 3 1061 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #20]
 	cmp	r6, r3
-	bne	.L1735
-.LVL1940:
+	bne	.L1736
+.LVL1942:
 	.loc 3 1069 0 is_stmt 1
 	ldrh	r2, [r2]
 	ldr	r3, [sp, #16]
@@ -20426,11 +20453,11 @@ FtlWrite:
 	.loc 3 1069 0
 	subs	r5, r5, r2
 	uxth	r5, r5
-.LVL1941:
-	b	.L1693
-.L1741:
+.LVL1943:
+	b	.L1694
+.L1742:
 	.align	2
-.L1740:
+.L1741:
 	.word	.LANCHOR34
 	.word	.LANCHOR88
 	.word	.LANCHOR178
@@ -20452,27 +20479,27 @@ FtlWrite:
 	.word	.LANCHOR24
 	.word	.LANCHOR115
 	.word	.LANCHOR122
-.LVL1942:
-.L1690:
+.LVL1944:
+.L1691:
 	.loc 3 1063 0
 	ldrh	r5, [r2]
 	mov	r0, r8
 	mov	r1, r5
 	bl	__aeabi_uidivmod
-.LVL1943:
+.LVL1945:
 	ldr	r3, [sp, #16]
 	.loc 3 1064 0
 	subs	r5, r5, r1
 	.loc 3 1063 0
 	str	r1, [sp, #24]
-.LVL1944:
+.LVL1946:
 	cmp	r5, r3
 	it	cs
 	movcs	r5, r3
-.LVL1945:
-.L1693:
+.LVL1947:
+.L1694:
 	.loc 3 1072 0
-	ldr	r2, .L1742
+	ldr	r2, .L1743
 	.loc 3 1073 0
 	ldr	r3, [sp]
 	.loc 3 1072 0
@@ -20481,7 +20508,7 @@ FtlWrite:
 	.loc 3 1074 0
 	ldr	r2, [r10]
 	.loc 3 1072 0
-	bne	.L1694
+	bne	.L1695
 	.loc 3 1073 0
 	cmp	r6, r3
 	.loc 3 1074 0
@@ -20489,7 +20516,7 @@ FtlWrite:
 	.loc 3 1076 0
 	ittet	ne
 	mulne	r5, r5, r6
-.LVL1946:
+.LVL1948:
 	ldrne	r3, [sp, #4]
 	.loc 3 1074 0
 	ldreq	r3, [sp, #4]
@@ -20501,32 +20528,32 @@ FtlWrite:
 	.loc 3 1076 0
 	addne	r5, r3, r5, lsl #9
 	strne	r5, [r7, #8]
-.LVL1947:
-.L1696:
+.LVL1949:
+.L1697:
 	.loc 3 1119 0
-	ldr	r3, .L1742+4
+	ldr	r3, .L1743+4
 	ldrb	r1, [r4, #6]	@ zero_extendqisi2
 	ldrh	r2, [r3]
 	cmp	r1, r2
-	bcc	.L1706
+	bcc	.L1707
 	.loc 3 1119 0 is_stmt 0 discriminator 1
 	movw	r2, #1119
-	ldr	r1, .L1742+8
-	ldr	r0, .L1742+12
+	ldr	r1, .L1743+8
+	ldr	r0, .L1743+12
 	bl	printf
-.LVL1948:
-.L1706:
+.LVL1950:
+.L1707:
 	.loc 3 1120 0 is_stmt 1
 	ldr	r3, [sp, #32]
 	movw	r2, #61589
 	ldr	r1, [sp, #28]
 	.loc 3 1046 0
 	add	fp, fp, #1
-.LVL1949:
+.LVL1951:
 	.loc 3 1120 0
 	strh	r2, [r3, r1]	@ movhi
 	.loc 3 1121 0
-	ldr	r1, .L1742+16
+	ldr	r1, .L1743+16
 	ldr	r3, [sp, #12]
 	ldr	r2, [r1]
 	str	r2, [r3, #4]
@@ -20544,30 +20571,30 @@ FtlWrite:
 	str	r6, [r3, #8]
 	.loc 3 1125 0
 	adds	r6, r6, #1
-.LVL1950:
+.LVL1952:
 	.loc 3 1123 0
 	str	r2, [r3, #12]
 	.loc 3 1124 0
 	ldrh	r2, [r4]
 	strh	r2, [r3, #2]	@ movhi
-	b	.L1688
-.LVL1951:
-.L1694:
+	b	.L1689
+.LVL1953:
+.L1695:
 	.loc 3 1079 0
 	cmp	r6, r3
 	.loc 3 1080 0
 	add	r2, r2, r7
 	ite	eq
-	ldreq	r1, .L1742+20
+	ldreq	r1, .L1743+20
 	.loc 3 1082 0
-	ldrne	r1, .L1742+24
+	ldrne	r1, .L1743+24
 	ldr	r1, [r1]
 	str	r1, [r2, #8]
 	.loc 3 1084 0
 	ldr	r2, [sp, #40]
 	adds	r1, r2, #1
-	beq	.L1699
-.LBB296:
+	beq	.L1700
+.LBB300:
 	.loc 3 1086 0
 	str	r2, [sp, #48]
 	.loc 3 1090 0
@@ -20590,23 +20617,23 @@ FtlWrite:
 	.loc 3 1090 0
 	movs	r2, #0
 	bl	FlashReadPages
-.LVL1952:
+.LVL1954:
 	.loc 3 1091 0
 	ldr	r2, [sp, #44]
 	adds	r2, r2, #1
-	bne	.L1700
+	bne	.L1701
 	.loc 3 1092 0
-	ldr	r1, .L1742+28
+	ldr	r1, .L1743+28
 	ldr	r2, [r1, #72]
 	adds	r2, r2, #1
 	str	r2, [r1, #72]
-.L1703:
-.LBE296:
+.L1704:
+.LBE300:
 	.loc 3 1104 0
 	ldr	r3, [sp]
 	lsls	r2, r5, #9
 	cmp	r6, r3
-	bne	.L1704
+	bne	.L1705
 	.loc 3 1105 0
 	ldr	r1, [r10]
 	ldr	r3, [sp, #24]
@@ -20614,73 +20641,73 @@ FtlWrite:
 	ldr	r0, [r1, #8]
 	ldr	r1, [sp, #4]
 	add	r0, r0, r3, lsl #9
-.L1738:
+.L1739:
 	.loc 3 1107 0
 	bl	ftl_memcpy
-.LVL1953:
+.LVL1955:
 	.loc 3 1109 0
 	ldr	r3, [sp, #20]
 	cmp	r6, r3
-	bne	.L1696
+	bne	.L1697
 	.loc 3 1110 0
 	ldrh	r2, [r4, #4]
 	cmp	r2, #0
-	beq	.L1696
+	beq	.L1697
 	.loc 3 1111 0
 	ldr	r2, [r10]
 	add	r7, r7, r2
-	ldr	r2, .L1742+32
+	ldr	r2, .L1743+32
 	str	r7, [r2]
 	.loc 3 1112 0
-	ldr	r2, .L1742+36
+	ldr	r2, .L1743+36
 	str	r4, [r2]
-	b	.L1696
-.L1700:
-.LBB297:
+	b	.L1697
+.L1701:
+.LBB301:
 	.loc 3 1094 0
 	ldr	r3, [sp, #12]
 	ldr	r1, [r3, #8]
 	cmp	r6, r1
-	beq	.L1702
+	beq	.L1703
 	.loc 3 1095 0
-	ldr	r0, .L1742+28
+	ldr	r0, .L1743+28
 	ldr	r2, [r0, #72]
 	adds	r2, r2, #1
 	str	r2, [r0, #72]
 	.loc 3 1096 0
 	mov	r2, r6
-	ldr	r0, .L1742+40
+	ldr	r0, .L1743+40
 	bl	printf
-.LVL1954:
-.L1702:
+.LVL1956:
+.L1703:
 	.loc 3 1098 0
 	ldr	r3, [sp, #12]
 	ldr	r2, [r3, #8]
 	cmp	r6, r2
-	beq	.L1703
+	beq	.L1704
 	.loc 3 1098 0 is_stmt 0 discriminator 1
 	movw	r2, #1098
-	ldr	r1, .L1742+8
-	ldr	r0, .L1742+12
+	ldr	r1, .L1743+8
+	ldr	r0, .L1743+12
 	bl	printf
-.LVL1955:
-	b	.L1703
-.LVL1956:
-.L1699:
-.LBE297:
+.LVL1957:
+	b	.L1704
+.LVL1958:
+.L1700:
+.LBE301:
 	.loc 3 1101 0 is_stmt 1
 	ldr	r2, [r10]
 	movs	r1, #0
 	adds	r0, r2, r7
-	ldr	r2, .L1742+44
+	ldr	r2, .L1743+44
 	ldr	r0, [r0, #8]
 	ldrh	r2, [r2]
 	bl	ftl_memset
-.LVL1957:
-	b	.L1703
-.L1704:
+.LVL1959:
+	b	.L1704
+.L1705:
 	.loc 3 1107 0
-	ldr	r1, .L1742
+	ldr	r1, .L1743
 	ldr	r0, [r10]
 	ldr	r3, [sp, #4]
 	ldrh	r1, [r1]
@@ -20689,9 +20716,9 @@ FtlWrite:
 	muls	r1, r6, r1
 	sub	r1, r1, r8
 	add	r1, r3, r1, lsl #9
-	b	.L1738
-.LVL1958:
-.L1735:
+	b	.L1739
+.LVL1960:
+.L1736:
 	.loc 3 1117 0
 	ldrh	r2, [r2]
 	ldr	r3, [sp, #4]
@@ -20701,43 +20728,43 @@ FtlWrite:
 	sub	r2, r2, r8
 	add	r2, r3, r2, lsl #9
 	str	r2, [r7, #8]
-	b	.L1696
-.LVL1959:
-.L1710:
+	b	.L1697
+.LVL1961:
+.L1711:
 	.loc 3 1133 0
-	ldr	r0, .L1742+48
+	ldr	r0, .L1743+48
 	mov	r3, r4
 	movs	r2, #0
 	mov	r1, fp
 	ldr	r0, [r0]
 	bl	FtlProgPages
-.LVL1960:
+.LVL1962:
 	.loc 3 1134 0
 	ldr	r3, [sp, #8]
 	cmp	r3, fp
-	bcs	.L1713
+	bcs	.L1714
 	.loc 3 1134 0 is_stmt 0 discriminator 1
 	movw	r2, #1134
-	ldr	r1, .L1742+8
-	ldr	r0, .L1742+12
+	ldr	r1, .L1743+8
+	ldr	r0, .L1743+12
 	bl	printf
-.LVL1961:
-.L1713:
+.LVL1963:
+.L1714:
 	.loc 3 1135 0 is_stmt 1
 	ldr	r3, [sp, #8]
 	sub	r3, r3, fp
 	str	r3, [sp, #8]
-.LVL1962:
-	b	.L1681
-.LVL1963:
-.L1717:
+.LVL1964:
+	b	.L1682
+.LVL1965:
+.L1718:
 	.loc 3 975 0
 	mov	r0, #-1
-.LVL1964:
-	b	.L1674
-.L1743:
+.LVL1966:
+	b	.L1675
+.L1744:
 	.align	2
-.L1742:
+.L1743:
 	.word	.LANCHOR12
 	.word	.LANCHOR3
 	.word	.LANCHOR180
@@ -20769,17 +20796,17 @@ sftl_write:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL1965:
+.LVL1967:
 	.loc 3 1210 0
 	mov	r3, r2
 	mov	r2, r1
-.LVL1966:
+.LVL1968:
 	mov	r1, r0
-.LVL1967:
+.LVL1969:
 	movs	r0, #0
-.LVL1968:
+.LVL1970:
 	b	FtlWrite
-.LVL1969:
+.LVL1971:
 	.cfi_endproc
 .LFE223:
 	.size	sftl_write, .-sftl_write
@@ -20810,21 +20837,21 @@ FtlLoadSysInfo:
 	.loc 2 1368 0
 	movs	r1, #0
 	.loc 2 1365 0
-	ldr	r8, .L1766+136
+	ldr	r8, .L1767+136
 	.loc 2 1368 0
-	ldr	r5, .L1766
+	ldr	r5, .L1767
 	.loc 2 1365 0
 	ldr	r3, [r8]
-	ldr	r4, .L1766+4
+	ldr	r4, .L1767+4
 	.loc 2 1366 0
-	ldr	r10, .L1766+140
+	ldr	r10, .L1767+140
 	.loc 2 1368 0
 	ldrh	r2, [r5]
-	ldr	r7, .L1766+8
+	ldr	r7, .L1767+8
 	.loc 2 1365 0
 	str	r3, [r4, #8]
 	.loc 2 1369 0
-	ldr	r6, .L1766+12
+	ldr	r6, .L1767+12
 	.loc 2 1366 0
 	ldr	r3, [r10]
 	.loc 2 1368 0
@@ -20834,24 +20861,24 @@ FtlLoadSysInfo:
 	str	r3, [r4, #12]
 	.loc 2 1368 0
 	bl	ftl_memset
-.LVL1970:
+.LVL1972:
 	.loc 2 1369 0
 	ldrh	r0, [r6]
 	movw	r3, #65535
 	str	r7, [sp]
 	cmp	r0, r3
-	bne	.L1746
-.L1754:
+	bne	.L1747
+.L1755:
 	.loc 2 1370 0
 	mov	r0, #-1
-.L1745:
+.L1746:
 	.loc 2 1463 0
 	add	sp, sp, #8
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1746:
+.L1747:
 	.cfi_restore_state
 	.loc 2 1372 0
 	movs	r1, #1
@@ -20859,48 +20886,48 @@ FtlLoadSysInfo:
 	mov	fp, r4
 	.loc 2 1372 0
 	bl	FtlGetLastWrittenPage
-.LVL1971:
+.LVL1973:
 	.loc 2 1381 0
-	ldr	r3, .L1766+16
+	ldr	r3, .L1767+16
 	.loc 2 1372 0
 	sxth	r7, r0
-.LVL1972:
+.LVL1974:
 	.loc 2 1373 0
 	adds	r0, r0, #1
 	strh	r0, [r6, #2]	@ movhi
-.L1748:
+.L1749:
 	.loc 2 1375 0
 	cmp	r7, #0
-	bge	.L1751
+	bge	.L1752
 	.loc 2 1388 0
 	movw	r2, #1388
-	ldr	r1, .L1766+20
-	ldr	r0, .L1766+24
+	ldr	r1, .L1767+20
+	ldr	r0, .L1767+24
 	bl	printf
-.LVL1973:
-.L1750:
+.LVL1975:
+.L1751:
 	.loc 2 1390 0
-	ldr	r2, .L1766+28
+	ldr	r2, .L1767+28
 	ldrh	r3, [r5]
 	ldrh	r2, [r2]
 	adds	r3, r3, #24
 	cmp	r2, r3, lsl #1
-	bcs	.L1753
+	bcs	.L1754
 	.loc 2 1390 0 is_stmt 0 discriminator 1
 	movw	r2, #1390
-	ldr	r1, .L1766+20
-	ldr	r0, .L1766+24
+	ldr	r1, .L1767+20
+	ldr	r0, .L1767+24
 	bl	printf
-.LVL1974:
-.L1753:
+.LVL1976:
+.L1754:
 	.loc 2 1392 0 is_stmt 1
-	ldr	r7, .L1766+32
-.LVL1975:
+	ldr	r7, .L1767+32
+.LVL1977:
 	movs	r2, #48
 	ldr	r1, [r4, #8]
 	mov	r0, r7
 	bl	ftl_memcpy
-.LVL1976:
+.LVL1978:
 	.loc 2 1393 0
 	ldrh	r2, [r5]
 	ldr	r1, [r4, #8]
@@ -20909,7 +20936,7 @@ FtlLoadSysInfo:
 	adds	r1, r1, #48
 	ldr	r0, [r3]
 	bl	ftl_memcpy
-.LVL1977:
+.LVL1979:
 	.loc 2 1394 0
 	ldrh	r1, [r5]
 	ldr	r3, [r4, #8]
@@ -20920,17 +20947,17 @@ FtlLoadSysInfo:
 	adds	r2, r2, #4
 	bic	r1, r1, #3
 	add	r1, r1, r3
-	ldr	r3, .L1766+36
+	ldr	r3, .L1767+36
 	ldr	r0, [r3]
 	bl	ftl_memcpy
-.LVL1978:
+.LVL1980:
 	.loc 2 1396 0
 	ldr	r2, [r7]
-	ldr	r3, .L1766+16
+	ldr	r3, .L1767+16
 	cmp	r2, r3
-	bne	.L1754
+	bne	.L1755
 	.loc 2 1400 0
-	ldr	r3, .L1766+40
+	ldr	r3, .L1767+40
 	ldrb	r2, [r7, #10]	@ zero_extendqisi2
 	.loc 2 1399 0
 	ldrh	r5, [r7, #8]
@@ -20940,56 +20967,56 @@ FtlLoadSysInfo:
 	strh	r5, [r6, #6]	@ movhi
 	.loc 2 1400 0
 	cmp	r2, r3
-	bne	.L1754
+	bne	.L1755
 	.loc 2 1403 0
-	ldr	r3, .L1766+44
+	ldr	r3, .L1767+44
 	.loc 2 1404 0
-	ldr	r2, .L1766+48
+	ldr	r2, .L1767+48
 	.loc 2 1403 0
 	str	r5, [r3]
 	.loc 2 1404 0
-	ldr	r3, .L1766+52
+	ldr	r3, .L1767+52
 	ldrh	r3, [r3]
 	muls	r3, r5, r3
 	str	r3, [r2]
 	.loc 2 1405 0
-	ldr	r2, .L1766+56
+	ldr	r2, .L1767+56
 	ldrh	r2, [r2]
 	muls	r3, r2, r3
-	ldr	r2, .L1766+60
+	ldr	r2, .L1767+60
 	str	r3, [r2]
 	.loc 2 1406 0
-	ldr	r3, .L1766+64
+	ldr	r3, .L1767+64
 	ldr	r6, [r3]
-	ldr	r3, .L1766+68
+	ldr	r3, .L1767+68
 	ldrh	r0, [r3, #6]
-	ldr	r3, .L1766+72
+	ldr	r3, .L1767+72
 	subs	r0, r6, r0
 	ldrh	r1, [r3]
 	subs	r0, r0, r5
 	bl	__aeabi_uidiv
-.LVL1979:
-	ldr	r3, .L1766+76
+.LVL1981:
+	ldr	r3, .L1767+76
 	.loc 2 1412 0
 	cmp	r5, r6
 	.loc 2 1406 0
 	strh	r0, [r3]	@ movhi
 	.loc 2 1412 0
-	bls	.L1755
+	bls	.L1756
 	.loc 2 1412 0 is_stmt 0 discriminator 1
 	movw	r2, #1412
-	ldr	r1, .L1766+20
-	ldr	r0, .L1766+24
+	ldr	r1, .L1767+20
+	ldr	r0, .L1767+24
 	bl	printf
-.LVL1980:
-.L1755:
+.LVL1982:
+.L1756:
 	.loc 2 1415 0 is_stmt 1
 	ldrh	r2, [r4, #16]
 	.loc 2 1414 0
-	ldr	r3, .L1766+80
+	ldr	r3, .L1767+80
 	ldrh	ip, [r4, #14]
 	.loc 2 1419 0
-	ldr	r7, .L1766+84
+	ldr	r7, .L1767+84
 	.loc 2 1415 0
 	lsrs	r1, r2, #6
 	.loc 2 1416 0
@@ -21000,7 +21027,7 @@ FtlLoadSysInfo:
 	.loc 2 1415 0
 	strh	r1, [r3, #2]	@ movhi
 	.loc 2 1424 0
-	ldr	r1, .L1766+88
+	ldr	r1, .L1767+88
 	.loc 2 1417 0
 	strb	r2, [r3, #8]
 	.loc 2 1424 0
@@ -21036,7 +21063,7 @@ FtlLoadSysInfo:
 	.loc 2 1427 0
 	strb	r2, [r1, #8]
 	.loc 2 1429 0
-	ldr	r2, .L1766+92
+	ldr	r2, .L1767+92
 	strh	r5, [r2]	@ movhi
 	.loc 2 1430 0
 	ldrh	r5, [r4, #24]
@@ -21053,35 +21080,35 @@ FtlLoadSysInfo:
 	.loc 2 1432 0
 	strb	r5, [r2, #8]
 	.loc 2 1434 0
-	ldr	r5, .L1766+96
+	ldr	r5, .L1767+96
 	str	r3, [r5]
 	.loc 2 1435 0
-	ldr	r5, .L1766+100
+	ldr	r5, .L1767+100
 	str	r3, [r5]
 	.loc 2 1436 0
-	ldr	r5, .L1766+104
+	ldr	r5, .L1767+104
 	str	r3, [r5]
 	.loc 2 1437 0
-	ldr	r5, .L1766+108
+	ldr	r5, .L1767+108
 	str	r3, [r5]
 	.loc 2 1439 0
-	ldr	r5, .L1766+112
+	ldr	r5, .L1767+112
 	str	r6, [r5]
 	mov	r6, r1
 	.loc 2 1440 0
-	ldr	r5, .L1766+116
+	ldr	r5, .L1767+116
 	str	r3, [r5]
 	.loc 2 1441 0
-	ldr	r5, .L1766+120
+	ldr	r5, .L1767+120
 	str	r3, [r5]
 	.loc 2 1442 0
-	ldr	r5, .L1766+124
+	ldr	r5, .L1767+124
 	.loc 2 1444 0
 	ldr	lr, [r4, #40]
 	.loc 2 1442 0
 	str	r3, [r5]
 	.loc 2 1444 0
-	ldr	r3, .L1766+128
+	ldr	r3, .L1767+128
 	ldr	r5, [r3]
 	cmp	lr, r5
 	mov	r5, r2
@@ -21089,7 +21116,7 @@ FtlLoadSysInfo:
 	it	hi
 	strhi	lr, [r3]
 	.loc 2 1447 0
-	ldr	r3, .L1766+132
+	ldr	r3, .L1767+132
 	ldr	r2, [r4, #36]
 	ldr	r1, [r3]
 	cmp	r2, r1
@@ -21099,47 +21126,47 @@ FtlLoadSysInfo:
 	.loc 2 1450 0
 	movw	r3, #65535
 	cmp	ip, r3
-	beq	.L1758
+	beq	.L1759
 	.loc 2 1451 0
-	ldr	r0, .L1766+80
+	ldr	r0, .L1767+80
 	bl	make_superblock
-.LVL1981:
-.L1758:
+.LVL1983:
+.L1759:
 	.loc 2 1453 0
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1759
+	beq	.L1760
 	.loc 2 1454 0
-	ldr	r0, .L1766+88
+	ldr	r0, .L1767+88
 	bl	make_superblock
-.LVL1982:
-.L1759:
+.LVL1984:
+.L1760:
 	.loc 2 1456 0
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1760
+	beq	.L1761
 	.loc 2 1457 0
-	ldr	r0, .L1766+92
+	ldr	r0, .L1767+92
 	bl	make_superblock
-.LVL1983:
-.L1760:
+.LVL1985:
+.L1761:
 	.loc 2 1459 0
 	ldrh	r2, [r7]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1761
+	beq	.L1762
 	.loc 2 1460 0
-	ldr	r0, .L1766+84
+	ldr	r0, .L1767+84
 	bl	make_superblock
-.LVL1984:
-.L1761:
+.LVL1986:
+.L1762:
 	.loc 2 1462 0
 	movs	r0, #0
-	b	.L1745
-.LVL1985:
-.L1751:
+	b	.L1746
+.LVL1987:
+.L1752:
 	.loc 2 1376 0
 	ldrh	r2, [r6]
 	.loc 2 1378 0
@@ -21155,34 +21182,34 @@ FtlLoadSysInfo:
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL1986:
+.LVL1988:
 	.loc 2 1381 0
 	ldr	r2, [r4]
 	ldr	r3, [sp, #4]
 	adds	r2, r2, #1
-	beq	.L1749
+	beq	.L1750
 	.loc 2 1382 0 discriminator 1
 	ldr	r2, [r8]
 	.loc 2 1381 0 discriminator 1
 	ldr	r2, [r2]
 	cmp	r2, r3
-	bne	.L1749
+	bne	.L1750
 	.loc 2 1383 0
 	ldr	r2, [r10]
 	ldrh	r1, [r2]
 	.loc 2 1382 0
 	movw	r2, #61604
 	cmp	r1, r2
-	beq	.L1750
-.L1749:
+	beq	.L1751
+.L1750:
 	subs	r7, r7, #1
-.LVL1987:
+.LVL1989:
 	sxth	r7, r7
-.LVL1988:
-	b	.L1748
-.L1767:
+.LVL1990:
+	b	.L1749
+.L1768:
 	.align	2
-.L1766:
+.L1767:
 	.word	.LANCHOR5
 	.word	.LANCHOR108
 	.word	.LANCHOR43
@@ -21246,117 +21273,117 @@ FtlSysBlkInit:
 	.cfi_offset 14, -4
 	.loc 2 2310 0
 	movs	r3, #0
-	ldr	r6, .L1784
+	ldr	r6, .L1785
 	strh	r3, [r6]	@ movhi
 	.loc 2 2312 0
-	ldr	r3, .L1784+4
+	ldr	r3, .L1785+4
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
-.LVL1989:
+.LVL1991:
 	.loc 2 2313 0
 	bl	FtlScanSysBlk
-.LVL1990:
+.LVL1992:
 	.loc 2 2314 0
-	ldr	r3, .L1784+8
+	ldr	r3, .L1785+8
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1769
-.L1771:
+	bne	.L1770
+.L1772:
 	.loc 2 2315 0
 	mov	r7, #-1
-.L1768:
+.L1769:
 	.loc 2 2398 0
 	mov	r0, r7
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1769:
+.L1770:
 	.loc 2 2317 0
 	bl	FtlLoadSysInfo
-.LVL1991:
+.LVL1993:
 	mov	r7, r0
 	cmp	r0, #0
-	bne	.L1771
+	bne	.L1772
 	.loc 2 2320 0
 	bl	FtlLoadMapInfo
-.LVL1992:
+.LVL1994:
 	.loc 2 2321 0
 	bl	FtlLoadVonderInfo
-.LVL1993:
+.LVL1995:
 	.loc 2 2322 0
 	bl	Ftl_load_ext_data
-.LVL1994:
+.LVL1996:
 	.loc 2 2324 0
 	bl	FtlLoadEctTbl
-.LVL1995:
+.LVL1997:
 	.loc 2 2325 0
 	bl	FtlFreeSysBLkSort
-.LVL1996:
+.LVL1998:
 	.loc 2 2327 0
 	bl	SupperBlkListInit
-.LVL1997:
+.LVL1999:
 	.loc 2 2328 0
 	bl	FtlPowerLostRecovery
-.LVL1998:
+.LVL2000:
 	.loc 2 2330 0
 	movs	r0, #1
 	bl	FtlUpdateVaildLpn
-.LVL1999:
-.LBB301:
-.LBB302:
+.LVL2001:
+.LBB305:
+.LBB306:
 	.loc 2 2332 0
-	ldr	r3, .L1784+12
+	ldr	r3, .L1785+12
 	.loc 2 2333 0
 	movs	r0, #12
 	.loc 2 2332 0
 	ldrh	r1, [r3]
 	.loc 2 2333 0
-	ldr	r3, .L1784+16
+	ldr	r3, .L1785+16
 	ldr	r2, [r3]
 	.loc 2 2332 0
 	mov	r3, r7
-.L1772:
-.LVL2000:
+.L1773:
+.LVL2002:
 	cmp	r3, r1
-	bge	.L1777
+	bge	.L1778
 	.loc 2 2333 0
 	mla	r4, r0, r3, r2
 	ldr	r4, [r4, #4]
 	cmp	r4, #0
-	bge	.L1773
-.L1777:
+	bge	.L1774
+.L1778:
 	.loc 2 2336 0
-	ldr	r4, .L1784+20
+	ldr	r4, .L1785+20
 	.loc 2 2338 0
 	cmp	r3, r1
-	ldr	r5, .L1784+24
+	ldr	r5, .L1785+24
 	.loc 2 2336 0
 	ldrh	r2, [r4, #28]
 	add	r2, r2, #1
 	strh	r2, [r4, #28]	@ movhi
 	.loc 2 2338 0
-	bge	.L1783
-.LVL2001:
-.L1774:
+	bge	.L1784
+.LVL2003:
+.L1775:
 	.loc 2 2340 0
-	ldr	r6, .L1784+28
+	ldr	r6, .L1785+28
 	.loc 2 2339 0
-	ldr	r0, .L1784+24
+	ldr	r0, .L1785+24
 	bl	FtlSuperblockPowerLostFix
-.LVL2002:
+.LVL2004:
 	.loc 2 2340 0
 	mov	r0, r6
 	bl	FtlSuperblockPowerLostFix
-.LVL2003:
-.LBB303:
+.LVL2005:
+.LBB307:
 	.loc 2 2346 0
-	ldr	r3, .L1784+32
+	ldr	r3, .L1785+32
 	ldrh	r1, [r5]
 	ldrh	r0, [r5, #4]
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
 	.loc 2 2347 0
-	ldr	r0, .L1784+36
+	ldr	r0, .L1785+36
 	.loc 2 2346 0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
 	.loc 2 2352 0
@@ -21372,97 +21399,97 @@ FtlSysBlkInit:
 	strb	r3, [r5, #6]
 	.loc 2 2349 0
 	strh	r3, [r5, #4]	@ movhi
-.LVL2004:
+.LVL2006:
 	.loc 2 2352 0
 	ldrh	r1, [r2, ip, lsl #1]
 	sub	r1, r1, lr
 	strh	r1, [r2, ip, lsl #1]	@ movhi
 	.loc 2 2353 0
 	ldrh	r2, [r0]
-.LBE303:
+.LBE307:
 	.loc 2 2359 0
-	ldr	r0, .L1784+40
-.LBB304:
+	ldr	r0, .L1785+40
+.LBB308:
 	.loc 2 2354 0
 	strb	r3, [r6, #6]
 	.loc 2 2353 0
 	strh	r2, [r6, #2]	@ movhi
 	.loc 2 2355 0
 	strh	r3, [r6, #4]	@ movhi
-.LBE304:
+.LBE308:
 	.loc 2 2359 0
 	bl	FtlMapBlkWriteDump_data
-.LVL2005:
+.LVL2007:
 	.loc 2 2360 0
-	ldr	r0, .L1784+44
+	ldr	r0, .L1785+44
 	bl	FtlMapBlkWriteDump_data
-.LVL2006:
+.LVL2008:
 	.loc 2 2372 0
 	ldrh	r3, [r4, #30]
 	adds	r3, r3, #1
 	strh	r3, [r4, #30]	@ movhi
 	.loc 2 2373 0
 	bl	l2p_flush
-.LVL2007:
+.LVL2009:
 	.loc 2 2374 0
 	bl	FtlVpcTblFlush
-.LVL2008:
+.LVL2010:
 	.loc 2 2375 0
 	bl	FtlVpcTblFlush
-.LVL2009:
-	b	.L1778
-.LVL2010:
-.L1773:
+.LVL2011:
+	b	.L1779
+.LVL2012:
+.L1774:
 	.loc 2 2332 0
 	adds	r3, r3, #1
-.LVL2011:
-	b	.L1772
-.L1783:
+.LVL2013:
+	b	.L1773
+.L1784:
 	.loc 2 2338 0
 	ldrh	r3, [r6]
-.LVL2012:
+.LVL2014:
 	cmp	r3, #0
-	bne	.L1774
-.L1778:
+	bne	.L1775
+.L1779:
 	.loc 2 2379 0
 	ldrh	r0, [r5]
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1779
+	beq	.L1780
 	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1779
+	cbnz	r3, .L1780
 	.loc 2 2381 0
-	ldr	r5, .L1784+28
+	ldr	r5, .L1785+28
 	.loc 2 2380 0
 	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1779
+	cbnz	r3, .L1780
 	.loc 2 2382 0
 	bl	FtlGcRefreshBlock
-.LVL2013:
+.LVL2015:
 	.loc 2 2383 0
 	ldrh	r0, [r5]
 	bl	FtlGcRefreshBlock
-.LVL2014:
+.LVL2016:
 	.loc 2 2384 0
-	ldr	r0, .L1784+24
+	ldr	r0, .L1785+24
 	bl	allocate_new_data_superblock
-.LVL2015:
+.LVL2017:
 	.loc 2 2385 0
 	mov	r0, r5
 	bl	allocate_new_data_superblock
-.LVL2016:
-.L1779:
+.LVL2018:
+.L1780:
 	.loc 2 2390 0
 	ldrh	r3, [r4, #28]
 	lsls	r3, r3, #27
-	bne	.L1768
+	bne	.L1769
 	.loc 2 2391 0
 	bl	FtlVpcCheckAndModify
-.LVL2017:
-	b	.L1768
-.L1785:
+.LVL2019:
+	b	.L1769
+.L1786:
 	.align	2
-.L1784:
+.L1785:
 	.word	.LANCHOR162
 	.word	.LANCHOR4
 	.word	.LANCHOR81
@@ -21475,8 +21502,8 @@ FtlSysBlkInit:
 	.word	.LANCHOR19
 	.word	.LANCHOR144
 	.word	.LANCHOR149
-.LBE302:
-.LBE301:
+.LBE306:
+.LBE305:
 	.cfi_endproc
 .LFE295:
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
@@ -21507,11 +21534,11 @@ ftl_low_format:
 	.loc 3 629 0
 	movs	r3, #0
 	.loc 3 631 0
-	ldr	r6, .L1810
+	ldr	r6, .L1811
 	.loc 3 630 0
-	ldr	r2, .L1810+4
+	ldr	r2, .L1811+4
 	.loc 3 629 0
-	ldr	r5, .L1810+8
+	ldr	r5, .L1811+8
 	.loc 3 631 0
 	ldrh	r0, [r6]
 	.loc 3 630 0
@@ -21520,96 +21547,96 @@ ftl_low_format:
 	str	r3, [r5]
 	.loc 3 631 0
 	bl	FtlFreeSysBlkQueueInit
-.LVL2018:
+.LVL2020:
 	.loc 3 632 0
 	bl	FtlLoadBbt
-.LVL2019:
-	cbz	r0, .L1787
+.LVL2021:
+	cbz	r0, .L1788
 	.loc 3 633 0
 	bl	FtlMakeBbt
-.LVL2020:
-.L1787:
+.LVL2022:
+.L1788:
 	.loc 3 635 0 discriminator 1
-	ldr	r3, .L1810+12
+	ldr	r3, .L1811+12
 	.loc 3 636 0 discriminator 1
-	ldr	r2, .L1810+16
+	ldr	r2, .L1811+16
 	.loc 3 637 0 discriminator 1
-	ldr	ip, .L1810+100
+	ldr	ip, .L1811+100
 	.loc 3 635 0 discriminator 1
 	ldrh	r1, [r3]
 	.loc 3 636 0 discriminator 1
 	ldr	r4, [r2]
 	.loc 3 637 0 discriminator 1
-	ldr	r2, .L1810+20
+	ldr	r2, .L1811+20
 	str	r3, [sp, #4]
 	.loc 3 635 0 discriminator 1
 	lsls	r1, r1, #7
 	.loc 3 637 0 discriminator 1
 	ldr	r7, [r2]
 	movs	r2, #0
-.L1788:
-.LVL2021:
+.L1789:
+.LVL2023:
 	.loc 3 635 0 discriminator 1
 	uxth	r3, r2
 	adds	r2, r2, #1
-.LVL2022:
+.LVL2024:
 	cmp	r3, r1
-	blt	.L1789
-.LVL2023:
+	blt	.L1790
+.LVL2025:
 	.loc 3 642 0
-	ldr	r3, .L1810+24
-.LVL2024:
+	ldr	r3, .L1811+24
+.LVL2026:
 	.loc 3 641 0
 	movs	r7, #0
 	.loc 3 642 0
-	ldr	r10, .L1810+104
+	ldr	r10, .L1811+104
 	ldrh	r4, [r3]
-.LVL2025:
+.LVL2027:
 	mov	r8, r3
 	mov	fp, r10
-.LVL2026:
-.L1790:
+.LVL2028:
+.L1791:
 	.loc 3 642 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r10]
 	cmp	r3, r4
-	bhi	.L1791
+	bhi	.L1792
 	.loc 3 645 0 is_stmt 1
-	ldr	r4, .L1810+28
-.LVL2027:
+	ldr	r4, .L1811+28
+.LVL2029:
 	subs	r3, r7, #2
 	ldrh	r1, [r4]
 	cmp	r3, r1, lsl #1
-	bgt	.L1792
-.LVL2028:
-.L1796:
+	bgt	.L1793
+.LVL2030:
+.L1797:
 	.loc 3 641 0
 	movs	r6, #0
 	mov	r7, r6
-.L1793:
+.L1794:
 	.loc 3 656 0 discriminator 1
 	ldrh	r3, [r8]
 	uxth	r0, r6
-.LVL2029:
+.LVL2031:
 	adds	r6, r6, #1
 	cmp	r3, r0
-	bhi	.L1797
+	bhi	.L1798
 	.loc 3 658 0
 	ldrh	r2, [fp]
-	ldr	r3, .L1810+32
+	ldr	r3, .L1811+32
 	.loc 3 661 0
 	ldrh	r4, [r4]
-	ldr	r6, .L1810+36
+	ldr	r6, .L1811+36
 	.loc 3 658 0
 	str	r2, [r3]
 	.loc 3 661 0
-	ldr	r3, .L1810+40
+	ldr	r3, .L1811+40
 	mov	r1, r4
 	ldr	r2, [r3]
 	mov	r0, r2
-.LVL2030:
+.LVL2032:
 	str	r2, [sp, #12]
 	bl	__aeabi_uidiv
-.LVL2031:
+.LVL2033:
 	.loc 3 662 0
 	ubfx	r10, r0, #5, #16
 	.loc 3 661 0
@@ -21617,21 +21644,21 @@ ftl_low_format:
 	str	r0, [r6]
 	.loc 3 662 0
 	add	r1, r10, #36
-	ldr	r0, .L1810+44
+	ldr	r0, .L1811+44
 	strh	r1, [r0]	@ movhi
 	.loc 3 663 0
 	movs	r1, #24
 	muls	r1, r4, r1
 	str	r0, [sp]
 	cmp	r7, r1
-	ble	.L1798
+	ble	.L1799
 	.loc 3 664 0
 	ldr	r2, [sp, #12]
 	mov	r1, r4
 	str	r3, [sp, #8]
 	subs	r0, r2, r7
 	bl	__aeabi_uidiv
-.LVL2032:
+.LVL2034:
 	.loc 3 665 0
 	ldr	r3, [sp]
 	.loc 3 664 0
@@ -21641,13 +21668,13 @@ ftl_low_format:
 	adds	r0, r0, #24
 	strh	r0, [r3]	@ movhi
 	ldr	r3, [sp, #8]
-.L1798:
+.L1799:
 	.loc 3 668 0
-	ldr	r2, .L1810+48
+	ldr	r2, .L1811+48
 	ldrh	r2, [r2]
-	cbz	r2, .L1800
+	cbz	r2, .L1801
 	.loc 3 669 0
-	ldr	r1, .L1810+44
+	ldr	r1, .L1811+44
 	ldrh	r0, [r1]
 	add	r0, r0, r2, lsr #1
 	strh	r0, [r1]	@ movhi
@@ -21662,20 +21689,20 @@ ftl_low_format:
 	.loc 3 672 0
 	addlt	r2, r2, r10
 	strhlt	r2, [r1]	@ movhi
-.L1800:
+.L1801:
 	.loc 3 677 0
 	ldr	r3, [sp]
-	ldr	r7, .L1810+52
-.LVL2033:
+	ldr	r7, .L1811+52
+.LVL2035:
 	.loc 3 687 0
-	ldr	r10, .L1810+108
+	ldr	r10, .L1811+108
 	.loc 3 677 0
 	ldrh	r2, [r3]
 	ldr	r3, [r6]
 	subs	r3, r3, r2
 	muls	r4, r3, r4
 	.loc 3 678 0
-	ldr	r3, .L1810+56
+	ldr	r3, .L1811+56
 	ldrh	r3, [r3]
 	.loc 3 677 0
 	str	r4, [r7]
@@ -21687,25 +21714,25 @@ ftl_low_format:
 	.loc 3 678 0
 	str	r4, [r6]
 	.loc 3 694 0
-	ldr	r6, .L1810+60
+	ldr	r6, .L1811+60
 	.loc 3 679 0
 	muls	r4, r3, r4
-	ldr	r3, .L1810+64
+	ldr	r3, .L1811+64
 	str	r4, [r3]
 	.loc 3 689 0
 	movw	r4, #65535
 	.loc 3 684 0
 	bl	FtlBbmTblFlush
-.LVL2034:
+.LVL2036:
 	.loc 3 687 0
 	ldrh	r2, [fp]
 	movs	r1, #0
 	ldr	r0, [r10]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-.LVL2035:
+.LVL2037:
 	.loc 3 688 0
-	ldr	r2, .L1810+68
+	ldr	r2, .L1811+68
 	movs	r3, #0
 	.loc 3 694 0
 	strh	r3, [r6, #2]	@ movhi
@@ -21716,7 +21743,7 @@ ftl_low_format:
 	.loc 3 688 0
 	str	r3, [r2]
 	.loc 3 689 0
-	ldr	r2, .L1810+72
+	ldr	r2, .L1811+72
 	.loc 3 696 0
 	strh	r3, [r6]	@ movhi
 	.loc 3 690 0
@@ -21737,21 +21764,21 @@ ftl_low_format:
 	.loc 3 701 0
 	mov	r10, r6
 	.loc 3 698 0
-	ldr	r3, .L1810+76
+	ldr	r3, .L1811+76
 	lsrs	r2, r2, #3
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL2036:
-.L1802:
+.LVL2038:
+.L1803:
 	.loc 3 701 0
 	mov	r0, r10
 	bl	make_superblock
-.LVL2037:
+.LVL2039:
 	.loc 3 702 0
 	ldrb	r3, [r6, #7]	@ zero_extendqisi2
 	ldrh	r2, [r6]
 	cmp	r3, #0
-	bne	.L1803
+	bne	.L1804
 	.loc 3 705 0
 	ldr	r3, [r8]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
@@ -21760,92 +21787,92 @@ ftl_low_format:
 	adds	r3, r3, #1
 	strh	r3, [r6]	@ movhi
 	.loc 3 707 0
-	b	.L1802
-.LVL2038:
-.L1789:
+	b	.L1803
+.LVL2040:
+.L1790:
 	.loc 3 636 0 discriminator 3
 	mvns	r0, r3
 	orr	r0, r3, r0, lsl #16
 	str	r0, [r4, r3, lsl #2]
 	.loc 3 637 0 discriminator 3
 	str	ip, [r7, r3, lsl #2]
-.LVL2039:
-	b	.L1788
-.LVL2040:
-.L1791:
+.LVL2041:
+	b	.L1789
+.LVL2042:
+.L1792:
 	.loc 3 643 0 discriminator 3
 	mov	r0, r4
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
-.LVL2041:
+.LVL2043:
 	.loc 3 642 0 discriminator 3
 	adds	r4, r4, #1
-.LVL2042:
+.LVL2044:
 	.loc 3 643 0 discriminator 3
 	add	r7, r7, r0
-.LVL2043:
+.LVL2045:
 	uxth	r7, r7
-.LVL2044:
+.LVL2046:
 	.loc 3 642 0 discriminator 3
 	uxth	r4, r4
-.LVL2045:
-	b	.L1790
-.LVL2046:
-.L1792:
+.LVL2047:
+	b	.L1791
+.LVL2048:
+.L1793:
 	.loc 3 647 0
 	mov	r0, r7
 	bl	__aeabi_uidiv
-.LVL2047:
-	ldr	r3, .L1810+80
+.LVL2049:
+	ldr	r3, .L1811+80
 	ldr	r3, [r3]
 	add	r0, r0, r3
 	uxth	r0, r0
 	bl	FtlSysBlkNumInit
-.LVL2048:
+.LVL2050:
 	.loc 3 648 0
 	ldrh	r0, [r6]
 	bl	FtlFreeSysBlkQueueInit
-.LVL2049:
+.LVL2051:
 	.loc 3 650 0
 	ldrh	r6, [r8]
-.LVL2050:
-.L1794:
+.LVL2052:
+.L1795:
 	.loc 3 650 0 is_stmt 0 discriminator 1
 	ldrh	r3, [fp]
 	cmp	r3, r6
-	bls	.L1796
+	bls	.L1797
 	.loc 3 651 0 is_stmt 1 discriminator 3
 	mov	r0, r6
 	movs	r1, #1
 	.loc 3 650 0 discriminator 3
 	adds	r6, r6, #1
-.LVL2051:
+.LVL2053:
 	.loc 3 651 0 discriminator 3
 	bl	FtlLowFormatEraseBlock
-.LVL2052:
+.LVL2054:
 	.loc 3 650 0 discriminator 3
 	uxth	r6, r6
-.LVL2053:
-	b	.L1794
-.LVL2054:
-.L1797:
+.LVL2055:
+	b	.L1795
+.LVL2056:
+.L1798:
 	.loc 3 657 0 discriminator 3
 	movs	r1, #0
 	bl	FtlLowFormatEraseBlock
-.LVL2055:
-	add	r7, r7, r0
-.LVL2056:
-	uxth	r7, r7
 .LVL2057:
-	b	.L1793
+	add	r7, r7, r0
 .LVL2058:
-.L1803:
+	uxth	r7, r7
+.LVL2059:
+	b	.L1794
+.LVL2060:
+.L1804:
 	.loc 3 709 0
 	ldr	r3, [r5]
 	.loc 3 710 0
 	ldrh	r1, [r6, #4]
 	.loc 3 712 0
-	ldr	r4, .L1810+84
+	ldr	r4, .L1811+84
 	.loc 3 709 0
 	str	r3, [r6, #12]
 	adds	r3, r3, #1
@@ -21871,15 +21898,15 @@ ftl_low_format:
 	.loc 3 715 0
 	movs	r3, #1
 	strb	r3, [r4, #8]
-.L1804:
+.L1805:
 	.loc 3 717 0
 	mov	r0, r10
 	bl	make_superblock
-.LVL2059:
+.LVL2061:
 	.loc 3 718 0
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r4]
-	cbnz	r3, .L1805
+	cbnz	r3, .L1806
 	.loc 3 721 0
 	ldr	r3, [r8]
 	strh	r6, [r3, r2, lsl #1]	@ movhi
@@ -21888,8 +21915,8 @@ ftl_low_format:
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
 	.loc 3 723 0
-	b	.L1804
-.L1805:
+	b	.L1805
+.L1806:
 	.loc 3 725 0
 	ldr	r3, [r5]
 	.loc 3 726 0
@@ -21904,12 +21931,12 @@ ftl_low_format:
 	ldr	r3, [r8]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
 	.loc 3 727 0
-	ldr	r3, .L1810+88
+	ldr	r3, .L1811+88
 	strh	r4, [r3]	@ movhi
 	.loc 3 730 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL2060:
-	ldr	r3, .L1810+92
+.LVL2062:
+	ldr	r3, .L1811+92
 	.loc 3 731 0
 	movs	r2, #0
 	strh	r2, [r3, #2]	@ movhi
@@ -21928,25 +21955,25 @@ ftl_low_format:
 	str	r2, [r5]
 	.loc 3 735 0
 	bl	FtlVpcTblFlush
-.LVL2061:
+.LVL2063:
 	.loc 3 736 0
 	bl	FtlSysBlkInit
-.LVL2062:
-	cbnz	r0, .L1806
+.LVL2064:
+	cbnz	r0, .L1807
 	.loc 3 737 0
-	ldr	r3, .L1810+96
+	ldr	r3, .L1811+96
 	movs	r2, #1
 	str	r2, [r3]
-.L1806:
+.L1807:
 	.loc 3 739 0
 	movs	r0, #0
 	add	sp, sp, #16
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1811:
+.L1812:
 	.align	2
-.L1810:
+.L1811:
 	.word	.LANCHOR4
 	.word	.LANCHOR72
 	.word	.LANCHOR71
@@ -21992,76 +22019,76 @@ sftl_init:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2063:
+.LVL2065:
 	push	{r4, lr}
 	.cfi_def_cfa_offset 8
 	.cfi_offset 4, -8
 	.cfi_offset 14, -4
 	.loc 3 746 0
 	mov	r3, #-1
-	ldr	r4, .L1818
+	ldr	r4, .L1819
 	.loc 3 749 0
-	ldr	r1, .L1818+4
-	ldr	r0, .L1818+8
+	ldr	r1, .L1819+4
+	ldr	r0, .L1819+8
 	.loc 3 746 0
 	str	r3, [r4]
 	.loc 3 749 0
 	bl	printf
-.LVL2064:
+.LVL2066:
 	.loc 3 750 0
-	ldr	r0, .L1818+12
+	ldr	r0, .L1819+12
 	bl	FtlConstantsInit
-.LVL2065:
+.LVL2067:
 	.loc 3 751 0
 	bl	FtlMemInit
-.LVL2066:
+.LVL2068:
 	.loc 3 752 0
 	bl	FtlVariablesInit
-.LVL2067:
+.LVL2069:
 	.loc 3 753 0
-	ldr	r3, .L1818+16
+	ldr	r3, .L1819+16
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
-.LVL2068:
+.LVL2070:
 .LDL2:
 	.loc 3 756 0
 	bl	FtlLoadBbt
-.LVL2069:
-	cbnz	r0, .L1816
+.LVL2071:
+	cbnz	r0, .L1817
 	.loc 3 767 0
 	bl	FtlSysBlkInit
-.LVL2070:
-	cbnz	r0, .L1816
+.LVL2072:
+	cbnz	r0, .L1817
 	.loc 3 779 0
 	movs	r3, #1
 	str	r3, [r4]
 	.loc 3 783 0
-	ldr	r3, .L1818+20
+	ldr	r3, .L1819+20
 	ldrh	r3, [r3]
 	cmp	r3, #15
-	bhi	.L1816
+	bhi	.L1817
 	movw	r4, #8129
-.L1815:
-.LVL2071:
-.LBB305:
+.L1816:
+.LVL2073:
+.LBB309:
 	.loc 3 786 0 discriminator 3
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
-.LVL2072:
+.LVL2074:
 	.loc 3 785 0 discriminator 3
 	subs	r4, r4, #1
-.LVL2073:
-	bne	.L1815
-.LVL2074:
-.L1816:
-.LBE305:
+.LVL2075:
+	bne	.L1816
+.LVL2076:
+.L1817:
+.LBE309:
 	.loc 3 794 0
 	movs	r0, #0
 	pop	{r4, pc}
-.L1819:
+.L1820:
 	.align	2
-.L1818:
+.L1819:
 	.word	.LANCHOR88
 	.word	.LC70
 	.word	.LC71
@@ -22080,18 +22107,18 @@ sftl_init:
 	.fpu softvfp
 	.type	ftl_memcmp, %function
 ftl_memcmp:
-.LFB350:
-	.loc 1 248 0
+.LFB351:
+	.loc 1 252 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL2075:
-	.loc 1 249 0
+.LVL2077:
+	.loc 1 253 0
 	b	memcmp
-.LVL2076:
+.LVL2078:
 	.cfi_endproc
-.LFE350:
+.LFE351:
 	.size	ftl_memcmp, .-ftl_memcmp
 	.global	ftl_temp_buf
 	.global	g_nand_ops
@@ -23504,17 +23531,17 @@ power_up_flag:
 	.size	__func__.10046, 23
 __func__.10046:
 	.ascii	"rk_ftl_garbage_collect\000"
-	.section	.rodata.__func__.10307,"a",%progbits
+	.section	.rodata.__func__.10310,"a",%progbits
 	.set	.LANCHOR106,. + 0
-	.type	__func__.10307, %object
-	.size	__func__.10307, 15
-__func__.10307:
+	.type	__func__.10310, %object
+	.size	__func__.10310, 15
+__func__.10310:
 	.ascii	"FlashReadPages\000"
-	.section	.rodata.__func__.10324,"a",%progbits
+	.section	.rodata.__func__.10327,"a",%progbits
 	.set	.LANCHOR110,. + 0
-	.type	__func__.10324, %object
-	.size	__func__.10324, 15
-__func__.10324:
+	.type	__func__.10327, %object
+	.size	__func__.10327, 15
+__func__.10327:
 	.ascii	"FlashProgPages\000"
 	.section	.rodata.__func__.8799,"a",%progbits
 	.set	.LANCHOR138,. + 0
@@ -23746,43 +23773,42 @@ __func__.9940:
 	.ascii	"%s\012\000"
 	.text
 .Letext0:
-	.file 6 "include/common.h"
-	.file 7 "./arch/arm/include/asm/types.h"
-	.file 8 "include/linux/types.h"
-	.file 9 "include/errno.h"
-	.file 10 "include/linux/string.h"
-	.file 11 "include/efi.h"
-	.file 12 "include/ide.h"
-	.file 13 "include/part.h"
-	.file 14 "include/flash.h"
-	.file 15 "include/lmb.h"
-	.file 16 "include/asm-generic/u-boot.h"
-	.file 17 "./arch/arm/include/asm/u-boot-arm.h"
-	.file 18 "include/../scripts/dtc/libfdt/fdt.h"
-	.file 19 "include/libfdt_env.h"
-	.file 20 "include/image.h"
-	.file 21 "include/net.h"
-	.file 22 "include/dm/uclass-id.h"
-	.file 23 "drivers/rkflash/sftl_inc.h"
-	.file 24 "drivers/rkflash/flash_com.h"
-	.file 25 "drivers/rkflash/sftl_struct.h"
-	.file 26 "drivers/rkflash/sftl_global.h"
-	.file 27 "include/malloc.h"
-	.file 28 "include/linux/compat.h"
+	.file 7 "include/common.h"
+	.file 8 "./arch/arm/include/asm/types.h"
+	.file 9 "include/linux/types.h"
+	.file 10 "include/errno.h"
+	.file 11 "include/linux/string.h"
+	.file 12 "include/efi.h"
+	.file 13 "include/ide.h"
+	.file 14 "include/part.h"
+	.file 15 "include/flash.h"
+	.file 16 "include/lmb.h"
+	.file 17 "include/asm-generic/u-boot.h"
+	.file 18 "./arch/arm/include/asm/u-boot-arm.h"
+	.file 19 "include/../scripts/dtc/libfdt/fdt.h"
+	.file 20 "include/libfdt_env.h"
+	.file 21 "include/image.h"
+	.file 22 "include/net.h"
+	.file 23 "include/dm/uclass-id.h"
+	.file 24 "drivers/rkflash/rksftl/sftl_inc.h"
+	.file 25 "drivers/rkflash/rksftl/flash_com.h"
+	.file 26 "drivers/rkflash/rksftl/sftl_struct.h"
+	.file 27 "drivers/rkflash/rksftl/sftl_global.h"
+	.file 28 "include/malloc.h"
 	.file 29 "include/stdio.h"
 	.file 30 "include/vsprintf.h"
 	.file 31 "include/log.h"
 	.section	.debug_info,"",%progbits
 .Ldebug_info0:
-	.4byte	0x9240
+	.4byte	0x92b3
 	.2byte	0x4
 	.4byte	.Ldebug_abbrev0
 	.byte	0x4
 	.uleb128 0x1
-	.4byte	.LASF880
-	.byte	0xc
-	.4byte	.LASF881
 	.4byte	.LASF882
+	.byte	0xc
+	.4byte	.LASF883
+	.4byte	.LASF884
 	.4byte	.Ldebug_ranges0+0x1c0
 	.4byte	0
 	.4byte	.Ldebug_line0
@@ -23792,7 +23818,7 @@ __func__.9940:
 	.4byte	.LASF0
 	.uleb128 0x3
 	.4byte	.LASF4
-	.byte	0x6
+	.byte	0x7
 	.byte	0xd
 	.4byte	0x37
 	.uleb128 0x2
@@ -23805,7 +23831,7 @@ __func__.9940:
 	.4byte	.LASF2
 	.uleb128 0x4
 	.4byte	.LASF20
-	.byte	0x9
+	.byte	0xa
 	.byte	0xc
 	.4byte	0x50
 	.uleb128 0x5
@@ -23818,7 +23844,7 @@ __func__.9940:
 	.4byte	.LASF3
 	.uleb128 0x3
 	.4byte	.LASF5
-	.byte	0x7
+	.byte	0x8
 	.byte	0xc
 	.4byte	0x37
 	.uleb128 0x2
@@ -23827,7 +23853,7 @@ __func__.9940:
 	.4byte	.LASF6
 	.uleb128 0x3
 	.4byte	.LASF7
-	.byte	0x7
+	.byte	0x8
 	.byte	0x12
 	.4byte	0x7b
 	.uleb128 0x2
@@ -23844,34 +23870,34 @@ __func__.9940:
 	.4byte	.LASF10
 	.uleb128 0x6
 	.ascii	"u8\000"
-	.byte	0x7
+	.byte	0x8
 	.byte	0x1f
 	.4byte	0x37
 	.uleb128 0x7
 	.4byte	0x90
 	.uleb128 0x6
 	.ascii	"u16\000"
-	.byte	0x7
+	.byte	0x8
 	.byte	0x22
 	.4byte	0x25
 	.uleb128 0x6
 	.ascii	"s32\000"
-	.byte	0x7
+	.byte	0x8
 	.byte	0x24
 	.4byte	0x50
 	.uleb128 0x6
 	.ascii	"u32\000"
-	.byte	0x7
+	.byte	0x8
 	.byte	0x25
 	.4byte	0x7b
 	.uleb128 0x3
 	.4byte	.LASF11
-	.byte	0x7
+	.byte	0x8
 	.byte	0x35
 	.4byte	0x3e
 	.uleb128 0x3
 	.4byte	.LASF12
-	.byte	0x7
+	.byte	0x8
 	.byte	0x36
 	.4byte	0x3e
 	.uleb128 0x2
@@ -23896,29 +23922,29 @@ __func__.9940:
 	.4byte	0xe3
 	.uleb128 0x3
 	.4byte	.LASF16
-	.byte	0x8
+	.byte	0x9
 	.byte	0x59
 	.4byte	0x25
 	.uleb128 0x3
 	.4byte	.LASF17
-	.byte	0x8
+	.byte	0x9
 	.byte	0x5b
 	.4byte	0x3e
 	.uleb128 0x3
 	.4byte	.LASF18
-	.byte	0x8
+	.byte	0x9
 	.byte	0x69
 	.4byte	0x5e
 	.uleb128 0x3
 	.4byte	.LASF19
-	.byte	0x8
+	.byte	0x9
 	.byte	0x97
 	.4byte	0x70
 	.uleb128 0x9
 	.byte	0x4
 	.uleb128 0x4
 	.4byte	.LASF21
-	.byte	0xa
+	.byte	0xb
 	.byte	0xb
 	.4byte	0xf6
 	.uleb128 0x2
@@ -23932,17 +23958,17 @@ __func__.9940:
 	.byte	0
 	.uleb128 0xc
 	.4byte	.LASF23
-	.byte	0xb
+	.byte	0xc
 	.2byte	0x140
 	.4byte	0x13c
 	.uleb128 0xc
 	.4byte	.LASF24
-	.byte	0xb
+	.byte	0xc
 	.2byte	0x143
 	.4byte	0x13c
 	.uleb128 0xc
 	.4byte	.LASF25
-	.byte	0xb
+	.byte	0xc
 	.2byte	0x143
 	.4byte	0x13c
 	.uleb128 0x8
@@ -23956,7 +23982,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x4
 	.4byte	.LASF26
-	.byte	0xc
+	.byte	0xd
 	.byte	0x10
 	.4byte	0x172
 	.uleb128 0xa
@@ -23969,18 +23995,18 @@ __func__.9940:
 	.uleb128 0xf
 	.4byte	.LASF29
 	.byte	0x8
-	.byte	0xd
+	.byte	0xe
 	.byte	0xf
 	.4byte	0x1bd
 	.uleb128 0x10
 	.4byte	.LASF27
-	.byte	0xd
+	.byte	0xe
 	.byte	0x10
 	.4byte	0xf6
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF28
-	.byte	0xd
+	.byte	0xe
 	.byte	0x11
 	.4byte	0x1d6
 	.byte	0x4
@@ -24007,41 +24033,41 @@ __func__.9940:
 	.4byte	0x1dc
 	.uleb128 0x4
 	.4byte	.LASF29
-	.byte	0xd
+	.byte	0xe
 	.byte	0xcd
 	.4byte	0x1e7
 	.uleb128 0x13
 	.2byte	0xa0c
-	.byte	0xe
+	.byte	0xf
 	.byte	0x13
 	.4byte	0x23e
 	.uleb128 0x10
 	.4byte	.LASF30
-	.byte	0xe
+	.byte	0xf
 	.byte	0x14
 	.4byte	0x107
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF31
-	.byte	0xe
+	.byte	0xf
 	.byte	0x15
 	.4byte	0xfc
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF32
-	.byte	0xe
+	.byte	0xf
 	.byte	0x16
 	.4byte	0x107
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF33
-	.byte	0xe
+	.byte	0xf
 	.byte	0x17
 	.4byte	0x23e
 	.byte	0xc
 	.uleb128 0x14
 	.4byte	.LASF34
-	.byte	0xe
+	.byte	0xf
 	.byte	0x18
 	.4byte	0x24f
 	.2byte	0x80c
@@ -24062,7 +24088,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x3
 	.4byte	.LASF35
-	.byte	0xe
+	.byte	0xf
 	.byte	0x32
 	.4byte	0x1f7
 	.uleb128 0xa
@@ -24072,7 +24098,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x4
 	.4byte	.LASF36
-	.byte	0xe
+	.byte	0xf
 	.byte	0x34
 	.4byte	0x26b
 	.uleb128 0x2
@@ -24082,18 +24108,18 @@ __func__.9940:
 	.uleb128 0xf
 	.4byte	.LASF38
 	.byte	0x8
-	.byte	0xf
+	.byte	0x10
 	.byte	0x10
 	.4byte	0x2ad
 	.uleb128 0x10
 	.4byte	.LASF39
-	.byte	0xf
+	.byte	0x10
 	.byte	0x11
 	.4byte	0xc0
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF30
-	.byte	0xf
+	.byte	0x10
 	.byte	0x12
 	.4byte	0xcb
 	.byte	0x4
@@ -24101,24 +24127,24 @@ __func__.9940:
 	.uleb128 0xf
 	.4byte	.LASF40
 	.byte	0x50
-	.byte	0xf
+	.byte	0x10
 	.byte	0x15
 	.4byte	0x2de
 	.uleb128 0x16
 	.ascii	"cnt\000"
-	.byte	0xf
+	.byte	0x10
 	.byte	0x16
 	.4byte	0x3e
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF30
-	.byte	0xf
+	.byte	0x10
 	.byte	0x17
 	.4byte	0xcb
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF41
-	.byte	0xf
+	.byte	0x10
 	.byte	0x18
 	.4byte	0x2de
 	.byte	0x8
@@ -24133,41 +24159,41 @@ __func__.9940:
 	.uleb128 0x17
 	.ascii	"lmb\000"
 	.byte	0xa0
-	.byte	0xf
+	.byte	0x10
 	.byte	0x1b
 	.4byte	0x313
 	.uleb128 0x10
 	.4byte	.LASF42
-	.byte	0xf
+	.byte	0x10
 	.byte	0x1c
 	.4byte	0x2ad
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF43
-	.byte	0xf
+	.byte	0x10
 	.byte	0x1d
 	.4byte	0x2ad
 	.byte	0x50
 	.byte	0
 	.uleb128 0x18
 	.ascii	"lmb\000"
-	.byte	0xf
+	.byte	0x10
 	.byte	0x20
 	.4byte	0x2ee
 	.uleb128 0x19
 	.byte	0x8
-	.byte	0x10
+	.byte	0x11
 	.byte	0x5a
 	.4byte	0x33f
 	.uleb128 0x10
 	.4byte	.LASF33
-	.byte	0x10
+	.byte	0x11
 	.byte	0x5b
 	.4byte	0xc0
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF30
-	.byte	0x10
+	.byte	0x11
 	.byte	0x5c
 	.4byte	0xcb
 	.byte	0x4
@@ -24175,120 +24201,120 @@ __func__.9940:
 	.uleb128 0xf
 	.4byte	.LASF44
 	.byte	0x58
-	.byte	0x10
+	.byte	0x11
 	.byte	0x1b
 	.4byte	0x430
 	.uleb128 0x10
 	.4byte	.LASF45
-	.byte	0x10
+	.byte	0x11
 	.byte	0x1c
 	.4byte	0x3e
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF46
-	.byte	0x10
+	.byte	0x11
 	.byte	0x1d
 	.4byte	0xcb
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF47
-	.byte	0x10
+	.byte	0x11
 	.byte	0x1e
 	.4byte	0x3e
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF48
-	.byte	0x10
+	.byte	0x11
 	.byte	0x1f
 	.4byte	0x3e
 	.byte	0xc
 	.uleb128 0x10
 	.4byte	.LASF49
-	.byte	0x10
+	.byte	0x11
 	.byte	0x20
 	.4byte	0x3e
 	.byte	0x10
 	.uleb128 0x10
 	.4byte	.LASF50
-	.byte	0x10
+	.byte	0x11
 	.byte	0x21
 	.4byte	0x3e
 	.byte	0x14
 	.uleb128 0x10
 	.4byte	.LASF51
-	.byte	0x10
+	.byte	0x11
 	.byte	0x22
 	.4byte	0x3e
 	.byte	0x18
 	.uleb128 0x10
 	.4byte	.LASF52
-	.byte	0x10
+	.byte	0x11
 	.byte	0x24
 	.4byte	0x3e
 	.byte	0x1c
 	.uleb128 0x10
 	.4byte	.LASF53
-	.byte	0x10
+	.byte	0x11
 	.byte	0x25
 	.4byte	0x3e
 	.byte	0x20
 	.uleb128 0x10
 	.4byte	.LASF54
-	.byte	0x10
+	.byte	0x11
 	.byte	0x26
 	.4byte	0x3e
 	.byte	0x24
 	.uleb128 0x10
 	.4byte	.LASF55
-	.byte	0x10
+	.byte	0x11
 	.byte	0x31
 	.4byte	0x3e
 	.byte	0x28
 	.uleb128 0x10
 	.4byte	.LASF56
-	.byte	0x10
+	.byte	0x11
 	.byte	0x32
 	.4byte	0x3e
 	.byte	0x2c
 	.uleb128 0x10
 	.4byte	.LASF57
-	.byte	0x10
+	.byte	0x11
 	.byte	0x33
 	.4byte	0x188
 	.byte	0x30
 	.uleb128 0x10
 	.4byte	.LASF58
-	.byte	0x10
+	.byte	0x11
 	.byte	0x34
 	.4byte	0x25
 	.byte	0x36
 	.uleb128 0x10
 	.4byte	.LASF59
-	.byte	0x10
+	.byte	0x11
 	.byte	0x35
 	.4byte	0x3e
 	.byte	0x38
 	.uleb128 0x10
 	.4byte	.LASF60
-	.byte	0x10
+	.byte	0x11
 	.byte	0x36
 	.4byte	0x3e
 	.byte	0x3c
 	.uleb128 0x10
 	.4byte	.LASF61
-	.byte	0x10
+	.byte	0x11
 	.byte	0x57
 	.4byte	0x107
 	.byte	0x40
 	.uleb128 0x10
 	.4byte	.LASF62
-	.byte	0x10
+	.byte	0x11
 	.byte	0x58
 	.4byte	0x107
 	.byte	0x44
 	.uleb128 0x10
 	.4byte	.LASF63
-	.byte	0x10
+	.byte	0x11
 	.byte	0x5d
 	.4byte	0x430
 	.byte	0x48
@@ -24302,114 +24328,114 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x3
 	.4byte	.LASF64
-	.byte	0x10
+	.byte	0x11
 	.byte	0x5f
 	.4byte	0x33f
 	.uleb128 0x4
 	.4byte	.LASF65
-	.byte	0x11
+	.byte	0x12
 	.byte	0x13
 	.4byte	0x107
 	.uleb128 0x4
 	.4byte	.LASF66
-	.byte	0x11
+	.byte	0x12
 	.byte	0x14
 	.4byte	0x107
 	.uleb128 0x4
 	.4byte	.LASF67
-	.byte	0x11
+	.byte	0x12
 	.byte	0x15
 	.4byte	0x107
 	.uleb128 0x4
 	.4byte	.LASF68
-	.byte	0x11
+	.byte	0x12
 	.byte	0x16
 	.4byte	0x107
 	.uleb128 0x4
 	.4byte	.LASF69
-	.byte	0x11
+	.byte	0x12
 	.byte	0x17
 	.4byte	0x107
 	.uleb128 0x4
 	.4byte	.LASF70
-	.byte	0x11
+	.byte	0x12
 	.byte	0x18
 	.4byte	0x107
 	.uleb128 0x4
 	.4byte	.LASF71
-	.byte	0x11
+	.byte	0x12
 	.byte	0x19
 	.4byte	0x107
 	.uleb128 0xf
 	.4byte	.LASF72
 	.byte	0x28
-	.byte	0x12
+	.byte	0x13
 	.byte	0x39
 	.4byte	0x51d
 	.uleb128 0x10
 	.4byte	.LASF73
-	.byte	0x12
+	.byte	0x13
 	.byte	0x3a
 	.4byte	0x52e
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF74
-	.byte	0x12
+	.byte	0x13
 	.byte	0x3b
 	.4byte	0x52e
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF75
-	.byte	0x12
+	.byte	0x13
 	.byte	0x3c
 	.4byte	0x52e
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF76
-	.byte	0x12
+	.byte	0x13
 	.byte	0x3d
 	.4byte	0x52e
 	.byte	0xc
 	.uleb128 0x10
 	.4byte	.LASF77
-	.byte	0x12
+	.byte	0x13
 	.byte	0x3e
 	.4byte	0x52e
 	.byte	0x10
 	.uleb128 0x10
 	.4byte	.LASF78
-	.byte	0x12
+	.byte	0x13
 	.byte	0x3f
 	.4byte	0x52e
 	.byte	0x14
 	.uleb128 0x10
 	.4byte	.LASF79
-	.byte	0x12
+	.byte	0x13
 	.byte	0x40
 	.4byte	0x52e
 	.byte	0x18
 	.uleb128 0x10
 	.4byte	.LASF80
-	.byte	0x12
+	.byte	0x13
 	.byte	0x43
 	.4byte	0x52e
 	.byte	0x1c
 	.uleb128 0x10
 	.4byte	.LASF81
-	.byte	0x12
+	.byte	0x13
 	.byte	0x46
 	.4byte	0x52e
 	.byte	0x20
 	.uleb128 0x10
 	.4byte	.LASF82
-	.byte	0x12
+	.byte	0x13
 	.byte	0x49
 	.4byte	0x52e
 	.byte	0x24
 	.byte	0
 	.uleb128 0x4
 	.4byte	.LASF83
-	.byte	0x13
+	.byte	0x14
 	.byte	0xf
 	.4byte	0x528
 	.uleb128 0x8
@@ -24417,84 +24443,84 @@ __func__.9940:
 	.4byte	0x498
 	.uleb128 0x3
 	.4byte	.LASF84
-	.byte	0x13
+	.byte	0x14
 	.byte	0x12
 	.4byte	0x11d
 	.uleb128 0x1a
 	.4byte	.LASF85
 	.byte	0x40
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x133
 	.4byte	0x5e3
 	.uleb128 0x1b
 	.4byte	.LASF86
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x134
 	.4byte	0x11d
 	.byte	0
 	.uleb128 0x1b
 	.4byte	.LASF87
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x135
 	.4byte	0x11d
 	.byte	0x4
 	.uleb128 0x1b
 	.4byte	.LASF88
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x136
 	.4byte	0x11d
 	.byte	0x8
 	.uleb128 0x1b
 	.4byte	.LASF89
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x137
 	.4byte	0x11d
 	.byte	0xc
 	.uleb128 0x1b
 	.4byte	.LASF90
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x138
 	.4byte	0x11d
 	.byte	0x10
 	.uleb128 0x1b
 	.4byte	.LASF91
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x139
 	.4byte	0x11d
 	.byte	0x14
 	.uleb128 0x1b
 	.4byte	.LASF92
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x13a
 	.4byte	0x11d
 	.byte	0x18
 	.uleb128 0x1b
 	.4byte	.LASF93
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x13b
 	.4byte	0x112
 	.byte	0x1c
 	.uleb128 0x1b
 	.4byte	.LASF94
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x13c
 	.4byte	0x112
 	.byte	0x1d
 	.uleb128 0x1b
 	.4byte	.LASF95
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x13d
 	.4byte	0x112
 	.byte	0x1e
 	.uleb128 0x1b
 	.4byte	.LASF96
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x13e
 	.4byte	0x112
 	.byte	0x1f
 	.uleb128 0x1b
 	.4byte	.LASF97
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x13f
 	.4byte	0x5e3
 	.byte	0x20
@@ -24508,258 +24534,258 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x1c
 	.4byte	.LASF98
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x140
 	.4byte	0x539
 	.uleb128 0x1a
 	.4byte	.LASF99
 	.byte	0x18
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x142
 	.4byte	0x681
 	.uleb128 0x1b
 	.4byte	.LASF33
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x143
 	.4byte	0x107
 	.byte	0
 	.uleb128 0x1d
 	.ascii	"end\000"
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x143
 	.4byte	0x107
 	.byte	0x4
 	.uleb128 0x1b
 	.4byte	.LASF100
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x144
 	.4byte	0x107
 	.byte	0x8
 	.uleb128 0x1b
 	.4byte	.LASF101
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x144
 	.4byte	0x107
 	.byte	0xc
 	.uleb128 0x1b
 	.4byte	.LASF102
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x145
 	.4byte	0x107
 	.byte	0x10
 	.uleb128 0x1b
 	.4byte	.LASF103
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x146
 	.4byte	0x112
 	.byte	0x14
 	.uleb128 0x1b
 	.4byte	.LASF104
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x146
 	.4byte	0x112
 	.byte	0x15
 	.uleb128 0x1d
 	.ascii	"os\000"
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x146
 	.4byte	0x112
 	.byte	0x16
 	.uleb128 0x1b
 	.4byte	.LASF105
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x147
 	.4byte	0x112
 	.byte	0x17
 	.byte	0
 	.uleb128 0x1c
 	.4byte	.LASF106
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x148
 	.4byte	0x5ff
 	.uleb128 0x1e
 	.4byte	.LASF107
 	.2byte	0x164
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x14e
 	.4byte	0x820
 	.uleb128 0x1b
 	.4byte	.LASF108
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x154
 	.4byte	0x820
 	.byte	0
 	.uleb128 0x1b
 	.4byte	.LASF109
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x155
 	.4byte	0x5f3
 	.byte	0x4
 	.uleb128 0x1b
 	.4byte	.LASF110
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x156
 	.4byte	0x107
 	.byte	0x44
 	.uleb128 0x1b
 	.4byte	.LASF111
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x159
 	.4byte	0xdd
 	.byte	0x48
 	.uleb128 0x1b
 	.4byte	.LASF112
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x15b
 	.4byte	0x128
 	.byte	0x4c
 	.uleb128 0x1b
 	.4byte	.LASF113
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x15c
 	.4byte	0xdd
 	.byte	0x50
 	.uleb128 0x1b
 	.4byte	.LASF114
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x15d
 	.4byte	0x50
 	.byte	0x54
 	.uleb128 0x1b
 	.4byte	.LASF115
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x15f
 	.4byte	0x128
 	.byte	0x58
 	.uleb128 0x1b
 	.4byte	.LASF116
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x160
 	.4byte	0xdd
 	.byte	0x5c
 	.uleb128 0x1b
 	.4byte	.LASF117
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x161
 	.4byte	0x50
 	.byte	0x60
 	.uleb128 0x1b
 	.4byte	.LASF118
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x163
 	.4byte	0x128
 	.byte	0x64
 	.uleb128 0x1b
 	.4byte	.LASF119
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x164
 	.4byte	0xdd
 	.byte	0x68
 	.uleb128 0x1b
 	.4byte	.LASF120
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x165
 	.4byte	0x50
 	.byte	0x6c
 	.uleb128 0x1b
 	.4byte	.LASF121
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x167
 	.4byte	0x128
 	.byte	0x70
 	.uleb128 0x1b
 	.4byte	.LASF122
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x168
 	.4byte	0xdd
 	.byte	0x74
 	.uleb128 0x1b
 	.4byte	.LASF123
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x169
 	.4byte	0x50
 	.byte	0x78
 	.uleb128 0x1d
 	.ascii	"os\000"
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x16d
 	.4byte	0x681
 	.byte	0x7c
 	.uleb128 0x1d
 	.ascii	"ep\000"
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x16e
 	.4byte	0x107
 	.byte	0x94
 	.uleb128 0x1b
 	.4byte	.LASF124
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x170
 	.4byte	0x107
 	.byte	0x98
 	.uleb128 0x1b
 	.4byte	.LASF125
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x170
 	.4byte	0x107
 	.byte	0x9c
 	.uleb128 0x1b
 	.4byte	.LASF126
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x172
 	.4byte	0xf6
 	.byte	0xa0
 	.uleb128 0x1b
 	.4byte	.LASF127
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x173
 	.4byte	0x107
 	.byte	0xa4
 	.uleb128 0x1b
 	.4byte	.LASF128
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x175
 	.4byte	0x107
 	.byte	0xa8
 	.uleb128 0x1b
 	.4byte	.LASF129
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x176
 	.4byte	0x107
 	.byte	0xac
 	.uleb128 0x1b
 	.4byte	.LASF130
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x177
 	.4byte	0x107
 	.byte	0xb0
 	.uleb128 0x1b
 	.4byte	.LASF131
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x178
 	.4byte	0x107
 	.byte	0xb4
 	.uleb128 0x1d
 	.ascii	"kbd\000"
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x179
 	.4byte	0x826
 	.byte	0xb8
 	.uleb128 0x1b
 	.4byte	.LASF132
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x17c
 	.4byte	0x50
 	.byte	0xbc
 	.uleb128 0x1b
 	.4byte	.LASF133
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x189
 	.4byte	0x50
 	.byte	0xc0
 	.uleb128 0x1d
 	.ascii	"lmb\000"
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x18c
 	.4byte	0x2ee
 	.byte	0xc4
@@ -24772,19 +24798,19 @@ __func__.9940:
 	.4byte	0x440
 	.uleb128 0x1c
 	.4byte	.LASF134
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x18e
 	.4byte	0x68d
 	.uleb128 0xc
 	.4byte	.LASF135
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x190
 	.4byte	0x82c
 	.uleb128 0x1f
 	.4byte	.LASF263
 	.byte	0x4
 	.4byte	0x50
-	.byte	0x16
+	.byte	0x17
 	.byte	0xe
 	.4byte	0xa41
 	.uleb128 0x20
@@ -25053,7 +25079,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x4
 	.4byte	.LASF219
-	.byte	0x6
+	.byte	0x7
 	.byte	0xa6
 	.4byte	0x107
 	.uleb128 0xa
@@ -25063,38 +25089,38 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x4
 	.4byte	.LASF220
-	.byte	0x6
+	.byte	0x7
 	.byte	0xa8
 	.4byte	0xa6f
 	.uleb128 0x4
 	.4byte	.LASF221
-	.byte	0x6
+	.byte	0x7
 	.byte	0xa9
 	.4byte	0xa6f
 	.uleb128 0x4
 	.4byte	.LASF222
-	.byte	0x6
+	.byte	0x7
 	.byte	0xf7
 	.4byte	0x107
 	.uleb128 0x4
 	.4byte	.LASF223
-	.byte	0x6
+	.byte	0x7
 	.byte	0xf8
 	.4byte	0x107
 	.uleb128 0x4
 	.4byte	.LASF224
-	.byte	0x6
+	.byte	0x7
 	.byte	0xf9
 	.4byte	0x107
 	.uleb128 0xf
 	.4byte	.LASF225
 	.byte	0x4
-	.byte	0x15
+	.byte	0x16
 	.byte	0x2e
 	.4byte	0xaca
 	.uleb128 0x10
 	.4byte	.LASF226
-	.byte	0x15
+	.byte	0x16
 	.byte	0x2f
 	.4byte	0x11d
 	.byte	0
@@ -25105,78 +25131,78 @@ __func__.9940:
 	.uleb128 0xf
 	.4byte	.LASF227
 	.byte	0x40
-	.byte	0x15
+	.byte	0x16
 	.byte	0xa6
 	.4byte	0xb6d
 	.uleb128 0x10
 	.4byte	.LASF27
-	.byte	0x15
+	.byte	0x16
 	.byte	0xa8
 	.4byte	0xb6d
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF228
-	.byte	0x15
+	.byte	0x16
 	.byte	0xa9
 	.4byte	0x188
 	.byte	0x10
 	.uleb128 0x10
 	.4byte	.LASF229
-	.byte	0x15
+	.byte	0x16
 	.byte	0xaa
 	.4byte	0xc0
 	.byte	0x18
 	.uleb128 0x10
 	.4byte	.LASF133
-	.byte	0x15
+	.byte	0x16
 	.byte	0xab
 	.4byte	0x50
 	.byte	0x1c
 	.uleb128 0x10
 	.4byte	.LASF230
-	.byte	0x15
+	.byte	0x16
 	.byte	0xad
 	.4byte	0xb97
 	.byte	0x20
 	.uleb128 0x10
 	.4byte	.LASF231
-	.byte	0x15
+	.byte	0x16
 	.byte	0xae
 	.4byte	0xbb6
 	.byte	0x24
 	.uleb128 0x10
 	.4byte	.LASF232
-	.byte	0x15
+	.byte	0x16
 	.byte	0xaf
 	.4byte	0xbcb
 	.byte	0x28
 	.uleb128 0x10
 	.4byte	.LASF233
-	.byte	0x15
+	.byte	0x16
 	.byte	0xb0
 	.4byte	0xbdc
 	.byte	0x2c
 	.uleb128 0x10
 	.4byte	.LASF234
-	.byte	0x15
+	.byte	0x16
 	.byte	0xb4
 	.4byte	0xbcb
 	.byte	0x30
 	.uleb128 0x10
 	.4byte	.LASF235
-	.byte	0x15
+	.byte	0x16
 	.byte	0xb5
 	.4byte	0xb91
 	.byte	0x34
 	.uleb128 0x10
 	.4byte	.LASF236
-	.byte	0x15
+	.byte	0x16
 	.byte	0xb6
 	.4byte	0x50
 	.byte	0x38
 	.uleb128 0x10
 	.4byte	.LASF237
-	.byte	0x15
+	.byte	0x16
 	.byte	0xb7
 	.4byte	0x128
 	.byte	0x3c
@@ -25234,7 +25260,7 @@ __func__.9940:
 	.4byte	0xbd1
 	.uleb128 0x4
 	.4byte	.LASF238
-	.byte	0x15
+	.byte	0x16
 	.byte	0xbd
 	.4byte	0xb91
 	.uleb128 0x23
@@ -25246,7 +25272,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0xc
 	.4byte	.LASF239
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x11e
 	.4byte	0xc09
 	.uleb128 0x8
@@ -25261,27 +25287,27 @@ __func__.9940:
 	.byte	0
 	.uleb128 0xc
 	.4byte	.LASF240
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x1fd
 	.4byte	0xab1
 	.uleb128 0xc
 	.4byte	.LASF241
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x1fe
 	.4byte	0xab1
 	.uleb128 0xc
 	.4byte	.LASF242
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x200
 	.4byte	0xab1
 	.uleb128 0xc
 	.4byte	.LASF243
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x205
 	.4byte	0xa54
 	.uleb128 0xc
 	.4byte	.LASF244
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x206
 	.4byte	0xa54
 	.uleb128 0xa
@@ -25293,32 +25319,32 @@ __func__.9940:
 	.byte	0
 	.uleb128 0xc
 	.4byte	.LASF245
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x207
 	.4byte	0xc5b
 	.uleb128 0xc
 	.4byte	.LASF246
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x209
 	.4byte	0xc0f
 	.uleb128 0xc
 	.4byte	.LASF247
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x20a
 	.4byte	0xc0f
 	.uleb128 0xc
 	.4byte	.LASF248
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x20b
 	.4byte	0xab1
 	.uleb128 0xc
 	.4byte	.LASF249
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x20c
 	.4byte	0xab1
 	.uleb128 0xc
 	.4byte	.LASF250
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x20d
 	.4byte	0xaca
 	.uleb128 0xa
@@ -25330,17 +25356,17 @@ __func__.9940:
 	.byte	0
 	.uleb128 0xc
 	.4byte	.LASF251
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x20e
 	.4byte	0xcb3
 	.uleb128 0xc
 	.4byte	.LASF252
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x20f
 	.4byte	0xaca
 	.uleb128 0xc
 	.4byte	.LASF253
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x210
 	.4byte	0x50
 	.uleb128 0xa
@@ -25354,27 +25380,27 @@ __func__.9940:
 	.4byte	0xce7
 	.uleb128 0xc
 	.4byte	.LASF254
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x211
 	.4byte	0xcf7
 	.uleb128 0xc
 	.4byte	.LASF255
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x212
 	.4byte	0xcf7
 	.uleb128 0xc
 	.4byte	.LASF256
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x216
 	.4byte	0xfc
 	.uleb128 0xc
 	.4byte	.LASF257
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x217
 	.4byte	0xfc
 	.uleb128 0xc
 	.4byte	.LASF258
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x219
 	.4byte	0x50
 	.uleb128 0xa
@@ -25386,29 +25412,29 @@ __func__.9940:
 	.byte	0
 	.uleb128 0xc
 	.4byte	.LASF259
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x220
 	.4byte	0xd38
 	.uleb128 0xc
 	.4byte	.LASF260
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x222
 	.4byte	0xb5
 	.uleb128 0xc
 	.4byte	.LASF261
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x224
 	.4byte	0xb5
 	.uleb128 0xc
 	.4byte	.LASF262
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x230
 	.4byte	0xab1
 	.uleb128 0x24
 	.4byte	.LASF264
 	.byte	0x4
 	.4byte	0x7b
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x286
 	.4byte	0xda3
 	.uleb128 0x20
@@ -25426,68 +25452,68 @@ __func__.9940:
 	.byte	0
 	.uleb128 0xc
 	.4byte	.LASF269
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x28c
 	.4byte	0xd79
 	.uleb128 0x3
 	.4byte	.LASF270
-	.byte	0x17
+	.byte	0x18
 	.byte	0x9
 	.4byte	0x37
 	.uleb128 0x3
 	.4byte	.LASF271
-	.byte	0x17
+	.byte	0x18
 	.byte	0xa
 	.4byte	0x25
 	.uleb128 0x3
 	.4byte	.LASF272
-	.byte	0x17
+	.byte	0x18
 	.byte	0xb
 	.4byte	0x7b
 	.uleb128 0x3
 	.4byte	.LASF273
-	.byte	0x17
+	.byte	0x18
 	.byte	0xc
 	.4byte	0x50
 	.uleb128 0x3
 	.4byte	.LASF274
-	.byte	0x17
+	.byte	0x18
 	.byte	0xd
 	.4byte	0x69
 	.uleb128 0xf
 	.4byte	.LASF275
 	.byte	0x14
-	.byte	0x18
-	.byte	0x27
+	.byte	0x19
+	.byte	0x24
 	.4byte	0xe2f
 	.uleb128 0x10
 	.4byte	.LASF276
-	.byte	0x18
-	.byte	0x28
+	.byte	0x19
+	.byte	0x25
 	.4byte	0xb5
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF277
-	.byte	0x18
-	.byte	0x29
+	.byte	0x19
+	.byte	0x26
 	.4byte	0xb5
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF278
-	.byte	0x18
-	.byte	0x2a
+	.byte	0x19
+	.byte	0x27
 	.4byte	0xe2f
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF279
-	.byte	0x18
-	.byte	0x2b
+	.byte	0x19
+	.byte	0x28
 	.4byte	0xe2f
 	.byte	0xc
 	.uleb128 0x16
 	.ascii	"lpa\000"
-	.byte	0x18
-	.byte	0x2c
+	.byte	0x19
+	.byte	0x29
 	.4byte	0xb5
 	.byte	0x10
 	.byte	0
@@ -25497,79 +25523,79 @@ __func__.9940:
 	.uleb128 0xf
 	.4byte	.LASF280
 	.byte	0x18
-	.byte	0x18
-	.byte	0x2f
+	.byte	0x19
+	.byte	0x2c
 	.4byte	0xed2
 	.uleb128 0x10
 	.4byte	.LASF281
-	.byte	0x18
-	.byte	0x30
+	.byte	0x19
+	.byte	0x2d
 	.4byte	0x9f
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF282
-	.byte	0x18
-	.byte	0x31
+	.byte	0x19
+	.byte	0x2e
 	.4byte	0x9f
 	.byte	0x2
 	.uleb128 0x10
 	.4byte	.LASF283
-	.byte	0x18
-	.byte	0x32
+	.byte	0x19
+	.byte	0x2f
 	.4byte	0x9f
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF284
-	.byte	0x18
-	.byte	0x33
+	.byte	0x19
+	.byte	0x30
 	.4byte	0x9f
 	.byte	0x6
 	.uleb128 0x10
 	.4byte	.LASF285
-	.byte	0x18
-	.byte	0x34
+	.byte	0x19
+	.byte	0x31
 	.4byte	0x9f
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF286
-	.byte	0x18
-	.byte	0x35
+	.byte	0x19
+	.byte	0x32
 	.4byte	0x9f
 	.byte	0xa
 	.uleb128 0x10
 	.4byte	.LASF287
-	.byte	0x18
-	.byte	0x36
+	.byte	0x19
+	.byte	0x33
 	.4byte	0x9f
 	.byte	0xc
 	.uleb128 0x10
 	.4byte	.LASF288
-	.byte	0x18
-	.byte	0x37
+	.byte	0x19
+	.byte	0x34
 	.4byte	0x9f
 	.byte	0xe
 	.uleb128 0x10
 	.4byte	.LASF289
-	.byte	0x18
-	.byte	0x38
+	.byte	0x19
+	.byte	0x35
 	.4byte	0x9f
 	.byte	0x10
 	.uleb128 0x10
 	.4byte	.LASF290
-	.byte	0x18
-	.byte	0x39
+	.byte	0x19
+	.byte	0x36
 	.4byte	0x9f
 	.byte	0x12
 	.uleb128 0x10
 	.4byte	.LASF291
-	.byte	0x18
-	.byte	0x3a
+	.byte	0x19
+	.byte	0x37
 	.4byte	0x9f
 	.byte	0x14
 	.uleb128 0x10
 	.4byte	.LASF292
-	.byte	0x18
-	.byte	0x3b
+	.byte	0x19
+	.byte	0x38
 	.4byte	0x90
 	.byte	0x16
 	.byte	0
@@ -25578,31 +25604,31 @@ __func__.9940:
 	.uleb128 0xf
 	.4byte	.LASF293
 	.byte	0x10
-	.byte	0x18
-	.byte	0x3e
+	.byte	0x19
+	.byte	0x3b
 	.4byte	0xf14
 	.uleb128 0x10
 	.4byte	.LASF294
-	.byte	0x18
-	.byte	0x3f
+	.byte	0x19
+	.byte	0x3c
 	.4byte	0xf2e
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF295
-	.byte	0x18
-	.byte	0x40
+	.byte	0x19
+	.byte	0x3d
 	.4byte	0xf48
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF296
-	.byte	0x18
-	.byte	0x41
+	.byte	0x19
+	.byte	0x3e
 	.4byte	0xf6c
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF297
-	.byte	0x18
-	.byte	0x42
+	.byte	0x19
+	.byte	0x3f
 	.4byte	0xf6c
 	.byte	0xc
 	.byte	0
@@ -25649,48 +25675,48 @@ __func__.9940:
 	.uleb128 0xf
 	.4byte	.LASF298
 	.byte	0x3c
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x2b
 	.4byte	0xfd2
 	.uleb128 0x16
 	.ascii	"id\000"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x2d
 	.4byte	0xdba
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF299
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x2e
 	.4byte	0xdba
 	.byte	0x2
 	.uleb128 0x10
 	.4byte	.LASF300
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x2f
 	.4byte	0xdba
 	.byte	0x4
 	.uleb128 0x16
 	.ascii	"cnt\000"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x30
 	.4byte	0xdba
 	.byte	0x6
 	.uleb128 0x10
 	.4byte	.LASF78
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x31
 	.4byte	0xdc5
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF301
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x32
 	.4byte	0xfd2
 	.byte	0xc
 	.uleb128 0x10
 	.4byte	.LASF302
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x33
 	.4byte	0xfe2
 	.byte	0x1c
@@ -25715,36 +25741,36 @@ __func__.9940:
 	.uleb128 0xf
 	.4byte	.LASF303
 	.byte	0xc
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x3f
 	.4byte	0x1040
 	.uleb128 0x16
 	.ascii	"id\000"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x41
 	.4byte	0xdba
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF299
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x42
 	.4byte	0xdba
 	.byte	0x2
 	.uleb128 0x10
 	.4byte	.LASF300
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x43
 	.4byte	0xdba
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF304
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x44
 	.4byte	0xdba
 	.byte	0x6
 	.uleb128 0x10
 	.4byte	.LASF78
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x45
 	.4byte	0xdc5
 	.byte	0x8
@@ -25752,84 +25778,84 @@ __func__.9940:
 	.uleb128 0xf
 	.4byte	.LASF305
 	.byte	0x28
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x48
 	.4byte	0x10e9
 	.uleb128 0x10
 	.4byte	.LASF236
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x4a
 	.4byte	0xdba
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF299
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x4b
 	.4byte	0xdba
 	.byte	0x2
 	.uleb128 0x10
 	.4byte	.LASF306
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x4d
 	.4byte	0xdba
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF307
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x4e
 	.4byte	0xdba
 	.byte	0x6
 	.uleb128 0x10
 	.4byte	.LASF308
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x50
 	.4byte	0xdba
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF309
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x51
 	.4byte	0xdba
 	.byte	0xa
 	.uleb128 0x10
 	.4byte	.LASF310
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x53
 	.4byte	0x10e9
 	.byte	0xc
 	.uleb128 0x10
 	.4byte	.LASF311
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x54
 	.4byte	0xff2
 	.byte	0x10
 	.uleb128 0x10
 	.4byte	.LASF312
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x55
 	.4byte	0x10e9
 	.byte	0x14
 	.uleb128 0x10
 	.4byte	.LASF313
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x56
 	.4byte	0xff2
 	.byte	0x18
 	.uleb128 0x10
 	.4byte	.LASF78
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x58
 	.4byte	0xdc5
 	.byte	0x1c
 	.uleb128 0x10
 	.4byte	.LASF314
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x59
 	.4byte	0xdc5
 	.byte	0x20
 	.uleb128 0x10
 	.4byte	.LASF315
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x5a
 	.4byte	0xdc5
 	.byte	0x24
@@ -25840,30 +25866,30 @@ __func__.9940:
 	.uleb128 0xf
 	.4byte	.LASF316
 	.byte	0xc
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x5d
 	.4byte	0x112c
 	.uleb128 0x10
 	.4byte	.LASF317
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x5f
 	.4byte	0xdba
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF43
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x60
 	.4byte	0xdba
 	.byte	0x2
 	.uleb128 0x16
 	.ascii	"hit\000"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x61
 	.4byte	0xdc5
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF318
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x62
 	.4byte	0xff2
 	.byte	0x8
@@ -25871,54 +25897,54 @@ __func__.9940:
 	.uleb128 0xf
 	.4byte	.LASF319
 	.byte	0x24
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x65
 	.4byte	0x1199
 	.uleb128 0x10
 	.4byte	.LASF306
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x67
 	.4byte	0xdc5
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF320
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x68
 	.4byte	0xdc5
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF78
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x69
 	.4byte	0xdc5
 	.byte	0x8
 	.uleb128 0x16
 	.ascii	"len\000"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x6a
 	.4byte	0xdc5
 	.byte	0xc
 	.uleb128 0x10
 	.4byte	.LASF321
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x6b
 	.4byte	0xdc5
 	.byte	0x10
 	.uleb128 0x10
 	.4byte	.LASF322
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x6c
 	.4byte	0xdc5
 	.byte	0x14
 	.uleb128 0x10
 	.4byte	.LASF323
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x6d
 	.4byte	0x1199
 	.byte	0x18
 	.uleb128 0x16
 	.ascii	"tbl\000"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x6e
 	.4byte	0x11a9
 	.byte	0x20
@@ -25940,48 +25966,48 @@ __func__.9940:
 	.uleb128 0xf
 	.4byte	.LASF324
 	.byte	0x10
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x72
 	.4byte	0x1219
 	.uleb128 0x10
 	.4byte	.LASF306
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x74
 	.4byte	0xdba
 	.byte	0
 	.uleb128 0x16
 	.ascii	"id\000"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x75
 	.4byte	0xdba
 	.byte	0x2
 	.uleb128 0x10
 	.4byte	.LASF78
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x76
 	.4byte	0xdc5
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF300
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x77
 	.4byte	0xdba
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF325
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x78
 	.4byte	0xdba
 	.byte	0xa
 	.uleb128 0x10
 	.4byte	.LASF326
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x79
 	.4byte	0xdba
 	.byte	0xc
 	.uleb128 0x10
 	.4byte	.LASF323
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x7a
 	.4byte	0x1219
 	.byte	0xe
@@ -25996,36 +26022,36 @@ __func__.9940:
 	.uleb128 0xf
 	.4byte	.LASF327
 	.byte	0x10
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x7d
 	.4byte	0x1271
 	.uleb128 0x10
 	.4byte	.LASF306
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x7f
 	.4byte	0xdba
 	.byte	0
 	.uleb128 0x16
 	.ascii	"id\000"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x80
 	.4byte	0xdba
 	.byte	0x2
 	.uleb128 0x10
 	.4byte	.LASF78
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x81
 	.4byte	0xdc5
 	.byte	0x4
 	.uleb128 0x16
 	.ascii	"lpa\000"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x82
 	.4byte	0xdc5
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF328
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x83
 	.4byte	0xdc5
 	.byte	0xc
@@ -26033,36 +26059,36 @@ __func__.9940:
 	.uleb128 0xf
 	.4byte	.LASF329
 	.byte	0x10
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x8f
 	.4byte	0x12b9
 	.uleb128 0x10
 	.4byte	.LASF306
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x91
 	.4byte	0xdba
 	.byte	0
 	.uleb128 0x16
 	.ascii	"id\000"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x92
 	.4byte	0xdba
 	.byte	0x2
 	.uleb128 0x10
 	.4byte	.LASF78
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x93
 	.4byte	0xdc5
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF330
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x94
 	.4byte	0xdba
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF323
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x95
 	.4byte	0x12b9
 	.byte	0xa
@@ -26077,36 +26103,36 @@ __func__.9940:
 	.uleb128 0xf
 	.4byte	.LASF331
 	.byte	0x10
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x98
 	.4byte	0x1311
 	.uleb128 0x10
 	.4byte	.LASF306
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x9a
 	.4byte	0xdba
 	.byte	0
 	.uleb128 0x16
 	.ascii	"id\000"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x9b
 	.4byte	0xdba
 	.byte	0x2
 	.uleb128 0x10
 	.4byte	.LASF78
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x9c
 	.4byte	0xdc5
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF332
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x9d
 	.4byte	0xdc5
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF333
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x9e
 	.4byte	0xdc5
 	.byte	0xc
@@ -26114,126 +26140,126 @@ __func__.9940:
 	.uleb128 0xf
 	.4byte	.LASF334
 	.byte	0x30
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xa1
 	.4byte	0x140e
 	.uleb128 0x16
 	.ascii	"tag\000"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xa3
 	.4byte	0xdc5
 	.byte	0
 	.uleb128 0x16
 	.ascii	"ver\000"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xa4
 	.4byte	0xdc5
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF304
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xa6
 	.4byte	0xdba
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF335
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xa7
 	.4byte	0xdaf
 	.byte	0xa
 	.uleb128 0x10
 	.4byte	.LASF336
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xa8
 	.4byte	0xdaf
 	.byte	0xb
 	.uleb128 0x10
 	.4byte	.LASF337
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xa9
 	.4byte	0xdaf
 	.byte	0xc
 	.uleb128 0x10
 	.4byte	.LASF338
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xaa
 	.4byte	0xdaf
 	.byte	0xd
 	.uleb128 0x10
 	.4byte	.LASF339
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xab
 	.4byte	0xdba
 	.byte	0xe
 	.uleb128 0x10
 	.4byte	.LASF340
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xad
 	.4byte	0xdba
 	.byte	0x10
 	.uleb128 0x10
 	.4byte	.LASF341
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xae
 	.4byte	0xdba
 	.byte	0x12
 	.uleb128 0x10
 	.4byte	.LASF342
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xaf
 	.4byte	0xdba
 	.byte	0x14
 	.uleb128 0x10
 	.4byte	.LASF343
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xb0
 	.4byte	0xdba
 	.byte	0x16
 	.uleb128 0x10
 	.4byte	.LASF344
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xb2
 	.4byte	0xdba
 	.byte	0x18
 	.uleb128 0x10
 	.4byte	.LASF345
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xb3
 	.4byte	0xdba
 	.byte	0x1a
 	.uleb128 0x10
 	.4byte	.LASF346
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xb4
 	.4byte	0xdba
 	.byte	0x1c
 	.uleb128 0x10
 	.4byte	.LASF347
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xb5
 	.4byte	0xdba
 	.byte	0x1e
 	.uleb128 0x10
 	.4byte	.LASF348
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xb7
 	.4byte	0xdc5
 	.byte	0x20
 	.uleb128 0x10
 	.4byte	.LASF349
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xb8
 	.4byte	0xdc5
 	.byte	0x24
 	.uleb128 0x10
 	.4byte	.LASF350
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xb9
 	.4byte	0xdc5
 	.byte	0x28
 	.uleb128 0x10
 	.4byte	.LASF323
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xba
 	.4byte	0x11a9
 	.byte	0x2c
@@ -26241,162 +26267,162 @@ __func__.9940:
 	.uleb128 0x25
 	.4byte	.LASF351
 	.2byte	0x200
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xbe
 	.4byte	0x1554
 	.uleb128 0x16
 	.ascii	"tag\000"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xc0
 	.4byte	0xdc5
 	.byte	0
 	.uleb128 0x16
 	.ascii	"ver\000"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xc1
 	.4byte	0xdc5
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF352
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xc3
 	.4byte	0xdc5
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF353
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xc4
 	.4byte	0xdc5
 	.byte	0xc
 	.uleb128 0x10
 	.4byte	.LASF354
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xc5
 	.4byte	0xdc5
 	.byte	0x10
 	.uleb128 0x10
 	.4byte	.LASF355
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xc6
 	.4byte	0xdc5
 	.byte	0x14
 	.uleb128 0x10
 	.4byte	.LASF348
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xc8
 	.4byte	0xdc5
 	.byte	0x18
 	.uleb128 0x10
 	.4byte	.LASF356
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xc9
 	.4byte	0xdc5
 	.byte	0x1c
 	.uleb128 0x10
 	.4byte	.LASF357
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xca
 	.4byte	0xdc5
 	.byte	0x20
 	.uleb128 0x10
 	.4byte	.LASF358
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xcb
 	.4byte	0xdc5
 	.byte	0x24
 	.uleb128 0x10
 	.4byte	.LASF345
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xcd
 	.4byte	0xdc5
 	.byte	0x28
 	.uleb128 0x10
 	.4byte	.LASF359
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xce
 	.4byte	0xdc5
 	.byte	0x2c
 	.uleb128 0x10
 	.4byte	.LASF360
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xcf
 	.4byte	0xdc5
 	.byte	0x30
 	.uleb128 0x10
 	.4byte	.LASF361
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xd0
 	.4byte	0xdc5
 	.byte	0x34
 	.uleb128 0x10
 	.4byte	.LASF362
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xd2
 	.4byte	0xdc5
 	.byte	0x38
 	.uleb128 0x10
 	.4byte	.LASF363
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xd3
 	.4byte	0xdc5
 	.byte	0x3c
 	.uleb128 0x10
 	.4byte	.LASF364
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xd4
 	.4byte	0xdc5
 	.byte	0x40
 	.uleb128 0x10
 	.4byte	.LASF365
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xd5
 	.4byte	0xdc5
 	.byte	0x44
 	.uleb128 0x10
 	.4byte	.LASF366
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xd7
 	.4byte	0xdc5
 	.byte	0x48
 	.uleb128 0x10
 	.4byte	.LASF367
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xd8
 	.4byte	0xdc5
 	.byte	0x4c
 	.uleb128 0x10
 	.4byte	.LASF368
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xd9
 	.4byte	0xdc5
 	.byte	0x50
 	.uleb128 0x10
 	.4byte	.LASF369
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xda
 	.4byte	0xdc5
 	.byte	0x54
 	.uleb128 0x10
 	.4byte	.LASF370
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xdc
 	.4byte	0xdc5
 	.byte	0x58
 	.uleb128 0x10
 	.4byte	.LASF371
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xdd
 	.4byte	0xdc5
 	.byte	0x5c
 	.uleb128 0x10
 	.4byte	.LASF372
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xde
 	.4byte	0xdc5
 	.byte	0x60
 	.uleb128 0x10
 	.4byte	.LASF323
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xe0
 	.4byte	0x1554
 	.byte	0x64
@@ -26411,24 +26437,24 @@ __func__.9940:
 	.uleb128 0xf
 	.4byte	.LASF373
 	.byte	0x6
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xe4
 	.4byte	0x1595
 	.uleb128 0x10
 	.4byte	.LASF235
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xe6
 	.4byte	0xdba
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF374
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xe7
 	.4byte	0xdba
 	.byte	0x2
 	.uleb128 0x10
 	.4byte	.LASF375
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xe8
 	.4byte	0xdba
 	.byte	0x4
@@ -26436,36 +26462,36 @@ __func__.9940:
 	.uleb128 0x25
 	.4byte	.LASF376
 	.2byte	0x808
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xeb
 	.4byte	0x15df
 	.uleb128 0x16
 	.ascii	"max\000"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xed
 	.4byte	0xdba
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF377
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xee
 	.4byte	0xdba
 	.byte	0x2
 	.uleb128 0x10
 	.4byte	.LASF378
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xef
 	.4byte	0xdba
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF325
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xf0
 	.4byte	0xdba
 	.byte	0x6
 	.uleb128 0x16
 	.ascii	"arr\000"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xf1
 	.4byte	0x15df
 	.byte	0x8
@@ -26480,72 +26506,72 @@ __func__.9940:
 	.uleb128 0xf
 	.4byte	.LASF379
 	.byte	0x30
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xf5
 	.4byte	0x1682
 	.uleb128 0x16
 	.ascii	"id\000"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xf7
 	.4byte	0xdba
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF380
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xf8
 	.4byte	0xdba
 	.byte	0x2
 	.uleb128 0x10
 	.4byte	.LASF381
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xf9
 	.4byte	0xdba
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF382
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xfa
 	.4byte	0xdaf
 	.byte	0x6
 	.uleb128 0x10
 	.4byte	.LASF383
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xfb
 	.4byte	0xdaf
 	.byte	0x7
 	.uleb128 0x10
 	.4byte	.LASF384
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xfc
 	.4byte	0xdaf
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF385
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xfd
 	.4byte	0xdaf
 	.byte	0x9
 	.uleb128 0x10
 	.4byte	.LASF386
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xfe
 	.4byte	0xdaf
 	.byte	0xa
 	.uleb128 0x10
 	.4byte	.LASF387
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xff
 	.4byte	0xdaf
 	.byte	0xb
 	.uleb128 0x1b
 	.4byte	.LASF78
-	.byte	0x19
+	.byte	0x1a
 	.2byte	0x100
 	.4byte	0xdc5
 	.byte	0xc
 	.uleb128 0x1b
 	.4byte	.LASF388
-	.byte	0x19
+	.byte	0x1a
 	.2byte	0x101
 	.4byte	0x1682
 	.byte	0x10
@@ -26560,24 +26586,24 @@ __func__.9940:
 	.uleb128 0x1a
 	.4byte	.LASF389
 	.byte	0xc
-	.byte	0x19
+	.byte	0x1a
 	.2byte	0x105
 	.4byte	0x16c7
 	.uleb128 0x1b
 	.4byte	.LASF390
-	.byte	0x19
+	.byte	0x1a
 	.2byte	0x107
 	.4byte	0xdc5
 	.byte	0
 	.uleb128 0x1b
 	.4byte	.LASF391
-	.byte	0x19
+	.byte	0x1a
 	.2byte	0x108
 	.4byte	0xdc5
 	.byte	0x4
 	.uleb128 0x1d
 	.ascii	"lpa\000"
-	.byte	0x19
+	.byte	0x1a
 	.2byte	0x109
 	.4byte	0xdc5
 	.byte	0x8
@@ -26585,31 +26611,31 @@ __func__.9940:
 	.uleb128 0x1a
 	.4byte	.LASF392
 	.byte	0xc
-	.byte	0x19
+	.byte	0x1a
 	.2byte	0x10c
 	.4byte	0x16fc
 	.uleb128 0x1b
 	.4byte	.LASF278
-	.byte	0x19
+	.byte	0x1a
 	.2byte	0x10e
 	.4byte	0xff2
 	.byte	0
 	.uleb128 0x1b
 	.4byte	.LASF279
-	.byte	0x19
+	.byte	0x1a
 	.2byte	0x10f
 	.4byte	0xff2
 	.byte	0x4
 	.uleb128 0x1b
 	.4byte	.LASF393
-	.byte	0x19
+	.byte	0x1a
 	.2byte	0x110
 	.4byte	0xdc5
 	.byte	0x8
 	.byte	0
 	.uleb128 0x26
 	.4byte	.LASF394
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x12
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26617,7 +26643,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_type
 	.uleb128 0x26
 	.4byte	.LASF395
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x13
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26625,7 +26651,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_die_num
 	.uleb128 0x26
 	.4byte	.LASF396
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x14
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26633,7 +26659,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_planes_per_die
 	.uleb128 0x26
 	.4byte	.LASF397
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x15
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26641,7 +26667,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_blks_per_die
 	.uleb128 0x26
 	.4byte	.LASF398
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x16
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26649,7 +26675,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_blks_per_die_shift
 	.uleb128 0x26
 	.4byte	.LASF399
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x17
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26657,7 +26683,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_planes_num
 	.uleb128 0x26
 	.4byte	.LASF400
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x18
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26665,7 +26691,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_blk_pre_plane
 	.uleb128 0x26
 	.4byte	.LASF401
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x19
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26673,7 +26699,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_ext_blk_pre_plane
 	.uleb128 0x26
 	.4byte	.LASF402
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x1a
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26681,7 +26707,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_bbm_buf_size
 	.uleb128 0x26
 	.4byte	.LASF403
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x1c
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26689,7 +26715,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_page_pre_blk
 	.uleb128 0x26
 	.4byte	.LASF404
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x1d
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26697,7 +26723,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_page_pre_slc_blk
 	.uleb128 0x26
 	.4byte	.LASF405
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x1e
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26705,7 +26731,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_page_pre_super_blk
 	.uleb128 0x26
 	.4byte	.LASF406
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x1f
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26713,7 +26739,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_sec_pre_page
 	.uleb128 0x26
 	.4byte	.LASF407
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x20
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26721,7 +26747,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_sec_pre_page_shift
 	.uleb128 0x26
 	.4byte	.LASF408
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x24
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26729,7 +26755,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_byte_pre_page
 	.uleb128 0x26
 	.4byte	.LASF409
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x25
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26737,7 +26763,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_byte_pre_oob
 	.uleb128 0x26
 	.4byte	.LASF410
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x26
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26745,7 +26771,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_reserved_blks
 	.uleb128 0x26
 	.4byte	.LASF411
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x27
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -26753,7 +26779,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_totle_phy_blks
 	.uleb128 0x26
 	.4byte	.LASF412
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x29
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26761,7 +26787,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_map_region_num
 	.uleb128 0x26
 	.4byte	.LASF413
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x2a
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26769,7 +26795,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_l2pmap_ram_region_num
 	.uleb128 0x26
 	.4byte	.LASF414
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x2c
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26777,7 +26803,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_vendor_region_num
 	.uleb128 0x26
 	.4byte	.LASF415
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x2e
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26785,7 +26811,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_map_blks_per_plane
 	.uleb128 0x26
 	.4byte	.LASF416
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x2f
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -26793,7 +26819,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_max_map_blks
 	.uleb128 0x26
 	.4byte	.LASF417
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x30
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26801,7 +26827,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_max_vendor_blks
 	.uleb128 0x26
 	.4byte	.LASF418
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x31
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26809,7 +26835,7 @@ __func__.9940:
 	.4byte	c_ftl_vendor_part_size
 	.uleb128 0x26
 	.4byte	.LASF419
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x32
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -26817,7 +26843,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_sys_blks_per_plane
 	.uleb128 0x26
 	.4byte	.LASF420
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x33
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -26825,7 +26851,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_init_sys_blks_per_plane
 	.uleb128 0x26
 	.4byte	.LASF421
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x34
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -26833,7 +26859,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_max_sys_blks
 	.uleb128 0x26
 	.4byte	.LASF422
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x35
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26841,7 +26867,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_data_blks_per_plane
 	.uleb128 0x26
 	.4byte	.LASF423
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x36
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26849,7 +26875,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_data_op_blks_per_plane
 	.uleb128 0x26
 	.4byte	.LASF424
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x37
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -26857,7 +26883,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_max_data_blks
 	.uleb128 0x26
 	.4byte	.LASF425
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x38
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -26865,7 +26891,7 @@ __func__.9940:
 	.4byte	ftl_gc_temp_power_lost_recovery_flag
 	.uleb128 0x26
 	.4byte	.LASF426
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x3a
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -26873,7 +26899,7 @@ __func__.9940:
 	.4byte	g_GlobalSysVersion
 	.uleb128 0x26
 	.4byte	.LASF427
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x3b
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -26881,7 +26907,7 @@ __func__.9940:
 	.4byte	g_GlobalDataVersion
 	.uleb128 0x26
 	.4byte	.LASF428
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x3c
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -26889,7 +26915,7 @@ __func__.9940:
 	.4byte	g_MaxLbaSector
 	.uleb128 0x26
 	.4byte	.LASF429
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x3d
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -26897,7 +26923,7 @@ __func__.9940:
 	.4byte	g_MaxLpn
 	.uleb128 0x26
 	.4byte	.LASF430
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x3e
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -26905,7 +26931,7 @@ __func__.9940:
 	.4byte	g_VaildLpn
 	.uleb128 0x26
 	.4byte	.LASF431
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x3f
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -26913,7 +26939,7 @@ __func__.9940:
 	.4byte	g_MaxLbn
 	.uleb128 0x26
 	.4byte	.LASF432
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x41
 	.4byte	0xf72
 	.uleb128 0x5
@@ -26921,7 +26947,7 @@ __func__.9940:
 	.4byte	gBbtInfo
 	.uleb128 0x26
 	.4byte	.LASF433
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x42
 	.4byte	0xff8
 	.uleb128 0x5
@@ -26929,7 +26955,7 @@ __func__.9940:
 	.4byte	gSysInfo
 	.uleb128 0x26
 	.4byte	.LASF434
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x43
 	.4byte	0x1595
 	.uleb128 0x5
@@ -26937,7 +26963,7 @@ __func__.9940:
 	.4byte	gSysFreeQueue
 	.uleb128 0x26
 	.4byte	.LASF435
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x44
 	.4byte	0x1040
 	.uleb128 0x5
@@ -26945,7 +26971,7 @@ __func__.9940:
 	.4byte	gL2pMapInfo
 	.uleb128 0x26
 	.4byte	.LASF436
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x45
 	.4byte	0x1040
 	.uleb128 0x5
@@ -26953,7 +26979,7 @@ __func__.9940:
 	.4byte	gVendorBlkInfo
 	.uleb128 0x26
 	.4byte	.LASF437
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x46
 	.4byte	0xde6
 	.uleb128 0x5
@@ -26961,7 +26987,7 @@ __func__.9940:
 	.4byte	req_sys
 	.uleb128 0x26
 	.4byte	.LASF438
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x47
 	.4byte	0x19f9
 	.uleb128 0x5
@@ -26972,7 +26998,7 @@ __func__.9940:
 	.4byte	0xde6
 	.uleb128 0x26
 	.4byte	.LASF439
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x48
 	.4byte	0x19f9
 	.uleb128 0x5
@@ -26980,7 +27006,7 @@ __func__.9940:
 	.4byte	req_prgm
 	.uleb128 0x26
 	.4byte	.LASF440
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x49
 	.4byte	0x19f9
 	.uleb128 0x5
@@ -26988,7 +27014,7 @@ __func__.9940:
 	.4byte	req_erase
 	.uleb128 0x26
 	.4byte	.LASF441
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x4a
 	.4byte	0x19f9
 	.uleb128 0x5
@@ -26996,7 +27022,7 @@ __func__.9940:
 	.4byte	req_gc
 	.uleb128 0x26
 	.4byte	.LASF442
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x4b
 	.4byte	0x19f9
 	.uleb128 0x5
@@ -27004,7 +27030,7 @@ __func__.9940:
 	.4byte	req_gc_dst
 	.uleb128 0x26
 	.4byte	.LASF443
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x4d
 	.4byte	0x19f9
 	.uleb128 0x5
@@ -27019,7 +27045,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x26
 	.4byte	.LASF444
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x4f
 	.4byte	0x1a54
 	.uleb128 0x5
@@ -27027,7 +27053,7 @@ __func__.9940:
 	.4byte	p_plane_order_table
 	.uleb128 0x26
 	.4byte	.LASF445
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x51
 	.4byte	0xff2
 	.uleb128 0x5
@@ -27035,7 +27061,7 @@ __func__.9940:
 	.4byte	p_sys_data_buf
 	.uleb128 0x26
 	.4byte	.LASF446
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x52
 	.4byte	0xff2
 	.uleb128 0x5
@@ -27043,7 +27069,7 @@ __func__.9940:
 	.4byte	p_sys_data_buf_1
 	.uleb128 0x26
 	.4byte	.LASF447
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x53
 	.4byte	0xff2
 	.uleb128 0x5
@@ -27051,7 +27077,7 @@ __func__.9940:
 	.4byte	p_vendor_data_buf
 	.uleb128 0x26
 	.4byte	.LASF448
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x54
 	.4byte	0xff2
 	.uleb128 0x5
@@ -27059,7 +27085,7 @@ __func__.9940:
 	.4byte	p_sys_spare_buf
 	.uleb128 0x26
 	.4byte	.LASF449
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x55
 	.4byte	0xff2
 	.uleb128 0x5
@@ -27067,7 +27093,7 @@ __func__.9940:
 	.4byte	p_io_data_buf_0
 	.uleb128 0x26
 	.4byte	.LASF450
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x56
 	.4byte	0xff2
 	.uleb128 0x5
@@ -27075,7 +27101,7 @@ __func__.9940:
 	.4byte	p_io_data_buf_1
 	.uleb128 0x26
 	.4byte	.LASF451
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x57
 	.4byte	0xff2
 	.uleb128 0x5
@@ -27083,7 +27109,7 @@ __func__.9940:
 	.4byte	p_io_spare_buf
 	.uleb128 0x26
 	.4byte	.LASF452
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x58
 	.4byte	0xff2
 	.uleb128 0x5
@@ -27091,7 +27117,7 @@ __func__.9940:
 	.4byte	p_gc_spare_buf
 	.uleb128 0x26
 	.4byte	.LASF453
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x59
 	.4byte	0xff2
 	.uleb128 0x5
@@ -27099,7 +27125,7 @@ __func__.9940:
 	.4byte	p_gc_data_buf
 	.uleb128 0x26
 	.4byte	.LASF454
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x5a
 	.4byte	0x1b1f
 	.uleb128 0x5
@@ -27110,7 +27136,7 @@ __func__.9940:
 	.4byte	0x16c7
 	.uleb128 0x26
 	.4byte	.LASF455
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x5b
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27118,7 +27144,7 @@ __func__.9940:
 	.4byte	c_gc_page_buf_num
 	.uleb128 0x26
 	.4byte	.LASF456
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x5c
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27126,7 +27152,7 @@ __func__.9940:
 	.4byte	g_gc_num_req
 	.uleb128 0x26
 	.4byte	.LASF457
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x5d
 	.4byte	0x1b58
 	.uleb128 0x5
@@ -27137,7 +27163,7 @@ __func__.9940:
 	.4byte	0x112c
 	.uleb128 0x26
 	.4byte	.LASF458
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x5e
 	.4byte	0xdba
 	.uleb128 0x5
@@ -27145,7 +27171,7 @@ __func__.9940:
 	.4byte	g_ect_tbl_info_size
 	.uleb128 0x26
 	.4byte	.LASF459
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x5f
 	.4byte	0x10e9
 	.uleb128 0x5
@@ -27153,7 +27179,7 @@ __func__.9940:
 	.4byte	p_erase_count_table
 	.uleb128 0x26
 	.4byte	.LASF460
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x61
 	.4byte	0x10e9
 	.uleb128 0x5
@@ -27161,7 +27187,7 @@ __func__.9940:
 	.4byte	p_swl_mul_table
 	.uleb128 0x26
 	.4byte	.LASF461
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x62
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27169,7 +27195,7 @@ __func__.9940:
 	.4byte	g_totle_swl_count
 	.uleb128 0x26
 	.4byte	.LASF462
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x63
 	.4byte	0x10e9
 	.uleb128 0x5
@@ -27177,7 +27203,7 @@ __func__.9940:
 	.4byte	p_valid_page_count_table
 	.uleb128 0x26
 	.4byte	.LASF463
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x64
 	.4byte	0x10e9
 	.uleb128 0x5
@@ -27185,7 +27211,7 @@ __func__.9940:
 	.4byte	p_valid_page_count_check_table
 	.uleb128 0x26
 	.4byte	.LASF464
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x65
 	.4byte	0xff2
 	.uleb128 0x5
@@ -27193,7 +27219,7 @@ __func__.9940:
 	.4byte	p_blk_mode_table
 	.uleb128 0x26
 	.4byte	.LASF465
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x67
 	.4byte	0x10e9
 	.uleb128 0x5
@@ -27201,7 +27227,7 @@ __func__.9940:
 	.4byte	p_map_block_table
 	.uleb128 0x26
 	.4byte	.LASF466
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x68
 	.4byte	0x10e9
 	.uleb128 0x5
@@ -27209,7 +27235,7 @@ __func__.9940:
 	.4byte	p_map_block_valid_page_count
 	.uleb128 0x26
 	.4byte	.LASF467
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x69
 	.4byte	0xff2
 	.uleb128 0x5
@@ -27217,7 +27243,7 @@ __func__.9940:
 	.4byte	p_map_block_ver_table
 	.uleb128 0x26
 	.4byte	.LASF468
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x6a
 	.4byte	0xff2
 	.uleb128 0x5
@@ -27225,7 +27251,7 @@ __func__.9940:
 	.4byte	p_map_region_ppn_table
 	.uleb128 0x26
 	.4byte	.LASF469
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x6b
 	.4byte	0xdba
 	.uleb128 0x5
@@ -27233,7 +27259,7 @@ __func__.9940:
 	.4byte	g_totle_map_block
 	.uleb128 0x26
 	.4byte	.LASF470
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x6d
 	.4byte	0x10e9
 	.uleb128 0x5
@@ -27241,7 +27267,7 @@ __func__.9940:
 	.4byte	p_vendor_block_table
 	.uleb128 0x26
 	.4byte	.LASF471
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x6e
 	.4byte	0x10e9
 	.uleb128 0x5
@@ -27249,7 +27275,7 @@ __func__.9940:
 	.4byte	p_vendor_block_valid_page_count
 	.uleb128 0x26
 	.4byte	.LASF472
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x6f
 	.4byte	0xff2
 	.uleb128 0x5
@@ -27257,7 +27283,7 @@ __func__.9940:
 	.4byte	p_vendor_block_ver_table
 	.uleb128 0x26
 	.4byte	.LASF473
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x70
 	.4byte	0xff2
 	.uleb128 0x5
@@ -27265,7 +27291,7 @@ __func__.9940:
 	.4byte	p_vendor_region_ppn_table
 	.uleb128 0x26
 	.4byte	.LASF474
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x71
 	.4byte	0xdba
 	.uleb128 0x5
@@ -27273,7 +27299,7 @@ __func__.9940:
 	.4byte	g_totle_vendor_block
 	.uleb128 0x26
 	.4byte	.LASF475
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x73
 	.4byte	0x1c90
 	.uleb128 0x5
@@ -27284,7 +27310,7 @@ __func__.9940:
 	.4byte	0x10ef
 	.uleb128 0x26
 	.4byte	.LASF476
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x74
 	.4byte	0xff2
 	.uleb128 0x5
@@ -27292,7 +27318,7 @@ __func__.9940:
 	.4byte	p_l2p_map_buf
 	.uleb128 0x26
 	.4byte	.LASF477
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x75
 	.4byte	0xdba
 	.uleb128 0x5
@@ -27300,7 +27326,7 @@ __func__.9940:
 	.4byte	g_l2p_last_update_region_id
 	.uleb128 0x26
 	.4byte	.LASF478
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x7c
 	.4byte	0x1cc9
 	.uleb128 0x5
@@ -27311,7 +27337,7 @@ __func__.9940:
 	.4byte	0x1564
 	.uleb128 0x26
 	.4byte	.LASF479
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x7d
 	.4byte	0x1cc9
 	.uleb128 0x5
@@ -27319,7 +27345,7 @@ __func__.9940:
 	.4byte	p_free_data_block_list_head
 	.uleb128 0x26
 	.4byte	.LASF480
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x7f
 	.4byte	0x1cc9
 	.uleb128 0x5
@@ -27327,7 +27353,7 @@ __func__.9940:
 	.4byte	p_data_block_list_head
 	.uleb128 0x26
 	.4byte	.LASF481
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x80
 	.4byte	0x1cc9
 	.uleb128 0x5
@@ -27335,7 +27361,7 @@ __func__.9940:
 	.4byte	p_data_block_list_tail
 	.uleb128 0x26
 	.4byte	.LASF482
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x81
 	.4byte	0xdba
 	.uleb128 0x5
@@ -27343,7 +27369,7 @@ __func__.9940:
 	.4byte	g_num_free_superblocks
 	.uleb128 0x26
 	.4byte	.LASF483
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x82
 	.4byte	0xdba
 	.uleb128 0x5
@@ -27351,7 +27377,7 @@ __func__.9940:
 	.4byte	g_num_data_superblocks
 	.uleb128 0x26
 	.4byte	.LASF484
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x83
 	.4byte	0x15f0
 	.uleb128 0x5
@@ -27359,7 +27385,7 @@ __func__.9940:
 	.4byte	g_active_superblock
 	.uleb128 0x26
 	.4byte	.LASF485
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x84
 	.4byte	0x15f0
 	.uleb128 0x5
@@ -27367,7 +27393,7 @@ __func__.9940:
 	.4byte	g_buffer_superblock
 	.uleb128 0x26
 	.4byte	.LASF486
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x85
 	.4byte	0x15f0
 	.uleb128 0x5
@@ -27375,7 +27401,7 @@ __func__.9940:
 	.4byte	g_gc_temp_superblock
 	.uleb128 0x26
 	.4byte	.LASF487
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x86
 	.4byte	0x15f0
 	.uleb128 0x5
@@ -27383,7 +27409,7 @@ __func__.9940:
 	.4byte	g_gc_superblock
 	.uleb128 0x26
 	.4byte	.LASF488
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x87
 	.4byte	0x1d79
 	.uleb128 0x5
@@ -27394,7 +27420,7 @@ __func__.9940:
 	.4byte	0x15f0
 	.uleb128 0x26
 	.4byte	.LASF489
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x88
 	.4byte	0x1311
 	.uleb128 0x5
@@ -27402,7 +27428,7 @@ __func__.9940:
 	.4byte	g_sys_save_data
 	.uleb128 0x26
 	.4byte	.LASF490
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x89
 	.4byte	0x140e
 	.uleb128 0x5
@@ -27410,7 +27436,7 @@ __func__.9940:
 	.4byte	g_sys_ext_data
 	.uleb128 0x26
 	.4byte	.LASF491
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x8b
 	.4byte	0x1db2
 	.uleb128 0x5
@@ -27421,7 +27447,7 @@ __func__.9940:
 	.4byte	0x1692
 	.uleb128 0x26
 	.4byte	.LASF492
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x8c
 	.4byte	0x10e9
 	.uleb128 0x5
@@ -27429,7 +27455,7 @@ __func__.9940:
 	.4byte	p_gc_blk_tbl
 	.uleb128 0x26
 	.4byte	.LASF493
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x8d
 	.4byte	0xdba
 	.uleb128 0x5
@@ -27437,7 +27463,7 @@ __func__.9940:
 	.4byte	g_gc_blk_num
 	.uleb128 0x26
 	.4byte	.LASF494
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x8e
 	.4byte	0xdba
 	.uleb128 0x5
@@ -27445,7 +27471,7 @@ __func__.9940:
 	.4byte	g_gc_page_offset
 	.uleb128 0x26
 	.4byte	.LASF495
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x8f
 	.4byte	0xdba
 	.uleb128 0x5
@@ -27453,7 +27479,7 @@ __func__.9940:
 	.4byte	g_gc_cur_blk_valid_pages
 	.uleb128 0x26
 	.4byte	.LASF496
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x90
 	.4byte	0xdba
 	.uleb128 0x5
@@ -27461,7 +27487,7 @@ __func__.9940:
 	.4byte	g_gc_cur_blk_max_valid_pages
 	.uleb128 0x26
 	.4byte	.LASF497
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x91
 	.4byte	0xdba
 	.uleb128 0x5
@@ -27469,7 +27495,7 @@ __func__.9940:
 	.4byte	g_gc_next_blk
 	.uleb128 0x26
 	.4byte	.LASF498
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x92
 	.4byte	0xdba
 	.uleb128 0x5
@@ -27477,7 +27503,7 @@ __func__.9940:
 	.4byte	g_gc_next_blk_1
 	.uleb128 0x26
 	.4byte	.LASF499
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x93
 	.4byte	0xdba
 	.uleb128 0x5
@@ -27485,7 +27511,7 @@ __func__.9940:
 	.4byte	g_gc_bad_block_temp_num
 	.uleb128 0x26
 	.4byte	.LASF500
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x94
 	.4byte	0xdba
 	.uleb128 0x5
@@ -27500,7 +27526,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x26
 	.4byte	.LASF501
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x95
 	.4byte	0x1e51
 	.uleb128 0x5
@@ -27508,7 +27534,7 @@ __func__.9940:
 	.4byte	g_gc_bad_block_temp_tbl
 	.uleb128 0x26
 	.4byte	.LASF502
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x97
 	.4byte	0xdba
 	.uleb128 0x5
@@ -27516,7 +27542,7 @@ __func__.9940:
 	.4byte	g_gc_free_blk_threshold
 	.uleb128 0x26
 	.4byte	.LASF503
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x98
 	.4byte	0xdba
 	.uleb128 0x5
@@ -27524,7 +27550,7 @@ __func__.9940:
 	.4byte	g_gc_merge_free_blk_threshold
 	.uleb128 0x26
 	.4byte	.LASF504
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x99
 	.4byte	0xdba
 	.uleb128 0x5
@@ -27532,7 +27558,7 @@ __func__.9940:
 	.4byte	g_gc_blk_index
 	.uleb128 0x26
 	.4byte	.LASF505
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x9b
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27540,7 +27566,7 @@ __func__.9940:
 	.4byte	g_totle_gc_page_count
 	.uleb128 0x26
 	.4byte	.LASF506
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x9c
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27548,7 +27574,7 @@ __func__.9940:
 	.4byte	g_totle_write_page_count
 	.uleb128 0x26
 	.4byte	.LASF507
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x9d
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27556,7 +27582,7 @@ __func__.9940:
 	.4byte	g_totle_write_sector
 	.uleb128 0x26
 	.4byte	.LASF508
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x9e
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27564,7 +27590,7 @@ __func__.9940:
 	.4byte	g_totle_read_sector
 	.uleb128 0x26
 	.4byte	.LASF509
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xa0
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27572,7 +27598,7 @@ __func__.9940:
 	.4byte	g_totle_discard_page_count
 	.uleb128 0x26
 	.4byte	.LASF510
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xa1
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27580,7 +27606,7 @@ __func__.9940:
 	.4byte	g_totle_read_page_count
 	.uleb128 0x26
 	.4byte	.LASF511
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xa2
 	.4byte	0xdba
 	.uleb128 0x5
@@ -27588,7 +27614,7 @@ __func__.9940:
 	.4byte	g_tmp_data_superblock_id
 	.uleb128 0x26
 	.4byte	.LASF512
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xa3
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27596,7 +27622,7 @@ __func__.9940:
 	.4byte	g_totle_cache_write_count
 	.uleb128 0x26
 	.4byte	.LASF513
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xa4
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27604,7 +27630,7 @@ __func__.9940:
 	.4byte	g_totle_l2p_write_count
 	.uleb128 0x26
 	.4byte	.LASF514
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xa6
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27612,7 +27638,7 @@ __func__.9940:
 	.4byte	g_totle_mlc_erase_count
 	.uleb128 0x26
 	.4byte	.LASF515
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xa7
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27620,7 +27646,7 @@ __func__.9940:
 	.4byte	g_totle_avg_erase_count
 	.uleb128 0x26
 	.4byte	.LASF516
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xa8
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27628,7 +27654,7 @@ __func__.9940:
 	.4byte	g_min_erase_count
 	.uleb128 0x26
 	.4byte	.LASF517
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xa9
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27636,7 +27662,7 @@ __func__.9940:
 	.4byte	g_totle_slc_erase_count
 	.uleb128 0x26
 	.4byte	.LASF518
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xaa
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27644,7 +27670,7 @@ __func__.9940:
 	.4byte	g_totle_sys_slc_erase_count
 	.uleb128 0x26
 	.4byte	.LASF519
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xab
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27652,7 +27678,7 @@ __func__.9940:
 	.4byte	g_max_erase_count
 	.uleb128 0x26
 	.4byte	.LASF520
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xac
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27660,7 +27686,7 @@ __func__.9940:
 	.4byte	g_in_gc_progress
 	.uleb128 0x26
 	.4byte	.LASF521
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xad
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27668,7 +27694,7 @@ __func__.9940:
 	.4byte	g_in_swl_replace
 	.uleb128 0x26
 	.4byte	.LASF522
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xae
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27676,7 +27702,7 @@ __func__.9940:
 	.4byte	g_ftl_nand_free_count
 	.uleb128 0x26
 	.4byte	.LASF523
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xaf
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27684,7 +27710,7 @@ __func__.9940:
 	.4byte	g_gc_head_data_block
 	.uleb128 0x26
 	.4byte	.LASF524
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xb0
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27692,7 +27718,7 @@ __func__.9940:
 	.4byte	g_gc_head_data_block_count
 	.uleb128 0x26
 	.4byte	.LASF525
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xb1
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27700,7 +27726,7 @@ __func__.9940:
 	.4byte	g_gc_skip_write_count
 	.uleb128 0x26
 	.4byte	.LASF526
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xb2
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27708,7 +27734,7 @@ __func__.9940:
 	.4byte	g_cur_erase_blk
 	.uleb128 0x26
 	.4byte	.LASF527
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xb4
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27716,7 +27742,7 @@ __func__.9940:
 	.4byte	g_recovery_page_num
 	.uleb128 0x26
 	.4byte	.LASF528
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xb5
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27731,7 +27757,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x26
 	.4byte	.LASF529
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xb6
 	.4byte	0x203d
 	.uleb128 0x5
@@ -27739,7 +27765,7 @@ __func__.9940:
 	.4byte	g_recovery_ppa_tbl
 	.uleb128 0x26
 	.4byte	.LASF530
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xb7
 	.4byte	0xdba
 	.uleb128 0x5
@@ -27747,7 +27773,7 @@ __func__.9940:
 	.4byte	c_mlc_erase_count_value
 	.uleb128 0x26
 	.4byte	.LASF531
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xb8
 	.4byte	0xdba
 	.uleb128 0x5
@@ -27755,17 +27781,17 @@ __func__.9940:
 	.4byte	g_power_lost_recovery_flag
 	.uleb128 0x4
 	.4byte	.LASF532
-	.byte	0x17
+	.byte	0x18
 	.byte	0x14
 	.4byte	0xe35
 	.uleb128 0x4
 	.4byte	.LASF533
-	.byte	0x17
+	.byte	0x18
 	.byte	0x15
 	.4byte	0xe35
 	.uleb128 0x4
 	.4byte	.LASF534
-	.byte	0x17
+	.byte	0x18
 	.byte	0x16
 	.4byte	0xed7
 	.uleb128 0xa
@@ -27777,7 +27803,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x4
 	.4byte	.LASF535
-	.byte	0x17
+	.byte	0x18
 	.byte	0x17
 	.4byte	0x20a1
 	.uleb128 0x26
@@ -27881,35 +27907,35 @@ __func__.9940:
 	.4byte	gc_ink_free_return_value
 	.uleb128 0xc
 	.4byte	.LASF549
-	.byte	0x1b
+	.byte	0x1c
 	.2byte	0x3ba
 	.4byte	0x107
 	.uleb128 0xc
 	.4byte	.LASF550
-	.byte	0x1b
+	.byte	0x1c
 	.2byte	0x3bb
 	.4byte	0x107
 	.uleb128 0xc
 	.4byte	.LASF551
-	.byte	0x1b
+	.byte	0x1c
 	.2byte	0x3bc
 	.4byte	0x107
 	.uleb128 0xf
 	.4byte	.LASF552
 	.byte	0x4
-	.byte	0x1c
+	.byte	0x6
 	.byte	0xc
 	.4byte	0x21d6
 	.uleb128 0x16
 	.ascii	"pid\000"
-	.byte	0x1c
+	.byte	0x6
 	.byte	0xd
 	.4byte	0x50
 	.byte	0
 	.byte	0
 	.uleb128 0x4
 	.4byte	.LASF553
-	.byte	0x1c
+	.byte	0x6
 	.byte	0x10
 	.4byte	0x21e1
 	.uleb128 0x8
@@ -27962,34 +27988,34 @@ __func__.9940:
 	.uleb128 0x2b
 	.4byte	.LASF558
 	.byte	0x1
-	.byte	0xf7
+	.byte	0xfb
 	.4byte	0x50
-	.4byte	.LFB350
-	.4byte	.LFE350-.LFB350
+	.4byte	.LFB351
+	.4byte	.LFE351-.LFB351
 	.uleb128 0x1
 	.byte	0x9c
 	.4byte	0x22a6
 	.uleb128 0x2c
 	.4byte	.LASF556
 	.byte	0x1
-	.byte	0xf7
+	.byte	0xfb
 	.4byte	0x128
-	.4byte	.LLST453
+	.4byte	.LLST455
 	.uleb128 0x2c
 	.4byte	.LASF557
 	.byte	0x1
-	.byte	0xf7
+	.byte	0xfb
 	.4byte	0x128
-	.4byte	.LLST454
+	.4byte	.LLST456
 	.uleb128 0x2c
 	.4byte	.LASF325
 	.byte	0x1
-	.byte	0xf7
+	.byte	0xfb
 	.4byte	0x7b
-	.4byte	.LLST455
+	.4byte	.LLST457
 	.uleb128 0x2d
-	.4byte	.LVL2076
-	.4byte	0x91ff
+	.4byte	.LVL2078
+	.4byte	0x9266
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28016,34 +28042,34 @@ __func__.9940:
 	.uleb128 0x2b
 	.4byte	.LASF559
 	.byte	0x1
-	.byte	0xf2
+	.byte	0xf6
 	.4byte	0x128
-	.4byte	.LFB349
-	.4byte	.LFE349-.LFB349
+	.4byte	.LFB350
+	.4byte	.LFE350-.LFB350
 	.uleb128 0x1
 	.byte	0x9c
 	.4byte	0x230c
 	.uleb128 0x2c
 	.4byte	.LASF560
 	.byte	0x1
-	.byte	0xf2
+	.byte	0xf6
 	.4byte	0x128
-	.4byte	.LLST285
+	.4byte	.LLST287
 	.uleb128 0x2c
 	.4byte	.LASF561
 	.byte	0x1
-	.byte	0xf2
+	.byte	0xf6
 	.4byte	0x16b
-	.4byte	.LLST286
+	.4byte	.LLST288
 	.uleb128 0x2c
 	.4byte	.LASF30
 	.byte	0x1
-	.byte	0xf2
+	.byte	0xf6
 	.4byte	0x7b
-	.4byte	.LLST287
+	.4byte	.LLST289
 	.uleb128 0x2d
-	.4byte	.LVL1160
-	.4byte	0x920a
+	.4byte	.LVL1162
+	.4byte	0x9271
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28070,34 +28096,34 @@ __func__.9940:
 	.uleb128 0x2b
 	.4byte	.LASF562
 	.byte	0x1
-	.byte	0xed
+	.byte	0xf1
 	.4byte	0x128
-	.4byte	.LFB348
-	.4byte	.LFE348-.LFB348
+	.4byte	.LFB349
+	.4byte	.LFE349-.LFB349
 	.uleb128 0x1
 	.byte	0x9c
 	.4byte	0x236c
 	.uleb128 0x2f
 	.ascii	"s\000"
 	.byte	0x1
-	.byte	0xed
+	.byte	0xf1
 	.4byte	0x128
-	.4byte	.LLST189
+	.4byte	.LLST191
 	.uleb128 0x2f
 	.ascii	"c\000"
 	.byte	0x1
-	.byte	0xed
+	.byte	0xf1
 	.4byte	0x50
-	.4byte	.LLST190
+	.4byte	.LLST192
 	.uleb128 0x2f
 	.ascii	"n\000"
 	.byte	0x1
-	.byte	0xed
+	.byte	0xf1
 	.4byte	0x7b
-	.4byte	.LLST191
+	.4byte	.LLST193
 	.uleb128 0x2d
-	.4byte	.LVL696
-	.4byte	0x9216
+	.4byte	.LVL698
+	.4byte	0x927d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28124,38 +28150,38 @@ __func__.9940:
 	.uleb128 0x2b
 	.4byte	.LASF563
 	.byte	0x1
-	.byte	0xdb
+	.byte	0xdf
 	.4byte	0xaa
-	.4byte	.LFB347
-	.4byte	.LFE347-.LFB347
+	.4byte	.LFB348
+	.4byte	.LFE348-.LFB348
 	.uleb128 0x1
 	.byte	0x9c
 	.4byte	0x2410
 	.uleb128 0x2c
 	.4byte	.LASF564
 	.byte	0x1
-	.byte	0xdb
+	.byte	0xdf
 	.4byte	0xf28
-	.4byte	.LLST282
+	.4byte	.LLST284
 	.uleb128 0x2f
 	.ascii	"die\000"
 	.byte	0x1
-	.byte	0xdb
+	.byte	0xdf
 	.4byte	0xb5
-	.4byte	.LLST283
+	.4byte	.LLST285
 	.uleb128 0x30
 	.4byte	.LASF325
 	.byte	0x1
-	.byte	0xdd
+	.byte	0xe1
 	.4byte	0x9f
-	.4byte	.LLST284
+	.4byte	.LLST286
 	.uleb128 0x31
 	.ascii	"i\000"
 	.byte	0x1
-	.byte	0xdd
+	.byte	0xe1
 	.4byte	0x9f
 	.uleb128 0x32
-	.4byte	.LVL1152
+	.4byte	.LVL1154
 	.4byte	0x230c
 	.4byte	0x23dc
 	.uleb128 0x2e
@@ -28178,7 +28204,7 @@ __func__.9940:
 	.2byte	0x100
 	.byte	0
 	.uleb128 0x33
-	.4byte	.LVL1153
+	.4byte	.LVL1155
 	.4byte	0x23f2
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -28194,7 +28220,7 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1156
+	.4byte	.LVL1158
 	.4byte	0x230c
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -28217,36 +28243,36 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x35
-	.4byte	.LASF586
+	.4byte	.LASF589
 	.byte	0x1
-	.byte	0xc0
+	.byte	0xc4
 	.4byte	0xdd0
 	.byte	0x1
 	.4byte	0x2454
 	.uleb128 0x36
 	.4byte	.LASF577
 	.byte	0x1
-	.byte	0xc0
+	.byte	0xc4
 	.4byte	0xdba
 	.uleb128 0x31
 	.ascii	"sts\000"
 	.byte	0x1
-	.byte	0xc2
+	.byte	0xc6
 	.4byte	0xdd0
 	.uleb128 0x37
 	.4byte	.LASF565
 	.byte	0x1
-	.byte	0xc3
+	.byte	0xc7
 	.4byte	0x2454
 	.uleb128 0x31
 	.ascii	"req\000"
 	.byte	0x1
-	.byte	0xc4
+	.byte	0xc8
 	.4byte	0xde6
 	.uleb128 0x38
 	.ascii	"out\000"
 	.byte	0x1
-	.byte	0xd6
+	.byte	0xda
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xdc5
@@ -28258,42 +28284,42 @@ __func__.9940:
 	.uleb128 0x39
 	.4byte	.LASF566
 	.byte	0x1
-	.byte	0xaa
+	.byte	0xae
 	.4byte	0xaa
-	.4byte	.LFB345
-	.4byte	.LFE345-.LFB345
+	.4byte	.LFB346
+	.4byte	.LFE346-.LFB346
 	.uleb128 0x1
 	.byte	0x9c
 	.4byte	0x251a
 	.uleb128 0x2c
 	.4byte	.LASF567
 	.byte	0x1
-	.byte	0xaa
+	.byte	0xae
 	.4byte	0x128
-	.4byte	.LLST170
+	.4byte	.LLST172
 	.uleb128 0x2c
 	.4byte	.LASF568
 	.byte	0x1
-	.byte	0xaa
+	.byte	0xae
 	.4byte	0xb5
-	.4byte	.LLST171
+	.4byte	.LLST173
 	.uleb128 0x2c
 	.4byte	.LASF569
 	.byte	0x1
-	.byte	0xaa
+	.byte	0xae
 	.4byte	0xb5
-	.4byte	.LLST172
+	.4byte	.LLST174
 	.uleb128 0x3a
 	.ascii	"i\000"
 	.byte	0x1
-	.byte	0xac
+	.byte	0xb0
 	.4byte	0xb5
 	.uleb128 0x1
 	.byte	0x56
 	.uleb128 0x3a
 	.ascii	"cs\000"
 	.byte	0x1
-	.byte	0xac
+	.byte	0xb0
 	.4byte	0xb5
 	.uleb128 0x2
 	.byte	0x91
@@ -28301,13 +28327,13 @@ __func__.9940:
 	.uleb128 0x30
 	.4byte	.LASF276
 	.byte	0x1
-	.byte	0xac
+	.byte	0xb0
 	.4byte	0xb5
-	.4byte	.LLST173
+	.4byte	.LLST175
 	.uleb128 0x29
 	.4byte	.LASF570
 	.byte	0x1
-	.byte	0xac
+	.byte	0xb0
 	.4byte	0xb5
 	.uleb128 0x2
 	.byte	0x91
@@ -28315,19 +28341,19 @@ __func__.9940:
 	.uleb128 0x3b
 	.ascii	"req\000"
 	.byte	0x1
-	.byte	0xad
+	.byte	0xb1
 	.4byte	0x19f9
-	.4byte	.LLST174
+	.4byte	.LLST176
 	.uleb128 0x29
 	.4byte	.LASF571
 	.byte	0x1
-	.byte	0xae
+	.byte	0xb2
 	.4byte	0xb5
 	.uleb128 0x1
 	.byte	0x58
 	.uleb128 0x34
-	.4byte	.LVL628
-	.4byte	0x83c6
+	.4byte	.LVL630
+	.4byte	0x842d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -28350,47 +28376,47 @@ __func__.9940:
 	.uleb128 0x2b
 	.4byte	.LASF572
 	.byte	0x1
-	.byte	0x6e
+	.byte	0x72
 	.4byte	0xaa
-	.4byte	.LFB344
-	.4byte	.LFE344-.LFB344
+	.4byte	.LFB345
+	.4byte	.LFE345-.LFB345
 	.uleb128 0x1
 	.byte	0x9c
 	.4byte	0x26a4
 	.uleb128 0x2c
 	.4byte	.LASF567
 	.byte	0x1
-	.byte	0x6e
+	.byte	0x72
 	.4byte	0x128
-	.4byte	.LLST162
+	.4byte	.LLST164
 	.uleb128 0x2c
 	.4byte	.LASF569
 	.byte	0x1
-	.byte	0x6e
+	.byte	0x72
 	.4byte	0xb5
-	.4byte	.LLST163
+	.4byte	.LLST165
 	.uleb128 0x2c
 	.4byte	.LASF568
 	.byte	0x1
-	.byte	0x6e
+	.byte	0x72
 	.4byte	0xb5
-	.4byte	.LLST164
+	.4byte	.LLST166
 	.uleb128 0x2c
 	.4byte	.LASF573
 	.byte	0x1
-	.byte	0x6e
+	.byte	0x72
 	.4byte	0xb5
-	.4byte	.LLST165
+	.4byte	.LLST167
 	.uleb128 0x3b
 	.ascii	"i\000"
 	.byte	0x1
-	.byte	0x70
+	.byte	0x74
 	.4byte	0xb5
-	.4byte	.LLST166
+	.4byte	.LLST168
 	.uleb128 0x3a
 	.ascii	"cs\000"
 	.byte	0x1
-	.byte	0x70
+	.byte	0x74
 	.4byte	0xb5
 	.uleb128 0x2
 	.byte	0x91
@@ -28398,13 +28424,13 @@ __func__.9940:
 	.uleb128 0x30
 	.4byte	.LASF276
 	.byte	0x1
-	.byte	0x70
+	.byte	0x74
 	.4byte	0xb5
-	.4byte	.LLST167
+	.4byte	.LLST169
 	.uleb128 0x29
 	.4byte	.LASF570
 	.byte	0x1
-	.byte	0x70
+	.byte	0x74
 	.4byte	0xb5
 	.uleb128 0x2
 	.byte	0x91
@@ -28412,34 +28438,34 @@ __func__.9940:
 	.uleb128 0x30
 	.4byte	.LASF571
 	.byte	0x1
-	.byte	0x71
+	.byte	0x75
 	.4byte	0xb5
-	.4byte	.LLST168
+	.4byte	.LLST170
 	.uleb128 0x3b
 	.ascii	"req\000"
 	.byte	0x1
-	.byte	0x72
+	.byte	0x76
 	.4byte	0x19f9
-	.4byte	.LLST169
+	.4byte	.LLST171
 	.uleb128 0x3d
 	.4byte	.LASF574
 	.4byte	0x26b4
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.10324
+	.4byte	__func__.10327
 	.uleb128 0x3e
 	.4byte	.Ldebug_ranges0+0x88
 	.4byte	0x264b
 	.uleb128 0x29
 	.4byte	.LASF575
 	.byte	0x1
-	.byte	0x8d
+	.byte	0x91
 	.4byte	0xde6
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -52
 	.uleb128 0x32
-	.4byte	.LVL616
+	.4byte	.LVL618
 	.4byte	0x26b9
 	.4byte	0x2609
 	.uleb128 0x2e
@@ -28461,8 +28487,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL617
-	.4byte	0x9222
+	.4byte	.LVL619
+	.4byte	0x9289
 	.4byte	0x2620
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -28472,8 +28498,8 @@ __func__.9940:
 	.4byte	.LC79
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL618
-	.4byte	0x9222
+	.4byte	.LVL620
+	.4byte	0x9289
 	.4byte	0x2637
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -28483,8 +28509,8 @@ __func__.9940:
 	.4byte	.LC80
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL619
-	.4byte	0x9222
+	.4byte	.LVL621
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28494,8 +28520,8 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL609
-	.4byte	0x9222
+	.4byte	.LVL611
+	.4byte	0x9289
 	.4byte	0x2671
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -28514,11 +28540,11 @@ __func__.9940:
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x8
-	.byte	0x76
+	.byte	0x7a
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL610
-	.4byte	0x83c6
+	.4byte	.LVL612
+	.4byte	0x842d
 	.4byte	0x2693
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -28539,12 +28565,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x3f
-	.4byte	.LVL611
+	.4byte	.LVL613
 	.uleb128 0x2
 	.byte	0x7b
 	.sleb128 0
 	.uleb128 0x3f
-	.4byte	.LVL613
+	.4byte	.LVL615
 	.uleb128 0x2
 	.byte	0x7b
 	.sleb128 0
@@ -28561,42 +28587,42 @@ __func__.9940:
 	.uleb128 0x2b
 	.4byte	.LASF576
 	.byte	0x1
-	.byte	0x50
+	.byte	0x54
 	.4byte	0xaa
-	.4byte	.LFB343
-	.4byte	.LFE343-.LFB343
+	.4byte	.LFB344
+	.4byte	.LFE344-.LFB344
 	.uleb128 0x1
 	.byte	0x9c
 	.4byte	0x27b7
 	.uleb128 0x2c
 	.4byte	.LASF567
 	.byte	0x1
-	.byte	0x50
+	.byte	0x54
 	.4byte	0x128
-	.4byte	.LLST151
+	.4byte	.LLST153
 	.uleb128 0x2c
 	.4byte	.LASF569
 	.byte	0x1
-	.byte	0x50
+	.byte	0x54
 	.4byte	0xb5
-	.4byte	.LLST152
+	.4byte	.LLST154
 	.uleb128 0x2c
 	.4byte	.LASF568
 	.byte	0x1
-	.byte	0x50
+	.byte	0x54
 	.4byte	0xb5
-	.4byte	.LLST153
+	.4byte	.LLST155
 	.uleb128 0x3a
 	.ascii	"i\000"
 	.byte	0x1
-	.byte	0x52
+	.byte	0x56
 	.4byte	0xb5
 	.uleb128 0x1
 	.byte	0x55
 	.uleb128 0x3a
 	.ascii	"cs\000"
 	.byte	0x1
-	.byte	0x52
+	.byte	0x56
 	.4byte	0xb5
 	.uleb128 0x2
 	.byte	0x91
@@ -28604,13 +28630,13 @@ __func__.9940:
 	.uleb128 0x30
 	.4byte	.LASF276
 	.byte	0x1
-	.byte	0x52
+	.byte	0x56
 	.4byte	0xb5
-	.4byte	.LLST154
+	.4byte	.LLST156
 	.uleb128 0x29
 	.4byte	.LASF570
 	.byte	0x1
-	.byte	0x52
+	.byte	0x56
 	.4byte	0xb5
 	.uleb128 0x2
 	.byte	0x91
@@ -28618,7 +28644,7 @@ __func__.9940:
 	.uleb128 0x29
 	.4byte	.LASF571
 	.byte	0x1
-	.byte	0x53
+	.byte	0x57
 	.4byte	0xb5
 	.uleb128 0x2
 	.byte	0x91
@@ -28626,7 +28652,7 @@ __func__.9940:
 	.uleb128 0x3a
 	.ascii	"req\000"
 	.byte	0x1
-	.byte	0x54
+	.byte	0x58
 	.4byte	0x19f9
 	.uleb128 0x4
 	.byte	0xf3
@@ -28638,10 +28664,10 @@ __func__.9940:
 	.4byte	0x26b4
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.10307
+	.4byte	__func__.10310
 	.uleb128 0x32
-	.4byte	.LVL566
-	.4byte	0x9222
+	.4byte	.LVL568
+	.4byte	0x9289
 	.4byte	0x2784
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -28660,11 +28686,11 @@ __func__.9940:
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x8
-	.byte	0x58
+	.byte	0x5c
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL567
-	.4byte	0x83c6
+	.4byte	.LVL569
+	.4byte	0x842d
 	.4byte	0x27a6
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -28685,140 +28711,140 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x3f
-	.4byte	.LVL568
+	.4byte	.LVL570
 	.uleb128 0x2
 	.byte	0x77
 	.sleb128 0
 	.uleb128 0x3f
-	.4byte	.LVL570
+	.4byte	.LVL572
 	.uleb128 0x2
 	.byte	0x76
 	.sleb128 0
 	.byte	0
 	.uleb128 0x40
-	.4byte	.LASF883
+	.4byte	.LASF885
 	.byte	0x1
-	.byte	0x36
+	.byte	0x3a
 	.4byte	0xb5
 	.byte	0x1
 	.4byte	0x2836
 	.uleb128 0x41
 	.ascii	"req\000"
 	.byte	0x1
-	.byte	0x36
+	.byte	0x3a
 	.4byte	0x19f9
 	.uleb128 0x36
 	.4byte	.LASF570
 	.byte	0x1
-	.byte	0x36
+	.byte	0x3a
 	.4byte	0xe2f
 	.uleb128 0x36
 	.4byte	.LASF578
 	.byte	0x1
-	.byte	0x36
+	.byte	0x3a
 	.4byte	0xe2f
 	.uleb128 0x37
 	.4byte	.LASF579
 	.byte	0x1
-	.byte	0x38
+	.byte	0x3c
 	.4byte	0x9f
 	.uleb128 0x37
 	.4byte	.LASF580
 	.byte	0x1
-	.byte	0x38
+	.byte	0x3c
 	.4byte	0x9f
 	.uleb128 0x37
 	.4byte	.LASF285
 	.byte	0x1
-	.byte	0x39
+	.byte	0x3d
 	.4byte	0x9f
 	.uleb128 0x37
 	.4byte	.LASF286
 	.byte	0x1
-	.byte	0x39
+	.byte	0x3d
 	.4byte	0x9f
 	.uleb128 0x37
 	.4byte	.LASF581
 	.byte	0x1
-	.byte	0x3a
+	.byte	0x3e
 	.4byte	0xb5
 	.uleb128 0x37
 	.4byte	.LASF277
 	.byte	0x1
-	.byte	0x3b
+	.byte	0x3f
 	.4byte	0xb5
 	.uleb128 0x37
 	.4byte	.LASF582
 	.byte	0x1
-	.byte	0x3c
+	.byte	0x40
 	.4byte	0xb5
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF619
+	.4byte	.LASF585
 	.byte	0x1
-	.byte	0x1c
-	.4byte	.LFB341
-	.4byte	.LFE341-.LFB341
+	.byte	0x20
+	.4byte	.LFB342
+	.4byte	.LFE342-.LFB342
 	.uleb128 0x1
 	.byte	0x9c
 	.4byte	0x2922
 	.uleb128 0x2f
 	.ascii	"s\000"
 	.byte	0x1
-	.byte	0x1c
+	.byte	0x20
 	.4byte	0xf6
-	.4byte	.LLST142
+	.4byte	.LLST144
 	.uleb128 0x2f
 	.ascii	"buf\000"
 	.byte	0x1
-	.byte	0x1c
+	.byte	0x20
 	.4byte	0x128
-	.4byte	.LLST143
+	.4byte	.LLST145
 	.uleb128 0x2c
 	.4byte	.LASF583
 	.byte	0x1
-	.byte	0x1c
+	.byte	0x20
 	.4byte	0x50
-	.4byte	.LLST144
+	.4byte	.LLST146
 	.uleb128 0x2f
 	.ascii	"len\000"
 	.byte	0x1
-	.byte	0x1c
+	.byte	0x20
 	.4byte	0x50
-	.4byte	.LLST145
+	.4byte	.LLST147
 	.uleb128 0x3b
 	.ascii	"i\000"
 	.byte	0x1
-	.byte	0x1e
+	.byte	0x22
 	.4byte	0xb5
-	.4byte	.LLST146
+	.4byte	.LLST148
 	.uleb128 0x3b
 	.ascii	"j\000"
 	.byte	0x1
-	.byte	0x1e
+	.byte	0x22
 	.4byte	0xb5
-	.4byte	.LLST147
+	.4byte	.LLST149
 	.uleb128 0x3b
 	.ascii	"p8\000"
 	.byte	0x1
-	.byte	0x1f
+	.byte	0x23
 	.4byte	0xf6
-	.4byte	.LLST148
+	.4byte	.LLST150
 	.uleb128 0x3b
 	.ascii	"p16\000"
 	.byte	0x1
-	.byte	0x20
+	.byte	0x24
 	.4byte	0x2922
-	.4byte	.LLST149
+	.4byte	.LLST151
 	.uleb128 0x3b
 	.ascii	"p32\000"
 	.byte	0x1
-	.byte	0x21
+	.byte	0x25
 	.4byte	0xe2f
-	.4byte	.LLST150
+	.4byte	.LLST152
 	.uleb128 0x43
-	.4byte	.LVL555
-	.4byte	0x9222
+	.4byte	.LVL557
+	.4byte	0x9289
 	.4byte	0x28e2
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -28828,8 +28854,8 @@ __func__.9940:
 	.4byte	.LC78
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL556
-	.4byte	0x9222
+	.4byte	.LVL558
+	.4byte	0x9289
 	.4byte	0x2905
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -28851,11 +28877,11 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL558
-	.4byte	0x9222
-	.uleb128 0x34
 	.4byte	.LVL560
-	.4byte	0x9222
+	.4byte	0x9289
+	.uleb128 0x34
+	.4byte	.LVL562
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28870,22 +28896,22 @@ __func__.9940:
 	.uleb128 0x2b
 	.4byte	.LASF584
 	.byte	0x1
-	.byte	0x17
+	.byte	0x1b
 	.4byte	0x128
-	.4byte	.LFB340
-	.4byte	.LFE340-.LFB340
+	.4byte	.LFB341
+	.4byte	.LFE341-.LFB341
 	.uleb128 0x1
 	.byte	0x9c
 	.4byte	0x2967
 	.uleb128 0x2c
 	.4byte	.LASF30
 	.byte	0x1
-	.byte	0x17
+	.byte	0x1b
 	.4byte	0x50
-	.4byte	.LLST141
+	.4byte	.LLST143
 	.uleb128 0x2d
-	.4byte	.LVL550
-	.4byte	0x922d
+	.4byte	.LVL552
+	.4byte	0x9294
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28900,8 +28926,57 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.byte	0
+	.uleb128 0x42
+	.4byte	.LASF586
+	.byte	0x1
+	.byte	0x17
+	.4byte	.LFB340
+	.4byte	.LFE340-.LFB340
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x29b6
+	.uleb128 0x2f
+	.ascii	"buf\000"
+	.byte	0x1
+	.byte	0x17
+	.4byte	0x128
+	.4byte	.LLST141
 	.uleb128 0x45
-	.4byte	.LASF585
+	.4byte	0x29b6
+	.4byte	.LBB221
+	.4byte	.LBE221-.LBB221
+	.byte	0x1
+	.byte	0x19
+	.uleb128 0x46
+	.4byte	0x29c2
+	.4byte	.LLST142
+	.uleb128 0x2d
+	.4byte	.LVL550
+	.4byte	0x929f
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x47
+	.4byte	.LASF886
+	.byte	0x6
+	.byte	0x4e
+	.byte	0x3
+	.4byte	0x29ce
+	.uleb128 0x36
+	.4byte	.LASF587
+	.byte	0x6
+	.byte	0x4e
+	.4byte	0x16b
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LASF588
 	.byte	0x5
 	.2byte	0x2f8
 	.4byte	0xb5
@@ -28909,10 +28984,10 @@ __func__.9940:
 	.4byte	.LFE323-.LFB323
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2996
+	.4byte	0x29fd
 	.uleb128 0x2d
-	.4byte	.LVL1812
-	.4byte	0x2996
+	.4byte	.LVL1814
+	.4byte	0x29fd
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28925,88 +29000,88 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF587
+	.uleb128 0x49
+	.4byte	.LASF590
 	.byte	0x5
 	.2byte	0x1d5
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x2a63
-	.uleb128 0x47
-	.4byte	.LASF588
+	.4byte	0x2aca
+	.uleb128 0x4a
+	.4byte	.LASF591
 	.byte	0x5
 	.2byte	0x1d5
 	.4byte	0xdc5
-	.uleb128 0x47
-	.4byte	.LASF589
+	.uleb128 0x4a
+	.4byte	.LASF592
 	.byte	0x5
 	.2byte	0x1d5
 	.4byte	0xdc5
-	.uleb128 0x48
-	.4byte	.LASF590
+	.uleb128 0x4b
+	.4byte	.LASF593
 	.byte	0x5
 	.2byte	0x1d7
 	.4byte	0xdba
-	.uleb128 0x49
+	.uleb128 0x4c
 	.ascii	"lpa\000"
 	.byte	0x5
 	.2byte	0x1d8
 	.4byte	0xdc5
-	.uleb128 0x49
+	.uleb128 0x4c
 	.ascii	"ppa\000"
 	.byte	0x5
 	.2byte	0x1d8
 	.4byte	0xdc5
-	.uleb128 0x48
-	.4byte	.LASF591
+	.uleb128 0x4b
+	.4byte	.LASF594
 	.byte	0x5
 	.2byte	0x1d9
 	.4byte	0xdba
-	.uleb128 0x48
+	.uleb128 0x4b
 	.4byte	.LASF299
 	.byte	0x5
 	.2byte	0x1da
 	.4byte	0xdba
-	.uleb128 0x48
-	.4byte	.LASF592
+	.uleb128 0x4b
+	.4byte	.LASF595
 	.byte	0x5
 	.2byte	0x1da
 	.4byte	0xdba
-	.uleb128 0x48
-	.4byte	.LASF593
+	.uleb128 0x4b
+	.4byte	.LASF596
 	.byte	0x5
 	.2byte	0x1da
 	.4byte	0xdba
-	.uleb128 0x48
-	.4byte	.LASF594
+	.uleb128 0x4b
+	.4byte	.LASF597
 	.byte	0x5
 	.2byte	0x1da
 	.4byte	0xdba
-	.uleb128 0x48
-	.4byte	.LASF595
+	.uleb128 0x4b
+	.4byte	.LASF598
 	.byte	0x5
 	.2byte	0x1db
 	.4byte	0xdba
-	.uleb128 0x48
-	.4byte	.LASF596
+	.uleb128 0x4b
+	.4byte	.LASF599
 	.byte	0x5
 	.2byte	0x1dc
-	.4byte	0x2a63
-	.uleb128 0x4a
-	.4byte	.LASF597
+	.4byte	0x2aca
+	.uleb128 0x4d
+	.4byte	.LASF600
 	.byte	0x5
 	.2byte	0x276
-	.uleb128 0x4a
-	.4byte	.LASF598
+	.uleb128 0x4d
+	.4byte	.LASF601
 	.byte	0x5
 	.2byte	0x279
-	.uleb128 0x4b
+	.uleb128 0x4e
 	.4byte	.LASF574
-	.4byte	0x2a79
-	.4byte	.LASF587
-	.uleb128 0x4c
-	.uleb128 0x48
-	.4byte	.LASF599
+	.4byte	0x2ae0
+	.4byte	.LASF590
+	.uleb128 0x4f
+	.uleb128 0x4b
+	.4byte	.LASF602
 	.byte	0x5
 	.2byte	0x1f3
 	.4byte	0xdba
@@ -29017,97 +29092,97 @@ __func__.9940:
 	.4byte	0x1229
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x2a79
+	.4byte	0x2ae0
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x16
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x2a69
-	.uleb128 0x46
-	.4byte	.LASF600
+	.4byte	0x2ad0
+	.uleb128 0x49
+	.4byte	.LASF603
 	.byte	0x5
 	.2byte	0x1a2
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x2ade
-	.uleb128 0x49
+	.4byte	0x2b45
+	.uleb128 0x4c
 	.ascii	"ret\000"
 	.byte	0x5
 	.2byte	0x1a4
 	.4byte	0x50
-	.uleb128 0x49
+	.uleb128 0x4c
 	.ascii	"i\000"
 	.byte	0x5
 	.2byte	0x1a5
 	.4byte	0x50
-	.uleb128 0x49
+	.uleb128 0x4c
 	.ascii	"ppa\000"
 	.byte	0x5
 	.2byte	0x1a6
 	.4byte	0xdc5
-	.uleb128 0x48
+	.uleb128 0x4b
 	.4byte	.LASF565
 	.byte	0x5
 	.2byte	0x1a7
 	.4byte	0x2454
-	.uleb128 0x4d
-	.4byte	0x2acf
-	.uleb128 0x48
-	.4byte	.LASF601
+	.uleb128 0x50
+	.4byte	0x2b36
+	.uleb128 0x4b
+	.4byte	.LASF604
 	.byte	0x5
 	.2byte	0x1b1
 	.4byte	0xde6
 	.byte	0
-	.uleb128 0x4c
-	.uleb128 0x48
-	.4byte	.LASF602
+	.uleb128 0x4f
+	.uleb128 0x4b
+	.4byte	.LASF605
 	.byte	0x5
 	.2byte	0x1c6
 	.4byte	0xdc5
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF603
+	.uleb128 0x49
+	.4byte	.LASF606
 	.byte	0x5
 	.2byte	0x185
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x2b28
-	.uleb128 0x47
-	.4byte	.LASF604
+	.4byte	0x2b8f
+	.uleb128 0x4a
+	.4byte	.LASF607
 	.byte	0x5
 	.2byte	0x185
 	.4byte	0xdba
-	.uleb128 0x48
-	.4byte	.LASF592
+	.uleb128 0x4b
+	.4byte	.LASF595
 	.byte	0x5
 	.2byte	0x187
 	.4byte	0xdba
-	.uleb128 0x49
+	.uleb128 0x4c
 	.ascii	"i\000"
 	.byte	0x5
 	.2byte	0x188
 	.4byte	0xdba
-	.uleb128 0x49
+	.uleb128 0x4c
 	.ascii	"j\000"
 	.byte	0x5
 	.2byte	0x188
 	.4byte	0xdba
-	.uleb128 0x48
+	.uleb128 0x4b
 	.4byte	.LASF388
 	.byte	0x5
 	.2byte	0x189
 	.4byte	0xdba
 	.byte	0
-	.uleb128 0x4e
-	.4byte	.LASF714
+	.uleb128 0x51
+	.4byte	.LASF715
 	.byte	0x5
 	.2byte	0x17a
 	.4byte	0x50
 	.byte	0x1
-	.uleb128 0x45
-	.4byte	.LASF605
+	.uleb128 0x48
+	.4byte	.LASF608
 	.byte	0x5
 	.2byte	0x166
 	.4byte	0x50
@@ -29115,29 +29190,29 @@ __func__.9940:
 	.4byte	.LFE318-.LFB318
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2bbf
-	.uleb128 0x4f
+	.4byte	0x2c26
+	.uleb128 0x52
 	.4byte	.LASF388
 	.byte	0x5
 	.2byte	0x166
 	.4byte	0xdba
 	.4byte	.LLST138
-	.uleb128 0x50
+	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x5
 	.2byte	0x168
 	.4byte	0xdba
 	.4byte	.LLST139
-	.uleb128 0x51
-	.4byte	.LASF606
+	.uleb128 0x54
+	.4byte	.LASF609
 	.byte	0x5
 	.2byte	0x169
 	.4byte	0xdba
 	.4byte	.LLST140
 	.uleb128 0x32
 	.4byte	.LVL537
-	.4byte	0x6122
-	.4byte	0x2b91
+	.4byte	0x6189
+	.4byte	0x2bf8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29147,8 +29222,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL539
-	.4byte	0x9222
-	.4byte	0x2bae
+	.4byte	0x9289
+	.4byte	0x2c15
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29164,7 +29239,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x34
 	.4byte	.LVL540
-	.4byte	0x2bbf
+	.4byte	0x2c26
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29173,8 +29248,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF607
+	.uleb128 0x48
+	.4byte	.LASF610
 	.byte	0x5
 	.2byte	0x158
 	.4byte	0x50
@@ -29182,16 +29257,16 @@ __func__.9940:
 	.4byte	.LFE317-.LFB317
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2c03
-	.uleb128 0x4f
-	.4byte	.LASF608
+	.4byte	0x2c6a
+	.uleb128 0x52
+	.4byte	.LASF587
 	.byte	0x5
 	.2byte	0x158
 	.4byte	0xdba
 	.4byte	.LLST137
 	.uleb128 0x34
 	.4byte	.LVL535
-	.4byte	0x9222
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29206,8 +29281,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF609
+	.uleb128 0x48
+	.4byte	.LASF611
 	.byte	0x5
 	.2byte	0x13b
 	.4byte	0xdc5
@@ -29215,23 +29290,23 @@ __func__.9940:
 	.4byte	.LFE316-.LFB316
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2ca7
-	.uleb128 0x50
+	.4byte	0x2d0e
+	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x5
 	.2byte	0x13d
 	.4byte	0xdba
-	.4byte	.LLST394
-	.uleb128 0x51
-	.4byte	.LASF596
+	.4byte	.LLST396
+	.uleb128 0x54
+	.4byte	.LASF599
 	.byte	0x5
 	.2byte	0x13e
-	.4byte	0x2a63
-	.4byte	.LLST395
+	.4byte	0x2aca
+	.4byte	.LLST397
 	.uleb128 0x32
-	.4byte	.LVL1697
+	.4byte	.LVL1699
 	.4byte	0x251a
-	.4byte	0x2c55
+	.4byte	0x2cbc
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
@@ -29246,9 +29321,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1698
-	.4byte	0x3183
-	.4byte	0x2c6f
+	.4byte	.LVL1700
+	.4byte	0x31ea
+	.4byte	0x2cd6
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29263,9 +29338,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1699
-	.4byte	0x2edb
-	.4byte	0x2c82
+	.4byte	.LVL1701
+	.4byte	0x2f42
+	.4byte	0x2ce9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29273,20 +29348,20 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1701
-	.4byte	0x6828
-	.uleb128 0x44
-	.4byte	.LVL1702
-	.4byte	0x65f0
-	.uleb128 0x44
 	.4byte	.LVL1703
-	.4byte	0x2e94
+	.4byte	0x688f
+	.uleb128 0x44
+	.4byte	.LVL1704
+	.4byte	0x6657
 	.uleb128 0x44
 	.4byte	.LVL1705
-	.4byte	0x308c
+	.4byte	0x2efb
+	.uleb128 0x44
+	.4byte	.LVL1707
+	.4byte	0x30f3
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF610
+	.uleb128 0x48
+	.4byte	.LASF612
 	.byte	0x5
 	.2byte	0x12b
 	.4byte	0xdc5
@@ -29294,14 +29369,14 @@ __func__.9940:
 	.4byte	.LFE315-.LFB315
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2d2c
+	.4byte	0x2d93
 	.uleb128 0x44
-	.4byte	.LVL1706
-	.4byte	0x6e77
+	.4byte	.LVL1708
+	.4byte	0x6ede
 	.uleb128 0x32
-	.4byte	.LVL1707
-	.4byte	0x2edb
-	.4byte	0x2cde
+	.4byte	.LVL1709
+	.4byte	0x2f42
+	.4byte	0x2d45
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29310,9 +29385,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1708
-	.4byte	0x34ac
-	.4byte	0x2cf2
+	.4byte	.LVL1710
+	.4byte	0x3513
+	.4byte	0x2d59
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29321,12 +29396,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1709
-	.4byte	0x5313
+	.4byte	.LVL1711
+	.4byte	0x537a
 	.uleb128 0x32
-	.4byte	.LVL1710
-	.4byte	0x4f7f
-	.4byte	0x2d0f
+	.4byte	.LVL1712
+	.4byte	0x4fe6
+	.4byte	0x2d76
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29335,11 +29410,11 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1711
-	.4byte	0x4d0e
+	.4byte	.LVL1713
+	.4byte	0x4d75
 	.uleb128 0x2d
-	.4byte	.LVL1712
-	.4byte	0x32d7
+	.4byte	.LVL1714
+	.4byte	0x333e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29348,13 +29423,13 @@ __func__.9940:
 	.4byte	.LANCHOR53
 	.byte	0
 	.byte	0
-	.uleb128 0x52
-	.4byte	.LASF670
+	.uleb128 0x55
+	.4byte	.LASF671
 	.byte	0x5
 	.2byte	0x120
 	.byte	0x1
 	.uleb128 0x2b
-	.4byte	.LASF611
+	.4byte	.LASF613
 	.byte	0x5
 	.byte	0xd2
 	.4byte	0xdc5
@@ -29362,99 +29437,99 @@ __func__.9940:
 	.4byte	.LFE313-.LFB313
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2e94
+	.4byte	0x2efb
 	.uleb128 0x2c
-	.4byte	.LASF612
+	.4byte	.LASF614
 	.byte	0x5
 	.byte	0xd2
 	.4byte	0x1d79
-	.4byte	.LLST269
+	.4byte	.LLST271
 	.uleb128 0x2c
-	.4byte	.LASF613
+	.4byte	.LASF615
 	.byte	0x5
 	.byte	0xd2
 	.4byte	0xdc5
-	.4byte	.LLST270
+	.4byte	.LLST272
 	.uleb128 0x30
-	.4byte	.LASF594
+	.4byte	.LASF597
 	.byte	0x5
 	.byte	0xd4
 	.4byte	0xdba
-	.4byte	.LLST271
+	.4byte	.LLST273
 	.uleb128 0x30
 	.4byte	.LASF569
 	.byte	0x5
 	.byte	0xd5
 	.4byte	0xdba
-	.4byte	.LLST272
+	.4byte	.LLST274
 	.uleb128 0x3b
 	.ascii	"req\000"
 	.byte	0x5
 	.byte	0xd5
 	.4byte	0xdba
-	.4byte	.LLST273
+	.4byte	.LLST275
 	.uleb128 0x30
-	.4byte	.LASF592
+	.4byte	.LASF595
 	.byte	0x5
 	.byte	0xd6
 	.4byte	0xdba
-	.4byte	.LLST274
+	.4byte	.LLST276
 	.uleb128 0x30
 	.4byte	.LASF382
 	.byte	0x5
 	.byte	0xd6
 	.4byte	0xdba
-	.4byte	.LLST275
+	.4byte	.LLST277
 	.uleb128 0x30
 	.4byte	.LASF380
 	.byte	0x5
 	.byte	0xd6
 	.4byte	0xdba
-	.4byte	.LLST276
+	.4byte	.LLST278
 	.uleb128 0x30
-	.4byte	.LASF614
+	.4byte	.LASF616
 	.byte	0x5
 	.byte	0xd7
 	.4byte	0xdc5
-	.4byte	.LLST277
+	.4byte	.LLST279
 	.uleb128 0x30
-	.4byte	.LASF615
+	.4byte	.LASF617
 	.byte	0x5
 	.byte	0xd8
 	.4byte	0xdc5
-	.4byte	.LLST278
-	.uleb128 0x53
-	.4byte	.LASF616
+	.4byte	.LLST280
+	.uleb128 0x56
+	.4byte	.LASF618
 	.byte	0x5
 	.byte	0xd9
 	.4byte	0xdc5
 	.sleb128 -1
 	.uleb128 0x30
-	.4byte	.LASF596
+	.4byte	.LASF599
 	.byte	0x5
 	.byte	0xda
-	.4byte	0x2a63
-	.4byte	.LLST279
-	.uleb128 0x54
-	.4byte	.LASF617
+	.4byte	0x2aca
+	.4byte	.LLST281
+	.uleb128 0x57
+	.4byte	.LASF619
 	.byte	0x5
 	.byte	0xe1
-	.uleb128 0x54
-	.4byte	.LASF618
+	.uleb128 0x57
+	.4byte	.LASF620
 	.byte	0x5
 	.byte	0xe5
-	.uleb128 0x55
-	.4byte	.LASF688
+	.uleb128 0x58
+	.4byte	.LASF689
 	.byte	0x5
 	.2byte	0x117
-	.4byte	.L976
+	.4byte	.L977
 	.uleb128 0x44
-	.4byte	.LVL1098
-	.4byte	0x2e94
+	.4byte	.LVL1100
+	.4byte	0x2efb
 	.uleb128 0x32
-	.4byte	.LVL1107
+	.4byte	.LVL1109
 	.4byte	0x26b9
-	.4byte	0x2e43
+	.4byte	0x2eaa
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29476,9 +29551,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1120
-	.4byte	0x615a
-	.4byte	0x2e5e
+	.4byte	.LVL1122
+	.4byte	0x61c1
+	.4byte	0x2ec5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29494,9 +29569,9 @@ __func__.9940:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1126
-	.4byte	0x468d
-	.4byte	0x2e78
+	.4byte	.LVL1128
+	.4byte	0x46f4
+	.4byte	0x2edf
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29511,28 +29586,28 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1129
-	.4byte	0x308c
-	.uleb128 0x44
-	.4byte	.LVL1133
-	.4byte	0x5d9a
+	.4byte	.LVL1131
+	.4byte	0x30f3
 	.uleb128 0x44
 	.4byte	.LVL1135
-	.4byte	0x2e94
+	.4byte	0x5e01
+	.uleb128 0x44
+	.4byte	.LVL1137
+	.4byte	0x2efb
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF620
+	.4byte	.LASF621
 	.byte	0x5
 	.byte	0xc9
 	.4byte	.LFB312
 	.4byte	.LFE312-.LFB312
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2edb
+	.4byte	0x2f42
 	.uleb128 0x32
-	.4byte	.LVL1093
+	.4byte	.LVL1095
 	.4byte	0x230c
-	.4byte	0x2ebd
+	.4byte	0x2f24
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -29541,9 +29616,9 @@ __func__.9940:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1094
+	.4byte	.LVL1096
 	.4byte	0x230c
-	.4byte	0x2ed1
+	.4byte	0x2f38
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -29551,12 +29626,12 @@ __func__.9940:
 	.byte	0x8
 	.byte	0xff
 	.byte	0
-	.uleb128 0x56
-	.4byte	.LVL1095
-	.4byte	0x31cf
+	.uleb128 0x59
+	.4byte	.LVL1097
+	.4byte	0x3236
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF621
+	.4byte	.LASF622
 	.byte	0x5
 	.byte	0x6f
 	.4byte	0x50
@@ -29564,27 +29639,27 @@ __func__.9940:
 	.4byte	.LFE311-.LFB311
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3077
+	.4byte	0x30de
 	.uleb128 0x2c
-	.4byte	.LASF622
+	.4byte	.LASF623
 	.byte	0x5
 	.byte	0x6f
 	.4byte	0x50
-	.4byte	.LLST389
+	.4byte	.LLST391
 	.uleb128 0x3b
 	.ascii	"i\000"
 	.byte	0x5
 	.byte	0x71
 	.4byte	0xdba
-	.4byte	.LLST390
+	.4byte	.LLST392
 	.uleb128 0x30
-	.4byte	.LASF623
+	.4byte	.LASF624
 	.byte	0x5
 	.byte	0x71
 	.4byte	0xdba
-	.4byte	.LLST391
+	.4byte	.LLST393
 	.uleb128 0x29
-	.4byte	.LASF624
+	.4byte	.LASF625
 	.byte	0x5
 	.byte	0x72
 	.4byte	0xdc5
@@ -29592,13 +29667,13 @@ __func__.9940:
 	.byte	0x91
 	.sleb128 -36
 	.uleb128 0x30
-	.4byte	.LASF625
+	.4byte	.LASF626
 	.byte	0x5
 	.byte	0x73
 	.4byte	0xdc5
-	.4byte	.LLST392
+	.4byte	.LLST394
 	.uleb128 0x29
-	.4byte	.LASF612
+	.4byte	.LASF614
 	.byte	0x5
 	.byte	0x74
 	.4byte	0x1d79
@@ -29607,21 +29682,21 @@ __func__.9940:
 	.4byte	g_gc_temp_superblock
 	.byte	0x9f
 	.uleb128 0x30
-	.4byte	.LASF626
+	.4byte	.LASF627
 	.byte	0x5
 	.byte	0x75
 	.4byte	0x1db2
-	.4byte	.LLST393
+	.4byte	.LLST395
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x3087
+	.4byte	0x30ee
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9940
 	.uleb128 0x32
-	.4byte	.LVL1660
-	.4byte	0x2d35
-	.4byte	0x2f80
+	.4byte	.LVL1662
+	.4byte	0x2d9c
+	.4byte	0x2fe7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29630,9 +29705,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1661
-	.4byte	0x4f7f
-	.4byte	0x2f93
+	.4byte	.LVL1663
+	.4byte	0x4fe6
+	.4byte	0x2ffa
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29640,18 +29715,18 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1662
-	.4byte	0x6828
+	.4byte	.LVL1664
+	.4byte	0x688f
 	.uleb128 0x44
-	.4byte	.LVL1663
-	.4byte	0x65f0
+	.4byte	.LVL1665
+	.4byte	0x6657
 	.uleb128 0x44
-	.4byte	.LVL1667
-	.4byte	0x6e77
+	.4byte	.LVL1669
+	.4byte	0x6ede
 	.uleb128 0x32
-	.4byte	.LVL1668
-	.4byte	0x9222
-	.4byte	0x2fd4
+	.4byte	.LVL1670
+	.4byte	0x9289
+	.4byte	0x303b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29672,9 +29747,9 @@ __func__.9940:
 	.byte	0xa2
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1670
-	.4byte	0x31f2
-	.4byte	0x2fe8
+	.4byte	.LVL1672
+	.4byte	0x3259
+	.4byte	0x304f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29683,18 +29758,18 @@ __func__.9940:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1671
-	.4byte	0x5d75
-	.uleb128 0x44
 	.4byte	.LVL1673
-	.4byte	0x5313
+	.4byte	0x5ddc
 	.uleb128 0x44
-	.4byte	.LVL1674
-	.4byte	0x4d0e
+	.4byte	.LVL1675
+	.4byte	0x537a
+	.uleb128 0x44
+	.4byte	.LVL1676
+	.4byte	0x4d75
 	.uleb128 0x32
-	.4byte	.LVL1677
-	.4byte	0x9222
-	.4byte	0x3029
+	.4byte	.LVL1679
+	.4byte	0x9289
+	.4byte	0x3090
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29715,9 +29790,9 @@ __func__.9940:
 	.byte	0xa8
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1678
-	.4byte	0x5212
-	.4byte	0x3042
+	.4byte	.LVL1680
+	.4byte	0x5279
+	.4byte	0x30a9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -29731,12 +29806,12 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1679
-	.4byte	0x6122
-	.uleb128 0x32
 	.4byte	.LVL1681
-	.4byte	0x5212
-	.4byte	0x3064
+	.4byte	0x6189
+	.uleb128 0x32
+	.4byte	.LVL1683
+	.4byte	0x5279
+	.4byte	0x30cb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -29750,32 +29825,32 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1683
-	.4byte	0x31f2
+	.4byte	.LVL1685
+	.4byte	0x3259
 	.uleb128 0x44
-	.4byte	.LVL1687
-	.4byte	0x5d9a
+	.4byte	.LVL1689
+	.4byte	0x5e01
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x3087
+	.4byte	0x30ee
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x12
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x3077
+	.4byte	0x30de
 	.uleb128 0x42
-	.4byte	.LASF627
+	.4byte	.LASF628
 	.byte	0x5
 	.byte	0x54
 	.4byte	.LFB310
 	.4byte	.LFE310-.LFB310
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3101
+	.4byte	0x3168
 	.uleb128 0x2c
-	.4byte	.LASF628
+	.4byte	.LASF629
 	.byte	0x5
 	.byte	0x54
 	.4byte	0xdc5
@@ -29793,7 +29868,7 @@ __func__.9940:
 	.4byte	0xdc5
 	.4byte	.LLST134
 	.uleb128 0x30
-	.4byte	.LASF629
+	.4byte	.LASF630
 	.byte	0x5
 	.byte	0x56
 	.4byte	0xdba
@@ -29806,7 +29881,7 @@ __func__.9940:
 	.4byte	.LLST136
 	.uleb128 0x34
 	.4byte	.LVL527
-	.4byte	0x6122
+	.4byte	0x6189
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29822,7 +29897,7 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF630
+	.4byte	.LASF631
 	.byte	0x5
 	.byte	0x49
 	.4byte	0xdc5
@@ -29830,7 +29905,7 @@ __func__.9940:
 	.4byte	.LFE309-.LFB309
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3137
+	.4byte	0x319e
 	.uleb128 0x2f
 	.ascii	"blk\000"
 	.byte	0x5
@@ -29845,23 +29920,23 @@ __func__.9940:
 	.4byte	.LLST131
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF631
+	.4byte	.LASF632
 	.byte	0x5
 	.byte	0x38
 	.4byte	.LFB308
 	.4byte	.LFE308-.LFB308
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3183
-	.uleb128 0x57
+	.4byte	0x31ea
+	.uleb128 0x5a
 	.ascii	"req\000"
 	.byte	0x5
 	.byte	0x38
 	.4byte	0x19f9
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x58
-	.4byte	.LASF632
+	.uleb128 0x5b
+	.4byte	.LASF633
 	.byte	0x5
 	.byte	0x38
 	.4byte	0xdc5
@@ -29874,30 +29949,30 @@ __func__.9940:
 	.4byte	0xdba
 	.4byte	.LLST128
 	.uleb128 0x30
-	.4byte	.LASF633
+	.4byte	.LASF634
 	.byte	0x5
 	.byte	0x3b
 	.4byte	0xdba
 	.4byte	.LLST129
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF634
+	.4byte	.LASF635
 	.byte	0x5
 	.byte	0x29
 	.4byte	.LFB307
 	.4byte	.LFE307-.LFB307
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x31cf
-	.uleb128 0x57
+	.4byte	0x3236
+	.uleb128 0x5a
 	.ascii	"req\000"
 	.byte	0x5
 	.byte	0x29
 	.4byte	0x19f9
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x58
-	.4byte	.LASF632
+	.uleb128 0x5b
+	.4byte	.LASF633
 	.byte	0x5
 	.byte	0x29
 	.4byte	0xdc5
@@ -29910,21 +29985,21 @@ __func__.9940:
 	.4byte	0xdba
 	.4byte	.LLST126
 	.uleb128 0x30
-	.4byte	.LASF633
+	.4byte	.LASF634
 	.byte	0x5
 	.byte	0x2c
 	.4byte	0xdba
 	.4byte	.LLST127
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF635
+	.4byte	.LASF636
 	.byte	0x5
 	.byte	0x15
 	.4byte	.LFB306
 	.4byte	.LFE306-.LFB306
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x31f2
+	.4byte	0x3259
 	.uleb128 0x3b
 	.ascii	"i\000"
 	.byte	0x5
@@ -29932,8 +30007,8 @@ __func__.9940:
 	.4byte	0xdba
 	.4byte	.LLST125
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF636
+	.uleb128 0x48
+	.4byte	.LASF637
 	.byte	0x2
 	.2byte	0xa93
 	.4byte	0x50
@@ -29941,29 +30016,29 @@ __func__.9940:
 	.4byte	.LFE305-.LFB305
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3282
-	.uleb128 0x4f
-	.4byte	.LASF623
+	.4byte	0x32e9
+	.uleb128 0x52
+	.4byte	.LASF624
 	.byte	0x2
 	.2byte	0xa93
 	.4byte	0xdba
-	.4byte	.LLST307
-	.uleb128 0x50
+	.4byte	.LLST309
+	.uleb128 0x53
 	.ascii	"ret\000"
 	.byte	0x2
 	.2byte	0xa95
 	.4byte	0x50
-	.4byte	.LLST308
+	.4byte	.LLST310
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x3292
+	.4byte	0x32f9
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9870
 	.uleb128 0x32
-	.4byte	.LVL1257
-	.4byte	0x9222
-	.4byte	0x3258
+	.4byte	.LVL1259
+	.4byte	0x9289
+	.4byte	0x32bf
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29978,9 +30053,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1261
-	.4byte	0x9222
-	.4byte	0x3278
+	.4byte	.LVL1263
+	.4byte	0x9289
+	.4byte	0x32df
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29995,46 +30070,46 @@ __func__.9940:
 	.4byte	.LANCHOR160
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1264
-	.4byte	0x3297
+	.4byte	.LVL1266
+	.4byte	0x32fe
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x3292
+	.4byte	0x32f9
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x13
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x3282
-	.uleb128 0x46
-	.4byte	.LASF637
+	.4byte	0x32e9
+	.uleb128 0x49
+	.4byte	.LASF638
 	.byte	0x2
 	.2byte	0xa7e
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x32c2
-	.uleb128 0x47
-	.4byte	.LASF623
+	.4byte	0x3329
+	.uleb128 0x4a
+	.4byte	.LASF624
 	.byte	0x2
 	.2byte	0xa7e
 	.4byte	0xdba
-	.uleb128 0x4b
+	.uleb128 0x4e
 	.4byte	.LASF574
-	.4byte	0x32d2
-	.4byte	.LASF637
+	.4byte	0x3339
+	.4byte	.LASF638
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x32d2
+	.4byte	0x3339
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0xf
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x32c2
-	.uleb128 0x45
-	.4byte	.LASF638
+	.4byte	0x3329
+	.uleb128 0x48
+	.4byte	.LASF639
 	.byte	0x2
 	.2byte	0xa5e
 	.4byte	0xdc5
@@ -30042,35 +30117,35 @@ __func__.9940:
 	.4byte	.LFE303-.LFB303
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x33c9
-	.uleb128 0x4f
-	.4byte	.LASF639
+	.4byte	0x3430
+	.uleb128 0x52
+	.4byte	.LASF640
 	.byte	0x2
 	.2byte	0xa5e
 	.4byte	0x1d79
 	.4byte	.LLST122
-	.uleb128 0x51
-	.4byte	.LASF594
+	.uleb128 0x54
+	.4byte	.LASF597
 	.byte	0x2
 	.2byte	0xa60
 	.4byte	0xdba
 	.4byte	.LLST123
-	.uleb128 0x51
-	.4byte	.LASF640
+	.uleb128 0x54
+	.4byte	.LASF641
 	.byte	0x2
 	.2byte	0xa61
 	.4byte	0xdc5
 	.4byte	.LLST124
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x3087
+	.4byte	0x30ee
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9850
 	.uleb128 0x32
 	.4byte	.LVL490
-	.4byte	0x9222
-	.4byte	0x3357
+	.4byte	0x9289
+	.4byte	0x33be
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30092,8 +30167,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL491
-	.4byte	0x9222
-	.4byte	0x337e
+	.4byte	0x9289
+	.4byte	0x33e5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30115,8 +30190,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL492
-	.4byte	0x9222
-	.4byte	0x33a5
+	.4byte	0x9289
+	.4byte	0x340c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30138,7 +30213,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x34
 	.4byte	.LVL496
-	.4byte	0x9222
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30159,8 +30234,8 @@ __func__.9940:
 	.2byte	0xa7a
 	.byte	0
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF641
+	.uleb128 0x48
+	.4byte	.LASF642
 	.byte	0x2
 	.2byte	0xa46
 	.4byte	0x50
@@ -30168,15 +30243,15 @@ __func__.9940:
 	.4byte	.LFE302-.LFB302
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3497
-	.uleb128 0x4f
-	.4byte	.LASF639
+	.4byte	0x34fe
+	.uleb128 0x52
+	.4byte	.LASF640
 	.byte	0x2
 	.2byte	0xa46
 	.4byte	0x1d79
-	.4byte	.LLST374
+	.4byte	.LLST376
 	.uleb128 0x28
-	.4byte	.LASF623
+	.4byte	.LASF624
 	.byte	0x2
 	.2byte	0xa48
 	.4byte	0xdba
@@ -30184,14 +30259,14 @@ __func__.9940:
 	.byte	0x54
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x34a7
+	.4byte	0x350e
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9843
 	.uleb128 0x32
-	.4byte	.LVL1593
-	.4byte	0x9222
-	.4byte	0x3437
+	.4byte	.LVL1595
+	.4byte	0x9289
+	.4byte	0x349e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30212,9 +30287,9 @@ __func__.9940:
 	.2byte	0xa49
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1594
-	.4byte	0x5d75
-	.4byte	0x344b
+	.4byte	.LVL1596
+	.4byte	0x5ddc
+	.4byte	0x34b2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30223,12 +30298,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1595
-	.4byte	0x3297
+	.4byte	.LVL1597
+	.4byte	0x32fe
 	.uleb128 0x32
-	.4byte	.LVL1596
-	.4byte	0x34ac
-	.4byte	0x3468
+	.4byte	.LVL1598
+	.4byte	0x3513
+	.4byte	0x34cf
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30237,12 +30312,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1597
-	.4byte	0x5313
+	.4byte	.LVL1599
+	.4byte	0x537a
 	.uleb128 0x32
-	.4byte	.LVL1598
-	.4byte	0x4f7f
-	.4byte	0x3484
+	.4byte	.LVL1600
+	.4byte	0x4fe6
+	.4byte	0x34eb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30250,23 +30325,23 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1599
-	.4byte	0x4d0e
-	.uleb128 0x44
 	.4byte	.LVL1601
-	.4byte	0x5d9a
+	.4byte	0x4d75
+	.uleb128 0x44
+	.4byte	.LVL1603
+	.4byte	0x5e01
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x34a7
+	.4byte	0x350e
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x1c
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x3497
-	.uleb128 0x59
-	.4byte	.LASF642
+	.4byte	0x34fe
+	.uleb128 0x5c
+	.4byte	.LASF643
 	.byte	0x2
 	.2byte	0x9e2
 	.4byte	0x50
@@ -30274,80 +30349,80 @@ __func__.9940:
 	.4byte	.LFE301-.LFB301
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3747
-	.uleb128 0x5a
+	.4byte	0x37ae
+	.uleb128 0x5d
 	.ascii	"p\000"
 	.byte	0x2
 	.2byte	0x9e2
 	.4byte	0x1d79
-	.4byte	.LLST292
-	.uleb128 0x51
-	.4byte	.LASF643
+	.4byte	.LLST294
+	.uleb128 0x54
+	.4byte	.LASF644
 	.byte	0x2
 	.2byte	0x9e4
 	.4byte	0xdba
-	.4byte	.LLST293
-	.uleb128 0x48
-	.4byte	.LASF592
+	.4byte	.LLST295
+	.uleb128 0x4b
+	.4byte	.LASF595
 	.byte	0x2
 	.2byte	0x9e5
 	.4byte	0xdba
-	.uleb128 0x51
+	.uleb128 0x54
 	.4byte	.LASF569
 	.byte	0x2
 	.2byte	0x9e5
 	.4byte	0xdba
-	.4byte	.LLST294
-	.uleb128 0x50
+	.4byte	.LLST296
+	.uleb128 0x53
 	.ascii	"n\000"
 	.byte	0x2
 	.2byte	0x9e5
 	.4byte	0xdba
-	.4byte	.LLST295
-	.uleb128 0x51
-	.4byte	.LASF594
+	.4byte	.LLST297
+	.uleb128 0x54
+	.4byte	.LASF597
 	.byte	0x2
 	.2byte	0x9e5
 	.4byte	0xdba
-	.4byte	.LLST296
-	.uleb128 0x51
-	.4byte	.LASF644
+	.4byte	.LLST298
+	.uleb128 0x54
+	.4byte	.LASF645
 	.byte	0x2
 	.2byte	0x9e6
 	.4byte	0x50
-	.4byte	.LLST297
-	.uleb128 0x51
-	.4byte	.LASF645
+	.4byte	.LLST299
+	.uleb128 0x54
+	.4byte	.LASF646
 	.byte	0x2
 	.2byte	0x9e7
 	.4byte	0xdba
-	.4byte	.LLST298
-	.uleb128 0x4a
-	.4byte	.LASF646
+	.4byte	.LLST300
+	.uleb128 0x4d
+	.4byte	.LASF647
 	.byte	0x2
 	.2byte	0x9e8
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x3757
+	.4byte	0x37be
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9822
-	.uleb128 0x5b
-	.4byte	0x4ad9
-	.4byte	.LBB243
+	.uleb128 0x5e
+	.4byte	0x4b40
+	.4byte	.LBB247
 	.4byte	.Ldebug_ranges0+0xd0
 	.byte	0x2
 	.2byte	0xa18
-	.4byte	0x3593
-	.uleb128 0x5c
-	.4byte	0x4af2
-	.4byte	.LLST299
-	.uleb128 0x5c
-	.4byte	0x4ae6
-	.4byte	.LLST300
+	.4byte	0x35fa
+	.uleb128 0x46
+	.4byte	0x4b59
+	.4byte	.LLST301
+	.uleb128 0x46
+	.4byte	0x4b4d
+	.4byte	.LLST302
 	.uleb128 0x34
-	.4byte	.LVL1213
-	.4byte	0x8420
+	.4byte	.LVL1215
+	.4byte	0x8487
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30355,15 +30430,15 @@ __func__.9940:
 	.byte	0x77
 	.sleb128 0
 	.uleb128 0x3c
-	.4byte	0x4af2
+	.4byte	0x4b59
 	.uleb128 0x1
 	.byte	0x31
 	.byte	0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1184
-	.4byte	0x9222
-	.4byte	0x35ba
+	.4byte	.LVL1186
+	.4byte	0x9289
+	.4byte	0x3621
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30384,9 +30459,9 @@ __func__.9940:
 	.2byte	0x9e9
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1188
-	.4byte	0x5b5f
-	.4byte	0x35d1
+	.4byte	.LVL1190
+	.4byte	0x5bc6
+	.4byte	0x3638
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30395,9 +30470,9 @@ __func__.9940:
 	.4byte	.LANCHOR47
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1190
-	.4byte	0x9222
-	.4byte	0x35f8
+	.4byte	.LVL1192
+	.4byte	0x9289
+	.4byte	0x365f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30418,9 +30493,9 @@ __func__.9940:
 	.2byte	0x9f2
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1191
-	.4byte	0x3ec7
-	.4byte	0x360c
+	.4byte	.LVL1193
+	.4byte	0x3f2e
+	.4byte	0x3673
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30429,9 +30504,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1192
-	.4byte	0x5d75
-	.4byte	0x3620
+	.4byte	.LVL1194
+	.4byte	0x5ddc
+	.4byte	0x3687
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30440,9 +30515,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1193
-	.4byte	0x9222
-	.4byte	0x3647
+	.4byte	.LVL1195
+	.4byte	0x9289
+	.4byte	0x36ae
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30463,9 +30538,9 @@ __func__.9940:
 	.2byte	0x9fd
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1196
-	.4byte	0x9222
-	.4byte	0x366e
+	.4byte	.LVL1198
+	.4byte	0x9289
+	.4byte	0x36d5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30486,9 +30561,9 @@ __func__.9940:
 	.2byte	0xa00
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1198
-	.4byte	0x9222
-	.4byte	0x3695
+	.4byte	.LVL1200
+	.4byte	0x9289
+	.4byte	0x36fc
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30509,9 +30584,9 @@ __func__.9940:
 	.2byte	0xa0b
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1199
-	.4byte	0x9222
-	.4byte	0x36bc
+	.4byte	.LVL1201
+	.4byte	0x9289
+	.4byte	0x3723
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30532,9 +30607,9 @@ __func__.9940:
 	.2byte	0xa0d
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1200
-	.4byte	0x4ad9
-	.4byte	0x36d5
+	.4byte	.LVL1202
+	.4byte	0x4b40
+	.4byte	0x373c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30548,9 +30623,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1204
+	.4byte	.LVL1206
 	.4byte	0x2464
-	.4byte	0x36e9
+	.4byte	0x3750
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
@@ -30559,9 +30634,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1206
-	.4byte	0x38bf
-	.4byte	0x36fd
+	.4byte	.LVL1208
+	.4byte	0x3926
+	.4byte	0x3764
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30570,12 +30645,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1207
-	.4byte	0x65f0
+	.4byte	.LVL1209
+	.4byte	0x6657
 	.uleb128 0x32
-	.4byte	.LVL1208
-	.4byte	0x5d75
-	.4byte	0x371a
+	.4byte	.LVL1210
+	.4byte	0x5ddc
+	.4byte	0x3781
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30584,11 +30659,11 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1218
-	.4byte	0x6828
+	.4byte	.LVL1220
+	.4byte	0x688f
 	.uleb128 0x34
-	.4byte	.LVL1222
-	.4byte	0x9222
+	.4byte	.LVL1224
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30611,28 +30686,28 @@ __func__.9940:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x3757
+	.4byte	0x37be
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x18
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x3747
-	.uleb128 0x46
-	.4byte	.LASF647
+	.4byte	0x37ae
+	.uleb128 0x49
+	.4byte	.LASF648
 	.byte	0x2
 	.2byte	0x9d9
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x377a
-	.uleb128 0x47
-	.4byte	.LASF623
+	.4byte	0x37e1
+	.uleb128 0x4a
+	.4byte	.LASF624
 	.byte	0x2
 	.2byte	0x9d9
 	.4byte	0xdba
 	.byte	0
-	.uleb128 0x59
-	.4byte	.LASF648
+	.uleb128 0x5c
+	.4byte	.LASF649
 	.byte	0x2
 	.2byte	0x98e
 	.4byte	0xdba
@@ -30640,44 +30715,44 @@ __func__.9940:
 	.4byte	.LFE299-.LFB299
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x383b
-	.uleb128 0x51
-	.4byte	.LASF649
+	.4byte	0x38a2
+	.uleb128 0x54
+	.4byte	.LASF650
 	.byte	0x2
 	.2byte	0x990
 	.4byte	0xdba
 	.4byte	.LLST113
-	.uleb128 0x51
-	.4byte	.LASF650
+	.uleb128 0x54
+	.4byte	.LASF651
 	.byte	0x2
 	.2byte	0x991
 	.4byte	0xdba
 	.4byte	.LLST114
-	.uleb128 0x51
-	.4byte	.LASF651
+	.uleb128 0x54
+	.4byte	.LASF652
 	.byte	0x2
 	.2byte	0x992
 	.4byte	0xdba
 	.4byte	.LLST115
-	.uleb128 0x51
-	.4byte	.LASF652
+	.uleb128 0x54
+	.4byte	.LASF653
 	.byte	0x2
 	.2byte	0x993
 	.4byte	0x1cc9
 	.4byte	.LLST116
-	.uleb128 0x51
-	.4byte	.LASF653
+	.uleb128 0x54
+	.4byte	.LASF654
 	.byte	0x2
 	.2byte	0x994
 	.4byte	0xdba
 	.4byte	.LLST117
-	.uleb128 0x51
-	.4byte	.LASF654
+	.uleb128 0x54
+	.4byte	.LASF655
 	.byte	0x2
 	.2byte	0x995
 	.4byte	0xdba
 	.4byte	.LLST118
-	.uleb128 0x50
+	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x2
 	.2byte	0x996
@@ -30685,13 +30760,13 @@ __func__.9940:
 	.4byte	.LLST119
 	.uleb128 0x44
 	.4byte	.LVL470
-	.4byte	0x383b
+	.4byte	0x38a2
 	.uleb128 0x44
 	.4byte	.LVL476
-	.4byte	0x3894
+	.4byte	0x38fb
 	.uleb128 0x34
 	.4byte	.LVL478
-	.4byte	0x9222
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30719,8 +30794,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF655
+	.uleb128 0x48
+	.4byte	.LASF656
 	.byte	0x2
 	.2byte	0x979
 	.4byte	0xdba
@@ -30728,34 +30803,34 @@ __func__.9940:
 	.4byte	.LFE298-.LFB298
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3894
-	.uleb128 0x4f
+	.4byte	0x38fb
+	.uleb128 0x52
 	.4byte	.LASF236
 	.byte	0x2
 	.2byte	0x979
 	.4byte	0xdba
 	.4byte	.LLST102
-	.uleb128 0x51
-	.4byte	.LASF656
+	.uleb128 0x54
+	.4byte	.LASF657
 	.byte	0x2
 	.2byte	0x97b
 	.4byte	0xdba
 	.4byte	.LLST103
-	.uleb128 0x51
-	.4byte	.LASF608
+	.uleb128 0x54
+	.4byte	.LASF587
 	.byte	0x2
 	.2byte	0x97c
 	.4byte	0xdba
 	.4byte	.LLST104
-	.uleb128 0x50
+	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x2
 	.2byte	0x97d
 	.4byte	0xdba
 	.4byte	.LLST105
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF657
+	.uleb128 0x48
+	.4byte	.LASF658
 	.byte	0x2
 	.2byte	0x970
 	.4byte	0xdba
@@ -30763,16 +30838,16 @@ __func__.9940:
 	.4byte	.LFE297-.LFB297
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x38bf
-	.uleb128 0x51
-	.4byte	.LASF651
+	.4byte	0x3926
+	.uleb128 0x54
+	.4byte	.LASF652
 	.byte	0x2
 	.2byte	0x972
 	.4byte	0xdba
 	.4byte	.LLST101
 	.byte	0
-	.uleb128 0x59
-	.4byte	.LASF658
+	.uleb128 0x5c
+	.4byte	.LASF659
 	.byte	0x2
 	.2byte	0x960
 	.4byte	0x50
@@ -30780,26 +30855,26 @@ __func__.9940:
 	.4byte	.LFE296-.LFB296
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3937
-	.uleb128 0x4f
-	.4byte	.LASF623
+	.4byte	0x399e
+	.uleb128 0x52
+	.4byte	.LASF624
 	.byte	0x2
 	.2byte	0x960
 	.4byte	0xdba
 	.4byte	.LLST97
-	.uleb128 0x51
-	.4byte	.LASF592
+	.uleb128 0x54
+	.4byte	.LASF595
 	.byte	0x2
 	.2byte	0x962
 	.4byte	0xdba
 	.4byte	.LLST98
-	.uleb128 0x51
-	.4byte	.LASF594
+	.uleb128 0x54
+	.4byte	.LASF597
 	.byte	0x2
 	.2byte	0x962
 	.4byte	0xdba
 	.4byte	.LLST99
-	.uleb128 0x51
+	.uleb128 0x54
 	.4byte	.LASF375
 	.byte	0x2
 	.2byte	0x963
@@ -30807,8 +30882,8 @@ __func__.9940:
 	.4byte	.LLST100
 	.uleb128 0x32
 	.4byte	.LVL284
-	.4byte	0x6192
-	.4byte	0x392d
+	.4byte	0x61f9
+	.4byte	0x3994
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -30818,45 +30893,45 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x44
 	.4byte	.LVL285
-	.4byte	0x67c5
+	.4byte	0x682c
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF659
+	.uleb128 0x49
+	.4byte	.LASF660
 	.byte	0x2
 	.2byte	0x901
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x3961
-	.uleb128 0x49
+	.4byte	0x39c8
+	.uleb128 0x4c
 	.ascii	"i\000"
 	.byte	0x2
 	.2byte	0x903
 	.4byte	0x50
-	.uleb128 0x4c
-	.uleb128 0x48
-	.4byte	.LASF612
+	.uleb128 0x4f
+	.uleb128 0x4b
+	.4byte	.LASF614
 	.byte	0x2
 	.2byte	0x928
 	.4byte	0x1d79
 	.byte	0
 	.byte	0
-	.uleb128 0x5d
-	.4byte	.LASF660
+	.uleb128 0x5f
+	.4byte	.LASF661
 	.byte	0x2
 	.2byte	0x8e2
 	.4byte	.LFB294
 	.4byte	.LFE294-.LFB294
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3a30
-	.uleb128 0x5e
+	.4byte	0x3a97
+	.uleb128 0x60
 	.ascii	"i\000"
 	.byte	0x2
 	.2byte	0x8e4
 	.4byte	0x50
 	.uleb128 0x1
 	.byte	0x55
-	.uleb128 0x5e
+	.uleb128 0x60
 	.ascii	"ppa\000"
 	.byte	0x2
 	.2byte	0x8e5
@@ -30864,16 +30939,16 @@ __func__.9940:
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -28
-	.uleb128 0x51
-	.4byte	.LASF661
+	.uleb128 0x54
+	.4byte	.LASF662
 	.byte	0x2
 	.2byte	0x8e6
-	.4byte	0x2a63
-	.4byte	.LLST237
+	.4byte	0x2aca
+	.4byte	.LLST239
 	.uleb128 0x32
-	.4byte	.LVL907
-	.4byte	0x9222
-	.4byte	0x39bf
+	.4byte	.LVL909
+	.4byte	0x9289
+	.4byte	0x3a26
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30888,9 +30963,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL909
-	.4byte	0x5212
-	.4byte	0x39de
+	.4byte	.LVL911
+	.4byte	0x5279
+	.4byte	0x3a45
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30910,9 +30985,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL910
-	.4byte	0x9222
-	.4byte	0x39f8
+	.4byte	.LVL912
+	.4byte	0x9289
+	.4byte	0x3a5f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30927,9 +31002,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL912
+	.4byte	.LVL914
 	.4byte	0x26b9
-	.4byte	0x3a16
+	.4byte	0x3a7d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30948,8 +31023,8 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL913
-	.4byte	0x9222
+	.4byte	.LVL915
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30964,66 +31039,66 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x5d
-	.4byte	.LASF662
+	.uleb128 0x5f
+	.4byte	.LASF663
 	.byte	0x2
 	.2byte	0x8ae
 	.4byte	.LFB293
 	.4byte	.LFE293-.LFB293
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3b83
-	.uleb128 0x50
+	.4byte	0x3bea
+	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x2
 	.2byte	0x8b0
 	.4byte	0xdba
-	.4byte	.LLST264
-	.uleb128 0x50
+	.4byte	.LLST266
+	.uleb128 0x53
 	.ascii	"lpn\000"
 	.byte	0x2
 	.2byte	0x8b1
 	.4byte	0xdc5
-	.4byte	.LLST265
+	.4byte	.LLST267
 	.uleb128 0x28
-	.4byte	.LASF663
+	.4byte	.LASF664
 	.byte	0x2
 	.2byte	0x8b2
 	.4byte	0xdc5
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -36
-	.uleb128 0x50
+	.uleb128 0x53
 	.ascii	"blk\000"
 	.byte	0x2
 	.2byte	0x8b3
 	.4byte	0xdba
-	.4byte	.LLST266
-	.uleb128 0x51
-	.4byte	.LASF664
+	.4byte	.LLST268
+	.uleb128 0x54
+	.4byte	.LASF665
 	.byte	0x2
 	.2byte	0x8b4
 	.4byte	0xdba
-	.4byte	.LLST267
+	.4byte	.LLST269
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x3b93
+	.4byte	0x3bfa
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9738
-	.uleb128 0x5f
-	.4byte	.LBB238
-	.4byte	.LBE238-.LBB238
-	.4byte	0x3ad9
-	.uleb128 0x51
+	.uleb128 0x61
+	.4byte	.LBB242
+	.4byte	.LBE242-.LBB242
+	.4byte	0x3b40
+	.uleb128 0x54
 	.4byte	.LASF236
 	.byte	0x2
 	.2byte	0x8d1
 	.4byte	0xdba
-	.4byte	.LLST268
+	.4byte	.LLST270
 	.uleb128 0x34
-	.4byte	.LVL1078
-	.4byte	0x9222
+	.4byte	.LVL1080
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31039,9 +31114,9 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1071
-	.4byte	0x9222
-	.4byte	0x3af9
+	.4byte	.LVL1073
+	.4byte	0x9289
+	.4byte	0x3b60
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31056,9 +31131,9 @@ __func__.9940:
 	.4byte	.LANCHOR156
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1072
+	.4byte	.LVL1074
 	.4byte	0x230c
-	.4byte	0x3b1a
+	.4byte	0x3b81
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31079,9 +31154,9 @@ __func__.9940:
 	.2byte	0x2000
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1083
-	.4byte	0x9222
-	.4byte	0x3b41
+	.4byte	.LVL1085
+	.4byte	0x9289
+	.4byte	0x3ba8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31102,9 +31177,9 @@ __func__.9940:
 	.2byte	0x8df
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1085
-	.4byte	0x5212
-	.4byte	0x3b60
+	.4byte	.LVL1087
+	.4byte	0x5279
+	.4byte	0x3bc7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31124,11 +31199,11 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1086
-	.4byte	0x6122
+	.4byte	.LVL1088
+	.4byte	0x6189
 	.uleb128 0x34
-	.4byte	.LVL1090
-	.4byte	0x9222
+	.4byte	.LVL1092
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31145,58 +31220,58 @@ __func__.9940:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x3b93
+	.4byte	0x3bfa
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0xd
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x3b83
-	.uleb128 0x5d
-	.4byte	.LASF665
+	.4byte	0x3bea
+	.uleb128 0x5f
+	.4byte	.LASF666
 	.byte	0x2
 	.2byte	0x88f
 	.4byte	.LFB292
 	.4byte	.LFE292-.LFB292
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3c9a
-	.uleb128 0x50
+	.4byte	0x3d01
+	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x2
 	.2byte	0x891
 	.4byte	0xdba
-	.4byte	.LLST371
-	.uleb128 0x50
+	.4byte	.LLST373
+	.uleb128 0x53
 	.ascii	"lpn\000"
 	.byte	0x2
 	.2byte	0x892
 	.4byte	0xdc5
-	.4byte	.LLST372
+	.4byte	.LLST374
 	.uleb128 0x28
-	.4byte	.LASF663
+	.4byte	.LASF664
 	.byte	0x2
 	.2byte	0x893
 	.4byte	0xdc5
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -36
-	.uleb128 0x50
+	.uleb128 0x53
 	.ascii	"blk\000"
 	.byte	0x2
 	.2byte	0x894
 	.4byte	0xdba
-	.4byte	.LLST373
+	.4byte	.LLST375
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x3caa
+	.4byte	0x3d11
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9722
 	.uleb128 0x32
-	.4byte	.LVL1575
-	.4byte	0x9222
-	.4byte	0x3c1a
+	.4byte	.LVL1577
+	.4byte	0x9289
+	.4byte	0x3c81
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31211,9 +31286,9 @@ __func__.9940:
 	.4byte	.LANCHOR168
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1576
+	.4byte	.LVL1578
 	.4byte	0x230c
-	.4byte	0x3c2e
+	.4byte	0x3c95
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -31222,9 +31297,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1580
-	.4byte	0x5212
-	.4byte	0x3c4d
+	.4byte	.LVL1582
+	.4byte	0x5279
+	.4byte	0x3cb4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31244,12 +31319,12 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1581
-	.4byte	0x6122
+	.4byte	.LVL1583
+	.4byte	0x6189
 	.uleb128 0x32
-	.4byte	.LVL1585
-	.4byte	0x9222
-	.4byte	0x3c73
+	.4byte	.LVL1587
+	.4byte	0x9289
+	.4byte	0x3cda
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31264,9 +31339,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1586
-	.4byte	0x3297
-	.4byte	0x3c87
+	.4byte	.LVL1588
+	.4byte	0x32fe
+	.4byte	0x3cee
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31275,66 +31350,66 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1587
-	.4byte	0x5313
+	.4byte	.LVL1589
+	.4byte	0x537a
 	.uleb128 0x44
-	.4byte	.LVL1588
-	.4byte	0x4d0e
+	.4byte	.LVL1590
+	.4byte	0x4d75
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x3caa
+	.4byte	0x3d11
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x14
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x3c9a
-	.uleb128 0x5d
-	.4byte	.LASF666
+	.4byte	0x3d01
+	.uleb128 0x5f
+	.4byte	.LASF667
 	.byte	0x2
 	.2byte	0x86b
 	.4byte	.LFB291
 	.4byte	.LFE291-.LFB291
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3d52
-	.uleb128 0x4f
-	.4byte	.LASF612
+	.4byte	0x3db9
+	.uleb128 0x52
+	.4byte	.LASF614
 	.byte	0x2
 	.2byte	0x86b
 	.4byte	0x1d79
-	.4byte	.LLST339
+	.4byte	.LLST341
 	.uleb128 0x28
-	.4byte	.LASF667
+	.4byte	.LASF668
 	.byte	0x2
 	.2byte	0x86d
 	.4byte	0xde6
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -44
-	.uleb128 0x51
-	.4byte	.LASF596
+	.uleb128 0x54
+	.4byte	.LASF599
 	.byte	0x2
 	.2byte	0x86e
-	.4byte	0x2a63
-	.4byte	.LLST340
-	.uleb128 0x51
-	.4byte	.LASF668
+	.4byte	0x2aca
+	.4byte	.LLST342
+	.uleb128 0x54
+	.4byte	.LASF669
 	.byte	0x2
 	.2byte	0x86f
 	.4byte	0x50
-	.4byte	.LLST341
-	.uleb128 0x60
+	.4byte	.LLST343
+	.uleb128 0x62
 	.4byte	.LASF384
 	.byte	0x2
 	.2byte	0x870
 	.4byte	0xdc5
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1429
-	.4byte	0x32d7
-	.4byte	0x3d25
+	.4byte	.LVL1431
+	.4byte	0x333e
+	.4byte	0x3d8c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31343,9 +31418,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1432
+	.4byte	.LVL1434
 	.4byte	0x251a
-	.4byte	0x3d48
+	.4byte	0x3daf
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31369,22 +31444,22 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1433
-	.4byte	0x31f2
+	.4byte	.LVL1435
+	.4byte	0x3259
 	.byte	0
-	.uleb128 0x61
-	.4byte	.LASF669
+	.uleb128 0x63
+	.4byte	.LASF670
 	.byte	0x2
 	.2byte	0x851
 	.4byte	.LFB290
 	.4byte	.LFE290-.LFB290
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3da3
+	.4byte	0x3e0a
 	.uleb128 0x32
-	.4byte	.LVL1554
-	.4byte	0x4fd7
-	.4byte	0x3d86
+	.4byte	.LVL1556
+	.4byte	0x503e
+	.4byte	0x3ded
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31403,7 +31478,7 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1555
+	.4byte	.LVL1557
 	.4byte	0x230c
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -31424,13 +31499,13 @@ __func__.9940:
 	.2byte	0x200
 	.byte	0
 	.byte	0
-	.uleb128 0x52
-	.4byte	.LASF671
+	.uleb128 0x55
+	.4byte	.LASF672
 	.byte	0x2
 	.2byte	0x83d
 	.byte	0x1
-	.uleb128 0x59
-	.4byte	.LASF672
+	.uleb128 0x5c
+	.4byte	.LASF673
 	.byte	0x2
 	.2byte	0x812
 	.4byte	0x50
@@ -31438,53 +31513,53 @@ __func__.9940:
 	.4byte	.LFE288-.LFB288
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3eb2
-	.uleb128 0x51
-	.4byte	.LASF649
+	.4byte	0x3f19
+	.uleb128 0x54
+	.4byte	.LASF650
 	.byte	0x2
 	.2byte	0x814
 	.4byte	0xdba
-	.4byte	.LLST258
-	.uleb128 0x51
-	.4byte	.LASF592
+	.4byte	.LLST260
+	.uleb128 0x54
+	.4byte	.LASF595
 	.byte	0x2
 	.2byte	0x814
 	.4byte	0xdba
-	.4byte	.LLST259
-	.uleb128 0x51
-	.4byte	.LASF594
+	.4byte	.LLST261
+	.uleb128 0x54
+	.4byte	.LASF597
 	.byte	0x2
 	.2byte	0x814
 	.4byte	0xdba
-	.4byte	.LLST260
-	.uleb128 0x51
+	.4byte	.LLST262
+	.uleb128 0x54
 	.4byte	.LASF375
 	.byte	0x2
 	.2byte	0x814
 	.4byte	0xdba
-	.4byte	.LLST261
-	.uleb128 0x51
-	.4byte	.LASF673
+	.4byte	.LLST263
+	.uleb128 0x54
+	.4byte	.LASF674
 	.byte	0x2
 	.2byte	0x815
 	.4byte	0xdba
-	.4byte	.LLST262
-	.uleb128 0x51
-	.4byte	.LASF674
+	.4byte	.LLST264
+	.uleb128 0x54
+	.4byte	.LASF675
 	.byte	0x2
 	.2byte	0x815
 	.4byte	0xdba
-	.4byte	.LLST263
+	.4byte	.LLST265
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x3ec2
+	.4byte	0x3f29
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9697
 	.uleb128 0x32
-	.4byte	.LVL1046
+	.4byte	.LVL1048
 	.4byte	0x230c
-	.4byte	0x3e49
+	.4byte	0x3eb0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -31493,9 +31568,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1050
-	.4byte	0x6192
-	.4byte	0x3e5d
+	.4byte	.LVL1052
+	.4byte	0x61f9
+	.4byte	0x3ec4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -31504,12 +31579,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1051
-	.4byte	0x67c5
+	.4byte	.LVL1053
+	.4byte	0x682c
 	.uleb128 0x32
-	.4byte	.LVL1059
-	.4byte	0x5d9a
-	.4byte	0x3e7a
+	.4byte	.LVL1061
+	.4byte	0x5e01
+	.4byte	0x3ee1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31518,9 +31593,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1066
-	.4byte	0x5d75
-	.4byte	0x3e8e
+	.4byte	.LVL1068
+	.4byte	0x5ddc
+	.4byte	0x3ef5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31529,8 +31604,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1068
-	.4byte	0x9222
+	.4byte	.LVL1070
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31553,15 +31628,15 @@ __func__.9940:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x3ec2
+	.4byte	0x3f29
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x11
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x3eb2
-	.uleb128 0x45
-	.4byte	.LASF675
+	.4byte	0x3f19
+	.uleb128 0x48
+	.4byte	.LASF676
 	.byte	0x2
 	.2byte	0x7fc
 	.4byte	0x50
@@ -31569,21 +31644,21 @@ __func__.9940:
 	.4byte	.LFE287-.LFB287
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3f5d
-	.uleb128 0x5a
+	.4byte	0x3fc4
+	.uleb128 0x5d
 	.ascii	"p\000"
 	.byte	0x2
 	.2byte	0x7fc
 	.4byte	0x1d79
 	.4byte	.LLST95
-	.uleb128 0x51
-	.4byte	.LASF592
+	.uleb128 0x54
+	.4byte	.LASF595
 	.byte	0x2
 	.2byte	0x7fe
 	.4byte	0xdba
 	.4byte	.LLST96
 	.uleb128 0x28
-	.4byte	.LASF594
+	.4byte	.LASF597
 	.byte	0x2
 	.2byte	0x7fe
 	.4byte	0xdba
@@ -31591,14 +31666,14 @@ __func__.9940:
 	.byte	0x5b
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x32d2
+	.4byte	0x3339
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9676
 	.uleb128 0x32
 	.4byte	.LVL271
-	.4byte	0x9222
-	.4byte	0x3f43
+	.4byte	0x9289
+	.4byte	0x3faa
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31620,10 +31695,10 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x44
 	.4byte	.LVL274
-	.4byte	0x6192
+	.4byte	0x61f9
 	.uleb128 0x34
 	.4byte	.LVL276
-	.4byte	0x67c5
+	.4byte	0x682c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31632,8 +31707,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF676
+	.uleb128 0x48
+	.4byte	.LASF677
 	.byte	0x2
 	.2byte	0x7ef
 	.4byte	0x50
@@ -31641,11 +31716,11 @@ __func__.9940:
 	.4byte	.LFE286-.LFB286
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3fe1
+	.4byte	0x4048
 	.uleb128 0x32
-	.4byte	.LVL1691
-	.4byte	0x4007
-	.4byte	0x3f8b
+	.4byte	.LVL1693
+	.4byte	0x406e
+	.4byte	0x3ff2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31654,9 +31729,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1692
-	.4byte	0x3fe1
-	.4byte	0x3f9f
+	.4byte	.LVL1694
+	.4byte	0x4048
+	.4byte	0x4006
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31665,9 +31740,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1693
-	.4byte	0x4007
-	.4byte	0x3fb3
+	.4byte	.LVL1695
+	.4byte	0x406e
+	.4byte	0x401a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31676,9 +31751,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1694
-	.4byte	0x3fe1
-	.4byte	0x3fc7
+	.4byte	.LVL1696
+	.4byte	0x4048
+	.4byte	0x402e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31687,11 +31762,11 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1695
-	.4byte	0x2d2c
+	.4byte	.LVL1697
+	.4byte	0x2d93
 	.uleb128 0x34
-	.4byte	.LVL1696
-	.4byte	0x31f2
+	.4byte	.LVL1698
+	.4byte	0x3259
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31700,25 +31775,25 @@ __func__.9940:
 	.byte	0xff
 	.byte	0
 	.byte	0
-	.uleb128 0x62
-	.4byte	.LASF712
+	.uleb128 0x64
+	.4byte	.LASF713
 	.byte	0x2
 	.2byte	0x7dc
 	.byte	0x1
-	.4byte	0x4007
-	.uleb128 0x47
-	.4byte	.LASF639
+	.4byte	0x406e
+	.uleb128 0x4a
+	.4byte	.LASF640
 	.byte	0x2
 	.2byte	0x7dc
 	.4byte	0x1d79
-	.uleb128 0x48
-	.4byte	.LASF594
+	.uleb128 0x4b
+	.4byte	.LASF597
 	.byte	0x2
 	.2byte	0x7de
 	.4byte	0xdba
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF677
+	.uleb128 0x48
+	.4byte	.LASF678
 	.byte	0x2
 	.2byte	0x677
 	.4byte	0x50
@@ -31726,99 +31801,99 @@ __func__.9940:
 	.4byte	.LFE284-.LFB284
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4560
-	.uleb128 0x4f
-	.4byte	.LASF612
+	.4byte	0x45c7
+	.uleb128 0x52
+	.4byte	.LASF614
 	.byte	0x2
 	.2byte	0x677
 	.4byte	0x1d79
-	.4byte	.LLST313
-	.uleb128 0x51
-	.4byte	.LASF678
+	.4byte	.LLST315
+	.uleb128 0x54
+	.4byte	.LASF679
 	.byte	0x2
 	.2byte	0x679
 	.4byte	0xdba
-	.4byte	.LLST314
-	.uleb128 0x51
-	.4byte	.LASF679
+	.4byte	.LLST316
+	.uleb128 0x54
+	.4byte	.LASF680
 	.byte	0x2
 	.2byte	0x679
 	.4byte	0xdba
-	.4byte	.LLST315
-	.uleb128 0x51
-	.4byte	.LASF592
+	.4byte	.LLST317
+	.uleb128 0x54
+	.4byte	.LASF595
 	.byte	0x2
 	.2byte	0x67a
 	.4byte	0xdba
-	.4byte	.LLST316
-	.uleb128 0x51
+	.4byte	.LLST318
+	.uleb128 0x54
 	.4byte	.LASF382
 	.byte	0x2
 	.2byte	0x67a
 	.4byte	0xdba
-	.4byte	.LLST317
-	.uleb128 0x51
+	.4byte	.LLST319
+	.uleb128 0x54
 	.4byte	.LASF380
 	.byte	0x2
 	.2byte	0x67a
 	.4byte	0xdba
-	.4byte	.LLST318
-	.uleb128 0x51
-	.4byte	.LASF680
+	.4byte	.LLST320
+	.uleb128 0x54
+	.4byte	.LASF681
 	.byte	0x2
 	.2byte	0x67b
 	.4byte	0xdba
-	.4byte	.LLST319
-	.uleb128 0x51
-	.4byte	.LASF681
+	.4byte	.LLST321
+	.uleb128 0x54
+	.4byte	.LASF682
 	.byte	0x2
 	.2byte	0x67b
 	.4byte	0xdba
-	.4byte	.LLST320
-	.uleb128 0x51
-	.4byte	.LASF594
+	.4byte	.LLST322
+	.uleb128 0x54
+	.4byte	.LASF597
 	.byte	0x2
 	.2byte	0x67c
 	.4byte	0xdba
-	.4byte	.LLST321
-	.uleb128 0x51
-	.4byte	.LASF682
+	.4byte	.LLST323
+	.uleb128 0x54
+	.4byte	.LASF683
 	.byte	0x2
 	.2byte	0x67d
 	.4byte	0x50
-	.4byte	.LLST322
-	.uleb128 0x51
-	.4byte	.LASF683
+	.4byte	.LLST324
+	.uleb128 0x54
+	.4byte	.LASF684
 	.byte	0x2
 	.2byte	0x67d
 	.4byte	0x50
-	.4byte	.LLST322
-	.uleb128 0x51
+	.4byte	.LLST324
+	.uleb128 0x54
 	.4byte	.LASF569
 	.byte	0x2
 	.2byte	0x67e
 	.4byte	0xdba
-	.4byte	.LLST324
-	.uleb128 0x50
+	.4byte	.LLST326
+	.uleb128 0x53
 	.ascii	"n\000"
 	.byte	0x2
 	.2byte	0x67e
 	.4byte	0xdba
-	.4byte	.LLST325
-	.uleb128 0x50
+	.4byte	.LLST327
+	.uleb128 0x53
 	.ascii	"req\000"
 	.byte	0x2
 	.2byte	0x67e
 	.4byte	0xdba
-	.4byte	.LLST326
-	.uleb128 0x50
+	.4byte	.LLST328
+	.uleb128 0x53
 	.ascii	"lpa\000"
 	.byte	0x2
 	.2byte	0x67f
 	.4byte	0xdc5
-	.4byte	.LLST327
+	.4byte	.LLST329
 	.uleb128 0x28
-	.4byte	.LASF663
+	.4byte	.LASF664
 	.byte	0x2
 	.2byte	0x67f
 	.4byte	0xdc5
@@ -31826,7 +31901,7 @@ __func__.9940:
 	.byte	0x91
 	.sleb128 -44
 	.uleb128 0x28
-	.4byte	.LASF624
+	.4byte	.LASF625
 	.byte	0x2
 	.2byte	0x67f
 	.4byte	0xdc5
@@ -31834,91 +31909,91 @@ __func__.9940:
 	.byte	0x91
 	.sleb128 -40
 	.uleb128 0x28
-	.4byte	.LASF614
+	.4byte	.LASF616
 	.byte	0x2
 	.2byte	0x67f
 	.4byte	0xdc5
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -36
-	.uleb128 0x51
-	.4byte	.LASF629
+	.uleb128 0x54
+	.4byte	.LASF630
 	.byte	0x2
 	.2byte	0x680
 	.4byte	0xdba
-	.4byte	.LLST328
-	.uleb128 0x51
-	.4byte	.LASF684
+	.4byte	.LLST330
+	.uleb128 0x54
+	.4byte	.LASF685
 	.byte	0x2
 	.2byte	0x680
 	.4byte	0xdba
-	.4byte	.LLST329
-	.uleb128 0x51
-	.4byte	.LASF685
+	.4byte	.LLST331
+	.uleb128 0x54
+	.4byte	.LASF686
 	.byte	0x2
 	.2byte	0x681
 	.4byte	0xdc5
-	.4byte	.LLST330
-	.uleb128 0x51
-	.4byte	.LASF686
+	.4byte	.LLST332
+	.uleb128 0x54
+	.4byte	.LASF687
 	.byte	0x2
 	.2byte	0x682
 	.4byte	0xdba
-	.4byte	.LLST331
-	.uleb128 0x51
-	.4byte	.LASF596
+	.4byte	.LLST333
+	.uleb128 0x54
+	.4byte	.LASF599
 	.byte	0x2
 	.2byte	0x683
-	.4byte	0x2a63
-	.4byte	.LLST332
-	.uleb128 0x60
-	.4byte	.LASF687
+	.4byte	0x2aca
+	.4byte	.LLST334
+	.uleb128 0x62
+	.4byte	.LASF688
 	.byte	0x2
 	.2byte	0x684
 	.4byte	0xdc5
 	.byte	0
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x4570
+	.4byte	0x45d7
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9619
-	.uleb128 0x55
-	.4byte	.LASF689
+	.uleb128 0x58
+	.4byte	.LASF690
 	.byte	0x2
 	.2byte	0x713
-	.4byte	.L1149
-	.uleb128 0x55
-	.4byte	.LASF618
+	.4byte	.L1150
+	.uleb128 0x58
+	.4byte	.LASF620
 	.byte	0x2
 	.2byte	0x71b
-	.4byte	.L1164
-	.uleb128 0x55
-	.4byte	.LASF690
+	.4byte	.L1165
+	.uleb128 0x58
+	.4byte	.LASF691
 	.byte	0x2
 	.2byte	0x7ce
-	.4byte	.L1172
-	.uleb128 0x4a
-	.4byte	.LASF691
+	.4byte	.L1173
+	.uleb128 0x4d
+	.4byte	.LASF692
 	.byte	0x2
 	.2byte	0x7d8
 	.uleb128 0x3e
 	.4byte	.Ldebug_ranges0+0x120
-	.4byte	0x4213
-	.uleb128 0x51
-	.4byte	.LASF692
+	.4byte	0x427a
+	.uleb128 0x54
+	.4byte	.LASF693
 	.byte	0x2
 	.2byte	0x6eb
 	.4byte	0xdc5
-	.4byte	.LLST333
-	.uleb128 0x51
-	.4byte	.LASF693
+	.4byte	.LLST335
+	.uleb128 0x54
+	.4byte	.LASF694
 	.byte	0x2
 	.2byte	0x6ec
 	.4byte	0xdc5
-	.4byte	.LLST334
+	.4byte	.LLST336
 	.uleb128 0x34
-	.4byte	.LVL1344
+	.4byte	.LVL1346
 	.4byte	0x26b9
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -31935,23 +32010,23 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x3e
 	.4byte	.Ldebug_ranges0+0x138
-	.4byte	0x42e8
-	.uleb128 0x51
-	.4byte	.LASF694
+	.4byte	0x434f
+	.uleb128 0x54
+	.4byte	.LASF695
 	.byte	0x2
 	.2byte	0x746
 	.4byte	0xdc5
-	.4byte	.LLST335
-	.uleb128 0x51
-	.4byte	.LASF695
+	.4byte	.LLST337
+	.uleb128 0x54
+	.4byte	.LASF696
 	.byte	0x2
 	.2byte	0x747
 	.4byte	0xdc5
-	.4byte	.LLST336
+	.4byte	.LLST338
 	.uleb128 0x32
-	.4byte	.LVL1388
+	.4byte	.LVL1390
 	.4byte	0x26b9
-	.4byte	0x4254
+	.4byte	0x42bb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -31964,12 +32039,12 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1390
-	.4byte	0x31f2
+	.4byte	.LVL1392
+	.4byte	0x3259
 	.uleb128 0x32
-	.4byte	.LVL1396
-	.4byte	0x5212
-	.4byte	0x427c
+	.4byte	.LVL1398
+	.4byte	0x5279
+	.4byte	0x42e3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31989,9 +32064,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1398
-	.4byte	0x60dd
-	.4byte	0x4290
+	.4byte	.LVL1400
+	.4byte	0x6144
+	.4byte	0x42f7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32000,9 +32075,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1399
-	.4byte	0x4575
-	.4byte	0x42a4
+	.4byte	.LVL1401
+	.4byte	0x45dc
+	.4byte	0x430b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32011,9 +32086,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1401
+	.4byte	.LVL1403
 	.4byte	0x26b9
-	.4byte	0x42bc
+	.4byte	0x4323
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32026,9 +32101,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1403
-	.4byte	0x60dd
-	.4byte	0x42d0
+	.4byte	.LVL1405
+	.4byte	0x6144
+	.4byte	0x4337
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32037,8 +32112,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1404
-	.4byte	0x60dd
+	.4byte	.LVL1406
+	.4byte	0x6144
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32054,26 +32129,26 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x5f
-	.4byte	.LBB271
-	.4byte	.LBE271-.LBB271
-	.4byte	0x4364
-	.uleb128 0x51
-	.4byte	.LASF696
+	.uleb128 0x61
+	.4byte	.LBB275
+	.4byte	.LBE275-.LBB275
+	.4byte	0x43cb
+	.uleb128 0x54
+	.4byte	.LASF697
 	.byte	0x2
 	.2byte	0x785
 	.4byte	0xdc5
-	.4byte	.LLST337
-	.uleb128 0x51
-	.4byte	.LASF695
+	.4byte	.LLST339
+	.uleb128 0x54
+	.4byte	.LASF696
 	.byte	0x2
 	.2byte	0x786
 	.4byte	0xdc5
-	.4byte	.LLST338
+	.4byte	.LLST340
 	.uleb128 0x32
-	.4byte	.LVL1413
+	.4byte	.LVL1415
 	.4byte	0x26b9
-	.4byte	0x432d
+	.4byte	0x4394
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32086,9 +32161,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1414
-	.4byte	0x60dd
-	.4byte	0x4348
+	.4byte	.LVL1416
+	.4byte	0x6144
+	.4byte	0x43af
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32104,8 +32179,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1416
-	.4byte	0x5212
+	.4byte	.LVL1418
+	.4byte	0x5279
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32126,9 +32201,9 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1293
-	.4byte	0x6011
-	.4byte	0x4377
+	.4byte	.LVL1295
+	.4byte	0x6078
+	.4byte	0x43de
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32136,9 +32211,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1299
+	.4byte	.LVL1301
 	.4byte	0x26b9
-	.4byte	0x4390
+	.4byte	0x43f7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32152,12 +32227,12 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1305
-	.4byte	0x615a
+	.4byte	.LVL1307
+	.4byte	0x61c1
 	.uleb128 0x32
-	.4byte	.LVL1308
-	.4byte	0x468d
-	.4byte	0x43ad
+	.4byte	.LVL1310
+	.4byte	0x46f4
+	.4byte	0x4414
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32166,9 +32241,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1312
-	.4byte	0x9222
-	.4byte	0x43d4
+	.4byte	.LVL1314
+	.4byte	0x9289
+	.4byte	0x443b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32189,9 +32264,9 @@ __func__.9940:
 	.2byte	0x6aa
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1313
-	.4byte	0x9222
-	.4byte	0x43fb
+	.4byte	.LVL1315
+	.4byte	0x9289
+	.4byte	0x4462
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32212,9 +32287,9 @@ __func__.9940:
 	.2byte	0x6ab
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1325
-	.4byte	0x60dd
-	.4byte	0x4415
+	.4byte	.LVL1327
+	.4byte	0x6144
+	.4byte	0x447c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32229,9 +32304,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1349
-	.4byte	0x4ec1
-	.4byte	0x442c
+	.4byte	.LVL1351
+	.4byte	0x4f28
+	.4byte	0x4493
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32240,9 +32315,9 @@ __func__.9940:
 	.4byte	.LANCHOR144
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1352
+	.4byte	.LVL1354
 	.4byte	0x26b9
-	.4byte	0x4447
+	.4byte	0x44ae
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32257,9 +32332,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1372
-	.4byte	0x615a
-	.4byte	0x4461
+	.4byte	.LVL1374
+	.4byte	0x61c1
+	.4byte	0x44c8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32274,12 +32349,12 @@ __func__.9940:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1377
-	.4byte	0x31f2
+	.4byte	.LVL1379
+	.4byte	0x3259
 	.uleb128 0x32
-	.4byte	.LVL1382
-	.4byte	0x60dd
-	.4byte	0x4485
+	.4byte	.LVL1384
+	.4byte	0x6144
+	.4byte	0x44ec
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32295,9 +32370,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1385
-	.4byte	0x5212
-	.4byte	0x44a4
+	.4byte	.LVL1387
+	.4byte	0x5279
+	.4byte	0x450b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32317,9 +32392,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1386
-	.4byte	0x60dd
-	.4byte	0x44bf
+	.4byte	.LVL1388
+	.4byte	0x6144
+	.4byte	0x4526
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32335,9 +32410,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1391
-	.4byte	0x6122
-	.4byte	0x44d9
+	.4byte	.LVL1393
+	.4byte	0x6189
+	.4byte	0x4540
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32352,9 +32427,9 @@ __func__.9940:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1394
-	.4byte	0x9222
-	.4byte	0x4500
+	.4byte	.LVL1396
+	.4byte	0x9289
+	.4byte	0x4567
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32375,9 +32450,9 @@ __func__.9940:
 	.2byte	0x7a5
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1408
-	.4byte	0x5212
-	.4byte	0x451f
+	.4byte	.LVL1410
+	.4byte	0x5279
+	.4byte	0x4586
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32397,9 +32472,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1409
-	.4byte	0x6122
-	.4byte	0x4539
+	.4byte	.LVL1411
+	.4byte	0x6189
+	.4byte	0x45a0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32414,9 +32489,9 @@ __func__.9940:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1418
-	.4byte	0x9222
-	.4byte	0x4556
+	.4byte	.LVL1420
+	.4byte	0x9289
+	.4byte	0x45bd
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32431,76 +32506,76 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1421
-	.4byte	0x31f2
+	.4byte	.LVL1423
+	.4byte	0x3259
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x4570
+	.4byte	0x45d7
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x15
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x4560
-	.uleb128 0x5d
-	.4byte	.LASF697
+	.4byte	0x45c7
+	.uleb128 0x5f
+	.4byte	.LASF698
 	.byte	0x2
 	.2byte	0x65b
 	.4byte	.LFB283
 	.4byte	.LFE283-.LFB283
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x468d
-	.uleb128 0x5a
+	.4byte	0x46f4
+	.uleb128 0x5d
 	.ascii	"lpa\000"
 	.byte	0x2
 	.2byte	0x65b
 	.4byte	0xdc5
-	.4byte	.LLST231
-	.uleb128 0x4f
-	.4byte	.LASF663
+	.4byte	.LLST233
+	.uleb128 0x52
+	.4byte	.LASF664
 	.byte	0x2
 	.2byte	0x65b
 	.4byte	0xdc5
-	.4byte	.LLST232
-	.uleb128 0x51
-	.4byte	.LASF629
+	.4byte	.LLST234
+	.uleb128 0x54
+	.4byte	.LASF630
 	.byte	0x2
 	.2byte	0x65d
 	.4byte	0xdba
-	.4byte	.LLST233
+	.4byte	.LLST235
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x32d2
+	.4byte	0x3339
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9585
 	.uleb128 0x3e
 	.4byte	.Ldebug_ranges0+0xa0
-	.4byte	0x4656
-	.uleb128 0x50
+	.4byte	0x46bd
+	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x2
 	.2byte	0x661
 	.4byte	0xdba
-	.4byte	.LLST234
-	.uleb128 0x51
-	.4byte	.LASF608
+	.4byte	.LLST236
+	.uleb128 0x54
+	.4byte	.LASF587
 	.byte	0x2
 	.2byte	0x662
 	.4byte	0xdba
-	.4byte	.LLST235
-	.uleb128 0x51
+	.4byte	.LLST237
+	.uleb128 0x54
 	.4byte	.LASF236
 	.byte	0x2
 	.2byte	0x663
 	.4byte	0xdba
-	.4byte	.LLST236
+	.4byte	.LLST238
 	.uleb128 0x32
-	.4byte	.LVL897
-	.4byte	0x5bca
-	.4byte	0x461e
+	.4byte	.LVL899
+	.4byte	0x5c31
+	.4byte	0x4685
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32515,9 +32590,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL898
-	.4byte	0x9222
-	.4byte	0x4645
+	.4byte	.LVL900
+	.4byte	0x9289
+	.4byte	0x46ac
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32538,8 +32613,8 @@ __func__.9940:
 	.2byte	0x667
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL899
-	.4byte	0x5d75
+	.4byte	.LVL901
+	.4byte	0x5ddc
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32549,9 +32624,9 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL891
-	.4byte	0x6122
-	.4byte	0x4671
+	.4byte	.LVL893
+	.4byte	0x6189
+	.4byte	0x46d8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32567,8 +32642,8 @@ __func__.9940:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL905
-	.4byte	0x5212
+	.4byte	.LVL907
+	.4byte	0x5279
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32588,43 +32663,43 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.byte	0
-	.uleb128 0x5d
-	.4byte	.LASF698
+	.uleb128 0x5f
+	.4byte	.LASF699
 	.byte	0x2
 	.2byte	0x647
 	.4byte	.LFB282
 	.4byte	.LFE282-.LFB282
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x46e2
-	.uleb128 0x63
-	.4byte	.LASF612
+	.4byte	0x4749
+	.uleb128 0x65
+	.4byte	.LASF614
 	.byte	0x2
 	.2byte	0x647
 	.4byte	0x1d79
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x4f
+	.uleb128 0x52
 	.4byte	.LASF380
 	.byte	0x2
 	.2byte	0x647
 	.4byte	0xdba
 	.4byte	.LLST90
-	.uleb128 0x4f
+	.uleb128 0x52
 	.4byte	.LASF382
 	.byte	0x2
 	.2byte	0x647
 	.4byte	0xdba
 	.4byte	.LLST91
-	.uleb128 0x51
-	.4byte	.LASF592
+	.uleb128 0x54
+	.4byte	.LASF595
 	.byte	0x2
 	.2byte	0x649
 	.4byte	0xdba
 	.4byte	.LLST92
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF699
+	.uleb128 0x48
+	.4byte	.LASF700
 	.byte	0x2
 	.2byte	0x63e
 	.4byte	0x50
@@ -32632,13 +32707,13 @@ __func__.9940:
 	.4byte	.LFE281-.LFB281
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4719
+	.4byte	0x4780
 	.uleb128 0x44
-	.4byte	.LVL1037
-	.4byte	0x4719
+	.4byte	.LVL1039
+	.4byte	0x4780
 	.uleb128 0x34
-	.4byte	.LVL1038
-	.4byte	0x4791
+	.4byte	.LVL1040
+	.4byte	0x47f8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32647,25 +32722,25 @@ __func__.9940:
 	.4byte	.LANCHOR144
 	.byte	0
 	.byte	0
-	.uleb128 0x5d
-	.4byte	.LASF700
+	.uleb128 0x5f
+	.4byte	.LASF701
 	.byte	0x2
 	.2byte	0x627
 	.4byte	.LFB280
 	.4byte	.LFE280-.LFB280
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4763
-	.uleb128 0x51
+	.4byte	0x47ca
+	.uleb128 0x54
 	.4byte	.LASF330
 	.byte	0x2
 	.2byte	0x629
 	.4byte	0xdba
-	.4byte	.LLST257
+	.4byte	.LLST259
 	.uleb128 0x32
-	.4byte	.LVL1034
+	.4byte	.LVL1036
 	.4byte	0x230c
-	.4byte	0x4752
+	.4byte	0x47b9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32673,7 +32748,7 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1035
+	.4byte	.LVL1037
 	.4byte	0x230c
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -32683,8 +32758,8 @@ __func__.9940:
 	.byte	0xff
 	.byte	0
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF701
+	.uleb128 0x48
+	.4byte	.LASF702
 	.byte	0x2
 	.2byte	0x617
 	.4byte	0x50
@@ -32692,10 +32767,10 @@ __func__.9940:
 	.4byte	.LFE279-.LFB279
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4791
+	.4byte	0x47f8
 	.uleb128 0x34
-	.4byte	.LVL1033
-	.4byte	0x4791
+	.4byte	.LVL1035
+	.4byte	0x47f8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32704,8 +32779,8 @@ __func__.9940:
 	.4byte	.LANCHOR149
 	.byte	0
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF702
+	.uleb128 0x48
+	.4byte	.LASF703
 	.byte	0x2
 	.2byte	0x5b9
 	.4byte	0x50
@@ -32713,56 +32788,56 @@ __func__.9940:
 	.4byte	.LFE278-.LFB278
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4934
-	.uleb128 0x4f
-	.4byte	.LASF703
+	.4byte	0x499b
+	.uleb128 0x52
+	.4byte	.LASF704
 	.byte	0x2
 	.2byte	0x5b9
-	.4byte	0x4934
-	.4byte	.LLST249
-	.uleb128 0x51
-	.4byte	.LASF704
+	.4byte	0x499b
+	.4byte	.LLST251
+	.uleb128 0x54
+	.4byte	.LASF705
 	.byte	0x2
 	.2byte	0x5bb
 	.4byte	0xddb
-	.4byte	.LLST250
-	.uleb128 0x51
-	.4byte	.LASF299
+	.4byte	.LLST252
+	.uleb128 0x54
+	.4byte	.LASF299
 	.byte	0x2
 	.2byte	0x5bb
 	.4byte	0xddb
-	.4byte	.LLST251
-	.uleb128 0x51
-	.4byte	.LASF705
+	.4byte	.LLST253
+	.uleb128 0x54
+	.4byte	.LASF706
 	.byte	0x2
 	.2byte	0x5bc
 	.4byte	0xddb
-	.4byte	.LLST252
-	.uleb128 0x51
+	.4byte	.LLST254
+	.uleb128 0x54
 	.4byte	.LASF330
 	.byte	0x2
 	.2byte	0x5bd
 	.4byte	0xdba
-	.4byte	.LLST253
+	.4byte	.LLST255
 	.uleb128 0x28
-	.4byte	.LASF706
+	.4byte	.LASF707
 	.byte	0x2
 	.2byte	0x5be
 	.4byte	0xff2
 	.uleb128 0x1
 	.byte	0x58
-	.uleb128 0x51
+	.uleb128 0x54
 	.4byte	.LASF310
 	.byte	0x2
 	.2byte	0x5bf
 	.4byte	0x10e9
-	.4byte	.LLST254
-	.uleb128 0x51
+	.4byte	.LLST256
+	.uleb128 0x54
 	.4byte	.LASF311
 	.byte	0x2
 	.2byte	0x5c0
 	.4byte	0xff2
-	.4byte	.LLST255
+	.4byte	.LLST257
 	.uleb128 0x28
 	.4byte	.LASF307
 	.byte	0x2
@@ -32770,23 +32845,23 @@ __func__.9940:
 	.4byte	0xdba
 	.uleb128 0x1
 	.byte	0x5b
-	.uleb128 0x51
-	.4byte	.LASF707
+	.uleb128 0x54
+	.4byte	.LASF708
 	.byte	0x2
 	.2byte	0x5c2
 	.4byte	0xdba
-	.4byte	.LLST256
+	.4byte	.LLST258
 	.uleb128 0x28
-	.4byte	.LASF708
+	.4byte	.LASF709
 	.byte	0x2
 	.2byte	0x5c3
-	.4byte	0x493a
+	.4byte	0x49a1
 	.uleb128 0x1
 	.byte	0x57
 	.uleb128 0x32
-	.4byte	.LVL997
+	.4byte	.LVL999
 	.4byte	0x230c
-	.4byte	0x4877
+	.4byte	0x48de
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32809,9 +32884,9 @@ __func__.9940:
 	.byte	0x24
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1002
-	.4byte	0x6011
-	.4byte	0x488a
+	.4byte	.LVL1004
+	.4byte	0x6078
+	.4byte	0x48f1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32819,9 +32894,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1008
-	.4byte	0x583d
-	.4byte	0x489e
+	.4byte	.LVL1010
+	.4byte	0x58a4
+	.4byte	0x4905
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32830,9 +32905,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1009
-	.4byte	0x57e5
-	.4byte	0x48b2
+	.4byte	.LVL1011
+	.4byte	0x584c
+	.4byte	0x4919
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32841,9 +32916,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1010
-	.4byte	0x569b
-	.4byte	0x48c6
+	.4byte	.LVL1012
+	.4byte	0x5702
+	.4byte	0x492d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32852,9 +32927,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1011
-	.4byte	0x569b
-	.4byte	0x48da
+	.4byte	.LVL1013
+	.4byte	0x5702
+	.4byte	0x4941
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32863,9 +32938,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1014
+	.4byte	.LVL1016
 	.4byte	0x26b9
-	.4byte	0x48fb
+	.4byte	0x4962
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32884,9 +32959,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1019
+	.4byte	.LVL1021
 	.4byte	0x26b9
-	.4byte	0x4919
+	.4byte	0x4980
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32905,7 +32980,7 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1023
+	.4byte	.LVL1025
 	.4byte	0x26b9
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -32931,8 +33006,8 @@ __func__.9940:
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0x1271
-	.uleb128 0x59
-	.4byte	.LASF709
+	.uleb128 0x5c
+	.4byte	.LASF710
 	.byte	0x2
 	.2byte	0x54f
 	.4byte	0x50
@@ -32940,13 +33015,13 @@ __func__.9940:
 	.4byte	.LFE277-.LFB277
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4aae
-	.uleb128 0x51
-	.4byte	.LASF705
+	.4byte	0x4b15
+	.uleb128 0x54
+	.4byte	.LASF706
 	.byte	0x2
 	.2byte	0x551
 	.4byte	0xddb
-	.4byte	.LLST446
+	.4byte	.LLST448
 	.uleb128 0x3d
 	.4byte	.LASF574
 	.4byte	0x26b4
@@ -32954,9 +33029,9 @@ __func__.9940:
 	.byte	0x3
 	.4byte	__func__.9522
 	.uleb128 0x32
-	.4byte	.LVL1970
+	.4byte	.LVL1972
 	.4byte	0x230c
-	.4byte	0x498c
+	.4byte	0x49f3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32964,9 +33039,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1971
-	.4byte	0x6011
-	.4byte	0x499f
+	.4byte	.LVL1973
+	.4byte	0x6078
+	.4byte	0x4a06
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32974,9 +33049,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1973
-	.4byte	0x9222
-	.4byte	0x49c6
+	.4byte	.LVL1975
+	.4byte	0x9289
+	.4byte	0x4a2d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32997,9 +33072,9 @@ __func__.9940:
 	.2byte	0x56c
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1974
-	.4byte	0x9222
-	.4byte	0x49ed
+	.4byte	.LVL1976
+	.4byte	0x9289
+	.4byte	0x4a54
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33020,9 +33095,9 @@ __func__.9940:
 	.2byte	0x56e
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1976
+	.4byte	.LVL1978
 	.4byte	0x22a6
-	.4byte	0x4a07
+	.4byte	0x4a6e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33037,15 +33112,15 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1977
+	.4byte	.LVL1979
 	.4byte	0x22a6
 	.uleb128 0x44
-	.4byte	.LVL1978
+	.4byte	.LVL1980
 	.4byte	0x22a6
 	.uleb128 0x32
-	.4byte	.LVL1980
-	.4byte	0x9222
-	.4byte	0x4a40
+	.4byte	.LVL1982
+	.4byte	0x9289
+	.4byte	0x4aa7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33066,9 +33141,9 @@ __func__.9940:
 	.2byte	0x584
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1981
-	.4byte	0x3ec7
-	.4byte	0x4a57
+	.4byte	.LVL1983
+	.4byte	0x3f2e
+	.4byte	0x4abe
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33077,9 +33152,9 @@ __func__.9940:
 	.4byte	.LANCHOR51
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1982
-	.4byte	0x3ec7
-	.4byte	0x4a6b
+	.4byte	.LVL1984
+	.4byte	0x3f2e
+	.4byte	0x4ad2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33088,9 +33163,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1983
-	.4byte	0x3ec7
-	.4byte	0x4a7f
+	.4byte	.LVL1985
+	.4byte	0x3f2e
+	.4byte	0x4ae6
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33099,9 +33174,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1984
-	.4byte	0x3ec7
-	.4byte	0x4a93
+	.4byte	.LVL1986
+	.4byte	0x3f2e
+	.4byte	0x4afa
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33110,7 +33185,7 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1986
+	.4byte	.LVL1988
 	.4byte	0x26b9
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -33130,8 +33205,8 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF710
+	.uleb128 0x48
+	.4byte	.LASF711
 	.byte	0x2
 	.2byte	0x54a
 	.4byte	0x50
@@ -33139,39 +33214,39 @@ __func__.9940:
 	.4byte	.LFE276-.LFB276
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4ad9
-	.uleb128 0x4f
-	.4byte	.LASF711
+	.4byte	0x4b40
+	.uleb128 0x52
+	.4byte	.LASF712
 	.byte	0x2
 	.2byte	0x54a
 	.4byte	0xdba
 	.4byte	.LLST89
 	.byte	0
-	.uleb128 0x62
-	.4byte	.LASF713
+	.uleb128 0x64
+	.4byte	.LASF714
 	.byte	0x2
 	.2byte	0x542
 	.byte	0x1
-	.4byte	0x4aff
-	.uleb128 0x47
-	.4byte	.LASF711
+	.4byte	0x4b66
+	.uleb128 0x4a
+	.4byte	.LASF712
 	.byte	0x2
 	.2byte	0x542
 	.4byte	0xdba
-	.uleb128 0x47
-	.4byte	.LASF588
+	.uleb128 0x4a
+	.4byte	.LASF591
 	.byte	0x2
 	.2byte	0x542
 	.4byte	0x50
 	.byte	0
-	.uleb128 0x4e
-	.4byte	.LASF715
+	.uleb128 0x51
+	.4byte	.LASF716
 	.byte	0x2
 	.2byte	0x535
 	.4byte	0x50
 	.byte	0x1
-	.uleb128 0x45
-	.4byte	.LASF716
+	.uleb128 0x48
+	.4byte	.LASF717
 	.byte	0x2
 	.2byte	0x446
 	.4byte	0x50
@@ -33179,61 +33254,61 @@ __func__.9940:
 	.4byte	.LFE273-.LFB273
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4d0e
-	.uleb128 0x51
-	.4byte	.LASF592
+	.4byte	0x4d75
+	.uleb128 0x54
+	.4byte	.LASF595
 	.byte	0x2
 	.2byte	0x448
 	.4byte	0xdba
-	.4byte	.LLST243
+	.4byte	.LLST245
 	.uleb128 0x28
-	.4byte	.LASF717
+	.4byte	.LASF718
 	.byte	0x2
 	.2byte	0x448
 	.4byte	0xdba
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -60
-	.uleb128 0x51
+	.uleb128 0x54
 	.4byte	.LASF388
 	.byte	0x2
 	.2byte	0x449
 	.4byte	0xdba
-	.4byte	.LLST244
-	.uleb128 0x51
+	.4byte	.LLST246
+	.uleb128 0x54
 	.4byte	.LASF569
 	.byte	0x2
 	.2byte	0x449
 	.4byte	0xdba
-	.4byte	.LLST245
-	.uleb128 0x50
+	.4byte	.LLST247
+	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x2
 	.2byte	0x44a
 	.4byte	0xddb
-	.4byte	.LLST246
-	.uleb128 0x50
+	.4byte	.LLST248
+	.uleb128 0x53
 	.ascii	"j\000"
 	.byte	0x2
 	.2byte	0x44a
 	.4byte	0xddb
-	.4byte	.LLST247
-	.uleb128 0x51
-	.4byte	.LASF718
+	.4byte	.LLST249
+	.uleb128 0x54
+	.4byte	.LASF719
 	.byte	0x2
 	.2byte	0x44b
-	.4byte	0x493a
-	.4byte	.LLST248
+	.4byte	0x49a1
+	.4byte	.LLST250
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x3b93
+	.4byte	0x3bfa
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9465
 	.uleb128 0x32
-	.4byte	.LVL935
+	.4byte	.LVL937
 	.4byte	0x230c
-	.4byte	0x4bb4
+	.4byte	0x4c1b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -33242,9 +33317,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL936
+	.4byte	.LVL938
 	.4byte	0x230c
-	.4byte	0x4bc8
+	.4byte	0x4c2f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -33253,9 +33328,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL937
+	.4byte	.LVL939
 	.4byte	0x230c
-	.4byte	0x4bdc
+	.4byte	0x4c43
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -33264,9 +33339,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL938
+	.4byte	.LVL940
 	.4byte	0x230c
-	.4byte	0x4bf0
+	.4byte	0x4c57
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -33275,9 +33350,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL939
+	.4byte	.LVL941
 	.4byte	0x230c
-	.4byte	0x4c12
+	.4byte	0x4c79
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33297,9 +33372,9 @@ __func__.9940:
 	.byte	0x3c
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL942
-	.4byte	0x6192
-	.4byte	0x4c28
+	.4byte	.LVL944
+	.4byte	0x61f9
+	.4byte	0x4c8f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -33310,9 +33385,9 @@ __func__.9940:
 	.byte	0x2
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL944
-	.4byte	0x67c5
-	.4byte	0x4c3e
+	.4byte	.LVL946
+	.4byte	0x682c
+	.4byte	0x4ca5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33323,9 +33398,9 @@ __func__.9940:
 	.byte	0x2
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL950
+	.4byte	.LVL952
 	.4byte	0x26b9
-	.4byte	0x4c5d
+	.4byte	0x4cc4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33345,9 +33420,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL953
+	.4byte	.LVL955
 	.4byte	0x26b9
-	.4byte	0x4c75
+	.4byte	0x4cdc
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -33360,9 +33435,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL961
-	.4byte	0x5f01
-	.4byte	0x4c89
+	.4byte	.LVL963
+	.4byte	0x5f68
+	.4byte	0x4cf0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33371,9 +33446,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL962
-	.4byte	0x9222
-	.4byte	0x4cb0
+	.4byte	.LVL964
+	.4byte	0x9289
+	.4byte	0x4d17
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33394,9 +33469,9 @@ __func__.9940:
 	.2byte	0x48a
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL971
-	.4byte	0x9222
-	.4byte	0x4cd7
+	.4byte	.LVL973
+	.4byte	0x9289
+	.4byte	0x4d3e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33417,9 +33492,9 @@ __func__.9940:
 	.2byte	0x4b3
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL980
-	.4byte	0x5f01
-	.4byte	0x4cea
+	.4byte	.LVL982
+	.4byte	0x5f68
+	.4byte	0x4d51
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -33427,8 +33502,8 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL982
-	.4byte	0x9222
+	.4byte	.LVL984
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33449,8 +33524,8 @@ __func__.9940:
 	.2byte	0x530
 	.byte	0
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF719
+	.uleb128 0x48
+	.4byte	.LASF720
 	.byte	0x2
 	.2byte	0x3eb
 	.4byte	0x50
@@ -33458,27 +33533,27 @@ __func__.9940:
 	.4byte	.LFE272-.LFB272
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4e6f
-	.uleb128 0x51
+	.4byte	0x4ed6
+	.uleb128 0x54
 	.4byte	.LASF300
 	.byte	0x2
 	.2byte	0x3ed
 	.4byte	0xdba
-	.4byte	.LLST368
-	.uleb128 0x51
-	.4byte	.LASF720
+	.4byte	.LLST370
+	.uleb128 0x54
+	.4byte	.LASF721
 	.byte	0x2
 	.2byte	0x3ee
-	.4byte	0x4e6f
-	.4byte	.LLST369
-	.uleb128 0x51
-	.4byte	.LASF721
+	.4byte	0x4ed6
+	.4byte	.LLST371
+	.uleb128 0x54
+	.4byte	.LASF722
 	.byte	0x2
 	.2byte	0x3ef
 	.4byte	0xdba
-	.4byte	.LLST370
-	.uleb128 0x4a
-	.4byte	.LASF722
+	.4byte	.LLST372
+	.uleb128 0x4d
+	.4byte	.LASF723
 	.byte	0x2
 	.2byte	0x41c
 	.uleb128 0x3d
@@ -33488,9 +33563,9 @@ __func__.9940:
 	.byte	0x3
 	.4byte	__func__.9443
 	.uleb128 0x32
-	.4byte	.LVL1559
+	.4byte	.LVL1561
 	.4byte	0x230c
-	.4byte	0x4d83
+	.4byte	0x4dea
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -33499,9 +33574,9 @@ __func__.9940:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1560
+	.4byte	.LVL1562
 	.4byte	0x22a6
-	.4byte	0x4da0
+	.4byte	0x4e07
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -33516,15 +33591,15 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1561
+	.4byte	.LVL1563
 	.4byte	0x22a6
 	.uleb128 0x44
-	.4byte	.LVL1562
+	.4byte	.LVL1564
 	.4byte	0x22a6
 	.uleb128 0x32
-	.4byte	.LVL1563
-	.4byte	0x4f5b
-	.4byte	0x4dc6
+	.4byte	.LVL1565
+	.4byte	0x4fc2
+	.4byte	0x4e2d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33533,9 +33608,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1565
+	.4byte	.LVL1567
 	.4byte	0x251a
-	.4byte	0x4de9
+	.4byte	0x4e50
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33559,12 +33634,12 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1567
-	.4byte	0x5dbf
+	.4byte	.LVL1569
+	.4byte	0x5e26
 	.uleb128 0x32
-	.4byte	.LVL1568
+	.4byte	.LVL1570
 	.4byte	0x251a
-	.4byte	0x4e15
+	.4byte	0x4e7c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33588,9 +33663,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1569
-	.4byte	0x9222
-	.4byte	0x4e3c
+	.4byte	.LVL1571
+	.4byte	0x9289
+	.4byte	0x4ea3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33611,9 +33686,9 @@ __func__.9940:
 	.2byte	0x433
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1572
-	.4byte	0x9222
-	.4byte	0x4e59
+	.4byte	.LVL1574
+	.4byte	0x9289
+	.4byte	0x4ec0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33628,8 +33703,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1573
-	.4byte	0x5f01
+	.4byte	.LVL1575
+	.4byte	0x5f68
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33646,77 +33721,77 @@ __func__.9940:
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0x12c9
-	.uleb128 0x62
-	.4byte	.LASF723
+	.uleb128 0x64
+	.4byte	.LASF724
 	.byte	0x2
 	.2byte	0x3b2
 	.byte	0x1
-	.4byte	0x4ec1
+	.4byte	0x4f28
+	.uleb128 0x4f
 	.uleb128 0x4c
-	.uleb128 0x49
 	.ascii	"lpa\000"
 	.byte	0x2
 	.2byte	0x3b7
 	.4byte	0xdc5
-	.uleb128 0x49
+	.uleb128 0x4c
 	.ascii	"ppa\000"
 	.byte	0x2
 	.2byte	0x3b8
 	.4byte	0xdc5
-	.uleb128 0x48
-	.4byte	.LASF724
+	.uleb128 0x4b
+	.4byte	.LASF725
 	.byte	0x2
 	.2byte	0x3b9
 	.4byte	0xdc5
-	.uleb128 0x48
-	.4byte	.LASF667
+	.uleb128 0x4b
+	.4byte	.LASF668
 	.byte	0x2
 	.2byte	0x3ba
 	.4byte	0xde6
-	.uleb128 0x48
-	.4byte	.LASF596
+	.uleb128 0x4b
+	.4byte	.LASF599
 	.byte	0x2
 	.2byte	0x3bb
-	.4byte	0x2a63
+	.4byte	0x2aca
 	.byte	0
 	.byte	0
-	.uleb128 0x5d
-	.4byte	.LASF725
+	.uleb128 0x5f
+	.4byte	.LASF726
 	.byte	0x2
 	.2byte	0x380
 	.4byte	.LFB270
 	.4byte	.LFE270-.LFB270
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4f5b
-	.uleb128 0x4f
-	.4byte	.LASF703
+	.4byte	0x4fc2
+	.uleb128 0x52
+	.4byte	.LASF704
 	.byte	0x2
 	.2byte	0x380
-	.4byte	0x4934
-	.4byte	.LLST239
-	.uleb128 0x50
+	.4byte	0x499b
+	.4byte	.LLST241
+	.uleb128 0x53
 	.ascii	"ppa\000"
 	.byte	0x2
 	.2byte	0x382
 	.4byte	0xdc5
-	.4byte	.LLST240
-	.uleb128 0x51
+	.4byte	.LLST242
+	.uleb128 0x54
 	.4byte	.LASF317
 	.byte	0x2
 	.2byte	0x383
 	.4byte	0xdba
-	.4byte	.LLST241
-	.uleb128 0x51
-	.4byte	.LASF706
+	.4byte	.LLST243
+	.uleb128 0x54
+	.4byte	.LASF707
 	.byte	0x2
 	.2byte	0x384
 	.4byte	0xff2
-	.4byte	.LLST242
+	.4byte	.LLST244
 	.uleb128 0x32
-	.4byte	.LVL929
+	.4byte	.LVL931
 	.4byte	0x26b9
-	.4byte	0x4f35
+	.4byte	0x4f9c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33735,9 +33810,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x43
-	.4byte	.LVL931
-	.4byte	0x5417
-	.4byte	0x4f4a
+	.4byte	.LVL933
+	.4byte	0x547e
+	.4byte	0x4fb1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33747,7 +33822,7 @@ __func__.9940:
 	.byte	0x50
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL933
+	.4byte	.LVL935
 	.4byte	0x230c
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -33757,25 +33832,25 @@ __func__.9940:
 	.byte	0xff
 	.byte	0
 	.byte	0
-	.uleb128 0x62
-	.4byte	.LASF726
+	.uleb128 0x64
+	.4byte	.LASF727
 	.byte	0x2
 	.2byte	0x371
 	.byte	0x1
-	.4byte	0x4f7f
-	.uleb128 0x47
+	.4byte	0x4fe6
+	.uleb128 0x4a
 	.4byte	.LASF393
 	.byte	0x2
 	.2byte	0x371
 	.4byte	0xdc5
-	.uleb128 0x49
+	.uleb128 0x4c
 	.ascii	"i\000"
 	.byte	0x2
 	.2byte	0x373
 	.4byte	0xdba
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF727
+	.uleb128 0x48
+	.4byte	.LASF728
 	.byte	0x2
 	.2byte	0x35c
 	.4byte	0x50
@@ -33783,23 +33858,23 @@ __func__.9940:
 	.4byte	.LFE268-.LFB268
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4fd7
-	.uleb128 0x4f
-	.4byte	.LASF728
+	.4byte	0x503e
+	.uleb128 0x52
+	.4byte	.LASF729
 	.byte	0x2
 	.2byte	0x35c
 	.4byte	0xdc5
-	.4byte	.LLST358
-	.uleb128 0x51
-	.4byte	.LASF729
+	.4byte	.LLST360
+	.uleb128 0x54
+	.4byte	.LASF730
 	.byte	0x2
 	.2byte	0x35e
 	.4byte	0xdc5
-	.4byte	.LLST359
+	.4byte	.LLST361
 	.uleb128 0x32
-	.4byte	.LVL1531
-	.4byte	0x50ef
-	.4byte	0x4fcd
+	.4byte	.LVL1533
+	.4byte	0x5156
+	.4byte	0x5034
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33808,11 +33883,11 @@ __func__.9940:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1532
-	.4byte	0x3da3
+	.4byte	.LVL1534
+	.4byte	0x3e0a
 	.byte	0
-	.uleb128 0x59
-	.4byte	.LASF730
+	.uleb128 0x5c
+	.4byte	.LASF731
 	.byte	0x2
 	.2byte	0x336
 	.4byte	0xdc5
@@ -33820,50 +33895,50 @@ __func__.9940:
 	.4byte	.LFE267-.LFB267
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x50e9
-	.uleb128 0x4f
-	.4byte	.LASF731
+	.4byte	0x5150
+	.uleb128 0x52
+	.4byte	.LASF732
 	.byte	0x2
 	.2byte	0x336
 	.4byte	0xdc5
-	.4byte	.LLST360
-	.uleb128 0x4f
-	.4byte	.LASF732
+	.4byte	.LLST362
+	.uleb128 0x52
+	.4byte	.LASF733
 	.byte	0x2
 	.2byte	0x336
 	.4byte	0xdc5
-	.4byte	.LLST361
-	.uleb128 0x4f
-	.4byte	.LASF733
+	.4byte	.LLST363
+	.uleb128 0x52
+	.4byte	.LASF734
 	.byte	0x2
 	.2byte	0x336
-	.4byte	0x50e9
-	.4byte	.LLST362
-	.uleb128 0x50
+	.4byte	0x5150
+	.4byte	.LLST364
+	.uleb128 0x53
 	.ascii	"len\000"
 	.byte	0x2
 	.2byte	0x338
 	.4byte	0xdba
-	.4byte	.LLST363
-	.uleb128 0x51
-	.4byte	.LASF734
+	.4byte	.LLST365
+	.uleb128 0x54
+	.4byte	.LASF735
 	.byte	0x2
 	.2byte	0x338
 	.4byte	0xdba
-	.4byte	.LLST364
-	.uleb128 0x50
+	.4byte	.LLST366
+	.uleb128 0x53
 	.ascii	"ppn\000"
 	.byte	0x2
 	.2byte	0x339
 	.4byte	0xdc5
-	.4byte	.LLST365
-	.uleb128 0x51
-	.4byte	.LASF735
+	.4byte	.LLST367
+	.uleb128 0x54
+	.4byte	.LASF736
 	.byte	0x2
 	.2byte	0x33a
 	.4byte	0xdc5
-	.4byte	.LLST366
-	.uleb128 0x5e
+	.4byte	.LLST368
+	.uleb128 0x60
 	.ascii	"req\000"
 	.byte	0x2
 	.2byte	0x33b
@@ -33871,12 +33946,12 @@ __func__.9940:
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -116
-	.uleb128 0x51
-	.4byte	.LASF736
+	.uleb128 0x54
+	.4byte	.LASF737
 	.byte	0x2
 	.2byte	0x33c
 	.4byte	0xdc5
-	.4byte	.LLST367
+	.4byte	.LLST369
 	.uleb128 0x28
 	.4byte	.LASF565
 	.byte	0x2
@@ -33886,9 +33961,9 @@ __func__.9940:
 	.byte	0x91
 	.sleb128 -96
 	.uleb128 0x32
-	.4byte	.LVL1542
+	.4byte	.LVL1544
 	.4byte	0x26b9
-	.4byte	0x50b0
+	.4byte	0x5117
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33907,9 +33982,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1544
+	.4byte	.LVL1546
 	.4byte	0x22a6
-	.4byte	0x50ca
+	.4byte	0x5131
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33924,7 +33999,7 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1549
+	.4byte	.LVL1551
 	.4byte	0x230c
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -33950,8 +34025,8 @@ __func__.9940:
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0xdaf
-	.uleb128 0x59
-	.4byte	.LASF737
+	.uleb128 0x5c
+	.4byte	.LASF738
 	.byte	0x2
 	.2byte	0x311
 	.4byte	0xdc5
@@ -33959,50 +34034,50 @@ __func__.9940:
 	.4byte	.LFE266-.LFB266
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5212
-	.uleb128 0x4f
-	.4byte	.LASF731
+	.4byte	0x5279
+	.uleb128 0x52
+	.4byte	.LASF732
 	.byte	0x2
 	.2byte	0x311
 	.4byte	0xdc5
-	.4byte	.LLST350
-	.uleb128 0x4f
-	.4byte	.LASF732
+	.4byte	.LLST352
+	.uleb128 0x52
+	.4byte	.LASF733
 	.byte	0x2
 	.2byte	0x311
 	.4byte	0xdc5
-	.4byte	.LLST351
-	.uleb128 0x4f
-	.4byte	.LASF733
+	.4byte	.LLST353
+	.uleb128 0x52
+	.4byte	.LASF734
 	.byte	0x2
 	.2byte	0x311
-	.4byte	0x50e9
-	.4byte	.LLST352
-	.uleb128 0x50
+	.4byte	0x5150
+	.4byte	.LLST354
+	.uleb128 0x53
 	.ascii	"len\000"
 	.byte	0x2
 	.2byte	0x313
 	.4byte	0xdba
-	.4byte	.LLST353
-	.uleb128 0x51
-	.4byte	.LASF734
+	.4byte	.LLST355
+	.uleb128 0x54
+	.4byte	.LASF735
 	.byte	0x2
 	.2byte	0x313
 	.4byte	0xdba
-	.4byte	.LLST354
-	.uleb128 0x50
+	.4byte	.LLST356
+	.uleb128 0x53
 	.ascii	"ppn\000"
 	.byte	0x2
 	.2byte	0x314
 	.4byte	0xdc5
-	.4byte	.LLST355
-	.uleb128 0x51
-	.4byte	.LASF735
+	.4byte	.LLST357
+	.uleb128 0x54
+	.4byte	.LASF736
 	.byte	0x2
 	.2byte	0x315
 	.4byte	0xdc5
-	.4byte	.LLST356
-	.uleb128 0x5e
+	.4byte	.LLST358
+	.uleb128 0x60
 	.ascii	"req\000"
 	.byte	0x2
 	.2byte	0x316
@@ -34010,12 +34085,12 @@ __func__.9940:
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -116
-	.uleb128 0x51
-	.4byte	.LASF736
+	.uleb128 0x54
+	.4byte	.LASF737
 	.byte	0x2
 	.2byte	0x317
 	.4byte	0xdc5
-	.4byte	.LLST357
+	.4byte	.LLST359
 	.uleb128 0x28
 	.4byte	.LASF565
 	.byte	0x2
@@ -34025,9 +34100,9 @@ __func__.9940:
 	.byte	0x91
 	.sleb128 -96
 	.uleb128 0x32
-	.4byte	.LVL1513
+	.4byte	.LVL1515
 	.4byte	0x26b9
-	.4byte	0x51c8
+	.4byte	0x522f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34046,9 +34121,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1516
+	.4byte	.LVL1518
 	.4byte	0x22a6
-	.4byte	0x51e5
+	.4byte	0x524c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -34065,9 +34140,9 @@ __func__.9940:
 	.byte	0x6
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1518
-	.4byte	0x5417
-	.4byte	0x5202
+	.4byte	.LVL1520
+	.4byte	0x547e
+	.4byte	0x5269
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34082,7 +34157,7 @@ __func__.9940:
 	.sleb128 -1
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1523
+	.4byte	.LVL1525
 	.4byte	0x230c
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -34091,8 +34166,8 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF738
+	.uleb128 0x48
+	.4byte	.LASF739
 	.byte	0x2
 	.2byte	0x2f0
 	.4byte	0x50
@@ -34100,40 +34175,40 @@ __func__.9940:
 	.4byte	.LFE265-.LFB265
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x52fe
-	.uleb128 0x5a
+	.4byte	0x5365
+	.uleb128 0x5d
 	.ascii	"lpn\000"
 	.byte	0x2
 	.2byte	0x2f0
 	.4byte	0xdc5
-	.4byte	.LLST227
-	.uleb128 0x5a
+	.4byte	.LLST229
+	.uleb128 0x5d
 	.ascii	"ppn\000"
 	.byte	0x2
 	.2byte	0x2f0
 	.4byte	0xff2
-	.4byte	.LLST228
-	.uleb128 0x4f
-	.4byte	.LASF739
+	.4byte	.LLST230
+	.uleb128 0x52
+	.4byte	.LASF740
 	.byte	0x2
 	.2byte	0x2f0
 	.4byte	0x50
-	.4byte	.LLST229
-	.uleb128 0x51
-	.4byte	.LASF740
+	.4byte	.LLST231
+	.uleb128 0x54
+	.4byte	.LASF741
 	.byte	0x2
 	.2byte	0x2f2
 	.4byte	0xdba
-	.4byte	.LLST230
+	.4byte	.LLST232
 	.uleb128 0x28
-	.4byte	.LASF741
+	.4byte	.LASF742
 	.byte	0x2
 	.2byte	0x2f2
 	.4byte	0xdba
 	.uleb128 0x1
 	.byte	0x58
 	.uleb128 0x28
-	.4byte	.LASF742
+	.4byte	.LASF743
 	.byte	0x2
 	.2byte	0x2f2
 	.4byte	0xdba
@@ -34141,19 +34216,19 @@ __func__.9940:
 	.byte	0x54
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x530e
+	.4byte	0x5375
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9370
-	.uleb128 0x55
-	.4byte	.LASF743
+	.uleb128 0x58
+	.4byte	.LASF744
 	.byte	0x2
 	.2byte	0x2fb
-	.4byte	.L740
+	.4byte	.L741
 	.uleb128 0x32
-	.4byte	.LVL878
-	.4byte	0x9222
-	.4byte	0x52ca
+	.4byte	.LVL880
+	.4byte	0x9289
+	.4byte	0x5331
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34174,12 +34249,12 @@ __func__.9940:
 	.2byte	0x2f7
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL881
-	.4byte	0x534e
-	.uleb128 0x32
 	.4byte	.LVL883
-	.4byte	0x53c9
-	.4byte	0x52e7
+	.4byte	0x53b5
+	.uleb128 0x32
+	.4byte	.LVL885
+	.4byte	0x5430
+	.4byte	0x534e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34188,8 +34263,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL884
-	.4byte	0x590c
+	.4byte	.LVL886
+	.4byte	0x5973
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34206,15 +34281,15 @@ __func__.9940:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x530e
+	.4byte	0x5375
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x8
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x52fe
-	.uleb128 0x45
-	.4byte	.LASF744
+	.4byte	0x5365
+	.uleb128 0x48
+	.4byte	.LASF745
 	.byte	0x2
 	.2byte	0x2e3
 	.4byte	0x50
@@ -34222,22 +34297,22 @@ __func__.9940:
 	.4byte	.LFE264-.LFB264
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x534e
-	.uleb128 0x50
+	.4byte	0x53b5
+	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x2
 	.2byte	0x2e5
 	.4byte	0xdba
-	.4byte	.LLST312
+	.4byte	.LLST314
 	.uleb128 0x44
-	.4byte	.LVL1279
-	.4byte	0x4e75
+	.4byte	.LVL1281
+	.4byte	0x4edc
 	.uleb128 0x44
-	.4byte	.LVL1283
-	.4byte	0x53c9
+	.4byte	.LVL1285
+	.4byte	0x5430
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF745
+	.uleb128 0x48
+	.4byte	.LASF746
 	.byte	0x2
 	.2byte	0x2bb
 	.4byte	0xdba
@@ -34245,34 +34320,34 @@ __func__.9940:
 	.4byte	.LFE263-.LFB263
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x53c9
-	.uleb128 0x50
+	.4byte	0x5430
+	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x2
 	.2byte	0x2bd
 	.4byte	0xdba
 	.4byte	.LLST83
-	.uleb128 0x51
-	.4byte	.LASF746
+	.uleb128 0x54
+	.4byte	.LASF747
 	.byte	0x2
 	.2byte	0x2be
 	.4byte	0xdba
 	.4byte	.LLST84
-	.uleb128 0x51
-	.4byte	.LASF747
+	.uleb128 0x54
+	.4byte	.LASF748
 	.byte	0x2
 	.2byte	0x2bf
 	.4byte	0xdc5
 	.4byte	.LLST85
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x4570
+	.4byte	0x45d7
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9353
 	.uleb128 0x34
 	.4byte	.LVL233
-	.4byte	0x9222
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34293,8 +34368,8 @@ __func__.9940:
 	.2byte	0x2df
 	.byte	0
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF748
+	.uleb128 0x48
+	.4byte	.LASF749
 	.byte	0x2
 	.2byte	0x2b1
 	.4byte	0x50
@@ -34302,22 +34377,22 @@ __func__.9940:
 	.4byte	.LFE262-.LFB262
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5417
-	.uleb128 0x4f
-	.4byte	.LASF740
+	.4byte	0x547e
+	.uleb128 0x52
+	.4byte	.LASF741
 	.byte	0x2
 	.2byte	0x2b1
 	.4byte	0xdba
-	.4byte	.LLST225
-	.uleb128 0x51
+	.4byte	.LLST227
+	.uleb128 0x54
 	.4byte	.LASF317
 	.byte	0x2
 	.2byte	0x2b3
 	.4byte	0xdc5
-	.4byte	.LLST226
+	.4byte	.LLST228
 	.uleb128 0x34
-	.4byte	.LVL871
-	.4byte	0x5417
+	.4byte	.LVL873
+	.4byte	0x547e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34326,8 +34401,8 @@ __func__.9940:
 	.4byte	.LANCHOR144
 	.byte	0
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF749
+	.uleb128 0x48
+	.4byte	.LASF750
 	.byte	0x2
 	.2byte	0x276
 	.4byte	0x50
@@ -34335,57 +34410,57 @@ __func__.9940:
 	.4byte	.LFE261-.LFB261
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5576
-	.uleb128 0x4f
-	.4byte	.LASF703
+	.4byte	0x55dd
+	.uleb128 0x52
+	.4byte	.LASF704
 	.byte	0x2
 	.2byte	0x276
-	.4byte	0x4934
-	.4byte	.LLST212
-	.uleb128 0x4f
+	.4byte	0x499b
+	.4byte	.LLST214
+	.uleb128 0x52
 	.4byte	.LASF317
 	.byte	0x2
 	.2byte	0x276
 	.4byte	0xdc5
-	.4byte	.LLST213
-	.uleb128 0x4f
-	.4byte	.LASF733
+	.4byte	.LLST215
+	.uleb128 0x52
+	.4byte	.LASF734
 	.byte	0x2
 	.2byte	0x276
 	.4byte	0xff2
-	.4byte	.LLST214
-	.uleb128 0x51
+	.4byte	.LLST216
+	.uleb128 0x54
 	.4byte	.LASF388
 	.byte	0x2
 	.2byte	0x278
 	.4byte	0xdc5
-	.4byte	.LLST215
-	.uleb128 0x51
-	.4byte	.LASF708
+	.4byte	.LLST217
+	.uleb128 0x54
+	.4byte	.LASF709
 	.byte	0x2
 	.2byte	0x279
-	.4byte	0x493a
-	.4byte	.LLST216
-	.uleb128 0x51
-	.4byte	.LASF721
+	.4byte	0x49a1
+	.4byte	.LLST218
+	.uleb128 0x54
+	.4byte	.LASF722
 	.byte	0x2
 	.2byte	0x27a
 	.4byte	0xdba
-	.4byte	.LLST217
-	.uleb128 0x4a
-	.4byte	.LASF750
+	.4byte	.LLST219
+	.uleb128 0x4d
+	.4byte	.LASF751
 	.byte	0x2
 	.2byte	0x27c
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x32d2
+	.4byte	0x3339
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9328
 	.uleb128 0x32
-	.4byte	.LVL833
-	.4byte	0x5576
-	.4byte	0x54bc
+	.4byte	.LVL835
+	.4byte	0x55dd
+	.4byte	0x5523
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34394,9 +34469,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL834
-	.4byte	0x9222
-	.4byte	0x54e3
+	.4byte	.LVL836
+	.4byte	0x9289
+	.4byte	0x554a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34417,9 +34492,9 @@ __func__.9940:
 	.2byte	0x28a
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL835
-	.4byte	0x9222
-	.4byte	0x550a
+	.4byte	.LVL837
+	.4byte	0x9289
+	.4byte	0x5571
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34440,9 +34515,9 @@ __func__.9940:
 	.2byte	0x28b
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL837
+	.4byte	.LVL839
 	.4byte	0x230c
-	.4byte	0x5522
+	.4byte	0x5589
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -34455,9 +34530,9 @@ __func__.9940:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL840
+	.4byte	.LVL842
 	.4byte	0x251a
-	.4byte	0x5545
+	.4byte	0x55ac
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34481,9 +34556,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL842
-	.4byte	0x9222
-	.4byte	0x555c
+	.4byte	.LVL844
+	.4byte	0x9289
+	.4byte	0x55c3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34492,8 +34567,8 @@ __func__.9940:
 	.4byte	.LC86
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL843
-	.4byte	0x9222
+	.4byte	.LVL845
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34508,8 +34583,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF751
+	.uleb128 0x48
+	.4byte	.LASF752
 	.byte	0x2
 	.2byte	0x246
 	.4byte	0x50
@@ -34517,58 +34592,58 @@ __func__.9940:
 	.4byte	.LFE260-.LFB260
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5686
-	.uleb128 0x4f
-	.4byte	.LASF703
+	.4byte	0x56ed
+	.uleb128 0x52
+	.4byte	.LASF704
 	.byte	0x2
 	.2byte	0x246
-	.4byte	0x4934
-	.4byte	.LLST206
-	.uleb128 0x48
+	.4byte	0x499b
+	.4byte	.LLST208
+	.uleb128 0x4b
 	.4byte	.LASF388
 	.byte	0x2
 	.2byte	0x248
 	.4byte	0xdba
-	.uleb128 0x51
+	.uleb128 0x54
 	.4byte	.LASF330
 	.byte	0x2
 	.2byte	0x248
 	.4byte	0xdba
-	.4byte	.LLST207
-	.uleb128 0x51
-	.4byte	.LASF752
+	.4byte	.LLST209
+	.uleb128 0x54
+	.4byte	.LASF753
 	.byte	0x2
 	.2byte	0x249
 	.4byte	0xdba
-	.4byte	.LLST208
-	.uleb128 0x51
-	.4byte	.LASF753
+	.4byte	.LLST210
+	.uleb128 0x54
+	.4byte	.LASF754
 	.byte	0x2
 	.2byte	0x24a
 	.4byte	0x10e9
-	.4byte	.LLST209
-	.uleb128 0x51
-	.4byte	.LASF706
+	.4byte	.LLST211
+	.uleb128 0x54
+	.4byte	.LASF707
 	.byte	0x2
 	.2byte	0x24b
 	.4byte	0xff2
-	.4byte	.LLST210
-	.uleb128 0x51
-	.4byte	.LASF708
+	.4byte	.LLST212
+	.uleb128 0x54
+	.4byte	.LASF709
 	.byte	0x2
 	.2byte	0x24c
-	.4byte	0x493a
-	.4byte	.LLST211
+	.4byte	0x49a1
+	.4byte	.LLST213
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x5696
+	.4byte	0x56fd
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9314
 	.uleb128 0x32
-	.4byte	.LVL811
-	.4byte	0x9222
-	.4byte	0x5632
+	.4byte	.LVL813
+	.4byte	0x9289
+	.4byte	0x5699
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34589,12 +34664,12 @@ __func__.9940:
 	.2byte	0x250
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL812
-	.4byte	0x5dbf
+	.4byte	.LVL814
+	.4byte	0x5e26
 	.uleb128 0x32
-	.4byte	.LVL819
+	.4byte	.LVL821
 	.4byte	0x230c
-	.4byte	0x564f
+	.4byte	0x56b6
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -34603,9 +34678,9 @@ __func__.9940:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL824
+	.4byte	.LVL826
 	.4byte	0x251a
-	.4byte	0x5675
+	.4byte	0x56dc
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34629,8 +34704,8 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL825
-	.4byte	0x569b
+	.4byte	.LVL827
+	.4byte	0x5702
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34641,15 +34716,15 @@ __func__.9940:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x5696
+	.4byte	0x56fd
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x1e
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x5686
-	.uleb128 0x45
-	.4byte	.LASF754
+	.4byte	0x56ed
+	.uleb128 0x48
+	.4byte	.LASF755
 	.byte	0x2
 	.2byte	0x218
 	.4byte	0x50
@@ -34657,49 +34732,49 @@ __func__.9940:
 	.4byte	.LFE259-.LFB259
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x57e5
-	.uleb128 0x4f
-	.4byte	.LASF703
+	.4byte	0x584c
+	.uleb128 0x52
+	.4byte	.LASF704
 	.byte	0x2
 	.2byte	0x218
-	.4byte	0x4934
-	.4byte	.LLST218
-	.uleb128 0x51
-	.4byte	.LASF755
+	.4byte	0x499b
+	.4byte	.LLST220
+	.uleb128 0x54
+	.4byte	.LASF756
 	.byte	0x2
 	.2byte	0x21a
 	.4byte	0xdba
-	.4byte	.LLST219
-	.uleb128 0x51
-	.4byte	.LASF756
+	.4byte	.LLST221
+	.uleb128 0x54
+	.4byte	.LASF757
 	.byte	0x2
 	.2byte	0x21b
 	.4byte	0xdba
-	.4byte	.LLST220
-	.uleb128 0x51
+	.4byte	.LLST222
+	.uleb128 0x54
 	.4byte	.LASF330
 	.byte	0x2
 	.2byte	0x21c
 	.4byte	0xdba
-	.4byte	.LLST221
-	.uleb128 0x51
-	.4byte	.LASF753
+	.4byte	.LLST223
+	.uleb128 0x54
+	.4byte	.LASF754
 	.byte	0x2
 	.2byte	0x21d
 	.4byte	0x10e9
-	.4byte	.LLST222
-	.uleb128 0x51
-	.4byte	.LASF706
+	.4byte	.LLST224
+	.uleb128 0x54
+	.4byte	.LASF707
 	.byte	0x2
 	.2byte	0x21e
 	.4byte	0xff2
-	.4byte	.LLST223
-	.uleb128 0x51
-	.4byte	.LASF708
+	.4byte	.LLST225
+	.uleb128 0x54
+	.4byte	.LASF709
 	.byte	0x2
 	.2byte	0x21f
-	.4byte	0x493a
-	.4byte	.LLST224
+	.4byte	0x49a1
+	.4byte	.LLST226
 	.uleb128 0x3d
 	.4byte	.LASF574
 	.4byte	0x26b4
@@ -34707,9 +34782,9 @@ __func__.9940:
 	.byte	0x3
 	.4byte	__func__.9300
 	.uleb128 0x32
-	.4byte	.LVL848
-	.4byte	0x583d
-	.4byte	0x5748
+	.4byte	.LVL850
+	.4byte	0x58a4
+	.4byte	0x57af
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34718,9 +34793,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL851
-	.4byte	0x57e5
-	.4byte	0x575c
+	.4byte	.LVL853
+	.4byte	0x584c
+	.4byte	0x57c3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34729,9 +34804,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL854
-	.4byte	0x5f01
-	.4byte	0x5775
+	.4byte	.LVL856
+	.4byte	0x5f68
+	.4byte	0x57dc
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34745,9 +34820,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL856
-	.4byte	0x57e5
-	.4byte	0x5789
+	.4byte	.LVL858
+	.4byte	0x584c
+	.4byte	0x57f0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34756,9 +34831,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL861
+	.4byte	.LVL863
 	.4byte	0x26b9
-	.4byte	0x57a7
+	.4byte	0x580e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34777,9 +34852,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL862
-	.4byte	0x9222
-	.4byte	0x57ce
+	.4byte	.LVL864
+	.4byte	0x9289
+	.4byte	0x5835
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34800,8 +34875,8 @@ __func__.9940:
 	.2byte	0x234
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL866
-	.4byte	0x5417
+	.4byte	.LVL868
+	.4byte	0x547e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34816,44 +34891,44 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF757
+	.uleb128 0x49
+	.4byte	.LASF758
 	.byte	0x2
 	.2byte	0x203
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x5828
-	.uleb128 0x47
-	.4byte	.LASF703
+	.4byte	0x588f
+	.uleb128 0x4a
+	.4byte	.LASF704
 	.byte	0x2
 	.2byte	0x203
-	.4byte	0x4934
-	.uleb128 0x48
-	.4byte	.LASF758
+	.4byte	0x499b
+	.uleb128 0x4b
+	.4byte	.LASF759
 	.byte	0x2
 	.2byte	0x205
 	.4byte	0xdba
-	.uleb128 0x48
-	.4byte	.LASF753
+	.uleb128 0x4b
+	.4byte	.LASF754
 	.byte	0x2
 	.2byte	0x206
 	.4byte	0x10e9
-	.uleb128 0x4b
+	.uleb128 0x4e
 	.4byte	.LASF574
-	.4byte	0x5838
-	.4byte	.LASF757
+	.4byte	0x589f
+	.4byte	.LASF758
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x5838
+	.4byte	0x589f
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x19
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x5828
-	.uleb128 0x45
-	.4byte	.LASF759
+	.4byte	0x588f
+	.uleb128 0x48
+	.4byte	.LASF760
 	.byte	0x2
 	.2byte	0x1db
 	.4byte	0x50
@@ -34861,67 +34936,67 @@ __func__.9940:
 	.4byte	.LFE257-.LFB257
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x590c
-	.uleb128 0x4f
-	.4byte	.LASF703
+	.4byte	0x5973
+	.uleb128 0x52
+	.4byte	.LASF704
 	.byte	0x2
 	.2byte	0x1db
-	.4byte	0x4934
-	.4byte	.LLST199
+	.4byte	0x499b
+	.4byte	.LLST201
 	.uleb128 0x28
-	.4byte	.LASF753
+	.4byte	.LASF754
 	.byte	0x2
 	.2byte	0x1dd
 	.4byte	0x10e9
 	.uleb128 0x1
 	.byte	0x5a
-	.uleb128 0x51
-	.4byte	.LASF706
+	.uleb128 0x54
+	.4byte	.LASF707
 	.byte	0x2
 	.2byte	0x1de
 	.4byte	0xff2
-	.4byte	.LLST200
+	.4byte	.LLST202
 	.uleb128 0x28
-	.4byte	.LASF760
+	.4byte	.LASF761
 	.byte	0x2
 	.2byte	0x1df
 	.4byte	0x10e9
 	.uleb128 0x1
 	.byte	0x55
-	.uleb128 0x51
+	.uleb128 0x54
 	.4byte	.LASF388
 	.byte	0x2
 	.2byte	0x1e0
 	.4byte	0xdba
-	.4byte	.LLST201
-	.uleb128 0x51
+	.4byte	.LLST203
+	.uleb128 0x54
 	.4byte	.LASF330
 	.byte	0x2
 	.2byte	0x1e0
 	.4byte	0xdba
-	.4byte	.LLST202
-	.uleb128 0x51
-	.4byte	.LASF758
+	.4byte	.LLST204
+	.uleb128 0x54
+	.4byte	.LASF759
 	.byte	0x2
 	.2byte	0x1e1
 	.4byte	0xdba
-	.4byte	.LLST203
-	.uleb128 0x51
-	.4byte	.LASF761
+	.4byte	.LLST205
+	.uleb128 0x54
+	.4byte	.LASF762
 	.byte	0x2
 	.2byte	0x1e2
 	.4byte	0xdba
-	.4byte	.LLST204
-	.uleb128 0x51
-	.4byte	.LASF756
+	.4byte	.LLST206
+	.uleb128 0x54
+	.4byte	.LASF757
 	.byte	0x2
 	.2byte	0x1e3
 	.4byte	0xdba
-	.4byte	.LLST205
+	.4byte	.LLST207
 	.uleb128 0x32
-	.4byte	.LVL788
+	.4byte	.LVL790
 	.4byte	0x230c
-	.4byte	0x58fc
+	.4byte	0x5963
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34935,8 +35010,8 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL805
-	.4byte	0x5f01
+	.4byte	.LVL807
+	.4byte	0x5f68
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -34944,8 +35019,8 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF762
+	.uleb128 0x48
+	.4byte	.LASF763
 	.byte	0x2
 	.2byte	0x1b9
 	.4byte	0x50
@@ -34953,28 +35028,28 @@ __func__.9940:
 	.4byte	.LFE256-.LFB256
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5a4e
-	.uleb128 0x4f
+	.4byte	0x5ab5
+	.uleb128 0x52
 	.4byte	.LASF317
 	.byte	0x2
 	.2byte	0x1b9
 	.4byte	0xdba
-	.4byte	.LLST197
-	.uleb128 0x4f
-	.4byte	.LASF740
+	.4byte	.LLST199
+	.uleb128 0x52
+	.4byte	.LASF741
 	.byte	0x2
 	.2byte	0x1b9
 	.4byte	0xdba
-	.4byte	.LLST198
+	.4byte	.LLST200
 	.uleb128 0x28
-	.4byte	.LASF708
+	.4byte	.LASF709
 	.byte	0x2
 	.2byte	0x1bb
-	.4byte	0x493a
+	.4byte	0x49a1
 	.uleb128 0x1
 	.byte	0x5a
 	.uleb128 0x28
-	.4byte	.LASF763
+	.4byte	.LASF764
 	.byte	0x2
 	.2byte	0x1bc
 	.4byte	0xdc5
@@ -34982,14 +35057,14 @@ __func__.9940:
 	.byte	0x58
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x32d2
+	.4byte	0x3339
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9257
 	.uleb128 0x32
-	.4byte	.LVL774
-	.4byte	0x9222
-	.4byte	0x5998
+	.4byte	.LVL776
+	.4byte	0x9289
+	.4byte	0x59ff
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -35010,9 +35085,9 @@ __func__.9940:
 	.2byte	0x1be
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL776
+	.4byte	.LVL778
 	.4byte	0x230c
-	.4byte	0x59ac
+	.4byte	0x5a13
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -35021,9 +35096,9 @@ __func__.9940:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL778
+	.4byte	.LVL780
 	.4byte	0x26b9
-	.4byte	0x59ca
+	.4byte	0x5a31
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -35042,9 +35117,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL780
-	.4byte	0x9222
-	.4byte	0x59ed
+	.4byte	.LVL782
+	.4byte	0x9289
+	.4byte	0x5a54
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -35065,9 +35140,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL781
+	.4byte	.LVL783
 	.4byte	0x2836
-	.4byte	0x5a0e
+	.4byte	0x5a75
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -35086,9 +35161,9 @@ __func__.9940:
 	.byte	0x34
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL782
+	.4byte	.LVL784
 	.4byte	0x2836
-	.4byte	0x5a2a
+	.4byte	0x5a91
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -35102,8 +35177,8 @@ __func__.9940:
 	.byte	0x34
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL783
-	.4byte	0x9222
+	.4byte	.LVL785
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -35124,60 +35199,60 @@ __func__.9940:
 	.2byte	0x1d3
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF764
+	.uleb128 0x49
+	.4byte	.LASF765
 	.byte	0x2
 	.2byte	0x193
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x5acd
-	.uleb128 0x47
-	.4byte	.LASF649
+	.4byte	0x5b34
+	.uleb128 0x4a
+	.4byte	.LASF650
 	.byte	0x2
 	.2byte	0x193
 	.4byte	0xdba
-	.uleb128 0x48
-	.4byte	.LASF765
+	.uleb128 0x4b
+	.4byte	.LASF766
 	.byte	0x2
 	.2byte	0x195
 	.4byte	0xdba
-	.uleb128 0x48
-	.4byte	.LASF766
+	.uleb128 0x4b
+	.4byte	.LASF767
 	.byte	0x2
 	.2byte	0x196
 	.4byte	0xdba
-	.uleb128 0x48
-	.4byte	.LASF767
+	.uleb128 0x4b
+	.4byte	.LASF768
 	.byte	0x2
 	.2byte	0x197
 	.4byte	0xdc5
-	.uleb128 0x48
-	.4byte	.LASF768
+	.uleb128 0x4b
+	.4byte	.LASF769
 	.byte	0x2
 	.2byte	0x199
 	.4byte	0xdba
-	.uleb128 0x48
-	.4byte	.LASF769
+	.uleb128 0x4b
+	.4byte	.LASF770
 	.byte	0x2
 	.2byte	0x19a
 	.4byte	0xdc5
-	.uleb128 0x48
-	.4byte	.LASF652
+	.uleb128 0x4b
+	.4byte	.LASF653
 	.byte	0x2
 	.2byte	0x19b
 	.4byte	0x1cc9
-	.uleb128 0x48
-	.4byte	.LASF770
+	.uleb128 0x4b
+	.4byte	.LASF771
 	.byte	0x2
 	.2byte	0x19b
 	.4byte	0x1cc9
-	.uleb128 0x4b
+	.uleb128 0x4e
 	.4byte	.LASF574
-	.4byte	0x4570
-	.4byte	.LASF764
+	.4byte	0x45d7
+	.4byte	.LASF765
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF771
+	.uleb128 0x48
+	.4byte	.LASF772
 	.byte	0x2
 	.2byte	0x17f
 	.4byte	0x50
@@ -35185,28 +35260,28 @@ __func__.9940:
 	.4byte	.LFE254-.LFB254
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5b18
-	.uleb128 0x4f
+	.4byte	0x5b7f
+	.uleb128 0x52
 	.4byte	.LASF236
 	.byte	0x2
 	.2byte	0x17f
 	.4byte	0xdba
 	.4byte	.LLST67
-	.uleb128 0x51
-	.4byte	.LASF649
+	.uleb128 0x54
+	.4byte	.LASF650
 	.byte	0x2
 	.2byte	0x181
 	.4byte	0xdba
 	.4byte	.LLST68
-	.uleb128 0x51
-	.4byte	.LASF652
+	.uleb128 0x54
+	.4byte	.LASF653
 	.byte	0x2
 	.2byte	0x182
 	.4byte	0x1cc9
 	.4byte	.LLST69
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF772
+	.uleb128 0x48
+	.4byte	.LASF773
 	.byte	0x2
 	.2byte	0x17a
 	.4byte	0x50
@@ -35214,16 +35289,16 @@ __func__.9940:
 	.4byte	.LFE253-.LFB253
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5b59
-	.uleb128 0x4f
-	.4byte	.LASF773
+	.4byte	0x5bc0
+	.uleb128 0x52
+	.4byte	.LASF774
 	.byte	0x2
 	.2byte	0x17a
-	.4byte	0x5b59
+	.4byte	0x5bc0
 	.4byte	.LLST66
 	.uleb128 0x2d
 	.4byte	.LVL186
-	.4byte	0x5b5f
+	.4byte	0x5bc6
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -35241,8 +35316,8 @@ __func__.9940:
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0x1cc9
-	.uleb128 0x45
-	.4byte	.LASF774
+	.uleb128 0x48
+	.4byte	.LASF775
 	.byte	0x2
 	.2byte	0x167
 	.4byte	0x50
@@ -35250,34 +35325,34 @@ __func__.9940:
 	.4byte	.LFE252-.LFB252
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5bca
-	.uleb128 0x4f
-	.4byte	.LASF773
+	.4byte	0x5c31
+	.uleb128 0x52
+	.4byte	.LASF774
 	.byte	0x2
 	.2byte	0x167
-	.4byte	0x5b59
+	.4byte	0x5bc0
 	.4byte	.LLST62
-	.uleb128 0x4f
+	.uleb128 0x52
 	.4byte	.LASF236
 	.byte	0x2
 	.2byte	0x167
 	.4byte	0xdba
 	.4byte	.LLST63
-	.uleb128 0x51
-	.4byte	.LASF649
+	.uleb128 0x54
+	.4byte	.LASF650
 	.byte	0x2
 	.2byte	0x169
 	.4byte	0xdba
 	.4byte	.LLST64
-	.uleb128 0x51
-	.4byte	.LASF652
+	.uleb128 0x54
+	.4byte	.LASF653
 	.byte	0x2
 	.2byte	0x16a
 	.4byte	0x1cc9
 	.4byte	.LLST65
 	.uleb128 0x34
 	.4byte	.LVL178
-	.4byte	0x5bca
+	.4byte	0x5c31
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -35286,8 +35361,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF775
+	.uleb128 0x48
+	.4byte	.LASF776
 	.byte	0x2
 	.2byte	0x14c
 	.4byte	0x50
@@ -35295,41 +35370,41 @@ __func__.9940:
 	.4byte	.LFE251-.LFB251
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5c55
-	.uleb128 0x4f
-	.4byte	.LASF773
+	.4byte	0x5cbc
+	.uleb128 0x52
+	.4byte	.LASF774
 	.byte	0x2
 	.2byte	0x14c
-	.4byte	0x5b59
+	.4byte	0x5bc0
 	.4byte	.LLST59
-	.uleb128 0x4f
-	.4byte	.LASF649
+	.uleb128 0x52
+	.4byte	.LASF650
 	.byte	0x2
 	.2byte	0x14c
 	.4byte	0xdba
 	.4byte	.LLST60
 	.uleb128 0x28
-	.4byte	.LASF652
+	.4byte	.LASF653
 	.byte	0x2
 	.2byte	0x14e
 	.4byte	0x1cc9
 	.uleb128 0x1
 	.byte	0x54
-	.uleb128 0x51
-	.4byte	.LASF776
+	.uleb128 0x54
+	.4byte	.LASF777
 	.byte	0x2
 	.2byte	0x14e
 	.4byte	0x1cc9
 	.4byte	.LLST61
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x5c65
+	.4byte	0x5ccc
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9216
 	.uleb128 0x34
 	.4byte	.LVL168
-	.4byte	0x9222
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -35352,15 +35427,15 @@ __func__.9940:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x5c65
+	.4byte	0x5ccc
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x10
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x5c55
-	.uleb128 0x45
-	.4byte	.LASF777
+	.4byte	0x5cbc
+	.uleb128 0x48
+	.4byte	.LASF778
 	.byte	0x2
 	.2byte	0x11b
 	.4byte	0x50
@@ -35368,47 +35443,47 @@ __func__.9940:
 	.4byte	.LFE250-.LFB250
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5ce3
-	.uleb128 0x4f
-	.4byte	.LASF649
+	.4byte	0x5d4a
+	.uleb128 0x52
+	.4byte	.LASF650
 	.byte	0x2
 	.2byte	0x11b
 	.4byte	0xdba
 	.4byte	.LLST53
-	.uleb128 0x51
-	.4byte	.LASF652
+	.uleb128 0x54
+	.4byte	.LASF653
 	.byte	0x2
 	.2byte	0x11d
 	.4byte	0x1cc9
 	.4byte	.LLST54
-	.uleb128 0x51
-	.4byte	.LASF776
+	.uleb128 0x54
+	.4byte	.LASF777
 	.byte	0x2
 	.2byte	0x11d
 	.4byte	0x1cc9
 	.4byte	.LLST55
 	.uleb128 0x28
-	.4byte	.LASF778
+	.4byte	.LASF779
 	.byte	0x2
 	.2byte	0x11e
 	.4byte	0xdba
 	.uleb128 0x1
 	.byte	0x58
-	.uleb128 0x51
-	.4byte	.LASF779
+	.uleb128 0x54
+	.4byte	.LASF780
 	.byte	0x2
 	.2byte	0x11f
 	.4byte	0xdba
 	.4byte	.LLST56
-	.uleb128 0x51
-	.4byte	.LASF780
+	.uleb128 0x54
+	.4byte	.LASF781
 	.byte	0x2
 	.2byte	0x120
 	.4byte	0xdba
 	.4byte	.LLST57
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF781
+	.4byte	.LASF782
 	.byte	0x2
 	.byte	0xd8
 	.4byte	0x50
@@ -35416,90 +35491,90 @@ __func__.9940:
 	.4byte	.LFE249-.LFB249
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5d75
+	.4byte	0x5ddc
 	.uleb128 0x2c
-	.4byte	.LASF649
+	.4byte	.LASF650
 	.byte	0x2
 	.byte	0xd8
 	.4byte	0xdba
 	.4byte	.LLST44
 	.uleb128 0x30
-	.4byte	.LASF652
+	.4byte	.LASF653
 	.byte	0x2
 	.byte	0xda
 	.4byte	0x1cc9
 	.4byte	.LLST45
 	.uleb128 0x30
-	.4byte	.LASF776
+	.4byte	.LASF777
 	.byte	0x2
 	.byte	0xda
 	.4byte	0x1cc9
 	.4byte	.LLST46
 	.uleb128 0x30
-	.4byte	.LASF782
+	.4byte	.LASF783
 	.byte	0x2
 	.byte	0xdb
 	.4byte	0xdba
 	.4byte	.LLST47
 	.uleb128 0x30
-	.4byte	.LASF783
+	.4byte	.LASF784
 	.byte	0x2
 	.byte	0xdc
 	.4byte	0xdba
 	.4byte	.LLST48
 	.uleb128 0x30
-	.4byte	.LASF767
+	.4byte	.LASF768
 	.byte	0x2
 	.byte	0xdd
 	.4byte	0xdc5
 	.4byte	.LLST49
 	.uleb128 0x30
-	.4byte	.LASF784
+	.4byte	.LASF785
 	.byte	0x2
 	.byte	0xde
 	.4byte	0xdc5
 	.4byte	.LLST50
 	.uleb128 0x30
-	.4byte	.LASF780
+	.4byte	.LASF781
 	.byte	0x2
 	.byte	0xdf
 	.4byte	0xdba
 	.4byte	.LLST51
 	.byte	0
-	.uleb128 0x64
-	.4byte	.LASF785
+	.uleb128 0x66
+	.4byte	.LASF786
 	.byte	0x2
 	.byte	0xb9
 	.byte	0x1
-	.4byte	0x5d9a
+	.4byte	0x5e01
 	.uleb128 0x36
-	.4byte	.LASF649
+	.4byte	.LASF650
 	.byte	0x2
 	.byte	0xb9
 	.4byte	0xdba
-	.uleb128 0x4b
+	.uleb128 0x4e
 	.4byte	.LASF574
-	.4byte	0x5c65
-	.4byte	.LASF785
-	.byte	0
-	.uleb128 0x64
+	.4byte	0x5ccc
 	.4byte	.LASF786
+	.byte	0
+	.uleb128 0x66
+	.4byte	.LASF787
 	.byte	0x2
 	.byte	0xb2
 	.byte	0x1
-	.4byte	0x5dbf
+	.4byte	0x5e26
 	.uleb128 0x36
-	.4byte	.LASF649
+	.4byte	.LASF650
 	.byte	0x2
 	.byte	0xb2
 	.4byte	0xdba
-	.uleb128 0x4b
+	.uleb128 0x4e
 	.4byte	.LASF574
-	.4byte	0x5c65
-	.4byte	.LASF786
+	.4byte	0x5ccc
+	.4byte	.LASF787
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF787
+	.4byte	.LASF788
 	.byte	0x2
 	.byte	0xa4
 	.4byte	0xdba
@@ -35507,28 +35582,28 @@ __func__.9940:
 	.4byte	.LFE246-.LFB246
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5e12
+	.4byte	0x5e79
 	.uleb128 0x3b
 	.ascii	"tmp\000"
 	.byte	0x2
 	.byte	0xa6
 	.4byte	0xdba
 	.4byte	.LLST42
-	.uleb128 0x5f
-	.4byte	.LBB174
-	.4byte	.LBE174-.LBB174
-	.4byte	0x5e02
+	.uleb128 0x61
+	.4byte	.LBB176
+	.4byte	.LBE176-.LBB176
+	.4byte	0x5e69
 	.uleb128 0x3b
 	.ascii	"Q\000"
 	.byte	0x2
 	.byte	0xa9
-	.4byte	0x5e12
+	.4byte	0x5e79
 	.4byte	.LLST43
 	.byte	0
-	.uleb128 0x65
-	.4byte	0x5fac
-	.4byte	.LBB172
-	.4byte	.LBE172-.LBB172
+	.uleb128 0x67
+	.4byte	0x6013
+	.4byte	.LBB174
+	.4byte	.LBE174-.LBB174
 	.byte	0x2
 	.byte	0xa8
 	.byte	0
@@ -35536,7 +35611,7 @@ __func__.9940:
 	.byte	0x4
 	.4byte	0x1595
 	.uleb128 0x2b
-	.4byte	.LASF788
+	.4byte	.LASF789
 	.byte	0x2
 	.byte	0x92
 	.4byte	0x50
@@ -35544,7 +35619,7 @@ __func__.9940:
 	.4byte	.LFE245-.LFB245
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5e7c
+	.4byte	0x5ee3
 	.uleb128 0x2f
 	.ascii	"blk\000"
 	.byte	0x2
@@ -35567,27 +35642,27 @@ __func__.9940:
 	.ascii	"Q\000"
 	.byte	0x2
 	.byte	0x96
-	.4byte	0x5e12
+	.4byte	0x5e79
 	.uleb128 0x6
 	.byte	0x3
 	.4byte	gSysFreeQueue
 	.byte	0x9f
-	.uleb128 0x66
-	.4byte	0x5fa0
-	.4byte	.LBB168
+	.uleb128 0x68
+	.4byte	0x6007
+	.4byte	.LBB170
 	.4byte	.Ldebug_ranges0+0x18
 	.byte	0x2
 	.byte	0x98
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF789
+	.4byte	.LASF790
 	.byte	0x2
 	.byte	0x73
 	.4byte	.LFB244
 	.4byte	.LFE244-.LFB244
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5f01
+	.4byte	0x5f68
 	.uleb128 0x3b
 	.ascii	"i\000"
 	.byte	0x2
@@ -35607,19 +35682,19 @@ __func__.9940:
 	.4byte	0xdba
 	.4byte	.LLST35
 	.uleb128 0x30
-	.4byte	.LASF599
+	.4byte	.LASF602
 	.byte	0x2
 	.byte	0x76
 	.4byte	0xdba
 	.4byte	.LLST36
 	.uleb128 0x30
-	.4byte	.LASF790
+	.4byte	.LASF791
 	.byte	0x2
 	.byte	0x77
 	.4byte	0xdba
 	.4byte	.LLST37
 	.uleb128 0x30
-	.4byte	.LASF791
+	.4byte	.LASF792
 	.byte	0x2
 	.byte	0x78
 	.4byte	0xdc5
@@ -35628,59 +35703,59 @@ __func__.9940:
 	.ascii	"Q\000"
 	.byte	0x2
 	.byte	0x79
-	.4byte	0x5e12
+	.4byte	0x5e79
 	.uleb128 0x6
 	.byte	0x3
 	.4byte	gSysFreeQueue
 	.byte	0x9f
 	.uleb128 0x44
 	.4byte	.LVL85
-	.4byte	0x6122
+	.4byte	0x6189
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF792
+	.4byte	.LASF793
 	.byte	0x2
 	.byte	0x61
 	.4byte	.LFB243
 	.4byte	.LFE243-.LFB243
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5fa0
+	.4byte	0x6007
 	.uleb128 0x2f
 	.ascii	"blk\000"
 	.byte	0x2
 	.byte	0x61
 	.4byte	0xdba
-	.4byte	.LLST175
+	.4byte	.LLST177
 	.uleb128 0x2c
-	.4byte	.LASF793
+	.4byte	.LASF794
 	.byte	0x2
 	.byte	0x61
 	.4byte	0xdba
-	.4byte	.LLST176
-	.uleb128 0x5f
-	.4byte	.LBB223
-	.4byte	.LBE223-.LBB223
-	.4byte	0x5f90
+	.4byte	.LLST178
+	.uleb128 0x61
+	.4byte	.LBB227
+	.4byte	.LBE227-.LBB227
+	.4byte	0x5ff7
 	.uleb128 0x3b
 	.ascii	"Q\000"
 	.byte	0x2
 	.byte	0x64
-	.4byte	0x5e12
-	.4byte	.LLST177
-	.uleb128 0x67
-	.4byte	.LBB224
-	.4byte	.LBE224-.LBB224
+	.4byte	0x5e79
+	.4byte	.LLST179
+	.uleb128 0x69
+	.4byte	.LBB228
+	.4byte	.LBE228-.LBB228
 	.uleb128 0x30
-	.4byte	.LASF794
+	.4byte	.LASF795
 	.byte	0x2
 	.byte	0x66
 	.4byte	0xdba
-	.4byte	.LLST178
+	.4byte	.LLST180
 	.uleb128 0x32
-	.4byte	.LVL635
-	.4byte	0x6122
-	.4byte	0x5f7a
+	.4byte	.LVL637
+	.4byte	0x6189
+	.4byte	0x5fe1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -35689,7 +35764,7 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL637
+	.4byte	.LVL639
 	.4byte	0x2464
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -35704,27 +35779,27 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x65
-	.4byte	0x5fa0
-	.4byte	.LBB221
-	.4byte	.LBE221-.LBB221
+	.uleb128 0x67
+	.4byte	0x6007
+	.4byte	.LBB225
+	.4byte	.LBE225-.LBB225
 	.byte	0x2
 	.byte	0x63
 	.byte	0
-	.uleb128 0x68
-	.4byte	.LASF795
+	.uleb128 0x6a
+	.4byte	.LASF796
 	.byte	0x2
 	.byte	0x5c
 	.4byte	0xdba
 	.byte	0x1
-	.uleb128 0x68
-	.4byte	.LASF796
+	.uleb128 0x6a
+	.4byte	.LASF797
 	.byte	0x2
 	.byte	0x57
 	.4byte	0xdba
 	.byte	0x1
 	.uleb128 0x2b
-	.4byte	.LASF797
+	.4byte	.LASF798
 	.byte	0x2
 	.byte	0x4b
 	.4byte	0xdba
@@ -35732,24 +35807,24 @@ __func__.9940:
 	.4byte	.LFE240-.LFB240
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6011
+	.4byte	0x6078
 	.uleb128 0x2f
 	.ascii	"max\000"
 	.byte	0x2
 	.byte	0x4b
 	.4byte	0xdba
-	.4byte	.LLST196
+	.4byte	.LLST198
 	.uleb128 0x3a
 	.ascii	"Q\000"
 	.byte	0x2
 	.byte	0x4d
-	.4byte	0x5e12
+	.4byte	0x5e79
 	.uleb128 0x6
 	.byte	0x3
 	.4byte	gSysFreeQueue
 	.byte	0x9f
 	.uleb128 0x34
-	.4byte	.LVL770
+	.4byte	.LVL772
 	.4byte	0x230c
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -35772,7 +35847,7 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF798
+	.4byte	.LASF799
 	.byte	0x2
 	.byte	0x2e
 	.4byte	0x50
@@ -35780,19 +35855,19 @@ __func__.9940:
 	.4byte	.LFE239-.LFB239
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x60dd
+	.4byte	0x6144
 	.uleb128 0x2c
 	.4byte	.LASF388
 	.byte	0x2
 	.byte	0x2e
 	.4byte	0xdc5
-	.4byte	.LLST157
+	.4byte	.LLST159
 	.uleb128 0x2c
 	.4byte	.LASF568
 	.byte	0x2
 	.byte	0x2e
 	.4byte	0x50
-	.4byte	.LLST158
+	.4byte	.LLST160
 	.uleb128 0x3a
 	.ascii	"req\000"
 	.byte	0x2
@@ -35806,9 +35881,9 @@ __func__.9940:
 	.byte	0x2
 	.byte	0x31
 	.4byte	0xddb
-	.4byte	.LLST159
+	.4byte	.LLST161
 	.uleb128 0x29
-	.4byte	.LASF799
+	.4byte	.LASF800
 	.byte	0x2
 	.byte	0x31
 	.4byte	0xddb
@@ -35819,9 +35894,9 @@ __func__.9940:
 	.byte	0x2
 	.byte	0x31
 	.4byte	0xddb
-	.4byte	.LLST160
+	.4byte	.LLST162
 	.uleb128 0x29
-	.4byte	.LASF800
+	.4byte	.LASF801
 	.byte	0x2
 	.byte	0x32
 	.4byte	0x2454
@@ -35829,15 +35904,15 @@ __func__.9940:
 	.byte	0x91
 	.sleb128 -88
 	.uleb128 0x30
-	.4byte	.LASF801
+	.4byte	.LASF802
 	.byte	0x2
 	.byte	0x33
 	.4byte	0xdba
-	.4byte	.LLST161
+	.4byte	.LLST163
 	.uleb128 0x32
-	.4byte	.LVL591
+	.4byte	.LVL593
 	.4byte	0x26b9
-	.4byte	0x60c0
+	.4byte	0x6127
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -35857,7 +35932,7 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL596
+	.4byte	.LVL598
 	.4byte	0x26b9
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -35879,7 +35954,7 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF802
+	.4byte	.LASF803
 	.byte	0x2
 	.byte	0x1e
 	.4byte	0xdc5
@@ -35887,15 +35962,15 @@ __func__.9940:
 	.4byte	.LFE238-.LFB238
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6122
+	.4byte	0x6189
 	.uleb128 0x2c
-	.4byte	.LASF803
+	.4byte	.LASF804
 	.byte	0x2
 	.byte	0x1e
 	.4byte	0xdc5
 	.4byte	.LLST31
-	.uleb128 0x58
-	.4byte	.LASF804
+	.uleb128 0x5b
+	.4byte	.LASF805
 	.byte	0x2
 	.byte	0x1e
 	.4byte	0xdc5
@@ -35909,7 +35984,7 @@ __func__.9940:
 	.4byte	.LLST32
 	.byte	0
 	.uleb128 0x39
-	.4byte	.LASF805
+	.4byte	.LASF806
 	.byte	0x2
 	.byte	0x14
 	.4byte	0xdba
@@ -35917,22 +35992,22 @@ __func__.9940:
 	.4byte	.LFE237-.LFB237
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x615a
+	.4byte	0x61c1
 	.uleb128 0x2c
-	.4byte	.LASF594
+	.4byte	.LASF597
 	.byte	0x2
 	.byte	0x14
 	.4byte	0xdba
 	.4byte	.LLST29
 	.uleb128 0x30
-	.4byte	.LASF717
+	.4byte	.LASF718
 	.byte	0x2
 	.byte	0x16
 	.4byte	0xdba
 	.4byte	.LLST30
 	.byte	0
 	.uleb128 0x39
-	.4byte	.LASF806
+	.4byte	.LASF807
 	.byte	0x2
 	.byte	0xc
 	.4byte	0xdba
@@ -35940,22 +36015,22 @@ __func__.9940:
 	.4byte	.LFE236-.LFB236
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6192
+	.4byte	0x61f9
 	.uleb128 0x2c
-	.4byte	.LASF594
+	.4byte	.LASF597
 	.byte	0x2
 	.byte	0xc
 	.4byte	0xdba
 	.4byte	.LLST27
 	.uleb128 0x30
-	.4byte	.LASF592
+	.4byte	.LASF595
 	.byte	0x2
 	.byte	0xe
 	.4byte	0xdba
 	.4byte	.LLST28
 	.byte	0
 	.uleb128 0x39
-	.4byte	.LASF807
+	.4byte	.LASF808
 	.byte	0x2
 	.byte	0x4
 	.4byte	0xdba
@@ -35963,28 +36038,28 @@ __func__.9940:
 	.4byte	.LFE235-.LFB235
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x61d9
+	.4byte	0x6240
 	.uleb128 0x2c
-	.4byte	.LASF592
+	.4byte	.LASF595
 	.byte	0x2
 	.byte	0x4
 	.4byte	0xdba
 	.4byte	.LLST24
 	.uleb128 0x2c
-	.4byte	.LASF717
+	.4byte	.LASF718
 	.byte	0x2
 	.byte	0x4
 	.4byte	0xdba
 	.4byte	.LLST25
 	.uleb128 0x30
-	.4byte	.LASF608
+	.4byte	.LASF587
 	.byte	0x2
 	.byte	0x6
 	.4byte	0xdba
 	.4byte	.LLST26
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF808
+	.uleb128 0x48
+	.4byte	.LASF809
 	.byte	0x4
 	.2byte	0x13c
 	.4byte	0xdd0
@@ -35992,45 +36067,45 @@ __func__.9940:
 	.4byte	.LFE234-.LFB234
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x63c0
-	.uleb128 0x50
+	.4byte	0x6427
+	.uleb128 0x53
 	.ascii	"die\000"
 	.byte	0x4
 	.2byte	0x13e
 	.4byte	0xdc5
-	.4byte	.LLST346
-	.uleb128 0x50
+	.4byte	.LLST348
+	.uleb128 0x53
 	.ascii	"blk\000"
 	.byte	0x4
 	.2byte	0x13f
 	.4byte	0xdba
-	.4byte	.LLST347
-	.uleb128 0x51
+	.4byte	.LLST349
+	.uleb128 0x54
 	.4byte	.LASF577
 	.byte	0x4
 	.2byte	0x140
 	.4byte	0xdc5
-	.4byte	.LLST348
-	.uleb128 0x51
-	.4byte	.LASF809
+	.4byte	.LLST350
+	.uleb128 0x54
+	.4byte	.LASF810
 	.byte	0x4
 	.2byte	0x142
-	.4byte	0x63c0
-	.4byte	.LLST349
-	.uleb128 0x4a
-	.4byte	.LASF810
+	.4byte	0x6427
+	.4byte	.LLST351
+	.uleb128 0x4d
+	.4byte	.LASF811
 	.byte	0x4
 	.2byte	0x158
 	.uleb128 0x44
-	.4byte	.LVL1460
-	.4byte	0x65bc
+	.4byte	.LVL1462
+	.4byte	0x6623
 	.uleb128 0x44
-	.4byte	.LVL1461
-	.4byte	0x63c6
+	.4byte	.LVL1463
+	.4byte	0x642d
 	.uleb128 0x32
-	.4byte	.LVL1465
-	.4byte	0x67c5
-	.4byte	0x6261
+	.4byte	.LVL1467
+	.4byte	0x682c
+	.4byte	0x62c8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36039,9 +36114,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1466
+	.4byte	.LVL1468
 	.4byte	0x2410
-	.4byte	0x6275
+	.4byte	0x62dc
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36050,9 +36125,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1467
-	.4byte	0x6828
-	.4byte	0x6289
+	.4byte	.LVL1469
+	.4byte	0x688f
+	.4byte	0x62f0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36061,9 +36136,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1473
+	.4byte	.LVL1475
 	.4byte	0x26b9
-	.4byte	0x62a7
+	.4byte	0x630e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36082,12 +36157,12 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1474
+	.4byte	.LVL1476
 	.4byte	0x22a6
 	.uleb128 0x32
-	.4byte	.LVL1476
-	.4byte	0x6828
-	.4byte	0x62c4
+	.4byte	.LVL1478
+	.4byte	0x688f
+	.4byte	0x632b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36096,9 +36171,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1478
+	.4byte	.LVL1480
 	.4byte	0x236c
-	.4byte	0x62d8
+	.4byte	0x633f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -36107,15 +36182,15 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1479
-	.4byte	0x6739
-	.uleb128 0x44
 	.4byte	.LVL1481
-	.4byte	0x67c5
+	.4byte	0x67a0
+	.uleb128 0x44
+	.4byte	.LVL1483
+	.4byte	0x682c
 	.uleb128 0x32
-	.4byte	.LVL1482
+	.4byte	.LVL1484
 	.4byte	0x230c
-	.4byte	0x6302
+	.4byte	0x6369
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -36128,9 +36203,9 @@ __func__.9940:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1483
+	.4byte	.LVL1485
 	.4byte	0x230c
-	.4byte	0x631c
+	.4byte	0x6383
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -36144,12 +36219,12 @@ __func__.9940:
 	.2byte	0x1000
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1485
+	.4byte	.LVL1487
 	.4byte	0x22a6
 	.uleb128 0x32
-	.4byte	.LVL1486
+	.4byte	.LVL1488
 	.4byte	0x2464
-	.4byte	0x6343
+	.4byte	0x63aa
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36168,9 +36243,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1487
+	.4byte	.LVL1489
 	.4byte	0x251a
-	.4byte	0x6366
+	.4byte	0x63cd
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36194,9 +36269,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1488
-	.4byte	0x6828
-	.4byte	0x637a
+	.4byte	.LVL1490
+	.4byte	0x688f
+	.4byte	0x63e1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36205,12 +36280,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1493
-	.4byte	0x6828
+	.4byte	.LVL1495
+	.4byte	0x688f
 	.uleb128 0x32
-	.4byte	.LVL1496
+	.4byte	.LVL1498
 	.4byte	0x2464
-	.4byte	0x639b
+	.4byte	0x6402
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -36223,23 +36298,23 @@ __func__.9940:
 	.byte	0x32
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1497
-	.4byte	0x6828
-	.uleb128 0x44
-	.4byte	.LVL1498
-	.4byte	0x6828
-	.uleb128 0x44
 	.4byte	.LVL1499
-	.4byte	0x65f0
+	.4byte	0x688f
+	.uleb128 0x44
+	.4byte	.LVL1500
+	.4byte	0x688f
 	.uleb128 0x44
 	.4byte	.LVL1501
-	.4byte	0x65f0
+	.4byte	0x6657
+	.uleb128 0x44
+	.4byte	.LVL1503
+	.4byte	0x6657
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0x11b9
-	.uleb128 0x45
-	.4byte	.LASF811
+	.uleb128 0x48
+	.4byte	.LASF812
 	.byte	0x4
 	.2byte	0x116
 	.4byte	0x50
@@ -36247,35 +36322,35 @@ __func__.9940:
 	.4byte	.LFE233-.LFB233
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6437
-	.uleb128 0x5e
+	.4byte	0x649e
+	.uleb128 0x60
 	.ascii	"die\000"
 	.byte	0x4
 	.2byte	0x118
 	.4byte	0xdc5
 	.uleb128 0x1
 	.byte	0x56
-	.uleb128 0x50
+	.uleb128 0x53
 	.ascii	"blk\000"
 	.byte	0x4
 	.2byte	0x119
 	.4byte	0xdba
-	.4byte	.LLST155
-	.uleb128 0x51
-	.4byte	.LASF812
+	.4byte	.LLST157
+	.uleb128 0x54
+	.4byte	.LASF813
 	.byte	0x4
 	.2byte	0x11a
 	.4byte	0xdc5
-	.4byte	.LLST156
+	.4byte	.LLST158
 	.uleb128 0x28
-	.4byte	.LASF809
+	.4byte	.LASF810
 	.byte	0x4
 	.2byte	0x11b
-	.4byte	0x63c0
+	.4byte	0x6427
 	.uleb128 0x1
 	.byte	0x58
 	.uleb128 0x34
-	.4byte	.LVL580
+	.4byte	.LVL582
 	.4byte	0x26b9
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -36296,7 +36371,7 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF813
+	.4byte	.LASF814
 	.byte	0x4
 	.byte	0xac
 	.4byte	0x50
@@ -36304,44 +36379,44 @@ __func__.9940:
 	.4byte	.LFE232-.LFB232
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6566
+	.4byte	0x65cd
 	.uleb128 0x3b
 	.ascii	"i\000"
 	.byte	0x4
 	.byte	0xae
 	.4byte	0xdc5
-	.4byte	.LLST342
+	.4byte	.LLST344
 	.uleb128 0x3b
 	.ascii	"blk\000"
 	.byte	0x4
 	.byte	0xaf
 	.4byte	0xdba
-	.4byte	.LLST343
+	.4byte	.LLST345
 	.uleb128 0x30
-	.4byte	.LASF705
+	.4byte	.LASF706
 	.byte	0x4
 	.byte	0xb0
 	.4byte	0xddb
-	.4byte	.LLST344
+	.4byte	.LLST346
 	.uleb128 0x30
-	.4byte	.LASF809
+	.4byte	.LASF810
 	.byte	0x4
 	.byte	0xb1
-	.4byte	0x63c0
-	.4byte	.LLST345
+	.4byte	0x6427
+	.4byte	.LLST347
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x6576
+	.4byte	0x65dd
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9058
 	.uleb128 0x44
-	.4byte	.LVL1435
-	.4byte	0x65bc
-	.uleb128 0x32
 	.4byte	.LVL1437
+	.4byte	0x6623
+	.uleb128 0x32
+	.4byte	.LVL1439
 	.4byte	0x26b9
-	.4byte	0x64c0
+	.4byte	0x6527
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36360,9 +36435,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1438
+	.4byte	.LVL1440
 	.4byte	0x26b9
-	.4byte	0x64de
+	.4byte	0x6545
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36381,9 +36456,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1440
+	.4byte	.LVL1442
 	.4byte	0x26b9
-	.4byte	0x64fc
+	.4byte	0x6563
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36402,9 +36477,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1441
-	.4byte	0x6011
-	.4byte	0x650f
+	.4byte	.LVL1443
+	.4byte	0x6078
+	.4byte	0x6576
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -36412,9 +36487,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1443
-	.4byte	0x9222
-	.4byte	0x6535
+	.4byte	.LVL1445
+	.4byte	0x9289
+	.4byte	0x659c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36435,12 +36510,12 @@ __func__.9940:
 	.byte	0xfe
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1444
-	.4byte	0x7a7c
+	.4byte	.LVL1446
+	.4byte	0x7ae3
 	.uleb128 0x32
-	.4byte	.LVL1452
+	.4byte	.LVL1454
 	.4byte	0x26b9
-	.4byte	0x655c
+	.4byte	0x65c3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36459,20 +36534,20 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1457
+	.4byte	.LVL1459
 	.4byte	0x22a6
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x6576
+	.4byte	0x65dd
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0xa
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x6566
+	.4byte	0x65cd
 	.uleb128 0x2b
-	.4byte	.LASF814
+	.4byte	.LASF815
 	.byte	0x4
 	.byte	0x9c
 	.4byte	0xdba
@@ -36480,7 +36555,7 @@ __func__.9940:
 	.4byte	.LFE231-.LFB231
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x65bc
+	.4byte	0x6623
 	.uleb128 0x3b
 	.ascii	"blk\000"
 	.byte	0x4
@@ -36488,26 +36563,26 @@ __func__.9940:
 	.4byte	0xdba
 	.4byte	.LLST22
 	.uleb128 0x30
-	.4byte	.LASF815
+	.4byte	.LASF816
 	.byte	0x4
 	.byte	0x9f
 	.4byte	0xdba
 	.4byte	.LLST23
 	.uleb128 0x44
 	.4byte	.LVL59
-	.4byte	0x67c5
+	.4byte	0x682c
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF816
+	.4byte	.LASF817
 	.byte	0x4
 	.byte	0x94
 	.4byte	.LFB230
 	.4byte	.LFE230-.LFB230
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x65f0
+	.4byte	0x6657
 	.uleb128 0x2d
-	.4byte	.LVL767
+	.4byte	.LVL769
 	.4byte	0x230c
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -36529,7 +36604,7 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF817
+	.4byte	.LASF818
 	.byte	0x4
 	.byte	0x4f
 	.4byte	0x50
@@ -36537,42 +36612,42 @@ __func__.9940:
 	.4byte	.LFE229-.LFB229
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6739
+	.4byte	0x67a0
 	.uleb128 0x3b
 	.ascii	"i\000"
 	.byte	0x4
 	.byte	0x51
 	.4byte	0x50
-	.4byte	.LLST288
+	.4byte	.LLST290
 	.uleb128 0x30
-	.4byte	.LASF818
+	.4byte	.LASF819
 	.byte	0x4
 	.byte	0x52
 	.4byte	0x50
-	.4byte	.LLST289
+	.4byte	.LLST291
 	.uleb128 0x30
-	.4byte	.LASF809
+	.4byte	.LASF810
 	.byte	0x4
 	.byte	0x53
-	.4byte	0x63c0
-	.4byte	.LLST290
+	.4byte	0x6427
+	.4byte	.LLST292
 	.uleb128 0x30
-	.4byte	.LASF721
+	.4byte	.LASF722
 	.byte	0x4
 	.byte	0x54
 	.4byte	0xdba
-	.4byte	.LLST291
-	.uleb128 0x54
-	.4byte	.LASF819
+	.4byte	.LLST293
+	.uleb128 0x57
+	.4byte	.LASF820
 	.byte	0x4
 	.byte	0x67
-	.uleb128 0x69
+	.uleb128 0x6b
 	.4byte	.LASF574
 	.4byte	0x26b4
 	.uleb128 0x32
-	.4byte	.LVL1162
+	.4byte	.LVL1164
 	.4byte	0x230c
-	.4byte	0x6667
+	.4byte	0x66ce
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -36581,9 +36656,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1165
+	.4byte	.LVL1167
 	.4byte	0x230c
-	.4byte	0x6686
+	.4byte	0x66ed
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36603,9 +36678,9 @@ __func__.9940:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1167
-	.4byte	0x9222
-	.4byte	0x669d
+	.4byte	.LVL1169
+	.4byte	0x9289
+	.4byte	0x6704
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36614,9 +36689,9 @@ __func__.9940:
 	.4byte	.LC94
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1168
+	.4byte	.LVL1170
 	.4byte	0x251a
-	.4byte	0x66c0
+	.4byte	0x6727
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36640,9 +36715,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1169
+	.4byte	.LVL1171
 	.4byte	0x2464
-	.4byte	0x66d8
+	.4byte	0x673f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -36655,9 +36730,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1170
+	.4byte	.LVL1172
 	.4byte	0x251a
-	.4byte	0x66fb
+	.4byte	0x6762
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36681,9 +36756,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1172
-	.4byte	0x9222
-	.4byte	0x6712
+	.4byte	.LVL1174
+	.4byte	0x9289
+	.4byte	0x6779
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36692,9 +36767,9 @@ __func__.9940:
 	.4byte	.LC95
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1173
-	.4byte	0x9222
-	.4byte	0x672f
+	.4byte	.LVL1175
+	.4byte	0x9289
+	.4byte	0x6796
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36709,30 +36784,30 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1176
+	.4byte	.LVL1178
 	.4byte	0x22a6
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF820
+	.4byte	.LASF821
 	.byte	0x4
 	.byte	0x41
 	.4byte	.LFB228
 	.4byte	.LFE228-.LFB228
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x67bd
+	.4byte	0x6824
 	.uleb128 0x2c
-	.4byte	.LASF753
+	.4byte	.LASF754
 	.byte	0x4
 	.byte	0x41
 	.4byte	0x10e9
-	.4byte	.LLST194
+	.4byte	.LLST196
 	.uleb128 0x2c
-	.4byte	.LASF821
+	.4byte	.LASF822
 	.byte	0x4
 	.byte	0x41
 	.4byte	0xff2
-	.4byte	.LLST195
+	.4byte	.LLST197
 	.uleb128 0x31
 	.ascii	"i\000"
 	.byte	0x4
@@ -36740,14 +36815,14 @@ __func__.9940:
 	.4byte	0xdc5
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x3b93
+	.4byte	0x3bfa
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9015
 	.uleb128 0x32
-	.4byte	.LVL764
+	.4byte	.LVL766
 	.4byte	0x230c
-	.4byte	0x679d
+	.4byte	0x6804
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36761,8 +36836,8 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL765
-	.4byte	0x9222
+	.4byte	.LVL767
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36783,13 +36858,13 @@ __func__.9940:
 	.byte	0x4a
 	.byte	0
 	.byte	0
-	.uleb128 0x6a
-	.4byte	.LASF822
+	.uleb128 0x6c
+	.4byte	.LASF823
 	.byte	0x4
 	.byte	0x26
 	.byte	0x1
 	.uleb128 0x39
-	.4byte	.LASF823
+	.4byte	.LASF824
 	.byte	0x4
 	.byte	0x17
 	.4byte	0x50
@@ -36797,7 +36872,7 @@ __func__.9940:
 	.4byte	.LFE226-.LFB226
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6828
+	.4byte	0x688f
 	.uleb128 0x2c
 	.4byte	.LASF388
 	.byte	0x4
@@ -36817,7 +36892,7 @@ __func__.9940:
 	.4byte	0xdc5
 	.4byte	.LLST19
 	.uleb128 0x30
-	.4byte	.LASF821
+	.4byte	.LASF822
 	.byte	0x4
 	.byte	0x1b
 	.4byte	0xff2
@@ -36830,7 +36905,7 @@ __func__.9940:
 	.4byte	.LLST21
 	.byte	0
 	.uleb128 0x39
-	.4byte	.LASF824
+	.4byte	.LASF825
 	.byte	0x4
 	.byte	0x4
 	.4byte	0x50
@@ -36838,7 +36913,7 @@ __func__.9940:
 	.4byte	.LFE225-.LFB225
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x689d
+	.4byte	0x6904
 	.uleb128 0x2c
 	.4byte	.LASF388
 	.byte	0x4
@@ -36852,7 +36927,7 @@ __func__.9940:
 	.4byte	0xdc5
 	.4byte	.LLST14
 	.uleb128 0x30
-	.4byte	.LASF821
+	.4byte	.LASF822
 	.byte	0x4
 	.byte	0x7
 	.4byte	0xff2
@@ -36865,7 +36940,7 @@ __func__.9940:
 	.4byte	.LLST16
 	.uleb128 0x34
 	.4byte	.LVL45
-	.4byte	0x9222
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36886,8 +36961,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
-	.4byte	.LASF884
+	.uleb128 0x6d
+	.4byte	.LASF887
 	.byte	0x3
 	.2byte	0x4bd
 	.4byte	0xdc5
@@ -36895,8 +36970,8 @@ __func__.9940:
 	.4byte	.LFE224-.LFB224
 	.uleb128 0x1
 	.byte	0x9c
-	.uleb128 0x45
-	.4byte	.LASF825
+	.uleb128 0x48
+	.4byte	.LASF826
 	.byte	0x3
 	.2byte	0x4b8
 	.4byte	0x50
@@ -36904,28 +36979,28 @@ __func__.9940:
 	.4byte	.LFE223-.LFB223
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6922
-	.uleb128 0x4f
+	.4byte	0x6989
+	.uleb128 0x52
 	.4byte	.LASF236
 	.byte	0x3
 	.2byte	0x4b8
 	.4byte	0xb5
-	.4byte	.LLST443
-	.uleb128 0x4f
+	.4byte	.LLST445
+	.uleb128 0x52
 	.4byte	.LASF325
 	.byte	0x3
 	.2byte	0x4b8
 	.4byte	0xb5
-	.4byte	.LLST444
-	.uleb128 0x5a
+	.4byte	.LLST446
+	.uleb128 0x5d
 	.ascii	"buf\000"
 	.byte	0x3
 	.2byte	0x4b8
-	.4byte	0x6922
-	.4byte	.LLST445
+	.4byte	0x6989
+	.4byte	.LLST447
 	.uleb128 0x2d
-	.4byte	.LVL1969
-	.4byte	0x6a9b
+	.4byte	.LVL1971
+	.4byte	0x6b02
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36957,8 +37032,8 @@ __func__.9940:
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0x90
-	.uleb128 0x45
-	.4byte	.LASF826
+	.uleb128 0x48
+	.4byte	.LASF827
 	.byte	0x3
 	.2byte	0x4b3
 	.4byte	0x50
@@ -36966,28 +37041,28 @@ __func__.9940:
 	.4byte	.LFE222-.LFB222
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6997
-	.uleb128 0x4f
+	.4byte	0x69fe
+	.uleb128 0x52
 	.4byte	.LASF236
 	.byte	0x3
 	.2byte	0x4b3
 	.4byte	0xb5
-	.4byte	.LLST425
-	.uleb128 0x4f
+	.4byte	.LLST427
+	.uleb128 0x52
 	.4byte	.LASF325
 	.byte	0x3
 	.2byte	0x4b3
 	.4byte	0xb5
-	.4byte	.LLST426
-	.uleb128 0x5a
+	.4byte	.LLST428
+	.uleb128 0x5d
 	.ascii	"buf\000"
 	.byte	0x3
 	.2byte	0x4b3
-	.4byte	0x6922
-	.4byte	.LLST427
+	.4byte	0x6989
+	.4byte	.LLST429
 	.uleb128 0x2d
-	.4byte	.LVL1868
-	.4byte	0x70a1
+	.4byte	.LVL1870
+	.4byte	0x7108
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37016,8 +37091,8 @@ __func__.9940:
 	.byte	0x52
 	.byte	0
 	.byte	0
-	.uleb128 0x59
-	.4byte	.LASF827
+	.uleb128 0x5c
+	.4byte	.LASF828
 	.byte	0x3
 	.2byte	0x484
 	.4byte	0x50
@@ -37025,39 +37100,39 @@ __func__.9940:
 	.4byte	.LFE221-.LFB221
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6a9b
-	.uleb128 0x4f
-	.4byte	.LASF731
+	.4byte	0x6b02
+	.uleb128 0x52
+	.4byte	.LASF732
 	.byte	0x3
 	.2byte	0x484
 	.4byte	0xdc5
-	.4byte	.LLST383
-	.uleb128 0x4f
-	.4byte	.LASF732
+	.4byte	.LLST385
+	.uleb128 0x52
+	.4byte	.LASF733
 	.byte	0x3
 	.2byte	0x484
 	.4byte	0xdc5
-	.4byte	.LLST384
-	.uleb128 0x51
-	.4byte	.LASF734
+	.4byte	.LLST386
+	.uleb128 0x54
+	.4byte	.LASF735
 	.byte	0x3
 	.2byte	0x486
 	.4byte	0xdba
-	.4byte	.LLST385
-	.uleb128 0x50
+	.4byte	.LLST387
+	.uleb128 0x53
 	.ascii	"tmp\000"
 	.byte	0x3
 	.2byte	0x487
 	.4byte	0xdba
-	.4byte	.LLST386
-	.uleb128 0x50
+	.4byte	.LLST388
+	.uleb128 0x53
 	.ascii	"lpa\000"
 	.byte	0x3
 	.2byte	0x488
 	.4byte	0xdc5
-	.4byte	.LLST387
+	.4byte	.LLST389
 	.uleb128 0x28
-	.4byte	.LASF663
+	.4byte	.LASF664
 	.byte	0x3
 	.2byte	0x489
 	.4byte	0xdc5
@@ -37065,32 +37140,32 @@ __func__.9940:
 	.byte	0x91
 	.sleb128 -32
 	.uleb128 0x28
-	.4byte	.LASF640
+	.4byte	.LASF641
 	.byte	0x3
 	.2byte	0x489
 	.4byte	0xdc5
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -28
-	.uleb128 0x51
-	.4byte	.LASF629
+	.uleb128 0x54
+	.4byte	.LASF630
 	.byte	0x3
 	.2byte	0x48a
 	.4byte	0xdba
-	.4byte	.LLST388
+	.4byte	.LLST390
 	.uleb128 0x44
-	.4byte	.LVL1633
-	.4byte	0x6e77
+	.4byte	.LVL1635
+	.4byte	0x6ede
 	.uleb128 0x44
-	.4byte	.LVL1643
-	.4byte	0x5313
+	.4byte	.LVL1645
+	.4byte	0x537a
 	.uleb128 0x44
-	.4byte	.LVL1644
-	.4byte	0x4d0e
+	.4byte	.LVL1646
+	.4byte	0x4d75
 	.uleb128 0x32
-	.4byte	.LVL1645
-	.4byte	0x5212
-	.4byte	0x6a69
+	.4byte	.LVL1647
+	.4byte	0x5279
+	.4byte	0x6ad0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37110,9 +37185,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1646
-	.4byte	0x5212
-	.4byte	0x6a88
+	.4byte	.LVL1648
+	.4byte	0x5279
+	.4byte	0x6aef
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37132,14 +37207,14 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1647
-	.4byte	0x6122
+	.4byte	.LVL1649
+	.4byte	0x6189
 	.uleb128 0x44
-	.4byte	.LVL1648
-	.4byte	0x31f2
+	.4byte	.LVL1650
+	.4byte	0x3259
 	.byte	0
-	.uleb128 0x59
-	.4byte	.LASF828
+	.uleb128 0x5c
+	.4byte	.LASF829
 	.byte	0x3
 	.2byte	0x3c1
 	.4byte	0x50
@@ -37147,116 +37222,116 @@ __func__.9940:
 	.4byte	.LFE220-.LFB220
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6e77
-	.uleb128 0x5a
+	.4byte	0x6ede
+	.uleb128 0x5d
 	.ascii	"LUN\000"
 	.byte	0x3
 	.2byte	0x3c1
 	.4byte	0xdaf
-	.4byte	.LLST428
-	.uleb128 0x4f
-	.4byte	.LASF731
+	.4byte	.LLST430
+	.uleb128 0x52
+	.4byte	.LASF732
 	.byte	0x3
 	.2byte	0x3c1
 	.4byte	0xdc5
-	.4byte	.LLST429
-	.uleb128 0x4f
-	.4byte	.LASF732
+	.4byte	.LLST431
+	.uleb128 0x52
+	.4byte	.LASF733
 	.byte	0x3
 	.2byte	0x3c1
 	.4byte	0xdc5
-	.4byte	.LLST430
-	.uleb128 0x4f
-	.4byte	.LASF733
+	.4byte	.LLST432
+	.uleb128 0x52
+	.4byte	.LASF734
 	.byte	0x3
 	.2byte	0x3c1
-	.4byte	0x50e9
-	.4byte	.LLST431
-	.uleb128 0x51
-	.4byte	.LASF596
+	.4byte	0x5150
+	.4byte	.LLST433
+	.uleb128 0x54
+	.4byte	.LASF599
 	.byte	0x3
 	.2byte	0x3c3
-	.4byte	0x2a63
-	.4byte	.LLST432
-	.uleb128 0x50
+	.4byte	0x2aca
+	.4byte	.LLST434
+	.uleb128 0x53
 	.ascii	"lpa\000"
 	.byte	0x3
 	.2byte	0x3c4
 	.4byte	0xdc5
-	.4byte	.LLST433
-	.uleb128 0x51
-	.4byte	.LASF829
+	.4byte	.LLST435
+	.uleb128 0x54
+	.4byte	.LASF830
 	.byte	0x3
 	.2byte	0x3c4
 	.4byte	0xdc5
-	.4byte	.LLST434
-	.uleb128 0x51
-	.4byte	.LASF830
+	.4byte	.LLST436
+	.uleb128 0x54
+	.4byte	.LASF831
 	.byte	0x3
 	.2byte	0x3c4
 	.4byte	0xdc5
-	.4byte	.LLST435
+	.4byte	.LLST437
 	.uleb128 0x28
-	.4byte	.LASF663
+	.4byte	.LASF664
 	.byte	0x3
 	.2byte	0x3c5
 	.4byte	0xdc5
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -56
-	.uleb128 0x50
+	.uleb128 0x53
 	.ascii	"ppa\000"
 	.byte	0x3
 	.2byte	0x3c5
 	.4byte	0xdc5
-	.4byte	.LLST436
-	.uleb128 0x50
+	.4byte	.LLST438
+	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x3
 	.2byte	0x3c6
 	.4byte	0xdc5
-	.4byte	.LLST437
-	.uleb128 0x51
-	.4byte	.LASF831
+	.4byte	.LLST439
+	.uleb128 0x54
+	.4byte	.LASF832
 	.byte	0x3
 	.2byte	0x3c6
 	.4byte	0xdc5
-	.4byte	.LLST438
-	.uleb128 0x51
-	.4byte	.LASF593
+	.4byte	.LLST440
+	.uleb128 0x54
+	.4byte	.LASF596
 	.byte	0x3
 	.2byte	0x3c6
 	.4byte	0xdc5
-	.4byte	.LLST439
-	.uleb128 0x51
-	.4byte	.LASF832
+	.4byte	.LLST441
+	.uleb128 0x54
+	.4byte	.LASF833
 	.byte	0x3
 	.2byte	0x3c7
 	.4byte	0xdc5
-	.4byte	.LLST440
-	.uleb128 0x51
-	.4byte	.LASF833
+	.4byte	.LLST442
+	.uleb128 0x54
+	.4byte	.LASF834
 	.byte	0x3
 	.2byte	0x3c7
 	.4byte	0xdc5
-	.4byte	.LLST441
-	.uleb128 0x51
-	.4byte	.LASF639
+	.4byte	.LLST443
+	.uleb128 0x54
+	.4byte	.LASF640
 	.byte	0x3
 	.2byte	0x3c8
 	.4byte	0x1d79
-	.4byte	.LLST442
+	.4byte	.LLST444
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x530e
+	.4byte	0x5375
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.8951
 	.uleb128 0x3e
 	.4byte	.Ldebug_ranges0+0x190
-	.4byte	0x6c38
+	.4byte	0x6c9f
 	.uleb128 0x28
-	.4byte	.LASF601
+	.4byte	.LASF604
 	.byte	0x3
 	.2byte	0x43d
 	.4byte	0xde6
@@ -37264,9 +37339,9 @@ __func__.9940:
 	.byte	0x91
 	.sleb128 -52
 	.uleb128 0x32
-	.4byte	.LVL1952
+	.4byte	.LVL1954
 	.4byte	0x26b9
-	.4byte	0x6bf7
+	.4byte	0x6c5e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37285,9 +37360,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1954
-	.4byte	0x9222
-	.4byte	0x6c14
+	.4byte	.LVL1956
+	.4byte	0x9289
+	.4byte	0x6c7b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37302,8 +37377,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1955
-	.4byte	0x9222
+	.4byte	.LVL1957
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37325,9 +37400,9 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1873
-	.4byte	0x50ef
-	.4byte	0x6c5d
+	.4byte	.LVL1875
+	.4byte	0x5156
+	.4byte	0x6cc4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37350,12 +37425,12 @@ __func__.9940:
 	.byte	0x6
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1885
-	.4byte	0x6e77
-	.uleb128 0x32
 	.4byte	.LVL1887
-	.4byte	0x9222
-	.4byte	0x6c8d
+	.4byte	0x6ede
+	.uleb128 0x32
+	.4byte	.LVL1889
+	.4byte	0x9289
+	.4byte	0x6cf4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37376,12 +37451,12 @@ __func__.9940:
 	.2byte	0x3f4
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1888
-	.4byte	0x6e77
-	.uleb128 0x32
 	.4byte	.LVL1890
-	.4byte	0x33c9
-	.4byte	0x6cad
+	.4byte	0x6ede
+	.uleb128 0x32
+	.4byte	.LVL1892
+	.4byte	0x3430
+	.4byte	0x6d14
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37390,9 +37465,9 @@ __func__.9940:
 	.4byte	.LANCHOR52
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1891
-	.4byte	0x33c9
-	.4byte	0x6cc4
+	.4byte	.LVL1893
+	.4byte	0x3430
+	.4byte	0x6d2b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37401,9 +37476,9 @@ __func__.9940:
 	.4byte	.LANCHOR51
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1893
-	.4byte	0x33c9
-	.4byte	0x6cd8
+	.4byte	.LVL1895
+	.4byte	0x3430
+	.4byte	0x6d3f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37412,9 +37487,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1896
-	.4byte	0x9222
-	.4byte	0x6cff
+	.4byte	.LVL1898
+	.4byte	0x9289
+	.4byte	0x6d66
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37435,9 +37510,9 @@ __func__.9940:
 	.2byte	0x415
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1905
-	.4byte	0x2996
-	.4byte	0x6d1e
+	.4byte	.LVL1907
+	.4byte	0x29fd
+	.4byte	0x6d85
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37456,9 +37531,9 @@ __func__.9940:
 	.byte	0x1c
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1907
-	.4byte	0x5acd
-	.4byte	0x6d31
+	.4byte	.LVL1909
+	.4byte	0x5b34
+	.4byte	0x6d98
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37466,12 +37541,12 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1908
-	.4byte	0x2bbf
+	.4byte	.LVL1910
+	.4byte	0x2c26
 	.uleb128 0x32
-	.4byte	.LVL1909
-	.4byte	0x2996
-	.4byte	0x6d52
+	.4byte	.LVL1911
+	.4byte	0x29fd
+	.4byte	0x6db9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37484,9 +37559,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1910
-	.4byte	0x2996
-	.4byte	0x6d6a
+	.4byte	.LVL1912
+	.4byte	0x29fd
+	.4byte	0x6dd1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37499,9 +37574,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1919
+	.4byte	.LVL1921
 	.4byte	0x22a6
-	.4byte	0x6d86
+	.4byte	0x6ded
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -37517,12 +37592,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1928
-	.4byte	0x6e77
-	.uleb128 0x32
 	.4byte	.LVL1930
-	.4byte	0x33c9
-	.4byte	0x6da3
+	.4byte	0x6ede
+	.uleb128 0x32
+	.4byte	.LVL1932
+	.4byte	0x3430
+	.4byte	0x6e0a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37531,9 +37606,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1933
-	.4byte	0x5212
-	.4byte	0x6dc2
+	.4byte	.LVL1935
+	.4byte	0x5279
+	.4byte	0x6e29
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37553,9 +37628,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1934
-	.4byte	0x32d7
-	.4byte	0x6dd6
+	.4byte	.LVL1936
+	.4byte	0x333e
+	.4byte	0x6e3d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37564,9 +37639,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1939
+	.4byte	.LVL1941
 	.4byte	0x230c
-	.4byte	0x6df1
+	.4byte	0x6e58
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37581,9 +37656,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1948
-	.4byte	0x9222
-	.4byte	0x6e18
+	.4byte	.LVL1950
+	.4byte	0x9289
+	.4byte	0x6e7f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37604,12 +37679,12 @@ __func__.9940:
 	.2byte	0x45f
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1953
+	.4byte	.LVL1955
 	.4byte	0x22a6
 	.uleb128 0x32
-	.4byte	.LVL1957
+	.4byte	.LVL1959
 	.4byte	0x230c
-	.4byte	0x6e34
+	.4byte	0x6e9b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -37617,9 +37692,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1960
-	.4byte	0x6ea6
-	.4byte	0x6e53
+	.4byte	.LVL1962
+	.4byte	0x6f0d
+	.4byte	0x6eba
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -37639,8 +37714,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1961
-	.4byte	0x9222
+	.4byte	.LVL1963
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37661,8 +37736,8 @@ __func__.9940:
 	.2byte	0x46e
 	.byte	0
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF834
+	.uleb128 0x48
+	.4byte	.LASF835
 	.byte	0x3
 	.2byte	0x3b7
 	.4byte	0x50
@@ -37670,10 +37745,10 @@ __func__.9940:
 	.4byte	.LFE219-.LFB219
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6ea6
+	.4byte	0x6f0d
 	.uleb128 0x34
-	.4byte	.LVL1624
-	.4byte	0x6ea6
+	.4byte	.LVL1626
+	.4byte	0x6f0d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -37686,46 +37761,46 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.byte	0
-	.uleb128 0x5d
-	.4byte	.LASF835
+	.uleb128 0x5f
+	.4byte	.LASF836
 	.byte	0x3
 	.2byte	0x387
 	.4byte	.LFB218
 	.4byte	.LFE218-.LFB218
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x708c
-	.uleb128 0x5a
+	.4byte	0x70f3
+	.uleb128 0x5d
 	.ascii	"req\000"
 	.byte	0x3
 	.2byte	0x387
 	.4byte	0x19f9
-	.4byte	.LLST375
-	.uleb128 0x4f
-	.4byte	.LASF593
+	.4byte	.LLST377
+	.uleb128 0x52
+	.4byte	.LASF596
 	.byte	0x3
 	.2byte	0x387
 	.4byte	0xdc5
-	.4byte	.LLST376
-	.uleb128 0x4f
-	.4byte	.LASF836
+	.4byte	.LLST378
+	.uleb128 0x52
+	.4byte	.LASF837
 	.byte	0x3
 	.2byte	0x387
 	.4byte	0xdc5
-	.4byte	.LLST377
-	.uleb128 0x4f
-	.4byte	.LASF639
+	.4byte	.LLST379
+	.uleb128 0x52
+	.4byte	.LASF640
 	.byte	0x3
 	.2byte	0x387
 	.4byte	0x1d79
-	.4byte	.LLST378
-	.uleb128 0x50
+	.4byte	.LLST380
+	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x3
 	.2byte	0x389
 	.4byte	0xdc5
-	.4byte	.LLST379
-	.uleb128 0x5e
+	.4byte	.LLST381
+	.uleb128 0x60
 	.ascii	"ppa\000"
 	.byte	0x3
 	.2byte	0x38a
@@ -37733,40 +37808,40 @@ __func__.9940:
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -36
-	.uleb128 0x51
-	.4byte	.LASF663
+	.uleb128 0x54
+	.4byte	.LASF664
 	.byte	0x3
 	.2byte	0x38a
 	.4byte	0xdc5
-	.4byte	.LLST380
-	.uleb128 0x51
-	.4byte	.LASF623
+	.4byte	.LLST382
+	.uleb128 0x54
+	.4byte	.LASF624
 	.byte	0x3
 	.2byte	0x38b
 	.4byte	0xdba
-	.4byte	.LLST381
-	.uleb128 0x51
-	.4byte	.LASF596
+	.4byte	.LLST383
+	.uleb128 0x54
+	.4byte	.LASF599
 	.byte	0x3
 	.2byte	0x38c
-	.4byte	0x2a63
-	.4byte	.LLST382
-	.uleb128 0x60
-	.4byte	.LASF687
+	.4byte	0x2aca
+	.4byte	.LLST384
+	.uleb128 0x62
+	.4byte	.LASF688
 	.byte	0x3
 	.2byte	0x38d
 	.4byte	0xdc5
 	.byte	0
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x709c
+	.4byte	0x7103
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.8923
 	.uleb128 0x32
-	.4byte	.LVL1605
+	.4byte	.LVL1607
 	.4byte	0x251a
-	.4byte	0x6f85
+	.4byte	0x6fec
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37787,12 +37862,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1606
-	.4byte	0x6122
-	.uleb128 0x32
 	.4byte	.LVL1608
-	.4byte	0x33c9
-	.4byte	0x6fa2
+	.4byte	0x6189
+	.uleb128 0x32
+	.4byte	.LVL1610
+	.4byte	0x3430
+	.4byte	0x7009
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37801,12 +37876,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1609
-	.4byte	0x2b35
+	.4byte	.LVL1611
+	.4byte	0x2b9c
 	.uleb128 0x32
-	.4byte	.LVL1610
-	.4byte	0x32d7
-	.4byte	0x6fbf
+	.4byte	.LVL1612
+	.4byte	0x333e
+	.4byte	0x7026
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37815,9 +37890,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1611
+	.4byte	.LVL1613
 	.4byte	0x251a
-	.4byte	0x6fdd
+	.4byte	0x7044
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37836,9 +37911,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1612
-	.4byte	0x9222
-	.4byte	0x7004
+	.4byte	.LVL1614
+	.4byte	0x9289
+	.4byte	0x706b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37859,9 +37934,9 @@ __func__.9940:
 	.2byte	0x3a5
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1613
-	.4byte	0x5212
-	.4byte	0x701d
+	.4byte	.LVL1615
+	.4byte	0x5279
+	.4byte	0x7084
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -37875,9 +37950,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1615
-	.4byte	0x6122
-	.4byte	0x7037
+	.4byte	.LVL1617
+	.4byte	0x6189
+	.4byte	0x709e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37892,9 +37967,9 @@ __func__.9940:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1618
-	.4byte	0x9222
-	.4byte	0x7054
+	.4byte	.LVL1620
+	.4byte	0x9289
+	.4byte	0x70bb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37909,9 +37984,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1619
-	.4byte	0x31f2
-	.4byte	0x7068
+	.4byte	.LVL1621
+	.4byte	0x3259
+	.4byte	0x70cf
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37920,8 +37995,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1622
-	.4byte	0x9222
+	.4byte	.LVL1624
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37944,15 +38019,15 @@ __func__.9940:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x709c
+	.4byte	0x7103
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0xc
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x708c
-	.uleb128 0x59
-	.4byte	.LASF837
+	.4byte	0x70f3
+	.uleb128 0x5c
+	.4byte	.LASF838
 	.byte	0x3
 	.2byte	0x32d
 	.4byte	0x50
@@ -37960,62 +38035,62 @@ __func__.9940:
 	.4byte	.LFE217-.LFB217
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7294
-	.uleb128 0x5a
+	.4byte	0x72fb
+	.uleb128 0x5d
 	.ascii	"LUN\000"
 	.byte	0x3
 	.2byte	0x32d
 	.4byte	0xdaf
-	.4byte	.LLST408
-	.uleb128 0x4f
-	.4byte	.LASF731
+	.4byte	.LLST410
+	.uleb128 0x52
+	.4byte	.LASF732
 	.byte	0x3
 	.2byte	0x32d
 	.4byte	0xdc5
-	.4byte	.LLST409
-	.uleb128 0x4f
-	.4byte	.LASF732
+	.4byte	.LLST411
+	.uleb128 0x52
+	.4byte	.LASF733
 	.byte	0x3
 	.2byte	0x32d
 	.4byte	0xdc5
-	.4byte	.LLST410
-	.uleb128 0x4f
-	.4byte	.LASF733
+	.4byte	.LLST412
+	.uleb128 0x52
+	.4byte	.LASF734
 	.byte	0x3
 	.2byte	0x32d
-	.4byte	0x50e9
-	.4byte	.LLST411
-	.uleb128 0x50
+	.4byte	0x5150
+	.4byte	.LLST413
+	.uleb128 0x53
 	.ascii	"ret\000"
 	.byte	0x3
 	.2byte	0x32f
 	.4byte	0x50
-	.4byte	.LLST412
-	.uleb128 0x51
-	.4byte	.LASF829
+	.4byte	.LLST414
+	.uleb128 0x54
+	.4byte	.LASF830
 	.byte	0x3
 	.2byte	0x330
 	.4byte	0xdc5
-	.4byte	.LLST413
-	.uleb128 0x51
-	.4byte	.LASF830
+	.4byte	.LLST415
+	.uleb128 0x54
+	.4byte	.LASF831
 	.byte	0x3
 	.2byte	0x330
 	.4byte	0xdc5
-	.4byte	.LLST414
-	.uleb128 0x51
-	.4byte	.LASF838
+	.4byte	.LLST416
+	.uleb128 0x54
+	.4byte	.LASF839
 	.byte	0x3
 	.2byte	0x330
 	.4byte	0xdc5
-	.4byte	.LLST415
-	.uleb128 0x50
+	.4byte	.LLST417
+	.uleb128 0x53
 	.ascii	"lpa\000"
 	.byte	0x3
 	.2byte	0x331
 	.4byte	0xdc5
-	.4byte	.LLST416
-	.uleb128 0x5e
+	.4byte	.LLST418
+	.uleb128 0x60
 	.ascii	"ppa\000"
 	.byte	0x3
 	.2byte	0x331
@@ -38023,69 +38098,69 @@ __func__.9940:
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -36
-	.uleb128 0x50
+	.uleb128 0x53
 	.ascii	"n\000"
 	.byte	0x3
 	.2byte	0x333
 	.4byte	0xdc5
-	.4byte	.LLST417
-	.uleb128 0x51
-	.4byte	.LASF593
+	.4byte	.LLST419
+	.uleb128 0x54
+	.4byte	.LASF596
 	.byte	0x3
 	.2byte	0x333
 	.4byte	0xdc5
-	.4byte	.LLST418
-	.uleb128 0x51
-	.4byte	.LASF831
+	.4byte	.LLST420
+	.uleb128 0x54
+	.4byte	.LASF832
 	.byte	0x3
 	.2byte	0x333
 	.4byte	0xdc5
-	.4byte	.LLST419
-	.uleb128 0x51
-	.4byte	.LASF839
+	.4byte	.LLST421
+	.uleb128 0x54
+	.4byte	.LASF840
 	.byte	0x3
 	.2byte	0x334
 	.4byte	0xdc5
-	.4byte	.LLST420
-	.uleb128 0x51
-	.4byte	.LASF840
+	.4byte	.LLST422
+	.uleb128 0x54
+	.4byte	.LASF841
 	.byte	0x3
 	.2byte	0x334
 	.4byte	0xdc5
-	.4byte	.LLST421
-	.uleb128 0x51
-	.4byte	.LASF841
+	.4byte	.LLST423
+	.uleb128 0x54
+	.4byte	.LASF842
 	.byte	0x3
 	.2byte	0x335
 	.4byte	0xdc5
-	.4byte	.LLST422
-	.uleb128 0x51
-	.4byte	.LASF842
+	.4byte	.LLST424
+	.uleb128 0x54
+	.4byte	.LASF843
 	.byte	0x3
 	.2byte	0x336
 	.4byte	0xdc5
-	.4byte	.LLST423
-	.uleb128 0x5f
-	.4byte	.LBB295
-	.4byte	.LBE295-.LBB295
-	.4byte	0x71f8
-	.uleb128 0x51
-	.4byte	.LASF608
+	.4byte	.LLST425
+	.uleb128 0x61
+	.4byte	.LBB299
+	.4byte	.LBE299-.LBB299
+	.4byte	0x725f
+	.uleb128 0x54
+	.4byte	.LASF587
 	.byte	0x3
 	.2byte	0x37a
 	.4byte	0xdba
-	.4byte	.LLST424
+	.4byte	.LLST426
 	.uleb128 0x44
-	.4byte	.LVL1860
-	.4byte	0x6122
+	.4byte	.LVL1862
+	.4byte	0x6189
 	.uleb128 0x44
-	.4byte	.LVL1861
-	.4byte	0x2bbf
+	.4byte	.LVL1863
+	.4byte	0x2c26
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1817
-	.4byte	0x4fd7
-	.4byte	0x721a
+	.4byte	.LVL1819
+	.4byte	0x503e
+	.4byte	0x7281
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38107,12 +38182,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1823
-	.4byte	0x6e77
+	.4byte	.LVL1825
+	.4byte	0x6ede
 	.uleb128 0x32
-	.4byte	.LVL1832
-	.4byte	0x2996
-	.4byte	0x723b
+	.4byte	.LVL1834
+	.4byte	0x29fd
+	.4byte	0x72a2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38125,9 +38200,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1834
-	.4byte	0x5212
-	.4byte	0x725a
+	.4byte	.LVL1836
+	.4byte	0x5279
+	.4byte	0x72c1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38147,9 +38222,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1840
+	.4byte	.LVL1842
 	.4byte	0x26b9
-	.4byte	0x7274
+	.4byte	0x72db
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38164,10 +38239,10 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1842
+	.4byte	.LVL1844
 	.4byte	0x22a6
 	.uleb128 0x34
-	.4byte	.LVL1849
+	.4byte	.LVL1851
 	.4byte	0x230c
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -38182,8 +38257,8 @@ __func__.9940:
 	.2byte	0x200
 	.byte	0
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF843
+	.uleb128 0x48
+	.4byte	.LASF844
 	.byte	0x3
 	.2byte	0x325
 	.4byte	0x50
@@ -38191,13 +38266,13 @@ __func__.9940:
 	.4byte	.LFE216-.LFB216
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x72b8
+	.4byte	0x731f
 	.uleb128 0x44
-	.4byte	.LVL1629
-	.4byte	0x72b8
+	.4byte	.LVL1631
+	.4byte	0x731f
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF844
+	.uleb128 0x48
+	.4byte	.LASF845
 	.byte	0x3
 	.2byte	0x31c
 	.4byte	0x50
@@ -38205,17 +38280,17 @@ __func__.9940:
 	.4byte	.LFE215-.LFB215
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7301
+	.4byte	0x7368
 	.uleb128 0x44
-	.4byte	.LVL1625
-	.4byte	0x6e77
+	.4byte	.LVL1627
+	.4byte	0x6ede
 	.uleb128 0x44
-	.4byte	.LVL1626
-	.4byte	0x5313
+	.4byte	.LVL1628
+	.4byte	0x537a
 	.uleb128 0x32
-	.4byte	.LVL1627
-	.4byte	0x4f7f
-	.4byte	0x72f7
+	.4byte	.LVL1629
+	.4byte	0x4fe6
+	.4byte	0x735e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38223,11 +38298,11 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1628
-	.4byte	0x4d0e
+	.4byte	.LVL1630
+	.4byte	0x4d75
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF845
+	.uleb128 0x48
+	.4byte	.LASF846
 	.byte	0x3
 	.2byte	0x2e6
 	.4byte	0x50
@@ -38235,34 +38310,34 @@ __func__.9940:
 	.4byte	.LFE214-.LFB214
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x73cf
+	.4byte	0x7436
 	.uleb128 0x28
-	.4byte	.LASF846
+	.4byte	.LASF847
 	.byte	0x3
 	.2byte	0x2e8
-	.4byte	0x73cf
+	.4byte	0x7436
 	.uleb128 0x6
 	.byte	0x3
 	.4byte	g_nand_phy_info
 	.byte	0x9f
-	.uleb128 0x55
-	.4byte	.LASF847
+	.uleb128 0x58
+	.4byte	.LASF848
 	.byte	0x3
 	.2byte	0x2f3
 	.4byte	.LDL2
-	.uleb128 0x5f
-	.4byte	.LBB305
-	.4byte	.LBE305-.LBB305
-	.4byte	0x736a
-	.uleb128 0x50
+	.uleb128 0x61
+	.4byte	.LBB309
+	.4byte	.LBE309-.LBB309
+	.4byte	0x73d1
+	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x3
 	.2byte	0x310
 	.4byte	0xdc5
-	.4byte	.LLST452
+	.4byte	.LLST454
 	.uleb128 0x34
-	.4byte	.LVL2072
-	.4byte	0x2996
+	.4byte	.LVL2074
+	.4byte	0x29fd
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38276,9 +38351,9 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2064
-	.4byte	0x9222
-	.4byte	0x738a
+	.4byte	.LVL2066
+	.4byte	0x9289
+	.4byte	0x73f1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38293,9 +38368,9 @@ __func__.9940:
 	.4byte	.LC70
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2065
-	.4byte	0x7a20
-	.4byte	0x73a1
+	.4byte	.LVL2067
+	.4byte	0x7a87
+	.4byte	0x7408
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38304,26 +38379,26 @@ __func__.9940:
 	.4byte	.LANCHOR0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL2066
-	.4byte	0x77c3
-	.uleb128 0x44
-	.4byte	.LVL2067
-	.4byte	0x7713
-	.uleb128 0x44
 	.4byte	.LVL2068
-	.4byte	0x5fb8
+	.4byte	0x782a
 	.uleb128 0x44
 	.4byte	.LVL2069
-	.4byte	0x6437
+	.4byte	0x777a
 	.uleb128 0x44
 	.4byte	.LVL2070
-	.4byte	0x3937
+	.4byte	0x601f
+	.uleb128 0x44
+	.4byte	.LVL2071
+	.4byte	0x649e
+	.uleb128 0x44
+	.4byte	.LVL2072
+	.4byte	0x399e
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0xed2
-	.uleb128 0x59
-	.4byte	.LASF848
+	.uleb128 0x5c
+	.4byte	.LASF849
 	.byte	0x3
 	.2byte	0x26e
 	.4byte	0x50
@@ -38331,57 +38406,57 @@ __func__.9940:
 	.4byte	.LFE213-.LFB213
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x752b
-	.uleb128 0x51
-	.4byte	.LASF717
+	.4byte	0x7592
+	.uleb128 0x54
+	.4byte	.LASF718
 	.byte	0x3
 	.2byte	0x270
 	.4byte	0xdba
-	.4byte	.LLST448
-	.uleb128 0x51
-	.4byte	.LASF849
+	.4byte	.LLST450
+	.uleb128 0x54
+	.4byte	.LASF850
 	.byte	0x3
 	.2byte	0x270
 	.4byte	0xdba
-	.4byte	.LLST449
-	.uleb128 0x51
-	.4byte	.LASF850
+	.4byte	.LLST451
+	.uleb128 0x54
+	.4byte	.LASF851
 	.byte	0x3
 	.2byte	0x271
 	.4byte	0xdba
-	.4byte	.LLST450
-	.uleb128 0x50
+	.4byte	.LLST452
+	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x3
 	.2byte	0x272
 	.4byte	0xdba
-	.4byte	.LLST451
-	.uleb128 0x55
-	.4byte	.LASF851
+	.4byte	.LLST453
+	.uleb128 0x58
+	.4byte	.LASF852
 	.byte	0x3
 	.2byte	0x2bc
-	.4byte	.L1802
-	.uleb128 0x55
-	.4byte	.LASF852
+	.4byte	.L1803
+	.uleb128 0x58
+	.4byte	.LASF853
 	.byte	0x3
 	.2byte	0x2cc
-	.4byte	.L1804
+	.4byte	.L1805
 	.uleb128 0x44
-	.4byte	.LVL2018
-	.4byte	0x5fb8
+	.4byte	.LVL2020
+	.4byte	0x601f
 	.uleb128 0x44
-	.4byte	.LVL2019
-	.4byte	0x6437
+	.4byte	.LVL2021
+	.4byte	0x649e
 	.uleb128 0x44
-	.4byte	.LVL2020
-	.4byte	0x61d9
+	.4byte	.LVL2022
+	.4byte	0x6240
 	.uleb128 0x44
-	.4byte	.LVL2034
-	.4byte	0x65f0
+	.4byte	.LVL2036
+	.4byte	0x6657
 	.uleb128 0x32
-	.4byte	.LVL2035
+	.4byte	.LVL2037
 	.4byte	0x230c
-	.4byte	0x747c
+	.4byte	0x74e3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38389,9 +38464,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2036
+	.4byte	.LVL2038
 	.4byte	0x230c
-	.4byte	0x7490
+	.4byte	0x74f7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38400,9 +38475,9 @@ __func__.9940:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2037
-	.4byte	0x3ec7
-	.4byte	0x74a4
+	.4byte	.LVL2039
+	.4byte	0x3f2e
+	.4byte	0x750b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38411,9 +38486,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2041
-	.4byte	0x752b
-	.4byte	0x74bd
+	.4byte	.LVL2043
+	.4byte	0x7592
+	.4byte	0x7524
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38427,15 +38502,15 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL2048
-	.4byte	0x7a7c
+	.4byte	.LVL2050
+	.4byte	0x7ae3
 	.uleb128 0x44
-	.4byte	.LVL2049
-	.4byte	0x5fb8
+	.4byte	.LVL2051
+	.4byte	0x601f
 	.uleb128 0x32
-	.4byte	.LVL2052
-	.4byte	0x752b
-	.4byte	0x74e8
+	.4byte	.LVL2054
+	.4byte	0x7592
+	.4byte	0x754f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38449,9 +38524,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2055
-	.4byte	0x752b
-	.4byte	0x74fb
+	.4byte	.LVL2057
+	.4byte	0x7592
+	.4byte	0x7562
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38459,9 +38534,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2059
-	.4byte	0x3ec7
-	.4byte	0x750f
+	.4byte	.LVL2061
+	.4byte	0x3f2e
+	.4byte	0x7576
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38470,17 +38545,17 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL2060
-	.4byte	0x5dbf
+	.4byte	.LVL2062
+	.4byte	0x5e26
 	.uleb128 0x44
-	.4byte	.LVL2061
-	.4byte	0x4d0e
+	.4byte	.LVL2063
+	.4byte	0x4d75
 	.uleb128 0x44
-	.4byte	.LVL2062
-	.4byte	0x3937
+	.4byte	.LVL2064
+	.4byte	0x399e
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF853
+	.uleb128 0x48
+	.4byte	.LASF854
 	.byte	0x3
 	.2byte	0x20f
 	.4byte	0x50
@@ -38488,76 +38563,76 @@ __func__.9940:
 	.4byte	.LFE212-.LFB212
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x76e9
-	.uleb128 0x4f
-	.4byte	.LASF717
+	.4byte	0x7750
+	.uleb128 0x52
+	.4byte	.LASF718
 	.byte	0x3
 	.2byte	0x20f
 	.4byte	0xdba
-	.4byte	.LLST179
-	.uleb128 0x4f
-	.4byte	.LASF854
+	.4byte	.LLST181
+	.uleb128 0x52
+	.4byte	.LASF855
 	.byte	0x3
 	.2byte	0x20f
 	.4byte	0xdaf
-	.4byte	.LLST180
-	.uleb128 0x51
-	.4byte	.LASF849
+	.4byte	.LLST182
+	.uleb128 0x54
+	.4byte	.LASF850
 	.byte	0x3
 	.2byte	0x211
 	.4byte	0xdba
-	.4byte	.LLST181
-	.uleb128 0x51
+	.4byte	.LLST183
+	.uleb128 0x54
 	.4byte	.LASF569
 	.byte	0x3
 	.2byte	0x211
 	.4byte	0xdba
-	.4byte	.LLST182
-	.uleb128 0x51
-	.4byte	.LASF592
+	.4byte	.LLST184
+	.uleb128 0x54
+	.4byte	.LASF595
 	.byte	0x3
 	.2byte	0x212
 	.4byte	0xdba
-	.4byte	.LLST183
-	.uleb128 0x51
+	.4byte	.LLST185
+	.uleb128 0x54
 	.4byte	.LASF388
 	.byte	0x3
 	.2byte	0x212
 	.4byte	0xdba
-	.4byte	.LLST184
-	.uleb128 0x51
-	.4byte	.LASF855
+	.4byte	.LLST186
+	.uleb128 0x54
+	.4byte	.LASF856
 	.byte	0x3
 	.2byte	0x213
 	.4byte	0xdba
-	.4byte	.LLST185
-	.uleb128 0x51
-	.4byte	.LASF856
+	.4byte	.LLST187
+	.uleb128 0x54
+	.4byte	.LASF857
 	.byte	0x3
 	.2byte	0x214
 	.4byte	0xdba
-	.4byte	.LLST186
-	.uleb128 0x51
-	.4byte	.LASF857
+	.4byte	.LLST188
+	.uleb128 0x54
+	.4byte	.LASF858
 	.byte	0x3
 	.2byte	0x215
 	.4byte	0xdba
-	.4byte	.LLST187
-	.uleb128 0x51
-	.4byte	.LASF858
+	.4byte	.LLST189
+	.uleb128 0x54
+	.4byte	.LASF859
 	.byte	0x3
 	.2byte	0x216
 	.4byte	0xdba
-	.4byte	.LLST188
-	.uleb128 0x55
-	.4byte	.LASF859
+	.4byte	.LLST190
+	.uleb128 0x58
+	.4byte	.LASF860
 	.byte	0x3
 	.2byte	0x240
-	.4byte	.L508
+	.4byte	.L509
 	.uleb128 0x32
-	.4byte	.LVL643
+	.4byte	.LVL645
 	.4byte	0x2464
-	.4byte	0x760b
+	.4byte	0x7672
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38572,9 +38647,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL651
+	.4byte	.LVL653
 	.4byte	0x251a
-	.4byte	0x7631
+	.4byte	0x7698
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38601,9 +38676,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL658
+	.4byte	.LVL660
 	.4byte	0x2464
-	.4byte	0x764b
+	.4byte	0x76b2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38618,9 +38693,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL660
-	.4byte	0x6192
-	.4byte	0x7661
+	.4byte	.LVL662
+	.4byte	0x61f9
+	.4byte	0x76c8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38631,9 +38706,9 @@ __func__.9940:
 	.byte	0x2
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL662
-	.4byte	0x76e9
-	.4byte	0x7675
+	.4byte	.LVL664
+	.4byte	0x7750
+	.4byte	0x76dc
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38642,9 +38717,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL663
-	.4byte	0x67c5
-	.4byte	0x7689
+	.4byte	.LVL665
+	.4byte	0x682c
+	.4byte	0x76f0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38653,12 +38728,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL674
-	.4byte	0x6828
+	.4byte	.LVL676
+	.4byte	0x688f
 	.uleb128 0x32
-	.4byte	.LVL678
-	.4byte	0x6192
-	.4byte	0x76a8
+	.4byte	.LVL680
+	.4byte	0x61f9
+	.4byte	0x770f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38669,9 +38744,9 @@ __func__.9940:
 	.byte	0x2
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL680
-	.4byte	0x76e9
-	.4byte	0x76bc
+	.4byte	.LVL682
+	.4byte	0x7750
+	.4byte	0x7723
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38680,9 +38755,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL681
-	.4byte	0x67c5
-	.4byte	0x76d0
+	.4byte	.LVL683
+	.4byte	0x682c
+	.4byte	0x7737
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38691,11 +38766,11 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL689
-	.4byte	0x6828
+	.4byte	.LVL691
+	.4byte	0x688f
 	.uleb128 0x34
-	.4byte	.LVL693
-	.4byte	0x5f01
+	.4byte	.LVL695
+	.4byte	0x5f68
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38703,26 +38778,26 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF860
+	.uleb128 0x49
+	.4byte	.LASF861
 	.byte	0x3
 	.2byte	0x201
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x7713
-	.uleb128 0x47
+	.4byte	0x777a
+	.uleb128 0x4a
 	.4byte	.LASF388
 	.byte	0x3
 	.2byte	0x201
 	.4byte	0xdba
-	.uleb128 0x48
-	.4byte	.LASF861
+	.uleb128 0x4b
+	.4byte	.LASF862
 	.byte	0x3
 	.2byte	0x203
 	.4byte	0xdba
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF862
+	.uleb128 0x48
+	.4byte	.LASF863
 	.byte	0x3
 	.2byte	0x1ec
 	.4byte	0x50
@@ -38730,11 +38805,11 @@ __func__.9940:
 	.4byte	.LFE210-.LFB210
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x77c3
+	.4byte	0x782a
 	.uleb128 0x32
-	.4byte	.LVL1039
+	.4byte	.LVL1041
 	.4byte	0x230c
-	.4byte	0x7741
+	.4byte	0x77a8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38743,9 +38818,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1040
+	.4byte	.LVL1042
 	.4byte	0x230c
-	.4byte	0x7755
+	.4byte	0x77bc
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38754,9 +38829,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1041
+	.4byte	.LVL1043
 	.4byte	0x230c
-	.4byte	0x7769
+	.4byte	0x77d0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38765,9 +38840,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1042
+	.4byte	.LVL1044
 	.4byte	0x230c
-	.4byte	0x778c
+	.4byte	0x77f3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38788,9 +38863,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1043
+	.4byte	.LVL1045
 	.4byte	0x230c
-	.4byte	0x77b0
+	.4byte	0x7817
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38811,14 +38886,14 @@ __func__.9940:
 	.2byte	0x200
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1044
-	.4byte	0x31cf
+	.4byte	.LVL1046
+	.4byte	0x3236
 	.uleb128 0x44
-	.4byte	.LVL1045
-	.4byte	0x4719
+	.4byte	.LVL1047
+	.4byte	0x4780
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF863
+	.uleb128 0x48
+	.4byte	.LASF864
 	.byte	0x3
 	.2byte	0x116
 	.4byte	0x50
@@ -38826,35 +38901,35 @@ __func__.9940:
 	.4byte	.LFE209-.LFB209
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7a20
-	.uleb128 0x50
+	.4byte	0x7a87
+	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x3
 	.2byte	0x118
 	.4byte	0xdc5
-	.4byte	.LLST192
-	.uleb128 0x51
-	.4byte	.LASF864
+	.4byte	.LLST194
+	.uleb128 0x54
+	.4byte	.LASF865
 	.byte	0x3
 	.2byte	0x119
 	.4byte	0xdc5
-	.4byte	.LLST193
+	.4byte	.LLST195
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x6576
+	.4byte	0x65dd
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.8799
 	.uleb128 0x44
-	.4byte	.LVL697
+	.4byte	.LVL699
 	.4byte	0x2928
 	.uleb128 0x44
-	.4byte	.LVL698
+	.4byte	.LVL700
 	.4byte	0x2928
 	.uleb128 0x32
-	.4byte	.LVL700
+	.4byte	.LVL702
 	.4byte	0x2928
-	.4byte	0x7830
+	.4byte	0x7897
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38863,9 +38938,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL701
+	.4byte	.LVL703
 	.4byte	0x2928
-	.4byte	0x7844
+	.4byte	0x78ab
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38874,9 +38949,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL702
+	.4byte	.LVL704
 	.4byte	0x2928
-	.4byte	0x7858
+	.4byte	0x78bf
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38885,9 +38960,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL703
+	.4byte	.LVL705
 	.4byte	0x2928
-	.4byte	0x786c
+	.4byte	0x78d3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38896,9 +38971,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL704
+	.4byte	.LVL706
 	.4byte	0x2928
-	.4byte	0x7880
+	.4byte	0x78e7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38907,9 +38982,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL706
+	.4byte	.LVL708
 	.4byte	0x2928
-	.4byte	0x7894
+	.4byte	0x78fb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38918,9 +38993,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL707
+	.4byte	.LVL709
 	.4byte	0x2928
-	.4byte	0x78a8
+	.4byte	0x790f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38929,9 +39004,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL708
+	.4byte	.LVL710
 	.4byte	0x2928
-	.4byte	0x78bc
+	.4byte	0x7923
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38940,12 +39015,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL709
+	.4byte	.LVL711
 	.4byte	0x2928
 	.uleb128 0x32
-	.4byte	.LVL710
+	.4byte	.LVL712
 	.4byte	0x2928
-	.4byte	0x78d9
+	.4byte	0x7940
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38954,9 +39029,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL711
+	.4byte	.LVL713
 	.4byte	0x2928
-	.4byte	0x78ed
+	.4byte	0x7954
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38965,12 +39040,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL713
+	.4byte	.LVL715
 	.4byte	0x2928
 	.uleb128 0x32
-	.4byte	.LVL715
+	.4byte	.LVL717
 	.4byte	0x2928
-	.4byte	0x790a
+	.4byte	0x7971
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38979,9 +39054,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL716
+	.4byte	.LVL718
 	.4byte	0x2928
-	.4byte	0x7920
+	.4byte	0x7987
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38992,18 +39067,18 @@ __func__.9940:
 	.byte	0x24
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL717
+	.4byte	.LVL719
 	.4byte	0x2928
 	.uleb128 0x44
-	.4byte	.LVL718
+	.4byte	.LVL720
 	.4byte	0x2928
 	.uleb128 0x44
-	.4byte	.LVL719
+	.4byte	.LVL721
 	.4byte	0x2928
 	.uleb128 0x32
-	.4byte	.LVL722
+	.4byte	.LVL724
 	.4byte	0x2928
-	.4byte	0x794f
+	.4byte	0x79b6
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39012,9 +39087,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL723
+	.4byte	.LVL725
 	.4byte	0x2928
-	.4byte	0x7963
+	.4byte	0x79ca
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39023,9 +39098,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL727
+	.4byte	.LVL729
 	.4byte	0x2928
-	.4byte	0x7977
+	.4byte	0x79de
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39034,9 +39109,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL728
+	.4byte	.LVL730
 	.4byte	0x2928
-	.4byte	0x798b
+	.4byte	0x79f2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39045,24 +39120,24 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL730
+	.4byte	.LVL732
 	.4byte	0x2928
 	.uleb128 0x44
-	.4byte	.LVL731
+	.4byte	.LVL733
 	.4byte	0x2928
 	.uleb128 0x44
-	.4byte	.LVL732
+	.4byte	.LVL734
 	.4byte	0x2928
 	.uleb128 0x44
-	.4byte	.LVL733
+	.4byte	.LVL735
 	.4byte	0x2928
 	.uleb128 0x44
-	.4byte	.LVL734
+	.4byte	.LVL736
 	.4byte	0x2928
 	.uleb128 0x32
-	.4byte	.LVL735
+	.4byte	.LVL737
 	.4byte	0x230c
-	.4byte	0x79cd
+	.4byte	0x7a34
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -39072,26 +39147,26 @@ __func__.9940:
 	.byte	0x6
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL737
+	.4byte	.LVL739
 	.4byte	0x2928
 	.uleb128 0x44
-	.4byte	.LVL740
+	.4byte	.LVL742
 	.4byte	0x2928
 	.uleb128 0x44
-	.4byte	.LVL743
+	.4byte	.LVL745
 	.4byte	0x2928
 	.uleb128 0x44
-	.4byte	.LVL746
+	.4byte	.LVL748
 	.4byte	0x2928
 	.uleb128 0x44
-	.4byte	.LVL749
+	.4byte	.LVL751
 	.4byte	0x2928
 	.uleb128 0x44
-	.4byte	.LVL753
+	.4byte	.LVL755
 	.4byte	0x2928
 	.uleb128 0x34
-	.4byte	.LVL757
-	.4byte	0x9222
+	.4byte	.LVL759
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39107,7 +39182,7 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x39
-	.4byte	.LASF865
+	.4byte	.LASF866
 	.byte	0x3
 	.byte	0xb6
 	.4byte	0x50
@@ -39115,12 +39190,12 @@ __func__.9940:
 	.4byte	.LFE208-.LFB208
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7a7c
+	.4byte	0x7ae3
 	.uleb128 0x2c
-	.4byte	.LASF846
+	.4byte	.LASF847
 	.byte	0x3
 	.byte	0xb6
-	.4byte	0x73cf
+	.4byte	0x7436
 	.4byte	.LLST10
 	.uleb128 0x3b
 	.ascii	"i\000"
@@ -39130,11 +39205,11 @@ __func__.9940:
 	.4byte	.LLST11
 	.uleb128 0x44
 	.4byte	.LVL30
-	.4byte	0x7abd
+	.4byte	0x7b24
 	.uleb128 0x32
 	.4byte	.LVL31
-	.4byte	0x7abd
-	.4byte	0x7a72
+	.4byte	0x7b24
+	.4byte	0x7ad9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39144,10 +39219,10 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x44
 	.4byte	.LVL35
-	.4byte	0x7a7c
+	.4byte	0x7ae3
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF866
+	.4byte	.LASF867
 	.byte	0x3
 	.byte	0xa4
 	.4byte	0x50
@@ -39155,28 +39230,28 @@ __func__.9940:
 	.4byte	.LFE207-.LFB207
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7aa5
+	.4byte	0x7b0c
 	.uleb128 0x2c
-	.4byte	.LASF867
+	.4byte	.LASF868
 	.byte	0x3
 	.byte	0xa4
 	.4byte	0xdba
 	.4byte	.LLST9
 	.byte	0
-	.uleb128 0x64
-	.4byte	.LASF868
+	.uleb128 0x66
+	.4byte	.LASF869
 	.byte	0x3
 	.byte	0x9e
 	.byte	0x1
-	.4byte	0x7abd
+	.4byte	0x7b24
 	.uleb128 0x36
-	.4byte	.LASF869
+	.4byte	.LASF870
 	.byte	0x3
 	.byte	0x9e
 	.4byte	0xdc5
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF870
+	.4byte	.LASF871
 	.byte	0x3
 	.byte	0x7f
 	.4byte	0xdba
@@ -39184,7 +39259,7 @@ __func__.9940:
 	.4byte	.LFE205-.LFB205
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7b02
+	.4byte	0x7b69
 	.uleb128 0x2f
 	.ascii	"num\000"
 	.byte	0x3
@@ -39198,14 +39273,14 @@ __func__.9940:
 	.4byte	0xdba
 	.4byte	.LLST7
 	.uleb128 0x30
-	.4byte	.LASF871
+	.4byte	.LASF872
 	.byte	0x3
 	.byte	0x82
 	.4byte	0xdc5
 	.4byte	.LLST8
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF872
+	.4byte	.LASF873
 	.byte	0x3
 	.byte	0x71
 	.4byte	0x50
@@ -39213,7 +39288,7 @@ __func__.9940:
 	.4byte	.LFE204-.LFB204
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7b70
+	.4byte	0x7bd7
 	.uleb128 0x2c
 	.4byte	.LASF299
 	.byte	0x3
@@ -39228,8 +39303,8 @@ __func__.9940:
 	.4byte	.LLST112
 	.uleb128 0x32
 	.4byte	.LVL451
-	.4byte	0x9238
-	.4byte	0x7b5f
+	.4byte	0x92ab
+	.4byte	0x7bc6
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39251,7 +39326,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x34
 	.4byte	.LVL453
-	.4byte	0x7b70
+	.4byte	0x7bd7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39261,7 +39336,7 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF873
+	.4byte	.LASF874
 	.byte	0x3
 	.byte	0xb
 	.4byte	0x50
@@ -39269,7 +39344,7 @@ __func__.9940:
 	.4byte	.LFE203-.LFB203
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x83c6
+	.4byte	0x842d
 	.uleb128 0x2c
 	.4byte	.LASF299
 	.byte	0x3
@@ -39288,20 +39363,20 @@ __func__.9940:
 	.byte	0xe
 	.4byte	0xf6
 	.4byte	.LLST108
-	.uleb128 0x5f
-	.4byte	.LBB209
-	.4byte	.LBE209-.LBB209
-	.4byte	0x7c04
+	.uleb128 0x61
+	.4byte	.LBB211
+	.4byte	.LBE211-.LBB211
+	.4byte	0x7c6b
 	.uleb128 0x30
-	.4byte	.LASF608
+	.4byte	.LASF587
 	.byte	0x3
 	.byte	0x57
 	.4byte	0xdba
 	.4byte	.LLST109
 	.uleb128 0x32
 	.4byte	.LVL437
-	.4byte	0x5acd
-	.4byte	0x7be4
+	.4byte	0x5b34
+	.4byte	0x7c4b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39311,7 +39386,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x34
 	.4byte	.LVL439
-	.4byte	0x9238
+	.4byte	0x92ab
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39332,19 +39407,19 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x5f
-	.4byte	.LBB210
-	.4byte	.LBE210-.LBB210
-	.4byte	0x7c3d
+	.uleb128 0x61
+	.4byte	.LBB212
+	.4byte	.LBE212-.LBB212
+	.4byte	0x7ca4
 	.uleb128 0x30
-	.4byte	.LASF608
+	.4byte	.LASF587
 	.byte	0x3
 	.byte	0x60
 	.4byte	0xdba
 	.4byte	.LLST110
 	.uleb128 0x34
 	.4byte	.LVL447
-	.4byte	0x9238
+	.4byte	0x92ab
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39367,8 +39442,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL302
-	.4byte	0x9238
-	.4byte	0x7c5a
+	.4byte	0x92ab
+	.4byte	0x7cc1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39384,8 +39459,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL304
-	.4byte	0x9238
-	.4byte	0x7c77
+	.4byte	0x92ab
+	.4byte	0x7cde
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39401,8 +39476,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL306
-	.4byte	0x9238
-	.4byte	0x7c94
+	.4byte	0x92ab
+	.4byte	0x7cfb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39418,8 +39493,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL308
-	.4byte	0x9238
-	.4byte	0x7cb1
+	.4byte	0x92ab
+	.4byte	0x7d18
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39435,8 +39510,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL310
-	.4byte	0x9238
-	.4byte	0x7cce
+	.4byte	0x92ab
+	.4byte	0x7d35
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39452,8 +39527,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL312
-	.4byte	0x9238
-	.4byte	0x7ceb
+	.4byte	0x92ab
+	.4byte	0x7d52
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39469,8 +39544,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL314
-	.4byte	0x9238
-	.4byte	0x7d08
+	.4byte	0x92ab
+	.4byte	0x7d6f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39486,8 +39561,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL316
-	.4byte	0x9238
-	.4byte	0x7d25
+	.4byte	0x92ab
+	.4byte	0x7d8c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39503,8 +39578,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL318
-	.4byte	0x9238
-	.4byte	0x7d42
+	.4byte	0x92ab
+	.4byte	0x7da9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39520,8 +39595,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL320
-	.4byte	0x9238
-	.4byte	0x7d5f
+	.4byte	0x92ab
+	.4byte	0x7dc6
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39537,8 +39612,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL322
-	.4byte	0x9238
-	.4byte	0x7d7c
+	.4byte	0x92ab
+	.4byte	0x7de3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39554,8 +39629,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL324
-	.4byte	0x9238
-	.4byte	0x7d99
+	.4byte	0x92ab
+	.4byte	0x7e00
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39571,8 +39646,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL326
-	.4byte	0x9238
-	.4byte	0x7db6
+	.4byte	0x92ab
+	.4byte	0x7e1d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39588,8 +39663,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL328
-	.4byte	0x9238
-	.4byte	0x7dd3
+	.4byte	0x92ab
+	.4byte	0x7e3a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39605,8 +39680,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL330
-	.4byte	0x9238
-	.4byte	0x7df0
+	.4byte	0x92ab
+	.4byte	0x7e57
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39622,8 +39697,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL332
-	.4byte	0x9238
-	.4byte	0x7e0d
+	.4byte	0x92ab
+	.4byte	0x7e74
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39639,8 +39714,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL334
-	.4byte	0x9238
-	.4byte	0x7e2a
+	.4byte	0x92ab
+	.4byte	0x7e91
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39656,8 +39731,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL336
-	.4byte	0x9238
-	.4byte	0x7e47
+	.4byte	0x92ab
+	.4byte	0x7eae
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39673,8 +39748,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL338
-	.4byte	0x9238
-	.4byte	0x7e64
+	.4byte	0x92ab
+	.4byte	0x7ecb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39690,8 +39765,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL340
-	.4byte	0x9238
-	.4byte	0x7e81
+	.4byte	0x92ab
+	.4byte	0x7ee8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39707,8 +39782,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL342
-	.4byte	0x9238
-	.4byte	0x7e9e
+	.4byte	0x92ab
+	.4byte	0x7f05
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39724,8 +39799,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL344
-	.4byte	0x9238
-	.4byte	0x7ebb
+	.4byte	0x92ab
+	.4byte	0x7f22
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39741,8 +39816,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL346
-	.4byte	0x9238
-	.4byte	0x7ed8
+	.4byte	0x92ab
+	.4byte	0x7f3f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39758,8 +39833,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL348
-	.4byte	0x9238
-	.4byte	0x7ef5
+	.4byte	0x92ab
+	.4byte	0x7f5c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39775,8 +39850,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL350
-	.4byte	0x9238
-	.4byte	0x7f12
+	.4byte	0x92ab
+	.4byte	0x7f79
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39792,8 +39867,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL352
-	.4byte	0x9238
-	.4byte	0x7f2f
+	.4byte	0x92ab
+	.4byte	0x7f96
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39809,8 +39884,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL354
-	.4byte	0x9238
-	.4byte	0x7f4c
+	.4byte	0x92ab
+	.4byte	0x7fb3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39826,8 +39901,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL356
-	.4byte	0x9238
-	.4byte	0x7f69
+	.4byte	0x92ab
+	.4byte	0x7fd0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39843,8 +39918,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL358
-	.4byte	0x9238
-	.4byte	0x7f86
+	.4byte	0x92ab
+	.4byte	0x7fed
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39860,8 +39935,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL360
-	.4byte	0x9238
-	.4byte	0x7fa3
+	.4byte	0x92ab
+	.4byte	0x800a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39877,8 +39952,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL362
-	.4byte	0x9238
-	.4byte	0x7fc0
+	.4byte	0x92ab
+	.4byte	0x8027
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39894,8 +39969,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL364
-	.4byte	0x9238
-	.4byte	0x7fdd
+	.4byte	0x92ab
+	.4byte	0x8044
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39911,8 +39986,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL366
-	.4byte	0x9238
-	.4byte	0x7ffa
+	.4byte	0x92ab
+	.4byte	0x8061
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39928,8 +40003,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL368
-	.4byte	0x9238
-	.4byte	0x8017
+	.4byte	0x92ab
+	.4byte	0x807e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39945,8 +40020,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL370
-	.4byte	0x9238
-	.4byte	0x8034
+	.4byte	0x92ab
+	.4byte	0x809b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39962,8 +40037,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL372
-	.4byte	0x9238
-	.4byte	0x8051
+	.4byte	0x92ab
+	.4byte	0x80b8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39979,8 +40054,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL374
-	.4byte	0x9238
-	.4byte	0x806e
+	.4byte	0x92ab
+	.4byte	0x80d5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39996,8 +40071,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL376
-	.4byte	0x9238
-	.4byte	0x808b
+	.4byte	0x92ab
+	.4byte	0x80f2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40013,8 +40088,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL378
-	.4byte	0x9238
-	.4byte	0x80a8
+	.4byte	0x92ab
+	.4byte	0x810f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40030,8 +40105,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL380
-	.4byte	0x9238
-	.4byte	0x80c5
+	.4byte	0x92ab
+	.4byte	0x812c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40047,8 +40122,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL382
-	.4byte	0x9238
-	.4byte	0x80e2
+	.4byte	0x92ab
+	.4byte	0x8149
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40064,8 +40139,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL384
-	.4byte	0x9238
-	.4byte	0x80ff
+	.4byte	0x92ab
+	.4byte	0x8166
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40081,8 +40156,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL386
-	.4byte	0x9238
-	.4byte	0x811c
+	.4byte	0x92ab
+	.4byte	0x8183
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40098,8 +40173,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL388
-	.4byte	0x9238
-	.4byte	0x8139
+	.4byte	0x92ab
+	.4byte	0x81a0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40115,8 +40190,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL390
-	.4byte	0x9238
-	.4byte	0x8156
+	.4byte	0x92ab
+	.4byte	0x81bd
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40132,8 +40207,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL392
-	.4byte	0x9238
-	.4byte	0x8173
+	.4byte	0x92ab
+	.4byte	0x81da
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40149,8 +40224,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL394
-	.4byte	0x9238
-	.4byte	0x8190
+	.4byte	0x92ab
+	.4byte	0x81f7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40166,8 +40241,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL396
-	.4byte	0x9238
-	.4byte	0x81ad
+	.4byte	0x92ab
+	.4byte	0x8214
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40183,8 +40258,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL398
-	.4byte	0x9238
-	.4byte	0x81ca
+	.4byte	0x92ab
+	.4byte	0x8231
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40200,8 +40275,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL400
-	.4byte	0x9238
-	.4byte	0x81e7
+	.4byte	0x92ab
+	.4byte	0x824e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40217,8 +40292,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL402
-	.4byte	0x9238
-	.4byte	0x8204
+	.4byte	0x92ab
+	.4byte	0x826b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40234,8 +40309,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL404
-	.4byte	0x9238
-	.4byte	0x8221
+	.4byte	0x92ab
+	.4byte	0x8288
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40251,8 +40326,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL406
-	.4byte	0x9238
-	.4byte	0x823e
+	.4byte	0x92ab
+	.4byte	0x82a5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40268,8 +40343,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL408
-	.4byte	0x9238
-	.4byte	0x825b
+	.4byte	0x92ab
+	.4byte	0x82c2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40285,8 +40360,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL410
-	.4byte	0x9238
-	.4byte	0x8278
+	.4byte	0x92ab
+	.4byte	0x82df
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40302,8 +40377,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL412
-	.4byte	0x9238
-	.4byte	0x8295
+	.4byte	0x92ab
+	.4byte	0x82fc
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40319,8 +40394,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL414
-	.4byte	0x9238
-	.4byte	0x82b2
+	.4byte	0x92ab
+	.4byte	0x8319
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40336,8 +40411,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL416
-	.4byte	0x9238
-	.4byte	0x82cf
+	.4byte	0x92ab
+	.4byte	0x8336
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40353,8 +40428,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL418
-	.4byte	0x9238
-	.4byte	0x82ec
+	.4byte	0x92ab
+	.4byte	0x8353
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40370,8 +40445,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL420
-	.4byte	0x9238
-	.4byte	0x8309
+	.4byte	0x92ab
+	.4byte	0x8370
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40387,8 +40462,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL422
-	.4byte	0x9238
-	.4byte	0x8326
+	.4byte	0x92ab
+	.4byte	0x838d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40404,8 +40479,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL424
-	.4byte	0x9238
-	.4byte	0x8343
+	.4byte	0x92ab
+	.4byte	0x83aa
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40421,8 +40496,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL426
-	.4byte	0x9238
-	.4byte	0x8360
+	.4byte	0x92ab
+	.4byte	0x83c7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40438,11 +40513,11 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x44
 	.4byte	.LVL428
-	.4byte	0x3894
+	.4byte	0x38fb
 	.uleb128 0x32
 	.4byte	.LVL429
-	.4byte	0x9238
-	.4byte	0x8386
+	.4byte	0x92ab
+	.4byte	0x83ed
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40458,11 +40533,11 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x44
 	.4byte	.LVL431
-	.4byte	0x383b
+	.4byte	0x38a2
 	.uleb128 0x32
 	.4byte	.LVL432
-	.4byte	0x9238
-	.4byte	0x83ac
+	.4byte	0x92ab
+	.4byte	0x8413
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40478,7 +40553,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x34
 	.4byte	.LVL435
-	.4byte	0x9238
+	.4byte	0x92ab
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40493,133 +40568,133 @@ __func__.9940:
 	.4byte	.LC67
 	.byte	0
 	.byte	0
-	.uleb128 0x6c
+	.uleb128 0x6e
 	.4byte	0x27b7
-	.4byte	.LFB351
-	.4byte	.LFE351-.LFB351
+	.4byte	.LFB352
+	.4byte	.LFE352-.LFB352
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8420
-	.uleb128 0x5c
+	.4byte	0x8487
+	.uleb128 0x46
 	.4byte	0x27d2
 	.4byte	.LLST0
-	.uleb128 0x5c
+	.uleb128 0x46
 	.4byte	0x27dd
 	.4byte	.LLST1
-	.uleb128 0x6d
+	.uleb128 0x6f
 	.4byte	0x27c7
-	.uleb128 0x6e
+	.uleb128 0x70
 	.4byte	0x27e8
-	.uleb128 0x6e
+	.uleb128 0x70
 	.4byte	0x27f3
-	.uleb128 0x6f
+	.uleb128 0x71
 	.4byte	0x27fe
 	.4byte	.LLST2
-	.uleb128 0x6f
+	.uleb128 0x71
 	.4byte	0x2809
 	.4byte	.LLST3
-	.uleb128 0x6f
+	.uleb128 0x71
 	.4byte	0x2814
 	.4byte	.LLST4
-	.uleb128 0x6e
+	.uleb128 0x70
 	.4byte	0x281f
-	.uleb128 0x6e
+	.uleb128 0x70
 	.4byte	0x282a
 	.byte	0
-	.uleb128 0x70
-	.4byte	0x4ad9
-	.4byte	.LFB358
-	.4byte	.LFE358-.LFB358
+	.uleb128 0x72
+	.4byte	0x4b40
+	.4byte	.LFB359
+	.4byte	.LFE359-.LFB359
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8449
-	.uleb128 0x5c
-	.4byte	0x4ae6
+	.4byte	0x84b0
+	.uleb128 0x46
+	.4byte	0x4b4d
 	.4byte	.LLST5
-	.uleb128 0x71
-	.4byte	0x4af2
+	.uleb128 0x73
+	.4byte	0x4b59
 	.uleb128 0x6
 	.byte	0xfa
-	.4byte	0x4af2
+	.4byte	0x4b59
 	.byte	0x9f
 	.byte	0
-	.uleb128 0x70
-	.4byte	0x7aa5
+	.uleb128 0x72
+	.4byte	0x7b0c
 	.4byte	.LFB206
 	.4byte	.LFE206-.LFB206
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8464
-	.uleb128 0x71
-	.4byte	0x7ab1
+	.4byte	0x84cb
+	.uleb128 0x73
+	.4byte	0x7b18
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0
-	.uleb128 0x70
-	.4byte	0x76e9
+	.uleb128 0x72
+	.4byte	0x7750
 	.4byte	.LFB211
 	.4byte	.LFE211-.LFB211
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x849c
-	.uleb128 0x5c
-	.4byte	0x76fa
+	.4byte	0x8503
+	.uleb128 0x46
+	.4byte	0x7761
 	.4byte	.LLST12
-	.uleb128 0x6e
-	.4byte	0x7706
-	.uleb128 0x72
+	.uleb128 0x70
+	.4byte	0x776d
+	.uleb128 0x74
 	.4byte	.Ldebug_ranges0+0
-	.uleb128 0x6d
-	.4byte	0x76fa
-	.uleb128 0x72
+	.uleb128 0x6f
+	.4byte	0x7761
+	.uleb128 0x74
 	.4byte	.Ldebug_ranges0+0
-	.uleb128 0x6e
-	.4byte	0x8480
+	.uleb128 0x70
+	.4byte	0x84e7
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x73
-	.4byte	0x67bd
+	.uleb128 0x75
+	.4byte	0x6824
 	.4byte	.LFB227
 	.4byte	.LFE227-.LFB227
 	.uleb128 0x1
 	.byte	0x9c
-	.uleb128 0x73
-	.4byte	0x5fac
+	.uleb128 0x75
+	.4byte	0x6013
 	.4byte	.LFB241
 	.4byte	.LFE241-.LFB241
 	.uleb128 0x1
 	.byte	0x9c
-	.uleb128 0x73
-	.4byte	0x5fa0
+	.uleb128 0x75
+	.4byte	0x6007
 	.4byte	.LFB242
 	.4byte	.LFE242-.LFB242
 	.uleb128 0x1
 	.byte	0x9c
-	.uleb128 0x70
-	.4byte	0x5d75
+	.uleb128 0x72
+	.4byte	0x5ddc
 	.4byte	.LFB248
 	.4byte	.LFE248-.LFB248
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8530
-	.uleb128 0x5c
-	.4byte	0x5d81
+	.4byte	0x8597
+	.uleb128 0x46
+	.4byte	0x5de8
 	.4byte	.LLST52
-	.uleb128 0x6e
-	.4byte	0x5d8c
+	.uleb128 0x70
+	.4byte	0x5df3
 	.uleb128 0x3e
 	.4byte	.Ldebug_ranges0+0x30
-	.4byte	0x8526
-	.uleb128 0x6d
-	.4byte	0x5d81
-	.uleb128 0x72
+	.4byte	0x858d
+	.uleb128 0x6f
+	.4byte	0x5de8
+	.uleb128 0x74
 	.4byte	.Ldebug_ranges0+0x30
-	.uleb128 0x6e
-	.4byte	0x84e5
+	.uleb128 0x70
+	.4byte	0x854c
 	.uleb128 0x2d
 	.4byte	.LVL144
-	.4byte	0x9222
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40643,32 +40718,32 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x44
 	.4byte	.LVL142
-	.4byte	0x5ce3
+	.4byte	0x5d4a
 	.byte	0
-	.uleb128 0x70
-	.4byte	0x5d9a
+	.uleb128 0x72
+	.4byte	0x5e01
 	.4byte	.LFB247
 	.4byte	.LFE247-.LFB247
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8597
-	.uleb128 0x5c
-	.4byte	0x5da6
+	.4byte	0x85fe
+	.uleb128 0x46
+	.4byte	0x5e0d
 	.4byte	.LLST58
-	.uleb128 0x6e
-	.4byte	0x5db1
+	.uleb128 0x70
+	.4byte	0x5e18
 	.uleb128 0x3e
 	.4byte	.Ldebug_ranges0+0x48
-	.4byte	0x858d
-	.uleb128 0x6d
-	.4byte	0x5da6
-	.uleb128 0x72
+	.4byte	0x85f4
+	.uleb128 0x6f
+	.4byte	0x5e0d
+	.uleb128 0x74
 	.4byte	.Ldebug_ranges0+0x48
-	.uleb128 0x6e
-	.4byte	0x854c
+	.uleb128 0x70
+	.4byte	0x85b3
 	.uleb128 0x2d
 	.4byte	.LVL163
-	.4byte	0x9222
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40692,70 +40767,70 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x44
 	.4byte	.LVL161
-	.4byte	0x5c6a
+	.4byte	0x5cd1
 	.byte	0
-	.uleb128 0x70
-	.4byte	0x5a4e
+	.uleb128 0x72
+	.4byte	0x5ab5
 	.4byte	.LFB255
 	.4byte	.LFE255-.LFB255
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x86b8
-	.uleb128 0x5c
-	.4byte	0x5a5f
+	.4byte	0x871f
+	.uleb128 0x46
+	.4byte	0x5ac6
 	.4byte	.LLST70
-	.uleb128 0x6e
-	.4byte	0x5a6b
-	.uleb128 0x6e
-	.4byte	0x5a77
-	.uleb128 0x6e
-	.4byte	0x5a83
-	.uleb128 0x6e
-	.4byte	0x5a8f
-	.uleb128 0x6e
-	.4byte	0x5a9b
-	.uleb128 0x6e
-	.4byte	0x5aa7
-	.uleb128 0x6e
-	.4byte	0x5ab3
-	.uleb128 0x6e
-	.4byte	0x5abf
-	.uleb128 0x67
-	.4byte	.LBB189
-	.4byte	.LBE189-.LBB189
-	.uleb128 0x5c
-	.4byte	0x5a5f
+	.uleb128 0x70
+	.4byte	0x5ad2
+	.uleb128 0x70
+	.4byte	0x5ade
+	.uleb128 0x70
+	.4byte	0x5aea
+	.uleb128 0x70
+	.4byte	0x5af6
+	.uleb128 0x70
+	.4byte	0x5b02
+	.uleb128 0x70
+	.4byte	0x5b0e
+	.uleb128 0x70
+	.4byte	0x5b1a
+	.uleb128 0x70
+	.4byte	0x5b26
+	.uleb128 0x69
+	.4byte	.LBB191
+	.4byte	.LBE191-.LBB191
+	.uleb128 0x46
+	.4byte	0x5ac6
 	.4byte	.LLST71
-	.uleb128 0x67
-	.4byte	.LBB190
-	.4byte	.LBE190-.LBB190
-	.uleb128 0x6f
-	.4byte	0x85b3
+	.uleb128 0x69
+	.4byte	.LBB192
+	.4byte	.LBE192-.LBB192
+	.uleb128 0x71
+	.4byte	0x861a
 	.4byte	.LLST72
-	.uleb128 0x6f
-	.4byte	0x85b8
+	.uleb128 0x71
+	.4byte	0x861f
 	.4byte	.LLST73
-	.uleb128 0x6f
-	.4byte	0x85bd
+	.uleb128 0x71
+	.4byte	0x8624
 	.4byte	.LLST74
-	.uleb128 0x6f
-	.4byte	0x85c2
+	.uleb128 0x71
+	.4byte	0x8629
 	.4byte	.LLST75
-	.uleb128 0x6f
-	.4byte	0x85c7
+	.uleb128 0x71
+	.4byte	0x862e
 	.4byte	.LLST76
-	.uleb128 0x6f
-	.4byte	0x85cc
+	.uleb128 0x71
+	.4byte	0x8633
 	.4byte	.LLST77
-	.uleb128 0x6f
-	.4byte	0x85d1
+	.uleb128 0x71
+	.4byte	0x8638
 	.4byte	.LLST78
-	.uleb128 0x6e
-	.4byte	0x85d6
+	.uleb128 0x70
+	.4byte	0x863d
 	.uleb128 0x32
 	.4byte	.LVL206
-	.4byte	0x9222
-	.4byte	0x8661
+	.4byte	0x9289
+	.4byte	0x86c8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40777,8 +40852,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL213
-	.4byte	0x5bca
-	.4byte	0x867e
+	.4byte	0x5c31
+	.4byte	0x86e5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40794,8 +40869,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL214
-	.4byte	0x9222
-	.4byte	0x86a5
+	.4byte	0x9289
+	.4byte	0x870c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40817,7 +40892,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x34
 	.4byte	.LVL215
-	.4byte	0x5d75
+	.4byte	0x5ddc
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40828,43 +40903,43 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x70
-	.4byte	0x57e5
+	.uleb128 0x72
+	.4byte	0x584c
 	.4byte	.LFB258
 	.4byte	.LFE258-.LFB258
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8748
-	.uleb128 0x5c
-	.4byte	0x57f6
+	.4byte	0x87af
+	.uleb128 0x46
+	.4byte	0x585d
 	.4byte	.LLST79
-	.uleb128 0x6f
-	.4byte	0x5802
+	.uleb128 0x71
+	.4byte	0x5869
 	.4byte	.LLST80
-	.uleb128 0x6f
-	.4byte	0x580e
+	.uleb128 0x71
+	.4byte	0x5875
 	.4byte	.LLST81
-	.uleb128 0x6e
-	.4byte	0x581a
-	.uleb128 0x5f
-	.4byte	.LBB193
-	.4byte	.LBE193-.LBB193
-	.4byte	0x873e
-	.uleb128 0x5c
-	.4byte	0x57f6
+	.uleb128 0x70
+	.4byte	0x5881
+	.uleb128 0x61
+	.4byte	.LBB195
+	.4byte	.LBE195-.LBB195
+	.4byte	0x87a5
+	.uleb128 0x46
+	.4byte	0x585d
 	.4byte	.LLST82
-	.uleb128 0x67
-	.4byte	.LBB194
-	.4byte	.LBE194-.LBB194
-	.uleb128 0x6e
-	.4byte	0x86d4
-	.uleb128 0x6e
-	.4byte	0x86dd
-	.uleb128 0x6e
-	.4byte	0x86e6
+	.uleb128 0x69
+	.4byte	.LBB196
+	.4byte	.LBE196-.LBB196
+	.uleb128 0x70
+	.4byte	0x873b
+	.uleb128 0x70
+	.4byte	0x8744
+	.uleb128 0x70
+	.4byte	0x874d
 	.uleb128 0x34
 	.4byte	.LVL220
-	.4byte	0x9222
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40888,171 +40963,171 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x44
 	.4byte	.LVL222
-	.4byte	0x5dbf
+	.4byte	0x5e26
 	.byte	0
-	.uleb128 0x70
-	.4byte	0x4f5b
+	.uleb128 0x72
+	.4byte	0x4fc2
 	.4byte	.LFB269
 	.4byte	.LFE269-.LFB269
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8786
-	.uleb128 0x5c
-	.4byte	0x4f68
+	.4byte	0x87ed
+	.uleb128 0x46
+	.4byte	0x4fcf
 	.4byte	.LLST86
-	.uleb128 0x74
-	.4byte	0x4f74
+	.uleb128 0x76
+	.4byte	0x4fdb
 	.byte	0
-	.uleb128 0x72
+	.uleb128 0x74
 	.4byte	.Ldebug_ranges0+0x60
-	.uleb128 0x71
-	.4byte	0x4f68
+	.uleb128 0x73
+	.4byte	0x4fcf
 	.uleb128 0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.uleb128 0x72
+	.uleb128 0x74
 	.4byte	.Ldebug_ranges0+0x60
-	.uleb128 0x6e
-	.4byte	0x8764
+	.uleb128 0x70
+	.4byte	0x87cb
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x70
-	.4byte	0x4ad9
+	.uleb128 0x72
+	.4byte	0x4b40
 	.4byte	.LFB275
 	.4byte	.LFE275-.LFB275
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x87bf
-	.uleb128 0x5c
-	.4byte	0x4ae6
+	.4byte	0x8826
+	.uleb128 0x46
+	.4byte	0x4b4d
 	.4byte	.LLST87
-	.uleb128 0x5c
-	.4byte	0x4af2
+	.uleb128 0x46
+	.4byte	0x4b59
 	.4byte	.LLST88
 	.uleb128 0x2d
 	.4byte	.LVL248
-	.4byte	0x8420
+	.4byte	0x8487
 	.uleb128 0x3c
-	.4byte	0x4af2
+	.4byte	0x4b59
 	.uleb128 0x3
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0
 	.byte	0
-	.uleb128 0x70
-	.4byte	0x3fe1
+	.uleb128 0x72
+	.4byte	0x4048
 	.4byte	.LFB285
 	.4byte	.LFE285-.LFB285
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8805
-	.uleb128 0x71
-	.4byte	0x3fee
+	.4byte	0x886c
+	.uleb128 0x73
+	.4byte	0x4055
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x6e
-	.4byte	0x3ffa
-	.uleb128 0x67
-	.4byte	.LBB207
-	.4byte	.LBE207-.LBB207
-	.uleb128 0x5c
-	.4byte	0x3fee
+	.uleb128 0x70
+	.4byte	0x4061
+	.uleb128 0x69
+	.4byte	.LBB209
+	.4byte	.LBE209-.LBB209
+	.uleb128 0x46
+	.4byte	0x4055
 	.4byte	.LLST93
-	.uleb128 0x67
-	.4byte	.LBB208
-	.4byte	.LBE208-.LBB208
-	.uleb128 0x6f
-	.4byte	0x87d9
+	.uleb128 0x69
+	.4byte	.LBB210
+	.4byte	.LBE210-.LBB210
+	.uleb128 0x71
+	.4byte	0x8840
 	.4byte	.LLST94
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x70
-	.4byte	0x375c
+	.uleb128 0x72
+	.4byte	0x37c3
 	.4byte	.LFB300
 	.4byte	.LFE300-.LFB300
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x883e
-	.uleb128 0x5c
-	.4byte	0x376d
+	.4byte	0x88a5
+	.uleb128 0x46
+	.4byte	0x37d4
 	.4byte	.LLST120
-	.uleb128 0x67
-	.4byte	.LBB213
-	.4byte	.LBE213-.LBB213
-	.uleb128 0x5c
-	.4byte	0x376d
+	.uleb128 0x69
+	.4byte	.LBB215
+	.4byte	.LBE215-.LBB215
+	.uleb128 0x46
+	.4byte	0x37d4
 	.4byte	.LLST121
 	.uleb128 0x44
 	.4byte	.LVL487
-	.4byte	0x5d9a
+	.4byte	0x5e01
 	.byte	0
 	.byte	0
-	.uleb128 0x70
-	.4byte	0x2b28
+	.uleb128 0x72
+	.4byte	0x2b8f
 	.4byte	.LFB319
 	.4byte	.LFE319-.LFB319
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8864
+	.4byte	0x88cb
 	.uleb128 0x44
 	.4byte	.LVL547
-	.4byte	0x6122
+	.4byte	0x6189
 	.uleb128 0x44
 	.4byte	.LVL548
-	.4byte	0x2bbf
+	.4byte	0x2c26
 	.byte	0
-	.uleb128 0x70
-	.4byte	0x2a7e
+	.uleb128 0x72
+	.4byte	0x2ae5
 	.4byte	.LFB321
 	.4byte	.LFE321-.LFB321
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8931
-	.uleb128 0x74
-	.4byte	0x2a8f
+	.4byte	0x8998
+	.uleb128 0x76
+	.4byte	0x2af6
 	.byte	0
-	.uleb128 0x6e
-	.4byte	0x2a9b
-	.uleb128 0x6e
-	.4byte	0x2aa5
-	.uleb128 0x6e
-	.4byte	0x2ab1
+	.uleb128 0x70
+	.4byte	0x2b02
+	.uleb128 0x70
+	.4byte	0x2b0c
+	.uleb128 0x70
+	.4byte	0x2b18
 	.uleb128 0x3e
 	.4byte	.Ldebug_ranges0+0xb8
-	.4byte	0x8913
-	.uleb128 0x6e
-	.4byte	0x8877
-	.uleb128 0x6f
-	.4byte	0x887d
-	.4byte	.LLST238
-	.uleb128 0x75
-	.4byte	0x8882
+	.4byte	0x897a
+	.uleb128 0x70
+	.4byte	0x88de
+	.uleb128 0x71
+	.4byte	0x88e4
+	.4byte	.LLST240
+	.uleb128 0x77
+	.4byte	0x88e9
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -104
-	.uleb128 0x75
-	.4byte	0x8887
+	.uleb128 0x77
+	.4byte	0x88ee
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -80
-	.uleb128 0x5f
-	.4byte	.LBB234
-	.4byte	.LBE234-.LBB234
-	.4byte	0x88fd
-	.uleb128 0x75
-	.4byte	0x2ac2
+	.uleb128 0x61
+	.4byte	.LBB238
+	.4byte	.LBE238-.LBB238
+	.4byte	0x8964
+	.uleb128 0x77
+	.4byte	0x2b29
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -100
 	.uleb128 0x32
-	.4byte	.LVL918
+	.4byte	.LVL920
 	.4byte	0x26b9
-	.4byte	0x88ea
+	.4byte	0x8951
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41071,15 +41146,15 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL919
-	.4byte	0x6122
+	.4byte	.LVL921
+	.4byte	0x6189
 	.uleb128 0x44
-	.4byte	.LVL920
-	.4byte	0x2bbf
+	.4byte	.LVL922
+	.4byte	0x2c26
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL917
-	.4byte	0x5212
+	.4byte	.LVL919
+	.4byte	0x5279
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -41093,11 +41168,11 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.byte	0
-	.uleb128 0x67
-	.4byte	.LBB237
-	.4byte	.LBE237-.LBB237
-	.uleb128 0x75
-	.4byte	0x2ad0
+	.uleb128 0x69
+	.4byte	.LBB241
+	.4byte	.LBE241-.LBB241
+	.uleb128 0x77
+	.4byte	0x2b37
 	.uleb128 0xd
 	.byte	0x40
 	.byte	0x45
@@ -41111,51 +41186,51 @@ __func__.9940:
 	.byte	0x9f
 	.byte	0
 	.byte	0
-	.uleb128 0x70
+	.uleb128 0x72
 	.4byte	0x2410
-	.4byte	.LFB346
-	.4byte	.LFE346-.LFB346
+	.4byte	.LFB347
+	.4byte	.LFE347-.LFB347
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8a39
-	.uleb128 0x5c
+	.4byte	0x8aa0
+	.uleb128 0x46
 	.4byte	0x2420
-	.4byte	.LLST280
-	.uleb128 0x74
+	.4byte	.LLST282
+	.uleb128 0x76
 	.4byte	0x242b
 	.byte	0
-	.uleb128 0x6e
+	.uleb128 0x70
 	.4byte	0x2436
-	.uleb128 0x6e
+	.uleb128 0x70
 	.4byte	0x2441
-	.uleb128 0x67
-	.4byte	.LBB241
-	.4byte	.LBE241-.LBB241
-	.uleb128 0x5c
+	.uleb128 0x69
+	.4byte	.LBB245
+	.4byte	.LBE245-.LBB245
+	.uleb128 0x46
 	.4byte	0x2420
-	.4byte	.LLST281
-	.uleb128 0x67
-	.4byte	.LBB242
-	.4byte	.LBE242-.LBB242
-	.uleb128 0x6e
-	.4byte	0x894d
-	.uleb128 0x75
-	.4byte	0x8953
+	.4byte	.LLST283
+	.uleb128 0x69
+	.4byte	.LBB246
+	.4byte	.LBE246-.LBB246
+	.uleb128 0x70
+	.4byte	0x89b4
+	.uleb128 0x77
+	.4byte	0x89ba
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -80
-	.uleb128 0x75
-	.4byte	0x8958
+	.uleb128 0x77
+	.4byte	0x89bf
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -100
-	.uleb128 0x76
+	.uleb128 0x78
 	.4byte	0x244c
 	.4byte	.LDL1
 	.uleb128 0x32
-	.4byte	.LVL1143
+	.4byte	.LVL1145
 	.4byte	0x230c
-	.4byte	0x89b9
+	.4byte	0x8a20
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41176,9 +41251,9 @@ __func__.9940:
 	.byte	0x20
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1144
+	.4byte	.LVL1146
 	.4byte	0x230c
-	.4byte	0x89d8
+	.4byte	0x8a3f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41198,9 +41273,9 @@ __func__.9940:
 	.byte	0x38
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1145
+	.4byte	.LVL1147
 	.4byte	0x2464
-	.4byte	0x89f7
+	.4byte	0x8a5e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41219,9 +41294,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1146
+	.4byte	.LVL1148
 	.4byte	0x251a
-	.4byte	0x8a1b
+	.4byte	0x8a82
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41245,7 +41320,7 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1148
+	.4byte	.LVL1150
 	.4byte	0x2464
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -41267,50 +41342,50 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x70
-	.4byte	0x2ade
+	.uleb128 0x72
+	.4byte	0x2b45
 	.4byte	.LFB320
 	.4byte	.LFE320-.LFB320
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8af2
-	.uleb128 0x5c
-	.4byte	0x2aef
-	.4byte	.LLST301
-	.uleb128 0x6e
-	.4byte	0x2afb
-	.uleb128 0x6e
-	.4byte	0x2b07
-	.uleb128 0x6e
-	.4byte	0x2b11
-	.uleb128 0x6e
-	.4byte	0x2b1b
-	.uleb128 0x72
-	.4byte	.Ldebug_ranges0+0xe8
-	.uleb128 0x6d
-	.4byte	0x2aef
-	.uleb128 0x72
-	.4byte	.Ldebug_ranges0+0xe8
-	.uleb128 0x6f
-	.4byte	0x8a55
-	.4byte	.LLST302
-	.uleb128 0x6f
-	.4byte	0x8a5a
+	.4byte	0x8b59
+	.uleb128 0x46
+	.4byte	0x2b56
 	.4byte	.LLST303
+	.uleb128 0x70
+	.4byte	0x2b62
+	.uleb128 0x70
+	.4byte	0x2b6e
+	.uleb128 0x70
+	.4byte	0x2b78
+	.uleb128 0x70
+	.4byte	0x2b82
+	.uleb128 0x74
+	.4byte	.Ldebug_ranges0+0xe8
 	.uleb128 0x6f
-	.4byte	0x8a5f
+	.4byte	0x2b56
+	.uleb128 0x74
+	.4byte	.Ldebug_ranges0+0xe8
+	.uleb128 0x71
+	.4byte	0x8abc
 	.4byte	.LLST304
-	.uleb128 0x75
-	.4byte	0x8a64
+	.uleb128 0x71
+	.4byte	0x8ac1
+	.4byte	.LLST305
+	.uleb128 0x71
+	.4byte	0x8ac6
+	.4byte	.LLST306
+	.uleb128 0x77
+	.4byte	0x8acb
 	.uleb128 0x1
 	.byte	0x5b
 	.uleb128 0x44
-	.4byte	.LVL1226
-	.4byte	0x2b28
-	.uleb128 0x32
 	.4byte	.LVL1228
-	.4byte	0x6192
-	.4byte	0x8ab7
+	.4byte	0x2b8f
+	.uleb128 0x32
+	.4byte	.LVL1230
+	.4byte	0x61f9
+	.4byte	0x8b1e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -41319,9 +41394,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1234
-	.4byte	0x9222
-	.4byte	0x8ad2
+	.4byte	.LVL1236
+	.4byte	0x9289
+	.4byte	0x8b39
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41337,9 +41412,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1235
-	.4byte	0x6828
-	.4byte	0x8ae6
+	.4byte	.LVL1237
+	.4byte	0x688f
+	.4byte	0x8b4d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41348,39 +41423,39 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1236
-	.4byte	0x65f0
+	.4byte	.LVL1238
+	.4byte	0x6657
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x70
-	.4byte	0x3297
+	.uleb128 0x72
+	.4byte	0x32fe
 	.4byte	.LFB304
 	.4byte	.LFE304-.LFB304
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8bd2
-	.uleb128 0x5c
-	.4byte	0x32a8
-	.4byte	.LLST305
-	.uleb128 0x6e
-	.4byte	0x32b4
-	.uleb128 0x5f
-	.4byte	.LBB257
-	.4byte	.LBE257-.LBB257
-	.4byte	0x8bc8
-	.uleb128 0x5c
-	.4byte	0x32a8
-	.4byte	.LLST306
-	.uleb128 0x67
-	.4byte	.LBB258
-	.4byte	.LBE258-.LBB258
-	.uleb128 0x6e
-	.4byte	0x8b0e
+	.4byte	0x8c39
+	.uleb128 0x46
+	.4byte	0x330f
+	.4byte	.LLST307
+	.uleb128 0x70
+	.4byte	0x331b
+	.uleb128 0x61
+	.4byte	.LBB261
+	.4byte	.LBE261-.LBB261
+	.4byte	0x8c2f
+	.uleb128 0x46
+	.4byte	0x330f
+	.4byte	.LLST308
+	.uleb128 0x69
+	.4byte	.LBB262
+	.4byte	.LBE262-.LBB262
+	.uleb128 0x70
+	.4byte	0x8b75
 	.uleb128 0x32
-	.4byte	.LVL1246
-	.4byte	0x5bca
-	.4byte	0x8b54
+	.4byte	.LVL1248
+	.4byte	0x5c31
+	.4byte	0x8bbb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41395,9 +41470,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1247
-	.4byte	0x9222
-	.4byte	0x8b7b
+	.4byte	.LVL1249
+	.4byte	0x9289
+	.4byte	0x8be2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41418,9 +41493,9 @@ __func__.9940:
 	.2byte	0xa88
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1248
-	.4byte	0x375c
-	.4byte	0x8b8f
+	.4byte	.LVL1250
+	.4byte	0x37c3
+	.4byte	0x8bf6
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41429,9 +41504,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1249
-	.4byte	0x2ade
-	.4byte	0x8ba3
+	.4byte	.LVL1251
+	.4byte	0x2b45
+	.4byte	0x8c0a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41440,8 +41515,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1250
-	.4byte	0x9222
+	.4byte	.LVL1252
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41464,41 +41539,41 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1254
-	.4byte	0x5a4e
+	.4byte	.LVL1256
+	.4byte	0x5ab5
 	.byte	0
-	.uleb128 0x70
-	.4byte	0x4e75
+	.uleb128 0x72
+	.4byte	0x4edc
 	.4byte	.LFB271
 	.4byte	.LFE271-.LFB271
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8caa
-	.uleb128 0x72
+	.4byte	0x8d11
+	.uleb128 0x74
 	.4byte	.Ldebug_ranges0+0x108
-	.uleb128 0x6f
-	.4byte	0x4e83
-	.4byte	.LLST309
-	.uleb128 0x75
-	.4byte	0x4e8f
+	.uleb128 0x71
+	.4byte	0x4eea
+	.4byte	.LLST311
+	.uleb128 0x77
+	.4byte	0x4ef6
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -56
-	.uleb128 0x6f
-	.4byte	0x4e9b
-	.4byte	.LLST310
-	.uleb128 0x75
-	.4byte	0x4ea7
+	.uleb128 0x71
+	.4byte	0x4f02
+	.4byte	.LLST312
+	.uleb128 0x77
+	.4byte	0x4f0e
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -52
-	.uleb128 0x6f
-	.4byte	0x4eb3
-	.4byte	.LLST311
+	.uleb128 0x71
+	.4byte	0x4f1a
+	.4byte	.LLST313
 	.uleb128 0x32
-	.4byte	.LVL1267
-	.4byte	0x5212
-	.4byte	0x8c35
+	.4byte	.LVL1269
+	.4byte	0x5279
+	.4byte	0x8c9c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41519,9 +41594,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1269
+	.4byte	.LVL1271
 	.4byte	0x26b9
-	.4byte	0x8c54
+	.4byte	0x8cbb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41541,9 +41616,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1273
+	.4byte	.LVL1275
 	.4byte	0x230c
-	.4byte	0x8c68
+	.4byte	0x8ccf
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -41552,9 +41627,9 @@ __func__.9940:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1275
-	.4byte	0x32d7
-	.4byte	0x8c7c
+	.4byte	.LVL1277
+	.4byte	0x333e
+	.4byte	0x8ce3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41563,9 +41638,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1276
+	.4byte	.LVL1278
 	.4byte	0x251a
-	.4byte	0x8c9f
+	.4byte	0x8d06
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41589,20 +41664,20 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1277
-	.4byte	0x31f2
+	.4byte	.LVL1279
+	.4byte	0x3259
 	.byte	0
 	.byte	0
-	.uleb128 0x70
-	.4byte	0x3da3
+	.uleb128 0x72
+	.4byte	0x3e0a
 	.4byte	.LFB289
 	.4byte	.LFE289-.LFB289
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8cdb
+	.4byte	0x8d42
 	.uleb128 0x2d
-	.4byte	.LVL1525
-	.4byte	0x50ef
+	.4byte	.LVL1527
+	.4byte	0x5156
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41621,17 +41696,17 @@ __func__.9940:
 	.4byte	.LANCHOR83
 	.byte	0
 	.byte	0
-	.uleb128 0x70
-	.4byte	0x4aff
+	.uleb128 0x72
+	.4byte	0x4b66
 	.4byte	.LFB274
 	.4byte	.LFE274-.LFB274
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8d32
+	.4byte	0x8d99
 	.uleb128 0x32
-	.4byte	.LVL1551
-	.4byte	0x4fd7
-	.4byte	0x8d02
+	.4byte	.LVL1553
+	.4byte	0x503e
+	.4byte	0x8d69
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41640,9 +41715,9 @@ __func__.9940:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1552
-	.4byte	0x9222
-	.4byte	0x8d22
+	.4byte	.LVL1554
+	.4byte	0x9289
+	.4byte	0x8d89
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41657,7 +41732,7 @@ __func__.9940:
 	.4byte	.LC100
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1553
+	.4byte	.LVL1555
 	.4byte	0x230c
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -41666,17 +41741,17 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.byte	0
-	.uleb128 0x70
-	.4byte	0x2d2c
+	.uleb128 0x72
+	.4byte	0x2d93
 	.4byte	.LFB314
 	.4byte	.LFE314-.LFB314
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8d80
+	.4byte	0x8de7
 	.uleb128 0x32
-	.4byte	.LVL1688
-	.4byte	0x2d35
-	.4byte	0x8d59
+	.4byte	.LVL1690
+	.4byte	0x2d9c
+	.4byte	0x8dc0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41685,9 +41760,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1689
-	.4byte	0x4ec1
-	.4byte	0x8d70
+	.4byte	.LVL1691
+	.4byte	0x4f28
+	.4byte	0x8dd7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41696,8 +41771,8 @@ __func__.9940:
 	.4byte	.LANCHOR144
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1690
-	.4byte	0x2edb
+	.4byte	.LVL1692
+	.4byte	0x2f42
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41705,103 +41780,103 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.byte	0
-	.uleb128 0x70
-	.4byte	0x2996
+	.uleb128 0x72
+	.4byte	0x29fd
 	.4byte	.LFB322
 	.4byte	.LFE322-.LFB322
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x909f
-	.uleb128 0x5c
-	.4byte	0x29a7
-	.4byte	.LLST396
-	.uleb128 0x5c
-	.4byte	0x29b3
-	.4byte	.LLST397
-	.uleb128 0x74
-	.4byte	0x29bf
+	.4byte	0x9106
+	.uleb128 0x46
+	.4byte	0x2a0e
+	.4byte	.LLST398
+	.uleb128 0x46
+	.4byte	0x2a1a
+	.4byte	.LLST399
+	.uleb128 0x76
+	.4byte	0x2a26
 	.byte	0x1
-	.uleb128 0x6e
-	.4byte	0x29cb
-	.uleb128 0x6e
-	.4byte	0x29d7
-	.uleb128 0x77
-	.4byte	0x29e3
+	.uleb128 0x70
+	.4byte	0x2a32
+	.uleb128 0x70
+	.4byte	0x2a3e
+	.uleb128 0x79
+	.4byte	0x2a4a
 	.sleb128 -1
-	.uleb128 0x6e
-	.4byte	0x29ef
-	.uleb128 0x6e
-	.4byte	0x29fb
-	.uleb128 0x6e
-	.4byte	0x2a07
-	.uleb128 0x6e
-	.4byte	0x2a13
-	.uleb128 0x6e
-	.4byte	0x2a1f
-	.uleb128 0x6e
-	.4byte	0x2a2b
-	.uleb128 0x6e
-	.4byte	0x2a47
+	.uleb128 0x70
+	.4byte	0x2a56
+	.uleb128 0x70
+	.4byte	0x2a62
+	.uleb128 0x70
+	.4byte	0x2a6e
+	.uleb128 0x70
+	.4byte	0x2a7a
+	.uleb128 0x70
+	.4byte	0x2a86
+	.uleb128 0x70
+	.4byte	0x2a92
+	.uleb128 0x70
+	.4byte	0x2aae
 	.uleb128 0x3e
 	.4byte	.Ldebug_ranges0+0x158
-	.4byte	0x908f
-	.uleb128 0x5c
-	.4byte	0x29b3
-	.4byte	.LLST398
-	.uleb128 0x5c
-	.4byte	0x29a7
-	.4byte	.LLST399
-	.uleb128 0x72
-	.4byte	.Ldebug_ranges0+0x158
-	.uleb128 0x6e
-	.4byte	0x8da5
-	.uleb128 0x6f
-	.4byte	0x8dab
+	.4byte	0x90f6
+	.uleb128 0x46
+	.4byte	0x2a1a
 	.4byte	.LLST400
-	.uleb128 0x75
-	.4byte	0x8db0
+	.uleb128 0x46
+	.4byte	0x2a0e
+	.4byte	.LLST401
+	.uleb128 0x74
+	.4byte	.Ldebug_ranges0+0x158
+	.uleb128 0x70
+	.4byte	0x8e0c
+	.uleb128 0x71
+	.4byte	0x8e12
+	.4byte	.LLST402
+	.uleb128 0x77
+	.4byte	0x8e17
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -36
-	.uleb128 0x6e
-	.4byte	0x8db5
-	.uleb128 0x6f
-	.4byte	0x8dbb
-	.4byte	.LLST401
-	.uleb128 0x6f
-	.4byte	0x8dc0
-	.4byte	.LLST402
-	.uleb128 0x6f
-	.4byte	0x8dc5
+	.uleb128 0x70
+	.4byte	0x8e1c
+	.uleb128 0x71
+	.4byte	0x8e22
 	.4byte	.LLST403
-	.uleb128 0x6f
-	.4byte	0x8dca
+	.uleb128 0x71
+	.4byte	0x8e27
 	.4byte	.LLST404
-	.uleb128 0x6f
-	.4byte	0x8dcf
+	.uleb128 0x71
+	.4byte	0x8e2c
 	.4byte	.LLST405
-	.uleb128 0x6f
-	.4byte	0x8dd4
+	.uleb128 0x71
+	.4byte	0x8e31
 	.4byte	.LLST406
-	.uleb128 0x78
-	.4byte	0x2a37
-	.uleb128 0x78
-	.4byte	0x2a3f
-	.uleb128 0x6e
-	.4byte	0x8dd9
+	.uleb128 0x71
+	.4byte	0x8e36
+	.4byte	.LLST407
+	.uleb128 0x71
+	.4byte	0x8e3b
+	.4byte	.LLST408
+	.uleb128 0x7a
+	.4byte	0x2a9e
+	.uleb128 0x7a
+	.4byte	0x2aa6
+	.uleb128 0x70
+	.4byte	0x8e40
 	.uleb128 0x3e
 	.4byte	.Ldebug_ranges0+0x178
-	.4byte	0x8ec4
-	.uleb128 0x6f
-	.4byte	0x2a55
-	.4byte	.LLST407
+	.4byte	0x8f2b
+	.uleb128 0x71
+	.4byte	0x2abc
+	.4byte	.LLST409
 	.uleb128 0x44
-	.4byte	.LVL1716
-	.4byte	0x377a
+	.4byte	.LVL1718
+	.4byte	0x37e1
 	.uleb128 0x32
-	.4byte	.LVL1719
-	.4byte	0x5acd
-	.4byte	0x8e8d
+	.4byte	.LVL1721
+	.4byte	0x5b34
+	.4byte	0x8ef4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41810,9 +41885,9 @@ __func__.9940:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1721
-	.4byte	0x5acd
-	.4byte	0x8ea1
+	.4byte	.LVL1723
+	.4byte	0x5b34
+	.4byte	0x8f08
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41821,11 +41896,11 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1724
-	.4byte	0x2b28
+	.4byte	.LVL1726
+	.4byte	0x2b8f
 	.uleb128 0x34
-	.4byte	.LVL1736
-	.4byte	0x9222
+	.4byte	.LVL1738
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41841,12 +41916,12 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1747
-	.4byte	0x3101
+	.4byte	.LVL1749
+	.4byte	0x3168
 	.uleb128 0x32
-	.4byte	.LVL1748
-	.4byte	0x3ec7
-	.4byte	0x8ee1
+	.4byte	.LVL1750
+	.4byte	0x3f2e
+	.4byte	0x8f48
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41855,9 +41930,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1749
-	.4byte	0x5acd
-	.4byte	0x8ef5
+	.4byte	.LVL1751
+	.4byte	0x5b34
+	.4byte	0x8f5c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41866,15 +41941,15 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1752
-	.4byte	0x2a7e
+	.4byte	.LVL1754
+	.4byte	0x2ae5
 	.uleb128 0x44
-	.4byte	.LVL1755
-	.4byte	0x5acd
-	.uleb128 0x32
 	.4byte	.LVL1757
-	.4byte	0x31f2
-	.4byte	0x8f1b
+	.4byte	0x5b34
+	.uleb128 0x32
+	.4byte	.LVL1759
+	.4byte	0x3259
+	.4byte	0x8f82
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41883,9 +41958,9 @@ __func__.9940:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1762
-	.4byte	0x3101
-	.4byte	0x8f32
+	.4byte	.LVL1764
+	.4byte	0x3168
+	.4byte	0x8f99
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41896,9 +41971,9 @@ __func__.9940:
 	.byte	0x2
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1763
-	.4byte	0x31f2
-	.4byte	0x8f46
+	.4byte	.LVL1765
+	.4byte	0x3259
+	.4byte	0x8fad
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41907,9 +41982,9 @@ __func__.9940:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1764
-	.4byte	0x9222
-	.4byte	0x8f6d
+	.4byte	.LVL1766
+	.4byte	0x9289
+	.4byte	0x8fd4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41930,9 +42005,9 @@ __func__.9940:
 	.2byte	0x296
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1765
-	.4byte	0x9222
-	.4byte	0x8f94
+	.4byte	.LVL1767
+	.4byte	0x9289
+	.4byte	0x8ffb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41953,9 +42028,9 @@ __func__.9940:
 	.2byte	0x297
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1766
-	.4byte	0x9222
-	.4byte	0x8fbb
+	.4byte	.LVL1768
+	.4byte	0x9289
+	.4byte	0x9022
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41976,9 +42051,9 @@ __func__.9940:
 	.2byte	0x298
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1767
-	.4byte	0x3ec7
-	.4byte	0x8fcf
+	.4byte	.LVL1769
+	.4byte	0x3f2e
+	.4byte	0x9036
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41987,12 +42062,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1768
-	.4byte	0x2a7e
+	.4byte	.LVL1770
+	.4byte	0x2ae5
 	.uleb128 0x32
-	.4byte	.LVL1778
+	.4byte	.LVL1780
 	.4byte	0x26b9
-	.4byte	0x8fee
+	.4byte	0x9055
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -42002,9 +42077,9 @@ __func__.9940:
 	.byte	0x6
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1787
-	.4byte	0x9222
-	.4byte	0x9015
+	.4byte	.LVL1789
+	.4byte	0x9289
+	.4byte	0x907c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42025,9 +42100,9 @@ __func__.9940:
 	.2byte	0x2bc
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1788
-	.4byte	0x5212
-	.4byte	0x9034
+	.4byte	.LVL1790
+	.4byte	0x5279
+	.4byte	0x909b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42047,12 +42122,12 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1790
-	.4byte	0x2ca7
+	.4byte	.LVL1792
+	.4byte	0x2d0e
 	.uleb128 0x32
-	.4byte	.LVL1791
-	.4byte	0x3137
-	.4byte	0x9057
+	.4byte	.LVL1793
+	.4byte	0x319e
+	.4byte	0x90be
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42067,28 +42142,28 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1792
-	.4byte	0x2c03
-	.uleb128 0x44
-	.4byte	.LVL1797
-	.4byte	0x2c03
-	.uleb128 0x44
-	.4byte	.LVL1798
-	.4byte	0x3297
+	.4byte	.LVL1794
+	.4byte	0x2c6a
 	.uleb128 0x44
 	.4byte	.LVL1799
-	.4byte	0x6e77
+	.4byte	0x2c6a
 	.uleb128 0x44
 	.4byte	.LVL1800
-	.4byte	0x5313
+	.4byte	0x32fe
 	.uleb128 0x44
 	.4byte	.LVL1801
-	.4byte	0x4d0e
+	.4byte	0x6ede
+	.uleb128 0x44
+	.4byte	.LVL1802
+	.4byte	0x537a
+	.uleb128 0x44
+	.4byte	.LVL1803
+	.4byte	0x4d75
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1730
-	.4byte	0x2edb
+	.4byte	.LVL1732
+	.4byte	0x2f42
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42096,33 +42171,33 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.byte	0
-	.uleb128 0x70
-	.4byte	0x3937
+	.uleb128 0x72
+	.4byte	0x399e
 	.4byte	.LFB295
 	.4byte	.LFE295-.LFB295
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x91ff
-	.uleb128 0x74
-	.4byte	0x3948
+	.4byte	0x9266
+	.uleb128 0x76
+	.4byte	0x39af
 	.byte	0
-	.uleb128 0x5f
-	.4byte	.LBB302
-	.4byte	.LBE302-.LBB302
-	.4byte	0x9195
-	.uleb128 0x6e
-	.4byte	0x90b2
+	.uleb128 0x61
+	.4byte	.LBB306
+	.4byte	.LBE306-.LBB306
+	.4byte	0x91fc
+	.uleb128 0x70
+	.4byte	0x9119
 	.uleb128 0x3e
 	.4byte	.Ldebug_ranges0+0x1a8
-	.4byte	0x90dd
-	.uleb128 0x6f
-	.4byte	0x3953
-	.4byte	.LLST447
+	.4byte	0x9144
+	.uleb128 0x71
+	.4byte	0x39ba
+	.4byte	.LLST449
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2002
-	.4byte	0x3caf
-	.4byte	0x90f1
+	.4byte	.LVL2004
+	.4byte	0x3d16
+	.4byte	0x9158
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42131,9 +42206,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2003
-	.4byte	0x3caf
-	.4byte	0x9105
+	.4byte	.LVL2005
+	.4byte	0x3d16
+	.4byte	0x916c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42142,9 +42217,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2005
-	.4byte	0x4ec1
-	.4byte	0x911c
+	.4byte	.LVL2007
+	.4byte	0x4f28
+	.4byte	0x9183
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42153,9 +42228,9 @@ __func__.9940:
 	.4byte	.LANCHOR144
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2006
-	.4byte	0x4ec1
-	.4byte	0x9133
+	.4byte	.LVL2008
+	.4byte	0x4f28
+	.4byte	0x919a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42164,24 +42239,24 @@ __func__.9940:
 	.4byte	.LANCHOR149
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL2007
-	.4byte	0x5313
+	.4byte	.LVL2009
+	.4byte	0x537a
 	.uleb128 0x44
-	.4byte	.LVL2008
-	.4byte	0x4d0e
+	.4byte	.LVL2010
+	.4byte	0x4d75
 	.uleb128 0x44
-	.4byte	.LVL2009
-	.4byte	0x4d0e
+	.4byte	.LVL2011
+	.4byte	0x4d75
 	.uleb128 0x44
-	.4byte	.LVL2013
-	.4byte	0x2bbf
+	.4byte	.LVL2015
+	.4byte	0x2c26
 	.uleb128 0x44
-	.4byte	.LVL2014
-	.4byte	0x2bbf
+	.4byte	.LVL2016
+	.4byte	0x2c26
 	.uleb128 0x32
-	.4byte	.LVL2015
-	.4byte	0x33c9
-	.4byte	0x9177
+	.4byte	.LVL2017
+	.4byte	0x3430
+	.4byte	0x91de
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42190,9 +42265,9 @@ __func__.9940:
 	.4byte	.LANCHOR51
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2016
-	.4byte	0x33c9
-	.4byte	0x918b
+	.4byte	.LVL2018
+	.4byte	0x3430
+	.4byte	0x91f2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42201,42 +42276,42 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL2017
-	.4byte	0x3b98
+	.4byte	.LVL2019
+	.4byte	0x3bff
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1989
-	.4byte	0x5fb8
-	.uleb128 0x44
-	.4byte	.LVL1990
-	.4byte	0x4b0c
-	.uleb128 0x44
 	.4byte	.LVL1991
-	.4byte	0x4940
+	.4byte	0x601f
 	.uleb128 0x44
 	.4byte	.LVL1992
-	.4byte	0x46e2
+	.4byte	0x4b73
 	.uleb128 0x44
 	.4byte	.LVL1993
-	.4byte	0x4763
+	.4byte	0x49a7
 	.uleb128 0x44
 	.4byte	.LVL1994
-	.4byte	0x3d52
+	.4byte	0x4749
 	.uleb128 0x44
 	.4byte	.LVL1995
-	.4byte	0x4aff
+	.4byte	0x47ca
 	.uleb128 0x44
 	.4byte	.LVL1996
-	.4byte	0x5e7c
+	.4byte	0x3db9
 	.uleb128 0x44
 	.4byte	.LVL1997
-	.4byte	0x3dac
+	.4byte	0x4b66
 	.uleb128 0x44
 	.4byte	.LVL1998
-	.4byte	0x3f5d
-	.uleb128 0x34
+	.4byte	0x5ee3
+	.uleb128 0x44
 	.4byte	.LVL1999
-	.4byte	0x4f5b
+	.4byte	0x3e13
+	.uleb128 0x44
+	.4byte	.LVL2000
+	.4byte	0x3fc4
+	.uleb128 0x34
+	.4byte	.LVL2001
+	.4byte	0x4fc2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42244,34 +42319,39 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.byte	0
-	.uleb128 0x79
-	.4byte	.LASF874
-	.4byte	.LASF874
-	.byte	0xa
-	.byte	0x72
-	.uleb128 0x7a
+	.uleb128 0x7b
 	.4byte	.LASF875
 	.4byte	.LASF875
-	.byte	0x1b
-	.2byte	0x16d
-	.uleb128 0x7a
+	.byte	0xb
+	.byte	0x72
+	.uleb128 0x7c
 	.4byte	.LASF876
 	.4byte	.LASF876
-	.byte	0x1b
-	.2byte	0x16c
-	.uleb128 0x79
+	.byte	0x1c
+	.2byte	0x16d
+	.uleb128 0x7c
 	.4byte	.LASF877
 	.4byte	.LASF877
-	.byte	0x1d
-	.byte	0x12
-	.uleb128 0x79
+	.byte	0x1c
+	.2byte	0x16c
+	.uleb128 0x7b
 	.4byte	.LASF878
 	.4byte	.LASF878
-	.byte	0x1c
-	.byte	0x35
-	.uleb128 0x79
+	.byte	0x1d
+	.byte	0x12
+	.uleb128 0x7b
 	.4byte	.LASF879
 	.4byte	.LASF879
+	.byte	0x6
+	.byte	0x35
+	.uleb128 0x7c
+	.4byte	.LASF880
+	.4byte	.LASF880
+	.byte	0x1c
+	.2byte	0x399
+	.uleb128 0x7b
+	.4byte	.LASF881
+	.4byte	.LASF881
 	.byte	0x1e
 	.byte	0x6d
 	.byte	0
@@ -43184,6 +43264,47 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x45
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x6
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x47
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x20
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x48
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -43210,7 +43331,7 @@ __func__.9940:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x46
+	.uleb128 0x49
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -43231,7 +43352,7 @@ __func__.9940:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x47
+	.uleb128 0x4a
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -43244,7 +43365,7 @@ __func__.9940:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x48
+	.uleb128 0x4b
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -43257,7 +43378,7 @@ __func__.9940:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x49
+	.uleb128 0x4c
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -43270,7 +43391,7 @@ __func__.9940:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4a
+	.uleb128 0x4d
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x3
@@ -43281,7 +43402,7 @@ __func__.9940:
 	.uleb128 0x5
 	.byte	0
 	.byte	0
-	.uleb128 0x4b
+	.uleb128 0x4e
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -43294,19 +43415,19 @@ __func__.9940:
 	.uleb128 0xe
 	.byte	0
 	.byte	0
-	.uleb128 0x4c
+	.uleb128 0x4f
 	.uleb128 0xb
 	.byte	0x1
 	.byte	0
 	.byte	0
-	.uleb128 0x4d
+	.uleb128 0x50
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x1
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4e
+	.uleb128 0x51
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -43325,7 +43446,7 @@ __func__.9940:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x4f
+	.uleb128 0x52
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -43340,7 +43461,7 @@ __func__.9940:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x50
+	.uleb128 0x53
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -43355,7 +43476,7 @@ __func__.9940:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x51
+	.uleb128 0x54
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -43370,7 +43491,7 @@ __func__.9940:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x52
+	.uleb128 0x55
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -43387,7 +43508,7 @@ __func__.9940:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x53
+	.uleb128 0x56
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -43402,7 +43523,7 @@ __func__.9940:
 	.uleb128 0xd
 	.byte	0
 	.byte	0
-	.uleb128 0x54
+	.uleb128 0x57
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x3
@@ -43413,7 +43534,7 @@ __func__.9940:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x55
+	.uleb128 0x58
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x3
@@ -43426,7 +43547,7 @@ __func__.9940:
 	.uleb128 0x1
 	.byte	0
 	.byte	0
-	.uleb128 0x56
+	.uleb128 0x59
 	.uleb128 0x4109
 	.byte	0
 	.uleb128 0x11
@@ -43437,7 +43558,7 @@ __func__.9940:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x57
+	.uleb128 0x5a
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -43452,7 +43573,7 @@ __func__.9940:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x58
+	.uleb128 0x5b
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -43467,7 +43588,7 @@ __func__.9940:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x59
+	.uleb128 0x5c
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -43494,7 +43615,7 @@ __func__.9940:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x5a
+	.uleb128 0x5d
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -43509,7 +43630,7 @@ __func__.9940:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x5b
+	.uleb128 0x5e
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -43526,16 +43647,7 @@ __func__.9940:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x5c
-	.uleb128 0x5
-	.byte	0
-	.uleb128 0x31
-	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x17
-	.byte	0
-	.byte	0
-	.uleb128 0x5d
+	.uleb128 0x5f
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -43560,7 +43672,7 @@ __func__.9940:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x5e
+	.uleb128 0x60
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -43575,7 +43687,7 @@ __func__.9940:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x5f
+	.uleb128 0x61
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x11
@@ -43586,7 +43698,7 @@ __func__.9940:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x60
+	.uleb128 0x62
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -43601,7 +43713,7 @@ __func__.9940:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x61
+	.uleb128 0x63
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -43626,7 +43738,7 @@ __func__.9940:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x62
+	.uleb128 0x64
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -43645,7 +43757,7 @@ __func__.9940:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x63
+	.uleb128 0x65
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -43660,7 +43772,7 @@ __func__.9940:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x64
+	.uleb128 0x66
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -43679,7 +43791,7 @@ __func__.9940:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x65
+	.uleb128 0x67
 	.uleb128 0x1d
 	.byte	0
 	.uleb128 0x31
@@ -43694,7 +43806,7 @@ __func__.9940:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x66
+	.uleb128 0x68
 	.uleb128 0x1d
 	.byte	0
 	.uleb128 0x31
@@ -43709,7 +43821,7 @@ __func__.9940:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x67
+	.uleb128 0x69
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x11
@@ -43718,7 +43830,7 @@ __func__.9940:
 	.uleb128 0x6
 	.byte	0
 	.byte	0
-	.uleb128 0x68
+	.uleb128 0x6a
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -43737,7 +43849,7 @@ __func__.9940:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x69
+	.uleb128 0x6b
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -43748,7 +43860,7 @@ __func__.9940:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x6a
+	.uleb128 0x6c
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -43765,7 +43877,7 @@ __func__.9940:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
+	.uleb128 0x6d
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -43790,7 +43902,7 @@ __func__.9940:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x6c
+	.uleb128 0x6e
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x31
@@ -43807,21 +43919,21 @@ __func__.9940:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x6d
+	.uleb128 0x6f
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x6e
+	.uleb128 0x70
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x6f
+	.uleb128 0x71
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -43830,7 +43942,7 @@ __func__.9940:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x70
+	.uleb128 0x72
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x31
@@ -43847,7 +43959,7 @@ __func__.9940:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x71
+	.uleb128 0x73
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
@@ -43856,14 +43968,14 @@ __func__.9940:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x72
+	.uleb128 0x74
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x55
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x73
+	.uleb128 0x75
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x31
@@ -43878,7 +43990,7 @@ __func__.9940:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x74
+	.uleb128 0x76
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -43887,7 +43999,7 @@ __func__.9940:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x75
+	.uleb128 0x77
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -43896,7 +44008,7 @@ __func__.9940:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x76
+	.uleb128 0x78
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x31
@@ -43905,7 +44017,7 @@ __func__.9940:
 	.uleb128 0x1
 	.byte	0
 	.byte	0
-	.uleb128 0x77
+	.uleb128 0x79
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -43914,14 +44026,14 @@ __func__.9940:
 	.uleb128 0xd
 	.byte	0
 	.byte	0
-	.uleb128 0x78
+	.uleb128 0x7a
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x79
+	.uleb128 0x7b
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -43938,7 +44050,7 @@ __func__.9940:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x7a
+	.uleb128 0x7c
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -43958,13 +44070,13 @@ __func__.9940:
 	.byte	0
 	.section	.debug_loc,"",%progbits
 .Ldebug_loc0:
-.LLST453:
-	.4byte	.LVL2075
-	.4byte	.LVL2076-1
+.LLST455:
+	.4byte	.LVL2077
+	.4byte	.LVL2078-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL2076-1
-	.4byte	.LFE350
+	.4byte	.LVL2078-1
+	.4byte	.LFE351
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -43972,13 +44084,13 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST454:
-	.4byte	.LVL2075
-	.4byte	.LVL2076-1
+.LLST456:
+	.4byte	.LVL2077
+	.4byte	.LVL2078-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL2076-1
-	.4byte	.LFE350
+	.4byte	.LVL2078-1
+	.4byte	.LFE351
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -43986,13 +44098,13 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST455:
-	.4byte	.LVL2075
-	.4byte	.LVL2076-1
+.LLST457:
+	.4byte	.LVL2077
+	.4byte	.LVL2078-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL2076-1
-	.4byte	.LFE350
+	.4byte	.LVL2078-1
+	.4byte	.LFE351
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -44000,13 +44112,13 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST285:
-	.4byte	.LVL1159
-	.4byte	.LVL1160-1
+.LLST287:
+	.4byte	.LVL1161
+	.4byte	.LVL1162-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1160-1
-	.4byte	.LFE349
+	.4byte	.LVL1162-1
+	.4byte	.LFE350
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -44014,13 +44126,13 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST286:
-	.4byte	.LVL1159
-	.4byte	.LVL1160-1
+.LLST288:
+	.4byte	.LVL1161
+	.4byte	.LVL1162-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1160-1
-	.4byte	.LFE349
+	.4byte	.LVL1162-1
+	.4byte	.LFE350
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -44028,13 +44140,13 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST287:
-	.4byte	.LVL1159
-	.4byte	.LVL1160-1
+.LLST289:
+	.4byte	.LVL1161
+	.4byte	.LVL1162-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1160-1
-	.4byte	.LFE349
+	.4byte	.LVL1162-1
+	.4byte	.LFE350
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -44042,13 +44154,13 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST189:
-	.4byte	.LVL695
-	.4byte	.LVL696-1
+.LLST191:
+	.4byte	.LVL697
+	.4byte	.LVL698-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL696-1
-	.4byte	.LFE348
+	.4byte	.LVL698-1
+	.4byte	.LFE349
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -44056,13 +44168,13 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST190:
-	.4byte	.LVL695
-	.4byte	.LVL696-1
+.LLST192:
+	.4byte	.LVL697
+	.4byte	.LVL698-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL696-1
-	.4byte	.LFE348
+	.4byte	.LVL698-1
+	.4byte	.LFE349
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -44070,13 +44182,13 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST191:
-	.4byte	.LVL695
-	.4byte	.LVL696-1
+.LLST193:
+	.4byte	.LVL697
+	.4byte	.LVL698-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL696-1
-	.4byte	.LFE348
+	.4byte	.LVL698-1
+	.4byte	.LFE349
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -44084,51 +44196,51 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST282:
-	.4byte	.LVL1150
-	.4byte	.LVL1152-1
+.LLST284:
+	.4byte	.LVL1152
+	.4byte	.LVL1154-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1152-1
-	.4byte	.LFE347
+	.4byte	.LVL1154-1
+	.4byte	.LFE348
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST283:
-	.4byte	.LVL1150
-	.4byte	.LVL1151
+.LLST285:
+	.4byte	.LVL1152
+	.4byte	.LVL1153
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1151
-	.4byte	.LFE347
+	.4byte	.LVL1153
+	.4byte	.LFE348
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST284:
-	.4byte	.LVL1154
-	.4byte	.LVL1155
-	.2byte	0x1
-	.byte	0x50
+.LLST286:
 	.4byte	.LVL1156
 	.4byte	.LVL1157
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1158
+	.4byte	.LVL1159
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1157
-	.4byte	.LFE347
+	.4byte	.LVL1159
+	.4byte	.LFE348
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST170:
-	.4byte	.LVL625
-	.4byte	.LVL626
+.LLST172:
+	.4byte	.LVL627
+	.4byte	.LVL628
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL626
-	.4byte	.LFE345
+	.4byte	.LVL628
+	.4byte	.LFE346
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -44136,13 +44248,13 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST171:
-	.4byte	.LVL625
-	.4byte	.LVL626
+.LLST173:
+	.4byte	.LVL627
+	.4byte	.LVL628
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL626
-	.4byte	.LFE345
+	.4byte	.LVL628
+	.4byte	.LFE346
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -44150,35 +44262,35 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST172:
-	.4byte	.LVL625
-	.4byte	.LVL626
+.LLST174:
+	.4byte	.LVL627
+	.4byte	.LVL628
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL626
-	.4byte	.LFE345
+	.4byte	.LVL628
+	.4byte	.LFE346
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST173:
-	.4byte	.LVL629
-	.4byte	.LVL630
+.LLST175:
+	.4byte	.LVL631
+	.4byte	.LVL632
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL631
-	.4byte	.LFE345
+	.4byte	.LVL633
+	.4byte	.LFE346
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST174:
-	.4byte	.LVL625
-	.4byte	.LVL626
+.LLST176:
+	.4byte	.LVL627
+	.4byte	.LVL628
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL626
-	.4byte	.LFE345
+	.4byte	.LVL628
+	.4byte	.LFE346
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -44186,72 +44298,72 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST162:
-	.4byte	.LVL602
-	.4byte	.LVL605
+.LLST164:
+	.4byte	.LVL604
+	.4byte	.LVL607
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL605
-	.4byte	.LVL606
+	.4byte	.LVL607
+	.4byte	.LVL608
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL606
 	.4byte	.LVL608
+	.4byte	.LVL610
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL608
-	.4byte	.LVL615
+	.4byte	.LVL610
+	.4byte	.LVL617
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL615
-	.4byte	.LVL622
+	.4byte	.LVL617
+	.4byte	.LVL624
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL622
-	.4byte	.LFE344
+	.4byte	.LVL624
+	.4byte	.LFE345
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST163:
-	.4byte	.LVL602
-	.4byte	.LVL605
+.LLST165:
+	.4byte	.LVL604
+	.4byte	.LVL607
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL605
-	.4byte	.LVL606
+	.4byte	.LVL607
+	.4byte	.LVL608
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL606
 	.4byte	.LVL608
+	.4byte	.LVL610
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL608
-	.4byte	.LVL615
+	.4byte	.LVL610
+	.4byte	.LVL617
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL615
-	.4byte	.LVL622
+	.4byte	.LVL617
+	.4byte	.LVL624
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL622
 	.4byte	.LVL624
+	.4byte	.LVL626
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL624
-	.4byte	.LFE344
+	.4byte	.LVL626
+	.4byte	.LFE345
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -44259,129 +44371,129 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST164:
-	.4byte	.LVL602
-	.4byte	.LVL605
+.LLST166:
+	.4byte	.LVL604
+	.4byte	.LVL607
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL605
-	.4byte	.LFE344
+	.4byte	.LVL607
+	.4byte	.LFE345
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST165:
-	.4byte	.LVL602
-	.4byte	.LVL603
+.LLST167:
+	.4byte	.LVL604
+	.4byte	.LVL605
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL603
-	.4byte	.LVL607
+	.4byte	.LVL605
+	.4byte	.LVL609
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
-	.4byte	.LVL607
-	.4byte	.LVL608
+	.4byte	.LVL609
+	.4byte	.LVL610
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -72
-	.4byte	.LVL608
-	.4byte	.LFE344
+	.4byte	.LVL610
+	.4byte	.LFE345
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
 	.4byte	0
 	.4byte	0
-.LLST166:
-	.4byte	.LVL604
-	.4byte	.LVL605
+.LLST168:
+	.4byte	.LVL606
+	.4byte	.LVL607
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL605
-	.4byte	.LVL606
+	.4byte	.LVL607
+	.4byte	.LVL608
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL608
-	.4byte	.LVL615
+	.4byte	.LVL610
+	.4byte	.LVL617
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL615
-	.4byte	.LVL622
+	.4byte	.LVL617
+	.4byte	.LVL624
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL622
-	.4byte	.LFE344
+	.4byte	.LVL624
+	.4byte	.LFE345
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST167:
-	.4byte	.LVL611
-	.4byte	.LVL612
+.LLST169:
+	.4byte	.LVL613
+	.4byte	.LVL614
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL613
 	.4byte	.LVL615
+	.4byte	.LVL617
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST168:
-	.4byte	.LVL604
+.LLST170:
 	.4byte	.LVL606
+	.4byte	.LVL608
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL608
-	.4byte	.LVL615
+	.4byte	.LVL610
+	.4byte	.LVL617
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL622
-	.4byte	.LVL623
+	.4byte	.LVL624
+	.4byte	.LVL625
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST169:
-	.4byte	.LVL604
-	.4byte	.LVL605
+.LLST171:
+	.4byte	.LVL606
+	.4byte	.LVL607
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL605
-	.4byte	.LVL606
+	.4byte	.LVL607
+	.4byte	.LVL608
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL606
 	.4byte	.LVL608
+	.4byte	.LVL610
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL608
-	.4byte	.LVL615
+	.4byte	.LVL610
+	.4byte	.LVL617
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL615
-	.4byte	.LVL622
+	.4byte	.LVL617
+	.4byte	.LVL624
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL622
-	.4byte	.LFE344
+	.4byte	.LVL624
+	.4byte	.LFE345
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST151:
-	.4byte	.LVL562
+.LLST153:
 	.4byte	.LVL564
+	.4byte	.LVL566
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL564
-	.4byte	.LFE343
+	.4byte	.LVL566
+	.4byte	.LFE344
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -44389,24 +44501,24 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST152:
-	.4byte	.LVL562
+.LLST154:
 	.4byte	.LVL564
+	.4byte	.LVL566
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL564
-	.4byte	.LFE343
+	.4byte	.LVL566
+	.4byte	.LFE344
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST153:
-	.4byte	.LVL562
-	.4byte	.LVL563
+.LLST155:
+	.4byte	.LVL564
+	.4byte	.LVL565
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL563
-	.4byte	.LFE343
+	.4byte	.LVL565
+	.4byte	.LFE344
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -44414,233 +44526,247 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST154:
-	.4byte	.LVL568
-	.4byte	.LVL569
+.LLST156:
+	.4byte	.LVL570
+	.4byte	.LVL571
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL569
-	.4byte	.LVL570-1
+	.4byte	.LVL571
+	.4byte	.LVL572-1
 	.2byte	0x2
 	.byte	0x74
 	.sleb128 0
-	.4byte	.LVL570
-	.4byte	.LVL571
+	.4byte	.LVL572
+	.4byte	.LVL573
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL571
-	.4byte	.LVL572
+	.4byte	.LVL573
+	.4byte	.LVL574
 	.2byte	0x3
 	.byte	0x70
 	.sleb128 -1
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST142:
-	.4byte	.LVL551
+.LLST144:
 	.4byte	.LVL553
+	.4byte	.LVL555
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL553
-	.4byte	.LVL554
+	.4byte	.LVL555
+	.4byte	.LVL556
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL554
-	.4byte	.LVL555
+	.4byte	.LVL556
+	.4byte	.LVL557
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL555
-	.4byte	.LFE341
+	.4byte	.LVL557
+	.4byte	.LFE342
 	.2byte	0x1
 	.byte	0x5b
 	.4byte	0
 	.4byte	0
-.LLST143:
-	.4byte	.LVL551
+.LLST145:
 	.4byte	.LVL553
+	.4byte	.LVL555
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL553
-	.4byte	.LVL554
+	.4byte	.LVL555
+	.4byte	.LVL556
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL554
-	.4byte	.LVL555
+	.4byte	.LVL556
+	.4byte	.LVL557
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL555
-	.4byte	.LFE341
+	.4byte	.LVL557
+	.4byte	.LFE342
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST144:
-	.4byte	.LVL551
+.LLST146:
 	.4byte	.LVL553
+	.4byte	.LVL555
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL553
-	.4byte	.LVL554
+	.4byte	.LVL555
+	.4byte	.LVL556
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL554
-	.4byte	.LVL555
+	.4byte	.LVL556
+	.4byte	.LVL557
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x52
 	.byte	0x9f
-	.4byte	.LVL555
-	.4byte	.LFE341
+	.4byte	.LVL557
+	.4byte	.LFE342
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST145:
-	.4byte	.LVL551
+.LLST147:
 	.4byte	.LVL553
+	.4byte	.LVL555
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL553
-	.4byte	.LVL554
+	.4byte	.LVL555
+	.4byte	.LVL556
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL554
-	.4byte	.LVL555
+	.4byte	.LVL556
+	.4byte	.LVL557
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x53
 	.byte	0x9f
-	.4byte	.LVL555
-	.4byte	.LFE341
+	.4byte	.LVL557
+	.4byte	.LFE342
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
-.LLST146:
-	.4byte	.LVL552
-	.4byte	.LVL553
+.LLST148:
+	.4byte	.LVL554
+	.4byte	.LVL555
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL553
-	.4byte	.LVL554
+	.4byte	.LVL555
+	.4byte	.LVL556
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL555
-	.4byte	.LFE341
+	.4byte	.LVL557
+	.4byte	.LFE342
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST147:
-	.4byte	.LVL552
-	.4byte	.LVL553
+.LLST149:
+	.4byte	.LVL554
+	.4byte	.LVL555
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL553
-	.4byte	.LVL554
+	.4byte	.LVL555
+	.4byte	.LVL556
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL555
 	.4byte	.LVL557
+	.4byte	.LVL559
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL557
-	.4byte	.LVL558
+	.4byte	.LVL559
+	.4byte	.LVL560
 	.2byte	0x3
 	.byte	0x75
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL558
-	.4byte	.LVL559
+	.4byte	.LVL560
+	.4byte	.LVL561
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL559
-	.4byte	.LVL560
+	.4byte	.LVL561
+	.4byte	.LVL562
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL560
-	.4byte	.LFE341
+	.4byte	.LVL562
+	.4byte	.LFE342
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST148:
-	.4byte	.LVL552
-	.4byte	.LVL553
+.LLST150:
+	.4byte	.LVL554
+	.4byte	.LVL555
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL553
-	.4byte	.LVL554
+	.4byte	.LVL555
+	.4byte	.LVL556
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL554
-	.4byte	.LVL555
+	.4byte	.LVL556
+	.4byte	.LVL557
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL555
-	.4byte	.LFE341
+	.4byte	.LVL557
+	.4byte	.LFE342
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST149:
-	.4byte	.LVL552
-	.4byte	.LVL553
+.LLST151:
+	.4byte	.LVL554
+	.4byte	.LVL555
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL553
-	.4byte	.LVL554
+	.4byte	.LVL555
+	.4byte	.LVL556
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL554
-	.4byte	.LVL555
+	.4byte	.LVL556
+	.4byte	.LVL557
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL555
-	.4byte	.LFE341
+	.4byte	.LVL557
+	.4byte	.LFE342
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST150:
-	.4byte	.LVL552
-	.4byte	.LVL553
+.LLST152:
+	.4byte	.LVL554
+	.4byte	.LVL555
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL553
-	.4byte	.LVL554
+	.4byte	.LVL555
+	.4byte	.LVL556
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL554
-	.4byte	.LVL555
+	.4byte	.LVL556
+	.4byte	.LVL557
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL555
-	.4byte	.LFE341
+	.4byte	.LVL557
+	.4byte	.LFE342
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
+.LLST143:
+	.4byte	.LVL551
+	.4byte	.LVL552-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL552-1
+	.4byte	.LFE341
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
 .LLST141:
 	.4byte	.LVL549
 	.4byte	.LVL550-1
@@ -44655,6 +44781,20 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
+.LLST142:
+	.4byte	.LVL549
+	.4byte	.LVL550-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL550-1
+	.4byte	.LFE340
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
 .LLST138:
 	.4byte	.LVL536
 	.4byte	.LVL537-1
@@ -44714,42 +44854,42 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST394:
-	.4byte	.LVL1697
-	.4byte	.LVL1700
+.LLST396:
+	.4byte	.LVL1699
+	.4byte	.LVL1702
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1705
+	.4byte	.LVL1707
 	.4byte	.LFE316
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST395:
-	.4byte	.LVL1704
-	.4byte	.LVL1705-1
+.LLST397:
+	.4byte	.LVL1706
+	.4byte	.LVL1707-1
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST269:
-	.4byte	.LVL1096
-	.4byte	.LVL1098-1
+.LLST271:
+	.4byte	.LVL1098
+	.4byte	.LVL1100-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1098-1
-	.4byte	.LVL1099
+	.4byte	.LVL1100-1
+	.4byte	.LVL1101
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1099
 	.4byte	.LVL1101
+	.4byte	.LVL1103
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1101
-	.4byte	.LVL1138
+	.4byte	.LVL1103
+	.4byte	.LVL1140
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1138
+	.4byte	.LVL1140
 	.4byte	.LFE313
 	.2byte	0x4
 	.byte	0xf3
@@ -44758,234 +44898,234 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST270:
-	.4byte	.LVL1096
-	.4byte	.LVL1098-1
+.LLST272:
+	.4byte	.LVL1098
+	.4byte	.LVL1100-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1098-1
-	.4byte	.LVL1099
+	.4byte	.LVL1100-1
+	.4byte	.LVL1101
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -48
-	.4byte	.LVL1099
 	.4byte	.LVL1101
+	.4byte	.LVL1103
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1101
-	.4byte	.LVL1138
+	.4byte	.LVL1103
+	.4byte	.LVL1140
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -48
-	.4byte	.LVL1138
+	.4byte	.LVL1140
 	.4byte	.LFE313
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 -48
 	.4byte	0
 	.4byte	0
-.LLST271:
-	.4byte	.LVL1112
-	.4byte	.LVL1113
+.LLST273:
+	.4byte	.LVL1114
+	.4byte	.LVL1115
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1113
-	.4byte	.LVL1118
+	.4byte	.LVL1115
+	.4byte	.LVL1120
 	.2byte	0x2
 	.byte	0x7c
 	.sleb128 -2
 	.4byte	0
 	.4byte	0
-.LLST272:
-	.4byte	.LVL1104
-	.4byte	.LVL1105
+.LLST274:
+	.4byte	.LVL1106
+	.4byte	.LVL1107
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1105
-	.4byte	.LVL1114
+	.4byte	.LVL1107
+	.4byte	.LVL1116
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1115
-	.4byte	.LVL1124
+	.4byte	.LVL1117
+	.4byte	.LVL1126
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1127
-	.4byte	.LVL1137
+	.4byte	.LVL1129
+	.4byte	.LVL1139
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST273:
-	.4byte	.LVL1107
-	.4byte	.LVL1111
+.LLST275:
+	.4byte	.LVL1109
+	.4byte	.LVL1113
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL1118
-	.4byte	.LVL1121
+	.4byte	.LVL1120
+	.4byte	.LVL1123
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL1129
-	.4byte	.LVL1137
+	.4byte	.LVL1131
+	.4byte	.LVL1139
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST274:
-	.4byte	.LVL1104
-	.4byte	.LVL1105
+.LLST276:
+	.4byte	.LVL1106
+	.4byte	.LVL1107
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1105
-	.4byte	.LVL1106
+	.4byte	.LVL1107
+	.4byte	.LVL1108
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1106
-	.4byte	.LVL1107-1
+	.4byte	.LVL1108
+	.4byte	.LVL1109-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1111
-	.4byte	.LVL1116
+	.4byte	.LVL1113
+	.4byte	.LVL1118
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1116
-	.4byte	.LVL1117
+	.4byte	.LVL1118
+	.4byte	.LVL1119
 	.2byte	0x3
 	.byte	0x72
 	.sleb128 1
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST275:
-	.4byte	.LVL1103
-	.4byte	.LVL1107
+.LLST277:
+	.4byte	.LVL1105
+	.4byte	.LVL1109
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1110
-	.4byte	.LVL1118
+	.4byte	.LVL1112
+	.4byte	.LVL1120
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1120
-	.4byte	.LVL1125
-	.2byte	0x1
-	.byte	0x50
+	.4byte	.LVL1122
 	.4byte	.LVL1127
-	.4byte	.LVL1128
 	.2byte	0x1
 	.byte	0x50
+	.4byte	.LVL1129
 	.4byte	.LVL1130
+	.2byte	0x1
+	.byte	0x50
 	.4byte	.LVL1132
+	.4byte	.LVL1134
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1136
-	.4byte	.LVL1137
+	.4byte	.LVL1138
+	.4byte	.LVL1139
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST276:
-	.4byte	.LVL1097
-	.4byte	.LVL1109
+.LLST278:
+	.4byte	.LVL1099
+	.4byte	.LVL1111
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1110
-	.4byte	.LVL1131
+	.4byte	.LVL1112
+	.4byte	.LVL1133
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1134
 	.4byte	.LVL1136
+	.4byte	.LVL1138
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1136
 	.4byte	.LVL1138
+	.4byte	.LVL1140
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST277:
-	.4byte	.LVL1119
-	.4byte	.LVL1120-1
+.LLST279:
+	.4byte	.LVL1121
+	.4byte	.LVL1122-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1120-1
-	.4byte	.LVL1124
+	.4byte	.LVL1122-1
+	.4byte	.LVL1126
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -52
-	.4byte	.LVL1127
-	.4byte	.LVL1129-1
+	.4byte	.LVL1129
+	.4byte	.LVL1131-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1129-1
-	.4byte	.LVL1136
+	.4byte	.LVL1131-1
+	.4byte	.LVL1138
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -52
 	.4byte	0
 	.4byte	0
-.LLST278:
-	.4byte	.LVL1096
-	.4byte	.LVL1102
+.LLST280:
+	.4byte	.LVL1098
+	.4byte	.LVL1104
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1102
-	.4byte	.LVL1108
+	.4byte	.LVL1104
+	.4byte	.LVL1110
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1108
 	.4byte	.LVL1110
+	.4byte	.LVL1112
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL1110
-	.4byte	.LVL1138
+	.4byte	.LVL1112
+	.4byte	.LVL1140
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST279:
-	.4byte	.LVL1122
-	.4byte	.LVL1123
+.LLST281:
+	.4byte	.LVL1124
+	.4byte	.LVL1125
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1123
-	.4byte	.LVL1124
+	.4byte	.LVL1125
+	.4byte	.LVL1126
 	.2byte	0x5
 	.byte	0x91
 	.sleb128 -44
 	.byte	0x6
 	.byte	0x23
 	.uleb128 0xc
-	.4byte	.LVL1127
-	.4byte	.LVL1129-1
+	.4byte	.LVL1129
+	.4byte	.LVL1131-1
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST389:
-	.4byte	.LVL1653
+.LLST391:
 	.4byte	.LVL1655
+	.4byte	.LVL1657
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1655
-	.4byte	.LVL1656
+	.4byte	.LVL1657
+	.4byte	.LVL1658
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1656
 	.4byte	.LVL1658
+	.4byte	.LVL1660
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1658
+	.4byte	.LVL1660
 	.4byte	.LFE311
 	.2byte	0x4
 	.byte	0xf3
@@ -44994,75 +45134,75 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST390:
-	.4byte	.LVL1666
-	.4byte	.LVL1669
+.LLST392:
+	.4byte	.LVL1668
+	.4byte	.LVL1671
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1669
-	.4byte	.LVL1672
+	.4byte	.LVL1671
+	.4byte	.LVL1674
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1675
-	.4byte	.LVL1683
+	.4byte	.LVL1677
+	.4byte	.LVL1685
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1683
-	.4byte	.LVL1684
+	.4byte	.LVL1685
+	.4byte	.LVL1686
 	.2byte	0x3
 	.byte	0x76
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1685
+	.4byte	.LVL1687
 	.4byte	.LFE311
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST391:
-	.4byte	.LVL1659
-	.4byte	.LVL1664
+.LLST393:
+	.4byte	.LVL1661
+	.4byte	.LVL1666
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1665
-	.4byte	.LVL1666
+	.4byte	.LVL1667
+	.4byte	.LVL1668
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1680
 	.4byte	.LVL1682
+	.4byte	.LVL1684
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST392:
-	.4byte	.LVL1654
-	.4byte	.LVL1655
-	.2byte	0x1
-	.byte	0x51
+.LLST394:
 	.4byte	.LVL1656
 	.4byte	.LVL1657
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1657
+	.4byte	.LVL1658
+	.4byte	.LVL1659
+	.2byte	0x1
+	.byte	0x51
 	.4byte	.LVL1659
+	.4byte	.LVL1661
 	.2byte	0x2
 	.byte	0x32
 	.byte	0x9f
-	.4byte	.LVL1659
-	.4byte	.LVL1660-1
+	.4byte	.LVL1661
+	.4byte	.LVL1662-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1664
-	.4byte	.LVL1665
+	.4byte	.LVL1666
+	.4byte	.LVL1667
 	.2byte	0x2
 	.byte	0x32
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST393:
-	.4byte	.LVL1676
-	.4byte	.LVL1686
+.LLST395:
+	.4byte	.LVL1678
+	.4byte	.LVL1688
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
@@ -45258,23 +45398,23 @@ __func__.9940:
 	.byte	0x52
 	.4byte	0
 	.4byte	0
-.LLST307:
-	.4byte	.LVL1255
-	.4byte	.LVL1256
+.LLST309:
+	.4byte	.LVL1257
+	.4byte	.LVL1258
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1256
-	.4byte	.LVL1262
+	.4byte	.LVL1258
+	.4byte	.LVL1264
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1262
-	.4byte	.LVL1263
+	.4byte	.LVL1264
+	.4byte	.LVL1265
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1263
+	.4byte	.LVL1265
 	.4byte	.LFE305
 	.2byte	0x4
 	.byte	0xf3
@@ -45283,23 +45423,23 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST308:
-	.4byte	.LVL1255
-	.4byte	.LVL1258
+.LLST310:
+	.4byte	.LVL1257
+	.4byte	.LVL1260
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1259
-	.4byte	.LVL1260
+	.4byte	.LVL1261
+	.4byte	.LVL1262
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1262
-	.4byte	.LVL1265
+	.4byte	.LVL1264
+	.4byte	.LVL1267
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1265
+	.4byte	.LVL1267
 	.4byte	.LFE305
 	.2byte	0x1
 	.byte	0x55
@@ -45346,27 +45486,27 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST374:
-	.4byte	.LVL1590
+.LLST376:
 	.4byte	.LVL1592
+	.4byte	.LVL1594
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1592
+	.4byte	.LVL1594
 	.4byte	.LFE302
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST292:
-	.4byte	.LVL1182
-	.4byte	.LVL1183
+.LLST294:
+	.4byte	.LVL1184
+	.4byte	.LVL1185
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1183
-	.4byte	.LVL1223
+	.4byte	.LVL1185
+	.4byte	.LVL1225
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1223
+	.4byte	.LVL1225
 	.4byte	.LFE301
 	.2byte	0x4
 	.byte	0xf3
@@ -45375,62 +45515,62 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST293:
-	.4byte	.LVL1189
-	.4byte	.LVL1194
+.LLST295:
+	.4byte	.LVL1191
+	.4byte	.LVL1196
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1195
-	.4byte	.LVL1223
+	.4byte	.LVL1197
+	.4byte	.LVL1225
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST294:
-	.4byte	.LVL1197
-	.4byte	.LVL1210
+.LLST296:
+	.4byte	.LVL1199
+	.4byte	.LVL1212
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1211
-	.4byte	.LVL1223
+	.4byte	.LVL1213
+	.4byte	.LVL1225
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST295:
-	.4byte	.LVL1202
-	.4byte	.LVL1203
+.LLST297:
+	.4byte	.LVL1204
+	.4byte	.LVL1205
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1204
-	.4byte	.LVL1205
+	.4byte	.LVL1206
+	.4byte	.LVL1207
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1205
-	.4byte	.LVL1209
+	.4byte	.LVL1207
+	.4byte	.LVL1211
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL1215
-	.4byte	.LVL1219
+	.4byte	.LVL1217
+	.4byte	.LVL1221
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL1219
-	.4byte	.LVL1220
+	.4byte	.LVL1221
+	.4byte	.LVL1222
 	.2byte	0x3
 	.byte	0x7a
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1221
 	.4byte	.LVL1223
+	.4byte	.LVL1225
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
-.LLST296:
-	.4byte	.LVL1217
-	.4byte	.LVL1218-1
+.LLST298:
+	.4byte	.LVL1219
+	.4byte	.LVL1220-1
 	.2byte	0x6
 	.byte	0x7c
 	.sleb128 4
@@ -45440,74 +45580,74 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST297:
-	.4byte	.LVL1204
-	.4byte	.LVL1205
+.LLST299:
+	.4byte	.LVL1206
+	.4byte	.LVL1207
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1205
-	.4byte	.LVL1206-1
+	.4byte	.LVL1207
+	.4byte	.LVL1208-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1215
-	.4byte	.LVL1216
+	.4byte	.LVL1217
+	.4byte	.LVL1218
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1216
-	.4byte	.LVL1217
+	.4byte	.LVL1218
+	.4byte	.LVL1219
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL1217
-	.4byte	.LVL1218-1
+	.4byte	.LVL1219
+	.4byte	.LVL1220-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1218-1
-	.4byte	.LVL1219
+	.4byte	.LVL1220-1
+	.4byte	.LVL1221
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -44
-	.4byte	.LVL1219
 	.4byte	.LVL1221
+	.4byte	.LVL1223
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST298:
-	.4byte	.LVL1182
-	.4byte	.LVL1183
+.LLST300:
+	.4byte	.LVL1184
+	.4byte	.LVL1185
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1185
-	.4byte	.LVL1186
+	.4byte	.LVL1187
+	.4byte	.LVL1188
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1186
-	.4byte	.LVL1187
+	.4byte	.LVL1188
+	.4byte	.LVL1189
 	.2byte	0x3
 	.byte	0x71
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1187
-	.4byte	.LVL1188-1
+	.4byte	.LVL1189
+	.4byte	.LVL1190-1
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST299:
-	.4byte	.LVL1212
+.LLST301:
 	.4byte	.LVL1214
+	.4byte	.LVL1216
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST300:
-	.4byte	.LVL1212
+.LLST302:
 	.4byte	.LVL1214
+	.4byte	.LVL1216
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
@@ -45772,33 +45912,33 @@ __func__.9940:
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST237:
-	.4byte	.LVL911
+.LLST239:
 	.4byte	.LVL913
+	.4byte	.LVL915
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST264:
-	.4byte	.LVL1074
-	.4byte	.LVL1075
+.LLST266:
+	.4byte	.LVL1076
+	.4byte	.LVL1077
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1077
-	.4byte	.LVL1080
+	.4byte	.LVL1079
+	.4byte	.LVL1082
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL1089
 	.4byte	.LVL1091
+	.4byte	.LVL1093
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1091
-	.4byte	.LVL1092
+	.4byte	.LVL1093
+	.4byte	.LVL1094
 	.2byte	0x3
 	.byte	0x74
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1092
+	.4byte	.LVL1094
 	.4byte	.LFE293
 	.2byte	0x3
 	.byte	0x75
@@ -45806,81 +45946,81 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST265:
-	.4byte	.LVL1072
-	.4byte	.LVL1073
+.LLST267:
+	.4byte	.LVL1074
+	.4byte	.LVL1075
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1084
-	.4byte	.LVL1089
+	.4byte	.LVL1086
+	.4byte	.LVL1091
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST266:
-	.4byte	.LVL1077
+.LLST268:
 	.4byte	.LVL1079
+	.4byte	.LVL1081
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1086
-	.4byte	.LVL1087
+	.4byte	.LVL1088
+	.4byte	.LVL1089
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST267:
-	.4byte	.LVL1070
-	.4byte	.LVL1074
+.LLST269:
+	.4byte	.LVL1072
+	.4byte	.LVL1076
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1074
-	.4byte	.LVL1077
+	.4byte	.LVL1076
+	.4byte	.LVL1079
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1081
-	.4byte	.LVL1082
+	.4byte	.LVL1083
+	.4byte	.LVL1084
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1082
-	.4byte	.LVL1083
+	.4byte	.LVL1084
+	.4byte	.LVL1085
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.4byte	.LVL1084
-	.4byte	.LVL1089
+	.4byte	.LVL1086
+	.4byte	.LVL1091
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1089
+	.4byte	.LVL1091
 	.4byte	.LFE293
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST268:
-	.4byte	.LVL1076
-	.4byte	.LVL1081
+.LLST270:
+	.4byte	.LVL1078
+	.4byte	.LVL1083
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST371:
-	.4byte	.LVL1578
-	.4byte	.LVL1579
+.LLST373:
+	.4byte	.LVL1580
+	.4byte	.LVL1581
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1584
-	.4byte	.LVL1588
+	.4byte	.LVL1586
+	.4byte	.LVL1590
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1588
-	.4byte	.LVL1589
+	.4byte	.LVL1590
+	.4byte	.LVL1591
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1589
+	.4byte	.LVL1591
 	.4byte	.LFE292
 	.2byte	0x3
 	.byte	0x76
@@ -45888,72 +46028,72 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST372:
-	.4byte	.LVL1576
-	.4byte	.LVL1577
+.LLST374:
+	.4byte	.LVL1578
+	.4byte	.LVL1579
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1579
-	.4byte	.LVL1584
+	.4byte	.LVL1581
+	.4byte	.LVL1586
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST373:
-	.4byte	.LVL1581
-	.4byte	.LVL1582
+.LLST375:
+	.4byte	.LVL1583
+	.4byte	.LVL1584
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST339:
-	.4byte	.LVL1423
-	.4byte	.LVL1424
+.LLST341:
+	.4byte	.LVL1425
+	.4byte	.LVL1426
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1424
+	.4byte	.LVL1426
 	.4byte	.LFE291
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST340:
-	.4byte	.LVL1430
-	.4byte	.LVL1431
+.LLST342:
+	.4byte	.LVL1432
+	.4byte	.LVL1433
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1431
-	.4byte	.LVL1432-1
+	.4byte	.LVL1433
+	.4byte	.LVL1434-1
 	.2byte	0x5
 	.byte	0x3
 	.4byte	p_sys_spare_buf
 	.4byte	0
 	.4byte	0
-.LLST341:
-	.4byte	.LVL1423
-	.4byte	.LVL1424
+.LLST343:
+	.4byte	.LVL1425
+	.4byte	.LVL1426
 	.2byte	0x2
 	.byte	0x36
 	.byte	0x9f
-	.4byte	.LVL1424
-	.4byte	.LVL1425
+	.4byte	.LVL1426
+	.4byte	.LVL1427
 	.2byte	0x3
 	.byte	0x75
 	.sleb128 -2
 	.byte	0x9f
-	.4byte	.LVL1425
-	.4byte	.LVL1426
+	.4byte	.LVL1427
+	.4byte	.LVL1428
 	.2byte	0x3
 	.byte	0x75
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL1426
-	.4byte	.LVL1427
+	.4byte	.LVL1428
+	.4byte	.LVL1429
 	.2byte	0x3
 	.byte	0x75
 	.sleb128 -2
 	.byte	0x9f
-	.4byte	.LVL1428
+	.4byte	.LVL1430
 	.4byte	.LFE291
 	.2byte	0x3
 	.byte	0x75
@@ -45961,72 +46101,72 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST258:
-	.4byte	.LVL1048
-	.4byte	.LVL1059
+.LLST260:
+	.4byte	.LVL1050
+	.4byte	.LVL1061
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1059
-	.4byte	.LVL1060
+	.4byte	.LVL1061
+	.4byte	.LVL1062
 	.2byte	0x3
 	.byte	0x74
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1060
-	.4byte	.LVL1061
+	.4byte	.LVL1062
+	.4byte	.LVL1063
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1061
-	.4byte	.LVL1069
+	.4byte	.LVL1063
+	.4byte	.LVL1071
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST259:
-	.4byte	.LVL1049
-	.4byte	.LVL1050-1
+.LLST261:
+	.4byte	.LVL1051
+	.4byte	.LVL1052-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1053
-	.4byte	.LVL1054
+	.4byte	.LVL1055
+	.4byte	.LVL1056
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1054
-	.4byte	.LVL1055-1
+	.4byte	.LVL1056
+	.4byte	.LVL1057-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1061
-	.4byte	.LVL1062
+	.4byte	.LVL1063
+	.4byte	.LVL1064
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST260:
-	.4byte	.LVL1050
-	.4byte	.LVL1051-1
+.LLST262:
+	.4byte	.LVL1052
+	.4byte	.LVL1053-1
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST261:
-	.4byte	.LVL1049
-	.4byte	.LVL1052
+.LLST263:
+	.4byte	.LVL1051
+	.4byte	.LVL1054
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1053
 	.4byte	.LVL1055
+	.4byte	.LVL1057
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1055
 	.4byte	.LVL1057
+	.4byte	.LVL1059
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1057
-	.4byte	.LVL1059-1
+	.4byte	.LVL1059
+	.4byte	.LVL1061-1
 	.2byte	0x9
 	.byte	0x72
 	.sleb128 0
@@ -46037,16 +46177,16 @@ __func__.9940:
 	.byte	0x22
 	.byte	0x23
 	.uleb128 0x4
-	.4byte	.LVL1061
-	.4byte	.LVL1062
+	.4byte	.LVL1063
+	.4byte	.LVL1064
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1062
 	.4byte	.LVL1064
+	.4byte	.LVL1066
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1064
-	.4byte	.LVL1066-1
+	.4byte	.LVL1066
+	.4byte	.LVL1068-1
 	.2byte	0x9
 	.byte	0x72
 	.sleb128 0
@@ -46059,29 +46199,29 @@ __func__.9940:
 	.uleb128 0x4
 	.4byte	0
 	.4byte	0
-.LLST262:
-	.4byte	.LVL1048
-	.4byte	.LVL1063
+.LLST264:
+	.4byte	.LVL1050
+	.4byte	.LVL1065
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1065
 	.4byte	.LVL1067
+	.4byte	.LVL1069
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1067
-	.4byte	.LVL1068-1
+	.4byte	.LVL1069
+	.4byte	.LVL1070-1
 	.2byte	0x5
 	.byte	0x3
 	.4byte	g_num_data_superblocks
 	.4byte	0
 	.4byte	0
-.LLST263:
-	.4byte	.LVL1048
-	.4byte	.LVL1056
+.LLST265:
+	.4byte	.LVL1050
+	.4byte	.LVL1058
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL1058
-	.4byte	.LVL1069
+	.4byte	.LVL1060
+	.4byte	.LVL1071
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
@@ -46110,371 +46250,371 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST313:
-	.4byte	.LVL1285
-	.4byte	.LVL1288
+.LLST315:
+	.4byte	.LVL1287
+	.4byte	.LVL1290
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1288
 	.4byte	.LVL1290
+	.4byte	.LVL1292
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL1290
-	.4byte	.LVL1291
+	.4byte	.LVL1292
+	.4byte	.LVL1293
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1291
+	.4byte	.LVL1293
 	.4byte	.LFE284
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST314:
-	.4byte	.LVL1286
-	.4byte	.LVL1289
+.LLST316:
+	.4byte	.LVL1288
+	.4byte	.LVL1291
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -76
-	.4byte	.LVL1290
+	.4byte	.LVL1292
 	.4byte	.LFE284
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -76
 	.4byte	0
 	.4byte	0
-.LLST315:
-	.4byte	.LVL1287
+.LLST317:
 	.4byte	.LVL1289
+	.4byte	.LVL1291
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -60
-	.4byte	.LVL1290
+	.4byte	.LVL1292
 	.4byte	.LFE284
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -60
 	.4byte	0
 	.4byte	0
-.LLST316:
-	.4byte	.LVL1290
-	.4byte	.LVL1291
+.LLST318:
+	.4byte	.LVL1292
+	.4byte	.LVL1293
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1292
-	.4byte	.LVL1296
+	.4byte	.LVL1294
+	.4byte	.LVL1298
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1297
-	.4byte	.LVL1298
+	.4byte	.LVL1299
+	.4byte	.LVL1300
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1298
-	.4byte	.LVL1299-1
+	.4byte	.LVL1300
+	.4byte	.LVL1301-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1309
 	.4byte	.LVL1311
+	.4byte	.LVL1313
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1311
-	.4byte	.LVL1314
+	.4byte	.LVL1313
+	.4byte	.LVL1316
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1314
-	.4byte	.LVL1319
+	.4byte	.LVL1316
+	.4byte	.LVL1321
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1319
-	.4byte	.LVL1320
+	.4byte	.LVL1321
+	.4byte	.LVL1322
 	.2byte	0x3
 	.byte	0x72
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1337
-	.4byte	.LVL1342
+	.4byte	.LVL1339
+	.4byte	.LVL1344
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1342
-	.4byte	.LVL1343
+	.4byte	.LVL1344
+	.4byte	.LVL1345
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1343
-	.4byte	.LVL1344-1
+	.4byte	.LVL1345
+	.4byte	.LVL1346-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1350
-	.4byte	.LVL1351
+	.4byte	.LVL1352
+	.4byte	.LVL1353
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1351
-	.4byte	.LVL1352-1
+	.4byte	.LVL1353
+	.4byte	.LVL1354-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1357
-	.4byte	.LVL1358
+	.4byte	.LVL1359
+	.4byte	.LVL1360
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1358
 	.4byte	.LVL1360
+	.4byte	.LVL1362
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1366
-	.4byte	.LVL1369
+	.4byte	.LVL1368
+	.4byte	.LVL1371
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1369
-	.4byte	.LVL1370
+	.4byte	.LVL1371
+	.4byte	.LVL1372
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 1
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST317:
-	.4byte	.LVL1349
-	.4byte	.LVL1350
+.LLST319:
+	.4byte	.LVL1351
+	.4byte	.LVL1352
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -60
-	.4byte	.LVL1372
-	.4byte	.LVL1375
+	.4byte	.LVL1374
+	.4byte	.LVL1377
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1378
-	.4byte	.LVL1381
+	.4byte	.LVL1380
+	.4byte	.LVL1383
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1419
-	.4byte	.LVL1420
+	.4byte	.LVL1421
+	.4byte	.LVL1422
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1422
+	.4byte	.LVL1424
 	.4byte	.LFE284
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST318:
-	.4byte	.LVL1335
-	.4byte	.LVL1336
+.LLST320:
+	.4byte	.LVL1337
+	.4byte	.LVL1338
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -76
-	.4byte	.LVL1336
-	.4byte	.LVL1346
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1347
+	.4byte	.LVL1338
 	.4byte	.LVL1348
 	.2byte	0x1
 	.byte	0x54
 	.4byte	.LVL1349
 	.4byte	.LVL1350
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1351
+	.4byte	.LVL1352
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -76
-	.4byte	.LVL1350
-	.4byte	.LVL1355
+	.4byte	.LVL1352
+	.4byte	.LVL1357
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL1356
-	.4byte	.LVL1361
+	.4byte	.LVL1358
+	.4byte	.LVL1363
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL1361
-	.4byte	.LVL1366
+	.4byte	.LVL1363
+	.4byte	.LVL1368
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1366
+	.4byte	.LVL1368
 	.4byte	.LFE284
 	.2byte	0x1
 	.byte	0x5b
 	.4byte	0
 	.4byte	0
-.LLST319:
-	.4byte	.LVL1306
-	.4byte	.LVL1309
+.LLST321:
+	.4byte	.LVL1308
+	.4byte	.LVL1311
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL1331
+	.4byte	.LVL1333
 	.4byte	.LFE284
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
-.LLST320:
-	.4byte	.LVL1304
-	.4byte	.LVL1309
+.LLST322:
+	.4byte	.LVL1306
+	.4byte	.LVL1311
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -72
-	.4byte	.LVL1327
-	.4byte	.LVL1328
+	.4byte	.LVL1329
+	.4byte	.LVL1330
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -72
-	.4byte	.LVL1331
+	.4byte	.LVL1333
 	.4byte	.LFE284
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -72
 	.4byte	0
 	.4byte	0
-.LLST321:
-	.4byte	.LVL1291
-	.4byte	.LVL1293-1
+.LLST323:
+	.4byte	.LVL1293
+	.4byte	.LVL1295-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1309
 	.4byte	.LVL1311
+	.4byte	.LVL1313
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1315
-	.4byte	.LVL1316
+	.4byte	.LVL1317
+	.4byte	.LVL1318
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1316
-	.4byte	.LVL1321
+	.4byte	.LVL1318
+	.4byte	.LVL1323
 	.2byte	0x5
 	.byte	0x7d
 	.sleb128 0
 	.byte	0x6
 	.byte	0x32
 	.byte	0x1c
-	.4byte	.LVL1338
 	.4byte	.LVL1340
+	.4byte	.LVL1342
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1340
-	.4byte	.LVL1343
+	.4byte	.LVL1342
+	.4byte	.LVL1345
 	.2byte	0x6
 	.byte	0x91
 	.sleb128 -68
 	.byte	0x6
 	.byte	0x32
 	.byte	0x1c
-	.4byte	.LVL1359
 	.4byte	.LVL1361
+	.4byte	.LVL1363
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1367
-	.4byte	.LVL1368
+	.4byte	.LVL1369
+	.4byte	.LVL1370
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1368
-	.4byte	.LVL1371
+	.4byte	.LVL1370
+	.4byte	.LVL1373
 	.2byte	0x2
 	.byte	0x71
 	.sleb128 -2
 	.4byte	0
 	.4byte	0
-.LLST322:
-	.4byte	.LVL1294
-	.4byte	.LVL1295
+.LLST324:
+	.4byte	.LVL1296
+	.4byte	.LVL1297
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1295
-	.4byte	.LVL1307
+	.4byte	.LVL1297
+	.4byte	.LVL1309
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1311
-	.4byte	.LVL1334
+	.4byte	.LVL1313
+	.4byte	.LVL1336
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST324:
-	.4byte	.LVL1297
-	.4byte	.LVL1307
+.LLST326:
+	.4byte	.LVL1299
+	.4byte	.LVL1309
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1314
-	.4byte	.LVL1317
+	.4byte	.LVL1316
+	.4byte	.LVL1319
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1318
-	.4byte	.LVL1336
+	.4byte	.LVL1320
+	.4byte	.LVL1338
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1337
 	.4byte	.LVL1339
+	.4byte	.LVL1341
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1341
-	.4byte	.LVL1345
+	.4byte	.LVL1343
+	.4byte	.LVL1347
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1350
-	.4byte	.LVL1351
+	.4byte	.LVL1352
+	.4byte	.LVL1353
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1351
-	.4byte	.LVL1361
+	.4byte	.LVL1353
+	.4byte	.LVL1363
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -68
-	.4byte	.LVL1366
+	.4byte	.LVL1368
 	.4byte	.LFE284
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -68
 	.4byte	0
 	.4byte	0
-.LLST325:
-	.4byte	.LVL1300
+.LLST327:
 	.4byte	.LVL1302
+	.4byte	.LVL1304
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1303
-	.4byte	.LVL1304
+	.4byte	.LVL1305
+	.4byte	.LVL1306
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1321
-	.4byte	.LVL1322
+	.4byte	.LVL1323
+	.4byte	.LVL1324
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1322
-	.4byte	.LVL1329
+	.4byte	.LVL1324
+	.4byte	.LVL1331
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1329
-	.4byte	.LVL1330
+	.4byte	.LVL1331
+	.4byte	.LVL1332
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 1
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST326:
-	.4byte	.LVL1344
-	.4byte	.LVL1345
+.LLST328:
+	.4byte	.LVL1346
+	.4byte	.LVL1347
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1352
-	.4byte	.LVL1353
+	.4byte	.LVL1354
+	.4byte	.LVL1355
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1354
-	.4byte	.LVL1361
+	.4byte	.LVL1356
+	.4byte	.LVL1363
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -56
-	.4byte	.LVL1371
-	.4byte	.LVL1377
+	.4byte	.LVL1373
+	.4byte	.LVL1379
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -56
-	.4byte	.LVL1377
-	.4byte	.LVL1378
+	.4byte	.LVL1379
+	.4byte	.LVL1380
 	.2byte	0x7
 	.byte	0x91
 	.sleb128 -56
@@ -46483,274 +46623,274 @@ __func__.9940:
 	.byte	0x23
 	.uleb128 0x1
 	.byte	0x9f
-	.4byte	.LVL1378
+	.4byte	.LVL1380
 	.4byte	.LFE284
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -56
 	.4byte	0
 	.4byte	0
-.LLST327:
-	.4byte	.LVL1383
-	.4byte	.LVL1392
+.LLST329:
+	.4byte	.LVL1385
+	.4byte	.LVL1394
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1395
-	.4byte	.LVL1417
+	.4byte	.LVL1397
+	.4byte	.LVL1419
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST328:
-	.4byte	.LVL1373
-	.4byte	.LVL1376
+.LLST330:
+	.4byte	.LVL1375
+	.4byte	.LVL1378
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL1378
-	.4byte	.LVL1392
+	.4byte	.LVL1380
+	.4byte	.LVL1394
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL1392
-	.4byte	.LVL1393
+	.4byte	.LVL1394
+	.4byte	.LVL1395
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1395
-	.4byte	.LVL1417
+	.4byte	.LVL1397
+	.4byte	.LVL1419
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL1419
-	.4byte	.LVL1422
+	.4byte	.LVL1421
+	.4byte	.LVL1424
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST329:
-	.4byte	.LVL1373
-	.4byte	.LVL1376
+.LLST331:
+	.4byte	.LVL1375
+	.4byte	.LVL1378
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL1378
-	.4byte	.LVL1390
+	.4byte	.LVL1380
+	.4byte	.LVL1392
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL1395
-	.4byte	.LVL1409
+	.4byte	.LVL1397
+	.4byte	.LVL1411
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL1409
 	.4byte	.LVL1411
+	.4byte	.LVL1413
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1419
-	.4byte	.LVL1422
+	.4byte	.LVL1421
+	.4byte	.LVL1424
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST330:
-	.4byte	.LVL1300
-	.4byte	.LVL1301
+.LLST332:
+	.4byte	.LVL1302
+	.4byte	.LVL1303
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1301
-	.4byte	.LVL1309
+	.4byte	.LVL1303
+	.4byte	.LVL1311
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
-	.4byte	.LVL1321
-	.4byte	.LVL1379
+	.4byte	.LVL1323
+	.4byte	.LVL1381
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
-	.4byte	.LVL1379
-	.4byte	.LVL1380
+	.4byte	.LVL1381
+	.4byte	.LVL1382
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1380
+	.4byte	.LVL1382
 	.4byte	.LFE284
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
 	.4byte	0
 	.4byte	0
-.LLST331:
-	.4byte	.LVL1285
-	.4byte	.LVL1288
+.LLST333:
+	.4byte	.LVL1287
+	.4byte	.LVL1290
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL1290
-	.4byte	.LVL1302
+	.4byte	.LVL1292
+	.4byte	.LVL1304
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL1309
-	.4byte	.LVL1321
+	.4byte	.LVL1311
+	.4byte	.LVL1323
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL1333
-	.4byte	.LVL1348
+	.4byte	.LVL1335
+	.4byte	.LVL1350
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1361
-	.4byte	.LVL1366
+	.4byte	.LVL1363
+	.4byte	.LVL1368
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST332:
-	.4byte	.LVL1323
-	.4byte	.LVL1324
+.LLST334:
+	.4byte	.LVL1325
+	.4byte	.LVL1326
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1324
 	.4byte	.LVL1326
+	.4byte	.LVL1328
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -72
-	.4byte	.LVL1362
-	.4byte	.LVL1363
+	.4byte	.LVL1364
+	.4byte	.LVL1365
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1363
-	.4byte	.LVL1364
+	.4byte	.LVL1365
+	.4byte	.LVL1366
 	.2byte	0x2
 	.byte	0x73
 	.sleb128 12
-	.4byte	.LVL1364
-	.4byte	.LVL1365
+	.4byte	.LVL1366
+	.4byte	.LVL1367
 	.2byte	0x2
 	.byte	0x73
 	.sleb128 -8
-	.4byte	.LVL1374
-	.4byte	.LVL1375
+	.4byte	.LVL1376
+	.4byte	.LVL1377
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1378
-	.4byte	.LVL1384
+	.4byte	.LVL1380
+	.4byte	.LVL1386
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1387
-	.4byte	.LVL1390
+	.4byte	.LVL1389
+	.4byte	.LVL1392
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1397
-	.4byte	.LVL1400
+	.4byte	.LVL1399
+	.4byte	.LVL1402
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1400
-	.4byte	.LVL1401-1
+	.4byte	.LVL1402
+	.4byte	.LVL1403-1
 	.2byte	0x2
 	.byte	0x73
 	.sleb128 12
-	.4byte	.LVL1401-1
-	.4byte	.LVL1407
+	.4byte	.LVL1403-1
+	.4byte	.LVL1409
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1412
-	.4byte	.LVL1417
+	.4byte	.LVL1414
+	.4byte	.LVL1419
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST333:
-	.4byte	.LVL1332
-	.4byte	.LVL1348
+.LLST335:
+	.4byte	.LVL1334
+	.4byte	.LVL1350
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL1361
-	.4byte	.LVL1366
+	.4byte	.LVL1363
+	.4byte	.LVL1368
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST334:
-	.4byte	.LVL1332
-	.4byte	.LVL1336
+.LLST336:
+	.4byte	.LVL1334
+	.4byte	.LVL1338
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST335:
-	.4byte	.LVL1388
-	.4byte	.LVL1389
+.LLST337:
+	.4byte	.LVL1390
+	.4byte	.LVL1391
 	.2byte	0x2
 	.byte	0x77
 	.sleb128 4
-	.4byte	.LVL1397
-	.4byte	.LVL1398-1
+	.4byte	.LVL1399
+	.4byte	.LVL1400-1
 	.2byte	0x2
 	.byte	0x77
 	.sleb128 4
 	.4byte	0
 	.4byte	0
-.LLST336:
-	.4byte	.LVL1402
-	.4byte	.LVL1405
+.LLST338:
+	.4byte	.LVL1404
+	.4byte	.LVL1407
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1405
-	.4byte	.LVL1406
+	.4byte	.LVL1407
+	.4byte	.LVL1408
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST337:
-	.4byte	.LVL1410
-	.4byte	.LVL1417
+.LLST339:
+	.4byte	.LVL1412
+	.4byte	.LVL1419
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
 	.4byte	0
 	.4byte	0
-.LLST338:
-	.4byte	.LVL1413
-	.4byte	.LVL1414-1
+.LLST340:
+	.4byte	.LVL1415
+	.4byte	.LVL1416-1
 	.2byte	0x2
 	.byte	0x75
 	.sleb128 4
-	.4byte	.LVL1414-1
-	.4byte	.LVL1415
+	.4byte	.LVL1416-1
+	.4byte	.LVL1417
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST231:
-	.4byte	.LVL889
-	.4byte	.LVL890
+.LLST233:
+	.4byte	.LVL891
+	.4byte	.LVL892
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL890
-	.4byte	.LVL906
+	.4byte	.LVL892
+	.4byte	.LVL908
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL906
+	.4byte	.LVL908
 	.4byte	.LFE283
 	.2byte	0x4
 	.byte	0xf3
@@ -46759,58 +46899,58 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST232:
-	.4byte	.LVL889
-	.4byte	.LVL891-1
+.LLST234:
+	.4byte	.LVL891
+	.4byte	.LVL893-1
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST233:
-	.4byte	.LVL892
-	.4byte	.LVL893
+.LLST235:
+	.4byte	.LVL894
+	.4byte	.LVL895
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST234:
-	.4byte	.LVL895
-	.4byte	.LVL897-1
+.LLST236:
+	.4byte	.LVL897
+	.4byte	.LVL899-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL901
 	.4byte	.LVL903
+	.4byte	.LVL905
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL903
-	.4byte	.LVL904
+	.4byte	.LVL905
+	.4byte	.LVL906
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST235:
-	.4byte	.LVL895
-	.4byte	.LVL900
+.LLST237:
+	.4byte	.LVL897
+	.4byte	.LVL902
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL901
-	.4byte	.LVL902
+	.4byte	.LVL903
+	.4byte	.LVL904
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST236:
-	.4byte	.LVL894
+.LLST238:
 	.4byte	.LVL896
+	.4byte	.LVL898
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL896
-	.4byte	.LVL897-1
+	.4byte	.LVL898
+	.4byte	.LVL899-1
 	.2byte	0x5
 	.byte	0x3
 	.4byte	g_num_free_superblocks
-	.4byte	.LVL901
-	.4byte	.LVL904
+	.4byte	.LVL903
+	.4byte	.LVL906
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
@@ -46877,177 +47017,177 @@ __func__.9940:
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST257:
-	.4byte	.LVL1035
-	.4byte	.LVL1036
+.LLST259:
+	.4byte	.LVL1037
+	.4byte	.LVL1038
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST249:
-	.4byte	.LVL992
-	.4byte	.LVL995
+.LLST251:
+	.4byte	.LVL994
+	.4byte	.LVL997
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL995
+	.4byte	.LVL997
 	.4byte	.LFE278
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST250:
-	.4byte	.LVL1000
-	.4byte	.LVL1002-1
+.LLST252:
+	.4byte	.LVL1002
+	.4byte	.LVL1004-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1002-1
-	.4byte	.LVL1005
+	.4byte	.LVL1004-1
+	.4byte	.LVL1007
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -52
-	.4byte	.LVL1017
-	.4byte	.LVL1018
+	.4byte	.LVL1019
+	.4byte	.LVL1020
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1018
-	.4byte	.LVL1027
+	.4byte	.LVL1020
+	.4byte	.LVL1029
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1027
-	.4byte	.LVL1028
+	.4byte	.LVL1029
+	.4byte	.LVL1030
 	.2byte	0x3
 	.byte	0x76
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1029
+	.4byte	.LVL1031
 	.4byte	.LFE278
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST251:
-	.4byte	.LVL1004
-	.4byte	.LVL1005
+.LLST253:
+	.4byte	.LVL1006
+	.4byte	.LVL1007
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1006
-	.4byte	.LVL1007
+	.4byte	.LVL1008
+	.4byte	.LVL1009
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1012
-	.4byte	.LVL1013
+	.4byte	.LVL1014
+	.4byte	.LVL1015
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1013
 	.4byte	.LVL1015
+	.4byte	.LVL1017
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1015
-	.4byte	.LVL1016
+	.4byte	.LVL1017
+	.4byte	.LVL1018
 	.2byte	0x3
 	.byte	0x76
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1020
-	.4byte	.LVL1021
+	.4byte	.LVL1022
+	.4byte	.LVL1023
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1021
-	.4byte	.LVL1022
+	.4byte	.LVL1023
+	.4byte	.LVL1024
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1024
-	.4byte	.LVL1025
+	.4byte	.LVL1026
+	.4byte	.LVL1027
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1026
-	.4byte	.LVL1030
+	.4byte	.LVL1028
+	.4byte	.LVL1032
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1030
-	.4byte	.LVL1031
+	.4byte	.LVL1032
+	.4byte	.LVL1033
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST252:
-	.4byte	.LVL1003
-	.4byte	.LVL1007
+.LLST254:
+	.4byte	.LVL1005
+	.4byte	.LVL1009
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL1012
-	.4byte	.LVL1017
+	.4byte	.LVL1014
+	.4byte	.LVL1019
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
-.LLST253:
-	.4byte	.LVL1030
+.LLST255:
 	.4byte	.LVL1032
+	.4byte	.LVL1034
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1032
+	.4byte	.LVL1034
 	.4byte	.LFE278
 	.2byte	0x1
 	.byte	0x5e
 	.4byte	0
 	.4byte	0
-.LLST254:
-	.4byte	.LVL994
-	.4byte	.LVL1003
+.LLST256:
+	.4byte	.LVL996
+	.4byte	.LVL1005
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL1017
+	.4byte	.LVL1019
 	.4byte	.LFE278
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
-.LLST255:
-	.4byte	.LVL994
-	.4byte	.LVL995
+.LLST257:
+	.4byte	.LVL996
+	.4byte	.LVL997
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 16
-	.4byte	.LVL995
-	.4byte	.LVL997-1
+	.4byte	.LVL997
+	.4byte	.LVL999-1
 	.2byte	0x2
 	.byte	0x74
 	.sleb128 16
-	.4byte	.LVL997-1
+	.4byte	.LVL999-1
 	.4byte	.LFE278
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -44
 	.4byte	0
 	.4byte	0
-.LLST256:
-	.4byte	.LVL996
-	.4byte	.LVL1001
+.LLST258:
+	.4byte	.LVL998
+	.4byte	.LVL1003
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -52
-	.4byte	.LVL1017
+	.4byte	.LVL1019
 	.4byte	.LFE278
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -52
 	.4byte	0
 	.4byte	0
-.LLST446:
-	.4byte	.LVL1972
-	.4byte	.LVL1975
+.LLST448:
+	.4byte	.LVL1974
+	.4byte	.LVL1977
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1985
 	.4byte	.LVL1987
+	.4byte	.LVL1989
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1988
+	.4byte	.LVL1990
 	.4byte	.LFE277
 	.2byte	0x1
 	.byte	0x57
@@ -47067,243 +47207,243 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST243:
-	.4byte	.LVL941
-	.4byte	.LVL945
+.LLST245:
+	.4byte	.LVL943
+	.4byte	.LVL947
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL945
-	.4byte	.LVL946
+	.4byte	.LVL947
+	.4byte	.LVL948
 	.2byte	0x3
 	.byte	0x75
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL946
-	.4byte	.LVL947
+	.4byte	.LVL948
+	.4byte	.LVL949
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL949
-	.4byte	.LVL950
+	.4byte	.LVL951
+	.4byte	.LVL952
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL950
-	.4byte	.LVL958
+	.4byte	.LVL952
+	.4byte	.LVL960
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL958
-	.4byte	.LVL959
+	.4byte	.LVL960
+	.4byte	.LVL961
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL960
-	.4byte	.LVL981
+	.4byte	.LVL962
+	.4byte	.LVL983
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST244:
-	.4byte	.LVL943
-	.4byte	.LVL946
+.LLST246:
+	.4byte	.LVL945
+	.4byte	.LVL948
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -44
-	.4byte	.LVL951
-	.4byte	.LVL981
+	.4byte	.LVL953
+	.4byte	.LVL983
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST245:
-	.4byte	.LVL941
-	.4byte	.LVL981
+.LLST247:
+	.4byte	.LVL943
+	.4byte	.LVL983
 	.2byte	0x1
 	.byte	0x5b
 	.4byte	0
 	.4byte	0
-.LLST246:
-	.4byte	.LVL964
-	.4byte	.LVL965
-	.2byte	0x1
-	.byte	0x51
+.LLST248:
 	.4byte	.LVL966
 	.4byte	.LVL967
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL973
-	.4byte	.LVL974
+	.4byte	.LVL968
+	.4byte	.LVL969
 	.2byte	0x1
 	.byte	0x51
 	.4byte	.LVL975
 	.4byte	.LVL976
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL984
-	.4byte	.LVL988
+	.4byte	.LVL977
+	.4byte	.LVL978
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL989
+	.4byte	.LVL986
 	.4byte	.LVL990
 	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL991
+	.4byte	.LVL992
+	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL990
+	.4byte	.LVL992
 	.4byte	.LFE273
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST247:
-	.4byte	.LVL952
+.LLST249:
 	.4byte	.LVL954
+	.4byte	.LVL956
 	.2byte	0x5
 	.byte	0x40
 	.byte	0x7a
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL955
-	.4byte	.LVL956
+	.4byte	.LVL957
+	.4byte	.LVL958
 	.2byte	0x5
 	.byte	0x40
 	.byte	0x7a
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL956
-	.4byte	.LVL957
+	.4byte	.LVL958
+	.4byte	.LVL959
 	.2byte	0x5
 	.byte	0x41
 	.byte	0x7a
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL963
-	.4byte	.LVL968
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL969
+	.4byte	.LVL965
 	.4byte	.LVL970
 	.2byte	0x1
 	.byte	0x53
+	.4byte	.LVL971
 	.4byte	.LVL972
-	.4byte	.LVL977
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL978
+	.4byte	.LVL974
 	.4byte	.LVL979
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL985
-	.4byte	.LVL986
+	.4byte	.LVL980
+	.4byte	.LVL981
 	.2byte	0x1
 	.byte	0x53
 	.4byte	.LVL987
 	.4byte	.LVL988
 	.2byte	0x1
 	.byte	0x53
+	.4byte	.LVL989
 	.4byte	.LVL990
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL992
 	.4byte	.LFE273
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST248:
-	.4byte	.LVL951
-	.4byte	.LVL981
+.LLST250:
+	.4byte	.LVL953
+	.4byte	.LVL983
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST368:
-	.4byte	.LVL1557
-	.4byte	.LVL1564
+.LLST370:
+	.4byte	.LVL1559
+	.4byte	.LVL1566
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL1566
 	.4byte	.LVL1568
+	.4byte	.LVL1570
 	.2byte	0x1
 	.byte	0x5b
 	.4byte	0
 	.4byte	0
-.LLST369:
-	.4byte	.LVL1558
-	.4byte	.LVL1574
+.LLST371:
+	.4byte	.LVL1560
+	.4byte	.LVL1576
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST370:
-	.4byte	.LVL1557
-	.4byte	.LVL1564
+.LLST372:
+	.4byte	.LVL1559
+	.4byte	.LVL1566
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1564
-	.4byte	.LVL1570
+	.4byte	.LVL1566
+	.4byte	.LVL1572
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1571
-	.4byte	.LVL1574
+	.4byte	.LVL1573
+	.4byte	.LVL1576
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST239:
-	.4byte	.LVL925
+.LLST241:
 	.4byte	.LVL927
+	.4byte	.LVL929
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL927
-	.4byte	.LVL930
+	.4byte	.LVL929
+	.4byte	.LVL932
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL930
-	.4byte	.LVL931-1
+	.4byte	.LVL932
+	.4byte	.LVL933-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL931-1
-	.4byte	.LVL931
+	.4byte	.LVL933-1
+	.4byte	.LVL933
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL931
-	.4byte	.LVL934
+	.4byte	.LVL933
+	.4byte	.LVL936
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL934
+	.4byte	.LVL936
 	.4byte	.LFE270
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST240:
-	.4byte	.LVL926
+.LLST242:
 	.4byte	.LVL928
+	.4byte	.LVL930
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL928
-	.4byte	.LVL929-1
+	.4byte	.LVL930
+	.4byte	.LVL931-1
 	.2byte	0x5
 	.byte	0x3
 	.4byte	req_sys+4
-	.4byte	.LVL931
-	.4byte	.LVL932
+	.4byte	.LVL933
+	.4byte	.LVL934
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL932
-	.4byte	.LVL933-1
+	.4byte	.LVL934
+	.4byte	.LVL935-1
 	.2byte	0x5
 	.byte	0x3
 	.4byte	req_sys+4
 	.4byte	0
 	.4byte	0
-.LLST241:
-	.4byte	.LVL925
+.LLST243:
 	.4byte	.LVL927
+	.4byte	.LVL929
 	.2byte	0x7
 	.byte	0x70
 	.sleb128 6
@@ -47312,8 +47452,8 @@ __func__.9940:
 	.byte	0x31
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL927
-	.4byte	.LVL929-1
+	.4byte	.LVL929
+	.4byte	.LVL931-1
 	.2byte	0x7
 	.byte	0x76
 	.sleb128 6
@@ -47322,8 +47462,8 @@ __func__.9940:
 	.byte	0x31
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL931
-	.4byte	.LVL933-1
+	.4byte	.LVL933
+	.4byte	.LVL935-1
 	.2byte	0x7
 	.byte	0x76
 	.sleb128 6
@@ -47332,7 +47472,7 @@ __func__.9940:
 	.byte	0x31
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL934
+	.4byte	.LVL936
 	.4byte	.LFE270
 	.2byte	0x7
 	.byte	0x70
@@ -47344,35 +47484,35 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST242:
-	.4byte	.LVL925
+.LLST244:
 	.4byte	.LVL927
+	.4byte	.LVL929
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 24
-	.4byte	.LVL927
-	.4byte	.LVL929-1
+	.4byte	.LVL929
+	.4byte	.LVL931-1
 	.2byte	0x2
 	.byte	0x76
 	.sleb128 24
-	.4byte	.LVL931
-	.4byte	.LVL933-1
+	.4byte	.LVL933
+	.4byte	.LVL935-1
 	.2byte	0x2
 	.byte	0x76
 	.sleb128 24
-	.4byte	.LVL934
+	.4byte	.LVL936
 	.4byte	.LFE270
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 24
 	.4byte	0
 	.4byte	0
-.LLST358:
-	.4byte	.LVL1526
-	.4byte	.LVL1529
+.LLST360:
+	.4byte	.LVL1528
+	.4byte	.LVL1531
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1529
+	.4byte	.LVL1531
 	.4byte	.LFE268
 	.2byte	0x4
 	.byte	0xf3
@@ -47381,125 +47521,125 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST359:
-	.4byte	.LVL1526
-	.4byte	.LVL1527
+.LLST361:
+	.4byte	.LVL1528
+	.4byte	.LVL1529
 	.2byte	0x3
 	.byte	0x8
 	.byte	0x20
 	.byte	0x9f
-	.4byte	.LVL1527
-	.4byte	.LVL1528
+	.4byte	.LVL1529
+	.4byte	.LVL1530
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.4byte	.LVL1528
 	.4byte	.LVL1530
+	.4byte	.LVL1532
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST360:
-	.4byte	.LVL1533
+.LLST362:
 	.4byte	.LVL1535
+	.4byte	.LVL1537
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1535
-	.4byte	.LVL1550
+	.4byte	.LVL1537
+	.4byte	.LVL1552
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1550
+	.4byte	.LVL1552
 	.4byte	.LFE267
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST361:
-	.4byte	.LVL1533
+.LLST363:
 	.4byte	.LVL1535
+	.4byte	.LVL1537
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1535
-	.4byte	.LVL1550
+	.4byte	.LVL1537
+	.4byte	.LVL1552
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1550
+	.4byte	.LVL1552
 	.4byte	.LFE267
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST362:
-	.4byte	.LVL1533
-	.4byte	.LVL1534
+.LLST364:
+	.4byte	.LVL1535
+	.4byte	.LVL1536
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1534
+	.4byte	.LVL1536
 	.4byte	.LFE267
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST363:
-	.4byte	.LVL1540
-	.4byte	.LVL1550
+.LLST365:
+	.4byte	.LVL1542
+	.4byte	.LVL1552
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST364:
-	.4byte	.LVL1540
-	.4byte	.LVL1550
+.LLST366:
+	.4byte	.LVL1542
+	.4byte	.LVL1552
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -128
 	.4byte	0
 	.4byte	0
-.LLST365:
-	.4byte	.LVL1538
-	.4byte	.LVL1539-1
+.LLST367:
+	.4byte	.LVL1540
+	.4byte	.LVL1541-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1539-1
-	.4byte	.LVL1548
+	.4byte	.LVL1541-1
+	.4byte	.LVL1550
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -124
-	.4byte	.LVL1548
-	.4byte	.LVL1549-1
+	.4byte	.LVL1550
+	.4byte	.LVL1551-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1549-1
-	.4byte	.LVL1550
+	.4byte	.LVL1551-1
+	.4byte	.LVL1552
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -124
 	.4byte	0
 	.4byte	0
-.LLST366:
-	.4byte	.LVL1533
+.LLST368:
 	.4byte	.LVL1535
+	.4byte	.LVL1537
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1535
-	.4byte	.LVL1536
+	.4byte	.LVL1537
+	.4byte	.LVL1538
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1537
-	.4byte	.LVL1550
+	.4byte	.LVL1539
+	.4byte	.LVL1552
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1550
+	.4byte	.LVL1552
 	.4byte	.LFE267
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST367:
-	.4byte	.LVL1533
+.LLST369:
 	.4byte	.LVL1535
+	.4byte	.LVL1537
 	.2byte	0xf
 	.byte	0x70
 	.sleb128 0
@@ -47512,7 +47652,7 @@ __func__.9940:
 	.byte	0x1a
 	.byte	0x25
 	.byte	0x9f
-	.4byte	.LVL1550
+	.4byte	.LVL1552
 	.4byte	.LFE267
 	.2byte	0xf
 	.byte	0x70
@@ -47528,135 +47668,135 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST350:
-	.4byte	.LVL1502
+.LLST352:
 	.4byte	.LVL1504
+	.4byte	.LVL1506
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1504
-	.4byte	.LVL1515
+	.4byte	.LVL1506
+	.4byte	.LVL1517
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1519
-	.4byte	.LVL1524
+	.4byte	.LVL1521
+	.4byte	.LVL1526
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1524
+	.4byte	.LVL1526
 	.4byte	.LFE266
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST351:
-	.4byte	.LVL1502
+.LLST353:
 	.4byte	.LVL1504
+	.4byte	.LVL1506
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1504
-	.4byte	.LVL1514
+	.4byte	.LVL1506
+	.4byte	.LVL1516
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1519
-	.4byte	.LVL1524
+	.4byte	.LVL1521
+	.4byte	.LVL1526
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1524
+	.4byte	.LVL1526
 	.4byte	.LFE266
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST352:
-	.4byte	.LVL1502
-	.4byte	.LVL1503
+.LLST354:
+	.4byte	.LVL1504
+	.4byte	.LVL1505
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1503
-	.4byte	.LVL1506
+	.4byte	.LVL1505
+	.4byte	.LVL1508
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
-	.4byte	.LVL1506
-	.4byte	.LVL1507
+	.4byte	.LVL1508
+	.4byte	.LVL1509
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -136
-	.4byte	.LVL1507
-	.4byte	.LVL1520
+	.4byte	.LVL1509
+	.4byte	.LVL1522
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
-	.4byte	.LVL1520
-	.4byte	.LVL1521
+	.4byte	.LVL1522
+	.4byte	.LVL1523
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1521
+	.4byte	.LVL1523
 	.4byte	.LFE266
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
 	.4byte	0
 	.4byte	0
-.LLST353:
-	.4byte	.LVL1511
-	.4byte	.LVL1524
+.LLST355:
+	.4byte	.LVL1513
+	.4byte	.LVL1526
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST354:
-	.4byte	.LVL1510
-	.4byte	.LVL1524
+.LLST356:
+	.4byte	.LVL1512
+	.4byte	.LVL1526
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -132
 	.4byte	0
 	.4byte	0
-.LLST355:
-	.4byte	.LVL1508
-	.4byte	.LVL1509-1
+.LLST357:
+	.4byte	.LVL1510
+	.4byte	.LVL1511-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1509-1
-	.4byte	.LVL1521
+	.4byte	.LVL1511-1
+	.4byte	.LVL1523
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -124
-	.4byte	.LVL1521
-	.4byte	.LVL1522
+	.4byte	.LVL1523
+	.4byte	.LVL1524
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1522
 	.4byte	.LVL1524
+	.4byte	.LVL1526
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -124
 	.4byte	0
 	.4byte	0
-.LLST356:
-	.4byte	.LVL1502
+.LLST358:
 	.4byte	.LVL1504
+	.4byte	.LVL1506
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1504
-	.4byte	.LVL1505
+	.4byte	.LVL1506
+	.4byte	.LVL1507
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL1507
-	.4byte	.LVL1524
+	.4byte	.LVL1509
+	.4byte	.LVL1526
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL1524
+	.4byte	.LVL1526
 	.4byte	.LFE266
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST357:
-	.4byte	.LVL1502
+.LLST359:
 	.4byte	.LVL1504
+	.4byte	.LVL1506
 	.2byte	0xf
 	.byte	0x70
 	.sleb128 0
@@ -47669,29 +47809,29 @@ __func__.9940:
 	.byte	0x1a
 	.byte	0x25
 	.byte	0x9f
-	.4byte	.LVL1504
-	.4byte	.LVL1505
+	.4byte	.LVL1506
+	.4byte	.LVL1507
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1507
-	.4byte	.LVL1517
+	.4byte	.LVL1509
+	.4byte	.LVL1519
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1517
-	.4byte	.LVL1518-1
+	.4byte	.LVL1519
+	.4byte	.LVL1520-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1518-1
-	.4byte	.LVL1519
+	.4byte	.LVL1520-1
+	.4byte	.LVL1521
 	.2byte	0x3
 	.byte	0x76
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL1519
-	.4byte	.LVL1524
+	.4byte	.LVL1521
+	.4byte	.LVL1526
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1524
+	.4byte	.LVL1526
 	.4byte	.LFE266
 	.2byte	0xf
 	.byte	0x70
@@ -47707,12 +47847,12 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST227:
-	.4byte	.LVL872
-	.4byte	.LVL877
+.LLST229:
+	.4byte	.LVL874
+	.4byte	.LVL879
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL877
+	.4byte	.LVL879
 	.4byte	.LFE265
 	.2byte	0x4
 	.byte	0xf3
@@ -47721,71 +47861,71 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST228:
-	.4byte	.LVL872
-	.4byte	.LVL876
+.LLST230:
+	.4byte	.LVL874
+	.4byte	.LVL878
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL876
+	.4byte	.LVL878
 	.4byte	.LFE265
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST229:
-	.4byte	.LVL872
-	.4byte	.LVL875
+.LLST231:
+	.4byte	.LVL874
+	.4byte	.LVL877
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL875
+	.4byte	.LVL877
 	.4byte	.LFE265
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
-.LLST230:
-	.4byte	.LVL878
-	.4byte	.LVL879
+.LLST232:
+	.4byte	.LVL880
+	.4byte	.LVL881
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL880
 	.4byte	.LVL882
+	.4byte	.LVL884
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL882
-	.4byte	.LVL883-1
+	.4byte	.LVL884
+	.4byte	.LVL885-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL885
 	.4byte	.LVL887
+	.4byte	.LVL889
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL888
+	.4byte	.LVL890
 	.4byte	.LFE265
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST312:
-	.4byte	.LVL1280
-	.4byte	.LVL1281
+.LLST314:
+	.4byte	.LVL1282
+	.4byte	.LVL1283
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1281
-	.4byte	.LVL1282
+	.4byte	.LVL1283
+	.4byte	.LVL1284
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1282
-	.4byte	.LVL1283-1
+	.4byte	.LVL1284
+	.4byte	.LVL1285-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1283-1
-	.4byte	.LVL1283
+	.4byte	.LVL1285-1
+	.4byte	.LVL1285
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1283
-	.4byte	.LVL1284
+	.4byte	.LVL1285
+	.4byte	.LVL1286
 	.2byte	0x3
 	.byte	0x74
 	.sleb128 1
@@ -47890,12 +48030,12 @@ __func__.9940:
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST225:
-	.4byte	.LVL867
-	.4byte	.LVL868
+.LLST227:
+	.4byte	.LVL869
+	.4byte	.LVL870
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL868
+	.4byte	.LVL870
 	.4byte	.LFE262
 	.2byte	0x4
 	.byte	0xf3
@@ -47904,9 +48044,9 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST226:
-	.4byte	.LVL869
-	.4byte	.LVL870
+.LLST228:
+	.4byte	.LVL871
+	.4byte	.LVL872
 	.2byte	0x9
 	.byte	0x72
 	.sleb128 0
@@ -47916,22 +48056,22 @@ __func__.9940:
 	.2byte	0xffff
 	.byte	0x1a
 	.byte	0x9f
-	.4byte	.LVL870
-	.4byte	.LVL871-1
+	.4byte	.LVL872
+	.4byte	.LVL873-1
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST212:
-	.4byte	.LVL831
-	.4byte	.LVL832
+.LLST214:
+	.4byte	.LVL833
+	.4byte	.LVL834
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL832
-	.4byte	.LVL844
+	.4byte	.LVL834
+	.4byte	.LVL846
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL844
+	.4byte	.LVL846
 	.4byte	.LFE261
 	.2byte	0x4
 	.byte	0xf3
@@ -47940,16 +48080,16 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST213:
-	.4byte	.LVL831
-	.4byte	.LVL832
+.LLST215:
+	.4byte	.LVL833
+	.4byte	.LVL834
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL832
-	.4byte	.LVL844
+	.4byte	.LVL834
+	.4byte	.LVL846
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL844
+	.4byte	.LVL846
 	.4byte	.LFE261
 	.2byte	0x4
 	.byte	0xf3
@@ -47958,26 +48098,26 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST214:
-	.4byte	.LVL831
-	.4byte	.LVL832
+.LLST216:
+	.4byte	.LVL833
+	.4byte	.LVL834
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL832
-	.4byte	.LVL844
+	.4byte	.LVL834
+	.4byte	.LVL846
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -36
-	.4byte	.LVL844
+	.4byte	.LVL846
 	.4byte	.LFE261
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 -36
 	.4byte	0
 	.4byte	0
-.LLST215:
-	.4byte	.LVL836
-	.4byte	.LVL844
+.LLST217:
+	.4byte	.LVL838
+	.4byte	.LVL846
 	.2byte	0x7
 	.byte	0x7a
 	.sleb128 0
@@ -47987,340 +48127,340 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST216:
-	.4byte	.LVL838
-	.4byte	.LVL839
+.LLST218:
+	.4byte	.LVL840
+	.4byte	.LVL841
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL839
-	.4byte	.LVL840-1
+	.4byte	.LVL841
+	.4byte	.LVL842-1
 	.2byte	0x5
 	.byte	0x3
 	.4byte	req_sys+12
 	.4byte	0
 	.4byte	0
-.LLST217:
-	.4byte	.LVL831
-	.4byte	.LVL832
+.LLST219:
+	.4byte	.LVL833
+	.4byte	.LVL834
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL832
-	.4byte	.LVL841
+	.4byte	.LVL834
+	.4byte	.LVL843
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL842
 	.4byte	.LVL844
+	.4byte	.LVL846
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST206:
-	.4byte	.LVL808
+.LLST208:
 	.4byte	.LVL810
+	.4byte	.LVL812
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL810
-	.4byte	.LVL814
+	.4byte	.LVL812
+	.4byte	.LVL816
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL814
 	.4byte	.LVL816
+	.4byte	.LVL818
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL816
+	.4byte	.LVL818
 	.4byte	.LFE260
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST207:
-	.4byte	.LVL819
-	.4byte	.LVL820
+.LLST209:
+	.4byte	.LVL821
+	.4byte	.LVL822
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL820
 	.4byte	.LVL822
+	.4byte	.LVL824
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL822
-	.4byte	.LVL823
+	.4byte	.LVL824
+	.4byte	.LVL825
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL826
-	.4byte	.LVL829
+	.4byte	.LVL828
+	.4byte	.LVL831
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL829
-	.4byte	.LVL830
+	.4byte	.LVL831
+	.4byte	.LVL832
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 1
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST208:
-	.4byte	.LVL819
-	.4byte	.LVL820
+.LLST210:
+	.4byte	.LVL821
+	.4byte	.LVL822
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL820
-	.4byte	.LVL821
+	.4byte	.LVL822
+	.4byte	.LVL823
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL826
-	.4byte	.LVL827
+	.4byte	.LVL828
+	.4byte	.LVL829
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL828
+	.4byte	.LVL830
 	.4byte	.LFE260
 	.2byte	0x1
 	.byte	0x52
 	.4byte	0
 	.4byte	0
-.LLST209:
-	.4byte	.LVL809
-	.4byte	.LVL813
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL814
+.LLST211:
+	.4byte	.LVL811
 	.4byte	.LVL815
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL815
 	.4byte	.LVL816
+	.4byte	.LVL817
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL817
+	.4byte	.LVL818
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 12
-	.4byte	.LVL816
-	.4byte	.LVL819-1
+	.4byte	.LVL818
+	.4byte	.LVL821-1
 	.2byte	0x2
 	.byte	0x74
 	.sleb128 12
 	.4byte	0
 	.4byte	0
-.LLST210:
-	.4byte	.LVL809
-	.4byte	.LVL810
+.LLST212:
+	.4byte	.LVL811
+	.4byte	.LVL812
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 24
-	.4byte	.LVL810
-	.4byte	.LVL811-1
+	.4byte	.LVL812
+	.4byte	.LVL813-1
 	.2byte	0x2
 	.byte	0x74
 	.sleb128 24
-	.4byte	.LVL814
 	.4byte	.LVL816
+	.4byte	.LVL818
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 24
-	.4byte	.LVL816
-	.4byte	.LVL819-1
+	.4byte	.LVL818
+	.4byte	.LVL821-1
 	.2byte	0x2
 	.byte	0x74
 	.sleb128 24
 	.4byte	0
 	.4byte	0
-.LLST211:
-	.4byte	.LVL817
-	.4byte	.LVL818
+.LLST213:
+	.4byte	.LVL819
+	.4byte	.LVL820
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL818
-	.4byte	.LVL819-1
+	.4byte	.LVL820
+	.4byte	.LVL821-1
 	.2byte	0x5
 	.byte	0x3
 	.4byte	p_sys_spare_buf
 	.4byte	0
 	.4byte	0
-.LLST218:
-	.4byte	.LVL845
-	.4byte	.LVL848-1
+.LLST220:
+	.4byte	.LVL847
+	.4byte	.LVL850-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL848-1
+	.4byte	.LVL850-1
 	.4byte	.LFE259
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST219:
-	.4byte	.LVL849
-	.4byte	.LVL855
+.LLST221:
+	.4byte	.LVL851
+	.4byte	.LVL857
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL858
+	.4byte	.LVL860
 	.4byte	.LFE259
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST220:
-	.4byte	.LVL848
+.LLST222:
 	.4byte	.LVL850
+	.4byte	.LVL852
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST221:
-	.4byte	.LVL853
+.LLST223:
 	.4byte	.LVL855
+	.4byte	.LVL857
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL858
-	.4byte	.LVL863
+	.4byte	.LVL860
+	.4byte	.LVL865
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL863
-	.4byte	.LVL864
+	.4byte	.LVL865
+	.4byte	.LVL866
 	.2byte	0x3
 	.byte	0x76
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL864
-	.4byte	.LVL865
+	.4byte	.LVL866
+	.4byte	.LVL867
 	.2byte	0x3
 	.byte	0x78
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL865
+	.4byte	.LVL867
 	.4byte	.LFE259
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
-.LLST222:
-	.4byte	.LVL846
-	.4byte	.LVL852
+.LLST224:
+	.4byte	.LVL848
+	.4byte	.LVL854
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST223:
-	.4byte	.LVL847
-	.4byte	.LVL848-1
+.LLST225:
+	.4byte	.LVL849
+	.4byte	.LVL850-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL848-1
-	.4byte	.LVL857
+	.4byte	.LVL850-1
+	.4byte	.LVL859
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
-	.4byte	.LVL857
-	.4byte	.LVL858
+	.4byte	.LVL859
+	.4byte	.LVL860
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -40
-	.4byte	.LVL858
+	.4byte	.LVL860
 	.4byte	.LFE259
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
 	.4byte	0
 	.4byte	0
-.LLST224:
-	.4byte	.LVL859
-	.4byte	.LVL860
+.LLST226:
+	.4byte	.LVL861
+	.4byte	.LVL862
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -36
 	.4byte	0
 	.4byte	0
-.LLST199:
-	.4byte	.LVL784
-	.4byte	.LVL787
+.LLST201:
+	.4byte	.LVL786
+	.4byte	.LVL789
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL787
+	.4byte	.LVL789
 	.4byte	.LFE257
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST200:
-	.4byte	.LVL786
-	.4byte	.LVL791
+.LLST202:
+	.4byte	.LVL788
+	.4byte	.LVL793
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL795
-	.4byte	.LVL802
+	.4byte	.LVL797
+	.4byte	.LVL804
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST201:
-	.4byte	.LVL796
-	.4byte	.LVL802
+.LLST203:
+	.4byte	.LVL798
+	.4byte	.LVL804
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST202:
-	.4byte	.LVL788
-	.4byte	.LVL789
+.LLST204:
+	.4byte	.LVL790
+	.4byte	.LVL791
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL789
-	.4byte	.LVL790
+	.4byte	.LVL791
+	.4byte	.LVL792
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL790
 	.4byte	.LVL792
+	.4byte	.LVL794
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL795
 	.4byte	.LVL797
+	.4byte	.LVL799
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL797
-	.4byte	.LVL798
+	.4byte	.LVL799
+	.4byte	.LVL800
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL799
-	.4byte	.LVL802
+	.4byte	.LVL801
+	.4byte	.LVL804
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST203:
-	.4byte	.LVL790
-	.4byte	.LVL793
+.LLST205:
+	.4byte	.LVL792
+	.4byte	.LVL795
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL794
-	.4byte	.LVL795
+	.4byte	.LVL796
+	.4byte	.LVL797
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL796
-	.4byte	.LVL800
+	.4byte	.LVL798
+	.4byte	.LVL802
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL800
-	.4byte	.LVL801
+	.4byte	.LVL802
+	.4byte	.LVL803
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL802
 	.4byte	.LVL804
+	.4byte	.LVL806
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL804
 	.4byte	.LVL806
+	.4byte	.LVL808
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL806
-	.4byte	.LVL807
+	.4byte	.LVL808
+	.4byte	.LVL809
 	.2byte	0x3
 	.byte	0x76
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL807
+	.4byte	.LVL809
 	.4byte	.LFE257
 	.2byte	0x3
 	.byte	0x77
@@ -48328,40 +48468,40 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST204:
-	.4byte	.LVL790
-	.4byte	.LVL793
+.LLST206:
+	.4byte	.LVL792
+	.4byte	.LVL795
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL794
-	.4byte	.LVL795
+	.4byte	.LVL796
+	.4byte	.LVL797
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL802
-	.4byte	.LVL805-1
+	.4byte	.LVL804
+	.4byte	.LVL807-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL805-1
-	.4byte	.LVL806
+	.4byte	.LVL807-1
+	.4byte	.LVL808
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
 	.4byte	0
 	.4byte	0
-.LLST205:
-	.4byte	.LVL790
-	.4byte	.LVL793
+.LLST207:
+	.4byte	.LVL792
+	.4byte	.LVL795
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST197:
-	.4byte	.LVL771
+.LLST199:
 	.4byte	.LVL773
+	.4byte	.LVL775
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL773
+	.4byte	.LVL775
 	.4byte	.LFE256
 	.2byte	0x4
 	.byte	0xf3
@@ -48370,12 +48510,12 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST198:
-	.4byte	.LVL771
-	.4byte	.LVL772
+.LLST200:
+	.4byte	.LVL773
+	.4byte	.LVL774
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL772
+	.4byte	.LVL774
 	.4byte	.LFE256
 	.2byte	0x4
 	.byte	0xf3
@@ -49089,12 +49229,12 @@ __func__.9940:
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST175:
-	.4byte	.LVL633
-	.4byte	.LVL635-1
+.LLST177:
+	.4byte	.LVL635
+	.4byte	.LVL637-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL635-1
+	.4byte	.LVL637-1
 	.4byte	.LFE243
 	.2byte	0x4
 	.byte	0xf3
@@ -49103,12 +49243,12 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST176:
-	.4byte	.LVL633
-	.4byte	.LVL635-1
+.LLST178:
+	.4byte	.LVL635
+	.4byte	.LVL637-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL635-1
+	.4byte	.LVL637-1
 	.4byte	.LFE243
 	.2byte	0x4
 	.byte	0xf3
@@ -49117,33 +49257,33 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST177:
-	.4byte	.LVL634
-	.4byte	.LVL639
+.LLST179:
+	.4byte	.LVL636
+	.4byte	.LVL641
 	.2byte	0x6
 	.byte	0x3
 	.4byte	gSysFreeQueue
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST178:
-	.4byte	.LVL636
+.LLST180:
 	.4byte	.LVL638
+	.4byte	.LVL640
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST196:
-	.4byte	.LVL768
-	.4byte	.LVL769
+.LLST198:
+	.4byte	.LVL770
+	.4byte	.LVL771
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL769
-	.4byte	.LVL770-1
+	.4byte	.LVL771
+	.4byte	.LVL772-1
 	.2byte	0x5
 	.byte	0x3
 	.4byte	gSysFreeQueue
-	.4byte	.LVL770-1
+	.4byte	.LVL772-1
 	.4byte	.LFE240
 	.2byte	0x4
 	.byte	0xf3
@@ -49152,12 +49292,12 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST157:
-	.4byte	.LVL584
-	.4byte	.LVL585
+.LLST159:
+	.4byte	.LVL586
+	.4byte	.LVL587
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL585
+	.4byte	.LVL587
 	.4byte	.LFE239
 	.2byte	0x4
 	.byte	0xf3
@@ -49166,53 +49306,53 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST158:
-	.4byte	.LVL584
+.LLST160:
 	.4byte	.LVL586
+	.4byte	.LVL588
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL586
-	.4byte	.LVL591-1
+	.4byte	.LVL588
+	.4byte	.LVL593-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL591-1
+	.4byte	.LVL593-1
 	.4byte	.LFE239
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST159:
-	.4byte	.LVL590
+.LLST161:
 	.4byte	.LVL592
+	.4byte	.LVL594
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL592
-	.4byte	.LVL593
+	.4byte	.LVL594
+	.4byte	.LVL595
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL594
+	.4byte	.LVL596
 	.4byte	.LFE239
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST160:
-	.4byte	.LVL595
+.LLST162:
 	.4byte	.LVL597
+	.4byte	.LVL599
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL597
 	.4byte	.LVL599
+	.4byte	.LVL601
 	.2byte	0x3
 	.byte	0x74
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL599
-	.4byte	.LVL600
+	.4byte	.LVL601
+	.4byte	.LVL602
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL600
+	.4byte	.LVL602
 	.4byte	.LFE239
 	.2byte	0x3
 	.byte	0x74
@@ -49220,13 +49360,13 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST161:
-	.4byte	.LVL587
-	.4byte	.LVL588
+.LLST163:
+	.4byte	.LVL589
+	.4byte	.LVL590
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL588
-	.4byte	.LVL589
+	.4byte	.LVL590
+	.4byte	.LVL591
 	.2byte	0x3
 	.byte	0x75
 	.sleb128 1
@@ -49415,98 +49555,98 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST346:
-	.4byte	.LVL1461
+.LLST348:
 	.4byte	.LVL1463
+	.4byte	.LVL1465
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1470
-	.4byte	.LVL1475
+	.4byte	.LVL1472
+	.4byte	.LVL1477
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1475
-	.4byte	.LVL1476
+	.4byte	.LVL1477
+	.4byte	.LVL1478
 	.2byte	0x3
 	.byte	0x76
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL1476
-	.4byte	.LVL1494
+	.4byte	.LVL1478
+	.4byte	.LVL1496
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST347:
-	.4byte	.LVL1462
+.LLST349:
 	.4byte	.LVL1464
+	.4byte	.LVL1466
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1464
-	.4byte	.LVL1468
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1469
+	.4byte	.LVL1466
 	.4byte	.LVL1470
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1480
-	.4byte	.LVL1490
+	.4byte	.LVL1471
+	.4byte	.LVL1472
 	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1491
+	.byte	0x55
+	.4byte	.LVL1482
 	.4byte	.LVL1492
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1492
-	.4byte	.LVL1493-1
-	.2byte	0x1
-	.byte	0x50
 	.4byte	.LVL1493
 	.4byte	.LVL1494
 	.2byte	0x1
 	.byte	0x54
 	.4byte	.LVL1494
+	.4byte	.LVL1495-1
+	.2byte	0x1
+	.byte	0x50
 	.4byte	.LVL1495
+	.4byte	.LVL1496
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1496
+	.4byte	.LVL1497
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1500
-	.4byte	.LVL1501-1
+	.4byte	.LVL1502
+	.4byte	.LVL1503-1
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST348:
-	.4byte	.LVL1472
-	.4byte	.LVL1477
+.LLST350:
+	.4byte	.LVL1474
+	.4byte	.LVL1479
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1484
-	.4byte	.LVL1489
+	.4byte	.LVL1486
+	.4byte	.LVL1491
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST349:
-	.4byte	.LVL1471
-	.4byte	.LVL1492
+.LLST351:
+	.4byte	.LVL1473
+	.4byte	.LVL1494
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
-.LLST155:
-	.4byte	.LVL576
-	.4byte	.LVL582
+.LLST157:
+	.4byte	.LVL578
+	.4byte	.LVL584
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL583
+	.4byte	.LVL585
 	.4byte	.LFE233
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST156:
-	.4byte	.LVL577
-	.4byte	.LVL578
+.LLST158:
+	.4byte	.LVL579
+	.4byte	.LVL580
 	.2byte	0x13
 	.byte	0x73
 	.sleb128 0
@@ -49525,8 +49665,8 @@ __func__.9940:
 	.byte	0x3a
 	.byte	0x24
 	.byte	0x9f
-	.4byte	.LVL578
-	.4byte	.LVL579
+	.4byte	.LVL580
+	.4byte	.LVL581
 	.2byte	0x13
 	.byte	0x72
 	.sleb128 15
@@ -49545,8 +49685,8 @@ __func__.9940:
 	.byte	0x3a
 	.byte	0x24
 	.byte	0x9f
-	.4byte	.LVL579
-	.4byte	.LVL580-1
+	.4byte	.LVL581
+	.4byte	.LVL582-1
 	.2byte	0x18
 	.byte	0x3
 	.4byte	c_ftl_nand_blks_per_die
@@ -49569,68 +49709,68 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST342:
-	.4byte	.LVL1447
-	.4byte	.LVL1448
+.LLST344:
+	.4byte	.LVL1449
+	.4byte	.LVL1450
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1455
-	.4byte	.LVL1456
+	.4byte	.LVL1457
+	.4byte	.LVL1458
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1456
-	.4byte	.LVL1457
+	.4byte	.LVL1458
+	.4byte	.LVL1459
 	.2byte	0x3
 	.byte	0x75
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL1457
-	.4byte	.LVL1458
+	.4byte	.LVL1459
+	.4byte	.LVL1460
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST343:
-	.4byte	.LVL1436
-	.4byte	.LVL1439
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1448
-	.4byte	.LVL1449
+.LLST345:
+	.4byte	.LVL1438
+	.4byte	.LVL1441
 	.2byte	0x1
 	.byte	0x55
 	.4byte	.LVL1450
 	.4byte	.LVL1451
 	.2byte	0x1
 	.byte	0x55
+	.4byte	.LVL1452
+	.4byte	.LVL1453
+	.2byte	0x1
+	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST344:
-	.4byte	.LVL1442
-	.4byte	.LVL1446
+.LLST346:
+	.4byte	.LVL1444
+	.4byte	.LVL1448
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1451
 	.4byte	.LVL1453
+	.4byte	.LVL1455
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1454
-	.4byte	.LVL1455
+	.4byte	.LVL1456
+	.4byte	.LVL1457
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST345:
-	.4byte	.LVL1434
-	.4byte	.LVL1445
+.LLST347:
+	.4byte	.LVL1436
+	.4byte	.LVL1447
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1448
-	.4byte	.LVL1455
+	.4byte	.LVL1450
+	.4byte	.LVL1457
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1458
-	.4byte	.LVL1459
+	.4byte	.LVL1460
+	.4byte	.LVL1461
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
@@ -49681,51 +49821,51 @@ __func__.9940:
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST288:
-	.4byte	.LVL1162
+.LLST290:
 	.4byte	.LVL1164
+	.4byte	.LVL1166
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1174
-	.4byte	.LVL1175
+	.4byte	.LVL1176
+	.4byte	.LVL1177
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1175
-	.4byte	.LVL1176
+	.4byte	.LVL1177
+	.4byte	.LVL1178
 	.2byte	0x3
 	.byte	0x74
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL1176
-	.4byte	.LVL1177
+	.4byte	.LVL1178
+	.4byte	.LVL1179
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST289:
-	.4byte	.LVL1161
-	.4byte	.LVL1166
+.LLST291:
+	.4byte	.LVL1163
+	.4byte	.LVL1168
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1166
-	.4byte	.LVL1174
+	.4byte	.LVL1168
+	.4byte	.LVL1176
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -36
-	.4byte	.LVL1174
-	.4byte	.LVL1177
+	.4byte	.LVL1176
+	.4byte	.LVL1179
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1177
-	.4byte	.LVL1178
+	.4byte	.LVL1179
+	.4byte	.LVL1180
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1178
-	.4byte	.LVL1179
+	.4byte	.LVL1180
+	.4byte	.LVL1181
 	.2byte	0x6
 	.byte	0x91
 	.sleb128 -36
@@ -49733,8 +49873,8 @@ __func__.9940:
 	.byte	0x23
 	.uleb128 0x1
 	.byte	0x9f
-	.4byte	.LVL1180
-	.4byte	.LVL1181
+	.4byte	.LVL1182
+	.4byte	.LVL1183
 	.2byte	0x6
 	.byte	0x91
 	.sleb128 -36
@@ -49742,7 +49882,7 @@ __func__.9940:
 	.byte	0x23
 	.uleb128 0x1
 	.byte	0x9f
-	.4byte	.LVL1181
+	.4byte	.LVL1183
 	.4byte	.LFE229
 	.2byte	0x3
 	.byte	0x73
@@ -49750,54 +49890,54 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST290:
-	.4byte	.LVL1163
-	.4byte	.LVL1174
+.LLST292:
+	.4byte	.LVL1165
+	.4byte	.LVL1176
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1177
-	.4byte	.LVL1181
+	.4byte	.LVL1179
+	.4byte	.LVL1183
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST291:
-	.4byte	.LVL1161
-	.4byte	.LVL1166
+.LLST293:
+	.4byte	.LVL1163
+	.4byte	.LVL1168
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1166
-	.4byte	.LVL1171
+	.4byte	.LVL1168
+	.4byte	.LVL1173
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1172
 	.4byte	.LVL1174
+	.4byte	.LVL1176
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1174
-	.4byte	.LVL1177
+	.4byte	.LVL1176
+	.4byte	.LVL1179
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1177
-	.4byte	.LVL1181
+	.4byte	.LVL1179
+	.4byte	.LVL1183
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST194:
-	.4byte	.LVL761
+.LLST196:
 	.4byte	.LVL763
+	.4byte	.LVL765
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL763
-	.4byte	.LVL766
+	.4byte	.LVL765
+	.4byte	.LVL768
 	.2byte	0x4
 	.byte	0x75
 	.sleb128 -1022
 	.byte	0x9f
-	.4byte	.LVL766
+	.4byte	.LVL768
 	.4byte	.LFE228
 	.2byte	0x4
 	.byte	0xf3
@@ -49806,16 +49946,16 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST195:
-	.4byte	.LVL761
-	.4byte	.LVL762
+.LLST197:
+	.4byte	.LVL763
+	.4byte	.LVL764
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL762
-	.4byte	.LVL766
+	.4byte	.LVL764
+	.4byte	.LVL768
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL766
+	.4byte	.LVL768
 	.4byte	.LFE228
 	.2byte	0x4
 	.byte	0xf3
@@ -49982,18 +50122,18 @@ __func__.9940:
 	.4byte	.LVL45-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST443:
-	.4byte	.LVL1965
-	.4byte	.LVL1968
+	.4byte	0
+	.4byte	0
+.LLST445:
+	.4byte	.LVL1967
+	.4byte	.LVL1970
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1968
-	.4byte	.LVL1969-1
+	.4byte	.LVL1970
+	.4byte	.LVL1971-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1969-1
+	.4byte	.LVL1971-1
 	.4byte	.LFE223
 	.2byte	0x4
 	.byte	0xf3
@@ -50002,16 +50142,16 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST444:
-	.4byte	.LVL1965
+.LLST446:
 	.4byte	.LVL1967
+	.4byte	.LVL1969
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1967
-	.4byte	.LVL1969-1
+	.4byte	.LVL1969
+	.4byte	.LVL1971-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1969-1
+	.4byte	.LVL1971-1
 	.4byte	.LFE223
 	.2byte	0x4
 	.byte	0xf3
@@ -50020,16 +50160,16 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST445:
-	.4byte	.LVL1965
-	.4byte	.LVL1966
+.LLST447:
+	.4byte	.LVL1967
+	.4byte	.LVL1968
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1966
-	.4byte	.LVL1969-1
+	.4byte	.LVL1968
+	.4byte	.LVL1971-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1969-1
+	.4byte	.LVL1971-1
 	.4byte	.LFE223
 	.2byte	0x4
 	.byte	0xf3
@@ -50038,16 +50178,16 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST425:
-	.4byte	.LVL1864
-	.4byte	.LVL1867
+.LLST427:
+	.4byte	.LVL1866
+	.4byte	.LVL1869
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1867
-	.4byte	.LVL1868-1
+	.4byte	.LVL1869
+	.4byte	.LVL1870-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1868-1
+	.4byte	.LVL1870-1
 	.4byte	.LFE222
 	.2byte	0x4
 	.byte	0xf3
@@ -50056,16 +50196,16 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST426:
-	.4byte	.LVL1864
+.LLST428:
 	.4byte	.LVL1866
+	.4byte	.LVL1868
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1866
-	.4byte	.LVL1868-1
+	.4byte	.LVL1868
+	.4byte	.LVL1870-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1868-1
+	.4byte	.LVL1870-1
 	.4byte	.LFE222
 	.2byte	0x4
 	.byte	0xf3
@@ -50074,16 +50214,16 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST427:
-	.4byte	.LVL1864
-	.4byte	.LVL1865
+.LLST429:
+	.4byte	.LVL1866
+	.4byte	.LVL1867
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1865
-	.4byte	.LVL1868-1
+	.4byte	.LVL1867
+	.4byte	.LVL1870-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1868-1
+	.4byte	.LVL1870-1
 	.4byte	.LFE222
 	.2byte	0x4
 	.byte	0xf3
@@ -50092,76 +50232,76 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST383:
-	.4byte	.LVL1630
-	.4byte	.LVL1631
+.LLST385:
+	.4byte	.LVL1632
+	.4byte	.LVL1633
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1631
-	.4byte	.LVL1632
+	.4byte	.LVL1633
+	.4byte	.LVL1634
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1632
-	.4byte	.LVL1633-1
+	.4byte	.LVL1634
+	.4byte	.LVL1635-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1633-1
-	.4byte	.LVL1636
+	.4byte	.LVL1635-1
+	.4byte	.LVL1638
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1636
-	.4byte	.LVL1651
+	.4byte	.LVL1638
+	.4byte	.LVL1653
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1651
-	.4byte	.LVL1652
+	.4byte	.LVL1653
+	.4byte	.LVL1654
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1652
+	.4byte	.LVL1654
 	.4byte	.LFE221
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST384:
-	.4byte	.LVL1630
-	.4byte	.LVL1631
+.LLST386:
+	.4byte	.LVL1632
+	.4byte	.LVL1633
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1631
-	.4byte	.LVL1632
+	.4byte	.LVL1633
+	.4byte	.LVL1634
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1632
-	.4byte	.LVL1633-1
+	.4byte	.LVL1634
+	.4byte	.LVL1635-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1633-1
-	.4byte	.LVL1651
+	.4byte	.LVL1635-1
+	.4byte	.LVL1653
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1651
+	.4byte	.LVL1653
 	.4byte	.LFE221
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST385:
-	.4byte	.LVL1637
-	.4byte	.LVL1642
+.LLST387:
+	.4byte	.LVL1639
+	.4byte	.LVL1644
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST386:
-	.4byte	.LVL1638
-	.4byte	.LVL1639
+.LLST388:
+	.4byte	.LVL1640
+	.4byte	.LVL1641
 	.2byte	0x21
 	.byte	0x74
 	.sleb128 0
@@ -50195,52 +50335,52 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST387:
-	.4byte	.LVL1635
-	.4byte	.LVL1640
+.LLST389:
+	.4byte	.LVL1637
+	.4byte	.LVL1642
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1640
-	.4byte	.LVL1651
+	.4byte	.LVL1642
+	.4byte	.LVL1653
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST388:
-	.4byte	.LVL1647
-	.4byte	.LVL1648-1
+.LLST390:
+	.4byte	.LVL1649
+	.4byte	.LVL1650-1
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST428:
-	.4byte	.LVL1869
-	.4byte	.LVL1872
+.LLST430:
+	.4byte	.LVL1871
+	.4byte	.LVL1874
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1872
 	.4byte	.LVL1874
+	.4byte	.LVL1876
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1874
 	.4byte	.LVL1876
+	.4byte	.LVL1878
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1876
-	.4byte	.LVL1963
+	.4byte	.LVL1878
+	.4byte	.LVL1965
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1963
-	.4byte	.LVL1964
+	.4byte	.LVL1965
+	.4byte	.LVL1966
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1964
+	.4byte	.LVL1966
 	.4byte	.LFE220
 	.2byte	0x4
 	.byte	0xf3
@@ -50249,191 +50389,191 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST429:
-	.4byte	.LVL1869
+.LLST431:
 	.4byte	.LVL1871
+	.4byte	.LVL1873
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1871
-	.4byte	.LVL1874
+	.4byte	.LVL1873
+	.4byte	.LVL1876
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL1874
-	.4byte	.LVL1878
+	.4byte	.LVL1876
+	.4byte	.LVL1880
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1878
-	.4byte	.LVL1922
+	.4byte	.LVL1880
+	.4byte	.LVL1924
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL1922
-	.4byte	.LVL1923
+	.4byte	.LVL1924
+	.4byte	.LVL1925
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL1923
-	.4byte	.LVL1963
+	.4byte	.LVL1925
+	.4byte	.LVL1965
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL1963
+	.4byte	.LVL1965
 	.4byte	.LFE220
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST430:
-	.4byte	.LVL1869
-	.4byte	.LVL1870
+.LLST432:
+	.4byte	.LVL1871
+	.4byte	.LVL1872
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1870
-	.4byte	.LVL1874
+	.4byte	.LVL1872
+	.4byte	.LVL1876
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -80
-	.4byte	.LVL1874
-	.4byte	.LVL1877
+	.4byte	.LVL1876
+	.4byte	.LVL1879
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1877
-	.4byte	.LVL1923
+	.4byte	.LVL1879
+	.4byte	.LVL1925
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -80
-	.4byte	.LVL1923
-	.4byte	.LVL1924
+	.4byte	.LVL1925
+	.4byte	.LVL1926
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1924
-	.4byte	.LVL1963
+	.4byte	.LVL1926
+	.4byte	.LVL1965
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -80
-	.4byte	.LVL1963
+	.4byte	.LVL1965
 	.4byte	.LFE220
 	.2byte	0x1
 	.byte	0x52
 	.4byte	0
 	.4byte	0
-.LLST431:
-	.4byte	.LVL1869
-	.4byte	.LVL1873-1
+.LLST433:
+	.4byte	.LVL1871
+	.4byte	.LVL1875-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1873-1
-	.4byte	.LVL1874
+	.4byte	.LVL1875-1
+	.4byte	.LVL1876
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -92
-	.4byte	.LVL1874
-	.4byte	.LVL1875
+	.4byte	.LVL1876
+	.4byte	.LVL1877
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1875
-	.4byte	.LVL1925
+	.4byte	.LVL1877
+	.4byte	.LVL1927
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -92
-	.4byte	.LVL1925
-	.4byte	.LVL1926
+	.4byte	.LVL1927
+	.4byte	.LVL1928
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1926
+	.4byte	.LVL1928
 	.4byte	.LFE220
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -92
 	.4byte	0
 	.4byte	0
-.LLST432:
-	.4byte	.LVL1935
-	.4byte	.LVL1938
+.LLST434:
+	.4byte	.LVL1937
+	.4byte	.LVL1940
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -84
 	.4byte	0
 	.4byte	0
-.LLST433:
-	.4byte	.LVL1885
-	.4byte	.LVL1886
+.LLST435:
+	.4byte	.LVL1887
+	.4byte	.LVL1888
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
-	.4byte	.LVL1886
-	.4byte	.LVL1906
+	.4byte	.LVL1888
+	.4byte	.LVL1908
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1929
-	.4byte	.LVL1963
+	.4byte	.LVL1931
+	.4byte	.LVL1965
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST434:
-	.4byte	.LVL1880
-	.4byte	.LVL1881
+.LLST436:
+	.4byte	.LVL1882
+	.4byte	.LVL1883
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1881
-	.4byte	.LVL1911
+	.4byte	.LVL1883
+	.4byte	.LVL1913
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
-	.4byte	.LVL1911
-	.4byte	.LVL1912
+	.4byte	.LVL1913
+	.4byte	.LVL1914
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1912
-	.4byte	.LVL1927
+	.4byte	.LVL1914
+	.4byte	.LVL1929
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
-	.4byte	.LVL1927
-	.4byte	.LVL1928-1
+	.4byte	.LVL1929
+	.4byte	.LVL1930-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1928-1
-	.4byte	.LVL1963
+	.4byte	.LVL1930-1
+	.4byte	.LVL1965
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
 	.4byte	0
 	.4byte	0
-.LLST435:
-	.4byte	.LVL1883
-	.4byte	.LVL1885-1
+.LLST437:
+	.4byte	.LVL1885
+	.4byte	.LVL1887-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1885-1
-	.4byte	.LVL1911
+	.4byte	.LVL1887-1
+	.4byte	.LVL1913
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -76
-	.4byte	.LVL1911
-	.4byte	.LVL1914
+	.4byte	.LVL1913
+	.4byte	.LVL1916
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1914
-	.4byte	.LVL1963
+	.4byte	.LVL1916
+	.4byte	.LVL1965
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -76
 	.4byte	0
 	.4byte	0
-.LLST436:
-	.4byte	.LVL1934
+.LLST438:
 	.4byte	.LVL1936
+	.4byte	.LVL1938
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1936
-	.4byte	.LVL1937
+	.4byte	.LVL1938
+	.4byte	.LVL1939
 	.2byte	0x2
 	.byte	0x71
 	.sleb128 4
-	.4byte	.LVL1937
-	.4byte	.LVL1939-1
+	.4byte	.LVL1939
+	.4byte	.LVL1941-1
 	.2byte	0xb
 	.byte	0x3
 	.4byte	req_prgm
@@ -50445,83 +50585,83 @@ __func__.9940:
 	.uleb128 0x4
 	.4byte	0
 	.4byte	0
-.LLST437:
-	.4byte	.LVL1897
-	.4byte	.LVL1900
+.LLST439:
+	.4byte	.LVL1899
+	.4byte	.LVL1902
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL1900
 	.4byte	.LVL1902
+	.4byte	.LVL1904
 	.2byte	0x3
 	.byte	0x7b
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1932
-	.4byte	.LVL1949
+	.4byte	.LVL1934
+	.4byte	.LVL1951
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL1949
-	.4byte	.LVL1950
+	.4byte	.LVL1951
+	.4byte	.LVL1952
 	.2byte	0x3
 	.byte	0x7b
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL1950
-	.4byte	.LVL1959
+	.4byte	.LVL1952
+	.4byte	.LVL1961
 	.2byte	0x1
 	.byte	0x5b
 	.4byte	0
 	.4byte	0
-.LLST438:
-	.4byte	.LVL1884
-	.4byte	.LVL1885-1
+.LLST440:
+	.4byte	.LVL1886
+	.4byte	.LVL1887-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1885-1
-	.4byte	.LVL1901
+	.4byte	.LVL1887-1
+	.4byte	.LVL1903
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -88
-	.4byte	.LVL1901
 	.4byte	.LVL1903
+	.4byte	.LVL1905
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1903
-	.4byte	.LVL1911
+	.4byte	.LVL1905
+	.4byte	.LVL1913
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -88
-	.4byte	.LVL1911
 	.4byte	.LVL1913
+	.4byte	.LVL1915
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1913
-	.4byte	.LVL1919
+	.4byte	.LVL1915
+	.4byte	.LVL1921
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -88
-	.4byte	.LVL1919
-	.4byte	.LVL1920
+	.4byte	.LVL1921
+	.4byte	.LVL1922
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1921
-	.4byte	.LVL1929
+	.4byte	.LVL1923
+	.4byte	.LVL1931
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1929
-	.4byte	.LVL1962
+	.4byte	.LVL1931
+	.4byte	.LVL1964
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -88
-	.4byte	.LVL1962
-	.4byte	.LVL1963
+	.4byte	.LVL1964
+	.4byte	.LVL1965
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST439:
-	.4byte	.LVL1893
-	.4byte	.LVL1894
+.LLST441:
+	.4byte	.LVL1895
+	.4byte	.LVL1896
 	.2byte	0x1f
 	.byte	0x74
 	.sleb128 7
@@ -50552,138 +50692,138 @@ __func__.9940:
 	.byte	0x16
 	.byte	0x13
 	.byte	0x9f
-	.4byte	.LVL1894
-	.4byte	.LVL1895
+	.4byte	.LVL1896
+	.4byte	.LVL1897
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1895
-	.4byte	.LVL1898
+	.4byte	.LVL1897
+	.4byte	.LVL1900
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -60
-	.4byte	.LVL1898
-	.4byte	.LVL1899
+	.4byte	.LVL1900
+	.4byte	.LVL1901
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL1899
-	.4byte	.LVL1900
+	.4byte	.LVL1901
+	.4byte	.LVL1902
 	.2byte	0x3
 	.byte	0x7b
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL1900
 	.4byte	.LVL1902
+	.4byte	.LVL1904
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL1932
-	.4byte	.LVL1959
+	.4byte	.LVL1934
+	.4byte	.LVL1961
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -60
-	.4byte	.LVL1959
-	.4byte	.LVL1963
+	.4byte	.LVL1961
+	.4byte	.LVL1965
 	.2byte	0x1
 	.byte	0x5b
 	.4byte	0
 	.4byte	0
-.LLST440:
-	.4byte	.LVL1885
-	.4byte	.LVL1886
+.LLST442:
+	.4byte	.LVL1887
+	.4byte	.LVL1888
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1916
-	.4byte	.LVL1917
+	.4byte	.LVL1918
+	.4byte	.LVL1919
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1917
-	.4byte	.LVL1919-1
+	.4byte	.LVL1919
+	.4byte	.LVL1921-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1940
 	.4byte	.LVL1942
+	.4byte	.LVL1944
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1944
-	.4byte	.LVL1945
+	.4byte	.LVL1946
+	.4byte	.LVL1947
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1945
 	.4byte	.LVL1947
+	.4byte	.LVL1949
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -72
-	.4byte	.LVL1951
-	.4byte	.LVL1958
+	.4byte	.LVL1953
+	.4byte	.LVL1960
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -72
 	.4byte	0
 	.4byte	0
-.LLST441:
-	.4byte	.LVL1885
-	.4byte	.LVL1886
+.LLST443:
+	.4byte	.LVL1887
+	.4byte	.LVL1888
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1916
-	.4byte	.LVL1920
+	.4byte	.LVL1918
+	.4byte	.LVL1922
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1921
-	.4byte	.LVL1929
+	.4byte	.LVL1923
+	.4byte	.LVL1931
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1941
-	.4byte	.LVL1942
+	.4byte	.LVL1943
+	.4byte	.LVL1944
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1945
-	.4byte	.LVL1946
+	.4byte	.LVL1947
+	.4byte	.LVL1948
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1951
-	.4byte	.LVL1958
+	.4byte	.LVL1953
+	.4byte	.LVL1960
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST442:
-	.4byte	.LVL1885
-	.4byte	.LVL1886
+.LLST444:
+	.4byte	.LVL1887
+	.4byte	.LVL1888
 	.2byte	0x6
 	.byte	0x3
 	.4byte	g_active_superblock
 	.byte	0x9f
-	.4byte	.LVL1886
-	.4byte	.LVL1889
+	.4byte	.LVL1888
+	.4byte	.LVL1891
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1892
-	.4byte	.LVL1904
+	.4byte	.LVL1894
+	.4byte	.LVL1906
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1929
 	.4byte	.LVL1931
+	.4byte	.LVL1933
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1932
-	.4byte	.LVL1963
+	.4byte	.LVL1934
+	.4byte	.LVL1965
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST375:
-	.4byte	.LVL1602
-	.4byte	.LVL1605-1
+.LLST377:
+	.4byte	.LVL1604
+	.4byte	.LVL1607-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1605-1
-	.4byte	.LVL1605
+	.4byte	.LVL1607-1
+	.4byte	.LVL1607
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1605
+	.4byte	.LVL1607
 	.4byte	.LFE218
 	.2byte	0x4
 	.byte	0xf3
@@ -50692,16 +50832,16 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST376:
-	.4byte	.LVL1602
-	.4byte	.LVL1605-1
+.LLST378:
+	.4byte	.LVL1604
+	.4byte	.LVL1607-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1605-1
-	.4byte	.LVL1623
+	.4byte	.LVL1607-1
+	.4byte	.LVL1625
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL1623
+	.4byte	.LVL1625
 	.4byte	.LFE218
 	.2byte	0x4
 	.byte	0xf3
@@ -50710,12 +50850,12 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST377:
-	.4byte	.LVL1602
-	.4byte	.LVL1603
+.LLST379:
+	.4byte	.LVL1604
+	.4byte	.LVL1605
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1603
+	.4byte	.LVL1605
 	.4byte	.LFE218
 	.2byte	0x4
 	.byte	0xf3
@@ -50724,16 +50864,16 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST378:
-	.4byte	.LVL1602
+.LLST380:
 	.4byte	.LVL1604
+	.4byte	.LVL1606
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1604
-	.4byte	.LVL1623
+	.4byte	.LVL1606
+	.4byte	.LVL1625
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1623
+	.4byte	.LVL1625
 	.4byte	.LFE218
 	.2byte	0x4
 	.byte	0xf3
@@ -50742,67 +50882,67 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST379:
-	.4byte	.LVL1605
-	.4byte	.LVL1623
+.LLST381:
+	.4byte	.LVL1607
+	.4byte	.LVL1625
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST380:
-	.4byte	.LVL1614
-	.4byte	.LVL1621
+.LLST382:
+	.4byte	.LVL1616
+	.4byte	.LVL1623
 	.2byte	0x1
 	.byte	0x5b
 	.4byte	0
 	.4byte	0
-.LLST381:
-	.4byte	.LVL1606
-	.4byte	.LVL1607
+.LLST383:
+	.4byte	.LVL1608
+	.4byte	.LVL1609
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1616
-	.4byte	.LVL1617
+	.4byte	.LVL1618
+	.4byte	.LVL1619
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST382:
-	.4byte	.LVL1613
-	.4byte	.LVL1615-1
+.LLST384:
+	.4byte	.LVL1615
+	.4byte	.LVL1617-1
 	.2byte	0x2
 	.byte	0x75
 	.sleb128 12
 	.4byte	0
 	.4byte	0
-.LLST408:
-	.4byte	.LVL1813
-	.4byte	.LVL1816
+.LLST410:
+	.4byte	.LVL1815
+	.4byte	.LVL1818
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1816
-	.4byte	.LVL1819
+	.4byte	.LVL1818
+	.4byte	.LVL1821
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1819
-	.4byte	.LVL1822
+	.4byte	.LVL1821
+	.4byte	.LVL1824
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1822
-	.4byte	.LVL1862
+	.4byte	.LVL1824
+	.4byte	.LVL1864
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1862
-	.4byte	.LVL1863
+	.4byte	.LVL1864
+	.4byte	.LVL1865
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1863
+	.4byte	.LVL1865
 	.4byte	.LFE217
 	.2byte	0x4
 	.byte	0xf3
@@ -50811,118 +50951,118 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST409:
-	.4byte	.LVL1813
+.LLST411:
 	.4byte	.LVL1815
+	.4byte	.LVL1817
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1815
-	.4byte	.LVL1819
+	.4byte	.LVL1817
+	.4byte	.LVL1821
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1819
-	.4byte	.LVL1823-1
+	.4byte	.LVL1821
+	.4byte	.LVL1825-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1823-1
-	.4byte	.LVL1862
+	.4byte	.LVL1825-1
+	.4byte	.LVL1864
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1862
+	.4byte	.LVL1864
 	.4byte	.LFE217
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST410:
-	.4byte	.LVL1813
-	.4byte	.LVL1814
+.LLST412:
+	.4byte	.LVL1815
+	.4byte	.LVL1816
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1814
-	.4byte	.LVL1819
+	.4byte	.LVL1816
+	.4byte	.LVL1821
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -56
-	.4byte	.LVL1819
 	.4byte	.LVL1821
+	.4byte	.LVL1823
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1821
+	.4byte	.LVL1823
 	.4byte	.LFE217
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -56
 	.4byte	0
 	.4byte	0
-.LLST411:
-	.4byte	.LVL1813
-	.4byte	.LVL1817-1
+.LLST413:
+	.4byte	.LVL1815
+	.4byte	.LVL1819-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1817-1
-	.4byte	.LVL1819
+	.4byte	.LVL1819-1
+	.4byte	.LVL1821
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL1819
-	.4byte	.LVL1820
+	.4byte	.LVL1821
+	.4byte	.LVL1822
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1820
+	.4byte	.LVL1822
 	.4byte	.LFE217
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST412:
-	.4byte	.LVL1813
-	.4byte	.LVL1818
+.LLST414:
+	.4byte	.LVL1815
+	.4byte	.LVL1820
 	.2byte	0x2
 	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1819
-	.4byte	.LVL1831
+	.byte	0x9f
+	.4byte	.LVL1821
+	.4byte	.LVL1833
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1862
+	.4byte	.LVL1864
 	.4byte	.LFE217
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST413:
-	.4byte	.LVL1825
-	.4byte	.LVL1826
+.LLST415:
+	.4byte	.LVL1827
+	.4byte	.LVL1828
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1826
-	.4byte	.LVL1862
+	.4byte	.LVL1828
+	.4byte	.LVL1864
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -72
 	.4byte	0
 	.4byte	0
-.LLST414:
-	.4byte	.LVL1828
-	.4byte	.LVL1831
+.LLST416:
+	.4byte	.LVL1830
+	.4byte	.LVL1833
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1831
-	.4byte	.LVL1862
+	.4byte	.LVL1833
+	.4byte	.LVL1864
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -68
 	.4byte	0
 	.4byte	0
-.LLST415:
-	.4byte	.LVL1847
-	.4byte	.LVL1848
+.LLST417:
+	.4byte	.LVL1849
+	.4byte	.LVL1850
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1848
-	.4byte	.LVL1849-1
+	.4byte	.LVL1850
+	.4byte	.LVL1851-1
 	.2byte	0x12
 	.byte	0x3
 	.4byte	c_ftl_nand_sec_pre_page
@@ -50940,139 +51080,139 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST416:
-	.4byte	.LVL1829
+.LLST418:
 	.4byte	.LVL1831
+	.4byte	.LVL1833
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -72
-	.4byte	.LVL1831
-	.4byte	.LVL1862
+	.4byte	.LVL1833
+	.4byte	.LVL1864
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST417:
-	.4byte	.LVL1840
-	.4byte	.LVL1841
+.LLST419:
+	.4byte	.LVL1842
+	.4byte	.LVL1843
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1841
-	.4byte	.LVL1846
+	.4byte	.LVL1843
+	.4byte	.LVL1848
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL1859
-	.4byte	.LVL1862
+	.4byte	.LVL1861
+	.4byte	.LVL1864
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
-.LLST418:
-	.4byte	.LVL1829
+.LLST420:
 	.4byte	.LVL1831
+	.4byte	.LVL1833
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1831
-	.4byte	.LVL1845
+	.4byte	.LVL1833
+	.4byte	.LVL1847
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1846
-	.4byte	.LVL1862
+	.4byte	.LVL1848
+	.4byte	.LVL1864
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST419:
-	.4byte	.LVL1829
-	.4byte	.LVL1830
+.LLST421:
+	.4byte	.LVL1831
+	.4byte	.LVL1832
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1830
-	.4byte	.LVL1831
+	.4byte	.LVL1832
+	.4byte	.LVL1833
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1831
 	.4byte	.LVL1833
+	.4byte	.LVL1835
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -80
-	.4byte	.LVL1833
-	.4byte	.LVL1834-1
+	.4byte	.LVL1835
+	.4byte	.LVL1836-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1834-1
-	.4byte	.LVL1837
+	.4byte	.LVL1836-1
+	.4byte	.LVL1839
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -80
-	.4byte	.LVL1837
-	.4byte	.LVL1838
+	.4byte	.LVL1839
+	.4byte	.LVL1840
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL1838
-	.4byte	.LVL1839
+	.4byte	.LVL1840
+	.4byte	.LVL1841
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1839
-	.4byte	.LVL1862
+	.4byte	.LVL1841
+	.4byte	.LVL1864
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -80
 	.4byte	0
 	.4byte	0
-.LLST420:
-	.4byte	.LVL1813
-	.4byte	.LVL1818
+.LLST422:
+	.4byte	.LVL1815
+	.4byte	.LVL1820
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1819
-	.4byte	.LVL1831
+	.4byte	.LVL1821
+	.4byte	.LVL1833
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1831
-	.4byte	.LVL1853
+	.4byte	.LVL1833
+	.4byte	.LVL1855
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -64
-	.4byte	.LVL1853
-	.4byte	.LVL1856
+	.4byte	.LVL1855
+	.4byte	.LVL1858
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1856
-	.4byte	.LVL1862
+	.4byte	.LVL1858
+	.4byte	.LVL1864
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -64
-	.4byte	.LVL1862
+	.4byte	.LVL1864
 	.4byte	.LFE217
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST421:
-	.4byte	.LVL1819
-	.4byte	.LVL1831
+.LLST423:
+	.4byte	.LVL1821
+	.4byte	.LVL1833
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1831
-	.4byte	.LVL1853
+	.4byte	.LVL1833
+	.4byte	.LVL1855
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -60
-	.4byte	.LVL1853
-	.4byte	.LVL1854
+	.4byte	.LVL1855
+	.4byte	.LVL1856
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1854
-	.4byte	.LVL1855
+	.4byte	.LVL1856
+	.4byte	.LVL1857
 	.2byte	0x6
 	.byte	0x7b
 	.sleb128 0
@@ -51080,60 +51220,60 @@ __func__.9940:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL1855
-	.4byte	.LVL1856
+	.4byte	.LVL1857
+	.4byte	.LVL1858
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1856
-	.4byte	.LVL1862
+	.4byte	.LVL1858
+	.4byte	.LVL1864
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -60
-	.4byte	.LVL1862
+	.4byte	.LVL1864
 	.4byte	.LFE217
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST422:
-	.4byte	.LVL1819
-	.4byte	.LVL1831
+.LLST424:
+	.4byte	.LVL1821
+	.4byte	.LVL1833
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1831
-	.4byte	.LVL1862
+	.4byte	.LVL1833
+	.4byte	.LVL1864
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1862
+	.4byte	.LVL1864
 	.4byte	.LFE217
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST423:
-	.4byte	.LVL1835
-	.4byte	.LVL1836
+.LLST425:
+	.4byte	.LVL1837
+	.4byte	.LVL1838
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL1846
-	.4byte	.LVL1851
+	.4byte	.LVL1848
+	.4byte	.LVL1853
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
-.LLST424:
-	.4byte	.LVL1860
-	.4byte	.LVL1861-1
+.LLST426:
+	.4byte	.LVL1862
+	.4byte	.LVL1863-1
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST452:
-	.4byte	.LVL2071
-	.4byte	.LVL2072
+.LLST454:
+	.4byte	.LVL2073
+	.4byte	.LVL2074
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x1fc1
@@ -51141,8 +51281,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL2072
-	.4byte	.LVL2073
+	.4byte	.LVL2074
+	.4byte	.LVL2075
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x1fc2
@@ -51150,8 +51290,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL2073
-	.4byte	.LVL2074
+	.4byte	.LVL2075
+	.4byte	.LVL2076
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x1fc1
@@ -51161,106 +51301,106 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST448:
-	.4byte	.LVL2025
+.LLST450:
 	.4byte	.LVL2027
+	.4byte	.LVL2029
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL2029
-	.4byte	.LVL2030
+	.4byte	.LVL2031
+	.4byte	.LVL2032
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL2040
 	.4byte	.LVL2042
+	.4byte	.LVL2044
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL2045
-	.4byte	.LVL2046
+	.4byte	.LVL2047
+	.4byte	.LVL2048
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL2050
-	.4byte	.LVL2051
+	.4byte	.LVL2052
+	.4byte	.LVL2053
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL2053
-	.4byte	.LVL2054
+	.4byte	.LVL2055
+	.4byte	.LVL2056
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL2054
-	.4byte	.LVL2055-1
+	.4byte	.LVL2056
+	.4byte	.LVL2057-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL2057
-	.4byte	.LVL2058
+	.4byte	.LVL2059
+	.4byte	.LVL2060
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST449:
-	.4byte	.LVL2029
-	.4byte	.LVL2033
+.LLST451:
+	.4byte	.LVL2031
+	.4byte	.LVL2035
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL2054
 	.4byte	.LVL2056
+	.4byte	.LVL2058
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL2057
-	.4byte	.LVL2058
+	.4byte	.LVL2059
+	.4byte	.LVL2060
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST450:
-	.4byte	.LVL2023
-	.4byte	.LVL2026
+.LLST452:
+	.4byte	.LVL2025
+	.4byte	.LVL2028
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL2026
 	.4byte	.LVL2028
+	.4byte	.LVL2030
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL2040
-	.4byte	.LVL2043
+	.4byte	.LVL2042
+	.4byte	.LVL2045
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL2044
-	.4byte	.LVL2049
+	.4byte	.LVL2046
+	.4byte	.LVL2051
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL2049
-	.4byte	.LVL2050
+	.4byte	.LVL2051
+	.4byte	.LVL2052
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST451:
-	.4byte	.LVL2021
-	.4byte	.LVL2022
+.LLST453:
+	.4byte	.LVL2023
+	.4byte	.LVL2024
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL2022
 	.4byte	.LVL2024
+	.4byte	.LVL2026
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL2038
-	.4byte	.LVL2039
+	.4byte	.LVL2040
+	.4byte	.LVL2041
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL2039
-	.4byte	.LVL2040
+	.4byte	.LVL2041
+	.4byte	.LVL2042
 	.2byte	0x1
 	.byte	0x52
 	.4byte	0
 	.4byte	0
-.LLST179:
-	.4byte	.LVL640
+.LLST181:
 	.4byte	.LVL642
+	.4byte	.LVL644
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL642
+	.4byte	.LVL644
 	.4byte	.LFE212
 	.2byte	0x4
 	.byte	0xf3
@@ -51269,12 +51409,12 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST180:
-	.4byte	.LVL640
+.LLST182:
 	.4byte	.LVL642
+	.4byte	.LVL644
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL642
+	.4byte	.LVL644
 	.4byte	.LFE212
 	.2byte	0x4
 	.byte	0xf3
@@ -51283,270 +51423,270 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST181:
-	.4byte	.LVL640
+.LLST183:
 	.4byte	.LVL642
+	.4byte	.LVL644
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL642
-	.4byte	.LVL669
+	.4byte	.LVL644
+	.4byte	.LVL671
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL670
 	.4byte	.LVL672
+	.4byte	.LVL674
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL673
-	.4byte	.LVL687
+	.4byte	.LVL675
+	.4byte	.LVL689
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL688
+	.4byte	.LVL690
 	.4byte	.LFE212
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST182:
-	.4byte	.LVL640
+.LLST184:
 	.4byte	.LVL642
+	.4byte	.LVL644
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL642
-	.4byte	.LVL647
+	.4byte	.LVL644
+	.4byte	.LVL649
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL647
-	.4byte	.LVL648
+	.4byte	.LVL649
+	.4byte	.LVL650
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL648
-	.4byte	.LVL664
+	.4byte	.LVL650
+	.4byte	.LVL666
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL665
-	.4byte	.LVL682
+	.4byte	.LVL667
+	.4byte	.LVL684
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL683
+	.4byte	.LVL685
 	.4byte	.LFE212
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST183:
-	.4byte	.LVL641
-	.4byte	.LVL642
+.LLST185:
+	.4byte	.LVL643
+	.4byte	.LVL644
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL642
-	.4byte	.LVL643
+	.4byte	.LVL644
+	.4byte	.LVL645
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL643
-	.4byte	.LVL647
+	.4byte	.LVL645
+	.4byte	.LVL649
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL647
-	.4byte	.LVL648
+	.4byte	.LVL649
+	.4byte	.LVL650
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL648
-	.4byte	.LVL649
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL649
 	.4byte	.LVL650
+	.4byte	.LVL651
 	.2byte	0x1
-	.byte	0x52
+	.byte	0x5b
 	.4byte	.LVL651
 	.4byte	.LVL652
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL653
+	.4byte	.LVL654
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL652
-	.4byte	.LVL655
+	.4byte	.LVL654
+	.4byte	.LVL657
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL655
 	.4byte	.LVL657
+	.4byte	.LVL659
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL657
-	.4byte	.LVL658
+	.4byte	.LVL659
+	.4byte	.LVL660
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL659
-	.4byte	.LVL666
+	.4byte	.LVL661
+	.4byte	.LVL668
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL666
-	.4byte	.LVL667
+	.4byte	.LVL668
+	.4byte	.LVL669
 	.2byte	0x3
 	.byte	0x7b
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL668
-	.4byte	.LVL671
+	.4byte	.LVL670
+	.4byte	.LVL673
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL671
-	.4byte	.LVL674
+	.4byte	.LVL673
+	.4byte	.LVL676
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL674
-	.4byte	.LVL675
+	.4byte	.LVL676
+	.4byte	.LVL677
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL676
-	.4byte	.LVL677
+	.4byte	.LVL678
+	.4byte	.LVL679
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL677
-	.4byte	.LVL684
+	.4byte	.LVL679
+	.4byte	.LVL686
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL684
-	.4byte	.LVL685
+	.4byte	.LVL686
+	.4byte	.LVL687
 	.2byte	0x3
 	.byte	0x7b
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL686
-	.4byte	.LVL690
+	.4byte	.LVL688
+	.4byte	.LVL692
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL690
-	.4byte	.LVL691
+	.4byte	.LVL692
+	.4byte	.LVL693
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL692
-	.4byte	.LVL693
+	.4byte	.LVL694
+	.4byte	.LVL695
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL693
-	.4byte	.LVL694
+	.4byte	.LVL695
+	.4byte	.LVL696
 	.2byte	0x3
 	.byte	0x76
 	.sleb128 1
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST184:
-	.4byte	.LVL661
-	.4byte	.LVL662-1
+.LLST186:
+	.4byte	.LVL663
+	.4byte	.LVL664-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL679
-	.4byte	.LVL680-1
+	.4byte	.LVL681
+	.4byte	.LVL682-1
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST185:
-	.4byte	.LVL640
-	.4byte	.LVL645
+.LLST187:
+	.4byte	.LVL642
+	.4byte	.LVL647
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.4byte	.LVL645
-	.4byte	.LVL646
+	.4byte	.LVL647
+	.4byte	.LVL648
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL659
-	.4byte	.LVL677
+	.4byte	.LVL661
+	.4byte	.LVL679
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST186:
-	.4byte	.LVL640
-	.4byte	.LVL647
+.LLST188:
+	.4byte	.LVL642
+	.4byte	.LVL649
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL647
-	.4byte	.LVL653
+	.4byte	.LVL649
+	.4byte	.LVL655
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL654
 	.4byte	.LVL656
+	.4byte	.LVL658
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL659
-	.4byte	.LVL677
+	.4byte	.LVL661
+	.4byte	.LVL679
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL677
-	.4byte	.LVL692
+	.4byte	.LVL679
+	.4byte	.LVL694
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST187:
-	.4byte	.LVL640
-	.4byte	.LVL646
+.LLST189:
+	.4byte	.LVL642
+	.4byte	.LVL648
 	.2byte	0x2
 	.byte	0x36
 	.byte	0x9f
-	.4byte	.LVL659
-	.4byte	.LVL677
+	.4byte	.LVL661
+	.4byte	.LVL679
 	.2byte	0x2
 	.byte	0x36
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST188:
-	.4byte	.LVL640
-	.4byte	.LVL644
+.LLST190:
+	.4byte	.LVL642
+	.4byte	.LVL646
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL644
 	.4byte	.LVL646
+	.4byte	.LVL648
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.4byte	.LVL659
-	.4byte	.LVL677
+	.4byte	.LVL661
+	.4byte	.LVL679
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST192:
-	.4byte	.LVL754
-	.4byte	.LVL755
+.LLST194:
+	.4byte	.LVL756
+	.4byte	.LVL757
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.4byte	.LVL755
-	.4byte	.LVL756
+	.4byte	.LVL757
+	.4byte	.LVL758
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL758
 	.4byte	.LVL760
+	.4byte	.LVL762
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST193:
-	.4byte	.LVL699
-	.4byte	.LVL705
+.LLST195:
+	.4byte	.LVL701
+	.4byte	.LVL707
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL705
-	.4byte	.LVL712
+	.4byte	.LVL707
+	.4byte	.LVL714
 	.2byte	0x7
 	.byte	0x74
 	.sleb128 0
@@ -51554,16 +51694,16 @@ __func__.9940:
 	.2byte	0xffff
 	.byte	0x1a
 	.byte	0x9f
-	.4byte	.LVL714
-	.4byte	.LVL720
+	.4byte	.LVL716
+	.4byte	.LVL722
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL721
-	.4byte	.LVL724
+	.4byte	.LVL723
+	.4byte	.LVL726
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL725
-	.4byte	.LVL726
+	.4byte	.LVL727
+	.4byte	.LVL728
 	.2byte	0x9
 	.byte	0x3
 	.4byte	c_ftl_nand_max_map_blks
@@ -51571,12 +51711,12 @@ __func__.9940:
 	.byte	0x31
 	.byte	0x24
 	.byte	0x9f
-	.4byte	.LVL726
-	.4byte	.LVL729
+	.4byte	.LVL728
+	.4byte	.LVL731
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL735
-	.4byte	.LVL736
+	.4byte	.LVL737
+	.4byte	.LVL738
 	.2byte	0xe
 	.byte	0x3
 	.4byte	c_ftl_nand_map_region_num
@@ -51588,12 +51728,12 @@ __func__.9940:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.4byte	.LVL736
-	.4byte	.LVL737-1
+	.4byte	.LVL738
+	.4byte	.LVL739-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL738
-	.4byte	.LVL739
+	.4byte	.LVL740
+	.4byte	.LVL741
 	.2byte	0x9
 	.byte	0x3
 	.4byte	c_ftl_nand_max_map_blks
@@ -51601,12 +51741,12 @@ __func__.9940:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.4byte	.LVL739
-	.4byte	.LVL740-1
+	.4byte	.LVL741
+	.4byte	.LVL742-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL741
-	.4byte	.LVL742
+	.4byte	.LVL743
+	.4byte	.LVL744
 	.2byte	0xe
 	.byte	0x3
 	.4byte	c_ftl_nand_l2pmap_ram_region_num
@@ -51618,12 +51758,12 @@ __func__.9940:
 	.byte	0x3c
 	.byte	0x1e
 	.byte	0x9f
-	.4byte	.LVL742
-	.4byte	.LVL743-1
+	.4byte	.LVL744
+	.4byte	.LVL745-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL744
-	.4byte	.LVL745
+	.4byte	.LVL746
+	.4byte	.LVL747
 	.2byte	0x18
 	.byte	0x3
 	.4byte	c_ftl_nand_l2pmap_ram_region_num
@@ -51641,12 +51781,12 @@ __func__.9940:
 	.byte	0x1a
 	.byte	0x1e
 	.byte	0x9f
-	.4byte	.LVL745
-	.4byte	.LVL746-1
+	.4byte	.LVL747
+	.4byte	.LVL748-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL747
-	.4byte	.LVL748
+	.4byte	.LVL749
+	.4byte	.LVL750
 	.2byte	0xe
 	.byte	0x3
 	.4byte	c_ftl_nand_blk_pre_plane
@@ -51658,12 +51798,12 @@ __func__.9940:
 	.byte	0x36
 	.byte	0x1e
 	.byte	0x9f
-	.4byte	.LVL748
-	.4byte	.LVL749-1
+	.4byte	.LVL750
+	.4byte	.LVL751-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL750
-	.4byte	.LVL751
+	.4byte	.LVL752
+	.4byte	.LVL753
 	.2byte	0x11
 	.byte	0x3
 	.4byte	c_ftl_nand_die_num
@@ -51678,8 +51818,8 @@ __func__.9940:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.4byte	.LVL751
-	.4byte	.LVL752
+	.4byte	.LVL753
+	.4byte	.LVL754
 	.2byte	0x1e
 	.byte	0x3
 	.4byte	c_ftl_nand_blks_per_die
@@ -51703,8 +51843,8 @@ __func__.9940:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.4byte	.LVL752
-	.4byte	.LVL753-1
+	.4byte	.LVL754
+	.4byte	.LVL755-1
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
@@ -51954,7 +52094,7 @@ __func__.9940:
 	.2byte	0x1
 	.byte	0x58
 	.4byte	.LVL11
-	.4byte	.LFE351
+	.4byte	.LFE352
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -51972,7 +52112,7 @@ __func__.9940:
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	.LVL11
-	.4byte	.LFE351
+	.4byte	.LFE352
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -52014,7 +52154,7 @@ __func__.9940:
 	.byte	0x7a
 	.sleb128 0
 	.4byte	.LVL11
-	.4byte	.LFE351
+	.4byte	.LFE352
 	.2byte	0x3
 	.byte	0xf3
 	.uleb128 0x1
@@ -52027,7 +52167,7 @@ __func__.9940:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL13
-	.4byte	.LFE358
+	.4byte	.LFE359
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -52431,9 +52571,9 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST238:
-	.4byte	.LVL916
-	.4byte	.LVL920
+.LLST240:
+	.4byte	.LVL918
+	.4byte	.LVL922
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x800
@@ -52441,8 +52581,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL921
-	.4byte	.LVL922
+	.4byte	.LVL923
+	.4byte	.LVL924
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x801
@@ -52450,8 +52590,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL922
-	.4byte	.LVL923
+	.4byte	.LVL924
+	.4byte	.LVL925
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x800
@@ -52461,37 +52601,37 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST280:
-	.4byte	.LVL1139
+.LLST282:
 	.4byte	.LVL1141
+	.4byte	.LVL1143
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1141
-	.4byte	.LVL1149
+	.4byte	.LVL1143
+	.4byte	.LVL1151
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1149
-	.4byte	.LFE346
+	.4byte	.LVL1151
+	.4byte	.LFE347
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST281:
-	.4byte	.LVL1140
+.LLST283:
 	.4byte	.LVL1142
+	.4byte	.LVL1144
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST301:
-	.4byte	.LVL1224
-	.4byte	.LVL1225
+.LLST303:
+	.4byte	.LVL1226
+	.4byte	.LVL1227
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1225
+	.4byte	.LVL1227
 	.4byte	.LFE320
 	.2byte	0x4
 	.byte	0xf3
@@ -52500,91 +52640,91 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST302:
-	.4byte	.LVL1225
-	.4byte	.LVL1226
+.LLST304:
+	.4byte	.LVL1227
+	.4byte	.LVL1228
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1227
-	.4byte	.LVL1231
+	.4byte	.LVL1229
+	.4byte	.LVL1233
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1231
-	.4byte	.LVL1232
+	.4byte	.LVL1233
+	.4byte	.LVL1234
 	.2byte	0x3
 	.byte	0x76
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1233
+	.4byte	.LVL1235
 	.4byte	.LFE320
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST303:
-	.4byte	.LVL1230
-	.4byte	.LVL1237
+.LLST305:
+	.4byte	.LVL1232
+	.4byte	.LVL1239
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1237
-	.4byte	.LVL1238
+	.4byte	.LVL1239
+	.4byte	.LVL1240
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1238
-	.4byte	.LVL1239
+	.4byte	.LVL1240
+	.4byte	.LVL1241
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1240
+	.4byte	.LVL1242
 	.4byte	.LFE320
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST304:
-	.4byte	.LVL1236
+.LLST306:
 	.4byte	.LVL1238
-	.2byte	0x1
-	.byte	0x55
 	.4byte	.LVL1240
-	.4byte	.LVL1241
 	.2byte	0x1
 	.byte	0x55
 	.4byte	.LVL1242
+	.4byte	.LVL1243
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1244
 	.4byte	.LFE320
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST305:
-	.4byte	.LVL1243
+.LLST307:
 	.4byte	.LVL1245
+	.4byte	.LVL1247
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1245
-	.4byte	.LVL1251
+	.4byte	.LVL1247
+	.4byte	.LVL1253
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1251
-	.4byte	.LVL1252
+	.4byte	.LVL1253
+	.4byte	.LVL1254
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1252
-	.4byte	.LVL1253
+	.4byte	.LVL1254
+	.4byte	.LVL1255
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1253
-	.4byte	.LVL1254-1
+	.4byte	.LVL1255
+	.4byte	.LVL1256-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1254-1
+	.4byte	.LVL1256-1
 	.4byte	.LFE304
 	.2byte	0x4
 	.byte	0xf3
@@ -52593,16 +52733,16 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST306:
-	.4byte	.LVL1244
-	.4byte	.LVL1251
+.LLST308:
+	.4byte	.LVL1246
+	.4byte	.LVL1253
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST309:
-	.4byte	.LVL1266
-	.4byte	.LVL1267-1
+.LLST311:
+	.4byte	.LVL1268
+	.4byte	.LVL1269-1
 	.2byte	0x9
 	.byte	0x3
 	.4byte	g_MaxLpn
@@ -52610,19 +52750,19 @@ __func__.9940:
 	.byte	0x31
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL1267-1
-	.4byte	.LVL1271
+	.4byte	.LVL1269-1
+	.4byte	.LVL1273
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1272
-	.4byte	.LVL1278
+	.4byte	.LVL1274
+	.4byte	.LVL1280
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST310:
-	.4byte	.LVL1266
-	.4byte	.LVL1267-1
+.LLST312:
+	.4byte	.LVL1268
+	.4byte	.LVL1269-1
 	.2byte	0xe
 	.byte	0x3
 	.4byte	c_ftl_nand_planes_num
@@ -52634,8 +52774,8 @@ __func__.9940:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.4byte	.LVL1267-1
-	.4byte	.LVL1270
+	.4byte	.LVL1269-1
+	.4byte	.LVL1272
 	.2byte	0x9
 	.byte	0x78
 	.sleb128 0
@@ -52645,8 +52785,8 @@ __func__.9940:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.4byte	.LVL1272
 	.4byte	.LVL1274
+	.4byte	.LVL1276
 	.2byte	0x9
 	.byte	0x78
 	.sleb128 0
@@ -52658,111 +52798,111 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST311:
-	.4byte	.LVL1268
-	.4byte	.LVL1271
+.LLST313:
+	.4byte	.LVL1270
+	.4byte	.LVL1273
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1272
-	.4byte	.LVL1278
+	.4byte	.LVL1274
+	.4byte	.LVL1280
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST396:
-	.4byte	.LVL1713
-	.4byte	.LVL1714
+.LLST398:
+	.4byte	.LVL1715
+	.4byte	.LVL1716
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1714
-	.4byte	.LVL1728
+	.4byte	.LVL1716
+	.4byte	.LVL1730
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1728
-	.4byte	.LVL1729
+	.4byte	.LVL1730
+	.4byte	.LVL1731
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1729
-	.4byte	.LVL1745
+	.4byte	.LVL1731
+	.4byte	.LVL1747
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1745
-	.4byte	.LVL1750
+	.4byte	.LVL1747
+	.4byte	.LVL1752
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1750
-	.4byte	.LVL1751
+	.4byte	.LVL1752
+	.4byte	.LVL1753
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1751
 	.4byte	.LVL1753
+	.4byte	.LVL1755
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1753
-	.4byte	.LVL1754
+	.4byte	.LVL1755
+	.4byte	.LVL1756
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1754
-	.4byte	.LVL1805
+	.4byte	.LVL1756
+	.4byte	.LVL1807
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1805
-	.4byte	.LVL1809
+	.4byte	.LVL1807
+	.4byte	.LVL1811
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1809
-	.4byte	.LVL1810
+	.4byte	.LVL1811
+	.4byte	.LVL1812
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1810
+	.4byte	.LVL1812
 	.4byte	.LFE322
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST397:
-	.4byte	.LVL1713
+.LLST399:
 	.4byte	.LVL1715
+	.4byte	.LVL1717
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1715
-	.4byte	.LVL1729
+	.4byte	.LVL1717
+	.4byte	.LVL1731
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL1729
-	.4byte	.LVL1730-1
+	.4byte	.LVL1731
+	.4byte	.LVL1732-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1730-1
-	.4byte	.LVL1805
+	.4byte	.LVL1732-1
+	.4byte	.LVL1807
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL1805
-	.4byte	.LVL1806
+	.4byte	.LVL1807
+	.4byte	.LVL1808
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1806
+	.4byte	.LVL1808
 	.4byte	.LFE322
 	.2byte	0x4
 	.byte	0xf3
@@ -52771,22 +52911,22 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST398:
-	.4byte	.LVL1715
-	.4byte	.LVL1728
+.LLST400:
+	.4byte	.LVL1717
+	.4byte	.LVL1730
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL1731
-	.4byte	.LVL1804
+	.4byte	.LVL1733
+	.4byte	.LVL1806
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL1806
+	.4byte	.LVL1808
 	.4byte	.LFE322
 	.2byte	0x4
 	.byte	0xf3
@@ -52795,76 +52935,76 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST399:
-	.4byte	.LVL1715
-	.4byte	.LVL1728
+.LLST401:
+	.4byte	.LVL1717
+	.4byte	.LVL1730
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1731
-	.4byte	.LVL1745
+	.4byte	.LVL1733
+	.4byte	.LVL1747
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1745
-	.4byte	.LVL1750
+	.4byte	.LVL1747
+	.4byte	.LVL1752
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1750
-	.4byte	.LVL1751
+	.4byte	.LVL1752
+	.4byte	.LVL1753
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1751
 	.4byte	.LVL1753
+	.4byte	.LVL1755
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1753
-	.4byte	.LVL1754
+	.4byte	.LVL1755
+	.4byte	.LVL1756
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1754
-	.4byte	.LVL1804
+	.4byte	.LVL1756
+	.4byte	.LVL1806
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1806
-	.4byte	.LVL1809
+	.4byte	.LVL1808
+	.4byte	.LVL1811
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1809
-	.4byte	.LVL1810
+	.4byte	.LVL1811
+	.4byte	.LVL1812
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1810
+	.4byte	.LVL1812
 	.4byte	.LFE322
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST400:
-	.4byte	.LVL1786
-	.4byte	.LVL1789
+.LLST402:
+	.4byte	.LVL1788
+	.4byte	.LVL1791
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST401:
-	.4byte	.LVL1772
-	.4byte	.LVL1781
+.LLST403:
+	.4byte	.LVL1774
+	.4byte	.LVL1783
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -56
-	.4byte	.LVL1781
-	.4byte	.LVL1782
+	.4byte	.LVL1783
+	.4byte	.LVL1784
 	.2byte	0x7
 	.byte	0x91
 	.sleb128 -56
@@ -52873,40 +53013,40 @@ __func__.9940:
 	.byte	0x23
 	.uleb128 0x1
 	.byte	0x9f
-	.4byte	.LVL1782
-	.4byte	.LVL1804
+	.4byte	.LVL1784
+	.4byte	.LVL1806
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -56
 	.4byte	0
 	.4byte	0
-.LLST402:
-	.4byte	.LVL1773
-	.4byte	.LVL1776
+.LLST404:
+	.4byte	.LVL1775
+	.4byte	.LVL1778
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1776
-	.4byte	.LVL1777
+	.4byte	.LVL1778
+	.4byte	.LVL1779
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1777
-	.4byte	.LVL1778-1
+	.4byte	.LVL1779
+	.4byte	.LVL1780-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1778
-	.4byte	.LVL1779
+	.4byte	.LVL1780
+	.4byte	.LVL1781
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1780
-	.4byte	.LVL1793
+	.4byte	.LVL1782
+	.4byte	.LVL1795
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -60
-	.4byte	.LVL1794
-	.4byte	.LVL1795
+	.4byte	.LVL1796
+	.4byte	.LVL1797
 	.2byte	0x7
 	.byte	0x91
 	.sleb128 -60
@@ -52917,76 +53057,76 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST403:
-	.4byte	.LVL1773
-	.4byte	.LVL1793
+.LLST405:
+	.4byte	.LVL1775
+	.4byte	.LVL1795
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -68
-	.4byte	.LVL1794
-	.4byte	.LVL1795
+	.4byte	.LVL1796
+	.4byte	.LVL1797
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -68
 	.4byte	0
 	.4byte	0
-.LLST404:
-	.4byte	.LVL1774
-	.4byte	.LVL1775
+.LLST406:
+	.4byte	.LVL1776
+	.4byte	.LVL1777
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1775
 	.4byte	.LVL1777
+	.4byte	.LVL1779
 	.2byte	0x2
 	.byte	0x71
 	.sleb128 0
 	.4byte	0
 	.4byte	0
-.LLST405:
-	.4byte	.LVL1769
-	.4byte	.LVL1804
+.LLST407:
+	.4byte	.LVL1771
+	.4byte	.LVL1806
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -52
 	.4byte	0
 	.4byte	0
-.LLST406:
-	.4byte	.LVL1783
-	.4byte	.LVL1784
+.LLST408:
+	.4byte	.LVL1785
+	.4byte	.LVL1786
 	.2byte	0x2
 	.byte	0x72
 	.sleb128 12
-	.4byte	.LVL1784
-	.4byte	.LVL1785
+	.4byte	.LVL1786
+	.4byte	.LVL1787
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1785
-	.4byte	.LVL1793
+	.4byte	.LVL1787
+	.4byte	.LVL1795
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -64
 	.4byte	0
 	.4byte	0
-.LLST407:
-	.4byte	.LVL1719
-	.4byte	.LVL1720
+.LLST409:
+	.4byte	.LVL1721
+	.4byte	.LVL1722
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1732
-	.4byte	.LVL1733
+	.4byte	.LVL1734
+	.4byte	.LVL1735
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST447:
-	.4byte	.LVL2003
-	.4byte	.LVL2004
+.LLST449:
+	.4byte	.LVL2005
+	.4byte	.LVL2006
 	.2byte	0x6
 	.byte	0x3
 	.4byte	g_active_superblock
 	.byte	0x9f
-	.4byte	.LVL2004
-	.4byte	.LVL2010
+	.4byte	.LVL2006
+	.4byte	.LVL2012
 	.2byte	0x6
 	.byte	0x3
 	.4byte	g_buffer_superblock
@@ -52994,17 +53134,17 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 	.section	.debug_aranges,"",%progbits
-	.4byte	0x43c
+	.4byte	0x444
 	.2byte	0x2
 	.4byte	.Ldebug_info0
 	.byte	0x4
 	.byte	0
 	.2byte	0
 	.2byte	0
-	.4byte	.LFB351
-	.4byte	.LFE351-.LFB351
-	.4byte	.LFB358
-	.4byte	.LFE358-.LFB358
+	.4byte	.LFB352
+	.4byte	.LFE352-.LFB352
+	.4byte	.LFB359
+	.4byte	.LFE359-.LFB359
 	.4byte	.LFB205
 	.4byte	.LFE205-.LFB205
 	.4byte	.LFB206
@@ -53113,22 +53253,24 @@ __func__.9940:
 	.4byte	.LFE340-.LFB340
 	.4byte	.LFB341
 	.4byte	.LFE341-.LFB341
-	.4byte	.LFB343
-	.4byte	.LFE343-.LFB343
+	.4byte	.LFB342
+	.4byte	.LFE342-.LFB342
+	.4byte	.LFB344
+	.4byte	.LFE344-.LFB344
 	.4byte	.LFB233
 	.4byte	.LFE233-.LFB233
 	.4byte	.LFB239
 	.4byte	.LFE239-.LFB239
-	.4byte	.LFB344
-	.4byte	.LFE344-.LFB344
 	.4byte	.LFB345
 	.4byte	.LFE345-.LFB345
+	.4byte	.LFB346
+	.4byte	.LFE346-.LFB346
 	.4byte	.LFB243
 	.4byte	.LFE243-.LFB243
 	.4byte	.LFB212
 	.4byte	.LFE212-.LFB212
-	.4byte	.LFB348
-	.4byte	.LFE348-.LFB348
+	.4byte	.LFB349
+	.4byte	.LFE349-.LFB349
 	.4byte	.LFB209
 	.4byte	.LFE209-.LFB209
 	.4byte	.LFB228
@@ -53179,12 +53321,12 @@ __func__.9940:
 	.4byte	.LFE312-.LFB312
 	.4byte	.LFB313
 	.4byte	.LFE313-.LFB313
-	.4byte	.LFB346
-	.4byte	.LFE346-.LFB346
 	.4byte	.LFB347
 	.4byte	.LFE347-.LFB347
-	.4byte	.LFB349
-	.4byte	.LFE349-.LFB349
+	.4byte	.LFB348
+	.4byte	.LFE348-.LFB348
+	.4byte	.LFB350
+	.4byte	.LFE350-.LFB350
 	.4byte	.LFB229
 	.4byte	.LFE229-.LFB229
 	.4byte	.LFB301
@@ -53265,128 +53407,128 @@ __func__.9940:
 	.4byte	.LFE213-.LFB213
 	.4byte	.LFB214
 	.4byte	.LFE214-.LFB214
-	.4byte	.LFB350
-	.4byte	.LFE350-.LFB350
+	.4byte	.LFB351
+	.4byte	.LFE351-.LFB351
 	.4byte	0
 	.4byte	0
 	.section	.debug_ranges,"",%progbits
 .Ldebug_ranges0:
-	.4byte	.LBB164
-	.4byte	.LBE164
-	.4byte	.LBB167
-	.4byte	.LBE167
+	.4byte	.LBB166
+	.4byte	.LBE166
+	.4byte	.LBB169
+	.4byte	.LBE169
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB168
-	.4byte	.LBE168
-	.4byte	.LBB171
-	.4byte	.LBE171
+	.4byte	.LBB170
+	.4byte	.LBE170
+	.4byte	.LBB173
+	.4byte	.LBE173
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB177
-	.4byte	.LBE177
-	.4byte	.LBB180
-	.4byte	.LBE180
+	.4byte	.LBB179
+	.4byte	.LBE179
+	.4byte	.LBB182
+	.4byte	.LBE182
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB183
-	.4byte	.LBE183
-	.4byte	.LBB186
-	.4byte	.LBE186
+	.4byte	.LBB185
+	.4byte	.LBE185
+	.4byte	.LBB188
+	.4byte	.LBE188
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB197
-	.4byte	.LBE197
-	.4byte	.LBB202
-	.4byte	.LBE202
-	.4byte	.LBB203
-	.4byte	.LBE203
+	.4byte	.LBB199
+	.4byte	.LBE199
 	.4byte	.LBB204
 	.4byte	.LBE204
+	.4byte	.LBB205
+	.4byte	.LBE205
+	.4byte	.LBB206
+	.4byte	.LBE206
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB219
-	.4byte	.LBE219
-	.4byte	.LBB220
-	.4byte	.LBE220
+	.4byte	.LBB223
+	.4byte	.LBE223
+	.4byte	.LBB224
+	.4byte	.LBE224
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB225
-	.4byte	.LBE225
-	.4byte	.LBB226
-	.4byte	.LBE226
+	.4byte	.LBB229
+	.4byte	.LBE229
+	.4byte	.LBB230
+	.4byte	.LBE230
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB233
-	.4byte	.LBE233
-	.4byte	.LBB235
-	.4byte	.LBE235
+	.4byte	.LBB237
+	.4byte	.LBE237
+	.4byte	.LBB239
+	.4byte	.LBE239
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB243
-	.4byte	.LBE243
-	.4byte	.LBB246
-	.4byte	.LBE246
+	.4byte	.LBB247
+	.4byte	.LBE247
+	.4byte	.LBB250
+	.4byte	.LBE250
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB249
-	.4byte	.LBE249
 	.4byte	.LBB253
 	.4byte	.LBE253
-	.4byte	.LBB254
-	.4byte	.LBE254
-	.4byte	0
-	.4byte	0
-	.4byte	.LBB263
-	.4byte	.LBE263
-	.4byte	.LBB264
-	.4byte	.LBE264
+	.4byte	.LBB257
+	.4byte	.LBE257
+	.4byte	.LBB258
+	.4byte	.LBE258
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB266
-	.4byte	.LBE266
 	.4byte	.LBB267
 	.4byte	.LBE267
-	.4byte	0
-	.4byte	0
 	.4byte	.LBB268
 	.4byte	.LBE268
-	.4byte	.LBB269
-	.4byte	.LBE269
+	.4byte	0
+	.4byte	0
 	.4byte	.LBB270
 	.4byte	.LBE270
+	.4byte	.LBB271
+	.4byte	.LBE271
+	.4byte	0
+	.4byte	0
+	.4byte	.LBB272
+	.4byte	.LBE272
+	.4byte	.LBB273
+	.4byte	.LBE273
+	.4byte	.LBB274
+	.4byte	.LBE274
+	.4byte	0
+	.4byte	0
+	.4byte	.LBB291
+	.4byte	.LBE291
+	.4byte	.LBB297
+	.4byte	.LBE297
+	.4byte	.LBB298
+	.4byte	.LBE298
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB287
-	.4byte	.LBE287
 	.4byte	.LBB293
 	.4byte	.LBE293
 	.4byte	.LBB294
 	.4byte	.LBE294
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB289
-	.4byte	.LBE289
-	.4byte	.LBB290
-	.4byte	.LBE290
-	.4byte	0
-	.4byte	0
-	.4byte	.LBB296
-	.4byte	.LBE296
-	.4byte	.LBB297
-	.4byte	.LBE297
+	.4byte	.LBB300
+	.4byte	.LBE300
+	.4byte	.LBB301
+	.4byte	.LBE301
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB303
-	.4byte	.LBE303
-	.4byte	.LBB304
-	.4byte	.LBE304
+	.4byte	.LBB307
+	.4byte	.LBE307
+	.4byte	.LBB308
+	.4byte	.LBE308
 	.4byte	0
 	.4byte	0
-	.4byte	.LFB351
-	.4byte	.LFE351
-	.4byte	.LFB358
-	.4byte	.LFE358
+	.4byte	.LFB352
+	.4byte	.LFE352
+	.4byte	.LFB359
+	.4byte	.LFE359
 	.4byte	.LFB205
 	.4byte	.LFE205
 	.4byte	.LFB206
@@ -53495,22 +53637,24 @@ __func__.9940:
 	.4byte	.LFE340
 	.4byte	.LFB341
 	.4byte	.LFE341
-	.4byte	.LFB343
-	.4byte	.LFE343
+	.4byte	.LFB342
+	.4byte	.LFE342
+	.4byte	.LFB344
+	.4byte	.LFE344
 	.4byte	.LFB233
 	.4byte	.LFE233
 	.4byte	.LFB239
 	.4byte	.LFE239
-	.4byte	.LFB344
-	.4byte	.LFE344
 	.4byte	.LFB345
 	.4byte	.LFE345
+	.4byte	.LFB346
+	.4byte	.LFE346
 	.4byte	.LFB243
 	.4byte	.LFE243
 	.4byte	.LFB212
 	.4byte	.LFE212
-	.4byte	.LFB348
-	.4byte	.LFE348
+	.4byte	.LFB349
+	.4byte	.LFE349
 	.4byte	.LFB209
 	.4byte	.LFE209
 	.4byte	.LFB228
@@ -53561,12 +53705,12 @@ __func__.9940:
 	.4byte	.LFE312
 	.4byte	.LFB313
 	.4byte	.LFE313
-	.4byte	.LFB346
-	.4byte	.LFE346
 	.4byte	.LFB347
 	.4byte	.LFE347
-	.4byte	.LFB349
-	.4byte	.LFE349
+	.4byte	.LFB348
+	.4byte	.LFE348
+	.4byte	.LFB350
+	.4byte	.LFE350
 	.4byte	.LFB229
 	.4byte	.LFE229
 	.4byte	.LFB301
@@ -53647,18 +53791,18 @@ __func__.9940:
 	.4byte	.LFE213
 	.4byte	.LFB214
 	.4byte	.LFE214
-	.4byte	.LFB350
-	.4byte	.LFE350
+	.4byte	.LFB351
+	.4byte	.LFE351
 	.4byte	0
 	.4byte	0
 	.section	.debug_line,"",%progbits
 .Ldebug_line0:
 	.section	.debug_str,"MS",%progbits,1
-.LASF727:
+.LASF728:
 	.ascii	"FtlEctTblFlush\000"
-.LASF590:
+.LASF593:
 	.ascii	"gc_page_num\000"
-.LASF606:
+.LASF609:
 	.ascii	"superBlk\000"
 .LASF499:
 	.ascii	"g_gc_bad_block_temp_num\000"
@@ -53672,9 +53816,9 @@ __func__.9940:
 	.ascii	"__func__\000"
 .LASF419:
 	.ascii	"c_ftl_nand_sys_blks_per_plane\000"
-.LASF732:
+.LASF733:
 	.ascii	"nSec\000"
-.LASF728:
+.LASF729:
 	.ascii	"forceFlush\000"
 .LASF107:
 	.ascii	"bootm_headers\000"
@@ -53684,7 +53828,7 @@ __func__.9940:
 	.ascii	"rd_end\000"
 .LASF492:
 	.ascii	"p_gc_blk_tbl\000"
-.LASF787:
+.LASF788:
 	.ascii	"FtlFreeSysBlkQueueOut\000"
 .LASF324:
 	.ascii	"ftl_bbt_blk_header\000"
@@ -53692,33 +53836,33 @@ __func__.9940:
 	.ascii	"eth_device\000"
 .LASF306:
 	.ascii	"sign\000"
-.LASF832:
+.LASF833:
 	.ascii	"sctidx\000"
-.LASF669:
+.LASF670:
 	.ascii	"Ftl_load_ext_data\000"
 .LASF96:
 	.ascii	"ih_comp\000"
-.LASF608:
+.LASF587:
 	.ascii	"block\000"
 .LASF22:
 	.ascii	"_Bool\000"
-.LASF651:
+.LASF652:
 	.ascii	"min_ec\000"
-.LASF601:
+.LASF604:
 	.ascii	"req_read_temp\000"
 .LASF279:
 	.ascii	"p_spare\000"
-.LASF685:
+.LASF686:
 	.ascii	"recovery_cur_page_ver\000"
 .LASF506:
 	.ascii	"g_totle_write_page_count\000"
 .LASF245:
 	.ascii	"net_root_path\000"
-.LASF624:
+.LASF625:
 	.ascii	"lookup_ppa\000"
-.LASF817:
+.LASF818:
 	.ascii	"FtlBbmTblFlush\000"
-.LASF610:
+.LASF612:
 	.ascii	"Ftl_get_new_temp_ppa\000"
 .LASF327:
 	.ascii	"ftl_data_blk_header\000"
@@ -53732,9 +53876,9 @@ __func__.9940:
 	.ascii	"des_ppa\000"
 .LASF237:
 	.ascii	"priv\000"
-.LASF777:
+.LASF778:
 	.ascii	"insert_free_list\000"
-.LASF773:
+.LASF774:
 	.ascii	"pHead\000"
 .LASF21:
 	.ascii	"___strtok\000"
@@ -53742,23 +53886,23 @@ __func__.9940:
 	.ascii	"UCLASS_SPI_GENERIC\000"
 .LASF477:
 	.ascii	"g_l2p_last_update_region_id\000"
-.LASF698:
+.LASF699:
 	.ascii	"ftl_sb_update_avl_pages\000"
 .LASF572:
 	.ascii	"FlashProgPages\000"
-.LASF856:
+.LASF857:
 	.ascii	"test_page_num\000"
-.LASF684:
+.LASF685:
 	.ascii	"lookup_superblock_id\000"
 .LASF420:
 	.ascii	"c_ftl_nand_init_sys_blks_per_plane\000"
-.LASF865:
+.LASF866:
 	.ascii	"FtlConstantsInit\000"
-.LASF593:
+.LASF596:
 	.ascii	"num_io\000"
-.LASF868:
+.LASF869:
 	.ascii	"FtlPrintInfo\000"
-.LASF744:
+.LASF745:
 	.ascii	"l2p_flush\000"
 .LASF378:
 	.ascii	"rear\000"
@@ -53770,27 +53914,27 @@ __func__.9940:
 	.ascii	"c_ftl_nand_page_pre_slc_blk\000"
 .LASF243:
 	.ascii	"net_nis_domain\000"
-.LASF764:
+.LASF765:
 	.ascii	"List_update_data_list\000"
-.LASF852:
+.LASF853:
 	.ascii	"create_first_buffer_superblock\000"
 .LASF503:
 	.ascii	"g_gc_merge_free_blk_threshold\000"
-.LASF693:
+.LASF694:
 	.ascii	"last_mlc_page_version\000"
-.LASF630:
+.LASF631:
 	.ascii	"IsBlkInGcList\000"
 .LASF235:
 	.ascii	"next\000"
 .LASF312:
 	.ascii	"pBlkVpcTbl\000"
-.LASF697:
+.LASF698:
 	.ascii	"FtlReUsePrevPpa\000"
-.LASF658:
+.LASF659:
 	.ascii	"update_multiplier_value\000"
 .LASF411:
 	.ascii	"c_ftl_nand_totle_phy_blks\000"
-.LASF874:
+.LASF875:
 	.ascii	"memcmp\000"
 .LASF421:
 	.ascii	"c_ftl_nand_max_sys_blks\000"
@@ -53806,13 +53950,13 @@ __func__.9940:
 	.ascii	"UCLASS_I2C_MUX\000"
 .LASF263:
 	.ascii	"uclass_id\000"
-.LASF598:
+.LASF601:
 	.ascii	"get_new_gc_superblock\000"
-.LASF622:
+.LASF623:
 	.ascii	"BOPS_EN\000"
 .LASF241:
 	.ascii	"net_netmask\000"
-.LASF849:
+.LASF850:
 	.ascii	"bad_block_cnt\000"
 .LASF424:
 	.ascii	"c_ftl_nand_max_data_blks\000"
@@ -53822,13 +53966,13 @@ __func__.9940:
 	.ascii	"fit_noffset_rd\000"
 .LASF192:
 	.ascii	"UCLASS_RTC\000"
-.LASF809:
+.LASF810:
 	.ascii	"pBbtHeader\000"
 .LASF46:
 	.ascii	"bi_memsize\000"
 .LASF47:
 	.ascii	"bi_flashstart\000"
-.LASF761:
+.LASF762:
 	.ascii	"minValidPageCount\000"
 .LASF232:
 	.ascii	"recv\000"
@@ -53852,7 +53996,7 @@ __func__.9940:
 	.ascii	"UCLASS_RKNAND\000"
 .LASF581:
 	.ascii	"die_index\000"
-.LASF804:
+.LASF805:
 	.ascii	"ver2\000"
 .LASF434:
 	.ascii	"gSysFreeQueue\000"
@@ -53866,6 +54010,8 @@ __func__.9940:
 	.ascii	"UCLASS_PCI_EMUL\000"
 .LASF72:
 	.ascii	"fdt_header\000"
+.LASF586:
+	.ascii	"ftl_free\000"
 .LASF429:
 	.ascii	"g_MaxLpn\000"
 .LASF342:
@@ -53878,15 +54024,15 @@ __func__.9940:
 	.ascii	"off_dt_struct\000"
 .LASF417:
 	.ascii	"c_ftl_nand_max_vendor_blks\000"
-.LASF768:
+.LASF769:
 	.ascii	"prev_valid_page_count\000"
-.LASF873:
+.LASF874:
 	.ascii	"FtlPrintInfo2buf\000"
 .LASF480:
 	.ascii	"p_data_block_list_head\000"
 .LASF265:
 	.ascii	"NETLOOP_CONTINUE\000"
-.LASF806:
+.LASF807:
 	.ascii	"P2V_plane\000"
 .LASF486:
 	.ascii	"g_gc_temp_superblock\000"
@@ -53896,7 +54042,7 @@ __func__.9940:
 	.ascii	"c_ftl_nand_max_map_blks\000"
 .LASF302:
 	.ascii	"BbtMap\000"
-.LASF743:
+.LASF744:
 	.ascii	"found_lpa\000"
 .LASF209:
 	.ascii	"UCLASS_VIDEO_CONSOLE\000"
@@ -53904,31 +54050,31 @@ __func__.9940:
 	.ascii	"last_refresh_read_count\000"
 .LASF207:
 	.ascii	"UCLASS_VIDEO\000"
-.LASF614:
+.LASF616:
 	.ascii	"current_ppa\000"
-.LASF851:
+.LASF852:
 	.ascii	"create_first_active_superblock\000"
 .LASF313:
 	.ascii	"pMapPpnTbl\000"
 .LASF269:
 	.ascii	"net_state\000"
-.LASF724:
+.LASF725:
 	.ascii	"num_page\000"
 .LASF425:
 	.ascii	"ftl_gc_temp_power_lost_recovery_flag\000"
-.LASF613:
+.LASF615:
 	.ascii	"totle_num\000"
-.LASF731:
+.LASF732:
 	.ascii	"Index\000"
-.LASF681:
+.LASF682:
 	.ascii	"next_free_active_page\000"
-.LASF604:
+.LASF607:
 	.ascii	"spperBlk\000"
 .LASF65:
 	.ascii	"IRQ_STACK_START\000"
 .LASF132:
 	.ascii	"verify\000"
-.LASF713:
+.LASF714:
 	.ascii	"ftl_set_blk_mode\000"
 .LASF266:
 	.ascii	"NETLOOP_RESTART\000"
@@ -53936,11 +54082,11 @@ __func__.9940:
 	.ascii	"uint8\000"
 .LASF353:
 	.ascii	"write_page_count\000"
-.LASF609:
+.LASF611:
 	.ascii	"Ftl_gc_temp_data_write_back\000"
 .LASF295:
 	.ascii	"erase_blk\000"
-.LASF722:
+.LASF723:
 	.ascii	"re_save_vpndata\000"
 .LASF463:
 	.ascii	"p_valid_page_count_check_table\000"
@@ -53950,13 +54096,13 @@ __func__.9940:
 	.ascii	"g_num_free_superblocks\000"
 .LASF226:
 	.ascii	"s_addr\000"
-.LASF819:
+.LASF820:
 	.ascii	"re_save_bbmdata\000"
 .LASF200:
 	.ascii	"UCLASS_SYSRESET\000"
-.LASF627:
+.LASF628:
 	.ascii	"FtlGcUpdatePage\000"
-.LASF811:
+.LASF812:
 	.ascii	"FtlLoadFactoryBbt\000"
 .LASF289:
 	.ascii	"sec_per_blk\000"
@@ -53970,11 +54116,11 @@ __func__.9940:
 	.ascii	"UCLASS_CROS_EC\000"
 .LASF407:
 	.ascii	"c_ftl_nand_sec_pre_page_shift\000"
-.LASF788:
+.LASF789:
 	.ascii	"IsInFreeQueue\000"
 .LASF236:
 	.ascii	"index\000"
-.LASF745:
+.LASF746:
 	.ascii	"select_l2p_ram_region\000"
 .LASF335:
 	.ascii	"maxDieNum\000"
@@ -53988,17 +54134,17 @@ __func__.9940:
 	.ascii	"block_size\000"
 .LASF90:
 	.ascii	"ih_load\000"
-.LASF835:
+.LASF836:
 	.ascii	"FtlProgPages\000"
-.LASF664:
+.LASF665:
 	.ascii	"error_flag\000"
 .LASF403:
 	.ascii	"c_ftl_nand_page_pre_blk\000"
-.LASF794:
+.LASF795:
 	.ascii	"blk_Id\000"
 .LASF213:
 	.ascii	"UCLASS_KEY\000"
-.LASF875:
+.LASF876:
 	.ascii	"memcpy\000"
 .LASF67:
 	.ascii	"_datarel_start_ofs\000"
@@ -54020,7 +54166,7 @@ __func__.9940:
 	.ascii	"g_gc_page_offset\000"
 .LASF240:
 	.ascii	"net_gateway\000"
-.LASF802:
+.LASF803:
 	.ascii	"ftl_cmp_data_ver\000"
 .LASF430:
 	.ascii	"g_VaildLpn\000"
@@ -54032,39 +54178,39 @@ __func__.9940:
 	.ascii	"type\000"
 .LASF40:
 	.ascii	"lmb_region\000"
-.LASF632:
+.LASF633:
 	.ascii	"numREQ\000"
 .LASF34:
 	.ascii	"protect\000"
-.LASF855:
+.LASF856:
 	.ascii	"max_test_page_num\000"
-.LASF704:
+.LASF705:
 	.ascii	"blk_id\000"
 .LASF349:
 	.ascii	"GlobalDataVersion\000"
-.LASF793:
+.LASF794:
 	.ascii	"erase_flag\000"
 .LASF362:
 	.ascii	"last_refresh_data_times\000"
-.LASF707:
+.LASF708:
 	.ascii	"totleBlkNum\000"
-.LASF678:
+.LASF679:
 	.ascii	"saved_active_page\000"
-.LASF776:
+.LASF777:
 	.ascii	"pTmp\000"
-.LASF602:
+.LASF605:
 	.ascii	"add_count\000"
 .LASF547:
 	.ascii	"ftl_gc_temp_block_bops_scan_page_addr\000"
 .LASF394:
 	.ascii	"c_ftl_nand_type\000"
-.LASF687:
+.LASF688:
 	.ascii	"recovery_flash_mode\000"
 .LASF138:
 	.ascii	"UCLASS_TEST\000"
 .LASF485:
 	.ascii	"g_buffer_superblock\000"
-.LASF649:
+.LASF650:
 	.ascii	"node_id\000"
 .LASF397:
 	.ascii	"c_ftl_nand_blks_per_die\000"
@@ -54086,9 +54232,9 @@ __func__.9940:
 	.ascii	"sector_count\000"
 .LASF406:
 	.ascii	"c_ftl_nand_sec_pre_page\000"
-.LASF588:
+.LASF591:
 	.ascii	"mode\000"
-.LASF813:
+.LASF814:
 	.ascii	"FtlLoadBbt\000"
 .LASF561:
 	.ascii	"pvForm\000"
@@ -54096,9 +54242,9 @@ __func__.9940:
 	.ascii	"padding\000"
 .LASF460:
 	.ascii	"p_swl_mul_table\000"
-.LASF628:
+.LASF629:
 	.ascii	"src_ppa\000"
-.LASF682:
+.LASF683:
 	.ascii	"detected_active_page\000"
 .LASF389:
 	.ascii	"ftl_gc_page_item\000"
@@ -54110,61 +54256,61 @@ __func__.9940:
 	.ascii	"bi_ethspeed\000"
 .LASF98:
 	.ascii	"image_header_t\000"
-.LASF770:
+.LASF771:
 	.ascii	"pPrev\000"
 .LASF474:
 	.ascii	"g_totle_vendor_block\000"
-.LASF623:
+.LASF624:
 	.ascii	"superblock_id\000"
-.LASF592:
+.LASF595:
 	.ascii	"plane\000"
 .LASF11:
 	.ascii	"phys_addr_t\000"
 .LASF95:
 	.ascii	"ih_type\000"
-.LASF845:
+.LASF846:
 	.ascii	"sftl_init\000"
 .LASF1:
 	.ascii	"unsigned char\000"
-.LASF611:
+.LASF613:
 	.ascii	"FtlGcScanTempBlk\000"
 .LASF109:
 	.ascii	"legacy_hdr_os_copy\000"
-.LASF760:
+.LASF761:
 	.ascii	"vpcTbl\000"
 .LASF176:
 	.ascii	"UCLASS_PANEL_BACKLIGHT\000"
 .LASF339:
 	.ascii	"activeSuperblockId\000"
-.LASF803:
+.LASF804:
 	.ascii	"ver1\000"
 .LASF280:
 	.ascii	"nand_phy_info\000"
-.LASF759:
+.LASF760:
 	.ascii	"ftl_free_no_use_map_blk\000"
-.LASF805:
+.LASF806:
 	.ascii	"P2V_block_in_plane\000"
 .LASF556:
 	.ascii	"str1\000"
 .LASF557:
 	.ascii	"str2\000"
-.LASF718:
+.LASF719:
 	.ascii	"pMapHeader\000"
 .LASF140:
 	.ascii	"UCLASS_TEST_BUS\000"
-.LASF716:
+.LASF717:
 	.ascii	"FtlScanSysBlk\000"
 .LASF52:
 	.ascii	"bi_arm_freq\000"
-.LASF695:
+.LASF696:
 	.ascii	"lookup_ppa_ver\000"
-.LASF752:
+.LASF753:
 	.ascii	"region_num\000"
 .LASF476:
 	.ascii	"p_l2p_map_buf\000"
 .LASF488:
 	.ascii	"gp_last_act_superblock\000"
-.LASF870:
+.LASF871:
 	.ascii	"Ftl_log2\000"
 .LASF448:
 	.ascii	"p_sys_spare_buf\000"
@@ -54172,7 +54318,7 @@ __func__.9940:
 	.ascii	"UCLASS_LED\000"
 .LASF552:
 	.ascii	"p_current\000"
-.LASF646:
+.LASF647:
 	.ascii	"get_new_id\000"
 .LASF253:
 	.ascii	"net_rx_packet_len\000"
@@ -54180,11 +54326,11 @@ __func__.9940:
 	.ascii	"net_null_ethaddr\000"
 .LASF543:
 	.ascii	"g_ect_tbl_power_up_flush\000"
-.LASF594:
+.LASF597:
 	.ascii	"physical_block\000"
 .LASF32:
 	.ascii	"flash_id\000"
-.LASF838:
+.LASF839:
 	.ascii	"absolute_sector\000"
 .LASF222:
 	.ascii	"load_addr\000"
@@ -54192,31 +54338,33 @@ __func__.9940:
 	.ascii	"PowerLostTimes\000"
 .LASF501:
 	.ascii	"g_gc_bad_block_temp_tbl\000"
+.LASF886:
+	.ascii	"kfree\000"
 .LASF464:
 	.ascii	"p_blk_mode_table\000"
-.LASF775:
+.LASF776:
 	.ascii	"List_remove_node\000"
 .LASF291:
 	.ascii	"reserved_blk\000"
-.LASF733:
+.LASF734:
 	.ascii	"pBuf\000"
-.LASF791:
+.LASF792:
 	.ascii	"tmp_ec\000"
 .LASF484:
 	.ascii	"g_active_superblock\000"
-.LASF689:
+.LASF690:
 	.ascii	"recovery_super_page\000"
 .LASF437:
 	.ascii	"req_sys\000"
 .LASF381:
 	.ascii	"available_pages\000"
-.LASF799:
+.LASF800:
 	.ascii	"high\000"
-.LASF833:
+.LASF834:
 	.ascii	"nscts\000"
 .LASF410:
 	.ascii	"c_ftl_nand_reserved_blks\000"
-.LASF700:
+.LASF701:
 	.ascii	"FtlL2PDataInit\000"
 .LASF230:
 	.ascii	"init\000"
@@ -54226,9 +54374,9 @@ __func__.9940:
 	.ascii	"check\000"
 .LASF145:
 	.ascii	"UCLASS_USB_EMUL\000"
-.LASF797:
+.LASF798:
 	.ascii	"FtlFreeSysBlkQueueInit\000"
-.LASF677:
+.LASF678:
 	.ascii	"FtlRecoverySuperblock\000"
 .LASF396:
 	.ascii	"c_ftl_nand_planes_per_die\000"
@@ -54238,17 +54386,17 @@ __func__.9940:
 	.ascii	"ecc_bits\000"
 .LASF293:
 	.ascii	"nand_ops\000"
-.LASF599:
+.LASF602:
 	.ascii	"tmp_blk\000"
 .LASF523:
 	.ascii	"g_gc_head_data_block\000"
-.LASF828:
+.LASF829:
 	.ascii	"FtlWrite\000"
 .LASF182:
 	.ascii	"UCLASS_PINCTRL\000"
-.LASF831:
+.LASF832:
 	.ascii	"num_lpa\000"
-.LASF867:
+.LASF868:
 	.ascii	"blkNum\000"
 .LASF364:
 	.ascii	"SlcPartLbaEndSector\000"
@@ -54264,11 +54412,11 @@ __func__.9940:
 	.ascii	"image_len\000"
 .LASF441:
 	.ascii	"req_gc\000"
-.LASF854:
+.LASF855:
 	.ascii	"is_sys_blk\000"
 .LASF42:
 	.ascii	"memory\000"
-.LASF821:
+.LASF822:
 	.ascii	"bitmap\000"
 .LASF319:
 	.ascii	"ftl_ect_tbl_info\000"
@@ -54276,41 +54424,41 @@ __func__.9940:
 	.ascii	"UCLASS_USB_DEV_GENERIC\000"
 .LASF212:
 	.ascii	"UCLASS_FG\000"
-.LASF755:
+.LASF756:
 	.ascii	"lastMapBlk\000"
 .LASF370:
 	.ascii	"totle_write_sector\000"
 .LASF522:
 	.ascii	"g_ftl_nand_free_count\000"
-.LASF626:
+.LASF627:
 	.ascii	"p_gc_page\000"
 .LASF20:
 	.ascii	"errno\000"
 .LASF532:
 	.ascii	"gNandPhyInfo\000"
-.LASF861:
+.LASF862:
 	.ascii	"ven_blk\000"
 .LASF30:
 	.ascii	"size\000"
 .LASF244:
 	.ascii	"net_hostname\000"
-.LASF772:
+.LASF773:
 	.ascii	"List_pop_head_node\000"
 .LASF308:
 	.ascii	"BlkNum\000"
-.LASF850:
+.LASF851:
 	.ascii	"sys_bad_block_cnt\000"
-.LASF596:
+.LASF599:
 	.ascii	"p_dataHeader\000"
-.LASF780:
+.LASF781:
 	.ascii	"tmp_id\000"
-.LASF600:
+.LASF603:
 	.ascii	"FtlReadRefresh\000"
-.LASF645:
+.LASF646:
 	.ascii	"free_blk_index\000"
-.LASF820:
+.LASF821:
 	.ascii	"FtlBbt2Bitmap\000"
-.LASF662:
+.LASF663:
 	.ascii	"ftl_check_vpc\000"
 .LASF108:
 	.ascii	"legacy_hdr_os\000"
@@ -54348,13 +54496,13 @@ __func__.9940:
 	.ascii	"gcTempSuperblockId\000"
 .LASF238:
 	.ascii	"eth_current\000"
-.LASF766:
+.LASF767:
 	.ascii	"node_valid_page_count\000"
 .LASF53:
 	.ascii	"bi_dsp_freq\000"
 .LASF4:
 	.ascii	"uchar\000"
-.LASF668:
+.LASF669:
 	.ascii	"pages\000"
 .LASF89:
 	.ascii	"ih_size\000"
@@ -54362,13 +54510,13 @@ __func__.9940:
 	.ascii	"addr\000"
 .LASF142:
 	.ascii	"UCLASS_SPI_EMUL\000"
-.LASF863:
+.LASF864:
 	.ascii	"FtlMemInit\000"
-.LASF818:
+.LASF819:
 	.ascii	"write_count\000"
-.LASF663:
+.LASF664:
 	.ascii	"prev_ppa\000"
-.LASF586:
+.LASF589:
 	.ascii	"FlashTestBlk\000"
 .LASF179:
 	.ascii	"UCLASS_PCI_GENERIC\000"
@@ -54376,15 +54524,13 @@ __func__.9940:
 	.ascii	"bi_sramstart\000"
 .LASF66:
 	.ascii	"FIQ_STACK_START\000"
-.LASF882:
-	.ascii	"/home/ldq/rk-linux/u-boot-test\000"
-.LASF872:
+.LASF873:
 	.ascii	"rknand_proc_ftlread\000"
 .LASF228:
 	.ascii	"enetaddr\000"
-.LASF881:
-	.ascii	"drivers/rkflash/rk_sftl.c\000"
-.LASF741:
+.LASF181:
+	.ascii	"UCLASS_PINCONFIG\000"
+.LASF742:
 	.ascii	"l2p_region_id\000"
 .LASF554:
 	.ascii	"check_buf\000"
@@ -54400,7 +54546,7 @@ __func__.9940:
 	.ascii	"slc_erase_count\000"
 .LASF60:
 	.ascii	"bi_busfreq\000"
-.LASF769:
+.LASF770:
 	.ascii	"prev_multiplier_value\000"
 .LASF497:
 	.ascii	"g_gc_next_blk\000"
@@ -54410,15 +54556,15 @@ __func__.9940:
 	.ascii	"UCLASS_BLK\000"
 .LASF546:
 	.ascii	"gc_discard_updated\000"
-.LASF737:
+.LASF738:
 	.ascii	"FtlVendorPartWrite\000"
-.LASF621:
+.LASF622:
 	.ascii	"FtlGcFreeTempBlock\000"
 .LASF248:
 	.ascii	"net_ip\000"
 .LASF229:
 	.ascii	"iobase\000"
-.LASF657:
+.LASF658:
 	.ascii	"GetFreeBlockMinEraseCount\000"
 .LASF336:
 	.ascii	"activeFlashMode\000"
@@ -54426,13 +54572,13 @@ __func__.9940:
 	.ascii	"ih_dcrc\000"
 .LASF35:
 	.ascii	"flash_info_t\000"
-.LASF655:
+.LASF656:
 	.ascii	"GetFreeBlockMaxEraseCount\000"
-.LASF711:
+.LASF712:
 	.ascii	"sblk\000"
-.LASF754:
+.LASF755:
 	.ascii	"ftl_map_blk_gc\000"
-.LASF877:
+.LASF878:
 	.ascii	"printf\000"
 .LASF59:
 	.ascii	"bi_intfreq\000"
@@ -54456,23 +54602,23 @@ __func__.9940:
 	.ascii	"TotleReadBufferMatchCount\000"
 .LASF438:
 	.ascii	"req_read\000"
-.LASF751:
+.LASF752:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
 .LASF466:
 	.ascii	"p_map_block_valid_page_count\000"
 .LASF167:
 	.ascii	"UCLASS_MAILBOX\000"
-.LASF792:
+.LASF793:
 	.ascii	"FtlFreeSysBlkQueueIn\000"
 .LASF366:
 	.ascii	"readErrorCount\000"
-.LASF585:
+.LASF588:
 	.ascii	"sftl_gc\000"
-.LASF796:
+.LASF797:
 	.ascii	"FtlFreeSysBlkQueueEmpty\000"
-.LASF762:
+.LASF763:
 	.ascii	"load_l2p_region\000"
-.LASF639:
+.LASF640:
 	.ascii	"p_superblock\000"
 .LASF301:
 	.ascii	"fBbtBlk\000"
@@ -54480,7 +54626,7 @@ __func__.9940:
 	.ascii	"off_mem_rsvmap\000"
 .LASF445:
 	.ascii	"p_sys_data_buf\000"
-.LASF883:
+.LASF885:
 	.ascii	"l2p_addr_tran\000"
 .LASF164:
 	.ascii	"UCLASS_KEYBOARD\000"
@@ -54488,19 +54634,19 @@ __func__.9940:
 	.ascii	"page_per_slc_blk\000"
 .LASF398:
 	.ascii	"c_ftl_nand_blks_per_die_shift\000"
-.LASF738:
+.LASF739:
 	.ascii	"log2phys\000"
 .LASF478:
 	.ascii	"p_data_block_list_table\000"
 .LASF171:
 	.ascii	"UCLASS_MOD_EXP\000"
-.LASF644:
+.LASF645:
 	.ascii	"num_bad_block\000"
 .LASF85:
 	.ascii	"image_header\000"
-.LASF701:
+.LASF702:
 	.ascii	"FtlLoadVonderInfo\000"
-.LASF612:
+.LASF614:
 	.ascii	"pSuperblock\000"
 .LASF535:
 	.ascii	"ftl_temp_buf\000"
@@ -54512,7 +54658,7 @@ __func__.9940:
 	.ascii	"last_comp_version\000"
 .LASF415:
 	.ascii	"c_ftl_nand_map_blks_per_plane\000"
-.LASF810:
+.LASF811:
 	.ascii	"re_try_next_blk\000"
 .LASF56:
 	.ascii	"bi_ip_addr\000"
@@ -54524,23 +54670,23 @@ __func__.9940:
 	.ascii	"g_gc_cur_blk_max_valid_pages\000"
 .LASF16:
 	.ascii	"ushort\000"
-.LASF763:
+.LASF764:
 	.ascii	"phyAddr\000"
 .LASF73:
 	.ascii	"magic\000"
-.LASF790:
+.LASF791:
 	.ascii	"tmp_blk_id\000"
-.LASF876:
+.LASF877:
 	.ascii	"memset\000"
 .LASF242:
 	.ascii	"net_dns_server\000"
 .LASF562:
 	.ascii	"ftl_memset\000"
-.LASF830:
+.LASF831:
 	.ascii	"end_lpa\000"
-.LASF735:
+.LASF736:
 	.ascii	"result\000"
-.LASF625:
+.LASF626:
 	.ascii	"scan_page_num\000"
 .LASF267:
 	.ascii	"NETLOOP_SUCCESS\000"
@@ -54548,9 +54694,9 @@ __func__.9940:
 	.ascii	"name\000"
 .LASF512:
 	.ascii	"g_totle_cache_write_count\000"
-.LASF767:
+.LASF768:
 	.ascii	"node_multiplier_value\000"
-.LASF758:
+.LASF759:
 	.ascii	"blk_index\000"
 .LASF69:
 	.ascii	"_datarellocal_start_ofs\000"
@@ -54562,17 +54708,17 @@ __func__.9940:
 	.ascii	"fit_hdr_setup\000"
 .LASF150:
 	.ascii	"UCLASS_CLK\000"
-.LASF686:
+.LASF687:
 	.ascii	"detected_error_page\000"
 .LASF129:
 	.ascii	"initrd_end\000"
-.LASF618:
+.LASF620:
 	.ascii	"read_super_page\000"
 .LASF219:
 	.ascii	"monitor_flash_len\000"
-.LASF620:
+.LASF621:
 	.ascii	"FtlGcPageVarInit\000"
-.LASF822:
+.LASF823:
 	.ascii	"FtlBbtInfoPrint\000"
 .LASF530:
 	.ascii	"c_mlc_erase_count_value\000"
@@ -54580,13 +54726,13 @@ __func__.9940:
 	.ascii	"mem_malloc_brk\000"
 .LASF483:
 	.ascii	"g_num_data_superblocks\000"
-.LASF753:
+.LASF754:
 	.ascii	"blkTbl\000"
 .LASF348:
 	.ascii	"mlc_erase_count\000"
 .LASF12:
 	.ascii	"phys_size_t\000"
-.LASF715:
+.LASF716:
 	.ascii	"FtlLoadEctTbl\000"
 .LASF62:
 	.ascii	"bi_boot_params\000"
@@ -54594,11 +54740,11 @@ __func__.9940:
 	.ascii	"UCLASS_RC\000"
 .LASF51:
 	.ascii	"bi_sramsize\000"
-.LASF879:
+.LASF881:
 	.ascii	"sprintf\000"
-.LASF605:
+.LASF608:
 	.ascii	"FtlGcMarkBadPhyBlk\000"
-.LASF641:
+.LASF642:
 	.ascii	"allocate_new_data_superblock\000"
 .LASF13:
 	.ascii	"sizetype\000"
@@ -54610,9 +54756,9 @@ __func__.9940:
 	.ascii	"GlobalSysVersion\000"
 .LASF329:
 	.ascii	"ftl_map_blk_header\000"
-.LASF597:
+.LASF600:
 	.ascii	"gc_next_superblock\000"
-.LASF812:
+.LASF813:
 	.ascii	"blkAddr\000"
 .LASF193:
 	.ascii	"UCLASS_SCSI\000"
@@ -54622,15 +54768,15 @@ __func__.9940:
 	.ascii	"signed char\000"
 .LASF250:
 	.ascii	"net_tx_packet\000"
-.LASF696:
+.LASF697:
 	.ascii	"current_ppa_ver\000"
-.LASF784:
+.LASF785:
 	.ascii	"tmp_multiplier_value\000"
 .LASF566:
 	.ascii	"FlashEraseBlocks\000"
 .LASF33:
 	.ascii	"start\000"
-.LASF829:
+.LASF830:
 	.ascii	"start_lpa\000"
 .LASF553:
 	.ascii	"current\000"
@@ -54654,31 +54800,31 @@ __func__.9940:
 	.ascii	"TotleReadBufferCount3\000"
 .LASF455:
 	.ascii	"c_gc_page_buf_num\000"
-.LASF719:
+.LASF720:
 	.ascii	"FtlVpcTblFlush\000"
 .LASF189:
 	.ascii	"UCLASS_REMOTEPROC\000"
-.LASF742:
+.LASF743:
 	.ascii	"lpn_index\000"
 .LASF118:
 	.ascii	"fit_hdr_fdt\000"
-.LASF631:
+.LASF632:
 	.ascii	"FtlGcBufAlloc\000"
 .LASF569:
 	.ascii	"num_req\000"
-.LASF778:
+.LASF779:
 	.ascii	"node_erase_count\000"
 .LASF254:
 	.ascii	"net_bcast_ethaddr\000"
-.LASF736:
+.LASF737:
 	.ascii	"ppn_index\000"
-.LASF795:
+.LASF796:
 	.ascii	"FtlFreeSysBlkQueueFull\000"
 .LASF133:
 	.ascii	"state\000"
 .LASF48:
 	.ascii	"bi_flashsize\000"
-.LASF746:
+.LASF747:
 	.ascii	"target_region\000"
 .LASF19:
 	.ascii	"__be32\000"
@@ -54688,7 +54834,7 @@ __func__.9940:
 	.ascii	"c_ftl_vendor_part_size\000"
 .LASF251:
 	.ascii	"net_rx_packets\000"
-.LASF826:
+.LASF827:
 	.ascii	"sftl_read\000"
 .LASF452:
 	.ascii	"p_gc_spare_buf\000"
@@ -54704,15 +54850,15 @@ __func__.9940:
 	.ascii	"p_io_data_buf_1\000"
 .LASF68:
 	.ascii	"_datarelrolocal_start_ofs\000"
-.LASF683:
+.LASF684:
 	.ascii	"mlc_detected_active_page\000"
-.LASF853:
+.LASF854:
 	.ascii	"FtlLowFormatEraseBlock\000"
 .LASF317:
 	.ascii	"region_id\000"
 .LASF326:
 	.ascii	"sysBlksPerPlane\000"
-.LASF816:
+.LASF817:
 	.ascii	"FtlBbtMemInit\000"
 .LASF309:
 	.ascii	"maxBlkNum\000"
@@ -54720,7 +54866,7 @@ __func__.9940:
 	.ascii	"c_ftl_nand_die_num\000"
 .LASF286:
 	.ascii	"page_per_blk\000"
-.LASF721:
+.LASF722:
 	.ascii	"prog_error_count\000"
 .LASF372:
 	.ascii	"progErrorCount\000"
@@ -54730,7 +54876,7 @@ __func__.9940:
 	.ascii	"g_gc_cur_blk_valid_pages\000"
 .LASF233:
 	.ascii	"halt\000"
-.LASF653:
+.LASF654:
 	.ascii	"maxFreeBlockEraseCount\000"
 .LASF86:
 	.ascii	"ih_magic\000"
@@ -54738,7 +54884,7 @@ __func__.9940:
 	.ascii	"block_in_die\000"
 .LASF457:
 	.ascii	"gp_ect_tbl_info\000"
-.LASF654:
+.LASF655:
 	.ascii	"minDataBlockEraseCount\000"
 .LASF17:
 	.ascii	"ulong\000"
@@ -54750,25 +54896,25 @@ __func__.9940:
 	.ascii	"__u32\000"
 .LASF249:
 	.ascii	"net_server_ip\000"
-.LASF785:
+.LASF786:
 	.ascii	"INSERT_DATA_LIST\000"
 .LASF206:
 	.ascii	"UCLASS_USB_HUB\000"
-.LASF825:
+.LASF826:
 	.ascii	"sftl_write\000"
 .LASF444:
 	.ascii	"p_plane_order_table\000"
-.LASF781:
+.LASF782:
 	.ascii	"insert_data_list\000"
 .LASF70:
 	.ascii	"_datarelro_start_ofs\000"
-.LASF617:
+.LASF619:
 	.ascii	"ReInit\000"
 .LASF172:
 	.ascii	"UCLASS_MTD\000"
 .LASF134:
 	.ascii	"bootm_headers_t\000"
-.LASF729:
+.LASF730:
 	.ascii	"ec_mod_count\000"
 .LASF565:
 	.ascii	"spare\000"
@@ -54776,11 +54922,13 @@ __func__.9940:
 	.ascii	"g_recovery_page_num\000"
 .LASF15:
 	.ascii	"long int\000"
-.LASF667:
+.LASF668:
 	.ascii	"req_temp\000"
 .LASF141:
 	.ascii	"UCLASS_TEST_PROBE\000"
-.LASF659:
+.LASF883:
+	.ascii	"drivers/rkflash/rksftl/rk_sftl.c\000"
+.LASF660:
 	.ascii	"FtlSysBlkInit\000"
 .LASF524:
 	.ascii	"g_gc_head_data_block_count\000"
@@ -54796,9 +54944,9 @@ __func__.9940:
 	.ascii	"g_GlobalSysVersion\000"
 .LASF511:
 	.ascii	"g_tmp_data_superblock_id\000"
-.LASF871:
+.LASF872:
 	.ascii	"limit\000"
-.LASF660:
+.LASF661:
 	.ascii	"ftl_scan_all_data\000"
 .LASF331:
 	.ascii	"ftl_sys_blk_header\000"
@@ -54806,43 +54954,43 @@ __func__.9940:
 	.ascii	"flag\000"
 .LASF470:
 	.ascii	"p_vendor_block_table\000"
-.LASF679:
+.LASF680:
 	.ascii	"saved_active_plane\000"
-.LASF747:
+.LASF748:
 	.ascii	"hit_count\000"
-.LASF714:
+.LASF715:
 	.ascii	"FtlGcReFreshBadBlk\000"
 .LASF380:
 	.ascii	"current_page\000"
 .LASF201:
 	.ascii	"UCLASS_THERMAL\000"
-.LASF814:
+.LASF815:
 	.ascii	"FtlBbtCalcTotleCnt\000"
-.LASF786:
+.LASF787:
 	.ascii	"INSERT_FREE_LIST\000"
 .LASF563:
 	.ascii	"FlashGetBadBlockList\000"
-.LASF694:
+.LASF695:
 	.ascii	"prev_ppa_ver\000"
 .LASF246:
 	.ascii	"net_ethaddr\000"
 .LASF225:
 	.ascii	"in_addr\000"
-.LASF844:
+.LASF845:
 	.ascii	"FtlSysFlush\000"
 .LASF99:
 	.ascii	"image_info\000"
 .LASF88:
 	.ascii	"ih_time\000"
-.LASF607:
+.LASF610:
 	.ascii	"FtlGcRefreshBlock\000"
 .LASF334:
 	.ascii	"ftl_sys_save_info\000"
-.LASF771:
+.LASF772:
 	.ascii	"List_get_gc_head_node\000"
 .LASF399:
 	.ascii	"c_ftl_nand_planes_num\000"
-.LASF808:
+.LASF809:
 	.ascii	"FtlMakeBbt\000"
 .LASF37:
 	.ascii	"long double\000"
@@ -54854,13 +55002,13 @@ __func__.9940:
 	.ascii	"size_dt_strings\000"
 .LASF271:
 	.ascii	"uint16\000"
-.LASF603:
+.LASF606:
 	.ascii	"FtlGcFreeBadSuperBlk\000"
 .LASF106:
 	.ascii	"image_info_t\000"
-.LASF703:
+.LASF704:
 	.ascii	"pMapBlockInfo\000"
-.LASF616:
+.LASF618:
 	.ascii	"error_phy_page\000"
 .LASF2:
 	.ascii	"long unsigned int\000"
@@ -54880,15 +55028,15 @@ __func__.9940:
 	.ascii	"net_server_ethaddr\000"
 .LASF208:
 	.ascii	"UCLASS_VIDEO_BRIDGE\000"
-.LASF691:
+.LASF692:
 	.ascii	"function_exit\000"
 .LASF135:
 	.ascii	"images\000"
 .LASF525:
 	.ascii	"g_gc_skip_write_count\000"
-.LASF619:
+.LASF585:
 	.ascii	"rknand_print_hex\000"
-.LASF635:
+.LASF636:
 	.ascii	"FtlGcBufInit\000"
 .LASF446:
 	.ascii	"p_sys_data_buf_1\000"
@@ -54900,9 +55048,9 @@ __func__.9940:
 	.ascii	"fit_uname_os\000"
 .LASF500:
 	.ascii	"g_gc_bad_block_gc_index\000"
-.LASF692:
+.LASF693:
 	.ascii	"last_page_version\000"
-.LASF801:
+.LASF802:
 	.ascii	"pagePreBlk\000"
 .LASF281:
 	.ascii	"nand_type\000"
@@ -54918,7 +55066,7 @@ __func__.9940:
 	.ascii	"table\000"
 .LASF299:
 	.ascii	"page\000"
-.LASF642:
+.LASF643:
 	.ascii	"allocate_data_superblock\000"
 .LASF316:
 	.ascii	"ftl_l2p_ram_map_info\000"
@@ -54928,17 +55076,17 @@ __func__.9940:
 	.ascii	"net_loop_state\000"
 .LASF433:
 	.ascii	"gSysInfo\000"
-.LASF629:
+.LASF630:
 	.ascii	"prev_superblock_id\000"
 .LASF196:
 	.ascii	"UCLASS_SPMI\000"
-.LASF756:
+.LASF757:
 	.ascii	"minValidPageIndex\000"
-.LASF841:
+.LASF842:
 	.ascii	"last_lpa_nscts\000"
 .LASF194:
 	.ascii	"UCLASS_SERIAL\000"
-.LASF709:
+.LASF710:
 	.ascii	"FtlLoadSysInfo\000"
 .LASF440:
 	.ascii	"req_erase\000"
@@ -54950,25 +55098,25 @@ __func__.9940:
 	.ascii	"UCLASS_PHY\000"
 .LASF54:
 	.ascii	"bi_ddr_freq\000"
-.LASF858:
+.LASF859:
 	.ascii	"test_mode\000"
-.LASF827:
+.LASF828:
 	.ascii	"FtlDiscard\000"
-.LASF670:
+.LASF671:
 	.ascii	"FtlGcPageRecovery\000"
 .LASF105:
 	.ascii	"arch\000"
 .LASF510:
 	.ascii	"g_totle_read_page_count\000"
-.LASF710:
+.LASF711:
 	.ascii	"ftl_get_blk_mode\000"
-.LASF740:
+.LASF741:
 	.ascii	"ram_region_id\000"
 .LASF435:
 	.ascii	"gL2pMapInfo\000"
 .LASF322:
 	.ascii	"lastEc\000"
-.LASF842:
+.LASF843:
 	.ascii	"sector\000"
 .LASF558:
 	.ascii	"ftl_memcmp\000"
@@ -54976,27 +55124,27 @@ __func__.9940:
 	.ascii	"p_map_region_ppn_table\000"
 .LASF120:
 	.ascii	"fit_noffset_fdt\000"
-.LASF866:
+.LASF867:
 	.ascii	"FtlSysBlkNumInit\000"
-.LASF671:
+.LASF672:
 	.ascii	"Ftl_save_ext_data\000"
 .LASF116:
 	.ascii	"fit_uname_rd\000"
-.LASF648:
+.LASF649:
 	.ascii	"GetSwlReplaceBlock\000"
 .LASF359:
 	.ascii	"max_erase_count\000"
 .LASF475:
 	.ascii	"p_l2p_ram_map\000"
-.LASF633:
+.LASF634:
 	.ascii	"req_num\000"
 .LASF115:
 	.ascii	"fit_hdr_rd\000"
 .LASF268:
 	.ascii	"NETLOOP_FAIL\000"
-.LASF823:
+.LASF824:
 	.ascii	"FtlBbmIsBadBlock\000"
-.LASF666:
+.LASF667:
 	.ascii	"FtlSuperblockPowerLostFix\000"
 .LASF157:
 	.ascii	"UCLASS_FIRMWARE\000"
@@ -55020,7 +55168,7 @@ __func__.9940:
 	.ascii	"UCLASS_NORTHBRIDGE\000"
 .LASF422:
 	.ascii	"c_ftl_nand_data_blks_per_plane\000"
-.LASF615:
+.LASF617:
 	.ascii	"page_count\000"
 .LASF298:
 	.ascii	"ftl_bbt_info\000"
@@ -55030,7 +55178,7 @@ __func__.9940:
 	.ascii	"send\000"
 .LASF531:
 	.ascii	"g_power_lost_recovery_flag\000"
-.LASF589:
+.LASF592:
 	.ascii	"numPages\000"
 .LASF447:
 	.ascii	"p_vendor_data_buf\000"
@@ -55038,21 +55186,21 @@ __func__.9940:
 	.ascii	"read_page_count\000"
 .LASF234:
 	.ascii	"write_hwaddr\000"
-.LASF725:
+.LASF726:
 	.ascii	"FtlMapBlkWriteDump_data\000"
-.LASF834:
+.LASF835:
 	.ascii	"FtlCacheWriteBack\000"
-.LASF699:
+.LASF700:
 	.ascii	"FtlLoadMapInfo\000"
-.LASF807:
+.LASF808:
 	.ascii	"V2P_block\000"
-.LASF720:
+.LASF721:
 	.ascii	"pSysHeader\000"
-.LASF672:
+.LASF673:
 	.ascii	"SupperBlkListInit\000"
-.LASF706:
+.LASF707:
 	.ascii	"ppnTbl\000"
-.LASF846:
+.LASF847:
 	.ascii	"pNand\000"
 .LASF559:
 	.ascii	"ftl_memcpy\000"
@@ -55062,13 +55210,15 @@ __func__.9940:
 	.ascii	"g_totle_gc_page_count\000"
 .LASF24:
 	.ascii	"_binary_u_boot_bin_start\000"
-.LASF673:
+.LASF674:
 	.ascii	"num_data_node\000"
 .LASF400:
 	.ascii	"c_ftl_nand_blk_pre_plane\000"
+.LASF884:
+	.ascii	"/home/ldq/rk-linux/u-boot-release\000"
 .LASF64:
 	.ascii	"bd_t\000"
-.LASF705:
+.LASF706:
 	.ascii	"lastWritePage\000"
 .LASF91:
 	.ascii	"ih_ep\000"
@@ -55078,7 +55228,7 @@ __func__.9940:
 	.ascii	"fit_uname_fdt\000"
 .LASF187:
 	.ascii	"UCLASS_RAM\000"
-.LASF674:
+.LASF675:
 	.ascii	"num_free_node\000"
 .LASF379:
 	.ascii	"ftl_superblock_info\000"
@@ -55094,37 +55244,35 @@ __func__.9940:
 	.ascii	"UCLASS_INVALID\000"
 .LASF443:
 	.ascii	"g_req_cache\000"
-.LASF591:
+.LASF594:
 	.ascii	"gc_blk\000"
 .LASF277:
 	.ascii	"page_addr\000"
-.LASF864:
+.LASF865:
 	.ascii	"mem_size\000"
-.LASF857:
+.LASF858:
 	.ascii	"test_page_step\000"
-.LASF688:
+.LASF689:
 	.ascii	"read_super_page_end\000"
 .LASF368:
 	.ascii	"refresh_enable_mode\000"
-.LASF847:
+.LASF848:
 	.ascii	"load_bbt\000"
-.LASF860:
+.LASF861:
 	.ascii	"IsBlkInVendorPart\000"
 .LASF402:
 	.ascii	"c_ftl_nand_bbm_buf_size\000"
-.LASF782:
+.LASF783:
 	.ascii	"node_data_count\000"
 .LASF583:
 	.ascii	"width\000"
 .LASF39:
 	.ascii	"base\000"
-.LASF884:
+.LASF887:
 	.ascii	"sftl_get_density\000"
-.LASF181:
-	.ascii	"UCLASS_PINCONFIG\000"
-.LASF839:
+.LASF840:
 	.ascii	"first_lpa_sctidx\000"
-.LASF587:
+.LASF590:
 	.ascii	"rk_ftl_garbage_collect\000"
 .LASF328:
 	.ascii	"lastPpa\000"
@@ -55132,11 +55280,11 @@ __func__.9940:
 	.ascii	"fit_uname_cfg\000"
 .LASF344:
 	.ascii	"gcTempPageOffset\000"
-.LASF636:
+.LASF637:
 	.ascii	"decrement_vpc_count\000"
 .LASF386:
 	.ascii	"dump_writed\000"
-.LASF748:
+.LASF749:
 	.ascii	"flush_l2p_region\000"
 .LASF130:
 	.ascii	"cmdline_start\000"
@@ -55156,9 +55304,9 @@ __func__.9940:
 	.ascii	"long long unsigned int\000"
 .LASF274:
 	.ascii	"int16\000"
-.LASF848:
+.LASF849:
 	.ascii	"ftl_low_format\000"
-.LASF734:
+.LASF735:
 	.ascii	"offset\000"
 .LASF504:
 	.ascii	"g_gc_blk_index\000"
@@ -55166,15 +55314,15 @@ __func__.9940:
 	.ascii	"req_prgm\000"
 .LASF436:
 	.ascii	"gVendorBlkInfo\000"
-.LASF676:
+.LASF677:
 	.ascii	"FtlPowerLostRecovery\000"
 .LASF462:
 	.ascii	"p_valid_page_count_table\000"
-.LASF702:
+.LASF703:
 	.ascii	"FtlMapTblRecovery\000"
 .LASF156:
 	.ascii	"UCLASS_GPIO\000"
-.LASF869:
+.LASF870:
 	.ascii	"debug_flag\000"
 .LASF498:
 	.ascii	"g_gc_next_blk_1\000"
@@ -55182,19 +55330,19 @@ __func__.9940:
 	.ascii	"off_dt_strings\000"
 .LASF376:
 	.ascii	"sys_blk_queue\000"
-.LASF647:
+.LASF648:
 	.ascii	"free_data_superblock\000"
-.LASF859:
+.LASF860:
 	.ascii	"re_test_next_page\000"
 .LASF61:
 	.ascii	"bi_arch_number\000"
-.LASF749:
+.LASF750:
 	.ascii	"FtlMapWritePage\000"
-.LASF783:
+.LASF784:
 	.ascii	"tmp_data_count\000"
 .LASF26:
 	.ascii	"ide_bus_offset\000"
-.LASF739:
+.LASF740:
 	.ascii	"action\000"
 .LASF408:
 	.ascii	"c_ftl_nand_byte_pre_page\000"
@@ -55202,11 +55350,11 @@ __func__.9940:
 	.ascii	"UCLASS_COUNT\000"
 .LASF174:
 	.ascii	"UCLASS_NVME\000"
-.LASF643:
+.LASF644:
 	.ascii	"new_id\000"
 .LASF345:
 	.ascii	"cache_write_count\000"
-.LASF640:
+.LASF641:
 	.ascii	"new_ppa\000"
 .LASF258:
 	.ascii	"net_restart_wrap\000"
@@ -55236,19 +55384,19 @@ __func__.9940:
 	.ascii	"g_nand_ops\000"
 .LASF584:
 	.ascii	"ftl_malloc\000"
-.LASF840:
+.LASF841:
 	.ascii	"first_lpa_nscts\000"
 .LASF183:
 	.ascii	"UCLASS_PMIC\000"
 .LASF318:
 	.ascii	"L2PMap\000"
-.LASF765:
+.LASF766:
 	.ascii	"prev_node_id\000"
 .LASF454:
 	.ascii	"gp_gc_page_buf_info\000"
 .LASF509:
 	.ascii	"g_totle_discard_page_count\000"
-.LASF656:
+.LASF657:
 	.ascii	"max_ec\000"
 .LASF537:
 	.ascii	"gFtlInitStatus\000"
@@ -55256,11 +55404,11 @@ __func__.9940:
 	.ascii	"long long int\000"
 .LASF459:
 	.ascii	"p_erase_count_table\000"
-.LASF824:
+.LASF825:
 	.ascii	"FtlBbmMapBadBlock\000"
 .LASF427:
 	.ascii	"g_GlobalDataVersion\000"
-.LASF717:
+.LASF718:
 	.ascii	"block_in_plane\000"
 .LASF128:
 	.ascii	"initrd_start\000"
@@ -55268,21 +55416,23 @@ __func__.9940:
 	.ascii	"g_MaxLbaSector\000"
 .LASF382:
 	.ascii	"current_plane\000"
+.LASF880:
+	.ascii	"free\000"
 .LASF383:
 	.ascii	"num_planes\000"
-.LASF800:
+.LASF801:
 	.ascii	"spareBuf\000"
-.LASF730:
+.LASF731:
 	.ascii	"FtlVendorPartRead\000"
-.LASF723:
+.LASF724:
 	.ascii	"FtlWriteDump_data\000"
 .LASF197:
 	.ascii	"UCLASS_SPI_FLASH\000"
 .LASF202:
 	.ascii	"UCLASS_TIMER\000"
-.LASF798:
+.LASF799:
 	.ascii	"FtlGetLastWrittenPage\000"
-.LASF661:
+.LASF662:
 	.ascii	"pDataHeader\000"
 .LASF542:
 	.ascii	"power_up_flag\000"
@@ -55290,15 +55440,15 @@ __func__.9940:
 	.ascii	"inkDie_write_and_check_en\000"
 .LASF413:
 	.ascii	"c_ftl_nand_l2pmap_ram_region_num\000"
-.LASF843:
+.LASF844:
 	.ascii	"sftl_deinit\000"
-.LASF815:
+.LASF816:
 	.ascii	"totle_count\000"
 .LASF282:
 	.ascii	"die_num\000"
-.LASF750:
+.LASF751:
 	.ascii	"update_map_block\000"
-.LASF880:
+.LASF882:
 	.ascii	"GNU C11 6.3.1 20170404 -mthumb -mthumb-interwork -m"
 	.ascii	"abi=aapcs-linux -mword-relocations -mno-unaligned-a"
 	.ascii	"ccess -mfloat-abi=soft -march=armv7-a -mtune=cortex"
@@ -55309,7 +55459,7 @@ __func__.9940:
 	.ascii	"common -ffixed-r9\000"
 .LASF307:
 	.ascii	"maxRegion\000"
-.LASF680:
+.LASF681:
 	.ascii	"next_free_active_plane\000"
 .LASF491:
 	.ascii	"p_gc_page_info\000"
@@ -55323,13 +55473,13 @@ __func__.9940:
 	.ascii	"g_cur_erase_blk\000"
 .LASF184:
 	.ascii	"UCLASS_PWM\000"
-.LASF634:
+.LASF635:
 	.ascii	"FtlGcBufFree\000"
-.LASF774:
+.LASF775:
 	.ascii	"List_pop_index_node\000"
-.LASF690:
+.LASF691:
 	.ascii	"scan_completed\000"
-.LASF637:
+.LASF638:
 	.ascii	"update_vpc_list\000"
 .LASF170:
 	.ascii	"UCLASS_MMC\000"
@@ -55341,7 +55491,7 @@ __func__.9940:
 	.ascii	"res32_0\000"
 .LASF333:
 	.ascii	"res32_1\000"
-.LASF726:
+.LASF727:
 	.ascii	"FtlUpdateVaildLpn\000"
 .LASF390:
 	.ascii	"scr_ppa\000"
@@ -55351,43 +55501,43 @@ __func__.9940:
 	.ascii	"save_size\000"
 .LASF78:
 	.ascii	"version\000"
-.LASF652:
+.LASF653:
 	.ascii	"pNode\000"
-.LASF638:
+.LASF639:
 	.ascii	"get_new_active_ppa\000"
-.LASF878:
+.LASF879:
 	.ascii	"kmalloc\000"
 .LASF25:
 	.ascii	"_binary_u_boot_bin_end\000"
-.LASF595:
+.LASF598:
 	.ascii	"max_gc_page_num\000"
 .LASF8:
 	.ascii	"unsigned int\000"
-.LASF712:
+.LASF713:
 	.ascii	"FtlSlcSuperblockCheck\000"
 .LASF515:
 	.ascii	"g_totle_avg_erase_count\000"
-.LASF836:
+.LASF837:
 	.ascii	"flashType\000"
-.LASF789:
+.LASF790:
 	.ascii	"FtlFreeSysBLkSort\000"
-.LASF779:
+.LASF780:
 	.ascii	"tmp_erase_count\000"
 .LASF83:
 	.ascii	"working_fdt\000"
-.LASF862:
+.LASF863:
 	.ascii	"FtlVariablesInit\000"
 .LASF392:
 	.ascii	"ftl_gc_page_buffer\000"
 .LASF239:
 	.ascii	"push_packet\000"
-.LASF708:
+.LASF709:
 	.ascii	"pMapBlkHeader\000"
 .LASF82:
 	.ascii	"size_dt_struct\000"
 .LASF473:
 	.ascii	"p_vendor_region_ppn_table\000"
-.LASF675:
+.LASF676:
 	.ascii	"make_superblock\000"
 .LASF97:
 	.ascii	"ih_name\000"
@@ -55397,11 +55547,11 @@ __func__.9940:
 	.ascii	"bufferFlashMode\000"
 .LASF6:
 	.ascii	"short int\000"
-.LASF837:
+.LASF838:
 	.ascii	"FtlRead\000"
 .LASF74:
 	.ascii	"totalsize\000"
-.LASF757:
+.LASF758:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
 .LASF385:
 	.ascii	"check_en\000"
@@ -55411,7 +55561,7 @@ __func__.9940:
 	.ascii	"prev\000"
 .LASF423:
 	.ascii	"c_ftl_nand_data_op_blks_per_plane\000"
-.LASF650:
+.LASF651:
 	.ascii	"min_ec_id\000"
 .LASF388:
 	.ascii	"phyBlk\000"
@@ -55419,7 +55569,7 @@ __func__.9940:
 	.ascii	"net_boot_file_size\000"
 .LASF412:
 	.ascii	"c_ftl_nand_map_region_num\000"
-.LASF665:
+.LASF666:
 	.ascii	"FtlVpcCheckAndModify\000"
 .LASF127:
 	.ascii	"ft_len\000"
@@ -55431,3 +55581,4 @@ __func__.9940:
 	.ascii	"g_sys_save_data\000"
 .LASF124:
 	.ascii	"rd_start\000"
+	.hidden	free
diff --git a/drivers/rkflash/rk_sftl_arm_v8.S b/drivers/rkflash/rk_sftl_arm_v8.S
index ada1fa1a49..c2d0171805 100644
--- a/drivers/rkflash/rk_sftl_arm_v8.S
+++ b/drivers/rkflash/rk_sftl_arm_v8.S
@@ -2,8 +2,8 @@
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:	GPL-2.0
+ * date: 2018-06-20
  */
-
 	.arch armv8-a+nosimd
 	.file	"rk_sftl.c"
 	.text
@@ -13,65 +13,65 @@
 	.align	2
 	.type	l2p_addr_tran.isra.0, %function
 l2p_addr_tran.isra.0:
-.LFB348:
+.LFB349:
 	.file 1 "drivers/rkflash/rksftl/sftl_flash.c"
-	.loc 1 54 0
+	.loc 1 58 0
 	.cfi_startproc
 .LVL0:
-	.loc 1 62 0
+	.loc 1 66 0
 	adrp	x4, .LANCHOR0
 	add	x4, x4, :lo12:.LANCHOR0
 	ldrh	w3, [x4, 8]
 .LVL1:
-	.loc 1 63 0
+	.loc 1 67 0
 	ldrh	w6, [x4, 10]
 .LVL2:
-	.loc 1 64 0
+	.loc 1 68 0
 	ldrh	w4, [x4, 14]
 	cmp	w4, 4
 	bne	.L2
-	.loc 1 65 0
+	.loc 1 69 0
 	lsr	w3, w3, 1
 .LVL3:
-	.loc 1 66 0
+	.loc 1 70 0
 	ubfiz	w6, w6, 1, 15
 .LVL4:
 .L2:
-	.loc 1 70 0
+	.loc 1 74 0
 	lsr	w5, w0, 10
 .LVL5:
-	.loc 1 74 0
+	.loc 1 78 0
 	and	w0, w0, 1023
 .LVL6:
-	.loc 1 71 0
+	.loc 1 75 0
 	and	w4, w5, 65535
-	.loc 1 72 0
+	.loc 1 76 0
 	and	w5, w5, 65535
 .LVL7:
-	.loc 1 71 0
+	.loc 1 75 0
 	udiv	w4, w4, w3
 .LVL8:
-	.loc 1 72 0
+	.loc 1 76 0
 	msub	w3, w3, w4, w5
 .LVL9:
-	.loc 1 74 0
-	madd	w3, w3, w6, w0
 	.loc 1 78 0
+	madd	w3, w3, w6, w0
+	.loc 1 82 0
 	mov	w0, 0
-	.loc 1 74 0
+	.loc 1 78 0
 	str	w3, [x1]
-	.loc 1 75 0
+	.loc 1 79 0
 	str	w4, [x2]
-	.loc 1 78 0
+	.loc 1 82 0
 	ret
 	.cfi_endproc
-.LFE348:
+.LFE349:
 	.size	l2p_addr_tran.isra.0, .-l2p_addr_tran.isra.0
 	.section	.text.ftl_set_blk_mode.part.7,"ax",@progbits
 	.align	2
 	.type	ftl_set_blk_mode.part.7, %function
 ftl_set_blk_mode.part.7:
-.LFB355:
+.LFB356:
 	.file 2 "drivers/rkflash/rksftl/sftl_sys.c"
 	.loc 2 1346 0
 	.cfi_startproc
@@ -91,7 +91,7 @@ ftl_set_blk_mode.part.7:
 	str	w0, [x3, x1]
 	ret
 	.cfi_endproc
-.LFE355:
+.LFE356:
 	.size	ftl_set_blk_mode.part.7, .-ftl_set_blk_mode.part.7
 	.section	.text.Ftl_log2,"ax",@progbits
 	.align	2
@@ -472,8 +472,8 @@ IsBlkInVendorPart:
 	.loc 3 517 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR35]
 	cbz	w1, .L25
-.LBB164:
-.LBB165:
+.LBB166:
+.LBB167:
 	.loc 3 518 0
 	adrp	x1, .LANCHOR27
 	ldrh	w2, [x1, #:lo12:.LANCHOR27]
@@ -488,8 +488,8 @@ IsBlkInVendorPart:
 	bhi	.L24
 .LVL36:
 .L25:
-.LBE165:
-.LBE164:
+.LBE167:
+.LBE166:
 	.loc 3 524 0
 	mov	w0, 0
 .LVL37:
@@ -498,8 +498,8 @@ IsBlkInVendorPart:
 .L24:
 	add	x1, x1, 1
 .LVL39:
-.LBB167:
-.LBB166:
+.LBB169:
+.LBB168:
 	.loc 3 519 0
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4, -2]
@@ -507,8 +507,8 @@ IsBlkInVendorPart:
 	bne	.L23
 	.loc 3 520 0
 	mov	w0, 1
-.LBE166:
-.LBE167:
+.LBE168:
+.LBE169:
 	.loc 3 525 0
 	ret
 	.cfi_endproc
@@ -520,9 +520,9 @@ IsBlkInVendorPart:
 	.type	sftl_get_density, %function
 sftl_get_density:
 .LFB221:
-	.loc 3 1215 0
+	.loc 3 1214 0
 	.cfi_startproc
-	.loc 3 1217 0
+	.loc 3 1216 0
 	adrp	x0, .LANCHOR34
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	ret
@@ -1028,21 +1028,21 @@ IsInFreeQueue:
 	.loc 2 147 0
 	.cfi_startproc
 .LVL96:
-.LBB168:
-.LBB169:
+.LBB170:
+.LBB171:
 	.loc 2 94 0
 	adrp	x1, .LANCHOR38
 	add	x1, x1, :lo12:.LANCHOR38
-.LBE169:
-.LBE168:
+.LBE171:
+.LBE170:
 	.loc 2 147 0
 	and	w0, w0, 65535
-.LBB171:
-.LBB170:
+.LBB173:
+.LBB172:
 	.loc 2 94 0
 	ldrh	w4, [x1, 6]
-.LBE170:
-.LBE171:
+.LBE172:
+.LBE173:
 	.loc 2 152 0
 	cmp	w4, 1024
 	beq	.L65
@@ -1091,18 +1091,18 @@ FtlFreeSysBlkQueueOut:
 	.loc 2 165 0
 	.cfi_startproc
 .LVL103:
-.LBB172:
-.LBB173:
+.LBB174:
+.LBB175:
 	.loc 2 89 0
 	adrp	x1, .LANCHOR38
 	add	x1, x1, :lo12:.LANCHOR38
 	ldrh	w3, [x1, 6]
-.LBE173:
-.LBE172:
+.LBE175:
+.LBE174:
 	.loc 2 168 0
 	cbz	w3, .L69
 .LVL104:
-.LBB174:
+.LBB176:
 	.loc 2 170 0
 	ldrh	w2, [x1, 2]
 	.loc 2 171 0
@@ -1120,7 +1120,7 @@ FtlFreeSysBlkQueueOut:
 	ret
 .LVL106:
 .L69:
-.LBE174:
+.LBE176:
 	.loc 2 166 0
 	mov	w0, 65535
 .LVL107:
@@ -1352,8 +1352,8 @@ INSERT_DATA_LIST:
 	.cfi_restore 30
 	.cfi_restore 29
 	.cfi_def_cfa 31, 0
-.LBB177:
-.LBB178:
+.LBB179:
+.LBB180:
 	.loc 2 189 0
 	mov	w2, 189
 	adrp	x1, .LANCHOR46
@@ -1364,8 +1364,8 @@ INSERT_DATA_LIST:
 .LVL139:
 .L86:
 	.cfi_restore_state
-.LBE178:
-.LBE177:
+.LBE180:
+.LBE179:
 	.loc 2 190 0
 	ldp	x29, x30, [sp], 16
 	.cfi_restore 30
@@ -1531,8 +1531,8 @@ INSERT_FREE_LIST:
 	.cfi_restore 30
 	.cfi_restore 29
 	.cfi_def_cfa 31, 0
-.LBB181:
-.LBB182:
+.LBB183:
+.LBB184:
 	.loc 2 182 0
 	mov	w2, 182
 	adrp	x1, .LANCHOR49
@@ -1543,8 +1543,8 @@ INSERT_FREE_LIST:
 .LVL159:
 .L96:
 	.cfi_restore_state
-.LBE182:
-.LBE181:
+.LBE184:
+.LBE183:
 	.loc 2 183 0
 	ldp	x29, x30, [sp], 16
 	.cfi_restore 30
@@ -1907,8 +1907,8 @@ List_update_data_list:
 	cmp	w0, w19
 	beq	.L126
 .LVL200:
-.LBB185:
-.LBB186:
+.LBB187:
+.LBB188:
 	.loc 2 416 0 is_stmt 1
 	adrp	x2, .LANCHOR41
 	mov	w1, 6
@@ -2016,8 +2016,8 @@ List_update_data_list:
 	bl	INSERT_DATA_LIST
 .LVL215:
 .L126:
-.LBE186:
-.LBE185:
+.LBE188:
+.LBE187:
 	.loc 2 439 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
@@ -2068,8 +2068,8 @@ ftl_map_blk_alloc_new_blk:
 	bne	.L137
 .L138:
 .LVL220:
-.LBB189:
-.LBB190:
+.LBB191:
+.LBB192:
 	.loc 2 532 0 is_stmt 1
 	mov	w2, 532
 	adrp	x1, .LANCHOR55
@@ -2081,8 +2081,8 @@ ftl_map_blk_alloc_new_blk:
 	b	.L139
 .LVL222:
 .L137:
-.LBE190:
-.LBE189:
+.LBE192:
+.LBE191:
 	.loc 2 521 0
 	mov	x6, x0
 	ldrh	w2, [x0], 2
@@ -2300,32 +2300,32 @@ FtlUpdateVaildLpn:
 	.loc 2 894 0 is_stmt 1
 	ret
 .L156:
-.LBB193:
-.LBB194:
+.LBB195:
+.LBB196:
 	.loc 2 888 0
 	adrp	x1, .LANCHOR5
-.LBE194:
-.LBE193:
+.LBE196:
+.LBE195:
 	.loc 2 887 0
 	adrp	x0, .LANCHOR60
 .LVL251:
 	.loc 2 886 0
 	strh	wzr, [x3, #:lo12:.LANCHOR59]
+.LBB199:
 .LBB197:
-.LBB195:
 	.loc 2 890 0
 	mov	w2, 0
 	.loc 2 888 0
 	ldrh	w5, [x1, #:lo12:.LANCHOR5]
 	.loc 2 890 0
 	adrp	x1, .LANCHOR43
-.LBE195:
 .LBE197:
+.LBE199:
 	.loc 2 887 0
 	str	wzr, [x0, #:lo12:.LANCHOR60]
 .LVL252:
+.LBB200:
 .LBB198:
-.LBB196:
 	.loc 2 890 0
 	mov	w3, 0
 	ldr	x6, [x1, #:lo12:.LANCHOR43]
@@ -2353,8 +2353,8 @@ FtlUpdateVaildLpn:
 	add	x1, x1, 1
 .LVL255:
 	b	.L157
-.LBE196:
 .LBE198:
+.LBE200:
 	.cfi_endproc
 .LFE266:
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
@@ -2515,8 +2515,8 @@ FtlSlcSuperblockCheck:
 	cmp	w2, w1
 	beq	.L175
 .LVL271:
-.LBB201:
-.LBB202:
+.LBB203:
+.LBB204:
 	.loc 2 2020 0
 	ldrb	w2, [x0, 6]
 	add	x2, x2, 8
@@ -2557,8 +2557,8 @@ FtlSlcSuperblockCheck:
 	ldrh	w3, [x0, x1, lsl 1]
 .LVL275:
 	b	.L178
-.LBE202:
-.LBE201:
+.LBE204:
+.LBE203:
 	.cfi_endproc
 .LFE282:
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
@@ -3657,7 +3657,7 @@ FtlPrintInfo2buf:
 	add	x19, x19, x0, sxtw
 .LVL454:
 .L214:
-.LBB203:
+.LBB205:
 	.loc 3 87 0
 	mov	w0, 0
 	.loc 3 91 0
@@ -3714,8 +3714,8 @@ FtlPrintInfo2buf:
 	.loc 3 88 0 discriminator 2
 	bne	.L216
 .L215:
-.LBE203:
-.LBB204:
+.LBE205:
+.LBB206:
 	.loc 3 96 0
 	adrp	x0, .LANCHOR47
 	.loc 3 100 0
@@ -3772,7 +3772,7 @@ FtlPrintInfo2buf:
 	ldr	x0, [x20, #:lo12:.LANCHOR41]
 	ldrh	w3, [x0, x24]
 	b	.L218
-.LBE204:
+.LBE206:
 	.cfi_endproc
 .LFE200:
 	.size	FtlPrintInfo2buf, .-FtlPrintInfo2buf
@@ -4128,26 +4128,26 @@ free_data_superblock:
 	.cfi_def_cfa_offset 16
 	.cfi_offset 29, -16
 	.cfi_offset 30, -8
-.LBB207:
-.LBB208:
+.LBB209:
+.LBB210:
 	.loc 2 2525 0
 	adrp	x2, .LANCHOR43
 	ubfiz	x1, x0, 1, 16
-.LBE208:
-.LBE207:
+.LBE210:
+.LBE209:
 	.loc 2 2522 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-.LBB210:
-.LBB209:
+.LBB212:
+.LBB211:
 	.loc 2 2525 0
 	ldr	x2, [x2, #:lo12:.LANCHOR43]
 	strh	wzr, [x2, x1]
 	.loc 2 2526 0
 	bl	INSERT_FREE_LIST
 .LVL504:
-.LBE209:
-.LBE210:
+.LBE211:
+.LBE212:
 	.loc 2 2528 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
@@ -4929,8 +4929,8 @@ FtlGcReFreshBadBlk:
 	.loc 5 382 0
 	strh	wzr, [x19, #:lo12:.LANCHOR105]
 .L317:
-.LBB213:
-.LBB214:
+.LBB215:
+.LBB216:
 	.loc 5 383 0
 	ldrh	w1, [x19, #:lo12:.LANCHOR105]
 	adrp	x0, .LANCHOR104
@@ -4944,8 +4944,8 @@ FtlGcReFreshBadBlk:
 	ldrh	w0, [x19, #:lo12:.LANCHOR105]
 	add	w0, w0, 1
 	strh	w0, [x19, #:lo12:.LANCHOR105]
-.LBE214:
-.LBE213:
+.LBE216:
+.LBE215:
 	.loc 5 387 0
 	mov	w0, 0
 	ldr	x19, [sp, 16]
@@ -4961,32 +4961,52 @@ FtlGcReFreshBadBlk:
 	.cfi_endproc
 .LFE316:
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
+	.section	.text.ftl_free,"ax",@progbits
+	.align	2
+	.global	ftl_free
+	.type	ftl_free, %function
+ftl_free:
+.LFB337:
+	.loc 1 24 0
+	.cfi_startproc
+.LVL578:
+.LBB217:
+.LBB218:
+	.file 6 "include/linux/compat.h"
+	.loc 6 80 0
+	b	free
+.LVL579:
+.LBE218:
+.LBE217:
+	.cfi_endproc
+.LFE337:
+	.size	ftl_free, .-ftl_free
 	.section	.text.ftl_malloc,"ax",@progbits
 	.align	2
 	.global	ftl_malloc
 	.type	ftl_malloc, %function
 ftl_malloc:
-.LFB337:
-	.loc 1 24 0
+.LFB338:
+	.loc 1 28 0
 	.cfi_startproc
-.LVL578:
-	.loc 1 25 0
+.LVL580:
+	.loc 1 29 0
 	mov	w1, 0
 	sxtw	x0, w0
 	b	kmalloc
-.LVL579:
+.LVL581:
 	.cfi_endproc
-.LFE337:
+.LFE338:
 	.size	ftl_malloc, .-ftl_malloc
 	.section	.text.rknand_print_hex,"ax",@progbits
 	.align	2
 	.global	rknand_print_hex
 	.type	rknand_print_hex, %function
 rknand_print_hex:
-.LFB338:
-	.loc 1 29 0
+.LFB339:
+	.loc 1 33 0
 	.cfi_startproc
-.LVL580:
+.LVL582:
 	stp	x29, x30, [sp, -96]!
 	.cfi_def_cfa_offset 96
 	.cfi_offset 29, -96
@@ -4997,13 +5017,13 @@ rknand_print_hex:
 	.cfi_offset 21, -64
 	.cfi_offset 22, -56
 	mov	x22, x1
-.LVL581:
+.LVL583:
 	stp	x23, x24, [sp, 48]
 	.cfi_offset 23, -48
 	.cfi_offset 24, -40
-	.loc 1 38 0
+	.loc 1 42 0
 	adrp	x24, .LC75
-	.loc 1 29 0
+	.loc 1 33 0
 	stp	x25, x26, [sp, 64]
 	mov	w23, w2
 	stp	x27, x28, [sp, 80]
@@ -5011,47 +5031,47 @@ rknand_print_hex:
 	.cfi_offset 26, -24
 	.cfi_offset 27, -16
 	.cfi_offset 28, -8
-	.loc 1 45 0
+	.loc 1 49 0
 	adrp	x25, .LC77
-	.loc 1 29 0
+	.loc 1 33 0
 	mov	x28, x0
 	mov	w27, w3
-	.loc 1 38 0
+	.loc 1 42 0
 	add	x24, x24, :lo12:.LC75
-	.loc 1 45 0
+	.loc 1 49 0
 	add	x25, x25, :lo12:.LC77
-	.loc 1 29 0
+	.loc 1 33 0
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -80
 	.cfi_offset 20, -72
-	.loc 1 36 0
+	.loc 1 40 0
 	mov	w21, 0
 	mov	x19, 0
-	.loc 1 35 0
+	.loc 1 39 0
 	mov	w20, 0
-	.loc 1 43 0
+	.loc 1 47 0
 	adrp	x26, .LC76
-.LVL582:
-.L327:
-	.loc 1 36 0 discriminator 1
+.LVL584:
+.L328:
+	.loc 1 40 0 discriminator 1
 	cmp	w27, w19
-	bhi	.L333
-	.loc 1 52 0
+	bhi	.L334
+	.loc 1 56 0
 	ldp	x19, x20, [sp, 16]
-.LVL583:
-	.loc 1 51 0
+.LVL585:
+	.loc 1 55 0
 	adrp	x0, .LC78
-	.loc 1 52 0
+	.loc 1 56 0
 	ldp	x21, x22, [sp, 32]
-.LVL584:
-	.loc 1 51 0
+.LVL586:
+	.loc 1 55 0
 	add	x0, x0, :lo12:.LC78
-	.loc 1 52 0
+	.loc 1 56 0
 	ldp	x23, x24, [sp, 48]
-.LVL585:
+.LVL587:
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-.LVL586:
+.LVL588:
 	ldp	x29, x30, [sp], 96
 	.cfi_remember_state
 	.cfi_restore 30
@@ -5067,104 +5087,104 @@ rknand_print_hex:
 	.cfi_restore 19
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
-	.loc 1 51 0
+	.loc 1 55 0
 	b	printf
-.LVL587:
-.L333:
+.LVL589:
+.L334:
 	.cfi_restore_state
-	.loc 1 37 0
-	cbnz	w20, .L328
-	.loc 1 38 0
+	.loc 1 41 0
+	cbnz	w20, .L329
+	.loc 1 42 0
 	mov	w2, w21
 	mov	x1, x28
 	mov	x0, x24
 	bl	printf
-.LVL588:
-.L328:
-	.loc 1 40 0
+.LVL590:
+.L329:
+	.loc 1 44 0
 	cmp	w23, 4
-	bne	.L329
-	.loc 1 41 0
+	bne	.L330
+	.loc 1 45 0
 	ldr	w1, [x22, x19, lsl 2]
-.L336:
-	.loc 1 43 0
+.L337:
+	.loc 1 47 0
 	add	x0, x26, :lo12:.LC76
-.L335:
-	.loc 1 45 0
+.L336:
+	.loc 1 49 0
 	bl	printf
-.LVL589:
-	.loc 1 46 0
+.LVL591:
+	.loc 1 50 0
 	add	w20, w20, 1
-.LVL590:
+.LVL592:
 	cmp	w20, 15
-	bls	.L332
-.LVL591:
-	.loc 1 47 0
+	bls	.L333
+.LVL593:
+	.loc 1 51 0
 	mov	w20, 0
-	.loc 1 48 0
+	.loc 1 52 0
 	adrp	x0, .LC78
 	add	x0, x0, :lo12:.LC78
 	bl	printf
-.LVL592:
-.L332:
+.LVL594:
+.L333:
 	add	x19, x19, 1
-.LVL593:
+.LVL595:
 	add	w21, w21, w23
-	b	.L327
-.LVL594:
-.L329:
-	.loc 1 42 0
+	b	.L328
+.LVL596:
+.L330:
+	.loc 1 46 0
 	cmp	w23, 2
-	bne	.L331
-	.loc 1 43 0
+	bne	.L332
+	.loc 1 47 0
 	ldrsh	w1, [x22, x19, lsl 1]
-	b	.L336
-.L331:
-	.loc 1 45 0
+	b	.L337
+.L332:
+	.loc 1 49 0
 	ldrb	w1, [x22, x19]
 	mov	x0, x25
-	b	.L335
+	b	.L336
 	.cfi_endproc
-.LFE338:
+.LFE339:
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.FlashReadPages,"ax",@progbits
 	.align	2
 	.global	FlashReadPages
 	.type	FlashReadPages, %function
 FlashReadPages:
-.LFB340:
-	.loc 1 81 0
+.LFB341:
+	.loc 1 85 0
 	.cfi_startproc
-.LVL595:
+.LVL597:
 	stp	x29, x30, [sp, -96]!
 	.cfi_def_cfa_offset 96
 	.cfi_offset 29, -96
 	.cfi_offset 30, -88
-	.loc 1 83 0
+	.loc 1 87 0
 	adrp	x2, .LANCHOR0
-.LVL596:
+.LVL598:
 	add	x3, x2, :lo12:.LANCHOR0
 	ubfiz	x1, x1, 5, 32
-.LVL597:
-	.loc 1 81 0
+.LVL599:
+	.loc 1 85 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	str	x25, [sp, 64]
 	.cfi_offset 25, -32
-	.loc 1 83 0
+	.loc 1 87 0
 	ldrh	w25, [x3, 12]
-.LVL598:
-	.loc 1 81 0
+.LVL600:
+	.loc 1 85 0
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -64
 	.cfi_offset 22, -56
-	.loc 1 88 0
+	.loc 1 92 0
 	adrp	x21, .LANCHOR106
-	.loc 1 81 0
+	.loc 1 85 0
 	stp	x23, x24, [sp, 48]
-	.loc 1 88 0
+	.loc 1 92 0
 	adrp	x22, .LC1
-	.loc 1 81 0
+	.loc 1 85 0
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 23, -48
 	.cfi_offset 24, -40
@@ -5173,21 +5193,21 @@ FlashReadPages:
 	add	x24, x0, x1
 	mov	x19, x0
 	mov	x23, x2
-	.loc 1 88 0
+	.loc 1 92 0
 	add	x21, x21, :lo12:.LANCHOR106
 	add	x22, x22, :lo12:.LC1
-.LVL599:
-.L338:
-	.loc 1 87 0 discriminator 1
+.LVL601:
+.L339:
+	.loc 1 91 0 discriminator 1
 	cmp	x19, x24
-	bne	.L345
-	.loc 1 108 0
+	bne	.L346
+	.loc 1 112 0
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
-.LVL600:
+.LVL602:
 	ldp	x29, x30, [sp], 96
 	.cfi_remember_state
 	.cfi_restore 30
@@ -5201,49 +5221,49 @@ FlashReadPages:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL601:
-.L345:
+.LVL603:
+.L346:
 	.cfi_restore_state
-	.loc 1 88 0
+	.loc 1 92 0
 	ldr	x0, [x19, 8]
-	cbz	x0, .L339
-	.loc 1 88 0 is_stmt 0 discriminator 2
+	cbz	x0, .L340
+	.loc 1 92 0 is_stmt 0 discriminator 2
 	ldr	x0, [x19, 16]
-	cbnz	x0, .L340
-.L339:
-	.loc 1 88 0 discriminator 3
-	mov	w2, 88
+	cbnz	x0, .L341
+.L340:
+	.loc 1 92 0 discriminator 3
+	mov	w2, 92
 	mov	x1, x21
 	mov	x0, x22
 	bl	printf
-.LVL602:
-.L340:
-	.loc 1 89 0 is_stmt 1
+.LVL604:
+.L341:
+	.loc 1 93 0 is_stmt 1
 	ldr	w0, [x19, 4]
-	.loc 1 90 0
+	.loc 1 94 0
 	adrp	x20, .LANCHOR107
 	add	x20, x20, :lo12:.LANCHOR107
-	.loc 1 89 0
+	.loc 1 93 0
 	add	x2, x29, 88
 	add	x1, x29, 92
 	bl	l2p_addr_tran.isra.0
-.LVL603:
-	.loc 1 90 0
+.LVL605:
+	.loc 1 94 0
 	ldrb	w0, [x29, 88]
 	ldr	w1, [x29, 92]
 	ldp	x2, x3, [x19, 8]
 	ldr	x4, [x20, 24]
 	blr	x4
-.LVL604:
-	.loc 1 94 0
+.LVL606:
+	.loc 1 98 0
 	str	w0, [x19]
-	.loc 1 95 0
+	.loc 1 99 0
 	add	x0, x23, :lo12:.LANCHOR0
-.LVL605:
+.LVL607:
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
-	bne	.L342
-	.loc 1 96 0
+	bne	.L343
+	.loc 1 100 0
 	ldrb	w0, [x29, 88]
 	ldr	x4, [x20, 24]
 	ldp	x2, x3, [x19, 8]
@@ -5252,34 +5272,34 @@ FlashReadPages:
 	add	x2, x2, 2048
 	add	w1, w25, w1
 	blr	x4
-.LVL606:
-	.loc 1 100 0
+.LVL608:
+	.loc 1 104 0
 	cmn	w0, #1
-	beq	.L343
-	.loc 1 101 0 discriminator 1
+	beq	.L344
+	.loc 1 105 0 discriminator 1
 	ldr	x0, [x19, 16]
-.LVL607:
-	.loc 1 100 0 discriminator 1
+.LVL609:
+	.loc 1 104 0 discriminator 1
 	ldr	w1, [x0, 12]
 	cmn	w1, #1
-	bne	.L342
-	.loc 1 101 0
+	bne	.L343
+	.loc 1 105 0
 	ldr	w1, [x0, 8]
 	cmn	w1, #1
-	bne	.L342
-	.loc 1 102 0
+	bne	.L343
+	.loc 1 106 0
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L342
-.L343:
-	.loc 1 104 0
+	beq	.L343
+.L344:
+	.loc 1 108 0
 	mov	w0, -1
 	str	w0, [x19]
-.L342:
+.L343:
 	add	x19, x19, 32
-	b	.L338
+	b	.L339
 	.cfi_endproc
-.LFE340:
+.LFE341:
 	.size	FlashReadPages, .-FlashReadPages
 	.section	.text.FtlLoadFactoryBbt,"ax",@progbits
 	.align	2
@@ -5343,20 +5363,20 @@ FtlLoadFactoryBbt:
 	mov	w27, -1
 	.loc 4 287 0
 	str	x25, [x1, 16]
-.LVL608:
-.L357:
+.LVL610:
+.L358:
 	.loc 4 289 0 discriminator 1
 	ldrh	w0, [x23]
 	cmp	w21, w0
-	bcc	.L362
+	bcc	.L363
 	.loc 4 314 0
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
-.LVL609:
+.LVL611:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-.LVL610:
+.LVL612:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	.cfi_remember_state
@@ -5374,8 +5394,8 @@ FtlLoadFactoryBbt:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL611:
-.L362:
+.LVL613:
+.L363:
 	.cfi_restore_state
 	.loc 4 291 0
 	ldrh	w19, [x26, #:lo12:.LANCHOR17]
@@ -5388,19 +5408,19 @@ FtlLoadFactoryBbt:
 	.loc 4 291 0
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.LVL612:
-.L358:
+.LVL614:
+.L359:
 	.loc 4 291 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x28]
 	sub	w1, w0, #15
 	cmp	w1, w19
-	bgt	.L360
+	bgt	.L361
 	.loc 4 292 0 is_stmt 1
 	madd	w0, w0, w21, w19
 	.loc 4 294 0
 	mov	w2, 1
 	str	w3, [x29, 108]
-.LVL613:
+.LVL615:
 	mov	w1, w2
 	.loc 4 292 0
 	lsl	w0, w0, 10
@@ -5409,31 +5429,31 @@ FtlLoadFactoryBbt:
 	.loc 4 294 0
 	mov	x0, x24
 	bl	FlashReadPages
-.LVL614:
+.LVL616:
 	.loc 4 295 0
 	ldr	w0, [x24]
 	ldr	w3, [x29, 108]
 	cmn	w0, #1
-	beq	.L359
+	beq	.L360
 	.loc 4 301 0
 	ldrh	w0, [x25]
 	cmp	w0, w3
-	bne	.L359
+	bne	.L360
 	.loc 4 303 0
 	strh	w19, [x20]
-.L360:
+.L361:
 	.loc 4 289 0 discriminator 2
 	add	w21, w21, 1
-.LVL615:
+.LVL617:
 	add	x20, x20, 2
-	b	.L357
-.L359:
+	b	.L358
+.L360:
 	.loc 4 291 0 discriminator 2
 	sub	w19, w19, #1
-.LVL616:
+.LVL618:
 	and	w19, w19, 65535
-.LVL617:
-	b	.L358
+.LVL619:
+	b	.L359
 	.cfi_endproc
 .LFE230:
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
@@ -5445,7 +5465,7 @@ FtlGetLastWrittenPage:
 .LFB236:
 	.loc 2 47 0
 	.cfi_startproc
-.LVL618:
+.LVL620:
 	stp	x29, x30, [sp, -160]!
 	.cfi_def_cfa_offset 160
 	.cfi_offset 29, -160
@@ -5466,16 +5486,16 @@ FtlGetLastWrittenPage:
 	.cfi_offset 21, -128
 	.cfi_offset 22, -120
 	.loc 2 51 0
-	bne	.L368
+	bne	.L369
 	.loc 2 51 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR20
-.LVL619:
+.LVL621:
 	ldrh	w19, [x1, #:lo12:.LANCHOR20]
-.L369:
-.LVL620:
+.L370:
+.LVL622:
 	.loc 2 56 0 is_stmt 1 discriminator 4
 	sub	w19, w19, #1
-.LVL621:
+.LVL623:
 	.loc 2 53 0 discriminator 4
 	adrp	x1, ftl_temp_buf
 	.loc 2 56 0 discriminator 4
@@ -5488,7 +5508,7 @@ FtlGetLastWrittenPage:
 	str	x1, [x29, 72]
 	.loc 2 57 0 discriminator 4
 	orr	w0, w19, w21
-.LVL622:
+.LVL624:
 	.loc 2 54 0 discriminator 4
 	add	x1, x29, 96
 	.loc 2 57 0 discriminator 4
@@ -5497,33 +5517,33 @@ FtlGetLastWrittenPage:
 	mov	w2, w23
 	.loc 2 54 0 discriminator 4
 	str	x1, [x29, 80]
-.LVL623:
+.LVL625:
 	.loc 2 58 0 discriminator 4
 	add	x0, x29, 64
 	mov	w1, 1
 	bl	FlashReadPages
-.LVL624:
+.LVL626:
 	.loc 2 59 0 discriminator 4
 	ldr	w0, [x29, 96]
 	cmn	w0, #1
-	bne	.L370
+	bne	.L371
 	mov	w22, 0
 	.loc 2 61 0
 	mov	w24, 2
-.LVL625:
-.L371:
+.LVL627:
+.L372:
 	.loc 2 60 0
 	cmp	w22, w19
-	ble	.L374
-.LVL626:
-.L370:
+	ble	.L375
+.LVL628:
+.L371:
 	.loc 2 73 0
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
-.LVL627:
+.LVL629:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL628:
+.LVL630:
 	ldp	x29, x30, [sp], 160
 	.cfi_remember_state
 	.cfi_restore 30
@@ -5536,16 +5556,16 @@ FtlGetLastWrittenPage:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL629:
-.L368:
+.LVL631:
+.L369:
 	.cfi_restore_state
 	.loc 2 51 0 discriminator 2
 	adrp	x1, .LANCHOR19
-.LVL630:
+.LVL632:
 	ldrh	w19, [x1, #:lo12:.LANCHOR19]
-	b	.L369
-.LVL631:
-.L374:
+	b	.L370
+.LVL633:
+.L375:
 	.loc 2 61 0
 	add	w20, w22, w19
 	.loc 2 63 0
@@ -5553,7 +5573,7 @@ FtlGetLastWrittenPage:
 	mov	w1, 1
 	.loc 2 61 0
 	sdiv	w20, w20, w24
-.LVL632:
+.LVL634:
 	.loc 2 62 0
 	sxth	w0, w20
 	orr	w0, w0, w21
@@ -5561,28 +5581,28 @@ FtlGetLastWrittenPage:
 	.loc 2 63 0
 	add	x0, x29, 64
 	bl	FlashReadPages
-.LVL633:
+.LVL635:
 	.loc 2 65 0
 	ldr	w0, [x29, 96]
 	cmn	w0, #1
-	bne	.L372
+	bne	.L373
 	.loc 2 65 0 is_stmt 0 discriminator 1
 	ldr	w0, [x29, 100]
 	cmn	w0, #1
-	bne	.L372
+	bne	.L373
 	.loc 2 66 0 is_stmt 1
 	sub	w19, w20, #1
-.LVL634:
+.LVL636:
 	sxth	w19, w19
-.LVL635:
-	b	.L371
-.L372:
+.LVL637:
+	b	.L372
+.L373:
 	.loc 2 68 0
 	add	w20, w20, 1
-.LVL636:
+.LVL638:
 	sxth	w22, w20
-.LVL637:
-	b	.L371
+.LVL639:
+	b	.L372
 	.cfi_endproc
 .LFE236:
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
@@ -5591,16 +5611,16 @@ FtlGetLastWrittenPage:
 	.global	FlashProgPages
 	.type	FlashProgPages, %function
 FlashProgPages:
-.LFB341:
-	.loc 1 111 0
+.LFB342:
+	.loc 1 115 0
 	.cfi_startproc
-.LVL638:
+.LVL640:
 	stp	x29, x30, [sp, -144]!
 	.cfi_def_cfa_offset 144
 	.cfi_offset 29, -144
 	.cfi_offset 30, -136
 	ubfiz	x1, x1, 5, 32
-.LVL639:
+.LVL641:
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x25, x26, [sp, 64]
@@ -5608,12 +5628,12 @@ FlashProgPages:
 	.cfi_offset 26, -72
 	mov	w25, w2
 	mov	w26, w3
-	.loc 1 113 0
+	.loc 1 117 0
 	adrp	x2, .LANCHOR0
-.LVL640:
+.LVL642:
 	add	x3, x2, :lo12:.LANCHOR0
-.LVL641:
-	.loc 1 111 0
+.LVL643:
+	.loc 1 115 0
 	stp	x27, x28, [sp, 80]
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 27, -64
@@ -5622,45 +5642,45 @@ FlashProgPages:
 	.cfi_offset 20, -120
 	mov	x20, x0
 	stp	x21, x22, [sp, 32]
-	.loc 1 117 0
+	.loc 1 121 0
 	mov	x19, x0
-	.loc 1 113 0
+	.loc 1 117 0
 	ldrh	w27, [x3, 12]
-.LVL642:
+.LVL644:
 	.cfi_offset 21, -112
 	.cfi_offset 22, -104
-	.loc 1 118 0
+	.loc 1 122 0
 	adrp	x21, .LANCHOR110
-	.loc 1 111 0
+	.loc 1 115 0
 	stp	x23, x24, [sp, 48]
 	.cfi_offset 23, -96
 	.cfi_offset 24, -88
-	.loc 1 120 0
+	.loc 1 124 0
 	adrp	x22, .LANCHOR107
 	add	x24, x0, x1
 	mov	x23, x2
-	.loc 1 118 0
+	.loc 1 122 0
 	add	x21, x21, :lo12:.LANCHOR110
-	.loc 1 129 0
+	.loc 1 133 0
 	add	x28, x22, :lo12:.LANCHOR107
-.LVL643:
-.L377:
-	.loc 1 117 0 discriminator 1
+.LVL645:
+.L378:
+	.loc 1 121 0 discriminator 1
 	cmp	x19, x24
-	bne	.L385
-	.loc 1 138 0
-	cbnz	w26, .L386
-.LVL644:
-.L404:
-	.loc 1 168 0
+	bne	.L386
+	.loc 1 142 0
+	cbnz	w26, .L387
+.LVL646:
+.L405:
+	.loc 1 172 0
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-.LVL645:
+.LVL647:
 	ldp	x27, x28, [sp, 80]
-.LVL646:
+.LVL648:
 	ldp	x29, x30, [sp], 144
 	.cfi_remember_state
 	.cfi_restore 30
@@ -5677,50 +5697,50 @@ FlashProgPages:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL647:
-.L385:
+.LVL649:
+.L386:
 	.cfi_restore_state
-	.loc 1 118 0
+	.loc 1 122 0
 	ldr	x0, [x19, 8]
-	cbz	x0, .L378
-	.loc 1 118 0 is_stmt 0 discriminator 2
+	cbz	x0, .L379
+	.loc 1 122 0 is_stmt 0 discriminator 2
 	ldr	x0, [x19, 16]
-	cbnz	x0, .L379
-.L378:
-	.loc 1 118 0 discriminator 3
+	cbnz	x0, .L380
+.L379:
+	.loc 1 122 0 discriminator 3
 	adrp	x0, .LC1
-	mov	w2, 118
+	mov	w2, 122
 	mov	x1, x21
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL648:
-.L379:
-	.loc 1 119 0 is_stmt 1
+.LVL650:
+.L380:
+	.loc 1 123 0 is_stmt 1
 	ldr	w0, [x19, 4]
 	add	x2, x29, 104
 	add	x1, x29, 108
 	bl	l2p_addr_tran.isra.0
-.LVL649:
-	.loc 1 120 0
+.LVL651:
+	.loc 1 124 0
 	add	x0, x22, :lo12:.LANCHOR107
 	ldr	w1, [x29, 108]
 	ldp	x2, x3, [x19, 8]
 	ldr	x4, [x0, 16]
 	ldrb	w0, [x29, 104]
 	blr	x4
-.LVL650:
-	.loc 1 125 0
-	cbnz	w0, .L380
-	.loc 1 124 0
-	str	wzr, [x19]
-.LVL651:
-.L381:
+.LVL652:
+	.loc 1 129 0
+	cbnz	w0, .L381
 	.loc 1 128 0
+	str	wzr, [x19]
+.LVL653:
+.L382:
+	.loc 1 132 0
 	add	x0, x23, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
-	bne	.L383
-	.loc 1 129 0
+	bne	.L384
+	.loc 1 133 0
 	ldrb	w0, [x29, 104]
 	ldr	x4, [x28, 16]
 	ldp	x2, x3, [x19, 8]
@@ -5729,145 +5749,145 @@ FlashProgPages:
 	add	x2, x2, 2048
 	add	w1, w27, w1
 	blr	x4
-.LVL652:
-	.loc 1 133 0
-	cbz	w0, .L383
-	.loc 1 134 0
-	mov	w0, -1
-.LVL653:
-	str	w0, [x19]
-.L383:
-	add	x19, x19, 32
-	b	.L377
 .LVL654:
-.L380:
-	.loc 1 126 0
+	.loc 1 137 0
+	cbz	w0, .L384
+	.loc 1 138 0
 	mov	w0, -1
 .LVL655:
 	str	w0, [x19]
-	b	.L381
+.L384:
+	add	x19, x19, 32
+	b	.L378
 .LVL656:
-.L390:
-.LBB215:
-	.loc 1 143 0
+.L381:
+	.loc 1 130 0
+	mov	w0, -1
+.LVL657:
+	str	w0, [x19]
+	b	.L382
+.LVL658:
+.L391:
+.LBB219:
+	.loc 1 147 0
 	str	wzr, [x22]
-	.loc 1 149 0
+	.loc 1 153 0
 	mov	w2, w25
-	.loc 1 144 0
+	.loc 1 148 0
 	str	wzr, [x24]
-	.loc 1 149 0
+	.loc 1 153 0
 	mov	w1, 1
-	.loc 1 147 0
+	.loc 1 151 0
 	stp	x22, x24, [x29, 120]
-	.loc 1 145 0
+	.loc 1 149 0
 	ldr	w0, [x20, 4]
 	str	w0, [x29, 116]
-	.loc 1 149 0
+	.loc 1 153 0
 	add	x0, x29, 112
 	bl	FlashReadPages
-.LVL657:
-	.loc 1 150 0
+.LVL659:
+	.loc 1 154 0
 	ldr	w26, [x29, 112]
 	cmn	w26, #1
-	bne	.L387
-	.loc 1 151 0
+	bne	.L388
+	.loc 1 155 0
 	ldr	w1, [x20, 4]
 	adrp	x0, .LC79
 	add	x0, x0, :lo12:.LC79
 	bl	printf
-.LVL658:
-	.loc 1 152 0
+.LVL660:
+	.loc 1 156 0
 	str	w26, [x20]
-.L387:
-	.loc 1 154 0
+.L388:
+	.loc 1 158 0
 	ldr	x0, [x20, 16]
-	cbz	x0, .L388
-	.loc 1 155 0
+	cbz	x0, .L389
+	.loc 1 159 0
 	ldr	w3, [x23, #:lo12:.LANCHOR111]
 	ldr	w2, [x0]
 	cmp	w2, w3
-	beq	.L388
-	.loc 1 156 0
+	beq	.L389
+	.loc 1 160 0
 	ldr	w1, [x20, 4]
 	adrp	x0, .LC80
 	add	x0, x0, :lo12:.LC80
 	bl	printf
-.LVL659:
-	.loc 1 157 0
+.LVL661:
+	.loc 1 161 0
 	mov	w0, -1
 	str	w0, [x20]
-.L388:
-	.loc 1 160 0
+.L389:
+	.loc 1 164 0
 	ldr	x0, [x20, 8]
-	cbz	x0, .L389
-	.loc 1 161 0
+	cbz	x0, .L390
+	.loc 1 165 0
 	ldr	w3, [x21, #:lo12:check_buf]
 	ldr	w2, [x0]
 	cmp	w2, w3
-	beq	.L389
-	.loc 1 162 0
+	beq	.L390
+	.loc 1 166 0
 	ldr	w1, [x20, 4]
 	adrp	x0, .LC81
 	add	x0, x0, :lo12:.LC81
 	bl	printf
-.LVL660:
-	.loc 1 163 0
+.LVL662:
+	.loc 1 167 0
 	mov	w0, -1
 	str	w0, [x20]
-.L389:
+.L390:
 	add	x20, x20, 32
-.L405:
-.LBE215:
-	.loc 1 140 0 discriminator 1
+.L406:
+.LBE219:
+	.loc 1 144 0 discriminator 1
 	cmp	x20, x19
-	bne	.L390
-	b	.L404
-.LVL661:
-.L386:
-.LBB216:
-	.loc 1 143 0 discriminator 1
+	bne	.L391
+	b	.L405
+.LVL663:
+.L387:
+.LBB220:
+	.loc 1 147 0 discriminator 1
 	adrp	x21, check_buf
-	.loc 1 144 0 discriminator 1
+	.loc 1 148 0 discriminator 1
 	adrp	x23, .LANCHOR111
-	.loc 1 143 0 discriminator 1
+	.loc 1 147 0 discriminator 1
 	add	x22, x21, :lo12:check_buf
-	.loc 1 144 0 discriminator 1
+	.loc 1 148 0 discriminator 1
 	add	x24, x23, :lo12:.LANCHOR111
-	b	.L405
-.LBE216:
+	b	.L406
+.LBE220:
 	.cfi_endproc
-.LFE341:
+.LFE342:
 	.size	FlashProgPages, .-FlashProgPages
 	.section	.text.FlashEraseBlocks,"ax",@progbits
 	.align	2
 	.global	FlashEraseBlocks
 	.type	FlashEraseBlocks, %function
 FlashEraseBlocks:
-.LFB342:
-	.loc 1 171 0
+.LFB343:
+	.loc 1 175 0
 	.cfi_startproc
-.LVL662:
+.LVL664:
 	stp	x29, x30, [sp, -80]!
 	.cfi_def_cfa_offset 80
 	.cfi_offset 29, -80
 	.cfi_offset 30, -72
-	.loc 1 174 0
+	.loc 1 178 0
 	adrp	x1, .LANCHOR0
-.LVL663:
+.LVL665:
 	add	x3, x1, :lo12:.LANCHOR0
 	ubfiz	x2, x2, 5, 32
-.LVL664:
-	.loc 1 171 0
+.LVL666:
+	.loc 1 175 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x23, x24, [sp, 48]
 	add	x2, x2, 4
 	.cfi_offset 23, -32
 	.cfi_offset 24, -24
-	.loc 1 174 0
+	.loc 1 178 0
 	ldrh	w23, [x3, 12]
-.LVL665:
-	.loc 1 171 0
+.LVL667:
+	.loc 1 175 0
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -64
 	.cfi_offset 20, -56
@@ -5876,22 +5896,22 @@ FlashEraseBlocks:
 	.cfi_offset 21, -48
 	.cfi_offset 22, -40
 	mov	x20, x1
-	.loc 1 179 0
+	.loc 1 183 0
 	adrp	x21, .LANCHOR107
 	add	x22, x0, x2
-	.loc 1 184 0
+	.loc 1 188 0
 	add	x24, x21, :lo12:.LANCHOR107
-.LVL666:
-.L408:
-	.loc 1 177 0 discriminator 1
+.LVL668:
+.L409:
+	.loc 1 181 0 discriminator 1
 	cmp	x19, x22
-	bne	.L414
-	.loc 1 190 0
+	bne	.L415
+	.loc 1 194 0
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL667:
+.LVL669:
 	ldp	x29, x30, [sp], 80
 	.cfi_remember_state
 	.cfi_restore 30
@@ -5904,58 +5924,58 @@ FlashEraseBlocks:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL668:
-.L414:
+.LVL670:
+.L415:
 	.cfi_restore_state
-	.loc 1 178 0
+	.loc 1 182 0
 	ldr	w0, [x19]
 	add	x2, x29, 72
 	add	x1, x29, 76
 	bl	l2p_addr_tran.isra.0
-.LVL669:
-	.loc 1 179 0
+.LVL671:
+	.loc 1 183 0
 	add	x0, x21, :lo12:.LANCHOR107
 	ldr	w1, [x29, 76]
 	ldr	x2, [x0, 8]
 	ldrb	w0, [x29, 72]
 	blr	x2
-.LVL670:
-	.loc 1 181 0
-	cbnz	w0, .L409
-	.loc 1 180 0
+.LVL672:
+	.loc 1 185 0
+	cbnz	w0, .L410
+	.loc 1 184 0
 	str	wzr, [x19, -4]
-.LVL671:
-.L410:
-	.loc 1 183 0
+.LVL673:
+.L411:
+	.loc 1 187 0
 	add	x0, x20, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
-	bne	.L412
-	.loc 1 184 0
+	bne	.L413
+	.loc 1 188 0
 	ldrb	w0, [x29, 72]
 	ldr	x2, [x24, 8]
 	ldr	w1, [x29, 76]
 	add	w1, w23, w1
 	blr	x2
-.LVL672:
-	.loc 1 185 0
-	cbz	w0, .L412
-	.loc 1 186 0
+.LVL674:
+	.loc 1 189 0
+	cbz	w0, .L413
+	.loc 1 190 0
 	mov	w0, -1
-.LVL673:
+.LVL675:
 	str	w0, [x19, -4]
-.L412:
+.L413:
 	add	x19, x19, 32
-	b	.L408
-.LVL674:
-.L409:
-	.loc 1 182 0
+	b	.L409
+.LVL676:
+.L410:
+	.loc 1 186 0
 	mov	w0, -1
-.LVL675:
+.LVL677:
 	str	w0, [x19, -4]
-	b	.L410
+	b	.L411
 	.cfi_endproc
-.LFE342:
+.LFE343:
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
 	.section	.text.FtlFreeSysBlkQueueIn,"ax",@progbits
 	.align	2
@@ -5965,7 +5985,7 @@ FtlFreeSysBlkQueueIn:
 .LFB240:
 	.loc 2 98 0
 	.cfi_startproc
-.LVL676:
+.LVL678:
 	stp	x29, x30, [sp, -48]!
 	.cfi_def_cfa_offset 48
 	.cfi_offset 29, -48
@@ -5975,14 +5995,14 @@ FtlFreeSysBlkQueueIn:
 	str	x21, [sp, 32]
 	.cfi_offset 21, -16
 	and	w21, w0, 65535
-.LBB217:
-.LBB218:
+.LBB221:
+.LBB222:
 	.loc 2 94 0
 	adrp	x0, .LANCHOR38
-.LVL677:
+.LVL679:
 	add	x2, x0, :lo12:.LANCHOR38
-.LBE218:
-.LBE217:
+.LBE222:
+.LBE221:
 	.loc 2 98 0
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -32
@@ -5990,23 +6010,23 @@ FtlFreeSysBlkQueueIn:
 	.loc 2 99 0
 	ldrh	w2, [x2, 6]
 	cmp	w2, 1024
-	beq	.L419
+	beq	.L420
 	and	w1, w1, 65535
 	mov	x19, x0
-.LVL678:
-.LBB219:
+.LVL680:
+.LBB223:
 	.loc 2 101 0
-	cbz	w1, .L421
-.LBB220:
+	cbz	w1, .L422
+.LBB224:
 	.loc 2 102 0
 	mov	w0, w21
 	bl	P2V_block_in_plane
-.LVL679:
+.LVL681:
 	and	w20, w0, 65535
-.LVL680:
+.LVL682:
 	.loc 2 103 0
 	adrp	x0, .LANCHOR112
-.LVL681:
+.LVL683:
 	lsl	w1, w21, 10
 	.loc 2 104 0
 	mov	w2, 1
@@ -6016,7 +6036,7 @@ FtlFreeSysBlkQueueIn:
 	.loc 2 104 0
 	mov	w1, w2
 	bl	FlashEraseBlocks
-.LVL682:
+.LVL684:
 	.loc 2 105 0
 	adrp	x1, .LANCHOR40
 	ubfiz	x0, x20, 1, 16
@@ -6029,9 +6049,9 @@ FtlFreeSysBlkQueueIn:
 	ldr	w0, [x1, #:lo12:.LANCHOR76]
 	add	w0, w0, 1
 	str	w0, [x1, #:lo12:.LANCHOR76]
-.LVL683:
-.L421:
-.LBE220:
+.LVL685:
+.L422:
+.LBE224:
 	.loc 2 108 0
 	add	x0, x19, :lo12:.LANCHOR38
 	ldrh	w1, [x0, 6]
@@ -6046,13 +6066,13 @@ FtlFreeSysBlkQueueIn:
 	strh	w1, [x0, 4]
 	.loc 2 109 0
 	strh	w21, [x2, 8]
-.LVL684:
-.L419:
-.LBE219:
+.LVL686:
+.L420:
+.LBE223:
 	.loc 2 113 0
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
-.LVL685:
+.LVL687:
 	ldp	x29, x30, [sp], 48
 	.cfi_restore 30
 	.cfi_restore 29
@@ -6072,7 +6092,7 @@ FtlLowFormatEraseBlock:
 .LFB209:
 	.loc 3 528 0
 	.cfi_startproc
-.LVL686:
+.LVL688:
 	stp	x29, x30, [sp, -144]!
 	.cfi_def_cfa_offset 144
 	.cfi_offset 29, -144
@@ -6091,19 +6111,19 @@ FtlLowFormatEraseBlock:
 	and	w24, w0, 65535
 	.loc 3 538 0
 	adrp	x0, .LANCHOR113
-.LVL687:
+.LVL689:
 	.loc 3 528 0
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	and	w23, w1, 255
 	.loc 3 538 0
 	str	w24, [x0, #:lo12:.LANCHOR113]
-.LVL688:
+.LVL690:
 	.loc 3 551 0
 	adrp	x0, .LANCHOR115
 	.loc 3 550 0
 	adrp	x1, .LANCHOR114
-.LVL689:
+.LVL691:
 	.cfi_offset 19, -128
 	.cfi_offset 20, -120
 	.cfi_offset 21, -112
@@ -6135,59 +6155,59 @@ FtlLowFormatEraseBlock:
 	.cfi_offset 27, -64
 	.cfi_offset 28, -56
 	stp	x0, x1, [x29, 120]
-.LVL690:
-.L430:
+.LVL692:
+.L431:
 	.loc 3 539 0 discriminator 1
 	cmp	w8, w5, uxth
-	bhi	.L434
+	bhi	.L435
 	.loc 3 559 0
-	cbz	w22, .L429
+	cbz	w22, .L430
 	.loc 3 562 0
 	mov	w2, w22
 	ubfiz	x22, x22, 5, 16
-.LVL691:
+.LVL693:
 	mov	x25, 0
 	mov	w1, 0
 	mov	x0, x6
 	bl	FlashEraseBlocks
-.LVL692:
-.L438:
+.LVL694:
+.L439:
 	.loc 3 564 0
 	ldr	x0, [x21, #:lo12:.LANCHOR112]
 	add	x1, x0, x25
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	bne	.L437
+	bne	.L438
 	.loc 3 566 0
 	ldr	w0, [x1, 4]
 	.loc 3 565 0
 	add	w19, w19, 1
-.LVL693:
+.LVL695:
 	and	w19, w19, 65535
-.LVL694:
+.LVL696:
 	.loc 3 566 0
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.LVL695:
-.L437:
+.LVL697:
+.L438:
 	add	x25, x25, 32
 	.loc 3 563 0 discriminator 2
 	cmp	x25, x22
-	bne	.L438
+	bne	.L439
 	.loc 3 571 0
-	cbz	w23, .L451
-.LVL696:
+	cbz	w23, .L452
+.LVL698:
 	.loc 3 573 0
 	adrp	x0, .LANCHOR20
 	.loc 3 572 0
 	mov	w25, 1
 	.loc 3 573 0
 	ldrh	w26, [x0, #:lo12:.LANCHOR20]
-.LVL697:
+.LVL699:
 	.loc 3 574 0
 	lsr	w28, w26, 2
-.LVL698:
-.L439:
+.LVL700:
+.L440:
 	.loc 3 578 0
 	add	x0, x20, :lo12:.LANCHOR3
 	.loc 3 580 0
@@ -6198,8 +6218,8 @@ FtlLowFormatEraseBlock:
 	.loc 3 580 0
 	add	x0, x27, :lo12:.LANCHOR13
 	str	x0, [x29, 112]
-.LVL699:
-.L447:
+.LVL701:
+.L448:
 	.loc 3 578 0
 	ldr	x0, [x29, 136]
 	mov	x5, 0
@@ -6217,94 +6237,94 @@ FtlLowFormatEraseBlock:
 	ldr	x10, [x0, #:lo12:.LANCHOR114]
 	ldr	x0, [x29, 120]
 	ldrh	w11, [x0, #:lo12:.LANCHOR24]
-.LVL700:
-.L440:
+.LVL702:
+.L441:
 	.loc 3 578 0 discriminator 1
 	cmp	w7, w5, uxth
-	bhi	.L443
+	bhi	.L444
 	.loc 3 593 0
-	cbz	w20, .L429
+	cbz	w20, .L430
 	.loc 3 596 0
 	mov	w1, w20
 	mov	w3, 1
 	mov	w2, w25
 	mov	x0, x6
 	bl	FlashProgPages
-.LVL701:
+.LVL703:
 	mov	x27, 0
 	ubfiz	x1, x20, 5, 16
-.LVL702:
-.L446:
+.LVL704:
+.L447:
 	.loc 3 598 0
 	ldr	x0, [x21, #:lo12:.LANCHOR112]
 	add	x3, x0, x27
 	ldr	w0, [x0, x27]
-	cbz	w0, .L445
+	cbz	w0, .L446
 	.loc 3 600 0
 	ldr	w0, [x3, 4]
 	.loc 3 599 0
 	add	w19, w19, 1
-.LVL703:
+.LVL705:
 	str	x1, [x29, 104]
 	and	w19, w19, 65535
-.LVL704:
+.LVL706:
 	.loc 3 600 0
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.LVL705:
+.LVL707:
 	ldr	x1, [x29, 104]
-.L445:
+.L446:
 	add	x27, x27, 32
 	.loc 3 597 0 discriminator 2
 	cmp	x1, x27
-	bne	.L446
+	bne	.L447
 	.loc 3 604 0
 	add	w22, w22, w28
-.LVL706:
+.LVL708:
 	and	w22, w22, 65535
-.LVL707:
+.LVL709:
 	.loc 3 605 0
 	cmp	w26, w22
-	bhi	.L447
+	bhi	.L448
 	mov	x22, 0
-.LVL708:
-.L449:
+.LVL710:
+.L450:
 	.loc 3 611 0
-	cbz	w23, .L448
+	cbz	w23, .L449
 	.loc 3 611 0 is_stmt 0 discriminator 1
 	ldr	x0, [x21, #:lo12:.LANCHOR112]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
-	cbnz	w0, .L448
+	cbnz	w0, .L449
 	.loc 3 612 0 is_stmt 1
 	ldr	w0, [x1, 4]
 	mov	w1, 1
 	lsr	w0, w0, 10
 	bl	FtlFreeSysBlkQueueIn
-.LVL709:
-.L448:
+.LVL711:
+.L449:
 	add	x22, x22, 32
 	.loc 3 610 0 discriminator 2
 	cmp	x22, x27
-	bne	.L449
+	bne	.L450
 	.loc 3 615 0
 	cmp	w24, 63
 	ccmp	w23, 0, 0, hi
-	beq	.L429
+	beq	.L430
 	.loc 3 616 0
 	ldr	x0, [x21, #:lo12:.LANCHOR112]
 	mov	w2, w20
 	mov	w1, w25
 	bl	FlashEraseBlocks
-.LVL710:
-.L429:
+.LVL712:
+.L430:
 	.loc 3 619 0
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
-.LVL711:
+.LVL713:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL712:
+.LVL714:
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
@@ -6323,8 +6343,8 @@ FtlLowFormatEraseBlock:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL713:
-.L434:
+.LVL715:
+.L435:
 	.cfi_restore_state
 	.loc 3 540 0
 	lsl	x0, x5, 5
@@ -6335,22 +6355,22 @@ FtlLowFormatEraseBlock:
 	.loc 3 541 0
 	ldrb	w0, [x7, x5]
 	bl	V2P_block
-.LVL714:
+.LVL716:
 	and	w13, w0, 65535
 	mov	w14, w13
-.LVL715:
+.LVL717:
 	.loc 3 543 0
-	cbz	w23, .L431
+	cbz	w23, .L432
 	.loc 3 544 0
 	bl	IsBlkInVendorPart
-.LVL716:
-	cbnz	w0, .L432
-.L431:
+.LVL718:
+	cbnz	w0, .L433
+.L432:
 	.loc 3 548 0
 	mov	w0, w14
 	bl	FtlBbmIsBadBlock
-.LVL717:
-	cbnz	w0, .L433
+.LVL719:
+	cbnz	w0, .L434
 	.loc 3 549 0
 	ubfiz	x0, x22, 5, 16
 	.loc 3 551 0
@@ -6359,12 +6379,12 @@ FtlLowFormatEraseBlock:
 	add	x0, x6, x0
 	.loc 3 552 0
 	add	w22, w22, 1
-.LVL718:
+.LVL720:
 	and	w22, w22, 65535
-.LVL719:
+.LVL721:
 	.loc 3 549 0
 	lsl	w13, w13, 10
-.LVL720:
+.LVL722:
 	.loc 3 551 0
 	asr	w1, w1, 2
 	add	x1, x11, x1, sxtw 2
@@ -6372,30 +6392,30 @@ FtlLowFormatEraseBlock:
 	str	w13, [x0, 4]
 	.loc 3 551 0
 	stp	x10, x1, [x0, 8]
-.L432:
-.LVL721:
-	add	x5, x5, 1
-.LVL722:
-	b	.L430
-.LVL723:
 .L433:
-	.loc 3 554 0
-	add	w19, w19, 1
+.LVL723:
+	add	x5, x5, 1
 .LVL724:
-	and	w19, w19, 65535
+	b	.L431
 .LVL725:
-	b	.L432
+.L434:
+	.loc 3 554 0
+	add	w19, w19, 1
 .LVL726:
-.L451:
+	and	w19, w19, 65535
+.LVL727:
+	b	.L433
+.LVL728:
+.L452:
 	.loc 3 534 0
 	mov	w25, 0
 	.loc 3 533 0
 	mov	w28, 6
 	.loc 3 531 0
 	mov	w26, 1
-	b	.L439
-.LVL727:
-.L443:
+	b	.L440
+.LVL729:
+.L444:
 	.loc 3 579 0
 	lsl	x0, x5, 5
 	.loc 3 580 0
@@ -6406,22 +6426,22 @@ FtlLowFormatEraseBlock:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0, x5]
 	bl	V2P_block
-.LVL728:
+.LVL730:
 	and	w12, w0, 65535
 	mov	w13, w12
-.LVL729:
+.LVL731:
 	.loc 3 581 0
-	cbz	w23, .L441
+	cbz	w23, .L442
 	.loc 3 582 0
 	bl	IsBlkInVendorPart
-.LVL730:
-	cbnz	w0, .L442
-.L441:
+.LVL732:
+	cbnz	w0, .L443
+.L442:
 	.loc 3 585 0
 	mov	w0, w13
 	bl	FtlBbmIsBadBlock
-.LVL731:
-	cbnz	w0, .L442
+.LVL733:
+	cbnz	w0, .L443
 	.loc 3 586 0
 	ubfiz	x0, x20, 5, 16
 	.loc 3 588 0
@@ -6430,12 +6450,12 @@ FtlLowFormatEraseBlock:
 	add	x0, x6, x0
 	.loc 3 589 0
 	add	w20, w20, 1
-.LVL732:
+.LVL734:
 	and	w20, w20, 65535
-.LVL733:
+.LVL735:
 	.loc 3 586 0
 	add	w12, w22, w12, lsl 10
-.LVL734:
+.LVL736:
 	.loc 3 588 0
 	asr	w1, w1, 2
 	add	x1, x10, x1, sxtw 2
@@ -6443,11 +6463,11 @@ FtlLowFormatEraseBlock:
 	str	w12, [x0, 4]
 	.loc 3 588 0
 	stp	x8, x1, [x0, 8]
-.L442:
-.LVL735:
+.L443:
+.LVL737:
 	add	x5, x5, 1
-.LVL736:
-	b	.L440
+.LVL738:
+	b	.L441
 	.cfi_endproc
 .LFE209:
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
@@ -6456,16 +6476,16 @@ FtlLowFormatEraseBlock:
 	.global	ftl_memset
 	.type	ftl_memset, %function
 ftl_memset:
-.LFB345:
-	.loc 1 238 0
+.LFB346:
+	.loc 1 242 0
 	.cfi_startproc
-.LVL737:
-	.loc 1 239 0
+.LVL739:
+	.loc 1 243 0
 	uxtw	x2, w2
 	b	memset
-.LVL738:
+.LVL740:
 	.cfi_endproc
-.LFE345:
+.LFE346:
 	.size	ftl_memset, .-ftl_memset
 	.section	.text.FtlMemInit,"ax",@progbits
 	.align	2
@@ -6615,7 +6635,7 @@ FtlMemInit:
 	ldrh	w0, [x19, #:lo12:.LANCHOR21]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-.LVL739:
+.LVL741:
 	adrp	x1, .LANCHOR98
 	str	x0, [x1, #:lo12:.LANCHOR98]
 	.loc 3 311 0
@@ -6623,7 +6643,7 @@ FtlMemInit:
 	ldrh	w1, [x19, #:lo12:.LANCHOR21]
 	mul	w0, w1, w0
 	bl	ftl_malloc
-.LVL740:
+.LVL742:
 	.loc 3 312 0
 	ldrh	w19, [x22, #:lo12:.LANCHOR3]
 	.loc 3 311 0
@@ -6631,7 +6651,7 @@ FtlMemInit:
 	str	x3, [x29, 104]
 	.loc 3 312 0
 	lsl	w20, w19, 5
-.LVL741:
+.LVL743:
 	.loc 3 313 0
 	lsl	w19, w19, 7
 	.loc 3 311 0
@@ -6639,43 +6659,43 @@ FtlMemInit:
 	.loc 3 313 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL742:
+.LVL744:
 	adrp	x15, .LANCHOR120
 	str	x15, [x29, 112]
 	str	x0, [x15, #:lo12:.LANCHOR120]
 	.loc 3 314 0
 	mov	w0, w20
 	bl	ftl_malloc
-.LVL743:
+.LVL745:
 	adrp	x11, .LANCHOR121
 	str	x11, [x29, 120]
 	str	x0, [x11, #:lo12:.LANCHOR121]
 	.loc 3 315 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL744:
+.LVL746:
 	adrp	x14, .LANCHOR122
 	str	x14, [x29, 128]
 	str	x0, [x14, #:lo12:.LANCHOR122]
 	.loc 3 316 0
 	mov	w0, w20
 	bl	ftl_malloc
-.LVL745:
+.LVL747:
 	adrp	x13, .LANCHOR112
 	str	x13, [x29, 136]
 	str	x0, [x13, #:lo12:.LANCHOR112]
 	.loc 3 317 0
 	mov	w0, w20
 	bl	ftl_malloc
-.LVL746:
+.LVL748:
 	.loc 3 320 0
 	adrp	x20, .LANCHOR96
-.LVL747:
+.LVL749:
 	.loc 3 317 0
 	adrp	x12, .LANCHOR95
 	.loc 3 319 0
 	ldrh	w19, [x21, #:lo12:.LANCHOR23]
-.LVL748:
+.LVL750:
 	.loc 3 317 0
 	str	x12, [x29, 144]
 	str	x0, [x12, #:lo12:.LANCHOR95]
@@ -6687,21 +6707,21 @@ FtlMemInit:
 	.loc 3 321 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL749:
+.LVL751:
 	adrp	x10, .LANCHOR39
 	str	x10, [x29, 152]
 	str	x0, [x10, #:lo12:.LANCHOR39]
 	.loc 3 322 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL750:
+.LVL752:
 	adrp	x8, .LANCHOR123
 	str	x8, [x29, 160]
 	str	x0, [x8, #:lo12:.LANCHOR123]
 	.loc 3 323 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL751:
+.LVL753:
 	adrp	x7, .LANCHOR124
 	str	x7, [x29, 168]
 	str	x0, [x7, #:lo12:.LANCHOR124]
@@ -6709,24 +6729,24 @@ FtlMemInit:
 	ldr	w0, [x20, #:lo12:.LANCHOR96]
 	mul	w0, w19, w0
 	bl	ftl_malloc
-.LVL752:
+.LVL754:
 	adrp	x6, .LANCHOR93
 	str	x6, [x29, 176]
 	str	x0, [x6, #:lo12:.LANCHOR93]
 	.loc 3 325 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL753:
+.LVL755:
 	adrp	x5, .LANCHOR116
 	str	x5, [x29, 184]
 	str	x0, [x5, #:lo12:.LANCHOR116]
 	.loc 3 326 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL754:
+.LVL756:
 	.loc 3 329 0
 	adrp	x19, .LANCHOR24
-.LVL755:
+.LVL757:
 	.loc 3 326 0
 	adrp	x4, .LANCHOR114
 	.loc 3 327 0
@@ -6738,7 +6758,7 @@ FtlMemInit:
 	mov	w0, 24
 	mul	w0, w2, w0
 	bl	ftl_malloc
-.LVL756:
+.LVL758:
 	.loc 3 329 0
 	ldrh	w28, [x19, #:lo12:.LANCHOR24]
 	.loc 3 327 0
@@ -6750,22 +6770,22 @@ FtlMemInit:
 	adrp	x22, .LANCHOR94
 	.loc 3 329 0
 	mul	w28, w28, w0
-.LVL757:
+.LVL759:
 	.loc 3 330 0
 	mov	w0, w28
 	bl	ftl_malloc
-.LVL758:
+.LVL760:
 	str	x0, [x24, #:lo12:.LANCHOR109]
 	.loc 3 331 0
 	lsl	w0, w28, 2
 	bl	ftl_malloc
-.LVL759:
+.LVL761:
 	str	x0, [x23, #:lo12:.LANCHOR115]
 	.loc 3 332 0
 	ldrh	w1, [x19, #:lo12:.LANCHOR24]
 	.loc 3 335 0
 	adrp	x28, .LANCHOR125
-.LVL760:
+.LVL762:
 	.loc 3 332 0
 	ldr	w0, [x20, #:lo12:.LANCHOR96]
 	.loc 3 335 0
@@ -6773,7 +6793,7 @@ FtlMemInit:
 	.loc 3 332 0
 	mul	w0, w1, w0
 	bl	ftl_malloc
-.LVL761:
+.LVL763:
 	str	x0, [x22, #:lo12:.LANCHOR94]
 	.loc 3 335 0
 	ldrh	w0, [x20, #:lo12:.LANCHOR6]
@@ -6782,7 +6802,7 @@ FtlMemInit:
 	.loc 3 336 0
 	and	w0, w0, 65534
 	bl	ftl_malloc
-.LVL762:
+.LVL764:
 	adrp	x1, .LANCHOR126
 	str	x0, [x1, #:lo12:.LANCHOR126]
 	.loc 3 337 0
@@ -6793,7 +6813,7 @@ FtlMemInit:
 	.loc 3 338 0
 	lsl	w0, w0, 9
 	bl	ftl_malloc
-.LVL763:
+.LVL765:
 	adrp	x1, .LANCHOR127
 	.loc 3 345 0
 	ldrh	w28, [x20, #:lo12:.LANCHOR6]
@@ -6806,35 +6826,35 @@ FtlMemInit:
 	.loc 3 339 0
 	add	x0, x0, 32
 	str	x0, [x1, #:lo12:.LANCHOR40]
-.LVL764:
+.LVL766:
 	.loc 3 347 0
 	mov	w0, w28
 	bl	ftl_malloc
-.LVL765:
+.LVL767:
 	adrp	x1, .LANCHOR128
 	str	x0, [x1, #:lo12:.LANCHOR128]
 	.loc 3 349 0
 	mov	w0, w28
 	.loc 3 350 0
 	adrp	x28, .LANCHOR30
-.LVL766:
+.LVL768:
 	.loc 3 349 0
 	bl	ftl_malloc
-.LVL767:
+.LVL769:
 	str	x0, [x25, #:lo12:.LANCHOR43]
-.LVL768:
+.LVL770:
 	.loc 3 350 0
 	ldr	w1, [x28, #:lo12:.LANCHOR30]
 	lsl	w19, w1, 1
 	.loc 3 351 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL769:
+.LVL771:
 	str	x0, [x27, #:lo12:.LANCHOR129]
 	.loc 3 352 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL770:
+.LVL772:
 	str	x0, [x26, #:lo12:.LANCHOR130]
 	.loc 3 353 0
 	ldrh	w0, [x20, #:lo12:.LANCHOR6]
@@ -6844,21 +6864,21 @@ FtlMemInit:
 	lsr	w0, w0, 3
 	add	w0, w0, 4
 	bl	ftl_malloc
-.LVL771:
+.LVL773:
 	adrp	x1, .LANCHOR1
 	str	x0, [x1, #:lo12:.LANCHOR1]
 	.loc 3 354 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR27]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-.LVL772:
+.LVL774:
 	adrp	x2, .LANCHOR36
 	str	x0, [x2, #:lo12:.LANCHOR36]
 	.loc 3 355 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR27]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-.LVL773:
+.LVL775:
 	adrp	x2, .LANCHOR131
 	str	x0, [x2, #:lo12:.LANCHOR131]
 	.loc 3 356 0
@@ -6866,7 +6886,7 @@ FtlMemInit:
 	adrp	x19, .LANCHOR40
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-.LVL774:
+.LVL776:
 	adrp	x1, .LANCHOR132
 	str	x0, [x1, #:lo12:.LANCHOR132]
 	.loc 3 357 0
@@ -6875,7 +6895,7 @@ FtlMemInit:
 	ldrh	w0, [x1, #:lo12:.LANCHOR28]
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-.LVL775:
+.LVL777:
 	.loc 3 358 0
 	ldr	x1, [x29, 200]
 	.loc 3 357 0
@@ -6886,18 +6906,18 @@ FtlMemInit:
 	mov	w1, 0
 	lsl	w2, w2, 2
 	bl	ftl_memset
-.LVL776:
+.LVL778:
 	.loc 3 360 0
 	adrp	x0, .LANCHOR32
 	ldrh	w0, [x0, #:lo12:.LANCHOR32]
 	.loc 3 361 0
 	lsl	w0, w0, 2
-.LVL777:
+.LVL779:
 	bl	ftl_malloc
-.LVL778:
+.LVL780:
 	adrp	x1, .LANCHOR134
 	str	x0, [x1, #:lo12:.LANCHOR134]
-.LVL779:
+.LVL781:
 	.loc 3 362 0
 	ldr	w0, [x28, #:lo12:.LANCHOR30]
 	.loc 3 364 0
@@ -6905,20 +6925,20 @@ FtlMemInit:
 	.loc 3 363 0
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-.LVL780:
+.LVL782:
 	adrp	x1, .LANCHOR135
 	str	x0, [x1, #:lo12:.LANCHOR135]
-.LVL781:
+.LVL783:
 	.loc 3 364 0
 	ldrh	w0, [x28, #:lo12:.LANCHOR33]
 	.loc 3 365 0
 	lsl	w0, w0, 4
-.LVL782:
+.LVL784:
 	bl	ftl_malloc
-.LVL783:
+.LVL785:
 	adrp	x1, .LANCHOR56
 	str	x0, [x1, #:lo12:.LANCHOR56]
-.LVL784:
+.LVL786:
 	.loc 3 366 0
 	ldrh	w1, [x28, #:lo12:.LANCHOR33]
 	ldrh	w0, [x21, #:lo12:.LANCHOR23]
@@ -6926,12 +6946,12 @@ FtlMemInit:
 	adrp	x21, .LANCHOR10
 	.loc 3 367 0
 	mul	w0, w1, w0
-.LVL785:
+.LVL787:
 	bl	ftl_malloc
-.LVL786:
+.LVL788:
 	adrp	x1, .LANCHOR136
 	str	x0, [x1, #:lo12:.LANCHOR136]
-.LVL787:
+.LVL789:
 	.loc 3 369 0
 	mov	w0, 6
 	.loc 3 368 0
@@ -6940,9 +6960,9 @@ FtlMemInit:
 	adrp	x20, .LANCHOR137
 	.loc 3 369 0
 	mul	w0, w1, w0
-.LVL788:
+.LVL790:
 	bl	ftl_malloc
-.LVL789:
+.LVL791:
 	adrp	x1, .LANCHOR41
 	str	x0, [x1, #:lo12:.LANCHOR41]
 	.loc 3 370 0
@@ -6954,15 +6974,15 @@ FtlMemInit:
 	add	w0, w0, 31
 	asr	w0, w0, 5
 	strh	w0, [x20, #:lo12:.LANCHOR137]
-.LVL790:
+.LVL792:
 	.loc 3 371 0
 	mul	w0, w1, w0
-.LVL791:
+.LVL793:
 	.loc 3 372 0
 	lsl	w0, w0, 2
-.LVL792:
+.LVL794:
 	bl	ftl_malloc
-.LVL793:
+.LVL795:
 	ldp	x3, x15, [x29, 104]
 	adrp	x1, .LANCHOR37
 	.loc 3 374 0
@@ -6977,7 +6997,7 @@ FtlMemInit:
 	ldp	x10, x8, [x29, 152]
 	.loc 3 372 0
 	str	x0, [x2, 32]
-.LVL794:
+.LVL796:
 	ldp	x7, x6, [x29, 168]
 	adrp	x17, .LANCHOR98
 	ldp	x5, x4, [x29, 184]
@@ -6987,11 +7007,11 @@ FtlMemInit:
 	add	x21, x2, 40
 	mov	x0, 1
 	str	x19, [x29, 200]
-.LVL795:
-.L474:
+.LVL797:
+.L475:
 	.loc 3 373 0 is_stmt 0 discriminator 1
 	cmp	w0, w28
-	bcc	.L475
+	bcc	.L476
 	mov	w2, 8
 	sub	w2, w2, w0
 	add	x2, x2, 1
@@ -6999,25 +7019,25 @@ FtlMemInit:
 	add	x1, x1, :lo12:.LANCHOR37
 	.loc 3 373 0
 	mov	x19, 0
-.L476:
+.L477:
 	add	x19, x19, 1
 	.loc 3 377 0 discriminator 1
 	cmp	x19, x2
-	bne	.L477
+	bne	.L478
 	.loc 3 383 0
 	ldr	x0, [x27, #:lo12:.LANCHOR129]
-	cbnz	x0, .L478
-.L480:
+	cbnz	x0, .L479
+.L481:
 	.loc 3 385 0
 	adrp	x1, .LANCHOR138
 	adrp	x0, .LC82
 	add	x1, x1, :lo12:.LANCHOR138
 	add	x0, x0, :lo12:.LC82
 	bl	printf
-.LVL796:
+.LVL798:
 	.loc 3 386 0
 	mov	w0, -1
-.L473:
+.L474:
 	.loc 3 484 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -7040,7 +7060,7 @@ FtlMemInit:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.L475:
+.L476:
 	.cfi_restore_state
 	.loc 3 374 0 discriminator 3
 	ldr	x19, [x2, 32]
@@ -7050,122 +7070,122 @@ FtlMemInit:
 	add	x19, x19, x30, uxtw 2
 	add	w30, w30, w20
 	str	x19, [x21], 8
-	b	.L474
-.L477:
+	b	.L475
+.L478:
 	.loc 3 379 0 discriminator 2
 	add	x20, x0, x19
 	add	x20, x1, x20, lsl 3
 	str	xzr, [x20, 24]
-	b	.L476
-.L478:
+	b	.L477
+.L479:
 	.loc 3 388 0
 	ldr	x0, [x26, #:lo12:.LANCHOR130]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 393 0
 	adrp	x0, .LANCHOR134
 	ldr	x0, [x0, #:lo12:.LANCHOR134]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 398 0
 	adrp	x0, .LANCHOR135
 	ldr	x0, [x0, #:lo12:.LANCHOR135]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 404 0
 	adrp	x0, .LANCHOR56
 	ldr	x0, [x0, #:lo12:.LANCHOR56]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 409 0
 	adrp	x0, .LANCHOR136
 	ldr	x0, [x0, #:lo12:.LANCHOR136]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 414 0
 	adrp	x0, .LANCHOR41
 	ldr	x0, [x0, #:lo12:.LANCHOR41]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 419 0
 	adrp	x0, .LANCHOR37+32
 	ldr	x0, [x0, #:lo12:.LANCHOR37+32]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 425 0
 	ldr	x0, [x25, #:lo12:.LANCHOR43]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 430 0
 	ldr	x0, [x17, #:lo12:.LANCHOR98]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 430 0 is_stmt 0 discriminator 1
 	ldr	x0, [x16, #:lo12:.LANCHOR100]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 435 0 is_stmt 1
 	ldr	x0, [x15, #:lo12:.LANCHOR120]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 435 0 is_stmt 0 discriminator 1
 	ldr	x0, [x14, #:lo12:.LANCHOR122]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 435 0 discriminator 2
 	ldr	x0, [x13, #:lo12:.LANCHOR112]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 435 0 discriminator 3
 	ldr	x0, [x12, #:lo12:.LANCHOR95]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 435 0 discriminator 4
 	ldr	x0, [x11, #:lo12:.LANCHOR121]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 440 0 is_stmt 1
 	ldr	x0, [x10, #:lo12:.LANCHOR39]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 440 0 is_stmt 0 discriminator 1
 	ldr	x0, [x8, #:lo12:.LANCHOR123]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 440 0 discriminator 2
 	ldr	x0, [x7, #:lo12:.LANCHOR124]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 440 0 discriminator 3
 	ldr	x0, [x6, #:lo12:.LANCHOR93]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 441 0 is_stmt 1
 	ldr	x0, [x5, #:lo12:.LANCHOR116]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 441 0 is_stmt 0 discriminator 1
 	ldr	x0, [x4, #:lo12:.LANCHOR114]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 441 0 discriminator 2
 	ldr	x0, [x3, #:lo12:.LANCHOR92]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 446 0 is_stmt 1
 	ldr	x0, [x24, #:lo12:.LANCHOR109]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 446 0 is_stmt 0 discriminator 1
 	ldr	x0, [x23, #:lo12:.LANCHOR115]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 446 0 discriminator 2
 	ldr	x0, [x22, #:lo12:.LANCHOR94]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 452 0 is_stmt 1
 	ldr	x0, [x29, 200]
 	ldr	x0, [x0, #:lo12:.LANCHOR40]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 452 0 is_stmt 0 discriminator 1
 	adrp	x0, .LANCHOR126
 	ldr	x0, [x0, #:lo12:.LANCHOR126]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 458 0 is_stmt 1
 	adrp	x0, .LANCHOR36
 	ldr	x0, [x0, #:lo12:.LANCHOR36]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 464 0
 	adrp	x0, .LANCHOR131
 	ldr	x0, [x0, #:lo12:.LANCHOR131]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 470 0
 	adrp	x0, .LANCHOR132
 	ldr	x0, [x0, #:lo12:.LANCHOR132]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 476 0
 	adrp	x0, .LANCHOR133
 	ldr	x0, [x0, #:lo12:.LANCHOR133]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 483 0
 	mov	w0, 0
-	b	.L473
+	b	.L474
 	.cfi_endproc
 .LFE206:
 	.size	FtlMemInit, .-FtlMemInit
@@ -7177,7 +7197,7 @@ FtlBbt2Bitmap:
 .LFB225:
 	.loc 4 66 0
 	.cfi_startproc
-.LVL797:
+.LVL799:
 	stp	x29, x30, [sp, -64]!
 	.cfi_def_cfa_offset 64
 	.cfi_offset 29, -64
@@ -7190,7 +7210,7 @@ FtlBbt2Bitmap:
 	mov	x22, x0
 	.loc 4 69 0
 	adrp	x0, .LANCHOR137
-.LVL798:
+.LVL800:
 	.loc 4 66 0
 	stp	x23, x24, [sp, 48]
 	.loc 4 74 0
@@ -7216,27 +7236,27 @@ FtlBbt2Bitmap:
 	.loc 4 69 0
 	lsl	w2, w2, 2
 	mov	w1, 0
-.LVL799:
+.LVL801:
 	mov	x0, x20
 	bl	ftl_memset
-.LVL800:
-.L578:
+.LVL802:
+.L579:
 	.loc 4 72 0
 	ldrh	w0, [x22, x19]
 	cmp	w0, w24
-	beq	.L575
+	beq	.L576
 	.loc 4 74 0
 	ldrh	w1, [x21]
 	cmp	w1, w0
-	bhi	.L577
+	bhi	.L578
 	.loc 4 74 0 is_stmt 0 discriminator 1
 	adrp	x0, .LC1
 	mov	w2, 74
 	mov	x1, x23
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL801:
-.L577:
+.LVL803:
+.L578:
 	.loc 4 75 0 is_stmt 1 discriminator 2
 	ldrh	w2, [x22, x19]
 	mov	w1, 1
@@ -7251,13 +7271,13 @@ FtlBbt2Bitmap:
 	orr	w1, w1, w2
 	str	w1, [x20, x0]
 	.loc 4 70 0 discriminator 2
-	bne	.L578
-.L575:
+	bne	.L579
+.L576:
 	.loc 4 77 0
 	ldp	x19, x20, [sp, 16]
-.LVL802:
+.LVL804:
 	ldp	x21, x22, [sp, 32]
-.LVL803:
+.LVL805:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	.cfi_restore 30
@@ -7296,7 +7316,7 @@ FtlBbtMemInit:
 	.loc 4 152 0
 	mov	w1, 255
 	b	ftl_memset
-.LVL804:
+.LVL806:
 	.cfi_endproc
 .LFE227:
 	.size	FtlBbtMemInit, .-FtlBbtMemInit
@@ -7308,7 +7328,7 @@ FtlFreeSysBlkQueueInit:
 .LFB237:
 	.loc 2 76 0
 	.cfi_startproc
-.LVL805:
+.LVL807:
 	stp	x29, x30, [sp, -16]!
 	.cfi_def_cfa_offset 16
 	.cfi_offset 29, -16
@@ -7329,14 +7349,14 @@ FtlFreeSysBlkQueueInit:
 	strh	wzr, [x3, 2]
 	.loc 2 83 0
 	add	x0, x3, 8
-.LVL806:
+.LVL808:
 	.loc 2 80 0
 	strh	wzr, [x3, 4]
 	.loc 2 81 0
 	strh	wzr, [x3, 6]
 	.loc 2 83 0
 	bl	ftl_memset
-.LVL807:
+.LVL809:
 	.loc 2 85 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
@@ -7355,7 +7375,7 @@ load_l2p_region:
 .LFB253:
 	.loc 2 442 0
 	.cfi_startproc
-.LVL808:
+.LVL810:
 	stp	x29, x30, [sp, -80]!
 	.cfi_def_cfa_offset 80
 	.cfi_offset 29, -80
@@ -7381,53 +7401,53 @@ load_l2p_region:
 	.cfi_offset 26, -8
 	.loc 2 446 0
 	ldrh	w0, [x23, #:lo12:.LANCHOR32]
-.LVL809:
+.LVL811:
 	cmp	w0, w21
-	bcs	.L586
+	bcs	.L587
 	.loc 2 446 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR140
-.LVL810:
+.LVL812:
 	adrp	x0, .LC1
 	mov	w2, 446
 	add	x1, x1, :lo12:.LANCHOR140
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL811:
-.L586:
+.LVL813:
+.L587:
 	.loc 2 447 0 is_stmt 1
 	adrp	x26, .LANCHOR134
 	ubfiz	x0, x21, 2, 16
 	adrp	x22, .LANCHOR56
 	ldr	x1, [x26, #:lo12:.LANCHOR134]
 	ldr	w24, [x1, x0]
-.LVL812:
+.LVL814:
 	.loc 2 449 0
-	cbnz	w24, .L587
+	cbnz	w24, .L588
 	.loc 2 450 0
 	ldr	x0, [x22, #:lo12:.LANCHOR56]
 	lsl	x19, x19, 4
-.LVL813:
+.LVL815:
 	adrp	x1, .LANCHOR23
 	add	x0, x0, x19
 	ldrh	w2, [x1, #:lo12:.LANCHOR23]
 	mov	w1, 255
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-.LVL814:
+.LVL816:
 	.loc 2 451 0
 	ldr	x0, [x22, #:lo12:.LANCHOR56]
 	add	x1, x0, x19
 	strh	w21, [x0, x19]
 	.loc 2 452 0
 	str	wzr, [x1, 4]
-.L588:
+.L589:
 	.loc 2 473 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-.LVL815:
+.LVL817:
 	ldp	x23, x24, [sp, 48]
-.LVL816:
+.LVL818:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	.cfi_remember_state
@@ -7443,8 +7463,8 @@ load_l2p_region:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL817:
-.L587:
+.LVL819:
+.L588:
 	.cfi_restore_state
 	.loc 2 456 0
 	ldr	x0, [x22, #:lo12:.LANCHOR56]
@@ -7469,21 +7489,21 @@ load_l2p_region:
 	.loc 2 458 0
 	mov	x0, x20
 	bl	FlashReadPages
-.LVL818:
+.LVL820:
 	.loc 2 459 0
 	ldr	x25, [x20, 16]
-.LVL819:
+.LVL821:
 	.loc 2 461 0
 	ldrh	w0, [x25, 8]
 	cmp	w0, w21
-	beq	.L589
+	beq	.L590
 	.loc 2 462 0
 	mov	w2, w24
 	mov	w1, w21
 	adrp	x0, .LC83
 	add	x0, x0, :lo12:.LC83
 	bl	printf
-.LVL820:
+.LVL822:
 	.loc 2 463 0
 	ldr	x1, [x20, 16]
 	mov	w3, 4
@@ -7491,7 +7511,7 @@ load_l2p_region:
 	mov	w2, w3
 	add	x0, x0, :lo12:.LC84
 	bl	rknand_print_hex
-.LVL821:
+.LVL823:
 	.loc 2 464 0
 	ldrh	w3, [x23, #:lo12:.LANCHOR32]
 	adrp	x0, .LC85
@@ -7499,12 +7519,12 @@ load_l2p_region:
 	mov	w2, 4
 	add	x0, x0, :lo12:.LC85
 	bl	rknand_print_hex
-.LVL822:
-.L589:
+.LVL824:
+.L590:
 	.loc 2 467 0
 	ldrh	w0, [x25, 8]
 	cmp	w0, w21
-	beq	.L590
+	beq	.L591
 	.loc 2 467 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR140
 	adrp	x0, .LC1
@@ -7512,8 +7532,8 @@ load_l2p_region:
 	add	x1, x1, :lo12:.LANCHOR140
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL823:
-.L590:
+.LVL825:
+.L591:
 	.loc 2 470 0 is_stmt 1
 	ldr	x0, [x22, #:lo12:.LANCHOR56]
 	add	x1, x0, x19
@@ -7521,7 +7541,7 @@ load_l2p_region:
 	.loc 2 471 0
 	strh	w21, [x0, x19]
 	.loc 2 472 0
-	b	.L588
+	b	.L589
 	.cfi_endproc
 .LFE253:
 	.size	load_l2p_region, .-load_l2p_region
@@ -7533,7 +7553,7 @@ ftl_free_no_use_map_blk:
 .LFB254:
 	.loc 2 476 0
 	.cfi_startproc
-.LVL824:
+.LVL826:
 	stp	x29, x30, [sp, -80]!
 	.cfi_def_cfa_offset 80
 	.cfi_offset 29, -80
@@ -7566,23 +7586,23 @@ ftl_free_no_use_map_blk:
 	lsl	w2, w2, 1
 	.loc 2 477 0
 	ldr	x23, [x0, 16]
-.LVL825:
+.LVL827:
 	.loc 2 485 0
 	mov	x0, x21
-.LVL826:
+.LVL828:
 	bl	ftl_memset
-.LVL827:
+.LVL829:
 	.loc 2 486 0
 	mov	w0, 0
-.LVL828:
-.L593:
+.LVL830:
+.L594:
 	.loc 2 486 0 is_stmt 0 discriminator 1
 	ldrh	w1, [x19, 6]
 	cmp	w1, w0
-	bhi	.L597
+	bhi	.L598
 	.loc 2 494 0 is_stmt 1
 	ldrh	w26, [x21]
-.LVL829:
+.LVL831:
 	.loc 2 498 0
 	adrp	x24, .LANCHOR20
 	add	x24, x24, :lo12:.LANCHOR20
@@ -7590,22 +7610,22 @@ ftl_free_no_use_map_blk:
 	mov	w25, 0
 	.loc 2 497 0
 	mov	w20, 0
-.LVL830:
-.L598:
+.LVL832:
+.L599:
 	.loc 2 497 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L602
+	bhi	.L603
 	.loc 2 513 0 is_stmt 1
 	mov	w0, w25
 	ldp	x19, x20, [sp, 16]
-.LVL831:
+.LVL833:
 	ldp	x21, x22, [sp, 32]
-.LVL832:
+.LVL834:
 	ldp	x23, x24, [sp, 48]
-.LVL833:
+.LVL835:
 	ldp	x25, x26, [sp, 64]
-.LVL834:
+.LVL836:
 	ldp	x29, x30, [sp], 80
 	.cfi_remember_state
 	.cfi_restore 30
@@ -7620,8 +7640,8 @@ ftl_free_no_use_map_blk:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL835:
-.L597:
+.LVL837:
+.L598:
 	.cfi_restore_state
 	.loc 2 487 0
 	ubfiz	x1, x0, 2, 16
@@ -7630,82 +7650,82 @@ ftl_free_no_use_map_blk:
 	mov	w1, 0
 	.loc 2 487 0
 	ubfx	x2, x2, 10, 16
-.LVL836:
-.L594:
+.LVL838:
+.L595:
 	.loc 2 488 0 discriminator 1
 	ldrh	w3, [x19, 10]
 	cmp	w3, w1
-	bhi	.L596
+	bhi	.L597
 	.loc 2 486 0 discriminator 2
 	add	w0, w0, 1
-.LVL837:
+.LVL839:
 	and	w0, w0, 65535
-.LVL838:
-	b	.L593
-.L596:
+.LVL840:
+	b	.L594
+.L597:
 	.loc 2 489 0
 	ubfiz	x3, x1, 1, 16
 	ldrh	w4, [x23, x3]
 	cmp	w4, w2
-	bne	.L595
+	bne	.L596
 	.loc 2 490 0
 	ldrh	w4, [x21, x3]
 	add	w4, w4, 1
 	strh	w4, [x21, x3]
-.L595:
+.L596:
 	.loc 2 488 0 discriminator 2
 	add	w1, w1, 1
-.LVL839:
-	and	w1, w1, 65535
-.LVL840:
-	b	.L594
 .LVL841:
-.L602:
+	and	w1, w1, 65535
+.LVL842:
+	b	.L595
+.LVL843:
+.L603:
 	.loc 2 498 0
 	ldrh	w0, [x19]
 	uxtw	x22, w20
 	cmp	w0, w20
-	bne	.L599
+	bne	.L600
 	.loc 2 498 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x24]
 	ldrh	w1, [x19, 2]
 	cmp	w1, w0
-	bcs	.L599
+	bcs	.L600
 	.loc 2 499 0 is_stmt 1
 	strh	w0, [x21, x22, lsl 1]
-.L599:
+.L600:
 	.loc 2 500 0
 	lsl	x22, x22, 1
 	ldrh	w0, [x21, x22]
 	cmp	w26, w0
-	bls	.L600
+	bls	.L601
 	mov	w25, w20
-.LVL842:
+.LVL844:
 	mov	w26, w0
-.LVL843:
-.L600:
+.LVL845:
+.L601:
 	.loc 2 504 0
-	cbnz	w0, .L601
+	cbnz	w0, .L602
 	.loc 2 504 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x23, x22]
-	cbz	w0, .L601
+	cbz	w0, .L602
 	.loc 2 506 0 is_stmt 1
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.LVL844:
+.LVL846:
 	.loc 2 507 0
 	strh	wzr, [x23, x22]
 	.loc 2 508 0
 	ldrh	w0, [x19, 8]
 	sub	w0, w0, #1
 	strh	w0, [x19, 8]
-.L601:
+.L602:
 	.loc 2 497 0 discriminator 2
 	add	w20, w20, 1
-.LVL845:
+.LVL847:
 	and	w20, w20, 65535
-.LVL846:
-	b	.L598
+.LVL848:
+	b	.L599
 	.cfi_endproc
 .LFE254:
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
@@ -7717,7 +7737,7 @@ Ftl_write_map_blk_to_last_page:
 .LFB257:
 	.loc 2 583 0
 	.cfi_startproc
-.LVL847:
+.LVL849:
 	stp	x29, x30, [sp, -64]!
 	.cfi_def_cfa_offset 64
 	.cfi_offset 29, -64
@@ -7733,12 +7753,12 @@ Ftl_write_map_blk_to_last_page:
 	mov	x19, x0
 	.loc 2 586 0
 	ldr	x20, [x0, 16]
-.LVL848:
+.LVL850:
 	.loc 2 583 0
 	stp	x21, x22, [sp, 32]
 	.loc 2 591 0
 	ldrh	w0, [x0]
-.LVL849:
+.LVL851:
 	.loc 2 583 0
 	str	x23, [sp, 48]
 	.cfi_offset 21, -32
@@ -7746,10 +7766,10 @@ Ftl_write_map_blk_to_last_page:
 	.cfi_offset 23, -16
 	.loc 2 591 0
 	cmp	w0, w1
-	bne	.L608
+	bne	.L609
 	.loc 2 592 0
 	ldrh	w0, [x19, 8]
-	cbz	w0, .L609
+	cbz	w0, .L610
 	.loc 2 592 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR141
 	adrp	x0, .LC1
@@ -7757,15 +7777,15 @@ Ftl_write_map_blk_to_last_page:
 	add	x1, x1, :lo12:.LANCHOR141
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL850:
-.L609:
+.LVL852:
+.L610:
 	.loc 2 593 0 is_stmt 1
 	ldrh	w0, [x19, 8]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
 	.loc 2 594 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL851:
+.LVL853:
 	strh	w0, [x20]
 	.loc 2 597 0
 	ldr	w0, [x19, 48]
@@ -7777,13 +7797,13 @@ Ftl_write_map_blk_to_last_page:
 	strh	wzr, [x19]
 	.loc 2 597 0
 	str	w0, [x19, 48]
-.LVL852:
-.L610:
+.LVL854:
+.L611:
 	.loc 2 628 0
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
-.LVL853:
+.LVL855:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	.cfi_remember_state
@@ -7796,8 +7816,8 @@ Ftl_write_map_blk_to_last_page:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL854:
-.L608:
+.LVL856:
+.L609:
 	.cfi_restore_state
 	.loc 2 601 0
 	ubfiz	x0, x0, 1, 16
@@ -7813,7 +7833,7 @@ Ftl_write_map_blk_to_last_page:
 	ldrh	w21, [x20, x0]
 	.loc 2 602 0
 	adrp	x20, .LANCHOR108
-.LVL855:
+.LVL857:
 	ldrh	w0, [x19, 2]
 	add	x2, x20, :lo12:.LANCHOR108
 	orr	w0, w0, w21, lsl 10
@@ -7822,7 +7842,7 @@ Ftl_write_map_blk_to_last_page:
 	ldr	x0, [x23, #:lo12:.LANCHOR39]
 	.loc 2 604 0
 	str	x1, [x2, 16]
-.LVL856:
+.LVL858:
 	.loc 2 603 0
 	str	x0, [x2, 8]
 	.loc 2 607 0
@@ -7838,12 +7858,12 @@ Ftl_write_map_blk_to_last_page:
 	strh	w21, [x1, 2]
 	.loc 2 612 0
 	adrp	x1, .LANCHOR20
-.LVL857:
+.LVL859:
 	ldrh	w2, [x1, #:lo12:.LANCHOR20]
 	mov	w1, 255
 	lsl	w2, w2, 3
 	bl	ftl_memset
-.LVL858:
+.LVL860:
 	.loc 2 614 0
 	ldrh	w4, [x19, 6]
 	mov	x1, 0
@@ -7851,20 +7871,20 @@ Ftl_write_map_blk_to_last_page:
 	ldr	x3, [x23, #:lo12:.LANCHOR39]
 	.loc 2 613 0
 	mov	w2, 0
-.LVL859:
-.L611:
+.LVL861:
+.L612:
 	.loc 2 614 0 discriminator 1
 	cmp	w4, w1, uxth
-	bhi	.L613
+	bhi	.L614
 	.loc 2 621 0
 	mov	w2, 1
-.LVL860:
+.LVL862:
 	mov	w3, 0
 	mov	w1, w2
-.LVL861:
+.LVL863:
 	add	x0, x20, :lo12:.LANCHOR108
 	bl	FlashProgPages
-.LVL862:
+.LVL864:
 	.loc 2 622 0
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
@@ -7872,20 +7892,20 @@ Ftl_write_map_blk_to_last_page:
 	.loc 2 626 0
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-.LVL863:
+.LVL865:
 	.loc 2 627 0
-	b	.L610
-.LVL864:
-.L613:
+	b	.L611
+.LVL866:
+.L614:
 	.loc 2 615 0
 	ldr	w0, [x22, x1, lsl 2]
 	cmp	w21, w0, lsr 10
-	bne	.L612
+	bne	.L613
 	.loc 2 616 0
 	add	w2, w2, 1
-.LVL865:
+.LVL867:
 	and	w2, w2, 65535
-.LVL866:
+.LVL868:
 	.loc 2 617 0
 	ubfiz	x0, x2, 1, 16
 	str	w1, [x3, x0, lsl 2]
@@ -7893,11 +7913,11 @@ Ftl_write_map_blk_to_last_page:
 	add	x0, x0, 1
 	ldr	w5, [x22, x1, lsl 2]
 	str	w5, [x3, x0, lsl 2]
-.L612:
-.LVL867:
+.L613:
+.LVL869:
 	add	x1, x1, 1
-.LVL868:
-	b	.L611
+.LVL870:
+	b	.L612
 	.cfi_endproc
 .LFE257:
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
@@ -7909,7 +7929,7 @@ FtlMapWritePage:
 .LFB258:
 	.loc 2 631 0
 	.cfi_startproc
-.LVL869:
+.LVL871:
 	stp	x29, x30, [sp, -112]!
 	.cfi_def_cfa_offset 112
 	.cfi_offset 29, -112
@@ -7952,8 +7972,8 @@ FtlMapWritePage:
 	.cfi_offset 22, -72
 	.loc 2 634 0
 	mov	w22, 0
-.LVL870:
-.L619:
+.LVL872:
+.L620:
 	.loc 2 637 0
 	ldr	w0, [x23]
 	.loc 2 638 0
@@ -7965,44 +7985,44 @@ FtlMapWritePage:
 	ldrh	w0, [x26, #:lo12:.LANCHOR20]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	bge	.L620
+	bge	.L621
 	.loc 2 638 0 is_stmt 0 discriminator 1
 	ldrh	w1, [x19]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L621
-.L620:
+	bne	.L622
+.L621:
 	.loc 2 639 0 is_stmt 1
 	mov	x0, x19
 	bl	Ftl_write_map_blk_to_last_page
-.LVL871:
-.L621:
+.LVL873:
+.L622:
 	.loc 2 650 0
 	ldrh	w1, [x19]
 	ldr	x0, [x19, 16]
 	ldrh	w0, [x0, x1, lsl 1]
-	cbnz	w0, .L622
+	cbnz	w0, .L623
 	.loc 2 650 0 is_stmt 0 discriminator 1
 	adrp	x0, .LC1
 	mov	w2, 650
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL872:
-.L622:
+.LVL874:
+.L623:
 	.loc 2 651 0 is_stmt 1
 	ldrh	w1, [x19]
 	ldrh	w0, [x19, 10]
 	cmp	w1, w0
-	bcc	.L623
+	bcc	.L624
 	.loc 2 651 0 is_stmt 0 discriminator 1
 	adrp	x0, .LC1
 	mov	w2, 651
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL873:
-.L623:
+.LVL875:
+.L624:
 	.loc 2 652 0 is_stmt 1
 	ldrh	w1, [x19]
 	.loc 2 654 0
@@ -8015,7 +8035,7 @@ FtlMapWritePage:
 	mov	w2, 16
 	.loc 2 652 0
 	ldrh	w3, [x0, x1, lsl 1]
-.LVL874:
+.LVL876:
 	.loc 2 658 0
 	mov	w1, 0
 	.loc 2 654 0
@@ -8032,10 +8052,10 @@ FtlMapWritePage:
 	str	x0, [x20, 16]
 	.loc 2 658 0
 	bl	ftl_memset
-.LVL875:
+.LVL877:
 	.loc 2 659 0
 	ldr	x0, [x20, 16]
-.LVL876:
+.LVL878:
 	.loc 2 660 0
 	ldr	w1, [x19, 48]
 	.loc 2 663 0
@@ -8055,9 +8075,9 @@ FtlMapWritePage:
 	mov	w1, w3
 	mov	w2, w3
 	mov	x0, x20
-.LVL877:
+.LVL879:
 	bl	FlashProgPages
-.LVL878:
+.LVL880:
 	.loc 2 665 0
 	ldrh	w0, [x19, 2]
 	.loc 2 667 0
@@ -8068,30 +8088,30 @@ FtlMapWritePage:
 	strh	w0, [x19, 2]
 	.loc 2 667 0
 	cmn	w1, #1
-	bne	.L624
+	bne	.L625
 	.loc 2 668 0
 	ldr	w1, [x20, 4]
 	adrp	x0, .LC86
 	add	x0, x0, :lo12:.LC86
 	.loc 2 669 0
 	add	w22, w22, 1
-.LVL879:
+.LVL881:
 	and	w22, w22, 65535
 	.loc 2 668 0
 	bl	printf
-.LVL880:
+.LVL882:
 	.loc 2 670 0
 	ldrh	w0, [x19, 2]
 	cmp	w0, 2
-	bhi	.L625
+	bhi	.L626
 	.loc 2 671 0
 	ldrh	w0, [x28]
 	sub	w0, w0, #1
 	strh	w0, [x19, 2]
-.L625:
+.L626:
 	.loc 2 673 0
 	cmp	w22, 3
-	bls	.L626
+	bls	.L627
 	.loc 2 674 0
 	add	x21, x21, :lo12:.LANCHOR108
 	adrp	x0, .LC87
@@ -8099,36 +8119,36 @@ FtlMapWritePage:
 	add	x0, x0, :lo12:.LC87
 	ldr	w1, [x21, 4]
 	bl	printf
-.LVL881:
+.LVL883:
+.L628:
+	b	.L628
 .L627:
-	b	.L627
-.L626:
 	.loc 2 678 0
 	ldr	w0, [x19, 52]
-	cbz	w0, .L619
-.L636:
-	b	.L636
-.L624:
+	cbz	w0, .L620
+.L637:
+	b	.L637
+.L625:
 	.loc 2 682 0
 	cmp	w0, 1
-	beq	.L619
+	beq	.L620
 	.loc 2 685 0
 	ldr	x0, [x19, 40]
 	ldr	w1, [x20, 4]
 	.loc 2 687 0
 	ldp	x21, x22, [sp, 32]
-.LVL882:
+.LVL884:
 	ldp	x23, x24, [sp, 48]
 	ldp	x27, x28, [sp, 80]
-.LVL883:
+.LVL885:
 	.loc 2 685 0
 	str	w1, [x0, w25, uxtw 2]
 	.loc 2 687 0
 	ldp	x19, x20, [sp, 16]
-.LVL884:
+.LVL886:
 	mov	w0, 0
 	ldp	x25, x26, [sp, 64]
-.LVL885:
+.LVL887:
 	ldp	x29, x30, [sp], 112
 	.cfi_restore 30
 	.cfi_restore 29
@@ -8143,7 +8163,7 @@ FtlMapWritePage:
 	.cfi_restore 19
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
-.LVL886:
+.LVL888:
 	ret
 	.cfi_endproc
 .LFE258:
@@ -8156,7 +8176,7 @@ ftl_map_blk_gc:
 .LFB256:
 	.loc 2 537 0
 	.cfi_startproc
-.LVL887:
+.LVL889:
 	stp	x29, x30, [sp, -96]!
 	.cfi_def_cfa_offset 96
 	.cfi_offset 29, -96
@@ -8182,29 +8202,29 @@ ftl_map_blk_gc:
 	.cfi_offset 28, -8
 	.loc 2 541 0
 	ldr	x20, [x0, 16]
-.LVL888:
+.LVL890:
 	.loc 2 542 0
 	ldr	x24, [x0, 40]
-.LVL889:
+.LVL891:
 	.loc 2 545 0
 	bl	ftl_free_no_use_map_blk
-.LVL890:
+.LVL892:
 	.loc 2 547 0
 	ldrh	w1, [x19, 10]
 	ldrh	w2, [x19, 8]
 	sub	w1, w1, #4
 	cmp	w2, w1
-	blt	.L639
+	blt	.L640
 	.loc 2 548 0
 	ubfiz	x0, x0, 1, 16
-.LVL891:
+.LVL893:
 	ldrh	w21, [x20, x0]
-.LVL892:
+.LVL894:
 	.loc 2 549 0
-	cbz	w21, .L639
+	cbz	w21, .L640
 	.loc 2 549 0 is_stmt 0 discriminator 1
 	ldr	w1, [x19, 52]
-	cbnz	w1, .L639
+	cbnz	w1, .L640
 	.loc 2 550 0 is_stmt 1
 	mov	w1, 1
 	str	w1, [x19, 52]
@@ -8220,12 +8240,12 @@ ftl_map_blk_gc:
 	.loc 2 553 0
 	ldrh	w0, [x23, #:lo12:.LANCHOR20]
 	cmp	w1, w0
-	bcc	.L640
+	bcc	.L641
 	.loc 2 554 0
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.LVL893:
-.L640:
+.LVL895:
+.L641:
 	.loc 2 558 0 discriminator 1
 	adrp	x25, .LANCHOR108
 	.loc 2 564 0 discriminator 1
@@ -8236,38 +8256,38 @@ ftl_map_blk_gc:
 	add	x22, x22, :lo12:.LANCHOR143
 	.loc 2 537 0 discriminator 1
 	mov	w20, 0
-.LVL894:
-.L641:
+.LVL896:
+.L642:
 	.loc 2 556 0 discriminator 1
 	ldrh	w0, [x19, 6]
 	cmp	w0, w20
-	bhi	.L645
+	bhi	.L646
 	.loc 2 572 0
 	mov	w1, 1
 	mov	w0, w21
 	bl	FtlFreeSysBlkQueueIn
-.LVL895:
+.LVL897:
 	.loc 2 573 0
 	str	wzr, [x19, 52]
-.LVL896:
-.L639:
+.LVL898:
+.L640:
 	.loc 2 577 0
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x23, #:lo12:.LANCHOR20]
 	cmp	w1, w0
-	bcc	.L646
+	bcc	.L647
 	.loc 2 578 0
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.LVL897:
-.L646:
+.LVL899:
+.L647:
 	.loc 2 580 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-.LVL898:
+.LVL900:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL899:
+.LVL901:
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
@@ -8286,14 +8306,14 @@ ftl_map_blk_gc:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL900:
-.L645:
+.LVL902:
+.L646:
 	.cfi_restore_state
 	.loc 2 557 0
 	ubfiz	x27, x20, 2, 16
 	ldr	w1, [x24, x27]
 	cmp	w21, w1, lsr 10
-	bne	.L642
+	bne	.L643
 	.loc 2 558 0
 	adrp	x2, .LANCHOR123
 	add	x0, x25, :lo12:.LANCHOR108
@@ -8305,7 +8325,7 @@ ftl_map_blk_gc:
 	str	w1, [x0, 4]
 	.loc 2 559 0
 	ldr	x28, [x2, #:lo12:.LANCHOR109]
-.LVL901:
+.LVL903:
 	.loc 2 562 0
 	mov	w2, 1
 	.loc 2 559 0
@@ -8313,42 +8333,42 @@ ftl_map_blk_gc:
 	.loc 2 562 0
 	mov	w1, w2
 	bl	FlashReadPages
-.LVL902:
+.LVL904:
 	.loc 2 564 0
 	ldrh	w0, [x28, 8]
 	cmp	w0, w20
-	beq	.L643
+	beq	.L644
 	.loc 2 564 0 is_stmt 0 discriminator 1
 	adrp	x0, .LC1
 	mov	w2, 564
 	mov	x1, x22
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL903:
-.L643:
+.LVL905:
+.L644:
 	.loc 2 565 0 is_stmt 1
 	ldr	w0, [x26]
 	cmn	w0, #1
-	bne	.L644
+	bne	.L645
 	.loc 2 566 0
 	str	wzr, [x24, x27]
-.LVL904:
-.L642:
+.LVL906:
+.L643:
 	.loc 2 556 0 discriminator 2
 	add	w20, w20, 1
-.LVL905:
-	and	w20, w20, 65535
-.LVL906:
-	b	.L641
 .LVL907:
-.L644:
+	and	w20, w20, 65535
+.LVL908:
+	b	.L642
+.LVL909:
+.L645:
 	.loc 2 568 0
 	ldr	x2, [x26, 8]
 	mov	w1, w20
 	mov	x0, x19
 	bl	FtlMapWritePage
-.LVL908:
-	b	.L642
+.LVL910:
+	b	.L643
 	.cfi_endproc
 .LFE256:
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
@@ -8360,7 +8380,7 @@ flush_l2p_region:
 .LFB259:
 	.loc 2 690 0
 	.cfi_startproc
-.LVL909:
+.LVL911:
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
@@ -8374,17 +8394,17 @@ flush_l2p_region:
 	adrp	x20, .LANCHOR56
 	ubfiz	x19, x0, 4, 16
 	ldr	x0, [x20, #:lo12:.LANCHOR56]
-.LVL910:
+.LVL912:
 	add	x1, x0, x19
-.LVL911:
+.LVL913:
 	.loc 2 694 0
 	ldr	x2, [x1, 8]
 	ldrh	w1, [x0, x19]
-.LVL912:
+.LVL914:
 	adrp	x0, .LANCHOR144
 	add	x0, x0, :lo12:.LANCHOR144
 	bl	FtlMapWritePage
-.LVL913:
+.LVL915:
 	.loc 2 695 0
 	ldr	x0, [x20, #:lo12:.LANCHOR56]
 	add	x0, x0, x19
@@ -8414,7 +8434,7 @@ log2phys:
 .LFB262:
 	.loc 2 753 0
 	.cfi_startproc
-.LVL914:
+.LVL916:
 	stp	x29, x30, [sp, -80]!
 	.cfi_def_cfa_offset 80
 	.cfi_offset 29, -80
@@ -8427,7 +8447,7 @@ log2phys:
 	mov	x23, x1
 	.loc 2 756 0
 	adrp	x1, .LANCHOR22
-.LVL915:
+.LVL917:
 	.loc 2 753 0
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
@@ -8448,7 +8468,7 @@ log2phys:
 	.loc 2 756 0
 	lsr	w22, w0, w1
 	and	w22, w22, 65535
-.LVL916:
+.LVL918:
 	.loc 2 757 0
 	lsl	x19, x19, x1
 	.loc 2 759 0
@@ -8460,21 +8480,21 @@ log2phys:
 	.loc 2 757 0
 	and	w19, w19, w0
 	and	x19, x19, 65535
-.LVL917:
+.LVL919:
 	.loc 2 759 0
 	cmp	w0, w1
-	bcc	.L654
+	bcc	.L655
 	.loc 2 759 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR145
 	adrp	x0, .LC1
-.LVL918:
+.LVL920:
 	mov	w2, 759
-.LVL919:
+.LVL921:
 	add	x1, x1, :lo12:.LANCHOR145
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL920:
-.L654:
+.LVL922:
+.L655:
 	.loc 2 762 0 is_stmt 1
 	adrp	x21, .LANCHOR56
 	.loc 2 761 0
@@ -8484,18 +8504,18 @@ log2phys:
 	.loc 2 761 0
 	ldrh	w1, [x0, #:lo12:.LANCHOR33]
 	mov	x0, 0
-.LVL921:
-.L655:
+.LVL923:
+.L656:
 	and	x20, x0, 65535
-.LVL922:
+.LVL924:
 	.loc 2 761 0 is_stmt 0 discriminator 1
 	cmp	w20, w1
-	bcc	.L660
+	bcc	.L661
 	.loc 2 776 0 is_stmt 1
 	bl	select_l2p_ram_region
-.LVL923:
+.LVL925:
 	and	x20, x0, 65535
-.LVL924:
+.LVL926:
 	.loc 2 777 0
 	ldr	x2, [x21, #:lo12:.LANCHOR56]
 	ubfiz	x1, x20, 4, 16
@@ -8506,61 +8526,61 @@ log2phys:
 	ldrh	w2, [x2, x1]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L661
+	beq	.L662
 	.loc 2 777 0 is_stmt 0 discriminator 1
 	ldr	w1, [x3, 4]
-	tbz	w1, #31, .L661
+	tbz	w1, #31, .L662
 	.loc 2 778 0 is_stmt 1
 	bl	flush_l2p_region
-.LVL925:
-.L661:
+.LVL927:
+.L662:
 	.loc 2 781 0
 	mov	w1, w25
 	mov	w0, w22
 	bl	load_l2p_region
-.LVL926:
+.LVL928:
 	.loc 2 782 0
-	b	.L656
-.LVL927:
-.L660:
+	b	.L657
+.LVL929:
+.L661:
 	add	x0, x0, 1
 	.loc 2 762 0
 	add	x3, x2, x0, lsl 4
 	ldrh	w3, [x3, -16]
 	cmp	w3, w22
-	bne	.L655
-.LVL928:
-.L656:
+	bne	.L656
+.LVL930:
+.L657:
 	.loc 2 765 0
 	ldr	x0, [x21, #:lo12:.LANCHOR56]
 	add	x0, x0, x20, lsl 4
 	.loc 2 764 0
-	cbnz	w24, .L657
+	cbnz	w24, .L658
 	.loc 2 765 0
 	ldr	x0, [x0, 8]
 	ldr	w0, [x0, x19, lsl 2]
 	str	w0, [x23]
-.L658:
+.L659:
 	.loc 2 771 0
 	ldr	x0, [x21, #:lo12:.LANCHOR56]
 	add	x20, x0, x20, lsl 4
-.LVL929:
+.LVL931:
 	ldr	w0, [x20, 4]
 	cmn	w0, #1
-	beq	.L663
+	beq	.L664
 	.loc 2 772 0
 	add	w0, w0, 1
 	str	w0, [x20, 4]
-.L663:
+.L664:
 	.loc 2 783 0
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
-.LVL930:
+.LVL932:
 	ldp	x21, x22, [sp, 32]
-.LVL931:
+.LVL933:
 	ldp	x23, x24, [sp, 48]
-.LVL932:
+.LVL934:
 	ldp	x29, x30, [sp], 80
 	.cfi_remember_state
 	.cfi_restore 30
@@ -8574,8 +8594,8 @@ log2phys:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL933:
-.L657:
+.LVL935:
+.L658:
 	.cfi_restore_state
 	.loc 2 767 0
 	ldr	x1, [x0, 8]
@@ -8588,7 +8608,7 @@ log2phys:
 	.loc 2 769 0
 	adrp	x0, .LANCHOR57
 	strh	w22, [x0, #:lo12:.LANCHOR57]
-	b	.L658
+	b	.L659
 	.cfi_endproc
 .LFE262:
 	.size	log2phys, .-log2phys
@@ -8600,7 +8620,7 @@ FtlReUsePrevPpa:
 .LFB280:
 	.loc 2 1628 0
 	.cfi_startproc
-.LVL934:
+.LVL936:
 	stp	x29, x30, [sp, -80]!
 	.cfi_def_cfa_offset 80
 	.cfi_offset 29, -80
@@ -8618,7 +8638,7 @@ FtlReUsePrevPpa:
 	str	w1, [x29, 76]
 	.loc 2 1629 0
 	lsr	w0, w1, 10
-.LVL935:
+.LVL937:
 	.loc 2 1628 0
 	str	x23, [sp, 48]
 	.cfi_offset 19, -64
@@ -8626,22 +8646,22 @@ FtlReUsePrevPpa:
 	.cfi_offset 23, -32
 	.loc 2 1629 0
 	bl	P2V_block_in_plane
-.LVL936:
+.LVL938:
 	.loc 2 1631 0
 	ldr	x2, [x22, #:lo12:.LANCHOR43]
 	.loc 2 1629 0
 	and	w3, w0, 65535
-.LVL937:
+.LVL939:
 	.loc 2 1631 0
 	ubfiz	x20, x3, 1, 16
 	ldrh	w1, [x2, x20]
-	cbnz	w1, .L669
+	cbnz	w1, .L670
 	.loc 2 1632 0
 	adrp	x0, .LANCHOR47
-.LVL938:
+.LVL940:
 	ldr	x19, [x0, #:lo12:.LANCHOR47]
-	cbz	x19, .L670
-.LBB221:
+	cbz	x19, .L671
+.LBB225:
 	.loc 2 1636 0
 	adrp	x2, .LANCHOR41
 	mov	x5, -6148914691236517206
@@ -8654,7 +8674,7 @@ FtlReUsePrevPpa:
 	mov	w6, 65535
 	.loc 2 1635 0
 	ldrh	w4, [x23, #:lo12:.LANCHOR48]
-.LVL939:
+.LVL941:
 	.loc 2 1636 0
 	sub	x19, x19, x2
 	asr	x19, x19, 1
@@ -8663,22 +8683,22 @@ FtlReUsePrevPpa:
 	mov	w5, 6
 	.loc 2 1636 0
 	and	w19, w19, 65535
-.LVL940:
-.L671:
+.LVL942:
+.L672:
 	.loc 2 1637 0 discriminator 1
 	cmp	w1, w4
-	beq	.L670
+	beq	.L671
 	.loc 2 1638 0
 	cmp	w19, w3
-	bne	.L672
+	bne	.L673
 	.loc 2 1639 0
 	mov	w1, w19
-.LVL941:
+.LVL943:
 	add	x0, x0, :lo12:.LANCHOR47
 	bl	List_remove_node
-.LVL942:
+.LVL944:
 	ldrh	w0, [x23, #:lo12:.LANCHOR48]
-	cbnz	w0, .L673
+	cbnz	w0, .L674
 	.loc 2 1639 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR146
 	adrp	x0, .LC1
@@ -8686,8 +8706,8 @@ FtlReUsePrevPpa:
 	add	x1, x1, :lo12:.LANCHOR146
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL943:
-.L673:
+.LVL945:
+.L674:
 	.loc 2 1639 0 discriminator 3
 	ldrh	w0, [x23, #:lo12:.LANCHOR48]
 	sub	w0, w0, #1
@@ -8695,25 +8715,25 @@ FtlReUsePrevPpa:
 	.loc 2 1640 0 is_stmt 1 discriminator 3
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-.LVL944:
+.LVL946:
 	.loc 2 1641 0 discriminator 3
 	ldr	x1, [x22, #:lo12:.LANCHOR43]
 	ldrh	w0, [x1, x20]
 	add	w0, w0, 1
 	strh	w0, [x1, x20]
-.LVL945:
-.L670:
-.LBE221:
+.LVL947:
+.L671:
+.LBE225:
 	.loc 2 1652 0
 	add	x1, x29, 76
 	mov	w2, 1
 	mov	w0, w21
 	bl	log2phys
-.LVL946:
+.LVL948:
 	.loc 2 1653 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-.LVL947:
+.LVL949:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	.cfi_remember_state
@@ -8726,30 +8746,30 @@ FtlReUsePrevPpa:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL948:
-.L672:
+.LVL950:
+.L673:
 	.cfi_restore_state
-.LBB222:
+.LBB226:
 	.loc 2 1644 0
 	umull	x19, w19, w5
-.LVL949:
+.LVL951:
 	ldrh	w19, [x2, x19]
 	cmp	w19, w6
-	beq	.L670
-.LVL950:
+	beq	.L671
+.LVL952:
 	.loc 2 1637 0 discriminator 2
 	add	w1, w1, 1
-.LVL951:
-	and	w1, w1, 65535
-.LVL952:
-	b	.L671
 .LVL953:
-.L669:
-.LBE222:
+	and	w1, w1, 65535
+.LVL954:
+	b	.L672
+.LVL955:
+.L670:
+.LBE226:
 	.loc 2 1650 0
 	add	w1, w1, 1
 	strh	w1, [x2, x20]
-	b	.L670
+	b	.L671
 	.cfi_endproc
 .LFE280:
 	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
@@ -8794,15 +8814,15 @@ ftl_scan_all_data:
 	.cfi_offset 23, -32
 	.loc 2 2280 0
 	bl	printf
-.LVL954:
-.L680:
+.LVL956:
+.L681:
 	.loc 2 2281 0 discriminator 1
 	ldr	w0, [x21]
 	cmp	w19, w0
-	bcc	.L686
+	bcc	.L687
 	.loc 2 2303 0
 	ldp	x19, x20, [sp, 32]
-.LVL955:
+.LVL957:
 	ldp	x21, x22, [sp, 48]
 	ldp	x29, x30, [sp, 16]
 	ldr	x23, [sp, 64]
@@ -8817,30 +8837,30 @@ ftl_scan_all_data:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL956:
-.L686:
+.LVL958:
+.L687:
 	.cfi_restore_state
 	.loc 2 2282 0
 	mov	w2, 0
 	add	x1, x29, 76
 	mov	w0, w19
 	bl	log2phys
-.LVL957:
+.LVL959:
 	.loc 2 2283 0
 	tst	x19, 2047
-	bne	.L681
+	bne	.L682
 	.loc 2 2284 0
 	ldr	w2, [x29, 76]
 	adrp	x0, .LC89
 	mov	w1, w19
 	add	x0, x0, :lo12:.LC89
 	bl	printf
-.LVL958:
-.L681:
+.LVL960:
+.L682:
 	.loc 2 2285 0
 	ldr	w1, [x29, 76]
 	cmn	w1, #1
-	beq	.L683
+	beq	.L684
 	.loc 2 2286 0
 	add	x0, x20, :lo12:.LANCHOR108
 	.loc 2 2290 0
@@ -8859,24 +8879,24 @@ ftl_scan_all_data:
 	.loc 2 2289 0
 	adrp	x1, .LANCHOR109
 	ldr	x23, [x1, #:lo12:.LANCHOR109]
-.LVL959:
+.LVL961:
 	.loc 2 2292 0
 	mov	w1, 1
 	.loc 2 2289 0
 	str	x23, [x0, 16]
 	.loc 2 2292 0
 	bl	FlashReadPages
-.LVL960:
+.LVL962:
 	.loc 2 2293 0
 	ldr	w0, [x20, #:lo12:.LANCHOR108]
 	cmp	w0, 256
 	ccmn	w0, #1, 4, ne
-	beq	.L684
+	beq	.L685
 	.loc 2 2294 0
 	ldr	w0, [x23, 8]
 	cmp	w19, w0
-	beq	.L683
-.L684:
+	beq	.L684
+.L685:
 	.loc 2 2297 0
 	ldp	x1, x0, [x22, 8]
 	ldr	w2, [x1, 4]
@@ -8889,12 +8909,12 @@ ftl_scan_all_data:
 	add	x0, x0, :lo12:.LC90
 	mov	w1, w19
 	bl	printf
-.LVL961:
-.L683:
+.LVL963:
+.L684:
 	.loc 2 2281 0 discriminator 2
 	add	w19, w19, 1
-.LVL962:
-	b	.L680
+.LVL964:
+	b	.L681
 	.cfi_endproc
 .LFE291:
 	.size	ftl_scan_all_data, .-ftl_scan_all_data
@@ -8906,18 +8926,18 @@ FtlReadRefresh:
 .LFB318:
 	.loc 5 419 0
 	.cfi_startproc
-.LVL963:
+.LVL965:
 	.loc 5 425 0
 	adrp	x1, .LANCHOR83
 	add	x0, x1, :lo12:.LANCHOR83
 	ldr	w2, [x0, 80]
-	cbz	w2, .L689
+	cbz	w2, .L690
 	.loc 5 426 0
 	adrp	x1, .LANCHOR62
 	ldr	w3, [x0, 84]
 	ldr	w2, [x1, #:lo12:.LANCHOR62]
 	cmp	w3, w2
-	bcs	.L690
+	bcs	.L691
 	.loc 5 419 0
 	stp	x29, x30, [sp, -160]!
 	.cfi_def_cfa_offset 160
@@ -8928,31 +8948,31 @@ FtlReadRefresh:
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -144
 	.cfi_offset 20, -136
-.LBB228:
-.LBB229:
+.LBB232:
+.LBB233:
 	.loc 5 428 0
 	mov	x19, x0
 	add	x20, x1, :lo12:.LANCHOR62
-.LBE229:
-.LBE228:
+.LBE233:
+.LBE232:
 	.loc 5 419 0
 	str	x21, [sp, 32]
 	.cfi_offset 21, -128
 	mov	w21, 2048
-.L695:
-.LVL964:
-.LBB234:
-.LBB231:
+.L696:
+.LVL966:
+.LBB238:
+.LBB235:
 	.loc 5 428 0
 	ldr	w0, [x19, 84]
 	ldr	w1, [x20]
 	cmp	w0, w1
-	bcs	.L692
+	bcs	.L693
 	.loc 5 430 0
 	add	x1, x29, 60
 	mov	w2, 0
 	bl	log2phys
-.LVL965:
+.LVL967:
 	.loc 5 431 0
 	ldr	w0, [x19, 84]
 	.loc 5 432 0
@@ -8962,8 +8982,8 @@ FtlReadRefresh:
 	str	w0, [x19, 84]
 	.loc 5 432 0
 	cmn	w1, #1
-	beq	.L693
-.LBB230:
+	beq	.L694
+.LBB234:
 	.loc 5 435 0
 	str	w0, [x29, 88]
 	.loc 5 436 0
@@ -8984,29 +9004,29 @@ FtlReadRefresh:
 	str	wzr, [x0, -96]!
 	.loc 5 439 0
 	bl	FlashReadPages
-.LVL966:
+.LVL968:
 	.loc 5 440 0
 	ldr	w0, [x29, 64]
 	cmp	w0, 256
-	bne	.L692
+	bne	.L693
 	.loc 5 442 0
 	ldr	w0, [x29, 60]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL967:
+.LVL969:
 	bl	FtlGcRefreshBlock
-.LVL968:
-.L692:
-.LBE230:
-.LBE231:
+.LVL970:
+.L693:
 .LBE234:
+.LBE235:
+.LBE238:
 	.loc 5 466 0
 	ldp	x19, x20, [sp, 16]
-.LBB235:
-.LBB232:
+.LBB239:
+.LBB236:
 	mov	w0, -1
-.LBE232:
-.LBE235:
+.LBE236:
+.LBE239:
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 160
 	.cfi_remember_state
@@ -9017,26 +9037,26 @@ FtlReadRefresh:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL969:
-.L693:
+.LVL971:
+.L694:
 	.cfi_restore_state
-.LBB236:
-.LBB233:
+.LBB240:
+.LBB237:
 	.loc 5 427 0
 	subs	w21, w21, #1
-.LVL970:
-	bne	.L695
-	b	.L692
-.LVL971:
-.L690:
+.LVL972:
+	bne	.L696
+	b	.L693
+.LVL973:
+.L691:
 	.cfi_def_cfa 31, 0
 	.cfi_restore 19
 	.cfi_restore 20
 	.cfi_restore 21
 	.cfi_restore 29
 	.cfi_restore 30
-.LBE233:
-.LBE236:
+.LBE237:
+.LBE240:
 	.loc 5 451 0
 	adrp	x1, .LANCHOR63
 	.loc 5 450 0
@@ -9045,21 +9065,21 @@ FtlReadRefresh:
 	ldr	w1, [x1, #:lo12:.LANCHOR63]
 	.loc 5 449 0
 	stp	w1, wzr, [x0, 76]
-.L699:
+.L700:
 	.loc 5 420 0
 	mov	w0, 0
 	.loc 5 465 0
 	ret
-.L689:
-.LVL972:
-.LBB237:
+.L690:
+.LVL974:
+.LBB241:
 	.loc 5 456 0
 	ldr	w4, [x0, 76]
 	adrp	x0, .LANCHOR63
 	ldr	w2, [x0, #:lo12:.LANCHOR63]
 	add	w0, w2, 1048576
 	cmp	w4, w0
-	bhi	.L698
+	bhi	.L699
 	.loc 5 454 0
 	adrp	x0, .LANCHOR77
 	ldr	w0, [x0, #:lo12:.LANCHOR77]
@@ -9069,12 +9089,12 @@ FtlReadRefresh:
 	.loc 5 457 0
 	add	w0, w0, w4
 	cmp	w2, w0
-	bhi	.L698
+	bhi	.L699
 	.loc 5 458 0
 	adrp	x0, .LANCHOR79+28
 	ldrb	w0, [x0, #:lo12:.LANCHOR79+28]
-	cbnz	w0, .L699
-.L698:
+	cbnz	w0, .L700
+.L699:
 	.loc 5 460 0
 	add	x0, x1, :lo12:.LANCHOR83
 	mov	w1, 1
@@ -9082,8 +9102,8 @@ FtlReadRefresh:
 	str	wzr, [x0, 84]
 	.loc 5 460 0
 	stp	w2, w1, [x0, 76]
-	b	.L699
-.LBE237:
+	b	.L700
+.LBE241:
 	.cfi_endproc
 .LFE318:
 	.size	FtlReadRefresh, .-FtlReadRefresh
@@ -9095,16 +9115,16 @@ FtlMapBlkWriteDump_data:
 .LFB267:
 	.loc 2 897 0
 	.cfi_startproc
-.LVL973:
+.LVL975:
 	.loc 2 903 0
 	ldr	w1, [x0, 56]
-	cbz	w1, .L705
+	cbz	w1, .L706
 	.loc 2 897 0
 	stp	x29, x30, [sp, -48]!
 	.cfi_def_cfa_offset 48
 	.cfi_offset 29, -48
 	.cfi_offset 30, -40
-.LVL974:
+.LVL976:
 	.loc 2 907 0
 	adrp	x1, .LANCHOR108
 	.loc 2 908 0
@@ -9120,7 +9140,7 @@ FtlMapBlkWriteDump_data:
 	ldrh	w20, [x0, 6]
 	.loc 2 907 0
 	adrp	x0, .LANCHOR123
-.LVL975:
+.LVL977:
 	.loc 2 908 0
 	ldr	x2, [x2, #:lo12:.LANCHOR109]
 	.loc 2 907 0
@@ -9144,18 +9164,18 @@ FtlMapBlkWriteDump_data:
 	mov	x21, x1
 	.loc 2 930 0
 	ldr	w2, [x4, x2]
-.LVL976:
+.LVL978:
 	.loc 2 931 0
 	str	w2, [x0, 4]
 	.loc 2 932 0
-	cbz	w2, .L707
+	cbz	w2, .L708
 	.loc 2 934 0
 	mov	w2, 1
-.LVL977:
+.LVL979:
 	mov	w1, w2
 	bl	FlashReadPages
-.LVL978:
-.L708:
+.LVL980:
+.L709:
 	.loc 2 941 0
 	add	x1, x21, :lo12:.LANCHOR108
 	mov	x0, x19
@@ -9166,7 +9186,7 @@ FtlMapBlkWriteDump_data:
 	mov	w1, w20
 	.loc 2 943 0
 	ldp	x19, x20, [sp, 16]
-.LVL979:
+.LVL981:
 	ldp	x29, x30, [sp], 48
 	.cfi_remember_state
 	.cfi_restore 30
@@ -9177,20 +9197,20 @@ FtlMapBlkWriteDump_data:
 	.cfi_def_cfa 31, 0
 	.loc 2 941 0
 	b	FtlMapWritePage
-.LVL980:
-.L707:
+.LVL982:
+.L708:
 	.cfi_restore_state
 	.loc 2 938 0
 	adrp	x0, .LANCHOR23
 	mov	w1, 255
 	ldrh	w2, [x0, #:lo12:.LANCHOR23]
-.LVL981:
+.LVL983:
 	mov	x0, x3
 	bl	ftl_memset
-.LVL982:
-	b	.L708
-.LVL983:
-.L705:
+.LVL984:
+	b	.L709
+.LVL985:
+.L706:
 	.cfi_def_cfa 31, 0
 	.cfi_restore 19
 	.cfi_restore 20
@@ -9260,7 +9280,7 @@ FtlScanSysBlk:
 	strh	wzr, [x23, #:lo12:.LANCHOR35]
 	.loc 2 1103 0
 	bl	ftl_memset
-.LVL984:
+.LVL986:
 	.loc 2 1104 0
 	ldr	x0, [x27, #:lo12:.LANCHOR129]
 	mov	w1, 0
@@ -9274,34 +9294,34 @@ FtlScanSysBlk:
 	.loc 2 1104 0
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL985:
+.LVL987:
 	.loc 2 1105 0
 	ldr	x0, [x22, #:lo12:.LANCHOR132]
 	mov	w1, 0
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-.LVL986:
+.LVL988:
 	.loc 2 1106 0
 	ldr	x0, [x28, #:lo12:.LANCHOR36]
 	mov	w1, 0
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL987:
+.LVL989:
 	.loc 2 1107 0
 	mov	w2, 12
 	mov	w1, 255
 	add	x0, x24, :lo12:.LANCHOR81
 	bl	ftl_memset
-.LVL988:
+.LVL990:
 	.loc 2 1109 0
 	adrp	x0, .LANCHOR5
 	stp	x22, x25, [x29, 144]
 	str	x27, [x29, 160]
 	ldrh	w0, [x0, #:lo12:.LANCHOR5]
 	str	w0, [x29, 172]
-.LVL989:
+.LVL991:
 	adrp	x0, .LANCHOR6
 	add	x0, x0, :lo12:.LANCHOR6
 	str	x0, [x29, 120]
@@ -9309,13 +9329,13 @@ FtlScanSysBlk:
 	adrp	x0, .LANCHOR71
 	add	x0, x0, :lo12:.LANCHOR71
 	str	x0, [x29, 112]
-.L713:
+.L714:
 	.loc 2 1109 0 discriminator 1
 	ldr	x0, [x29, 120]
 	ldr	w1, [x29, 172]
 	ldrh	w0, [x0]
 	cmp	w0, w1
-	bls	.L753
+	bls	.L754
 	.loc 2 1113 0 discriminator 1
 	adrp	x0, .LANCHOR3
 	.loc 2 1118 0 discriminator 1
@@ -9342,20 +9362,20 @@ FtlScanSysBlk:
 	ldr	x10, [x0, #:lo12:.LANCHOR94]
 	adrp	x0, .LANCHOR24
 	ldrh	w8, [x0, #:lo12:.LANCHOR24]
-	b	.L754
-.LVL990:
-.L715:
+	b	.L755
+.LVL992:
+.L716:
 	.loc 2 1115 0
 	ldrh	w1, [x29, 172]
 	ldrb	w0, [x6, x5]
 	bl	V2P_block
-.LVL991:
+.LVL993:
 	and	w4, w0, 65535
-.LVL992:
+.LVL994:
 	.loc 2 1116 0
 	bl	FtlBbmIsBadBlock
-.LVL993:
-	cbnz	w0, .L714
+.LVL995:
+	cbnz	w0, .L715
 	.loc 2 1118 0
 	ubfiz	x0, x22, 5, 16
 	.loc 2 1120 0
@@ -9364,12 +9384,12 @@ FtlScanSysBlk:
 	add	x0, x7, x0
 	.loc 2 1121 0
 	add	w22, w22, 1
-.LVL994:
+.LVL996:
 	and	w22, w22, 65535
-.LVL995:
+.LVL997:
 	.loc 2 1118 0
 	lsl	w4, w4, 10
-.LVL996:
+.LVL998:
 	.loc 2 1120 0
 	asr	w1, w1, 2
 	add	x1, x10, x1, sxtw 2
@@ -9377,43 +9397,43 @@ FtlScanSysBlk:
 	str	w4, [x0, 4]
 	.loc 2 1120 0
 	stp	x11, x1, [x0, 8]
-.L714:
-.LVL997:
+.L715:
+.LVL999:
 	add	x5, x5, 1
-.LVL998:
-.L754:
+.LVL1000:
+.L755:
 	.loc 2 1113 0 discriminator 1
 	cmp	w12, w5, uxth
-	bhi	.L715
+	bhi	.L716
 	.loc 2 1124 0
-	cbnz	w22, .L716
-.LVL999:
-.L752:
+	cbnz	w22, .L717
+.LVL1001:
+.L753:
 	.loc 2 1109 0
 	ldr	w0, [x29, 172]
 	add	w26, w0, 1
 	and	w0, w26, 65535
 	str	w0, [x29, 172]
-.LVL1000:
-	b	.L713
-.LVL1001:
-.L716:
+.LVL1002:
+	b	.L714
+.LVL1003:
+.L717:
 	.loc 2 1127 0
 	mov	w1, w22
 	mov	w2, 1
 	mov	x0, x7
 	bl	FlashReadPages
-.LVL1002:
+.LVL1004:
 	ubfiz	x0, x22, 5, 16
 	mov	x22, 0
-.LVL1003:
+.LVL1005:
 	str	x0, [x29, 128]
-.LVL1004:
+.LVL1006:
 	.loc 2 1162 0
 	adrp	x0, .LANCHOR148
 	add	x0, x0, :lo12:.LANCHOR148
 	str	x0, [x29, 136]
-.L751:
+.L752:
 	.loc 2 1129 0
 	ldr	x0, [x25, #:lo12:.LANCHOR120]
 	add	x1, x0, x22
@@ -9427,13 +9447,13 @@ FtlScanSysBlk:
 	ldr	x27, [x1, 16]
 	.loc 2 1129 0
 	ubfx	x26, x3, 10, 16
-.LVL1005:
+.LVL1007:
 	.loc 2 1132 0
-	bne	.L719
+	bne	.L720
 	mov	w5, 16
 	.loc 2 1136 0
 	mov	w7, 65535
-.L721:
+.L722:
 	.loc 2 1134 0
 	ldr	x0, [x25, #:lo12:.LANCHOR120]
 	add	x6, x25, :lo12:.LANCHOR120
@@ -9444,21 +9464,21 @@ FtlScanSysBlk:
 	add	x0, x0, x22
 	str	x6, [x29, 104]
 	str	w5, [x29, 168]
-.LVL1006:
+.LVL1008:
 	ldr	w1, [x0, 4]
 	add	w1, w1, 1
 	str	w1, [x0, 4]
 	.loc 2 1135 0
 	mov	w1, w2
 	bl	FlashReadPages
-.LVL1007:
+.LVL1009:
 	.loc 2 1136 0
 	ldrh	w0, [x27]
 	ldr	w7, [x29, 100]
 	ldr	w5, [x29, 168]
 	cmp	w0, w7
 	ldr	x6, [x29, 104]
-	bne	.L718
+	bne	.L719
 	.loc 2 1137 0
 	ldr	x0, [x6]
 	mov	w1, -1
@@ -9467,91 +9487,91 @@ FtlScanSysBlk:
 	ldr	x0, [x6]
 	ldr	w0, [x0, x22]
 	cmp	w0, w1
-	bne	.L719
-.LVL1008:
-.L720:
+	bne	.L720
+.LVL1010:
+.L721:
 	.loc 2 1287 0
 	mov	w1, 1
-	b	.L790
-.LVL1009:
-.L718:
+	b	.L791
+.LVL1011:
+.L719:
 	.loc 2 1139 0
 	ldr	x0, [x25, #:lo12:.LANCHOR120]
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	bne	.L719
-.LVL1010:
+	bne	.L720
+.LVL1012:
 	sub	w5, w5, #1
-.LVL1011:
+.LVL1013:
 	.loc 2 1133 0 discriminator 2
 	ands	w5, w5, 65535
-	bne	.L721
-	b	.L720
-.L719:
+	bne	.L722
+	b	.L721
+.L720:
 	.loc 2 1147 0
 	adrp	x0, .LANCHOR71
 	ldr	w1, [x0, #:lo12:.LANCHOR71]
 	ldr	w0, [x27, 4]
 	cmn	w1, #1
-	beq	.L722
+	beq	.L723
 	.loc 2 1147 0 is_stmt 0 discriminator 1
 	cmp	w1, w0
-	bhi	.L723
-.L722:
+	bhi	.L724
+.L723:
 	.loc 2 1149 0 is_stmt 1
 	cmn	w0, #1
-	beq	.L723
+	beq	.L724
 	.loc 2 1152 0
 	ldr	x2, [x29, 112]
 	add	w1, w0, 1
 	str	w1, [x2]
-.L723:
+.L724:
 	.loc 2 1157 0
 	ldrh	w1, [x27]
 	mov	w2, 61604
 	cmp	w1, w2
-	beq	.L725
-	bhi	.L726
+	beq	.L726
+	bhi	.L727
 	mov	w0, 61574
 	cmp	w1, w0
-	beq	.L727
-.L724:
+	beq	.L728
+.L725:
 	.loc 2 1128 0 discriminator 2
 	ldr	x0, [x29, 128]
 	add	x22, x22, 32
 	cmp	x0, x22
-	bne	.L751
-	b	.L752
-.L726:
+	bne	.L752
+	b	.L753
+.L727:
 	.loc 2 1157 0
 	mov	w0, 61634
 	cmp	w1, w0
-	beq	.L728
+	beq	.L729
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L724
+	bne	.L725
 	.loc 2 1280 0
 	mov	w1, 0
-.L790:
+.L791:
 	.loc 2 1287 0
 	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-.LVL1012:
-	b	.L724
-.L728:
+.LVL1014:
+	b	.L725
+.L729:
 	.loc 2 1162 0
 	ldrh	w1, [x20, #:lo12:.LANCHOR147]
 	ldr	w0, [x21, #:lo12:.LANCHOR30]
 	cmp	w1, w0
-	bls	.L730
+	bls	.L731
 	.loc 2 1162 0 is_stmt 0 discriminator 1
 	ldr	x1, [x29, 136]
 	adrp	x0, .LC1
 	mov	w2, 1162
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1013:
-.L730:
+.LVL1015:
+.L731:
 	.loc 2 1163 0 is_stmt 1
 	ldr	w6, [x21, #:lo12:.LANCHOR30]
 	.loc 2 1165 0
@@ -9562,20 +9582,20 @@ FtlScanSysBlk:
 	sub	w0, w2, #1
 	sub	w2, w2, w1
 	sxth	x0, w0
-.LVL1014:
+.LVL1016:
 	sub	w2, w2, #1
 	.loc 2 1165 0
 	ldr	x5, [x3, #:lo12:.LANCHOR135]
 	.loc 2 1163 0
 	sxth	w2, w2
-.L731:
+.L732:
 	.loc 2 1163 0 is_stmt 0 discriminator 1
 	cmp	w0, w2
-	bgt	.L737
+	bgt	.L738
 	.loc 2 1186 0 is_stmt 1
-	tbz	w0, #31, .L771
-	b	.L724
-.L737:
+	tbz	w0, #31, .L772
+	b	.L725
+.L738:
 	.loc 2 1165 0
 	sxtw	x8, w0
 	ldr	w11, [x27, 4]
@@ -9583,42 +9603,42 @@ FtlScanSysBlk:
 	add	x10, x5, x7
 	ldr	w7, [x5, x7]
 	cmp	w11, w7
-	bls	.L732
+	bls	.L733
 	.loc 2 1167 0
 	ldr	w2, [x5]
-	cbnz	w2, .L733
+	cbnz	w2, .L734
 	.loc 2 1167 0 is_stmt 0 discriminator 1
 	cmp	w6, w1
-	beq	.L733
+	beq	.L734
 	.loc 2 1172 0 is_stmt 1
 	add	w1, w1, 1
 	strh	w1, [x20, #:lo12:.LANCHOR147]
-.L733:
+.L734:
 	.loc 2 1178 0 discriminator 1
 	ldr	x1, [x29, 160]
 	ldr	x6, [x1, #:lo12:.LANCHOR129]
 	mov	w1, 0
-.L734:
-.LVL1015:
+.L735:
+.LVL1017:
 	.loc 2 1175 0 discriminator 1
 	cmp	w1, w0
-	bne	.L735
+	bne	.L736
 	.loc 2 1180 0
 	ldr	w1, [x27, 4]
-.LVL1016:
+.LVL1018:
 	str	w1, [x10]
 	.loc 2 1181 0
 	strh	w26, [x6, x8, lsl 1]
 	.loc 2 1186 0
-	tbnz	w0, #31, .L724
+	tbnz	w0, #31, .L725
 	.loc 2 1193 0
 	ldrh	w1, [x20, #:lo12:.LANCHOR147]
 	ldr	w2, [x21, #:lo12:.LANCHOR30]
 	sub	w2, w2, w1
 	sub	w2, w2, #1
 	cmp	w0, w2, sxth
-	bgt	.L724
-.L771:
+	bgt	.L725
+.L772:
 	.loc 2 1195 0
 	add	w1, w1, 1
 	strh	w1, [x20, #:lo12:.LANCHOR147]
@@ -9628,66 +9648,66 @@ FtlScanSysBlk:
 	.loc 2 1197 0
 	ldr	x1, [x29, 160]
 	ldr	x1, [x1, #:lo12:.LANCHOR129]
-.L789:
+.L790:
 	.loc 2 1241 0
 	strh	w26, [x1, x0, lsl 1]
-	b	.L724
-.LVL1017:
-.L735:
+	b	.L725
+.LVL1019:
+.L736:
 	.loc 2 1177 0 discriminator 3
 	sxtw	x2, w1
 	add	w1, w1, 1
-.LVL1018:
+.LVL1020:
 	lsl	x7, x2, 2
 	.loc 2 1178 0 discriminator 3
 	lsl	x2, x2, 1
 	.loc 2 1177 0 discriminator 3
 	add	x11, x5, x7
 	sxth	w1, w1
-.LVL1019:
+.LVL1021:
 	ldr	w11, [x11, 4]
 	str	w11, [x5, x7]
 	.loc 2 1178 0 discriminator 3
 	add	x7, x6, x2
 	ldrh	w7, [x7, 2]
 	strh	w7, [x6, x2]
-	b	.L734
-.LVL1020:
-.L732:
-	sub	w0, w0, #1
-.LVL1021:
-	sxth	x0, w0
+	b	.L735
 .LVL1022:
-	b	.L731
+.L733:
+	sub	w0, w0, #1
 .LVL1023:
-.L727:
+	sxth	x0, w0
+.LVL1024:
+	b	.L732
+.LVL1025:
+.L728:
 	.loc 2 1203 0
 	ldrh	w1, [x23, #:lo12:.LANCHOR35]
 	ldrh	w0, [x19, #:lo12:.LANCHOR27]
 	cmp	w1, w0
-	bls	.L740
+	bls	.L741
 	.loc 2 1203 0 is_stmt 0 discriminator 1
 	ldr	x1, [x29, 136]
 	adrp	x0, .LC1
 	mov	w2, 1203
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1024:
-.L740:
+.LVL1026:
+.L741:
 	.loc 2 1204 0 is_stmt 1
 	ldrh	w6, [x19, #:lo12:.LANCHOR27]
 	ldrh	w2, [x23, #:lo12:.LANCHOR35]
 	sub	w1, w6, #1
 	sxth	x0, w1
-.LVL1025:
+.LVL1027:
 	sub	w5, w1, w2
 	.loc 2 1206 0
 	ldr	x1, [x29, 144]
 	ldr	x1, [x1, #:lo12:.LANCHOR132]
-.L741:
+.L742:
 	.loc 2 1204 0 discriminator 1
 	cmp	w0, w5
-	ble	.L746
+	ble	.L747
 	.loc 2 1206 0
 	sxtw	x7, w0
 	ldr	w11, [x27, 4]
@@ -9695,41 +9715,41 @@ FtlScanSysBlk:
 	add	x10, x1, x8
 	ldr	w8, [x1, x8]
 	cmp	w11, w8
-	bls	.L742
+	bls	.L743
 	.loc 2 1208 0
 	ldr	w5, [x1]
-	cbnz	w5, .L743
+	cbnz	w5, .L744
 	.loc 2 1208 0 is_stmt 0 discriminator 1
 	cmp	w6, w2
-	beq	.L743
+	beq	.L744
 	.loc 2 1216 0 is_stmt 1
 	add	w2, w2, 1
 	strh	w2, [x23, #:lo12:.LANCHOR35]
-.L743:
+.L744:
 	.loc 2 1221 0 discriminator 1
 	ldr	x6, [x28, #:lo12:.LANCHOR36]
 	mov	w2, 0
-.L744:
-.LVL1026:
+.L745:
+.LVL1028:
 	.loc 2 1218 0 discriminator 1
 	cmp	w2, w0
-	bne	.L745
+	bne	.L746
 	.loc 2 1223 0
 	ldr	w2, [x27, 4]
-.LVL1027:
+.LVL1029:
 	str	w2, [x10]
 	.loc 2 1224 0
 	strh	w26, [x6, x7, lsl 1]
-.L746:
+.L747:
 	.loc 2 1229 0
-	tbnz	w0, #31, .L724
+	tbnz	w0, #31, .L725
 	.loc 2 1237 0
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	ldrh	w5, [x23, #:lo12:.LANCHOR35]
 	sub	w2, w2, #1
 	sub	w2, w2, w5
 	cmp	w0, w2, sxth
-	bgt	.L724
+	bgt	.L725
 	.loc 2 1239 0
 	add	w5, w5, 1
 	.loc 2 1240 0
@@ -9740,63 +9760,63 @@ FtlScanSysBlk:
 	str	w2, [x1, x0, lsl 2]
 	.loc 2 1241 0
 	ldr	x1, [x28, #:lo12:.LANCHOR36]
-	b	.L789
-.LVL1028:
-.L745:
+	b	.L790
+.LVL1030:
+.L746:
 	.loc 2 1220 0 discriminator 3
 	sxtw	x5, w2
 	add	w2, w2, 1
-.LVL1029:
+.LVL1031:
 	lsl	x8, x5, 2
 	.loc 2 1221 0 discriminator 3
 	lsl	x5, x5, 1
 	.loc 2 1220 0 discriminator 3
 	add	x11, x1, x8
 	sxth	w2, w2
-.LVL1030:
+.LVL1032:
 	ldr	w11, [x11, 4]
 	str	w11, [x1, x8]
 	.loc 2 1221 0 discriminator 3
 	add	x8, x6, x5
 	ldrh	w8, [x8, 2]
 	strh	w8, [x6, x5]
-	b	.L744
-.LVL1031:
-.L742:
-	sub	w0, w0, #1
-.LVL1032:
-	sxth	x0, w0
+	b	.L745
 .LVL1033:
-	b	.L741
+.L743:
+	sub	w0, w0, #1
 .LVL1034:
-.L725:
+	sxth	x0, w0
+.LVL1035:
+	b	.L742
+.LVL1036:
+.L726:
 	.loc 2 1248 0
 	ldrh	w5, [x24, #:lo12:.LANCHOR81]
 	mov	w1, 65535
 	add	x2, x24, :lo12:.LANCHOR81
 	cmp	w5, w1
-	bne	.L748
+	bne	.L749
 	.loc 2 1250 0
 	strh	w26, [x24, #:lo12:.LANCHOR81]
 	.loc 2 1251 0
 	str	w0, [x2, 8]
-	b	.L724
-.L748:
+	b	.L725
+.L749:
 	.loc 2 1255 0
 	ldrh	w0, [x2, 4]
 	cmp	w0, w1
-	beq	.L749
+	beq	.L750
 	.loc 2 1256 0
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.LVL1035:
-.L749:
+.LVL1037:
+.L750:
 	.loc 2 1257 0
 	add	x0, x24, :lo12:.LANCHOR81
 	ldr	w1, [x27, 4]
 	ldr	w2, [x0, 8]
 	cmp	w2, w1
-	bcs	.L750
+	bcs	.L751
 	.loc 2 1259 0
 	ldrh	w2, [x24, #:lo12:.LANCHOR81]
 	strh	w2, [x0, 4]
@@ -9804,29 +9824,29 @@ FtlScanSysBlk:
 	strh	w26, [x24, #:lo12:.LANCHOR81]
 	.loc 2 1261 0
 	str	w1, [x0, 8]
-	b	.L724
-.L750:
+	b	.L725
+.L751:
 	.loc 2 1265 0
 	strh	w26, [x0, 4]
-	b	.L724
-.LVL1036:
-.L753:
+	b	.L725
+.LVL1038:
+.L754:
 	.loc 2 1292 0
 	ldr	x0, [x29, 160]
 	ldr	x2, [x0, #:lo12:.LANCHOR129]
 	ldrh	w0, [x2]
-	cbz	w0, .L755
-.L758:
+	cbz	w0, .L756
+.L759:
 	.loc 2 1310 0
 	ldr	x1, [x28, #:lo12:.LANCHOR36]
 	ldrh	w0, [x1]
-	cbz	w0, .L756
-.L757:
+	cbz	w0, .L757
+.L758:
 	.loc 2 1328 0
 	ldrh	w1, [x20, #:lo12:.LANCHOR147]
 	ldr	w0, [x21, #:lo12:.LANCHOR30]
 	cmp	w1, w0
-	bls	.L787
+	bls	.L788
 	.loc 2 1328 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR148
 	adrp	x0, .LC1
@@ -9834,8 +9854,8 @@ FtlScanSysBlk:
 	add	x1, x1, :lo12:.LANCHOR148
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1037:
-.L787:
+.LVL1039:
+.L788:
 	.loc 2 1330 0 is_stmt 1
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
@@ -9858,24 +9878,24 @@ FtlScanSysBlk:
 	.cfi_restore 19
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
-.LVL1038:
+.LVL1040:
 	ret
-.LVL1039:
-.L755:
+.LVL1041:
+.L756:
 	.cfi_restore_state
 	.loc 2 1292 0 discriminator 1
 	ldrh	w0, [x20, #:lo12:.LANCHOR147]
-	cbz	w0, .L758
+	cbz	w0, .L759
 	.loc 2 1294 0 discriminator 1
 	ldr	w1, [x21, #:lo12:.LANCHOR30]
 	mov	w0, 0
-.L759:
-.LVL1040:
+.L760:
+.LVL1042:
 	cmp	w0, w1
-	bcs	.L758
+	bcs	.L759
 	.loc 2 1296 0
 	ldrh	w3, [x2, w0, sxtw 1]
-	cbz	w3, .L760
+	cbz	w3, .L761
 	.loc 2 1301 0
 	ldr	x1, [x29, 152]
 	.loc 2 1298 0
@@ -9883,23 +9903,23 @@ FtlScanSysBlk:
 	.loc 2 1301 0
 	ldr	x4, [x1, #:lo12:.LANCHOR135]
 	mov	w1, w0
-.L761:
-.LVL1041:
+.L762:
+.LVL1043:
 	.loc 2 1298 0 discriminator 1
 	ldr	w3, [x7]
 	cmp	w1, w3
-	bcs	.L758
+	bcs	.L759
 	.loc 2 1300 0 discriminator 3
 	sxtw	x6, w1
 	sub	w3, w1, w0
 	lsl	x5, x6, 1
 	sxtw	x3, w3
 	add	w1, w1, 1
-.LVL1042:
+.LVL1044:
 	.loc 2 1301 0 discriminator 3
 	ldr	w6, [x4, x6, lsl 2]
 	sxth	w1, w1
-.LVL1043:
+.LVL1045:
 	.loc 2 1300 0 discriminator 3
 	ldrh	w8, [x2, x5]
 	strh	w8, [x2, x3, lsl 1]
@@ -9907,53 +9927,53 @@ FtlScanSysBlk:
 	str	w6, [x4, x3, lsl 2]
 	.loc 2 1302 0 discriminator 3
 	strh	wzr, [x2, x5]
-	b	.L761
-.LVL1044:
-.L760:
-	add	w0, w0, 1
-.LVL1045:
-	sxth	w0, w0
+	b	.L762
 .LVL1046:
-	b	.L759
+.L761:
+	add	w0, w0, 1
 .LVL1047:
-.L756:
+	sxth	w0, w0
+.LVL1048:
+	b	.L760
+.LVL1049:
+.L757:
 	.loc 2 1310 0 discriminator 1
 	ldrh	w0, [x23, #:lo12:.LANCHOR35]
-	cbz	w0, .L757
+	cbz	w0, .L758
 	.loc 2 1312 0 discriminator 1
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	mov	w0, 0
-.L766:
-.LVL1048:
+.L767:
+.LVL1050:
 	mov	w6, w0
 	cmp	w0, w2
-	bge	.L757
+	bge	.L758
 	.loc 2 1314 0
 	ldrh	w3, [x1, w0, sxtw 1]
-	cbz	w3, .L767
+	cbz	w3, .L768
 	.loc 2 1319 0
 	ldr	x2, [x29, 144]
 	.loc 2 1316 0
 	add	x19, x19, :lo12:.LANCHOR27
 	.loc 2 1319 0
 	ldr	x3, [x2, #:lo12:.LANCHOR132]
-.LVL1049:
-.L768:
+.LVL1051:
+.L769:
 	.loc 2 1316 0 discriminator 1
 	ldrh	w2, [x19]
 	cmp	w0, w2
-	bge	.L757
+	bge	.L758
 	.loc 2 1318 0 discriminator 3
 	sxtw	x5, w0
 	sub	w2, w0, w6
 	lsl	x4, x5, 1
 	sxtw	x2, w2
 	add	w0, w0, 1
-.LVL1050:
+.LVL1052:
 	.loc 2 1319 0 discriminator 3
 	ldr	w5, [x3, x5, lsl 2]
 	sxth	w0, w0
-.LVL1051:
+.LVL1053:
 	.loc 2 1318 0 discriminator 3
 	ldrh	w7, [x1, x4]
 	strh	w7, [x1, x2, lsl 1]
@@ -9961,14 +9981,14 @@ FtlScanSysBlk:
 	str	w5, [x3, x2, lsl 2]
 	.loc 2 1320 0 discriminator 3
 	strh	wzr, [x1, x4]
-	b	.L768
-.LVL1052:
-.L767:
+	b	.L769
+.LVL1054:
+.L768:
 	add	w0, w0, 1
-.LVL1053:
+.LVL1055:
 	sxth	w0, w0
-.LVL1054:
-	b	.L766
+.LVL1056:
+	b	.L767
 	.cfi_endproc
 .LFE270:
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
@@ -9980,7 +10000,7 @@ FtlMapTblRecovery:
 .LFB275:
 	.loc 2 1466 0
 	.cfi_startproc
-.LVL1055:
+.LVL1057:
 	stp	x29, x30, [sp, -144]!
 	.cfi_def_cfa_offset 144
 	.cfi_offset 29, -144
@@ -10009,20 +10029,20 @@ FtlMapTblRecovery:
 	.cfi_offset 22, -104
 	.loc 2 1470 0
 	ldr	x21, [x0, 40]
-.LVL1056:
+.LVL1058:
 	.loc 2 1471 0
 	ldr	x22, [x0, 16]
-.LVL1057:
+.LVL1059:
 	.loc 2 1477 0
 	lsl	w2, w23, 2
 	.loc 2 1472 0
 	ldr	x0, [x0, 24]
-.LVL1058:
+.LVL1060:
 	str	x0, [x29, 128]
-.LVL1059:
+.LVL1061:
 	.loc 2 1474 0
 	ldrh	w0, [x19, 8]
-.LVL1060:
+.LVL1062:
 	.loc 2 1466 0
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
@@ -10034,11 +10054,11 @@ FtlMapTblRecovery:
 	mov	w27, 0
 	.loc 2 1474 0
 	str	w0, [x29, 140]
-.LVL1061:
+.LVL1063:
 	.loc 2 1477 0
 	mov	x0, x21
 	bl	ftl_memset
-.LVL1062:
+.LVL1064:
 	str	x20, [x29, 120]
 	.loc 2 1478 0
 	adrp	x7, .LANCHOR39
@@ -10059,7 +10079,7 @@ FtlMapTblRecovery:
 	mov	w0, -1
 	.loc 2 1479 0
 	str	x25, [x3, 16]
-.LVL1063:
+.LVL1065:
 	.loc 2 1481 0
 	strh	w0, [x19]
 	.loc 2 1482 0
@@ -10067,7 +10087,7 @@ FtlMapTblRecovery:
 	.loc 2 1485 0
 	mov	w0, 1
 	str	w0, [x19, 56]
-.LVL1064:
+.LVL1066:
 	.loc 2 1488 0
 	ldr	w0, [x29, 140]
 	sub	w0, w0, #1
@@ -10075,17 +10095,17 @@ FtlMapTblRecovery:
 	.loc 2 1530 0
 	add	x0, x24, :lo12:.LANCHOR20
 	str	x0, [x29, 112]
-.LVL1065:
-.L792:
+.LVL1067:
+.L793:
 	.loc 2 1486 0 discriminator 1
 	ldr	w0, [x29, 140]
 	cmp	w27, w0
-	bge	.L809
+	bge	.L810
 	.loc 2 1488 0
 	ldr	w0, [x29, 136]
 	sxtw	x28, w27
 	cmp	w27, w0
-	bne	.L793
+	bne	.L794
 	.loc 2 1490 0
 	lsl	x0, x28, 1
 	mov	w1, 1
@@ -10093,12 +10113,12 @@ FtlMapTblRecovery:
 	ldrh	w0, [x22, x0]
 	.loc 2 1494 0
 	mov	w22, 0
-.LVL1066:
+.LVL1068:
 	.loc 2 1490 0
 	bl	FtlGetLastWrittenPage
-.LVL1067:
+.LVL1069:
 	sxth	w26, w0
-.LVL1068:
+.LVL1070:
 	.loc 2 1491 0
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
@@ -10109,52 +10129,52 @@ FtlMapTblRecovery:
 	.loc 2 1493 0
 	ldr	w0, [x0, x28, lsl 2]
 	str	w0, [x19, 48]
-.LVL1069:
+.LVL1071:
 	.loc 2 1496 0
 	ldr	x0, [x29, 120]
 	add	x20, x0, :lo12:.LANCHOR108
-.LVL1070:
-.L794:
+.LVL1072:
+.L795:
 	.loc 2 1494 0 discriminator 1
 	cmp	w22, w26
-	ble	.L796
-.LVL1071:
-.L809:
+	ble	.L797
+.LVL1073:
+.L810:
 	.loc 2 1547 0
 	mov	x0, x19
 	bl	ftl_free_no_use_map_blk
-.LVL1072:
+.LVL1074:
 	.loc 2 1548 0
 	adrp	x0, .LANCHOR20
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x0, #:lo12:.LANCHOR20]
 	cmp	w1, w0
-	bne	.L798
+	bne	.L799
 	.loc 2 1550 0
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.LVL1073:
-.L798:
+.LVL1075:
+.L799:
 	.loc 2 1553 0
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-.LVL1074:
+.LVL1076:
 	.loc 2 1555 0
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-.LVL1075:
+.LVL1077:
 	.loc 2 1557 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-.LVL1076:
+.LVL1078:
 	ldp	x21, x22, [sp, 32]
-.LVL1077:
+.LVL1079:
 	ldp	x23, x24, [sp, 48]
-.LVL1078:
+.LVL1080:
 	ldp	x25, x26, [sp, 64]
-.LVL1079:
+.LVL1081:
 	ldp	x27, x28, [sp, 80]
-.LVL1080:
+.LVL1082:
 	ldp	x29, x30, [sp], 144
 	.cfi_remember_state
 	.cfi_restore 30
@@ -10170,10 +10190,10 @@ FtlMapTblRecovery:
 	.cfi_restore 19
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
-.LVL1081:
+.LVL1083:
 	ret
-.LVL1082:
-.L796:
+.LVL1084:
+.L797:
 	.cfi_restore_state
 	.loc 2 1496 0
 	ldrh	w0, [x24]
@@ -10186,32 +10206,32 @@ FtlMapTblRecovery:
 	.loc 2 1497 0
 	mov	x0, x20
 	bl	FlashReadPages
-.LVL1083:
+.LVL1085:
 	.loc 2 1500 0
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L795
+	beq	.L796
 	.loc 2 1502 0
 	ldrh	w0, [x25, 8]
 	cmp	w23, w0
-	bls	.L795
+	bls	.L796
 	.loc 2 1502 0 is_stmt 0 discriminator 1
 	ldrh	w2, [x25]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
-	bne	.L795
+	bne	.L796
 	.loc 2 1504 0 is_stmt 1
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x20, 4]
 	str	w1, [x21, x0]
-.L795:
+.L796:
 	add	w22, w22, 1
-.LVL1084:
-	sxth	w22, w22
-.LVL1085:
-	b	.L794
 .LVL1086:
-.L793:
+	sxth	w22, w22
+.LVL1087:
+	b	.L795
+.LVL1088:
+.L794:
 	.loc 2 1510 0
 	ldr	x0, [x26, #:lo12:.LANCHOR39]
 	.loc 2 1512 0
@@ -10232,30 +10252,30 @@ FtlMapTblRecovery:
 	.loc 2 1512 0
 	mov	x0, x20
 	bl	FlashReadPages
-.LVL1087:
+.LVL1089:
 	.loc 2 1515 0
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L811
+	beq	.L812
 	.loc 2 1515 0 is_stmt 0 discriminator 1
 	ldrh	w1, [x25]
 	ldrh	w0, [x19, 4]
 	cmp	w1, w0
-	bne	.L811
+	bne	.L812
 	.loc 2 1515 0 discriminator 2
 	ldrh	w1, [x25, 8]
 	mov	w0, 64245
 	cmp	w1, w0
-	beq	.L800
-.L811:
+	beq	.L801
+.L812:
 	mov	w5, 0
-.L801:
-.LVL1088:
+.L802:
+.LVL1090:
 	.loc 2 1530 0 is_stmt 1 discriminator 1
 	ldr	x0, [x29, 112]
 	ldrh	w0, [x0]
 	cmp	w5, w0
-	bge	.L807
+	bge	.L808
 	.loc 2 1532 0
 	ldrh	w0, [x28]
 	.loc 2 1533 0
@@ -10270,32 +10290,32 @@ FtlMapTblRecovery:
 	.loc 2 1533 0
 	mov	x0, x20
 	bl	FlashReadPages
-.LVL1089:
+.LVL1091:
 	.loc 2 1536 0
 	ldr	w0, [x20]
 	ldr	w5, [x29, 108]
 	cmn	w0, #1
-	beq	.L805
+	beq	.L806
 	.loc 2 1538 0
 	ldrh	w0, [x25, 8]
 	cmp	w23, w0
-	bls	.L805
+	bls	.L806
 	.loc 2 1538 0 is_stmt 0 discriminator 1
 	ldrh	w2, [x25]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
-	bne	.L805
+	bne	.L806
 	.loc 2 1540 0 is_stmt 1
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x20, 4]
 	str	w1, [x21, x0]
-.L805:
+.L806:
 	add	w5, w5, 1
 	sxth	w5, w5
-.LVL1090:
-	b	.L801
-.LVL1091:
-.L800:
+.LVL1092:
+	b	.L802
+.LVL1093:
+.L801:
 	.loc 2 1518 0 discriminator 1
 	ldrh	w5, [x24, #:lo12:.LANCHOR20]
 	.loc 2 1520 0 discriminator 1
@@ -10303,41 +10323,41 @@ FtlMapTblRecovery:
 	ldr	x10, [x26, #:lo12:.LANCHOR39]
 	.loc 2 1518 0 discriminator 1
 	sub	w5, w5, #1
-.L802:
-.LVL1092:
+.L803:
+.LVL1094:
 	cmp	w0, w5
-	blt	.L804
-.LVL1093:
-.L807:
+	blt	.L805
+.LVL1095:
+.L808:
 	add	w4, w27, 1
 	sxth	w27, w4
-.LVL1094:
-	b	.L792
-.LVL1095:
-.L804:
+.LVL1096:
+	b	.L793
+.LVL1097:
+.L805:
 	.loc 2 1520 0
 	lsl	w2, w0, 1
 	sxtw	x2, w2
 	lsl	x1, x2, 2
 	ldrh	w1, [x10, x1]
-.LVL1096:
+.LVL1098:
 	.loc 2 1521 0
 	cmp	w23, w1
-	bls	.L803
+	bls	.L804
 	.loc 2 1523 0
 	add	x2, x2, 1
 	ubfiz	x1, x1, 2, 16
-.LVL1097:
+.LVL1099:
 	ldr	w2, [x10, x2, lsl 2]
-.LVL1098:
+.LVL1100:
 	str	w2, [x21, x1]
-.LVL1099:
-.L803:
+.LVL1101:
+.L804:
 	add	w0, w0, 1
-.LVL1100:
+.LVL1102:
 	sxth	w0, w0
-.LVL1101:
-	b	.L802
+.LVL1103:
+	b	.L803
 	.cfi_endproc
 .LFE275:
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
@@ -10392,7 +10412,7 @@ FtlLoadVonderInfo:
 	str	x1, [x0, 40]
 	.loc 2 1570 0
 	bl	FtlMapTblRecovery
-.LVL1102:
+.LVL1104:
 	.loc 2 1573 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
@@ -10446,7 +10466,7 @@ FtlL2PDataInit:
 	.loc 2 1578 0
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL1103:
+.LVL1105:
 	.loc 2 1579 0
 	ldrh	w0, [x21, #:lo12:.LANCHOR33]
 	mov	w1, 255
@@ -10454,7 +10474,7 @@ FtlL2PDataInit:
 	mul	w2, w2, w0
 	ldr	x0, [x23, #:lo12:.LANCHOR136]
 	bl	ftl_memset
-.LVL1104:
+.LVL1106:
 	adrp	x0, .LANCHOR56
 	ldrh	w3, [x21, #:lo12:.LANCHOR33]
 	.loc 2 1584 0
@@ -10465,12 +10485,12 @@ FtlL2PDataInit:
 	mov	w2, -1
 	ldrh	w5, [x22, #:lo12:.LANCHOR23]
 	add	x3, x0, x3, lsl 4
-.LVL1105:
-.L822:
+.LVL1107:
+.L823:
 	add	x4, x1, x5
 	.loc 2 1580 0 is_stmt 0 discriminator 1
 	cmp	x0, x3
-	bne	.L823
+	bne	.L824
 	.loc 2 1586 0 is_stmt 1
 	adrp	x1, .LANCHOR144
 	add	x0, x1, :lo12:.LANCHOR144
@@ -10527,7 +10547,7 @@ FtlL2PDataInit:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.L823:
+.L824:
 	.cfi_restore_state
 	.loc 2 1584 0 discriminator 3
 	and	x1, x1, -4
@@ -10541,7 +10561,7 @@ FtlL2PDataInit:
 	str	x1, [x0, 8]
 	add	x0, x0, 16
 	mov	x1, x4
-	b	.L822
+	b	.L823
 	.cfi_endproc
 .LFE277:
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
@@ -10561,12 +10581,12 @@ FtlLoadMapInfo:
 	.cfi_def_cfa_register 29
 	.loc 2 1600 0
 	bl	FtlL2PDataInit
-.LVL1106:
+.LVL1108:
 	.loc 2 1602 0
 	adrp	x0, .LANCHOR144
 	add	x0, x0, :lo12:.LANCHOR144
 	bl	FtlMapTblRecovery
-.LVL1107:
+.LVL1109:
 	.loc 2 1605 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
@@ -10632,7 +10652,7 @@ FtlVariablesInit:
 	ldr	x0, [x0, #:lo12:.LANCHOR36]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL1108:
+.LVL1110:
 	.loc 3 503 0
 	adrp	x0, .LANCHOR40
 	ldrh	w2, [x19, #:lo12:.LANCHOR6]
@@ -10640,7 +10660,7 @@ FtlVariablesInit:
 	ldr	x0, [x0, #:lo12:.LANCHOR40]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL1109:
+.LVL1111:
 	.loc 3 504 0
 	adrp	x0, .LANCHOR126
 	ldrh	w2, [x19, #:lo12:.LANCHOR6]
@@ -10648,27 +10668,27 @@ FtlVariablesInit:
 	ldr	x0, [x0, #:lo12:.LANCHOR126]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL1110:
+.LVL1112:
 	.loc 3 505 0
 	mov	w2, 48
 	mov	w1, 0
 	adrp	x0, .LANCHOR79
 	add	x0, x0, :lo12:.LANCHOR79
 	bl	ftl_memset
-.LVL1111:
+.LVL1113:
 	.loc 3 506 0
 	mov	w2, 512
 	mov	w1, 0
 	adrp	x0, .LANCHOR83
 	add	x0, x0, :lo12:.LANCHOR83
 	bl	ftl_memset
-.LVL1112:
+.LVL1114:
 	.loc 3 507 0
 	bl	FtlGcBufInit
-.LVL1113:
+.LVL1115:
 	.loc 3 508 0
 	bl	FtlL2PDataInit
-.LVL1114:
+.LVL1116:
 	.loc 3 510 0
 	ldr	x19, [sp, 16]
 	mov	w0, 0
@@ -10740,7 +10760,7 @@ SupperBlkListInit:
 	add	x26, x26, :lo12:.LANCHOR13
 	.loc 2 2071 0
 	bl	ftl_memset
-.LVL1115:
+.LVL1117:
 	.loc 2 2077 0
 	mov	w21, 0
 	.loc 2 2072 0
@@ -10757,7 +10777,7 @@ SupperBlkListInit:
 	adrp	x0, .LANCHOR42
 	.loc 2 2076 0
 	strh	wzr, [x22, #:lo12:.LANCHOR48]
-.LVL1116:
+.LVL1118:
 	.loc 2 2081 0
 	adrp	x27, .LANCHOR3
 	.loc 2 2073 0
@@ -10765,12 +10785,12 @@ SupperBlkListInit:
 	.loc 2 2074 0
 	adrp	x0, .LANCHOR44
 	str	xzr, [x0, #:lo12:.LANCHOR44]
-.LVL1117:
-.L830:
+.LVL1119:
+.L831:
 	.loc 2 2079 0 discriminator 1
 	ldrh	w0, [x25]
 	cmp	w19, w0
-	bcs	.L836
+	bcs	.L837
 	.loc 2 2084 0
 	adrp	x0, .LANCHOR19
 	.loc 2 2081 0
@@ -10779,37 +10799,37 @@ SupperBlkListInit:
 	mov	x6, 0
 	mov	w5, 0
 	ldrh	w7, [x0, #:lo12:.LANCHOR19]
-	b	.L837
-.LVL1118:
-.L832:
+	b	.L838
+.LVL1120:
+.L833:
 	.loc 2 2082 0
 	ldrb	w0, [x26, x6]
 	mov	w1, w19
 	bl	V2P_block
-.LVL1119:
+.LVL1121:
 	.loc 2 2083 0
 	bl	FtlBbmIsBadBlock
-.LVL1120:
-	cbnz	w0, .L831
+.LVL1122:
+	cbnz	w0, .L832
 	.loc 2 2084 0
 	add	w5, w5, w7
-.LVL1121:
+.LVL1123:
 	and	w5, w5, 65535
-.LVL1122:
-.L831:
+.LVL1124:
+.L832:
 	add	x6, x6, 1
-.LVL1123:
-.L837:
+.LVL1125:
+.L838:
 	.loc 2 2081 0 discriminator 1
 	cmp	w8, w6, uxth
-	bhi	.L832
+	bhi	.L833
 	.loc 2 2086 0
-	cbz	w5, .L839
+	cbz	w5, .L840
 	.loc 2 2087 0
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.LVL1124:
-.L833:
+.LVL1126:
+.L834:
 	.loc 2 2088 0
 	ldr	x1, [x24, #:lo12:.LANCHOR41]
 	mov	w0, 6
@@ -10819,73 +10839,73 @@ SupperBlkListInit:
 	adrp	x0, .LANCHOR51
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w19
-	beq	.L834
+	beq	.L835
 	.loc 2 2091 0 discriminator 1
 	adrp	x0, .LANCHOR52
 	.loc 2 2090 0 discriminator 1
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
-	beq	.L834
+	beq	.L835
 	.loc 2 2092 0
 	adrp	x0, .LANCHOR53
 	.loc 2 2091 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w19
-	beq	.L834
+	beq	.L835
 	.loc 2 2094 0
 	adrp	x1, .LANCHOR43
 	ubfiz	x0, x19, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR43]
 	ldrh	w0, [x1, x0]
-	cbnz	w0, .L835
+	cbnz	w0, .L836
 	.loc 2 2095 0
 	add	w21, w21, 1
-.LVL1125:
+.LVL1127:
 	.loc 2 2096 0
 	mov	w0, w19
 	.loc 2 2095 0
 	and	w21, w21, 65535
-.LVL1126:
+.LVL1128:
 	.loc 2 2096 0
 	bl	INSERT_FREE_LIST
-.LVL1127:
-.L834:
+.LVL1129:
+.L835:
 	.loc 2 2079 0 discriminator 2
 	add	w19, w19, 1
-.LVL1128:
-	and	w19, w19, 65535
-.LVL1129:
-	b	.L830
 .LVL1130:
-.L839:
-	mov	w5, 0
+	and	w19, w19, 65535
 .LVL1131:
-	b	.L833
+	b	.L831
 .LVL1132:
-.L835:
+.L840:
+	mov	w5, 0
+.LVL1133:
+	b	.L834
+.LVL1134:
+.L836:
 	.loc 2 2098 0
 	add	w20, w20, 1
-.LVL1133:
+.LVL1135:
 	.loc 2 2099 0
 	mov	w0, w19
 	.loc 2 2098 0
 	and	w20, w20, 65535
-.LVL1134:
+.LVL1136:
 	.loc 2 2099 0
 	bl	INSERT_DATA_LIST
-.LVL1135:
-	b	.L834
-.L836:
+.LVL1137:
+	b	.L835
+.L837:
 	.loc 2 2103 0
 	strh	w20, [x23, #:lo12:.LANCHOR45]
 	.loc 2 2105 0
 	add	w20, w20, w21
-.LVL1136:
+.LVL1138:
 	.loc 2 2104 0
 	strh	w21, [x22, #:lo12:.LANCHOR48]
 	.loc 2 2105 0
 	cmp	w20, w0
-	ble	.L838
+	ble	.L839
 	.loc 2 2105 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR155
 	adrp	x0, .LC1
@@ -10893,15 +10913,15 @@ SupperBlkListInit:
 	add	x1, x1, :lo12:.LANCHOR155
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1137:
-.L838:
+.LVL1139:
+.L839:
 	.loc 2 2107 0 is_stmt 1
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
-.LVL1138:
+.LVL1140:
 	ldp	x21, x22, [sp, 32]
-.LVL1139:
+.LVL1141:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
@@ -10929,7 +10949,7 @@ ftl_check_vpc:
 .LFB290:
 	.loc 2 2223 0
 	.cfi_startproc
-.LVL1140:
+.LVL1142:
 	stp	x29, x30, [sp, -112]!
 	.cfi_def_cfa_offset 112
 	.cfi_offset 29, -112
@@ -10971,22 +10991,22 @@ ftl_check_vpc:
 	adrp	x20, check_vpc_table
 	.loc 2 2229 0
 	bl	printf
-.LVL1141:
+.LVL1143:
 	.loc 2 2231 0
 	add	x19, x20, :lo12:check_vpc_table
 	mov	w2, 8192
 	mov	w1, 0
 	mov	x0, x19
 	bl	ftl_memset
-.LVL1142:
-.L842:
+.LVL1144:
+.L843:
 	.loc 2 2232 0 discriminator 1
 	ldr	w0, [x23]
 	cmp	w22, w0
-	bcc	.L844
+	bcc	.L845
 	.loc 2 2243 0 discriminator 1
 	adrp	x22, .LANCHOR5
-.LVL1143:
+.LVL1145:
 	.loc 2 2247 0 discriminator 1
 	adrp	x24, .LC92
 	.loc 2 2243 0 discriminator 1
@@ -10999,18 +11019,18 @@ ftl_check_vpc:
 	mov	w19, 0
 	.loc 2 2245 0 discriminator 1
 	adrp	x25, .LANCHOR43
-.LVL1144:
-.L845:
+.LVL1146:
+.L846:
 	.loc 2 2243 0 discriminator 1
 	ldrh	w0, [x22]
 	cmp	w0, w19
-	bhi	.L847
+	bhi	.L848
 	.loc 2 2255 0
 	adrp	x0, .LANCHOR47
 	ldr	x19, [x0, #:lo12:.LANCHOR47]
-.LVL1145:
-	cbz	x19, .L848
-.LBB238:
+.LVL1147:
+	cbz	x19, .L849
+.LBB242:
 	.loc 2 2257 0
 	adrp	x0, .LANCHOR48
 	.loc 2 2263 0
@@ -11019,7 +11039,7 @@ ftl_check_vpc:
 	add	x25, x25, :lo12:.LC93
 	.loc 2 2257 0
 	ldrh	w26, [x0, #:lo12:.LANCHOR48]
-.LVL1146:
+.LVL1148:
 	.loc 2 2258 0
 	adrp	x0, .LANCHOR41
 	mov	x24, x0
@@ -11038,25 +11058,25 @@ ftl_check_vpc:
 	movk	x1, 0xaaab, lsl 0
 	mul	x19, x19, x1
 	and	w19, w19, 65535
-.LVL1147:
-.L849:
+.LVL1149:
+.L850:
 	.loc 2 2259 0 discriminator 1
 	cmp	w22, w26
-	bne	.L851
-.LVL1148:
-.L848:
-.LBE238:
+	bne	.L852
+.LVL1150:
+.L849:
+.LBE242:
 	.loc 2 2271 0
-	cbz	w23, .L841
-.LVL1149:
+	cbz	w23, .L842
+.LVL1151:
 	.loc 2 2271 0 is_stmt 0 discriminator 1
 	adrp	x0, .LC1
 	mov	w2, 2271
 	add	x1, x21, :lo12:.LANCHOR156
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1150:
-.L841:
+.LVL1152:
+.L842:
 	.loc 2 2272 0 is_stmt 1
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11079,36 +11099,36 @@ ftl_check_vpc:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1151:
-.L844:
+.LVL1153:
+.L845:
 	.cfi_restore_state
 	.loc 2 2234 0
 	mov	w2, 0
 	add	x1, x29, 108
 	mov	w0, w22
 	bl	log2phys
-.LVL1152:
+.LVL1154:
 	.loc 2 2235 0
 	ldr	w0, [x29, 108]
 	cmn	w0, #1
-	beq	.L843
+	beq	.L844
 	.loc 2 2237 0
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL1153:
+.LVL1155:
 	.loc 2 2238 0
 	and	x0, x0, 65535
 	ldrh	w1, [x19, x0, lsl 1]
 	add	w1, w1, 1
 	strh	w1, [x19, x0, lsl 1]
-.LVL1154:
-.L843:
+.LVL1156:
+.L844:
 	.loc 2 2232 0 discriminator 2
 	add	w22, w22, 1
-.LVL1155:
-	b	.L842
-.LVL1156:
-.L847:
+.LVL1157:
+	b	.L843
+.LVL1158:
+.L848:
 	.loc 2 2245 0
 	ldr	x0, [x25, #:lo12:.LANCHOR43]
 	ubfiz	x28, x19, 1, 16
@@ -11116,66 +11136,66 @@ ftl_check_vpc:
 	ldrh	w2, [x0, x28]
 	ldrh	w3, [x26, x27, lsl 1]
 	cmp	w2, w3
-	beq	.L846
+	beq	.L847
 	.loc 2 2247 0
 	mov	w1, w19
 	mov	x0, x24
 	bl	printf
-.LVL1157:
+.LVL1159:
 	.loc 2 2248 0
 	ldr	x0, [x25, #:lo12:.LANCHOR43]
 	mov	w1, 65535
 	ldrh	w0, [x0, x28]
 	cmp	w0, w1
-	beq	.L846
+	beq	.L847
 	.loc 2 2248 0 is_stmt 0 discriminator 1
 	ldrh	w1, [x26, x27, lsl 1]
 	.loc 2 2250 0 is_stmt 1 discriminator 1
 	cmp	w1, w0
 	csinc	w23, w23, wzr, ls
-.LVL1158:
-.L846:
+.LVL1160:
+.L847:
 	.loc 2 2243 0 discriminator 2
 	add	w19, w19, 1
-.LVL1159:
-	and	w19, w19, 65535
-.LVL1160:
-	b	.L845
 .LVL1161:
-.L851:
-.LBB239:
+	and	w19, w19, 65535
+.LVL1162:
+	b	.L846
+.LVL1163:
+.L852:
+.LBB243:
 	.loc 2 2261 0
 	ldr	x1, [x27, #:lo12:.LANCHOR43]
 	ubfiz	x0, x19, 1, 16
 	ldrh	w2, [x1, x0]
-	cbz	w2, .L850
+	cbz	w2, .L851
 	.loc 2 2263 0
 	ldrh	w3, [x20, w19, sxtw 1]
 	.loc 2 2264 0
 	mov	w23, 1
-.LVL1162:
+.LVL1164:
 	.loc 2 2263 0
 	mov	w1, w19
 	mov	x0, x25
 	bl	printf
-.LVL1163:
-.L850:
+.LVL1165:
+.L851:
 	.loc 2 2266 0
 	ldr	x0, [x24, #:lo12:.LANCHOR41]
 	umull	x19, w19, w28
-.LVL1164:
+.LVL1166:
 	ldrh	w19, [x0, x19]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L848
-.LVL1165:
+	beq	.L849
+.LVL1167:
 	.loc 2 2259 0 discriminator 2
 	add	w22, w22, 1
-.LVL1166:
+.LVL1168:
 	and	w22, w22, 65535
-.LVL1167:
-	b	.L849
-.LBE239:
+.LVL1169:
+	b	.L850
+.LBE243:
 	.cfi_endproc
 .LFE290:
 	.size	ftl_check_vpc, .-ftl_check_vpc
@@ -11215,7 +11235,7 @@ FtlGcPageVarInit:
 	ldr	x0, [x0, #:lo12:.LANCHOR98]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL1168:
+.LVL1170:
 	.loc 5 206 0
 	ldrh	w2, [x19, #:lo12:.LANCHOR21]
 	mov	w0, 12
@@ -11224,7 +11244,7 @@ FtlGcPageVarInit:
 	adrp	x0, .LANCHOR100
 	ldr	x0, [x0, #:lo12:.LANCHOR100]
 	bl	ftl_memset
-.LVL1169:
+.LVL1171:
 	.loc 5 208 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -11234,7 +11254,7 @@ FtlGcPageVarInit:
 	.cfi_def_cfa 31, 0
 	.loc 5 207 0
 	b	FtlGcBufInit
-.LVL1170:
+.LVL1172:
 	.cfi_endproc
 .LFE309:
 	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
@@ -11246,7 +11266,7 @@ FtlGcScanTempBlk:
 .LFB310:
 	.loc 5 211 0
 	.cfi_startproc
-.LVL1171:
+.LVL1173:
 	stp	x29, x30, [sp, -112]!
 	.cfi_def_cfa_offset 112
 	.cfi_offset 29, -112
@@ -11266,10 +11286,10 @@ FtlGcScanTempBlk:
 	stp	x27, x28, [sp, 80]
 	.loc 5 221 0
 	mov	w0, 65535
-.LVL1172:
+.LVL1174:
 	.loc 5 220 0
 	ldrh	w19, [x21, #:lo12:.LANCHOR157]
-.LVL1173:
+.LVL1175:
 	.cfi_offset 27, -32
 	.cfi_offset 28, -24
 	.loc 5 211 0
@@ -11282,27 +11302,27 @@ FtlGcScanTempBlk:
 	.cfi_offset 26, -40
 	.loc 5 221 0
 	cmp	w19, w0
-	beq	.L885
+	beq	.L886
 	.loc 5 223 0
-	cbnz	w19, .L869
-.L870:
+	cbnz	w19, .L870
+.L871:
 	.loc 5 224 0
 	bl	FtlGcPageVarInit
-.LVL1174:
-	b	.L871
-.LVL1175:
-.L885:
+.LVL1176:
+	b	.L872
+.LVL1177:
+.L886:
 	.loc 5 222 0
 	mov	w19, 0
-.LVL1176:
-.L869:
+.LVL1178:
+.L870:
 	.loc 5 223 0 discriminator 1
 	adrp	x0, .LANCHOR19
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	cmp	w0, w28
-	beq	.L870
-.LVL1177:
-.L871:
+	beq	.L871
+.LVL1179:
+.L872:
 	.loc 5 235 0
 	adrp	x27, .LANCHOR23
 	add	x27, x27, :lo12:.LANCHOR23
@@ -11310,15 +11330,15 @@ FtlGcScanTempBlk:
 	mov	w22, 0
 	.loc 5 228 0
 	mov	w23, 65535
-.LVL1178:
-.L879:
+.LVL1180:
+.L880:
 	ldrh	w0, [x20]
 	.loc 5 226 0
 	strb	wzr, [x20, 8]
-.LVL1179:
+.LVL1181:
 	.loc 5 228 0
 	cmp	w0, w23
-	beq	.L886
+	beq	.L887
 	.loc 5 236 0
 	adrp	x25, .LANCHOR24
 	.loc 5 231 0
@@ -11327,8 +11347,8 @@ FtlGcScanTempBlk:
 	add	x25, x25, :lo12:.LANCHOR24
 	.loc 5 231 0
 	add	x26, x26, :lo12:.LANCHOR3
-.L882:
-.LVL1180:
+.L883:
+.LVL1182:
 	.loc 5 235 0
 	adrp	x1, .LANCHOR93
 	.loc 5 234 0
@@ -11349,60 +11369,60 @@ FtlGcScanTempBlk:
 	ldrh	w10, [x25]
 	add	x1, x1, 8
 	add	x1, x20, x1, lsl 1
-.LVL1181:
-.L873:
+.LVL1183:
+.L874:
 	.loc 5 231 0 discriminator 1
 	cmp	x1, x5
-	bne	.L875
+	bne	.L876
 	.loc 5 240 0
 	mov	w1, w3
 	str	w3, [x29, 108]
 	mov	w2, 0
 	bl	FlashReadPages
-.LVL1182:
+.LVL1184:
 	ldr	w3, [x29, 108]
 	.loc 5 241 0
 	mov	x11, 0
 	ubfiz	x12, x3, 5, 16
-.LVL1183:
-.L876:
+.LVL1185:
+.L877:
 	.loc 5 241 0 is_stmt 0 discriminator 1
 	cmp	x11, x12
-	bne	.L880
+	bne	.L881
 	.loc 5 264 0 is_stmt 1
 	add	w19, w19, 1
-.LVL1184:
+.LVL1186:
 	.loc 5 266 0
 	add	w22, w22, 1
-.LVL1185:
+.LVL1187:
 	.loc 5 264 0
 	and	w19, w19, 65535
-.LVL1186:
+.LVL1188:
 	.loc 5 268 0
 	cmp	w28, w22
 	adrp	x1, .LANCHOR19
-	bls	.L881
-.L883:
+	bls	.L882
+.L884:
 	.loc 5 274 0
 	ldrh	w0, [x1, #:lo12:.LANCHOR19]
 	cmp	w0, w19
-	bhi	.L882
-.L886:
+	bhi	.L883
+.L887:
 	.loc 5 227 0
 	mov	w2, 0
-	b	.L872
-.LVL1187:
-.L875:
+	b	.L873
+.LVL1189:
+.L876:
 	.loc 5 232 0
 	ldrh	w4, [x5]
-.LVL1188:
+.LVL1190:
 	.loc 5 233 0
 	cmp	w4, w23
-	beq	.L874
+	beq	.L875
 	.loc 5 234 0
 	ubfiz	x2, x3, 5, 16
 	orr	w4, w19, w4, lsl 10
-.LVL1189:
+.LVL1191:
 	add	x2, x0, x2
 	str	w4, [x2, 4]
 	.loc 5 235 0
@@ -11414,49 +11434,49 @@ FtlGcScanTempBlk:
 	mul	w4, w3, w10
 	.loc 5 237 0
 	add	w3, w3, 1
-.LVL1190:
+.LVL1192:
 	and	w3, w3, 65535
-.LVL1191:
+.LVL1193:
 	.loc 5 236 0
 	asr	w4, w4, 2
 	add	x4, x8, x4, sxtw 2
 	str	x4, [x2, 16]
-.L874:
+.L875:
 	add	x5, x5, 2
-.LVL1192:
-	b	.L873
-.LVL1193:
-.L880:
+.LVL1194:
+	b	.L874
+.LVL1195:
+.L881:
 	.loc 5 242 0
 	ldr	x6, [x24, #:lo12:.LANCHOR120]
 	add	x5, x6, x11
 	ldr	w4, [x5, 4]
-.LVL1194:
+.LVL1196:
 	.loc 5 243 0
 	lsr	w0, w4, 10
 	bl	P2V_plane
-.LVL1195:
+.LVL1197:
 	and	w2, w0, 65535
-.LVL1196:
+.LVL1198:
 	.loc 5 245 0
 	ldr	w0, [x6, x11]
-.LVL1197:
-	cbnz	w0, .L877
+.LVL1199:
+	cbnz	w0, .L878
 	.loc 5 247 0
 	ldr	x0, [x5, 16]
-.LVL1198:
+.LVL1200:
 	add	x11, x11, 32
 	.loc 5 248 0
 	ldrh	w1, [x0]
 	cmp	w1, w23
-	bne	.L878
+	bne	.L879
 	.loc 5 249 0
 	adrp	x0, .LANCHOR153
-.LVL1199:
+.LVL1201:
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR153]
-.LVL1200:
-.L872:
+.LVL1202:
+.L873:
 	.loc 5 282 0
 	strh	w19, [x20, 2]
 	.loc 5 281 0
@@ -11470,67 +11490,67 @@ FtlGcScanTempBlk:
 	.loc 5 284 0
 	mov	x0, x20
 	bl	ftl_sb_update_avl_pages
-.LVL1201:
+.LVL1203:
 	.loc 5 285 0
-	b	.L884
-.LVL1202:
-.L878:
+	b	.L885
+.LVL1204:
+.L879:
 	.loc 5 252 0
 	ldp	w2, w0, [x0, 8]
-.LVL1203:
+.LVL1205:
 	mov	w1, w4
 	bl	FtlGcUpdatePage
-.LVL1204:
-	b	.L876
-.LVL1205:
-.L877:
+.LVL1206:
+	b	.L877
+.LVL1207:
+.L878:
 	.loc 5 256 0
 	adrp	x0, .LANCHOR43
 	ldrh	w1, [x20]
 	.loc 5 259 0
 	mov	w19, 0
-.LVL1206:
+.LVL1208:
 	.loc 5 256 0
 	ldr	x0, [x0, #:lo12:.LANCHOR43]
 	strh	wzr, [x0, x1, lsl 1]
 	.loc 5 257 0
 	ldrh	w0, [x20]
 	bl	INSERT_FREE_LIST
-.LVL1207:
+.LVL1209:
 	.loc 5 258 0
 	mov	w0, -1
 	strh	w0, [x20]
-.LVL1208:
+.LVL1210:
 	.loc 5 260 0
 	bl	FtlGcPageVarInit
-.LVL1209:
+.LVL1211:
 	.loc 5 261 0
-	b	.L879
-.LVL1210:
-.L881:
+	b	.L880
+.LVL1212:
+.L882:
 	.loc 5 268 0 discriminator 1
 	ldrh	w0, [x21, #:lo12:.LANCHOR157]
 	cmp	w0, w23
-	beq	.L883
+	beq	.L884
 	.loc 5 269 0
 	add	w0, w0, w22
 	strh	w0, [x21, #:lo12:.LANCHOR157]
 	.loc 5 270 0
 	ldrh	w0, [x1, #:lo12:.LANCHOR19]
 	cmp	w0, w19
-	bls	.L883
-.LVL1211:
-.L884:
+	bls	.L884
+.LVL1213:
+.L885:
 	.loc 5 286 0
 	ldp	x19, x20, [sp, 16]
-.LVL1212:
+.LVL1214:
 	mov	w0, -1
 	ldp	x21, x22, [sp, 32]
-.LVL1213:
+.LVL1215:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-.LVL1214:
+.LVL1216:
 	ldp	x29, x30, [sp], 112
 	.cfi_restore 30
 	.cfi_restore 29
@@ -11554,10 +11574,10 @@ FtlGcScanTempBlk:
 	.global	FlashTestBlk
 	.type	FlashTestBlk, %function
 FlashTestBlk:
-.LFB343:
-	.loc 1 193 0
+.LFB344:
+	.loc 1 197 0
 	.cfi_startproc
-.LVL1215:
+.LVL1217:
 	stp	x29, x30, [sp, -128]!
 	.cfi_def_cfa_offset 128
 	.cfi_offset 29, -128
@@ -11567,73 +11587,73 @@ FlashTestBlk:
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -112
 	.cfi_offset 20, -104
-	.loc 1 193 0
+	.loc 1 197 0
 	and	w19, w0, 65535
-	.loc 1 198 0
+	.loc 1 202 0
 	cmp	w19, 11
-	bls	.L894
-.LVL1216:
-.LBB242:
-.LBB243:
-	.loc 1 203 0
+	bls	.L895
+.LVL1218:
+.LBB246:
+.LBB247:
+	.loc 1 207 0
 	add	x0, x29, 64
-.LVL1217:
-	.loc 1 204 0
+.LVL1219:
+	.loc 1 208 0
 	mov	w2, 32
 	mov	w1, 165
-	.loc 1 202 0
+	.loc 1 206 0
 	adrp	x20, ftl_temp_buf
 	add	x20, x20, :lo12:ftl_temp_buf
-	.loc 1 203 0
+	.loc 1 207 0
 	stp	x20, x0, [x29, 40]
-	.loc 1 204 0
+	.loc 1 208 0
 	bl	ftl_memset
-.LVL1218:
-	.loc 1 206 0
+.LVL1220:
+	.loc 1 210 0
 	lsl	w19, w19, 10
-.LVL1219:
-	.loc 1 205 0
+.LVL1221:
+	.loc 1 209 0
 	mov	w2, 8
 	mov	w1, 90
 	mov	x0, x20
 	bl	ftl_memset
-.LVL1220:
-	.loc 1 207 0
+.LVL1222:
+	.loc 1 211 0
 	mov	w2, 1
-	.loc 1 206 0
+	.loc 1 210 0
 	str	w19, [x29, 36]
-	.loc 1 207 0
+	.loc 1 211 0
 	mov	w1, w2
 	add	x0, x29, 32
 	bl	FlashEraseBlocks
-.LVL1221:
-	.loc 1 208 0
+.LVL1223:
+	.loc 1 212 0
 	mov	w3, 1
 	add	x0, x29, 32
 	mov	w2, w3
 	mov	w1, w3
 	bl	FlashProgPages
-.LVL1222:
-	.loc 1 209 0
+.LVL1224:
+	.loc 1 213 0
 	ldr	w0, [x29, 32]
-	.loc 1 215 0
+	.loc 1 219 0
 	mov	w2, 1
 	mov	w1, 0
-	.loc 1 209 0
+	.loc 1 213 0
 	cmp	w0, 0
-	.loc 1 215 0
+	.loc 1 219 0
 	add	x0, x29, 32
-	.loc 1 209 0
+	.loc 1 213 0
 	csetm	w19, ne
 .LDL1:
-.LVL1223:
-	.loc 1 215 0
+.LVL1225:
+	.loc 1 219 0
 	bl	FlashEraseBlocks
-.LVL1224:
-.L892:
-.LBE243:
-.LBE242:
-	.loc 1 217 0
+.LVL1226:
+.L893:
+.LBE247:
+.LBE246:
+	.loc 1 221 0
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 128
@@ -11644,83 +11664,83 @@ FlashTestBlk:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1225:
-.L894:
+.LVL1227:
+.L895:
 	.cfi_restore_state
-	.loc 1 199 0
+	.loc 1 203 0
 	mov	w19, 0
-	b	.L892
+	b	.L893
 	.cfi_endproc
-.LFE343:
+.LFE344:
 	.size	FlashTestBlk, .-FlashTestBlk
 	.section	.text.FlashGetBadBlockList,"ax",@progbits
 	.align	2
 	.global	FlashGetBadBlockList
 	.type	FlashGetBadBlockList, %function
 FlashGetBadBlockList:
-.LFB344:
-	.loc 1 220 0
+.LFB345:
+	.loc 1 224 0
 	.cfi_startproc
-.LVL1226:
+.LVL1228:
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
 	.cfi_offset 30, -24
-	.loc 1 223 0
+	.loc 1 227 0
 	mov	w2, 256
-	.loc 1 220 0
+	.loc 1 224 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -16
 	.cfi_offset 20, -8
-	.loc 1 220 0
+	.loc 1 224 0
 	mov	x19, x0
 	mov	w20, w1
-	.loc 1 223 0
+	.loc 1 227 0
 	mov	w1, 255
-.LVL1227:
+.LVL1229:
 	bl	ftl_memset
-.LVL1228:
-	.loc 1 224 0
+.LVL1230:
+	.loc 1 228 0
 	adrp	x0, .LANCHOR107
 	mov	w1, w20
 	ldr	x2, [x0, #:lo12:.LANCHOR107]
 	mov	x0, x19
 	blr	x2
-.LVL1229:
+.LVL1231:
 	and	w0, w0, 65535
-.LVL1230:
-	.loc 1 225 0
+.LVL1232:
+	.loc 1 229 0
 	cmp	w0, 50
-	bls	.L897
-	.loc 1 226 0
+	bls	.L898
+	.loc 1 230 0
 	mov	w2, 256
 	mov	w1, 255
 	mov	x0, x19
-.LVL1231:
+.LVL1233:
 	bl	ftl_memset
-.LVL1232:
-	.loc 1 227 0
+.LVL1234:
+	.loc 1 231 0
 	mov	w0, 0
-.LVL1233:
-.L897:
-	.loc 1 229 0
+.LVL1235:
+.L898:
+	.loc 1 233 0
 	adrp	x1, .LANCHOR0+14
 	ldrh	w1, [x1, #:lo12:.LANCHOR0+14]
 	cmp	w1, 4
-	bne	.L901
+	bne	.L902
 	mov	x1, 0
-.L899:
-.LVL1234:
-	.loc 1 230 0 discriminator 1
+.L900:
+.LVL1236:
+	.loc 1 234 0 discriminator 1
 	cmp	w0, w1, uxth
-	bhi	.L900
-.LVL1235:
-.L901:
-	.loc 1 235 0
+	bhi	.L901
+.LVL1237:
+.L902:
+	.loc 1 239 0
 	ldp	x19, x20, [sp, 16]
-.LVL1236:
+.LVL1238:
 	ldp	x29, x30, [sp], 32
 	.cfi_remember_state
 	.cfi_restore 30
@@ -11729,35 +11749,35 @@ FlashGetBadBlockList:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1237:
-.L900:
+.LVL1239:
+.L901:
 	.cfi_restore_state
-	.loc 1 231 0 discriminator 3
+	.loc 1 235 0 discriminator 3
 	ldrh	w2, [x19, x1, lsl 1]
 	lsr	w2, w2, 1
 	strh	w2, [x19, x1, lsl 1]
-.LVL1238:
+.LVL1240:
 	add	x1, x1, 1
-.LVL1239:
-	b	.L899
+.LVL1241:
+	b	.L900
 	.cfi_endproc
-.LFE344:
+.LFE345:
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
 	.section	.text.ftl_memcpy,"ax",@progbits
 	.align	2
 	.global	ftl_memcpy
 	.type	ftl_memcpy, %function
 ftl_memcpy:
-.LFB346:
-	.loc 1 243 0
+.LFB347:
+	.loc 1 247 0
 	.cfi_startproc
-.LVL1240:
-	.loc 1 244 0
+.LVL1242:
+	.loc 1 248 0
 	uxtw	x2, w2
 	b	memcpy
-.LVL1241:
+.LVL1243:
 	.cfi_endproc
-.LFE346:
+.LFE347:
 	.size	ftl_memcpy, .-ftl_memcpy
 	.section	.text.FtlBbmTblFlush,"ax",@progbits
 	.align	2
@@ -11767,7 +11787,7 @@ FtlBbmTblFlush:
 .LFB226:
 	.loc 4 80 0
 	.cfi_startproc
-.LVL1242:
+.LVL1244:
 	stp	x29, x30, [sp, -96]!
 	.cfi_def_cfa_offset 96
 	.cfi_offset 29, -96
@@ -11823,12 +11843,12 @@ FtlBbmTblFlush:
 	.loc 4 89 0
 	mov	w1, 0
 	bl	ftl_memset
-.LVL1243:
-.L905:
+.LVL1245:
+.L906:
 	.loc 4 91 0 discriminator 1
 	ldrh	w0, [x26]
 	cmp	w24, w0
-	blt	.L906
+	blt	.L907
 	.loc 4 94 0
 	add	x19, x19, :lo12:.LANCHOR108
 	.loc 4 98 0
@@ -11838,12 +11858,12 @@ FtlBbmTblFlush:
 	mov	w1, 255
 	.loc 4 108 0
 	adrp	x24, .LC94
-.LVL1244:
+.LVL1246:
 	.loc 4 110 0
 	adrp	x26, .LANCHOR20
 	.loc 4 94 0
 	ldr	x27, [x19, 16]
-.LVL1245:
+.LVL1247:
 	.loc 4 108 0
 	add	x24, x24, :lo12:.LC94
 	.loc 4 110 0
@@ -11853,7 +11873,7 @@ FtlBbmTblFlush:
 	.loc 4 95 0
 	mov	x0, x27
 	bl	ftl_memset
-.LVL1246:
+.LVL1248:
 	.loc 4 97 0
 	mov	w0, -3887
 	strh	w0, [x27]
@@ -11876,8 +11896,8 @@ FtlBbmTblFlush:
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0, #:lo12:.LANCHOR2]
 	strh	w0, [x27, 12]
-.LVL1247:
-.L907:
+.LVL1249:
+.L908:
 	.loc 4 108 0
 	ldrh	w4, [x27, 10]
 	.loc 4 107 0
@@ -11900,20 +11920,20 @@ FtlBbmTblFlush:
 	.loc 4 108 0
 	mov	x0, x24
 	bl	printf
-.LVL1248:
+.LVL1250:
 	.loc 4 109 0
 	mov	w3, 1
 	mov	x0, x19
 	mov	w1, w3
 	mov	w2, w3
 	bl	FlashProgPages
-.LVL1249:
+.LVL1251:
 	.loc 4 110 0
 	ldrh	w0, [x26]
 	ldrh	w1, [x20, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L908
+	blt	.L909
 	.loc 4 113 0
 	ldr	w0, [x20, 8]
 	.loc 4 122 0
@@ -11947,15 +11967,15 @@ FtlBbmTblFlush:
 	.loc 4 122 0
 	mov	w1, w2
 	bl	FlashEraseBlocks
-.LVL1250:
+.LVL1252:
 	.loc 4 123 0
 	mov	w3, 1
 	mov	x0, x19
 	mov	w2, w3
 	mov	w1, w3
 	bl	FlashProgPages
-.LVL1251:
-.L908:
+.LVL1253:
+.L909:
 	.loc 4 126 0
 	ldrh	w0, [x20, 2]
 	add	w0, w0, 1
@@ -11963,12 +11983,12 @@ FtlBbmTblFlush:
 	.loc 4 127 0
 	ldr	w0, [x19]
 	cmn	w0, #1
-	bne	.L909
+	bne	.L910
 	.loc 4 129 0
 	ldr	w1, [x19, 4]
 	.loc 4 130 0
 	add	w21, w21, 1
-.LVL1252:
+.LVL1254:
 	.loc 4 129 0
 	adrp	x0, .LC95
 	.loc 4 130 0
@@ -11976,21 +11996,21 @@ FtlBbmTblFlush:
 	.loc 4 129 0
 	add	x0, x0, :lo12:.LC95
 	bl	printf
-.LVL1253:
+.LVL1255:
 	.loc 4 131 0
 	cmp	w21, 3
-	bls	.L907
+	bls	.L908
 	.loc 4 132 0
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC96
 	mov	w2, w21
 	add	x0, x0, :lo12:.LC96
 	bl	printf
-.LVL1254:
-.L911:
-	b	.L911
-.LVL1255:
-.L906:
+.LVL1256:
+.L912:
+	b	.L912
+.LVL1257:
+.L907:
 	.loc 4 92 0 discriminator 3
 	ldrh	w2, [x27]
 	ldr	x1, [x25], 8
@@ -11999,31 +12019,31 @@ FtlBbmTblFlush:
 	lsl	w2, w2, 2
 	.loc 4 91 0 discriminator 3
 	add	w24, w24, 1
-.LVL1256:
+.LVL1258:
 	.loc 4 92 0 discriminator 3
 	add	x0, x0, x3, sxtw 2
 	bl	ftl_memcpy
-.LVL1257:
-	b	.L905
-.LVL1258:
-.L912:
-	mov	w25, 1
 .LVL1259:
-	b	.L907
+	b	.L906
 .LVL1260:
-.L909:
+.L913:
+	mov	w25, 1
+.LVL1261:
+	b	.L908
+.LVL1262:
+.L910:
 	.loc 4 139 0
-	cbz	w25, .L912
+	cbz	w25, .L913
 	.loc 4 146 0
 	mov	w0, 0
 	ldr	x27, [sp, 80]
-.LVL1261:
+.LVL1263:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-.LVL1262:
+.LVL1264:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-.LVL1263:
+.LVL1265:
 	ldp	x29, x30, [sp], 96
 	.cfi_restore 30
 	.cfi_restore 29
@@ -12049,7 +12069,7 @@ allocate_data_superblock:
 .LFB298:
 	.loc 2 2531 0
 	.cfi_startproc
-.LVL1264:
+.LVL1266:
 	stp	x29, x30, [sp, -112]!
 	.cfi_def_cfa_offset 112
 	.cfi_offset 29, -112
@@ -12078,7 +12098,7 @@ allocate_data_superblock:
 	stp	x21, x22, [sp, 32]
 	.loc 2 2537 0
 	add	x0, x27, :lo12:.LANCHOR45
-.LVL1265:
+.LVL1267:
 	.loc 2 2531 0
 	stp	x25, x26, [sp, 64]
 	.cfi_offset 21, -80
@@ -12087,8 +12107,8 @@ allocate_data_superblock:
 	.cfi_offset 26, -40
 	.loc 2 2537 0
 	str	x0, [x29, 104]
-.LVL1266:
-.L915:
+.LVL1268:
+.L916:
 	ldr	x1, [x29, 104]
 	adrp	x24, .LANCHOR5
 	ldrh	w0, [x28, #:lo12:.LANCHOR48]
@@ -12096,7 +12116,7 @@ allocate_data_superblock:
 	add	w0, w0, w1
 	ldrh	w1, [x24, #:lo12:.LANCHOR5]
 	cmp	w0, w1
-	ble	.L916
+	ble	.L917
 	.loc 2 2537 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR158
 	adrp	x0, .LC1
@@ -12104,13 +12124,13 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LANCHOR158
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1267:
-.L916:
+.LVL1269:
+.L917:
 	.loc 2 2539 0 is_stmt 1
 	adrp	x0, .LANCHOR53
 	add	x0, x0, :lo12:.LANCHOR53
 	cmp	x19, x0
-	bne	.L941
+	bne	.L942
 	.loc 2 2540 0
 	adrp	x1, .LANCHOR89
 	ldrh	w0, [x23]
@@ -12119,25 +12139,25 @@ allocate_data_superblock:
 	lsr	w0, w0, 1
 	add	w0, w0, 1
 	add	w1, w0, w1, lsr 2
-.LVL1268:
+.LVL1270:
 	.loc 2 2544 0
 	ands	w1, w1, 65535
-	beq	.L917
+	beq	.L918
 	.loc 2 2545 0
 	sub	w1, w1, #1
-.LVL1269:
+.LVL1271:
 	and	w1, w1, 65535
-.LVL1270:
-.L917:
+.LVL1272:
+.L918:
 	.loc 2 2546 0
 	adrp	x0, .LANCHOR47
 	add	x0, x0, :lo12:.LANCHOR47
 	bl	List_pop_index_node
-.LVL1271:
+.LVL1273:
 	and	w20, w0, 65535
-.LVL1272:
+.LVL1274:
 	ldrh	w0, [x23]
-	cbnz	w0, .L918
+	cbnz	w0, .L919
 	.loc 2 2546 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR158
 	adrp	x0, .LC1
@@ -12145,8 +12165,8 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LANCHOR158
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1273:
-.L918:
+.LVL1275:
+.L919:
 	.loc 2 2546 0 discriminator 3
 	ldrh	w0, [x23]
 	sub	w0, w0, #1
@@ -12156,10 +12176,10 @@ allocate_data_superblock:
 	.loc 2 2550 0 discriminator 3
 	mov	x0, x19
 	bl	make_superblock
-.LVL1274:
+.LVL1276:
 	.loc 2 2551 0 discriminator 3
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L919
+	cbnz	w0, .L920
 	.loc 2 2555 0
 	adrp	x1, .LANCHOR43
 	ubfiz	x0, x20, 1, 16
@@ -12169,14 +12189,14 @@ allocate_data_superblock:
 	.loc 2 2556 0
 	mov	w0, w20
 	bl	INSERT_DATA_LIST
-.LVL1275:
+.LVL1277:
 	.loc 2 2557 0
 	ldrh	w1, [x27, #:lo12:.LANCHOR45]
 	ldrh	w0, [x23]
 	add	w0, w0, w1
 	ldrh	w1, [x24, #:lo12:.LANCHOR5]
 	cmp	w0, w1
-	ble	.L915
+	ble	.L916
 	.loc 2 2557 0 is_stmt 0 discriminator 1
 	mov	w2, 2557
 	adrp	x1, .LANCHOR158
@@ -12184,21 +12204,21 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LANCHOR158
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1276:
-	b	.L915
-.LVL1277:
-.L941:
-	mov	w1, 0
-	b	.L917
 .LVL1278:
-.L919:
+	b	.L916
+.LVL1279:
+.L942:
+	mov	w1, 0
+	b	.L918
+.LVL1280:
+.L920:
 	.loc 2 2560 0 is_stmt 1
 	ldrh	w1, [x27, #:lo12:.LANCHOR45]
 	ldrh	w0, [x23]
 	add	w0, w0, w1
 	ldrh	w1, [x24, #:lo12:.LANCHOR5]
 	cmp	w0, w1
-	ble	.L921
+	ble	.L922
 	.loc 2 2560 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR158
 	adrp	x0, .LC1
@@ -12206,8 +12226,8 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LANCHOR158
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1279:
-.L921:
+.LVL1281:
+.L922:
 	.loc 2 2563 0 is_stmt 1 discriminator 1
 	adrp	x0, .LANCHOR3
 	.loc 2 2564 0 discriminator 1
@@ -12223,13 +12243,13 @@ allocate_data_superblock:
 	add	x1, x3, 8
 	add	x0, x0, 8
 	add	x0, x3, x0
-.L922:
-.LVL1280:
+.L923:
+.LVL1282:
 	.loc 2 2563 0 discriminator 1
 	cmp	x0, x1
-	bne	.L924
+	bne	.L925
 	.loc 2 2571 0
-	cbnz	w21, .L925
+	cbnz	w21, .L926
 	.loc 2 2571 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR158
 	adrp	x0, .LC1
@@ -12237,13 +12257,13 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LANCHOR158
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1281:
-.L925:
+.LVL1283:
+.L926:
 	.loc 2 2573 0 is_stmt 1
 	adrp	x0, .LANCHOR82
 	ldrh	w0, [x0, #:lo12:.LANCHOR82]
 	cmp	w0, w20
-	bne	.L926
+	bne	.L927
 	.loc 2 2573 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR158
 	adrp	x0, .LC1
@@ -12251,8 +12271,8 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LANCHOR158
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1282:
-.L926:
+.LVL1284:
+.L927:
 	.loc 2 2574 0 is_stmt 1
 	ldrb	w0, [x19, 8]
 	uxtw	x22, w20
@@ -12260,16 +12280,16 @@ allocate_data_superblock:
 	adrp	x7, .LANCHOR14
 	adrp	x5, .LANCHOR73
 	adrp	x4, .LANCHOR74
-	cbnz	w0, .L927
+	cbnz	w0, .L928
 	.loc 2 2575 0
 	ldr	x2, [x6, #:lo12:.LANCHOR40]
 	lsl	x1, x22, 1
 	ldrh	w0, [x2, x1]
-	cbz	w0, .L928
+	cbz	w0, .L929
 	.loc 2 2576 0
 	ldrh	w3, [x7, #:lo12:.LANCHOR14]
 	add	w0, w0, w3
-.L952:
+.L953:
 	.loc 2 2578 0
 	strh	w0, [x2, x1]
 	.loc 2 2580 0
@@ -12281,8 +12301,8 @@ allocate_data_superblock:
 	.loc 2 2580 0
 	mov	w0, w20
 	bl	ftl_set_blk_mode
-.LVL1283:
-.L930:
+.LVL1285:
+.L931:
 	.loc 2 2587 0
 	ldr	x0, [x6, #:lo12:.LANCHOR40]
 	lsl	x22, x22, 1
@@ -12290,10 +12310,10 @@ allocate_data_superblock:
 	adrp	x0, .LANCHOR77
 	ldr	w2, [x0, #:lo12:.LANCHOR77]
 	cmp	w1, w2
-	bls	.L931
+	bls	.L932
 	.loc 2 2588 0
 	str	w1, [x0, #:lo12:.LANCHOR77]
-.L931:
+.L932:
 	.loc 2 2590 0
 	ldr	w2, [x5, #:lo12:.LANCHOR73]
 	ldr	w1, [x4, #:lo12:.LANCHOR74]
@@ -12309,18 +12329,18 @@ allocate_data_superblock:
 	ldr	w0, [x1, 16]
 	add	w0, w0, 1
 	str	w0, [x1, 16]
-.LVL1284:
+.LVL1286:
 	.loc 2 2594 0
 	ldr	x0, [x25, #:lo12:.LANCHOR112]
 	ubfiz	x1, x21, 5, 16
 	add	x1, x1, 4
 	add	x2, x0, 4
 	add	x1, x0, x1
-.LVL1285:
-.L932:
+.LVL1287:
+.L933:
 	.loc 2 2593 0 discriminator 1
 	cmp	x1, x2
-	bne	.L933
+	bne	.L934
 	.loc 2 2595 0
 	ldrb	w1, [x19, 8]
 	mov	w2, w21
@@ -12328,28 +12348,28 @@ allocate_data_superblock:
 	mov	x24, 0
 	.loc 2 2595 0
 	bl	FlashEraseBlocks
-.LVL1286:
+.LVL1288:
 	.loc 2 2596 0
 	mov	w1, 0
-.LVL1287:
-.L934:
+.LVL1289:
+.L935:
 	.loc 2 2597 0 discriminator 1
 	cmp	w21, w24, uxth
-	bhi	.L936
+	bhi	.L937
 	.loc 2 2608 0
-	cbz	w1, .L937
+	cbz	w1, .L938
 	.loc 2 2609 0
 	mov	w0, w20
 	bl	update_multiplier_value
-.LVL1288:
+.LVL1290:
 	.loc 2 2610 0
 	bl	FtlBbmTblFlush
-.LVL1289:
-.L937:
+.LVL1291:
+.L938:
 	.loc 2 2613 0
 	ldrb	w0, [x19, 7]
 	adrp	x2, .LANCHOR43
-	cbnz	w0, .L938
+	cbnz	w0, .L939
 	.loc 2 2615 0
 	ldr	x0, [x2, #:lo12:.LANCHOR43]
 	mov	w1, -1
@@ -12357,40 +12377,40 @@ allocate_data_superblock:
 	.loc 2 2616 0
 	mov	w0, w20
 	bl	INSERT_DATA_LIST
-.LVL1290:
+.LVL1292:
 	.loc 2 2617 0
-	b	.L915
-.LVL1291:
-.L924:
+	b	.L916
+.LVL1293:
+.L925:
 	.loc 2 2566 0
 	ldrh	w2, [x4]
 	.loc 2 2565 0
 	stp	xzr, xzr, [x1]
 	.loc 2 2566 0
 	cmp	w2, w6
-	beq	.L923
+	beq	.L924
 	.loc 2 2567 0
 	ubfiz	x5, x21, 5, 16
 	.loc 2 2568 0
 	add	w21, w21, 1
-.LVL1292:
+.LVL1294:
 	.loc 2 2567 0
 	add	x5, x3, x5
 	.loc 2 2568 0
 	and	w21, w21, 65535
-.LVL1293:
+.LVL1295:
 	.loc 2 2567 0
 	lsl	w2, w2, 10
 	str	w2, [x5, 4]
-.L923:
+.L924:
 	add	x1, x1, 32
 	add	x4, x4, 2
-	b	.L922
-.L928:
+	b	.L923
+.L929:
 	.loc 2 2578 0
 	mov	w0, 2
-	b	.L952
-.L927:
+	b	.L953
+.L928:
 	.loc 2 2582 0
 	ldr	x2, [x6, #:lo12:.LANCHOR40]
 	lsl	x0, x22, 1
@@ -12401,43 +12421,43 @@ allocate_data_superblock:
 	ldr	w0, [x4, #:lo12:.LANCHOR74]
 	add	w0, w0, 1
 	str	w0, [x4, #:lo12:.LANCHOR74]
-.LVL1294:
-.LBB244:
-.LBB245:
+.LVL1296:
+.LBB248:
+.LBB249:
 	mov	w0, w20
 	bl	ftl_set_blk_mode.part.7
-.LVL1295:
-	b	.L930
-.LVL1296:
-.L933:
-.LBE245:
-.LBE244:
+.LVL1297:
+	b	.L931
+.LVL1298:
+.L934:
+.LBE249:
+.LBE248:
 	.loc 2 2594 0 discriminator 3
 	ldr	w3, [x2]
 	and	w3, w3, -1024
 	str	w3, [x2], 32
-	b	.L932
-.LVL1297:
-.L936:
+	b	.L933
+.LVL1299:
+.L937:
 	.loc 2 2598 0
 	ldr	x2, [x25, #:lo12:.LANCHOR112]
 	lsl	x0, x24, 5
 	add	x3, x2, x0
 	ldr	w2, [x2, x0]
 	cmn	w2, #1
-	bne	.L935
+	bne	.L936
 	.loc 2 2599 0
 	add	w1, w1, 1
-.LVL1298:
+.LVL1300:
 	.loc 2 2600 0
 	ldr	w0, [x3, 4]
 	.loc 2 2599 0
 	stp	w2, w1, [x29, 96]
-.LVL1299:
+.LVL1301:
 	.loc 2 2601 0
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.LVL1300:
+.LVL1302:
 	.loc 2 2603 0
 	ldp	w2, w1, [x29, 96]
 	.loc 2 2602 0
@@ -12446,14 +12466,14 @@ allocate_data_superblock:
 	ldrb	w0, [x19, 7]
 	sub	w0, w0, #1
 	strb	w0, [x19, 7]
-.LVL1301:
-.L935:
+.LVL1303:
+.L936:
 	add	x24, x24, 1
-.LVL1302:
+.LVL1304:
 	add	x26, x26, 2
-	b	.L934
-.LVL1303:
-.L938:
+	b	.L935
+.LVL1305:
+.L939:
 	.loc 2 2620 0
 	adrp	x1, .LANCHOR19
 	.loc 2 2624 0
@@ -12482,11 +12502,11 @@ allocate_data_superblock:
 	strh	w0, [x1, x22]
 	.loc 2 2626 0
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L939
+	cbz	w0, .L940
 	.loc 2 2626 0 is_stmt 0 discriminator 2
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L940
-.L939:
+	cbnz	w0, .L941
+.L940:
 	.loc 2 2626 0 discriminator 3
 	adrp	x1, .LANCHOR158
 	adrp	x0, .LC1
@@ -12494,16 +12514,16 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LANCHOR158
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1304:
-.L940:
+.LVL1306:
+.L941:
 	.loc 2 2628 0 is_stmt 1
 	ldp	x19, x20, [sp, 16]
-.LVL1305:
+.LVL1307:
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
-.LVL1306:
+.LVL1308:
 	ldp	x23, x24, [sp, 48]
-.LVL1307:
+.LVL1309:
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
@@ -12532,7 +12552,7 @@ FtlGcFreeBadSuperBlk:
 .LFB317:
 	.loc 5 390 0
 	.cfi_startproc
-.LVL1308:
+.LVL1310:
 	stp	x29, x30, [sp, -96]!
 	.cfi_def_cfa_offset 96
 	.cfi_offset 29, -96
@@ -12551,7 +12571,7 @@ FtlGcFreeBadSuperBlk:
 	and	w25, w0, 65535
 	.loc 5 395 0
 	ldrh	w0, [x21, #:lo12:.LANCHOR103]
-.LVL1309:
+.LVL1311:
 	.loc 5 390 0
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
@@ -12562,31 +12582,31 @@ FtlGcFreeBadSuperBlk:
 	.cfi_offset 24, -40
 	.cfi_offset 27, -16
 	.loc 5 395 0
-	cbz	w0, .L954
-.LBB248:
-.LBB249:
+	cbz	w0, .L955
+.LBB252:
+.LBB253:
 	.loc 5 399 0
 	adrp	x23, .LANCHOR104
 	.loc 5 406 0
 	add	x24, x23, :lo12:.LANCHOR104
-.LBE249:
-.LBE248:
+.LBE253:
+.LBE252:
 	mov	w19, 0
-.L955:
-.LVL1310:
-.LBB252:
-.LBB250:
+.L956:
+.LVL1312:
+.LBB256:
+.LBB254:
 	.loc 5 396 0
 	adrp	x0, .LANCHOR3
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w0, w19
-	bhi	.L961
+	bhi	.L962
 	.loc 5 412 0
 	bl	FtlGcReFreshBadBlk
-.LVL1311:
-.L954:
-.LBE250:
-.LBE252:
+.LVL1313:
+.L955:
+.LBE254:
+.LBE256:
 	.loc 5 415 0
 	mov	w0, 0
 	ldr	x27, [sp, 80]
@@ -12594,7 +12614,7 @@ FtlGcFreeBadSuperBlk:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-.LVL1312:
+.LVL1314:
 	ldp	x29, x30, [sp], 96
 	.cfi_remember_state
 	.cfi_restore 30
@@ -12610,11 +12630,11 @@ FtlGcFreeBadSuperBlk:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1313:
-.L961:
+.LVL1315:
+.L962:
 	.cfi_restore_state
-.LBB253:
-.LBB251:
+.LBB257:
+.LBB255:
 	.loc 5 397 0
 	adrp	x0, .LANCHOR13
 	add	x0, x0, :lo12:.LANCHOR13
@@ -12625,40 +12645,40 @@ FtlGcFreeBadSuperBlk:
 	.loc 5 397 0
 	ldrb	w0, [x0, w19, sxtw]
 	bl	V2P_block
-.LVL1314:
+.LVL1316:
 	and	w26, w0, 65535
-.LVL1315:
-.L956:
+.LVL1317:
+.L957:
 	.loc 5 398 0
 	ldrh	w0, [x22]
 	cmp	w0, w20
-	bhi	.L960
+	bhi	.L961
 	.loc 5 396 0
 	add	w19, w19, 1
-.LVL1316:
+.LVL1318:
 	and	w19, w19, 65535
-.LVL1317:
-	b	.L955
-.L960:
+.LVL1319:
+	b	.L956
+.L961:
 	.loc 5 399 0
 	add	x0, x23, :lo12:.LANCHOR104
 	add	w27, w20, 1
 	ldrh	w0, [x0, w20, sxtw 1]
 	cmp	w0, w26
-	bne	.L957
+	bne	.L958
 	.loc 5 401 0
 	mov	w1, w26
 	adrp	x0, .LC97
 	add	x0, x0, :lo12:.LC97
 	bl	printf
-.LVL1318:
+.LVL1320:
 	.loc 5 403 0
 	mov	w0, w26
 	bl	FtlBbmMapBadBlock
-.LVL1319:
+.LVL1321:
 	.loc 5 404 0
 	bl	FtlBbmTblFlush
-.LVL1320:
+.LVL1322:
 	.loc 5 405 0
 	ldrh	w1, [x22]
 	.loc 5 406 0
@@ -12666,32 +12686,32 @@ FtlGcFreeBadSuperBlk:
 	and	x4, x20, 65535
 	.loc 5 405 0
 	mov	x0, 0
-.LVL1321:
-.L958:
+.LVL1323:
+.L959:
 	add	w2, w20, w0
 	cmp	w1, w2, uxth
-	bhi	.L959
+	bhi	.L960
 	.loc 5 407 0
 	sub	w1, w1, #1
 	strh	w1, [x22]
-.LVL1322:
-.L957:
+.LVL1324:
+.L958:
 	.loc 5 398 0
 	and	w20, w27, 65535
-.LVL1323:
-	b	.L956
-.LVL1324:
-.L959:
+.LVL1325:
+	b	.L957
+.LVL1326:
+.L960:
 	.loc 5 406 0
 	add	x2, x3, x0
 	ldrh	w5, [x24, x2, lsl 1]
 	add	x2, x4, x0
 	add	x0, x0, 1
-.LVL1325:
+.LVL1327:
 	strh	w5, [x24, x2, lsl 1]
-	b	.L958
-.LBE251:
-.LBE253:
+	b	.L959
+.LBE255:
+.LBE257:
 	.cfi_endproc
 .LFE317:
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
@@ -12703,7 +12723,7 @@ update_vpc_list:
 .LFB301:
 	.loc 2 2687 0
 	.cfi_startproc
-.LVL1326:
+.LVL1328:
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
@@ -12721,49 +12741,49 @@ update_vpc_list:
 	.loc 2 2688 0
 	ldr	x1, [x1, #:lo12:.LANCHOR43]
 	ubfiz	x0, x19, 1, 16
-.LVL1327:
+.LVL1329:
 	ldrh	w0, [x1, x0]
-	cbnz	w0, .L967
+	cbnz	w0, .L968
 	.loc 2 2689 0
 	adrp	x0, .LANCHOR82
 	ldrh	w1, [x0, #:lo12:.LANCHOR82]
 	cmp	w1, w19
-	bne	.L968
+	bne	.L969
 	.loc 2 2691 0
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR82]
-.L969:
-.LVL1328:
-.LBB256:
-.LBB257:
+.L970:
+.LVL1330:
+.LBB260:
+.LBB261:
 	.loc 2 2696 0
 	adrp	x20, .LANCHOR45
 	mov	w1, w19
 	adrp	x0, .LANCHOR42
 	add	x0, x0, :lo12:.LANCHOR42
 	bl	List_remove_node
-.LVL1329:
+.LVL1331:
 	ldrh	w0, [x20, #:lo12:.LANCHOR45]
-	cbnz	w0, .L971
+	cbnz	w0, .L972
 	adrp	x1, .LANCHOR159
 	adrp	x0, .LC1
 	mov	w2, 2696
 	add	x1, x1, :lo12:.LANCHOR159
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1330:
-.L971:
+.LVL1332:
+.L972:
 	ldrh	w0, [x20, #:lo12:.LANCHOR45]
 	sub	w0, w0, #1
 	strh	w0, [x20, #:lo12:.LANCHOR45]
 	.loc 2 2697 0
 	mov	w0, w19
 	bl	free_data_superblock
-.LVL1331:
+.LVL1333:
 	.loc 2 2698 0
 	mov	w0, w19
 	bl	FtlGcFreeBadSuperBlk
-.LVL1332:
+.LVL1334:
 	.loc 2 2699 0
 	adrp	x0, .LANCHOR48
 	ldrh	w1, [x20, #:lo12:.LANCHOR45]
@@ -12772,43 +12792,43 @@ update_vpc_list:
 	adrp	x1, .LANCHOR5
 	ldrh	w1, [x1, #:lo12:.LANCHOR5]
 	cmp	w0, w1
-	ble	.L975
+	ble	.L976
 	adrp	x1, .LANCHOR159
 	adrp	x0, .LC1
 	mov	w2, 2699
 	add	x1, x1, :lo12:.LANCHOR159
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1333:
-.L975:
+.LVL1335:
+.L976:
 	mov	w0, 1
-	b	.L966
-.LVL1334:
-.L968:
-.LBE257:
-.LBE256:
+	b	.L967
+.LVL1336:
+.L969:
+.LBE261:
+.LBE260:
 	.loc 2 2692 0
 	adrp	x0, .LANCHOR51
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w19
-	beq	.L974
+	beq	.L975
 	.loc 2 2692 0 is_stmt 0 discriminator 1
 	adrp	x0, .LANCHOR52
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
-	beq	.L974
+	beq	.L975
 	.loc 2 2692 0 discriminator 2
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w19
-	bne	.L969
-.L974:
+	bne	.L970
+.L975:
 	.loc 2 2694 0 is_stmt 1
 	mov	w0, 0
-.L966:
+.L967:
 	.loc 2 2705 0
 	ldp	x19, x20, [sp, 16]
-.LVL1335:
+.LVL1337:
 	ldp	x29, x30, [sp], 32
 	.cfi_remember_state
 	.cfi_restore 30
@@ -12817,13 +12837,13 @@ update_vpc_list:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.L967:
+.L968:
 	.cfi_restore_state
 	.loc 2 2702 0
 	mov	w0, w19
 	bl	List_update_data_list
-.LVL1336:
-	b	.L974
+.LVL1338:
+	b	.L975
 	.cfi_endproc
 .LFE301:
 	.size	update_vpc_list, .-update_vpc_list
@@ -12835,7 +12855,7 @@ decrement_vpc_count:
 .LFB302:
 	.loc 2 2708 0
 	.cfi_startproc
-.LVL1337:
+.LVL1339:
 	stp	x29, x30, [sp, -48]!
 	.cfi_def_cfa_offset 48
 	.cfi_offset 29, -48
@@ -12850,37 +12870,37 @@ decrement_vpc_count:
 	.cfi_offset 21, -16
 	.loc 2 2711 0
 	mov	w0, 65535
-.LVL1338:
+.LVL1340:
 	cmp	w19, w0
-	beq	.L978
+	beq	.L979
 	.loc 2 2712 0
 	adrp	x21, .LANCHOR43
 	ubfiz	x20, x19, 1, 16
 	ldr	x1, [x21, #:lo12:.LANCHOR43]
 	ldrh	w0, [x1, x20]
-	cbnz	w0, .L979
+	cbnz	w0, .L980
 	.loc 2 2713 0
 	mov	w2, 0
 	mov	w1, w19
 	adrp	x0, .LC98
 	add	x0, x0, :lo12:.LC98
 	bl	printf
-.LVL1339:
+.LVL1341:
 	.loc 2 2714 0
 	ldr	x0, [x21, #:lo12:.LANCHOR43]
 	ldrh	w0, [x0, x20]
-	cbz	w0, .L980
-.L985:
-.LVL1340:
+	cbz	w0, .L981
+.L986:
+.LVL1342:
 	.loc 2 2715 0 discriminator 1
 	mov	w20, 0
-.LVL1341:
-.L977:
+.LVL1343:
+.L978:
 	.loc 2 2733 0
 	mov	w0, w20
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
-.LVL1342:
+.LVL1344:
 	ldp	x29, x30, [sp], 48
 	.cfi_remember_state
 	.cfi_restore 30
@@ -12890,8 +12910,8 @@ decrement_vpc_count:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1343:
-.L980:
+.LVL1345:
+.L981:
 	.cfi_restore_state
 	.loc 2 2714 0 discriminator 1
 	mov	w2, 2714
@@ -12900,29 +12920,29 @@ decrement_vpc_count:
 	add	x1, x1, :lo12:.LANCHOR160
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1344:
-	b	.L985
-.L979:
+.LVL1346:
+	b	.L986
+.L980:
 	.loc 2 2717 0
 	sub	w0, w0, #1
 	strh	w0, [x1, x20]
-.L978:
+.L979:
 	.loc 2 2721 0
 	adrp	x21, .LANCHOR151
 	mov	w1, 65535
 	ldrh	w0, [x21, #:lo12:.LANCHOR151]
 	cmp	w0, w1
-	bne	.L982
+	bne	.L983
 	.loc 2 2722 0
 	strh	w19, [x21, #:lo12:.LANCHOR151]
-	b	.L985
-.L982:
+	b	.L986
+.L983:
 	.loc 2 2724 0
 	cmp	w19, w0
-	beq	.L985
+	beq	.L986
 	.loc 2 2727 0
 	bl	update_vpc_list
-.LVL1345:
+.LVL1347:
 	cmp	w0, 0
 	.loc 2 2730 0
 	adrp	x1, .LANCHOR41
@@ -12931,7 +12951,7 @@ decrement_vpc_count:
 	strh	w19, [x21, #:lo12:.LANCHOR151]
 	.loc 2 2727 0
 	cset	w20, ne
-.LVL1346:
+.LVL1348:
 	.loc 2 2730 0
 	ldr	x1, [x1, #:lo12:.LANCHOR41]
 	ldr	x0, [x0, #:lo12:.LANCHOR42]
@@ -12944,10 +12964,10 @@ decrement_vpc_count:
 	ldr	x1, [x1, #:lo12:.LANCHOR43]
 	and	x2, x0, 65535
 	ldrh	w1, [x1, x2, lsl 1]
-	cbnz	w1, .L977
+	cbnz	w1, .L978
 	.loc 2 2730 0 is_stmt 0 discriminator 1
 	cmp	w19, w0, uxth
-	beq	.L977
+	beq	.L978
 	.loc 2 2730 0 discriminator 2
 	mov	w2, 2730
 	adrp	x1, .LANCHOR160
@@ -12955,8 +12975,8 @@ decrement_vpc_count:
 	add	x1, x1, :lo12:.LANCHOR160
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1347:
-	b	.L977
+.LVL1349:
+	b	.L978
 	.cfi_endproc
 .LFE302:
 	.size	decrement_vpc_count, .-decrement_vpc_count
@@ -12993,23 +13013,23 @@ FtlWriteDump_data:
 	.cfi_offset 24, -72
 	.cfi_offset 25, -64
 	.loc 2 948 0
-	cbz	w2, .L987
+	cbz	w2, .L988
 	.loc 2 948 0 is_stmt 0 discriminator 1
 	ldrb	w1, [x0, 8]
-	cbnz	w1, .L987
+	cbnz	w1, .L988
 	.loc 2 949 0 is_stmt 1
 	adrp	x3, .LANCHOR19
 	ldrb	w1, [x0, 7]
 	ldrh	w3, [x3, #:lo12:.LANCHOR19]
 	mul	w1, w1, w3
 	cmp	w2, w1
-	beq	.L987
-.LVL1348:
-.LBB261:
-.LBB262:
+	beq	.L988
+.LVL1350:
+.LBB265:
+.LBB266:
 	.loc 2 956 0
 	ldrb	w0, [x0, 10]
-	cbnz	w0, .L986
+	cbnz	w0, .L987
 	.loc 2 951 0
 	adrp	x0, .LANCHOR62
 	.loc 2 958 0
@@ -13026,7 +13046,7 @@ FtlWriteDump_data:
 	.loc 2 958 0
 	mov	w0, w21
 	bl	log2phys
-.LVL1349:
+.LVL1351:
 	.loc 2 964 0
 	adrp	x2, .LANCHOR109
 	.loc 2 963 0
@@ -13043,25 +13063,25 @@ FtlWriteDump_data:
 	str	w1, [x29, 100]
 	.loc 2 964 0
 	stp	x0, x20, [x29, 104]
-.LVL1350:
+.LVL1352:
 	.loc 2 962 0
 	str	w21, [x29, 120]
 	.loc 2 966 0
 	str	wzr, [x20, 4]
 	.loc 2 967 0
-	beq	.L989
+	beq	.L990
 	.loc 2 969 0
 	mov	w2, 0
 	mov	w1, 1
 	add	x0, x29, 96
 	bl	FlashReadPages
-.LVL1351:
-.L990:
+.LVL1353:
+.L991:
 	.loc 2 987 0
 	adrp	x23, .LANCHOR72
 	.loc 2 953 0
 	lsl	w25, w25, 2
-.LVL1352:
+.LVL1354:
 	.loc 2 978 0
 	add	x22, x19, :lo12:.LANCHOR51
 	.loc 2 987 0
@@ -13070,19 +13090,19 @@ FtlWriteDump_data:
 	mov	w0, -3947
 	mov	w24, 0
 	strh	w0, [x20]
-.L991:
+.L992:
 	.loc 2 976 0
 	cmp	w25, w24
-	bne	.L995
-.L992:
+	bne	.L996
+.L993:
 	.loc 2 992 0
 	add	x19, x19, :lo12:.LANCHOR51
 	mov	w0, 1
 	strb	w0, [x19, 10]
-.LVL1353:
-.L986:
-.LBE262:
-.LBE261:
+.LVL1355:
+.L987:
+.LBE266:
+.LBE265:
 	.loc 2 1000 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -13101,23 +13121,23 @@ FtlWriteDump_data:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1354:
-.L989:
+.LVL1356:
+.L990:
 	.cfi_restore_state
-.LBB264:
-.LBB263:
+.LBB268:
+.LBB267:
 	.loc 2 973 0
 	adrp	x1, .LANCHOR23
 	ldrh	w2, [x1, #:lo12:.LANCHOR23]
 	mov	w1, 255
 	bl	ftl_memset
-.LVL1355:
-	b	.L990
-.LVL1356:
-.L995:
+.LVL1357:
+	b	.L991
+.LVL1358:
+.L996:
 	.loc 2 978 0
 	ldrh	w0, [x22, 4]
-	cbz	w0, .L992
+	cbz	w0, .L993
 	.loc 2 983 0
 	ldr	w0, [x29, 100]
 	add	w24, w24, 1
@@ -13128,7 +13148,7 @@ FtlWriteDump_data:
 	.loc 2 986 0
 	mov	x0, x22
 	bl	get_new_active_ppa
-.LVL1357:
+.LVL1359:
 	str	w0, [x29, 100]
 	.loc 2 987 0
 	ldr	w0, [x23]
@@ -13149,21 +13169,21 @@ FtlWriteDump_data:
 	.loc 2 988 0
 	add	x0, x29, 96
 	bl	FlashProgPages
-.LVL1358:
+.LVL1360:
 	.loc 2 990 0
 	ldrh	w0, [x22]
 	bl	decrement_vpc_count
-.LVL1359:
-	b	.L991
-.LVL1360:
-.L987:
-.LBE263:
-.LBE264:
+.LVL1361:
+	b	.L992
+.LVL1362:
+.L988:
+.LBE267:
+.LBE268:
 	.loc 2 998 0
 	add	x19, x19, :lo12:.LANCHOR51
 	strb	wzr, [x19, 10]
 	.loc 2 1000 0
-	b	.L986
+	b	.L987
 	.cfi_endproc
 .LFE268:
 	.size	FtlWriteDump_data, .-FtlWriteDump_data
@@ -13196,17 +13216,17 @@ l2p_flush:
 	adrp	x21, .LANCHOR56
 	.loc 2 744 0
 	bl	FtlWriteDump_data
-.LVL1361:
-.L1005:
+.LVL1363:
+.L1006:
 	.loc 2 746 0 discriminator 1
 	ldrh	w0, [x20]
 	cmp	w0, w19
-	bhi	.L1007
+	bhi	.L1008
 	.loc 2 750 0
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
-.LVL1362:
+.LVL1364:
 	ldp	x29, x30, [sp], 48
 	.cfi_remember_state
 	.cfi_restore 30
@@ -13216,26 +13236,26 @@ l2p_flush:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1363:
-.L1007:
+.LVL1365:
+.L1008:
 	.cfi_restore_state
 	.loc 2 747 0
 	ldr	x1, [x21, #:lo12:.LANCHOR56]
 	ubfiz	x0, x19, 4, 16
 	add	x0, x1, x0
 	ldr	w0, [x0, 4]
-	tbz	w0, #31, .L1006
+	tbz	w0, #31, .L1007
 	.loc 2 748 0
 	mov	w0, w19
 	bl	flush_l2p_region
-.LVL1364:
-.L1006:
+.LVL1366:
+.L1007:
 	.loc 2 746 0 discriminator 2
 	add	w19, w19, 1
-.LVL1365:
+.LVL1367:
 	and	w19, w19, 65535
-.LVL1366:
-	b	.L1005
+.LVL1368:
+	b	.L1006
 	.cfi_endproc
 .LFE261:
 	.size	l2p_flush, .-l2p_flush
@@ -13247,7 +13267,7 @@ FtlRecoverySuperblock:
 .LFB281:
 	.loc 2 1656 0
 	.cfi_startproc
-.LVL1367:
+.LVL1369:
 	stp	x29, x30, [sp, -192]!
 	.cfi_def_cfa_offset 192
 	.cfi_offset 29, -192
@@ -13264,7 +13284,7 @@ FtlRecoverySuperblock:
 	stp	x21, x22, [sp, 32]
 	.loc 2 1670 0
 	ldrh	w0, [x0]
-.LVL1368:
+.LVL1370:
 	.loc 2 1656 0
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
@@ -13281,7 +13301,7 @@ FtlRecoverySuperblock:
 	.cfi_offset 27, -112
 	.cfi_offset 28, -104
 	.loc 2 1670 0
-	beq	.L1133
+	beq	.L1134
 	.loc 2 1676 0
 	ldrb	w0, [x19, 6]
 	str	w0, [x29, 164]
@@ -13289,23 +13309,23 @@ FtlRecoverySuperblock:
 	adrp	x0, .LANCHOR19
 	.loc 2 1675 0
 	ldrh	w26, [x19, 2]
-.LVL1369:
+.LVL1371:
 	str	x0, [x29, 128]
 	.loc 2 1681 0
 	ldrh	w2, [x0, #:lo12:.LANCHOR19]
 	cmp	w2, w26
-	bne	.L1012
+	bne	.L1013
 	.loc 2 1682 0
 	strh	wzr, [x19, 4]
-.LVL1370:
-.L1139:
+.LVL1372:
+.L1140:
 	.loc 2 1709 0
 	strb	wzr, [x19, 6]
-.LVL1371:
-.L1133:
+.LVL1373:
+.L1134:
 	.loc 2 2010 0
 	ldp	x19, x20, [sp, 16]
-.LVL1372:
+.LVL1374:
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -13327,35 +13347,35 @@ FtlRecoverySuperblock:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1373:
-.L1012:
+.LVL1375:
+.L1013:
 	.cfi_restore_state
 	.loc 2 1689 0
 	ldrh	w0, [x19, 16]
-.LVL1374:
+.LVL1376:
 	.loc 2 1688 0
 	mov	w20, 0
-.LVL1375:
-.L1013:
+.LVL1377:
+.L1014:
 	.loc 2 1690 0
 	cmp	w0, w1
-	beq	.L1014
+	beq	.L1015
 	.loc 2 1697 0
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
-.LVL1376:
+.LVL1378:
 	mov	w23, w0
-.LVL1377:
+.LVL1379:
 	.loc 2 1705 0
 	cmn	w0, #1
-	beq	.L1015
+	beq	.L1016
 	.loc 2 1721 0
 	adrp	x1, .LANCHOR93
 	.loc 2 1717 0
 	adrp	x2, .LANCHOR3
 	.loc 2 1720 0
 	adrp	x20, .LANCHOR120
-.LVL1378:
+.LVL1380:
 	.loc 2 1722 0
 	add	x4, x19, 16
 	.loc 2 1721 0
@@ -13363,7 +13383,7 @@ FtlRecoverySuperblock:
 	adrp	x1, .LANCHOR23
 	.loc 2 1720 0
 	ldr	x0, [x20, #:lo12:.LANCHOR120]
-.LVL1379:
+.LVL1381:
 	.loc 2 1722 0
 	mov	w22, 0
 	.loc 2 1721 0
@@ -13382,16 +13402,16 @@ FtlRecoverySuperblock:
 	ldrh	w1, [x2, #:lo12:.LANCHOR3]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.L1016:
-.LVL1380:
+.L1017:
+.LVL1382:
 	.loc 2 1717 0 discriminator 1
 	cmp	x4, x1
-	bne	.L1020
+	bne	.L1021
 	.loc 2 1727 0
 	mov	w2, 0
 	mov	w1, w22
 	bl	FlashReadPages
-.LVL1381:
+.LVL1383:
 	.loc 2 1728 0
 	adrp	x0, .LANCHOR72
 	.loc 2 1730 0
@@ -13409,40 +13429,40 @@ FtlRecoverySuperblock:
 	mov	w3, 0
 	.loc 2 1728 0
 	sub	w21, w21, #1
-.LVL1382:
+.LVL1384:
 	str	x0, [x29, 144]
-.LVL1383:
-.L1021:
+.LVL1385:
+.L1022:
 	.loc 2 1729 0 discriminator 1
 	cmp	w22, w3
-	bne	.L1026
+	bne	.L1027
 	.loc 2 1747 0
 	add	w22, w23, 1
-.LVL1384:
+.LVL1386:
 	.loc 2 1749 0
 	ldr	w0, [x4, 4]
 	.loc 2 1747 0
 	and	w22, w22, 65535
-.LVL1385:
-.L1135:
+.LVL1387:
+.L1136:
 	.loc 2 1753 0
 	lsr	w0, w0, 10
 	bl	P2V_plane
-.LVL1386:
+.LVL1388:
 	and	w27, w0, 65535
-.LVL1387:
+.LVL1389:
 	.loc 2 1758 0
 	ldr	x0, [x29, 128]
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	cmp	w0, w22
-	bne	.L1028
+	bne	.L1029
 	.loc 2 1759 0
 	strh	w22, [x19, 2]
 	.loc 2 1760 0
 	strb	wzr, [x19, 6]
 	.loc 2 1761 0
 	strh	wzr, [x19, 4]
-.L1028:
+.L1029:
 	.loc 2 1764 0
 	ldr	w0, [x29, 164]
 	cmp	w22, w26
@@ -13450,48 +13470,48 @@ FtlRecoverySuperblock:
 	cmp	w27, w0
 	cset	w0, eq
 	tst	w1, w0
-	beq	.L1029
-.LVL1388:
-.L1140:
+	beq	.L1030
+.LVL1390:
+.L1141:
 	.loc 2 2004 0
 	mov	w2, w27
 	mov	w1, w22
 	mov	x0, x19
 	bl	ftl_sb_update_avl_pages
-.LVL1389:
-	b	.L1133
-.LVL1390:
-.L1014:
+.LVL1391:
+	b	.L1134
+.LVL1392:
+.L1015:
 	.loc 2 1691 0
 	add	w20, w20, 1
-.LVL1391:
+.LVL1393:
 	and	w20, w20, 65535
-.LVL1392:
+.LVL1394:
 	.loc 2 1692 0
 	add	x0, x19, x20, sxtw 1
-.LVL1393:
-	ldrh	w0, [x0, 16]
-.LVL1394:
-	b	.L1013
 .LVL1395:
-.L1015:
+	ldrh	w0, [x0, 16]
+.LVL1396:
+	b	.L1014
+.LVL1397:
+.L1016:
 	.loc 2 1706 0
-	cbz	w26, .L1017
+	cbz	w26, .L1018
 	.loc 2 1706 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR161
 	adrp	x0, .LC1
-.LVL1396:
+.LVL1398:
 	mov	w2, 1706
 	add	x1, x1, :lo12:.LANCHOR161
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1397:
-.L1017:
+.LVL1399:
+.L1018:
 	.loc 2 1707 0 is_stmt 1
 	ldr	w0, [x29, 164]
 	cmp	w0, 0
 	ccmp	w20, w0, 4, ne
-	beq	.L1018
+	beq	.L1019
 	.loc 2 1707 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR161
 	adrp	x0, .LC1
@@ -13499,23 +13519,23 @@ FtlRecoverySuperblock:
 	add	x1, x1, :lo12:.LANCHOR161
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1398:
-.L1018:
+.LVL1400:
+.L1019:
 	.loc 2 1708 0 is_stmt 1
 	strh	wzr, [x19, 2]
-	b	.L1139
-.LVL1399:
-.L1020:
+	b	.L1140
+.LVL1401:
+.L1021:
 	.loc 2 1718 0
 	ldrh	w3, [x4]
-.LVL1400:
+.LVL1402:
 	.loc 2 1719 0
 	cmp	w3, w10
-	beq	.L1019
+	beq	.L1020
 	.loc 2 1720 0
 	ubfiz	x2, x22, 5, 16
 	orr	w3, w23, w3, lsl 10
-.LVL1401:
+.LVL1403:
 	add	x2, x0, x2
 	str	w3, [x2, 4]
 	.loc 2 1721 0
@@ -13527,100 +13547,100 @@ FtlRecoverySuperblock:
 	mul	w3, w22, w8
 	.loc 2 1723 0
 	add	w22, w22, 1
-.LVL1402:
+.LVL1404:
 	and	w22, w22, 65535
-.LVL1403:
+.LVL1405:
 	.loc 2 1722 0
 	asr	w3, w3, 2
 	add	x3, x7, x3, sxtw 2
 	str	x3, [x2, 16]
-.L1019:
+.L1020:
 	add	x4, x4, 2
-.LVL1404:
-	b	.L1016
-.LVL1405:
-.L1026:
+.LVL1406:
+	b	.L1017
+.LVL1407:
+.L1027:
 	.loc 2 1730 0
 	ldr	w0, [x11]
-	cbnz	w0, .L1022
+	cbnz	w0, .L1023
 	.loc 2 1731 0
 	ldr	x8, [x11, 16]
-.LVL1406:
+.LVL1408:
 	.loc 2 1732 0
 	ldr	w5, [x8, 4]
 	cmn	w5, #1
-	beq	.L1023
+	beq	.L1024
 	.loc 2 1733 0
 	ldr	w1, [x7]
 	mov	w0, w5
 	bl	ftl_cmp_data_ver
-.LVL1407:
-	cbz	w0, .L1023
+.LVL1409:
+	cbz	w0, .L1024
 	.loc 2 1735 0
 	add	w5, w5, 1
 	str	w5, [x7]
-.L1023:
+.L1024:
 	.loc 2 1738 0
 	ldr	w0, [x8]
 	cmn	w0, #1
-	bne	.L1025
+	bne	.L1026
 	.loc 2 1753 0
 	ubfiz	x3, x3, 5, 16
-.LVL1408:
+.LVL1410:
 	.loc 2 1752 0
 	and	w22, w23, 65535
-.LVL1409:
+.LVL1411:
 	.loc 2 1753 0
 	add	x3, x4, x3
 	ldr	w0, [x3, 4]
-	b	.L1135
-.LVL1410:
-.L1022:
+	b	.L1136
+.LVL1412:
+.L1023:
 	.loc 2 1742 0
 	mov	w6, w10
-.LVL1411:
-.L1025:
+.LVL1413:
+.L1026:
 	.loc 2 1729 0 discriminator 2
 	add	w3, w3, 1
-.LVL1412:
+.LVL1414:
 	add	x11, x11, 32
 	and	w3, w3, 65535
-.LVL1413:
-	b	.L1021
-.LVL1414:
-.L1029:
+.LVL1415:
+	b	.L1022
+.LVL1416:
+.L1030:
 	.loc 2 1770 0
 	mov	w0, 65535
 	cmp	w6, w0
-	bne	.L1030
+	bne	.L1031
 	.loc 2 1770 0 is_stmt 0 discriminator 1
 	ldrb	w0, [x19, 8]
-	cbnz	w0, .L1031
-.L1030:
-.LVL1415:
-.LBB265:
+	cbnz	w0, .L1032
+.L1031:
+.LVL1417:
+.LBB269:
 	.loc 2 1775 0 is_stmt 1
 	adrp	x25, .LANCHOR154
 	.loc 2 1774 0
 	and	w28, w23, 65535
-.LVL1416:
+.LVL1418:
 	.loc 2 1775 0
 	ldr	w0, [x25, #:lo12:.LANCHOR154]
 	cmn	w0, #1
-	bne	.L1032
+	bne	.L1033
 	.loc 2 1776 0
 	str	w21, [x25, #:lo12:.LANCHOR154]
-.L1032:
-.LVL1417:
+.L1033:
+.LVL1419:
 	.loc 2 1778 0
 	add	w0, w26, 7
 	cmp	w0, w23, uxth
-	bge	.L1082
+	bge	.L1083
 	.loc 2 1779 0
 	sub	w24, w28, #7
 	and	w24, w24, 65535
-.LVL1418:
-.L1033:
+.LVL1420:
+.L1034:
 	.loc 2 1782 0 discriminator 1
 	ldr	x0, [x29, 152]
 	.loc 2 1784 0 discriminator 1
@@ -13628,11 +13648,11 @@ FtlRecoverySuperblock:
 	mov	w5, 1
 	.loc 2 1782 0 discriminator 1
 	add	x4, x0, :lo12:.LANCHOR3
-.LVL1419:
-.L1034:
+.LVL1421:
+.L1035:
 	.loc 2 1780 0 discriminator 1
 	cmp	w24, w28
-	bhi	.L1044
+	bhi	.L1045
 	ldrh	w1, [x4]
 	.loc 2 1785 0
 	mov	w23, 0
@@ -13640,51 +13660,51 @@ FtlRecoverySuperblock:
 	add	x1, x1, 8
 	ldr	x2, [x29, 168]
 	add	x1, x19, x1, lsl 1
-	b	.L1045
-.LVL1420:
-.L1082:
+	b	.L1046
+.LVL1422:
+.L1083:
 	mov	w24, w26
-	b	.L1033
-.LVL1421:
-.L1036:
+	b	.L1034
+.LVL1423:
+.L1037:
 	.loc 2 1783 0
 	ldrh	w6, [x2]
-.LVL1422:
+.LVL1424:
 	.loc 2 1784 0
 	cmp	w6, w3
-	beq	.L1035
+	beq	.L1036
 	.loc 2 1785 0
 	ubfiz	x7, x23, 5, 16
 	.loc 2 1786 0
 	add	w23, w23, 1
-.LVL1423:
+.LVL1425:
 	.loc 2 1785 0
 	add	x7, x0, x7
 	.loc 2 1786 0
 	and	w23, w23, 65535
-.LVL1424:
+.LVL1426:
 	.loc 2 1785 0
 	orr	w6, w24, w6, lsl 10
-.LVL1425:
+.LVL1427:
 	str	w6, [x7, 4]
-.L1035:
+.L1036:
 	add	x2, x2, 2
-.LVL1426:
-.L1045:
+.LVL1428:
+.L1046:
 	.loc 2 1782 0 discriminator 1
 	cmp	x2, x1
-	bne	.L1036
+	bne	.L1037
 	.loc 2 1789 0
 	mov	w1, w23
 	mov	w2, 0
 	str	w5, [x29, 112]
 	ubfiz	x23, x23, 5, 16
-.LVL1427:
+.LVL1429:
 	str	w3, [x29, 120]
 	add	x23, x23, 16
 	str	x4, [x29, 136]
 	bl	FlashReadPages
-.LVL1428:
+.LVL1430:
 	.loc 2 1791 0
 	ldr	x2, [x20, #:lo12:.LANCHOR120]
 	ldr	w1, [x25, #:lo12:.LANCHOR154]
@@ -13695,29 +13715,29 @@ FtlRecoverySuperblock:
 	add	x23, x2, x23
 	ldr	x4, [x29, 136]
 	mov	w2, 0
-.LVL1429:
-.L1037:
+.LVL1431:
+.L1038:
 	.loc 2 1790 0 is_stmt 0 discriminator 1
 	cmp	x23, x0
-	bne	.L1042
-	cbz	w2, .L1043
+	bne	.L1043
+	cbz	w2, .L1044
 	str	w1, [x25, #:lo12:.LANCHOR154]
-.L1043:
+.L1044:
 	.loc 2 1780 0 is_stmt 1
 	add	w24, w24, 1
-.LVL1430:
+.LVL1432:
 	and	w24, w24, 65535
-.LVL1431:
-	b	.L1034
-.L1042:
+.LVL1433:
+	b	.L1035
+.L1043:
 	.loc 2 1791 0
 	ldr	w6, [x0, -16]
-	cbz	w6, .L1038
-	cbz	w2, .L1031
+	cbz	w6, .L1039
+	cbz	w2, .L1032
 	str	w1, [x25, #:lo12:.LANCHOR154]
-.LVL1432:
-.L1031:
-.LBE265:
+.LVL1434:
+.L1032:
+.LBE269:
 	.loc 2 1814 0
 	mov	w1, 1
 	adrp	x0, .LANCHOR162
@@ -13731,15 +13751,15 @@ FtlRecoverySuperblock:
 	adrp	x0, .LANCHOR144
 	add	x0, x0, :lo12:.LANCHOR144
 	bl	FtlMapBlkWriteDump_data
-.LVL1433:
-.LBB266:
+.LVL1435:
+.LBB270:
 	.loc 2 1897 0
 	add	x0, x28, :lo12:.LANCHOR154
 	str	x0, [x29, 104]
-.LVL1434:
-.L1046:
+.LVL1436:
+.L1047:
 	ldr	x1, [x29, 152]
-.LBE266:
+.LBE270:
 	.loc 2 1820 0
 	mov	w24, 0
 	.loc 2 1824 0
@@ -13751,16 +13771,16 @@ FtlRecoverySuperblock:
 	ldrh	w1, [x1, #:lo12:.LANCHOR3]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.LVL1435:
-.L1047:
+.LVL1437:
+.L1048:
 	.loc 2 1821 0 is_stmt 0 discriminator 1
 	cmp	x1, x2
-	bne	.L1049
+	bne	.L1050
 	.loc 2 1828 0 is_stmt 1
 	mov	w2, 0
 	mov	w1, w24
 	bl	FlashReadPages
-.LVL1436:
+.LVL1438:
 	.loc 2 1829 0
 	mov	x25, 0
 	ubfiz	x0, x24, 5, 16
@@ -13769,23 +13789,23 @@ FtlRecoverySuperblock:
 	adrp	x0, .LANCHOR163
 	add	x0, x0, :lo12:.LANCHOR163
 	str	x0, [x29, 120]
-.LVL1437:
-.L1050:
+.LVL1439:
+.L1051:
 	.loc 2 1829 0 discriminator 1
 	ldr	x0, [x29, 112]
 	cmp	x25, x0
-	bne	.L1076
+	bne	.L1077
 	.loc 2 1983 0
 	ldr	x0, [x29, 128]
 	.loc 2 1982 0
 	add	w23, w23, 1
-.LVL1438:
+.LVL1440:
 	and	w23, w23, 65535
-.LVL1439:
+.LVL1441:
 	.loc 2 1983 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	cmp	w0, w23
-	bne	.L1046
+	bne	.L1047
 	.loc 2 1986 0
 	ldr	x0, [x29, 152]
 	.loc 2 1988 0
@@ -13794,83 +13814,83 @@ FtlRecoverySuperblock:
 	strh	w23, [x19, 2]
 	.loc 2 1985 0
 	strh	wzr, [x19, 4]
-.LVL1440:
+.LVL1442:
 	.loc 2 1986 0
 	ldrh	w1, [x0, #:lo12:.LANCHOR3]
 	mov	w0, 0
-.LVL1441:
-.L1077:
+.LVL1443:
+.L1078:
 	.loc 2 1986 0 is_stmt 0 discriminator 1
 	cmp	w0, w1
-	beq	.L1133
-.LVL1442:
+	beq	.L1134
+.LVL1444:
 	.loc 2 1988 0 is_stmt 1
 	ldr	x4, [x29, 168]
 	ldrh	w3, [x4], 2
 	str	x4, [x29, 168]
-.LVL1443:
+.LVL1445:
 	cmp	w3, w2
-	beq	.L1078
+	beq	.L1079
 	.loc 2 1989 0
 	strb	w0, [x19, 6]
-.LVL1444:
+.LVL1446:
 	.loc 2 1990 0
-	b	.L1133
-.LVL1445:
-.L1038:
-.LBB267:
+	b	.L1134
+.LVL1447:
+.L1039:
+.LBB271:
 	.loc 2 1792 0
 	ldr	x6, [x0]
-.LVL1446:
+.LVL1448:
 	.loc 2 1793 0
 	ldrh	w7, [x6]
 	cmp	w7, w3
-	beq	.L1041
+	beq	.L1042
 	.loc 2 1795 0
 	ldr	w6, [x6, 4]
-.LVL1447:
+.LVL1449:
 	cmn	w6, #1
 	csel	w1, w1, w6, eq
 	csel	w2, w2, w5, eq
-.L1041:
+.L1042:
 	add	x0, x0, 32
-.LVL1448:
-	b	.L1037
-.LVL1449:
-.L1044:
+.LVL1450:
+	b	.L1038
+.LVL1451:
+.L1045:
 	.loc 2 1809 0
 	mov	w0, -1
 	str	w0, [x25, #:lo12:.LANCHOR154]
-	b	.L1031
-.LVL1450:
-.L1049:
-.LBE267:
+	b	.L1032
+.LVL1452:
+.L1050:
+.LBE271:
 	.loc 2 1822 0
 	ldrh	w3, [x2]
-.LVL1451:
+.LVL1453:
 	.loc 2 1823 0
 	cmp	w3, w5
-	beq	.L1048
+	beq	.L1049
 	.loc 2 1824 0
 	ubfiz	x4, x24, 5, 16
 	.loc 2 1825 0
 	add	w24, w24, 1
-.LVL1452:
+.LVL1454:
 	.loc 2 1824 0
 	add	x4, x0, x4
 	.loc 2 1825 0
 	and	w24, w24, 65535
-.LVL1453:
+.LVL1455:
 	.loc 2 1824 0
 	orr	w3, w23, w3, lsl 10
-.LVL1454:
+.LVL1456:
 	str	w3, [x4, 4]
-.L1048:
+.L1049:
 	add	x2, x2, 2
-.LVL1455:
-	b	.L1047
-.LVL1456:
-.L1076:
+.LVL1457:
+	b	.L1048
+.LVL1458:
+.L1077:
 	.loc 2 1830 0
 	ldr	x4, [x20, #:lo12:.LANCHOR120]
 	add	x4, x4, x25
@@ -13879,69 +13899,69 @@ FtlRecoverySuperblock:
 	.loc 2 1831 0
 	lsr	w0, w5, 10
 	bl	P2V_plane
-.LVL1457:
+.LVL1459:
 	and	w0, w0, 65535
-.LVL1458:
+.LVL1460:
 	.loc 2 1833 0
 	cmp	w23, w26
-	bcc	.L1051
+	bcc	.L1052
 	.loc 2 1833 0 is_stmt 0 discriminator 1
 	ldr	w1, [x29, 164]
 	ccmp	w1, w0, 0, eq
-	bhi	.L1051
+	bhi	.L1052
 	.loc 2 1837 0 is_stmt 1
 	cmp	w23, w22
 	ccmp	w27, w0, 0, eq
-	beq	.L1052
-.LVL1459:
+	beq	.L1053
+.LVL1461:
 	.loc 2 1841 0
 	ldr	w0, [x4]
-.LVL1460:
+.LVL1462:
 	cmn	w0, #1
-	beq	.L1053
+	beq	.L1054
 	.loc 2 1842 0
 	ldr	x3, [x4, 16]
-.LVL1461:
+.LVL1463:
 	.loc 2 1843 0
 	mov	w0, 61589
 	ldrh	w1, [x3]
 	cmp	w1, w0
-	beq	.L1054
-.LVL1462:
-.L1060:
-.LBB268:
+	beq	.L1055
+.LVL1464:
+.L1061:
+.LBB272:
 	.loc 2 1876 0
 	ldrh	w0, [x19]
-.LVL1463:
-.L1138:
-.LBE268:
+.LVL1465:
+.L1139:
+.LBE272:
 	.loc 2 1960 0
 	bl	decrement_vpc_count
-.LVL1464:
-.L1051:
+.LVL1466:
+.L1052:
 	add	x25, x25, 32
-	b	.L1050
-.LVL1465:
-.L1054:
+	b	.L1051
+.LVL1467:
+.L1055:
 	.loc 2 1849 0
 	ldr	w21, [x3, 4]
-.LVL1466:
+.LVL1468:
 	.loc 2 1850 0
 	cmn	w21, #1
-	beq	.L1055
+	beq	.L1056
 	.loc 2 1851 0 discriminator 1
 	ldr	x0, [x29, 144]
 	ldr	w1, [x0, #:lo12:.LANCHOR72]
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-.LVL1467:
+.LVL1469:
 	.loc 2 1850 0 discriminator 1
-	cbz	w0, .L1055
+	cbz	w0, .L1056
 	.loc 2 1853 0
 	ldr	x1, [x29, 144]
 	add	w0, w21, 1
 	str	w0, [x1, #:lo12:.LANCHOR72]
-.L1055:
+.L1056:
 	.loc 2 1858 0
 	ldp	w24, w0, [x3, 8]
 	.loc 2 1859 0
@@ -13952,22 +13972,22 @@ FtlRecoverySuperblock:
 	mov	w2, 0
 	mov	w0, w24
 	bl	log2phys
-.LVL1468:
+.LVL1470:
 	.loc 2 1860 0
 	ldr	w1, [x28, #:lo12:.LANCHOR154]
 	cmn	w1, #1
-	beq	.L1056
+	beq	.L1057
 	.loc 2 1861 0 discriminator 1
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-.LVL1469:
+.LVL1471:
 	.loc 2 1860 0 discriminator 1
-	cbz	w0, .L1056
-.LBB269:
+	cbz	w0, .L1057
+.LBB273:
 	.loc 2 1865 0
 	ldr	w1, [x29, 180]
 	cmn	w1, #1
-	beq	.L1057
+	beq	.L1058
 	.loc 2 1866 0
 	ldr	x0, [x20, #:lo12:.LANCHOR120]
 	.loc 2 1868 0
@@ -13981,47 +14001,47 @@ FtlRecoverySuperblock:
 	mov	w1, 1
 	.loc 2 1866 0
 	str	x3, [x29, 136]
-.LVL1470:
+.LVL1472:
 	.loc 2 1868 0
 	bl	FlashReadPages
-.LVL1471:
+.LVL1473:
 	.loc 2 1881 0
 	ldr	x0, [x20, #:lo12:.LANCHOR120]
 	ldr	x3, [x29, 136]
 	add	x4, x0, x25
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	bne	.L1058
-.LVL1472:
-.L1059:
+	bne	.L1059
+.LVL1474:
+.L1060:
 	.loc 2 1913 0
 	mov	w0, -1
 	str	w0, [x29, 180]
 	.loc 2 1914 0
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-.LVL1473:
-.L1067:
-.LBE269:
+.LVL1475:
+.L1068:
+.LBE273:
 	.loc 2 1954 0
 	ldr	w3, [x29, 180]
 	cmn	w3, #1
-	beq	.L1051
-.L1081:
+	beq	.L1052
+.L1082:
 	.loc 2 1956 0
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
-.LVL1474:
+.LVL1476:
 	and	w24, w0, 65535
 	.loc 2 1957 0
 	adrp	x0, .LANCHOR5
 	.loc 2 1956 0
 	mov	w3, w24
-.LVL1475:
+.LVL1477:
 	.loc 2 1957 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR5]
 	cmp	w0, w24
-	bhi	.L1072
+	bhi	.L1073
 	.loc 2 1957 0 is_stmt 0 discriminator 1
 	mov	w2, 1957
 	adrp	x1, .LANCHOR161
@@ -14030,51 +14050,51 @@ FtlRecoverySuperblock:
 	add	x0, x0, :lo12:.LC1
 	str	w24, [x29, 136]
 	bl	printf
-.LVL1476:
+.LVL1478:
 	ldr	w3, [x29, 136]
-.LVL1477:
-.L1072:
+.LVL1479:
+.L1073:
 	.loc 2 1958 0 is_stmt 1
 	adrp	x1, .LANCHOR43
 	ubfiz	x0, x24, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR43]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1073
+	cbz	w0, .L1074
 	.loc 2 1960 0
 	mov	w0, w3
-	b	.L1138
-.LVL1478:
-.L1057:
-.LBB270:
+	b	.L1139
+.LVL1480:
+.L1058:
+.LBB274:
 	.loc 2 1872 0
 	ldp	w1, w0, [x29, 184]
 	cmp	w1, w0
-	bne	.L1060
+	bne	.L1061
 	.loc 2 1873 0
 	mov	w2, 1
 	add	x1, x29, 180
 	mov	w0, w24
 	bl	log2phys
-.LVL1479:
-	b	.L1060
-.LVL1480:
-.L1058:
+.LVL1481:
+	b	.L1061
+.LVL1482:
+.L1059:
 	.loc 2 1881 0 discriminator 1
 	ldr	w0, [x3, 8]
 	cmp	w24, w0
-	bne	.L1059
+	bne	.L1060
 	.loc 2 1869 0 discriminator 2
 	ldr	w0, [x3, 4]
 	str	w0, [x29, 136]
-.LVL1481:
+.LVL1483:
 	str	x3, [x29, 96]
 	.loc 2 1882 0 discriminator 2
 	uxtw	x1, w0
 	ldr	w0, [x28, #:lo12:.LANCHOR154]
 	bl	ftl_cmp_data_ver
-.LVL1482:
+.LVL1484:
 	.loc 2 1881 0 discriminator 2
-	cbz	w0, .L1059
+	cbz	w0, .L1060
 	.loc 2 1883 0
 	ldp	w0, w1, [x29, 184]
 	ldr	x3, [x29, 96]
@@ -14082,21 +14102,21 @@ FtlRecoverySuperblock:
 	.loc 2 1885 0
 	ldr	w1, [x29, 180]
 	.loc 2 1883 0
-	bne	.L1062
-.L1136:
+	bne	.L1063
+.L1137:
 	.loc 2 1909 0
 	mov	w0, w24
 	bl	FtlReUsePrevPpa
-.LVL1483:
-	b	.L1059
-.L1062:
+.LVL1485:
+	b	.L1060
+.L1063:
 	.loc 2 1886 0
 	cmp	w0, w1
-	beq	.L1059
+	beq	.L1060
 	.loc 2 1887 0
 	cmn	w0, #1
-	beq	.L1063
-.LVL1484:
+	beq	.L1064
+.LVL1486:
 	.loc 2 1888 0
 	ldr	x3, [x4, 16]
 	.loc 2 1890 0
@@ -14110,92 +14130,92 @@ FtlRecoverySuperblock:
 	.loc 2 1890 0
 	mov	x0, x4
 	bl	FlashReadPages
-.LVL1485:
+.LVL1487:
 	ldr	x3, [x29, 96]
-.LVL1486:
-.L1064:
+.LVL1488:
+.L1065:
 	.loc 2 1895 0
 	ldr	x0, [x20, #:lo12:.LANCHOR120]
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	beq	.L1065
+	beq	.L1066
 	.loc 2 1897 0
 	ldr	x0, [x29, 104]
 	.loc 2 1896 0
 	ldr	w3, [x3, 4]
-.LVL1487:
+.LVL1489:
 	.loc 2 1897 0
 	mov	w1, w3
 	ldr	w0, [x0]
 	bl	ftl_cmp_data_ver
-.LVL1488:
-	cbz	w0, .L1065
+.LVL1490:
+	cbz	w0, .L1066
 	.loc 2 1898 0
 	ldr	w0, [x29, 136]
 	mov	w1, w3
 	bl	ftl_cmp_data_ver
-.LVL1489:
-	cbz	w0, .L1059
-.LVL1490:
-.L1065:
+.LVL1491:
+	cbz	w0, .L1060
+.LVL1492:
+.L1066:
 	.loc 2 1909 0
 	ldr	w1, [x29, 180]
-	b	.L1136
-.L1063:
+	b	.L1137
+.L1064:
 	.loc 2 1892 0
 	str	w0, [x4]
-	b	.L1064
-.L1056:
-.LBE270:
+	b	.L1065
+.L1057:
+.LBE274:
 	.loc 2 1915 0
 	ldp	w1, w0, [x29, 184]
 	cmp	w1, w0
-	beq	.L1067
+	beq	.L1068
 	.loc 2 1917 0
 	mov	w2, 1
 	add	x1, x29, 188
 	mov	w0, w24
 	bl	log2phys
-.LVL1491:
+.LVL1493:
 	.loc 2 1918 0
 	ldr	w3, [x29, 184]
 	cmn	w3, #1
-	beq	.L1067
+	beq	.L1068
 	.loc 2 1918 0 is_stmt 0 discriminator 1
 	ldr	w0, [x29, 180]
 	cmp	w3, w0
-	beq	.L1081
+	beq	.L1082
 	.loc 2 1919 0 is_stmt 1
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
-.LVL1492:
+.LVL1494:
 	.loc 2 1921 0
 	adrp	x1, .LANCHOR51
 	.loc 2 1919 0
 	and	w0, w0, 65535
-.LVL1493:
+.LVL1495:
 	.loc 2 1921 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR51]
 	cmp	w1, w0
-	beq	.L1071
+	beq	.L1072
 	.loc 2 1922 0 discriminator 1
 	adrp	x1, .LANCHOR52
 	.loc 2 1921 0 discriminator 1
 	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	beq	.L1071
+	beq	.L1072
 	.loc 2 1923 0
 	adrp	x1, .LANCHOR53
 	.loc 2 1922 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L1067
-.L1071:
-.LVL1494:
-.LBB271:
+	bne	.L1068
+.L1072:
+.LVL1496:
+.LBB275:
 	.loc 2 1927 0
 	ldr	x0, [x20, #:lo12:.LANCHOR120]
-.LVL1495:
+.LVL1497:
 	.loc 2 1930 0
 	mov	w2, 0
 	mov	w1, 1
@@ -14205,46 +14225,46 @@ FtlRecoverySuperblock:
 	str	w3, [x0, 4]
 	.loc 2 1927 0
 	str	x4, [x29, 136]
-.LVL1496:
+.LVL1498:
 	.loc 2 1930 0
 	bl	FlashReadPages
-.LVL1497:
+.LVL1499:
 	.loc 2 1933 0
 	ldr	x0, [x20, #:lo12:.LANCHOR120]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L1067
+	beq	.L1068
 	.loc 2 1934 0
 	ldr	x4, [x29, 136]
 	mov	w0, w21
 	ldr	w1, [x4, 4]
 	bl	ftl_cmp_data_ver
-.LVL1498:
-	cbnz	w0, .L1067
+.LVL1500:
+	cbnz	w0, .L1068
 	.loc 2 1941 0
 	mov	w2, 1
 	add	x1, x29, 184
 	mov	w0, w24
 	bl	log2phys
-.LVL1499:
-	b	.L1067
-.LVL1500:
-.L1073:
-.LBE271:
+.LVL1501:
+	b	.L1068
+.LVL1502:
+.L1074:
+.LBE275:
 	.loc 2 1962 0
 	mov	w1, w24
 	adrp	x0, .LC99
 	add	x0, x0, :lo12:.LC99
 	bl	printf
-.LVL1501:
-	b	.L1051
-.LVL1502:
-.L1053:
+.LVL1503:
+	b	.L1052
+.LVL1504:
+.L1054:
 	.loc 2 1969 0
 	ldr	x0, [x29, 120]
 	ldr	w0, [x0]
 	cmp	w0, 31
-	bhi	.L1074
+	bhi	.L1075
 	.loc 2 1970 0
 	adrp	x1, .LANCHOR164
 	add	x1, x1, :lo12:.LANCHOR164
@@ -14253,39 +14273,39 @@ FtlRecoverySuperblock:
 	add	w0, w0, 1
 	ldr	x1, [x29, 120]
 	str	w0, [x1]
-.L1074:
+.L1075:
 	.loc 2 1973 0
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-.LVL1503:
+.LVL1505:
 	.loc 2 1975 0
 	ldr	w0, [x28, #:lo12:.LANCHOR154]
 	cmn	w0, #1
-	bne	.L1075
-.L1137:
+	bne	.L1076
+.L1138:
 	.loc 2 1978 0
 	str	w21, [x28, #:lo12:.LANCHOR154]
-	b	.L1051
-.L1075:
+	b	.L1052
+.L1076:
 	.loc 2 1977 0
 	cmp	w21, w0
-	bcs	.L1051
-	b	.L1137
-.LVL1504:
-.L1078:
+	bcs	.L1052
+	b	.L1138
+.LVL1506:
+.L1079:
 	.loc 2 1986 0 discriminator 2
 	add	w0, w0, 1
-.LVL1505:
-	and	w0, w0, 65535
-.LVL1506:
-	b	.L1077
 .LVL1507:
-.L1052:
+	and	w0, w0, 65535
+.LVL1508:
+	b	.L1078
+.LVL1509:
+.L1053:
 	.loc 2 2002 0
 	strb	w27, [x19, 6]
 	.loc 2 2003 0
 	strh	w22, [x19, 2]
-	b	.L1140
+	b	.L1141
 	.cfi_endproc
 .LFE281:
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
@@ -14297,7 +14317,7 @@ FtlSuperblockPowerLostFix:
 .LFB288:
 	.loc 2 2156 0
 	.cfi_startproc
-.LVL1508:
+.LVL1510:
 	stp	x29, x30, [sp, -96]!
 	.cfi_def_cfa_offset 96
 	.cfi_offset 29, -96
@@ -14326,18 +14346,18 @@ FtlSuperblockPowerLostFix:
 	mov	w22, -1
 	.loc 2 2169 0
 	adrp	x23, .LANCHOR39
-.LVL1509:
-.L1142:
+.LVL1511:
+.L1143:
 	.loc 2 2162 0
 	subs	w21, w21, #1
-.LVL1510:
-	beq	.L1144
-.LVL1511:
+.LVL1512:
+	beq	.L1145
+.LVL1513:
 	.loc 2 2163 0
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1143
-.LVL1512:
-.L1144:
+	cbnz	w0, .L1144
+.LVL1514:
+.L1145:
 	.loc 2 2183 0
 	ldrh	w0, [x19]
 	adrp	x1, .LANCHOR43
@@ -14359,7 +14379,7 @@ FtlSuperblockPowerLostFix:
 	.loc 2 2188 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x19, x20, [sp, 16]
-.LVL1513:
+.LVL1515:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 96
 	.cfi_remember_state
@@ -14372,17 +14392,17 @@ FtlSuperblockPowerLostFix:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1514:
-.L1143:
+.LVL1516:
+.L1144:
 	.cfi_restore_state
 	.loc 2 2165 0
 	mov	x0, x19
 	bl	get_new_active_ppa
-.LVL1515:
+.LVL1517:
 	str	w0, [x29, 68]
 	.loc 2 2166 0
 	cmn	w0, #1
-	beq	.L1144
+	beq	.L1145
 	.loc 2 2169 0
 	ldr	x0, [x23, #:lo12:.LANCHOR39]
 	.loc 2 2179 0
@@ -14398,7 +14418,7 @@ FtlSuperblockPowerLostFix:
 	.loc 2 2170 0
 	ldr	x1, [x0, #:lo12:.LANCHOR109]
 	str	x1, [x29, 80]
-.LVL1516:
+.LVL1518:
 	.loc 2 2175 0
 	ldrh	w0, [x19]
 	strh	w0, [x1, 2]
@@ -14418,18 +14438,18 @@ FtlSuperblockPowerLostFix:
 	csel	w0, w0, wzr, ne
 	.loc 2 2179 0
 	mov	w1, 1
-.LVL1517:
+.LVL1519:
 	.loc 2 2178 0
 	str	w0, [x20]
 	.loc 2 2179 0
 	add	x0, x29, 64
 	bl	FlashProgPages
-.LVL1518:
+.LVL1520:
 	.loc 2 2180 0
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-.LVL1519:
-	b	.L1142
+.LVL1521:
+	b	.L1143
 	.cfi_endproc
 .LFE288:
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
@@ -14477,22 +14497,22 @@ FtlLoadBbt:
 	adrp	x0, .LANCHOR109
 	ldr	x21, [x0, #:lo12:.LANCHOR109]
 	str	x21, [x20, 16]
-.LVL1520:
+.LVL1522:
 	.loc 4 183 0
 	bl	FtlBbtMemInit
-.LVL1521:
+.LVL1523:
 	.loc 4 184 0
 	ldrh	w19, [x24, #:lo12:.LANCHOR17]
 	add	x24, x24, :lo12:.LANCHOR17
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.LVL1522:
-.L1154:
+.LVL1524:
+.L1155:
 	.loc 4 184 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x24]
 	sub	w0, w0, #15
 	cmp	w0, w19
-	bgt	.L1157
+	bgt	.L1158
 	.loc 4 185 0 is_stmt 1
 	lsl	w0, w19, 10
 	.loc 4 186 0
@@ -14503,11 +14523,11 @@ FtlLoadBbt:
 	mov	w1, w2
 	mov	x0, x20
 	bl	FlashReadPages
-.LVL1523:
+.LVL1525:
 	.loc 4 187 0
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L1155
+	bne	.L1156
 	.loc 4 188 0
 	ldr	w0, [x20, 4]
 	.loc 4 189 0
@@ -14519,16 +14539,16 @@ FtlLoadBbt:
 	.loc 4 189 0
 	mov	x0, x20
 	bl	FlashReadPages
-.LVL1524:
-.L1155:
+.LVL1526:
+.L1156:
 	.loc 4 191 0
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L1156
+	beq	.L1157
 	.loc 4 196 0
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	bne	.L1156
+	bne	.L1157
 	.loc 4 198 0
 	adrp	x1, .LANCHOR37
 	add	x0, x1, :lo12:.LANCHOR37
@@ -14539,19 +14559,19 @@ FtlLoadBbt:
 	.loc 4 200 0
 	ldrh	w1, [x21, 8]
 	strh	w1, [x0, 4]
-.L1157:
+.L1158:
 	.loc 4 216 0
 	adrp	x19, .LANCHOR37
-.LVL1525:
+.LVL1527:
 	mov	w0, 65535
 	add	x20, x19, :lo12:.LANCHOR37
 	ldrh	w1, [x19, #:lo12:.LANCHOR37]
 	cmp	w1, w0
-	beq	.L1171
+	beq	.L1172
 	.loc 4 222 0
 	ldrh	w1, [x20, 4]
 	cmp	w1, w0
-	beq	.L1161
+	beq	.L1162
 	.loc 4 224 0
 	add	x0, x22, :lo12:.LANCHOR108
 	lsl	w1, w1, 10
@@ -14562,21 +14582,21 @@ FtlLoadBbt:
 	.loc 4 225 0
 	mov	w1, w2
 	bl	FlashReadPages
-.LVL1526:
+.LVL1528:
 	.loc 4 226 0
 	ldr	w0, [x22, #:lo12:.LANCHOR108]
 	cmn	w0, #1
-	beq	.L1161
+	beq	.L1162
 	.loc 4 229 0
 	ldrh	w1, [x21]
 	mov	w0, 61649
 	cmp	w1, w0
-	bne	.L1161
+	bne	.L1162
 	.loc 4 229 0 is_stmt 0 discriminator 1
 	ldr	w1, [x20, 8]
 	ldr	w0, [x21, 4]
 	cmp	w0, w1
-	bls	.L1161
+	bls	.L1162
 	.loc 4 231 0 is_stmt 1
 	ldrh	w1, [x20, 4]
 	.loc 4 232 0
@@ -14587,7 +14607,7 @@ FtlLoadBbt:
 	strh	w1, [x19, #:lo12:.LANCHOR37]
 	.loc 4 233 0
 	strh	w0, [x20, 4]
-.L1161:
+.L1162:
 	.loc 4 238 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR37]
 	add	x24, x19, :lo12:.LANCHOR37
@@ -14596,17 +14616,17 @@ FtlLoadBbt:
 	mov	w25, 61649
 	.loc 4 238 0
 	bl	FtlGetLastWrittenPage
-.LVL1527:
+.LVL1529:
 	sxth	w20, w0
-.LVL1528:
+.LVL1530:
 	.loc 4 239 0
 	add	w0, w0, 1
 	strh	w0, [x24, 2]
 	.loc 4 243 0
 	add	x24, x22, :lo12:.LANCHOR108
-.L1163:
+.L1164:
 	.loc 4 241 0
-	tbz	w20, #31, .L1166
+	tbz	w20, #31, .L1167
 	.loc 4 254 0
 	adrp	x1, .LANCHOR165
 	adrp	x0, .LC1
@@ -14614,8 +14634,8 @@ FtlLoadBbt:
 	add	x1, x1, :lo12:.LANCHOR165
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1529:
-.L1165:
+.LVL1531:
+.L1166:
 	.loc 4 255 0
 	add	x0, x19, :lo12:.LANCHOR37
 	ldrh	w1, [x21, 10]
@@ -14624,29 +14644,29 @@ FtlLoadBbt:
 	mov	w1, 65535
 	ldrh	w0, [x21, 12]
 	cmp	w0, w1
-	beq	.L1168
+	beq	.L1169
 	.loc 4 259 0
 	adrp	x1, .LANCHOR2
 	ldr	w2, [x1, #:lo12:.LANCHOR2]
 	cmp	w0, w2
-	beq	.L1168
+	beq	.L1169
 	.loc 4 259 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR6
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	lsr	w1, w1, 2
 	cmp	w2, w1
-	bcs	.L1168
+	bcs	.L1169
 	.loc 4 261 0 is_stmt 1
 	cmp	w0, w1
-	bcs	.L1168
+	bcs	.L1169
 	.loc 4 263 0
 	bl	FtlSysBlkNumInit
-.LVL1530:
-.L1168:
+.LVL1532:
+.L1169:
 	add	x19, x19, :lo12:.LANCHOR37
 	.loc 4 268 0 discriminator 1
 	adrp	x21, .LANCHOR10
-.LVL1531:
+.LVL1533:
 	.loc 4 269 0 discriminator 1
 	adrp	x23, .LANCHOR137
 	add	x19, x19, 32
@@ -14657,16 +14677,16 @@ FtlLoadBbt:
 	add	x22, x22, :lo12:.LANCHOR108
 	.loc 4 173 0 discriminator 1
 	mov	w20, 0
-.LVL1532:
-.L1169:
+.LVL1534:
+.L1170:
 	.loc 4 268 0 discriminator 1
 	ldrh	w0, [x21]
 	cmp	w20, w0
-	bcc	.L1170
+	bcc	.L1171
 	.loc 4 275 0
 	mov	w0, 0
-.LVL1533:
-.L1153:
+.LVL1535:
+.L1154:
 	.loc 4 276 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -14685,17 +14705,17 @@ FtlLoadBbt:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1534:
-.L1156:
+.LVL1536:
+.L1157:
 	.cfi_restore_state
 	.loc 4 184 0 discriminator 2
 	sub	w19, w19, #1
-.LVL1535:
-	and	w19, w19, 65535
-.LVL1536:
-	b	.L1154
 .LVL1537:
-.L1166:
+	and	w19, w19, 65535
+.LVL1538:
+	b	.L1155
+.LVL1539:
+.L1167:
 	.loc 4 243 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR37]
 	.loc 4 245 0
@@ -14710,23 +14730,23 @@ FtlLoadBbt:
 	.loc 4 245 0
 	mov	x0, x24
 	bl	FlashReadPages
-.LVL1538:
+.LVL1540:
 	.loc 4 247 0
 	ldr	w0, [x24]
 	cmn	w0, #1
-	beq	.L1164
+	beq	.L1165
 	.loc 4 247 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	beq	.L1165
-.L1164:
+	beq	.L1166
+.L1165:
 	sub	w20, w20, #1
-.LVL1539:
-	sxth	w20, w20
-.LVL1540:
-	b	.L1163
 .LVL1541:
-.L1170:
+	sxth	w20, w20
+.LVL1542:
+	b	.L1164
+.LVL1543:
+.L1171:
 	.loc 4 269 0 is_stmt 1 discriminator 3
 	ldrh	w2, [x23]
 	ldr	x0, [x22, 8]
@@ -14734,18 +14754,18 @@ FtlLoadBbt:
 	lsl	w2, w2, 2
 	.loc 4 268 0 discriminator 3
 	add	w20, w20, 1
-.LVL1542:
+.LVL1544:
 	.loc 4 269 0 discriminator 3
 	add	x1, x0, x1, lsl 2
 	ldr	x0, [x19], 8
 	bl	ftl_memcpy
-.LVL1543:
-	b	.L1169
-.LVL1544:
-.L1171:
+.LVL1545:
+	b	.L1170
+.LVL1546:
+.L1172:
 	.loc 4 218 0
 	mov	w0, -1
-	b	.L1153
+	b	.L1154
 	.cfi_endproc
 .LFE229:
 	.size	FtlLoadBbt, .-FtlLoadBbt
@@ -14786,10 +14806,10 @@ FtlMakeBbt:
 	.cfi_offset 28, -40
 	.loc 4 325 0
 	bl	FtlBbtMemInit
-.LVL1545:
+.LVL1547:
 	.loc 4 326 0
 	bl	FtlLoadFactoryBbt
-.LVL1546:
+.LVL1548:
 	.loc 4 328 0
 	adrp	x28, .LANCHOR108
 	add	x21, x21, 12
@@ -14799,63 +14819,63 @@ FtlMakeBbt:
 	adrp	x0, .LANCHOR10
 	add	x0, x0, :lo12:.LANCHOR10
 	str	x0, [x29, 120]
-.LVL1547:
-.L1184:
+.LVL1549:
+.L1185:
 	.loc 4 327 0 is_stmt 0 discriminator 1
 	ldr	x0, [x29, 120]
 	ldrh	w0, [x0]
 	cmp	w22, w0
-	bcc	.L1190
+	bcc	.L1191
 	.loc 4 381 0 is_stmt 1 discriminator 1
 	adrp	x21, .LANCHOR25
 	add	x21, x21, :lo12:.LANCHOR25
 	mov	w19, 0
-.L1191:
-.LVL1548:
+.L1192:
+.LVL1550:
 	ldrh	w0, [x21]
 	cmp	w0, w19
-	bhi	.L1192
+	bhi	.L1193
 	.loc 4 387 0
 	add	x21, x20, :lo12:.LANCHOR37
 	.loc 4 396 0
 	mov	w22, 65535
-.LVL1549:
+.LVL1551:
 	.loc 4 387 0
 	ldrh	w19, [x21, 12]
-.LVL1550:
+.LVL1552:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.LVL1551:
-.L1193:
+.LVL1553:
+.L1194:
 	.loc 4 387 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x21, 12]
 	sub	w0, w0, #47
 	cmp	w0, w19
-	bgt	.L1197
+	bgt	.L1198
 	.loc 4 389 0 is_stmt 1
 	mov	w0, w19
 	bl	FtlBbmIsBadBlock
-.LVL1552:
+.LVL1554:
 	cmp	w0, 1
-	beq	.L1194
+	beq	.L1195
 	.loc 4 391 0
 	mov	w0, w19
 	bl	FlashTestBlk
-.LVL1553:
-	cbz	w0, .L1195
+.LVL1555:
+	cbz	w0, .L1196
 	.loc 4 393 0
 	mov	w0, w19
 	bl	FtlBbmMapBadBlock
-.LVL1554:
-.L1194:
+.LVL1556:
+.L1195:
 	.loc 4 387 0 discriminator 2
 	sub	w19, w19, #1
-.LVL1555:
-	and	w19, w19, 65535
-.LVL1556:
-	b	.L1193
 .LVL1557:
-.L1190:
+	and	w19, w19, 65535
+.LVL1558:
+	b	.L1194
+.LVL1559:
+.L1191:
 	.loc 4 329 0
 	adrp	x2, .LANCHOR109
 	.loc 4 328 0
@@ -14873,18 +14893,18 @@ FtlMakeBbt:
 	cmp	w1, w3
 	.loc 4 329 0
 	stp	x0, x26, [x19, 8]
-.LVL1558:
+.LVL1560:
 	adrp	x23, .LANCHOR17
 	str	x2, [x29, 112]
 	.loc 4 331 0
-	beq	.L1185
+	beq	.L1186
 	.loc 4 333 0
 	ldrh	w4, [x23, #:lo12:.LANCHOR17]
 	.loc 4 335 0
 	mov	w2, 1
 	.loc 4 333 0
 	madd	w27, w4, w22, w1
-.LVL1559:
+.LVL1561:
 	.loc 4 335 0
 	mov	w1, w2
 	.loc 4 334 0
@@ -14893,7 +14913,7 @@ FtlMakeBbt:
 	.loc 4 335 0
 	mov	x0, x19
 	bl	FlashReadPages
-.LVL1560:
+.LVL1562:
 	.loc 4 336 0
 	ldr	x1, [x19, 8]
 	ldr	x0, [x24]
@@ -14901,30 +14921,30 @@ FtlMakeBbt:
 	add	w2, w2, 7
 	lsr	w2, w2, 3
 	bl	ftl_memcpy
-.LVL1561:
-.L1186:
+.LVL1563:
+.L1187:
 	.loc 4 376 0 discriminator 2
 	mov	w0, w27
 	.loc 4 327 0 discriminator 2
 	add	w22, w22, 1
-.LVL1562:
+.LVL1564:
 	.loc 4 376 0 discriminator 2
 	bl	FtlBbmMapBadBlock
-.LVL1563:
+.LVL1565:
 	add	x24, x24, 8
 	add	x21, x21, 2
-	b	.L1184
-.LVL1564:
-.L1185:
+	b	.L1185
+.LVL1566:
+.L1186:
 	.loc 4 340 0
 	mov	w1, w22
 	bl	FlashGetBadBlockList
-.LVL1565:
+.LVL1567:
 	.loc 4 341 0
 	ldr	x0, [x19, 8]
 	ldr	x1, [x24]
 	bl	FtlBbt2Bitmap
-.LVL1566:
+.LVL1568:
 	.loc 4 343 0
 	ldrh	w19, [x23, #:lo12:.LANCHOR17]
 	.loc 4 345 0
@@ -14937,17 +14957,17 @@ FtlMakeBbt:
 	add	x0, x0, :lo12:.LANCHOR137
 	.loc 4 343 0
 	and	w19, w19, 65535
-.LVL1567:
+.LVL1569:
 	.loc 4 357 0
 	str	x0, [x29, 104]
-.L1187:
+.L1188:
 	.loc 4 345 0
 	ldrh	w0, [x23]
 	madd	w0, w22, w0, w19
 	bl	FtlBbmIsBadBlock
-.LVL1568:
+.LVL1570:
 	cmp	w0, 1
-	beq	.L1188
+	beq	.L1189
 	.loc 4 350 0
 	ldr	x0, [x29, 112]
 	mov	w2, 16
@@ -14957,14 +14977,14 @@ FtlMakeBbt:
 	mov	w1, 0
 	ldr	x0, [x0, #:lo12:.LANCHOR109]
 	bl	ftl_memset
-.LVL1569:
+.LVL1571:
 	.loc 4 351 0
 	adrp	x0, .LANCHOR39
 	mov	w2, 4096
 	mov	w1, 0
 	ldr	x0, [x0, #:lo12:.LANCHOR39]
 	bl	ftl_memset
-.LVL1570:
+.LVL1572:
 	.loc 4 352 0
 	mov	w0, -3872
 	strh	w0, [x26]
@@ -14979,7 +14999,7 @@ FtlMakeBbt:
 	str	wzr, [x26, 4]
 	.loc 4 355 0
 	madd	w27, w4, w22, w0
-.LVL1571:
+.LVL1573:
 	.loc 4 356 0
 	lsl	w0, w27, 10
 	str	w0, [x25, 4]
@@ -14989,70 +15009,70 @@ FtlMakeBbt:
 	ldr	x0, [x25, 8]
 	lsl	w2, w2, 2
 	bl	ftl_memcpy
-.LVL1572:
+.LVL1574:
 	.loc 4 358 0
 	mov	w2, 1
 	mov	x0, x25
 	mov	w1, w2
 	bl	FlashEraseBlocks
-.LVL1573:
+.LVL1575:
 	.loc 4 359 0
 	mov	w3, 1
 	mov	x0, x25
 	mov	w2, w3
 	mov	w1, w3
 	bl	FlashProgPages
-.LVL1574:
+.LVL1576:
 	.loc 4 360 0
 	ldr	w0, [x25]
 	cmn	w0, #1
-	bne	.L1186
+	bne	.L1187
 	.loc 4 362 0
 	mov	w0, w27
 	bl	FtlBbmMapBadBlock
-.LVL1575:
+.LVL1577:
 	.loc 4 363 0
-	b	.L1187
-.LVL1576:
-.L1188:
+	b	.L1188
+.LVL1578:
+.L1189:
 	.loc 4 347 0
 	sub	w19, w19, #1
-.LVL1577:
-	and	w19, w19, 65535
-.LVL1578:
-	b	.L1187
 .LVL1579:
-.L1192:
+	and	w19, w19, 65535
+.LVL1580:
+	b	.L1188
+.LVL1581:
+.L1193:
 	.loc 4 383 0 discriminator 3
 	mov	w0, w19
 	.loc 4 381 0 discriminator 3
 	add	w19, w19, 1
-.LVL1580:
+.LVL1582:
 	.loc 4 383 0 discriminator 3
 	bl	FtlBbmMapBadBlock
-.LVL1581:
+.LVL1583:
 	.loc 4 381 0 discriminator 3
 	and	w19, w19, 65535
-.LVL1582:
-	b	.L1191
-.LVL1583:
-.L1195:
+.LVL1584:
+	b	.L1192
+.LVL1585:
+.L1196:
 	.loc 4 396 0
 	ldrh	w0, [x21]
 	cmp	w0, w22
-	bne	.L1196
+	bne	.L1197
 	.loc 4 398 0
 	strh	w19, [x21]
-	b	.L1194
-.L1196:
+	b	.L1195
+.L1197:
 	.loc 4 402 0
 	strh	w19, [x21, 4]
-.L1197:
+.L1198:
 	.loc 4 414 0
 	adrp	x0, .LANCHOR112
 	.loc 4 411 0
 	add	x19, x20, :lo12:.LANCHOR37
-.LVL1584:
+.LVL1586:
 	.loc 4 414 0
 	ldrh	w1, [x20, #:lo12:.LANCHOR37]
 	.loc 4 416 0
@@ -15074,18 +15094,18 @@ FtlMakeBbt:
 	.loc 4 416 0
 	mov	w1, 1
 	bl	FlashEraseBlocks
-.LVL1585:
+.LVL1587:
 	.loc 4 418 0
 	ldrh	w0, [x20, #:lo12:.LANCHOR37]
 	bl	FtlBbmMapBadBlock
-.LVL1586:
+.LVL1588:
 	.loc 4 419 0
 	ldrh	w0, [x19, 4]
 	bl	FtlBbmMapBadBlock
-.LVL1587:
+.LVL1589:
 	.loc 4 421 0
 	bl	FtlBbmTblFlush
-.LVL1588:
+.LVL1590:
 	.loc 4 426 0
 	strh	wzr, [x19, 2]
 	.loc 4 422 0
@@ -15097,14 +15117,14 @@ FtlMakeBbt:
 	str	w0, [x19, 8]
 	.loc 4 424 0
 	ldrh	w0, [x20, #:lo12:.LANCHOR37]
-.LVL1589:
+.LVL1591:
 	.loc 4 427 0
 	strh	w0, [x19, 4]
 	.loc 4 425 0
 	strh	w1, [x20, #:lo12:.LANCHOR37]
 	.loc 4 429 0
 	bl	FtlBbmTblFlush
-.LVL1590:
+.LVL1592:
 	.loc 4 432 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
@@ -15138,7 +15158,7 @@ FtlVendorPartWrite:
 .LFB263:
 	.loc 2 786 0
 	.cfi_startproc
-.LVL1591:
+.LVL1593:
 	stp	x29, x30, [sp, -208]!
 	.cfi_def_cfa_offset 208
 	.cfi_offset 29, -208
@@ -15152,15 +15172,15 @@ FtlVendorPartWrite:
 	stp	x27, x28, [sp, 80]
 	.loc 2 794 0
 	add	w1, w0, w1
-.LVL1592:
+.LVL1594:
 	.cfi_offset 27, -128
 	.cfi_offset 28, -120
 	.loc 2 786 0
 	mov	w28, w0
-.LVL1593:
+.LVL1595:
 	.loc 2 794 0
 	adrp	x0, .LANCHOR16
-.LVL1594:
+.LVL1596:
 	.loc 2 786 0
 	stp	x21, x22, [sp, 32]
 	.loc 2 794 0
@@ -15176,7 +15196,7 @@ FtlVendorPartWrite:
 	.cfi_offset 26, -136
 	.loc 2 794 0
 	cmp	w1, w0
-	bhi	.L1211
+	bhi	.L1212
 	.loc 2 791 0
 	adrp	x0, .LANCHOR22
 	.loc 2 799 0
@@ -15193,21 +15213,21 @@ FtlVendorPartWrite:
 	.loc 2 791 0
 	mov	w23, 0
 	lsr	w21, w28, w21
-.LVL1595:
-.L1205:
+.LVL1597:
+.L1206:
 	.loc 2 797 0
-	cbnz	w20, .L1210
-.LVL1596:
-.L1203:
+	cbnz	w20, .L1211
+.LVL1598:
+.L1204:
 	.loc 2 820 0
 	mov	w0, w23
 	ldp	x19, x20, [sp, 16]
-.LVL1597:
+.LVL1599:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-.LVL1598:
+.LVL1600:
 	ldp	x29, x30, [sp], 208
 	.cfi_remember_state
 	.cfi_restore 30
@@ -15224,8 +15244,8 @@ FtlVendorPartWrite:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1599:
-.L1210:
+.LVL1601:
+.L1211:
 	.cfi_restore_state
 	.loc 2 799 0
 	ldrh	w1, [x25]
@@ -15237,25 +15257,25 @@ FtlVendorPartWrite:
 	udiv	w22, w28, w1
 	.loc 2 798 0
 	ldr	w2, [x0, w21, uxtw 2]
-.LVL1600:
+.LVL1602:
 	.loc 2 802 0
 	and	w0, w20, 65535
 	.loc 2 799 0
 	msub	w22, w22, w1, w28
-.LVL1601:
+.LVL1603:
 	.loc 2 800 0
 	sub	w19, w1, w22
 	and	w19, w19, 65535
-.LVL1602:
+.LVL1604:
 	.loc 2 802 0
 	cmp	w20, w19
 	csel	w19, w0, w19, cc
-.LVL1603:
+.LVL1605:
 	.loc 2 803 0
-	cbz	w2, .L1207
+	cbz	w2, .L1208
 	.loc 2 803 0 is_stmt 0 discriminator 1
 	cmp	w19, w1
-	beq	.L1207
+	beq	.L1208
 	.loc 2 805 0 is_stmt 1
 	ldr	x0, [x27, #:lo12:.LANCHOR124]
 	str	x0, [x29, 120]
@@ -15265,27 +15285,27 @@ FtlVendorPartWrite:
 	str	w2, [x29, 116]
 	.loc 2 807 0
 	mov	w2, 1
-.LVL1604:
+.LVL1606:
 	.loc 2 806 0
 	str	x0, [x29, 128]
 	.loc 2 807 0
 	mov	w1, w2
 	add	x0, x29, 112
-.LVL1605:
+.LVL1607:
 	bl	FlashReadPages
-.LVL1606:
-.L1208:
+.LVL1608:
+.L1209:
 	.loc 2 811 0
 	lsl	w4, w19, 9
 	ldr	x0, [x27, #:lo12:.LANCHOR124]
 	lsl	w22, w22, 7
-.LVL1607:
+.LVL1609:
 	mov	w2, w4
 	mov	x1, x24
 	str	w4, [x29, 108]
 	add	x0, x0, x22, sxtw 2
 	bl	ftl_memcpy
-.LVL1608:
+.LVL1610:
 	.loc 2 812 0
 	ldr	x2, [x27, #:lo12:.LANCHOR124]
 	mov	w1, w21
@@ -15293,42 +15313,42 @@ FtlVendorPartWrite:
 	add	x0, x0, :lo12:.LANCHOR149
 	.loc 2 815 0
 	sub	w20, w20, w19
-.LVL1609:
+.LVL1611:
 	.loc 2 816 0
 	add	w28, w28, w19
-.LVL1610:
+.LVL1612:
 	.loc 2 814 0
 	add	w21, w21, 1
-.LVL1611:
+.LVL1613:
 	.loc 2 812 0
 	bl	FtlMapWritePage
-.LVL1612:
+.LVL1614:
 	.loc 2 813 0
 	cmn	w0, #1
 	.loc 2 817 0
 	ldr	w4, [x29, 108]
 	.loc 2 813 0
 	csinv	w23, w23, wzr, ne
-.LVL1613:
+.LVL1615:
 	.loc 2 817 0
 	add	x24, x24, x4, sxtw
-.LVL1614:
-	b	.L1205
-.LVL1615:
-.L1207:
+.LVL1616:
+	b	.L1206
+.LVL1617:
+.L1208:
 	.loc 2 809 0
 	ldrh	w2, [x26]
-.LVL1616:
+.LVL1618:
 	mov	w1, 0
 	ldr	x0, [x27, #:lo12:.LANCHOR124]
 	bl	ftl_memset
-.LVL1617:
-	b	.L1208
-.LVL1618:
-.L1211:
+.LVL1619:
+	b	.L1209
+.LVL1620:
+.L1212:
 	.loc 2 795 0
 	mov	w23, -1
-	b	.L1203
+	b	.L1204
 	.cfi_endproc
 .LFE263:
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
@@ -15347,9 +15367,9 @@ Ftl_save_ext_data:
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1216
-.LBB274:
-.LBB275:
+	bne	.L1217
+.LBB278:
+.LBB279:
 	.loc 2 2112 0
 	mov	w0, 64
 	.loc 2 2125 0
@@ -15408,11 +15428,11 @@ Ftl_save_ext_data:
 	.loc 2 2125 0
 	mov	w0, 0
 	b	FtlVendorPartWrite
-.LVL1619:
-.L1216:
+.LVL1621:
+.L1217:
 	ret
-.LBE275:
-.LBE274:
+.LBE279:
+.LBE278:
 	.cfi_endproc
 .LFE286:
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
@@ -15424,33 +15444,33 @@ FtlEctTblFlush:
 .LFB265:
 	.loc 2 861 0
 	.cfi_startproc
-.LVL1620:
+.LVL1622:
 	.loc 2 864 0
 	adrp	x2, .LANCHOR166
 	ldrh	w1, [x2, #:lo12:.LANCHOR166]
 	cmp	w1, 31
-	bhi	.L1222
+	bhi	.L1223
 	.loc 2 865 0
 	add	w1, w1, 1
 	strh	w1, [x2, #:lo12:.LANCHOR166]
-.LVL1621:
+.LVL1623:
 	.loc 2 866 0
 	mov	w1, 1
-.LVL1622:
-.L1219:
+.LVL1624:
+.L1220:
 	adrp	x2, .LANCHOR127
 	.loc 2 868 0
-	cbnz	w0, .L1220
+	cbnz	w0, .L1221
 	.loc 2 868 0 is_stmt 0 discriminator 1
 	ldr	x0, [x2, #:lo12:.LANCHOR127]
-.LVL1623:
+.LVL1625:
 	ldr	w3, [x0, 20]
 	ldr	w0, [x0, 16]
 	add	w1, w1, w3
-.LVL1624:
+.LVL1626:
 	cmp	w0, w1
-	bcc	.L1224
-.L1220:
+	bcc	.L1225
+.L1221:
 	.loc 2 861 0 is_stmt 1
 	stp	x29, x30, [sp, -16]!
 	.cfi_def_cfa_offset 16
@@ -15481,10 +15501,10 @@ FtlEctTblFlush:
 	.loc 2 875 0
 	mov	w0, 64
 	bl	FtlVendorPartWrite
-.LVL1625:
+.LVL1627:
 	.loc 2 876 0
 	bl	Ftl_save_ext_data
-.LVL1626:
+.LVL1628:
 	.loc 2 878 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
@@ -15492,13 +15512,13 @@ FtlEctTblFlush:
 	.cfi_restore 29
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1627:
-.L1222:
+.LVL1629:
+.L1223:
 	.loc 2 862 0
 	mov	w1, 32
-	b	.L1219
-.LVL1628:
-.L1224:
+	b	.L1220
+.LVL1630:
+.L1225:
 	.loc 2 878 0
 	mov	w0, 0
 	ret
@@ -15513,7 +15533,7 @@ FtlVendorPartRead:
 .LFB264:
 	.loc 2 823 0
 	.cfi_startproc
-.LVL1629:
+.LVL1631:
 	stp	x29, x30, [sp, -208]!
 	.cfi_def_cfa_offset 208
 	.cfi_offset 29, -208
@@ -15527,15 +15547,15 @@ FtlVendorPartRead:
 	stp	x21, x22, [sp, 32]
 	.loc 2 832 0
 	add	w1, w0, w1
-.LVL1630:
+.LVL1632:
 	.cfi_offset 21, -176
 	.cfi_offset 22, -168
 	.loc 2 823 0
 	mov	w21, w0
-.LVL1631:
+.LVL1633:
 	.loc 2 832 0
 	adrp	x0, .LANCHOR16
-.LVL1632:
+.LVL1634:
 	.loc 2 823 0
 	stp	x23, x24, [sp, 48]
 	.loc 2 832 0
@@ -15551,7 +15571,7 @@ FtlVendorPartRead:
 	.cfi_offset 28, -120
 	.loc 2 832 0
 	cmp	w1, w0
-	bhi	.L1234
+	bhi	.L1235
 	.loc 2 828 0
 	adrp	x0, .LANCHOR22
 	.loc 2 836 0
@@ -15565,18 +15585,18 @@ FtlVendorPartRead:
 	adrp	x25, .LANCHOR133
 	.loc 2 828 0
 	lsr	w26, w21, w3
-.LVL1633:
-.L1228:
+.LVL1635:
+.L1229:
 	.loc 2 834 0
-	cbnz	w20, .L1233
-.LVL1634:
-.L1226:
+	cbnz	w20, .L1234
+.LVL1636:
+.L1227:
 	.loc 2 857 0
 	mov	w0, w22
 	ldp	x19, x20, [sp, 16]
-.LVL1635:
+.LVL1637:
 	ldp	x21, x22, [sp, 32]
-.LVL1636:
+.LVL1638:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
@@ -15596,8 +15616,8 @@ FtlVendorPartRead:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1637:
-.L1233:
+.LVL1639:
+.L1234:
 	.cfi_restore_state
 	.loc 2 836 0
 	ldrh	w19, [x24]
@@ -15607,23 +15627,23 @@ FtlVendorPartRead:
 	udiv	w27, w21, w19
 	.loc 2 835 0
 	ldr	w1, [x0, w26, uxtw 2]
-.LVL1638:
+.LVL1640:
 	.loc 2 839 0
 	and	w0, w20, 65535
 	.loc 2 836 0
 	msub	w27, w27, w19, w21
-.LVL1639:
+.LVL1641:
 	.loc 2 837 0
 	sub	w19, w19, w27
 	and	w19, w19, 65535
-.LVL1640:
+.LVL1642:
 	.loc 2 839 0
 	cmp	w20, w19
 	csel	w19, w0, w19, cc
-.LVL1641:
+.LVL1643:
 	lsl	w28, w19, 9
 	.loc 2 840 0
-	cbz	w1, .L1230
+	cbz	w1, .L1231
 	.loc 2 842 0
 	adrp	x4, .LANCHOR124
 	.loc 2 844 0
@@ -15632,7 +15652,7 @@ FtlVendorPartRead:
 	str	x4, [x29, 104]
 	.loc 2 847 0
 	lsl	w27, w27, 7
-.LVL1642:
+.LVL1644:
 	.loc 2 842 0
 	ldr	x0, [x4, #:lo12:.LANCHOR124]
 	str	x0, [x29, 120]
@@ -15642,14 +15662,14 @@ FtlVendorPartRead:
 	str	w1, [x29, 116]
 	.loc 2 844 0
 	mov	w1, w2
-.LVL1643:
+.LVL1645:
 	.loc 2 843 0
 	str	x0, [x29, 128]
 	.loc 2 844 0
 	add	x0, x29, 112
-.LVL1644:
+.LVL1646:
 	bl	FlashReadPages
-.LVL1645:
+.LVL1647:
 	.loc 2 847 0
 	ldr	x4, [x29, 104]
 	mov	w2, w28
@@ -15661,40 +15681,40 @@ FtlVendorPartRead:
 	ldr	x1, [x4, #:lo12:.LANCHOR124]
 	.loc 2 846 0
 	csinv	w22, w22, wzr, ne
-.LVL1646:
+.LVL1648:
 	.loc 2 847 0
 	add	x1, x1, x27, sxtw 2
 	bl	ftl_memcpy
-.LVL1647:
-.L1232:
+.LVL1649:
+.L1233:
 	.loc 2 851 0
 	add	w26, w26, 1
-.LVL1648:
+.LVL1650:
 	.loc 2 852 0
 	sub	w20, w20, w19
-.LVL1649:
+.LVL1651:
 	.loc 2 853 0
 	add	w21, w21, w19
-.LVL1650:
+.LVL1652:
 	.loc 2 854 0
 	add	x23, x23, x28, sxtw
-.LVL1651:
-	b	.L1228
-.LVL1652:
-.L1230:
+.LVL1653:
+	b	.L1229
+.LVL1654:
+.L1231:
 	.loc 2 849 0
 	mov	w2, w28
 	mov	w1, 0
-.LVL1653:
+.LVL1655:
 	mov	x0, x23
 	bl	ftl_memset
-.LVL1654:
-	b	.L1232
-.LVL1655:
-.L1234:
+.LVL1656:
+	b	.L1233
+.LVL1657:
+.L1235:
 	.loc 2 833 0
 	mov	w22, -1
-	b	.L1226
+	b	.L1227
 	.cfi_endproc
 .LFE264:
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
@@ -15724,33 +15744,33 @@ FtlLoadEctTbl:
 	ldr	x2, [x19, #:lo12:.LANCHOR127]
 	ldrh	w1, [x20, #:lo12:.LANCHOR125]
 	bl	FtlVendorPartRead
-.LVL1656:
+.LVL1658:
 	.loc 2 1336 0
 	ldr	x0, [x19, #:lo12:.LANCHOR127]
 	ldr	w1, [x0]
 	mov	w0, 17221
 	movk	w0, 0x4254, lsl 16
 	cmp	w1, w0
-	beq	.L1237
-.LBB278:
-.LBB279:
+	beq	.L1238
+.LBB282:
+.LBB283:
 	.loc 2 1338 0
 	adrp	x1, .LC100
 	adrp	x0, .LC71
 	add	x1, x1, :lo12:.LC100
 	add	x0, x0, :lo12:.LC71
 	bl	printf
-.LVL1657:
+.LVL1659:
 	.loc 2 1339 0
 	ldr	x0, [x19, #:lo12:.LANCHOR127]
 	mov	w1, 0
 	ldrh	w2, [x20, #:lo12:.LANCHOR125]
 	lsl	w2, w2, 9
 	bl	ftl_memset
-.LVL1658:
-.L1237:
-.LBE279:
-.LBE278:
+.LVL1660:
+.L1238:
+.LBE283:
+.LBE282:
 	.loc 2 1344 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
@@ -15794,28 +15814,28 @@ Ftl_load_ext_data:
 	add	x21, x19, :lo12:.LANCHOR83
 	mov	x2, x21
 	bl	FtlVendorPartRead
-.LVL1659:
+.LVL1661:
 	.loc 2 2132 0
 	ldr	w0, [x19, #:lo12:.LANCHOR83]
 	mov	w20, 19539
 	movk	w20, 0x4654, lsl 16
 	cmp	w0, w20
-	beq	.L1240
+	beq	.L1241
 	.loc 2 2133 0
 	mov	w2, 512
 	mov	w1, 0
 	mov	x0, x21
 	bl	ftl_memset
-.LVL1660:
+.LVL1662:
 	.loc 2 2134 0
 	str	w20, [x19, #:lo12:.LANCHOR83]
-.L1240:
+.L1241:
 	.loc 2 2137 0
 	ldr	w1, [x19, #:lo12:.LANCHOR83]
 	add	x0, x19, :lo12:.LANCHOR83
 	cmp	w1, w20
 	adrp	x1, .LANCHOR74
-	bne	.L1241
+	bne	.L1242
 	.loc 2 2138 0
 	adrp	x2, .LANCHOR69
 	ldr	w3, [x0, 88]
@@ -15863,7 +15883,7 @@ Ftl_load_ext_data:
 	ldr	w2, [x0, 48]
 	adrp	x0, .LANCHOR78
 	str	w2, [x0, #:lo12:.LANCHOR78]
-.L1241:
+.L1242:
 	.loc 2 2152 0
 	adrp	x0, .LANCHOR14
 	adrp	x2, .LANCHOR73
@@ -15902,7 +15922,7 @@ FtlVpcTblFlush:
 .LFB269:
 	.loc 2 1004 0
 	.cfi_startproc
-.LVL1661:
+.LVL1663:
 	stp	x29, x30, [sp, -112]!
 	.cfi_def_cfa_offset 112
 	.cfi_offset 29, -112
@@ -15957,7 +15977,7 @@ FtlVpcTblFlush:
 	adrp	x27, .LANCHOR20
 	.loc 2 1011 0
 	stp	x0, x21, [x28, 8]
-.LVL1662:
+.LVL1664:
 	.loc 2 1005 0
 	mov	w26, 65535
 	.loc 2 1013 0
@@ -16052,7 +16072,7 @@ FtlVpcTblFlush:
 	ldrh	w2, [x1, #:lo12:.LANCHOR23]
 	mov	w1, 255
 	bl	ftl_memset
-.LVL1663:
+.LVL1665:
 	.loc 2 1048 0
 	ldr	x0, [x28, 8]
 	mov	x1, x20
@@ -16061,7 +16081,7 @@ FtlVpcTblFlush:
 	adrp	x20, .LANCHOR5
 	.loc 2 1048 0
 	bl	ftl_memcpy
-.LVL1664:
+.LVL1666:
 	.loc 2 1049 0
 	adrp	x1, .LANCHOR43
 	ldrh	w2, [x20, #:lo12:.LANCHOR5]
@@ -16070,7 +16090,7 @@ FtlVpcTblFlush:
 	lsl	w2, w2, 1
 	add	x0, x0, 48
 	bl	ftl_memcpy
-.LVL1665:
+.LVL1667:
 	.loc 2 1050 0
 	ldrh	w0, [x20, #:lo12:.LANCHOR5]
 	adrp	x1, .LANCHOR1
@@ -16086,16 +16106,16 @@ FtlVpcTblFlush:
 	and	x0, x0, -4
 	add	x0, x3, x0
 	bl	ftl_memcpy
-.LVL1666:
+.LVL1668:
 	.loc 2 1051 0
 	mov	w0, 0
 	bl	FtlUpdateVaildLpn
-.LVL1667:
+.LVL1669:
 	.loc 2 1077 0
 	add	x0, x27, :lo12:.LANCHOR20
 	str	x0, [x29, 104]
-.LVL1668:
-.L1244:
+.LVL1670:
+.L1245:
 	.loc 2 1053 0
 	ldr	x0, [x24, #:lo12:.LANCHOR39]
 	.loc 2 1056 0
@@ -16120,25 +16140,25 @@ FtlVpcTblFlush:
 	.loc 2 1056 0
 	mov	x0, x28
 	bl	FlashProgPages
-.LVL1669:
+.LVL1671:
 	.loc 2 1057 0
 	ldrh	w0, [x27, #:lo12:.LANCHOR20]
 	ldrh	w1, [x19, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L1245
+	blt	.L1246
 	.loc 2 1059 0
 	ldrh	w0, [x19]
 	.loc 2 1058 0
 	ldrh	w26, [x19, 4]
-.LVL1670:
+.LVL1672:
 	.loc 2 1060 0
 	strh	wzr, [x19, 2]
 	.loc 2 1059 0
 	strh	w0, [x19, 4]
 	.loc 2 1061 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL1671:
+.LVL1673:
 	strh	w0, [x19]
 	.loc 2 1066 0
 	ldr	w1, [x23, #:lo12:.LANCHOR71]
@@ -16161,8 +16181,8 @@ FtlVpcTblFlush:
 	mov	x0, x28
 	mov	w1, w3
 	bl	FlashProgPages
-.LVL1672:
-.L1245:
+.LVL1674:
+.L1246:
 	.loc 2 1072 0
 	ldrh	w0, [x19, 2]
 	.loc 2 1073 0
@@ -16173,10 +16193,10 @@ FtlVpcTblFlush:
 	strh	w0, [x19, 2]
 	.loc 2 1073 0
 	cmn	w1, #1
-	bne	.L1246
+	bne	.L1247
 	.loc 2 1075 0
 	cmp	w0, 1
-	bne	.L1247
+	bne	.L1248
 	.loc 2 1075 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR167
 	adrp	x0, .LC1
@@ -16184,26 +16204,26 @@ FtlVpcTblFlush:
 	add	x1, x1, :lo12:.LANCHOR167
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1673:
-.L1247:
+.LVL1675:
+.L1248:
 	.loc 2 1076 0 is_stmt 1
 	ldrh	w0, [x19, 2]
 	cmp	w0, 1
-	bne	.L1248
+	bne	.L1249
 	.loc 2 1077 0
 	ldr	x0, [x29, 104]
 	ldrh	w0, [x0]
 	sub	w0, w0, #1
 	strh	w0, [x19, 2]
-.L1248:
+.L1249:
 	.loc 2 1078 0
 	add	w20, w20, 1
-.LVL1674:
+.LVL1676:
 	and	w20, w20, 65535
-.LVL1675:
+.LVL1677:
 	.loc 2 1079 0
 	cmp	w20, 3
-	bls	.L1244
+	bls	.L1245
 	.loc 2 1080 0
 	add	x22, x22, :lo12:.LANCHOR108
 	adrp	x0, .LC101
@@ -16211,32 +16231,32 @@ FtlVpcTblFlush:
 	add	x0, x0, :lo12:.LC101
 	ldr	w1, [x22, 4]
 	bl	printf
-.LVL1676:
-.L1250:
-	b	.L1250
-.L1246:
+.LVL1678:
+.L1251:
+	b	.L1251
+.L1247:
 	.loc 2 1086 0
 	cmp	w0, 1
-	beq	.L1244
+	beq	.L1245
 	.loc 2 1089 0
 	mov	w0, 65535
 	cmp	w26, w0
-	beq	.L1251
+	beq	.L1252
 	.loc 2 1090 0
 	mov	w1, 1
 	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-.LVL1677:
-.L1251:
+.LVL1679:
+.L1252:
 	.loc 2 1092 0
 	ldp	x19, x20, [sp, 16]
-.LVL1678:
+.LVL1680:
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
-.LVL1679:
+.LVL1681:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-.LVL1680:
+.LVL1682:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	.cfi_restore 30
@@ -16297,7 +16317,7 @@ FtlVpcCheckAndModify:
 	.cfi_offset 25, -32
 	.loc 2 2197 0
 	bl	printf
-.LVL1681:
+.LVL1683:
 	.loc 2 2198 0
 	adrp	x0, .LANCHOR6
 	.loc 2 2199 0
@@ -16309,12 +16329,12 @@ FtlVpcCheckAndModify:
 	ldr	x0, [x20, #:lo12:.LANCHOR128]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL1682:
-.L1257:
+.LVL1684:
+.L1258:
 	.loc 2 2199 0 discriminator 1
 	ldr	w0, [x21]
 	cmp	w19, w0
-	bcc	.L1259
+	bcc	.L1260
 	.loc 2 2206 0 discriminator 1
 	adrp	x22, .LANCHOR5
 	.loc 2 2209 0 discriminator 1
@@ -16324,19 +16344,19 @@ FtlVpcCheckAndModify:
 	.loc 2 2209 0 discriminator 1
 	add	x23, x23, :lo12:.LC102
 	mov	w19, 0
-.LVL1683:
+.LVL1685:
 	.loc 2 2207 0 discriminator 1
 	adrp	x25, .LANCHOR43
 	mov	w24, 65535
-.L1260:
-.LVL1684:
+.L1261:
+.LVL1686:
 	.loc 2 2206 0 discriminator 1
 	ldrh	w0, [x22]
 	cmp	w0, w19
-	bhi	.L1264
+	bhi	.L1265
 	.loc 2 2218 0
 	ldp	x19, x20, [sp, 16]
-.LVL1685:
+.LVL1687:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
@@ -16353,37 +16373,37 @@ FtlVpcCheckAndModify:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1686:
-.L1259:
+.LVL1688:
+.L1260:
 	.cfi_restore_state
 	.loc 2 2200 0
 	mov	w2, 0
 	add	x1, x29, 92
 	mov	w0, w19
 	bl	log2phys
-.LVL1687:
+.LVL1689:
 	.loc 2 2201 0
 	ldr	w0, [x29, 92]
 	cmn	w0, #1
-	beq	.L1258
+	beq	.L1259
 	.loc 2 2202 0
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL1688:
+.LVL1690:
 	.loc 2 2203 0
 	ldr	x2, [x20, #:lo12:.LANCHOR128]
 	ubfiz	x0, x0, 1, 16
-.LVL1689:
+.LVL1691:
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-.L1258:
+.L1259:
 	.loc 2 2199 0 discriminator 2
 	add	w19, w19, 1
-.LVL1690:
-	b	.L1257
-.LVL1691:
-.L1264:
+.LVL1692:
+	b	.L1258
+.LVL1693:
+.L1265:
 	.loc 2 2207 0
 	ldr	x0, [x25, #:lo12:.LANCHOR43]
 	ubfiz	x21, x19, 1, 16
@@ -16391,30 +16411,30 @@ FtlVpcCheckAndModify:
 	ldr	x0, [x20, #:lo12:.LANCHOR128]
 	ldrh	w3, [x0, x21]
 	cmp	w2, w3
-	beq	.L1262
+	beq	.L1263
 	.loc 2 2207 0 is_stmt 0 discriminator 1
 	cmp	w2, w24
-	beq	.L1262
+	beq	.L1263
 	.loc 2 2209 0 is_stmt 1
 	mov	w1, w19
 	mov	x0, x23
 	bl	printf
-.LVL1692:
+.LVL1694:
 	.loc 2 2210 0
 	adrp	x0, .LANCHOR51
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w19
-	beq	.L1262
+	beq	.L1263
 	.loc 2 2210 0 is_stmt 0 discriminator 1
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w19
-	beq	.L1262
+	beq	.L1263
 	.loc 2 2210 0 discriminator 2
 	adrp	x0, .LANCHOR52
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
-	beq	.L1262
+	beq	.L1263
 	.loc 2 2211 0 is_stmt 1
 	ldr	x0, [x20, #:lo12:.LANCHOR128]
 	ldrh	w1, [x0, x21]
@@ -16423,20 +16443,20 @@ FtlVpcCheckAndModify:
 	.loc 2 2212 0
 	mov	w0, w19
 	bl	update_vpc_list
-.LVL1693:
+.LVL1695:
 	.loc 2 2213 0
 	bl	l2p_flush
-.LVL1694:
+.LVL1696:
 	.loc 2 2214 0
 	bl	FtlVpcTblFlush
-.LVL1695:
-.L1262:
+.LVL1697:
+.L1263:
 	.loc 2 2206 0 discriminator 2
 	add	w19, w19, 1
-.LVL1696:
+.LVL1698:
 	and	w19, w19, 65535
-.LVL1697:
-	b	.L1260
+.LVL1699:
+	b	.L1261
 	.cfi_endproc
 .LFE289:
 	.size	FtlVpcCheckAndModify, .-FtlVpcCheckAndModify
@@ -16448,7 +16468,7 @@ allocate_new_data_superblock:
 .LFB299:
 	.loc 2 2631 0
 	.cfi_startproc
-.LVL1698:
+.LVL1700:
 	stp	x29, x30, [sp, -48]!
 	.cfi_def_cfa_offset 48
 	.cfi_offset 29, -48
@@ -16460,7 +16480,7 @@ allocate_new_data_superblock:
 	.cfi_offset 20, -24
 	.loc 2 2632 0
 	ldrh	w19, [x0]
-.LVL1699:
+.LVL1701:
 	.loc 2 2631 0
 	str	x21, [sp, 32]
 	.cfi_offset 21, -16
@@ -16468,10 +16488,10 @@ allocate_new_data_superblock:
 	mov	x21, x0
 	.loc 2 2633 0
 	adrp	x0, .LANCHOR5
-.LVL1700:
+.LVL1702:
 	ldrh	w0, [x0, #:lo12:.LANCHOR5]
 	cmp	w0, w19
-	bcs	.L1270
+	bcs	.L1271
 	.loc 2 2633 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR169
 	adrp	x0, .LC1
@@ -16479,23 +16499,23 @@ allocate_new_data_superblock:
 	add	x1, x1, :lo12:.LANCHOR169
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1701:
-.L1270:
+.LVL1703:
+.L1271:
 	.loc 2 2635 0 is_stmt 1
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1271
+	beq	.L1272
 	.loc 2 2636 0
 	adrp	x1, .LANCHOR43
 	ubfiz	x0, x19, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR43]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1272
+	cbz	w0, .L1273
 	.loc 2 2637 0
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-.LVL1702:
-.L1271:
+.LVL1704:
+.L1272:
 	.loc 2 2642 0
 	adrp	x1, .LANCHOR151
 	.loc 2 2641 0
@@ -16506,45 +16526,45 @@ allocate_new_data_superblock:
 	ldrh	w0, [x1, #:lo12:.LANCHOR151]
 	mov	x20, x1
 	cmp	w0, w2
-	beq	.L1273
+	beq	.L1274
 	.loc 2 2643 0
 	cmp	w19, w0
-	bne	.L1274
+	bne	.L1275
 	.loc 2 2643 0 is_stmt 0 discriminator 1
 	adrp	x2, .LANCHOR43
 	ubfiz	x1, x0, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR43]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1275
-.L1274:
+	cbz	w1, .L1276
+.L1275:
 	.loc 2 2644 0 is_stmt 1
 	bl	update_vpc_list
-.LVL1703:
-.L1275:
+.LVL1705:
+.L1276:
 	.loc 2 2645 0
 	mov	w0, -1
 	strh	w0, [x20, #:lo12:.LANCHOR151]
-.L1273:
+.L1274:
 	.loc 2 2647 0
 	mov	x0, x21
 	bl	allocate_data_superblock
-.LVL1704:
+.LVL1706:
 	.loc 2 2648 0
 	bl	l2p_flush
-.LVL1705:
+.LVL1707:
 	.loc 2 2649 0
 	mov	w0, 0
 	bl	FtlEctTblFlush
-.LVL1706:
+.LVL1708:
 	.loc 2 2650 0
 	bl	FtlVpcTblFlush
-.LVL1707:
+.LVL1709:
 	.loc 2 2652 0
 	ldr	x21, [sp, 32]
-.LVL1708:
+.LVL1710:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-.LVL1709:
+.LVL1711:
 	ldp	x29, x30, [sp], 48
 	.cfi_remember_state
 	.cfi_restore 30
@@ -16554,14 +16574,14 @@ allocate_new_data_superblock:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1710:
-.L1272:
+.LVL1712:
+.L1273:
 	.cfi_restore_state
 	.loc 2 2639 0
 	mov	w0, w19
 	bl	INSERT_FREE_LIST
-.LVL1711:
-	b	.L1271
+.LVL1713:
+	b	.L1272
 	.cfi_endproc
 .LFE299:
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
@@ -16573,14 +16593,14 @@ FtlProgPages:
 .LFB215:
 	.loc 3 904 0
 	.cfi_startproc
-.LVL1712:
+.LVL1714:
 	stp	x29, x30, [sp, -96]!
 	.cfi_def_cfa_offset 96
 	.cfi_offset 29, -96
 	.cfi_offset 30, -88
 	.loc 3 911 0
 	mov	w2, 0
-.LVL1713:
+.LVL1715:
 	.loc 3 904 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
@@ -16604,7 +16624,7 @@ FtlProgPages:
 	adrp	x24, .LANCHOR19
 	.loc 3 911 0
 	ldrb	w3, [x3, 9]
-.LVL1714:
+.LVL1716:
 	.loc 3 926 0
 	adrp	x23, .LANCHOR83
 	add	x21, x0, x21
@@ -16614,31 +16634,31 @@ FtlProgPages:
 	add	x23, x23, :lo12:.LANCHOR83
 	.loc 3 911 0
 	bl	FlashProgPages
-.LVL1715:
-.L1281:
+.LVL1717:
+.L1282:
 	.loc 3 913 0 discriminator 1
 	cmp	x20, x21
-	beq	.L1288
+	beq	.L1289
 	sub	x22, x20, #4
 	.loc 3 917 0
 	adrp	x25, .LANCHOR43
-	b	.L1289
-.L1284:
+	b	.L1290
+.L1285:
 	.loc 3 915 0
 	ldr	w0, [x20]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL1716:
+.LVL1718:
 	.loc 3 916 0
 	ldrh	w1, [x19]
 	cmp	w1, w0, uxth
-	bne	.L1282
+	bne	.L1283
 	.loc 3 917 0
 	ldr	x2, [x25, #:lo12:.LANCHOR43]
 	ubfiz	x1, x1, 1, 16
 	ldrh	w3, [x19, 4]
 	ldrh	w0, [x2, x1]
-.LVL1717:
+.LVL1719:
 	sub	w0, w0, w3
 	strh	w0, [x2, x1]
 	.loc 3 919 0
@@ -16648,15 +16668,15 @@ FtlProgPages:
 	strh	w0, [x19, 2]
 	.loc 3 920 0
 	strh	wzr, [x19, 4]
-.L1282:
+.L1283:
 	.loc 3 922 0
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1283
+	cbnz	w0, .L1284
 	.loc 3 923 0
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.LVL1718:
-.L1283:
+.LVL1720:
+.L1284:
 	.loc 3 926 0
 	ldr	w0, [x23, 96]
 	add	w0, w0, 1
@@ -16665,11 +16685,11 @@ FtlProgPages:
 	ldr	w0, [x20]
 	lsr	w0, w0, 10
 	bl	FtlGcMarkBadPhyBlk
-.LVL1719:
+.LVL1721:
 	.loc 3 928 0
 	mov	x0, x19
 	bl	get_new_active_ppa
-.LVL1720:
+.LVL1722:
 	.loc 3 929 0
 	str	w0, [x20]
 	.loc 3 930 0
@@ -16681,18 +16701,18 @@ FtlProgPages:
 	ldrb	w3, [x19, 9]
 	mov	x0, x22
 	bl	FlashProgPages
-.LVL1721:
-.L1289:
+.LVL1723:
+.L1290:
 	.loc 3 914 0
 	ldr	w0, [x20, -4]
 	cmn	w0, #1
-	beq	.L1284
+	beq	.L1285
 	.loc 3 933 0
 	adrp	x0, .LANCHOR3
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1285
+	bcc	.L1286
 	.loc 3 933 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR170
 	adrp	x0, .LC1
@@ -16700,8 +16720,8 @@ FtlProgPages:
 	add	x1, x1, :lo12:.LANCHOR170
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1722:
-.L1285:
+.LVL1724:
+.L1286:
 	.loc 3 934 0 is_stmt 1
 	add	x1, x29, 96
 	ldr	w0, [x22, 4]
@@ -16712,49 +16732,49 @@ FtlProgPages:
 	.loc 3 935 0
 	ldr	w0, [x22, 24]
 	bl	log2phys
-.LVL1723:
+.LVL1725:
 	.loc 3 937 0
 	ldr	x0, [x22, 16]
 	ldr	w3, [x0, 12]
-.LVL1724:
+.LVL1726:
 	.loc 3 939 0
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
-.LVL1725:
+.LVL1727:
 	and	w1, w0, 65535
 	mov	w22, w1
-.LVL1726:
+.LVL1728:
 	.loc 3 940 0
 	cmn	w3, #1
-	beq	.L1286
+	beq	.L1287
 	.loc 3 942 0
 	adrp	x2, .LANCHOR43
 	ubfiz	x0, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR43]
 	ldrh	w0, [x2, x0]
-	cbnz	w0, .L1287
+	cbnz	w0, .L1288
 	.loc 3 943 0
 	adrp	x0, .LC103
 	mov	w2, 0
 	add	x0, x0, :lo12:.LC103
 	bl	printf
-.LVL1727:
-.L1287:
+.LVL1729:
+.L1288:
 	.loc 3 944 0
 	mov	w0, w22
 	bl	decrement_vpc_count
-.LVL1728:
-.L1286:
+.LVL1730:
+.L1287:
 	add	x20, x20, 32
-	b	.L1281
-.LVL1729:
-.L1288:
+	b	.L1282
+.LVL1731:
+.L1289:
 	.loc 3 948 0
 	adrp	x0, .LANCHOR3
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1280
+	bcc	.L1281
 	.loc 3 948 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR170
 	adrp	x0, .LC1
@@ -16762,11 +16782,11 @@ FtlProgPages:
 	add	x1, x1, :lo12:.LANCHOR170
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1730:
-.L1280:
+.LVL1732:
+.L1281:
 	.loc 3 949 0 is_stmt 1
 	ldp	x19, x20, [sp, 16]
-.LVL1731:
+.LVL1733:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
@@ -16804,17 +16824,17 @@ FtlCacheWriteBack:
 	.loc 3 953 0
 	adrp	x19, .LANCHOR150
 	ldr	x0, [x19, #:lo12:.LANCHOR150]
-	cbz	x0, .L1296
+	cbz	x0, .L1297
 	.loc 3 954 0
 	adrp	x1, .LANCHOR171
 	mov	w2, 0
 	ldr	x3, [x1, #:lo12:.LANCHOR171]
 	mov	w1, 1
 	bl	FtlProgPages
-.LVL1732:
+.LVL1734:
 	.loc 3 955 0
 	str	xzr, [x19, #:lo12:.LANCHOR150]
-.L1296:
+.L1297:
 	.loc 3 958 0
 	mov	w0, 0
 	ldr	x19, [sp, 16]
@@ -16843,17 +16863,17 @@ FtlSysFlush:
 	.cfi_def_cfa_register 29
 	.loc 3 798 0
 	bl	FtlCacheWriteBack
-.LVL1733:
+.LVL1735:
 	.loc 3 799 0
 	bl	l2p_flush
-.LVL1734:
+.LVL1736:
 	.loc 3 800 0
 	mov	w0, 1
 	bl	FtlEctTblFlush
-.LVL1735:
+.LVL1737:
 	.loc 3 801 0
 	bl	FtlVpcTblFlush
-.LVL1736:
+.LVL1738:
 	.loc 3 803 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
@@ -16876,7 +16896,7 @@ sftl_deinit:
 	adrp	x0, .LANCHOR88
 	ldr	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w0, 1
-	bne	.L1306
+	bne	.L1307
 	.loc 3 806 0
 	stp	x29, x30, [sp, -16]!
 	.cfi_def_cfa_offset 16
@@ -16886,7 +16906,7 @@ sftl_deinit:
 	.cfi_def_cfa_register 29
 	.loc 3 808 0
 	bl	FtlSysFlush
-.LVL1737:
+.LVL1739:
 	.loc 3 810 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
@@ -16894,7 +16914,7 @@ sftl_deinit:
 	.cfi_restore 29
 	.cfi_def_cfa 31, 0
 	ret
-.L1306:
+.L1307:
 	mov	w0, 0
 	ret
 	.cfi_endproc
@@ -16908,7 +16928,7 @@ FtlDiscard:
 .LFB218:
 	.loc 3 1157 0
 	.cfi_startproc
-.LVL1738:
+.LVL1740:
 	stp	x29, x30, [sp, -80]!
 	.cfi_def_cfa_offset 80
 	.cfi_offset 29, -80
@@ -16922,9 +16942,9 @@ FtlDiscard:
 	mov	w19, w1
 	.loc 3 1164 0
 	add	w1, w0, w1
-.LVL1739:
+.LVL1741:
 	adrp	x0, .LANCHOR34
-.LVL1740:
+.LVL1742:
 	.loc 3 1157 0
 	stp	x21, x22, [sp, 32]
 	str	x23, [sp, 48]
@@ -16934,18 +16954,18 @@ FtlDiscard:
 	.loc 3 1164 0
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	cmp	w1, w0
-	bhi	.L1317
+	bhi	.L1318
 	.loc 3 1167 0
 	cmp	w19, 31
-	bhi	.L1311
-.LVL1741:
-.L1325:
+	bhi	.L1312
+.LVL1743:
+.L1326:
 	.loc 3 1200 0
 	mov	w0, 0
-.L1309:
+.L1310:
 	.loc 3 1201 0
 	ldp	x19, x20, [sp, 16]
-.LVL1742:
+.LVL1744:
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
@@ -16959,41 +16979,41 @@ FtlDiscard:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1743:
-.L1311:
+.LVL1745:
+.L1312:
 	.cfi_restore_state
 	.loc 3 1172 0
 	adrp	x22, .LANCHOR12
 	.loc 3 1170 0
 	bl	FtlCacheWriteBack
-.LVL1744:
+.LVL1746:
 	.loc 3 1172 0
 	ldrh	w1, [x22, #:lo12:.LANCHOR12]
 	udiv	w21, w20, w1
-.LVL1745:
+.LVL1747:
 	.loc 3 1173 0
 	msub	w20, w1, w21, w20
-.LVL1746:
+.LVL1748:
 	.loc 3 1174 0
 	ands	w20, w20, 65535
-	beq	.L1312
-.LVL1747:
+	beq	.L1313
+.LVL1749:
 	.loc 3 1175 0
 	sub	w1, w1, w20
-.LVL1748:
+.LVL1750:
 	.loc 3 1176 0
 	add	w21, w21, 1
-.LVL1749:
+.LVL1751:
 	.loc 3 1175 0
 	cmp	w1, w19
 	csel	w1, w1, w19, ls
 	.loc 3 1177 0
 	sub	w19, w19, w1, uxth
-.LVL1750:
-.L1312:
+.LVL1752:
+.L1313:
 	.loc 3 1184 0
 	adrp	x20, .LANCHOR172
-.LVL1751:
+.LVL1753:
 	.loc 3 1185 0
 	adrp	x23, .LANCHOR64
 	.loc 3 1184 0
@@ -17003,37 +17023,37 @@ FtlDiscard:
 	.loc 3 1180 0
 	mov	w0, -1
 	str	w0, [x29, 76]
-.LVL1752:
-.L1313:
+.LVL1754:
+.L1314:
 	.loc 3 1181 0
 	ldrh	w0, [x22, #:lo12:.LANCHOR12]
 	cmp	w19, w0
-	bcs	.L1315
+	bcs	.L1316
 	.loc 3 1194 0
 	adrp	x0, .LANCHOR172
 	ldr	w1, [x0, #:lo12:.LANCHOR172]
 	cmp	w1, 32
-	bls	.L1325
+	bls	.L1326
 	.loc 3 1196 0
 	str	wzr, [x0, #:lo12:.LANCHOR172]
 	.loc 3 1197 0
 	bl	l2p_flush
-.LVL1753:
+.LVL1755:
 	.loc 3 1198 0
 	bl	FtlVpcTblFlush
-.LVL1754:
-	b	.L1325
-.L1315:
+.LVL1756:
+	b	.L1326
+.L1316:
 	.loc 3 1182 0
 	mov	w2, 0
 	add	x1, x29, 72
 	mov	w0, w21
 	bl	log2phys
-.LVL1755:
+.LVL1757:
 	.loc 3 1183 0
 	ldr	w0, [x29, 72]
 	cmn	w0, #1
-	beq	.L1314
+	beq	.L1315
 	.loc 3 1184 0
 	ldr	w0, [x20]
 	.loc 3 1186 0
@@ -17049,30 +17069,30 @@ FtlDiscard:
 	.loc 3 1186 0
 	mov	w0, w21
 	bl	log2phys
-.LVL1756:
+.LVL1758:
 	.loc 3 1187 0
 	ldr	w0, [x29, 72]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL1757:
+.LVL1759:
 	.loc 3 1188 0
 	bl	decrement_vpc_count
-.LVL1758:
-.L1314:
+.LVL1760:
+.L1315:
 	.loc 3 1191 0
 	ldrh	w0, [x22, #:lo12:.LANCHOR12]
 	.loc 3 1190 0
 	add	w21, w21, 1
-.LVL1759:
+.LVL1761:
 	.loc 3 1191 0
 	sub	w19, w19, w0
-.LVL1760:
-	b	.L1313
-.LVL1761:
-.L1317:
+.LVL1762:
+	b	.L1314
+.LVL1763:
+.L1318:
 	.loc 3 1165 0
 	mov	w0, -1
-	b	.L1309
+	b	.L1310
 	.cfi_endproc
 .LFE218:
 	.size	FtlDiscard, .-FtlDiscard
@@ -17084,7 +17104,7 @@ FtlGcFreeTempBlock:
 .LFB308:
 	.loc 5 112 0
 	.cfi_startproc
-.LVL1762:
+.LVL1764:
 	stp	x29, x30, [sp, -112]!
 	.cfi_def_cfa_offset 112
 	.cfi_offset 29, -112
@@ -17121,11 +17141,11 @@ FtlGcFreeTempBlock:
 	.cfi_offset 27, -32
 	.loc 5 115 0
 	ldrh	w1, [x21, #:lo12:.LANCHOR19]
-.LVL1763:
+.LVL1765:
 	.loc 5 119 0
-	bne	.L1327
-.LVL1764:
-.L1337:
+	bne	.L1328
+.LVL1766:
+.L1338:
 	.loc 5 152 0
 	adrp	x0, .LANCHOR153
 	.loc 5 153 0
@@ -17136,11 +17156,11 @@ FtlGcFreeTempBlock:
 	.loc 5 153 0
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1350
-.L1353:
+	bne	.L1351
+.L1354:
 	.loc 5 198 0
 	mov	w0, 0
-.L1326:
+.L1327:
 	.loc 5 199 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -17162,52 +17182,52 @@ FtlGcFreeTempBlock:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1765:
-.L1327:
+.LVL1767:
+.L1328:
 	.cfi_restore_state
 	.loc 5 121 0
-	cbz	w0, .L1330
-.LVL1766:
+	cbz	w0, .L1331
+.LVL1768:
 	.loc 5 123 0
 	adrp	x0, .LANCHOR157
-.LVL1767:
+.LVL1769:
 	ldrh	w3, [x0, #:lo12:.LANCHOR157]
 	cmp	w3, w2
-	beq	.L1331
-.L1332:
+	beq	.L1332
+.L1333:
 	.loc 5 122 0
 	mov	w1, 2
-.LVL1768:
-.L1330:
+.LVL1770:
+.L1331:
 	.loc 5 131 0
 	add	x0, x19, :lo12:.LANCHOR53
 	bl	FtlGcScanTempBlk
-.LVL1769:
+.LVL1771:
 	str	w0, [x29, 108]
 	.loc 5 132 0
 	cmn	w0, #1
-	beq	.L1333
+	beq	.L1334
 	.loc 5 135 0
 	adrp	x0, .LANCHOR40
 	ubfiz	x20, x20, 1, 16
-.LVL1770:
+.LVL1772:
 	ldr	x1, [x0, #:lo12:.LANCHOR40]
 	ldrh	w0, [x1, x20]
 	cmp	w0, 4
-	bls	.L1334
+	bls	.L1335
 	.loc 5 136 0
 	sub	w0, w0, #5
 	strh	w0, [x1, x20]
 	.loc 5 137 0
 	mov	w0, 1
 	bl	FtlEctTblFlush
-.LVL1771:
-.L1334:
+.LVL1773:
+.L1335:
 	.loc 5 139 0
 	adrp	x0, .LANCHOR153
 	mov	x19, x0
 	ldr	w1, [x0, #:lo12:.LANCHOR153]
-	cbnz	w1, .L1335
+	cbnz	w1, .L1336
 	.loc 5 140 0
 	adrp	x0, .LANCHOR83
 	add	x0, x0, :lo12:.LANCHOR83
@@ -17218,41 +17238,41 @@ FtlGcFreeTempBlock:
 	ldr	w0, [x29, 108]
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.LVL1772:
+.LVL1774:
 	.loc 5 142 0
 	bl	FtlBbmTblFlush
-.LVL1773:
-.L1335:
+.LVL1775:
+.L1336:
 	.loc 5 144 0
 	str	wzr, [x19, #:lo12:.LANCHOR153]
-.L1346:
+.L1347:
 	.loc 5 149 0
 	mov	w0, 1
-	b	.L1326
-.LVL1774:
-.L1331:
+	b	.L1327
+.LVL1776:
+.L1332:
 	.loc 5 124 0
 	strh	wzr, [x0, #:lo12:.LANCHOR157]
 	.loc 5 125 0
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 17
-	bhi	.L1332
-	b	.L1330
-.LVL1775:
-.L1333:
+	bhi	.L1333
+	b	.L1331
+.LVL1777:
+.L1334:
 	.loc 5 148 0
 	adrp	x0, .LANCHOR157
 	ldrh	w1, [x0, #:lo12:.LANCHOR157]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1346
-	b	.L1337
-.LVL1776:
-.L1350:
+	bne	.L1347
+	b	.L1338
+.LVL1778:
+.L1351:
 	.loc 5 160 0
 	bl	FtlCacheWriteBack
-.LVL1777:
+.LVL1779:
 	.loc 5 162 0
 	adrp	x20, .LANCHOR99
 	ldrb	w0, [x22, 7]
@@ -17260,7 +17280,7 @@ FtlGcFreeTempBlock:
 	ldrh	w1, [x20, #:lo12:.LANCHOR99]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L1338
+	beq	.L1339
 	.loc 5 162 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR173
 	adrp	x0, .LC1
@@ -17268,8 +17288,8 @@ FtlGcFreeTempBlock:
 	add	x1, x1, :lo12:.LANCHOR173
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1778:
-.L1338:
+.LVL1780:
+.L1339:
 	.loc 5 163 0 is_stmt 1
 	add	x0, x19, :lo12:.LANCHOR53
 	adrp	x23, .LANCHOR43
@@ -17299,31 +17319,31 @@ FtlGcFreeTempBlock:
 	ldr	w2, [x1, #:lo12:.LANCHOR68]
 	add	w0, w0, w2
 	str	w0, [x1, #:lo12:.LANCHOR68]
-.LVL1779:
-.L1339:
+.LVL1781:
+.L1340:
 	.loc 5 165 0 discriminator 1
 	ldrh	w0, [x20, #:lo12:.LANCHOR99]
 	cmp	w0, w21
-	bhi	.L1343
+	bhi	.L1344
 	.loc 5 181 0
 	mov	w0, -1
 	bl	decrement_vpc_count
-.LVL1780:
+.LVL1782:
 	.loc 5 182 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR53]
 	ldr	x2, [x23, #:lo12:.LANCHOR43]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1344
+	cbz	w1, .L1345
 	.loc 5 183 0
 	bl	INSERT_DATA_LIST
-.LVL1781:
-.L1345:
+.LVL1783:
+.L1346:
 	.loc 5 188 0
 	adrp	x0, .LANCHOR97
 	.loc 5 186 0
 	mov	w21, -1
-.LVL1782:
+.LVL1784:
 	.loc 5 187 0
 	strh	wzr, [x20, #:lo12:.LANCHOR99]
 	.loc 5 186 0
@@ -17332,10 +17352,10 @@ FtlGcFreeTempBlock:
 	strh	wzr, [x0, #:lo12:.LANCHOR97]
 	.loc 5 189 0
 	bl	l2p_flush
-.LVL1783:
+.LVL1785:
 	.loc 5 190 0
 	bl	FtlVpcTblFlush
-.LVL1784:
+.LVL1786:
 	.loc 5 191 0
 	adrp	x0, .LANCHOR48
 	ldrh	w1, [x0, #:lo12:.LANCHOR48]
@@ -17343,7 +17363,7 @@ FtlGcFreeTempBlock:
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	add	w0, w0, w0, lsl 1
 	cmp	w1, w0, lsr 2
-	ble	.L1353
+	ble	.L1354
 	.loc 5 192 0
 	adrp	x0, .LANCHOR82
 	.loc 5 193 0
@@ -17353,9 +17373,9 @@ FtlGcFreeTempBlock:
 	.loc 5 193 0
 	adrp	x0, .LANCHOR84
 	strh	w1, [x0, #:lo12:.LANCHOR84]
-	b	.L1353
-.LVL1785:
-.L1343:
+	b	.L1354
+.LVL1787:
+.L1344:
 	.loc 5 166 0
 	adrp	x0, .LANCHOR100
 	mov	w24, 12
@@ -17365,71 +17385,71 @@ FtlGcFreeTempBlock:
 	ldr	w0, [x25]
 	.loc 5 166 0
 	add	x22, x27, x24
-.LVL1786:
+.LVL1788:
 	.loc 5 168 0
 	ldr	w1, [x22, 8]
 	cmp	w1, w0
-	bcc	.L1340
+	bcc	.L1341
 	.loc 5 168 0 is_stmt 0 discriminator 1
 	adrp	x0, .LC1
 	mov	w2, 168
 	mov	x1, x26
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1787:
-.L1340:
+.LVL1789:
+.L1341:
 	.loc 5 169 0 is_stmt 1
 	ldr	w0, [x22, 8]
 	add	x1, x29, 108
 	mov	w2, 0
 	bl	log2phys
-.LVL1788:
+.LVL1790:
 	.loc 5 170 0
 	ldr	w0, [x27, x24]
 	ldr	w1, [x29, 108]
 	cmp	w0, w1
-	bne	.L1341
+	bne	.L1342
 	.loc 5 171 0
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL1789:
+.LVL1791:
 	mov	w24, w0
-.LVL1790:
+.LVL1792:
 	.loc 5 172 0
 	ldr	w0, [x22, 8]
-.LVL1791:
+.LVL1793:
 	mov	w2, 1
 	add	x1, x22, 4
 	bl	log2phys
-.LVL1792:
+.LVL1794:
 	.loc 5 173 0
 	mov	w0, w24
-.LVL1793:
-.L1352:
+.LVL1795:
+.L1353:
 	.loc 5 177 0
 	bl	decrement_vpc_count
-.LVL1794:
-.L1342:
+.LVL1796:
+.L1343:
 	.loc 5 165 0 discriminator 2
 	add	w21, w21, 1
-.LVL1795:
+.LVL1797:
 	and	w21, w21, 65535
-.LVL1796:
-	b	.L1339
-.L1341:
+.LVL1798:
+	b	.L1340
+.L1342:
 	.loc 5 175 0
 	ldr	w0, [x22, 4]
 	cmp	w1, w0
-	beq	.L1342
+	beq	.L1343
 	.loc 5 177 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR53]
-	b	.L1352
-.LVL1797:
-.L1344:
+	b	.L1353
+.LVL1799:
+.L1345:
 	.loc 5 185 0
 	bl	INSERT_FREE_LIST
-.LVL1798:
-	b	.L1345
+.LVL1800:
+	b	.L1346
 	.cfi_endproc
 .LFE308:
 	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
@@ -17457,29 +17477,29 @@ FtlGcPageRecovery:
 	ldrh	w1, [x20, #:lo12:.LANCHOR19]
 	mov	x0, x19
 	bl	FtlGcScanTempBlk
-.LVL1799:
+.LVL1801:
 	.loc 5 291 0
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR19]
 	cmp	w1, w0
-	bcc	.L1354
-.LBB282:
-.LBB283:
+	bcc	.L1355
+.LBB286:
+.LBB287:
 	.loc 5 293 0
 	adrp	x0, .LANCHOR144
 	add	x0, x0, :lo12:.LANCHOR144
 	bl	FtlMapBlkWriteDump_data
-.LVL1800:
+.LVL1802:
 	.loc 5 294 0
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
-.LVL1801:
+.LVL1803:
 	.loc 5 295 0
 	adrp	x0, .LANCHOR153
 	str	wzr, [x0, #:lo12:.LANCHOR153]
-.L1354:
-.LBE283:
-.LBE282:
+.L1355:
+.LBE287:
+.LBE286:
 	.loc 5 297 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -17519,30 +17539,30 @@ FtlPowerLostRecovery:
 	.loc 2 2035 0
 	mov	x0, x19
 	bl	FtlRecoverySuperblock
-.LVL1802:
+.LVL1804:
 	.loc 2 2036 0
 	mov	x0, x19
 	.loc 2 2037 0
 	adrp	x19, .LANCHOR52
 	.loc 2 2036 0
 	bl	FtlSlcSuperblockCheck
-.LVL1803:
+.LVL1805:
 	.loc 2 2037 0
 	add	x19, x19, :lo12:.LANCHOR52
 	mov	x0, x19
 	bl	FtlRecoverySuperblock
-.LVL1804:
+.LVL1806:
 	.loc 2 2038 0
 	mov	x0, x19
 	bl	FtlSlcSuperblockCheck
-.LVL1805:
+.LVL1807:
 	.loc 2 2039 0
 	bl	FtlGcPageRecovery
-.LVL1806:
+.LVL1808:
 	.loc 2 2040 0
 	mov	w0, -1
 	bl	decrement_vpc_count
-.LVL1807:
+.LVL1809:
 	.loc 2 2042 0
 	mov	w0, 0
 	ldr	x19, [sp, 16]
@@ -17585,39 +17605,39 @@ Ftl_gc_temp_data_write_back:
 	.loc 5 320 0
 	ldr	x0, [x20, #:lo12:.LANCHOR121]
 	bl	FlashProgPages
-.LVL1808:
+.LVL1810:
 	.loc 5 321 0
 	mov	w11, 0
-.LVL1809:
-.L1360:
+.LVL1811:
+.L1361:
 	.loc 5 321 0 is_stmt 0 discriminator 1
 	ldr	w1, [x19]
 	cmp	w11, w1
-	bcc	.L1363
+	bcc	.L1364
 	.loc 5 335 0 is_stmt 1
 	ldr	x0, [x20, #:lo12:.LANCHOR121]
 	bl	FtlGcBufFree
-.LVL1810:
+.LVL1812:
 	.loc 5 336 0
 	str	wzr, [x19]
 	.loc 5 337 0
 	adrp	x0, .LANCHOR53+4
 	ldrh	w0, [x0, #:lo12:.LANCHOR53+4]
-	cbnz	w0, .L1364
+	cbnz	w0, .L1365
 	.loc 5 338 0
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
-.LVL1811:
-	b	.L1366
-.LVL1812:
-.L1363:
+.LVL1813:
+	b	.L1367
+.LVL1814:
+.L1364:
 	.loc 5 322 0
 	ldr	x2, [x20, #:lo12:.LANCHOR121]
 	ubfiz	x0, x11, 5, 16
 	add	x1, x2, x0
 	ldr	w2, [x2, x0]
 	cmn	w2, #1
-	bne	.L1361
+	bne	.L1362
 	.loc 5 323 0
 	adrp	x0, .LANCHOR53
 	adrp	x3, .LANCHOR43
@@ -17636,17 +17656,17 @@ Ftl_gc_temp_data_write_back:
 	ldr	w0, [x1, 4]
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.LVL1813:
+.LVL1815:
 	.loc 5 327 0
 	bl	FtlBbmTblFlush
-.LVL1814:
+.LVL1816:
 	.loc 5 328 0
 	bl	FtlGcPageVarInit
-.LVL1815:
-.L1366:
+.LVL1817:
+.L1367:
 	.loc 5 339 0
 	mov	w0, 1
-.L1359:
+.L1360:
 	.loc 5 342 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -17657,29 +17677,29 @@ Ftl_gc_temp_data_write_back:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1816:
-.L1361:
+.LVL1818:
+.L1362:
 	.cfi_restore_state
 	.loc 5 331 0 discriminator 2
 	ldr	x0, [x1, 16]
-.LVL1817:
+.LVL1819:
 	.loc 5 332 0 discriminator 2
 	ldr	w1, [x1, 4]
 	ldp	w2, w0, [x0, 8]
-.LVL1818:
+.LVL1820:
 	bl	FtlGcUpdatePage
-.LVL1819:
+.LVL1821:
 	.loc 5 321 0 discriminator 2
 	add	w11, w11, 1
-.LVL1820:
-	and	w11, w11, 65535
-.LVL1821:
-	b	.L1360
 .LVL1822:
-.L1364:
+	and	w11, w11, 65535
+.LVL1823:
+	b	.L1361
+.LVL1824:
+.L1365:
 	.loc 5 341 0
 	mov	w0, 0
-	b	.L1359
+	b	.L1360
 	.cfi_endproc
 .LFE313:
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
@@ -17707,25 +17727,25 @@ Ftl_get_new_temp_ppa:
 	.loc 5 301 0
 	ldrh	w3, [x0, #:lo12:.LANCHOR53]
 	cmp	w3, w2
-	beq	.L1368
+	beq	.L1369
 	add	x1, x0, :lo12:.LANCHOR53
 	.loc 5 301 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x1, 4]
-	cbnz	w0, .L1369
-.L1368:
+	cbnz	w0, .L1370
+.L1369:
 	.loc 5 302 0 is_stmt 1
 	bl	FtlCacheWriteBack
-.LVL1823:
+.LVL1825:
 	.loc 5 303 0
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
-.LVL1824:
+.LVL1826:
 	.loc 5 304 0
 	add	x0, x19, :lo12:.LANCHOR53
 	strb	wzr, [x0, 8]
 	.loc 5 305 0
 	bl	allocate_data_superblock
-.LVL1825:
+.LVL1827:
 	.loc 5 306 0
 	adrp	x0, .LANCHOR97
 	strh	wzr, [x0, #:lo12:.LANCHOR97]
@@ -17734,15 +17754,15 @@ Ftl_get_new_temp_ppa:
 	strh	wzr, [x0, #:lo12:.LANCHOR99]
 	.loc 5 308 0
 	bl	l2p_flush
-.LVL1826:
+.LVL1828:
 	.loc 5 309 0
 	mov	w0, 0
 	bl	FtlEctTblFlush
-.LVL1827:
+.LVL1829:
 	.loc 5 310 0
 	bl	FtlVpcTblFlush
-.LVL1828:
-.L1369:
+.LVL1830:
+.L1370:
 	.loc 5 312 0
 	add	x0, x19, :lo12:.LANCHOR53
 	.loc 5 313 0
@@ -17754,7 +17774,7 @@ Ftl_get_new_temp_ppa:
 	.cfi_def_cfa 31, 0
 	.loc 5 312 0
 	b	get_new_active_ppa
-.LVL1829:
+.LVL1831:
 	.cfi_endproc
 .LFE312:
 	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
@@ -17766,7 +17786,7 @@ rk_ftl_garbage_collect:
 .LFB319:
 	.loc 5 470 0
 	.cfi_startproc
-.LVL1830:
+.LVL1832:
 	stp	x29, x30, [sp, -192]!
 	.cfi_def_cfa_offset 192
 	.cfi_offset 29, -192
@@ -17782,7 +17802,7 @@ rk_ftl_garbage_collect:
 	stp	x19, x20, [sp, 16]
 	.loc 5 478 0
 	ldr	w1, [x22, #:lo12:.LANCHOR117]
-.LVL1831:
+.LVL1833:
 	.loc 5 470 0
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
@@ -17796,31 +17816,31 @@ rk_ftl_garbage_collect:
 	.cfi_offset 27, -112
 	.cfi_offset 28, -104
 	.loc 5 478 0
-	cbnz	w1, .L1443
+	cbnz	w1, .L1444
 	.loc 5 481 0
 	adrp	x1, .LANCHOR45
 	ldrh	w1, [x1, #:lo12:.LANCHOR45]
 	cmp	w1, 47
-	bls	.L1443
+	bls	.L1444
 	mov	w24, w0
 	.loc 5 485 0
 	adrp	x0, .LANCHOR157
-.LVL1832:
+.LVL1834:
 	ldrh	w1, [x0, #:lo12:.LANCHOR157]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1373
-.L1376:
-.LVL1833:
-.LBB287:
-.LBB288:
+	bne	.L1374
+.L1377:
+.LVL1835:
+.LBB291:
+.LBB292:
 	.loc 5 489 0
 	adrp	x0, .LANCHOR102
 	mov	w3, 65535
 	ldrh	w2, [x0, #:lo12:.LANCHOR102]
 	cmp	w2, w3
-	bne	.L1374
-.L1375:
+	bne	.L1375
+.L1376:
 	.loc 5 496 0
 	adrp	x2, .LANCHOR86
 	.loc 5 497 0
@@ -17836,15 +17856,15 @@ rk_ftl_garbage_collect:
 	str	w1, [x2, #:lo12:.LANCHOR86]
 	.loc 5 497 0
 	cmp	w0, w20
-	bne	.L1377
+	bne	.L1378
 	adrp	x3, .LANCHOR53
 	ldrh	w20, [x3, #:lo12:.LANCHOR53]
 	cmp	w20, w0
-	bne	.L1446
+	bne	.L1447
 	adrp	x0, .LANCHOR101
 	ldrh	w21, [x0, #:lo12:.LANCHOR101]
 	cmp	w21, w20
-	bne	.L1377
+	bne	.L1378
 	.loc 5 498 0
 	adrp	x23, .LANCHOR48
 	mov	w3, 1024
@@ -17853,8 +17873,8 @@ rk_ftl_garbage_collect:
 	mov	w0, 5120
 	csel	w0, w0, w3, cc
 	cmp	w1, w0
-	bls	.L1449
-.LBB289:
+	bls	.L1450
+.LBB293:
 	.loc 5 502 0
 	adrp	x0, .LANCHOR174
 	.loc 5 501 0
@@ -17863,118 +17883,118 @@ rk_ftl_garbage_collect:
 	strh	wzr, [x0, #:lo12:.LANCHOR174]
 	.loc 5 503 0
 	bl	GetSwlReplaceBlock
-.LVL1834:
+.LVL1836:
 	and	w20, w0, 65535
-.LVL1835:
+.LVL1837:
 	.loc 5 504 0
 	cmp	w20, w21
-	bne	.L1450
+	bne	.L1451
 	.loc 5 505 0
 	adrp	x5, .LANCHOR85
 	ldrh	w1, [x23, #:lo12:.LANCHOR48]
 	ldrh	w0, [x5, #:lo12:.LANCHOR85]
-.LVL1836:
+.LVL1838:
 	cmp	w1, w0
-	bcs	.L1380
+	bcs	.L1381
 	.loc 5 506 0
 	mov	w0, 64
 	bl	List_get_gc_head_node
-.LVL1837:
+.LVL1839:
 	and	w0, w0, 65535
-.LVL1838:
+.LVL1840:
 	.loc 5 507 0
 	cmp	w0, w20
-	beq	.L1382
+	beq	.L1383
 	.loc 5 508 0
 	adrp	x1, .LANCHOR43
 	ubfiz	x0, x0, 1, 16
-.LVL1839:
+.LVL1841:
 	ldr	x1, [x1, #:lo12:.LANCHOR43]
 	ldrh	w0, [x1, x0]
 	cmp	w0, 7
-	bhi	.L1383
+	bhi	.L1384
 	.loc 5 509 0
 	mov	w0, 0
 	bl	List_get_gc_head_node
-.LVL1840:
+.LVL1842:
 	and	w21, w0, 65535
-.LVL1841:
+.LVL1843:
 	.loc 5 510 0
 	mov	w0, 128
 	strh	w0, [x5, #:lo12:.LANCHOR85]
 	.loc 5 520 0
 	cmp	w21, w20
-	bne	.L1379
-.LVL1842:
-.L1382:
+	bne	.L1380
+.LVL1844:
+.L1383:
 	.loc 5 523 0
 	bl	FtlGcReFreshBadBlk
-.LVL1843:
-.L1377:
-.LBE289:
+.LVL1845:
+.L1378:
+.LBE293:
 	.loc 5 527 0
 	cmp	w24, 0
 	mov	w0, 65535
 	ccmp	w20, w0, 0, eq
-	bne	.L1385
+	bne	.L1386
 	.loc 5 528 0
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 24
-	bhi	.L1451
+	bhi	.L1452
 	adrp	x1, .LANCHOR19
 	.loc 5 530 0
 	cmp	w0, 16
 	.loc 5 531 0
 	ldrh	w21, [x1, #:lo12:.LANCHOR19]
 	.loc 5 530 0
-	bls	.L1387
+	bls	.L1388
 	.loc 5 531 0
 	lsr	w21, w21, 5
-.LVL1844:
-.L1386:
+.LVL1846:
+.L1387:
 	.loc 5 539 0
 	adrp	x2, .LANCHOR84
 	mov	x3, x2
 	ldrh	w1, [x2, #:lo12:.LANCHOR84]
 	cmp	w1, w0
-	bcs	.L1390
+	bcs	.L1391
 	.loc 5 540 0
 	adrp	x0, .LANCHOR53
 	mov	w1, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w1
-	bne	.L1391
+	bne	.L1392
 	adrp	x1, .LANCHOR101
 	ldrh	w1, [x1, #:lo12:.LANCHOR101]
 	cmp	w1, w0
-	bne	.L1391
+	bne	.L1392
 	.loc 5 542 0
 	adrp	x0, .LANCHOR174
 	ldrh	w0, [x0, #:lo12:.LANCHOR174]
-	cbnz	w0, .L1392
+	cbnz	w0, .L1393
 	adrp	x1, .LANCHOR62
 	adrp	x4, .LANCHOR60
 	ldr	w1, [x1, #:lo12:.LANCHOR62]
 	ldr	w4, [x4, #:lo12:.LANCHOR60]
 	add	w1, w1, w1, lsl 1
 	cmp	w4, w1, lsr 2
-	bcs	.L1393
-.L1392:
+	bcs	.L1394
+.L1393:
 	.loc 5 543 0
 	adrp	x1, .LANCHOR80
 	ldrh	w1, [x1, #:lo12:.LANCHOR80]
 	add	w1, w1, w1, lsl 1
 	asr	w1, w1, 2
 	strh	w1, [x3, #:lo12:.LANCHOR84]
-.L1394:
+.L1395:
 	.loc 5 546 0
 	adrp	x1, .LANCHOR89
 	str	wzr, [x1, #:lo12:.LANCHOR89]
-.LVL1845:
-.L1371:
-.LBE288:
-.LBE287:
+.LVL1847:
+.L1372:
+.LBE292:
+.LBE291:
 	.loc 5 758 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -17997,55 +18017,55 @@ rk_ftl_garbage_collect:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1846:
-.L1373:
+.LVL1848:
+.L1374:
 	.cfi_restore_state
 	.loc 5 485 0 discriminator 1
 	adrp	x1, .LANCHOR53
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	beq	.L1376
+	beq	.L1377
 	.loc 5 486 0
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
-.LVL1847:
-	cbz	w0, .L1376
+.LVL1849:
+	cbz	w0, .L1377
 	.loc 5 487 0
 	mov	w0, 1
-	b	.L1371
-.LVL1848:
-.L1374:
-.LBB292:
-.LBB291:
+	b	.L1372
+.LVL1850:
+.L1375:
+.LBB296:
+.LBB295:
 	.loc 5 489 0
 	adrp	x1, .LANCHOR101
 	ldrh	w4, [x1, #:lo12:.LANCHOR101]
 	cmp	w4, w3
-	bne	.L1375
+	bne	.L1376
 	.loc 5 490 0
 	strh	w2, [x1, #:lo12:.LANCHOR101]
 	.loc 5 491 0
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR102]
-	b	.L1375
-.LVL1849:
-.L1383:
-.LBB290:
+	b	.L1376
+.LVL1851:
+.L1384:
+.LBB294:
 	.loc 5 512 0
 	mov	w0, 64
-.L1475:
+.L1476:
 	.loc 5 516 0
 	strh	w0, [x5, #:lo12:.LANCHOR85]
-	b	.L1382
-.L1380:
+	b	.L1383
+.L1381:
 	mov	w0, 80
-	b	.L1475
-.LVL1850:
-.L1450:
+	b	.L1476
+.LVL1852:
+.L1451:
 	.loc 5 504 0
 	mov	w21, w20
-.LVL1851:
-.L1379:
+.LVL1853:
+.L1380:
 	.loc 5 521 0
 	adrp	x1, .LANCHOR40
 	ubfiz	x0, x21, 1, 32
@@ -18062,80 +18082,80 @@ rk_ftl_garbage_collect:
 	adrp	x0, .LC104
 	add	x0, x0, :lo12:.LC104
 	bl	printf
-.LVL1852:
-	b	.L1382
-.LVL1853:
-.L1446:
-.LBE290:
+.LVL1854:
+	b	.L1383
+.LVL1855:
+.L1447:
+.LBE294:
 	.loc 5 473 0
 	mov	w20, w0
-	b	.L1377
-.L1449:
+	b	.L1378
+.L1450:
 	mov	w20, w21
-	b	.L1377
-.LVL1854:
-.L1387:
+	b	.L1378
+.LVL1856:
+.L1388:
 	.loc 5 532 0
 	cmp	w0, 12
-	bls	.L1388
+	bls	.L1389
 	.loc 5 533 0
 	lsr	w21, w21, 4
-.LVL1855:
-	b	.L1386
-.LVL1856:
-.L1388:
+.LVL1857:
+	b	.L1387
+.LVL1858:
+.L1389:
 	.loc 5 534 0
 	cmp	w0, 8
-	bls	.L1386
+	bls	.L1387
 	.loc 5 535 0
 	lsr	w21, w21, 2
-.LVL1857:
-	b	.L1386
-.LVL1858:
-.L1451:
+.LVL1859:
+	b	.L1387
+.LVL1860:
+.L1452:
 	.loc 5 529 0
 	mov	w21, 1
-	b	.L1386
-.LVL1859:
-.L1393:
+	b	.L1387
+.LVL1861:
+.L1394:
 	.loc 5 545 0
 	mov	w1, 18
 	strh	w1, [x2, #:lo12:.LANCHOR84]
-	b	.L1394
-.L1391:
+	b	.L1395
+.L1392:
 	.loc 5 549 0
 	adrp	x0, .LANCHOR80
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	add	w0, w0, w0, lsl 1
 	asr	w0, w0, 2
 	strh	w0, [x3, #:lo12:.LANCHOR84]
-.L1390:
+.L1391:
 	.loc 5 551 0
 	adrp	x0, .LANCHOR103
 	ldrh	w0, [x0, #:lo12:.LANCHOR103]
-	cbz	w0, .L1452
+	cbz	w0, .L1453
 	.loc 5 552 0
 	add	w21, w21, 32
-.LVL1860:
+.LVL1862:
 	and	w21, w21, 65535
-.LVL1861:
-.L1452:
+.LVL1863:
+.L1453:
 	.loc 5 551 0
 	mov	w20, 65535
-.LVL1862:
-.L1396:
+.LVL1864:
+.L1397:
 	.loc 5 597 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR82]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L1405
+	bne	.L1406
 	.loc 5 598 0
 	cmp	w20, w0
-	beq	.L1406
+	beq	.L1407
 	.loc 5 599 0
 	strh	w20, [x19, #:lo12:.LANCHOR82]
-.LVL1863:
-.L1407:
+.LVL1865:
+.L1408:
 	.loc 5 610 0
 	add	x0, x19, :lo12:.LANCHOR82
 	.loc 5 611 0
@@ -18145,25 +18165,25 @@ rk_ftl_garbage_collect:
 	.loc 5 611 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR82]
 	cmp	w0, w1
-	beq	.L1405
+	beq	.L1406
 	.loc 5 612 0
 	bl	IsBlkInGcList
-.LVL1864:
-	cbz	w0, .L1410
+.LVL1866:
+	cbz	w0, .L1411
 	.loc 5 613 0
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR82]
-.L1410:
+.L1411:
 	.loc 5 615 0
 	ldrh	w1, [x19, #:lo12:.LANCHOR82]
 	mov	w0, 65535
 	add	x23, x19, :lo12:.LANCHOR82
 	cmp	w1, w0
-	beq	.L1405
+	beq	.L1406
 	.loc 5 616 0
 	mov	x0, x23
 	bl	make_superblock
-.LVL1865:
+.LVL1867:
 	.loc 5 619 0
 	adrp	x0, .LANCHOR175
 	.loc 5 620 0
@@ -18181,31 +18201,31 @@ rk_ftl_garbage_collect:
 	ldrh	w1, [x0, x1, lsl 1]
 	adrp	x0, .LANCHOR176
 	strh	w1, [x0, #:lo12:.LANCHOR176]
-.L1405:
+.L1406:
 	.loc 5 625 0
 	adrp	x0, .LANCHOR51
 	ldrh	w1, [x19, #:lo12:.LANCHOR82]
 	str	x0, [x29, 136]
 	ldrh	w2, [x0, #:lo12:.LANCHOR51]
 	cmp	w2, w1
-	beq	.L1411
+	beq	.L1412
 	adrp	x0, .LANCHOR52
 	str	x0, [x29, 128]
 	ldrh	w2, [x0, #:lo12:.LANCHOR52]
 	cmp	w2, w1
-	beq	.L1411
+	beq	.L1412
 	.loc 5 635 0
 	adrp	x24, .LANCHOR87
-.LVL1866:
+.LVL1868:
 	.loc 5 657 0
 	add	x0, x24, :lo12:.LANCHOR87
 	str	x0, [x29, 160]
-.L1412:
+.L1413:
 	.loc 5 631 0
 	ldrh	w1, [x19, #:lo12:.LANCHOR82]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1413
+	bne	.L1414
 	.loc 5 632 0
 	adrp	x0, .LANCHOR89
 	.loc 5 645 0
@@ -18213,47 +18233,47 @@ rk_ftl_garbage_collect:
 	add	x25, x25, :lo12:.LANCHOR19
 	.loc 5 632 0
 	str	wzr, [x0, #:lo12:.LANCHOR89]
-.L1414:
+.L1415:
 	.loc 5 635 0
 	ldrh	w5, [x24, #:lo12:.LANCHOR87]
 	add	x7, x24, :lo12:.LANCHOR87
 	mov	w0, w5
 	bl	List_get_gc_head_node
-.LVL1867:
+.LVL1869:
 	and	w6, w0, 65535
 	strh	w6, [x19, #:lo12:.LANCHOR82]
 	.loc 5 636 0
 	mov	w0, 65535
 	cmp	w6, w0
-	bne	.L1415
+	bne	.L1416
 	.loc 5 637 0
 	strh	wzr, [x7]
 	.loc 5 638 0
 	mov	w0, 8
-	b	.L1371
-.LVL1868:
-.L1385:
+	b	.L1372
+.LVL1870:
+.L1386:
 	.loc 5 557 0
 	adrp	x1, .LANCHOR53
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L1455
+	bne	.L1456
 	adrp	x0, .LANCHOR101
 	ldrh	w0, [x0, #:lo12:.LANCHOR101]
 	cmp	w0, w1
-	bne	.L1455
+	bne	.L1456
 	cmp	w20, w0
-	bne	.L1455
+	bne	.L1456
 	ldrh	w0, [x19, #:lo12:.LANCHOR82]
 	cmp	w0, w20
-	beq	.L1397
-.LVL1869:
-.L1455:
+	beq	.L1398
+.LVL1871:
+.L1456:
 	.loc 5 556 0
 	mov	w21, 1
-	b	.L1396
-.LVL1870:
-.L1397:
+	b	.L1397
+.LVL1872:
+.L1398:
 	.loc 5 558 0
 	adrp	x0, .LANCHOR89
 	.loc 5 560 0
@@ -18270,40 +18290,40 @@ rk_ftl_garbage_collect:
 	.loc 5 561 0
 	ldrh	w1, [x23, #:lo12:.LANCHOR174]
 	.loc 5 560 0
-	bcs	.L1398
+	bcs	.L1399
 	.loc 5 561 0
-	cbnz	w1, .L1399
+	cbnz	w1, .L1400
 	adrp	x1, .LANCHOR62
 	adrp	x3, .LANCHOR60
 	ldr	w1, [x1, #:lo12:.LANCHOR62]
 	ldr	w3, [x3, #:lo12:.LANCHOR60]
 	add	w1, w1, w1, lsl 1
 	cmp	w3, w1, lsr 2
-	bcs	.L1400
-.L1399:
+	bcs	.L1401
+.L1400:
 	.loc 5 562 0
 	adrp	x0, .LANCHOR80
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	add	w0, w0, w0, lsl 1
 	asr	w0, w0, 2
 	strh	w0, [x2, #:lo12:.LANCHOR84]
-.LVL1871:
-.L1476:
+.LVL1873:
+.L1477:
 	.loc 5 578 0
 	bl	FtlReadRefresh
-.LVL1872:
+.LVL1874:
 	.loc 5 579 0
 	ldrh	w0, [x23, #:lo12:.LANCHOR174]
-	b	.L1371
-.LVL1873:
-.L1400:
+	b	.L1372
+.LVL1875:
+.L1401:
 	.loc 5 564 0
 	mov	w1, 18
 	strh	w1, [x0, #:lo12:.LANCHOR84]
-	b	.L1476
-.L1398:
+	b	.L1477
+.L1399:
 	.loc 5 572 0
-	cbnz	w1, .L1455
+	cbnz	w1, .L1456
 	.loc 5 573 0
 	adrp	x1, .LANCHOR80
 	ldrh	w5, [x1, #:lo12:.LANCHOR80]
@@ -18313,10 +18333,10 @@ rk_ftl_garbage_collect:
 	.loc 5 574 0
 	mov	w0, 0
 	bl	List_get_gc_head_node
-.LVL1874:
+.LVL1876:
 	.loc 5 575 0
 	ubfiz	x0, x0, 1, 16
-.LVL1875:
+.LVL1877:
 	adrp	x1, .LANCHOR43
 	adrp	x2, .LANCHOR3
 	ldr	x1, [x1, #:lo12:.LANCHOR43]
@@ -18326,70 +18346,70 @@ rk_ftl_garbage_collect:
 	ldrh	w0, [x0, #:lo12:.LANCHOR20]
 	mul	w0, w0, w2
 	cmp	w1, w0, asr 1
-	ble	.L1403
+	ble	.L1404
 	.loc 5 576 0
 	sub	w5, w5, #1
 	.loc 5 575 0
 	cmp	w6, w5
-	bge	.L1476
-.L1403:
+	bge	.L1477
+.L1404:
 	.loc 5 584 0
-	cbnz	w1, .L1455
+	cbnz	w1, .L1456
 	.loc 5 585 0
 	mov	w0, -1
 	bl	decrement_vpc_count
-.LVL1876:
+.LVL1878:
 	.loc 5 586 0
 	ldrh	w0, [x21, #:lo12:.LANCHOR48]
 	add	w0, w0, 1
-	b	.L1371
-.LVL1877:
-.L1406:
+	b	.L1372
+.LVL1879:
+.L1407:
 	.loc 5 600 0
 	adrp	x0, .LANCHOR101
 	ldrh	w1, [x0, #:lo12:.LANCHOR101]
 	cmp	w1, w20
-	beq	.L1407
+	beq	.L1408
 	.loc 5 604 0
 	adrp	x2, .LANCHOR43
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR43]
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L1408
+	cbnz	w1, .L1409
 	.loc 5 605 0
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR101]
-.L1408:
+.L1409:
 	.loc 5 606 0
 	ldrh	w1, [x0, #:lo12:.LANCHOR101]
 	strh	w1, [x19, #:lo12:.LANCHOR82]
 	.loc 5 607 0
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR101]
-	b	.L1407
-.LVL1878:
-.L1411:
+	b	.L1408
+.LVL1880:
+.L1412:
 	.loc 5 626 0
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR82]
-.LVL1879:
-.L1477:
+.LVL1881:
+.L1478:
 	.loc 5 734 0
 	adrp	x0, .LANCHOR174
 	ldrh	w0, [x0, #:lo12:.LANCHOR174]
-	b	.L1371
-.LVL1880:
-.L1415:
+	b	.L1372
+.LVL1882:
+.L1416:
 	.loc 5 640 0
 	mov	w0, w6
 	bl	IsBlkInGcList
-.LVL1881:
+.LVL1883:
 	add	w5, w5, 1
-	cbz	w0, .L1416
+	cbz	w0, .L1417
 	.loc 5 641 0
 	strh	w5, [x24, #:lo12:.LANCHOR87]
-	b	.L1414
-.L1416:
+	b	.L1415
+.L1417:
 	.loc 5 645 0
 	adrp	x23, .LANCHOR43
 	adrp	x4, .LANCHOR3
@@ -18406,50 +18426,50 @@ rk_ftl_garbage_collect:
 	ldrh	w3, [x2, x1]
 	mul	w0, w0, w4
 	cmp	w3, w0, asr 1
-	bgt	.L1418
+	bgt	.L1419
 	.loc 5 646 0
 	cmp	w5, 48
-	bls	.L1419
+	bls	.L1420
 	cmp	w3, 8
-	bls	.L1419
+	bls	.L1420
 	adrp	x3, .LANCHOR97
 	ldrh	w3, [x3, #:lo12:.LANCHOR97]
 	cmp	w3, 35
-	bhi	.L1419
-.L1418:
+	bhi	.L1420
+.L1419:
 	.loc 5 647 0
 	ldr	x3, [x29, 160]
 	strh	wzr, [x3]
-.L1419:
+.L1420:
 	.loc 5 649 0
 	ldrh	w1, [x2, x1]
 	cmp	w0, w1
-	bgt	.L1420
+	bgt	.L1421
 	mov	w0, 65535
 	cmp	w20, w0
-	bne	.L1420
+	bne	.L1421
 	.loc 5 650 0
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR82]
 	.loc 5 651 0
 	adrp	x0, .LANCHOR87
 	strh	wzr, [x0, #:lo12:.LANCHOR87]
-	b	.L1477
-.L1420:
+	b	.L1478
+.L1421:
 	.loc 5 655 0
-	cbnz	w1, .L1421
+	cbnz	w1, .L1422
 	.loc 5 656 0
 	mov	w0, -1
 	bl	decrement_vpc_count
-.LVL1882:
+.LVL1884:
 	.loc 5 657 0
 	ldr	x0, [x29, 160]
 	ldr	x1, [x29, 160]
 	ldrh	w0, [x0]
 	add	w0, w0, 1
 	strh	w0, [x1]
-	b	.L1414
-.L1421:
+	b	.L1415
+.L1422:
 	.loc 5 660 0
 	add	x0, x19, :lo12:.LANCHOR82
 	strb	wzr, [x0, 8]
@@ -18457,48 +18477,48 @@ rk_ftl_garbage_collect:
 	ldr	x0, [x29, 136]
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w6
-	bne	.L1422
+	bne	.L1423
 	adrp	x1, .LANCHOR177
 	adrp	x0, .LC1
 	mov	w2, 662
 	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1883:
-.L1422:
+.LVL1885:
+.L1423:
 	.loc 5 663 0
 	ldr	x0, [x29, 128]
 	ldrh	w1, [x19, #:lo12:.LANCHOR82]
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bne	.L1423
+	bne	.L1424
 	adrp	x1, .LANCHOR177
 	adrp	x0, .LC1
 	mov	w2, 663
 	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1884:
-.L1423:
+.LVL1886:
+.L1424:
 	.loc 5 664 0
 	adrp	x0, .LANCHOR53
 	ldrh	w1, [x19, #:lo12:.LANCHOR82]
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L1424
+	bne	.L1425
 	adrp	x1, .LANCHOR177
 	adrp	x0, .LC1
 	mov	w2, 664
 	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1885:
-.L1424:
+.LVL1887:
+.L1425:
 	.loc 5 665 0
 	add	x25, x19, :lo12:.LANCHOR82
 	mov	x0, x25
 	bl	make_superblock
-.LVL1886:
+.LVL1888:
 	.loc 5 666 0
 	adrp	x0, .LANCHOR175
 	.loc 5 667 0
@@ -18515,10 +18535,10 @@ rk_ftl_garbage_collect:
 	strh	w1, [x0, #:lo12:.LANCHOR176]
 	.loc 5 669 0
 	strb	wzr, [x25, 6]
-.L1413:
+.L1414:
 	.loc 5 675 0
 	bl	FtlReadRefresh
-.LVL1887:
+.LVL1889:
 	.loc 5 679 0
 	adrp	x1, .LANCHOR19
 	.loc 5 678 0
@@ -18527,7 +18547,7 @@ rk_ftl_garbage_collect:
 	.loc 5 679 0
 	ldrh	w0, [x1, #:lo12:.LANCHOR19]
 	str	w0, [x29, 172]
-.LVL1888:
+.LVL1890:
 	.loc 5 680 0
 	add	x0, x19, :lo12:.LANCHOR82
 	str	x1, [x29, 120]
@@ -18535,13 +18555,13 @@ rk_ftl_garbage_collect:
 	ldrh	w0, [x0, 2]
 	add	w2, w0, w21
 	cmp	w2, w3
-	ble	.L1425
+	ble	.L1426
 	.loc 5 681 0
 	sub	w21, w3, w0
-.LVL1889:
+.LVL1891:
 	and	w21, w21, 65535
-.LVL1890:
-.L1425:
+.LVL1892:
+.L1426:
 	.loc 5 704 0
 	adrp	x0, .LANCHOR175
 	.loc 5 693 0
@@ -18549,11 +18569,11 @@ rk_ftl_garbage_collect:
 	.loc 5 704 0
 	add	x0, x0, :lo12:.LANCHOR175
 	str	x0, [x29, 152]
-.LVL1891:
-.L1426:
+.LVL1893:
+.L1427:
 	.loc 5 683 0
 	cmp	w21, w27, uxth
-	bls	.L1434
+	bls	.L1435
 	.loc 5 688 0
 	add	x1, x19, :lo12:.LANCHOR82
 	.loc 5 685 0
@@ -18572,40 +18592,40 @@ rk_ftl_garbage_collect:
 	mov	w6, 65535
 	.loc 5 688 0
 	add	w4, w4, w27
-	b	.L1435
-.LVL1892:
-.L1428:
+	b	.L1436
+.LVL1894:
+.L1429:
 	.loc 5 686 0
 	ldrh	w3, [x1]
-.LVL1893:
+.LVL1895:
 	.loc 5 687 0
 	cmp	w3, w6
-	beq	.L1427
+	beq	.L1428
 	.loc 5 688 0
 	ubfiz	x5, x23, 5, 16
 	.loc 5 689 0
 	add	w23, w23, 1
-.LVL1894:
+.LVL1896:
 	.loc 5 688 0
 	add	x5, x0, x5
 	.loc 5 689 0
 	and	w23, w23, 65535
-.LVL1895:
+.LVL1897:
 	.loc 5 688 0
 	orr	w3, w4, w3, lsl 10
-.LVL1896:
+.LVL1898:
 	str	w3, [x5, 4]
-.L1427:
+.L1428:
 	.loc 5 685 0
 	add	w2, w2, 1
-.LVL1897:
+.LVL1899:
 	add	x1, x1, 2
-.LVL1898:
+.LVL1900:
 	and	w2, w2, 65535
-.LVL1899:
-.L1435:
+.LVL1901:
+.L1436:
 	cmp	w2, w7
-	bne	.L1428
+	bne	.L1429
 	.loc 5 693 0
 	add	x1, x19, :lo12:.LANCHOR82
 	.loc 5 705 0
@@ -18613,48 +18633,48 @@ rk_ftl_garbage_collect:
 	add	x26, x26, :lo12:.LANCHOR91
 	.loc 5 693 0
 	ldrb	w2, [x1, 8]
-.LVL1900:
+.LVL1902:
 	mov	w1, w23
 	bl	FlashReadPages
-.LVL1901:
+.LVL1903:
 	ubfiz	x0, x23, 5, 16
 	mov	x23, 0
-.LVL1902:
+.LVL1904:
 	str	x0, [x29, 144]
-.LVL1903:
-.L1429:
+.LVL1905:
+.L1430:
 	.loc 5 695 0
 	ldr	x0, [x29, 144]
 	cmp	x0, x23
-	bne	.L1433
-.LVL1904:
-	add	w27, w27, 1
-.LVL1905:
-	b	.L1426
+	bne	.L1434
 .LVL1906:
-.L1433:
+	add	w27, w27, 1
+.LVL1907:
+	b	.L1427
+.LVL1908:
+.L1434:
 	.loc 5 696 0
 	ldr	x0, [x25, #:lo12:.LANCHOR95]
 	add	x1, x0, x23
-.LVL1907:
+.LVL1909:
 	.loc 5 697 0
 	ldr	w0, [x0, x23]
 	cmn	w0, #1
-	beq	.L1430
+	beq	.L1431
 	.loc 5 696 0
 	ldr	x28, [x1, 16]
 	.loc 5 697 0
 	mov	w0, 61589
 	ldrh	w1, [x28]
-.LVL1908:
+.LVL1910:
 	cmp	w1, w0
-	bne	.L1430
+	bne	.L1431
 	.loc 5 699 0
 	ldr	w4, [x28, 8]
-.LVL1909:
+.LVL1911:
 	.loc 5 700 0
 	cmn	w4, #1
-	bne	.L1431
+	bne	.L1432
 	str	w4, [x29, 112]
 	mov	w2, 700
 	adrp	x1, .LANCHOR177
@@ -18662,23 +18682,23 @@ rk_ftl_garbage_collect:
 	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1910:
+.LVL1912:
 	ldr	w4, [x29, 112]
-.LVL1911:
-.L1431:
+.LVL1913:
+.L1432:
 	.loc 5 701 0
 	mov	w2, 0
 	add	x1, x29, 188
 	mov	w0, w4
 	bl	log2phys
-.LVL1912:
+.LVL1914:
 	.loc 5 702 0
 	ldr	x0, [x25, #:lo12:.LANCHOR95]
 	ldr	w1, [x29, 188]
 	add	x0, x0, x23
 	ldr	w2, [x0, 4]
 	cmp	w2, w1
-	bne	.L1430
+	bne	.L1431
 	.loc 5 704 0
 	ldr	x1, [x29, 152]
 	.loc 5 705 0
@@ -18699,7 +18719,7 @@ rk_ftl_garbage_collect:
 	str	w0, [x1, 24]
 	.loc 5 706 0
 	bl	Ftl_get_new_temp_ppa
-.LVL1913:
+.LVL1915:
 	ldp	x4, x1, [x29, 104]
 	.loc 5 707 0
 	ldr	x2, [x4, #:lo12:.LANCHOR121]
@@ -18738,34 +18758,34 @@ rk_ftl_garbage_collect:
 	str	w2, [x28, 4]
 	.loc 5 716 0
 	bl	FtlGcBufAlloc
-.LVL1914:
+.LVL1916:
 	.loc 5 717 0
 	ldrb	w1, [x11, 7]
 	ldr	w0, [x26]
 	cmp	w1, w0
-	beq	.L1432
+	beq	.L1433
 	ldrh	w0, [x11, 4]
-	cbnz	w0, .L1430
-.L1432:
+	cbnz	w0, .L1431
+.L1433:
 	.loc 5 718 0
 	bl	Ftl_gc_temp_data_write_back
-.LVL1915:
-	cbz	w0, .L1430
-.LVL1916:
-.L1478:
+.LVL1917:
+	cbz	w0, .L1431
+.LVL1918:
+.L1479:
 	.loc 5 733 0
 	str	wzr, [x22, #:lo12:.LANCHOR117]
-	b	.L1477
-.LVL1917:
-.L1430:
+	b	.L1478
+.LVL1919:
+.L1431:
 	add	x23, x23, 32
-	b	.L1429
-.L1434:
+	b	.L1430
+.L1435:
 	.loc 5 727 0
 	add	x1, x19, :lo12:.LANCHOR82
 	ldrh	w0, [x1, 2]
 	add	w21, w21, w0
-.LVL1918:
+.LVL1920:
 	.loc 5 729 0
 	ldr	w0, [x29, 172]
 	.loc 5 727 0
@@ -18773,65 +18793,65 @@ rk_ftl_garbage_collect:
 	strh	w21, [x1, 2]
 	.loc 5 729 0
 	cmp	w0, w21
-	bls	.L1436
+	bls	.L1437
 	adrp	x0, .LANCHOR175
 	ldrh	w1, [x0, #:lo12:.LANCHOR175]
 	adrp	x0, .LANCHOR176
 	ldrh	w0, [x0, #:lo12:.LANCHOR176]
 	cmp	w1, w0
-	bne	.L1437
-.L1436:
+	bne	.L1438
+.L1437:
 	.loc 5 731 0
 	adrp	x0, .LANCHOR91
 	ldr	w0, [x0, #:lo12:.LANCHOR91]
-	cbz	w0, .L1438
+	cbz	w0, .L1439
 	.loc 5 732 0
 	bl	Ftl_gc_temp_data_write_back
-.LVL1919:
-	cbnz	w0, .L1478
-.L1438:
+.LVL1921:
+	cbnz	w0, .L1479
+.L1439:
 	.loc 5 737 0
 	adrp	x0, .LANCHOR175
 	ldrh	w0, [x0, #:lo12:.LANCHOR175]
-	cbnz	w0, .L1439
+	cbnz	w0, .L1440
 	ldrh	w0, [x19, #:lo12:.LANCHOR82]
 	adrp	x1, .LANCHOR43
 	ldr	x1, [x1, #:lo12:.LANCHOR43]
 	lsl	x0, x0, 1
 	ldrh	w2, [x1, x0]
-	cbz	w2, .L1439
+	cbz	w2, .L1440
 	.loc 5 739 0
 	strh	wzr, [x1, x0]
 	.loc 5 740 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR82]
 	bl	update_vpc_list
-.LVL1920:
+.LVL1922:
 	.loc 5 741 0
 	bl	FtlCacheWriteBack
-.LVL1921:
+.LVL1923:
 	.loc 5 742 0
 	bl	l2p_flush
-.LVL1922:
+.LVL1924:
 	.loc 5 743 0
 	bl	FtlVpcTblFlush
-.LVL1923:
-.L1439:
+.LVL1925:
+.L1440:
 	.loc 5 745 0
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR82]
-.L1437:
+.L1438:
 	.loc 5 747 0
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 2
-	bhi	.L1440
+	bhi	.L1441
 	.loc 5 749 0
 	ldr	x0, [x29, 120]
 	ldrh	w21, [x0, #:lo12:.LANCHOR19]
-.LVL1924:
-	b	.L1412
-.LVL1925:
-.L1440:
+.LVL1926:
+	b	.L1413
+.LVL1927:
+.L1441:
 	.loc 5 754 0
 	adrp	x1, .LANCHOR174
 	.loc 5 752 0
@@ -18841,15 +18861,15 @@ rk_ftl_garbage_collect:
 	.loc 5 755 0
 	cmp	w1, 0
 	csinc	w0, w1, w0, ne
-	b	.L1371
-.LVL1926:
-.L1443:
-.LBE291:
-.LBE292:
+	b	.L1372
+.LVL1928:
+.L1444:
+.LBE295:
+.LBE296:
 	.loc 5 479 0
 	mov	w0, 0
-.LVL1927:
-	b	.L1371
+.LVL1929:
+	b	.L1372
 	.cfi_endproc
 .LFE319:
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
@@ -18865,7 +18885,7 @@ sftl_gc:
 	mov	w1, 1
 	mov	w0, w1
 	b	rk_ftl_garbage_collect
-.LVL1928:
+.LVL1930:
 	.cfi_endproc
 .LFE320:
 	.size	sftl_gc, .-sftl_gc
@@ -18877,7 +18897,7 @@ FtlRead:
 .LFB214:
 	.loc 3 814 0
 	.cfi_startproc
-.LVL1929:
+.LVL1931:
 	stp	x29, x30, [sp, -176]!
 	.cfi_def_cfa_offset 176
 	.cfi_offset 29, -176
@@ -18907,29 +18927,29 @@ FtlRead:
 	.cfi_offset 25, -112
 	.cfi_offset 26, -104
 	.loc 3 824 0
-	bne	.L1481
+	bne	.L1482
 	.loc 3 825 0
 	mov	x2, x3
-.LVL1930:
+.LVL1932:
 	mov	w1, w27
-.LVL1931:
+.LVL1933:
 	add	w0, w19, 256
-.LVL1932:
+.LVL1934:
 	bl	FtlVendorPartRead
-.LVL1933:
+.LVL1935:
 	mov	w21, w0
-.LVL1934:
-.L1480:
+.LVL1936:
+.L1481:
 	.loc 3 901 0
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
-.LVL1935:
+.LVL1937:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL1936:
+.LVL1938:
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-.LVL1937:
+.LVL1939:
 	ldp	x29, x30, [sp], 176
 	.cfi_remember_state
 	.cfi_restore 30
@@ -18946,28 +18966,28 @@ FtlRead:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1938:
-.L1481:
+.LVL1940:
+.L1482:
 	.cfi_restore_state
 	.loc 3 830 0
 	add	w0, w1, w2
 	str	w0, [x29, 140]
 	adrp	x0, .LANCHOR34
 	add	w1, w1, w2
-.LVL1939:
+.LVL1941:
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	cmp	w1, w0
-	bhi	.L1501
+	bhi	.L1502
 	.loc 3 830 0 is_stmt 0 discriminator 1
 	adrp	x0, .LANCHOR88
 	ldr	w21, [x0, #:lo12:.LANCHOR88]
 	cmn	w21, #1
-	beq	.L1480
+	beq	.L1481
 	.loc 3 835 0 is_stmt 1
 	adrp	x22, .LANCHOR12
 	.loc 3 833 0
 	bl	FtlCacheWriteBack
-.LVL1940:
+.LVL1942:
 	.loc 3 836 0
 	add	w1, w19, w27
 	.loc 3 840 0
@@ -18986,20 +19006,20 @@ FtlRead:
 	stp	wzr, wzr, [x29, 144]
 	.loc 3 835 0
 	udiv	w26, w19, w0
-.LVL1941:
+.LVL1943:
 	.loc 3 836 0
 	udiv	w24, w24, w0
-.LVL1942:
+.LVL1944:
 	.loc 3 835 0
 	mov	w20, w26
 	.loc 3 837 0
 	sub	w0, w24, w26
 	add	w0, w0, 1
 	stp	wzr, w0, [x29, 152]
-.LVL1943:
+.LVL1945:
 	.loc 3 841 0
 	ldr	w0, [x1, #:lo12:.LANCHOR63]
-.LVL1944:
+.LVL1946:
 	ldr	w2, [x29, 156]
 	add	w0, w0, w2
 	str	w0, [x1, #:lo12:.LANCHOR63]
@@ -19007,72 +19027,72 @@ FtlRead:
 	adrp	x0, .LANCHOR83
 	add	x0, x0, :lo12:.LANCHOR83
 	str	x0, [x29, 128]
-.LVL1945:
-.L1483:
+.LVL1947:
+.L1484:
 	.loc 3 842 0
 	ldr	w0, [x29, 156]
-	cbnz	w0, .L1499
+	cbnz	w0, .L1500
 	.loc 3 898 0
 	adrp	x0, .LANCHOR103
 	ldrh	w0, [x0, #:lo12:.LANCHOR103]
-	cbnz	w0, .L1500
+	cbnz	w0, .L1501
 	.loc 3 898 0 is_stmt 0 discriminator 1
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 31
-	bhi	.L1480
-.L1500:
+	bhi	.L1481
+.L1501:
 	.loc 3 899 0 is_stmt 1
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-.LVL1946:
-	b	.L1480
-.L1499:
+.LVL1948:
+	b	.L1481
+.L1500:
 	.loc 3 843 0
 	add	x1, x29, 172
 	mov	w2, 0
 	mov	w0, w20
 	bl	log2phys
-.LVL1947:
+.LVL1949:
 	.loc 3 844 0
 	ldr	w1, [x29, 172]
 	cmn	w1, #1
-	bne	.L1484
+	bne	.L1485
 	.loc 3 845 0 discriminator 1
 	add	x5, x22, :lo12:.LANCHOR12
 	mov	w4, 0
-.L1485:
-.LVL1948:
+.L1486:
+.LVL1950:
 	ldrh	w0, [x5]
 	cmp	w4, w0
-	bcc	.L1487
-.LVL1949:
-.L1488:
+	bcc	.L1488
+.LVL1951:
+.L1489:
 	.loc 3 874 0
 	ldr	w0, [x29, 156]
 	.loc 3 872 0
 	add	w20, w20, 1
-.LVL1950:
+.LVL1952:
 	.loc 3 874 0
 	subs	w0, w0, #1
 	str	w0, [x29, 156]
-.LVL1951:
-	beq	.L1492
+.LVL1953:
+	beq	.L1493
 	.loc 3 874 0 is_stmt 0 discriminator 1
 	adrp	x0, .LANCHOR3
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w25, w0, lsl 2
-	bne	.L1483
-.L1492:
+	bne	.L1484
+.L1493:
 	.loc 3 875 0 is_stmt 1
-	cbz	w25, .L1483
+	cbz	w25, .L1484
 	.loc 3 876 0
 	ldr	x0, [x28, #:lo12:.LANCHOR120]
 	mov	w1, w25
 	mov	w2, 0
 	bl	FlashReadPages
-.LVL1952:
+.LVL1954:
 	.loc 3 883 0
 	ldr	w0, [x29, 144]
 	lsl	w0, w0, 9
@@ -19086,77 +19106,77 @@ FtlRead:
 	str	w0, [x29, 112]
 	ubfiz	x0, x25, 5, 32
 	mov	x25, 0
-.LVL1953:
+.LVL1955:
 	str	x0, [x29, 104]
-.LVL1954:
+.LVL1956:
 	.loc 3 883 0
 	add	x0, x22, :lo12:.LANCHOR12
 	str	x0, [x29, 96]
-.L1498:
+.L1499:
 	.loc 3 878 0
 	ldr	x0, [x28, #:lo12:.LANCHOR120]
 	add	x0, x0, x25
 	ldr	w1, [x0, 24]
 	cmp	w26, w1
-	bne	.L1494
+	bne	.L1495
 	.loc 3 879 0
 	ldr	x1, [x0, 8]
 	adrp	x0, .LANCHOR116
 	ldr	x0, [x0, #:lo12:.LANCHOR116]
 	cmp	x1, x0
-	bne	.L1495
+	bne	.L1496
 	.loc 3 880 0
 	ldr	x0, [x29, 120]
 	ldr	w2, [x29, 112]
 	add	x1, x1, x0
 	mov	x0, x23
-.L1512:
+.L1513:
 	.loc 3 883 0
 	bl	ftl_memcpy
-.LVL1955:
-.L1495:
+.LVL1957:
+.L1496:
 	.loc 3 885 0
 	ldr	x0, [x28, #:lo12:.LANCHOR120]
 	add	x1, x0, x25
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	bne	.L1496
+	bne	.L1497
 	.loc 3 886 0
 	ldr	x1, [x29, 128]
 	.loc 3 887 0
 	mov	w21, w0
-.LVL1956:
+.LVL1958:
 	.loc 3 886 0
 	ldr	x2, [x29, 128]
 	ldr	w1, [x1, 72]
 	add	w1, w1, 1
 	str	w1, [x2, 72]
-.LVL1957:
-.L1497:
+.LVL1959:
+.L1498:
 	.loc 3 877 0 discriminator 2
 	ldr	x0, [x29, 104]
 	add	x25, x25, 32
-.LVL1958:
+.LVL1960:
 	cmp	x0, x25
-	bne	.L1498
+	bne	.L1499
 	.loc 3 894 0
 	mov	w25, 0
-	b	.L1483
-.LVL1959:
-.L1487:
+	b	.L1484
+.LVL1961:
+.L1488:
 	.loc 3 846 0
 	madd	w0, w20, w0, w4
-.LVL1960:
+.LVL1962:
 	.loc 3 847 0
 	cmp	w19, w0
-	bhi	.L1486
+	bhi	.L1487
 	.loc 3 847 0 is_stmt 0 discriminator 1
 	ldr	w1, [x29, 140]
 	cmp	w1, w0
-	bls	.L1486
+	bls	.L1487
 	.loc 3 848 0 is_stmt 1
 	sub	w0, w0, w19
-.LVL1961:
+.LVL1963:
 	str	x5, [x29, 112]
 	lsl	w0, w0, 9
 	str	w4, [x29, 120]
@@ -19164,17 +19184,17 @@ FtlRead:
 	mov	w1, 0
 	add	x0, x23, x0
 	bl	ftl_memset
-.LVL1962:
+.LVL1964:
 	ldr	w4, [x29, 120]
 	ldr	x5, [x29, 112]
-.LVL1963:
-.L1486:
+.LVL1965:
+.L1487:
 	.loc 3 845 0 discriminator 2
 	add	w4, w4, 1
-.LVL1964:
-	b	.L1485
-.LVL1965:
-.L1484:
+.LVL1966:
+	b	.L1486
+.LVL1967:
+.L1485:
 	.loc 3 851 0
 	ldr	x2, [x28, #:lo12:.LANCHOR120]
 	ubfiz	x0, x25, 5, 32
@@ -19184,7 +19204,7 @@ FtlRead:
 	add	x0, x2, x0
 	str	w1, [x0, 4]
 	.loc 3 852 0
-	bne	.L1489
+	bne	.L1490
 	.loc 3 853 0
 	adrp	x1, .LANCHOR116
 	ldr	x1, [x1, #:lo12:.LANCHOR116]
@@ -19194,22 +19214,22 @@ FtlRead:
 	udiv	w2, w19, w1
 	msub	w2, w2, w1, w19
 	str	w2, [x29, 152]
-.LVL1966:
+.LVL1968:
 	.loc 3 855 0
 	sub	w2, w1, w2
-.LVL1967:
+.LVL1969:
 	cmp	w27, w2
 	csel	w2, w27, w2, ls
-.LVL1968:
+.LVL1970:
 	str	w2, [x29, 148]
-.LVL1969:
+.LVL1971:
 	.loc 3 857 0
 	cmp	w1, w2
-	bne	.L1490
+	bne	.L1491
 	.loc 3 858 0
 	str	x23, [x0, 8]
-.LVL1970:
-.L1490:
+.LVL1972:
+.L1491:
 	.loc 3 867 0
 	adrp	x1, .LANCHOR24
 	adrp	x2, .LANCHOR115
@@ -19221,16 +19241,16 @@ FtlRead:
 	mul	w1, w1, w25
 	.loc 3 869 0
 	add	w25, w25, 1
-.LVL1971:
+.LVL1973:
 	.loc 3 867 0
 	and	x1, x1, 4294967292
 	add	x1, x2, x1
 	str	x1, [x0, 16]
-	b	.L1488
-.L1489:
+	b	.L1489
+.L1490:
 	.loc 3 859 0
 	cmp	w20, w24
-	bne	.L1491
+	bne	.L1492
 	.loc 3 861 0
 	ldrh	w2, [x22, #:lo12:.LANCHOR12]
 	.loc 3 860 0
@@ -19244,33 +19264,33 @@ FtlRead:
 	mul	w1, w20, w2
 	sub	w3, w3, w1
 	str	w3, [x29, 144]
-.LVL1972:
+.LVL1974:
 	.loc 3 862 0
 	cmp	w2, w3
-	bne	.L1490
-.LVL1973:
-.L1511:
+	bne	.L1491
+.LVL1975:
+.L1512:
 	.loc 3 865 0
 	sub	w1, w1, w19
 	lsl	w1, w1, 9
 	add	x1, x23, x1
 	str	x1, [x0, 8]
-	b	.L1490
-.L1491:
+	b	.L1491
+.L1492:
 	ldrh	w1, [x22, #:lo12:.LANCHOR12]
 	mul	w1, w1, w20
-	b	.L1511
-.LVL1974:
-.L1494:
+	b	.L1512
+.LVL1976:
+.L1495:
 	.loc 3 881 0
 	cmp	w24, w1
-	bne	.L1495
+	bne	.L1496
 	.loc 3 882 0
 	ldr	x1, [x0, 8]
 	adrp	x0, .LANCHOR114
 	ldr	x0, [x0, #:lo12:.LANCHOR114]
 	cmp	x1, x0
-	bne	.L1495
+	bne	.L1496
 	.loc 3 883 0
 	ldr	x0, [x29, 96]
 	ldr	w2, [x29, 136]
@@ -19279,27 +19299,27 @@ FtlRead:
 	sub	w0, w0, w19
 	lsl	w0, w0, 9
 	add	x0, x23, x0
-	b	.L1512
-.L1496:
+	b	.L1513
+.L1497:
 	.loc 3 889 0
 	cmp	w0, 256
-	bne	.L1497
-.LBB293:
+	bne	.L1498
+.LBB297:
 	.loc 3 890 0
 	ldr	w0, [x1, 4]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL1975:
+.LVL1977:
 	.loc 3 891 0
 	bl	FtlGcRefreshBlock
-.LVL1976:
-	b	.L1497
-.LVL1977:
-.L1501:
-.LBE293:
+.LVL1978:
+	b	.L1498
+.LVL1979:
+.L1502:
+.LBE297:
 	.loc 3 831 0
 	mov	w21, -1
-	b	.L1480
+	b	.L1481
 	.cfi_endproc
 .LFE214:
 	.size	FtlRead, .-FtlRead
@@ -19311,17 +19331,17 @@ sftl_read:
 .LFB219:
 	.loc 3 1204 0
 	.cfi_startproc
-.LVL1978:
+.LVL1980:
 	.loc 3 1205 0
 	mov	x3, x2
 	mov	w2, w1
-.LVL1979:
+.LVL1981:
 	mov	w1, w0
-.LVL1980:
+.LVL1982:
 	mov	w0, 0
-.LVL1981:
+.LVL1983:
 	b	FtlRead
-.LVL1982:
+.LVL1984:
 	.cfi_endproc
 .LFE219:
 	.size	sftl_read, .-sftl_read
@@ -19333,7 +19353,7 @@ FtlWrite:
 .LFB217:
 	.loc 3 962 0
 	.cfi_startproc
-.LVL1983:
+.LVL1985:
 	stp	x29, x30, [sp, -240]!
 	.cfi_def_cfa_offset 240
 	.cfi_offset 29, -240
@@ -19363,23 +19383,23 @@ FtlWrite:
 	.cfi_offset 27, -160
 	.cfi_offset 28, -152
 	.loc 3 970 0
-	bne	.L1515
+	bne	.L1516
 	.loc 3 971 0
 	mov	x2, x3
-.LVL1984:
+.LVL1986:
 	mov	w1, w25
-.LVL1985:
+.LVL1987:
 	add	w0, w22, 256
-.LVL1986:
+.LVL1988:
 	bl	FtlVendorPartWrite
-.LVL1987:
-.L1514:
+.LVL1989:
+.L1515:
 	.loc 3 1153 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-.LVL1988:
+.LVL1990:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 240
 	.cfi_remember_state
@@ -19397,29 +19417,29 @@ FtlWrite:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1989:
-.L1515:
+.LVL1991:
+.L1516:
 	.cfi_restore_state
 	.loc 3 974 0
 	adrp	x0, .LANCHOR34
 	add	w2, w1, w2
-.LVL1990:
+.LVL1992:
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	cmp	w2, w0
-	bhi	.L1557
+	bhi	.L1558
 	.loc 3 974 0 is_stmt 0 discriminator 1
 	adrp	x0, .LANCHOR88
 	ldr	w0, [x0, #:lo12:.LANCHOR88]
 	cmn	w0, #1
-	beq	.L1514
+	beq	.L1515
 	.loc 3 977 0 is_stmt 1
 	adrp	x0, .LANCHOR178
 	.loc 3 978 0
 	adrp	x3, .LANCHOR12
-.LVL1991:
+.LVL1993:
 	.loc 3 977 0
 	mov	w1, 2048
-.LVL1992:
+.LVL1994:
 	.loc 3 979 0
 	sub	w2, w2, #1
 	.loc 3 977 0
@@ -19433,18 +19453,18 @@ FtlWrite:
 	adrp	x2, .LANCHOR65
 	.loc 3 978 0
 	udiv	w21, w22, w1
-.LVL1993:
+.LVL1995:
 	.loc 3 979 0
 	str	w0, [x29, 168]
-.LVL1994:
+.LVL1996:
 	.loc 3 980 0
 	sub	w23, w0, w21
 	.loc 3 982 0
 	ldr	w0, [x2, #:lo12:.LANCHOR65]
-.LVL1995:
+.LVL1997:
 	.loc 3 980 0
 	add	w24, w23, 1
-.LVL1996:
+.LVL1998:
 	.loc 3 982 0
 	add	w0, w0, w24
 	str	w0, [x2, #:lo12:.LANCHOR65]
@@ -19452,45 +19472,45 @@ FtlWrite:
 	adrp	x0, .LANCHOR150
 	str	x0, [x29, 128]
 	ldr	x2, [x0, #:lo12:.LANCHOR150]
-	cbz	x2, .L1517
+	cbz	x2, .L1518
 	.loc 3 984 0
 	ldr	w0, [x2, 24]
 	cmp	w21, w0
-	beq	.L1518
+	beq	.L1519
 	.loc 3 985 0
 	bl	FtlCacheWriteBack
-.LVL1997:
-.L1517:
+.LVL1999:
+.L1518:
 	.loc 3 1008 0
 	adrp	x0, .LANCHOR179
 	str	x0, [x29, 152]
 	ldr	w1, [x0, #:lo12:.LANCHOR179]
 	adrp	x0, .LANCHOR51
 	add	x19, x0, :lo12:.LANCHOR51
-	cbz	w1, .L1520
+	cbz	w1, .L1521
 	.loc 3 1008 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1520
+	cbnz	w0, .L1521
 	.loc 3 1009 0 is_stmt 1
 	adrp	x19, .LANCHOR52
 	add	x19, x19, :lo12:.LANCHOR52
-.L1520:
+.L1521:
 	mov	w20, w21
 	.loc 3 1023 0
 	adrp	x0, .LANCHOR52
 	add	x0, x0, :lo12:.LANCHOR52
 	str	x0, [x29, 104]
-.LVL1998:
-.L1521:
+.LVL2000:
+.L1522:
 	.loc 3 1011 0
-	cbz	w24, .L1555
+	cbz	w24, .L1556
 	.loc 3 1012 0
 	adrp	x0, .LANCHOR3
 	ldrb	w2, [x19, 6]
 	str	x0, [x29, 120]
 	ldrh	w1, [x0, #:lo12:.LANCHOR3]
 	cmp	w2, w1
-	bcc	.L1522
+	bcc	.L1523
 	.loc 3 1012 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR180
 	adrp	x0, .LC1
@@ -19498,38 +19518,38 @@ FtlWrite:
 	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1999:
-.L1522:
+.LVL2001:
+.L1523:
 	.loc 3 1013 0 is_stmt 1
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1523
+	cbnz	w0, .L1524
 	.loc 3 1014 0
 	bl	FtlCacheWriteBack
-.LVL2000:
+.LVL2002:
 	.loc 3 1016 0
 	adrp	x0, .LANCHOR51
 	add	x0, x0, :lo12:.LANCHOR51
 	cmp	x19, x0
-	bne	.L1524
+	bne	.L1525
 	.loc 3 1017 0
 	adrp	x0, .LANCHOR52
 	add	x0, x0, :lo12:.LANCHOR52
 	ldrh	w1, [x0, 4]
-	cbnz	w1, .L1525
+	cbnz	w1, .L1526
 	.loc 3 1018 0
 	bl	allocate_new_data_superblock
-.LVL2001:
+.LVL2003:
 	.loc 3 1019 0
 	ldr	x0, [x29, 152]
 	str	wzr, [x0, #:lo12:.LANCHOR179]
-.L1525:
+.L1526:
 	.loc 3 1021 0
 	adrp	x0, .LANCHOR51
 	add	x19, x0, :lo12:.LANCHOR51
-.LVL2002:
+.LVL2004:
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.LVL2003:
+.LVL2005:
 	.loc 3 1022 0
 	ldr	x0, [x29, 152]
 	ldr	w0, [x0, #:lo12:.LANCHOR179]
@@ -19537,16 +19557,16 @@ FtlWrite:
 	cmp	w0, 0
 	ldr	x0, [x29, 104]
 	csel	x19, x0, x19, ne
-.L1526:
-.LVL2004:
+.L1527:
+.LVL2006:
 	.loc 3 1033 0
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1523
+	cbnz	w0, .L1524
 	.loc 3 1034 0
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.LVL2005:
-.L1523:
+.LVL2007:
+.L1524:
 	.loc 3 1043 0
 	ldrh	w0, [x19, 4]
 	.loc 3 1041 0
@@ -19557,14 +19577,14 @@ FtlWrite:
 	cmp	w0, w1
 	csel	w0, w0, w1, ls
 	str	w0, [x29, 160]
-.LVL2006:
+.LVL2008:
 	.loc 3 1045 0
 	ldr	x0, [x29, 120]
-.LVL2007:
+.LVL2009:
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1527
+	bcc	.L1528
 	.loc 3 1045 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR180
 	adrp	x0, .LC1
@@ -19572,8 +19592,8 @@ FtlWrite:
 	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2008:
-.L1527:
+.LVL2010:
+.L1528:
 	.loc 3 1055 0 is_stmt 1 discriminator 1
 	adrp	x0, .LANCHOR24
 	adrp	x28, .LANCHOR122
@@ -19582,76 +19602,76 @@ FtlWrite:
 	str	xzr, [x29, 184]
 	.loc 3 1055 0 discriminator 1
 	str	x0, [x29, 112]
-.L1528:
+.L1529:
 	.loc 3 1046 0 discriminator 1
 	ldr	w1, [x29, 160]
 	ldr	w27, [x29, 184]
-.LVL2009:
+.LVL2011:
 	cmp	w27, w1
-	bcc	.L1549
+	bcc	.L1550
 	mov	x27, x1
-.L1529:
-.LVL2010:
+.L1530:
+.LVL2012:
 	.loc 3 1127 0
 	ldr	x0, [x29, 128]
 	ldr	x0, [x0, #:lo12:.LANCHOR150]
-	cbz	x0, .L1550
-.LVL2011:
+	cbz	x0, .L1551
+.LVL2013:
 	.loc 3 1129 0
 	sub	w24, w24, #1
-.LVL2012:
+.LVL2014:
 	.loc 3 1130 0
 	subs	w27, w27, #1
-.LVL2013:
-	bne	.L1550
-.LVL2014:
-.L1555:
+.LVL2015:
+	bne	.L1551
+.LVL2016:
+.L1556:
 	.loc 3 1137 0
 	ldr	w0, [x29, 168]
 	sub	w1, w0, w21
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-.LVL2015:
+.LVL2017:
 	.loc 3 1139 0
 	adrp	x0, .LANCHOR48
 	mov	x22, x0
-.LVL2016:
+.LVL2018:
 	ldrh	w1, [x0, #:lo12:.LANCHOR48]
 	cmp	w1, 15
-	bhi	.L1552
+	bhi	.L1553
 	.loc 3 1141 0
 	adrp	x21, .LANCHOR101
-.LVL2017:
+.LVL2019:
 	.loc 3 1143 0
 	adrp	x20, .LANCHOR85
-.LVL2018:
+.LVL2020:
 	.loc 3 1144 0
 	adrp	x19, .LANCHOR84
-.LVL2019:
+.LVL2021:
 	.loc 3 1141 0
 	add	x21, x21, :lo12:.LANCHOR101
 	.loc 3 1143 0
 	add	x20, x20, :lo12:.LANCHOR85
 	.loc 3 1144 0
 	add	x19, x19, :lo12:.LANCHOR84
-.L1575:
+.L1576:
 	.loc 3 1141 0
 	adrp	x0, .LANCHOR82
 	mov	w1, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR82]
 	cmp	w0, w1
-	bne	.L1556
+	bne	.L1557
 	.loc 3 1141 0 is_stmt 0 discriminator 1
 	ldrh	w1, [x21]
 	cmp	w1, w0
-	bne	.L1556
+	bne	.L1557
 	.loc 3 1142 0 is_stmt 1
 	mov	w0, 0
 	bl	List_get_gc_head_node
-.LVL2020:
+.LVL2022:
 	bl	FtlGcRefreshBlock
-.LVL2021:
-.L1556:
+.LVL2023:
+.L1557:
 	.loc 3 1143 0
 	mov	w0, 128
 	.loc 3 1145 0
@@ -19663,19 +19683,19 @@ FtlWrite:
 	.loc 3 1145 0
 	mov	w0, w1
 	bl	rk_ftl_garbage_collect
-.LVL2022:
+.LVL2024:
 	.loc 3 1146 0
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-.LVL2023:
+.LVL2025:
 	.loc 3 1147 0
 	ldrh	w0, [x22, #:lo12:.LANCHOR48]
 	cmp	w0, 8
-	bls	.L1575
-	b	.L1552
-.LVL2024:
-.L1518:
+	bls	.L1576
+	b	.L1553
+.LVL2026:
+.L1519:
 	.loc 3 987 0
 	adrp	x3, .LANCHOR66
 	ldr	w0, [x3, #:lo12:.LANCHOR66]
@@ -19683,82 +19703,82 @@ FtlWrite:
 	str	w0, [x3, #:lo12:.LANCHOR66]
 	.loc 3 988 0
 	msub	w0, w21, w1, w22
-.LVL2025:
+.LVL2027:
 	.loc 3 992 0
 	ldr	x3, [x2, 8]
 	.loc 3 989 0
 	sub	w1, w1, w0
-.LVL2026:
+.LVL2028:
 	cmp	w25, w1
 	.loc 3 992 0
 	lsl	w0, w0, 9
-.LVL2027:
+.LVL2029:
 	csel	w19, w25, w1, ls
-.LVL2028:
+.LVL2030:
 	add	x0, x3, x0
 	lsl	w20, w19, 9
 	mov	x1, x26
 	mov	w2, w20
 	bl	ftl_memcpy
-.LVL2029:
+.LVL2031:
 	.loc 3 994 0
-	cbnz	w23, .L1519
-.LVL2030:
-.L1552:
+	cbnz	w23, .L1520
+.LVL2032:
+.L1553:
 	.loc 3 995 0
 	mov	w0, 0
-	b	.L1514
-.LVL2031:
-.L1519:
+	b	.L1515
+.LVL2033:
+.L1520:
 	.loc 3 996 0
 	sub	w25, w25, w19
-.LVL2032:
+.LVL2034:
 	.loc 3 997 0
 	add	w22, w22, w19
-.LVL2033:
+.LVL2035:
 	.loc 3 998 0
 	add	x26, x26, x20
-.LVL2034:
+.LVL2036:
 	.loc 3 999 0
 	add	w21, w21, 1
-.LVL2035:
+.LVL2037:
 	.loc 3 1000 0
 	bl	FtlCacheWriteBack
-.LVL2036:
+.LVL2038:
 	mov	w24, w23
-	b	.L1517
-.LVL2037:
-.L1524:
+	b	.L1518
+.LVL2039:
+.L1525:
 	.loc 3 1027 0
 	ldr	x1, [x29, 152]
 	str	wzr, [x1, #:lo12:.LANCHOR179]
 	.loc 3 1028 0
 	ldrh	w1, [x0, 4]
-	cbnz	w1, .L1562
+	cbnz	w1, .L1563
 	.loc 3 1029 0
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.LVL2038:
-	b	.L1526
-.L1562:
-	mov	x19, x0
-.LVL2039:
-	b	.L1523
 .LVL2040:
-.L1549:
+	b	.L1527
+.L1563:
+	mov	x19, x0
+.LVL2041:
+	b	.L1524
+.LVL2042:
+.L1550:
 	.loc 3 1047 0
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1529
+	cbz	w0, .L1530
 	.loc 3 1051 0
 	add	x1, x29, 204
 	mov	w2, 0
 	mov	w0, w20
 	bl	log2phys
-.LVL2041:
+.LVL2043:
 	.loc 3 1052 0
 	mov	x0, x19
 	bl	get_new_active_ppa
-.LVL2042:
+.LVL2044:
 	ldr	x1, [x29, 184]
 	lsl	x23, x1, 5
 	.loc 3 1054 0
@@ -19768,7 +19788,7 @@ FtlWrite:
 	str	w0, [x1, 4]
 	.loc 3 1055 0
 	ldr	x0, [x29, 112]
-.LVL2043:
+.LVL2045:
 	.loc 3 1056 0
 	str	w20, [x1, 24]
 	.loc 3 1055 0
@@ -19781,37 +19801,37 @@ FtlWrite:
 	ldr	x0, [x0, #:lo12:.LANCHOR115]
 	str	x0, [x29, 136]
 	add	x27, x0, x3
-.LVL2044:
+.LVL2046:
 	str	x27, [x1, 16]
 	.loc 3 1059 0
 	mov	x0, x27
 	mov	w1, 0
-.LVL2045:
+.LVL2047:
 	bl	ftl_memset
-.LVL2046:
+.LVL2048:
 	.loc 3 1061 0
 	ldr	w0, [x29, 168]
 	cmp	w20, w21
 	ccmp	w20, w0, 4, ne
-	bne	.L1530
+	bne	.L1531
 	.loc 3 1062 0
 	cmp	w20, w21
-	bne	.L1531
+	bne	.L1532
 	.loc 3 1063 0
 	ldr	x0, [x29, 176]
 	ldrh	w2, [x0, #:lo12:.LANCHOR12]
 	udiv	w0, w22, w2
 	msub	w0, w0, w2, w22
 	str	w0, [x29, 164]
-.LVL2047:
+.LVL2049:
 	.loc 3 1064 0
 	sub	w2, w2, w0
 	cmp	w2, w25
 	csel	w0, w2, w25, ls
-.LVL2048:
+.LVL2050:
 	str	w0, [x29, 172]
-.LVL2049:
-.L1532:
+.LVL2051:
+.L1533:
 	.loc 3 1072 0
 	ldr	x0, [x29, 176]
 	ldr	w1, [x29, 172]
@@ -19820,22 +19840,22 @@ FtlWrite:
 	.loc 3 1074 0
 	ldr	x0, [x28, #:lo12:.LANCHOR122]
 	.loc 3 1072 0
-	bne	.L1533
+	bne	.L1534
 	.loc 3 1074 0
 	add	x23, x0, x23
 	.loc 3 1073 0
 	cmp	w20, w21
-	bne	.L1534
+	bne	.L1535
 	.loc 3 1074 0
 	str	x26, [x23, 8]
-.LVL2050:
-.L1535:
+.LVL2052:
+.L1536:
 	.loc 3 1119 0
 	ldr	x0, [x29, 120]
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1546
+	bcc	.L1547
 	.loc 3 1119 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR180
 	adrp	x0, .LC1
@@ -19843,8 +19863,8 @@ FtlWrite:
 	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2051:
-.L1546:
+.LVL2053:
+.L1547:
 	.loc 3 1120 0 is_stmt 1
 	ldp	x1, x2, [x29, 136]
 	mov	w0, -3947
@@ -19856,7 +19876,7 @@ FtlWrite:
 	stp	w0, w20, [x27, 4]
 	.loc 3 1125 0
 	add	w20, w20, 1
-.LVL2052:
+.LVL2054:
 	.loc 3 1121 0
 	add	w0, w0, 1
 	cmn	w0, #1
@@ -19871,9 +19891,9 @@ FtlWrite:
 	ldr	x0, [x29, 184]
 	add	x0, x0, 1
 	str	x0, [x29, 184]
-	b	.L1528
-.LVL2053:
-.L1531:
+	b	.L1529
+.LVL2055:
+.L1532:
 	.loc 3 1069 0
 	ldr	x0, [x29, 176]
 	add	w2, w22, w25
@@ -19884,39 +19904,39 @@ FtlWrite:
 	msub	w2, w20, w0, w2
 	and	w0, w2, 65535
 	str	w0, [x29, 172]
-.LVL2054:
-	b	.L1532
-.LVL2055:
-.L1534:
+.LVL2056:
+	b	.L1533
+.LVL2057:
+.L1535:
 	.loc 3 1076 0
 	ldr	w0, [x29, 172]
-.LVL2056:
-.L1578:
+.LVL2058:
+.L1579:
 	.loc 3 1117 0
 	mul	w0, w0, w20
 	sub	w0, w0, w22
 	lsl	w0, w0, 9
 	add	x0, x26, x0
 	str	x0, [x23, 8]
-	b	.L1535
-.LVL2057:
-.L1533:
+	b	.L1536
+.LVL2059:
+.L1534:
 	.loc 3 1080 0
 	add	x0, x0, x23
 	.loc 3 1079 0
 	cmp	w20, w21
-	bne	.L1536
+	bne	.L1537
 	.loc 3 1080 0
 	adrp	x1, .LANCHOR116
 	ldr	x1, [x1, #:lo12:.LANCHOR116]
-.L1577:
+.L1578:
 	.loc 3 1082 0
 	str	x1, [x0, 8]
 	.loc 3 1084 0
 	ldr	w0, [x29, 204]
 	cmn	w0, #1
-	beq	.L1538
-.LBB294:
+	beq	.L1539
+.LBB298:
 	.loc 3 1086 0
 	str	w0, [x29, 212]
 	.loc 3 1090 0
@@ -19934,24 +19954,24 @@ FtlWrite:
 	mov	w1, 1
 	add	x0, x29, 208
 	bl	FlashReadPages
-.LVL2058:
+.LVL2060:
 	.loc 3 1091 0
 	ldr	w0, [x29, 208]
 	cmn	w0, #1
-	bne	.L1539
+	bne	.L1540
 	.loc 3 1092 0
 	adrp	x0, .LANCHOR83
 	add	x0, x0, :lo12:.LANCHOR83
 	ldr	w1, [x0, 72]
 	add	w1, w1, 1
 	str	w1, [x0, 72]
-.L1542:
+.L1543:
 	ldr	w0, [x29, 172]
-.LBE294:
+.LBE298:
 	.loc 3 1104 0
 	cmp	w20, w21
 	lsl	w2, w0, 9
-	bne	.L1543
+	bne	.L1544
 	.loc 3 1105 0
 	ldr	x1, [x28, #:lo12:.LANCHOR122]
 	ldr	w0, [x29, 164]
@@ -19961,15 +19981,15 @@ FtlWrite:
 	mov	x1, x26
 	add	x0, x4, x0
 	bl	ftl_memcpy
-.LVL2059:
+.LVL2061:
 	.loc 3 1109 0
 	ldr	w0, [x29, 168]
 	cmp	w20, w0
-	bne	.L1535
-.L1544:
+	bne	.L1536
+.L1545:
 	.loc 3 1110 0
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1535
+	cbz	w0, .L1536
 	.loc 3 1111 0
 	ldr	x0, [x28, #:lo12:.LANCHOR122]
 	add	x23, x0, x23
@@ -19978,18 +19998,18 @@ FtlWrite:
 	.loc 3 1112 0
 	adrp	x0, .LANCHOR171
 	str	x19, [x0, #:lo12:.LANCHOR171]
-	b	.L1535
-.L1536:
+	b	.L1536
+.L1537:
 	.loc 3 1082 0
 	adrp	x1, .LANCHOR114
 	ldr	x1, [x1, #:lo12:.LANCHOR114]
-	b	.L1577
-.L1539:
-.LBB295:
+	b	.L1578
+.L1540:
+.LBB299:
 	.loc 3 1094 0
 	ldr	w1, [x27, 8]
 	cmp	w20, w1
-	beq	.L1541
+	beq	.L1542
 	.loc 3 1095 0
 	adrp	x0, .LANCHOR83
 	add	x0, x0, :lo12:.LANCHOR83
@@ -20001,12 +20021,12 @@ FtlWrite:
 	mov	w2, w20
 	add	x0, x0, :lo12:.LC105
 	bl	printf
-.LVL2060:
-.L1541:
+.LVL2062:
+.L1542:
 	.loc 3 1098 0
 	ldr	w0, [x27, 8]
 	cmp	w20, w0
-	beq	.L1542
+	beq	.L1543
 	.loc 3 1098 0 is_stmt 0 discriminator 1
 	mov	w2, 1098
 	adrp	x1, .LANCHOR180
@@ -20014,11 +20034,11 @@ FtlWrite:
 	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2061:
-	b	.L1542
-.LVL2062:
-.L1538:
-.LBE295:
+.LVL2063:
+	b	.L1543
+.LVL2064:
+.L1539:
+.LBE299:
 	.loc 3 1101 0 is_stmt 1
 	ldr	x0, [x28, #:lo12:.LANCHOR122]
 	adrp	x1, .LANCHOR23
@@ -20027,9 +20047,9 @@ FtlWrite:
 	mov	w1, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-.LVL2063:
-	b	.L1542
-.L1543:
+.LVL2065:
+	b	.L1543
+.L1544:
 	.loc 3 1107 0
 	ldr	x0, [x29, 176]
 	ldrh	w1, [x0, #:lo12:.LANCHOR12]
@@ -20041,19 +20061,19 @@ FtlWrite:
 	lsl	w1, w1, 9
 	add	x1, x26, x1
 	bl	ftl_memcpy
-.LVL2064:
-	b	.L1544
-.LVL2065:
-.L1530:
+.LVL2066:
+	b	.L1545
+.LVL2067:
+.L1531:
 	.loc 3 1117 0
 	adrp	x0, .LANCHOR122
 	ldr	x0, [x0, #:lo12:.LANCHOR122]
 	add	x23, x0, x23
 	ldr	x0, [x29, 176]
 	ldrh	w0, [x0, #:lo12:.LANCHOR12]
-	b	.L1578
-.LVL2066:
-.L1550:
+	b	.L1579
+.LVL2068:
+.L1551:
 	.loc 3 1133 0
 	adrp	x0, .LANCHOR122
 	mov	x3, x19
@@ -20061,10 +20081,10 @@ FtlWrite:
 	mov	w1, w27
 	ldr	x0, [x0, #:lo12:.LANCHOR122]
 	bl	FtlProgPages
-.LVL2067:
+.LVL2069:
 	.loc 3 1134 0
 	cmp	w24, w27
-	bcs	.L1553
+	bcs	.L1554
 	.loc 3 1134 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR180
 	adrp	x0, .LC1
@@ -20072,17 +20092,17 @@ FtlWrite:
 	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2068:
-.L1553:
+.LVL2070:
+.L1554:
 	.loc 3 1135 0 is_stmt 1
 	sub	w24, w24, w27
-.LVL2069:
-	b	.L1521
-.LVL2070:
-.L1557:
+.LVL2071:
+	b	.L1522
+.LVL2072:
+.L1558:
 	.loc 3 975 0
 	mov	w0, -1
-	b	.L1514
+	b	.L1515
 	.cfi_endproc
 .LFE217:
 	.size	FtlWrite, .-FtlWrite
@@ -20092,19 +20112,19 @@ FtlWrite:
 	.type	sftl_write, %function
 sftl_write:
 .LFB220:
-	.loc 3 1210 0
+	.loc 3 1209 0
 	.cfi_startproc
-.LVL2071:
-	.loc 3 1211 0
+.LVL2073:
+	.loc 3 1210 0
 	mov	x3, x2
 	mov	w2, w1
-.LVL2072:
+.LVL2074:
 	mov	w1, w0
-.LVL2073:
+.LVL2075:
 	mov	w0, 0
-.LVL2074:
+.LVL2076:
 	b	FtlWrite
-.LVL2075:
+.LVL2077:
 	.cfi_endproc
 .LFE220:
 	.size	sftl_write, .-sftl_write
@@ -20170,16 +20190,16 @@ FtlLoadSysInfo:
 	ldrh	w2, [x24, #:lo12:.LANCHOR5]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL2076:
+.LVL2078:
 	.loc 2 1369 0
 	ldrh	w0, [x20, #:lo12:.LANCHOR81]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L1581
-.L1589:
+	bne	.L1582
+.L1590:
 	.loc 2 1370 0
 	mov	w0, -1
-.L1580:
+.L1581:
 	.loc 2 1463 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -20202,15 +20222,15 @@ FtlLoadSysInfo:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.L1581:
+.L1582:
 	.cfi_restore_state
 	add	x27, x20, :lo12:.LANCHOR81
 	.loc 2 1372 0
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
-.LVL2077:
+.LVL2079:
 	sxth	w22, w0
-.LVL2078:
+.LVL2080:
 	.loc 2 1373 0
 	add	w0, w0, 1
 	.loc 2 1382 0
@@ -20220,9 +20240,9 @@ FtlLoadSysInfo:
 	.loc 2 1381 0
 	mov	w27, 19539
 	movk	w27, 0x4654, lsl 16
-.L1583:
+.L1584:
 	.loc 2 1375 0
-	tbz	w22, #31, .L1586
+	tbz	w22, #31, .L1587
 	.loc 2 1388 0
 	adrp	x1, .LANCHOR181
 	adrp	x0, .LC1
@@ -20230,15 +20250,15 @@ FtlLoadSysInfo:
 	add	x1, x1, :lo12:.LANCHOR181
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2079:
-.L1585:
+.LVL2081:
+.L1586:
 	.loc 2 1390 0
 	adrp	x1, .LANCHOR23
 	ldrh	w0, [x24, #:lo12:.LANCHOR5]
 	ldrh	w1, [x1, #:lo12:.LANCHOR23]
 	add	x0, x0, 24
 	cmp	x1, x0, lsl 1
-	bcs	.L1588
+	bcs	.L1589
 	.loc 2 1390 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR181
 	adrp	x0, .LC1
@@ -20246,18 +20266,18 @@ FtlLoadSysInfo:
 	add	x1, x1, :lo12:.LANCHOR181
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2080:
-.L1588:
+.LVL2082:
+.L1589:
 	.loc 2 1392 0 is_stmt 1
 	add	x22, x19, :lo12:.LANCHOR108
-.LVL2081:
+.LVL2083:
 	adrp	x19, .LANCHOR79
 	add	x21, x19, :lo12:.LANCHOR79
 	mov	w2, 48
 	mov	x0, x21
 	ldr	x1, [x22, 8]
 	bl	ftl_memcpy
-.LVL2082:
+.LVL2084:
 	.loc 2 1393 0
 	ldr	x0, [x25, #:lo12:.LANCHOR43]
 	ldrh	w2, [x24, #:lo12:.LANCHOR5]
@@ -20265,7 +20285,7 @@ FtlLoadSysInfo:
 	lsl	w2, w2, 1
 	add	x1, x1, 48
 	bl	ftl_memcpy
-.LVL2083:
+.LVL2085:
 	.loc 2 1394 0
 	ldrh	w1, [x24, #:lo12:.LANCHOR5]
 	ldr	x0, [x22, 8]
@@ -20278,13 +20298,13 @@ FtlLoadSysInfo:
 	adrp	x0, .LANCHOR1
 	ldr	x0, [x0, #:lo12:.LANCHOR1]
 	bl	ftl_memcpy
-.LVL2084:
+.LVL2086:
 	.loc 2 1396 0
 	ldr	w1, [x19, #:lo12:.LANCHOR79]
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1589
+	bne	.L1590
 	.loc 2 1399 0
 	add	x20, x20, :lo12:.LANCHOR81
 	.loc 2 1400 0
@@ -20298,7 +20318,7 @@ FtlLoadSysInfo:
 	strh	w1, [x20, 6]
 	.loc 2 1400 0
 	cmp	w2, w0
-	bne	.L1589
+	bne	.L1590
 	.loc 2 1403 0
 	adrp	x0, .LANCHOR182
 	.loc 2 1404 0
@@ -20335,7 +20355,7 @@ FtlLoadSysInfo:
 	adrp	x3, .LANCHOR80
 	strh	w0, [x3, #:lo12:.LANCHOR80]
 	.loc 2 1412 0
-	bls	.L1590
+	bls	.L1591
 	.loc 2 1412 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR181
 	adrp	x0, .LC1
@@ -20343,8 +20363,8 @@ FtlLoadSysInfo:
 	add	x1, x1, :lo12:.LANCHOR181
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2085:
-.L1590:
+.LVL2087:
+.L1591:
 	.loc 2 1414 0 is_stmt 1
 	add	x1, x19, :lo12:.LANCHOR79
 	adrp	x0, .LANCHOR51
@@ -20444,64 +20464,64 @@ FtlLoadSysInfo:
 	adrp	x1, .LANCHOR71
 	ldr	w5, [x1, #:lo12:.LANCHOR71]
 	cmp	w3, w5
-	bls	.L1591
+	bls	.L1592
 	.loc 2 1445 0
 	str	w3, [x1, #:lo12:.LANCHOR71]
-.L1591:
+.L1592:
 	.loc 2 1447 0
 	add	x19, x19, :lo12:.LANCHOR79
 	adrp	x1, .LANCHOR72
 	ldr	w3, [x1, #:lo12:.LANCHOR72]
 	ldr	w2, [x19, 36]
 	cmp	w2, w3
-	bls	.L1592
+	bls	.L1593
 	.loc 2 1448 0
 	str	w2, [x1, #:lo12:.LANCHOR72]
-.L1592:
+.L1593:
 	.loc 2 1450 0
 	mov	w1, 65535
 	cmp	w6, w1
-	beq	.L1593
+	beq	.L1594
 	.loc 2 1451 0
 	add	x0, x0, :lo12:.LANCHOR51
 	bl	make_superblock
-.LVL2086:
-.L1593:
+.LVL2088:
+.L1594:
 	.loc 2 1453 0
 	ldrh	w2, [x21, #:lo12:.LANCHOR52]
 	mov	w1, 65535
 	add	x0, x21, :lo12:.LANCHOR52
 	cmp	w2, w1
-	beq	.L1594
+	beq	.L1595
 	.loc 2 1454 0
 	bl	make_superblock
-.LVL2087:
-.L1594:
+.LVL2089:
+.L1595:
 	.loc 2 1456 0
 	ldrh	w2, [x22, #:lo12:.LANCHOR53]
 	mov	w1, 65535
 	add	x0, x22, :lo12:.LANCHOR53
 	cmp	w2, w1
-	beq	.L1595
+	beq	.L1596
 	.loc 2 1457 0
 	bl	make_superblock
-.LVL2088:
-.L1595:
+.LVL2090:
+.L1596:
 	.loc 2 1459 0
 	ldrh	w2, [x20, #:lo12:.LANCHOR82]
 	mov	w1, 65535
 	add	x0, x20, :lo12:.LANCHOR82
 	cmp	w2, w1
-	beq	.L1596
+	beq	.L1597
 	.loc 2 1460 0
 	bl	make_superblock
-.LVL2089:
-.L1596:
+.LVL2091:
+.L1597:
 	.loc 2 1462 0
 	mov	w0, 0
-	b	.L1580
-.LVL2090:
-.L1586:
+	b	.L1581
+.LVL2092:
+.L1587:
 	.loc 2 1376 0
 	ldrh	w0, [x20, #:lo12:.LANCHOR81]
 	.loc 2 1378 0
@@ -20516,29 +20536,29 @@ FtlLoadSysInfo:
 	.loc 2 1378 0
 	mov	x0, x21
 	bl	FlashReadPages
-.LVL2091:
+.LVL2093:
 	.loc 2 1381 0
 	ldr	w0, [x21]
 	cmn	w0, #1
-	beq	.L1584
+	beq	.L1585
 	.loc 2 1382 0 discriminator 1
 	ldr	x0, [x23, #:lo12:.LANCHOR39]
 	.loc 2 1381 0 discriminator 1
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L1584
+	bne	.L1585
 	.loc 2 1383 0
 	ldr	x0, [x26, #:lo12:.LANCHOR109]
 	ldrh	w0, [x0]
 	.loc 2 1382 0
 	cmp	w0, w28
-	beq	.L1585
-.L1584:
+	beq	.L1586
+.L1585:
 	sub	w22, w22, #1
-.LVL2092:
+.LVL2094:
 	sxth	w22, w22
-.LVL2093:
-	b	.L1583
+.LVL2095:
+	b	.L1584
 	.cfi_endproc
 .LFE274:
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
@@ -20578,20 +20598,20 @@ FtlSysBlkInit:
 	strh	wzr, [x20, #:lo12:.LANCHOR162]
 	.loc 2 2312 0
 	bl	FtlFreeSysBlkQueueInit
-.LVL2094:
+.LVL2096:
 	.loc 2 2313 0
 	bl	FtlScanSysBlk
-.LVL2095:
+.LVL2097:
 	.loc 2 2314 0
 	adrp	x0, .LANCHOR81
 	ldrh	w1, [x0, #:lo12:.LANCHOR81]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1603
-.L1605:
+	bne	.L1604
+.L1606:
 	.loc 2 2315 0
 	mov	w23, -1
-.L1602:
+.L1603:
 	.loc 2 2398 0
 	mov	w0, w23
 	ldp	x19, x20, [sp, 16]
@@ -20609,40 +20629,40 @@ FtlSysBlkInit:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.L1603:
+.L1604:
 	.cfi_restore_state
 	.loc 2 2317 0
 	bl	FtlLoadSysInfo
-.LVL2096:
+.LVL2098:
 	mov	w23, w0
-	cbnz	w0, .L1605
+	cbnz	w0, .L1606
 	.loc 2 2320 0
 	bl	FtlLoadMapInfo
-.LVL2097:
+.LVL2099:
 	.loc 2 2321 0
 	bl	FtlLoadVonderInfo
-.LVL2098:
+.LVL2100:
 	.loc 2 2322 0
 	bl	Ftl_load_ext_data
-.LVL2099:
+.LVL2101:
 	.loc 2 2324 0
 	bl	FtlLoadEctTbl
-.LVL2100:
+.LVL2102:
 	.loc 2 2325 0
 	bl	FtlFreeSysBLkSort
-.LVL2101:
+.LVL2103:
 	.loc 2 2327 0
 	bl	SupperBlkListInit
-.LVL2102:
+.LVL2104:
 	.loc 2 2328 0
 	bl	FtlPowerLostRecovery
-.LVL2103:
+.LVL2105:
 	.loc 2 2330 0
 	mov	w0, 1
 	bl	FtlUpdateVaildLpn
-.LVL2104:
-.LBB299:
-.LBB300:
+.LVL2106:
+.LBB303:
+.LBB304:
 	.loc 2 2332 0
 	adrp	x0, .LANCHOR33
 	ldrh	w2, [x0, #:lo12:.LANCHOR33]
@@ -20652,14 +20672,14 @@ FtlSysBlkInit:
 	.loc 2 2332 0
 	mov	w0, 0
 	add	x1, x1, 4
-.L1606:
-.LVL2105:
+.L1607:
+.LVL2107:
 	cmp	w0, w2
-	bge	.L1611
+	bge	.L1612
 	.loc 2 2333 0
 	ldr	w3, [x1], 16
-	tbz	w3, #31, .L1607
-.L1611:
+	tbz	w3, #31, .L1608
+.L1612:
 	.loc 2 2336 0
 	adrp	x19, .LANCHOR79
 	add	x3, x19, :lo12:.LANCHOR79
@@ -20671,9 +20691,9 @@ FtlSysBlkInit:
 	add	w1, w1, 1
 	strh	w1, [x3, 28]
 	.loc 2 2338 0
-	bge	.L1617
-.LVL2106:
-.L1608:
+	bge	.L1618
+.LVL2108:
+.L1609:
 	.loc 2 2339 0
 	add	x21, x22, :lo12:.LANCHOR51
 	.loc 2 2340 0
@@ -20684,12 +20704,12 @@ FtlSysBlkInit:
 	add	x20, x24, :lo12:.LANCHOR52
 	.loc 2 2339 0
 	bl	FtlSuperblockPowerLostFix
-.LVL2107:
+.LVL2109:
 	.loc 2 2340 0
 	mov	x0, x20
 	bl	FtlSuperblockPowerLostFix
-.LVL2108:
-.LBB301:
+.LVL2110:
+.LBB305:
 	.loc 2 2346 0
 	adrp	x0, .LANCHOR43
 	ldrh	w3, [x21, 4]
@@ -20711,7 +20731,7 @@ FtlSysBlkInit:
 	ldrh	w0, [x24, #:lo12:.LANCHOR52]
 	.loc 2 2349 0
 	strh	wzr, [x21, 4]
-.LVL2109:
+.LVL2111:
 	.loc 2 2352 0
 	ldrh	w4, [x20, 4]
 	lsl	x0, x0, 1
@@ -20725,17 +20745,17 @@ FtlSysBlkInit:
 	strh	w0, [x20, 2]
 	.loc 2 2355 0
 	strh	wzr, [x20, 4]
-.LBE301:
+.LBE305:
 	.loc 2 2359 0
 	adrp	x0, .LANCHOR144
 	add	x0, x0, :lo12:.LANCHOR144
 	bl	FtlMapBlkWriteDump_data
-.LVL2110:
+.LVL2112:
 	.loc 2 2360 0
 	adrp	x0, .LANCHOR149
 	add	x0, x0, :lo12:.LANCHOR149
 	bl	FtlMapBlkWriteDump_data
-.LVL2111:
+.LVL2113:
 	.loc 2 2372 0
 	add	x1, x19, :lo12:.LANCHOR79
 	ldrh	w0, [x1, 30]
@@ -20743,67 +20763,67 @@ FtlSysBlkInit:
 	strh	w0, [x1, 30]
 	.loc 2 2373 0
 	bl	l2p_flush
-.LVL2112:
+.LVL2114:
 	.loc 2 2374 0
 	bl	FtlVpcTblFlush
-.LVL2113:
+.LVL2115:
 	.loc 2 2375 0
 	bl	FtlVpcTblFlush
-.LVL2114:
-	b	.L1612
-.LVL2115:
-.L1607:
+.LVL2116:
+	b	.L1613
+.LVL2117:
+.L1608:
 	.loc 2 2332 0
 	add	w0, w0, 1
-.LVL2116:
-	b	.L1606
-.L1617:
+.LVL2118:
+	b	.L1607
+.L1618:
 	.loc 2 2338 0
 	ldrh	w0, [x20, #:lo12:.LANCHOR162]
-.LVL2117:
-	cbnz	w0, .L1608
-.L1612:
+.LVL2119:
+	cbnz	w0, .L1609
+.L1613:
 	.loc 2 2379 0
 	ldrh	w0, [x22, #:lo12:.LANCHOR51]
 	mov	w1, 65535
 	add	x21, x22, :lo12:.LANCHOR51
 	cmp	w0, w1
-	beq	.L1613
+	beq	.L1614
 	ldrh	w1, [x21, 4]
-	cbnz	w1, .L1613
+	cbnz	w1, .L1614
 	.loc 2 2381 0
 	adrp	x22, .LANCHOR52
 	add	x20, x22, :lo12:.LANCHOR52
 	.loc 2 2380 0
 	ldrh	w1, [x20, 4]
-	cbnz	w1, .L1613
+	cbnz	w1, .L1614
 	.loc 2 2382 0
 	bl	FtlGcRefreshBlock
-.LVL2118:
+.LVL2120:
 	.loc 2 2383 0
 	ldrh	w0, [x22, #:lo12:.LANCHOR52]
 	bl	FtlGcRefreshBlock
-.LVL2119:
+.LVL2121:
 	.loc 2 2384 0
 	mov	x0, x21
 	bl	allocate_new_data_superblock
-.LVL2120:
+.LVL2122:
 	.loc 2 2385 0
 	mov	x0, x20
 	bl	allocate_new_data_superblock
-.LVL2121:
-.L1613:
+.LVL2123:
+.L1614:
 	.loc 2 2390 0
 	add	x19, x19, :lo12:.LANCHOR79
 	ldrh	w0, [x19, 28]
 	tst	x0, 31
-	bne	.L1602
+	bne	.L1603
 	.loc 2 2391 0
 	bl	FtlVpcCheckAndModify
-.LVL2122:
-	b	.L1602
-.LBE300:
-.LBE299:
+.LVL2124:
+	b	.L1603
+.LBE304:
+.LBE303:
 	.cfi_endproc
 .LFE292:
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
@@ -20850,15 +20870,15 @@ ftl_low_format:
 	str	wzr, [x20, #:lo12:.LANCHOR71]
 	.loc 3 631 0
 	bl	FtlFreeSysBlkQueueInit
-.LVL2123:
+.LVL2125:
 	.loc 3 632 0
 	bl	FtlLoadBbt
-.LVL2124:
-	cbz	w0, .L1620
+.LVL2126:
+	cbz	w0, .L1621
 	.loc 3 633 0
 	bl	FtlMakeBbt
-.LVL2125:
-.L1620:
+.LVL2127:
+.L1621:
 	.loc 3 635 0 discriminator 1
 	adrp	x23, .LANCHOR12
 	.loc 3 636 0 discriminator 1
@@ -20878,12 +20898,12 @@ ftl_low_format:
 	.loc 3 637 0 discriminator 1
 	ldr	x5, [x0, #:lo12:.LANCHOR114]
 	mov	w0, 0
-.L1621:
-.LVL2126:
+.L1622:
+.LVL2128:
 	.loc 3 635 0 discriminator 1
 	cmp	w0, w1
-	blt	.L1622
-.LVL2127:
+	blt	.L1623
+.LVL2129:
 	.loc 3 642 0
 	adrp	x21, .LANCHOR5
 	adrp	x22, .LANCHOR6
@@ -20892,32 +20912,32 @@ ftl_low_format:
 	mov	w19, 0
 	.loc 3 642 0
 	ldrh	w25, [x21, #:lo12:.LANCHOR5]
-.LVL2128:
-.L1623:
+.LVL2130:
+.L1624:
 	.loc 3 642 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x26]
 	cmp	w0, w25
-	bhi	.L1624
+	bhi	.L1625
 	.loc 3 645 0 is_stmt 1
 	adrp	x25, .LANCHOR3
-.LVL2129:
+.LVL2131:
 	sub	w1, w19, #2
 	ldrh	w0, [x25, #:lo12:.LANCHOR3]
 	cmp	w1, w0, lsl 1
-	bgt	.L1625
-.LVL2130:
-.L1629:
+	bgt	.L1626
+.LVL2132:
+.L1630:
 	.loc 3 656 0
 	add	x26, x21, :lo12:.LANCHOR5
 	.loc 3 641 0
 	mov	w19, 0
 	mov	w24, 0
-.L1626:
-.LVL2131:
+.L1627:
+.LVL2133:
 	.loc 3 656 0 discriminator 1
 	ldrh	w0, [x26]
 	cmp	w0, w24
-	bhi	.L1630
+	bhi	.L1631
 	.loc 3 658 0
 	adrp	x0, .LANCHOR113
 	ldrh	w1, [x22, #:lo12:.LANCHOR6]
@@ -20943,7 +20963,7 @@ ftl_low_format:
 	mov	w6, 24
 	mul	w6, w4, w6
 	cmp	w19, w6
-	ble	.L1631
+	ble	.L1632
 	.loc 3 664 0
 	sub	w1, w1, w19
 	udiv	w1, w1, w4
@@ -20952,11 +20972,11 @@ ftl_low_format:
 	lsr	w1, w1, 5
 	add	w1, w1, 24
 	strh	w1, [x2, #:lo12:.LANCHOR80]
-.L1631:
+.L1632:
 	.loc 3 668 0
 	adrp	x1, .LANCHOR15
 	ldrh	w1, [x1, #:lo12:.LANCHOR15]
-	cbz	w1, .L1633
+	cbz	w1, .L1634
 	.loc 3 669 0
 	ldrh	w6, [x2, #:lo12:.LANCHOR80]
 	add	w6, w6, w1, lsr 1
@@ -20964,7 +20984,7 @@ ftl_low_format:
 	.loc 3 670 0
 	mul	w6, w1, w4
 	cmp	w19, w6
-	bge	.L1633
+	bge	.L1634
 	.loc 3 672 0
 	add	w1, w1, 32
 	.loc 3 671 0
@@ -20972,14 +20992,14 @@ ftl_low_format:
 	.loc 3 672 0
 	add	w1, w0, w1
 	strh	w1, [x2, #:lo12:.LANCHOR80]
-.L1633:
+.L1634:
 	.loc 3 677 0
 	ldrh	w1, [x2, #:lo12:.LANCHOR80]
 	adrp	x25, .LANCHOR182
 	ldr	w0, [x3, #:lo12:.LANCHOR62]
 	.loc 3 687 0
 	adrp	x24, .LANCHOR43
-.LVL2132:
+.LVL2134:
 	.loc 3 677 0
 	sub	w0, w0, w1
 	.loc 3 678 0
@@ -21002,14 +21022,14 @@ ftl_low_format:
 	str	w0, [x1, #:lo12:.LANCHOR34]
 	.loc 3 684 0
 	bl	FtlBbmTblFlush
-.LVL2133:
+.LVL2135:
 	.loc 3 687 0
 	ldr	x0, [x24, #:lo12:.LANCHOR43]
 	mov	w1, 0
 	ldrh	w2, [x22, #:lo12:.LANCHOR6]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL2134:
+.LVL2136:
 	.loc 3 688 0
 	adrp	x0, .LANCHOR60
 	.loc 3 689 0
@@ -21033,7 +21053,7 @@ ftl_low_format:
 	.loc 3 694 0
 	adrp	x0, .LANCHOR51
 	add	x19, x0, :lo12:.LANCHOR51
-.LVL2135:
+.LVL2137:
 	.loc 3 696 0
 	strh	wzr, [x0, #:lo12:.LANCHOR51]
 	.loc 3 697 0
@@ -21049,16 +21069,16 @@ ftl_low_format:
 	strb	wzr, [x19, 6]
 	.loc 3 698 0
 	bl	ftl_memset
-.LVL2136:
-.L1635:
+.LVL2138:
+.L1636:
 	.loc 3 701 0
 	mov	x0, x19
 	bl	make_superblock
-.LVL2137:
+.LVL2139:
 	.loc 3 702 0
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1636
+	cbnz	w1, .L1637
 	.loc 3 705 0
 	ldr	x1, [x24, #:lo12:.LANCHOR43]
 	ubfiz	x0, x0, 1, 16
@@ -21068,101 +21088,101 @@ ftl_low_format:
 	add	w0, w0, 1
 	strh	w0, [x19]
 	.loc 3 707 0
-	b	.L1635
-.LVL2138:
-.L1622:
+	b	.L1636
+.LVL2140:
+.L1623:
 	.loc 3 636 0 discriminator 3
 	ubfiz	x3, x0, 2, 16
 	mvn	w2, w0
 	orr	w2, w0, w2, lsl 16
 	.loc 3 635 0 discriminator 3
 	add	w0, w0, 1
-.LVL2139:
+.LVL2141:
 	and	w0, w0, 65535
-.LVL2140:
+.LVL2142:
 	.loc 3 636 0 discriminator 3
 	str	w2, [x4, x3]
 	.loc 3 637 0 discriminator 3
 	str	w6, [x5, x3]
-	b	.L1621
-.LVL2141:
-.L1624:
+	b	.L1622
+.LVL2143:
+.L1625:
 	.loc 3 643 0 discriminator 3
 	mov	w0, w25
 	mov	w1, 1
 	.loc 3 642 0 discriminator 3
 	add	w25, w25, 1
-.LVL2142:
+.LVL2144:
 	.loc 3 643 0 discriminator 3
 	bl	FtlLowFormatEraseBlock
-.LVL2143:
+.LVL2145:
 	add	w19, w19, w0
-.LVL2144:
+.LVL2146:
 	.loc 3 642 0 discriminator 3
 	and	w25, w25, 65535
 	.loc 3 643 0 discriminator 3
 	and	w19, w19, 65535
-.LVL2145:
-	b	.L1623
-.LVL2146:
-.L1625:
+.LVL2147:
+	b	.L1624
+.LVL2148:
+.L1626:
 	.loc 3 647 0
 	udiv	w0, w19, w0
 	adrp	x1, .LANCHOR31
 	ldr	w19, [x1, #:lo12:.LANCHOR31]
-.LVL2147:
+.LVL2149:
 	add	w0, w0, w19
 	bl	FtlSysBlkNumInit
-.LVL2148:
+.LVL2150:
 	.loc 3 648 0
 	ldrh	w0, [x24, #:lo12:.LANCHOR4]
 	.loc 3 650 0
 	add	x24, x22, :lo12:.LANCHOR6
 	.loc 3 648 0
 	bl	FtlFreeSysBlkQueueInit
-.LVL2149:
+.LVL2151:
 	.loc 3 650 0
 	ldrh	w19, [x21, #:lo12:.LANCHOR5]
-.LVL2150:
-.L1627:
+.LVL2152:
+.L1628:
 	.loc 3 650 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x24]
 	cmp	w0, w19
-	bls	.L1629
+	bls	.L1630
 	.loc 3 651 0 is_stmt 1 discriminator 3
 	mov	w0, w19
 	.loc 3 650 0 discriminator 3
 	add	w19, w19, 1
-.LVL2151:
+.LVL2153:
 	.loc 3 651 0 discriminator 3
 	mov	w1, 1
 	.loc 3 650 0 discriminator 3
 	and	w19, w19, 65535
 	.loc 3 651 0 discriminator 3
 	bl	FtlLowFormatEraseBlock
-.LVL2152:
-	b	.L1627
-.LVL2153:
-.L1630:
+.LVL2154:
+	b	.L1628
+.LVL2155:
+.L1631:
 	.loc 3 657 0 discriminator 3
 	mov	w0, w24
 	mov	w1, 0
 	.loc 3 656 0 discriminator 3
 	add	w24, w24, 1
-.LVL2154:
+.LVL2156:
 	.loc 3 657 0 discriminator 3
 	bl	FtlLowFormatEraseBlock
-.LVL2155:
+.LVL2157:
 	add	w19, w19, w0
-.LVL2156:
+.LVL2158:
 	.loc 3 656 0 discriminator 3
 	and	w24, w24, 65535
 	.loc 3 657 0 discriminator 3
 	and	w19, w19, 65535
-.LVL2157:
-	b	.L1626
-.LVL2158:
-.L1636:
+.LVL2159:
+	b	.L1627
+.LVL2160:
+.L1637:
 	.loc 3 709 0
 	ldr	w1, [x20, #:lo12:.LANCHOR71]
 	.loc 3 710 0
@@ -21197,15 +21217,15 @@ ftl_low_format:
 	strb	wzr, [x0, 6]
 	.loc 3 715 0
 	strb	w1, [x0, 8]
-.L1637:
+.L1638:
 	.loc 3 717 0
 	mov	x0, x19
 	bl	make_superblock
-.LVL2159:
+.LVL2161:
 	.loc 3 718 0
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1638
+	cbnz	w1, .L1639
 	.loc 3 721 0
 	ldr	x1, [x24, #:lo12:.LANCHOR43]
 	ubfiz	x0, x0, 1, 16
@@ -21215,8 +21235,8 @@ ftl_low_format:
 	add	w0, w0, 1
 	strh	w0, [x19]
 	.loc 3 723 0
-	b	.L1637
-.L1638:
+	b	.L1638
+.L1639:
 	.loc 3 725 0
 	ldr	w1, [x20, #:lo12:.LANCHOR71]
 	.loc 3 726 0
@@ -21237,7 +21257,7 @@ ftl_low_format:
 	strh	w4, [x0, #:lo12:.LANCHOR53]
 	.loc 3 730 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL2160:
+.LVL2162:
 	adrp	x2, .LANCHOR81
 	add	x1, x2, :lo12:.LANCHOR81
 	strh	w0, [x2, #:lo12:.LANCHOR81]
@@ -21256,16 +21276,16 @@ ftl_low_format:
 	str	w0, [x20, #:lo12:.LANCHOR71]
 	.loc 3 735 0
 	bl	FtlVpcTblFlush
-.LVL2161:
+.LVL2163:
 	.loc 3 736 0
 	bl	FtlSysBlkInit
-.LVL2162:
-	cbnz	w0, .L1639
+.LVL2164:
+	cbnz	w0, .L1640
 	.loc 3 737 0
 	adrp	x0, .LANCHOR88
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR88]
-.L1639:
+.L1640:
 	.loc 3 739 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
@@ -21296,7 +21316,7 @@ sftl_init:
 .LFB211:
 	.loc 3 743 0
 	.cfi_startproc
-.LVL2163:
+.LVL2165:
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
@@ -21318,32 +21338,32 @@ sftl_init:
 	adrp	x0, .LC71
 	add	x0, x0, :lo12:.LC71
 	bl	printf
-.LVL2164:
+.LVL2166:
 	.loc 3 750 0
 	adrp	x0, .LANCHOR0
 	add	x0, x0, :lo12:.LANCHOR0
 	bl	FtlConstantsInit
-.LVL2165:
+.LVL2167:
 	.loc 3 751 0
 	bl	FtlMemInit
-.LVL2166:
+.LVL2168:
 	.loc 3 752 0
 	bl	FtlVariablesInit
-.LVL2167:
+.LVL2169:
 	.loc 3 753 0
 	adrp	x0, .LANCHOR4
 	ldrh	w0, [x0, #:lo12:.LANCHOR4]
 	bl	FtlFreeSysBlkQueueInit
-.LVL2168:
+.LVL2170:
 .LDL2:
 	.loc 3 756 0
 	bl	FtlLoadBbt
-.LVL2169:
-	cbnz	w0, .L1648
+.LVL2171:
+	cbnz	w0, .L1649
 	.loc 3 767 0
 	bl	FtlSysBlkInit
-.LVL2170:
-	cbnz	w0, .L1648
+.LVL2172:
+	cbnz	w0, .L1649
 	.loc 3 779 0
 	mov	w0, 1
 	str	w0, [x19, #:lo12:.LANCHOR88]
@@ -21351,23 +21371,23 @@ sftl_init:
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 15
-	bhi	.L1648
+	bhi	.L1649
 	mov	w19, 8129
-.L1647:
-.LVL2171:
-.LBB302:
+.L1648:
+.LVL2173:
+.LBB306:
 	.loc 3 786 0 discriminator 3
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-.LVL2172:
+.LVL2174:
 	.loc 3 785 0 discriminator 3
 	subs	w19, w19, #1
-.LVL2173:
-	bne	.L1647
-.LVL2174:
-.L1648:
-.LBE302:
+.LVL2175:
+	bne	.L1648
+.LVL2176:
+.L1649:
+.LBE306:
 	.loc 3 794 0
 	mov	w0, 0
 	ldr	x19, [sp, 16]
@@ -21385,16 +21405,16 @@ sftl_init:
 	.global	ftl_memcmp
 	.type	ftl_memcmp, %function
 ftl_memcmp:
-.LFB347:
-	.loc 1 248 0
+.LFB348:
+	.loc 1 252 0
 	.cfi_startproc
-.LVL2175:
-	.loc 1 249 0
+.LVL2177:
+	.loc 1 253 0
 	uxtw	x2, w2
 	b	memcmp
-.LVL2176:
+.LVL2178:
 	.cfi_endproc
-.LFE347:
+.LFE348:
 	.size	ftl_memcmp, .-ftl_memcmp
 	.global	ftl_temp_buf
 	.global	g_nand_ops
@@ -22800,243 +22820,243 @@ power_up_flag:
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",@progbits,1
 .LC1:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
-	.section	.rodata.__func__.6105,"a",@progbits
+	.section	.rodata.__func__.6104,"a",@progbits
 	.align	3
 	.set	.LANCHOR138,. + 0
-	.type	__func__.6105, %object
-	.size	__func__.6105, 11
-__func__.6105:
+	.type	__func__.6104, %object
+	.size	__func__.6104, 11
+__func__.6104:
 	.string	"FtlMemInit"
-	.section	.rodata.__func__.6229,"a",@progbits
+	.section	.rodata.__func__.6228,"a",@progbits
 	.align	3
 	.set	.LANCHOR170,. + 0
-	.type	__func__.6229, %object
-	.size	__func__.6229, 13
-__func__.6229:
+	.type	__func__.6228, %object
+	.size	__func__.6228, 13
+__func__.6228:
 	.string	"FtlProgPages"
-	.section	.rodata.__func__.6257,"a",@progbits
+	.section	.rodata.__func__.6256,"a",@progbits
 	.align	3
 	.set	.LANCHOR180,. + 0
-	.type	__func__.6257, %object
-	.size	__func__.6257, 9
-__func__.6257:
+	.type	__func__.6256, %object
+	.size	__func__.6256, 9
+__func__.6256:
 	.string	"FtlWrite"
-	.section	.rodata.__func__.6321,"a",@progbits
+	.section	.rodata.__func__.6320,"a",@progbits
 	.align	3
 	.set	.LANCHOR139,. + 0
-	.type	__func__.6321, %object
-	.size	__func__.6321, 14
-__func__.6321:
+	.type	__func__.6320, %object
+	.size	__func__.6320, 14
+__func__.6320:
 	.string	"FtlBbt2Bitmap"
-	.section	.rodata.__func__.6364,"a",@progbits
+	.section	.rodata.__func__.6363,"a",@progbits
 	.align	3
 	.set	.LANCHOR165,. + 0
-	.type	__func__.6364, %object
-	.size	__func__.6364, 11
-__func__.6364:
+	.type	__func__.6363, %object
+	.size	__func__.6363, 11
+__func__.6363:
 	.string	"FtlLoadBbt"
-	.section	.rodata.__func__.6487,"a",@progbits
+	.section	.rodata.__func__.6486,"a",@progbits
 	.align	3
 	.set	.LANCHOR49,. + 0
-	.type	__func__.6487, %object
-	.size	__func__.6487, 17
-__func__.6487:
+	.type	__func__.6486, %object
+	.size	__func__.6486, 17
+__func__.6486:
 	.string	"INSERT_FREE_LIST"
-	.section	.rodata.__func__.6492,"a",@progbits
+	.section	.rodata.__func__.6491,"a",@progbits
 	.align	3
 	.set	.LANCHOR46,. + 0
-	.type	__func__.6492, %object
-	.size	__func__.6492, 17
-__func__.6492:
+	.type	__func__.6491, %object
+	.size	__func__.6491, 17
+__func__.6491:
 	.string	"INSERT_DATA_LIST"
-	.section	.rodata.__func__.6522,"a",@progbits
+	.section	.rodata.__func__.6521,"a",@progbits
 	.align	3
 	.set	.LANCHOR50,. + 0
-	.type	__func__.6522, %object
-	.size	__func__.6522, 17
-__func__.6522:
+	.type	__func__.6521, %object
+	.size	__func__.6521, 17
+__func__.6521:
 	.string	"List_remove_node"
-	.section	.rodata.__func__.6554,"a",@progbits
+	.section	.rodata.__func__.6553,"a",@progbits
 	.align	3
 	.set	.LANCHOR54,. + 0
-	.type	__func__.6554, %object
-	.size	__func__.6554, 22
-__func__.6554:
+	.type	__func__.6553, %object
+	.size	__func__.6553, 22
+__func__.6553:
 	.string	"List_update_data_list"
-	.section	.rodata.__func__.6563,"a",@progbits
+	.section	.rodata.__func__.6562,"a",@progbits
 	.align	3
 	.set	.LANCHOR140,. + 0
-	.type	__func__.6563, %object
-	.size	__func__.6563, 16
-__func__.6563:
+	.type	__func__.6562, %object
+	.size	__func__.6562, 16
+__func__.6562:
 	.string	"load_l2p_region"
-	.section	.rodata.__func__.6595,"a",@progbits
+	.section	.rodata.__func__.6594,"a",@progbits
 	.align	3
 	.set	.LANCHOR55,. + 0
-	.type	__func__.6595, %object
-	.size	__func__.6595, 26
-__func__.6595:
+	.type	__func__.6594, %object
+	.size	__func__.6594, 26
+__func__.6594:
 	.string	"ftl_map_blk_alloc_new_blk"
-	.section	.rodata.__func__.6606,"a",@progbits
+	.section	.rodata.__func__.6605,"a",@progbits
 	.align	3
 	.set	.LANCHOR143,. + 0
-	.type	__func__.6606, %object
-	.size	__func__.6606, 15
-__func__.6606:
+	.type	__func__.6605, %object
+	.size	__func__.6605, 15
+__func__.6605:
 	.string	"ftl_map_blk_gc"
-	.section	.rodata.__func__.6620,"a",@progbits
+	.section	.rodata.__func__.6619,"a",@progbits
 	.align	3
 	.set	.LANCHOR141,. + 0
-	.type	__func__.6620, %object
-	.size	__func__.6620, 31
-__func__.6620:
+	.type	__func__.6619, %object
+	.size	__func__.6619, 31
+__func__.6619:
 	.string	"Ftl_write_map_blk_to_last_page"
-	.section	.rodata.__func__.6634,"a",@progbits
+	.section	.rodata.__func__.6633,"a",@progbits
 	.align	3
 	.set	.LANCHOR142,. + 0
-	.type	__func__.6634, %object
-	.size	__func__.6634, 16
-__func__.6634:
+	.type	__func__.6633, %object
+	.size	__func__.6633, 16
+__func__.6633:
 	.string	"FtlMapWritePage"
-	.section	.rodata.__func__.6659,"a",@progbits
+	.section	.rodata.__func__.6658,"a",@progbits
 	.align	3
 	.set	.LANCHOR58,. + 0
-	.type	__func__.6659, %object
-	.size	__func__.6659, 22
-__func__.6659:
+	.type	__func__.6658, %object
+	.size	__func__.6658, 22
+__func__.6658:
 	.string	"select_l2p_ram_region"
-	.section	.rodata.__func__.6676,"a",@progbits
+	.section	.rodata.__func__.6675,"a",@progbits
 	.align	3
 	.set	.LANCHOR145,. + 0
-	.type	__func__.6676, %object
-	.size	__func__.6676, 9
-__func__.6676:
+	.type	__func__.6675, %object
+	.size	__func__.6675, 9
+__func__.6675:
 	.string	"log2phys"
-	.section	.rodata.__func__.6749,"a",@progbits
+	.section	.rodata.__func__.6748,"a",@progbits
 	.align	3
 	.set	.LANCHOR167,. + 0
-	.type	__func__.6749, %object
-	.size	__func__.6749, 15
-__func__.6749:
+	.type	__func__.6748, %object
+	.size	__func__.6748, 15
+__func__.6748:
 	.string	"FtlVpcTblFlush"
-	.section	.rodata.__func__.6771,"a",@progbits
+	.section	.rodata.__func__.6770,"a",@progbits
 	.align	3
 	.set	.LANCHOR148,. + 0
-	.type	__func__.6771, %object
-	.size	__func__.6771, 14
-__func__.6771:
+	.type	__func__.6770, %object
+	.size	__func__.6770, 14
+__func__.6770:
 	.string	"FtlScanSysBlk"
-	.section	.rodata.__func__.6828,"a",@progbits
+	.section	.rodata.__func__.6827,"a",@progbits
 	.align	3
 	.set	.LANCHOR181,. + 0
-	.type	__func__.6828, %object
-	.size	__func__.6828, 15
-__func__.6828:
+	.type	__func__.6827, %object
+	.size	__func__.6827, 15
+__func__.6827:
 	.string	"FtlLoadSysInfo"
-	.section	.rodata.__func__.6891,"a",@progbits
+	.section	.rodata.__func__.6890,"a",@progbits
 	.align	3
 	.set	.LANCHOR146,. + 0
-	.type	__func__.6891, %object
-	.size	__func__.6891, 16
-__func__.6891:
+	.type	__func__.6890, %object
+	.size	__func__.6890, 16
+__func__.6890:
 	.string	"FtlReUsePrevPpa"
-	.section	.rodata.__func__.6925,"a",@progbits
+	.section	.rodata.__func__.6924,"a",@progbits
 	.align	3
 	.set	.LANCHOR161,. + 0
-	.type	__func__.6925, %object
-	.size	__func__.6925, 22
-__func__.6925:
+	.type	__func__.6924, %object
+	.size	__func__.6924, 22
+__func__.6924:
 	.string	"FtlRecoverySuperblock"
-	.section	.rodata.__func__.6982,"a",@progbits
+	.section	.rodata.__func__.6981,"a",@progbits
 	.align	3
 	.set	.LANCHOR61,. + 0
-	.type	__func__.6982, %object
-	.size	__func__.6982, 16
-__func__.6982:
+	.type	__func__.6981, %object
+	.size	__func__.6981, 16
+__func__.6981:
 	.string	"make_superblock"
-	.section	.rodata.__func__.7003,"a",@progbits
+	.section	.rodata.__func__.7002,"a",@progbits
 	.align	3
 	.set	.LANCHOR155,. + 0
-	.type	__func__.7003, %object
-	.size	__func__.7003, 18
-__func__.7003:
+	.type	__func__.7002, %object
+	.size	__func__.7002, 18
+__func__.7002:
 	.string	"SupperBlkListInit"
-	.section	.rodata.__func__.7028,"a",@progbits
+	.section	.rodata.__func__.7027,"a",@progbits
 	.align	3
 	.set	.LANCHOR168,. + 0
-	.type	__func__.7028, %object
-	.size	__func__.7028, 21
-__func__.7028:
+	.type	__func__.7027, %object
+	.size	__func__.7027, 21
+__func__.7027:
 	.string	"FtlVpcCheckAndModify"
-	.section	.rodata.__func__.7044,"a",@progbits
+	.section	.rodata.__func__.7043,"a",@progbits
 	.align	3
 	.set	.LANCHOR156,. + 0
-	.type	__func__.7044, %object
-	.size	__func__.7044, 14
-__func__.7044:
+	.type	__func__.7043, %object
+	.size	__func__.7043, 14
+__func__.7043:
 	.string	"ftl_check_vpc"
-	.section	.rodata.__func__.7128,"a",@progbits
+	.section	.rodata.__func__.7127,"a",@progbits
 	.align	3
 	.set	.LANCHOR158,. + 0
-	.type	__func__.7128, %object
-	.size	__func__.7128, 25
-__func__.7128:
+	.type	__func__.7127, %object
+	.size	__func__.7127, 25
+__func__.7127:
 	.string	"allocate_data_superblock"
-	.section	.rodata.__func__.7149,"a",@progbits
+	.section	.rodata.__func__.7148,"a",@progbits
 	.align	3
 	.set	.LANCHOR169,. + 0
-	.type	__func__.7149, %object
-	.size	__func__.7149, 29
-__func__.7149:
+	.type	__func__.7148, %object
+	.size	__func__.7148, 29
+__func__.7148:
 	.string	"allocate_new_data_superblock"
-	.section	.rodata.__func__.7156,"a",@progbits
+	.section	.rodata.__func__.7155,"a",@progbits
 	.align	3
 	.set	.LANCHOR90,. + 0
-	.type	__func__.7156, %object
-	.size	__func__.7156, 19
-__func__.7156:
+	.type	__func__.7155, %object
+	.size	__func__.7155, 19
+__func__.7155:
 	.string	"get_new_active_ppa"
-	.section	.rodata.__func__.7169,"a",@progbits
+	.section	.rodata.__func__.7168,"a",@progbits
 	.align	3
 	.set	.LANCHOR159,. + 0
-	.type	__func__.7169, %object
-	.size	__func__.7169, 16
-__func__.7169:
+	.type	__func__.7168, %object
+	.size	__func__.7168, 16
+__func__.7168:
 	.string	"update_vpc_list"
-	.section	.rodata.__func__.7176,"a",@progbits
+	.section	.rodata.__func__.7175,"a",@progbits
 	.align	3
 	.set	.LANCHOR160,. + 0
-	.type	__func__.7176, %object
-	.size	__func__.7176, 20
-__func__.7176:
+	.type	__func__.7175, %object
+	.size	__func__.7175, 20
+__func__.7175:
 	.string	"decrement_vpc_count"
-	.section	.rodata.__func__.7246,"a",@progbits
+	.section	.rodata.__func__.7245,"a",@progbits
 	.align	3
 	.set	.LANCHOR173,. + 0
-	.type	__func__.7246, %object
-	.size	__func__.7246, 19
-__func__.7246:
+	.type	__func__.7245, %object
+	.size	__func__.7245, 19
+__func__.7245:
 	.string	"FtlGcFreeTempBlock"
-	.section	.rodata.__func__.7352,"a",@progbits
+	.section	.rodata.__func__.7351,"a",@progbits
 	.align	3
 	.set	.LANCHOR177,. + 0
-	.type	__func__.7352, %object
-	.size	__func__.7352, 23
-__func__.7352:
+	.type	__func__.7351, %object
+	.size	__func__.7351, 23
+__func__.7351:
 	.string	"rk_ftl_garbage_collect"
-	.section	.rodata.__func__.7613,"a",@progbits
+	.section	.rodata.__func__.7615,"a",@progbits
 	.align	3
 	.set	.LANCHOR106,. + 0
-	.type	__func__.7613, %object
-	.size	__func__.7613, 15
-__func__.7613:
+	.type	__func__.7615, %object
+	.size	__func__.7615, 15
+__func__.7615:
 	.string	"FlashReadPages"
-	.section	.rodata.__func__.7630,"a",@progbits
+	.section	.rodata.__func__.7632,"a",@progbits
 	.align	3
 	.set	.LANCHOR110,. + 0
-	.type	__func__.7630, %object
-	.size	__func__.7630, 15
-__func__.7630:
+	.type	__func__.7632, %object
+	.size	__func__.7632, 15
+__func__.7632:
 	.string	"FlashProgPages"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",@progbits,1
 .LC98:
@@ -23081,43 +23101,42 @@ __func__.7630:
 	.string	"%s\n"
 	.text
 .Letext0:
-	.file 6 "include/common.h"
-	.file 7 "./arch/arm/include/asm/types.h"
-	.file 8 "include/linux/types.h"
-	.file 9 "include/errno.h"
-	.file 10 "include/linux/string.h"
-	.file 11 "include/efi.h"
-	.file 12 "include/ide.h"
-	.file 13 "include/part.h"
-	.file 14 "include/flash.h"
-	.file 15 "include/lmb.h"
-	.file 16 "include/asm-generic/u-boot.h"
-	.file 17 "./arch/arm/include/asm/u-boot-arm.h"
-	.file 18 "include/../scripts/dtc/libfdt/fdt.h"
-	.file 19 "include/libfdt_env.h"
-	.file 20 "include/image.h"
-	.file 21 "include/net.h"
-	.file 22 "include/dm/uclass-id.h"
-	.file 23 "drivers/rkflash/rksftl/sftl_inc.h"
-	.file 24 "drivers/rkflash/rksftl/flash_com.h"
-	.file 25 "drivers/rkflash/rksftl/sftl_struct.h"
-	.file 26 "drivers/rkflash/rksftl/sftl_global.h"
-	.file 27 "include/malloc.h"
-	.file 28 "include/linux/compat.h"
+	.file 7 "include/common.h"
+	.file 8 "./arch/arm/include/asm/types.h"
+	.file 9 "include/linux/types.h"
+	.file 10 "include/errno.h"
+	.file 11 "include/linux/string.h"
+	.file 12 "include/efi.h"
+	.file 13 "include/ide.h"
+	.file 14 "include/part.h"
+	.file 15 "include/flash.h"
+	.file 16 "include/lmb.h"
+	.file 17 "include/asm-generic/u-boot.h"
+	.file 18 "./arch/arm/include/asm/u-boot-arm.h"
+	.file 19 "include/../scripts/dtc/libfdt/fdt.h"
+	.file 20 "include/libfdt_env.h"
+	.file 21 "include/image.h"
+	.file 22 "include/net.h"
+	.file 23 "include/dm/uclass-id.h"
+	.file 24 "drivers/rkflash/rksftl/sftl_inc.h"
+	.file 25 "drivers/rkflash/rksftl/flash_com.h"
+	.file 26 "drivers/rkflash/rksftl/sftl_struct.h"
+	.file 27 "drivers/rkflash/rksftl/sftl_global.h"
+	.file 28 "include/malloc.h"
 	.file 29 "include/stdio.h"
 	.file 30 "include/vsprintf.h"
 	.file 31 "include/log.h"
 	.section	.debug_info,"",@progbits
 .Ldebug_info0:
-	.4byte	0xa8ec
+	.4byte	0xa973
 	.2byte	0x4
 	.4byte	.Ldebug_abbrev0
 	.byte	0x8
 	.uleb128 0x1
-	.4byte	.LASF880
-	.byte	0xc
-	.4byte	.LASF881
 	.4byte	.LASF882
+	.byte	0xc
+	.4byte	.LASF883
+	.4byte	.LASF884
 	.4byte	.Ldebug_ranges0+0x330
 	.8byte	0
 	.4byte	.Ldebug_line0
@@ -23131,7 +23150,7 @@ __func__.7630:
 	.4byte	.LASF1
 	.uleb128 0x3
 	.4byte	.LASF5
-	.byte	0x6
+	.byte	0x7
 	.byte	0xd
 	.4byte	0x42
 	.uleb128 0x2
@@ -23144,7 +23163,7 @@ __func__.7630:
 	.4byte	.LASF3
 	.uleb128 0x4
 	.4byte	.LASF20
-	.byte	0x9
+	.byte	0xa
 	.byte	0xc
 	.4byte	0x5b
 	.uleb128 0x5
@@ -23157,7 +23176,7 @@ __func__.7630:
 	.4byte	.LASF4
 	.uleb128 0x3
 	.4byte	.LASF6
-	.byte	0x7
+	.byte	0x8
 	.byte	0xc
 	.4byte	0x42
 	.uleb128 0x2
@@ -23166,7 +23185,7 @@ __func__.7630:
 	.4byte	.LASF7
 	.uleb128 0x3
 	.4byte	.LASF8
-	.byte	0x7
+	.byte	0x8
 	.byte	0x12
 	.4byte	0x30
 	.uleb128 0x2
@@ -23179,34 +23198,34 @@ __func__.7630:
 	.4byte	.LASF10
 	.uleb128 0x6
 	.string	"u8"
-	.byte	0x7
+	.byte	0x8
 	.byte	0x1f
 	.4byte	0x42
 	.uleb128 0x7
 	.4byte	0x94
 	.uleb128 0x6
 	.string	"u16"
-	.byte	0x7
+	.byte	0x8
 	.byte	0x22
 	.4byte	0x29
 	.uleb128 0x6
 	.string	"s32"
-	.byte	0x7
+	.byte	0x8
 	.byte	0x24
 	.4byte	0x5b
 	.uleb128 0x6
 	.string	"u32"
-	.byte	0x7
+	.byte	0x8
 	.byte	0x25
 	.4byte	0x30
 	.uleb128 0x3
 	.4byte	.LASF11
-	.byte	0x7
+	.byte	0x8
 	.byte	0x31
 	.4byte	0x8d
 	.uleb128 0x3
 	.4byte	.LASF12
-	.byte	0x7
+	.byte	0x8
 	.byte	0x32
 	.4byte	0x8d
 	.uleb128 0x2
@@ -23231,29 +23250,29 @@ __func__.7630:
 	.4byte	0xe7
 	.uleb128 0x3
 	.4byte	.LASF16
-	.byte	0x8
+	.byte	0x9
 	.byte	0x59
 	.4byte	0x29
 	.uleb128 0x3
 	.4byte	.LASF17
-	.byte	0x8
+	.byte	0x9
 	.byte	0x5b
 	.4byte	0x49
 	.uleb128 0x3
 	.4byte	.LASF18
-	.byte	0x8
+	.byte	0x9
 	.byte	0x69
 	.4byte	0x69
 	.uleb128 0x3
 	.4byte	.LASF19
-	.byte	0x8
+	.byte	0x9
 	.byte	0x97
 	.4byte	0x7b
 	.uleb128 0x9
 	.byte	0x8
 	.uleb128 0x4
 	.4byte	.LASF21
-	.byte	0xa
+	.byte	0xb
 	.byte	0xb
 	.4byte	0xfa
 	.uleb128 0x2
@@ -23267,17 +23286,17 @@ __func__.7630:
 	.byte	0
 	.uleb128 0xc
 	.4byte	.LASF23
-	.byte	0xb
+	.byte	0xc
 	.2byte	0x140
 	.4byte	0x140
 	.uleb128 0xc
 	.4byte	.LASF24
-	.byte	0xb
+	.byte	0xc
 	.2byte	0x143
 	.4byte	0x140
 	.uleb128 0xc
 	.4byte	.LASF25
-	.byte	0xb
+	.byte	0xc
 	.2byte	0x143
 	.4byte	0x140
 	.uleb128 0x8
@@ -23291,7 +23310,7 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x4
 	.4byte	.LASF26
-	.byte	0xc
+	.byte	0xd
 	.byte	0x10
 	.4byte	0x176
 	.uleb128 0xa
@@ -23304,18 +23323,18 @@ __func__.7630:
 	.uleb128 0xf
 	.4byte	.LASF29
 	.byte	0x10
-	.byte	0xd
+	.byte	0xe
 	.byte	0xf
 	.4byte	0x1c1
 	.uleb128 0x10
 	.4byte	.LASF27
-	.byte	0xd
+	.byte	0xe
 	.byte	0x10
 	.4byte	0xfa
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF28
-	.byte	0xd
+	.byte	0xe
 	.byte	0x11
 	.4byte	0x1da
 	.byte	0x8
@@ -23342,41 +23361,41 @@ __func__.7630:
 	.4byte	0x1e0
 	.uleb128 0x4
 	.4byte	.LASF29
-	.byte	0xd
+	.byte	0xe
 	.byte	0xcd
 	.4byte	0x1eb
 	.uleb128 0x13
 	.2byte	0x1218
-	.byte	0xe
+	.byte	0xf
 	.byte	0x13
 	.4byte	0x242
 	.uleb128 0x10
 	.4byte	.LASF30
-	.byte	0xe
+	.byte	0xf
 	.byte	0x14
 	.4byte	0x10b
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF31
-	.byte	0xe
+	.byte	0xf
 	.byte	0x15
 	.4byte	0x100
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF32
-	.byte	0xe
+	.byte	0xf
 	.byte	0x16
 	.4byte	0x10b
 	.byte	0x10
 	.uleb128 0x10
 	.4byte	.LASF33
-	.byte	0xe
+	.byte	0xf
 	.byte	0x17
 	.4byte	0x242
 	.byte	0x18
 	.uleb128 0x14
 	.4byte	.LASF34
-	.byte	0xe
+	.byte	0xf
 	.byte	0x18
 	.4byte	0x253
 	.2byte	0x1018
@@ -23397,7 +23416,7 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x3
 	.4byte	.LASF35
-	.byte	0xe
+	.byte	0xf
 	.byte	0x32
 	.4byte	0x1fb
 	.uleb128 0xa
@@ -23407,7 +23426,7 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x4
 	.4byte	.LASF36
-	.byte	0xe
+	.byte	0xf
 	.byte	0x34
 	.4byte	0x26f
 	.uleb128 0x2
@@ -23417,18 +23436,18 @@ __func__.7630:
 	.uleb128 0xf
 	.4byte	.LASF38
 	.byte	0x10
-	.byte	0xf
+	.byte	0x10
 	.byte	0x10
 	.4byte	0x2b1
 	.uleb128 0x10
 	.4byte	.LASF39
-	.byte	0xf
+	.byte	0x10
 	.byte	0x11
 	.4byte	0xc4
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF30
-	.byte	0xf
+	.byte	0x10
 	.byte	0x12
 	.4byte	0xcf
 	.byte	0x8
@@ -23436,24 +23455,24 @@ __func__.7630:
 	.uleb128 0xf
 	.4byte	.LASF40
 	.byte	0xa0
-	.byte	0xf
+	.byte	0x10
 	.byte	0x15
 	.4byte	0x2e2
 	.uleb128 0x16
 	.string	"cnt"
-	.byte	0xf
+	.byte	0x10
 	.byte	0x16
 	.4byte	0x49
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF30
-	.byte	0xf
+	.byte	0x10
 	.byte	0x17
 	.4byte	0xcf
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF41
-	.byte	0xf
+	.byte	0x10
 	.byte	0x18
 	.4byte	0x2e2
 	.byte	0x10
@@ -23468,41 +23487,41 @@ __func__.7630:
 	.uleb128 0x17
 	.string	"lmb"
 	.2byte	0x140
-	.byte	0xf
+	.byte	0x10
 	.byte	0x1b
 	.4byte	0x318
 	.uleb128 0x10
 	.4byte	.LASF42
-	.byte	0xf
+	.byte	0x10
 	.byte	0x1c
 	.4byte	0x2b1
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF43
-	.byte	0xf
+	.byte	0x10
 	.byte	0x1d
 	.4byte	0x2b1
 	.byte	0xa0
 	.byte	0
 	.uleb128 0x18
 	.string	"lmb"
-	.byte	0xf
+	.byte	0x10
 	.byte	0x20
 	.4byte	0x2f2
 	.uleb128 0x19
 	.byte	0x10
-	.byte	0x10
+	.byte	0x11
 	.byte	0x5a
 	.4byte	0x344
 	.uleb128 0x10
 	.4byte	.LASF33
-	.byte	0x10
+	.byte	0x11
 	.byte	0x5b
 	.4byte	0xc4
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF30
-	.byte	0x10
+	.byte	0x11
 	.byte	0x5c
 	.4byte	0xcf
 	.byte	0x8
@@ -23510,120 +23529,120 @@ __func__.7630:
 	.uleb128 0xf
 	.4byte	.LASF44
 	.byte	0xa8
-	.byte	0x10
+	.byte	0x11
 	.byte	0x1b
 	.4byte	0x435
 	.uleb128 0x10
 	.4byte	.LASF45
-	.byte	0x10
+	.byte	0x11
 	.byte	0x1c
 	.4byte	0x49
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF46
-	.byte	0x10
+	.byte	0x11
 	.byte	0x1d
 	.4byte	0xcf
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF47
-	.byte	0x10
+	.byte	0x11
 	.byte	0x1e
 	.4byte	0x49
 	.byte	0x10
 	.uleb128 0x10
 	.4byte	.LASF48
-	.byte	0x10
+	.byte	0x11
 	.byte	0x1f
 	.4byte	0x49
 	.byte	0x18
 	.uleb128 0x10
 	.4byte	.LASF49
-	.byte	0x10
+	.byte	0x11
 	.byte	0x20
 	.4byte	0x49
 	.byte	0x20
 	.uleb128 0x10
 	.4byte	.LASF50
-	.byte	0x10
+	.byte	0x11
 	.byte	0x21
 	.4byte	0x49
 	.byte	0x28
 	.uleb128 0x10
 	.4byte	.LASF51
-	.byte	0x10
+	.byte	0x11
 	.byte	0x22
 	.4byte	0x49
 	.byte	0x30
 	.uleb128 0x10
 	.4byte	.LASF52
-	.byte	0x10
+	.byte	0x11
 	.byte	0x24
 	.4byte	0x49
 	.byte	0x38
 	.uleb128 0x10
 	.4byte	.LASF53
-	.byte	0x10
+	.byte	0x11
 	.byte	0x25
 	.4byte	0x49
 	.byte	0x40
 	.uleb128 0x10
 	.4byte	.LASF54
-	.byte	0x10
+	.byte	0x11
 	.byte	0x26
 	.4byte	0x49
 	.byte	0x48
 	.uleb128 0x10
 	.4byte	.LASF55
-	.byte	0x10
+	.byte	0x11
 	.byte	0x31
 	.4byte	0x49
 	.byte	0x50
 	.uleb128 0x10
 	.4byte	.LASF56
-	.byte	0x10
+	.byte	0x11
 	.byte	0x32
 	.4byte	0x49
 	.byte	0x58
 	.uleb128 0x10
 	.4byte	.LASF57
-	.byte	0x10
+	.byte	0x11
 	.byte	0x33
 	.4byte	0x18c
 	.byte	0x60
 	.uleb128 0x10
 	.4byte	.LASF58
-	.byte	0x10
+	.byte	0x11
 	.byte	0x34
 	.4byte	0x29
 	.byte	0x66
 	.uleb128 0x10
 	.4byte	.LASF59
-	.byte	0x10
+	.byte	0x11
 	.byte	0x35
 	.4byte	0x49
 	.byte	0x68
 	.uleb128 0x10
 	.4byte	.LASF60
-	.byte	0x10
+	.byte	0x11
 	.byte	0x36
 	.4byte	0x49
 	.byte	0x70
 	.uleb128 0x10
 	.4byte	.LASF61
-	.byte	0x10
+	.byte	0x11
 	.byte	0x57
 	.4byte	0x10b
 	.byte	0x78
 	.uleb128 0x10
 	.4byte	.LASF62
-	.byte	0x10
+	.byte	0x11
 	.byte	0x58
 	.4byte	0x10b
 	.byte	0x80
 	.uleb128 0x10
 	.4byte	.LASF63
-	.byte	0x10
+	.byte	0x11
 	.byte	0x5d
 	.4byte	0x435
 	.byte	0x88
@@ -23637,114 +23656,114 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x3
 	.4byte	.LASF64
-	.byte	0x10
+	.byte	0x11
 	.byte	0x5f
 	.4byte	0x344
 	.uleb128 0x4
 	.4byte	.LASF65
-	.byte	0x11
+	.byte	0x12
 	.byte	0x13
 	.4byte	0x10b
 	.uleb128 0x4
 	.4byte	.LASF66
-	.byte	0x11
+	.byte	0x12
 	.byte	0x14
 	.4byte	0x10b
 	.uleb128 0x4
 	.4byte	.LASF67
-	.byte	0x11
+	.byte	0x12
 	.byte	0x15
 	.4byte	0x10b
 	.uleb128 0x4
 	.4byte	.LASF68
-	.byte	0x11
+	.byte	0x12
 	.byte	0x16
 	.4byte	0x10b
 	.uleb128 0x4
 	.4byte	.LASF69
-	.byte	0x11
+	.byte	0x12
 	.byte	0x17
 	.4byte	0x10b
 	.uleb128 0x4
 	.4byte	.LASF70
-	.byte	0x11
+	.byte	0x12
 	.byte	0x18
 	.4byte	0x10b
 	.uleb128 0x4
 	.4byte	.LASF71
-	.byte	0x11
+	.byte	0x12
 	.byte	0x19
 	.4byte	0x10b
 	.uleb128 0xf
 	.4byte	.LASF72
 	.byte	0x28
-	.byte	0x12
+	.byte	0x13
 	.byte	0x39
 	.4byte	0x522
 	.uleb128 0x10
 	.4byte	.LASF73
-	.byte	0x12
+	.byte	0x13
 	.byte	0x3a
 	.4byte	0x533
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF74
-	.byte	0x12
+	.byte	0x13
 	.byte	0x3b
 	.4byte	0x533
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF75
-	.byte	0x12
+	.byte	0x13
 	.byte	0x3c
 	.4byte	0x533
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF76
-	.byte	0x12
+	.byte	0x13
 	.byte	0x3d
 	.4byte	0x533
 	.byte	0xc
 	.uleb128 0x10
 	.4byte	.LASF77
-	.byte	0x12
+	.byte	0x13
 	.byte	0x3e
 	.4byte	0x533
 	.byte	0x10
 	.uleb128 0x10
 	.4byte	.LASF78
-	.byte	0x12
+	.byte	0x13
 	.byte	0x3f
 	.4byte	0x533
 	.byte	0x14
 	.uleb128 0x10
 	.4byte	.LASF79
-	.byte	0x12
+	.byte	0x13
 	.byte	0x40
 	.4byte	0x533
 	.byte	0x18
 	.uleb128 0x10
 	.4byte	.LASF80
-	.byte	0x12
+	.byte	0x13
 	.byte	0x43
 	.4byte	0x533
 	.byte	0x1c
 	.uleb128 0x10
 	.4byte	.LASF81
-	.byte	0x12
+	.byte	0x13
 	.byte	0x46
 	.4byte	0x533
 	.byte	0x20
 	.uleb128 0x10
 	.4byte	.LASF82
-	.byte	0x12
+	.byte	0x13
 	.byte	0x49
 	.4byte	0x533
 	.byte	0x24
 	.byte	0
 	.uleb128 0x4
 	.4byte	.LASF83
-	.byte	0x13
+	.byte	0x14
 	.byte	0xf
 	.4byte	0x52d
 	.uleb128 0x8
@@ -23752,84 +23771,84 @@ __func__.7630:
 	.4byte	0x49d
 	.uleb128 0x3
 	.4byte	.LASF84
-	.byte	0x13
+	.byte	0x14
 	.byte	0x12
 	.4byte	0x121
 	.uleb128 0x1a
 	.4byte	.LASF85
 	.byte	0x40
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x133
 	.4byte	0x5e8
 	.uleb128 0x1b
 	.4byte	.LASF86
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x134
 	.4byte	0x121
 	.byte	0
 	.uleb128 0x1b
 	.4byte	.LASF87
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x135
 	.4byte	0x121
 	.byte	0x4
 	.uleb128 0x1b
 	.4byte	.LASF88
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x136
 	.4byte	0x121
 	.byte	0x8
 	.uleb128 0x1b
 	.4byte	.LASF89
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x137
 	.4byte	0x121
 	.byte	0xc
 	.uleb128 0x1b
 	.4byte	.LASF90
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x138
 	.4byte	0x121
 	.byte	0x10
 	.uleb128 0x1b
 	.4byte	.LASF91
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x139
 	.4byte	0x121
 	.byte	0x14
 	.uleb128 0x1b
 	.4byte	.LASF92
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x13a
 	.4byte	0x121
 	.byte	0x18
 	.uleb128 0x1b
 	.4byte	.LASF93
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x13b
 	.4byte	0x116
 	.byte	0x1c
 	.uleb128 0x1b
 	.4byte	.LASF94
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x13c
 	.4byte	0x116
 	.byte	0x1d
 	.uleb128 0x1b
 	.4byte	.LASF95
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x13d
 	.4byte	0x116
 	.byte	0x1e
 	.uleb128 0x1b
 	.4byte	.LASF96
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x13e
 	.4byte	0x116
 	.byte	0x1f
 	.uleb128 0x1b
 	.4byte	.LASF97
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x13f
 	.4byte	0x5e8
 	.byte	0x20
@@ -23843,258 +23862,258 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x1c
 	.4byte	.LASF98
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x140
 	.4byte	0x53e
 	.uleb128 0x1a
 	.4byte	.LASF99
 	.byte	0x30
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x142
 	.4byte	0x686
 	.uleb128 0x1b
 	.4byte	.LASF33
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x143
 	.4byte	0x10b
 	.byte	0
 	.uleb128 0x1d
 	.string	"end"
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x143
 	.4byte	0x10b
 	.byte	0x8
 	.uleb128 0x1b
 	.4byte	.LASF100
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x144
 	.4byte	0x10b
 	.byte	0x10
 	.uleb128 0x1b
 	.4byte	.LASF101
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x144
 	.4byte	0x10b
 	.byte	0x18
 	.uleb128 0x1b
 	.4byte	.LASF102
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x145
 	.4byte	0x10b
 	.byte	0x20
 	.uleb128 0x1b
 	.4byte	.LASF103
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x146
 	.4byte	0x116
 	.byte	0x28
 	.uleb128 0x1b
 	.4byte	.LASF104
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x146
 	.4byte	0x116
 	.byte	0x29
 	.uleb128 0x1d
 	.string	"os"
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x146
 	.4byte	0x116
 	.byte	0x2a
 	.uleb128 0x1b
 	.4byte	.LASF105
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x147
 	.4byte	0x116
 	.byte	0x2b
 	.byte	0
 	.uleb128 0x1c
 	.4byte	.LASF106
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x148
 	.4byte	0x604
 	.uleb128 0x1e
 	.4byte	.LASF107
 	.2byte	0x280
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x14e
 	.4byte	0x82f
 	.uleb128 0x1b
 	.4byte	.LASF108
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x154
 	.4byte	0x82f
 	.byte	0
 	.uleb128 0x1b
 	.4byte	.LASF109
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x155
 	.4byte	0x5f8
 	.byte	0x8
 	.uleb128 0x1b
 	.4byte	.LASF110
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x156
 	.4byte	0x10b
 	.byte	0x48
 	.uleb128 0x1b
 	.4byte	.LASF111
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x159
 	.4byte	0xe1
 	.byte	0x50
 	.uleb128 0x1b
 	.4byte	.LASF112
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x15b
 	.4byte	0x12c
 	.byte	0x58
 	.uleb128 0x1b
 	.4byte	.LASF113
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x15c
 	.4byte	0xe1
 	.byte	0x60
 	.uleb128 0x1b
 	.4byte	.LASF114
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x15d
 	.4byte	0x5b
 	.byte	0x68
 	.uleb128 0x1b
 	.4byte	.LASF115
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x15f
 	.4byte	0x12c
 	.byte	0x70
 	.uleb128 0x1b
 	.4byte	.LASF116
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x160
 	.4byte	0xe1
 	.byte	0x78
 	.uleb128 0x1b
 	.4byte	.LASF117
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x161
 	.4byte	0x5b
 	.byte	0x80
 	.uleb128 0x1b
 	.4byte	.LASF118
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x163
 	.4byte	0x12c
 	.byte	0x88
 	.uleb128 0x1b
 	.4byte	.LASF119
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x164
 	.4byte	0xe1
 	.byte	0x90
 	.uleb128 0x1b
 	.4byte	.LASF120
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x165
 	.4byte	0x5b
 	.byte	0x98
 	.uleb128 0x1b
 	.4byte	.LASF121
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x167
 	.4byte	0x12c
 	.byte	0xa0
 	.uleb128 0x1b
 	.4byte	.LASF122
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x168
 	.4byte	0xe1
 	.byte	0xa8
 	.uleb128 0x1b
 	.4byte	.LASF123
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x169
 	.4byte	0x5b
 	.byte	0xb0
 	.uleb128 0x1d
 	.string	"os"
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x16d
 	.4byte	0x686
 	.byte	0xb8
 	.uleb128 0x1d
 	.string	"ep"
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x16e
 	.4byte	0x10b
 	.byte	0xe8
 	.uleb128 0x1b
 	.4byte	.LASF124
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x170
 	.4byte	0x10b
 	.byte	0xf0
 	.uleb128 0x1b
 	.4byte	.LASF125
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x170
 	.4byte	0x10b
 	.byte	0xf8
 	.uleb128 0x1f
 	.4byte	.LASF126
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x172
 	.4byte	0xfa
 	.2byte	0x100
 	.uleb128 0x1f
 	.4byte	.LASF127
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x173
 	.4byte	0x10b
 	.2byte	0x108
 	.uleb128 0x1f
 	.4byte	.LASF128
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x175
 	.4byte	0x10b
 	.2byte	0x110
 	.uleb128 0x1f
 	.4byte	.LASF129
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x176
 	.4byte	0x10b
 	.2byte	0x118
 	.uleb128 0x1f
 	.4byte	.LASF130
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x177
 	.4byte	0x10b
 	.2byte	0x120
 	.uleb128 0x1f
 	.4byte	.LASF131
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x178
 	.4byte	0x10b
 	.2byte	0x128
 	.uleb128 0x20
 	.string	"kbd"
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x179
 	.4byte	0x835
 	.2byte	0x130
 	.uleb128 0x1f
 	.4byte	.LASF132
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x17c
 	.4byte	0x5b
 	.2byte	0x138
 	.uleb128 0x1f
 	.4byte	.LASF133
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x189
 	.4byte	0x5b
 	.2byte	0x13c
 	.uleb128 0x20
 	.string	"lmb"
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x18c
 	.4byte	0x2f2
 	.2byte	0x140
@@ -24107,19 +24126,19 @@ __func__.7630:
 	.4byte	0x445
 	.uleb128 0x1c
 	.4byte	.LASF134
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x18e
 	.4byte	0x692
 	.uleb128 0xc
 	.4byte	.LASF135
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x190
 	.4byte	0x83b
 	.uleb128 0x21
 	.4byte	.LASF263
 	.byte	0x4
 	.4byte	0x5b
-	.byte	0x16
+	.byte	0x17
 	.byte	0xe
 	.4byte	0xa50
 	.uleb128 0x22
@@ -24388,7 +24407,7 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x4
 	.4byte	.LASF219
-	.byte	0x6
+	.byte	0x7
 	.byte	0xa6
 	.4byte	0x10b
 	.uleb128 0xa
@@ -24398,38 +24417,38 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x4
 	.4byte	.LASF220
-	.byte	0x6
+	.byte	0x7
 	.byte	0xa8
 	.4byte	0xa7e
 	.uleb128 0x4
 	.4byte	.LASF221
-	.byte	0x6
+	.byte	0x7
 	.byte	0xa9
 	.4byte	0xa7e
 	.uleb128 0x4
 	.4byte	.LASF222
-	.byte	0x6
+	.byte	0x7
 	.byte	0xf7
 	.4byte	0x10b
 	.uleb128 0x4
 	.4byte	.LASF223
-	.byte	0x6
+	.byte	0x7
 	.byte	0xf8
 	.4byte	0x10b
 	.uleb128 0x4
 	.4byte	.LASF224
-	.byte	0x6
+	.byte	0x7
 	.byte	0xf9
 	.4byte	0x10b
 	.uleb128 0xf
 	.4byte	.LASF225
 	.byte	0x4
-	.byte	0x15
+	.byte	0x16
 	.byte	0x2e
 	.4byte	0xad9
 	.uleb128 0x10
 	.4byte	.LASF226
-	.byte	0x15
+	.byte	0x16
 	.byte	0x2f
 	.4byte	0x121
 	.byte	0
@@ -24440,78 +24459,78 @@ __func__.7630:
 	.uleb128 0xf
 	.4byte	.LASF227
 	.byte	0x68
-	.byte	0x15
+	.byte	0x16
 	.byte	0xa6
 	.4byte	0xb7c
 	.uleb128 0x10
 	.4byte	.LASF27
-	.byte	0x15
+	.byte	0x16
 	.byte	0xa8
 	.4byte	0xb7c
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF228
-	.byte	0x15
+	.byte	0x16
 	.byte	0xa9
 	.4byte	0x18c
 	.byte	0x10
 	.uleb128 0x10
 	.4byte	.LASF229
-	.byte	0x15
+	.byte	0x16
 	.byte	0xaa
 	.4byte	0xc4
 	.byte	0x18
 	.uleb128 0x10
 	.4byte	.LASF133
-	.byte	0x15
+	.byte	0x16
 	.byte	0xab
 	.4byte	0x5b
 	.byte	0x20
 	.uleb128 0x10
 	.4byte	.LASF230
-	.byte	0x15
+	.byte	0x16
 	.byte	0xad
 	.4byte	0xba6
 	.byte	0x28
 	.uleb128 0x10
 	.4byte	.LASF231
-	.byte	0x15
+	.byte	0x16
 	.byte	0xae
 	.4byte	0xbc5
 	.byte	0x30
 	.uleb128 0x10
 	.4byte	.LASF232
-	.byte	0x15
+	.byte	0x16
 	.byte	0xaf
 	.4byte	0xbda
 	.byte	0x38
 	.uleb128 0x10
 	.4byte	.LASF233
-	.byte	0x15
+	.byte	0x16
 	.byte	0xb0
 	.4byte	0xbeb
 	.byte	0x40
 	.uleb128 0x10
 	.4byte	.LASF234
-	.byte	0x15
+	.byte	0x16
 	.byte	0xb4
 	.4byte	0xbda
 	.byte	0x48
 	.uleb128 0x10
 	.4byte	.LASF235
-	.byte	0x15
+	.byte	0x16
 	.byte	0xb5
 	.4byte	0xba0
 	.byte	0x50
 	.uleb128 0x10
 	.4byte	.LASF236
-	.byte	0x15
+	.byte	0x16
 	.byte	0xb6
 	.4byte	0x5b
 	.byte	0x58
 	.uleb128 0x10
 	.4byte	.LASF237
-	.byte	0x15
+	.byte	0x16
 	.byte	0xb7
 	.4byte	0x12c
 	.byte	0x60
@@ -24569,7 +24588,7 @@ __func__.7630:
 	.4byte	0xbe0
 	.uleb128 0x4
 	.4byte	.LASF238
-	.byte	0x15
+	.byte	0x16
 	.byte	0xbd
 	.4byte	0xba0
 	.uleb128 0x25
@@ -24581,7 +24600,7 @@ __func__.7630:
 	.byte	0
 	.uleb128 0xc
 	.4byte	.LASF239
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x11e
 	.4byte	0xc18
 	.uleb128 0x8
@@ -24596,27 +24615,27 @@ __func__.7630:
 	.byte	0
 	.uleb128 0xc
 	.4byte	.LASF240
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x1fd
 	.4byte	0xac0
 	.uleb128 0xc
 	.4byte	.LASF241
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x1fe
 	.4byte	0xac0
 	.uleb128 0xc
 	.4byte	.LASF242
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x200
 	.4byte	0xac0
 	.uleb128 0xc
 	.4byte	.LASF243
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x205
 	.4byte	0xa63
 	.uleb128 0xc
 	.4byte	.LASF244
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x206
 	.4byte	0xa63
 	.uleb128 0xa
@@ -24628,32 +24647,32 @@ __func__.7630:
 	.byte	0
 	.uleb128 0xc
 	.4byte	.LASF245
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x207
 	.4byte	0xc6a
 	.uleb128 0xc
 	.4byte	.LASF246
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x209
 	.4byte	0xc1e
 	.uleb128 0xc
 	.4byte	.LASF247
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x20a
 	.4byte	0xc1e
 	.uleb128 0xc
 	.4byte	.LASF248
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x20b
 	.4byte	0xac0
 	.uleb128 0xc
 	.4byte	.LASF249
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x20c
 	.4byte	0xac0
 	.uleb128 0xc
 	.4byte	.LASF250
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x20d
 	.4byte	0xad9
 	.uleb128 0xa
@@ -24665,17 +24684,17 @@ __func__.7630:
 	.byte	0
 	.uleb128 0xc
 	.4byte	.LASF251
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x20e
 	.4byte	0xcc2
 	.uleb128 0xc
 	.4byte	.LASF252
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x20f
 	.4byte	0xad9
 	.uleb128 0xc
 	.4byte	.LASF253
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x210
 	.4byte	0x5b
 	.uleb128 0xa
@@ -24689,27 +24708,27 @@ __func__.7630:
 	.4byte	0xcf6
 	.uleb128 0xc
 	.4byte	.LASF254
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x211
 	.4byte	0xd06
 	.uleb128 0xc
 	.4byte	.LASF255
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x212
 	.4byte	0xd06
 	.uleb128 0xc
 	.4byte	.LASF256
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x216
 	.4byte	0x100
 	.uleb128 0xc
 	.4byte	.LASF257
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x217
 	.4byte	0x100
 	.uleb128 0xc
 	.4byte	.LASF258
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x219
 	.4byte	0x5b
 	.uleb128 0xa
@@ -24721,29 +24740,29 @@ __func__.7630:
 	.byte	0
 	.uleb128 0xc
 	.4byte	.LASF259
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x220
 	.4byte	0xd47
 	.uleb128 0xc
 	.4byte	.LASF260
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x222
 	.4byte	0xb9
 	.uleb128 0xc
 	.4byte	.LASF261
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x224
 	.4byte	0xb9
 	.uleb128 0xc
 	.4byte	.LASF262
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x230
 	.4byte	0xac0
 	.uleb128 0x26
 	.4byte	.LASF264
 	.byte	0x4
 	.4byte	0x30
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x286
 	.4byte	0xdb2
 	.uleb128 0x22
@@ -24761,68 +24780,68 @@ __func__.7630:
 	.byte	0
 	.uleb128 0xc
 	.4byte	.LASF269
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x28c
 	.4byte	0xd88
 	.uleb128 0x3
 	.4byte	.LASF270
-	.byte	0x17
+	.byte	0x18
 	.byte	0x9
 	.4byte	0x42
 	.uleb128 0x3
 	.4byte	.LASF271
-	.byte	0x17
+	.byte	0x18
 	.byte	0xa
 	.4byte	0x29
 	.uleb128 0x3
 	.4byte	.LASF272
-	.byte	0x17
+	.byte	0x18
 	.byte	0xb
 	.4byte	0x30
 	.uleb128 0x3
 	.4byte	.LASF273
-	.byte	0x17
+	.byte	0x18
 	.byte	0xc
 	.4byte	0x5b
 	.uleb128 0x3
 	.4byte	.LASF274
-	.byte	0x17
+	.byte	0x18
 	.byte	0xd
 	.4byte	0x74
 	.uleb128 0xf
 	.4byte	.LASF275
 	.byte	0x20
-	.byte	0x18
-	.byte	0x27
+	.byte	0x19
+	.byte	0x24
 	.4byte	0xe3e
 	.uleb128 0x10
 	.4byte	.LASF276
-	.byte	0x18
-	.byte	0x28
+	.byte	0x19
+	.byte	0x25
 	.4byte	0xb9
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF277
-	.byte	0x18
-	.byte	0x29
+	.byte	0x19
+	.byte	0x26
 	.4byte	0xb9
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF278
-	.byte	0x18
-	.byte	0x2a
+	.byte	0x19
+	.byte	0x27
 	.4byte	0xe3e
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF279
-	.byte	0x18
-	.byte	0x2b
+	.byte	0x19
+	.byte	0x28
 	.4byte	0xe3e
 	.byte	0x10
 	.uleb128 0x16
 	.string	"lpa"
-	.byte	0x18
-	.byte	0x2c
+	.byte	0x19
+	.byte	0x29
 	.4byte	0xb9
 	.byte	0x18
 	.byte	0
@@ -24832,79 +24851,79 @@ __func__.7630:
 	.uleb128 0xf
 	.4byte	.LASF280
 	.byte	0x18
-	.byte	0x18
-	.byte	0x2f
+	.byte	0x19
+	.byte	0x2c
 	.4byte	0xee1
 	.uleb128 0x10
 	.4byte	.LASF281
-	.byte	0x18
-	.byte	0x30
+	.byte	0x19
+	.byte	0x2d
 	.4byte	0xa3
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF282
-	.byte	0x18
-	.byte	0x31
+	.byte	0x19
+	.byte	0x2e
 	.4byte	0xa3
 	.byte	0x2
 	.uleb128 0x10
 	.4byte	.LASF283
-	.byte	0x18
-	.byte	0x32
+	.byte	0x19
+	.byte	0x2f
 	.4byte	0xa3
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF284
-	.byte	0x18
-	.byte	0x33
+	.byte	0x19
+	.byte	0x30
 	.4byte	0xa3
 	.byte	0x6
 	.uleb128 0x10
 	.4byte	.LASF285
-	.byte	0x18
-	.byte	0x34
+	.byte	0x19
+	.byte	0x31
 	.4byte	0xa3
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF286
-	.byte	0x18
-	.byte	0x35
+	.byte	0x19
+	.byte	0x32
 	.4byte	0xa3
 	.byte	0xa
 	.uleb128 0x10
 	.4byte	.LASF287
-	.byte	0x18
-	.byte	0x36
+	.byte	0x19
+	.byte	0x33
 	.4byte	0xa3
 	.byte	0xc
 	.uleb128 0x10
 	.4byte	.LASF288
-	.byte	0x18
-	.byte	0x37
+	.byte	0x19
+	.byte	0x34
 	.4byte	0xa3
 	.byte	0xe
 	.uleb128 0x10
 	.4byte	.LASF289
-	.byte	0x18
-	.byte	0x38
+	.byte	0x19
+	.byte	0x35
 	.4byte	0xa3
 	.byte	0x10
 	.uleb128 0x10
 	.4byte	.LASF290
-	.byte	0x18
-	.byte	0x39
+	.byte	0x19
+	.byte	0x36
 	.4byte	0xa3
 	.byte	0x12
 	.uleb128 0x10
 	.4byte	.LASF291
-	.byte	0x18
-	.byte	0x3a
+	.byte	0x19
+	.byte	0x37
 	.4byte	0xa3
 	.byte	0x14
 	.uleb128 0x10
 	.4byte	.LASF292
-	.byte	0x18
-	.byte	0x3b
+	.byte	0x19
+	.byte	0x38
 	.4byte	0x94
 	.byte	0x16
 	.byte	0
@@ -24913,31 +24932,31 @@ __func__.7630:
 	.uleb128 0xf
 	.4byte	.LASF293
 	.byte	0x20
-	.byte	0x18
-	.byte	0x3e
+	.byte	0x19
+	.byte	0x3b
 	.4byte	0xf23
 	.uleb128 0x10
 	.4byte	.LASF294
-	.byte	0x18
-	.byte	0x3f
+	.byte	0x19
+	.byte	0x3c
 	.4byte	0xf3d
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF295
-	.byte	0x18
-	.byte	0x40
+	.byte	0x19
+	.byte	0x3d
 	.4byte	0xf57
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF296
-	.byte	0x18
-	.byte	0x41
+	.byte	0x19
+	.byte	0x3e
 	.4byte	0xf7b
 	.byte	0x10
 	.uleb128 0x10
 	.4byte	.LASF297
-	.byte	0x18
-	.byte	0x42
+	.byte	0x19
+	.byte	0x3f
 	.4byte	0xf7b
 	.byte	0x18
 	.byte	0
@@ -24984,48 +25003,48 @@ __func__.7630:
 	.uleb128 0xf
 	.4byte	.LASF298
 	.byte	0x60
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x2b
 	.4byte	0xfe1
 	.uleb128 0x16
 	.string	"id"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x2d
 	.4byte	0xdc9
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF299
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x2e
 	.4byte	0xdc9
 	.byte	0x2
 	.uleb128 0x10
 	.4byte	.LASF300
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x2f
 	.4byte	0xdc9
 	.byte	0x4
 	.uleb128 0x16
 	.string	"cnt"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x30
 	.4byte	0xdc9
 	.byte	0x6
 	.uleb128 0x10
 	.4byte	.LASF78
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x31
 	.4byte	0xdd4
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF301
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x32
 	.4byte	0xfe1
 	.byte	0xc
 	.uleb128 0x10
 	.4byte	.LASF302
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x33
 	.4byte	0xff1
 	.byte	0x20
@@ -25050,36 +25069,36 @@ __func__.7630:
 	.uleb128 0xf
 	.4byte	.LASF303
 	.byte	0xc
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x3f
 	.4byte	0x104f
 	.uleb128 0x16
 	.string	"id"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x41
 	.4byte	0xdc9
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF299
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x42
 	.4byte	0xdc9
 	.byte	0x2
 	.uleb128 0x10
 	.4byte	.LASF300
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x43
 	.4byte	0xdc9
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF304
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x44
 	.4byte	0xdc9
 	.byte	0x6
 	.uleb128 0x10
 	.4byte	.LASF78
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x45
 	.4byte	0xdd4
 	.byte	0x8
@@ -25087,84 +25106,84 @@ __func__.7630:
 	.uleb128 0xf
 	.4byte	.LASF305
 	.byte	0x40
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x48
 	.4byte	0x10f8
 	.uleb128 0x10
 	.4byte	.LASF236
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x4a
 	.4byte	0xdc9
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF299
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x4b
 	.4byte	0xdc9
 	.byte	0x2
 	.uleb128 0x10
 	.4byte	.LASF306
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x4d
 	.4byte	0xdc9
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF307
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x4e
 	.4byte	0xdc9
 	.byte	0x6
 	.uleb128 0x10
 	.4byte	.LASF308
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x50
 	.4byte	0xdc9
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF309
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x51
 	.4byte	0xdc9
 	.byte	0xa
 	.uleb128 0x10
 	.4byte	.LASF310
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x53
 	.4byte	0x10f8
 	.byte	0x10
 	.uleb128 0x10
 	.4byte	.LASF311
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x54
 	.4byte	0x1001
 	.byte	0x18
 	.uleb128 0x10
 	.4byte	.LASF312
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x55
 	.4byte	0x10f8
 	.byte	0x20
 	.uleb128 0x10
 	.4byte	.LASF313
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x56
 	.4byte	0x1001
 	.byte	0x28
 	.uleb128 0x10
 	.4byte	.LASF78
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x58
 	.4byte	0xdd4
 	.byte	0x30
 	.uleb128 0x10
 	.4byte	.LASF314
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x59
 	.4byte	0xdd4
 	.byte	0x34
 	.uleb128 0x10
 	.4byte	.LASF315
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x5a
 	.4byte	0xdd4
 	.byte	0x38
@@ -25175,30 +25194,30 @@ __func__.7630:
 	.uleb128 0xf
 	.4byte	.LASF316
 	.byte	0x10
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x5d
 	.4byte	0x113b
 	.uleb128 0x10
 	.4byte	.LASF317
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x5f
 	.4byte	0xdc9
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF43
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x60
 	.4byte	0xdc9
 	.byte	0x2
 	.uleb128 0x16
 	.string	"hit"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x61
 	.4byte	0xdd4
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF318
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x62
 	.4byte	0x1001
 	.byte	0x8
@@ -25206,54 +25225,54 @@ __func__.7630:
 	.uleb128 0xf
 	.4byte	.LASF319
 	.byte	0x24
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x65
 	.4byte	0x11a8
 	.uleb128 0x10
 	.4byte	.LASF306
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x67
 	.4byte	0xdd4
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF320
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x68
 	.4byte	0xdd4
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF78
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x69
 	.4byte	0xdd4
 	.byte	0x8
 	.uleb128 0x16
 	.string	"len"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x6a
 	.4byte	0xdd4
 	.byte	0xc
 	.uleb128 0x10
 	.4byte	.LASF321
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x6b
 	.4byte	0xdd4
 	.byte	0x10
 	.uleb128 0x10
 	.4byte	.LASF322
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x6c
 	.4byte	0xdd4
 	.byte	0x14
 	.uleb128 0x10
 	.4byte	.LASF323
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x6d
 	.4byte	0x11a8
 	.byte	0x18
 	.uleb128 0x16
 	.string	"tbl"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x6e
 	.4byte	0x11b8
 	.byte	0x20
@@ -25275,48 +25294,48 @@ __func__.7630:
 	.uleb128 0xf
 	.4byte	.LASF324
 	.byte	0x10
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x72
 	.4byte	0x1228
 	.uleb128 0x10
 	.4byte	.LASF306
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x74
 	.4byte	0xdc9
 	.byte	0
 	.uleb128 0x16
 	.string	"id"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x75
 	.4byte	0xdc9
 	.byte	0x2
 	.uleb128 0x10
 	.4byte	.LASF78
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x76
 	.4byte	0xdd4
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF300
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x77
 	.4byte	0xdc9
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF325
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x78
 	.4byte	0xdc9
 	.byte	0xa
 	.uleb128 0x10
 	.4byte	.LASF326
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x79
 	.4byte	0xdc9
 	.byte	0xc
 	.uleb128 0x10
 	.4byte	.LASF323
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x7a
 	.4byte	0x1228
 	.byte	0xe
@@ -25331,36 +25350,36 @@ __func__.7630:
 	.uleb128 0xf
 	.4byte	.LASF327
 	.byte	0x10
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x7d
 	.4byte	0x1280
 	.uleb128 0x10
 	.4byte	.LASF306
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x7f
 	.4byte	0xdc9
 	.byte	0
 	.uleb128 0x16
 	.string	"id"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x80
 	.4byte	0xdc9
 	.byte	0x2
 	.uleb128 0x10
 	.4byte	.LASF78
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x81
 	.4byte	0xdd4
 	.byte	0x4
 	.uleb128 0x16
 	.string	"lpa"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x82
 	.4byte	0xdd4
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF328
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x83
 	.4byte	0xdd4
 	.byte	0xc
@@ -25368,36 +25387,36 @@ __func__.7630:
 	.uleb128 0xf
 	.4byte	.LASF329
 	.byte	0x10
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x8f
 	.4byte	0x12c8
 	.uleb128 0x10
 	.4byte	.LASF306
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x91
 	.4byte	0xdc9
 	.byte	0
 	.uleb128 0x16
 	.string	"id"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x92
 	.4byte	0xdc9
 	.byte	0x2
 	.uleb128 0x10
 	.4byte	.LASF78
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x93
 	.4byte	0xdd4
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF330
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x94
 	.4byte	0xdc9
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF323
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x95
 	.4byte	0x12c8
 	.byte	0xa
@@ -25412,36 +25431,36 @@ __func__.7630:
 	.uleb128 0xf
 	.4byte	.LASF331
 	.byte	0x10
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x98
 	.4byte	0x1320
 	.uleb128 0x10
 	.4byte	.LASF306
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x9a
 	.4byte	0xdc9
 	.byte	0
 	.uleb128 0x16
 	.string	"id"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x9b
 	.4byte	0xdc9
 	.byte	0x2
 	.uleb128 0x10
 	.4byte	.LASF78
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x9c
 	.4byte	0xdd4
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF332
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x9d
 	.4byte	0xdd4
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF333
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x9e
 	.4byte	0xdd4
 	.byte	0xc
@@ -25449,126 +25468,126 @@ __func__.7630:
 	.uleb128 0xf
 	.4byte	.LASF334
 	.byte	0x30
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xa1
 	.4byte	0x141d
 	.uleb128 0x16
 	.string	"tag"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xa3
 	.4byte	0xdd4
 	.byte	0
 	.uleb128 0x16
 	.string	"ver"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xa4
 	.4byte	0xdd4
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF304
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xa6
 	.4byte	0xdc9
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF335
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xa7
 	.4byte	0xdbe
 	.byte	0xa
 	.uleb128 0x10
 	.4byte	.LASF336
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xa8
 	.4byte	0xdbe
 	.byte	0xb
 	.uleb128 0x10
 	.4byte	.LASF337
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xa9
 	.4byte	0xdbe
 	.byte	0xc
 	.uleb128 0x10
 	.4byte	.LASF338
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xaa
 	.4byte	0xdbe
 	.byte	0xd
 	.uleb128 0x10
 	.4byte	.LASF339
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xab
 	.4byte	0xdc9
 	.byte	0xe
 	.uleb128 0x10
 	.4byte	.LASF340
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xad
 	.4byte	0xdc9
 	.byte	0x10
 	.uleb128 0x10
 	.4byte	.LASF341
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xae
 	.4byte	0xdc9
 	.byte	0x12
 	.uleb128 0x10
 	.4byte	.LASF342
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xaf
 	.4byte	0xdc9
 	.byte	0x14
 	.uleb128 0x10
 	.4byte	.LASF343
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xb0
 	.4byte	0xdc9
 	.byte	0x16
 	.uleb128 0x10
 	.4byte	.LASF344
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xb2
 	.4byte	0xdc9
 	.byte	0x18
 	.uleb128 0x10
 	.4byte	.LASF345
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xb3
 	.4byte	0xdc9
 	.byte	0x1a
 	.uleb128 0x10
 	.4byte	.LASF346
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xb4
 	.4byte	0xdc9
 	.byte	0x1c
 	.uleb128 0x10
 	.4byte	.LASF347
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xb5
 	.4byte	0xdc9
 	.byte	0x1e
 	.uleb128 0x10
 	.4byte	.LASF348
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xb7
 	.4byte	0xdd4
 	.byte	0x20
 	.uleb128 0x10
 	.4byte	.LASF349
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xb8
 	.4byte	0xdd4
 	.byte	0x24
 	.uleb128 0x10
 	.4byte	.LASF350
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xb9
 	.4byte	0xdd4
 	.byte	0x28
 	.uleb128 0x10
 	.4byte	.LASF323
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xba
 	.4byte	0x11b8
 	.byte	0x2c
@@ -25576,162 +25595,162 @@ __func__.7630:
 	.uleb128 0x27
 	.4byte	.LASF351
 	.2byte	0x200
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xbe
 	.4byte	0x1563
 	.uleb128 0x16
 	.string	"tag"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xc0
 	.4byte	0xdd4
 	.byte	0
 	.uleb128 0x16
 	.string	"ver"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xc1
 	.4byte	0xdd4
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF352
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xc3
 	.4byte	0xdd4
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF353
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xc4
 	.4byte	0xdd4
 	.byte	0xc
 	.uleb128 0x10
 	.4byte	.LASF354
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xc5
 	.4byte	0xdd4
 	.byte	0x10
 	.uleb128 0x10
 	.4byte	.LASF355
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xc6
 	.4byte	0xdd4
 	.byte	0x14
 	.uleb128 0x10
 	.4byte	.LASF348
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xc8
 	.4byte	0xdd4
 	.byte	0x18
 	.uleb128 0x10
 	.4byte	.LASF356
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xc9
 	.4byte	0xdd4
 	.byte	0x1c
 	.uleb128 0x10
 	.4byte	.LASF357
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xca
 	.4byte	0xdd4
 	.byte	0x20
 	.uleb128 0x10
 	.4byte	.LASF358
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xcb
 	.4byte	0xdd4
 	.byte	0x24
 	.uleb128 0x10
 	.4byte	.LASF345
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xcd
 	.4byte	0xdd4
 	.byte	0x28
 	.uleb128 0x10
 	.4byte	.LASF359
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xce
 	.4byte	0xdd4
 	.byte	0x2c
 	.uleb128 0x10
 	.4byte	.LASF360
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xcf
 	.4byte	0xdd4
 	.byte	0x30
 	.uleb128 0x10
 	.4byte	.LASF361
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xd0
 	.4byte	0xdd4
 	.byte	0x34
 	.uleb128 0x10
 	.4byte	.LASF362
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xd2
 	.4byte	0xdd4
 	.byte	0x38
 	.uleb128 0x10
 	.4byte	.LASF363
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xd3
 	.4byte	0xdd4
 	.byte	0x3c
 	.uleb128 0x10
 	.4byte	.LASF364
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xd4
 	.4byte	0xdd4
 	.byte	0x40
 	.uleb128 0x10
 	.4byte	.LASF365
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xd5
 	.4byte	0xdd4
 	.byte	0x44
 	.uleb128 0x10
 	.4byte	.LASF366
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xd7
 	.4byte	0xdd4
 	.byte	0x48
 	.uleb128 0x10
 	.4byte	.LASF367
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xd8
 	.4byte	0xdd4
 	.byte	0x4c
 	.uleb128 0x10
 	.4byte	.LASF368
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xd9
 	.4byte	0xdd4
 	.byte	0x50
 	.uleb128 0x10
 	.4byte	.LASF369
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xda
 	.4byte	0xdd4
 	.byte	0x54
 	.uleb128 0x10
 	.4byte	.LASF370
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xdc
 	.4byte	0xdd4
 	.byte	0x58
 	.uleb128 0x10
 	.4byte	.LASF371
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xdd
 	.4byte	0xdd4
 	.byte	0x5c
 	.uleb128 0x10
 	.4byte	.LASF372
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xde
 	.4byte	0xdd4
 	.byte	0x60
 	.uleb128 0x10
 	.4byte	.LASF323
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xe0
 	.4byte	0x1563
 	.byte	0x64
@@ -25746,24 +25765,24 @@ __func__.7630:
 	.uleb128 0xf
 	.4byte	.LASF373
 	.byte	0x6
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xe4
 	.4byte	0x15a4
 	.uleb128 0x10
 	.4byte	.LASF235
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xe6
 	.4byte	0xdc9
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF374
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xe7
 	.4byte	0xdc9
 	.byte	0x2
 	.uleb128 0x10
 	.4byte	.LASF375
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xe8
 	.4byte	0xdc9
 	.byte	0x4
@@ -25771,36 +25790,36 @@ __func__.7630:
 	.uleb128 0x27
 	.4byte	.LASF376
 	.2byte	0x808
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xeb
 	.4byte	0x15ee
 	.uleb128 0x16
 	.string	"max"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xed
 	.4byte	0xdc9
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF377
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xee
 	.4byte	0xdc9
 	.byte	0x2
 	.uleb128 0x10
 	.4byte	.LASF378
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xef
 	.4byte	0xdc9
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF325
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xf0
 	.4byte	0xdc9
 	.byte	0x6
 	.uleb128 0x16
 	.string	"arr"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xf1
 	.4byte	0x15ee
 	.byte	0x8
@@ -25815,72 +25834,72 @@ __func__.7630:
 	.uleb128 0xf
 	.4byte	.LASF379
 	.byte	0x30
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xf5
 	.4byte	0x1691
 	.uleb128 0x16
 	.string	"id"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xf7
 	.4byte	0xdc9
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF380
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xf8
 	.4byte	0xdc9
 	.byte	0x2
 	.uleb128 0x10
 	.4byte	.LASF381
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xf9
 	.4byte	0xdc9
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF382
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xfa
 	.4byte	0xdbe
 	.byte	0x6
 	.uleb128 0x10
 	.4byte	.LASF383
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xfb
 	.4byte	0xdbe
 	.byte	0x7
 	.uleb128 0x10
 	.4byte	.LASF384
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xfc
 	.4byte	0xdbe
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF385
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xfd
 	.4byte	0xdbe
 	.byte	0x9
 	.uleb128 0x10
 	.4byte	.LASF386
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xfe
 	.4byte	0xdbe
 	.byte	0xa
 	.uleb128 0x10
 	.4byte	.LASF387
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xff
 	.4byte	0xdbe
 	.byte	0xb
 	.uleb128 0x1b
 	.4byte	.LASF78
-	.byte	0x19
+	.byte	0x1a
 	.2byte	0x100
 	.4byte	0xdd4
 	.byte	0xc
 	.uleb128 0x1b
 	.4byte	.LASF388
-	.byte	0x19
+	.byte	0x1a
 	.2byte	0x101
 	.4byte	0x1691
 	.byte	0x10
@@ -25895,24 +25914,24 @@ __func__.7630:
 	.uleb128 0x1a
 	.4byte	.LASF389
 	.byte	0xc
-	.byte	0x19
+	.byte	0x1a
 	.2byte	0x105
 	.4byte	0x16d6
 	.uleb128 0x1b
 	.4byte	.LASF390
-	.byte	0x19
+	.byte	0x1a
 	.2byte	0x107
 	.4byte	0xdd4
 	.byte	0
 	.uleb128 0x1b
 	.4byte	.LASF391
-	.byte	0x19
+	.byte	0x1a
 	.2byte	0x108
 	.4byte	0xdd4
 	.byte	0x4
 	.uleb128 0x1d
 	.string	"lpa"
-	.byte	0x19
+	.byte	0x1a
 	.2byte	0x109
 	.4byte	0xdd4
 	.byte	0x8
@@ -25920,31 +25939,31 @@ __func__.7630:
 	.uleb128 0x1a
 	.4byte	.LASF392
 	.byte	0x18
-	.byte	0x19
+	.byte	0x1a
 	.2byte	0x10c
 	.4byte	0x170b
 	.uleb128 0x1b
 	.4byte	.LASF278
-	.byte	0x19
+	.byte	0x1a
 	.2byte	0x10e
 	.4byte	0x1001
 	.byte	0
 	.uleb128 0x1b
 	.4byte	.LASF279
-	.byte	0x19
+	.byte	0x1a
 	.2byte	0x10f
 	.4byte	0x1001
 	.byte	0x8
 	.uleb128 0x1b
 	.4byte	.LASF393
-	.byte	0x19
+	.byte	0x1a
 	.2byte	0x110
 	.4byte	0xdd4
 	.byte	0x10
 	.byte	0
 	.uleb128 0x28
 	.4byte	.LASF394
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x12
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -25952,7 +25971,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_type
 	.uleb128 0x28
 	.4byte	.LASF395
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x13
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -25960,7 +25979,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_die_num
 	.uleb128 0x28
 	.4byte	.LASF396
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x14
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -25968,7 +25987,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_planes_per_die
 	.uleb128 0x28
 	.4byte	.LASF397
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x15
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -25976,7 +25995,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_blks_per_die
 	.uleb128 0x28
 	.4byte	.LASF398
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x16
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -25984,7 +26003,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_blks_per_die_shift
 	.uleb128 0x28
 	.4byte	.LASF399
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x17
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -25992,7 +26011,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_planes_num
 	.uleb128 0x28
 	.4byte	.LASF400
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x18
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26000,7 +26019,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_blk_pre_plane
 	.uleb128 0x28
 	.4byte	.LASF401
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x19
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26008,7 +26027,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_ext_blk_pre_plane
 	.uleb128 0x28
 	.4byte	.LASF402
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x1a
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26016,7 +26035,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_bbm_buf_size
 	.uleb128 0x28
 	.4byte	.LASF403
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x1c
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26024,7 +26043,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_page_pre_blk
 	.uleb128 0x28
 	.4byte	.LASF404
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x1d
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26032,7 +26051,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_page_pre_slc_blk
 	.uleb128 0x28
 	.4byte	.LASF405
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x1e
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26040,7 +26059,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_page_pre_super_blk
 	.uleb128 0x28
 	.4byte	.LASF406
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x1f
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26048,7 +26067,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_sec_pre_page
 	.uleb128 0x28
 	.4byte	.LASF407
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x20
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26056,7 +26075,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_sec_pre_page_shift
 	.uleb128 0x28
 	.4byte	.LASF408
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x24
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26064,7 +26083,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_byte_pre_page
 	.uleb128 0x28
 	.4byte	.LASF409
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x25
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26072,7 +26091,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_byte_pre_oob
 	.uleb128 0x28
 	.4byte	.LASF410
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x26
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26080,7 +26099,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_reserved_blks
 	.uleb128 0x28
 	.4byte	.LASF411
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x27
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26088,7 +26107,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_totle_phy_blks
 	.uleb128 0x28
 	.4byte	.LASF412
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x29
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26096,7 +26115,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_map_region_num
 	.uleb128 0x28
 	.4byte	.LASF413
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x2a
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26104,7 +26123,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_l2pmap_ram_region_num
 	.uleb128 0x28
 	.4byte	.LASF414
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x2c
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26112,7 +26131,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_vendor_region_num
 	.uleb128 0x28
 	.4byte	.LASF415
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x2e
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26120,7 +26139,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_map_blks_per_plane
 	.uleb128 0x28
 	.4byte	.LASF416
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x2f
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26128,7 +26147,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_max_map_blks
 	.uleb128 0x28
 	.4byte	.LASF417
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x30
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26136,7 +26155,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_max_vendor_blks
 	.uleb128 0x28
 	.4byte	.LASF418
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x31
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26144,7 +26163,7 @@ __func__.7630:
 	.8byte	c_ftl_vendor_part_size
 	.uleb128 0x28
 	.4byte	.LASF419
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x32
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26152,7 +26171,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_sys_blks_per_plane
 	.uleb128 0x28
 	.4byte	.LASF420
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x33
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26160,7 +26179,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_init_sys_blks_per_plane
 	.uleb128 0x28
 	.4byte	.LASF421
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x34
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26168,7 +26187,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_max_sys_blks
 	.uleb128 0x28
 	.4byte	.LASF422
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x35
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26176,7 +26195,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_data_blks_per_plane
 	.uleb128 0x28
 	.4byte	.LASF423
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x36
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26184,7 +26203,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_data_op_blks_per_plane
 	.uleb128 0x28
 	.4byte	.LASF424
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x37
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26192,7 +26211,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_max_data_blks
 	.uleb128 0x28
 	.4byte	.LASF425
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x38
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26200,7 +26219,7 @@ __func__.7630:
 	.8byte	ftl_gc_temp_power_lost_recovery_flag
 	.uleb128 0x28
 	.4byte	.LASF426
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x3a
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26208,7 +26227,7 @@ __func__.7630:
 	.8byte	g_GlobalSysVersion
 	.uleb128 0x28
 	.4byte	.LASF427
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x3b
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26216,7 +26235,7 @@ __func__.7630:
 	.8byte	g_GlobalDataVersion
 	.uleb128 0x28
 	.4byte	.LASF428
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x3c
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26224,7 +26243,7 @@ __func__.7630:
 	.8byte	g_MaxLbaSector
 	.uleb128 0x28
 	.4byte	.LASF429
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x3d
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26232,7 +26251,7 @@ __func__.7630:
 	.8byte	g_MaxLpn
 	.uleb128 0x28
 	.4byte	.LASF430
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x3e
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26240,7 +26259,7 @@ __func__.7630:
 	.8byte	g_VaildLpn
 	.uleb128 0x28
 	.4byte	.LASF431
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x3f
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26248,7 +26267,7 @@ __func__.7630:
 	.8byte	g_MaxLbn
 	.uleb128 0x28
 	.4byte	.LASF432
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x41
 	.4byte	0xf81
 	.uleb128 0x9
@@ -26256,7 +26275,7 @@ __func__.7630:
 	.8byte	gBbtInfo
 	.uleb128 0x28
 	.4byte	.LASF433
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x42
 	.4byte	0x1007
 	.uleb128 0x9
@@ -26264,7 +26283,7 @@ __func__.7630:
 	.8byte	gSysInfo
 	.uleb128 0x28
 	.4byte	.LASF434
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x43
 	.4byte	0x15a4
 	.uleb128 0x9
@@ -26272,7 +26291,7 @@ __func__.7630:
 	.8byte	gSysFreeQueue
 	.uleb128 0x28
 	.4byte	.LASF435
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x44
 	.4byte	0x104f
 	.uleb128 0x9
@@ -26280,7 +26299,7 @@ __func__.7630:
 	.8byte	gL2pMapInfo
 	.uleb128 0x28
 	.4byte	.LASF436
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x45
 	.4byte	0x104f
 	.uleb128 0x9
@@ -26288,7 +26307,7 @@ __func__.7630:
 	.8byte	gVendorBlkInfo
 	.uleb128 0x28
 	.4byte	.LASF437
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x46
 	.4byte	0xdf5
 	.uleb128 0x9
@@ -26296,7 +26315,7 @@ __func__.7630:
 	.8byte	req_sys
 	.uleb128 0x28
 	.4byte	.LASF438
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x47
 	.4byte	0x1abc
 	.uleb128 0x9
@@ -26307,7 +26326,7 @@ __func__.7630:
 	.4byte	0xdf5
 	.uleb128 0x28
 	.4byte	.LASF439
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x48
 	.4byte	0x1abc
 	.uleb128 0x9
@@ -26315,7 +26334,7 @@ __func__.7630:
 	.8byte	req_prgm
 	.uleb128 0x28
 	.4byte	.LASF440
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x49
 	.4byte	0x1abc
 	.uleb128 0x9
@@ -26323,7 +26342,7 @@ __func__.7630:
 	.8byte	req_erase
 	.uleb128 0x28
 	.4byte	.LASF441
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x4a
 	.4byte	0x1abc
 	.uleb128 0x9
@@ -26331,7 +26350,7 @@ __func__.7630:
 	.8byte	req_gc
 	.uleb128 0x28
 	.4byte	.LASF442
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x4b
 	.4byte	0x1abc
 	.uleb128 0x9
@@ -26339,7 +26358,7 @@ __func__.7630:
 	.8byte	req_gc_dst
 	.uleb128 0x28
 	.4byte	.LASF443
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x4d
 	.4byte	0x1abc
 	.uleb128 0x9
@@ -26354,7 +26373,7 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x28
 	.4byte	.LASF444
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x4f
 	.4byte	0x1b2b
 	.uleb128 0x9
@@ -26362,7 +26381,7 @@ __func__.7630:
 	.8byte	p_plane_order_table
 	.uleb128 0x28
 	.4byte	.LASF445
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x51
 	.4byte	0x1001
 	.uleb128 0x9
@@ -26370,7 +26389,7 @@ __func__.7630:
 	.8byte	p_sys_data_buf
 	.uleb128 0x28
 	.4byte	.LASF446
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x52
 	.4byte	0x1001
 	.uleb128 0x9
@@ -26378,7 +26397,7 @@ __func__.7630:
 	.8byte	p_sys_data_buf_1
 	.uleb128 0x28
 	.4byte	.LASF447
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x53
 	.4byte	0x1001
 	.uleb128 0x9
@@ -26386,7 +26405,7 @@ __func__.7630:
 	.8byte	p_vendor_data_buf
 	.uleb128 0x28
 	.4byte	.LASF448
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x54
 	.4byte	0x1001
 	.uleb128 0x9
@@ -26394,7 +26413,7 @@ __func__.7630:
 	.8byte	p_sys_spare_buf
 	.uleb128 0x28
 	.4byte	.LASF449
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x55
 	.4byte	0x1001
 	.uleb128 0x9
@@ -26402,7 +26421,7 @@ __func__.7630:
 	.8byte	p_io_data_buf_0
 	.uleb128 0x28
 	.4byte	.LASF450
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x56
 	.4byte	0x1001
 	.uleb128 0x9
@@ -26410,7 +26429,7 @@ __func__.7630:
 	.8byte	p_io_data_buf_1
 	.uleb128 0x28
 	.4byte	.LASF451
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x57
 	.4byte	0x1001
 	.uleb128 0x9
@@ -26418,7 +26437,7 @@ __func__.7630:
 	.8byte	p_io_spare_buf
 	.uleb128 0x28
 	.4byte	.LASF452
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x58
 	.4byte	0x1001
 	.uleb128 0x9
@@ -26426,7 +26445,7 @@ __func__.7630:
 	.8byte	p_gc_spare_buf
 	.uleb128 0x28
 	.4byte	.LASF453
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x59
 	.4byte	0x1001
 	.uleb128 0x9
@@ -26434,7 +26453,7 @@ __func__.7630:
 	.8byte	p_gc_data_buf
 	.uleb128 0x28
 	.4byte	.LASF454
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x5a
 	.4byte	0x1c22
 	.uleb128 0x9
@@ -26445,7 +26464,7 @@ __func__.7630:
 	.4byte	0x16d6
 	.uleb128 0x28
 	.4byte	.LASF455
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x5b
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26453,7 +26472,7 @@ __func__.7630:
 	.8byte	c_gc_page_buf_num
 	.uleb128 0x28
 	.4byte	.LASF456
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x5c
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26461,7 +26480,7 @@ __func__.7630:
 	.8byte	g_gc_num_req
 	.uleb128 0x28
 	.4byte	.LASF457
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x5d
 	.4byte	0x1c67
 	.uleb128 0x9
@@ -26472,7 +26491,7 @@ __func__.7630:
 	.4byte	0x113b
 	.uleb128 0x28
 	.4byte	.LASF458
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x5e
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26480,7 +26499,7 @@ __func__.7630:
 	.8byte	g_ect_tbl_info_size
 	.uleb128 0x28
 	.4byte	.LASF459
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x5f
 	.4byte	0x10f8
 	.uleb128 0x9
@@ -26488,7 +26507,7 @@ __func__.7630:
 	.8byte	p_erase_count_table
 	.uleb128 0x28
 	.4byte	.LASF460
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x61
 	.4byte	0x10f8
 	.uleb128 0x9
@@ -26496,7 +26515,7 @@ __func__.7630:
 	.8byte	p_swl_mul_table
 	.uleb128 0x28
 	.4byte	.LASF461
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x62
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26504,7 +26523,7 @@ __func__.7630:
 	.8byte	g_totle_swl_count
 	.uleb128 0x28
 	.4byte	.LASF462
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x63
 	.4byte	0x10f8
 	.uleb128 0x9
@@ -26512,7 +26531,7 @@ __func__.7630:
 	.8byte	p_valid_page_count_table
 	.uleb128 0x28
 	.4byte	.LASF463
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x64
 	.4byte	0x10f8
 	.uleb128 0x9
@@ -26520,7 +26539,7 @@ __func__.7630:
 	.8byte	p_valid_page_count_check_table
 	.uleb128 0x28
 	.4byte	.LASF464
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x65
 	.4byte	0x1001
 	.uleb128 0x9
@@ -26528,7 +26547,7 @@ __func__.7630:
 	.8byte	p_blk_mode_table
 	.uleb128 0x28
 	.4byte	.LASF465
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x67
 	.4byte	0x10f8
 	.uleb128 0x9
@@ -26536,7 +26555,7 @@ __func__.7630:
 	.8byte	p_map_block_table
 	.uleb128 0x28
 	.4byte	.LASF466
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x68
 	.4byte	0x10f8
 	.uleb128 0x9
@@ -26544,7 +26563,7 @@ __func__.7630:
 	.8byte	p_map_block_valid_page_count
 	.uleb128 0x28
 	.4byte	.LASF467
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x69
 	.4byte	0x1001
 	.uleb128 0x9
@@ -26552,7 +26571,7 @@ __func__.7630:
 	.8byte	p_map_block_ver_table
 	.uleb128 0x28
 	.4byte	.LASF468
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x6a
 	.4byte	0x1001
 	.uleb128 0x9
@@ -26560,7 +26579,7 @@ __func__.7630:
 	.8byte	p_map_region_ppn_table
 	.uleb128 0x28
 	.4byte	.LASF469
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x6b
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26568,7 +26587,7 @@ __func__.7630:
 	.8byte	g_totle_map_block
 	.uleb128 0x28
 	.4byte	.LASF470
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x6d
 	.4byte	0x10f8
 	.uleb128 0x9
@@ -26576,7 +26595,7 @@ __func__.7630:
 	.8byte	p_vendor_block_table
 	.uleb128 0x28
 	.4byte	.LASF471
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x6e
 	.4byte	0x10f8
 	.uleb128 0x9
@@ -26584,7 +26603,7 @@ __func__.7630:
 	.8byte	p_vendor_block_valid_page_count
 	.uleb128 0x28
 	.4byte	.LASF472
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x6f
 	.4byte	0x1001
 	.uleb128 0x9
@@ -26592,7 +26611,7 @@ __func__.7630:
 	.8byte	p_vendor_block_ver_table
 	.uleb128 0x28
 	.4byte	.LASF473
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x70
 	.4byte	0x1001
 	.uleb128 0x9
@@ -26600,7 +26619,7 @@ __func__.7630:
 	.8byte	p_vendor_region_ppn_table
 	.uleb128 0x28
 	.4byte	.LASF474
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x71
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26608,7 +26627,7 @@ __func__.7630:
 	.8byte	g_totle_vendor_block
 	.uleb128 0x28
 	.4byte	.LASF475
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x73
 	.4byte	0x1de7
 	.uleb128 0x9
@@ -26619,7 +26638,7 @@ __func__.7630:
 	.4byte	0x10fe
 	.uleb128 0x28
 	.4byte	.LASF476
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x74
 	.4byte	0x1001
 	.uleb128 0x9
@@ -26627,7 +26646,7 @@ __func__.7630:
 	.8byte	p_l2p_map_buf
 	.uleb128 0x28
 	.4byte	.LASF477
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x75
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26635,7 +26654,7 @@ __func__.7630:
 	.8byte	g_l2p_last_update_region_id
 	.uleb128 0x28
 	.4byte	.LASF478
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x7c
 	.4byte	0x1e2c
 	.uleb128 0x9
@@ -26646,7 +26665,7 @@ __func__.7630:
 	.4byte	0x1573
 	.uleb128 0x28
 	.4byte	.LASF479
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x7d
 	.4byte	0x1e2c
 	.uleb128 0x9
@@ -26654,7 +26673,7 @@ __func__.7630:
 	.8byte	p_free_data_block_list_head
 	.uleb128 0x28
 	.4byte	.LASF480
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x7f
 	.4byte	0x1e2c
 	.uleb128 0x9
@@ -26662,7 +26681,7 @@ __func__.7630:
 	.8byte	p_data_block_list_head
 	.uleb128 0x28
 	.4byte	.LASF481
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x80
 	.4byte	0x1e2c
 	.uleb128 0x9
@@ -26670,7 +26689,7 @@ __func__.7630:
 	.8byte	p_data_block_list_tail
 	.uleb128 0x28
 	.4byte	.LASF482
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x81
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26678,7 +26697,7 @@ __func__.7630:
 	.8byte	g_num_free_superblocks
 	.uleb128 0x28
 	.4byte	.LASF483
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x82
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26686,7 +26705,7 @@ __func__.7630:
 	.8byte	g_num_data_superblocks
 	.uleb128 0x28
 	.4byte	.LASF484
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x83
 	.4byte	0x15ff
 	.uleb128 0x9
@@ -26694,7 +26713,7 @@ __func__.7630:
 	.8byte	g_active_superblock
 	.uleb128 0x28
 	.4byte	.LASF485
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x84
 	.4byte	0x15ff
 	.uleb128 0x9
@@ -26702,7 +26721,7 @@ __func__.7630:
 	.8byte	g_buffer_superblock
 	.uleb128 0x28
 	.4byte	.LASF486
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x85
 	.4byte	0x15ff
 	.uleb128 0x9
@@ -26710,7 +26729,7 @@ __func__.7630:
 	.8byte	g_gc_temp_superblock
 	.uleb128 0x28
 	.4byte	.LASF487
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x86
 	.4byte	0x15ff
 	.uleb128 0x9
@@ -26718,7 +26737,7 @@ __func__.7630:
 	.8byte	g_gc_superblock
 	.uleb128 0x28
 	.4byte	.LASF488
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x87
 	.4byte	0x1f04
 	.uleb128 0x9
@@ -26729,7 +26748,7 @@ __func__.7630:
 	.4byte	0x15ff
 	.uleb128 0x28
 	.4byte	.LASF489
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x88
 	.4byte	0x1320
 	.uleb128 0x9
@@ -26737,7 +26756,7 @@ __func__.7630:
 	.8byte	g_sys_save_data
 	.uleb128 0x28
 	.4byte	.LASF490
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x89
 	.4byte	0x141d
 	.uleb128 0x9
@@ -26745,7 +26764,7 @@ __func__.7630:
 	.8byte	g_sys_ext_data
 	.uleb128 0x28
 	.4byte	.LASF491
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x8b
 	.4byte	0x1f49
 	.uleb128 0x9
@@ -26756,7 +26775,7 @@ __func__.7630:
 	.4byte	0x16a1
 	.uleb128 0x28
 	.4byte	.LASF492
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x8c
 	.4byte	0x10f8
 	.uleb128 0x9
@@ -26764,7 +26783,7 @@ __func__.7630:
 	.8byte	p_gc_blk_tbl
 	.uleb128 0x28
 	.4byte	.LASF493
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x8d
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26772,7 +26791,7 @@ __func__.7630:
 	.8byte	g_gc_blk_num
 	.uleb128 0x28
 	.4byte	.LASF494
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x8e
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26780,7 +26799,7 @@ __func__.7630:
 	.8byte	g_gc_page_offset
 	.uleb128 0x28
 	.4byte	.LASF495
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x8f
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26788,7 +26807,7 @@ __func__.7630:
 	.8byte	g_gc_cur_blk_valid_pages
 	.uleb128 0x28
 	.4byte	.LASF496
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x90
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26796,7 +26815,7 @@ __func__.7630:
 	.8byte	g_gc_cur_blk_max_valid_pages
 	.uleb128 0x28
 	.4byte	.LASF497
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x91
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26804,7 +26823,7 @@ __func__.7630:
 	.8byte	g_gc_next_blk
 	.uleb128 0x28
 	.4byte	.LASF498
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x92
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26812,7 +26831,7 @@ __func__.7630:
 	.8byte	g_gc_next_blk_1
 	.uleb128 0x28
 	.4byte	.LASF499
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x93
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26820,7 +26839,7 @@ __func__.7630:
 	.8byte	g_gc_bad_block_temp_num
 	.uleb128 0x28
 	.4byte	.LASF500
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x94
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26835,7 +26854,7 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x28
 	.4byte	.LASF501
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x95
 	.4byte	0x200c
 	.uleb128 0x9
@@ -26843,7 +26862,7 @@ __func__.7630:
 	.8byte	g_gc_bad_block_temp_tbl
 	.uleb128 0x28
 	.4byte	.LASF502
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x97
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26851,7 +26870,7 @@ __func__.7630:
 	.8byte	g_gc_free_blk_threshold
 	.uleb128 0x28
 	.4byte	.LASF503
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x98
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26859,7 +26878,7 @@ __func__.7630:
 	.8byte	g_gc_merge_free_blk_threshold
 	.uleb128 0x28
 	.4byte	.LASF504
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x99
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26867,7 +26886,7 @@ __func__.7630:
 	.8byte	g_gc_blk_index
 	.uleb128 0x28
 	.4byte	.LASF505
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x9b
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26875,7 +26894,7 @@ __func__.7630:
 	.8byte	g_totle_gc_page_count
 	.uleb128 0x28
 	.4byte	.LASF506
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x9c
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26883,7 +26902,7 @@ __func__.7630:
 	.8byte	g_totle_write_page_count
 	.uleb128 0x28
 	.4byte	.LASF507
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x9d
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26891,7 +26910,7 @@ __func__.7630:
 	.8byte	g_totle_write_sector
 	.uleb128 0x28
 	.4byte	.LASF508
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x9e
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26899,7 +26918,7 @@ __func__.7630:
 	.8byte	g_totle_read_sector
 	.uleb128 0x28
 	.4byte	.LASF509
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xa0
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26907,7 +26926,7 @@ __func__.7630:
 	.8byte	g_totle_discard_page_count
 	.uleb128 0x28
 	.4byte	.LASF510
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xa1
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26915,7 +26934,7 @@ __func__.7630:
 	.8byte	g_totle_read_page_count
 	.uleb128 0x28
 	.4byte	.LASF511
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xa2
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26923,7 +26942,7 @@ __func__.7630:
 	.8byte	g_tmp_data_superblock_id
 	.uleb128 0x28
 	.4byte	.LASF512
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xa3
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26931,7 +26950,7 @@ __func__.7630:
 	.8byte	g_totle_cache_write_count
 	.uleb128 0x28
 	.4byte	.LASF513
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xa4
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26939,7 +26958,7 @@ __func__.7630:
 	.8byte	g_totle_l2p_write_count
 	.uleb128 0x28
 	.4byte	.LASF514
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xa6
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26947,7 +26966,7 @@ __func__.7630:
 	.8byte	g_totle_mlc_erase_count
 	.uleb128 0x28
 	.4byte	.LASF515
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xa7
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26955,7 +26974,7 @@ __func__.7630:
 	.8byte	g_totle_avg_erase_count
 	.uleb128 0x28
 	.4byte	.LASF516
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xa8
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26963,7 +26982,7 @@ __func__.7630:
 	.8byte	g_min_erase_count
 	.uleb128 0x28
 	.4byte	.LASF517
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xa9
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26971,7 +26990,7 @@ __func__.7630:
 	.8byte	g_totle_slc_erase_count
 	.uleb128 0x28
 	.4byte	.LASF518
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xaa
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26979,7 +26998,7 @@ __func__.7630:
 	.8byte	g_totle_sys_slc_erase_count
 	.uleb128 0x28
 	.4byte	.LASF519
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xab
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26987,7 +27006,7 @@ __func__.7630:
 	.8byte	g_max_erase_count
 	.uleb128 0x28
 	.4byte	.LASF520
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xac
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26995,7 +27014,7 @@ __func__.7630:
 	.8byte	g_in_gc_progress
 	.uleb128 0x28
 	.4byte	.LASF521
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xad
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -27003,7 +27022,7 @@ __func__.7630:
 	.8byte	g_in_swl_replace
 	.uleb128 0x28
 	.4byte	.LASF522
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xae
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -27011,7 +27030,7 @@ __func__.7630:
 	.8byte	g_ftl_nand_free_count
 	.uleb128 0x28
 	.4byte	.LASF523
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xaf
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -27019,7 +27038,7 @@ __func__.7630:
 	.8byte	g_gc_head_data_block
 	.uleb128 0x28
 	.4byte	.LASF524
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xb0
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -27027,7 +27046,7 @@ __func__.7630:
 	.8byte	g_gc_head_data_block_count
 	.uleb128 0x28
 	.4byte	.LASF525
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xb1
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -27035,7 +27054,7 @@ __func__.7630:
 	.8byte	g_gc_skip_write_count
 	.uleb128 0x28
 	.4byte	.LASF526
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xb2
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -27043,7 +27062,7 @@ __func__.7630:
 	.8byte	g_cur_erase_blk
 	.uleb128 0x28
 	.4byte	.LASF527
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xb4
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -27051,7 +27070,7 @@ __func__.7630:
 	.8byte	g_recovery_page_num
 	.uleb128 0x28
 	.4byte	.LASF528
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xb5
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -27066,7 +27085,7 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x28
 	.4byte	.LASF529
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xb6
 	.4byte	0x2268
 	.uleb128 0x9
@@ -27074,7 +27093,7 @@ __func__.7630:
 	.8byte	g_recovery_ppa_tbl
 	.uleb128 0x28
 	.4byte	.LASF530
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xb7
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -27082,7 +27101,7 @@ __func__.7630:
 	.8byte	c_mlc_erase_count_value
 	.uleb128 0x28
 	.4byte	.LASF531
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xb8
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -27090,17 +27109,17 @@ __func__.7630:
 	.8byte	g_power_lost_recovery_flag
 	.uleb128 0x4
 	.4byte	.LASF532
-	.byte	0x17
+	.byte	0x18
 	.byte	0x14
 	.4byte	0xe44
 	.uleb128 0x4
 	.4byte	.LASF533
-	.byte	0x17
+	.byte	0x18
 	.byte	0x15
 	.4byte	0xe44
 	.uleb128 0x4
 	.4byte	.LASF534
-	.byte	0x17
+	.byte	0x18
 	.byte	0x16
 	.4byte	0xee6
 	.uleb128 0xa
@@ -27112,7 +27131,7 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x4
 	.4byte	.LASF535
-	.byte	0x17
+	.byte	0x18
 	.byte	0x17
 	.4byte	0x22d8
 	.uleb128 0x28
@@ -27216,35 +27235,35 @@ __func__.7630:
 	.8byte	gc_ink_free_return_value
 	.uleb128 0xc
 	.4byte	.LASF549
-	.byte	0x1b
+	.byte	0x1c
 	.2byte	0x3ba
 	.4byte	0x10b
 	.uleb128 0xc
 	.4byte	.LASF550
-	.byte	0x1b
+	.byte	0x1c
 	.2byte	0x3bb
 	.4byte	0x10b
 	.uleb128 0xc
 	.4byte	.LASF551
-	.byte	0x1b
+	.byte	0x1c
 	.2byte	0x3bc
 	.4byte	0x10b
 	.uleb128 0xf
 	.4byte	.LASF552
 	.byte	0x4
-	.byte	0x1c
+	.byte	0x6
 	.byte	0xc
 	.4byte	0x2431
 	.uleb128 0x16
 	.string	"pid"
-	.byte	0x1c
+	.byte	0x6
 	.byte	0xd
 	.4byte	0x5b
 	.byte	0
 	.byte	0
 	.uleb128 0x4
 	.4byte	.LASF553
-	.byte	0x1c
+	.byte	0x6
 	.byte	0x10
 	.4byte	0x243c
 	.uleb128 0x8
@@ -27297,34 +27316,34 @@ __func__.7630:
 	.uleb128 0x2d
 	.4byte	.LASF558
 	.byte	0x1
-	.byte	0xf7
+	.byte	0xfb
 	.4byte	0x5b
-	.8byte	.LFB347
-	.8byte	.LFE347-.LFB347
+	.8byte	.LFB348
+	.8byte	.LFE348-.LFB348
 	.uleb128 0x1
 	.byte	0x9c
 	.4byte	0x2527
 	.uleb128 0x2e
 	.4byte	.LASF556
 	.byte	0x1
-	.byte	0xf7
+	.byte	0xfb
 	.4byte	0x12c
-	.4byte	.LLST468
+	.4byte	.LLST470
 	.uleb128 0x2e
 	.4byte	.LASF557
 	.byte	0x1
-	.byte	0xf7
+	.byte	0xfb
 	.4byte	0x12c
-	.4byte	.LLST469
+	.4byte	.LLST471
 	.uleb128 0x2e
 	.4byte	.LASF325
 	.byte	0x1
-	.byte	0xf7
+	.byte	0xfb
 	.4byte	0x30
-	.4byte	.LLST470
+	.4byte	.LLST472
 	.uleb128 0x2f
-	.8byte	.LVL2176
-	.4byte	0xa8ab
+	.8byte	.LVL2178
+	.4byte	0xa926
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -27354,34 +27373,34 @@ __func__.7630:
 	.uleb128 0x2d
 	.4byte	.LASF559
 	.byte	0x1
-	.byte	0xf2
+	.byte	0xf6
 	.4byte	0x12c
-	.8byte	.LFB346
-	.8byte	.LFE346-.LFB346
+	.8byte	.LFB347
+	.8byte	.LFE347-.LFB347
 	.uleb128 0x1
 	.byte	0x9c
 	.4byte	0x259f
 	.uleb128 0x2e
 	.4byte	.LASF560
 	.byte	0x1
-	.byte	0xf2
+	.byte	0xf6
 	.4byte	0x12c
-	.4byte	.LLST303
+	.4byte	.LLST305
 	.uleb128 0x2e
 	.4byte	.LASF561
 	.byte	0x1
-	.byte	0xf2
+	.byte	0xf6
 	.4byte	0x16f
-	.4byte	.LLST304
+	.4byte	.LLST306
 	.uleb128 0x2e
 	.4byte	.LASF30
 	.byte	0x1
-	.byte	0xf2
+	.byte	0xf6
 	.4byte	0x30
-	.4byte	.LLST305
+	.4byte	.LLST307
 	.uleb128 0x2f
-	.8byte	.LVL1241
-	.4byte	0xa8b6
+	.8byte	.LVL1243
+	.4byte	0xa931
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -27411,34 +27430,34 @@ __func__.7630:
 	.uleb128 0x2d
 	.4byte	.LASF562
 	.byte	0x1
-	.byte	0xed
+	.byte	0xf1
 	.4byte	0x12c
-	.8byte	.LFB345
-	.8byte	.LFE345-.LFB345
+	.8byte	.LFB346
+	.8byte	.LFE346-.LFB346
 	.uleb128 0x1
 	.byte	0x9c
 	.4byte	0x2611
 	.uleb128 0x31
 	.string	"s"
 	.byte	0x1
-	.byte	0xed
+	.byte	0xf1
 	.4byte	0x12c
-	.4byte	.LLST196
+	.4byte	.LLST198
 	.uleb128 0x31
 	.string	"c"
 	.byte	0x1
-	.byte	0xed
+	.byte	0xf1
 	.4byte	0x5b
-	.4byte	.LLST197
+	.4byte	.LLST199
 	.uleb128 0x31
 	.string	"n"
 	.byte	0x1
-	.byte	0xed
+	.byte	0xf1
 	.4byte	0x30
-	.4byte	.LLST198
+	.4byte	.LLST200
 	.uleb128 0x2f
-	.8byte	.LVL738
-	.4byte	0xa8c2
+	.8byte	.LVL740
+	.4byte	0xa93d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -27468,39 +27487,39 @@ __func__.7630:
 	.uleb128 0x2d
 	.4byte	.LASF563
 	.byte	0x1
-	.byte	0xdb
+	.byte	0xdf
 	.4byte	0xae
-	.8byte	.LFB344
-	.8byte	.LFE344-.LFB344
+	.8byte	.LFB345
+	.8byte	.LFE345-.LFB345
 	.uleb128 0x1
 	.byte	0x9c
 	.4byte	0x26cd
 	.uleb128 0x2e
 	.4byte	.LASF564
 	.byte	0x1
-	.byte	0xdb
+	.byte	0xdf
 	.4byte	0xf37
-	.4byte	.LLST299
+	.4byte	.LLST301
 	.uleb128 0x31
 	.string	"die"
 	.byte	0x1
-	.byte	0xdb
+	.byte	0xdf
 	.4byte	0xb9
-	.4byte	.LLST300
+	.4byte	.LLST302
 	.uleb128 0x32
 	.4byte	.LASF325
 	.byte	0x1
-	.byte	0xdd
+	.byte	0xe1
 	.4byte	0xa3
-	.4byte	.LLST301
+	.4byte	.LLST303
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x1
-	.byte	0xdd
+	.byte	0xe1
 	.4byte	0xa3
-	.4byte	.LLST302
+	.4byte	.LLST304
 	.uleb128 0x34
-	.8byte	.LVL1228
+	.8byte	.LVL1230
 	.4byte	0x259f
 	.4byte	0x2691
 	.uleb128 0x30
@@ -27523,7 +27542,7 @@ __func__.7630:
 	.2byte	0x100
 	.byte	0
 	.uleb128 0x35
-	.8byte	.LVL1229
+	.8byte	.LVL1231
 	.4byte	0x26ab
 	.uleb128 0x30
 	.uleb128 0x1
@@ -27539,7 +27558,7 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1232
+	.8byte	.LVL1234
 	.4byte	0x259f
 	.uleb128 0x30
 	.uleb128 0x1
@@ -27562,36 +27581,36 @@ __func__.7630:
 	.byte	0
 	.byte	0
 	.uleb128 0x37
-	.4byte	.LASF586
+	.4byte	.LASF589
 	.byte	0x1
-	.byte	0xc0
+	.byte	0xc4
 	.4byte	0xddf
 	.byte	0x1
 	.4byte	0x2711
 	.uleb128 0x38
 	.4byte	.LASF577
 	.byte	0x1
-	.byte	0xc0
+	.byte	0xc4
 	.4byte	0xdc9
 	.uleb128 0x39
 	.string	"sts"
 	.byte	0x1
-	.byte	0xc2
+	.byte	0xc6
 	.4byte	0xddf
 	.uleb128 0x3a
 	.4byte	.LASF565
 	.byte	0x1
-	.byte	0xc3
+	.byte	0xc7
 	.4byte	0x2711
 	.uleb128 0x39
 	.string	"req"
 	.byte	0x1
-	.byte	0xc4
+	.byte	0xc8
 	.4byte	0xdf5
 	.uleb128 0x3b
 	.string	"out"
 	.byte	0x1
-	.byte	0xd6
+	.byte	0xda
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xdd4
@@ -27603,41 +27622,41 @@ __func__.7630:
 	.uleb128 0x3c
 	.4byte	.LASF566
 	.byte	0x1
-	.byte	0xaa
+	.byte	0xae
 	.4byte	0xae
-	.8byte	.LFB342
-	.8byte	.LFE342-.LFB342
+	.8byte	.LFB343
+	.8byte	.LFE343-.LFB343
 	.uleb128 0x1
 	.byte	0x9c
 	.4byte	0x27e7
 	.uleb128 0x2e
 	.4byte	.LASF567
 	.byte	0x1
-	.byte	0xaa
+	.byte	0xae
 	.4byte	0x12c
-	.4byte	.LLST175
+	.4byte	.LLST177
 	.uleb128 0x2e
 	.4byte	.LASF568
 	.byte	0x1
-	.byte	0xaa
+	.byte	0xae
 	.4byte	0xb9
-	.4byte	.LLST176
+	.4byte	.LLST178
 	.uleb128 0x2e
 	.4byte	.LASF569
 	.byte	0x1
-	.byte	0xaa
+	.byte	0xae
 	.4byte	0xb9
-	.4byte	.LLST177
+	.4byte	.LLST179
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x1
-	.byte	0xac
+	.byte	0xb0
 	.4byte	0xb9
-	.4byte	.LLST178
+	.4byte	.LLST180
 	.uleb128 0x3d
 	.string	"cs"
 	.byte	0x1
-	.byte	0xac
+	.byte	0xb0
 	.4byte	0xb9
 	.uleb128 0x2
 	.byte	0x91
@@ -27645,13 +27664,13 @@ __func__.7630:
 	.uleb128 0x32
 	.4byte	.LASF276
 	.byte	0x1
-	.byte	0xac
+	.byte	0xb0
 	.4byte	0xb9
-	.4byte	.LLST179
+	.4byte	.LLST181
 	.uleb128 0x2b
 	.4byte	.LASF570
 	.byte	0x1
-	.byte	0xac
+	.byte	0xb0
 	.4byte	0xb9
 	.uleb128 0x2
 	.byte	0x91
@@ -27659,18 +27678,18 @@ __func__.7630:
 	.uleb128 0x33
 	.string	"req"
 	.byte	0x1
-	.byte	0xad
+	.byte	0xb1
 	.4byte	0x1abc
-	.4byte	.LLST180
+	.4byte	.LLST182
 	.uleb128 0x32
 	.4byte	.LASF571
 	.byte	0x1
-	.byte	0xae
+	.byte	0xb2
 	.4byte	0xb9
-	.4byte	.LLST181
+	.4byte	.LLST183
 	.uleb128 0x36
-	.8byte	.LVL669
-	.4byte	0x96be
+	.8byte	.LVL671
+	.4byte	0x9739
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -27693,47 +27712,47 @@ __func__.7630:
 	.uleb128 0x3c
 	.4byte	.LASF572
 	.byte	0x1
-	.byte	0x6e
+	.byte	0x72
 	.4byte	0xae
-	.8byte	.LFB341
-	.8byte	.LFE341-.LFB341
+	.8byte	.LFB342
+	.8byte	.LFE342-.LFB342
 	.uleb128 0x1
 	.byte	0x9c
 	.4byte	0x298f
 	.uleb128 0x2e
 	.4byte	.LASF567
 	.byte	0x1
-	.byte	0x6e
+	.byte	0x72
 	.4byte	0x12c
-	.4byte	.LLST167
+	.4byte	.LLST169
 	.uleb128 0x2e
 	.4byte	.LASF569
 	.byte	0x1
-	.byte	0x6e
+	.byte	0x72
 	.4byte	0xb9
-	.4byte	.LLST168
+	.4byte	.LLST170
 	.uleb128 0x2e
 	.4byte	.LASF568
 	.byte	0x1
-	.byte	0x6e
+	.byte	0x72
 	.4byte	0xb9
-	.4byte	.LLST169
+	.4byte	.LLST171
 	.uleb128 0x2e
 	.4byte	.LASF573
 	.byte	0x1
-	.byte	0x6e
+	.byte	0x72
 	.4byte	0xb9
-	.4byte	.LLST170
+	.4byte	.LLST172
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x1
-	.byte	0x70
+	.byte	0x74
 	.4byte	0xb9
-	.4byte	.LLST171
+	.4byte	.LLST173
 	.uleb128 0x3d
 	.string	"cs"
 	.byte	0x1
-	.byte	0x70
+	.byte	0x74
 	.4byte	0xb9
 	.uleb128 0x2
 	.byte	0x91
@@ -27741,13 +27760,13 @@ __func__.7630:
 	.uleb128 0x32
 	.4byte	.LASF276
 	.byte	0x1
-	.byte	0x70
+	.byte	0x74
 	.4byte	0xb9
-	.4byte	.LLST172
+	.4byte	.LLST174
 	.uleb128 0x2b
 	.4byte	.LASF570
 	.byte	0x1
-	.byte	0x70
+	.byte	0x74
 	.4byte	0xb9
 	.uleb128 0x2
 	.byte	0x91
@@ -27755,34 +27774,34 @@ __func__.7630:
 	.uleb128 0x32
 	.4byte	.LASF571
 	.byte	0x1
-	.byte	0x71
+	.byte	0x75
 	.4byte	0xb9
-	.4byte	.LLST173
+	.4byte	.LLST175
 	.uleb128 0x33
 	.string	"req"
 	.byte	0x1
-	.byte	0x72
+	.byte	0x76
 	.4byte	0x1abc
-	.4byte	.LLST174
+	.4byte	.LLST176
 	.uleb128 0x3f
 	.4byte	.LASF574
 	.4byte	0x299f
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.7630
+	.8byte	__func__.7632
 	.uleb128 0x40
 	.4byte	.Ldebug_ranges0+0xd0
 	.4byte	0x2941
 	.uleb128 0x2b
 	.4byte	.LASF575
 	.byte	0x1
-	.byte	0x8d
+	.byte	0x91
 	.4byte	0xdf5
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -32
 	.uleb128 0x34
-	.8byte	.LVL657
+	.8byte	.LVL659
 	.4byte	0x29a4
 	.4byte	0x28e7
 	.uleb128 0x30
@@ -27804,8 +27823,8 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL658
-	.4byte	0xa8ce
+	.8byte	.LVL660
+	.4byte	0xa949
 	.4byte	0x2906
 	.uleb128 0x30
 	.uleb128 0x1
@@ -27815,8 +27834,8 @@ __func__.7630:
 	.8byte	.LC79
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL659
-	.4byte	0xa8ce
+	.8byte	.LVL661
+	.4byte	0xa949
 	.4byte	0x2925
 	.uleb128 0x30
 	.uleb128 0x1
@@ -27826,8 +27845,8 @@ __func__.7630:
 	.8byte	.LC80
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL660
-	.4byte	0xa8ce
+	.8byte	.LVL662
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -27837,8 +27856,8 @@ __func__.7630:
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL648
-	.4byte	0xa8ce
+	.8byte	.LVL650
+	.4byte	0xa949
 	.4byte	0x296c
 	.uleb128 0x30
 	.uleb128 0x1
@@ -27857,11 +27876,11 @@ __func__.7630:
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x8
-	.byte	0x76
+	.byte	0x7a
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL649
-	.4byte	0x96be
+	.8byte	.LVL651
+	.4byte	0x9739
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -27893,41 +27912,41 @@ __func__.7630:
 	.uleb128 0x3c
 	.4byte	.LASF576
 	.byte	0x1
-	.byte	0x50
+	.byte	0x54
 	.4byte	0xae
-	.8byte	.LFB340
-	.8byte	.LFE340-.LFB340
+	.8byte	.LFB341
+	.8byte	.LFE341-.LFB341
 	.uleb128 0x1
 	.byte	0x9c
 	.4byte	0x2a9d
 	.uleb128 0x2e
 	.4byte	.LASF567
 	.byte	0x1
-	.byte	0x50
+	.byte	0x54
 	.4byte	0x12c
-	.4byte	.LLST152
+	.4byte	.LLST154
 	.uleb128 0x2e
 	.4byte	.LASF569
 	.byte	0x1
-	.byte	0x50
+	.byte	0x54
 	.4byte	0xb9
-	.4byte	.LLST153
+	.4byte	.LLST155
 	.uleb128 0x2e
 	.4byte	.LASF568
 	.byte	0x1
-	.byte	0x50
+	.byte	0x54
 	.4byte	0xb9
-	.4byte	.LLST154
+	.4byte	.LLST156
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x1
-	.byte	0x52
+	.byte	0x56
 	.4byte	0xb9
-	.4byte	.LLST155
+	.4byte	.LLST157
 	.uleb128 0x3d
 	.string	"cs"
 	.byte	0x1
-	.byte	0x52
+	.byte	0x56
 	.4byte	0xb9
 	.uleb128 0x2
 	.byte	0x91
@@ -27935,13 +27954,13 @@ __func__.7630:
 	.uleb128 0x32
 	.4byte	.LASF276
 	.byte	0x1
-	.byte	0x52
+	.byte	0x56
 	.4byte	0xb9
-	.4byte	.LLST156
+	.4byte	.LLST158
 	.uleb128 0x2b
 	.4byte	.LASF570
 	.byte	0x1
-	.byte	0x52
+	.byte	0x56
 	.4byte	0xb9
 	.uleb128 0x2
 	.byte	0x91
@@ -27949,23 +27968,23 @@ __func__.7630:
 	.uleb128 0x32
 	.4byte	.LASF571
 	.byte	0x1
-	.byte	0x53
+	.byte	0x57
 	.4byte	0xb9
-	.4byte	.LLST157
+	.4byte	.LLST159
 	.uleb128 0x39
 	.string	"req"
 	.byte	0x1
-	.byte	0x54
+	.byte	0x58
 	.4byte	0x1abc
 	.uleb128 0x3f
 	.4byte	.LASF574
 	.4byte	0x299f
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.7613
+	.8byte	__func__.7615
 	.uleb128 0x34
-	.8byte	.LVL602
-	.4byte	0xa8ce
+	.8byte	.LVL604
+	.4byte	0xa949
 	.4byte	0x2a7a
 	.uleb128 0x30
 	.uleb128 0x1
@@ -27984,11 +28003,11 @@ __func__.7630:
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x8
-	.byte	0x58
+	.byte	0x5c
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL603
-	.4byte	0x96be
+	.8byte	.LVL605
+	.4byte	0x9739
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -28009,129 +28028,129 @@ __func__.7630:
 	.byte	0
 	.byte	0
 	.uleb128 0x41
-	.4byte	.LASF883
+	.4byte	.LASF885
 	.byte	0x1
-	.byte	0x36
+	.byte	0x3a
 	.4byte	0xb9
 	.byte	0x1
 	.4byte	0x2b1c
 	.uleb128 0x42
 	.string	"req"
 	.byte	0x1
-	.byte	0x36
+	.byte	0x3a
 	.4byte	0x1abc
 	.uleb128 0x38
 	.4byte	.LASF570
 	.byte	0x1
-	.byte	0x36
+	.byte	0x3a
 	.4byte	0xe3e
 	.uleb128 0x38
 	.4byte	.LASF578
 	.byte	0x1
-	.byte	0x36
+	.byte	0x3a
 	.4byte	0xe3e
 	.uleb128 0x3a
 	.4byte	.LASF579
 	.byte	0x1
-	.byte	0x38
+	.byte	0x3c
 	.4byte	0xa3
 	.uleb128 0x3a
 	.4byte	.LASF580
 	.byte	0x1
-	.byte	0x38
+	.byte	0x3c
 	.4byte	0xa3
 	.uleb128 0x3a
 	.4byte	.LASF285
 	.byte	0x1
-	.byte	0x39
+	.byte	0x3d
 	.4byte	0xa3
 	.uleb128 0x3a
 	.4byte	.LASF286
 	.byte	0x1
-	.byte	0x39
+	.byte	0x3d
 	.4byte	0xa3
 	.uleb128 0x3a
 	.4byte	.LASF581
 	.byte	0x1
-	.byte	0x3a
+	.byte	0x3e
 	.4byte	0xb9
 	.uleb128 0x3a
 	.4byte	.LASF277
 	.byte	0x1
-	.byte	0x3b
+	.byte	0x3f
 	.4byte	0xb9
 	.uleb128 0x3a
 	.4byte	.LASF582
 	.byte	0x1
-	.byte	0x3c
+	.byte	0x40
 	.4byte	0xb9
 	.byte	0
 	.uleb128 0x43
-	.4byte	.LASF619
+	.4byte	.LASF585
 	.byte	0x1
-	.byte	0x1c
-	.8byte	.LFB338
-	.8byte	.LFE338-.LFB338
+	.byte	0x20
+	.8byte	.LFB339
+	.8byte	.LFE339-.LFB339
 	.uleb128 0x1
 	.byte	0x9c
 	.4byte	0x2c25
 	.uleb128 0x31
 	.string	"s"
 	.byte	0x1
-	.byte	0x1c
+	.byte	0x20
 	.4byte	0xfa
-	.4byte	.LLST143
+	.4byte	.LLST145
 	.uleb128 0x31
 	.string	"buf"
 	.byte	0x1
-	.byte	0x1c
+	.byte	0x20
 	.4byte	0x12c
-	.4byte	.LLST144
+	.4byte	.LLST146
 	.uleb128 0x2e
 	.4byte	.LASF583
 	.byte	0x1
-	.byte	0x1c
+	.byte	0x20
 	.4byte	0x5b
-	.4byte	.LLST145
+	.4byte	.LLST147
 	.uleb128 0x31
 	.string	"len"
 	.byte	0x1
-	.byte	0x1c
+	.byte	0x20
 	.4byte	0x5b
-	.4byte	.LLST146
+	.4byte	.LLST148
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x1
-	.byte	0x1e
+	.byte	0x22
 	.4byte	0xb9
-	.4byte	.LLST147
+	.4byte	.LLST149
 	.uleb128 0x33
 	.string	"j"
 	.byte	0x1
-	.byte	0x1e
+	.byte	0x22
 	.4byte	0xb9
-	.4byte	.LLST148
+	.4byte	.LLST150
 	.uleb128 0x33
 	.string	"p8"
 	.byte	0x1
-	.byte	0x1f
+	.byte	0x23
 	.4byte	0xfa
-	.4byte	.LLST149
+	.4byte	.LLST151
 	.uleb128 0x33
 	.string	"p16"
 	.byte	0x1
-	.byte	0x20
+	.byte	0x24
 	.4byte	0x2c25
-	.4byte	.LLST150
+	.4byte	.LLST152
 	.uleb128 0x33
 	.string	"p32"
 	.byte	0x1
-	.byte	0x21
+	.byte	0x25
 	.4byte	0xe3e
-	.4byte	.LLST151
+	.4byte	.LLST153
 	.uleb128 0x44
-	.8byte	.LVL587
-	.4byte	0xa8ce
+	.8byte	.LVL589
+	.4byte	0xa949
 	.4byte	0x2bd8
 	.uleb128 0x30
 	.uleb128 0x1
@@ -28141,8 +28160,8 @@ __func__.7630:
 	.8byte	.LC78
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL588
-	.4byte	0xa8ce
+	.8byte	.LVL590
+	.4byte	0xa949
 	.4byte	0x2bfc
 	.uleb128 0x30
 	.uleb128 0x1
@@ -28164,11 +28183,11 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL589
-	.4byte	0xa8ce
+	.8byte	.LVL591
+	.4byte	0xa949
 	.uleb128 0x36
-	.8byte	.LVL592
-	.4byte	0xa8ce
+	.8byte	.LVL594
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28183,22 +28202,22 @@ __func__.7630:
 	.uleb128 0x2d
 	.4byte	.LASF584
 	.byte	0x1
-	.byte	0x17
+	.byte	0x1b
 	.4byte	0x12c
-	.8byte	.LFB337
-	.8byte	.LFE337-.LFB337
+	.8byte	.LFB338
+	.8byte	.LFE338-.LFB338
 	.uleb128 0x1
 	.byte	0x9c
 	.4byte	0x2c7c
 	.uleb128 0x2e
 	.4byte	.LASF30
 	.byte	0x1
-	.byte	0x17
+	.byte	0x1b
 	.4byte	0x5b
-	.4byte	.LLST142
+	.4byte	.LLST144
 	.uleb128 0x2f
-	.8byte	.LVL579
-	.4byte	0xa8d9
+	.8byte	.LVL581
+	.4byte	0xa954
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28219,8 +28238,57 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.byte	0
+	.uleb128 0x43
+	.4byte	.LASF586
+	.byte	0x1
+	.byte	0x17
+	.8byte	.LFB337
+	.8byte	.LFE337-.LFB337
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2cdf
+	.uleb128 0x31
+	.string	"buf"
+	.byte	0x1
+	.byte	0x17
+	.4byte	0x12c
+	.4byte	.LLST142
 	.uleb128 0x46
-	.4byte	.LASF585
+	.4byte	0x2cdf
+	.8byte	.LBB217
+	.8byte	.LBE217-.LBB217
+	.byte	0x1
+	.byte	0x19
+	.uleb128 0x47
+	.4byte	0x2ceb
+	.4byte	.LLST143
+	.uleb128 0x2f
+	.8byte	.LVL579
+	.4byte	0xa95f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LASF886
+	.byte	0x6
+	.byte	0x4e
+	.byte	0x3
+	.4byte	0x2cf7
+	.uleb128 0x38
+	.4byte	.LASF587
+	.byte	0x6
+	.byte	0x4e
+	.4byte	0x16f
+	.byte	0
+	.uleb128 0x49
+	.4byte	.LASF588
 	.byte	0x5
 	.2byte	0x2f8
 	.4byte	0xb9
@@ -28228,10 +28296,10 @@ __func__.7630:
 	.8byte	.LFE320-.LFB320
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2cb7
+	.4byte	0x2d32
 	.uleb128 0x2f
-	.8byte	.LVL1928
-	.4byte	0x2cb7
+	.8byte	.LVL1930
+	.4byte	0x2d32
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28244,88 +28312,88 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.byte	0
-	.uleb128 0x47
-	.4byte	.LASF587
+	.uleb128 0x4a
+	.4byte	.LASF590
 	.byte	0x5
 	.2byte	0x1d5
 	.4byte	0x5b
 	.byte	0x1
-	.4byte	0x2d84
-	.uleb128 0x48
-	.4byte	.LASF588
+	.4byte	0x2dff
+	.uleb128 0x4b
+	.4byte	.LASF591
 	.byte	0x5
 	.2byte	0x1d5
 	.4byte	0xdd4
-	.uleb128 0x48
-	.4byte	.LASF589
+	.uleb128 0x4b
+	.4byte	.LASF592
 	.byte	0x5
 	.2byte	0x1d5
 	.4byte	0xdd4
-	.uleb128 0x49
-	.4byte	.LASF590
+	.uleb128 0x4c
+	.4byte	.LASF593
 	.byte	0x5
 	.2byte	0x1d7
 	.4byte	0xdc9
-	.uleb128 0x4a
+	.uleb128 0x4d
 	.string	"lpa"
 	.byte	0x5
 	.2byte	0x1d8
 	.4byte	0xdd4
-	.uleb128 0x4a
+	.uleb128 0x4d
 	.string	"ppa"
 	.byte	0x5
 	.2byte	0x1d8
 	.4byte	0xdd4
-	.uleb128 0x49
-	.4byte	.LASF591
+	.uleb128 0x4c
+	.4byte	.LASF594
 	.byte	0x5
 	.2byte	0x1d9
 	.4byte	0xdc9
-	.uleb128 0x49
+	.uleb128 0x4c
 	.4byte	.LASF299
 	.byte	0x5
 	.2byte	0x1da
 	.4byte	0xdc9
-	.uleb128 0x49
-	.4byte	.LASF592
+	.uleb128 0x4c
+	.4byte	.LASF595
 	.byte	0x5
 	.2byte	0x1da
 	.4byte	0xdc9
-	.uleb128 0x49
-	.4byte	.LASF593
+	.uleb128 0x4c
+	.4byte	.LASF596
 	.byte	0x5
 	.2byte	0x1da
 	.4byte	0xdc9
-	.uleb128 0x49
-	.4byte	.LASF594
+	.uleb128 0x4c
+	.4byte	.LASF597
 	.byte	0x5
 	.2byte	0x1da
 	.4byte	0xdc9
-	.uleb128 0x49
-	.4byte	.LASF595
+	.uleb128 0x4c
+	.4byte	.LASF598
 	.byte	0x5
 	.2byte	0x1db
 	.4byte	0xdc9
-	.uleb128 0x49
-	.4byte	.LASF596
+	.uleb128 0x4c
+	.4byte	.LASF599
 	.byte	0x5
 	.2byte	0x1dc
-	.4byte	0x2d84
-	.uleb128 0x4b
-	.4byte	.LASF597
+	.4byte	0x2dff
+	.uleb128 0x4e
+	.4byte	.LASF600
 	.byte	0x5
 	.2byte	0x276
-	.uleb128 0x4b
-	.4byte	.LASF598
+	.uleb128 0x4e
+	.4byte	.LASF601
 	.byte	0x5
 	.2byte	0x279
-	.uleb128 0x4c
+	.uleb128 0x4f
 	.4byte	.LASF574
-	.4byte	0x2d9a
-	.4byte	.LASF587
-	.uleb128 0x4d
-	.uleb128 0x49
-	.4byte	.LASF599
+	.4byte	0x2e15
+	.4byte	.LASF590
+	.uleb128 0x50
+	.uleb128 0x4c
+	.4byte	.LASF602
 	.byte	0x5
 	.2byte	0x1f3
 	.4byte	0xdc9
@@ -28336,97 +28404,97 @@ __func__.7630:
 	.4byte	0x1238
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x2d9a
+	.4byte	0x2e15
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x16
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x2d8a
-	.uleb128 0x47
-	.4byte	.LASF600
+	.4byte	0x2e05
+	.uleb128 0x4a
+	.4byte	.LASF603
 	.byte	0x5
 	.2byte	0x1a2
 	.4byte	0x5b
 	.byte	0x1
-	.4byte	0x2dff
-	.uleb128 0x4a
+	.4byte	0x2e7a
+	.uleb128 0x4d
 	.string	"ret"
 	.byte	0x5
 	.2byte	0x1a4
 	.4byte	0x5b
-	.uleb128 0x4a
+	.uleb128 0x4d
 	.string	"i"
 	.byte	0x5
 	.2byte	0x1a5
 	.4byte	0x5b
-	.uleb128 0x4a
+	.uleb128 0x4d
 	.string	"ppa"
 	.byte	0x5
 	.2byte	0x1a6
 	.4byte	0xdd4
-	.uleb128 0x49
+	.uleb128 0x4c
 	.4byte	.LASF565
 	.byte	0x5
 	.2byte	0x1a7
 	.4byte	0x2711
-	.uleb128 0x4e
-	.4byte	0x2df0
-	.uleb128 0x49
-	.4byte	.LASF601
+	.uleb128 0x51
+	.4byte	0x2e6b
+	.uleb128 0x4c
+	.4byte	.LASF604
 	.byte	0x5
 	.2byte	0x1b1
 	.4byte	0xdf5
 	.byte	0
-	.uleb128 0x4d
-	.uleb128 0x49
-	.4byte	.LASF602
+	.uleb128 0x50
+	.uleb128 0x4c
+	.4byte	.LASF605
 	.byte	0x5
 	.2byte	0x1c6
 	.4byte	0xdd4
 	.byte	0
 	.byte	0
-	.uleb128 0x47
-	.4byte	.LASF603
+	.uleb128 0x4a
+	.4byte	.LASF606
 	.byte	0x5
 	.2byte	0x185
 	.4byte	0x5b
 	.byte	0x1
-	.4byte	0x2e49
-	.uleb128 0x48
-	.4byte	.LASF604
+	.4byte	0x2ec4
+	.uleb128 0x4b
+	.4byte	.LASF607
 	.byte	0x5
 	.2byte	0x185
 	.4byte	0xdc9
-	.uleb128 0x49
-	.4byte	.LASF592
+	.uleb128 0x4c
+	.4byte	.LASF595
 	.byte	0x5
 	.2byte	0x187
 	.4byte	0xdc9
-	.uleb128 0x4a
+	.uleb128 0x4d
 	.string	"i"
 	.byte	0x5
 	.2byte	0x188
 	.4byte	0xdc9
-	.uleb128 0x4a
+	.uleb128 0x4d
 	.string	"j"
 	.byte	0x5
 	.2byte	0x188
 	.4byte	0xdc9
-	.uleb128 0x49
+	.uleb128 0x4c
 	.4byte	.LASF388
 	.byte	0x5
 	.2byte	0x189
 	.4byte	0xdc9
 	.byte	0
-	.uleb128 0x4f
-	.4byte	.LASF714
+	.uleb128 0x52
+	.4byte	.LASF715
 	.byte	0x5
 	.2byte	0x17a
 	.4byte	0x5b
 	.byte	0x1
-	.uleb128 0x46
-	.4byte	.LASF605
+	.uleb128 0x49
+	.4byte	.LASF608
 	.byte	0x5
 	.2byte	0x166
 	.4byte	0x5b
@@ -28434,29 +28502,29 @@ __func__.7630:
 	.8byte	.LFE315-.LFB315
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2ef8
-	.uleb128 0x50
+	.4byte	0x2f73
+	.uleb128 0x53
 	.4byte	.LASF388
 	.byte	0x5
 	.2byte	0x166
 	.4byte	0xdc9
 	.4byte	.LLST139
-	.uleb128 0x51
+	.uleb128 0x54
 	.string	"i"
 	.byte	0x5
 	.2byte	0x168
 	.4byte	0xdc9
 	.4byte	.LLST140
-	.uleb128 0x52
-	.4byte	.LASF606
+	.uleb128 0x55
+	.4byte	.LASF609
 	.byte	0x5
 	.2byte	0x169
 	.4byte	0xdc9
 	.4byte	.LLST141
 	.uleb128 0x34
 	.8byte	.LVL565
-	.4byte	0x6cf6
-	.4byte	0x2ebe
+	.4byte	0x6d71
+	.4byte	0x2f39
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28466,8 +28534,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL568
-	.4byte	0xa8ce
-	.4byte	0x2ee3
+	.4byte	0xa949
+	.4byte	0x2f5e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28483,7 +28551,7 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x36
 	.8byte	.LVL569
-	.4byte	0x2ef8
+	.4byte	0x2f73
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28492,8 +28560,8 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF607
+	.uleb128 0x49
+	.4byte	.LASF610
 	.byte	0x5
 	.2byte	0x158
 	.4byte	0x5b
@@ -28501,16 +28569,16 @@ __func__.7630:
 	.8byte	.LFE314-.LFB314
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2f4c
-	.uleb128 0x50
-	.4byte	.LASF608
+	.4byte	0x2fc7
+	.uleb128 0x53
+	.4byte	.LASF587
 	.byte	0x5
 	.2byte	0x158
 	.4byte	0xdc9
 	.4byte	.LLST138
 	.uleb128 0x36
 	.8byte	.LVL561
-	.4byte	0xa8ce
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28525,8 +28593,8 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF609
+	.uleb128 0x49
+	.4byte	.LASF611
 	.byte	0x5
 	.2byte	0x13b
 	.4byte	0xdd4
@@ -28534,23 +28602,23 @@ __func__.7630:
 	.8byte	.LFE313-.LFB313
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3012
-	.uleb128 0x51
+	.4byte	0x308d
+	.uleb128 0x54
 	.string	"i"
 	.byte	0x5
 	.2byte	0x13d
 	.4byte	0xdc9
-	.4byte	.LLST409
-	.uleb128 0x52
-	.4byte	.LASF596
+	.4byte	.LLST411
+	.uleb128 0x55
+	.4byte	.LASF599
 	.byte	0x5
 	.2byte	0x13e
-	.4byte	0x2d84
-	.4byte	.LLST410
+	.4byte	0x2dff
+	.4byte	.LLST412
 	.uleb128 0x34
-	.8byte	.LVL1808
+	.8byte	.LVL1810
 	.4byte	0x27e7
-	.4byte	0x2fa8
+	.4byte	0x3023
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
@@ -28563,9 +28631,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1810
-	.4byte	0x35c6
-	.4byte	0x2fc6
+	.8byte	.LVL1812
+	.4byte	0x3641
+	.4byte	0x3041
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28580,9 +28648,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1811
-	.4byte	0x32a5
-	.4byte	0x2fdd
+	.8byte	.LVL1813
+	.4byte	0x3320
+	.4byte	0x3058
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28590,20 +28658,20 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1813
-	.4byte	0x7574
+	.8byte	.LVL1815
+	.4byte	0x75ef
 	.uleb128 0x45
-	.8byte	.LVL1814
-	.4byte	0x72c7
+	.8byte	.LVL1816
+	.4byte	0x7342
 	.uleb128 0x45
-	.8byte	.LVL1815
-	.4byte	0x324a
+	.8byte	.LVL1817
+	.4byte	0x32c5
 	.uleb128 0x45
-	.8byte	.LVL1819
-	.4byte	0x34b7
+	.8byte	.LVL1821
+	.4byte	0x3532
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF610
+	.uleb128 0x49
+	.4byte	.LASF612
 	.byte	0x5
 	.2byte	0x12b
 	.4byte	0xdd4
@@ -28611,14 +28679,14 @@ __func__.7630:
 	.8byte	.LFE312-.LFB312
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x30c4
+	.4byte	0x313f
 	.uleb128 0x45
-	.8byte	.LVL1823
-	.4byte	0x7cda
+	.8byte	.LVL1825
+	.4byte	0x7d55
 	.uleb128 0x34
-	.8byte	.LVL1824
-	.4byte	0x32a5
-	.4byte	0x3058
+	.8byte	.LVL1826
+	.4byte	0x3320
+	.4byte	0x30d3
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28626,9 +28694,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1825
-	.4byte	0x39d7
-	.4byte	0x3077
+	.8byte	.LVL1827
+	.4byte	0x3a52
+	.4byte	0x30f2
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28637,12 +28705,12 @@ __func__.7630:
 	.8byte	.LANCHOR53
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1826
-	.4byte	0x5ce8
+	.8byte	.LVL1828
+	.4byte	0x5d63
 	.uleb128 0x34
-	.8byte	.LVL1827
-	.4byte	0x58ed
-	.4byte	0x309b
+	.8byte	.LVL1829
+	.4byte	0x5968
+	.4byte	0x3116
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28650,11 +28718,11 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1828
-	.4byte	0x5619
+	.8byte	.LVL1830
+	.4byte	0x5694
 	.uleb128 0x2f
-	.8byte	.LVL1829
-	.4byte	0x3789
+	.8byte	.LVL1831
+	.4byte	0x3804
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28663,13 +28731,13 @@ __func__.7630:
 	.8byte	.LANCHOR53
 	.byte	0
 	.byte	0
-	.uleb128 0x53
-	.4byte	.LASF670
+	.uleb128 0x56
+	.4byte	.LASF671
 	.byte	0x5
 	.2byte	0x120
 	.byte	0x1
 	.uleb128 0x2d
-	.4byte	.LASF611
+	.4byte	.LASF613
 	.byte	0x5
 	.byte	0xd2
 	.4byte	0xdd4
@@ -28677,99 +28745,99 @@ __func__.7630:
 	.8byte	.LFE310-.LFB310
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x324a
+	.4byte	0x32c5
 	.uleb128 0x2e
-	.4byte	.LASF612
+	.4byte	.LASF614
 	.byte	0x5
 	.byte	0xd2
 	.4byte	0x1f04
-	.4byte	.LLST286
+	.4byte	.LLST288
 	.uleb128 0x2e
-	.4byte	.LASF613
+	.4byte	.LASF615
 	.byte	0x5
 	.byte	0xd2
 	.4byte	0xdd4
-	.4byte	.LLST287
+	.4byte	.LLST289
 	.uleb128 0x32
-	.4byte	.LASF594
+	.4byte	.LASF597
 	.byte	0x5
 	.byte	0xd4
 	.4byte	0xdc9
-	.4byte	.LLST288
+	.4byte	.LLST290
 	.uleb128 0x32
 	.4byte	.LASF569
 	.byte	0x5
 	.byte	0xd5
 	.4byte	0xdc9
-	.4byte	.LLST289
+	.4byte	.LLST291
 	.uleb128 0x33
 	.string	"req"
 	.byte	0x5
 	.byte	0xd5
 	.4byte	0xdc9
-	.4byte	.LLST290
+	.4byte	.LLST292
 	.uleb128 0x32
-	.4byte	.LASF592
+	.4byte	.LASF595
 	.byte	0x5
 	.byte	0xd6
 	.4byte	0xdc9
-	.4byte	.LLST291
+	.4byte	.LLST293
 	.uleb128 0x32
 	.4byte	.LASF382
 	.byte	0x5
 	.byte	0xd6
 	.4byte	0xdc9
-	.4byte	.LLST292
+	.4byte	.LLST294
 	.uleb128 0x32
 	.4byte	.LASF380
 	.byte	0x5
 	.byte	0xd6
 	.4byte	0xdc9
-	.4byte	.LLST293
+	.4byte	.LLST295
 	.uleb128 0x32
-	.4byte	.LASF614
+	.4byte	.LASF616
 	.byte	0x5
 	.byte	0xd7
 	.4byte	0xdd4
-	.4byte	.LLST294
+	.4byte	.LLST296
 	.uleb128 0x32
-	.4byte	.LASF615
+	.4byte	.LASF617
 	.byte	0x5
 	.byte	0xd8
 	.4byte	0xdd4
-	.4byte	.LLST295
-	.uleb128 0x54
-	.4byte	.LASF616
+	.4byte	.LLST297
+	.uleb128 0x57
+	.4byte	.LASF618
 	.byte	0x5
 	.byte	0xd9
 	.4byte	0xdd4
 	.sleb128 -1
 	.uleb128 0x32
-	.4byte	.LASF596
+	.4byte	.LASF599
 	.byte	0x5
 	.byte	0xda
-	.4byte	0x2d84
-	.4byte	.LLST296
-	.uleb128 0x55
-	.4byte	.LASF617
+	.4byte	0x2dff
+	.4byte	.LLST298
+	.uleb128 0x58
+	.4byte	.LASF619
 	.byte	0x5
 	.byte	0xe1
-	.uleb128 0x55
-	.4byte	.LASF618
+	.uleb128 0x58
+	.4byte	.LASF620
 	.byte	0x5
 	.byte	0xe5
-	.uleb128 0x56
-	.4byte	.LASF688
+	.uleb128 0x59
+	.4byte	.LASF689
 	.byte	0x5
 	.2byte	0x117
-	.8byte	.L872
+	.8byte	.L873
 	.uleb128 0x45
-	.8byte	.LVL1174
-	.4byte	0x324a
+	.8byte	.LVL1176
+	.4byte	0x32c5
 	.uleb128 0x34
-	.8byte	.LVL1182
+	.8byte	.LVL1184
 	.4byte	0x29a4
-	.4byte	0x31ea
+	.4byte	0x3265
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -28785,9 +28853,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1195
-	.4byte	0x6d36
-	.4byte	0x3204
+	.8byte	.LVL1197
+	.4byte	0x6db1
+	.4byte	0x327f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28798,9 +28866,9 @@ __func__.7630:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1201
-	.4byte	0x4e68
-	.4byte	0x3222
+	.8byte	.LVL1203
+	.4byte	0x4ee3
+	.4byte	0x329d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28815,28 +28883,28 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1204
-	.4byte	0x34b7
-	.uleb128 0x45
-	.8byte	.LVL1207
-	.4byte	0x68e0
+	.8byte	.LVL1206
+	.4byte	0x3532
 	.uleb128 0x45
 	.8byte	.LVL1209
-	.4byte	0x324a
+	.4byte	0x695b
+	.uleb128 0x45
+	.8byte	.LVL1211
+	.4byte	0x32c5
 	.byte	0
 	.uleb128 0x43
-	.4byte	.LASF620
+	.4byte	.LASF621
 	.byte	0x5
 	.byte	0xc9
 	.8byte	.LFB309
 	.8byte	.LFE309-.LFB309
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x32a5
+	.4byte	0x3320
 	.uleb128 0x34
-	.8byte	.LVL1168
+	.8byte	.LVL1170
 	.4byte	0x259f
-	.4byte	0x327f
+	.4byte	0x32fa
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -28845,9 +28913,9 @@ __func__.7630:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1169
+	.8byte	.LVL1171
 	.4byte	0x259f
-	.4byte	0x3297
+	.4byte	0x3312
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -28855,12 +28923,12 @@ __func__.7630:
 	.byte	0x8
 	.byte	0xff
 	.byte	0
-	.uleb128 0x57
-	.8byte	.LVL1170
-	.4byte	0x361a
+	.uleb128 0x5a
+	.8byte	.LVL1172
+	.4byte	0x3695
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF621
+	.4byte	.LASF622
 	.byte	0x5
 	.byte	0x6f
 	.4byte	0x5b
@@ -28868,27 +28936,27 @@ __func__.7630:
 	.8byte	.LFE308-.LFB308
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x34a2
+	.4byte	0x351d
 	.uleb128 0x2e
-	.4byte	.LASF622
+	.4byte	.LASF623
 	.byte	0x5
 	.byte	0x6f
 	.4byte	0x5b
-	.4byte	.LLST404
+	.4byte	.LLST406
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x5
 	.byte	0x71
 	.4byte	0xdc9
-	.4byte	.LLST405
+	.4byte	.LLST407
 	.uleb128 0x32
-	.4byte	.LASF623
+	.4byte	.LASF624
 	.byte	0x5
 	.byte	0x71
 	.4byte	0xdc9
-	.4byte	.LLST406
+	.4byte	.LLST408
 	.uleb128 0x2b
-	.4byte	.LASF624
+	.4byte	.LASF625
 	.byte	0x5
 	.byte	0x72
 	.4byte	0xdd4
@@ -28896,13 +28964,13 @@ __func__.7630:
 	.byte	0x91
 	.sleb128 -4
 	.uleb128 0x32
-	.4byte	.LASF625
+	.4byte	.LASF626
 	.byte	0x5
 	.byte	0x73
 	.4byte	0xdd4
-	.4byte	.LLST407
+	.4byte	.LLST409
 	.uleb128 0x2b
-	.4byte	.LASF612
+	.4byte	.LASF614
 	.byte	0x5
 	.byte	0x74
 	.4byte	0x1f04
@@ -28911,21 +28979,21 @@ __func__.7630:
 	.8byte	g_gc_temp_superblock
 	.byte	0x9f
 	.uleb128 0x32
-	.4byte	.LASF626
+	.4byte	.LASF627
 	.byte	0x5
 	.byte	0x75
 	.4byte	0x1f49
-	.4byte	.LLST408
+	.4byte	.LLST410
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x34b2
+	.4byte	0x352d
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.7246
+	.8byte	__func__.7245
 	.uleb128 0x34
-	.8byte	.LVL1769
-	.4byte	0x30cd
-	.4byte	0x3365
+	.8byte	.LVL1771
+	.4byte	0x3148
+	.4byte	0x33e0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28934,9 +29002,9 @@ __func__.7630:
 	.8byte	.LANCHOR53
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1771
-	.4byte	0x58ed
-	.4byte	0x337c
+	.8byte	.LVL1773
+	.4byte	0x5968
+	.4byte	0x33f7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28944,18 +29012,18 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1772
-	.4byte	0x7574
+	.8byte	.LVL1774
+	.4byte	0x75ef
 	.uleb128 0x45
-	.8byte	.LVL1773
-	.4byte	0x72c7
+	.8byte	.LVL1775
+	.4byte	0x7342
 	.uleb128 0x45
-	.8byte	.LVL1777
-	.4byte	0x7cda
+	.8byte	.LVL1779
+	.4byte	0x7d55
 	.uleb128 0x34
-	.8byte	.LVL1778
-	.4byte	0xa8ce
-	.4byte	0x33d5
+	.8byte	.LVL1780
+	.4byte	0xa949
+	.4byte	0x3450
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28976,9 +29044,9 @@ __func__.7630:
 	.byte	0xa2
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1780
-	.4byte	0x3645
-	.4byte	0x33ed
+	.8byte	.LVL1782
+	.4byte	0x36c0
+	.4byte	0x3468
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28987,18 +29055,18 @@ __func__.7630:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1781
-	.4byte	0x68bb
-	.uleb128 0x45
 	.8byte	.LVL1783
-	.4byte	0x5ce8
+	.4byte	0x6936
 	.uleb128 0x45
-	.8byte	.LVL1784
-	.4byte	0x5619
+	.8byte	.LVL1785
+	.4byte	0x5d63
+	.uleb128 0x45
+	.8byte	.LVL1786
+	.4byte	0x5694
 	.uleb128 0x34
-	.8byte	.LVL1787
-	.4byte	0xa8ce
-	.4byte	0x343f
+	.8byte	.LVL1789
+	.4byte	0xa949
+	.4byte	0x34ba
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29019,9 +29087,9 @@ __func__.7630:
 	.byte	0xa8
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1788
-	.4byte	0x5bbb
-	.4byte	0x345d
+	.8byte	.LVL1790
+	.4byte	0x5c36
+	.4byte	0x34d8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -29035,12 +29103,12 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1789
-	.4byte	0x6cf6
+	.8byte	.LVL1791
+	.4byte	0x6d71
 	.uleb128 0x34
-	.8byte	.LVL1792
-	.4byte	0x5bbb
-	.4byte	0x3487
+	.8byte	.LVL1794
+	.4byte	0x5c36
+	.4byte	0x3502
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -29054,32 +29122,32 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1794
-	.4byte	0x3645
+	.8byte	.LVL1796
+	.4byte	0x36c0
 	.uleb128 0x45
-	.8byte	.LVL1798
-	.4byte	0x68e0
+	.8byte	.LVL1800
+	.4byte	0x695b
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x34b2
+	.4byte	0x352d
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x12
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x34a2
+	.4byte	0x351d
 	.uleb128 0x43
-	.4byte	.LASF627
+	.4byte	.LASF628
 	.byte	0x5
 	.byte	0x54
 	.8byte	.LFB307
 	.8byte	.LFE307-.LFB307
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3534
+	.4byte	0x35af
 	.uleb128 0x2e
-	.4byte	.LASF628
+	.4byte	.LASF629
 	.byte	0x5
 	.byte	0x54
 	.4byte	0xdd4
@@ -29097,7 +29165,7 @@ __func__.7630:
 	.4byte	0xdd4
 	.4byte	.LLST135
 	.uleb128 0x32
-	.4byte	.LASF629
+	.4byte	.LASF630
 	.byte	0x5
 	.byte	0x56
 	.4byte	0xdc9
@@ -29110,7 +29178,7 @@ __func__.7630:
 	.4byte	.LLST137
 	.uleb128 0x36
 	.8byte	.LVL549
-	.4byte	0x6cf6
+	.4byte	0x6d71
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29122,7 +29190,7 @@ __func__.7630:
 	.byte	0
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF630
+	.4byte	.LASF631
 	.byte	0x5
 	.byte	0x49
 	.4byte	0xdd4
@@ -29130,7 +29198,7 @@ __func__.7630:
 	.8byte	.LFE306-.LFB306
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3572
+	.4byte	0x35ed
 	.uleb128 0x31
 	.string	"blk"
 	.byte	0x5
@@ -29145,23 +29213,23 @@ __func__.7630:
 	.4byte	.LLST132
 	.byte	0
 	.uleb128 0x43
-	.4byte	.LASF631
+	.4byte	.LASF632
 	.byte	0x5
 	.byte	0x38
 	.8byte	.LFB305
 	.8byte	.LFE305-.LFB305
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x35c6
-	.uleb128 0x58
+	.4byte	0x3641
+	.uleb128 0x5b
 	.string	"req"
 	.byte	0x5
 	.byte	0x38
 	.4byte	0x1abc
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x59
-	.4byte	.LASF632
+	.uleb128 0x5c
+	.4byte	.LASF633
 	.byte	0x5
 	.byte	0x38
 	.4byte	0xdd4
@@ -29174,30 +29242,30 @@ __func__.7630:
 	.4byte	0xdc9
 	.4byte	.LLST129
 	.uleb128 0x32
-	.4byte	.LASF633
+	.4byte	.LASF634
 	.byte	0x5
 	.byte	0x3b
 	.4byte	0xdc9
 	.4byte	.LLST130
 	.byte	0
 	.uleb128 0x43
-	.4byte	.LASF634
+	.4byte	.LASF635
 	.byte	0x5
 	.byte	0x29
 	.8byte	.LFB304
 	.8byte	.LFE304-.LFB304
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x361a
-	.uleb128 0x58
+	.4byte	0x3695
+	.uleb128 0x5b
 	.string	"req"
 	.byte	0x5
 	.byte	0x29
 	.4byte	0x1abc
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x59
-	.4byte	.LASF632
+	.uleb128 0x5c
+	.4byte	.LASF633
 	.byte	0x5
 	.byte	0x29
 	.4byte	0xdd4
@@ -29210,21 +29278,21 @@ __func__.7630:
 	.4byte	0xdc9
 	.4byte	.LLST127
 	.uleb128 0x32
-	.4byte	.LASF633
+	.4byte	.LASF634
 	.byte	0x5
 	.byte	0x2c
 	.4byte	0xdc9
 	.4byte	.LLST128
 	.byte	0
 	.uleb128 0x43
-	.4byte	.LASF635
+	.4byte	.LASF636
 	.byte	0x5
 	.byte	0x15
 	.8byte	.LFB303
 	.8byte	.LFE303-.LFB303
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3645
+	.4byte	0x36c0
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x5
@@ -29232,8 +29300,8 @@ __func__.7630:
 	.4byte	0xdc9
 	.4byte	.LLST126
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF636
+	.uleb128 0x49
+	.4byte	.LASF637
 	.byte	0x2
 	.2byte	0xa93
 	.4byte	0x5b
@@ -29241,29 +29309,29 @@ __func__.7630:
 	.8byte	.LFE302-.LFB302
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3734
-	.uleb128 0x50
-	.4byte	.LASF623
+	.4byte	0x37af
+	.uleb128 0x53
+	.4byte	.LASF624
 	.byte	0x2
 	.2byte	0xa93
 	.4byte	0xdc9
-	.4byte	.LLST323
-	.uleb128 0x51
+	.4byte	.LLST325
+	.uleb128 0x54
 	.string	"ret"
 	.byte	0x2
 	.2byte	0xa95
 	.4byte	0x5b
-	.4byte	.LLST324
+	.4byte	.LLST326
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x3744
+	.4byte	0x37bf
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.7176
+	.8byte	__func__.7175
 	.uleb128 0x34
-	.8byte	.LVL1339
-	.4byte	0xa8ce
-	.4byte	0x36c4
+	.8byte	.LVL1341
+	.4byte	0xa949
+	.4byte	0x373f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29283,9 +29351,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1344
-	.4byte	0xa8ce
-	.4byte	0x36f7
+	.8byte	.LVL1346
+	.4byte	0xa949
+	.4byte	0x3772
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29306,11 +29374,11 @@ __func__.7630:
 	.2byte	0xa9a
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1345
-	.4byte	0x3749
-	.uleb128 0x36
 	.8byte	.LVL1347
-	.4byte	0xa8ce
+	.4byte	0x37c4
+	.uleb128 0x36
+	.8byte	.LVL1349
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29333,41 +29401,41 @@ __func__.7630:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x3744
+	.4byte	0x37bf
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x13
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x3734
-	.uleb128 0x47
-	.4byte	.LASF637
+	.4byte	0x37af
+	.uleb128 0x4a
+	.4byte	.LASF638
 	.byte	0x2
 	.2byte	0xa7e
 	.4byte	0x5b
 	.byte	0x1
-	.4byte	0x3774
-	.uleb128 0x48
-	.4byte	.LASF623
+	.4byte	0x37ef
+	.uleb128 0x4b
+	.4byte	.LASF624
 	.byte	0x2
 	.2byte	0xa7e
 	.4byte	0xdc9
-	.uleb128 0x4c
+	.uleb128 0x4f
 	.4byte	.LASF574
-	.4byte	0x3784
-	.4byte	.LASF637
+	.4byte	0x37ff
+	.4byte	.LASF638
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x3784
+	.4byte	0x37ff
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0xf
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x3774
-	.uleb128 0x46
-	.4byte	.LASF638
+	.4byte	0x37ef
+	.uleb128 0x49
+	.4byte	.LASF639
 	.byte	0x2
 	.2byte	0xa5e
 	.4byte	0xdd4
@@ -29375,35 +29443,35 @@ __func__.7630:
 	.8byte	.LFE300-.LFB300
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x38b7
-	.uleb128 0x50
-	.4byte	.LASF639
+	.4byte	0x3932
+	.uleb128 0x53
+	.4byte	.LASF640
 	.byte	0x2
 	.2byte	0xa5e
 	.4byte	0x1f04
 	.4byte	.LLST123
-	.uleb128 0x52
-	.4byte	.LASF594
+	.uleb128 0x55
+	.4byte	.LASF597
 	.byte	0x2
 	.2byte	0xa60
 	.4byte	0xdc9
 	.4byte	.LLST124
-	.uleb128 0x52
-	.4byte	.LASF640
+	.uleb128 0x55
+	.4byte	.LASF641
 	.byte	0x2
 	.2byte	0xa61
 	.4byte	0xdd4
 	.4byte	.LLST125
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x34b2
+	.4byte	0x352d
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.7156
+	.8byte	__func__.7155
 	.uleb128 0x34
 	.8byte	.LVL508
-	.4byte	0xa8ce
-	.4byte	0x3821
+	.4byte	0xa949
+	.4byte	0x389c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29425,8 +29493,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL509
-	.4byte	0xa8ce
-	.4byte	0x3854
+	.4byte	0xa949
+	.4byte	0x38cf
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29448,8 +29516,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL510
-	.4byte	0xa8ce
-	.4byte	0x3887
+	.4byte	0xa949
+	.4byte	0x3902
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29471,7 +29539,7 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x36
 	.8byte	.LVL514
-	.4byte	0xa8ce
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29492,8 +29560,8 @@ __func__.7630:
 	.2byte	0xa7a
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF641
+	.uleb128 0x49
+	.4byte	.LASF642
 	.byte	0x2
 	.2byte	0xa46
 	.4byte	0x5b
@@ -29501,29 +29569,29 @@ __func__.7630:
 	.8byte	.LFE299-.LFB299
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x39c2
-	.uleb128 0x50
-	.4byte	.LASF639
+	.4byte	0x3a3d
+	.uleb128 0x53
+	.4byte	.LASF640
 	.byte	0x2
 	.2byte	0xa46
 	.4byte	0x1f04
-	.4byte	.LLST389
-	.uleb128 0x52
-	.4byte	.LASF623
+	.4byte	.LLST391
+	.uleb128 0x55
+	.4byte	.LASF624
 	.byte	0x2
 	.2byte	0xa48
 	.4byte	0xdc9
-	.4byte	.LLST390
+	.4byte	.LLST392
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x39d2
+	.4byte	0x3a4d
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.7149
+	.8byte	__func__.7148
 	.uleb128 0x34
-	.8byte	.LVL1701
-	.4byte	0xa8ce
-	.4byte	0x393f
+	.8byte	.LVL1703
+	.4byte	0xa949
+	.4byte	0x39ba
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29544,9 +29612,9 @@ __func__.7630:
 	.2byte	0xa49
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1702
-	.4byte	0x68bb
-	.4byte	0x3957
+	.8byte	.LVL1704
+	.4byte	0x6936
+	.4byte	0x39d2
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29555,12 +29623,12 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1703
-	.4byte	0x3749
+	.8byte	.LVL1705
+	.4byte	0x37c4
 	.uleb128 0x34
-	.8byte	.LVL1704
-	.4byte	0x39d7
-	.4byte	0x397c
+	.8byte	.LVL1706
+	.4byte	0x3a52
+	.4byte	0x39f7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29569,12 +29637,12 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1705
-	.4byte	0x5ce8
+	.8byte	.LVL1707
+	.4byte	0x5d63
 	.uleb128 0x34
-	.8byte	.LVL1706
-	.4byte	0x58ed
-	.4byte	0x39a0
+	.8byte	.LVL1708
+	.4byte	0x5968
+	.4byte	0x3a1b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29582,11 +29650,11 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1707
-	.4byte	0x5619
+	.8byte	.LVL1709
+	.4byte	0x5694
 	.uleb128 0x36
-	.8byte	.LVL1711
-	.4byte	0x68e0
+	.8byte	.LVL1713
+	.4byte	0x695b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29597,15 +29665,15 @@ __func__.7630:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x39d2
+	.4byte	0x3a4d
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x1c
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x39c2
-	.uleb128 0x46
-	.4byte	.LASF642
+	.4byte	0x3a3d
+	.uleb128 0x49
+	.4byte	.LASF643
 	.byte	0x2
 	.2byte	0x9e2
 	.4byte	0x5b
@@ -29613,79 +29681,79 @@ __func__.7630:
 	.8byte	.LFE298-.LFB298
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3d02
-	.uleb128 0x5a
+	.4byte	0x3d7d
+	.uleb128 0x5d
 	.string	"p"
 	.byte	0x2
 	.2byte	0x9e2
 	.4byte	0x1f04
-	.4byte	.LLST310
-	.uleb128 0x52
-	.4byte	.LASF643
+	.4byte	.LLST312
+	.uleb128 0x55
+	.4byte	.LASF644
 	.byte	0x2
 	.2byte	0x9e4
 	.4byte	0xdc9
-	.4byte	.LLST311
-	.uleb128 0x49
-	.4byte	.LASF592
+	.4byte	.LLST313
+	.uleb128 0x4c
+	.4byte	.LASF595
 	.byte	0x2
 	.2byte	0x9e5
 	.4byte	0xdc9
-	.uleb128 0x52
+	.uleb128 0x55
 	.4byte	.LASF569
 	.byte	0x2
 	.2byte	0x9e5
 	.4byte	0xdc9
-	.4byte	.LLST312
-	.uleb128 0x51
+	.4byte	.LLST314
+	.uleb128 0x54
 	.string	"n"
 	.byte	0x2
 	.2byte	0x9e5
 	.4byte	0xdc9
-	.4byte	.LLST313
-	.uleb128 0x49
-	.4byte	.LASF594
+	.4byte	.LLST315
+	.uleb128 0x4c
+	.4byte	.LASF597
 	.byte	0x2
 	.2byte	0x9e5
 	.4byte	0xdc9
-	.uleb128 0x52
-	.4byte	.LASF644
+	.uleb128 0x55
+	.4byte	.LASF645
 	.byte	0x2
 	.2byte	0x9e6
 	.4byte	0x5b
-	.4byte	.LLST314
-	.uleb128 0x52
-	.4byte	.LASF645
+	.4byte	.LLST316
+	.uleb128 0x55
+	.4byte	.LASF646
 	.byte	0x2
 	.2byte	0x9e7
 	.4byte	0xdc9
-	.4byte	.LLST315
-	.uleb128 0x4b
-	.4byte	.LASF646
+	.4byte	.LLST317
+	.uleb128 0x4e
+	.4byte	.LASF647
 	.byte	0x2
 	.2byte	0x9e8
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x3d12
+	.4byte	0x3d8d
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.7128
-	.uleb128 0x5b
-	.4byte	0x5398
-	.8byte	.LBB244
-	.8byte	.LBE244-.LBB244
+	.8byte	__func__.7127
+	.uleb128 0x5e
+	.4byte	0x5413
+	.8byte	.LBB248
+	.8byte	.LBE248-.LBB248
 	.byte	0x2
 	.2byte	0xa18
-	.4byte	0x3ad2
-	.uleb128 0x5c
-	.4byte	0x53b1
-	.4byte	.LLST316
-	.uleb128 0x5c
-	.4byte	0x53a5
-	.4byte	.LLST317
+	.4byte	0x3b4d
+	.uleb128 0x47
+	.4byte	0x542c
+	.4byte	.LLST318
+	.uleb128 0x47
+	.4byte	0x5420
+	.4byte	.LLST319
 	.uleb128 0x36
-	.8byte	.LVL1295
-	.4byte	0x9720
+	.8byte	.LVL1297
+	.4byte	0x979b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29693,15 +29761,15 @@ __func__.7630:
 	.byte	0x84
 	.sleb128 0
 	.uleb128 0x3e
-	.4byte	0x53b1
+	.4byte	0x542c
 	.uleb128 0x1
 	.byte	0x31
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1267
-	.4byte	0xa8ce
-	.4byte	0x3b05
+	.8byte	.LVL1269
+	.4byte	0xa949
+	.4byte	0x3b80
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29722,9 +29790,9 @@ __func__.7630:
 	.2byte	0x9e9
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1271
-	.4byte	0x666f
-	.4byte	0x3b24
+	.8byte	.LVL1273
+	.4byte	0x66ea
+	.4byte	0x3b9f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29733,9 +29801,9 @@ __func__.7630:
 	.8byte	.LANCHOR47
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1273
-	.4byte	0xa8ce
-	.4byte	0x3b57
+	.8byte	.LVL1275
+	.4byte	0xa949
+	.4byte	0x3bd2
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29756,9 +29824,9 @@ __func__.7630:
 	.2byte	0x9f2
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1274
-	.4byte	0x4593
-	.4byte	0x3b6f
+	.8byte	.LVL1276
+	.4byte	0x460e
+	.4byte	0x3bea
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29767,9 +29835,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1275
-	.4byte	0x68bb
-	.4byte	0x3b87
+	.8byte	.LVL1277
+	.4byte	0x6936
+	.4byte	0x3c02
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29778,9 +29846,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1276
-	.4byte	0xa8ce
-	.4byte	0x3bba
+	.8byte	.LVL1278
+	.4byte	0xa949
+	.4byte	0x3c35
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29801,9 +29869,9 @@ __func__.7630:
 	.2byte	0x9fd
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1279
-	.4byte	0xa8ce
-	.4byte	0x3bed
+	.8byte	.LVL1281
+	.4byte	0xa949
+	.4byte	0x3c68
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29824,9 +29892,9 @@ __func__.7630:
 	.2byte	0xa00
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1281
-	.4byte	0xa8ce
-	.4byte	0x3c20
+	.8byte	.LVL1283
+	.4byte	0xa949
+	.4byte	0x3c9b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29847,9 +29915,9 @@ __func__.7630:
 	.2byte	0xa0b
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1282
-	.4byte	0xa8ce
-	.4byte	0x3c53
+	.8byte	.LVL1284
+	.4byte	0xa949
+	.4byte	0x3cce
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29870,9 +29938,9 @@ __func__.7630:
 	.2byte	0xa0d
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1283
-	.4byte	0x5398
-	.4byte	0x3c70
+	.8byte	.LVL1285
+	.4byte	0x5413
+	.4byte	0x3ceb
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29886,9 +29954,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1286
+	.8byte	.LVL1288
 	.4byte	0x2721
-	.4byte	0x3c88
+	.4byte	0x3d03
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
@@ -29897,9 +29965,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1288
-	.4byte	0x3e95
-	.4byte	0x3ca0
+	.8byte	.LVL1290
+	.4byte	0x3f10
+	.4byte	0x3d1b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29908,12 +29976,12 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1289
-	.4byte	0x72c7
+	.8byte	.LVL1291
+	.4byte	0x7342
 	.uleb128 0x34
-	.8byte	.LVL1290
-	.4byte	0x68bb
-	.4byte	0x3cc5
+	.8byte	.LVL1292
+	.4byte	0x6936
+	.4byte	0x3d40
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29922,11 +29990,11 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1300
-	.4byte	0x7574
+	.8byte	.LVL1302
+	.4byte	0x75ef
 	.uleb128 0x36
-	.8byte	.LVL1304
-	.4byte	0xa8ce
+	.8byte	.LVL1306
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29949,28 +30017,28 @@ __func__.7630:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x3d12
+	.4byte	0x3d8d
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x18
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x3d02
-	.uleb128 0x47
-	.4byte	.LASF647
+	.4byte	0x3d7d
+	.uleb128 0x4a
+	.4byte	.LASF648
 	.byte	0x2
 	.2byte	0x9d9
 	.4byte	0x5b
 	.byte	0x1
-	.4byte	0x3d35
-	.uleb128 0x48
-	.4byte	.LASF623
+	.4byte	0x3db0
+	.uleb128 0x4b
+	.4byte	.LASF624
 	.byte	0x2
 	.2byte	0x9d9
 	.4byte	0xdc9
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF648
+	.uleb128 0x49
+	.4byte	.LASF649
 	.byte	0x2
 	.2byte	0x98e
 	.4byte	0xdc9
@@ -29978,44 +30046,44 @@ __func__.7630:
 	.8byte	.LFE296-.LFB296
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3e01
-	.uleb128 0x52
-	.4byte	.LASF649
+	.4byte	0x3e7c
+	.uleb128 0x55
+	.4byte	.LASF650
 	.byte	0x2
 	.2byte	0x990
 	.4byte	0xdc9
 	.4byte	.LLST114
-	.uleb128 0x52
-	.4byte	.LASF650
+	.uleb128 0x55
+	.4byte	.LASF651
 	.byte	0x2
 	.2byte	0x991
 	.4byte	0xdc9
 	.4byte	.LLST115
-	.uleb128 0x52
-	.4byte	.LASF651
+	.uleb128 0x55
+	.4byte	.LASF652
 	.byte	0x2
 	.2byte	0x992
 	.4byte	0xdc9
 	.4byte	.LLST116
-	.uleb128 0x52
-	.4byte	.LASF652
+	.uleb128 0x55
+	.4byte	.LASF653
 	.byte	0x2
 	.2byte	0x993
 	.4byte	0x1e2c
 	.4byte	.LLST117
-	.uleb128 0x52
-	.4byte	.LASF653
+	.uleb128 0x55
+	.4byte	.LASF654
 	.byte	0x2
 	.2byte	0x994
 	.4byte	0xdc9
 	.4byte	.LLST118
-	.uleb128 0x52
-	.4byte	.LASF654
+	.uleb128 0x55
+	.4byte	.LASF655
 	.byte	0x2
 	.2byte	0x995
 	.4byte	0xdc9
 	.4byte	.LLST119
-	.uleb128 0x51
+	.uleb128 0x54
 	.string	"i"
 	.byte	0x2
 	.2byte	0x996
@@ -30023,13 +30091,13 @@ __func__.7630:
 	.4byte	.LLST120
 	.uleb128 0x45
 	.8byte	.LVL487
-	.4byte	0x3e01
+	.4byte	0x3e7c
 	.uleb128 0x45
 	.8byte	.LVL493
-	.4byte	0x3e62
+	.4byte	0x3edd
 	.uleb128 0x36
 	.8byte	.LVL495
-	.4byte	0xa8ce
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30044,8 +30112,8 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF655
+	.uleb128 0x49
+	.4byte	.LASF656
 	.byte	0x2
 	.2byte	0x979
 	.4byte	0xdc9
@@ -30053,34 +30121,34 @@ __func__.7630:
 	.8byte	.LFE295-.LFB295
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3e62
-	.uleb128 0x50
+	.4byte	0x3edd
+	.uleb128 0x53
 	.4byte	.LASF236
 	.byte	0x2
 	.2byte	0x979
 	.4byte	0xdc9
 	.4byte	.LLST103
-	.uleb128 0x52
-	.4byte	.LASF656
+	.uleb128 0x55
+	.4byte	.LASF657
 	.byte	0x2
 	.2byte	0x97b
 	.4byte	0xdc9
 	.4byte	.LLST104
-	.uleb128 0x52
-	.4byte	.LASF608
+	.uleb128 0x55
+	.4byte	.LASF587
 	.byte	0x2
 	.2byte	0x97c
 	.4byte	0xdc9
 	.4byte	.LLST105
-	.uleb128 0x51
+	.uleb128 0x54
 	.string	"i"
 	.byte	0x2
 	.2byte	0x97d
 	.4byte	0xdc9
 	.4byte	.LLST106
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF657
+	.uleb128 0x49
+	.4byte	.LASF658
 	.byte	0x2
 	.2byte	0x970
 	.4byte	0xdc9
@@ -30088,16 +30156,16 @@ __func__.7630:
 	.8byte	.LFE294-.LFB294
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3e95
-	.uleb128 0x52
-	.4byte	.LASF651
+	.4byte	0x3f10
+	.uleb128 0x55
+	.4byte	.LASF652
 	.byte	0x2
 	.2byte	0x972
 	.4byte	0xdc9
 	.4byte	.LLST102
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF658
+	.uleb128 0x49
+	.4byte	.LASF659
 	.byte	0x2
 	.2byte	0x960
 	.4byte	0x5b
@@ -30105,26 +30173,26 @@ __func__.7630:
 	.8byte	.LFE293-.LFB293
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3f1d
-	.uleb128 0x50
-	.4byte	.LASF623
+	.4byte	0x3f98
+	.uleb128 0x53
+	.4byte	.LASF624
 	.byte	0x2
 	.2byte	0x960
 	.4byte	0xdc9
 	.4byte	.LLST98
-	.uleb128 0x52
-	.4byte	.LASF592
+	.uleb128 0x55
+	.4byte	.LASF595
 	.byte	0x2
 	.2byte	0x962
 	.4byte	0xdc9
 	.4byte	.LLST99
-	.uleb128 0x52
-	.4byte	.LASF594
+	.uleb128 0x55
+	.4byte	.LASF597
 	.byte	0x2
 	.2byte	0x962
 	.4byte	0xdc9
 	.4byte	.LLST100
-	.uleb128 0x52
+	.uleb128 0x55
 	.4byte	.LASF375
 	.byte	0x2
 	.2byte	0x963
@@ -30132,8 +30200,8 @@ __func__.7630:
 	.4byte	.LLST101
 	.uleb128 0x34
 	.8byte	.LVL295
-	.4byte	0x6d91
-	.4byte	0x3f0f
+	.4byte	0x6e0c
+	.4byte	0x3f8a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -30143,44 +30211,44 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x45
 	.8byte	.LVL296
-	.4byte	0x74e5
+	.4byte	0x7560
 	.byte	0
-	.uleb128 0x47
-	.4byte	.LASF659
+	.uleb128 0x4a
+	.4byte	.LASF660
 	.byte	0x2
 	.2byte	0x901
 	.4byte	0x5b
 	.byte	0x1
-	.4byte	0x3f47
-	.uleb128 0x4a
+	.4byte	0x3fc2
+	.uleb128 0x4d
 	.string	"i"
 	.byte	0x2
 	.2byte	0x903
 	.4byte	0x5b
-	.uleb128 0x4d
-	.uleb128 0x49
-	.4byte	.LASF612
+	.uleb128 0x50
+	.uleb128 0x4c
+	.4byte	.LASF614
 	.byte	0x2
 	.2byte	0x928
 	.4byte	0x1f04
 	.byte	0
 	.byte	0
-	.uleb128 0x5d
-	.4byte	.LASF660
+	.uleb128 0x5f
+	.4byte	.LASF661
 	.byte	0x2
 	.2byte	0x8e2
 	.8byte	.LFB291
 	.8byte	.LFE291-.LFB291
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x404b
-	.uleb128 0x51
+	.4byte	0x40c6
+	.uleb128 0x54
 	.string	"i"
 	.byte	0x2
 	.2byte	0x8e4
 	.4byte	0x5b
-	.4byte	.LLST249
-	.uleb128 0x5e
+	.4byte	.LLST251
+	.uleb128 0x60
 	.string	"ppa"
 	.byte	0x2
 	.2byte	0x8e5
@@ -30188,16 +30256,16 @@ __func__.7630:
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -4
-	.uleb128 0x52
-	.4byte	.LASF661
+	.uleb128 0x55
+	.4byte	.LASF662
 	.byte	0x2
 	.2byte	0x8e6
-	.4byte	0x2d84
-	.4byte	.LLST250
+	.4byte	0x2dff
+	.4byte	.LLST252
 	.uleb128 0x34
-	.8byte	.LVL954
-	.4byte	0xa8ce
-	.4byte	0x3fb7
+	.8byte	.LVL956
+	.4byte	0xa949
+	.4byte	0x4032
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30212,9 +30280,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL957
-	.4byte	0x5bbb
-	.4byte	0x3fdb
+	.8byte	.LVL959
+	.4byte	0x5c36
+	.4byte	0x4056
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30234,9 +30302,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL958
-	.4byte	0xa8ce
-	.4byte	0x4000
+	.8byte	.LVL960
+	.4byte	0xa949
+	.4byte	0x407b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30251,9 +30319,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL960
+	.8byte	.LVL962
 	.4byte	0x29a4
-	.4byte	0x4029
+	.4byte	0x40a4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30272,8 +30340,8 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL961
-	.4byte	0xa8ce
+	.8byte	.LVL963
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30288,65 +30356,65 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x5d
-	.4byte	.LASF662
+	.uleb128 0x5f
+	.4byte	.LASF663
 	.byte	0x2
 	.2byte	0x8ae
 	.8byte	.LFB290
 	.8byte	.LFE290-.LFB290
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x41cd
-	.uleb128 0x51
+	.4byte	0x4248
+	.uleb128 0x54
 	.string	"i"
 	.byte	0x2
 	.2byte	0x8b0
 	.4byte	0xdc9
-	.4byte	.LLST281
-	.uleb128 0x51
+	.4byte	.LLST283
+	.uleb128 0x54
 	.string	"lpn"
 	.byte	0x2
 	.2byte	0x8b1
 	.4byte	0xdd4
-	.4byte	.LLST282
+	.4byte	.LLST284
 	.uleb128 0x2a
-	.4byte	.LASF663
+	.4byte	.LASF664
 	.byte	0x2
 	.2byte	0x8b2
 	.4byte	0xdd4
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -4
-	.uleb128 0x51
+	.uleb128 0x54
 	.string	"blk"
 	.byte	0x2
 	.2byte	0x8b3
 	.4byte	0xdc9
-	.4byte	.LLST283
-	.uleb128 0x52
-	.4byte	.LASF664
+	.4byte	.LLST285
+	.uleb128 0x55
+	.4byte	.LASF665
 	.byte	0x2
 	.2byte	0x8b4
 	.4byte	0xdc9
-	.4byte	.LLST284
+	.4byte	.LLST286
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x41dd
+	.4byte	0x4258
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.7044
+	.8byte	__func__.7043
 	.uleb128 0x40
 	.4byte	.Ldebug_ranges0+0x180
-	.4byte	0x40fd
-	.uleb128 0x52
+	.4byte	0x4178
+	.uleb128 0x55
 	.4byte	.LASF236
 	.byte	0x2
 	.2byte	0x8d1
 	.4byte	0xdc9
-	.4byte	.LLST285
+	.4byte	.LLST287
 	.uleb128 0x36
-	.8byte	.LVL1163
-	.4byte	0xa8ce
+	.8byte	.LVL1165
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30362,9 +30430,9 @@ __func__.7630:
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1141
-	.4byte	0xa8ce
-	.4byte	0x4129
+	.8byte	.LVL1143
+	.4byte	0xa949
+	.4byte	0x41a4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30379,9 +30447,9 @@ __func__.7630:
 	.8byte	.LANCHOR156
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1142
+	.8byte	.LVL1144
 	.4byte	0x259f
-	.4byte	0x414e
+	.4byte	0x41c9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30402,9 +30470,9 @@ __func__.7630:
 	.2byte	0x2000
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1150
-	.4byte	0xa8ce
-	.4byte	0x4181
+	.8byte	.LVL1152
+	.4byte	0xa949
+	.4byte	0x41fc
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30425,9 +30493,9 @@ __func__.7630:
 	.2byte	0x8df
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1152
-	.4byte	0x5bbb
-	.4byte	0x41a5
+	.8byte	.LVL1154
+	.4byte	0x5c36
+	.4byte	0x4220
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30447,11 +30515,11 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1153
-	.4byte	0x6cf6
+	.8byte	.LVL1155
+	.4byte	0x6d71
 	.uleb128 0x36
-	.8byte	.LVL1157
-	.4byte	0xa8ce
+	.8byte	.LVL1159
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30468,58 +30536,58 @@ __func__.7630:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x41dd
+	.4byte	0x4258
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0xd
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x41cd
-	.uleb128 0x5d
-	.4byte	.LASF665
+	.4byte	0x4248
+	.uleb128 0x5f
+	.4byte	.LASF666
 	.byte	0x2
 	.2byte	0x88f
 	.8byte	.LFB289
 	.8byte	.LFE289-.LFB289
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4316
-	.uleb128 0x51
+	.4byte	0x4391
+	.uleb128 0x54
 	.string	"i"
 	.byte	0x2
 	.2byte	0x891
 	.4byte	0xdc9
-	.4byte	.LLST386
-	.uleb128 0x51
+	.4byte	.LLST388
+	.uleb128 0x54
 	.string	"lpn"
 	.byte	0x2
 	.2byte	0x892
 	.4byte	0xdd4
-	.4byte	.LLST387
+	.4byte	.LLST389
 	.uleb128 0x2a
-	.4byte	.LASF663
+	.4byte	.LASF664
 	.byte	0x2
 	.2byte	0x893
 	.4byte	0xdd4
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -4
-	.uleb128 0x51
+	.uleb128 0x54
 	.string	"blk"
 	.byte	0x2
 	.2byte	0x894
 	.4byte	0xdc9
-	.4byte	.LLST388
+	.4byte	.LLST390
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x4326
+	.4byte	0x43a1
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.7028
+	.8byte	__func__.7027
 	.uleb128 0x34
-	.8byte	.LVL1681
-	.4byte	0xa8ce
-	.4byte	0x427c
+	.8byte	.LVL1683
+	.4byte	0xa949
+	.4byte	0x42f7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30534,9 +30602,9 @@ __func__.7630:
 	.8byte	.LANCHOR168
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1682
+	.8byte	.LVL1684
 	.4byte	0x259f
-	.4byte	0x4294
+	.4byte	0x430f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -30545,9 +30613,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1687
-	.4byte	0x5bbb
-	.4byte	0x42b8
+	.8byte	.LVL1689
+	.4byte	0x5c36
+	.4byte	0x4333
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30567,12 +30635,12 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1688
-	.4byte	0x6cf6
+	.8byte	.LVL1690
+	.4byte	0x6d71
 	.uleb128 0x34
-	.8byte	.LVL1692
-	.4byte	0xa8ce
-	.4byte	0x42e3
+	.8byte	.LVL1694
+	.4byte	0xa949
+	.4byte	0x435e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30587,9 +30655,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1693
-	.4byte	0x3749
-	.4byte	0x42fb
+	.8byte	.LVL1695
+	.4byte	0x37c4
+	.4byte	0x4376
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30598,66 +30666,66 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1694
-	.4byte	0x5ce8
+	.8byte	.LVL1696
+	.4byte	0x5d63
 	.uleb128 0x45
-	.8byte	.LVL1695
-	.4byte	0x5619
+	.8byte	.LVL1697
+	.4byte	0x5694
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x4326
+	.4byte	0x43a1
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x14
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x4316
-	.uleb128 0x5d
-	.4byte	.LASF666
+	.4byte	0x4391
+	.uleb128 0x5f
+	.4byte	.LASF667
 	.byte	0x2
 	.2byte	0x86b
 	.8byte	.LFB288
 	.8byte	.LFE288-.LFB288
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x43e3
-	.uleb128 0x50
-	.4byte	.LASF612
+	.4byte	0x445e
+	.uleb128 0x53
+	.4byte	.LASF614
 	.byte	0x2
 	.2byte	0x86b
 	.4byte	0x1f04
-	.4byte	.LLST354
+	.4byte	.LLST356
 	.uleb128 0x2a
-	.4byte	.LASF667
+	.4byte	.LASF668
 	.byte	0x2
 	.2byte	0x86d
 	.4byte	0xdf5
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -32
-	.uleb128 0x52
-	.4byte	.LASF596
+	.uleb128 0x55
+	.4byte	.LASF599
 	.byte	0x2
 	.2byte	0x86e
-	.4byte	0x2d84
-	.4byte	.LLST355
-	.uleb128 0x52
-	.4byte	.LASF668
+	.4byte	0x2dff
+	.4byte	.LLST357
+	.uleb128 0x55
+	.4byte	.LASF669
 	.byte	0x2
 	.2byte	0x86f
 	.4byte	0x5b
-	.4byte	.LLST356
-	.uleb128 0x5f
+	.4byte	.LLST358
+	.uleb128 0x61
 	.4byte	.LASF384
 	.byte	0x2
 	.2byte	0x870
 	.4byte	0xdd4
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1515
-	.4byte	0x3789
-	.4byte	0x43ad
+	.8byte	.LVL1517
+	.4byte	0x3804
+	.4byte	0x4428
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30666,9 +30734,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1518
+	.8byte	.LVL1520
 	.4byte	0x27e7
-	.4byte	0x43d5
+	.4byte	0x4450
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30692,22 +30760,22 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1519
-	.4byte	0x3645
+	.8byte	.LVL1521
+	.4byte	0x36c0
 	.byte	0
-	.uleb128 0x5d
-	.4byte	.LASF669
+	.uleb128 0x5f
+	.4byte	.LASF670
 	.byte	0x2
 	.2byte	0x851
 	.8byte	.LFB287
 	.8byte	.LFE287-.LFB287
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4444
+	.4byte	0x44bf
 	.uleb128 0x34
-	.8byte	.LVL1659
-	.4byte	0x5955
-	.4byte	0x4423
+	.8byte	.LVL1661
+	.4byte	0x59d0
+	.4byte	0x449e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30726,7 +30794,7 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1660
+	.8byte	.LVL1662
 	.4byte	0x259f
 	.uleb128 0x30
 	.uleb128 0x1
@@ -30747,13 +30815,13 @@ __func__.7630:
 	.2byte	0x200
 	.byte	0
 	.byte	0
-	.uleb128 0x53
-	.4byte	.LASF671
+	.uleb128 0x56
+	.4byte	.LASF672
 	.byte	0x2
 	.2byte	0x83d
 	.byte	0x1
-	.uleb128 0x46
-	.4byte	.LASF672
+	.uleb128 0x49
+	.4byte	.LASF673
 	.byte	0x2
 	.2byte	0x812
 	.4byte	0x5b
@@ -30761,53 +30829,53 @@ __func__.7630:
 	.8byte	.LFE285-.LFB285
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x457e
-	.uleb128 0x52
-	.4byte	.LASF649
+	.4byte	0x45f9
+	.uleb128 0x55
+	.4byte	.LASF650
 	.byte	0x2
 	.2byte	0x814
 	.4byte	0xdc9
-	.4byte	.LLST275
-	.uleb128 0x52
-	.4byte	.LASF592
+	.4byte	.LLST277
+	.uleb128 0x55
+	.4byte	.LASF595
 	.byte	0x2
 	.2byte	0x814
 	.4byte	0xdc9
-	.4byte	.LLST276
-	.uleb128 0x52
-	.4byte	.LASF594
+	.4byte	.LLST278
+	.uleb128 0x55
+	.4byte	.LASF597
 	.byte	0x2
 	.2byte	0x814
 	.4byte	0xdc9
-	.4byte	.LLST277
-	.uleb128 0x52
+	.4byte	.LLST279
+	.uleb128 0x55
 	.4byte	.LASF375
 	.byte	0x2
 	.2byte	0x814
 	.4byte	0xdc9
-	.4byte	.LLST278
-	.uleb128 0x52
-	.4byte	.LASF673
+	.4byte	.LLST280
+	.uleb128 0x55
+	.4byte	.LASF674
 	.byte	0x2
 	.2byte	0x815
 	.4byte	0xdc9
-	.4byte	.LLST279
-	.uleb128 0x52
-	.4byte	.LASF674
+	.4byte	.LLST281
+	.uleb128 0x55
+	.4byte	.LASF675
 	.byte	0x2
 	.2byte	0x815
 	.4byte	0xdc9
-	.4byte	.LLST280
+	.4byte	.LLST282
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x458e
+	.4byte	0x4609
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.7003
+	.8byte	__func__.7002
 	.uleb128 0x34
-	.8byte	.LVL1115
+	.8byte	.LVL1117
 	.4byte	0x259f
-	.4byte	0x44f9
+	.4byte	0x4574
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -30815,9 +30883,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1119
-	.4byte	0x6d91
-	.4byte	0x4511
+	.8byte	.LVL1121
+	.4byte	0x6e0c
+	.4byte	0x458c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -30826,12 +30894,12 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1120
-	.4byte	0x74e5
+	.8byte	.LVL1122
+	.4byte	0x7560
 	.uleb128 0x34
-	.8byte	.LVL1127
-	.4byte	0x68e0
-	.4byte	0x4536
+	.8byte	.LVL1129
+	.4byte	0x695b
+	.4byte	0x45b1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30840,9 +30908,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1135
-	.4byte	0x68bb
-	.4byte	0x454e
+	.8byte	.LVL1137
+	.4byte	0x6936
+	.4byte	0x45c9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30851,8 +30919,8 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1137
-	.4byte	0xa8ce
+	.8byte	.LVL1139
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30875,15 +30943,15 @@ __func__.7630:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x458e
+	.4byte	0x4609
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x11
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x457e
-	.uleb128 0x46
-	.4byte	.LASF675
+	.4byte	0x45f9
+	.uleb128 0x49
+	.4byte	.LASF676
 	.byte	0x2
 	.2byte	0x7fc
 	.4byte	0x5b
@@ -30891,35 +30959,35 @@ __func__.7630:
 	.8byte	.LFE284-.LFB284
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x464b
-	.uleb128 0x5a
+	.4byte	0x46c6
+	.uleb128 0x5d
 	.string	"p"
 	.byte	0x2
 	.2byte	0x7fc
 	.4byte	0x1f04
 	.4byte	.LLST95
-	.uleb128 0x52
-	.4byte	.LASF592
+	.uleb128 0x55
+	.4byte	.LASF595
 	.byte	0x2
 	.2byte	0x7fe
 	.4byte	0xdc9
 	.4byte	.LLST96
-	.uleb128 0x52
-	.4byte	.LASF594
+	.uleb128 0x55
+	.4byte	.LASF597
 	.byte	0x2
 	.2byte	0x7fe
 	.4byte	0xdc9
 	.4byte	.LLST97
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x3784
+	.4byte	0x37ff
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6982
+	.8byte	__func__.6981
 	.uleb128 0x34
 	.8byte	.LVL278
-	.4byte	0xa8ce
-	.4byte	0x4629
+	.4byte	0xa949
+	.4byte	0x46a4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30941,10 +31009,10 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x45
 	.8byte	.LVL282
-	.4byte	0x6d91
+	.4byte	0x6e0c
 	.uleb128 0x36
 	.8byte	.LVL284
-	.4byte	0x74e5
+	.4byte	0x7560
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30953,8 +31021,8 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF676
+	.uleb128 0x49
+	.4byte	.LASF677
 	.byte	0x2
 	.2byte	0x7ef
 	.4byte	0x5b
@@ -30962,11 +31030,11 @@ __func__.7630:
 	.8byte	.LFE283-.LFB283
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x46ef
+	.4byte	0x476a
 	.uleb128 0x34
-	.8byte	.LVL1802
-	.4byte	0x4715
-	.4byte	0x4685
+	.8byte	.LVL1804
+	.4byte	0x4790
+	.4byte	0x4700
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30975,9 +31043,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1803
-	.4byte	0x46ef
-	.4byte	0x469d
+	.8byte	.LVL1805
+	.4byte	0x476a
+	.4byte	0x4718
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30986,9 +31054,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1804
-	.4byte	0x4715
-	.4byte	0x46b5
+	.8byte	.LVL1806
+	.4byte	0x4790
+	.4byte	0x4730
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30997,9 +31065,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1805
-	.4byte	0x46ef
-	.4byte	0x46cd
+	.8byte	.LVL1807
+	.4byte	0x476a
+	.4byte	0x4748
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31008,11 +31076,11 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1806
-	.4byte	0x30c4
+	.8byte	.LVL1808
+	.4byte	0x313f
 	.uleb128 0x36
-	.8byte	.LVL1807
-	.4byte	0x3645
+	.8byte	.LVL1809
+	.4byte	0x36c0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31021,25 +31089,25 @@ __func__.7630:
 	.byte	0xff
 	.byte	0
 	.byte	0
-	.uleb128 0x60
-	.4byte	.LASF712
+	.uleb128 0x62
+	.4byte	.LASF713
 	.byte	0x2
 	.2byte	0x7dc
 	.byte	0x1
-	.4byte	0x4715
-	.uleb128 0x48
-	.4byte	.LASF639
+	.4byte	0x4790
+	.uleb128 0x4b
+	.4byte	.LASF640
 	.byte	0x2
 	.2byte	0x7dc
 	.4byte	0x1f04
-	.uleb128 0x49
-	.4byte	.LASF594
+	.uleb128 0x4c
+	.4byte	.LASF597
 	.byte	0x2
 	.2byte	0x7de
 	.4byte	0xdc9
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF677
+	.uleb128 0x49
+	.4byte	.LASF678
 	.byte	0x2
 	.2byte	0x677
 	.4byte	0x5b
@@ -31047,92 +31115,92 @@ __func__.7630:
 	.8byte	.LFE281-.LFB281
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4d12
-	.uleb128 0x50
-	.4byte	.LASF612
+	.4byte	0x4d8d
+	.uleb128 0x53
+	.4byte	.LASF614
 	.byte	0x2
 	.2byte	0x677
 	.4byte	0x1f04
-	.4byte	.LLST329
-	.uleb128 0x52
-	.4byte	.LASF678
+	.4byte	.LLST331
+	.uleb128 0x55
+	.4byte	.LASF679
 	.byte	0x2
 	.2byte	0x679
 	.4byte	0xdc9
-	.4byte	.LLST330
-	.uleb128 0x52
-	.4byte	.LASF679
+	.4byte	.LLST332
+	.uleb128 0x55
+	.4byte	.LASF680
 	.byte	0x2
 	.2byte	0x679
 	.4byte	0xdc9
-	.4byte	.LLST331
-	.uleb128 0x52
-	.4byte	.LASF592
+	.4byte	.LLST333
+	.uleb128 0x55
+	.4byte	.LASF595
 	.byte	0x2
 	.2byte	0x67a
 	.4byte	0xdc9
-	.4byte	.LLST332
-	.uleb128 0x52
+	.4byte	.LLST334
+	.uleb128 0x55
 	.4byte	.LASF382
 	.byte	0x2
 	.2byte	0x67a
 	.4byte	0xdc9
-	.4byte	.LLST333
-	.uleb128 0x52
+	.4byte	.LLST335
+	.uleb128 0x55
 	.4byte	.LASF380
 	.byte	0x2
 	.2byte	0x67a
 	.4byte	0xdc9
-	.4byte	.LLST334
-	.uleb128 0x52
-	.4byte	.LASF680
+	.4byte	.LLST336
+	.uleb128 0x55
+	.4byte	.LASF681
 	.byte	0x2
 	.2byte	0x67b
 	.4byte	0xdc9
-	.4byte	.LLST335
-	.uleb128 0x52
-	.4byte	.LASF681
+	.4byte	.LLST337
+	.uleb128 0x55
+	.4byte	.LASF682
 	.byte	0x2
 	.2byte	0x67b
 	.4byte	0xdc9
-	.4byte	.LLST336
-	.uleb128 0x52
-	.4byte	.LASF594
+	.4byte	.LLST338
+	.uleb128 0x55
+	.4byte	.LASF597
 	.byte	0x2
 	.2byte	0x67c
 	.4byte	0xdc9
-	.4byte	.LLST337
-	.uleb128 0x52
-	.4byte	.LASF682
+	.4byte	.LLST339
+	.uleb128 0x55
+	.4byte	.LASF683
 	.byte	0x2
 	.2byte	0x67d
 	.4byte	0x5b
-	.4byte	.LLST338
-	.uleb128 0x52
-	.4byte	.LASF683
+	.4byte	.LLST340
+	.uleb128 0x55
+	.4byte	.LASF684
 	.byte	0x2
 	.2byte	0x67d
 	.4byte	0x5b
-	.4byte	.LLST338
-	.uleb128 0x52
+	.4byte	.LLST340
+	.uleb128 0x55
 	.4byte	.LASF569
 	.byte	0x2
 	.2byte	0x67e
 	.4byte	0xdc9
-	.4byte	.LLST340
-	.uleb128 0x51
+	.4byte	.LLST342
+	.uleb128 0x54
 	.string	"n"
 	.byte	0x2
 	.2byte	0x67e
 	.4byte	0xdc9
-	.4byte	.LLST341
-	.uleb128 0x51
+	.4byte	.LLST343
+	.uleb128 0x54
 	.string	"req"
 	.byte	0x2
 	.2byte	0x67e
 	.4byte	0xdc9
-	.4byte	.LLST342
-	.uleb128 0x5e
+	.4byte	.LLST344
+	.uleb128 0x60
 	.string	"lpa"
 	.byte	0x2
 	.2byte	0x67f
@@ -31140,7 +31208,7 @@ __func__.7630:
 	.uleb128 0x1
 	.byte	0x68
 	.uleb128 0x2a
-	.4byte	.LASF663
+	.4byte	.LASF664
 	.byte	0x2
 	.2byte	0x67f
 	.4byte	0xdd4
@@ -31148,7 +31216,7 @@ __func__.7630:
 	.byte	0x91
 	.sleb128 -12
 	.uleb128 0x2a
-	.4byte	.LASF624
+	.4byte	.LASF625
 	.byte	0x2
 	.2byte	0x67f
 	.4byte	0xdd4
@@ -31156,91 +31224,91 @@ __func__.7630:
 	.byte	0x91
 	.sleb128 -8
 	.uleb128 0x2a
-	.4byte	.LASF614
+	.4byte	.LASF616
 	.byte	0x2
 	.2byte	0x67f
 	.4byte	0xdd4
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -4
-	.uleb128 0x52
-	.4byte	.LASF629
+	.uleb128 0x55
+	.4byte	.LASF630
 	.byte	0x2
 	.2byte	0x680
 	.4byte	0xdc9
-	.4byte	.LLST343
-	.uleb128 0x52
-	.4byte	.LASF684
+	.4byte	.LLST345
+	.uleb128 0x55
+	.4byte	.LASF685
 	.byte	0x2
 	.2byte	0x680
 	.4byte	0xdc9
-	.4byte	.LLST344
-	.uleb128 0x52
-	.4byte	.LASF685
+	.4byte	.LLST346
+	.uleb128 0x55
+	.4byte	.LASF686
 	.byte	0x2
 	.2byte	0x681
 	.4byte	0xdd4
-	.4byte	.LLST345
-	.uleb128 0x52
-	.4byte	.LASF686
+	.4byte	.LLST347
+	.uleb128 0x55
+	.4byte	.LASF687
 	.byte	0x2
 	.2byte	0x682
 	.4byte	0xdc9
-	.4byte	.LLST346
-	.uleb128 0x52
-	.4byte	.LASF596
+	.4byte	.LLST348
+	.uleb128 0x55
+	.4byte	.LASF599
 	.byte	0x2
 	.2byte	0x683
-	.4byte	0x2d84
-	.4byte	.LLST347
-	.uleb128 0x5f
-	.4byte	.LASF687
+	.4byte	0x2dff
+	.4byte	.LLST349
+	.uleb128 0x61
+	.4byte	.LASF688
 	.byte	0x2
 	.2byte	0x684
 	.4byte	0xdd4
 	.byte	0
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x4d22
+	.4byte	0x4d9d
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6925
-	.uleb128 0x56
-	.4byte	.LASF689
+	.8byte	__func__.6924
+	.uleb128 0x59
+	.4byte	.LASF690
 	.byte	0x2
 	.2byte	0x713
-	.8byte	.L1031
-	.uleb128 0x56
-	.4byte	.LASF618
+	.8byte	.L1032
+	.uleb128 0x59
+	.4byte	.LASF620
 	.byte	0x2
 	.2byte	0x71b
-	.8byte	.L1046
-	.uleb128 0x56
-	.4byte	.LASF690
+	.8byte	.L1047
+	.uleb128 0x59
+	.4byte	.LASF691
 	.byte	0x2
 	.2byte	0x7ce
-	.8byte	.L1052
-	.uleb128 0x4b
-	.4byte	.LASF691
+	.8byte	.L1053
+	.uleb128 0x4e
+	.4byte	.LASF692
 	.byte	0x2
 	.2byte	0x7d8
 	.uleb128 0x40
 	.4byte	.Ldebug_ranges0+0x220
-	.4byte	0x4935
-	.uleb128 0x52
-	.4byte	.LASF692
+	.4byte	0x49b0
+	.uleb128 0x55
+	.4byte	.LASF693
 	.byte	0x2
 	.2byte	0x6eb
 	.4byte	0xdd4
-	.4byte	.LLST348
-	.uleb128 0x52
-	.4byte	.LASF693
+	.4byte	.LLST350
+	.uleb128 0x55
+	.4byte	.LASF694
 	.byte	0x2
 	.2byte	0x6ec
 	.4byte	0xdd4
-	.4byte	.LLST349
+	.4byte	.LLST351
 	.uleb128 0x36
-	.8byte	.LVL1428
+	.8byte	.LVL1430
 	.4byte	0x29a4
 	.uleb128 0x30
 	.uleb128 0x1
@@ -31251,23 +31319,23 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x40
 	.4byte	.Ldebug_ranges0+0x250
-	.4byte	0x4a30
-	.uleb128 0x52
-	.4byte	.LASF694
+	.4byte	0x4aab
+	.uleb128 0x55
+	.4byte	.LASF695
 	.byte	0x2
 	.2byte	0x746
 	.4byte	0xdd4
-	.4byte	.LLST350
-	.uleb128 0x52
-	.4byte	.LASF695
+	.4byte	.LLST352
+	.uleb128 0x55
+	.4byte	.LASF696
 	.byte	0x2
 	.2byte	0x747
 	.4byte	0xdd4
-	.4byte	.LLST351
+	.4byte	.LLST353
 	.uleb128 0x34
-	.8byte	.LVL1471
+	.8byte	.LVL1473
 	.4byte	0x29a4
-	.4byte	0x497a
+	.4byte	0x49f5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -31280,12 +31348,12 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1473
-	.4byte	0x3645
+	.8byte	.LVL1475
+	.4byte	0x36c0
 	.uleb128 0x34
-	.8byte	.LVL1479
-	.4byte	0x5bbb
-	.4byte	0x49ab
+	.8byte	.LVL1481
+	.4byte	0x5c36
+	.4byte	0x4a26
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31305,9 +31373,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1482
-	.4byte	0x6ca7
-	.4byte	0x49c6
+	.8byte	.LVL1484
+	.4byte	0x6d22
+	.4byte	0x4a41
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -31318,9 +31386,9 @@ __func__.7630:
 	.byte	0x4
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1483
-	.4byte	0x4d27
-	.4byte	0x49de
+	.8byte	.LVL1485
+	.4byte	0x4da2
+	.4byte	0x4a59
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31329,9 +31397,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1485
+	.8byte	.LVL1487
 	.4byte	0x29a4
-	.4byte	0x49fa
+	.4byte	0x4a75
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -31344,9 +31412,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1488
-	.4byte	0x6ca7
-	.4byte	0x4a12
+	.8byte	.LVL1490
+	.4byte	0x6d22
+	.4byte	0x4a8d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -31355,8 +31423,8 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1489
-	.4byte	0x6ca7
+	.8byte	.LVL1491
+	.4byte	0x6d22
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31373,26 +31441,26 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x61
-	.8byte	.LBB271
-	.8byte	.LBE271-.LBB271
-	.4byte	0x4aba
-	.uleb128 0x52
-	.4byte	.LASF696
+	.uleb128 0x63
+	.8byte	.LBB275
+	.8byte	.LBE275-.LBB275
+	.4byte	0x4b35
+	.uleb128 0x55
+	.4byte	.LASF697
 	.byte	0x2
 	.2byte	0x785
 	.4byte	0xdd4
-	.4byte	.LLST352
-	.uleb128 0x52
-	.4byte	.LASF695
+	.4byte	.LLST354
+	.uleb128 0x55
+	.4byte	.LASF696
 	.byte	0x2
 	.2byte	0x786
 	.4byte	0xdd4
-	.4byte	.LLST353
+	.4byte	.LLST355
 	.uleb128 0x34
-	.8byte	.LVL1497
+	.8byte	.LVL1499
 	.4byte	0x29a4
-	.4byte	0x4a81
+	.4byte	0x4afc
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -31405,9 +31473,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1498
-	.4byte	0x6ca7
-	.4byte	0x4a99
+	.8byte	.LVL1500
+	.4byte	0x6d22
+	.4byte	0x4b14
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31416,8 +31484,8 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1499
-	.4byte	0x5bbb
+	.8byte	.LVL1501
+	.4byte	0x5c36
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31438,9 +31506,9 @@ __func__.7630:
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1376
-	.4byte	0x6bca
-	.4byte	0x4ad1
+	.8byte	.LVL1378
+	.4byte	0x6c45
+	.4byte	0x4b4c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -31448,9 +31516,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1381
+	.8byte	.LVL1383
 	.4byte	0x29a4
-	.4byte	0x4aee
+	.4byte	0x4b69
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -31464,12 +31532,12 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1386
-	.4byte	0x6d36
+	.8byte	.LVL1388
+	.4byte	0x6db1
 	.uleb128 0x34
-	.8byte	.LVL1389
-	.4byte	0x4e68
-	.4byte	0x4b1f
+	.8byte	.LVL1391
+	.4byte	0x4ee3
+	.4byte	0x4b9a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31490,9 +31558,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1397
-	.4byte	0xa8ce
-	.4byte	0x4b52
+	.8byte	.LVL1399
+	.4byte	0xa949
+	.4byte	0x4bcd
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31513,9 +31581,9 @@ __func__.7630:
 	.2byte	0x6aa
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1398
-	.4byte	0xa8ce
-	.4byte	0x4b85
+	.8byte	.LVL1400
+	.4byte	0xa949
+	.4byte	0x4c00
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31536,9 +31604,9 @@ __func__.7630:
 	.2byte	0x6ab
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1407
-	.4byte	0x6ca7
-	.4byte	0x4b9d
+	.8byte	.LVL1409
+	.4byte	0x6d22
+	.4byte	0x4c18
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31547,9 +31615,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1433
-	.4byte	0x5814
-	.4byte	0x4bbc
+	.8byte	.LVL1435
+	.4byte	0x588f
+	.4byte	0x4c37
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31558,9 +31626,9 @@ __func__.7630:
 	.8byte	.LANCHOR144
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1436
+	.8byte	.LVL1438
 	.4byte	0x29a4
-	.4byte	0x4bd9
+	.4byte	0x4c54
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -31574,9 +31642,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1457
-	.4byte	0x6d36
-	.4byte	0x4bf3
+	.8byte	.LVL1459
+	.4byte	0x6db1
+	.4byte	0x4c6e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31587,12 +31655,12 @@ __func__.7630:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1464
-	.4byte	0x3645
+	.8byte	.LVL1466
+	.4byte	0x36c0
 	.uleb128 0x34
-	.8byte	.LVL1467
-	.4byte	0x6ca7
-	.4byte	0x4c18
+	.8byte	.LVL1469
+	.4byte	0x6d22
+	.4byte	0x4c93
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31601,9 +31669,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1468
-	.4byte	0x5bbb
-	.4byte	0x4c3c
+	.8byte	.LVL1470
+	.4byte	0x5c36
+	.4byte	0x4cb7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31623,9 +31691,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1469
-	.4byte	0x6ca7
-	.4byte	0x4c54
+	.8byte	.LVL1471
+	.4byte	0x6d22
+	.4byte	0x4ccf
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31634,9 +31702,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1474
-	.4byte	0x6cf6
-	.4byte	0x4c6e
+	.8byte	.LVL1476
+	.4byte	0x6d71
+	.4byte	0x4ce9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31647,9 +31715,9 @@ __func__.7630:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1476
-	.4byte	0xa8ce
-	.4byte	0x4ca1
+	.8byte	.LVL1478
+	.4byte	0xa949
+	.4byte	0x4d1c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31670,9 +31738,9 @@ __func__.7630:
 	.2byte	0x7a5
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1491
-	.4byte	0x5bbb
-	.4byte	0x4cc5
+	.8byte	.LVL1493
+	.4byte	0x5c36
+	.4byte	0x4d40
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31692,9 +31760,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1492
-	.4byte	0x6cf6
-	.4byte	0x4cdf
+	.8byte	.LVL1494
+	.4byte	0x6d71
+	.4byte	0x4d5a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31705,9 +31773,9 @@ __func__.7630:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1501
-	.4byte	0xa8ce
-	.4byte	0x4d04
+	.8byte	.LVL1503
+	.4byte	0xa949
+	.4byte	0x4d7f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31722,76 +31790,76 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1503
-	.4byte	0x3645
+	.8byte	.LVL1505
+	.4byte	0x36c0
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x4d22
+	.4byte	0x4d9d
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x15
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x4d12
-	.uleb128 0x5d
-	.4byte	.LASF697
+	.4byte	0x4d8d
+	.uleb128 0x5f
+	.4byte	.LASF698
 	.byte	0x2
 	.2byte	0x65b
 	.8byte	.LFB280
 	.8byte	.LFE280-.LFB280
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4e68
-	.uleb128 0x5a
+	.4byte	0x4ee3
+	.uleb128 0x5d
 	.string	"lpa"
 	.byte	0x2
 	.2byte	0x65b
 	.4byte	0xdd4
-	.4byte	.LLST243
-	.uleb128 0x50
-	.4byte	.LASF663
+	.4byte	.LLST245
+	.uleb128 0x53
+	.4byte	.LASF664
 	.byte	0x2
 	.2byte	0x65b
 	.4byte	0xdd4
-	.4byte	.LLST244
-	.uleb128 0x52
-	.4byte	.LASF629
+	.4byte	.LLST246
+	.uleb128 0x55
+	.4byte	.LASF630
 	.byte	0x2
 	.2byte	0x65d
 	.4byte	0xdc9
-	.4byte	.LLST245
+	.4byte	.LLST247
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x3784
+	.4byte	0x37ff
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6891
+	.8byte	__func__.6890
 	.uleb128 0x40
 	.4byte	.Ldebug_ranges0+0x100
-	.4byte	0x4e2c
-	.uleb128 0x51
+	.4byte	0x4ea7
+	.uleb128 0x54
 	.string	"i"
 	.byte	0x2
 	.2byte	0x661
 	.4byte	0xdc9
-	.4byte	.LLST246
-	.uleb128 0x52
-	.4byte	.LASF608
+	.4byte	.LLST248
+	.uleb128 0x55
+	.4byte	.LASF587
 	.byte	0x2
 	.2byte	0x662
 	.4byte	0xdc9
-	.4byte	.LLST247
-	.uleb128 0x52
+	.4byte	.LLST249
+	.uleb128 0x55
 	.4byte	.LASF236
 	.byte	0x2
 	.2byte	0x663
 	.4byte	0xdc9
-	.4byte	.LLST248
+	.4byte	.LLST250
 	.uleb128 0x34
-	.8byte	.LVL942
-	.4byte	0x66e6
-	.4byte	0x4de4
+	.8byte	.LVL944
+	.4byte	0x6761
+	.4byte	0x4e5f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31806,9 +31874,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL943
-	.4byte	0xa8ce
-	.4byte	0x4e17
+	.8byte	.LVL945
+	.4byte	0xa949
+	.4byte	0x4e92
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31829,8 +31897,8 @@ __func__.7630:
 	.2byte	0x667
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL944
-	.4byte	0x68bb
+	.8byte	.LVL946
+	.4byte	0x6936
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31840,9 +31908,9 @@ __func__.7630:
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL936
-	.4byte	0x6cf6
-	.4byte	0x4e47
+	.8byte	.LVL938
+	.4byte	0x6d71
+	.4byte	0x4ec2
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31854,8 +31922,8 @@ __func__.7630:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL946
-	.4byte	0x5bbb
+	.8byte	.LVL948
+	.4byte	0x5c36
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31875,43 +31943,43 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.byte	0
-	.uleb128 0x5d
-	.4byte	.LASF698
+	.uleb128 0x5f
+	.4byte	.LASF699
 	.byte	0x2
 	.2byte	0x647
 	.8byte	.LFB279
 	.8byte	.LFE279-.LFB279
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4ec5
-	.uleb128 0x62
-	.4byte	.LASF612
+	.4byte	0x4f40
+	.uleb128 0x64
+	.4byte	.LASF614
 	.byte	0x2
 	.2byte	0x647
 	.4byte	0x1f04
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x50
+	.uleb128 0x53
 	.4byte	.LASF380
 	.byte	0x2
 	.2byte	0x647
 	.4byte	0xdc9
 	.4byte	.LLST90
-	.uleb128 0x50
+	.uleb128 0x53
 	.4byte	.LASF382
 	.byte	0x2
 	.2byte	0x647
 	.4byte	0xdc9
 	.4byte	.LLST91
-	.uleb128 0x52
-	.4byte	.LASF592
+	.uleb128 0x55
+	.4byte	.LASF595
 	.byte	0x2
 	.2byte	0x649
 	.4byte	0xdc9
 	.4byte	.LLST92
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF699
+	.uleb128 0x49
+	.4byte	.LASF700
 	.byte	0x2
 	.2byte	0x63e
 	.4byte	0x5b
@@ -31919,13 +31987,13 @@ __func__.7630:
 	.8byte	.LFE278-.LFB278
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4f10
+	.4byte	0x4f8b
 	.uleb128 0x45
-	.8byte	.LVL1106
-	.4byte	0x4f10
+	.8byte	.LVL1108
+	.4byte	0x4f8b
 	.uleb128 0x36
-	.8byte	.LVL1107
-	.4byte	0x4fa8
+	.8byte	.LVL1109
+	.4byte	0x5023
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31934,25 +32002,25 @@ __func__.7630:
 	.8byte	.LANCHOR144
 	.byte	0
 	.byte	0
-	.uleb128 0x5d
-	.4byte	.LASF700
+	.uleb128 0x5f
+	.4byte	.LASF701
 	.byte	0x2
 	.2byte	0x627
 	.8byte	.LFB277
 	.8byte	.LFE277-.LFB277
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4f6a
-	.uleb128 0x52
+	.4byte	0x4fe5
+	.uleb128 0x55
 	.4byte	.LASF330
 	.byte	0x2
 	.2byte	0x629
 	.4byte	0xdc9
-	.4byte	.LLST274
+	.4byte	.LLST276
 	.uleb128 0x34
-	.8byte	.LVL1103
+	.8byte	.LVL1105
 	.4byte	0x259f
-	.4byte	0x4f55
+	.4byte	0x4fd0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -31960,7 +32028,7 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1104
+	.8byte	.LVL1106
 	.4byte	0x259f
 	.uleb128 0x30
 	.uleb128 0x1
@@ -31970,8 +32038,8 @@ __func__.7630:
 	.byte	0xff
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF701
+	.uleb128 0x49
+	.4byte	.LASF702
 	.byte	0x2
 	.2byte	0x617
 	.4byte	0x5b
@@ -31979,10 +32047,10 @@ __func__.7630:
 	.8byte	.LFE276-.LFB276
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4fa8
+	.4byte	0x5023
 	.uleb128 0x36
-	.8byte	.LVL1102
-	.4byte	0x4fa8
+	.8byte	.LVL1104
+	.4byte	0x5023
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31991,8 +32059,8 @@ __func__.7630:
 	.8byte	.LANCHOR149
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF702
+	.uleb128 0x49
+	.4byte	.LASF703
 	.byte	0x2
 	.2byte	0x5b9
 	.4byte	0x5b
@@ -32000,77 +32068,77 @@ __func__.7630:
 	.8byte	.LFE275-.LFB275
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x517a
-	.uleb128 0x50
-	.4byte	.LASF703
+	.4byte	0x51f5
+	.uleb128 0x53
+	.4byte	.LASF704
 	.byte	0x2
 	.2byte	0x5b9
-	.4byte	0x517a
-	.4byte	.LLST263
-	.uleb128 0x52
-	.4byte	.LASF704
+	.4byte	0x51f5
+	.4byte	.LLST265
+	.uleb128 0x55
+	.4byte	.LASF705
 	.byte	0x2
 	.2byte	0x5bb
 	.4byte	0xdea
-	.4byte	.LLST264
-	.uleb128 0x52
+	.4byte	.LLST266
+	.uleb128 0x55
 	.4byte	.LASF299
 	.byte	0x2
 	.2byte	0x5bb
 	.4byte	0xdea
-	.4byte	.LLST265
-	.uleb128 0x52
-	.4byte	.LASF705
+	.4byte	.LLST267
+	.uleb128 0x55
+	.4byte	.LASF706
 	.byte	0x2
 	.2byte	0x5bc
 	.4byte	0xdea
-	.4byte	.LLST266
-	.uleb128 0x52
+	.4byte	.LLST268
+	.uleb128 0x55
 	.4byte	.LASF330
 	.byte	0x2
 	.2byte	0x5bd
 	.4byte	0xdc9
-	.4byte	.LLST267
-	.uleb128 0x52
-	.4byte	.LASF706
+	.4byte	.LLST269
+	.uleb128 0x55
+	.4byte	.LASF707
 	.byte	0x2
 	.2byte	0x5be
 	.4byte	0x1001
-	.4byte	.LLST268
-	.uleb128 0x52
+	.4byte	.LLST270
+	.uleb128 0x55
 	.4byte	.LASF310
 	.byte	0x2
 	.2byte	0x5bf
 	.4byte	0x10f8
-	.4byte	.LLST269
-	.uleb128 0x52
+	.4byte	.LLST271
+	.uleb128 0x55
 	.4byte	.LASF311
 	.byte	0x2
 	.2byte	0x5c0
 	.4byte	0x1001
-	.4byte	.LLST270
-	.uleb128 0x52
+	.4byte	.LLST272
+	.uleb128 0x55
 	.4byte	.LASF307
 	.byte	0x2
 	.2byte	0x5c1
 	.4byte	0xdc9
-	.4byte	.LLST271
-	.uleb128 0x52
-	.4byte	.LASF707
+	.4byte	.LLST273
+	.uleb128 0x55
+	.4byte	.LASF708
 	.byte	0x2
 	.2byte	0x5c2
 	.4byte	0xdc9
-	.4byte	.LLST272
-	.uleb128 0x52
-	.4byte	.LASF708
+	.4byte	.LLST274
+	.uleb128 0x55
+	.4byte	.LASF709
 	.byte	0x2
 	.2byte	0x5c3
-	.4byte	0x5180
-	.4byte	.LLST273
+	.4byte	0x51fb
+	.4byte	.LLST275
 	.uleb128 0x34
-	.8byte	.LVL1062
+	.8byte	.LVL1064
 	.4byte	0x259f
-	.4byte	0x50a0
+	.4byte	0x511b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32093,9 +32161,9 @@ __func__.7630:
 	.byte	0x24
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1067
-	.4byte	0x6bca
-	.4byte	0x50b7
+	.8byte	.LVL1069
+	.4byte	0x6c45
+	.4byte	0x5132
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32103,9 +32171,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1072
-	.4byte	0x62df
-	.4byte	0x50cf
+	.8byte	.LVL1074
+	.4byte	0x635a
+	.4byte	0x514a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32114,9 +32182,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1073
-	.4byte	0x6287
-	.4byte	0x50e7
+	.8byte	.LVL1075
+	.4byte	0x6302
+	.4byte	0x5162
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32125,9 +32193,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1074
-	.4byte	0x610d
-	.4byte	0x50ff
+	.8byte	.LVL1076
+	.4byte	0x6188
+	.4byte	0x517a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32136,9 +32204,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1075
-	.4byte	0x610d
-	.4byte	0x5117
+	.8byte	.LVL1077
+	.4byte	0x6188
+	.4byte	0x5192
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32147,9 +32215,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1083
+	.8byte	.LVL1085
 	.4byte	0x29a4
-	.4byte	0x5139
+	.4byte	0x51b4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32168,9 +32236,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1087
+	.8byte	.LVL1089
 	.4byte	0x29a4
-	.4byte	0x515b
+	.4byte	0x51d6
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32189,7 +32257,7 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1089
+	.8byte	.LVL1091
 	.4byte	0x29a4
 	.uleb128 0x30
 	.uleb128 0x1
@@ -32215,8 +32283,8 @@ __func__.7630:
 	.uleb128 0x8
 	.byte	0x8
 	.4byte	0x1280
-	.uleb128 0x46
-	.4byte	.LASF709
+	.uleb128 0x49
+	.4byte	.LASF710
 	.byte	0x2
 	.2byte	0x54f
 	.4byte	0x5b
@@ -32224,23 +32292,23 @@ __func__.7630:
 	.8byte	.LFE274-.LFB274
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5365
-	.uleb128 0x52
-	.4byte	.LASF705
+	.4byte	0x53e0
+	.uleb128 0x55
+	.4byte	.LASF706
 	.byte	0x2
 	.2byte	0x551
 	.4byte	0xdea
-	.4byte	.LLST461
+	.4byte	.LLST463
 	.uleb128 0x3f
 	.4byte	.LASF574
 	.4byte	0x299f
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6828
+	.8byte	__func__.6827
 	.uleb128 0x34
-	.8byte	.LVL2076
+	.8byte	.LVL2078
 	.4byte	0x259f
-	.4byte	0x51e2
+	.4byte	0x525d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32248,9 +32316,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2077
-	.4byte	0x6bca
-	.4byte	0x51f9
+	.8byte	.LVL2079
+	.4byte	0x6c45
+	.4byte	0x5274
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32258,9 +32326,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2079
-	.4byte	0xa8ce
-	.4byte	0x522c
+	.8byte	.LVL2081
+	.4byte	0xa949
+	.4byte	0x52a7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32281,9 +32349,9 @@ __func__.7630:
 	.2byte	0x56c
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2080
-	.4byte	0xa8ce
-	.4byte	0x525f
+	.8byte	.LVL2082
+	.4byte	0xa949
+	.4byte	0x52da
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32304,9 +32372,9 @@ __func__.7630:
 	.2byte	0x56e
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2082
+	.8byte	.LVL2084
 	.4byte	0x2527
-	.4byte	0x527d
+	.4byte	0x52f8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32321,15 +32389,15 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2083
+	.8byte	.LVL2085
 	.4byte	0x2527
 	.uleb128 0x45
-	.8byte	.LVL2084
+	.8byte	.LVL2086
 	.4byte	0x2527
 	.uleb128 0x34
-	.8byte	.LVL2085
-	.4byte	0xa8ce
-	.4byte	0x52ca
+	.8byte	.LVL2087
+	.4byte	0xa949
+	.4byte	0x5345
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32350,9 +32418,9 @@ __func__.7630:
 	.2byte	0x584
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2086
-	.4byte	0x4593
-	.4byte	0x52e9
+	.8byte	.LVL2088
+	.4byte	0x460e
+	.4byte	0x5364
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32361,9 +32429,9 @@ __func__.7630:
 	.8byte	.LANCHOR51
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2087
-	.4byte	0x4593
-	.4byte	0x5308
+	.8byte	.LVL2089
+	.4byte	0x460e
+	.4byte	0x5383
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32372,9 +32440,9 @@ __func__.7630:
 	.8byte	.LANCHOR52
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2088
-	.4byte	0x4593
-	.4byte	0x5327
+	.8byte	.LVL2090
+	.4byte	0x460e
+	.4byte	0x53a2
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32383,9 +32451,9 @@ __func__.7630:
 	.8byte	.LANCHOR53
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2089
-	.4byte	0x4593
-	.4byte	0x5346
+	.8byte	.LVL2091
+	.4byte	0x460e
+	.4byte	0x53c1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32394,7 +32462,7 @@ __func__.7630:
 	.8byte	.LANCHOR82
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL2091
+	.8byte	.LVL2093
 	.4byte	0x29a4
 	.uleb128 0x30
 	.uleb128 0x1
@@ -32414,8 +32482,8 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF710
+	.uleb128 0x49
+	.4byte	.LASF711
 	.byte	0x2
 	.2byte	0x54a
 	.4byte	0x5b
@@ -32423,39 +32491,39 @@ __func__.7630:
 	.8byte	.LFE273-.LFB273
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5398
-	.uleb128 0x50
-	.4byte	.LASF711
+	.4byte	0x5413
+	.uleb128 0x53
+	.4byte	.LASF712
 	.byte	0x2
 	.2byte	0x54a
 	.4byte	0xdc9
 	.4byte	.LLST89
 	.byte	0
-	.uleb128 0x60
-	.4byte	.LASF713
+	.uleb128 0x62
+	.4byte	.LASF714
 	.byte	0x2
 	.2byte	0x542
 	.byte	0x1
-	.4byte	0x53be
-	.uleb128 0x48
-	.4byte	.LASF711
+	.4byte	0x5439
+	.uleb128 0x4b
+	.4byte	.LASF712
 	.byte	0x2
 	.2byte	0x542
 	.4byte	0xdc9
-	.uleb128 0x48
-	.4byte	.LASF588
+	.uleb128 0x4b
+	.4byte	.LASF591
 	.byte	0x2
 	.2byte	0x542
 	.4byte	0x5b
 	.byte	0
-	.uleb128 0x4f
-	.4byte	.LASF715
+	.uleb128 0x52
+	.4byte	.LASF716
 	.byte	0x2
 	.2byte	0x535
 	.4byte	0x5b
 	.byte	0x1
-	.uleb128 0x46
-	.4byte	.LASF716
+	.uleb128 0x49
+	.4byte	.LASF717
 	.byte	0x2
 	.2byte	0x446
 	.4byte	0x5b
@@ -32463,59 +32531,59 @@ __func__.7630:
 	.8byte	.LFE270-.LFB270
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5619
-	.uleb128 0x52
-	.4byte	.LASF592
+	.4byte	0x5694
+	.uleb128 0x55
+	.4byte	.LASF595
 	.byte	0x2
 	.2byte	0x448
 	.4byte	0xdc9
-	.4byte	.LLST256
-	.uleb128 0x52
-	.4byte	.LASF717
+	.4byte	.LLST258
+	.uleb128 0x55
+	.4byte	.LASF718
 	.byte	0x2
 	.2byte	0x448
 	.4byte	0xdc9
-	.4byte	.LLST257
-	.uleb128 0x52
+	.4byte	.LLST259
+	.uleb128 0x55
 	.4byte	.LASF388
 	.byte	0x2
 	.2byte	0x449
 	.4byte	0xdc9
-	.4byte	.LLST258
-	.uleb128 0x52
+	.4byte	.LLST260
+	.uleb128 0x55
 	.4byte	.LASF569
 	.byte	0x2
 	.2byte	0x449
 	.4byte	0xdc9
-	.4byte	.LLST259
-	.uleb128 0x51
+	.4byte	.LLST261
+	.uleb128 0x54
 	.string	"i"
 	.byte	0x2
 	.2byte	0x44a
 	.4byte	0xdea
-	.4byte	.LLST260
-	.uleb128 0x51
+	.4byte	.LLST262
+	.uleb128 0x54
 	.string	"j"
 	.byte	0x2
 	.2byte	0x44a
 	.4byte	0xdea
-	.4byte	.LLST261
-	.uleb128 0x52
-	.4byte	.LASF718
+	.4byte	.LLST263
+	.uleb128 0x55
+	.4byte	.LASF719
 	.byte	0x2
 	.2byte	0x44b
-	.4byte	0x5180
-	.4byte	.LLST262
+	.4byte	0x51fb
+	.4byte	.LLST264
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x41dd
+	.4byte	0x4258
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6771
+	.8byte	__func__.6770
 	.uleb128 0x34
-	.8byte	.LVL984
+	.8byte	.LVL986
 	.4byte	0x259f
-	.4byte	0x5483
+	.4byte	0x54fe
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32523,9 +32591,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL985
+	.8byte	.LVL987
 	.4byte	0x259f
-	.4byte	0x549a
+	.4byte	0x5515
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32533,9 +32601,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL986
+	.8byte	.LVL988
 	.4byte	0x259f
-	.4byte	0x54b1
+	.4byte	0x552c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32543,9 +32611,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL987
+	.8byte	.LVL989
 	.4byte	0x259f
-	.4byte	0x54c8
+	.4byte	0x5543
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32553,9 +32621,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL988
+	.8byte	.LVL990
 	.4byte	0x259f
-	.4byte	0x54f2
+	.4byte	0x556d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32575,9 +32643,9 @@ __func__.7630:
 	.byte	0x3c
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL991
-	.4byte	0x6d91
-	.4byte	0x550d
+	.8byte	.LVL993
+	.4byte	0x6e0c
+	.4byte	0x5588
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32588,9 +32656,9 @@ __func__.7630:
 	.byte	0x2
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL993
-	.4byte	0x74e5
-	.4byte	0x5525
+	.8byte	.LVL995
+	.4byte	0x7560
+	.4byte	0x55a0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32599,9 +32667,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1002
+	.8byte	.LVL1004
 	.4byte	0x29a4
-	.4byte	0x5542
+	.4byte	0x55bd
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32615,9 +32683,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1007
+	.8byte	.LVL1009
 	.4byte	0x29a4
-	.4byte	0x555e
+	.4byte	0x55d9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32630,9 +32698,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1012
-	.4byte	0x6a7f
-	.4byte	0x5576
+	.8byte	.LVL1014
+	.4byte	0x6afa
+	.4byte	0x55f1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32641,9 +32709,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1013
-	.4byte	0xa8ce
-	.4byte	0x55a4
+	.8byte	.LVL1015
+	.4byte	0xa949
+	.4byte	0x561f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32665,9 +32733,9 @@ __func__.7630:
 	.2byte	0x48a
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1024
-	.4byte	0xa8ce
-	.4byte	0x55d2
+	.8byte	.LVL1026
+	.4byte	0xa949
+	.4byte	0x564d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32689,9 +32757,9 @@ __func__.7630:
 	.2byte	0x4b3
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1035
-	.4byte	0x6a7f
-	.4byte	0x55e9
+	.8byte	.LVL1037
+	.4byte	0x6afa
+	.4byte	0x5664
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32699,8 +32767,8 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1037
-	.4byte	0xa8ce
+	.8byte	.LVL1039
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32721,8 +32789,8 @@ __func__.7630:
 	.2byte	0x530
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF719
+	.uleb128 0x49
+	.4byte	.LASF720
 	.byte	0x2
 	.2byte	0x3eb
 	.4byte	0x5b
@@ -32730,27 +32798,27 @@ __func__.7630:
 	.8byte	.LFE269-.LFB269
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x57c2
-	.uleb128 0x52
+	.4byte	0x583d
+	.uleb128 0x55
 	.4byte	.LASF300
 	.byte	0x2
 	.2byte	0x3ed
 	.4byte	0xdc9
-	.4byte	.LLST383
-	.uleb128 0x52
-	.4byte	.LASF720
+	.4byte	.LLST385
+	.uleb128 0x55
+	.4byte	.LASF721
 	.byte	0x2
 	.2byte	0x3ee
-	.4byte	0x57c2
-	.4byte	.LLST384
-	.uleb128 0x52
-	.4byte	.LASF721
+	.4byte	0x583d
+	.4byte	.LLST386
+	.uleb128 0x55
+	.4byte	.LASF722
 	.byte	0x2
 	.2byte	0x3ef
 	.4byte	0xdc9
-	.4byte	.LLST385
-	.uleb128 0x4b
-	.4byte	.LASF722
+	.4byte	.LLST387
+	.uleb128 0x4e
+	.4byte	.LASF723
 	.byte	0x2
 	.2byte	0x41c
 	.uleb128 0x3f
@@ -32758,11 +32826,11 @@ __func__.7630:
 	.4byte	0x299f
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6749
+	.8byte	__func__.6748
 	.uleb128 0x34
-	.8byte	.LVL1663
+	.8byte	.LVL1665
 	.4byte	0x259f
-	.4byte	0x569e
+	.4byte	0x5719
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32771,9 +32839,9 @@ __func__.7630:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1664
+	.8byte	.LVL1666
 	.4byte	0x2527
-	.4byte	0x56c3
+	.4byte	0x573e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32788,15 +32856,15 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1665
+	.8byte	.LVL1667
 	.4byte	0x2527
 	.uleb128 0x45
-	.8byte	.LVL1666
+	.8byte	.LVL1668
 	.4byte	0x2527
 	.uleb128 0x34
-	.8byte	.LVL1667
-	.4byte	0x58c9
-	.4byte	0x56f5
+	.8byte	.LVL1669
+	.4byte	0x5944
+	.4byte	0x5770
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32805,9 +32873,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1669
+	.8byte	.LVL1671
 	.4byte	0x27e7
-	.4byte	0x571c
+	.4byte	0x5797
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32831,12 +32899,12 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1671
-	.4byte	0x6905
+	.8byte	.LVL1673
+	.4byte	0x6980
 	.uleb128 0x34
-	.8byte	.LVL1672
+	.8byte	.LVL1674
 	.4byte	0x27e7
-	.4byte	0x5750
+	.4byte	0x57cb
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32860,9 +32928,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1673
-	.4byte	0xa8ce
-	.4byte	0x5783
+	.8byte	.LVL1675
+	.4byte	0xa949
+	.4byte	0x57fe
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32883,9 +32951,9 @@ __func__.7630:
 	.2byte	0x433
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1676
-	.4byte	0xa8ce
-	.4byte	0x57a8
+	.8byte	.LVL1678
+	.4byte	0xa949
+	.4byte	0x5823
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32900,8 +32968,8 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1677
-	.4byte	0x6a7f
+	.8byte	.LVL1679
+	.4byte	0x6afa
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32918,77 +32986,77 @@ __func__.7630:
 	.uleb128 0x8
 	.byte	0x8
 	.4byte	0x12d8
-	.uleb128 0x60
-	.4byte	.LASF723
+	.uleb128 0x62
+	.4byte	.LASF724
 	.byte	0x2
 	.2byte	0x3b2
 	.byte	0x1
-	.4byte	0x5814
+	.4byte	0x588f
+	.uleb128 0x50
 	.uleb128 0x4d
-	.uleb128 0x4a
 	.string	"lpa"
 	.byte	0x2
 	.2byte	0x3b7
 	.4byte	0xdd4
-	.uleb128 0x4a
+	.uleb128 0x4d
 	.string	"ppa"
 	.byte	0x2
 	.2byte	0x3b8
 	.4byte	0xdd4
-	.uleb128 0x49
-	.4byte	.LASF724
+	.uleb128 0x4c
+	.4byte	.LASF725
 	.byte	0x2
 	.2byte	0x3b9
 	.4byte	0xdd4
-	.uleb128 0x49
-	.4byte	.LASF667
+	.uleb128 0x4c
+	.4byte	.LASF668
 	.byte	0x2
 	.2byte	0x3ba
 	.4byte	0xdf5
-	.uleb128 0x49
-	.4byte	.LASF596
+	.uleb128 0x4c
+	.4byte	.LASF599
 	.byte	0x2
 	.2byte	0x3bb
-	.4byte	0x2d84
+	.4byte	0x2dff
 	.byte	0
 	.byte	0
-	.uleb128 0x5d
-	.4byte	.LASF725
+	.uleb128 0x5f
+	.4byte	.LASF726
 	.byte	0x2
 	.2byte	0x380
 	.8byte	.LFB267
 	.8byte	.LFE267-.LFB267
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x58c9
-	.uleb128 0x50
-	.4byte	.LASF703
+	.4byte	0x5944
+	.uleb128 0x53
+	.4byte	.LASF704
 	.byte	0x2
 	.2byte	0x380
-	.4byte	0x517a
-	.4byte	.LLST252
-	.uleb128 0x51
+	.4byte	0x51f5
+	.4byte	.LLST254
+	.uleb128 0x54
 	.string	"ppa"
 	.byte	0x2
 	.2byte	0x382
 	.4byte	0xdd4
-	.4byte	.LLST253
-	.uleb128 0x52
+	.4byte	.LLST255
+	.uleb128 0x55
 	.4byte	.LASF317
 	.byte	0x2
 	.2byte	0x383
 	.4byte	0xdc9
-	.4byte	.LLST254
-	.uleb128 0x52
-	.4byte	.LASF706
+	.4byte	.LLST256
+	.uleb128 0x55
+	.4byte	.LASF707
 	.byte	0x2
 	.2byte	0x384
 	.4byte	0x1001
-	.4byte	.LLST255
+	.4byte	.LLST257
 	.uleb128 0x34
-	.8byte	.LVL978
+	.8byte	.LVL980
 	.4byte	0x29a4
-	.4byte	0x589b
+	.4byte	0x5916
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33007,9 +33075,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x44
-	.8byte	.LVL980
-	.4byte	0x5e2b
-	.4byte	0x58b4
+	.8byte	.LVL982
+	.4byte	0x5ea6
+	.4byte	0x592f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33019,7 +33087,7 @@ __func__.7630:
 	.byte	0x50
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL982
+	.8byte	.LVL984
 	.4byte	0x259f
 	.uleb128 0x30
 	.uleb128 0x1
@@ -33029,25 +33097,25 @@ __func__.7630:
 	.byte	0xff
 	.byte	0
 	.byte	0
-	.uleb128 0x60
-	.4byte	.LASF726
+	.uleb128 0x62
+	.4byte	.LASF727
 	.byte	0x2
 	.2byte	0x371
 	.byte	0x1
-	.4byte	0x58ed
-	.uleb128 0x48
+	.4byte	0x5968
+	.uleb128 0x4b
 	.4byte	.LASF393
 	.byte	0x2
 	.2byte	0x371
 	.4byte	0xdd4
-	.uleb128 0x4a
+	.uleb128 0x4d
 	.string	"i"
 	.byte	0x2
 	.2byte	0x373
 	.4byte	0xdc9
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF727
+	.uleb128 0x49
+	.4byte	.LASF728
 	.byte	0x2
 	.2byte	0x35c
 	.4byte	0x5b
@@ -33055,23 +33123,23 @@ __func__.7630:
 	.8byte	.LFE265-.LFB265
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5955
-	.uleb128 0x50
-	.4byte	.LASF728
+	.4byte	0x59d0
+	.uleb128 0x53
+	.4byte	.LASF729
 	.byte	0x2
 	.2byte	0x35c
 	.4byte	0xdd4
-	.4byte	.LLST373
-	.uleb128 0x52
-	.4byte	.LASF729
+	.4byte	.LLST375
+	.uleb128 0x55
+	.4byte	.LASF730
 	.byte	0x2
 	.2byte	0x35e
 	.4byte	0xdd4
-	.4byte	.LLST374
+	.4byte	.LLST376
 	.uleb128 0x34
-	.8byte	.LVL1625
-	.4byte	0x5a7d
-	.4byte	0x5947
+	.8byte	.LVL1627
+	.4byte	0x5af8
+	.4byte	0x59c2
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33080,11 +33148,11 @@ __func__.7630:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1626
-	.4byte	0x4444
+	.8byte	.LVL1628
+	.4byte	0x44bf
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF730
+	.uleb128 0x49
+	.4byte	.LASF731
 	.byte	0x2
 	.2byte	0x336
 	.4byte	0xdd4
@@ -33092,50 +33160,50 @@ __func__.7630:
 	.8byte	.LFE264-.LFB264
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5a77
-	.uleb128 0x50
-	.4byte	.LASF731
+	.4byte	0x5af2
+	.uleb128 0x53
+	.4byte	.LASF732
 	.byte	0x2
 	.2byte	0x336
 	.4byte	0xdd4
-	.4byte	.LLST375
-	.uleb128 0x50
-	.4byte	.LASF732
+	.4byte	.LLST377
+	.uleb128 0x53
+	.4byte	.LASF733
 	.byte	0x2
 	.2byte	0x336
 	.4byte	0xdd4
-	.4byte	.LLST376
-	.uleb128 0x50
-	.4byte	.LASF733
+	.4byte	.LLST378
+	.uleb128 0x53
+	.4byte	.LASF734
 	.byte	0x2
 	.2byte	0x336
-	.4byte	0x5a77
-	.4byte	.LLST377
-	.uleb128 0x51
+	.4byte	0x5af2
+	.4byte	.LLST379
+	.uleb128 0x54
 	.string	"len"
 	.byte	0x2
 	.2byte	0x338
 	.4byte	0xdc9
-	.4byte	.LLST378
-	.uleb128 0x52
-	.4byte	.LASF734
+	.4byte	.LLST380
+	.uleb128 0x55
+	.4byte	.LASF735
 	.byte	0x2
 	.2byte	0x338
 	.4byte	0xdc9
-	.4byte	.LLST379
-	.uleb128 0x51
+	.4byte	.LLST381
+	.uleb128 0x54
 	.string	"ppn"
 	.byte	0x2
 	.2byte	0x339
 	.4byte	0xdd4
-	.4byte	.LLST380
-	.uleb128 0x52
-	.4byte	.LASF735
+	.4byte	.LLST382
+	.uleb128 0x55
+	.4byte	.LASF736
 	.byte	0x2
 	.2byte	0x33a
 	.4byte	0xdd4
-	.4byte	.LLST381
-	.uleb128 0x5e
+	.4byte	.LLST383
+	.uleb128 0x60
 	.string	"req"
 	.byte	0x2
 	.2byte	0x33b
@@ -33143,12 +33211,12 @@ __func__.7630:
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -96
-	.uleb128 0x52
-	.4byte	.LASF736
+	.uleb128 0x55
+	.4byte	.LASF737
 	.byte	0x2
 	.2byte	0x33c
 	.4byte	0xdd4
-	.4byte	.LLST382
+	.4byte	.LLST384
 	.uleb128 0x2a
 	.4byte	.LASF565
 	.byte	0x2
@@ -33158,9 +33226,9 @@ __func__.7630:
 	.byte	0x91
 	.sleb128 -64
 	.uleb128 0x34
-	.8byte	.LVL1645
+	.8byte	.LVL1647
 	.4byte	0x29a4
-	.4byte	0x5a39
+	.4byte	0x5ab4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33179,9 +33247,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1647
+	.8byte	.LVL1649
 	.4byte	0x2527
-	.4byte	0x5a57
+	.4byte	0x5ad2
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33196,7 +33264,7 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1654
+	.8byte	.LVL1656
 	.4byte	0x259f
 	.uleb128 0x30
 	.uleb128 0x1
@@ -33220,8 +33288,8 @@ __func__.7630:
 	.uleb128 0x8
 	.byte	0x8
 	.4byte	0xdbe
-	.uleb128 0x46
-	.4byte	.LASF737
+	.uleb128 0x49
+	.4byte	.LASF738
 	.byte	0x2
 	.2byte	0x311
 	.4byte	0xdd4
@@ -33229,50 +33297,50 @@ __func__.7630:
 	.8byte	.LFE263-.LFB263
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5bbb
-	.uleb128 0x50
-	.4byte	.LASF731
+	.4byte	0x5c36
+	.uleb128 0x53
+	.4byte	.LASF732
 	.byte	0x2
 	.2byte	0x311
 	.4byte	0xdd4
-	.4byte	.LLST365
-	.uleb128 0x50
-	.4byte	.LASF732
+	.4byte	.LLST367
+	.uleb128 0x53
+	.4byte	.LASF733
 	.byte	0x2
 	.2byte	0x311
 	.4byte	0xdd4
-	.4byte	.LLST366
-	.uleb128 0x50
-	.4byte	.LASF733
+	.4byte	.LLST368
+	.uleb128 0x53
+	.4byte	.LASF734
 	.byte	0x2
 	.2byte	0x311
-	.4byte	0x5a77
-	.4byte	.LLST367
-	.uleb128 0x51
+	.4byte	0x5af2
+	.4byte	.LLST369
+	.uleb128 0x54
 	.string	"len"
 	.byte	0x2
 	.2byte	0x313
 	.4byte	0xdc9
-	.4byte	.LLST368
-	.uleb128 0x52
-	.4byte	.LASF734
+	.4byte	.LLST370
+	.uleb128 0x55
+	.4byte	.LASF735
 	.byte	0x2
 	.2byte	0x313
 	.4byte	0xdc9
-	.4byte	.LLST369
-	.uleb128 0x51
+	.4byte	.LLST371
+	.uleb128 0x54
 	.string	"ppn"
 	.byte	0x2
 	.2byte	0x314
 	.4byte	0xdd4
-	.4byte	.LLST370
-	.uleb128 0x52
-	.4byte	.LASF735
+	.4byte	.LLST372
+	.uleb128 0x55
+	.4byte	.LASF736
 	.byte	0x2
 	.2byte	0x315
 	.4byte	0xdd4
-	.4byte	.LLST371
-	.uleb128 0x5e
+	.4byte	.LLST373
+	.uleb128 0x60
 	.string	"req"
 	.byte	0x2
 	.2byte	0x316
@@ -33280,12 +33348,12 @@ __func__.7630:
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -96
-	.uleb128 0x52
-	.4byte	.LASF736
+	.uleb128 0x55
+	.4byte	.LASF737
 	.byte	0x2
 	.2byte	0x317
 	.4byte	0xdd4
-	.4byte	.LLST372
+	.4byte	.LLST374
 	.uleb128 0x2a
 	.4byte	.LASF565
 	.byte	0x2
@@ -33295,9 +33363,9 @@ __func__.7630:
 	.byte	0x91
 	.sleb128 -64
 	.uleb128 0x34
-	.8byte	.LVL1606
+	.8byte	.LVL1608
 	.4byte	0x29a4
-	.4byte	0x5b61
+	.4byte	0x5bdc
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33316,9 +33384,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1608
+	.8byte	.LVL1610
 	.4byte	0x2527
-	.4byte	0x5b82
+	.4byte	0x5bfd
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -33335,9 +33403,9 @@ __func__.7630:
 	.byte	0x4
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1612
-	.4byte	0x5e2b
-	.4byte	0x5ba7
+	.8byte	.LVL1614
+	.4byte	0x5ea6
+	.4byte	0x5c22
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33352,7 +33420,7 @@ __func__.7630:
 	.sleb128 -1
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1617
+	.8byte	.LVL1619
 	.4byte	0x259f
 	.uleb128 0x30
 	.uleb128 0x1
@@ -33361,8 +33429,8 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF738
+	.uleb128 0x49
+	.4byte	.LASF739
 	.byte	0x2
 	.2byte	0x2f0
 	.4byte	0x5b
@@ -33370,58 +33438,58 @@ __func__.7630:
 	.8byte	.LFE262-.LFB262
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5cd3
-	.uleb128 0x5a
+	.4byte	0x5d4e
+	.uleb128 0x5d
 	.string	"lpn"
 	.byte	0x2
 	.2byte	0x2f0
 	.4byte	0xdd4
-	.4byte	.LLST237
-	.uleb128 0x5a
+	.4byte	.LLST239
+	.uleb128 0x5d
 	.string	"ppn"
 	.byte	0x2
 	.2byte	0x2f0
 	.4byte	0x1001
-	.4byte	.LLST238
-	.uleb128 0x50
-	.4byte	.LASF739
+	.4byte	.LLST240
+	.uleb128 0x53
+	.4byte	.LASF740
 	.byte	0x2
 	.2byte	0x2f0
 	.4byte	0x5b
-	.4byte	.LLST239
-	.uleb128 0x52
-	.4byte	.LASF740
+	.4byte	.LLST241
+	.uleb128 0x55
+	.4byte	.LASF741
 	.byte	0x2
 	.2byte	0x2f2
 	.4byte	0xdc9
-	.4byte	.LLST240
-	.uleb128 0x52
-	.4byte	.LASF741
+	.4byte	.LLST242
+	.uleb128 0x55
+	.4byte	.LASF742
 	.byte	0x2
 	.2byte	0x2f2
 	.4byte	0xdc9
-	.4byte	.LLST241
-	.uleb128 0x52
-	.4byte	.LASF742
+	.4byte	.LLST243
+	.uleb128 0x55
+	.4byte	.LASF743
 	.byte	0x2
 	.2byte	0x2f2
 	.4byte	0xdc9
-	.4byte	.LLST242
+	.4byte	.LLST244
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x5ce3
+	.4byte	0x5d5e
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6676
-	.uleb128 0x56
-	.4byte	.LASF743
+	.8byte	__func__.6675
+	.uleb128 0x59
+	.4byte	.LASF744
 	.byte	0x2
 	.2byte	0x2fb
-	.8byte	.L656
+	.8byte	.L657
 	.uleb128 0x34
-	.8byte	.LVL920
-	.4byte	0xa8ce
-	.4byte	0x5c93
+	.8byte	.LVL922
+	.4byte	0xa949
+	.4byte	0x5d0e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33442,12 +33510,12 @@ __func__.7630:
 	.2byte	0x2f7
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL923
-	.4byte	0x5d3a
-	.uleb128 0x34
 	.8byte	.LVL925
-	.4byte	0x5dcd
-	.4byte	0x5cb8
+	.4byte	0x5db5
+	.uleb128 0x34
+	.8byte	.LVL927
+	.4byte	0x5e48
+	.4byte	0x5d33
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33456,8 +33524,8 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL926
-	.4byte	0x63c2
+	.8byte	.LVL928
+	.4byte	0x643d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33474,15 +33542,15 @@ __func__.7630:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x5ce3
+	.4byte	0x5d5e
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x8
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x5cd3
-	.uleb128 0x46
-	.4byte	.LASF744
+	.4byte	0x5d4e
+	.uleb128 0x49
+	.4byte	.LASF745
 	.byte	0x2
 	.2byte	0x2e3
 	.4byte	0x5b
@@ -33490,19 +33558,19 @@ __func__.7630:
 	.8byte	.LFE261-.LFB261
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5d3a
-	.uleb128 0x51
+	.4byte	0x5db5
+	.uleb128 0x54
 	.string	"i"
 	.byte	0x2
 	.2byte	0x2e5
 	.4byte	0xdc9
-	.4byte	.LLST328
+	.4byte	.LLST330
 	.uleb128 0x45
-	.8byte	.LVL1361
-	.4byte	0x57c8
+	.8byte	.LVL1363
+	.4byte	0x5843
 	.uleb128 0x36
-	.8byte	.LVL1364
-	.4byte	0x5dcd
+	.8byte	.LVL1366
+	.4byte	0x5e48
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33511,8 +33579,8 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF745
+	.uleb128 0x49
+	.4byte	.LASF746
 	.byte	0x2
 	.2byte	0x2bb
 	.4byte	0xdc9
@@ -33520,34 +33588,34 @@ __func__.7630:
 	.8byte	.LFE260-.LFB260
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5dcd
-	.uleb128 0x51
+	.4byte	0x5e48
+	.uleb128 0x54
 	.string	"i"
 	.byte	0x2
 	.2byte	0x2bd
 	.4byte	0xdc9
 	.4byte	.LLST83
-	.uleb128 0x52
-	.4byte	.LASF746
+	.uleb128 0x55
+	.4byte	.LASF747
 	.byte	0x2
 	.2byte	0x2be
 	.4byte	0xdc9
 	.4byte	.LLST84
-	.uleb128 0x52
-	.4byte	.LASF747
+	.uleb128 0x55
+	.4byte	.LASF748
 	.byte	0x2
 	.2byte	0x2bf
 	.4byte	0xdd4
 	.4byte	.LLST85
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x4d22
+	.4byte	0x4d9d
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6659
+	.8byte	__func__.6658
 	.uleb128 0x36
 	.8byte	.LVL237
-	.4byte	0xa8ce
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33568,8 +33636,8 @@ __func__.7630:
 	.2byte	0x2df
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF748
+	.uleb128 0x49
+	.4byte	.LASF749
 	.byte	0x2
 	.2byte	0x2b1
 	.4byte	0x5b
@@ -33577,22 +33645,22 @@ __func__.7630:
 	.8byte	.LFE259-.LFB259
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5e2b
-	.uleb128 0x50
-	.4byte	.LASF740
+	.4byte	0x5ea6
+	.uleb128 0x53
+	.4byte	.LASF741
 	.byte	0x2
 	.2byte	0x2b1
 	.4byte	0xdc9
-	.4byte	.LLST235
-	.uleb128 0x52
+	.4byte	.LLST237
+	.uleb128 0x55
 	.4byte	.LASF317
 	.byte	0x2
 	.2byte	0x2b3
 	.4byte	0xdd4
-	.4byte	.LLST236
+	.4byte	.LLST238
 	.uleb128 0x36
-	.8byte	.LVL913
-	.4byte	0x5e2b
+	.8byte	.LVL915
+	.4byte	0x5ea6
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33601,8 +33669,8 @@ __func__.7630:
 	.8byte	.LANCHOR144
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF749
+	.uleb128 0x49
+	.4byte	.LASF750
 	.byte	0x2
 	.2byte	0x276
 	.4byte	0x5b
@@ -33610,57 +33678,57 @@ __func__.7630:
 	.8byte	.LFE258-.LFB258
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5fbc
-	.uleb128 0x50
-	.4byte	.LASF703
+	.4byte	0x6037
+	.uleb128 0x53
+	.4byte	.LASF704
 	.byte	0x2
 	.2byte	0x276
-	.4byte	0x517a
-	.4byte	.LLST222
-	.uleb128 0x50
+	.4byte	0x51f5
+	.4byte	.LLST224
+	.uleb128 0x53
 	.4byte	.LASF317
 	.byte	0x2
 	.2byte	0x276
 	.4byte	0xdd4
-	.4byte	.LLST223
-	.uleb128 0x50
-	.4byte	.LASF733
+	.4byte	.LLST225
+	.uleb128 0x53
+	.4byte	.LASF734
 	.byte	0x2
 	.2byte	0x276
 	.4byte	0x1001
-	.4byte	.LLST224
-	.uleb128 0x52
+	.4byte	.LLST226
+	.uleb128 0x55
 	.4byte	.LASF388
 	.byte	0x2
 	.2byte	0x278
 	.4byte	0xdd4
-	.4byte	.LLST225
-	.uleb128 0x52
-	.4byte	.LASF708
+	.4byte	.LLST227
+	.uleb128 0x55
+	.4byte	.LASF709
 	.byte	0x2
 	.2byte	0x279
-	.4byte	0x5180
-	.4byte	.LLST226
-	.uleb128 0x52
-	.4byte	.LASF721
+	.4byte	0x51fb
+	.4byte	.LLST228
+	.uleb128 0x55
+	.4byte	.LASF722
 	.byte	0x2
 	.2byte	0x27a
 	.4byte	0xdc9
-	.4byte	.LLST227
-	.uleb128 0x4b
-	.4byte	.LASF750
+	.4byte	.LLST229
+	.uleb128 0x4e
+	.4byte	.LASF751
 	.byte	0x2
 	.2byte	0x27c
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x3784
+	.4byte	0x37ff
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6634
+	.8byte	__func__.6633
 	.uleb128 0x34
-	.8byte	.LVL871
-	.4byte	0x5fbc
-	.4byte	0x5ee0
+	.8byte	.LVL873
+	.4byte	0x6037
+	.4byte	0x5f5b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33669,9 +33737,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL872
-	.4byte	0xa8ce
-	.4byte	0x5f0c
+	.8byte	.LVL874
+	.4byte	0xa949
+	.4byte	0x5f87
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33692,9 +33760,9 @@ __func__.7630:
 	.2byte	0x28a
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL873
-	.4byte	0xa8ce
-	.4byte	0x5f38
+	.8byte	.LVL875
+	.4byte	0xa949
+	.4byte	0x5fb3
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33715,9 +33783,9 @@ __func__.7630:
 	.2byte	0x28b
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL875
+	.8byte	.LVL877
 	.4byte	0x259f
-	.4byte	0x5f54
+	.4byte	0x5fcf
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -33730,9 +33798,9 @@ __func__.7630:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL878
+	.8byte	.LVL880
 	.4byte	0x27e7
-	.4byte	0x5f7b
+	.4byte	0x5ff6
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33756,9 +33824,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL880
-	.4byte	0xa8ce
-	.4byte	0x5f9a
+	.8byte	.LVL882
+	.4byte	0xa949
+	.4byte	0x6015
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33767,8 +33835,8 @@ __func__.7630:
 	.8byte	.LC86
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL881
-	.4byte	0xa8ce
+	.8byte	.LVL883
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33783,8 +33851,8 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF751
+	.uleb128 0x49
+	.4byte	.LASF752
 	.byte	0x2
 	.2byte	0x246
 	.4byte	0x5b
@@ -33792,58 +33860,58 @@ __func__.7630:
 	.8byte	.LFE257-.LFB257
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x60f8
-	.uleb128 0x50
-	.4byte	.LASF703
+	.4byte	0x6173
+	.uleb128 0x53
+	.4byte	.LASF704
 	.byte	0x2
 	.2byte	0x246
-	.4byte	0x517a
-	.4byte	.LLST216
-	.uleb128 0x49
+	.4byte	0x51f5
+	.4byte	.LLST218
+	.uleb128 0x4c
 	.4byte	.LASF388
 	.byte	0x2
 	.2byte	0x248
 	.4byte	0xdc9
-	.uleb128 0x52
+	.uleb128 0x55
 	.4byte	.LASF330
 	.byte	0x2
 	.2byte	0x248
 	.4byte	0xdc9
-	.4byte	.LLST217
-	.uleb128 0x52
-	.4byte	.LASF752
+	.4byte	.LLST219
+	.uleb128 0x55
+	.4byte	.LASF753
 	.byte	0x2
 	.2byte	0x249
 	.4byte	0xdc9
-	.4byte	.LLST218
-	.uleb128 0x52
-	.4byte	.LASF753
+	.4byte	.LLST220
+	.uleb128 0x55
+	.4byte	.LASF754
 	.byte	0x2
 	.2byte	0x24a
 	.4byte	0x10f8
-	.4byte	.LLST219
-	.uleb128 0x52
-	.4byte	.LASF706
+	.4byte	.LLST221
+	.uleb128 0x55
+	.4byte	.LASF707
 	.byte	0x2
 	.2byte	0x24b
 	.4byte	0x1001
-	.4byte	.LLST220
-	.uleb128 0x52
-	.4byte	.LASF708
+	.4byte	.LLST222
+	.uleb128 0x55
+	.4byte	.LASF709
 	.byte	0x2
 	.2byte	0x24c
-	.4byte	0x5180
-	.4byte	.LLST221
+	.4byte	0x51fb
+	.4byte	.LLST223
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x6108
+	.4byte	0x6183
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6620
+	.8byte	__func__.6619
 	.uleb128 0x34
-	.8byte	.LVL850
-	.4byte	0xa8ce
-	.4byte	0x6090
+	.8byte	.LVL852
+	.4byte	0xa949
+	.4byte	0x610b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33864,12 +33932,12 @@ __func__.7630:
 	.2byte	0x250
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL851
-	.4byte	0x6905
+	.8byte	.LVL853
+	.4byte	0x6980
 	.uleb128 0x34
-	.8byte	.LVL858
+	.8byte	.LVL860
 	.4byte	0x259f
-	.4byte	0x60b5
+	.4byte	0x6130
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -33878,9 +33946,9 @@ __func__.7630:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL862
+	.8byte	.LVL864
 	.4byte	0x27e7
-	.4byte	0x60e3
+	.4byte	0x615e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33904,8 +33972,8 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL863
-	.4byte	0x610d
+	.8byte	.LVL865
+	.4byte	0x6188
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33916,15 +33984,15 @@ __func__.7630:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x6108
+	.4byte	0x6183
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x1e
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x60f8
-	.uleb128 0x46
-	.4byte	.LASF754
+	.4byte	0x6173
+	.uleb128 0x49
+	.4byte	.LASF755
 	.byte	0x2
 	.2byte	0x218
 	.4byte	0x5b
@@ -33932,59 +34000,59 @@ __func__.7630:
 	.8byte	.LFE256-.LFB256
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6287
-	.uleb128 0x50
-	.4byte	.LASF703
+	.4byte	0x6302
+	.uleb128 0x53
+	.4byte	.LASF704
 	.byte	0x2
 	.2byte	0x218
-	.4byte	0x517a
-	.4byte	.LLST228
-	.uleb128 0x52
-	.4byte	.LASF755
+	.4byte	0x51f5
+	.4byte	.LLST230
+	.uleb128 0x55
+	.4byte	.LASF756
 	.byte	0x2
 	.2byte	0x21a
 	.4byte	0xdc9
-	.4byte	.LLST229
-	.uleb128 0x52
-	.4byte	.LASF756
+	.4byte	.LLST231
+	.uleb128 0x55
+	.4byte	.LASF757
 	.byte	0x2
 	.2byte	0x21b
 	.4byte	0xdc9
-	.4byte	.LLST230
-	.uleb128 0x52
+	.4byte	.LLST232
+	.uleb128 0x55
 	.4byte	.LASF330
 	.byte	0x2
 	.2byte	0x21c
 	.4byte	0xdc9
-	.4byte	.LLST231
-	.uleb128 0x52
-	.4byte	.LASF753
+	.4byte	.LLST233
+	.uleb128 0x55
+	.4byte	.LASF754
 	.byte	0x2
 	.2byte	0x21d
 	.4byte	0x10f8
-	.4byte	.LLST232
-	.uleb128 0x52
-	.4byte	.LASF706
+	.4byte	.LLST234
+	.uleb128 0x55
+	.4byte	.LASF707
 	.byte	0x2
 	.2byte	0x21e
 	.4byte	0x1001
-	.4byte	.LLST233
-	.uleb128 0x52
-	.4byte	.LASF708
+	.4byte	.LLST235
+	.uleb128 0x55
+	.4byte	.LASF709
 	.byte	0x2
 	.2byte	0x21f
-	.4byte	0x5180
-	.4byte	.LLST234
+	.4byte	0x51fb
+	.4byte	.LLST236
 	.uleb128 0x3f
 	.4byte	.LASF574
 	.4byte	0x299f
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6606
+	.8byte	__func__.6605
 	.uleb128 0x34
-	.8byte	.LVL890
-	.4byte	0x62df
-	.4byte	0x61ca
+	.8byte	.LVL892
+	.4byte	0x635a
+	.4byte	0x6245
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33993,9 +34061,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL893
-	.4byte	0x6287
-	.4byte	0x61e2
+	.8byte	.LVL895
+	.4byte	0x6302
+	.4byte	0x625d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34004,9 +34072,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL895
-	.4byte	0x6a7f
-	.4byte	0x61ff
+	.8byte	.LVL897
+	.4byte	0x6afa
+	.4byte	0x627a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34020,9 +34088,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL897
-	.4byte	0x6287
-	.4byte	0x6217
+	.8byte	.LVL899
+	.4byte	0x6302
+	.4byte	0x6292
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34031,9 +34099,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL902
+	.8byte	.LVL904
 	.4byte	0x29a4
-	.4byte	0x6240
+	.4byte	0x62bb
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34052,9 +34120,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL903
-	.4byte	0xa8ce
-	.4byte	0x626c
+	.8byte	.LVL905
+	.4byte	0xa949
+	.4byte	0x62e7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34075,8 +34143,8 @@ __func__.7630:
 	.2byte	0x234
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL908
-	.4byte	0x5e2b
+	.8byte	.LVL910
+	.4byte	0x5ea6
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34091,44 +34159,44 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x47
-	.4byte	.LASF757
+	.uleb128 0x4a
+	.4byte	.LASF758
 	.byte	0x2
 	.2byte	0x203
 	.4byte	0x5b
 	.byte	0x1
-	.4byte	0x62ca
-	.uleb128 0x48
-	.4byte	.LASF703
+	.4byte	0x6345
+	.uleb128 0x4b
+	.4byte	.LASF704
 	.byte	0x2
 	.2byte	0x203
-	.4byte	0x517a
-	.uleb128 0x49
-	.4byte	.LASF758
+	.4byte	0x51f5
+	.uleb128 0x4c
+	.4byte	.LASF759
 	.byte	0x2
 	.2byte	0x205
 	.4byte	0xdc9
-	.uleb128 0x49
-	.4byte	.LASF753
+	.uleb128 0x4c
+	.4byte	.LASF754
 	.byte	0x2
 	.2byte	0x206
 	.4byte	0x10f8
-	.uleb128 0x4c
+	.uleb128 0x4f
 	.4byte	.LASF574
-	.4byte	0x62da
-	.4byte	.LASF757
+	.4byte	0x6355
+	.4byte	.LASF758
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x62da
+	.4byte	0x6355
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x19
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x62ca
-	.uleb128 0x46
-	.4byte	.LASF759
+	.4byte	0x6345
+	.uleb128 0x49
+	.4byte	.LASF760
 	.byte	0x2
 	.2byte	0x1db
 	.4byte	0x5b
@@ -34136,65 +34204,65 @@ __func__.7630:
 	.8byte	.LFE254-.LFB254
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x63c2
-	.uleb128 0x50
-	.4byte	.LASF703
+	.4byte	0x643d
+	.uleb128 0x53
+	.4byte	.LASF704
 	.byte	0x2
 	.2byte	0x1db
-	.4byte	0x517a
-	.4byte	.LLST207
-	.uleb128 0x52
-	.4byte	.LASF753
+	.4byte	0x51f5
+	.4byte	.LLST209
+	.uleb128 0x55
+	.4byte	.LASF754
 	.byte	0x2
 	.2byte	0x1dd
 	.4byte	0x10f8
-	.4byte	.LLST208
-	.uleb128 0x52
-	.4byte	.LASF706
+	.4byte	.LLST210
+	.uleb128 0x55
+	.4byte	.LASF707
 	.byte	0x2
 	.2byte	0x1de
 	.4byte	0x1001
-	.4byte	.LLST209
-	.uleb128 0x52
-	.4byte	.LASF760
+	.4byte	.LLST211
+	.uleb128 0x55
+	.4byte	.LASF761
 	.byte	0x2
 	.2byte	0x1df
 	.4byte	0x10f8
-	.4byte	.LLST210
-	.uleb128 0x52
+	.4byte	.LLST212
+	.uleb128 0x55
 	.4byte	.LASF388
 	.byte	0x2
 	.2byte	0x1e0
 	.4byte	0xdc9
-	.4byte	.LLST211
-	.uleb128 0x52
+	.4byte	.LLST213
+	.uleb128 0x55
 	.4byte	.LASF330
 	.byte	0x2
 	.2byte	0x1e0
 	.4byte	0xdc9
-	.4byte	.LLST212
-	.uleb128 0x52
-	.4byte	.LASF758
+	.4byte	.LLST214
+	.uleb128 0x55
+	.4byte	.LASF759
 	.byte	0x2
 	.2byte	0x1e1
 	.4byte	0xdc9
-	.4byte	.LLST213
-	.uleb128 0x52
-	.4byte	.LASF761
+	.4byte	.LLST215
+	.uleb128 0x55
+	.4byte	.LASF762
 	.byte	0x2
 	.2byte	0x1e2
 	.4byte	0xdc9
-	.4byte	.LLST214
-	.uleb128 0x52
-	.4byte	.LASF756
+	.4byte	.LLST216
+	.uleb128 0x55
+	.4byte	.LASF757
 	.byte	0x2
 	.2byte	0x1e3
 	.4byte	0xdc9
-	.4byte	.LLST215
+	.4byte	.LLST217
 	.uleb128 0x34
-	.8byte	.LVL827
+	.8byte	.LVL829
 	.4byte	0x259f
-	.4byte	0x63ae
+	.4byte	0x6429
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34208,8 +34276,8 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL844
-	.4byte	0x6a7f
+	.8byte	.LVL846
+	.4byte	0x6afa
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -34217,8 +34285,8 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF762
+	.uleb128 0x49
+	.4byte	.LASF763
 	.byte	0x2
 	.2byte	0x1b9
 	.4byte	0x5b
@@ -34226,42 +34294,42 @@ __func__.7630:
 	.8byte	.LFE253-.LFB253
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x654a
-	.uleb128 0x50
+	.4byte	0x65c5
+	.uleb128 0x53
 	.4byte	.LASF317
 	.byte	0x2
 	.2byte	0x1b9
 	.4byte	0xdc9
-	.4byte	.LLST204
-	.uleb128 0x50
-	.4byte	.LASF740
+	.4byte	.LLST206
+	.uleb128 0x53
+	.4byte	.LASF741
 	.byte	0x2
 	.2byte	0x1b9
 	.4byte	0xdc9
-	.4byte	.LLST205
+	.4byte	.LLST207
 	.uleb128 0x2a
-	.4byte	.LASF708
+	.4byte	.LASF709
 	.byte	0x2
 	.2byte	0x1bb
-	.4byte	0x5180
+	.4byte	0x51fb
 	.uleb128 0x1
 	.byte	0x69
-	.uleb128 0x52
-	.4byte	.LASF763
+	.uleb128 0x55
+	.4byte	.LASF764
 	.byte	0x2
 	.2byte	0x1bc
 	.4byte	0xdd4
-	.4byte	.LLST206
+	.4byte	.LLST208
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x3784
+	.4byte	0x37ff
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6563
+	.8byte	__func__.6562
 	.uleb128 0x34
-	.8byte	.LVL811
-	.4byte	0xa8ce
-	.4byte	0x6468
+	.8byte	.LVL813
+	.4byte	0xa949
+	.4byte	0x64e3
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34282,9 +34350,9 @@ __func__.7630:
 	.2byte	0x1be
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL814
+	.8byte	.LVL816
 	.4byte	0x259f
-	.4byte	0x6480
+	.4byte	0x64fb
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -34293,9 +34361,9 @@ __func__.7630:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL818
+	.8byte	.LVL820
 	.4byte	0x29a4
-	.4byte	0x64a2
+	.4byte	0x651d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34314,9 +34382,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL820
-	.4byte	0xa8ce
-	.4byte	0x64cd
+	.8byte	.LVL822
+	.4byte	0xa949
+	.4byte	0x6548
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34337,9 +34405,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL821
+	.8byte	.LVL823
 	.4byte	0x2b1c
-	.4byte	0x64f6
+	.4byte	0x6571
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34358,9 +34426,9 @@ __func__.7630:
 	.byte	0x34
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL822
+	.8byte	.LVL824
 	.4byte	0x2b1c
-	.4byte	0x651a
+	.4byte	0x6595
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34374,8 +34442,8 @@ __func__.7630:
 	.byte	0x34
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL823
-	.4byte	0xa8ce
+	.8byte	.LVL825
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34396,60 +34464,60 @@ __func__.7630:
 	.2byte	0x1d3
 	.byte	0
 	.byte	0
-	.uleb128 0x47
-	.4byte	.LASF764
+	.uleb128 0x4a
+	.4byte	.LASF765
 	.byte	0x2
 	.2byte	0x193
 	.4byte	0x5b
 	.byte	0x1
-	.4byte	0x65c9
-	.uleb128 0x48
-	.4byte	.LASF649
+	.4byte	0x6644
+	.uleb128 0x4b
+	.4byte	.LASF650
 	.byte	0x2
 	.2byte	0x193
 	.4byte	0xdc9
-	.uleb128 0x49
-	.4byte	.LASF765
+	.uleb128 0x4c
+	.4byte	.LASF766
 	.byte	0x2
 	.2byte	0x195
 	.4byte	0xdc9
-	.uleb128 0x49
-	.4byte	.LASF766
+	.uleb128 0x4c
+	.4byte	.LASF767
 	.byte	0x2
 	.2byte	0x196
 	.4byte	0xdc9
-	.uleb128 0x49
-	.4byte	.LASF767
+	.uleb128 0x4c
+	.4byte	.LASF768
 	.byte	0x2
 	.2byte	0x197
 	.4byte	0xdd4
-	.uleb128 0x49
-	.4byte	.LASF768
+	.uleb128 0x4c
+	.4byte	.LASF769
 	.byte	0x2
 	.2byte	0x199
 	.4byte	0xdc9
-	.uleb128 0x49
-	.4byte	.LASF769
+	.uleb128 0x4c
+	.4byte	.LASF770
 	.byte	0x2
 	.2byte	0x19a
 	.4byte	0xdd4
-	.uleb128 0x49
-	.4byte	.LASF652
+	.uleb128 0x4c
+	.4byte	.LASF653
 	.byte	0x2
 	.2byte	0x19b
 	.4byte	0x1e2c
-	.uleb128 0x49
-	.4byte	.LASF770
+	.uleb128 0x4c
+	.4byte	.LASF771
 	.byte	0x2
 	.2byte	0x19b
 	.4byte	0x1e2c
-	.uleb128 0x4c
+	.uleb128 0x4f
 	.4byte	.LASF574
-	.4byte	0x4d22
-	.4byte	.LASF764
+	.4byte	0x4d9d
+	.4byte	.LASF765
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF771
+	.uleb128 0x49
+	.4byte	.LASF772
 	.byte	0x2
 	.2byte	0x17f
 	.4byte	0x5b
@@ -34457,28 +34525,28 @@ __func__.7630:
 	.8byte	.LFE251-.LFB251
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x661c
-	.uleb128 0x50
+	.4byte	0x6697
+	.uleb128 0x53
 	.4byte	.LASF236
 	.byte	0x2
 	.2byte	0x17f
 	.4byte	0xdc9
 	.4byte	.LLST67
-	.uleb128 0x52
-	.4byte	.LASF649
+	.uleb128 0x55
+	.4byte	.LASF650
 	.byte	0x2
 	.2byte	0x181
 	.4byte	0xdc9
 	.4byte	.LLST68
-	.uleb128 0x52
-	.4byte	.LASF652
+	.uleb128 0x55
+	.4byte	.LASF653
 	.byte	0x2
 	.2byte	0x182
 	.4byte	0x1e2c
 	.4byte	.LLST69
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF772
+	.uleb128 0x49
+	.4byte	.LASF773
 	.byte	0x2
 	.2byte	0x17a
 	.4byte	0x5b
@@ -34486,16 +34554,16 @@ __func__.7630:
 	.8byte	.LFE250-.LFB250
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6669
-	.uleb128 0x50
-	.4byte	.LASF773
+	.4byte	0x66e4
+	.uleb128 0x53
+	.4byte	.LASF774
 	.byte	0x2
 	.2byte	0x17a
-	.4byte	0x6669
+	.4byte	0x66e4
 	.4byte	.LLST66
 	.uleb128 0x2f
 	.8byte	.LVL187
-	.4byte	0x666f
+	.4byte	0x66ea
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34513,8 +34581,8 @@ __func__.7630:
 	.uleb128 0x8
 	.byte	0x8
 	.4byte	0x1e2c
-	.uleb128 0x46
-	.4byte	.LASF774
+	.uleb128 0x49
+	.4byte	.LASF775
 	.byte	0x2
 	.2byte	0x167
 	.4byte	0x5b
@@ -34522,34 +34590,34 @@ __func__.7630:
 	.8byte	.LFE249-.LFB249
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x66e6
-	.uleb128 0x50
-	.4byte	.LASF773
+	.4byte	0x6761
+	.uleb128 0x53
+	.4byte	.LASF774
 	.byte	0x2
 	.2byte	0x167
-	.4byte	0x6669
+	.4byte	0x66e4
 	.4byte	.LLST62
-	.uleb128 0x50
+	.uleb128 0x53
 	.4byte	.LASF236
 	.byte	0x2
 	.2byte	0x167
 	.4byte	0xdc9
 	.4byte	.LLST63
-	.uleb128 0x52
-	.4byte	.LASF649
+	.uleb128 0x55
+	.4byte	.LASF650
 	.byte	0x2
 	.2byte	0x169
 	.4byte	0xdc9
 	.4byte	.LLST64
-	.uleb128 0x52
-	.4byte	.LASF652
+	.uleb128 0x55
+	.4byte	.LASF653
 	.byte	0x2
 	.2byte	0x16a
 	.4byte	0x1e2c
 	.4byte	.LLST65
 	.uleb128 0x36
 	.8byte	.LVL178
-	.4byte	0x66e6
+	.4byte	0x6761
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -34558,8 +34626,8 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF775
+	.uleb128 0x49
+	.4byte	.LASF776
 	.byte	0x2
 	.2byte	0x14c
 	.4byte	0x5b
@@ -34567,40 +34635,40 @@ __func__.7630:
 	.8byte	.LFE248-.LFB248
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x678b
-	.uleb128 0x50
-	.4byte	.LASF773
+	.4byte	0x6806
+	.uleb128 0x53
+	.4byte	.LASF774
 	.byte	0x2
 	.2byte	0x14c
-	.4byte	0x6669
+	.4byte	0x66e4
 	.4byte	.LLST58
-	.uleb128 0x50
-	.4byte	.LASF649
+	.uleb128 0x53
+	.4byte	.LASF650
 	.byte	0x2
 	.2byte	0x14c
 	.4byte	0xdc9
 	.4byte	.LLST59
-	.uleb128 0x52
-	.4byte	.LASF652
+	.uleb128 0x55
+	.4byte	.LASF653
 	.byte	0x2
 	.2byte	0x14e
 	.4byte	0x1e2c
 	.4byte	.LLST60
-	.uleb128 0x52
-	.4byte	.LASF776
+	.uleb128 0x55
+	.4byte	.LASF777
 	.byte	0x2
 	.2byte	0x14e
 	.4byte	0x1e2c
 	.4byte	.LLST61
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x679b
+	.4byte	0x6816
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6522
+	.8byte	__func__.6521
 	.uleb128 0x36
 	.8byte	.LVL164
-	.4byte	0xa8ce
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34623,15 +34691,15 @@ __func__.7630:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x679b
+	.4byte	0x6816
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x10
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x678b
-	.uleb128 0x46
-	.4byte	.LASF777
+	.4byte	0x6806
+	.uleb128 0x49
+	.4byte	.LASF778
 	.byte	0x2
 	.2byte	0x11b
 	.4byte	0x5b
@@ -34639,47 +34707,47 @@ __func__.7630:
 	.8byte	.LFE247-.LFB247
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6821
-	.uleb128 0x50
-	.4byte	.LASF649
+	.4byte	0x689c
+	.uleb128 0x53
+	.4byte	.LASF650
 	.byte	0x2
 	.2byte	0x11b
 	.4byte	0xdc9
 	.4byte	.LLST51
-	.uleb128 0x52
-	.4byte	.LASF652
+	.uleb128 0x55
+	.4byte	.LASF653
 	.byte	0x2
 	.2byte	0x11d
 	.4byte	0x1e2c
 	.4byte	.LLST52
-	.uleb128 0x52
-	.4byte	.LASF776
+	.uleb128 0x55
+	.4byte	.LASF777
 	.byte	0x2
 	.2byte	0x11d
 	.4byte	0x1e2c
 	.4byte	.LLST53
 	.uleb128 0x2a
-	.4byte	.LASF778
+	.4byte	.LASF779
 	.byte	0x2
 	.2byte	0x11e
 	.4byte	0xdc9
 	.uleb128 0x1
 	.byte	0x5d
-	.uleb128 0x52
-	.4byte	.LASF779
+	.uleb128 0x55
+	.4byte	.LASF780
 	.byte	0x2
 	.2byte	0x11f
 	.4byte	0xdc9
 	.4byte	.LLST54
-	.uleb128 0x52
-	.4byte	.LASF780
+	.uleb128 0x55
+	.4byte	.LASF781
 	.byte	0x2
 	.2byte	0x120
 	.4byte	0xdc9
 	.4byte	.LLST55
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF781
+	.4byte	.LASF782
 	.byte	0x2
 	.byte	0xd8
 	.4byte	0x5b
@@ -34687,90 +34755,90 @@ __func__.7630:
 	.8byte	.LFE246-.LFB246
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x68bb
+	.4byte	0x6936
 	.uleb128 0x2e
-	.4byte	.LASF649
+	.4byte	.LASF650
 	.byte	0x2
 	.byte	0xd8
 	.4byte	0xdc9
 	.4byte	.LLST41
 	.uleb128 0x32
-	.4byte	.LASF652
+	.4byte	.LASF653
 	.byte	0x2
 	.byte	0xda
 	.4byte	0x1e2c
 	.4byte	.LLST42
 	.uleb128 0x32
-	.4byte	.LASF776
+	.4byte	.LASF777
 	.byte	0x2
 	.byte	0xda
 	.4byte	0x1e2c
 	.4byte	.LLST43
 	.uleb128 0x32
-	.4byte	.LASF782
+	.4byte	.LASF783
 	.byte	0x2
 	.byte	0xdb
 	.4byte	0xdc9
 	.4byte	.LLST44
 	.uleb128 0x32
-	.4byte	.LASF783
+	.4byte	.LASF784
 	.byte	0x2
 	.byte	0xdc
 	.4byte	0xdc9
 	.4byte	.LLST45
 	.uleb128 0x32
-	.4byte	.LASF767
+	.4byte	.LASF768
 	.byte	0x2
 	.byte	0xdd
 	.4byte	0xdd4
 	.4byte	.LLST46
 	.uleb128 0x32
-	.4byte	.LASF784
+	.4byte	.LASF785
 	.byte	0x2
 	.byte	0xde
 	.4byte	0xdd4
 	.4byte	.LLST47
 	.uleb128 0x32
-	.4byte	.LASF780
+	.4byte	.LASF781
 	.byte	0x2
 	.byte	0xdf
 	.4byte	0xdc9
 	.4byte	.LLST48
 	.byte	0
-	.uleb128 0x63
-	.4byte	.LASF785
+	.uleb128 0x65
+	.4byte	.LASF786
 	.byte	0x2
 	.byte	0xb9
 	.byte	0x1
-	.4byte	0x68e0
+	.4byte	0x695b
 	.uleb128 0x38
-	.4byte	.LASF649
+	.4byte	.LASF650
 	.byte	0x2
 	.byte	0xb9
 	.4byte	0xdc9
-	.uleb128 0x4c
+	.uleb128 0x4f
 	.4byte	.LASF574
-	.4byte	0x679b
-	.4byte	.LASF785
-	.byte	0
-	.uleb128 0x63
+	.4byte	0x6816
 	.4byte	.LASF786
+	.byte	0
+	.uleb128 0x65
+	.4byte	.LASF787
 	.byte	0x2
 	.byte	0xb2
 	.byte	0x1
-	.4byte	0x6905
+	.4byte	0x6980
 	.uleb128 0x38
-	.4byte	.LASF649
+	.4byte	.LASF650
 	.byte	0x2
 	.byte	0xb2
 	.4byte	0xdc9
-	.uleb128 0x4c
+	.uleb128 0x4f
 	.4byte	.LASF574
-	.4byte	0x679b
-	.4byte	.LASF786
+	.4byte	0x6816
+	.4byte	.LASF787
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF787
+	.4byte	.LASF788
 	.byte	0x2
 	.byte	0xa4
 	.4byte	0xdc9
@@ -34778,28 +34846,28 @@ __func__.7630:
 	.8byte	.LFE243-.LFB243
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6970
+	.4byte	0x69eb
 	.uleb128 0x33
 	.string	"tmp"
 	.byte	0x2
 	.byte	0xa6
 	.4byte	0xdc9
 	.4byte	.LLST39
-	.uleb128 0x61
-	.8byte	.LBB174
-	.8byte	.LBE174-.LBB174
-	.4byte	0x6958
+	.uleb128 0x63
+	.8byte	.LBB176
+	.8byte	.LBE176-.LBB176
+	.4byte	0x69d3
 	.uleb128 0x33
 	.string	"Q"
 	.byte	0x2
 	.byte	0xa9
-	.4byte	0x6970
+	.4byte	0x69eb
 	.4byte	.LLST40
 	.byte	0
-	.uleb128 0x64
-	.4byte	0x6b52
-	.8byte	.LBB172
-	.8byte	.LBE172-.LBB172
+	.uleb128 0x66
+	.4byte	0x6bcd
+	.8byte	.LBB174
+	.8byte	.LBE174-.LBB174
 	.byte	0x2
 	.byte	0xa8
 	.byte	0
@@ -34807,7 +34875,7 @@ __func__.7630:
 	.byte	0x8
 	.4byte	0x15a4
 	.uleb128 0x2d
-	.4byte	.LASF788
+	.4byte	.LASF789
 	.byte	0x2
 	.byte	0x92
 	.4byte	0x5b
@@ -34815,7 +34883,7 @@ __func__.7630:
 	.8byte	.LFE242-.LFB242
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x69ea
+	.4byte	0x6a65
 	.uleb128 0x31
 	.string	"blk"
 	.byte	0x2
@@ -34838,27 +34906,27 @@ __func__.7630:
 	.string	"Q"
 	.byte	0x2
 	.byte	0x96
-	.4byte	0x6970
+	.4byte	0x69eb
 	.uleb128 0xa
 	.byte	0x3
 	.8byte	gSysFreeQueue
 	.byte	0x9f
-	.uleb128 0x65
-	.4byte	0x6b46
-	.8byte	.LBB168
+	.uleb128 0x67
+	.4byte	0x6bc1
+	.8byte	.LBB170
 	.4byte	.Ldebug_ranges0+0x30
 	.byte	0x2
 	.byte	0x98
 	.byte	0
 	.uleb128 0x43
-	.4byte	.LASF789
+	.4byte	.LASF790
 	.byte	0x2
 	.byte	0x73
 	.8byte	.LFB241
 	.8byte	.LFE241-.LFB241
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6a7f
+	.4byte	0x6afa
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x2
@@ -34878,19 +34946,19 @@ __func__.7630:
 	.4byte	0xdc9
 	.4byte	.LLST32
 	.uleb128 0x32
-	.4byte	.LASF599
+	.4byte	.LASF602
 	.byte	0x2
 	.byte	0x76
 	.4byte	0xdc9
 	.4byte	.LLST33
 	.uleb128 0x32
-	.4byte	.LASF790
+	.4byte	.LASF791
 	.byte	0x2
 	.byte	0x77
 	.4byte	0xdc9
 	.4byte	.LLST34
 	.uleb128 0x32
-	.4byte	.LASF791
+	.4byte	.LASF792
 	.byte	0x2
 	.byte	0x78
 	.4byte	0xdd4
@@ -34899,59 +34967,59 @@ __func__.7630:
 	.string	"Q"
 	.byte	0x2
 	.byte	0x79
-	.4byte	0x6970
+	.4byte	0x69eb
 	.uleb128 0xa
 	.byte	0x3
 	.8byte	gSysFreeQueue
 	.byte	0x9f
 	.uleb128 0x45
 	.8byte	.LVL79
-	.4byte	0x6cf6
+	.4byte	0x6d71
 	.byte	0
 	.uleb128 0x43
-	.4byte	.LASF792
+	.4byte	.LASF793
 	.byte	0x2
 	.byte	0x61
 	.8byte	.LFB240
 	.8byte	.LFE240-.LFB240
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6b46
+	.4byte	0x6bc1
 	.uleb128 0x31
 	.string	"blk"
 	.byte	0x2
 	.byte	0x61
 	.4byte	0xdc9
-	.4byte	.LLST182
+	.4byte	.LLST184
 	.uleb128 0x2e
-	.4byte	.LASF793
+	.4byte	.LASF794
 	.byte	0x2
 	.byte	0x61
 	.4byte	0xdc9
-	.4byte	.LLST183
-	.uleb128 0x61
-	.8byte	.LBB219
-	.8byte	.LBE219-.LBB219
-	.4byte	0x6b2e
+	.4byte	.LLST185
+	.uleb128 0x63
+	.8byte	.LBB223
+	.8byte	.LBE223-.LBB223
+	.4byte	0x6ba9
 	.uleb128 0x33
 	.string	"Q"
 	.byte	0x2
 	.byte	0x64
-	.4byte	0x6970
-	.4byte	.LLST184
-	.uleb128 0x66
-	.8byte	.LBB220
-	.8byte	.LBE220-.LBB220
+	.4byte	0x69eb
+	.4byte	.LLST186
+	.uleb128 0x68
+	.8byte	.LBB224
+	.8byte	.LBE224-.LBB224
 	.uleb128 0x32
-	.4byte	.LASF794
+	.4byte	.LASF795
 	.byte	0x2
 	.byte	0x66
 	.4byte	0xdc9
-	.4byte	.LLST185
+	.4byte	.LLST187
 	.uleb128 0x34
-	.8byte	.LVL679
-	.4byte	0x6cf6
-	.4byte	0x6b14
+	.8byte	.LVL681
+	.4byte	0x6d71
+	.4byte	0x6b8f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34960,7 +35028,7 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL682
+	.8byte	.LVL684
 	.4byte	0x2721
 	.uleb128 0x30
 	.uleb128 0x1
@@ -34975,27 +35043,27 @@ __func__.7630:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x64
-	.4byte	0x6b46
-	.8byte	.LBB217
-	.8byte	.LBE217-.LBB217
+	.uleb128 0x66
+	.4byte	0x6bc1
+	.8byte	.LBB221
+	.8byte	.LBE221-.LBB221
 	.byte	0x2
 	.byte	0x63
 	.byte	0
-	.uleb128 0x67
-	.4byte	.LASF795
+	.uleb128 0x69
+	.4byte	.LASF796
 	.byte	0x2
 	.byte	0x5c
 	.4byte	0xdc9
 	.byte	0x1
-	.uleb128 0x67
-	.4byte	.LASF796
+	.uleb128 0x69
+	.4byte	.LASF797
 	.byte	0x2
 	.byte	0x57
 	.4byte	0xdc9
 	.byte	0x1
 	.uleb128 0x2d
-	.4byte	.LASF797
+	.4byte	.LASF798
 	.byte	0x2
 	.byte	0x4b
 	.4byte	0xdc9
@@ -35003,24 +35071,24 @@ __func__.7630:
 	.8byte	.LFE237-.LFB237
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6bca
+	.4byte	0x6c45
 	.uleb128 0x31
 	.string	"max"
 	.byte	0x2
 	.byte	0x4b
 	.4byte	0xdc9
-	.4byte	.LLST203
+	.4byte	.LLST205
 	.uleb128 0x3d
 	.string	"Q"
 	.byte	0x2
 	.byte	0x4d
-	.4byte	0x6970
+	.4byte	0x69eb
 	.uleb128 0xa
 	.byte	0x3
 	.8byte	gSysFreeQueue
 	.byte	0x9f
 	.uleb128 0x36
-	.8byte	.LVL807
+	.8byte	.LVL809
 	.4byte	0x259f
 	.uleb128 0x30
 	.uleb128 0x1
@@ -35042,7 +35110,7 @@ __func__.7630:
 	.byte	0
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF798
+	.4byte	.LASF799
 	.byte	0x2
 	.byte	0x2e
 	.4byte	0x5b
@@ -35050,19 +35118,19 @@ __func__.7630:
 	.8byte	.LFE236-.LFB236
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6ca7
+	.4byte	0x6d22
 	.uleb128 0x2e
 	.4byte	.LASF388
 	.byte	0x2
 	.byte	0x2e
 	.4byte	0xdd4
-	.4byte	.LLST161
+	.4byte	.LLST163
 	.uleb128 0x2e
 	.4byte	.LASF568
 	.byte	0x2
 	.byte	0x2e
 	.4byte	0x5b
-	.4byte	.LLST162
+	.4byte	.LLST164
 	.uleb128 0x3d
 	.string	"req"
 	.byte	0x2
@@ -35076,21 +35144,21 @@ __func__.7630:
 	.byte	0x2
 	.byte	0x31
 	.4byte	0xdea
-	.4byte	.LLST163
+	.4byte	.LLST165
 	.uleb128 0x32
-	.4byte	.LASF799
+	.4byte	.LASF800
 	.byte	0x2
 	.byte	0x31
 	.4byte	0xdea
-	.4byte	.LLST164
+	.4byte	.LLST166
 	.uleb128 0x33
 	.string	"mid"
 	.byte	0x2
 	.byte	0x31
 	.4byte	0xdea
-	.4byte	.LLST165
+	.4byte	.LLST167
 	.uleb128 0x2b
-	.4byte	.LASF800
+	.4byte	.LASF801
 	.byte	0x2
 	.byte	0x32
 	.4byte	0x2711
@@ -35098,15 +35166,15 @@ __func__.7630:
 	.byte	0x91
 	.sleb128 -64
 	.uleb128 0x32
-	.4byte	.LASF801
+	.4byte	.LASF802
 	.byte	0x2
 	.byte	0x33
 	.4byte	0xdc9
-	.4byte	.LLST166
+	.4byte	.LLST168
 	.uleb128 0x34
-	.8byte	.LVL624
+	.8byte	.LVL626
 	.4byte	0x29a4
-	.4byte	0x6c86
+	.4byte	0x6d01
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35126,7 +35194,7 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL633
+	.8byte	.LVL635
 	.4byte	0x29a4
 	.uleb128 0x30
 	.uleb128 0x1
@@ -35148,7 +35216,7 @@ __func__.7630:
 	.byte	0
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF802
+	.4byte	.LASF803
 	.byte	0x2
 	.byte	0x1e
 	.4byte	0xdd4
@@ -35156,15 +35224,15 @@ __func__.7630:
 	.8byte	.LFE235-.LFB235
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6cf6
+	.4byte	0x6d71
 	.uleb128 0x2e
-	.4byte	.LASF803
+	.4byte	.LASF804
 	.byte	0x2
 	.byte	0x1e
 	.4byte	0xdd4
 	.4byte	.LLST27
 	.uleb128 0x2e
-	.4byte	.LASF804
+	.4byte	.LASF805
 	.byte	0x2
 	.byte	0x1e
 	.4byte	0xdd4
@@ -35177,7 +35245,7 @@ __func__.7630:
 	.4byte	.LLST29
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF805
+	.4byte	.LASF806
 	.byte	0x2
 	.byte	0x14
 	.4byte	0xdc9
@@ -35185,22 +35253,22 @@ __func__.7630:
 	.8byte	.LFE234-.LFB234
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6d36
+	.4byte	0x6db1
 	.uleb128 0x2e
-	.4byte	.LASF594
+	.4byte	.LASF597
 	.byte	0x2
 	.byte	0x14
 	.4byte	0xdc9
 	.4byte	.LLST25
 	.uleb128 0x32
-	.4byte	.LASF717
+	.4byte	.LASF718
 	.byte	0x2
 	.byte	0x16
 	.4byte	0xdc9
 	.4byte	.LLST26
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF806
+	.4byte	.LASF807
 	.byte	0x2
 	.byte	0xc
 	.4byte	0xdc9
@@ -35208,15 +35276,15 @@ __func__.7630:
 	.8byte	.LFE233-.LFB233
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6d91
+	.4byte	0x6e0c
 	.uleb128 0x2e
-	.4byte	.LASF594
+	.4byte	.LASF597
 	.byte	0x2
 	.byte	0xc
 	.4byte	0xdc9
 	.4byte	.LLST24
 	.uleb128 0x2b
-	.4byte	.LASF592
+	.4byte	.LASF595
 	.byte	0x2
 	.byte	0xe
 	.4byte	0xdc9
@@ -35246,7 +35314,7 @@ __func__.7630:
 	.byte	0x9f
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF807
+	.4byte	.LASF808
 	.byte	0x2
 	.byte	0x4
 	.4byte	0xdc9
@@ -35254,29 +35322,29 @@ __func__.7630:
 	.8byte	.LFE232-.LFB232
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6dde
+	.4byte	0x6e59
 	.uleb128 0x2e
-	.4byte	.LASF592
+	.4byte	.LASF595
 	.byte	0x2
 	.byte	0x4
 	.4byte	0xdc9
 	.4byte	.LLST22
-	.uleb128 0x59
-	.4byte	.LASF717
+	.uleb128 0x5c
+	.4byte	.LASF718
 	.byte	0x2
 	.byte	0x4
 	.4byte	0xdc9
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x32
-	.4byte	.LASF608
+	.4byte	.LASF587
 	.byte	0x2
 	.byte	0x6
 	.4byte	0xdc9
 	.4byte	.LLST23
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF808
+	.uleb128 0x49
+	.4byte	.LASF809
 	.byte	0x4
 	.2byte	0x13c
 	.4byte	0xddf
@@ -35284,45 +35352,45 @@ __func__.7630:
 	.8byte	.LFE231-.LFB231
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7029
-	.uleb128 0x51
+	.4byte	0x70a4
+	.uleb128 0x54
 	.string	"die"
 	.byte	0x4
 	.2byte	0x13e
 	.4byte	0xdd4
-	.4byte	.LLST361
-	.uleb128 0x51
+	.4byte	.LLST363
+	.uleb128 0x54
 	.string	"blk"
 	.byte	0x4
 	.2byte	0x13f
 	.4byte	0xdc9
-	.4byte	.LLST362
-	.uleb128 0x52
+	.4byte	.LLST364
+	.uleb128 0x55
 	.4byte	.LASF577
 	.byte	0x4
 	.2byte	0x140
 	.4byte	0xdd4
-	.4byte	.LLST363
-	.uleb128 0x52
-	.4byte	.LASF809
+	.4byte	.LLST365
+	.uleb128 0x55
+	.4byte	.LASF810
 	.byte	0x4
 	.2byte	0x142
-	.4byte	0x7029
-	.4byte	.LLST364
-	.uleb128 0x4b
-	.4byte	.LASF810
+	.4byte	0x70a4
+	.4byte	.LLST366
+	.uleb128 0x4e
+	.4byte	.LASF811
 	.byte	0x4
 	.2byte	0x158
 	.uleb128 0x45
-	.8byte	.LVL1545
-	.4byte	0x7283
+	.8byte	.LVL1547
+	.4byte	0x72fe
 	.uleb128 0x45
-	.8byte	.LVL1546
-	.4byte	0x702f
+	.8byte	.LVL1548
+	.4byte	0x70aa
 	.uleb128 0x34
-	.8byte	.LVL1552
-	.4byte	0x74e5
-	.4byte	0x6e7a
+	.8byte	.LVL1554
+	.4byte	0x7560
+	.4byte	0x6ef5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35331,9 +35399,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1553
+	.8byte	.LVL1555
 	.4byte	0x26cd
-	.4byte	0x6e92
+	.4byte	0x6f0d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35342,9 +35410,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1554
-	.4byte	0x7574
-	.4byte	0x6eaa
+	.8byte	.LVL1556
+	.4byte	0x75ef
+	.4byte	0x6f25
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35353,9 +35421,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1560
+	.8byte	.LVL1562
 	.4byte	0x29a4
-	.4byte	0x6ecc
+	.4byte	0x6f47
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35374,12 +35442,12 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1561
+	.8byte	.LVL1563
 	.4byte	0x2527
 	.uleb128 0x34
-	.8byte	.LVL1563
-	.4byte	0x7574
-	.4byte	0x6ef1
+	.8byte	.LVL1565
+	.4byte	0x75ef
+	.4byte	0x6f6c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35388,9 +35456,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1565
+	.8byte	.LVL1567
 	.4byte	0x2611
-	.4byte	0x6f09
+	.4byte	0x6f84
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -35399,15 +35467,15 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1566
-	.4byte	0x7441
-	.uleb128 0x45
 	.8byte	.LVL1568
-	.4byte	0x74e5
+	.4byte	0x74bc
+	.uleb128 0x45
+	.8byte	.LVL1570
+	.4byte	0x7560
 	.uleb128 0x34
-	.8byte	.LVL1569
+	.8byte	.LVL1571
 	.4byte	0x259f
-	.4byte	0x6f3f
+	.4byte	0x6fba
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -35420,9 +35488,9 @@ __func__.7630:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1570
+	.8byte	.LVL1572
 	.4byte	0x259f
-	.4byte	0x6f5d
+	.4byte	0x6fd8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -35436,12 +35504,12 @@ __func__.7630:
 	.2byte	0x1000
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1572
+	.8byte	.LVL1574
 	.4byte	0x2527
 	.uleb128 0x34
-	.8byte	.LVL1573
+	.8byte	.LVL1575
 	.4byte	0x2721
-	.4byte	0x6f8c
+	.4byte	0x7007
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35460,9 +35528,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1574
+	.8byte	.LVL1576
 	.4byte	0x27e7
-	.4byte	0x6fb3
+	.4byte	0x702e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35486,9 +35554,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1575
-	.4byte	0x7574
-	.4byte	0x6fcb
+	.8byte	.LVL1577
+	.4byte	0x75ef
+	.4byte	0x7046
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35497,12 +35565,12 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1581
-	.4byte	0x7574
+	.8byte	.LVL1583
+	.4byte	0x75ef
 	.uleb128 0x34
-	.8byte	.LVL1585
+	.8byte	.LVL1587
 	.4byte	0x2721
-	.4byte	0x6ff4
+	.4byte	0x706f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -35515,23 +35583,23 @@ __func__.7630:
 	.byte	0x32
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1586
-	.4byte	0x7574
-	.uleb128 0x45
-	.8byte	.LVL1587
-	.4byte	0x7574
-	.uleb128 0x45
 	.8byte	.LVL1588
-	.4byte	0x72c7
+	.4byte	0x75ef
+	.uleb128 0x45
+	.8byte	.LVL1589
+	.4byte	0x75ef
 	.uleb128 0x45
 	.8byte	.LVL1590
-	.4byte	0x72c7
+	.4byte	0x7342
+	.uleb128 0x45
+	.8byte	.LVL1592
+	.4byte	0x7342
 	.byte	0
 	.uleb128 0x8
 	.byte	0x8
 	.4byte	0x11c8
-	.uleb128 0x46
-	.4byte	.LASF811
+	.uleb128 0x49
+	.4byte	.LASF812
 	.byte	0x4
 	.2byte	0x116
 	.4byte	0x5b
@@ -35539,32 +35607,32 @@ __func__.7630:
 	.8byte	.LFE230-.LFB230
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x70ac
-	.uleb128 0x51
+	.4byte	0x7127
+	.uleb128 0x54
 	.string	"die"
 	.byte	0x4
 	.2byte	0x118
 	.4byte	0xdd4
-	.4byte	.LLST158
-	.uleb128 0x51
+	.4byte	.LLST160
+	.uleb128 0x54
 	.string	"blk"
 	.byte	0x4
 	.2byte	0x119
 	.4byte	0xdc9
-	.4byte	.LLST159
-	.uleb128 0x49
-	.4byte	.LASF812
+	.4byte	.LLST161
+	.uleb128 0x4c
+	.4byte	.LASF813
 	.byte	0x4
 	.2byte	0x11a
 	.4byte	0xdd4
-	.uleb128 0x52
-	.4byte	.LASF809
+	.uleb128 0x55
+	.4byte	.LASF810
 	.byte	0x4
 	.2byte	0x11b
-	.4byte	0x7029
-	.4byte	.LLST160
+	.4byte	0x70a4
+	.4byte	.LLST162
 	.uleb128 0x36
-	.8byte	.LVL614
+	.8byte	.LVL616
 	.4byte	0x29a4
 	.uleb128 0x30
 	.uleb128 0x1
@@ -35585,7 +35653,7 @@ __func__.7630:
 	.byte	0
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF813
+	.4byte	.LASF814
 	.byte	0x4
 	.byte	0xac
 	.4byte	0x5b
@@ -35593,44 +35661,44 @@ __func__.7630:
 	.8byte	.LFE229-.LFB229
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x721a
+	.4byte	0x7295
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x4
 	.byte	0xae
 	.4byte	0xdd4
-	.4byte	.LLST357
+	.4byte	.LLST359
 	.uleb128 0x33
 	.string	"blk"
 	.byte	0x4
 	.byte	0xaf
 	.4byte	0xdc9
-	.4byte	.LLST358
+	.4byte	.LLST360
 	.uleb128 0x32
-	.4byte	.LASF705
+	.4byte	.LASF706
 	.byte	0x4
 	.byte	0xb0
 	.4byte	0xdea
-	.4byte	.LLST359
+	.4byte	.LLST361
 	.uleb128 0x32
-	.4byte	.LASF809
+	.4byte	.LASF810
 	.byte	0x4
 	.byte	0xb1
-	.4byte	0x7029
-	.4byte	.LLST360
+	.4byte	0x70a4
+	.4byte	.LLST362
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x722a
+	.4byte	0x72a5
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6364
+	.8byte	__func__.6363
 	.uleb128 0x45
-	.8byte	.LVL1521
-	.4byte	0x7283
-	.uleb128 0x34
 	.8byte	.LVL1523
+	.4byte	0x72fe
+	.uleb128 0x34
+	.8byte	.LVL1525
 	.4byte	0x29a4
-	.4byte	0x7149
+	.4byte	0x71c4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35649,9 +35717,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1524
+	.8byte	.LVL1526
 	.4byte	0x29a4
-	.4byte	0x716b
+	.4byte	0x71e6
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35670,9 +35738,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1526
+	.8byte	.LVL1528
 	.4byte	0x29a4
-	.4byte	0x7194
+	.4byte	0x720f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35691,9 +35759,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1527
-	.4byte	0x6bca
-	.4byte	0x71ab
+	.8byte	.LVL1529
+	.4byte	0x6c45
+	.4byte	0x7226
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -35701,9 +35769,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1529
-	.4byte	0xa8ce
-	.4byte	0x71dd
+	.8byte	.LVL1531
+	.4byte	0xa949
+	.4byte	0x7258
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35724,12 +35792,12 @@ __func__.7630:
 	.byte	0xfe
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1530
-	.4byte	0x8b14
+	.8byte	.LVL1532
+	.4byte	0x8b8f
 	.uleb128 0x34
-	.8byte	.LVL1538
+	.8byte	.LVL1540
 	.4byte	0x29a4
-	.4byte	0x720c
+	.4byte	0x7287
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35748,20 +35816,20 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1543
+	.8byte	.LVL1545
 	.4byte	0x2527
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x722a
+	.4byte	0x72a5
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0xa
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x721a
+	.4byte	0x7295
 	.uleb128 0x2d
-	.4byte	.LASF814
+	.4byte	.LASF815
 	.byte	0x4
 	.byte	0x9c
 	.4byte	0xdc9
@@ -35769,7 +35837,7 @@ __func__.7630:
 	.8byte	.LFE228-.LFB228
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7283
+	.4byte	0x72fe
 	.uleb128 0x33
 	.string	"blk"
 	.byte	0x4
@@ -35777,14 +35845,14 @@ __func__.7630:
 	.4byte	0xdc9
 	.4byte	.LLST20
 	.uleb128 0x32
-	.4byte	.LASF815
+	.4byte	.LASF816
 	.byte	0x4
 	.byte	0x9f
 	.4byte	0xdc9
 	.4byte	.LLST21
 	.uleb128 0x36
 	.8byte	.LVL53
-	.4byte	0x74e5
+	.4byte	0x7560
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35794,16 +35862,16 @@ __func__.7630:
 	.byte	0
 	.byte	0
 	.uleb128 0x43
-	.4byte	.LASF816
+	.4byte	.LASF817
 	.byte	0x4
 	.byte	0x94
 	.8byte	.LFB227
 	.8byte	.LFE227-.LFB227
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x72c7
+	.4byte	0x7342
 	.uleb128 0x2f
-	.8byte	.LVL804
+	.8byte	.LVL806
 	.4byte	0x259f
 	.uleb128 0x30
 	.uleb128 0x1
@@ -35825,7 +35893,7 @@ __func__.7630:
 	.byte	0
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF817
+	.4byte	.LASF818
 	.byte	0x4
 	.byte	0x4f
 	.4byte	0x5b
@@ -35833,42 +35901,42 @@ __func__.7630:
 	.8byte	.LFE226-.LFB226
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7441
+	.4byte	0x74bc
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x4
 	.byte	0x51
 	.4byte	0x5b
-	.4byte	.LLST306
+	.4byte	.LLST308
 	.uleb128 0x32
-	.4byte	.LASF818
+	.4byte	.LASF819
 	.byte	0x4
 	.byte	0x52
 	.4byte	0x5b
-	.4byte	.LLST307
+	.4byte	.LLST309
 	.uleb128 0x32
-	.4byte	.LASF809
+	.4byte	.LASF810
 	.byte	0x4
 	.byte	0x53
-	.4byte	0x7029
-	.4byte	.LLST308
+	.4byte	0x70a4
+	.4byte	.LLST310
 	.uleb128 0x32
-	.4byte	.LASF721
+	.4byte	.LASF722
 	.byte	0x4
 	.byte	0x54
 	.4byte	0xdc9
-	.4byte	.LLST309
-	.uleb128 0x55
-	.4byte	.LASF819
+	.4byte	.LLST311
+	.uleb128 0x58
+	.4byte	.LASF820
 	.byte	0x4
 	.byte	0x67
-	.uleb128 0x68
+	.uleb128 0x6a
 	.4byte	.LASF574
 	.4byte	0x299f
 	.uleb128 0x34
-	.8byte	.LVL1243
+	.8byte	.LVL1245
 	.4byte	0x259f
-	.4byte	0x734a
+	.4byte	0x73c5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -35877,9 +35945,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1246
+	.8byte	.LVL1248
 	.4byte	0x259f
-	.4byte	0x736d
+	.4byte	0x73e8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35899,9 +35967,9 @@ __func__.7630:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1248
-	.4byte	0xa8ce
-	.4byte	0x7385
+	.8byte	.LVL1250
+	.4byte	0xa949
+	.4byte	0x7400
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35910,9 +35978,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1249
+	.8byte	.LVL1251
 	.4byte	0x27e7
-	.4byte	0x73ac
+	.4byte	0x7427
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35936,9 +36004,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1250
+	.8byte	.LVL1252
 	.4byte	0x2721
-	.4byte	0x73c8
+	.4byte	0x7443
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -35951,9 +36019,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1251
+	.8byte	.LVL1253
 	.4byte	0x27e7
-	.4byte	0x73ef
+	.4byte	0x746a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35977,9 +36045,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1253
-	.4byte	0xa8ce
-	.4byte	0x740e
+	.8byte	.LVL1255
+	.4byte	0xa949
+	.4byte	0x7489
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35988,9 +36056,9 @@ __func__.7630:
 	.8byte	.LC95
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1254
-	.4byte	0xa8ce
-	.4byte	0x7433
+	.8byte	.LVL1256
+	.4byte	0xa949
+	.4byte	0x74ae
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36005,30 +36073,30 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1257
+	.8byte	.LVL1259
 	.4byte	0x2527
 	.byte	0
 	.uleb128 0x43
-	.4byte	.LASF820
+	.4byte	.LASF821
 	.byte	0x4
 	.byte	0x41
 	.8byte	.LFB225
 	.8byte	.LFE225-.LFB225
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x74dd
+	.4byte	0x7558
 	.uleb128 0x2e
-	.4byte	.LASF753
+	.4byte	.LASF754
 	.byte	0x4
 	.byte	0x41
 	.4byte	0x10f8
-	.4byte	.LLST201
+	.4byte	.LLST203
 	.uleb128 0x2e
-	.4byte	.LASF821
+	.4byte	.LASF822
 	.byte	0x4
 	.byte	0x41
 	.4byte	0x1001
-	.4byte	.LLST202
+	.4byte	.LLST204
 	.uleb128 0x39
 	.string	"i"
 	.byte	0x4
@@ -36036,14 +36104,14 @@ __func__.7630:
 	.4byte	0xdd4
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x41dd
+	.4byte	0x4258
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6321
+	.8byte	__func__.6320
 	.uleb128 0x34
-	.8byte	.LVL800
+	.8byte	.LVL802
 	.4byte	0x259f
-	.4byte	0x74b5
+	.4byte	0x7530
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36057,8 +36125,8 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL801
-	.4byte	0xa8ce
+	.8byte	.LVL803
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36079,13 +36147,13 @@ __func__.7630:
 	.byte	0x4a
 	.byte	0
 	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF822
+	.uleb128 0x6b
+	.4byte	.LASF823
 	.byte	0x4
 	.byte	0x26
 	.byte	0x1
 	.uleb128 0x2d
-	.4byte	.LASF823
+	.4byte	.LASF824
 	.byte	0x4
 	.byte	0x17
 	.4byte	0x5b
@@ -36093,7 +36161,7 @@ __func__.7630:
 	.8byte	.LFE223-.LFB223
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7574
+	.4byte	0x75ef
 	.uleb128 0x2e
 	.4byte	.LASF388
 	.byte	0x4
@@ -36113,7 +36181,7 @@ __func__.7630:
 	.4byte	0xdd4
 	.4byte	.LLST18
 	.uleb128 0x2b
-	.4byte	.LASF821
+	.4byte	.LASF822
 	.byte	0x4
 	.byte	0x1b
 	.4byte	0x1001
@@ -36150,7 +36218,7 @@ __func__.7630:
 	.4byte	.LLST19
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF824
+	.4byte	.LASF825
 	.byte	0x4
 	.byte	0x4
 	.4byte	0x5b
@@ -36158,7 +36226,7 @@ __func__.7630:
 	.8byte	.LFE222-.LFB222
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x75f8
+	.4byte	0x7673
 	.uleb128 0x2e
 	.4byte	.LASF388
 	.byte	0x4
@@ -36172,7 +36240,7 @@ __func__.7630:
 	.4byte	0xdd4
 	.4byte	.LLST13
 	.uleb128 0x32
-	.4byte	.LASF821
+	.4byte	.LASF822
 	.byte	0x4
 	.byte	0x7
 	.4byte	0x1001
@@ -36185,7 +36253,7 @@ __func__.7630:
 	.4byte	.LLST15
 	.uleb128 0x36
 	.8byte	.LVL44
-	.4byte	0xa8ce
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36204,46 +36272,46 @@ __func__.7630:
 	.byte	0x1a
 	.byte	0
 	.byte	0
-	.uleb128 0x6a
-	.4byte	.LASF884
+	.uleb128 0x6c
+	.4byte	.LASF887
 	.byte	0x3
-	.2byte	0x4be
+	.2byte	0x4bd
 	.4byte	0xdd4
 	.8byte	.LFB221
 	.8byte	.LFE221-.LFB221
 	.uleb128 0x1
 	.byte	0x9c
-	.uleb128 0x46
-	.4byte	.LASF825
+	.uleb128 0x49
+	.4byte	.LASF826
 	.byte	0x3
-	.2byte	0x4b9
+	.2byte	0x4b8
 	.4byte	0x5b
 	.8byte	.LFB220
 	.8byte	.LFE220-.LFB220
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7691
-	.uleb128 0x50
+	.4byte	0x770c
+	.uleb128 0x53
 	.4byte	.LASF236
 	.byte	0x3
-	.2byte	0x4b9
+	.2byte	0x4b8
 	.4byte	0xb9
-	.4byte	.LLST458
-	.uleb128 0x50
+	.4byte	.LLST460
+	.uleb128 0x53
 	.4byte	.LASF325
 	.byte	0x3
-	.2byte	0x4b9
+	.2byte	0x4b8
 	.4byte	0xb9
-	.4byte	.LLST459
-	.uleb128 0x5a
+	.4byte	.LLST461
+	.uleb128 0x5d
 	.string	"buf"
 	.byte	0x3
-	.2byte	0x4b9
-	.4byte	0x7691
-	.4byte	.LLST460
+	.2byte	0x4b8
+	.4byte	0x770c
+	.4byte	.LLST462
 	.uleb128 0x2f
-	.8byte	.LVL2075
-	.4byte	0x783c
+	.8byte	.LVL2077
+	.4byte	0x78b7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36275,8 +36343,8 @@ __func__.7630:
 	.uleb128 0x8
 	.byte	0x8
 	.4byte	0x94
-	.uleb128 0x46
-	.4byte	.LASF826
+	.uleb128 0x49
+	.4byte	.LASF827
 	.byte	0x3
 	.2byte	0x4b3
 	.4byte	0x5b
@@ -36284,28 +36352,28 @@ __func__.7630:
 	.8byte	.LFE219-.LFB219
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7712
-	.uleb128 0x50
+	.4byte	0x778d
+	.uleb128 0x53
 	.4byte	.LASF236
 	.byte	0x3
 	.2byte	0x4b3
 	.4byte	0xb9
-	.4byte	.LLST440
-	.uleb128 0x50
+	.4byte	.LLST442
+	.uleb128 0x53
 	.4byte	.LASF325
 	.byte	0x3
 	.2byte	0x4b3
 	.4byte	0xb9
-	.4byte	.LLST441
-	.uleb128 0x5a
+	.4byte	.LLST443
+	.uleb128 0x5d
 	.string	"buf"
 	.byte	0x3
 	.2byte	0x4b3
-	.4byte	0x7691
-	.4byte	.LLST442
+	.4byte	0x770c
+	.4byte	.LLST444
 	.uleb128 0x2f
-	.8byte	.LVL1982
-	.4byte	0x7f5e
+	.8byte	.LVL1984
+	.4byte	0x7fd9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36334,8 +36402,8 @@ __func__.7630:
 	.byte	0x52
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF827
+	.uleb128 0x49
+	.4byte	.LASF828
 	.byte	0x3
 	.2byte	0x484
 	.4byte	0x5b
@@ -36343,39 +36411,39 @@ __func__.7630:
 	.8byte	.LFE218-.LFB218
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x783c
-	.uleb128 0x50
-	.4byte	.LASF731
+	.4byte	0x78b7
+	.uleb128 0x53
+	.4byte	.LASF732
 	.byte	0x3
 	.2byte	0x484
 	.4byte	0xdd4
-	.4byte	.LLST398
-	.uleb128 0x50
-	.4byte	.LASF732
+	.4byte	.LLST400
+	.uleb128 0x53
+	.4byte	.LASF733
 	.byte	0x3
 	.2byte	0x484
 	.4byte	0xdd4
-	.4byte	.LLST399
-	.uleb128 0x52
-	.4byte	.LASF734
+	.4byte	.LLST401
+	.uleb128 0x55
+	.4byte	.LASF735
 	.byte	0x3
 	.2byte	0x486
 	.4byte	0xdc9
-	.4byte	.LLST400
-	.uleb128 0x51
+	.4byte	.LLST402
+	.uleb128 0x54
 	.string	"tmp"
 	.byte	0x3
 	.2byte	0x487
 	.4byte	0xdc9
-	.4byte	.LLST401
-	.uleb128 0x51
+	.4byte	.LLST403
+	.uleb128 0x54
 	.string	"lpa"
 	.byte	0x3
 	.2byte	0x488
 	.4byte	0xdd4
-	.4byte	.LLST402
+	.4byte	.LLST404
 	.uleb128 0x2a
-	.4byte	.LASF663
+	.4byte	.LASF664
 	.byte	0x3
 	.2byte	0x489
 	.4byte	0xdd4
@@ -36383,32 +36451,32 @@ __func__.7630:
 	.byte	0x91
 	.sleb128 -8
 	.uleb128 0x2a
-	.4byte	.LASF640
+	.4byte	.LASF641
 	.byte	0x3
 	.2byte	0x489
 	.4byte	0xdd4
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -4
-	.uleb128 0x52
-	.4byte	.LASF629
+	.uleb128 0x55
+	.4byte	.LASF630
 	.byte	0x3
 	.2byte	0x48a
 	.4byte	0xdc9
-	.4byte	.LLST403
+	.4byte	.LLST405
 	.uleb128 0x45
-	.8byte	.LVL1744
-	.4byte	0x7cda
+	.8byte	.LVL1746
+	.4byte	0x7d55
 	.uleb128 0x45
-	.8byte	.LVL1753
-	.4byte	0x5ce8
+	.8byte	.LVL1755
+	.4byte	0x5d63
 	.uleb128 0x45
-	.8byte	.LVL1754
-	.4byte	0x5619
+	.8byte	.LVL1756
+	.4byte	0x5694
 	.uleb128 0x34
-	.8byte	.LVL1755
-	.4byte	0x5bbb
-	.4byte	0x77fd
+	.8byte	.LVL1757
+	.4byte	0x5c36
+	.4byte	0x7878
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36428,9 +36496,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1756
-	.4byte	0x5bbb
-	.4byte	0x7821
+	.8byte	.LVL1758
+	.4byte	0x5c36
+	.4byte	0x789c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36450,14 +36518,14 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1757
-	.4byte	0x6cf6
+	.8byte	.LVL1759
+	.4byte	0x6d71
 	.uleb128 0x45
-	.8byte	.LVL1758
-	.4byte	0x3645
+	.8byte	.LVL1760
+	.4byte	0x36c0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF828
+	.uleb128 0x49
+	.4byte	.LASF829
 	.byte	0x3
 	.2byte	0x3c1
 	.4byte	0x5b
@@ -36465,116 +36533,116 @@ __func__.7630:
 	.8byte	.LFE217-.LFB217
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7cda
-	.uleb128 0x5a
+	.4byte	0x7d55
+	.uleb128 0x5d
 	.string	"LUN"
 	.byte	0x3
 	.2byte	0x3c1
 	.4byte	0xdbe
-	.4byte	.LLST443
-	.uleb128 0x50
-	.4byte	.LASF731
+	.4byte	.LLST445
+	.uleb128 0x53
+	.4byte	.LASF732
 	.byte	0x3
 	.2byte	0x3c1
 	.4byte	0xdd4
-	.4byte	.LLST444
-	.uleb128 0x50
-	.4byte	.LASF732
+	.4byte	.LLST446
+	.uleb128 0x53
+	.4byte	.LASF733
 	.byte	0x3
 	.2byte	0x3c1
 	.4byte	0xdd4
-	.4byte	.LLST445
-	.uleb128 0x50
-	.4byte	.LASF733
+	.4byte	.LLST447
+	.uleb128 0x53
+	.4byte	.LASF734
 	.byte	0x3
 	.2byte	0x3c1
-	.4byte	0x5a77
-	.4byte	.LLST446
-	.uleb128 0x52
-	.4byte	.LASF596
+	.4byte	0x5af2
+	.4byte	.LLST448
+	.uleb128 0x55
+	.4byte	.LASF599
 	.byte	0x3
 	.2byte	0x3c3
-	.4byte	0x2d84
-	.4byte	.LLST447
-	.uleb128 0x51
+	.4byte	0x2dff
+	.4byte	.LLST449
+	.uleb128 0x54
 	.string	"lpa"
 	.byte	0x3
 	.2byte	0x3c4
 	.4byte	0xdd4
-	.4byte	.LLST448
-	.uleb128 0x52
-	.4byte	.LASF829
+	.4byte	.LLST450
+	.uleb128 0x55
+	.4byte	.LASF830
 	.byte	0x3
 	.2byte	0x3c4
 	.4byte	0xdd4
-	.4byte	.LLST449
-	.uleb128 0x52
-	.4byte	.LASF830
+	.4byte	.LLST451
+	.uleb128 0x55
+	.4byte	.LASF831
 	.byte	0x3
 	.2byte	0x3c4
 	.4byte	0xdd4
-	.4byte	.LLST450
+	.4byte	.LLST452
 	.uleb128 0x2a
-	.4byte	.LASF663
+	.4byte	.LASF664
 	.byte	0x3
 	.2byte	0x3c5
 	.4byte	0xdd4
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -36
-	.uleb128 0x51
+	.uleb128 0x54
 	.string	"ppa"
 	.byte	0x3
 	.2byte	0x3c5
 	.4byte	0xdd4
-	.4byte	.LLST451
-	.uleb128 0x51
+	.4byte	.LLST453
+	.uleb128 0x54
 	.string	"i"
 	.byte	0x3
 	.2byte	0x3c6
 	.4byte	0xdd4
-	.4byte	.LLST452
-	.uleb128 0x52
-	.4byte	.LASF831
+	.4byte	.LLST454
+	.uleb128 0x55
+	.4byte	.LASF832
 	.byte	0x3
 	.2byte	0x3c6
 	.4byte	0xdd4
-	.4byte	.LLST453
-	.uleb128 0x52
-	.4byte	.LASF593
+	.4byte	.LLST455
+	.uleb128 0x55
+	.4byte	.LASF596
 	.byte	0x3
 	.2byte	0x3c6
 	.4byte	0xdd4
-	.4byte	.LLST454
-	.uleb128 0x52
-	.4byte	.LASF832
+	.4byte	.LLST456
+	.uleb128 0x55
+	.4byte	.LASF833
 	.byte	0x3
 	.2byte	0x3c7
 	.4byte	0xdd4
-	.4byte	.LLST455
-	.uleb128 0x52
-	.4byte	.LASF833
+	.4byte	.LLST457
+	.uleb128 0x55
+	.4byte	.LASF834
 	.byte	0x3
 	.2byte	0x3c7
 	.4byte	0xdd4
-	.4byte	.LLST456
-	.uleb128 0x52
-	.4byte	.LASF639
+	.4byte	.LLST458
+	.uleb128 0x55
+	.4byte	.LASF640
 	.byte	0x3
 	.2byte	0x3c8
 	.4byte	0x1f04
-	.4byte	.LLST457
+	.4byte	.LLST459
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x5ce3
+	.4byte	0x5d5e
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6257
+	.8byte	__func__.6256
 	.uleb128 0x40
 	.4byte	.Ldebug_ranges0+0x300
-	.4byte	0x79fe
+	.4byte	0x7a79
 	.uleb128 0x2a
-	.4byte	.LASF601
+	.4byte	.LASF604
 	.byte	0x3
 	.2byte	0x43d
 	.4byte	0xdf5
@@ -36582,9 +36650,9 @@ __func__.7630:
 	.byte	0x91
 	.sleb128 -32
 	.uleb128 0x34
-	.8byte	.LVL2058
+	.8byte	.LVL2060
 	.4byte	0x29a4
-	.4byte	0x79a9
+	.4byte	0x7a24
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36603,9 +36671,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2060
-	.4byte	0xa8ce
-	.4byte	0x79ce
+	.8byte	.LVL2062
+	.4byte	0xa949
+	.4byte	0x7a49
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36620,8 +36688,8 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL2061
-	.4byte	0xa8ce
+	.8byte	.LVL2063
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36643,9 +36711,9 @@ __func__.7630:
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1987
-	.4byte	0x5a7d
-	.4byte	0x7a23
+	.8byte	.LVL1989
+	.4byte	0x5af8
+	.4byte	0x7a9e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36666,12 +36734,12 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1997
-	.4byte	0x7cda
-	.uleb128 0x34
 	.8byte	.LVL1999
-	.4byte	0xa8ce
-	.4byte	0x7a63
+	.4byte	0x7d55
+	.uleb128 0x34
+	.8byte	.LVL2001
+	.4byte	0xa949
+	.4byte	0x7ade
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36692,12 +36760,12 @@ __func__.7630:
 	.2byte	0x3f4
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2000
-	.4byte	0x7cda
+	.8byte	.LVL2002
+	.4byte	0x7d55
 	.uleb128 0x34
-	.8byte	.LVL2001
-	.4byte	0x38b7
-	.4byte	0x7a8f
+	.8byte	.LVL2003
+	.4byte	0x3932
+	.4byte	0x7b0a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36706,9 +36774,9 @@ __func__.7630:
 	.8byte	.LANCHOR52
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2003
-	.4byte	0x38b7
-	.4byte	0x7aa7
+	.8byte	.LVL2005
+	.4byte	0x3932
+	.4byte	0x7b22
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36717,9 +36785,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2005
-	.4byte	0x38b7
-	.4byte	0x7abf
+	.8byte	.LVL2007
+	.4byte	0x3932
+	.4byte	0x7b3a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36728,9 +36796,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2008
-	.4byte	0xa8ce
-	.4byte	0x7af2
+	.8byte	.LVL2010
+	.4byte	0xa949
+	.4byte	0x7b6d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36751,9 +36819,9 @@ __func__.7630:
 	.2byte	0x415
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2015
-	.4byte	0x2cb7
-	.4byte	0x7b15
+	.8byte	.LVL2017
+	.4byte	0x2d32
+	.4byte	0x7b90
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36772,9 +36840,9 @@ __func__.7630:
 	.byte	0x1c
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2020
-	.4byte	0x65c9
-	.4byte	0x7b2c
+	.8byte	.LVL2022
+	.4byte	0x6644
+	.4byte	0x7ba7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36782,12 +36850,12 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2021
-	.4byte	0x2ef8
+	.8byte	.LVL2023
+	.4byte	0x2f73
 	.uleb128 0x34
-	.8byte	.LVL2022
-	.4byte	0x2cb7
-	.4byte	0x7b55
+	.8byte	.LVL2024
+	.4byte	0x2d32
+	.4byte	0x7bd0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36800,9 +36868,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2023
-	.4byte	0x2cb7
-	.4byte	0x7b71
+	.8byte	.LVL2025
+	.4byte	0x2d32
+	.4byte	0x7bec
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36815,9 +36883,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2029
+	.8byte	.LVL2031
 	.4byte	0x2527
-	.4byte	0x7b8f
+	.4byte	0x7c0a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -36832,12 +36900,12 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2036
-	.4byte	0x7cda
-	.uleb128 0x34
 	.8byte	.LVL2038
-	.4byte	0x38b7
-	.4byte	0x7bb4
+	.4byte	0x7d55
+	.uleb128 0x34
+	.8byte	.LVL2040
+	.4byte	0x3932
+	.4byte	0x7c2f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36846,9 +36914,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2041
-	.4byte	0x5bbb
-	.4byte	0x7bd8
+	.8byte	.LVL2043
+	.4byte	0x5c36
+	.4byte	0x7c53
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36868,9 +36936,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2042
-	.4byte	0x3789
-	.4byte	0x7bf0
+	.8byte	.LVL2044
+	.4byte	0x3804
+	.4byte	0x7c6b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36879,9 +36947,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2046
+	.8byte	.LVL2048
 	.4byte	0x259f
-	.4byte	0x7c0d
+	.4byte	0x7c88
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36895,9 +36963,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2051
-	.4byte	0xa8ce
-	.4byte	0x7c40
+	.8byte	.LVL2053
+	.4byte	0xa949
+	.4byte	0x7cbb
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36918,9 +36986,9 @@ __func__.7630:
 	.2byte	0x45f
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2059
+	.8byte	.LVL2061
 	.4byte	0x2527
-	.4byte	0x7c63
+	.4byte	0x7cde
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -36939,9 +37007,9 @@ __func__.7630:
 	.byte	0x24
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2063
+	.8byte	.LVL2065
 	.4byte	0x259f
-	.4byte	0x7c7a
+	.4byte	0x7cf5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -36949,12 +37017,12 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2064
+	.8byte	.LVL2066
 	.4byte	0x2527
 	.uleb128 0x34
-	.8byte	.LVL2067
-	.4byte	0x7d15
-	.4byte	0x7caa
+	.8byte	.LVL2069
+	.4byte	0x7d90
+	.4byte	0x7d25
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -36974,8 +37042,8 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL2068
-	.4byte	0xa8ce
+	.8byte	.LVL2070
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36996,8 +37064,8 @@ __func__.7630:
 	.2byte	0x46e
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF834
+	.uleb128 0x49
+	.4byte	.LASF835
 	.byte	0x3
 	.2byte	0x3b7
 	.4byte	0x5b
@@ -37005,10 +37073,10 @@ __func__.7630:
 	.8byte	.LFE216-.LFB216
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7d15
+	.4byte	0x7d90
 	.uleb128 0x36
-	.8byte	.LVL1732
-	.4byte	0x7d15
+	.8byte	.LVL1734
+	.4byte	0x7d90
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37021,45 +37089,45 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.byte	0
-	.uleb128 0x5d
-	.4byte	.LASF835
+	.uleb128 0x5f
+	.4byte	.LASF836
 	.byte	0x3
 	.2byte	0x387
 	.8byte	.LFB215
 	.8byte	.LFE215-.LFB215
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7f49
-	.uleb128 0x5a
+	.4byte	0x7fc4
+	.uleb128 0x5d
 	.string	"req"
 	.byte	0x3
 	.2byte	0x387
 	.4byte	0x1abc
-	.4byte	.LLST391
-	.uleb128 0x50
-	.4byte	.LASF593
+	.4byte	.LLST393
+	.uleb128 0x53
+	.4byte	.LASF596
 	.byte	0x3
 	.2byte	0x387
 	.4byte	0xdd4
-	.4byte	.LLST392
-	.uleb128 0x50
-	.4byte	.LASF836
+	.4byte	.LLST394
+	.uleb128 0x53
+	.4byte	.LASF837
 	.byte	0x3
 	.2byte	0x387
 	.4byte	0xdd4
-	.4byte	.LLST393
-	.uleb128 0x50
-	.4byte	.LASF639
+	.4byte	.LLST395
+	.uleb128 0x53
+	.4byte	.LASF640
 	.byte	0x3
 	.2byte	0x387
 	.4byte	0x1f04
-	.4byte	.LLST394
-	.uleb128 0x4a
+	.4byte	.LLST396
+	.uleb128 0x4d
 	.string	"i"
 	.byte	0x3
 	.2byte	0x389
 	.4byte	0xdd4
-	.uleb128 0x5e
+	.uleb128 0x60
 	.string	"ppa"
 	.byte	0x3
 	.2byte	0x38a
@@ -37067,40 +37135,40 @@ __func__.7630:
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -4
-	.uleb128 0x52
-	.4byte	.LASF663
+	.uleb128 0x55
+	.4byte	.LASF664
 	.byte	0x3
 	.2byte	0x38a
 	.4byte	0xdd4
-	.4byte	.LLST395
-	.uleb128 0x52
-	.4byte	.LASF623
+	.4byte	.LLST397
+	.uleb128 0x55
+	.4byte	.LASF624
 	.byte	0x3
 	.2byte	0x38b
 	.4byte	0xdc9
-	.4byte	.LLST396
-	.uleb128 0x52
-	.4byte	.LASF596
+	.4byte	.LLST398
+	.uleb128 0x55
+	.4byte	.LASF599
 	.byte	0x3
 	.2byte	0x38c
-	.4byte	0x2d84
-	.4byte	.LLST397
-	.uleb128 0x5f
-	.4byte	.LASF687
+	.4byte	0x2dff
+	.4byte	.LLST399
+	.uleb128 0x61
+	.4byte	.LASF688
 	.byte	0x3
 	.2byte	0x38d
 	.4byte	0xdd4
 	.byte	0
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x7f59
+	.4byte	0x7fd4
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6229
+	.8byte	__func__.6228
 	.uleb128 0x34
-	.8byte	.LVL1715
+	.8byte	.LVL1717
 	.4byte	0x27e7
-	.4byte	0x7e00
+	.4byte	0x7e7b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37121,12 +37189,12 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1716
-	.4byte	0x6cf6
-	.uleb128 0x34
 	.8byte	.LVL1718
-	.4byte	0x38b7
-	.4byte	0x7e25
+	.4byte	0x6d71
+	.uleb128 0x34
+	.8byte	.LVL1720
+	.4byte	0x3932
+	.4byte	0x7ea0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37135,12 +37203,12 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1719
-	.4byte	0x2e56
+	.8byte	.LVL1721
+	.4byte	0x2ed1
 	.uleb128 0x34
-	.8byte	.LVL1720
-	.4byte	0x3789
-	.4byte	0x7e4a
+	.8byte	.LVL1722
+	.4byte	0x3804
+	.4byte	0x7ec5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37149,9 +37217,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1721
+	.8byte	.LVL1723
 	.4byte	0x27e7
-	.4byte	0x7e6c
+	.4byte	0x7ee7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37170,9 +37238,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1722
-	.4byte	0xa8ce
-	.4byte	0x7e9f
+	.8byte	.LVL1724
+	.4byte	0xa949
+	.4byte	0x7f1a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37193,9 +37261,9 @@ __func__.7630:
 	.2byte	0x3a5
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1723
-	.4byte	0x5bbb
-	.4byte	0x7ebd
+	.8byte	.LVL1725
+	.4byte	0x5c36
+	.4byte	0x7f38
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37209,9 +37277,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1725
-	.4byte	0x6cf6
-	.4byte	0x7ed7
+	.8byte	.LVL1727
+	.4byte	0x6d71
+	.4byte	0x7f52
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37222,9 +37290,9 @@ __func__.7630:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1727
-	.4byte	0xa8ce
-	.4byte	0x7f01
+	.8byte	.LVL1729
+	.4byte	0xa949
+	.4byte	0x7f7c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37244,9 +37312,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1728
-	.4byte	0x3645
-	.4byte	0x7f19
+	.8byte	.LVL1730
+	.4byte	0x36c0
+	.4byte	0x7f94
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37255,8 +37323,8 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1730
-	.4byte	0xa8ce
+	.8byte	.LVL1732
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37279,15 +37347,15 @@ __func__.7630:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x7f59
+	.4byte	0x7fd4
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0xc
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x7f49
-	.uleb128 0x46
-	.4byte	.LASF837
+	.4byte	0x7fc4
+	.uleb128 0x49
+	.4byte	.LASF838
 	.byte	0x3
 	.2byte	0x32d
 	.4byte	0x5b
@@ -37295,62 +37363,62 @@ __func__.7630:
 	.8byte	.LFE214-.LFB214
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8184
-	.uleb128 0x5a
+	.4byte	0x81ff
+	.uleb128 0x5d
 	.string	"LUN"
 	.byte	0x3
 	.2byte	0x32d
 	.4byte	0xdbe
-	.4byte	.LLST423
-	.uleb128 0x50
-	.4byte	.LASF731
+	.4byte	.LLST425
+	.uleb128 0x53
+	.4byte	.LASF732
 	.byte	0x3
 	.2byte	0x32d
 	.4byte	0xdd4
-	.4byte	.LLST424
-	.uleb128 0x50
-	.4byte	.LASF732
+	.4byte	.LLST426
+	.uleb128 0x53
+	.4byte	.LASF733
 	.byte	0x3
 	.2byte	0x32d
 	.4byte	0xdd4
-	.4byte	.LLST425
-	.uleb128 0x50
-	.4byte	.LASF733
+	.4byte	.LLST427
+	.uleb128 0x53
+	.4byte	.LASF734
 	.byte	0x3
 	.2byte	0x32d
-	.4byte	0x5a77
-	.4byte	.LLST426
-	.uleb128 0x51
+	.4byte	0x5af2
+	.4byte	.LLST428
+	.uleb128 0x54
 	.string	"ret"
 	.byte	0x3
 	.2byte	0x32f
 	.4byte	0x5b
-	.4byte	.LLST427
-	.uleb128 0x52
-	.4byte	.LASF829
+	.4byte	.LLST429
+	.uleb128 0x55
+	.4byte	.LASF830
 	.byte	0x3
 	.2byte	0x330
 	.4byte	0xdd4
-	.4byte	.LLST428
-	.uleb128 0x52
-	.4byte	.LASF830
+	.4byte	.LLST430
+	.uleb128 0x55
+	.4byte	.LASF831
 	.byte	0x3
 	.2byte	0x330
 	.4byte	0xdd4
-	.4byte	.LLST429
-	.uleb128 0x52
-	.4byte	.LASF838
+	.4byte	.LLST431
+	.uleb128 0x55
+	.4byte	.LASF839
 	.byte	0x3
 	.2byte	0x330
 	.4byte	0xdd4
-	.4byte	.LLST430
-	.uleb128 0x51
+	.4byte	.LLST432
+	.uleb128 0x54
 	.string	"lpa"
 	.byte	0x3
 	.2byte	0x331
 	.4byte	0xdd4
-	.4byte	.LLST431
-	.uleb128 0x5e
+	.4byte	.LLST433
+	.uleb128 0x60
 	.string	"ppa"
 	.byte	0x3
 	.2byte	0x331
@@ -37358,69 +37426,69 @@ __func__.7630:
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -4
-	.uleb128 0x51
+	.uleb128 0x54
 	.string	"n"
 	.byte	0x3
 	.2byte	0x333
 	.4byte	0xdd4
-	.4byte	.LLST432
-	.uleb128 0x52
-	.4byte	.LASF593
+	.4byte	.LLST434
+	.uleb128 0x55
+	.4byte	.LASF596
 	.byte	0x3
 	.2byte	0x333
 	.4byte	0xdd4
-	.4byte	.LLST433
-	.uleb128 0x52
-	.4byte	.LASF831
+	.4byte	.LLST435
+	.uleb128 0x55
+	.4byte	.LASF832
 	.byte	0x3
 	.2byte	0x333
 	.4byte	0xdd4
-	.4byte	.LLST434
-	.uleb128 0x52
-	.4byte	.LASF839
+	.4byte	.LLST436
+	.uleb128 0x55
+	.4byte	.LASF840
 	.byte	0x3
 	.2byte	0x334
 	.4byte	0xdd4
-	.4byte	.LLST435
-	.uleb128 0x52
-	.4byte	.LASF840
+	.4byte	.LLST437
+	.uleb128 0x55
+	.4byte	.LASF841
 	.byte	0x3
 	.2byte	0x334
 	.4byte	0xdd4
-	.4byte	.LLST436
-	.uleb128 0x52
-	.4byte	.LASF841
+	.4byte	.LLST438
+	.uleb128 0x55
+	.4byte	.LASF842
 	.byte	0x3
 	.2byte	0x335
 	.4byte	0xdd4
-	.4byte	.LLST437
-	.uleb128 0x52
-	.4byte	.LASF842
+	.4byte	.LLST439
+	.uleb128 0x55
+	.4byte	.LASF843
 	.byte	0x3
 	.2byte	0x336
 	.4byte	0xdd4
-	.4byte	.LLST438
-	.uleb128 0x61
-	.8byte	.LBB293
-	.8byte	.LBE293-.LBB293
-	.4byte	0x80cd
-	.uleb128 0x52
-	.4byte	.LASF608
+	.4byte	.LLST440
+	.uleb128 0x63
+	.8byte	.LBB297
+	.8byte	.LBE297-.LBB297
+	.4byte	0x8148
+	.uleb128 0x55
+	.4byte	.LASF587
 	.byte	0x3
 	.2byte	0x37a
 	.4byte	0xdc9
-	.4byte	.LLST439
+	.4byte	.LLST441
 	.uleb128 0x45
-	.8byte	.LVL1975
-	.4byte	0x6cf6
+	.8byte	.LVL1977
+	.4byte	0x6d71
 	.uleb128 0x45
-	.8byte	.LVL1976
-	.4byte	0x2ef8
+	.8byte	.LVL1978
+	.4byte	0x2f73
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1933
-	.4byte	0x5955
-	.4byte	0x80f2
+	.8byte	.LVL1935
+	.4byte	0x59d0
+	.4byte	0x816d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37441,12 +37509,12 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1940
-	.4byte	0x7cda
+	.8byte	.LVL1942
+	.4byte	0x7d55
 	.uleb128 0x34
-	.8byte	.LVL1946
-	.4byte	0x2cb7
-	.4byte	0x811b
+	.8byte	.LVL1948
+	.4byte	0x2d32
+	.4byte	0x8196
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37459,9 +37527,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1947
-	.4byte	0x5bbb
-	.4byte	0x813f
+	.8byte	.LVL1949
+	.4byte	0x5c36
+	.4byte	0x81ba
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37481,9 +37549,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1952
+	.8byte	.LVL1954
 	.4byte	0x29a4
-	.4byte	0x815c
+	.4byte	0x81d7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37497,10 +37565,10 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1955
+	.8byte	.LVL1957
 	.4byte	0x2527
 	.uleb128 0x36
-	.8byte	.LVL1962
+	.8byte	.LVL1964
 	.4byte	0x259f
 	.uleb128 0x30
 	.uleb128 0x1
@@ -37515,8 +37583,8 @@ __func__.7630:
 	.2byte	0x200
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF843
+	.uleb128 0x49
+	.4byte	.LASF844
 	.byte	0x3
 	.2byte	0x325
 	.4byte	0x5b
@@ -37524,13 +37592,13 @@ __func__.7630:
 	.8byte	.LFE213-.LFB213
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x81b4
+	.4byte	0x822f
 	.uleb128 0x45
-	.8byte	.LVL1737
-	.4byte	0x81b4
+	.8byte	.LVL1739
+	.4byte	0x822f
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF844
+	.uleb128 0x49
+	.4byte	.LASF845
 	.byte	0x3
 	.2byte	0x31c
 	.4byte	0x5b
@@ -37538,17 +37606,17 @@ __func__.7630:
 	.8byte	.LFE212-.LFB212
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8215
+	.4byte	0x8290
 	.uleb128 0x45
-	.8byte	.LVL1733
-	.4byte	0x7cda
+	.8byte	.LVL1735
+	.4byte	0x7d55
 	.uleb128 0x45
-	.8byte	.LVL1734
-	.4byte	0x5ce8
+	.8byte	.LVL1736
+	.4byte	0x5d63
 	.uleb128 0x34
-	.8byte	.LVL1735
-	.4byte	0x58ed
-	.4byte	0x8207
+	.8byte	.LVL1737
+	.4byte	0x5968
+	.4byte	0x8282
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37556,11 +37624,11 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1736
-	.4byte	0x5619
+	.8byte	.LVL1738
+	.4byte	0x5694
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF845
+	.uleb128 0x49
+	.4byte	.LASF846
 	.byte	0x3
 	.2byte	0x2e6
 	.4byte	0x5b
@@ -37568,34 +37636,34 @@ __func__.7630:
 	.8byte	.LFE211-.LFB211
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8327
+	.4byte	0x83a2
 	.uleb128 0x2a
-	.4byte	.LASF846
+	.4byte	.LASF847
 	.byte	0x3
 	.2byte	0x2e8
-	.4byte	0x8327
+	.4byte	0x83a2
 	.uleb128 0xa
 	.byte	0x3
 	.8byte	g_nand_phy_info
 	.byte	0x9f
-	.uleb128 0x56
-	.4byte	.LASF847
+	.uleb128 0x59
+	.4byte	.LASF848
 	.byte	0x3
 	.2byte	0x2f3
 	.8byte	.LDL2
-	.uleb128 0x61
-	.8byte	.LBB302
-	.8byte	.LBE302-.LBB302
-	.4byte	0x829a
-	.uleb128 0x51
+	.uleb128 0x63
+	.8byte	.LBB306
+	.8byte	.LBE306-.LBB306
+	.4byte	0x8315
+	.uleb128 0x54
 	.string	"i"
 	.byte	0x3
 	.2byte	0x310
 	.4byte	0xdd4
-	.4byte	.LLST467
+	.4byte	.LLST469
 	.uleb128 0x36
-	.8byte	.LVL2172
-	.4byte	0x2cb7
+	.8byte	.LVL2174
+	.4byte	0x2d32
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37609,9 +37677,9 @@ __func__.7630:
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2164
-	.4byte	0xa8ce
-	.4byte	0x82c6
+	.8byte	.LVL2166
+	.4byte	0xa949
+	.4byte	0x8341
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37626,9 +37694,9 @@ __func__.7630:
 	.8byte	.LC70
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2165
-	.4byte	0x8aa4
-	.4byte	0x82e5
+	.8byte	.LVL2167
+	.4byte	0x8b1f
+	.4byte	0x8360
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37637,26 +37705,26 @@ __func__.7630:
 	.8byte	.LANCHOR0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2166
-	.4byte	0x87b0
-	.uleb128 0x45
-	.8byte	.LVL2167
-	.4byte	0x86d9
-	.uleb128 0x45
 	.8byte	.LVL2168
-	.4byte	0x6b5e
+	.4byte	0x882b
 	.uleb128 0x45
 	.8byte	.LVL2169
-	.4byte	0x70ac
+	.4byte	0x8754
 	.uleb128 0x45
 	.8byte	.LVL2170
-	.4byte	0x3f1d
+	.4byte	0x6bd9
+	.uleb128 0x45
+	.8byte	.LVL2171
+	.4byte	0x7127
+	.uleb128 0x45
+	.8byte	.LVL2172
+	.4byte	0x3f98
 	.byte	0
 	.uleb128 0x8
 	.byte	0x8
 	.4byte	0xee1
-	.uleb128 0x46
-	.4byte	.LASF848
+	.uleb128 0x49
+	.4byte	.LASF849
 	.byte	0x3
 	.2byte	0x26e
 	.4byte	0x5b
@@ -37664,57 +37732,57 @@ __func__.7630:
 	.8byte	.LFE210-.LFB210
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x84c7
-	.uleb128 0x52
-	.4byte	.LASF717
+	.4byte	0x8542
+	.uleb128 0x55
+	.4byte	.LASF718
 	.byte	0x3
 	.2byte	0x270
 	.4byte	0xdc9
-	.4byte	.LLST463
-	.uleb128 0x52
-	.4byte	.LASF849
+	.4byte	.LLST465
+	.uleb128 0x55
+	.4byte	.LASF850
 	.byte	0x3
 	.2byte	0x270
 	.4byte	0xdc9
-	.4byte	.LLST464
-	.uleb128 0x52
-	.4byte	.LASF850
+	.4byte	.LLST466
+	.uleb128 0x55
+	.4byte	.LASF851
 	.byte	0x3
 	.2byte	0x271
 	.4byte	0xdc9
-	.4byte	.LLST465
-	.uleb128 0x51
+	.4byte	.LLST467
+	.uleb128 0x54
 	.string	"i"
 	.byte	0x3
 	.2byte	0x272
 	.4byte	0xdc9
-	.4byte	.LLST466
-	.uleb128 0x56
-	.4byte	.LASF851
+	.4byte	.LLST468
+	.uleb128 0x59
+	.4byte	.LASF852
 	.byte	0x3
 	.2byte	0x2bc
-	.8byte	.L1635
-	.uleb128 0x56
-	.4byte	.LASF852
+	.8byte	.L1636
+	.uleb128 0x59
+	.4byte	.LASF853
 	.byte	0x3
 	.2byte	0x2cc
-	.8byte	.L1637
+	.8byte	.L1638
 	.uleb128 0x45
-	.8byte	.LVL2123
-	.4byte	0x6b5e
+	.8byte	.LVL2125
+	.4byte	0x6bd9
 	.uleb128 0x45
-	.8byte	.LVL2124
-	.4byte	0x70ac
+	.8byte	.LVL2126
+	.4byte	0x7127
 	.uleb128 0x45
-	.8byte	.LVL2125
-	.4byte	0x6dde
+	.8byte	.LVL2127
+	.4byte	0x6e59
 	.uleb128 0x45
-	.8byte	.LVL2133
-	.4byte	0x72c7
+	.8byte	.LVL2135
+	.4byte	0x7342
 	.uleb128 0x34
-	.8byte	.LVL2134
+	.8byte	.LVL2136
 	.4byte	0x259f
-	.4byte	0x83f8
+	.4byte	0x8473
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37722,9 +37790,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2136
+	.8byte	.LVL2138
 	.4byte	0x259f
-	.4byte	0x8410
+	.4byte	0x848b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37733,9 +37801,9 @@ __func__.7630:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2137
-	.4byte	0x4593
-	.4byte	0x8428
+	.8byte	.LVL2139
+	.4byte	0x460e
+	.4byte	0x84a3
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37744,9 +37812,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2143
-	.4byte	0x84c7
-	.4byte	0x843f
+	.8byte	.LVL2145
+	.4byte	0x8542
+	.4byte	0x84ba
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37754,15 +37822,15 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2148
-	.4byte	0x8b14
+	.8byte	.LVL2150
+	.4byte	0x8b8f
 	.uleb128 0x45
-	.8byte	.LVL2149
-	.4byte	0x6b5e
+	.8byte	.LVL2151
+	.4byte	0x6bd9
 	.uleb128 0x34
-	.8byte	.LVL2152
-	.4byte	0x84c7
-	.4byte	0x8470
+	.8byte	.LVL2154
+	.4byte	0x8542
+	.4byte	0x84eb
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37770,9 +37838,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2155
-	.4byte	0x84c7
-	.4byte	0x8487
+	.8byte	.LVL2157
+	.4byte	0x8542
+	.4byte	0x8502
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37780,9 +37848,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2159
-	.4byte	0x4593
-	.4byte	0x849f
+	.8byte	.LVL2161
+	.4byte	0x460e
+	.4byte	0x851a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37791,17 +37859,17 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2160
-	.4byte	0x6905
+	.8byte	.LVL2162
+	.4byte	0x6980
 	.uleb128 0x45
-	.8byte	.LVL2161
-	.4byte	0x5619
+	.8byte	.LVL2163
+	.4byte	0x5694
 	.uleb128 0x45
-	.8byte	.LVL2162
-	.4byte	0x3f1d
+	.8byte	.LVL2164
+	.4byte	0x3f98
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF853
+	.uleb128 0x49
+	.4byte	.LASF854
 	.byte	0x3
 	.2byte	0x20f
 	.4byte	0x5b
@@ -37809,76 +37877,76 @@ __func__.7630:
 	.8byte	.LFE209-.LFB209
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x86af
-	.uleb128 0x50
-	.4byte	.LASF717
+	.4byte	0x872a
+	.uleb128 0x53
+	.4byte	.LASF718
 	.byte	0x3
 	.2byte	0x20f
 	.4byte	0xdc9
-	.4byte	.LLST186
-	.uleb128 0x50
-	.4byte	.LASF854
+	.4byte	.LLST188
+	.uleb128 0x53
+	.4byte	.LASF855
 	.byte	0x3
 	.2byte	0x20f
 	.4byte	0xdbe
-	.4byte	.LLST187
-	.uleb128 0x52
-	.4byte	.LASF849
+	.4byte	.LLST189
+	.uleb128 0x55
+	.4byte	.LASF850
 	.byte	0x3
 	.2byte	0x211
 	.4byte	0xdc9
-	.4byte	.LLST188
-	.uleb128 0x52
+	.4byte	.LLST190
+	.uleb128 0x55
 	.4byte	.LASF569
 	.byte	0x3
 	.2byte	0x211
 	.4byte	0xdc9
-	.4byte	.LLST189
-	.uleb128 0x52
-	.4byte	.LASF592
+	.4byte	.LLST191
+	.uleb128 0x55
+	.4byte	.LASF595
 	.byte	0x3
 	.2byte	0x212
 	.4byte	0xdc9
-	.4byte	.LLST190
-	.uleb128 0x52
+	.4byte	.LLST192
+	.uleb128 0x55
 	.4byte	.LASF388
 	.byte	0x3
 	.2byte	0x212
 	.4byte	0xdc9
-	.4byte	.LLST191
-	.uleb128 0x52
-	.4byte	.LASF855
+	.4byte	.LLST193
+	.uleb128 0x55
+	.4byte	.LASF856
 	.byte	0x3
 	.2byte	0x213
 	.4byte	0xdc9
-	.4byte	.LLST192
-	.uleb128 0x52
-	.4byte	.LASF856
+	.4byte	.LLST194
+	.uleb128 0x55
+	.4byte	.LASF857
 	.byte	0x3
 	.2byte	0x214
 	.4byte	0xdc9
-	.4byte	.LLST193
-	.uleb128 0x52
-	.4byte	.LASF857
+	.4byte	.LLST195
+	.uleb128 0x55
+	.4byte	.LASF858
 	.byte	0x3
 	.2byte	0x215
 	.4byte	0xdc9
-	.4byte	.LLST194
-	.uleb128 0x52
-	.4byte	.LASF858
+	.4byte	.LLST196
+	.uleb128 0x55
+	.4byte	.LASF859
 	.byte	0x3
 	.2byte	0x216
 	.4byte	0xdc9
-	.4byte	.LLST195
-	.uleb128 0x56
-	.4byte	.LASF859
+	.4byte	.LLST197
+	.uleb128 0x59
+	.4byte	.LASF860
 	.byte	0x3
 	.2byte	0x240
-	.8byte	.L439
+	.8byte	.L440
 	.uleb128 0x34
-	.8byte	.LVL692
+	.8byte	.LVL694
 	.4byte	0x2721
-	.4byte	0x85b0
+	.4byte	0x862b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37886,12 +37954,12 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL695
-	.4byte	0x7574
+	.8byte	.LVL697
+	.4byte	0x75ef
 	.uleb128 0x34
-	.8byte	.LVL701
+	.8byte	.LVL703
 	.4byte	0x27e7
-	.4byte	0x85e0
+	.4byte	0x865b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37911,12 +37979,12 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL705
-	.4byte	0x7574
+	.8byte	.LVL707
+	.4byte	0x75ef
 	.uleb128 0x34
-	.8byte	.LVL709
-	.4byte	0x6a7f
-	.4byte	0x8604
+	.8byte	.LVL711
+	.4byte	0x6afa
+	.4byte	0x867f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37924,9 +37992,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL710
+	.8byte	.LVL712
 	.4byte	0x2721
-	.4byte	0x8622
+	.4byte	0x869d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37941,9 +38009,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL714
-	.4byte	0x6d91
-	.4byte	0x863a
+	.8byte	.LVL716
+	.4byte	0x6e0c
+	.4byte	0x86b5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37952,9 +38020,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL716
-	.4byte	0x86af
-	.4byte	0x8652
+	.8byte	.LVL718
+	.4byte	0x872a
+	.4byte	0x86cd
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37963,9 +38031,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL717
-	.4byte	0x74e5
-	.4byte	0x866a
+	.8byte	.LVL719
+	.4byte	0x7560
+	.4byte	0x86e5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37974,9 +38042,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL728
-	.4byte	0x6d91
-	.4byte	0x8682
+	.8byte	.LVL730
+	.4byte	0x6e0c
+	.4byte	0x86fd
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37985,9 +38053,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL730
-	.4byte	0x86af
-	.4byte	0x869a
+	.8byte	.LVL732
+	.4byte	0x872a
+	.4byte	0x8715
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37996,8 +38064,8 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL731
-	.4byte	0x74e5
+	.8byte	.LVL733
+	.4byte	0x7560
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38006,26 +38074,26 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x47
-	.4byte	.LASF860
+	.uleb128 0x4a
+	.4byte	.LASF861
 	.byte	0x3
 	.2byte	0x201
 	.4byte	0x5b
 	.byte	0x1
-	.4byte	0x86d9
-	.uleb128 0x48
+	.4byte	0x8754
+	.uleb128 0x4b
 	.4byte	.LASF388
 	.byte	0x3
 	.2byte	0x201
 	.4byte	0xdc9
-	.uleb128 0x49
-	.4byte	.LASF861
+	.uleb128 0x4c
+	.4byte	.LASF862
 	.byte	0x3
 	.2byte	0x203
 	.4byte	0xdc9
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF862
+	.uleb128 0x49
+	.4byte	.LASF863
 	.byte	0x3
 	.2byte	0x1ec
 	.4byte	0x5b
@@ -38033,11 +38101,11 @@ __func__.7630:
 	.8byte	.LFE207-.LFB207
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x87b0
+	.4byte	0x882b
 	.uleb128 0x34
-	.8byte	.LVL1108
+	.8byte	.LVL1110
 	.4byte	0x259f
-	.4byte	0x8712
+	.4byte	0x878d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -38045,9 +38113,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1109
+	.8byte	.LVL1111
 	.4byte	0x259f
-	.4byte	0x8729
+	.4byte	0x87a4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -38055,9 +38123,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1110
+	.8byte	.LVL1112
 	.4byte	0x259f
-	.4byte	0x8740
+	.4byte	0x87bb
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -38065,9 +38133,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1111
+	.8byte	.LVL1113
 	.4byte	0x259f
-	.4byte	0x876a
+	.4byte	0x87e5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38087,9 +38155,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1112
+	.8byte	.LVL1114
 	.4byte	0x259f
-	.4byte	0x8795
+	.4byte	0x8810
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38109,14 +38177,14 @@ __func__.7630:
 	.2byte	0x200
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1113
-	.4byte	0x361a
+	.8byte	.LVL1115
+	.4byte	0x3695
 	.uleb128 0x45
-	.8byte	.LVL1114
-	.4byte	0x4f10
+	.8byte	.LVL1116
+	.4byte	0x4f8b
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF863
+	.uleb128 0x49
+	.4byte	.LASF864
 	.byte	0x3
 	.2byte	0x116
 	.4byte	0x5b
@@ -38124,35 +38192,35 @@ __func__.7630:
 	.8byte	.LFE206-.LFB206
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8aa4
-	.uleb128 0x51
+	.4byte	0x8b1f
+	.uleb128 0x54
 	.string	"i"
 	.byte	0x3
 	.2byte	0x118
 	.4byte	0xdd4
-	.4byte	.LLST199
-	.uleb128 0x52
-	.4byte	.LASF864
+	.4byte	.LLST201
+	.uleb128 0x55
+	.4byte	.LASF865
 	.byte	0x3
 	.2byte	0x119
 	.4byte	0xdd4
-	.4byte	.LLST200
+	.4byte	.LLST202
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x722a
+	.4byte	0x72a5
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6105
+	.8byte	__func__.6104
 	.uleb128 0x45
-	.8byte	.LVL739
+	.8byte	.LVL741
 	.4byte	0x2c2b
 	.uleb128 0x45
-	.8byte	.LVL740
+	.8byte	.LVL742
 	.4byte	0x2c2b
 	.uleb128 0x34
-	.8byte	.LVL742
+	.8byte	.LVL744
 	.4byte	0x2c2b
-	.4byte	0x8835
+	.4byte	0x88b0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38161,9 +38229,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL743
+	.8byte	.LVL745
 	.4byte	0x2c2b
-	.4byte	0x884d
+	.4byte	0x88c8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38172,9 +38240,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL744
+	.8byte	.LVL746
 	.4byte	0x2c2b
-	.4byte	0x8865
+	.4byte	0x88e0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38183,9 +38251,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL745
+	.8byte	.LVL747
 	.4byte	0x2c2b
-	.4byte	0x887d
+	.4byte	0x88f8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38194,9 +38262,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL746
+	.8byte	.LVL748
 	.4byte	0x2c2b
-	.4byte	0x8895
+	.4byte	0x8910
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38205,9 +38273,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL749
+	.8byte	.LVL751
 	.4byte	0x2c2b
-	.4byte	0x88ad
+	.4byte	0x8928
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38216,9 +38284,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL750
+	.8byte	.LVL752
 	.4byte	0x2c2b
-	.4byte	0x88c5
+	.4byte	0x8940
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38227,9 +38295,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL751
+	.8byte	.LVL753
 	.4byte	0x2c2b
-	.4byte	0x88dd
+	.4byte	0x8958
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38238,12 +38306,12 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL752
+	.8byte	.LVL754
 	.4byte	0x2c2b
 	.uleb128 0x34
-	.8byte	.LVL753
+	.8byte	.LVL755
 	.4byte	0x2c2b
-	.4byte	0x8902
+	.4byte	0x897d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38252,9 +38320,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL754
+	.8byte	.LVL756
 	.4byte	0x2c2b
-	.4byte	0x891a
+	.4byte	0x8995
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38263,12 +38331,12 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL756
+	.8byte	.LVL758
 	.4byte	0x2c2b
 	.uleb128 0x34
-	.8byte	.LVL758
+	.8byte	.LVL760
 	.4byte	0x2c2b
-	.4byte	0x893f
+	.4byte	0x89ba
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38277,9 +38345,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL759
+	.8byte	.LVL761
 	.4byte	0x2c2b
-	.4byte	0x8959
+	.4byte	0x89d4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38290,18 +38358,18 @@ __func__.7630:
 	.byte	0x24
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL761
+	.8byte	.LVL763
 	.4byte	0x2c2b
 	.uleb128 0x45
-	.8byte	.LVL762
+	.8byte	.LVL764
 	.4byte	0x2c2b
 	.uleb128 0x45
-	.8byte	.LVL763
+	.8byte	.LVL765
 	.4byte	0x2c2b
 	.uleb128 0x34
-	.8byte	.LVL765
+	.8byte	.LVL767
 	.4byte	0x2c2b
-	.4byte	0x8998
+	.4byte	0x8a13
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38310,12 +38378,12 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL767
+	.8byte	.LVL769
 	.4byte	0x2c2b
 	.uleb128 0x34
-	.8byte	.LVL769
+	.8byte	.LVL771
 	.4byte	0x2c2b
-	.4byte	0x89bd
+	.4byte	0x8a38
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38324,9 +38392,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL770
+	.8byte	.LVL772
 	.4byte	0x2c2b
-	.4byte	0x89d5
+	.4byte	0x8a50
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38335,24 +38403,24 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL771
+	.8byte	.LVL773
 	.4byte	0x2c2b
 	.uleb128 0x45
-	.8byte	.LVL772
+	.8byte	.LVL774
 	.4byte	0x2c2b
 	.uleb128 0x45
-	.8byte	.LVL773
+	.8byte	.LVL775
 	.4byte	0x2c2b
 	.uleb128 0x45
-	.8byte	.LVL774
+	.8byte	.LVL776
 	.4byte	0x2c2b
 	.uleb128 0x45
-	.8byte	.LVL775
+	.8byte	.LVL777
 	.4byte	0x2c2b
 	.uleb128 0x34
-	.8byte	.LVL776
+	.8byte	.LVL778
 	.4byte	0x259f
-	.4byte	0x8a2d
+	.4byte	0x8aa8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -38360,26 +38428,26 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL778
+	.8byte	.LVL780
 	.4byte	0x2c2b
 	.uleb128 0x45
-	.8byte	.LVL780
+	.8byte	.LVL782
 	.4byte	0x2c2b
 	.uleb128 0x45
-	.8byte	.LVL783
+	.8byte	.LVL785
 	.4byte	0x2c2b
 	.uleb128 0x45
-	.8byte	.LVL786
+	.8byte	.LVL788
 	.4byte	0x2c2b
 	.uleb128 0x45
-	.8byte	.LVL789
+	.8byte	.LVL791
 	.4byte	0x2c2b
 	.uleb128 0x45
-	.8byte	.LVL793
+	.8byte	.LVL795
 	.4byte	0x2c2b
 	.uleb128 0x36
-	.8byte	.LVL796
-	.4byte	0xa8ce
+	.8byte	.LVL798
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38395,7 +38463,7 @@ __func__.7630:
 	.byte	0
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF865
+	.4byte	.LASF866
 	.byte	0x3
 	.byte	0xb6
 	.4byte	0x5b
@@ -38403,12 +38471,12 @@ __func__.7630:
 	.8byte	.LFE205-.LFB205
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8b14
+	.4byte	0x8b8f
 	.uleb128 0x2e
-	.4byte	.LASF846
+	.4byte	.LASF847
 	.byte	0x3
 	.byte	0xb6
-	.4byte	0x8327
+	.4byte	0x83a2
 	.4byte	.LLST8
 	.uleb128 0x33
 	.string	"i"
@@ -38418,11 +38486,11 @@ __func__.7630:
 	.4byte	.LLST9
 	.uleb128 0x45
 	.8byte	.LVL30
-	.4byte	0x8b5d
+	.4byte	0x8bd8
 	.uleb128 0x34
 	.8byte	.LVL31
-	.4byte	0x8b5d
-	.4byte	0x8b06
+	.4byte	0x8bd8
+	.4byte	0x8b81
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38432,10 +38500,10 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x45
 	.8byte	.LVL33
-	.4byte	0x8b14
+	.4byte	0x8b8f
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF866
+	.4byte	.LASF867
 	.byte	0x3
 	.byte	0xa4
 	.4byte	0x5b
@@ -38443,28 +38511,28 @@ __func__.7630:
 	.8byte	.LFE204-.LFB204
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8b45
+	.4byte	0x8bc0
 	.uleb128 0x2e
-	.4byte	.LASF867
+	.4byte	.LASF868
 	.byte	0x3
 	.byte	0xa4
 	.4byte	0xdc9
 	.4byte	.LLST7
 	.byte	0
-	.uleb128 0x63
-	.4byte	.LASF868
+	.uleb128 0x65
+	.4byte	.LASF869
 	.byte	0x3
 	.byte	0x9e
 	.byte	0x1
-	.4byte	0x8b5d
+	.4byte	0x8bd8
 	.uleb128 0x38
-	.4byte	.LASF869
+	.4byte	.LASF870
 	.byte	0x3
 	.byte	0x9e
 	.4byte	0xdd4
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF870
+	.4byte	.LASF871
 	.byte	0x3
 	.byte	0x7f
 	.4byte	0xdc9
@@ -38472,7 +38540,7 @@ __func__.7630:
 	.8byte	.LFE202-.LFB202
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8baa
+	.4byte	0x8c25
 	.uleb128 0x31
 	.string	"num"
 	.byte	0x3
@@ -38486,14 +38554,14 @@ __func__.7630:
 	.4byte	0xdc9
 	.4byte	.LLST5
 	.uleb128 0x32
-	.4byte	.LASF871
+	.4byte	.LASF872
 	.byte	0x3
 	.byte	0x82
 	.4byte	0xdd4
 	.4byte	.LLST6
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF872
+	.4byte	.LASF873
 	.byte	0x3
 	.byte	0x71
 	.4byte	0x5b
@@ -38501,7 +38569,7 @@ __func__.7630:
 	.8byte	.LFE201-.LFB201
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8c30
+	.4byte	0x8cab
 	.uleb128 0x2e
 	.4byte	.LASF299
 	.byte	0x3
@@ -38516,8 +38584,8 @@ __func__.7630:
 	.4byte	.LLST113
 	.uleb128 0x34
 	.8byte	.LVL470
-	.4byte	0xa8e4
-	.4byte	0x8c1b
+	.4byte	0xa96b
+	.4byte	0x8c96
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38539,7 +38607,7 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x36
 	.8byte	.LVL472
-	.4byte	0x8c30
+	.4byte	0x8cab
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38549,7 +38617,7 @@ __func__.7630:
 	.byte	0
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF873
+	.4byte	.LASF874
 	.byte	0x3
 	.byte	0xb
 	.4byte	0x5b
@@ -38557,7 +38625,7 @@ __func__.7630:
 	.8byte	.LFE200-.LFB200
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x96be
+	.4byte	0x9739
 	.uleb128 0x2e
 	.4byte	.LASF299
 	.byte	0x3
@@ -38576,20 +38644,20 @@ __func__.7630:
 	.byte	0xe
 	.4byte	0xfa
 	.4byte	.LLST109
-	.uleb128 0x61
-	.8byte	.LBB203
-	.8byte	.LBE203-.LBB203
-	.4byte	0x8cd8
+	.uleb128 0x63
+	.8byte	.LBB205
+	.8byte	.LBE205-.LBB205
+	.4byte	0x8d53
 	.uleb128 0x32
-	.4byte	.LASF608
+	.4byte	.LASF587
 	.byte	0x3
 	.byte	0x57
 	.4byte	0xdc9
 	.4byte	.LLST110
 	.uleb128 0x34
 	.8byte	.LVL455
-	.4byte	0x65c9
-	.4byte	0x8cb7
+	.4byte	0x6644
+	.4byte	0x8d32
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38598,7 +38666,7 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x36
 	.8byte	.LVL459
-	.4byte	0xa8e4
+	.4byte	0xa96b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38619,19 +38687,19 @@ __func__.7630:
 	.sleb128 -1
 	.byte	0
 	.byte	0
-	.uleb128 0x61
-	.8byte	.LBB204
-	.8byte	.LBE204-.LBB204
-	.4byte	0x8d1d
+	.uleb128 0x63
+	.8byte	.LBB206
+	.8byte	.LBE206-.LBB206
+	.4byte	0x8d98
 	.uleb128 0x32
-	.4byte	.LASF608
+	.4byte	.LASF587
 	.byte	0x3
 	.byte	0x60
 	.4byte	0xdc9
 	.4byte	.LLST111
 	.uleb128 0x36
 	.8byte	.LVL466
-	.4byte	0xa8e4
+	.4byte	0xa96b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38654,8 +38722,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL318
-	.4byte	0xa8e4
-	.4byte	0x8d42
+	.4byte	0xa96b
+	.4byte	0x8dbd
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38671,8 +38739,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL320
-	.4byte	0xa8e4
-	.4byte	0x8d67
+	.4byte	0xa96b
+	.4byte	0x8de2
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38688,8 +38756,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL322
-	.4byte	0xa8e4
-	.4byte	0x8d8c
+	.4byte	0xa96b
+	.4byte	0x8e07
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38705,8 +38773,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL324
-	.4byte	0xa8e4
-	.4byte	0x8db1
+	.4byte	0xa96b
+	.4byte	0x8e2c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38722,8 +38790,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL326
-	.4byte	0xa8e4
-	.4byte	0x8dd6
+	.4byte	0xa96b
+	.4byte	0x8e51
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38739,8 +38807,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL328
-	.4byte	0xa8e4
-	.4byte	0x8dfb
+	.4byte	0xa96b
+	.4byte	0x8e76
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38756,8 +38824,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL330
-	.4byte	0xa8e4
-	.4byte	0x8e20
+	.4byte	0xa96b
+	.4byte	0x8e9b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38773,8 +38841,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL332
-	.4byte	0xa8e4
-	.4byte	0x8e45
+	.4byte	0xa96b
+	.4byte	0x8ec0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38790,8 +38858,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL334
-	.4byte	0xa8e4
-	.4byte	0x8e6a
+	.4byte	0xa96b
+	.4byte	0x8ee5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38807,8 +38875,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL336
-	.4byte	0xa8e4
-	.4byte	0x8e8f
+	.4byte	0xa96b
+	.4byte	0x8f0a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38824,8 +38892,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL338
-	.4byte	0xa8e4
-	.4byte	0x8eb4
+	.4byte	0xa96b
+	.4byte	0x8f2f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38841,8 +38909,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL340
-	.4byte	0xa8e4
-	.4byte	0x8ed9
+	.4byte	0xa96b
+	.4byte	0x8f54
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38858,8 +38926,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL342
-	.4byte	0xa8e4
-	.4byte	0x8efe
+	.4byte	0xa96b
+	.4byte	0x8f79
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38875,8 +38943,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL344
-	.4byte	0xa8e4
-	.4byte	0x8f23
+	.4byte	0xa96b
+	.4byte	0x8f9e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38892,8 +38960,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL346
-	.4byte	0xa8e4
-	.4byte	0x8f48
+	.4byte	0xa96b
+	.4byte	0x8fc3
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38909,8 +38977,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL348
-	.4byte	0xa8e4
-	.4byte	0x8f6d
+	.4byte	0xa96b
+	.4byte	0x8fe8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38926,8 +38994,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL350
-	.4byte	0xa8e4
-	.4byte	0x8f92
+	.4byte	0xa96b
+	.4byte	0x900d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38943,8 +39011,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL352
-	.4byte	0xa8e4
-	.4byte	0x8fb7
+	.4byte	0xa96b
+	.4byte	0x9032
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38960,8 +39028,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL354
-	.4byte	0xa8e4
-	.4byte	0x8fdc
+	.4byte	0xa96b
+	.4byte	0x9057
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38977,8 +39045,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL356
-	.4byte	0xa8e4
-	.4byte	0x9001
+	.4byte	0xa96b
+	.4byte	0x907c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38994,8 +39062,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL358
-	.4byte	0xa8e4
-	.4byte	0x9026
+	.4byte	0xa96b
+	.4byte	0x90a1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39011,8 +39079,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL360
-	.4byte	0xa8e4
-	.4byte	0x904b
+	.4byte	0xa96b
+	.4byte	0x90c6
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39028,8 +39096,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL362
-	.4byte	0xa8e4
-	.4byte	0x9070
+	.4byte	0xa96b
+	.4byte	0x90eb
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39045,8 +39113,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL364
-	.4byte	0xa8e4
-	.4byte	0x9095
+	.4byte	0xa96b
+	.4byte	0x9110
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39062,8 +39130,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL366
-	.4byte	0xa8e4
-	.4byte	0x90ba
+	.4byte	0xa96b
+	.4byte	0x9135
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39079,8 +39147,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL368
-	.4byte	0xa8e4
-	.4byte	0x90df
+	.4byte	0xa96b
+	.4byte	0x915a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39096,8 +39164,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL370
-	.4byte	0xa8e4
-	.4byte	0x9104
+	.4byte	0xa96b
+	.4byte	0x917f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39113,8 +39181,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL372
-	.4byte	0xa8e4
-	.4byte	0x9129
+	.4byte	0xa96b
+	.4byte	0x91a4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39130,8 +39198,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL374
-	.4byte	0xa8e4
-	.4byte	0x914e
+	.4byte	0xa96b
+	.4byte	0x91c9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39147,8 +39215,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL376
-	.4byte	0xa8e4
-	.4byte	0x9173
+	.4byte	0xa96b
+	.4byte	0x91ee
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39164,8 +39232,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL378
-	.4byte	0xa8e4
-	.4byte	0x9198
+	.4byte	0xa96b
+	.4byte	0x9213
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39181,8 +39249,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL380
-	.4byte	0xa8e4
-	.4byte	0x91bd
+	.4byte	0xa96b
+	.4byte	0x9238
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39198,8 +39266,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL382
-	.4byte	0xa8e4
-	.4byte	0x91e2
+	.4byte	0xa96b
+	.4byte	0x925d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39215,8 +39283,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL384
-	.4byte	0xa8e4
-	.4byte	0x9207
+	.4byte	0xa96b
+	.4byte	0x9282
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39232,8 +39300,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL386
-	.4byte	0xa8e4
-	.4byte	0x922c
+	.4byte	0xa96b
+	.4byte	0x92a7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39249,8 +39317,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL388
-	.4byte	0xa8e4
-	.4byte	0x9251
+	.4byte	0xa96b
+	.4byte	0x92cc
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39266,8 +39334,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL390
-	.4byte	0xa8e4
-	.4byte	0x9276
+	.4byte	0xa96b
+	.4byte	0x92f1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39283,8 +39351,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL392
-	.4byte	0xa8e4
-	.4byte	0x929b
+	.4byte	0xa96b
+	.4byte	0x9316
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39300,8 +39368,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL394
-	.4byte	0xa8e4
-	.4byte	0x92c0
+	.4byte	0xa96b
+	.4byte	0x933b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39317,8 +39385,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL396
-	.4byte	0xa8e4
-	.4byte	0x92e5
+	.4byte	0xa96b
+	.4byte	0x9360
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39334,8 +39402,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL398
-	.4byte	0xa8e4
-	.4byte	0x930a
+	.4byte	0xa96b
+	.4byte	0x9385
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39351,8 +39419,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL400
-	.4byte	0xa8e4
-	.4byte	0x932f
+	.4byte	0xa96b
+	.4byte	0x93aa
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39368,8 +39436,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL402
-	.4byte	0xa8e4
-	.4byte	0x9354
+	.4byte	0xa96b
+	.4byte	0x93cf
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39385,8 +39453,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL404
-	.4byte	0xa8e4
-	.4byte	0x9379
+	.4byte	0xa96b
+	.4byte	0x93f4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39402,8 +39470,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL406
-	.4byte	0xa8e4
-	.4byte	0x939e
+	.4byte	0xa96b
+	.4byte	0x9419
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39419,8 +39487,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL408
-	.4byte	0xa8e4
-	.4byte	0x93c3
+	.4byte	0xa96b
+	.4byte	0x943e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39436,8 +39504,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL410
-	.4byte	0xa8e4
-	.4byte	0x93e8
+	.4byte	0xa96b
+	.4byte	0x9463
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39453,8 +39521,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL412
-	.4byte	0xa8e4
-	.4byte	0x940d
+	.4byte	0xa96b
+	.4byte	0x9488
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39470,8 +39538,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL414
-	.4byte	0xa8e4
-	.4byte	0x9432
+	.4byte	0xa96b
+	.4byte	0x94ad
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39487,8 +39555,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL416
-	.4byte	0xa8e4
-	.4byte	0x9457
+	.4byte	0xa96b
+	.4byte	0x94d2
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39504,8 +39572,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL418
-	.4byte	0xa8e4
-	.4byte	0x947c
+	.4byte	0xa96b
+	.4byte	0x94f7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39521,8 +39589,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL420
-	.4byte	0xa8e4
-	.4byte	0x94a1
+	.4byte	0xa96b
+	.4byte	0x951c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39538,8 +39606,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL422
-	.4byte	0xa8e4
-	.4byte	0x94c6
+	.4byte	0xa96b
+	.4byte	0x9541
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39555,8 +39623,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL424
-	.4byte	0xa8e4
-	.4byte	0x94eb
+	.4byte	0xa96b
+	.4byte	0x9566
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39572,8 +39640,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL426
-	.4byte	0xa8e4
-	.4byte	0x9510
+	.4byte	0xa96b
+	.4byte	0x958b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39589,8 +39657,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL428
-	.4byte	0xa8e4
-	.4byte	0x9535
+	.4byte	0xa96b
+	.4byte	0x95b0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39606,8 +39674,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL430
-	.4byte	0xa8e4
-	.4byte	0x955a
+	.4byte	0xa96b
+	.4byte	0x95d5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39623,8 +39691,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL432
-	.4byte	0xa8e4
-	.4byte	0x957f
+	.4byte	0xa96b
+	.4byte	0x95fa
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39640,8 +39708,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL434
-	.4byte	0xa8e4
-	.4byte	0x95a4
+	.4byte	0xa96b
+	.4byte	0x961f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39657,8 +39725,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL436
-	.4byte	0xa8e4
-	.4byte	0x95c9
+	.4byte	0xa96b
+	.4byte	0x9644
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39674,8 +39742,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL438
-	.4byte	0xa8e4
-	.4byte	0x95ee
+	.4byte	0xa96b
+	.4byte	0x9669
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39691,8 +39759,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL440
-	.4byte	0xa8e4
-	.4byte	0x9613
+	.4byte	0xa96b
+	.4byte	0x968e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39708,8 +39776,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL442
-	.4byte	0xa8e4
-	.4byte	0x9638
+	.4byte	0xa96b
+	.4byte	0x96b3
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39725,11 +39793,11 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x45
 	.8byte	.LVL444
-	.4byte	0x3e62
+	.4byte	0x3edd
 	.uleb128 0x34
 	.8byte	.LVL445
-	.4byte	0xa8e4
-	.4byte	0x966a
+	.4byte	0xa96b
+	.4byte	0x96e5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39745,11 +39813,11 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x45
 	.8byte	.LVL447
-	.4byte	0x3e01
+	.4byte	0x3e7c
 	.uleb128 0x34
 	.8byte	.LVL448
-	.4byte	0xa8e4
-	.4byte	0x969c
+	.4byte	0xa96b
+	.4byte	0x9717
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39765,7 +39833,7 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x36
 	.8byte	.LVL453
-	.4byte	0xa8e4
+	.4byte	0xa96b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39780,143 +39848,143 @@ __func__.7630:
 	.8byte	.LC67
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
+	.uleb128 0x6d
 	.4byte	0x2a9d
-	.8byte	.LFB348
-	.8byte	.LFE348-.LFB348
+	.8byte	.LFB349
+	.8byte	.LFE349-.LFB349
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9720
-	.uleb128 0x6c
+	.4byte	0x979b
+	.uleb128 0x6e
 	.4byte	0x2ab8
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x6c
+	.uleb128 0x6e
 	.4byte	0x2ac3
 	.uleb128 0x1
 	.byte	0x52
-	.uleb128 0x6d
+	.uleb128 0x6f
 	.4byte	0x2aad
-	.uleb128 0x6e
+	.uleb128 0x70
 	.4byte	0x2ace
 	.4byte	.LLST0
-	.uleb128 0x6f
+	.uleb128 0x71
 	.4byte	0x2ad9
-	.uleb128 0x6e
+	.uleb128 0x70
 	.4byte	0x2ae4
 	.4byte	.LLST1
-	.uleb128 0x70
+	.uleb128 0x72
 	.4byte	0x2aef
 	.uleb128 0x1
 	.byte	0x56
-	.uleb128 0x70
+	.uleb128 0x72
 	.4byte	0x2afa
 	.uleb128 0x1
 	.byte	0x54
-	.uleb128 0x6e
+	.uleb128 0x70
 	.4byte	0x2b05
 	.4byte	.LLST2
-	.uleb128 0x6f
+	.uleb128 0x71
 	.4byte	0x2b10
 	.byte	0
-	.uleb128 0x6b
-	.4byte	0x5398
-	.8byte	.LFB355
-	.8byte	.LFE355-.LFB355
+	.uleb128 0x6d
+	.4byte	0x5413
+	.8byte	.LFB356
+	.8byte	.LFE356-.LFB356
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9751
-	.uleb128 0x5c
-	.4byte	0x53a5
+	.4byte	0x97cc
+	.uleb128 0x47
+	.4byte	0x5420
 	.4byte	.LLST3
-	.uleb128 0x6c
-	.4byte	0x53b1
+	.uleb128 0x6e
+	.4byte	0x542c
 	.uleb128 0x6
 	.byte	0xfa
-	.4byte	0x53b1
+	.4byte	0x542c
 	.byte	0x9f
 	.byte	0
-	.uleb128 0x6b
-	.4byte	0x8b45
+	.uleb128 0x6d
+	.4byte	0x8bc0
 	.8byte	.LFB203
 	.8byte	.LFE203-.LFB203
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9774
-	.uleb128 0x6c
-	.4byte	0x8b51
+	.4byte	0x97ef
+	.uleb128 0x6e
+	.4byte	0x8bcc
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0
-	.uleb128 0x6b
-	.4byte	0x86af
+	.uleb128 0x6d
+	.4byte	0x872a
 	.8byte	.LFB208
 	.8byte	.LFE208-.LFB208
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x97b8
-	.uleb128 0x5c
-	.4byte	0x86c0
+	.4byte	0x9833
+	.uleb128 0x47
+	.4byte	0x873b
 	.4byte	.LLST10
-	.uleb128 0x6f
-	.4byte	0x86cc
 	.uleb128 0x71
+	.4byte	0x8747
+	.uleb128 0x73
 	.4byte	.Ldebug_ranges0+0
-	.uleb128 0x6d
-	.4byte	0x86c0
-	.uleb128 0x71
+	.uleb128 0x6f
+	.4byte	0x873b
+	.uleb128 0x73
 	.4byte	.Ldebug_ranges0+0
-	.uleb128 0x6e
-	.4byte	0x9798
+	.uleb128 0x70
+	.4byte	0x9813
 	.4byte	.LLST11
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x72
-	.4byte	0x74dd
+	.uleb128 0x74
+	.4byte	0x7558
 	.8byte	.LFB224
 	.8byte	.LFE224-.LFB224
 	.uleb128 0x1
 	.byte	0x9c
-	.uleb128 0x72
-	.4byte	0x6b52
+	.uleb128 0x74
+	.4byte	0x6bcd
 	.8byte	.LFB238
 	.8byte	.LFE238-.LFB238
 	.uleb128 0x1
 	.byte	0x9c
-	.uleb128 0x72
-	.4byte	0x6b46
+	.uleb128 0x74
+	.4byte	0x6bc1
 	.8byte	.LFB239
 	.8byte	.LFE239-.LFB239
 	.uleb128 0x1
 	.byte	0x9c
-	.uleb128 0x6b
-	.4byte	0x68bb
+	.uleb128 0x6d
+	.4byte	0x6936
 	.8byte	.LFB245
 	.8byte	.LFE245-.LFB245
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x98a0
-	.uleb128 0x5c
-	.4byte	0x68c7
+	.4byte	0x991b
+	.uleb128 0x47
+	.4byte	0x6942
 	.4byte	.LLST49
-	.uleb128 0x6f
-	.4byte	0x68d2
-	.uleb128 0x61
-	.8byte	.LBB177
-	.8byte	.LBE177-.LBB177
-	.4byte	0x988a
-	.uleb128 0x5c
-	.4byte	0x68c7
+	.uleb128 0x71
+	.4byte	0x694d
+	.uleb128 0x63
+	.8byte	.LBB179
+	.8byte	.LBE179-.LBB179
+	.4byte	0x9905
+	.uleb128 0x47
+	.4byte	0x6942
 	.4byte	.LLST50
-	.uleb128 0x66
-	.8byte	.LBB178
-	.8byte	.LBE178-.LBB178
-	.uleb128 0x6f
-	.4byte	0x9821
+	.uleb128 0x68
+	.8byte	.LBB180
+	.8byte	.LBE180-.LBB180
+	.uleb128 0x71
+	.4byte	0x989c
 	.uleb128 0x2f
 	.8byte	.LVL139
-	.4byte	0xa8ce
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39940,7 +40008,7 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x36
 	.8byte	.LVL137
-	.4byte	0x6821
+	.4byte	0x689c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39950,33 +40018,33 @@ __func__.7630:
 	.byte	0x50
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
-	.4byte	0x68e0
+	.uleb128 0x6d
+	.4byte	0x695b
 	.8byte	.LFB244
 	.8byte	.LFE244-.LFB244
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9943
-	.uleb128 0x5c
-	.4byte	0x68ec
+	.4byte	0x99be
+	.uleb128 0x47
+	.4byte	0x6967
 	.4byte	.LLST56
-	.uleb128 0x6f
-	.4byte	0x68f7
-	.uleb128 0x61
-	.8byte	.LBB181
-	.8byte	.LBE181-.LBB181
-	.4byte	0x992d
-	.uleb128 0x5c
-	.4byte	0x68ec
+	.uleb128 0x71
+	.4byte	0x6972
+	.uleb128 0x63
+	.8byte	.LBB183
+	.8byte	.LBE183-.LBB183
+	.4byte	0x99a8
+	.uleb128 0x47
+	.4byte	0x6967
 	.4byte	.LLST57
-	.uleb128 0x66
-	.8byte	.LBB182
-	.8byte	.LBE182-.LBB182
-	.uleb128 0x6f
-	.4byte	0x98c4
+	.uleb128 0x68
+	.8byte	.LBB184
+	.8byte	.LBE184-.LBB184
+	.uleb128 0x71
+	.4byte	0x993f
 	.uleb128 0x2f
 	.8byte	.LVL159
-	.4byte	0xa8ce
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40000,7 +40068,7 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x36
 	.8byte	.LVL157
-	.4byte	0x67a0
+	.4byte	0x681b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40010,68 +40078,68 @@ __func__.7630:
 	.byte	0x50
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
-	.4byte	0x654a
+	.uleb128 0x6d
+	.4byte	0x65c5
 	.8byte	.LFB252
 	.8byte	.LFE252-.LFB252
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9aa0
-	.uleb128 0x5c
-	.4byte	0x655b
+	.4byte	0x9b1b
+	.uleb128 0x47
+	.4byte	0x65d6
 	.4byte	.LLST70
-	.uleb128 0x6f
-	.4byte	0x6567
-	.uleb128 0x6f
-	.4byte	0x6573
-	.uleb128 0x6f
-	.4byte	0x657f
-	.uleb128 0x6f
-	.4byte	0x658b
-	.uleb128 0x6f
-	.4byte	0x6597
-	.uleb128 0x6f
-	.4byte	0x65a3
-	.uleb128 0x6f
-	.4byte	0x65af
-	.uleb128 0x6f
-	.4byte	0x65bb
-	.uleb128 0x66
-	.8byte	.LBB185
-	.8byte	.LBE185-.LBB185
-	.uleb128 0x5c
-	.4byte	0x655b
+	.uleb128 0x71
+	.4byte	0x65e2
+	.uleb128 0x71
+	.4byte	0x65ee
+	.uleb128 0x71
+	.4byte	0x65fa
+	.uleb128 0x71
+	.4byte	0x6606
+	.uleb128 0x71
+	.4byte	0x6612
+	.uleb128 0x71
+	.4byte	0x661e
+	.uleb128 0x71
+	.4byte	0x662a
+	.uleb128 0x71
+	.4byte	0x6636
+	.uleb128 0x68
+	.8byte	.LBB187
+	.8byte	.LBE187-.LBB187
+	.uleb128 0x47
+	.4byte	0x65d6
 	.4byte	.LLST71
-	.uleb128 0x66
-	.8byte	.LBB186
-	.8byte	.LBE186-.LBB186
-	.uleb128 0x6e
-	.4byte	0x9967
+	.uleb128 0x68
+	.8byte	.LBB188
+	.8byte	.LBE188-.LBB188
+	.uleb128 0x70
+	.4byte	0x99e2
 	.4byte	.LLST72
-	.uleb128 0x6e
-	.4byte	0x996c
+	.uleb128 0x70
+	.4byte	0x99e7
 	.4byte	.LLST73
-	.uleb128 0x6e
-	.4byte	0x9971
+	.uleb128 0x70
+	.4byte	0x99ec
 	.4byte	.LLST74
-	.uleb128 0x6e
-	.4byte	0x9976
+	.uleb128 0x70
+	.4byte	0x99f1
 	.4byte	.LLST75
-	.uleb128 0x6e
-	.4byte	0x997b
+	.uleb128 0x70
+	.4byte	0x99f6
 	.4byte	.LLST76
-	.uleb128 0x6e
-	.4byte	0x9980
+	.uleb128 0x70
+	.4byte	0x99fb
 	.4byte	.LLST77
-	.uleb128 0x6e
-	.4byte	0x9985
+	.uleb128 0x70
+	.4byte	0x9a00
 	.4byte	.LLST78
-	.uleb128 0x6f
-	.4byte	0x998a
+	.uleb128 0x71
+	.4byte	0x9a05
 	.uleb128 0x34
 	.8byte	.LVL205
-	.4byte	0xa8ce
-	.4byte	0x9a31
+	.4byte	0xa949
+	.4byte	0x9aac
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40093,8 +40161,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL213
-	.4byte	0x66e6
-	.4byte	0x9a56
+	.4byte	0x6761
+	.4byte	0x9ad1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40110,8 +40178,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL214
-	.4byte	0xa8ce
-	.4byte	0x9a89
+	.4byte	0xa949
+	.4byte	0x9b04
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40133,7 +40201,7 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x36
 	.8byte	.LVL215
-	.4byte	0x68bb
+	.4byte	0x6936
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40144,43 +40212,43 @@ __func__.7630:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
-	.4byte	0x6287
+	.uleb128 0x6d
+	.4byte	0x6302
 	.8byte	.LFB255
 	.8byte	.LFE255-.LFB255
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9b58
-	.uleb128 0x5c
-	.4byte	0x6298
+	.4byte	0x9bd3
+	.uleb128 0x47
+	.4byte	0x6313
 	.4byte	.LLST79
-	.uleb128 0x6e
-	.4byte	0x62a4
+	.uleb128 0x70
+	.4byte	0x631f
 	.4byte	.LLST80
-	.uleb128 0x6e
-	.4byte	0x62b0
+	.uleb128 0x70
+	.4byte	0x632b
 	.4byte	.LLST81
-	.uleb128 0x6f
-	.4byte	0x62bc
-	.uleb128 0x61
-	.8byte	.LBB189
-	.8byte	.LBE189-.LBB189
-	.4byte	0x9b4a
-	.uleb128 0x5c
-	.4byte	0x6298
+	.uleb128 0x71
+	.4byte	0x6337
+	.uleb128 0x63
+	.8byte	.LBB191
+	.8byte	.LBE191-.LBB191
+	.4byte	0x9bc5
+	.uleb128 0x47
+	.4byte	0x6313
 	.4byte	.LLST82
-	.uleb128 0x66
-	.8byte	.LBB190
-	.8byte	.LBE190-.LBB190
-	.uleb128 0x6f
-	.4byte	0x9ac4
-	.uleb128 0x6f
-	.4byte	0x9acd
-	.uleb128 0x6f
-	.4byte	0x9ad6
+	.uleb128 0x68
+	.8byte	.LBB192
+	.8byte	.LBE192-.LBB192
+	.uleb128 0x71
+	.4byte	0x9b3f
+	.uleb128 0x71
+	.4byte	0x9b48
+	.uleb128 0x71
+	.4byte	0x9b51
 	.uleb128 0x36
 	.8byte	.LVL221
-	.4byte	0xa8ce
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40204,53 +40272,53 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x45
 	.8byte	.LVL223
-	.4byte	0x6905
+	.4byte	0x6980
 	.byte	0
-	.uleb128 0x6b
-	.4byte	0x58c9
+	.uleb128 0x6d
+	.4byte	0x5944
 	.8byte	.LFB266
 	.8byte	.LFE266-.LFB266
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9b9e
-	.uleb128 0x5c
-	.4byte	0x58d6
+	.4byte	0x9c19
+	.uleb128 0x47
+	.4byte	0x5951
 	.4byte	.LLST86
-	.uleb128 0x73
-	.4byte	0x58e2
+	.uleb128 0x75
+	.4byte	0x595d
 	.byte	0
-	.uleb128 0x71
+	.uleb128 0x73
 	.4byte	.Ldebug_ranges0+0x60
-	.uleb128 0x6c
-	.4byte	0x58d6
+	.uleb128 0x6e
+	.4byte	0x5951
 	.uleb128 0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.uleb128 0x71
+	.uleb128 0x73
 	.4byte	.Ldebug_ranges0+0x60
-	.uleb128 0x6f
-	.4byte	0x9b7c
+	.uleb128 0x71
+	.4byte	0x9bf7
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
-	.4byte	0x5398
+	.uleb128 0x6d
+	.4byte	0x5413
 	.8byte	.LFB272
 	.8byte	.LFE272-.LFB272
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9bea
-	.uleb128 0x5c
-	.4byte	0x53a5
+	.4byte	0x9c65
+	.uleb128 0x47
+	.4byte	0x5420
 	.4byte	.LLST87
-	.uleb128 0x5c
-	.4byte	0x53b1
+	.uleb128 0x47
+	.4byte	0x542c
 	.4byte	.LLST88
 	.uleb128 0x2f
 	.8byte	.LVL257
-	.4byte	0x9720
+	.4byte	0x979b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40259,59 +40327,59 @@ __func__.7630:
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x3e
-	.4byte	0x53b1
+	.4byte	0x542c
 	.uleb128 0x3
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
-	.4byte	0x46ef
+	.uleb128 0x6d
+	.4byte	0x476a
 	.8byte	.LFB282
 	.8byte	.LFE282-.LFB282
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9c48
-	.uleb128 0x6c
-	.4byte	0x46fc
+	.4byte	0x9cc3
+	.uleb128 0x6e
+	.4byte	0x4777
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x6f
-	.4byte	0x4708
-	.uleb128 0x66
-	.8byte	.LBB201
-	.8byte	.LBE201-.LBB201
-	.uleb128 0x5c
-	.4byte	0x46fc
+	.uleb128 0x71
+	.4byte	0x4783
+	.uleb128 0x68
+	.8byte	.LBB203
+	.8byte	.LBE203-.LBB203
+	.uleb128 0x47
+	.4byte	0x4777
 	.4byte	.LLST93
-	.uleb128 0x66
-	.8byte	.LBB202
-	.8byte	.LBE202-.LBB202
-	.uleb128 0x6e
-	.4byte	0x9c0c
+	.uleb128 0x68
+	.8byte	.LBB204
+	.8byte	.LBE204-.LBB204
+	.uleb128 0x70
+	.4byte	0x9c87
 	.4byte	.LLST94
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
-	.4byte	0x3d17
+	.uleb128 0x6d
+	.4byte	0x3d92
 	.8byte	.LFB297
 	.8byte	.LFE297-.LFB297
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9c91
-	.uleb128 0x5c
-	.4byte	0x3d28
+	.4byte	0x9d0c
+	.uleb128 0x47
+	.4byte	0x3da3
 	.4byte	.LLST121
-	.uleb128 0x71
+	.uleb128 0x73
 	.4byte	.Ldebug_ranges0+0xa0
-	.uleb128 0x5c
-	.4byte	0x3d28
+	.uleb128 0x47
+	.4byte	0x3da3
 	.4byte	.LLST122
 	.uleb128 0x36
 	.8byte	.LVL504
-	.4byte	0x68e0
+	.4byte	0x695b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40322,67 +40390,67 @@ __func__.7630:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
-	.4byte	0x2e49
+	.uleb128 0x6d
+	.4byte	0x2ec4
 	.8byte	.LFB316
 	.8byte	.LFE316-.LFB316
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9cc7
+	.4byte	0x9d42
 	.uleb128 0x45
 	.8byte	.LVL576
-	.4byte	0x6cf6
+	.4byte	0x6d71
 	.uleb128 0x45
 	.8byte	.LVL577
-	.4byte	0x2ef8
+	.4byte	0x2f73
 	.byte	0
-	.uleb128 0x6b
-	.4byte	0x2d9f
+	.uleb128 0x6d
+	.4byte	0x2e1a
 	.8byte	.LFB318
 	.8byte	.LFE318-.LFB318
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9dc1
-	.uleb128 0x73
-	.4byte	0x2db0
+	.4byte	0x9e3c
+	.uleb128 0x75
+	.4byte	0x2e2b
 	.byte	0
-	.uleb128 0x6f
-	.4byte	0x2dbc
-	.uleb128 0x6f
-	.4byte	0x2dc6
-	.uleb128 0x6f
-	.4byte	0x2dd2
+	.uleb128 0x71
+	.4byte	0x2e37
+	.uleb128 0x71
+	.4byte	0x2e41
+	.uleb128 0x71
+	.4byte	0x2e4d
 	.uleb128 0x40
 	.4byte	.Ldebug_ranges0+0x130
-	.4byte	0x9d96
-	.uleb128 0x6f
-	.4byte	0x9ce2
-	.uleb128 0x6e
-	.4byte	0x9ce8
-	.4byte	.LLST251
+	.4byte	0x9e11
+	.uleb128 0x71
+	.4byte	0x9d5d
 	.uleb128 0x70
-	.4byte	0x9ced
+	.4byte	0x9d63
+	.4byte	.LLST253
+	.uleb128 0x72
+	.4byte	0x9d68
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -100
-	.uleb128 0x70
-	.4byte	0x9cf2
+	.uleb128 0x72
+	.4byte	0x9d6d
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -64
-	.uleb128 0x61
-	.8byte	.LBB230
-	.8byte	.LBE230-.LBB230
-	.4byte	0x9d7b
-	.uleb128 0x70
-	.4byte	0x2de3
+	.uleb128 0x63
+	.8byte	.LBB234
+	.8byte	.LBE234-.LBB234
+	.4byte	0x9df6
+	.uleb128 0x72
+	.4byte	0x2e5e
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -96
 	.uleb128 0x34
-	.8byte	.LVL966
+	.8byte	.LVL968
 	.4byte	0x29a4
-	.4byte	0x9d60
+	.4byte	0x9ddb
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40401,15 +40469,15 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL967
-	.4byte	0x6cf6
+	.8byte	.LVL969
+	.4byte	0x6d71
 	.uleb128 0x45
-	.8byte	.LVL968
-	.4byte	0x2ef8
+	.8byte	.LVL970
+	.4byte	0x2f73
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL965
-	.4byte	0x5bbb
+	.8byte	.LVL967
+	.4byte	0x5c36
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -40423,11 +40491,11 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.byte	0
-	.uleb128 0x66
-	.8byte	.LBB237
-	.8byte	.LBE237-.LBB237
-	.uleb128 0x70
-	.4byte	0x2df1
+	.uleb128 0x68
+	.8byte	.LBB241
+	.8byte	.LBE241-.LBB241
+	.uleb128 0x72
+	.4byte	0x2e6c
 	.uleb128 0x12
 	.byte	0x40
 	.byte	0x45
@@ -40442,51 +40510,51 @@ __func__.7630:
 	.byte	0x9f
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
+	.uleb128 0x6d
 	.4byte	0x26cd
-	.8byte	.LFB343
-	.8byte	.LFE343-.LFB343
+	.8byte	.LFB344
+	.8byte	.LFE344-.LFB344
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9ef5
-	.uleb128 0x5c
+	.4byte	0x9f70
+	.uleb128 0x47
 	.4byte	0x26dd
-	.4byte	.LLST297
-	.uleb128 0x73
+	.4byte	.LLST299
+	.uleb128 0x75
 	.4byte	0x26e8
 	.byte	0
-	.uleb128 0x6f
+	.uleb128 0x71
 	.4byte	0x26f3
-	.uleb128 0x6f
+	.uleb128 0x71
 	.4byte	0x26fe
-	.uleb128 0x66
-	.8byte	.LBB242
-	.8byte	.LBE242-.LBB242
-	.uleb128 0x5c
+	.uleb128 0x68
+	.8byte	.LBB246
+	.8byte	.LBE246-.LBB246
+	.uleb128 0x47
 	.4byte	0x26dd
-	.4byte	.LLST298
-	.uleb128 0x66
-	.8byte	.LBB243
-	.8byte	.LBE243-.LBB243
-	.uleb128 0x6f
-	.4byte	0x9de5
-	.uleb128 0x70
-	.4byte	0x9deb
+	.4byte	.LLST300
+	.uleb128 0x68
+	.8byte	.LBB247
+	.8byte	.LBE247-.LBB247
+	.uleb128 0x71
+	.4byte	0x9e60
+	.uleb128 0x72
+	.4byte	0x9e66
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -64
-	.uleb128 0x70
-	.4byte	0x9df0
+	.uleb128 0x72
+	.4byte	0x9e6b
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -96
-	.uleb128 0x74
+	.uleb128 0x76
 	.4byte	0x2709
 	.8byte	.LDL1
 	.uleb128 0x34
-	.8byte	.LVL1218
+	.8byte	.LVL1220
 	.4byte	0x259f
-	.4byte	0x9e68
+	.4byte	0x9ee3
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40507,9 +40575,9 @@ __func__.7630:
 	.byte	0x20
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1220
+	.8byte	.LVL1222
 	.4byte	0x259f
-	.4byte	0x9e8b
+	.4byte	0x9f06
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40529,9 +40597,9 @@ __func__.7630:
 	.byte	0x38
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1221
+	.8byte	.LVL1223
 	.4byte	0x2721
-	.4byte	0x9ead
+	.4byte	0x9f28
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40550,9 +40618,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1222
+	.8byte	.LVL1224
 	.4byte	0x27e7
-	.4byte	0x9ed4
+	.4byte	0x9f4f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40576,7 +40644,7 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1224
+	.8byte	.LVL1226
 	.4byte	0x2721
 	.uleb128 0x30
 	.uleb128 0x1
@@ -40598,51 +40666,51 @@ __func__.7630:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
-	.4byte	0x2dff
+	.uleb128 0x6d
+	.4byte	0x2e7a
 	.8byte	.LFB317
 	.8byte	.LFE317-.LFB317
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9fce
-	.uleb128 0x5c
-	.4byte	0x2e10
-	.4byte	.LLST318
-	.uleb128 0x6f
-	.4byte	0x2e1c
-	.uleb128 0x6f
-	.4byte	0x2e28
-	.uleb128 0x6f
-	.4byte	0x2e32
-	.uleb128 0x6f
-	.4byte	0x2e3c
+	.4byte	0xa049
+	.uleb128 0x47
+	.4byte	0x2e8b
+	.4byte	.LLST320
 	.uleb128 0x71
-	.4byte	.Ldebug_ranges0+0x1b0
-	.uleb128 0x6d
-	.4byte	0x2e10
+	.4byte	0x2e97
 	.uleb128 0x71
+	.4byte	0x2ea3
+	.uleb128 0x71
+	.4byte	0x2ead
+	.uleb128 0x71
+	.4byte	0x2eb7
+	.uleb128 0x73
+	.4byte	.Ldebug_ranges0+0x1b0
+	.uleb128 0x6f
+	.4byte	0x2e8b
+	.uleb128 0x73
 	.4byte	.Ldebug_ranges0+0x1b0
-	.uleb128 0x6e
-	.4byte	0x9f19
-	.4byte	.LLST319
 	.uleb128 0x70
-	.4byte	0x9f1e
+	.4byte	0x9f94
+	.4byte	.LLST321
+	.uleb128 0x72
+	.4byte	0x9f99
 	.uleb128 0x1
 	.byte	0x64
-	.uleb128 0x6e
-	.4byte	0x9f23
-	.4byte	.LLST320
 	.uleb128 0x70
-	.4byte	0x9f28
+	.4byte	0x9f9e
+	.4byte	.LLST322
+	.uleb128 0x72
+	.4byte	0x9fa3
 	.uleb128 0x1
 	.byte	0x6a
 	.uleb128 0x45
-	.8byte	.LVL1311
-	.4byte	0x2e49
+	.8byte	.LVL1313
+	.4byte	0x2ec4
 	.uleb128 0x34
-	.8byte	.LVL1314
-	.4byte	0x6d91
-	.4byte	0x9f81
+	.8byte	.LVL1316
+	.4byte	0x6e0c
+	.4byte	0x9ffc
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -40651,9 +40719,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1318
-	.4byte	0xa8ce
-	.4byte	0x9fa6
+	.8byte	.LVL1320
+	.4byte	0xa949
+	.4byte	0xa021
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40668,9 +40736,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1319
-	.4byte	0x7574
-	.4byte	0x9fbe
+	.8byte	.LVL1321
+	.4byte	0x75ef
+	.4byte	0xa039
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40679,39 +40747,39 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1320
-	.4byte	0x72c7
+	.8byte	.LVL1322
+	.4byte	0x7342
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
-	.4byte	0x3749
+	.uleb128 0x6d
+	.4byte	0x37c4
 	.8byte	.LFB301
 	.8byte	.LFE301-.LFB301
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0xa0f9
-	.uleb128 0x5c
-	.4byte	0x375a
-	.4byte	.LLST321
-	.uleb128 0x6f
-	.4byte	0x3766
-	.uleb128 0x61
-	.8byte	.LBB256
-	.8byte	.LBE256-.LBB256
-	.4byte	0xa0e4
-	.uleb128 0x5c
-	.4byte	0x375a
-	.4byte	.LLST322
-	.uleb128 0x66
-	.8byte	.LBB257
-	.8byte	.LBE257-.LBB257
-	.uleb128 0x6f
-	.4byte	0x9ff2
+	.4byte	0xa174
+	.uleb128 0x47
+	.4byte	0x37d5
+	.4byte	.LLST323
+	.uleb128 0x71
+	.4byte	0x37e1
+	.uleb128 0x63
+	.8byte	.LBB260
+	.8byte	.LBE260-.LBB260
+	.4byte	0xa15f
+	.uleb128 0x47
+	.4byte	0x37d5
+	.4byte	.LLST324
+	.uleb128 0x68
+	.8byte	.LBB261
+	.8byte	.LBE261-.LBB261
+	.uleb128 0x71
+	.4byte	0xa06d
 	.uleb128 0x34
-	.8byte	.LVL1329
-	.4byte	0x66e6
-	.4byte	0xa050
+	.8byte	.LVL1331
+	.4byte	0x6761
+	.4byte	0xa0cb
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40726,9 +40794,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1330
-	.4byte	0xa8ce
-	.4byte	0xa083
+	.8byte	.LVL1332
+	.4byte	0xa949
+	.4byte	0xa0fe
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40749,9 +40817,9 @@ __func__.7630:
 	.2byte	0xa88
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1331
-	.4byte	0x3d17
-	.4byte	0xa09b
+	.8byte	.LVL1333
+	.4byte	0x3d92
+	.4byte	0xa116
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40760,9 +40828,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1332
-	.4byte	0x2dff
-	.4byte	0xa0b3
+	.8byte	.LVL1334
+	.4byte	0x2e7a
+	.4byte	0xa12e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40771,8 +40839,8 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1333
-	.4byte	0xa8ce
+	.8byte	.LVL1335
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40795,8 +40863,8 @@ __func__.7630:
 	.byte	0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1336
-	.4byte	0x654a
+	.8byte	.LVL1338
+	.4byte	0x65c5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40805,38 +40873,38 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
-	.4byte	0x57c8
+	.uleb128 0x6d
+	.4byte	0x5843
 	.8byte	.LFB268
 	.8byte	.LFE268-.LFB268
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0xa1f2
-	.uleb128 0x71
+	.4byte	0xa26d
+	.uleb128 0x73
 	.4byte	.Ldebug_ranges0+0x1f0
-	.uleb128 0x6e
-	.4byte	0x57d6
-	.4byte	.LLST325
 	.uleb128 0x70
-	.4byte	0x57e2
+	.4byte	0x5851
+	.4byte	.LLST327
+	.uleb128 0x72
+	.4byte	0x585d
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -36
-	.uleb128 0x6e
-	.4byte	0x57ee
-	.4byte	.LLST326
 	.uleb128 0x70
-	.4byte	0x57fa
+	.4byte	0x5869
+	.4byte	.LLST328
+	.uleb128 0x72
+	.4byte	0x5875
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -32
-	.uleb128 0x6e
-	.4byte	0x5806
-	.4byte	.LLST327
+	.uleb128 0x70
+	.4byte	0x5881
+	.4byte	.LLST329
 	.uleb128 0x34
-	.8byte	.LVL1349
-	.4byte	0x5bbb
-	.4byte	0xa168
+	.8byte	.LVL1351
+	.4byte	0x5c36
+	.4byte	0xa1e3
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40856,9 +40924,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1351
+	.8byte	.LVL1353
 	.4byte	0x29a4
-	.4byte	0xa18b
+	.4byte	0xa206
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40877,9 +40945,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1355
+	.8byte	.LVL1357
 	.4byte	0x259f
-	.4byte	0xa1a3
+	.4byte	0xa21e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -40888,9 +40956,9 @@ __func__.7630:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1357
-	.4byte	0x3789
-	.4byte	0xa1bb
+	.8byte	.LVL1359
+	.4byte	0x3804
+	.4byte	0xa236
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40899,9 +40967,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1358
+	.8byte	.LVL1360
 	.4byte	0x27e7
-	.4byte	0xa1e3
+	.4byte	0xa25e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40925,20 +40993,20 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1359
-	.4byte	0x3645
+	.8byte	.LVL1361
+	.4byte	0x36c0
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
-	.4byte	0x4444
+	.uleb128 0x6d
+	.4byte	0x44bf
 	.8byte	.LFB286
 	.8byte	.LFE286-.LFB286
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0xa233
+	.4byte	0xa2ae
 	.uleb128 0x2f
-	.8byte	.LVL1619
-	.4byte	0x5a7d
+	.8byte	.LVL1621
+	.4byte	0x5af8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40957,17 +41025,17 @@ __func__.7630:
 	.8byte	.LANCHOR83
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
-	.4byte	0x53be
+	.uleb128 0x6d
+	.4byte	0x5439
 	.8byte	.LFB271
 	.8byte	.LFE271-.LFB271
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0xa2a6
+	.4byte	0xa321
 	.uleb128 0x34
-	.8byte	.LVL1656
-	.4byte	0x5955
-	.4byte	0xa266
+	.8byte	.LVL1658
+	.4byte	0x59d0
+	.4byte	0xa2e1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40976,9 +41044,9 @@ __func__.7630:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1657
-	.4byte	0xa8ce
-	.4byte	0xa292
+	.8byte	.LVL1659
+	.4byte	0xa949
+	.4byte	0xa30d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40993,7 +41061,7 @@ __func__.7630:
 	.8byte	.LC100
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1658
+	.8byte	.LVL1660
 	.4byte	0x259f
 	.uleb128 0x30
 	.uleb128 0x1
@@ -41002,17 +41070,17 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
-	.4byte	0x30c4
+	.uleb128 0x6d
+	.4byte	0x313f
 	.8byte	.LFB311
 	.8byte	.LFE311-.LFB311
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0xa30c
+	.4byte	0xa387
 	.uleb128 0x34
-	.8byte	.LVL1799
-	.4byte	0x30cd
-	.4byte	0xa2d9
+	.8byte	.LVL1801
+	.4byte	0x3148
+	.4byte	0xa354
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41021,9 +41089,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1800
-	.4byte	0x5814
-	.4byte	0xa2f8
+	.8byte	.LVL1802
+	.4byte	0x588f
+	.4byte	0xa373
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41032,8 +41100,8 @@ __func__.7630:
 	.8byte	.LANCHOR144
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1801
-	.4byte	0x32a5
+	.8byte	.LVL1803
+	.4byte	0x3320
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41041,103 +41109,103 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
-	.4byte	0x2cb7
+	.uleb128 0x6d
+	.4byte	0x2d32
 	.8byte	.LFB319
 	.8byte	.LFE319-.LFB319
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0xa6ce
-	.uleb128 0x5c
-	.4byte	0x2cc8
-	.4byte	.LLST411
-	.uleb128 0x5c
-	.4byte	0x2cd4
-	.4byte	.LLST412
-	.uleb128 0x73
-	.4byte	0x2ce0
-	.byte	0x1
-	.uleb128 0x6f
-	.4byte	0x2cec
-	.uleb128 0x6f
-	.4byte	0x2cf8
-	.uleb128 0x75
-	.4byte	0x2d04
-	.sleb128 -1
-	.uleb128 0x6f
-	.4byte	0x2d10
-	.uleb128 0x6f
-	.4byte	0x2d1c
-	.uleb128 0x6f
-	.4byte	0x2d28
-	.uleb128 0x6f
-	.4byte	0x2d34
-	.uleb128 0x6f
-	.4byte	0x2d40
-	.uleb128 0x6f
-	.4byte	0x2d4c
-	.uleb128 0x6f
-	.4byte	0x2d68
-	.uleb128 0x40
-	.4byte	.Ldebug_ranges0+0x2a0
-	.4byte	0xa6ba
-	.uleb128 0x5c
-	.4byte	0x2cd4
+	.4byte	0xa749
+	.uleb128 0x47
+	.4byte	0x2d43
 	.4byte	.LLST413
-	.uleb128 0x5c
-	.4byte	0x2cc8
+	.uleb128 0x47
+	.4byte	0x2d4f
 	.4byte	.LLST414
+	.uleb128 0x75
+	.4byte	0x2d5b
+	.byte	0x1
+	.uleb128 0x71
+	.4byte	0x2d67
+	.uleb128 0x71
+	.4byte	0x2d73
+	.uleb128 0x77
+	.4byte	0x2d7f
+	.sleb128 -1
+	.uleb128 0x71
+	.4byte	0x2d8b
 	.uleb128 0x71
+	.4byte	0x2d97
+	.uleb128 0x71
+	.4byte	0x2da3
+	.uleb128 0x71
+	.4byte	0x2daf
+	.uleb128 0x71
+	.4byte	0x2dbb
+	.uleb128 0x71
+	.4byte	0x2dc7
+	.uleb128 0x71
+	.4byte	0x2de3
+	.uleb128 0x40
 	.4byte	.Ldebug_ranges0+0x2a0
-	.uleb128 0x6f
-	.4byte	0xa339
-	.uleb128 0x6e
-	.4byte	0xa33f
+	.4byte	0xa735
+	.uleb128 0x47
+	.4byte	0x2d4f
 	.4byte	.LLST415
+	.uleb128 0x47
+	.4byte	0x2d43
+	.4byte	.LLST416
+	.uleb128 0x73
+	.4byte	.Ldebug_ranges0+0x2a0
+	.uleb128 0x71
+	.4byte	0xa3b4
 	.uleb128 0x70
-	.4byte	0xa344
+	.4byte	0xa3ba
+	.4byte	.LLST417
+	.uleb128 0x72
+	.4byte	0xa3bf
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -4
-	.uleb128 0x6f
-	.4byte	0xa349
-	.uleb128 0x6e
-	.4byte	0xa34f
-	.4byte	.LLST416
-	.uleb128 0x6e
-	.4byte	0xa354
-	.4byte	.LLST417
-	.uleb128 0x6e
-	.4byte	0xa359
+	.uleb128 0x71
+	.4byte	0xa3c4
+	.uleb128 0x70
+	.4byte	0xa3ca
 	.4byte	.LLST418
-	.uleb128 0x6e
-	.4byte	0xa35e
+	.uleb128 0x70
+	.4byte	0xa3cf
 	.4byte	.LLST419
-	.uleb128 0x6e
-	.4byte	0xa363
+	.uleb128 0x70
+	.4byte	0xa3d4
 	.4byte	.LLST420
-	.uleb128 0x6e
-	.4byte	0xa368
+	.uleb128 0x70
+	.4byte	0xa3d9
 	.4byte	.LLST421
-	.uleb128 0x76
-	.4byte	0x2d58
-	.uleb128 0x76
-	.4byte	0x2d60
-	.uleb128 0x6f
-	.4byte	0xa36d
+	.uleb128 0x70
+	.4byte	0xa3de
+	.4byte	.LLST422
+	.uleb128 0x70
+	.4byte	0xa3e3
+	.4byte	.LLST423
+	.uleb128 0x78
+	.4byte	0x2dd3
+	.uleb128 0x78
+	.4byte	0x2ddb
+	.uleb128 0x71
+	.4byte	0xa3e8
 	.uleb128 0x40
 	.4byte	.Ldebug_ranges0+0x2d0
-	.4byte	0xa46f
-	.uleb128 0x6e
-	.4byte	0x2d76
-	.4byte	.LLST422
+	.4byte	0xa4ea
+	.uleb128 0x70
+	.4byte	0x2df1
+	.4byte	.LLST424
 	.uleb128 0x45
-	.8byte	.LVL1834
-	.4byte	0x3d35
+	.8byte	.LVL1836
+	.4byte	0x3db0
 	.uleb128 0x34
-	.8byte	.LVL1837
-	.4byte	0x65c9
-	.4byte	0xa429
+	.8byte	.LVL1839
+	.4byte	0x6644
+	.4byte	0xa4a4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41146,9 +41214,9 @@ __func__.7630:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1840
-	.4byte	0x65c9
-	.4byte	0xa440
+	.8byte	.LVL1842
+	.4byte	0x6644
+	.4byte	0xa4bb
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41156,11 +41224,11 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1843
-	.4byte	0x2e49
+	.8byte	.LVL1845
+	.4byte	0x2ec4
 	.uleb128 0x36
-	.8byte	.LVL1852
-	.4byte	0xa8ce
+	.8byte	.LVL1854
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41176,12 +41244,12 @@ __func__.7630:
 	.byte	0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1864
-	.4byte	0x3534
+	.8byte	.LVL1866
+	.4byte	0x35af
 	.uleb128 0x34
-	.8byte	.LVL1865
-	.4byte	0x4593
-	.4byte	0xa494
+	.8byte	.LVL1867
+	.4byte	0x460e
+	.4byte	0xa50f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41190,9 +41258,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1867
-	.4byte	0x65c9
-	.4byte	0xa4ac
+	.8byte	.LVL1869
+	.4byte	0x6644
+	.4byte	0xa527
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41201,12 +41269,12 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1872
-	.4byte	0x2d9f
-	.uleb128 0x34
 	.8byte	.LVL1874
-	.4byte	0x65c9
-	.4byte	0xa4d0
+	.4byte	0x2e1a
+	.uleb128 0x34
+	.8byte	.LVL1876
+	.4byte	0x6644
+	.4byte	0xa54b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41214,9 +41282,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1876
-	.4byte	0x3645
-	.4byte	0xa4e8
+	.8byte	.LVL1878
+	.4byte	0x36c0
+	.4byte	0xa563
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41225,9 +41293,9 @@ __func__.7630:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1881
-	.4byte	0x3534
-	.4byte	0xa500
+	.8byte	.LVL1883
+	.4byte	0x35af
+	.4byte	0xa57b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41236,9 +41304,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1882
-	.4byte	0x3645
-	.4byte	0xa518
+	.8byte	.LVL1884
+	.4byte	0x36c0
+	.4byte	0xa593
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41247,9 +41315,9 @@ __func__.7630:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1883
-	.4byte	0xa8ce
-	.4byte	0xa54b
+	.8byte	.LVL1885
+	.4byte	0xa949
+	.4byte	0xa5c6
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41270,9 +41338,9 @@ __func__.7630:
 	.2byte	0x296
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1884
-	.4byte	0xa8ce
-	.4byte	0xa57e
+	.8byte	.LVL1886
+	.4byte	0xa949
+	.4byte	0xa5f9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41293,9 +41361,9 @@ __func__.7630:
 	.2byte	0x297
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1885
-	.4byte	0xa8ce
-	.4byte	0xa5b1
+	.8byte	.LVL1887
+	.4byte	0xa949
+	.4byte	0xa62c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41316,9 +41384,9 @@ __func__.7630:
 	.2byte	0x298
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1886
-	.4byte	0x4593
-	.4byte	0xa5c9
+	.8byte	.LVL1888
+	.4byte	0x460e
+	.4byte	0xa644
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41327,12 +41395,12 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1887
-	.4byte	0x2d9f
+	.8byte	.LVL1889
+	.4byte	0x2e1a
 	.uleb128 0x34
-	.8byte	.LVL1901
+	.8byte	.LVL1903
 	.4byte	0x29a4
-	.4byte	0xa5ee
+	.4byte	0xa669
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -41341,9 +41409,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1910
-	.4byte	0xa8ce
-	.4byte	0xa621
+	.8byte	.LVL1912
+	.4byte	0xa949
+	.4byte	0xa69c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41364,9 +41432,9 @@ __func__.7630:
 	.2byte	0x2bc
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1912
-	.4byte	0x5bbb
-	.4byte	0xa63f
+	.8byte	.LVL1914
+	.4byte	0x5c36
+	.4byte	0xa6ba
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -41380,12 +41448,12 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1913
-	.4byte	0x3012
+	.8byte	.LVL1915
+	.4byte	0x308d
 	.uleb128 0x34
-	.8byte	.LVL1914
-	.4byte	0x3572
-	.4byte	0xa66a
+	.8byte	.LVL1916
+	.4byte	0x35ed
+	.4byte	0xa6e5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41400,28 +41468,28 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1915
-	.4byte	0x2f4c
-	.uleb128 0x45
-	.8byte	.LVL1919
-	.4byte	0x2f4c
-	.uleb128 0x45
-	.8byte	.LVL1920
-	.4byte	0x3749
+	.8byte	.LVL1917
+	.4byte	0x2fc7
 	.uleb128 0x45
 	.8byte	.LVL1921
-	.4byte	0x7cda
+	.4byte	0x2fc7
 	.uleb128 0x45
 	.8byte	.LVL1922
-	.4byte	0x5ce8
+	.4byte	0x37c4
 	.uleb128 0x45
 	.8byte	.LVL1923
-	.4byte	0x5619
+	.4byte	0x7d55
+	.uleb128 0x45
+	.8byte	.LVL1924
+	.4byte	0x5d63
+	.uleb128 0x45
+	.8byte	.LVL1925
+	.4byte	0x5694
 	.byte	0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1847
-	.4byte	0x32a5
+	.8byte	.LVL1849
+	.4byte	0x3320
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41429,34 +41497,34 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
-	.4byte	0x3f1d
+	.uleb128 0x6d
+	.4byte	0x3f98
 	.8byte	.LFB292
 	.8byte	.LFE292-.LFB292
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0xa8ab
-	.uleb128 0x73
-	.4byte	0x3f2e
+	.4byte	0xa926
+	.uleb128 0x75
+	.4byte	0x3fa9
 	.byte	0
-	.uleb128 0x61
-	.8byte	.LBB300
-	.8byte	.LBE300-.LBB300
-	.4byte	0xa815
-	.uleb128 0x6f
-	.4byte	0xa6e9
-	.uleb128 0x61
-	.8byte	.LBB301
-	.8byte	.LBE301-.LBB301
-	.4byte	0xa728
-	.uleb128 0x6e
-	.4byte	0x3f39
-	.4byte	.LLST462
+	.uleb128 0x63
+	.8byte	.LBB304
+	.8byte	.LBE304-.LBB304
+	.4byte	0xa890
+	.uleb128 0x71
+	.4byte	0xa764
+	.uleb128 0x63
+	.8byte	.LBB305
+	.8byte	.LBE305-.LBB305
+	.4byte	0xa7a3
+	.uleb128 0x70
+	.4byte	0x3fb4
+	.4byte	.LLST464
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2107
-	.4byte	0x432b
-	.4byte	0xa740
+	.8byte	.LVL2109
+	.4byte	0x43a6
+	.4byte	0xa7bb
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41465,9 +41533,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2108
-	.4byte	0x432b
-	.4byte	0xa758
+	.8byte	.LVL2110
+	.4byte	0x43a6
+	.4byte	0xa7d3
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41476,9 +41544,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2110
-	.4byte	0x5814
-	.4byte	0xa777
+	.8byte	.LVL2112
+	.4byte	0x588f
+	.4byte	0xa7f2
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41487,9 +41555,9 @@ __func__.7630:
 	.8byte	.LANCHOR144
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2111
-	.4byte	0x5814
-	.4byte	0xa796
+	.8byte	.LVL2113
+	.4byte	0x588f
+	.4byte	0xa811
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41498,24 +41566,24 @@ __func__.7630:
 	.8byte	.LANCHOR149
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2112
-	.4byte	0x5ce8
+	.8byte	.LVL2114
+	.4byte	0x5d63
 	.uleb128 0x45
-	.8byte	.LVL2113
-	.4byte	0x5619
+	.8byte	.LVL2115
+	.4byte	0x5694
 	.uleb128 0x45
-	.8byte	.LVL2114
-	.4byte	0x5619
+	.8byte	.LVL2116
+	.4byte	0x5694
 	.uleb128 0x45
-	.8byte	.LVL2118
-	.4byte	0x2ef8
+	.8byte	.LVL2120
+	.4byte	0x2f73
 	.uleb128 0x45
-	.8byte	.LVL2119
-	.4byte	0x2ef8
+	.8byte	.LVL2121
+	.4byte	0x2f73
 	.uleb128 0x34
-	.8byte	.LVL2120
-	.4byte	0x38b7
-	.4byte	0xa7ef
+	.8byte	.LVL2122
+	.4byte	0x3932
+	.4byte	0xa86a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41524,9 +41592,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2121
-	.4byte	0x38b7
-	.4byte	0xa807
+	.8byte	.LVL2123
+	.4byte	0x3932
+	.4byte	0xa882
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41535,42 +41603,42 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2122
-	.4byte	0x41e2
+	.8byte	.LVL2124
+	.4byte	0x425d
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2094
-	.4byte	0x6b5e
-	.uleb128 0x45
-	.8byte	.LVL2095
-	.4byte	0x53cb
-	.uleb128 0x45
 	.8byte	.LVL2096
-	.4byte	0x5186
+	.4byte	0x6bd9
 	.uleb128 0x45
 	.8byte	.LVL2097
-	.4byte	0x4ec5
+	.4byte	0x5446
 	.uleb128 0x45
 	.8byte	.LVL2098
-	.4byte	0x4f6a
+	.4byte	0x5201
 	.uleb128 0x45
 	.8byte	.LVL2099
-	.4byte	0x43e3
+	.4byte	0x4f40
 	.uleb128 0x45
 	.8byte	.LVL2100
-	.4byte	0x53be
+	.4byte	0x4fe5
 	.uleb128 0x45
 	.8byte	.LVL2101
-	.4byte	0x69ea
+	.4byte	0x445e
 	.uleb128 0x45
 	.8byte	.LVL2102
-	.4byte	0x444d
+	.4byte	0x5439
 	.uleb128 0x45
 	.8byte	.LVL2103
-	.4byte	0x464b
-	.uleb128 0x36
+	.4byte	0x6a65
+	.uleb128 0x45
 	.8byte	.LVL2104
-	.4byte	0x58c9
+	.4byte	0x44c8
+	.uleb128 0x45
+	.8byte	.LVL2105
+	.4byte	0x46c6
+	.uleb128 0x36
+	.8byte	.LVL2106
+	.4byte	0x5944
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41578,34 +41646,39 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.byte	0
-	.uleb128 0x77
-	.4byte	.LASF874
-	.4byte	.LASF874
-	.byte	0xa
-	.byte	0x72
-	.uleb128 0x78
+	.uleb128 0x79
 	.4byte	.LASF875
 	.4byte	.LASF875
-	.byte	0x1b
-	.2byte	0x16d
-	.uleb128 0x78
+	.byte	0xb
+	.byte	0x72
+	.uleb128 0x7a
 	.4byte	.LASF876
 	.4byte	.LASF876
-	.byte	0x1b
-	.2byte	0x16c
-	.uleb128 0x77
+	.byte	0x1c
+	.2byte	0x16d
+	.uleb128 0x7a
 	.4byte	.LASF877
 	.4byte	.LASF877
-	.byte	0x1d
-	.byte	0x12
-	.uleb128 0x77
+	.byte	0x1c
+	.2byte	0x16c
+	.uleb128 0x79
 	.4byte	.LASF878
 	.4byte	.LASF878
-	.byte	0x1c
-	.byte	0x35
-	.uleb128 0x77
+	.byte	0x1d
+	.byte	0x12
+	.uleb128 0x79
 	.4byte	.LASF879
 	.4byte	.LASF879
+	.byte	0x6
+	.byte	0x35
+	.uleb128 0x7a
+	.4byte	.LASF880
+	.4byte	.LASF880
+	.byte	0x1c
+	.2byte	0x399
+	.uleb128 0x79
+	.4byte	.LASF881
+	.4byte	.LASF881
 	.byte	0x1e
 	.byte	0x6d
 	.byte	0
@@ -42539,6 +42612,47 @@ __func__.7630:
 	.byte	0
 	.byte	0
 	.uleb128 0x46
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x47
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x48
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x20
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x49
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -42565,7 +42679,7 @@ __func__.7630:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x47
+	.uleb128 0x4a
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -42586,7 +42700,7 @@ __func__.7630:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x48
+	.uleb128 0x4b
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -42599,7 +42713,7 @@ __func__.7630:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x49
+	.uleb128 0x4c
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -42612,7 +42726,7 @@ __func__.7630:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4a
+	.uleb128 0x4d
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -42625,7 +42739,7 @@ __func__.7630:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4b
+	.uleb128 0x4e
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x3
@@ -42636,7 +42750,7 @@ __func__.7630:
 	.uleb128 0x5
 	.byte	0
 	.byte	0
-	.uleb128 0x4c
+	.uleb128 0x4f
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -42649,19 +42763,19 @@ __func__.7630:
 	.uleb128 0xe
 	.byte	0
 	.byte	0
-	.uleb128 0x4d
+	.uleb128 0x50
 	.uleb128 0xb
 	.byte	0x1
 	.byte	0
 	.byte	0
-	.uleb128 0x4e
+	.uleb128 0x51
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x1
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4f
+	.uleb128 0x52
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -42680,7 +42794,7 @@ __func__.7630:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x50
+	.uleb128 0x53
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -42695,7 +42809,7 @@ __func__.7630:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x51
+	.uleb128 0x54
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -42710,7 +42824,7 @@ __func__.7630:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x52
+	.uleb128 0x55
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -42725,7 +42839,7 @@ __func__.7630:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x53
+	.uleb128 0x56
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -42742,7 +42856,7 @@ __func__.7630:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x54
+	.uleb128 0x57
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -42757,7 +42871,7 @@ __func__.7630:
 	.uleb128 0xd
 	.byte	0
 	.byte	0
-	.uleb128 0x55
+	.uleb128 0x58
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x3
@@ -42768,7 +42882,7 @@ __func__.7630:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x56
+	.uleb128 0x59
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x3
@@ -42781,7 +42895,7 @@ __func__.7630:
 	.uleb128 0x1
 	.byte	0
 	.byte	0
-	.uleb128 0x57
+	.uleb128 0x5a
 	.uleb128 0x4109
 	.byte	0
 	.uleb128 0x11
@@ -42792,7 +42906,7 @@ __func__.7630:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x58
+	.uleb128 0x5b
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -42807,7 +42921,7 @@ __func__.7630:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x59
+	.uleb128 0x5c
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -42822,7 +42936,7 @@ __func__.7630:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x5a
+	.uleb128 0x5d
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -42837,7 +42951,7 @@ __func__.7630:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x5b
+	.uleb128 0x5e
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -42854,16 +42968,7 @@ __func__.7630:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x5c
-	.uleb128 0x5
-	.byte	0
-	.uleb128 0x31
-	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x17
-	.byte	0
-	.byte	0
-	.uleb128 0x5d
+	.uleb128 0x5f
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -42888,7 +42993,7 @@ __func__.7630:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x5e
+	.uleb128 0x60
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -42903,7 +43008,7 @@ __func__.7630:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x5f
+	.uleb128 0x61
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -42918,7 +43023,7 @@ __func__.7630:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x60
+	.uleb128 0x62
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -42937,7 +43042,7 @@ __func__.7630:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x61
+	.uleb128 0x63
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x11
@@ -42948,7 +43053,7 @@ __func__.7630:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x62
+	.uleb128 0x64
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -42963,7 +43068,7 @@ __func__.7630:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x63
+	.uleb128 0x65
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -42982,7 +43087,7 @@ __func__.7630:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x64
+	.uleb128 0x66
 	.uleb128 0x1d
 	.byte	0
 	.uleb128 0x31
@@ -42997,7 +43102,7 @@ __func__.7630:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x65
+	.uleb128 0x67
 	.uleb128 0x1d
 	.byte	0
 	.uleb128 0x31
@@ -43012,7 +43117,7 @@ __func__.7630:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x66
+	.uleb128 0x68
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x11
@@ -43021,7 +43126,7 @@ __func__.7630:
 	.uleb128 0x7
 	.byte	0
 	.byte	0
-	.uleb128 0x67
+	.uleb128 0x69
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -43040,7 +43145,7 @@ __func__.7630:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x68
+	.uleb128 0x6a
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -43051,7 +43156,7 @@ __func__.7630:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x69
+	.uleb128 0x6b
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -43068,7 +43173,7 @@ __func__.7630:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x6a
+	.uleb128 0x6c
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -43093,7 +43198,7 @@ __func__.7630:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
+	.uleb128 0x6d
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x31
@@ -43110,7 +43215,7 @@ __func__.7630:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x6c
+	.uleb128 0x6e
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
@@ -43119,14 +43224,14 @@ __func__.7630:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x6d
+	.uleb128 0x6f
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x6e
+	.uleb128 0x70
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -43135,14 +43240,14 @@ __func__.7630:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x6f
+	.uleb128 0x71
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x70
+	.uleb128 0x72
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -43151,14 +43256,14 @@ __func__.7630:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x71
+	.uleb128 0x73
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x55
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x72
+	.uleb128 0x74
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x31
@@ -43173,7 +43278,7 @@ __func__.7630:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x73
+	.uleb128 0x75
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -43182,7 +43287,7 @@ __func__.7630:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x74
+	.uleb128 0x76
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x31
@@ -43191,7 +43296,7 @@ __func__.7630:
 	.uleb128 0x1
 	.byte	0
 	.byte	0
-	.uleb128 0x75
+	.uleb128 0x77
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -43200,14 +43305,14 @@ __func__.7630:
 	.uleb128 0xd
 	.byte	0
 	.byte	0
-	.uleb128 0x76
+	.uleb128 0x78
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x77
+	.uleb128 0x79
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -43224,7 +43329,7 @@ __func__.7630:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x78
+	.uleb128 0x7a
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -43244,13 +43349,13 @@ __func__.7630:
 	.byte	0
 	.section	.debug_loc,"",@progbits
 .Ldebug_loc0:
-.LLST468:
-	.8byte	.LVL2175
-	.8byte	.LVL2176-1
+.LLST470:
+	.8byte	.LVL2177
+	.8byte	.LVL2178-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2176-1
-	.8byte	.LFE347
+	.8byte	.LVL2178-1
+	.8byte	.LFE348
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -43258,13 +43363,13 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST469:
-	.8byte	.LVL2175
-	.8byte	.LVL2176-1
+.LLST471:
+	.8byte	.LVL2177
+	.8byte	.LVL2178-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL2176-1
-	.8byte	.LFE347
+	.8byte	.LVL2178-1
+	.8byte	.LFE348
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -43272,13 +43377,13 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST470:
-	.8byte	.LVL2175
-	.8byte	.LVL2176-1
+.LLST472:
+	.8byte	.LVL2177
+	.8byte	.LVL2178-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL2176-1
-	.8byte	.LFE347
+	.8byte	.LVL2178-1
+	.8byte	.LFE348
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -43286,13 +43391,13 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST303:
-	.8byte	.LVL1240
-	.8byte	.LVL1241-1
+.LLST305:
+	.8byte	.LVL1242
+	.8byte	.LVL1243-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1241-1
-	.8byte	.LFE346
+	.8byte	.LVL1243-1
+	.8byte	.LFE347
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -43300,13 +43405,13 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST304:
-	.8byte	.LVL1240
-	.8byte	.LVL1241-1
+.LLST306:
+	.8byte	.LVL1242
+	.8byte	.LVL1243-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1241-1
-	.8byte	.LFE346
+	.8byte	.LVL1243-1
+	.8byte	.LFE347
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -43314,13 +43419,13 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST305:
-	.8byte	.LVL1240
-	.8byte	.LVL1241-1
+.LLST307:
+	.8byte	.LVL1242
+	.8byte	.LVL1243-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1241-1
-	.8byte	.LFE346
+	.8byte	.LVL1243-1
+	.8byte	.LFE347
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -43328,13 +43433,13 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST196:
-	.8byte	.LVL737
-	.8byte	.LVL738-1
+.LLST198:
+	.8byte	.LVL739
+	.8byte	.LVL740-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL738-1
-	.8byte	.LFE345
+	.8byte	.LVL740-1
+	.8byte	.LFE346
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -43342,13 +43447,13 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST197:
-	.8byte	.LVL737
-	.8byte	.LVL738-1
+.LLST199:
+	.8byte	.LVL739
+	.8byte	.LVL740-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL738-1
-	.8byte	.LFE345
+	.8byte	.LVL740-1
+	.8byte	.LFE346
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -43356,13 +43461,13 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST198:
-	.8byte	.LVL737
-	.8byte	.LVL738-1
+.LLST200:
+	.8byte	.LVL739
+	.8byte	.LVL740-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL738-1
-	.8byte	.LFE345
+	.8byte	.LVL740-1
+	.8byte	.LFE346
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -43370,90 +43475,90 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST299:
-	.8byte	.LVL1226
-	.8byte	.LVL1228-1
+.LLST301:
+	.8byte	.LVL1228
+	.8byte	.LVL1230-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1228-1
-	.8byte	.LVL1236
+	.8byte	.LVL1230-1
+	.8byte	.LVL1238
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1236
-	.8byte	.LVL1237
+	.8byte	.LVL1238
+	.8byte	.LVL1239
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1237
-	.8byte	.LFE344
+	.8byte	.LVL1239
+	.8byte	.LFE345
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST300:
-	.8byte	.LVL1226
-	.8byte	.LVL1227
+.LLST302:
+	.8byte	.LVL1228
+	.8byte	.LVL1229
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1227
-	.8byte	.LVL1236
+	.8byte	.LVL1229
+	.8byte	.LVL1238
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1236
-	.8byte	.LVL1237
+	.8byte	.LVL1238
+	.8byte	.LVL1239
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL1237
-	.8byte	.LFE344
+	.8byte	.LVL1239
+	.8byte	.LFE345
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST301:
-	.8byte	.LVL1230
-	.8byte	.LVL1231
-	.2byte	0x1
-	.byte	0x50
+.LLST303:
 	.8byte	.LVL1232
 	.8byte	.LVL1233
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1234
+	.8byte	.LVL1235
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1233
-	.8byte	.LFE344
+	.8byte	.LVL1235
+	.8byte	.LFE345
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST302:
-	.8byte	.LVL1234
-	.8byte	.LVL1235
-	.2byte	0x1
-	.byte	0x51
+.LLST304:
+	.8byte	.LVL1236
 	.8byte	.LVL1237
-	.8byte	.LVL1238
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1238
 	.8byte	.LVL1239
+	.8byte	.LVL1240
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1240
+	.8byte	.LVL1241
 	.2byte	0x3
 	.byte	0x71
 	.sleb128 1
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST175:
-	.8byte	.LVL662
-	.8byte	.LVL666
+.LLST177:
+	.8byte	.LVL664
+	.8byte	.LVL668
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL666
-	.8byte	.LFE342
+	.8byte	.LVL668
+	.8byte	.LFE343
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -43461,13 +43566,13 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST176:
-	.8byte	.LVL662
-	.8byte	.LVL663
+.LLST178:
+	.8byte	.LVL664
+	.8byte	.LVL665
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL663
-	.8byte	.LFE342
+	.8byte	.LVL665
+	.8byte	.LFE343
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -43475,13 +43580,13 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST177:
-	.8byte	.LVL662
+.LLST179:
 	.8byte	.LVL664
+	.8byte	.LVL666
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL664
-	.8byte	.LFE342
+	.8byte	.LVL666
+	.8byte	.LFE343
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -43489,19 +43594,15 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST178:
-	.8byte	.LVL665
-	.8byte	.LVL666
+.LLST180:
+	.8byte	.LVL667
+	.8byte	.LVL668
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST179:
-	.8byte	.LVL670
-	.8byte	.LVL671
-	.2byte	0x1
-	.byte	0x50
+.LLST181:
 	.8byte	.LVL672
 	.8byte	.LVL673
 	.2byte	0x1
@@ -43510,15 +43611,19 @@ __func__.7630:
 	.8byte	.LVL675
 	.2byte	0x1
 	.byte	0x50
+	.8byte	.LVL676
+	.8byte	.LVL677
+	.2byte	0x1
+	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST180:
-	.8byte	.LVL662
-	.8byte	.LVL666
+.LLST182:
+	.8byte	.LVL664
+	.8byte	.LVL668
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL666
-	.8byte	.LFE342
+	.8byte	.LVL668
+	.8byte	.LFE343
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -43526,57 +43631,57 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST181:
-	.8byte	.LVL665
+.LLST183:
 	.8byte	.LVL667
+	.8byte	.LVL669
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL668
-	.8byte	.LFE342
+	.8byte	.LVL670
+	.8byte	.LFE343
 	.2byte	0x1
 	.byte	0x67
 	.8byte	0
 	.8byte	0
-.LLST167:
-	.8byte	.LVL638
-	.8byte	.LVL643
+.LLST169:
+	.8byte	.LVL640
+	.8byte	.LVL645
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL643
-	.8byte	.LVL644
+	.8byte	.LVL645
+	.8byte	.LVL646
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL644
-	.8byte	.LVL647
+	.8byte	.LVL646
+	.8byte	.LVL649
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL647
-	.8byte	.LVL656
+	.8byte	.LVL649
+	.8byte	.LVL658
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL656
-	.8byte	.LVL661
+	.8byte	.LVL658
+	.8byte	.LVL663
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL661
-	.8byte	.LFE341
+	.8byte	.LVL663
+	.8byte	.LFE342
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST168:
-	.8byte	.LVL638
-	.8byte	.LVL639
+.LLST170:
+	.8byte	.LVL640
+	.8byte	.LVL641
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL639
-	.8byte	.LFE341
+	.8byte	.LVL641
+	.8byte	.LFE342
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -43584,74 +43689,70 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST169:
-	.8byte	.LVL638
+.LLST171:
 	.8byte	.LVL640
+	.8byte	.LVL642
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL640
-	.8byte	.LVL645
+	.8byte	.LVL642
+	.8byte	.LVL647
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL645
 	.8byte	.LVL647
+	.8byte	.LVL649
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x52
 	.byte	0x9f
-	.8byte	.LVL647
-	.8byte	.LFE341
+	.8byte	.LVL649
+	.8byte	.LFE342
 	.2byte	0x1
 	.byte	0x69
 	.8byte	0
 	.8byte	0
-.LLST170:
-	.8byte	.LVL638
-	.8byte	.LVL641
+.LLST172:
+	.8byte	.LVL640
+	.8byte	.LVL643
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL641
-	.8byte	.LVL644
+	.8byte	.LVL643
+	.8byte	.LVL646
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL644
-	.8byte	.LVL647
+	.8byte	.LVL646
+	.8byte	.LVL649
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x53
 	.byte	0x9f
-	.8byte	.LVL647
-	.8byte	.LVL656
+	.8byte	.LVL649
+	.8byte	.LVL658
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL656
-	.8byte	.LVL661
+	.8byte	.LVL658
+	.8byte	.LVL663
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x53
 	.byte	0x9f
-	.8byte	.LVL661
-	.8byte	.LFE341
+	.8byte	.LVL663
+	.8byte	.LFE342
 	.2byte	0x1
 	.byte	0x6a
 	.8byte	0
 	.8byte	0
-.LLST171:
-	.8byte	.LVL642
-	.8byte	.LVL643
+.LLST173:
+	.8byte	.LVL644
+	.8byte	.LVL645
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST172:
-	.8byte	.LVL650
-	.8byte	.LVL651
-	.2byte	0x1
-	.byte	0x50
+.LLST174:
 	.8byte	.LVL652
 	.8byte	.LVL653
 	.2byte	0x1
@@ -43660,59 +43761,63 @@ __func__.7630:
 	.8byte	.LVL655
 	.2byte	0x1
 	.byte	0x50
+	.8byte	.LVL656
+	.8byte	.LVL657
+	.2byte	0x1
+	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST173:
-	.8byte	.LVL642
-	.8byte	.LVL646
+.LLST175:
+	.8byte	.LVL644
+	.8byte	.LVL648
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL647
-	.8byte	.LFE341
+	.8byte	.LVL649
+	.8byte	.LFE342
 	.2byte	0x1
 	.byte	0x6b
 	.8byte	0
 	.8byte	0
-.LLST174:
-	.8byte	.LVL642
-	.8byte	.LVL643
+.LLST176:
+	.8byte	.LVL644
+	.8byte	.LVL645
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL643
-	.8byte	.LVL644
+	.8byte	.LVL645
+	.8byte	.LVL646
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL644
-	.8byte	.LVL647
+	.8byte	.LVL646
+	.8byte	.LVL649
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL647
-	.8byte	.LVL656
+	.8byte	.LVL649
+	.8byte	.LVL658
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL656
-	.8byte	.LVL661
+	.8byte	.LVL658
+	.8byte	.LVL663
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL661
-	.8byte	.LFE341
+	.8byte	.LVL663
+	.8byte	.LFE342
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST152:
-	.8byte	.LVL595
-	.8byte	.LVL599
+.LLST154:
+	.8byte	.LVL597
+	.8byte	.LVL601
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL599
-	.8byte	.LFE340
+	.8byte	.LVL601
+	.8byte	.LFE341
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -43720,13 +43825,13 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST153:
-	.8byte	.LVL595
+.LLST155:
 	.8byte	.LVL597
+	.8byte	.LVL599
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL597
-	.8byte	.LFE340
+	.8byte	.LVL599
+	.8byte	.LFE341
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -43734,13 +43839,13 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST154:
-	.8byte	.LVL595
-	.8byte	.LVL596
+.LLST156:
+	.8byte	.LVL597
+	.8byte	.LVL598
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL596
-	.8byte	.LFE340
+	.8byte	.LVL598
+	.8byte	.LFE341
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -43748,246 +43853,260 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST155:
-	.8byte	.LVL598
-	.8byte	.LVL599
+.LLST157:
+	.8byte	.LVL600
+	.8byte	.LVL601
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST156:
-	.8byte	.LVL604
-	.8byte	.LVL605
+.LLST158:
+	.8byte	.LVL606
+	.8byte	.LVL607
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL605
-	.8byte	.LVL606-1
+	.8byte	.LVL607
+	.8byte	.LVL608-1
 	.2byte	0x2
 	.byte	0x83
 	.sleb128 0
-	.8byte	.LVL606
-	.8byte	.LVL607
+	.8byte	.LVL608
+	.8byte	.LVL609
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST157:
-	.8byte	.LVL598
+.LLST159:
 	.8byte	.LVL600
+	.8byte	.LVL602
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL601
-	.8byte	.LFE340
+	.8byte	.LVL603
+	.8byte	.LFE341
 	.2byte	0x1
 	.byte	0x69
 	.8byte	0
 	.8byte	0
-.LLST143:
-	.8byte	.LVL580
+.LLST145:
 	.8byte	.LVL582
+	.8byte	.LVL584
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL582
-	.8byte	.LVL586
+	.8byte	.LVL584
+	.8byte	.LVL588
 	.2byte	0x1
 	.byte	0x6c
-	.8byte	.LVL586
-	.8byte	.LVL587
+	.8byte	.LVL588
+	.8byte	.LVL589
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL587
-	.8byte	.LFE338
+	.8byte	.LVL589
+	.8byte	.LFE339
 	.2byte	0x1
 	.byte	0x6c
 	.8byte	0
 	.8byte	0
-.LLST144:
-	.8byte	.LVL580
+.LLST146:
 	.8byte	.LVL582
+	.8byte	.LVL584
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL582
 	.8byte	.LVL584
+	.8byte	.LVL586
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL584
-	.8byte	.LVL587
+	.8byte	.LVL586
+	.8byte	.LVL589
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL587
-	.8byte	.LFE338
+	.8byte	.LVL589
+	.8byte	.LFE339
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST145:
-	.8byte	.LVL580
+.LLST147:
 	.8byte	.LVL582
+	.8byte	.LVL584
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL582
-	.8byte	.LVL585
+	.8byte	.LVL584
+	.8byte	.LVL587
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL585
 	.8byte	.LVL587
+	.8byte	.LVL589
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x52
 	.byte	0x9f
-	.8byte	.LVL587
-	.8byte	.LFE338
+	.8byte	.LVL589
+	.8byte	.LFE339
 	.2byte	0x1
 	.byte	0x67
 	.8byte	0
 	.8byte	0
-.LLST146:
-	.8byte	.LVL580
+.LLST148:
 	.8byte	.LVL582
+	.8byte	.LVL584
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL582
-	.8byte	.LVL586
+	.8byte	.LVL584
+	.8byte	.LVL588
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL586
-	.8byte	.LVL587
+	.8byte	.LVL588
+	.8byte	.LVL589
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x53
 	.byte	0x9f
-	.8byte	.LVL587
-	.8byte	.LFE338
+	.8byte	.LVL589
+	.8byte	.LFE339
 	.2byte	0x1
 	.byte	0x6b
 	.8byte	0
 	.8byte	0
-.LLST147:
-	.8byte	.LVL581
-	.8byte	.LVL582
+.LLST149:
+	.8byte	.LVL583
+	.8byte	.LVL584
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL582
-	.8byte	.LVL583
+	.8byte	.LVL584
+	.8byte	.LVL585
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL587
-	.8byte	.LVL592
+	.8byte	.LVL589
+	.8byte	.LVL594
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL592
-	.8byte	.LVL593
+	.8byte	.LVL594
+	.8byte	.LVL595
 	.2byte	0x3
 	.byte	0x83
 	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL594
-	.8byte	.LFE338
+	.8byte	.LVL596
+	.8byte	.LFE339
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST148:
-	.8byte	.LVL581
-	.8byte	.LVL582
+.LLST150:
+	.8byte	.LVL583
+	.8byte	.LVL584
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL582
-	.8byte	.LVL583
+	.8byte	.LVL584
+	.8byte	.LVL585
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL587
-	.8byte	.LVL591
+	.8byte	.LVL589
+	.8byte	.LVL593
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL591
-	.8byte	.LVL592
+	.8byte	.LVL593
+	.8byte	.LVL594
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL592
-	.8byte	.LFE338
+	.8byte	.LVL594
+	.8byte	.LFE339
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST149:
-	.8byte	.LVL581
-	.8byte	.LVL582
+.LLST151:
+	.8byte	.LVL583
+	.8byte	.LVL584
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL582
 	.8byte	.LVL584
+	.8byte	.LVL586
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL584
-	.8byte	.LVL587
+	.8byte	.LVL586
+	.8byte	.LVL589
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL587
-	.8byte	.LFE338
+	.8byte	.LVL589
+	.8byte	.LFE339
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST150:
-	.8byte	.LVL581
-	.8byte	.LVL582
+.LLST152:
+	.8byte	.LVL583
+	.8byte	.LVL584
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL582
 	.8byte	.LVL584
+	.8byte	.LVL586
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL584
-	.8byte	.LVL587
+	.8byte	.LVL586
+	.8byte	.LVL589
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL587
-	.8byte	.LFE338
+	.8byte	.LVL589
+	.8byte	.LFE339
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST151:
-	.8byte	.LVL581
-	.8byte	.LVL582
+.LLST153:
+	.8byte	.LVL583
+	.8byte	.LVL584
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL582
 	.8byte	.LVL584
+	.8byte	.LVL586
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL584
-	.8byte	.LVL587
+	.8byte	.LVL586
+	.8byte	.LVL589
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL587
-	.8byte	.LFE338
+	.8byte	.LVL589
+	.8byte	.LFE339
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
+.LLST144:
+	.8byte	.LVL580
+	.8byte	.LVL581-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL581-1
+	.8byte	.LFE338
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
 .LLST142:
 	.8byte	.LVL578
 	.8byte	.LVL579-1
@@ -44002,6 +44121,20 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
+.LLST143:
+	.8byte	.LVL578
+	.8byte	.LVL579-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL579-1
+	.8byte	.LFE337
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
 .LLST139:
 	.8byte	.LVL563
 	.8byte	.LVL564
@@ -44069,37 +44202,37 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST409:
-	.8byte	.LVL1808
-	.8byte	.LVL1809
+.LLST411:
+	.8byte	.LVL1810
+	.8byte	.LVL1811
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1809
-	.8byte	.LVL1810-1
+	.8byte	.LVL1811
+	.8byte	.LVL1812-1
 	.2byte	0x1
 	.byte	0x5b
-	.8byte	.LVL1812
-	.8byte	.LVL1813-1
+	.8byte	.LVL1814
+	.8byte	.LVL1815-1
 	.2byte	0x1
 	.byte	0x5b
-	.8byte	.LVL1816
-	.8byte	.LVL1820
+	.8byte	.LVL1818
+	.8byte	.LVL1822
 	.2byte	0x1
 	.byte	0x5b
-	.8byte	.LVL1821
-	.8byte	.LVL1822
+	.8byte	.LVL1823
+	.8byte	.LVL1824
 	.2byte	0x1
 	.byte	0x5b
 	.8byte	0
 	.8byte	0
-.LLST410:
-	.8byte	.LVL1817
-	.8byte	.LVL1818
+.LLST412:
+	.8byte	.LVL1819
+	.8byte	.LVL1820
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1818
-	.8byte	.LVL1819-1
+	.8byte	.LVL1820
+	.8byte	.LVL1821-1
 	.2byte	0x17
 	.byte	0x7b
 	.sleb128 0
@@ -44116,16 +44249,16 @@ __func__.7630:
 	.uleb128 0x10
 	.8byte	0
 	.8byte	0
-.LLST286:
-	.8byte	.LVL1171
-	.8byte	.LVL1172
+.LLST288:
+	.8byte	.LVL1173
+	.8byte	.LVL1174
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1172
-	.8byte	.LVL1212
+	.8byte	.LVL1174
+	.8byte	.LVL1214
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1212
+	.8byte	.LVL1214
 	.8byte	.LFE310
 	.2byte	0x4
 	.byte	0xf3
@@ -44134,24 +44267,24 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST287:
-	.8byte	.LVL1171
-	.8byte	.LVL1174-1
+.LLST289:
+	.8byte	.LVL1173
+	.8byte	.LVL1176-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1174-1
-	.8byte	.LVL1175
+	.8byte	.LVL1176-1
+	.8byte	.LVL1177
 	.2byte	0x1
 	.byte	0x6c
-	.8byte	.LVL1175
 	.8byte	.LVL1177
+	.8byte	.LVL1179
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1177
-	.8byte	.LVL1214
+	.8byte	.LVL1179
+	.8byte	.LVL1216
 	.2byte	0x1
 	.byte	0x6c
-	.8byte	.LVL1214
+	.8byte	.LVL1216
 	.8byte	.LFE310
 	.2byte	0x4
 	.byte	0xf3
@@ -44160,188 +44293,188 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST288:
-	.8byte	.LVL1188
-	.8byte	.LVL1189
+.LLST290:
+	.8byte	.LVL1190
+	.8byte	.LVL1191
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL1189
-	.8byte	.LVL1192
+	.8byte	.LVL1191
+	.8byte	.LVL1194
 	.2byte	0x2
 	.byte	0x75
 	.sleb128 0
-	.8byte	.LVL1192
-	.8byte	.LVL1193
+	.8byte	.LVL1194
+	.8byte	.LVL1195
 	.2byte	0x2
 	.byte	0x75
 	.sleb128 -2
 	.8byte	0
 	.8byte	0
-.LLST289:
-	.8byte	.LVL1180
-	.8byte	.LVL1181
+.LLST291:
+	.8byte	.LVL1182
+	.8byte	.LVL1183
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1181
-	.8byte	.LVL1182-1
+	.8byte	.LVL1183
+	.8byte	.LVL1184-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1187
-	.8byte	.LVL1190
+	.8byte	.LVL1189
+	.8byte	.LVL1192
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1191
 	.8byte	.LVL1193
+	.8byte	.LVL1195
 	.2byte	0x1
 	.byte	0x53
 	.8byte	0
 	.8byte	0
-.LLST290:
-	.8byte	.LVL1182
-	.8byte	.LVL1183
+.LLST292:
+	.8byte	.LVL1184
+	.8byte	.LVL1185
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST291:
-	.8byte	.LVL1180
-	.8byte	.LVL1181
+.LLST293:
+	.8byte	.LVL1182
+	.8byte	.LVL1183
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST292:
-	.8byte	.LVL1179
-	.8byte	.LVL1183
+.LLST294:
+	.8byte	.LVL1181
+	.8byte	.LVL1185
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1186
-	.8byte	.LVL1193
+	.8byte	.LVL1188
+	.8byte	.LVL1195
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1196
-	.8byte	.LVL1197
+	.8byte	.LVL1198
+	.8byte	.LVL1199
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1197
-	.8byte	.LVL1201-1
+	.8byte	.LVL1199
+	.8byte	.LVL1203-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1202
-	.8byte	.LVL1203
+	.8byte	.LVL1204
+	.8byte	.LVL1205
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1205
-	.8byte	.LVL1207-1
+	.8byte	.LVL1207
+	.8byte	.LVL1209-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1210
-	.8byte	.LVL1211
+	.8byte	.LVL1212
+	.8byte	.LVL1213
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST293:
-	.8byte	.LVL1173
-	.8byte	.LVL1184
-	.2byte	0x1
-	.byte	0x63
+.LLST295:
+	.8byte	.LVL1175
 	.8byte	.LVL1186
-	.8byte	.LVL1206
 	.2byte	0x1
 	.byte	0x63
+	.8byte	.LVL1188
 	.8byte	.LVL1208
+	.2byte	0x1
+	.byte	0x63
 	.8byte	.LVL1210
+	.8byte	.LVL1212
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1210
 	.8byte	.LVL1212
+	.8byte	.LVL1214
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST294:
-	.8byte	.LVL1194
-	.8byte	.LVL1200
+.LLST296:
+	.8byte	.LVL1196
+	.8byte	.LVL1202
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL1202
-	.8byte	.LVL1204-1
+	.8byte	.LVL1204
+	.8byte	.LVL1206-1
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL1205
-	.8byte	.LVL1207-1
+	.8byte	.LVL1207
+	.8byte	.LVL1209-1
 	.2byte	0x1
 	.byte	0x54
 	.8byte	0
 	.8byte	0
-.LLST295:
-	.8byte	.LVL1171
-	.8byte	.LVL1178
+.LLST297:
+	.8byte	.LVL1173
+	.8byte	.LVL1180
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1178
-	.8byte	.LVL1185
+	.8byte	.LVL1180
+	.8byte	.LVL1187
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1185
-	.8byte	.LVL1186
+	.8byte	.LVL1187
+	.8byte	.LVL1188
 	.2byte	0x3
 	.byte	0x86
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL1186
-	.8byte	.LVL1213
+	.8byte	.LVL1188
+	.8byte	.LVL1215
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST296:
-	.8byte	.LVL1198
-	.8byte	.LVL1199
+.LLST298:
+	.8byte	.LVL1200
+	.8byte	.LVL1201
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1199
-	.8byte	.LVL1200
+	.8byte	.LVL1201
+	.8byte	.LVL1202
 	.2byte	0x2
 	.byte	0x75
 	.sleb128 16
-	.8byte	.LVL1202
-	.8byte	.LVL1203
+	.8byte	.LVL1204
+	.8byte	.LVL1205
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1203
-	.8byte	.LVL1204-1
+	.8byte	.LVL1205
+	.8byte	.LVL1206-1
 	.2byte	0x2
 	.byte	0x75
 	.sleb128 16
 	.8byte	0
 	.8byte	0
-.LLST404:
-	.8byte	.LVL1762
+.LLST406:
 	.8byte	.LVL1764
+	.8byte	.LVL1766
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1764
-	.8byte	.LVL1765
+	.8byte	.LVL1766
+	.8byte	.LVL1767
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1765
 	.8byte	.LVL1767
+	.8byte	.LVL1769
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1767
+	.8byte	.LVL1769
 	.8byte	.LFE308
 	.2byte	0x4
 	.byte	0xf3
@@ -44350,73 +44483,73 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST405:
-	.8byte	.LVL1776
-	.8byte	.LVL1779
+.LLST407:
+	.8byte	.LVL1778
+	.8byte	.LVL1781
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1779
-	.8byte	.LVL1782
+	.8byte	.LVL1781
+	.8byte	.LVL1784
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1785
-	.8byte	.LVL1795
+	.8byte	.LVL1787
+	.8byte	.LVL1797
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1796
+	.8byte	.LVL1798
 	.8byte	.LFE308
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST406:
-	.8byte	.LVL1768
+.LLST408:
 	.8byte	.LVL1770
+	.8byte	.LVL1772
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1775
-	.8byte	.LVL1776
+	.8byte	.LVL1777
+	.8byte	.LVL1778
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1790
-	.8byte	.LVL1791
+	.8byte	.LVL1792
+	.8byte	.LVL1793
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1791
 	.8byte	.LVL1793
+	.8byte	.LVL1795
 	.2byte	0x1
 	.byte	0x68
 	.8byte	0
 	.8byte	0
-.LLST407:
-	.8byte	.LVL1763
-	.8byte	.LVL1764
-	.2byte	0x1
-	.byte	0x51
+.LLST409:
 	.8byte	.LVL1765
 	.8byte	.LVL1766
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1766
+	.8byte	.LVL1767
+	.8byte	.LVL1768
+	.2byte	0x1
+	.byte	0x51
 	.8byte	.LVL1768
+	.8byte	.LVL1770
 	.2byte	0x2
 	.byte	0x32
 	.byte	0x9f
-	.8byte	.LVL1768
-	.8byte	.LVL1769-1
+	.8byte	.LVL1770
+	.8byte	.LVL1771-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1774
-	.8byte	.LVL1775
+	.8byte	.LVL1776
+	.8byte	.LVL1777
 	.2byte	0x2
 	.byte	0x32
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST408:
-	.8byte	.LVL1786
-	.8byte	.LVL1797
+.LLST410:
+	.8byte	.LVL1788
+	.8byte	.LVL1799
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
@@ -44595,16 +44728,16 @@ __func__.7630:
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST323:
-	.8byte	.LVL1337
-	.8byte	.LVL1338
+.LLST325:
+	.8byte	.LVL1339
+	.8byte	.LVL1340
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1338
-	.8byte	.LVL1342
+	.8byte	.LVL1340
+	.8byte	.LVL1344
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1342
+	.8byte	.LVL1344
 	.8byte	.LFE302
 	.2byte	0x4
 	.byte	0xf3
@@ -44613,18 +44746,18 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST324:
-	.8byte	.LVL1337
-	.8byte	.LVL1341
+.LLST326:
+	.8byte	.LVL1339
+	.8byte	.LVL1343
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1343
-	.8byte	.LVL1346
+	.8byte	.LVL1345
+	.8byte	.LVL1348
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1346
+	.8byte	.LVL1348
 	.8byte	.LFE302
 	.2byte	0x1
 	.byte	0x64
@@ -44690,49 +44823,49 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST389:
-	.8byte	.LVL1698
+.LLST391:
 	.8byte	.LVL1700
+	.8byte	.LVL1702
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1700
-	.8byte	.LVL1708
+	.8byte	.LVL1702
+	.8byte	.LVL1710
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1708
 	.8byte	.LVL1710
+	.8byte	.LVL1712
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1710
+	.8byte	.LVL1712
 	.8byte	.LFE299
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST390:
-	.8byte	.LVL1699
-	.8byte	.LVL1709
+.LLST392:
+	.8byte	.LVL1701
+	.8byte	.LVL1711
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1710
+	.8byte	.LVL1712
 	.8byte	.LFE299
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST310:
-	.8byte	.LVL1264
-	.8byte	.LVL1265
+.LLST312:
+	.8byte	.LVL1266
+	.8byte	.LVL1267
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1265
-	.8byte	.LVL1305
+	.8byte	.LVL1267
+	.8byte	.LVL1307
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1305
+	.8byte	.LVL1307
 	.8byte	.LFE298
 	.2byte	0x4
 	.byte	0xf3
@@ -44741,127 +44874,127 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST311:
-	.8byte	.LVL1272
-	.8byte	.LVL1277
+.LLST313:
+	.8byte	.LVL1274
+	.8byte	.LVL1279
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1278
-	.8byte	.LVL1305
+	.8byte	.LVL1280
+	.8byte	.LVL1307
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST312:
-	.8byte	.LVL1280
-	.8byte	.LVL1292
+.LLST314:
+	.8byte	.LVL1282
+	.8byte	.LVL1294
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1293
-	.8byte	.LVL1306
+	.8byte	.LVL1295
+	.8byte	.LVL1308
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST313:
-	.8byte	.LVL1284
-	.8byte	.LVL1285
+.LLST315:
+	.8byte	.LVL1286
+	.8byte	.LVL1287
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1286
-	.8byte	.LVL1287
+	.8byte	.LVL1288
+	.8byte	.LVL1289
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1287
-	.8byte	.LVL1291
+	.8byte	.LVL1289
+	.8byte	.LVL1293
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1297
-	.8byte	.LVL1301
+	.8byte	.LVL1299
+	.8byte	.LVL1303
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1301
-	.8byte	.LVL1302
+	.8byte	.LVL1303
+	.8byte	.LVL1304
 	.2byte	0x3
 	.byte	0x88
 	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL1303
-	.8byte	.LVL1307
+	.8byte	.LVL1305
+	.8byte	.LVL1309
 	.2byte	0x1
 	.byte	0x68
 	.8byte	0
 	.8byte	0
-.LLST314:
-	.8byte	.LVL1286
-	.8byte	.LVL1287
+.LLST316:
+	.8byte	.LVL1288
+	.8byte	.LVL1289
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1287
-	.8byte	.LVL1288-1
+	.8byte	.LVL1289
+	.8byte	.LVL1290-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1297
-	.8byte	.LVL1298
+	.8byte	.LVL1299
+	.8byte	.LVL1300
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1298
-	.8byte	.LVL1299
+	.8byte	.LVL1300
+	.8byte	.LVL1301
 	.2byte	0x3
 	.byte	0x71
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL1299
-	.8byte	.LVL1300-1
+	.8byte	.LVL1301
+	.8byte	.LVL1302-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1300-1
-	.8byte	.LVL1301
+	.8byte	.LVL1302-1
+	.8byte	.LVL1303
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 196
-	.8byte	.LVL1301
 	.8byte	.LVL1303
+	.8byte	.LVL1305
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST315:
-	.8byte	.LVL1264
+.LLST317:
 	.8byte	.LVL1266
+	.8byte	.LVL1268
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1268
-	.8byte	.LVL1269
+	.8byte	.LVL1270
+	.8byte	.LVL1271
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1269
-	.8byte	.LVL1270
+	.8byte	.LVL1271
+	.8byte	.LVL1272
 	.2byte	0x3
 	.byte	0x71
 	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL1270
-	.8byte	.LVL1271-1
+	.8byte	.LVL1272
+	.8byte	.LVL1273-1
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST316:
-	.8byte	.LVL1294
+.LLST318:
 	.8byte	.LVL1296
+	.8byte	.LVL1298
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST317:
-	.8byte	.LVL1294
+.LLST319:
 	.8byte	.LVL1296
+	.8byte	.LVL1298
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
@@ -45203,214 +45336,214 @@ __func__.7630:
 	.byte	0x55
 	.8byte	0
 	.8byte	0
-.LLST249:
-	.8byte	.LVL954
-	.8byte	.LVL955
+.LLST251:
+	.8byte	.LVL956
+	.8byte	.LVL957
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL956
+	.8byte	.LVL958
 	.8byte	.LFE291
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST250:
-	.8byte	.LVL959
+.LLST252:
 	.8byte	.LVL961
+	.8byte	.LVL963
 	.2byte	0x1
 	.byte	0x67
 	.8byte	0
 	.8byte	0
-.LLST281:
-	.8byte	.LVL1144
-	.8byte	.LVL1145
+.LLST283:
+	.8byte	.LVL1146
+	.8byte	.LVL1147
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1147
-	.8byte	.LVL1148
+	.8byte	.LVL1149
+	.8byte	.LVL1150
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1156
-	.8byte	.LVL1159
+	.8byte	.LVL1158
+	.8byte	.LVL1161
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1160
-	.8byte	.LVL1161
+	.8byte	.LVL1162
+	.8byte	.LVL1163
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1161
-	.8byte	.LVL1166
+	.8byte	.LVL1163
+	.8byte	.LVL1168
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1167
+	.8byte	.LVL1169
 	.8byte	.LFE290
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST282:
-	.8byte	.LVL1142
-	.8byte	.LVL1143
+.LLST284:
+	.8byte	.LVL1144
+	.8byte	.LVL1145
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1151
-	.8byte	.LVL1156
+	.8byte	.LVL1153
+	.8byte	.LVL1158
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST283:
-	.8byte	.LVL1147
-	.8byte	.LVL1148
+.LLST285:
+	.8byte	.LVL1149
+	.8byte	.LVL1150
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1153
-	.8byte	.LVL1154
+	.8byte	.LVL1155
+	.8byte	.LVL1156
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1161
-	.8byte	.LVL1164
+	.8byte	.LVL1163
+	.8byte	.LVL1166
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1165
+	.8byte	.LVL1167
 	.8byte	.LFE290
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST284:
-	.8byte	.LVL1140
-	.8byte	.LVL1144
+.LLST286:
+	.8byte	.LVL1142
+	.8byte	.LVL1146
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1144
-	.8byte	.LVL1149
+	.8byte	.LVL1146
+	.8byte	.LVL1151
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1149
-	.8byte	.LVL1150
+	.8byte	.LVL1151
+	.8byte	.LVL1152
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.8byte	.LVL1151
-	.8byte	.LVL1156
+	.8byte	.LVL1153
+	.8byte	.LVL1158
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1156
-	.8byte	.LVL1162
+	.8byte	.LVL1158
+	.8byte	.LVL1164
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1163
+	.8byte	.LVL1165
 	.8byte	.LFE290
 	.2byte	0x1
 	.byte	0x67
 	.8byte	0
 	.8byte	0
-.LLST285:
-	.8byte	.LVL1146
+.LLST287:
 	.8byte	.LVL1148
+	.8byte	.LVL1150
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL1161
+	.8byte	.LVL1163
 	.8byte	.LFE290
 	.2byte	0x1
 	.byte	0x6a
 	.8byte	0
 	.8byte	0
-.LLST386:
-	.8byte	.LVL1684
-	.8byte	.LVL1685
+.LLST388:
+	.8byte	.LVL1686
+	.8byte	.LVL1687
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1691
-	.8byte	.LVL1696
+	.8byte	.LVL1693
+	.8byte	.LVL1698
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1697
+	.8byte	.LVL1699
 	.8byte	.LFE289
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST387:
-	.8byte	.LVL1682
-	.8byte	.LVL1683
+.LLST389:
+	.8byte	.LVL1684
+	.8byte	.LVL1685
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1686
-	.8byte	.LVL1691
+	.8byte	.LVL1688
+	.8byte	.LVL1693
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST388:
-	.8byte	.LVL1688
-	.8byte	.LVL1689
+.LLST390:
+	.8byte	.LVL1690
+	.8byte	.LVL1691
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST354:
-	.8byte	.LVL1508
-	.8byte	.LVL1509
+.LLST356:
+	.8byte	.LVL1510
+	.8byte	.LVL1511
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1509
-	.8byte	.LVL1513
+	.8byte	.LVL1511
+	.8byte	.LVL1515
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1513
-	.8byte	.LVL1514
+	.8byte	.LVL1515
+	.8byte	.LVL1516
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1514
+	.8byte	.LVL1516
 	.8byte	.LFE288
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST355:
-	.8byte	.LVL1516
-	.8byte	.LVL1517
+.LLST357:
+	.8byte	.LVL1518
+	.8byte	.LVL1519
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1517
-	.8byte	.LVL1518-1
+	.8byte	.LVL1519
+	.8byte	.LVL1520-1
 	.2byte	0x9
 	.byte	0x3
 	.8byte	p_sys_spare_buf
 	.8byte	0
 	.8byte	0
-.LLST356:
-	.8byte	.LVL1508
-	.8byte	.LVL1509
+.LLST358:
+	.8byte	.LVL1510
+	.8byte	.LVL1511
 	.2byte	0x2
 	.byte	0x36
 	.byte	0x9f
-	.8byte	.LVL1509
-	.8byte	.LVL1510
+	.8byte	.LVL1511
+	.8byte	.LVL1512
 	.2byte	0x3
 	.byte	0x85
 	.sleb128 -2
 	.byte	0x9f
-	.8byte	.LVL1510
-	.8byte	.LVL1511
+	.8byte	.LVL1512
+	.8byte	.LVL1513
 	.2byte	0x3
 	.byte	0x85
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL1511
-	.8byte	.LVL1512
+	.8byte	.LVL1513
+	.8byte	.LVL1514
 	.2byte	0x3
 	.byte	0x85
 	.sleb128 -2
 	.byte	0x9f
-	.8byte	.LVL1514
+	.8byte	.LVL1516
 	.8byte	.LFE288
 	.2byte	0x3
 	.byte	0x85
@@ -45418,102 +45551,102 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST275:
-	.8byte	.LVL1116
-	.8byte	.LVL1117
+.LLST277:
+	.8byte	.LVL1118
+	.8byte	.LVL1119
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1117
-	.8byte	.LVL1128
+	.8byte	.LVL1119
+	.8byte	.LVL1130
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1129
-	.8byte	.LVL1138
+	.8byte	.LVL1131
+	.8byte	.LVL1140
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST276:
-	.8byte	.LVL1118
-	.8byte	.LVL1122
+.LLST278:
+	.8byte	.LVL1120
+	.8byte	.LVL1124
 	.2byte	0x1
 	.byte	0x56
-	.8byte	.LVL1122
-	.8byte	.LVL1123
+	.8byte	.LVL1124
+	.8byte	.LVL1125
 	.2byte	0x3
 	.byte	0x76
 	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL1123
-	.8byte	.LVL1127-1
+	.8byte	.LVL1125
+	.8byte	.LVL1129-1
 	.2byte	0x1
 	.byte	0x56
-	.8byte	.LVL1130
-	.8byte	.LVL1135-1
+	.8byte	.LVL1132
+	.8byte	.LVL1137-1
 	.2byte	0x1
 	.byte	0x56
 	.8byte	0
 	.8byte	0
-.LLST277:
-	.8byte	.LVL1119
-	.8byte	.LVL1120-1
+.LLST279:
+	.8byte	.LVL1121
+	.8byte	.LVL1122-1
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST278:
-	.8byte	.LVL1118
-	.8byte	.LVL1121
+.LLST280:
+	.8byte	.LVL1120
+	.8byte	.LVL1123
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL1122
-	.8byte	.LVL1127-1
+	.8byte	.LVL1124
+	.8byte	.LVL1129-1
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL1130
-	.8byte	.LVL1131
+	.8byte	.LVL1132
+	.8byte	.LVL1133
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL1132
-	.8byte	.LVL1135-1
+	.8byte	.LVL1134
+	.8byte	.LVL1137-1
 	.2byte	0x1
 	.byte	0x55
 	.8byte	0
 	.8byte	0
-.LLST279:
-	.8byte	.LVL1116
-	.8byte	.LVL1117
+.LLST281:
+	.8byte	.LVL1118
+	.8byte	.LVL1119
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1117
-	.8byte	.LVL1133
+	.8byte	.LVL1119
+	.8byte	.LVL1135
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1134
 	.8byte	.LVL1136
+	.8byte	.LVL1138
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1136
-	.8byte	.LVL1137-1
+	.8byte	.LVL1138
+	.8byte	.LVL1139-1
 	.2byte	0x9
 	.byte	0x3
 	.8byte	g_num_data_superblocks
 	.8byte	0
 	.8byte	0
-.LLST280:
-	.8byte	.LVL1116
-	.8byte	.LVL1117
+.LLST282:
+	.8byte	.LVL1118
+	.8byte	.LVL1119
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1117
-	.8byte	.LVL1125
+	.8byte	.LVL1119
+	.8byte	.LVL1127
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1126
-	.8byte	.LVL1139
+	.8byte	.LVL1128
+	.8byte	.LVL1141
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
@@ -45564,42 +45697,42 @@ __func__.7630:
 	.byte	0x54
 	.8byte	0
 	.8byte	0
-.LLST329:
-	.8byte	.LVL1367
-	.8byte	.LVL1368
+.LLST331:
+	.8byte	.LVL1369
+	.8byte	.LVL1370
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1368
-	.8byte	.LVL1372
+	.8byte	.LVL1370
+	.8byte	.LVL1374
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1372
-	.8byte	.LVL1373
+	.8byte	.LVL1374
+	.8byte	.LVL1375
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1373
+	.8byte	.LVL1375
 	.8byte	.LFE281
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST330:
-	.8byte	.LVL1369
+.LLST332:
 	.8byte	.LVL1371
+	.8byte	.LVL1373
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL1373
+	.8byte	.LVL1375
 	.8byte	.LFE281
 	.2byte	0x1
 	.byte	0x6a
 	.8byte	0
 	.8byte	0
-.LLST331:
-	.8byte	.LVL1369
-	.8byte	.LVL1370
+.LLST333:
+	.8byte	.LVL1371
+	.8byte	.LVL1372
 	.2byte	0x8
 	.byte	0x83
 	.sleb128 6
@@ -45609,8 +45742,8 @@ __func__.7630:
 	.byte	0xff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL1370
-	.8byte	.LVL1371
+	.8byte	.LVL1372
+	.8byte	.LVL1373
 	.2byte	0x9
 	.byte	0x8f
 	.sleb128 324
@@ -45620,8 +45753,8 @@ __func__.7630:
 	.byte	0xff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL1373
-	.8byte	.LVL1376-1
+	.8byte	.LVL1375
+	.8byte	.LVL1378-1
 	.2byte	0x8
 	.byte	0x83
 	.sleb128 6
@@ -45631,8 +45764,8 @@ __func__.7630:
 	.byte	0xff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL1376-1
-	.8byte	.LVL1390
+	.8byte	.LVL1378-1
+	.8byte	.LVL1392
 	.2byte	0x9
 	.byte	0x8f
 	.sleb128 324
@@ -45642,8 +45775,8 @@ __func__.7630:
 	.byte	0xff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL1390
-	.8byte	.LVL1395
+	.8byte	.LVL1392
+	.8byte	.LVL1397
 	.2byte	0x8
 	.byte	0x83
 	.sleb128 6
@@ -45653,7 +45786,7 @@ __func__.7630:
 	.byte	0xff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL1395
+	.8byte	.LVL1397
 	.8byte	.LFE281
 	.2byte	0x9
 	.byte	0x8f
@@ -45666,51 +45799,51 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST332:
-	.8byte	.LVL1373
+.LLST334:
 	.8byte	.LVL1375
+	.8byte	.LVL1377
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1375
-	.8byte	.LVL1378
+	.8byte	.LVL1377
+	.8byte	.LVL1380
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1390
-	.8byte	.LVL1391
+	.8byte	.LVL1392
+	.8byte	.LVL1393
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1392
-	.8byte	.LVL1399
+	.8byte	.LVL1394
+	.8byte	.LVL1401
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1434
-	.8byte	.LVL1435
+	.8byte	.LVL1436
+	.8byte	.LVL1437
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1440
-	.8byte	.LVL1441
+	.8byte	.LVL1442
+	.8byte	.LVL1443
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1441
-	.8byte	.LVL1445
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1504
-	.8byte	.LVL1505
+	.8byte	.LVL1443
+	.8byte	.LVL1447
 	.2byte	0x1
 	.byte	0x50
 	.8byte	.LVL1506
 	.8byte	.LVL1507
 	.2byte	0x1
 	.byte	0x50
+	.8byte	.LVL1508
+	.8byte	.LVL1509
+	.2byte	0x1
+	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST333:
-	.8byte	.LVL1433
-	.8byte	.LVL1434
+.LLST335:
+	.8byte	.LVL1435
+	.8byte	.LVL1436
 	.2byte	0x9
 	.byte	0x8f
 	.sleb128 324
@@ -45720,476 +45853,476 @@ __func__.7630:
 	.byte	0xff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL1458
 	.8byte	.LVL1460
+	.8byte	.LVL1462
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1507
+	.8byte	.LVL1509
 	.8byte	.LFE281
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST334:
-	.8byte	.LVL1417
-	.8byte	.LVL1418
-	.2byte	0x1
-	.byte	0x6a
+.LLST336:
 	.8byte	.LVL1419
 	.8byte	.LVL1420
 	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL1420
-	.8byte	.LVL1421
-	.2byte	0x1
 	.byte	0x6a
 	.8byte	.LVL1421
-	.8byte	.LVL1430
+	.8byte	.LVL1422
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1431
+	.8byte	.LVL1422
+	.8byte	.LVL1423
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL1423
 	.8byte	.LVL1432
 	.2byte	0x1
 	.byte	0x68
 	.8byte	.LVL1433
 	.8byte	.LVL1434
 	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL1435
+	.8byte	.LVL1436
+	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL1434
-	.8byte	.LVL1438
+	.8byte	.LVL1436
+	.8byte	.LVL1440
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1439
-	.8byte	.LVL1445
+	.8byte	.LVL1441
+	.8byte	.LVL1447
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1445
-	.8byte	.LVL1450
+	.8byte	.LVL1447
+	.8byte	.LVL1452
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1450
+	.8byte	.LVL1452
 	.8byte	.LFE281
 	.2byte	0x1
 	.byte	0x67
 	.8byte	0
 	.8byte	0
-.LLST335:
-	.8byte	.LVL1387
-	.8byte	.LVL1390
+.LLST337:
+	.8byte	.LVL1389
+	.8byte	.LVL1392
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL1414
+	.8byte	.LVL1416
 	.8byte	.LFE281
 	.2byte	0x1
 	.byte	0x6b
 	.8byte	0
 	.8byte	0
-.LLST336:
-	.8byte	.LVL1385
-	.8byte	.LVL1390
+.LLST338:
+	.8byte	.LVL1387
+	.8byte	.LVL1392
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1409
-	.8byte	.LVL1410
+	.8byte	.LVL1411
+	.8byte	.LVL1412
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1414
+	.8byte	.LVL1416
 	.8byte	.LFE281
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST337:
-	.8byte	.LVL1374
-	.8byte	.LVL1376-1
+.LLST339:
+	.8byte	.LVL1376
+	.8byte	.LVL1378-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1390
-	.8byte	.LVL1393
+	.8byte	.LVL1392
+	.8byte	.LVL1395
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1394
-	.8byte	.LVL1395
+	.8byte	.LVL1396
+	.8byte	.LVL1397
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1400
-	.8byte	.LVL1401
+	.8byte	.LVL1402
+	.8byte	.LVL1403
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1401
-	.8byte	.LVL1404
+	.8byte	.LVL1403
+	.8byte	.LVL1406
 	.2byte	0x2
 	.byte	0x74
 	.sleb128 0
-	.8byte	.LVL1404
-	.8byte	.LVL1405
+	.8byte	.LVL1406
+	.8byte	.LVL1407
 	.2byte	0x2
 	.byte	0x74
 	.sleb128 -2
-	.8byte	.LVL1422
-	.8byte	.LVL1425
+	.8byte	.LVL1424
+	.8byte	.LVL1427
 	.2byte	0x1
 	.byte	0x56
-	.8byte	.LVL1425
-	.8byte	.LVL1426
+	.8byte	.LVL1427
+	.8byte	.LVL1428
 	.2byte	0x2
 	.byte	0x72
 	.sleb128 0
-	.8byte	.LVL1442
-	.8byte	.LVL1443
+	.8byte	.LVL1444
+	.8byte	.LVL1445
 	.2byte	0x6
 	.byte	0x8f
 	.sleb128 328
 	.byte	0x6
 	.byte	0x32
 	.byte	0x1c
-	.8byte	.LVL1443
-	.8byte	.LVL1444
+	.8byte	.LVL1445
+	.8byte	.LVL1446
 	.2byte	0x2
 	.byte	0x74
 	.sleb128 -4
-	.8byte	.LVL1451
-	.8byte	.LVL1454
+	.8byte	.LVL1453
+	.8byte	.LVL1456
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1454
-	.8byte	.LVL1455
+	.8byte	.LVL1456
+	.8byte	.LVL1457
 	.2byte	0x2
 	.byte	0x72
 	.sleb128 0
-	.8byte	.LVL1455
-	.8byte	.LVL1456
+	.8byte	.LVL1457
+	.8byte	.LVL1458
 	.2byte	0x2
 	.byte	0x72
 	.sleb128 -2
-	.8byte	.LVL1504
-	.8byte	.LVL1507
+	.8byte	.LVL1506
+	.8byte	.LVL1509
 	.2byte	0x2
 	.byte	0x74
 	.sleb128 -4
 	.8byte	0
 	.8byte	0
-.LLST338:
-	.8byte	.LVL1377
+.LLST340:
 	.8byte	.LVL1379
+	.8byte	.LVL1381
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1379
-	.8byte	.LVL1388
+	.8byte	.LVL1381
+	.8byte	.LVL1390
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1395
-	.8byte	.LVL1396
+	.8byte	.LVL1397
+	.8byte	.LVL1398
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1396
-	.8byte	.LVL1419
+	.8byte	.LVL1398
+	.8byte	.LVL1421
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1420
-	.8byte	.LVL1421
+	.8byte	.LVL1422
+	.8byte	.LVL1423
 	.2byte	0x1
 	.byte	0x67
 	.8byte	0
 	.8byte	0
-.LLST340:
-	.8byte	.LVL1380
-	.8byte	.LVL1384
+.LLST342:
+	.8byte	.LVL1382
+	.8byte	.LVL1386
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1399
-	.8byte	.LVL1402
+	.8byte	.LVL1401
+	.8byte	.LVL1404
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1403
-	.8byte	.LVL1409
+	.8byte	.LVL1405
+	.8byte	.LVL1411
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1410
-	.8byte	.LVL1414
+	.8byte	.LVL1412
+	.8byte	.LVL1416
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1421
 	.8byte	.LVL1423
+	.8byte	.LVL1425
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1424
-	.8byte	.LVL1427
+	.8byte	.LVL1426
+	.8byte	.LVL1429
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1434
-	.8byte	.LVL1435
+	.8byte	.LVL1436
+	.8byte	.LVL1437
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1435
 	.8byte	.LVL1437
+	.8byte	.LVL1439
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1450
 	.8byte	.LVL1452
+	.8byte	.LVL1454
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1453
-	.8byte	.LVL1456
+	.8byte	.LVL1455
+	.8byte	.LVL1458
 	.2byte	0x1
 	.byte	0x68
 	.8byte	0
 	.8byte	0
-.LLST341:
-	.8byte	.LVL1382
-	.8byte	.LVL1383
+.LLST343:
+	.8byte	.LVL1384
+	.8byte	.LVL1385
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1383
 	.8byte	.LVL1385
+	.8byte	.LVL1387
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1405
-	.8byte	.LVL1408
+	.8byte	.LVL1407
+	.8byte	.LVL1410
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1410
 	.8byte	.LVL1412
+	.8byte	.LVL1414
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1413
-	.8byte	.LVL1414
+	.8byte	.LVL1415
+	.8byte	.LVL1416
 	.2byte	0x1
 	.byte	0x53
 	.8byte	0
 	.8byte	0
-.LLST342:
-	.8byte	.LVL1428
-	.8byte	.LVL1429
+.LLST344:
+	.8byte	.LVL1430
+	.8byte	.LVL1431
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1436
-	.8byte	.LVL1437
+	.8byte	.LVL1438
+	.8byte	.LVL1439
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST343:
-	.8byte	.LVL1459
-	.8byte	.LVL1463
+.LLST345:
+	.8byte	.LVL1461
+	.8byte	.LVL1465
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1465
-	.8byte	.LVL1475
+	.8byte	.LVL1467
+	.8byte	.LVL1477
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1475
-	.8byte	.LVL1478
+	.8byte	.LVL1477
+	.8byte	.LVL1480
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1478
-	.8byte	.LVL1500
+	.8byte	.LVL1480
+	.8byte	.LVL1502
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1500
 	.8byte	.LVL1502
+	.8byte	.LVL1504
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1502
 	.8byte	.LVL1504
+	.8byte	.LVL1506
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST344:
-	.8byte	.LVL1459
-	.8byte	.LVL1463
+.LLST346:
+	.8byte	.LVL1461
+	.8byte	.LVL1465
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1465
-	.8byte	.LVL1473
+	.8byte	.LVL1467
+	.8byte	.LVL1475
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1478
-	.8byte	.LVL1493
+	.8byte	.LVL1480
+	.8byte	.LVL1495
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1493
 	.8byte	.LVL1495
+	.8byte	.LVL1497
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1502
 	.8byte	.LVL1504
+	.8byte	.LVL1506
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST345:
-	.8byte	.LVL1382
-	.8byte	.LVL1390
+.LLST347:
+	.8byte	.LVL1384
+	.8byte	.LVL1392
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1405
+	.8byte	.LVL1407
 	.8byte	.LFE281
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST346:
-	.8byte	.LVL1367
-	.8byte	.LVL1371
+.LLST348:
+	.8byte	.LVL1369
+	.8byte	.LVL1373
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1373
-	.8byte	.LVL1383
+	.8byte	.LVL1375
+	.8byte	.LVL1385
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1383
-	.8byte	.LVL1388
+	.8byte	.LVL1385
+	.8byte	.LVL1390
 	.2byte	0x1
 	.byte	0x56
-	.8byte	.LVL1390
-	.8byte	.LVL1405
+	.8byte	.LVL1392
+	.8byte	.LVL1407
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1405
-	.8byte	.LVL1416
+	.8byte	.LVL1407
+	.8byte	.LVL1418
 	.2byte	0x1
 	.byte	0x56
-	.8byte	.LVL1416
-	.8byte	.LVL1432
+	.8byte	.LVL1418
+	.8byte	.LVL1434
 	.2byte	0x1
 	.byte	0x6c
-	.8byte	.LVL1445
-	.8byte	.LVL1450
+	.8byte	.LVL1447
+	.8byte	.LVL1452
 	.2byte	0x1
 	.byte	0x6c
 	.8byte	0
 	.8byte	0
-.LLST347:
-	.8byte	.LVL1406
-	.8byte	.LVL1410
+.LLST349:
+	.8byte	.LVL1408
+	.8byte	.LVL1412
 	.2byte	0x1
 	.byte	0x58
-	.8byte	.LVL1446
-	.8byte	.LVL1447
+	.8byte	.LVL1448
+	.8byte	.LVL1449
 	.2byte	0x1
 	.byte	0x56
-	.8byte	.LVL1447
-	.8byte	.LVL1448
+	.8byte	.LVL1449
+	.8byte	.LVL1450
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 0
-	.8byte	.LVL1448
-	.8byte	.LVL1449
+	.8byte	.LVL1450
+	.8byte	.LVL1451
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 -32
-	.8byte	.LVL1461
-	.8byte	.LVL1462
+	.8byte	.LVL1463
+	.8byte	.LVL1464
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1465
-	.8byte	.LVL1468-1
+	.8byte	.LVL1467
+	.8byte	.LVL1470-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1470
-	.8byte	.LVL1471-1
+	.8byte	.LVL1472
+	.8byte	.LVL1473-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1471-1
-	.8byte	.LVL1472
+	.8byte	.LVL1473-1
+	.8byte	.LVL1474
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 296
-	.8byte	.LVL1480
-	.8byte	.LVL1481
+	.8byte	.LVL1482
+	.8byte	.LVL1483
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 296
-	.8byte	.LVL1484
-	.8byte	.LVL1485-1
+	.8byte	.LVL1486
+	.8byte	.LVL1487-1
 	.2byte	0x2
 	.byte	0x74
 	.sleb128 16
-	.8byte	.LVL1485-1
-	.8byte	.LVL1486
+	.8byte	.LVL1487-1
+	.8byte	.LVL1488
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 256
-	.8byte	.LVL1496
-	.8byte	.LVL1497-1
+	.8byte	.LVL1498
+	.8byte	.LVL1499-1
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL1497-1
-	.8byte	.LVL1500
+	.8byte	.LVL1499-1
+	.8byte	.LVL1502
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 296
 	.8byte	0
 	.8byte	0
-.LLST348:
-	.8byte	.LVL1415
-	.8byte	.LVL1432
+.LLST350:
+	.8byte	.LVL1417
+	.8byte	.LVL1434
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1445
-	.8byte	.LVL1450
+	.8byte	.LVL1447
+	.8byte	.LVL1452
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST349:
-	.8byte	.LVL1415
-	.8byte	.LVL1419
+.LLST351:
+	.8byte	.LVL1417
+	.8byte	.LVL1421
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1420
-	.8byte	.LVL1421
+	.8byte	.LVL1422
+	.8byte	.LVL1423
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST350:
-	.8byte	.LVL1471
-	.8byte	.LVL1472
+.LLST352:
+	.8byte	.LVL1473
+	.8byte	.LVL1474
 	.2byte	0x6
 	.byte	0x8f
 	.sleb128 296
 	.byte	0x6
 	.byte	0x23
 	.uleb128 0x4
-	.8byte	.LVL1480
-	.8byte	.LVL1481
+	.8byte	.LVL1482
+	.8byte	.LVL1483
 	.2byte	0x6
 	.byte	0x8f
 	.sleb128 296
@@ -46198,23 +46331,23 @@ __func__.7630:
 	.uleb128 0x4
 	.8byte	0
 	.8byte	0
-.LLST351:
-	.8byte	.LVL1487
-	.8byte	.LVL1490
+.LLST353:
+	.8byte	.LVL1489
+	.8byte	.LVL1492
 	.2byte	0x1
 	.byte	0x53
 	.8byte	0
 	.8byte	0
-.LLST352:
-	.8byte	.LVL1494
-	.8byte	.LVL1500
+.LLST354:
+	.8byte	.LVL1496
+	.8byte	.LVL1502
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST353:
-	.8byte	.LVL1497
-	.8byte	.LVL1498-1
+.LLST355:
+	.8byte	.LVL1499
+	.8byte	.LVL1500-1
 	.2byte	0x6
 	.byte	0x8f
 	.sleb128 296
@@ -46223,91 +46356,91 @@ __func__.7630:
 	.uleb128 0x4
 	.8byte	0
 	.8byte	0
-.LLST243:
-	.8byte	.LVL934
-	.8byte	.LVL935
+.LLST245:
+	.8byte	.LVL936
+	.8byte	.LVL937
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL935
-	.8byte	.LVL947
+	.8byte	.LVL937
+	.8byte	.LVL949
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL947
-	.8byte	.LVL948
+	.8byte	.LVL949
+	.8byte	.LVL950
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL948
+	.8byte	.LVL950
 	.8byte	.LFE280
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST244:
-	.8byte	.LVL934
-	.8byte	.LVL936-1
+.LLST246:
+	.8byte	.LVL936
+	.8byte	.LVL938-1
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST245:
-	.8byte	.LVL937
-	.8byte	.LVL938
+.LLST247:
+	.8byte	.LVL939
+	.8byte	.LVL940
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL938
-	.8byte	.LVL942-1
+	.8byte	.LVL940
+	.8byte	.LVL944-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL948
-	.8byte	.LVL953
+	.8byte	.LVL950
+	.8byte	.LVL955
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL953
+	.8byte	.LVL955
 	.8byte	.LFE280
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST246:
-	.8byte	.LVL940
-	.8byte	.LVL941
+.LLST248:
+	.8byte	.LVL942
+	.8byte	.LVL943
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL948
-	.8byte	.LVL951
+	.8byte	.LVL950
+	.8byte	.LVL953
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL952
-	.8byte	.LVL953
+	.8byte	.LVL954
+	.8byte	.LVL955
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST247:
-	.8byte	.LVL940
-	.8byte	.LVL945
+.LLST249:
+	.8byte	.LVL942
+	.8byte	.LVL947
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL948
-	.8byte	.LVL949
+	.8byte	.LVL950
+	.8byte	.LVL951
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL950
-	.8byte	.LVL953
+	.8byte	.LVL952
+	.8byte	.LVL955
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST248:
-	.8byte	.LVL939
-	.8byte	.LVL942-1
+.LLST250:
+	.8byte	.LVL941
+	.8byte	.LVL944-1
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL948
-	.8byte	.LVL953
+	.8byte	.LVL950
+	.8byte	.LVL955
 	.2byte	0x1
 	.byte	0x54
 	.8byte	0
@@ -46352,110 +46485,110 @@ __func__.7630:
 	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST274:
-	.8byte	.LVL1104
-	.8byte	.LVL1105
+.LLST276:
+	.8byte	.LVL1106
+	.8byte	.LVL1107
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST263:
-	.8byte	.LVL1055
-	.8byte	.LVL1058
+.LLST265:
+	.8byte	.LVL1057
+	.8byte	.LVL1060
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1058
-	.8byte	.LVL1076
+	.8byte	.LVL1060
+	.8byte	.LVL1078
 	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1076
-	.8byte	.LVL1082
+	.byte	0x63
+	.8byte	.LVL1078
+	.8byte	.LVL1084
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1082
+	.8byte	.LVL1084
 	.8byte	.LFE275
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST264:
-	.8byte	.LVL1064
-	.8byte	.LVL1065
+.LLST266:
+	.8byte	.LVL1066
+	.8byte	.LVL1067
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1065
-	.8byte	.LVL1080
+	.8byte	.LVL1067
+	.8byte	.LVL1082
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL1082
+	.8byte	.LVL1084
 	.8byte	.LFE275
 	.2byte	0x1
 	.byte	0x6b
 	.8byte	0
 	.8byte	0
-.LLST265:
-	.8byte	.LVL1069
-	.8byte	.LVL1070
+.LLST267:
+	.8byte	.LVL1071
+	.8byte	.LVL1072
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1070
-	.8byte	.LVL1071
+	.8byte	.LVL1072
+	.8byte	.LVL1073
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1082
 	.8byte	.LVL1084
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL1085
 	.8byte	.LVL1086
 	.2byte	0x1
 	.byte	0x66
+	.8byte	.LVL1087
 	.8byte	.LVL1088
-	.8byte	.LVL1089-1
 	.2byte	0x1
-	.byte	0x55
+	.byte	0x66
 	.8byte	.LVL1090
-	.8byte	.LVL1091
+	.8byte	.LVL1091-1
 	.2byte	0x1
 	.byte	0x55
 	.8byte	.LVL1092
 	.8byte	.LVL1093
 	.2byte	0x1
-	.byte	0x50
+	.byte	0x55
+	.8byte	.LVL1094
 	.8byte	.LVL1095
-	.8byte	.LVL1100
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1101
+	.8byte	.LVL1097
+	.8byte	.LVL1102
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1103
 	.8byte	.LFE275
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST266:
-	.8byte	.LVL1068
-	.8byte	.LVL1071
+.LLST268:
+	.8byte	.LVL1070
+	.8byte	.LVL1073
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL1082
-	.8byte	.LVL1086
+	.8byte	.LVL1084
+	.8byte	.LVL1088
 	.2byte	0x1
 	.byte	0x6a
 	.8byte	0
 	.8byte	0
-.LLST267:
-	.8byte	.LVL1096
-	.8byte	.LVL1097
+.LLST269:
+	.8byte	.LVL1098
+	.8byte	.LVL1099
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1097
-	.8byte	.LVL1098
+	.8byte	.LVL1099
+	.8byte	.LVL1100
 	.2byte	0x7
 	.byte	0x72
 	.sleb128 -1
@@ -46464,8 +46597,8 @@ __func__.7630:
 	.byte	0x7a
 	.sleb128 0
 	.byte	0x22
-	.8byte	.LVL1098
-	.8byte	.LVL1099
+	.8byte	.LVL1100
+	.8byte	.LVL1101
 	.2byte	0xf
 	.byte	0x70
 	.sleb128 0
@@ -46484,105 +46617,105 @@ __func__.7630:
 	.byte	0x22
 	.8byte	0
 	.8byte	0
-.LLST268:
-	.8byte	.LVL1056
-	.8byte	.LVL1077
+.LLST270:
+	.8byte	.LVL1058
+	.8byte	.LVL1079
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1082
+	.8byte	.LVL1084
 	.8byte	.LFE275
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST269:
-	.8byte	.LVL1057
-	.8byte	.LVL1066
+.LLST271:
+	.8byte	.LVL1059
+	.8byte	.LVL1068
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1086
+	.8byte	.LVL1088
 	.8byte	.LFE275
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST270:
-	.8byte	.LVL1059
-	.8byte	.LVL1060
+.LLST272:
+	.8byte	.LVL1061
+	.8byte	.LVL1062
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1060
-	.8byte	.LVL1062-1
+	.8byte	.LVL1062
+	.8byte	.LVL1064-1
 	.2byte	0x2
 	.byte	0x83
 	.sleb128 24
-	.8byte	.LVL1062-1
-	.8byte	.LVL1081
+	.8byte	.LVL1064-1
+	.8byte	.LVL1083
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 256
-	.8byte	.LVL1081
-	.8byte	.LVL1082
+	.8byte	.LVL1083
+	.8byte	.LVL1084
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 112
-	.8byte	.LVL1082
+	.8byte	.LVL1084
 	.8byte	.LFE275
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 256
 	.8byte	0
 	.8byte	0
-.LLST271:
-	.8byte	.LVL1059
-	.8byte	.LVL1078
+.LLST273:
+	.8byte	.LVL1061
+	.8byte	.LVL1080
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1082
+	.8byte	.LVL1084
 	.8byte	.LFE275
 	.2byte	0x1
 	.byte	0x67
 	.8byte	0
 	.8byte	0
-.LLST272:
-	.8byte	.LVL1061
-	.8byte	.LVL1081
+.LLST274:
+	.8byte	.LVL1063
+	.8byte	.LVL1083
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 268
-	.8byte	.LVL1081
-	.8byte	.LVL1082
+	.8byte	.LVL1083
+	.8byte	.LVL1084
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 124
-	.8byte	.LVL1082
+	.8byte	.LVL1084
 	.8byte	.LFE275
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 268
 	.8byte	0
 	.8byte	0
-.LLST273:
-	.8byte	.LVL1063
-	.8byte	.LVL1079
+.LLST275:
+	.8byte	.LVL1065
+	.8byte	.LVL1081
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL1082
+	.8byte	.LVL1084
 	.8byte	.LFE275
 	.2byte	0x1
 	.byte	0x69
 	.8byte	0
 	.8byte	0
-.LLST461:
-	.8byte	.LVL2078
-	.8byte	.LVL2081
+.LLST463:
+	.8byte	.LVL2080
+	.8byte	.LVL2083
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL2090
 	.8byte	.LVL2092
+	.8byte	.LVL2094
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL2093
+	.8byte	.LVL2095
 	.8byte	.LFE274
 	.2byte	0x1
 	.byte	0x66
@@ -46599,85 +46732,81 @@ __func__.7630:
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST256:
-	.8byte	.LVL990
-	.8byte	.LVL997
+.LLST258:
+	.8byte	.LVL992
+	.8byte	.LVL999
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL997
-	.8byte	.LVL998
+	.8byte	.LVL999
+	.8byte	.LVL1000
 	.2byte	0x3
 	.byte	0x75
 	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL998
-	.8byte	.LVL999
+	.8byte	.LVL1000
+	.8byte	.LVL1001
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL1001
-	.8byte	.LVL1002-1
+	.8byte	.LVL1003
+	.8byte	.LVL1004-1
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL1002
 	.8byte	.LVL1004
+	.8byte	.LVL1006
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST257:
-	.8byte	.LVL989
-	.8byte	.LVL1038
+.LLST259:
+	.8byte	.LVL991
+	.8byte	.LVL1040
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 332
-	.8byte	.LVL1038
-	.8byte	.LVL1039
+	.8byte	.LVL1040
+	.8byte	.LVL1041
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 156
-	.8byte	.LVL1039
+	.8byte	.LVL1041
 	.8byte	.LFE270
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 332
 	.8byte	0
 	.8byte	0
-.LLST258:
-	.8byte	.LVL992
-	.8byte	.LVL993-1
+.LLST260:
+	.8byte	.LVL994
+	.8byte	.LVL995-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL993-1
-	.8byte	.LVL996
+	.8byte	.LVL995-1
+	.8byte	.LVL998
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL1005
-	.8byte	.LVL1036
+	.8byte	.LVL1007
+	.8byte	.LVL1038
 	.2byte	0x1
 	.byte	0x6a
 	.8byte	0
 	.8byte	0
-.LLST259:
-	.8byte	.LVL990
-	.8byte	.LVL994
+.LLST261:
+	.8byte	.LVL992
+	.8byte	.LVL996
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL995
-	.8byte	.LVL999
+	.8byte	.LVL997
+	.8byte	.LVL1001
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1001
 	.8byte	.LVL1003
+	.8byte	.LVL1005
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST260:
-	.8byte	.LVL1015
-	.8byte	.LVL1016
-	.2byte	0x1
-	.byte	0x51
+.LLST262:
 	.8byte	.LVL1017
 	.8byte	.LVL1018
 	.2byte	0x1
@@ -46686,10 +46815,10 @@ __func__.7630:
 	.8byte	.LVL1020
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1026
-	.8byte	.LVL1027
+	.8byte	.LVL1021
+	.8byte	.LVL1022
 	.2byte	0x1
-	.byte	0x52
+	.byte	0x51
 	.8byte	.LVL1028
 	.8byte	.LVL1029
 	.2byte	0x1
@@ -46698,11 +46827,11 @@ __func__.7630:
 	.8byte	.LVL1031
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1040
-	.8byte	.LVL1045
+	.8byte	.LVL1032
+	.8byte	.LVL1033
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1046
+	.byte	0x52
+	.8byte	.LVL1042
 	.8byte	.LVL1047
 	.2byte	0x1
 	.byte	0x50
@@ -46710,19 +46839,23 @@ __func__.7630:
 	.8byte	.LVL1049
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1052
-	.8byte	.LVL1053
+	.8byte	.LVL1050
+	.8byte	.LVL1051
 	.2byte	0x1
 	.byte	0x50
 	.8byte	.LVL1054
+	.8byte	.LVL1055
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1056
 	.8byte	.LFE270
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST261:
-	.8byte	.LVL1006
+.LLST263:
 	.8byte	.LVL1008
+	.8byte	.LVL1010
 	.2byte	0x8
 	.byte	0x40
 	.byte	0x8f
@@ -46731,8 +46864,8 @@ __func__.7630:
 	.byte	0x2
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL1009
-	.8byte	.LVL1010
+	.8byte	.LVL1011
+	.8byte	.LVL1012
 	.2byte	0x8
 	.byte	0x40
 	.byte	0x8f
@@ -46741,145 +46874,145 @@ __func__.7630:
 	.byte	0x2
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL1010
-	.8byte	.LVL1011
+	.8byte	.LVL1012
+	.8byte	.LVL1013
 	.2byte	0x5
 	.byte	0x41
 	.byte	0x75
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL1014
-	.8byte	.LVL1021
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1022
+	.8byte	.LVL1016
 	.8byte	.LVL1023
 	.2byte	0x1
 	.byte	0x50
+	.8byte	.LVL1024
 	.8byte	.LVL1025
-	.8byte	.LVL1032
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1033
+	.8byte	.LVL1027
 	.8byte	.LVL1034
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1041
-	.8byte	.LVL1042
+	.8byte	.LVL1035
+	.8byte	.LVL1036
 	.2byte	0x1
-	.byte	0x51
+	.byte	0x50
 	.8byte	.LVL1043
 	.8byte	.LVL1044
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1049
-	.8byte	.LVL1050
+	.8byte	.LVL1045
+	.8byte	.LVL1046
 	.2byte	0x1
-	.byte	0x50
+	.byte	0x51
 	.8byte	.LVL1051
 	.8byte	.LVL1052
 	.2byte	0x1
 	.byte	0x50
+	.8byte	.LVL1053
+	.8byte	.LVL1054
+	.2byte	0x1
+	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST262:
-	.8byte	.LVL1005
-	.8byte	.LVL1036
+.LLST264:
+	.8byte	.LVL1007
+	.8byte	.LVL1038
 	.2byte	0x1
 	.byte	0x6b
 	.8byte	0
 	.8byte	0
-.LLST383:
-	.8byte	.LVL1661
-	.8byte	.LVL1668
+.LLST385:
+	.8byte	.LVL1663
+	.8byte	.LVL1670
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1668
-	.8byte	.LVL1680
+	.8byte	.LVL1670
+	.8byte	.LVL1682
 	.2byte	0x1
 	.byte	0x6a
 	.8byte	0
 	.8byte	0
-.LLST384:
-	.8byte	.LVL1662
-	.8byte	.LVL1679
+.LLST386:
+	.8byte	.LVL1664
+	.8byte	.LVL1681
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST385:
-	.8byte	.LVL1661
-	.8byte	.LVL1668
+.LLST387:
+	.8byte	.LVL1663
+	.8byte	.LVL1670
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1668
-	.8byte	.LVL1674
+	.8byte	.LVL1670
+	.8byte	.LVL1676
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1675
-	.8byte	.LVL1678
+	.8byte	.LVL1677
+	.8byte	.LVL1680
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST252:
-	.8byte	.LVL973
+.LLST254:
 	.8byte	.LVL975
+	.8byte	.LVL977
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL975
-	.8byte	.LVL979
+	.8byte	.LVL977
+	.8byte	.LVL981
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL979
-	.8byte	.LVL980-1
+	.8byte	.LVL981
+	.8byte	.LVL982-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL980-1
-	.8byte	.LVL980
+	.8byte	.LVL982-1
+	.8byte	.LVL982
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL980
-	.8byte	.LVL983
+	.8byte	.LVL982
+	.8byte	.LVL985
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL983
+	.8byte	.LVL985
 	.8byte	.LFE267
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST253:
-	.8byte	.LVL976
-	.8byte	.LVL977
+.LLST255:
+	.8byte	.LVL978
+	.8byte	.LVL979
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL977
-	.8byte	.LVL978-1
+	.8byte	.LVL979
+	.8byte	.LVL980-1
 	.2byte	0x9
 	.byte	0x3
 	.8byte	req_sys+4
-	.8byte	.LVL980
-	.8byte	.LVL981
+	.8byte	.LVL982
+	.8byte	.LVL983
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL981
-	.8byte	.LVL982-1
+	.8byte	.LVL983
+	.8byte	.LVL984-1
 	.2byte	0x9
 	.byte	0x3
 	.8byte	req_sys+4
 	.8byte	0
 	.8byte	0
-.LLST254:
-	.8byte	.LVL973
-	.8byte	.LVL974
+.LLST256:
+	.8byte	.LVL975
+	.8byte	.LVL976
 	.2byte	0x7
 	.byte	0x70
 	.sleb128 6
@@ -46888,7 +47021,7 @@ __func__.7630:
 	.byte	0x31
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL983
+	.8byte	.LVL985
 	.8byte	.LFE267
 	.2byte	0x7
 	.byte	0x70
@@ -46900,36 +47033,36 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST255:
-	.8byte	.LVL973
-	.8byte	.LVL974
+.LLST257:
+	.8byte	.LVL975
+	.8byte	.LVL976
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 40
-	.8byte	.LVL983
+	.8byte	.LVL985
 	.8byte	.LFE267
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 40
 	.8byte	0
 	.8byte	0
-.LLST373:
-	.8byte	.LVL1620
-	.8byte	.LVL1623
+.LLST375:
+	.8byte	.LVL1622
+	.8byte	.LVL1625
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1623
-	.8byte	.LVL1627
+	.8byte	.LVL1625
+	.8byte	.LVL1629
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1627
-	.8byte	.LVL1628
+	.8byte	.LVL1629
+	.8byte	.LVL1630
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1628
+	.8byte	.LVL1630
 	.8byte	.LFE265
 	.2byte	0x4
 	.byte	0xf3
@@ -46938,93 +47071,93 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST374:
-	.8byte	.LVL1620
-	.8byte	.LVL1621
+.LLST376:
+	.8byte	.LVL1622
+	.8byte	.LVL1623
 	.2byte	0x3
 	.byte	0x8
 	.byte	0x20
 	.byte	0x9f
-	.8byte	.LVL1621
-	.8byte	.LVL1622
+	.8byte	.LVL1623
+	.8byte	.LVL1624
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.8byte	.LVL1622
 	.8byte	.LVL1624
+	.8byte	.LVL1626
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1627
-	.8byte	.LVL1628
+	.8byte	.LVL1629
+	.8byte	.LVL1630
 	.2byte	0x3
 	.byte	0x8
 	.byte	0x20
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST375:
-	.8byte	.LVL1629
-	.8byte	.LVL1632
+.LLST377:
+	.8byte	.LVL1631
+	.8byte	.LVL1634
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1632
-	.8byte	.LVL1636
+	.8byte	.LVL1634
+	.8byte	.LVL1638
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1637
+	.8byte	.LVL1639
 	.8byte	.LFE264
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST376:
-	.8byte	.LVL1629
-	.8byte	.LVL1630
+.LLST378:
+	.8byte	.LVL1631
+	.8byte	.LVL1632
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1630
-	.8byte	.LVL1635
+	.8byte	.LVL1632
+	.8byte	.LVL1637
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1637
+	.8byte	.LVL1639
 	.8byte	.LFE264
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST377:
-	.8byte	.LVL1629
-	.8byte	.LVL1633
+.LLST379:
+	.8byte	.LVL1631
+	.8byte	.LVL1635
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1633
-	.8byte	.LVL1634
+	.8byte	.LVL1635
+	.8byte	.LVL1636
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1637
-	.8byte	.LVL1655
+	.8byte	.LVL1639
+	.8byte	.LVL1657
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1655
+	.8byte	.LVL1657
 	.8byte	.LFE264
 	.2byte	0x1
 	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST378:
-	.8byte	.LVL1640
-	.8byte	.LVL1655
+.LLST380:
+	.8byte	.LVL1642
+	.8byte	.LVL1657
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST379:
-	.8byte	.LVL1639
-	.8byte	.LVL1642
+.LLST381:
+	.8byte	.LVL1641
+	.8byte	.LVL1644
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL1642
-	.8byte	.LVL1645-1
+	.8byte	.LVL1644
+	.8byte	.LVL1647-1
 	.2byte	0x28
 	.byte	0x85
 	.sleb128 0
@@ -47051,33 +47184,33 @@ __func__.7630:
 	.byte	0x1e
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL1652
-	.8byte	.LVL1655
+	.8byte	.LVL1654
+	.8byte	.LVL1657
 	.2byte	0x1
 	.byte	0x6b
 	.8byte	0
 	.8byte	0
-.LLST380:
-	.8byte	.LVL1638
-	.8byte	.LVL1643
+.LLST382:
+	.8byte	.LVL1640
+	.8byte	.LVL1645
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1643
-	.8byte	.LVL1644
+	.8byte	.LVL1645
+	.8byte	.LVL1646
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 212
-	.8byte	.LVL1644
-	.8byte	.LVL1645-1
+	.8byte	.LVL1646
+	.8byte	.LVL1647-1
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 4
-	.8byte	.LVL1652
-	.8byte	.LVL1653
+	.8byte	.LVL1654
+	.8byte	.LVL1655
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1653
-	.8byte	.LVL1654-1
+	.8byte	.LVL1655
+	.8byte	.LVL1656-1
 	.2byte	0x16
 	.byte	0x8a
 	.sleb128 0
@@ -47092,30 +47225,30 @@ __func__.7630:
 	.byte	0x22
 	.8byte	0
 	.8byte	0
-.LLST381:
-	.8byte	.LVL1629
-	.8byte	.LVL1633
+.LLST383:
+	.8byte	.LVL1631
+	.8byte	.LVL1635
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1633
-	.8byte	.LVL1634
+	.8byte	.LVL1635
+	.8byte	.LVL1636
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1637
-	.8byte	.LVL1655
+	.8byte	.LVL1639
+	.8byte	.LVL1657
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1655
+	.8byte	.LVL1657
 	.8byte	.LFE264
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST382:
-	.8byte	.LVL1631
-	.8byte	.LVL1632
+.LLST384:
+	.8byte	.LVL1633
+	.8byte	.LVL1634
 	.2byte	0x13
 	.byte	0x70
 	.sleb128 0
@@ -47128,8 +47261,8 @@ __func__.7630:
 	.byte	0x1a
 	.byte	0x25
 	.byte	0x9f
-	.8byte	.LVL1632
-	.8byte	.LVL1633
+	.8byte	.LVL1634
+	.8byte	.LVL1635
 	.2byte	0x13
 	.byte	0x85
 	.sleb128 0
@@ -47142,15 +47275,15 @@ __func__.7630:
 	.byte	0x1a
 	.byte	0x25
 	.byte	0x9f
-	.8byte	.LVL1633
-	.8byte	.LVL1634
+	.8byte	.LVL1635
+	.8byte	.LVL1636
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL1637
-	.8byte	.LVL1655
+	.8byte	.LVL1639
+	.8byte	.LVL1657
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL1655
+	.8byte	.LVL1657
 	.8byte	.LFE264
 	.2byte	0x13
 	.byte	0x85
@@ -47166,102 +47299,102 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST365:
-	.8byte	.LVL1591
-	.8byte	.LVL1594
+.LLST367:
+	.8byte	.LVL1593
+	.8byte	.LVL1596
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1594
-	.8byte	.LVL1598
+	.8byte	.LVL1596
+	.8byte	.LVL1600
 	.2byte	0x1
 	.byte	0x6c
-	.8byte	.LVL1599
-	.8byte	.LVL1610
+	.8byte	.LVL1601
+	.8byte	.LVL1612
 	.2byte	0x1
 	.byte	0x6c
-	.8byte	.LVL1613
+	.8byte	.LVL1615
 	.8byte	.LFE263
 	.2byte	0x1
 	.byte	0x6c
 	.8byte	0
 	.8byte	0
-.LLST366:
-	.8byte	.LVL1591
-	.8byte	.LVL1592
+.LLST368:
+	.8byte	.LVL1593
+	.8byte	.LVL1594
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1592
-	.8byte	.LVL1597
+	.8byte	.LVL1594
+	.8byte	.LVL1599
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1599
-	.8byte	.LVL1609
+	.8byte	.LVL1601
+	.8byte	.LVL1611
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1613
+	.8byte	.LVL1615
 	.8byte	.LFE263
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST367:
-	.8byte	.LVL1591
-	.8byte	.LVL1595
+.LLST369:
+	.8byte	.LVL1593
+	.8byte	.LVL1597
 	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL1595
-	.8byte	.LVL1596
+	.byte	0x52
+	.8byte	.LVL1597
+	.8byte	.LVL1598
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1599
-	.8byte	.LVL1618
+	.8byte	.LVL1601
+	.8byte	.LVL1620
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1618
+	.8byte	.LVL1620
 	.8byte	.LFE263
 	.2byte	0x1
 	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST368:
-	.8byte	.LVL1602
-	.8byte	.LVL1618
+.LLST370:
+	.8byte	.LVL1604
+	.8byte	.LVL1620
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST369:
-	.8byte	.LVL1601
-	.8byte	.LVL1607
+.LLST371:
+	.8byte	.LVL1603
+	.8byte	.LVL1609
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1615
-	.8byte	.LVL1618
+	.8byte	.LVL1617
+	.8byte	.LVL1620
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST370:
-	.8byte	.LVL1600
-	.8byte	.LVL1604
+.LLST372:
+	.8byte	.LVL1602
+	.8byte	.LVL1606
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1604
-	.8byte	.LVL1605
+	.8byte	.LVL1606
+	.8byte	.LVL1607
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 212
-	.8byte	.LVL1605
-	.8byte	.LVL1606-1
+	.8byte	.LVL1607
+	.8byte	.LVL1608-1
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 4
-	.8byte	.LVL1615
-	.8byte	.LVL1616
+	.8byte	.LVL1617
+	.8byte	.LVL1618
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1616
-	.8byte	.LVL1617-1
+	.8byte	.LVL1618
+	.8byte	.LVL1619-1
 	.2byte	0x16
 	.byte	0x85
 	.sleb128 0
@@ -47276,30 +47409,30 @@ __func__.7630:
 	.byte	0x22
 	.8byte	0
 	.8byte	0
-.LLST371:
-	.8byte	.LVL1591
-	.8byte	.LVL1595
+.LLST373:
+	.8byte	.LVL1593
+	.8byte	.LVL1597
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1595
-	.8byte	.LVL1596
+	.8byte	.LVL1597
+	.8byte	.LVL1598
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1599
-	.8byte	.LVL1618
+	.8byte	.LVL1601
+	.8byte	.LVL1620
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1618
+	.8byte	.LVL1620
 	.8byte	.LFE263
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST372:
-	.8byte	.LVL1593
-	.8byte	.LVL1594
+.LLST374:
+	.8byte	.LVL1595
+	.8byte	.LVL1596
 	.2byte	0x13
 	.byte	0x70
 	.sleb128 0
@@ -47312,8 +47445,8 @@ __func__.7630:
 	.byte	0x1a
 	.byte	0x25
 	.byte	0x9f
-	.8byte	.LVL1594
-	.8byte	.LVL1595
+	.8byte	.LVL1596
+	.8byte	.LVL1597
 	.2byte	0x13
 	.byte	0x8c
 	.sleb128 0
@@ -47326,29 +47459,29 @@ __func__.7630:
 	.byte	0x1a
 	.byte	0x25
 	.byte	0x9f
-	.8byte	.LVL1595
-	.8byte	.LVL1596
+	.8byte	.LVL1597
+	.8byte	.LVL1598
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1599
-	.8byte	.LVL1611
+	.8byte	.LVL1601
+	.8byte	.LVL1613
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1611
-	.8byte	.LVL1612-1
+	.8byte	.LVL1613
+	.8byte	.LVL1614-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1612-1
-	.8byte	.LVL1613
+	.8byte	.LVL1614-1
+	.8byte	.LVL1615
 	.2byte	0x3
 	.byte	0x85
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL1613
-	.8byte	.LVL1618
+	.8byte	.LVL1615
+	.8byte	.LVL1620
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1618
+	.8byte	.LVL1620
 	.8byte	.LFE263
 	.2byte	0x13
 	.byte	0x8c
@@ -47364,12 +47497,12 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST237:
-	.8byte	.LVL914
-	.8byte	.LVL918
+.LLST239:
+	.8byte	.LVL916
+	.8byte	.LVL920
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL918
+	.8byte	.LVL920
 	.8byte	.LFE262
 	.2byte	0x4
 	.byte	0xf3
@@ -47378,110 +47511,110 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST238:
-	.8byte	.LVL914
-	.8byte	.LVL915
+.LLST240:
+	.8byte	.LVL916
+	.8byte	.LVL917
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL915
-	.8byte	.LVL932
+	.8byte	.LVL917
+	.8byte	.LVL934
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL932
-	.8byte	.LVL933
+	.8byte	.LVL934
+	.8byte	.LVL935
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL933
+	.8byte	.LVL935
 	.8byte	.LFE262
 	.2byte	0x1
 	.byte	0x67
 	.8byte	0
 	.8byte	0
-.LLST239:
-	.8byte	.LVL914
-	.8byte	.LVL919
+.LLST241:
+	.8byte	.LVL916
+	.8byte	.LVL921
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL919
-	.8byte	.LVL932
+	.8byte	.LVL921
+	.8byte	.LVL934
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL932
-	.8byte	.LVL933
+	.8byte	.LVL934
+	.8byte	.LVL935
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x52
 	.byte	0x9f
-	.8byte	.LVL933
+	.8byte	.LVL935
 	.8byte	.LFE262
 	.2byte	0x1
 	.byte	0x68
 	.8byte	0
 	.8byte	0
-.LLST240:
-	.8byte	.LVL920
-	.8byte	.LVL921
+.LLST242:
+	.8byte	.LVL922
+	.8byte	.LVL923
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL922
 	.8byte	.LVL924
+	.8byte	.LVL926
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL924
-	.8byte	.LVL925-1
+	.8byte	.LVL926
+	.8byte	.LVL927-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL925-1
-	.8byte	.LVL927
+	.8byte	.LVL927-1
+	.8byte	.LVL929
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL927
 	.8byte	.LVL929
+	.8byte	.LVL931
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL933
+	.8byte	.LVL935
 	.8byte	.LFE262
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST241:
-	.8byte	.LVL916
-	.8byte	.LVL931
+.LLST243:
+	.8byte	.LVL918
+	.8byte	.LVL933
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL933
+	.8byte	.LVL935
 	.8byte	.LFE262
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST242:
-	.8byte	.LVL917
-	.8byte	.LVL930
+.LLST244:
+	.8byte	.LVL919
+	.8byte	.LVL932
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL933
+	.8byte	.LVL935
 	.8byte	.LFE262
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST328:
-	.8byte	.LVL1361
-	.8byte	.LVL1362
+.LLST330:
+	.8byte	.LVL1363
+	.8byte	.LVL1364
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1363
 	.8byte	.LVL1365
+	.8byte	.LVL1367
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1366
+	.8byte	.LVL1368
 	.8byte	.LFE261
 	.2byte	0x1
 	.byte	0x63
@@ -47565,12 +47698,12 @@ __func__.7630:
 	.byte	0x53
 	.8byte	0
 	.8byte	0
-.LLST235:
-	.8byte	.LVL909
-	.8byte	.LVL910
+.LLST237:
+	.8byte	.LVL911
+	.8byte	.LVL912
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL910
+	.8byte	.LVL912
 	.8byte	.LFE259
 	.2byte	0x4
 	.byte	0xf3
@@ -47579,9 +47712,9 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST236:
-	.8byte	.LVL911
-	.8byte	.LVL912
+.LLST238:
+	.8byte	.LVL913
+	.8byte	.LVL914
 	.2byte	0x9
 	.byte	0x71
 	.sleb128 0
@@ -47591,22 +47724,22 @@ __func__.7630:
 	.2byte	0xffff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL912
-	.8byte	.LVL913-1
+	.8byte	.LVL914
+	.8byte	.LVL915-1
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST222:
-	.8byte	.LVL869
-	.8byte	.LVL870
+.LLST224:
+	.8byte	.LVL871
+	.8byte	.LVL872
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL870
-	.8byte	.LVL884
+	.8byte	.LVL872
+	.8byte	.LVL886
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL884
+	.8byte	.LVL886
 	.8byte	.LFE258
 	.2byte	0x4
 	.byte	0xf3
@@ -47615,16 +47748,16 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST223:
-	.8byte	.LVL869
-	.8byte	.LVL870
+.LLST225:
+	.8byte	.LVL871
+	.8byte	.LVL872
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL870
-	.8byte	.LVL885
+	.8byte	.LVL872
+	.8byte	.LVL887
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL885
+	.8byte	.LVL887
 	.8byte	.LFE258
 	.2byte	0x4
 	.byte	0xf3
@@ -47633,16 +47766,16 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST224:
-	.8byte	.LVL869
-	.8byte	.LVL870
+.LLST226:
+	.8byte	.LVL871
+	.8byte	.LVL872
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL870
-	.8byte	.LVL883
+	.8byte	.LVL872
+	.8byte	.LVL885
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL883
+	.8byte	.LVL885
 	.8byte	.LFE258
 	.2byte	0x4
 	.byte	0xf3
@@ -47651,9 +47784,9 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST225:
-	.8byte	.LVL874
-	.8byte	.LVL875-1
+.LLST227:
+	.8byte	.LVL876
+	.8byte	.LVL877-1
 	.2byte	0x7
 	.byte	0x73
 	.sleb128 0
@@ -47661,8 +47794,8 @@ __func__.7630:
 	.2byte	0xffff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL875-1
-	.8byte	.LVL886
+	.8byte	.LVL877-1
+	.8byte	.LVL888
 	.2byte	0xa
 	.byte	0x8f
 	.sleb128 204
@@ -47672,7 +47805,7 @@ __func__.7630:
 	.2byte	0xffff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL886
+	.8byte	.LVL888
 	.8byte	.LFE258
 	.2byte	0xa
 	.byte	0x8f
@@ -47685,379 +47818,379 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST226:
-	.8byte	.LVL876
-	.8byte	.LVL877
+.LLST228:
+	.8byte	.LVL878
+	.8byte	.LVL879
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL877
-	.8byte	.LVL878-1
+	.8byte	.LVL879
+	.8byte	.LVL880-1
 	.2byte	0x9
 	.byte	0x3
 	.8byte	req_sys+16
 	.8byte	0
 	.8byte	0
-.LLST227:
-	.8byte	.LVL869
-	.8byte	.LVL870
+.LLST229:
+	.8byte	.LVL871
+	.8byte	.LVL872
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL870
-	.8byte	.LVL879
+	.8byte	.LVL872
+	.8byte	.LVL881
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL880
 	.8byte	.LVL882
+	.8byte	.LVL884
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST216:
-	.8byte	.LVL847
+.LLST218:
 	.8byte	.LVL849
+	.8byte	.LVL851
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL849
-	.8byte	.LVL853
+	.8byte	.LVL851
+	.8byte	.LVL855
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL853
-	.8byte	.LVL854
+	.8byte	.LVL855
+	.8byte	.LVL856
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL854
+	.8byte	.LVL856
 	.8byte	.LFE257
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST217:
-	.8byte	.LVL858
-	.8byte	.LVL859
+.LLST219:
+	.8byte	.LVL860
+	.8byte	.LVL861
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL859
 	.8byte	.LVL861
+	.8byte	.LVL863
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL864
-	.8byte	.LVL867
+	.8byte	.LVL866
+	.8byte	.LVL869
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL867
-	.8byte	.LVL868
+	.8byte	.LVL869
+	.8byte	.LVL870
 	.2byte	0x3
 	.byte	0x71
 	.sleb128 1
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST218:
-	.8byte	.LVL858
-	.8byte	.LVL859
+.LLST220:
+	.8byte	.LVL860
+	.8byte	.LVL861
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL859
-	.8byte	.LVL860
+	.8byte	.LVL861
+	.8byte	.LVL862
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL864
-	.8byte	.LVL865
+	.8byte	.LVL866
+	.8byte	.LVL867
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL866
+	.8byte	.LVL868
 	.8byte	.LFE257
 	.2byte	0x1
 	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST219:
-	.8byte	.LVL848
-	.8byte	.LVL852
+.LLST221:
+	.8byte	.LVL850
+	.8byte	.LVL854
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL854
-	.8byte	.LVL855
+	.8byte	.LVL856
+	.8byte	.LVL857
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL855
-	.8byte	.LVL858-1
+	.8byte	.LVL857
+	.8byte	.LVL860-1
 	.2byte	0x2
 	.byte	0x83
 	.sleb128 16
 	.8byte	0
 	.8byte	0
-.LLST220:
-	.8byte	.LVL848
-	.8byte	.LVL849
+.LLST222:
+	.8byte	.LVL850
+	.8byte	.LVL851
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 40
-	.8byte	.LVL849
-	.8byte	.LVL850-1
+	.8byte	.LVL851
+	.8byte	.LVL852-1
 	.2byte	0x2
 	.byte	0x83
 	.sleb128 40
-	.8byte	.LVL854
-	.8byte	.LVL858-1
+	.8byte	.LVL856
+	.8byte	.LVL860-1
 	.2byte	0x2
 	.byte	0x83
 	.sleb128 40
 	.8byte	0
 	.8byte	0
-.LLST221:
-	.8byte	.LVL856
-	.8byte	.LVL857
+.LLST223:
+	.8byte	.LVL858
+	.8byte	.LVL859
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL857
-	.8byte	.LVL858-1
+	.8byte	.LVL859
+	.8byte	.LVL860-1
 	.2byte	0x9
 	.byte	0x3
 	.8byte	p_sys_spare_buf
 	.8byte	0
 	.8byte	0
-.LLST228:
-	.8byte	.LVL887
-	.8byte	.LVL890-1
+.LLST230:
+	.8byte	.LVL889
+	.8byte	.LVL892-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL890-1
-	.8byte	.LVL898
+	.8byte	.LVL892-1
+	.8byte	.LVL900
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL898
 	.8byte	.LVL900
+	.8byte	.LVL902
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL900
+	.8byte	.LVL902
 	.8byte	.LFE256
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST229:
-	.8byte	.LVL892
-	.8byte	.LVL896
+.LLST231:
+	.8byte	.LVL894
+	.8byte	.LVL898
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL900
+	.8byte	.LVL902
 	.8byte	.LFE256
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST230:
-	.8byte	.LVL890
-	.8byte	.LVL891
+.LLST232:
+	.8byte	.LVL892
+	.8byte	.LVL893
 	.2byte	0x1
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 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL894
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 	.8byte	.LVL896
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 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL900
-	.8byte	.LVL905
+	.8byte	.LVL902
+	.8byte	.LVL907
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL906
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 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL888
-	.8byte	.LVL894
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+	.8byte	.LVL890
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 	.2byte	0x1
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 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL889
-	.8byte	.LVL899
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+	.8byte	.LVL891
+	.8byte	.LVL901
 	.2byte	0x1
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-	.8byte	.LVL900
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 	.8byte	.LFE256
 	.2byte	0x1
 	.byte	0x68
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL901
-	.8byte	.LVL904
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+	.8byte	.LVL903
+	.8byte	.LVL906
 	.2byte	0x1
 	.byte	0x6c
-	.8byte	.LVL907
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 	.8byte	.LFE256
 	.2byte	0x1
 	.byte	0x6c
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL824
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 	.8byte	.LVL826
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 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL826
-	.8byte	.LVL831
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 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL831
-	.8byte	.LVL835
+	.8byte	.LVL833
+	.8byte	.LVL837
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL835
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 	.8byte	.LFE254
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL825
-	.8byte	.LVL833
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+	.8byte	.LVL827
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 	.2byte	0x1
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 	.8byte	.LFE254
 	.2byte	0x1
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 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL825
-	.8byte	.LVL830
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+	.8byte	.LVL832
 	.2byte	0x1
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-	.8byte	.LVL841
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 	.2byte	0x1
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 	.8byte	0
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-	.8byte	.LVL825
-	.8byte	.LVL832
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+	.8byte	.LVL827
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 	.2byte	0x1
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 	.8byte	.LFE254
 	.2byte	0x1
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 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL836
-	.8byte	.LVL841
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+	.8byte	.LVL838
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 	.2byte	0x1
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 	.8byte	0
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-	.8byte	.LVL827
-	.8byte	.LVL828
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 	.2byte	0x2
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 	.8byte	.LVL830
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 	.8byte	.LVL837
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-	.8byte	.LVL838
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 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL829
-	.8byte	.LVL830
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 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL830
-	.8byte	.LVL831
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 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL836
-	.8byte	.LVL839
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 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL840
-	.8byte	.LVL841
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 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL841
-	.8byte	.LVL845
+	.8byte	.LVL843
+	.8byte	.LVL847
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL846
+	.8byte	.LVL848
 	.8byte	.LFE254
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL829
-	.8byte	.LVL834
+.LLST216:
+	.8byte	.LVL831
+	.8byte	.LVL836
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL841
+	.8byte	.LVL843
 	.8byte	.LFE254
 	.2byte	0x1
 	.byte	0x6a
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL829
-	.8byte	.LVL830
+.LLST217:
+	.8byte	.LVL831
+	.8byte	.LVL832
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL830
-	.8byte	.LVL834
+	.8byte	.LVL832
+	.8byte	.LVL836
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL841
-	.8byte	.LVL842
+	.8byte	.LVL843
+	.8byte	.LVL844
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL843
+	.8byte	.LVL845
 	.8byte	.LFE254
 	.2byte	0x1
 	.byte	0x69
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL808
-	.8byte	.LVL809
+.LLST206:
+	.8byte	.LVL810
+	.8byte	.LVL811
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL809
-	.8byte	.LVL815
+	.8byte	.LVL811
+	.8byte	.LVL817
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL815
+	.8byte	.LVL817
 	.8byte	.LFE253
 	.2byte	0x4
 	.byte	0xf3
@@ -48066,16 +48199,16 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST205:
-	.8byte	.LVL808
+.LLST207:
 	.8byte	.LVL810
+	.8byte	.LVL812
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL810
-	.8byte	.LVL813
+	.8byte	.LVL812
+	.8byte	.LVL815
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL813
+	.8byte	.LVL815
 	.8byte	.LFE253
 	.2byte	0x4
 	.byte	0xf3
@@ -48084,12 +48217,12 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST206:
-	.8byte	.LVL812
-	.8byte	.LVL816
+.LLST208:
+	.8byte	.LVL814
+	.8byte	.LVL818
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL817
+	.8byte	.LVL819
 	.8byte	.LFE253
 	.2byte	0x1
 	.byte	0x68
@@ -49047,16 +49180,16 @@ __func__.7630:
 	.byte	0x5b
 	.8byte	0
 	.8byte	0
-.LLST182:
-	.8byte	.LVL676
-	.8byte	.LVL677
+.LLST184:
+	.8byte	.LVL678
+	.8byte	.LVL679
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL677
-	.8byte	.LVL685
+	.8byte	.LVL679
+	.8byte	.LVL687
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL685
+	.8byte	.LVL687
 	.8byte	.LFE240
 	.2byte	0x4
 	.byte	0xf3
@@ -49065,12 +49198,12 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST183:
-	.8byte	.LVL676
-	.8byte	.LVL679-1
+.LLST185:
+	.8byte	.LVL678
+	.8byte	.LVL681-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL679-1
+	.8byte	.LVL681-1
 	.8byte	.LFE240
 	.2byte	0x4
 	.byte	0xf3
@@ -49079,37 +49212,37 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST184:
-	.8byte	.LVL678
-	.8byte	.LVL684
+.LLST186:
+	.8byte	.LVL680
+	.8byte	.LVL686
 	.2byte	0xa
 	.byte	0x3
 	.8byte	gSysFreeQueue
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL680
-	.8byte	.LVL681
+.LLST187:
+	.8byte	.LVL682
+	.8byte	.LVL683
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL681
 	.8byte	.LVL683
+	.8byte	.LVL685
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL805
-	.8byte	.LVL806
+.LLST205:
+	.8byte	.LVL807
+	.8byte	.LVL808
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL806
-	.8byte	.LVL807-1
+	.8byte	.LVL808
+	.8byte	.LVL809-1
 	.2byte	0x9
 	.byte	0x3
 	.8byte	gSysFreeQueue
-	.8byte	.LVL807-1
+	.8byte	.LVL809-1
 	.8byte	.LFE237
 	.2byte	0x4
 	.byte	0xf3
@@ -49118,23 +49251,23 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL618
-	.8byte	.LVL622
+.LLST163:
+	.8byte	.LVL620
+	.8byte	.LVL624
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL622
-	.8byte	.LVL629
+	.8byte	.LVL624
+	.8byte	.LVL631
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL629
 	.8byte	.LVL631
+	.8byte	.LVL633
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL631
+	.8byte	.LVL633
 	.8byte	.LFE236
 	.2byte	0x4
 	.byte	0xf3
@@ -49143,69 +49276,69 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL618
-	.8byte	.LVL619
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+	.8byte	.LVL620
+	.8byte	.LVL621
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL619
-	.8byte	.LVL628
+	.8byte	.LVL621
+	.8byte	.LVL630
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL628
-	.8byte	.LVL629
+	.8byte	.LVL630
+	.8byte	.LVL631
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL629
-	.8byte	.LVL630
+	.8byte	.LVL631
+	.8byte	.LVL632
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL630
+	.8byte	.LVL632
 	.8byte	.LFE236
 	.2byte	0x1
 	.byte	0x67
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL623
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 	.8byte	.LVL625
+	.8byte	.LVL627
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL625
-	.8byte	.LVL626
+	.8byte	.LVL627
+	.8byte	.LVL628
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL631
+	.8byte	.LVL633
 	.8byte	.LFE236
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL623
-	.8byte	.LVL627
+.LLST166:
+	.8byte	.LVL625
+	.8byte	.LVL629
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL631
-	.8byte	.LVL634
+	.8byte	.LVL633
+	.8byte	.LVL636
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL635
+	.8byte	.LVL637
 	.8byte	.LFE236
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL632
-	.8byte	.LVL636
+.LLST167:
+	.8byte	.LVL634
+	.8byte	.LVL638
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL636
+	.8byte	.LVL638
 	.8byte	.LFE236
 	.2byte	0x3
 	.byte	0x84
@@ -49213,9 +49346,9 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL620
-	.8byte	.LVL621
+.LLST168:
+	.8byte	.LVL622
+	.8byte	.LVL623
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
@@ -49491,179 +49624,179 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL1546
-	.8byte	.LVL1547
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 	.byte	0x9f
-	.8byte	.LVL1547
 	.8byte	.LVL1549
+	.8byte	.LVL1551
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1557
-	.8byte	.LVL1562
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+	.8byte	.LVL1564
 	.2byte	0x1
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-	.8byte	.LVL1562
-	.8byte	.LVL1563
+	.8byte	.LVL1564
+	.8byte	.LVL1565
 	.2byte	0x3
 	.byte	0x86
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL1563
-	.8byte	.LVL1583
+	.8byte	.LVL1565
+	.8byte	.LVL1585
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-	.8byte	.LVL1548
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 	.8byte	.LVL1550
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-	.8byte	.LVL1590-1
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-	.8byte	.LVL1559
-	.8byte	.LVL1564
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-	.8byte	.LVL1576
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-	.8byte	.LVL1558
-	.8byte	.LVL1579
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+	.8byte	.LVL1581
 	.2byte	0x1
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-	.8byte	.LVL608
-	.8byte	.LVL609
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-	.8byte	.LVL611
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 	.8byte	.LFE230
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 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL612
-	.8byte	.LVL616
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 	.2byte	0x1
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-	.8byte	.LVL617
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 	.8byte	.LFE230
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-	.8byte	.LVL608
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 	.8byte	.LVL610
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-	.8byte	.LVL611
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 	.8byte	.LFE230
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-	.8byte	.LVL1532
-	.8byte	.LVL1533
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+	.8byte	.LVL1535
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-	.8byte	.LVL1542
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-	.8byte	.LVL1542
-	.8byte	.LVL1543
+	.8byte	.LVL1544
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 	.2byte	0x3
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 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL1543
-	.8byte	.LVL1544
+	.8byte	.LVL1545
+	.8byte	.LVL1546
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST358:
-	.8byte	.LVL1522
-	.8byte	.LVL1525
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1534
-	.8byte	.LVL1535
+.LLST360:
+	.8byte	.LVL1524
+	.8byte	.LVL1527
 	.2byte	0x1
 	.byte	0x63
 	.8byte	.LVL1536
 	.8byte	.LVL1537
 	.2byte	0x1
 	.byte	0x63
+	.8byte	.LVL1538
+	.8byte	.LVL1539
+	.2byte	0x1
+	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST359:
-	.8byte	.LVL1528
-	.8byte	.LVL1532
+.LLST361:
+	.8byte	.LVL1530
+	.8byte	.LVL1534
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1537
 	.8byte	.LVL1539
+	.8byte	.LVL1541
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1540
-	.8byte	.LVL1541
+	.8byte	.LVL1542
+	.8byte	.LVL1543
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST360:
-	.8byte	.LVL1520
-	.8byte	.LVL1531
+.LLST362:
+	.8byte	.LVL1522
+	.8byte	.LVL1533
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1534
-	.8byte	.LVL1541
+	.8byte	.LVL1536
+	.8byte	.LVL1543
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1544
+	.8byte	.LVL1546
 	.8byte	.LFE229
 	.2byte	0x1
 	.byte	0x65
@@ -49701,102 +49834,102 @@ __func__.7630:
 	.byte	0x55
 	.8byte	0
 	.8byte	0
-.LLST306:
-	.8byte	.LVL1243
-	.8byte	.LVL1244
+.LLST308:
+	.8byte	.LVL1245
+	.8byte	.LVL1246
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1255
-	.8byte	.LVL1256
+	.8byte	.LVL1257
+	.8byte	.LVL1258
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1256
-	.8byte	.LVL1257
+	.8byte	.LVL1258
+	.8byte	.LVL1259
 	.2byte	0x3
 	.byte	0x88
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL1257
-	.8byte	.LVL1258
+	.8byte	.LVL1259
+	.8byte	.LVL1260
 	.2byte	0x1
 	.byte	0x68
 	.8byte	0
 	.8byte	0
-.LLST307:
-	.8byte	.LVL1242
-	.8byte	.LVL1247
+.LLST309:
+	.8byte	.LVL1244
+	.8byte	.LVL1249
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1247
-	.8byte	.LVL1255
+	.8byte	.LVL1249
+	.8byte	.LVL1257
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL1255
-	.8byte	.LVL1258
+	.8byte	.LVL1257
+	.8byte	.LVL1260
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1258
-	.8byte	.LVL1259
+	.8byte	.LVL1260
+	.8byte	.LVL1261
 	.2byte	0x3
 	.byte	0x89
 	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL1260
-	.8byte	.LVL1263
+	.8byte	.LVL1262
+	.8byte	.LVL1265
 	.2byte	0x3
 	.byte	0x89
 	.sleb128 1
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST308:
-	.8byte	.LVL1245
-	.8byte	.LVL1255
+.LLST310:
+	.8byte	.LVL1247
+	.8byte	.LVL1257
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL1258
-	.8byte	.LVL1261
+	.8byte	.LVL1260
+	.8byte	.LVL1263
 	.2byte	0x1
 	.byte	0x6b
 	.8byte	0
 	.8byte	0
-.LLST309:
-	.8byte	.LVL1242
-	.8byte	.LVL1247
+.LLST311:
+	.8byte	.LVL1244
+	.8byte	.LVL1249
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1247
-	.8byte	.LVL1252
+	.8byte	.LVL1249
+	.8byte	.LVL1254
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1253
 	.8byte	.LVL1255
+	.8byte	.LVL1257
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1255
-	.8byte	.LVL1258
+	.8byte	.LVL1257
+	.8byte	.LVL1260
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1258
-	.8byte	.LVL1262
+	.8byte	.LVL1260
+	.8byte	.LVL1264
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST201:
-	.8byte	.LVL797
-	.8byte	.LVL798
+.LLST203:
+	.8byte	.LVL799
+	.8byte	.LVL800
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL798
-	.8byte	.LVL803
+	.8byte	.LVL800
+	.8byte	.LVL805
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL803
+	.8byte	.LVL805
 	.8byte	.LFE225
 	.2byte	0x4
 	.byte	0xf3
@@ -49805,16 +49938,16 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST202:
-	.8byte	.LVL797
+.LLST204:
 	.8byte	.LVL799
+	.8byte	.LVL801
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL799
-	.8byte	.LVL802
+	.8byte	.LVL801
+	.8byte	.LVL804
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL802
+	.8byte	.LVL804
 	.8byte	.LFE225
 	.2byte	0x4
 	.byte	0xf3
@@ -50147,16 +50280,16 @@ __func__.7630:
 	.byte	0x53
 	.8byte	0
 	.8byte	0
-.LLST458:
-	.8byte	.LVL2071
-	.8byte	.LVL2074
+.LLST460:
+	.8byte	.LVL2073
+	.8byte	.LVL2076
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2074
-	.8byte	.LVL2075-1
+	.8byte	.LVL2076
+	.8byte	.LVL2077-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL2075-1
+	.8byte	.LVL2077-1
 	.8byte	.LFE220
 	.2byte	0x4
 	.byte	0xf3
@@ -50165,16 +50298,16 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST459:
-	.8byte	.LVL2071
+.LLST461:
 	.8byte	.LVL2073
+	.8byte	.LVL2075
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL2073
-	.8byte	.LVL2075-1
+	.8byte	.LVL2075
+	.8byte	.LVL2077-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL2075-1
+	.8byte	.LVL2077-1
 	.8byte	.LFE220
 	.2byte	0x4
 	.byte	0xf3
@@ -50183,16 +50316,16 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST460:
-	.8byte	.LVL2071
-	.8byte	.LVL2072
+.LLST462:
+	.8byte	.LVL2073
+	.8byte	.LVL2074
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL2072
-	.8byte	.LVL2075-1
+	.8byte	.LVL2074
+	.8byte	.LVL2077-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL2075-1
+	.8byte	.LVL2077-1
 	.8byte	.LFE220
 	.2byte	0x4
 	.byte	0xf3
@@ -50201,16 +50334,16 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST440:
-	.8byte	.LVL1978
-	.8byte	.LVL1981
+.LLST442:
+	.8byte	.LVL1980
+	.8byte	.LVL1983
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1981
-	.8byte	.LVL1982-1
+	.8byte	.LVL1983
+	.8byte	.LVL1984-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1982-1
+	.8byte	.LVL1984-1
 	.8byte	.LFE219
 	.2byte	0x4
 	.byte	0xf3
@@ -50219,16 +50352,16 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST441:
-	.8byte	.LVL1978
+.LLST443:
 	.8byte	.LVL1980
+	.8byte	.LVL1982
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1980
-	.8byte	.LVL1982-1
+	.8byte	.LVL1982
+	.8byte	.LVL1984-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1982-1
+	.8byte	.LVL1984-1
 	.8byte	.LFE219
 	.2byte	0x4
 	.byte	0xf3
@@ -50237,16 +50370,16 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST442:
-	.8byte	.LVL1978
-	.8byte	.LVL1979
+.LLST444:
+	.8byte	.LVL1980
+	.8byte	.LVL1981
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1979
-	.8byte	.LVL1982-1
+	.8byte	.LVL1981
+	.8byte	.LVL1984-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1982-1
+	.8byte	.LVL1984-1
 	.8byte	.LFE219
 	.2byte	0x4
 	.byte	0xf3
@@ -50255,61 +50388,61 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST398:
-	.8byte	.LVL1738
+.LLST400:
 	.8byte	.LVL1740
+	.8byte	.LVL1742
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1740
-	.8byte	.LVL1741
+	.8byte	.LVL1742
+	.8byte	.LVL1743
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1741
 	.8byte	.LVL1743
+	.8byte	.LVL1745
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1743
-	.8byte	.LVL1746
+	.8byte	.LVL1745
+	.8byte	.LVL1748
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1746
-	.8byte	.LVL1761
+	.8byte	.LVL1748
+	.8byte	.LVL1763
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1761
+	.8byte	.LVL1763
 	.8byte	.LFE218
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST399:
-	.8byte	.LVL1738
-	.8byte	.LVL1739
+.LLST401:
+	.8byte	.LVL1740
+	.8byte	.LVL1741
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1739
-	.8byte	.LVL1742
+	.8byte	.LVL1741
+	.8byte	.LVL1744
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1743
+	.8byte	.LVL1745
 	.8byte	.LFE218
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST400:
-	.8byte	.LVL1746
-	.8byte	.LVL1751
+.LLST402:
+	.8byte	.LVL1748
+	.8byte	.LVL1753
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1751
-	.8byte	.LVL1752
+	.8byte	.LVL1753
+	.8byte	.LVL1754
 	.2byte	0x2a
 	.byte	0xf3
 	.uleb128 0x1
@@ -50340,9 +50473,9 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST401:
-	.8byte	.LVL1747
-	.8byte	.LVL1748
+.LLST403:
+	.8byte	.LVL1749
+	.8byte	.LVL1750
 	.2byte	0x25
 	.byte	0x71
 	.sleb128 0
@@ -50372,8 +50505,8 @@ __func__.7630:
 	.byte	0x16
 	.byte	0x13
 	.byte	0x9f
-	.8byte	.LVL1748
 	.8byte	.LVL1750
+	.8byte	.LVL1752
 	.2byte	0x2e
 	.byte	0x3
 	.8byte	c_ftl_nand_sec_pre_page
@@ -50407,26 +50540,26 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST402:
-	.8byte	.LVL1745
-	.8byte	.LVL1761
+.LLST404:
+	.8byte	.LVL1747
+	.8byte	.LVL1763
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST403:
-	.8byte	.LVL1757
-	.8byte	.LVL1758-1
+.LLST405:
+	.8byte	.LVL1759
+	.8byte	.LVL1760-1
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST443:
-	.8byte	.LVL1983
-	.8byte	.LVL1986
+.LLST445:
+	.8byte	.LVL1985
+	.8byte	.LVL1988
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1986
+	.8byte	.LVL1988
 	.8byte	.LFE217
 	.2byte	0x4
 	.byte	0xf3
@@ -50435,140 +50568,140 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST444:
-	.8byte	.LVL1983
+.LLST446:
 	.8byte	.LVL1985
+	.8byte	.LVL1987
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1985
 	.8byte	.LVL1987
+	.8byte	.LVL1989
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1989
-	.8byte	.LVL1992
+	.8byte	.LVL1991
+	.8byte	.LVL1994
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1992
-	.8byte	.LVL2016
+	.8byte	.LVL1994
+	.8byte	.LVL2018
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL2024
-	.8byte	.LVL2030
+	.8byte	.LVL2026
+	.8byte	.LVL2032
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL2031
-	.8byte	.LVL2070
+	.8byte	.LVL2033
+	.8byte	.LVL2072
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL2070
+	.8byte	.LVL2072
 	.8byte	.LFE217
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST445:
-	.8byte	.LVL1983
-	.8byte	.LVL1984
+.LLST447:
+	.8byte	.LVL1985
+	.8byte	.LVL1986
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1984
-	.8byte	.LVL1988
+	.8byte	.LVL1986
+	.8byte	.LVL1990
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL1989
-	.8byte	.LVL1990
+	.8byte	.LVL1991
+	.8byte	.LVL1992
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1990
+	.8byte	.LVL1992
 	.8byte	.LFE217
 	.2byte	0x1
 	.byte	0x69
 	.8byte	0
 	.8byte	0
-.LLST446:
-	.8byte	.LVL1983
-	.8byte	.LVL1987-1
+.LLST448:
+	.8byte	.LVL1985
+	.8byte	.LVL1989-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1987-1
-	.8byte	.LVL1988
+	.8byte	.LVL1989-1
+	.8byte	.LVL1990
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL1989
 	.8byte	.LVL1991
+	.8byte	.LVL1993
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1991
-	.8byte	.LVL2070
+	.8byte	.LVL1993
+	.8byte	.LVL2072
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL2070
+	.8byte	.LVL2072
 	.8byte	.LFE217
 	.2byte	0x1
 	.byte	0x53
 	.8byte	0
 	.8byte	0
-.LLST447:
-	.8byte	.LVL2044
-	.8byte	.LVL2066
+.LLST449:
+	.8byte	.LVL2046
+	.8byte	.LVL2068
 	.2byte	0x1
 	.byte	0x6b
 	.8byte	0
 	.8byte	0
-.LLST448:
-	.8byte	.LVL1997
-	.8byte	.LVL1998
+.LLST450:
+	.8byte	.LVL1999
+	.8byte	.LVL2000
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1998
-	.8byte	.LVL2018
+	.8byte	.LVL2000
+	.8byte	.LVL2020
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL2037
-	.8byte	.LVL2070
+	.8byte	.LVL2039
+	.8byte	.LVL2072
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST449:
-	.8byte	.LVL1993
-	.8byte	.LVL2017
+.LLST451:
+	.8byte	.LVL1995
+	.8byte	.LVL2019
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL2024
-	.8byte	.LVL2030
+	.8byte	.LVL2026
+	.8byte	.LVL2032
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL2031
-	.8byte	.LVL2070
+	.8byte	.LVL2033
+	.8byte	.LVL2072
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST450:
-	.8byte	.LVL1994
-	.8byte	.LVL1995
+.LLST452:
+	.8byte	.LVL1996
+	.8byte	.LVL1997
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1995
-	.8byte	.LVL2070
+	.8byte	.LVL1997
+	.8byte	.LVL2072
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 344
 	.8byte	0
 	.8byte	0
-.LLST451:
-	.8byte	.LVL2042
-	.8byte	.LVL2043
+.LLST453:
+	.8byte	.LVL2044
+	.8byte	.LVL2045
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2043
 	.8byte	.LVL2045
+	.8byte	.LVL2047
 	.2byte	0x2
 	.byte	0x71
 	.sleb128 4
-	.8byte	.LVL2045
-	.8byte	.LVL2046-1
+	.8byte	.LVL2047
+	.8byte	.LVL2048-1
 	.2byte	0xf
 	.byte	0x3
 	.8byte	req_prgm
@@ -50580,51 +50713,51 @@ __func__.7630:
 	.uleb128 0x4
 	.8byte	0
 	.8byte	0
-.LLST452:
-	.8byte	.LVL2009
-	.8byte	.LVL2014
+.LLST454:
+	.8byte	.LVL2011
+	.8byte	.LVL2016
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 360
-	.8byte	.LVL2040
-	.8byte	.LVL2052
+	.8byte	.LVL2042
+	.8byte	.LVL2054
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 360
-	.8byte	.LVL2052
-	.8byte	.LVL2053
+	.8byte	.LVL2054
+	.8byte	.LVL2055
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL2053
-	.8byte	.LVL2070
+	.8byte	.LVL2055
+	.8byte	.LVL2072
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 360
 	.8byte	0
 	.8byte	0
-.LLST453:
-	.8byte	.LVL1996
-	.8byte	.LVL2029
+.LLST455:
+	.8byte	.LVL1998
+	.8byte	.LVL2031
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL2029
-	.8byte	.LVL2030
+	.8byte	.LVL2031
+	.8byte	.LVL2032
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL2031
-	.8byte	.LVL2037
+	.8byte	.LVL2033
+	.8byte	.LVL2039
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL2037
-	.8byte	.LVL2070
+	.8byte	.LVL2039
+	.8byte	.LVL2072
 	.2byte	0x1
 	.byte	0x68
 	.8byte	0
 	.8byte	0
-.LLST454:
-	.8byte	.LVL2005
-	.8byte	.LVL2006
+.LLST456:
+	.8byte	.LVL2007
+	.8byte	.LVL2008
 	.2byte	0x21
 	.byte	0x83
 	.sleb128 7
@@ -50652,52 +50785,52 @@ __func__.7630:
 	.byte	0x16
 	.byte	0x13
 	.byte	0x9f
-	.8byte	.LVL2006
-	.8byte	.LVL2007
+	.8byte	.LVL2008
+	.8byte	.LVL2009
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2007
-	.8byte	.LVL2010
+	.8byte	.LVL2009
+	.8byte	.LVL2012
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 336
-	.8byte	.LVL2010
-	.8byte	.LVL2011
+	.8byte	.LVL2012
+	.8byte	.LVL2013
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL2011
 	.8byte	.LVL2013
+	.8byte	.LVL2015
 	.2byte	0x3
 	.byte	0x8b
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL2013
-	.8byte	.LVL2014
+	.8byte	.LVL2015
+	.8byte	.LVL2016
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL2040
-	.8byte	.LVL2066
+	.8byte	.LVL2042
+	.8byte	.LVL2068
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 336
-	.8byte	.LVL2066
-	.8byte	.LVL2070
+	.8byte	.LVL2068
+	.8byte	.LVL2072
 	.2byte	0x1
 	.byte	0x6b
 	.8byte	0
 	.8byte	0
-.LLST455:
-	.8byte	.LVL1997
-	.8byte	.LVL1998
+.LLST457:
+	.8byte	.LVL1999
+	.8byte	.LVL2000
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL2025
 	.8byte	.LVL2027
+	.8byte	.LVL2029
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2027
-	.8byte	.LVL2029-1
+	.8byte	.LVL2029
+	.8byte	.LVL2031-1
 	.2byte	0x16
 	.byte	0x86
 	.sleb128 0
@@ -50713,108 +50846,108 @@ __func__.7630:
 	.byte	0x1e
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL2047
-	.8byte	.LVL2048
+	.8byte	.LVL2049
+	.8byte	.LVL2050
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2048
 	.8byte	.LVL2050
+	.8byte	.LVL2052
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 340
-	.8byte	.LVL2053
 	.8byte	.LVL2055
+	.8byte	.LVL2057
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL2055
-	.8byte	.LVL2056
+	.8byte	.LVL2057
+	.8byte	.LVL2058
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 340
-	.8byte	.LVL2057
-	.8byte	.LVL2065
+	.8byte	.LVL2059
+	.8byte	.LVL2067
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 340
 	.8byte	0
 	.8byte	0
-.LLST456:
-	.8byte	.LVL1997
-	.8byte	.LVL1998
+.LLST458:
+	.8byte	.LVL1999
+	.8byte	.LVL2000
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL2026
 	.8byte	.LVL2028
+	.8byte	.LVL2030
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL2028
 	.8byte	.LVL2030
+	.8byte	.LVL2032
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2031
-	.8byte	.LVL2037
+	.8byte	.LVL2033
+	.8byte	.LVL2039
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2049
-	.8byte	.LVL2050
+	.8byte	.LVL2051
+	.8byte	.LVL2052
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 348
-	.8byte	.LVL2054
-	.8byte	.LVL2055
+	.8byte	.LVL2056
+	.8byte	.LVL2057
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2055
-	.8byte	.LVL2056
+	.8byte	.LVL2057
+	.8byte	.LVL2058
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 348
-	.8byte	.LVL2057
-	.8byte	.LVL2065
+	.8byte	.LVL2059
+	.8byte	.LVL2067
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 348
 	.8byte	0
 	.8byte	0
-.LLST457:
-	.8byte	.LVL1997
-	.8byte	.LVL1998
+.LLST459:
+	.8byte	.LVL1999
+	.8byte	.LVL2000
 	.2byte	0xa
 	.byte	0x3
 	.8byte	g_active_superblock
 	.byte	0x9f
-	.8byte	.LVL1998
-	.8byte	.LVL2002
+	.8byte	.LVL2000
+	.8byte	.LVL2004
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2004
-	.8byte	.LVL2019
+	.8byte	.LVL2006
+	.8byte	.LVL2021
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2037
 	.8byte	.LVL2039
+	.8byte	.LVL2041
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2040
-	.8byte	.LVL2070
+	.8byte	.LVL2042
+	.8byte	.LVL2072
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST391:
-	.8byte	.LVL1712
-	.8byte	.LVL1715-1
+.LLST393:
+	.8byte	.LVL1714
+	.8byte	.LVL1717-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1715-1
-	.8byte	.LVL1715
+	.8byte	.LVL1717-1
+	.8byte	.LVL1717
 	.2byte	0x3
 	.byte	0x84
 	.sleb128 -4
 	.byte	0x9f
-	.8byte	.LVL1715
+	.8byte	.LVL1717
 	.8byte	.LFE215
 	.2byte	0x4
 	.byte	0xf3
@@ -50823,12 +50956,12 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST392:
-	.8byte	.LVL1712
-	.8byte	.LVL1715-1
+.LLST394:
+	.8byte	.LVL1714
+	.8byte	.LVL1717-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1715-1
+	.8byte	.LVL1717-1
 	.8byte	.LFE215
 	.2byte	0x4
 	.byte	0xf3
@@ -50837,12 +50970,12 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST393:
-	.8byte	.LVL1712
-	.8byte	.LVL1713
+.LLST395:
+	.8byte	.LVL1714
+	.8byte	.LVL1715
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1713
+	.8byte	.LVL1715
 	.8byte	.LFE215
 	.2byte	0x4
 	.byte	0xf3
@@ -50851,16 +50984,16 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST394:
-	.8byte	.LVL1712
+.LLST396:
 	.8byte	.LVL1714
+	.8byte	.LVL1716
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1714
-	.8byte	.LVL1731
+	.8byte	.LVL1716
+	.8byte	.LVL1733
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1731
+	.8byte	.LVL1733
 	.8byte	.LFE215
 	.2byte	0x4
 	.byte	0xf3
@@ -50869,42 +51002,42 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST395:
-	.8byte	.LVL1724
-	.8byte	.LVL1727-1
+.LLST397:
+	.8byte	.LVL1726
+	.8byte	.LVL1729-1
 	.2byte	0x1
 	.byte	0x53
 	.8byte	0
 	.8byte	0
-.LLST396:
-	.8byte	.LVL1716
-	.8byte	.LVL1717
+.LLST398:
+	.8byte	.LVL1718
+	.8byte	.LVL1719
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1726
-	.8byte	.LVL1727-1
+	.8byte	.LVL1728
+	.8byte	.LVL1729-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1727-1
-	.8byte	.LVL1729
+	.8byte	.LVL1729-1
+	.8byte	.LVL1731
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST397:
-	.8byte	.LVL1723
-	.8byte	.LVL1725-1
+.LLST399:
+	.8byte	.LVL1725
+	.8byte	.LVL1727-1
 	.2byte	0x2
 	.byte	0x86
 	.sleb128 16
 	.8byte	0
 	.8byte	0
-.LLST423:
-	.8byte	.LVL1929
-	.8byte	.LVL1932
+.LLST425:
+	.8byte	.LVL1931
+	.8byte	.LVL1934
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1932
+	.8byte	.LVL1934
 	.8byte	.LFE214
 	.2byte	0x4
 	.byte	0xf3
@@ -50913,139 +51046,139 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST424:
-	.8byte	.LVL1929
+.LLST426:
 	.8byte	.LVL1931
+	.8byte	.LVL1933
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1931
-	.8byte	.LVL1935
+	.8byte	.LVL1933
+	.8byte	.LVL1937
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1935
-	.8byte	.LVL1938
+	.8byte	.LVL1937
+	.8byte	.LVL1940
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL1938
-	.8byte	.LVL1939
+	.8byte	.LVL1940
+	.8byte	.LVL1941
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1939
+	.8byte	.LVL1941
 	.8byte	.LFE214
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST425:
-	.8byte	.LVL1929
-	.8byte	.LVL1930
+.LLST427:
+	.8byte	.LVL1931
+	.8byte	.LVL1932
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1930
-	.8byte	.LVL1937
+	.8byte	.LVL1932
+	.8byte	.LVL1939
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL1937
-	.8byte	.LVL1938
+	.8byte	.LVL1939
+	.8byte	.LVL1940
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x52
 	.byte	0x9f
-	.8byte	.LVL1938
-	.8byte	.LVL1940-1
+	.8byte	.LVL1940
+	.8byte	.LVL1942-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1940-1
-	.8byte	.LVL1977
+	.8byte	.LVL1942-1
+	.8byte	.LVL1979
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL1977
+	.8byte	.LVL1979
 	.8byte	.LFE214
 	.2byte	0x1
 	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST426:
-	.8byte	.LVL1929
-	.8byte	.LVL1933-1
+.LLST428:
+	.8byte	.LVL1931
+	.8byte	.LVL1935-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1933-1
-	.8byte	.LVL1936
+	.8byte	.LVL1935-1
+	.8byte	.LVL1938
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1936
 	.8byte	.LVL1938
+	.8byte	.LVL1940
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x53
 	.byte	0x9f
-	.8byte	.LVL1938
-	.8byte	.LVL1940-1
+	.8byte	.LVL1940
+	.8byte	.LVL1942-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1940-1
-	.8byte	.LVL1977
+	.8byte	.LVL1942-1
+	.8byte	.LVL1979
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1977
+	.8byte	.LVL1979
 	.8byte	.LFE214
 	.2byte	0x1
 	.byte	0x53
 	.8byte	0
 	.8byte	0
-.LLST427:
-	.8byte	.LVL1929
-	.8byte	.LVL1934
+.LLST429:
+	.8byte	.LVL1931
+	.8byte	.LVL1936
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1938
-	.8byte	.LVL1945
+	.8byte	.LVL1940
+	.8byte	.LVL1947
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1945
-	.8byte	.LVL1956
+	.8byte	.LVL1947
+	.8byte	.LVL1958
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1958
-	.8byte	.LVL1977
+	.8byte	.LVL1960
+	.8byte	.LVL1979
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1977
+	.8byte	.LVL1979
 	.8byte	.LFE214
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST428:
-	.8byte	.LVL1941
-	.8byte	.LVL1977
+.LLST430:
+	.8byte	.LVL1943
+	.8byte	.LVL1979
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	0
-	.8byte	0
-.LLST429:
-	.8byte	.LVL1942
-	.8byte	.LVL1977
+	.8byte	0
+	.8byte	0
+.LLST431:
+	.8byte	.LVL1944
+	.8byte	.LVL1979
 	.2byte	0x1
 	.byte	0x68
 	.8byte	0
 	.8byte	0
-.LLST430:
-	.8byte	.LVL1960
-	.8byte	.LVL1961
+.LLST432:
+	.8byte	.LVL1962
+	.8byte	.LVL1963
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1961
-	.8byte	.LVL1962-1
+	.8byte	.LVL1963
+	.8byte	.LVL1964-1
 	.2byte	0x16
 	.byte	0x3
 	.8byte	c_ftl_nand_sec_pre_page
@@ -51063,53 +51196,53 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST431:
-	.8byte	.LVL1943
+.LLST433:
 	.8byte	.LVL1945
+	.8byte	.LVL1947
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL1945
-	.8byte	.LVL1977
+	.8byte	.LVL1947
+	.8byte	.LVL1979
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST432:
-	.8byte	.LVL1952
+.LLST434:
 	.8byte	.LVL1954
+	.8byte	.LVL1956
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST433:
-	.8byte	.LVL1943
+.LLST435:
 	.8byte	.LVL1945
+	.8byte	.LVL1947
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1945
-	.8byte	.LVL1953
+	.8byte	.LVL1947
+	.8byte	.LVL1955
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL1959
-	.8byte	.LVL1974
+	.8byte	.LVL1961
+	.8byte	.LVL1976
 	.2byte	0x1
 	.byte	0x69
 	.8byte	0
 	.8byte	0
-.LLST434:
-	.8byte	.LVL1943
-	.8byte	.LVL1944
+.LLST436:
+	.8byte	.LVL1945
+	.8byte	.LVL1946
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1944
-	.8byte	.LVL1950
+	.8byte	.LVL1946
+	.8byte	.LVL1952
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 300
-	.8byte	.LVL1950
-	.8byte	.LVL1951
+	.8byte	.LVL1952
+	.8byte	.LVL1953
 	.2byte	0x8
 	.byte	0x8f
 	.sleb128 300
@@ -51118,62 +51251,62 @@ __func__.7630:
 	.byte	0x31
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL1959
-	.8byte	.LVL1974
+	.8byte	.LVL1961
+	.8byte	.LVL1976
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 300
 	.8byte	0
 	.8byte	0
-.LLST435:
-	.8byte	.LVL1929
-	.8byte	.LVL1934
+.LLST437:
+	.8byte	.LVL1931
+	.8byte	.LVL1936
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1938
-	.8byte	.LVL1945
+	.8byte	.LVL1940
+	.8byte	.LVL1947
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1945
-	.8byte	.LVL1966
+	.8byte	.LVL1947
+	.8byte	.LVL1968
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 296
-	.8byte	.LVL1966
-	.8byte	.LVL1967
+	.8byte	.LVL1968
+	.8byte	.LVL1969
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1967
-	.8byte	.LVL1977
+	.8byte	.LVL1969
+	.8byte	.LVL1979
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 296
-	.8byte	.LVL1977
+	.8byte	.LVL1979
 	.8byte	.LFE214
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST436:
-	.8byte	.LVL1938
-	.8byte	.LVL1945
+.LLST438:
+	.8byte	.LVL1940
+	.8byte	.LVL1947
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1945
-	.8byte	.LVL1967
+	.8byte	.LVL1947
+	.8byte	.LVL1969
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 292
-	.8byte	.LVL1967
-	.8byte	.LVL1968
+	.8byte	.LVL1969
+	.8byte	.LVL1970
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1968
-	.8byte	.LVL1969
+	.8byte	.LVL1970
+	.8byte	.LVL1971
 	.2byte	0x9
 	.byte	0x71
 	.sleb128 0
@@ -51183,79 +51316,79 @@ __func__.7630:
 	.byte	0x4
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL1969
-	.8byte	.LVL1970
+	.8byte	.LVL1971
+	.8byte	.LVL1972
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1970
-	.8byte	.LVL1977
+	.8byte	.LVL1972
+	.8byte	.LVL1979
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 292
-	.8byte	.LVL1977
+	.8byte	.LVL1979
 	.8byte	.LFE214
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST437:
-	.8byte	.LVL1938
-	.8byte	.LVL1945
+.LLST439:
+	.8byte	.LVL1940
+	.8byte	.LVL1947
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1945
-	.8byte	.LVL1972
+	.8byte	.LVL1947
+	.8byte	.LVL1974
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 288
-	.8byte	.LVL1972
-	.8byte	.LVL1973
+	.8byte	.LVL1974
+	.8byte	.LVL1975
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1973
-	.8byte	.LVL1977
+	.8byte	.LVL1975
+	.8byte	.LVL1979
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 288
-	.8byte	.LVL1977
+	.8byte	.LVL1979
 	.8byte	.LFE214
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST438:
-	.8byte	.LVL1948
-	.8byte	.LVL1949
+.LLST440:
+	.8byte	.LVL1950
+	.8byte	.LVL1951
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL1959
-	.8byte	.LVL1962-1
+	.8byte	.LVL1961
+	.8byte	.LVL1964-1
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL1962-1
-	.8byte	.LVL1963
+	.8byte	.LVL1964-1
+	.8byte	.LVL1965
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 264
-	.8byte	.LVL1964
-	.8byte	.LVL1965
+	.8byte	.LVL1966
+	.8byte	.LVL1967
 	.2byte	0x1
 	.byte	0x54
 	.8byte	0
 	.8byte	0
-.LLST439:
-	.8byte	.LVL1975
-	.8byte	.LVL1976-1
+.LLST441:
+	.8byte	.LVL1977
+	.8byte	.LVL1978-1
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST467:
-	.8byte	.LVL2171
-	.8byte	.LVL2172
+.LLST469:
+	.8byte	.LVL2173
+	.8byte	.LVL2174
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x1fc1
@@ -51263,8 +51396,8 @@ __func__.7630:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL2172
-	.8byte	.LVL2173
+	.8byte	.LVL2174
+	.8byte	.LVL2175
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x1fc2
@@ -51272,8 +51405,8 @@ __func__.7630:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL2173
-	.8byte	.LVL2174
+	.8byte	.LVL2175
+	.8byte	.LVL2176
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x1fc1
@@ -51283,118 +51416,118 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST463:
-	.8byte	.LVL2128
-	.8byte	.LVL2129
+.LLST465:
+	.8byte	.LVL2130
+	.8byte	.LVL2131
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL2131
-	.8byte	.LVL2132
+	.8byte	.LVL2133
+	.8byte	.LVL2134
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL2141
-	.8byte	.LVL2142
+	.8byte	.LVL2143
+	.8byte	.LVL2144
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL2142
-	.8byte	.LVL2143-1
+	.8byte	.LVL2144
+	.8byte	.LVL2145-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2145
-	.8byte	.LVL2146
+	.8byte	.LVL2147
+	.8byte	.LVL2148
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL2150
-	.8byte	.LVL2151
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL2151
-	.8byte	.LVL2152-1
-	.2byte	0x1
-	.byte	0x50
 	.8byte	.LVL2152
 	.8byte	.LVL2153
 	.2byte	0x1
 	.byte	0x63
 	.8byte	.LVL2153
+	.8byte	.LVL2154-1
+	.2byte	0x1
+	.byte	0x50
 	.8byte	.LVL2154
+	.8byte	.LVL2155
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL2155
+	.8byte	.LVL2156
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL2154
-	.8byte	.LVL2155-1
+	.8byte	.LVL2156
+	.8byte	.LVL2157-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2157
-	.8byte	.LVL2158
+	.8byte	.LVL2159
+	.8byte	.LVL2160
 	.2byte	0x1
 	.byte	0x68
 	.8byte	0
 	.8byte	0
-.LLST464:
-	.8byte	.LVL2131
-	.8byte	.LVL2135
+.LLST466:
+	.8byte	.LVL2133
+	.8byte	.LVL2137
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2153
-	.8byte	.LVL2156
+	.8byte	.LVL2155
+	.8byte	.LVL2158
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2157
-	.8byte	.LVL2158
+	.8byte	.LVL2159
+	.8byte	.LVL2160
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST465:
-	.8byte	.LVL2127
-	.8byte	.LVL2128
+.LLST467:
+	.8byte	.LVL2129
+	.8byte	.LVL2130
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL2128
 	.8byte	.LVL2130
+	.8byte	.LVL2132
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2141
-	.8byte	.LVL2144
+	.8byte	.LVL2143
+	.8byte	.LVL2146
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2145
 	.8byte	.LVL2147
+	.8byte	.LVL2149
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2149
-	.8byte	.LVL2150
+	.8byte	.LVL2151
+	.8byte	.LVL2152
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST466:
-	.8byte	.LVL2126
+.LLST468:
 	.8byte	.LVL2128
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL2138
-	.8byte	.LVL2139
+	.8byte	.LVL2130
 	.2byte	0x1
 	.byte	0x50
 	.8byte	.LVL2140
 	.8byte	.LVL2141
 	.2byte	0x1
 	.byte	0x50
+	.8byte	.LVL2142
+	.8byte	.LVL2143
+	.2byte	0x1
+	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST186:
-	.8byte	.LVL686
-	.8byte	.LVL687
+.LLST188:
+	.8byte	.LVL688
+	.8byte	.LVL689
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL687
-	.8byte	.LVL712
+	.8byte	.LVL689
+	.8byte	.LVL714
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL712
+	.8byte	.LVL714
 	.8byte	.LFE209
 	.2byte	0x4
 	.byte	0xf3
@@ -51403,16 +51536,16 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST187:
-	.8byte	.LVL686
-	.8byte	.LVL689
+.LLST189:
+	.8byte	.LVL688
+	.8byte	.LVL691
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL689
-	.8byte	.LVL712
+	.8byte	.LVL691
+	.8byte	.LVL714
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL712
+	.8byte	.LVL714
 	.8byte	.LFE209
 	.2byte	0x4
 	.byte	0xf3
@@ -51421,256 +51554,256 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST188:
-	.8byte	.LVL686
-	.8byte	.LVL690
+.LLST190:
+	.8byte	.LVL688
+	.8byte	.LVL692
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL690
-	.8byte	.LVL693
+	.8byte	.LVL692
+	.8byte	.LVL695
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL694
-	.8byte	.LVL703
+	.8byte	.LVL696
+	.8byte	.LVL705
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL704
-	.8byte	.LVL711
+	.8byte	.LVL706
+	.8byte	.LVL713
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL713
-	.8byte	.LVL724
+	.8byte	.LVL715
+	.8byte	.LVL726
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL725
+	.8byte	.LVL727
 	.8byte	.LFE209
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST189:
-	.8byte	.LVL686
-	.8byte	.LVL690
+.LLST191:
+	.8byte	.LVL688
+	.8byte	.LVL692
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL690
-	.8byte	.LVL691
+	.8byte	.LVL692
+	.8byte	.LVL693
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL699
-	.8byte	.LVL700
+	.8byte	.LVL701
+	.8byte	.LVL702
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL700
-	.8byte	.LVL710
+	.8byte	.LVL702
+	.8byte	.LVL712
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL713
-	.8byte	.LVL718
+	.8byte	.LVL715
+	.8byte	.LVL720
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL719
-	.8byte	.LVL726
+	.8byte	.LVL721
+	.8byte	.LVL728
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL727
-	.8byte	.LVL732
+	.8byte	.LVL729
+	.8byte	.LVL734
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL733
+	.8byte	.LVL735
 	.8byte	.LFE209
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST190:
-	.8byte	.LVL688
+.LLST192:
 	.8byte	.LVL690
+	.8byte	.LVL692
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL690
-	.8byte	.LVL692-1
+	.8byte	.LVL692
+	.8byte	.LVL694-1
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL699
-	.8byte	.LVL700
+	.8byte	.LVL701
+	.8byte	.LVL702
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL700
-	.8byte	.LVL701-1
+	.8byte	.LVL702
+	.8byte	.LVL703-1
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL701
-	.8byte	.LVL702
+	.8byte	.LVL703
+	.8byte	.LVL704
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL713
-	.8byte	.LVL721
+	.8byte	.LVL715
+	.8byte	.LVL723
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL721
-	.8byte	.LVL722
+	.8byte	.LVL723
+	.8byte	.LVL724
 	.2byte	0x3
 	.byte	0x75
 	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL723
-	.8byte	.LVL726
+	.8byte	.LVL725
+	.8byte	.LVL728
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL727
-	.8byte	.LVL735
+	.8byte	.LVL729
+	.8byte	.LVL737
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL735
-	.8byte	.LVL736
+	.8byte	.LVL737
+	.8byte	.LVL738
 	.2byte	0x3
 	.byte	0x75
 	.sleb128 1
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST191:
-	.8byte	.LVL715
-	.8byte	.LVL720
+.LLST193:
+	.8byte	.LVL717
+	.8byte	.LVL722
 	.2byte	0x1
 	.byte	0x5d
-	.8byte	.LVL720
-	.8byte	.LVL723
+	.8byte	.LVL722
+	.8byte	.LVL725
 	.2byte	0x1
 	.byte	0x5e
-	.8byte	.LVL723
-	.8byte	.LVL726
+	.8byte	.LVL725
+	.8byte	.LVL728
 	.2byte	0x1
 	.byte	0x5d
-	.8byte	.LVL729
-	.8byte	.LVL734
+	.8byte	.LVL731
+	.8byte	.LVL736
 	.2byte	0x1
 	.byte	0x5c
-	.8byte	.LVL734
+	.8byte	.LVL736
 	.8byte	.LFE209
 	.2byte	0x1
 	.byte	0x5d
 	.8byte	0
 	.8byte	0
-.LLST192:
-	.8byte	.LVL686
-	.8byte	.LVL697
+.LLST194:
+	.8byte	.LVL688
+	.8byte	.LVL699
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.8byte	.LVL697
-	.8byte	.LVL698
+	.8byte	.LVL699
+	.8byte	.LVL700
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL699
-	.8byte	.LVL710
+	.8byte	.LVL701
+	.8byte	.LVL712
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL713
-	.8byte	.LVL727
+	.8byte	.LVL715
+	.8byte	.LVL729
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.8byte	.LVL727
+	.8byte	.LVL729
 	.8byte	.LFE209
 	.2byte	0x1
 	.byte	0x6a
 	.8byte	0
 	.8byte	0
-.LLST193:
-	.8byte	.LVL686
-	.8byte	.LVL699
+.LLST195:
+	.8byte	.LVL688
+	.8byte	.LVL701
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL699
-	.8byte	.LVL706
+	.8byte	.LVL701
+	.8byte	.LVL708
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL707
-	.8byte	.LVL708
+	.8byte	.LVL709
+	.8byte	.LVL710
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL713
-	.8byte	.LVL727
+	.8byte	.LVL715
+	.8byte	.LVL729
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL727
+	.8byte	.LVL729
 	.8byte	.LFE209
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST194:
-	.8byte	.LVL686
-	.8byte	.LVL698
+.LLST196:
+	.8byte	.LVL688
+	.8byte	.LVL700
 	.2byte	0x2
 	.byte	0x36
 	.byte	0x9f
-	.8byte	.LVL699
-	.8byte	.LVL710
+	.8byte	.LVL701
+	.8byte	.LVL712
 	.2byte	0x1
 	.byte	0x6c
-	.8byte	.LVL713
-	.8byte	.LVL727
+	.8byte	.LVL715
+	.8byte	.LVL729
 	.2byte	0x2
 	.byte	0x36
 	.byte	0x9f
-	.8byte	.LVL727
+	.8byte	.LVL729
 	.8byte	.LFE209
 	.2byte	0x1
 	.byte	0x6c
 	.8byte	0
 	.8byte	0
-.LLST195:
-	.8byte	.LVL686
-	.8byte	.LVL696
+.LLST197:
+	.8byte	.LVL688
+	.8byte	.LVL698
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL696
 	.8byte	.LVL698
+	.8byte	.LVL700
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.8byte	.LVL699
-	.8byte	.LVL710
+	.8byte	.LVL701
+	.8byte	.LVL712
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL713
-	.8byte	.LVL727
+	.8byte	.LVL715
+	.8byte	.LVL729
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL727
+	.8byte	.LVL729
 	.8byte	.LFE209
 	.2byte	0x1
 	.byte	0x69
 	.8byte	0
 	.8byte	0
-.LLST199:
-	.8byte	.LVL794
-	.8byte	.LVL795
+.LLST201:
+	.8byte	.LVL796
+	.8byte	.LVL797
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST200:
-	.8byte	.LVL741
-	.8byte	.LVL747
+.LLST202:
+	.8byte	.LVL743
+	.8byte	.LVL749
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL748
-	.8byte	.LVL755
+	.8byte	.LVL750
+	.8byte	.LVL757
 	.2byte	0x7
 	.byte	0x83
 	.sleb128 0
@@ -51678,20 +51811,20 @@ __func__.7630:
 	.2byte	0xffff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL757
-	.8byte	.LVL760
+	.8byte	.LVL759
+	.8byte	.LVL762
 	.2byte	0x1
 	.byte	0x6c
-	.8byte	.LVL764
 	.8byte	.LVL766
+	.8byte	.LVL768
 	.2byte	0x1
 	.byte	0x6c
-	.8byte	.LVL766
-	.8byte	.LVL767-1
-	.2byte	0x1
-	.byte	0x50
 	.8byte	.LVL768
 	.8byte	.LVL769-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL770
+	.8byte	.LVL771-1
 	.2byte	0xe
 	.byte	0x3
 	.8byte	c_ftl_nand_max_map_blks
@@ -51700,8 +51833,8 @@ __func__.7630:
 	.byte	0x31
 	.byte	0x24
 	.byte	0x9f
-	.8byte	.LVL776
-	.8byte	.LVL777
+	.8byte	.LVL778
+	.8byte	.LVL779
 	.2byte	0x12
 	.byte	0x3
 	.8byte	c_ftl_nand_map_region_num
@@ -51713,12 +51846,12 @@ __func__.7630:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.8byte	.LVL777
-	.8byte	.LVL778-1
-	.2byte	0x1
-	.byte	0x50
 	.8byte	.LVL779
 	.8byte	.LVL780-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL781
+	.8byte	.LVL782-1
 	.2byte	0xe
 	.byte	0x3
 	.8byte	c_ftl_nand_max_map_blks
@@ -51727,8 +51860,8 @@ __func__.7630:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.8byte	.LVL781
-	.8byte	.LVL782
+	.8byte	.LVL783
+	.8byte	.LVL784
 	.2byte	0x12
 	.byte	0x3
 	.8byte	c_ftl_nand_l2pmap_ram_region_num
@@ -51740,12 +51873,12 @@ __func__.7630:
 	.byte	0x34
 	.byte	0x24
 	.byte	0x9f
-	.8byte	.LVL782
-	.8byte	.LVL783-1
+	.8byte	.LVL784
+	.8byte	.LVL785-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL784
-	.8byte	.LVL785
+	.8byte	.LVL786
+	.8byte	.LVL787
 	.2byte	0x20
 	.byte	0x3
 	.8byte	c_ftl_nand_l2pmap_ram_region_num
@@ -51763,12 +51896,12 @@ __func__.7630:
 	.byte	0x1a
 	.byte	0x1e
 	.byte	0x9f
-	.8byte	.LVL785
-	.8byte	.LVL786-1
+	.8byte	.LVL787
+	.8byte	.LVL788-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL787
-	.8byte	.LVL788
+	.8byte	.LVL789
+	.8byte	.LVL790
 	.2byte	0x12
 	.byte	0x3
 	.8byte	c_ftl_nand_blk_pre_plane
@@ -51780,12 +51913,12 @@ __func__.7630:
 	.byte	0x36
 	.byte	0x1e
 	.byte	0x9f
-	.8byte	.LVL788
-	.8byte	.LVL789-1
+	.8byte	.LVL790
+	.8byte	.LVL791-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL790
-	.8byte	.LVL791
+	.8byte	.LVL792
+	.8byte	.LVL793
 	.2byte	0x15
 	.byte	0x3
 	.8byte	c_ftl_nand_die_num
@@ -51800,8 +51933,8 @@ __func__.7630:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.8byte	.LVL791
-	.8byte	.LVL792
+	.8byte	.LVL793
+	.8byte	.LVL794
 	.2byte	0x26
 	.byte	0x3
 	.8byte	c_ftl_nand_blks_per_die
@@ -51825,8 +51958,8 @@ __func__.7630:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.8byte	.LVL792
-	.8byte	.LVL793-1
+	.8byte	.LVL794
+	.8byte	.LVL795-1
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
@@ -52140,7 +52273,7 @@ __func__.7630:
 	.2byte	0x1
 	.byte	0x50
 	.8byte	.LVL11
-	.8byte	.LFE355
+	.8byte	.LFE356
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -52562,9 +52695,9 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST251:
-	.8byte	.LVL964
-	.8byte	.LVL968
+.LLST253:
+	.8byte	.LVL966
+	.8byte	.LVL970
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x800
@@ -52572,8 +52705,8 @@ __func__.7630:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL969
-	.8byte	.LVL970
+	.8byte	.LVL971
+	.8byte	.LVL972
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x801
@@ -52581,8 +52714,8 @@ __func__.7630:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL970
-	.8byte	.LVL971
+	.8byte	.LVL972
+	.8byte	.LVL973
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x800
@@ -52592,35 +52725,35 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST297:
-	.8byte	.LVL1215
+.LLST299:
 	.8byte	.LVL1217
+	.8byte	.LVL1219
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1217
 	.8byte	.LVL1219
+	.8byte	.LVL1221
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1219
-	.8byte	.LVL1225
+	.8byte	.LVL1221
+	.8byte	.LVL1227
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1225
-	.8byte	.LFE343
+	.8byte	.LVL1227
+	.8byte	.LFE344
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST298:
-	.8byte	.LVL1216
-	.8byte	.LVL1219
+.LLST300:
+	.8byte	.LVL1218
+	.8byte	.LVL1221
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1219
-	.8byte	.LVL1224
+	.8byte	.LVL1221
+	.8byte	.LVL1226
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -52628,16 +52761,16 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST318:
-	.8byte	.LVL1308
-	.8byte	.LVL1309
+.LLST320:
+	.8byte	.LVL1310
+	.8byte	.LVL1311
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1309
-	.8byte	.LVL1312
+	.8byte	.LVL1311
+	.8byte	.LVL1314
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL1312
+	.8byte	.LVL1314
 	.8byte	.LFE317
 	.2byte	0x4
 	.byte	0xf3
@@ -52646,28 +52779,28 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST319:
-	.8byte	.LVL1310
-	.8byte	.LVL1311
+.LLST321:
+	.8byte	.LVL1312
+	.8byte	.LVL1313
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1313
-	.8byte	.LVL1316
+	.8byte	.LVL1315
+	.8byte	.LVL1318
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1317
+	.8byte	.LVL1319
 	.8byte	.LFE317
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST320:
-	.8byte	.LVL1320
-	.8byte	.LVL1321
+.LLST322:
+	.8byte	.LVL1322
+	.8byte	.LVL1323
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1321
-	.8byte	.LVL1322
+	.8byte	.LVL1323
+	.8byte	.LVL1324
 	.2byte	0x6
 	.byte	0x70
 	.sleb128 0
@@ -52675,8 +52808,8 @@ __func__.7630:
 	.sleb128 0
 	.byte	0x22
 	.byte	0x9f
-	.8byte	.LVL1324
-	.8byte	.LVL1325
+	.8byte	.LVL1326
+	.8byte	.LVL1327
 	.2byte	0x6
 	.byte	0x70
 	.sleb128 0
@@ -52686,16 +52819,16 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST321:
-	.8byte	.LVL1326
-	.8byte	.LVL1327
+.LLST323:
+	.8byte	.LVL1328
+	.8byte	.LVL1329
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1327
-	.8byte	.LVL1335
+	.8byte	.LVL1329
+	.8byte	.LVL1337
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1335
+	.8byte	.LVL1337
 	.8byte	.LFE301
 	.2byte	0x4
 	.byte	0xf3
@@ -52704,16 +52837,16 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST322:
-	.8byte	.LVL1328
-	.8byte	.LVL1334
+.LLST324:
+	.8byte	.LVL1330
+	.8byte	.LVL1336
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST325:
-	.8byte	.LVL1348
-	.8byte	.LVL1349-1
+.LLST327:
+	.8byte	.LVL1350
+	.8byte	.LVL1351-1
 	.2byte	0xe
 	.byte	0x3
 	.8byte	g_MaxLpn
@@ -52724,9 +52857,9 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST326:
-	.8byte	.LVL1348
-	.8byte	.LVL1349-1
+.LLST328:
+	.8byte	.LVL1350
+	.8byte	.LVL1351-1
 	.2byte	0x12
 	.byte	0x3
 	.8byte	c_ftl_nand_planes_num
@@ -52738,8 +52871,8 @@ __func__.7630:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.8byte	.LVL1349-1
-	.8byte	.LVL1352
+	.8byte	.LVL1351-1
+	.8byte	.LVL1354
 	.2byte	0x9
 	.byte	0x89
 	.sleb128 0
@@ -52749,8 +52882,8 @@ __func__.7630:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.8byte	.LVL1354
 	.8byte	.LVL1356
+	.8byte	.LVL1358
 	.2byte	0x9
 	.byte	0x89
 	.sleb128 0
@@ -52762,60 +52895,60 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST327:
-	.8byte	.LVL1350
-	.8byte	.LVL1353
+.LLST329:
+	.8byte	.LVL1352
+	.8byte	.LVL1355
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1354
-	.8byte	.LVL1360
+	.8byte	.LVL1356
+	.8byte	.LVL1362
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST411:
-	.8byte	.LVL1830
+.LLST413:
 	.8byte	.LVL1832
+	.8byte	.LVL1834
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1832
-	.8byte	.LVL1845
+	.8byte	.LVL1834
+	.8byte	.LVL1847
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1845
-	.8byte	.LVL1846
+	.8byte	.LVL1847
+	.8byte	.LVL1848
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1846
-	.8byte	.LVL1866
+	.8byte	.LVL1848
+	.8byte	.LVL1868
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1866
 	.8byte	.LVL1868
+	.8byte	.LVL1870
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1868
-	.8byte	.LVL1879
+	.8byte	.LVL1870
+	.8byte	.LVL1881
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1879
-	.8byte	.LVL1926
+	.8byte	.LVL1881
+	.8byte	.LVL1928
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1926
-	.8byte	.LVL1927
+	.8byte	.LVL1928
+	.8byte	.LVL1929
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1927
+	.8byte	.LVL1929
 	.8byte	.LFE319
 	.2byte	0x4
 	.byte	0xf3
@@ -52824,12 +52957,12 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST412:
-	.8byte	.LVL1830
-	.8byte	.LVL1831
+.LLST414:
+	.8byte	.LVL1832
+	.8byte	.LVL1833
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1831
+	.8byte	.LVL1833
 	.8byte	.LFE319
 	.2byte	0x4
 	.byte	0xf3
@@ -52838,16 +52971,16 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST413:
-	.8byte	.LVL1833
-	.8byte	.LVL1845
+.LLST415:
+	.8byte	.LVL1835
+	.8byte	.LVL1847
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL1848
-	.8byte	.LVL1926
+	.8byte	.LVL1850
+	.8byte	.LVL1928
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -52855,28 +52988,28 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST414:
-	.8byte	.LVL1833
-	.8byte	.LVL1845
+.LLST416:
+	.8byte	.LVL1835
+	.8byte	.LVL1847
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1848
-	.8byte	.LVL1866
+	.8byte	.LVL1850
+	.8byte	.LVL1868
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1866
 	.8byte	.LVL1868
+	.8byte	.LVL1870
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1868
-	.8byte	.LVL1879
+	.8byte	.LVL1870
+	.8byte	.LVL1881
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1879
-	.8byte	.LVL1926
+	.8byte	.LVL1881
+	.8byte	.LVL1928
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -52884,120 +53017,120 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST415:
-	.8byte	.LVL1909
-	.8byte	.LVL1910-1
+.LLST417:
+	.8byte	.LVL1911
+	.8byte	.LVL1912-1
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL1910-1
-	.8byte	.LVL1911
+	.8byte	.LVL1912-1
+	.8byte	.LVL1913
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 272
 	.8byte	0
 	.8byte	0
-.LLST416:
-	.8byte	.LVL1890
-	.8byte	.LVL1891
+.LLST418:
+	.8byte	.LVL1892
+	.8byte	.LVL1893
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1891
-	.8byte	.LVL1904
+	.8byte	.LVL1893
+	.8byte	.LVL1906
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL1904
-	.8byte	.LVL1905
+	.8byte	.LVL1906
+	.8byte	.LVL1907
 	.2byte	0x3
 	.byte	0x8b
 	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL1906
-	.8byte	.LVL1926
+	.8byte	.LVL1908
+	.8byte	.LVL1928
 	.2byte	0x1
 	.byte	0x6b
 	.8byte	0
 	.8byte	0
-.LLST417:
-	.8byte	.LVL1892
-	.8byte	.LVL1897
-	.2byte	0x1
-	.byte	0x52
+.LLST419:
+	.8byte	.LVL1894
 	.8byte	.LVL1899
-	.8byte	.LVL1900
 	.2byte	0x1
 	.byte	0x52
 	.8byte	.LVL1901
+	.8byte	.LVL1902
+	.2byte	0x1
+	.byte	0x52
 	.8byte	.LVL1903
+	.8byte	.LVL1905
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST418:
-	.8byte	.LVL1892
+.LLST420:
 	.8byte	.LVL1894
+	.8byte	.LVL1896
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1895
-	.8byte	.LVL1902
+	.8byte	.LVL1897
+	.8byte	.LVL1904
 	.2byte	0x1
 	.byte	0x67
 	.8byte	0
 	.8byte	0
-.LLST419:
-	.8byte	.LVL1893
-	.8byte	.LVL1896
+.LLST421:
+	.8byte	.LVL1895
+	.8byte	.LVL1898
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1896
 	.8byte	.LVL1898
+	.8byte	.LVL1900
 	.2byte	0x2
 	.byte	0x71
 	.sleb128 0
-	.8byte	.LVL1898
-	.8byte	.LVL1899
+	.8byte	.LVL1900
+	.8byte	.LVL1901
 	.2byte	0x2
 	.byte	0x71
 	.sleb128 -2
 	.8byte	0
 	.8byte	0
-.LLST420:
-	.8byte	.LVL1888
-	.8byte	.LVL1926
+.LLST422:
+	.8byte	.LVL1890
+	.8byte	.LVL1928
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 332
 	.8byte	0
 	.8byte	0
-.LLST421:
-	.8byte	.LVL1907
-	.8byte	.LVL1908
+.LLST423:
+	.8byte	.LVL1909
+	.8byte	.LVL1910
 	.2byte	0x2
 	.byte	0x71
 	.sleb128 16
-	.8byte	.LVL1908
-	.8byte	.LVL1916
+	.8byte	.LVL1910
+	.8byte	.LVL1918
 	.2byte	0x1
 	.byte	0x6c
 	.8byte	0
 	.8byte	0
-.LLST422:
-	.8byte	.LVL1838
-	.8byte	.LVL1839
+.LLST424:
+	.8byte	.LVL1840
+	.8byte	.LVL1841
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST462:
-	.8byte	.LVL2108
-	.8byte	.LVL2109
+.LLST464:
+	.8byte	.LVL2110
+	.8byte	.LVL2111
 	.2byte	0xa
 	.byte	0x3
 	.8byte	g_active_superblock
 	.byte	0x9f
-	.8byte	.LVL2109
-	.8byte	.LVL2115
+	.8byte	.LVL2111
+	.8byte	.LVL2117
 	.2byte	0xa
 	.byte	0x3
 	.8byte	g_buffer_superblock
@@ -53005,17 +53138,17 @@ __func__.7630:
 	.8byte	0
 	.8byte	0
 	.section	.debug_aranges,"",@progbits
-	.4byte	0x86c
+	.4byte	0x87c
 	.2byte	0x2
 	.4byte	.Ldebug_info0
 	.byte	0x8
 	.byte	0
 	.2byte	0
 	.2byte	0
-	.8byte	.LFB348
-	.8byte	.LFE348-.LFB348
-	.8byte	.LFB355
-	.8byte	.LFE355-.LFB355
+	.8byte	.LFB349
+	.8byte	.LFE349-.LFB349
+	.8byte	.LFB356
+	.8byte	.LFE356-.LFB356
 	.8byte	.LFB202
 	.8byte	.LFE202-.LFB202
 	.8byte	.LFB203
@@ -53124,22 +53257,24 @@ __func__.7630:
 	.8byte	.LFE337-.LFB337
 	.8byte	.LFB338
 	.8byte	.LFE338-.LFB338
-	.8byte	.LFB340
-	.8byte	.LFE340-.LFB340
+	.8byte	.LFB339
+	.8byte	.LFE339-.LFB339
+	.8byte	.LFB341
+	.8byte	.LFE341-.LFB341
 	.8byte	.LFB230
 	.8byte	.LFE230-.LFB230
 	.8byte	.LFB236
 	.8byte	.LFE236-.LFB236
-	.8byte	.LFB341
-	.8byte	.LFE341-.LFB341
 	.8byte	.LFB342
 	.8byte	.LFE342-.LFB342
+	.8byte	.LFB343
+	.8byte	.LFE343-.LFB343
 	.8byte	.LFB240
 	.8byte	.LFE240-.LFB240
 	.8byte	.LFB209
 	.8byte	.LFE209-.LFB209
-	.8byte	.LFB345
-	.8byte	.LFE345-.LFB345
+	.8byte	.LFB346
+	.8byte	.LFE346-.LFB346
 	.8byte	.LFB206
 	.8byte	.LFE206-.LFB206
 	.8byte	.LFB225
@@ -53190,12 +53325,12 @@ __func__.7630:
 	.8byte	.LFE309-.LFB309
 	.8byte	.LFB310
 	.8byte	.LFE310-.LFB310
-	.8byte	.LFB343
-	.8byte	.LFE343-.LFB343
 	.8byte	.LFB344
 	.8byte	.LFE344-.LFB344
-	.8byte	.LFB346
-	.8byte	.LFE346-.LFB346
+	.8byte	.LFB345
+	.8byte	.LFE345-.LFB345
+	.8byte	.LFB347
+	.8byte	.LFE347-.LFB347
 	.8byte	.LFB226
 	.8byte	.LFE226-.LFB226
 	.8byte	.LFB298
@@ -53276,118 +53411,118 @@ __func__.7630:
 	.8byte	.LFE210-.LFB210
 	.8byte	.LFB211
 	.8byte	.LFE211-.LFB211
-	.8byte	.LFB347
-	.8byte	.LFE347-.LFB347
+	.8byte	.LFB348
+	.8byte	.LFE348-.LFB348
 	.8byte	0
 	.8byte	0
 	.section	.debug_ranges,"",@progbits
 .Ldebug_ranges0:
-	.8byte	.LBB164
-	.8byte	.LBE164
-	.8byte	.LBB167
-	.8byte	.LBE167
+	.8byte	.LBB166
+	.8byte	.LBE166
+	.8byte	.LBB169
+	.8byte	.LBE169
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB168
-	.8byte	.LBE168
-	.8byte	.LBB171
-	.8byte	.LBE171
+	.8byte	.LBB170
+	.8byte	.LBE170
+	.8byte	.LBB173
+	.8byte	.LBE173
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB193
-	.8byte	.LBE193
-	.8byte	.LBB197
-	.8byte	.LBE197
-	.8byte	.LBB198
-	.8byte	.LBE198
+	.8byte	.LBB195
+	.8byte	.LBE195
+	.8byte	.LBB199
+	.8byte	.LBE199
+	.8byte	.LBB200
+	.8byte	.LBE200
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB207
-	.8byte	.LBE207
-	.8byte	.LBB210
-	.8byte	.LBE210
+	.8byte	.LBB209
+	.8byte	.LBE209
+	.8byte	.LBB212
+	.8byte	.LBE212
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB215
-	.8byte	.LBE215
-	.8byte	.LBB216
-	.8byte	.LBE216
+	.8byte	.LBB219
+	.8byte	.LBE219
+	.8byte	.LBB220
+	.8byte	.LBE220
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB221
-	.8byte	.LBE221
-	.8byte	.LBB222
-	.8byte	.LBE222
+	.8byte	.LBB225
+	.8byte	.LBE225
+	.8byte	.LBB226
+	.8byte	.LBE226
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB229
-	.8byte	.LBE229
-	.8byte	.LBB231
-	.8byte	.LBE231
-	.8byte	.LBB232
-	.8byte	.LBE232
 	.8byte	.LBB233
 	.8byte	.LBE233
+	.8byte	.LBB235
+	.8byte	.LBE235
+	.8byte	.LBB236
+	.8byte	.LBE236
+	.8byte	.LBB237
+	.8byte	.LBE237
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB238
-	.8byte	.LBE238
-	.8byte	.LBB239
-	.8byte	.LBE239
+	.8byte	.LBB242
+	.8byte	.LBE242
+	.8byte	.LBB243
+	.8byte	.LBE243
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB248
-	.8byte	.LBE248
 	.8byte	.LBB252
 	.8byte	.LBE252
-	.8byte	.LBB253
-	.8byte	.LBE253
-	.8byte	0
-	.8byte	0
-	.8byte	.LBB262
-	.8byte	.LBE262
-	.8byte	.LBB263
-	.8byte	.LBE263
+	.8byte	.LBB256
+	.8byte	.LBE256
+	.8byte	.LBB257
+	.8byte	.LBE257
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB265
-	.8byte	.LBE265
+	.8byte	.LBB266
+	.8byte	.LBE266
 	.8byte	.LBB267
 	.8byte	.LBE267
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB266
-	.8byte	.LBE266
-	.8byte	.LBB268
-	.8byte	.LBE268
 	.8byte	.LBB269
 	.8byte	.LBE269
-	.8byte	.LBB270
-	.8byte	.LBE270
+	.8byte	.LBB271
+	.8byte	.LBE271
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB287
-	.8byte	.LBE287
-	.8byte	.LBB292
-	.8byte	.LBE292
+	.8byte	.LBB270
+	.8byte	.LBE270
+	.8byte	.LBB272
+	.8byte	.LBE272
+	.8byte	.LBB273
+	.8byte	.LBE273
+	.8byte	.LBB274
+	.8byte	.LBE274
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB289
-	.8byte	.LBE289
-	.8byte	.LBB290
-	.8byte	.LBE290
+	.8byte	.LBB291
+	.8byte	.LBE291
+	.8byte	.LBB296
+	.8byte	.LBE296
 	.8byte	0
 	.8byte	0
+	.8byte	.LBB293
+	.8byte	.LBE293
 	.8byte	.LBB294
 	.8byte	.LBE294
-	.8byte	.LBB295
-	.8byte	.LBE295
 	.8byte	0
 	.8byte	0
-	.8byte	.LFB348
-	.8byte	.LFE348
-	.8byte	.LFB355
-	.8byte	.LFE355
+	.8byte	.LBB298
+	.8byte	.LBE298
+	.8byte	.LBB299
+	.8byte	.LBE299
+	.8byte	0
+	.8byte	0
+	.8byte	.LFB349
+	.8byte	.LFE349
+	.8byte	.LFB356
+	.8byte	.LFE356
 	.8byte	.LFB202
 	.8byte	.LFE202
 	.8byte	.LFB203
@@ -53496,22 +53631,24 @@ __func__.7630:
 	.8byte	.LFE337
 	.8byte	.LFB338
 	.8byte	.LFE338
-	.8byte	.LFB340
-	.8byte	.LFE340
+	.8byte	.LFB339
+	.8byte	.LFE339
+	.8byte	.LFB341
+	.8byte	.LFE341
 	.8byte	.LFB230
 	.8byte	.LFE230
 	.8byte	.LFB236
 	.8byte	.LFE236
-	.8byte	.LFB341
-	.8byte	.LFE341
 	.8byte	.LFB342
 	.8byte	.LFE342
+	.8byte	.LFB343
+	.8byte	.LFE343
 	.8byte	.LFB240
 	.8byte	.LFE240
 	.8byte	.LFB209
 	.8byte	.LFE209
-	.8byte	.LFB345
-	.8byte	.LFE345
+	.8byte	.LFB346
+	.8byte	.LFE346
 	.8byte	.LFB206
 	.8byte	.LFE206
 	.8byte	.LFB225
@@ -53562,12 +53699,12 @@ __func__.7630:
 	.8byte	.LFE309
 	.8byte	.LFB310
 	.8byte	.LFE310
-	.8byte	.LFB343
-	.8byte	.LFE343
 	.8byte	.LFB344
 	.8byte	.LFE344
-	.8byte	.LFB346
-	.8byte	.LFE346
+	.8byte	.LFB345
+	.8byte	.LFE345
+	.8byte	.LFB347
+	.8byte	.LFE347
 	.8byte	.LFB226
 	.8byte	.LFE226
 	.8byte	.LFB298
@@ -53648,18 +53785,18 @@ __func__.7630:
 	.8byte	.LFE210
 	.8byte	.LFB211
 	.8byte	.LFE211
-	.8byte	.LFB347
-	.8byte	.LFE347
+	.8byte	.LFB348
+	.8byte	.LFE348
 	.8byte	0
 	.8byte	0
 	.section	.debug_line,"",@progbits
 .Ldebug_line0:
 	.section	.debug_str,"MS",@progbits,1
-.LASF727:
+.LASF728:
 	.string	"FtlEctTblFlush"
-.LASF590:
+.LASF593:
 	.string	"gc_page_num"
-.LASF606:
+.LASF609:
 	.string	"superBlk"
 .LASF499:
 	.string	"g_gc_bad_block_temp_num"
@@ -53673,9 +53810,9 @@ __func__.7630:
 	.string	"__func__"
 .LASF419:
 	.string	"c_ftl_nand_sys_blks_per_plane"
-.LASF732:
+.LASF733:
 	.string	"nSec"
-.LASF728:
+.LASF729:
 	.string	"forceFlush"
 .LASF107:
 	.string	"bootm_headers"
@@ -53685,7 +53822,7 @@ __func__.7630:
 	.string	"rd_end"
 .LASF492:
 	.string	"p_gc_blk_tbl"
-.LASF787:
+.LASF788:
 	.string	"FtlFreeSysBlkQueueOut"
 .LASF324:
 	.string	"ftl_bbt_blk_header"
@@ -53693,33 +53830,33 @@ __func__.7630:
 	.string	"eth_device"
 .LASF306:
 	.string	"sign"
-.LASF832:
+.LASF833:
 	.string	"sctidx"
-.LASF669:
+.LASF670:
 	.string	"Ftl_load_ext_data"
 .LASF96:
 	.string	"ih_comp"
-.LASF608:
+.LASF587:
 	.string	"block"
 .LASF22:
 	.string	"_Bool"
-.LASF651:
+.LASF652:
 	.string	"min_ec"
-.LASF601:
+.LASF604:
 	.string	"req_read_temp"
 .LASF279:
 	.string	"p_spare"
-.LASF685:
+.LASF686:
 	.string	"recovery_cur_page_ver"
 .LASF506:
 	.string	"g_totle_write_page_count"
 .LASF245:
 	.string	"net_root_path"
-.LASF624:
+.LASF625:
 	.string	"lookup_ppa"
-.LASF817:
+.LASF818:
 	.string	"FtlBbmTblFlush"
-.LASF610:
+.LASF612:
 	.string	"Ftl_get_new_temp_ppa"
 .LASF327:
 	.string	"ftl_data_blk_header"
@@ -53733,9 +53870,9 @@ __func__.7630:
 	.string	"des_ppa"
 .LASF237:
 	.string	"priv"
-.LASF777:
+.LASF778:
 	.string	"insert_free_list"
-.LASF880:
+.LASF882:
 	.ascii	"GNU C11 6.3.1 20170404 -ms"
 	.string	"trict-align -march=armv8-a+nosimd -mlittle-endian -mabi=lp64 -g -Os -fno-builtin -ffreestanding -fshort-wchar -fno-stack-protector -fno-delete-null-pointer-checks -fstack-usage -fno-pic -ffunction-sections -fdata-sections -ffixed-r9 -fno-common -ffixed-x18"
 .LASF21:
@@ -53744,23 +53881,23 @@ __func__.7630:
 	.string	"UCLASS_SPI_GENERIC"
 .LASF477:
 	.string	"g_l2p_last_update_region_id"
-.LASF698:
+.LASF699:
 	.string	"ftl_sb_update_avl_pages"
 .LASF572:
 	.string	"FlashProgPages"
-.LASF856:
+.LASF857:
 	.string	"test_page_num"
-.LASF684:
+.LASF685:
 	.string	"lookup_superblock_id"
 .LASF420:
 	.string	"c_ftl_nand_init_sys_blks_per_plane"
-.LASF865:
+.LASF866:
 	.string	"FtlConstantsInit"
-.LASF593:
+.LASF596:
 	.string	"num_io"
-.LASF868:
+.LASF869:
 	.string	"FtlPrintInfo"
-.LASF744:
+.LASF745:
 	.string	"l2p_flush"
 .LASF378:
 	.string	"rear"
@@ -53772,27 +53909,27 @@ __func__.7630:
 	.string	"c_ftl_nand_page_pre_slc_blk"
 .LASF243:
 	.string	"net_nis_domain"
-.LASF764:
+.LASF765:
 	.string	"List_update_data_list"
-.LASF852:
+.LASF853:
 	.string	"create_first_buffer_superblock"
 .LASF503:
 	.string	"g_gc_merge_free_blk_threshold"
-.LASF693:
+.LASF694:
 	.string	"last_mlc_page_version"
-.LASF630:
+.LASF631:
 	.string	"IsBlkInGcList"
 .LASF235:
 	.string	"next"
 .LASF312:
 	.string	"pBlkVpcTbl"
-.LASF697:
+.LASF698:
 	.string	"FtlReUsePrevPpa"
-.LASF658:
+.LASF659:
 	.string	"update_multiplier_value"
 .LASF411:
 	.string	"c_ftl_nand_totle_phy_blks"
-.LASF874:
+.LASF875:
 	.string	"memcmp"
 .LASF421:
 	.string	"c_ftl_nand_max_sys_blks"
@@ -53808,13 +53945,13 @@ __func__.7630:
 	.string	"UCLASS_I2C_MUX"
 .LASF263:
 	.string	"uclass_id"
-.LASF598:
+.LASF601:
 	.string	"get_new_gc_superblock"
-.LASF622:
+.LASF623:
 	.string	"BOPS_EN"
 .LASF241:
 	.string	"net_netmask"
-.LASF849:
+.LASF850:
 	.string	"bad_block_cnt"
 .LASF424:
 	.string	"c_ftl_nand_max_data_blks"
@@ -53824,13 +53961,13 @@ __func__.7630:
 	.string	"fit_noffset_rd"
 .LASF192:
 	.string	"UCLASS_RTC"
-.LASF809:
+.LASF810:
 	.string	"pBbtHeader"
 .LASF46:
 	.string	"bi_memsize"
 .LASF47:
 	.string	"bi_flashstart"
-.LASF761:
+.LASF762:
 	.string	"minValidPageCount"
 .LASF232:
 	.string	"recv"
@@ -53854,7 +53991,7 @@ __func__.7630:
 	.string	"UCLASS_RKNAND"
 .LASF581:
 	.string	"die_index"
-.LASF804:
+.LASF805:
 	.string	"ver2"
 .LASF434:
 	.string	"gSysFreeQueue"
@@ -53868,6 +54005,8 @@ __func__.7630:
 	.string	"UCLASS_PCI_EMUL"
 .LASF72:
 	.string	"fdt_header"
+.LASF586:
+	.string	"ftl_free"
 .LASF429:
 	.string	"g_MaxLpn"
 .LASF342:
@@ -53880,15 +54019,15 @@ __func__.7630:
 	.string	"off_dt_struct"
 .LASF417:
 	.string	"c_ftl_nand_max_vendor_blks"
-.LASF768:
+.LASF769:
 	.string	"prev_valid_page_count"
-.LASF873:
+.LASF874:
 	.string	"FtlPrintInfo2buf"
 .LASF480:
 	.string	"p_data_block_list_head"
 .LASF265:
 	.string	"NETLOOP_CONTINUE"
-.LASF806:
+.LASF807:
 	.string	"P2V_plane"
 .LASF486:
 	.string	"g_gc_temp_superblock"
@@ -53898,7 +54037,7 @@ __func__.7630:
 	.string	"c_ftl_nand_max_map_blks"
 .LASF302:
 	.string	"BbtMap"
-.LASF743:
+.LASF744:
 	.string	"found_lpa"
 .LASF209:
 	.string	"UCLASS_VIDEO_CONSOLE"
@@ -53906,31 +54045,31 @@ __func__.7630:
 	.string	"last_refresh_read_count"
 .LASF207:
 	.string	"UCLASS_VIDEO"
-.LASF614:
+.LASF616:
 	.string	"current_ppa"
-.LASF851:
+.LASF852:
 	.string	"create_first_active_superblock"
 .LASF313:
 	.string	"pMapPpnTbl"
 .LASF269:
 	.string	"net_state"
-.LASF724:
+.LASF725:
 	.string	"num_page"
 .LASF425:
 	.string	"ftl_gc_temp_power_lost_recovery_flag"
-.LASF613:
+.LASF615:
 	.string	"totle_num"
-.LASF731:
+.LASF732:
 	.string	"Index"
-.LASF681:
+.LASF682:
 	.string	"next_free_active_page"
-.LASF604:
+.LASF607:
 	.string	"spperBlk"
 .LASF65:
 	.string	"IRQ_STACK_START"
 .LASF132:
 	.string	"verify"
-.LASF713:
+.LASF714:
 	.string	"ftl_set_blk_mode"
 .LASF266:
 	.string	"NETLOOP_RESTART"
@@ -53938,11 +54077,11 @@ __func__.7630:
 	.string	"uint8"
 .LASF353:
 	.string	"write_page_count"
-.LASF609:
+.LASF611:
 	.string	"Ftl_gc_temp_data_write_back"
 .LASF295:
 	.string	"erase_blk"
-.LASF722:
+.LASF723:
 	.string	"re_save_vpndata"
 .LASF463:
 	.string	"p_valid_page_count_check_table"
@@ -53952,13 +54091,13 @@ __func__.7630:
 	.string	"g_num_free_superblocks"
 .LASF226:
 	.string	"s_addr"
-.LASF819:
+.LASF820:
 	.string	"re_save_bbmdata"
 .LASF200:
 	.string	"UCLASS_SYSRESET"
-.LASF627:
+.LASF628:
 	.string	"FtlGcUpdatePage"
-.LASF811:
+.LASF812:
 	.string	"FtlLoadFactoryBbt"
 .LASF289:
 	.string	"sec_per_blk"
@@ -53972,11 +54111,11 @@ __func__.7630:
 	.string	"UCLASS_CROS_EC"
 .LASF407:
 	.string	"c_ftl_nand_sec_pre_page_shift"
-.LASF788:
+.LASF789:
 	.string	"IsInFreeQueue"
 .LASF236:
 	.string	"index"
-.LASF745:
+.LASF746:
 	.string	"select_l2p_ram_region"
 .LASF335:
 	.string	"maxDieNum"
@@ -53990,17 +54129,17 @@ __func__.7630:
 	.string	"block_size"
 .LASF90:
 	.string	"ih_load"
-.LASF835:
+.LASF836:
 	.string	"FtlProgPages"
-.LASF664:
+.LASF665:
 	.string	"error_flag"
 .LASF403:
 	.string	"c_ftl_nand_page_pre_blk"
-.LASF794:
+.LASF795:
 	.string	"blk_Id"
 .LASF213:
 	.string	"UCLASS_KEY"
-.LASF875:
+.LASF876:
 	.string	"memcpy"
 .LASF67:
 	.string	"_datarel_start_ofs"
@@ -54022,7 +54161,7 @@ __func__.7630:
 	.string	"g_gc_page_offset"
 .LASF240:
 	.string	"net_gateway"
-.LASF802:
+.LASF803:
 	.string	"ftl_cmp_data_ver"
 .LASF430:
 	.string	"g_VaildLpn"
@@ -54034,41 +54173,41 @@ __func__.7630:
 	.string	"type"
 .LASF40:
 	.string	"lmb_region"
-.LASF632:
+.LASF633:
 	.string	"numREQ"
 .LASF34:
 	.string	"protect"
-.LASF855:
+.LASF856:
 	.string	"max_test_page_num"
-.LASF704:
+.LASF705:
 	.string	"blk_id"
 .LASF349:
 	.string	"GlobalDataVersion"
-.LASF793:
+.LASF794:
 	.string	"erase_flag"
 .LASF362:
 	.string	"last_refresh_data_times"
-.LASF707:
+.LASF708:
 	.string	"totleBlkNum"
-.LASF678:
+.LASF679:
 	.string	"saved_active_page"
-.LASF776:
+.LASF777:
 	.string	"pTmp"
-.LASF602:
+.LASF605:
 	.string	"add_count"
 .LASF547:
 	.string	"ftl_gc_temp_block_bops_scan_page_addr"
 .LASF394:
 	.string	"c_ftl_nand_type"
-.LASF773:
+.LASF774:
 	.string	"pHead"
-.LASF687:
+.LASF688:
 	.string	"recovery_flash_mode"
 .LASF138:
 	.string	"UCLASS_TEST"
 .LASF485:
 	.string	"g_buffer_superblock"
-.LASF649:
+.LASF650:
 	.string	"node_id"
 .LASF397:
 	.string	"c_ftl_nand_blks_per_die"
@@ -54090,9 +54229,9 @@ __func__.7630:
 	.string	"sector_count"
 .LASF406:
 	.string	"c_ftl_nand_sec_pre_page"
-.LASF588:
+.LASF591:
 	.string	"mode"
-.LASF813:
+.LASF814:
 	.string	"FtlLoadBbt"
 .LASF561:
 	.string	"pvForm"
@@ -54100,9 +54239,9 @@ __func__.7630:
 	.string	"padding"
 .LASF460:
 	.string	"p_swl_mul_table"
-.LASF628:
+.LASF629:
 	.string	"src_ppa"
-.LASF682:
+.LASF683:
 	.string	"detected_active_page"
 .LASF389:
 	.string	"ftl_gc_page_item"
@@ -54114,61 +54253,61 @@ __func__.7630:
 	.string	"bi_ethspeed"
 .LASF98:
 	.string	"image_header_t"
-.LASF770:
+.LASF771:
 	.string	"pPrev"
 .LASF474:
 	.string	"g_totle_vendor_block"
-.LASF623:
+.LASF624:
 	.string	"superblock_id"
-.LASF592:
+.LASF595:
 	.string	"plane"
 .LASF11:
 	.string	"phys_addr_t"
 .LASF95:
 	.string	"ih_type"
-.LASF845:
+.LASF846:
 	.string	"sftl_init"
 .LASF2:
 	.string	"unsigned char"
-.LASF611:
+.LASF613:
 	.string	"FtlGcScanTempBlk"
 .LASF109:
 	.string	"legacy_hdr_os_copy"
-.LASF760:
+.LASF761:
 	.string	"vpcTbl"
 .LASF176:
 	.string	"UCLASS_PANEL_BACKLIGHT"
 .LASF339:
 	.string	"activeSuperblockId"
-.LASF803:
+.LASF804:
 	.string	"ver1"
 .LASF280:
 	.string	"nand_phy_info"
-.LASF759:
+.LASF760:
 	.string	"ftl_free_no_use_map_blk"
-.LASF805:
+.LASF806:
 	.string	"P2V_block_in_plane"
 .LASF556:
 	.string	"str1"
 .LASF557:
 	.string	"str2"
-.LASF718:
+.LASF719:
 	.string	"pMapHeader"
 .LASF140:
 	.string	"UCLASS_TEST_BUS"
-.LASF716:
+.LASF717:
 	.string	"FtlScanSysBlk"
 .LASF52:
 	.string	"bi_arm_freq"
-.LASF695:
+.LASF696:
 	.string	"lookup_ppa_ver"
-.LASF752:
+.LASF753:
 	.string	"region_num"
 .LASF476:
 	.string	"p_l2p_map_buf"
 .LASF488:
 	.string	"gp_last_act_superblock"
-.LASF870:
+.LASF871:
 	.string	"Ftl_log2"
 .LASF448:
 	.string	"p_sys_spare_buf"
@@ -54176,7 +54315,7 @@ __func__.7630:
 	.string	"UCLASS_LED"
 .LASF552:
 	.string	"p_current"
-.LASF646:
+.LASF647:
 	.string	"get_new_id"
 .LASF253:
 	.string	"net_rx_packet_len"
@@ -54184,11 +54323,11 @@ __func__.7630:
 	.string	"net_null_ethaddr"
 .LASF543:
 	.string	"g_ect_tbl_power_up_flush"
-.LASF594:
+.LASF597:
 	.string	"physical_block"
 .LASF32:
 	.string	"flash_id"
-.LASF838:
+.LASF839:
 	.string	"absolute_sector"
 .LASF222:
 	.string	"load_addr"
@@ -54196,31 +54335,33 @@ __func__.7630:
 	.string	"PowerLostTimes"
 .LASF501:
 	.string	"g_gc_bad_block_temp_tbl"
+.LASF886:
+	.string	"kfree"
 .LASF464:
 	.string	"p_blk_mode_table"
-.LASF775:
+.LASF776:
 	.string	"List_remove_node"
 .LASF291:
 	.string	"reserved_blk"
-.LASF733:
+.LASF734:
 	.string	"pBuf"
-.LASF791:
+.LASF792:
 	.string	"tmp_ec"
 .LASF484:
 	.string	"g_active_superblock"
-.LASF689:
+.LASF690:
 	.string	"recovery_super_page"
 .LASF437:
 	.string	"req_sys"
 .LASF381:
 	.string	"available_pages"
-.LASF799:
+.LASF800:
 	.string	"high"
-.LASF833:
+.LASF834:
 	.string	"nscts"
 .LASF410:
 	.string	"c_ftl_nand_reserved_blks"
-.LASF700:
+.LASF701:
 	.string	"FtlL2PDataInit"
 .LASF230:
 	.string	"init"
@@ -54230,9 +54371,9 @@ __func__.7630:
 	.string	"check"
 .LASF145:
 	.string	"UCLASS_USB_EMUL"
-.LASF797:
+.LASF798:
 	.string	"FtlFreeSysBlkQueueInit"
-.LASF677:
+.LASF678:
 	.string	"FtlRecoverySuperblock"
 .LASF396:
 	.string	"c_ftl_nand_planes_per_die"
@@ -54242,17 +54383,17 @@ __func__.7630:
 	.string	"ecc_bits"
 .LASF293:
 	.string	"nand_ops"
-.LASF599:
+.LASF602:
 	.string	"tmp_blk"
 .LASF523:
 	.string	"g_gc_head_data_block"
-.LASF828:
+.LASF829:
 	.string	"FtlWrite"
 .LASF182:
 	.string	"UCLASS_PINCTRL"
-.LASF831:
+.LASF832:
 	.string	"num_lpa"
-.LASF867:
+.LASF868:
 	.string	"blkNum"
 .LASF364:
 	.string	"SlcPartLbaEndSector"
@@ -54268,11 +54409,11 @@ __func__.7630:
 	.string	"image_len"
 .LASF441:
 	.string	"req_gc"
-.LASF854:
+.LASF855:
 	.string	"is_sys_blk"
 .LASF42:
 	.string	"memory"
-.LASF821:
+.LASF822:
 	.string	"bitmap"
 .LASF319:
 	.string	"ftl_ect_tbl_info"
@@ -54280,41 +54421,41 @@ __func__.7630:
 	.string	"UCLASS_USB_DEV_GENERIC"
 .LASF212:
 	.string	"UCLASS_FG"
-.LASF755:
+.LASF756:
 	.string	"lastMapBlk"
 .LASF370:
 	.string	"totle_write_sector"
 .LASF522:
 	.string	"g_ftl_nand_free_count"
-.LASF626:
+.LASF627:
 	.string	"p_gc_page"
 .LASF20:
 	.string	"errno"
 .LASF532:
 	.string	"gNandPhyInfo"
-.LASF861:
+.LASF862:
 	.string	"ven_blk"
 .LASF30:
 	.string	"size"
 .LASF244:
 	.string	"net_hostname"
-.LASF772:
+.LASF773:
 	.string	"List_pop_head_node"
 .LASF308:
 	.string	"BlkNum"
-.LASF850:
+.LASF851:
 	.string	"sys_bad_block_cnt"
-.LASF596:
+.LASF599:
 	.string	"p_dataHeader"
-.LASF780:
+.LASF781:
 	.string	"tmp_id"
-.LASF600:
+.LASF603:
 	.string	"FtlReadRefresh"
-.LASF645:
+.LASF646:
 	.string	"free_blk_index"
-.LASF820:
+.LASF821:
 	.string	"FtlBbt2Bitmap"
-.LASF662:
+.LASF663:
 	.string	"ftl_check_vpc"
 .LASF108:
 	.string	"legacy_hdr_os"
@@ -54352,13 +54493,13 @@ __func__.7630:
 	.string	"gcTempSuperblockId"
 .LASF238:
 	.string	"eth_current"
-.LASF766:
+.LASF767:
 	.string	"node_valid_page_count"
 .LASF53:
 	.string	"bi_dsp_freq"
 .LASF5:
 	.string	"uchar"
-.LASF668:
+.LASF669:
 	.string	"pages"
 .LASF89:
 	.string	"ih_size"
@@ -54366,13 +54507,13 @@ __func__.7630:
 	.string	"addr"
 .LASF142:
 	.string	"UCLASS_SPI_EMUL"
-.LASF863:
+.LASF864:
 	.string	"FtlMemInit"
-.LASF818:
+.LASF819:
 	.string	"write_count"
-.LASF663:
+.LASF664:
 	.string	"prev_ppa"
-.LASF586:
+.LASF589:
 	.string	"FlashTestBlk"
 .LASF179:
 	.string	"UCLASS_PCI_GENERIC"
@@ -54380,13 +54521,13 @@ __func__.7630:
 	.string	"bi_sramstart"
 .LASF66:
 	.string	"FIQ_STACK_START"
-.LASF872:
+.LASF873:
 	.string	"rknand_proc_ftlread"
 .LASF228:
 	.string	"enetaddr"
 .LASF181:
 	.string	"UCLASS_PINCONFIG"
-.LASF741:
+.LASF742:
 	.string	"l2p_region_id"
 .LASF554:
 	.string	"check_buf"
@@ -54402,7 +54543,7 @@ __func__.7630:
 	.string	"slc_erase_count"
 .LASF60:
 	.string	"bi_busfreq"
-.LASF769:
+.LASF770:
 	.string	"prev_multiplier_value"
 .LASF497:
 	.string	"g_gc_next_blk"
@@ -54412,15 +54553,15 @@ __func__.7630:
 	.string	"UCLASS_BLK"
 .LASF546:
 	.string	"gc_discard_updated"
-.LASF737:
+.LASF738:
 	.string	"FtlVendorPartWrite"
-.LASF621:
+.LASF622:
 	.string	"FtlGcFreeTempBlock"
 .LASF248:
 	.string	"net_ip"
 .LASF229:
 	.string	"iobase"
-.LASF657:
+.LASF658:
 	.string	"GetFreeBlockMinEraseCount"
 .LASF336:
 	.string	"activeFlashMode"
@@ -54428,13 +54569,13 @@ __func__.7630:
 	.string	"ih_dcrc"
 .LASF35:
 	.string	"flash_info_t"
-.LASF655:
+.LASF656:
 	.string	"GetFreeBlockMaxEraseCount"
-.LASF711:
+.LASF712:
 	.string	"sblk"
-.LASF754:
+.LASF755:
 	.string	"ftl_map_blk_gc"
-.LASF877:
+.LASF878:
 	.string	"printf"
 .LASF59:
 	.string	"bi_intfreq"
@@ -54458,23 +54599,23 @@ __func__.7630:
 	.string	"TotleReadBufferMatchCount"
 .LASF438:
 	.string	"req_read"
-.LASF751:
+.LASF752:
 	.string	"Ftl_write_map_blk_to_last_page"
 .LASF466:
 	.string	"p_map_block_valid_page_count"
 .LASF167:
 	.string	"UCLASS_MAILBOX"
-.LASF792:
+.LASF793:
 	.string	"FtlFreeSysBlkQueueIn"
 .LASF366:
 	.string	"readErrorCount"
-.LASF585:
+.LASF588:
 	.string	"sftl_gc"
-.LASF796:
+.LASF797:
 	.string	"FtlFreeSysBlkQueueEmpty"
-.LASF762:
+.LASF763:
 	.string	"load_l2p_region"
-.LASF639:
+.LASF640:
 	.string	"p_superblock"
 .LASF301:
 	.string	"fBbtBlk"
@@ -54482,7 +54623,7 @@ __func__.7630:
 	.string	"off_mem_rsvmap"
 .LASF445:
 	.string	"p_sys_data_buf"
-.LASF883:
+.LASF885:
 	.string	"l2p_addr_tran"
 .LASF164:
 	.string	"UCLASS_KEYBOARD"
@@ -54490,19 +54631,19 @@ __func__.7630:
 	.string	"page_per_slc_blk"
 .LASF398:
 	.string	"c_ftl_nand_blks_per_die_shift"
-.LASF738:
+.LASF739:
 	.string	"log2phys"
 .LASF478:
 	.string	"p_data_block_list_table"
 .LASF171:
 	.string	"UCLASS_MOD_EXP"
-.LASF644:
+.LASF645:
 	.string	"num_bad_block"
 .LASF85:
 	.string	"image_header"
-.LASF701:
+.LASF702:
 	.string	"FtlLoadVonderInfo"
-.LASF612:
+.LASF614:
 	.string	"pSuperblock"
 .LASF535:
 	.string	"ftl_temp_buf"
@@ -54514,7 +54655,7 @@ __func__.7630:
 	.string	"last_comp_version"
 .LASF415:
 	.string	"c_ftl_nand_map_blks_per_plane"
-.LASF810:
+.LASF811:
 	.string	"re_try_next_blk"
 .LASF56:
 	.string	"bi_ip_addr"
@@ -54526,25 +54667,23 @@ __func__.7630:
 	.string	"g_gc_cur_blk_max_valid_pages"
 .LASF16:
 	.string	"ushort"
-.LASF763:
+.LASF764:
 	.string	"phyAddr"
 .LASF73:
 	.string	"magic"
-.LASF790:
+.LASF791:
 	.string	"tmp_blk_id"
-.LASF876:
+.LASF877:
 	.string	"memset"
 .LASF242:
 	.string	"net_dns_server"
 .LASF562:
 	.string	"ftl_memset"
-.LASF830:
+.LASF831:
 	.string	"end_lpa"
-.LASF882:
-	.string	"/home/ldq/rk-linux/u-boot-debug"
-.LASF735:
+.LASF736:
 	.string	"result"
-.LASF625:
+.LASF626:
 	.string	"scan_page_num"
 .LASF267:
 	.string	"NETLOOP_SUCCESS"
@@ -54552,9 +54691,9 @@ __func__.7630:
 	.string	"name"
 .LASF512:
 	.string	"g_totle_cache_write_count"
-.LASF767:
+.LASF768:
 	.string	"node_multiplier_value"
-.LASF758:
+.LASF759:
 	.string	"blk_index"
 .LASF69:
 	.string	"_datarellocal_start_ofs"
@@ -54566,17 +54705,17 @@ __func__.7630:
 	.string	"fit_hdr_setup"
 .LASF150:
 	.string	"UCLASS_CLK"
-.LASF686:
+.LASF687:
 	.string	"detected_error_page"
 .LASF129:
 	.string	"initrd_end"
-.LASF618:
+.LASF620:
 	.string	"read_super_page"
 .LASF219:
 	.string	"monitor_flash_len"
-.LASF620:
+.LASF621:
 	.string	"FtlGcPageVarInit"
-.LASF822:
+.LASF823:
 	.string	"FtlBbtInfoPrint"
 .LASF530:
 	.string	"c_mlc_erase_count_value"
@@ -54584,13 +54723,13 @@ __func__.7630:
 	.string	"mem_malloc_brk"
 .LASF483:
 	.string	"g_num_data_superblocks"
-.LASF753:
+.LASF754:
 	.string	"blkTbl"
 .LASF348:
 	.string	"mlc_erase_count"
 .LASF12:
 	.string	"phys_size_t"
-.LASF715:
+.LASF716:
 	.string	"FtlLoadEctTbl"
 .LASF62:
 	.string	"bi_boot_params"
@@ -54598,11 +54737,11 @@ __func__.7630:
 	.string	"UCLASS_RC"
 .LASF51:
 	.string	"bi_sramsize"
-.LASF879:
+.LASF881:
 	.string	"sprintf"
-.LASF605:
+.LASF608:
 	.string	"FtlGcMarkBadPhyBlk"
-.LASF641:
+.LASF642:
 	.string	"allocate_new_data_superblock"
 .LASF13:
 	.string	"sizetype"
@@ -54614,9 +54753,9 @@ __func__.7630:
 	.string	"GlobalSysVersion"
 .LASF329:
 	.string	"ftl_map_blk_header"
-.LASF597:
+.LASF600:
 	.string	"gc_next_superblock"
-.LASF812:
+.LASF813:
 	.string	"blkAddr"
 .LASF193:
 	.string	"UCLASS_SCSI"
@@ -54626,15 +54765,15 @@ __func__.7630:
 	.string	"signed char"
 .LASF250:
 	.string	"net_tx_packet"
-.LASF696:
+.LASF697:
 	.string	"current_ppa_ver"
-.LASF784:
+.LASF785:
 	.string	"tmp_multiplier_value"
 .LASF566:
 	.string	"FlashEraseBlocks"
 .LASF33:
 	.string	"start"
-.LASF829:
+.LASF830:
 	.string	"start_lpa"
 .LASF553:
 	.string	"current"
@@ -54658,31 +54797,31 @@ __func__.7630:
 	.string	"TotleReadBufferCount3"
 .LASF455:
 	.string	"c_gc_page_buf_num"
-.LASF719:
+.LASF720:
 	.string	"FtlVpcTblFlush"
 .LASF189:
 	.string	"UCLASS_REMOTEPROC"
-.LASF742:
+.LASF743:
 	.string	"lpn_index"
 .LASF118:
 	.string	"fit_hdr_fdt"
-.LASF631:
+.LASF632:
 	.string	"FtlGcBufAlloc"
 .LASF569:
 	.string	"num_req"
-.LASF778:
+.LASF779:
 	.string	"node_erase_count"
 .LASF254:
 	.string	"net_bcast_ethaddr"
-.LASF736:
+.LASF737:
 	.string	"ppn_index"
-.LASF795:
+.LASF796:
 	.string	"FtlFreeSysBlkQueueFull"
 .LASF133:
 	.string	"state"
 .LASF48:
 	.string	"bi_flashsize"
-.LASF746:
+.LASF747:
 	.string	"target_region"
 .LASF19:
 	.string	"__be32"
@@ -54692,7 +54831,7 @@ __func__.7630:
 	.string	"c_ftl_vendor_part_size"
 .LASF251:
 	.string	"net_rx_packets"
-.LASF826:
+.LASF827:
 	.string	"sftl_read"
 .LASF452:
 	.string	"p_gc_spare_buf"
@@ -54708,15 +54847,15 @@ __func__.7630:
 	.string	"p_io_data_buf_1"
 .LASF68:
 	.string	"_datarelrolocal_start_ofs"
-.LASF683:
+.LASF684:
 	.string	"mlc_detected_active_page"
-.LASF853:
+.LASF854:
 	.string	"FtlLowFormatEraseBlock"
 .LASF317:
 	.string	"region_id"
 .LASF326:
 	.string	"sysBlksPerPlane"
-.LASF816:
+.LASF817:
 	.string	"FtlBbtMemInit"
 .LASF309:
 	.string	"maxBlkNum"
@@ -54724,7 +54863,7 @@ __func__.7630:
 	.string	"c_ftl_nand_die_num"
 .LASF286:
 	.string	"page_per_blk"
-.LASF721:
+.LASF722:
 	.string	"prog_error_count"
 .LASF372:
 	.string	"progErrorCount"
@@ -54734,7 +54873,7 @@ __func__.7630:
 	.string	"g_gc_cur_blk_valid_pages"
 .LASF233:
 	.string	"halt"
-.LASF653:
+.LASF654:
 	.string	"maxFreeBlockEraseCount"
 .LASF86:
 	.string	"ih_magic"
@@ -54742,7 +54881,7 @@ __func__.7630:
 	.string	"block_in_die"
 .LASF457:
 	.string	"gp_ect_tbl_info"
-.LASF654:
+.LASF655:
 	.string	"minDataBlockEraseCount"
 .LASF17:
 	.string	"ulong"
@@ -54754,25 +54893,25 @@ __func__.7630:
 	.string	"__u32"
 .LASF249:
 	.string	"net_server_ip"
-.LASF785:
+.LASF786:
 	.string	"INSERT_DATA_LIST"
 .LASF206:
 	.string	"UCLASS_USB_HUB"
-.LASF825:
+.LASF826:
 	.string	"sftl_write"
 .LASF444:
 	.string	"p_plane_order_table"
-.LASF781:
+.LASF782:
 	.string	"insert_data_list"
 .LASF70:
 	.string	"_datarelro_start_ofs"
-.LASF617:
+.LASF619:
 	.string	"ReInit"
 .LASF172:
 	.string	"UCLASS_MTD"
 .LASF134:
 	.string	"bootm_headers_t"
-.LASF729:
+.LASF730:
 	.string	"ec_mod_count"
 .LASF565:
 	.string	"spare"
@@ -54780,13 +54919,13 @@ __func__.7630:
 	.string	"g_recovery_page_num"
 .LASF15:
 	.string	"long int"
-.LASF667:
+.LASF668:
 	.string	"req_temp"
 .LASF141:
 	.string	"UCLASS_TEST_PROBE"
-.LASF881:
+.LASF883:
 	.string	"drivers/rkflash/rksftl/rk_sftl.c"
-.LASF659:
+.LASF660:
 	.string	"FtlSysBlkInit"
 .LASF524:
 	.string	"g_gc_head_data_block_count"
@@ -54802,9 +54941,9 @@ __func__.7630:
 	.string	"g_GlobalSysVersion"
 .LASF511:
 	.string	"g_tmp_data_superblock_id"
-.LASF871:
+.LASF872:
 	.string	"limit"
-.LASF660:
+.LASF661:
 	.string	"ftl_scan_all_data"
 .LASF331:
 	.string	"ftl_sys_blk_header"
@@ -54812,43 +54951,43 @@ __func__.7630:
 	.string	"flag"
 .LASF470:
 	.string	"p_vendor_block_table"
-.LASF679:
+.LASF680:
 	.string	"saved_active_plane"
-.LASF747:
+.LASF748:
 	.string	"hit_count"
-.LASF714:
+.LASF715:
 	.string	"FtlGcReFreshBadBlk"
 .LASF380:
 	.string	"current_page"
 .LASF201:
 	.string	"UCLASS_THERMAL"
-.LASF814:
+.LASF815:
 	.string	"FtlBbtCalcTotleCnt"
-.LASF786:
+.LASF787:
 	.string	"INSERT_FREE_LIST"
 .LASF563:
 	.string	"FlashGetBadBlockList"
-.LASF694:
+.LASF695:
 	.string	"prev_ppa_ver"
 .LASF246:
 	.string	"net_ethaddr"
 .LASF225:
 	.string	"in_addr"
-.LASF844:
+.LASF845:
 	.string	"FtlSysFlush"
 .LASF99:
 	.string	"image_info"
 .LASF88:
 	.string	"ih_time"
-.LASF607:
+.LASF610:
 	.string	"FtlGcRefreshBlock"
 .LASF334:
 	.string	"ftl_sys_save_info"
-.LASF771:
+.LASF772:
 	.string	"List_get_gc_head_node"
 .LASF399:
 	.string	"c_ftl_nand_planes_num"
-.LASF808:
+.LASF809:
 	.string	"FtlMakeBbt"
 .LASF37:
 	.string	"long double"
@@ -54860,13 +54999,13 @@ __func__.7630:
 	.string	"size_dt_strings"
 .LASF271:
 	.string	"uint16"
-.LASF603:
+.LASF606:
 	.string	"FtlGcFreeBadSuperBlk"
 .LASF106:
 	.string	"image_info_t"
-.LASF703:
+.LASF704:
 	.string	"pMapBlockInfo"
-.LASF616:
+.LASF618:
 	.string	"error_phy_page"
 .LASF3:
 	.string	"long unsigned int"
@@ -54886,15 +55025,15 @@ __func__.7630:
 	.string	"net_server_ethaddr"
 .LASF208:
 	.string	"UCLASS_VIDEO_BRIDGE"
-.LASF691:
+.LASF692:
 	.string	"function_exit"
 .LASF135:
 	.string	"images"
 .LASF525:
 	.string	"g_gc_skip_write_count"
-.LASF619:
+.LASF585:
 	.string	"rknand_print_hex"
-.LASF635:
+.LASF636:
 	.string	"FtlGcBufInit"
 .LASF446:
 	.string	"p_sys_data_buf_1"
@@ -54906,9 +55045,9 @@ __func__.7630:
 	.string	"fit_uname_os"
 .LASF500:
 	.string	"g_gc_bad_block_gc_index"
-.LASF692:
+.LASF693:
 	.string	"last_page_version"
-.LASF801:
+.LASF802:
 	.string	"pagePreBlk"
 .LASF281:
 	.string	"nand_type"
@@ -54924,7 +55063,7 @@ __func__.7630:
 	.string	"table"
 .LASF299:
 	.string	"page"
-.LASF642:
+.LASF643:
 	.string	"allocate_data_superblock"
 .LASF316:
 	.string	"ftl_l2p_ram_map_info"
@@ -54934,17 +55073,17 @@ __func__.7630:
 	.string	"net_loop_state"
 .LASF433:
 	.string	"gSysInfo"
-.LASF629:
+.LASF630:
 	.string	"prev_superblock_id"
 .LASF196:
 	.string	"UCLASS_SPMI"
-.LASF756:
+.LASF757:
 	.string	"minValidPageIndex"
-.LASF841:
+.LASF842:
 	.string	"last_lpa_nscts"
 .LASF194:
 	.string	"UCLASS_SERIAL"
-.LASF709:
+.LASF710:
 	.string	"FtlLoadSysInfo"
 .LASF440:
 	.string	"req_erase"
@@ -54956,25 +55095,25 @@ __func__.7630:
 	.string	"UCLASS_PHY"
 .LASF54:
 	.string	"bi_ddr_freq"
-.LASF858:
+.LASF859:
 	.string	"test_mode"
-.LASF827:
+.LASF828:
 	.string	"FtlDiscard"
-.LASF670:
+.LASF671:
 	.string	"FtlGcPageRecovery"
 .LASF105:
 	.string	"arch"
 .LASF510:
 	.string	"g_totle_read_page_count"
-.LASF710:
+.LASF711:
 	.string	"ftl_get_blk_mode"
-.LASF740:
+.LASF741:
 	.string	"ram_region_id"
 .LASF435:
 	.string	"gL2pMapInfo"
 .LASF322:
 	.string	"lastEc"
-.LASF842:
+.LASF843:
 	.string	"sector"
 .LASF558:
 	.string	"ftl_memcmp"
@@ -54982,27 +55121,27 @@ __func__.7630:
 	.string	"p_map_region_ppn_table"
 .LASF120:
 	.string	"fit_noffset_fdt"
-.LASF866:
+.LASF867:
 	.string	"FtlSysBlkNumInit"
-.LASF671:
+.LASF672:
 	.string	"Ftl_save_ext_data"
 .LASF116:
 	.string	"fit_uname_rd"
-.LASF648:
+.LASF649:
 	.string	"GetSwlReplaceBlock"
 .LASF359:
 	.string	"max_erase_count"
 .LASF475:
 	.string	"p_l2p_ram_map"
-.LASF633:
+.LASF634:
 	.string	"req_num"
 .LASF115:
 	.string	"fit_hdr_rd"
 .LASF268:
 	.string	"NETLOOP_FAIL"
-.LASF823:
+.LASF824:
 	.string	"FtlBbmIsBadBlock"
-.LASF666:
+.LASF667:
 	.string	"FtlSuperblockPowerLostFix"
 .LASF157:
 	.string	"UCLASS_FIRMWARE"
@@ -55026,7 +55165,7 @@ __func__.7630:
 	.string	"UCLASS_NORTHBRIDGE"
 .LASF422:
 	.string	"c_ftl_nand_data_blks_per_plane"
-.LASF615:
+.LASF617:
 	.string	"page_count"
 .LASF298:
 	.string	"ftl_bbt_info"
@@ -55036,7 +55175,7 @@ __func__.7630:
 	.string	"send"
 .LASF531:
 	.string	"g_power_lost_recovery_flag"
-.LASF589:
+.LASF592:
 	.string	"numPages"
 .LASF447:
 	.string	"p_vendor_data_buf"
@@ -55044,21 +55183,21 @@ __func__.7630:
 	.string	"read_page_count"
 .LASF234:
 	.string	"write_hwaddr"
-.LASF725:
+.LASF726:
 	.string	"FtlMapBlkWriteDump_data"
-.LASF834:
+.LASF835:
 	.string	"FtlCacheWriteBack"
-.LASF699:
+.LASF700:
 	.string	"FtlLoadMapInfo"
-.LASF807:
+.LASF808:
 	.string	"V2P_block"
-.LASF720:
+.LASF721:
 	.string	"pSysHeader"
-.LASF672:
+.LASF673:
 	.string	"SupperBlkListInit"
-.LASF706:
+.LASF707:
 	.string	"ppnTbl"
-.LASF846:
+.LASF847:
 	.string	"pNand"
 .LASF559:
 	.string	"ftl_memcpy"
@@ -55068,13 +55207,15 @@ __func__.7630:
 	.string	"g_totle_gc_page_count"
 .LASF24:
 	.string	"_binary_u_boot_bin_start"
-.LASF673:
+.LASF674:
 	.string	"num_data_node"
 .LASF400:
 	.string	"c_ftl_nand_blk_pre_plane"
+.LASF884:
+	.string	"/home/ldq/rk-linux/u-boot-release"
 .LASF64:
 	.string	"bd_t"
-.LASF705:
+.LASF706:
 	.string	"lastWritePage"
 .LASF91:
 	.string	"ih_ep"
@@ -55084,7 +55225,7 @@ __func__.7630:
 	.string	"fit_uname_fdt"
 .LASF187:
 	.string	"UCLASS_RAM"
-.LASF674:
+.LASF675:
 	.string	"num_free_node"
 .LASF379:
 	.string	"ftl_superblock_info"
@@ -55100,35 +55241,35 @@ __func__.7630:
 	.string	"UCLASS_INVALID"
 .LASF443:
 	.string	"g_req_cache"
-.LASF591:
+.LASF594:
 	.string	"gc_blk"
 .LASF277:
 	.string	"page_addr"
-.LASF864:
+.LASF865:
 	.string	"mem_size"
-.LASF857:
+.LASF858:
 	.string	"test_page_step"
-.LASF688:
+.LASF689:
 	.string	"read_super_page_end"
 .LASF368:
 	.string	"refresh_enable_mode"
-.LASF847:
+.LASF848:
 	.string	"load_bbt"
-.LASF860:
+.LASF861:
 	.string	"IsBlkInVendorPart"
 .LASF402:
 	.string	"c_ftl_nand_bbm_buf_size"
-.LASF782:
+.LASF783:
 	.string	"node_data_count"
 .LASF583:
 	.string	"width"
 .LASF39:
 	.string	"base"
-.LASF884:
+.LASF887:
 	.string	"sftl_get_density"
-.LASF839:
+.LASF840:
 	.string	"first_lpa_sctidx"
-.LASF587:
+.LASF590:
 	.string	"rk_ftl_garbage_collect"
 .LASF328:
 	.string	"lastPpa"
@@ -55136,11 +55277,11 @@ __func__.7630:
 	.string	"fit_uname_cfg"
 .LASF344:
 	.string	"gcTempPageOffset"
-.LASF636:
+.LASF637:
 	.string	"decrement_vpc_count"
 .LASF386:
 	.string	"dump_writed"
-.LASF748:
+.LASF749:
 	.string	"flush_l2p_region"
 .LASF130:
 	.string	"cmdline_start"
@@ -55160,9 +55301,9 @@ __func__.7630:
 	.string	"long long unsigned int"
 .LASF274:
 	.string	"int16"
-.LASF848:
+.LASF849:
 	.string	"ftl_low_format"
-.LASF734:
+.LASF735:
 	.string	"offset"
 .LASF504:
 	.string	"g_gc_blk_index"
@@ -55170,15 +55311,15 @@ __func__.7630:
 	.string	"req_prgm"
 .LASF436:
 	.string	"gVendorBlkInfo"
-.LASF676:
+.LASF677:
 	.string	"FtlPowerLostRecovery"
 .LASF462:
 	.string	"p_valid_page_count_table"
-.LASF702:
+.LASF703:
 	.string	"FtlMapTblRecovery"
 .LASF156:
 	.string	"UCLASS_GPIO"
-.LASF869:
+.LASF870:
 	.string	"debug_flag"
 .LASF498:
 	.string	"g_gc_next_blk_1"
@@ -55186,19 +55327,19 @@ __func__.7630:
 	.string	"off_dt_strings"
 .LASF376:
 	.string	"sys_blk_queue"
-.LASF647:
+.LASF648:
 	.string	"free_data_superblock"
-.LASF859:
+.LASF860:
 	.string	"re_test_next_page"
 .LASF61:
 	.string	"bi_arch_number"
-.LASF749:
+.LASF750:
 	.string	"FtlMapWritePage"
-.LASF783:
+.LASF784:
 	.string	"tmp_data_count"
 .LASF26:
 	.string	"ide_bus_offset"
-.LASF739:
+.LASF740:
 	.string	"action"
 .LASF408:
 	.string	"c_ftl_nand_byte_pre_page"
@@ -55206,11 +55347,11 @@ __func__.7630:
 	.string	"UCLASS_COUNT"
 .LASF174:
 	.string	"UCLASS_NVME"
-.LASF643:
+.LASF644:
 	.string	"new_id"
 .LASF345:
 	.string	"cache_write_count"
-.LASF640:
+.LASF641:
 	.string	"new_ppa"
 .LASF258:
 	.string	"net_restart_wrap"
@@ -55240,19 +55381,19 @@ __func__.7630:
 	.string	"g_nand_ops"
 .LASF584:
 	.string	"ftl_malloc"
-.LASF840:
+.LASF841:
 	.string	"first_lpa_nscts"
 .LASF183:
 	.string	"UCLASS_PMIC"
 .LASF318:
 	.string	"L2PMap"
-.LASF765:
+.LASF766:
 	.string	"prev_node_id"
 .LASF454:
 	.string	"gp_gc_page_buf_info"
 .LASF509:
 	.string	"g_totle_discard_page_count"
-.LASF656:
+.LASF657:
 	.string	"max_ec"
 .LASF537:
 	.string	"gFtlInitStatus"
@@ -55260,11 +55401,11 @@ __func__.7630:
 	.string	"long long int"
 .LASF459:
 	.string	"p_erase_count_table"
-.LASF824:
+.LASF825:
 	.string	"FtlBbmMapBadBlock"
 .LASF427:
 	.string	"g_GlobalDataVersion"
-.LASF717:
+.LASF718:
 	.string	"block_in_plane"
 .LASF128:
 	.string	"initrd_start"
@@ -55272,21 +55413,23 @@ __func__.7630:
 	.string	"g_MaxLbaSector"
 .LASF382:
 	.string	"current_plane"
+.LASF880:
+	.string	"free"
 .LASF383:
 	.string	"num_planes"
-.LASF800:
+.LASF801:
 	.string	"spareBuf"
-.LASF730:
+.LASF731:
 	.string	"FtlVendorPartRead"
-.LASF723:
+.LASF724:
 	.string	"FtlWriteDump_data"
 .LASF197:
 	.string	"UCLASS_SPI_FLASH"
 .LASF202:
 	.string	"UCLASS_TIMER"
-.LASF798:
+.LASF799:
 	.string	"FtlGetLastWrittenPage"
-.LASF661:
+.LASF662:
 	.string	"pDataHeader"
 .LASF542:
 	.string	"power_up_flag"
@@ -55294,17 +55437,17 @@ __func__.7630:
 	.string	"inkDie_write_and_check_en"
 .LASF413:
 	.string	"c_ftl_nand_l2pmap_ram_region_num"
-.LASF843:
+.LASF844:
 	.string	"sftl_deinit"
-.LASF815:
+.LASF816:
 	.string	"totle_count"
 .LASF282:
 	.string	"die_num"
-.LASF750:
+.LASF751:
 	.string	"update_map_block"
 .LASF307:
 	.string	"maxRegion"
-.LASF680:
+.LASF681:
 	.string	"next_free_active_plane"
 .LASF491:
 	.string	"p_gc_page_info"
@@ -55318,13 +55461,13 @@ __func__.7630:
 	.string	"g_cur_erase_blk"
 .LASF184:
 	.string	"UCLASS_PWM"
-.LASF634:
+.LASF635:
 	.string	"FtlGcBufFree"
-.LASF774:
+.LASF775:
 	.string	"List_pop_index_node"
-.LASF690:
+.LASF691:
 	.string	"scan_completed"
-.LASF637:
+.LASF638:
 	.string	"update_vpc_list"
 .LASF170:
 	.string	"UCLASS_MMC"
@@ -55336,7 +55479,7 @@ __func__.7630:
 	.string	"res32_0"
 .LASF333:
 	.string	"res32_1"
-.LASF726:
+.LASF727:
 	.string	"FtlUpdateVaildLpn"
 .LASF390:
 	.string	"scr_ppa"
@@ -55346,43 +55489,43 @@ __func__.7630:
 	.string	"save_size"
 .LASF78:
 	.string	"version"
-.LASF652:
+.LASF653:
 	.string	"pNode"
-.LASF638:
+.LASF639:
 	.string	"get_new_active_ppa"
-.LASF878:
+.LASF879:
 	.string	"kmalloc"
 .LASF25:
 	.string	"_binary_u_boot_bin_end"
-.LASF595:
+.LASF598:
 	.string	"max_gc_page_num"
 .LASF1:
 	.string	"unsigned int"
-.LASF712:
+.LASF713:
 	.string	"FtlSlcSuperblockCheck"
 .LASF515:
 	.string	"g_totle_avg_erase_count"
-.LASF836:
+.LASF837:
 	.string	"flashType"
-.LASF789:
+.LASF790:
 	.string	"FtlFreeSysBLkSort"
-.LASF779:
+.LASF780:
 	.string	"tmp_erase_count"
 .LASF83:
 	.string	"working_fdt"
-.LASF862:
+.LASF863:
 	.string	"FtlVariablesInit"
 .LASF392:
 	.string	"ftl_gc_page_buffer"
 .LASF239:
 	.string	"push_packet"
-.LASF708:
+.LASF709:
 	.string	"pMapBlkHeader"
 .LASF82:
 	.string	"size_dt_struct"
 .LASF473:
 	.string	"p_vendor_region_ppn_table"
-.LASF675:
+.LASF676:
 	.string	"make_superblock"
 .LASF97:
 	.string	"ih_name"
@@ -55392,11 +55535,11 @@ __func__.7630:
 	.string	"bufferFlashMode"
 .LASF7:
 	.string	"short int"
-.LASF837:
+.LASF838:
 	.string	"FtlRead"
 .LASF74:
 	.string	"totalsize"
-.LASF757:
+.LASF758:
 	.string	"ftl_map_blk_alloc_new_blk"
 .LASF385:
 	.string	"check_en"
@@ -55406,7 +55549,7 @@ __func__.7630:
 	.string	"prev"
 .LASF423:
 	.string	"c_ftl_nand_data_op_blks_per_plane"
-.LASF650:
+.LASF651:
 	.string	"min_ec_id"
 .LASF388:
 	.string	"phyBlk"
@@ -55414,7 +55557,7 @@ __func__.7630:
 	.string	"net_boot_file_size"
 .LASF412:
 	.string	"c_ftl_nand_map_region_num"
-.LASF665:
+.LASF666:
 	.string	"FtlVpcCheckAndModify"
 .LASF127:
 	.string	"ft_len"
@@ -55426,3 +55569,4 @@ __func__.7630:
 	.string	"g_sys_save_data"
 .LASF124:
 	.string	"rd_start"
+	.hidden	free
diff --git a/drivers/rkflash/rkflash_blk.c b/drivers/rkflash/rkflash_blk.c
index 8481d93fd9..e4b0901c08 100644
--- a/drivers/rkflash/rkflash_blk.c
+++ b/drivers/rkflash/rkflash_blk.c
@@ -13,11 +13,6 @@
 #include "rkflash_blk.h"
 #include "rkflash_debug.h"
 
-void ftl_free(void *buf)
-{
-	kfree(buf);
-}
-
 ulong rkflash_bread(struct udevice *udev, lbaint_t start,
 		    lbaint_t blkcnt, void *dst)
 {

commit 8e620d08b814995136ada212c40ab1236ec0bd6d
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jun 22 09:35:38 2018 +0800

    android: add the default fastbootcmd
    
    Run the default fastbootcmd if can not get fastbootcmd
    from env.
    
    Change-Id: Iaf4d155a9737dd712673f1a7ab9543dc405343fa
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 91b227087e..272dc450b4 100755
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -194,9 +194,12 @@ static int android_bootloader_boot_bootloader(void)
 {
 	const char *fastboot_cmd = env_get("fastbootcmd");
 
-	if (fastboot_cmd)
-		return run_command(fastboot_cmd, CMD_FLAG_ENV);
-	return -1;
+	if (fastboot_cmd == NULL) {
+		printf("fastboot_cmd is null, run default fastboot_cmd!\n");
+		fastboot_cmd = "fastboot usb 0";
+	}
+
+	return run_command(fastboot_cmd, CMD_FLAG_ENV);
 }
 
 #ifdef CONFIG_SUPPORT_OEM_DTB

commit b169aaa6024eb6523f85f71fd99eb1d9dac1c6c0
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Fri Jun 15 09:01:51 2018 +0800

    drivers: rknand: zftl improve read performent
    
    1. Enable multi-plane read feature
    2. Increase nandc interface clock frequency
    
    Change-Id: Ic0b372c34833cef34f60ae2aa3fb3b4268bfd4ed
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/drivers/rknand/rk_zftl_arm_v8.S b/drivers/rknand/rk_zftl_arm_v8.S
index 57a74d592d..b85cec9848 100644
--- a/drivers/rknand/rk_zftl_arm_v8.S
+++ b/drivers/rknand/rk_zftl_arm_v8.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2018-05-11
+ * date: 2018-06-15
  */
 	.arch armv8-a
 	.file	"rk_zftl_arm_v8.S"
@@ -30,6 +30,34 @@ flash_mem_cmp8:
 	add	w0, w4, 1
 	ret
 	.size	flash_mem_cmp8, .-flash_mem_cmp8
+	.section	.text.slc_phy_page_address_calc,"ax",@progbits
+	.align	2
+	.type	slc_phy_page_address_calc, %function
+slc_phy_page_address_calc:
+	adrp	x1, .LANCHOR0
+	adrp	x2, .LANCHOR1
+	ldrb	w1, [x1, #:lo12:.LANCHOR0]
+	cbz	w1, .L7
+	ldrb	w1, [x2, #:lo12:.LANCHOR1]
+	cbz	w1, .L8
+.L7:
+	adrp	x1, .LANCHOR2
+	ldrb	w2, [x2, #:lo12:.LANCHOR1]
+	ldrh	w3, [x1, #:lo12:.LANCHOR2]
+	udiv	w1, w0, w3
+	mul	w1, w1, w3
+	sub	w0, w0, w1
+	cbz	w2, .L9
+	add	w0, w1, w0, lsl 1
+	ret
+.L9:
+	adrp	x2, .LANCHOR3
+	add	x2, x2, :lo12:.LANCHOR3
+	ldrh	w0, [x2, w0, uxtw 1]
+	add	w0, w0, w1
+.L8:
+	ret
+	.size	slc_phy_page_address_calc, .-slc_phy_page_address_calc
 	.section	.text._list_remove_node,"ax",@progbits
 	.align	2
 	.type	_list_remove_node, %function
@@ -39,87 +67,87 @@ _list_remove_node:
 	mov	w3, 6
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR0
+	adrp	x21, .LANCHOR4
 	stp	x19, x20, [sp, 16]
 	umull	x20, w1, w3
 	stp	x23, x24, [sp, 48]
 	mov	w1, 65535
-	ldr	x24, [x21, #:lo12:.LANCHOR0]
+	ldr	x24, [x21, #:lo12:.LANCHOR4]
 	add	x19, x24, x20
 	ldrh	w4, [x24, x20]
 	ldrh	w3, [x19, 2]
 	cmp	w4, w1
 	ldr	x1, [x0]
-	bne	.L7
+	bne	.L17
 	cmp	w3, w4
-	bne	.L7
+	bne	.L17
 	cmp	x19, x1
-	bne	.L6
-.L7:
+	bne	.L16
+.L17:
 	mov	x22, x0
 	mov	x23, x2
 	mov	w0, 65535
 	cmp	w3, w0
-	bne	.L9
+	bne	.L19
 	cmp	x19, x1
-	beq	.L9
-	adrp	x1, .LANCHOR1
+	beq	.L19
+	adrp	x1, .LANCHOR5
 	adrp	x0, .LC0
 	mov	w2, 188
-	add	x1, x1, :lo12:.LANCHOR1
+	add	x1, x1, :lo12:.LANCHOR5
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L9:
+.L19:
 	ldr	x0, [x22]
 	ldrh	w3, [x24, x20]
 	cmp	x19, x0
 	mov	w0, 65535
-	bne	.L10
+	bne	.L20
 	cmp	w3, w0
-	bne	.L11
+	bne	.L21
 	str	xzr, [x22]
-.L12:
+.L22:
 	mov	w0, -1
 	strh	w0, [x24, x20]
 	strh	w0, [x19, 2]
 	ldrh	w0, [x23]
 	sub	w0, w0, #1
 	strh	w0, [x23]
-.L6:
+.L16:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L11:
-	ldr	x0, [x21, #:lo12:.LANCHOR0]
+.L21:
+	ldr	x0, [x21, #:lo12:.LANCHOR4]
 	mov	w1, 6
 	umaddl	x3, w3, w1, x0
 	mov	w0, -1
 	str	x3, [x22]
 	strh	w0, [x3, 2]
-	b	.L12
-.L10:
+	b	.L22
+.L20:
 	cmp	w3, w0
 	ldrh	w0, [x19, 2]
-	bne	.L13
+	bne	.L23
 	cmp	w0, w3
-	beq	.L12
+	beq	.L22
 	mov	w1, 6
 	mov	w2, -1
 	umull	x0, w0, w1
-	ldr	x1, [x21, #:lo12:.LANCHOR0]
+	ldr	x1, [x21, #:lo12:.LANCHOR4]
 	strh	w2, [x1, x0]
-	b	.L12
-.L13:
-	ldr	x1, [x21, #:lo12:.LANCHOR0]
+	b	.L22
+.L23:
+	ldr	x1, [x21, #:lo12:.LANCHOR4]
 	mov	w2, 6
 	umaddl	x4, w3, w2, x1
 	strh	w0, [x4, 2]
 	ldrh	w0, [x19, 2]
 	umull	x0, w0, w2
 	strh	w3, [x1, x0]
-	b	.L12
+	b	.L22
 	.size	_list_remove_node, .-_list_remove_node
 	.section	.text._list_pop_index_node,"ax",@progbits
 	.align	2
@@ -129,15 +157,15 @@ _list_pop_index_node:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	ldr	x20, [x0]
-	cbz	x20, .L21
-	adrp	x3, .LANCHOR0
+	cbz	x20, .L31
+	adrp	x3, .LANCHOR4
 	and	w1, w1, 65535
 	mov	w4, 65535
 	mov	w5, 6
-	ldr	x19, [x3, #:lo12:.LANCHOR0]
-.L17:
-	cbnz	w1, .L18
-.L20:
+	ldr	x19, [x3, #:lo12:.LANCHOR4]
+.L27:
+	cbnz	w1, .L28
+.L30:
 	sub	x19, x20, x19
 	mov	x1, -6148914691236517206
 	asr	x19, x19, 1
@@ -150,55 +178,55 @@ _list_pop_index_node:
 	strh	w0, [x20]
 	strh	w0, [x20, 2]
 	mov	w0, w19
-.L15:
+.L25:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L18:
+.L28:
 	ldrh	w3, [x20]
 	cmp	w3, w4
-	beq	.L20
+	beq	.L30
 	sub	w1, w1, #1
 	umaddl	x20, w3, w5, x19
 	and	w1, w1, 65535
-	b	.L17
-.L21:
+	b	.L27
+.L31:
 	mov	w0, 65535
-	b	.L15
+	b	.L25
 	.size	_list_pop_index_node, .-_list_pop_index_node
 	.section	.text._insert_free_list,"ax",@progbits
 	.align	2
 	.type	_insert_free_list, %function
 _insert_free_list:
-	adrp	x3, .LANCHOR2
+	adrp	x3, .LANCHOR6
 	and	w1, w1, 65535
-	ldrh	w3, [x3, #:lo12:.LANCHOR2]
+	ldrh	w3, [x3, #:lo12:.LANCHOR6]
 	cmp	w3, w1
-	bls	.L23
+	bls	.L33
 	ldrh	w3, [x2]
 	mov	w8, 6
 	ldr	x7, [x0]
 	add	w3, w3, 1
 	strh	w3, [x2]
-	adrp	x2, .LANCHOR0
+	adrp	x2, .LANCHOR4
 	umull	x12, w1, w8
-	ldr	x5, [x2, #:lo12:.LANCHOR0]
+	ldr	x5, [x2, #:lo12:.LANCHOR4]
 	mov	w2, -1
 	add	x6, x5, x12
 	strh	w2, [x6, 2]
 	strh	w2, [x5, x12]
-	cbnz	x7, .L25
-.L30:
+	cbnz	x7, .L35
+.L40:
 	str	x6, [x0]
 	ret
-.L25:
-	adrp	x2, .LANCHOR3
-	adrp	x3, .LANCHOR4
+.L35:
+	adrp	x2, .LANCHOR7
+	adrp	x3, .LANCHOR8
 	mov	w10, w8
 	mov	w15, 65535
-	ldr	x11, [x2, #:lo12:.LANCHOR3]
+	ldr	x11, [x2, #:lo12:.LANCHOR7]
 	ubfiz	x2, x1, 2, 16
-	ldrh	w14, [x3, #:lo12:.LANCHOR4]
+	ldrh	w14, [x3, #:lo12:.LANCHOR8]
 	mov	x3, -6148914691236517206
 	movk	x3, 0xaaab, lsl 0
 	ldr	w4, [x11, x2]
@@ -212,7 +240,7 @@ _insert_free_list:
 	mul	x2, x2, x3
 	mov	x3, x7
 	and	w2, w2, 65535
-.L28:
+.L38:
 	ubfiz	x13, x2, 2, 16
 	ldr	w8, [x11, x13]
 	ldrh	w13, [x11, x13]
@@ -220,88 +248,88 @@ _insert_free_list:
 	and	w13, w13, 2047
 	madd	w8, w14, w8, w13
 	cmp	w4, w8, uxth
-	bls	.L26
+	bls	.L36
 	ldrh	w8, [x3]
 	cmp	w8, w15
-	bne	.L27
+	bne	.L37
 	strh	w2, [x6, 2]
 	strh	w1, [x3]
 	ret
-.L27:
+.L37:
 	umaddl	x3, w8, w10, x5
 	mov	w2, w8
-	b	.L28
-.L26:
+	b	.L38
+.L36:
 	ldrh	w4, [x3, 2]
 	cmp	x7, x3
 	strh	w4, [x6, 2]
 	strh	w2, [x5, x12]
-	bne	.L29
+	bne	.L39
 	strh	w1, [x7, 2]
-	b	.L30
-.L29:
+	b	.L40
+.L39:
 	ldrh	w0, [x3, 2]
 	mov	w2, 6
 	umull	x0, w0, w2
 	strh	w1, [x5, x0]
 	strh	w1, [x3, 2]
-.L23:
+.L33:
 	ret
 	.size	_insert_free_list, .-_insert_free_list
 	.section	.text._insert_data_list,"ax",@progbits
 	.align	2
 	.type	_insert_data_list, %function
 _insert_data_list:
-	adrp	x3, .LANCHOR2
+	adrp	x3, .LANCHOR6
 	and	w1, w1, 65535
-	ldrh	w4, [x3, #:lo12:.LANCHOR2]
+	ldrh	w4, [x3, #:lo12:.LANCHOR6]
 	cmp	w4, w1
-	bls	.L51
+	bls	.L61
 	mov	x5, x3
 	ldrh	w3, [x2]
 	mov	w12, 6
 	ldr	x11, [x0]
 	add	w3, w3, 1
 	strh	w3, [x2]
-	adrp	x2, .LANCHOR0
+	adrp	x2, .LANCHOR4
 	umull	x12, w1, w12
-	ldr	x8, [x2, #:lo12:.LANCHOR0]
+	ldr	x8, [x2, #:lo12:.LANCHOR4]
 	mov	w2, -1
 	add	x10, x8, x12
 	strh	w2, [x10, 2]
 	strh	w2, [x8, x12]
-	cbnz	x11, .L34
+	cbnz	x11, .L44
 	str	x10, [x0]
 	ret
-.L34:
+.L44:
 	stp	x29, x30, [sp, -32]!
-	adrp	x2, .LANCHOR5
+	adrp	x2, .LANCHOR9
 	uxtw	x3, w1
-	adrp	x7, .LANCHOR4
+	adrp	x7, .LANCHOR8
 	add	x29, sp, 0
-	ldr	x15, [x2, #:lo12:.LANCHOR5]
-	adrp	x2, .LANCHOR3
+	ldr	x15, [x2, #:lo12:.LANCHOR9]
+	adrp	x2, .LANCHOR7
 	ldrh	w4, [x10, 4]
-	ldr	x13, [x2, #:lo12:.LANCHOR3]
+	ldr	x13, [x2, #:lo12:.LANCHOR7]
 	stp	x19, x20, [sp, 16]
 	ldrh	w6, [x15, x3, lsl 1]
 	lsl	x3, x3, 2
-	ldrh	w16, [x7, #:lo12:.LANCHOR4]
+	ldrh	w16, [x7, #:lo12:.LANCHOR8]
 	ldr	w2, [x13, x3]
 	mul	w6, w6, w4
 	ldrh	w3, [x13, x3]
 	ubfx	x2, x2, 11, 8
 	and	w3, w3, 2047
-	cbz	w6, .L35
+	cbz	w6, .L45
 	madd	w2, w16, w2, w3
 	add	w6, w6, w2, uxth
-.L35:
+.L45:
 	sub	x2, x11, x8
 	mov	x3, -6148914691236517206
 	asr	x2, x2, 1
 	movk	x3, 0xaaab, lsl 0
 	cmp	w4, 0
-	ldrh	w30, [x5, #:lo12:.LANCHOR2]
+	ldrh	w30, [x5, #:lo12:.LANCHOR6]
 	csinv	w6, w6, wzr, ne
 	mov	x7, x11
 	mul	x2, x2, x3
@@ -309,13 +337,13 @@ _insert_data_list:
 	mov	w19, 65535
 	mov	w20, 6
 	and	w2, w2, 65535
-.L42:
+.L52:
 	add	w4, w4, 1
 	and	w4, w4, 65535
 	cmp	w4, w30
-	bhi	.L31
+	bhi	.L41
 	cmp	w1, w2
-	beq	.L31
+	beq	.L41
 	uxtw	x5, w2
 	ldrh	w17, [x7, 4]
 	ldrh	w3, [x15, x5, lsl 1]
@@ -325,49 +353,49 @@ _insert_data_list:
 	ldrh	w5, [x13, x5]
 	ubfx	x3, x3, 11, 8
 	and	w5, w5, 2047
-	cbz	w14, .L38
-	cbz	w17, .L46
+	cbz	w14, .L48
+	cbz	w17, .L56
 	madd	w3, w16, w3, w5
 	add	w3, w14, w3, uxth
-.L39:
+.L49:
 	cmp	w6, w3
-	bcc	.L40
-.L44:
+	bcc	.L50
+.L54:
 	ldrh	w3, [x7]
 	cmp	w3, w19
-	bne	.L41
+	bne	.L51
 	strh	w2, [x10, 2]
 	strh	w1, [x7]
-.L31:
+.L41:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L41:
+.L51:
 	umaddl	x7, w3, w20, x8
 	mov	w2, w3
-	b	.L42
-.L40:
+	b	.L52
+.L50:
 	ldrh	w3, [x7, 2]
 	cmp	x11, x7
 	strh	w3, [x10, 2]
 	strh	w2, [x8, x12]
-	bne	.L43
+	bne	.L53
 	strh	w1, [x11, 2]
 	str	x10, [x0]
-	b	.L31
-.L43:
+	b	.L41
+.L53:
 	ldrh	w0, [x7, 2]
 	mov	w2, 6
 	umull	x0, w0, w2
 	strh	w1, [x8, x0]
 	strh	w1, [x7, 2]
-	b	.L31
-.L38:
-	cbnz	w17, .L44
-.L46:
+	b	.L41
+.L48:
+	cbnz	w17, .L54
+.L56:
 	mov	w3, -1
-	b	.L39
-.L51:
+	b	.L49
+.L61:
 	ret
 	.size	_insert_data_list, .-_insert_data_list
 	.section	.text._list_get_gc_head_node.isra.2,"ax",@progbits
@@ -375,26 +403,26 @@ _insert_data_list:
 	.type	_list_get_gc_head_node.isra.2, %function
 _list_get_gc_head_node.isra.2:
 	and	w1, w1, 65535
-	cbz	x0, .L58
-	adrp	x2, .LANCHOR0
+	cbz	x0, .L68
+	adrp	x2, .LANCHOR4
 	mov	w3, 65535
 	mov	w4, 6
-	ldr	x2, [x2, #:lo12:.LANCHOR0]
-.L55:
-	cbz	w1, .L56
+	ldr	x2, [x2, #:lo12:.LANCHOR4]
+.L65:
+	cbz	w1, .L66
 	ldrh	w0, [x0]
 	cmp	w0, w3
-	bne	.L57
+	bne	.L67
 	ret
-.L57:
+.L67:
 	sub	w1, w1, #1
 	umaddl	x0, w0, w4, x2
 	and	w1, w1, 65535
-	b	.L55
-.L58:
+	b	.L65
+.L68:
 	mov	w0, 65535
 	ret
-.L56:
+.L66:
 	sub	x0, x0, x2
 	mov	x1, -6148914691236517206
 	asr	x0, x0, 1
@@ -411,58 +439,58 @@ _list_update_data_list:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w19, w1, 65535
-	adrp	x1, .LANCHOR6
+	adrp	x1, .LANCHOR10
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	ldr	x1, [x1, #:lo12:.LANCHOR6]
+	ldr	x1, [x1, #:lo12:.LANCHOR10]
 	ldrh	w3, [x1, 16]
 	str	x25, [sp, 64]
 	cmp	w3, w19
-	beq	.L60
+	beq	.L70
 	ldrh	w3, [x1, 48]
 	cmp	w3, w19
-	beq	.L60
+	beq	.L70
 	ldrh	w1, [x1, 80]
 	cmp	w1, w19
-	beq	.L60
-	adrp	x1, .LANCHOR0
+	beq	.L70
+	adrp	x1, .LANCHOR4
 	mov	w22, 6
 	ldr	x3, [x0]
 	mov	x25, x1
 	umull	x22, w19, w22
-	ldr	x24, [x1, #:lo12:.LANCHOR0]
+	ldr	x24, [x1, #:lo12:.LANCHOR4]
 	add	x23, x24, x22
 	cmp	x23, x3
-	beq	.L60
+	beq	.L70
 	mov	x20, x0
 	ldrh	w0, [x23, 2]
 	mov	w1, 65535
 	mov	x21, x2
 	cmp	w0, w1
-	bne	.L64
+	bne	.L74
 	ldrh	w1, [x24, x22]
 	cmp	w1, w0
-	bne	.L64
-	adrp	x1, .LANCHOR7
+	bne	.L74
+	adrp	x1, .LANCHOR11
 	adrp	x0, .LC0
 	mov	w2, 255
-	add	x1, x1, :lo12:.LANCHOR7
+	add	x1, x1, :lo12:.LANCHOR11
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L64:
+.L74:
 	ldrh	w1, [x23, 2]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L65
+	bne	.L75
 	ldrh	w0, [x24, x22]
 	cmp	w0, w1
-	beq	.L60
-.L65:
-	adrp	x0, .LANCHOR5
+	beq	.L70
+.L75:
+	adrp	x0, .LANCHOR9
 	ubfiz	x2, x19, 1, 16
 	mov	x5, -6148914691236517206
 	mov	w4, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	movk	x5, 0xaaab, lsl 0
 	ldrh	w3, [x0, x2]
 	ldrh	w2, [x23, 4]
@@ -474,14 +502,14 @@ _list_update_data_list:
 	asr	x2, x1, 1
 	mul	x2, x2, x5
 	ldrh	w0, [x0, x2, lsl 1]
-	ldr	x2, [x25, #:lo12:.LANCHOR0]
+	ldr	x2, [x25, #:lo12:.LANCHOR4]
 	add	x1, x2, x1
 	ldrh	w1, [x1, 4]
 	cmp	w1, 0
 	mul	w0, w0, w1
 	csel	w0, w0, w4, ne
 	cmp	w3, w0
-	bcs	.L60
+	bcs	.L70
 	mov	x2, x21
 	mov	w1, w19
 	mov	x0, x20
@@ -495,7 +523,7 @@ _list_update_data_list:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	b	_insert_data_list
-.L60:
+.L70:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -503,15 +531,27 @@ _list_update_data_list:
 	ldp	x29, x30, [sp], 80
 	ret
 	.size	_list_update_data_list, .-_list_update_data_list
-	.section	.text.zftl_get_gc_node.part.10,"ax",@progbits
+	.section	.text.zftl_get_gc_node.part.9,"ax",@progbits
 	.align	2
-	.type	zftl_get_gc_node.part.10, %function
-zftl_get_gc_node.part.10:
+	.type	zftl_get_gc_node.part.9, %function
+zftl_get_gc_node.part.9:
 	mov	w1, w0
-	adrp	x0, .LANCHOR8
-	ldr	x0, [x0, #:lo12:.LANCHOR8]
+	adrp	x0, .LANCHOR12
+	ldr	x0, [x0, #:lo12:.LANCHOR12]
 	b	_list_get_gc_head_node.isra.2
-	.size	zftl_get_gc_node.part.10, .-zftl_get_gc_node.part.10
+	.size	zftl_get_gc_node.part.9, .-zftl_get_gc_node.part.9
+	.section	.text.nandc_de_cs.constprop.29,"ax",@progbits
+	.align	2
+	.type	nandc_de_cs.constprop.29, %function
+nandc_de_cs.constprop.29:
+	adrp	x0, .LANCHOR13
+	ldr	x1, [x0, #:lo12:.LANCHOR13]
+	ldr	w0, [x1]
+	and	w0, w0, -256
+	and	w0, w0, -131073
+	str	w0, [x1]
+	ret
+	.size	nandc_de_cs.constprop.29, .-nandc_de_cs.constprop.29
 	.section	.text.nand_flash_print_info,"ax",@progbits
 	.align	2
 	.global	nand_flash_print_info
@@ -520,19 +560,19 @@ nand_flash_print_info:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR9
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L73
-	adrp	x1, .LANCHOR10
+	adrp	x19, .LANCHOR14
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L84
+	adrp	x1, .LANCHOR15
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR10
+	add	x1, x1, :lo12:.LANCHOR15
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L73:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L74
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+.L84:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L85
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w6, [x0, 6]
 	ldrb	w5, [x0, 5]
 	ldrb	w4, [x0, 4]
@@ -542,278 +582,278 @@ nand_flash_print_info:
 	adrp	x0, .LC2
 	add	x0, x0, :lo12:.LC2
 	bl	printf
-.L74:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L75
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+.L85:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L86
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w1, [x0, 8]
 	adrp	x0, .LC3
 	add	x0, x0, :lo12:.LC3
 	bl	printf
-.L75:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L76
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+.L86:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L87
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w1, [x0, 9]
 	adrp	x0, .LC4
 	add	x0, x0, :lo12:.LC4
 	bl	printf
-.L76:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L77
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+.L87:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L88
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrh	w1, [x0, 10]
 	adrp	x0, .LC5
 	add	x0, x0, :lo12:.LC5
 	bl	printf
-.L77:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L78
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+.L88:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L89
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w1, [x0, 12]
 	adrp	x0, .LC6
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L78:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L79
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+.L89:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L90
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w1, [x0, 13]
 	adrp	x0, .LC7
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L79:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L80
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+.L90:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L91
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrh	w1, [x0, 14]
 	adrp	x0, .LC8
 	add	x0, x0, :lo12:.LC8
 	bl	printf
-.L80:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L81
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+.L91:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L92
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w1, [x0, 23]
 	adrp	x0, .LC9
 	add	x0, x0, :lo12:.LC9
 	bl	printf
-.L81:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L82
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+.L92:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L93
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w1, [x0, 18]
 	adrp	x0, .LC10
 	add	x0, x0, :lo12:.LC10
 	bl	printf
-.L82:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L83
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+.L93:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L94
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w1, [x0, 19]
 	adrp	x0, .LC11
 	add	x0, x0, :lo12:.LC11
 	bl	printf
-.L83:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L84
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+.L94:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L95
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w1, [x0, 20]
 	adrp	x0, .LC12
 	add	x0, x0, :lo12:.LC12
 	bl	printf
-.L84:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L85
-	adrp	x0, .LANCHOR12
-	ldrb	w1, [x0, #:lo12:.LANCHOR12]
+.L95:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L96
+	adrp	x0, .LANCHOR17
+	ldrb	w1, [x0, #:lo12:.LANCHOR17]
 	adrp	x0, .LC13
 	add	x0, x0, :lo12:.LC13
 	bl	printf
-.L85:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L86
-	adrp	x0, .LANCHOR13
-	ldrb	w1, [x0, #:lo12:.LANCHOR13]
+.L96:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L97
+	adrp	x0, .LANCHOR0
+	ldrb	w1, [x0, #:lo12:.LANCHOR0]
 	adrp	x0, .LC14
 	add	x0, x0, :lo12:.LC14
 	bl	printf
-.L86:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L87
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+.L97:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L98
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w1, [x0, 22]
 	adrp	x0, .LC15
 	add	x0, x0, :lo12:.LC15
 	bl	printf
-.L87:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L88
-	adrp	x0, .LANCHOR14
-	ldrb	w1, [x0, #:lo12:.LANCHOR14]
+.L98:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L99
+	adrp	x0, .LANCHOR18
+	ldrb	w1, [x0, #:lo12:.LANCHOR18]
 	adrp	x0, .LC16
 	add	x0, x0, :lo12:.LC16
 	bl	printf
-.L88:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L89
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+.L99:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L100
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w1, [x0, 16]
 	adrp	x0, .LC17
 	add	x0, x0, :lo12:.LC17
 	and	w1, w1, 1
 	bl	printf
-.L89:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L90
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+.L100:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L101
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC18
 	add	x0, x0, :lo12:.LC18
 	ubfx	x1, x1, 1, 1
 	bl	printf
-.L90:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L91
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+.L101:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L102
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC19
 	add	x0, x0, :lo12:.LC19
 	ubfx	x1, x1, 2, 1
 	bl	printf
-.L91:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L92
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+.L102:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L103
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC20
 	add	x0, x0, :lo12:.LC20
 	ubfx	x1, x1, 3, 1
 	bl	printf
-.L92:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L93
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+.L103:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L104
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC21
 	add	x0, x0, :lo12:.LC21
 	ubfx	x1, x1, 4, 1
 	bl	printf
-.L93:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L94
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+.L104:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L105
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC22
 	add	x0, x0, :lo12:.LC22
 	ubfx	x1, x1, 5, 1
 	bl	printf
-.L94:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L95
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+.L105:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L106
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC23
 	add	x0, x0, :lo12:.LC23
 	ubfx	x1, x1, 6, 1
 	bl	printf
-.L95:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L96
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+.L106:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L107
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC24
 	add	x0, x0, :lo12:.LC24
 	ubfx	x1, x1, 7, 1
 	bl	printf
-.L96:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L97
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+.L107:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L108
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w1, [x0, 17]
 	adrp	x0, .LC25
 	add	x0, x0, :lo12:.LC25
 	and	w1, w1, 1
 	bl	printf
-.L97:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L98
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+.L108:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L109
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC26
 	add	x0, x0, :lo12:.LC26
 	ubfx	x1, x1, 9, 1
 	bl	printf
-.L98:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L99
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+.L109:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L110
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC27
 	add	x0, x0, :lo12:.LC27
 	ubfx	x1, x1, 10, 1
 	bl	printf
-.L99:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L100
-	adrp	x0, .LANCHOR13
-	ldrb	w1, [x0, #:lo12:.LANCHOR13]
+.L110:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L111
+	adrp	x0, .LANCHOR0
+	ldrb	w1, [x0, #:lo12:.LANCHOR0]
 	adrp	x0, .LC14
 	add	x0, x0, :lo12:.LC14
 	bl	printf
-.L100:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L101
-	adrp	x0, .LANCHOR15
-	add	x0, x0, :lo12:.LANCHOR15
+.L111:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L112
+	adrp	x0, .LANCHOR19
+	add	x0, x0, :lo12:.LANCHOR19
 	ldrb	w2, [x0, 11]
 	ldrb	w1, [x0, 10]
 	adrp	x0, .LC28
 	add	x0, x0, :lo12:.LC28
 	bl	printf
-.L101:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L102
-	adrp	x0, .LANCHOR15
-	add	x0, x0, :lo12:.LANCHOR15
+.L112:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L113
+	adrp	x0, .LANCHOR19
+	add	x0, x0, :lo12:.LANCHOR19
 	ldrb	w2, [x0, 9]
 	ldrb	w1, [x0, 8]
 	adrp	x0, .LC29
 	add	x0, x0, :lo12:.LC29
 	bl	printf
-.L102:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L72
-	adrp	x0, .LANCHOR16
+.L113:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L83
+	adrp	x0, .LANCHOR20
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	ldrb	w1, [x0, #:lo12:.LANCHOR16]
+	ldrb	w1, [x0, #:lo12:.LANCHOR20]
 	adrp	x0, .LC30
 	add	x0, x0, :lo12:.LC30
 	b	printf
-.L72:
+.L83:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -826,11 +866,11 @@ timer_delay_ns:
 	sub	sp, sp, #16
 	lsr	w0, w0, 4
 	str	w0, [sp, 12]
-.L196:
+.L207:
 	ldr	w0, [sp, 12]
 	sub	w1, w0, #1
 	str	w1, [sp, 12]
-	cbnz	w0, .L196
+	cbnz	w0, .L207
 	add	sp, sp, 16
 	ret
 	.size	timer_delay_ns, .-timer_delay_ns
@@ -860,54 +900,54 @@ toshiba_set_rr_para:
 	mov	x4, x0
 	add	w2, w11, 1
 	mov	w0, 5
-	adrp	x6, .LANCHOR21
-	add	x6, x6, :lo12:.LANCHOR21
-	adrp	x3, .LANCHOR17
-	add	x3, x3, :lo12:.LANCHOR17
+	adrp	x6, .LANCHOR25
+	add	x6, x6, :lo12:.LANCHOR25
+	adrp	x3, .LANCHOR21
+	add	x3, x3, :lo12:.LANCHOR21
 	umull	x2, w2, w0
-	adrp	x0, .LANCHOR18
-	add	x7, x0, :lo12:.LANCHOR18
+	adrp	x0, .LANCHOR22
+	add	x7, x0, :lo12:.LANCHOR22
 	mov	x5, x0
 	ldrb	w0, [x6]
 	add	x3, x3, x2
 	add	x7, x7, x2
-	adrp	x8, .LANCHOR19
+	adrp	x8, .LANCHOR23
 	mov	x2, 0
-	adrp	x10, .LANCHOR20
-	add	x8, x8, :lo12:.LANCHOR19
-	add	x10, x10, :lo12:.LANCHOR20
+	adrp	x10, .LANCHOR24
+	add	x8, x8, :lo12:.LANCHOR23
+	add	x10, x10, :lo12:.LANCHOR24
 	cmp	w0, w2
-	bhi	.L209
+	bhi	.L220
 	ret
-.L203:
+.L214:
 	cmp	w0, 35
-	bne	.L205
+	bne	.L216
 	ldrsb	w0, [x3, x2]
-	b	.L210
-.L205:
+	b	.L221
+.L216:
 	ldrsb	w0, [x10, w11, sxtw]
-	b	.L210
-.L209:
+	b	.L221
+.L220:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
-.L206:
+.L217:
 	mov	w0, 85
 	str	w0, [x4, 8]
-	add	x0, x5, :lo12:.LANCHOR18
+	add	x0, x5, :lo12:.LANCHOR22
 	ldrsb	w0, [x2, x0]
 	str	w0, [x4, 4]
 	mov	w0, 200
 	bl	timer_delay_ns
 	ldrb	w0, [x8]
 	cmp	w0, 34
-	bne	.L203
+	bne	.L214
 	ldrsb	w0, [x7, x2]
-.L210:
+.L221:
 	str	w0, [x4]
 	add	x2, x2, 1
 	ldrb	w0, [x6]
 	cmp	w0, w2
-	bhi	.L206
+	bhi	.L217
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	toshiba_set_rr_para, .-toshiba_set_rr_para
@@ -915,11 +955,11 @@ toshiba_set_rr_para:
 	.align	2
 	.type	hynix_set_rr_para, %function
 hynix_set_rr_para:
-	adrp	x2, .LANCHOR22
+	adrp	x2, .LANCHOR26
 	and	w1, w1, 255
 	mov	x3, 32
 	and	w0, w0, 255
-	ldr	x2, [x2, #:lo12:.LANCHOR22]
+	ldr	x2, [x2, #:lo12:.LANCHOR26]
 	mov	x4, 0
 	add	x6, x2, 128
 	add	x2, x2, 112
@@ -930,19 +970,19 @@ hynix_set_rr_para:
 	umaddl	x1, w1, w0, x3
 	ubfiz	x0, x0, 8, 8
 	add	x2, x2, x1
-	adrp	x1, .LANCHOR23
-	ldr	x3, [x1, #:lo12:.LANCHOR23]
+	adrp	x1, .LANCHOR13
+	ldr	x3, [x1, #:lo12:.LANCHOR13]
 	add	x3, x3, x0
 	mov	w0, 54
 	str	w0, [x3, 2056]
-	bhi	.L217
+	bhi	.L228
 	mov	w0, 22
 	str	w0, [x3, 2056]
 	ret
-.L217:
+.L228:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
-.L213:
+.L224:
 	ldrb	w0, [x6, x4]
 	str	w0, [x3, 2052]
 	mov	w0, 120
@@ -951,7 +991,7 @@ hynix_set_rr_para:
 	str	w0, [x3, 2048]
 	add	x4, x4, 1
 	cmp	w5, w4, uxtb
-	bhi	.L213
+	bhi	.L224
 	mov	w0, 22
 	str	w0, [x3, 2056]
 	ldp	x29, x30, [sp], 16
@@ -962,29 +1002,29 @@ hynix_set_rr_para:
 	.global	hynix_reconfig_rr_para
 	.type	hynix_reconfig_rr_para, %function
 hynix_reconfig_rr_para:
-	adrp	x1, .LANCHOR19
-	ldrb	w1, [x1, #:lo12:.LANCHOR19]
+	adrp	x1, .LANCHOR23
+	ldrb	w1, [x1, #:lo12:.LANCHOR23]
 	sub	w1, w1, #1
 	and	w1, w1, 255
 	cmp	w1, 6
-	bhi	.L224
-	adrp	x8, .LANCHOR22
+	bhi	.L235
+	adrp	x8, .LANCHOR26
 	and	w0, w0, 255
 	sxtw	x7, w0
-	ldr	x1, [x8, #:lo12:.LANCHOR22]
+	ldr	x1, [x8, #:lo12:.LANCHOR26]
 	add	x1, x1, x7
 	ldrb	w1, [x1, 120]
-	cbz	w1, .L224
+	cbz	w1, .L235
 	stp	x29, x30, [sp, -16]!
 	mov	w1, 0
 	add	x29, sp, 0
 	bl	hynix_set_rr_para
-	ldr	x0, [x8, #:lo12:.LANCHOR22]
+	ldr	x0, [x8, #:lo12:.LANCHOR26]
 	add	x0, x0, x7
 	strb	wzr, [x0, 120]
 	ldp	x29, x30, [sp], 16
 	ret
-.L224:
+.L235:
 	ret
 	.size	hynix_reconfig_rr_para, .-hynix_reconfig_rr_para
 	.section	.text.nandc_set_ddr_para,"ax",@progbits
@@ -992,20 +1032,20 @@ hynix_reconfig_rr_para:
 	.global	nandc_set_ddr_para
 	.type	nandc_set_ddr_para, %function
 nandc_set_ddr_para:
-	adrp	x1, .LANCHOR24
+	adrp	x1, .LANCHOR27
 	and	w0, w0, 255
-	adrp	x2, .LANCHOR23
-	ldrb	w1, [x1, #:lo12:.LANCHOR24]
-	ldr	x2, [x2, #:lo12:.LANCHOR23]
+	adrp	x2, .LANCHOR13
+	ldrb	w1, [x1, #:lo12:.LANCHOR27]
+	ldr	x2, [x2, #:lo12:.LANCHOR13]
 	cmp	w1, 9
 	lsl	w1, w0, 16
 	lsl	w0, w0, 8
 	orr	w1, w1, w0
 	orr	w1, w1, 3
-	bne	.L228
+	bne	.L239
 	str	w1, [x2, 80]
 	ret
-.L228:
+.L239:
 	str	w1, [x2, 304]
 	ret
 	.size	nandc_set_ddr_para, .-nandc_set_ddr_para
@@ -1014,43 +1054,43 @@ nandc_set_ddr_para:
 	.global	nandc_get_ddr_para
 	.type	nandc_get_ddr_para, %function
 nandc_get_ddr_para:
-	adrp	x0, .LANCHOR24
-	ldrb	w0, [x0, #:lo12:.LANCHOR24]
+	adrp	x0, .LANCHOR27
+	ldrb	w0, [x0, #:lo12:.LANCHOR27]
 	cmp	w0, 9
-	adrp	x0, .LANCHOR23
-	ldr	x0, [x0, #:lo12:.LANCHOR23]
-	bne	.L231
+	adrp	x0, .LANCHOR13
+	ldr	x0, [x0, #:lo12:.LANCHOR13]
+	bne	.L242
 	ldr	w0, [x0, 80]
-.L233:
+.L244:
 	ubfx	x0, x0, 8, 8
 	ret
-.L231:
+.L242:
 	ldr	w0, [x0, 304]
-	b	.L233
+	b	.L244
 	.size	nandc_get_ddr_para, .-nandc_get_ddr_para
 	.section	.text.nandc_set_if_mode,"ax",@progbits
 	.align	2
 	.global	nandc_set_if_mode
 	.type	nandc_set_if_mode, %function
 nandc_set_if_mode:
-	adrp	x1, .LANCHOR23
+	adrp	x1, .LANCHOR13
 	and	w0, w0, 255
 	tst	w0, 6
-	ldr	x2, [x1, #:lo12:.LANCHOR23]
+	ldr	x2, [x1, #:lo12:.LANCHOR13]
 	ldr	w1, [x2]
-	beq	.L235
+	beq	.L246
 	tst	x0, 4
 	orr	w1, w1, 24576
-	adrp	x0, .LANCHOR24
+	adrp	x0, .LANCHOR27
 	and	w1, w1, -32769
 	orr	w1, w1, 196608
-	ldrb	w0, [x0, #:lo12:.LANCHOR24]
+	ldrb	w0, [x0, #:lo12:.LANCHOR27]
 	orr	w3, w1, 32768
 	csel	w1, w3, w1, ne
 	cmp	w0, 9
 	mov	w0, 4099
 	movk	w0, 0x10, lsl 16
-	bne	.L237
+	bne	.L248
 	mov	w3, 8321
 	str	w3, [x2, 8]
 	str	w0, [x2, 80]
@@ -1058,10 +1098,10 @@ nandc_set_if_mode:
 	str	w0, [x2, 84]
 	mov	w0, 39
 	str	w0, [x2, 84]
-.L238:
+.L249:
 	str	w1, [x2]
 	ret
-.L237:
+.L248:
 	mov	w3, 8322
 	str	w3, [x2, 344]
 	str	w0, [x2, 304]
@@ -1069,38 +1109,25 @@ nandc_set_if_mode:
 	str	w0, [x2, 308]
 	mov	w0, 39
 	str	w0, [x2, 308]
-	b	.L238
-.L235:
+	b	.L249
+.L246:
 	and	w1, w1, -8193
-	b	.L238
+	b	.L249
 	.size	nandc_set_if_mode, .-nandc_set_if_mode
 	.section	.text.nandc_cs,"ax",@progbits
 	.align	2
 	.global	nandc_cs
 	.type	nandc_cs, %function
 nandc_cs:
-	adrp	x1, .LANCHOR23
+	adrp	x1, .LANCHOR13
 	mov	w2, 1
 	lsl	w0, w2, w0
-	ldr	x3, [x1, #:lo12:.LANCHOR23]
+	ldr	x3, [x1, #:lo12:.LANCHOR13]
 	ldr	w1, [x3]
 	bfi	w1, w0, 0, 8
 	str	w1, [x3]
 	ret
 	.size	nandc_cs, .-nandc_cs
-	.section	.text.nandc_de_cs,"ax",@progbits
-	.align	2
-	.global	nandc_de_cs
-	.type	nandc_de_cs, %function
-nandc_de_cs:
-	adrp	x0, .LANCHOR23
-	ldr	x1, [x0, #:lo12:.LANCHOR23]
-	ldr	w0, [x1]
-	and	w0, w0, -256
-	and	w0, w0, -131073
-	str	w0, [x1]
-	ret
-	.size	nandc_de_cs, .-nandc_de_cs
 	.section	.text.flash_wait_device_ready_raw,"ax",@progbits
 	.align	2
 	.global	flash_wait_device_ready_raw
@@ -1110,25 +1137,25 @@ flash_wait_device_ready_raw:
 	add	x29, sp, 0
 	str	x21, [sp, 32]
 	and	w21, w0, 255
-	adrp	x0, .LANCHOR14
+	adrp	x0, .LANCHOR18
 	stp	x19, x20, [sp, 16]
 	mov	w19, w1
 	mov	w20, w2
-	ldrb	w0, [x0, #:lo12:.LANCHOR14]
+	ldrb	w0, [x0, #:lo12:.LANCHOR18]
 	cmp	w0, w21
-	bhi	.L244
-	adrp	x1, .LANCHOR25
+	bhi	.L254
+	adrp	x1, .LANCHOR28
 	adrp	x0, .LC0
 	mov	w2, 599
-	add	x1, x1, :lo12:.LANCHOR25
+	add	x1, x1, :lo12:.LANCHOR28
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L244:
-	adrp	x0, .LANCHOR26
-	add	x0, x0, :lo12:.LANCHOR26
+.L254:
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w5, [x0, w21, sxtw]
-	adrp	x0, .LANCHOR23
-	ldr	x4, [x0, #:lo12:.LANCHOR23]
+	adrp	x0, .LANCHOR13
+	ldr	x4, [x0, #:lo12:.LANCHOR13]
 	mov	w0, w5
 	bl	nandc_cs
 	ubfiz	x2, x5, 8, 8
@@ -1137,7 +1164,7 @@ flash_wait_device_ready_raw:
 	and	w19, w19, 255
 	add	x2, x4, x2
 	mov	w4, 120
-.L247:
+.L257:
 	str	w4, [x2, 2056]
 	mov	w0, 120
 	str	w19, [x2, 2052]
@@ -1147,14 +1174,13 @@ flash_wait_device_ready_raw:
 	ldr	w3, [x2, 2048]
 	and	w3, w3, 255
 	bics	wzr, w20, w3
-	bne	.L247
+	bne	.L257
 	cmp	w3, 255
-	beq	.L247
-	mov	w0, w5
-	bl	nandc_de_cs
-	ldp	x19, x20, [sp, 16]
-	mov	w0, w3
+	beq	.L257
+	bl	nandc_de_cs.constprop.29
 	ldr	x21, [sp, 32]
+	mov	w0, w3
+	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
 	.size	flash_wait_device_ready_raw, .-flash_wait_device_ready_raw
@@ -1167,32 +1193,45 @@ flash_wait_device_ready:
 	ubfx	x6, x0, 21, 3
 	and	w1, w0, 2097151
 	tst	x0, 50331648
-	bne	.L251
-	adrp	x0, .LANCHOR13
-	adrp	x5, .LANCHOR27
-	ldrb	w0, [x0, #:lo12:.LANCHOR13]
-	cbz	w0, .L252
-	ldrb	w0, [x5, #:lo12:.LANCHOR27]
-	cbz	w0, .L251
-.L252:
-	adrp	x0, .LANCHOR28
-	ldrh	w3, [x0, #:lo12:.LANCHOR28]
-	ldrb	w0, [x5, #:lo12:.LANCHOR27]
+	bne	.L261
+	adrp	x0, .LANCHOR0
+	adrp	x5, .LANCHOR1
+	ldrb	w0, [x0, #:lo12:.LANCHOR0]
+	cbz	w0, .L262
+	ldrb	w0, [x5, #:lo12:.LANCHOR1]
+	cbz	w0, .L261
+.L262:
+	adrp	x0, .LANCHOR2
+	ldrh	w3, [x0, #:lo12:.LANCHOR2]
+	ldrb	w0, [x5, #:lo12:.LANCHOR1]
 	udiv	w4, w1, w3
 	mul	w4, w4, w3
 	sub	w3, w1, w4
-	cbz	w0, .L253
+	cbz	w0, .L263
 	add	w1, w4, w3, lsl 1
-.L251:
+.L261:
 	mov	w0, w6
 	b	flash_wait_device_ready_raw
-.L253:
-	adrp	x5, .LANCHOR29
-	add	x5, x5, :lo12:.LANCHOR29
+.L263:
+	adrp	x5, .LANCHOR3
+	add	x5, x5, :lo12:.LANCHOR3
 	ldrh	w3, [x5, w3, uxtw 1]
 	add	w1, w3, w4
-	b	.L251
+	b	.L261
 	.size	flash_wait_device_ready, .-flash_wait_device_ready
+	.section	.text.nandc_de_cs,"ax",@progbits
+	.align	2
+	.global	nandc_de_cs
+	.type	nandc_de_cs, %function
+nandc_de_cs:
+	adrp	x0, .LANCHOR13
+	ldr	x1, [x0, #:lo12:.LANCHOR13]
+	ldr	w0, [x1]
+	and	w0, w0, -256
+	and	w0, w0, -131073
+	str	w0, [x1]
+	ret
+	.size	nandc_de_cs, .-nandc_de_cs
 	.section	.text.nandc_wait_flash_ready,"ax",@progbits
 	.align	2
 	.global	nandc_wait_flash_ready
@@ -1201,25 +1240,25 @@ nandc_wait_flash_ready:
 	mov	w2, 34464
 	stp	x29, x30, [sp, -32]!
 	movk	w2, 0x1, lsl 16
-	adrp	x3, .LANCHOR23
+	adrp	x3, .LANCHOR13
 	add	x29, sp, 0
-.L262:
+.L273:
 	mov	w0, 100
 	bl	timer_delay_ns
-	ldr	x0, [x3, #:lo12:.LANCHOR23]
+	ldr	x0, [x3, #:lo12:.LANCHOR13]
 	ldr	w0, [x0]
 	str	w0, [x29, 24]
 	ldr	w0, [x29, 24]
-	tbnz	x0, 9, .L263
+	tbnz	x0, 9, .L274
 	subs	w2, w2, #1
-	bne	.L262
+	bne	.L273
 	mov	w0, -1
-.L260:
+.L271:
 	ldp	x29, x30, [sp], 32
 	ret
-.L263:
+.L274:
 	mov	w0, 0
-	b	.L260
+	b	.L271
 	.size	nandc_wait_flash_ready, .-nandc_wait_flash_ready
 	.section	.text.sandisk_set_rr_para,"ax",@progbits
 	.align	2
@@ -1237,35 +1276,35 @@ sandisk_set_rr_para:
 	mov	w0, 200
 	bl	timer_delay_ns
 	add	w1, w2, 1
-	adrp	x0, .LANCHOR21
-	adrp	x2, .LANCHOR17
-	add	x2, x2, :lo12:.LANCHOR17
-	ldrb	w4, [x0, #:lo12:.LANCHOR21]
-	adrp	x0, .LANCHOR19
-	ldrb	w5, [x0, #:lo12:.LANCHOR19]
+	adrp	x0, .LANCHOR25
+	adrp	x2, .LANCHOR21
+	add	x2, x2, :lo12:.LANCHOR21
+	ldrb	w4, [x0, #:lo12:.LANCHOR25]
+	adrp	x0, .LANCHOR23
+	ldrb	w5, [x0, #:lo12:.LANCHOR23]
 	mov	w0, 5
 	umull	x1, w1, w0
-	adrp	x0, .LANCHOR18
-	add	x0, x0, :lo12:.LANCHOR18
+	adrp	x0, .LANCHOR22
+	add	x0, x0, :lo12:.LANCHOR22
 	add	x2, x2, x1
 	add	x1, x0, x1
 	mov	x0, 0
-.L267:
+.L278:
 	cmp	w4, w0
-	bhi	.L270
+	bhi	.L281
 	ldp	x29, x30, [sp], 16
 	b	nandc_wait_flash_ready
-.L270:
+.L281:
 	cmp	w5, 67
-	bne	.L268
+	bne	.L279
 	ldrsb	w6, [x1, x0]
-.L272:
+.L283:
 	add	x0, x0, 1
 	str	w6, [x3]
-	b	.L267
-.L268:
+	b	.L278
+.L279:
 	ldrsb	w6, [x2, x0]
-	b	.L272
+	b	.L283
 	.size	sandisk_set_rr_para, .-sandisk_set_rr_para
 	.section	.text.toshiba_3d_set_tlc_rr_para,"ax",@progbits
 	.align	2
@@ -1337,7 +1376,7 @@ toshiba_3d_set_slc_rr_para:
 toshiba_tlc_set_rr_para:
 	mov	w6, 239
 	uxtw	x1, w1
-	cbz	w2, .L277
+	cbz	w2, .L288
 	stp	x29, x30, [sp, -16]!
 	mov	x4, x0
 	mov	x2, 7
@@ -1369,9 +1408,9 @@ toshiba_tlc_set_rr_para:
 	str	w0, [x4]
 	str	wzr, [x4]
 	ldp	x29, x30, [sp], 16
-.L280:
+.L291:
 	b	nandc_wait_flash_ready
-.L277:
+.L288:
 	str	w6, [x0, 8]
 	mov	w2, 20
 	str	w2, [x0, 4]
@@ -1382,46 +1421,46 @@ toshiba_tlc_set_rr_para:
 	str	wzr, [x0]
 	str	wzr, [x0]
 	str	wzr, [x0]
-	b	.L280
+	b	.L291
 	.size	toshiba_tlc_set_rr_para, .-toshiba_tlc_set_rr_para
 	.section	.text.zftl_flash_enter_slc_mode,"ax",@progbits
 	.align	2
 	.global	zftl_flash_enter_slc_mode
 	.type	zftl_flash_enter_slc_mode, %function
 zftl_flash_enter_slc_mode:
-	adrp	x1, .LANCHOR13
+	adrp	x1, .LANCHOR0
 	and	x0, x0, 255
-	ldrb	w2, [x1, #:lo12:.LANCHOR13]
-	cbz	w2, .L283
-	adrp	x1, .LANCHOR23
+	ldrb	w2, [x1, #:lo12:.LANCHOR0]
+	cbz	w2, .L294
+	adrp	x1, .LANCHOR13
 	cmp	w2, 1
-	ldr	x1, [x1, #:lo12:.LANCHOR23]
-	bne	.L286
-.L303:
+	ldr	x1, [x1, #:lo12:.LANCHOR13]
+	bne	.L297
+.L314:
 	adrp	x2, .LANCHOR34+29
 	ldrb	w2, [x2, #:lo12:.LANCHOR34+29]
-	cbz	w2, .L283
+	cbz	w2, .L294
 	add	x0, x0, 8
 	add	x0, x1, x0, lsl 8
 	str	w2, [x0, 8]
 	ret
-.L286:
+.L297:
 	cmp	w2, 2
-	bne	.L288
+	bne	.L299
 	adrp	x2, .LANCHOR35
 	add	x2, x2, :lo12:.LANCHOR35
 	ldrb	w3, [x2, x0]
-	cbz	w3, .L283
+	cbz	w3, .L294
 	strb	wzr, [x2, x0]
-	b	.L303
-.L288:
+	b	.L314
+.L299:
 	cmp	w2, 3
-	bne	.L283
+	bne	.L294
 	adrp	x2, .LANCHOR35
 	sxtw	x3, w0
 	add	x2, x2, :lo12:.LANCHOR35
 	ldrb	w4, [x2, x3]
-	cbz	w4, .L283
+	cbz	w4, .L294
 	ubfiz	x0, x0, 8, 8
 	strb	wzr, [x2, x3]
 	add	x0, x1, x0
@@ -1435,7 +1474,7 @@ zftl_flash_enter_slc_mode:
 	str	wzr, [x0, 2048]
 	str	wzr, [x0, 2048]
 	b	nandc_wait_flash_ready
-.L283:
+.L294:
 	ret
 	.size	zftl_flash_enter_slc_mode, .-zftl_flash_enter_slc_mode
 	.section	.text.zftl_flash_exit_slc_mode,"ax",@progbits
@@ -1443,29 +1482,29 @@ zftl_flash_enter_slc_mode:
 	.global	zftl_flash_exit_slc_mode
 	.type	zftl_flash_exit_slc_mode, %function
 zftl_flash_exit_slc_mode:
-	adrp	x1, .LANCHOR13
+	adrp	x1, .LANCHOR0
 	and	x0, x0, 255
-	ldrb	w2, [x1, #:lo12:.LANCHOR13]
-	cbz	w2, .L304
-	adrp	x1, .LANCHOR23
+	ldrb	w2, [x1, #:lo12:.LANCHOR0]
+	cbz	w2, .L315
+	adrp	x1, .LANCHOR13
 	cmp	w2, 1
-	ldr	x1, [x1, #:lo12:.LANCHOR23]
-	bne	.L307
+	ldr	x1, [x1, #:lo12:.LANCHOR13]
+	bne	.L318
 	adrp	x2, .LANCHOR34+30
 	ldrb	w2, [x2, #:lo12:.LANCHOR34+30]
-.L324:
-	cbz	w2, .L304
+.L335:
+	cbz	w2, .L315
 	add	x0, x0, 8
 	add	x0, x1, x0, lsl 8
 	str	w2, [x0, 8]
 	ret
-.L307:
+.L318:
 	cmp	w2, 2
-	bne	.L309
+	bne	.L320
 	adrp	x3, .LANCHOR35
 	add	x3, x3, :lo12:.LANCHOR35
 	ldrb	w2, [x3, x0]
-	cbnz	w2, .L304
+	cbnz	w2, .L315
 	adrp	x2, .LANCHOR34
 	add	x2, x2, :lo12:.LANCHOR34
 	mov	w5, 4
@@ -1474,15 +1513,15 @@ zftl_flash_exit_slc_mode:
 	cmp	w4, 2
 	csel	w4, w4, w5, eq
 	strb	w4, [x3, x0]
-	b	.L324
-.L309:
+	b	.L335
+.L320:
 	cmp	w2, 3
-	bne	.L304
+	bne	.L315
 	adrp	x3, .LANCHOR35
 	sxtw	x4, w0
 	add	x3, x3, :lo12:.LANCHOR35
 	ldrb	w2, [x3, x4]
-	cbnz	w2, .L304
+	cbnz	w2, .L315
 	ubfiz	x0, x0, 8, 8
 	adrp	x2, .LANCHOR34+12
 	add	x0, x1, x0
@@ -1501,7 +1540,7 @@ zftl_flash_exit_slc_mode:
 	str	wzr, [x0, 2048]
 	strb	w2, [x3, x4]
 	b	nandc_wait_flash_ready
-.L304:
+.L315:
 	ret
 	.size	zftl_flash_exit_slc_mode, .-zftl_flash_exit_slc_mode
 	.section	.text.flash_start_page_read,"ax",@progbits
@@ -1513,86 +1552,69 @@ flash_start_page_read:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 255
-	adrp	x0, .LANCHOR14
+	adrp	x0, .LANCHOR18
 	stp	x21, x22, [sp, 32]
 	ubfx	x22, x1, 21, 3
 	and	w19, w1, 2097151
-	ldrb	w0, [x0, #:lo12:.LANCHOR14]
+	ldrb	w0, [x0, #:lo12:.LANCHOR18]
 	ubfx	x21, x1, 24, 2
 	cmp	w0, w22
-	bhi	.L326
+	bhi	.L337
 	adrp	x1, .LANCHOR36
 	adrp	x0, .LC0
-	mov	w2, 736
+	mov	w2, 741
 	add	x1, x1, :lo12:.LANCHOR36
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L326:
-	adrp	x0, .LANCHOR26
-	add	x0, x0, :lo12:.LANCHOR26
+.L337:
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w7, [x0, w22, sxtw]
-	adrp	x0, .LANCHOR23
-	ldr	x6, [x0, #:lo12:.LANCHOR23]
+	adrp	x0, .LANCHOR13
+	ldr	x6, [x0, #:lo12:.LANCHOR13]
 	mov	w0, w7
 	bl	nandc_cs
-	cbnz	w21, .L327
-	adrp	x0, .LANCHOR13
-	adrp	x1, .LANCHOR27
-	ldrb	w0, [x0, #:lo12:.LANCHOR13]
-	cbz	w0, .L328
-	ldrb	w0, [x1, #:lo12:.LANCHOR27]
-	cbz	w0, .L329
-.L328:
-	adrp	x0, .LANCHOR28
-	ldrb	w1, [x1, #:lo12:.LANCHOR27]
-	ldrh	w2, [x0, #:lo12:.LANCHOR28]
-	udiv	w0, w19, w2
-	mul	w0, w0, w2
-	sub	w19, w19, w0
-	cbz	w1, .L330
-	add	w19, w0, w19, lsl 1
-.L329:
+	cbnz	w21, .L338
+	mov	w0, w19
+	bl	slc_phy_page_address_calc
+	mov	w19, w0
+	adrp	x0, .LANCHOR0
+	ldrb	w0, [x0, #:lo12:.LANCHOR0]
+	cbz	w0, .L339
 	mov	w0, w7
 	bl	zftl_flash_enter_slc_mode
-	b	.L331
-.L330:
-	adrp	x1, .LANCHOR29
-	add	x1, x1, :lo12:.LANCHOR29
-	ldrh	w19, [x1, w19, uxtw 1]
-	add	w19, w19, w0
-.L331:
-	ubfiz	x0, x7, 8, 8
-	and	w1, w19, 255
-	add	x0, x6, x0
+.L339:
+	ubfiz	x1, x7, 8, 8
+	and	w0, w19, 255
+	add	x1, x6, x1
 	ldp	x21, x22, [sp, 32]
-	str	wzr, [x0, 2056]
-	str	wzr, [x0, 2052]
-	str	wzr, [x0, 2052]
-	str	w1, [x0, 2052]
-	lsr	w1, w19, 8
-	str	w1, [x0, 2052]
+	str	wzr, [x1, 2056]
+	str	wzr, [x1, 2052]
+	str	wzr, [x1, 2052]
+	str	w0, [x1, 2052]
+	lsr	w0, w19, 8
+	str	w0, [x1, 2052]
 	lsr	w19, w19, 16
-	str	w19, [x0, 2052]
-	str	w20, [x0, 2056]
-	mov	w0, 0
+	str	w19, [x1, 2052]
+	str	w20, [x1, 2056]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
-	b	nandc_de_cs
-.L327:
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+	b	nandc_de_cs.constprop.29
+.L338:
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L332
+	bne	.L340
 	sxtw	x0, w7
 	add	x0, x0, 8
 	add	x0, x6, x0, lsl 8
 	str	w21, [x0, 8]
-	b	.L331
-.L332:
+	b	.L339
+.L340:
 	mov	w0, w7
 	bl	zftl_flash_exit_slc_mode
-	b	.L331
+	b	.L339
 	.size	flash_start_page_read, .-flash_start_page_read
 	.section	.text.flash_erase_duplane_block,"ax",@progbits
 	.align	2
@@ -1603,60 +1625,60 @@ flash_erase_duplane_block:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w19, w0, 255
-	adrp	x0, .LANCHOR14
+	adrp	x0, .LANCHOR18
 	stp	x21, x22, [sp, 32]
 	str	x25, [sp, 64]
-	mov	w22, w2
-	ldrb	w0, [x0, #:lo12:.LANCHOR14]
-	mov	w21, w3
+	mov	w21, w2
+	ldrb	w0, [x0, #:lo12:.LANCHOR18]
+	mov	w20, w3
 	stp	x23, x24, [sp, 48]
 	and	w25, w1, 255
 	cmp	w0, w19
-	bhi	.L338
+	bhi	.L346
 	adrp	x1, .LANCHOR37
 	adrp	x0, .LC0
 	mov	w2, 510
 	add	x1, x1, :lo12:.LANCHOR37
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L338:
-	adrp	x0, .LANCHOR26
-	add	x0, x0, :lo12:.LANCHOR26
-	ldrb	w20, [x0, w19, sxtw]
-	adrp	x0, .LANCHOR23
-	ldr	x24, [x0, #:lo12:.LANCHOR23]
-	adrp	x0, .LANCHOR9
-	and	x19, x20, 255
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
+.L346:
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
+	ldrb	w22, [x0, w19, sxtw]
+	adrp	x0, .LANCHOR13
+	ldr	x24, [x0, #:lo12:.LANCHOR13]
+	adrp	x0, .LANCHOR14
+	and	x19, x22, 255
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	add	x23, x19, 8
 	add	x23, x24, x23, lsl 8
-	tbz	x0, 4, .L339
+	tbz	x0, 4, .L347
 	adrp	x0, .LC31
-	mov	w3, w21
-	mov	w2, w22
-	mov	w1, w20
+	mov	w3, w20
+	mov	w2, w21
+	mov	w1, w22
 	add	x0, x0, :lo12:.LC31
 	bl	printf
-.L339:
+.L347:
 	bl	nandc_wait_flash_ready
-	mov	w0, w20
+	mov	w0, w22
 	bl	nandc_cs
-	mov	w0, w20
-	cbnz	w25, .L340
+	mov	w0, w22
+	cbnz	w25, .L348
 	bl	zftl_flash_enter_slc_mode
-.L341:
+.L349:
 	add	x24, x24, x19, lsl 8
 	mov	w0, 96
 	str	w0, [x24, 2056]
-	and	w0, w22, 255
+	and	w0, w21, 255
 	str	w0, [x24, 2052]
-	lsr	w0, w22, 8
+	lsr	w0, w21, 8
 	str	w0, [x24, 2052]
-	lsr	w0, w22, 16
+	lsr	w0, w21, 16
 	str	w0, [x24, 2052]
 	adrp	x0, .LANCHOR38
 	ldrb	w0, [x0, #:lo12:.LANCHOR38]
-	cbnz	w0, .L344
+	cbnz	w0, .L352
 	mov	w0, 208
 	str	w0, [x24, 2056]
 	mov	w19, 5
@@ -1664,15 +1686,15 @@ flash_erase_duplane_block:
 	mov	x0, x23
 	bl	flash_read_status
 	and	w5, w0, w19
-.L342:
+.L350:
 	mov	w0, 96
 	str	w0, [x24, 2056]
-	and	w0, w21, 255
+	and	w0, w20, 255
 	str	w0, [x24, 2052]
-	lsr	w0, w21, 8
+	lsr	w0, w20, 8
 	str	w0, [x24, 2052]
-	lsr	w21, w21, 16
-	str	w21, [x24, 2052]
+	lsr	w20, w20, 16
+	str	w20, [x24, 2052]
 	mov	w0, 208
 	str	w0, [x24, 2056]
 	mov	w19, 5
@@ -1680,16 +1702,15 @@ flash_erase_duplane_block:
 	mov	x0, x23
 	bl	flash_read_status
 	mov	w2, w0
-	mov	w0, w20
-	bl	nandc_de_cs
+	bl	nandc_de_cs.constprop.29
 	and	w19, w2, w19
 	orr	w19, w19, w5
-	cbz	w19, .L343
+	cbz	w19, .L351
 	adrp	x0, .LC32
-	mov	w1, w22
+	mov	w1, w21
 	add	x0, x0, :lo12:.LC32
 	bl	printf
-.L343:
+.L351:
 	mov	w0, w19
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -1697,12 +1718,12 @@ flash_erase_duplane_block:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L340:
+.L348:
 	bl	zftl_flash_exit_slc_mode
-	b	.L341
-.L344:
+	b	.L349
+.L352:
 	mov	w5, 0
-	b	.L342
+	b	.L350
 	.size	flash_erase_duplane_block, .-flash_erase_duplane_block
 	.section	.text.flash_erase_block_en,"ax",@progbits
 	.align	2
@@ -1713,47 +1734,47 @@ flash_erase_block_en:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w19, w0, 255
-	adrp	x0, .LANCHOR14
+	adrp	x0, .LANCHOR18
 	stp	x21, x22, [sp, 32]
 	str	x25, [sp, 64]
 	mov	w21, w2
-	ldrb	w0, [x0, #:lo12:.LANCHOR14]
+	ldrb	w0, [x0, #:lo12:.LANCHOR18]
 	and	w22, w2, 2097151
 	stp	x23, x24, [sp, 48]
 	and	w25, w1, 255
 	cmp	w0, w19
-	bhi	.L353
+	bhi	.L361
 	adrp	x1, .LANCHOR39
 	adrp	x0, .LC0
 	mov	w2, 555
 	add	x1, x1, :lo12:.LANCHOR39
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L353:
-	adrp	x0, .LANCHOR26
-	add	x0, x0, :lo12:.LANCHOR26
+.L361:
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w20, [x0, w19, sxtw]
-	adrp	x0, .LANCHOR23
-	ldr	x24, [x0, #:lo12:.LANCHOR23]
-	adrp	x0, .LANCHOR9
+	adrp	x0, .LANCHOR13
+	ldr	x24, [x0, #:lo12:.LANCHOR13]
+	adrp	x0, .LANCHOR14
 	and	x19, x20, 255
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	add	x23, x19, 8
 	add	x23, x24, x23, lsl 8
-	tbz	x0, 4, .L354
+	tbz	x0, 4, .L362
 	adrp	x0, .LC33
 	mov	w2, w21
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC33
 	bl	printf
-.L354:
+.L362:
 	bl	nandc_wait_flash_ready
 	mov	w0, w20
 	bl	nandc_cs
 	mov	w0, w20
-	cbnz	w25, .L355
+	cbnz	w25, .L363
 	bl	zftl_flash_enter_slc_mode
-.L356:
+.L364:
 	add	x0, x24, x19, lsl 8
 	mov	w1, 96
 	str	w1, [x0, 2056]
@@ -1769,19 +1790,18 @@ flash_erase_block_en:
 	mov	x0, x23
 	bl	flash_read_status
 	mov	w19, w0
-	mov	w0, w20
-	bl	nandc_de_cs
+	bl	nandc_de_cs.constprop.29
 	mov	w0, 5
 	ands	w19, w19, w0
-	beq	.L357
-	adrp	x0, .LANCHOR28
+	beq	.L365
+	adrp	x0, .LANCHOR2
 	mov	w2, w19
-	ldrh	w1, [x0, #:lo12:.LANCHOR28]
+	ldrh	w1, [x0, #:lo12:.LANCHOR2]
 	adrp	x0, .LC34
 	add	x0, x0, :lo12:.LC34
 	udiv	w1, w21, w1
 	bl	printf
-.L357:
+.L365:
 	mov	w0, w19
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -1789,9 +1809,9 @@ flash_erase_block_en:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L355:
+.L363:
 	bl	zftl_flash_exit_slc_mode
-	b	.L356
+	b	.L364
 	.size	flash_erase_block_en, .-flash_erase_block_en
 	.section	.text.flash_erase_block,"ax",@progbits
 	.align	2
@@ -1814,21 +1834,21 @@ flash_erase_all:
 	stp	x19, x20, [sp, 16]
 	mov	w19, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR28
+	adrp	x23, .LANCHOR2
 	stp	x21, x22, [sp, 32]
-	add	x23, x23, :lo12:.LANCHOR28
+	add	x23, x23, :lo12:.LANCHOR2
 	ldrh	w20, [x0, 14]
-	adrp	x22, .LANCHOR14
+	adrp	x22, .LANCHOR18
 	str	x25, [sp, 64]
-	add	x22, x22, :lo12:.LANCHOR14
-	adrp	x24, .LANCHOR26
+	add	x22, x22, :lo12:.LANCHOR18
+	adrp	x24, .LANCHOR29
 	ldrb	w1, [x0, 13]
 	mul	w20, w20, w1
 	and	w20, w20, 65535
-.L367:
+.L375:
 	ldrb	w0, [x22]
 	cmp	w0, w19
-	bhi	.L370
+	bhi	.L378
 	ldp	x19, x20, [sp, 16]
 	mov	w1, 0
 	ldp	x21, x22, [sp, 32]
@@ -1838,24 +1858,142 @@ flash_erase_all:
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	b	printf
-.L370:
-	add	x0, x24, :lo12:.LANCHOR26
+.L378:
+	add	x0, x24, :lo12:.LANCHOR29
 	mov	w21, 0
 	ldrb	w25, [x0, w19, sxtw]
-.L368:
+.L376:
 	cmp	w20, w21, uxth
-	bhi	.L369
+	bhi	.L377
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L367
-.L369:
+	b	.L375
+.L377:
 	ldrh	w1, [x23]
 	mov	w0, w25
 	mul	w1, w1, w21
 	add	w21, w21, 1
 	bl	flash_erase_block
-	b	.L368
+	b	.L376
 	.size	flash_erase_all, .-flash_erase_all
+	.section	.text.flash_start_plane_read,"ax",@progbits
+	.align	2
+	.global	flash_start_plane_read
+	.type	flash_start_plane_read, %function
+flash_start_plane_read:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	ubfx	x19, x0, 24, 2
+	stp	x21, x22, [sp, 32]
+	ubfx	x22, x0, 21, 3
+	and	w21, w0, 2097151
+	adrp	x0, .LANCHOR18
+	and	w20, w1, 2097151
+	ldrb	w0, [x0, #:lo12:.LANCHOR18]
+	cmp	w0, w22
+	bhi	.L381
+	adrp	x1, .LANCHOR40
+	adrp	x0, .LC0
+	mov	w2, 836
+	add	x1, x1, :lo12:.LANCHOR40
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L381:
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
+	ldrb	w6, [x0, w22, sxtw]
+	adrp	x0, .LANCHOR13
+	ldr	x8, [x0, #:lo12:.LANCHOR13]
+	mov	w0, w6
+	bl	nandc_cs
+	adrp	x7, .LANCHOR16
+	cbnz	w19, .L382
+	mov	w0, w21
+	bl	slc_phy_page_address_calc
+	mov	w21, w0
+	mov	w0, w20
+	bl	slc_phy_page_address_calc
+	mov	w20, w0
+	adrp	x0, .LANCHOR0
+	ldrb	w0, [x0, #:lo12:.LANCHOR0]
+	cbz	w0, .L383
+	mov	w0, w6
+	bl	zftl_flash_enter_slc_mode
+.L383:
+	and	x4, x6, 255
+	adrp	x0, .LANCHOR19
+	add	x1, x0, :lo12:.LANCHOR19
+	add	x4, x8, x4, lsl 8
+	and	w3, w21, 255
+	and	w6, w20, 255
+	lsr	w5, w20, 8
+	lsr	w20, w20, 16
+	ldrb	w10, [x1, 8]
+	ldrb	w2, [x1, 16]
+	str	w10, [x4, 2056]
+	cmp	w2, 1
+	lsr	w2, w21, 8
+	lsr	w21, w21, 16
+	bne	.L385
+	str	wzr, [x4, 2052]
+	str	wzr, [x4, 2052]
+	str	w3, [x4, 2052]
+	str	w2, [x4, 2052]
+	ldrb	w0, [x1, 9]
+	str	w21, [x4, 2052]
+	str	w0, [x4, 2056]
+	bl	nandc_wait_flash_ready
+	ldr	x0, [x7, #:lo12:.LANCHOR16]
+	ldrb	w0, [x0, 12]
+	cmp	w0, 3
+	bne	.L386
+	cbz	w19, .L386
+	str	w19, [x4, 2056]
+.L386:
+	str	wzr, [x4, 2056]
+	str	wzr, [x4, 2052]
+	str	wzr, [x4, 2052]
+.L399:
+	ldp	x21, x22, [sp, 32]
+	str	w6, [x4, 2052]
+	str	w5, [x4, 2052]
+	mov	w0, 48
+	str	w20, [x4, 2052]
+	str	w0, [x4, 2056]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	b	nandc_de_cs.constprop.29
+.L382:
+	ldr	x0, [x7, #:lo12:.LANCHOR16]
+	ldrb	w0, [x0, 12]
+	cmp	w0, 3
+	bne	.L384
+	sxtw	x0, w6
+	add	x0, x0, 8
+	add	x0, x8, x0, lsl 8
+	str	w19, [x0, 8]
+	b	.L383
+.L384:
+	mov	w0, w6
+	bl	zftl_flash_exit_slc_mode
+	b	.L383
+.L385:
+	str	w3, [x4, 2052]
+	ldr	x1, [x7, #:lo12:.LANCHOR16]
+	str	w2, [x4, 2052]
+	str	w21, [x4, 2052]
+	ldrb	w1, [x1, 12]
+	cmp	w1, 3
+	bne	.L388
+	cbz	w19, .L388
+	str	w19, [x4, 2056]
+.L388:
+	add	x0, x0, :lo12:.LANCHOR19
+	ldrb	w0, [x0, 9]
+	str	w0, [x4, 2056]
+	b	.L399
+	.size	flash_start_plane_read, .-flash_start_plane_read
 	.section	.text.flash_set_interface_mode,"ax",@progbits
 	.align	2
 	.global	flash_set_interface_mode
@@ -1864,57 +2002,57 @@ flash_set_interface_mode:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR40
+	adrp	x24, .LANCHOR41
 	stp	x21, x22, [sp, 32]
-	adrp	x23, .LANCHOR9
-	adrp	x22, .LANCHOR41
+	adrp	x23, .LANCHOR14
+	adrp	x22, .LANCHOR42
 	str	x25, [sp, 64]
-	add	x24, x24, :lo12:.LANCHOR40
-	add	x22, x22, :lo12:.LANCHOR41
-	add	x23, x23, :lo12:.LANCHOR9
+	add	x24, x24, :lo12:.LANCHOR41
+	add	x22, x22, :lo12:.LANCHOR42
+	add	x23, x23, :lo12:.LANCHOR14
 	mov	w25, w0
 	stp	x19, x20, [sp, 16]
 	mov	x20, 0
-.L382:
+.L410:
 	lsl	x0, x20, 3
 	ldrb	w21, [x0, x24]
 	mov	w0, 69
 	cmp	w21, 152
 	ccmp	w21, w0, 4, ne
-	beq	.L373
+	beq	.L401
 	cmp	w21, 44
-	bne	.L374
-.L373:
-	adrp	x0, .LANCHOR23
+	bne	.L402
+.L401:
+	adrp	x0, .LANCHOR13
 	ldrb	w1, [x22]
 	cmp	w25, 1
-	ldr	x19, [x0, #:lo12:.LANCHOR23]
-	bne	.L375
-	tbz	x1, 0, .L374
+	ldr	x19, [x0, #:lo12:.LANCHOR13]
+	bne	.L403
+	tbz	x1, 0, .L402
 	ldr	w0, [x23]
-	tbz	x0, 12, .L376
+	tbz	x0, 12, .L404
 	adrp	x0, .LC36
 	add	x0, x0, :lo12:.LC36
 	bl	printf
-.L376:
+.L404:
 	add	x0, x19, x20, lsl 8
 	mov	w1, 239
 	cmp	w21, 44
 	str	w1, [x0, 2056]
 	mov	w1, 1
-	bne	.L377
+	bne	.L405
 	str	w1, [x0, 2052]
 	mov	w1, 5
-.L397:
+.L425:
 	str	w1, [x0, 2048]
-.L381:
+.L409:
 	str	wzr, [x0, 2048]
 	str	wzr, [x0, 2048]
 	str	wzr, [x0, 2048]
-.L374:
+.L402:
 	add	x20, x20, 1
 	cmp	x20, 4
-	bne	.L382
+	bne	.L410
 	bl	nandc_wait_flash_ready
 	ldr	x25, [sp, 64]
 	mov	w0, 0
@@ -1923,42 +2061,42 @@ flash_set_interface_mode:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L377:
+.L405:
 	mov	w2, 128
 	str	w2, [x0, 2052]
-	b	.L397
-.L375:
-	tbz	x1, 2, .L374
+	b	.L425
+.L403:
+	tbz	x1, 2, .L402
 	ldr	w0, [x23]
-	tbz	x0, 12, .L379
+	tbz	x0, 12, .L407
 	adrp	x0, .LC37
 	add	x0, x0, :lo12:.LC37
 	bl	printf
-.L379:
+.L407:
 	add	x0, x19, x20, lsl 8
 	mov	w1, 239
 	cmp	w21, 44
 	str	w1, [x0, 2056]
-	bne	.L380
+	bne	.L408
 	mov	w1, 1
 	str	w1, [x0, 2052]
 	mov	w1, 35
-	b	.L397
-.L380:
+	b	.L425
+.L408:
 	mov	w1, 128
 	str	w1, [x0, 2052]
 	str	wzr, [x0, 2048]
-	b	.L381
+	b	.L409
 	.size	flash_set_interface_mode, .-flash_set_interface_mode
 	.section	.text.flash_reset,"ax",@progbits
 	.align	2
 	.global	flash_reset
 	.type	flash_reset, %function
 flash_reset:
-	adrp	x1, .LANCHOR23
+	adrp	x1, .LANCHOR13
 	ubfiz	x0, x0, 8, 8
 	add	x0, x0, 2048
-	ldr	x1, [x1, #:lo12:.LANCHOR23]
+	ldr	x1, [x1, #:lo12:.LANCHOR13]
 	add	x1, x1, x0
 	mov	w0, 255
 	str	w0, [x1, 8]
@@ -1971,10 +2109,10 @@ flash_reset:
 flash_read_id:
 	and	w10, w0, 255
 	stp	x29, x30, [sp, -16]!
-	adrp	x0, .LANCHOR23
+	adrp	x0, .LANCHOR13
 	mov	x8, x1
 	add	x29, sp, 0
-	ldr	x4, [x0, #:lo12:.LANCHOR23]
+	ldr	x4, [x0, #:lo12:.LANCHOR13]
 	mov	w0, w10
 	bl	flash_reset
 	mov	w0, w10
@@ -2002,13 +2140,12 @@ flash_read_id:
 	strb	w0, [x8, 6]
 	ldr	w0, [x2, 2048]
 	strb	w0, [x8, 7]
-	mov	w0, w10
-	bl	nandc_de_cs
+	bl	nandc_de_cs.constprop.29
 	ldrb	w2, [x8]
 	sub	w0, w2, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bhi	.L399
+	bhi	.L427
 	ldrb	w7, [x8, 5]
 	add	w1, w10, 1
 	ldrb	w6, [x8, 4]
@@ -2019,7 +2156,7 @@ flash_read_id:
 	ldrb	w3, [x8, 1]
 	ldp	x29, x30, [sp], 16
 	b	printf
-.L399:
+.L427:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	flash_read_id, .-flash_read_id
@@ -2034,8 +2171,8 @@ flash_read_spare:
 	ubfiz	x0, x0, 8, 8
 	add	x29, sp, 0
 	ldrb	w3, [x2, #:lo12:.LANCHOR34+9]
-	adrp	x2, .LANCHOR23
-	ldr	x4, [x2, #:lo12:.LANCHOR23]
+	adrp	x2, .LANCHOR13
+	ldr	x4, [x2, #:lo12:.LANCHOR13]
 	lsl	w3, w3, 9
 	add	x4, x4, x0
 	and	w0, w1, 255
@@ -2063,20 +2200,20 @@ flash_read_spare:
 sandisk_prog_test_bad_block:
 	stp	x29, x30, [sp, -48]!
 	mov	w4, w1
-	adrp	x1, .LANCHOR23
+	adrp	x1, .LANCHOR13
 	and	x2, x0, 255
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x20, .LANCHOR34
-	ldr	x19, [x1, #:lo12:.LANCHOR23]
+	ldr	x19, [x1, #:lo12:.LANCHOR13]
 	add	x1, x20, :lo12:.LANCHOR34
 	str	x21, [sp, 32]
 	mov	x0, x2
 	add	x2, x2, 8
 	ldrb	w1, [x1, 29]
 	add	x2, x19, x2, lsl 8
-	cbz	w1, .L405
-.L419:
+	cbz	w1, .L433
+.L447:
 	ubfiz	x0, x0, 8, 8
 	str	w1, [x2, 8]
 	add	x19, x19, x0
@@ -2100,37 +2237,37 @@ sandisk_prog_test_bad_block:
 	ldr	w2, [x19, 2048]
 	mov	w0, 5
 	ands	w21, w2, w0
-	beq	.L407
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L407
+	beq	.L435
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L435
 	adrp	x0, .LC39
 	mov	w1, w4
 	add	x0, x0, :lo12:.LC39
 	bl	printf
-.L407:
+.L435:
 	add	x20, x20, :lo12:.LANCHOR34
 	ldrb	w0, [x20, 30]
-	cbz	w0, .L404
+	cbz	w0, .L432
 	str	w0, [x19, 2056]
-.L404:
+.L432:
 	mov	w0, w21
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L405:
+.L433:
 	mov	w1, 162
-	b	.L419
+	b	.L447
 	.size	sandisk_prog_test_bad_block, .-sandisk_prog_test_bad_block
 	.section	.text.nandc_rdy_status,"ax",@progbits
 	.align	2
 	.global	nandc_rdy_status
 	.type	nandc_rdy_status, %function
 nandc_rdy_status:
-	adrp	x0, .LANCHOR23
+	adrp	x0, .LANCHOR13
 	sub	sp, sp, #16
-	ldr	x0, [x0, #:lo12:.LANCHOR23]
+	ldr	x0, [x0, #:lo12:.LANCHOR13]
 	ldr	w0, [x0]
 	str	w0, [sp, 8]
 	ldr	w0, [sp, 8]
@@ -2143,69 +2280,69 @@ nandc_rdy_status:
 	.global	nandc_bch_sel
 	.type	nandc_bch_sel, %function
 nandc_bch_sel:
-	adrp	x2, .LANCHOR42
+	adrp	x2, .LANCHOR43
 	mov	w1, 1
-	strb	w0, [x2, #:lo12:.LANCHOR42]
-	adrp	x2, .LANCHOR24
-	ldrb	w2, [x2, #:lo12:.LANCHOR24]
+	strb	w0, [x2, #:lo12:.LANCHOR43]
+	adrp	x2, .LANCHOR27
+	ldrb	w2, [x2, #:lo12:.LANCHOR27]
 	cmp	w2, 9
-	adrp	x2, .LANCHOR23
-	ldr	x2, [x2, #:lo12:.LANCHOR23]
-	bne	.L423
+	adrp	x2, .LANCHOR13
+	ldr	x2, [x2, #:lo12:.LANCHOR13]
+	bne	.L451
 	str	w1, [x2, 16]
 	cmp	w0, 70
-	beq	.L430
+	beq	.L458
 	cmp	w0, 60
-	beq	.L431
+	beq	.L459
 	cmp	w0, 40
 	cset	w1, eq
 	add	w1, w1, 1
-.L424:
+.L452:
 	lsl	w1, w1, 25
 	orr	w1, w1, 1
 	str	w1, [x2, 32]
 	ret
-.L430:
+.L458:
 	mov	w1, 0
-	b	.L424
-.L431:
+	b	.L452
+.L459:
 	mov	w1, 3
-	b	.L424
-.L423:
+	b	.L452
+.L451:
 	str	w1, [x2, 8]
 	cmp	w0, 16
 	mov	w1, 4096
-	bne	.L426
-.L429:
+	bne	.L454
+.L457:
 	and	w1, w1, -17
-.L427:
+.L455:
 	orr	w1, w1, 1
 	str	w1, [x2, 12]
 	ret
-.L426:
+.L454:
 	cmp	w0, 24
-	bne	.L428
+	bne	.L456
 	orr	w1, w1, 16
-	b	.L427
-.L428:
+	b	.L455
+.L456:
 	orr	w1, w1, 262144
 	cmp	w0, 40
 	orr	w1, w1, 16
-	bne	.L427
-	b	.L429
+	bne	.L455
+	b	.L457
 	.size	nandc_bch_sel, .-nandc_bch_sel
 	.section	.text.zftl_nandc_get_irq_status,"ax",@progbits
 	.align	2
 	.global	zftl_nandc_get_irq_status
 	.type	zftl_nandc_get_irq_status, %function
 zftl_nandc_get_irq_status:
-	adrp	x1, .LANCHOR24
-	ldrb	w1, [x1, #:lo12:.LANCHOR24]
+	adrp	x1, .LANCHOR27
+	ldrb	w1, [x1, #:lo12:.LANCHOR27]
 	cmp	w1, 9
-	bne	.L437
+	bne	.L465
 	ldr	w0, [x0, 296]
 	ret
-.L437:
+.L465:
 	ldr	w0, [x0, 372]
 	ret
 	.size	zftl_nandc_get_irq_status, .-zftl_nandc_get_irq_status
@@ -2237,38 +2374,38 @@ rk_nandc_flash_xfer_completed:
 nandc_xfer_start:
 	stp	x29, x30, [sp, -64]!
 	and	w1, w1, 255
-	adrp	x4, .LANCHOR45
+	adrp	x4, .LANCHOR46
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	w23, w0, 255
-	adrp	x0, .LANCHOR24
+	adrp	x0, .LANCHOR27
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	add	w20, w1, 1
-	ldrb	w0, [x0, #:lo12:.LANCHOR24]
-	adrp	x24, .LANCHOR23
+	ldrb	w0, [x0, #:lo12:.LANCHOR27]
+	adrp	x24, .LANCHOR13
 	cmp	w0, 9
-	bne	.L443
+	bne	.L471
 	ubfiz	w19, w23, 1, 1
 	mov	w0, 1
 	orr	w19, w19, 8
 	asr	w20, w20, 1
 	bfi	w19, w0, 5, 2
-	adrp	x0, .LANCHOR43
+	adrp	x0, .LANCHOR44
 	orr	w19, w19, 536870912
 	orr	w19, w19, 1024
-	ldrb	w0, [x0, #:lo12:.LANCHOR43]
+	ldrb	w0, [x0, #:lo12:.LANCHOR44]
 	and	w19, w19, -17
 	bfi	w19, w20, 22, 6
 	orr	w19, w19, 128
-	cbz	w0, .L444
-	adrp	x0, .LANCHOR44
-	ldrb	w1, [x0, #:lo12:.LANCHOR44]
+	cbz	w0, .L472
+	adrp	x0, .LANCHOR45
+	ldrb	w1, [x0, #:lo12:.LANCHOR45]
 	orr	w0, w19, 512
 	cmp	w1, 0
 	csel	w19, w0, w19, ne
-.L444:
-	add	x21, x4, :lo12:.LANCHOR45
+.L472:
+	add	x21, x4, :lo12:.LANCHOR46
 	add	x0, x2, 63
 	and	w20, w20, 63
 	and	x0, x0, -64
@@ -2285,7 +2422,7 @@ nandc_xfer_start:
 	and	x1, x1, -64
 	add	x1, x1, x20
 	bl	flush_dcache_range
-	ldr	x1, [x24, #:lo12:.LANCHOR23]
+	ldr	x1, [x24, #:lo12:.LANCHOR13]
 	mov	w0, 1
 	str	w0, [x21, 32]
 	mov	w2, 16
@@ -2302,22 +2439,22 @@ nandc_xfer_start:
 	cset	w2, eq
 	orr	w0, w0, 4
 	bfi	w0, w2, 1, 1
-	adrp	x2, .LANCHOR46
+	adrp	x2, .LANCHOR47
 	orr	w0, w0, 1
-	ldrh	w2, [x2, #:lo12:.LANCHOR46]
+	ldrh	w2, [x2, #:lo12:.LANCHOR47]
 	bfi	w0, w2, 16, 11
 	str	w0, [x1, 48]
 	str	w19, [x1, 16]
 	orr	w19, w19, 4
 	str	w19, [x1, 16]
-.L442:
+.L470:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L443:
-	ldr	x0, [x24, #:lo12:.LANCHOR23]
+.L471:
+	ldr	x0, [x24, #:lo12:.LANCHOR13]
 	ubfiz	w19, w23, 1, 1
 	orr	w19, w19, 8
 	asr	w20, w20, 1
@@ -2332,24 +2469,24 @@ nandc_xfer_start:
 	orr	w19, w19, 1024
 	and	w19, w19, -17
 	bfi	w19, w20, 22, 6
-	cbz	w23, .L446
-	adrp	x0, .LANCHOR42
+	cbz	w23, .L474
+	adrp	x0, .LANCHOR43
 	ubfx	x1, x1, 1, 7
-	ldr	x8, [x4, #:lo12:.LANCHOR45]
+	ldr	x8, [x4, #:lo12:.LANCHOR46]
 	add	x1, x3, x1, lsl 2
-	ldrb	w0, [x0, #:lo12:.LANCHOR42]
+	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	mov	w5, 128
 	cmp	w0, 24
 	mov	w0, 64
 	csel	w5, w5, w0, hi
 	mov	w0, 0
-.L448:
+.L476:
 	add	w7, w5, w0
 	cmp	x3, x1
-	bne	.L449
-.L450:
-	add	x21, x4, :lo12:.LANCHOR45
-	ldr	x0, [x4, #:lo12:.LANCHOR45]
+	bne	.L477
+.L478:
+	add	x21, x4, :lo12:.LANCHOR46
+	ldr	x0, [x4, #:lo12:.LANCHOR46]
 	and	w20, w20, 63
 	ubfiz	x1, x20, 10, 6
 	ubfiz	x20, x20, 7, 6
@@ -2366,7 +2503,7 @@ nandc_xfer_start:
 	and	x1, x1, -64
 	add	x1, x1, x20
 	bl	flush_dcache_range
-	ldr	x1, [x24, #:lo12:.LANCHOR23]
+	ldr	x1, [x24, #:lo12:.LANCHOR13]
 	mov	w0, 1
 	str	w0, [x21, 32]
 	cmp	w23, 0
@@ -2383,8 +2520,8 @@ nandc_xfer_start:
 	str	w19, [x1, 8]
 	orr	w19, w19, 4
 	str	w19, [x1, 8]
-	b	.L442
-.L449:
+	b	.L470
+.L477:
 	ldrh	w10, [x3]
 	and	x0, x0, 4294967292
 	ldrh	w6, [x3, 2]
@@ -2392,11 +2529,11 @@ nandc_xfer_start:
 	orr	x6, x10, x6, lsl 16
 	str	w6, [x8, x0]
 	mov	w0, w7
-	b	.L448
-.L446:
-	ldr	x1, [x4, #:lo12:.LANCHOR45]
+	b	.L476
+.L474:
+	ldr	x1, [x4, #:lo12:.LANCHOR46]
 	str	w0, [x1]
-	b	.L450
+	b	.L478
 	.size	nandc_xfer_start, .-nandc_xfer_start
 	.section	.text.nandc_set_seed,"ax",@progbits
 	.align	2
@@ -2404,23 +2541,23 @@ nandc_xfer_start:
 	.type	nandc_set_seed, %function
 nandc_set_seed:
 	and	x0, x0, 127
-	adrp	x1, .LANCHOR47
-	add	x1, x1, :lo12:.LANCHOR47
+	adrp	x1, .LANCHOR48
+	add	x1, x1, :lo12:.LANCHOR48
 	ldrh	w0, [x1, x0, lsl 1]
-	adrp	x1, .LANCHOR44
-	ldrb	w2, [x1, #:lo12:.LANCHOR44]
+	adrp	x1, .LANCHOR45
+	ldrb	w2, [x1, #:lo12:.LANCHOR45]
 	orr	w1, w0, -1073741824
 	cmp	w2, 0
 	csel	w0, w1, w0, ne
-	adrp	x1, .LANCHOR24
-	ldrb	w1, [x1, #:lo12:.LANCHOR24]
+	adrp	x1, .LANCHOR27
+	ldrb	w1, [x1, #:lo12:.LANCHOR27]
 	cmp	w1, 9
-	adrp	x1, .LANCHOR23
-	ldr	x1, [x1, #:lo12:.LANCHOR23]
-	bne	.L460
+	adrp	x1, .LANCHOR13
+	ldr	x1, [x1, #:lo12:.LANCHOR13]
+	bne	.L488
 	str	w0, [x1, 520]
 	ret
-.L460:
+.L488:
 	str	w0, [x1, 336]
 	ret
 	.size	nandc_set_seed, .-nandc_set_seed
@@ -2433,29 +2570,29 @@ zftl_flash_de_init:
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	bl	nandc_wait_flash_ready
-	adrp	x19, .LANCHOR16
+	adrp	x19, .LANCHOR20
 	mov	w0, 0
 	bl	hynix_reconfig_rr_para
-	ldrb	w0, [x19, #:lo12:.LANCHOR16]
-	cbz	w0, .L465
-	adrp	x0, .LANCHOR41
-	ldrb	w0, [x0, #:lo12:.LANCHOR41]
-	tbz	x0, 0, .L465
+	ldrb	w0, [x19, #:lo12:.LANCHOR20]
+	cbz	w0, .L493
+	adrp	x0, .LANCHOR42
+	ldrb	w0, [x0, #:lo12:.LANCHOR42]
+	tbz	x0, 0, .L493
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
 	bl	nandc_set_if_mode
-	strb	wzr, [x19, #:lo12:.LANCHOR16]
-.L465:
-	adrp	x3, .LANCHOR44
-	ldrb	w0, [x3, #:lo12:.LANCHOR44]
-	cbz	w0, .L466
+	strb	wzr, [x19, #:lo12:.LANCHOR20]
+.L493:
+	adrp	x3, .LANCHOR45
+	ldrb	w0, [x3, #:lo12:.LANCHOR45]
+	cbz	w0, .L494
 	mov	w0, 0
-	strb	wzr, [x3, #:lo12:.LANCHOR44]
+	strb	wzr, [x3, #:lo12:.LANCHOR45]
 	bl	nandc_set_seed
 	mov	w0, 1
-	strb	w0, [x3, #:lo12:.LANCHOR44]
-.L466:
+	strb	w0, [x3, #:lo12:.LANCHOR45]
+.L494:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -2466,8 +2603,8 @@ zftl_flash_de_init:
 	.global	nandc_randomizer_enable
 	.type	nandc_randomizer_enable, %function
 nandc_randomizer_enable:
-	adrp	x1, .LANCHOR44
-	strb	w0, [x1, #:lo12:.LANCHOR44]
+	adrp	x1, .LANCHOR45
+	strb	w0, [x1, #:lo12:.LANCHOR45]
 	ret
 	.size	nandc_randomizer_enable, .-nandc_randomizer_enable
 	.section	.text.nandc_get_chip_if,"ax",@progbits
@@ -2475,10 +2612,10 @@ nandc_randomizer_enable:
 	.global	nandc_get_chip_if
 	.type	nandc_get_chip_if, %function
 nandc_get_chip_if:
-	adrp	x1, .LANCHOR23
+	adrp	x1, .LANCHOR13
 	ubfiz	x0, x0, 8, 8
 	add	x0, x0, 2048
-	ldr	x1, [x1, #:lo12:.LANCHOR23]
+	ldr	x1, [x1, #:lo12:.LANCHOR13]
 	add	x0, x1, x0
 	ret
 	.size	nandc_get_chip_if, .-nandc_get_chip_if
@@ -2487,10 +2624,10 @@ nandc_get_chip_if:
 	.global	buf_reinit
 	.type	buf_reinit, %function
 buf_reinit:
-	adrp	x0, .LANCHOR48
-	add	x1, x0, :lo12:.LANCHOR48
+	adrp	x0, .LANCHOR49
+	add	x1, x0, :lo12:.LANCHOR49
 	mov	w2, 0
-.L480:
+.L508:
 	and	w3, w2, 255
 	strb	wzr, [x1, 2]
 	add	w4, w3, 1
@@ -2500,14 +2637,14 @@ buf_reinit:
 	str	xzr, [x1, 16]
 	cmp	w2, 32
 	add	x1, x1, 64
-	bne	.L480
-	add	x0, x0, :lo12:.LANCHOR48
+	bne	.L508
+	add	x0, x0, :lo12:.LANCHOR49
 	mov	w1, -1
 	strb	w1, [x0, 1984]
-	adrp	x0, .LANCHOR49
-	strb	wzr, [x0, #:lo12:.LANCHOR49]
 	adrp	x0, .LANCHOR50
-	strb	w2, [x0, #:lo12:.LANCHOR50]
+	strb	wzr, [x0, #:lo12:.LANCHOR50]
+	adrp	x0, .LANCHOR51
+	strb	w2, [x0, #:lo12:.LANCHOR51]
 	ret
 	.size	buf_reinit, .-buf_reinit
 	.section	.text.buf_add_tail,"ax",@progbits
@@ -2525,80 +2662,106 @@ buf_add_tail:
 	mov	x20, x1
 	ldrb	w1, [x19]
 	cmp	w1, 255
-	bne	.L488
+	bne	.L516
 	ldrb	w0, [x20, 1]
 	cmp	w0, 255
-	bne	.L484
-	adrp	x1, .LANCHOR51
+	bne	.L512
+	adrp	x1, .LANCHOR52
 	adrp	x0, .LC0
 	mov	w2, 74
-	add	x1, x1, :lo12:.LANCHOR51
+	add	x1, x1, :lo12:.LANCHOR52
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L484:
+.L512:
 	ldrb	w0, [x20, 1]
 	strb	w0, [x19]
-.L482:
+.L510:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L488:
-	adrp	x0, .LANCHOR48
-	add	x2, x0, :lo12:.LANCHOR48
+.L516:
+	adrp	x0, .LANCHOR49
+	add	x2, x0, :lo12:.LANCHOR49
 	mov	x19, x0
-.L489:
+.L517:
 	sbfiz	x0, x1, 6, 32
 	mov	w21, w1
 	ldrb	w1, [x2, x0]
 	cmp	w1, 255
-	bne	.L489
+	bne	.L517
 	ldrb	w0, [x20, 1]
 	cmp	w0, 255
-	bne	.L486
-	adrp	x1, .LANCHOR51
+	bne	.L514
+	adrp	x1, .LANCHOR52
 	adrp	x0, .LC0
 	mov	w2, 81
-	add	x1, x1, :lo12:.LANCHOR51
+	add	x1, x1, :lo12:.LANCHOR52
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L486:
-	add	x0, x19, :lo12:.LANCHOR48
+.L514:
+	add	x0, x19, :lo12:.LANCHOR49
 	sbfiz	x21, x21, 6, 32
 	ldrb	w1, [x20, 1]
 	strb	w1, [x0, x21]
-	b	.L482
+	b	.L510
 	.size	buf_add_tail, .-buf_add_tail
-	.section	.text.buf_free,"ax",@progbits
+	.section	.text.queue_read_cmd,"ax",@progbits
 	.align	2
-	.global	buf_free
-	.type	buf_free, %function
-buf_free:
-	ldrb	w1, [x0, 2]
-	adrp	x2, .LANCHOR49
+	.type	queue_read_cmd, %function
+queue_read_cmd:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	mov	x19, x0
+	mov	w0, 48
+	ldr	w1, [x19, 40]
+	bl	flash_start_page_read
+	strb	wzr, [x19, 59]
+	mov	w0, 1
+	strb	w0, [x19, 58]
+	mov	w0, -1
+	strb	w0, [x19]
+	mov	x1, x19
+	adrp	x0, .LANCHOR53
+	ldr	x19, [sp, 16]
+	add	x0, x0, :lo12:.LANCHOR53
+	ldp	x29, x30, [sp], 32
+	b	buf_add_tail
+	.size	queue_read_cmd, .-queue_read_cmd
+	.section	.text.buf_free,"ax",@progbits
+	.align	2
+	.global	buf_free
+	.type	buf_free, %function
+buf_free:
+	ldrb	w1, [x0, 2]
+	adrp	x2, .LANCHOR50
 	and	w1, w1, 8
 	strb	w1, [x0, 2]
-	cbz	w1, .L492
+	cbz	w1, .L522
+	ldr	w1, [x0, 36]
+	cmn	w1, #1
+	beq	.L522
 	stp	x29, x30, [sp, -16]!
 	mov	x1, x0
-	add	x0, x2, :lo12:.LANCHOR49
+	add	x0, x2, :lo12:.LANCHOR50
 	add	x29, sp, 0
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR50
+	adrp	x1, .LANCHOR51
 	ldp	x29, x30, [sp], 16
-	ldrb	w0, [x1, #:lo12:.LANCHOR50]
+	ldrb	w0, [x1, #:lo12:.LANCHOR51]
 	add	w0, w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR50]
+	strb	w0, [x1, #:lo12:.LANCHOR51]
 	ret
-.L492:
-	ldrb	w1, [x2, #:lo12:.LANCHOR49]
+.L522:
+	ldrb	w1, [x2, #:lo12:.LANCHOR50]
 	strb	w1, [x0]
-	adrp	x1, .LANCHOR50
+	adrp	x1, .LANCHOR51
 	ldrb	w0, [x0, 1]
-	strb	w0, [x2, #:lo12:.LANCHOR49]
-	ldrb	w0, [x1, #:lo12:.LANCHOR50]
+	strb	w0, [x2, #:lo12:.LANCHOR50]
+	ldrb	w0, [x1, #:lo12:.LANCHOR51]
 	add	w0, w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR50]
+	strb	w0, [x1, #:lo12:.LANCHOR51]
 	ret
 	.size	buf_free, .-buf_free
 	.section	.text.buf_alloc,"ax",@progbits
@@ -2609,57 +2772,59 @@ buf_alloc:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR50
+	adrp	x19, .LANCHOR51
 	and	w20, w0, 255
-	ldrb	w0, [x19, #:lo12:.LANCHOR50]
-	cbz	w0, .L499
-.L502:
-	adrp	x3, .LANCHOR49
-	adrp	x1, .LANCHOR48
-	add	x0, x1, :lo12:.LANCHOR48
-	ldrb	w2, [x3, #:lo12:.LANCHOR49]
-	ubfiz	x4, x2, 6, 8
+	ldrb	w0, [x19, #:lo12:.LANCHOR51]
+	cbz	w0, .L535
+.L538:
+	adrp	x2, .LANCHOR50
+	adrp	x1, .LANCHOR49
+	add	x0, x1, :lo12:.LANCHOR49
+	ldrb	w3, [x2, #:lo12:.LANCHOR50]
+	ubfiz	x4, x3, 6, 8
 	add	x0, x0, x4
-	mov	x4, x3
-	cbz	w20, .L500
-.L501:
-	add	x1, x1, :lo12:.LANCHOR48
-	sbfiz	x2, x2, 6, 32
-	add	x3, x1, x2
-	ldrb	w5, [x1, x2]
-	strb	w5, [x4, #:lo12:.LANCHOR49]
-	ldrb	w4, [x19, #:lo12:.LANCHOR50]
-	strh	wzr, [x3, 50]
+	mov	x4, x2
+	cbz	w20, .L536
+.L537:
+	add	x1, x1, :lo12:.LANCHOR49
+	sbfiz	x3, x3, 6, 32
+	add	x2, x1, x3
+	ldrb	w5, [x1, x3]
+	strb	w5, [x4, #:lo12:.LANCHOR50]
+	ldrb	w4, [x19, #:lo12:.LANCHOR51]
+	strh	wzr, [x2, 50]
 	sub	w4, w4, #1
-	strb	w4, [x19, #:lo12:.LANCHOR50]
+	strb	w4, [x19, #:lo12:.LANCHOR51]
 	mov	w4, 1
-	str	xzr, [x3, 16]
-	strb	w4, [x3, 2]
+	strb	wzr, [x2, 56]
+	strb	w4, [x2, 2]
 	mov	w4, -1
-	strb	w4, [x1, x2]
+	strb	wzr, [x2, 57]
+	strb	w4, [x1, x3]
 	mov	w1, -1
-	str	w1, [x3, 36]
-	b	.L498
-.L499:
+	str	xzr, [x2, 16]
+	str	w1, [x2, 36]
+	b	.L534
+.L535:
 	mov	w2, 121
-	adrp	x1, .LANCHOR52
+	adrp	x1, .LANCHOR54
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR52
+	add	x1, x1, :lo12:.LANCHOR54
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	ldrb	w0, [x19, #:lo12:.LANCHOR50]
-	cbnz	w0, .L502
-.L504:
+	ldrb	w0, [x19, #:lo12:.LANCHOR51]
+	cbnz	w0, .L538
+.L540:
 	mov	x0, 0
-.L498:
+.L534:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L500:
-	ldrb	w3, [x19, #:lo12:.LANCHOR50]
-	cmp	w3, 1
-	bne	.L501
-	b	.L504
+.L536:
+	ldrb	w2, [x19, #:lo12:.LANCHOR51]
+	cmp	w2, 1
+	bne	.L537
+	b	.L540
 	.size	buf_alloc, .-buf_alloc
 	.section	.text.buf_remove_buf,"ax",@progbits
 	.align	2
@@ -2669,30 +2834,30 @@ buf_remove_buf:
 	ldrb	w4, [x1, 1]
 	ldrb	w2, [x0]
 	cmp	w4, w2
-	bne	.L512
+	bne	.L548
 	ldrb	w1, [x1]
 	strb	w1, [x0]
-.L516:
+.L552:
 	mov	w0, 1
 	ret
-.L513:
+.L549:
 	mov	w3, w2
 	sbfiz	x2, x2, 6, 32
 	ldrb	w2, [x0, x2]
 	cmp	w4, w2
-	bne	.L514
+	bne	.L550
 	sbfiz	x3, x3, 6, 32
 	ldrb	w2, [x1]
 	strb	w2, [x0, x3]
 	mov	w0, -1
 	strb	w0, [x1]
-	b	.L516
-.L512:
-	adrp	x0, .LANCHOR48
-	add	x0, x0, :lo12:.LANCHOR48
-.L514:
+	b	.L552
+.L548:
+	adrp	x0, .LANCHOR49
+	add	x0, x0, :lo12:.LANCHOR49
+.L550:
 	cmp	w2, 255
-	bne	.L513
+	bne	.L549
 	mov	w0, 0
 	ret
 	.size	buf_remove_buf, .-buf_remove_buf
@@ -2704,32 +2869,32 @@ buf_remove_free:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR50
+	adrp	x19, .LANCHOR51
 	mov	x20, x0
-	ldrb	w0, [x19, #:lo12:.LANCHOR50]
-	cbnz	w0, .L518
-	adrp	x1, .LANCHOR53
+	ldrb	w0, [x19, #:lo12:.LANCHOR51]
+	cbnz	w0, .L554
+	adrp	x1, .LANCHOR55
 	adrp	x0, .LC0
-	mov	w2, 170
-	add	x1, x1, :lo12:.LANCHOR53
+	mov	w2, 172
+	add	x1, x1, :lo12:.LANCHOR55
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L518:
-	ldrb	w0, [x19, #:lo12:.LANCHOR50]
-	cbz	w0, .L517
+.L554:
+	ldrb	w0, [x19, #:lo12:.LANCHOR51]
+	cbz	w0, .L553
 	mov	x1, x20
-	adrp	x0, .LANCHOR49
-	add	x0, x0, :lo12:.LANCHOR49
+	adrp	x0, .LANCHOR50
+	add	x0, x0, :lo12:.LANCHOR50
 	bl	buf_remove_buf
 	cmp	w0, 1
-	bne	.L517
-	ldrb	w0, [x19, #:lo12:.LANCHOR50]
+	bne	.L553
+	ldrb	w0, [x19, #:lo12:.LANCHOR51]
 	sub	w0, w0, #1
-	strb	w0, [x19, #:lo12:.LANCHOR50]
+	strb	w0, [x19, #:lo12:.LANCHOR51]
 	ldrb	w0, [x20, 2]
 	orr	w0, w0, 1
 	strb	w0, [x20, 2]
-.L517:
+.L553:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -2753,8 +2918,8 @@ flash_check_bad_block:
 	asr	w2, w2, 5
 	lsl	w2, w2, 2
 	umaddl	x0, w2, w5, x0
-	adrp	x2, .LANCHOR22
-	ldr	x2, [x2, #:lo12:.LANCHOR22]
+	adrp	x2, .LANCHOR26
+	ldr	x2, [x2, #:lo12:.LANCHOR26]
 	add	x0, x0, x4, uxtw 2
 	ldr	w0, [x2, x0]
 	lsr	w0, w0, w1
@@ -2792,8 +2957,8 @@ flash_mask_bad_block:
 	umaddl	x1, w1, w21, x19
 	ldr	x21, [sp, 32]
 	add	x1, x1, x0, uxtw 2
-	adrp	x0, .LANCHOR22
-	ldr	x2, [x0, #:lo12:.LANCHOR22]
+	adrp	x0, .LANCHOR26
+	ldr	x2, [x0, #:lo12:.LANCHOR26]
 	mov	w0, 1
 	lsl	w0, w0, w20
 	ldr	w20, [x2, x1]
@@ -2814,15 +2979,15 @@ ftl_gc_write_buf:
 	orr	w1, w1, 2
 	strb	w1, [x0, 2]
 	mov	x1, x0
-	adrp	x0, .LANCHOR54
-	add	x0, x0, :lo12:.LANCHOR54
+	adrp	x0, .LANCHOR56
+	add	x0, x0, :lo12:.LANCHOR56
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR55
+	adrp	x1, .LANCHOR57
 	ldp	x29, x30, [sp], 16
-	ldrb	w0, [x1, #:lo12:.LANCHOR55]
+	ldrb	w0, [x1, #:lo12:.LANCHOR57]
 	add	w0, w0, 1
 	and	w0, w0, 255
-	strb	w0, [x1, #:lo12:.LANCHOR55]
+	strb	w0, [x1, #:lo12:.LANCHOR57]
 	ret
 	.size	ftl_gc_write_buf, .-ftl_gc_write_buf
 	.section	.text.zftl_cache_flush,"ax",@progbits
@@ -2832,101 +2997,16 @@ ftl_gc_write_buf:
 zftl_cache_flush:
 	ret
 	.size	zftl_cache_flush, .-zftl_cache_flush
-	.section	.text.ftl_read_buf,"ax",@progbits
-	.align	2
-	.global	ftl_read_buf
-	.type	ftl_read_buf, %function
-ftl_read_buf:
-	stp	x29, x30, [sp, -48]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	w20, w0
-	adrp	x0, .LANCHOR56
-	str	x21, [sp, 32]
-	mov	x21, x1
-	ldr	w0, [x0, #:lo12:.LANCHOR56]
-	cmp	w0, w20
-	bhi	.L530
-	adrp	x1, .LANCHOR57
-	adrp	x0, .LC0
-	mov	w2, 905
-	add	x1, x1, :lo12:.LANCHOR57
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L530:
-	adrp	x19, .LANCHOR48
-	add	x1, x19, :lo12:.LANCHOR48
-	add	x1, x1, 2
-	mov	w0, 0
-.L533:
-	ldr	w2, [x1, 34]
-	cmp	w20, w2
-	bne	.L531
-	ldrb	w2, [x1]
-	tbz	x2, 3, .L531
-	ubfiz	x0, x0, 6, 32
-	add	x19, x19, :lo12:.LANCHOR48
-	add	x19, x19, x0
-	orr	w0, w2, 4
-	strb	w0, [x19, 2]
-	tbnz	x2, 0, .L529
-	mov	x0, x19
-	bl	buf_remove_free
-.L529:
-	mov	x0, x19
-	ldr	x21, [sp, 32]
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
-	ret
-.L531:
-	add	w0, w0, 1
-	add	x1, x1, 64
-	cmp	w0, 32
-	bne	.L533
-	adrp	x0, .LANCHOR58
-	ldr	w1, [x0, #:lo12:.LANCHOR58]
-	cmn	w1, #1
-	bne	.L534
-	str	w20, [x0, #:lo12:.LANCHOR58]
-	adrp	x0, .LANCHOR59
-	str	x21, [x0, #:lo12:.LANCHOR59]
-.L534:
-	mov	x19, 0
-	b	.L529
-	.size	ftl_read_buf, .-ftl_read_buf
-	.section	.text.ftl_read_buf_free,"ax",@progbits
-	.align	2
-	.global	ftl_read_buf_free
-	.type	ftl_read_buf_free, %function
-ftl_read_buf_free:
-	mov	x5, x0
-	stp	x29, x30, [sp, -16]!
-	mov	x1, x0
-	adrp	x0, .LANCHOR60
-	add	x29, sp, 0
-	add	x0, x0, :lo12:.LANCHOR60
-	bl	buf_remove_buf
-	ldrb	w0, [x5, 2]
-	tbz	x0, 1, .L541
-	and	w0, w0, -5
-	strb	w0, [x5, 2]
-	ldp	x29, x30, [sp], 16
-	ret
-.L541:
-	ldp	x29, x30, [sp], 16
-	mov	x0, x5
-	b	buf_free
-	.size	ftl_read_buf_free, .-ftl_read_buf_free
 	.section	.text.zftl_get_density,"ax",@progbits
 	.align	2
 	.global	zftl_get_density
 	.type	zftl_get_density, %function
 zftl_get_density:
-	cbnz	w0, .L546
-	adrp	x0, .LANCHOR61
-	ldr	w0, [x0, #:lo12:.LANCHOR61]
+	cbnz	w0, .L566
+	adrp	x0, .LANCHOR58
+	ldr	w0, [x0, #:lo12:.LANCHOR58]
 	ret
-.L546:
+.L566:
 	cmp	w0, 4
 	cset	w0, cc
 	lsl	w0, w0, 13
@@ -2951,8 +3031,8 @@ vpn_check:
 	.global	FtlGetCurEraseBlock
 	.type	FtlGetCurEraseBlock, %function
 FtlGetCurEraseBlock:
-	adrp	x0, .LANCHOR62
-	ldrh	w0, [x0, #:lo12:.LANCHOR62]
+	adrp	x0, .LANCHOR59
+	ldrh	w0, [x0, #:lo12:.LANCHOR59]
 	ret
 	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
 	.section	.text.FtlGetAllBlockNum,"ax",@progbits
@@ -2960,8 +3040,8 @@ FtlGetCurEraseBlock:
 	.global	FtlGetAllBlockNum
 	.type	FtlGetAllBlockNum, %function
 FtlGetAllBlockNum:
-	adrp	x0, .LANCHOR2
-	ldrh	w0, [x0, #:lo12:.LANCHOR2]
+	adrp	x0, .LANCHOR6
+	ldrh	w0, [x0, #:lo12:.LANCHOR6]
 	ret
 	.size	FtlGetAllBlockNum, .-FtlGetAllBlockNum
 	.section	.text.FtlLowFormat,"ax",@progbits
@@ -2981,100 +3061,100 @@ gc_add_sblk:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 65535
-	adrp	x0, .LANCHOR2
+	adrp	x0, .LANCHOR6
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	and	w24, w1, 65535
-	ldrh	w0, [x0, #:lo12:.LANCHOR2]
+	ldrh	w0, [x0, #:lo12:.LANCHOR6]
 	and	w25, w2, 65535
 	stp	x21, x22, [sp, 32]
 	str	x27, [sp, 80]
 	cmp	w0, w20
-	bhi	.L555
-	adrp	x1, .LANCHOR63
+	bhi	.L575
+	adrp	x1, .LANCHOR60
 	adrp	x0, .LC0
 	mov	w2, 258
-	add	x1, x1, :lo12:.LANCHOR63
+	add	x1, x1, :lo12:.LANCHOR60
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L555:
-	adrp	x22, .LANCHOR5
+.L575:
+	adrp	x22, .LANCHOR9
 	uxtw	x19, w20
 	lsl	x26, x19, 1
-	adrp	x23, .LANCHOR9
-	ldr	x0, [x22, #:lo12:.LANCHOR5]
-	adrp	x27, .LANCHOR3
+	adrp	x23, .LANCHOR14
+	ldr	x0, [x22, #:lo12:.LANCHOR9]
+	adrp	x27, .LANCHOR7
 	ldrh	w21, [x0, x26]
-	ldr	w0, [x23, #:lo12:.LANCHOR9]
-	tbz	x0, 8, .L556
-	ldr	x0, [x27, #:lo12:.LANCHOR3]
+	ldr	w0, [x23, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L576
+	ldr	x0, [x27, #:lo12:.LANCHOR7]
 	mov	w4, w21
 	mov	w2, w24
 	mov	w1, w20
 	add	x0, x0, x19, lsl 2
 	ldrb	w3, [x0, 2]
-	adrp	x0, .LANCHOR64
-	ldrh	w6, [x0, #:lo12:.LANCHOR64]
-	adrp	x0, .LANCHOR65+56
+	adrp	x0, .LANCHOR61
+	ldrh	w6, [x0, #:lo12:.LANCHOR61]
+	adrp	x0, .LANCHOR62+56
 	ubfx	x3, x3, 5, 3
-	ldrh	w5, [x0, #:lo12:.LANCHOR65+56]
+	ldrh	w5, [x0, #:lo12:.LANCHOR62+56]
 	adrp	x0, .LC41
 	add	x0, x0, :lo12:.LC41
 	bl	printf
-.L556:
-	ldr	x0, [x27, #:lo12:.LANCHOR3]
+.L576:
+	ldr	x0, [x27, #:lo12:.LANCHOR7]
 	add	x19, x0, x19, lsl 2
 	ldrb	w2, [x19, 2]
 	tst	w2, 224
-	bne	.L557
-	cbz	w21, .L577
-	adrp	x1, .LANCHOR63
+	bne	.L577
+	cbz	w21, .L597
+	adrp	x1, .LANCHOR60
 	adrp	x0, .LC0
 	mov	w2, 263
-	add	x1, x1, :lo12:.LANCHOR63
+	add	x1, x1, :lo12:.LANCHOR60
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L577:
+.L597:
 	mov	w0, 0
-	b	.L554
-.L557:
-	adrp	x0, .LANCHOR65
-	add	x1, x0, :lo12:.LANCHOR65
-	ldrh	w0, [x0, #:lo12:.LANCHOR65]
+	b	.L574
+.L577:
+	adrp	x0, .LANCHOR62
+	add	x1, x0, :lo12:.LANCHOR62
+	ldrh	w0, [x0, #:lo12:.LANCHOR62]
 	cmp	w0, w20
-	beq	.L577
-	adrp	x21, .LANCHOR6
-	ldr	x0, [x21, #:lo12:.LANCHOR6]
+	beq	.L597
+	adrp	x21, .LANCHOR10
+	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	ldrh	w3, [x0, 48]
 	cmp	w3, w20
-	beq	.L577
+	beq	.L597
 	ldrh	w3, [x0, 16]
 	cmp	w3, w20
-	beq	.L577
+	beq	.L597
 	ldrh	w3, [x0, 80]
 	cmp	w3, w20
-	beq	.L577
+	beq	.L597
 	ldrh	w4, [x1, 56]
 	add	x1, x1, 58
 	mov	w3, 0
-.L559:
+.L579:
 	cmp	w3, w4
-	bcc	.L560
-	cbnz	w24, .L564
-	adrp	x1, .LANCHOR66
-	ldrh	w5, [x1, #:lo12:.LANCHOR66]
+	bcc	.L580
+	cbnz	w24, .L584
+	adrp	x1, .LANCHOR63
+	ldrh	w5, [x1, #:lo12:.LANCHOR63]
 	cmp	w20, w5
-	beq	.L577
-	adrp	x3, .LANCHOR67
-	add	x3, x3, :lo12:.LANCHOR67
+	beq	.L597
+	adrp	x3, .LANCHOR64
+	add	x3, x3, :lo12:.LANCHOR64
 	mov	x1, 0
-.L563:
+.L583:
 	ldrh	w6, [x1, x3]
 	cmp	w20, w6
-	bne	.L562
-	ldr	w0, [x23, #:lo12:.LANCHOR9]
-	tbz	x0, 8, .L577
-	ldr	x0, [x22, #:lo12:.LANCHOR5]
+	bne	.L582
+	ldr	w0, [x23, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L597
+	ldr	x0, [x22, #:lo12:.LANCHOR9]
 	mov	w4, w20
 	ubfx	x2, x2, 5, 3
 	mov	w1, w20
@@ -3082,51 +3162,51 @@ gc_add_sblk:
 	adrp	x0, .LC42
 	add	x0, x0, :lo12:.LC42
 	bl	printf
-	b	.L577
-.L560:
+	b	.L597
+.L580:
 	ldrh	w5, [x1], 2
 	cmp	w5, w20
-	beq	.L577
+	beq	.L597
 	add	w3, w3, 1
-	b	.L559
-.L562:
+	b	.L579
+.L582:
 	add	x1, x1, 2
 	cmp	x1, 16
-	bne	.L563
+	bne	.L583
 	ubfiz	x19, x25, 7, 16
 	add	x19, x19, 136
 	add	x19, x0, x19
-.L565:
-	ldr	w0, [x23, #:lo12:.LANCHOR9]
-	tbz	x0, 8, .L566
-	ldr	x0, [x22, #:lo12:.LANCHOR5]
-	adrp	x1, .LANCHOR64
+.L585:
+	ldr	w0, [x23, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L586
+	ldr	x0, [x22, #:lo12:.LANCHOR9]
+	adrp	x1, .LANCHOR61
 	mov	w5, w4
 	ubfx	x3, x2, 5, 3
-	ldrh	w6, [x1, #:lo12:.LANCHOR64]
+	ldrh	w6, [x1, #:lo12:.LANCHOR61]
 	mov	w2, w24
 	mov	w1, w20
 	ldrh	w4, [x0, x26]
 	adrp	x0, .LC41
 	add	x0, x0, :lo12:.LC41
 	bl	printf
-.L566:
+.L586:
 	mov	x0, x19
 	add	x1, x19, 128
 	mov	w2, 65535
-.L569:
+.L589:
 	ldrh	w3, [x0]
 	cmp	w3, w2
-	bne	.L567
+	bne	.L587
 	strh	w20, [x0]
-	cbz	w24, .L568
-	ldr	x1, [x21, #:lo12:.LANCHOR6]
+	cbz	w24, .L588
+	ldr	x1, [x21, #:lo12:.LANCHOR10]
 	ldrh	w0, [x1, 124]
 	add	w0, w0, 1
 	strh	w0, [x1, 124]
-.L587:
+.L607:
 	mov	w0, 1
-.L554:
+.L574:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -3134,30 +3214,30 @@ gc_add_sblk:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L564:
+.L584:
 	add	x19, x0, 392
-	b	.L565
-.L568:
-	ldr	x0, [x21, #:lo12:.LANCHOR6]
+	b	.L585
+.L588:
+	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	add	x25, x0, x25, uxth 1
 	ldrh	w0, [x25, 120]
 	add	w0, w0, 1
 	strh	w0, [x25, 120]
-	b	.L587
-.L567:
+	b	.L607
+.L587:
 	add	x0, x0, 2
 	cmp	x1, x0
-	bne	.L569
-	b	.L587
+	bne	.L589
+	b	.L607
 	.size	gc_add_sblk, .-gc_add_sblk
 	.section	.text.gc_get_src_ppa_from_index,"ax",@progbits
 	.align	2
 	.global	gc_get_src_ppa_from_index
 	.type	gc_get_src_ppa_from_index, %function
 gc_get_src_ppa_from_index:
-	adrp	x1, .LANCHOR68
+	adrp	x1, .LANCHOR65
 	ubfiz	x0, x0, 2, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR68]
+	ldr	x1, [x1, #:lo12:.LANCHOR65]
 	ldr	w0, [x1, x0]
 	ret
 	.size	gc_get_src_ppa_from_index, .-gc_get_src_ppa_from_index
@@ -3169,18 +3249,18 @@ gc_write_completed:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR69
+	adrp	x23, .LANCHOR66
 	stp	x21, x22, [sp, 32]
-	adrp	x24, .LANCHOR48
-	add	x23, x23, :lo12:.LANCHOR69
-	add	x22, x24, :lo12:.LANCHOR48
+	adrp	x24, .LANCHOR49
+	add	x23, x23, :lo12:.LANCHOR66
+	add	x22, x24, :lo12:.LANCHOR49
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-.L590:
+.L610:
 	ldrb	w19, [x23]
 	cmp	w19, 255
-	bne	.L601
+	bne	.L621
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -3188,47 +3268,47 @@ gc_write_completed:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L601:
+.L621:
 	lsl	x1, x19, 6
-	add	x0, x24, :lo12:.LANCHOR48
+	add	x0, x24, :lo12:.LANCHOR49
 	add	x2, x0, x1
 	ldrb	w0, [x0, x1]
 	ldr	w1, [x2, 52]
 	strb	w0, [x23]
 	ldrh	w25, [x2, 48]
-	cbz	w1, .L591
+	cbz	w1, .L611
 	ldr	w2, [x2, 40]
-	adrp	x0, .LANCHOR65
-	add	x0, x0, :lo12:.LANCHOR65
+	adrp	x0, .LANCHOR62
+	add	x0, x0, :lo12:.LANCHOR62
 	mov	w3, 1
 	str	w2, [x0, 324]
 	strh	w3, [x0, 320]
 	adrp	x0, .LC43
 	add	x0, x0, :lo12:.LC43
 	bl	printf
-	adrp	x1, .LANCHOR70
+	adrp	x1, .LANCHOR67
 	adrp	x0, .LC0
 	mov	w2, 539
-	add	x1, x1, :lo12:.LANCHOR70
+	add	x1, x1, :lo12:.LANCHOR67
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L591:
-	adrp	x26, .LANCHOR71
-	ldrb	w0, [x26, #:lo12:.LANCHOR71]
+.L611:
+	adrp	x26, .LANCHOR68
+	ldrb	w0, [x26, #:lo12:.LANCHOR68]
 	cmp	w0, 3
-	bne	.L602
-	adrp	x0, .LANCHOR6
-	ldr	x0, [x0, #:lo12:.LANCHOR6]
+	bne	.L622
+	adrp	x0, .LANCHOR10
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldrb	w20, [x0, 89]
 	add	w20, w20, w20, lsl 1
 	and	w20, w20, 1023
-.L592:
-	adrp	x0, .LANCHOR9
-	adrp	x28, .LANCHOR72
+.L612:
+	adrp	x0, .LANCHOR14
+	adrp	x28, .LANCHOR69
 	and	x21, x25, 65535
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 8, .L593
-	ldr	x1, [x28, #:lo12:.LANCHOR72]
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L613
+	ldr	x1, [x28, #:lo12:.LANCHOR69]
 	add	x0, x22, x19, lsl 6
 	mov	w3, w25
 	ldrb	w2, [x0, 1]
@@ -3237,55 +3317,55 @@ gc_write_completed:
 	add	x0, x0, :lo12:.LC44
 	mov	w1, w25
 	bl	printf
-.L593:
-	ldr	x1, [x28, #:lo12:.LANCHOR72]
+.L613:
+	ldr	x1, [x28, #:lo12:.LANCHOR69]
 	add	x0, x22, x19, lsl 6
 	mov	x27, x21
 	ldrb	w0, [x0, 1]
 	ldrb	w1, [x1, x21]
 	cmp	w1, w0
-	beq	.L594
-	adrp	x1, .LANCHOR70
+	beq	.L614
+	adrp	x1, .LANCHOR67
 	adrp	x0, .LC0
 	mov	w2, 546
-	add	x1, x1, :lo12:.LANCHOR70
+	add	x1, x1, :lo12:.LANCHOR67
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L594:
+.L614:
 	add	x19, x22, x19, lsl 6
 	ldrb	w0, [x19, 61]
 	cmp	w0, 3
-	beq	.L595
-	ldrb	w0, [x26, #:lo12:.LANCHOR71]
+	beq	.L615
+	ldrb	w0, [x26, #:lo12:.LANCHOR68]
 	cmp	w0, 3
-	bne	.L595
-	adrp	x0, .LANCHOR73
-	ldrb	w0, [x0, #:lo12:.LANCHOR73]
-	cbnz	w0, .L595
-	ldr	x1, [x28, #:lo12:.LANCHOR72]
+	bne	.L615
+	adrp	x0, .LANCHOR70
+	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	cbnz	w0, .L615
+	ldr	x1, [x28, #:lo12:.LANCHOR69]
 	mov	x0, 0
 	add	x21, x1, x21
-.L596:
+.L616:
 	cmp	w20, w0, uxth
-	bls	.L590
+	bls	.L610
 	ldrb	w1, [x21, x0]
 	add	x0, x0, 1
 	add	x1, x22, x1, lsl 6
 	strb	wzr, [x1, 61]
-	b	.L596
-.L602:
+	b	.L616
+.L622:
 	mov	w20, 1
-	b	.L592
-.L595:
-	adrp	x19, .LANCHOR65
-	add	x19, x19, :lo12:.LANCHOR65
+	b	.L612
+.L615:
+	adrp	x19, .LANCHOR62
+	add	x19, x19, :lo12:.LANCHOR62
 	add	x20, x21, x20, uxth
 	mov	w21, -1
 	strh	w25, [x19, 316]
-.L597:
+.L617:
 	cmp	x20, x27
-	beq	.L590
-	ldr	x1, [x28, #:lo12:.LANCHOR72]
+	beq	.L610
+	ldr	x1, [x28, #:lo12:.LANCHOR69]
 	ldrb	w0, [x1, x27]
 	strb	w21, [x1, x27]
 	add	x27, x27, 1
@@ -3298,56 +3378,56 @@ gc_write_completed:
 	ldrb	w0, [x19, 7]
 	sub	w0, w0, #1
 	strb	w0, [x19, 7]
-	b	.L597
+	b	.L617
 	.size	gc_write_completed, .-gc_write_completed
 	.section	.text.gc_get_src_blk,"ax",@progbits
 	.align	2
 	.global	gc_get_src_blk
 	.type	gc_get_src_blk, %function
 gc_get_src_blk:
-	adrp	x0, .LANCHOR6
-	ldr	x2, [x0, #:lo12:.LANCHOR6]
-	adrp	x0, .LANCHOR74
-	ldrb	w3, [x0, #:lo12:.LANCHOR74]
+	adrp	x0, .LANCHOR10
+	ldr	x2, [x0, #:lo12:.LANCHOR10]
+	adrp	x0, .LANCHOR71
+	ldrb	w3, [x0, #:lo12:.LANCHOR71]
 	ldrh	w0, [x2, 124]
-	cbz	w0, .L614
+	cbz	w0, .L634
 	add	x1, x2, 392
 	mov	w4, 1
-.L615:
+.L635:
 	add	x5, x1, 128
 	mov	w6, 65535
-.L619:
+.L639:
 	ldrh	w0, [x1]
 	cmp	w0, w6
-	beq	.L617
+	beq	.L637
 	mov	w5, -1
 	strh	w5, [x1]
-	cbz	w4, .L618
+	cbz	w4, .L638
 	ldrh	w1, [x2, 124]
 	sub	w1, w1, #1
 	strh	w1, [x2, 124]
 	ret
-.L614:
+.L634:
 	add	x0, x2, x3, sxtw 1
 	ldrh	w0, [x0, 120]
-	cbz	w0, .L620
+	cbz	w0, .L640
 	ubfiz	x1, x3, 7, 8
 	mov	w4, 0
 	add	x1, x1, 136
 	add	x1, x2, x1
-	b	.L615
-.L618:
+	b	.L635
+.L638:
 	add	x2, x2, x3, uxtb 1
 	ldrh	w1, [x2, 120]
 	sub	w1, w1, #1
 	strh	w1, [x2, 120]
 	ret
-.L617:
+.L637:
 	add	x1, x1, 2
 	cmp	x1, x5
-	bne	.L619
+	bne	.L639
 	ret
-.L620:
+.L640:
 	mov	w0, 65535
 	ret
 	.size	gc_get_src_blk, .-gc_get_src_blk
@@ -3359,86 +3439,86 @@ gc_free_temp_buf:
 	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR65
-	add	x0, x20, :lo12:.LANCHOR65
+	adrp	x20, .LANCHOR62
+	add	x0, x20, :lo12:.LANCHOR62
 	stp	x21, x22, [sp, 32]
 	ldrb	w1, [x0, 7]
-	cbz	w1, .L629
-	adrp	x1, .LANCHOR50
-	ldrb	w1, [x1, #:lo12:.LANCHOR50]
+	cbz	w1, .L649
+	adrp	x1, .LANCHOR51
+	ldrb	w1, [x1, #:lo12:.LANCHOR51]
 	cmp	w1, 1
-	bhi	.L629
+	bhi	.L649
 	ldrh	w19, [x0, 316]
-	adrp	x2, .LANCHOR76
-	adrp	x0, .LANCHOR75
-	adrp	x21, .LANCHOR72
-	ldrb	w2, [x2, #:lo12:.LANCHOR76]
+	adrp	x2, .LANCHOR73
+	adrp	x0, .LANCHOR72
+	adrp	x21, .LANCHOR69
+	ldrb	w2, [x2, #:lo12:.LANCHOR73]
 	add	w1, w19, 24
-	ldrh	w0, [x0, #:lo12:.LANCHOR75]
-	ldr	x4, [x21, #:lo12:.LANCHOR72]
+	ldrh	w0, [x0, #:lo12:.LANCHOR72]
+	ldr	x4, [x21, #:lo12:.LANCHOR69]
 	mul	w0, w0, w2
 	cmp	w0, w1
 	csel	w1, w0, w1, ls
-	adrp	x0, .LANCHOR48
-	add	x0, x0, :lo12:.LANCHOR48
-.L624:
+	adrp	x0, .LANCHOR49
+	add	x0, x0, :lo12:.LANCHOR49
+.L644:
 	cmp	w19, w1
-	bcc	.L627
-.L629:
+	bcc	.L647
+.L649:
 	mov	w0, 0
-	b	.L622
-.L627:
+	b	.L642
+.L647:
 	uxtw	x22, w19
 	ldrb	w2, [x4, x22]
 	cmp	w2, 255
-	beq	.L625
+	beq	.L645
 	sbfiz	x3, x2, 6, 32
 	add	x3, x0, x3
 	ldrb	w3, [x3, 61]
-	cbnz	w3, .L625
+	cbnz	w3, .L645
 	ubfiz	x2, x2, 6, 8
 	add	x0, x0, x2
 	bl	buf_free
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 8, .L626
-	ldr	x0, [x21, #:lo12:.LANCHOR72]
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L646
+	ldr	x0, [x21, #:lo12:.LANCHOR69]
 	mov	w1, w19
 	ldrb	w2, [x0, x22]
 	adrp	x0, .LC45
 	add	x0, x0, :lo12:.LC45
 	bl	printf
-.L626:
-	ldr	x0, [x21, #:lo12:.LANCHOR72]
-	add	x20, x20, :lo12:.LANCHOR65
+.L646:
+	ldr	x0, [x21, #:lo12:.LANCHOR69]
+	add	x20, x20, :lo12:.LANCHOR62
 	mov	w1, -1
 	strb	w1, [x0, x22]
 	ldrb	w0, [x20, 7]
 	sub	w0, w0, #1
 	strb	w0, [x20, 7]
 	mov	w0, 1
-.L622:
+.L642:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L625:
+.L645:
 	add	w19, w19, 1
-	b	.L624
+	b	.L644
 	.size	gc_free_temp_buf, .-gc_free_temp_buf
 	.section	.text.print_gc_debug_info,"ax",@progbits
 	.align	2
 	.global	print_gc_debug_info
 	.type	print_gc_debug_info, %function
 print_gc_debug_info:
-	adrp	x2, .LANCHOR77
-	adrp	x1, .LANCHOR65
-	add	x0, x1, :lo12:.LANCHOR65
-	ldrh	w6, [x2, #:lo12:.LANCHOR77]
-	adrp	x2, .LANCHOR50
-	ldrh	w1, [x1, #:lo12:.LANCHOR65]
+	adrp	x2, .LANCHOR74
+	adrp	x1, .LANCHOR62
+	add	x0, x1, :lo12:.LANCHOR62
+	ldrh	w6, [x2, #:lo12:.LANCHOR74]
+	adrp	x2, .LANCHOR51
+	ldrh	w1, [x1, #:lo12:.LANCHOR62]
 	ldrb	w5, [x0, 7]
-	ldrb	w4, [x2, #:lo12:.LANCHOR50]
+	ldrb	w4, [x2, #:lo12:.LANCHOR51]
 	ldrh	w3, [x0, 314]
 	ldrh	w2, [x0, 2]
 	adrp	x0, .LC46
@@ -3453,21 +3533,21 @@ zftl_get_gc_node:
 	and	w1, w1, 65535
 	and	w0, w0, 65535
 	cmp	w1, 5
-	bne	.L639
+	bne	.L659
 	mov	w1, w0
-	adrp	x0, .LANCHOR78
-	ldr	x0, [x0, #:lo12:.LANCHOR78]
-.L641:
+	adrp	x0, .LANCHOR75
+	ldr	x0, [x0, #:lo12:.LANCHOR75]
+.L661:
 	b	_list_get_gc_head_node.isra.2
-.L639:
+.L659:
 	cmp	w1, 2
-	bne	.L640
-	b	zftl_get_gc_node.part.10
-.L640:
+	bne	.L660
+	b	zftl_get_gc_node.part.9
+.L660:
 	mov	w1, w0
-	adrp	x0, .LANCHOR79
-	ldr	x0, [x0, #:lo12:.LANCHOR79]
-	b	.L641
+	adrp	x0, .LANCHOR76
+	ldr	x0, [x0, #:lo12:.LANCHOR76]
+	b	.L661
 	.size	zftl_get_gc_node, .-zftl_get_gc_node
 	.section	.text.gc_search_src_blk,"ax",@progbits
 	.align	2
@@ -3481,16 +3561,16 @@ gc_search_src_blk:
 	and	w0, w1, 255
 	stp	x19, x20, [sp, 16]
 	str	w0, [x29, 112]
-	adrp	x0, .LANCHOR6
+	adrp	x0, .LANCHOR10
 	stp	x23, x24, [sp, 48]
-	ldr	x0, [x0, #:lo12:.LANCHOR6]
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	add	x0, x0, x21, sxtw 1
 	ldrh	w19, [x0, 120]
-	cbz	w19, .L643
+	cbz	w19, .L663
 	mov	w0, w19
-.L642:
+.L662:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -3498,72 +3578,72 @@ gc_search_src_blk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L643:
+.L663:
 	and	w20, w2, 255
-	cbnz	w21, .L645
-	adrp	x24, .LANCHOR80
-	adrp	x26, .LANCHOR9
+	cbnz	w21, .L665
+	adrp	x24, .LANCHOR77
+	adrp	x26, .LANCHOR14
 	adrp	x27, .LC47
 	and	w22, w20, 65535
-	add	x26, x26, :lo12:.LANCHOR9
+	add	x26, x26, :lo12:.LANCHOR14
 	add	x27, x27, :lo12:.LC47
-	strh	wzr, [x24, #:lo12:.LANCHOR80]
+	strh	wzr, [x24, #:lo12:.LANCHOR77]
 	mov	w23, 0
 	mov	w25, 0
-.L646:
+.L666:
 	cmp	w25, w22
-	bcs	.L651
-	ldrh	w6, [x24, #:lo12:.LANCHOR80]
-	add	x7, x24, :lo12:.LANCHOR80
+	bcs	.L671
+	ldrh	w6, [x24, #:lo12:.LANCHOR77]
+	add	x7, x24, :lo12:.LANCHOR77
 	mov	w1, 3
 	mov	w0, w6
 	bl	zftl_get_gc_node
 	add	w2, w6, 1
 	and	w2, w2, 65535
-	strh	w2, [x24, #:lo12:.LANCHOR80]
+	strh	w2, [x24, #:lo12:.LANCHOR77]
 	and	w1, w0, 65535
 	mov	w0, 65535
 	mov	w28, w1
 	cmp	w1, w0
-	beq	.L647
+	beq	.L667
 	ldr	w0, [x26]
-	adrp	x6, .LANCHOR5
+	adrp	x6, .LANCHOR9
 	uxtw	x4, w1
-	tbz	x0, 8, .L648
-	ldr	x0, [x6, #:lo12:.LANCHOR5]
+	tbz	x0, 8, .L668
+	ldr	x0, [x6, #:lo12:.LANCHOR9]
 	stp	x6, x4, [x29, 96]
 	ldrh	w3, [x0, x4, lsl 1]
 	mov	x0, x27
 	bl	printf
 	ldp	x6, x4, [x29, 96]
-.L648:
-	ldr	x0, [x6, #:lo12:.LANCHOR5]
+.L668:
+	ldr	x0, [x6, #:lo12:.LANCHOR9]
 	ldrh	w1, [x0, x4, lsl 1]
-	adrp	x0, .LANCHOR64
-	ldrh	w0, [x0, #:lo12:.LANCHOR64]
+	adrp	x0, .LANCHOR61
+	ldrh	w0, [x0, #:lo12:.LANCHOR61]
 	cmp	w1, w0
-	bcs	.L649
+	bcs	.L669
 	mov	w2, 0
 	mov	w1, 0
 	mov	w0, w28
 	bl	gc_add_sblk
-	cbz	w0, .L650
+	cbz	w0, .L670
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w22, w23
-	bcs	.L650
-.L651:
+	bcs	.L670
+.L671:
 	ldr	x0, [x29, 112]
-	tbz	x0, 1, .L653
-	adrp	x25, .LANCHOR82
-	adrp	x24, .LANCHOR81
-	add	x27, x25, :lo12:.LANCHOR82
-	add	x24, x24, :lo12:.LANCHOR81
+	tbz	x0, 1, .L673
+	adrp	x25, .LANCHOR79
+	adrp	x24, .LANCHOR78
+	add	x27, x25, :lo12:.LANCHOR79
+	add	x24, x24, :lo12:.LANCHOR78
 	mov	w28, 0
 	mov	w26, 65535
-.L654:
+.L674:
 	cmp	w28, w22
-	beq	.L658
+	beq	.L678
 	ldrh	w6, [x24]
 	mov	w1, 5
 	mov	w0, w6
@@ -3572,114 +3652,114 @@ gc_search_src_blk:
 	strh	w6, [x24]
 	and	w1, w0, 65535
 	cmp	w1, w26
-	beq	.L655
-	adrp	x2, .LANCHOR5
+	beq	.L675
+	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR5]
+	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x1]
 	ldrh	w1, [x27]
 	cmp	w2, w1
-	bcs	.L655
+	bcs	.L675
 	mov	w2, 0
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L657
+	cbz	w0, .L677
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w22, w23
-	bcs	.L657
-.L658:
+	bcs	.L677
+.L678:
 	cmp	w23, w22
-	adrp	x0, .LANCHOR83
-	bcs	.L660
-	ldrh	w1, [x0, #:lo12:.LANCHOR83]
-	adrp	x3, .LANCHOR76
-	adrp	x0, .LANCHOR75
-	ldrh	w2, [x25, #:lo12:.LANCHOR82]
-	ldrb	w3, [x3, #:lo12:.LANCHOR76]
-	ldrh	w0, [x0, #:lo12:.LANCHOR75]
+	adrp	x0, .LANCHOR80
+	bcs	.L680
+	ldrh	w1, [x0, #:lo12:.LANCHOR80]
+	adrp	x3, .LANCHOR73
+	adrp	x0, .LANCHOR72
+	ldrh	w2, [x25, #:lo12:.LANCHOR79]
+	ldrb	w3, [x3, #:lo12:.LANCHOR73]
+	ldrh	w0, [x0, #:lo12:.LANCHOR72]
 	mul	w0, w0, w3
 	sub	w0, w0, w1, lsr 2
 	cmp	w2, w0
-	bge	.L653
+	bge	.L673
 	add	w1, w2, w1, lsr 3
-	strh	w1, [x25, #:lo12:.LANCHOR82]
-.L653:
+	strh	w1, [x25, #:lo12:.LANCHOR79]
+.L673:
 	ldr	x0, [x29, 112]
-	tbz	x0, 0, .L661
+	tbz	x0, 0, .L681
 	cmp	w23, w22
-	bcs	.L661
-	adrp	x24, .LANCHOR84
-	add	x24, x24, :lo12:.LANCHOR84
+	bcs	.L681
+	adrp	x24, .LANCHOR81
+	add	x24, x24, :lo12:.LANCHOR81
 	mov	w25, 65535
-.L666:
+.L686:
 	ldrh	w6, [x24]
 	mov	w0, w6
-	bl	zftl_get_gc_node.part.10
+	bl	zftl_get_gc_node.part.9
 	add	w6, w6, 1
 	strh	w6, [x24]
 	cmp	w25, w0, uxth
-	beq	.L662
+	beq	.L682
 	mov	w2, 0
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L663
+	cbz	w0, .L683
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w22, w23
-	bhi	.L663
-.L664:
-	adrp	x0, .LANCHOR83
-	adrp	x1, .LANCHOR64
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
-	ldrh	w2, [x1, #:lo12:.LANCHOR64]
+	bhi	.L683
+.L684:
+	adrp	x0, .LANCHOR80
+	adrp	x1, .LANCHOR61
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	ldrh	w2, [x1, #:lo12:.LANCHOR61]
 	cmp	w2, w0, lsr 1
-	bls	.L661
+	bls	.L681
 	sub	w0, w2, w0, lsr 3
-	b	.L741
-.L649:
-	strh	wzr, [x24, #:lo12:.LANCHOR80]
-	b	.L651
-.L647:
+	b	.L761
+.L669:
+	strh	wzr, [x24, #:lo12:.LANCHOR77]
+	b	.L671
+.L667:
 	strh	wzr, [x7]
-	b	.L651
-.L650:
+	b	.L671
+.L670:
 	add	w25, w25, 1
 	and	w25, w25, 65535
-	b	.L646
-.L655:
+	b	.L666
+.L675:
 	strh	wzr, [x24]
-	b	.L658
-.L657:
+	b	.L678
+.L677:
 	add	w28, w28, 1
 	and	w28, w28, 65535
-	b	.L654
-.L660:
-	ldrh	w1, [x25, #:lo12:.LANCHOR82]
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	b	.L674
+.L680:
+	ldrh	w1, [x25, #:lo12:.LANCHOR79]
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w1, w0
-	bls	.L653
+	bls	.L673
 	sub	w0, w1, w0, lsr 3
-	strh	w0, [x25, #:lo12:.LANCHOR82]
-	b	.L653
-.L662:
+	strh	w0, [x25, #:lo12:.LANCHOR79]
+	b	.L673
+.L682:
 	strh	wzr, [x24]
-.L665:
+.L685:
 	cmp	w23, w22
-	bcs	.L664
-	adrp	x1, .LANCHOR64
-	adrp	x0, .LANCHOR83
-	ldrh	w2, [x1, #:lo12:.LANCHOR64]
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	bcs	.L684
+	adrp	x1, .LANCHOR61
+	adrp	x0, .LANCHOR80
+	ldrh	w2, [x1, #:lo12:.LANCHOR61]
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w2, w0
-	bcs	.L661
+	bcs	.L681
 	add	w0, w2, w0, lsr 3
-.L741:
-	strh	w0, [x1, #:lo12:.LANCHOR64]
-.L661:
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 8, .L688
+.L761:
+	strh	w0, [x1, #:lo12:.LANCHOR61]
+.L681:
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L708
 	ldr	w2, [x29, 112]
 	adrp	x0, .LC48
 	mov	w4, w20
@@ -3687,104 +3767,104 @@ gc_search_src_blk:
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC48
 	bl	printf
-.L688:
+.L708:
 	mov	w0, w23
-	b	.L642
-.L663:
+	b	.L662
+.L683:
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	cmp	w22, w19
-	bne	.L666
-	b	.L665
-.L645:
-	adrp	x0, .LANCHOR65+318
-	strh	wzr, [x0, #:lo12:.LANCHOR65+318]
-	adrp	x0, .LANCHOR85
-	strh	wzr, [x0, #:lo12:.LANCHOR85]
+	bne	.L686
+	b	.L685
+.L665:
+	adrp	x0, .LANCHOR62+318
+	strh	wzr, [x0, #:lo12:.LANCHOR62+318]
+	adrp	x0, .LANCHOR82
+	strh	wzr, [x0, #:lo12:.LANCHOR82]
 	ldr	w0, [x29, 112]
 	and	w0, w0, 1
 	str	w0, [x29, 104]
 	ldr	x0, [x29, 112]
-	tbz	x0, 0, .L691
-	adrp	x1, .LANCHOR87
-	adrp	x25, .LANCHOR86
+	tbz	x0, 0, .L711
+	adrp	x1, .LANCHOR84
+	adrp	x25, .LANCHOR83
 	str	x1, [x29, 96]
-	adrp	x26, .LANCHOR88
-	ldrh	w0, [x25, #:lo12:.LANCHOR86]
-	ldrh	w2, [x1, #:lo12:.LANCHOR87]
+	adrp	x26, .LANCHOR85
+	ldrh	w0, [x25, #:lo12:.LANCHOR83]
+	ldrh	w2, [x1, #:lo12:.LANCHOR84]
 	cmp	w0, w2, lsr 2
-	bcc	.L668
-	ldrh	w1, [x26, #:lo12:.LANCHOR88]
+	bcc	.L688
+	ldrh	w1, [x26, #:lo12:.LANCHOR85]
 	cmp	w1, w0
-	bls	.L692
-.L668:
-	ldrh	w0, [x26, #:lo12:.LANCHOR88]
-	adrp	x22, .LANCHOR84
+	bls	.L712
+.L688:
+	ldrh	w0, [x26, #:lo12:.LANCHOR85]
+	adrp	x22, .LANCHOR81
 	lsr	w0, w0, 2
-	strh	w0, [x22, #:lo12:.LANCHOR84]
+	strh	w0, [x22, #:lo12:.LANCHOR81]
 	mov	w0, 0
-	bl	zftl_get_gc_node.part.10
+	bl	zftl_get_gc_node.part.9
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L694
-	adrp	x2, .LANCHOR5
+	beq	.L714
+	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
-	ldr	x3, [x2, #:lo12:.LANCHOR5]
-	adrp	x2, .LANCHOR83
-	ldrh	w2, [x2, #:lo12:.LANCHOR83]
+	ldr	x3, [x2, #:lo12:.LANCHOR9]
+	adrp	x2, .LANCHOR80
+	ldrh	w2, [x2, #:lo12:.LANCHOR80]
 	ldrh	w1, [x3, x1]
 	cmp	w1, w2, lsr 2
-	bcs	.L694
-	strh	wzr, [x22, #:lo12:.LANCHOR84]
+	bcs	.L714
+	strh	wzr, [x22, #:lo12:.LANCHOR81]
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
 	cmp	w0, 0
 	cset	w23, ne
-.L670:
-	add	x22, x22, :lo12:.LANCHOR84
+.L690:
+	add	x22, x22, :lo12:.LANCHOR81
 	and	w28, w20, 65535
 	mov	w24, 64
 	mov	w27, 65535
-.L672:
+.L692:
 	ldrh	w6, [x22]
 	mov	w0, w6
-	bl	zftl_get_gc_node.part.10
+	bl	zftl_get_gc_node.part.9
 	add	w6, w6, 1
 	strh	w6, [x22]
 	cmp	w27, w0, uxth
-	beq	.L669
+	beq	.L689
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L671
+	cbz	w0, .L691
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w23, w28
-	bcs	.L669
-.L671:
+	bcs	.L689
+.L691:
 	sub	w24, w24, #1
 	ands	w24, w24, 65535
-	bne	.L672
-.L669:
+	bne	.L692
+.L689:
 	ldr	x0, [x29, 96]
-	ldrh	w1, [x25, #:lo12:.LANCHOR86]
-	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	ldrh	w1, [x25, #:lo12:.LANCHOR83]
+	ldrh	w0, [x0, #:lo12:.LANCHOR84]
 	cmp	w1, w0, lsr 3
-	bhi	.L689
-	ldrh	w0, [x26, #:lo12:.LANCHOR88]
+	bhi	.L709
+	ldrh	w0, [x26, #:lo12:.LANCHOR85]
 	add	w0, w0, 8
 	cmp	w1, w0
-	ble	.L667
-.L689:
-	adrp	x24, .LANCHOR80
+	ble	.L687
+.L709:
+	adrp	x24, .LANCHOR77
 	and	w26, w20, 65535
 	mov	w22, 64
 	mov	w25, 65535
-	strh	wzr, [x24, #:lo12:.LANCHOR80]
-	add	x24, x24, :lo12:.LANCHOR80
-.L674:
+	strh	wzr, [x24, #:lo12:.LANCHOR77]
+	add	x24, x24, :lo12:.LANCHOR77
+.L694:
 	ldrh	w6, [x24]
 	mov	w1, 3
 	mov	w0, w6
@@ -3792,31 +3872,31 @@ gc_search_src_blk:
 	add	w6, w6, 1
 	strh	w6, [x24]
 	cmp	w25, w0, uxth
-	beq	.L667
+	beq	.L687
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L673
+	cbz	w0, .L693
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w23, w26
-	bcs	.L667
-.L673:
+	bcs	.L687
+.L693:
 	sub	w22, w22, #1
 	ands	w22, w22, 65535
-	bne	.L674
-.L667:
+	bne	.L694
+.L687:
 	ldr	x0, [x29, 112]
-	tbz	x0, 1, .L675
-	adrp	x24, .LANCHOR81
-	adrp	x28, .LANCHOR89
-	adrp	x25, .LANCHOR76
-	add	x26, x24, :lo12:.LANCHOR81
-	add	x27, x28, :lo12:.LANCHOR89
-	add	x25, x25, :lo12:.LANCHOR76
-	strh	wzr, [x24, #:lo12:.LANCHOR81]
+	tbz	x0, 1, .L695
+	adrp	x24, .LANCHOR78
+	adrp	x28, .LANCHOR86
+	adrp	x25, .LANCHOR73
+	add	x26, x24, :lo12:.LANCHOR78
+	add	x27, x28, :lo12:.LANCHOR86
+	add	x25, x25, :lo12:.LANCHOR73
+	strh	wzr, [x24, #:lo12:.LANCHOR78]
 	mov	w22, 64
-.L680:
+.L700:
 	ldrh	w6, [x26]
 	mov	w1, 5
 	mov	w0, w6
@@ -3826,159 +3906,159 @@ gc_search_src_blk:
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L676
+	beq	.L696
 	cmp	w20, 1
-	bne	.L677
-	adrp	x3, .LANCHOR75
+	bne	.L697
+	adrp	x3, .LANCHOR72
 	ldrb	w2, [x25]
-	ldrh	w3, [x3, #:lo12:.LANCHOR75]
+	ldrh	w3, [x3, #:lo12:.LANCHOR72]
 	mul	w3, w2, w3
-	adrp	x2, .LANCHOR83
-	ldrh	w2, [x2, #:lo12:.LANCHOR83]
+	adrp	x2, .LANCHOR80
+	ldrh	w2, [x2, #:lo12:.LANCHOR80]
 	sub	w2, w3, w2, lsr 3
 	strh	w2, [x27]
-.L677:
-	adrp	x2, .LANCHOR5
+.L697:
+	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR5]
+	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x1]
 	ldrh	w1, [x27]
 	cmp	w2, w1
-	bcs	.L678
+	bcs	.L698
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L679
+	cbz	w0, .L699
 	add	w5, w23, 1
 	add	w19, w19, 1
 	and	w23, w5, 65535
 	and	w19, w19, 65535
 	cmp	w23, w20
-	bcc	.L679
-.L676:
+	bcc	.L699
+.L696:
 	cmp	w23, w20
-	adrp	x0, .LANCHOR83
-	adrp	x3, .LANCHOR76
-	bcc	.L681
-	cbnz	w19, .L682
-	adrp	x1, .LANCHOR90
-	ldrh	w2, [x1, #:lo12:.LANCHOR90]
-	adrp	x1, .LANCHOR91
-	ldrh	w1, [x1, #:lo12:.LANCHOR91]
+	adrp	x0, .LANCHOR80
+	adrp	x3, .LANCHOR73
+	bcc	.L701
+	cbnz	w19, .L702
+	adrp	x1, .LANCHOR87
+	ldrh	w2, [x1, #:lo12:.LANCHOR87]
+	adrp	x1, .LANCHOR88
+	ldrh	w1, [x1, #:lo12:.LANCHOR88]
 	cmp	w2, w1
-	bls	.L682
-.L681:
-	ldrh	w2, [x0, #:lo12:.LANCHOR83]
-	adrp	x0, .LANCHOR75
-	ldrb	w3, [x3, #:lo12:.LANCHOR76]
-	ldrh	w0, [x0, #:lo12:.LANCHOR75]
-	ldrh	w1, [x28, #:lo12:.LANCHOR89]
+	bls	.L702
+.L701:
+	ldrh	w2, [x0, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR72
+	ldrb	w3, [x3, #:lo12:.LANCHOR73]
+	ldrh	w0, [x0, #:lo12:.LANCHOR72]
+	ldrh	w1, [x28, #:lo12:.LANCHOR86]
 	lsr	w2, w2, 3
 	mul	w0, w0, w3
 	sub	w0, w0, w2
 	cmp	w1, w0
-	bge	.L675
+	bge	.L695
 	add	w1, w1, w2
-	strh	w1, [x28, #:lo12:.LANCHOR89]
-.L675:
+	strh	w1, [x28, #:lo12:.LANCHOR86]
+.L695:
 	ldr	w0, [x29, 104]
-	cbz	w0, .L661
-	adrp	x25, .LANCHOR80
-	adrp	x22, .LANCHOR92
-	adrp	x26, .LANCHOR87
-	adrp	x27, .LANCHOR86
-	add	x28, x22, :lo12:.LANCHOR92
-	add	x26, x26, :lo12:.LANCHOR87
-	add	x27, x27, :lo12:.LANCHOR86
-	strh	wzr, [x25, #:lo12:.LANCHOR80]
+	cbz	w0, .L681
+	adrp	x25, .LANCHOR77
+	adrp	x22, .LANCHOR89
+	adrp	x26, .LANCHOR84
+	adrp	x27, .LANCHOR83
+	add	x28, x22, :lo12:.LANCHOR89
+	add	x26, x26, :lo12:.LANCHOR84
+	add	x27, x27, :lo12:.LANCHOR83
+	strh	wzr, [x25, #:lo12:.LANCHOR77]
 	mov	w24, 64
-.L686:
-	ldrh	w6, [x25, #:lo12:.LANCHOR80]
+.L706:
+	ldrh	w6, [x25, #:lo12:.LANCHOR77]
 	mov	w1, 3
 	mov	w0, w6
 	bl	zftl_get_gc_node
 	add	w6, w6, 1
-	strh	w6, [x25, #:lo12:.LANCHOR80]
+	strh	w6, [x25, #:lo12:.LANCHOR77]
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L683
-	adrp	x2, .LANCHOR5
+	beq	.L703
+	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR5]
+	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w1, [x2, x1]
 	ldrh	w2, [x28]
 	cmp	w2, w1
-	bls	.L684
+	bls	.L704
 	cmp	w1, 2
-	bls	.L684
+	bls	.L704
 	ldrh	w2, [x26]
 	ldrh	w1, [x27]
 	cmp	w1, w2, lsr 1
-	bls	.L683
-.L684:
+	bls	.L703
+.L704:
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L685
+	cbz	w0, .L705
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w23, w20
-	bcs	.L683
-.L685:
+	bcs	.L703
+.L705:
 	sub	w24, w24, #1
 	ands	w24, w24, 65535
-	bne	.L686
-.L683:
+	bne	.L706
+.L703:
 	cmp	w23, w20
-	adrp	x0, .LANCHOR83
-	bcs	.L687
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
-	ldrh	w1, [x22, #:lo12:.LANCHOR92]
+	adrp	x0, .LANCHOR80
+	bcs	.L707
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	ldrh	w1, [x22, #:lo12:.LANCHOR89]
 	cmp	w1, w0, lsr 1
-	bls	.L661
+	bls	.L681
 	sub	w0, w1, w0, lsr 3
-	strh	w0, [x22, #:lo12:.LANCHOR92]
-	b	.L661
-.L694:
+	strh	w0, [x22, #:lo12:.LANCHOR89]
+	b	.L681
+.L714:
 	mov	w23, 0
-	b	.L670
-.L691:
+	b	.L690
+.L711:
 	mov	w23, 0
-	b	.L667
-.L678:
-	strh	wzr, [x24, #:lo12:.LANCHOR81]
-	b	.L676
-.L679:
+	b	.L687
+.L698:
+	strh	wzr, [x24, #:lo12:.LANCHOR78]
+	b	.L696
+.L699:
 	sub	w22, w22, #1
 	ands	w22, w22, 65535
-	bne	.L680
-	b	.L676
-.L682:
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
-	ldrb	w1, [x3, #:lo12:.LANCHOR76]
-	ldrh	w2, [x28, #:lo12:.LANCHOR89]
+	bne	.L700
+	b	.L696
+.L702:
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	ldrb	w1, [x3, #:lo12:.LANCHOR73]
+	ldrh	w2, [x28, #:lo12:.LANCHOR86]
 	mul	w1, w1, w0
 	cmp	w2, w1
-	ble	.L675
+	ble	.L695
 	sub	w0, w2, w0, lsr 3
-	strh	w0, [x28, #:lo12:.LANCHOR89]
-	b	.L675
-.L687:
-	ldrh	w1, [x0, #:lo12:.LANCHOR83]
-	adrp	x0, .LANCHOR76
-	ldrh	w2, [x22, #:lo12:.LANCHOR92]
-	ldrb	w0, [x0, #:lo12:.LANCHOR76]
+	strh	w0, [x28, #:lo12:.LANCHOR86]
+	b	.L695
+.L707:
+	ldrh	w1, [x0, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR73
+	ldrh	w2, [x22, #:lo12:.LANCHOR89]
+	ldrb	w0, [x0, #:lo12:.LANCHOR73]
 	mul	w0, w0, w1
 	sub	w0, w0, #32
 	cmp	w2, w0
-	bge	.L661
+	bge	.L681
 	add	w1, w2, w1, lsr 3
-	strh	w1, [x22, #:lo12:.LANCHOR92]
-	b	.L661
-.L692:
+	strh	w1, [x22, #:lo12:.LANCHOR89]
+	b	.L681
+.L712:
 	mov	w23, 0
-	b	.L669
+	b	.L689
 	.size	gc_search_src_blk, .-gc_search_src_blk
 	.section	.text.zftl_insert_free_list,"ax",@progbits
 	.align	2
@@ -3986,32 +4066,32 @@ gc_search_src_blk:
 	.type	zftl_insert_free_list, %function
 zftl_insert_free_list:
 	and	w1, w0, 65535
-	adrp	x0, .LANCHOR3
-	ldr	x0, [x0, #:lo12:.LANCHOR3]
+	adrp	x0, .LANCHOR7
+	ldr	x0, [x0, #:lo12:.LANCHOR7]
 	add	x0, x0, x1, uxth 2
 	ldrb	w0, [x0, 2]
 	ands	w0, w0, 24
-	bne	.L743
-	adrp	x2, .LANCHOR93
-	adrp	x0, .LANCHOR94
-	add	x2, x2, :lo12:.LANCHOR93
-	add	x0, x0, :lo12:.LANCHOR94
-.L745:
+	bne	.L763
+	adrp	x2, .LANCHOR90
+	adrp	x0, .LANCHOR91
+	add	x2, x2, :lo12:.LANCHOR90
+	add	x0, x0, :lo12:.LANCHOR91
+.L765:
 	b	_insert_free_list
-.L743:
+.L763:
 	cmp	w0, 16
-	bne	.L744
-	adrp	x2, .LANCHOR95
-	adrp	x0, .LANCHOR96
-	add	x2, x2, :lo12:.LANCHOR95
-	add	x0, x0, :lo12:.LANCHOR96
-	b	.L745
-.L744:
-	adrp	x2, .LANCHOR97
-	adrp	x0, .LANCHOR98
-	add	x2, x2, :lo12:.LANCHOR97
-	add	x0, x0, :lo12:.LANCHOR98
-	b	.L745
+	bne	.L764
+	adrp	x2, .LANCHOR92
+	adrp	x0, .LANCHOR93
+	add	x2, x2, :lo12:.LANCHOR92
+	add	x0, x0, :lo12:.LANCHOR93
+	b	.L765
+.L764:
+	adrp	x2, .LANCHOR94
+	adrp	x0, .LANCHOR95
+	add	x2, x2, :lo12:.LANCHOR94
+	add	x0, x0, :lo12:.LANCHOR95
+	b	.L765
 	.size	zftl_insert_free_list, .-zftl_insert_free_list
 	.section	.text.zftl_insert_data_list,"ax",@progbits
 	.align	2
@@ -4019,36 +4099,36 @@ zftl_insert_free_list:
 	.type	zftl_insert_data_list, %function
 zftl_insert_data_list:
 	and	w1, w0, 65535
-	adrp	x0, .LANCHOR3
-	ldr	x0, [x0, #:lo12:.LANCHOR3]
+	adrp	x0, .LANCHOR7
+	ldr	x0, [x0, #:lo12:.LANCHOR7]
 	add	x0, x0, x1, uxth 2
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L747
-	adrp	x2, .LANCHOR88
-	adrp	x0, .LANCHOR8
-	add	x2, x2, :lo12:.LANCHOR88
-	add	x0, x0, :lo12:.LANCHOR8
-.L750:
+	bne	.L767
+	adrp	x2, .LANCHOR85
+	adrp	x0, .LANCHOR12
+	add	x2, x2, :lo12:.LANCHOR85
+	add	x0, x0, :lo12:.LANCHOR12
+.L770:
 	b	_insert_data_list
-.L747:
+.L767:
 	cmp	w2, 96
-	bne	.L748
-	adrp	x2, .LANCHOR86
-	adrp	x0, .LANCHOR79
-	add	x2, x2, :lo12:.LANCHOR86
-	add	x0, x0, :lo12:.LANCHOR79
-	b	.L750
-.L748:
+	bne	.L768
+	adrp	x2, .LANCHOR83
+	adrp	x0, .LANCHOR76
+	add	x2, x2, :lo12:.LANCHOR83
+	add	x0, x0, :lo12:.LANCHOR76
+	b	.L770
+.L768:
 	cmp	w2, 160
-	bne	.L746
-	adrp	x2, .LANCHOR90
-	adrp	x0, .LANCHOR78
-	add	x2, x2, :lo12:.LANCHOR90
-	add	x0, x0, :lo12:.LANCHOR78
-	b	.L750
-.L746:
+	bne	.L766
+	adrp	x2, .LANCHOR87
+	adrp	x0, .LANCHOR75
+	add	x2, x2, :lo12:.LANCHOR87
+	add	x0, x0, :lo12:.LANCHOR75
+	b	.L770
+.L766:
 	ret
 	.size	zftl_insert_data_list, .-zftl_insert_data_list
 	.section	.text.zftl_gc_get_free_sblk,"ax",@progbits
@@ -4059,69 +4139,69 @@ zftl_gc_get_free_sblk:
 	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR6
+	adrp	x20, .LANCHOR10
 	stp	x21, x22, [sp, 32]
 	and	w21, w0, 65535
-	ldr	x0, [x20, #:lo12:.LANCHOR6]
+	ldr	x0, [x20, #:lo12:.LANCHOR10]
 	and	w22, w1, 65535
 	ldrh	w19, [x0, 588]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L752
-	cbnz	w21, .L752
+	beq	.L772
+	cbnz	w21, .L772
 	mov	w1, w19
 	adrp	x0, .LC49
 	add	x0, x0, :lo12:.LC49
 	bl	printf
-	ldr	x0, [x20, #:lo12:.LANCHOR6]
+	ldr	x0, [x20, #:lo12:.LANCHOR10]
 	mov	w1, -1
 	strh	w1, [x0, 588]
-.L753:
+.L773:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L752:
-	adrp	x2, .LANCHOR95
-	adrp	x20, .LANCHOR97
-	ldrh	w0, [x2, #:lo12:.LANCHOR95]
-	ldrh	w1, [x20, #:lo12:.LANCHOR97]
+.L772:
+	adrp	x2, .LANCHOR92
+	adrp	x20, .LANCHOR94
+	ldrh	w0, [x2, #:lo12:.LANCHOR92]
+	ldrh	w1, [x20, #:lo12:.LANCHOR94]
 	cmp	w0, w1
-	bls	.L754
+	bls	.L774
 	lsr	w1, w0, 3
 	cmp	w21, 0
-	adrp	x0, .LANCHOR96
+	adrp	x0, .LANCHOR93
 	csel	w1, w1, wzr, ne
-	add	x2, x2, :lo12:.LANCHOR95
-	add	x0, x0, :lo12:.LANCHOR96
-.L768:
+	add	x2, x2, :lo12:.LANCHOR92
+	add	x0, x0, :lo12:.LANCHOR93
+.L788:
 	bl	_list_pop_index_node
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	bne	.L759
-	adrp	x0, .LANCHOR93
-	ldrh	w5, [x20, #:lo12:.LANCHOR97]
+	bne	.L779
+	adrp	x0, .LANCHOR90
+	ldrh	w5, [x20, #:lo12:.LANCHOR94]
 	mov	w2, w22
 	mov	w1, w19
-	ldrh	w4, [x0, #:lo12:.LANCHOR93]
-	adrp	x0, .LANCHOR94
-	ldr	x3, [x0, #:lo12:.LANCHOR94]
+	ldrh	w4, [x0, #:lo12:.LANCHOR90]
+	adrp	x0, .LANCHOR91
+	ldr	x3, [x0, #:lo12:.LANCHOR91]
 	adrp	x0, .LC50
 	add	x0, x0, :lo12:.LC50
 	bl	printf
-.L759:
-	cbz	w21, .L753
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 8, .L753
-	adrp	x4, .LANCHOR5
-	adrp	x1, .LANCHOR3
+.L779:
+	cbz	w21, .L773
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L773
+	adrp	x4, .LANCHOR9
+	adrp	x1, .LANCHOR7
 	uxtw	x3, w19
-	ldr	x1, [x1, #:lo12:.LANCHOR3]
+	ldr	x1, [x1, #:lo12:.LANCHOR7]
 	lsl	x0, x3, 2
-	ldr	x6, [x4, #:lo12:.LANCHOR5]
+	ldr	x6, [x4, #:lo12:.LANCHOR9]
 	add	x2, x1, x0
 	ldr	w4, [x1, x0]
 	ldrh	w6, [x6, x3, lsl 1]
@@ -4135,20 +4215,20 @@ zftl_gc_get_free_sblk:
 	ubfx	x2, x2, 5, 3
 	add	x0, x0, :lo12:.LC51
 	bl	printf
-	b	.L753
-.L754:
-	cbnz	w21, .L757
+	b	.L773
+.L774:
+	cbnz	w21, .L777
 	lsr	w1, w1, 2
-.L758:
-	adrp	x0, .LANCHOR98
-	add	x2, x20, :lo12:.LANCHOR97
-	add	x0, x0, :lo12:.LANCHOR98
-	b	.L768
-.L757:
+.L778:
+	adrp	x0, .LANCHOR95
+	add	x2, x20, :lo12:.LANCHOR94
+	add	x0, x0, :lo12:.LANCHOR95
+	b	.L788
+.L777:
 	mov	w1, 7
 	mul	w1, w0, w1
 	lsr	w1, w1, 3
-	b	.L758
+	b	.L778
 	.size	zftl_gc_get_free_sblk, .-zftl_gc_get_free_sblk
 	.section	.text.zftl_get_free_sblk,"ax",@progbits
 	.align	2
@@ -4161,99 +4241,99 @@ zftl_get_free_sblk:
 	and	w20, w1, 65535
 	str	x21, [sp, 32]
 	cmp	w20, 5
-	bne	.L770
-	adrp	x2, .LANCHOR95
-	adrp	x0, .LANCHOR97
-	ldrh	w3, [x2, #:lo12:.LANCHOR95]
-	ldrh	w1, [x0, #:lo12:.LANCHOR97]
+	bne	.L790
+	adrp	x2, .LANCHOR92
+	adrp	x0, .LANCHOR94
+	ldrh	w3, [x2, #:lo12:.LANCHOR92]
+	ldrh	w1, [x0, #:lo12:.LANCHOR94]
 	cmp	w3, w1
-	bcc	.L771
-	adrp	x4, .LANCHOR93
-	ldrh	w4, [x4, #:lo12:.LANCHOR93]
+	bcc	.L791
+	adrp	x4, .LANCHOR90
+	ldrh	w4, [x4, #:lo12:.LANCHOR90]
 	cmp	w4, w3
-	bls	.L772
-	cbz	w1, .L772
-.L771:
-	add	x2, x0, :lo12:.LANCHOR97
-	lsr	w1, w1, 1
+	bls	.L792
+	cbz	w1, .L792
 .L791:
-	adrp	x0, .LANCHOR98
-	add	x0, x0, :lo12:.LANCHOR98
-	b	.L790
-.L772:
-	adrp	x0, .LANCHOR96
-	add	x2, x2, :lo12:.LANCHOR95
-	add	x0, x0, :lo12:.LANCHOR96
+	add	x2, x0, :lo12:.LANCHOR94
+	lsr	w1, w1, 1
+.L811:
+	adrp	x0, .LANCHOR95
+	add	x0, x0, :lo12:.LANCHOR95
+	b	.L810
+.L792:
+	adrp	x0, .LANCHOR93
+	add	x2, x2, :lo12:.LANCHOR92
+	add	x0, x0, :lo12:.LANCHOR93
 	mov	w1, 0
-.L790:
+.L810:
 	bl	_list_pop_index_node
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	bne	.L775
-	adrp	x0, .LANCHOR97
+	bne	.L795
+	adrp	x0, .LANCHOR94
 	mov	w2, w20
 	mov	w1, w19
-	ldrh	w5, [x0, #:lo12:.LANCHOR97]
-	adrp	x0, .LANCHOR93
-	ldrh	w4, [x0, #:lo12:.LANCHOR93]
-	adrp	x0, .LANCHOR94
-	ldr	x3, [x0, #:lo12:.LANCHOR94]
+	ldrh	w5, [x0, #:lo12:.LANCHOR94]
+	adrp	x0, .LANCHOR90
+	ldrh	w4, [x0, #:lo12:.LANCHOR90]
+	adrp	x0, .LANCHOR91
+	ldr	x3, [x0, #:lo12:.LANCHOR91]
 	adrp	x0, .LC50
 	add	x0, x0, :lo12:.LC50
 	bl	printf
-	b	.L775
-.L770:
-	adrp	x21, .LANCHOR6
+	b	.L795
+.L790:
+	adrp	x21, .LANCHOR10
 	and	w0, w0, 65535
-	ldr	x1, [x21, #:lo12:.LANCHOR6]
+	ldr	x1, [x21, #:lo12:.LANCHOR10]
 	ldrh	w19, [x1, 590]
 	mov	w1, 65535
 	cmp	w19, w1
-	beq	.L774
+	beq	.L794
 	cmp	w20, 1
-	beq	.L774
+	beq	.L794
 	mov	w1, w19
 	adrp	x0, .LC52
 	add	x0, x0, :lo12:.LC52
 	bl	printf
-	ldr	x0, [x21, #:lo12:.LANCHOR6]
+	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	mov	w1, -1
 	strh	w1, [x0, 590]
-.L775:
+.L795:
 	mov	w0, w19
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L774:
-	adrp	x2, .LANCHOR93
-	adrp	x4, .LANCHOR97
-	ldrh	w1, [x2, #:lo12:.LANCHOR93]
-	ldrh	w3, [x4, #:lo12:.LANCHOR97]
+.L794:
+	adrp	x2, .LANCHOR90
+	adrp	x4, .LANCHOR94
+	ldrh	w1, [x2, #:lo12:.LANCHOR90]
+	ldrh	w3, [x4, #:lo12:.LANCHOR94]
 	cmp	w1, w3
-	bcc	.L776
-	adrp	x5, .LANCHOR95
-	ldrh	w5, [x5, #:lo12:.LANCHOR95]
+	bcc	.L796
+	adrp	x5, .LANCHOR92
+	ldrh	w5, [x5, #:lo12:.LANCHOR92]
 	cmp	w5, w1
-	bls	.L777
-	cbz	w3, .L777
-.L776:
+	bls	.L797
+	cbz	w3, .L797
+.L796:
 	cmp	w20, 1
 	lsr	w3, w3, 1
 	csel	w0, w3, w0, eq
-	add	x2, x4, :lo12:.LANCHOR97
+	add	x2, x4, :lo12:.LANCHOR94
 	mov	w1, w0
-	b	.L791
-.L777:
+	b	.L811
+.L797:
 	lsr	w1, w1, 1
 	cmp	w20, 1
 	csel	w0, w1, w0, eq
-	add	x2, x2, :lo12:.LANCHOR93
+	add	x2, x2, :lo12:.LANCHOR90
 	mov	w1, w0
-	adrp	x0, .LANCHOR94
-	add	x0, x0, :lo12:.LANCHOR94
-	b	.L790
+	adrp	x0, .LANCHOR91
+	add	x0, x0, :lo12:.LANCHOR91
+	b	.L810
 	.size	zftl_get_free_sblk, .-zftl_get_free_sblk
 	.section	.text.zftl_remove_data_node,"ax",@progbits
 	.align	2
@@ -4261,36 +4341,36 @@ zftl_get_free_sblk:
 	.type	zftl_remove_data_node, %function
 zftl_remove_data_node:
 	and	w1, w0, 65535
-	adrp	x0, .LANCHOR3
-	ldr	x0, [x0, #:lo12:.LANCHOR3]
+	adrp	x0, .LANCHOR7
+	ldr	x0, [x0, #:lo12:.LANCHOR7]
 	add	x0, x0, x1, uxth 2
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L793
-	adrp	x2, .LANCHOR88
-	adrp	x0, .LANCHOR8
-	add	x2, x2, :lo12:.LANCHOR88
-	add	x0, x0, :lo12:.LANCHOR8
-.L796:
+	bne	.L813
+	adrp	x2, .LANCHOR85
+	adrp	x0, .LANCHOR12
+	add	x2, x2, :lo12:.LANCHOR85
+	add	x0, x0, :lo12:.LANCHOR12
+.L816:
 	b	_list_remove_node
-.L793:
+.L813:
 	cmp	w2, 96
-	bne	.L794
-	adrp	x2, .LANCHOR86
-	adrp	x0, .LANCHOR79
-	add	x2, x2, :lo12:.LANCHOR86
-	add	x0, x0, :lo12:.LANCHOR79
-	b	.L796
-.L794:
+	bne	.L814
+	adrp	x2, .LANCHOR83
+	adrp	x0, .LANCHOR76
+	add	x2, x2, :lo12:.LANCHOR83
+	add	x0, x0, :lo12:.LANCHOR76
+	b	.L816
+.L814:
 	cmp	w2, 160
-	bne	.L792
-	adrp	x2, .LANCHOR90
-	adrp	x0, .LANCHOR78
-	add	x2, x2, :lo12:.LANCHOR90
-	add	x0, x0, :lo12:.LANCHOR78
-	b	.L796
-.L792:
+	bne	.L812
+	adrp	x2, .LANCHOR87
+	adrp	x0, .LANCHOR75
+	add	x2, x2, :lo12:.LANCHOR87
+	add	x0, x0, :lo12:.LANCHOR75
+	b	.L816
+.L812:
 	ret
 	.size	zftl_remove_data_node, .-zftl_remove_data_node
 	.section	.text.zftl_remove_free_node,"ax",@progbits
@@ -4299,32 +4379,32 @@ zftl_remove_data_node:
 	.type	zftl_remove_free_node, %function
 zftl_remove_free_node:
 	and	w1, w0, 65535
-	adrp	x0, .LANCHOR3
-	ldr	x0, [x0, #:lo12:.LANCHOR3]
+	adrp	x0, .LANCHOR7
+	ldr	x0, [x0, #:lo12:.LANCHOR7]
 	add	x0, x0, x1, uxth 2
 	ldrb	w0, [x0, 2]
 	ands	w0, w0, 24
-	bne	.L798
-	adrp	x2, .LANCHOR93
-	adrp	x0, .LANCHOR94
-	add	x2, x2, :lo12:.LANCHOR93
-	add	x0, x0, :lo12:.LANCHOR94
-.L800:
+	bne	.L818
+	adrp	x2, .LANCHOR90
+	adrp	x0, .LANCHOR91
+	add	x2, x2, :lo12:.LANCHOR90
+	add	x0, x0, :lo12:.LANCHOR91
+.L820:
 	b	_list_remove_node
-.L798:
+.L818:
 	cmp	w0, 16
-	bne	.L799
-	adrp	x2, .LANCHOR95
-	adrp	x0, .LANCHOR96
-	add	x2, x2, :lo12:.LANCHOR95
-	add	x0, x0, :lo12:.LANCHOR96
-	b	.L800
-.L799:
-	adrp	x2, .LANCHOR97
-	adrp	x0, .LANCHOR98
-	add	x2, x2, :lo12:.LANCHOR97
-	add	x0, x0, :lo12:.LANCHOR98
-	b	.L800
+	bne	.L819
+	adrp	x2, .LANCHOR92
+	adrp	x0, .LANCHOR93
+	add	x2, x2, :lo12:.LANCHOR92
+	add	x0, x0, :lo12:.LANCHOR93
+	b	.L820
+.L819:
+	adrp	x2, .LANCHOR94
+	adrp	x0, .LANCHOR95
+	add	x2, x2, :lo12:.LANCHOR94
+	add	x0, x0, :lo12:.LANCHOR95
+	b	.L820
 	.size	zftl_remove_free_node, .-zftl_remove_free_node
 	.section	.text.zftl_list_update_data_list,"ax",@progbits
 	.align	2
@@ -4332,36 +4412,36 @@ zftl_remove_free_node:
 	.type	zftl_list_update_data_list, %function
 zftl_list_update_data_list:
 	and	w1, w0, 65535
-	adrp	x0, .LANCHOR3
-	ldr	x0, [x0, #:lo12:.LANCHOR3]
+	adrp	x0, .LANCHOR7
+	ldr	x0, [x0, #:lo12:.LANCHOR7]
 	add	x0, x0, x1, uxth 2
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L802
-	adrp	x2, .LANCHOR88
-	adrp	x0, .LANCHOR8
-	add	x2, x2, :lo12:.LANCHOR88
-	add	x0, x0, :lo12:.LANCHOR8
-.L805:
+	bne	.L822
+	adrp	x2, .LANCHOR85
+	adrp	x0, .LANCHOR12
+	add	x2, x2, :lo12:.LANCHOR85
+	add	x0, x0, :lo12:.LANCHOR12
+.L825:
 	b	_list_update_data_list
-.L802:
+.L822:
 	cmp	w2, 96
-	bne	.L803
-	adrp	x2, .LANCHOR86
-	adrp	x0, .LANCHOR79
-	add	x2, x2, :lo12:.LANCHOR86
-	add	x0, x0, :lo12:.LANCHOR79
-	b	.L805
-.L803:
+	bne	.L823
+	adrp	x2, .LANCHOR83
+	adrp	x0, .LANCHOR76
+	add	x2, x2, :lo12:.LANCHOR83
+	add	x0, x0, :lo12:.LANCHOR76
+	b	.L825
+.L823:
 	cmp	w2, 160
-	bne	.L801
-	adrp	x2, .LANCHOR90
-	adrp	x0, .LANCHOR78
-	add	x2, x2, :lo12:.LANCHOR90
-	add	x0, x0, :lo12:.LANCHOR78
-	b	.L805
-.L801:
+	bne	.L821
+	adrp	x2, .LANCHOR87
+	adrp	x0, .LANCHOR75
+	add	x2, x2, :lo12:.LANCHOR87
+	add	x0, x0, :lo12:.LANCHOR75
+	b	.L825
+.L821:
 	ret
 	.size	zftl_list_update_data_list, .-zftl_list_update_data_list
 	.section	.text.print_list_info,"ax",@progbits
@@ -4382,24 +4462,24 @@ print_list_info:
 	add	x0, x0, :lo12:.LC53
 	bl	printf
 	ldr	x19, [x19]
-	cbz	x19, .L806
+	cbz	x19, .L826
 	mov	x24, -6148914691236517206
 	adrp	x22, .LC54
-	adrp	x21, .LANCHOR99
+	adrp	x21, .LANCHOR96
 	add	x22, x22, :lo12:.LC54
-	add	x21, x21, :lo12:.LANCHOR99
+	add	x21, x21, :lo12:.LANCHOR96
 	mov	w20, 0
-	adrp	x23, .LANCHOR0
+	adrp	x23, .LANCHOR4
 	movk	x24, 0xaaab, lsl 0
-.L810:
-	ldr	x2, [x23, #:lo12:.LANCHOR0]
-	adrp	x1, .LANCHOR3
-	adrp	x8, .LANCHOR5
+.L830:
+	ldr	x2, [x23, #:lo12:.LANCHOR4]
+	adrp	x1, .LANCHOR7
+	adrp	x8, .LANCHOR9
 	ldrh	w5, [x19, 4]
 	sub	x2, x19, x2
-	ldr	x1, [x1, #:lo12:.LANCHOR3]
+	ldr	x1, [x1, #:lo12:.LANCHOR7]
 	asr	x2, x2, 1
-	ldr	x8, [x8, #:lo12:.LANCHOR5]
+	ldr	x8, [x8, #:lo12:.LANCHOR9]
 	ldrh	w4, [x19, 2]
 	mul	x2, x2, x24
 	and	x7, x2, 65535
@@ -4424,16 +4504,16 @@ print_list_info:
 	ldrh	w19, [x19]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L806
-	ldr	x0, [x23, #:lo12:.LANCHOR0]
+	beq	.L826
+	ldr	x0, [x23, #:lo12:.LANCHOR4]
 	mov	w1, 6
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	umaddl	x19, w19, w1, x0
 	ldrh	w0, [x21]
 	cmp	w0, w20
-	bcs	.L810
-.L806:
+	bcs	.L830
+.L826:
 	ldp	x19, x20, [sp, 48]
 	ldp	x21, x22, [sp, 64]
 	ldp	x23, x24, [sp, 80]
@@ -4447,37 +4527,37 @@ print_list_info:
 	.type	dump_all_list_info, %function
 dump_all_list_info:
 	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR93
-	adrp	x0, .LANCHOR94
-	add	x1, x1, :lo12:.LANCHOR93
+	adrp	x1, .LANCHOR90
+	adrp	x0, .LANCHOR91
+	add	x1, x1, :lo12:.LANCHOR90
 	add	x29, sp, 0
-	add	x0, x0, :lo12:.LANCHOR94
+	add	x0, x0, :lo12:.LANCHOR91
 	bl	print_list_info
-	adrp	x1, .LANCHOR95
-	adrp	x0, .LANCHOR96
-	add	x1, x1, :lo12:.LANCHOR95
-	add	x0, x0, :lo12:.LANCHOR96
+	adrp	x1, .LANCHOR92
+	adrp	x0, .LANCHOR93
+	add	x1, x1, :lo12:.LANCHOR92
+	add	x0, x0, :lo12:.LANCHOR93
 	bl	print_list_info
-	adrp	x1, .LANCHOR97
-	adrp	x0, .LANCHOR98
-	add	x1, x1, :lo12:.LANCHOR97
-	add	x0, x0, :lo12:.LANCHOR98
+	adrp	x1, .LANCHOR94
+	adrp	x0, .LANCHOR95
+	add	x1, x1, :lo12:.LANCHOR94
+	add	x0, x0, :lo12:.LANCHOR95
 	bl	print_list_info
-	adrp	x1, .LANCHOR88
-	adrp	x0, .LANCHOR8
-	add	x1, x1, :lo12:.LANCHOR88
-	add	x0, x0, :lo12:.LANCHOR8
+	adrp	x1, .LANCHOR85
+	adrp	x0, .LANCHOR12
+	add	x1, x1, :lo12:.LANCHOR85
+	add	x0, x0, :lo12:.LANCHOR12
 	bl	print_list_info
-	adrp	x1, .LANCHOR86
-	adrp	x0, .LANCHOR79
-	add	x1, x1, :lo12:.LANCHOR86
-	add	x0, x0, :lo12:.LANCHOR79
+	adrp	x1, .LANCHOR83
+	adrp	x0, .LANCHOR76
+	add	x1, x1, :lo12:.LANCHOR83
+	add	x0, x0, :lo12:.LANCHOR76
 	bl	print_list_info
 	ldp	x29, x30, [sp], 16
-	adrp	x1, .LANCHOR90
-	adrp	x0, .LANCHOR78
-	add	x1, x1, :lo12:.LANCHOR90
-	add	x0, x0, :lo12:.LANCHOR78
+	adrp	x1, .LANCHOR87
+	adrp	x0, .LANCHOR75
+	add	x1, x1, :lo12:.LANCHOR87
+	add	x0, x0, :lo12:.LANCHOR75
 	b	print_list_info
 	.size	dump_all_list_info, .-dump_all_list_info
 	.section	.text.ftl_tmp_into_update,"ax",@progbits
@@ -4485,40 +4565,40 @@ dump_all_list_info:
 	.global	ftl_tmp_into_update
 	.type	ftl_tmp_into_update, %function
 ftl_tmp_into_update:
-	adrp	x0, .LANCHOR100
-	ldr	x0, [x0, #:lo12:.LANCHOR100]
+	adrp	x0, .LANCHOR97
+	ldr	x0, [x0, #:lo12:.LANCHOR97]
 	ldr	w1, [x0, 16]
 	cmp	w1, 2048
-	bls	.L815
+	bls	.L835
 	ldr	w2, [x0, 20]
 	add	w2, w2, w1, lsr 11
 	and	w1, w1, 2047
 	stp	w1, w2, [x0, 16]
-.L815:
+.L835:
 	ldr	w1, [x0, 24]
 	cmp	w1, 2048
-	bls	.L816
+	bls	.L836
 	ldr	w2, [x0, 28]
 	add	w2, w2, w1, lsr 11
 	and	w1, w1, 2047
 	stp	w1, w2, [x0, 24]
-.L816:
+.L836:
 	ldr	w1, [x0, 32]
 	cmp	w1, 1024
-	bls	.L817
+	bls	.L837
 	ldr	w2, [x0, 36]
 	add	w2, w2, w1, lsr 10
 	and	w1, w1, 1023
 	stp	w1, w2, [x0, 32]
-.L817:
+.L837:
 	ldr	w1, [x0, 40]
 	cmp	w1, 1024
-	bls	.L814
+	bls	.L834
 	ldr	w2, [x0, 44]
 	add	w2, w2, w1, lsr 10
 	and	w1, w1, 1023
 	stp	w1, w2, [x0, 40]
-.L814:
+.L834:
 	ret
 	.size	ftl_tmp_into_update, .-ftl_tmp_into_update
 	.section	.text.ftl_get_blk_list_in_sblk,"ax",@progbits
@@ -4526,37 +4606,37 @@ ftl_tmp_into_update:
 	.global	ftl_get_blk_list_in_sblk
 	.type	ftl_get_blk_list_in_sblk, %function
 ftl_get_blk_list_in_sblk:
-	adrp	x2, .LANCHOR3
+	adrp	x2, .LANCHOR7
 	and	w0, w0, 65535
-	adrp	x7, .LANCHOR102
-	add	x7, x7, :lo12:.LANCHOR102
-	ldr	x2, [x2, #:lo12:.LANCHOR3]
+	adrp	x7, .LANCHOR99
+	add	x7, x7, :lo12:.LANCHOR99
+	ldr	x2, [x2, #:lo12:.LANCHOR7]
 	mov	w3, 0
 	mov	w13, 21
 	add	x2, x2, x0, uxth 2
 	ldrb	w12, [x2, 3]
-	adrp	x2, .LANCHOR76
-	ldrb	w10, [x2, #:lo12:.LANCHOR76]
-	adrp	x2, .LANCHOR101
-	ldrb	w6, [x2, #:lo12:.LANCHOR101]
+	adrp	x2, .LANCHOR73
+	ldrb	w10, [x2, #:lo12:.LANCHOR73]
+	adrp	x2, .LANCHOR98
+	ldrb	w6, [x2, #:lo12:.LANCHOR98]
 	and	w2, w6, 65535
 	mul	w0, w0, w2
 	sub	w2, w2, #1
 	sxth	w5, w2
 	and	w4, w0, 65535
 	mov	w0, 0
-.L820:
+.L840:
 	cmp	w3, w10
-	blt	.L824
+	blt	.L844
 	sxtw	x2, w0
 	mov	w3, -1
-.L825:
+.L845:
 	cmp	w10, w2
-	bgt	.L826
+	bgt	.L846
 	ret
-.L824:
+.L844:
 	asr	w2, w12, w3
-	tbnz	x2, 0, .L821
+	tbnz	x2, 0, .L841
 	sdiv	w2, w3, w6
 	ldrh	w8, [x7]
 	sbfiz	x11, x0, 1, 32
@@ -4565,21 +4645,21 @@ ftl_get_blk_list_in_sblk:
 	lsl	w2, w2, w8
 	add	w2, w4, w2
 	and	w2, w2, 65535
-	bhi	.L822
-.L827:
+	bhi	.L842
+.L847:
 	add	w0, w0, 1
 	strh	w2, [x1, x11]
-.L821:
+.L841:
 	add	w3, w3, 1
-	b	.L820
-.L822:
+	b	.L840
+.L842:
 	and	w8, w5, w3
 	add	w2, w2, w8
-	b	.L827
-.L826:
+	b	.L847
+.L846:
 	strh	w3, [x1, x2, lsl 1]
 	add	x2, x2, 1
-	b	.L825
+	b	.L845
 	.size	ftl_get_blk_list_in_sblk, .-ftl_get_blk_list_in_sblk
 	.section	.text.ftl_free_sblk,"ax",@progbits
 	.align	2
@@ -4589,28 +4669,28 @@ ftl_free_sblk:
 	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR3
+	adrp	x22, .LANCHOR7
 	str	x23, [sp, 48]
 	and	x23, x0, 65535
-	ldr	x4, [x22, #:lo12:.LANCHOR3]
+	ldr	x4, [x22, #:lo12:.LANCHOR7]
 	lsl	x21, x23, 2
 	stp	x19, x20, [sp, 16]
 	mov	x19, x23
 	add	x20, x4, x21
 	ldrb	w0, [x20, 2]
-	tbz	x0, 3, .L830
-	adrp	x1, .LANCHOR100
+	tbz	x0, 3, .L850
+	adrp	x1, .LANCHOR97
 	ldrh	w2, [x4, x21]
-	adrp	x8, .LANCHOR103
-	ldr	x7, [x1, #:lo12:.LANCHOR100]
+	adrp	x8, .LANCHOR100
+	ldr	x7, [x1, #:lo12:.LANCHOR97]
 	and	w3, w2, 2047
 	ldr	w2, [x4, x21]
-	ldrh	w8, [x8, #:lo12:.LANCHOR103]
+	ldrh	w8, [x8, #:lo12:.LANCHOR100]
 	ldrh	w1, [x7, 74]
 	ubfx	x6, x2, 11, 8
-	adrp	x2, .LANCHOR4
+	adrp	x2, .LANCHOR8
 	add	w1, w3, w1
-	ldrh	w2, [x2, #:lo12:.LANCHOR4]
+	ldrh	w2, [x2, #:lo12:.LANCHOR8]
 	and	w5, w1, 65535
 	ldrh	w1, [x7, 72]
 	add	w1, w6, w1
@@ -4618,26 +4698,26 @@ ftl_free_sblk:
 	and	w1, w1, 65535
 	add	w7, w7, w1
 	cmp	w7, w8
-	ble	.L831
-	adrp	x1, .LANCHOR91
-	adrp	x7, .LANCHOR95
-	ldrh	w5, [x1, #:lo12:.LANCHOR91]
-	adrp	x1, .LANCHOR90
-	ldrh	w7, [x7, #:lo12:.LANCHOR95]
-	ldrh	w1, [x1, #:lo12:.LANCHOR90]
+	ble	.L851
+	adrp	x1, .LANCHOR88
+	adrp	x7, .LANCHOR92
+	ldrh	w5, [x1, #:lo12:.LANCHOR88]
+	adrp	x1, .LANCHOR87
+	ldrh	w7, [x7, #:lo12:.LANCHOR92]
+	ldrh	w1, [x1, #:lo12:.LANCHOR87]
 	add	w5, w5, 7
 	add	w1, w1, w7
 	cmp	w5, w1
-	blt	.L832
-.L847:
+	blt	.L852
+.L867:
 	mov	w1, 2
 	bfi	w0, w1, 3, 2
-.L845:
+.L865:
 	strb	w0, [x20, 2]
-.L833:
+.L853:
 	ldrb	w0, [x20, 2]
 	ands	w0, w0, 24
-	bne	.L837
+	bne	.L857
 	mul	w2, w6, w2
 	ldrh	w0, [x4, x21]
 	add	w2, w2, w2, lsl 1
@@ -4645,90 +4725,90 @@ ftl_free_sblk:
 	ubfx	x2, x2, 2, 9
 	bfi	w0, w2, 0, 11
 	strh	w0, [x4, x21]
-.L830:
+.L850:
 	mov	w0, w19
 	bl	zftl_remove_data_node
-	ldr	x0, [x22, #:lo12:.LANCHOR3]
+	ldr	x0, [x22, #:lo12:.LANCHOR7]
 	add	x21, x0, x21
 	ldrb	w0, [x21, 2]
 	and	w0, w0, 31
 	strb	w0, [x21, 2]
-	adrp	x0, .LANCHOR5
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x23, lsl 1]
 	ldrb	w0, [x20, 2]
-	tbz	x0, 3, .L839
-	adrp	x0, .LANCHOR6
-	ldr	x0, [x0, #:lo12:.LANCHOR6]
+	tbz	x0, 3, .L859
+	adrp	x0, .LANCHOR10
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldrh	w1, [x0, 584]
 	cmp	w1, w19
-	bne	.L840
+	bne	.L860
 	mov	w1, -1
 	ldrh	w2, [x0, 588]
 	strh	w1, [x0, 584]
 	mov	w1, 65535
 	cmp	w2, w1
-	bne	.L840
+	bne	.L860
 	strh	w19, [x0, 588]
 	mov	w1, w19
 	adrp	x0, .LC55
 	add	x0, x0, :lo12:.LC55
-.L846:
+.L866:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	b	printf
-.L832:
-	adrp	x1, .LANCHOR104
-	adrp	x7, .LANCHOR93
-	ldrh	w5, [x1, #:lo12:.LANCHOR104]
-	adrp	x1, .LANCHOR88
-	ldrh	w7, [x7, #:lo12:.LANCHOR93]
-	ldrh	w1, [x1, #:lo12:.LANCHOR88]
+.L852:
+	adrp	x1, .LANCHOR101
+	adrp	x7, .LANCHOR90
+	ldrh	w5, [x1, #:lo12:.LANCHOR101]
+	adrp	x1, .LANCHOR85
+	ldrh	w7, [x7, #:lo12:.LANCHOR90]
+	ldrh	w1, [x1, #:lo12:.LANCHOR85]
 	add	w5, w5, 7
 	add	w1, w1, w7
-	adrp	x7, .LANCHOR86
-	ldrh	w7, [x7, #:lo12:.LANCHOR86]
+	adrp	x7, .LANCHOR83
+	ldrh	w7, [x7, #:lo12:.LANCHOR83]
 	add	w1, w1, w7
 	cmp	w5, w1
-	blt	.L847
-.L836:
+	blt	.L867
+.L856:
 	and	w0, w0, -25
-	b	.L845
-.L831:
+	b	.L865
+.L851:
 	madd	w1, w2, w1, w5
-	adrp	x5, .LANCHOR105
-	ldrh	w5, [x5, #:lo12:.LANCHOR105]
+	adrp	x5, .LANCHOR102
+	ldrh	w5, [x5, #:lo12:.LANCHOR102]
 	cmp	w1, w5
-	ble	.L833
-	adrp	x1, .LANCHOR104
-	adrp	x7, .LANCHOR93
-	ldrh	w5, [x1, #:lo12:.LANCHOR104]
-	adrp	x1, .LANCHOR88
-	ldrh	w7, [x7, #:lo12:.LANCHOR93]
-	ldrh	w1, [x1, #:lo12:.LANCHOR88]
+	ble	.L853
+	adrp	x1, .LANCHOR101
+	adrp	x7, .LANCHOR90
+	ldrh	w5, [x1, #:lo12:.LANCHOR101]
+	adrp	x1, .LANCHOR85
+	ldrh	w7, [x7, #:lo12:.LANCHOR90]
+	ldrh	w1, [x1, #:lo12:.LANCHOR85]
 	add	w5, w5, 7
 	add	w1, w1, w7
-	adrp	x7, .LANCHOR86
-	ldrh	w7, [x7, #:lo12:.LANCHOR86]
+	adrp	x7, .LANCHOR83
+	ldrh	w7, [x7, #:lo12:.LANCHOR83]
 	add	w1, w1, w7
 	cmp	w5, w1
-	bge	.L836
-	adrp	x1, .LANCHOR91
-	adrp	x7, .LANCHOR95
-	ldrh	w5, [x1, #:lo12:.LANCHOR91]
-	adrp	x1, .LANCHOR90
-	ldrh	w7, [x7, #:lo12:.LANCHOR95]
-	ldrh	w1, [x1, #:lo12:.LANCHOR90]
+	bge	.L856
+	adrp	x1, .LANCHOR88
+	adrp	x7, .LANCHOR92
+	ldrh	w5, [x1, #:lo12:.LANCHOR88]
+	adrp	x1, .LANCHOR87
+	ldrh	w7, [x7, #:lo12:.LANCHOR92]
+	ldrh	w1, [x1, #:lo12:.LANCHOR87]
 	add	w5, w5, 7
 	add	w1, w1, w7
 	cmp	w5, w1
-	blt	.L836
-	b	.L847
-.L837:
+	blt	.L856
+	b	.L867
+.L857:
 	cmp	w0, 16
-	bne	.L830
+	bne	.L850
 	sdiv	w2, w3, w2
 	ldr	w0, [x4, x21]
 	add	w2, w2, w2, lsl 1
@@ -4736,23 +4816,23 @@ ftl_free_sblk:
 	ubfx	x2, x2, 2, 6
 	bfi	w0, w2, 11, 8
 	str	w0, [x4, x21]
-	b	.L830
-.L840:
+	b	.L850
+.L860:
 	ldrh	w1, [x0, 586]
 	cmp	w1, w19
-	bne	.L839
+	bne	.L859
 	mov	w1, -1
 	ldrh	w2, [x0, 590]
 	strh	w1, [x0, 586]
 	mov	w1, 65535
 	cmp	w2, w1
-	bne	.L839
+	bne	.L859
 	strh	w19, [x0, 590]
 	mov	w1, w19
 	adrp	x0, .LC56
 	add	x0, x0, :lo12:.LC56
-	b	.L846
-.L839:
+	b	.L866
+.L859:
 	mov	w0, w19
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -4768,20 +4848,20 @@ gc_free_src_blk:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR65
+	adrp	x21, .LANCHOR62
 	stp	x23, x24, [sp, 48]
 	adrp	x22, .LC57
-	adrp	x23, .LANCHOR5
-	add	x21, x21, :lo12:.LANCHOR65
+	adrp	x23, .LANCHOR9
+	add	x21, x21, :lo12:.LANCHOR62
 	mov	x24, x23
 	add	x22, x22, :lo12:.LC57
 	stp	x19, x20, [sp, 16]
 	mov	w20, 0
 	stp	x25, x26, [sp, 64]
-.L849:
+.L869:
 	ldrh	w0, [x21, 56]
 	cmp	w0, w20
-	bhi	.L863
+	bhi	.L883
 	strh	wzr, [x21, 56]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -4789,114 +4869,114 @@ gc_free_src_blk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L863:
+.L883:
 	add	x0, x21, x20, sxtw 1
 	ldrh	w25, [x0, 58]
-	ldr	x0, [x23, #:lo12:.LANCHOR5]
+	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	mov	x19, x25
 	lsl	x26, x25, 1
 	ldrh	w2, [x0, x26]
-	cbz	w2, .L850
+	cbz	w2, .L870
 	mov	w1, w25
 	mov	x0, x22
 	bl	printf
-.L850:
-	ldr	x0, [x24, #:lo12:.LANCHOR5]
+.L870:
+	ldr	x0, [x24, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x26]
-	adrp	x0, .LANCHOR3
-	ldr	x0, [x0, #:lo12:.LANCHOR3]
+	adrp	x0, .LANCHOR7
+	ldr	x0, [x0, #:lo12:.LANCHOR7]
 	add	x25, x0, x25, lsl 2
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 8, .L851
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L871
 	ldrb	w2, [x25, 2]
 	adrp	x0, .LC58
 	mov	w1, w19
 	add	x0, x0, :lo12:.LC58
 	ubfx	x2, x2, 5, 3
 	bl	printf
-.L851:
+.L871:
 	ldrb	w0, [x25, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L852
+	beq	.L872
 	tst	w0, 192
-	bne	.L853
-.L852:
-	adrp	x1, .LANCHOR106
+	bne	.L873
+.L872:
+	adrp	x1, .LANCHOR103
 	adrp	x0, .LC0
 	mov	w2, 793
-	add	x1, x1, :lo12:.LANCHOR106
+	add	x1, x1, :lo12:.LANCHOR103
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L853:
+.L873:
 	mov	w0, w19
 	bl	ftl_free_sblk
-	adrp	x0, .LANCHOR6
-	ldr	x0, [x0, #:lo12:.LANCHOR6]
+	adrp	x0, .LANCHOR10
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldrh	w2, [x0, 124]
-	cbz	w2, .L854
+	cbz	w2, .L874
 	add	x3, x0, 392
 	mov	w1, 0
-.L856:
+.L876:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L855
+	bne	.L875
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 392]
 	strh	w2, [x0, 124]
-.L854:
+.L874:
 	ldrh	w2, [x0, 120]
-	cbz	w2, .L857
+	cbz	w2, .L877
 	add	x3, x0, 136
 	mov	w1, 0
-.L859:
+.L879:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L858
+	bne	.L878
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 136]
 	strh	w2, [x0, 120]
-.L857:
+.L877:
 	ldrh	w2, [x0, 122]
-	cbz	w2, .L860
+	cbz	w2, .L880
 	add	x3, x0, 264
 	mov	w1, 0
-.L862:
+.L882:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L861
+	bne	.L881
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 264]
 	strh	w2, [x0, 122]
-.L860:
+.L880:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L849
-.L855:
+	b	.L869
+.L875:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L856
-	b	.L854
-.L858:
+	bne	.L876
+	b	.L874
+.L878:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L859
-	b	.L857
-.L861:
+	bne	.L879
+	b	.L877
+.L881:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L862
-	b	.L860
+	bne	.L882
+	b	.L880
 	.size	gc_free_src_blk, .-gc_free_src_blk
 	.section	.text.ftl_erase_phy_blk,"ax",@progbits
 	.align	2
@@ -4908,29 +4988,29 @@ ftl_erase_phy_blk:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	mov	w21, w1
-	adrp	x1, .LANCHOR102
+	adrp	x1, .LANCHOR99
 	stp	x19, x20, [sp, 16]
 	mov	w19, 21
-	adrp	x22, .LANCHOR108
-	ldrh	w1, [x1, #:lo12:.LANCHOR102]
+	adrp	x22, .LANCHOR105
+	ldrh	w1, [x1, #:lo12:.LANCHOR99]
 	sub	w1, w19, w1
 	mov	w19, 1
 	lsl	w19, w19, w1
 	sub	w19, w19, #1
 	and	w19, w19, w0
 	asr	w20, w0, w1
-	adrp	x0, .LANCHOR107
+	adrp	x0, .LANCHOR104
 	sxth	w19, w19
-	ldrb	w0, [x0, #:lo12:.LANCHOR107]
-	cbz	w0, .L887
-	ldrh	w2, [x22, #:lo12:.LANCHOR108]
+	ldrb	w0, [x0, #:lo12:.LANCHOR104]
+	cbz	w0, .L907
+	ldrh	w2, [x22, #:lo12:.LANCHOR105]
 	cmp	w21, 0
 	cset	w1, eq
 	mov	w0, w20
 	mul	w2, w2, w19
 	bl	flash_erase_block_en
-.L887:
-	ldrh	w2, [x22, #:lo12:.LANCHOR108]
+.L907:
+	ldrh	w2, [x22, #:lo12:.LANCHOR105]
 	mov	w1, w21
 	mov	w0, w20
 	ldp	x21, x22, [sp, 32]
@@ -4947,60 +5027,60 @@ ftl_erase_sblk:
 	stp	x29, x30, [sp, -176]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR3
+	adrp	x23, .LANCHOR7
 	stp	x25, x26, [sp, 64]
 	and	w26, w0, 65535
-	ldr	x0, [x23, #:lo12:.LANCHOR3]
-	adrp	x25, .LANCHOR109
+	ldr	x0, [x23, #:lo12:.LANCHOR7]
+	adrp	x25, .LANCHOR106
 	stp	x21, x22, [sp, 32]
 	ubfiz	x22, x26, 2, 16
 	add	x0, x0, x22
 	stp	x27, x28, [sp, 80]
 	stp	x19, x20, [sp, 16]
-	adrp	x24, .LANCHOR101
+	adrp	x24, .LANCHOR98
 	mov	w20, w1
-	add	x25, x25, :lo12:.LANCHOR109
+	add	x25, x25, :lo12:.LANCHOR106
 	ldrb	w28, [x0, 3]
-	add	x24, x24, :lo12:.LANCHOR101
+	add	x24, x24, :lo12:.LANCHOR98
 	add	x27, x29, 112
 	mov	w19, 0
-.L893:
+.L913:
 	ldrb	w0, [x25]
 	cmp	w19, w0
-	bge	.L904
+	bge	.L924
 	ldrb	w1, [x24]
-	adrp	x0, .LANCHOR108
+	adrp	x0, .LANCHOR105
 	mov	w21, 0
-	ldrh	w3, [x0, #:lo12:.LANCHOR108]
+	ldrh	w3, [x0, #:lo12:.LANCHOR105]
 	sub	w4, w1, #1
 	mov	w0, 0
 	mul	w6, w19, w1
 	mul	w5, w26, w1
-	b	.L905
-.L895:
+	b	.L925
+.L915:
 	add	w2, w0, w6
 	asr	w2, w28, w2
-	tbnz	x2, 0, .L894
+	tbnz	x2, 0, .L914
 	and	w2, w0, w4
 	add	w2, w2, w5
 	mul	w2, w2, w3
 	str	w2, [x27, w21, sxtw 2]
 	add	w21, w21, 1
-.L894:
+.L914:
 	add	w0, w0, 1
-.L905:
+.L925:
 	cmp	w0, w1
-	blt	.L895
+	blt	.L915
 	cmp	w1, 4
-	bne	.L896
+	bne	.L916
 	mov	x3, 0
-.L897:
+.L917:
 	cmp	w21, w3
-	bgt	.L898
-.L899:
+	bgt	.L918
+.L919:
 	add	w19, w19, 1
-	b	.L893
-.L898:
+	b	.L913
+.L918:
 	ldr	w2, [x27, x3, lsl 2]
 	mov	w1, w20
 	str	x3, [x29, 104]
@@ -5008,59 +5088,59 @@ ftl_erase_sblk:
 	bl	flash_erase_block_en
 	ldr	x3, [x29, 104]
 	add	x3, x3, 1
-	b	.L897
-.L896:
+	b	.L917
+.L916:
 	cmp	w21, 2
-	bne	.L900
-	adrp	x0, .LANCHOR107
-	ldrb	w0, [x0, #:lo12:.LANCHOR107]
-	cbz	w0, .L901
+	bne	.L920
+	adrp	x0, .LANCHOR104
+	ldrb	w0, [x0, #:lo12:.LANCHOR104]
+	cbz	w0, .L921
 	ldp	w2, w3, [x29, 112]
 	cmp	w20, 0
 	cset	w1, eq
 	mov	w0, w19
 	bl	flash_erase_duplane_block
-.L901:
+.L921:
 	ldp	w2, w3, [x29, 112]
 	mov	w1, w20
 	mov	w0, w19
 	bl	flash_erase_duplane_block
-	b	.L899
-.L900:
+	b	.L919
+.L920:
 	cmp	w21, 1
-	bne	.L899
-	adrp	x0, .LANCHOR107
-	ldrb	w0, [x0, #:lo12:.LANCHOR107]
-	cbz	w0, .L903
+	bne	.L919
+	adrp	x0, .LANCHOR104
+	ldrb	w0, [x0, #:lo12:.LANCHOR104]
+	cbz	w0, .L923
 	ldr	w2, [x29, 112]
 	cmp	w20, 0
 	cset	w1, eq
 	mov	w0, w19
 	bl	flash_erase_block_en
-.L903:
+.L923:
 	ldr	w2, [x29, 112]
 	mov	w1, w20
 	mov	w0, w19
 	bl	flash_erase_block_en
-	b	.L899
-.L904:
-	adrp	x2, .LANCHOR100
-	ldr	x3, [x23, #:lo12:.LANCHOR3]
-	cbnz	w20, .L906
+	b	.L919
+.L924:
+	adrp	x2, .LANCHOR97
+	ldr	x3, [x23, #:lo12:.LANCHOR7]
+	cbnz	w20, .L926
 	ldrh	w1, [x3, x22]
 	add	w0, w1, 1
 	and	w0, w0, 2047
 	bfi	w1, w0, 0, 11
 	strh	w1, [x3, x22]
-	ldr	x1, [x2, #:lo12:.LANCHOR100]
+	ldr	x1, [x2, #:lo12:.LANCHOR97]
 	ldr	w2, [x1, 84]
 	add	w2, w2, 1
 	str	w2, [x1, 84]
 	ldrh	w2, [x1, 96]
 	cmp	w2, w0
-	bge	.L908
+	bge	.L928
 	strh	w0, [x1, 96]
-.L908:
+.L928:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -5069,7 +5149,7 @@ ftl_erase_sblk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L906:
+.L926:
 	ldr	w1, [x3, x22]
 	ubfx	x0, x1, 11, 8
 	add	w0, w0, 1
@@ -5077,15 +5157,15 @@ ftl_erase_sblk:
 	bfi	w1, w0, 11, 8
 	str	w1, [x3, x22]
 	and	w0, w0, 65535
-	ldr	x1, [x2, #:lo12:.LANCHOR100]
+	ldr	x1, [x2, #:lo12:.LANCHOR97]
 	ldr	w2, [x1, 80]
 	add	w2, w2, 1
 	str	w2, [x1, 80]
 	ldrh	w2, [x1, 98]
 	cmp	w2, w0
-	bcs	.L908
+	bcs	.L928
 	strh	w0, [x1, 98]
-	b	.L908
+	b	.L928
 	.size	ftl_erase_sblk, .-ftl_erase_sblk
 	.section	.text.ftl_alloc_sys_blk,"ax",@progbits
 	.align	2
@@ -5093,44 +5173,44 @@ ftl_erase_sblk:
 	.type	ftl_alloc_sys_blk, %function
 ftl_alloc_sys_blk:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR100
+	adrp	x0, .LANCHOR97
 	add	x29, sp, 0
-	ldr	x1, [x0, #:lo12:.LANCHOR100]
+	ldr	x1, [x0, #:lo12:.LANCHOR97]
 	ldrh	w2, [x1, 136]
 	str	x19, [sp, 16]
 	mov	x19, x0
 	cmp	w2, 63
-	bls	.L918
+	bls	.L938
 	strh	wzr, [x1, 136]
-.L918:
+.L938:
 	ldrh	w0, [x1, 112]
-	cbnz	w0, .L919
-	adrp	x1, .LANCHOR110
+	cbnz	w0, .L939
+	adrp	x1, .LANCHOR107
 	adrp	x0, .LC0
 	mov	w2, 1118
-	add	x1, x1, :lo12:.LANCHOR110
+	add	x1, x1, :lo12:.LANCHOR107
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L919:
-	ldr	x1, [x19, #:lo12:.LANCHOR100]
+.L939:
+	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	mov	w5, 65535
-.L922:
+.L942:
 	ldrh	w2, [x1, 136]
-.L920:
+.L940:
 	mov	w3, w2
 	cmp	w2, 63
-	ble	.L921
+	ble	.L941
 	strh	wzr, [x1, 136]
-	b	.L922
-.L921:
+	b	.L942
+.L941:
 	add	x4, x2, 1
 	add	x0, x1, x4, lsl 1
 	ldrh	w0, [x0, 158]
 	cmp	w0, w5
-	bne	.L925
+	bne	.L945
 	mov	x2, x4
-	b	.L920
-.L925:
+	b	.L940
+.L945:
 	add	x3, x1, x3, sxtw 1
 	mov	w4, -1
 	ldr	x19, [sp, 16]
@@ -5151,40 +5231,40 @@ ftl_free_sys_blk:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 65535
-	adrp	x0, .LANCHOR100
+	adrp	x0, .LANCHOR97
 	mov	x19, x0
-	ldr	x1, [x0, #:lo12:.LANCHOR100]
+	ldr	x1, [x0, #:lo12:.LANCHOR97]
 	ldrh	w2, [x1, 138]
 	cmp	w2, 63
-	bls	.L928
+	bls	.L948
 	strh	wzr, [x1, 138]
-.L928:
+.L948:
 	ldrh	w0, [x1, 112]
 	cmp	w0, 63
-	bls	.L929
-	adrp	x1, .LANCHOR111
+	bls	.L949
+	adrp	x1, .LANCHOR108
 	adrp	x0, .LC0
 	mov	w2, 1142
-	add	x1, x1, :lo12:.LANCHOR111
+	add	x1, x1, :lo12:.LANCHOR108
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L929:
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+.L949:
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	w4, 65535
-.L932:
+.L952:
 	ldrh	w1, [x0, 138]
-.L930:
+.L950:
 	mov	w2, w1
 	cmp	w1, 63
-	ble	.L931
+	ble	.L951
 	strh	wzr, [x0, 138]
-	b	.L932
-.L931:
+	b	.L952
+.L951:
 	add	x3, x1, 1
 	add	x5, x0, x3, lsl 1
 	ldrh	w5, [x5, 158]
 	cmp	w5, w4
-	bne	.L933
+	bne	.L953
 	add	x2, x0, x2, sxtw 1
 	strh	w20, [x2, 160]
 	strh	w1, [x0, 138]
@@ -5194,9 +5274,9 @@ ftl_free_sys_blk:
 	strh	w1, [x0, 112]
 	ldp	x29, x30, [sp], 32
 	ret
-.L933:
+.L953:
 	mov	x1, x3
-	b	.L930
+	b	.L950
 	.size	ftl_free_sys_blk, .-ftl_free_sys_blk
 	.section	.text.ftl_info_data_recovery,"ax",@progbits
 	.align	2
@@ -5206,36 +5286,36 @@ ftl_info_data_recovery:
 	ldrh	w2, [x0]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L946
+	beq	.L966
 	stp	x29, x30, [sp, -48]!
-	adrp	x1, .LANCHOR3
+	adrp	x1, .LANCHOR7
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	ubfiz	x19, x2, 2, 16
-	ldr	x20, [x1, #:lo12:.LANCHOR3]
+	ldr	x20, [x1, #:lo12:.LANCHOR7]
 	str	x21, [sp, 32]
 	add	x21, x20, x19
 	ldrb	w1, [x21, 2]
 	tst	w1, 224
-	bne	.L936
+	bne	.L956
 	ldrb	w0, [x0, 4]
 	bfi	w1, w0, 5, 3
 	strb	w1, [x21, 2]
 	mov	w0, w2
 	bl	zftl_remove_free_node
 	ldrb	w0, [x21, 2]
-	adrp	x1, .LANCHOR100
-	ldr	x3, [x1, #:lo12:.LANCHOR100]
-	tbz	x0, 3, .L940
+	adrp	x1, .LANCHOR97
+	ldr	x3, [x1, #:lo12:.LANCHOR97]
+	tbz	x0, 3, .L960
 	ldrh	w2, [x3, 116]
 	sub	w2, w2, #1
 	strh	w2, [x3, 116]
-.L941:
+.L961:
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L943
+	bne	.L963
 	ldr	w0, [x20, x19]
-	ldr	x1, [x1, #:lo12:.LANCHOR100]
+	ldr	x1, [x1, #:lo12:.LANCHOR97]
 	ubfx	x2, x0, 11, 8
 	add	w2, w2, 1
 	bfi	w0, w2, 11, 8
@@ -5243,44 +5323,44 @@ ftl_info_data_recovery:
 	ldrh	w0, [x1, 120]
 	sub	w0, w0, #1
 	strh	w0, [x1, 120]
-.L936:
+.L956:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L940:
+.L960:
 	tst	w0, 24
-	bne	.L942
+	bne	.L962
 	ldrh	w2, [x3, 114]
 	sub	w2, w2, #1
 	strh	w2, [x3, 114]
-	b	.L941
-.L942:
+	b	.L961
+.L962:
 	ldrh	w2, [x3, 118]
 	sub	w2, w2, #1
 	strh	w2, [x3, 118]
-	b	.L941
-.L943:
+	b	.L961
+.L963:
 	ldrh	w2, [x20, x19]
 	cmp	w0, 64
 	add	w3, w2, 1
 	bfi	w2, w3, 0, 11
 	strh	w2, [x20, x19]
-	bne	.L944
-	ldr	x1, [x1, #:lo12:.LANCHOR100]
+	bne	.L964
+	ldr	x1, [x1, #:lo12:.LANCHOR97]
 	ldrh	w0, [x1, 122]
 	sub	w0, w0, #1
 	strh	w0, [x1, 122]
-	b	.L936
-.L944:
+	b	.L956
+.L964:
 	cmp	w0, 96
-	bne	.L936
-	ldr	x1, [x1, #:lo12:.LANCHOR100]
+	bne	.L956
+	ldr	x1, [x1, #:lo12:.LANCHOR97]
 	ldrh	w0, [x1, 124]
 	sub	w0, w0, #1
 	strh	w0, [x1, 124]
-	b	.L936
-.L946:
+	b	.L956
+.L966:
 	ret
 	.size	ftl_info_data_recovery, .-ftl_info_data_recovery
 	.section	.text.ftl_get_ppa_from_index,"ax",@progbits
@@ -5289,20 +5369,20 @@ ftl_info_data_recovery:
 	.type	ftl_get_ppa_from_index, %function
 ftl_get_ppa_from_index:
 	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LANCHOR6
-	adrp	x3, .LANCHOR76
+	adrp	x1, .LANCHOR10
+	adrp	x3, .LANCHOR73
 	and	w0, w0, 65535
 	add	x29, sp, 0
-	ldr	x2, [x1, #:lo12:.LANCHOR6]
-	adrp	x1, .LANCHOR83
-	ldrb	w3, [x3, #:lo12:.LANCHOR76]
-	ldrh	w1, [x1, #:lo12:.LANCHOR83]
+	ldr	x2, [x1, #:lo12:.LANCHOR10]
+	adrp	x1, .LANCHOR80
+	ldrb	w3, [x3, #:lo12:.LANCHOR73]
+	ldrh	w1, [x1, #:lo12:.LANCHOR80]
 	stp	x19, x20, [sp, 16]
 	mul	w1, w1, w3
 	cmp	w0, w1
-	bge	.L950
+	bge	.L970
 	add	x2, x2, 16
-.L951:
+.L971:
 	ldrb	w1, [x2, 9]
 	sdiv	w19, w0, w1
 	msub	w0, w19, w1, w0
@@ -5310,25 +5390,25 @@ ftl_get_ppa_from_index:
 	ldrh	w20, [x0, 16]
 	mov	w0, 65535
 	cmp	w20, w0
-	bne	.L952
-	adrp	x1, .LANCHOR112
+	bne	.L972
+	adrp	x1, .LANCHOR109
 	adrp	x0, .LC0
 	mov	w2, 1529
-	add	x1, x1, :lo12:.LANCHOR112
+	add	x1, x1, :lo12:.LANCHOR109
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L952:
-	adrp	x0, .LANCHOR108
-	ldrh	w0, [x0, #:lo12:.LANCHOR108]
+.L972:
+	adrp	x0, .LANCHOR105
+	ldrh	w0, [x0, #:lo12:.LANCHOR105]
 	madd	w0, w0, w20, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L950:
+.L970:
 	sub	w0, w0, w1
 	add	x2, x2, 48
 	and	w0, w0, 65535
-	b	.L951
+	b	.L971
 	.size	ftl_get_ppa_from_index, .-ftl_get_ppa_from_index
 	.section	.text.lpa_hash_get_ppa,"ax",@progbits
 	.align	2
@@ -5336,29 +5416,29 @@ ftl_get_ppa_from_index:
 	.type	lpa_hash_get_ppa, %function
 lpa_hash_get_ppa:
 	and	x2, x0, 255
-	adrp	x1, .LANCHOR113
-	add	x1, x1, :lo12:.LANCHOR113
+	adrp	x1, .LANCHOR110
+	add	x1, x1, :lo12:.LANCHOR110
 	mov	w3, 65535
 	ldrh	w1, [x1, x2, lsl 1]
-	adrp	x2, .LANCHOR114
-	ldr	x4, [x2, #:lo12:.LANCHOR114]
-	adrp	x2, .LANCHOR115
-	ldr	x5, [x2, #:lo12:.LANCHOR115]
-.L955:
+	adrp	x2, .LANCHOR111
+	ldr	x4, [x2, #:lo12:.LANCHOR111]
+	adrp	x2, .LANCHOR112
+	ldr	x5, [x2, #:lo12:.LANCHOR112]
+.L975:
 	cmp	w1, w3
-	bne	.L957
+	bne	.L977
 	mov	w0, -1
 	ret
-.L957:
+.L977:
 	uxtw	x2, w1
 	ldr	w6, [x4, x2, lsl 2]
 	cmp	w0, w6
-	bne	.L956
+	bne	.L976
 	mov	w0, w1
 	b	ftl_get_ppa_from_index
-.L956:
+.L976:
 	ldrh	w1, [x5, x2, lsl 1]
-	b	.L955
+	b	.L975
 	.size	lpa_hash_get_ppa, .-lpa_hash_get_ppa
 	.section	.text.ftl_get_new_free_page,"ax",@progbits
 	.align	2
@@ -5372,50 +5452,50 @@ ftl_get_new_free_page:
 	mov	x19, x0
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L959
-	adrp	x1, .LANCHOR116
+	bne	.L979
+	adrp	x1, .LANCHOR113
 	adrp	x0, .LC0
 	mov	w2, 1644
-	add	x1, x1, :lo12:.LANCHOR116
+	add	x1, x1, :lo12:.LANCHOR113
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L959:
-	adrp	x0, .LANCHOR83
+.L979:
+	adrp	x0, .LANCHOR80
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w1, w0
-	bne	.L960
-	adrp	x1, .LANCHOR116
+	bne	.L980
+	adrp	x1, .LANCHOR113
 	adrp	x0, .LC0
 	mov	w2, 1645
-	add	x1, x1, :lo12:.LANCHOR116
+	add	x1, x1, :lo12:.LANCHOR113
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L960:
+.L980:
 	ldrh	w0, [x19, 6]
-	cbnz	w0, .L961
-	adrp	x1, .LANCHOR116
+	cbnz	w0, .L981
+	adrp	x1, .LANCHOR113
 	adrp	x0, .LC0
 	mov	w2, 1646
-	add	x1, x1, :lo12:.LANCHOR116
+	add	x1, x1, :lo12:.LANCHOR113
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L961:
+.L981:
 	ldrb	w0, [x19, 5]
 	mov	w2, 65535
 	add	x0, x0, 8
 	ldrh	w3, [x19, x0, lsl 1]
-	adrp	x0, .LANCHOR76
-	ldrb	w4, [x0, #:lo12:.LANCHOR76]
-.L962:
+	adrp	x0, .LANCHOR73
+	ldrb	w4, [x0, #:lo12:.LANCHOR73]
+.L982:
 	cmp	w3, w2
 	ldrb	w1, [x19, 5]
-	beq	.L964
-	adrp	x0, .LANCHOR108
+	beq	.L984
+	adrp	x0, .LANCHOR105
 	add	w1, w1, 1
 	and	w1, w1, 255
 	ldrh	w2, [x19, 2]
-	ldrh	w0, [x0, #:lo12:.LANCHOR108]
+	ldrh	w0, [x0, #:lo12:.LANCHOR105]
 	cmp	w4, w1
 	strb	w1, [x19, 5]
 	mul	w0, w0, w3
@@ -5426,29 +5506,29 @@ ftl_get_new_free_page:
 	orr	w0, w0, w2
 	add	w3, w3, 1
 	strh	w3, [x19, 10]
-	bne	.L958
+	bne	.L978
 	add	w2, w2, 1
 	strb	wzr, [x19, 5]
 	strh	w2, [x19, 2]
-.L958:
+.L978:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L964:
+.L984:
 	add	w1, w1, 1
 	and	w1, w1, 255
 	strb	w1, [x19, 5]
 	cmp	w1, w4
-	bne	.L963
+	bne	.L983
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 5]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L963:
+.L983:
 	ldrb	w0, [x19, 5]
 	add	x0, x0, 8
 	ldrh	w3, [x19, x0, lsl 1]
-	b	.L962
+	b	.L982
 	.size	ftl_get_new_free_page, .-ftl_get_new_free_page
 	.section	.text.ftl_ext_alloc_new_blk,"ax",@progbits
 	.align	2
@@ -5464,22 +5544,22 @@ ftl_ext_alloc_new_blk:
 	mov	w19, w0
 	sub	w0, w0, #1
 	cmp	w1, w0, uxth
-	bcs	.L968
-	adrp	x1, .LANCHOR117
+	bcs	.L988
+	adrp	x1, .LANCHOR114
 	adrp	x0, .LC0
 	mov	w2, 1677
-	add	x1, x1, :lo12:.LANCHOR117
+	add	x1, x1, :lo12:.LANCHOR114
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L968:
-	adrp	x20, .LANCHOR100
+.L988:
+	adrp	x20, .LANCHOR97
 	mov	w1, 0
 	mov	w0, w19
 	bl	ftl_erase_phy_blk
-	ldr	x0, [x20, #:lo12:.LANCHOR100]
+	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	ldrh	w0, [x0, 130]
 	bl	ftl_free_sys_blk
-	ldr	x0, [x20, #:lo12:.LANCHOR100]
+	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	strh	w19, [x0, 130]
 	strh	wzr, [x0, 140]
 	mov	w0, 0
@@ -5492,58 +5572,58 @@ ftl_ext_alloc_new_blk:
 	.global	ftl_total_vpn_update
 	.type	ftl_total_vpn_update, %function
 ftl_total_vpn_update:
-	adrp	x2, .LANCHOR118
+	adrp	x2, .LANCHOR115
 	mov	x3, x2
-	ldrh	w1, [x2, #:lo12:.LANCHOR118]
+	ldrh	w1, [x2, #:lo12:.LANCHOR115]
 	cmp	w1, 4
-	bhi	.L971
-	cbnz	w0, .L971
+	bhi	.L991
+	cbnz	w0, .L991
 	add	w1, w1, 1
-	strh	w1, [x2, #:lo12:.LANCHOR118]
+	strh	w1, [x2, #:lo12:.LANCHOR115]
 	ret
-.L971:
-	adrp	x0, .LANCHOR2
-	strh	wzr, [x3, #:lo12:.LANCHOR118]
+.L991:
+	adrp	x0, .LANCHOR6
+	strh	wzr, [x3, #:lo12:.LANCHOR115]
 	mov	x1, 0
 	mov	w2, 0
-	ldrh	w5, [x0, #:lo12:.LANCHOR2]
-	adrp	x0, .LANCHOR5
+	ldrh	w5, [x0, #:lo12:.LANCHOR6]
+	adrp	x0, .LANCHOR9
 	mov	w8, 65535
-	ldr	x6, [x0, #:lo12:.LANCHOR5]
-	adrp	x0, .LANCHOR3
-	ldr	x7, [x0, #:lo12:.LANCHOR3]
+	ldr	x6, [x0, #:lo12:.LANCHOR9]
+	adrp	x0, .LANCHOR7
+	ldr	x7, [x0, #:lo12:.LANCHOR7]
 	mov	w0, 0
-.L973:
+.L993:
 	cmp	w5, w1, uxth
-	bhi	.L976
-	adrp	x1, .LANCHOR6
-	ldr	x1, [x1, #:lo12:.LANCHOR6]
+	bhi	.L996
+	adrp	x1, .LANCHOR10
+	ldr	x1, [x1, #:lo12:.LANCHOR10]
 	str	w2, [x1, 524]
-	adrp	x2, .LANCHOR100
+	adrp	x2, .LANCHOR97
 	str	w0, [x1, 528]
-	ldr	x2, [x2, #:lo12:.LANCHOR100]
+	ldr	x2, [x2, #:lo12:.LANCHOR97]
 	ldrh	w2, [x2, 120]
-	cbz	w2, .L970
+	cbz	w2, .L990
 	udiv	w0, w0, w2
 	str	w0, [x1, 532]
-.L970:
+.L990:
 	ret
-.L976:
+.L996:
 	ldrh	w3, [x6, x1, lsl 1]
 	cmp	w3, w8
-	beq	.L974
+	beq	.L994
 	add	x4, x7, x1, lsl 2
 	ldrb	w4, [x4, 2]
 	and	w4, w4, 224
 	cmp	w4, 160
-	bne	.L975
+	bne	.L995
 	add	w0, w0, w3
-.L974:
+.L994:
 	add	x1, x1, 1
-	b	.L973
-.L975:
+	b	.L993
+.L995:
 	add	w2, w2, w3
-	b	.L974
+	b	.L994
 	.size	ftl_total_vpn_update, .-ftl_total_vpn_update
 	.section	.text.ftl_debug_info_fill,"ax",@progbits
 	.align	2
@@ -5564,21 +5644,21 @@ ftl_vpn_update:
 	and	w19, w0, 65535
 	mov	w0, w19
 	bl	zftl_list_update_data_list
-	adrp	x0, .LANCHOR5
+	adrp	x0, .LANCHOR9
 	ubfiz	x19, x19, 1, 16
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, x19]
-	cbnz	w0, .L984
-	adrp	x1, .LANCHOR119
+	cbnz	w0, .L1004
+	adrp	x1, .LANCHOR116
 	mov	w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR119]
-.L982:
+	str	w0, [x1, #:lo12:.LANCHOR116]
+.L1002:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L984:
+.L1004:
 	mov	w0, 0
-	b	.L982
+	b	.L1002
 	.size	ftl_vpn_update, .-ftl_vpn_update
 	.section	.text.ftl_vpn_decrement,"ax",@progbits
 	.align	2
@@ -5591,51 +5671,51 @@ ftl_vpn_decrement:
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L987
-	adrp	x0, .LANCHOR5
+	beq	.L1007
+	adrp	x0, .LANCHOR9
 	ubfiz	x1, x19, 1, 16
-	ldr	x2, [x0, #:lo12:.LANCHOR5]
+	ldr	x2, [x0, #:lo12:.LANCHOR9]
 	ldrh	w0, [x2, x1]
-	cbnz	w0, .L988
+	cbnz	w0, .L1008
 	adrp	x0, .LC59
 	mov	w2, 0
 	mov	w1, w19
 	add	x0, x0, :lo12:.LC59
 	bl	printf
-.L993:
+.L1013:
 	mov	w0, 0
-	b	.L986
-.L988:
+	b	.L1006
+.L1008:
 	sub	w0, w0, #1
 	strh	w0, [x2, x1]
-.L987:
-	adrp	x20, .LANCHOR66
-	ldrh	w0, [x20, #:lo12:.LANCHOR66]
+.L1007:
+	adrp	x20, .LANCHOR63
+	ldrh	w0, [x20, #:lo12:.LANCHOR63]
 	cmp	w19, w0
-	beq	.L993
+	beq	.L1013
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L990
-	strh	w19, [x20, #:lo12:.LANCHOR66]
-	b	.L993
-.L990:
+	bne	.L1010
+	strh	w19, [x20, #:lo12:.LANCHOR63]
+	b	.L1013
+.L1010:
 	bl	ftl_vpn_update
 	cmp	w0, 0
-	adrp	x1, .LANCHOR120
+	adrp	x1, .LANCHOR117
 	cset	w0, ne
-	ldrh	w3, [x20, #:lo12:.LANCHOR66]
-	ldrh	w2, [x1, #:lo12:.LANCHOR120]
-	strh	w19, [x20, #:lo12:.LANCHOR66]
+	ldrh	w3, [x20, #:lo12:.LANCHOR63]
+	ldrh	w2, [x1, #:lo12:.LANCHOR117]
+	strh	w19, [x20, #:lo12:.LANCHOR63]
 	add	w2, w2, 1
 	and	w2, w2, 65535
 	cmp	w2, 7
 	csel	w2, w2, wzr, ls
-	strh	w2, [x1, #:lo12:.LANCHOR120]
+	strh	w2, [x1, #:lo12:.LANCHOR117]
 	and	x2, x2, 65535
-	adrp	x1, .LANCHOR67
-	add	x1, x1, :lo12:.LANCHOR67
+	adrp	x1, .LANCHOR64
+	add	x1, x1, :lo12:.LANCHOR64
 	strh	w3, [x1, x2, lsl 1]
-.L986:
+.L1006:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -5645,50 +5725,50 @@ ftl_vpn_decrement:
 	.global	lpa_hash_update_ppa
 	.type	lpa_hash_update_ppa, %function
 lpa_hash_update_ppa:
-	adrp	x3, .LANCHOR113
+	adrp	x3, .LANCHOR110
 	and	x5, x0, 255
-	add	x4, x3, :lo12:.LANCHOR113
+	add	x4, x3, :lo12:.LANCHOR110
 	mov	w7, 65535
 	and	w2, w2, 65535
 	mov	w12, w7
 	ldrh	w6, [x4, x5, lsl 1]
-	adrp	x4, .LANCHOR114
-	ldr	x8, [x4, #:lo12:.LANCHOR114]
-	adrp	x4, .LANCHOR115
-	ldr	x4, [x4, #:lo12:.LANCHOR115]
-.L996:
+	adrp	x4, .LANCHOR111
+	ldr	x8, [x4, #:lo12:.LANCHOR111]
+	adrp	x4, .LANCHOR112
+	ldr	x4, [x4, #:lo12:.LANCHOR112]
+.L1016:
 	cmp	w6, w12
-	beq	.L1000
+	beq	.L1020
 	uxtw	x11, w6
 	lsl	x10, x11, 2
 	add	x13, x8, x10
 	ldr	w10, [x8, x10]
 	cmp	w0, w10
 	lsl	x10, x11, 1
-	bne	.L997
+	bne	.L1017
 	mov	w6, -1
 	str	w6, [x13]
 	cmp	w7, w12
-	bne	.L998
-	add	x6, x3, :lo12:.LANCHOR113
+	bne	.L1018
+	add	x6, x3, :lo12:.LANCHOR110
 	ldrh	w7, [x4, x10]
 	strh	w7, [x6, x5, lsl 1]
-.L999:
+.L1019:
 	mov	w6, -1
 	strh	w6, [x4, x11, lsl 1]
-.L1000:
+.L1020:
 	uxtw	x6, w2
-	add	x3, x3, :lo12:.LANCHOR113
+	add	x3, x3, :lo12:.LANCHOR110
 	cmn	w1, #1
 	str	w0, [x8, x6, lsl 2]
 	ldrh	w0, [x3, x5, lsl 1]
 	strh	w2, [x3, x5, lsl 1]
 	strh	w0, [x4, x6, lsl 1]
-	beq	.L1007
+	beq	.L1027
 	stp	x29, x30, [sp, -16]!
-	adrp	x0, .LANCHOR102
+	adrp	x0, .LANCHOR99
 	add	x29, sp, 0
-	ldrh	w3, [x0, #:lo12:.LANCHOR102]
+	ldrh	w3, [x0, #:lo12:.LANCHOR99]
 	mov	w0, 21
 	sub	w2, w0, w3
 	mov	w0, 1
@@ -5696,22 +5776,22 @@ lpa_hash_update_ppa:
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
 	and	w1, w0, w1
-	adrp	x0, .LANCHOR101
-	ldrb	w0, [x0, #:lo12:.LANCHOR101]
+	adrp	x0, .LANCHOR98
+	ldrb	w0, [x0, #:lo12:.LANCHOR98]
 	udiv	w0, w1, w0
 	bl	ftl_vpn_decrement
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
-.L998:
+.L1018:
 	ldrh	w6, [x4, x10]
 	strh	w6, [x4, w7, uxtw 1]
-	b	.L999
-.L997:
+	b	.L1019
+.L1017:
 	mov	w7, w6
 	ldrh	w6, [x4, x10]
-	b	.L996
-.L1007:
+	b	.L1016
+.L1027:
 	mov	w0, -1
 	ret
 	.size	lpa_hash_update_ppa, .-lpa_hash_update_ppa
@@ -5721,10 +5801,10 @@ lpa_hash_update_ppa:
 	.type	ftl_mask_bad_block, %function
 ftl_mask_bad_block:
 	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LANCHOR102
+	adrp	x1, .LANCHOR99
 	mov	w2, 21
 	add	x29, sp, 0
-	ldrh	w3, [x1, #:lo12:.LANCHOR102]
+	ldrh	w3, [x1, #:lo12:.LANCHOR99]
 	stp	x19, x20, [sp, 16]
 	ubfx	x20, x0, 21, 3
 	sub	w1, w2, w3
@@ -5733,32 +5813,32 @@ ftl_mask_bad_block:
 	lsl	w2, w2, w1
 	sub	w2, w2, #1
 	and	w2, w2, w0
-	adrp	x0, .LANCHOR101
-	ldrb	w0, [x0, #:lo12:.LANCHOR101]
+	adrp	x0, .LANCHOR98
+	ldrb	w0, [x0, #:lo12:.LANCHOR98]
 	udiv	w2, w2, w0
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	and	w19, w2, 65535
-	tbz	x0, 14, .L1011
+	tbz	x0, 14, .L1031
 	adrp	x0, .LC60
 	mov	w2, w19
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC60
 	bl	printf
-.L1011:
-	adrp	x0, .LANCHOR2
-	ldrh	w0, [x0, #:lo12:.LANCHOR2]
+.L1031:
+	adrp	x0, .LANCHOR6
+	ldrh	w0, [x0, #:lo12:.LANCHOR6]
 	cmp	w0, w19
-	bls	.L1010
-	adrp	x0, .LANCHOR3
+	bls	.L1030
+	adrp	x0, .LANCHOR7
 	mov	w1, 1
 	lsl	w1, w1, w20
-	ldr	x0, [x0, #:lo12:.LANCHOR3]
+	ldr	x0, [x0, #:lo12:.LANCHOR7]
 	add	x19, x0, x19, uxth 2
 	ldrb	w0, [x19, 3]
 	orr	w1, w1, w0
 	strb	w1, [x19, 3]
-.L1010:
+.L1030:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -5769,36 +5849,36 @@ ftl_mask_bad_block:
 	.type	print_ftl_debug_info, %function
 print_ftl_debug_info:
 	sub	sp, sp, #64
-	adrp	x1, .LANCHOR90
-	adrp	x0, .LANCHOR6
-	adrp	x7, .LANCHOR56
+	adrp	x1, .LANCHOR87
+	adrp	x0, .LANCHOR10
+	adrp	x7, .LANCHOR118
 	stp	x29, x30, [sp, 32]
 	add	x29, sp, 32
-	ldrh	w6, [x1, #:lo12:.LANCHOR90]
-	adrp	x1, .LANCHOR86
-	ldr	x0, [x0, #:lo12:.LANCHOR6]
-	ldr	w7, [x7, #:lo12:.LANCHOR56]
-	ldrh	w5, [x1, #:lo12:.LANCHOR86]
-	adrp	x1, .LANCHOR88
+	ldrh	w6, [x1, #:lo12:.LANCHOR87]
+	adrp	x1, .LANCHOR83
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	ldr	w7, [x7, #:lo12:.LANCHOR118]
+	ldrh	w5, [x1, #:lo12:.LANCHOR83]
+	adrp	x1, .LANCHOR85
 	str	w7, [sp, 8]
-	ldrh	w4, [x1, #:lo12:.LANCHOR88]
-	adrp	x1, .LANCHOR97
+	ldrh	w4, [x1, #:lo12:.LANCHOR85]
+	adrp	x1, .LANCHOR94
 	ldr	w7, [x0, 528]
-	ldrh	w3, [x1, #:lo12:.LANCHOR97]
-	adrp	x1, .LANCHOR95
+	ldrh	w3, [x1, #:lo12:.LANCHOR94]
+	adrp	x1, .LANCHOR92
 	str	w7, [sp]
-	ldrh	w2, [x1, #:lo12:.LANCHOR95]
-	adrp	x1, .LANCHOR93
+	ldrh	w2, [x1, #:lo12:.LANCHOR92]
+	adrp	x1, .LANCHOR90
 	ldr	w7, [x0, 524]
 	adrp	x0, .LC61
-	ldrh	w1, [x1, #:lo12:.LANCHOR93]
+	ldrh	w1, [x1, #:lo12:.LANCHOR90]
 	add	x0, x0, :lo12:.LC61
 	str	x19, [sp, 48]
-	adrp	x19, .LANCHOR100
+	adrp	x19, .LANCHOR97
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
-	adrp	x1, .LANCHOR121
-	ldrb	w3, [x1, #:lo12:.LANCHOR121]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	adrp	x1, .LANCHOR119
+	ldrb	w3, [x1, #:lo12:.LANCHOR119]
 	ldr	w4, [x0, 8]
 	ldr	w5, [x0, 64]
 	ldr	w1, [x0, 20]
@@ -5806,7 +5886,7 @@ print_ftl_debug_info:
 	adrp	x0, .LC62
 	add	x0, x0, :lo12:.LC62
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	ldr	w1, [x0, 52]
 	ldr	w2, [x0, 60]
 	ldr	w3, [x0, 16]
@@ -5814,7 +5894,7 @@ print_ftl_debug_info:
 	add	x0, x0, :lo12:.LC63
 	lsr	w3, w3, 11
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	ldrh	w2, [x0, 98]
 	ldrh	w6, [x0, 72]
 	ldrh	w5, [x0, 96]
@@ -5831,18 +5911,18 @@ print_ftl_debug_info:
 	add	x0, x0, :lo12:.LC64
 	bl	printf
 	ldr	x19, [sp, 48]
-	adrp	x0, .LANCHOR77
+	adrp	x0, .LANCHOR74
 	ldp	x29, x30, [sp, 32]
 	add	sp, sp, 64
-	ldrh	w5, [x0, #:lo12:.LANCHOR77]
-	adrp	x0, .LANCHOR82
-	ldrh	w4, [x0, #:lo12:.LANCHOR82]
-	adrp	x0, .LANCHOR64
-	ldrh	w3, [x0, #:lo12:.LANCHOR64]
-	adrp	x0, .LANCHOR92
-	ldrh	w2, [x0, #:lo12:.LANCHOR92]
+	ldrh	w5, [x0, #:lo12:.LANCHOR74]
+	adrp	x0, .LANCHOR79
+	ldrh	w4, [x0, #:lo12:.LANCHOR79]
+	adrp	x0, .LANCHOR61
+	ldrh	w3, [x0, #:lo12:.LANCHOR61]
 	adrp	x0, .LANCHOR89
-	ldrh	w1, [x0, #:lo12:.LANCHOR89]
+	ldrh	w2, [x0, #:lo12:.LANCHOR89]
+	adrp	x0, .LANCHOR86
+	ldrh	w1, [x0, #:lo12:.LANCHOR86]
 	adrp	x0, .LC65
 	add	x0, x0, :lo12:.LC65
 	b	printf
@@ -5856,65 +5936,65 @@ ftl_write_buf:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	str	x21, [sp, 32]
-	cbnz	x0, .L1020
-	adrp	x1, .LANCHOR122
-	add	x1, x1, :lo12:.LANCHOR122
-	mov	w2, 652
+	cbnz	x0, .L1040
+	adrp	x1, .LANCHOR120
+	add	x1, x1, :lo12:.LANCHOR120
+	mov	w2, 661
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	bl	print_ftl_debug_info
 	mov	w0, -1
-.L1019:
+.L1039:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1023:
+.L1043:
 	mov	x1, x19
-	adrp	x0, .LANCHOR54
-	add	x0, x0, :lo12:.LANCHOR54
+	adrp	x0, .LANCHOR56
+	add	x0, x0, :lo12:.LANCHOR56
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR100
+	adrp	x1, .LANCHOR97
 	ldrb	w3, [x19, 56]
-	ldrb	w0, [x21, #:lo12:.LANCHOR55]
-	ldr	x1, [x1, #:lo12:.LANCHOR100]
+	ldrb	w0, [x21, #:lo12:.LANCHOR57]
+	ldr	x1, [x1, #:lo12:.LANCHOR97]
 	add	w0, w0, 1
 	and	w0, w0, 255
-	strb	w0, [x21, #:lo12:.LANCHOR55]
+	strb	w0, [x21, #:lo12:.LANCHOR57]
 	ldr	w2, [x1, 16]
 	add	w2, w2, w3
 	str	w2, [x1, 16]
 	ldr	w2, [x1, 32]
 	add	w2, w2, 1
 	str	w2, [x1, 32]
-	b	.L1019
-.L1020:
+	b	.L1039
+.L1040:
 	mov	x19, x0
-	adrp	x0, .LANCHOR123
+	adrp	x0, .LANCHOR121
 	mov	x20, x0
-	ldrb	w1, [x0, #:lo12:.LANCHOR123]
+	ldrb	w1, [x0, #:lo12:.LANCHOR121]
 	ldrb	w2, [x19, 56]
 	cmp	w2, w1
-	bls	.L1025
-	adrp	x1, .LANCHOR122
+	bls	.L1045
+	adrp	x1, .LANCHOR120
 	adrp	x0, .LC0
-	mov	w2, 657
-	add	x1, x1, :lo12:.LANCHOR122
+	mov	w2, 666
+	add	x1, x1, :lo12:.LANCHOR120
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1025:
+.L1045:
 	ldrb	w0, [x19, 56]
-	adrp	x21, .LANCHOR55
-	cbz	w0, .L1022
-	ldrb	w1, [x20, #:lo12:.LANCHOR123]
+	adrp	x21, .LANCHOR57
+	cbz	w0, .L1042
+	ldrb	w1, [x20, #:lo12:.LANCHOR121]
 	cmp	w1, w0
-	bcs	.L1023
-.L1022:
+	bcs	.L1043
+.L1042:
 	mov	x0, x19
 	bl	buf_free
-	ldrb	w0, [x21, #:lo12:.LANCHOR55]
-	b	.L1019
+	ldrb	w0, [x21, #:lo12:.LANCHOR57]
+	b	.L1039
 	.size	ftl_write_buf, .-ftl_write_buf
 	.section	.text.ftl_write_completed,"ax",@progbits
 	.align	2
@@ -5924,26 +6004,26 @@ ftl_write_completed:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR124
+	adrp	x20, .LANCHOR122
 	stp	x21, x22, [sp, 32]
-	adrp	x19, .LANCHOR48
-	adrp	x22, .LANCHOR102
-	add	x20, x20, :lo12:.LANCHOR124
-	add	x19, x19, :lo12:.LANCHOR48
-	add	x22, x22, :lo12:.LANCHOR102
+	adrp	x19, .LANCHOR49
+	adrp	x22, .LANCHOR99
+	add	x20, x20, :lo12:.LANCHOR122
+	add	x19, x19, :lo12:.LANCHOR49
+	add	x22, x22, :lo12:.LANCHOR99
 	stp	x23, x24, [sp, 48]
 	str	x25, [sp, 64]
-.L1031:
+.L1051:
 	ldrb	w0, [x20]
 	cmp	w0, 255
-	bne	.L1037
+	bne	.L1057
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1037:
+.L1057:
 	ubfiz	x21, x0, 6, 8
 	sbfiz	x0, x0, 6, 32
 	add	x23, x19, x0
@@ -5952,7 +6032,7 @@ ftl_write_completed:
 	strb	w0, [x20]
 	ldr	w0, [x23, 52]
 	cmn	w0, #1
-	bne	.L1032
+	bne	.L1052
 	ldp	w2, w3, [x23, 36]
 	mov	w1, 21
 	ldrh	w0, [x22]
@@ -5962,8 +6042,8 @@ ftl_write_completed:
 	lsl	w1, w25, w1
 	sub	w1, w1, #1
 	and	w1, w1, w0
-	adrp	x0, .LANCHOR101
-	ldrb	w0, [x0, #:lo12:.LANCHOR101]
+	adrp	x0, .LANCHOR98
+	ldrb	w0, [x0, #:lo12:.LANCHOR98]
 	udiv	w1, w1, w0
 	adrp	x0, .LC66
 	add	x0, x0, :lo12:.LC66
@@ -5974,40 +6054,84 @@ ftl_write_completed:
 	mov	w2, 0
 	mov	w0, w24
 	bl	gc_add_sblk
-	adrp	x0, .LANCHOR6
-	ldr	x0, [x0, #:lo12:.LANCHOR6]
+	adrp	x0, .LANCHOR10
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldr	w1, [x0, 556]
 	add	w1, w1, w25
 	str	w1, [x0, 556]
 	ldrh	w1, [x0, 16]
 	cmp	w1, w24
-	bne	.L1033
+	bne	.L1053
 	strh	wzr, [x0, 22]
-.L1034:
+.L1054:
 	mov	x0, x21
 	bl	ftl_write_buf
-	b	.L1031
-.L1033:
+	b	.L1051
+.L1053:
 	ldrh	w1, [x0, 48]
 	cmp	w1, w24
-	bne	.L1034
+	bne	.L1054
 	strh	wzr, [x0, 54]
-	b	.L1034
-.L1032:
+	b	.L1054
+.L1052:
 	ldrh	w2, [x23, 48]
 	ldr	w0, [x23, 36]
 	ldr	w1, [x23, 44]
 	bl	lpa_hash_update_ppa
 	ldrb	w0, [x23, 2]
-	tbz	x0, 2, .L1036
+	tbz	x0, 2, .L1056
 	and	w0, w0, -3
 	strb	w0, [x23, 2]
-	b	.L1031
-.L1036:
+	b	.L1051
+.L1056:
 	mov	x0, x21
 	bl	buf_free
-	b	.L1031
+	b	.L1051
 	.size	ftl_write_completed, .-ftl_write_completed
+	.section	.text.zftl_add_read_buf,"ax",@progbits
+	.align	2
+	.global	zftl_add_read_buf
+	.type	zftl_add_read_buf, %function
+zftl_add_read_buf:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	cbnz	x0, .L1060
+	mov	w2, 948
+	adrp	x1, .LANCHOR123
+	adrp	x0, .LC0
+	add	x1, x1, :lo12:.LANCHOR123
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	b	print_ftl_debug_info
+.L1060:
+	ldrb	w1, [x0, 56]
+	mov	x19, x0
+	adrp	x0, .LANCHOR121
+	ldrb	w0, [x0, #:lo12:.LANCHOR121]
+	cmp	w1, w0
+	bls	.L1062
+	adrp	x1, .LANCHOR123
+	adrp	x0, .LC0
+	mov	w2, 953
+	add	x1, x1, :lo12:.LANCHOR123
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1062:
+	mov	x1, x19
+	adrp	x0, .LANCHOR124
+	add	x0, x0, :lo12:.LANCHOR124
+	bl	buf_add_tail
+	adrp	x1, .LANCHOR125
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ldrb	w0, [x1, #:lo12:.LANCHOR125]
+	add	w0, w0, 1
+	strb	w0, [x1, #:lo12:.LANCHOR125]
+	ret
+	.size	zftl_add_read_buf, .-zftl_add_read_buf
 	.section	.text.ftl_alloc_sblk,"ax",@progbits
 	.align	2
 	.global	ftl_alloc_sblk
@@ -6028,35 +6152,35 @@ ftl_alloc_sblk:
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1041
-	adrp	x0, .LANCHOR3
+	beq	.L1067
+	adrp	x0, .LANCHOR7
 	lsl	w22, w22, 1
-	ldr	x21, [x0, #:lo12:.LANCHOR3]
+	ldr	x21, [x0, #:lo12:.LANCHOR7]
 	add	x21, x21, x19, uxth 2
 	ldrb	w0, [x21, 2]
 	tst	w0, 224
-	beq	.L1042
-	adrp	x1, .LANCHOR125
+	beq	.L1068
+	adrp	x1, .LANCHOR126
 	adrp	x0, .LC0
 	mov	w2, 827
-	add	x1, x1, :lo12:.LANCHOR125
+	add	x1, x1, :lo12:.LANCHOR126
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1042:
+.L1068:
 	ldrb	w0, [x21, 2]
 	bfi	w0, w20, 5, 3
 	ubfx	x1, x0, 3, 2
 	orr	w22, w22, w1
 	bfi	w0, w22, 3, 2
 	strb	w0, [x21, 2]
-.L1043:
+.L1069:
 	mov	w0, w19
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1041:
+.L1067:
 	bl	print_ftl_debug_info
 	adrp	x21, .LC67
 	mov	w2, w20
@@ -6074,27 +6198,27 @@ ftl_alloc_sblk:
 	bl	printf
 	bl	dump_all_list_info
 	mov	w2, 837
-	adrp	x1, .LANCHOR125
+	adrp	x1, .LANCHOR126
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR125
+	add	x1, x1, :lo12:.LANCHOR126
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L1043
+	b	.L1069
 	.size	ftl_alloc_sblk, .-ftl_alloc_sblk
 	.section	.text.sblk_init,"ax",@progbits
 	.align	2
 	.global	sblk_init
 	.type	sblk_init, %function
 sblk_init:
-	adrp	x1, .LANCHOR126
+	adrp	x1, .LANCHOR53
 	mov	w0, -1
-	strb	w0, [x1, #:lo12:.LANCHOR126]
-	adrp	x1, .LANCHOR124
-	strb	w0, [x1, #:lo12:.LANCHOR124]
-	adrp	x1, .LANCHOR60
-	strb	w0, [x1, #:lo12:.LANCHOR60]
-	adrp	x1, .LANCHOR69
-	strb	w0, [x1, #:lo12:.LANCHOR69]
+	strb	w0, [x1, #:lo12:.LANCHOR53]
+	adrp	x1, .LANCHOR122
+	strb	w0, [x1, #:lo12:.LANCHOR122]
+	adrp	x1, .LANCHOR127
+	strb	w0, [x1, #:lo12:.LANCHOR127]
+	adrp	x1, .LANCHOR66
+	strb	w0, [x1, #:lo12:.LANCHOR66]
 	mov	w0, 0
 	ret
 	.size	sblk_init, .-sblk_init
@@ -6108,21 +6232,21 @@ dump_sblk_queue:
 	add	x0, x0, :lo12:.LC68
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR126
+	adrp	x19, .LANCHOR53
 	str	x21, [sp, 32]
-	ldrb	w1, [x19, #:lo12:.LANCHOR126]
+	ldrb	w1, [x19, #:lo12:.LANCHOR53]
 	bl	printf
-	ldrb	w19, [x19, #:lo12:.LANCHOR126]
+	ldrb	w19, [x19, #:lo12:.LANCHOR53]
 	cmp	w19, 255
-	beq	.L1050
-	adrp	x1, .LANCHOR48
+	beq	.L1076
+	adrp	x1, .LANCHOR49
 	ubfiz	x19, x19, 6, 8
-	add	x1, x1, :lo12:.LANCHOR48
+	add	x1, x1, :lo12:.LANCHOR49
 	adrp	x21, .LC69
 	add	x19, x1, x19
 	add	x21, x21, :lo12:.LC69
 	mov	x20, x1
-.L1052:
+.L1078:
 	ldrb	w2, [x19, 58]
 	mov	x0, x21
 	ldrb	w1, [x19, 1]
@@ -6130,11 +6254,11 @@ dump_sblk_queue:
 	bl	printf
 	ldrb	w19, [x19]
 	cmp	w19, 255
-	beq	.L1050
+	beq	.L1076
 	ubfiz	x19, x19, 6, 8
 	add	x19, x20, x19
-	b	.L1052
-.L1050:
+	b	.L1078
+.L1076:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -6145,86 +6269,82 @@ dump_sblk_queue:
 	.global	queue_lun_state
 	.type	queue_lun_state, %function
 queue_lun_state:
-	adrp	x2, .LANCHOR126
-	ldrb	w2, [x2, #:lo12:.LANCHOR126]
+	adrp	x2, .LANCHOR53
+	ldrb	w2, [x2, #:lo12:.LANCHOR53]
 	cmp	w2, 255
-	beq	.L1069
-	adrp	x3, .LANCHOR102
-	adrp	x7, .LANCHOR48
-	add	x7, x7, :lo12:.LANCHOR48
-	adrp	x10, .L1065
-	ldrh	w8, [x3, #:lo12:.LANCHOR102]
+	beq	.L1094
+	adrp	x3, .LANCHOR99
+	adrp	x7, .LANCHOR49
+	add	x7, x7, :lo12:.LANCHOR49
+	adrp	x10, .L1090
+	ldrh	w8, [x3, #:lo12:.LANCHOR99]
 	mov	w3, 21
 	ubfx	x11, x0, 21, 3
-	add	x10, x10, :lo12:.L1065
+	add	x10, x10, :lo12:.L1090
 	sub	w4, w3, w8
 	mov	w3, 1
 	mov	x12, x7
 	lsl	w3, w3, w4
-	adrp	x4, .LANCHOR101
+	adrp	x4, .LANCHOR98
 	sub	w3, w3, #1
-	ldrb	w6, [x4, #:lo12:.LANCHOR101]
+	ldrb	w6, [x4, #:lo12:.LANCHOR98]
 	and	w3, w3, 65535
 	asr	w4, w0, w8
 	sub	w6, w6, #1
 	and	w6, w6, 65535
 	and	w4, w4, w6
 	and	w4, w4, w3
-.L1068:
+.L1093:
 	add	x0, x7, x2, lsl 6
 	ldr	w5, [x0, 40]
 	ubfx	x13, x5, 21, 3
 	cmp	w11, w13
-	bne	.L1062
+	bne	.L1088
 	lsr	w5, w5, w8
 	and	w5, w6, w5
 	and	w5, w3, w5
 	ldrb	w0, [x0, 58]
 	cmp	w4, w5
-	bne	.L1063
+	bne	.L1089
 	cmp	w1, 1
-	bne	.L1060
+	bne	.L1086
 	cmp	w0, 6
 	ccmp	w0, 8, 4, ne
-	beq	.L1062
+	beq	.L1088
 	ret
-.L1063:
+.L1089:
 	cmp	w1, 3
-	bhi	.L1062
+	bhi	.L1088
 	ldrb	w5, [x10,w1,uxtw]
-	adr	x13, .Lrtx1065
+	adr	x13, .Lrtx1090
 	add	x5, x13, w5, sxtb #2
 	br	x5
-.Lrtx1065:
+.Lrtx1090:
 	.section	.rodata.queue_lun_state,"a",@progbits
 	.align	0
 	.align	2
-.L1065:
-	.byte	(.L1064 - .Lrtx1065) / 4
-	.byte	(.L1066 - .Lrtx1065) / 4
-	.byte	(.L1067 - .Lrtx1065) / 4
-	.byte	(.L1060 - .Lrtx1065) / 4
+.L1090:
+	.byte	(.L1086 - .Lrtx1090) / 4
+	.byte	(.L1091 - .Lrtx1090) / 4
+	.byte	(.L1092 - .Lrtx1090) / 4
+	.byte	(.L1086 - .Lrtx1090) / 4
 	.section	.text.queue_lun_state
-.L1064:
-	cmp	w0, 2
-	beq	.L1062
-	ret
-.L1066:
+.L1091:
 	cmp	w0, 6
 	ccmp	w0, 8, 4, ne
-	beq	.L1062
+	beq	.L1088
 	ret
-.L1067:
+.L1092:
 	cmp	w0, 10
-	bne	.L1060
-.L1062:
+	bne	.L1086
+.L1088:
 	lsl	x2, x2, 6
 	ldrb	w2, [x12, x2]
 	cmp	w2, 255
-	bne	.L1068
-.L1069:
+	bne	.L1093
+.L1094:
 	mov	w0, 0
-.L1060:
+.L1086:
 	ret
 	.size	queue_lun_state, .-queue_lun_state
 	.section	.text.queue_remove_completed_req,"ax",@progbits
@@ -6232,68 +6352,87 @@ queue_lun_state:
 	.global	queue_remove_completed_req
 	.type	queue_remove_completed_req, %function
 queue_remove_completed_req:
-	adrp	x6, .LANCHOR126
-	ldrb	w2, [x6, #:lo12:.LANCHOR126]
-	cmp	w2, 255
-	beq	.L1071
-	adrp	x0, .LANCHOR48
-	lsl	x4, x2, 6
-	add	x5, x0, :lo12:.LANCHOR48
-	add	x3, x5, x4
-	ldrb	w1, [x3, 58]
-	sub	w1, w1, #11
-	and	w1, w1, 255
-	cmp	w1, 1
-	mov	x1, x0
-	bhi	.L1071
-	ldrb	w0, [x5, x4]
-	strb	w0, [x6, #:lo12:.LANCHOR126]
-	mov	w0, -1
-	strb	w0, [x5, x4]
-	ldrb	w0, [x3, 59]
-	cmp	w0, 1
-	bne	.L1073
-	ldrh	w0, [x3, 50]
-	cbnz	w0, .L1074
-	adrp	x0, .LANCHOR124
-	ldrb	w3, [x0, #:lo12:.LANCHOR124]
-	add	x0, x0, :lo12:.LANCHOR124
-.L1075:
-	cmp	w3, 255
-	bne	.L1079
-	add	x1, x1, :lo12:.LANCHOR48
-	add	x1, x1, x2, lsl 6
-	ldrb	w1, [x1, 1]
-	strb	w1, [x0]
+	adrp	x4, .LANCHOR122
+	adrp	x8, .LANCHOR66
+	adrp	x1, .LANCHOR53
+	adrp	x7, .LANCHOR127
+	adrp	x3, .LANCHOR49
+	ldrb	w14, [x4, #:lo12:.LANCHOR122]
+	add	x5, x3, :lo12:.LANCHOR49
+	ldrb	w2, [x1, #:lo12:.LANCHOR53]
+	ldrb	w12, [x8, #:lo12:.LANCHOR66]
+	mov	x11, x5
+	ldrb	w13, [x7, #:lo12:.LANCHOR127]
+	add	x16, x8, :lo12:.LANCHOR66
+	add	x7, x7, :lo12:.LANCHOR127
+	add	x10, x4, :lo12:.LANCHOR122
+	mov	w6, 0
+	mov	w15, -1
+.L1097:
+	cmp	w2, 255
+	beq	.L1098
+	sbfiz	x8, x2, 6, 32
+	sxtw	x0, w2
+	add	x4, x5, x8
+	ldrb	w4, [x4, 58]
+	sub	w4, w4, #11
+	and	w4, w4, 255
+	cmp	w4, 1
+	bls	.L1099
+	cbz	w6, .L1096
+	strb	w2, [x1, #:lo12:.LANCHOR53]
 	ret
-.L1074:
-	adrp	x0, .LANCHOR69
-	ldrb	w3, [x0, #:lo12:.LANCHOR69]
-	add	x0, x0, :lo12:.LANCHOR69
-	b	.L1075
-.L1073:
-	cbnz	w0, .L1071
-	ldr	w0, [x3, 36]
-	cmn	w0, #1
-	beq	.L1071
-	adrp	x0, .LANCHOR60
-	ldrb	w3, [x0, #:lo12:.LANCHOR60]
-	add	x0, x0, :lo12:.LANCHOR60
-	b	.L1075
-.L1079:
-	add	x0, x1, :lo12:.LANCHOR48
-.L1086:
-	mov	w1, w3
-	sbfiz	x3, x3, 6, 32
-	ldrb	w3, [x0, x3]
-	cmp	w3, 255
-	bne	.L1086
-	add	x2, x0, x2, lsl 6
-	sbfiz	x1, x1, 6, 32
-	ldrb	w2, [x2, 1]
-	strb	w2, [x0, x1]
+.L1099:
+	lsl	x6, x0, 6
+	ldrb	w2, [x5, x8]
+	add	x4, x5, x6
+	strb	w15, [x5, x6]
+	ldrb	w6, [x4, 59]
+	cmp	w6, 1
+	bne	.L1102
+	ldrh	w4, [x4, 50]
+	cbnz	w4, .L1110
+	mov	w4, w14
+	mov	x6, x10
+.L1103:
+	cmp	w4, 255
+	bne	.L1108
+	add	x3, x3, :lo12:.LANCHOR49
+	strb	w2, [x1, #:lo12:.LANCHOR53]
+	add	x0, x3, x0, lsl 6
+	ldrb	w0, [x0, 1]
+	strb	w0, [x6]
 	ret
-.L1071:
+.L1102:
+	cbnz	w6, .L1104
+	ldr	w4, [x4, 36]
+	cmn	w4, #1
+	beq	.L1104
+	mov	w4, w13
+	mov	x6, x7
+	b	.L1103
+.L1110:
+	mov	w4, w12
+	mov	x6, x16
+	b	.L1103
+.L1108:
+	mov	w6, w4
+	sbfiz	x4, x4, 6, 32
+	ldrb	w4, [x11, x4]
+	cmp	w4, 255
+	bne	.L1108
+	add	x0, x11, x0, lsl 6
+	sbfiz	x6, x6, 6, 32
+	ldrb	w0, [x0, 1]
+	strb	w0, [x11, x6]
+.L1104:
+	mov	w6, 1
+	b	.L1097
+.L1098:
+	cbz	w6, .L1096
+	mov	w0, -1
+	strb	w0, [x1, #:lo12:.LANCHOR53]
+.L1096:
 	ret
 	.size	queue_remove_completed_req, .-queue_remove_completed_req
 	.section	.text.pm_alloc_new_blk,"ax",@progbits
@@ -6302,110 +6441,110 @@ queue_remove_completed_req:
 	.type	pm_alloc_new_blk, %function
 pm_alloc_new_blk:
 	stp	x29, x30, [sp, -64]!
-	adrp	x2, .LANCHOR76
+	adrp	x2, .LANCHOR73
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR100
+	adrp	x20, .LANCHOR97
 	stp	x21, x22, [sp, 32]
-	ldr	x1, [x20, #:lo12:.LANCHOR100]
-	ldrb	w2, [x2, #:lo12:.LANCHOR76]
+	ldr	x1, [x20, #:lo12:.LANCHOR97]
+	ldrb	w2, [x2, #:lo12:.LANCHOR73]
 	ldrh	w0, [x1, 690]
 	str	x23, [sp, 48]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	strh	w0, [x1, 690]
 	cmp	w2, w0
-	bls	.L1088
+	bls	.L1121
 	add	x0, x1, x0, sxtw 1
 	ldrh	w1, [x0, 672]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1089
-.L1088:
+	bne	.L1122
+.L1121:
 	adrp	x19, .LC70
 	add	x19, x19, :lo12:.LC70
-	adrp	x23, .LANCHOR3
-.L1101:
+	adrp	x23, .LANCHOR7
+.L1134:
 	mov	w0, 1
 	bl	ftl_alloc_sblk
 	mov	w1, 0
 	and	w21, w0, 65535
 	bl	ftl_erase_sblk
-	add	x14, x20, :lo12:.LANCHOR100
-	ldr	x1, [x20, #:lo12:.LANCHOR100]
+	add	x14, x20, :lo12:.LANCHOR97
+	ldr	x1, [x20, #:lo12:.LANCHOR97]
 	mov	w0, w21
 	add	x1, x1, 672
 	bl	ftl_get_blk_list_in_sblk
 	tst	w0, 65535
-	bne	.L1090
+	bne	.L1123
 	mov	w1, w21
 	mov	x0, x19
 	bl	printf
-	ldr	x1, [x23, #:lo12:.LANCHOR3]
+	ldr	x1, [x23, #:lo12:.LANCHOR7]
 	add	x1, x1, x21, uxth 2
 	ldrb	w0, [x1, 2]
 	orr	w0, w0, -32
 	strb	w0, [x1, 2]
-	b	.L1101
-.L1090:
+	b	.L1134
+.L1123:
 	ldr	x0, [x14]
-	adrp	x1, .LANCHOR127
+	adrp	x1, .LANCHOR128
 	mov	w2, 1
 	mov	w19, 0
 	add	x0, x0, 416
-	str	w2, [x1, #:lo12:.LANCHOR127]
+	str	w2, [x1, #:lo12:.LANCHOR128]
 	mov	w1, 65535
 	strh	wzr, [x0, 274]
-.L1092:
+.L1125:
 	ldrh	w2, [x0]
 	cmp	w2, w1
-	beq	.L1091
+	beq	.L1124
 	add	w19, w19, 1
 	add	x0, x0, 2
 	and	w19, w19, 65535
 	cmp	w19, 128
-	bne	.L1092
-	adrp	x1, .LANCHOR128
+	bne	.L1125
+	adrp	x1, .LANCHOR129
 	adrp	x0, .LC0
 	mov	w2, 194
-	add	x1, x1, :lo12:.LANCHOR128
+	add	x1, x1, :lo12:.LANCHOR129
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1091:
-	ldr	x0, [x20, #:lo12:.LANCHOR100]
+.L1124:
+	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	add	x19, x0, x19, sxtw 1
 	ldrh	w1, [x0, 688]
 	strh	w21, [x19, 416]
 	add	w1, w1, 1
 	strh	w1, [x0, 688]
-.L1089:
-	ldr	x1, [x20, #:lo12:.LANCHOR100]
+.L1122:
+	ldr	x1, [x20, #:lo12:.LANCHOR97]
 	ldrh	w0, [x1, 690]
 	add	x0, x0, 336
 	ldrh	w19, [x1, x0, lsl 1]
 	mov	w0, 65533
 	sub	w1, w19, #1
 	cmp	w0, w1, uxth
-	bcs	.L1094
-	adrp	x1, .LANCHOR128
+	bcs	.L1127
+	adrp	x1, .LANCHOR129
 	adrp	x0, .LC0
 	mov	w2, 199
-	add	x1, x1, :lo12:.LANCHOR128
+	add	x1, x1, :lo12:.LANCHOR129
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1094:
-	adrp	x1, .LANCHOR102
-	ldr	x0, [x20, #:lo12:.LANCHOR100]
+.L1127:
+	adrp	x1, .LANCHOR99
+	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	mov	w2, 21
-	ldrh	w1, [x1, #:lo12:.LANCHOR102]
+	ldrh	w1, [x1, #:lo12:.LANCHOR99]
 	sub	w2, w2, w1
 	strh	wzr, [x0, 696]
 	strh	w19, [x0, 692]
 	asr	w4, w19, w2
 	strh	w4, [x0, 694]
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L1097
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L1130
 	mov	w0, 1
 	and	w4, w4, 65535
 	lsl	w2, w0, w2
@@ -6415,7 +6554,7 @@ pm_alloc_new_blk:
 	mov	w1, w19
 	add	x0, x0, :lo12:.LC71
 	bl	printf
-.L1097:
+.L1130:
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -6429,68 +6568,68 @@ pm_alloc_new_blk:
 	.type	pm_select_ram_region, %function
 pm_select_ram_region:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR129
-	add	x0, x0, :lo12:.LANCHOR129
+	adrp	x0, .LANCHOR130
+	add	x0, x0, :lo12:.LANCHOR130
 	mov	x1, 0
 	add	x29, sp, 0
 	mov	w2, 65535
 	str	x19, [sp, 16]
-.L1106:
+.L1139:
 	lsl	x3, x1, 4
 	and	w19, w1, 65535
 	ldrh	w3, [x3, x0]
 	cmp	w3, w2
-	beq	.L1105
+	beq	.L1138
 	add	x1, x1, 1
 	cmp	x1, 32
-	bne	.L1106
+	bne	.L1139
 	add	x0, x0, 2
 	mov	w19, w1
 	mov	x2, x0
 	mov	w4, 32768
 	mov	w1, 0
-.L1108:
+.L1141:
 	ldrh	w3, [x2]
-	tbnz	x3, 15, .L1107
+	tbnz	x3, 15, .L1140
 	cmp	w3, w4
-	bcs	.L1107
+	bcs	.L1140
 	mov	w4, w3
 	mov	w19, w1
-.L1107:
+.L1140:
 	add	w1, w1, 1
 	add	x2, x2, 16
 	and	w1, w1, 65535
 	cmp	w1, 32
-	bne	.L1108
+	bne	.L1141
 	cmp	w19, 32
-	bne	.L1105
-	adrp	x1, .LANCHOR130
+	bne	.L1138
+	adrp	x1, .LANCHOR131
 	mov	w2, -1
-	ldrb	w3, [x1, #:lo12:.LANCHOR130]
+	ldrb	w3, [x1, #:lo12:.LANCHOR131]
 	mov	w1, 0
-.L1110:
+.L1143:
 	ldrh	w5, [x0]
 	cmp	w5, w2
-	bcs	.L1109
+	bcs	.L1142
 	ldrh	w4, [x0, -2]
 	cmp	w4, w3
 	csel	w2, w2, w5, eq
 	csel	w19, w19, w1, eq
-.L1109:
+.L1142:
 	add	w1, w1, 1
 	add	x0, x0, 16
 	and	w1, w1, 65535
 	cmp	w1, 32
-	bne	.L1110
+	bne	.L1143
 	cmp	w19, 32
-	bne	.L1105
-	adrp	x1, .LANCHOR131
+	bne	.L1138
+	adrp	x1, .LANCHOR132
 	adrp	x0, .LC0
 	mov	w2, 297
-	add	x1, x1, :lo12:.LANCHOR131
+	add	x1, x1, :lo12:.LANCHOR132
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1105:
+.L1138:
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -6512,60 +6651,60 @@ flash_lsb_page_tbl_build:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR29
-	cbnz	w0, .L1117
-	add	x1, x19, :lo12:.LANCHOR29
+	adrp	x19, .LANCHOR3
+	cbnz	w0, .L1150
+	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1118:
+.L1151:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 256
-	bne	.L1118
-.L1124:
-	adrp	x20, .LANCHOR132
-	add	x20, x20, :lo12:.LANCHOR132
+	bne	.L1151
+.L1157:
+	adrp	x20, .LANCHOR133
+	add	x20, x20, :lo12:.LANCHOR133
 	mov	w2, 1024
 	mov	w1, 255
 	mov	x0, x20
-	add	x19, x19, :lo12:.LANCHOR29
+	add	x19, x19, :lo12:.LANCHOR3
 	bl	ftl_memset
 	mov	x0, 0
-.L1119:
+.L1152:
 	ldrh	w1, [x0, x19]
 	add	x0, x0, 2
 	cmp	x0, 512
 	strh	w1, [x20, w1, sxtw 1]
-	bne	.L1119
+	bne	.L1152
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1117:
+.L1150:
 	cmp	w0, 1
-	bne	.L1120
-	add	x3, x19, :lo12:.LANCHOR29
+	bne	.L1153
+	add	x3, x19, :lo12:.LANCHOR3
 	mov	x1, 0
-.L1123:
+.L1156:
 	and	w0, w1, 65535
 	cmp	x1, 3
-	bls	.L1121
+	bls	.L1154
 	ubfiz	w2, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 2
 	sub	w0, w2, w0
 	and	w0, w0, 65535
-.L1121:
+.L1154:
 	strh	w0, [x3, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L1123
-	b	.L1124
-.L1120:
+	bne	.L1156
+	b	.L1157
+.L1153:
 	cmp	w0, 2
-	bne	.L1125
-	add	x3, x19, :lo12:.LANCHOR29
+	bne	.L1158
+	add	x3, x19, :lo12:.LANCHOR3
 	mov	w1, 65535
 	mov	x0, 0
-.L1127:
+.L1160:
 	cmp	x0, 2
 	and	w2, w0, 65535
 	csel	w2, w2, w1, cc
@@ -6574,35 +6713,35 @@ flash_lsb_page_tbl_build:
 	add	x0, x0, 1
 	and	w1, w1, 65535
 	cmp	x0, 256
-	bne	.L1127
-	b	.L1124
-.L1125:
+	bne	.L1160
+	b	.L1157
+.L1158:
 	cmp	w0, 3
-	bne	.L1128
-	add	x3, x19, :lo12:.LANCHOR29
+	bne	.L1161
+	add	x3, x19, :lo12:.LANCHOR3
 	mov	x1, 0
-.L1131:
+.L1164:
 	and	w0, w1, 65535
 	cmp	x1, 5
-	bls	.L1129
+	bls	.L1162
 	ubfiz	w2, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 4
 	sub	w0, w2, w0
 	and	w0, w0, 65535
-.L1129:
+.L1162:
 	strh	w0, [x3, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L1131
-	b	.L1124
-.L1128:
+	bne	.L1164
+	b	.L1157
+.L1161:
 	cmp	w0, 4
-	bne	.L1132
-	add	x1, x19, :lo12:.LANCHOR29
+	bne	.L1165
+	add	x1, x19, :lo12:.LANCHOR3
 	mov	w2, 1
 	add	x1, x1, 16
-	strh	wzr, [x19, #:lo12:.LANCHOR29]
+	strh	wzr, [x19, #:lo12:.LANCHOR3]
 	strh	w0, [x1, -8]
 	mov	w0, 5
 	strh	w2, [x1, -14]
@@ -6616,7 +6755,7 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1, -10]
 	strh	w0, [x1, -2]
 	mov	w0, 8
-.L1134:
+.L1167:
 	and	w3, w0, 1
 	ubfiz	w2, w0, 1, 15
 	add	w3, w3, 6
@@ -6625,37 +6764,37 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1], 2
 	and	w0, w0, 65535
 	cmp	w0, 256
-	bne	.L1134
-	b	.L1124
-.L1132:
+	bne	.L1167
+	b	.L1157
+.L1165:
 	cmp	w0, 5
-	bne	.L1135
-	add	x1, x19, :lo12:.LANCHOR29
+	bne	.L1168
+	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1136:
+.L1169:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 16
-	bne	.L1136
+	bne	.L1169
 	add	x1, x1, 32
-.L1137:
+.L1170:
 	strh	w0, [x1], 2
 	add	w0, w0, 2
 	and	w0, w0, 65535
 	cmp	w0, 496
-	bne	.L1137
-	b	.L1124
-.L1135:
+	bne	.L1170
+	b	.L1157
+.L1168:
 	cmp	w0, 8
-	bne	.L1124
-	add	x1, x19, :lo12:.LANCHOR29
+	bne	.L1157
+	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1138:
+.L1171:
 	strh	w0, [x0, x1]
 	add	x0, x0, 2
 	cmp	x0, 512
-	bne	.L1138
-	b	.L1124
+	bne	.L1171
+	b	.L1157
 	.size	flash_lsb_page_tbl_build, .-flash_lsb_page_tbl_build
 	.section	.text.flash_die_info_init,"ax",@progbits
 	.align	2
@@ -6663,38 +6802,38 @@ flash_lsb_page_tbl_build:
 	.type	flash_die_info_init, %function
 flash_die_info_init:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR9
+	adrp	x0, .LANCHOR14
 	add	x29, sp, 0
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	tbz	x0, 12, .L1154
-	adrp	x1, .LANCHOR133
+	tbz	x0, 12, .L1187
+	adrp	x1, .LANCHOR134
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR133
+	add	x1, x1, :lo12:.LANCHOR134
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1154:
+.L1187:
 	adrp	x23, .LANCHOR34
 	add	x19, x23, :lo12:.LANCHOR34
-	adrp	x25, .LANCHOR28
-	adrp	x26, .LANCHOR14
-	adrp	x22, .LANCHOR26
-	add	x21, x22, :lo12:.LANCHOR26
+	adrp	x25, .LANCHOR2
+	adrp	x26, .LANCHOR18
+	adrp	x22, .LANCHOR29
+	add	x21, x22, :lo12:.LANCHOR29
 	ldrh	w0, [x19, 26]
 	mov	w2, 8
 	ldrb	w1, [x19, 12]
-	adrp	x24, .LANCHOR135
-	strh	w0, [x25, #:lo12:.LANCHOR28]
-	add	x20, x24, :lo12:.LANCHOR135
+	adrp	x24, .LANCHOR136
+	strh	w0, [x25, #:lo12:.LANCHOR2]
+	add	x20, x24, :lo12:.LANCHOR136
 	ldrh	w0, [x19, 10]
 	add	x19, x19, 1
-	strb	wzr, [x26, #:lo12:.LANCHOR14]
+	strb	wzr, [x26, #:lo12:.LANCHOR18]
 	sdiv	w0, w0, w1
-	adrp	x1, .LANCHOR134
-	strh	w0, [x1, #:lo12:.LANCHOR134]
+	adrp	x1, .LANCHOR135
+	strh	w0, [x1, #:lo12:.LANCHOR135]
 	mov	w1, 0
 	mov	x0, x21
 	bl	ftl_memset
@@ -6704,32 +6843,32 @@ flash_die_info_init:
 	bl	ftl_memset
 	ldrb	w13, [x23, #:lo12:.LANCHOR34]
 	mov	x7, x23
-	adrp	x14, .LANCHOR40
-	add	x11, x26, :lo12:.LANCHOR14
-	add	x23, x14, :lo12:.LANCHOR40
+	adrp	x14, .LANCHOR41
+	add	x11, x26, :lo12:.LANCHOR18
+	add	x23, x14, :lo12:.LANCHOR41
 	mov	x8, 0
-.L1156:
+.L1189:
 	mov	w2, w13
 	add	x1, x23, x8, lsl 3
 	mov	x0, x19
 	bl	flash_mem_cmp8
-	cbnz	w0, .L1155
+	cbnz	w0, .L1188
 	ldrb	w1, [x11]
 	add	w0, w1, 1
 	strb	w0, [x11]
 	str	wzr, [x20, x1, lsl 2]
 	strb	w8, [x21, x1]
-.L1155:
+.L1188:
 	add	x8, x8, 1
 	cmp	x8, 4
-	bne	.L1156
+	bne	.L1189
 	add	x0, x7, :lo12:.LANCHOR34
 	ldrb	w1, [x0, 8]
 	cmp	w1, 2
-	beq	.L1157
-.L1161:
+	beq	.L1190
+.L1194:
 	add	x7, x7, :lo12:.LANCHOR34
-	ldrb	w0, [x26, #:lo12:.LANCHOR14]
+	ldrb	w0, [x26, #:lo12:.LANCHOR18]
 	ldp	x19, x20, [sp, 16]
 	ldrb	w1, [x7, 13]
 	ldp	x21, x22, [sp, 32]
@@ -6739,30 +6878,30 @@ flash_die_info_init:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	mul	w0, w0, w1
-	adrp	x1, .LANCHOR136
-	strh	w0, [x1, #:lo12:.LANCHOR136]
+	adrp	x1, .LANCHOR137
+	strh	w0, [x1, #:lo12:.LANCHOR137]
 	ret
-.L1157:
-	ldrh	w1, [x25, #:lo12:.LANCHOR28]
-	add	x14, x14, :lo12:.LANCHOR40
+.L1190:
+	ldrh	w1, [x25, #:lo12:.LANCHOR2]
+	add	x14, x14, :lo12:.LANCHOR41
 	ldrb	w11, [x0, 13]
 	add	x8, x0, 1
 	ldrb	w20, [x0, 23]
-	add	x19, x26, :lo12:.LANCHOR14
-	add	x15, x24, :lo12:.LANCHOR135
-	add	x22, x22, :lo12:.LANCHOR26
+	add	x19, x26, :lo12:.LANCHOR18
+	add	x15, x24, :lo12:.LANCHOR136
+	add	x22, x22, :lo12:.LANCHOR29
 	mov	x12, 0
 	mul	w11, w11, w1
 	ldrh	w1, [x0, 14]
 	and	w1, w1, 65280
 	mul	w11, w11, w1
 	lsl	w21, w11, 1
-.L1160:
+.L1193:
 	mov	w2, w13
 	add	x1, x14, x12, lsl 3
 	mov	x0, x8
 	bl	flash_mem_cmp8
-	cbnz	w0, .L1158
+	cbnz	w0, .L1191
 	ldrb	w1, [x19]
 	cmp	w20, 0
 	csel	w2, w11, w21, eq
@@ -6770,11 +6909,11 @@ flash_die_info_init:
 	strb	w0, [x19]
 	str	w2, [x15, x1, lsl 2]
 	strb	w12, [x22, x1]
-.L1158:
+.L1191:
 	add	x12, x12, 1
 	cmp	x12, 4
-	bne	.L1160
-	b	.L1161
+	bne	.L1193
+	b	.L1194
 	.size	flash_die_info_init, .-flash_die_info_init
 	.section	.text.lpa_hash_init,"ax",@progbits
 	.align	2
@@ -6784,19 +6923,19 @@ lpa_hash_init:
 	stp	x29, x30, [sp, -16]!
 	mov	w2, 512
 	mov	w1, 255
-	adrp	x0, .LANCHOR113
+	adrp	x0, .LANCHOR110
 	add	x29, sp, 0
-	add	x0, x0, :lo12:.LANCHOR113
+	add	x0, x0, :lo12:.LANCHOR110
 	bl	ftl_memset
-	adrp	x0, .LANCHOR83
+	adrp	x0, .LANCHOR80
 	mov	w1, 255
 	ldp	x29, x30, [sp], 16
-	ldrh	w2, [x0, #:lo12:.LANCHOR83]
-	adrp	x0, .LANCHOR76
-	ldrb	w0, [x0, #:lo12:.LANCHOR76]
+	ldrh	w2, [x0, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR73
+	ldrb	w0, [x0, #:lo12:.LANCHOR73]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR115
-	ldr	x0, [x0, #:lo12:.LANCHOR115]
+	adrp	x0, .LANCHOR112
+	ldr	x0, [x0, #:lo12:.LANCHOR112]
 	lsl	w2, w2, 2
 	b	ftl_memset
 	.size	lpa_hash_init, .-lpa_hash_init
@@ -6806,64 +6945,64 @@ lpa_hash_init:
 	.type	lpa_rebuild_hash, %function
 lpa_rebuild_hash:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LANCHOR9
+	adrp	x0, .LANCHOR14
 	add	x29, sp, 0
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	tbz	x0, 12, .L1174
-	adrp	x1, .LANCHOR137
+	tbz	x0, 12, .L1207
+	adrp	x1, .LANCHOR138
 	adrp	x0, .LC72
 	mov	w3, 0
-	mov	w2, 220
-	add	x1, x1, :lo12:.LANCHOR137
+	mov	w2, 222
+	add	x1, x1, :lo12:.LANCHOR138
 	add	x0, x0, :lo12:.LC72
 	bl	printf
-.L1174:
-	adrp	x20, .LANCHOR83
-	adrp	x22, .LANCHOR76
-	adrp	x19, .LANCHOR113
-	add	x19, x19, :lo12:.LANCHOR113
+.L1207:
+	adrp	x20, .LANCHOR80
+	adrp	x22, .LANCHOR73
+	adrp	x19, .LANCHOR110
+	add	x19, x19, :lo12:.LANCHOR110
 	mov	w2, 512
 	mov	w1, 255
 	mov	x0, x19
 	bl	ftl_memset
-	ldrh	w2, [x20, #:lo12:.LANCHOR83]
-	adrp	x21, .LANCHOR115
-	ldrb	w0, [x22, #:lo12:.LANCHOR76]
+	ldrh	w2, [x20, #:lo12:.LANCHOR80]
+	adrp	x21, .LANCHOR112
+	ldrb	w0, [x22, #:lo12:.LANCHOR73]
 	mov	w1, 255
-	add	x20, x20, :lo12:.LANCHOR83
+	add	x20, x20, :lo12:.LANCHOR80
 	mul	w2, w2, w0
-	ldr	x0, [x21, #:lo12:.LANCHOR115]
+	ldr	x0, [x21, #:lo12:.LANCHOR112]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	adrp	x0, .LANCHOR114
-	ldrb	w3, [x22, #:lo12:.LANCHOR76]
-	ldr	x5, [x21, #:lo12:.LANCHOR115]
+	adrp	x0, .LANCHOR111
+	ldrb	w3, [x22, #:lo12:.LANCHOR73]
+	ldr	x5, [x21, #:lo12:.LANCHOR112]
 	mov	w1, 0
-	ldr	x4, [x0, #:lo12:.LANCHOR114]
-.L1175:
+	ldr	x4, [x0, #:lo12:.LANCHOR111]
+.L1208:
 	ldrh	w0, [x20]
 	mul	w0, w0, w3
 	cmp	w1, w0, lsl 1
-	blt	.L1177
+	blt	.L1210
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1177:
+.L1210:
 	uxtw	x2, w1
 	ldr	w0, [x4, x2, lsl 2]
 	cmn	w0, #1
-	beq	.L1176
+	beq	.L1209
 	and	x0, x0, 255
 	ldrh	w6, [x19, x0, lsl 1]
 	strh	w1, [x19, x0, lsl 1]
 	strh	w6, [x5, x2, lsl 1]
-.L1176:
+.L1209:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L1175
+	b	.L1208
 	.size	lpa_rebuild_hash, .-lpa_rebuild_hash
 	.section	.text.zftl_read_flash_info,"ax",@progbits
 	.align	2
@@ -6879,17 +7018,17 @@ zftl_read_flash_info:
 	bl	ftl_memset
 	adrp	x1, .LANCHOR34
 	add	x1, x1, :lo12:.LANCHOR34
-	adrp	x0, .LANCHOR28
+	adrp	x0, .LANCHOR2
 	mov	w4, 1
 	ldrb	w3, [x1, 9]
-	ldrh	w0, [x0, #:lo12:.LANCHOR28]
+	ldrh	w0, [x0, #:lo12:.LANCHOR2]
 	mul	w0, w3, w0
 	and	w2, w0, 65535
 	strb	w2, [x19, 4]
 	ubfx	x0, x2, 8, 8
 	strb	w0, [x19, 5]
-	adrp	x0, .LANCHOR42
-	ldrb	w0, [x0, #:lo12:.LANCHOR42]
+	adrp	x0, .LANCHOR43
+	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	strb	w0, [x19, 7]
 	ldrb	w0, [x1, 13]
 	mul	w0, w0, w2
@@ -6905,30 +7044,30 @@ zftl_read_flash_info:
 	ubfx	x2, x0, 16, 8
 	lsr	w0, w0, 24
 	strb	w2, [x19, 2]
-	adrp	x2, .LANCHOR26
+	adrp	x2, .LANCHOR29
 	strb	w0, [x19, 3]
 	mov	w0, 32
 	strb	w0, [x19, 8]
-	add	x2, x2, :lo12:.LANCHOR26
+	add	x2, x2, :lo12:.LANCHOR29
 	ldrb	w0, [x1, 7]
 	mov	x1, 0
 	strb	w0, [x19, 9]
-	adrp	x0, .LANCHOR14
-	ldrb	w3, [x0, #:lo12:.LANCHOR14]
-.L1186:
+	adrp	x0, .LANCHOR18
+	ldrb	w3, [x0, #:lo12:.LANCHOR18]
+.L1219:
 	cmp	w3, w1, uxtb
-	bhi	.L1187
+	bhi	.L1220
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1187:
+.L1220:
 	ldrb	w0, [x1, x2]
 	add	x1, x1, 1
 	ldrb	w5, [x19, 10]
 	lsl	w0, w4, w0
 	orr	w0, w0, w5
 	strb	w0, [x19, 10]
-	b	.L1186
+	b	.L1219
 	.size	zftl_read_flash_info, .-zftl_read_flash_info
 	.section	.text.gc_static_wearleveling,"ax",@progbits
 	.align	2
@@ -6938,74 +7077,74 @@ gc_static_wearleveling:
 	stp	x29, x30, [sp, -160]!
 	add	x29, sp, 0
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR100
+	adrp	x25, .LANCHOR97
 	stp	x19, x20, [sp, 16]
-	ldr	x0, [x25, #:lo12:.LANCHOR100]
+	ldr	x0, [x25, #:lo12:.LANCHOR97]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	stp	x27, x28, [sp, 80]
 	ldr	w1, [x0, 32]
 	mov	w0, 10240
 	cmp	w1, w0
-	bls	.L1190
+	bls	.L1223
 	bl	ftl_tmp_into_update
-.L1190:
-	adrp	x19, .LANCHOR6
-	ldr	x0, [x19, #:lo12:.LANCHOR6]
+.L1223:
+	adrp	x19, .LANCHOR10
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldr	w1, [x0, 568]
 	ldr	w2, [x0, 12]
 	add	w1, w1, 860160
 	add	w1, w1, 3840
 	cmp	w2, w1
-	bhi	.L1191
-	ldr	x3, [x25, #:lo12:.LANCHOR100]
+	bhi	.L1224
+	ldr	x3, [x25, #:lo12:.LANCHOR97]
 	ldr	w1, [x0, 572]
 	add	w1, w1, 32
 	ldr	w3, [x3, 36]
 	cmp	w3, w1
-	bls	.L1240
-.L1191:
-	ldr	x1, [x25, #:lo12:.LANCHOR100]
+	bls	.L1273
+.L1224:
+	ldr	x1, [x25, #:lo12:.LANCHOR97]
 	mov	w20, 65535
-	adrp	x8, .LANCHOR9
+	adrp	x8, .LANCHOR14
 	mov	w21, w20
-	add	x8, x8, :lo12:.LANCHOR9
+	add	x8, x8, :lo12:.LANCHOR14
 	mov	w28, 0
 	mov	w27, 0
 	mov	w22, 0
 	ldr	w3, [x1, 36]
-	adrp	x23, .LANCHOR3
+	adrp	x23, .LANCHOR7
 	ldrh	w24, [x1, 134]
 	str	w2, [x0, 568]
 	str	w3, [x0, 572]
-	adrp	x0, .LANCHOR2
-	add	x10, x0, :lo12:.LANCHOR2
+	adrp	x0, .LANCHOR6
+	add	x10, x0, :lo12:.LANCHOR6
 	str	wzr, [x29, 128]
 	str	wzr, [x29, 136]
 	stp	wzr, wzr, [x29, 148]
 	str	wzr, [x29, 156]
-.L1193:
+.L1226:
 	ldrh	w0, [x10]
 	cmp	w0, w24
-	bhi	.L1202
-	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	bhi	.L1235
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w2, 128
 	mov	w1, 255
-	adrp	x24, .LANCHOR9
+	adrp	x24, .LANCHOR14
 	add	x0, x0, 264
 	strh	wzr, [x0, -142]
 	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR6]
-	ldr	w3, [x24, #:lo12:.LANCHOR9]
-	ldr	x2, [x23, #:lo12:.LANCHOR3]
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	ldr	w3, [x24, #:lo12:.LANCHOR14]
+	ldr	x2, [x23, #:lo12:.LANCHOR7]
 	ldrh	w5, [x0, 586]
 	mov	x1, x5
 	lsl	x0, x5, 2
 	add	x26, x2, x0
-	tbz	x3, 10, .L1203
-	adrp	x3, .LANCHOR5
+	tbz	x3, 10, .L1236
+	adrp	x3, .LANCHOR9
 	ldrb	w4, [x26, 2]
-	ldr	x6, [x3, #:lo12:.LANCHOR5]
+	ldr	x6, [x3, #:lo12:.LANCHOR9]
 	ldr	w3, [x2, x0]
 	ldrh	w2, [x2, x0]
 	adrp	x0, .LC74
@@ -7017,33 +7156,33 @@ gc_static_wearleveling:
 	and	w2, w2, 2047
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1203:
+.L1236:
 	ldrb	w0, [x26, 2]
-	tbz	x0, 3, .L1204
+	tbz	x0, 3, .L1237
 	ldrb	w0, [x26, 2]
 	and	w1, w0, 192
 	cmp	w1, 64
-	bne	.L1205
-	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	bne	.L1238
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w1, 0
 	mov	w2, 1
 	ldrh	w0, [x0, 586]
 	bl	gc_add_sblk
-	adrp	x0, .LANCHOR65+318
+	adrp	x0, .LANCHOR62+318
 	mov	w1, 1
-	strh	w1, [x0, #:lo12:.LANCHOR65+318]
-.L1204:
-	ldr	x0, [x19, #:lo12:.LANCHOR6]
-	ldr	w3, [x24, #:lo12:.LANCHOR9]
-	ldr	x2, [x23, #:lo12:.LANCHOR3]
+	strh	w1, [x0, #:lo12:.LANCHOR62+318]
+.L1237:
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	ldr	w3, [x24, #:lo12:.LANCHOR14]
+	ldr	x2, [x23, #:lo12:.LANCHOR7]
 	ldrh	w5, [x0, 584]
 	mov	x1, x5
 	lsl	x0, x5, 2
 	add	x26, x2, x0
-	tbz	x3, 10, .L1206
-	adrp	x3, .LANCHOR5
+	tbz	x3, 10, .L1239
+	adrp	x3, .LANCHOR9
 	ldrb	w4, [x26, 2]
-	ldr	x6, [x3, #:lo12:.LANCHOR5]
+	ldr	x6, [x3, #:lo12:.LANCHOR9]
 	ldr	w3, [x2, x0]
 	ldrh	w2, [x2, x0]
 	adrp	x0, .LC75
@@ -7055,28 +7194,28 @@ gc_static_wearleveling:
 	and	w2, w2, 2047
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1206:
+.L1239:
 	ldrb	w0, [x26, 2]
-	tbz	x0, 3, .L1207
+	tbz	x0, 3, .L1240
 	ldrb	w0, [x26, 2]
 	and	w1, w0, 192
 	cmp	w1, 64
-	bne	.L1208
-	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	bne	.L1241
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w1, 0
 	mov	w2, 1
 	ldrh	w0, [x0, 584]
 	bl	gc_add_sblk
-	adrp	x0, .LANCHOR65+318
+	adrp	x0, .LANCHOR62+318
 	mov	w1, 1
-	strh	w1, [x0, #:lo12:.LANCHOR65+318]
-.L1207:
-	ldr	w0, [x24, #:lo12:.LANCHOR9]
-	tbz	x0, 10, .L1209
+	strh	w1, [x0, #:lo12:.LANCHOR62+318]
+.L1240:
+	ldr	w0, [x24, #:lo12:.LANCHOR14]
+	tbz	x0, 10, .L1242
 	ldr	w6, [x29, 128]
-	adrp	x2, .LANCHOR5
-	ldr	x1, [x23, #:lo12:.LANCHOR3]
-	ldr	x7, [x2, #:lo12:.LANCHOR5]
+	adrp	x2, .LANCHOR9
+	ldr	x1, [x23, #:lo12:.LANCHOR7]
+	ldr	x7, [x2, #:lo12:.LANCHOR9]
 	lsl	x0, x6, 2
 	add	x5, x1, x0
 	ldr	w3, [x1, x0]
@@ -7092,13 +7231,13 @@ gc_static_wearleveling:
 	ubfx	x5, x4, 5, 3
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1209:
-	ldr	w0, [x24, #:lo12:.LANCHOR9]
-	tbz	x0, 10, .L1210
+.L1242:
+	ldr	w0, [x24, #:lo12:.LANCHOR14]
+	tbz	x0, 10, .L1243
 	ldr	w6, [x29, 136]
-	adrp	x2, .LANCHOR5
-	ldr	x1, [x23, #:lo12:.LANCHOR3]
-	ldr	x7, [x2, #:lo12:.LANCHOR5]
+	adrp	x2, .LANCHOR9
+	ldr	x1, [x23, #:lo12:.LANCHOR7]
+	ldr	x7, [x2, #:lo12:.LANCHOR9]
 	lsl	x0, x6, 2
 	add	x5, x1, x0
 	ldr	w3, [x1, x0]
@@ -7114,8 +7253,8 @@ gc_static_wearleveling:
 	ubfx	x5, x4, 5, 3
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1210:
-	ldr	x0, [x25, #:lo12:.LANCHOR100]
+.L1243:
+	ldr	x0, [x25, #:lo12:.LANCHOR97]
 	ldrh	w1, [x29, 156]
 	strh	w1, [x0, 96]
 	ldr	w1, [x29, 148]
@@ -7127,8 +7266,8 @@ gc_static_wearleveling:
 	udiv	w4, w1, w28
 	strh	w3, [x0, 88]
 	strh	w4, [x0, 90]
-	ldr	w0, [x24, #:lo12:.LANCHOR9]
-	tbz	x0, 10, .L1211
+	ldr	w0, [x24, #:lo12:.LANCHOR14]
+	tbz	x0, 10, .L1244
 	adrp	x0, .LC78
 	and	w4, w4, 65535
 	and	w3, w3, 65535
@@ -7136,118 +7275,118 @@ gc_static_wearleveling:
 	mov	w1, w27
 	add	x0, x0, :lo12:.LC78
 	bl	printf
-.L1211:
-	ldr	w0, [x24, #:lo12:.LANCHOR9]
-	tbz	x0, 10, .L1212
-	adrp	x0, .LANCHOR138
+.L1244:
+	ldr	w0, [x24, #:lo12:.LANCHOR14]
+	tbz	x0, 10, .L1245
+	adrp	x0, .LANCHOR139
 	ldr	w3, [x29, 156]
 	mov	w4, w22
 	mov	w2, w21
-	ldrh	w6, [x0, #:lo12:.LANCHOR138]
-	adrp	x0, .LANCHOR139
+	ldrh	w6, [x0, #:lo12:.LANCHOR139]
+	adrp	x0, .LANCHOR140
 	mov	w1, w20
-	ldrh	w5, [x0, #:lo12:.LANCHOR139]
+	ldrh	w5, [x0, #:lo12:.LANCHOR140]
 	adrp	x0, .LC79
 	add	x0, x0, :lo12:.LC79
 	bl	printf
-.L1212:
+.L1245:
 	sub	w0, w22, w21
 	str	w0, [x29, 148]
-	adrp	x0, .LANCHOR138
+	adrp	x0, .LANCHOR139
 	ldr	w1, [x29, 148]
-	ldrh	w0, [x0, #:lo12:.LANCHOR138]
+	ldrh	w0, [x0, #:lo12:.LANCHOR139]
 	cmp	w1, w0
-	bgt	.L1213
-	adrp	x1, .LANCHOR139
+	bgt	.L1246
+	adrp	x1, .LANCHOR140
 	ldr	w0, [x29, 156]
-	ldrh	w1, [x1, #:lo12:.LANCHOR139]
+	ldrh	w1, [x1, #:lo12:.LANCHOR140]
 	sub	w0, w0, w20
 	cmp	w0, w1
-	ble	.L1241
-.L1213:
-	ldr	x0, [x19, #:lo12:.LANCHOR6]
-	adrp	x28, .LANCHOR65
-	add	x28, x28, :lo12:.LANCHOR65
+	ble	.L1274
+.L1246:
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	adrp	x28, .LANCHOR62
+	add	x28, x28, :lo12:.LANCHOR62
 	mov	w27, 0
 	mov	w22, 0
 	ldrh	w26, [x0, 580]
-	ldr	x0, [x25, #:lo12:.LANCHOR100]
+	ldr	x0, [x25, #:lo12:.LANCHOR97]
 	ldrh	w0, [x0, 134]
 	str	w0, [x29, 152]
-	adrp	x0, .LANCHOR2
-	add	x0, x0, :lo12:.LANCHOR2
+	adrp	x0, .LANCHOR6
+	add	x0, x0, :lo12:.LANCHOR6
 	str	x0, [x29, 136]
-	adrp	x0, .LANCHOR139
-	add	x0, x0, :lo12:.LANCHOR139
+	adrp	x0, .LANCHOR140
+	add	x0, x0, :lo12:.LANCHOR140
 	str	x0, [x29, 128]
-.L1215:
+.L1248:
 	ldr	x0, [x29, 136]
 	ldr	w1, [x29, 152]
 	ldrh	w0, [x0]
 	cmp	w1, w0
-	bcc	.L1225
-.L1224:
-	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	bcc	.L1258
+.L1257:
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	str	w26, [x0, 580]
-.L1214:
-	cbz	w21, .L1227
-	ldr	x2, [x25, #:lo12:.LANCHOR100]
-	adrp	x0, .LANCHOR2
-	ldrh	w5, [x0, #:lo12:.LANCHOR2]
-	ldr	x0, [x23, #:lo12:.LANCHOR3]
+.L1247:
+	cbz	w21, .L1260
+	ldr	x2, [x25, #:lo12:.LANCHOR97]
+	adrp	x0, .LANCHOR6
+	ldrh	w5, [x0, #:lo12:.LANCHOR6]
+	ldr	x0, [x23, #:lo12:.LANCHOR7]
 	ldrh	w1, [x2, 134]
 	add	x0, x0, x1, uxth 2
-.L1228:
+.L1261:
 	cmp	w1, w5
-	bcc	.L1230
+	bcc	.L1263
 	ldrh	w0, [x2, 72]
 	add	w0, w21, w0
 	strh	w0, [x2, 72]
 	ldrh	w0, [x2, 98]
 	cmp	w21, w0
-	bcs	.L1227
+	bcs	.L1260
 	sub	w21, w0, w21
 	strh	w21, [x2, 98]
-.L1227:
-	cbz	w20, .L1233
-	ldr	x2, [x25, #:lo12:.LANCHOR100]
-	adrp	x0, .LANCHOR2
-	ldrh	w6, [x0, #:lo12:.LANCHOR2]
-	ldr	x0, [x23, #:lo12:.LANCHOR3]
+.L1260:
+	cbz	w20, .L1266
+	ldr	x2, [x25, #:lo12:.LANCHOR97]
+	adrp	x0, .LANCHOR6
+	ldrh	w6, [x0, #:lo12:.LANCHOR6]
+	ldr	x0, [x23, #:lo12:.LANCHOR7]
 	ldrh	w1, [x2, 134]
 	add	x0, x0, x1, uxth 2
-.L1234:
+.L1267:
 	cmp	w1, w6
-	bcc	.L1236
+	bcc	.L1269
 	ldrh	w0, [x2, 74]
 	add	w0, w20, w0
 	strh	w0, [x2, 74]
 	ldrh	w0, [x2, 96]
 	cmp	w20, w0
-	bcs	.L1233
+	bcs	.L1266
 	sub	w20, w0, w20
 	strh	w20, [x2, 96]
-.L1233:
+.L1266:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L1192
-	adrp	x2, .LANCHOR5
+	beq	.L1225
+	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR5]
+	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x1]
-	adrp	x1, .LANCHOR83
-	ldrh	w1, [x1, #:lo12:.LANCHOR83]
+	adrp	x1, .LANCHOR80
+	ldrh	w1, [x1, #:lo12:.LANCHOR80]
 	cmp	w2, w1
-	bhi	.L1192
+	bhi	.L1225
 	add	w22, w22, 1
 	mov	w2, 1
 	mov	w1, 0
 	bl	gc_add_sblk
-.L1192:
+.L1225:
 	add	w0, w22, w27
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -7256,53 +7395,53 @@ gc_static_wearleveling:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L1202:
+.L1235:
 	uxtw	x7, w24
-	ldr	x6, [x23, #:lo12:.LANCHOR3]
+	ldr	x6, [x23, #:lo12:.LANCHOR7]
 	lsl	x2, x7, 2
 	add	x11, x6, x2
 	ldrb	w0, [x11, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L1194
+	beq	.L1227
 	ubfx	x4, x0, 3, 2
-	tbz	x4, 0, .L1195
+	tbz	x4, 0, .L1228
 	ldr	w0, [x6, x2]
 	ldrh	w1, [x6, x2]
 	ubfx	x0, x0, 11, 8
 	and	w1, w1, 2047
-.L1196:
+.L1229:
 	ldr	w3, [x29, 148]
 	add	w27, w27, 1
 	and	w27, w27, 65535
 	cmp	w20, w1
 	add	w3, w3, w1
 	str	w3, [x29, 148]
-	bls	.L1239
-	ldr	x3, [x19, #:lo12:.LANCHOR6]
+	bls	.L1272
+	ldr	x3, [x19, #:lo12:.LANCHOR10]
 	mov	w20, w1
 	strh	w24, [x3, 586]
-.L1239:
+.L1272:
 	ldr	w3, [x29, 156]
 	cmp	w3, w1
-	bcs	.L1199
+	bcs	.L1232
 	str	w24, [x29, 128]
 	str	w1, [x29, 156]
-.L1199:
+.L1232:
 	mov	w3, 65535
 	cmp	w0, w3
-	bne	.L1198
-.L1200:
+	bne	.L1231
+.L1233:
 	cmp	w0, 9
 	ccmp	w1, 9, 0, hi
-	bhi	.L1194
+	bhi	.L1227
 	ldr	w0, [x8]
-	tbz	x0, 8, .L1194
-	adrp	x0, .LANCHOR5
+	tbz	x0, 8, .L1227
+	adrp	x0, .LANCHOR9
 	ldr	w3, [x6, x2]
 	ldrh	w2, [x6, x2]
 	mov	w1, w24
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrb	w6, [x11, 3]
 	ubfx	x3, x3, 11, 8
 	ldrb	w5, [x11, 2]
@@ -7314,73 +7453,73 @@ gc_static_wearleveling:
 	add	x0, x0, :lo12:.LC73
 	bl	printf
 	ldp	x8, x10, [x29, 112]
-.L1194:
+.L1227:
 	add	w24, w24, 1
 	and	w24, w24, 65535
-	b	.L1193
-.L1195:
+	b	.L1226
+.L1228:
 	tst	w0, 24
-	bne	.L1197
+	bne	.L1230
 	ldrh	w1, [x6, x2]
 	mov	w0, 65535
 	and	w1, w1, 2047
-	b	.L1196
-.L1197:
+	b	.L1229
+.L1230:
 	ldr	w0, [x6, x2]
 	mov	w1, 65535
 	ubfx	x0, x0, 11, 8
-.L1198:
+.L1231:
 	ldr	w3, [x29, 152]
 	add	w28, w28, 1
 	and	w28, w28, 65535
 	cmp	w21, w0
 	add	w3, w3, w0
 	str	w3, [x29, 152]
-	bls	.L1201
-	ldr	x3, [x19, #:lo12:.LANCHOR6]
+	bls	.L1234
+	ldr	x3, [x19, #:lo12:.LANCHOR10]
 	mov	w21, w0
 	strh	w24, [x3, 584]
-.L1201:
+.L1234:
 	cmp	w22, w0
-	bcs	.L1200
+	bcs	.L1233
 	mov	w22, w0
 	str	w24, [x29, 136]
-	b	.L1200
-.L1205:
+	b	.L1233
+.L1238:
 	tst	w0, 224
-	bne	.L1204
-	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	bne	.L1237
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w1, 65535
 	ldrh	w2, [x0, 590]
 	cmp	w2, w1
-	bne	.L1204
+	bne	.L1237
 	ldrh	w0, [x0, 586]
 	bl	zftl_remove_free_node
-	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldrh	w1, [x0, 586]
 	strh	w1, [x0, 590]
 	mov	w1, -1
 	strh	w1, [x0, 586]
-	b	.L1204
-.L1208:
+	b	.L1237
+.L1241:
 	tst	w0, 224
-	bne	.L1207
-	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	bne	.L1240
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w1, 65535
 	ldrh	w2, [x0, 588]
 	cmp	w2, w1
-	bne	.L1207
+	bne	.L1240
 	ldrh	w0, [x0, 584]
 	bl	zftl_remove_free_node
-	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldrh	w1, [x0, 584]
 	strh	w1, [x0, 588]
 	mov	w1, -1
 	strh	w1, [x0, 584]
-	b	.L1207
-.L1225:
+	b	.L1240
+.L1258:
 	add	w7, w26, 1
-	ldr	x4, [x23, #:lo12:.LANCHOR3]
+	ldr	x4, [x23, #:lo12:.LANCHOR7]
 	and	w26, w7, 65535
 	cmp	w0, w26
 	csel	w26, w26, wzr, hi
@@ -7389,32 +7528,32 @@ gc_static_wearleveling:
 	add	x0, x4, x3
 	ldrb	w0, [x0, 2]
 	tst	w0, 192
-	beq	.L1217
+	beq	.L1250
 	and	w2, w0, 224
 	cmp	w2, 224
-	beq	.L1217
+	beq	.L1250
 	ubfx	x0, x0, 3, 2
 	and	w1, w0, 1
-	tbz	x0, 0, .L1218
+	tbz	x0, 0, .L1251
 	cmp	w2, 160
-.L1305:
-	bne	.L1220
-	adrp	x0, .LANCHOR138
+.L1338:
+	bne	.L1253
+	adrp	x0, .LANCHOR139
 	ldr	w2, [x29, 148]
-	ldrh	w0, [x0, #:lo12:.LANCHOR138]
+	ldrh	w0, [x0, #:lo12:.LANCHOR139]
 	cmp	w2, w0
-	ble	.L1221
+	ble	.L1254
 	ldr	w0, [x4, x3]
 	add	w2, w21, 2
 	ubfx	x0, x0, 11, 8
 	cmp	w0, w2
-	ble	.L1222
-	cbz	w1, .L1221
+	ble	.L1255
+	cbz	w1, .L1254
 	ldrh	w0, [x4, x3]
 	and	w0, w0, 2047
 	cmp	w0, w20
-	bgt	.L1221
-.L1222:
+	bgt	.L1254
+.L1255:
 	stp	x4, x8, [x29, 104]
 	mov	w2, 1
 	str	x3, [x29, 120]
@@ -7423,16 +7562,16 @@ gc_static_wearleveling:
 	bl	gc_add_sblk
 	mov	w0, 1
 	strh	w0, [x28, 318]
-	ldr	w0, [x24, #:lo12:.LANCHOR9]
+	ldr	w0, [x24, #:lo12:.LANCHOR14]
 	add	w22, w22, 1
 	ldp	x4, x8, [x29, 104]
 	ldr	x3, [x29, 120]
-	tbz	x0, 10, .L1221
-	adrp	x0, .LANCHOR5
+	tbz	x0, 10, .L1254
+	adrp	x0, .LANCHOR9
 	ldr	w6, [x4, x3]
 	ldrh	w5, [x4, x3]
-	ldr	x1, [x0, #:lo12:.LANCHOR5]
-	ldr	x0, [x23, #:lo12:.LANCHOR3]
+	ldr	x1, [x0, #:lo12:.LANCHOR9]
+	ldr	x0, [x23, #:lo12:.LANCHOR7]
 	ubfx	x6, x6, 11, 8
 	ldrh	w4, [x28, 56]
 	and	w5, w5, 2047
@@ -7443,40 +7582,40 @@ gc_static_wearleveling:
 	ldrh	w3, [x1, x8, lsl 1]
 	mov	w1, w26
 	ubfx	x2, x2, 5, 3
-.L1306:
+.L1339:
 	bl	printf
-.L1221:
+.L1254:
 	cmp	w22, 4
 	ccmp	w27, 4, 2, ls
-	bhi	.L1224
-.L1217:
+	bhi	.L1257
+.L1250:
 	ldr	w0, [x29, 152]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	str	w0, [x29, 152]
-	b	.L1215
-.L1218:
+	b	.L1248
+.L1251:
 	cmp	w0, 2
-	b	.L1305
-.L1220:
+	b	.L1338
+.L1253:
 	ldr	x2, [x29, 128]
 	ldr	w0, [x29, 156]
 	sub	w0, w0, w20
 	ldrh	w2, [x2]
 	cmp	w0, w2
-	ble	.L1221
+	ble	.L1254
 	ldrh	w0, [x4, x3]
 	add	w2, w20, 2
 	and	w0, w0, 2047
 	cmp	w0, w2
-	ble	.L1223
-	cbz	w1, .L1221
+	ble	.L1256
+	cbz	w1, .L1254
 	ldr	w0, [x4, x3]
 	add	w1, w21, 2
 	ubfx	x0, x0, 11, 8
 	cmp	w0, w1
-	bgt	.L1221
-.L1223:
+	bgt	.L1254
+.L1256:
 	stp	x4, x8, [x29, 104]
 	mov	w2, 1
 	str	x3, [x29, 120]
@@ -7485,16 +7624,16 @@ gc_static_wearleveling:
 	bl	gc_add_sblk
 	mov	w0, 1
 	strh	w0, [x28, 318]
-	ldr	w0, [x24, #:lo12:.LANCHOR9]
+	ldr	w0, [x24, #:lo12:.LANCHOR14]
 	add	w27, w27, 1
 	ldp	x4, x8, [x29, 104]
 	ldr	x3, [x29, 120]
-	tbz	x0, 10, .L1221
-	adrp	x0, .LANCHOR5
+	tbz	x0, 10, .L1254
+	adrp	x0, .LANCHOR9
 	ldr	w6, [x4, x3]
 	ldrh	w5, [x4, x3]
-	ldr	x1, [x0, #:lo12:.LANCHOR5]
-	ldr	x0, [x23, #:lo12:.LANCHOR3]
+	ldr	x1, [x0, #:lo12:.LANCHOR9]
+	ldr	x0, [x23, #:lo12:.LANCHOR7]
 	ubfx	x6, x6, 11, 8
 	and	w5, w5, 2047
 	ldrh	w4, [x28, 56]
@@ -7505,48 +7644,48 @@ gc_static_wearleveling:
 	ldrh	w3, [x1, x8, lsl 1]
 	mov	w1, w26
 	ubfx	x2, x2, 5, 3
-	b	.L1306
-.L1241:
+	b	.L1339
+.L1274:
 	mov	w27, 0
 	mov	w22, 0
-	b	.L1214
-.L1230:
+	b	.L1247
+.L1263:
 	ldr	w3, [x0]
 	ubfx	x4, x3, 11, 8
 	cmp	w21, w4
-	bhi	.L1229
+	bhi	.L1262
 	ldrb	w6, [x0, 2]
 	tst	w6, 24
-	beq	.L1229
+	beq	.L1262
 	sub	w4, w4, w21
 	bfi	w3, w4, 11, 8
 	str	w3, [x0]
-.L1229:
+.L1262:
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 65535
-	b	.L1228
-.L1236:
+	b	.L1261
+.L1269:
 	ldrh	w3, [x0]
 	and	w4, w3, 2047
 	cmp	w4, w20
-	blt	.L1235
+	blt	.L1268
 	ldrb	w5, [x0, 2]
 	and	w5, w5, 24
 	cmp	w5, 16
-	beq	.L1235
+	beq	.L1268
 	sub	w4, w4, w20
 	bfi	w3, w4, 0, 11
 	strh	w3, [x0]
-.L1235:
+.L1268:
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 65535
-	b	.L1234
-.L1240:
+	b	.L1267
+.L1273:
 	mov	w27, 0
 	mov	w22, 0
-	b	.L1192
+	b	.L1225
 	.size	gc_static_wearleveling, .-gc_static_wearleveling
 	.section	.text.zftl_sblk_list_init,"ax",@progbits
 	.align	2
@@ -7558,59 +7697,59 @@ zftl_sblk_list_init:
 	mov	w1, 0
 	add	x29, sp, 0
 	stp	x27, x28, [sp, 80]
-	adrp	x27, .LANCHOR2
-	adrp	x28, .LANCHOR0
+	adrp	x27, .LANCHOR6
+	adrp	x28, .LANCHOR4
 	stp	x19, x20, [sp, 16]
-	ldrh	w2, [x27, #:lo12:.LANCHOR2]
-	adrp	x20, .LANCHOR90
+	ldrh	w2, [x27, #:lo12:.LANCHOR6]
+	adrp	x20, .LANCHOR87
 	stp	x21, x22, [sp, 32]
-	adrp	x19, .LANCHOR86
+	adrp	x19, .LANCHOR83
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR97
+	adrp	x22, .LANCHOR94
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR100
+	adrp	x25, .LANCHOR97
 	mul	w2, w2, w0
-	ldr	x0, [x28, #:lo12:.LANCHOR0]
-	adrp	x24, .LANCHOR93
-	adrp	x23, .LANCHOR95
-	adrp	x21, .LANCHOR88
+	ldr	x0, [x28, #:lo12:.LANCHOR4]
+	adrp	x24, .LANCHOR90
+	adrp	x23, .LANCHOR92
+	adrp	x21, .LANCHOR85
 	bl	ftl_memset
 	str	x28, [x29, 168]
-	adrp	x0, .LANCHOR99
-	adrp	x2, .LANCHOR76
-	adrp	x3, .LANCHOR75
+	adrp	x0, .LANCHOR96
+	adrp	x2, .LANCHOR73
+	adrp	x3, .LANCHOR72
 	mov	w1, 16
-	strh	w1, [x0, #:lo12:.LANCHOR99]
-	adrp	x10, .LANCHOR94
-	ldrb	w0, [x2, #:lo12:.LANCHOR76]
-	adrp	x8, .LANCHOR96
-	ldrh	w1, [x3, #:lo12:.LANCHOR75]
-	adrp	x7, .LANCHOR98
-	adrp	x6, .LANCHOR79
-	adrp	x5, .LANCHOR8
-	adrp	x4, .LANCHOR78
-	str	xzr, [x10, #:lo12:.LANCHOR94]
-	str	xzr, [x8, #:lo12:.LANCHOR96]
-	adrp	x28, .LANCHOR3
+	strh	w1, [x0, #:lo12:.LANCHOR96]
+	adrp	x10, .LANCHOR91
+	ldrb	w0, [x2, #:lo12:.LANCHOR73]
+	adrp	x8, .LANCHOR93
+	ldrh	w1, [x3, #:lo12:.LANCHOR72]
+	adrp	x7, .LANCHOR95
+	adrp	x6, .LANCHOR76
+	adrp	x5, .LANCHOR12
+	adrp	x4, .LANCHOR75
+	str	xzr, [x10, #:lo12:.LANCHOR91]
+	str	xzr, [x8, #:lo12:.LANCHOR93]
+	adrp	x28, .LANCHOR7
 	mul	w1, w0, w1
 	mov	w0, 32768
-	str	xzr, [x7, #:lo12:.LANCHOR98]
-	str	xzr, [x6, #:lo12:.LANCHOR79]
-	str	xzr, [x5, #:lo12:.LANCHOR8]
+	str	xzr, [x7, #:lo12:.LANCHOR95]
+	str	xzr, [x6, #:lo12:.LANCHOR76]
+	str	xzr, [x5, #:lo12:.LANCHOR12]
 	sdiv	w0, w0, w1
-	str	xzr, [x4, #:lo12:.LANCHOR78]
-	strh	wzr, [x24, #:lo12:.LANCHOR93]
-	strh	wzr, [x23, #:lo12:.LANCHOR95]
-	strh	wzr, [x22, #:lo12:.LANCHOR97]
+	str	xzr, [x4, #:lo12:.LANCHOR75]
+	strh	wzr, [x24, #:lo12:.LANCHOR90]
+	strh	wzr, [x23, #:lo12:.LANCHOR92]
+	strh	wzr, [x22, #:lo12:.LANCHOR94]
 	sxth	w0, w0
 	str	w0, [x29, 188]
-	ldr	x0, [x25, #:lo12:.LANCHOR100]
-	strh	wzr, [x21, #:lo12:.LANCHOR88]
-	strh	wzr, [x20, #:lo12:.LANCHOR90]
-	strh	wzr, [x19, #:lo12:.LANCHOR86]
+	ldr	x0, [x25, #:lo12:.LANCHOR97]
+	strh	wzr, [x21, #:lo12:.LANCHOR85]
+	strh	wzr, [x20, #:lo12:.LANCHOR87]
+	strh	wzr, [x19, #:lo12:.LANCHOR83]
 	strh	wzr, [x0, 146]
 	ldrsh	w26, [x0, 134]
-	add	x0, x27, :lo12:.LANCHOR2
+	add	x0, x27, :lo12:.LANCHOR6
 	adrp	x27, .LC82
 	add	x27, x27, :lo12:.LC82
 	stp	x3, x2, [x29, 104]
@@ -7618,24 +7757,24 @@ zftl_sblk_list_init:
 	stp	x6, x7, [x29, 136]
 	stp	x8, x10, [x29, 152]
 	str	x0, [x29, 176]
-.L1308:
+.L1341:
 	ldr	x0, [x29, 176]
 	ldrh	w0, [x0]
 	cmp	w26, w0
-	blt	.L1324
-	ldr	x0, [x25, #:lo12:.LANCHOR100]
-	ldrh	w1, [x24, #:lo12:.LANCHOR93]
+	blt	.L1357
+	ldr	x0, [x25, #:lo12:.LANCHOR97]
+	ldrh	w1, [x24, #:lo12:.LANCHOR90]
 	ldp	x25, x26, [sp, 64]
 	strh	w1, [x0, 114]
-	ldrh	w1, [x23, #:lo12:.LANCHOR95]
+	ldrh	w1, [x23, #:lo12:.LANCHOR92]
 	strh	w1, [x0, 118]
-	ldrh	w1, [x22, #:lo12:.LANCHOR97]
+	ldrh	w1, [x22, #:lo12:.LANCHOR94]
 	strh	w1, [x0, 116]
-	ldrh	w1, [x21, #:lo12:.LANCHOR88]
+	ldrh	w1, [x21, #:lo12:.LANCHOR85]
 	strh	w1, [x0, 122]
-	ldrh	w1, [x20, #:lo12:.LANCHOR90]
+	ldrh	w1, [x20, #:lo12:.LANCHOR87]
 	strh	w1, [x0, 120]
-	ldrh	w1, [x19, #:lo12:.LANCHOR86]
+	ldrh	w1, [x19, #:lo12:.LANCHOR83]
 	strh	w1, [x0, 124]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -7643,32 +7782,32 @@ zftl_sblk_list_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L1324:
-	ldr	x4, [x28, #:lo12:.LANCHOR3]
+.L1357:
+	ldr	x4, [x28, #:lo12:.LANCHOR7]
 	sxtw	x2, w26
 	add	x4, x4, x2, lsl 2
 	ldrb	w6, [x4, 3]
-	cbz	w6, .L1325
+	cbz	w6, .L1358
 	ldr	x0, [x29, 112]
 	mov	w1, 0
-	ldr	x7, [x25, #:lo12:.LANCHOR100]
-	ldrb	w8, [x0, #:lo12:.LANCHOR76]
+	ldr	x7, [x25, #:lo12:.LANCHOR97]
+	ldrb	w8, [x0, #:lo12:.LANCHOR73]
 	ldr	x0, [x29, 104]
-	ldrh	w10, [x0, #:lo12:.LANCHOR75]
+	ldrh	w10, [x0, #:lo12:.LANCHOR72]
 	mov	w0, 0
-.L1310:
+.L1343:
 	cmp	w1, w8
-	blt	.L1313
-	cbz	w0, .L1314
+	blt	.L1346
+	cbz	w0, .L1347
 	mov	w1, 32768
 	sdiv	w0, w1, w0
 	add	w0, w0, 1
 	sxth	w0, w0
-.L1309:
+.L1342:
 	ldr	x3, [x29, 168]
 	mov	w1, 6
 	smull	x1, w26, w1
-	ldr	x5, [x3, #:lo12:.LANCHOR0]
+	ldr	x5, [x3, #:lo12:.LANCHOR4]
 	add	x6, x5, x1
 	strh	w0, [x6, 4]
 	mov	w0, -1
@@ -7679,120 +7818,120 @@ zftl_sblk_list_init:
 	and	w0, w1, 224
 	cmp	w0, 32
 	ccmp	w0, w5, 4, ne
-	beq	.L1315
-	adrp	x5, .LANCHOR6
-	ldr	x5, [x5, #:lo12:.LANCHOR6]
+	beq	.L1348
+	adrp	x5, .LANCHOR10
+	ldr	x5, [x5, #:lo12:.LANCHOR10]
 	ldrh	w6, [x5, 16]
 	cmp	w26, w6
-	beq	.L1315
+	beq	.L1348
 	ldrh	w6, [x5, 48]
 	cmp	w26, w6
-	beq	.L1315
+	beq	.L1348
 	ldrh	w5, [x5, 80]
 	cmp	w26, w5
-	beq	.L1315
+	beq	.L1348
 	cmp	w0, 64
-	bne	.L1316
+	bne	.L1349
 	ldr	x0, [x29, 128]
-	add	x2, x21, :lo12:.LANCHOR88
+	add	x2, x21, :lo12:.LANCHOR85
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR8
-.L1328:
+	add	x0, x0, :lo12:.LANCHOR12
+.L1361:
 	bl	_insert_data_list
-.L1315:
+.L1348:
 	add	w3, w26, 1
 	sxth	w26, w3
-	b	.L1308
-.L1313:
+	b	.L1341
+.L1346:
 	asr	w5, w6, w1
-	tbnz	x5, 0, .L1311
+	tbnz	x5, 0, .L1344
 	add	w0, w10, w0
 	sxth	w0, w0
-.L1312:
+.L1345:
 	add	w1, w1, 1
-	b	.L1310
-.L1311:
+	b	.L1343
+.L1344:
 	ldrh	w5, [x7, 146]
 	add	w5, w5, 1
 	strh	w5, [x7, 146]
-	b	.L1312
-.L1314:
+	b	.L1345
+.L1347:
 	ldrb	w1, [x4, 2]
 	mov	w5, -1
 	orr	w1, w1, -32
 	strb	w1, [x4, 2]
-	adrp	x1, .LANCHOR5
-	ldr	x1, [x1, #:lo12:.LANCHOR5]
+	adrp	x1, .LANCHOR9
+	ldr	x1, [x1, #:lo12:.LANCHOR9]
 	strh	w5, [x1, x2, lsl 1]
-	b	.L1309
-.L1325:
+	b	.L1342
+.L1358:
 	ldr	w0, [x29, 188]
-	b	.L1309
-.L1316:
+	b	.L1342
+.L1349:
 	cmp	w0, 96
-	bne	.L1317
+	bne	.L1350
 	ldr	x0, [x29, 136]
-	add	x2, x19, :lo12:.LANCHOR86
+	add	x2, x19, :lo12:.LANCHOR83
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR79
-	b	.L1328
-.L1317:
+	add	x0, x0, :lo12:.LANCHOR76
+	b	.L1361
+.L1350:
 	cmp	w0, 160
-	bne	.L1318
+	bne	.L1351
 	ldr	x0, [x29, 120]
-	add	x2, x20, :lo12:.LANCHOR90
+	add	x2, x20, :lo12:.LANCHOR87
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR78
-	b	.L1328
-.L1318:
-	cbnz	w0, .L1315
-	adrp	x0, .LANCHOR5
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	add	x0, x0, :lo12:.LANCHOR75
+	b	.L1361
+.L1351:
+	cbnz	w0, .L1348
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w2, [x0, x2, lsl 1]
-	cbz	w2, .L1319
+	cbz	w2, .L1352
 	str	x4, [x29, 96]
 	mov	w1, w26
 	mov	x0, x27
 	bl	printf
 	ldr	x4, [x29, 96]
 	ldrb	w0, [x4, 2]
-	tbz	x0, 4, .L1320
+	tbz	x0, 4, .L1353
 	mov	w1, 5
-.L1327:
+.L1360:
 	bfi	w0, w1, 5, 3
 	strb	w0, [x4, 2]
 	mov	w2, 0
 	mov	w1, 1
 	mov	w0, w26
 	bl	gc_add_sblk
-	b	.L1315
-.L1320:
+	b	.L1348
+.L1353:
 	mov	w1, 2
-	b	.L1327
-.L1319:
+	b	.L1360
+.L1352:
 	ands	w1, w1, 24
-	bne	.L1322
+	bne	.L1355
 	ldr	x0, [x29, 160]
-	add	x2, x24, :lo12:.LANCHOR93
+	add	x2, x24, :lo12:.LANCHOR90
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR94
-.L1329:
+	add	x0, x0, :lo12:.LANCHOR91
+.L1362:
 	bl	_insert_free_list
-	b	.L1315
-.L1322:
+	b	.L1348
+.L1355:
 	cmp	w1, 16
-	bne	.L1323
+	bne	.L1356
 	ldr	x0, [x29, 152]
-	add	x2, x23, :lo12:.LANCHOR95
+	add	x2, x23, :lo12:.LANCHOR92
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR96
-	b	.L1329
-.L1323:
+	add	x0, x0, :lo12:.LANCHOR93
+	b	.L1362
+.L1356:
 	ldr	x0, [x29, 144]
-	add	x2, x22, :lo12:.LANCHOR97
+	add	x2, x22, :lo12:.LANCHOR94
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR98
-	b	.L1329
+	add	x0, x0, :lo12:.LANCHOR95
+	b	.L1362
 	.size	zftl_sblk_list_init, .-zftl_sblk_list_init
 	.section	.text.ftl_open_sblk_init,"ax",@progbits
 	.align	2
@@ -7802,19 +7941,19 @@ ftl_open_sblk_init:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR76
+	adrp	x20, .LANCHOR73
 	stp	x21, x22, [sp, 32]
 	mov	x19, x0
 	stp	x23, x24, [sp, 48]
 	adrp	x21, .LC70
-	adrp	x23, .LANCHOR83
+	adrp	x23, .LANCHOR80
 	mov	w22, w1
-	add	x23, x23, :lo12:.LANCHOR83
-	add	x20, x20, :lo12:.LANCHOR76
+	add	x23, x23, :lo12:.LANCHOR80
+	add	x20, x20, :lo12:.LANCHOR73
 	add	x21, x21, :lo12:.LC70
 	stp	x25, x26, [sp, 64]
-.L1331:
-.L1334:
+.L1364:
+.L1367:
 	mov	w0, w22
 	bl	ftl_alloc_sblk
 	mov	w1, 0
@@ -7834,40 +7973,40 @@ ftl_open_sblk_init:
 	strh	w0, [x19, 6]
 	strh	wzr, [x19, 10]
 	strb	w22, [x19, 4]
-	beq	.L1335
+	beq	.L1368
 	ldrb	w0, [x20]
 	mul	w0, w1, w0
 	and	w0, w0, 65535
-.L1332:
+.L1365:
 	ldrb	w2, [x20]
-	adrp	x26, .LANCHOR5
+	adrp	x26, .LANCHOR9
 	strh	w0, [x19, 12]
 	ubfiz	x25, x24, 1, 16
 	mul	w2, w2, w1
-	adrp	x1, .LANCHOR114
-	ldr	x3, [x1, #:lo12:.LANCHOR114]
+	adrp	x1, .LANCHOR111
+	ldr	x3, [x1, #:lo12:.LANCHOR111]
 	mov	w1, 255
 	lsl	w2, w2, 2
 	add	x0, x3, x0, uxth 2
 	bl	ftl_memset
-	ldr	x0, [x26, #:lo12:.LANCHOR5]
+	ldr	x0, [x26, #:lo12:.LANCHOR9]
 	ldrh	w1, [x19, 6]
 	strh	w1, [x0, x25]
 	ldrb	w0, [x19, 9]
-	cbnz	w0, .L1330
+	cbnz	w0, .L1363
 	mov	w1, w24
 	mov	x0, x21
 	bl	printf
-	ldr	x0, [x26, #:lo12:.LANCHOR5]
+	ldr	x0, [x26, #:lo12:.LANCHOR9]
 	mov	w1, -1
 	strh	w1, [x0, x25]
 	mov	w0, 7
 	strb	w0, [x19, 4]
-	b	.L1334
-.L1335:
+	b	.L1367
+.L1368:
 	mov	w0, 0
-	b	.L1332
-.L1330:
+	b	.L1365
+.L1363:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -7883,34 +8022,34 @@ pm_free_sblk:
 	stp	x29, x30, [sp, -368]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR140
+	adrp	x20, .LANCHOR141
 	stp	x21, x22, [sp, 32]
-	ldrh	w0, [x20, #:lo12:.LANCHOR140]
+	ldrh	w0, [x20, #:lo12:.LANCHOR141]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w0, 128
 	stp	x27, x28, [sp, 80]
-	bls	.L1338
-	adrp	x1, .LANCHOR141
+	bls	.L1371
+	adrp	x1, .LANCHOR142
 	adrp	x0, .LC0
 	mov	w2, 78
-	add	x1, x1, :lo12:.LANCHOR141
+	add	x1, x1, :lo12:.LANCHOR142
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1338:
+.L1371:
 	add	x28, x29, 112
 	mov	w2, 256
 	mov	w1, 0
 	mov	x0, x28
 	bl	ftl_memset
-	adrp	x23, .LANCHOR101
-	adrp	x5, .LANCHOR100
-	adrp	x0, .LANCHOR102
+	adrp	x23, .LANCHOR98
+	adrp	x5, .LANCHOR97
+	adrp	x0, .LANCHOR99
 	mov	w2, 21
-	ldrb	w12, [x23, #:lo12:.LANCHOR101]
-	ldr	x7, [x5, #:lo12:.LANCHOR100]
-	ldrh	w11, [x0, #:lo12:.LANCHOR102]
-	ldrh	w13, [x20, #:lo12:.LANCHOR140]
+	ldrb	w12, [x23, #:lo12:.LANCHOR98]
+	ldr	x7, [x5, #:lo12:.LANCHOR97]
+	ldrh	w11, [x0, #:lo12:.LANCHOR99]
+	ldrh	w13, [x20, #:lo12:.LANCHOR141]
 	add	x4, x7, 704
 	sub	w0, w2, w11
 	mov	w2, 1
@@ -7919,26 +8058,26 @@ pm_free_sblk:
 	sub	w2, w2, #1
 	add	x1, x1, 176
 	add	x1, x7, x1, lsl 2
-.L1339:
+.L1372:
 	cmp	x4, x1
-	bne	.L1343
-	adrp	x24, .LANCHOR76
-	adrp	x25, .LANCHOR83
-	adrp	x26, .LANCHOR9
+	bne	.L1376
+	adrp	x24, .LANCHOR73
+	adrp	x25, .LANCHOR80
+	adrp	x26, .LANCHOR14
 	adrp	x27, .LC83
-	ldrb	w22, [x24, #:lo12:.LANCHOR76]
-	add	x20, x20, :lo12:.LANCHOR140
-	ldrh	w0, [x25, #:lo12:.LANCHOR83]
-	add	x26, x26, :lo12:.LANCHOR9
+	ldrb	w22, [x24, #:lo12:.LANCHOR73]
+	add	x20, x20, :lo12:.LANCHOR141
+	ldrh	w0, [x25, #:lo12:.LANCHOR80]
+	add	x26, x26, :lo12:.LANCHOR14
 	add	x27, x27, :lo12:.LC83
 	mov	w19, 0
 	str	wzr, [x29, 108]
 	mul	w22, w22, w0
 	and	w22, w22, 65535
-.L1344:
+.L1377:
 	ldrh	w0, [x20]
 	cmp	w0, w19
-	bhi	.L1350
+	bhi	.L1383
 	ldr	w0, [x29, 108]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -7947,7 +8086,7 @@ pm_free_sblk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 368
 	ret
-.L1343:
+.L1376:
 	ldr	w0, [x4]
 	add	x8, x7, 416
 	mov	x3, 0
@@ -7955,47 +8094,47 @@ pm_free_sblk:
 	and	w0, w0, w2
 	udiv	w0, w0, w12
 	and	w0, w0, 65535
-.L1340:
+.L1373:
 	cmp	w13, w3, uxth
-	bhi	.L1342
+	bhi	.L1375
 	add	x4, x4, 4
-	b	.L1339
-.L1342:
+	b	.L1372
+.L1375:
 	ldrh	w10, [x8]
 	cmp	w10, w0
-	bne	.L1341
+	bne	.L1374
 	ldrh	w10, [x28, x3, lsl 1]
 	add	w10, w10, 1
 	strh	w10, [x28, x3, lsl 1]
-.L1341:
+.L1374:
 	add	x3, x3, 1
 	add	x8, x8, 2
-	b	.L1340
-.L1350:
-	ldr	x1, [x5, #:lo12:.LANCHOR100]
+	b	.L1373
+.L1383:
+	ldr	x1, [x5, #:lo12:.LANCHOR97]
 	sxtw	x21, w19
 	add	x0, x21, 208
-	ldrb	w2, [x23, #:lo12:.LANCHOR101]
+	ldrb	w2, [x23, #:lo12:.LANCHOR98]
 	ldrh	w3, [x1, x0, lsl 1]
 	ldrh	w0, [x1, 692]
 	sdiv	w0, w0, w2
 	cmp	w0, w3
-	bne	.L1345
-	ldrb	w0, [x24, #:lo12:.LANCHOR76]
-	ldrh	w2, [x25, #:lo12:.LANCHOR83]
+	bne	.L1378
+	ldrb	w0, [x24, #:lo12:.LANCHOR73]
+	ldrh	w2, [x25, #:lo12:.LANCHOR80]
 	mul	w0, w0, w2
 	strh	w0, [x28, x21, lsl 1]
-.L1345:
+.L1378:
 	ldrh	w0, [x28, x21, lsl 1]
 	cmp	w22, w0
-	bls	.L1346
-	cbnz	w0, .L1351
-.L1348:
+	bls	.L1379
+	cbnz	w0, .L1384
+.L1381:
 	mov	w0, 65535
 	cmp	w3, w0
-	beq	.L1347
+	beq	.L1380
 	ldr	w0, [x26]
-	tbz	x0, 12, .L1349
+	tbz	x0, 12, .L1382
 	ldrh	w4, [x1, 688]
 	mov	w2, 0
 	str	x5, [x29, 96]
@@ -8003,30 +8142,30 @@ pm_free_sblk:
 	mov	x0, x27
 	bl	printf
 	ldr	x5, [x29, 96]
-.L1349:
-	ldr	x0, [x5, #:lo12:.LANCHOR100]
+.L1382:
+	ldr	x0, [x5, #:lo12:.LANCHOR97]
 	add	x21, x21, 208
 	str	x5, [x29, 96]
 	ldrh	w0, [x0, x21, lsl 1]
 	bl	ftl_free_sblk
 	ldr	x5, [x29, 96]
 	mov	w1, -1
-	ldr	x0, [x5, #:lo12:.LANCHOR100]
+	ldr	x0, [x5, #:lo12:.LANCHOR97]
 	strh	w1, [x0, x21, lsl 1]
 	ldrh	w1, [x0, 688]
 	sub	w1, w1, #1
 	strh	w1, [x0, 688]
-	b	.L1347
-.L1346:
-	cbz	w0, .L1348
-.L1347:
+	b	.L1380
+.L1379:
+	cbz	w0, .L1381
+.L1380:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1344
-.L1351:
+	b	.L1377
+.L1384:
 	mov	w22, w0
 	str	w19, [x29, 108]
-	b	.L1347
+	b	.L1380
 	.size	pm_free_sblk, .-pm_free_sblk
 	.section	.text.idb_init,"ax",@progbits
 	.align	2
@@ -8058,24 +8197,24 @@ ftl_memcpy:
 	.type	flash_into_data_init, %function
 flash_into_data_init:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR9
+	adrp	x0, .LANCHOR14
 	add	x29, sp, 0
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	str	x19, [sp, 16]
-	tbz	x0, 12, .L1360
-	adrp	x2, .LANCHOR142
+	tbz	x0, 12, .L1393
+	adrp	x2, .LANCHOR143
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR142
+	add	x2, x2, :lo12:.LANCHOR143
 	mov	w1, 100
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L1360:
-	adrp	x19, .LANCHOR22
+.L1393:
+	adrp	x19, .LANCHOR26
 	mov	w2, 2048
 	mov	w1, 0
-	ldr	x0, [x19, #:lo12:.LANCHOR22]
+	ldr	x0, [x19, #:lo12:.LANCHOR26]
 	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR22]
+	ldr	x0, [x19, #:lo12:.LANCHOR26]
 	mov	w1, 21321
 	movk	w1, 0x5359, lsl 16
 	mov	w2, 32
@@ -8085,10 +8224,10 @@ flash_into_data_init:
 	str	w1, [x0, -72]
 	mov	w1, 1
 	strh	w1, [x0, -64]
-	adrp	x1, .LANCHOR15
-	add	x1, x1, :lo12:.LANCHOR15
+	adrp	x1, .LANCHOR19
+	add	x1, x1, :lo12:.LANCHOR19
 	bl	ftl_memcpy
-	ldr	x0, [x19, #:lo12:.LANCHOR22]
+	ldr	x0, [x19, #:lo12:.LANCHOR26]
 	mov	w2, 32
 	ldr	x19, [sp, 16]
 	adrp	x1, .LANCHOR34
@@ -8103,15 +8242,15 @@ flash_into_data_init:
 	.type	ftl_memcpy32, %function
 ftl_memcpy32:
 	mov	x3, 0
-.L1366:
+.L1399:
 	cmp	w2, w3
-	bhi	.L1367
+	bhi	.L1400
 	ret
-.L1367:
+.L1400:
 	ldr	w4, [x1, x3, lsl 2]
 	str	w4, [x0, x3, lsl 2]
 	add	x3, x3, 1
-	b	.L1366
+	b	.L1399
 	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.ftl_memcmp,"ax",@progbits
 	.align	2
@@ -8147,54 +8286,58 @@ nandc_init:
 	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR9
+	adrp	x21, .LANCHOR14
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	ldr	w0, [x21, #:lo12:.LANCHOR9]
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
 	str	wzr, [x29, 56]
-	tbz	x0, 12, .L1372
-	adrp	x1, .LANCHOR143
+	tbz	x0, 12, .L1405
+	adrp	x1, .LANCHOR144
 	adrp	x0, .LC85
 	mov	x2, x19
-	add	x1, x1, :lo12:.LANCHOR143
+	add	x1, x1, :lo12:.LANCHOR144
 	add	x0, x0, :lo12:.LC85
 	bl	printf
-.L1372:
-	adrp	x20, .LANCHOR24
+.L1405:
+	adrp	x20, .LANCHOR27
 	mov	w0, 6
 	ldr	w2, [x19, 352]
 	mov	w1, 12336
-	strb	w0, [x20, #:lo12:.LANCHOR24]
-	adrp	x0, .LANCHOR23
+	strb	w0, [x20, #:lo12:.LANCHOR27]
+	adrp	x0, .LANCHOR13
 	movk	w1, 0x5638, lsl 16
 	mov	x22, x0
-	str	x19, [x0, #:lo12:.LANCHOR23]
+	str	x19, [x0, #:lo12:.LANCHOR13]
 	cmp	w2, w1
-	bne	.L1373
+	bne	.L1406
 	mov	w0, 8
-	strb	w0, [x20, #:lo12:.LANCHOR24]
-.L1373:
+	strb	w0, [x20, #:lo12:.LANCHOR27]
+.L1406:
 	ldr	w1, [x19, 128]
 	mov	w0, 12336
 	movk	w0, 0x5639, lsl 16
 	cmp	w1, w0
-	bne	.L1374
+	bne	.L1407
 	mov	w0, 9
-	strb	w0, [x20, #:lo12:.LANCHOR24]
-.L1374:
-	ldrb	w0, [x20, #:lo12:.LANCHOR24]
+	strb	w0, [x20, #:lo12:.LANCHOR27]
+.L1407:
+	ldrb	w0, [x20, #:lo12:.LANCHOR27]
 	cmp	w0, 9
-	adrp	x0, .LANCHOR43
-	bne	.L1375
+	adrp	x0, .LANCHOR44
+	bne	.L1408
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR43]
+	strb	w1, [x0, #:lo12:.LANCHOR44]
 	ldr	w0, [x29, 56]
+	mov	w1, 2
 	orr	w0, w0, 256
 	str	w0, [x29, 56]
 	ldr	w0, [x29, 56]
+	bfi	w0, w1, 18, 3
+	str	w0, [x29, 56]
+	ldr	w0, [x29, 56]
 	str	w0, [x19]
 	str	wzr, [x19, 520]
-	mov	w0, 4225
+	mov	w0, 4161
 	str	w0, [x19, 4]
 	mov	w0, 8321
 	str	w0, [x19, 8]
@@ -8205,45 +8348,49 @@ nandc_init:
 	str	w0, [x19, 84]
 	mov	w0, 39
 	str	w0, [x19, 84]
-	ldr	w0, [x21, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L1377
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L1410
 	ldr	w1, [x19]
 	ldr	w2, [x19, 8]
 	ldr	w3, [x19, 80]
 	ldr	w4, [x19, 84]
 	ldr	w5, [x19, 88]
-.L1390:
+.L1423:
 	adrp	x0, .LC86
 	add	x0, x0, :lo12:.LC86
 	bl	printf
-.L1377:
-	adrp	x0, .LANCHOR44
+.L1410:
+	adrp	x0, .LANCHOR45
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR44]
-	adrp	x0, .LANCHOR46
-	strh	wzr, [x0, #:lo12:.LANCHOR46]
-	adrp	x0, .LANCHOR42
-	strb	wzr, [x0, #:lo12:.LANCHOR42]
-	ldr	w0, [x21, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L1371
-	ldrb	w1, [x20, #:lo12:.LANCHOR24]
+	strb	w1, [x0, #:lo12:.LANCHOR45]
+	adrp	x0, .LANCHOR47
+	strh	wzr, [x0, #:lo12:.LANCHOR47]
+	adrp	x0, .LANCHOR43
+	strb	wzr, [x0, #:lo12:.LANCHOR43]
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L1404
+	ldrb	w1, [x20, #:lo12:.LANCHOR27]
 	adrp	x0, .LC87
 	add	x0, x0, :lo12:.LC87
 	bl	printf
-.L1371:
+.L1404:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1375:
-	strb	wzr, [x0, #:lo12:.LANCHOR43]
+.L1408:
+	strb	wzr, [x0, #:lo12:.LANCHOR44]
+	mov	w1, 1
 	ldr	w0, [x29, 56]
 	orr	w0, w0, 256
 	str	w0, [x29, 56]
 	ldr	w0, [x29, 56]
+	bfi	w0, w1, 24, 3
+	str	w0, [x29, 56]
+	ldr	w0, [x29, 56]
 	str	w0, [x19]
 	str	wzr, [x19, 336]
-	mov	w0, 4225
+	mov	w0, 4193
 	str	w0, [x19, 4]
 	mov	w0, 8321
 	str	w0, [x19, 344]
@@ -8256,17 +8403,17 @@ nandc_init:
 	str	w0, [x19, 308]
 	mov	w0, 2048
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR45
-	str	x0, [x1, #:lo12:.LANCHOR45]
-	ldr	w0, [x21, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L1377
-	ldr	x0, [x22, #:lo12:.LANCHOR23]
+	adrp	x1, .LANCHOR46
+	str	x0, [x1, #:lo12:.LANCHOR46]
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L1410
+	ldr	x0, [x22, #:lo12:.LANCHOR13]
 	ldr	w1, [x0]
 	ldr	w2, [x0, 344]
 	ldr	w3, [x0, 304]
 	ldr	w4, [x0, 308]
 	ldr	w5, [x0, 312]
-	b	.L1390
+	b	.L1423
 	.size	nandc_init, .-nandc_init
 	.section	.text.buf_init,"ax",@progbits
 	.align	2
@@ -8274,16 +8421,16 @@ nandc_init:
 	.type	buf_init, %function
 buf_init:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LANCHOR48
+	adrp	x0, .LANCHOR49
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	add	x19, x0, :lo12:.LANCHOR48
+	add	x19, x0, :lo12:.LANCHOR49
 	stp	x21, x22, [sp, 32]
 	mov	x20, x0
-	adrp	x22, .LANCHOR123
-	add	x22, x22, :lo12:.LANCHOR123
+	adrp	x22, .LANCHOR121
+	add	x22, x22, :lo12:.LANCHOR121
 	mov	w21, 0
-.L1392:
+.L1425:
 	and	w0, w21, 255
 	strb	w0, [x19, 1]
 	add	w1, w0, 1
@@ -8301,15 +8448,15 @@ buf_init:
 	bl	ftl_malloc
 	str	x0, [x19, -40]
 	cmp	w21, 32
-	bne	.L1392
-	add	x0, x20, :lo12:.LANCHOR48
+	bne	.L1425
+	add	x0, x20, :lo12:.LANCHOR49
 	mov	w1, -1
 	strb	w1, [x0, 1984]
-	adrp	x0, .LANCHOR49
-	strb	wzr, [x0, #:lo12:.LANCHOR49]
 	adrp	x0, .LANCHOR50
+	strb	wzr, [x0, #:lo12:.LANCHOR50]
+	adrp	x0, .LANCHOR51
 	ldp	x19, x20, [sp, 16]
-	strb	w21, [x0, #:lo12:.LANCHOR50]
+	strb	w21, [x0, #:lo12:.LANCHOR51]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
@@ -8320,91 +8467,91 @@ buf_init:
 	.type	gc_init, %function
 gc_init:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR74
+	adrp	x0, .LANCHOR71
 	mov	w2, 328
 	mov	w1, 0
 	add	x29, sp, 0
-	strb	wzr, [x0, #:lo12:.LANCHOR74]
-	adrp	x0, .LANCHOR144
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR65
-	strb	wzr, [x0, #:lo12:.LANCHOR144]
+	strb	wzr, [x0, #:lo12:.LANCHOR71]
 	adrp	x0, .LANCHOR145
-	add	x19, x20, :lo12:.LANCHOR65
-	str	wzr, [x0, #:lo12:.LANCHOR145]
-	adrp	x0, .LANCHOR85
-	strh	wzr, [x0, #:lo12:.LANCHOR85]
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR62
+	strb	wzr, [x0, #:lo12:.LANCHOR145]
+	adrp	x0, .LANCHOR146
+	add	x19, x20, :lo12:.LANCHOR62
+	str	wzr, [x0, #:lo12:.LANCHOR146]
+	adrp	x0, .LANCHOR82
+	strh	wzr, [x0, #:lo12:.LANCHOR82]
 	mov	x0, x19
 	bl	ftl_memset
 	str	xzr, [x19, 8]
 	mov	w0, -1
-	strh	w0, [x20, #:lo12:.LANCHOR65]
-	adrp	x0, .LANCHOR83
-	adrp	x4, .LANCHOR92
-	adrp	x20, .LANCHOR75
-	ldrh	w1, [x0, #:lo12:.LANCHOR83]
+	strh	w0, [x20, #:lo12:.LANCHOR62]
+	adrp	x0, .LANCHOR80
+	adrp	x4, .LANCHOR89
+	adrp	x20, .LANCHOR72
+	ldrh	w1, [x0, #:lo12:.LANCHOR80]
 	lsr	w2, w1, 1
 	lsr	w0, w1, 2
 	strh	w2, [x19, 38]
-	adrp	x2, .LANCHOR84
-	strh	w0, [x19, 36]
-	adrp	x19, .LANCHOR76
-	strh	wzr, [x2, #:lo12:.LANCHOR84]
-	adrp	x2, .LANCHOR80
-	ldrb	w3, [x19, #:lo12:.LANCHOR76]
-	strh	wzr, [x2, #:lo12:.LANCHOR80]
 	adrp	x2, .LANCHOR81
+	strh	w0, [x19, 36]
+	adrp	x19, .LANCHOR73
 	strh	wzr, [x2, #:lo12:.LANCHOR81]
+	adrp	x2, .LANCHOR77
+	ldrb	w3, [x19, #:lo12:.LANCHOR73]
+	strh	wzr, [x2, #:lo12:.LANCHOR77]
+	adrp	x2, .LANCHOR78
+	strh	wzr, [x2, #:lo12:.LANCHOR78]
 	mul	w2, w1, w3
 	and	w2, w2, 65535
 	sub	w5, w2, #32
-	strh	w5, [x4, #:lo12:.LANCHOR92]
-	adrp	x4, .LANCHOR89
-	strh	w2, [x4, #:lo12:.LANCHOR89]
-	adrp	x2, .LANCHOR82
-	strh	w1, [x2, #:lo12:.LANCHOR82]
-	adrp	x1, .LANCHOR64
-	strh	w0, [x1, #:lo12:.LANCHOR64]
-	ldrh	w0, [x20, #:lo12:.LANCHOR75]
+	strh	w5, [x4, #:lo12:.LANCHOR89]
+	adrp	x4, .LANCHOR86
+	strh	w2, [x4, #:lo12:.LANCHOR86]
+	adrp	x2, .LANCHOR79
+	strh	w1, [x2, #:lo12:.LANCHOR79]
+	adrp	x1, .LANCHOR61
+	strh	w0, [x1, #:lo12:.LANCHOR61]
+	ldrh	w0, [x20, #:lo12:.LANCHOR72]
 	mul	w0, w0, w3
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR146
-	str	x0, [x1, #:lo12:.LANCHOR146]
-	ldrb	w1, [x19, #:lo12:.LANCHOR76]
-	ldrh	w0, [x20, #:lo12:.LANCHOR75]
+	adrp	x1, .LANCHOR147
+	str	x0, [x1, #:lo12:.LANCHOR147]
+	ldrb	w1, [x19, #:lo12:.LANCHOR73]
+	ldrh	w0, [x20, #:lo12:.LANCHOR72]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR147
-	str	x0, [x1, #:lo12:.LANCHOR147]
-	ldrh	w1, [x20, #:lo12:.LANCHOR75]
-	ldrb	w0, [x19, #:lo12:.LANCHOR76]
+	adrp	x1, .LANCHOR148
+	str	x0, [x1, #:lo12:.LANCHOR148]
+	ldrh	w1, [x20, #:lo12:.LANCHOR72]
+	ldrb	w0, [x19, #:lo12:.LANCHOR73]
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR72
-	str	x0, [x1, #:lo12:.LANCHOR72]
-	ldrb	w1, [x19, #:lo12:.LANCHOR76]
-	ldrh	w0, [x20, #:lo12:.LANCHOR75]
+	adrp	x1, .LANCHOR69
+	str	x0, [x1, #:lo12:.LANCHOR69]
+	ldrb	w1, [x19, #:lo12:.LANCHOR73]
+	ldrh	w0, [x20, #:lo12:.LANCHOR72]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR68
-	str	x0, [x1, #:lo12:.LANCHOR68]
-	ldrb	w1, [x19, #:lo12:.LANCHOR76]
-	ldrh	w0, [x20, #:lo12:.LANCHOR75]
+	adrp	x1, .LANCHOR65
+	str	x0, [x1, #:lo12:.LANCHOR65]
+	ldrb	w1, [x19, #:lo12:.LANCHOR73]
+	ldrh	w0, [x20, #:lo12:.LANCHOR72]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR148
+	adrp	x1, .LANCHOR149
 	ldp	x19, x20, [sp, 16]
-	str	x0, [x1, #:lo12:.LANCHOR148]
-	adrp	x0, .LANCHOR87
-	adrp	x1, .LANCHOR77
+	str	x0, [x1, #:lo12:.LANCHOR149]
+	adrp	x0, .LANCHOR84
+	adrp	x1, .LANCHOR74
 	ldp	x29, x30, [sp], 32
-	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	ldrh	w0, [x0, #:lo12:.LANCHOR84]
 	lsr	w0, w0, 2
-	strh	w0, [x1, #:lo12:.LANCHOR77]
+	strh	w0, [x1, #:lo12:.LANCHOR74]
 	ret
 	.size	gc_init, .-gc_init
 	.section	.text.ftl_free,"ax",@progbits
@@ -8423,18 +8570,18 @@ js_hash:
 	mov	w0, 42982
 	mov	x3, 0
 	movk	w0, 0x47c6, lsl 16
-.L1399:
+.L1432:
 	cmp	w1, w3
-	bhi	.L1400
+	bhi	.L1433
 	ret
-.L1400:
+.L1433:
 	lsr	w2, w0, 2
 	ldrb	w5, [x4, x3]
 	add	w2, w2, w0, lsl 5
 	add	x3, x3, 1
 	add	w2, w2, w5
 	eor	w0, w0, w2
-	b	.L1399
+	b	.L1432
 	.size	js_hash, .-js_hash
 	.section	.text.timer_get_time,"ax",@progbits
 	.align	2
@@ -8471,8 +8618,8 @@ ftl_get_density:
 	.global	ftl_get_capacity
 	.type	ftl_get_capacity, %function
 ftl_get_capacity:
-	adrp	x0, .LANCHOR61
-	ldr	w0, [x0, #:lo12:.LANCHOR61]
+	adrp	x0, .LANCHOR58
+	ldr	w0, [x0, #:lo12:.LANCHOR58]
 	ret
 	.size	ftl_get_capacity, .-ftl_get_capacity
 	.section	.text.rknand_print_hex,"ax",@progbits
@@ -8498,9 +8645,9 @@ rknand_print_hex:
 	mov	x19, 0
 	mov	w20, 0
 	adrp	x27, .LC90
-.L1407:
+.L1440:
 	cmp	x25, x19
-	bne	.L1413
+	bne	.L1446
 	ldp	x19, x20, [sp, 16]
 	adrp	x1, .LC90
 	ldp	x21, x22, [sp, 32]
@@ -8512,38 +8659,38 @@ rknand_print_hex:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	printf
-.L1413:
-	cbnz	w20, .L1408
+.L1446:
+	cbnz	w20, .L1441
 	mov	w2, w19
 	mov	x1, x26
 	mov	x0, x23
 	bl	printf
-.L1408:
+.L1441:
 	cmp	w24, 4
-	bne	.L1409
+	bne	.L1442
 	ldr	w1, [x22, x19, lsl 2]
-.L1415:
+.L1448:
 	mov	x0, x21
 	add	w20, w20, 1
 	bl	printf
 	cmp	w20, 15
-	bls	.L1412
+	bls	.L1445
 	mov	w20, 0
 	add	x1, x27, :lo12:.LC90
 	adrp	x0, .LC91
 	add	x0, x0, :lo12:.LC91
 	bl	printf
-.L1412:
+.L1445:
 	add	x19, x19, 1
-	b	.L1407
-.L1409:
+	b	.L1440
+.L1442:
 	cmp	w24, 2
-	bne	.L1411
+	bne	.L1444
 	ldrsh	w1, [x22, x19, lsl 1]
-	b	.L1415
-.L1411:
+	b	.L1448
+.L1444:
 	ldrb	w1, [x22, x19]
-	b	.L1415
+	b	.L1448
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.hynix_get_read_retry_default,"ax",@progbits
 	.align	2
@@ -8557,9 +8704,9 @@ hynix_get_read_retry_default:
 	stp	x27, x28, [sp, 80]
 	stp	x21, x22, [sp, 32]
 	str	w0, [x29, 140]
-	adrp	x0, .LANCHOR22
+	adrp	x0, .LANCHOR26
 	stp	x19, x20, [sp, 16]
-	ldr	x28, [x0, #:lo12:.LANCHOR22]
+	ldr	x28, [x0, #:lo12:.LANCHOR26]
 	stp	x23, x24, [sp, 48]
 	add	x0, x28, 112
 	str	x0, [x29, 112]
@@ -8575,43 +8722,43 @@ hynix_get_read_retry_default:
 	cmp	w3, 2
 	strb	w1, [x28, 130]
 	strb	w0, [x28, 131]
-	bne	.L1417
+	bne	.L1450
 	mov	w0, -89
 	strb	w0, [x28, 128]
-	adrp	x0, .LANCHOR149+17
+	adrp	x0, .LANCHOR150+17
 	mov	w1, -9
-	strb	w1, [x0, #:lo12:.LANCHOR149+17]
-.L1472:
+	strb	w1, [x0, #:lo12:.LANCHOR150+17]
+.L1505:
 	mov	w0, 7
-	b	.L1507
-.L1417:
+	b	.L1540
+.L1450:
 	ldr	w3, [x29, 140]
 	cmp	w3, 3
-	bne	.L1419
+	bne	.L1452
 	mov	x6, 0
-.L1420:
+.L1453:
 	sub	w0, w6, #80
 	strb	w0, [x22, x6]
 	add	x6, x6, 1
 	cmp	x6, 8
-	bne	.L1420
+	bne	.L1453
 	stp	w6, w6, [x29, 132]
-.L1418:
+.L1451:
 	ldr	w0, [x29, 140]
 	sub	w0, w0, #1
 	cmp	w0, 1
-	bhi	.L1425
-	adrp	x7, .LANCHOR14
-	adrp	x11, .LANCHOR26
-	add	x24, x7, :lo12:.LANCHOR14
-	add	x25, x11, :lo12:.LANCHOR26
+	bhi	.L1458
+	adrp	x7, .LANCHOR18
+	adrp	x11, .LANCHOR29
+	add	x24, x7, :lo12:.LANCHOR18
+	add	x25, x11, :lo12:.LANCHOR29
 	mov	w20, 0
 	mov	w26, 55
-.L1426:
+.L1459:
 	ldrb	w0, [x24]
 	cmp	w0, w20
-	bhi	.L1432
-.L1433:
+	bhi	.L1465
+.L1466:
 	ldr	x0, [x29, 112]
 	ldrb	w1, [x29, 136]
 	strb	w1, [x0, 1]
@@ -8624,10 +8771,10 @@ hynix_get_read_retry_default:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1419:
+.L1452:
 	ldr	w3, [x29, 140]
 	cmp	w3, 4
-	bne	.L1421
+	bne	.L1454
 	mov	w3, -52
 	strb	w3, [x28, 128]
 	mov	w3, -65
@@ -8643,13 +8790,13 @@ hynix_get_read_retry_default:
 	strb	w3, [x28, 132]
 	strb	w1, [x28, 134]
 	str	w0, [x29, 132]
-.L1508:
+.L1541:
 	str	w0, [x29, 136]
-	b	.L1418
-.L1421:
+	b	.L1451
+.L1454:
 	ldr	w0, [x29, 140]
 	cmp	w0, 5
-	bne	.L1422
+	bne	.L1455
 	mov	w0, 56
 	strb	w0, [x28, 128]
 	mov	w0, 57
@@ -8659,14 +8806,14 @@ hynix_get_read_retry_default:
 	mov	w0, 59
 	strb	w0, [x28, 131]
 	mov	w0, 8
-.L1507:
+.L1540:
 	str	w0, [x29, 132]
 	mov	w0, 4
-	b	.L1508
-.L1422:
+	b	.L1541
+.L1455:
 	ldr	w0, [x29, 140]
 	cmp	w0, 6
-	bne	.L1423
+	bne	.L1456
 	mov	w0, 14
 	strb	w0, [x28, 128]
 	mov	w0, 15
@@ -8676,18 +8823,18 @@ hynix_get_read_retry_default:
 	mov	w0, 17
 	strb	w0, [x28, 131]
 	mov	w0, 12
-	b	.L1507
-.L1423:
+	b	.L1540
+.L1456:
 	ldr	w0, [x29, 140]
 	cmp	w0, 7
-	bne	.L1472
+	bne	.L1505
 	mov	x0, 0
-.L1424:
+.L1457:
 	sub	w1, w0, #80
 	strb	w1, [x22, x0]
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L1424
+	bne	.L1457
 	mov	w0, -44
 	strb	w0, [x28, 136]
 	mov	w0, -43
@@ -8695,8 +8842,8 @@ hynix_get_read_retry_default:
 	mov	w0, 12
 	str	w0, [x29, 132]
 	mov	w0, 10
-	b	.L1508
-.L1432:
+	b	.L1541
+.L1465:
 	ldrb	w0, [x25, w20, sxtw]
 	mov	x1, 32
 	mov	w2, 160
@@ -8705,10 +8852,10 @@ hynix_get_read_retry_default:
 	ldr	x1, [x29, 112]
 	ubfiz	x0, x0, 8, 8
 	add	x19, x1, x2
-	adrp	x1, .LANCHOR23
-	ldr	x4, [x1, #:lo12:.LANCHOR23]
+	adrp	x1, .LANCHOR13
+	ldr	x4, [x1, #:lo12:.LANCHOR13]
 	add	x23, x4, x0
-.L1427:
+.L1460:
 	str	w26, [x23, 2056]
 	ldrb	w0, [x22, x21]
 	str	w0, [x23, 2052]
@@ -8719,15 +8866,15 @@ hynix_get_read_retry_default:
 	add	x21, x21, 1
 	ldr	w0, [x29, 136]
 	cmp	w0, w21, uxtb
-	bhi	.L1427
-	adrp	x3, .LANCHOR149
-	add	x3, x3, :lo12:.LANCHOR149
+	bhi	.L1460
+	adrp	x3, .LANCHOR150
+	add	x3, x3, :lo12:.LANCHOR150
 	mov	x0, 0
-.L1430:
+.L1463:
 	add	x15, x19, x0
 	add	x14, x3, x0
 	mov	x1, 1
-.L1429:
+.L1462:
 	lsl	x4, x1, 2
 	lsl	x16, x1, 3
 	ldrb	w17, [x19, x0]
@@ -8736,10 +8883,10 @@ hynix_get_read_retry_default:
 	ldrb	w4, [x14, x4]
 	add	w4, w4, w17
 	strb	w4, [x15, x16]
-	bne	.L1429
+	bne	.L1462
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L1430
+	bne	.L1463
 	add	w5, w20, 1
 	strb	wzr, [x19, 16]
 	strb	wzr, [x19, 24]
@@ -8749,15 +8896,15 @@ hynix_get_read_retry_default:
 	strb	wzr, [x19, 48]
 	strb	wzr, [x19, 41]
 	strb	wzr, [x19, 49]
-	b	.L1426
-.L1425:
+	b	.L1459
+.L1458:
 	ldr	w0, [x29, 140]
 	sub	w0, w0, #3
 	cmp	w0, 4
-	bhi	.L1433
+	bhi	.L1466
 	ldp	w0, w1, [x29, 132]
-	adrp	x19, .LANCHOR14
-	add	x19, x19, :lo12:.LANCHOR14
+	adrp	x19, .LANCHOR18
+	add	x19, x19, :lo12:.LANCHOR18
 	sub	w13, w1, #1
 	mul	w15, w0, w1
 	and	x13, x13, 255
@@ -8772,14 +8919,14 @@ hynix_get_read_retry_default:
 	sub	w20, w0, #5
 	add	x0, x13, 1
 	str	x0, [x29, 96]
-.L1434:
+.L1467:
 	ldrb	w0, [x19]
 	ldr	w1, [x29, 128]
 	cmp	w0, w1
-	bls	.L1433
+	bls	.L1466
 	ldr	w1, [x29, 128]
-	adrp	x0, .LANCHOR26
-	add	x0, x0, :lo12:.LANCHOR26
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
 	mov	w10, 160
 	mov	w23, 255
 	ldrb	w4, [x0, w1, sxtw]
@@ -8789,8 +8936,8 @@ hynix_get_read_retry_default:
 	ubfiz	x4, x4, 8, 8
 	add	x0, x0, x10
 	str	x0, [x29, 104]
-	adrp	x0, .LANCHOR23
-	ldr	x0, [x0, #:lo12:.LANCHOR23]
+	adrp	x0, .LANCHOR13
+	ldr	x0, [x0, #:lo12:.LANCHOR13]
 	add	x27, x0, x4
 	str	w23, [x27, 2056]
 	bl	nandc_wait_flash_ready
@@ -8798,22 +8945,22 @@ hynix_get_read_retry_default:
 	str	w0, [x27, 2056]
 	ldr	w0, [x29, 140]
 	cmp	w0, 4
-	bne	.L1435
+	bne	.L1468
 	mov	w0, 64
 	str	w23, [x27, 2052]
 	str	w0, [x27, 2048]
 	mov	w0, 204
-.L1509:
+.L1542:
 	str	w0, [x27, 2052]
 	mov	w0, 77
-	b	.L1510
-.L1435:
+	b	.L1543
+.L1468:
 	cmp	w20, 1
-	bhi	.L1437
+	bhi	.L1470
 	ldrb	w0, [x28, 128]
 	str	w0, [x27, 2052]
 	mov	w0, 82
-.L1510:
+.L1543:
 	str	w0, [x27, 2048]
 	mov	w0, 22
 	str	w0, [x27, 2056]
@@ -8828,10 +8975,10 @@ hynix_get_read_retry_default:
 	ldr	w0, [x29, 140]
 	str	wzr, [x27, 2052]
 	cmp	w0, 6
-	bne	.L1438
+	bne	.L1471
 	mov	w0, 31
 	str	w0, [x27, 2052]
-.L1439:
+.L1472:
 	mov	w23, 2
 	str	w23, [x27, 2052]
 	str	wzr, [x27, 2052]
@@ -8839,122 +8986,122 @@ hynix_get_read_retry_default:
 	str	w0, [x27, 2056]
 	bl	nandc_wait_flash_ready
 	cmp	w20, 1
-	bls	.L1473
+	bls	.L1506
 	ldr	w0, [x29, 140]
 	cmp	w0, 7
 	mov	w0, 32
 	csel	w23, w23, w0, ne
-.L1440:
-	adrp	x3, .LANCHOR150
+.L1473:
+	adrp	x3, .LANCHOR151
 	mov	x1, 0
-	ldr	x0, [x3, #:lo12:.LANCHOR150]
-.L1441:
+	ldr	x0, [x3, #:lo12:.LANCHOR151]
+.L1474:
 	ldr	w2, [x27, 2048]
 	strb	w2, [x0, x1]
 	add	x1, x1, 1
 	cmp	w23, w1, uxtb
-	bhi	.L1441
+	bhi	.L1474
 	ldr	w1, [x29, 140]
 	cmp	w1, 7
-	bne	.L1442
+	bne	.L1475
 	mov	w1, 0
-.L1444:
+.L1477:
 	ldrb	w2, [x0]
 	cmp	w2, 12
-	beq	.L1443
+	beq	.L1476
 	ldrb	w2, [x0, 1]
 	cmp	w2, 10
-	beq	.L1443
+	beq	.L1476
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 255
 	cmp	w1, 8
-	bne	.L1444
-.L1445:
+	bne	.L1477
+.L1478:
 	adrp	x0, .LC92
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC92
 	bl	printf
-.L1447:
-	b	.L1447
-.L1437:
+.L1480:
+	b	.L1480
+.L1470:
 	mov	w0, 174
 	str	w0, [x27, 2052]
 	str	wzr, [x27, 2048]
 	mov	w0, 176
-	b	.L1509
-.L1438:
+	b	.L1542
+.L1471:
 	str	wzr, [x27, 2052]
-	b	.L1439
-.L1473:
+	b	.L1472
+.L1506:
 	mov	w23, 16
-	b	.L1440
-.L1443:
+	b	.L1473
+.L1476:
 	cmp	w1, 6
-	bhi	.L1445
-.L1446:
-	ldr	x2, [x3, #:lo12:.LANCHOR150]
+	bhi	.L1478
+.L1479:
+	ldr	x2, [x3, #:lo12:.LANCHOR151]
 	mov	x0, 0
-.L1451:
+.L1484:
 	ldr	w1, [x29, 120]
 	cmp	w1, w0
-	bgt	.L1452
-	ldr	x1, [x3, #:lo12:.LANCHOR150]
+	bgt	.L1485
+	ldr	x1, [x3, #:lo12:.LANCHOR151]
 	mov	w16, 8
 	add	x3, x1, x21
-.L1454:
+.L1487:
 	mov	x0, 0
-.L1453:
+.L1486:
 	ldr	w17, [x3, x0, lsl 2]
 	ldr	w4, [x29, 124]
 	mvn	w17, w17
 	str	w17, [x3, x0, lsl 2]
 	add	x0, x0, 1
 	cmp	w4, w0
-	bgt	.L1453
+	bgt	.L1486
 	add	x3, x3, x22, uxtw 2
 	subs	w16, w16, #1
-	bne	.L1454
+	bne	.L1487
 	mov	x17, x1
 	mov	w23, 0
 	mov	w26, 1
-.L1455:
+.L1488:
 	mov	w3, 0
 	mov	w0, 0
-.L1459:
+.L1492:
 	mov	x25, x17
 	lsl	w16, w26, w0
 	mov	w24, 16
 	mov	w30, 0
-.L1457:
+.L1490:
 	ldr	w4, [x25]
 	add	x25, x25, x21
 	bics	wzr, w16, w4
 	cinc	w30, w30, eq
 	subs	w24, w24, #1
-	bne	.L1457
+	bne	.L1490
 	cmp	w30, 9
 	orr	w16, w3, w16
 	add	w0, w0, 1
 	csel	w3, w16, w3, cs
 	cmp	w0, 32
-	bne	.L1459
+	bne	.L1492
 	ldr	w0, [x29, 124]
 	add	w23, w23, 1
 	str	w3, [x17], 4
 	cmp	w0, w23
-	bgt	.L1455
+	bgt	.L1488
 	mov	x0, 0
 	mov	w3, 0
-.L1462:
+.L1495:
 	ldr	w16, [x1, x0]
 	add	x0, x0, 4
 	cmp	w16, 0
 	cinc	w3, w3, eq
 	cmp	x0, 32
-	bne	.L1462
+	bne	.L1495
 	cmp	w3, 7
-	ble	.L1463
+	ble	.L1496
 	mov	w3, 1024
 	mov	w2, 1
 	adrp	x0, .LC93
@@ -8964,67 +9111,67 @@ hynix_get_read_retry_default:
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC92
 	bl	printf
-.L1464:
-	b	.L1464
-.L1442:
+.L1497:
+	b	.L1497
+.L1475:
 	ldr	w1, [x29, 140]
 	cmp	w1, 6
-	bne	.L1446
+	bne	.L1479
 	mov	x1, 0
-.L1448:
+.L1481:
 	ldrb	w2, [x0, x1]
 	cmp	w2, 12
-	beq	.L1446
+	beq	.L1479
 	add	x2, x0, x1
 	ldrb	w2, [x2, 8]
 	cmp	w2, 4
-	beq	.L1446
+	beq	.L1479
 	add	x1, x1, 1
 	cmp	x1, 8
-	bne	.L1448
+	bne	.L1481
 	adrp	x0, .LC92
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC92
 	bl	printf
-.L1450:
-	b	.L1450
-.L1452:
+.L1483:
+	b	.L1483
+.L1485:
 	ldr	w1, [x27, 2048]
 	strb	w1, [x2, x0]
 	add	x0, x0, 1
-	b	.L1451
-.L1463:
+	b	.L1484
+.L1496:
 	ldr	w0, [x29, 140]
 	cmp	w0, 6
-	beq	.L1475
+	beq	.L1508
 	cmp	w0, 7
 	mov	x1, 10
 	mov	x0, 8
 	csel	x0, x0, x1, ne
-.L1465:
+.L1498:
 	ldr	x10, [x29, 104]
 	mov	w3, 0
-.L1466:
+.L1499:
 	mov	x1, 0
-.L1467:
+.L1500:
 	ldrb	w16, [x2, x1]
 	ldr	w4, [x29, 136]
 	strb	w16, [x10, x1]
 	add	x1, x1, 1
 	cmp	w4, w1, uxtb
-	bhi	.L1467
+	bhi	.L1500
 	ldr	x1, [x29, 96]
 	add	w3, w3, 1
 	add	x10, x10, x0
 	add	x2, x2, x1
 	ldr	w1, [x29, 132]
 	cmp	w1, w3
-	bgt	.L1466
+	bgt	.L1499
 	mov	w23, 255
 	str	w23, [x27, 2056]
 	bl	nandc_wait_flash_ready
 	cmp	w20, 1
-	bhi	.L1469
+	bhi	.L1502
 	mov	w0, 54
 	str	w0, [x27, 2056]
 	ldrb	w0, [x28, 128]
@@ -9039,20 +9186,20 @@ hynix_get_read_retry_default:
 	str	w23, [x27, 2052]
 	str	w23, [x27, 2052]
 	str	w23, [x27, 2052]
-.L1511:
+.L1544:
 	str	w0, [x27, 2056]
 	bl	nandc_wait_flash_ready
 	ldr	w0, [x29, 128]
 	add	w11, w0, 1
 	and	w0, w11, 255
 	str	w0, [x29, 128]
-	b	.L1434
-.L1475:
+	b	.L1467
+.L1508:
 	mov	x0, 4
-	b	.L1465
-.L1469:
+	b	.L1498
+.L1502:
 	mov	w0, 56
-	b	.L1511
+	b	.L1544
 	.size	hynix_get_read_retry_default, .-hynix_get_read_retry_default
 	.section	.text.flash_get_read_retry_tbl,"ax",@progbits
 	.align	2
@@ -9064,9 +9211,9 @@ flash_get_read_retry_tbl:
 	sub	w1, w0, #1
 	and	w1, w1, 255
 	cmp	w1, 6
-	bhi	.L1512
+	bhi	.L1545
 	b	hynix_get_read_retry_default
-.L1512:
+.L1545:
 	ret
 	.size	flash_get_read_retry_tbl, .-flash_get_read_retry_tbl
 	.section	.text.nandc_xfer_done,"ax",@progbits
@@ -9075,81 +9222,81 @@ flash_get_read_retry_tbl:
 	.type	nandc_xfer_done, %function
 nandc_xfer_done:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR151
-	adrp	x1, .LANCHOR24
+	adrp	x0, .LANCHOR152
+	adrp	x1, .LANCHOR27
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR23
-	ldrb	w1, [x1, #:lo12:.LANCHOR24]
+	adrp	x19, .LANCHOR13
+	ldrb	w1, [x1, #:lo12:.LANCHOR27]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	cmp	w1, 9
-	strb	wzr, [x0, #:lo12:.LANCHOR151]
-	bne	.L1515
-	ldr	x20, [x19, #:lo12:.LANCHOR23]
+	strb	wzr, [x0, #:lo12:.LANCHOR152]
+	bne	.L1548
+	ldr	x20, [x19, #:lo12:.LANCHOR13]
 	mov	x24, x0
 	mov	w21, 0
 	ldr	w0, [x20, 16]
 	str	w0, [x29, 64]
 	ldr	w0, [x20, 48]
-	tbnz	x0, 1, .L1516
+	tbnz	x0, 1, .L1549
 	adrp	x22, .LC97
 	adrp	x23, .LC96
 	add	x22, x22, :lo12:.LC97
 	add	x23, x23, :lo12:.LC96
-.L1517:
+.L1550:
 	ldr	w0, [x29, 64]
-	tbnz	x0, 20, .L1520
-	ldr	x0, [x19, #:lo12:.LANCHOR23]
+	tbnz	x0, 20, .L1553
+	ldr	x0, [x19, #:lo12:.LANCHOR13]
 	add	w21, w21, 1
 	tst	x21, 16777215
 	ldr	w0, [x0, 16]
 	str	w0, [x29, 64]
-	bne	.L1517
+	bne	.L1550
 	ldr	w2, [x29, 64]
 	mov	w1, w21
 	ldr	w3, [x20, 64]
 	mov	x0, x22
 	ubfx	x3, x3, 16, 6
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR23]
+	ldr	x1, [x19, #:lo12:.LANCHOR13]
 	mov	w3, 64
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1517
-.L1516:
+	b	.L1550
+.L1549:
 	adrp	x22, .LC95
 	adrp	x23, .LC96
 	add	x22, x22, :lo12:.LC95
 	add	x23, x23, :lo12:.LC96
-.L1518:
+.L1551:
 	ldr	w1, [x20, 64]
 	ldr	w0, [x29, 64]
 	ubfx	x1, x1, 16, 6
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0
-	bge	.L1520
-	ldr	x0, [x19, #:lo12:.LANCHOR23]
+	bge	.L1553
+	ldr	x0, [x19, #:lo12:.LANCHOR13]
 	ldr	w0, [x0]
 	str	w0, [x29, 72]
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1519
+	tbz	x0, 13, .L1552
 	ldr	w0, [x29, 72]
-	tbz	x0, 17, .L1519
+	tbz	x0, 17, .L1552
 	ldr	w1, [x29, 72]
 	adrp	x0, .LC94
 	add	x0, x0, :lo12:.LC94
 	ubfx	x1, x1, 17, 1
-.L1552:
+.L1585:
 	bl	printf
-	b	.L1520
-.L1519:
+	b	.L1553
+.L1552:
 	ldr	w0, [x29, 64]
 	add	w21, w21, 1
 	ubfx	x0, x0, 22, 6
 	cmp	w21, w0, lsl 12
-	bne	.L1518
+	bne	.L1551
 	ldr	w2, [x20, 64]
 	mov	w1, w21
 	ldr	w3, [x29, 64]
@@ -9157,82 +9304,82 @@ nandc_xfer_done:
 	ubfx	x2, x2, 16, 5
 	ubfx	x3, x3, 22, 6
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR23]
+	ldr	x1, [x19, #:lo12:.LANCHOR13]
 	mov	x0, x23
 	mov	w3, 64
 	mov	w2, 4
 	bl	rknand_print_hex
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1518
+	tbz	x0, 13, .L1551
 	mov	w0, 1
-	strb	w0, [x24, #:lo12:.LANCHOR151]
-.L1520:
-	adrp	x0, .LANCHOR45+32
+	strb	w0, [x24, #:lo12:.LANCHOR152]
+.L1553:
+	adrp	x0, .LANCHOR46+32
 	ldp	x19, x20, [sp, 16]
-	str	wzr, [x0, #:lo12:.LANCHOR45+32]
+	str	wzr, [x0, #:lo12:.LANCHOR46+32]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1515:
-	ldr	x20, [x19, #:lo12:.LANCHOR23]
+.L1548:
+	ldr	x20, [x19, #:lo12:.LANCHOR13]
 	mov	w21, 0
 	ldr	w0, [x20, 8]
 	str	w0, [x29, 64]
 	ldr	w0, [x20, 16]
-	tbnz	x0, 1, .L1526
+	tbnz	x0, 1, .L1559
 	adrp	x22, .LC97
 	adrp	x23, .LC96
 	add	x22, x22, :lo12:.LC97
 	add	x23, x23, :lo12:.LC96
-.L1527:
+.L1560:
 	ldr	w0, [x29, 64]
-	tbnz	x0, 20, .L1520
-	ldr	x0, [x19, #:lo12:.LANCHOR23]
+	tbnz	x0, 20, .L1553
+	ldr	x0, [x19, #:lo12:.LANCHOR13]
 	add	w21, w21, 1
 	tst	x21, 16777215
 	ldr	w0, [x0, 8]
 	str	w0, [x29, 64]
-	bne	.L1527
+	bne	.L1560
 	ldr	w2, [x29, 64]
 	mov	w1, w21
 	ldr	w3, [x20, 28]
 	mov	x0, x22
 	ubfx	x3, x3, 16, 5
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR23]
+	ldr	x1, [x19, #:lo12:.LANCHOR13]
 	mov	w3, 64
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1527
-.L1526:
+	b	.L1560
+.L1559:
 	adrp	x22, .LC95
 	adrp	x23, .LC96
 	add	x22, x22, :lo12:.LC95
 	add	x23, x23, :lo12:.LC96
-.L1528:
+.L1561:
 	ldr	w1, [x20, 28]
 	ldr	w0, [x29, 64]
 	ubfx	x1, x1, 16, 5
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0
-	bge	.L1520
-	ldr	x0, [x19, #:lo12:.LANCHOR23]
+	bge	.L1553
+	ldr	x0, [x19, #:lo12:.LANCHOR13]
 	ldr	w0, [x0]
 	str	w0, [x29, 72]
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1529
+	tbz	x0, 13, .L1562
 	ldr	w0, [x29, 72]
-	tbz	x0, 17, .L1529
+	tbz	x0, 17, .L1562
 	adrp	x0, .LC98
 	ldr	w1, [x29, 72]
 	add	x0, x0, :lo12:.LC98
-	b	.L1552
-.L1529:
+	b	.L1585
+.L1562:
 	add	w21, w21, 1
 	tst	x21, 16777215
-	bne	.L1528
+	bne	.L1561
 	ldr	w2, [x20, 28]
 	mov	w1, w21
 	ldr	w3, [x29, 64]
@@ -9240,12 +9387,12 @@ nandc_xfer_done:
 	ubfx	x2, x2, 16, 5
 	ubfx	x3, x3, 22, 6
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR23]
+	ldr	x1, [x19, #:lo12:.LANCHOR13]
 	mov	w3, 64
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1528
+	b	.L1561
 	.size	nandc_xfer_done, .-nandc_xfer_done
 	.section	.text.nandc_xfer,"ax",@progbits
 	.align	2
@@ -9266,20 +9413,20 @@ nandc_xfer:
 	mov	x21, x4
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
-	cbnz	w22, .L1572
-	adrp	x0, .LANCHOR24
-	ldrb	w0, [x0, #:lo12:.LANCHOR24]
+	cbnz	w22, .L1605
+	adrp	x0, .LANCHOR27
+	ldrb	w0, [x0, #:lo12:.LANCHOR27]
 	cmp	w0, 9
-	bne	.L1555
-	adrp	x22, .LANCHOR23
+	bne	.L1588
+	adrp	x22, .LANCHOR13
 	lsr	w19, w19, 2
 	mov	w3, 1
 	mov	w2, 0
-	ldr	x5, [x22, #:lo12:.LANCHOR23]
+	ldr	x5, [x22, #:lo12:.LANCHOR13]
 	mov	w0, 0
-.L1556:
+.L1589:
 	cmp	w2, w19
-	bcc	.L1560
+	bcc	.L1593
 	ldr	w19, [x5]
 	cmp	w3, 0
 	mov	w1, 512
@@ -9288,35 +9435,35 @@ nandc_xfer:
 	movk	w1, 0x2, lsl 16
 	and	w1, w19, w1
 	cmp	w1, 139264
-	bne	.L1562
+	bne	.L1595
 	mov	w1, w19
 	adrp	x0, .LC99
 	add	x0, x0, :lo12:.LC99
 	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR23]
+	ldr	x0, [x22, #:lo12:.LANCHOR13]
 	orr	w19, w19, 131072
 	str	w19, [x0]
 	mov	w0, -1
-.L1562:
-	tbz	x19, 13, .L1563
-	adrp	x1, .LANCHOR151
-	ldrb	w1, [x1, #:lo12:.LANCHOR151]
-	cbz	w1, .L1563
+.L1595:
+	tbz	x19, 13, .L1596
+	adrp	x1, .LANCHOR152
+	ldrb	w1, [x1, #:lo12:.LANCHOR152]
+	cbz	w1, .L1596
 	mov	w1, w19
 	adrp	x0, .LC100
 	add	x0, x0, :lo12:.LC100
 	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR23]
+	ldr	x0, [x22, #:lo12:.LANCHOR13]
 	mov	w1, 1
 	str	w1, [x0, 16]
-.L1591:
+.L1624:
 	mov	w0, -1
-.L1554:
+.L1587:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1560:
+.L1593:
 	uxtw	x1, w2
 	add	x1, x1, 84
 	ldr	w1, [x5, x1, lsl 2]
@@ -9327,70 +9474,70 @@ nandc_xfer:
 	and	w1, w4, w1, lsr 10
 	and	w3, w3, w1
 	ldr	w1, [x29, 56]
-	tbnz	x1, 2, .L1574
+	tbnz	x1, 2, .L1607
 	ldr	w1, [x29, 56]
-	tbnz	x1, 18, .L1574
+	tbnz	x1, 18, .L1607
 	ldr	w4, [x29, 56]
 	ldr	w1, [x29, 56]
 	ubfx	x4, x4, 3, 7
 	ubfx	x1, x1, 19, 7
 	cmp	w4, w1
 	ldr	w1, [x29, 56]
-	ble	.L1558
+	ble	.L1591
 	ubfx	x1, x1, 3, 7
-.L1559:
+.L1592:
 	cmp	w0, w1
 	csel	w0, w0, w1, cs
-.L1557:
+.L1590:
 	add	w2, w2, 1
-	b	.L1556
-.L1558:
+	b	.L1589
+.L1591:
 	ubfx	x1, x1, 19, 7
-	b	.L1559
-.L1574:
+	b	.L1592
+.L1607:
 	mov	w0, -1
-	b	.L1557
-.L1555:
-	adrp	x0, .LANCHOR42
+	b	.L1590
+.L1588:
+	adrp	x0, .LANCHOR43
 	lsr	w4, w19, 1
 	mov	w3, 64
 	mov	w1, 1
-	ldrb	w0, [x0, #:lo12:.LANCHOR42]
+	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	mov	w2, 0
-	adrp	x6, .LANCHOR45
+	adrp	x6, .LANCHOR46
 	cmp	w0, 25
 	mov	w0, 128
 	csel	w3, w3, w0, cc
 	mov	w0, 0
-.L1565:
+.L1598:
 	add	w5, w3, w0
 	cmp	w2, w4
-	bcc	.L1566
-	adrp	x22, .LANCHOR23
+	bcc	.L1599
+	adrp	x22, .LANCHOR13
 	lsr	w19, w19, 2
 	mov	w3, 0
 	mov	w0, 0
-	ldr	x4, [x22, #:lo12:.LANCHOR23]
-.L1567:
+	ldr	x4, [x22, #:lo12:.LANCHOR13]
+.L1600:
 	cmp	w3, w19
-	bcc	.L1571
+	bcc	.L1604
 	str	wzr, [x4, 16]
 	mov	w1, 8192
 	movk	w1, 0x2, lsl 16
 	ldr	w19, [x4]
 	and	w1, w19, w1
 	cmp	w1, 139264
-	bne	.L1563
+	bne	.L1596
 	mov	w1, w19
 	adrp	x0, .LC101
 	add	x0, x0, :lo12:.LC101
 	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR23]
+	ldr	x0, [x22, #:lo12:.LANCHOR13]
 	orr	w19, w19, 131072
 	str	w19, [x0]
-	b	.L1591
-.L1566:
-	ldr	x7, [x6, #:lo12:.LANCHOR45]
+	b	.L1624
+.L1599:
+	ldr	x7, [x6, #:lo12:.LANCHOR46]
 	and	x0, x0, 4294967292
 	ldr	w0, [x7, x0]
 	lsl	w7, w2, 2
@@ -9406,16 +9553,16 @@ nandc_xfer:
 	add	w1, w1, 4
 	strb	w0, [x21, x7]
 	mov	w0, w5
-	b	.L1565
-.L1571:
+	b	.L1598
+.L1604:
 	uxtw	x1, w3
 	add	x1, x1, 8
 	ldr	w1, [x4, x1, lsl 2]
 	str	w1, [x29, 56]
 	ldr	w1, [x29, 56]
-	tbnz	x1, 2, .L1577
+	tbnz	x1, 2, .L1610
 	ldr	w1, [x29, 56]
-	tbnz	x1, 15, .L1577
+	tbnz	x1, 15, .L1610
 	ldr	w2, [x29, 56]
 	ubfx	x6, x2, 3, 5
 	ldr	w2, [x29, 56]
@@ -9428,42 +9575,42 @@ nandc_xfer:
 	orr	w1, w5, w1, lsl 5
 	cmp	w2, w1
 	ldr	w1, [x29, 56]
-	bls	.L1569
+	bls	.L1602
 	ubfx	x2, x1, 3, 5
 	ldr	w1, [x29, 56]
 	ubfx	x1, x1, 27, 1
-.L1590:
+.L1623:
 	orr	w1, w2, w1, lsl 5
 	cmp	w0, w1
 	csel	w0, w0, w1, cs
-.L1568:
+.L1601:
 	add	w3, w3, 1
-	b	.L1567
-.L1569:
+	b	.L1600
+.L1602:
 	ubfx	x2, x1, 16, 5
 	ldr	w1, [x29, 56]
 	ubfx	x1, x1, 29, 1
-	b	.L1590
-.L1577:
+	b	.L1623
+.L1610:
 	mov	w0, -1
-	b	.L1568
-.L1563:
+	b	.L1601
+.L1596:
 	cmn	w0, #1
-	beq	.L1554
+	beq	.L1587
 	ldr	w1, [x21]
 	cmn	w1, #1
-	bne	.L1554
+	bne	.L1587
 	ldr	w1, [x21, 4]
 	cmn	w1, #1
-	bne	.L1554
+	bne	.L1587
 	ldr	w1, [x20]
 	cmn	w1, #1
 	mov	w1, 512
 	csel	w0, w0, w1, ne
-	b	.L1554
-.L1572:
+	b	.L1587
+.L1605:
 	mov	w0, 0
-	b	.L1554
+	b	.L1587
 	.size	nandc_xfer, .-nandc_xfer
 	.section	.text.flash_read_page,"ax",@progbits
 	.align	2
@@ -9474,35 +9621,35 @@ flash_read_page:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	and	w21, w0, 255
-	adrp	x0, .LANCHOR23
+	adrp	x0, .LANCHOR13
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	mov	w22, w1
-	ldr	x19, [x0, #:lo12:.LANCHOR23]
-	adrp	x0, .LANCHOR9
+	ldr	x19, [x0, #:lo12:.LANCHOR13]
+	adrp	x0, .LANCHOR14
 	stp	x25, x26, [sp, 64]
 	mov	w24, w4
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	mov	x25, x2
 	mov	x26, x3
 	and	w20, w1, 2097151
 	ubfx	x23, x22, 24, 2
-	tbz	x0, 4, .L1593
+	tbz	x0, 4, .L1626
 	mov	w3, w1
 	adrp	x0, .LC102
 	mov	w2, w23
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC102
 	bl	printf
-.L1593:
+.L1626:
 	bl	nandc_wait_flash_ready
 	mov	w0, w21
 	bl	nandc_cs
-	adrp	x6, .LANCHOR11
-	cbnz	w23, .L1594
+	adrp	x6, .LANCHOR16
+	cbnz	w23, .L1627
 	mov	w0, w21
 	bl	zftl_flash_enter_slc_mode
-.L1595:
+.L1628:
 	ubfiz	x4, x21, 8, 8
 	lsr	w0, w20, 8
 	add	x4, x19, x4
@@ -9516,15 +9663,15 @@ flash_read_page:
 	str	w0, [x4, 2052]
 	mov	w0, 48
 	str	w0, [x4, 2056]
-	ldr	x0, [x6, #:lo12:.LANCHOR11]
+	ldr	x0, [x6, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1597
-	cbz	w23, .L1597
+	bne	.L1630
+	cbz	w23, .L1630
 	add	w20, w20, w20, lsl 1
 	sub	w0, w20, #1
 	add	w0, w0, w23
-.L1606:
+.L1639:
 	bl	nandc_set_seed
 	bl	nandc_wait_flash_ready
 	mov	w0, 5
@@ -9540,8 +9687,7 @@ flash_read_page:
 	mov	w0, w21
 	bl	nandc_xfer
 	mov	w2, w0
-	mov	w0, 0
-	bl	nandc_de_cs
+	bl	nandc_de_cs.constprop.29
 	mov	w0, w2
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9549,23 +9695,23 @@ flash_read_page:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1594:
-	ldr	x0, [x6, #:lo12:.LANCHOR11]
+.L1627:
+	ldr	x0, [x6, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1596
+	bne	.L1629
 	sxtw	x0, w21
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 8
 	str	w23, [x0, 8]
-	b	.L1595
-.L1596:
+	b	.L1628
+.L1629:
 	mov	w0, w21
 	bl	zftl_flash_exit_slc_mode
-	b	.L1595
-.L1597:
+	b	.L1628
+.L1630:
 	mov	w0, w20
-	b	.L1606
+	b	.L1639
 	.size	flash_read_page, .-flash_read_page
 	.section	.text.micron_read_retrial,"ax",@progbits
 	.align	2
@@ -9576,7 +9722,7 @@ micron_read_retrial:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	w24, w0, 255
-	adrp	x0, .LANCHOR42
+	adrp	x0, .LANCHOR43
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	mov	w22, w1
@@ -9584,31 +9730,31 @@ micron_read_retrial:
 	mov	x25, x2
 	stp	x27, x28, [sp, 80]
 	mov	x26, x3
-	ldrb	w20, [x0, #:lo12:.LANCHOR42]
+	ldrb	w20, [x0, #:lo12:.LANCHOR43]
 	and	x19, x24, 255
 	str	w4, [x29, 116]
 	bl	nandc_wait_flash_ready
-	adrp	x0, .LANCHOR23
+	adrp	x0, .LANCHOR13
 	mov	w21, 0
 	add	w20, w20, w20, lsl 1
 	mov	w28, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR23]
+	ldr	x0, [x0, #:lo12:.LANCHOR13]
 	asr	w20, w20, 2
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR153
-	add	x0, x0, :lo12:.LANCHOR153
+	adrp	x0, .LANCHOR154
+	add	x0, x0, :lo12:.LANCHOR154
 	str	x0, [x29, 104]
 	ldr	x0, [x29, 120]
 	add	x23, x0, x19, lsl 8
-	adrp	x0, .LANCHOR9
-	add	x0, x0, :lo12:.LANCHOR9
+	adrp	x0, .LANCHOR14
+	add	x0, x0, :lo12:.LANCHOR14
 	str	x0, [x29, 96]
-.L1608:
+.L1641:
 	ldr	x0, [x29, 104]
 	ldrb	w0, [x0]
 	cmp	w21, w0
-	bcc	.L1613
-.L1612:
+	bcc	.L1646
+.L1645:
 	ldr	x0, [x29, 120]
 	add	x19, x0, x19, lsl 8
 	mov	w0, 239
@@ -9622,14 +9768,14 @@ micron_read_retrial:
 	cmp	w28, w20
 	str	wzr, [x19, 2048]
 	str	wzr, [x19, 2048]
-	bcc	.L1614
+	bcc	.L1647
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L1614:
+.L1647:
 	cmp	w28, 256
 	ccmn	w28, #1, 4, ne
-	bne	.L1607
+	bne	.L1640
 	adrp	x0, .LC104
 	mov	w4, w28
 	mov	w3, w21
@@ -9637,7 +9783,7 @@ micron_read_retrial:
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC104
 	bl	printf
-.L1607:
+.L1640:
 	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9646,7 +9792,7 @@ micron_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1613:
+.L1646:
 	mov	w0, 239
 	str	w0, [x23, 2056]
 	mov	w0, 137
@@ -9667,7 +9813,7 @@ micron_read_retrial:
 	mov	w7, w0
 	ldr	x0, [x29, 96]
 	ldr	w0, [x0]
-	tbz	x0, 12, .L1609
+	tbz	x0, 12, .L1642
 	str	w7, [x29, 112]
 	mov	w4, w28
 	mov	w3, w21
@@ -9677,23 +9823,23 @@ micron_read_retrial:
 	add	x0, x0, :lo12:.LC103
 	bl	printf
 	ldr	w7, [x29, 112]
-.L1609:
+.L1642:
 	cmn	w7, #1
-	beq	.L1610
-	adrp	x0, .LANCHOR150
+	beq	.L1643
+	adrp	x0, .LANCHOR151
 	cmn	w28, #1
 	csel	w28, w28, w7, ne
 	cmp	w7, w20
-	ldr	x25, [x0, #:lo12:.LANCHOR150]
-	adrp	x0, .LANCHOR152
-	ldr	x26, [x0, #:lo12:.LANCHOR152]
-	bcc	.L1616
-.L1610:
+	ldr	x25, [x0, #:lo12:.LANCHOR151]
+	adrp	x0, .LANCHOR153
+	ldr	x26, [x0, #:lo12:.LANCHOR153]
+	bcc	.L1649
+.L1643:
 	mov	w21, w27
-	b	.L1608
-.L1616:
+	b	.L1641
+.L1649:
 	mov	w28, w7
-	b	.L1612
+	b	.L1645
 	.size	micron_read_retrial, .-micron_read_retrial
 	.section	.text.toshiba_3d_read_retrial,"ax",@progbits
 	.align	2
@@ -9714,15 +9860,15 @@ toshiba_3d_read_retrial:
 	mov	x27, x3
 	mov	x26, x2
 	bl	nandc_wait_flash_ready
-	adrp	x0, .LANCHOR23
-	adrp	x22, .LANCHOR19
+	adrp	x0, .LANCHOR13
+	adrp	x22, .LANCHOR23
 	mov	w1, 46
 	mov	w2, 56
-	ldr	x25, [x0, #:lo12:.LANCHOR23]
+	ldr	x25, [x0, #:lo12:.LANCHOR13]
 	and	x0, x24, 255
 	add	x21, x0, 8
 	str	x0, [x29, 128]
-	ldrb	w0, [x22, #:lo12:.LANCHOR19]
+	ldrb	w0, [x22, #:lo12:.LANCHOR23]
 	mov	w19, -1
 	add	x21, x25, x21, lsl 8
 	mov	w20, 1
@@ -9733,18 +9879,18 @@ toshiba_3d_read_retrial:
 	mov	w1, 10
 	csel	w0, w1, w0, ne
 	str	w0, [x29, 136]
-	add	x0, x22, :lo12:.LANCHOR19
-	cbnz	w4, .L1631
+	add	x0, x22, :lo12:.LANCHOR23
+	cbnz	w4, .L1664
 	str	x0, [x29, 120]
 	sxtw	x0, w24
 	add	x0, x0, 8
 	add	x0, x25, x0, lsl 8
 	str	x0, [x29, 112]
-.L1638:
+.L1671:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, 36
-	bne	.L1632
+	bne	.L1665
 	mov	w1, w20
 	mov	x0, x21
 	mov	w2, 0
@@ -9752,7 +9898,7 @@ toshiba_3d_read_retrial:
 	ldr	x1, [x29, 112]
 	mov	w0, 93
 	str	w0, [x1, 8]
-.L1633:
+.L1666:
 	mov	w4, w28
 	mov	x3, x27
 	mov	x2, x26
@@ -9760,9 +9906,9 @@ toshiba_3d_read_retrial:
 	mov	w0, w24
 	bl	flash_read_page
 	mov	w4, w0
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 4, .L1634
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 4, .L1667
 	mov	w3, w4
 	str	w4, [x29, 108]
 	mov	w2, w23
@@ -9771,51 +9917,51 @@ toshiba_3d_read_retrial:
 	add	x0, x0, :lo12:.LC105
 	bl	printf
 	ldr	w4, [x29, 108]
-.L1634:
+.L1667:
 	cmn	w4, #1
-	beq	.L1635
-	adrp	x0, .LANCHOR150
+	beq	.L1668
+	adrp	x0, .LANCHOR151
 	cmn	w19, #1
 	csel	w19, w19, w4, ne
-	ldr	x26, [x0, #:lo12:.LANCHOR150]
-	adrp	x0, .LANCHOR152
-	ldr	x27, [x0, #:lo12:.LANCHOR152]
-	adrp	x0, .LANCHOR42
-	ldrb	w0, [x0, #:lo12:.LANCHOR42]
+	ldr	x26, [x0, #:lo12:.LANCHOR151]
+	adrp	x0, .LANCHOR153
+	ldr	x27, [x0, #:lo12:.LANCHOR153]
+	adrp	x0, .LANCHOR43
+	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1653
-.L1635:
+	bcc	.L1686
+.L1668:
 	ldr	w0, [x29, 136]
 	add	w20, w20, 1
 	cmp	w0, w20
-	bne	.L1638
-.L1637:
-	ldrb	w0, [x22, #:lo12:.LANCHOR19]
+	bne	.L1671
+.L1670:
+	ldrb	w0, [x22, #:lo12:.LANCHOR23]
 	cmp	w0, 36
-	bne	.L1639
+	bne	.L1672
 	mov	w2, 0
-.L1676:
+.L1709:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_tlc_set_rr_para
-	b	.L1640
-.L1632:
+	b	.L1673
+.L1665:
 	mov	w1, w20
 	mov	x0, x21
 	bl	toshiba_3d_set_slc_rr_para
-	b	.L1633
-.L1653:
+	b	.L1666
+.L1686:
 	mov	w19, w4
-	b	.L1637
-.L1639:
+	b	.L1670
+.L1672:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_3d_set_slc_rr_para
-.L1640:
-	ldrb	w0, [x22, #:lo12:.LANCHOR19]
+.L1673:
+	ldrb	w0, [x22, #:lo12:.LANCHOR23]
 	cmp	w0, 36
-	bne	.L1649
+	bne	.L1682
 	ldr	x0, [x29, 128]
 	add	x25, x25, x0, lsl 8
 	mov	w0, 85
@@ -9824,19 +9970,19 @@ toshiba_3d_read_retrial:
 	str	wzr, [x25, 2052]
 	str	wzr, [x25, 2048]
 	str	w0, [x25, 2056]
-.L1649:
-	adrp	x0, .LANCHOR42
-	ldrb	w0, [x0, #:lo12:.LANCHOR42]
+.L1682:
+	adrp	x0, .LANCHOR43
+	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L1650
+	bcc	.L1683
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L1650:
+.L1683:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L1651
+	bne	.L1684
 	adrp	x0, .LC107
 	mov	w4, w19
 	mov	w3, w20
@@ -9844,7 +9990,7 @@ toshiba_3d_read_retrial:
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC107
 	bl	printf
-.L1651:
+.L1684:
 	bl	nandc_wait_flash_ready
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
@@ -9854,23 +10000,23 @@ toshiba_3d_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1631:
+.L1664:
 	str	x0, [x29, 112]
 	sxtw	x0, w24
 	add	x0, x0, 8
 	add	x0, x25, x0, lsl 8
 	str	x0, [x29, 136]
-.L1647:
+.L1680:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
 	cmp	w0, 36
-	bne	.L1641
+	bne	.L1674
 	mov	x0, x21
 	mov	w2, 1
 	mov	w1, w20
 	bl	toshiba_tlc_set_rr_para
 	mov	w0, 93
-.L1675:
+.L1708:
 	ldr	x1, [x29, 136]
 	mov	w4, w28
 	mov	x3, x27
@@ -9880,9 +10026,9 @@ toshiba_3d_read_retrial:
 	mov	w0, w24
 	bl	flash_read_page
 	mov	w4, w0
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 4, .L1643
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 4, .L1676
 	mov	w3, w4
 	str	w4, [x29, 108]
 	mov	w2, w23
@@ -9891,45 +10037,45 @@ toshiba_3d_read_retrial:
 	add	x0, x0, :lo12:.LC106
 	bl	printf
 	ldr	w4, [x29, 108]
-.L1643:
+.L1676:
 	cmn	w4, #1
-	beq	.L1644
-	adrp	x0, .LANCHOR150
+	beq	.L1677
+	adrp	x0, .LANCHOR151
 	cmn	w19, #1
 	csel	w19, w19, w4, ne
-	ldr	x26, [x0, #:lo12:.LANCHOR150]
-	adrp	x0, .LANCHOR152
-	ldr	x27, [x0, #:lo12:.LANCHOR152]
-	adrp	x0, .LANCHOR42
-	ldrb	w0, [x0, #:lo12:.LANCHOR42]
-	add	w0, w0, w0, lsl 1
-	cmp	w4, w0, lsr 2
-	bcc	.L1654
-.L1644:
+	ldr	x26, [x0, #:lo12:.LANCHOR151]
+	adrp	x0, .LANCHOR153
+	ldr	x27, [x0, #:lo12:.LANCHOR153]
+	adrp	x0, .LANCHOR43
+	ldrb	w0, [x0, #:lo12:.LANCHOR43]
+	add	w0, w0, w0, lsl 1
+	cmp	w4, w0, lsr 2
+	bcc	.L1687
+.L1677:
 	ldr	w0, [x29, 120]
 	add	w20, w20, 1
 	cmp	w0, w20
-	bne	.L1647
-.L1646:
-	ldrb	w0, [x22, #:lo12:.LANCHOR19]
+	bne	.L1680
+.L1679:
+	ldrb	w0, [x22, #:lo12:.LANCHOR23]
 	cmp	w0, 36
-	bne	.L1648
+	bne	.L1681
 	mov	w2, 1
-	b	.L1676
-.L1641:
+	b	.L1709
+.L1674:
 	mov	x0, x21
 	mov	w1, w20
 	bl	toshiba_3d_set_tlc_rr_para
 	mov	w0, 38
-	b	.L1675
-.L1654:
+	b	.L1708
+.L1687:
 	mov	w19, w4
-	b	.L1646
-.L1648:
+	b	.L1679
+.L1681:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_3d_set_tlc_rr_para
-	b	.L1640
+	b	.L1673
 	.size	toshiba_3d_read_retrial, .-toshiba_3d_read_retrial
 	.section	.text.toshiba_read_retrial,"ax",@progbits
 	.align	2
@@ -9949,74 +10095,74 @@ toshiba_read_retrial:
 	mov	x27, x3
 	str	w4, [x29, 116]
 	bl	nandc_wait_flash_ready
-	adrp	x0, .LANCHOR23
-	adrp	x1, .LANCHOR19
+	adrp	x0, .LANCHOR13
+	adrp	x1, .LANCHOR23
 	str	x1, [x29, 120]
-	ldr	x22, [x0, #:lo12:.LANCHOR23]
+	ldr	x22, [x0, #:lo12:.LANCHOR13]
 	and	x0, x19, 255
 	add	x21, x0, 8
 	str	x0, [x29, 104]
-	ldrb	w0, [x1, #:lo12:.LANCHOR19]
+	ldrb	w0, [x1, #:lo12:.LANCHOR23]
 	add	x21, x22, x21, lsl 8
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
-	bls	.L1695
-	adrp	x0, .LANCHOR16
-	ldrb	w0, [x0, #:lo12:.LANCHOR16]
-	cbz	w0, .L1696
+	bls	.L1728
+	adrp	x0, .LANCHOR20
+	ldrb	w0, [x0, #:lo12:.LANCHOR20]
+	cbz	w0, .L1729
 	mov	w23, 1
 	mov	w0, 1
 	bl	nandc_set_if_mode
-.L1679:
+.L1712:
 	and	x0, x19, 255
 	mov	w1, 92
 	add	x0, x22, x0, lsl 8
 	str	w1, [x0, 2056]
 	mov	w1, 197
 	str	w1, [x0, 2056]
-.L1678:
+.L1711:
 	sxtw	x0, w19
 	mov	w20, 1
 	add	x0, x0, 8
 	mov	w24, -1
 	add	x0, x22, x0, lsl 8
 	str	x0, [x29, 96]
-.L1680:
-	adrp	x0, .LANCHOR153
-	ldrb	w0, [x0, #:lo12:.LANCHOR153]
+.L1713:
+	adrp	x0, .LANCHOR154
+	ldrb	w0, [x0, #:lo12:.LANCHOR154]
 	add	w0, w0, 1
 	cmp	w20, w0
-	bcc	.L1689
+	bcc	.L1722
 	mov	w28, w24
-.L1688:
+.L1721:
 	ldr	x0, [x29, 120]
 	mov	w1, 0
-	ldrb	w0, [x0, #:lo12:.LANCHOR19]
+	ldrb	w0, [x0, #:lo12:.LANCHOR23]
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x21
-	bhi	.L1690
+	bhi	.L1723
 	bl	sandisk_set_rr_para
-.L1691:
+.L1724:
 	sxtw	x19, w19
 	mov	w0, 255
 	add	x19, x19, 8
 	add	x22, x22, x19, lsl 8
 	str	w0, [x22, 8]
-	adrp	x0, .LANCHOR42
-	ldrb	w0, [x0, #:lo12:.LANCHOR42]
+	adrp	x0, .LANCHOR43
+	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L1692
+	bcc	.L1725
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L1692:
+.L1725:
 	cmp	w28, 256
 	ccmn	w28, #1, 4, ne
-	bne	.L1693
+	bne	.L1726
 	adrp	x0, .LC107
 	mov	w4, w28
 	mov	w3, w20
@@ -10024,12 +10170,12 @@ toshiba_read_retrial:
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC107
 	bl	printf
-.L1693:
+.L1726:
 	bl	nandc_wait_flash_ready
-	cbz	w23, .L1677
+	cbz	w23, .L1710
 	mov	w0, 4
 	bl	nandc_set_if_mode
-.L1677:
+.L1710:
 	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10038,36 +10184,36 @@ toshiba_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1696:
+.L1729:
 	mov	w23, 0
-	b	.L1679
-.L1695:
+	b	.L1712
+.L1728:
 	mov	w23, 0
-	b	.L1678
-.L1689:
+	b	.L1711
+.L1722:
 	ldr	x0, [x29, 120]
 	mov	w1, w20
-	ldrb	w0, [x0, #:lo12:.LANCHOR19]
+	ldrb	w0, [x0, #:lo12:.LANCHOR23]
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x21
-	bhi	.L1681
+	bhi	.L1714
 	bl	sandisk_set_rr_para
-.L1682:
+.L1715:
 	ldr	x0, [x29, 120]
-	ldrb	w0, [x0, #:lo12:.LANCHOR19]
+	ldrb	w0, [x0, #:lo12:.LANCHOR23]
 	cmp	w0, 34
-	bne	.L1683
-	adrp	x0, .LANCHOR153
-	ldrb	w0, [x0, #:lo12:.LANCHOR153]
+	bne	.L1716
+	adrp	x0, .LANCHOR154
+	ldrb	w0, [x0, #:lo12:.LANCHOR154]
 	sub	w0, w0, #3
 	cmp	w20, w0
-	bne	.L1683
+	bne	.L1716
 	ldr	x1, [x29, 96]
 	mov	w0, 179
 	str	w0, [x1, 8]
-.L1683:
+.L1716:
 	ldr	x0, [x29, 104]
 	mov	w1, 38
 	ldr	w4, [x29, 116]
@@ -10082,27 +10228,27 @@ toshiba_read_retrial:
 	bl	flash_read_page
 	mov	w28, w0
 	cmn	w0, #1
-	beq	.L1686
+	beq	.L1719
 	cmn	w24, #1
 	csel	w24, w24, w0, ne
-	adrp	x0, .LANCHOR150
-	ldr	x26, [x0, #:lo12:.LANCHOR150]
-	adrp	x0, .LANCHOR152
-	ldr	x27, [x0, #:lo12:.LANCHOR152]
-	adrp	x0, .LANCHOR42
-	ldrb	w0, [x0, #:lo12:.LANCHOR42]
+	adrp	x0, .LANCHOR151
+	ldr	x26, [x0, #:lo12:.LANCHOR151]
+	adrp	x0, .LANCHOR153
+	ldr	x27, [x0, #:lo12:.LANCHOR153]
+	adrp	x0, .LANCHOR43
+	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L1688
-.L1686:
+	bcc	.L1721
+.L1719:
 	add	w20, w20, 1
-	b	.L1680
-.L1681:
+	b	.L1713
+.L1714:
 	bl	toshiba_set_rr_para
-	b	.L1682
-.L1690:
+	b	.L1715
+.L1723:
 	bl	toshiba_set_rr_para
-	b	.L1691
+	b	.L1724
 	.size	toshiba_read_retrial, .-toshiba_read_retrial
 	.section	.text.hynix_read_retrial,"ax",@progbits
 	.align	2
@@ -10113,11 +10259,11 @@ hynix_read_retrial:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	x23, x0, 255
-	adrp	x0, .LANCHOR22
+	adrp	x0, .LANCHOR26
 	stp	x27, x28, [sp, 80]
 	stp	x21, x22, [sp, 32]
 	mov	w27, w4
-	ldr	x28, [x0, #:lo12:.LANCHOR22]
+	ldr	x28, [x0, #:lo12:.LANCHOR26]
 	mov	w22, w1
 	stp	x25, x26, [sp, 64]
 	mov	x25, x2
@@ -10130,29 +10276,29 @@ hynix_read_retrial:
 	ldrb	w24, [x28, 2]
 	ldrb	w20, [x0, 8]
 	bl	nandc_wait_flash_ready
-	adrp	x6, .LANCHOR42
-	add	x6, x6, :lo12:.LANCHOR42
+	adrp	x6, .LANCHOR43
+	add	x6, x6, :lo12:.LANCHOR43
 	mov	w5, 0
-	adrp	x7, .LANCHOR150
-	adrp	x8, .LANCHOR152
-.L1710:
+	adrp	x7, .LANCHOR151
+	adrp	x8, .LANCHOR153
+.L1743:
 	cmp	w5, w24
-	bcc	.L1715
-.L1714:
-	adrp	x0, .LANCHOR42
+	bcc	.L1748
+.L1747:
+	adrp	x0, .LANCHOR43
 	add	x23, x28, x23
-	ldrb	w0, [x0, #:lo12:.LANCHOR42]
+	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	strb	w20, [x23, 8]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L1716
+	bcc	.L1749
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L1716:
+.L1749:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L1709
+	bne	.L1742
 	adrp	x0, .LC108
 	mov	w4, w19
 	mov	w3, w5
@@ -10160,7 +10306,7 @@ hynix_read_retrial:
 	mov	w1, w5
 	add	x0, x0, :lo12:.LC108
 	bl	printf
-.L1709:
+.L1742:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10169,7 +10315,7 @@ hynix_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1715:
+.L1748:
 	add	w20, w20, 1
 	stp	x6, x8, [x29, 96]
 	and	w20, w20, 255
@@ -10190,21 +10336,21 @@ hynix_read_retrial:
 	cmn	w0, #1
 	ldp	x6, x8, [x29, 96]
 	ldr	x7, [x29, 112]
-	beq	.L1712
+	beq	.L1745
 	ldrb	w1, [x6]
 	cmn	w19, #1
 	csel	w19, w19, w0, ne
-	ldr	x25, [x7, #:lo12:.LANCHOR150]
-	ldr	x26, [x8, #:lo12:.LANCHOR152]
+	ldr	x25, [x7, #:lo12:.LANCHOR151]
+	ldr	x26, [x8, #:lo12:.LANCHOR153]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L1718
-.L1712:
+	bcc	.L1751
+.L1745:
 	add	w5, w5, 1
-	b	.L1710
-.L1718:
+	b	.L1743
+.L1751:
 	mov	w19, w0
-	b	.L1714
+	b	.L1747
 	.size	hynix_read_retrial, .-hynix_read_retrial
 	.section	.text.flash_ddr_tuning_read,"ax",@progbits
 	.align	2
@@ -10219,13 +10365,13 @@ flash_ddr_tuning_read:
 	stp	x21, x22, [sp, 32]
 	adrp	x21, .LC109
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR42
+	adrp	x22, .LANCHOR43
 	stp	x25, x26, [sp, 64]
 	add	x21, x21, :lo12:.LC109
 	stp	x27, x28, [sp, 80]
 	mov	x26, x3
 	str	w4, [x29, 120]
-	add	x22, x22, :lo12:.LANCHOR42
+	add	x22, x22, :lo12:.LANCHOR43
 	str	x2, [x29, 128]
 	mov	w28, 0
 	str	w0, [x29, 136]
@@ -10233,14 +10379,14 @@ flash_ddr_tuning_read:
 	mov	w23, 0
 	str	w0, [x29, 124]
 	mov	w24, 0
-	adrp	x0, .LANCHOR9
+	adrp	x0, .LANCHOR14
 	mov	w27, 1024
-	add	x0, x0, :lo12:.LANCHOR9
+	add	x0, x0, :lo12:.LANCHOR14
 	mov	w25, 6
 	mov	w19, -1
 	str	wzr, [x29, 140]
 	str	x0, [x29, 112]
-.L1734:
+.L1767:
 	mov	w0, w25
 	bl	nandc_set_ddr_para
 	ldr	w4, [x29, 120]
@@ -10252,7 +10398,7 @@ flash_ddr_tuning_read:
 	mov	w4, w0
 	ldr	x0, [x29, 112]
 	ldr	w0, [x0]
-	tbz	x0, 4, .L1729
+	tbz	x0, 4, .L1762
 	mov	w3, w4
 	str	w4, [x29, 108]
 	mov	w2, w20
@@ -10260,51 +10406,51 @@ flash_ddr_tuning_read:
 	mov	x0, x21
 	bl	printf
 	ldr	w4, [x29, 108]
-.L1729:
+.L1762:
 	add	w0, w27, 1
 	cmp	w4, w0
-	bhi	.L1730
-	adrp	x0, .LANCHOR150
-	ldr	x0, [x0, #:lo12:.LANCHOR150]
+	bhi	.L1763
+	adrp	x0, .LANCHOR151
+	ldr	x0, [x0, #:lo12:.LANCHOR151]
 	str	x0, [x29, 128]
-	adrp	x0, .LANCHOR152
-	ldr	x26, [x0, #:lo12:.LANCHOR152]
+	adrp	x0, .LANCHOR153
+	ldr	x26, [x0, #:lo12:.LANCHOR153]
 	ldrb	w0, [x22]
 	cmp	w4, w0, lsr 2
-	bcs	.L1739
+	bcs	.L1772
 	add	w24, w24, 1
 	cmp	w24, 7
-	bls	.L1739
+	bls	.L1772
 	sub	w28, w25, w24
 	mov	w27, w4
 	mov	w19, 0
-.L1732:
+.L1765:
 	ldr	w0, [x29, 140]
 	cmp	w24, w23
 	csel	w28, w28, w0, cs
-.L1733:
-	cbz	w28, .L1735
-	adrp	x0, .LANCHOR42
+.L1766:
+	cbz	w28, .L1768
+	adrp	x0, .LANCHOR43
 	mov	w1, 3
-	ldrb	w0, [x0, #:lo12:.LANCHOR42]
+	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	udiv	w0, w0, w1
 	cmp	w0, w27
-	bls	.L1735
+	bls	.L1768
 	mov	w1, w28
 	adrp	x0, .LC110
 	add	x0, x0, :lo12:.LC110
 	bl	printf
 	mov	w0, w28
-.L1749:
+.L1782:
 	bl	nandc_set_ddr_para
-	cbz	w19, .L1728
+	cbz	w19, .L1761
 	ldr	w1, [x29, 136]
 	adrp	x0, .LC111
 	mov	w2, w20
 	add	x0, x0, :lo12:.LC111
 	mov	w27, w19
 	bl	printf
-.L1728:
+.L1761:
 	mov	w0, w27
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10313,29 +10459,29 @@ flash_ddr_tuning_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1730:
+.L1763:
 	cmp	w24, w23
-	bls	.L1740
+	bls	.L1773
 	sub	w0, w28, w24
 	str	w0, [x29, 140]
 	cmp	w24, 7
-	bhi	.L1733
+	bhi	.L1766
 	mov	w23, w24
-.L1740:
+.L1773:
 	mov	w24, 0
-	b	.L1731
-.L1739:
+	b	.L1764
+.L1772:
 	mov	w28, w25
 	mov	w27, w4
 	mov	w19, 0
-.L1731:
+.L1764:
 	add	w25, w25, 2
 	cmp	w25, 50
-	bne	.L1734
-	b	.L1732
-.L1735:
+	bne	.L1767
+	b	.L1765
+.L1768:
 	ldrb	w0, [x29, 124]
-	b	.L1749
+	b	.L1782
 	.size	flash_ddr_tuning_read, .-flash_ddr_tuning_read
 	.section	.text.flash_read_page_en,"ax",@progbits
 	.align	2
@@ -10344,57 +10490,62 @@ flash_ddr_tuning_read:
 flash_read_page_en:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	and	w20, w0, 255
-	adrp	x0, .LANCHOR14
 	stp	x21, x22, [sp, 32]
+	and	w21, w0, 255
+	adrp	x0, .LANCHOR18
 	stp	x23, x24, [sp, 48]
-	mov	w19, w1
-	ldrb	w0, [x0, #:lo12:.LANCHOR14]
-	mov	x22, x2
 	stp	x25, x26, [sp, 64]
-	mov	x23, x3
+	mov	x22, x2
+	stp	x19, x20, [sp, 16]
+	mov	w19, w1
 	str	x27, [sp, 80]
+	mov	x23, x3
+	ldrb	w1, [x0, #:lo12:.LANCHOR18]
 	mov	w24, w4
-	ubfx	x21, x19, 24, 2
-	cmp	w0, w20
-	bhi	.L1751
-	adrp	x1, .LANCHOR154
+	ubfx	x26, x19, 24, 2
+	mov	x25, x0
+	cmp	w1, w21
+	bhi	.L1784
+	adrp	x1, .LANCHOR155
 	adrp	x0, .LC0
-	mov	w2, 378
-	add	x1, x1, :lo12:.LANCHOR154
+	mov	w2, 377
+	add	x1, x1, :lo12:.LANCHOR155
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1751:
-	adrp	x0, .LANCHOR26
-	add	x0, x0, :lo12:.LANCHOR26
-	ldrb	w20, [x0, w20, sxtw]
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 4, .L1752
+.L1784:
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
+	ldrb	w20, [x0, w21, sxtw]
+	ldrb	w0, [x25, #:lo12:.LANCHOR18]
+	cmp	w0, w21
+	bcs	.L1785
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 6, .L1785
 	adrp	x0, .LC112
-	mov	w2, w19
+	mov	w3, w19
+	mov	w2, w21
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC112
 	bl	printf
-.L1752:
-	cbnz	w21, .L1753
-	adrp	x0, .LANCHOR13
-	adrp	x1, .LANCHOR27
-	ldrb	w0, [x0, #:lo12:.LANCHOR13]
-	cbz	w0, .L1754
-	ldrb	w0, [x1, #:lo12:.LANCHOR27]
-	cbz	w0, .L1753
-.L1754:
-	adrp	x0, .LANCHOR28
-	ldrb	w1, [x1, #:lo12:.LANCHOR27]
-	ldrh	w2, [x0, #:lo12:.LANCHOR28]
+.L1785:
+	cbnz	w26, .L1786
+	adrp	x0, .LANCHOR0
+	adrp	x1, .LANCHOR1
+	ldrb	w0, [x0, #:lo12:.LANCHOR0]
+	cbz	w0, .L1787
+	ldrb	w0, [x1, #:lo12:.LANCHOR1]
+	cbz	w0, .L1786
+.L1787:
+	adrp	x0, .LANCHOR2
+	ldrb	w1, [x1, #:lo12:.LANCHOR1]
+	ldrh	w2, [x0, #:lo12:.LANCHOR2]
 	udiv	w0, w19, w2
 	mul	w0, w0, w2
 	sub	w19, w19, w0
-	cbz	w1, .L1755
+	cbz	w1, .L1788
 	add	w19, w0, w19, lsl 1
-.L1753:
+.L1786:
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -10403,26 +10554,26 @@ flash_read_page_en:
 	bl	flash_read_page
 	mov	w21, w0
 	cmn	w0, #1
-	bne	.L1750
-	adrp	x25, .LANCHOR44
+	bne	.L1783
+	adrp	x25, .LANCHOR45
 	mov	x26, x25
-	ldrb	w27, [x25, #:lo12:.LANCHOR44]
-	cbnz	w27, .L1757
-.L1760:
-	adrp	x0, .LANCHOR155
-	ldr	x5, [x0, #:lo12:.LANCHOR155]
-	cbnz	x5, .L1758
-.L1759:
-	ldrb	w4, [x26, #:lo12:.LANCHOR44]
+	ldrb	w27, [x25, #:lo12:.LANCHOR45]
+	cbnz	w27, .L1790
+.L1793:
+	adrp	x0, .LANCHOR156
+	ldr	x5, [x0, #:lo12:.LANCHOR156]
+	cbnz	x5, .L1791
+.L1792:
+	ldrb	w4, [x26, #:lo12:.LANCHOR45]
 	mov	w3, -1
 	mov	w2, w19
 	mov	w1, 0
 	adrp	x0, .LC113
 	add	x0, x0, :lo12:.LC113
 	bl	printf
-	adrp	x0, .LANCHOR16
-	ldrb	w0, [x0, #:lo12:.LANCHOR16]
-	cbz	w0, .L1750
+	adrp	x0, .LANCHOR20
+	ldrb	w0, [x0, #:lo12:.LANCHOR20]
+	cbz	w0, .L1783
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -10435,26 +10586,26 @@ flash_read_page_en:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	b	flash_ddr_tuning_read
-.L1755:
-	adrp	x1, .LANCHOR29
-	add	x1, x1, :lo12:.LANCHOR29
+.L1788:
+	adrp	x1, .LANCHOR3
+	add	x1, x1, :lo12:.LANCHOR3
 	ldrh	w19, [x1, w19, uxtw 1]
 	add	w19, w19, w0
-	b	.L1753
-.L1757:
-	strb	wzr, [x25, #:lo12:.LANCHOR44]
+	b	.L1786
+.L1790:
+	strb	wzr, [x25, #:lo12:.LANCHOR45]
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
 	mov	w1, w19
 	mov	w0, w20
 	bl	flash_read_page
-	strb	w27, [x25, #:lo12:.LANCHOR44]
+	strb	w27, [x25, #:lo12:.LANCHOR45]
 	cmn	w0, #1
-	beq	.L1760
-.L1778:
+	beq	.L1793
+.L1811:
 	mov	w21, w0
-.L1750:
+.L1783:
 	mov	w0, w21
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -10463,7 +10614,7 @@ flash_read_page_en:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1758:
+.L1791:
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -10471,8 +10622,8 @@ flash_read_page_en:
 	mov	w0, w20
 	blr	x5
 	cmn	w0, #1
-	beq	.L1759
-	b	.L1778
+	beq	.L1792
+	b	.L1811
 	.size	flash_read_page_en, .-flash_read_page_en
 	.section	.text.flash_get_last_written_page,"ax",@progbits
 	.align	2
@@ -10483,11 +10634,11 @@ flash_get_last_written_page:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	w23, w0, 255
-	adrp	x0, .LANCHOR134
+	adrp	x0, .LANCHOR135
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
 	mov	x24, x2
-	ldrh	w19, [x0, #:lo12:.LANCHOR134]
+	ldrh	w19, [x0, #:lo12:.LANCHOR135]
 	adrp	x0, .LANCHOR34+26
 	stp	x21, x22, [sp, 32]
 	and	w21, w1, 65535
@@ -10502,23 +10653,23 @@ flash_get_last_written_page:
 	add	w1, w19, w26
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L1780
+	bne	.L1813
 	mov	w27, 0
 	mov	w28, 2
-.L1781:
+.L1814:
 	cmp	w27, w19
-	ble	.L1784
-.L1780:
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L1785
+	ble	.L1817
+.L1813:
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L1818
 	ldr	w3, [x22]
 	adrp	x0, .LC114
 	mov	w2, w19
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC114
 	bl	printf
-.L1785:
+.L1818:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10527,7 +10678,7 @@ flash_get_last_written_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1784:
+.L1817:
 	add	w20, w27, w19
 	mov	w4, w25
 	mov	x3, x22
@@ -10537,25 +10688,25 @@ flash_get_last_written_page:
 	add	w1, w26, w20, sxth
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L1782
+	bne	.L1815
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L1781
-.L1782:
+	b	.L1814
+.L1815:
 	add	w20, w20, 1
 	sxth	w27, w20
-	b	.L1781
+	b	.L1814
 	.size	flash_get_last_written_page, .-flash_get_last_written_page
 	.section	.text.flash_get_last_written_page_ext,"ax",@progbits
 	.align	2
 	.global	flash_get_last_written_page_ext
 	.type	flash_get_last_written_page_ext, %function
 flash_get_last_written_page_ext:
-	adrp	x4, .LANCHOR102
+	adrp	x4, .LANCHOR99
 	mov	w6, 21
 	and	w0, w0, 65535
 	mov	w5, 1
-	ldrh	w4, [x4, #:lo12:.LANCHOR102]
+	ldrh	w4, [x4, #:lo12:.LANCHOR99]
 	sub	w6, w6, w4
 	mov	w4, w3
 	mov	x3, x2
@@ -10572,55 +10723,55 @@ flash_get_last_written_page_ext:
 	.type	flash_info_blk_init, %function
 flash_info_blk_init:
 	stp	x29, x30, [sp, -96]!
-	adrp	x0, .LANCHOR9
+	adrp	x0, .LANCHOR14
 	add	x29, sp, 0
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR22
+	adrp	x20, .LANCHOR26
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	tbz	x0, 12, .L1792
-	ldr	x4, [x20, #:lo12:.LANCHOR22]
-	adrp	x2, .LANCHOR156
+	tbz	x0, 12, .L1825
+	ldr	x4, [x20, #:lo12:.LANCHOR26]
+	adrp	x2, .LANCHOR157
 	adrp	x0, .LC115
 	mov	w3, 2048
-	add	x2, x2, :lo12:.LANCHOR156
+	add	x2, x2, :lo12:.LANCHOR157
 	mov	w1, 49
 	add	x0, x0, :lo12:.LC115
 	bl	printf
-.L1792:
-	adrp	x21, .LANCHOR157
-	adrp	x23, .LANCHOR28
+.L1825:
+	adrp	x21, .LANCHOR158
+	adrp	x23, .LANCHOR2
 	mov	w24, 21321
-	add	x26, x23, :lo12:.LANCHOR28
+	add	x26, x23, :lo12:.LANCHOR2
 	mov	x22, x21
 	mov	w19, 4
 	movk	w24, 0x5359, lsl 16
-.L1795:
+.L1828:
 	ldrh	w1, [x26]
 	mov	w4, 4
-	ldr	x3, [x21, #:lo12:.LANCHOR157]
+	ldr	x3, [x21, #:lo12:.LANCHOR158]
 	mov	w0, 0
-	ldr	x2, [x20, #:lo12:.LANCHOR22]
-	add	x27, x21, :lo12:.LANCHOR157
-	add	x25, x20, :lo12:.LANCHOR22
+	ldr	x2, [x20, #:lo12:.LANCHOR26]
+	add	x27, x21, :lo12:.LANCHOR158
+	add	x25, x20, :lo12:.LANCHOR26
 	mul	w1, w1, w19
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L1793
-	ldr	x2, [x20, #:lo12:.LANCHOR22]
+	beq	.L1826
+	ldr	x2, [x20, #:lo12:.LANCHOR26]
 	ldr	w0, [x2]
 	cmp	w0, w24
-	beq	.L1794
-.L1793:
+	beq	.L1827
+.L1826:
 	add	w19, w19, 1
 	cmp	w19, 16
-	bne	.L1795
-.L1819:
+	bne	.L1828
+.L1852:
 	mov	w0, -1
-.L1791:
+.L1824:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -10628,102 +10779,102 @@ flash_info_blk_init:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1803:
+.L1836:
 	ldr	x0, [x25]
 	ldr	w1, [x0]
 	cmp	w1, w24
-	bne	.L1804
+	bne	.L1837
 	ldr	w19, [x0, 4]
-.L1797:
-	add	x24, x21, :lo12:.LANCHOR158
-	ldrh	w0, [x23, #:lo12:.LANCHOR28]
-	ldr	x3, [x22, #:lo12:.LANCHOR157]
+.L1830:
+	add	x24, x21, :lo12:.LANCHOR159
+	ldrh	w0, [x23, #:lo12:.LANCHOR2]
+	ldr	x3, [x22, #:lo12:.LANCHOR158]
 	mov	w4, 4
-	ldr	x2, [x20, #:lo12:.LANCHOR22]
+	ldr	x2, [x20, #:lo12:.LANCHOR26]
 	ldrb	w1, [x24, 1]
 	mul	w1, w1, w0
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L1798
-	ldr	x0, [x20, #:lo12:.LANCHOR22]
+	beq	.L1831
+	ldr	x0, [x20, #:lo12:.LANCHOR26]
 	mov	w1, 21321
 	movk	w1, 0x5359, lsl 16
 	ldr	w2, [x0]
 	cmp	w2, w1
-	bne	.L1798
+	bne	.L1831
 	ldr	w1, [x0, 4]
 	cmp	w19, w1
-	bcs	.L1798
+	bcs	.L1831
 	ldrb	w1, [x0, 37]
 	ldrb	w0, [x0, 36]
-	strb	w1, [x21, #:lo12:.LANCHOR158]
+	strb	w1, [x21, #:lo12:.LANCHOR159]
 	strb	w0, [x24, 1]
-.L1798:
-	ldrb	w1, [x21, #:lo12:.LANCHOR158]
-	add	x24, x21, :lo12:.LANCHOR158
-	ldr	x3, [x22, #:lo12:.LANCHOR157]
+.L1831:
+	ldrb	w1, [x21, #:lo12:.LANCHOR159]
+	add	x24, x21, :lo12:.LANCHOR159
+	ldr	x3, [x22, #:lo12:.LANCHOR158]
 	mov	w4, 4
-	ldr	x2, [x20, #:lo12:.LANCHOR22]
+	ldr	x2, [x20, #:lo12:.LANCHOR26]
 	mov	w0, 0
 	bl	flash_get_last_written_page
 	sxth	w19, w0
 	add	w0, w0, 1
-	ldrb	w21, [x21, #:lo12:.LANCHOR158]
+	ldrb	w21, [x21, #:lo12:.LANCHOR159]
 	strh	w0, [x24, 2]
-	ldrh	w0, [x23, #:lo12:.LANCHOR28]
+	ldrh	w0, [x23, #:lo12:.LANCHOR2]
 	mov	w23, 21321
 	movk	w23, 0x5359, lsl 16
 	madd	w21, w21, w0, w19
-.L1799:
-	tbz	w19, #31, .L1801
+.L1832:
+	tbz	w19, #31, .L1834
 	cmn	w19, #1
-	bne	.L1802
-	ldr	x0, [x20, #:lo12:.LANCHOR22]
+	bne	.L1835
+	ldr	x0, [x20, #:lo12:.LANCHOR26]
 	ldr	w1, [x0]
 	adrp	x0, .LC116
 	add	x0, x0, :lo12:.LC116
 	bl	printf
-	b	.L1819
-.L1801:
-	ldr	x3, [x22, #:lo12:.LANCHOR157]
+	b	.L1852
+.L1834:
+	ldr	x3, [x22, #:lo12:.LANCHOR158]
 	mov	w4, 4
-	ldr	x2, [x20, #:lo12:.LANCHOR22]
+	ldr	x2, [x20, #:lo12:.LANCHOR26]
 	mov	w1, w21
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L1800
-	ldr	x0, [x20, #:lo12:.LANCHOR22]
+	beq	.L1833
+	ldr	x0, [x20, #:lo12:.LANCHOR26]
 	ldr	w0, [x0]
 	cmp	w0, w23
-	bne	.L1800
-.L1802:
+	bne	.L1833
+.L1835:
 	mov	w0, 0
-	b	.L1791
-.L1800:
+	b	.L1824
+.L1833:
 	sub	w19, w19, #1
 	sub	w21, w21, #1
 	sxth	w19, w19
-	b	.L1799
-.L1794:
-	adrp	x21, .LANCHOR158
-	add	x1, x21, :lo12:.LANCHOR158
+	b	.L1832
+.L1827:
+	adrp	x21, .LANCHOR159
+	add	x1, x21, :lo12:.LANCHOR159
 	ldrb	w3, [x2, 37]
 	mov	w4, 4
 	ldrb	w0, [x2, 36]
 	strb	w3, [x1, 1]
 	ldrh	w1, [x26]
 	ldr	x3, [x27]
-	strb	w0, [x21, #:lo12:.LANCHOR158]
+	strb	w0, [x21, #:lo12:.LANCHOR159]
 	mul	w1, w1, w0
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	bne	.L1803
-.L1804:
+	bne	.L1836
+.L1837:
 	mov	w19, 0
-	b	.L1797
+	b	.L1830
 	.size	flash_info_blk_init, .-flash_info_blk_init
 	.section	.text.flash_ddr_para_scan,"ax",@progbits
 	.align	2
@@ -10733,44 +10884,44 @@ flash_ddr_para_scan:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR41
+	adrp	x20, .LANCHOR42
 	stp	x21, x22, [sp, 32]
 	and	w22, w0, 255
-	ldrb	w0, [x20, #:lo12:.LANCHOR41]
-	adrp	x19, .LANCHOR16
+	ldrb	w0, [x20, #:lo12:.LANCHOR42]
+	adrp	x19, .LANCHOR20
 	stp	x23, x24, [sp, 48]
 	mov	w21, 1
 	mov	w23, w1
 	str	x25, [sp, 64]
-	strb	w21, [x19, #:lo12:.LANCHOR16]
-	adrp	x24, .LANCHOR160
+	strb	w21, [x19, #:lo12:.LANCHOR20]
+	adrp	x24, .LANCHOR161
 	bl	flash_set_interface_mode
-	adrp	x25, .LANCHOR159
-	ldrb	w0, [x20, #:lo12:.LANCHOR41]
+	adrp	x25, .LANCHOR160
+	ldrb	w0, [x20, #:lo12:.LANCHOR42]
 	bl	nandc_set_if_mode
-	ldr	x3, [x25, #:lo12:.LANCHOR159]
+	ldr	x3, [x25, #:lo12:.LANCHOR160]
 	mov	w4, 4
-	ldr	x2, [x24, #:lo12:.LANCHOR160]
+	ldr	x2, [x24, #:lo12:.LANCHOR161]
 	mov	w1, w23
 	mov	w0, w22
 	bl	flash_ddr_tuning_read
-	ldr	x3, [x25, #:lo12:.LANCHOR159]
+	ldr	x3, [x25, #:lo12:.LANCHOR160]
 	mov	w4, 4
-	ldr	x2, [x24, #:lo12:.LANCHOR160]
+	ldr	x2, [x24, #:lo12:.LANCHOR161]
 	mov	w1, w23
 	mov	w0, w22
 	bl	flash_read_page
 	cmn	w0, #1
 	mov	x0, x19
-	bne	.L1821
-	ldrb	w1, [x20, #:lo12:.LANCHOR41]
-	tbz	x1, 0, .L1821
+	bne	.L1854
+	ldrb	w1, [x20, #:lo12:.LANCHOR42]
+	tbz	x1, 0, .L1854
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, w21
 	bl	nandc_set_if_mode
-	strb	wzr, [x19, #:lo12:.LANCHOR16]
-.L1822:
+	strb	wzr, [x19, #:lo12:.LANCHOR20]
+.L1855:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -10778,11 +10929,119 @@ flash_ddr_para_scan:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1821:
+.L1854:
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR16]
-	b	.L1822
+	strb	w1, [x0, #:lo12:.LANCHOR20]
+	b	.L1855
 	.size	flash_ddr_para_scan, .-flash_ddr_para_scan
+	.section	.text.flash_complete_plane_page_read,"ax",@progbits
+	.align	2
+	.global	flash_complete_plane_page_read
+	.type	flash_complete_plane_page_read, %function
+flash_complete_plane_page_read:
+	stp	x29, x30, [sp, -64]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w19, w0, 2097151
+	ubfx	x20, x0, 24, 2
+	str	x23, [sp, 48]
+	ubfx	x23, x0, 21, 3
+	adrp	x0, .LANCHOR18
+	stp	x21, x22, [sp, 32]
+	mov	x21, x1
+	ldrb	w0, [x0, #:lo12:.LANCHOR18]
+	mov	x22, x2
+	cmp	w0, w23
+	bhi	.L1861
+	adrp	x1, .LANCHOR162
+	adrp	x0, .LC0
+	mov	w2, 782
+	add	x1, x1, :lo12:.LANCHOR162
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1861:
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
+	ldrb	w6, [x0, w23, sxtw]
+	adrp	x0, .LANCHOR13
+	ldr	x4, [x0, #:lo12:.LANCHOR13]
+	mov	w0, w6
+	bl	nandc_cs
+	cbnz	w20, .L1862
+	mov	w0, w19
+	bl	slc_phy_page_address_calc
+	mov	w19, w0
+.L1862:
+	adrp	x0, .LANCHOR19+16
+	and	x1, x6, 255
+	and	w3, w19, 255
+	lsr	w2, w19, 8
+	ldrb	w0, [x0, #:lo12:.LANCHOR19+16]
+	adrp	x5, .LANCHOR16
+	cmp	w0, 1
+	lsr	w0, w19, 16
+	bne	.L1863
+	add	x1, x4, x1, lsl 8
+	mov	w4, 6
+.L1874:
+	str	w4, [x1, 2056]
+	str	wzr, [x1, 2052]
+	str	wzr, [x1, 2052]
+	str	w3, [x1, 2052]
+	str	w2, [x1, 2052]
+	str	w0, [x1, 2052]
+.L1872:
+	mov	w0, 224
+	str	w0, [x1, 2056]
+	ldr	x0, [x5, #:lo12:.LANCHOR16]
+	ldrb	w0, [x0, 12]
+	cmp	w0, 3
+	bne	.L1866
+	cbz	w20, .L1866
+	add	w19, w19, w19, lsl 1
+	sub	w20, w20, #1
+	add	w0, w19, w20
+.L1873:
+	bl	nandc_set_seed
+	adrp	x0, .LANCHOR34+9
+	mov	x4, x22
+	mov	x3, x21
+	mov	w1, 0
+	ldrb	w2, [x0, #:lo12:.LANCHOR34+9]
+	mov	w0, w6
+	bl	nandc_xfer
+	mov	w2, w0
+	bl	nandc_de_cs.constprop.29
+	ldr	x23, [sp, 48]
+	mov	w0, w2
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+.L1863:
+	ldr	x7, [x5, #:lo12:.LANCHOR16]
+	add	x1, x4, x1, lsl 8
+	ldrb	w7, [x7, 12]
+	cmp	w7, 3
+	bne	.L1865
+	mov	w4, 5
+	b	.L1874
+.L1865:
+	str	wzr, [x1, 2056]
+	str	wzr, [x1, 2052]
+	str	wzr, [x1, 2052]
+	str	w3, [x1, 2052]
+	str	w2, [x1, 2052]
+	str	w0, [x1, 2052]
+	mov	w0, 5
+	str	w0, [x1, 2056]
+	str	wzr, [x1, 2052]
+	str	wzr, [x1, 2052]
+	b	.L1872
+.L1866:
+	mov	w0, w19
+	b	.L1873
+	.size	flash_complete_plane_page_read, .-flash_complete_plane_page_read
 	.section	.text.flash_complete_page_read,"ax",@progbits
 	.align	2
 	.global	flash_complete_page_read
@@ -10794,48 +11053,36 @@ flash_complete_page_read:
 	and	w19, w0, 2097151
 	stp	x23, x24, [sp, 48]
 	mov	w23, w0
-	adrp	x0, .LANCHOR14
+	adrp	x0, .LANCHOR18
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	ubfx	x20, x23, 21, 3
-	ldrb	w0, [x0, #:lo12:.LANCHOR14]
+	ldrb	w0, [x0, #:lo12:.LANCHOR18]
 	mov	x24, x1
 	stp	x27, x28, [sp, 80]
 	mov	x25, x2
 	ubfx	x21, x23, 24, 2
 	cmp	w0, w20
-	bhi	.L1828
-	adrp	x1, .LANCHOR161
+	bhi	.L1876
+	adrp	x1, .LANCHOR163
 	adrp	x0, .LC0
-	mov	w2, 789
-	add	x1, x1, :lo12:.LANCHOR161
+	mov	w2, 904
+	add	x1, x1, :lo12:.LANCHOR163
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1828:
-	adrp	x0, .LANCHOR26
-	add	x0, x0, :lo12:.LANCHOR26
+.L1876:
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w22, [x0, w20, sxtw]
-	adrp	x0, .LANCHOR23
-	ldr	x4, [x0, #:lo12:.LANCHOR23]
+	adrp	x0, .LANCHOR13
+	ldr	x4, [x0, #:lo12:.LANCHOR13]
 	mov	w0, w22
 	bl	nandc_cs
-	cbnz	w21, .L1829
-	adrp	x0, .LANCHOR13
-	adrp	x1, .LANCHOR27
-	ldrb	w0, [x0, #:lo12:.LANCHOR13]
-	cbz	w0, .L1830
-	ldrb	w0, [x1, #:lo12:.LANCHOR27]
-	cbz	w0, .L1829
-.L1830:
-	adrp	x0, .LANCHOR28
-	ldrb	w1, [x1, #:lo12:.LANCHOR27]
-	ldrh	w2, [x0, #:lo12:.LANCHOR28]
-	udiv	w0, w19, w2
-	mul	w0, w0, w2
-	sub	w19, w19, w0
-	cbz	w1, .L1831
-	add	w19, w0, w19, lsl 1
-.L1829:
+	cbnz	w21, .L1877
+	mov	w0, w19
+	bl	slc_phy_page_address_calc
+	mov	w19, w0
+.L1877:
 	ubfiz	x0, x22, 8, 8
 	mov	w1, 5
 	add	x0, x4, x0
@@ -10850,16 +11097,16 @@ flash_complete_page_read:
 	str	w1, [x0, 2052]
 	mov	w1, 224
 	str	w1, [x0, 2056]
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1832
-	cbz	w21, .L1832
+	bne	.L1878
+	cbz	w21, .L1878
 	sub	w0, w21, #1
 	add	w1, w19, w19, lsl 1
 	add	w0, w0, w1
-.L1865:
+.L1905:
 	adrp	x20, .LANCHOR34
 	add	x28, x20, :lo12:.LANCHOR34
 	bl	nandc_set_seed
@@ -10870,28 +11117,28 @@ flash_complete_page_read:
 	mov	w0, w22
 	bl	nandc_xfer
 	cmn	w0, #1
-	bne	.L1834
-	adrp	x26, .LANCHOR44
-	ldrb	w27, [x26, #:lo12:.LANCHOR44]
-	cbz	w27, .L1835
+	bne	.L1880
+	adrp	x26, .LANCHOR45
+	ldrb	w27, [x26, #:lo12:.LANCHOR45]
+	cbz	w27, .L1881
 	ldrb	w4, [x28, 9]
 	mov	x3, x25
-	strb	wzr, [x26, #:lo12:.LANCHOR44]
+	strb	wzr, [x26, #:lo12:.LANCHOR45]
 	mov	x2, x24
 	orr	w1, w19, w21, lsl 24
 	mov	w0, w22
 	bl	flash_read_page
-	strb	w27, [x26, #:lo12:.LANCHOR44]
-	cbnz	w21, .L1836
-.L1841:
-	adrp	x1, .LANCHOR13
-	ldrb	w1, [x1, #:lo12:.LANCHOR13]
-	cbz	w1, .L1836
-	adrp	x1, .LANCHOR42
-	ldrb	w1, [x1, #:lo12:.LANCHOR42]
+	strb	w27, [x26, #:lo12:.LANCHOR45]
+	cbnz	w21, .L1882
+.L1887:
+	adrp	x1, .LANCHOR0
+	ldrb	w1, [x1, #:lo12:.LANCHOR0]
+	cbz	w1, .L1882
+	adrp	x1, .LANCHOR43
+	ldrb	w1, [x1, #:lo12:.LANCHOR43]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	blt	.L1836
+	blt	.L1882
 	add	x20, x20, :lo12:.LANCHOR34
 	ldrb	w1, [x20, 19]
 	sub	w1, w1, #4
@@ -10899,7 +11146,7 @@ flash_complete_page_read:
 	cmp	w1, 3
 	mov	w1, 256
 	csel	w0, w0, w1, hi
-.L1827:
+.L1875:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -10907,37 +11154,31 @@ flash_complete_page_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1831:
-	adrp	x1, .LANCHOR29
-	add	x1, x1, :lo12:.LANCHOR29
-	ldrh	w19, [x1, w19, uxtw 1]
-	add	w19, w19, w0
-	b	.L1829
-.L1832:
+.L1878:
 	mov	w0, w19
-	b	.L1865
-.L1836:
+	b	.L1905
+.L1882:
 	cmn	w0, #1
-	bne	.L1827
-.L1842:
-	adrp	x0, .LANCHOR155
-	ldr	x5, [x0, #:lo12:.LANCHOR155]
-	cbnz	x5, .L1838
-.L1840:
-	adrp	x0, .LANCHOR44
+	bne	.L1875
+.L1888:
+	adrp	x0, .LANCHOR156
+	ldr	x5, [x0, #:lo12:.LANCHOR156]
+	cbnz	x5, .L1884
+.L1886:
+	adrp	x0, .LANCHOR45
 	mov	w3, -1
 	mov	w2, w23
 	mov	w1, 0
-	ldrb	w4, [x0, #:lo12:.LANCHOR44]
+	ldrb	w4, [x0, #:lo12:.LANCHOR45]
 	adrp	x0, .LC117
 	add	x0, x0, :lo12:.LC117
 	bl	printf
-	adrp	x0, .LANCHOR16
-	ldrb	w0, [x0, #:lo12:.LANCHOR16]
-	cbnz	w0, .L1839
+	adrp	x0, .LANCHOR20
+	ldrb	w0, [x0, #:lo12:.LANCHOR20]
+	cbnz	w0, .L1885
 	mov	w0, -1
-	b	.L1827
-.L1838:
+	b	.L1875
+.L1884:
 	add	x0, x20, :lo12:.LANCHOR34
 	mov	x3, x25
 	mov	x2, x24
@@ -10946,9 +11187,9 @@ flash_complete_page_read:
 	mov	w0, w22
 	blr	x5
 	cmn	w0, #1
-	beq	.L1840
-	b	.L1827
-.L1839:
+	beq	.L1886
+	b	.L1875
+.L1885:
 	add	x20, x20, :lo12:.LANCHOR34
 	orr	w1, w19, w21, lsl 24
 	mov	x3, x25
@@ -10962,202 +11203,378 @@ flash_complete_page_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	flash_ddr_tuning_read
-.L1835:
-	cbz	w21, .L1841
-	b	.L1842
-.L1834:
-	cbnz	w21, .L1827
-	b	.L1841
+.L1880:
+	cbz	w21, .L1887
+	b	.L1875
+.L1881:
+	cbnz	w21, .L1888
+	b	.L1887
 	.size	flash_complete_page_read, .-flash_complete_page_read
 	.section	.text.queue_wait_first_req_completed,"ax",@progbits
 	.align	2
 	.type	queue_wait_first_req_completed, %function
 queue_wait_first_req_completed:
-	stp	x29, x30, [sp, -64]!
-	adrp	x0, .LANCHOR126
+	stp	x29, x30, [sp, -96]!
+	adrp	x0, .LANCHOR53
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	ldrb	w0, [x0, #:lo12:.LANCHOR126]
+	ldrb	w0, [x0, #:lo12:.LANCHOR53]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	cmp	w0, 255
-	bne	.L1867
-.L1885:
-	mov	w21, 0
-	b	.L1866
-.L1867:
-	adrp	x19, .LANCHOR48
-	sxtw	x22, w0
-	add	x1, x19, :lo12:.LANCHOR48
-	add	x1, x1, x22, lsl 6
+	stp	x25, x26, [sp, 64]
+	str	x27, [sp, 80]
+	bne	.L1907
+.L1936:
+	mov	w22, 0
+	b	.L1906
+.L1907:
+	adrp	x19, .LANCHOR49
+	sxtw	x20, w0
+	add	x1, x19, :lo12:.LANCHOR49
+	add	x1, x1, x20, lsl 6
 	ldrb	w2, [x1, 58]
-	ldr	w21, [x1, 40]
+	ldr	w22, [x1, 40]
 	sub	w3, w2, #1
 	cmp	w3, 9
-	bhi	.L1885
-	adrp	x1, .L1870
-	add	x1, x1, :lo12:.L1870
-	ldrb	w1, [x1,w3,uxtw]
-	adr	x3, .Lrtx1870
-	add	x1, x3, w1, sxtb #2
+	bhi	.L1936
+	adrp	x1, .L1910
+	add	x1, x1, :lo12:.L1910
+	ldrh	w1, [x1,w3,uxtw #1]
+	adr	x3, .Lrtx1910
+	add	x1, x3, w1, sxth #2
 	br	x1
-.Lrtx1870:
+.Lrtx1910:
 	.section	.rodata.queue_wait_first_req_completed,"a",@progbits
 	.align	0
 	.align	2
-.L1870:
-	.byte	(.L1869 - .Lrtx1870) / 4
-	.byte	(.L1869 - .Lrtx1870) / 4
-	.byte	(.L1871 - .Lrtx1870) / 4
-	.byte	(.L1871 - .Lrtx1870) / 4
-	.byte	(.L1871 - .Lrtx1870) / 4
-	.byte	(.L1872 - .Lrtx1870) / 4
-	.byte	(.L1873 - .Lrtx1870) / 4
-	.byte	(.L1874 - .Lrtx1870) / 4
-	.byte	(.L1871 - .Lrtx1870) / 4
-	.byte	(.L1874 - .Lrtx1870) / 4
+.L1910:
+	.2byte	(.L1909 - .Lrtx1910) / 4
+	.2byte	(.L1911 - .Lrtx1910) / 4
+	.2byte	(.L1912 - .Lrtx1910) / 4
+	.2byte	(.L1912 - .Lrtx1910) / 4
+	.2byte	(.L1912 - .Lrtx1910) / 4
+	.2byte	(.L1913 - .Lrtx1910) / 4
+	.2byte	(.L1914 - .Lrtx1910) / 4
+	.2byte	(.L1915 - .Lrtx1910) / 4
+	.2byte	(.L1912 - .Lrtx1910) / 4
+	.2byte	(.L1915 - .Lrtx1910) / 4
 	.section	.text.queue_wait_first_req_completed
-.L1869:
+.L1909:
 	mov	w1, 64
-	mov	w0, w21
+	mov	w0, w22
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1885
-	add	x19, x19, :lo12:.LANCHOR48
-	add	x19, x19, x22, lsl 6
-	ldp	x1, x0, [x19, 8]
-	ldr	x2, [x19, 24]
-	cmp	x0, 0
-	csel	x1, x0, x1, ne
-	mov	w0, w21
+	tbz	x0, 6, .L1936
+	add	x0, x19, :lo12:.LANCHOR49
+	add	x0, x0, x20, lsl 6
+	ldp	x1, x2, [x0, 8]
+	cbz	x2, .L1917
+	ldrb	w3, [x0, 56]
+	adrp	x0, .LANCHOR121
+	ldrb	w0, [x0, #:lo12:.LANCHOR121]
+	cmp	w3, w0
+	csel	x1, x1, x2, ne
+.L1917:
+	add	x19, x19, :lo12:.LANCHOR49
+	mov	w0, w22
+	add	x20, x19, x20, lsl 6
+	ldr	x2, [x20, 24]
 	bl	flash_complete_page_read
-	str	w0, [x19, 52]
+	str	w0, [x20, 52]
 	mov	w0, 12
-	strb	w0, [x19, 58]
-	ldrb	w0, [x19, 2]
+	strb	w0, [x20, 58]
+	ldrb	w0, [x20, 2]
 	orr	w0, w0, 8
-	strb	w0, [x19, 2]
-	b	.L1885
-.L1871:
-	mov	w0, w21
+	strb	w0, [x20, 2]
+	b	.L1936
+.L1911:
 	mov	w1, 64
+	mov	w0, w22
 	bl	flash_wait_device_ready
-	mov	w21, w0
-	tbz	x21, 6, .L1885
-	add	x19, x19, :lo12:.LANCHOR48
-	mov	w0, 5
-	add	x19, x19, x22, lsl 6
-	tst	w21, w0
-	beq	.L1884
-	ldrb	w1, [x19, 1]
-	mov	w0, 11
-	ldr	w3, [x19, 40]
-	mov	w4, 11
-	ldr	w2, [x19, 52]
-	strb	w0, [x19, 58]
+	tbz	x0, 6, .L1936
+	add	x0, x19, :lo12:.LANCHOR49
+	lsl	x2, x20, 6
+	add	x1, x0, x2
+	ldrb	w21, [x0, x2]
+	add	x0, x0, x21, lsl 6
+	ldr	x24, [x0, 8]
+	ldp	x26, x0, [x1, 8]
+	cbz	x0, .L1918
+	ldrb	w2, [x1, 56]
+	adrp	x1, .LANCHOR121
+	ldrb	w1, [x1, #:lo12:.LANCHOR121]
+	cmp	w2, w1
+	csel	x26, x26, x0, ne
+.L1918:
+	add	x0, x19, :lo12:.LANCHOR49
+	add	x0, x0, x21, lsl 6
+	ldr	x1, [x0, 16]
+	cbz	x1, .L1919
+	ldrb	w2, [x0, 56]
+	adrp	x0, .LANCHOR121
+	ldrb	w0, [x0, #:lo12:.LANCHOR121]
+	cmp	w2, w0
+	csel	x24, x24, x1, ne
+.L1919:
+	add	x22, x19, :lo12:.LANCHOR49
+	mov	x1, x26
+	add	x27, x22, x20, lsl 6
+	add	x22, x22, x21, lsl 6
+	ldr	x2, [x27, 24]
+	ldr	w0, [x27, 40]
+	bl	flash_complete_plane_page_read
+	mov	w23, w0
+	ldr	x2, [x22, 24]
+	mov	x1, x24
+	ldr	w0, [x22, 40]
+	bl	flash_complete_plane_page_read
+	mov	w25, w0
+	cmn	w23, #1
+	beq	.L1920
+	ldr	w0, [x27, 36]
+	cmn	w0, #1
+	beq	.L1921
+	ldr	x1, [x27, 24]
+	ldr	w1, [x1, 4]
+	cmp	w0, w1
+	beq	.L1921
+.L1920:
+	add	x22, x19, :lo12:.LANCHOR49
+	adrp	x2, .LANCHOR121
+	add	x22, x22, x20, lsl 6
+	ldrb	w4, [x2, #:lo12:.LANCHOR121]
+	mov	x2, x26
+	ldr	x3, [x22, 24]
+	ldr	w1, [x22, 40]
+	ubfx	x0, x1, 21, 3
+	and	w1, w1, -14680065
+	bl	flash_read_page_en
+	mov	w23, w0
+	ldr	w2, [x22, 36]
+	cmn	w2, #1
+	beq	.L1922
+	ldr	x0, [x22, 24]
+	ldr	w4, [x0, 4]
+	cmp	w2, w4
+	beq	.L1922
+	adrp	x1, .LANCHOR14
+	ldr	w1, [x1, #:lo12:.LANCHOR14]
+	tbz	x1, 6, .L1922
+	ldr	w3, [x0]
+	adrp	x0, .LC118
+	ldr	w1, [x22, 40]
+	add	x0, x0, :lo12:.LC118
+	bl	printf
+.L1922:
+	add	x0, x19, :lo12:.LANCHOR49
+	add	x0, x0, x20, lsl 6
+	ldr	w1, [x0, 36]
+	cmn	w1, #1
+	beq	.L1921
+	ldr	x0, [x0, 24]
+	ldr	w0, [x0, 4]
+	cmp	w1, w0
+	beq	.L1921
+	adrp	x1, .LANCHOR164
+	adrp	x0, .LC0
+	mov	w2, 338
+	add	x1, x1, :lo12:.LANCHOR164
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1921:
+	add	x0, x19, :lo12:.LANCHOR49
+	mov	w1, 12
+	add	x20, x0, x20, lsl 6
+	cmn	w25, #1
+	strb	w1, [x20, 58]
+	ldrb	w1, [x20, 2]
+	str	w23, [x20, 52]
+	orr	w1, w1, 8
+	strb	w1, [x20, 2]
+	beq	.L1923
+	add	x0, x0, x21, lsl 6
+	ldr	w1, [x0, 36]
+	cmn	w1, #1
+	beq	.L1925
+	ldr	x0, [x0, 24]
+	ldr	w0, [x0, 4]
+	cmp	w1, w0
+	beq	.L1925
+.L1923:
+	add	x20, x19, :lo12:.LANCHOR49
+	adrp	x2, .LANCHOR121
+	add	x20, x20, x21, lsl 6
+	ldrb	w4, [x2, #:lo12:.LANCHOR121]
+	mov	x2, x24
+	ldr	x3, [x20, 24]
+	ldr	w1, [x20, 40]
+	ubfx	x0, x1, 21, 3
+	and	w1, w1, -14680065
+	bl	flash_read_page_en
+	ldr	w2, [x20, 36]
+	cmn	w2, #1
+	beq	.L1927
+	ldr	x0, [x20, 24]
+	ldr	w4, [x0, 4]
+	cmp	w2, w4
+	beq	.L1927
+	adrp	x1, .LANCHOR14
+	ldr	w1, [x1, #:lo12:.LANCHOR14]
+	tbz	x1, 6, .L1927
+	ldr	w3, [x0]
 	adrp	x0, .LC118
+	ldr	w1, [x20, 40]
 	add	x0, x0, :lo12:.LC118
 	bl	printf
-.L1903:
+.L1927:
+	add	x0, x19, :lo12:.LANCHOR49
+	add	x0, x0, x21, lsl 6
+	ldr	w1, [x0, 36]
+	cmn	w1, #1
+	beq	.L1925
+	ldr	x0, [x0, 24]
+	ldr	w0, [x0, 4]
+	cmp	w1, w0
+	beq	.L1925
+	adrp	x1, .LANCHOR164
+	adrp	x0, .LC0
+	mov	w2, 353
+	add	x1, x1, :lo12:.LANCHOR164
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1925:
+	add	x19, x19, :lo12:.LANCHOR49
+	mov	w0, 12
+	add	x21, x19, x21, lsl 6
+	strb	w0, [x21, 58]
+	ldrb	w0, [x21, 2]
+	str	w23, [x21, 52]
+	orr	w0, w0, 8
+	strb	w0, [x21, 2]
+	b	.L1936
+.L1912:
+	mov	w0, w22
+	mov	w1, 64
+	bl	flash_wait_device_ready
+	mov	w22, w0
+	tbz	x22, 6, .L1936
+	add	x19, x19, :lo12:.LANCHOR49
+	mov	w0, 5
+	add	x20, x19, x20, lsl 6
+	tst	w22, w0
+	beq	.L1935
+	ldrb	w1, [x20, 1]
+	mov	w0, 11
+	ldr	w3, [x20, 40]
+	mov	w4, 11
+	ldr	w2, [x20, 52]
+	strb	w0, [x20, 58]
+	adrp	x0, .LC119
+	add	x0, x0, :lo12:.LC119
+	bl	printf
+.L1996:
 	mov	w0, -1
-	str	w0, [x19, 52]
-	b	.L1866
-.L1874:
+	str	w0, [x20, 52]
+	b	.L1906
+.L1915:
 	cmp	w2, 10
-	add	x20, x19, :lo12:.LANCHOR48
+	add	x21, x19, :lo12:.LANCHOR49
 	ubfiz	x0, x0, 6, 8
 	mov	w1, 3
 	mov	w2, 9
-	add	x0, x20, x0
+	add	x0, x21, x0
 	csel	w2, w2, w1, eq
-	ubfx	x3, x21, 21, 3
-.L1879:
+	ubfx	x3, x22, 21, 3
+.L1930:
 	ldrb	w1, [x0]
 	cmp	w1, 255
-	bne	.L1883
-	mov	w21, -1
-	b	.L1866
-.L1883:
+	bne	.L1934
+	mov	w22, -1
+	b	.L1906
+.L1934:
 	sxtw	x23, w1
 	ubfiz	x0, x1, 6, 8
-	add	x1, x20, x23, lsl 6
-	add	x0, x20, x0
+	add	x1, x21, x23, lsl 6
+	add	x0, x21, x0
 	ldrb	w4, [x1, 58]
 	cmp	w4, w2
-	bne	.L1879
+	bne	.L1930
 	ldr	w1, [x1, 40]
 	ubfx	x1, x1, 21, 3
 	cmp	w3, w1
-	bne	.L1879
-	mov	w0, w21
+	bne	.L1930
+	mov	w0, w22
 	mov	w1, 64
 	bl	flash_wait_device_ready
 	mov	w24, w0
-	and	w21, w0, 64
-	tbz	x24, 6, .L1881
-	add	x20, x20, x22, lsl 6
-	ands	w21, w0, 15
-	beq	.L1882
-	ldrb	w1, [x20, 1]
+	and	w22, w0, 64
+	tbz	x24, 6, .L1932
+	add	x21, x21, x20, lsl 6
+	ands	w22, w0, 15
+	beq	.L1933
+	ldrb	w1, [x21, 1]
 	mov	w4, 11
-	ldr	w3, [x20, 40]
-	adrp	x0, .LC118
-	ldr	w2, [x20, 52]
-	add	x0, x0, :lo12:.LC118
-	mov	w21, w24
+	ldr	w3, [x21, 40]
+	adrp	x0, .LC119
+	ldr	w2, [x21, 52]
+	add	x0, x0, :lo12:.LC119
+	mov	w22, w24
 	bl	printf
 	mov	w0, 11
-	strb	w0, [x20, 58]
+	strb	w0, [x21, 58]
 	mov	w0, -1
-	str	w0, [x20, 52]
-.L1881:
-	add	x1, x19, :lo12:.LANCHOR48
-	add	x22, x1, x22, lsl 6
+	str	w0, [x21, 52]
+.L1932:
+	add	x1, x19, :lo12:.LANCHOR49
+	add	x20, x1, x20, lsl 6
 	add	x1, x1, x23, lsl 6
-	ldrb	w0, [x22, 58]
+	ldrb	w0, [x20, 58]
 	strb	w0, [x1, 58]
-	ldr	w0, [x22, 52]
+	ldr	w0, [x20, 52]
 	str	w0, [x1, 52]
-.L1866:
-	mov	w0, w21
+.L1906:
+	mov	w0, w22
+	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 64
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
 	ret
-.L1882:
+.L1933:
 	mov	w0, 12
-	str	wzr, [x20, 52]
-	strb	w0, [x20, 58]
-	b	.L1881
-.L1872:
-	mov	w0, w21
+	str	wzr, [x21, 52]
+	strb	w0, [x21, 58]
+	b	.L1932
+.L1913:
+	mov	w0, w22
 	mov	w1, 32
 	bl	flash_wait_device_ready
-	mov	w21, w0
-	tbz	x21, 5, .L1885
-	add	x19, x19, :lo12:.LANCHOR48
-	tst	x21, 15
-	add	x19, x19, x22, lsl 6
-	beq	.L1884
+	mov	w22, w0
+	tbz	x22, 5, .L1936
+	add	x19, x19, :lo12:.LANCHOR49
+	tst	x22, 15
+	add	x20, x19, x20, lsl 6
+	beq	.L1935
 	mov	w0, 11
-	strb	w0, [x19, 58]
-	b	.L1903
-.L1884:
+	strb	w0, [x20, 58]
+	b	.L1996
+.L1935:
 	mov	w0, 12
-	str	wzr, [x19, 52]
-	strb	w0, [x19, 58]
-	b	.L1885
-.L1873:
+	str	wzr, [x20, 52]
+	strb	w0, [x20, 58]
+	b	.L1936
+.L1914:
 	mov	w1, 64
-	mov	w0, w21
+	mov	w0, w22
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1885
-	add	x19, x19, :lo12:.LANCHOR48
-	add	x19, x19, x22, lsl 6
+	tbz	x0, 6, .L1936
+	add	x19, x19, :lo12:.LANCHOR49
+	add	x19, x19, x20, lsl 6
 	str	w0, [x19, 52]
 	mov	w0, 6
 	strb	w0, [x19, 58]
-	b	.L1885
+	b	.L1936
 	.size	queue_wait_first_req_completed, .-queue_wait_first_req_completed
 	.section	.text.sblk_wait_write_queue_completed,"ax",@progbits
 	.align	2
@@ -11167,19 +11584,19 @@ sblk_wait_write_queue_completed:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR126
-	add	x19, x19, :lo12:.LANCHOR126
-.L1905:
+	adrp	x19, .LANCHOR53
+	add	x19, x19, :lo12:.LANCHOR53
+.L1998:
 	ldrb	w0, [x19]
 	cmp	w0, 255
-	bne	.L1906
+	bne	.L1999
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1906:
+.L1999:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L1905
+	b	.L1998
 	.size	sblk_wait_write_queue_completed, .-sblk_wait_write_queue_completed
 	.section	.text.ftl_read_page,"ax",@progbits
 	.align	2
@@ -11237,74 +11654,127 @@ ftl_read_ppa_page:
 	.global	sblk_read_page
 	.type	sblk_read_page, %function
 sblk_read_page:
-	stp	x29, x30, [sp, -80]!
+	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	and	w21, w1, 255
+	and	w22, w1, 255
 	stp	x19, x20, [sp, 16]
-	mov	w22, w21
+	adrp	x21, .LANCHOR49
 	stp	x23, x24, [sp, 48]
-	mov	x20, x0
-	adrp	x23, .LANCHOR126
-	adrp	x24, .LANCHOR48
 	mov	x19, x0
-	add	x23, x23, :lo12:.LANCHOR126
-	add	x24, x24, :lo12:.LANCHOR48
 	stp	x25, x26, [sp, 64]
-.L1913:
-	cbnz	w22, .L1917
-.L1925:
-	adrp	x19, .LANCHOR48
-	add	x19, x19, :lo12:.LANCHOR48
-.L1918:
-	cbnz	w21, .L1921
-	mov	w0, 0
+	mov	x23, x0
+	adrp	x26, .LANCHOR165
+	mov	w20, w22
+	add	x26, x26, :lo12:.LANCHOR165
+	add	x21, x21, :lo12:.LANCHOR49
+	stp	x27, x28, [sp, 80]
+	adrp	x27, .LANCHOR105
+.L2006:
+	cbnz	w20, .L2016
+.L2029:
+	adrp	x19, .LANCHOR49
+	add	x19, x19, :lo12:.LANCHOR49
+.L2017:
+	cbnz	w22, .L2019
 	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
 	ret
-.L1917:
-	ldrb	w25, [x19]
-	ldr	w26, [x19, 40]
-.L1914:
+.L2016:
+	ldrb	w24, [x19]
+	ldr	w25, [x19, 40]
+.L2007:
 	mov	w1, 0
-	mov	w0, w26
+	mov	w0, w25
 	bl	queue_lun_state
-	cbnz	w0, .L1915
-	ldr	w1, [x19, 40]
-	mov	w0, 48
-	bl	flash_start_page_read
+	cbnz	w0, .L2008
+	cmp	w20, 1
+	beq	.L2013
+	ldrb	w0, [x26]
+	cbnz	w0, .L2010
+.L2013:
+	mov	x0, x19
+	bl	queue_read_cmd
+	b	.L2011
+.L2008:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L2007
+.L2010:
+	ldrb	w0, [x19]
+	ubfx	x4, x25, 21, 3
+	cmp	w0, 255
+	bne	.L2012
+	str	w4, [x29, 124]
+	mov	w2, 624
+	adrp	x1, .LANCHOR166
+	adrp	x0, .LC0
+	add	x1, x1, :lo12:.LANCHOR166
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+	ldr	w4, [x29, 124]
+.L2012:
+	ldrb	w28, [x19]
+	sbfiz	x2, x28, 6, 32
+	add	x3, x21, x2
+	ldr	w1, [x3, 40]
+	ubfx	x0, x1, 21, 3
+	cmp	w4, w0
+	bne	.L2013
+	ldrh	w0, [x27, #:lo12:.LANCHOR105]
+	add	w25, w0, w25
+	cmp	w1, w25
+	bne	.L2013
+	ldr	w0, [x19, 40]
+	adrp	x25, .LANCHOR53
+	ldrb	w24, [x21, x2]
+	add	x25, x25, :lo12:.LANCHOR53
+	stp	x3, x2, [x29, 104]
+	sub	w20, w20, #1
+	bl	flash_start_plane_read
 	strb	wzr, [x19, 59]
-	mov	w0, 1
-	strb	w0, [x19, 58]
-	mov	w0, -1
-	strb	w0, [x19]
+	mov	w5, 2
+	mov	w4, -1
+	strb	w5, [x19, 58]
 	mov	x1, x19
-	mov	x0, x23
+	strb	w4, [x19]
+	mov	x0, x25
+	stp	w5, w4, [x29, 120]
 	bl	buf_add_tail
-	subs	w22, w22, #1
-	beq	.L1925
-	ubfiz	x19, x25, 6, 8
-	add	x19, x24, x19
-	b	.L1913
-.L1915:
-	bl	queue_wait_first_req_completed
-	bl	queue_remove_completed_req
-	b	.L1914
-.L1921:
-	ldrb	w0, [x20, 58]
+	ldp	x3, x2, [x29, 104]
+	strb	wzr, [x3, 59]
+	ldp	w5, w4, [x29, 120]
+	strb	w5, [x3, 58]
+	ubfiz	x1, x28, 6, 8
+	mov	x0, x25
+	add	x1, x21, x1
+	strb	w4, [x21, x2]
+	bl	buf_add_tail
+.L2011:
+	subs	w20, w20, #1
+	beq	.L2029
+	ubfiz	x19, x24, 6, 8
+	add	x19, x21, x19
+	b	.L2006
+.L2019:
+	ldrb	w0, [x23, 58]
 	cmp	w0, 12
-	bne	.L1919
-	ldrb	w20, [x20]
-	sub	w21, w21, #1
-	add	x20, x19, x20, lsl 6
-	b	.L1918
-.L1919:
+	bne	.L2018
+	ldrb	w0, [x23]
+	sub	w22, w22, #1
+	cmp	w0, 255
+	beq	.L2018
+	ubfiz	x23, x0, 6, 8
+	add	x23, x19, x23
+.L2018:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L1918
+	b	.L2017
 	.size	sblk_read_page, .-sblk_read_page
 	.section	.text.gc_check_data_one_wl,"ax",@progbits
 	.align	2
@@ -11312,108 +11782,108 @@ sblk_read_page:
 	.type	gc_check_data_one_wl, %function
 gc_check_data_one_wl:
 	sub	sp, sp, #112
-	adrp	x0, .LANCHOR6
+	adrp	x0, .LANCHOR10
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x19, x20, [sp, 32]
-	adrp	x19, .LANCHOR65
-	add	x20, x19, :lo12:.LANCHOR65
+	adrp	x19, .LANCHOR62
+	add	x20, x19, :lo12:.LANCHOR62
 	stp	x21, x22, [sp, 48]
-	ldr	x21, [x0, #:lo12:.LANCHOR6]
+	ldr	x21, [x0, #:lo12:.LANCHOR10]
 	stp	x23, x24, [sp, 64]
 	ldr	x0, [x20, 8]
 	stp	x25, x26, [sp, 80]
 	str	x27, [sp, 96]
-	cbnz	x0, .L1928
+	cbnz	x0, .L2032
 	mov	w0, 1
 	bl	buf_alloc
 	str	x0, [x20, 8]
-.L1928:
-	add	x0, x19, :lo12:.LANCHOR65
+.L2032:
+	add	x0, x19, :lo12:.LANCHOR62
 	ldr	x20, [x0, 8]
-	cbnz	x20, .L1929
-	adrp	x1, .LANCHOR162
+	cbnz	x20, .L2033
+	adrp	x1, .LANCHOR167
 	adrp	x0, .LC0
 	mov	w2, 366
-	add	x1, x1, :lo12:.LANCHOR162
+	add	x1, x1, :lo12:.LANCHOR167
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1929:
-	adrp	x26, .LANCHOR108
-	adrp	x27, .LANCHOR71
+.L2033:
+	adrp	x26, .LANCHOR105
+	adrp	x27, .LANCHOR68
 	add	x25, x21, 96
-	add	x26, x26, :lo12:.LANCHOR108
-	add	x27, x27, :lo12:.LANCHOR71
+	add	x26, x26, :lo12:.LANCHOR105
+	add	x27, x27, :lo12:.LANCHOR68
 	mov	w24, 0
-.L1930:
+.L2034:
 	ldrb	w0, [x21, 89]
 	cmp	w24, w0
-	bge	.L1939
+	bge	.L2043
 	mov	w23, 1
-	add	x22, x19, :lo12:.LANCHOR65
-	b	.L1940
-.L1938:
+	add	x22, x19, :lo12:.LANCHOR62
+	b	.L2044
+.L2042:
 	ldrh	w0, [x25]
 	ldrh	w1, [x26]
 	ldrb	w2, [x27]
 	cmp	w2, 3
 	mul	w1, w0, w1
 	ldrh	w0, [x22, 16]
-	bne	.L1931
+	bne	.L2035
 	add	w0, w0, w1
 	orr	w0, w0, w23, lsl 24
-.L1951:
+.L2055:
 	str	w0, [x20, 40]
 	mov	w1, 1
 	mov	x0, x20
 	bl	sblk_read_page
 	ldr	w2, [x20, 52]
-	adrp	x1, .LANCHOR146
+	adrp	x1, .LANCHOR147
 	cmn	w2, #1
-	beq	.L1934
+	beq	.L2038
 	ldrh	w0, [x22, 22]
-	ldr	x4, [x1, #:lo12:.LANCHOR146]
+	ldr	x4, [x1, #:lo12:.LANCHOR147]
 	ldr	x3, [x20, 24]
 	lsl	x0, x0, 2
 	ldr	w5, [x4, x0]
 	ldr	w4, [x3, 4]
 	cmp	w5, w4
-	bne	.L1934
-	adrp	x4, .LANCHOR147
-	ldr	x4, [x4, #:lo12:.LANCHOR147]
+	bne	.L2038
+	adrp	x4, .LANCHOR148
+	ldr	x4, [x4, #:lo12:.LANCHOR148]
 	ldr	w4, [x4, x0]
 	ldr	w0, [x3, 8]
 	cmp	w4, w0
-	beq	.L1935
-.L1934:
+	beq	.L2039
+.L2038:
 	ldrh	w0, [x22, 22]
-	ldr	x1, [x1, #:lo12:.LANCHOR146]
+	ldr	x1, [x1, #:lo12:.LANCHOR147]
 	lsl	x0, x0, 2
 	ldr	w3, [x1, x0]
 	cmn	w3, #1
-	beq	.L1935
-	adrp	x1, .LANCHOR9
-	ldr	w1, [x1, #:lo12:.LANCHOR9]
-	tbz	x1, 10, .L1936
+	beq	.L2039
+	adrp	x1, .LANCHOR14
+	ldr	w1, [x1, #:lo12:.LANCHOR14]
+	tbz	x1, 10, .L2040
 	ldr	x1, [x20, 24]
-	adrp	x4, .LANCHOR147
-	ldr	x4, [x4, #:lo12:.LANCHOR147]
+	adrp	x4, .LANCHOR148
+	ldr	x4, [x4, #:lo12:.LANCHOR148]
 	ldr	w5, [x1, 12]
 	str	w5, [sp]
 	ldr	w4, [x4, x0]
-	adrp	x0, .LC119
+	adrp	x0, .LC120
 	ldp	w5, w6, [x1]
-	add	x0, x0, :lo12:.LC119
+	add	x0, x0, :lo12:.LC120
 	ldr	w7, [x1, 8]
 	ldr	w1, [x20, 40]
 	bl	printf
-.L1936:
-	adrp	x0, .LANCHOR5
+.L2040:
+	adrp	x0, .LANCHOR9
 	ldrh	w1, [x21, 80]
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x1, lsl 1]
 	mov	w0, -1
-.L1927:
+.L2031:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -11422,37 +11892,37 @@ gc_check_data_one_wl:
 	ldr	x27, [sp, 96]
 	add	sp, sp, 112
 	ret
-.L1931:
+.L2035:
 	cmp	w2, 2
-	bne	.L1933
+	bne	.L2037
 	sub	w0, w0, #1
 	add	w1, w23, w1
 	add	w0, w0, w1
 	orr	w0, w0, 33554432
-	b	.L1951
-.L1933:
+	b	.L2055
+.L2037:
 	add	w0, w0, w1
-	b	.L1951
-.L1935:
+	b	.L2055
+.L2039:
 	ldrh	w0, [x22, 22]
 	add	w23, w23, 1
 	add	w0, w0, 1
 	strh	w0, [x22, 22]
-.L1940:
+.L2044:
 	ldrh	w0, [x22, 20]
 	cmp	w23, w0
-	ble	.L1938
+	ble	.L2042
 	add	w24, w24, 1
 	add	x25, x25, 2
-	b	.L1930
-.L1939:
-.L1937:
-	add	x19, x19, :lo12:.LANCHOR65
+	b	.L2034
+.L2043:
+.L2041:
+	add	x19, x19, :lo12:.LANCHOR62
 	ldrh	w0, [x19, 16]
 	add	w0, w0, 1
 	strh	w0, [x19, 16]
 	mov	w0, 0
-	b	.L1927
+	b	.L2031
 	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
 	.section	.text.flash_prog_page,"ax",@progbits
 	.align	2
@@ -11464,12 +11934,12 @@ flash_prog_page:
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 255
 	stp	x21, x22, [sp, 32]
-	adrp	x0, .LANCHOR23
-	adrp	x22, .LANCHOR9
+	adrp	x0, .LANCHOR13
+	adrp	x22, .LANCHOR14
 	stp	x25, x26, [sp, 64]
-	ldr	x25, [x0, #:lo12:.LANCHOR23]
+	ldr	x25, [x0, #:lo12:.LANCHOR13]
 	mov	w21, w1
-	ldr	w0, [x22, #:lo12:.LANCHOR9]
+	ldr	w0, [x22, #:lo12:.LANCHOR14]
 	and	x19, x20, 255
 	stp	x23, x24, [sp, 48]
 	add	x23, x19, 8
@@ -11479,22 +11949,22 @@ flash_prog_page:
 	add	x23, x25, x23, lsl 8
 	and	w24, w1, 2097151
 	ubfx	x28, x21, 24, 2
-	tbz	x0, 4, .L1953
-	adrp	x0, .LC120
+	tbz	x0, 4, .L2057
+	adrp	x0, .LC121
 	mov	w3, w4
 	mov	w2, w28
-	add	x0, x0, :lo12:.LC120
+	add	x0, x0, :lo12:.LC121
 	bl	printf
-.L1953:
+.L2057:
 	bl	nandc_wait_flash_ready
 	mov	w0, w20
 	bl	hynix_reconfig_rr_para
 	mov	w0, w20
 	bl	nandc_cs
 	mov	w0, w20
-	cbnz	w28, .L1954
+	cbnz	w28, .L2058
 	bl	zftl_flash_enter_slc_mode
-.L1955:
+.L2059:
 	add	x19, x25, x19, lsl 8
 	mov	w0, 128
 	str	w0, [x19, 2056]
@@ -11521,18 +11991,17 @@ flash_prog_page:
 	mov	x0, x23
 	bl	flash_read_status
 	mov	w2, w0
-	mov	w0, w20
-	bl	nandc_de_cs
+	bl	nandc_de_cs.constprop.29
 	and	w19, w2, 4
-	tbz	x2, 2, .L1952
-	ldr	w0, [x22, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L1952
-	adrp	x0, .LC121
+	tbz	x2, 2, .L2056
+	ldr	w0, [x22, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2056
+	adrp	x0, .LC122
 	mov	w2, w19
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC121
+	add	x0, x0, :lo12:.LC122
 	bl	printf
-.L1952:
+.L2056:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11541,9 +12010,9 @@ flash_prog_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1954:
+.L2058:
 	bl	zftl_flash_exit_slc_mode
-	b	.L1955
+	b	.L2059
 	.size	flash_prog_page, .-flash_prog_page
 	.section	.text.flash_test_blk,"ax",@progbits
 	.align	2
@@ -11557,77 +12026,77 @@ flash_test_blk:
 	stp	x21, x22, [sp, 32]
 	ands	w21, w0, 255
 	str	x23, [sp, 48]
-	bne	.L1968
-	adrp	x0, .LANCHOR163
-	ldrb	w0, [x0, #:lo12:.LANCHOR163]
+	bne	.L2072
+	adrp	x0, .LANCHOR168
+	ldrb	w0, [x0, #:lo12:.LANCHOR168]
 	cmp	w0, w19
-	bhi	.L1972
-.L1968:
-	adrp	x22, .LANCHOR159
-	adrp	x23, .LANCHOR160
+	bhi	.L2076
+.L2072:
+	adrp	x22, .LANCHOR160
+	adrp	x23, .LANCHOR161
 	mov	w2, 32
 	mov	w1, 165
-	ldr	x0, [x22, #:lo12:.LANCHOR159]
+	ldr	x0, [x22, #:lo12:.LANCHOR160]
 	bl	ftl_memset
-	ldr	x0, [x23, #:lo12:.LANCHOR160]
+	ldr	x0, [x23, #:lo12:.LANCHOR161]
 	mov	w2, 8
 	mov	w1, 90
 	bl	ftl_memset
-	adrp	x0, .LANCHOR28
-	ldrh	w20, [x0, #:lo12:.LANCHOR28]
+	adrp	x0, .LANCHOR2
+	ldrh	w20, [x0, #:lo12:.LANCHOR2]
 	mov	w0, w21
 	mul	w20, w20, w19
 	mov	w1, w20
 	bl	flash_erase_block
 	cmn	w0, #1
-	beq	.L1970
+	beq	.L2074
 	adrp	x19, .LANCHOR34
 	add	x19, x19, :lo12:.LANCHOR34
-	ldr	x3, [x22, #:lo12:.LANCHOR159]
+	ldr	x3, [x22, #:lo12:.LANCHOR160]
 	mov	w1, w20
-	ldr	x2, [x23, #:lo12:.LANCHOR160]
+	ldr	x2, [x23, #:lo12:.LANCHOR161]
 	mov	w0, w21
 	ldrb	w4, [x19, 9]
 	bl	flash_prog_page
 	cmn	w0, #1
-	beq	.L1970
+	beq	.L2074
 	ldrb	w4, [x19, 9]
 	mov	w1, w20
-	ldr	x3, [x22, #:lo12:.LANCHOR159]
+	ldr	x3, [x22, #:lo12:.LANCHOR160]
 	mov	w0, w21
-	ldr	x2, [x23, #:lo12:.LANCHOR160]
+	ldr	x2, [x23, #:lo12:.LANCHOR161]
 	bl	flash_read_page
 	mov	w19, w0
 	cmn	w0, #1
-	beq	.L1970
-	ldr	x0, [x23, #:lo12:.LANCHOR160]
+	beq	.L2074
+	ldr	x0, [x23, #:lo12:.LANCHOR161]
 	ldr	w1, [x0]
 	mov	w0, 23130
 	movk	w0, 0x5a5a, lsl 16
 	cmp	w1, w0
-	bne	.L1970
-	ldr	x0, [x22, #:lo12:.LANCHOR159]
+	bne	.L2074
+	ldr	x0, [x22, #:lo12:.LANCHOR160]
 	ldr	w1, [x0]
 	mov	w0, 42405
 	movk	w0, 0xa5a5, lsl 16
 	cmp	w1, w0
-	beq	.L1971
-.L1970:
+	beq	.L2075
+.L2074:
 	mov	w19, -1
-.L1971:
+.L2075:
 	mov	w1, w20
 	mov	w0, w21
 	bl	flash_erase_block
 	mov	w0, w19
-.L1967:
+.L2071:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1972:
+.L2076:
 	mov	w0, 0
-	b	.L1967
+	b	.L2071
 	.size	flash_test_blk, .-flash_test_blk
 	.section	.text.id_block_prog_msb_ff_data,"ax",@progbits
 	.align	2
@@ -11638,50 +12107,50 @@ id_block_prog_msb_ff_data:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	and	w22, w0, 255
-	adrp	x0, .LANCHOR164
+	adrp	x0, .LANCHOR169
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
-	ldrb	w0, [x0, #:lo12:.LANCHOR164]
+	ldrb	w0, [x0, #:lo12:.LANCHOR169]
 	str	x25, [sp, 64]
-	cbnz	w0, .L1983
+	cbnz	w0, .L2087
 	adrp	x20, .LANCHOR34
 	add	x20, x20, :lo12:.LANCHOR34
 	ldrb	w0, [x20, 19]
 	sub	w0, w0, #5
 	and	w3, w0, 255
 	cmp	w3, 63
-	bhi	.L1983
+	bhi	.L2087
 	and	w19, w2, 65535
 	mov	x2, 16391
 	movk	x2, 0x4000, lsl 16
 	movk	x2, 0x8000, lsl 48
 	lsr	x0, x2, x3
-	tbz	x0, 0, .L1983
-	adrp	x21, .LANCHOR132
+	tbz	x0, 0, .L2087
+	adrp	x21, .LANCHOR133
 	mov	w23, w1
-	add	x21, x21, :lo12:.LANCHOR132
+	add	x21, x21, :lo12:.LANCHOR133
 	mov	w25, 65535
-	adrp	x24, .LANCHOR150
-.L1985:
+	adrp	x24, .LANCHOR151
+.L2089:
 	ldrh	w0, [x20, 10]
 	cmp	w0, w19
-	bhi	.L1986
-.L1983:
+	bhi	.L2090
+.L2087:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1986:
+.L2090:
 	ldrh	w0, [x21, w19, sxtw 1]
 	cmp	w0, w25
-	bne	.L1983
-	ldr	x0, [x24, #:lo12:.LANCHOR150]
+	bne	.L2087
+	ldr	x0, [x24, #:lo12:.LANCHOR151]
 	mov	w2, 16384
 	mov	w1, 255
 	bl	ftl_memset
-	ldr	x3, [x24, #:lo12:.LANCHOR150]
+	ldr	x3, [x24, #:lo12:.LANCHOR151]
 	add	w1, w19, w23
 	ldrb	w4, [x20, 9]
 	add	w19, w19, 1
@@ -11689,7 +12158,7 @@ id_block_prog_msb_ff_data:
 	mov	w0, w22
 	and	w19, w19, 65535
 	bl	flash_prog_page
-	b	.L1985
+	b	.L2089
 	.size	id_block_prog_msb_ff_data, .-id_block_prog_msb_ff_data
 	.section	.text.idb_write_data,"ax",@progbits
 	.align	2
@@ -11706,16 +12175,16 @@ idb_write_data:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	bls	.L1989
+	bls	.L2093
 	cmp	w1, 575
-	bhi	.L1990
-	adrp	x0, .LANCHOR165
+	bhi	.L2094
+	adrp	x0, .LANCHOR170
 	mov	x1, x2
 	mov	w2, 1
 	cmp	w4, 64
-	str	w2, [x0, #:lo12:.LANCHOR165]
+	str	w2, [x0, #:lo12:.LANCHOR170]
 	adrp	x0, idb_buf
-	bhi	.L1991
+	bhi	.L2095
 	mov	w2, 64
 	sub	w4, w2, w4
 	sub	w2, w3, w4
@@ -11723,9 +12192,9 @@ idb_write_data:
 	lsl	w2, w2, 9
 	add	x1, x1, x4
 	add	x0, x0, :lo12:idb_buf
-.L2067:
+.L2171:
 	bl	ftl_memcpy
-.L2046:
+.L2150:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -11734,7 +12203,7 @@ idb_write_data:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 256
 	ret
-.L1991:
+.L2095:
 	mov	w2, 576
 	sub	w2, w2, w4
 	cmp	w3, w2
@@ -11744,14 +12213,14 @@ idb_write_data:
 	add	x0, x0, :lo12:idb_buf
 	lsl	w2, w2, 9
 	add	x0, x0, x4
-	b	.L2067
-.L1989:
+	b	.L2171
+.L2093:
 	cmp	w1, 575
-	bls	.L2046
-.L1990:
-	adrp	x0, .LANCHOR165
-	ldr	w0, [x0, #:lo12:.LANCHOR165]
-	cbz	w0, .L2046
+	bls	.L2150
+.L2094:
+	adrp	x0, .LANCHOR170
+	ldr	w0, [x0, #:lo12:.LANCHOR170]
+	cbz	w0, .L2150
 	adrp	x3, .LANCHOR34
 	add	x1, x3, :lo12:.LANCHOR34
 	str	x3, [x29, 176]
@@ -11773,9 +12242,9 @@ idb_write_data:
 	cmp	w27, 512
 	csel	w27, w27, w0, lt
 	mov	w0, 0
-.L1996:
+.L2100:
 	ldr	w5, [x1]
-	cbnz	w5, .L1994
+	cbnz	w5, .L2098
 	ldr	w5, [x6, w0, uxtw 2]
 	add	w0, w0, 1
 	str	w5, [x1], -4
@@ -11783,40 +12252,40 @@ idb_write_data:
 	sub	w2, w2, #1
 	csel	w0, w0, wzr, cc
 	cmp	w2, 4096
-	bne	.L1996
-.L1994:
+	bne	.L2100
+.L2098:
 	add	x0, x3, :lo12:idb_buf
 	mov	w3, w27
 	ldr	w1, [x0, w2, uxtw 2]
-	adrp	x0, .LC122
-	add	x0, x0, :lo12:.LC122
+	adrp	x0, .LC123
+	add	x0, x0, :lo12:.LC123
 	bl	printf
 	stp	wzr, wzr, [x29, 168]
 	adrp	x0, gp_flash_check_buf
 	add	x0, x0, :lo12:gp_flash_check_buf
 	str	x0, [x29, 184]
-.L2030:
+.L2134:
 	adrp	x0, gp_flash_check_buf
 	add	x20, x0, :lo12:gp_flash_check_buf
 	mov	w1, 0
 	mov	w2, 512
 	mov	x0, x20
 	bl	ftl_memset
-	adrp	x0, .LANCHOR22
+	adrp	x0, .LANCHOR26
 	ldr	w1, [x29, 172]
-	ldr	x0, [x0, #:lo12:.LANCHOR22]
+	ldr	x0, [x0, #:lo12:.LANCHOR26]
 	add	x0, x0, x1, uxtw
 	ldrb	w0, [x0, 32]
 	cmp	w0, 255
-	beq	.L1997
+	beq	.L2101
 	ldr	w1, [x29, 132]
-	adrp	x19, .LANCHOR44
+	adrp	x19, .LANCHOR45
 	mul	w26, w0, w1
 	ldr	x0, [x29, 176]
 	add	x25, x0, :lo12:.LANCHOR34
-	ldrb	w0, [x19, #:lo12:.LANCHOR44]
+	ldrb	w0, [x19, #:lo12:.LANCHOR45]
 	str	w0, [x29, 128]
-	strb	wzr, [x19, #:lo12:.LANCHOR44]
+	strb	wzr, [x19, #:lo12:.LANCHOR45]
 	mov	w0, 0
 	ldrb	w21, [x25, 9]
 	ldrh	w23, [x25, 10]
@@ -11828,11 +12297,11 @@ idb_write_data:
 	msub	w23, w23, w22, w26
 	sub	w24, w26, w23
 	cmp	w26, w24
-	bne	.L2036
-	adrp	x0, .LANCHOR24
-	ldrb	w0, [x0, #:lo12:.LANCHOR24]
+	bne	.L2140
+	adrp	x0, .LANCHOR27
+	ldrb	w0, [x0, #:lo12:.LANCHOR27]
 	cmp	w0, 9
-	bne	.L2036
+	bne	.L2140
 	mov	w2, 1024
 	mov	w1, 0
 	mov	x0, x20
@@ -11868,22 +12337,22 @@ idb_write_data:
 	str	w0, [x1, 8]
 	sub	w0, w27, #4
 	str	w0, [x29, 164]
-.L1998:
+.L2102:
 	adrp	x22, idb_buf
-	adrp	x28, .LANCHOR164
+	adrp	x28, .LANCHOR169
 	add	x22, x22, :lo12:idb_buf
-	add	x0, x28, :lo12:.LANCHOR164
-	adrp	x25, .LANCHOR29
+	add	x0, x28, :lo12:.LANCHOR169
+	adrp	x25, .LANCHOR3
 	str	x0, [x29, 152]
 	mov	w20, 0
-	add	x0, x25, :lo12:.LANCHOR29
+	add	x0, x25, :lo12:.LANCHOR3
 	str	x0, [x29, 144]
-.L2000:
+.L2104:
 	cmp	w27, w20
-	bhi	.L2011
+	bhi	.L2115
 	ldr	x0, [x29, 176]
-	add	x25, x19, :lo12:.LANCHOR44
-	strb	wzr, [x19, #:lo12:.LANCHOR44]
+	add	x25, x19, :lo12:.LANCHOR45
+	strb	wzr, [x19, #:lo12:.LANCHOR45]
 	mov	w21, 4
 	add	x0, x0, :lo12:.LANCHOR34
 	mov	w22, 0
@@ -11903,72 +12372,72 @@ idb_write_data:
 	str	w0, [x29, 160]
 	adrp	x0, gp_flash_check_buf
 	add	x20, x0, :lo12:gp_flash_check_buf
-	adrp	x0, .LANCHOR29
-	add	x0, x0, :lo12:.LANCHOR29
+	adrp	x0, .LANCHOR3
+	add	x0, x0, :lo12:.LANCHOR3
 	str	x0, [x29, 104]
-.L2012:
+.L2116:
 	ldr	w0, [x29, 160]
 	cmp	w22, w0
-	bcc	.L2026
-	adrp	x0, .LANCHOR44
+	bcc	.L2130
+	adrp	x0, .LANCHOR45
 	ldrb	w1, [x29, 128]
 	adrp	x3, idb_buf
 	add	x3, x3, :lo12:idb_buf
-	strb	w1, [x0, #:lo12:.LANCHOR44]
+	strb	w1, [x0, #:lo12:.LANCHOR45]
 	mov	x1, 0
 	ldr	w0, [x29, 164]
 	lsl	w0, w0, 7
-.L2027:
+.L2131:
 	mov	w19, w1
 	cmp	w1, w0
-	bcc	.L2028
+	bcc	.L2132
 	ldr	w0, [x29, 168]
 	add	w0, w0, 1
 	str	w0, [x29, 168]
 	cmp	w0, 5
-	bls	.L1997
-	b	.L2032
-.L2036:
+	bls	.L2101
+	b	.L2136
+.L2140:
 	mov	x6, 0
 	str	w27, [x29, 164]
-	b	.L1998
-.L2011:
+	b	.L2102
+.L2115:
 	ldr	x2, [x29, 152]
 	add	w5, w23, w20
 	lsr	w5, w5, 2
-	add	x0, x25, :lo12:.LANCHOR29
+	add	x0, x25, :lo12:.LANCHOR3
 	add	w1, w5, 1
 	ldrb	w2, [x2]
 	ldrh	w0, [x0, w1, sxtw 1]
-	cbz	w2, .L2002
-	adrp	x0, .LANCHOR27
-	ldrb	w3, [x0, #:lo12:.LANCHOR27]
+	cbz	w2, .L2106
+	adrp	x0, .LANCHOR1
+	ldrb	w3, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w1, 1
 	cmp	w3, 0
 	csel	w0, w0, w1, ne
-.L2002:
-	adrp	x1, .LANCHOR24
-	ldrb	w1, [x1, #:lo12:.LANCHOR24]
+.L2106:
+	adrp	x1, .LANCHOR27
+	ldrb	w1, [x1, #:lo12:.LANCHOR27]
 	cmp	w1, 9
-	bne	.L2004
-.L2065:
+	bne	.L2108
+.L2169:
 	str	w0, [x29, 192]
 	mov	w0, 61424
 	str	w0, [x29, 196]
 	ldr	x0, [x29, 144]
 	ldrh	w0, [x0, w5, sxtw 1]
-	cbnz	w2, .L2006
+	cbnz	w2, .L2110
 	mov	w5, w0
-.L2007:
+.L2111:
 	mul	w1, w21, w5
-	adrp	x2, .LANCHOR42
-	adrp	x0, .LANCHOR12
-	cbnz	x6, .L2008
+	adrp	x2, .LANCHOR43
+	adrp	x0, .LANCHOR17
+	cbnz	x6, .L2112
 	ldr	x3, [x29, 176]
 	add	w1, w1, w24
-	ldrb	w7, [x2, #:lo12:.LANCHOR42]
+	ldrb	w7, [x2, #:lo12:.LANCHOR43]
 	add	x3, x3, :lo12:.LANCHOR34
-	ldrb	w0, [x0, #:lo12:.LANCHOR12]
+	ldrb	w0, [x0, #:lo12:.LANCHOR17]
 	str	w5, [x29, 140]
 	str	w7, [x29, 160]
 	ldrb	w6, [x3, 9]
@@ -11983,36 +12452,36 @@ idb_write_data:
 	ldr	w7, [x29, 160]
 	mov	w0, w7
 	bl	nandc_bch_sel
-	ldrb	w0, [x28, #:lo12:.LANCHOR164]
+	ldrb	w0, [x28, #:lo12:.LANCHOR169]
 	ldr	w5, [x29, 140]
-	cbnz	w0, .L2009
+	cbnz	w0, .L2113
 	udiv	w1, w24, w21
 	add	w2, w5, 1
 	bl	id_block_prog_msb_ff_data
-.L2009:
+.L2113:
 	add	x22, x22, 2048
-.L2010:
+.L2114:
 	add	w20, w20, 4
 	mov	x6, 0
 	and	w20, w20, 65535
-	b	.L2000
-.L2004:
+	b	.L2104
+.L2108:
 	sub	w0, w0, #1
 	lsl	w0, w0, 2
-	b	.L2065
-.L2006:
-	adrp	x0, .LANCHOR27
-	ldrb	w1, [x0, #:lo12:.LANCHOR27]
+	b	.L2169
+.L2110:
+	adrp	x0, .LANCHOR1
+	ldrb	w1, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w5, 1
 	cmp	w1, 0
 	csel	w5, w0, w5, ne
-	b	.L2007
-.L2008:
+	b	.L2111
+.L2112:
 	ldr	x3, [x29, 176]
 	add	w1, w1, w24
-	ldrb	w7, [x2, #:lo12:.LANCHOR42]
+	ldrb	w7, [x2, #:lo12:.LANCHOR43]
 	add	x3, x3, :lo12:.LANCHOR34
-	ldrb	w0, [x0, #:lo12:.LANCHOR12]
+	ldrb	w0, [x0, #:lo12:.LANCHOR17]
 	str	w7, [x29, 160]
 	ldrb	w5, [x3, 9]
 	udiv	w5, w1, w5
@@ -12026,24 +12495,24 @@ idb_write_data:
 	ldr	w7, [x29, 160]
 	mov	w0, w7
 	bl	nandc_bch_sel
-	b	.L2010
-.L2026:
+	b	.L2114
+.L2130:
 	add	w19, w28, w22
 	ldr	w0, [x29, 152]
-	adrp	x1, .LANCHOR164
+	adrp	x1, .LANCHOR169
 	sub	w24, w21, w0
 	ldr	x0, [x29, 104]
 	udiv	w19, w19, w21
-	ldrb	w1, [x1, #:lo12:.LANCHOR164]
+	ldrb	w1, [x1, #:lo12:.LANCHOR169]
 	and	w24, w24, 65535
 	and	w19, w19, 65535
 	ldrh	w0, [x0, w19, sxtw 1]
-	cbnz	w1, .L2013
+	cbnz	w1, .L2117
 	mov	w19, w0
-.L2014:
-	adrp	x0, .LANCHOR12
+.L2118:
+	adrp	x0, .LANCHOR17
 	ldr	w1, [x29, 136]
-	ldrb	w23, [x0, #:lo12:.LANCHOR12]
+	ldrb	w23, [x0, #:lo12:.LANCHOR17]
 	ldr	w0, [x29, 152]
 	add	w0, w0, w1
 	ldr	w1, [x29, 140]
@@ -12052,15 +12521,15 @@ idb_write_data:
 	add	x0, x0, :lo12:.LANCHOR34
 	ldrb	w0, [x0, 9]
 	udiv	w19, w19, w0
-	adrp	x0, .LANCHOR42
-	ldrb	w0, [x0, #:lo12:.LANCHOR42]
+	adrp	x0, .LANCHOR43
+	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	str	w0, [x29, 124]
 	mov	w0, w23
 	bl	nandc_bch_sel
-	adrp	x0, .LANCHOR16
-	add	x0, x0, :lo12:.LANCHOR16
+	adrp	x0, .LANCHOR20
+	add	x0, x0, :lo12:.LANCHOR20
 	str	x0, [x29, 112]
-.L2015:
+.L2119:
 	mov	w4, w21
 	add	x3, x29, 192
 	mov	x2, x20
@@ -12069,32 +12538,32 @@ idb_write_data:
 	bl	flash_read_page
 	mov	w5, w0
 	cmn	w0, #1
-	bne	.L2016
+	bne	.L2120
 	ldrb	w6, [x25]
-	cbnz	w6, .L2017
-.L2020:
-	adrp	x0, .LANCHOR155
-	ldr	x6, [x0, #:lo12:.LANCHOR155]
-	cbnz	x6, .L2018
-.L2019:
+	cbnz	w6, .L2121
+.L2124:
+	adrp	x0, .LANCHOR156
+	ldr	x6, [x0, #:lo12:.LANCHOR156]
+	cbnz	x6, .L2122
+.L2123:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
-	cbz	w0, .L2016
+	cbz	w0, .L2120
 	mov	w4, w21
 	add	x3, x29, 192
 	mov	x2, x20
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_ddr_tuning_read
-	b	.L2066
-.L2013:
-	adrp	x0, .LANCHOR27
-	ldrb	w1, [x0, #:lo12:.LANCHOR27]
+	b	.L2170
+.L2117:
+	adrp	x0, .LANCHOR1
+	ldrb	w1, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w19, 1
 	cmp	w1, 0
 	csel	w19, w0, w19, ne
-	b	.L2014
-.L2017:
+	b	.L2118
+.L2121:
 	str	w6, [x29, 100]
 	mov	w4, w21
 	str	w5, [x29, 120]
@@ -12108,21 +12577,21 @@ idb_write_data:
 	ldr	w6, [x29, 100]
 	strb	w6, [x25]
 	ldr	w5, [x29, 120]
-	beq	.L2020
-.L2066:
+	beq	.L2124
+.L2170:
 	mov	w5, w0
-.L2016:
+.L2120:
 	cmn	w5, #1
 	cset	w3, eq
 	cmp	w23, 16
 	cset	w0, ne
 	tst	w3, w0
-	beq	.L2022
+	beq	.L2126
 	mov	w0, 16
 	mov	w23, 16
 	bl	nandc_bch_sel
-	b	.L2015
-.L2018:
+	b	.L2119
+.L2122:
 	str	w5, [x29, 120]
 	mov	w4, w21
 	add	x3, x29, 192
@@ -12132,9 +12601,9 @@ idb_write_data:
 	blr	x6
 	cmn	w0, #1
 	ldr	w5, [x29, 120]
-	beq	.L2019
-	b	.L2066
-.L2022:
+	beq	.L2123
+	b	.L2170
+.L2126:
 	ldr	w0, [x29, 124]
 	bl	nandc_bch_sel
 	cmp	w3, 0
@@ -12144,62 +12613,62 @@ idb_write_data:
 	ldr	w0, [x29, 136]
 	cmp	w22, 0
 	ccmp	w26, w0, 0, eq
-	bne	.L2024
+	bne	.L2128
 	ldr	w0, [x29, 144]
-	cbnz	w0, .L2024
+	cbnz	w0, .L2128
 	ldr	w1, [x20]
 	mov	w0, 18766
 	movk	w0, 0x464e, lsl 16
 	cmp	w1, w0
-	bne	.L2024
+	bne	.L2128
 	ldr	w0, [x29, 160]
 	ldrb	w21, [x20, 17]
 	add	w0, w0, w24
 	str	w0, [x29, 160]
-.L2025:
+.L2129:
 	add	w22, w24, w22
 	and	w22, w22, 65535
-	b	.L2012
-.L2024:
+	b	.L2116
+.L2128:
 	ubfiz	x0, x24, 9, 16
 	str	wzr, [x29, 152]
 	add	x20, x20, x0
-	b	.L2025
-.L2028:
+	b	.L2129
+.L2132:
 	ldr	x4, [x29, 184]
 	lsl	x2, x1, 2
 	add	x1, x1, 1
 	ldr	w4, [x2, x4]
 	ldr	w2, [x3, x2]
 	cmp	w4, w2
-	beq	.L2027
+	beq	.L2131
 	ldr	x0, [x29, 184]
 	mov	w2, 512
 	mov	w1, 0
 	bl	ftl_memset
 	mov	w1, w19
-	adrp	x0, .LC123
-	add	x0, x0, :lo12:.LC123
+	adrp	x0, .LC124
+	add	x0, x0, :lo12:.LC124
 	bl	printf
 	mov	w1, w26
 	mov	w0, 0
 	bl	flash_erase_block
-.L1997:
+.L2101:
 	ldr	w0, [x29, 172]
 	add	w0, w0, 1
 	str	w0, [x29, 172]
 	cmp	w0, 4
-	bne	.L2030
+	bne	.L2134
 	ldr	w0, [x29, 168]
-	cbnz	w0, .L2032
-	adrp	x0, .LC124
+	cbnz	w0, .L2136
+	adrp	x0, .LC125
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC124
+	add	x0, x0, :lo12:.LC125
 	bl	printf
-.L2032:
-	adrp	x0, .LANCHOR165
-	str	wzr, [x0, #:lo12:.LANCHOR165]
-	b	.L2046
+.L2136:
+	adrp	x0, .LANCHOR170
+	str	wzr, [x0, #:lo12:.LANCHOR170]
+	b	.L2150
 	.size	idb_write_data, .-idb_write_data
 	.section	.text.flash_start_tlc_page_prog,"ax",@progbits
 	.align	2
@@ -12208,44 +12677,44 @@ idb_write_data:
 flash_start_tlc_page_prog:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
-	stp	x25, x26, [sp, 64]
+	str	x25, [sp, 64]
 	and	w25, w0, 255
-	adrp	x0, .LANCHOR14
+	adrp	x0, .LANCHOR18
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	and	w19, w3, 255
 	stp	x23, x24, [sp, 48]
 	and	w21, w1, 255
-	ldrb	w0, [x0, #:lo12:.LANCHOR14]
+	ldrb	w0, [x0, #:lo12:.LANCHOR18]
 	and	w22, w2, 255
 	mov	w20, w4
 	mov	x23, x5
 	mov	x24, x6
 	cmp	w0, w19
-	bhi	.L2069
-	adrp	x1, .LANCHOR166
+	bhi	.L2173
+	adrp	x1, .LANCHOR171
 	adrp	x0, .LC0
 	mov	w2, 648
-	add	x1, x1, :lo12:.LANCHOR166
+	add	x1, x1, :lo12:.LANCHOR171
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2069:
-	adrp	x0, .LANCHOR26
-	add	x0, x0, :lo12:.LANCHOR26
-	ldrb	w26, [x0, w19, sxtw]
-	adrp	x0, .LANCHOR23
-	ldr	x19, [x0, #:lo12:.LANCHOR23]
-	mov	w0, w26
+.L2173:
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
+	ldrb	w4, [x0, w19, sxtw]
+	adrp	x0, .LANCHOR13
+	ldr	x19, [x0, #:lo12:.LANCHOR13]
+	mov	w0, w4
 	bl	nandc_cs
-	cbz	w25, .L2070
-	sxtw	x0, w26
+	cbz	w25, .L2174
+	sxtw	x0, w4
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 8
 	str	w25, [x0, 8]
-.L2070:
-	ubfiz	x0, x26, 8, 8
-	add	x19, x19, x0
+.L2174:
+	ubfiz	x4, x4, 8, 8
 	mov	w0, 128
+	add	x19, x19, x4
 	str	w21, [x19, 2056]
 	str	w0, [x19, 2056]
 	and	w0, w20, 255
@@ -12267,14 +12736,13 @@ flash_start_tlc_page_prog:
 	mov	w0, 1
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
-	mov	w0, w26
+	ldr	x25, [sp, 64]
 	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
 	str	w22, [x19, 2056]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 80
-	b	nandc_de_cs
+	b	nandc_de_cs.constprop.29
 	.size	flash_start_tlc_page_prog, .-flash_start_tlc_page_prog
 	.section	.text.queue_tlc_prog_cmd,"ax",@progbits
 	.align	2
@@ -12325,8 +12793,8 @@ queue_tlc_prog_cmd:
 	strb	w0, [x1, 59]
 	mov	w0, -1
 	strb	w0, [x1]
-	adrp	x0, .LANCHOR126
-	add	x0, x0, :lo12:.LANCHOR126
+	adrp	x0, .LANCHOR53
+	add	x0, x0, :lo12:.LANCHOR53
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -12343,21 +12811,21 @@ sblk_tlc_prog_one_page:
 	mov	x19, x0
 	ldr	x0, [x0]
 	ldr	w20, [x0, 40]
-.L2078:
+.L2182:
 	mov	w1, 1
 	mov	w0, w20
 	bl	queue_lun_state
-	cbnz	w0, .L2079
+	cbnz	w0, .L2183
 	mov	x0, x19
 	bl	queue_tlc_prog_cmd
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2079:
+.L2183:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2078
+	b	.L2182
 	.size	sblk_tlc_prog_one_page, .-sblk_tlc_prog_one_page
 	.section	.text.sblk_xlc_prog_pages,"ax",@progbits
 	.align	2
@@ -12374,13 +12842,13 @@ sblk_xlc_prog_pages:
 	stp	x23, x24, [sp, 48]
 	mov	w24, w2
 	ldr	w20, [x0, 40]
-.L2082:
+.L2186:
 	mov	w1, 1
 	mov	w0, w20
 	bl	queue_lun_state
-	cbnz	w0, .L2083
+	cbnz	w0, .L2187
 	cmp	w24, 2
-	bne	.L2084
+	bne	.L2188
 	ldr	x0, [x19]
 	mov	w2, 17
 	ldr	x1, [x22]
@@ -12457,24 +12925,24 @@ sblk_xlc_prog_pages:
 	strb	w0, [x1, 59]
 	mov	w0, -1
 	strb	w0, [x1]
-	adrp	x0, .LANCHOR126
-	add	x0, x0, :lo12:.LANCHOR126
+	adrp	x0, .LANCHOR53
+	add	x0, x0, :lo12:.LANCHOR53
 	bl	buf_add_tail
-.L2085:
+.L2189:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2083:
+.L2187:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2082
-.L2084:
+	b	.L2186
+.L2188:
 	mov	x0, x19
 	bl	queue_tlc_prog_cmd
-	b	.L2085
+	b	.L2189
 	.size	sblk_xlc_prog_pages, .-sblk_xlc_prog_pages
 	.section	.text.flash_start_page_prog,"ax",@progbits
 	.align	2
@@ -12483,110 +12951,93 @@ sblk_xlc_prog_pages:
 flash_start_page_prog:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
-	stp	x25, x26, [sp, 64]
-	adrp	x26, .LANCHOR14
 	stp	x23, x24, [sp, 48]
-	and	w23, w0, 255
+	adrp	x23, .LANCHOR18
+	stp	x25, x26, [sp, 64]
+	and	w24, w0, 255
 	stp	x19, x20, [sp, 16]
-	mov	x24, x2
+	mov	x25, x2
 	stp	x21, x22, [sp, 32]
-	mov	x25, x3
-	ldrb	w0, [x26, #:lo12:.LANCHOR14]
-	and	w19, w1, 2097151
+	mov	x26, x3
+	ldrb	w0, [x23, #:lo12:.LANCHOR18]
+	and	w20, w1, 2097151
 	str	x27, [sp, 80]
 	ubfx	x27, x1, 21, 3
 	ubfx	x22, x1, 24, 2
 	cmp	w0, w27
-	bhi	.L2088
-	adrp	x1, .LANCHOR167
+	bhi	.L2192
+	adrp	x1, .LANCHOR172
 	adrp	x0, .LC0
-	mov	w2, 685
-	add	x1, x1, :lo12:.LANCHOR167
+	mov	w2, 699
+	add	x1, x1, :lo12:.LANCHOR172
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2088:
-	adrp	x0, .LANCHOR26
-	add	x0, x0, :lo12:.LANCHOR26
+.L2192:
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w21, [x0, w27, sxtw]
-	adrp	x0, .LANCHOR23
-	ldr	x20, [x0, #:lo12:.LANCHOR23]
+	adrp	x0, .LANCHOR13
+	ldr	x19, [x0, #:lo12:.LANCHOR13]
 	bl	nandc_rdy_status
-	cbnz	w0, .L2089
-	ldrb	w0, [x26, #:lo12:.LANCHOR14]
+	cbnz	w0, .L2193
+	ldrb	w0, [x23, #:lo12:.LANCHOR18]
 	cmp	w0, 1
-	bne	.L2090
+	bne	.L2194
 	bl	nandc_wait_flash_ready
-.L2089:
+.L2193:
 	mov	w0, w21
 	bl	hynix_reconfig_rr_para
 	mov	w0, w21
 	bl	nandc_cs
-	cbnz	w22, .L2091
-	adrp	x0, .LANCHOR13
-	adrp	x1, .LANCHOR27
-	ldrb	w0, [x0, #:lo12:.LANCHOR13]
-	cbz	w0, .L2092
-	ldrb	w0, [x1, #:lo12:.LANCHOR27]
-	cbz	w0, .L2093
-.L2092:
-	adrp	x0, .LANCHOR28
-	ldrb	w1, [x1, #:lo12:.LANCHOR27]
-	ldrh	w2, [x0, #:lo12:.LANCHOR28]
-	udiv	w0, w19, w2
-	mul	w0, w0, w2
-	sub	w19, w19, w0
-	cbz	w1, .L2094
-	add	w19, w0, w19, lsl 1
-.L2093:
+	cbnz	w22, .L2195
+	mov	w0, w20
+	bl	slc_phy_page_address_calc
+	mov	w20, w0
+	adrp	x0, .LANCHOR0
+	ldrb	w0, [x0, #:lo12:.LANCHOR0]
+	cbz	w0, .L2196
 	mov	w0, w21
 	bl	zftl_flash_enter_slc_mode
-	b	.L2095
-.L2090:
-	mov	w2, 64
-	mov	w1, w19
-	mov	w0, w27
-	bl	flash_wait_device_ready_raw
-	b	.L2089
-.L2094:
-	adrp	x1, .LANCHOR29
-	add	x1, x1, :lo12:.LANCHOR29
-	ldrh	w19, [x1, w19, uxtw 1]
-	add	w19, w19, w0
-.L2095:
-	ubfiz	x0, x21, 8, 8
-	add	x20, x20, x0
+.L2196:
+	ubfiz	x21, x21, 8, 8
 	mov	w0, 128
-	str	w0, [x20, 2056]
-	and	w0, w19, 255
-	str	wzr, [x20, 2052]
-	str	wzr, [x20, 2052]
-	str	w0, [x20, 2052]
-	lsr	w0, w19, 8
-	str	w0, [x20, 2052]
-	lsr	w0, w19, 16
-	str	w0, [x20, 2052]
-	mov	w0, w19
+	add	x19, x19, x21
+	str	w0, [x19, 2056]
+	and	w0, w20, 255
+	str	wzr, [x19, 2052]
+	str	wzr, [x19, 2052]
+	str	w0, [x19, 2052]
+	lsr	w0, w20, 8
+	str	w0, [x19, 2052]
+	lsr	w0, w20, 16
+	str	w0, [x19, 2052]
+	mov	w0, w20
 	bl	nandc_set_seed
 	adrp	x0, .LANCHOR34+9
-	mov	x3, x25
-	mov	x2, x24
+	mov	x3, x26
+	mov	x2, x25
 	ldrb	w1, [x0, #:lo12:.LANCHOR34+9]
 	mov	w0, 1
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
 	ldr	x27, [sp, 80]
-	ldp	x25, x26, [sp, 64]
-	mov	w0, w21
 	ldp	x21, x22, [sp, 32]
-	str	w23, [x20, 2056]
+	ldp	x25, x26, [sp, 64]
+	str	w24, [x19, 2056]
 	ldp	x19, x20, [sp, 16]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 96
-	b	nandc_de_cs
-.L2091:
+	b	nandc_de_cs.constprop.29
+.L2194:
+	mov	w2, 64
+	mov	w1, w20
+	mov	w0, w27
+	bl	flash_wait_device_ready_raw
+	b	.L2193
+.L2195:
 	mov	w0, w21
 	bl	zftl_flash_exit_slc_mode
-	b	.L2095
+	b	.L2196
 	.size	flash_start_page_prog, .-flash_start_page_prog
 	.section	.text.queue_prog_cmd,"ax",@progbits
 	.align	2
@@ -12601,27 +13052,27 @@ queue_prog_cmd:
 	mov	x19, x0
 	mov	w0, 16
 	bl	flash_start_page_prog
-	adrp	x0, .LANCHOR126
+	adrp	x0, .LANCHOR53
 	ldr	w3, [x19, 40]
-	ldrb	w1, [x0, #:lo12:.LANCHOR126]
+	ldrb	w1, [x0, #:lo12:.LANCHOR53]
 	cmp	w1, 255
-	beq	.L2101
-	adrp	x2, .LANCHOR48
-	add	x2, x2, :lo12:.LANCHOR48
+	beq	.L2202
+	adrp	x2, .LANCHOR49
+	add	x2, x2, :lo12:.LANCHOR49
 	ubfx	x3, x3, 21, 3
 	mov	x6, x2
-.L2103:
+.L2204:
 	add	x4, x2, x1, lsl 6
 	ldr	w5, [x4, 40]
 	ubfx	x5, x5, 21, 3
 	cmp	w3, w5
-	bne	.L2102
+	bne	.L2203
 	ldrb	w5, [x4, 58]
 	cmp	w5, 6
-	bne	.L2102
+	bne	.L2203
 	mov	w1, 3
 	strb	w1, [x4, 58]
-.L2101:
+.L2202:
 	mov	w1, 3
 	strb	w1, [x19, 58]
 	mov	w1, 1
@@ -12629,16 +13080,16 @@ queue_prog_cmd:
 	mov	w1, -1
 	strb	w1, [x19]
 	mov	x1, x19
-	add	x0, x0, :lo12:.LANCHOR126
+	add	x0, x0, :lo12:.LANCHOR53
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	buf_add_tail
-.L2102:
+.L2203:
 	lsl	x1, x1, 6
 	ldrb	w1, [x6, x1]
 	cmp	w1, 255
-	bne	.L2103
-	b	.L2101
+	bne	.L2204
+	b	.L2202
 	.size	queue_prog_cmd, .-queue_prog_cmd
 	.section	.text.sblk_prog_page,"ax",@progbits
 	.align	2
@@ -12655,24 +13106,25 @@ sblk_prog_page:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	cbz	w0, .L2110
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 8, .L2110
+	cbz	w0, .L2211
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L2211
 	ldr	w1, [x19, 40]
-	adrp	x0, .LC125
+	adrp	x0, .LC126
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC125
+	add	x0, x0, :lo12:.LC126
 	bl	printf
-.L2110:
+.L2211:
 	adrp	x25, .LANCHOR38
-	adrp	x23, .LANCHOR48
+	adrp	x23, .LANCHOR49
 	add	x25, x25, :lo12:.LANCHOR38
-	add	x23, x23, :lo12:.LANCHOR48
+	add	x23, x23, :lo12:.LANCHOR49
 	mov	w21, 0
 	mov	w24, 1
-.L2111:
-	cbnz	w20, .L2121
+.L2212:
+	cbnz	w20, .L2223
+.L2236:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -12681,52 +13133,53 @@ sblk_prog_page:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2121:
+.L2223:
 	ldrb	w26, [x19]
 	ldr	w22, [x19, 40]
-.L2112:
+.L2213:
 	mov	w1, 1
 	mov	w0, w22
 	bl	queue_lun_state
-	cbnz	w0, .L2113
+	cbnz	w0, .L2214
 	cmp	w20, 1
-	beq	.L2114
+	beq	.L2215
 	ldrb	w0, [x25]
-	cbnz	w0, .L2115
-.L2114:
+	cbnz	w0, .L2216
+.L2215:
 	mov	x0, x19
 	bl	queue_prog_cmd
-.L2116:
+.L2217:
+	subs	w20, w20, #1
+	beq	.L2236
 	ubfiz	x19, x26, 6, 8
-	sub	w20, w20, #1
 	add	x19, x23, x19
-	b	.L2111
-.L2113:
+	b	.L2212
+.L2214:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2112
-.L2115:
+	b	.L2213
+.L2216:
 	ldrb	w0, [x19]
 	ubfx	x27, x22, 21, 3
 	cmp	w0, 255
-	bne	.L2117
-	adrp	x1, .LANCHOR168
+	bne	.L2218
+	adrp	x1, .LANCHOR173
 	adrp	x0, .LC0
-	mov	w2, 489
-	add	x1, x1, :lo12:.LANCHOR168
+	mov	w2, 546
+	add	x1, x1, :lo12:.LANCHOR173
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2117:
+.L2218:
 	ldrb	w0, [x19]
 	add	x0, x23, x0, lsl 6
 	ldr	w5, [x0, 40]
 	ubfx	x0, x5, 21, 3
 	cmp	w27, w0
-	bne	.L2118
-	adrp	x0, .LANCHOR102
-	ldrh	w2, [x0, #:lo12:.LANCHOR102]
-	adrp	x0, .LANCHOR101
-	ldrb	w3, [x0, #:lo12:.LANCHOR101]
+	bne	.L2219
+	adrp	x0, .LANCHOR99
+	ldrh	w2, [x0, #:lo12:.LANCHOR99]
+	adrp	x0, .LANCHOR98
+	ldrb	w3, [x0, #:lo12:.LANCHOR98]
 	mov	w0, 21
 	sub	w0, w0, w2
 	lsl	w1, w24, w2
@@ -12745,9 +13198,9 @@ sblk_prog_page:
 	cmp	w4, w0
 	and	w1, w1, w5
 	ccmp	w22, w1, 0, ne
-	bne	.L2118
+	bne	.L2219
 	cmp	w21, w3
-	beq	.L2118
+	beq	.L2219
 	ldr	w1, [x19, 40]
 	mov	w0, 17
 	ldr	x2, [x19, 8]
@@ -12760,15 +13213,15 @@ sblk_prog_page:
 	mov	w0, -1
 	strb	w0, [x19]
 	mov	x1, x19
-	adrp	x0, .LANCHOR126
-	add	x0, x0, :lo12:.LANCHOR126
+	adrp	x0, .LANCHOR53
+	add	x0, x0, :lo12:.LANCHOR53
 	bl	buf_add_tail
-	b	.L2116
-.L2118:
+	b	.L2217
+.L2219:
 	mov	x0, x19
 	mov	w21, 0
 	bl	queue_prog_cmd
-	b	.L2116
+	b	.L2217
 	.size	sblk_prog_page, .-sblk_prog_page
 	.section	.text.ftl_flush,"ax",@progbits
 	.align	2
@@ -12776,22 +13229,22 @@ sblk_prog_page:
 	.type	ftl_flush, %function
 ftl_flush:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR121
+	adrp	x0, .LANCHOR119
 	add	x29, sp, 0
-	ldrb	w1, [x0, #:lo12:.LANCHOR121]
+	ldrb	w1, [x0, #:lo12:.LANCHOR119]
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	adrp	x20, .LANCHOR169
-	cbz	w1, .L2133
-	ldrb	w2, [x20, #:lo12:.LANCHOR169]
-	adrp	x0, .LANCHOR48
-	add	x0, x0, :lo12:.LANCHOR48
+	adrp	x20, .LANCHOR174
+	cbz	w1, .L2239
+	ldrb	w2, [x20, #:lo12:.LANCHOR174]
+	adrp	x0, .LANCHOR49
+	add	x0, x0, :lo12:.LANCHOR49
 	add	x0, x0, x2, lsl 6
 	bl	sblk_prog_page
-.L2133:
+.L2239:
 	mov	w0, -1
-	strb	wzr, [x19, #:lo12:.LANCHOR121]
-	strb	w0, [x20, #:lo12:.LANCHOR169]
+	strb	wzr, [x19, #:lo12:.LANCHOR119]
+	strb	w0, [x20, #:lo12:.LANCHOR174]
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	ldp	x19, x20, [sp, 16]
@@ -12808,55 +13261,55 @@ flash_prog_page_en:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	and	w22, w0, 255
-	adrp	x0, .LANCHOR14
+	adrp	x0, .LANCHOR18
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	mov	w20, w1
 	stp	x25, x26, [sp, 64]
 	mov	x24, x2
-	ldrb	w0, [x0, #:lo12:.LANCHOR14]
+	ldrb	w0, [x0, #:lo12:.LANCHOR18]
 	mov	x23, x3
 	mov	w25, w4
 	and	w21, w5, 255
 	ubfx	x19, x20, 24, 2
 	cmp	w0, w22
-	bhi	.L2139
-	adrp	x1, .LANCHOR170
+	bhi	.L2245
+	adrp	x1, .LANCHOR175
 	adrp	x0, .LC0
 	mov	w2, 473
-	add	x1, x1, :lo12:.LANCHOR170
+	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2139:
-	adrp	x0, .LANCHOR26
-	add	x0, x0, :lo12:.LANCHOR26
+.L2245:
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w26, [x0, w22, sxtw]
-	cbnz	w19, .L2149
-	adrp	x0, .LANCHOR13
-	ldrb	w1, [x0, #:lo12:.LANCHOR13]
-	adrp	x0, .LANCHOR27
-	cbz	w1, .L2141
-	ldrb	w1, [x0, #:lo12:.LANCHOR27]
-	cbz	w1, .L2149
-.L2141:
-	adrp	x1, .LANCHOR28
-	ldrb	w0, [x0, #:lo12:.LANCHOR27]
-	ldrh	w1, [x1, #:lo12:.LANCHOR28]
+	cbnz	w19, .L2255
+	adrp	x0, .LANCHOR0
+	ldrb	w1, [x0, #:lo12:.LANCHOR0]
+	adrp	x0, .LANCHOR1
+	cbz	w1, .L2247
+	ldrb	w1, [x0, #:lo12:.LANCHOR1]
+	cbz	w1, .L2255
+.L2247:
+	adrp	x1, .LANCHOR2
+	ldrb	w0, [x0, #:lo12:.LANCHOR1]
+	ldrh	w1, [x1, #:lo12:.LANCHOR2]
 	udiv	w19, w20, w1
 	mul	w19, w19, w1
 	sub	w1, w20, w19
-	cbz	w0, .L2142
+	cbz	w0, .L2248
 	add	w19, w19, w1, lsl 1
-.L2140:
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 4, .L2143
-	adrp	x0, .LC126
+.L2246:
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 4, .L2249
+	adrp	x0, .LC127
 	mov	w2, w20
 	mov	w1, w26
-	add	x0, x0, :lo12:.LC126
+	add	x0, x0, :lo12:.LC127
 	bl	printf
-.L2143:
+.L2249:
 	mov	w1, w19
 	mov	w4, w25
 	mov	x3, x23
@@ -12864,68 +13317,68 @@ flash_prog_page_en:
 	mov	w0, w26
 	bl	flash_prog_page
 	mov	w19, w0
-	cbz	w21, .L2144
-	adrp	x26, .LANCHOR159
-	adrp	x21, .LANCHOR160
+	cbz	w21, .L2250
+	adrp	x26, .LANCHOR160
+	adrp	x21, .LANCHOR161
 	mov	w4, w25
 	mov	w1, w20
-	ldr	x3, [x26, #:lo12:.LANCHOR159]
+	ldr	x3, [x26, #:lo12:.LANCHOR160]
 	mov	w0, w22
-	ldr	x2, [x21, #:lo12:.LANCHOR160]
+	ldr	x2, [x21, #:lo12:.LANCHOR161]
 	bl	flash_read_page_en
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2145
-	ldr	x0, [x21, #:lo12:.LANCHOR160]
+	beq	.L2251
+	ldr	x0, [x21, #:lo12:.LANCHOR161]
 	ldr	w1, [x24]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	bne	.L2145
-	ldr	x0, [x26, #:lo12:.LANCHOR159]
+	bne	.L2251
+	ldr	x0, [x26, #:lo12:.LANCHOR160]
 	ldr	w1, [x23]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	beq	.L2144
-.L2145:
-	ldr	x1, [x26, #:lo12:.LANCHOR159]
-	mov	w3, 4
-	adrp	x0, .LC127
-	mov	w2, w3
-	add	x0, x0, :lo12:.LC127
-	bl	rknand_print_hex
-	ldr	x1, [x21, #:lo12:.LANCHOR160]
+	beq	.L2250
+.L2251:
+	ldr	x1, [x26, #:lo12:.LANCHOR160]
 	mov	w3, 4
 	adrp	x0, .LC128
 	mov	w2, w3
 	add	x0, x0, :lo12:.LC128
 	bl	rknand_print_hex
-.L2146:
-	mov	w1, w20
+	ldr	x1, [x21, #:lo12:.LANCHOR161]
+	mov	w3, 4
 	adrp	x0, .LC129
+	mov	w2, w3
 	add	x0, x0, :lo12:.LC129
+	bl	rknand_print_hex
+.L2252:
+	mov	w1, w20
+	adrp	x0, .LC130
+	add	x0, x0, :lo12:.LC130
 	bl	printf
 	mov	w2, 499
-	adrp	x1, .LANCHOR170
+	adrp	x1, .LANCHOR175
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR170
+	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	mov	w0, -1
-	b	.L2147
-.L2142:
-	adrp	x0, .LANCHOR29
-	add	x0, x0, :lo12:.LANCHOR29
+	b	.L2253
+.L2248:
+	adrp	x0, .LANCHOR3
+	add	x0, x0, :lo12:.LANCHOR3
 	ldrh	w0, [x0, w1, uxtw 1]
 	add	w19, w0, w19
-	b	.L2140
-.L2149:
+	b	.L2246
+.L2255:
 	mov	w19, w20
-	b	.L2140
-.L2144:
+	b	.L2246
+.L2250:
 	mov	w0, w19
 	cmn	w19, #1
-	beq	.L2146
-.L2147:
+	beq	.L2252
+.L2253:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -12943,121 +13396,121 @@ ftl_test_block:
 	stp	x23, x24, [sp, 48]
 	adrp	x24, ftl_tmp_buffer
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR171
+	adrp	x25, .LANCHOR176
 	stp	x21, x22, [sp, 32]
-	adrp	x26, .LANCHOR109
+	adrp	x26, .LANCHOR106
 	and	w21, w0, 65535
-	add	x0, x26, :lo12:.LANCHOR109
+	add	x0, x26, :lo12:.LANCHOR106
 	stp	x19, x20, [sp, 16]
 	mov	w23, 0
 	stp	x27, x28, [sp, 80]
 	mov	w20, 0
-	adrp	x27, .LANCHOR101
+	adrp	x27, .LANCHOR98
 	str	x0, [x29, 112]
 	str	wzr, [x24, #:lo12:ftl_tmp_buffer]
-	add	x0, x27, :lo12:.LANCHOR101
-	str	wzr, [x25, #:lo12:.LANCHOR171]
+	add	x0, x27, :lo12:.LANCHOR98
+	str	wzr, [x25, #:lo12:.LANCHOR176]
 	str	x0, [x29, 96]
-.L2161:
+.L2267:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
 	cmp	w0, w20
-	bls	.L2171
-	add	x0, x27, :lo12:.LANCHOR101
+	bls	.L2277
+	add	x0, x27, :lo12:.LANCHOR98
 	mov	w22, 0
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR9
-	add	x0, x0, :lo12:.LANCHOR9
+	adrp	x0, .LANCHOR14
+	add	x0, x0, :lo12:.LANCHOR14
 	str	x0, [x29, 104]
-	b	.L2172
-.L2170:
+	b	.L2278
+.L2276:
 	ldr	x0, [x29, 104]
 	ldr	w0, [x0]
-	tbz	x0, 12, .L2162
-	adrp	x0, .LC130
+	tbz	x0, 12, .L2268
+	adrp	x0, .LC131
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC130
+	add	x0, x0, :lo12:.LC131
 	bl	printf
-.L2162:
+.L2268:
 	ldr	x0, [x29, 96]
 	ldrb	w19, [x0]
 	madd	w19, w21, w19, w22
 	and	w19, w19, 65535
-	cbnz	w20, .L2163
-	adrp	x0, .LANCHOR22
-	ldr	x0, [x0, #:lo12:.LANCHOR22]
+	cbnz	w20, .L2269
+	adrp	x0, .LANCHOR26
+	ldr	x0, [x0, #:lo12:.LANCHOR26]
 	ldrb	w0, [x0, 47]
 	cmp	w0, w19
-	bcs	.L2164
-.L2163:
+	bcs	.L2270
+.L2269:
 	and	w28, w20, 255
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_check_bad_block
-	cbnz	w0, .L2164
-	adrp	x0, .LANCHOR108
+	cbnz	w0, .L2270
+	adrp	x0, .LANCHOR105
 	mov	w1, w23
-	ldrh	w7, [x0, #:lo12:.LANCHOR108]
+	ldrh	w7, [x0, #:lo12:.LANCHOR105]
 	mov	w0, w28
 	mul	w26, w7, w19
 	mov	w2, w26
 	bl	flash_erase_block_en
-	cbz	w0, .L2165
-	adrp	x0, .LANCHOR71
-	ldrb	w0, [x0, #:lo12:.LANCHOR71]
+	cbz	w0, .L2271
+	adrp	x0, .LANCHOR68
+	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w0, 2
-	bne	.L2187
-	adrp	x0, .LANCHOR13
-	ldrb	w0, [x0, #:lo12:.LANCHOR13]
-	cbz	w0, .L2187
+	bne	.L2293
+	adrp	x0, .LANCHOR0
+	ldrb	w0, [x0, #:lo12:.LANCHOR0]
+	cbz	w0, .L2293
 	mov	w2, w26
 	mov	w1, 1
 	mov	w0, w28
 	bl	flash_erase_block_en
-	cbnz	w0, .L2187
-.L2169:
-	adrp	x0, .LANCHOR71
+	cbnz	w0, .L2293
+.L2275:
+	adrp	x0, .LANCHOR68
 	mov	w23, 1
-	ldrb	w0, [x0, #:lo12:.LANCHOR71]
+	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	add	w26, w26, w0, lsl 24
-.L2168:
-	adrp	x0, .LANCHOR123
+.L2274:
+	adrp	x0, .LANCHOR121
 	mov	w5, 1
-	add	x3, x25, :lo12:.LANCHOR171
+	add	x3, x25, :lo12:.LANCHOR176
 	add	x2, x24, :lo12:ftl_tmp_buffer
-	ldrb	w4, [x0, #:lo12:.LANCHOR123]
+	ldrb	w4, [x0, #:lo12:.LANCHOR121]
 	mov	w1, w26
 	mov	w0, w28
 	bl	flash_prog_page_en
-	cbz	w0, .L2164
-.L2187:
+	cbz	w0, .L2270
+.L2293:
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_mask_bad_block
-.L2164:
+.L2270:
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L2172:
+.L2278:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, w22
-	bhi	.L2170
+	bhi	.L2276
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2161
-.L2165:
-	cbz	w23, .L2168
-	b	.L2169
-.L2171:
-	cbz	w23, .L2173
-	adrp	x0, .LANCHOR3
+	b	.L2267
+.L2271:
+	cbz	w23, .L2274
+	b	.L2275
+.L2277:
+	cbz	w23, .L2279
+	adrp	x0, .LANCHOR7
 	mov	w1, 2
-	ldr	x0, [x0, #:lo12:.LANCHOR3]
+	ldr	x0, [x0, #:lo12:.LANCHOR7]
 	add	x21, x0, x21, uxth 2
 	ldrb	w0, [x21, 2]
 	bfi	w0, w1, 3, 2
 	strb	w0, [x21, 2]
-.L2173:
+.L2279:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -13092,18 +13545,18 @@ ftl_prog_page:
 	bl	flash_prog_page_en
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L2188
-	mov	w2, 2147
-	adrp	x1, .LANCHOR172
+	bne	.L2294
+	mov	w2, 2151
+	adrp	x1, .LANCHOR177
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR172
+	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	adrp	x0, .LC129
+	adrp	x0, .LC130
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC129
+	add	x0, x0, :lo12:.LC130
 	bl	printf
-.L2188:
+.L2294:
 	mov	w0, w19
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -13120,69 +13573,69 @@ ftl_info_flush:
 	mov	w1, 0
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR123
+	adrp	x21, .LANCHOR121
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR174
+	adrp	x22, .LANCHOR179
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LANCHOR108
+	adrp	x23, .LANCHOR105
 	stp	x27, x28, [sp, 80]
 	mov	x26, x23
-	ldrb	w2, [x21, #:lo12:.LANCHOR123]
-	add	x25, x22, :lo12:.LANCHOR174
-	add	x28, x23, :lo12:.LANCHOR108
+	ldrb	w2, [x21, #:lo12:.LANCHOR121]
+	add	x25, x22, :lo12:.LANCHOR179
+	add	x28, x23, :lo12:.LANCHOR105
 	mov	w24, 0
 	stp	x19, x20, [sp, 16]
 	mov	w27, w0
-	adrp	x20, .LANCHOR173
+	adrp	x20, .LANCHOR178
 	lsl	w2, w2, 1
-	add	x0, x20, :lo12:.LANCHOR173
+	add	x0, x20, :lo12:.LANCHOR178
 	bl	ftl_memset
-.L2192:
-	add	x0, x22, :lo12:.LANCHOR174
-	ldrb	w6, [x22, #:lo12:.LANCHOR174]
-	ldrh	w19, [x23, #:lo12:.LANCHOR108]
+.L2298:
+	add	x0, x22, :lo12:.LANCHOR179
+	ldrb	w6, [x22, #:lo12:.LANCHOR179]
+	ldrh	w19, [x23, #:lo12:.LANCHOR105]
 	ldrh	w4, [x0, 2]
-	adrp	x0, .LANCHOR100
-	ldr	x0, [x0, #:lo12:.LANCHOR100]
+	adrp	x0, .LANCHOR97
+	ldr	x0, [x0, #:lo12:.LANCHOR97]
 	ldr	w3, [x0, 4]
 	add	w3, w3, 1
 	str	w3, [x0, 4]
-	add	x0, x20, :lo12:.LANCHOR173
-	str	w27, [x20, #:lo12:.LANCHOR173]
+	add	x0, x20, :lo12:.LANCHOR178
+	str	w27, [x20, #:lo12:.LANCHOR178]
 	str	w3, [x0, 4]
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L2193
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2299
 	mov	w2, w4
 	mov	w1, w6
 	str	w4, [x29, 96]
-	adrp	x0, .LC131
+	adrp	x0, .LC132
 	str	w6, [x29, 104]
-	add	x0, x0, :lo12:.LC131
+	add	x0, x0, :lo12:.LC132
 	bl	printf
 	ldr	w4, [x29, 96]
 	ldr	w6, [x29, 104]
-.L2193:
-	adrp	x1, .LANCHOR83
+.L2299:
+	adrp	x1, .LANCHOR80
 	ldrh	w0, [x25, 2]
-	ldrh	w1, [x1, #:lo12:.LANCHOR83]
+	ldrh	w1, [x1, #:lo12:.LANCHOR80]
 	cmp	w1, w0
-	bhi	.L2194
-	adrp	x19, .LANCHOR175
+	bhi	.L2300
+	adrp	x19, .LANCHOR180
 	adrp	x3, .LC0
-	add	x19, x19, :lo12:.LANCHOR175
+	add	x19, x19, :lo12:.LANCHOR180
 	add	x3, x3, :lo12:.LC0
-.L2201:
+.L2307:
 	ldrb	w0, [x25, 1]
-	adrp	x4, .LANCHOR22
+	adrp	x4, .LANCHOR26
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x25, 1]
 	cmp	w0, 7
-	bls	.L2195
+	bls	.L2301
 	mov	x0, 0
-.L2200:
-	ldr	x2, [x4, #:lo12:.LANCHOR22]
+.L2306:
+	ldr	x2, [x4, #:lo12:.LANCHOR26]
 	add	w1, w0, 8
 	and	w24, w0, 65535
 	add	x1, x2, x1, sxtw
@@ -13190,32 +13643,32 @@ ftl_info_flush:
 	add	w1, w2, 127
 	and	w1, w1, 255
 	cmp	w1, 125
-	bhi	.L2196
+	bhi	.L2302
 	mov	x0, x3
 	stp	x4, x3, [x29, 96]
 	mov	w2, 742
 	mov	x1, x19
 	bl	printf
 	ldp	x4, x3, [x29, 96]
-.L2199:
+.L2305:
 	strb	w24, [x25, 1]
 	mov	w24, 1
-.L2195:
-	ldr	x0, [x4, #:lo12:.LANCHOR22]
+.L2301:
+	ldr	x0, [x4, #:lo12:.LANCHOR26]
 	ldrb	w1, [x25, 1]
 	add	x0, x0, x1
 	ldrb	w0, [x0, 40]
 	strb	w0, [x25]
 	cmp	w0, 255
-	beq	.L2201
+	beq	.L2307
 	ldrh	w19, [x28]
 	mul	w19, w19, w0
 	mov	w0, 0
 	mov	w1, w19
 	bl	flash_erase_block
-	ldrb	w4, [x21, #:lo12:.LANCHOR123]
+	ldrb	w4, [x21, #:lo12:.LANCHOR121]
 	mov	w1, w19
-	add	x3, x20, :lo12:.LANCHOR173
+	add	x3, x20, :lo12:.LANCHOR178
 	adrp	x2, ftl_info_data_buffer
 	mov	w0, 0
 	add	x2, x2, :lo12:ftl_info_data_buffer
@@ -13223,53 +13676,53 @@ ftl_info_flush:
 	bl	ftl_prog_page
 	mov	w0, 1
 	strh	w0, [x25, 2]
-.L2202:
-	ldrb	w4, [x21, #:lo12:.LANCHOR123]
+.L2308:
+	ldrb	w4, [x21, #:lo12:.LANCHOR121]
 	mov	w1, w19
-	add	x3, x20, :lo12:.LANCHOR173
+	add	x3, x20, :lo12:.LANCHOR178
 	adrp	x2, ftl_info_data_buffer
 	mov	w0, 0
 	add	x2, x2, :lo12:ftl_info_data_buffer
 	bl	ftl_prog_page
 	cmn	w0, #1
 	ldrh	w1, [x25, 2]
-	adrp	x0, .LANCHOR176
+	adrp	x0, .LANCHOR181
 	add	w1, w1, 1
 	strh	w1, [x25, 2]
-	beq	.L2203
-	ldrb	w1, [x0, #:lo12:.LANCHOR176]
-	cbz	w1, .L2204
-.L2203:
-	strb	wzr, [x0, #:lo12:.LANCHOR176]
-	b	.L2192
-.L2196:
+	beq	.L2309
+	ldrb	w1, [x0, #:lo12:.LANCHOR181]
+	cbz	w1, .L2310
+.L2309:
+	strb	wzr, [x0, #:lo12:.LANCHOR181]
+	b	.L2298
+.L2302:
 	cmp	w2, 255
-	bne	.L2199
+	bne	.L2305
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L2200
+	bne	.L2306
 	mov	w24, w0
-	b	.L2199
-.L2194:
+	b	.L2305
+.L2300:
 	madd	w19, w19, w6, w4
-	cbnz	w0, .L2202
+	cbnz	w0, .L2308
 	mov	w1, w19
 	bl	flash_erase_block
-	b	.L2202
-.L2204:
-	cbnz	w24, .L2205
-.L2213:
-	adrp	x0, .LANCHOR174
-	ldrb	w0, [x0, #:lo12:.LANCHOR174]
+	b	.L2308
+.L2310:
+	cbnz	w24, .L2311
+.L2319:
+	adrp	x0, .LANCHOR179
+	ldrb	w0, [x0, #:lo12:.LANCHOR179]
 	cmp	w0, 255
-	bne	.L2207
-	adrp	x1, .LANCHOR175
+	bne	.L2313
+	adrp	x1, .LANCHOR180
 	adrp	x0, .LC0
 	mov	w2, 778
-	add	x1, x1, :lo12:.LANCHOR175
+	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2207:
+.L2313:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -13278,42 +13731,42 @@ ftl_info_flush:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2205:
+.L2311:
 	ldrb	w19, [x25, 1]
-	adrp	x20, .LANCHOR175
+	adrp	x20, .LANCHOR180
 	adrp	x21, .LC0
-	add	x20, x20, :lo12:.LANCHOR175
+	add	x20, x20, :lo12:.LANCHOR180
 	add	w19, w19, 1
 	add	x21, x21, :lo12:.LC0
-	adrp	x22, .LANCHOR22
-.L2208:
+	adrp	x22, .LANCHOR26
+.L2314:
 	cmp	w19, 7
-	bhi	.L2213
-	ldr	x1, [x22, #:lo12:.LANCHOR22]
+	bhi	.L2319
+	ldr	x1, [x22, #:lo12:.LANCHOR26]
 	add	w0, w19, 8
 	add	x0, x1, x0, sxtw
 	ldrb	w23, [x0, 32]
 	add	w0, w23, 127
 	and	w0, w0, 255
 	cmp	w0, 125
-	bhi	.L2209
+	bhi	.L2315
 	mov	w2, 771
 	mov	x1, x20
 	mov	x0, x21
 	bl	printf
-.L2210:
-	ldrh	w1, [x26, #:lo12:.LANCHOR108]
+.L2316:
+	ldrh	w1, [x26, #:lo12:.LANCHOR105]
 	mov	w0, 0
 	mul	w1, w1, w23
 	bl	flash_erase_block
-	b	.L2211
-.L2209:
+	b	.L2317
+.L2315:
 	cmp	w23, 255
-	bne	.L2210
-.L2211:
+	bne	.L2316
+.L2317:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L2208
+	b	.L2314
 	.size	ftl_info_flush, .-ftl_info_flush
 	.section	.text.ftl_info_blk_init,"ax",@progbits
 	.align	2
@@ -13321,32 +13774,32 @@ ftl_info_flush:
 	.type	ftl_info_blk_init, %function
 ftl_info_blk_init:
 	stp	x29, x30, [sp, -128]!
-	adrp	x0, .LANCHOR177
-	adrp	x1, .LANCHOR176
+	adrp	x0, .LANCHOR182
+	adrp	x1, .LANCHOR181
 	mov	w2, 16384
 	add	x29, sp, 0
-	strb	wzr, [x0, #:lo12:.LANCHOR177]
+	strb	wzr, [x0, #:lo12:.LANCHOR182]
 	mov	w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR176]
-	adrp	x1, .LANCHOR178
+	strb	w0, [x1, #:lo12:.LANCHOR181]
+	adrp	x1, .LANCHOR183
 	stp	x19, x20, [sp, 16]
 	adrp	x20, ftl_info_data_buffer
-	strb	w0, [x1, #:lo12:.LANCHOR178]
-	adrp	x1, .LANCHOR3
+	strb	w0, [x1, #:lo12:.LANCHOR183]
+	adrp	x1, .LANCHOR7
 	add	x0, x20, :lo12:ftl_info_data_buffer
 	stp	x21, x22, [sp, 32]
-	str	x0, [x1, #:lo12:.LANCHOR3]
-	adrp	x1, .LANCHOR2
-	adrp	x22, .LANCHOR100
+	str	x0, [x1, #:lo12:.LANCHOR7]
+	adrp	x1, .LANCHOR6
+	adrp	x22, .LANCHOR97
 	stp	x25, x26, [sp, 64]
-	ldrh	w1, [x1, #:lo12:.LANCHOR2]
-	adrp	x21, .LANCHOR174
+	ldrh	w1, [x1, #:lo12:.LANCHOR6]
+	adrp	x21, .LANCHOR179
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR22
+	adrp	x23, .LANCHOR26
 	stp	x27, x28, [sp, 80]
-	adrp	x26, .LANCHOR108
+	adrp	x26, .LANCHOR105
 	add	x1, x0, x1, lsl 2
-	str	x1, [x22, #:lo12:.LANCHOR100]
+	str	x1, [x22, #:lo12:.LANCHOR97]
 	mov	w1, 0
 	bl	ftl_memset
 	mov	w1, 0
@@ -13354,51 +13807,51 @@ ftl_info_blk_init:
 	adrp	x0, ftl_ext_info_data_buffer
 	add	x0, x0, :lo12:ftl_ext_info_data_buffer
 	bl	ftl_memset
-	adrp	x25, .LANCHOR123
-	ldr	x1, [x23, #:lo12:.LANCHOR22]
-	add	x0, x21, :lo12:.LANCHOR174
+	adrp	x25, .LANCHOR121
+	ldr	x1, [x23, #:lo12:.LANCHOR26]
+	add	x0, x21, :lo12:.LANCHOR179
 	mov	w27, 21574
-	add	x26, x26, :lo12:.LANCHOR108
-	add	x25, x25, :lo12:.LANCHOR123
+	add	x26, x26, :lo12:.LANCHOR105
+	add	x25, x25, :lo12:.LANCHOR121
 	mov	x19, 7
 	strb	wzr, [x0, 1]
 	movk	w27, 0x494c, lsl 16
 	ldrb	w1, [x1, 40]
-	strb	w1, [x21, #:lo12:.LANCHOR174]
+	strb	w1, [x21, #:lo12:.LANCHOR179]
 	strh	wzr, [x0, 2]
-.L2229:
-	ldr	x1, [x23, #:lo12:.LANCHOR22]
+.L2335:
+	ldr	x1, [x23, #:lo12:.LANCHOR26]
 	add	w0, w19, 8
 	sxth	w24, w19
 	mov	w28, w19
 	add	x0, x1, x0, sxtw
 	ldrb	w0, [x0, 32]
 	cmp	w0, 255
-	bne	.L2228
-.L2233:
+	bne	.L2334
+.L2339:
 	sub	x19, x19, #1
 	cmn	x19, #1
-	bne	.L2229
+	bne	.L2335
 	mov	w24, 0
-.L2230:
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L2234
-	ldr	x0, [x22, #:lo12:.LANCHOR100]
+.L2336:
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2340
+	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	mov	w2, 4800
 	mov	w1, w19
 	ldr	w3, [x0]
-	adrp	x0, .LC133
-	add	x0, x0, :lo12:.LC133
+	adrp	x0, .LC134
+	add	x0, x0, :lo12:.LC134
 	bl	printf
-.L2234:
+.L2340:
 	cmn	w19, #1
-	bne	.L2235
+	bne	.L2341
 	mov	w1, 0
 	mov	w2, 16384
 	add	x0, x20, :lo12:ftl_info_data_buffer
 	bl	ftl_memset
-	ldr	x0, [x22, #:lo12:.LANCHOR100]
+	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	mov	w1, 21574
 	movk	w1, 0x494c, lsl 16
 	str	w1, [x0]
@@ -13406,7 +13859,7 @@ ftl_info_blk_init:
 	movk	w1, 0x6, lsl 16
 	str	w1, [x0, 12]
 	mov	w0, w19
-.L2227:
+.L2333:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -13414,12 +13867,12 @@ ftl_info_blk_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2228:
+.L2334:
 	ldrh	w6, [x26]
 	add	x8, x20, :lo12:ftl_info_data_buffer
 	ldrb	w4, [x25]
-	adrp	x7, .LANCHOR173
-	add	x7, x7, :lo12:.LANCHOR173
+	adrp	x7, .LANCHOR178
+	add	x7, x7, :lo12:.LANCHOR178
 	mov	x2, x8
 	mov	x3, x7
 	stp	x7, x8, [x29, 104]
@@ -13432,7 +13885,7 @@ ftl_info_blk_init:
 	cmn	w0, #1
 	ldr	w6, [x29, 124]
 	ldp	x7, x8, [x29, 104]
-	bne	.L2231
+	bne	.L2337
 	ldrb	w4, [x25]
 	mov	x3, x7
 	mov	x2, x8
@@ -13440,58 +13893,58 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_read_page
 	mov	w5, w0
-.L2231:
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L2232
-	ldr	x0, [x22, #:lo12:.LANCHOR100]
+.L2337:
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2338
+	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	mov	w2, w5
 	str	w5, [x29, 124]
 	mov	w3, 672
 	mov	w1, w28
 	ldr	w4, [x0]
-	adrp	x0, .LC132
-	add	x0, x0, :lo12:.LC132
+	adrp	x0, .LC133
+	add	x0, x0, :lo12:.LC133
 	bl	printf
 	ldr	w5, [x29, 124]
-.L2232:
+.L2338:
 	cmn	w5, #1
-	beq	.L2233
-	ldr	x0, [x22, #:lo12:.LANCHOR100]
+	beq	.L2339
+	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L2233
+	bne	.L2339
 	mov	w19, w24
-	b	.L2230
-.L2235:
-	ldr	x1, [x23, #:lo12:.LANCHOR22]
+	b	.L2336
+.L2341:
+	ldr	x1, [x23, #:lo12:.LANCHOR26]
 	add	w0, w24, 8
 	add	x20, x20, :lo12:ftl_info_data_buffer
 	mov	w4, 4
 	mov	x2, x20
-	adrp	x26, .LANCHOR123
+	adrp	x26, .LANCHOR121
 	add	x0, x1, x0, sxtw
 	mov	w27, 21574
-	add	x26, x26, :lo12:.LANCHOR123
+	add	x26, x26, :lo12:.LANCHOR121
 	movk	w27, 0x494c, lsl 16
 	ldrb	w1, [x0, 32]
-	add	x0, x21, :lo12:.LANCHOR174
-	strb	w1, [x21, #:lo12:.LANCHOR174]
+	add	x0, x21, :lo12:.LANCHOR179
+	strb	w1, [x21, #:lo12:.LANCHOR179]
 	strb	w24, [x0, 1]
-	adrp	x24, .LANCHOR173
-	add	x24, x24, :lo12:.LANCHOR173
+	adrp	x24, .LANCHOR178
+	add	x24, x24, :lo12:.LANCHOR178
 	mov	w0, 0
 	mov	x3, x24
 	bl	flash_get_last_written_page
 	sxth	w23, w0
 	add	w0, w0, 1
 	and	w19, w0, 65535
-	adrp	x0, .LANCHOR108
-	ldrb	w25, [x21, #:lo12:.LANCHOR174]
-	ldrh	w0, [x0, #:lo12:.LANCHOR108]
+	adrp	x0, .LANCHOR105
+	ldrb	w25, [x21, #:lo12:.LANCHOR179]
+	ldrh	w0, [x0, #:lo12:.LANCHOR105]
 	madd	w25, w25, w0, w23
-.L2237:
-	tbnz	w23, #31, .L2240
+.L2343:
+	tbnz	w23, #31, .L2346
 	ldrb	w4, [x26]
 	mov	x3, x24
 	mov	x2, x20
@@ -13499,16 +13952,16 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_read_page
 	cmn	w0, #1
-	beq	.L2238
-	ldr	x0, [x22, #:lo12:.LANCHOR100]
+	beq	.L2344
+	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L2238
-.L2240:
-	add	x21, x21, :lo12:.LANCHOR174
+	bne	.L2344
+.L2346:
+	add	x21, x21, :lo12:.LANCHOR179
 	strh	w19, [x21, 2]
 	bl	ftl_tmp_into_update
-	ldr	x1, [x22, #:lo12:.LANCHOR100]
+	ldr	x1, [x22, #:lo12:.LANCHOR97]
 	ldr	w0, [x1, 64]
 	add	w0, w0, 1
 	str	w0, [x1, 64]
@@ -13517,12 +13970,12 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_info_flush
 	mov	w0, 0
-	b	.L2227
-.L2238:
+	b	.L2333
+.L2344:
 	sub	w23, w23, #1
 	sub	w25, w25, #1
 	sxth	w23, w23
-	b	.L2237
+	b	.L2343
 	.size	ftl_info_blk_init, .-ftl_info_blk_init
 	.section	.text.ftl_ext_info_flush,"ax",@progbits
 	.align	2
@@ -13530,57 +13983,57 @@ ftl_info_blk_init:
 	.type	ftl_ext_info_flush, %function
 ftl_ext_info_flush:
 	stp	x29, x30, [sp, -96]!
-	adrp	x0, .LANCHOR6
+	adrp	x0, .LANCHOR10
 	add	x29, sp, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR6]
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	ldr	w1, [x0, 520]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbz	w1, .L2256
+	cbz	w1, .L2362
 	str	wzr, [x0, 520]
-.L2256:
-	adrp	x20, .LANCHOR83
-	adrp	x22, .LANCHOR179
-	adrp	x21, .LANCHOR102
-	add	x20, x20, :lo12:.LANCHOR83
-	add	x22, x22, :lo12:.LANCHOR179
-	add	x21, x21, :lo12:.LANCHOR102
+.L2362:
+	adrp	x20, .LANCHOR80
+	adrp	x22, .LANCHOR184
+	adrp	x21, .LANCHOR99
+	add	x20, x20, :lo12:.LANCHOR80
+	add	x22, x22, :lo12:.LANCHOR184
+	add	x21, x21, :lo12:.LANCHOR99
 	mov	w0, 0
 	bl	ftl_total_vpn_update
-.L2257:
-	adrp	x23, .LANCHOR100
+.L2363:
+	adrp	x23, .LANCHOR97
 	mov	x24, x23
-.L2260:
-	ldr	x0, [x23, #:lo12:.LANCHOR100]
+.L2366:
+	ldr	x0, [x23, #:lo12:.LANCHOR97]
 	ldr	w1, [x0, 56]
 	add	w1, w1, 1
 	str	w1, [x0, 56]
 	ldrh	w1, [x0, 140]
 	ldrh	w0, [x20]
 	cmp	w1, w0
-	bcc	.L2258
+	bcc	.L2364
 	bl	ftl_ext_alloc_new_blk
-.L2258:
-	ldr	x0, [x24, #:lo12:.LANCHOR100]
+.L2364:
+	ldr	x0, [x24, #:lo12:.LANCHOR97]
 	ldrh	w1, [x0, 130]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2259
+	bne	.L2365
 	adrp	x0, .LC0
 	mov	w2, 1747
 	mov	x1, x22
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2259:
-	ldr	x1, [x24, #:lo12:.LANCHOR100]
+.L2365:
+	ldr	x1, [x24, #:lo12:.LANCHOR97]
 	mov	w19, 21
 	ldrh	w0, [x21]
-	adrp	x26, .LANCHOR123
-	adrp	x27, .LANCHOR173
-	add	x25, x27, :lo12:.LANCHOR173
+	adrp	x26, .LANCHOR121
+	adrp	x27, .LANCHOR178
+	add	x25, x27, :lo12:.LANCHOR178
 	sub	w0, w19, w0
 	mov	w19, 1
 	ldrh	w2, [x1, 130]
@@ -13588,43 +14041,43 @@ ftl_ext_info_flush:
 	sub	w19, w19, #1
 	and	w19, w19, w2
 	asr	w28, w2, w0
-	adrp	x0, .LANCHOR108
-	ldrh	w2, [x0, #:lo12:.LANCHOR108]
+	adrp	x0, .LANCHOR105
+	ldrh	w2, [x0, #:lo12:.LANCHOR105]
 	ldrh	w0, [x1, 140]
 	mov	w1, 0
 	madd	w19, w19, w2, w0
-	ldrb	w2, [x26, #:lo12:.LANCHOR123]
+	ldrb	w2, [x26, #:lo12:.LANCHOR121]
 	mov	x0, x25
 	and	w19, w19, 65535
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	ldr	x0, [x24, #:lo12:.LANCHOR100]
+	ldr	x0, [x24, #:lo12:.LANCHOR97]
 	mov	w1, w19
-	ldrb	w4, [x26, #:lo12:.LANCHOR123]
+	ldrb	w4, [x26, #:lo12:.LANCHOR121]
 	mov	x3, x25
-	str	wzr, [x27, #:lo12:.LANCHOR173]
+	str	wzr, [x27, #:lo12:.LANCHOR178]
 	adrp	x2, ftl_ext_info_data_buffer
 	add	x2, x2, :lo12:ftl_ext_info_data_buffer
 	ldr	w0, [x0, 56]
 	str	w0, [x25, 4]
 	mov	w0, w28
 	bl	ftl_prog_page
-	ldr	x2, [x24, #:lo12:.LANCHOR100]
+	ldr	x2, [x24, #:lo12:.LANCHOR97]
 	ldrh	w1, [x2, 140]
 	add	w1, w1, 1
 	and	w1, w1, 65535
 	strh	w1, [x2, 140]
 	cmp	w1, 1
-	beq	.L2260
+	beq	.L2366
 	cmn	w0, #1
-	adrp	x0, .LANCHOR178
-	beq	.L2261
-	ldrb	w1, [x0, #:lo12:.LANCHOR178]
-	cbz	w1, .L2262
-.L2261:
-	strb	wzr, [x0, #:lo12:.LANCHOR178]
-	b	.L2257
-.L2262:
+	adrp	x0, .LANCHOR183
+	beq	.L2367
+	ldrb	w1, [x0, #:lo12:.LANCHOR183]
+	cbz	w1, .L2368
+.L2367:
+	strb	wzr, [x0, #:lo12:.LANCHOR183]
+	b	.L2363
+.L2368:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -13640,90 +14093,93 @@ ftl_ext_info_flush:
 	.type	ftl_ext_info_init, %function
 ftl_ext_info_init:
 	stp	x29, x30, [sp, -112]!
-	adrp	x0, .LANCHOR118
+	adrp	x0, .LANCHOR115
 	mov	w4, 4
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR100
-	strh	wzr, [x0, #:lo12:.LANCHOR118]
-	ldr	x0, [x23, #:lo12:.LANCHOR100]
 	stp	x19, x20, [sp, 16]
-	mov	w19, 1
-	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR173
+	adrp	x20, .LANCHOR97
+	strh	wzr, [x0, #:lo12:.LANCHOR115]
+	mov	w19, 21
+	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	stp	x21, x22, [sp, 32]
-	adrp	x26, ftl_ext_info_data_buffer
-	ldrh	w20, [x0, 130]
-	adrp	x0, .LANCHOR102
 	stp	x27, x28, [sp, 80]
-	add	x3, x25, :lo12:.LANCHOR173
-	ldrh	w1, [x0, #:lo12:.LANCHOR102]
-	mov	w0, 21
-	add	x2, x26, :lo12:ftl_ext_info_data_buffer
-	sub	w0, w0, w1
+	stp	x23, x24, [sp, 48]
+	adrp	x24, .LANCHOR178
+	ldrh	w1, [x0, 130]
+	adrp	x0, .LANCHOR99
+	stp	x25, x26, [sp, 64]
+	add	x3, x24, :lo12:.LANCHOR178
+	ldrh	w0, [x0, #:lo12:.LANCHOR99]
+	adrp	x25, ftl_ext_info_data_buffer
+	add	x2, x25, :lo12:ftl_ext_info_data_buffer
+	sub	w0, w19, w0
+	mov	w19, 1
 	lsl	w19, w19, w0
 	sub	w19, w19, #1
-	and	w19, w19, w20
-	asr	w20, w20, w0
-	and	w20, w20, 255
+	asr	w21, w1, w0
+	and	w19, w19, w1
+	and	w27, w21, 255
 	mov	w1, w19
-	mov	w0, w20
+	mov	w0, w27
 	bl	flash_get_last_written_page
 	sxth	w22, w0
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L2273
-	adrp	x1, .LANCHOR180
-	adrp	x0, .LC72
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2379
+	ldr	x0, [x20, #:lo12:.LANCHOR97]
+	adrp	x1, .LANCHOR185
+	and	w4, w21, 65535
 	mov	w3, w22
 	mov	w2, 1791
-	add	x1, x1, :lo12:.LANCHOR180
-	add	x0, x0, :lo12:.LC72
+	add	x1, x1, :lo12:.LANCHOR185
+	ldrh	w5, [x0, 130]
+	adrp	x0, .LC135
+	add	x0, x0, :lo12:.LC135
 	bl	printf
-.L2273:
-	adrp	x27, .LANCHOR123
-	adrp	x28, .LANCHOR108
+.L2379:
+	adrp	x26, .LANCHOR121
+	adrp	x28, .LANCHOR105
 	mov	w5, 20038
-	add	x27, x27, :lo12:.LANCHOR123
-	add	x28, x28, :lo12:.LANCHOR108
-	mov	w24, 0
+	add	x26, x26, :lo12:.LANCHOR121
+	add	x28, x28, :lo12:.LANCHOR105
+	mov	w23, 0
 	movk	w5, 0x4549, lsl 16
-.L2274:
+.L2380:
 	and	w21, w22, 65535
-	sub	w0, w21, w24
-	tbnz	x0, 15, .L2279
+	sub	w0, w21, w23
+	tbnz	x0, 15, .L2385
 	ldrh	w0, [x28]
-	sub	w1, w22, w24
-	ldrb	w4, [x27]
-	add	x3, x25, :lo12:.LANCHOR173
+	sub	w1, w22, w23
+	ldrb	w4, [x26]
+	add	x3, x24, :lo12:.LANCHOR178
 	str	w5, [x29, 108]
-	add	x2, x26, :lo12:ftl_ext_info_data_buffer
+	add	x2, x25, :lo12:ftl_ext_info_data_buffer
 	madd	w1, w0, w19, w1
-	mov	w0, w20
+	mov	w0, w27
 	bl	flash_read_page_en
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
 	ldr	w5, [x29, 108]
-	beq	.L2275
-	adrp	x0, .LANCHOR6
-	ldr	x0, [x0, #:lo12:.LANCHOR6]
+	beq	.L2381
+	adrp	x0, .LANCHOR10
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x0]
 	cmp	w0, w5
-	bne	.L2275
-.L2279:
+	bne	.L2381
+.L2385:
 	bl	zftl_sblk_list_init
-	ldr	x0, [x23, #:lo12:.LANCHOR100]
+	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	ldrh	w1, [x0, 140]
 	cmp	w1, w22
-	bgt	.L2277
+	bgt	.L2383
 	add	w21, w21, 1
 	strh	w21, [x0, 140]
 	bl	ftl_ext_info_flush
-.L2277:
-	adrp	x0, .LANCHOR6
+.L2383:
+	adrp	x0, .LANCHOR10
 	mov	w1, -1
 	ldp	x19, x20, [sp, 16]
-	ldr	x0, [x0, #:lo12:.LANCHOR6]
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	strh	w1, [x0, 584]
@@ -13735,14 +14191,14 @@ ftl_ext_info_init:
 	str	wzr, [x0, 520]
 	str	wzr, [x0, 604]
 	str	wzr, [x0, 608]
-	adrp	x0, .LANCHOR66
-	strh	w1, [x0, #:lo12:.LANCHOR66]
+	adrp	x0, .LANCHOR63
+	strh	w1, [x0, #:lo12:.LANCHOR63]
 	mov	w0, 0
 	ldp	x29, x30, [sp], 112
 	ret
-.L2275:
-	add	w24, w24, 1
-	b	.L2274
+.L2381:
+	add	w23, w23, 1
+	b	.L2380
 	.size	ftl_ext_info_init, .-ftl_ext_info_init
 	.section	.text.ftl_low_format_data_init,"ax",@progbits
 	.align	2
@@ -13759,87 +14215,91 @@ ftl_low_format_data_init:
 	str	x21, [sp, 32]
 	bl	ftl_memset
 	bl	zftl_sblk_list_init
-	adrp	x19, .LANCHOR100
+	adrp	x19, .LANCHOR97
 	mov	w0, 1
 	bl	ftl_alloc_sblk
 	mov	w1, 0
 	mov	w21, w0
 	bl	ftl_erase_sblk
-	ldr	x1, [x19, #:lo12:.LANCHOR100]
+	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	mov	w0, w21
 	add	x1, x1, 672
 	bl	ftl_get_blk_list_in_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	ldrh	w20, [x0, 672]
 	strh	wzr, [x0, 690]
 	mov	w0, 65533
 	sub	w1, w20, #1
 	cmp	w0, w1, uxth
-	bcs	.L2288
-	adrp	x1, .LANCHOR181
+	bcs	.L2394
+	adrp	x1, .LANCHOR186
 	adrp	x0, .LC0
 	mov	w2, 1974
-	add	x1, x1, :lo12:.LANCHOR181
+	add	x1, x1, :lo12:.LANCHOR186
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2288:
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+.L2394:
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	w2, 256
 	mov	w1, 255
 	add	x0, x0, 416
 	strh	wzr, [x0, 280]
 	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	w2, 4096
 	mov	w1, 0
 	add	x0, x0, 704
 	bl	ftl_memset
-	adrp	x1, .LANCHOR102
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
-	ldrh	w2, [x1, #:lo12:.LANCHOR102]
+	adrp	x1, .LANCHOR99
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	ldrh	w2, [x1, #:lo12:.LANCHOR99]
 	mov	w1, 21
 	sub	w1, w1, w2
-	strh	w20, [x0, 692]
 	strh	w21, [x0, 416]
+	adrp	x21, .LANCHOR10
+	strh	w20, [x0, 692]
 	asr	w1, w20, w1
 	strh	w1, [x0, 694]
 	mov	w1, 1
 	strh	w1, [x0, 688]
-	adrp	x1, .LANCHOR182
-	adrp	x20, .LANCHOR6
-	ldrh	w1, [x1, #:lo12:.LANCHOR182]
+	adrp	x1, .LANCHOR187
+	ldrh	w1, [x1, #:lo12:.LANCHOR187]
 	strh	w1, [x0, 698]
-	ldr	x0, [x20, #:lo12:.LANCHOR6]
+	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	mov	w1, 20038
 	movk	w1, 0x4549, lsl 16
 	str	w1, [x0]
 	bl	ftl_alloc_sys_blk
-	mov	w21, w0
+	mov	w20, w0
 	mov	w1, 0
 	bl	ftl_erase_phy_blk
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	w1, 2
-	strh	w21, [x0, 130]
+	strh	w20, [x0, 130]
+	mov	w20, -1
 	strh	wzr, [x0, 140]
-	ldr	x0, [x20, #:lo12:.LANCHOR6]
+	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	add	x0, x0, 16
+	strh	w20, [x0, 568]
+	strh	w20, [x0, 570]
+	strh	w20, [x0, 572]
+	strh	w20, [x0, 574]
 	bl	ftl_open_sblk_init
-	ldr	x0, [x20, #:lo12:.LANCHOR6]
+	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	mov	w1, 3
 	add	x0, x0, 48
 	bl	ftl_open_sblk_init
-	ldr	x1, [x19, #:lo12:.LANCHOR100]
-	ldr	x0, [x20, #:lo12:.LANCHOR6]
+	ldr	x1, [x19, #:lo12:.LANCHOR97]
+	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	add	x0, x0, 136
 	ldrh	w2, [x1, 134]
 	strh	w2, [x0, -10]
+	strh	w20, [x0, -56]
 	mov	w2, -1
+	strh	w20, [x0, -6]
+	str	w2, [x0, 408]
 	strh	wzr, [x0, -12]
-	strh	w2, [x0, -56]
-	strh	w2, [x0, -6]
-	mov	w2, -1
 	strh	wzr, [x0, -16]
-	str	w2, [x0, 408]
 	strh	wzr, [x0, -14]
 	strh	w2, [x1, 126]
 	mov	w2, 256
@@ -13848,7 +14308,7 @@ ftl_low_format_data_init:
 	str	wzr, [x0, 388]
 	str	wzr, [x0, 392]
 	bl	ftl_memset
-	ldr	x0, [x20, #:lo12:.LANCHOR6]
+	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	mov	w2, 128
 	mov	w1, 255
 	add	x0, x0, 392
@@ -13870,82 +14330,82 @@ ftl_low_format_data_init:
 ftl_low_format:
 	stp	x29, x30, [sp, -80]!
 	mov	w1, 0
-	adrp	x0, .LC134
-	add	x0, x0, :lo12:.LC134
+	adrp	x0, .LC136
+	add	x0, x0, :lo12:.LC136
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR183
+	adrp	x20, .LANCHOR188
 	stp	x21, x22, [sp, 32]
-	add	x20, x20, :lo12:.LANCHOR183
+	add	x20, x20, :lo12:.LANCHOR188
 	stp	x25, x26, [sp, 64]
-	adrp	x22, .LANCHOR22
+	adrp	x22, .LANCHOR26
 	mov	x25, x22
 	stp	x23, x24, [sp, 48]
 	mov	w19, 8
 	adrp	x23, .LC0
 	bl	printf
-.L2293:
-	ldr	x0, [x22, #:lo12:.LANCHOR22]
+.L2399:
+	ldr	x0, [x22, #:lo12:.LANCHOR26]
 	add	x0, x0, x19, sxtw
 	ldrb	w21, [x0, 32]
 	add	w0, w21, 127
 	and	w0, w0, 255
 	cmp	w0, 125
-	bhi	.L2291
-	mov	w2, 2024
+	bhi	.L2397
+	mov	w2, 2028
 	mov	x1, x20
 	add	x0, x23, :lo12:.LC0
 	bl	printf
-.L2291:
+.L2397:
 	cmp	w21, 255
-	beq	.L2292
-	adrp	x0, .LANCHOR108
-	ldrh	w1, [x0, #:lo12:.LANCHOR108]
+	beq	.L2398
+	adrp	x0, .LANCHOR105
+	ldrh	w1, [x0, #:lo12:.LANCHOR105]
 	mov	w0, 0
 	mul	w1, w1, w21
 	bl	flash_erase_block
-.L2292:
+.L2398:
 	add	w19, w19, 1
 	cmp	w19, 16
-	bne	.L2293
+	bne	.L2399
 	bl	sblk_init
-	adrp	x22, .LANCHOR3
+	adrp	x22, .LANCHOR7
 	bl	ftl_info_blk_init
-	adrp	x19, .LANCHOR2
+	adrp	x19, .LANCHOR6
 	mov	w2, 16384
 	mov	w1, 0
 	adrp	x0, ftl_info_data_buffer
 	add	x0, x0, :lo12:ftl_info_data_buffer
 	bl	ftl_memset
-	ldr	x0, [x22, #:lo12:.LANCHOR3]
+	ldr	x0, [x22, #:lo12:.LANCHOR7]
 	mov	w3, 1
-	ldrh	w2, [x19, #:lo12:.LANCHOR2]
+	ldrh	w2, [x19, #:lo12:.LANCHOR6]
 	add	x2, x0, x2, lsl 2
-.L2294:
+.L2400:
 	cmp	x0, x2
-	bne	.L2295
-	adrp	x21, .LANCHOR100
+	bne	.L2401
+	adrp	x21, .LANCHOR97
 	mov	w1, 21574
-	adrp	x24, .LANCHOR62
-	add	x24, x24, :lo12:.LANCHOR62
-	ldr	x0, [x21, #:lo12:.LANCHOR100]
+	adrp	x24, .LANCHOR59
+	add	x24, x24, :lo12:.LANCHOR59
+	ldr	x0, [x21, #:lo12:.LANCHOR97]
 	movk	w1, 0x494c, lsl 16
 	mov	w20, 0
 	mov	w26, 1
 	strh	wzr, [x0, 148]
 	str	w1, [x0]
-.L2296:
-	ldrh	w0, [x19, #:lo12:.LANCHOR2]
-	adrp	x23, .LANCHOR101
+.L2402:
+	ldrh	w0, [x19, #:lo12:.LANCHOR6]
+	adrp	x23, .LANCHOR98
 	cmp	w0, w20
-	bhi	.L2304
-	ldr	x0, [x25, #:lo12:.LANCHOR22]
+	bhi	.L2410
+	ldr	x0, [x25, #:lo12:.LANCHOR26]
 	mov	w4, 3
-	ldrb	w2, [x23, #:lo12:.LANCHOR101]
+	ldrb	w2, [x23, #:lo12:.LANCHOR98]
 	mov	w10, 15
-	ldr	x6, [x21, #:lo12:.LANCHOR100]
+	ldr	x6, [x21, #:lo12:.LANCHOR97]
 	cmp	w2, 1
-	ldr	x1, [x22, #:lo12:.LANCHOR3]
+	ldr	x1, [x22, #:lo12:.LANCHOR7]
 	ldrb	w0, [x0, 47]
 	csinc	w4, w4, wzr, ne
 	and	w4, w4, 255
@@ -13957,7 +14417,7 @@ ftl_low_format:
 	add	x0, x0, 4
 	add	w20, w5, 1
 	add	x0, x1, x0
-.L2307:
+.L2413:
 	cmp	w2, 4
 	add	x1, x1, 4
 	csel	w7, w10, w4, eq
@@ -13966,40 +14426,40 @@ ftl_low_format:
 	orr	w7, w7, -32
 	strb	w7, [x1, -2]
 	cmp	x1, x0
-	bne	.L2307
+	bne	.L2413
 	mul	w5, w5, w8
 	mov	w4, 16
 	add	w0, w3, w8
 	sdiv	w4, w4, w2
 	add	w0, w5, w0, uxth
 	strh	w0, [x6, 148]
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	add	w4, w20, w4
 	and	w4, w4, 65535
 	strh	w4, [x6, 134]
-	tbz	x0, 12, .L2308
-	adrp	x0, .LC135
+	tbz	x0, 12, .L2414
+	adrp	x0, .LC137
 	mov	w3, w20
 	mov	w2, 128
-	mov	w1, 2070
-	add	x0, x0, :lo12:.LC135
+	mov	w1, 2074
+	add	x0, x0, :lo12:.LC137
 	bl	printf
-.L2308:
-	ldr	x0, [x21, #:lo12:.LANCHOR100]
+.L2414:
+	ldr	x0, [x21, #:lo12:.LANCHOR97]
 	mov	w2, 128
 	mov	w1, 255
 	add	x0, x0, 160
 	bl	ftl_memset
-	adrp	x0, .LANCHOR109
-	ldrb	w13, [x23, #:lo12:.LANCHOR101]
-	ldr	x2, [x21, #:lo12:.LANCHOR100]
+	adrp	x0, .LANCHOR106
+	ldrb	w13, [x23, #:lo12:.LANCHOR98]
+	ldr	x2, [x21, #:lo12:.LANCHOR97]
 	mov	w4, 21
-	ldrb	w15, [x0, #:lo12:.LANCHOR109]
-	adrp	x0, .LANCHOR102
+	ldrb	w15, [x0, #:lo12:.LANCHOR106]
+	adrp	x0, .LANCHOR99
 	and	w16, w13, 65535
-	ldr	x14, [x22, #:lo12:.LANCHOR3]
-	ldrh	w0, [x0, #:lo12:.LANCHOR102]
+	ldr	x14, [x22, #:lo12:.LANCHOR7]
+	ldrh	w0, [x0, #:lo12:.LANCHOR99]
 	mov	w3, 0
 	ldrh	w12, [x2, 134]
 	sub	w0, w4, w0
@@ -14008,10 +14468,10 @@ ftl_low_format:
 	lsl	w4, w4, w0
 	and	w1, w1, 65535
 	and	w4, w4, 65535
-.L2309:
+.L2415:
 	cmp	w20, w12
-	bcc	.L2315
-	ldrh	w0, [x19, #:lo12:.LANCHOR2]
+	bcc	.L2421
+	ldrh	w0, [x19, #:lo12:.LANCHOR6]
 	strh	w3, [x2, 112]
 	sub	w0, w0, w12
 	strh	wzr, [x2, 114]
@@ -14026,37 +14486,37 @@ ftl_low_format:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2295:
+.L2401:
 	ldrb	w1, [x0, 2]
 	add	x0, x0, 4
 	and	w1, w1, 31
 	bfi	w1, w3, 3, 2
 	strb	w1, [x0, -2]
-	b	.L2294
-.L2304:
+	b	.L2400
+.L2410:
 	strh	w20, [x24]
 	mov	w0, w20
 	bl	ftl_test_block
-	ldrb	w11, [x23, #:lo12:.LANCHOR101]
-	adrp	x0, .LANCHOR109
-	ldr	x6, [x22, #:lo12:.LANCHOR3]
+	ldrb	w11, [x23, #:lo12:.LANCHOR98]
+	adrp	x0, .LANCHOR106
+	ldr	x6, [x22, #:lo12:.LANCHOR7]
 	mov	w7, 0
-	ldrb	w14, [x0, #:lo12:.LANCHOR109]
+	ldrb	w14, [x0, #:lo12:.LANCHOR106]
 	mov	w10, 0
-	ldr	x13, [x21, #:lo12:.LANCHOR100]
+	ldr	x13, [x21, #:lo12:.LANCHOR97]
 	mov	w8, 0
 	mul	w12, w20, w11
 	add	x6, x6, x20, uxth 2
-.L2297:
+.L2403:
 	cmp	w8, w14
-	bcs	.L2301
+	bcs	.L2407
 	add	w15, w11, w7
-	b	.L2302
-.L2300:
+	b	.L2408
+.L2406:
 	add	w1, w7, w12
 	mov	w0, w8
 	bl	flash_check_bad_block
-	cbz	w0, .L2298
+	cbz	w0, .L2404
 	ldrb	w1, [x6, 3]
 	lsl	w0, w26, w7
 	orr	w0, w0, w1
@@ -14064,29 +14524,29 @@ ftl_low_format:
 	ldrh	w0, [x13, 148]
 	add	w0, w0, 1
 	strh	w0, [x13, 148]
-.L2299:
+.L2405:
 	add	w7, w7, 1
-.L2302:
+.L2408:
 	cmp	w7, w15
-	bne	.L2300
+	bne	.L2406
 	add	w8, w8, 1
 	sub	w12, w12, w11
 	and	w8, w8, 65535
-	b	.L2297
-.L2298:
+	b	.L2403
+.L2404:
 	add	w10, w10, 1
 	and	w10, w10, 65535
-	b	.L2299
-.L2301:
-	cbnz	w10, .L2303
+	b	.L2405
+.L2407:
+	cbnz	w10, .L2409
 	ldrb	w0, [x6, 2]
 	orr	w0, w0, -32
 	strb	w0, [x6, 2]
-.L2303:
+.L2409:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2296
-.L2315:
+	b	.L2402
+.L2421:
 	add	x10, x14, x20, uxth 2
 	mov	w6, 0
 	mov	w8, 0
@@ -14094,48 +14554,48 @@ ftl_low_format:
 	ldrb	w0, [x10, 2]
 	orr	w0, w0, -32
 	strb	w0, [x10, 2]
-.L2310:
+.L2416:
 	cmp	w5, w15
-	bcc	.L2317
+	bcc	.L2423
 	add	w20, w20, 1
 	add	w1, w16, w1
 	and	w20, w20, 65535
 	and	w1, w1, 65535
-	b	.L2309
-.L2313:
+	b	.L2415
+.L2419:
 	ldrb	w11, [x10, 3]
 	add	w17, w8, w7
 	asr	w11, w11, w17
-	tbnz	x11, 0, .L2311
+	tbnz	x11, 0, .L2417
 	cmp	w13, 1
-	bls	.L2316
+	bls	.L2422
 	and	w0, w0, 1
 	add	w0, w1, w0
 	and	w0, w0, 65535
-.L2312:
+.L2418:
 	add	x11, x2, x3, sxtw 1
 	add	w3, w3, 1
 	and	w3, w3, 65535
 	add	w0, w0, w6
 	strh	w0, [x11, 160]
-.L2311:
+.L2417:
 	add	x7, x7, 1
-.L2314:
+.L2420:
 	and	w0, w7, 65535
 	cmp	w0, w16
-	bcc	.L2313
+	bcc	.L2419
 	add	w5, w5, 1
 	add	w6, w6, w4
 	and	w5, w5, 65535
 	add	w8, w8, w13
 	and	w6, w6, 65535
-	b	.L2310
-.L2316:
+	b	.L2416
+.L2422:
 	mov	w0, w1
-	b	.L2312
-.L2317:
+	b	.L2418
+.L2423:
 	mov	x7, 0
-	b	.L2314
+	b	.L2420
 	.size	ftl_low_format, .-ftl_low_format
 	.section	.text.ftl_re_low_format,"ax",@progbits
 	.align	2
@@ -14144,27 +14604,27 @@ ftl_low_format:
 ftl_re_low_format:
 	stp	x29, x30, [sp, -16]!
 	mov	w1, 1
-	adrp	x0, .LC136
-	add	x0, x0, :lo12:.LC136
+	adrp	x0, .LC138
+	add	x0, x0, :lo12:.LC138
 	add	x29, sp, 0
 	bl	printf
 	bl	sblk_init
 	bl	ftl_info_blk_init
 	bl	ftl_ext_info_init
-	adrp	x0, .LANCHOR100
-	adrp	x2, .LANCHOR2
+	adrp	x0, .LANCHOR97
+	adrp	x2, .LANCHOR6
 	mov	w3, 0
 	mov	w4, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR100]
+	ldr	x0, [x0, #:lo12:.LANCHOR97]
 	mov	w5, 0
-	ldrh	w7, [x2, #:lo12:.LANCHOR2]
-	adrp	x2, .LANCHOR3
-	ldr	x2, [x2, #:lo12:.LANCHOR3]
+	ldrh	w7, [x2, #:lo12:.LANCHOR6]
+	adrp	x2, .LANCHOR7
+	ldr	x2, [x2, #:lo12:.LANCHOR7]
 	ldrh	w1, [x0, 134]
 	add	x2, x2, x1, uxth 2
-.L2328:
+.L2434:
 	cmp	w1, w7
-	bcc	.L2332
+	bcc	.L2438
 	strh	w5, [x0, 114]
 	strh	w4, [x0, 118]
 	strh	w3, [x0, 116]
@@ -14175,29 +14635,29 @@ ftl_re_low_format:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L2332:
+.L2438:
 	ldrb	w6, [x2, 2]
 	and	w8, w6, 31
 	strb	w8, [x2, 2]
 	ands	w6, w6, 24
-	bne	.L2329
+	bne	.L2435
 	add	w5, w5, 1
 	and	w5, w5, 65535
-.L2330:
+.L2436:
 	add	w1, w1, 1
 	add	x2, x2, 4
 	and	w1, w1, 65535
-	b	.L2328
-.L2329:
+	b	.L2434
+.L2435:
 	cmp	w6, 16
-	bne	.L2331
+	bne	.L2437
 	add	w4, w4, 1
 	and	w4, w4, 65535
-	b	.L2330
-.L2331:
+	b	.L2436
+.L2437:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L2330
+	b	.L2436
 	.size	ftl_re_low_format, .-ftl_re_low_format
 	.section	.text.ftl_prog_ppa_page,"ax",@progbits
 	.align	2
@@ -14219,50 +14679,50 @@ ftl_prog_ppa_page:
 ftl_write_last_log_page:
 	ldrh	w1, [x0, 6]
 	cmp	w1, 1
-	bne	.L2337
+	bne	.L2443
 	stp	x29, x30, [sp, -48]!
-	adrp	x1, .LANCHOR114
+	adrp	x1, .LANCHOR111
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
 	stp	x21, x22, [sp, 32]
-	ldr	x20, [x1, #:lo12:.LANCHOR114]
+	ldr	x20, [x1, #:lo12:.LANCHOR111]
 	ldrh	w22, [x0, 12]
 	bl	ftl_get_new_free_page
 	mov	w21, w0
 	cmn	w0, #1
-	beq	.L2338
+	beq	.L2444
 	ldrh	w0, [x19]
 	add	x20, x20, x22, uxth 2
 	bl	ftl_vpn_decrement
-	adrp	x0, .LANCHOR171
+	adrp	x0, .LANCHOR176
 	mov	w1, 15555
-	add	x6, x0, :lo12:.LANCHOR171
+	add	x6, x0, :lo12:.LANCHOR176
 	movk	w1, 0xf55f, lsl 16
-	str	w1, [x0, #:lo12:.LANCHOR171]
-	adrp	x0, .LANCHOR83
-	ldrh	w1, [x0, #:lo12:.LANCHOR83]
-	adrp	x0, .LANCHOR76
-	ldrb	w0, [x0, #:lo12:.LANCHOR76]
+	str	w1, [x0, #:lo12:.LANCHOR176]
+	adrp	x0, .LANCHOR80
+	ldrh	w1, [x0, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR73
+	ldrb	w0, [x0, #:lo12:.LANCHOR73]
 	mul	w1, w1, w0
 	mov	x0, x20
 	lsl	w1, w1, 2
 	bl	js_hash
 	stp	w0, wzr, [x6, 4]
-	adrp	x0, .LANCHOR123
+	adrp	x0, .LANCHOR121
 	mov	x2, x6
 	mov	x1, x20
-	ldrb	w3, [x0, #:lo12:.LANCHOR123]
+	ldrb	w3, [x0, #:lo12:.LANCHOR121]
 	mov	w0, w21
 	str	wzr, [x6, 12]
 	bl	ftl_prog_ppa_page
-.L2338:
+.L2444:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L2337:
+.L2443:
 	mov	w0, -1
 	ret
 	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
@@ -14274,142 +14734,142 @@ ftl_open_sblk_recovery:
 	stp	x29, x30, [sp, -144]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR9
+	adrp	x22, .LANCHOR14
 	stp	x27, x28, [sp, 80]
 	mov	x28, x0
-	ldr	w0, [x22, #:lo12:.LANCHOR9]
+	ldr	w0, [x22, #:lo12:.LANCHOR14]
 	stp	x25, x26, [sp, 64]
 	mov	x25, x1
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
-	tbz	x0, 12, .L2344
+	tbz	x0, 12, .L2450
 	ldrh	w1, [x28, 2]
-	adrp	x0, .LC137
-	add	x0, x0, :lo12:.LC137
+	adrp	x0, .LC139
+	add	x0, x0, :lo12:.LC139
 	bl	printf
-.L2344:
-	ldr	w0, [x22, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L2345
+.L2450:
+	ldr	w0, [x22, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2451
 	ldrb	w1, [x28, 5]
-	adrp	x0, .LC138
-	add	x0, x0, :lo12:.LC138
+	adrp	x0, .LC140
+	add	x0, x0, :lo12:.LC140
 	bl	printf
-.L2345:
-	ldr	w0, [x22, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L2346
+.L2451:
+	ldr	w0, [x22, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2452
 	ldrh	w1, [x28]
-	adrp	x0, .LC139
-	add	x0, x0, :lo12:.LC139
+	adrp	x0, .LC141
+	add	x0, x0, :lo12:.LC141
 	bl	printf
-.L2346:
-	ldr	w0, [x22, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L2347
+.L2452:
+	ldr	w0, [x22, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2453
 	ldrh	w2, [x28, 18]
-	adrp	x0, .LC140
+	adrp	x0, .LC142
 	ldrh	w1, [x28, 16]
-	add	x0, x0, :lo12:.LC140
+	add	x0, x0, :lo12:.LC142
 	bl	printf
-.L2347:
+.L2453:
 	ldrh	w0, [x28, 10]
 	strh	w0, [x28, 14]
-	adrp	x0, .LANCHOR2
+	adrp	x0, .LANCHOR6
 	ldrh	w1, [x28]
-	ldrh	w0, [x0, #:lo12:.LANCHOR2]
+	ldrh	w0, [x0, #:lo12:.LANCHOR6]
 	cmp	w1, w0
-	bcs	.L2343
+	bcs	.L2449
 	mov	w0, 1
 	bl	buf_alloc
 	ldrb	w20, [x28, 5]
 	mov	x19, x0
 	ldrh	w21, [x28, 2]
-	adrp	x26, .LANCHOR123
+	adrp	x26, .LANCHOR121
 	mov	w27, 0
-	add	x0, x26, :lo12:.LANCHOR123
-	adrp	x23, .LANCHOR83
+	add	x0, x26, :lo12:.LANCHOR121
+	adrp	x23, .LANCHOR80
 	str	x0, [x29, 128]
-.L2350:
-	ldrh	w0, [x23, #:lo12:.LANCHOR83]
+.L2456:
+	ldrh	w0, [x23, #:lo12:.LANCHOR80]
 	cmp	w0, w21
-	bhi	.L2363
-.L2353:
+	bhi	.L2469
+.L2459:
 	ldrh	w0, [x28, 10]
 	ldrh	w1, [x28, 6]
-	ldrh	w2, [x23, #:lo12:.LANCHOR83]
+	ldrh	w2, [x23, #:lo12:.LANCHOR80]
 	add	w1, w1, w0
 	ldrb	w0, [x28, 9]
 	strh	w21, [x28, 2]
 	strb	w20, [x28, 5]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L2364
-	adrp	x1, .LANCHOR184
+	beq	.L2470
+	adrp	x1, .LANCHOR189
 	adrp	x0, .LC0
 	mov	w2, 1473
-	add	x1, x1, :lo12:.LANCHOR184
+	add	x1, x1, :lo12:.LANCHOR189
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2364:
-	adrp	x21, .LANCHOR114
+.L2470:
+	adrp	x21, .LANCHOR111
 	ldrh	w3, [x28, 10]
 	mov	w0, 0
 	mov	w1, 0
-	ldr	x5, [x21, #:lo12:.LANCHOR114]
-.L2365:
+	ldr	x5, [x21, #:lo12:.LANCHOR111]
+.L2471:
 	cmp	w1, w3
-	bcc	.L2367
+	bcc	.L2473
 	ldrb	w20, [x28, 9]
-	adrp	x24, .LANCHOR5
-	ldrh	w1, [x23, #:lo12:.LANCHOR83]
+	adrp	x24, .LANCHOR9
+	ldrh	w1, [x23, #:lo12:.LANCHOR80]
 	madd	w20, w20, w1, w0
-	ldr	w0, [x22, #:lo12:.LANCHOR9]
+	ldr	w0, [x22, #:lo12:.LANCHOR14]
 	sub	w20, w20, w3
 	and	w20, w20, 65535
-	tbz	x0, 12, .L2368
+	tbz	x0, 12, .L2474
 	ldrh	w1, [x28]
-	ldr	x2, [x24, #:lo12:.LANCHOR5]
+	ldr	x2, [x24, #:lo12:.LANCHOR9]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w3, [x2, x0]
-	adrp	x0, .LC141
+	adrp	x0, .LC143
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC141
+	add	x0, x0, :lo12:.LC143
 	bl	printf
-.L2368:
-	ldr	x0, [x24, #:lo12:.LANCHOR5]
-	adrp	x25, .LANCHOR123
+.L2474:
+	ldr	x0, [x24, #:lo12:.LANCHOR9]
+	adrp	x25, .LANCHOR121
 	ldrh	w1, [x28]
-	adrp	x24, .LANCHOR76
-	adrp	x26, .LC142
-	add	x24, x24, :lo12:.LANCHOR76
-	add	x25, x25, :lo12:.LANCHOR123
-	add	x26, x26, :lo12:.LC142
+	adrp	x24, .LANCHOR73
+	adrp	x26, .LC144
+	add	x24, x24, :lo12:.LANCHOR73
+	add	x25, x25, :lo12:.LANCHOR121
+	add	x26, x26, :lo12:.LC144
 	strh	w20, [x0, x1, lsl 1]
 	mov	w20, 0
 	mov	x0, x19
 	bl	buf_free
-.L2369:
+.L2475:
 	ldrb	w0, [x24]
 	cmp	w20, w0, lsl 1
-	bcc	.L2372
+	bcc	.L2478
 	ldrh	w1, [x28, 12]
-	ldrh	w0, [x23, #:lo12:.LANCHOR83]
+	ldrh	w0, [x23, #:lo12:.LANCHOR80]
 	ldrb	w2, [x28, 9]
 	madd	w0, w0, w2, w1
 	mov	x1, -4
 	add	x0, x1, x0, sxtw 2
-	ldr	x1, [x21, #:lo12:.LANCHOR114]
+	ldr	x1, [x21, #:lo12:.LANCHOR111]
 	ldr	w0, [x1, x0]
 	cmn	w0, #1
-	beq	.L2373
-	adrp	x1, .LANCHOR184
+	beq	.L2479
+	adrp	x1, .LANCHOR189
 	adrp	x0, .LC0
 	mov	w2, 1503
-	add	x1, x1, :lo12:.LANCHOR184
+	add	x1, x1, :lo12:.LANCHOR189
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2373:
+.L2479:
 	ldrh	w0, [x28, 6]
 	cmp	w0, 1
-	bne	.L2343
+	bne	.L2449
 	ldp	x19, x20, [sp, 16]
 	mov	x0, x28
 	ldp	x21, x22, [sp, 32]
@@ -14418,27 +14878,27 @@ ftl_open_sblk_recovery:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	b	ftl_write_last_log_page
-.L2363:
+.L2469:
 	ldrb	w20, [x28, 5]
-	adrp	x24, .LANCHOR108
-	add	x0, x24, :lo12:.LANCHOR108
+	adrp	x24, .LANCHOR105
+	add	x0, x24, :lo12:.LANCHOR105
 	str	x0, [x29, 136]
-.L2351:
+.L2457:
 	ldrb	w0, [x28, 9]
 	cmp	w0, w20
-	bhi	.L2362
+	bhi	.L2468
 	add	w21, w21, 1
 	strb	wzr, [x28, 5]
 	and	w21, w21, 65535
-	b	.L2350
-.L2362:
+	b	.L2456
+.L2468:
 	add	x0, x28, x20, sxtw 1
 	mov	w1, 65535
 	ldrh	w0, [x0, 16]
 	cmp	w0, w1
-	beq	.L2352
+	beq	.L2458
 	ldr	x1, [x29, 136]
-	ldrb	w3, [x26, #:lo12:.LANCHOR123]
+	ldrb	w3, [x26, #:lo12:.LANCHOR121]
 	ldr	x2, [x19, 24]
 	ldrh	w5, [x1]
 	ldr	x1, [x19, 8]
@@ -14446,84 +14906,84 @@ ftl_open_sblk_recovery:
 	bl	ftl_read_ppa_page
 	mov	w24, w0
 	cmp	w0, 512
-	beq	.L2353
+	beq	.L2459
 	cmn	w0, #1
-	beq	.L2354
+	beq	.L2460
 	ldr	x0, [x19, 24]
 	ldr	w1, [x0]
 	cmn	w1, #1
-	bne	.L2354
+	bne	.L2460
 	ldr	w0, [x0, 4]
 	cmn	w0, #1
-	bne	.L2354
+	bne	.L2460
 	ldr	x0, [x19, 8]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L2353
-.L2354:
-	adrp	x0, .LANCHOR177
+	beq	.L2459
+.L2460:
+	adrp	x0, .LANCHOR182
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR177]
+	strb	w1, [x0, #:lo12:.LANCHOR182]
 	ldrb	w0, [x28, 9]
 	ldrh	w1, [x28, 10]
 	madd	w0, w0, w21, w20
 	cmp	w1, w0
-	beq	.L2355
-	adrp	x1, .LANCHOR184
+	beq	.L2461
+	adrp	x1, .LANCHOR189
 	adrp	x0, .LC0
 	mov	w2, 1396
-	add	x1, x1, :lo12:.LANCHOR184
+	add	x1, x1, :lo12:.LANCHOR189
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2355:
+.L2461:
 	ldrh	w0, [x28, 10]
 	ldrh	w1, [x28, 6]
 	ldrb	w2, [x28, 9]
 	add	w1, w1, w0
-	ldrh	w0, [x23, #:lo12:.LANCHOR83]
+	ldrh	w0, [x23, #:lo12:.LANCHOR80]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L2356
-	adrp	x1, .LANCHOR184
+	beq	.L2462
+	adrp	x1, .LANCHOR189
 	adrp	x0, .LC0
 	mov	w2, 1397
-	add	x1, x1, :lo12:.LANCHOR184
+	add	x1, x1, :lo12:.LANCHOR189
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2356:
+.L2462:
 	cmn	w24, #1
-	beq	.L2358
+	beq	.L2464
 	ldr	x0, [x19, 24]
 	ldr	w0, [x0, 4]
 	cmn	w0, #1
-	beq	.L2358
+	beq	.L2464
 	bl	lpa_hash_get_ppa
-	cbz	x25, .L2360
+	cbz	x25, .L2466
 	ldr	x3, [x19, 24]
 	ldr	w1, [x3, 8]
 	cmp	w0, w1
-	beq	.L2360
+	beq	.L2466
 	cmn	w0, #1
-	beq	.L2360
-	adrp	x6, .LANCHOR102
+	beq	.L2466
+	adrp	x6, .LANCHOR99
 	mov	w5, 21
 	mov	w27, 1
-	ldrh	w7, [x6, #:lo12:.LANCHOR102]
+	ldrh	w7, [x6, #:lo12:.LANCHOR99]
 	sub	w1, w5, w7
 	lsr	w2, w0, w7
-	adrp	x7, .LANCHOR101
+	adrp	x7, .LANCHOR98
 	lsl	w1, w27, w1
 	sub	w1, w1, #1
 	and	w1, w1, w2
-	ldrb	w2, [x7, #:lo12:.LANCHOR101]
+	ldrb	w2, [x7, #:lo12:.LANCHOR98]
 	udiv	w1, w1, w2
 	ldrh	w2, [x25]
 	cmp	w2, w1, uxth
-	bne	.L2360
+	bne	.L2466
 	ldr	x1, [x29, 128]
-	adrp	x8, .LANCHOR173
+	adrp	x8, .LANCHOR178
 	ldr	w10, [x3]
-	add	x2, x8, :lo12:.LANCHOR173
+	add	x2, x8, :lo12:.LANCHOR178
 	stp	w5, w10, [x29, 112]
 	str	x8, [x29, 120]
 	ldrb	w3, [x1]
@@ -14532,25 +14992,25 @@ ftl_open_sblk_recovery:
 	bl	ftl_read_ppa_page
 	ldr	x8, [x29, 120]
 	ldr	w10, [x29, 116]
-	ldr	w0, [x8, #:lo12:.LANCHOR173]
+	ldr	w0, [x8, #:lo12:.LANCHOR178]
 	cmp	w10, w0
-	bhi	.L2360
+	bhi	.L2466
 	ldr	x0, [x19, 24]
 	ldr	w0, [x0, 8]
 	cmn	w0, #1
-	beq	.L2358
+	beq	.L2464
 	ldp	x7, x6, [x29, 96]
 	ldr	w5, [x29, 112]
-	ldrh	w1, [x6, #:lo12:.LANCHOR102]
+	ldrh	w1, [x6, #:lo12:.LANCHOR99]
 	sub	w5, w5, w1
 	lsr	w0, w0, w1
 	lsl	w27, w27, w5
 	sub	w27, w27, #1
 	and	w27, w27, w0
-	ldrb	w0, [x7, #:lo12:.LANCHOR101]
+	ldrb	w0, [x7, #:lo12:.LANCHOR98]
 	udiv	w0, w27, w0
 	bl	ftl_vpn_decrement
-.L2358:
+.L2464:
 	ldrh	w0, [x28, 6]
 	mov	w27, 1
 	sub	w0, w0, #1
@@ -14558,41 +15018,41 @@ ftl_open_sblk_recovery:
 	ldrh	w0, [x28, 10]
 	add	w0, w0, 1
 	strh	w0, [x28, 10]
-.L2352:
+.L2458:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2351
-.L2367:
+	b	.L2457
+.L2473:
 	ldrh	w2, [x28, 12]
 	add	w2, w2, w1
 	ldr	w2, [x5, x2, lsl 2]
 	cmn	w2, #1
-	beq	.L2366
+	beq	.L2472
 	add	w20, w0, 1
 	and	w0, w20, 65535
-.L2366:
+.L2472:
 	add	w1, w1, 1
-	b	.L2365
-.L2372:
-	cbz	w27, .L2370
+	b	.L2471
+.L2478:
+	cbz	w27, .L2476
 	ldrh	w0, [x28, 6]
 	cmp	w0, 1
-	bls	.L2370
+	bls	.L2476
 	mov	x0, x28
 	bl	ftl_get_new_free_page
 	mov	w4, w0
-	ldr	w0, [x22, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L2371
+	ldr	w0, [x22, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2477
 	mov	w1, w4
 	str	w4, [x29, 136]
 	mov	x0, x26
 	bl	printf
 	ldr	w4, [x29, 136]
-.L2371:
-	adrp	x0, .LANCHOR100
+.L2477:
+	adrp	x0, .LANCHOR97
 	ldr	x2, [x19, 24]
 	ldr	x1, [x19, 8]
-	ldr	x0, [x0, #:lo12:.LANCHOR100]
+	ldr	x0, [x0, #:lo12:.LANCHOR97]
 	ldr	w0, [x0, 8]
 	str	w0, [x2]
 	str	wzr, [x2, 12]
@@ -14604,37 +15064,37 @@ ftl_open_sblk_recovery:
 	bl	ftl_prog_ppa_page
 	ldrh	w0, [x28]
 	bl	ftl_vpn_decrement
-.L2370:
+.L2476:
 	add	w20, w20, 1
-	b	.L2369
-.L2360:
+	b	.L2475
+.L2466:
 	ldr	x3, [x19, 24]
-	adrp	x0, .LANCHOR56
-	ldr	w0, [x0, #:lo12:.LANCHOR56]
+	adrp	x0, .LANCHOR118
+	ldr	w0, [x0, #:lo12:.LANCHOR118]
 	ldr	w1, [x3, 4]
 	cmp	w1, w0
-	bcs	.L2358
+	bcs	.L2464
 	ldrb	w0, [x28, 9]
-	ldrh	w1, [x23, #:lo12:.LANCHOR83]
+	ldrh	w1, [x23, #:lo12:.LANCHOR80]
 	ldrh	w2, [x28, 10]
 	mul	w0, w0, w1
 	sub	w0, w0, #1
 	cmp	w2, w0
-	bge	.L2358
-	adrp	x0, .LANCHOR100
+	bge	.L2464
+	adrp	x0, .LANCHOR97
 	ldr	w1, [x3]
-	ldr	x0, [x0, #:lo12:.LANCHOR100]
+	ldr	x0, [x0, #:lo12:.LANCHOR97]
 	ldr	w5, [x0, 8]
 	cmp	w1, w5
-	bls	.L2361
+	bls	.L2467
 	str	w1, [x0, 8]
-.L2361:
+.L2467:
 	ldrh	w0, [x28, 12]
 	add	w2, w2, w0
 	ldp	w0, w1, [x3, 4]
 	bl	lpa_hash_update_ppa
-	b	.L2358
-.L2343:
+	b	.L2464
+.L2449:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -14653,94 +15113,94 @@ pm_write_page:
 	stp	x19, x20, [sp, 16]
 	mov	w19, w0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR83
+	adrp	x21, .LANCHOR80
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR108
+	adrp	x22, .LANCHOR105
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LANCHOR100
+	adrp	x23, .LANCHOR97
 	mov	x25, x1
-	add	x21, x21, :lo12:.LANCHOR83
+	add	x21, x21, :lo12:.LANCHOR80
 	mov	x20, x23
-	add	x22, x22, :lo12:.LANCHOR108
+	add	x22, x22, :lo12:.LANCHOR105
 	mov	w24, 65535
 	str	x27, [sp, 80]
-.L2423:
-	ldr	x0, [x23, #:lo12:.LANCHOR100]
+.L2529:
+	ldr	x0, [x23, #:lo12:.LANCHOR97]
 	ldr	w1, [x0, 48]
 	ldrh	w2, [x0, 696]
 	add	w1, w1, 1
 	str	w1, [x0, 48]
 	ldrh	w1, [x21]
 	cmp	w2, w1
-	bcs	.L2424
+	bcs	.L2530
 	ldrh	w0, [x0, 692]
 	cmp	w0, w24
-	bne	.L2425
-.L2424:
+	bne	.L2531
+.L2530:
 	bl	pm_alloc_new_blk
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2425:
-	ldr	x0, [x20, #:lo12:.LANCHOR100]
+.L2531:
+	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	ldrh	w0, [x0, 692]
 	cmp	w0, w24
-	bne	.L2426
-	adrp	x1, .LANCHOR185
+	bne	.L2532
+	adrp	x1, .LANCHOR190
 	adrp	x0, .LC0
 	mov	w2, 230
-	add	x1, x1, :lo12:.LANCHOR185
+	add	x1, x1, :lo12:.LANCHOR190
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2426:
-	ldr	x0, [x20, #:lo12:.LANCHOR100]
-	adrp	x27, .LANCHOR186
+.L2532:
+	ldr	x0, [x20, #:lo12:.LANCHOR97]
+	adrp	x27, .LANCHOR191
 	ldrh	w1, [x22]
 	mov	w2, 64
 	ldrh	w26, [x0, 692]
 	ldrh	w0, [x0, 696]
 	madd	w26, w26, w1, w0
-	ldr	x0, [x27, #:lo12:.LANCHOR186]
+	ldr	x0, [x27, #:lo12:.LANCHOR191]
 	mov	w1, 0
 	bl	ftl_memset
-	ldr	x3, [x27, #:lo12:.LANCHOR186]
+	ldr	x3, [x27, #:lo12:.LANCHOR191]
 	mov	x2, x25
-	ldr	x0, [x20, #:lo12:.LANCHOR100]
+	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	str	w19, [x3]
 	ldr	w1, [x0, 48]
 	ldrb	w0, [x0, 694]
 	str	w1, [x3, 4]
-	adrp	x1, .LANCHOR123
-	ldrb	w4, [x1, #:lo12:.LANCHOR123]
+	adrp	x1, .LANCHOR121
+	ldrb	w4, [x1, #:lo12:.LANCHOR121]
 	mov	w1, w26
 	bl	ftl_prog_page
-	ldr	x2, [x20, #:lo12:.LANCHOR100]
+	ldr	x2, [x20, #:lo12:.LANCHOR97]
 	ldrh	w1, [x2, 696]
 	add	w1, w1, 1
 	and	w1, w1, 65535
 	strh	w1, [x2, 696]
 	cmp	w1, 1
-	adrp	x1, .LANCHOR187
-	beq	.L2427
-	ldrb	w3, [x1, #:lo12:.LANCHOR187]
-	cbz	w3, .L2428
-.L2427:
-	strb	wzr, [x1, #:lo12:.LANCHOR187]
-	b	.L2423
-.L2428:
+	adrp	x1, .LANCHOR192
+	beq	.L2533
+	ldrb	w3, [x1, #:lo12:.LANCHOR192]
+	cbz	w3, .L2534
+.L2533:
+	strb	wzr, [x1, #:lo12:.LANCHOR192]
+	b	.L2529
+.L2534:
 	cmn	w0, #1
-	bne	.L2430
+	bne	.L2536
 	mov	w1, w26
-	adrp	x0, .LC143
-	add	x0, x0, :lo12:.LC143
+	adrp	x0, .LC145
+	add	x0, x0, :lo12:.LC145
 	bl	printf
-	b	.L2423
-.L2430:
+	b	.L2529
+.L2536:
 	ldrh	w0, [x2, 698]
 	cmp	w19, w0
-	bcs	.L2431
+	bcs	.L2537
 	add	x19, x2, x19, uxtw 2
 	str	w26, [x19, 704]
-.L2431:
+.L2537:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -14756,51 +15216,51 @@ pm_write_page:
 	.type	flash_info_flush, %function
 flash_info_flush:
 	stp	x29, x30, [sp, -112]!
-	adrp	x0, .LANCHOR9
+	adrp	x0, .LANCHOR14
 	add	x29, sp, 0
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2437
-	adrp	x2, .LANCHOR188
+	tbz	x0, 12, .L2543
+	adrp	x2, .LANCHOR193
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR188
+	add	x2, x2, :lo12:.LANCHOR193
 	mov	w1, 251
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2437:
-	adrp	x23, .LANCHOR157
-	adrp	x20, .LANCHOR22
+.L2543:
+	adrp	x23, .LANCHOR158
+	adrp	x20, .LANCHOR26
 	mov	w2, 64
 	mov	w1, 0
-	ldr	x0, [x23, #:lo12:.LANCHOR157]
-	adrp	x21, .LANCHOR158
-	adrp	x22, .LANCHOR28
-	adrp	x24, .LC145
-	adrp	x25, .LANCHOR134
-	add	x22, x22, :lo12:.LANCHOR28
-	add	x24, x24, :lo12:.LC145
-	add	x25, x25, :lo12:.LANCHOR134
+	ldr	x0, [x23, #:lo12:.LANCHOR158]
+	adrp	x21, .LANCHOR159
+	adrp	x22, .LANCHOR2
+	adrp	x24, .LC147
+	adrp	x25, .LANCHOR135
+	add	x22, x22, :lo12:.LANCHOR2
+	add	x24, x24, :lo12:.LC147
+	add	x25, x25, :lo12:.LANCHOR135
 	bl	ftl_memset
-	add	x27, x21, :lo12:.LANCHOR158
-	ldr	x1, [x20, #:lo12:.LANCHOR22]
+	add	x27, x21, :lo12:.LANCHOR159
+	ldr	x1, [x20, #:lo12:.LANCHOR26]
 	mov	w3, 16
 	mov	w2, 4
-	adrp	x0, .LC144
-	add	x0, x0, :lo12:.LC144
+	adrp	x0, .LC146
+	add	x0, x0, :lo12:.LC146
 	mov	w26, 0
 	bl	rknand_print_hex
-	ldr	x6, [x20, #:lo12:.LANCHOR22]
+	ldr	x6, [x20, #:lo12:.LANCHOR26]
 	add	x0, x6, 16
 	ldr	w1, [x6, 8]
 	bl	js_hash
 	str	w0, [x6, 12]
-.L2438:
-	add	x28, x21, :lo12:.LANCHOR158
-	ldrb	w4, [x21, #:lo12:.LANCHOR158]
+.L2544:
+	add	x28, x21, :lo12:.LANCHOR159
+	ldrb	w4, [x21, #:lo12:.LANCHOR159]
 	ldrh	w19, [x22]
 	mov	x0, x24
 	mov	w1, w4
@@ -14813,40 +15273,40 @@ flash_info_flush:
 	sub	w0, w0, #1
 	cmp	w1, w0
 	ldp	w3, w4, [x29, 104]
-	blt	.L2439
-	ldr	x6, [x20, #:lo12:.LANCHOR22]
+	blt	.L2545
+	ldr	x6, [x20, #:lo12:.LANCHOR26]
 	ldrb	w7, [x28, 1]
 	strh	wzr, [x28, 2]
 	ldr	w0, [x6, 4]
 	ldrh	w1, [x6, 16]
 	add	w0, w0, 1
 	str	w0, [x6, 4]
-	ldrb	w0, [x21, #:lo12:.LANCHOR158]
+	ldrb	w0, [x21, #:lo12:.LANCHOR159]
 	add	w1, w1, 1
 	strb	w0, [x28, 1]
 	mov	x0, x6
-	strb	w7, [x21, #:lo12:.LANCHOR158]
+	strb	w7, [x21, #:lo12:.LANCHOR159]
 	strh	w1, [x0, 16]!
 	ldr	w1, [x6, 8]
 	bl	js_hash
 	ldrh	w19, [x22]
 	str	w0, [x6, 12]
 	mul	w19, w19, w7
-.L2448:
+.L2554:
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_erase_block
-	b	.L2440
-.L2443:
+	b	.L2546
+.L2549:
 	mov	w26, 1
-	b	.L2438
-.L2439:
+	b	.L2544
+.L2545:
 	madd	w19, w19, w4, w3
-	cbz	w1, .L2448
-.L2440:
-	ldr	x2, [x20, #:lo12:.LANCHOR22]
+	cbz	w1, .L2554
+.L2546:
+	ldr	x2, [x20, #:lo12:.LANCHOR26]
 	mov	w1, w19
-	ldr	x3, [x23, #:lo12:.LANCHOR157]
+	ldr	x3, [x23, #:lo12:.LANCHOR158]
 	mov	w5, 1
 	mov	w4, 4
 	ldr	w0, [x2, 4]
@@ -14860,14 +15320,14 @@ flash_info_flush:
 	ldrh	w1, [x27, 2]
 	add	w1, w1, 1
 	strh	w1, [x27, 2]
-	bne	.L2441
+	bne	.L2547
 	mov	w1, w19
-	adrp	x0, .LC146
-	add	x0, x0, :lo12:.LC146
+	adrp	x0, .LC148
+	add	x0, x0, :lo12:.LC148
 	bl	printf
-	b	.L2438
-.L2441:
-	cbz	w26, .L2443
+	b	.L2544
+.L2547:
+	cbz	w26, .L2549
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -14885,49 +15345,62 @@ nand_flash_init:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR9
+	adrp	x21, .LANCHOR14
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	ldr	w0, [x21, #:lo12:.LANCHOR9]
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2450
-	adrp	x2, .LANCHOR189
+	tbz	x0, 12, .L2556
+	adrp	x2, .LANCHOR194
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR189
-	mov	w1, 2101
+	add	x2, x2, :lo12:.LANCHOR194
+	mov	w1, 2209
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2450:
-	adrp	x22, .LANCHOR11
-	adrp	x20, .LANCHOR40
-	add	x24, x20, :lo12:.LANCHOR40
+.L2556:
 	mov	x0, x19
-	adrp	x25, .LANCHOR35
+	adrp	x23, .LANCHOR16
 	bl	nandc_init
-	add	x25, x25, :lo12:.LANCHOR35
-	mov	x26, x24
 	adrp	x19, .LANCHOR34
-	mov	x23, 0
+	adrp	x20, .LANCHOR41
 	add	x0, x19, :lo12:.LANCHOR34
+	add	x24, x20, :lo12:.LANCHOR41
+	str	x0, [x23, #:lo12:.LANCHOR16]
+	adrp	x25, .LANCHOR35
+	adrp	x0, .LANCHOR18
+	add	x25, x25, :lo12:.LANCHOR35
+	mov	x26, x24
+	mov	w1, 1
+	mov	x22, 0
 	mov	w27, 2
-	str	x0, [x22, #:lo12:.LANCHOR11]
 	mov	w28, 44
-.L2456:
+	strb	w1, [x0, #:lo12:.LANCHOR18]
+	mov	w2, 8
+	mov	w1, 0
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
+	bl	ftl_memset
+	mov	w2, 32
+	mov	w1, 0
+	adrp	x0, .LANCHOR136
+	add	x0, x0, :lo12:.LANCHOR136
+	bl	ftl_memset
+.L2562:
 	mov	x1, x24
-	mov	w0, w23
+	mov	w0, w22
 	bl	flash_read_id
-	strb	w27, [x23, x25]
-	cbnz	x23, .L2451
+	strb	w27, [x22, x25]
+	cbnz	x22, .L2557
 	ldrb	w0, [x26]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bls	.L2452
-.L2454:
+	bls	.L2558
+.L2560:
 	mov	w19, -2
-.L2449:
+.L2555:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -14936,326 +15409,329 @@ nand_flash_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2452:
+.L2558:
 	ldrb	w0, [x26, 1]
 	cmp	w0, 255
-	beq	.L2454
-.L2451:
+	beq	.L2560
+.L2557:
 	ldrb	w0, [x24]
 	cmp	w0, 181
-	bne	.L2455
+	bne	.L2561
 	strb	w28, [x24]
-.L2455:
-	add	x23, x23, 1
+.L2561:
+	add	x22, x22, 1
 	add	x24, x24, 8
-	cmp	x23, 4
-	bne	.L2456
-	adrp	x0, .LANCHOR190
-	add	x8, x0, :lo12:.LANCHOR190
+	cmp	x22, 4
+	bne	.L2562
+	adrp	x0, .LANCHOR195
+	add	x8, x0, :lo12:.LANCHOR195
 	add	x8, x8, 1
 	mov	x7, x0
-	add	x12, x20, :lo12:.LANCHOR40
+	add	x12, x20, :lo12:.LANCHOR41
 	mov	x10, 0
-.L2459:
+.L2565:
 	ldrb	w2, [x8, -1]
 	mov	w11, w10
 	lsl	x24, x10, 5
 	mov	x1, x12
 	mov	x0, x8
 	bl	flash_mem_cmp8
-	cbnz	w0, .L2457
-	add	x0, x7, :lo12:.LANCHOR190
+	cbnz	w0, .L2563
+	add	x0, x7, :lo12:.LANCHOR195
 	ubfiz	x11, x11, 5, 32
 	add	x24, x0, x24
 	add	x0, x0, x11
-	adrp	x1, .LANCHOR191
-	add	x4, x1, :lo12:.LANCHOR191
+	adrp	x1, .LANCHOR196
+	add	x4, x1, :lo12:.LANCHOR196
 	ldrb	w3, [x0, 22]
 	mov	x0, 0
-.L2458:
+.L2564:
 	lsl	x5, x0, 5
 	mov	w2, w0
 	ldrb	w5, [x5, x4]
 	cmp	w5, w3
-	beq	.L2460
+	beq	.L2566
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L2458
+	bne	.L2564
 	mov	w2, w0
-.L2460:
+.L2566:
 	ubfiz	x0, x2, 5, 32
-	add	x1, x1, :lo12:.LANCHOR191
+	add	x1, x1, :lo12:.LANCHOR196
 	add	x1, x1, x0
 	mov	w2, 32
-	adrp	x0, .LANCHOR15
-	add	x0, x0, :lo12:.LANCHOR15
+	adrp	x0, .LANCHOR19
+	add	x0, x0, :lo12:.LANCHOR19
 	bl	ftl_memcpy
-	add	x23, x19, :lo12:.LANCHOR34
+	add	x22, x19, :lo12:.LANCHOR34
 	mov	x1, x24
-	adrp	x24, .LANCHOR24
+	adrp	x24, .LANCHOR27
 	mov	w2, 32
-	mov	x0, x23
+	mov	x0, x22
 	bl	ftl_memcpy
-	ldrb	w0, [x24, #:lo12:.LANCHOR24]
+	ldrb	w0, [x24, #:lo12:.LANCHOR27]
 	cmp	w0, 8
-	bhi	.L2461
-	ldrb	w1, [x23, 20]
+	bhi	.L2567
+	ldrb	w1, [x22, 20]
 	cmp	w1, 60
-	bls	.L2462
+	bls	.L2568
 	mov	w1, 60
-	strb	w1, [x23, 20]
-.L2462:
+	strb	w1, [x22, 20]
+.L2568:
 	cmp	w0, 8
-	bne	.L2461
-	ldrb	w0, [x20, #:lo12:.LANCHOR40]
+	bne	.L2567
+	ldrb	w0, [x20, #:lo12:.LANCHOR41]
 	cmp	w0, 44
-	bne	.L2461
+	bne	.L2567
 	add	x0, x19, :lo12:.LANCHOR34
 	ldrb	w1, [x0, 28]
 	cmp	w1, 3
-	bne	.L2461
+	bne	.L2567
 	strb	wzr, [x0, 28]
-.L2461:
-	ldr	w0, [x21, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L2463
-	adrp	x2, .LANCHOR189
+.L2567:
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2569
+	adrp	x2, .LANCHOR194
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR189
-	mov	w1, 2122
+	add	x2, x2, :lo12:.LANCHOR194
+	mov	w1, 2233
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2463:
+.L2569:
 	mov	w0, 16384
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR160
-	adrp	x25, .LANCHOR22
+	adrp	x1, .LANCHOR161
+	adrp	x22, .LANCHOR26
 	add	x20, x19, :lo12:.LANCHOR34
-	adrp	x23, .LANCHOR41
-	str	x0, [x1, #:lo12:.LANCHOR160]
+	str	x0, [x1, #:lo12:.LANCHOR161]
 	mov	w0, 16384
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR150
-	str	x0, [x1, #:lo12:.LANCHOR150]
+	adrp	x1, .LANCHOR151
+	str	x0, [x1, #:lo12:.LANCHOR151]
 	mov	w0, 2048
 	bl	ftl_malloc
-	str	x0, [x25, #:lo12:.LANCHOR22]
+	str	x0, [x22, #:lo12:.LANCHOR26]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR159
-	str	x0, [x1, #:lo12:.LANCHOR159]
+	adrp	x1, .LANCHOR160
+	str	x0, [x1, #:lo12:.LANCHOR160]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR152
-	str	x0, [x1, #:lo12:.LANCHOR152]
+	adrp	x1, .LANCHOR153
+	str	x0, [x1, #:lo12:.LANCHOR153]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR157
-	str	x0, [x1, #:lo12:.LANCHOR157]
-	adrp	x0, .LANCHOR163
-	strb	wzr, [x0, #:lo12:.LANCHOR163]
+	adrp	x1, .LANCHOR158
+	str	x0, [x1, #:lo12:.LANCHOR158]
+	adrp	x0, .LANCHOR168
+	strb	wzr, [x0, #:lo12:.LANCHOR168]
 	bl	flash_die_info_init
 	ldrb	w0, [x20, 18]
 	bl	flash_lsb_page_tbl_build
 	ldrb	w0, [x20, 20]
-	adrp	x20, .LANCHOR155
+	adrp	x20, .LANCHOR156
 	bl	nandc_bch_sel
-	str	xzr, [x20, #:lo12:.LANCHOR155]
-	ldr	x1, [x22, #:lo12:.LANCHOR11]
-	mov	x22, x25
+	str	xzr, [x20, #:lo12:.LANCHOR156]
+	ldr	x1, [x23, #:lo12:.LANCHOR16]
+	adrp	x23, .LANCHOR42
 	ldrh	w0, [x1, 16]
 	ubfx	x2, x0, 8, 3
-	strb	w2, [x23, #:lo12:.LANCHOR41]
-	adrp	x2, .LANCHOR192
+	strb	w2, [x23, #:lo12:.LANCHOR42]
+	adrp	x2, .LANCHOR165
 	ubfx	x3, x0, 3, 1
-	strb	w3, [x2, #:lo12:.LANCHOR192]
+	strb	w3, [x2, #:lo12:.LANCHOR165]
 	adrp	x2, .LANCHOR38
 	ubfx	x3, x0, 4, 1
 	strb	w3, [x2, #:lo12:.LANCHOR38]
-	adrp	x2, .LANCHOR73
+	adrp	x2, .LANCHOR70
 	ubfx	x3, x0, 12, 1
-	strb	w3, [x2, #:lo12:.LANCHOR73]
-	adrp	x2, .LANCHOR107
+	strb	w3, [x2, #:lo12:.LANCHOR70]
+	adrp	x2, .LANCHOR104
 	ubfx	x3, x0, 13, 1
 	ubfx	x0, x0, 14, 1
-	strb	w3, [x2, #:lo12:.LANCHOR107]
-	adrp	x2, .LANCHOR27
-	strb	w0, [x2, #:lo12:.LANCHOR27]
+	strb	w3, [x2, #:lo12:.LANCHOR104]
+	adrp	x2, .LANCHOR1
+	strb	w0, [x2, #:lo12:.LANCHOR1]
 	mov	w2, 60
 	ldrb	w0, [x1, 28]
-	adrp	x1, .LANCHOR13
-	strb	w0, [x1, #:lo12:.LANCHOR13]
-	adrp	x1, .LANCHOR12
-	strb	w2, [x1, #:lo12:.LANCHOR12]
-	ldrb	w2, [x24, #:lo12:.LANCHOR24]
+	adrp	x1, .LANCHOR0
+	strb	w0, [x1, #:lo12:.LANCHOR0]
+	adrp	x1, .LANCHOR17
+	strb	w2, [x1, #:lo12:.LANCHOR17]
+	ldrb	w2, [x24, #:lo12:.LANCHOR27]
 	cmp	w2, 9
-	bne	.L2464
+	bne	.L2570
 	mov	w2, 70
-	strb	w2, [x1, #:lo12:.LANCHOR12]
-.L2464:
+	strb	w2, [x1, #:lo12:.LANCHOR17]
+.L2570:
 	add	x19, x19, :lo12:.LANCHOR34
-	adrp	x1, .LANCHOR164
-	adrp	x25, .LANCHOR19
-	strb	w0, [x1, #:lo12:.LANCHOR164]
+	adrp	x1, .LANCHOR169
+	adrp	x25, .LANCHOR23
+	strb	w0, [x1, #:lo12:.LANCHOR169]
 	ldrh	w1, [x19, 16]
 	ldrb	w0, [x19, 19]
-	strb	w0, [x25, #:lo12:.LANCHOR19]
-	tbz	x1, 6, .L2466
+	strb	w0, [x25, #:lo12:.LANCHOR23]
+	tbz	x1, 6, .L2572
 	sub	w1, w0, #17
 	and	w1, w1, 255
 	cmp	w1, 2
-	bhi	.L2467
+	bhi	.L2573
 	adrp	x1, micron_read_retrial
 	add	x1, x1, :lo12:micron_read_retrial
-	str	x1, [x20, #:lo12:.LANCHOR155]
+	str	x1, [x20, #:lo12:.LANCHOR156]
 	cmp	w0, 19
-	adrp	x0, .LANCHOR153
-	beq	.L2468
+	adrp	x0, .LANCHOR154
+	beq	.L2574
 	mov	w1, 7
-.L2511:
-	strb	w1, [x0, #:lo12:.LANCHOR153]
-	b	.L2466
-.L2457:
+.L2618:
+	strb	w1, [x0, #:lo12:.LANCHOR154]
+	b	.L2572
+.L2563:
 	add	x10, x10, 1
 	add	x8, x8, 32
 	cmp	x10, 30
-	bne	.L2459
-	b	.L2454
-.L2468:
+	bne	.L2565
+	b	.L2560
+.L2574:
 	mov	w1, 15
-	b	.L2511
-.L2467:
+	b	.L2618
+.L2573:
 	sub	w1, w0, #65
 	cmp	w0, 33
 	and	w1, w1, 255
 	ccmp	w1, 1, 0, ne
-	bhi	.L2470
+	bhi	.L2576
 	adrp	x0, toshiba_read_retrial
 	add	x0, x0, :lo12:toshiba_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR155]
-	adrp	x0, .LANCHOR21
+	str	x0, [x20, #:lo12:.LANCHOR156]
+	adrp	x0, .LANCHOR25
 	mov	w1, 4
-	strb	w1, [x0, #:lo12:.LANCHOR21]
-.L2513:
+	strb	w1, [x0, #:lo12:.LANCHOR25]
+.L2620:
 	mov	w1, 7
-	adrp	x0, .LANCHOR153
-	b	.L2511
-.L2470:
+	adrp	x0, .LANCHOR154
+	b	.L2618
+.L2576:
 	sub	w2, w0, #34
 	sub	w1, w0, #67
 	and	w2, w2, 255
 	and	w1, w1, 255
 	cmp	w2, 1
 	ccmp	w1, 1, 0, hi
-	bhi	.L2471
+	bhi	.L2577
 	adrp	x2, toshiba_read_retrial
 	add	x2, x2, :lo12:toshiba_read_retrial
-	str	x2, [x20, #:lo12:.LANCHOR155]
+	str	x2, [x20, #:lo12:.LANCHOR156]
 	cmp	w0, 35
 	mov	w2, 68
 	ccmp	w0, w2, 4, ne
-	adrp	x0, .LANCHOR153
-	beq	.L2472
+	adrp	x0, .LANCHOR154
+	beq	.L2578
 	mov	w2, 7
-.L2510:
-	strb	w2, [x0, #:lo12:.LANCHOR153]
+.L2617:
+	strb	w2, [x0, #:lo12:.LANCHOR154]
 	cmp	w1, 1
-	adrp	x0, .LANCHOR21
-	bhi	.L2474
+	adrp	x0, .LANCHOR25
+	bhi	.L2580
 	mov	w1, 4
-.L2512:
-	strb	w1, [x0, #:lo12:.LANCHOR21]
-.L2466:
-	ldr	w0, [x21, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L2475
-	adrp	x2, .LANCHOR189
+.L2619:
+	strb	w1, [x0, #:lo12:.LANCHOR25]
+.L2572:
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2581
+	adrp	x2, .LANCHOR194
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR189
-	mov	w1, 2170
+	add	x2, x2, :lo12:.LANCHOR194
+	mov	w1, 2281
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2475:
-	adrp	x24, .LANCHOR16
-	ldrb	w0, [x23, #:lo12:.LANCHOR41]
-	strb	wzr, [x24, #:lo12:.LANCHOR16]
-	tbz	x0, 0, .L2476
+.L2581:
+	adrp	x24, .LANCHOR20
+	ldrb	w0, [x23, #:lo12:.LANCHOR42]
+	strb	wzr, [x24, #:lo12:.LANCHOR20]
+	tbz	x0, 0, .L2582
 	mov	w0, 4
 	bl	nandc_set_if_mode
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
-.L2514:
+.L2621:
 	bl	nandc_set_if_mode
 	bl	flash_info_blk_init
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L2478
-	ldr	w0, [x21, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L2449
-	adrp	x2, .LANCHOR189
-	mov	w1, 2190
-	add	x2, x2, :lo12:.LANCHOR189
+	bne	.L2584
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2585
+	adrp	x2, .LANCHOR194
 	adrp	x0, .LC84
+	add	x2, x2, :lo12:.LANCHOR194
+	mov	w1, 2301
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-	b	.L2449
-.L2472:
+.L2585:
+	ldr	x0, [x22, #:lo12:.LANCHOR26]
+	mov	w1, 17
+	strb	w1, [x0, 32]
+	b	.L2555
+.L2578:
 	mov	w2, 17
-	b	.L2510
-.L2474:
+	b	.L2617
+.L2580:
 	mov	w1, 5
-	b	.L2512
-.L2471:
+	b	.L2619
+.L2577:
 	sub	w0, w0, #36
 	and	w0, w0, 255
 	cmp	w0, 1
-	bhi	.L2466
+	bhi	.L2572
 	adrp	x0, toshiba_3d_read_retrial
 	add	x0, x0, :lo12:toshiba_3d_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR155]
-	b	.L2513
-.L2476:
+	str	x0, [x20, #:lo12:.LANCHOR156]
+	b	.L2620
+.L2582:
 	mov	w0, 4
-	b	.L2514
-.L2478:
-	ldrb	w0, [x25, #:lo12:.LANCHOR19]
+	b	.L2621
+.L2584:
+	ldrb	w0, [x25, #:lo12:.LANCHOR23]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 6
-	bhi	.L2479
+	bhi	.L2586
 	adrp	x0, hynix_read_retrial
 	add	x0, x0, :lo12:hynix_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR155]
-.L2479:
-	ldrb	w0, [x23, #:lo12:.LANCHOR41]
-	tbz	x0, 2, .L2481
-	ldr	x0, [x22, #:lo12:.LANCHOR22]
+	str	x0, [x20, #:lo12:.LANCHOR156]
+.L2586:
+	ldrb	w0, [x23, #:lo12:.LANCHOR42]
+	tbz	x0, 2, .L2588
+	ldr	x0, [x22, #:lo12:.LANCHOR26]
 	ldrb	w0, [x0, 19]
-	cbz	w0, .L2481
-	adrp	x0, .LANCHOR158
-	ldrb	w1, [x0, #:lo12:.LANCHOR158]
-	adrp	x0, .LANCHOR28
-	ldrh	w0, [x0, #:lo12:.LANCHOR28]
+	cbz	w0, .L2588
+	adrp	x0, .LANCHOR159
+	ldrb	w1, [x0, #:lo12:.LANCHOR159]
+	adrp	x0, .LANCHOR2
+	ldrh	w0, [x0, #:lo12:.LANCHOR2]
 	mul	w1, w1, w0
 	mov	w0, 0
 	bl	flash_ddr_para_scan
-	ldrb	w0, [x24, #:lo12:.LANCHOR16]
-	cbnz	w0, .L2481
-	ldr	x0, [x22, #:lo12:.LANCHOR22]
+	ldrb	w0, [x24, #:lo12:.LANCHOR20]
+	cbnz	w0, .L2588
+	ldr	x0, [x22, #:lo12:.LANCHOR26]
 	strb	wzr, [x0, 19]
 	bl	flash_info_flush
-.L2481:
-	ldr	w0, [x21, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L2483
-	adrp	x2, .LANCHOR189
+.L2588:
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2590
+	adrp	x2, .LANCHOR194
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR189
-	mov	w1, 2243
+	add	x2, x2, :lo12:.LANCHOR194
+	mov	w1, 2356
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2483:
+.L2590:
 	bl	nand_flash_print_info
 	mov	w19, 0
-	b	.L2449
+	b	.L2555
 	.size	nand_flash_init, .-nand_flash_init
 	.section	.text.ftl_sysblk_dump,"ax",@progbits
 	.align	2
@@ -15272,31 +15748,31 @@ ftl_sysblk_dump:
 	stp	x25, x26, [sp, 112]
 	mov	w0, 1
 	stp	x27, x28, [sp, 128]
-	adrp	x26, .LANCHOR83
+	adrp	x26, .LANCHOR80
 	stp	x21, x22, [sp, 80]
 	bl	buf_alloc
 	ldr	x24, [x0, 8]
-	adrp	x27, .LANCHOR108
-	adrp	x28, .LANCHOR123
+	adrp	x27, .LANCHOR105
+	adrp	x28, .LANCHOR121
 	mov	x25, x0
-	add	x26, x26, :lo12:.LANCHOR83
-	add	x27, x27, :lo12:.LANCHOR108
-	add	x28, x28, :lo12:.LANCHOR123
+	add	x26, x26, :lo12:.LANCHOR80
+	add	x27, x27, :lo12:.LANCHOR105
+	add	x28, x28, :lo12:.LANCHOR121
 	mov	w19, 0
-.L2516:
+.L2623:
 	ldrh	w0, [x26]
 	cmp	w0, w19
-	bhi	.L2518
+	bhi	.L2625
 	mov	x0, x25
 	bl	buf_free
-	cbz	w20, .L2519
-	adrp	x1, .LANCHOR193
+	cbz	w20, .L2626
+	adrp	x1, .LANCHOR197
 	adrp	x0, .LC0
 	mov	w2, 1339
-	add	x1, x1, :lo12:.LANCHOR193
+	add	x1, x1, :lo12:.LANCHOR197
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2519:
+.L2626:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
@@ -15306,7 +15782,7 @@ ftl_sysblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 144
 	ret
-.L2518:
+.L2625:
 	ldrh	w21, [x27]
 	ldrb	w3, [x28]
 	ldr	x1, [x25, 8]
@@ -15335,19 +15811,19 @@ ftl_sysblk_dump:
 	mov	w1, w23
 	ldp	w5, w6, [x0]
 	ldr	w7, [x0, 8]
-	adrp	x0, .LC147
-	add	x0, x0, :lo12:.LC147
+	adrp	x0, .LC149
+	add	x0, x0, :lo12:.LC149
 	bl	printf
 	mov	w3, 32
 	mov	w2, 4
 	add	x1, x24, 704
-	adrp	x0, .LC148
-	add	x0, x0, :lo12:.LC148
+	adrp	x0, .LC150
+	add	x0, x0, :lo12:.LC150
 	bl	rknand_print_hex
 	cmp	w22, 512
 	ccmn	w22, #1, 4, ne
 	csinc	w20, w20, wzr, ne
-	b	.L2516
+	b	.L2623
 	.size	ftl_sysblk_dump, .-ftl_sysblk_dump
 	.section	.text.dump_ftl_info,"ax",@progbits
 	.align	2
@@ -15355,110 +15831,110 @@ ftl_sysblk_dump:
 	.type	dump_ftl_info, %function
 dump_ftl_info:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LANCHOR50
+	adrp	x0, .LANCHOR51
 	add	x29, sp, 0
-	ldrb	w1, [x0, #:lo12:.LANCHOR50]
-	adrp	x0, .LC149
+	ldrb	w1, [x0, #:lo12:.LANCHOR51]
+	adrp	x0, .LC151
 	stp	x19, x20, [sp, 16]
-	add	x0, x0, :lo12:.LC149
+	add	x0, x0, :lo12:.LC151
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR100
-	adrp	x19, .LANCHOR6
-	adrp	x20, .LANCHOR83
+	adrp	x22, .LANCHOR97
+	adrp	x19, .LANCHOR10
+	adrp	x20, .LANCHOR80
 	bl	printf
-	adrp	x21, .LANCHOR2
-	adrp	x0, .LANCHOR174
-	add	x1, x0, :lo12:.LANCHOR174
+	adrp	x21, .LANCHOR6
+	adrp	x0, .LANCHOR179
+	add	x1, x0, :lo12:.LANCHOR179
 	ldrh	w3, [x1, 2]
 	ldrb	w2, [x1, 1]
-	ldrb	w1, [x0, #:lo12:.LANCHOR174]
-	adrp	x0, .LC150
-	add	x0, x0, :lo12:.LC150
+	ldrb	w1, [x0, #:lo12:.LANCHOR179]
+	adrp	x0, .LC152
+	add	x0, x0, :lo12:.LC152
 	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR100]
+	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	ldrh	w2, [x0, 140]
 	ldrh	w1, [x0, 130]
-	adrp	x0, .LC151
-	add	x0, x0, :lo12:.LC151
+	adrp	x0, .LC153
+	add	x0, x0, :lo12:.LC153
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR6]
-	adrp	x0, .LC152
-	add	x0, x0, :lo12:.LC152
+	ldr	x1, [x19, #:lo12:.LANCHOR10]
+	adrp	x0, .LC154
+	add	x0, x0, :lo12:.LC154
 	ldrh	w5, [x1, 26]
 	ldrh	w4, [x1, 22]
 	ldrb	w3, [x1, 21]
 	ldrh	w2, [x1, 18]
 	ldrh	w1, [x1, 16]
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR6]
-	adrp	x0, .LC153
-	add	x0, x0, :lo12:.LC153
+	ldr	x1, [x19, #:lo12:.LANCHOR10]
+	adrp	x0, .LC155
+	add	x0, x0, :lo12:.LC155
 	ldrh	w5, [x1, 58]
 	ldrh	w4, [x1, 54]
 	ldrb	w3, [x1, 53]
 	ldrh	w2, [x1, 50]
 	ldrh	w1, [x1, 48]
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR6]
-	adrp	x19, .LANCHOR76
-	adrp	x0, .LC154
-	add	x0, x0, :lo12:.LC154
+	ldr	x1, [x19, #:lo12:.LANCHOR10]
+	adrp	x19, .LANCHOR73
+	adrp	x0, .LC156
+	add	x0, x0, :lo12:.LC156
 	ldrh	w5, [x1, 90]
 	ldrh	w4, [x1, 86]
 	ldrb	w3, [x1, 85]
 	ldrh	w2, [x1, 82]
 	ldrh	w1, [x1, 80]
 	bl	printf
-	ldrb	w0, [x19, #:lo12:.LANCHOR76]
+	ldrb	w0, [x19, #:lo12:.LANCHOR73]
 	mov	w2, 4
-	ldrh	w3, [x20, #:lo12:.LANCHOR83]
+	ldrh	w3, [x20, #:lo12:.LANCHOR80]
 	mul	w3, w3, w0
-	adrp	x0, .LANCHOR114
-	ldr	x1, [x0, #:lo12:.LANCHOR114]
-	adrp	x0, .LC155
+	adrp	x0, .LANCHOR111
+	ldr	x1, [x0, #:lo12:.LANCHOR111]
+	adrp	x0, .LC157
 	lsl	w3, w3, 1
-	add	x0, x0, :lo12:.LC155
+	add	x0, x0, :lo12:.LC157
 	bl	rknand_print_hex
-	adrp	x0, .LANCHOR5
-	ldrh	w3, [x21, #:lo12:.LANCHOR2]
+	adrp	x0, .LANCHOR9
+	ldrh	w3, [x21, #:lo12:.LANCHOR6]
 	mov	w2, 2
-	ldr	x1, [x0, #:lo12:.LANCHOR5]
-	adrp	x0, .LC156
-	add	x0, x0, :lo12:.LC156
+	ldr	x1, [x0, #:lo12:.LANCHOR9]
+	adrp	x0, .LC158
+	add	x0, x0, :lo12:.LC158
 	bl	rknand_print_hex
-	ldr	x1, [x22, #:lo12:.LANCHOR100]
+	ldr	x1, [x22, #:lo12:.LANCHOR97]
 	mov	w2, 4
-	adrp	x0, .LC148
-	add	x0, x0, :lo12:.LC148
+	adrp	x0, .LC150
+	add	x0, x0, :lo12:.LC150
 	add	x1, x1, 704
 	ldrh	w3, [x1, -6]
 	bl	rknand_print_hex
-	adrp	x0, .LANCHOR3
-	ldrh	w3, [x21, #:lo12:.LANCHOR2]
+	adrp	x0, .LANCHOR7
+	ldrh	w3, [x21, #:lo12:.LANCHOR6]
 	mov	w2, 4
-	ldr	x1, [x0, #:lo12:.LANCHOR3]
-	adrp	x0, .LC157
-	add	x0, x0, :lo12:.LC157
+	ldr	x1, [x0, #:lo12:.LANCHOR7]
+	adrp	x0, .LC159
+	add	x0, x0, :lo12:.LC159
 	bl	rknand_print_hex
 	mov	w3, 256
 	mov	w2, 2
-	adrp	x1, .LANCHOR113
-	adrp	x0, .LC158
-	add	x1, x1, :lo12:.LANCHOR113
-	add	x0, x0, :lo12:.LC158
+	adrp	x1, .LANCHOR110
+	adrp	x0, .LC160
+	add	x1, x1, :lo12:.LANCHOR110
+	add	x0, x0, :lo12:.LC160
 	bl	rknand_print_hex
-	ldrb	w0, [x19, #:lo12:.LANCHOR76]
+	ldrb	w0, [x19, #:lo12:.LANCHOR73]
 	mov	w2, 2
-	ldrh	w3, [x20, #:lo12:.LANCHOR83]
+	ldrh	w3, [x20, #:lo12:.LANCHOR80]
 	ldp	x21, x22, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	mul	w3, w3, w0
-	adrp	x0, .LANCHOR115
+	adrp	x0, .LANCHOR112
 	ldp	x29, x30, [sp], 48
 	lsl	w3, w3, 1
-	ldr	x1, [x0, #:lo12:.LANCHOR115]
-	adrp	x0, .LC159
-	add	x0, x0, :lo12:.LC159
+	ldr	x1, [x0, #:lo12:.LANCHOR112]
+	adrp	x0, .LC161
+	add	x0, x0, :lo12:.LC161
 	b	rknand_print_hex
 	.size	dump_ftl_info, .-dump_ftl_info
 	.section	.text.pm_ppa_update_check,"ax",@progbits
@@ -15466,39 +15942,39 @@ dump_ftl_info:
 	.global	pm_ppa_update_check
 	.type	pm_ppa_update_check, %function
 pm_ppa_update_check:
-	adrp	x3, .LANCHOR102
+	adrp	x3, .LANCHOR99
 	mov	w4, 21
-	ldrh	w3, [x3, #:lo12:.LANCHOR102]
+	ldrh	w3, [x3, #:lo12:.LANCHOR99]
 	sub	w5, w4, w3
 	mov	w4, 1
 	lsr	w3, w2, w3
 	lsl	w4, w4, w5
 	sub	w4, w4, #1
 	and	w4, w4, w3
-	adrp	x3, .LANCHOR101
-	ldrb	w3, [x3, #:lo12:.LANCHOR101]
+	adrp	x3, .LANCHOR98
+	ldrb	w3, [x3, #:lo12:.LANCHOR98]
 	udiv	w4, w4, w3
-	adrp	x3, .LANCHOR3
-	ldr	x3, [x3, #:lo12:.LANCHOR3]
+	adrp	x3, .LANCHOR7
+	ldr	x3, [x3, #:lo12:.LANCHOR7]
 	add	x4, x3, x4, uxth 2
 	ldrb	w3, [x4, 2]
 	ubfx	x3, x3, 5, 3
 	cmp	w3, 1
 	ccmp	w3, 7, 4, ne
-	bne	.L2530
+	bne	.L2637
 	stp	x29, x30, [sp, -16]!
 	mov	w3, w2
 	mov	w2, w1
 	mov	x1, x0
 	add	x29, sp, 0
-	adrp	x0, .LC160
-	add	x0, x0, :lo12:.LC160
+	adrp	x0, .LC162
+	add	x0, x0, :lo12:.LC162
 	bl	printf
 	bl	dump_ftl_info
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
-.L2530:
+.L2637:
 	mov	w0, 0
 	ret
 	.size	pm_ppa_update_check, .-pm_ppa_update_check
@@ -15514,113 +15990,113 @@ load_l2p_region:
 	and	w19, w0, 65535
 	stp	x23, x24, [sp, 48]
 	cmp	w20, 31
-	bls	.L2536
-	adrp	x1, .LANCHOR194
+	bls	.L2643
+	adrp	x1, .LANCHOR198
 	adrp	x0, .LC0
 	mov	w2, 31
-	add	x1, x1, :lo12:.LANCHOR194
+	add	x1, x1, :lo12:.LANCHOR198
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2536:
-	adrp	x22, .LANCHOR100
-	ldr	x0, [x22, #:lo12:.LANCHOR100]
+.L2643:
+	adrp	x22, .LANCHOR97
+	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	ldrh	w2, [x0, 698]
 	cmp	w2, w19
-	bcs	.L2537
+	bcs	.L2644
 	mov	w1, w19
-	adrp	x0, .LC161
-	add	x0, x0, :lo12:.LC161
+	adrp	x0, .LC163
+	add	x0, x0, :lo12:.LC163
 	bl	printf
-	adrp	x0, .LANCHOR195
+	adrp	x0, .LANCHOR199
 	mov	w1, 255
-	ldrh	w2, [x0, #:lo12:.LANCHOR195]
+	ldrh	w2, [x0, #:lo12:.LANCHOR199]
 	mov	x0, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	ldr	x0, [x22, #:lo12:.LANCHOR100]
+	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	ldrh	w0, [x0, 698]
 	cmp	w0, w19
-	bcs	.L2539
+	bcs	.L2646
 	mov	w2, 35
-.L2544:
-	adrp	x1, .LANCHOR194
+.L2651:
+	adrp	x1, .LANCHOR198
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR194
+	add	x1, x1, :lo12:.LANCHOR198
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L2539
-.L2537:
+	b	.L2646
+.L2644:
 	add	x0, x0, x19, sxtw 2
 	sbfiz	x20, x20, 4, 32
 	ldr	w21, [x0, 704]
-	adrp	x0, .LANCHOR129
-	add	x0, x0, :lo12:.LANCHOR129
+	adrp	x0, .LANCHOR130
+	add	x0, x0, :lo12:.LANCHOR130
 	add	x23, x0, x20
 	strh	w19, [x0, x20]
 	strh	wzr, [x23, 2]
-	cbnz	w21, .L2540
+	cbnz	w21, .L2647
 	mov	w2, 0
 	mov	w1, w19
-	adrp	x0, .LC162
-	add	x0, x0, :lo12:.LC162
+	adrp	x0, .LC164
+	add	x0, x0, :lo12:.LC164
 	bl	printf
-	adrp	x0, .LANCHOR195
+	adrp	x0, .LANCHOR199
 	mov	w1, 255
-	ldrh	w2, [x0, #:lo12:.LANCHOR195]
+	ldrh	w2, [x0, #:lo12:.LANCHOR199]
 	ldr	x0, [x23, 8]
 	bl	ftl_memset
-.L2539:
+.L2646:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2540:
-	adrp	x20, .LANCHOR186
-	adrp	x24, .LANCHOR123
+.L2647:
+	adrp	x20, .LANCHOR191
+	adrp	x24, .LANCHOR121
 	ldr	x1, [x23, 8]
 	mov	w0, w21
-	ldr	x2, [x20, #:lo12:.LANCHOR186]
-	ldrb	w3, [x24, #:lo12:.LANCHOR123]
+	ldr	x2, [x20, #:lo12:.LANCHOR191]
+	ldrb	w3, [x24, #:lo12:.LANCHOR121]
 	bl	ftl_read_ppa_page
-	ldr	x1, [x20, #:lo12:.LANCHOR186]
+	ldr	x1, [x20, #:lo12:.LANCHOR191]
 	ldr	w2, [x1]
 	cmp	w2, w19
-	beq	.L2541
+	beq	.L2648
 	mov	w4, w21
 	mov	w3, w0
 	mov	w1, w19
-	adrp	x0, .LC163
-	add	x0, x0, :lo12:.LC163
+	adrp	x0, .LC165
+	add	x0, x0, :lo12:.LC165
 	bl	printf
-	ldr	x1, [x22, #:lo12:.LANCHOR100]
+	ldr	x1, [x22, #:lo12:.LANCHOR97]
 	mov	w2, 4
-	adrp	x0, .LC164
-	add	x0, x0, :lo12:.LC164
+	adrp	x0, .LC166
+	add	x0, x0, :lo12:.LC166
 	add	x1, x1, 704
 	ldrh	w3, [x1, -6]
 	bl	rknand_print_hex
 	ldr	x1, [x23, 8]
 	mov	w2, 4
-	ldrb	w3, [x24, #:lo12:.LANCHOR123]
-	adrp	x0, .LC165
-	add	x0, x0, :lo12:.LC165
+	ldrb	w3, [x24, #:lo12:.LANCHOR121]
+	adrp	x0, .LC167
+	add	x0, x0, :lo12:.LC167
 	lsl	w3, w3, 7
 	bl	rknand_print_hex
-	ldr	x1, [x20, #:lo12:.LANCHOR186]
-	adrp	x0, .LC166
+	ldr	x1, [x20, #:lo12:.LANCHOR191]
+	adrp	x0, .LC168
 	mov	w3, 16
 	mov	w2, 4
-	add	x0, x0, :lo12:.LC166
+	add	x0, x0, :lo12:.LC168
 	bl	rknand_print_hex
-.L2541:
-	ldr	x0, [x20, #:lo12:.LANCHOR186]
+.L2648:
+	ldr	x0, [x20, #:lo12:.LANCHOR191]
 	ldr	w0, [x0]
 	cmp	w19, w0
-	beq	.L2539
+	beq	.L2646
 	mov	w2, 59
-	b	.L2544
+	b	.L2651
 	.size	load_l2p_region, .-load_l2p_region
 	.section	.text.pm_gc,"ax",@progbits
 	.align	2
@@ -15630,73 +16106,73 @@ pm_gc:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR100
-	adrp	x19, .LANCHOR140
+	adrp	x20, .LANCHOR97
+	adrp	x19, .LANCHOR141
 	stp	x21, x22, [sp, 32]
-	ldr	x0, [x20, #:lo12:.LANCHOR100]
+	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	stp	x23, x24, [sp, 48]
 	ldrh	w1, [x0, 688]
-	ldrh	w0, [x19, #:lo12:.LANCHOR140]
+	ldrh	w0, [x19, #:lo12:.LANCHOR141]
 	str	x25, [sp, 64]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L2547
+	blt	.L2654
 	bl	pm_free_sblk
-	ldr	x2, [x20, #:lo12:.LANCHOR100]
-	ldrh	w1, [x19, #:lo12:.LANCHOR140]
+	ldr	x2, [x20, #:lo12:.LANCHOR97]
+	ldrh	w1, [x19, #:lo12:.LANCHOR141]
 	sub	w1, w1, #1
 	ldrh	w3, [x2, 688]
 	cmp	w3, w1
-	blt	.L2547
+	blt	.L2654
 	add	x0, x2, x0, uxth 1
 	ldrh	w21, [x0, 416]
 	mov	w0, 65535
 	cmp	w21, w0
-	bne	.L2549
-	adrp	x1, .LANCHOR196
-	add	x1, x1, :lo12:.LANCHOR196
+	bne	.L2656
+	adrp	x1, .LANCHOR200
+	add	x1, x1, :lo12:.LANCHOR200
 	mov	w2, 131
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	bl	pm_free_sblk
-	ldr	x1, [x20, #:lo12:.LANCHOR100]
+	ldr	x1, [x20, #:lo12:.LANCHOR97]
 	add	x0, x1, x0, uxth 1
 	ldrh	w21, [x0, 416]
-.L2549:
+.L2656:
 	bl	pm_select_ram_region
 	and	x24, x0, 65535
-	adrp	x1, .LANCHOR129
+	adrp	x1, .LANCHOR130
 	lsl	x0, x24, 4
-	add	x2, x1, :lo12:.LANCHOR129
+	add	x2, x1, :lo12:.LANCHOR130
 	mov	x22, x24
 	add	x19, x2, x0
 	mov	x23, x1
 	ldrh	w0, [x2, x0]
 	mov	w2, 65535
 	cmp	w0, w2
-	beq	.L2550
+	beq	.L2657
 	ldr	x1, [x19, 8]
-	cbz	x1, .L2550
+	cbz	x1, .L2657
 	ldrsh	w2, [x19, 2]
-	tbz	w2, #31, .L2550
+	tbz	w2, #31, .L2657
 	bl	pm_write_page
 	ldrh	w0, [x19, 2]
 	and	w0, w0, 32767
 	strh	w0, [x19, 2]
-.L2550:
-	add	x1, x23, :lo12:.LANCHOR129
-	adrp	x25, .LANCHOR102
+.L2657:
+	add	x1, x23, :lo12:.LANCHOR130
+	adrp	x25, .LANCHOR99
 	add	x24, x1, x24, lsl 4
-	add	x25, x25, :lo12:.LANCHOR102
+	add	x25, x25, :lo12:.LANCHOR99
 	mov	w19, 0
-.L2551:
-	ldr	x1, [x20, #:lo12:.LANCHOR100]
+.L2658:
+	ldr	x1, [x20, #:lo12:.LANCHOR97]
 	ldrh	w0, [x1, 698]
 	cmp	w0, w19
-	bhi	.L2553
+	bhi	.L2660
 	bl	pm_free_sblk
-.L2547:
+.L2654:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -15704,7 +16180,7 @@ pm_gc:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2553:
+.L2660:
 	add	x1, x1, x19, sxtw 2
 	ldrh	w3, [x25]
 	mov	w0, 21
@@ -15715,11 +16191,11 @@ pm_gc:
 	sub	w0, w0, #1
 	lsr	w1, w1, w3
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR101
-	ldrb	w1, [x1, #:lo12:.LANCHOR101]
+	adrp	x1, .LANCHOR98
+	ldrb	w1, [x1, #:lo12:.LANCHOR98]
 	udiv	w0, w0, w1
 	cmp	w21, w0, uxth
-	bne	.L2552
+	bne	.L2659
 	mov	w1, w22
 	mov	w0, w19
 	bl	load_l2p_region
@@ -15728,10 +16204,10 @@ pm_gc:
 	bl	pm_write_page
 	mov	w0, -1
 	strh	w0, [x24]
-.L2552:
+.L2659:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L2551
+	b	.L2658
 	.size	pm_gc, .-pm_gc
 	.section	.text.pm_flush_id,"ax",@progbits
 	.align	2
@@ -15740,8 +16216,8 @@ pm_gc:
 pm_flush_id:
 	stp	x29, x30, [sp, -32]!
 	ubfiz	x0, x0, 4, 16
-	adrp	x2, .LANCHOR129
-	add	x2, x2, :lo12:.LANCHOR129
+	adrp	x2, .LANCHOR130
+	add	x2, x2, :lo12:.LANCHOR130
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	add	x19, x2, x0
@@ -15751,12 +16227,12 @@ pm_flush_id:
 	ldrh	w0, [x19, 2]
 	and	w0, w0, 32767
 	strh	w0, [x19, 2]
-	adrp	x19, .LANCHOR127
-	ldr	w0, [x19, #:lo12:.LANCHOR127]
-	cbz	w0, .L2559
+	adrp	x19, .LANCHOR128
+	ldr	w0, [x19, #:lo12:.LANCHOR128]
+	cbz	w0, .L2666
 	bl	pm_gc
-	str	wzr, [x19, #:lo12:.LANCHOR127]
-.L2559:
+	str	wzr, [x19, #:lo12:.LANCHOR128]
+.L2666:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -15770,21 +16246,21 @@ pm_flush:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR129
-	add	x19, x19, :lo12:.LANCHOR129
+	adrp	x19, .LANCHOR130
+	add	x19, x19, :lo12:.LANCHOR130
 	mov	w20, 0
 	add	x19, x19, 2
-.L2566:
+.L2673:
 	ldrsh	w0, [x19]
-	tbz	w0, #31, .L2565
+	tbz	w0, #31, .L2672
 	mov	w0, w20
 	bl	pm_flush_id
-.L2565:
+.L2672:
 	add	w20, w20, 1
 	add	x19, x19, 16
 	and	w20, w20, 65535
 	cmp	w20, 32
-	bne	.L2566
+	bne	.L2673
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -15833,74 +16309,74 @@ pm_init:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	mov	w24, w0
-	adrp	x0, .LANCHOR127
+	adrp	x0, .LANCHOR128
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	adrp	x20, .LANCHOR129
-	str	wzr, [x0, #:lo12:.LANCHOR127]
-	adrp	x0, .LANCHOR187
+	adrp	x20, .LANCHOR130
+	str	wzr, [x0, #:lo12:.LANCHOR128]
+	adrp	x0, .LANCHOR192
 	stp	x25, x26, [sp, 64]
-	add	x19, x20, :lo12:.LANCHOR129
-	strb	w1, [x0, #:lo12:.LANCHOR187]
+	add	x19, x20, :lo12:.LANCHOR130
+	strb	w1, [x0, #:lo12:.LANCHOR192]
 	mov	w0, 64
 	stp	x27, x28, [sp, 80]
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR186
-	adrp	x22, .LANCHOR123
+	adrp	x1, .LANCHOR191
+	adrp	x22, .LANCHOR121
 	add	x23, x19, 512
 	mov	x21, x1
-	add	x22, x22, :lo12:.LANCHOR123
-	str	x0, [x1, #:lo12:.LANCHOR186]
+	add	x22, x22, :lo12:.LANCHOR121
+	str	x0, [x1, #:lo12:.LANCHOR191]
 	mov	w25, -1
-.L2576:
+.L2683:
 	strh	w25, [x19]
 	strh	wzr, [x19, 2]
-	cbz	w24, .L2575
+	cbz	w24, .L2682
 	ldrb	w0, [x22]
 	lsl	w0, w0, 9
 	bl	ftl_malloc
 	str	x0, [x19, 8]
-.L2575:
+.L2682:
 	add	x19, x19, 16
 	cmp	x19, x23
-	bne	.L2576
-	add	x0, x20, :lo12:.LANCHOR129
-	adrp	x19, .LANCHOR100
-	ldr	x24, [x21, #:lo12:.LANCHOR186]
+	bne	.L2683
+	add	x0, x20, :lo12:.LANCHOR130
+	adrp	x19, .LANCHOR97
+	ldr	x24, [x21, #:lo12:.LANCHOR191]
 	mov	w4, 4
 	ldr	x25, [x0, 8]
 	mov	x3, x24
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	x2, x25
 	ldrh	w1, [x0, 692]
 	ldrb	w0, [x0, 694]
 	bl	flash_get_last_written_page
 	sxth	w26, w0
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	w23, w26
 	ldrh	w2, [x0, 696]
 	cmp	w2, w26
-	bgt	.L2577
+	bgt	.L2684
 	ldrh	w1, [x0, 692]
 	mov	w3, w26
-	adrp	x0, .LC167
-	add	x0, x0, :lo12:.LC167
-	adrp	x27, .LANCHOR108
-	adrp	x28, .LANCHOR123
-	add	x27, x27, :lo12:.LANCHOR108
-	add	x28, x28, :lo12:.LANCHOR123
+	adrp	x0, .LC169
+	add	x0, x0, :lo12:.LC169
+	adrp	x27, .LANCHOR105
+	adrp	x28, .LANCHOR121
+	add	x27, x27, :lo12:.LANCHOR105
+	add	x28, x28, :lo12:.LANCHOR121
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	ldrsh	w21, [x0, 696]
-.L2578:
+.L2685:
 	cmp	w21, w26
-	ble	.L2580
-	adrp	x0, .LANCHOR177
+	ble	.L2687
+	adrp	x0, .LANCHOR182
 	mov	w1, 1
-	add	x20, x20, :lo12:.LANCHOR129
+	add	x20, x20, :lo12:.LANCHOR130
 	add	w23, w23, 1
-	strb	w1, [x0, #:lo12:.LANCHOR177]
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	strb	w1, [x0, #:lo12:.LANCHOR182]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	strh	w23, [x0, 696]
 	bl	pm_free_sblk
 	ldr	x1, [x20, 8]
@@ -15909,7 +16385,7 @@ pm_init:
 	ldr	x1, [x20, 8]
 	mov	w0, -1
 	bl	pm_write_page
-.L2577:
+.L2684:
 	bl	pm_free_sblk
 	bl	pm_gc
 	mov	w0, 0
@@ -15920,8 +16396,8 @@ pm_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2580:
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+.L2687:
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	x3, x24
 	ldrh	w1, [x27]
 	mov	x2, x25
@@ -15932,32 +16408,32 @@ pm_init:
 	mov	w1, w22
 	bl	flash_read_page_en
 	mov	w4, w0
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	str	w4, [x29, 108]
 	mov	w2, w22
 	ldr	w1, [x0, 48]
 	ldrh	w3, [x0, 694]
 	add	w1, w1, 1
 	str	w1, [x0, 48]
-	adrp	x0, .LC168
-	add	x0, x0, :lo12:.LC168
+	adrp	x0, .LC170
+	add	x0, x0, :lo12:.LC170
 	ldr	w1, [x24]
 	bl	printf
 	ldr	w4, [x29, 108]
 	cmp	w4, 512
 	ccmn	w4, #1, 4, ne
-	beq	.L2579
-	ldr	x1, [x19, #:lo12:.LANCHOR100]
+	beq	.L2686
+	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	ldr	w0, [x24]
 	ldrh	w2, [x1, 698]
 	cmp	w0, w2
-	bcs	.L2579
+	bcs	.L2686
 	add	x0, x1, x0, uxtw 2
 	str	w22, [x0, 704]
-.L2579:
+.L2686:
 	add	w21, w21, 1
 	sxth	w21, w21
-	b	.L2578
+	b	.L2685
 	.size	pm_init, .-pm_init
 	.section	.text.pm_log2phys,"ax",@progbits
 	.align	2
@@ -15968,66 +16444,66 @@ pm_log2phys:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	mov	x22, x1
-	adrp	x1, .LANCHOR123
+	adrp	x1, .LANCHOR121
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
-	ldrb	w1, [x1, #:lo12:.LANCHOR123]
+	ldrb	w1, [x1, #:lo12:.LANCHOR121]
 	stp	x23, x24, [sp, 48]
 	mov	w23, w2
 	lsl	w21, w1, 7
 	ubfiz	w20, w1, 7, 9
-	adrp	x1, .LANCHOR56
+	adrp	x1, .LANCHOR118
 	udiv	w21, w0, w21
-	ldr	w2, [x1, #:lo12:.LANCHOR56]
+	ldr	w2, [x1, #:lo12:.LANCHOR118]
 	cmp	w0, w2
 	and	w25, w21, 65535
 	msub	w20, w25, w20, w0
-	bcc	.L2590
+	bcc	.L2697
 	mov	w1, w0
-	adrp	x0, .LC169
-	add	x0, x0, :lo12:.LC169
+	adrp	x0, .LC171
+	add	x0, x0, :lo12:.LC171
 	bl	printf
 	mov	w0, -1
-.L2589:
+.L2696:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2590:
-	adrp	x24, .LANCHOR129
-	add	x0, x24, :lo12:.LANCHOR129
+.L2697:
+	adrp	x24, .LANCHOR130
+	add	x0, x24, :lo12:.LANCHOR130
 	and	x20, x20, 65535
 	add	x0, x0, 8
 	mov	x19, 0
-.L2596:
+.L2703:
 	ldr	x1, [x0]
-	cbz	x1, .L2592
+	cbz	x1, .L2699
 	ldrh	w1, [x0, -8]
 	cmp	w1, w25
-	bne	.L2592
-.L2593:
-	cbnz	w23, .L2594
-	add	x0, x24, :lo12:.LANCHOR129
+	bne	.L2699
+.L2700:
+	cbnz	w23, .L2701
+	add	x0, x24, :lo12:.LANCHOR130
 	add	x0, x0, x19, lsl 4
 	ldr	x0, [x0, 8]
 	ldr	w0, [x0, x20, lsl 2]
 	str	w0, [x22]
-.L2595:
-	add	x24, x24, :lo12:.LANCHOR129
+.L2702:
+	add	x24, x24, :lo12:.LANCHOR130
 	add	x19, x24, x19, lsl 4
 	ldrh	w0, [x19, 2]
 	mvn	x1, x0
 	tst	x1, 32767
-	beq	.L2598
+	beq	.L2705
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L2598:
+.L2705:
 	mov	w0, 0
-	b	.L2589
-.L2594:
-	add	x0, x24, :lo12:.LANCHOR129
+	b	.L2696
+.L2701:
+	add	x0, x24, :lo12:.LANCHOR130
 	ldr	w2, [x22]
 	add	x0, x0, x19, lsl 4
 	ldr	x1, [x0, 8]
@@ -16035,173 +16511,53 @@ pm_log2phys:
 	ldrh	w1, [x0, 2]
 	orr	w1, w1, -32768
 	strh	w1, [x0, 2]
-	adrp	x0, .LANCHOR130
-	strb	w21, [x0, #:lo12:.LANCHOR130]
-	b	.L2595
-.L2592:
+	adrp	x0, .LANCHOR131
+	strb	w21, [x0, #:lo12:.LANCHOR131]
+	b	.L2702
+.L2699:
 	add	w19, w19, 1
 	add	x0, x0, 16
 	and	x19, x19, 65535
 	cmp	w19, 32
-	bne	.L2596
+	bne	.L2703
 	bl	pm_select_ram_region
 	and	x19, x0, 65535
 	sbfiz	x1, x19, 4, 32
-	add	x2, x24, :lo12:.LANCHOR129
+	add	x2, x24, :lo12:.LANCHOR130
 	add	x3, x2, x1
 	mov	w26, w0
 	ldrh	w2, [x2, x1]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L2597
+	beq	.L2704
 	ldrsh	w1, [x3, 2]
-	tbz	w1, #31, .L2597
+	tbz	w1, #31, .L2704
 	bl	pm_flush_id
-.L2597:
-	adrp	x0, .LANCHOR197
+.L2704:
+	adrp	x0, .LANCHOR201
 	mov	w1, w26
-	strb	w19, [x0, #:lo12:.LANCHOR197]
+	strb	w19, [x0, #:lo12:.LANCHOR201]
 	mov	w0, w25
 	bl	load_l2p_region
-	b	.L2593
+	b	.L2700
 	.size	pm_log2phys, .-pm_log2phys
-	.section	.text.ftl_read_ahead,"ax",@progbits
-	.align	2
-	.global	ftl_read_ahead
-	.type	ftl_read_ahead, %function
-ftl_read_ahead:
-	stp	x29, x30, [sp, -80]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR58
-	stp	x21, x22, [sp, 32]
-	ldr	w0, [x20, #:lo12:.LANCHOR58]
-	stp	x23, x24, [sp, 48]
-	cmn	w0, #1
-	beq	.L2613
-	mov	w0, 0
-	bl	buf_alloc
-	mov	x19, x0
-	mov	w0, -1
-	cbz	x19, .L2604
-	ldr	w21, [x20, #:lo12:.LANCHOR58]
-	str	w21, [x19, 36]
-	str	w0, [x20, #:lo12:.LANCHOR58]
-	mov	w0, w21
-	ldr	x20, [x19, 8]
-	ldr	x22, [x19, 24]
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 76]
-	cmn	w0, #1
-	bne	.L2607
-	mov	w2, 0
-	add	x1, x29, 76
-	mov	w0, w21
-	bl	pm_log2phys
-.L2607:
-	ldr	w0, [x29, 76]
-	stp	w0, w0, [x19, 40]
-	cmn	w0, #1
-	bne	.L2608
-	adrp	x0, .LANCHOR123
-	mov	w1, 0
-	ldrb	w2, [x0, #:lo12:.LANCHOR123]
-	mov	x0, x20
-	lsl	w2, w2, 9
-	bl	ftl_memset
-	ldrb	w0, [x19, 2]
-	orr	w0, w0, 8
-	strb	w0, [x19, 2]
-.L2613:
-	mov	w0, 0
-.L2604:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 80
-	ret
-.L2608:
-	mov	w1, 1
-	mov	x0, x19
-	bl	sblk_read_page
-	ldr	w23, [x19, 52]
-	cmn	w23, #1
-	bne	.L2609
-	adrp	x0, .LANCHOR6
-	ldr	x1, [x0, #:lo12:.LANCHOR6]
-	ldr	w0, [x1, 552]
-	add	w0, w0, 1
-	str	w0, [x1, 552]
-.L2610:
-	ldr	w5, [x22, 4]
-	cmp	w21, w5
-	beq	.L2611
-	ldrb	w1, [x19, 1]
-	adrp	x0, .LC171
-	ldr	w4, [x22]
-	mov	w2, w21
-	ldp	w6, w7, [x22, 8]
-	add	x0, x0, :lo12:.LC171
-	ldr	w3, [x29, 76]
-	bl	printf
-.L2611:
-	ldr	w0, [x22, 4]
-	cmp	w21, w0
-	bne	.L2612
-	cmn	w23, #1
-	bne	.L2613
-.L2612:
-	mov	w2, 892
-	adrp	x1, .LANCHOR198
-	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR198
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-	b	.L2613
-.L2609:
-	cmp	w23, 256
-	bne	.L2610
-	adrp	x0, .LANCHOR102
-	mov	w20, 21
-	mov	w24, 1
-	ldrh	w1, [x0, #:lo12:.LANCHOR102]
-	ldr	w0, [x29, 76]
-	sub	w20, w20, w1
-	ldp	w2, w3, [x19, 36]
-	lsr	w0, w0, w1
-	lsl	w20, w24, w20
-	sub	w20, w20, #1
-	and	w20, w20, w0
-	adrp	x0, .LANCHOR101
-	ldrb	w0, [x0, #:lo12:.LANCHOR101]
-	udiv	w20, w20, w0
-	adrp	x0, .LC170
-	add	x0, x0, :lo12:.LC170
-	and	w1, w20, 65535
-	bl	printf
-	mov	w2, 0
-	mov	w1, w24
-	mov	w0, w20
-	bl	gc_add_sblk
-	b	.L2610
-	.size	ftl_read_ahead, .-ftl_read_ahead
 	.section	.text.gc_recovery,"ax",@progbits
 	.align	2
 	.global	gc_recovery
 	.type	gc_recovery, %function
 gc_recovery:
 	sub	sp, sp, #240
-	adrp	x0, .LANCHOR74
+	adrp	x0, .LANCHOR71
 	stp	x29, x30, [sp, 32]
 	add	x29, sp, 32
 	stp	x21, x22, [sp, 64]
-	adrp	x21, .LANCHOR6
+	adrp	x21, .LANCHOR10
 	stp	x19, x20, [sp, 48]
-	ldr	x20, [x21, #:lo12:.LANCHOR6]
-	strb	wzr, [x0, #:lo12:.LANCHOR74]
-	adrp	x0, .LANCHOR144
+	ldr	x20, [x21, #:lo12:.LANCHOR10]
+	strb	wzr, [x0, #:lo12:.LANCHOR71]
+	adrp	x0, .LANCHOR145
 	stp	x23, x24, [sp, 80]
-	strb	wzr, [x0, #:lo12:.LANCHOR144]
+	strb	wzr, [x0, #:lo12:.LANCHOR145]
 	stp	x25, x26, [sp, 96]
 	stp	x27, x28, [sp, 112]
 	bl	gc_init
@@ -16210,8 +16566,8 @@ gc_recovery:
 	str	x0, [x29, 176]
 	mov	w0, 65535
 	cmp	w1, w0
-	ldr	x0, [x21, #:lo12:.LANCHOR6]
-	beq	.L2618
+	ldr	x0, [x21, #:lo12:.LANCHOR10]
+	beq	.L2712
 	mov	w1, -1
 	strh	w1, [x0, 130]
 	mov	w0, 1
@@ -16219,41 +16575,41 @@ gc_recovery:
 	mov	x25, x0
 	ldrb	w0, [x20, 89]
 	add	x1, x20, 80
-	adrp	x3, .LANCHOR108
-	adrp	x2, .LANCHOR71
+	adrp	x3, .LANCHOR105
+	adrp	x2, .LANCHOR68
 	sub	w0, w0, #1
 	str	x3, [x29, 152]
 	add	x0, x1, x0, sxtw 1
-	ldrh	w1, [x3, #:lo12:.LANCHOR108]
+	ldrh	w1, [x3, #:lo12:.LANCHOR105]
 	str	x2, [x29, 168]
 	ldrh	w0, [x0, 16]
 	mul	w1, w0, w1
-	ldrb	w0, [x2, #:lo12:.LANCHOR71]
+	ldrb	w0, [x2, #:lo12:.LANCHOR68]
 	str	w1, [x29, 200]
 	cmp	w0, 3
-	bne	.L2619
-	adrp	x0, .LANCHOR83
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	bne	.L2713
+	adrp	x0, .LANCHOR80
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	sub	w0, w0, #1
 	add	w0, w0, w1
 	orr	w0, w0, 50331648
-.L2663:
+.L2757:
 	str	w0, [x25, 40]
-.L2620:
+.L2714:
 	mov	w1, 1
 	mov	x0, x25
 	bl	sblk_read_page
 	ldr	w0, [x25, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2621
+	beq	.L2715
 	ldr	x0, [x25, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L2622
-.L2621:
+	beq	.L2716
+.L2715:
 	mov	x0, x25
 	bl	buf_free
 	ldr	x1, [x25, 24]
@@ -16272,16 +16628,16 @@ gc_recovery:
 	ldr	w1, [x25, 40]
 	ldr	w2, [x25, 52]
 	bl	printf
-.L2667:
-	adrp	x0, .LANCHOR5
+.L2761:
+	adrp	x0, .LANCHOR9
 	ldrh	w1, [x20, 80]
 	mov	w28, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x1, lsl 1]
-	ldr	x0, [x21, #:lo12:.LANCHOR6]
+	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	ldrh	w1, [x20, 80]
 	strh	w1, [x0, 130]
-.L2623:
+.L2717:
 	ldrh	w1, [x20, 80]
 	mov	w2, w28
 	adrp	x0, .LC174
@@ -16291,22 +16647,22 @@ gc_recovery:
 	strh	w0, [x20, 80]
 	bl	pm_flush
 	bl	ftl_ext_info_flush
-	ldr	x0, [x21, #:lo12:.LANCHOR6]
+	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	mov	w1, 65535
 	ldrh	w0, [x0, 130]
 	cmp	w0, w1
-	beq	.L2650
+	beq	.L2744
 	bl	ftl_free_sblk
-.L2650:
-	adrp	x0, .LANCHOR100
-	ldr	x1, [x0, #:lo12:.LANCHOR100]
+.L2744:
+	adrp	x0, .LANCHOR97
+	ldr	x1, [x0, #:lo12:.LANCHOR97]
 	mov	w0, -1
 	strh	w0, [x1, 126]
-	ldr	x1, [x21, #:lo12:.LANCHOR6]
+	ldr	x1, [x21, #:lo12:.LANCHOR10]
 	strh	w0, [x1, 130]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2617:
+.L2711:
 	ldp	x19, x20, [sp, 48]
 	ldp	x21, x22, [sp, 64]
 	ldp	x23, x24, [sp, 80]
@@ -16315,64 +16671,64 @@ gc_recovery:
 	ldp	x29, x30, [sp, 32]
 	add	sp, sp, 240
 	ret
-.L2619:
+.L2713:
 	cmp	w0, 2
-	bne	.L2620
-	adrp	x0, .LANCHOR83
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	bne	.L2714
+	adrp	x0, .LANCHOR80
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	add	w0, w1, w0, lsl 1
 	sub	w0, w0, #1
 	orr	w0, w0, 33554432
-	b	.L2663
-.L2622:
-	adrp	x19, .LANCHOR75
-	adrp	x22, .LANCHOR76
-	adrp	x23, .LANCHOR146
+	b	.L2757
+.L2716:
+	adrp	x19, .LANCHOR72
+	adrp	x22, .LANCHOR73
+	adrp	x23, .LANCHOR147
 	ldr	x1, [x25, 8]
-	ldrb	w0, [x22, #:lo12:.LANCHOR76]
-	adrp	x24, .LANCHOR147
-	ldrh	w2, [x19, #:lo12:.LANCHOR75]
+	ldrb	w0, [x22, #:lo12:.LANCHOR73]
+	adrp	x24, .LANCHOR148
+	ldrh	w2, [x19, #:lo12:.LANCHOR72]
 	mul	w2, w2, w0
-	ldr	x0, [x23, #:lo12:.LANCHOR146]
+	ldr	x0, [x23, #:lo12:.LANCHOR147]
 	lsl	w2, w2, 2
 	bl	ftl_memcpy
-	ldrb	w1, [x22, #:lo12:.LANCHOR76]
-	ldrh	w0, [x19, #:lo12:.LANCHOR75]
+	ldrb	w1, [x22, #:lo12:.LANCHOR73]
+	ldrh	w0, [x19, #:lo12:.LANCHOR72]
 	mul	w0, w0, w1
 	ldr	x1, [x25, 8]
 	lsl	w2, w0, 2
 	add	x1, x1, x0, sxtw 2
-	ldr	x0, [x24, #:lo12:.LANCHOR147]
+	ldr	x0, [x24, #:lo12:.LANCHOR148]
 	bl	ftl_memcpy
 	str	x19, [x29, 144]
-	adrp	x0, .LANCHOR83
-	ldrh	w14, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR80
+	ldrh	w14, [x0, #:lo12:.LANCHOR80]
 	ldr	x0, [x29, 168]
-	ldrb	w0, [x0, #:lo12:.LANCHOR71]
+	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w0, 2
-	beq	.L2624
-.L2664:
+	beq	.L2718
+.L2758:
 	str	w0, [x29, 184]
 	adrp	x26, .LC173
 	ldr	x0, [x29, 152]
 	mov	w22, 0
 	mov	w28, 0
-	add	x0, x0, :lo12:.LANCHOR108
+	add	x0, x0, :lo12:.LANCHOR105
 	str	x0, [x29, 128]
 	add	x0, x26, :lo12:.LC173
 	str	x0, [x29, 120]
-.L2626:
+.L2720:
 	sub	w0, w22, #1
 	str	w0, [x29, 188]
 	cmp	w22, w14
-	beq	.L2635
+	beq	.L2729
 	mov	x27, 0
-	b	.L2636
-.L2624:
+	b	.L2730
+.L2718:
 	lsl	w14, w14, 1
 	mov	w0, 1
-	b	.L2664
-.L2632:
+	b	.L2758
+.L2726:
 	ldr	x1, [x29, 128]
 	ldr	x0, [x29, 160]
 	ldrh	w1, [x1]
@@ -16382,29 +16738,29 @@ gc_recovery:
 	str	w0, [x29, 200]
 	ldrb	w1, [x1]
 	cmp	w1, 3
-	bne	.L2627
+	bne	.L2721
 	add	w0, w22, w0
 	orr	w0, w0, w26, lsl 24
-.L2665:
+.L2759:
 	str	w0, [x25, 40]
 	mov	w1, 1
 	str	w14, [x29, 112]
 	mov	x0, x25
 	bl	sblk_read_page
-	ldr	x0, [x23, #:lo12:.LANCHOR146]
+	ldr	x0, [x23, #:lo12:.LANCHOR147]
 	ldr	w14, [x29, 112]
 	ldr	w3, [x0, x19]
 	ldr	x0, [x25, 24]
 	ldr	w6, [x0, 4]
 	cmp	w3, w6
-	bne	.L2630
-	ldr	x1, [x24, #:lo12:.LANCHOR147]
+	bne	.L2724
+	ldr	x1, [x24, #:lo12:.LANCHOR148]
 	ldr	w2, [x1, x19]
 	ldr	w1, [x0, 8]
 	cmp	w2, w1
-	beq	.L2631
-.L2630:
-	ldr	x1, [x24, #:lo12:.LANCHOR147]
+	beq	.L2725
+.L2724:
+	ldr	x1, [x24, #:lo12:.LANCHOR148]
 	ldr	w2, [x0, 12]
 	str	w2, [sp]
 	str	w14, [x29, 112]
@@ -16415,84 +16771,84 @@ gc_recovery:
 	ldr	w2, [x25, 52]
 	ldr	x0, [x29, 120]
 	bl	printf
-	ldr	x0, [x23, #:lo12:.LANCHOR146]
+	ldr	x0, [x23, #:lo12:.LANCHOR147]
 	ldr	w14, [x29, 112]
 	ldr	w0, [x0, x19]
 	cmn	w0, #1
-	beq	.L2631
+	beq	.L2725
 	mov	x0, x25
 	bl	buf_free
-	b	.L2667
-.L2627:
+	b	.L2761
+.L2721:
 	cmp	w1, 2
-	bne	.L2629
+	bne	.L2723
 	ldr	w1, [x29, 188]
 	add	w0, w0, w1
 	add	w0, w0, w26
 	orr	w0, w0, 33554432
-	b	.L2665
-.L2629:
+	b	.L2759
+.L2723:
 	add	w0, w22, w0
-	b	.L2665
-.L2631:
+	b	.L2759
+.L2725:
 	add	w28, w28, 1
 	add	w26, w26, 1
 	add	x19, x19, 4
-.L2634:
+.L2728:
 	ldr	w0, [x29, 184]
 	cmp	w0, w26
-	bcs	.L2632
+	bcs	.L2726
 	add	x27, x27, 1
-.L2636:
+.L2730:
 	ldr	x0, [x29, 176]
 	ldrb	w0, [x0, 9]
 	cmp	w0, w27
-	ble	.L2633
+	ble	.L2727
 	add	x0, x20, x27, lsl 1
 	str	x0, [x29, 160]
 	ldr	x0, [x29, 168]
 	sbfiz	x19, x28, 2, 32
 	mov	w26, 1
-	add	x0, x0, :lo12:.LANCHOR71
+	add	x0, x0, :lo12:.LANCHOR68
 	str	x0, [x29, 136]
-	b	.L2634
-.L2633:
+	b	.L2728
+.L2727:
 	add	w22, w22, 1
-	b	.L2626
-.L2635:
+	b	.L2720
+.L2729:
 	mov	x0, x25
 	bl	buf_free
 	ldr	x3, [x29, 144]
-	adrp	x25, .LANCHOR5
+	adrp	x25, .LANCHOR9
 	ldr	x0, [x29, 176]
 	mov	w28, 0
 	ldrh	w2, [x20, 80]
 	mov	w27, 0
-	ldr	x1, [x25, #:lo12:.LANCHOR5]
-	ldrh	w3, [x3, #:lo12:.LANCHOR75]
+	ldr	x1, [x25, #:lo12:.LANCHOR9]
+	ldrh	w3, [x3, #:lo12:.LANCHOR72]
 	ldrb	w0, [x0, 9]
 	str	x25, [x29, 144]
 	str	wzr, [x29, 188]
 	mul	w0, w0, w3
 	strh	w0, [x1, x2, lsl 1]
-	adrp	x0, .LANCHOR102
-	add	x0, x0, :lo12:.LANCHOR102
+	adrp	x0, .LANCHOR99
+	add	x0, x0, :lo12:.LANCHOR99
 	str	x0, [x29, 112]
-.L2637:
+.L2731:
 	sub	w0, w27, #1
 	str	w0, [x29, 136]
 	cmp	w22, w27
-	beq	.L2648
+	beq	.L2742
 	mov	x26, 0
-	b	.L2649
-.L2645:
+	b	.L2743
+.L2739:
 	ldr	w0, [x29, 188]
-	ldr	x1, [x23, #:lo12:.LANCHOR146]
+	ldr	x1, [x23, #:lo12:.LANCHOR147]
 	sbfiz	x0, x0, 2, 32
 	ldr	w6, [x1, x0]
 	cmn	w6, #1
-	beq	.L2638
-	ldr	x1, [x24, #:lo12:.LANCHOR147]
+	beq	.L2732
+	ldr	x1, [x24, #:lo12:.LANCHOR148]
 	str	w6, [x29, 108]
 	ldr	w0, [x1, x0]
 	str	w0, [x29, 160]
@@ -16501,26 +16857,26 @@ gc_recovery:
 	str	w0, [x29, 204]
 	cmn	w0, #1
 	ldr	w6, [x29, 108]
-	bne	.L2639
+	bne	.L2733
 	mov	w0, w6
 	str	w6, [x29, 108]
 	mov	w2, 0
 	add	x1, x29, 204
 	bl	pm_log2phys
 	ldr	w6, [x29, 108]
-.L2639:
+.L2733:
 	ldr	x0, [x29, 128]
 	ldr	x1, [x29, 152]
 	ldrh	w0, [x0, 96]
-	ldrh	w1, [x1, #:lo12:.LANCHOR108]
+	ldrh	w1, [x1, #:lo12:.LANCHOR105]
 	mul	w0, w0, w1
 	ldr	x1, [x29, 168]
-	ldrb	w1, [x1, #:lo12:.LANCHOR71]
+	ldrb	w1, [x1, #:lo12:.LANCHOR68]
 	cmp	w1, 3
-	bne	.L2640
+	bne	.L2734
 	add	w0, w27, w0
 	orr	w0, w0, w25, lsl 24
-.L2666:
+.L2760:
 	str	w0, [x29, 200]
 	mov	w19, 21
 	ldr	x0, [x29, 112]
@@ -16538,96 +16894,96 @@ gc_recovery:
 	ldr	w0, [x29, 204]
 	cmp	w1, w0
 	and	x19, x19, 65535
-	bne	.L2643
+	bne	.L2737
 	add	x1, x29, 200
 	mov	w0, w6
 	bl	pm_log2phys
 	add	w28, w28, 1
 	mov	w0, w19
 	bl	ftl_vpn_decrement
-.L2644:
+.L2738:
 	ldr	w0, [x29, 188]
 	add	w0, w0, 1
 	str	w0, [x29, 188]
-	adrp	x0, .LANCHOR3
-	ldr	x0, [x0, #:lo12:.LANCHOR3]
+	adrp	x0, .LANCHOR7
+	ldr	x0, [x0, #:lo12:.LANCHOR7]
 	add	x0, x0, x19, lsl 2
 	ldrb	w0, [x0, 2]
 	tst	w0, 224
-	bne	.L2638
+	bne	.L2732
 	ldr	x0, [x29, 144]
 	lsl	x19, x19, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x0, x19]
-	cbz	w1, .L2638
+	cbz	w1, .L2732
 	strh	wzr, [x0, x19]
-.L2638:
+.L2732:
 	add	w25, w25, 1
-.L2647:
+.L2741:
 	ldr	w0, [x29, 184]
 	cmp	w0, w25
-	bcs	.L2645
+	bcs	.L2739
 	add	x26, x26, 1
-.L2649:
+.L2743:
 	ldr	x0, [x29, 176]
 	ldrb	w0, [x0, 9]
 	cmp	w0, w26
-	ble	.L2646
+	ble	.L2740
 	add	x0, x20, x26, lsl 1
 	mov	w25, 1
 	str	x0, [x29, 128]
-	adrp	x0, .LANCHOR101
-	add	x0, x0, :lo12:.LANCHOR101
+	adrp	x0, .LANCHOR98
+	add	x0, x0, :lo12:.LANCHOR98
 	str	x0, [x29, 120]
-	b	.L2647
-.L2640:
+	b	.L2741
+.L2734:
 	cmp	w1, 2
-	bne	.L2642
+	bne	.L2736
 	ldr	w1, [x29, 136]
 	add	w0, w0, w1
 	add	w0, w0, w25
 	orr	w0, w0, 33554432
-	b	.L2666
-.L2642:
+	b	.L2760
+.L2736:
 	add	w0, w27, w0
-	b	.L2666
-.L2643:
+	b	.L2760
+.L2737:
 	ldr	w1, [x29, 200]
 	cmp	w0, w1
 	cinc	w28, w28, eq
-	b	.L2644
-.L2646:
+	b	.L2738
+.L2740:
 	add	w27, w27, 1
-	b	.L2637
-.L2648:
+	b	.L2731
+.L2742:
 	ldr	x0, [x29, 144]
 	ldrh	w1, [x20, 80]
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	strh	w28, [x0, x1, lsl 1]
-	b	.L2623
-.L2618:
+	b	.L2717
+.L2712:
 	ldrh	w0, [x0, 130]
 	cmp	w0, w1
-	beq	.L2617
-	adrp	x19, .LANCHOR100
-	ldr	x1, [x19, #:lo12:.LANCHOR100]
+	beq	.L2711
+	adrp	x19, .LANCHOR97
+	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	ldrh	w1, [x1, 126]
 	cmp	w1, w0
-	bne	.L2652
+	bne	.L2746
 	bl	pm_flush
-	ldr	x0, [x21, #:lo12:.LANCHOR6]
+	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	ldrh	w0, [x0, 130]
 	bl	ftl_free_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	w1, -1
 	strh	w1, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2652:
-	ldr	x0, [x21, #:lo12:.LANCHOR6]
+.L2746:
+	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	mov	w1, -1
 	strh	w1, [x0, 130]
-	b	.L2617
+	b	.L2711
 	.size	gc_recovery, .-gc_recovery
 	.section	.text.zftl_init,"ax",@progbits
 	.align	2
@@ -16635,351 +16991,355 @@ gc_recovery:
 	.type	zftl_init, %function
 zftl_init:
 	stp	x29, x30, [sp, -112]!
-	adrp	x1, .LANCHOR54
+	adrp	x1, .LANCHOR56
 	mov	w0, -1
 	add	x29, sp, 0
-	strb	w0, [x1, #:lo12:.LANCHOR54]
-	adrp	x1, .LANCHOR55
+	strb	w0, [x1, #:lo12:.LANCHOR56]
+	adrp	x1, .LANCHOR57
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR83
-	strb	wzr, [x1, #:lo12:.LANCHOR55]
-	adrp	x1, .LANCHOR169
+	adrp	x22, .LANCHOR80
+	strb	wzr, [x1, #:lo12:.LANCHOR57]
+	adrp	x1, .LANCHOR124
 	stp	x19, x20, [sp, 16]
-	adrp	x21, .LANCHOR76
-	strb	w0, [x1, #:lo12:.LANCHOR169]
-	adrp	x0, .LANCHOR121
-	mov	w1, -1
+	adrp	x21, .LANCHOR73
+	strb	w0, [x1, #:lo12:.LANCHOR124]
+	adrp	x1, .LANCHOR125
 	stp	x23, x24, [sp, 48]
-	strb	wzr, [x0, #:lo12:.LANCHOR121]
-	adrp	x0, .LANCHOR58
+	adrp	x20, .LANCHOR199
+	strb	wzr, [x1, #:lo12:.LANCHOR125]
+	adrp	x1, .LANCHOR174
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LANCHOR2
-	str	w1, [x0, #:lo12:.LANCHOR58]
-	adrp	x1, .LC175
+	adrp	x23, .LANCHOR6
+	strb	w0, [x1, #:lo12:.LANCHOR174]
+	adrp	x0, .LANCHOR119
+	mov	w1, -1
 	stp	x27, x28, [sp, 80]
-	add	x1, x1, :lo12:.LC175
+	strb	wzr, [x0, #:lo12:.LANCHOR119]
+	adrp	x0, .LANCHOR202
+	str	w1, [x0, #:lo12:.LANCHOR202]
+	adrp	x1, .LC175
 	adrp	x0, .LC91
+	add	x1, x1, :lo12:.LC175
 	add	x0, x0, :lo12:.LC91
 	bl	printf
-	adrp	x20, .LANCHOR195
 	adrp	x1, .LANCHOR34
 	add	x1, x1, :lo12:.LANCHOR34
-	adrp	x0, .LANCHOR71
-	adrp	x2, .LANCHOR123
-	adrp	x3, .LANCHOR75
-	adrp	x4, .LANCHOR101
+	adrp	x0, .LANCHOR68
+	adrp	x2, .LANCHOR121
+	adrp	x3, .LANCHOR72
+	adrp	x4, .LANCHOR98
 	ldrb	w5, [x1, 12]
-	strb	w5, [x0, #:lo12:.LANCHOR71]
+	strb	w5, [x0, #:lo12:.LANCHOR68]
 	ldrb	w0, [x1, 9]
-	strb	w0, [x2, #:lo12:.LANCHOR123]
+	strb	w0, [x2, #:lo12:.LANCHOR121]
 	ldrh	w2, [x1, 10]
-	strh	w2, [x3, #:lo12:.LANCHOR75]
-	adrp	x3, .LANCHOR14
+	strh	w2, [x3, #:lo12:.LANCHOR72]
+	adrp	x3, .LANCHOR18
 	ldrh	w7, [x1, 14]
 	ubfiz	w10, w0, 9, 7
-	ldrb	w6, [x3, #:lo12:.LANCHOR14]
-	adrp	x3, .LANCHOR109
+	ldrb	w6, [x3, #:lo12:.LANCHOR18]
+	adrp	x3, .LANCHOR106
 	sdiv	w8, w2, w5
-	strh	w7, [x23, #:lo12:.LANCHOR2]
-	strb	w6, [x3, #:lo12:.LANCHOR109]
+	strh	w7, [x23, #:lo12:.LANCHOR6]
+	strb	w6, [x3, #:lo12:.LANCHOR106]
 	ldrb	w3, [x1, 13]
-	adrp	x1, .LANCHOR28
-	strb	w3, [x4, #:lo12:.LANCHOR101]
-	ldrh	w4, [x1, #:lo12:.LANCHOR28]
-	adrp	x1, .LANCHOR108
-	strh	w8, [x22, #:lo12:.LANCHOR83]
+	adrp	x1, .LANCHOR2
+	strb	w3, [x4, #:lo12:.LANCHOR98]
+	ldrh	w4, [x1, #:lo12:.LANCHOR2]
+	adrp	x1, .LANCHOR105
+	strh	w8, [x22, #:lo12:.LANCHOR80]
 	mul	w6, w6, w3
-	strh	w4, [x1, #:lo12:.LANCHOR108]
-	strh	w10, [x20, #:lo12:.LANCHOR195]
+	strh	w4, [x1, #:lo12:.LANCHOR105]
+	strh	w10, [x20, #:lo12:.LANCHOR199]
 	mov	w3, 1
 	and	w6, w6, 255
 	mov	w1, 0
-	strb	w6, [x21, #:lo12:.LANCHOR76]
-.L2669:
+	strb	w6, [x21, #:lo12:.LANCHOR73]
+.L2763:
 	cmp	w4, w3
-	bcs	.L2670
+	bcs	.L2764
 	mul	w2, w0, w2
-	adrp	x3, .LANCHOR102
+	adrp	x3, .LANCHOR99
 	sub	w1, w1, #1
 	mov	w4, 0
-	strh	w1, [x3, #:lo12:.LANCHOR102]
+	strh	w1, [x3, #:lo12:.LANCHOR99]
 	mov	w1, 1
 	mul	w3, w2, w7
 	lsr	w11, w3, 21
-.L2671:
+.L2765:
 	cmp	w11, w1
-	bcs	.L2672
+	bcs	.L2766
 	mov	w1, 57344
 	sub	w4, w4, #1
 	movk	w1, 0x1c, lsl 16
 	mul	w3, w3, w6
-	adrp	x28, .LANCHOR56
+	adrp	x28, .LANCHOR118
 	sub	w11, w10, #1
 	mul	w1, w6, w1
-	adrp	x24, .LANCHOR182
+	adrp	x24, .LANCHOR187
 	mul	w8, w8, w6
-	adrp	x27, .LANCHOR200
+	adrp	x27, .LANCHOR204
 	mul	w2, w2, w6
-	adrp	x26, .LANCHOR140
+	adrp	x26, .LANCHOR141
 	lsl	w1, w1, w4
-	adrp	x4, .LANCHOR61
+	adrp	x4, .LANCHOR58
 	sub	w2, w2, #1
-	adrp	x25, .LANCHOR87
-	str	w1, [x4, #:lo12:.LANCHOR61]
-	adrp	x4, .LANCHOR199
-	str	w3, [x4, #:lo12:.LANCHOR199]
+	adrp	x25, .LANCHOR84
+	str	w1, [x4, #:lo12:.LANCHOR58]
+	adrp	x4, .LANCHOR203
+	str	w3, [x4, #:lo12:.LANCHOR203]
 	add	w3, w1, 24576
-	str	w3, [x27, #:lo12:.LANCHOR200]
+	str	w3, [x27, #:lo12:.LANCHOR204]
 	udiv	w0, w3, w0
 	udiv	w3, w3, w2
-	adrp	x2, .LANCHOR104
-	str	w0, [x28, #:lo12:.LANCHOR56]
+	adrp	x2, .LANCHOR101
+	str	w0, [x28, #:lo12:.LANCHOR118]
 	add	w0, w11, w0, lsl 2
 	add	w3, w3, 8
 	udiv	w0, w0, w10
-	strh	w0, [x24, #:lo12:.LANCHOR182]
+	strh	w0, [x24, #:lo12:.LANCHOR187]
 	ubfiz	w0, w0, 4, 16
 	sdiv	w0, w0, w8
-	adrp	x8, .LANCHOR91
+	adrp	x8, .LANCHOR88
 	str	x8, [x29, 104]
-	strh	w3, [x8, #:lo12:.LANCHOR91]
-	strh	w0, [x26, #:lo12:.LANCHOR140]
+	strh	w3, [x8, #:lo12:.LANCHOR88]
+	strh	w0, [x26, #:lo12:.LANCHOR141]
 	add	w0, w7, w7, lsl 1
 	asr	w0, w0, 2
-	strh	w0, [x2, #:lo12:.LANCHOR104]
+	strh	w0, [x2, #:lo12:.LANCHOR101]
 	lsr	w0, w7, 4
-	strh	w0, [x25, #:lo12:.LANCHOR87]
+	strh	w0, [x25, #:lo12:.LANCHOR84]
 	cmp	w0, 79
-	bhi	.L2673
+	bhi	.L2767
 	mov	w0, 80
-	strh	w0, [x25, #:lo12:.LANCHOR87]
-.L2673:
-	adrp	x7, .LANCHOR105
+	strh	w0, [x25, #:lo12:.LANCHOR84]
+.L2767:
+	adrp	x7, .LANCHOR102
 	mov	w0, 2000
-	adrp	x3, .LANCHOR103
-	adrp	x6, .LANCHOR139
-	strh	w0, [x7, #:lo12:.LANCHOR105]
+	adrp	x3, .LANCHOR100
+	adrp	x6, .LANCHOR140
+	strh	w0, [x7, #:lo12:.LANCHOR102]
 	mov	w0, 50
-	adrp	x2, .LANCHOR138
-	strh	w0, [x3, #:lo12:.LANCHOR103]
+	adrp	x2, .LANCHOR139
+	strh	w0, [x3, #:lo12:.LANCHOR100]
 	mov	w0, 256
-	strh	w0, [x6, #:lo12:.LANCHOR139]
+	strh	w0, [x6, #:lo12:.LANCHOR140]
 	mov	w0, 48
-	strh	w0, [x2, #:lo12:.LANCHOR138]
-	adrp	x0, .LANCHOR4
+	strh	w0, [x2, #:lo12:.LANCHOR139]
+	adrp	x0, .LANCHOR8
 	mov	w8, 32
 	cmp	w5, 2
-	strh	w8, [x0, #:lo12:.LANCHOR4]
-	beq	.L2674
-	adrp	x5, .LANCHOR73
-	ldrb	w5, [x5, #:lo12:.LANCHOR73]
-	cbz	w5, .L2675
-.L2674:
+	strh	w8, [x0, #:lo12:.LANCHOR8]
+	beq	.L2768
+	adrp	x5, .LANCHOR70
+	ldrb	w5, [x5, #:lo12:.LANCHOR70]
+	cbz	w5, .L2769
+.L2768:
 	mov	w5, 150
-	strh	w5, [x3, #:lo12:.LANCHOR103]
+	strh	w5, [x3, #:lo12:.LANCHOR100]
 	mov	w3, 64
-	strh	w3, [x2, #:lo12:.LANCHOR138]
+	strh	w3, [x2, #:lo12:.LANCHOR139]
 	mov	w2, 12
-	strh	w2, [x0, #:lo12:.LANCHOR4]
-	adrp	x2, .LANCHOR13
-	ldrb	w2, [x2, #:lo12:.LANCHOR13]
-	cbnz	w2, .L2675
+	strh	w2, [x0, #:lo12:.LANCHOR8]
+	adrp	x2, .LANCHOR0
+	ldrb	w2, [x2, #:lo12:.LANCHOR0]
+	cbnz	w2, .L2769
 	mov	w2, 4
-	strh	w2, [x0, #:lo12:.LANCHOR4]
+	strh	w2, [x0, #:lo12:.LANCHOR8]
 	mov	w0, 600
-	strh	w0, [x7, #:lo12:.LANCHOR105]
+	strh	w0, [x7, #:lo12:.LANCHOR102]
 	mov	w0, 128
-	strh	w0, [x6, #:lo12:.LANCHOR139]
-.L2675:
-	adrp	x19, .LANCHOR9
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L2677
+	strh	w0, [x6, #:lo12:.LANCHOR140]
+.L2769:
+	adrp	x19, .LANCHOR14
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2771
 	str	x4, [x29, 96]
 	adrp	x0, .LC176
 	add	x0, x0, :lo12:.LC176
 	bl	printf
 	ldr	x4, [x29, 96]
-.L2677:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L2678
-	ldr	w1, [x4, #:lo12:.LANCHOR199]
+.L2771:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2772
+	ldr	w1, [x4, #:lo12:.LANCHOR203]
 	adrp	x0, .LC177
 	add	x0, x0, :lo12:.LC177
 	bl	printf
-.L2678:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L2679
-	ldr	w1, [x28, #:lo12:.LANCHOR56]
+.L2772:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2773
+	ldr	w1, [x28, #:lo12:.LANCHOR118]
 	adrp	x0, .LC178
 	add	x0, x0, :lo12:.LC178
 	bl	printf
-.L2679:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L2680
-	ldr	w1, [x27, #:lo12:.LANCHOR200]
+.L2773:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2774
+	ldr	w1, [x27, #:lo12:.LANCHOR204]
 	adrp	x0, .LC179
 	add	x0, x0, :lo12:.LC179
 	bl	printf
-.L2680:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L2681
-	ldrh	w1, [x24, #:lo12:.LANCHOR182]
+.L2774:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2775
+	ldrh	w1, [x24, #:lo12:.LANCHOR187]
 	adrp	x0, .LC180
 	add	x0, x0, :lo12:.LC180
 	bl	printf
-.L2681:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L2682
-	ldrh	w1, [x20, #:lo12:.LANCHOR195]
+.L2775:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2776
+	ldrh	w1, [x20, #:lo12:.LANCHOR199]
 	adrp	x0, .LC181
 	add	x0, x0, :lo12:.LC181
 	bl	printf
-.L2682:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L2683
-	ldrh	w1, [x26, #:lo12:.LANCHOR140]
+.L2776:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2777
+	ldrh	w1, [x26, #:lo12:.LANCHOR141]
 	adrp	x0, .LC182
 	add	x0, x0, :lo12:.LC182
 	bl	printf
-.L2683:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L2684
-	ldrh	w1, [x25, #:lo12:.LANCHOR87]
+.L2777:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2778
+	ldrh	w1, [x25, #:lo12:.LANCHOR84]
 	adrp	x0, .LC183
 	add	x0, x0, :lo12:.LC183
 	bl	printf
-.L2684:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L2685
+.L2778:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2779
 	ldr	x0, [x29, 104]
-	ldrh	w1, [x0, #:lo12:.LANCHOR91]
+	ldrh	w1, [x0, #:lo12:.LANCHOR88]
 	adrp	x0, .LC184
 	add	x0, x0, :lo12:.LC184
 	bl	printf
-.L2685:
+.L2779:
 	bl	buf_init
-	adrp	x25, .LANCHOR6
-	ldrh	w1, [x23, #:lo12:.LANCHOR2]
+	adrp	x25, .LANCHOR10
+	ldrh	w1, [x23, #:lo12:.LANCHOR6]
 	mov	w0, 6
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR0
-	str	x0, [x1, #:lo12:.LANCHOR0]
-	ldrb	w1, [x21, #:lo12:.LANCHOR76]
-	ldrh	w0, [x22, #:lo12:.LANCHOR83]
+	adrp	x1, .LANCHOR4
+	str	x0, [x1, #:lo12:.LANCHOR4]
+	ldrb	w1, [x21, #:lo12:.LANCHOR73]
+	ldrh	w0, [x22, #:lo12:.LANCHOR80]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR115
+	adrp	x1, .LANCHOR112
 	adrp	x2, ftl_ext_info_data_buffer
 	add	x2, x2, :lo12:ftl_ext_info_data_buffer
-	str	x0, [x1, #:lo12:.LANCHOR115]
-	adrp	x0, .LANCHOR114
-	ldrh	w1, [x22, #:lo12:.LANCHOR83]
-	str	x2, [x0, #:lo12:.LANCHOR114]
-	ldrb	w0, [x21, #:lo12:.LANCHOR76]
+	str	x0, [x1, #:lo12:.LANCHOR112]
+	adrp	x0, .LANCHOR111
+	ldrh	w1, [x22, #:lo12:.LANCHOR80]
+	str	x2, [x0, #:lo12:.LANCHOR111]
+	ldrb	w0, [x21, #:lo12:.LANCHOR73]
 	mul	w1, w1, w0
 	lsl	w0, w1, 1
-	adrp	x1, .LANCHOR5
+	adrp	x1, .LANCHOR9
 	add	x3, x2, x0, sxtw 2
-	str	x3, [x1, #:lo12:.LANCHOR5]
-	ldrh	w1, [x23, #:lo12:.LANCHOR2]
+	str	x3, [x1, #:lo12:.LANCHOR9]
+	ldrh	w1, [x23, #:lo12:.LANCHOR6]
 	add	w1, w0, w1, lsr 1
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	add	x1, x2, x1, sxtw 2
-	str	x1, [x25, #:lo12:.LANCHOR6]
-	tbz	x0, 12, .L2686
+	str	x1, [x25, #:lo12:.LANCHOR10]
+	tbz	x0, 12, .L2780
 	adrp	x0, .LC185
 	add	x0, x0, :lo12:.LC185
 	bl	printf
-.L2686:
-	ldrh	w0, [x22, #:lo12:.LANCHOR83]
-	ldrb	w21, [x21, #:lo12:.LANCHOR76]
-	ldrh	w1, [x23, #:lo12:.LANCHOR2]
-	ldrh	w22, [x24, #:lo12:.LANCHOR182]
+.L2780:
+	ldrh	w0, [x22, #:lo12:.LANCHOR80]
+	ldrb	w21, [x21, #:lo12:.LANCHOR73]
+	ldrh	w1, [x23, #:lo12:.LANCHOR6]
+	ldrh	w22, [x24, #:lo12:.LANCHOR187]
 	mul	w21, w0, w21
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	add	w21, w1, w21, lsl 2
 	lsl	w1, w1, 2
 	lsl	w21, w21, 1
 	add	w22, w1, w22, lsl 2
 	add	w21, w21, 632
 	add	w22, w22, 704
-	tbz	x0, 12, .L2687
-	ldrh	w3, [x20, #:lo12:.LANCHOR195]
+	tbz	x0, 12, .L2781
+	ldrh	w3, [x20, #:lo12:.LANCHOR199]
 	adrp	x0, .LC186
 	mov	w2, w22
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC186
 	bl	printf
-.L2687:
-	ldrh	w0, [x20, #:lo12:.LANCHOR195]
+.L2781:
+	ldrh	w0, [x20, #:lo12:.LANCHOR199]
 	cmp	w21, w0
-	bhi	.L2688
+	bhi	.L2782
 	cmp	w22, w0
-	bls	.L2689
-.L2688:
-.L2732:
-	b	.L2732
-.L2670:
+	bls	.L2783
+.L2782:
+.L2826:
+	b	.L2826
+.L2764:
 	add	w1, w1, 1
 	lsl	w3, w3, 1
 	and	w1, w1, 65535
-	b	.L2669
-.L2672:
+	b	.L2763
+.L2766:
 	add	w4, w4, 1
 	lsl	w1, w1, 1
 	and	w4, w4, 65535
-	b	.L2671
-.L2689:
+	b	.L2765
+.L2783:
 	bl	sblk_init
 	bl	ftl_info_blk_init
 	cmn	w0, #1
-	beq	.L2668
+	beq	.L2762
 	bl	ftl_ext_info_init
-	adrp	x19, .LANCHOR100
+	adrp	x19, .LANCHOR97
 	mov	w0, 1
 	bl	pm_init
 	bl	lpa_rebuild_hash
-	ldr	x0, [x25, #:lo12:.LANCHOR6]
+	ldr	x0, [x25, #:lo12:.LANCHOR10]
 	mov	x1, 0
 	add	x0, x0, 16
 	bl	ftl_open_sblk_recovery
-	ldr	x0, [x25, #:lo12:.LANCHOR6]
+	ldr	x0, [x25, #:lo12:.LANCHOR10]
 	add	x1, x0, 16
 	add	x0, x0, 48
 	bl	ftl_open_sblk_recovery
-	ldr	x1, [x19, #:lo12:.LANCHOR100]
+	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	ldr	w0, [x1, 8]
 	add	w0, w0, 16
 	str	w0, [x1, 8]
-	ldr	x0, [x25, #:lo12:.LANCHOR6]
+	ldr	x0, [x25, #:lo12:.LANCHOR10]
 	add	x0, x0, 16
 	bl	ftl_info_data_recovery
-	ldr	x0, [x25, #:lo12:.LANCHOR6]
+	ldr	x0, [x25, #:lo12:.LANCHOR10]
 	add	x0, x0, 48
 	bl	ftl_info_data_recovery
-	ldr	x0, [x25, #:lo12:.LANCHOR6]
+	ldr	x0, [x25, #:lo12:.LANCHOR10]
 	add	x0, x0, 80
 	bl	ftl_info_data_recovery
 	bl	gc_recovery
 	bl	pm_flush
 	mov	w0, 1
 	bl	ftl_total_vpn_update
-	adrp	x0, .LANCHOR177
-	ldrb	w0, [x0, #:lo12:.LANCHOR177]
-	cbz	w0, .L2691
-	ldr	x1, [x19, #:lo12:.LANCHOR100]
+	adrp	x0, .LANCHOR182
+	ldrb	w0, [x0, #:lo12:.LANCHOR182]
+	cbz	w0, .L2785
+	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	ldr	w0, [x1, 68]
 	add	w0, w0, 1
 	str	w0, [x1, 68]
-.L2691:
+.L2785:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
 	bl	print_ftl_debug_info
 	mov	w0, 0
-.L2668:
+.L2762:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -16997,9 +17357,9 @@ rk_ftl_init:
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	bl	nand_flash_init
-	cbnz	w0, .L2736
+	cbnz	w0, .L2830
 	bl	zftl_init
-.L2736:
+.L2830:
 	mov	w19, w0
 	bl	idb_init
 	mov	w1, w19
@@ -17017,69 +17377,69 @@ rk_ftl_init:
 	.type	gc_update_l2p_map_new, %function
 gc_update_l2p_map_new:
 	stp	x29, x30, [sp, -176]!
-	adrp	x0, .LANCHOR6
-	adrp	x1, .LANCHOR75
+	adrp	x0, .LANCHOR10
+	adrp	x1, .LANCHOR72
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	ldr	x21, [x0, #:lo12:.LANCHOR6]
+	ldr	x21, [x0, #:lo12:.LANCHOR10]
 	stp	x25, x26, [sp, 64]
-	ldrh	w26, [x1, #:lo12:.LANCHOR75]
+	ldrh	w26, [x1, #:lo12:.LANCHOR72]
 	add	x1, x21, 80
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR9
+	adrp	x24, .LANCHOR14
 	stp	x19, x20, [sp, 16]
 	stp	x27, x28, [sp, 80]
 	stp	x0, x1, [x29, 128]
 	ldrb	w1, [x1, 9]
 	mul	w26, w26, w1
-	ldr	w1, [x24, #:lo12:.LANCHOR9]
-	tbz	x1, 8, .L2739
+	ldr	w1, [x24, #:lo12:.LANCHOR14]
+	tbz	x1, 8, .L2833
 	ldrh	w1, [x21, 80]
 	adrp	x0, .LC188
 	add	x0, x0, :lo12:.LC188
 	bl	printf
-.L2739:
-	adrp	x23, .LANCHOR5
+.L2833:
+	adrp	x23, .LANCHOR9
 	ldrh	w1, [x21, 80]
 	sub	w2, w26, #1
 	mov	x22, 0
-	ldr	x0, [x23, #:lo12:.LANCHOR5]
+	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	mov	w25, 0
 	strh	w2, [x0, x1, lsl 1]
-	adrp	x0, .LANCHOR123
-	add	x0, x0, :lo12:.LANCHOR123
+	adrp	x0, .LANCHOR121
+	add	x0, x0, :lo12:.LANCHOR121
 	str	x0, [x29, 104]
-.L2740:
+.L2834:
 	mov	w28, w22
 	cmp	w26, w22
-	bhi	.L2750
-	ldr	w0, [x24, #:lo12:.LANCHOR9]
-	tbz	x0, 8, .L2751
+	bhi	.L2844
+	ldr	w0, [x24, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L2845
 	ldr	x0, [x29, 128]
 	mov	w3, w25
-	ldr	x1, [x23, #:lo12:.LANCHOR5]
+	ldr	x1, [x23, #:lo12:.LANCHOR9]
 	ldrh	w2, [x21, 80]
-	ldr	x0, [x0, #:lo12:.LANCHOR6]
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldrh	w2, [x1, x2, lsl 1]
 	ldrh	w1, [x0, 80]
 	adrp	x0, .LC191
 	add	x0, x0, :lo12:.LC191
 	bl	printf
-.L2751:
+.L2845:
 	ldrh	w1, [x21, 80]
-	ldr	x0, [x23, #:lo12:.LANCHOR5]
+	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, x1, lsl 1]
 	cmp	w25, w0
-	beq	.L2752
-	adrp	x1, .LANCHOR201
+	beq	.L2846
+	adrp	x1, .LANCHOR205
 	adrp	x0, .LC0
 	mov	w2, 483
-	add	x1, x1, :lo12:.LANCHOR201
+	add	x1, x1, :lo12:.LANCHOR205
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2752:
+.L2846:
 	ldrh	w1, [x21, 80]
-	ldr	x0, [x23, #:lo12:.LANCHOR5]
+	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	strh	w25, [x0, x1, lsl 1]
 	ldrh	w0, [x21, 80]
 	bl	zftl_insert_data_list
@@ -17090,27 +17450,27 @@ gc_update_l2p_map_new:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L2750:
-	adrp	x27, .LANCHOR146
+.L2844:
+	adrp	x27, .LANCHOR147
 	lsl	x19, x22, 2
-	ldr	x0, [x27, #:lo12:.LANCHOR146]
+	ldr	x0, [x27, #:lo12:.LANCHOR147]
 	ldr	w2, [x0, x19]
 	cmn	w2, #1
-	beq	.L2741
-	adrp	x0, .LANCHOR123
-	ldrb	w20, [x0, #:lo12:.LANCHOR123]
+	beq	.L2835
+	adrp	x0, .LANCHOR121
+	ldrb	w20, [x0, #:lo12:.LANCHOR121]
 	lsl	w20, w20, 7
 	udiv	w20, w2, w20
 	and	w0, w20, 65535
 	str	w0, [x29, 156]
-	ldr	w0, [x24, #:lo12:.LANCHOR9]
-	tbz	x0, 8, .L2742
+	ldr	w0, [x24, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L2836
 	ldr	w1, [x29, 156]
 	adrp	x0, .LC189
 	mov	w3, w22
 	add	x0, x0, :lo12:.LC189
 	bl	printf
-.L2742:
+.L2836:
 	sub	w28, w26, w28
 	add	x28, x28, x22
 	lsl	x0, x28, 2
@@ -17118,49 +17478,49 @@ gc_update_l2p_map_new:
 	adrp	x0, .LC190
 	add	x0, x0, :lo12:.LC190
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR102
-	add	x0, x0, :lo12:.LANCHOR102
+	adrp	x0, .LANCHOR99
+	add	x0, x0, :lo12:.LANCHOR99
 	str	x0, [x29, 112]
-.L2743:
+.L2837:
 	ldr	x0, [x29, 144]
 	cmp	x0, x19
-	bne	.L2749
-.L2741:
+	bne	.L2843
+.L2835:
 	add	x22, x22, 1
-	b	.L2740
-.L2749:
-	ldr	x0, [x27, #:lo12:.LANCHOR146]
+	b	.L2834
+.L2843:
+	ldr	x0, [x27, #:lo12:.LANCHOR147]
 	ldr	w20, [x0, x19]
 	cmn	w20, #1
-	beq	.L2744
+	beq	.L2838
 	ldr	x0, [x29, 104]
 	ldr	w1, [x29, 156]
 	ldrb	w0, [x0]
 	lsl	w0, w0, 7
 	udiv	w0, w20, w0
 	cmp	w1, w0, uxth
-	bne	.L2744
-	adrp	x0, .LANCHOR147
-	ldr	x0, [x0, #:lo12:.LANCHOR147]
+	bne	.L2838
+	adrp	x0, .LANCHOR148
+	ldr	x0, [x0, #:lo12:.LANCHOR148]
 	ldr	w28, [x0, x19]
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 172]
 	cmn	w0, #1
-	bne	.L2745
+	bne	.L2839
 	mov	w2, 0
 	add	x1, x29, 172
 	mov	w0, w20
 	bl	pm_log2phys
-.L2745:
+.L2839:
 	ldr	w3, [x29, 172]
 	cmp	w28, w3
-	bne	.L2746
-	adrp	x0, .LANCHOR148
+	bne	.L2840
+	adrp	x0, .LANCHOR149
 	mov	w2, 1
 	add	x1, x29, 168
 	add	w25, w25, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR148]
+	ldr	x0, [x0, #:lo12:.LANCHOR149]
 	ldr	w0, [x0, x19]
 	str	w0, [x29, 168]
 	mov	w0, w20
@@ -17174,28 +17534,28 @@ gc_update_l2p_map_new:
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
 	and	w28, w0, w28
-	adrp	x0, .LANCHOR101
-	ldrb	w0, [x0, #:lo12:.LANCHOR101]
+	adrp	x0, .LANCHOR98
+	ldrb	w0, [x0, #:lo12:.LANCHOR98]
 	udiv	w0, w28, w0
-.L2772:
+.L2866:
 	bl	ftl_vpn_decrement
-	ldr	x0, [x27, #:lo12:.LANCHOR146]
+	ldr	x0, [x27, #:lo12:.LANCHOR147]
 	mov	w1, -1
 	str	w1, [x0, x19]
-.L2744:
+.L2838:
 	add	x19, x19, 4
-	b	.L2743
-.L2746:
-	ldr	w0, [x24, #:lo12:.LANCHOR9]
-	tbz	x0, 8, .L2748
+	b	.L2837
+.L2840:
+	ldr	w0, [x24, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L2842
 	ldr	x0, [x29, 120]
 	mov	w2, w28
 	mov	w1, w20
 	bl	printf
-.L2748:
+.L2842:
 	ldr	x0, [x29, 136]
 	ldrh	w0, [x0]
-	b	.L2772
+	b	.L2866
 	.size	gc_update_l2p_map_new, .-gc_update_l2p_map_new
 	.section	.text.gc_scan_src_blk_one_page,"ax",@progbits
 	.align	2
@@ -17208,70 +17568,70 @@ gc_scan_src_blk_one_page:
 	mov	w7, 65535
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR65
-	add	x1, x19, :lo12:.LANCHOR65
+	adrp	x19, .LANCHOR62
+	add	x1, x19, :lo12:.LANCHOR62
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	str	x25, [sp, 64]
 	ldrb	w0, [x1, 4]
 	add	x2, x1, x0, sxtw 1
 	ldrh	w3, [x2, 40]
-	adrp	x2, .LANCHOR76
-	ldrb	w4, [x2, #:lo12:.LANCHOR76]
+	adrp	x2, .LANCHOR73
+	ldrb	w4, [x2, #:lo12:.LANCHOR73]
 	ldrh	w2, [x1, 2]
-.L2774:
+.L2868:
 	cmp	w3, w7
-	beq	.L2776
-	cbz	w6, .L2777
-	add	x1, x19, :lo12:.LANCHOR65
+	beq	.L2870
+	cbz	w6, .L2871
+	add	x1, x19, :lo12:.LANCHOR62
 	strb	w0, [x1, 4]
-.L2777:
-	cbz	w5, .L2778
-	add	x0, x19, :lo12:.LANCHOR65
+.L2871:
+	cbz	w5, .L2872
+	add	x0, x19, :lo12:.LANCHOR62
 	strh	w2, [x0, 2]
-.L2778:
-	adrp	x0, .LANCHOR108
-	ldrh	w22, [x0, #:lo12:.LANCHOR108]
-	adrp	x0, .LANCHOR71
+.L2872:
+	adrp	x0, .LANCHOR105
+	ldrh	w22, [x0, #:lo12:.LANCHOR105]
+	adrp	x0, .LANCHOR68
 	mov	x23, x0
-	ldrb	w1, [x0, #:lo12:.LANCHOR71]
+	ldrb	w1, [x0, #:lo12:.LANCHOR68]
 	mul	w22, w22, w3
 	cmp	w1, 2
-	bne	.L2779
-	add	x0, x19, :lo12:.LANCHOR65
+	bne	.L2873
+	add	x0, x19, :lo12:.LANCHOR62
 	ldrb	w1, [x0, 6]
-	cbnz	w1, .L2779
+	cbnz	w1, .L2873
 	ldrh	w0, [x0, 2]
 	add	w22, w22, w0, lsl 1
-.L2780:
-	add	x1, x19, :lo12:.LANCHOR65
+.L2874:
+	add	x1, x19, :lo12:.LANCHOR62
 	ldrb	w0, [x1, 4]
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x1, 4]
 	cmp	w4, w0
-	bne	.L2781
+	bne	.L2875
 	ldrh	w0, [x1, 2]
 	strb	wzr, [x1, 4]
 	add	w0, w0, 1
 	strh	w0, [x1, 2]
-.L2781:
+.L2875:
 	mov	w0, 1
-	add	x19, x19, :lo12:.LANCHOR65
+	add	x19, x19, :lo12:.LANCHOR62
 	bl	buf_alloc
-	add	x23, x23, :lo12:.LANCHOR71
+	add	x23, x23, :lo12:.LANCHOR68
 	mov	x21, x0
 	mov	w20, 0
-	adrp	x24, .LANCHOR68
-.L2791:
+	adrp	x24, .LANCHOR65
+.L2885:
 	ldrb	w0, [x19, 6]
 	cmp	w0, 3
-	bne	.L2782
-	cbz	w20, .L2783
-.L2782:
+	bne	.L2876
+	cbz	w20, .L2877
+.L2876:
 	cmp	w0, w20
-	bgt	.L2784
-.L2792:
+	bgt	.L2878
+.L2886:
 	mov	x0, x21
 	bl	buf_free
 	ldp	x19, x20, [sp, 16]
@@ -17280,33 +17640,33 @@ gc_scan_src_blk_one_page:
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2776:
+.L2870:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	cmp	w0, w4
-	bne	.L2775
+	bne	.L2869
 	add	w2, w2, 1
 	mov	w5, 1
 	and	w2, w2, 65535
 	mov	w0, 0
-.L2775:
+.L2869:
 	add	x3, x1, x0, sxtw 1
 	mov	w6, 1
 	ldrh	w3, [x3, 40]
-	b	.L2774
-.L2779:
-	add	x0, x19, :lo12:.LANCHOR65
+	b	.L2868
+.L2873:
+	add	x0, x19, :lo12:.LANCHOR62
 	ldrh	w0, [x0, 2]
 	add	w22, w0, w22
-	b	.L2780
-.L2784:
+	b	.L2874
+.L2878:
 	ldrb	w1, [x23]
 	cmp	w1, 2
-	bne	.L2785
-	cbnz	w0, .L2785
+	bne	.L2879
+	cbnz	w0, .L2879
 	add	w0, w20, w22
 	orr	w0, w0, 33554432
-.L2805:
+.L2899:
 	str	w0, [x21, 40]
 	mov	w1, 1
 	mov	x0, x21
@@ -17314,40 +17674,40 @@ gc_scan_src_blk_one_page:
 	ldr	w0, [x21, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2788
+	beq	.L2882
 	ldr	x0, [x21, 24]
 	ldr	w25, [x0, 4]
 	mov	w0, w25
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 92]
 	cmn	w0, #1
-	bne	.L2789
+	bne	.L2883
 	mov	w2, 0
 	add	x1, x29, 92
 	mov	w0, w25
 	bl	pm_log2phys
-.L2789:
+.L2883:
 	ldr	w0, [x29, 92]
 	cmp	w22, w0
-	bne	.L2788
+	bne	.L2882
 	ldrh	w0, [x19, 24]
-	ldr	x2, [x24, #:lo12:.LANCHOR68]
+	ldr	x2, [x24, #:lo12:.LANCHOR65]
 	ubfiz	x1, x0, 2, 16
 	add	w0, w0, 1
 	str	w22, [x2, x1]
 	strh	w0, [x19, 24]
-.L2788:
+.L2882:
 	ldrh	w0, [x19, 26]
 	add	w0, w0, 1
 	strh	w0, [x19, 26]
-.L2783:
+.L2877:
 	add	w20, w20, 1
 	cmp	w20, 4
-	bne	.L2791
-	b	.L2792
-.L2785:
+	bne	.L2885
+	b	.L2886
+.L2879:
 	orr	w0, w22, w20, lsl 24
-	b	.L2805
+	b	.L2899
 	.size	gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page
 	.section	.text.gc_scan_src_blk,"ax",@progbits
 	.align	2
@@ -17358,118 +17718,118 @@ gc_scan_src_blk:
 	mov	w0, 65535
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR65
+	adrp	x19, .LANCHOR62
 	stp	x21, x22, [sp, 32]
-	ldrh	w1, [x19, #:lo12:.LANCHOR65]
+	ldrh	w1, [x19, #:lo12:.LANCHOR62]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w1, w0
-	bne	.L2807
-	adrp	x1, .LANCHOR202
+	bne	.L2901
+	adrp	x1, .LANCHOR206
 	adrp	x0, .LC0
 	mov	w2, 920
-	add	x1, x1, :lo12:.LANCHOR202
+	add	x1, x1, :lo12:.LANCHOR206
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2807:
-	ldrh	w1, [x19, #:lo12:.LANCHOR65]
+.L2901:
+	ldrh	w1, [x19, #:lo12:.LANCHOR62]
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L2827
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 8, .L2809
-	adrp	x2, .LANCHOR5
+	beq	.L2921
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L2903
+	adrp	x2, .LANCHOR9
 	ubfiz	x0, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR5]
+	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x0]
 	adrp	x0, .LC192
 	add	x0, x0, :lo12:.LC192
 	bl	printf
-.L2809:
-	ldrh	w0, [x19, #:lo12:.LANCHOR65]
-	add	x14, x19, :lo12:.LANCHOR65
+.L2903:
+	ldrh	w0, [x19, #:lo12:.LANCHOR62]
+	add	x14, x19, :lo12:.LANCHOR62
 	add	x1, x14, 40
 	bl	ftl_get_blk_list_in_sblk
 	and	w1, w0, 255
 	strb	w1, [x14, 5]
-	cbnz	w1, .L2810
+	cbnz	w1, .L2904
 	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR65]
-.L2827:
+	strh	w0, [x19, #:lo12:.LANCHOR62]
+.L2921:
 	mov	w0, 0
-	b	.L2806
-.L2810:
-	adrp	x4, .LANCHOR3
-	ldrh	w3, [x19, #:lo12:.LANCHOR65]
+	b	.L2900
+.L2904:
+	adrp	x4, .LANCHOR7
+	ldrh	w3, [x19, #:lo12:.LANCHOR62]
 	mov	x22, x4
-	ldr	x1, [x4, #:lo12:.LANCHOR3]
+	ldr	x1, [x4, #:lo12:.LANCHOR7]
 	mov	x2, x3
 	add	x1, x1, x3, lsl 2
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 32
-	beq	.L2811
+	beq	.L2905
 	cmp	w1, 224
-	beq	.L2811
-	cbz	w1, .L2812
-	adrp	x1, .LANCHOR6
-	ldr	x1, [x1, #:lo12:.LANCHOR6]
+	beq	.L2905
+	cbz	w1, .L2906
+	adrp	x1, .LANCHOR10
+	ldr	x1, [x1, #:lo12:.LANCHOR10]
 	ldrh	w3, [x1, 16]
 	cmp	w3, w2
-	beq	.L2811
+	beq	.L2905
 	ldrh	w3, [x1, 48]
 	cmp	w3, w2
-	beq	.L2811
+	beq	.L2905
 	ldrh	w1, [x1, 80]
 	cmp	w1, w2
-	bne	.L2841
-.L2811:
-	add	x0, x19, :lo12:.LANCHOR65
+	bne	.L2935
+.L2905:
+	add	x0, x19, :lo12:.LANCHOR62
 	mov	w1, -1
-	strh	w1, [x19, #:lo12:.LANCHOR65]
+	strh	w1, [x19, #:lo12:.LANCHOR62]
 	strh	wzr, [x0, 24]
-	b	.L2827
-.L2812:
-	adrp	x0, .LANCHOR5
+	b	.L2921
+.L2906:
+	adrp	x0, .LANCHOR9
 	mov	x20, x0
-	ldr	x1, [x0, #:lo12:.LANCHOR5]
+	ldr	x1, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x1, x3, lsl 1]
-	cbz	w1, .L2814
-	adrp	x1, .LANCHOR202
+	cbz	w1, .L2908
+	adrp	x1, .LANCHOR206
 	adrp	x0, .LC0
 	mov	w2, 940
-	add	x1, x1, :lo12:.LANCHOR202
+	add	x1, x1, :lo12:.LANCHOR206
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2814:
-	ldrh	w1, [x19, #:lo12:.LANCHOR65]
-	ldr	x0, [x20, #:lo12:.LANCHOR5]
+.L2908:
+	ldrh	w1, [x19, #:lo12:.LANCHOR62]
+	ldr	x0, [x20, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x1, lsl 1]
-	b	.L2811
-.L2841:
+	b	.L2905
+.L2935:
 	and	w0, w0, 255
 	sub	w0, w0, #1
 	add	x0, x14, x0, sxtw 1
 	ldrh	w21, [x0, 40]
 	mov	w0, 65535
 	cmp	w21, w0
-	bne	.L2815
-	adrp	x1, .LANCHOR202
+	bne	.L2909
+	adrp	x1, .LANCHOR206
 	adrp	x0, .LC0
 	mov	w2, 948
-	add	x1, x1, :lo12:.LANCHOR202
+	add	x1, x1, :lo12:.LANCHOR206
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2815:
-	adrp	x1, .LANCHOR108
-	ldr	x3, [x22, #:lo12:.LANCHOR3]
-	adrp	x2, .LANCHOR83
-	adrp	x23, .LANCHOR75
-	ldrh	w20, [x1, #:lo12:.LANCHOR108]
+.L2909:
+	adrp	x1, .LANCHOR105
+	ldr	x3, [x22, #:lo12:.LANCHOR7]
+	adrp	x2, .LANCHOR80
+	adrp	x23, .LANCHOR72
+	ldrh	w20, [x1, #:lo12:.LANCHOR105]
 	mov	x24, x2
-	ldrh	w1, [x19, #:lo12:.LANCHOR65]
-	ldrh	w0, [x2, #:lo12:.LANCHOR83]
+	ldrh	w1, [x19, #:lo12:.LANCHOR62]
+	ldrh	w0, [x2, #:lo12:.LANCHOR80]
 	add	x1, x3, x1, lsl 2
 	sub	w0, w0, #1
 	and	w0, w0, 65535
@@ -17477,15 +17837,15 @@ gc_scan_src_blk:
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 160
-	bne	.L2828
-	adrp	x1, .LANCHOR71
-	ldrb	w21, [x1, #:lo12:.LANCHOR71]
+	bne	.L2922
+	adrp	x1, .LANCHOR68
+	ldrb	w21, [x1, #:lo12:.LANCHOR68]
 	cmp	w21, 2
 	orr	w20, w20, w21, lsl 24
-	beq	.L2817
+	beq	.L2911
 	and	w21, w21, 65535
-.L2816:
-	add	x22, x19, :lo12:.LANCHOR65
+.L2910:
+	add	x22, x19, :lo12:.LANCHOR62
 	orr	w20, w0, w20
 	mov	w0, 1
 	strb	w21, [x22, 6]
@@ -17496,106 +17856,106 @@ gc_scan_src_blk:
 	str	w20, [x0, 40]
 	mov	x25, x0
 	mov	w1, 1
-	adrp	x20, .LANCHOR68
+	adrp	x20, .LANCHOR65
 	bl	sblk_read_page
-	ldrh	w2, [x23, #:lo12:.LANCHOR75]
-	adrp	x23, .LANCHOR76
+	ldrh	w2, [x23, #:lo12:.LANCHOR72]
+	adrp	x23, .LANCHOR73
 	mov	w1, 255
-	ldrb	w0, [x23, #:lo12:.LANCHOR76]
+	ldrb	w0, [x23, #:lo12:.LANCHOR73]
 	mul	w2, w2, w0
-	ldr	x0, [x20, #:lo12:.LANCHOR68]
+	ldr	x0, [x20, #:lo12:.LANCHOR65]
 	lsl	w2, w2, 2
 	bl	ftl_memset
 	strh	wzr, [x22, 24]
 	ldr	w0, [x25, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L2818
-.L2843:
+	bne	.L2912
+.L2937:
 	mov	x0, x25
 	bl	buf_free
 	mov	w0, -1
-.L2806:
+.L2900:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2817:
-	ldrh	w0, [x23, #:lo12:.LANCHOR75]
+.L2911:
+	ldrh	w0, [x23, #:lo12:.LANCHOR72]
 	sub	w0, w0, #1
 	and	w0, w0, 65535
-	b	.L2816
-.L2828:
+	b	.L2910
+.L2922:
 	mov	w21, 1
-	b	.L2816
-.L2818:
+	b	.L2910
+.L2912:
 	ldr	x0, [x25, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L2819
+	beq	.L2913
 	mov	w2, 980
-	adrp	x1, .LANCHOR202
+	adrp	x1, .LANCHOR206
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR202
+	add	x1, x1, :lo12:.LANCHOR206
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L2843
-.L2819:
-	ldrb	w0, [x23, #:lo12:.LANCHOR76]
-	adrp	x22, .LANCHOR102
-	ldrh	w1, [x24, #:lo12:.LANCHOR83]
-	adrp	x23, .LANCHOR101
+	b	.L2937
+.L2913:
+	ldrb	w0, [x23, #:lo12:.LANCHOR73]
+	adrp	x22, .LANCHOR99
+	ldrh	w1, [x24, #:lo12:.LANCHOR80]
+	adrp	x23, .LANCHOR98
 	ldr	x24, [x25, 8]
-	add	x22, x22, :lo12:.LANCHOR102
-	add	x23, x23, :lo12:.LANCHOR101
+	add	x22, x22, :lo12:.LANCHOR99
+	add	x23, x23, :lo12:.LANCHOR98
 	mov	x26, 0
 	mul	w0, w0, w1
 	mul	w21, w21, w0
 	and	w21, w21, 65535
-.L2820:
+.L2914:
 	cmp	w21, w26
-	bgt	.L2825
+	bgt	.L2919
 	mov	x0, x25
 	bl	buf_free
-	adrp	x0, .LANCHOR5
-	ldrh	w1, [x19, #:lo12:.LANCHOR65]
-	add	x3, x19, :lo12:.LANCHOR65
+	adrp	x0, .LANCHOR9
+	ldrh	w1, [x19, #:lo12:.LANCHOR62]
+	add	x3, x19, :lo12:.LANCHOR62
 	mov	x20, x0
-	ldr	x4, [x0, #:lo12:.LANCHOR5]
+	ldr	x4, [x0, #:lo12:.LANCHOR9]
 	ubfiz	x2, x1, 1, 16
 	ldrh	w3, [x3, 24]
 	ldrh	w2, [x4, x2]
 	cmp	w2, w3
-	beq	.L2826
+	beq	.L2920
 	adrp	x0, .LC193
 	add	x0, x0, :lo12:.LC193
 	bl	printf
-.L2826:
-	add	x0, x19, :lo12:.LANCHOR65
-	ldrh	w2, [x19, #:lo12:.LANCHOR65]
-	ldr	x1, [x20, #:lo12:.LANCHOR5]
+.L2920:
+	add	x0, x19, :lo12:.LANCHOR62
+	ldrh	w2, [x19, #:lo12:.LANCHOR62]
+	ldr	x1, [x20, #:lo12:.LANCHOR9]
 	ldrh	w3, [x0, 24]
 	strh	w3, [x1, x2, lsl 1]
 	strh	wzr, [x0, 28]
 	ldrh	w0, [x0, 24]
-	b	.L2806
-.L2825:
+	b	.L2900
+.L2919:
 	ldr	w0, [x24, x26, lsl 2]
 	cmn	w0, #1
-	beq	.L2822
+	beq	.L2916
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 92]
 	cmn	w0, #1
-	bne	.L2823
+	bne	.L2917
 	ldr	w0, [x24, x26, lsl 2]
 	mov	w2, 0
 	add	x1, x29, 92
 	bl	pm_log2phys
-.L2823:
+.L2917:
 	ldrh	w1, [x22]
 	mov	w0, 21
 	ldr	w3, [x29, 92]
@@ -17606,20 +17966,20 @@ gc_scan_src_blk:
 	lsr	w1, w3, w1
 	and	w0, w0, w1
 	ldrb	w1, [x23]
-	ldrh	w2, [x19, #:lo12:.LANCHOR65]
+	ldrh	w2, [x19, #:lo12:.LANCHOR62]
 	udiv	w0, w0, w1
-	add	x1, x19, :lo12:.LANCHOR65
+	add	x1, x19, :lo12:.LANCHOR62
 	cmp	w0, w2
-	bne	.L2822
+	bne	.L2916
 	ldrh	w0, [x1, 24]
-	ldr	x4, [x20, #:lo12:.LANCHOR68]
+	ldr	x4, [x20, #:lo12:.LANCHOR65]
 	ubfiz	x2, x0, 2, 16
 	add	w0, w0, 1
 	str	w3, [x4, x2]
 	strh	w0, [x1, 24]
-.L2822:
+.L2916:
 	add	x26, x26, 1
-	b	.L2820
+	b	.L2914
 	.size	gc_scan_src_blk, .-gc_scan_src_blk
 	.section	.text.gc_scan_static_data,"ax",@progbits
 	.align	2
@@ -17629,27 +17989,27 @@ gc_scan_static_data:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR6
+	adrp	x19, .LANCHOR10
 	stp	x21, x22, [sp, 32]
-	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldr	w1, [x0, 544]
 	str	x23, [sp, 48]
 	cmn	w1, #1
-	beq	.L2845
-	adrp	x21, .LANCHOR203
+	beq	.L2939
+	adrp	x21, .LANCHOR207
 	adrp	x22, .LC0
-	add	x21, x21, :lo12:.LANCHOR203
+	add	x21, x21, :lo12:.LANCHOR207
 	add	x22, x22, :lo12:.LC0
 	mov	w20, 11
-.L2853:
-	ldr	x0, [x19, #:lo12:.LANCHOR6]
+.L2947:
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w2, 0
 	add	x1, x29, 76
 	ldr	w0, [x0, 544]
 	bl	pm_log2phys
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L2846
+	beq	.L2940
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 76]
@@ -17659,45 +18019,45 @@ gc_scan_static_data:
 	bl	sblk_read_page
 	ldr	w0, [x23, 52]
 	cmp	w0, 256
-	bne	.L2847
-	adrp	x0, .LANCHOR102
+	bne	.L2941
+	adrp	x0, .LANCHOR99
 	ldr	w2, [x29, 76]
 	mov	w1, 1
-	ldrh	w3, [x0, #:lo12:.LANCHOR102]
+	ldrh	w3, [x0, #:lo12:.LANCHOR99]
 	mov	w0, 21
 	sub	w0, w0, w3
 	lsr	w2, w2, w3
 	lsl	w0, w1, w0
 	sub	w0, w0, #1
 	and	w0, w0, w2
-	adrp	x2, .LANCHOR101
-	ldrb	w3, [x2, #:lo12:.LANCHOR101]
+	adrp	x2, .LANCHOR98
+	ldrb	w3, [x2, #:lo12:.LANCHOR98]
 	mov	w2, 0
 	udiv	w0, w0, w3
 	bl	gc_add_sblk
-.L2847:
-	ldr	x0, [x19, #:lo12:.LANCHOR6]
+.L2941:
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldr	x1, [x23, 24]
 	ldr	w0, [x0, 544]
 	ldr	w1, [x1, 4]
 	cmp	w1, w0
-	beq	.L2848
+	beq	.L2942
 	mov	w2, 1419
 	mov	x1, x21
 	mov	x0, x22
 	bl	printf
-.L2848:
+.L2942:
 	mov	x0, x23
 	bl	buf_free
-.L2846:
-	ldr	x0, [x19, #:lo12:.LANCHOR6]
-	adrp	x2, .LANCHOR56
-	ldr	w2, [x2, #:lo12:.LANCHOR56]
+.L2940:
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	adrp	x2, .LANCHOR118
+	ldr	w2, [x2, #:lo12:.LANCHOR118]
 	ldr	w1, [x0, 544]
 	add	w1, w1, 1
 	str	w1, [x0, 544]
 	cmp	w1, w2
-	bcc	.L2849
+	bcc	.L2943
 	mov	w1, -1
 	str	w1, [x0, 544]
 	ldr	w1, [x0, 548]
@@ -17708,42 +18068,42 @@ gc_scan_static_data:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2844:
+.L2938:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2849:
+.L2943:
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	bne	.L2844
+	bne	.L2938
 	sub	w20, w20, #1
 	ands	w20, w20, 65535
-	bne	.L2853
-	b	.L2844
-.L2845:
+	bne	.L2947
+	b	.L2938
+.L2939:
 	ldr	w1, [x0, 536]
-	adrp	x3, .LANCHOR100
+	adrp	x3, .LANCHOR97
 	ldr	w2, [x0, 12]
 	add	w1, w1, 12959744
 	add	w1, w1, 256
 	cmp	w2, w1
-	bhi	.L2855
-	ldr	x4, [x3, #:lo12:.LANCHOR100]
+	bhi	.L2949
+	ldr	x4, [x3, #:lo12:.LANCHOR97]
 	ldr	w1, [x0, 540]
 	add	w1, w1, 98304
 	ldr	w4, [x4, 44]
 	add	w1, w1, 1696
 	cmp	w4, w1
-	bls	.L2844
-.L2855:
-	ldr	x1, [x3, #:lo12:.LANCHOR100]
+	bls	.L2938
+.L2949:
+	ldr	x1, [x3, #:lo12:.LANCHOR97]
 	ldr	w1, [x1, 44]
 	str	w1, [x0, 540]
 	str	w2, [x0, 536]
 	str	wzr, [x0, 544]
-	b	.L2844
+	b	.L2938
 	.size	gc_scan_static_data, .-gc_scan_static_data
 	.section	.text.ftl_sblk_dump,"ax",@progbits
 	.align	2
@@ -17755,12 +18115,12 @@ ftl_sblk_dump:
 	stp	x29, x30, [sp, 48]
 	add	x29, sp, 48
 	stp	x23, x24, [sp, 96]
-	adrp	x24, .LANCHOR3
+	adrp	x24, .LANCHOR7
 	lsl	x23, x0, 2
 	stp	x0, x1, [x29, 144]
 	stp	x21, x22, [sp, 80]
 	mov	x21, x0
-	ldr	x0, [x24, #:lo12:.LANCHOR3]
+	ldr	x0, [x24, #:lo12:.LANCHOR7]
 	stp	x19, x20, [sp, 64]
 	add	x1, x0, x23
 	stp	x25, x26, [sp, 112]
@@ -17778,29 +18138,29 @@ ftl_sblk_dump:
 	bl	printf
 	mov	w0, 65535
 	cmp	w21, w0
-	beq	.L2882
-	adrp	x0, .LANCHOR2
-	ldrh	w0, [x0, #:lo12:.LANCHOR2]
+	beq	.L2976
+	adrp	x0, .LANCHOR6
+	ldrh	w0, [x0, #:lo12:.LANCHOR6]
 	cmp	w0, w21
-	bls	.L2882
-	ldr	x0, [x24, #:lo12:.LANCHOR3]
+	bls	.L2976
+	ldr	x0, [x24, #:lo12:.LANCHOR7]
 	add	x0, x0, x23
 	ldrb	w0, [x0, 2]
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L2883
-	adrp	x0, .LANCHOR71
-	ldrb	w25, [x0, #:lo12:.LANCHOR71]
-.L2863:
+	bne	.L2977
+	adrp	x0, .LANCHOR68
+	ldrb	w25, [x0, #:lo12:.LANCHOR68]
+.L2957:
 	add	x28, x29, 224
-	adrp	x19, .LANCHOR83
+	adrp	x19, .LANCHOR80
 	mov	w0, w21
 	mov	w27, 0
 	mov	w20, 0
 	strh	w21, [x28, -32]!
 	add	x1, x28, 16
 	bl	ftl_get_blk_list_in_sblk
-	ldrh	w2, [x19, #:lo12:.LANCHOR83]
+	ldrh	w2, [x19, #:lo12:.LANCHOR80]
 	and	w1, w0, 255
 	strb	w1, [x29, 201]
 	and	w4, w0, 255
@@ -17812,7 +18172,7 @@ ftl_sblk_dump:
 	strh	wzr, [x29, 202]
 	strh	w1, [x29, 198]
 	add	x0, x0, :lo12:.LC195
-	ldr	x1, [x24, #:lo12:.LANCHOR3]
+	ldr	x1, [x24, #:lo12:.LANCHOR7]
 	add	x1, x1, x23
 	ldrb	w2, [x1, 2]
 	mov	w1, w21
@@ -17823,39 +18183,39 @@ ftl_sblk_dump:
 	str	x19, [x29, 136]
 	mov	x26, x0
 	stp	wzr, wzr, [x29, 164]
-	adrp	x0, .LANCHOR108
-	add	x0, x0, :lo12:.LANCHOR108
+	adrp	x0, .LANCHOR105
+	add	x0, x0, :lo12:.LANCHOR105
 	str	x0, [x29, 112]
-.L2864:
+.L2958:
 	ldr	x0, [x29, 136]
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w0, w20
-	bls	.L2879
+	bls	.L2973
 	lsl	w0, w20, 1
 	str	wzr, [x29, 172]
 	sub	w0, w0, #1
 	str	w0, [x29, 160]
-	adrp	x0, .LC147
-	add	x0, x0, :lo12:.LC147
+	adrp	x0, .LC149
+	add	x0, x0, :lo12:.LC149
 	str	x0, [x29, 120]
-	b	.L2880
-.L2883:
+	b	.L2974
+.L2977:
 	mov	w25, 1
-	b	.L2863
-.L2876:
+	b	.L2957
+.L2970:
 	ldr	x0, [x29, 128]
 	ldrh	w10, [x28, x0]
 	mov	w0, 65535
 	cmp	w10, w0
-	beq	.L2865
+	beq	.L2959
 	ldr	x0, [x29, 112]
 	cmp	w25, 3
 	ldrh	w19, [x0]
 	mul	w19, w19, w10
-	bne	.L2866
+	bne	.L2960
 	add	w19, w20, w19
 	orr	w19, w19, w22, lsl 24
-.L2867:
+.L2961:
 	str	w19, [x26, 40]
 	mov	w1, 1
 	str	w10, [x29, 104]
@@ -17891,28 +18251,28 @@ ftl_sblk_dump:
 	ccmn	w11, #1, 4, ne
 	csinc	w0, w0, wzr, ne
 	str	w0, [x29, 164]
-	ldr	x0, [x24, #:lo12:.LANCHOR3]
+	ldr	x0, [x24, #:lo12:.LANCHOR7]
 	add	x0, x0, x23
 	ldrb	w0, [x0, 2]
 	and	w0, w0, 224
 	cmp	w0, 224
 	ccmp	w0, w1, 4, ne
-	beq	.L2865
+	beq	.L2959
 	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L2870
+	bne	.L2964
 	ldr	x0, [x26, 24]
 	mov	w2, 0
 	add	x1, x29, 188
 	ldr	w0, [x0, 4]
 	bl	pm_log2phys
-.L2870:
+.L2964:
 	ldr	w0, [x29, 188]
 	cmp	w19, w0
-	bne	.L2871
+	bne	.L2965
 	ldr	w0, [x29, 168]
 	mov	w1, w19
 	add	w0, w0, 1
@@ -17923,91 +18283,91 @@ ftl_sblk_dump:
 	adrp	x0, .LC196
 	add	x0, x0, :lo12:.LC196
 	bl	printf
-.L2871:
+.L2965:
 	ldr	x0, [x29, 152]
-	cbz	x0, .L2873
+	cbz	x0, .L2967
 	ubfiz	x19, x27, 2, 32
 	ldr	w2, [x0, x19]
 	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	cmp	w0, w2
-	beq	.L2874
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L2874
+	beq	.L2968
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2968
 	adrp	x0, .LC197
 	mov	w1, w27
 	add	x0, x0, :lo12:.LC197
 	bl	printf
-.L2874:
+.L2968:
 	ldr	x1, [x26, 24]
 	ldr	x0, [x29, 152]
 	ldr	w1, [x1, 4]
 	ldr	w0, [x0, x19]
 	cmp	w1, w0
-	beq	.L2873
+	beq	.L2967
 	cmn	w0, #1
-	beq	.L2873
-	adrp	x1, .LANCHOR204
+	beq	.L2967
+	adrp	x1, .LANCHOR208
 	adrp	x0, .LC0
 	mov	w2, 1300
-	add	x1, x1, :lo12:.LANCHOR204
+	add	x1, x1, :lo12:.LANCHOR208
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2873:
+.L2967:
 	add	w27, w27, 1
-.L2865:
+.L2959:
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L2878:
+.L2972:
 	cmp	w25, w22
-	bcs	.L2876
+	bcs	.L2970
 	ldr	w0, [x29, 172]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	str	w0, [x29, 172]
-.L2880:
+.L2974:
 	ldrb	w0, [x29, 201]
 	ldr	w1, [x29, 172]
 	cmp	w0, w1
-	bls	.L2877
+	bls	.L2971
 	ldrsw	x0, [x29, 172]
 	mov	w22, 1
 	add	x0, x0, 8
 	lsl	x0, x0, 1
 	str	x0, [x29, 128]
-	b	.L2878
-.L2866:
+	b	.L2972
+.L2960:
 	cmp	w25, 2
-	bne	.L2868
+	bne	.L2962
 	ldr	w0, [x29, 160]
 	add	w19, w19, w0
-	adrp	x0, .LANCHOR71
+	adrp	x0, .LANCHOR68
 	add	w19, w19, w22
-	ldrb	w0, [x0, #:lo12:.LANCHOR71]
+	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	orr	w19, w19, w0, lsl 24
-	b	.L2867
-.L2868:
+	b	.L2961
+.L2962:
 	add	w19, w20, w19
-	b	.L2867
-.L2877:
+	b	.L2961
+.L2971:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2864
-.L2879:
+	b	.L2958
+.L2973:
 	mov	x0, x26
 	bl	buf_free
-	adrp	x0, .LANCHOR5
+	adrp	x0, .LANCHOR9
 	ldr	x1, [x29, 144]
 	ldr	w3, [x29, 168]
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w2, [x0, x1, lsl 1]
 	mov	w1, w21
 	adrp	x0, .LC198
 	add	x0, x0, :lo12:.LC198
 	bl	printf
 	ldr	w0, [x29, 164]
-.L2861:
+.L2955:
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
 	ldp	x23, x24, [sp, 96]
@@ -18016,297 +18376,361 @@ ftl_sblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 272
 	ret
-.L2882:
+.L2976:
 	mov	w0, 0
-	b	.L2861
+	b	.L2955
 	.size	ftl_sblk_dump, .-ftl_sblk_dump
 	.section	.text.zftl_read,"ax",@progbits
 	.align	2
 	.global	zftl_read
 	.type	zftl_read, %function
 zftl_read:
-	stp	x29, x30, [sp, -160]!
+	stp	x29, x30, [sp, -192]!
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	mov	w21, w0
-	adrp	x0, .LANCHOR9
-	stp	x23, x24, [sp, 48]
 	stp	x19, x20, [sp, 16]
-	mov	w24, w2
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	mov	w19, w1
+	mov	w20, w0
+	adrp	x0, .LANCHOR14
+	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
-	mov	x23, x3
+	mov	w19, w1
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	mov	w26, w2
+	stp	x23, x24, [sp, 48]
+	mov	x22, x3
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2894
+	tbz	x0, 12, .L2988
 	mov	w3, w2
 	adrp	x0, .LC199
 	mov	w2, w1
 	add	x0, x0, :lo12:.LC199
-	mov	w1, w21
+	mov	w1, w20
 	bl	printf
-.L2894:
-	cbnz	w21, .L2895
-	adrp	x0, .LANCHOR61
-	mov	w21, 24576
-	ldr	w0, [x0, #:lo12:.LANCHOR61]
-.L2896:
-	add	w1, w19, w24
+.L2988:
+	cbnz	w20, .L2989
+	adrp	x0, .LANCHOR58
+	mov	w20, 24576
+	ldr	w0, [x0, #:lo12:.LANCHOR58]
+.L2990:
+	add	w1, w19, w26
 	cmp	w0, w1
-	bcc	.L2920
-	adrp	x1, .LANCHOR100
-	adrp	x25, .LANCHOR123
-	add	w21, w21, w19
+	bcc	.L3018
+	adrp	x1, .LANCHOR97
+	add	w20, w20, w19
+	add	w3, w26, w20
+	stp	w3, wzr, [x29, 160]
+	ldr	x2, [x1, #:lo12:.LANCHOR97]
+	sub	w3, w3, #1
 	str	x1, [x29, 120]
-	ldr	x2, [x1, #:lo12:.LANCHOR100]
 	ldr	w0, [x2, 24]
-	add	w0, w0, w24
+	add	w0, w0, w26
 	str	w0, [x2, 24]
-	ldrb	w0, [x25, #:lo12:.LANCHOR123]
-	add	w2, w24, w21
-	stp	w2, wzr, [x29, 136]
-	sub	w2, w2, #1
-	udiv	w27, w21, w0
-	udiv	w0, w2, w0
-	mov	w20, w27
-	sub	w26, w0, w27
-	str	w0, [x29, 132]
-	add	w26, w26, 1
-	adrp	x0, .LANCHOR205
-	add	x0, x0, :lo12:.LANCHOR205
-	str	x0, [x29, 112]
-	adrp	x0, .LANCHOR48
-	add	x0, x0, :lo12:.LANCHOR48
-	str	x0, [x29, 104]
-.L2898:
-	cbnz	w26, .L2918
-	ldr	w0, [x29, 140]
-.L2893:
+	adrp	x0, .LANCHOR121
+	str	x0, [x29, 168]
+	ldrb	w2, [x0, #:lo12:.LANCHOR121]
+	adrp	x0, .LANCHOR125
+	add	x28, x0, :lo12:.LANCHOR125
+	udiv	w27, w20, w2
+	udiv	w2, w3, w2
+	mov	w21, w27
+	sub	w25, w2, w27
+	str	w2, [x29, 156]
+	add	w25, w25, 1
+.L2992:
+	cbnz	w25, .L3016
+	ldr	w0, [x29, 164]
+.L2987:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 160
+	ldp	x29, x30, [sp], 192
 	ret
-.L2895:
-	cmp	w21, 3
-	bhi	.L2920
-	lsl	w21, w21, 13
+.L2989:
+	cmp	w20, 3
+	bhi	.L3018
+	lsl	w20, w20, 13
 	mov	w0, 8192
-	b	.L2896
-.L2918:
-	ldrb	w1, [x25, #:lo12:.LANCHOR123]
-	cmp	w20, w27
-	ldr	w0, [x29, 132]
+	b	.L2990
+.L3016:
+	ldr	x0, [x29, 168]
+	cmp	w21, w27
+	ldrb	w1, [x0, #:lo12:.LANCHOR121]
+	ldr	w0, [x29, 156]
 	and	w19, w1, 65535
-	ccmp	w20, w0, 4, ne
-	bne	.L2921
-	cmp	w20, w27
-	bne	.L2900
-	udiv	w22, w21, w1
-	and	w0, w24, 65535
-	msub	w1, w22, w1, w21
-	and	w22, w1, 65535
-	sub	w19, w19, w22
+	ccmp	w21, w0, 4, ne
+	bne	.L3019
+	cmp	w21, w27
+	bne	.L2994
+	udiv	w24, w20, w1
+	and	w0, w26, 65535
+	msub	w1, w24, w1, w20
+	and	w24, w1, 65535
+	sub	w19, w19, w24
 	and	w19, w19, 65535
-	cmp	w24, w19
+	cmp	w26, w19
 	csel	w19, w0, w19, cc
-.L2899:
-	adrp	x0, .LANCHOR48
-	add	x1, x0, :lo12:.LANCHOR48
+.L2993:
+	adrp	x23, .LANCHOR49
+	add	x1, x23, :lo12:.LANCHOR49
 	add	x1, x1, 2
 	mov	w0, 0
-.L2903:
+.L2997:
 	ldr	w2, [x1, 34]
-	cmp	w20, w2
-	bne	.L2901
+	cmp	w21, w2
+	bne	.L2995
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L2901
-	ldr	x1, [x29, 104]
+	tbz	x2, 3, .L2995
+	add	x1, x23, :lo12:.LANCHOR49
 	ubfiz	x0, x0, 6, 32
+	add	x0, x1, x0
 	lsl	w2, w19, 9
 	ubfiz	x19, x19, 9, 16
-	add	x0, x1, x0
-	ubfiz	x22, x22, 9, 16
+	ubfiz	x24, x24, 9, 16
 	ldr	x1, [x0, 8]
-	mov	x0, x23
-	add	x23, x23, x19
-	add	x1, x1, x22
+	mov	x0, x22
+	add	x22, x22, x19
+	add	x1, x1, x24
 	bl	ftl_memcpy
-.L2902:
-	add	w20, w20, 1
-	sub	w26, w26, #1
-	b	.L2898
-.L2900:
-	ldr	w0, [x29, 136]
-	msub	w19, w1, w20, w0
+.L2996:
+	add	w21, w21, 1
+	sub	w25, w25, #1
+.L3003:
+	adrp	x0, .LANCHOR51
+	ldrb	w0, [x0, #:lo12:.LANCHOR51]
+	cmp	w0, 2
+	bls	.L3004
+	cbnz	w25, .L2992
+.L3004:
+	adrp	x0, .LANCHOR125
+	ldrb	w1, [x0, #:lo12:.LANCHOR125]
+	cbz	w1, .L2992
+	adrp	x24, .LANCHOR124
+	add	x0, x23, :lo12:.LANCHOR49
+	ldrb	w2, [x24, #:lo12:.LANCHOR124]
+	add	x0, x0, x2, lsl 6
+	bl	sblk_read_page
+	adrp	x0, .LANCHOR209
+	add	x0, x0, :lo12:.LANCHOR209
+	str	x0, [x29, 136]
+	adrp	x0, .LC0
+	add	x0, x0, :lo12:.LC0
+	str	x0, [x29, 128]
+.L3006:
+	ldrb	w0, [x28]
+	cbnz	w0, .L3015
+	mov	w0, -1
+	strb	wzr, [x28]
+	strb	w0, [x24, #:lo12:.LANCHOR124]
+	b	.L2992
+.L2994:
+	ldr	w0, [x29, 160]
+	msub	w19, w1, w21, w0
 	and	w19, w19, 255
-.L2921:
-	mov	w22, 0
-	b	.L2899
-.L2901:
+.L3019:
+	mov	w24, 0
+	b	.L2993
+.L2995:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 32
-	bne	.L2903
-	mov	w0, w20
+	bne	.L2997
+	mov	w0, w21
 	bl	lpa_hash_get_ppa
-	str	w0, [x29, 156]
+	str	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L2904
+	bne	.L2998
 	mov	w2, 0
-	add	x1, x29, 156
-	mov	w0, w20
+	add	x1, x29, 188
+	mov	w0, w21
 	bl	pm_log2phys
-.L2904:
-	ldr	w0, [x29, 156]
+.L2998:
+	ldr	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L2905
-	add	x22, x25, :lo12:.LANCHOR123
+	bne	.L2999
+	ldr	x0, [x29, 168]
 	mov	w19, 0
-.L2906:
-	ldrb	w0, [x22]
+	add	x24, x0, :lo12:.LANCHOR121
+.L3000:
+	ldrb	w0, [x24]
 	cmp	w19, w0
-	bcs	.L2902
-	madd	w0, w20, w0, w19
-	cmp	w21, w0
-	bhi	.L2907
-	ldr	w1, [x29, 136]
+	bcs	.L2996
+	madd	w0, w21, w0, w19
+	cmp	w20, w0
+	bhi	.L3001
+	ldr	w1, [x29, 160]
 	cmp	w1, w0
-	bls	.L2907
-	mov	x0, x23
-	add	x23, x23, 512
+	bls	.L3001
+	mov	x0, x22
+	add	x22, x22, 512
 	mov	w2, 512
 	mov	w1, 0
 	bl	ftl_memset
-.L2907:
+.L3001:
 	add	w19, w19, 1
-	b	.L2906
-.L2905:
+	b	.L3000
+.L2999:
 	mov	w0, 0
 	bl	buf_alloc
-	mov	x28, x0
-	cbnz	x0, .L2909
-	bl	ftl_read_ahead
-	b	.L2898
-.L2909:
-	ldr	x0, [x29, 120]
-	ldr	x1, [x0, #:lo12:.LANCHOR100]
-	ldr	w0, [x1, 40]
-	add	w0, w0, 1
-	str	w0, [x1, 40]
-	ldr	w0, [x29, 156]
-	stp	w0, w0, [x28, 40]
-	ldrb	w0, [x25, #:lo12:.LANCHOR123]
-	cmp	w0, w19
-	bne	.L2911
-	str	x23, [x28, 16]
-.L2911:
-	mov	w1, 1
-	mov	x0, x28
-	bl	sblk_read_page
-	ldr	w10, [x28, 52]
-	cmn	w10, #1
-	bne	.L2912
-	adrp	x0, .LANCHOR6
-	str	w10, [x29, 140]
-	ldr	x1, [x0, #:lo12:.LANCHOR6]
+	cbz	x0, .L3003
+	ldr	x2, [x29, 120]
+	ldr	x3, [x2, #:lo12:.LANCHOR97]
+	ldr	w2, [x3, 40]
+	add	w2, w2, 1
+	str	w2, [x3, 40]
+	ldr	w2, [x29, 188]
+	strb	w19, [x0, 56]
+	ubfiz	x19, x19, 9, 16
+	str	x22, [x0, 16]
+	add	x22, x22, x19
+	strb	w24, [x0, 57]
+	stp	w21, w2, [x0, 36]
+	str	w2, [x0, 44]
+	bl	zftl_add_read_buf
+	b	.L2996
+.L3015:
+	ldrb	w0, [x24, #:lo12:.LANCHOR124]
+	cmp	w0, 255
+	bne	.L3007
+	ldp	x0, x1, [x29, 128]
+	mov	w2, 1064
+	bl	printf
+.L3007:
+	ldrb	w19, [x24, #:lo12:.LANCHOR124]
+	add	x0, x23, :lo12:.LANCHOR49
+	ubfiz	x1, x19, 6, 8
+	lsl	x2, x19, 6
+	add	x1, x0, x1
+	str	x1, [x29, 144]
+	add	x1, x0, x2
+	ldrb	w0, [x0, x2]
+	strb	w0, [x24, #:lo12:.LANCHOR124]
+	ldr	w8, [x1, 52]
+	cmn	w8, #1
+	bne	.L3008
+	adrp	x0, .LANCHOR10
+	str	w8, [x29, 164]
+	ldr	x1, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x1, 552]
 	add	w0, w0, 1
 	str	w0, [x1, 552]
-.L2913:
-	ldr	x0, [x28, 24]
-	ldr	w5, [x0, 4]
-	cmp	w20, w5
-	beq	.L2914
-	ldr	w4, [x0]
-	mov	w2, w20
+.L3009:
+	add	x10, x23, :lo12:.LANCHOR49
+	add	x10, x10, x19, lsl 6
+	ldr	x0, [x10, 24]
+	ldr	w2, [x10, 36]
+	ldr	w1, [x0, 4]
+	cmp	w1, w2
+	beq	.L3010
+	adrp	x1, .LANCHOR10
+	str	w8, [x29, 152]
+	str	x10, [x29, 112]
+	ldr	x3, [x1, #:lo12:.LANCHOR10]
+	ldr	w1, [x3, 552]
+	add	w1, w1, 1
+	str	w1, [x3, 552]
+	ldrb	w1, [x10, 1]
+	ldp	w4, w5, [x0]
 	ldp	w6, w7, [x0, 8]
-	str	w10, [x29, 128]
-	ldrb	w1, [x28, 1]
-	adrp	x0, .LC171
-	ldr	w3, [x29, 156]
-	add	x0, x0, :lo12:.LC171
+	adrp	x0, .LC201
+	ldr	w3, [x10, 40]
+	add	x0, x0, :lo12:.LC201
 	bl	printf
-	adrp	x0, .LANCHOR102
-	ldr	w1, [x29, 156]
-	ldrh	w3, [x0, #:lo12:.LANCHOR102]
+	ldr	x10, [x29, 112]
+	adrp	x0, .LANCHOR99
+	ldrh	w3, [x0, #:lo12:.LANCHOR99]
 	mov	w0, 21
+	ldr	w1, [x10, 40]
 	sub	w2, w0, w3
 	mov	w0, 1
-	lsr	w1, w1, w3
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
+	lsr	w1, w1, w3
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR101
-	ldrb	w2, [x1, #:lo12:.LANCHOR101]
+	adrp	x1, .LANCHOR98
+	ldrb	w2, [x1, #:lo12:.LANCHOR98]
 	mov	x1, 0
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
-	ldr	w10, [x29, 128]
-.L2914:
-	ldr	x0, [x28, 24]
-	ldr	w0, [x0, 4]
-	cmp	w20, w0
-	bne	.L2915
-	cmn	w10, #1
-	bne	.L2916
-.L2915:
-	ldr	x1, [x29, 112]
-	adrp	x0, .LC0
-	mov	w2, 1048
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2916:
-	ldr	x0, [x28, 16]
-	cbnz	x0, .L2917
-	ldr	x1, [x28, 8]
-	ubfiz	x22, x22, 9, 16
-	lsl	w2, w19, 9
-	mov	x0, x23
-	add	x1, x1, x22
+	ldr	w8, [x29, 152]
+.L3010:
+	add	x0, x23, :lo12:.LANCHOR49
+	add	x0, x0, x19, lsl 6
+	ldr	x1, [x0, 24]
+	ldr	w0, [x0, 36]
+	ldr	w1, [x1, 4]
+	cmp	w1, w0
+	bne	.L3011
+	cmn	w8, #1
+	bne	.L3012
+.L3011:
+	ldp	x0, x1, [x29, 128]
+	mov	w2, 1085
+	bl	printf
+.L3012:
+	add	x0, x23, :lo12:.LANCHOR49
+	add	x19, x0, x19, lsl 6
+	ldr	x0, [x29, 168]
+	ldrb	w2, [x19, 56]
+	ldrb	w0, [x0, #:lo12:.LANCHOR121]
+	cmp	w0, w2
+	bls	.L3013
+	ldrb	w0, [x19, 57]
+	lsl	w2, w2, 9
+	ldr	x1, [x19, 8]
+	ubfiz	x0, x0, 9, 8
+	add	x1, x1, x0
+	ldr	x0, [x19, 16]
 	bl	ftl_memcpy
-.L2917:
-	ubfiz	x19, x19, 9, 16
-	mov	x0, x28
-	add	x23, x23, x19
+.L3014:
+	ldr	x1, [x29, 144]
+	adrp	x0, .LANCHOR127
+	add	x0, x0, :lo12:.LANCHOR127
+	bl	buf_remove_buf
+	ldr	x0, [x29, 144]
 	bl	buf_free
-	b	.L2902
-.L2912:
-	cmp	w10, 256
-	bne	.L2913
-	adrp	x0, .LANCHOR102
+	ldrb	w0, [x28]
+	sub	w0, w0, #1
+	strb	w0, [x28]
+	b	.L3006
+.L3008:
+	cmp	w8, 256
+	bne	.L3009
+	adrp	x0, .LANCHOR99
 	mov	w4, 21
+	ldp	w2, w3, [x1, 36]
 	mov	w5, 1
-	stp	w10, w5, [x29, 96]
-	ldrh	w1, [x0, #:lo12:.LANCHOR102]
-	ldr	w0, [x29, 156]
-	sub	w4, w4, w1
-	ldp	w2, w3, [x28, 36]
+	ldrh	w0, [x0, #:lo12:.LANCHOR99]
+	str	w5, [x29, 152]
+	sub	w4, w4, w0
+	lsr	w0, w3, w0
 	lsl	w4, w5, w4
-	lsr	w0, w0, w1
 	sub	w4, w4, #1
 	and	w4, w4, w0
-	adrp	x0, .LANCHOR101
-	ldrb	w0, [x0, #:lo12:.LANCHOR101]
+	adrp	x0, .LANCHOR98
+	ldrb	w0, [x0, #:lo12:.LANCHOR98]
 	udiv	w4, w4, w0
 	adrp	x0, .LC200
 	add	x0, x0, :lo12:.LC200
+	stp	w8, w4, [x29, 108]
 	and	w1, w4, 65535
-	str	w4, [x29, 128]
 	bl	printf
-	ldr	w5, [x29, 100]
+	ldr	w4, [x29, 112]
 	mov	w2, 0
-	ldr	w4, [x29, 128]
-	mov	w1, w5
+	ldr	w5, [x29, 152]
 	mov	w0, w4
+	mov	w1, w5
 	bl	gc_add_sblk
-	ldr	w10, [x29, 96]
-	b	.L2913
-.L2920:
+	ldr	w8, [x29, 108]
+	b	.L3009
+.L3013:
+	ldrb	w0, [x19, 2]
+	and	w0, w0, -9
+	strb	w0, [x19, 2]
+	b	.L3014
+.L3018:
 	mov	w0, -1
-	b	.L2893
+	b	.L2987
 	.size	zftl_read, .-zftl_read
 	.section	.text.zftl_vendor_read,"ax",@progbits
 	.align	2
@@ -18381,52 +18805,52 @@ ftl_update_l2p_map:
 	stp	x21, x22, [sp, 32]
 	mov	x22, x0
 	stp	x19, x20, [sp, 16]
-	adrp	x0, .LANCHOR83
+	adrp	x0, .LANCHOR80
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	ldrh	w23, [x0, #:lo12:.LANCHOR83]
+	ldrh	w23, [x0, #:lo12:.LANCHOR80]
 	ldrb	w0, [x22, 9]
 	ldrh	w19, [x22, 12]
 	mul	w23, w23, w0
-	adrp	x0, .LANCHOR114
+	adrp	x0, .LANCHOR111
 	str	x0, [x29, 104]
-	ldr	x1, [x0, #:lo12:.LANCHOR114]
+	ldr	x1, [x0, #:lo12:.LANCHOR111]
 	add	x19, x1, x19, lsl 2
 	add	x1, x19, x23, sxtw 2
 	ldr	w1, [x1, -4]
 	cmn	w1, #1
-	beq	.L2937
-	adrp	x1, .LANCHOR206
+	beq	.L3041
+	adrp	x1, .LANCHOR210
 	adrp	x0, .LC0
 	mov	w2, 1576
-	add	x1, x1, :lo12:.LANCHOR206
+	add	x1, x1, :lo12:.LANCHOR210
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2937:
-	adrp	x27, .LANCHOR123
+.L3041:
+	adrp	x27, .LANCHOR121
 	mov	x24, 0
-	add	x0, x27, :lo12:.LANCHOR123
+	add	x0, x27, :lo12:.LANCHOR121
 	mov	w21, 0
 	str	x0, [x29, 96]
-.L2938:
+.L3042:
 	cmp	w24, w23
-	blt	.L2944
-	adrp	x0, .LANCHOR9
-	adrp	x19, .LANCHOR5
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L2945
+	blt	.L3048
+	adrp	x0, .LANCHOR14
+	adrp	x19, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L3049
 	ldrh	w1, [x22]
-	ldr	x2, [x19, #:lo12:.LANCHOR5]
+	ldr	x2, [x19, #:lo12:.LANCHOR9]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w3, [x2, x0]
-	adrp	x0, .LC204
+	adrp	x0, .LC205
 	mov	w2, w21
-	add	x0, x0, :lo12:.LC204
+	add	x0, x0, :lo12:.LC205
 	bl	printf
-.L2945:
+.L3049:
 	ldrh	w1, [x22]
-	ldr	x0, [x19, #:lo12:.LANCHOR5]
+	ldr	x0, [x19, #:lo12:.LANCHOR9]
 	ldp	x23, x24, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	strh	w21, [x0, x1, lsl 1]
@@ -18435,38 +18859,38 @@ ftl_update_l2p_map:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2944:
+.L3048:
 	ldr	w2, [x19, x24, lsl 2]
 	cmn	w2, #1
-	beq	.L2939
-	ldrb	w20, [x27, #:lo12:.LANCHOR123]
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	beq	.L3043
+	ldrb	w20, [x27, #:lo12:.LANCHOR121]
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	lsl	w20, w20, 7
 	udiv	w20, w2, w20
 	and	w20, w20, 65535
-	tbz	x0, 12, .L2940
-	adrp	x0, .LC201
+	tbz	x0, 12, .L3044
+	adrp	x0, .LC202
 	mov	w3, w24
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC201
+	add	x0, x0, :lo12:.LC202
 	bl	printf
-.L2940:
-	adrp	x25, .LANCHOR108
-	adrp	x26, .LC202
+.L3044:
+	adrp	x25, .LANCHOR105
+	adrp	x26, .LC203
 	mov	x28, x24
-	add	x25, x25, :lo12:.LANCHOR108
-	add	x26, x26, :lo12:.LC202
-.L2943:
+	add	x25, x25, :lo12:.LANCHOR105
+	add	x26, x26, :lo12:.LC203
+.L3047:
 	ldr	w1, [x19, x28, lsl 2]
 	cmn	w1, #1
-	beq	.L2941
+	beq	.L3045
 	ldr	x0, [x29, 96]
 	ldrb	w2, [x0]
 	lsl	w2, w2, 7
 	udiv	w1, w1, w2
 	cmp	w20, w1, uxth
-	bne	.L2941
+	bne	.L3045
 	ldrb	w0, [x22, 9]
 	sdiv	w1, w28, w0
 	msub	w0, w1, w0, w28
@@ -18478,15 +18902,15 @@ ftl_update_l2p_map:
 	str	w2, [x29, 124]
 	ldr	w1, [x19, x28, lsl 2]
 	bl	pm_ppa_update_check
-	cbz	w0, .L2942
+	cbz	w0, .L3046
 	ldr	x0, [x29, 104]
 	mov	w3, w23
 	mov	w2, 4
-	ldr	x1, [x0, #:lo12:.LANCHOR114]
-	adrp	x0, .LC203
-	add	x0, x0, :lo12:.LC203
+	ldr	x1, [x0, #:lo12:.LANCHOR111]
+	adrp	x0, .LC204
+	add	x0, x0, :lo12:.LC204
 	bl	rknand_print_hex
-.L2942:
+.L3046:
 	ldr	w0, [x19, x28, lsl 2]
 	add	w21, w21, 1
 	mov	w2, 1
@@ -18495,13 +18919,13 @@ ftl_update_l2p_map:
 	bl	pm_log2phys
 	mov	w0, -1
 	str	w0, [x19, x28, lsl 2]
-.L2941:
+.L3045:
 	add	x28, x28, 1
 	cmp	w23, w28
-	bgt	.L2943
-.L2939:
+	bgt	.L3047
+.L3043:
 	add	x24, x24, 1
-	b	.L2938
+	b	.L3042
 	.size	ftl_update_l2p_map, .-ftl_update_l2p_map
 	.section	.text.ftl_alloc_new_data_sblk,"ax",@progbits
 	.align	2
@@ -18517,11 +18941,11 @@ ftl_alloc_new_data_sblk:
 	ldrh	w0, [x19]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L2967
+	beq	.L3071
 	bl	zftl_insert_data_list
-.L2967:
-	adrp	x0, .LANCHOR6
-	ldr	x0, [x0, #:lo12:.LANCHOR6]
+.L3071:
+	adrp	x0, .LANCHOR10
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	add	x0, x0, 16
 	cmp	x19, x0
 	mov	x0, x19
@@ -18543,54 +18967,54 @@ ftl_alloc_new_data_sblk:
 	.type	ftl_write_commit, %function
 ftl_write_commit:
 	stp	x29, x30, [sp, -144]!
-	adrp	x0, .LANCHOR48
+	adrp	x0, .LANCHOR49
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	add	x23, x0, :lo12:.LANCHOR48
+	add	x23, x0, :lo12:.LANCHOR49
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-.L2972:
-	adrp	x2, .LANCHOR55
-	ldrb	w1, [x2, #:lo12:.LANCHOR55]
-	cbz	w1, .L2974
-	adrp	x3, .LANCHOR54
-	adrp	x0, .LANCHOR48
-	add	x0, x0, :lo12:.LANCHOR48
+.L3076:
+	adrp	x2, .LANCHOR57
+	ldrb	w1, [x2, #:lo12:.LANCHOR57]
+	cbz	w1, .L3078
+	adrp	x3, .LANCHOR56
+	adrp	x0, .LANCHOR49
+	add	x0, x0, :lo12:.LANCHOR49
 	sub	w1, w1, #1
-	ldrb	w4, [x3, #:lo12:.LANCHOR54]
-	strb	w1, [x2, #:lo12:.LANCHOR55]
+	ldrb	w4, [x3, #:lo12:.LANCHOR56]
+	strb	w1, [x2, #:lo12:.LANCHOR57]
 	ubfiz	x27, x4, 6, 8
 	add	x5, x0, x27
 	stp	x4, x5, [x29, 112]
 	lsl	x4, x4, 6
 	add	x5, x0, x4
 	ldrb	w0, [x0, x4]
-	strb	w0, [x3, #:lo12:.LANCHOR54]
-	adrp	x0, .LANCHOR56
+	strb	w0, [x3, #:lo12:.LANCHOR56]
+	adrp	x0, .LANCHOR118
 	ldr	w2, [x5, 36]
 	mov	x19, x0
-	ldr	w1, [x0, #:lo12:.LANCHOR56]
+	ldr	w1, [x0, #:lo12:.LANCHOR118]
 	cmp	w2, w1
-	bcc	.L2976
-	adrp	x1, .LANCHOR207
+	bcc	.L3080
+	adrp	x1, .LANCHOR211
 	adrp	x0, .LC0
-	mov	w2, 487
-	add	x1, x1, :lo12:.LANCHOR207
+	mov	w2, 495
+	add	x1, x1, :lo12:.LANCHOR211
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2976:
+.L3080:
 	ldr	x0, [x29, 112]
-	ldr	w1, [x19, #:lo12:.LANCHOR56]
+	ldr	w1, [x19, #:lo12:.LANCHOR118]
 	add	x0, x23, x0, lsl 6
 	ldr	w22, [x0, 36]
 	cmp	w22, w1
-	bcc	.L2977
+	bcc	.L3081
 	ldr	x0, [x29, 120]
 	bl	buf_free
 	mov	w0, -1
-.L2971:
+.L3075:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -18598,60 +19022,60 @@ ftl_write_commit:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L2977:
+.L3081:
 	ldrb	w21, [x0, 57]
 	ldrb	w20, [x0, 56]
-	ldr	x25, [x0, 8]
+	ldr	x26, [x0, 8]
 	ldr	x28, [x0, 24]
-	adrp	x0, .LANCHOR121
+	adrp	x0, .LANCHOR119
 	str	x0, [x29, 104]
-	ldrb	w1, [x0, #:lo12:.LANCHOR121]
-	cbz	w1, .L2979
-	adrp	x0, .LANCHOR169
-	ldrb	w1, [x0, #:lo12:.LANCHOR169]
+	ldrb	w1, [x0, #:lo12:.LANCHOR119]
+	cbz	w1, .L3083
+	adrp	x0, .LANCHOR174
+	ldrb	w1, [x0, #:lo12:.LANCHOR174]
 	add	x1, x23, x1, lsl 6
-.L2980:
+.L3084:
 	ldrb	w0, [x1]
 	cmp	w0, 255
-	bne	.L2981
+	bne	.L3085
 	ldr	w0, [x1, 36]
 	cmp	w22, w0
-	bne	.L2979
+	bne	.L3083
 	ldr	x0, [x1, 8]
 	ubfiz	x21, x21, 9, 8
 	lsl	w2, w20, 9
-	add	x1, x25, x21
+	add	x1, x26, x21
 	add	x0, x0, x21
 	bl	ftl_memcpy
 	ldr	x0, [x29, 120]
 	bl	buf_free
-	b	.L2972
-.L2981:
+	b	.L3076
+.L3085:
 	ubfiz	x1, x0, 6, 8
 	add	x1, x23, x1
-	b	.L2980
-.L2979:
+	b	.L3084
+.L3083:
 	mov	w0, w22
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 140]
 	cmn	w0, #1
-	bne	.L2983
+	bne	.L3087
 	mov	w2, 0
 	add	x1, x29, 140
 	mov	w0, w22
 	bl	pm_log2phys
-.L2983:
-	adrp	x26, .LANCHOR6
+.L3087:
+	adrp	x25, .LANCHOR10
 	add	x1, x23, 2
 	mov	w0, 0
-	ldr	x19, [x26, #:lo12:.LANCHOR6]
+	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 16
-.L2986:
+.L3090:
 	ldr	w2, [x1, 34]
 	cmp	w22, w2
-	bne	.L2984
+	bne	.L3088
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L2984
+	tbz	x2, 3, .L3088
 	ubfiz	x0, x0, 6, 32
 	and	w2, w2, -9
 	add	x0, x23, x0
@@ -18659,50 +19083,50 @@ ftl_write_commit:
 	ldr	x24, [x0, 8]
 	ldr	w0, [x0, 40]
 	str	w0, [x29, 140]
-.L2985:
-	adrp	x0, .LANCHOR123
+.L3089:
+	adrp	x0, .LANCHOR121
 	str	x0, [x29, 96]
-	ldrb	w1, [x0, #:lo12:.LANCHOR123]
+	ldrb	w1, [x0, #:lo12:.LANCHOR121]
 	cmp	w20, w1
-	bcs	.L3010
+	bcs	.L3114
 	add	w20, w21, w20
-	cbz	x24, .L2988
-	cbz	w21, .L2989
+	cbz	x24, .L3092
+	cbz	w21, .L3093
 	lsl	w2, w21, 9
 	mov	x1, x24
-	mov	x0, x25
+	mov	x0, x26
 	bl	ftl_memcpy
-	ldr	x19, [x26, #:lo12:.LANCHOR6]
+	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 48
-.L2989:
+.L3093:
 	ldr	x0, [x29, 96]
-	ldrb	w2, [x0, #:lo12:.LANCHOR123]
+	ldrb	w2, [x0, #:lo12:.LANCHOR121]
 	cmp	w20, w2
-	bcc	.L2990
-	ldr	x19, [x26, #:lo12:.LANCHOR6]
+	bcc	.L3094
+	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 16
-.L3010:
+.L3114:
 	mov	w24, 0
-	b	.L2987
-.L2984:
+	b	.L3091
+.L3088:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 32
-	bne	.L2986
+	bne	.L3090
 	mov	x24, 0
-	b	.L2985
-.L2990:
+	b	.L3089
+.L3094:
 	ubfiz	x0, x20, 9, 9
 	sub	w2, w2, w20
 	add	x1, x24, x0
 	lsl	w2, w2, 9
-	add	x0, x25, x0
+	add	x0, x26, x0
 	bl	ftl_memcpy
-	b	.L3010
-.L2988:
+	b	.L3114
+.L3092:
 	ldr	w0, [x29, 140]
 	cmn	w0, #1
-	beq	.L2991
+	beq	.L3095
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 140]
@@ -18715,81 +19139,85 @@ ftl_write_commit:
 	ldr	w0, [x0, 4]
 	add	w24, w24, 1
 	cmp	w22, w0
-	bne	.L2992
+	bne	.L3096
 	ldr	w0, [x27, 52]
 	cmn	w0, #1
-	bne	.L2993
-.L2992:
-	ldrb	w1, [x27, 1]
+	bne	.L3097
+.L3096:
+	ldr	x1, [x25, #:lo12:.LANCHOR10]
 	mov	w3, w22
-	ldr	w2, [x29, 140]
-	adrp	x0, .LC205
 	ldr	w4, [x27, 52]
-	add	x0, x0, :lo12:.LC205
+	ldr	w2, [x29, 140]
+	ldr	w0, [x1, 552]
+	add	w0, w0, 1
+	str	w0, [x1, 552]
+	adrp	x0, .LC206
+	add	x0, x0, :lo12:.LC206
+	ldrb	w1, [x27, 1]
 	bl	printf
 	ldr	x1, [x27, 24]
 	mov	w3, 4
-	adrp	x0, .LC166
+	adrp	x0, .LC168
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC166
+	add	x0, x0, :lo12:.LC168
 	bl	rknand_print_hex
-.L2993:
+.L3097:
 	ldr	x0, [x27, 24]
 	ldr	w0, [x0, 4]
 	cmp	w22, w0
-	bne	.L2994
+	bne	.L3098
 	ldr	w0, [x27, 52]
 	cmn	w0, #1
-	bne	.L2995
-.L2994:
-	adrp	x1, .LANCHOR207
+	bne	.L3099
+.L3098:
+	adrp	x1, .LANCHOR211
 	adrp	x0, .LC0
-	mov	w2, 557
-	add	x1, x1, :lo12:.LANCHOR207
+	mov	w2, 566
+	add	x1, x1, :lo12:.LANCHOR211
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2995:
-	cbz	w21, .L2996
+.L3099:
+	cbz	w21, .L3100
 	ldr	w0, [x29, 140]
 	lsl	w2, w21, 9
 	cmn	w0, #1
-	beq	.L2997
+	beq	.L3101
 	ldr	x1, [x27, 8]
-	mov	x0, x25
+	mov	x0, x26
 	bl	ftl_memcpy
-.L2998:
-	ldr	x19, [x26, #:lo12:.LANCHOR6]
+.L3102:
+	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 48
-.L2996:
+.L3100:
 	ldr	x0, [x29, 96]
-	ldrb	w2, [x0, #:lo12:.LANCHOR123]
+	ldrb	w2, [x0, #:lo12:.LANCHOR121]
 	cmp	w20, w2
-	bcc	.L2999
-	bls	.L3000
-	ldr	x19, [x26, #:lo12:.LANCHOR6]
+	bcc	.L3103
+	bls	.L3104
+	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 16
-.L3000:
-	cbz	x27, .L2987
+.L3104:
+	cbz	x27, .L3091
 	ldrb	w0, [x27, 2]
 	mov	x1, x27
 	and	w0, w0, -9
 	strb	w0, [x27, 2]
-	adrp	x0, .LANCHOR60
-	add	x0, x0, :lo12:.LANCHOR60
+	adrp	x0, .LANCHOR127
+	add	x0, x0, :lo12:.LANCHOR127
 	bl	buf_remove_buf
 	mov	x0, x27
 	bl	buf_free
-.L2987:
+.L3091:
 	ldrh	w0, [x19, 6]
-	cbnz	w0, .L3002
+	cbnz	w0, .L3106
 	bl	ftl_flush
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L3002:
+.L3106:
 	mov	x0, x19
 	bl	ftl_get_new_free_page
 	ldr	x1, [x29, 112]
-	adrp	x20, .LANCHOR169
+	adrp	x20, .LANCHOR174
 	lsl	x2, x1, 6
 	add	x1, x23, x2
 	ldr	w3, [x1, 32]
@@ -18810,94 +19238,94 @@ ftl_write_commit:
 	sub	w0, w0, #1
 	strh	w0, [x1, 48]
 	ldr	x1, [x29, 120]
-	add	x0, x20, :lo12:.LANCHOR169
+	add	x0, x20, :lo12:.LANCHOR174
 	bl	buf_add_tail
 	ldr	x0, [x29, 104]
-	ldrb	w2, [x0, #:lo12:.LANCHOR121]
+	ldrb	w2, [x0, #:lo12:.LANCHOR119]
 	add	w2, w2, 1
 	and	w2, w2, 255
-	strb	w2, [x0, #:lo12:.LANCHOR121]
-	adrp	x0, .LANCHOR208
+	strb	w2, [x0, #:lo12:.LANCHOR119]
+	adrp	x0, .LANCHOR212
 	cmp	w2, 2
-	str	wzr, [x0, #:lo12:.LANCHOR208]
+	str	wzr, [x0, #:lo12:.LANCHOR212]
 	ldrh	w0, [x19, 6]
-	bhi	.L3003
+	bhi	.L3107
 	cmp	w0, 1
-	bne	.L2975
-.L3003:
+	bne	.L3079
+.L3107:
 	ldrb	w1, [x19, 5]
 	cmp	w1, 0
 	mov	w1, 0
 	cset	w4, ne
 	cmp	w0, 1
-	ldrb	w0, [x20, #:lo12:.LANCHOR169]
+	ldrb	w0, [x20, #:lo12:.LANCHOR174]
 	csinc	w4, w2, w4, eq
 	mov	w3, w0
-.L3007:
+.L3111:
 	cmp	w1, w4
-	bne	.L3008
-	strb	w3, [x20, #:lo12:.LANCHOR169]
+	bne	.L3112
+	strb	w3, [x20, #:lo12:.LANCHOR174]
 	and	w1, w1, 255
 	ldr	x3, [x29, 104]
 	sub	w2, w2, w1
 	ubfiz	x0, x0, 6, 8
 	add	x0, x23, x0
-	strb	w2, [x3, #:lo12:.LANCHOR121]
+	strb	w2, [x3, #:lo12:.LANCHOR119]
 	bl	sblk_prog_page
 	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bne	.L2975
+	bne	.L3079
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	mov	x0, x19
 	bl	ftl_write_last_log_page
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L2975:
-	adrp	x0, .LANCHOR55
-	ldrb	w0, [x0, #:lo12:.LANCHOR55]
-	cbnz	w0, .L2972
-.L2974:
+.L3079:
+	adrp	x0, .LANCHOR57
+	ldrb	w0, [x0, #:lo12:.LANCHOR57]
+	cbnz	w0, .L3076
+.L3078:
 	bl	ftl_write_completed
 	mov	w0, 0
-	b	.L2971
-.L2999:
+	b	.L3075
+.L3103:
 	ldr	w0, [x29, 140]
 	sub	w2, w2, w20
 	lsl	w2, w2, 9
 	cmn	w0, #1
 	ubfiz	x0, x20, 7, 9
-	beq	.L3001
+	beq	.L3105
 	ldr	x1, [x27, 8]
 	lsl	x0, x0, 2
 	add	x1, x1, x0
-	add	x0, x25, x0
+	add	x0, x26, x0
 	bl	ftl_memcpy
-	b	.L3000
-.L3001:
+	b	.L3104
+.L3105:
 	mov	w1, 0
-	add	x0, x25, x0, lsl 2
+	add	x0, x26, x0, lsl 2
 	bl	ftl_memset
-	b	.L3000
-.L3008:
+	b	.L3104
+.L3112:
 	ubfiz	x3, x3, 6, 8
 	add	w1, w1, 1
 	ldrb	w3, [x23, x3]
-	b	.L3007
-.L3009:
+	b	.L3111
+.L3113:
 	lsl	w2, w21, 9
 	mov	x27, 0
 	mov	w24, 0
-.L2997:
+.L3101:
 	mov	w1, 0
-	mov	x0, x25
+	mov	x0, x26
 	bl	ftl_memset
-	b	.L2998
-.L2991:
-	cbnz	w21, .L3009
+	b	.L3102
+.L3095:
+	cbnz	w21, .L3113
 	mov	w24, 0
 	mov	x27, 0
-	b	.L2996
+	b	.L3100
 	.size	ftl_write_commit, .-ftl_write_commit
 	.section	.text.gc_do_copy_back,"ax",@progbits
 	.align	2
@@ -18905,21 +19333,21 @@ ftl_write_commit:
 	.type	gc_do_copy_back, %function
 gc_do_copy_back:
 	sub	sp, sp, #224
-	adrp	x0, .LANCHOR74
+	adrp	x0, .LANCHOR71
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
-	ldrb	w0, [x0, #:lo12:.LANCHOR74]
+	ldrb	w0, [x0, #:lo12:.LANCHOR71]
 	stp	x19, x20, [sp, 32]
 	stp	x21, x22, [sp, 48]
 	stp	x23, x24, [sp, 64]
 	stp	x25, x26, [sp, 80]
 	stp	x27, x28, [sp, 96]
-	cbnz	w0, .L3033
+	cbnz	w0, .L3137
 	bl	buf_alloc
 	mov	x19, x0
-	cbz	x0, .L3032
-	adrp	x20, .LANCHOR65
-	add	x3, x20, :lo12:.LANCHOR65
+	cbz	x0, .L3136
+	adrp	x20, .LANCHOR62
+	add	x3, x20, :lo12:.LANCHOR62
 	ldrh	w2, [x3, 26]
 	mov	w0, w2
 	bl	gc_get_src_ppa_from_index
@@ -18933,52 +19361,52 @@ gc_do_copy_back:
 	ldr	w0, [x19, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3035
-	adrp	x1, .LANCHOR209
+	bne	.L3139
+	adrp	x1, .LANCHOR213
 	adrp	x0, .LC0
 	mov	w2, 595
-	add	x1, x1, :lo12:.LANCHOR209
+	add	x1, x1, :lo12:.LANCHOR213
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3035:
+.L3139:
 	ldr	x0, [x19, 24]
 	ldr	w21, [x0, 4]
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 160]
 	cmn	w0, #1
-	bne	.L3036
+	bne	.L3140
 	mov	w2, 0
 	add	x1, x29, 160
 	mov	w0, w21
 	bl	pm_log2phys
-.L3036:
+.L3140:
 	ldr	w23, [x29, 160]
 	cmp	w22, w23
-	bne	.L3037
-	adrp	x0, .LANCHOR48
-	add	x0, x0, :lo12:.LANCHOR48
+	bne	.L3141
+	adrp	x0, .LANCHOR49
+	add	x0, x0, :lo12:.LANCHOR49
 	add	x1, x0, 2
 	add	x0, x0, 2050
-.L3040:
+.L3144:
 	ldr	w2, [x1, 34]
 	cmp	w21, w2
-	bne	.L3038
+	bne	.L3142
 	ldrb	w2, [x1]
-	tbz	x2, 1, .L3038
+	tbz	x2, 1, .L3142
 	mov	x0, x19
 	bl	buf_free
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 8, .L3032
-	add	x20, x20, :lo12:.LANCHOR65
-	adrp	x0, .LC206
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L3136
+	add	x20, x20, :lo12:.LANCHOR62
+	adrp	x0, .LC207
 	mov	w2, w22
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC206
+	add	x0, x0, :lo12:.LC207
 	ldrh	w3, [x20, 26]
 	bl	printf
-.L3032:
+.L3136:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -18987,14 +19415,14 @@ gc_do_copy_back:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 224
 	ret
-.L3038:
+.L3142:
 	add	x1, x1, 64
 	cmp	x0, x1
-	bne	.L3040
-	adrp	x0, .LANCHOR123
+	bne	.L3144
+	adrp	x0, .LANCHOR121
 	mov	w1, 10
 	strb	wzr, [x19, 57]
-	ldrb	w0, [x0, #:lo12:.LANCHOR123]
+	ldrb	w0, [x0, #:lo12:.LANCHOR121]
 	strb	w0, [x19, 56]
 	ldrb	w0, [x19, 2]
 	str	w21, [x19, 36]
@@ -19003,67 +19431,67 @@ gc_do_copy_back:
 	ldr	x0, [x19, 24]
 	ldr	w0, [x0]
 	str	w0, [x19, 32]
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 8, .L3041
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L3145
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
-	add	x1, x20, :lo12:.LANCHOR65
+	add	x1, x20, :lo12:.LANCHOR62
 	mov	w3, w0
 	mov	w4, w22
-	adrp	x0, .LC207
+	adrp	x0, .LC208
 	mov	w2, w23
-	add	x0, x0, :lo12:.LC207
+	add	x0, x0, :lo12:.LC208
 	ldrh	w5, [x1, 26]
 	mov	w1, w21
 	bl	printf
-.L3041:
+.L3145:
 	mov	x0, x19
 	bl	ftl_gc_write_buf
 	bl	ftl_write_commit
-	add	x20, x20, :lo12:.LANCHOR65
-	adrp	x0, .LANCHOR100
-	ldr	x1, [x0, #:lo12:.LANCHOR100]
+	add	x20, x20, :lo12:.LANCHOR62
+	adrp	x0, .LANCHOR97
+	ldr	x1, [x0, #:lo12:.LANCHOR97]
 	ldr	w0, [x1, 60]
 	add	w0, w0, 1
 	str	w0, [x1, 60]
 	ldrh	w0, [x20, 28]
 	add	w0, w0, 1
 	strh	w0, [x20, 28]
-	b	.L3032
-.L3037:
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 8, .L3042
-	add	x20, x20, :lo12:.LANCHOR65
+	b	.L3136
+.L3141:
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L3146
+	add	x20, x20, :lo12:.LANCHOR62
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	mov	w3, w0
 	mov	w4, w22
-	adrp	x0, .LC207
+	adrp	x0, .LC208
 	ldrh	w5, [x20, 26]
 	mov	w2, w23
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC207
+	add	x0, x0, :lo12:.LC208
 	bl	printf
-.L3042:
+.L3146:
 	mov	x0, x19
 	bl	buf_free
-	b	.L3032
-.L3033:
-	adrp	x1, .LANCHOR6
-	adrp	x0, .LANCHOR71
+	b	.L3136
+.L3137:
+	adrp	x1, .LANCHOR10
+	adrp	x0, .LANCHOR68
 	stp	x0, x1, [x29, 128]
-	adrp	x24, .LANCHOR65
-	ldr	x22, [x1, #:lo12:.LANCHOR6]
-	ldrb	w25, [x0, #:lo12:.LANCHOR71]
+	adrp	x24, .LANCHOR62
+	ldr	x22, [x1, #:lo12:.LANCHOR10]
+	ldrb	w25, [x0, #:lo12:.LANCHOR68]
 	add	x22, x22, 80
 	cmp	w25, 3
-	bne	.L3043
-	adrp	x0, .LANCHOR73
-	ldrb	w0, [x0, #:lo12:.LANCHOR73]
-	cbz	w0, .L3044
-	add	x0, x24, :lo12:.LANCHOR65
+	bne	.L3147
+	adrp	x0, .LANCHOR70
+	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	cbz	w0, .L3148
+	add	x0, x24, :lo12:.LANCHOR62
 	ldrb	w19, [x22, 9]
 	ldrh	w20, [x0, 314]
 	add	w21, w19, w19, lsl 1
@@ -19071,30 +19499,30 @@ gc_do_copy_back:
 	sdiv	w21, w20, w21
 	madd	w19, w21, w19, w20
 	and	w19, w19, 65535
-.L3045:
-	adrp	x1, .LANCHOR75
+.L3149:
+	adrp	x1, .LANCHOR72
 	ldrb	w0, [x22, 9]
-	add	x4, x24, :lo12:.LANCHOR65
+	add	x4, x24, :lo12:.LANCHOR62
 	mov	w2, 0
-	ldrh	w3, [x1, #:lo12:.LANCHOR75]
+	ldrh	w3, [x1, #:lo12:.LANCHOR72]
 	mul	w8, w25, w0
 	ldrh	w10, [x4, 24]
 	mul	w3, w3, w0
-	adrp	x0, .LANCHOR147
-	ldr	x7, [x0, #:lo12:.LANCHOR147]
+	adrp	x0, .LANCHOR148
+	ldr	x7, [x0, #:lo12:.LANCHOR148]
 	sub	w3, w3, #1
-.L3048:
+.L3152:
 	cmp	w2, w8
-	blt	.L3050
-.L3077:
+	blt	.L3154
+.L3181:
 	mov	w23, 1
-	b	.L3046
-.L3044:
-	add	x0, x24, :lo12:.LANCHOR65
+	b	.L3150
+.L3148:
+	add	x0, x24, :lo12:.LANCHOR62
 	ldrb	w20, [x22, 9]
 	ldrh	w1, [x0, 314]
-	adrp	x0, .LANCHOR210
-	add	x0, x0, :lo12:.LANCHOR210
+	adrp	x0, .LANCHOR214
+	add	x0, x0, :lo12:.LANCHOR214
 	sdiv	w19, w1, w20
 	ldrh	w23, [x0, w19, sxtw 1]
 	msub	w19, w19, w20, w1
@@ -19105,31 +19533,31 @@ gc_do_copy_back:
 	madd	w20, w21, w20, w19
 	add	w20, w20, w20, lsl 1
 	and	w20, w20, 65535
-	beq	.L3045
-.L3046:
-	adrp	x0, .LANCHOR9
+	beq	.L3149
+.L3150:
+	adrp	x0, .LANCHOR14
 	str	x0, [x29, 112]
-	ldr	w1, [x0, #:lo12:.LANCHOR9]
-	tbz	x1, 8, .L3051
-	adrp	x0, .LANCHOR147
+	ldr	w1, [x0, #:lo12:.LANCHOR14]
+	tbz	x1, 8, .L3155
+	adrp	x0, .LANCHOR148
 	ubfiz	x1, x20, 2, 16
 	mov	w6, w20
 	mov	w3, w19
-	ldr	x2, [x0, #:lo12:.LANCHOR147]
-	add	x0, x24, :lo12:.LANCHOR65
+	ldr	x2, [x0, #:lo12:.LANCHOR148]
+	add	x0, x24, :lo12:.LANCHOR62
 	ldrh	w4, [x0, 314]
-	adrp	x0, .LC208
+	adrp	x0, .LC209
 	ldr	w5, [x2, x1]
-	add	x0, x0, :lo12:.LC208
+	add	x0, x0, :lo12:.LC209
 	mov	w2, w23
 	mov	w1, w21
 	bl	printf
-.L3051:
-	adrp	x0, .LANCHOR48
+.L3155:
+	adrp	x0, .LANCHOR49
 	str	wzr, [x29, 152]
-	add	x0, x0, :lo12:.LANCHOR48
+	add	x0, x0, :lo12:.LANCHOR49
 	str	x0, [x29, 120]
-.L3052:
+.L3156:
 	ldrb	w2, [x22, 9]
 	ldr	w0, [x29, 152]
 	ldrh	w26, [x29, 152]
@@ -19137,78 +19565,78 @@ gc_do_copy_back:
 	str	w0, [x29, 156]
 	mul	w1, w25, w2
 	cmp	w0, w1
-	blt	.L3064
+	blt	.L3168
 	ldr	x0, [x29, 128]
-	ldrb	w0, [x0, #:lo12:.LANCHOR71]
+	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w0, 3
 	add	x0, x29, 160
-	beq	.L3065
+	beq	.L3169
 	sub	w3, w1, #1
 	mov	w2, 0
-.L3066:
+.L3170:
 	cmp	w2, w3
-	blt	.L3072
+	blt	.L3176
 	ldr	x0, [x0, w3, sxtw 3]
 	mov	w2, -1
 	strb	w2, [x0]
 	ldr	x0, [x29, 160]
 	bl	sblk_prog_page
-	b	.L3071
-.L3043:
-	adrp	x0, .LANCHOR107
-	ldrb	w0, [x0, #:lo12:.LANCHOR107]
-	cbnz	w0, .L3047
-	add	x0, x24, :lo12:.LANCHOR65
+	b	.L3175
+.L3147:
+	adrp	x0, .LANCHOR104
+	ldrb	w0, [x0, #:lo12:.LANCHOR104]
+	cbnz	w0, .L3151
+	add	x0, x24, :lo12:.LANCHOR62
 	ldrb	w19, [x22, 9]
 	mov	w25, 1
 	ldrh	w20, [x0, 314]
 	sdiv	w21, w20, w19
 	msub	w19, w21, w19, w20
 	and	w19, w19, 65535
-	b	.L3045
-.L3047:
-	add	x0, x24, :lo12:.LANCHOR65
+	b	.L3149
+.L3151:
+	add	x0, x24, :lo12:.LANCHOR62
 	ldrb	w19, [x22, 9]
 	mov	w25, 2
 	ldrh	w20, [x0, 314]
 	sdiv	w21, w20, w19
 	msub	w19, w21, w19, w20
 	and	w19, w19, 65535
-	b	.L3045
-.L3050:
+	b	.L3149
+.L3154:
 	add	w5, w20, w2
 	cmp	w5, w3
-	beq	.L3077
+	beq	.L3181
 	sbfiz	x5, x5, 2, 32
 	ldr	w0, [x7, x5]
 	cmn	w0, #1
-	bne	.L3049
+	bne	.L3153
 	ldrh	w6, [x4, 26]
 	cmp	w6, w10
-	bcs	.L3032
+	bcs	.L3136
 	mov	w0, w6
 	bl	gc_get_src_ppa_from_index
 	add	w6, w6, 1
 	strh	w6, [x4, 26]
 	str	w0, [x7, x5]
-.L3049:
+.L3153:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-	b	.L3048
-.L3064:
+	b	.L3152
+.L3168:
 	ldr	w0, [x29, 156]
 	add	w0, w20, w0
 	str	w0, [x29, 144]
 	sxtw	x27, w0
-	adrp	x0, .LANCHOR72
-	ldr	x0, [x0, #:lo12:.LANCHOR72]
+	adrp	x0, .LANCHOR69
+	ldr	x0, [x0, #:lo12:.LANCHOR69]
 	ldrb	w0, [x0, x27]
 	cmp	w0, 255
-	bne	.L3053
+	bne	.L3157
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbnz	x0, .L3054
+	cbnz	x0, .L3158
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	bl	gc_write_completed
@@ -19216,17 +19644,17 @@ gc_do_copy_back:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbz	x0, .L3032
-.L3054:
-	adrp	x0, .LANCHOR72
+	cbz	x0, .L3136
+.L3158:
+	adrp	x0, .LANCHOR69
 	ldrb	w1, [x28, 1]
-	adrp	x5, .LANCHOR75
-	adrp	x6, .LANCHOR147
-	ldr	x0, [x0, #:lo12:.LANCHOR72]
+	adrp	x5, .LANCHOR72
+	adrp	x6, .LANCHOR148
+	ldr	x0, [x0, #:lo12:.LANCHOR69]
 	strb	w1, [x0, x27]
-	add	x1, x24, :lo12:.LANCHOR65
+	add	x1, x24, :lo12:.LANCHOR62
 	strb	w23, [x28, 61]
-	ldrh	w7, [x5, #:lo12:.LANCHOR75]
+	ldrh	w7, [x5, #:lo12:.LANCHOR72]
 	ldrb	w0, [x1, 7]
 	add	w0, w0, 1
 	strb	w0, [x1, 7]
@@ -19237,32 +19665,32 @@ gc_do_copy_back:
 	mul	w0, w0, w7
 	sub	w0, w0, #1
 	cmp	w1, w0
-	bne	.L3055
-	adrp	x0, .LANCHOR146
-	adrp	x4, .LANCHOR76
+	bne	.L3159
+	adrp	x0, .LANCHOR147
+	adrp	x4, .LANCHOR73
 	stp	x6, x5, [x29, 96]
-	ldr	x1, [x0, #:lo12:.LANCHOR146]
+	ldr	x1, [x0, #:lo12:.LANCHOR147]
 	mov	w0, -1
 	str	x4, [x29, 144]
 	str	w0, [x1, x27, lsl 2]
 	ldr	x0, [x28, 8]
-	ldrb	w2, [x4, #:lo12:.LANCHOR76]
+	ldrb	w2, [x4, #:lo12:.LANCHOR73]
 	mul	w2, w2, w7
 	lsl	w2, w2, 2
 	bl	ftl_memcpy
 	ldp	x6, x5, [x29, 96]
 	ldr	x4, [x29, 144]
 	ldr	x7, [x28, 8]
-	ldrh	w0, [x5, #:lo12:.LANCHOR75]
-	ldrb	w1, [x4, #:lo12:.LANCHOR76]
+	ldrh	w0, [x5, #:lo12:.LANCHOR72]
+	ldrb	w1, [x4, #:lo12:.LANCHOR73]
 	mul	w0, w0, w1
-	ldr	x1, [x6, #:lo12:.LANCHOR147]
+	ldr	x1, [x6, #:lo12:.LANCHOR148]
 	lsl	w2, w0, 2
 	add	x0, x7, x0, sxtw 2
 	bl	ftl_memcpy
-	adrp	x0, .LANCHOR123
+	adrp	x0, .LANCHOR121
 	mov	w1, 0
-	ldrb	w2, [x0, #:lo12:.LANCHOR123]
+	ldrb	w2, [x0, #:lo12:.LANCHOR121]
 	ldr	x0, [x28, 24]
 	lsl	w2, w2, 1
 	bl	ftl_memset
@@ -19271,41 +19699,41 @@ gc_do_copy_back:
 	ldr	x5, [x29, 104]
 	movk	w0, 0xf55f, lsl 16
 	ldr	x4, [x29, 144]
-	ldrh	w1, [x5, #:lo12:.LANCHOR75]
+	ldrh	w1, [x5, #:lo12:.LANCHOR72]
 	str	w0, [x6]
-	ldrb	w0, [x4, #:lo12:.LANCHOR76]
+	ldrb	w0, [x4, #:lo12:.LANCHOR73]
 	mul	w1, w1, w0
 	ldr	x0, [x28, 8]
 	lsl	w1, w1, 2
 	bl	js_hash
 	str	w0, [x6, 4]
 	ldr	x0, [x29, 136]
-	ldr	x0, [x0, #:lo12:.LANCHOR6]
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x0, 132]
 	str	w0, [x6, 8]
-.L3053:
-	adrp	x0, .LANCHOR72
+.L3157:
+	adrp	x0, .LANCHOR69
 	ldr	w5, [x29, 156]
 	add	x1, x29, 160
-	ldr	x4, [x0, #:lo12:.LANCHOR72]
-	adrp	x0, .LANCHOR48
-	add	x3, x0, :lo12:.LANCHOR48
+	ldr	x4, [x0, #:lo12:.LANCHOR69]
+	adrp	x0, .LANCHOR49
+	add	x3, x0, :lo12:.LANCHOR49
 	ldrb	w2, [x4, x27]
 	ubfiz	x0, x2, 6, 8
 	add	x0, x3, x0
 	add	x3, x3, x2, lsl 6
 	str	x0, [x1, w5, sxtw 3]
 	mov	w0, 2
-	adrp	x5, .LANCHOR148
+	adrp	x5, .LANCHOR149
 	strh	w0, [x3, 50]
 	ldr	x0, [x29, 128]
 	strb	w23, [x3, 61]
-	ldrb	w0, [x0, #:lo12:.LANCHOR71]
+	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w0, 3
-	bne	.L3059
+	bne	.L3163
 	udiv	w0, w26, w0
-	adrp	x6, .LANCHOR108
-	ldrh	w6, [x6, #:lo12:.LANCHOR108]
+	adrp	x6, .LANCHOR105
+	ldrh	w6, [x6, #:lo12:.LANCHOR105]
 	add	w1, w0, w19
 	add	w0, w0, w0, lsl 1
 	add	x1, x22, x1, sxtw 1
@@ -19317,18 +19745,18 @@ gc_do_copy_back:
 	ldrh	w6, [x3, 48]
 	orr	w1, w1, w21
 	str	w1, [x3, 40]
-	ldr	x3, [x5, #:lo12:.LANCHOR148]
+	ldr	x3, [x5, #:lo12:.LANCHOR149]
 	orr	w0, w1, w0, lsl 24
 	str	w0, [x3, x6, lsl 2]
-.L3060:
+.L3164:
 	ldr	x0, [x29, 112]
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 8, .L3063
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L3167
 	ldr	x0, [x29, 120]
 	ldrb	w4, [x4, x27]
 	ldr	w1, [x29, 156]
 	add	x2, x0, x2, lsl 6
-	add	x0, x24, :lo12:.LANCHOR65
+	add	x0, x24, :lo12:.LANCHOR62
 	ldrb	w3, [x0, 6]
 	ldr	x0, [x2, 24]
 	ldrb	w7, [x2, 1]
@@ -19337,22 +19765,22 @@ gc_do_copy_back:
 	str	w0, [sp, 8]
 	mov	w0, 3
 	udiv	w26, w26, w0
-	adrp	x0, .LC209
-	add	x0, x0, :lo12:.LC209
+	adrp	x0, .LC210
+	add	x0, x0, :lo12:.LC210
 	add	w26, w26, w19
 	str	w26, [sp]
 	ldr	w5, [x2, 40]
 	mov	w2, w23
 	bl	printf
-.L3063:
+.L3167:
 	ldr	w0, [x29, 152]
 	add	w0, w0, 1
 	str	w0, [x29, 152]
-	b	.L3052
-.L3055:
+	b	.L3156
+.L3159:
 	lsl	x0, x27, 2
 	str	x0, [x29, 144]
-	ldr	x0, [x6, #:lo12:.LANCHOR147]
+	ldr	x0, [x6, #:lo12:.LANCHOR148]
 	lsl	x1, x27, 2
 	ldr	w0, [x0, x1]
 	mov	w1, 1
@@ -19362,10 +19790,10 @@ gc_do_copy_back:
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3057
-	adrp	x0, .LANCHOR102
+	bne	.L3161
+	adrp	x0, .LANCHOR99
 	ldr	w1, [x28, 40]
-	ldrh	w4, [x0, #:lo12:.LANCHOR102]
+	ldrh	w4, [x0, #:lo12:.LANCHOR99]
 	mov	w0, 21
 	sub	w2, w0, w4
 	mov	w0, 1
@@ -19373,146 +19801,146 @@ gc_do_copy_back:
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR101
-	ldrb	w2, [x1, #:lo12:.LANCHOR101]
+	adrp	x1, .LANCHOR98
+	ldrb	w2, [x1, #:lo12:.LANCHOR98]
 	mov	x1, 0
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3057
+	bne	.L3161
 	ldr	x0, [x28, 24]
 	mov	w1, -1
 	str	w1, [x0, 4]
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmp	w0, w1, 4, ne
-	bne	.L3057
-	adrp	x1, .LANCHOR209
+	bne	.L3161
+	adrp	x1, .LANCHOR213
 	adrp	x0, .LC0
 	mov	w2, 710
-	add	x1, x1, :lo12:.LANCHOR209
+	add	x1, x1, :lo12:.LANCHOR213
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3057:
+.L3161:
 	ldr	x0, [x28, 24]
-	adrp	x1, .LANCHOR56
-	ldr	w1, [x1, #:lo12:.LANCHOR56]
+	adrp	x1, .LANCHOR118
+	ldr	w1, [x1, #:lo12:.LANCHOR118]
 	ldr	w2, [x0, 4]
 	cmp	w2, w1
-	bcc	.L3058
+	bcc	.L3162
 	mov	w1, -1
 	str	w1, [x0, 4]
-.L3058:
-	adrp	x1, .LANCHOR146
+.L3162:
+	adrp	x1, .LANCHOR147
 	lsl	x3, x27, 2
 	ldr	w2, [x0, 4]
-	ldr	x1, [x1, #:lo12:.LANCHOR146]
+	ldr	x1, [x1, #:lo12:.LANCHOR147]
 	str	w2, [x1, x3]
 	ldr	w1, [x28, 40]
 	str	w1, [x0, 8]
-	b	.L3053
-.L3059:
+	b	.L3157
+.L3163:
 	cmp	w0, 2
-	bne	.L3061
-	adrp	x0, .LANCHOR107
-	adrp	x1, .LANCHOR108
-	ldrb	w0, [x0, #:lo12:.LANCHOR107]
-	cbnz	w0, .L3062
+	bne	.L3165
+	adrp	x0, .LANCHOR104
+	adrp	x1, .LANCHOR105
+	ldrb	w0, [x0, #:lo12:.LANCHOR104]
+	cbnz	w0, .L3166
 	ldr	w0, [x29, 156]
-	ldrh	w1, [x1, #:lo12:.LANCHOR108]
+	ldrh	w1, [x1, #:lo12:.LANCHOR105]
 	add	w0, w19, w0
 	add	x0, x22, x0, sxtw 1
 	ldrh	w0, [x0, 16]
 	madd	w0, w0, w1, w21
-.L3120:
+.L3224:
 	orr	w0, w0, 33554432
 	str	w0, [x3, 40]
-.L3061:
+.L3165:
 	ldr	x0, [x29, 120]
 	add	x0, x0, x2, lsl 6
 	ldrh	w1, [x0, 48]
 	ldr	w3, [x0, 40]
-	ldr	x0, [x5, #:lo12:.LANCHOR148]
+	ldr	x0, [x5, #:lo12:.LANCHOR149]
 	str	w3, [x0, x1, lsl 2]
-	b	.L3060
-.L3062:
+	b	.L3164
+.L3166:
 	add	w0, w19, w26, lsr 1
-	ldrh	w1, [x1, #:lo12:.LANCHOR108]
+	ldrh	w1, [x1, #:lo12:.LANCHOR105]
 	add	x0, x22, x0, sxtw 1
 	ldrh	w0, [x0, 16]
 	madd	w0, w0, w1, w21
 	and	w1, w26, 1
 	add	w0, w0, w1
-	b	.L3120
-.L3065:
-	adrp	x1, .LANCHOR73
-	ldrb	w3, [x1, #:lo12:.LANCHOR73]
+	b	.L3224
+.L3169:
+	adrp	x1, .LANCHOR70
+	ldrb	w3, [x1, #:lo12:.LANCHOR70]
 	ldr	x1, [x29, 160]
-	cbz	w3, .L3067
-.L3070:
+	cbz	w3, .L3171
+.L3174:
 	strb	wzr, [x1, 60]
-	b	.L3068
-.L3067:
+	b	.L3172
+.L3171:
 	cmp	w23, 1
-	bne	.L3069
+	bne	.L3173
 	mov	w3, 9
-.L3119:
+.L3223:
 	strb	w3, [x1, 60]
-.L3068:
+.L3172:
 	add	x1, x0, 24
 	bl	sblk_xlc_prog_pages
-.L3071:
-	adrp	x1, .LANCHOR73
+.L3175:
+	adrp	x1, .LANCHOR70
 	ldrb	w3, [x22, 9]
-	ldrb	w1, [x1, #:lo12:.LANCHOR73]
+	ldrb	w1, [x1, #:lo12:.LANCHOR70]
 	and	w0, w3, 65535
-	cbz	w1, .L3073
+	cbz	w1, .L3177
 	add	w0, w0, w0, lsl 1
-.L3074:
-	adrp	x1, .LANCHOR100
-	add	x24, x24, :lo12:.LANCHOR65
-	ldr	x1, [x1, #:lo12:.LANCHOR100]
+.L3178:
+	adrp	x1, .LANCHOR97
+	add	x24, x24, :lo12:.LANCHOR62
+	ldr	x1, [x1, #:lo12:.LANCHOR97]
 	ldr	w2, [x1, 52]
 	add	w2, w2, w0
 	str	w2, [x1, 52]
 	ldrh	w1, [x24, 314]
 	add	w0, w0, w1
-	adrp	x1, .LANCHOR75
+	adrp	x1, .LANCHOR72
 	and	w0, w0, 65535
 	strh	w0, [x24, 314]
-	ldrh	w1, [x1, #:lo12:.LANCHOR75]
+	ldrh	w1, [x1, #:lo12:.LANCHOR72]
 	mul	w1, w1, w3
 	cmp	w0, w1
-	blt	.L3075
+	blt	.L3179
 	ldr	x0, [x29, 136]
-	ldr	x0, [x0, #:lo12:.LANCHOR6]
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	strh	wzr, [x0, 86]
-.L3075:
+.L3179:
 	bl	gc_write_completed
-	b	.L3032
-.L3069:
+	b	.L3136
+.L3173:
 	cmp	w23, 2
-	bne	.L3070
+	bne	.L3174
 	mov	w3, 13
-	b	.L3119
-.L3072:
+	b	.L3223
+.L3176:
 	ldr	x4, [x0, w2, sxtw 3]
 	add	w2, w2, 1
 	ldr	x5, [x0, w2, sxtw 3]
 	and	w2, w2, 65535
 	ldrb	w5, [x5, 1]
 	strb	w5, [x4]
-	b	.L3066
-.L3073:
-	adrp	x1, .LANCHOR107
-	ldrb	w2, [x1, #:lo12:.LANCHOR107]
+	b	.L3170
+.L3177:
+	adrp	x1, .LANCHOR104
+	ldrb	w2, [x1, #:lo12:.LANCHOR104]
 	mov	w1, w0
 	ubfiz	w0, w0, 1, 15
 	cmp	w2, 0
 	csel	w0, w0, w1, ne
-	b	.L3074
+	b	.L3178
 	.size	gc_do_copy_back, .-gc_do_copy_back
 	.section	.text.zftl_do_gc,"ax",@progbits
 	.align	2
@@ -19520,156 +19948,156 @@ gc_do_copy_back:
 	.type	zftl_do_gc, %function
 zftl_do_gc:
 	sub	sp, sp, #128
-	adrp	x1, .LANCHOR97
+	adrp	x1, .LANCHOR94
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x21, x22, [sp, 48]
 	stp	x19, x20, [sp, 32]
-	adrp	x19, .LANCHOR144
-	ldrh	w22, [x1, #:lo12:.LANCHOR97]
-	adrp	x1, .LANCHOR93
+	adrp	x19, .LANCHOR145
+	ldrh	w22, [x1, #:lo12:.LANCHOR94]
+	adrp	x1, .LANCHOR90
 	stp	x23, x24, [sp, 64]
-	adrp	x23, .LANCHOR6
-	ldrh	w21, [x1, #:lo12:.LANCHOR93]
+	adrp	x23, .LANCHOR10
+	ldrh	w21, [x1, #:lo12:.LANCHOR90]
 	stp	x25, x26, [sp, 80]
-	ldrb	w1, [x19, #:lo12:.LANCHOR144]
+	ldrb	w1, [x19, #:lo12:.LANCHOR145]
 	add	w21, w22, w21
 	stp	x27, x28, [sp, 96]
-	ldr	x24, [x23, #:lo12:.LANCHOR6]
+	ldr	x24, [x23, #:lo12:.LANCHOR10]
 	cmp	w1, 6
-	bhi	.L3226
+	bhi	.L3330
 	mov	w26, w0
 	and	w21, w21, 65535
-	adrp	x0, .L3124
-	add	x0, x0, :lo12:.L3124
+	adrp	x0, .L3228
+	add	x0, x0, :lo12:.L3228
 	ldrh	w0, [x0,w1,uxtw #1]
-	adr	x1, .Lrtx3124
+	adr	x1, .Lrtx3228
 	add	x0, x1, w0, sxth #2
 	br	x0
-.Lrtx3124:
+.Lrtx3228:
 	.section	.rodata.zftl_do_gc,"a",@progbits
 	.align	0
 	.align	2
-.L3124:
-	.2byte	(.L3123 - .Lrtx3124) / 4
-	.2byte	(.L3125 - .Lrtx3124) / 4
-	.2byte	(.L3126 - .Lrtx3124) / 4
-	.2byte	(.L3127 - .Lrtx3124) / 4
-	.2byte	(.L3128 - .Lrtx3124) / 4
-	.2byte	(.L3129 - .Lrtx3124) / 4
-	.2byte	(.L3130 - .Lrtx3124) / 4
+.L3228:
+	.2byte	(.L3227 - .Lrtx3228) / 4
+	.2byte	(.L3229 - .Lrtx3228) / 4
+	.2byte	(.L3230 - .Lrtx3228) / 4
+	.2byte	(.L3231 - .Lrtx3228) / 4
+	.2byte	(.L3232 - .Lrtx3228) / 4
+	.2byte	(.L3233 - .Lrtx3228) / 4
+	.2byte	(.L3234 - .Lrtx3228) / 4
 	.section	.text.zftl_do_gc
-.L3129:
-	adrp	x20, .LANCHOR65
-	add	x24, x20, :lo12:.LANCHOR65
+.L3233:
+	adrp	x20, .LANCHOR62
+	add	x24, x20, :lo12:.LANCHOR62
 	mov	w22, 0
-.L3131:
+.L3235:
 	bl	gc_check_data_one_wl
-	cbz	w0, .L3222
-	ldr	x0, [x23, #:lo12:.LANCHOR6]
-	add	x20, x20, :lo12:.LANCHOR65
+	cbz	w0, .L3326
+	ldr	x0, [x23, #:lo12:.LANCHOR10]
+	add	x20, x20, :lo12:.LANCHOR62
 	strh	wzr, [x20, 56]
 	ldrh	w0, [x0, 80]
 	bl	ftl_free_sblk
-	adrp	x2, .LANCHOR100
-	ldr	x1, [x23, #:lo12:.LANCHOR6]
+	adrp	x2, .LANCHOR97
+	ldr	x1, [x23, #:lo12:.LANCHOR10]
 	mov	w0, -1
-	ldr	x2, [x2, #:lo12:.LANCHOR100]
+	ldr	x2, [x2, #:lo12:.LANCHOR97]
 	strh	w0, [x1, 80]
 	strh	w0, [x2, 126]
 	strh	w0, [x1, 130]
 	ldr	x0, [x20, 8]
 	bl	buf_free
-	strb	wzr, [x19, #:lo12:.LANCHOR144]
+	strb	wzr, [x19, #:lo12:.LANCHOR145]
 	str	xzr, [x20, 8]
-	b	.L3290
-.L3123:
-	adrp	x0, .LANCHOR95
-	adrp	x28, .LANCHOR88
-	adrp	x27, .LANCHOR86
+	b	.L3394
+.L3227:
+	adrp	x0, .LANCHOR92
+	adrp	x28, .LANCHOR85
+	adrp	x27, .LANCHOR83
 	ldrh	w1, [x24, 80]
-	ldrh	w0, [x0, #:lo12:.LANCHOR95]
-	ldrh	w25, [x28, #:lo12:.LANCHOR88]
+	ldrh	w0, [x0, #:lo12:.LANCHOR92]
+	ldrh	w25, [x28, #:lo12:.LANCHOR85]
 	add	w22, w22, w0
-	ldrh	w0, [x27, #:lo12:.LANCHOR86]
+	ldrh	w0, [x27, #:lo12:.LANCHOR83]
 	and	w22, w22, 65535
 	add	w25, w25, w0
 	mov	w0, 65535
 	and	w25, w25, 65535
 	cmp	w1, w0
-	beq	.L3132
-	cbnz	w26, .L3133
-	adrp	x0, .LANCHOR77
-	ldrh	w0, [x0, #:lo12:.LANCHOR77]
+	beq	.L3236
+	cbnz	w26, .L3237
+	adrp	x0, .LANCHOR74
+	ldrh	w0, [x0, #:lo12:.LANCHOR74]
 	cmp	w21, w0, lsl 1
-	blt	.L3133
-.L3226:
+	blt	.L3237
+.L3330:
 	mov	w20, 16
-	b	.L3121
-.L3133:
-	adrp	x5, .LANCHOR85
+	b	.L3225
+.L3237:
+	adrp	x5, .LANCHOR82
 	mov	w1, 5
-	adrp	x26, .LANCHOR74
-	ldrh	w0, [x5, #:lo12:.LANCHOR85]
+	adrp	x26, .LANCHOR71
+	ldrh	w0, [x5, #:lo12:.LANCHOR82]
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	strh	w0, [x5, #:lo12:.LANCHOR85]
+	strh	w0, [x5, #:lo12:.LANCHOR82]
 	bl	zftl_get_gc_node
 	and	w3, w0, 65535
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L3134
-	adrp	x4, .LANCHOR5
+	beq	.L3238
+	adrp	x4, .LANCHOR9
 	ubfiz	x3, x3, 1, 16
-	adrp	x1, .LANCHOR145
+	adrp	x1, .LANCHOR146
 	mov	x20, x1
-	ldr	x4, [x4, #:lo12:.LANCHOR5]
-	ldr	w2, [x1, #:lo12:.LANCHOR145]
+	ldr	x4, [x4, #:lo12:.LANCHOR9]
+	ldr	w2, [x1, #:lo12:.LANCHOR146]
 	add	w2, w2, 1
-	str	w2, [x1, #:lo12:.LANCHOR145]
+	str	w2, [x1, #:lo12:.LANCHOR146]
 	ldrh	w3, [x4, x3]
-	adrp	x4, .LANCHOR83
-	ldrh	w4, [x4, #:lo12:.LANCHOR83]
+	adrp	x4, .LANCHOR80
+	ldrh	w4, [x4, #:lo12:.LANCHOR80]
 	cmp	w4, w3
-	bcs	.L3135
-	adrp	x1, .LANCHOR2
-	ldrh	w1, [x1, #:lo12:.LANCHOR2]
+	bcs	.L3239
+	adrp	x1, .LANCHOR6
+	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	cmp	w2, w1, lsr 4
-	bls	.L3134
-	adrp	x1, .LANCHOR89
-	ldrh	w1, [x1, #:lo12:.LANCHOR89]
+	bls	.L3238
+	adrp	x1, .LANCHOR86
+	ldrh	w1, [x1, #:lo12:.LANCHOR86]
 	cmp	w1, w3
-	bls	.L3134
-.L3135:
-	ldrb	w2, [x26, #:lo12:.LANCHOR74]
+	bls	.L3238
+.L3239:
+	ldrb	w2, [x26, #:lo12:.LANCHOR71]
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L3136
+	cbz	w0, .L3240
 	mov	w0, 1
-	str	wzr, [x20, #:lo12:.LANCHOR145]
-	strb	w0, [x19, #:lo12:.LANCHOR144]
-	b	.L3226
-.L3134:
-	strh	wzr, [x5, #:lo12:.LANCHOR85]
-.L3136:
+	str	wzr, [x20, #:lo12:.LANCHOR146]
+	strb	w0, [x19, #:lo12:.LANCHOR145]
+	b	.L3330
+.L3238:
+	strh	wzr, [x5, #:lo12:.LANCHOR82]
+.L3240:
 	cmp	w22, 15
-	bls	.L3228
-	adrp	x0, .LANCHOR90
-	ldrh	w1, [x0, #:lo12:.LANCHOR90]
-	adrp	x0, .LANCHOR91
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	bls	.L3332
+	adrp	x0, .LANCHOR87
+	ldrh	w1, [x0, #:lo12:.LANCHOR87]
+	adrp	x0, .LANCHOR88
+	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w1, w0
-	bhi	.L3228
+	bhi	.L3332
 	cmp	w25, 0
 	cset	w20, eq
 	add	w20, w20, 1
-.L3137:
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 8, .L3138
-	ldr	x0, [x23, #:lo12:.LANCHOR6]
+.L3241:
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L3242
+	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	mov	w4, w22
-	ldrb	w2, [x26, #:lo12:.LANCHOR74]
+	ldrb	w2, [x26, #:lo12:.LANCHOR71]
 	mov	w3, w21
 	mov	w1, 1848
 	ldrh	w7, [x0, 122]
@@ -19677,74 +20105,74 @@ zftl_do_gc:
 	ldrh	w5, [x0, 124]
 	ldrh	w0, [x24, 80]
 	str	w0, [sp]
-	adrp	x0, .LC210
-	add	x0, x0, :lo12:.LC210
+	adrp	x0, .LC211
+	add	x0, x0, :lo12:.LC211
 	bl	printf
-.L3138:
-	ldrb	w0, [x26, #:lo12:.LANCHOR74]
+.L3242:
+	ldrb	w0, [x26, #:lo12:.LANCHOR71]
 	mov	w2, 1
 	mov	w1, w20
 	bl	gc_search_src_blk
 	cmp	w0, 0
-	ble	.L3139
-.L3140:
+	ble	.L3243
+.L3244:
 	mov	w0, 1
-.L3292:
-	strb	w0, [x19, #:lo12:.LANCHOR144]
-	b	.L3226
-.L3228:
+.L3396:
+	strb	w0, [x19, #:lo12:.LANCHOR145]
+	b	.L3330
+.L3332:
 	mov	w20, 2
-	b	.L3137
-.L3139:
-	ldrb	w0, [x26, #:lo12:.LANCHOR74]
+	b	.L3241
+.L3243:
+	ldrb	w0, [x26, #:lo12:.LANCHOR71]
 	mov	w2, 1
 	mov	w1, 3
 	bl	gc_search_src_blk
 	cmp	w0, 0
-	bgt	.L3140
-	b	.L3226
-.L3132:
+	bgt	.L3244
+	b	.L3330
+.L3236:
 	cmp	w26, 1
-	bne	.L3142
+	bne	.L3246
 	bl	gc_scan_static_data
-	adrp	x24, .LANCHOR74
-	ldr	x0, [x23, #:lo12:.LANCHOR6]
+	adrp	x24, .LANCHOR71
+	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	ldrh	w0, [x0, 122]
-	cbz	w0, .L3143
-.L3144:
+	cbz	w0, .L3247
+.L3248:
 	mov	w0, 1
-	strb	w0, [x24, #:lo12:.LANCHOR74]
-	b	.L3292
-.L3143:
+	strb	w0, [x24, #:lo12:.LANCHOR71]
+	b	.L3396
+.L3247:
 	bl	gc_static_wearleveling
 	mov	w20, w0
-	cbnz	w0, .L3144
-	cbnz	w22, .L3145
-.L3149:
+	cbnz	w0, .L3248
+	cbnz	w22, .L3249
+.L3253:
 	mov	w20, 16
-.L3146:
-	ldr	x0, [x23, #:lo12:.LANCHOR6]
-	adrp	x3, .LANCHOR74
+.L3250:
+	ldr	x0, [x23, #:lo12:.LANCHOR10]
+	adrp	x3, .LANCHOR71
 	mov	w1, 1
 	mov	x23, x3
-	strb	w1, [x3, #:lo12:.LANCHOR74]
+	strb	w1, [x3, #:lo12:.LANCHOR71]
 	ldrh	w5, [x0, 124]
-	cbz	w5, .L3154
-	strb	w1, [x19, #:lo12:.LANCHOR144]
-	adrp	x1, .LANCHOR9
-	strb	wzr, [x3, #:lo12:.LANCHOR74]
-	ldr	w1, [x1, #:lo12:.LANCHOR9]
-	tbz	x1, 8, .L3121
+	cbz	w5, .L3258
+	strb	w1, [x19, #:lo12:.LANCHOR145]
+	adrp	x1, .LANCHOR14
+	strb	wzr, [x3, #:lo12:.LANCHOR71]
+	ldr	w1, [x1, #:lo12:.LANCHOR14]
+	tbz	x1, 8, .L3225
 	ldrh	w7, [x0, 122]
 	mov	w4, w22
 	ldrh	w6, [x0, 120]
 	mov	w3, w21
-	adrp	x0, .LC211
+	adrp	x0, .LC212
 	mov	w2, 0
 	mov	w1, 1946
-	add	x0, x0, :lo12:.LC211
+	add	x0, x0, :lo12:.LC212
 	bl	printf
-.L3121:
+.L3225:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
@@ -19754,221 +20182,221 @@ zftl_do_gc:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 128
 	ret
-.L3145:
+.L3249:
 	cmp	w21, w25
-	adrp	x1, .LANCHOR90
-	adrp	x2, .LANCHOR87
-	bcs	.L3147
-	ldrh	w0, [x2, #:lo12:.LANCHOR87]
+	adrp	x1, .LANCHOR87
+	adrp	x2, .LANCHOR84
+	bcs	.L3251
+	ldrh	w0, [x2, #:lo12:.LANCHOR84]
 	cmp	w21, w0, lsl 1
-	blt	.L3148
-.L3147:
-	ldrh	w2, [x2, #:lo12:.LANCHOR87]
+	blt	.L3252
+.L3251:
+	ldrh	w2, [x2, #:lo12:.LANCHOR84]
 	add	w0, w21, w25
 	cmp	w0, w2, lsl 1
-	blt	.L3148
-	adrp	x0, .LANCHOR91
-	ldrh	w2, [x1, #:lo12:.LANCHOR90]
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	blt	.L3252
+	adrp	x0, .LANCHOR88
+	ldrh	w2, [x1, #:lo12:.LANCHOR87]
+	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w2, w0
-	bcc	.L3149
-.L3148:
-	adrp	x5, .LANCHOR145
-	adrp	x2, .LANCHOR2
+	bcc	.L3253
+.L3252:
+	adrp	x5, .LANCHOR146
+	adrp	x2, .LANCHOR6
 	mov	w6, 1
-	strb	w6, [x24, #:lo12:.LANCHOR74]
-	ldr	w0, [x5, #:lo12:.LANCHOR145]
-	ldrh	w2, [x2, #:lo12:.LANCHOR2]
+	strb	w6, [x24, #:lo12:.LANCHOR71]
+	ldr	w0, [x5, #:lo12:.LANCHOR146]
+	ldrh	w2, [x2, #:lo12:.LANCHOR6]
 	add	w0, w0, 1
-	str	w0, [x5, #:lo12:.LANCHOR145]
+	str	w0, [x5, #:lo12:.LANCHOR146]
 	cmp	w0, w2, lsr 5
-	bls	.L3150
-	ldrh	w0, [x1, #:lo12:.LANCHOR90]
+	bls	.L3254
+	ldrh	w0, [x1, #:lo12:.LANCHOR87]
 	cmp	w0, w22
-	bls	.L3150
+	bls	.L3254
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3149
-	adrp	x1, .LANCHOR5
+	beq	.L3253
+	adrp	x1, .LANCHOR9
 	ubfiz	x0, x0, 1, 16
-	adrp	x2, .LANCHOR76
-	ldr	x1, [x1, #:lo12:.LANCHOR5]
-	ldrb	w2, [x2, #:lo12:.LANCHOR76]
+	adrp	x2, .LANCHOR73
+	ldr	x1, [x1, #:lo12:.LANCHOR9]
+	ldrb	w2, [x2, #:lo12:.LANCHOR73]
 	ldrh	w1, [x1, x0]
-	adrp	x0, .LANCHOR83
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR80
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	bgt	.L3149
+	bgt	.L3253
 	mov	w0, w6
-	str	wzr, [x5, #:lo12:.LANCHOR145]
+	str	wzr, [x5, #:lo12:.LANCHOR146]
 	mov	w2, 4
 	mov	w1, 2
-.L3280:
+.L3384:
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-	cbz	w0, .L3149
-	b	.L3140
-.L3150:
-	adrp	x0, .LANCHOR91
-	ldrh	w1, [x1, #:lo12:.LANCHOR90]
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	cbz	w0, .L3253
+	b	.L3244
+.L3254:
+	adrp	x0, .LANCHOR88
+	ldrh	w1, [x1, #:lo12:.LANCHOR87]
+	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w1, w0
-	bcc	.L3152
+	bcc	.L3256
 	mov	w2, 1
 	mov	w1, 2
 	mov	w0, w2
-	b	.L3280
-.L3152:
-	ldrh	w0, [x28, #:lo12:.LANCHOR88]
-	cbnz	w0, .L3153
-	ldrh	w0, [x27, #:lo12:.LANCHOR86]
+	b	.L3384
+.L3256:
+	ldrh	w0, [x28, #:lo12:.LANCHOR85]
+	cbnz	w0, .L3257
+	ldrh	w0, [x27, #:lo12:.LANCHOR83]
 	cmp	w0, 8
-	bls	.L3146
-.L3153:
+	bls	.L3250
+.L3257:
 	mov	w1, 1
 	mov	w2, 4
 	mov	w0, w1
-	b	.L3280
-.L3142:
-	adrp	x0, .LANCHOR77
-	ldrh	w0, [x0, #:lo12:.LANCHOR77]
+	b	.L3384
+.L3246:
+	adrp	x0, .LANCHOR74
+	ldrh	w0, [x0, #:lo12:.LANCHOR74]
 	cmp	w0, w21
-	bcc	.L3226
-	b	.L3149
-.L3154:
-	adrp	x2, .LANCHOR77
+	bcc	.L3330
+	b	.L3253
+.L3258:
+	adrp	x2, .LANCHOR74
 	mov	x24, x2
-	ldrh	w4, [x2, #:lo12:.LANCHOR77]
+	ldrh	w4, [x2, #:lo12:.LANCHOR74]
 	cmp	w21, w4
-	bcs	.L3155
-	cbz	w22, .L3156
+	bcs	.L3259
+	cbz	w22, .L3260
 	cmp	w22, 16
-	bls	.L3157
-	adrp	x0, .LANCHOR90
-	ldrh	w2, [x0, #:lo12:.LANCHOR90]
-	adrp	x0, .LANCHOR91
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	bls	.L3261
+	adrp	x0, .LANCHOR87
+	ldrh	w2, [x0, #:lo12:.LANCHOR87]
+	adrp	x0, .LANCHOR88
+	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w2, w0
-	bhi	.L3157
+	bhi	.L3261
 	str	x3, [x29, 104]
 	mov	w2, 4
 	mov	w0, w1
 	bl	gc_search_src_blk
 	ldr	x3, [x29, 104]
 	tst	w0, 65535
-	bne	.L3158
-	ldrb	w0, [x3, #:lo12:.LANCHOR74]
+	bne	.L3262
+	ldrb	w0, [x3, #:lo12:.LANCHOR71]
 	mov	w2, 4
 	mov	w1, 3
-.L3282:
+.L3386:
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-.L3159:
-	cbnz	w0, .L3161
-	b	.L3121
-.L3158:
+.L3263:
+	cbnz	w0, .L3265
+	b	.L3225
+.L3262:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	and	w3, w0, 65535
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L3161
-	adrp	x4, .LANCHOR5
+	beq	.L3265
+	adrp	x4, .LANCHOR9
 	ubfiz	x3, x3, 1, 16
-	adrp	x1, .LANCHOR145
+	adrp	x1, .LANCHOR146
 	mov	x21, x1
-	ldr	x4, [x4, #:lo12:.LANCHOR5]
-	ldr	w2, [x1, #:lo12:.LANCHOR145]
+	ldr	x4, [x4, #:lo12:.LANCHOR9]
+	ldr	w2, [x1, #:lo12:.LANCHOR146]
 	add	w2, w2, 1
-	str	w2, [x1, #:lo12:.LANCHOR145]
+	str	w2, [x1, #:lo12:.LANCHOR146]
 	ldrh	w3, [x4, x3]
-	adrp	x4, .LANCHOR83
-	ldrh	w4, [x4, #:lo12:.LANCHOR83]
+	adrp	x4, .LANCHOR80
+	ldrh	w4, [x4, #:lo12:.LANCHOR80]
 	cmp	w4, w3
-	bcs	.L3162
-	adrp	x1, .LANCHOR2
-	ldrh	w1, [x1, #:lo12:.LANCHOR2]
+	bcs	.L3266
+	adrp	x1, .LANCHOR6
+	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	cmp	w2, w1, lsr 4
-	bls	.L3161
-	adrp	x1, .LANCHOR89
-	ldrh	w1, [x1, #:lo12:.LANCHOR89]
+	bls	.L3265
+	adrp	x1, .LANCHOR86
+	ldrh	w1, [x1, #:lo12:.LANCHOR86]
 	cmp	w1, w3
-	bls	.L3161
-.L3162:
-	ldrb	w2, [x23, #:lo12:.LANCHOR74]
+	bls	.L3265
+.L3266:
+	ldrb	w2, [x23, #:lo12:.LANCHOR71]
 	mov	w1, 0
 	bl	gc_add_sblk
-	str	wzr, [x21, #:lo12:.LANCHOR145]
-	adrp	x0, .LANCHOR119
+	str	wzr, [x21, #:lo12:.LANCHOR146]
+	adrp	x0, .LANCHOR116
 	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR119]
-.L3161:
+	str	w1, [x0, #:lo12:.LANCHOR116]
+.L3265:
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR144]
-	b	.L3121
-.L3157:
+	strb	w0, [x19, #:lo12:.LANCHOR145]
+	b	.L3225
+.L3261:
 	mov	w2, 1
 	mov	w0, w2
 	mov	w1, 2
-.L3289:
+.L3393:
 	bl	gc_search_src_blk
 	tst	w0, 65535
-	bne	.L3161
+	bne	.L3265
 	mov	w2, 2
-.L3285:
+.L3389:
 	mov	w1, 3
-	ldrb	w0, [x23, #:lo12:.LANCHOR74]
-	b	.L3282
-.L3156:
-	adrp	x1, .LANCHOR9
-	strb	wzr, [x3, #:lo12:.LANCHOR74]
-	ldr	w1, [x1, #:lo12:.LANCHOR9]
-	tbz	x1, 8, .L3164
+	ldrb	w0, [x23, #:lo12:.LANCHOR71]
+	b	.L3386
+.L3260:
+	adrp	x1, .LANCHOR14
+	strb	wzr, [x3, #:lo12:.LANCHOR71]
+	ldr	w1, [x1, #:lo12:.LANCHOR14]
+	tbz	x1, 8, .L3268
 	ldrh	w7, [x0, 122]
 	mov	w5, 0
 	ldrh	w6, [x0, 120]
 	mov	w4, 0
-	adrp	x0, .LC211
+	adrp	x0, .LC212
 	mov	w3, w21
 	mov	w2, 0
 	mov	w1, 1976
-	add	x0, x0, :lo12:.LC211
+	add	x0, x0, :lo12:.LC212
 	bl	printf
-.L3164:
+.L3268:
 	cmp	w21, 16
-	bls	.L3165
+	bls	.L3269
 	mov	w2, 4
-	b	.L3285
-.L3165:
+	b	.L3389
+.L3269:
 	mov	w2, 1
-	ldrb	w0, [x23, #:lo12:.LANCHOR74]
+	ldrb	w0, [x23, #:lo12:.LANCHOR71]
 	mov	w1, w2
-	b	.L3289
-.L3155:
+	b	.L3393
+.L3259:
 	cmp	w26, 1
-	bne	.L3121
+	bne	.L3225
 	cmp	w21, w4, lsl 1
-	bge	.L3166
+	bge	.L3270
 	cmp	w25, w22, lsr 1
-	bcs	.L3167
-	adrp	x0, .LANCHOR90
-	ldrh	w1, [x0, #:lo12:.LANCHOR90]
-	adrp	x0, .LANCHOR91
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
-	cmp	w1, w0
-	bcs	.L3167
+	bcs	.L3271
 	adrp	x0, .LANCHOR87
-	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	ldrh	w1, [x0, #:lo12:.LANCHOR87]
+	adrp	x0, .LANCHOR88
+	ldrh	w0, [x0, #:lo12:.LANCHOR88]
+	cmp	w1, w0
+	bcs	.L3271
+	adrp	x0, .LANCHOR84
+	ldrh	w0, [x0, #:lo12:.LANCHOR84]
 	lsr	w0, w0, 2
-	strh	w0, [x2, #:lo12:.LANCHOR77]
-	b	.L3121
-.L3167:
+	strh	w0, [x2, #:lo12:.LANCHOR74]
+	b	.L3225
+.L3271:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
@@ -19976,55 +20404,55 @@ zftl_do_gc:
 	mov	w1, 65535
 	mov	w3, w26
 	cmp	w26, w1
-	bne	.L3168
-.L3173:
+	bne	.L3272
+.L3277:
 	cmp	w22, 1
-	bhi	.L3169
-.L3170:
+	bhi	.L3273
+.L3274:
 	cmp	w21, w25
-	adrp	x21, .LANCHOR87
-	bcs	.L3177
-	strb	wzr, [x23, #:lo12:.LANCHOR74]
+	adrp	x21, .LANCHOR84
+	bcs	.L3281
+	strb	wzr, [x23, #:lo12:.LANCHOR71]
 	mov	w0, 4
-	bl	zftl_get_gc_node.part.10
+	bl	zftl_get_gc_node.part.9
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3177
-	adrp	x1, .LANCHOR5
+	beq	.L3281
+	adrp	x1, .LANCHOR9
 	ubfiz	x0, x0, 1, 16
-	adrp	x2, .LANCHOR76
-	ldr	x1, [x1, #:lo12:.LANCHOR5]
-	ldrb	w2, [x2, #:lo12:.LANCHOR76]
+	adrp	x2, .LANCHOR73
+	ldr	x1, [x1, #:lo12:.LANCHOR9]
+	ldrb	w2, [x2, #:lo12:.LANCHOR73]
 	ldrh	w1, [x1, x0]
-	adrp	x0, .LANCHOR83
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR80
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	mul	w0, w0, w2
 	cmp	w1, w0, lsr 1
-	ble	.L3179
-.L3177:
-	ldrh	w0, [x21, #:lo12:.LANCHOR87]
+	ble	.L3283
+.L3281:
+	ldrh	w0, [x21, #:lo12:.LANCHOR84]
 	lsr	w0, w0, 2
-	strh	w0, [x24, #:lo12:.LANCHOR77]
-	b	.L3121
-.L3168:
-	adrp	x2, .LANCHOR145
-	adrp	x4, .LANCHOR2
+	strh	w0, [x24, #:lo12:.LANCHOR74]
+	b	.L3225
+.L3272:
+	adrp	x2, .LANCHOR146
+	adrp	x4, .LANCHOR6
 	uxtw	x26, w26
-	ldr	w1, [x2, #:lo12:.LANCHOR145]
-	ldrh	w4, [x4, #:lo12:.LANCHOR2]
+	ldr	w1, [x2, #:lo12:.LANCHOR146]
+	ldrh	w4, [x4, #:lo12:.LANCHOR6]
 	add	w1, w1, 1
-	str	w1, [x2, #:lo12:.LANCHOR145]
+	str	w1, [x2, #:lo12:.LANCHOR146]
 	cmp	w1, w4, lsr 4
-	adrp	x4, .LANCHOR5
-	bls	.L3171
-	ldr	x1, [x4, #:lo12:.LANCHOR5]
-	str	wzr, [x2, #:lo12:.LANCHOR145]
+	adrp	x4, .LANCHOR9
+	bls	.L3275
+	ldr	x1, [x4, #:lo12:.LANCHOR9]
+	str	wzr, [x2, #:lo12:.LANCHOR146]
 	ldrh	w2, [x1, x26, lsl 1]
-	adrp	x1, .LANCHOR89
-	ldrh	w1, [x1, #:lo12:.LANCHOR89]
+	adrp	x1, .LANCHOR86
+	ldrh	w1, [x1, #:lo12:.LANCHOR86]
 	cmp	w2, w1
-	bcs	.L3171
+	bcs	.L3275
 	str	x4, [x29, 96]
 	mov	w2, 1
 	str	w3, [x29, 104]
@@ -20032,398 +20460,398 @@ zftl_do_gc:
 	bl	gc_add_sblk
 	ldr	w3, [x29, 104]
 	ldr	x4, [x29, 96]
-	cbnz	w0, .L3161
-.L3171:
-	ldr	x0, [x4, #:lo12:.LANCHOR5]
+	cbnz	w0, .L3265
+.L3275:
+	ldr	x0, [x4, #:lo12:.LANCHOR9]
 	ldrh	w1, [x0, x26, lsl 1]
-	adrp	x0, .LANCHOR83
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR80
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w1, w0, lsr 1
-	bhi	.L3172
+	bhi	.L3276
 	mov	w2, 0
 	mov	w1, 1
 	mov	w0, w3
 	bl	gc_add_sblk
-	b	.L3161
-.L3172:
-	ldrh	w2, [x27, #:lo12:.LANCHOR86]
-	ldrh	w0, [x28, #:lo12:.LANCHOR88]
+	b	.L3265
+.L3276:
+	ldrh	w2, [x27, #:lo12:.LANCHOR83]
+	ldrh	w0, [x28, #:lo12:.LANCHOR85]
 	add	w0, w0, w2
-	adrp	x2, .LANCHOR87
-	ldrh	w2, [x2, #:lo12:.LANCHOR87]
+	adrp	x2, .LANCHOR84
+	ldrh	w2, [x2, #:lo12:.LANCHOR84]
 	cmp	w0, w2, lsl 1
-	ble	.L3173
-	adrp	x0, .LANCHOR89
-	ldrh	w0, [x0, #:lo12:.LANCHOR89]
+	ble	.L3277
+	adrp	x0, .LANCHOR86
+	ldrh	w0, [x0, #:lo12:.LANCHOR86]
 	cmp	w0, w1
-	bcc	.L3170
-	b	.L3173
-.L3169:
+	bcc	.L3274
+	b	.L3277
+.L3273:
 	mov	w1, 1
-	strb	w1, [x23, #:lo12:.LANCHOR74]
+	strb	w1, [x23, #:lo12:.LANCHOR71]
 	cmp	w22, 16
-	bls	.L3174
-	adrp	x0, .LANCHOR90
-	ldrh	w2, [x0, #:lo12:.LANCHOR90]
-	adrp	x0, .LANCHOR91
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	bls	.L3278
+	adrp	x0, .LANCHOR87
+	ldrh	w2, [x0, #:lo12:.LANCHOR87]
+	adrp	x0, .LANCHOR88
+	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w2, w0
-	bhi	.L3174
+	bhi	.L3278
 	mov	w2, 4
 	mov	w0, w1
 	bl	gc_search_src_blk
 	ands	w0, w0, 65535
-	bne	.L3175
+	bne	.L3279
 	mov	w2, 4
-.L3281:
-	ldrb	w0, [x23, #:lo12:.LANCHOR74]
+.L3385:
+	ldrb	w0, [x23, #:lo12:.LANCHOR71]
 	mov	w1, 3
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-.L3175:
-	adrp	x1, .LANCHOR87
+.L3279:
+	adrp	x1, .LANCHOR84
 	cmp	w21, w25, lsr 1
-	ldrh	w1, [x1, #:lo12:.LANCHOR87]
-	bls	.L3283
+	ldrh	w1, [x1, #:lo12:.LANCHOR84]
+	bls	.L3387
 	lsr	w1, w1, 2
-.L3284:
-	strh	w1, [x24, #:lo12:.LANCHOR77]
-	b	.L3159
-.L3174:
+.L3388:
+	strh	w1, [x24, #:lo12:.LANCHOR74]
+	b	.L3263
+.L3278:
 	mov	w2, 1
 	mov	w1, 2
 	mov	w0, w2
 	bl	gc_search_src_blk
 	ands	w0, w0, 65535
-	bne	.L3175
+	bne	.L3279
 	mov	w2, 2
-	b	.L3281
-.L3179:
+	b	.L3385
+.L3283:
 	mov	w1, 3
 	mov	w2, 4
 	mov	w0, 0
 	bl	gc_search_src_blk
-	ldrh	w1, [x21, #:lo12:.LANCHOR87]
+	ldrh	w1, [x21, #:lo12:.LANCHOR84]
 	and	w0, w0, 65535
-.L3283:
+.L3387:
 	lsr	w1, w1, 1
-	b	.L3284
-.L3166:
-	adrp	x0, .LANCHOR87
+	b	.L3388
+.L3270:
+	adrp	x0, .LANCHOR84
 	mov	w20, 0
-	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	ldrh	w0, [x0, #:lo12:.LANCHOR84]
 	lsr	w0, w0, 2
-	strh	w0, [x2, #:lo12:.LANCHOR77]
-	b	.L3121
-.L3125:
-	adrp	x7, .LANCHOR65
+	strh	w0, [x2, #:lo12:.LANCHOR74]
+	b	.L3225
+.L3229:
+	adrp	x7, .LANCHOR62
 	mov	w0, 65535
-	ldrh	w1, [x7, #:lo12:.LANCHOR65]
+	ldrh	w1, [x7, #:lo12:.LANCHOR62]
 	cmp	w1, w0
-	bne	.L3180
+	bne	.L3284
 	bl	gc_get_src_blk
-	strh	w0, [x7, #:lo12:.LANCHOR65]
-.L3180:
-	ldrh	w3, [x7, #:lo12:.LANCHOR65]
+	strh	w0, [x7, #:lo12:.LANCHOR62]
+.L3284:
+	ldrh	w3, [x7, #:lo12:.LANCHOR62]
 	mov	w0, 65535
-	add	x1, x7, :lo12:.LANCHOR65
+	add	x1, x7, :lo12:.LANCHOR62
 	cmp	w3, w0
-	beq	.L3291
-	adrp	x0, .LANCHOR3
+	beq	.L3395
+	adrp	x0, .LANCHOR7
 	ldrh	w5, [x1, 56]
 	uxtw	x4, w3
-	ldr	x2, [x0, #:lo12:.LANCHOR3]
+	ldr	x2, [x0, #:lo12:.LANCHOR7]
 	add	x2, x2, x4, lsl 2
-	cbz	w5, .L3182
+	cbz	w5, .L3286
 	add	x1, x1, 58
 	mov	w0, 0
-.L3184:
+.L3288:
 	ldrh	w6, [x1], 2
 	cmp	w6, w3
-	bne	.L3183
-.L3188:
-	adrp	x0, .LANCHOR65
+	bne	.L3287
+.L3292:
+	adrp	x0, .LANCHOR62
 	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR65]
-	b	.L3226
-.L3183:
+	strh	w1, [x0, #:lo12:.LANCHOR62]
+	b	.L3330
+.L3287:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w5, w0
-	bne	.L3184
-.L3182:
+	bne	.L3288
+.L3286:
 	ldrb	w0, [x2, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L3185
+	beq	.L3289
 	tst	w0, 192
-	bne	.L3186
-.L3185:
-	adrp	x0, .LANCHOR5
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	bne	.L3290
+.L3289:
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, x4, lsl 1]
-	cbz	w0, .L3188
+	cbz	w0, .L3292
 	mov	w2, 2209
-	adrp	x1, .LANCHOR211
+	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR211
+	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3188
-.L3186:
-	mov	w0, 2
 	b	.L3292
-.L3126:
+.L3290:
+	mov	w0, 2
+	b	.L3396
+.L3230:
 	bl	gc_scan_src_blk
 	cmn	w0, #1
-	bne	.L3189
+	bne	.L3293
 	mov	w0, 3
-	b	.L3292
-.L3189:
-	adrp	x20, .LANCHOR65
+	b	.L3396
+.L3293:
+	adrp	x20, .LANCHOR62
 	mov	w2, 65535
-	add	x0, x20, :lo12:.LANCHOR65
-	ldrh	w1, [x20, #:lo12:.LANCHOR65]
+	add	x0, x20, :lo12:.LANCHOR62
+	ldrh	w1, [x20, #:lo12:.LANCHOR62]
 	cmp	w1, w2
-	beq	.L3140
+	beq	.L3244
 	ldrh	w2, [x0, 24]
-	cbz	w2, .L3190
+	cbz	w2, .L3294
 	mov	w1, 4
 	strh	wzr, [x0, 26]
-	strb	w1, [x19, #:lo12:.LANCHOR144]
-	b	.L3226
-.L3190:
+	strb	w1, [x19, #:lo12:.LANCHOR145]
+	b	.L3330
+.L3294:
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR144]
-	adrp	x0, .LANCHOR5
+	strb	w0, [x19, #:lo12:.LANCHOR145]
+	adrp	x0, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	mov	x19, x0
-	ldr	x2, [x0, #:lo12:.LANCHOR5]
+	ldr	x2, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L3191
-	adrp	x1, .LANCHOR211
+	cbz	w1, .L3295
+	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
 	mov	w2, 2237
-	add	x1, x1, :lo12:.LANCHOR211
+	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3191:
-	ldrh	w0, [x20, #:lo12:.LANCHOR65]
-	add	x21, x20, :lo12:.LANCHOR65
+.L3295:
+	ldrh	w0, [x20, #:lo12:.LANCHOR62]
+	add	x21, x20, :lo12:.LANCHOR62
 	bl	ftl_free_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR5]
-	ldrh	w1, [x20, #:lo12:.LANCHOR65]
+	ldr	x0, [x19, #:lo12:.LANCHOR9]
+	ldrh	w1, [x20, #:lo12:.LANCHOR62]
 	strh	wzr, [x0, x1, lsl 1]
 	ldrh	w0, [x21, 30]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w0, 8
-	bhi	.L3192
+	bhi	.L3296
 	strh	w0, [x21, 30]
-	b	.L3188
-.L3192:
+	b	.L3292
+.L3296:
 	strh	wzr, [x21, 30]
 	bl	ftl_flush
 	bl	pm_flush
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L3188
-.L3127:
-	adrp	x20, .LANCHOR65
-	adrp	x23, .LANCHOR83
-	add	x22, x20, :lo12:.LANCHOR65
-	add	x23, x23, :lo12:.LANCHOR83
-.L3261:
+	b	.L3292
+.L3231:
+	adrp	x20, .LANCHOR62
+	adrp	x23, .LANCHOR80
+	add	x22, x20, :lo12:.LANCHOR62
+	add	x23, x23, :lo12:.LANCHOR80
+.L3365:
 	bl	gc_scan_src_blk_one_page
 	ldrh	w1, [x22, 2]
 	ldrh	w0, [x23]
 	cmp	w1, w0
-	bcs	.L3194
+	bcs	.L3298
 	cmp	w21, 7
-	bls	.L3261
-	b	.L3226
-.L3194:
+	bls	.L3365
+	b	.L3330
+.L3298:
 	ldrh	w3, [x22, 24]
-	adrp	x0, .LANCHOR9
-	cbz	w3, .L3195
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	adrp	x0, .LANCHOR14
+	cbz	w3, .L3299
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	mov	w1, 4
 	strh	wzr, [x22, 26]
-	strb	w1, [x19, #:lo12:.LANCHOR144]
-	adrp	x19, .LANCHOR5
-	tbz	x0, 8, .L3196
+	strb	w1, [x19, #:lo12:.LANCHOR145]
+	adrp	x19, .LANCHOR9
+	tbz	x0, 8, .L3300
 	ldrh	w1, [x22]
-	ldr	x2, [x19, #:lo12:.LANCHOR5]
+	ldr	x2, [x19, #:lo12:.LANCHOR9]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC212
-	add	x0, x0, :lo12:.LC212
+	adrp	x0, .LC213
+	add	x0, x0, :lo12:.LC213
 	bl	printf
-.L3196:
-	ldrh	w2, [x20, #:lo12:.LANCHOR65]
-	add	x0, x20, :lo12:.LANCHOR65
-	ldr	x1, [x19, #:lo12:.LANCHOR5]
+.L3300:
+	ldrh	w2, [x20, #:lo12:.LANCHOR62]
+	add	x0, x20, :lo12:.LANCHOR62
+	ldr	x1, [x19, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, 24]
 	ldrh	w1, [x1, x2, lsl 1]
 	cmp	w1, w0
-	beq	.L3197
-	adrp	x1, .LANCHOR211
+	beq	.L3301
+	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
 	mov	w2, 2271
-	add	x1, x1, :lo12:.LANCHOR211
+	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3197:
-	add	x0, x20, :lo12:.LANCHOR65
-	ldrh	w1, [x20, #:lo12:.LANCHOR65]
+.L3301:
+	add	x0, x20, :lo12:.LANCHOR62
+	ldrh	w1, [x20, #:lo12:.LANCHOR62]
 	ldrh	w2, [x0, 24]
-	ldr	x0, [x19, #:lo12:.LANCHOR5]
+	ldr	x0, [x19, #:lo12:.LANCHOR9]
 	strh	w2, [x0, x1, lsl 1]
-	b	.L3226
-.L3195:
-	adrp	x2, .LANCHOR3
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	b	.L3330
+.L3299:
+	adrp	x2, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	ldrh	w1, [x22]
-	ldr	x21, [x2, #:lo12:.LANCHOR3]
+	ldr	x21, [x2, #:lo12:.LANCHOR7]
 	mov	w2, 1
-	strb	w2, [x19, #:lo12:.LANCHOR144]
+	strb	w2, [x19, #:lo12:.LANCHOR145]
 	add	x21, x21, x1, uxth 2
-	tbz	x0, 8, .L3198
+	tbz	x0, 8, .L3302
 	ldrb	w2, [x21, 2]
-	adrp	x0, .LC213
-	add	x0, x0, :lo12:.LC213
+	adrp	x0, .LC214
+	add	x0, x0, :lo12:.LC214
 	ubfx	x2, x2, 5, 3
 	bl	printf
-.L3198:
+.L3302:
 	ldrb	w0, [x21, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L3199
+	beq	.L3303
 	tst	w0, 192
-	bne	.L3200
-.L3199:
-	adrp	x1, .LANCHOR211
+	bne	.L3304
+.L3303:
+	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
 	mov	w2, 2281
-	add	x1, x1, :lo12:.LANCHOR211
+	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3200:
-	ldrh	w0, [x20, #:lo12:.LANCHOR65]
-	add	x19, x20, :lo12:.LANCHOR65
+.L3304:
+	ldrh	w0, [x20, #:lo12:.LANCHOR62]
+	add	x19, x20, :lo12:.LANCHOR62
 	bl	ftl_free_sblk
 	mov	w0, -1
-	strh	w0, [x20, #:lo12:.LANCHOR65]
+	strh	w0, [x20, #:lo12:.LANCHOR62]
 	ldrh	w0, [x19, 30]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w0, 8
-	bhi	.L3201
+	bhi	.L3305
 	strh	w0, [x19, 30]
-	b	.L3226
-.L3201:
+	b	.L3330
+.L3305:
 	strh	wzr, [x19, 30]
-.L3290:
+.L3394:
 	bl	flt_sys_flush
-	b	.L3226
-.L3128:
+	b	.L3330
+.L3232:
 	ldrh	w1, [x24, 80]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L3202
-	adrp	x0, .LANCHOR74
-	ldrb	w22, [x0, #:lo12:.LANCHOR74]
+	bne	.L3306
+	adrp	x0, .LANCHOR71
+	ldrb	w22, [x0, #:lo12:.LANCHOR71]
 	cmp	w22, 1
-	bne	.L3202
+	bne	.L3306
 	bl	ftl_flush
-	adrp	x0, .LANCHOR65
-	add	x1, x0, :lo12:.LANCHOR65
+	adrp	x0, .LANCHOR62
+	add	x1, x0, :lo12:.LANCHOR62
 	mov	x20, x0
 	ldrh	w1, [x1, 318]
-	cbz	w1, .L3203
+	cbz	w1, .L3307
 	mov	w0, w22
 	mov	w1, 5
-.L3287:
+.L3391:
 	bl	zftl_gc_get_free_sblk
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L3205
-	adrp	x0, .LANCHOR3
-	ldr	x21, [x0, #:lo12:.LANCHOR3]
+	beq	.L3309
+	adrp	x0, .LANCHOR7
+	ldr	x21, [x0, #:lo12:.LANCHOR7]
 	add	x21, x21, x19, uxth 2
 	ldrb	w0, [x21, 2]
 	tst	w0, 224
-	beq	.L3206
-	adrp	x1, .LANCHOR211
+	beq	.L3310
+	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
 	mov	w2, 2310
-	add	x1, x1, :lo12:.LANCHOR211
+	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3206:
+.L3310:
 	ldrb	w0, [x21, 2]
 	mov	w1, 5
 	bfi	w0, w1, 5, 3
 	orr	w0, w0, 16
 	strb	w0, [x21, 2]
-.L3225:
+.L3329:
 	mov	w1, 1
 	mov	w0, w19
 	bl	ftl_erase_sblk
-	adrp	x22, .LANCHOR75
+	adrp	x22, .LANCHOR72
 	mov	w0, 5
 	strb	w0, [x24, 84]
 	add	x1, x24, 96
 	mov	w0, w19
 	bl	ftl_get_blk_list_in_sblk
 	and	w0, w0, 255
-	adrp	x1, .LANCHOR83
-	adrp	x21, .LANCHOR76
+	adrp	x1, .LANCHOR80
+	adrp	x21, .LANCHOR73
 	strb	w0, [x24, 89]
-	ldrh	w1, [x1, #:lo12:.LANCHOR83]
-	ldrh	w2, [x22, #:lo12:.LANCHOR75]
+	ldrh	w1, [x1, #:lo12:.LANCHOR80]
+	ldrh	w2, [x22, #:lo12:.LANCHOR72]
 	strh	w19, [x24, 80]
 	strh	wzr, [x24, 82]
 	mul	w0, w0, w1
 	strb	wzr, [x24, 85]
 	strh	w0, [x24, 86]
 	mov	w1, 255
-	ldrb	w0, [x21, #:lo12:.LANCHOR76]
+	ldrb	w0, [x21, #:lo12:.LANCHOR73]
 	strh	wzr, [x24, 90]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR146
-	ldr	x0, [x0, #:lo12:.LANCHOR146]
+	adrp	x0, .LANCHOR147
+	ldr	x0, [x0, #:lo12:.LANCHOR147]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	ldrb	w0, [x21, #:lo12:.LANCHOR76]
+	ldrb	w0, [x21, #:lo12:.LANCHOR73]
 	mov	w1, 255
-	ldrh	w2, [x22, #:lo12:.LANCHOR75]
+	ldrh	w2, [x22, #:lo12:.LANCHOR72]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR147
-	ldr	x0, [x0, #:lo12:.LANCHOR147]
+	adrp	x0, .LANCHOR148
+	ldr	x0, [x0, #:lo12:.LANCHOR148]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	ldrb	w0, [x21, #:lo12:.LANCHOR76]
+	ldrb	w0, [x21, #:lo12:.LANCHOR73]
 	mov	w1, 255
-	ldrh	w2, [x22, #:lo12:.LANCHOR75]
+	ldrh	w2, [x22, #:lo12:.LANCHOR72]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR72
-	ldr	x0, [x0, #:lo12:.LANCHOR72]
+	adrp	x0, .LANCHOR69
+	ldr	x0, [x0, #:lo12:.LANCHOR69]
 	bl	ftl_memset
-	ldr	x0, [x23, #:lo12:.LANCHOR6]
+	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	mov	w1, -1
 	str	w19, [x0, 132]
 	strh	w1, [x0, 128]
 	strh	w1, [x0, 130]
 	bl	pm_flush
 	bl	ftl_ext_info_flush
-	adrp	x0, .LANCHOR100
+	adrp	x0, .LANCHOR97
 	mov	w1, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR100]
+	ldr	x0, [x0, #:lo12:.LANCHOR97]
 	strh	w19, [x0, 126]
-	add	x0, x20, :lo12:.LANCHOR65
+	add	x0, x20, :lo12:.LANCHOR62
 	str	w1, [x0, 324]
 	strh	wzr, [x0, 314]
 	strh	wzr, [x0, 56]
@@ -20431,118 +20859,118 @@ zftl_do_gc:
 	strh	wzr, [x0, 320]
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L3226
-.L3203:
+	b	.L3330
+.L3307:
 	mov	w1, 5
 	mov	w0, 0
-	b	.L3287
-.L3202:
+	b	.L3391
+.L3306:
 	cmp	w26, 1
 	mov	w22, 4
 	csinc	w22, w22, wzr, eq
 	cmp	w21, 15
 	mov	w0, w22
 	add	w22, w22, 4
-	adrp	x25, .LANCHOR74
-	adrp	x21, .LANCHOR65
+	adrp	x25, .LANCHOR71
+	adrp	x21, .LANCHOR62
 	csel	w22, w22, w0, ls
-	add	x25, x25, :lo12:.LANCHOR74
-	add	x20, x21, :lo12:.LANCHOR65
+	add	x25, x25, :lo12:.LANCHOR71
+	add	x20, x21, :lo12:.LANCHOR62
 	add	x26, x24, 80
-.L3209:
+.L3313:
 	sub	w22, w22, #1
 	and	w22, w22, 255
 	cmp	w22, 255
-	beq	.L3226
+	beq	.L3330
 	bl	gc_do_copy_back
 	ldrb	w0, [x25]
-	cbnz	w0, .L3210
-	adrp	x0, .LANCHOR50
-	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	cbnz	w0, .L3314
+	adrp	x0, .LANCHOR51
+	ldrb	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, 3
-	bhi	.L3211
+	bhi	.L3315
 	bl	ftl_write_commit
-.L3211:
+.L3315:
 	ldrh	w1, [x20, 26]
 	ldrh	w0, [x20, 24]
 	cmp	w1, w0
-	bcc	.L3209
+	bcc	.L3313
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR144]
+	strb	w0, [x19, #:lo12:.LANCHOR145]
 	bl	ftl_write_commit
 	bl	ftl_flush
-	adrp	x0, .LANCHOR5
+	adrp	x0, .LANCHOR9
 	ldrh	w2, [x20]
 	mov	x19, x0
-	ldr	x1, [x0, #:lo12:.LANCHOR5]
+	ldr	x1, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x1, x2, lsl 1]
-	cbz	w1, .L3213
-	adrp	x1, .LANCHOR211
+	cbz	w1, .L3317
+	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
 	mov	w2, 2385
-	add	x1, x1, :lo12:.LANCHOR211
+	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3213:
-	ldrh	w0, [x21, #:lo12:.LANCHOR65]
-	ldr	x2, [x19, #:lo12:.LANCHOR5]
+.L3317:
+	ldrh	w0, [x21, #:lo12:.LANCHOR62]
+	ldr	x2, [x19, #:lo12:.LANCHOR9]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L3214
+	cbnz	w1, .L3318
 	bl	ftl_free_sblk
-	b	.L3188
-.L3214:
+	b	.L3292
+.L3318:
 	mov	w2, 1
 	mov	w1, 0
 	bl	gc_add_sblk
-	b	.L3188
-.L3210:
+	b	.L3292
+.L3314:
 	ldrh	w0, [x20, 320]
-	cbz	w0, .L3215
+	cbz	w0, .L3319
 	ldr	w0, [x20, 324]
 	strh	wzr, [x20, 320]
 	cmn	w0, #1
-	beq	.L3216
+	beq	.L3320
 	bl	ftl_mask_bad_block
-.L3216:
-	ldr	x0, [x23, #:lo12:.LANCHOR6]
-	add	x20, x21, :lo12:.LANCHOR65
+.L3320:
+	ldr	x0, [x23, #:lo12:.LANCHOR10]
+	add	x20, x21, :lo12:.LANCHOR62
 	strh	wzr, [x20, 56]
 	ldrh	w0, [x0, 80]
 	str	wzr, [x20, 324]
 	bl	ftl_free_sblk
-	adrp	x2, .LANCHOR100
-	ldr	x1, [x23, #:lo12:.LANCHOR6]
+	adrp	x2, .LANCHOR97
+	ldr	x1, [x23, #:lo12:.LANCHOR10]
 	mov	w0, -1
-	ldr	x2, [x2, #:lo12:.LANCHOR100]
+	ldr	x2, [x2, #:lo12:.LANCHOR97]
 	strh	w0, [x1, 80]
 	strh	w0, [x2, 126]
 	strh	w0, [x1, 130]
 	ldr	x0, [x20, 8]
-	cbz	x0, .L3217
+	cbz	x0, .L3321
 	bl	buf_free
-.L3217:
-	add	x21, x21, :lo12:.LANCHOR65
+.L3321:
+	add	x21, x21, :lo12:.LANCHOR62
 	str	xzr, [x21, 8]
 	bl	flt_sys_flush
 	mov	w2, 2421
-	strb	wzr, [x19, #:lo12:.LANCHOR144]
-	adrp	x1, .LANCHOR211
+	strb	wzr, [x19, #:lo12:.LANCHOR145]
+	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR211
+	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3226
-.L3215:
+	b	.L3330
+.L3319:
 	ldrh	w0, [x26, 6]
 	ldrh	w1, [x20, 26]
 	cmp	w0, 1
 	ldrh	w0, [x20, 24]
-	bls	.L3218
+	bls	.L3322
 	cmp	w1, w0
-	bcc	.L3209
+	bcc	.L3313
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR144]
+	strb	w0, [x19, #:lo12:.LANCHOR145]
 	ldrh	w0, [x20, 56]
 	add	w1, w0, 1
 	strh	w1, [x20, 56]
@@ -20551,12 +20979,12 @@ zftl_do_gc:
 	strh	w1, [x0, 58]
 	mov	w0, -1
 	strh	w0, [x20]
-	b	.L3226
-.L3218:
+	b	.L3330
+.L3322:
 	mov	w2, 5
-	strb	w2, [x19, #:lo12:.LANCHOR144]
+	strb	w2, [x19, #:lo12:.LANCHOR145]
 	cmp	w1, w0
-	bcc	.L3219
+	bcc	.L3323
 	ldrh	w0, [x20, 56]
 	add	w1, w0, 1
 	strh	w1, [x20, 56]
@@ -20565,55 +20993,55 @@ zftl_do_gc:
 	strh	w1, [x0, 58]
 	mov	w0, -1
 	strh	w0, [x20]
-.L3219:
+.L3323:
 	bl	ftl_flush
 	bl	sblk_wait_write_queue_completed
 	bl	gc_write_completed
-	ldr	x0, [x23, #:lo12:.LANCHOR6]
+	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	ldrh	w1, [x24, 80]
 	strh	w1, [x0, 128]
 	bl	pm_flush
 	bl	ftl_ext_info_flush
-	add	x0, x21, :lo12:.LANCHOR65
-	adrp	x1, .LANCHOR83
-	adrp	x2, .LANCHOR71
-	ldrh	w1, [x1, #:lo12:.LANCHOR83]
-	ldrb	w2, [x2, #:lo12:.LANCHOR71]
+	add	x0, x21, :lo12:.LANCHOR62
+	adrp	x1, .LANCHOR80
+	adrp	x2, .LANCHOR68
+	ldrh	w1, [x1, #:lo12:.LANCHOR80]
+	ldrb	w2, [x2, #:lo12:.LANCHOR68]
 	strh	wzr, [x0, 16]
 	strh	w1, [x0, 18]
 	cmp	w2, 2
 	strh	w2, [x0, 20]
-	bne	.L3220
+	bne	.L3324
 	ubfiz	w1, w1, 1, 15
 	strh	w1, [x0, 18]
 	mov	w1, 1
 	strh	w1, [x0, 20]
-.L3220:
-	add	x21, x21, :lo12:.LANCHOR65
+.L3324:
+	add	x21, x21, :lo12:.LANCHOR62
 	strh	wzr, [x21, 22]
-	b	.L3226
-.L3222:
+	b	.L3330
+.L3326:
 	ldrh	w1, [x24, 16]
 	ldrh	w0, [x24, 18]
 	cmp	w1, w0
-	bcc	.L3223
+	bcc	.L3327
 	mov	w0, 6
-	strb	w0, [x19, #:lo12:.LANCHOR144]
+	strb	w0, [x19, #:lo12:.LANCHOR145]
 	ldr	x0, [x24, 8]
 	bl	buf_free
 	str	xzr, [x24, 8]
-	b	.L3226
-.L3223:
+	b	.L3330
+.L3327:
 	cmp	w21, 15
-	bls	.L3131
+	bls	.L3235
 	cmp	w26, 1
-	bne	.L3226
+	bne	.L3330
 	add	w22, w22, 1
 	and	w22, w22, 255
 	cmp	w22, 4
-	bls	.L3131
-	b	.L3226
-.L3130:
+	bls	.L3235
+	b	.L3330
+.L3234:
 	bl	gc_update_l2p_map_new
 	mov	w20, -1
 	bl	gc_free_src_blk
@@ -20621,22 +21049,22 @@ zftl_do_gc:
 	bl	pm_flush
 	strh	w20, [x24, 80]
 	bl	ftl_ext_info_flush
-	adrp	x0, .LANCHOR100
-	ldr	x0, [x0, #:lo12:.LANCHOR100]
+	adrp	x0, .LANCHOR97
+	ldr	x0, [x0, #:lo12:.LANCHOR97]
 	strh	w20, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L3291:
-	strb	wzr, [x19, #:lo12:.LANCHOR144]
-	b	.L3226
-.L3205:
+.L3395:
+	strb	wzr, [x19, #:lo12:.LANCHOR145]
+	b	.L3330
+.L3309:
 	mov	w2, 2316
-	adrp	x1, .LANCHOR211
+	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR211
+	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3225
+	b	.L3329
 	.size	zftl_do_gc, .-zftl_do_gc
 	.section	.text.zftl_write,"ax",@progbits
 	.align	2
@@ -20647,38 +21075,38 @@ zftl_write:
 	add	x29, sp, 0
 	stp	x27, x28, [sp, 80]
 	mov	w27, w0
-	adrp	x0, .LANCHOR9
+	adrp	x0, .LANCHOR14
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	mov	w19, w1
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	mov	w20, w2
 	stp	x21, x22, [sp, 32]
 	mov	x24, x3
 	stp	x25, x26, [sp, 64]
-	tbz	x0, 12, .L3294
+	tbz	x0, 12, .L3398
 	mov	w3, w2
-	adrp	x0, .LC214
+	adrp	x0, .LC215
 	mov	w2, w1
-	add	x0, x0, :lo12:.LC214
+	add	x0, x0, :lo12:.LC215
 	mov	w1, w27
 	bl	printf
-.L3294:
-	cbnz	w27, .L3295
-	adrp	x0, .LANCHOR61
+.L3398:
+	cbnz	w27, .L3399
+	adrp	x0, .LANCHOR58
 	mov	w27, 24576
-	ldr	w0, [x0, #:lo12:.LANCHOR61]
-.L3296:
+	ldr	w0, [x0, #:lo12:.LANCHOR58]
+.L3400:
 	add	w1, w19, w20
 	cmp	w0, w1
-	bcc	.L3310
-	adrp	x23, .LANCHOR123
+	bcc	.L3414
+	adrp	x23, .LANCHOR121
 	add	w27, w27, w19
 	sub	w19, w20, #1
-	adrp	x25, .LANCHOR100
-	ldrb	w0, [x23, #:lo12:.LANCHOR123]
+	adrp	x25, .LANCHOR97
+	ldrb	w0, [x23, #:lo12:.LANCHOR121]
 	add	w19, w19, w27
-	add	x23, x23, :lo12:.LANCHOR123
+	add	x23, x23, :lo12:.LANCHOR121
 	udiv	w22, w27, w0
 	udiv	w19, w19, w0
 	add	w0, w27, w20
@@ -20686,25 +21114,25 @@ zftl_write:
 	mov	w26, w22
 	sub	w21, w19, w22
 	add	w21, w21, 1
-.L3298:
-	cbnz	w21, .L3306
-	adrp	x20, .LANCHOR93
-	adrp	x19, .LANCHOR97
-	add	x20, x20, :lo12:.LANCHOR93
-	add	x19, x19, :lo12:.LANCHOR97
+.L3402:
+	cbnz	w21, .L3410
+	adrp	x20, .LANCHOR90
+	adrp	x19, .LANCHOR94
+	add	x20, x20, :lo12:.LANCHOR90
+	add	x19, x19, :lo12:.LANCHOR94
 	bl	ftl_write_commit
 	bl	ftl_flush
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
-.L3307:
+.L3411:
 	ldrh	w0, [x20]
 	ldrh	w1, [x19]
 	add	w0, w0, w1
 	cmp	w0, 7
-	ble	.L3308
+	ble	.L3412
 	mov	w0, 0
-.L3293:
+.L3397:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -20712,28 +21140,28 @@ zftl_write:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L3295:
+.L3399:
 	cmp	w27, 3
-	bhi	.L3310
+	bhi	.L3414
 	lsl	w27, w27, 13
 	mov	w0, 8192
-	b	.L3296
-.L3306:
+	b	.L3400
+.L3410:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbnz	x0, .L3299
+	cbnz	x0, .L3403
 	bl	ftl_write_commit
-	b	.L3298
-.L3299:
+	b	.L3402
+.L3403:
 	ldrb	w3, [x23]
 	cmp	w26, w22
 	strb	wzr, [x0, 57]
 	ccmp	w26, w19, 4, ne
 	strb	w3, [x0, 56]
-	bne	.L3302
+	bne	.L3406
 	cmp	w26, w22
-	bne	.L3303
+	bne	.L3407
 	udiv	w0, w27, w3
 	msub	w0, w0, w3, w27
 	and	w0, w0, 255
@@ -20742,9 +21170,9 @@ zftl_write:
 	and	w3, w3, 255
 	cmp	w20, w3
 	csel	w3, w20, w3, cc
-.L3315:
+.L3419:
 	strb	w3, [x28, 56]
-.L3302:
+.L3406:
 	ldr	x3, [x28, 8]
 	mov	x1, x24
 	ldrb	w0, [x28, 57]
@@ -20754,7 +21182,7 @@ zftl_write:
 	lsl	w2, w2, 9
 	add	x0, x3, x0
 	bl	ftl_memcpy
-	ldr	x1, [x25, #:lo12:.LANCHOR100]
+	ldr	x1, [x25, #:lo12:.LANCHOR97]
 	ldr	w0, [x1, 8]
 	str	w26, [x28, 36]
 	add	w26, w26, 1
@@ -20766,19 +21194,19 @@ zftl_write:
 	ldrb	w0, [x28, 56]
 	ubfiz	x0, x0, 9, 8
 	add	x24, x24, x0
-	b	.L3298
-.L3303:
+	b	.L3402
+.L3407:
 	ldr	w0, [x29, 108]
 	msub	w3, w3, w26, w0
-	b	.L3315
-.L3308:
+	b	.L3419
+.L3412:
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
-	b	.L3307
-.L3310:
+	b	.L3411
+.L3414:
 	mov	w0, -1
-	b	.L3293
+	b	.L3397
 	.size	zftl_write, .-zftl_write
 	.section	.text.zftl_vendor_write,"ax",@progbits
 	.align	2
@@ -20837,12 +21265,12 @@ ftl_write:
 	mov	x20, x3
 	mov	w22, w1
 	ands	w21, w0, 255
-	bne	.L3321
+	bne	.L3425
 	mov	w3, w2
 	mov	w0, 0
 	mov	x2, x20
 	bl	idb_write_data
-.L3321:
+.L3425:
 	mov	x3, x20
 	mov	w2, w19
 	mov	w1, w22
@@ -20858,46 +21286,46 @@ ftl_write:
 	.type	zftl_discard, %function
 zftl_discard:
 	stp	x29, x30, [sp, -128]!
-	adrp	x2, .LANCHOR61
+	adrp	x2, .LANCHOR58
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w19, w1
-	ldr	w2, [x2, #:lo12:.LANCHOR61]
+	ldr	w2, [x2, #:lo12:.LANCHOR58]
 	add	w1, w0, w1
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	cmp	w2, w1
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	bcc	.L3344
-	adrp	x24, .LANCHOR212
+	bcc	.L3448
+	adrp	x24, .LANCHOR216
 	add	w22, w0, 24576
-	adrp	x0, .LANCHOR9
+	adrp	x0, .LANCHOR14
 	str	x0, [x29, 104]
-	ldr	w1, [x24, #:lo12:.LANCHOR212]
-	ldr	w2, [x0, #:lo12:.LANCHOR9]
+	ldr	w1, [x24, #:lo12:.LANCHOR216]
+	ldr	w2, [x0, #:lo12:.LANCHOR14]
 	add	w1, w19, w1
-	str	w1, [x24, #:lo12:.LANCHOR212]
-	tbz	x2, 12, .L3325
-	adrp	x0, .LC215
+	str	w1, [x24, #:lo12:.LANCHOR216]
+	tbz	x2, 12, .L3429
+	adrp	x0, .LC216
 	mov	w4, 0
 	mov	w3, w19
 	mov	w2, w22
-	add	x0, x0, :lo12:.LC215
+	add	x0, x0, :lo12:.LC216
 	bl	printf
-.L3325:
-	adrp	x23, .LANCHOR100
-	adrp	x26, .LANCHOR123
-	ldr	x0, [x23, #:lo12:.LANCHOR100]
+.L3429:
+	adrp	x23, .LANCHOR97
+	adrp	x26, .LANCHOR121
+	ldr	x0, [x23, #:lo12:.LANCHOR97]
 	ldr	w27, [x0, 8]
 	add	w1, w27, 1
 	str	w1, [x0, 8]
 	bl	ftl_write_commit
 	bl	ftl_flush
-	ldrb	w21, [x26, #:lo12:.LANCHOR123]
+	ldrb	w21, [x26, #:lo12:.LANCHOR121]
 	udiv	w20, w22, w21
 	msub	w25, w20, w21, w22
-	cbz	w25, .L3326
+	cbz	w25, .L3430
 	sub	w21, w21, w25
 	mov	w0, w20
 	cmp	w21, w19
@@ -20905,20 +21333,20 @@ zftl_discard:
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	bne	.L3327
+	bne	.L3431
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
-.L3327:
+.L3431:
 	ldr	w0, [x29, 120]
 	and	w28, w21, 65535
 	cmn	w0, #1
-	beq	.L3329
+	beq	.L3433
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x3, x0
-	cbz	x0, .L3329
+	cbz	x0, .L3433
 	strb	w25, [x0, 57]
 	ubfiz	x25, x25, 9, 25
 	strb	w21, [x0, 56]
@@ -20933,57 +21361,57 @@ zftl_discard:
 	mov	x0, x3
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-	ldr	x1, [x23, #:lo12:.LANCHOR100]
+	ldr	x1, [x23, #:lo12:.LANCHOR97]
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3329:
+.L3433:
 	add	w20, w20, 1
 	sub	w19, w19, w28
-.L3326:
-	cbz	w19, .L3331
+.L3430:
+	cbz	w19, .L3435
 	bl	ftl_flush
-.L3331:
-	adrp	x25, .LANCHOR102
-	add	x21, x26, :lo12:.LANCHOR123
-	add	x25, x25, :lo12:.LANCHOR102
+.L3435:
+	adrp	x25, .LANCHOR99
+	add	x21, x26, :lo12:.LANCHOR121
+	add	x25, x25, :lo12:.LANCHOR99
 	mov	w0, -1
 	str	w0, [x29, 124]
-.L3332:
+.L3436:
 	ldrb	w0, [x21]
 	cmp	w19, w0
-	bcs	.L3337
-	cbz	w19, .L3339
+	bcs	.L3441
+	cbz	w19, .L3443
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	bne	.L3340
+	bne	.L3444
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
-.L3340:
+.L3444:
 	ldr	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3339
+	beq	.L3443
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x21, x0
-	cbz	x0, .L3339
+	cbz	x0, .L3443
 	strb	wzr, [x0, 57]
 	strb	w19, [x0, 56]
 	stp	w27, w20, [x21, 32]
-	ldrb	w0, [x26, #:lo12:.LANCHOR123]
+	ldrb	w0, [x26, #:lo12:.LANCHOR121]
 	cmp	w19, w0
-	bcc	.L3342
-	adrp	x1, .LANCHOR213
+	bcc	.L3446
+	adrp	x1, .LANCHOR217
 	adrp	x0, .LC0
-	mov	w2, 1195
-	add	x1, x1, :lo12:.LANCHOR213
+	mov	w2, 1235
+	add	x1, x1, :lo12:.LANCHOR217
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3342:
+.L3446:
 	ldr	x0, [x21, 8]
 	lsl	w2, w19, 9
 	mov	w1, 0
@@ -20991,42 +21419,42 @@ zftl_discard:
 	mov	x0, x21
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-	ldr	x1, [x23, #:lo12:.LANCHOR100]
+	ldr	x1, [x23, #:lo12:.LANCHOR97]
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3339:
-	ldr	w1, [x24, #:lo12:.LANCHOR212]
+.L3443:
+	ldr	w1, [x24, #:lo12:.LANCHOR216]
 	cmp	w1, 8192
-	bls	.L3345
+	bls	.L3449
 	ldr	x0, [x29, 104]
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L3343
-	adrp	x0, .LC215
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L3447
+	adrp	x0, .LC216
 	mov	w4, 0
 	mov	w3, w19
 	mov	w2, w22
-	add	x0, x0, :lo12:.LC215
+	add	x0, x0, :lo12:.LC216
 	bl	printf
-.L3343:
-	str	wzr, [x24, #:lo12:.LANCHOR212]
+.L3447:
+	str	wzr, [x24, #:lo12:.LANCHOR216]
 	bl	flt_sys_flush
-	adrp	x0, .LANCHOR119
+	adrp	x0, .LANCHOR116
 	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR119]
-.L3345:
+	str	w1, [x0, #:lo12:.LANCHOR116]
+.L3449:
 	mov	w0, 0
-	b	.L3323
-.L3337:
+	b	.L3427
+.L3441:
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3333
+	beq	.L3437
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbz	x0, .L3335
+	cbz	x0, .L3439
 	ldrb	w2, [x21]
 	mov	w1, 0
 	strb	w2, [x0, 56]
@@ -21038,24 +21466,24 @@ zftl_discard:
 	mov	x0, x28
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-.L3371:
-	ldr	x1, [x23, #:lo12:.LANCHOR100]
+.L3475:
+	ldr	x1, [x23, #:lo12:.LANCHOR97]
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3335:
+.L3439:
 	ldrb	w0, [x21]
 	add	w20, w20, 1
 	sub	w19, w19, w0
-	b	.L3332
-.L3333:
+	b	.L3436
+.L3437:
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
 	ldr	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3335
+	beq	.L3439
 	add	x1, x29, 124
 	mov	w2, 1
 	mov	w0, w20
@@ -21069,14 +21497,14 @@ zftl_discard:
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR101
-	ldrb	w1, [x1, #:lo12:.LANCHOR101]
+	adrp	x1, .LANCHOR98
+	ldrb	w1, [x1, #:lo12:.LANCHOR98]
 	udiv	w0, w0, w1
 	bl	ftl_vpn_decrement
-	b	.L3371
-.L3344:
+	b	.L3475
+.L3448:
 	mov	w0, -1
-.L3323:
+.L3427:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -21158,6 +21586,8 @@ ftl_discard:
 	.global	p_read_ahead_ext_buf
 	.global	discard_sector_count
 	.global	read_ahead_lpa
+	.global	read_buf_count
+	.global	read_buf_head
 	.global	write_commit_count
 	.global	write_commit_head
 	.global	write_buf_count
@@ -21248,35 +21678,35 @@ ftl_discard:
 	.global	g_flash_page_buffer
 	.section	.bss.IDByte,"aw",@nobits
 	.align	2
-	.set	.LANCHOR40,. + 0
+	.set	.LANCHOR41,. + 0
 	.type	IDByte, %object
 	.size	IDByte, 32
 IDByte:
 	.zero	32
 	.section	.bss._c_ftl_blk_pre_plane,"aw",@nobits
 	.align	1
-	.set	.LANCHOR2,. + 0
+	.set	.LANCHOR6,. + 0
 	.type	_c_ftl_blk_pre_plane, %object
 	.size	_c_ftl_blk_pre_plane, 2
 _c_ftl_blk_pre_plane:
 	.zero	2
 	.section	.bss._c_ftl_block_addr_log2,"aw",@nobits
 	.align	1
-	.set	.LANCHOR102,. + 0
+	.set	.LANCHOR99,. + 0
 	.type	_c_ftl_block_addr_log2, %object
 	.size	_c_ftl_block_addr_log2, 2
 _c_ftl_block_addr_log2:
 	.zero	2
 	.section	.bss._c_ftl_block_align_addr,"aw",@nobits
 	.align	1
-	.set	.LANCHOR108,. + 0
+	.set	.LANCHOR105,. + 0
 	.type	_c_ftl_block_align_addr, %object
 	.size	_c_ftl_block_align_addr, 2
 _c_ftl_block_align_addr:
 	.zero	2
 	.section	.bss._c_ftl_byte_pre_page,"aw",@nobits
 	.align	1
-	.set	.LANCHOR195,. + 0
+	.set	.LANCHOR199,. + 0
 	.type	_c_ftl_byte_pre_page, %object
 	.size	_c_ftl_byte_pre_page, 2
 _c_ftl_byte_pre_page:
@@ -21288,129 +21718,129 @@ _c_ftl_byte_pre_page:
 _c_ftl_nand_blks_per_die:
 	.zero	2
 	.section	.bss._c_ftl_nand_die_num,"aw",@nobits
-	.set	.LANCHOR109,. + 0
+	.set	.LANCHOR106,. + 0
 	.type	_c_ftl_nand_die_num, %object
 	.size	_c_ftl_nand_die_num, 1
 _c_ftl_nand_die_num:
 	.zero	1
 	.section	.bss._c_ftl_nand_planes_num,"aw",@nobits
-	.set	.LANCHOR76,. + 0
+	.set	.LANCHOR73,. + 0
 	.type	_c_ftl_nand_planes_num, %object
 	.size	_c_ftl_nand_planes_num, 1
 _c_ftl_nand_planes_num:
 	.zero	1
 	.section	.bss._c_ftl_nand_type,"aw",@nobits
-	.set	.LANCHOR71,. + 0
+	.set	.LANCHOR68,. + 0
 	.type	_c_ftl_nand_type, %object
 	.size	_c_ftl_nand_type, 1
 _c_ftl_nand_type:
 	.zero	1
 	.section	.bss._c_ftl_page_pre_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR75,. + 0
+	.set	.LANCHOR72,. + 0
 	.type	_c_ftl_page_pre_blk, %object
 	.size	_c_ftl_page_pre_blk, 2
 _c_ftl_page_pre_blk:
 	.zero	2
 	.section	.bss._c_ftl_page_pre_slc_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR83,. + 0
+	.set	.LANCHOR80,. + 0
 	.type	_c_ftl_page_pre_slc_blk, %object
 	.size	_c_ftl_page_pre_slc_blk, 2
 _c_ftl_page_pre_slc_blk:
 	.zero	2
 	.section	.bss._c_ftl_planes_per_die,"aw",@nobits
-	.set	.LANCHOR101,. + 0
+	.set	.LANCHOR98,. + 0
 	.type	_c_ftl_planes_per_die, %object
 	.size	_c_ftl_planes_per_die, 1
 _c_ftl_planes_per_die:
 	.zero	1
 	.section	.bss._c_ftl_pm_page_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR182,. + 0
+	.set	.LANCHOR187,. + 0
 	.type	_c_ftl_pm_page_num, %object
 	.size	_c_ftl_pm_page_num, 2
 _c_ftl_pm_page_num:
 	.zero	2
 	.section	.bss._c_ftl_sec_per_page,"aw",@nobits
-	.set	.LANCHOR123,. + 0
+	.set	.LANCHOR121,. + 0
 	.type	_c_ftl_sec_per_page, %object
 	.size	_c_ftl_sec_per_page, 1
 _c_ftl_sec_per_page:
 	.zero	1
 	.section	.bss._c_max_pm_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR140,. + 0
+	.set	.LANCHOR141,. + 0
 	.type	_c_max_pm_sblk, %object
 	.size	_c_max_pm_sblk, 2
 _c_max_pm_sblk:
 	.zero	2
 	.section	.bss._c_mix_max_slc_ec_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR105,. + 0
+	.set	.LANCHOR102,. + 0
 	.type	_c_mix_max_slc_ec_count, %object
 	.size	_c_mix_max_slc_ec_count, 2
 _c_mix_max_slc_ec_count:
 	.zero	2
 	.section	.bss._c_mix_max_xlc_ec_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR103,. + 0
+	.set	.LANCHOR100,. + 0
 	.type	_c_mix_max_xlc_ec_count, %object
 	.size	_c_mix_max_xlc_ec_count, 2
 _c_mix_max_xlc_ec_count:
 	.zero	2
 	.section	.bss._c_slc_to_xlc_ec_ratio,"aw",@nobits
 	.align	1
-	.set	.LANCHOR4,. + 0
+	.set	.LANCHOR8,. + 0
 	.type	_c_slc_to_xlc_ec_ratio, %object
 	.size	_c_slc_to_xlc_ec_ratio, 2
 _c_slc_to_xlc_ec_ratio:
 	.zero	2
 	.section	.bss._c_swl_slc_gc_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR139,. + 0
+	.set	.LANCHOR140,. + 0
 	.type	_c_swl_slc_gc_th, %object
 	.size	_c_swl_slc_gc_th, 2
 _c_swl_slc_gc_th:
 	.zero	2
 	.section	.bss._c_swl_xlc_gc_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR138,. + 0
+	.set	.LANCHOR139,. + 0
 	.type	_c_swl_xlc_gc_th, %object
 	.size	_c_swl_xlc_gc_th, 2
 _c_swl_xlc_gc_th:
 	.zero	2
 	.section	.bss._c_totle_data_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR200,. + 0
+	.set	.LANCHOR204,. + 0
 	.type	_c_totle_data_density, %object
 	.size	_c_totle_data_density, 4
 _c_totle_data_density:
 	.zero	4
 	.section	.bss._c_totle_log_page,"aw",@nobits
 	.align	2
-	.set	.LANCHOR56,. + 0
+	.set	.LANCHOR118,. + 0
 	.type	_c_totle_log_page, %object
 	.size	_c_totle_log_page, 4
 _c_totle_log_page:
 	.zero	4
 	.section	.bss._c_totle_phy_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR199,. + 0
+	.set	.LANCHOR203,. + 0
 	.type	_c_totle_phy_density, %object
 	.size	_c_totle_phy_density, 4
 _c_totle_phy_density:
 	.zero	4
 	.section	.bss._c_user_data_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR61,. + 0
+	.set	.LANCHOR58,. + 0
 	.type	_c_user_data_density, %object
 	.size	_c_user_data_density, 4
 _c_user_data_density:
 	.zero	4
 	.section	.bss._gc_after_discard_en,"aw",@nobits
 	.align	2
-	.set	.LANCHOR119,. + 0
+	.set	.LANCHOR116,. + 0
 	.type	_gc_after_discard_en, %object
 	.size	_gc_after_discard_en, 4
 _gc_after_discard_en:
@@ -21429,69 +21859,69 @@ _last_write_time:
 	.zero	4
 	.section	.bss._max_slc_super_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR104,. + 0
+	.set	.LANCHOR101,. + 0
 	.type	_max_slc_super_block, %object
 	.size	_max_slc_super_block, 2
 _max_slc_super_block:
 	.zero	2
 	.section	.bss._max_xlc_super_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR91,. + 0
+	.set	.LANCHOR88,. + 0
 	.type	_max_xlc_super_block, %object
 	.size	_max_xlc_super_block, 2
 _max_xlc_super_block:
 	.zero	2
 	.section	.bss._min_slc_super_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR87,. + 0
+	.set	.LANCHOR84,. + 0
 	.type	_min_slc_super_block, %object
 	.size	_min_slc_super_block, 2
 _min_slc_super_block:
 	.zero	2
 	.section	.bss.discard_sector_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR212,. + 0
+	.set	.LANCHOR216,. + 0
 	.type	discard_sector_count, %object
 	.size	discard_sector_count, 4
 discard_sector_count:
 	.zero	4
 	.section	.bss.fill_spare_size,"aw",@nobits
 	.align	1
-	.set	.LANCHOR46,. + 0
+	.set	.LANCHOR47,. + 0
 	.type	fill_spare_size, %object
 	.size	fill_spare_size, 2
 fill_spare_size:
 	.zero	2
 	.section	.bss.flash_read_retry,"aw",@nobits
 	.align	3
-	.set	.LANCHOR155,. + 0
+	.set	.LANCHOR156,. + 0
 	.type	flash_read_retry, %object
 	.size	flash_read_retry, 8
 flash_read_retry:
 	.zero	8
 	.section	.bss.free_buf_count,"aw",@nobits
-	.set	.LANCHOR50,. + 0
+	.set	.LANCHOR51,. + 0
 	.type	free_buf_count, %object
 	.size	free_buf_count, 1
 free_buf_count:
 	.zero	1
 	.section	.bss.free_mix_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR97,. + 0
+	.set	.LANCHOR94,. + 0
 	.type	free_mix_sblk, %object
 	.size	free_mix_sblk, 2
 free_mix_sblk:
 	.zero	2
 	.section	.bss.free_slc_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR93,. + 0
+	.set	.LANCHOR90,. + 0
 	.type	free_slc_sblk, %object
 	.size	free_slc_sblk, 2
 free_slc_sblk:
 	.zero	2
 	.section	.bss.free_xlc_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR95,. + 0
+	.set	.LANCHOR92,. + 0
 	.type	free_xlc_sblk, %object
 	.size	free_xlc_sblk, 2
 free_xlc_sblk:
@@ -21503,14 +21933,14 @@ free_xlc_sblk:
 ftl_ext_info_data_buffer:
 	.zero	16384
 	.section	.bss.ftl_ext_info_first_write,"aw",@nobits
-	.set	.LANCHOR178,. + 0
+	.set	.LANCHOR183,. + 0
 	.type	ftl_ext_info_first_write, %object
 	.size	ftl_ext_info_first_write, 1
 ftl_ext_info_first_write:
 	.zero	1
 	.section	.bss.ftl_flush_jiffies,"aw",@nobits
 	.align	2
-	.set	.LANCHOR208,. + 0
+	.set	.LANCHOR212,. + 0
 	.type	ftl_flush_jiffies, %object
 	.size	ftl_flush_jiffies, 4
 ftl_flush_jiffies:
@@ -21523,61 +21953,61 @@ ftl_info_data_buffer:
 	.zero	16384
 	.section	.bss.ftl_info_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR173,. + 0
+	.set	.LANCHOR178,. + 0
 	.type	ftl_info_spare, %object
 	.size	ftl_info_spare, 256
 ftl_info_spare:
 	.zero	256
 	.section	.bss.ftl_low_format_cur_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR62,. + 0
+	.set	.LANCHOR59,. + 0
 	.type	ftl_low_format_cur_blk, %object
 	.size	ftl_low_format_cur_blk, 2
 ftl_low_format_cur_blk:
 	.zero	2
 	.section	.bss.ftl_power_lost_flag,"aw",@nobits
-	.set	.LANCHOR177,. + 0
+	.set	.LANCHOR182,. + 0
 	.type	ftl_power_lost_flag, %object
 	.size	ftl_power_lost_flag, 1
 ftl_power_lost_flag:
 	.zero	1
 	.section	.bss.ftl_sblk_lpa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR114,. + 0
+	.set	.LANCHOR111,. + 0
 	.type	ftl_sblk_lpa_tbl, %object
 	.size	ftl_sblk_lpa_tbl, 8
 ftl_sblk_lpa_tbl:
 	.zero	8
 	.section	.bss.ftl_sblk_update_list,"aw",@nobits
 	.align	3
-	.set	.LANCHOR67,. + 0
+	.set	.LANCHOR64,. + 0
 	.type	ftl_sblk_update_list, %object
 	.size	ftl_sblk_update_list, 16
 ftl_sblk_update_list:
 	.zero	16
 	.section	.bss.ftl_sblk_update_list_offset,"aw",@nobits
 	.align	1
-	.set	.LANCHOR120,. + 0
+	.set	.LANCHOR117,. + 0
 	.type	ftl_sblk_update_list_offset, %object
 	.size	ftl_sblk_update_list_offset, 2
 ftl_sblk_update_list_offset:
 	.zero	2
 	.section	.bss.ftl_sblk_vpn,"aw",@nobits
 	.align	3
-	.set	.LANCHOR5,. + 0
+	.set	.LANCHOR9,. + 0
 	.type	ftl_sblk_vpn, %object
 	.size	ftl_sblk_vpn, 8
 ftl_sblk_vpn:
 	.zero	8
 	.section	.bss.ftl_sblk_vpn_update_id,"aw",@nobits
 	.align	1
-	.set	.LANCHOR66,. + 0
+	.set	.LANCHOR63,. + 0
 	.type	ftl_sblk_vpn_update_id, %object
 	.size	ftl_sblk_vpn_update_id, 2
 ftl_sblk_vpn_update_id:
 	.zero	2
 	.section	.bss.ftl_sys_info_first_write,"aw",@nobits
-	.set	.LANCHOR176,. + 0
+	.set	.LANCHOR181,. + 0
 	.type	ftl_sys_info_first_write, %object
 	.size	ftl_sys_info_first_write, 1
 ftl_sys_info_first_write:
@@ -21590,61 +22020,61 @@ ftl_tmp_buffer:
 	.zero	16384
 	.section	.bss.ftl_tmp_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR171,. + 0
+	.set	.LANCHOR176,. + 0
 	.type	ftl_tmp_spare, %object
 	.size	ftl_tmp_spare, 256
 ftl_tmp_spare:
 	.zero	256
 	.section	.bss.ftl_vpn_update_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR118,. + 0
+	.set	.LANCHOR115,. + 0
 	.type	ftl_vpn_update_count, %object
 	.size	ftl_vpn_update_count, 2
 ftl_vpn_update_count:
 	.zero	2
 	.section	.bss.g_block_align_addr,"aw",@nobits
 	.align	1
-	.set	.LANCHOR28,. + 0
+	.set	.LANCHOR2,. + 0
 	.type	g_block_align_addr, %object
 	.size	g_block_align_addr, 2
 g_block_align_addr:
 	.zero	2
 	.section	.bss.g_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR48,. + 0
+	.set	.LANCHOR49,. + 0
 	.type	g_buf, %object
 	.size	g_buf, 2048
 g_buf:
 	.zero	2048
 	.section	.bss.g_die_addr,"aw",@nobits
 	.align	2
-	.set	.LANCHOR135,. + 0
+	.set	.LANCHOR136,. + 0
 	.type	g_die_addr, %object
 	.size	g_die_addr, 32
 g_die_addr:
 	.zero	32
 	.section	.bss.g_die_cs_idx,"aw",@nobits
 	.align	2
-	.set	.LANCHOR26,. + 0
+	.set	.LANCHOR29,. + 0
 	.type	g_die_cs_idx, %object
 	.size	g_die_cs_idx, 8
 g_die_cs_idx:
 	.zero	8
 	.section	.bss.g_flash_3d_mlc_flag,"aw",@nobits
-	.set	.LANCHOR107,. + 0
+	.set	.LANCHOR104,. + 0
 	.type	g_flash_3d_mlc_flag, %object
 	.size	g_flash_3d_mlc_flag, 1
 g_flash_3d_mlc_flag:
 	.zero	1
 	.section	.bss.g_flash_3d_tlc_flag,"aw",@nobits
-	.set	.LANCHOR73,. + 0
+	.set	.LANCHOR70,. + 0
 	.type	g_flash_3d_tlc_flag, %object
 	.size	g_flash_3d_tlc_flag, 1
 g_flash_3d_tlc_flag:
 	.zero	1
 	.section	.bss.g_flash_blk_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR158,. + 0
+	.set	.LANCHOR159,. + 0
 	.type	g_flash_blk_info, %object
 	.size	g_flash_blk_info, 4
 g_flash_blk_info:
@@ -21657,7 +22087,7 @@ g_flash_blk_info:
 g_flash_cur_mode:
 	.zero	4
 	.section	.bss.g_flash_interface_mode,"aw",@nobits
-	.set	.LANCHOR41,. + 0
+	.set	.LANCHOR42,. + 0
 	.type	g_flash_interface_mode, %object
 	.size	g_flash_interface_mode, 1
 g_flash_interface_mode:
@@ -21669,169 +22099,169 @@ g_flash_interface_mode:
 g_flash_multi_page_prog_en:
 	.zero	1
 	.section	.bss.g_flash_multi_page_read_en,"aw",@nobits
-	.set	.LANCHOR192,. + 0
+	.set	.LANCHOR165,. + 0
 	.type	g_flash_multi_page_read_en, %object
 	.size	g_flash_multi_page_read_en, 1
 g_flash_multi_page_read_en:
 	.zero	1
 	.section	.bss.g_flash_page_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR160,. + 0
+	.set	.LANCHOR161,. + 0
 	.type	g_flash_page_buffer, %object
 	.size	g_flash_page_buffer, 8
 g_flash_page_buffer:
 	.zero	8
 	.section	.bss.g_flash_reversd_blks,"aw",@nobits
-	.set	.LANCHOR163,. + 0
+	.set	.LANCHOR168,. + 0
 	.type	g_flash_reversd_blks, %object
 	.size	g_flash_reversd_blks, 1
 g_flash_reversd_blks:
 	.zero	1
 	.section	.bss.g_flash_slc_mode,"aw",@nobits
-	.set	.LANCHOR13,. + 0
+	.set	.LANCHOR0,. + 0
 	.type	g_flash_slc_mode, %object
 	.size	g_flash_slc_mode, 1
 g_flash_slc_mode:
 	.zero	1
 	.section	.bss.g_flash_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR159,. + 0
+	.set	.LANCHOR160,. + 0
 	.type	g_flash_spare_buffer, %object
 	.size	g_flash_spare_buffer, 8
 g_flash_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_sys_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR157,. + 0
+	.set	.LANCHOR158,. + 0
 	.type	g_flash_sys_spare_buffer, %object
 	.size	g_flash_sys_spare_buffer, 8
 g_flash_sys_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_tmp_page_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR150,. + 0
+	.set	.LANCHOR151,. + 0
 	.type	g_flash_tmp_page_buffer, %object
 	.size	g_flash_tmp_page_buffer, 8
 g_flash_tmp_page_buffer:
 	.zero	8
 	.section	.bss.g_flash_tmp_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR152,. + 0
+	.set	.LANCHOR153,. + 0
 	.type	g_flash_tmp_spare_buffer, %object
 	.size	g_flash_tmp_spare_buffer, 8
 g_flash_tmp_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_toggle_mode_en,"aw",@nobits
-	.set	.LANCHOR16,. + 0
+	.set	.LANCHOR20,. + 0
 	.type	g_flash_toggle_mode_en, %object
 	.size	g_flash_toggle_mode_en, 1
 g_flash_toggle_mode_en:
 	.zero	1
 	.section	.bss.g_ftl_info_blk,"aw",@nobits
 	.align	6
-	.set	.LANCHOR174,. + 0
+	.set	.LANCHOR179,. + 0
 	.type	g_ftl_info_blk, %object
 	.size	g_ftl_info_blk, 4
 g_ftl_info_blk:
 	.zero	4
 	.section	.bss.g_gc_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR65,. + 0
+	.set	.LANCHOR62,. + 0
 	.type	g_gc_info, %object
 	.size	g_gc_info, 328
 g_gc_info:
 	.zero	328
 	.section	.bss.g_idb_ecc_bits,"aw",@nobits
-	.set	.LANCHOR12,. + 0
+	.set	.LANCHOR17,. + 0
 	.type	g_idb_ecc_bits, %object
 	.size	g_idb_ecc_bits, 1
 g_idb_ecc_bits:
 	.zero	1
 	.section	.bss.g_idb_slc_mode_enable,"aw",@nobits
-	.set	.LANCHOR164,. + 0
+	.set	.LANCHOR169,. + 0
 	.type	g_idb_slc_mode_enable, %object
 	.size	g_idb_slc_mode_enable, 1
 g_idb_slc_mode_enable:
 	.zero	1
 	.section	.bss.g_lsb_page_tbl,"aw",@nobits
 	.align	2
-	.set	.LANCHOR29,. + 0
+	.set	.LANCHOR3,. + 0
 	.type	g_lsb_page_tbl, %object
 	.size	g_lsb_page_tbl, 512
 g_lsb_page_tbl:
 	.zero	512
 	.section	.bss.g_maxRegNum,"aw",@nobits
-	.set	.LANCHOR21,. + 0
+	.set	.LANCHOR25,. + 0
 	.type	g_maxRegNum, %object
 	.size	g_maxRegNum, 1
 g_maxRegNum:
 	.zero	1
 	.section	.bss.g_maxRetryCount,"aw",@nobits
-	.set	.LANCHOR153,. + 0
+	.set	.LANCHOR154,. + 0
 	.type	g_maxRetryCount, %object
 	.size	g_maxRetryCount, 1
 g_maxRetryCount:
 	.zero	1
 	.section	.bss.g_msb_page_tbl,"aw",@nobits
 	.align	2
-	.set	.LANCHOR132,. + 0
+	.set	.LANCHOR133,. + 0
 	.type	g_msb_page_tbl, %object
 	.size	g_msb_page_tbl, 1024
 g_msb_page_tbl:
 	.zero	1024
 	.section	.bss.g_nand_max_die,"aw",@nobits
-	.set	.LANCHOR14,. + 0
+	.set	.LANCHOR18,. + 0
 	.type	g_nand_max_die, %object
 	.size	g_nand_max_die, 1
 g_nand_max_die:
 	.zero	1
 	.section	.bss.g_nand_opt_para,"aw",@nobits
 	.align	3
-	.set	.LANCHOR15,. + 0
+	.set	.LANCHOR19,. + 0
 	.type	g_nand_opt_para, %object
 	.size	g_nand_opt_para, 32
 g_nand_opt_para:
 	.zero	32
 	.section	.bss.g_nandc_ecc_bits,"aw",@nobits
-	.set	.LANCHOR42,. + 0
+	.set	.LANCHOR43,. + 0
 	.type	g_nandc_ecc_bits, %object
 	.size	g_nandc_ecc_bits, 1
 g_nandc_ecc_bits:
 	.zero	1
 	.section	.bss.g_nandc_tran_timeout,"aw",@nobits
-	.set	.LANCHOR151,. + 0
+	.set	.LANCHOR152,. + 0
 	.type	g_nandc_tran_timeout, %object
 	.size	g_nandc_tran_timeout, 1
 g_nandc_tran_timeout:
 	.zero	1
 	.section	.bss.g_nandc_v6_master_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR45,. + 0
+	.set	.LANCHOR46,. + 0
 	.type	g_nandc_v6_master_info, %object
 	.size	g_nandc_v6_master_info, 40
 g_nandc_v6_master_info:
 	.zero	40
 	.section	.bss.g_nandc_ver,"aw",@nobits
-	.set	.LANCHOR24,. + 0
+	.set	.LANCHOR27,. + 0
 	.type	g_nandc_ver, %object
 	.size	g_nandc_ver, 1
 g_nandc_ver:
 	.zero	1
 	.section	.bss.g_pm_spare,"aw",@nobits
 	.align	3
-	.set	.LANCHOR186,. + 0
+	.set	.LANCHOR191,. + 0
 	.type	g_pm_spare, %object
 	.size	g_pm_spare, 8
 g_pm_spare:
 	.zero	8
 	.section	.bss.g_retryMode,"aw",@nobits
-	.set	.LANCHOR19,. + 0
+	.set	.LANCHOR23,. + 0
 	.type	g_retryMode, %object
 	.size	g_retryMode, 1
 g_retryMode:
 	.zero	1
 	.section	.bss.g_slc_mode_addr2,"aw",@nobits
-	.set	.LANCHOR27,. + 0
+	.set	.LANCHOR1,. + 0
 	.type	g_slc_mode_addr2, %object
 	.size	g_slc_mode_addr2, 1
 g_slc_mode_addr2:
@@ -21843,159 +22273,159 @@ g_slc_mode_enable:
 	.zero	1
 	.section	.bss.g_slc_page_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR134,. + 0
+	.set	.LANCHOR135,. + 0
 	.type	g_slc_page_num, %object
 	.size	g_slc_page_num, 2
 g_slc_page_num:
 	.zero	2
 	.section	.bss.g_totle_phy_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR136,. + 0
+	.set	.LANCHOR137,. + 0
 	.type	g_totle_phy_block, %object
 	.size	g_totle_phy_block, 2
 g_totle_phy_block:
 	.zero	2
 	.section	.bss.gc_des_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR148,. + 0
+	.set	.LANCHOR149,. + 0
 	.type	gc_des_ppa_tbl, %object
 	.size	gc_des_ppa_tbl, 8
 gc_des_ppa_tbl:
 	.zero	8
 	.section	.bss.gc_free_slc_sblk_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR77,. + 0
+	.set	.LANCHOR74,. + 0
 	.type	gc_free_slc_sblk_th, %object
 	.size	gc_free_slc_sblk_th, 2
 gc_free_slc_sblk_th:
 	.zero	2
 	.section	.bss.gc_lpa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR146,. + 0
+	.set	.LANCHOR147,. + 0
 	.type	gc_lpa_tbl, %object
 	.size	gc_lpa_tbl, 8
 gc_lpa_tbl:
 	.zero	8
 	.section	.bss.gc_mode,"aw",@nobits
-	.set	.LANCHOR74,. + 0
+	.set	.LANCHOR71,. + 0
 	.type	gc_mode, %object
 	.size	gc_mode, 1
 gc_mode:
 	.zero	1
 	.section	.bss.gc_page_buf_id,"aw",@nobits
 	.align	3
-	.set	.LANCHOR72,. + 0
+	.set	.LANCHOR69,. + 0
 	.type	gc_page_buf_id, %object
 	.size	gc_page_buf_id, 8
 gc_page_buf_id:
 	.zero	8
 	.section	.bss.gc_pre_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR147,. + 0
+	.set	.LANCHOR148,. + 0
 	.type	gc_pre_ppa_tbl, %object
 	.size	gc_pre_ppa_tbl, 8
 gc_pre_ppa_tbl:
 	.zero	8
 	.section	.bss.gc_search_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR145,. + 0
+	.set	.LANCHOR146,. + 0
 	.type	gc_search_count, %object
 	.size	gc_search_count, 4
 gc_search_count:
 	.zero	4
 	.section	.bss.gc_slc_cache_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR80,. + 0
+	.set	.LANCHOR77,. + 0
 	.type	gc_slc_cache_index, %object
 	.size	gc_slc_cache_index, 2
 gc_slc_cache_index:
 	.zero	2
 	.section	.bss.gc_slc_data_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR84,. + 0
+	.set	.LANCHOR81,. + 0
 	.type	gc_slc_data_index, %object
 	.size	gc_slc_data_index, 2
 gc_slc_data_index:
 	.zero	2
 	.section	.bss.gc_slc_mode_tlc_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR82,. + 0
+	.set	.LANCHOR79,. + 0
 	.type	gc_slc_mode_tlc_vpn_th, %object
 	.size	gc_slc_mode_tlc_vpn_th, 2
 gc_slc_mode_tlc_vpn_th:
 	.zero	2
 	.section	.bss.gc_slc_mode_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR64,. + 0
+	.set	.LANCHOR61,. + 0
 	.type	gc_slc_mode_vpn_th, %object
 	.size	gc_slc_mode_vpn_th, 2
 gc_slc_mode_vpn_th:
 	.zero	2
 	.section	.bss.gc_state,"aw",@nobits
-	.set	.LANCHOR144,. + 0
+	.set	.LANCHOR145,. + 0
 	.type	gc_state, %object
 	.size	gc_state, 1
 gc_state:
 	.zero	1
 	.section	.bss.gc_tlc_mode_slc_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR92,. + 0
+	.set	.LANCHOR89,. + 0
 	.type	gc_tlc_mode_slc_vpn_th, %object
 	.size	gc_tlc_mode_slc_vpn_th, 2
 gc_tlc_mode_slc_vpn_th:
 	.zero	2
 	.section	.bss.gc_tlc_mode_tlc_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR89,. + 0
+	.set	.LANCHOR86,. + 0
 	.type	gc_tlc_mode_tlc_vpn_th, %object
 	.size	gc_tlc_mode_tlc_vpn_th, 2
 gc_tlc_mode_tlc_vpn_th:
 	.zero	2
 	.section	.bss.gc_valid_page_ppa,"aw",@nobits
 	.align	3
-	.set	.LANCHOR68,. + 0
+	.set	.LANCHOR65,. + 0
 	.type	gc_valid_page_ppa, %object
 	.size	gc_valid_page_ppa, 8
 gc_valid_page_ppa:
 	.zero	8
 	.section	.bss.gc_xlc_data_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR81,. + 0
+	.set	.LANCHOR78,. + 0
 	.type	gc_xlc_data_index, %object
 	.size	gc_xlc_data_index, 2
 gc_xlc_data_index:
 	.zero	2
 	.section	.bss.gc_xlc_search_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR85,. + 0
+	.set	.LANCHOR82,. + 0
 	.type	gc_xlc_search_index, %object
 	.size	gc_xlc_search_index, 2
 gc_xlc_search_index:
 	.zero	2
 	.section	.bss.gp_blk_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR3,. + 0
+	.set	.LANCHOR7,. + 0
 	.type	gp_blk_info, %object
 	.size	gp_blk_info, 8
 gp_blk_info:
 	.zero	8
 	.section	.bss.gp_data_slc_cache_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR79,. + 0
+	.set	.LANCHOR76,. + 0
 	.type	gp_data_slc_cache_head, %object
 	.size	gp_data_slc_cache_head, 8
 gp_data_slc_cache_head:
 	.zero	8
 	.section	.bss.gp_data_slc_data_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR8,. + 0
+	.set	.LANCHOR12,. + 0
 	.type	gp_data_slc_data_head, %object
 	.size	gp_data_slc_data_head, 8
 gp_data_slc_data_head:
 	.zero	8
 	.section	.bss.gp_data_xlc_data_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR78,. + 0
+	.set	.LANCHOR75,. + 0
 	.type	gp_data_xlc_data_head, %object
 	.size	gp_data_xlc_data_head, 8
 gp_data_xlc_data_head:
@@ -22008,63 +22438,63 @@ gp_flash_check_buf:
 	.zero	262144
 	.section	.bss.gp_flash_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR22,. + 0
+	.set	.LANCHOR26,. + 0
 	.type	gp_flash_info, %object
 	.size	gp_flash_info, 8
 gp_flash_info:
 	.zero	8
 	.section	.bss.gp_free_mix_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR98,. + 0
+	.set	.LANCHOR95,. + 0
 	.type	gp_free_mix_head, %object
 	.size	gp_free_mix_head, 8
 gp_free_mix_head:
 	.zero	8
 	.section	.bss.gp_free_slc_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR94,. + 0
+	.set	.LANCHOR91,. + 0
 	.type	gp_free_slc_head, %object
 	.size	gp_free_slc_head, 8
 gp_free_slc_head:
 	.zero	8
 	.section	.bss.gp_free_xlc_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR96,. + 0
+	.set	.LANCHOR93,. + 0
 	.type	gp_free_xlc_head, %object
 	.size	gp_free_xlc_head, 8
 gp_free_xlc_head:
 	.zero	8
 	.section	.bss.gp_ftl_ext_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR6,. + 0
+	.set	.LANCHOR10,. + 0
 	.type	gp_ftl_ext_info, %object
 	.size	gp_ftl_ext_info, 8
 gp_ftl_ext_info:
 	.zero	8
 	.section	.bss.gp_ftl_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR100,. + 0
+	.set	.LANCHOR97,. + 0
 	.type	gp_ftl_info, %object
 	.size	gp_ftl_info, 8
 gp_ftl_info:
 	.zero	8
 	.section	.bss.gp_nand_para_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR11,. + 0
+	.set	.LANCHOR16,. + 0
 	.type	gp_nand_para_info, %object
 	.size	gp_nand_para_info, 8
 gp_nand_para_info:
 	.zero	8
 	.section	.bss.gp_nandc,"aw",@nobits
 	.align	3
-	.set	.LANCHOR23,. + 0
+	.set	.LANCHOR13,. + 0
 	.type	gp_nandc, %object
 	.size	gp_nandc, 8
 gp_nandc:
 	.zero	8
 	.section	.bss.gp_sblk_list_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR0,. + 0
+	.set	.LANCHOR4,. + 0
 	.type	gp_sblk_list_tbl, %object
 	.size	gp_sblk_list_tbl, 8
 gp_sblk_list_tbl:
@@ -22077,21 +22507,21 @@ idb_buf:
 	.zero	262144
 	.section	.bss.idb_need_write_back,"aw",@nobits
 	.align	2
-	.set	.LANCHOR165,. + 0
+	.set	.LANCHOR170,. + 0
 	.type	idb_need_write_back, %object
 	.size	idb_need_write_back, 4
 idb_need_write_back:
 	.zero	4
 	.section	.bss.lpa_hash,"aw",@nobits
 	.align	3
-	.set	.LANCHOR113,. + 0
+	.set	.LANCHOR110,. + 0
 	.type	lpa_hash, %object
 	.size	lpa_hash, 512
 lpa_hash:
 	.zero	512
 	.section	.bss.lpa_hash_index,"aw",@nobits
 	.align	3
-	.set	.LANCHOR115,. + 0
+	.set	.LANCHOR112,. + 0
 	.type	lpa_hash_index, %object
 	.size	lpa_hash_index, 8
 lpa_hash_index:
@@ -22103,141 +22533,152 @@ lpa_hash_index:
 nandc_ecc_sts:
 	.zero	16
 	.section	.bss.nandc_hw_seed,"aw",@nobits
-	.set	.LANCHOR43,. + 0
+	.set	.LANCHOR44,. + 0
 	.type	nandc_hw_seed, %object
 	.size	nandc_hw_seed, 1
 nandc_hw_seed:
 	.zero	1
 	.section	.bss.nandc_randomizer_en,"aw",@nobits
-	.set	.LANCHOR44,. + 0
+	.set	.LANCHOR45,. + 0
 	.type	nandc_randomizer_en, %object
 	.size	nandc_randomizer_en, 1
 nandc_randomizer_en:
 	.zero	1
 	.section	.bss.p_free_buf_head,"aw",@nobits
-	.set	.LANCHOR49,. + 0
+	.set	.LANCHOR50,. + 0
 	.type	p_free_buf_head, %object
 	.size	p_free_buf_head, 1
 p_free_buf_head:
 	.zero	1
 	.section	.bss.p_read_ahead_ext_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR59,. + 0
 	.type	p_read_ahead_ext_buf, %object
 	.size	p_read_ahead_ext_buf, 8
 p_read_ahead_ext_buf:
 	.zero	8
 	.section	.bss.pm_first_write,"aw",@nobits
-	.set	.LANCHOR187,. + 0
+	.set	.LANCHOR192,. + 0
 	.type	pm_first_write, %object
 	.size	pm_first_write, 1
 pm_first_write:
 	.zero	1
 	.section	.bss.pm_gc_enable,"aw",@nobits
 	.align	2
-	.set	.LANCHOR127,. + 0
+	.set	.LANCHOR128,. + 0
 	.type	pm_gc_enable, %object
 	.size	pm_gc_enable, 4
 pm_gc_enable:
 	.zero	4
 	.section	.bss.pm_last_load_ram_id,"aw",@nobits
-	.set	.LANCHOR197,. + 0
+	.set	.LANCHOR201,. + 0
 	.type	pm_last_load_ram_id, %object
 	.size	pm_last_load_ram_id, 1
 pm_last_load_ram_id:
 	.zero	1
 	.section	.bss.pm_last_update_ram_id,"aw",@nobits
-	.set	.LANCHOR130,. + 0
+	.set	.LANCHOR131,. + 0
 	.type	pm_last_update_ram_id, %object
 	.size	pm_last_update_ram_id, 1
 pm_last_update_ram_id:
 	.zero	1
 	.section	.bss.pm_ram_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR129,. + 0
+	.set	.LANCHOR130,. + 0
 	.type	pm_ram_info, %object
 	.size	pm_ram_info, 512
 pm_ram_info:
 	.zero	512
 	.section	.bss.read_ahead_lpa,"aw",@nobits
 	.align	2
-	.set	.LANCHOR58,. + 0
+	.set	.LANCHOR202,. + 0
 	.type	read_ahead_lpa, %object
 	.size	read_ahead_lpa, 4
 read_ahead_lpa:
 	.zero	4
+	.section	.bss.read_buf_count,"aw",@nobits
+	.set	.LANCHOR125,. + 0
+	.type	read_buf_count, %object
+	.size	read_buf_count, 1
+read_buf_count:
+	.zero	1
+	.section	.bss.read_buf_head,"aw",@nobits
+	.set	.LANCHOR124,. + 0
+	.type	read_buf_head, %object
+	.size	read_buf_head, 1
+read_buf_head:
+	.zero	1
 	.section	.bss.sblk_gc_write_completed_queue_head,"aw",@nobits
-	.set	.LANCHOR69,. + 0
+	.set	.LANCHOR66,. + 0
 	.type	sblk_gc_write_completed_queue_head, %object
 	.size	sblk_gc_write_completed_queue_head, 1
 sblk_gc_write_completed_queue_head:
 	.zero	1
 	.section	.bss.sblk_queue_head,"aw",@nobits
-	.set	.LANCHOR126,. + 0
+	.set	.LANCHOR53,. + 0
 	.type	sblk_queue_head, %object
 	.size	sblk_queue_head, 1
 sblk_queue_head:
 	.zero	1
 	.section	.bss.sblk_read_completed_queue_head,"aw",@nobits
-	.set	.LANCHOR60,. + 0
+	.set	.LANCHOR127,. + 0
 	.type	sblk_read_completed_queue_head, %object
 	.size	sblk_read_completed_queue_head, 1
 sblk_read_completed_queue_head:
 	.zero	1
 	.section	.bss.sblk_write_completed_queue_head,"aw",@nobits
-	.set	.LANCHOR124,. + 0
+	.set	.LANCHOR122,. + 0
 	.type	sblk_write_completed_queue_head, %object
 	.size	sblk_write_completed_queue_head, 1
 sblk_write_completed_queue_head:
 	.zero	1
 	.section	.bss.slc_cache_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR86,. + 0
+	.set	.LANCHOR83,. + 0
 	.type	slc_cache_sblk, %object
 	.size	slc_cache_sblk, 2
 slc_cache_sblk:
 	.zero	2
 	.section	.bss.slc_data_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR88,. + 0
+	.set	.LANCHOR85,. + 0
 	.type	slc_data_sblk, %object
 	.size	slc_data_sblk, 2
 slc_data_sblk:
 	.zero	2
 	.section	.bss.write_buf_count,"aw",@nobits
-	.set	.LANCHOR55,. + 0
+	.set	.LANCHOR57,. + 0
 	.type	write_buf_count, %object
 	.size	write_buf_count, 1
 write_buf_count:
 	.zero	1
 	.section	.bss.write_buf_head,"aw",@nobits
-	.set	.LANCHOR54,. + 0
+	.set	.LANCHOR56,. + 0
 	.type	write_buf_head, %object
 	.size	write_buf_head, 1
 write_buf_head:
 	.zero	1
 	.section	.bss.write_commit_count,"aw",@nobits
-	.set	.LANCHOR121,. + 0
+	.set	.LANCHOR119,. + 0
 	.type	write_commit_count, %object
 	.size	write_commit_count, 1
 write_commit_count:
 	.zero	1
 	.section	.bss.write_commit_head,"aw",@nobits
-	.set	.LANCHOR169,. + 0
+	.set	.LANCHOR174,. + 0
 	.type	write_commit_head, %object
 	.size	write_commit_head, 1
 write_commit_head:
 	.zero	1
 	.section	.bss.xlc_data_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR90,. + 0
+	.set	.LANCHOR87,. + 0
 	.type	xlc_data_sblk, %object
 	.size	xlc_data_sblk, 2
 xlc_data_sblk:
 	.zero	2
 	.section	.bss.zftl_print_list_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR99,. + 0
+	.set	.LANCHOR96,. + 0
 	.type	zftl_print_list_count, %object
 	.size	zftl_print_list_count, 2
 zftl_print_list_count:
@@ -22278,7 +22719,7 @@ g_nand_para_info:
 	.byte	0
 	.section	.data.hy_f26_ref_value,"aw",@progbits
 	.align	3
-	.set	.LANCHOR149,. + 0
+	.set	.LANCHOR150,. + 0
 	.type	hy_f26_ref_value, %object
 	.size	hy_f26_ref_value, 28
 hy_f26_ref_value:
@@ -22312,7 +22753,7 @@ hy_f26_ref_value:
 	.byte	-37
 	.section	.data.nand_opt_para,"aw",@progbits
 	.align	3
-	.set	.LANCHOR191,. + 0
+	.set	.LANCHOR196,. + 0
 	.type	nand_opt_para, %object
 	.size	nand_opt_para, 128
 nand_opt_para:
@@ -22760,7 +23201,7 @@ sd15_tlc_rr:
 	.byte	0
 	.section	.data.tlc_prog_order,"aw",@progbits
 	.align	3
-	.set	.LANCHOR210,. + 0
+	.set	.LANCHOR214,. + 0
 	.type	tlc_prog_order, %object
 	.size	tlc_prog_order, 768
 tlc_prog_order:
@@ -23150,14 +23591,14 @@ tlc_prog_order:
 	.hword	1019
 	.section	.data.zftl_debug,"aw",@progbits
 	.align	2
-	.set	.LANCHOR9,. + 0
+	.set	.LANCHOR14,. + 0
 	.type	zftl_debug, %object
 	.size	zftl_debug, 4
 zftl_debug:
 	.word	17476
 	.section	.data.zftl_nand_flash_para_tbl,"aw",@progbits
 	.align	3
-	.set	.LANCHOR190,. + 0
+	.set	.LANCHOR195,. + 0
 	.type	zftl_nand_flash_para_tbl, %object
 	.size	zftl_nand_flash_para_tbl, 960
 zftl_nand_flash_para_tbl:
@@ -23180,7 +23621,7 @@ zftl_nand_flash_para_tbl:
 	.byte	37
 	.byte	60
 	.byte	32
-	.byte	2
+	.byte	3
 	.byte	1
 	.byte	4
 	.byte	0
@@ -23208,7 +23649,7 @@ zftl_nand_flash_para_tbl:
 	.byte	37
 	.byte	60
 	.byte	32
-	.byte	2
+	.byte	3
 	.byte	1
 	.byte	4
 	.byte	0
@@ -23236,7 +23677,7 @@ zftl_nand_flash_para_tbl:
 	.byte	36
 	.byte	60
 	.byte	32
-	.byte	2
+	.byte	3
 	.byte	1
 	.byte	4
 	.byte	0
@@ -23292,7 +23733,7 @@ zftl_nand_flash_para_tbl:
 	.byte	33
 	.byte	40
 	.byte	32
-	.byte	2
+	.byte	3
 	.byte	1
 	.byte	1
 	.byte	0
@@ -23343,7 +23784,7 @@ zftl_nand_flash_para_tbl:
 	.byte	2
 	.byte	1
 	.hword	1056
-	.hword	17881
+	.hword	17857
 	.byte	2
 	.byte	35
 	.byte	40
@@ -23432,7 +23873,7 @@ zftl_nand_flash_para_tbl:
 	.byte	33
 	.byte	40
 	.byte	32
-	.byte	2
+	.byte	3
 	.byte	1
 	.byte	1
 	.byte	0
@@ -23623,7 +24064,7 @@ zftl_nand_flash_para_tbl:
 	.byte	2
 	.byte	1
 	.hword	1048
-	.hword	9695
+	.hword	9671
 	.byte	5
 	.byte	19
 	.byte	70
@@ -23735,7 +24176,7 @@ zftl_nand_flash_para_tbl:
 	.byte	2
 	.byte	1
 	.hword	1024
-	.hword	479
+	.hword	455
 	.byte	4
 	.byte	18
 	.byte	60
@@ -23819,7 +24260,7 @@ zftl_nand_flash_para_tbl:
 	.byte	2
 	.byte	1
 	.hword	2184
-	.hword	9695
+	.hword	9671
 	.byte	5
 	.byte	19
 	.byte	70
@@ -23847,7 +24288,7 @@ zftl_nand_flash_para_tbl:
 	.byte	2
 	.byte	1
 	.hword	2184
-	.hword	9695
+	.hword	9671
 	.byte	5
 	.byte	19
 	.byte	60
@@ -24001,451 +24442,472 @@ zftl_nand_flash_para_tbl:
 	.byte	-65
 	.byte	-66
 	.byte	0
-	.section	.rodata.__func__.10025,"a",@progbits
+	.section	.rodata.__func__.10041,"a",@progbits
 	.align	3
-	.set	.LANCHOR1,. + 0
-	.type	__func__.10025, %object
-	.size	__func__.10025, 18
-__func__.10025:
+	.set	.LANCHOR5,. + 0
+	.type	__func__.10041, %object
+	.size	__func__.10041, 18
+__func__.10041:
 	.string	"_list_remove_node"
-	.section	.rodata.__func__.10050,"a",@progbits
+	.section	.rodata.__func__.10066,"a",@progbits
 	.align	3
-	.set	.LANCHOR7,. + 0
-	.type	__func__.10050, %object
-	.size	__func__.10050, 23
-__func__.10050:
+	.set	.LANCHOR11,. + 0
+	.type	__func__.10066, %object
+	.size	__func__.10066, 23
+__func__.10066:
 	.string	"_list_update_data_list"
-	.section	.rodata.__func__.10158,"a",@progbits
+	.section	.rodata.__func__.10174,"a",@progbits
 	.align	3
-	.set	.LANCHOR175,. + 0
-	.type	__func__.10158, %object
-	.size	__func__.10158, 15
-__func__.10158:
+	.set	.LANCHOR180,. + 0
+	.type	__func__.10174, %object
+	.size	__func__.10174, 15
+__func__.10174:
 	.string	"ftl_info_flush"
-	.section	.rodata.__func__.10190,"a",@progbits
+	.section	.rodata.__func__.10206,"a",@progbits
 	.align	3
-	.set	.LANCHOR125,. + 0
-	.type	__func__.10190, %object
-	.size	__func__.10190, 15
-__func__.10190:
+	.set	.LANCHOR126,. + 0
+	.type	__func__.10206, %object
+	.size	__func__.10206, 15
+__func__.10206:
 	.string	"ftl_alloc_sblk"
-	.section	.rodata.__func__.10231,"a",@progbits
+	.section	.rodata.__func__.10247,"a",@progbits
 	.align	3
-	.set	.LANCHOR110,. + 0
-	.type	__func__.10231, %object
-	.size	__func__.10231, 18
-__func__.10231:
+	.set	.LANCHOR107,. + 0
+	.type	__func__.10247, %object
+	.size	__func__.10247, 18
+__func__.10247:
 	.string	"ftl_alloc_sys_blk"
-	.section	.rodata.__func__.10241,"a",@progbits
+	.section	.rodata.__func__.10257,"a",@progbits
 	.align	3
-	.set	.LANCHOR111,. + 0
-	.type	__func__.10241, %object
-	.size	__func__.10241, 17
-__func__.10241:
+	.set	.LANCHOR108,. + 0
+	.type	__func__.10257, %object
+	.size	__func__.10257, 17
+__func__.10257:
 	.string	"ftl_free_sys_blk"
-	.section	.rodata.__func__.10276,"a",@progbits
+	.section	.rodata.__func__.10292,"a",@progbits
 	.align	3
-	.set	.LANCHOR204,. + 0
-	.type	__func__.10276, %object
-	.size	__func__.10276, 14
-__func__.10276:
+	.set	.LANCHOR208,. + 0
+	.type	__func__.10292, %object
+	.size	__func__.10292, 14
+__func__.10292:
 	.string	"ftl_sblk_dump"
-	.section	.rodata.__func__.10300,"a",@progbits
+	.section	.rodata.__func__.10316,"a",@progbits
 	.align	3
-	.set	.LANCHOR193,. + 0
-	.type	__func__.10300, %object
-	.size	__func__.10300, 16
-__func__.10300:
+	.set	.LANCHOR197,. + 0
+	.type	__func__.10316, %object
+	.size	__func__.10316, 16
+__func__.10316:
 	.string	"ftl_sysblk_dump"
-	.section	.rodata.__func__.10319,"a",@progbits
+	.section	.rodata.__func__.10335,"a",@progbits
 	.align	3
-	.set	.LANCHOR184,. + 0
-	.type	__func__.10319, %object
-	.size	__func__.10319, 23
-__func__.10319:
+	.set	.LANCHOR189,. + 0
+	.type	__func__.10335, %object
+	.size	__func__.10335, 23
+__func__.10335:
 	.string	"ftl_open_sblk_recovery"
-	.section	.rodata.__func__.10345,"a",@progbits
+	.section	.rodata.__func__.10361,"a",@progbits
 	.align	3
-	.set	.LANCHOR112,. + 0
-	.type	__func__.10345, %object
-	.size	__func__.10345, 23
-__func__.10345:
+	.set	.LANCHOR109,. + 0
+	.type	__func__.10361, %object
+	.size	__func__.10361, 23
+__func__.10361:
 	.string	"ftl_get_ppa_from_index"
-	.section	.rodata.__func__.10366,"a",@progbits
+	.section	.rodata.__func__.10382,"a",@progbits
 	.align	3
-	.set	.LANCHOR206,. + 0
-	.type	__func__.10366, %object
-	.size	__func__.10366, 19
-__func__.10366:
+	.set	.LANCHOR210,. + 0
+	.type	__func__.10382, %object
+	.size	__func__.10382, 19
+__func__.10382:
 	.string	"ftl_update_l2p_map"
-	.section	.rodata.__func__.10384,"a",@progbits
+	.section	.rodata.__func__.10400,"a",@progbits
 	.align	3
-	.set	.LANCHOR116,. + 0
-	.type	__func__.10384, %object
-	.size	__func__.10384, 22
-__func__.10384:
+	.set	.LANCHOR113,. + 0
+	.type	__func__.10400, %object
+	.size	__func__.10400, 22
+__func__.10400:
 	.string	"ftl_get_new_free_page"
-	.section	.rodata.__func__.10395,"a",@progbits
+	.section	.rodata.__func__.10411,"a",@progbits
 	.align	3
-	.set	.LANCHOR117,. + 0
-	.type	__func__.10395, %object
-	.size	__func__.10395, 22
-__func__.10395:
+	.set	.LANCHOR114,. + 0
+	.type	__func__.10411, %object
+	.size	__func__.10411, 22
+__func__.10411:
 	.string	"ftl_ext_alloc_new_blk"
-	.section	.rodata.__func__.10420,"a",@progbits
+	.section	.rodata.__func__.10436,"a",@progbits
 	.align	3
-	.set	.LANCHOR179,. + 0
-	.type	__func__.10420, %object
-	.size	__func__.10420, 19
-__func__.10420:
+	.set	.LANCHOR184,. + 0
+	.type	__func__.10436, %object
+	.size	__func__.10436, 19
+__func__.10436:
 	.string	"ftl_ext_info_flush"
-	.section	.rodata.__func__.10432,"a",@progbits
+	.section	.rodata.__func__.10448,"a",@progbits
 	.align	3
-	.set	.LANCHOR180,. + 0
-	.type	__func__.10432, %object
-	.size	__func__.10432, 18
-__func__.10432:
+	.set	.LANCHOR185,. + 0
+	.type	__func__.10448, %object
+	.size	__func__.10448, 18
+__func__.10448:
 	.string	"ftl_ext_info_init"
-	.section	.rodata.__func__.10469,"a",@progbits
+	.section	.rodata.__func__.10485,"a",@progbits
 	.align	3
-	.set	.LANCHOR181,. + 0
-	.type	__func__.10469, %object
-	.size	__func__.10469, 25
-__func__.10469:
+	.set	.LANCHOR186,. + 0
+	.type	__func__.10485, %object
+	.size	__func__.10485, 25
+__func__.10485:
 	.string	"ftl_low_format_data_init"
-	.section	.rodata.__func__.10484,"a",@progbits
+	.section	.rodata.__func__.10500,"a",@progbits
 	.align	3
-	.set	.LANCHOR183,. + 0
-	.type	__func__.10484, %object
-	.size	__func__.10484, 15
-__func__.10484:
+	.set	.LANCHOR188,. + 0
+	.type	__func__.10500, %object
+	.size	__func__.10500, 15
+__func__.10500:
 	.string	"ftl_low_format"
-	.section	.rodata.__func__.10532,"a",@progbits
+	.section	.rodata.__func__.10548,"a",@progbits
 	.align	3
-	.set	.LANCHOR172,. + 0
-	.type	__func__.10532, %object
-	.size	__func__.10532, 14
-__func__.10532:
+	.set	.LANCHOR177,. + 0
+	.type	__func__.10548, %object
+	.size	__func__.10548, 14
+__func__.10548:
 	.string	"ftl_prog_page"
-	.section	.rodata.__func__.10692,"a",@progbits
+	.section	.rodata.__func__.10665,"a",@progbits
 	.align	3
-	.set	.LANCHOR168,. + 0
-	.type	__func__.10692, %object
-	.size	__func__.10692, 15
-__func__.10692:
+	.set	.LANCHOR164,. + 0
+	.type	__func__.10665, %object
+	.size	__func__.10665, 31
+__func__.10665:
+	.string	"queue_wait_first_req_completed"
+	.section	.rodata.__func__.10718,"a",@progbits
+	.align	3
+	.set	.LANCHOR173,. + 0
+	.type	__func__.10718, %object
+	.size	__func__.10718, 15
+__func__.10718:
 	.string	"sblk_prog_page"
-	.section	.rodata.__func__.10752,"a",@progbits
+	.section	.rodata.__func__.10745,"a",@progbits
 	.align	3
-	.set	.LANCHOR194,. + 0
-	.type	__func__.10752, %object
-	.size	__func__.10752, 16
-__func__.10752:
+	.set	.LANCHOR166,. + 0
+	.type	__func__.10745, %object
+	.size	__func__.10745, 15
+__func__.10745:
+	.string	"sblk_read_page"
+	.section	.rodata.__func__.10784,"a",@progbits
+	.align	3
+	.set	.LANCHOR198,. + 0
+	.type	__func__.10784, %object
+	.size	__func__.10784, 16
+__func__.10784:
 	.string	"load_l2p_region"
-	.section	.rodata.__func__.10766,"a",@progbits
+	.section	.rodata.__func__.10798,"a",@progbits
 	.align	3
-	.set	.LANCHOR141,. + 0
-	.type	__func__.10766, %object
-	.size	__func__.10766, 13
-__func__.10766:
+	.set	.LANCHOR142,. + 0
+	.type	__func__.10798, %object
+	.size	__func__.10798, 13
+__func__.10798:
 	.string	"pm_free_sblk"
-	.section	.rodata.__func__.10786,"a",@progbits
+	.section	.rodata.__func__.10818,"a",@progbits
 	.align	3
-	.set	.LANCHOR196,. + 0
-	.type	__func__.10786, %object
-	.size	__func__.10786, 6
-__func__.10786:
+	.set	.LANCHOR200,. + 0
+	.type	__func__.10818, %object
+	.size	__func__.10818, 6
+__func__.10818:
 	.string	"pm_gc"
-	.section	.rodata.__func__.10802,"a",@progbits
+	.section	.rodata.__func__.10834,"a",@progbits
 	.align	3
-	.set	.LANCHOR128,. + 0
-	.type	__func__.10802, %object
-	.size	__func__.10802, 17
-__func__.10802:
+	.set	.LANCHOR129,. + 0
+	.type	__func__.10834, %object
+	.size	__func__.10834, 17
+__func__.10834:
 	.string	"pm_alloc_new_blk"
-	.section	.rodata.__func__.10812,"a",@progbits
+	.section	.rodata.__func__.10844,"a",@progbits
 	.align	3
-	.set	.LANCHOR185,. + 0
-	.type	__func__.10812, %object
-	.size	__func__.10812, 14
-__func__.10812:
+	.set	.LANCHOR190,. + 0
+	.type	__func__.10844, %object
+	.size	__func__.10844, 14
+__func__.10844:
 	.string	"pm_write_page"
-	.section	.rodata.__func__.10830,"a",@progbits
+	.section	.rodata.__func__.10862,"a",@progbits
 	.align	3
-	.set	.LANCHOR131,. + 0
-	.type	__func__.10830, %object
-	.size	__func__.10830, 21
-__func__.10830:
+	.set	.LANCHOR132,. + 0
+	.type	__func__.10862, %object
+	.size	__func__.10862, 21
+__func__.10862:
 	.string	"pm_select_ram_region"
-	.section	.rodata.__func__.8509,"a",@progbits
+	.section	.rodata.__func__.8511,"a",@progbits
 	.align	3
-	.set	.LANCHOR154,. + 0
-	.type	__func__.8509, %object
-	.size	__func__.8509, 19
-__func__.8509:
+	.set	.LANCHOR155,. + 0
+	.type	__func__.8511, %object
+	.size	__func__.8511, 19
+__func__.8511:
 	.string	"flash_read_page_en"
-	.section	.rodata.__func__.8538,"a",@progbits
+	.section	.rodata.__func__.8540,"a",@progbits
 	.align	3
-	.set	.LANCHOR170,. + 0
-	.type	__func__.8538, %object
-	.size	__func__.8538, 19
-__func__.8538:
+	.set	.LANCHOR175,. + 0
+	.type	__func__.8540, %object
+	.size	__func__.8540, 19
+__func__.8540:
 	.string	"flash_prog_page_en"
-	.section	.rodata.__func__.8553,"a",@progbits
+	.section	.rodata.__func__.8555,"a",@progbits
 	.align	3
 	.set	.LANCHOR37,. + 0
-	.type	__func__.8553, %object
-	.size	__func__.8553, 26
-__func__.8553:
+	.type	__func__.8555, %object
+	.size	__func__.8555, 26
+__func__.8555:
 	.string	"flash_erase_duplane_block"
-	.section	.rodata.__func__.8564,"a",@progbits
+	.section	.rodata.__func__.8566,"a",@progbits
 	.align	3
 	.set	.LANCHOR39,. + 0
-	.type	__func__.8564, %object
-	.size	__func__.8564, 21
-__func__.8564:
+	.type	__func__.8566, %object
+	.size	__func__.8566, 21
+__func__.8566:
 	.string	"flash_erase_block_en"
-	.section	.rodata.__func__.8578,"a",@progbits
+	.section	.rodata.__func__.8580,"a",@progbits
 	.align	3
-	.set	.LANCHOR25,. + 0
-	.type	__func__.8578, %object
-	.size	__func__.8578, 28
-__func__.8578:
+	.set	.LANCHOR28,. + 0
+	.type	__func__.8580, %object
+	.size	__func__.8580, 28
+__func__.8580:
 	.string	"flash_wait_device_ready_raw"
-	.section	.rodata.__func__.8602,"a",@progbits
+	.section	.rodata.__func__.8604,"a",@progbits
 	.align	3
-	.set	.LANCHOR166,. + 0
-	.type	__func__.8602, %object
-	.size	__func__.8602, 26
-__func__.8602:
+	.set	.LANCHOR171,. + 0
+	.type	__func__.8604, %object
+	.size	__func__.8604, 26
+__func__.8604:
 	.string	"flash_start_tlc_page_prog"
-	.section	.rodata.__func__.8615,"a",@progbits
+	.section	.rodata.__func__.8622,"a",@progbits
 	.align	3
-	.set	.LANCHOR167,. + 0
-	.type	__func__.8615, %object
-	.size	__func__.8615, 22
-__func__.8615:
+	.set	.LANCHOR172,. + 0
+	.type	__func__.8622, %object
+	.size	__func__.8622, 22
+__func__.8622:
 	.string	"flash_start_page_prog"
-	.section	.rodata.__func__.8628,"a",@progbits
+	.section	.rodata.__func__.8633,"a",@progbits
 	.align	3
 	.set	.LANCHOR36,. + 0
-	.type	__func__.8628, %object
-	.size	__func__.8628, 22
-__func__.8628:
+	.type	__func__.8633, %object
+	.size	__func__.8633, 22
+__func__.8633:
 	.string	"flash_start_page_read"
-	.section	.rodata.__func__.8643,"a",@progbits
+	.section	.rodata.__func__.8646,"a",@progbits
 	.align	3
-	.set	.LANCHOR161,. + 0
-	.type	__func__.8643, %object
-	.size	__func__.8643, 25
-__func__.8643:
+	.set	.LANCHOR162,. + 0
+	.type	__func__.8646, %object
+	.size	__func__.8646, 31
+__func__.8646:
+	.string	"flash_complete_plane_page_read"
+	.section	.rodata.__func__.8658,"a",@progbits
+	.align	3
+	.set	.LANCHOR40,. + 0
+	.type	__func__.8658, %object
+	.size	__func__.8658, 23
+__func__.8658:
+	.string	"flash_start_plane_read"
+	.section	.rodata.__func__.8671,"a",@progbits
+	.align	3
+	.set	.LANCHOR163,. + 0
+	.type	__func__.8671, %object
+	.size	__func__.8671, 25
+__func__.8671:
 	.string	"flash_complete_page_read"
-	.section	.rodata.__func__.8956,"a",@progbits
+	.section	.rodata.__func__.8982,"a",@progbits
 	.align	3
-	.set	.LANCHOR133,. + 0
-	.type	__func__.8956, %object
-	.size	__func__.8956, 20
-__func__.8956:
+	.set	.LANCHOR134,. + 0
+	.type	__func__.8982, %object
+	.size	__func__.8982, 20
+__func__.8982:
 	.string	"flash_die_info_init"
-	.section	.rodata.__func__.8966,"a",@progbits
+	.section	.rodata.__func__.8992,"a",@progbits
 	.align	3
-	.set	.LANCHOR10,. + 0
-	.type	__func__.8966, %object
-	.size	__func__.8966, 22
-__func__.8966:
+	.set	.LANCHOR15,. + 0
+	.type	__func__.8992, %object
+	.size	__func__.8992, 22
+__func__.8992:
 	.string	"nand_flash_print_info"
-	.section	.rodata.__func__.9010,"a",@progbits
+	.section	.rodata.__func__.9036,"a",@progbits
 	.align	3
-	.set	.LANCHOR189,. + 0
-	.type	__func__.9010, %object
-	.size	__func__.9010, 16
-__func__.9010:
+	.set	.LANCHOR194,. + 0
+	.type	__func__.9036, %object
+	.size	__func__.9036, 16
+__func__.9036:
 	.string	"nand_flash_init"
-	.section	.rodata.__func__.9030,"a",@progbits
+	.section	.rodata.__func__.9059,"a",@progbits
 	.align	3
-	.set	.LANCHOR143,. + 0
-	.type	__func__.9030, %object
-	.size	__func__.9030, 11
-__func__.9030:
+	.set	.LANCHOR144,. + 0
+	.type	__func__.9059, %object
+	.size	__func__.9059, 11
+__func__.9059:
 	.string	"nandc_init"
-	.section	.rodata.__func__.9190,"a",@progbits
+	.section	.rodata.__func__.9219,"a",@progbits
 	.align	3
-	.set	.LANCHOR51,. + 0
-	.type	__func__.9190, %object
-	.size	__func__.9190, 13
-__func__.9190:
+	.set	.LANCHOR52,. + 0
+	.type	__func__.9219, %object
+	.size	__func__.9219, 13
+__func__.9219:
 	.string	"buf_add_tail"
-	.section	.rodata.__func__.9203,"a",@progbits
+	.section	.rodata.__func__.9232,"a",@progbits
 	.align	3
-	.set	.LANCHOR52,. + 0
-	.type	__func__.9203, %object
-	.size	__func__.9203, 10
-__func__.9203:
+	.set	.LANCHOR54,. + 0
+	.type	__func__.9232, %object
+	.size	__func__.9232, 10
+__func__.9232:
 	.string	"buf_alloc"
-	.section	.rodata.__func__.9217,"a",@progbits
+	.section	.rodata.__func__.9246,"a",@progbits
 	.align	3
-	.set	.LANCHOR53,. + 0
-	.type	__func__.9217, %object
-	.size	__func__.9217, 16
-__func__.9217:
+	.set	.LANCHOR55,. + 0
+	.type	__func__.9246, %object
+	.size	__func__.9246, 16
+__func__.9246:
 	.string	"buf_remove_free"
-	.section	.rodata.__func__.9229,"a",@progbits
+	.section	.rodata.__func__.9258,"a",@progbits
 	.align	3
-	.set	.LANCHOR156,. + 0
-	.type	__func__.9229, %object
-	.size	__func__.9229, 20
-__func__.9229:
+	.set	.LANCHOR157,. + 0
+	.type	__func__.9258, %object
+	.size	__func__.9258, 20
+__func__.9258:
 	.string	"flash_info_blk_init"
-	.section	.rodata.__func__.9240,"a",@progbits
+	.section	.rodata.__func__.9269,"a",@progbits
 	.align	3
-	.set	.LANCHOR142,. + 0
-	.type	__func__.9240, %object
-	.size	__func__.9240, 21
-__func__.9240:
+	.set	.LANCHOR143,. + 0
+	.type	__func__.9269, %object
+	.size	__func__.9269, 21
+__func__.9269:
 	.string	"flash_into_data_init"
-	.section	.rodata.__func__.9262,"a",@progbits
+	.section	.rodata.__func__.9291,"a",@progbits
 	.align	3
-	.set	.LANCHOR188,. + 0
-	.type	__func__.9262, %object
-	.size	__func__.9262, 17
-__func__.9262:
+	.set	.LANCHOR193,. + 0
+	.type	__func__.9291, %object
+	.size	__func__.9291, 17
+__func__.9291:
 	.string	"flash_info_flush"
-	.section	.rodata.__func__.9336,"a",@progbits
+	.section	.rodata.__func__.9367,"a",@progbits
 	.align	3
-	.set	.LANCHOR137,. + 0
-	.type	__func__.9336, %object
-	.size	__func__.9336, 17
-__func__.9336:
+	.set	.LANCHOR138,. + 0
+	.type	__func__.9367, %object
+	.size	__func__.9367, 17
+__func__.9367:
 	.string	"lpa_rebuild_hash"
-	.section	.rodata.__func__.9383,"a",@progbits
+	.section	.rodata.__func__.9414,"a",@progbits
 	.align	3
-	.set	.LANCHOR207,. + 0
-	.type	__func__.9383, %object
-	.size	__func__.9383, 17
-__func__.9383:
+	.set	.LANCHOR211,. + 0
+	.type	__func__.9414, %object
+	.size	__func__.9414, 17
+__func__.9414:
 	.string	"ftl_write_commit"
-	.section	.rodata.__func__.9401,"a",@progbits
+	.section	.rodata.__func__.9432,"a",@progbits
 	.align	3
-	.set	.LANCHOR122,. + 0
-	.type	__func__.9401, %object
-	.size	__func__.9401, 14
-__func__.9401:
+	.set	.LANCHOR120,. + 0
+	.type	__func__.9432, %object
+	.size	__func__.9432, 14
+__func__.9432:
 	.string	"ftl_write_buf"
-	.section	.rodata.__func__.9452,"a",@progbits
-	.align	3
-	.set	.LANCHOR198,. + 0
-	.type	__func__.9452, %object
-	.size	__func__.9452, 15
-__func__.9452:
-	.string	"ftl_read_ahead"
-	.section	.rodata.__func__.9460,"a",@progbits
+	.section	.rodata.__func__.9476,"a",@progbits
 	.align	3
-	.set	.LANCHOR57,. + 0
-	.type	__func__.9460, %object
-	.size	__func__.9460, 13
-__func__.9460:
-	.string	"ftl_read_buf"
-	.section	.rodata.__func__.9498,"a",@progbits
+	.set	.LANCHOR123,. + 0
+	.type	__func__.9476, %object
+	.size	__func__.9476, 18
+__func__.9476:
+	.string	"zftl_add_read_buf"
+	.section	.rodata.__func__.9509,"a",@progbits
 	.align	3
-	.set	.LANCHOR205,. + 0
-	.type	__func__.9498, %object
-	.size	__func__.9498, 10
-__func__.9498:
+	.set	.LANCHOR209,. + 0
+	.type	__func__.9509, %object
+	.size	__func__.9509, 10
+__func__.9509:
 	.string	"zftl_read"
-	.section	.rodata.__func__.9524,"a",@progbits
+	.section	.rodata.__func__.9540,"a",@progbits
 	.align	3
-	.set	.LANCHOR213,. + 0
-	.type	__func__.9524, %object
-	.size	__func__.9524, 13
-__func__.9524:
+	.set	.LANCHOR217,. + 0
+	.type	__func__.9540, %object
+	.size	__func__.9540, 13
+__func__.9540:
 	.string	"_ftl_discard"
-	.section	.rodata.__func__.9643,"a",@progbits
+	.section	.rodata.__func__.9659,"a",@progbits
 	.align	3
-	.set	.LANCHOR63,. + 0
-	.type	__func__.9643, %object
-	.size	__func__.9643, 12
-__func__.9643:
+	.set	.LANCHOR60,. + 0
+	.type	__func__.9659, %object
+	.size	__func__.9659, 12
+__func__.9659:
 	.string	"gc_add_sblk"
-	.section	.rodata.__func__.9664,"a",@progbits
+	.section	.rodata.__func__.9680,"a",@progbits
 	.align	3
-	.set	.LANCHOR162,. + 0
-	.type	__func__.9664, %object
-	.size	__func__.9664, 21
-__func__.9664:
+	.set	.LANCHOR167,. + 0
+	.type	__func__.9680, %object
+	.size	__func__.9680, 21
+__func__.9680:
 	.string	"gc_check_data_one_wl"
-	.section	.rodata.__func__.9698,"a",@progbits
+	.section	.rodata.__func__.9714,"a",@progbits
 	.align	3
-	.set	.LANCHOR201,. + 0
-	.type	__func__.9698, %object
-	.size	__func__.9698, 22
-__func__.9698:
+	.set	.LANCHOR205,. + 0
+	.type	__func__.9714, %object
+	.size	__func__.9714, 22
+__func__.9714:
 	.string	"gc_update_l2p_map_new"
-	.section	.rodata.__func__.9711,"a",@progbits
+	.section	.rodata.__func__.9727,"a",@progbits
 	.align	3
-	.set	.LANCHOR70,. + 0
-	.type	__func__.9711, %object
-	.size	__func__.9711, 19
-__func__.9711:
+	.set	.LANCHOR67,. + 0
+	.type	__func__.9727, %object
+	.size	__func__.9727, 19
+__func__.9727:
 	.string	"gc_write_completed"
-	.section	.rodata.__func__.9740,"a",@progbits
+	.section	.rodata.__func__.9756,"a",@progbits
 	.align	3
-	.set	.LANCHOR209,. + 0
-	.type	__func__.9740, %object
-	.size	__func__.9740, 16
-__func__.9740:
+	.set	.LANCHOR213,. + 0
+	.type	__func__.9756, %object
+	.size	__func__.9756, 16
+__func__.9756:
 	.string	"gc_do_copy_back"
-	.section	.rodata.__func__.9762,"a",@progbits
+	.section	.rodata.__func__.9778,"a",@progbits
 	.align	3
-	.set	.LANCHOR106,. + 0
-	.type	__func__.9762, %object
-	.size	__func__.9762, 16
-__func__.9762:
+	.set	.LANCHOR103,. + 0
+	.type	__func__.9778, %object
+	.size	__func__.9778, 16
+__func__.9778:
 	.string	"gc_free_src_blk"
-	.section	.rodata.__func__.9807,"a",@progbits
+	.section	.rodata.__func__.9823,"a",@progbits
 	.align	3
-	.set	.LANCHOR202,. + 0
-	.type	__func__.9807, %object
-	.size	__func__.9807, 16
-__func__.9807:
+	.set	.LANCHOR206,. + 0
+	.type	__func__.9823, %object
+	.size	__func__.9823, 16
+__func__.9823:
 	.string	"gc_scan_src_blk"
-	.section	.rodata.__func__.9865,"a",@progbits
+	.section	.rodata.__func__.9881,"a",@progbits
 	.align	3
-	.set	.LANCHOR203,. + 0
-	.type	__func__.9865, %object
-	.size	__func__.9865, 20
-__func__.9865:
+	.set	.LANCHOR207,. + 0
+	.type	__func__.9881, %object
+	.size	__func__.9881, 20
+__func__.9881:
 	.string	"gc_scan_static_data"
-	.section	.rodata.__func__.9932,"a",@progbits
+	.section	.rodata.__func__.9948,"a",@progbits
 	.align	3
-	.set	.LANCHOR211,. + 0
-	.type	__func__.9932, %object
-	.size	__func__.9932, 11
-__func__.9932:
+	.set	.LANCHOR215,. + 0
+	.type	__func__.9948, %object
+	.size	__func__.9948, 11
+__func__.9948:
 	.string	"zftl_do_gc"
 	.section	.rodata._list_remove_node.str1.1,"aMS",@progbits,1
 .LC0:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
 	.section	.rodata.dump_ftl_info.str1.1,"aMS",@progbits,1
-.LC149:
+.LC151:
 	.string	"free_buf_count: %d\n"
-.LC150:
+.LC152:
 	.string	"g_ftl_info_blk blk:0x%x, index:0x%x, page:0x%x\n"
-.LC151:
+.LC153:
 	.string	"ftl_ext_info_blk blk:0x%x, page:0x%x\n"
-.LC152:
+.LC154:
 	.string	"ac_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC153:
+.LC155:
 	.string	"tmp_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC154:
+.LC156:
 	.string	"gc_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC155:
+.LC157:
 	.string	"lpa:"
-.LC156:
+.LC158:
 	.string	"vpn:"
-.LC157:
+.LC159:
 	.string	"sblk:"
-.LC158:
+.LC160:
 	.string	"lpa_hash:"
-.LC159:
+.LC161:
 	.string	"lpa_hash_index:"
 	.section	.rodata.dump_sblk_queue.str1.1,"aMS",@progbits,1
 .LC68:
@@ -24484,11 +24946,11 @@ __func__.9932:
 .LC116:
 	.string	"no sys info %x\n"
 	.section	.rodata.flash_info_flush.str1.1,"aMS",@progbits,1
-.LC144:
+.LC146:
 	.string	"finfo:"
-.LC145:
+.LC147:
 	.string	"flash_info_flush id = %x, page = %x\n"
-.LC146:
+.LC148:
 	.string	"sys_info_flush error:%x\n"
 	.section	.rodata.flash_into_data_init.str1.1,"aMS",@progbits,1
 .LC84:
@@ -24497,18 +24959,18 @@ __func__.9932:
 .LC40:
 	.string	"flash_mask_bad_block %d %d\n"
 	.section	.rodata.flash_prog_page.str1.1,"aMS",@progbits,1
-.LC120:
-	.string	"flash_prog_page %x %x %x\n"
 .LC121:
+	.string	"flash_prog_page %x %x %x\n"
+.LC122:
 	.string	"flash_prog_page page_addr = %x status = %x\n"
 	.section	.rodata.flash_prog_page_en.str1.1,"aMS",@progbits,1
-.LC126:
-	.string	"flash_prog_page_en:%x %x\n"
 .LC127:
-	.string	"spare"
+	.string	"flash_prog_page_en:%x %x\n"
 .LC128:
-	.string	"data"
+	.string	"spare"
 .LC129:
+	.string	"data"
+.LC130:
 	.string	"write error: %x\n"
 	.section	.rodata.flash_read_id.str1.1,"aMS",@progbits,1
 .LC38:
@@ -24518,7 +24980,7 @@ __func__.9932:
 	.string	"flash_read_page %x %x %x\n"
 	.section	.rodata.flash_read_page_en.str1.1,"aMS",@progbits,1
 .LC112:
-	.string	"flash_read_page_en %x %x\n"
+	.string	"flash_read_page_en %x %x %x\n"
 .LC113:
 	.string	"flash_read_page_en %x %x error_ecc %d %d\n"
 	.section	.rodata.flash_set_interface_mode.str1.1,"aMS",@progbits,1
@@ -24529,48 +24991,46 @@ __func__.9932:
 	.section	.rodata.ftl_alloc_sblk.str1.1,"aMS",@progbits,1
 .LC67:
 	.string	"alloc sblk %x %d\n"
+	.section	.rodata.ftl_ext_info_init.str1.1,"aMS",@progbits,1
+.LC135:
+	.string	"%s %d %d %x %x\n"
 	.section	.rodata.ftl_free_sblk.str1.1,"aMS",@progbits,1
 .LC55:
 	.string	"swl_tlc_free_mini_ec_blk sblk %x\n"
 .LC56:
 	.string	"swl_slc_free_mini_ec_blk sblk %x\n"
 	.section	.rodata.ftl_info_blk_init.str1.1,"aMS",@progbits,1
-.LC132:
-	.string	"%d %x @%d %x\n"
 .LC133:
+	.string	"%d %x @%d %x\n"
+.LC134:
 	.string	"ftl_info_blk_init %d %d %x\n"
 	.section	.rodata.ftl_info_flush.str1.1,"aMS",@progbits,1
-.LC131:
+.LC132:
 	.string	"g_ftl_info_blk blk = %x, page = %x version = %d\n"
 	.section	.rodata.ftl_low_format.str1.1,"aMS",@progbits,1
-.LC134:
+.LC136:
 	.string	"ftl_low_format %d\n"
-.LC135:
+.LC137:
 	.string	"low format %d %d %d %d\n"
 	.section	.rodata.ftl_mask_bad_block.str1.1,"aMS",@progbits,1
 .LC60:
 	.string	"mask bad block:cs %x block: %x\n"
 	.section	.rodata.ftl_open_sblk_recovery.str1.1,"aMS",@progbits,1
-.LC137:
+.LC139:
 	.string	"saved_active_page  = %x\n"
-.LC138:
+.LC140:
 	.string	"saved_active_plane = %x\n"
-.LC139:
+.LC141:
 	.string	"sblk = %x\n"
-.LC140:
+.LC142:
 	.string	"phy_blk = %x %x\n"
-.LC141:
+.LC143:
 	.string	"sblk = %x, vpn0 = %d, vpn1 = %d\n"
-.LC142:
+.LC144:
 	.string	"dump write = %x\n"
 	.section	.rodata.ftl_re_low_format.str1.1,"aMS",@progbits,1
-.LC136:
+.LC138:
 	.string	"re low format %d\n"
-	.section	.rodata.ftl_read_ahead.str1.1,"aMS",@progbits,1
-.LC170:
-	.string	"ftl_read_ahead refresh =%x, lpa = %x, ppa= %x\n"
-.LC171:
-	.string	"id=%d, lpa = %x, ppa = %x spare = %x %x %x %x\n"
 	.section	.rodata.ftl_sblk_dump.str1.1,"aMS",@progbits,1
 .LC194:
 	.string	"ftl_sblk_dump = %x %d %d %d %d\n"
@@ -24583,27 +25043,27 @@ __func__.9932:
 .LC198:
 	.string	"block = %x, vpn=%x check vpn = %d\n"
 	.section	.rodata.ftl_sysblk_dump.str1.1,"aMS",@progbits,1
-.LC147:
+.LC149:
 	.string	"blk= %x, page=%x, ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
-.LC148:
+.LC150:
 	.string	"l2p:"
 	.section	.rodata.ftl_test_block.str1.1,"aMS",@progbits,1
-.LC130:
+.LC131:
 	.string	"low format %d\n"
 	.section	.rodata.ftl_update_l2p_map.str1.1,"aMS",@progbits,1
-.LC201:
-	.string	"ftl_update_l2p_map: %x %x %x\n"
 .LC202:
-	.string	"ftl_update_l2p_map"
+	.string	"ftl_update_l2p_map: %x %x %x\n"
 .LC203:
-	.string	"lpa_tbl:"
+	.string	"ftl_update_l2p_map"
 .LC204:
+	.string	"lpa_tbl:"
+.LC205:
 	.string	"sblk %x vpn: %d %d\n"
 	.section	.rodata.ftl_vpn_decrement.str1.1,"aMS",@progbits,1
 .LC59:
 	.string	"ftl_vpn_decrement %x = %d\n"
 	.section	.rodata.ftl_write_commit.str1.1,"aMS",@progbits,1
-.LC205:
+.LC206:
 	.string	"%d read error: ppa:%x, lpa:%x, status:%x\n"
 	.section	.rodata.ftl_write_completed.str1.1,"aMS",@progbits,1
 .LC66:
@@ -24614,16 +25074,16 @@ __func__.9932:
 .LC42:
 	.string	"gc_add_sblk = %d, %d, %d,last update:%d, %d\n"
 	.section	.rodata.gc_check_data_one_wl.str1.1,"aMS",@progbits,1
-.LC119:
+.LC120:
 	.string	"1ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
 	.section	.rodata.gc_do_copy_back.str1.1,"aMS",@progbits,1
-.LC206:
-	.string	"gc page in buf: lpa %x ppa = %x pageindex= %x\n"
 .LC207:
-	.string	"gc_do_copy_back: lpa %x des_ppa = %x %x gc_ppa= %x page_index= %d\n"
+	.string	"gc page in buf: lpa %x ppa = %x pageindex= %x\n"
 .LC208:
-	.string	"gc_do_copy_back: %x %x %x %x gc_ppa:%x %x\n"
+	.string	"gc_do_copy_back: lpa %x des_ppa = %x %x gc_ppa= %x page_index= %d\n"
 .LC209:
+	.string	"gc_do_copy_back: %x %x %x %x gc_ppa:%x %x\n"
+.LC210:
 	.string	"%d prog_step: %x %x buf id= %x ppa = %x hash=%x id = %x plane = %x lpa=%x\n"
 	.section	.rodata.gc_free_src_blk.str1.1,"aMS",@progbits,1
 .LC57:
@@ -24692,24 +25152,24 @@ __func__.9932:
 .LC108:
 	.string	"hynix RR %d row=%x, count %d, status=%d\n"
 	.section	.rodata.idb_write_data.str1.1,"aMS",@progbits,1
-.LC122:
-	.string	"1 write_idblock fix data %x %x %x\n"
 .LC123:
-	.string	"write_idblock check fail! %x\n"
+	.string	"1 write_idblock fix data %x %x %x\n"
 .LC124:
+	.string	"write_idblock check fail! %x\n"
+.LC125:
 	.string	"write_idblock fail! %x\n"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",@progbits,1
-.LC161:
+.LC163:
 	.string	"region_id = %d, pm_max_region = %d\n"
-.LC162:
+.LC164:
 	.string	"load_l2p_region no ppa = %x , %x, all setting 0xff....\n"
-.LC163:
+.LC165:
 	.string	"load_l2p_region = %x,%x,%x, %x\n"
-.LC164:
+.LC166:
 	.string	"pm_ppa:"
-.LC165:
+.LC167:
 	.string	"data:"
-.LC166:
+.LC168:
 	.string	"spare:"
 	.section	.rodata.lpa_rebuild_hash.str1.1,"aMS",@progbits,1
 .LC72:
@@ -24814,18 +25274,18 @@ __func__.9932:
 .LC83:
 	.string	"ftl_free_no_use_map_blk %x %x %x %d\n"
 	.section	.rodata.pm_init.str1.1,"aMS",@progbits,1
-.LC167:
+.LC169:
 	.string	"pm_init posr %x %x %x\n"
-.LC168:
+.LC170:
 	.string	"pm_init recovery %x %x %x\n"
 	.section	.rodata.pm_log2phys.str1.1,"aMS",@progbits,1
-.LC169:
+.LC171:
 	.string	"pm_log2phys  lpn = %d, max lpn = %d\n"
 	.section	.rodata.pm_ppa_update_check.str1.1,"aMS",@progbits,1
-.LC160:
+.LC162:
 	.string	"%s w error lpn = %x, max ppa = %d\n"
 	.section	.rodata.pm_write_page.str1.1,"aMS",@progbits,1
-.LC143:
+.LC145:
 	.string	"pm_write_page write error: %x\n"
 	.section	.rodata.print_ftl_debug_info.str1.1,"aMS",@progbits,1
 .LC61:
@@ -24848,10 +25308,12 @@ __func__.9932:
 	.string	"%d: node:%x %x %x %x, %d %d %d %d %d\n"
 	.section	.rodata.queue_wait_first_req_completed.str1.1,"aMS",@progbits,1
 .LC118:
+	.string	"read: %x %x %x %x\n"
+.LC119:
 	.string	"set buf %d,status = %x, ppa = %x lun state = %d\n"
 	.section	.rodata.random_seed,"a",@progbits
 	.align	3
-	.set	.LANCHOR47,. + 0
+	.set	.LANCHOR48,. + 0
 	.type	random_seed, %object
 	.size	random_seed, 256
 random_seed:
@@ -24999,11 +25461,11 @@ random_seed:
 .LC39:
 	.string	"bad block test:%x %x\n"
 	.section	.rodata.sblk_prog_page.str1.1,"aMS",@progbits,1
-.LC125:
+.LC126:
 	.string	"sblk_prog_page ppa = %x, count = %d\n"
 	.section	.rodata.toshiba_15ref_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR17,. + 0
+	.set	.LANCHOR21,. + 0
 	.type	toshiba_15ref_value, %object
 	.size	toshiba_15ref_value, 95
 toshiba_15ref_value:
@@ -25533,7 +25995,7 @@ toshiba_3D_tlc_value:
 	.string	"toshiba RR %d row=%x,count %d,status=%d\n"
 	.section	.rodata.toshiba_A19ref_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR18,. + 0
+	.set	.LANCHOR22,. + 0
 	.type	toshiba_A19ref_value, %object
 	.size	toshiba_A19ref_value, 45
 toshiba_A19ref_value:
@@ -25584,7 +26046,7 @@ toshiba_A19ref_value:
 	.byte	0
 	.section	.rodata.toshiba_ref_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR20,. + 0
+	.set	.LANCHOR24,. + 0
 	.type	toshiba_ref_value, %object
 	.size	toshiba_ref_value, 8
 toshiba_ref_value:
@@ -25597,16 +26059,16 @@ toshiba_ref_value:
 	.byte	12
 	.byte	112
 	.section	.rodata.zftl_discard.str1.1,"aMS",@progbits,1
-.LC215:
+.LC216:
 	.string	"ftl_discard:(%x, %x, %x, %x)\n"
 	.section	.rodata.zftl_do_gc.str1.1,"aMS",@progbits,1
-.LC210:
-	.string	"gc %d: %d %d %d %d %d %d %d\n"
 .LC211:
-	.string	"gc %d: %d %d %d %d %d %d\n"
+	.string	"gc %d: %d %d %d %d %d %d %d\n"
 .LC212:
-	.string	"GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\n"
+	.string	"gc %d: %d %d %d %d %d %d\n"
 .LC213:
+	.string	"GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\n"
+.LC214:
 	.string	"gc free %x, %d\n"
 	.section	.rodata.zftl_gc_get_free_sblk.str1.1,"aMS",@progbits,1
 .LC49:
@@ -25620,7 +26082,7 @@ toshiba_ref_value:
 	.string	"swl_slc_free_mini_ec_blk alloc sblk %x\n"
 	.section	.rodata.zftl_init.str1.1,"aMS",@progbits,1
 .LC175:
-	.string	"FTL version: 6.0.8 20180511"
+	.string	"FTL version: 6.0.8 20180615"
 .LC176:
 	.string	"_c_user_data_density := %d\n"
 .LC177:
@@ -25648,10 +26110,12 @@ toshiba_ref_value:
 	.string	"ftl_read %x %x %x\n"
 .LC200:
 	.string	"ftl_read refresh =%x, lpa = %x, ppa= %x\n"
+.LC201:
+	.string	"id=%d, lpa = %x, ppa = %x spare = %x %x %x %x\n"
 	.section	.rodata.zftl_sblk_list_init.str1.1,"aMS",@progbits,1
 .LC82:
 	.string	"free blk vpn error: %x %x\n"
 	.section	.rodata.zftl_write.str1.1,"aMS",@progbits,1
-.LC214:
+.LC215:
 	.string	"ftlwrite %x %x %x\n"
 	.hidden	free

commit 058e5d949750ef2d182bb820262222eef79b001f
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Sat Mar 24 11:29:52 2018 +0800

    rockchip: px30: implement set_armclk_rate()
    
    Add support to set armclk rate.
    
    Change-Id: Ie96d8680e9b3666f8131aeb553594a271d426566
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index e4ed09dabe..fe40897830 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -140,6 +140,11 @@ __weak int soc_clk_dump(void)
 	return 0;
 }
 
+__weak int set_armclk_rate(void)
+{
+	return 0;
+}
+
 int board_late_init(void)
 {
 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0)
@@ -233,6 +238,7 @@ int board_init(void)
 	if (ret)
 		debug("%s: Cannot enable boot on regulator\n", __func__);
 #endif
+	set_armclk_rate();
 
 	return rk_board_init();
 }
diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c
index 42c9d5f5e2..0aefee52dd 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -4,10 +4,15 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 #include <common.h>
+#include <clk.h>
+#include <dm.h>
 #include <asm/io.h>
 #include <asm/arch/grf_px30.h>
 #include <asm/arch/hardware.h>
 #include <asm/armv8/mmu.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_px30.h>
+#include <dt-bindings/clock/px30-cru.h>
 
 #define PMU_PWRDN_CON	0xff000018
 
@@ -61,3 +66,25 @@ static struct px30_grf * const grf = (void *)GRF_BASE;
 		     CON_IOMUX_UART2SEL_MASK,
 		     CON_IOMUX_UART2SEL_M0 << CON_IOMUX_UART2SEL_SHIFT);
 }
+
+int set_armclk_rate(void)
+{
+	struct px30_clk_priv *priv;
+	struct clk clk;
+	int ret;
+
+	ret = rockchip_get_clk(&clk.dev);
+	if (ret) {
+		printf("Failed to get clk dev\n");
+		return ret;
+	}
+	clk.id = ARMCLK;
+	priv = dev_get_priv(clk.dev);
+	ret = clk_set_rate(&clk, priv->armclk_hz);
+	if (ret < 0) {
+		printf("Failed to set armclk %lu\n", priv->armclk_hz);
+		return ret;
+	}
+
+	return 0;
+}

commit 37428b9209c97e0b30487c6d6e601d55222371c2
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Fri Mar 23 17:35:39 2018 +0800

    rockchip: clk: px30: Add support to set and get armclk rate
    
    Change-Id: I40948e5cedb781cad7129b02dfbf34fecb8689ca
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_px30.h b/arch/arm/include/asm/arch-rockchip/cru_px30.h
index f43fd09ffd..3094246b38 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_px30.h
@@ -14,9 +14,6 @@
 
 #define APLL_HZ		(600 * MHz)
 
-#define CORE_ACLK_HZ	(APLL_HZ / 2)
-#define CORE_DBG_HZ	(APLL_HZ / 4)
-
 /* PX30 pll id */
 enum px30_pll_id {
 	APLL,
@@ -37,6 +34,7 @@ struct px30_clk_info {
 struct px30_clk_priv {
 	struct px30_cru *cru;
 	ulong gpll_hz;
+	ulong armclk_hz;
 };
 
 struct px30_pmuclk_priv {
@@ -112,6 +110,12 @@ struct pll_rate_table {
 	unsigned int frac;
 };
 
+struct cpu_rate_table {
+	unsigned long rate;
+	unsigned int aclk_div;
+	unsigned int pclk_div;
+};
+
 enum {
 	/* PLLCON0*/
 	PLL_BP_SHIFT		= 15,
diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 25b5568034..87705cf542 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -38,6 +38,13 @@ enum {
 	.frac = _frac,						\
 }
 
+#define PX30_CPUCLK_RATE(_rate, _aclk_div, _pclk_div)		\
+{								\
+	.rate	= _rate##U,					\
+	.aclk_div = _aclk_div,					\
+	.pclk_div = _pclk_div,					\
+}
+
 #define DIV_TO_RATE(input_rate, div)    ((input_rate) / ((div) + 1))
 
 #define PX30_CLK_DUMP(_id, _name, _iscru)	\
@@ -52,6 +59,7 @@ static struct pll_rate_table px30_pll_rates[] = {
 	PX30_PLL_RATE(1200000000, 1, 50, 1, 1, 1, 0),
 	PX30_PLL_RATE(1188000000, 2, 99, 1, 1, 1, 0),
 	PX30_PLL_RATE(1100000000, 12, 550, 1, 1, 1, 0),
+	PX30_PLL_RATE(1008000000, 1, 84, 2, 1, 1, 0),
 	PX30_PLL_RATE(1000000000, 6, 500, 2, 1, 1, 0),
 	PX30_PLL_RATE(816000000, 1, 68, 2, 1, 1, 0),
 	PX30_PLL_RATE(600000000, 1, 75, 3, 1, 1, 0),
@@ -71,6 +79,13 @@ static const struct px30_clk_info clks_dump[] = {
 	PX30_CLK_DUMP(PCLK_PMU_PRE, "pclk_pmu", false),
 };
 
+static struct cpu_rate_table px30_cpu_rates[] = {
+	PX30_CPUCLK_RATE(1200000000, 1, 5),
+	PX30_CPUCLK_RATE(1008000000, 1, 5),
+	PX30_CPUCLK_RATE(816000000, 1, 3),
+	PX30_CPUCLK_RATE(600000000, 1, 3),
+};
+
 static u8 pll_mode_shift[PLL_COUNT] = {
 	APLL_MODE_SHIFT, DPLL_MODE_SHIFT, CPLL_MODE_SHIFT,
 	NPLL_MODE_SHIFT, GPLL_MODE_SHIFT
@@ -161,6 +176,19 @@ static const struct pll_rate_table *get_pll_settings(unsigned long rate)
 	return pll_clk_set_by_auto(rate);
 }
 
+static const struct cpu_rate_table *get_cpu_settings(unsigned long rate)
+{
+	unsigned int rate_count = ARRAY_SIZE(px30_cpu_rates);
+	int i;
+
+	for (i = 0; i < rate_count; i++) {
+		if (rate == px30_cpu_rates[i].rate)
+			return &px30_cpu_rates[i];
+	}
+
+	return NULL;
+}
+
 /*
  * How to calculate the PLL(from TRM V0.3 Part 1 Page 63):
  * Formulas also embedded within the Fractional PLL Verilog model:
@@ -788,6 +816,49 @@ static ulong px30_clk_get_pll_rate(struct px30_clk_priv *priv,
 	return rkclk_pll_get_rate(&cru->pll[pll_id], &cru->mode, pll_id);
 }
 
+static ulong px30_armclk_set_clk(struct px30_clk_priv *priv, ulong hz)
+{
+	struct px30_cru *cru = priv->cru;
+	const struct cpu_rate_table *rate;
+	ulong old_rate;
+
+	rate = get_cpu_settings(hz);
+	if (!rate) {
+		printf("%s unsupport rate\n", __func__);
+		return -EINVAL;
+	}
+
+	/*
+	 * select apll as cpu/core clock pll source and
+	 * set up dependent divisors for PERI and ACLK clocks.
+	 * core hz : apll = 1:1
+	 */
+	old_rate = px30_clk_get_pll_rate(priv, APLL);
+	if (old_rate > hz) {
+		if (rkclk_set_pll(&cru->pll[APLL], &cru->mode, APLL, hz))
+			return -EINVAL;
+		rk_clrsetreg(&cru->clksel_con[0],
+			     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK |
+			     CORE_ACLK_DIV_MASK | CORE_DBG_DIV_MASK,
+			     rate->aclk_div << CORE_ACLK_DIV_SHIFT |
+			     rate->pclk_div << CORE_DBG_DIV_SHIFT |
+			     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
+			     0 << CORE_DIV_CON_SHIFT);
+	} else if (old_rate < hz) {
+		rk_clrsetreg(&cru->clksel_con[0],
+			     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK |
+			     CORE_ACLK_DIV_MASK | CORE_DBG_DIV_MASK,
+			     rate->aclk_div << CORE_ACLK_DIV_SHIFT |
+			     rate->pclk_div << CORE_DBG_DIV_SHIFT |
+			     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
+			     0 << CORE_DIV_CON_SHIFT);
+		if (rkclk_set_pll(&cru->pll[APLL], &cru->mode, APLL, hz))
+			return -EINVAL;
+	}
+
+	return px30_clk_get_pll_rate(priv, APLL);
+}
+
 static ulong px30_clk_get_rate(struct clk *clk)
 {
 	struct px30_clk_priv *priv = dev_get_priv(clk->dev);
@@ -817,6 +888,9 @@ static ulong px30_clk_get_rate(struct clk *clk)
 	case PLL_NPLL:
 		rate = px30_clk_get_pll_rate(priv, NPLL);
 		break;
+	case ARMCLK:
+		rate = px30_clk_get_pll_rate(priv, APLL);
+		break;
 	case HCLK_SDMMC:
 	case HCLK_EMMC:
 	case SCLK_SDMMC:
@@ -877,8 +951,11 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate)
 
 	debug("%s %ld %ld\n", __func__, clk->id, rate);
 	switch (clk->id) {
-	case 0 ... 15:
-		return 0;
+	case ARMCLK:
+		if (priv->armclk_hz)
+			px30_armclk_set_clk(priv, rate);
+		priv->armclk_hz = rate;
+		break;
 	case HCLK_SDMMC:
 	case HCLK_EMMC:
 	case SCLK_SDMMC:
@@ -1054,26 +1131,12 @@ static struct clk_ops px30_clk_ops = {
 static int px30_clk_probe(struct udevice *dev)
 {
 	struct px30_clk_priv *priv = dev_get_priv(dev);
-	struct px30_cru *cru = priv->cru;
-	u32 aclk_div, pclk_div;
 
-	/* init pll */
-	rkclk_set_pll(&cru->pll[APLL], &cru->mode, APLL, APLL_HZ);
-	/*
-	 * select apll as cpu/core clock pll source and
-	 * set up dependent divisors for PERI and ACLK clocks.
-	 * core hz : apll = 1:1
-	 */
-	aclk_div = APLL_HZ / CORE_ACLK_HZ - 1;
-	pclk_div = APLL_HZ / CORE_DBG_HZ - 1;
-
-	rk_clrsetreg(&cru->clksel_con[0],
-		     CORE_ACLK_DIV_MASK | CORE_DBG_DIV_MASK |
-		     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK,
-		     aclk_div << CORE_ACLK_DIV_SHIFT |
-		     pclk_div << CORE_DBG_DIV_SHIFT |
-		     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
-		     0 << CORE_DIV_CON_SHIFT);
+	if (px30_clk_get_pll_rate(priv, APLL) == APLL_HZ)
+		return 0;
+
+	if (px30_armclk_set_clk(priv, APLL_HZ))
+		return -EINVAL;
 
 	return 0;
 }

commit 4a9de4c99bda127013d4fb8c319b624246555025
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Fri Jun 22 11:19:49 2018 +0800

    rockchip: clk: px30: Avoid emmc, sdmmc, nandc, rate overflowing
    
    Change-Id: I75b5bed7962fcd7ffad84dc1c4d2ffbbf1404ad3
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index b6fec42679..25b5568034 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -1220,6 +1220,10 @@ static ulong px30_gpll_set_pmuclk(struct px30_pmuclk_priv *priv, ulong hz)
 	nandc_rate = px30_nandc_get_clk(cru_priv);
 	debug("%s emmc=%lu, sdmmc=%lu, nandc=%lu\n", __func__, emmc_rate,
 	      sdmmc_rate, nandc_rate);
+	/* avoid rate too large, reduce rate first */
+	px30_mmc_set_clk(cru_priv, SCLK_EMMC, emmc_rate / div);
+	px30_mmc_set_clk(cru_priv, SCLK_SDMMC, sdmmc_rate / div);
+	px30_nandc_set_clk(cru_priv, nandc_rate / div);
 
 	rkclk_set_pll(&pmucru->pll, &pmucru->pmu_mode, GPLL, hz);
 	priv->gpll_hz = px30_gpll_get_pmuclk(priv);

commit 60a1199e4138c08680af8cc75b4156dc021da100
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Fri Jun 22 10:35:15 2018 +0800

    rockchip: clk: px30: fix nandc clock freq caculate
    
    The nandc clk no need div 2.
    
    Change-Id: I9e33ef3a4b5c5dcd024f3aed26ddee9fb8e6af6c
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index a964400de0..b6fec42679 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -342,7 +342,7 @@ static ulong px30_nandc_get_clk(struct px30_clk_priv *priv)
 	con = readl(&cru->clksel_con[15]);
 	div = (con & NANDC_DIV_MASK) >> NANDC_DIV_SHIFT;
 
-	return DIV_TO_RATE(priv->gpll_hz, div) / 2;
+	return DIV_TO_RATE(priv->gpll_hz, div);
 }
 
 static ulong px30_nandc_set_clk(struct px30_clk_priv *priv,
@@ -353,7 +353,7 @@ static ulong px30_nandc_set_clk(struct px30_clk_priv *priv,
 
 	/* Select nandc source from GPLL by default */
 	/* nandc clock defaulg div 2 internal, need provide double in cru */
-	src_clk_div = DIV_ROUND_UP(priv->gpll_hz / 2, set_rate);
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, set_rate);
 	assert(src_clk_div - 1 < 31);
 
 	rk_clrsetreg(&cru->clksel_con[15],

commit dd472d4ff5b10cfcbdc7e46ec8efef420dc7b003
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Thu Jun 21 18:23:56 2018 +0800

    rockchip: clk: px30: Change apll rate to 600MHz
    
    The initial voltage may be too low for 816MHz and it is enough for
    600MHz.
    
    Change-Id: Ifa1438d8d3056c9fb8fb3e578a28c26682a27e46
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_px30.h b/arch/arm/include/asm/arch-rockchip/cru_px30.h
index acaa204a25..f43fd09ffd 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_px30.h
@@ -12,10 +12,10 @@
 #define KHz		1000
 #define OSC_HZ		(24 * MHz)
 
-#define APLL_HZ		(816 * MHz)
+#define APLL_HZ		(600 * MHz)
 
-#define CORE_PERI_HZ	204000000
-#define CORE_ACLK_HZ	408000000
+#define CORE_ACLK_HZ	(APLL_HZ / 2)
+#define CORE_DBG_HZ	(APLL_HZ / 4)
 
 /* PX30 pll id */
 enum px30_pll_id {
diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 7fbb279247..a964400de0 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -54,6 +54,7 @@ static struct pll_rate_table px30_pll_rates[] = {
 	PX30_PLL_RATE(1100000000, 12, 550, 1, 1, 1, 0),
 	PX30_PLL_RATE(1000000000, 6, 500, 2, 1, 1, 0),
 	PX30_PLL_RATE(816000000, 1, 68, 2, 1, 1, 0),
+	PX30_PLL_RATE(600000000, 1, 75, 3, 1, 1, 0),
 };
 
 static const struct px30_clk_info clks_dump[] = {
@@ -1054,7 +1055,7 @@ static int px30_clk_probe(struct udevice *dev)
 {
 	struct px30_clk_priv *priv = dev_get_priv(dev);
 	struct px30_cru *cru = priv->cru;
-	u32 aclk_div;
+	u32 aclk_div, pclk_div;
 
 	/* init pll */
 	rkclk_set_pll(&cru->pll[APLL], &cru->mode, APLL, APLL_HZ);
@@ -1064,10 +1065,13 @@ static int px30_clk_probe(struct udevice *dev)
 	 * core hz : apll = 1:1
 	 */
 	aclk_div = APLL_HZ / CORE_ACLK_HZ - 1;
+	pclk_div = APLL_HZ / CORE_DBG_HZ - 1;
+
 	rk_clrsetreg(&cru->clksel_con[0],
-		     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK |
-		     CORE_ACLK_DIV_MASK,
+		     CORE_ACLK_DIV_MASK | CORE_DBG_DIV_MASK |
+		     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK,
 		     aclk_div << CORE_ACLK_DIV_SHIFT |
+		     pclk_div << CORE_DBG_DIV_SHIFT |
 		     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
 		     0 << CORE_DIV_CON_SHIFT);
 

commit c2304c02b148bdde20cb77ab5b01be65307c2c91
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jun 14 10:55:46 2018 +0800

    console: add warning message if slient console is enabled
    
    Change-Id: Ibc50e9bc19c77bb688a0312c1d1290250a9b6a2f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/console.c b/common/console.c
index f83528ca60..cbec485345 100644
--- a/common/console.c
+++ b/common/console.c
@@ -666,10 +666,12 @@ int console_assign(int file, const char *devname)
 static void console_update_silent(void)
 {
 #ifdef CONFIG_SILENT_CONSOLE
-	if (env_get("silent") != NULL)
+	if (env_get("silent") != NULL) {
+		printf("U-Boot: enable slient console\n");
 		gd->flags |= GD_FLG_SILENT;
-	else
+	} else {
 		gd->flags &= ~GD_FLG_SILENT;
+	}
 #endif
 }
 

commit 541f90ebf1638c84d29a1bcefe354945b3b98c26
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Fri Jun 22 11:39:07 2018 +0800

    drivers: core: do not use nand node from kernel dtb
    
    Do not use nand node from kernel dtb, or the driver will
    be initialized twice.
    
    Change-Id: Iae3e76094d074549e6f52c20261ceefa9b98be1b
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/drivers/core/device.c b/drivers/core/device.c
index f754824c22..825dc6bc0f 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -51,8 +51,8 @@ static int device_bind_common(struct udevice *parent, const struct driver *drv,
 	}
 
 #ifdef CONFIG_USING_KERNEL_DTB
-	/* Do not use mmc node from kernel dtb */
-	if(drv->id == UCLASS_MMC)
+	/* Do not use mmc node and nand node from kernel dtb */
+	if(drv->id == UCLASS_MMC || drv->id == UCLASS_RKNAND)
 	list_for_each_entry(dev, &uc->dev_head, uclass_node) {
 		if (!strcmp(name, dev->name)){
 			debug("%s do not bind dev already in list %s\n",

commit adde78bf7034484a41dd086ab2cb16c8f5d724b8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jun 21 10:44:56 2018 +0800

    serial: ns16550: use fifo and flush console before jumping to OS
    
    with this patch, U-Boot can save a lot of boot time which
    depends on how much log we print.
    
    Change-Id: Ib96e9343e9439d251c2c40be14609bc08d638931
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index 5e6336cbd8..fd2f101992 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -92,6 +92,18 @@ static void announce_and_cleanup(int fake)
 	udc_disconnect();
 #endif
 
+#ifdef CONFIG_ARCH_ROCKCHIP
+	/* Enable this flag, call putc to flush console(ns16550_serial_putc)*/
+	gd->flags |= GD_FLG_OS_RUN;
+	/*
+	 * This putc is only for calling ns16550_serial_putc() to flush console.
+	 * Console uclass framework is quite complicated, it's not easy to
+	 * flush console by privoding a new interface which must provide a
+	 * udevice here, so we use an easy way to achieve that.
+	 */
+	putc('\n');
+#endif
+
 	board_quiesce_devices();
 
 	/*
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index 490087c017..ad7a3d77ab 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -318,8 +318,20 @@ static int ns16550_serial_putc(struct udevice *dev, const char ch)
 {
 	struct NS16550 *const com_port = dev_get_priv(dev);
 
+#ifdef CONFIG_ARCH_ROCKCHIP
+	/*
+	 * Use fifo function.
+	 *
+	 * UART_USR: bit1 trans_fifo_not_full:
+	 *	0 = Transmit FIFO is full;
+	 *	1 = Transmit FIFO is not full;
+	 */
+	while (!(serial_in(&com_port->rbr + 0x1f) & 0x02))
+		;
+#else
 	if (!(serial_in(&com_port->lsr) & UART_LSR_THRE))
 		return -EAGAIN;
+#endif
 	serial_out(ch, &com_port->thr);
 
 	/*
@@ -331,6 +343,20 @@ static int ns16550_serial_putc(struct udevice *dev, const char ch)
 	if (ch == '\n')
 		WATCHDOG_RESET();
 
+#ifdef CONFIG_ARCH_ROCKCHIP
+	/*
+	 * Wait fifo flush.
+	 *
+	 * UART_USR: bit2 trans_fifo_empty:
+	 *	0 = Transmit FIFO is not empty
+	 *	1 = Transmit FIFO is empty
+	 */
+	if (gd->flags & GD_FLG_OS_RUN) {
+		while (!(serial_in(&com_port->rbr + 0x1f) & 0x04))
+			;
+	}
+#endif
+
 	return 0;
 }
 
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index 5aaa78b06a..5158bc8817 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -156,4 +156,9 @@ typedef struct global_data {
 #define GD_FLG_SPL_EARLY_INIT	0x04000 /* Early SPL init is done	   */
 #define GD_FLG_LOG_READY	0x08000 /* Log system is ready for use	   */
 
+#ifdef CONFIG_ARCH_ROCKCHIP
+/* Currently, we use it to indicate console can be flushed before jump to OS */
+#define GD_FLG_OS_RUN		0x10000
+#endif
+
 #endif /* __ASM_GENERIC_GBL_DATA_H */

commit 5fb597c27d7b58dd1de4ff74001b5ddc723d5647
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Jun 22 11:43:57 2018 +0800

    rockchip: rockusb: only fix cmd for WL10/RL10
    
    The definition of cmnd[7] is different for different cmd, so
    we can not use the fixup for all cmd.
    
    Change-Id: I0020de4974ecca6075e0512456787089139a67fd
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index 9792ca01fa..ee31daa884 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -330,7 +330,6 @@ static int rkusb_cmd_process(struct fsg_common *common,
 
 	dump_cbw(cbw);
 
-	rkusb_fixup_cbwcb(common, bh);
 	if (rkusb_check_lun(common)) {
 		*reply = -EINVAL;
 		return RKUSB_RC_ERROR;
@@ -353,12 +352,14 @@ static int rkusb_cmd_process(struct fsg_common *common,
 		break;
 
 	case RKUSB_LBA_READ_10:
+		rkusb_fixup_cbwcb(common, bh);
 		common->cmnd[0] = SC_READ_10;
 		common->cmnd[1] = 0; /* Not support */
 		rc = RKUSB_RC_CONTINUE;
 		break;
 
 	case RKUSB_LBA_WRITE_10:
+		rkusb_fixup_cbwcb(common, bh);
 		common->cmnd[0] = SC_WRITE_10;
 		common->cmnd[1] = 0; /* Not support */
 		rc = RKUSB_RC_CONTINUE;

commit 236f805c2ac2685e879fb5546c62da11ee3ad127
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Jun 21 11:57:06 2018 +0800

    rockchip: config: add common config for rk3399
    
    This config will used for rockchip sdk(including android and Linux)
    
    Change-Id: I65bad79066c5d2dd775cfcb9455b2a77542243a3
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
new file mode 100644
index 0000000000..f84e81afef
--- /dev/null
+++ b/configs/rk3399_defconfig
@@ -0,0 +1,103 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_ROCKCHIP_RK3399=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_SPL_STACK_R_ADDR=0x80000
+CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_FASTBOOT_BUF_ADDR=0x00800800
+CONFIG_FASTBOOT_BUF_SIZE=0x08000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_RKPARM_PARTITION=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_ROCKCHIP_EFUSE=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0xFF1A0000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x330a
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX=y
+CONFIG_USB_ETHER_ASIX88179=y
+CONFIG_USB_ETHER_MCS7830=y
+CONFIG_USB_ETHER_RTL8152=y
+CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
+CONFIG_DRM_ROCKCHIP_LVDS=y
+CONFIG_DRM_ROCKCHIP_RGB=y
+CONFIG_LCD=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_ERRNO_STR=y

commit 8d2f64435d814910f7e13a71bdc5c57c8f28cdc8
Author: shengfei Xu <xsf@rock-chips.com>
Date:   Fri Jun 15 10:36:53 2018 +0800

    fuel gauge: rk817: calibrate the fuel gauge, when the system is powered on
    
    There is an error with the fuel gauge, so we need to calibrate it.
    
    Change-Id: I649cacaa97c69fd47bad6f6d02a7569e735b7a80
    Signed-off-by: shengfei Xu <xsf@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk817.c b/drivers/power/fuel_gauge/fg_rk817.c
index e23d0034df..c6e4b3bfef 100644
--- a/drivers/power/fuel_gauge/fg_rk817.c
+++ b/drivers/power/fuel_gauge/fg_rk817.c
@@ -434,16 +434,25 @@ static void rk817_bat_init_coulomb_cap(struct rk817_battery_device *battery,
 {
 	u8 buf;
 	u32 cap;
+	u32 val;
 
 	cap = CAPACITY_TO_ADC(capacity, battery->res_div);
-	buf = (cap >> 24) & 0xff;
-	rk817_bat_write(battery, Q_INIT_H3, buf);
-	buf = (cap >> 16) & 0xff;
-	rk817_bat_write(battery, Q_INIT_H2, buf);
-	buf = (cap >> 8) & 0xff;
-	rk817_bat_write(battery, Q_INIT_L1, buf);
-	buf = (cap >> 0) & 0xff;
-	rk817_bat_write(battery, Q_INIT_L0, buf);
+
+	do {
+		buf = (cap >> 24) & 0xff;
+		rk817_bat_write(battery, Q_INIT_H3, buf);
+		buf = (cap >> 16) & 0xff;
+		rk817_bat_write(battery, Q_INIT_H2, buf);
+		buf = (cap >> 8) & 0xff;
+		rk817_bat_write(battery, Q_INIT_L1, buf);
+		buf = (cap >> 0) & 0xff;
+		rk817_bat_write(battery, Q_INIT_L0, buf);
+
+		val = rk817_bat_read(battery, Q_INIT_H3) << 24;
+		val |= rk817_bat_read(battery, Q_INIT_H2) << 16;
+		val |= rk817_bat_read(battery, Q_INIT_L1) << 8;
+		val |= rk817_bat_read(battery, Q_INIT_L0) << 0;
+	} while (cap != val);
 
 	battery->rsoc = capacity * 1000 * 100 / battery->fcc;
 	battery->remain_cap = capacity * 1000;
@@ -465,8 +474,6 @@ static u32 rk817_bat_get_capacity_uah(struct rk817_battery_device *battery)
 		val |= rk817_bat_read(battery, Q_PRES_L0) << 0;
 
 		capacity = ADC_TO_CAPACITY_UAH(val, battery->res_div);
-	} else {
-		rk817_bat_init_coulomb_cap(battery, 0);
 	}
 
 	return  capacity;
@@ -481,10 +488,7 @@ static u32 rk817_bat_get_capacity_mah(struct rk817_battery_device *battery)
 		val |= rk817_bat_read(battery, Q_PRES_H2) << 16;
 		val |= rk817_bat_read(battery, Q_PRES_L1) << 8;
 		val |= rk817_bat_read(battery, Q_PRES_L0) << 0;
-
 		capacity = ADC_TO_CAPACITY(val, battery->res_div);
-	} else {
-		rk817_bat_init_coulomb_cap(battery, 0);
 	}
 
 	return  capacity;
@@ -694,12 +698,24 @@ static bool is_rk817_bat_last_halt(struct rk817_battery_device *battery)
 	int pre_cap = rk817_bat_get_prev_cap(battery);
 	int now_cap = rk817_bat_get_capacity_mah(battery);
 
+	battery->nac = rk817_bat_vol_to_cap(battery,
+					    battery->pwron_voltage);
+
 	/* over 10%: system halt last time */
-	if (abs(now_cap - pre_cap) > (battery->fcc / 10)) {
-		rk817_bat_inc_halt_cnt(battery);
-		return true;
+	if (now_cap > pre_cap) {
+		if (abs(now_cap - pre_cap) > (battery->fcc / 10)) {
+			rk817_bat_inc_halt_cnt(battery);
+			return true;
+		} else {
+			return false;
+		}
 	} else {
-		return false;
+		if (abs(battery->nac - pre_cap) > (battery->fcc / 5)) {
+			rk817_bat_inc_halt_cnt(battery);
+			return true;
+		} else {
+			return false;
+		}
 	}
 }
 
@@ -725,23 +741,78 @@ static void rk817_bat_set_initialized_flag(struct rk817_battery_device *battery)
 static void rk817_bat_not_first_pwron(struct rk817_battery_device *battery)
 {
 	int now_cap, pre_soc, pre_cap;
+	int is_charge = 0, temp_soc = 0;
 
 	battery->fcc = rk817_bat_get_fcc(battery);
 	pre_soc = rk817_bat_get_prev_dsoc(battery);
 	pre_cap = rk817_bat_get_prev_cap(battery);
+
 	now_cap = rk817_bat_get_capacity_mah(battery);
+	battery->halt_cnt = rk817_bat_get_halt_cnt(battery);
+	battery->nac = rk817_bat_vol_to_cap(battery,
+					    battery->pwron_voltage);
+	battery->pwroff_min = rk817_bat_get_off_count(battery);
 	battery->remain_cap = pre_cap * 1000;
 	battery->is_halt = is_rk817_bat_last_halt(battery);
-	battery->halt_cnt = rk817_bat_get_halt_cnt(battery);
 
-	if (battery->is_halt) {
-		DBG("system halt last time... cap: pre=%d, now=%d\n",
-		    pre_cap, now_cap);
-		if (now_cap < 0)
-			now_cap = 0;
+	if (now_cap == 0) {
+		if (battery->pwroff_min > 3) {
+			battery->nac = rk817_bat_vol_to_cap(battery,
+					    battery->pwron_voltage);
+			now_cap = battery->nac;
+			pre_cap = now_cap;
+			printf("now_cap 0x%x\n", now_cap);
+		} else {
+			now_cap = pre_cap;
+		}
+
 		rk817_bat_init_coulomb_cap(battery, now_cap);
-		pre_cap = now_cap;
+		goto finish;
+	}
+
+	if (now_cap > pre_cap) {
+		is_charge = 1;
+		if ((now_cap > battery->fcc * 2) &&
+		    ((battery->pwroff_min > 0) &&
+		    (battery->pwroff_min < 3))) {
+			now_cap = pre_cap;
+			is_charge = 0;
+		}
+	} else {
+		is_charge = 0;
+	}
+
+	if (is_charge == 0) {
+		if ((battery->pwroff_min >= 0)  && (battery->pwroff_min < 3)) {
+			rk817_bat_init_coulomb_cap(battery, pre_cap);
+			rk817_bat_get_capacity_mah(battery);
+			goto finish;
+		}
+
+		if (battery->pwroff_min >= 3) {
+			if (battery->nac > pre_cap) {
+				rk817_bat_init_coulomb_cap(battery,
+							   battery->nac);
+				rk817_bat_get_capacity_mah(battery);
+				pre_cap = battery->nac;
+				goto finish;
+			}
+
+			if ((pre_cap - battery->nac) > (battery->fcc / 10)) {
+				rk817_bat_inc_halt_cnt(battery);
+				temp_soc = (pre_cap - battery->nac) * 1000 * 100 / battery->fcc;
+				pre_soc -= temp_soc;
+				pre_cap = battery->nac;
+				if (pre_soc <= 0)
+					pre_soc = 0;
+				goto finish;
+			}
+		}
+	} else {
+		battery->remain_cap = rk817_bat_get_capacity_uah(battery);
+		battery->rsoc = rk817_bat_get_rsoc(battery);
 		pre_soc = battery->rsoc;
+		pre_cap = battery->remain_cap;
 		goto finish;
 	}
 finish:

commit 50a5d4fff35478b90a453b83a4742118dba45899
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jun 14 10:48:25 2018 +0800

    env_default: add "silent=enable" when CONFIG_SILENT_CONSOLE enabled
    
    framework requires users to enable slient console by both setting
    CONFIG_SILENT_CONSOLE and env "silent", it's really unnecessary,
    let's fix it.
    
    Change-Id: I92c9792f74a7edf61fe0947617038709d8b14d8d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/env_default.h b/include/env_default.h
index b574345af2..853c290042 100644
--- a/include/env_default.h
+++ b/include/env_default.h
@@ -103,6 +103,9 @@ const uchar default_environment[] = {
 #ifdef CONFIG_SYS_SOC
 	"soc="		CONFIG_SYS_SOC			"\0"
 #endif
+#ifdef CONFIG_SILENT_CONSOLE
+	"silent=enable\0"
+#endif
 #endif
 #ifdef	CONFIG_EXTRA_ENV_SETTINGS
 	CONFIG_EXTRA_ENV_SETTINGS

commit b722d159ec51cccf7606843531b830057b688dcd
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Jun 14 16:13:25 2018 +0800

    rockchip: config: add rk3326 common config
    
    Change-Id: I4ec5fbb491b8511a662b60b7fdc1878a0af26467
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/rk3326_defconfig b/configs/rk3326_defconfig
new file mode 100644
index 0000000000..feac2a1a08
--- /dev/null
+++ b/configs/rk3326_defconfig
@@ -0,0 +1,95 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_ROCKCHIP_PX30=y
+CONFIG_ROCKCHIP_RK3326=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_TARGET_EVB_PX30=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3326-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_BOOTDELAY=0
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_FASTBOOT_BUF_ADDR=0x800800
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_RKPARM_PARTITION=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_RK8XX_PWRKEY=y
+CONFIG_ADC_KEY=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PINCTRL=y
+CONFIG_DM_FUEL_GAUGE=y
+CONFIG_POWER_FG_RK817=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_DM_CHARGE_DISPLAY=y
+CONFIG_CHARGE_ANIMATION=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_RKNAND=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0xFF160000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x330d
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_DISPLAY_ROCKCHIP_MIPI=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_DRM_ROCKCHIP_LVDS=y
+CONFIG_DRM_ROCKCHIP_RGB=y
+CONFIG_DRM_ROCKCHIP_PANEL=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_LCD=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V2=y
+CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
+CONFIG_TEST_ROCKCHIP=y

commit b2cd2d96bc14551bca204d181933920fda4e78dd
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Thu Jun 14 09:42:48 2018 +0800

    arm: dts: rk3288: add adc-keys dt node
    
    Add adc-keys for download mode detection.
    
    Change-Id: I8f3204bc716c7e06fde07f9f1c6f926767214c4b
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3288-evb-rk1608.dtsi b/arch/arm/dts/rk3288-evb-rk1608.dtsi
index 4f51961579..828257e311 100644
--- a/arch/arm/dts/rk3288-evb-rk1608.dtsi
+++ b/arch/arm/dts/rk3288-evb-rk1608.dtsi
@@ -5,12 +5,24 @@
  */
 
 #include "rk3288.dtsi"
+#include <dt-bindings/input/input.h>
 
 / {
 	memory {
 		reg = <0 0x80000000>;
 	};
 
+	adc-keys {
+		compatible = "adc-keys";
+		io-channels = <&saradc 1>;
+
+		volup-key {
+			linux,code = <KEY_VOLUMEUP>;
+			label = "volume up";
+			press-threshold-microvolt = <18000>;
+		};
+	};
+
 	ext_gmac: external-gmac-clock {
 		compatible = "fixed-clock";
 		#clock-cells = <0>;
diff --git a/arch/arm/dts/rk3288-evb.dtsi b/arch/arm/dts/rk3288-evb.dtsi
index a84156fe14..32c262907b 100644
--- a/arch/arm/dts/rk3288-evb.dtsi
+++ b/arch/arm/dts/rk3288-evb.dtsi
@@ -5,12 +5,24 @@
  */
 
 #include "rk3288.dtsi"
+#include <dt-bindings/input/input.h>
 
 / {
 	memory {
 		reg = <0 0x80000000>;
 	};
 
+	adc-keys {
+		compatible = "adc-keys";
+		io-channels = <&saradc 1>;
+
+		volup-key {
+			linux,code = <KEY_VOLUMEUP>;
+			label = "volume up";
+			press-threshold-microvolt = <18000>;
+		};
+	};
+
 	ext_gmac: external-gmac-clock {
 		compatible = "fixed-clock";
 		#clock-cells = <0>;
diff --git a/arch/arm/dts/rk3288-fennec.dtsi b/arch/arm/dts/rk3288-fennec.dtsi
index f61252ce9d..c31a168caa 100644
--- a/arch/arm/dts/rk3288-fennec.dtsi
+++ b/arch/arm/dts/rk3288-fennec.dtsi
@@ -39,6 +39,7 @@
  */
 
 #include "rk3288.dtsi"
+#include <dt-bindings/input/input.h>
 
 / {
 	memory {
@@ -46,6 +47,17 @@
 		device_type = "memory";
 	};
 
+	adc-keys {
+		compatible = "adc-keys";
+		io-channels = <&saradc 1>;
+
+		volup-key {
+			linux,code = <KEY_VOLUMEUP>;
+			label = "volume up";
+			press-threshold-microvolt = <18000>;
+		};
+	};
+
 	ext_gmac: external-gmac-clock {
 		compatible = "fixed-clock";
 		#clock-cells = <0>;
@@ -78,6 +90,11 @@
 	status = "okay";
 };
 
+&saradc {
+	vref-supply = <&vcc_18>;
+	status = "okay";
+};
+
 &sdmmc {
 	bus-width = <4>;
 	cap-mmc-highspeed;
diff --git a/arch/arm/dts/rk3288-firefly.dtsi b/arch/arm/dts/rk3288-firefly.dtsi
index 072eaa6116..020e7e576b 100644
--- a/arch/arm/dts/rk3288-firefly.dtsi
+++ b/arch/arm/dts/rk3288-firefly.dtsi
@@ -5,12 +5,24 @@
  */
 
 #include "rk3288.dtsi"
+#include <dt-bindings/input/input.h>
 
 / {
 	memory {
 		reg = <0 0x80000000>;
 	};
 
+	adc-keys {
+		compatible = "adc-keys";
+		io-channels = <&saradc 1>;
+
+		volup-key {
+			linux,code = <KEY_VOLUMEUP>;
+			label = "volume up";
+			press-threshold-microvolt = <18000>;
+		};
+	};
+
 	ext_gmac: external-gmac-clock {
 		compatible = "fixed-clock";
 		#clock-cells = <0>;
diff --git a/arch/arm/dts/rk3288-miqi.dtsi b/arch/arm/dts/rk3288-miqi.dtsi
index 47dc0f9d74..77b618805f 100644
--- a/arch/arm/dts/rk3288-miqi.dtsi
+++ b/arch/arm/dts/rk3288-miqi.dtsi
@@ -5,6 +5,7 @@
  */
 
 #include "rk3288.dtsi"
+#include <dt-bindings/input/input.h>
 
 / {
 	memory {
@@ -12,6 +13,17 @@
 		reg = <0 0x80000000>;
 	};
 
+	adc-keys {
+		compatible = "adc-keys";
+		io-channels = <&saradc 1>;
+
+		volup-key {
+			linux,code = <KEY_VOLUMEUP>;
+			label = "volume up";
+			press-threshold-microvolt = <18000>;
+		};
+	};
+
 	ext_gmac: external-gmac-clock {
 		compatible = "fixed-clock";
 		#clock-cells = <0>;

commit f84438048a44ce13148d471eb15a28d082716ff7
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Thu Jun 14 09:41:04 2018 +0800

    config: rk3288: add adc-key support
    
    Change-Id: I9f6f2723db5c84bebac1d84dfd43b10dd5a9c947
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/configs/evb-rk3288-rk1608_defconfig b/configs/evb-rk3288-rk1608_defconfig
index d73134f64e..ebe548cd33 100644
--- a/configs/evb-rk3288-rk1608_defconfig
+++ b/configs/evb-rk3288-rk1608_defconfig
@@ -41,6 +41,8 @@ CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_ADC_KEY=y
 CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_MMC_DW=y
diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig
index 7c155cd7be..06e903e97d 100644
--- a/configs/evb-rk3288_defconfig
+++ b/configs/evb-rk3288_defconfig
@@ -44,6 +44,8 @@ CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_ADC_KEY=y
 CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_MMC_DW=y
diff --git a/configs/fennec-rk3288_defconfig b/configs/fennec-rk3288_defconfig
index 37c5ee6556..7ebfbf3a2a 100644
--- a/configs/fennec-rk3288_defconfig
+++ b/configs/fennec-rk3288_defconfig
@@ -46,6 +46,8 @@ CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_ADC_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_DM_ETH=y
diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig
index 1d3856a08e..1f2d1eef57 100644
--- a/configs/firefly-rk3288_defconfig
+++ b/configs/firefly-rk3288_defconfig
@@ -46,6 +46,8 @@ CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_ADC_KEY=y
 CONFIG_DM_KEYBOARD=y
 CONFIG_LED=y
 CONFIG_LED_GPIO=y
diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig
index 7b76be8f3a..088b15f5be 100644
--- a/configs/miqi-rk3288_defconfig
+++ b/configs/miqi-rk3288_defconfig
@@ -46,6 +46,8 @@ CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_ADC_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_DM_ETH=y

commit 300175f79e1bdf9df8608ed16e21c97ae091a2b9
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Wed Jun 6 16:35:41 2018 +0800

    cmd: rknand: add rockchip spi nand u-boot command support
    
    Change-Id: I8e3e6bab2d419b5fe0ab35c3985d1ff88efc5778
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/cmd/Kconfig b/cmd/Kconfig
index f7f78c6361..bfd78ddd8c 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -893,10 +893,10 @@ config CMD_ROCKUSB
 
 config CMD_RKNAND
 	bool "rknand"
-	depends on RKNAND
-	default y if RKNAND
+	depends on (RKNAND || RKNANDC_NAND)
+	default y if (RKNAND || RKNANDC_NAND)
 	help
-	  Rockchip NAND FLASH device support
+	    Rockchip NAND FLASH device support
 
 config CMD_RKSFC
 	bool "rksfc"

commit aa74b60729b17fca518ad294d465032baa9983f5
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jun 11 22:44:15 2018 +0800

    fastboot: fix cb_upload bug
    
    It will run sleep_thread when call
    fastboot_tx_write_str. So add wakeup_thread
    to function tx_handler_ul when tx_handler okay.
    
    Change-Id: I25996639bbed7228dc9bc4fb5184ddf2ee19a511
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
old mode 100644
new mode 100755
index ded9d2db29..6570aef9b2
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -873,6 +873,7 @@ static void tx_handler_ul(struct usb_ep *ep, struct usb_request *req)
 
 	if (remain_size <= 0) {
 		fastboot_func->in_req->complete = fastboot_complete;
+		wakeup_thread();
 		fastboot_tx_write_str("OKAY");
 		printf("\nuploading of %d bytes finished\n", upload_bytes);
 		upload_bytes = 0;

commit 8d0db1d9838243e603f3c0d67462ac8624d84204
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jun 11 22:19:10 2018 +0800

    lib: avb: implement the function get_random()
    
    Use the function get_timer to get the random
    seed. Then the seed is used by function srand
    to initialize the random data.
    
    Change-Id: Iaae6a17d22b8e85fb4d4b6c6247cd11003b64eea
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/lib/avb/libavb_user/avb_ops_user.c b/lib/avb/libavb_user/avb_ops_user.c
index bf92167b99..9dd8a8b570 100755
--- a/lib/avb/libavb_user/avb_ops_user.c
+++ b/lib/avb/libavb_user/avb_ops_user.c
@@ -347,6 +347,23 @@ static void avb_set_key_version(AvbAtxOps* atx_ops,
 #endif
 }
 
+AvbIOResult rk_get_random(AvbAtxOps* atx_ops,
+                          size_t num_bytes,
+                          uint8_t* output)
+{
+        int i;
+        unsigned int seed;
+
+        seed = (unsigned int)get_timer(0);
+        for (i = 0; i < num_bytes; i++) {
+		srand(seed);
+                output[i] = (uint8_t)(rand());
+                seed = (unsigned int)(output[i]);
+        }
+
+        return 0;
+}
+
 AvbOps* avb_ops_user_new(void) {
   AvbOps* ops;
 
@@ -387,6 +404,7 @@ AvbOps* avb_ops_user_new(void) {
   ops->atx_ops->read_permanent_attributes = avb_read_perm_attr;
   ops->atx_ops->read_permanent_attributes_hash = avb_read_perm_attr_hash;
   ops->atx_ops->set_key_version = avb_set_key_version;
+  ops->atx_ops->get_random = rk_get_random;
 
 out:
   return ops;

commit c88f4351109fc2602a5c781f26d75a9b875a580c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 13 20:41:46 2018 +0800

    make.sh: show original chip name for build message
    
    Change-Id: I383c44d760f1670143aa8437597606902bbc10fa
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index b2b2ec30da..5a4772fbea 100755
--- a/make.sh
+++ b/make.sh
@@ -2,8 +2,8 @@
 set -e
 BOARD=$1
 SUBCMD=$2
-RKCHIP=${BOARD##*-}
-RKCHIP=$(echo ${RKCHIP} | tr '[a-z]' '[A-Z]')
+RKCHIP=$(echo ${BOARD##*-} | tr '[a-z]' '[A-Z]')
+ORG_RKCHIP=$RKCHIP
 JOB=`sed -n "N;/processor/p" /proc/cpuinfo|wc -l`
 SUPPORT_LIST=`ls configs/*-[r,p][x,v,k][0-9][0-9]*_defconfig`
 
@@ -86,6 +86,7 @@ prepare()
 		else
 			RKCHIP=${RKCHIP%=*}
 			RKCHIP=${RKCHIP##*_}
+			ORG_RKCHIP=$RKCHIP
 		fi
 	fi
 
@@ -309,9 +310,9 @@ finish()
 {
 	echo
 	if [ "$BOARD" = '' ]; then
-		echo "Platform ${RKCHIP}${PLATFORM_AARCH32} is build OK, with exist .config"
+		echo "Platform ${ORG_RKCHIP}${PLATFORM_AARCH32} is build OK, with exist .config"
 	else
-		echo "Platform ${RKCHIP}${PLATFORM_AARCH32} is build OK, with new .config(make ${BOARD}_defconfig)"
+		echo "Platform ${ORG_RKCHIP}${PLATFORM_AARCH32} is build OK, with new .config(make ${BOARD}_defconfig)"
 	fi
 }
 

commit 30b04afc78b7b83a601dea5974bbefa8e9d731f9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 13 19:28:58 2018 +0800

    make.sh: support "./make.sh" build without [board] option
    
    this default use exist .config to build project. because users
    maybe don't like their .config to be override after "make menuconfig"
    change.
    
    Only one SoC in the .config is allowed, otherwise still use
    "./make.sh [board]".
    
    Change-Id: Ib65a4b6d6f84b822f6bdaf84b9784521fbf200e9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 9eee27c9d5..b2b2ec30da 100755
--- a/make.sh
+++ b/make.sh
@@ -5,7 +5,7 @@ SUBCMD=$2
 RKCHIP=${BOARD##*-}
 RKCHIP=$(echo ${RKCHIP} | tr '[a-z]' '[A-Z]')
 JOB=`sed -n "N;/processor/p" /proc/cpuinfo|wc -l`
-SUPPROT_LIST=`ls configs/*-[r,p][x,v,k][0-9][0-9]*_defconfig`
+SUPPORT_LIST=`ls configs/*-[r,p][x,v,k][0-9][0-9]*_defconfig`
 
 ########################################### User can modify #############################################
 # User's rkbin tool relative path
@@ -42,26 +42,53 @@ PLATFORM_AARCH32=
 
 prepare()
 {
-	local absolute_path cmd
+	local absolute_path cmd count
+
+	# Assign output directory
+	cmd=${SUBCMD%=*}
+	if [ "${cmd}" = 'O' ]; then
+		OUTDIR=${SUBCMD#*=}
+		OUTOPT=O=${OUTDIR}
+	else
+		OUTDIR=.
+	fi
 
 	# Check invalid args and help
-	if [ "$BOARD" = '--help' -o "$BOARD" = '-h' -o "$BOARD" = '--h' -o "$BOARD" = '' ]; then
+	if [ "$BOARD" = '--help' -o "$BOARD" = '-help' -o "$BOARD" = 'help' -o "$BOARD" = '-h' -o "$BOARD" = '--h' ]; then
 		echo
 		echo "Usage: ./make.sh [board]"
 		echo "Example:"
+		echo "./make.sh		 ---- build with exist .config"
 		echo "./make.sh evb-rk3399     ---- build for evb-rk3399_defconfig"
 		echo "./make.sh firefly-rk3288 ---- build for firefly-rk3288_defconfig"
 		exit 1
-	elif [ ! -f configs/${BOARD}_defconfig ]; then
+	elif [ $BOARD ] && [ ! -f configs/${BOARD}_defconfig ]; then
+		echo
 		echo "Can't find: configs/${BOARD}_defconfig"
 		echo
-		echo "*************** Support list ***************"
-		echo "${SUPPROT_LIST}"
+		echo "******** Rockchip Support List *************"
+		echo "${SUPPORT_LIST}"
 		echo "********************************************"
 		echo
 		exit 1
 	fi
 
+	# Get RKCHIP from exist .config file
+	if [ "$RKCHIP" = '' ]; then
+		count=`grep -c '^CONFIG_ROCKCHIP_[R,P][X,V,K][0-9][0-9]' ${OUTDIR}/.config`
+		RKCHIP=`grep '^CONFIG_ROCKCHIP_[R,P][X,V,K][0-9][0-9]' ${OUTDIR}/.config`
+		if [ $count -gt 1 ]; then
+			echo "Find $count SoC in .config file:"
+			echo "$RKCHIP"
+			echo
+			echo "I'm confused, please compile with [board], like: ./make.sh [board]"
+			exit 1
+		else
+			RKCHIP=${RKCHIP%=*}
+			RKCHIP=${RKCHIP##*_}
+		fi
+	fi
+
 	# Initialize RKBIN and RKTOOLS
 	if [ -d ${RKBIN_TOOLS} ]; then
 		absolute_path=$(cd `dirname ${RKBIN_TOOLS}`; pwd)
@@ -76,14 +103,13 @@ prepare()
 		echo "	3. Download full release SDK repository"
 		exit 1
 	fi
+}
 
-	# Assign output directory
-	cmd=${SUBCMD%=*}
-	if [ "${cmd}" = 'O' ]; then
-		OUTDIR=${SUBCMD#*=}
-		OUTOPT=O=${OUTDIR}
-	else
-		OUTDIR=.
+make_defconfig()
+{
+	if [ $BOARD ]; then
+		echo "make for ${BOARD}_defconfig by -j${JOB}"
+		make ${BOARD}_defconfig ${OUTOPT}
 	fi
 }
 
@@ -279,9 +305,18 @@ pack_trust_image()
 	fi
 }
 
+finish()
+{
+	echo
+	if [ "$BOARD" = '' ]; then
+		echo "Platform ${RKCHIP}${PLATFORM_AARCH32} is build OK, with exist .config"
+	else
+		echo "Platform ${RKCHIP}${PLATFORM_AARCH32} is build OK, with new .config(make ${BOARD}_defconfig)"
+	fi
+}
+
 prepare
-echo "make for ${BOARD}_defconfig by -j${JOB}"
-make ${BOARD}_defconfig ${OUTOPT}
+make_defconfig
 select_toolchain
 fixup_platform_configure
 sub_commands
@@ -289,3 +324,4 @@ make CROSS_COMPILE=${TOOLCHAIN_GCC}  all --jobs=${JOB} ${OUTOPT}
 pack_uboot_image
 pack_loader_image
 pack_trust_image
+finish

commit f91f3b34274f35e9ce4952b54088eb46b93497da
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jun 11 10:14:20 2018 +0800

    rockchip: part: rkpram: update size for the last partition
    
    The last partition with size '-' use all remain size.
    
    Change-Id: Id91302d89927ac01c1975c8798c59543314689cd
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/disk/part_rkparm.c b/disk/part_rkparm.c
index 38bc2e112b..4dd2d564d7 100644
--- a/disk/part_rkparm.c
+++ b/disk/part_rkparm.c
@@ -83,6 +83,9 @@ static int rkparm_param_parse(char *param, struct list_head *parts_head,
 		if (dev_desc->if_type != IF_TYPE_RKNAND)
 			offset = RK_PARAM_OFFSET;
 		part->start = start + offset;
+		/* Last partition use all remain space */
+		if (size == (~0UL))
+			size = dev_desc->lba - part->start;
 		part->size = size;
 		strncpy(part->name, next, len);
 		part->name[len] = '\0';

commit e0023032d6dfacfb5e36f7145ac682b8dbc85856
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Jun 5 17:54:34 2018 +0800

    rockchip: rockusb: update for legacy tool
    
    Update data size for get_flash_id() and do_bad_block_test() so that
    legacy tool can till work;
    Add warning log for those not supported cmds from legacy tool;
    
    Change-Id: I40e7f5d82a138bef6f8b0cef237c04483e663931
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index 2e89051462..9792ca01fa 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -155,7 +155,7 @@ static int rkusb_do_read_flash_id(struct fsg_common *common,
 				  struct fsg_buffhd *bh)
 {
 	u8 *buf = (u8 *)bh->buf;
-	u32 len = common->data_size;
+	u32 len = 5;
 	enum if_type type = ums[common->lun].block_dev.if_type;
 
 	if (type == IF_TYPE_MMC)
@@ -167,6 +167,7 @@ static int rkusb_do_read_flash_id(struct fsg_common *common,
 
 	/* Set data xfer size */
 	common->residue = common->data_size_from_cmnd = len;
+	common->data_size = len;
 
 	return len;
 }
@@ -175,12 +176,13 @@ static int rkusb_do_test_bad_block(struct fsg_common *common,
 				   struct fsg_buffhd *bh)
 {
 	u8 *buf = (u8 *)bh->buf;
-	u32 len = common->data_size;
+	u32 len = 64;
 
 	memset((void *)&buf[0], 0, len);
 
 	/* Set data xfer size */
 	common->residue = common->data_size_from_cmnd = len;
+	common->data_size = len;
 
 	return len;
 }
@@ -387,9 +389,10 @@ static int rkusb_cmd_process(struct fsg_common *common,
 		rc = RKUSB_RC_FINISHED;
 		break;
 
-	case RKUSB_SET_DEVICE_ID:
 	case RKUSB_READ_10:
 	case RKUSB_WRITE_10:
+		printf("CMD Not support, pls use new version Tool\n");
+	case RKUSB_SET_DEVICE_ID:
 	case RKUSB_ERASE_10:
 	case RKUSB_WRITE_SPARE:
 	case RKUSB_READ_SPARE:

commit ba0501aca290ca5c87ce48b247d37c934d6108cf
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Fri Jun 1 17:49:04 2018 +0800

    rockchip: rkflash: add slc nand flash and spi nand flash support
    
    1.All three types of flash including slc nand flash, spi nand flash
    and spi nor flash are code compatibility
    2.Add vendor partition ops
    3.Unified naming format and variable with code in kernel
    
    Change-Id: I0aa1c5daf9ec51296a6d2d904b2cf1ea7a0dd077
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/Kconfig b/drivers/rkflash/Kconfig
index ab6fce36a0..d8a37025fe 100644
--- a/drivers/rkflash/Kconfig
+++ b/drivers/rkflash/Kconfig
@@ -6,26 +6,53 @@
 if ARCH_ROCKCHIP
 
 menuconfig RKFLASH
-	tristate "Rockchip Flash Devices Support"
+	bool "Rockchip Flash Devices support"
 	default n
 	help
-	  Enable rockchip flash devices support.
-	  rkflash driver support 3-type flash devices: NANDC NAND, SFC_NOR
-	  and SFC_NAND.
+	  This enables support for Rockchip Flash Devices including Nandc Slc
+	  Nand, SFC SPI Nand and SFC SPI Nor.
+
+	  They're block interface.
+
 	  Say Y when you have a board with one of them.
 
 if RKFLASH
 
 comment "Rockchip Flash Devices"
 
+config RKNANDC_NAND
+	bool "Rockchip NANDC Slc Nand Devices support"
+	depends on RKNAND != y
+	default n
+	help
+	  This enables support for NANDC Slc Nand Devices.
+
+	  It's block interface, 512Kb/sector.
+
+	  Say Y when you have a board with Slc Nand Flash supported by Rockchip
+	  Nandc controller.
+
+config RKSFC_NAND
+	bool "Rockchip SFC SPI Nand Devices support"
+	depends on RKNAND != y
+	default n
+	help
+	  This enables support for Rockchip SFC SPI Nand Devices.
+
+	  It's block interface, 512Kb/sector.
+
+	  Say Y when you have a board with SPI Nand Flash supported by Rockchip
+          Serial Flash Controller(SFC).
 config RKSFC_NOR
-	bool "Rockchip SFC NOR flash support"
+	bool "Rockchip SFC SPI Nor Devices Support"
 	depends on BLK
 	help
-	  This option enables support for Rockchip SFC nor devices.
-	  It's block interface.
-	  512Kb/sector.
-	  Say y here to enable rockchip spi nor flash driver.
+	  This enables support for Rockchip SFC SPI Nor Devices.
+
+	  It's block interface,512Kb/sector.
+
+	  Say Y when you have a board with SPI Nor Flash supported by Rockchip
+	  Serial Flash Controller(SFC).
 
 endif # RKFLASH
 
diff --git a/drivers/rkflash/Makefile b/drivers/rkflash/Makefile
index 164c7e9d7f..19d980597a 100644
--- a/drivers/rkflash/Makefile
+++ b/drivers/rkflash/Makefile
@@ -1,8 +1,19 @@
 #
 # Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
 #
-# SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+# SPDX-License-Identifier:	GPL-2.0
 #
 
-obj-y += rkflash_debug.o
-obj-$(CONFIG_RKSFC_NOR) += sfc.o sfc_nor.o rkflash_api.o rksfc_base.o rkflash_blk.o
\ No newline at end of file
+obj-$(CONFIG_RKNANDC_NAND) += rkflash_blk.o rknandc_base.o rkflash_api.o rkflash_debug.o flash.o nandc.o
+obj-$(CONFIG_RKSFC_NAND) += rkflash_blk.o rksfc_base.o  rkflash_api.o rkflash_debug.o sfc_nand.o sfc.o
+obj-$(CONFIG_RKSFC_NOR) += rkflash_blk.o rksfc_base.o rkflash_api.o rkflash_debug.o sfc_nor.o sfc.o
+
+ifneq (, $(CONFIG_RKNANDC_NAND)$(CONFIG_RKSFC_NAND))
+
+ifdef CONFIG_ARM64
+obj-y += rk_sftl_arm_v8.o
+else
+obj-y += rk_sftl_arm_v7.o
+endif
+
+endif
diff --git a/drivers/rkflash/flash.c b/drivers/rkflash/flash.c
new file mode 100644
index 0000000000..a3f9e89f3d
--- /dev/null
+++ b/drivers/rkflash/flash.c
@@ -0,0 +1,517 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#include <common.h>
+#include <linux/delay.h>
+
+#include "flash.h"
+#include "flash_com.h"
+#include "nandc.h"
+#include "typedef.h"
+#include "rkflash_debug.h"
+
+#define FLASH_STRESS_TEST_EN		0
+
+static u8 id_byte[MAX_FLASH_NUM][8];
+static u8 die_cs_index[MAX_FLASH_NUM];
+static u8 g_nand_max_die;
+static u16 g_totle_block;
+static u8 g_nand_flash_ecc_bits;
+static u8 g_nand_idb_res_blk_num;
+
+static struct NAND_PARA_INFO_T nand_para = {
+	2,
+	{0x98, 0xF1, 0, 0, 0, 0},
+	TOSHIBA,
+	1,
+	4,
+	64,
+	1,
+	1,
+	1024,
+	0x100,
+	LSB_0,
+	RR_NONE,
+	16,
+	40,
+	1,
+	0,
+	BBF_1,
+	MPM_0,
+	{0}
+};	/* TC58NVG0S3HTA00 */
+
+void nandc_flash_reset(u8 cs)
+{
+	nandc_flash_cs(cs);
+	nandc_writel(RESET_CMD, NANDC_CHIP_CMD(cs));
+	nandc_wait_flash_ready(cs);
+	nandc_flash_de_cs(cs);
+}
+
+static void flash_read_id_raw(u8 cs, u8 *buf)
+{
+	u8 *ptr = (u8 *)buf;
+
+	nandc_flash_reset(cs);
+	nandc_flash_cs(cs);
+	nandc_writel(READ_ID_CMD, NANDC_CHIP_CMD(cs));
+	nandc_writel(0x00, NANDC_CHIP_ADDR(cs));
+	nandc_delayns(200);
+
+	ptr[0] = nandc_readl(NANDC_CHIP_DATA(cs));
+	ptr[1] = nandc_readl(NANDC_CHIP_DATA(cs));
+	ptr[2] = nandc_readl(NANDC_CHIP_DATA(cs));
+	ptr[3] = nandc_readl(NANDC_CHIP_DATA(cs));
+	ptr[4] = nandc_readl(NANDC_CHIP_DATA(cs));
+	ptr[5] = nandc_readl(NANDC_CHIP_DATA(cs));
+	ptr[6] = nandc_readl(NANDC_CHIP_DATA(cs));
+	ptr[7] = nandc_readl(NANDC_CHIP_DATA(cs));
+
+	nandc_flash_de_cs(cs);
+	if (ptr[0] != 0xFF && ptr[0] && ptr[1] != 0xFF)
+		PRINT_NANDC_E("No.%d FLASH ID:%x %x %x %x %x %x\n",
+			      cs + 1, ptr[0], ptr[1], ptr[2],
+			      ptr[3], ptr[4], ptr[5]);
+}
+
+static void flash_bch_sel(u8 bits)
+{
+	g_nand_flash_ecc_bits = bits;
+	nandc_bch_sel(bits);
+}
+
+static __maybe_unused void flash_timing_cfg(u32 ahb_khz)
+{
+	nandc_time_cfg(nand_para.access_freq);
+}
+
+static void flash_read_cmd(u8 cs, u32 page_addr)
+{
+	nandc_writel(READ_CMD >> 8, NANDC_CHIP_CMD(cs));
+	nandc_writel(0x00, NANDC_CHIP_ADDR(cs));
+	nandc_writel(0x00, NANDC_CHIP_ADDR(cs));
+	nandc_writel(page_addr & 0x00ff, NANDC_CHIP_ADDR(cs));
+	nandc_writel(page_addr >> 8, NANDC_CHIP_ADDR(cs));
+	nandc_writel(page_addr >> 16, NANDC_CHIP_ADDR(cs));
+	nandc_writel(READ_CMD & 0x00ff, NANDC_CHIP_CMD(cs));
+}
+
+static void flash_prog_first_cmd(u8 cs, u32 page_addr)
+{
+	nandc_writel(PAGE_PROG_CMD >> 8, NANDC_CHIP_CMD(cs));
+	nandc_writel(0x00, NANDC_CHIP_ADDR(cs));
+	nandc_writel(0x00, NANDC_CHIP_ADDR(cs));
+	nandc_writel(page_addr & 0x00ff, NANDC_CHIP_ADDR(cs));
+	nandc_writel(page_addr >> 8, NANDC_CHIP_ADDR(cs));
+	nandc_writel(page_addr >> 16, NANDC_CHIP_ADDR(cs));
+}
+
+static void flash_erase_cmd(u8 cs, u32 page_addr)
+{
+	nandc_writel(BLOCK_ERASE_CMD >> 8, NANDC_CHIP_CMD(cs));
+	nandc_writel(page_addr & 0x00ff, NANDC_CHIP_ADDR(cs));
+	nandc_writel(page_addr >> 8, NANDC_CHIP_ADDR(cs));
+	nandc_writel(page_addr >> 16, NANDC_CHIP_ADDR(cs));
+	nandc_writel(BLOCK_ERASE_CMD & 0x00ff, NANDC_CHIP_CMD(cs));
+}
+
+static void flash_prog_second_cmd(u8 cs, u32 page_addr)
+{
+	nandc_writel(PAGE_PROG_CMD & 0x00ff, NANDC_CHIP_CMD(cs));
+}
+
+static u32 flash_read_status(u8 cs, u32 page_addr)
+{
+	nandc_writel(READ_STATUS_CMD, NANDC_CHIP_CMD(cs));
+	nandc_delayns(80);
+
+	return nandc_readl(NANDC_CHIP_DATA(cs));
+}
+
+static void flash_read_random_dataout_cmd(u8 cs, u32 col_addr)
+{
+	nandc_writel(READ_DP_OUT_CMD >> 8, NANDC_CHIP_CMD(cs));
+	nandc_writel(col_addr & 0x00ff, NANDC_CHIP_ADDR(cs));
+	nandc_writel(col_addr >> 8, NANDC_CHIP_ADDR(cs));
+	nandc_writel(READ_DP_OUT_CMD & 0x00ff, NANDC_CHIP_CMD(cs));
+}
+
+static u32 flash_read_page_raw(u8 cs, u32 page_addr, u32 *p_data, u32 *p_spare)
+{
+	u32 ret = 0;
+	u32 error_ecc_bits;
+	u32 sec_per_page = nand_para.sec_per_page;
+
+	nandc_wait_flash_ready(cs);
+	nandc_flash_cs(cs);
+	flash_read_cmd(cs, page_addr);
+	nandc_wait_flash_ready(cs);
+	flash_read_random_dataout_cmd(cs, 0);
+	nandc_wait_flash_ready(cs);
+
+	error_ecc_bits = nandc_xfer_data(cs, NANDC_READ, sec_per_page,
+					 p_data, p_spare);
+	if (error_ecc_bits > 2) {
+		PRINT_NANDC_E("FlashReadRawPage %x %x error_ecc_bits %d\n",
+			      cs, page_addr, error_ecc_bits);
+		if (p_data)
+			PRINT_NANDC_HEX("data:", p_data, 4, 8);
+		if (p_spare)
+			PRINT_NANDC_HEX("spare:", p_spare, 4, 2);
+	}
+	nandc_flash_de_cs(cs);
+
+	if (error_ecc_bits != NAND_STS_ECC_ERR) {
+		if (error_ecc_bits >= (u32)nand_para.ecc_bits - 3)
+			ret = NAND_STS_REFRESH;
+		else
+			ret = NAND_STS_OK;
+	}
+
+	return ret;
+}
+
+static u32 flash_read_page(u8 cs, u32 page_addr, u32 *p_data, u32 *p_spare)
+{
+	u32 ret;
+
+	ret = flash_read_page_raw(cs, page_addr, p_data, p_spare);
+	if (ret == NAND_STS_ECC_ERR)
+		ret = flash_read_page_raw(cs, page_addr, p_data, p_spare);
+
+	return ret;
+}
+
+static u32 flash_prog_page(u8 cs, u32 page_addr, u32 *p_data, u32 *p_spare)
+{
+	u32 status;
+	u32 sec_per_page = nand_para.sec_per_page;
+
+	nandc_wait_flash_ready(cs);
+	nandc_flash_cs(cs);
+	flash_prog_first_cmd(cs, page_addr);
+	nandc_xfer_data(cs, NANDC_WRITE, sec_per_page, p_data, p_spare);
+	flash_prog_second_cmd(cs, page_addr);
+	nandc_wait_flash_ready(cs);
+	status = flash_read_status(cs, page_addr);
+	nandc_flash_de_cs(cs);
+	status &= 0x01;
+	if (status) {
+		PRINT_NANDC_I("%s addr=%x status=%x\n",
+			      __func__, page_addr, status);
+	}
+	return status;
+}
+
+static u32 flash_erase_block(u8 cs, u32 page_addr)
+{
+	u32 status;
+
+	nandc_wait_flash_ready(cs);
+	nandc_flash_cs(cs);
+	flash_erase_cmd(cs, page_addr);
+	nandc_wait_flash_ready(cs);
+	status = flash_read_status(cs, page_addr);
+	nandc_flash_de_cs(cs);
+	status &= 0x01;
+	if (status) {
+		PRINT_NANDC_I("%s pageadd=%x status=%x\n",
+			      __func__, page_addr, status);
+	}
+	return status;
+}
+
+static void flash_read_spare(u8 cs, u32 page_addr, u8 *spare)
+{
+	u32 col = nand_para.sec_per_page << 9;
+
+	nandc_writel(READ_CMD >> 8, NANDC_CHIP_CMD(cs));
+	nandc_writel(col, NANDC_CHIP_ADDR(cs));
+	nandc_writel(col >> 8, NANDC_CHIP_ADDR(cs));
+	nandc_writel(page_addr & 0x00ff, NANDC_CHIP_ADDR(cs));
+	nandc_writel(page_addr >> 8, NANDC_CHIP_ADDR(cs));
+	nandc_writel(page_addr >> 16, NANDC_CHIP_ADDR(cs));
+	nandc_writel(READ_CMD & 0x00ff, NANDC_CHIP_CMD(cs));
+
+	nandc_wait_flash_ready(cs);
+
+	*spare = nandc_readl(NANDC_CHIP_DATA(cs));
+}
+
+/*
+ * Read the 1st page's 1st spare byte of a phy_blk
+ * If not FF, it's bad blk
+ */
+static s32 get_bad_blk_list(u16 *table, u32 die)
+{
+	u16 blk;
+	u32 bad_cnt, page_addr0, page_addr1, page_addr2;
+	u32 blk_per_die;
+	u8 bad_flag0, bad_flag1, bad_flag2;
+
+	bad_cnt = 0;
+	blk_per_die = nand_para.plane_per_die * nand_para.blk_per_plane;
+	for (blk = 0; blk < blk_per_die; blk++) {
+		bad_flag0 = 0xFF;
+		bad_flag1 = 0xFF;
+		bad_flag2 = 0xFF;
+		page_addr0 = (blk + blk_per_die * die) *
+			nand_para.page_per_blk + 0;
+		page_addr1 = page_addr0 + 1;
+		page_addr2 = page_addr0 + nand_para.page_per_blk - 1;
+		flash_read_spare(die, page_addr0, &bad_flag0);
+		flash_read_spare(die, page_addr1, &bad_flag1);
+		flash_read_spare(die, page_addr2, &bad_flag2);
+		if (bad_flag0 != 0xFF ||
+		    bad_flag1 != 0xFF ||
+		    bad_flag2 != 0xFF) {
+			table[bad_cnt++] = blk;
+			PRINT_NANDC_E("die[%d], bad_blk[%d]\n", die, blk);
+		}
+	}
+	return bad_cnt;
+}
+
+#if FLASH_STRESS_TEST_EN
+
+#define FLASH_PAGE_SIZE	2048
+#define FLASH_SPARE_SIZE	8
+
+static u16 bad_blk_list[1024];
+static u32 pwrite[FLASH_PAGE_SIZE / 4];
+static u32 pread[FLASH_PAGE_SIZE / 4];
+static u32 pspare_write[FLASH_SPARE_SIZE / 4];
+static u32 pspare_read[FLASH_SPARE_SIZE / 4];
+static u32 bad_blk_num;
+static u32 bad_page_num;
+
+static void flash_test(void)
+{
+	u32 i, blk, page, bad_cnt, page_addr;
+	int ret;
+	u32 pages_num = 64;
+	u32 blk_addr = 64;
+	u32 is_bad_blk = 0;
+
+	PRINT_NANDC_E("%s\n", __func__);
+	bad_blk_num = 0;
+	bad_page_num = 0;
+	bad_cnt	= get_bad_blk_list(bad_blk_list, 0);
+
+	for (blk = 0; blk < 1024; blk++) {
+		for (i = 0; i < bad_cnt; i++) {
+			if (bad_blk_list[i] == blk)
+				break;
+		}
+		if (i < bad_cnt)
+			continue;
+		is_bad_blk = 0;
+		PRINT_NANDC_E("Flash prog block: %x\n", blk);
+		flash_erase_block(0, blk * blk_addr);
+		for (page = 0; page < pages_num; page++) {
+			page_addr = blk * blk_addr + page;
+			for (i = 0; i < 512; i++)
+				pwrite[i] = (page_addr << 16) + i;
+			pspare_write[0] = pwrite[0] + 0x5AF0;
+			pspare_write[1] = pspare_write[0] + 1;
+			flash_prog_page(0, page_addr, pwrite, pspare_write);
+			memset(pread, 0, 2048);
+			memset(pspare_read, 0, 8);
+			ret = flash_read_page(0, page_addr, pread,
+					      pspare_read);
+			if (ret != NAND_STS_OK)
+				is_bad_blk = 1;
+			for (i = 0; i < 512; i++) {
+				if (pwrite[i] != pread[i]) {
+					is_bad_blk = 1;
+					break;
+				}
+			}
+			for (i = 0; i < 2; i++) {
+				if (pspare_write[i] != pspare_read[i]) {
+					is_bad_blk = 1;
+					break;
+				}
+			}
+			if (is_bad_blk) {
+				bad_page_num++;
+				PRINT_NANDC_E("ERR:page %x, ret= %x\n",
+					      page_addr,
+					      ret);
+				PRINT_NANDC_HEX("data:", pread, 4, 8);
+				PRINT_NANDC_HEX("spare:", pspare_read, 4, 2);
+			}
+		}
+		flash_erase_block(0, blk * blk_addr);
+		if (is_bad_blk)
+			bad_blk_num++;
+	}
+	PRINT_NANDC_E("bad_blk_num = %d, bad_page_num = %d\n",
+		      bad_blk_num, bad_page_num);
+
+	PRINT_NANDC_E("Flash Test Finish!!!\n");
+	while (1)
+		;
+}
+#endif
+
+static void flash_die_info_init(void)
+{
+	u32 cs;
+
+	g_nand_max_die = 0;
+	for (cs = 0; cs < MAX_FLASH_NUM; cs++) {
+		if (nand_para.nand_id[1] == id_byte[cs][1]) {
+			die_cs_index[g_nand_max_die] = cs;
+			g_nand_max_die++;
+		}
+	}
+	g_totle_block = g_nand_max_die *  nand_para.plane_per_die *
+			nand_para.blk_per_plane;
+}
+
+static void nandc_flash_print_info(void)
+{
+	PRINT_NANDC_I("No.0 FLASH ID: %x %x %x %x %x %x\n",
+		      nand_para.nand_id[0],
+		      nand_para.nand_id[1],
+		      nand_para.nand_id[2],
+		      nand_para.nand_id[3],
+		      nand_para.nand_id[4],
+		      nand_para.nand_id[5]);
+	PRINT_NANDC_I("die_per_chip: %x\n", nand_para.die_per_chip);
+	PRINT_NANDC_I("sec_per_page: %x\n", nand_para.sec_per_page);
+	PRINT_NANDC_I("page_per_blk: %x\n", nand_para.page_per_blk);
+	PRINT_NANDC_I("cell: %x\n", nand_para.cell);
+	PRINT_NANDC_I("plane_per_die: %x\n", nand_para.plane_per_die);
+	PRINT_NANDC_I("blk_per_plane: %x\n", nand_para.blk_per_plane);
+	PRINT_NANDC_I("TotleBlock: %x\n", g_totle_block);
+	PRINT_NANDC_I("die gap: %x\n", nand_para.die_gap);
+	PRINT_NANDC_I("lsb_mode: %x\n", nand_para.lsb_mode);
+	PRINT_NANDC_I("read_retry_mode: %x\n", nand_para.read_retry_mode);
+	PRINT_NANDC_I("ecc_bits: %x\n", nand_para.ecc_bits);
+	PRINT_NANDC_I("Use ecc_bits: %x\n", g_nand_flash_ecc_bits);
+	PRINT_NANDC_I("access_freq: %x\n", nand_para.access_freq);
+	PRINT_NANDC_I("opt_mode: %x\n", nand_para.opt_mode);
+
+	PRINT_NANDC_I("Cache read enable: %x\n",
+		      nand_para.operation_opt & NAND_CACHE_READ_EN ? 1 : 0);
+	PRINT_NANDC_I("Cache random read enable: %x\n",
+		      nand_para.operation_opt &
+			NAND_CACHE_RANDOM_READ_EN ? 1 : 0);
+	PRINT_NANDC_I("Cache prog enable: %x\n",
+		      nand_para.operation_opt & NAND_CACHE_PROG_EN ? 1 : 0);
+	PRINT_NANDC_I("multi read enable: %x\n",
+		      nand_para.operation_opt & NAND_MULTI_READ_EN ? 1 : 0);
+
+	PRINT_NANDC_I("multi prog enable: %x\n",
+		      nand_para.operation_opt & NAND_MULTI_PROG_EN ? 1 : 0);
+	PRINT_NANDC_I("interleave enable: %x\n",
+		      nand_para.operation_opt & NAND_INTERLEAVE_EN ? 1 : 0);
+
+	PRINT_NANDC_I("read retry enable: %x\n",
+		      nand_para.operation_opt & NAND_READ_RETRY_EN ? 1 : 0);
+	PRINT_NANDC_I("randomizer enable: %x\n",
+		      nand_para.operation_opt & NAND_RANDOMIZER_EN ? 1 : 0);
+
+	PRINT_NANDC_I("SDR enable: %x\n",
+		      nand_para.operation_opt & NAND_SDR_EN ? 1 : 0);
+	PRINT_NANDC_I("ONFI enable: %x\n",
+		      nand_para.operation_opt & NAND_ONFI_EN ? 1 : 0);
+	PRINT_NANDC_I("TOGGLE enable: %x\n",
+		      nand_para.operation_opt & NAND_TOGGLE_EN ? 1 : 0);
+
+	PRINT_NANDC_I("g_nand_idb_res_blk_num: %x\n", g_nand_idb_res_blk_num);
+}
+
+static void ftl_flash_init(void)
+{
+	/* para init */
+	g_nand_phy_info.nand_type	= nand_para.cell;
+	g_nand_phy_info.die_num		= nand_para.die_per_chip;
+	g_nand_phy_info.plane_per_die	= nand_para.plane_per_die;
+	g_nand_phy_info.blk_per_plane	= nand_para.blk_per_plane;
+	g_nand_phy_info.page_per_blk	= nand_para.page_per_blk;
+	g_nand_phy_info.page_per_slc_blk	= nand_para.page_per_blk /
+						  nand_para.cell;
+	g_nand_phy_info.byte_per_sec	= 512;
+	g_nand_phy_info.sec_per_page	= nand_para.sec_per_page;
+	g_nand_phy_info.sec_per_blk	= nand_para.sec_per_page *
+					  nand_para.page_per_blk;
+	g_nand_phy_info.reserved_blk	= 8;
+	g_nand_phy_info.blk_per_die	= nand_para.plane_per_die *
+					  nand_para.blk_per_plane;
+	g_nand_phy_info.ecc_bits	= nand_para.ecc_bits;
+
+	/* driver register */
+	g_nand_ops.get_bad_blk_list	= get_bad_blk_list;
+	g_nand_ops.erase_blk		= flash_erase_block;
+	g_nand_ops.prog_page		= flash_prog_page;
+	g_nand_ops.read_page		= flash_read_page;
+}
+
+u32 nandc_flash_init(void __iomem *nandc_addr)
+{
+	u32 cs;
+
+	PRINT_NANDC_I("...%s enter...\n", __func__);
+	g_nand_idb_res_blk_num = MAX_IDB_RESERVED_BLOCK;
+
+	nandc_init(nandc_addr);
+
+	for (cs = 0; cs < MAX_FLASH_NUM; cs++) {
+		flash_read_id_raw(cs, id_byte[cs]);
+		if (cs == 0) {
+			if (id_byte[0][0] == 0xFF ||
+			    id_byte[0][0] == 0 ||
+			    id_byte[0][1] == 0xFF)
+				return FTL_NO_FLASH;
+			if (id_byte[0][1] != 0xF1 &&
+			    id_byte[0][1] != 0xDA &&
+			    id_byte[0][1] != 0xD1 &&
+			    id_byte[0][1] != 0x95 &&
+			    id_byte[0][1] != 0xDC)
+
+				return FTL_UNSUPPORTED_FLASH;
+		}
+	}
+	nand_para.nand_id[1] = id_byte[0][1];
+	if (id_byte[0][1] == 0xDA) {
+		nand_para.plane_per_die = 2;
+		nand_para.nand_id[1] = 0xDA;
+	} else if (id_byte[0][1] == 0xDC) {
+		nand_para.nand_id[1] = 0xDC;
+		if (id_byte[0][0] == 0x2C && id_byte[0][3] == 0xA6) {
+			nand_para.plane_per_die = 2;
+			nand_para.sec_per_page = 8;
+		} else {
+			nand_para.plane_per_die = 2;
+			nand_para.blk_per_plane = 2048;
+		}
+	}
+	flash_die_info_init();
+	flash_bch_sel(nand_para.ecc_bits);
+	nandc_flash_print_info();
+	/* flash_print_info(); */
+	ftl_flash_init();
+
+	#if FLASH_STRESS_TEST_EN
+	flash_test();
+	#endif
+
+	return 0;
+}
+
+void nandc_flash_get_id(u8 cs, void *buf)
+{
+	memcpy(buf, id_byte[cs], 5);
+}
+
+u32 nandc_flash_deinit(void)
+{
+	return 0;
+}
diff --git a/drivers/rkflash/flash.h b/drivers/rkflash/flash.h
new file mode 100644
index 0000000000..d7e44d7e9f
--- /dev/null
+++ b/drivers/rkflash/flash.h
@@ -0,0 +1,145 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#ifndef __FLASH_H
+#define __FLASH_H
+
+#include "typedef.h"
+
+#ifndef BIT
+#define BIT(nr)			(1 << (nr))
+#endif
+
+#define MAX_FLASH_NUM			2
+#define MAX_IDB_RESERVED_BLOCK		12
+
+#define NAND_CACHE_READ_EN		BIT(0)
+#define NAND_CACHE_RANDOM_READ_EN	BIT(1)
+#define NAND_CACHE_PROG_EN		BIT(2)
+#define NAND_MULTI_READ_EN		BIT(3)
+
+#define NAND_MULTI_PROG_EN		BIT(4)
+#define NAND_INTERLEAVE_EN		BIT(5)
+#define NAND_READ_RETRY_EN		BIT(6)
+#define NAND_RANDOMIZER_EN		BIT(7)
+
+#define NAND_INTER_MODE_OFFSET		(0x8)
+#define NAND_INTER_MODE_MARK		(0x07)
+#define NAND_INTER_SDR_EN		BIT(0)
+#define NAND_INTER_ONFI_EN		BIT(1)
+#define NAND_INTER_TOGGLE_EN		BIT(2)
+
+#define NAND_SDR_EN			BIT(8)
+#define NAND_ONFI_EN			BIT(9)
+#define NAND_TOGGLE_EN			BIT(10)
+#define NAND_UNIQUE_ID_EN		BIT(11)
+
+#define RESET_CMD		0xff
+#define READ_ID_CMD		0x90
+#define READ_STATUS_CMD		0x70
+#define PAGE_PROG_CMD		0x8010
+#define BLOCK_ERASE_CMD		0x60d0
+#define READ_CMD		0x0030
+#define READ_DP_OUT_CMD		0x05E0
+
+#define SAMSUNG			0x00	/* SAMSUNG */
+#define TOSHIBA			0x01	/* TOSHIBA */
+#define HYNIX			0x02	/* HYNIX */
+#define INFINEON		0x03	/* INFINEON */
+#define MICRON			0x04	/* MICRON */
+#define RENESAS			0x05	/* RENESAS */
+#define ST			0x06	/* ST */
+#define INTEL			0x07	/* intel */
+#define Sandisk			0x08	/* Sandisk */
+
+#define RR_NONE			0x00
+#define RR_HY_1			0x01	/* hynix H27UCG8T2M */
+#define RR_HY_2			0x02	/* hynix H27UBG08U0B */
+#define RR_HY_3			0x03	/* hynix H27UCG08U0B H27UBG08U0C */
+#define RR_HY_4                 0x04	/* hynix H27UCG8T2A */
+#define RR_HY_5                 0x05	/* hynix H27UCG8T2E */
+#define RR_HY_6                 0x06	/* hynix H27QCG8T2F5R-BCG */
+#define RR_MT_1                 0x11	/* micron */
+#define RR_MT_2                 0x12	/* micron L94C L95B */
+#define RR_TH_1                 0x21	/* toshiba */
+#define RR_TH_2                 0x22	/* toshiba */
+#define RR_TH_3                 0x23	/* toshiba */
+#define RR_SS_1                 0x31	/* samsung */
+#define RR_SD_1                 0x41	/* Sandisk */
+#define RR_SD_2                 0x42	/* Sandisk */
+#define RR_SD_3                 0x43	/* Sandisk */
+#define RR_SD_4                 0x44	/* Sandisk */
+
+/*  0 1 2 3 4 5 6 7 8 9 slc */
+#define LSB_0	0
+/*  0 1 2 3 6 7 A B E F hynix, micron 74A */
+#define LSB_1	1
+/*  0 1 3 5 7 9 B D toshiba samsung sandisk */
+#define LSB_2	2
+/*  0 1 2 3 4 5 8 9 C D 10 11 micron 84A */
+#define LSB_3	3
+/*  0 1 2 3 4 5 7 8 A B E F micron L95B */
+#define LSB_4	4
+/*  0 1 2 3 4 5 8 9 14 15 20 21 26 27 micron B74A TLC */
+#define LSB_6	6
+/*  0 3 6 9 C F 12 15 18 15 1B 1E 21 24 K9ABGD8U0C TLC */
+#define LSB_7	7
+
+/* BadBlockFlagMode */
+/* first spare @ first page of each blocks */
+#define BBF_1	1
+/* first spare @ last page of each blocks */
+#define BBF_2	2
+/* first spare @ first and last page of each blocks */
+#define BBF_11	3
+/* sandisk 15nm flash prog first page without data and check status */
+#define BBF_3	4
+
+#define MPM_0	0	/* block 0 ~ 1 */
+#define MPM_1	1	/* block 0 ~ 2048... */
+
+struct NAND_PARA_INFO_T {
+	u8	id_bytes;
+	u8	nand_id[6];
+	u8	vendor;
+	u8	die_per_chip;
+	u8	sec_per_page;
+	u16	page_per_blk;
+	u8	cell;	/* 1 slc , 2 mlc , 3 tlc */
+	u8	plane_per_die;
+	u16	 blk_per_plane;
+	u16	operation_opt;
+	u8	lsb_mode;
+	u8	read_retry_mode;
+	u8	ecc_bits;
+	u8	access_freq;
+	u8	opt_mode;
+	u8	die_gap;
+	u8	bad_block_mode;
+	u8	multi_plane_mode;
+	u8	reversd2[6];	/* 32 bytes */
+};
+
+struct FLASH_INFO_T {
+	u16	block_size;
+	u8	ecc_bits;
+	u32	flash_size;
+	u16	page_size;
+	u8	access_time;
+	u8	manufacturer_name;
+	u8	flash_mask;
+};
+
+extern struct nand_phy_info	g_nand_phy_info;
+extern struct nand_ops		g_nand_ops;
+extern void __iomem *nandc_base;
+
+void nandc_flash_get_id(u8 cs, void *buf);
+void nandc_flash_reset(u8 chip_sel);
+u32 nandc_flash_init(void __iomem *nandc_addr);
+u32 nandc_flash_deinit(void);
+
+#endif
diff --git a/drivers/rkflash/flash_com.h b/drivers/rkflash/flash_com.h
new file mode 100644
index 0000000000..65081efade
--- /dev/null
+++ b/drivers/rkflash/flash_com.h
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#ifndef __FLASH_COM_H
+#define __FLASH_COM_H
+
+#include "typedef.h"
+
+#define NAND_ERROR			INVALID_UINT32
+#define NAND_OK				0
+
+#define NAND_STS_OK                     0	/* bit 0 ecc error or ok */
+#define NAND_STS_REFRESH                256	/* need refresh */
+#define NAND_STS_EMPTY                  512	/* page is not proged */
+#define NAND_STS_ECC_ERR                NAND_ERROR
+
+#define FULL_SLC			0
+#define SLC				1
+
+#define NAND_FLASH_MLC_PAGE_TAG         0xFFFF
+#define MAX_FLASH_PAGE_SIZE		0x1000 /* 4KB */
+
+#define PAGE_ADDR_BITS			0
+#define PAGE_ADDR_MASK			((1u << 11) - 1)
+#define BLOCK_ADDR_BITS			11
+#define BLOCK_ADDR_MASK			((1u << 14) - 1)
+#define DIE_ADDR_BITS			25
+#define DIE_ADDR_MASK			((1u << 3) - 1)
+#define FLAG_ADDR_BITS			28
+#define FLAG_ADDR_MASK			((1u << 4) - 1)
+#define PHY_BLK_DIE_ADDR_BITS		14
+
+struct nand_req {
+	u32 status;
+	u32 page_addr;   /* 31:28 flag, 27:25: die, 24:11 block, 10:0 page */
+	u32 *p_data;
+	u32 *p_spare;
+	u32 lpa;
+};
+
+struct nand_phy_info {
+	u16	nand_type;		/* SLC,MLC,TLC */
+	u16	die_num;		/* number of LUNs */
+	u16	plane_per_die;
+	u16	blk_per_plane;
+	u16	blk_per_die;
+	u16	page_per_blk;		/* in MLC mode */
+	u16	page_per_slc_blk;	/* in SLC mode */
+	u16	sec_per_page;		/* physical page data size */
+	u16	sec_per_blk;		/* physical page data size */
+	u16	byte_per_sec;		/* size of logical sectors */
+	u16	reserved_blk;		/* reserved for boot loader in die 0*/
+	u8	ecc_bits;
+};
+
+struct nand_ops {
+	s32 (*get_bad_blk_list)(u16 *table, u32 die);
+	u32 (*erase_blk)(u8 cs, u32 page_addr);
+	u32 (*prog_page)(u8 cs, u32 page_addr, u32 *data, u32 *spare);
+	u32 (*read_page)(u8 cs, u32 page_addr, u32 *data, u32 *spare);
+};
+
+#endif
diff --git a/drivers/rkflash/nandc.c b/drivers/rkflash/nandc.c
new file mode 100644
index 0000000000..8f5c87c283
--- /dev/null
+++ b/drivers/rkflash/nandc.c
@@ -0,0 +1,292 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#include <common.h>
+#include <linux/compat.h>
+#include <linux/delay.h>
+
+#include "flash.h"
+#include "flash_com.h"
+#include "nandc.h"
+#include "typedef.h"
+
+#define     CPU_DELAY_NS(n)	ndelay(n)
+
+#define	    NANDC_MASTER_EN
+
+void __iomem *nandc_base;
+
+static u32 g_nandc_ecc_bits;
+#ifdef NANDC_MASTER_EN
+static struct MASTER_INFO_T master;
+static u32 *g_master_temp_buf;
+#endif
+
+void nandc_init(void __iomem *nandc_addr)
+{
+	union FM_CTL_T ctl_reg;
+
+	nandc_base = nandc_addr;
+
+	ctl_reg.d32 = 0;
+	ctl_reg.V6.wp = 1;
+	nandc_writel(ctl_reg.d32, NANDC_FMCTL);
+	nandc_writel(0, NANDC_RANDMZ_CFG);
+	nandc_time_cfg(40);
+
+#ifdef NANDC_MASTER_EN
+	if (!g_master_temp_buf)
+		g_master_temp_buf = (u32 *)ftl_malloc(MAX_FLASH_PAGE_SIZE +
+					      MAX_FLASH_PAGE_SIZE / 8);
+	master.page_buf = &g_master_temp_buf[0];
+	master.spare_buf = &g_master_temp_buf[MAX_FLASH_PAGE_SIZE / 4];
+	master.mapped = 0;
+#endif
+}
+
+void nandc_flash_cs(u8 chip_sel)
+{
+	union FM_CTL_T tmp;
+
+	tmp.d32 = nandc_readl(NANDC_FMCTL);
+	tmp.V6.cs = 0x01 << chip_sel;
+	nandc_writel(tmp.d32, NANDC_FMCTL);
+}
+
+void nandc_flash_de_cs(u8 chip_sel)
+{
+	union FM_CTL_T tmp;
+
+	tmp.d32 = nandc_readl(NANDC_FMCTL);
+	tmp.V6.cs = 0;
+	tmp.V6.flash_abort_clear = 0;
+	nandc_writel(tmp.d32, NANDC_FMCTL);
+}
+
+u32 nandc_delayns(u32 count)
+{
+	CPU_DELAY_NS(count);
+	return 0;
+}
+
+u32 nandc_wait_flash_ready(u8 chip_sel)
+{
+	union FM_CTL_T tmp;
+	u32 status;
+	u32 i;
+
+	status = 0;
+	for (i = 0; i < 100000; i++) {
+		nandc_delayns(100);
+		tmp.d32 = nandc_readl(NANDC_FMCTL);
+		if (tmp.V6.rdy != 0)
+			break;
+	}
+
+	if (i >= 100000)
+		status = -1;
+	return status;
+}
+
+void nandc_randmz_sel(u8 chip_sel, u32 randmz_seed)
+{
+	nandc_writel(randmz_seed, NANDC_RANDMZ_CFG);
+}
+
+void nandc_time_cfg(u32 ns)
+{
+	if (ns < 36)
+		nandc_writel(0x1061, NANDC_FMWAIT);
+	else if (ns >= 100)
+		nandc_writel(0x2082, NANDC_FMWAIT);
+	else
+		nandc_writel(0x1081, NANDC_FMWAIT);
+}
+
+void nandc_bch_sel(u8 bits)
+{
+	union BCH_CTL_T tmp;
+	union FL_CTL_T fl_reg;
+
+	fl_reg.d32 = 0;
+	fl_reg.V6.rst = 1;
+	nandc_writel(fl_reg.d32, NANDC_FLCTL);
+	g_nandc_ecc_bits = bits;
+	tmp.d32 = 0;
+	tmp.V6.addr = 0x10;
+	tmp.V6.bch_mode1 = 0;
+	if (bits == 16) {
+		tmp.V6.bch_mode = 0;
+	} else if (bits == 24) {
+		tmp.V6.bch_mode = 1;
+	} else {
+		tmp.V6.bch_mode1 = 1;
+		tmp.V6.bch_mode = 1;
+		if (bits == 40)
+			tmp.V6.bch_mode = 0;
+	}
+	tmp.V6.rst = 1;
+	nandc_writel(tmp.d32, NANDC_BCHCTL);
+}
+
+static void nandc_xfer_start(u8 chip_sel,
+			     u8 dir,
+			     u8 sector_count,
+			     u8 st_buf,
+			     u32 *p_data,
+			     u32 *p_spare)
+{
+	union BCH_CTL_T bch_reg;
+	union FL_CTL_T fl_reg;
+	u8 bus_mode = (p_spare || p_data);
+	u32 i;
+	union MTRANS_CFG_T master_reg;
+	u16 *p_spare_tmp = (u16 *)p_spare;
+	u64 vir_addr;
+
+	fl_reg.d32 = 0;
+	bch_reg.d32 = nandc_readl(NANDC_BCHCTL);
+	bch_reg.V6.addr = 0x10;
+	bch_reg.V6.power_down = 0;
+	bch_reg.V6.region = chip_sel;
+
+	fl_reg.V6.rdn = dir;
+	fl_reg.V6.dma = 1;
+	fl_reg.V6.tr_count = 1;
+	fl_reg.V6.async_tog_mix = 1;
+	fl_reg.V6.cor_en = 1;
+	fl_reg.V6.st_addr = st_buf / 2;
+
+	master_reg.d32 = nandc_readl(NANDC_MTRANS_CFG);
+	master_reg.V6.bus_mode = 0;
+	#ifdef NANDC_MASTER_EN
+	if (bus_mode != 0 && dir != 0) {
+		u32 spare_sz = 64;
+
+		for (i = 0; i < sector_count / 2; i++) {
+			if (p_spare) {
+				master.spare_buf[i * spare_sz / 4] =
+				(p_spare_tmp[0]) | ((u32)p_spare_tmp[1] << 16);
+				p_spare_tmp += 2;
+			} else{
+				master.spare_buf[i * spare_sz / 4] =
+				0xffffffff;
+			}
+		}
+	}
+	fl_reg.V6.page_num = (sector_count + 1) / 2;
+	master.page_vir = (u32 *)((p_data == (u32 *)NULL) ?
+				  master.page_buf :
+				  (u32 *)p_data);
+	master.spare_vir = (u32 *)master.spare_buf;
+
+	master.page_phy = (u32)((unsigned long)master.page_vir);
+	master.spare_phy = (u32)((unsigned long)master.spare_vir);
+	vir_addr = ((unsigned long)master.page_phy);
+	flush_dcache_range(vir_addr & (~0x3FuL),
+			   ((vir_addr + 63) & (~0x3FuL)) +
+				fl_reg.V6.page_num * 1024);
+	vir_addr = ((unsigned long)master.spare_phy);
+	flush_dcache_range(vir_addr & (~0x3FuL),
+			   ((vir_addr + 63) & (~0x3FuL)) +
+				fl_reg.V6.page_num * 128);
+	master.mapped = 1;
+	nandc_writel(master.page_phy, NANDC_MTRANS_SADDR0);
+	nandc_writel(master.spare_phy, NANDC_MTRANS_SADDR1);
+	master_reg.d32 = 0;
+	master_reg.V6.incr_num = 16;
+	master_reg.V6.burst = 7;
+	if ((((unsigned long)p_data) & 0x03) == 0)
+		master_reg.V6.hsize = 2;
+	master_reg.V6.bus_mode = 1;
+	master_reg.V6.ahb_wr = !dir;
+	master_reg.V6.ahb_wr_st = 1;
+	#endif
+
+	nandc_writel(master_reg.d32, NANDC_MTRANS_CFG);
+	nandc_writel(bch_reg.d32, NANDC_BCHCTL);
+	nandc_writel(fl_reg.d32, NANDC_FLCTL);
+	fl_reg.V6.start = 1;
+	nandc_writel(fl_reg.d32, NANDC_FLCTL);
+}
+
+static void nandc_xfer_comp(u8 chip_sel)
+{
+	union FL_CTL_T fl_reg;
+	union MTRANS_CFG_T master_reg;
+
+	master_reg.d32 = nandc_readl(NANDC_MTRANS_CFG);
+	if (master_reg.V6.bus_mode != 0) {
+		union MTRANS_STAT_T stat_reg;
+
+		if (master_reg.V6.ahb_wr != 0) {
+			do {
+				fl_reg.d32 = nandc_readl(NANDC_FLCTL);
+				stat_reg.d32 = nandc_readl(NANDC_MTRANS_STAT);
+			} while (stat_reg.V6.mtrans_cnt < fl_reg.V6.page_num);
+		} else {
+			do {
+				fl_reg.d32 = nandc_readl(NANDC_FLCTL);
+			} while (fl_reg.V6.tr_rdy == 0);
+		}
+	} else {
+		do {
+			fl_reg.d32 = nandc_readl(NANDC_FLCTL);
+		} while ((fl_reg.V6.tr_rdy == 0));
+	}
+}
+
+u32 nandc_xfer_data(u8 chip_sel, u8 dir, u8 sector_count,
+		    u32 *p_data, u32 *p_spare)
+{
+	u32 status = NAND_STS_OK;
+	u32 i;
+	u32 spare[16];
+	union BCH_ST_T bch_st_reg;
+
+	if (dir == NANDC_WRITE && !p_spare) {
+		p_spare = (u32 *)spare;
+		memset(spare, 0xFF, sizeof(spare));
+	}
+	nandc_xfer_start(chip_sel, dir, sector_count, 0, p_data, p_spare);
+	nandc_xfer_comp(chip_sel);
+	if (dir == NANDC_READ) {
+		if (p_spare) {
+			u32 spare_sz = 64;
+			u32 temp_data;
+			u8 *p_spare_temp = (u8 *)p_spare;
+
+			for (i = 0; i < sector_count / 2; i++) {
+				temp_data = master.spare_buf[i * spare_sz / 4];
+				*p_spare_temp++ = (u8)temp_data;
+				*p_spare_temp++ = (u8)(temp_data >> 8);
+				*p_spare_temp++ = (u8)(temp_data >> 16);
+				*p_spare_temp++ = (u8)(temp_data >> 24);
+			}
+		}
+		for (i = 0; i < sector_count / 4 ; i++) {
+			bch_st_reg.d32 = nandc_readl(NANDC_BCHST(i));
+			if (bch_st_reg.V6.fail0 || bch_st_reg.V6.fail1) {
+				status = NAND_STS_ECC_ERR;
+			} else {
+				u32 tmp = 0;
+
+				tmp =
+				max(bch_st_reg.V6.err_bits0 |
+				    ((u32)bch_st_reg.V6.err_bits0_5 << 5),
+				    bch_st_reg.V6.err_bits1 |
+				    ((u32)bch_st_reg.V6.err_bits1_5 << 5));
+				status = max(tmp, status);
+			}
+		}
+	}
+	nandc_writel(0, NANDC_MTRANS_CFG);
+	return status;
+}
+
+void nandc_clean_irq(void)
+{
+}
diff --git a/drivers/rkflash/nandc.h b/drivers/rkflash/nandc.h
new file mode 100644
index 0000000000..689f50f5cc
--- /dev/null
+++ b/drivers/rkflash/nandc.h
@@ -0,0 +1,224 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#ifndef __NAND_H
+#define __NAND_H
+
+#include <asm/io.h>
+
+#define nandc_writel(v, offs)	writel((v), (offs) + nandc_base)
+#define nandc_readl(offs)	readl((offs) + nandc_base)
+
+#define NANDC_READ	0
+#define NANDC_WRITE	1
+
+/* INT ID */
+enum NANDC_IRQ_NUM_T {
+	NC_IRQ_DMA = 0,
+	NC_IRQ_FRDY,
+	NC_IRQ_BCHERR,
+	NC_IRQ_BCHFAIL,
+	NC_IRQ_LLP
+};
+
+union FM_CTL_T {
+	u32 d32;
+	struct {
+		unsigned cs : 8;		/* bits[0:7] */
+		unsigned wp : 1;		/* bits[8] */
+		unsigned rdy : 1;		/* bits[9] */
+		unsigned fifo_empty : 1;	/* bits[10] */
+		unsigned reserved11 : 1;	/* bits[11] */
+		unsigned dwidth : 1;		/* bits[12] */
+		unsigned tm : 1;		/* bits[13] */
+		unsigned onficlk_en : 1;	/* bits[14] */
+		unsigned toggle_en : 1;		/* bits[15] */
+		unsigned flash_abort_en : 1;	/* bits[16] */
+		unsigned flash_abort_clear : 1;	/* bits[17] */
+		unsigned reserved18_23 : 6;	/* bits[18:23] */
+		unsigned read_delay : 3;	/* bits[24:26] */
+		unsigned reserved27_31 : 5;	/* bits[27:31] */
+	} V6;
+};
+
+union FM_WAIT_T {
+	u32 d32;
+	struct {
+		unsigned csrw : 5;
+		unsigned rwpw : 6;
+		unsigned rdy : 1;
+		unsigned rwcs : 6;
+		unsigned reserved18_23 : 6;
+		unsigned fmw_dly : 6;
+		unsigned fmw_dly_en : 1;
+		unsigned reserved31_31 : 1;
+	} V6;
+};
+
+union FL_CTL_T {
+	u32 d32;
+	struct {
+		unsigned rst : 1;
+		unsigned rdn : 1;
+		unsigned start : 1;
+		unsigned dma : 1;
+		unsigned st_addr : 1;
+		unsigned tr_count : 2;
+		unsigned rdy_ignore : 1;
+		/* unsigned int_clr : 1; */
+		/* unsigned int_en : 1; */
+		unsigned reserved8_9 : 2;
+		unsigned cor_en : 1;
+		unsigned lba_en : 1;
+		unsigned spare_size : 7;
+		unsigned reserved19 : 1;
+		unsigned tr_rdy : 1;
+		unsigned page_size : 1;
+		unsigned page_num : 6;
+		unsigned low_power : 1;
+		unsigned async_tog_mix : 1;
+		unsigned reserved30_31 : 2;
+	} V6;
+};
+
+union BCH_CTL_T {
+	u32 d32;
+	struct {
+		unsigned rst : 1;
+		unsigned reserved : 1;
+		unsigned addr_not_care : 1;
+		unsigned power_down : 1;
+		unsigned bch_mode : 1;	   /* 0-16bit/1KB, 1-24bit/1KB */
+		unsigned region : 3;
+		unsigned addr : 8;
+		unsigned bchpage : 1;
+		unsigned reserved17 : 1;
+		unsigned bch_mode1 : 1;
+		unsigned thres : 8;
+		unsigned reserved27_31 : 5;
+	} V6;
+};
+
+union BCH_ST_T {
+	u32 d32;
+	struct {
+		unsigned errf0 : 1;
+		unsigned done0 : 1;
+		unsigned fail0 : 1;
+		unsigned err_bits0 : 5;
+		unsigned err_bits_low0 : 5;
+		unsigned errf1 : 1;
+		unsigned done1 : 1;
+		unsigned fail1 : 1;
+		unsigned err_bits1 : 5;
+		unsigned err_bits_low1 : 5;
+		unsigned rdy : 1;
+		/* unsigned cnt : 1; */
+		unsigned err_bits0_5 : 1;
+		unsigned err_bits_low0_5 : 1;
+		unsigned err_bits1_5 : 1;
+		unsigned err_bits_low1_5 : 1;
+		unsigned reserved31_31 : 1;
+	} V6;
+};
+
+union MTRANS_CFG_T {
+	u32 d32;
+	struct {
+		unsigned ahb_wr_st : 1;
+		unsigned ahb_wr : 1;
+		unsigned bus_mode : 1;
+		unsigned hsize : 3;
+		unsigned burst : 3;
+		unsigned incr_num : 5;
+		unsigned fl_pwd : 1;
+		unsigned ahb_rst : 1;
+		unsigned reserved16_31 : 16;
+	} V6;
+};
+
+union MTRANS_STAT_T {
+	u32 d32;
+	struct {
+		unsigned bus_err : 16;
+		unsigned mtrans_cnt : 5;
+		unsigned reserved21_31 : 11;
+	} V6;
+};
+
+/* NANDC Registers */
+#define NANDC_FMCTL		0x0
+#define NANDC_FMWAIT		0x4
+#define NANDC_FLCTL		0x8
+#define NANDC_BCHCTL		0xc
+#define NANDC_MTRANS_CFG	0x10
+#define NANDC_MTRANS_SADDR0	0x14
+#define NANDC_MTRANS_SADDR1	0x18
+#define NANDC_MTRANS_STAT	0x1c
+#define NANDC_DLL_CTL_REG0	0x130
+#define NANDC_DLL_CTL_REG1	0x134
+#define NANDC_DLL_OBS_REG0	0x138
+#define NANDC_RANDMZ_CFG	0x150
+#define NANDC_EBI_EN		0x154
+#define NANDC_FMWAIT_SYN	0x158
+#define NANDC_MTRANS_STAT2	0x15c
+#define NANDC_NANDC_VER		0x160
+#define NANDC_LLP_CTL		0x164
+#define NANDC_LLP_STAT		0x168
+#define NANDC_INTEN		0x16c
+#define NANDC_INTCLR		0x170
+#define NANDC_INTST		0x174
+#define NANDC_SPARE0		0x200
+#define NANDC_SPARE1		0x230
+
+#define NANDC_BCHST(i)		({		\
+	u32 x = (i);				\
+	4 * x + x < 8 ? 0x20 : 0x520; })
+
+#define NANDC_CHIP_DATA(id)	(0x800 + (id) * 0x100)
+#define NANDC_CHIP_ADDR(id)	(0x800 + (id) * 0x100 + 0x4)
+#define NANDC_CHIP_CMD(id)	(0x800 + (id) * 0x100 + 0x8)
+
+struct MASTER_INFO_T {
+	u32  *page_buf;		/* [DATA_LEN]; */
+	u32  *spare_buf;	/* [DATA_LEN / (1024/128)]; */
+	u32  *page_vir;	/* page_buf_vir_addr */
+	u32  *spare_vir;	/* spare_buf_vir_addr */
+	u32  page_phy;		/* page_buf_phy_addr */
+	u32  spare_phy;	/* spare_buf_phy_addr*/
+	u32  mapped;
+	u32  cnt;
+};
+
+struct CHIP_MAP_INFO_T {
+	u32  *nandc_addr;
+	u32  chip_num;
+};
+
+unsigned long rknandc_dma_map_single(unsigned long ptr,
+				     int size,
+				     int dir);
+void rknandc_dma_unmap_single(unsigned long ptr,
+			      int size,
+			      int dir);
+
+void nandc_init(void __iomem *nandc_addr);
+void nandc_flash_cs(u8 chip_sel);
+void nandc_flash_de_cs(u8 chip_sel);
+u32 nandc_wait_flash_ready(u8 chip_sel);
+u32 nandc_delayns(u32 count);
+u32 nandc_xfer_data(u8 chip_sel,
+		    u8 dir,
+		    u8 sector_count,
+		    u32 *p_data,
+		    u32 *p_spare);
+void nandc_randmz_sel(u8 chip_sel, u32 randmz_seed);
+void nandc_bch_sel(u8 bits);
+void nandc_read_not_case_busy_en(u8 en);
+void nandc_time_cfg(u32 ns);
+void nandc_clean_irq(void);
+
+#endif
diff --git a/drivers/rkflash/rk_sftl.h b/drivers/rkflash/rk_sftl.h
new file mode 100644
index 0000000000..e2d596b358
--- /dev/null
+++ b/drivers/rkflash/rk_sftl.h
@@ -0,0 +1,18 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#ifndef __RK_SFTL_H
+#define __RK_SFTL_H
+
+u32 ftl_low_format(void);
+int sftl_init(void);
+int sftl_deinit(void);
+int sftl_read(u32 index, u32 count, u8 *buf);
+int sftl_write(u32 index, u32 count, u8 *buf);
+u32 sftl_get_density(void);
+s32 sftl_gc(void);
+
+#endif
diff --git a/drivers/rkflash/rk_sftl_arm_v7.S b/drivers/rkflash/rk_sftl_arm_v7.S
new file mode 100644
index 0000000000..e383c55612
--- /dev/null
+++ b/drivers/rkflash/rk_sftl_arm_v7.S
@@ -0,0 +1,55433 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+	.arch armv7-a
+	.eabi_attribute 20, 1
+	.eabi_attribute 21, 1
+	.eabi_attribute 23, 3
+	.eabi_attribute 24, 1
+	.eabi_attribute 25, 1
+	.eabi_attribute 26, 2
+	.eabi_attribute 30, 4
+	.eabi_attribute 34, 0
+	.eabi_attribute 18, 2
+	.file	"rk_sftl.c"
+	.text
+.Ltext0:
+	.cfi_sections	.debug_frame
+	.global	__aeabi_uidiv
+	.section	.text.l2p_addr_tran.isra.0,"ax",%progbits
+	.align	1
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	l2p_addr_tran.isra.0, %function
+l2p_addr_tran.isra.0:
+.LFB351:
+	.file 1 "drivers/rkflash/sftl_flash.c"
+	.loc 1 54 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL0:
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 3, -32
+	.cfi_offset 4, -28
+	.cfi_offset 5, -24
+	.cfi_offset 6, -20
+	.cfi_offset 7, -16
+	.cfi_offset 8, -12
+	.cfi_offset 10, -8
+	.cfi_offset 14, -4
+	.loc 1 70 0
+	lsrs	r7, r0, #10
+	.loc 1 62 0
+	ldr	r3, .L3
+	.loc 1 54 0
+	mov	r8, r1
+	mov	r6, r0
+	.loc 1 71 0
+	uxth	r0, r7
+	.loc 1 54 0
+	mov	r10, r2
+	.loc 1 72 0
+	uxth	r7, r7
+	.loc 1 62 0
+	ldrh	r4, [r3, #8]
+.LVL1:
+	.loc 1 74 0
+	ubfx	r6, r6, #0, #10
+	.loc 1 63 0
+	ldrh	r5, [r3, #10]
+.LVL2:
+	.loc 1 64 0
+	ldrh	r3, [r3, #14]
+	cmp	r3, #4
+	.loc 1 65 0
+	itt	eq
+	lsreq	r4, r4, #1
+.LVL3:
+	.loc 1 66 0
+	lsleq	r5, r5, #1
+.LVL4:
+	.loc 1 71 0
+	mov	r1, r4
+.LVL5:
+	.loc 1 66 0
+	it	eq
+	uxtheq	r5, r5
+.LVL6:
+	.loc 1 71 0
+	bl	__aeabi_uidiv
+.LVL7:
+	uxth	r0, r0
+.LVL8:
+	.loc 1 72 0
+	mls	r4, r0, r4, r7
+.LVL9:
+	.loc 1 74 0
+	mla	r4, r5, r4, r6
+	str	r4, [r8]
+	.loc 1 75 0
+	str	r0, [r10]
+	.loc 1 78 0
+	movs	r0, #0
+.LVL10:
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.LVL11:
+.L4:
+	.align	2
+.L3:
+	.word	.LANCHOR0
+	.cfi_endproc
+.LFE351:
+	.size	l2p_addr_tran.isra.0, .-l2p_addr_tran.isra.0
+	.section	.text.ftl_set_blk_mode.part.7,"ax",%progbits
+	.align	1
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_set_blk_mode.part.7, %function
+ftl_set_blk_mode.part.7:
+.LFB358:
+	.file 2 "drivers/rkflash/sftl_sys.c"
+	.loc 2 1346 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL12:
+	.loc 2 1349 0
+	ldr	r3, .L6
+	lsrs	r1, r0, #5
+	and	r0, r0, #31
+.LVL13:
+	ldr	r2, [r3]
+	movs	r3, #1
+	lsl	r0, r3, r0
+	ldr	r3, [r2, r1, lsl #2]
+	orrs	r3, r3, r0
+	str	r3, [r2, r1, lsl #2]
+	bx	lr
+.L7:
+	.align	2
+.L6:
+	.word	.LANCHOR1
+	.cfi_endproc
+.LFE358:
+	.size	ftl_set_blk_mode.part.7, .-ftl_set_blk_mode.part.7
+	.section	.text.Ftl_log2,"ax",%progbits
+	.align	1
+	.global	Ftl_log2
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	Ftl_log2, %function
+Ftl_log2:
+.LFB205:
+	.file 3 "drivers/rkflash/sftl_plat.c"
+	.loc 3 128 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL14:
+	.loc 3 132 0
+	movs	r1, #0
+	.loc 3 130 0
+	movs	r2, #1
+.LVL15:
+.L9:
+	.loc 3 132 0 discriminator 1
+	cmp	r2, r0
+	uxth	r3, r1
+.LVL16:
+	add	r1, r1, #1
+	bls	.L10
+.LVL17:
+	.loc 3 134 0
+	subs	r0, r3, #1
+.LVL18:
+	.loc 3 136 0
+	uxth	r0, r0
+	bx	lr
+.LVL19:
+.L10:
+	.loc 3 133 0 discriminator 3
+	lsls	r2, r2, #1
+.LVL20:
+	b	.L9
+	.cfi_endproc
+.LFE205:
+	.size	Ftl_log2, .-Ftl_log2
+	.section	.text.FtlPrintInfo,"ax",%progbits
+	.align	1
+	.global	FtlPrintInfo
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlPrintInfo, %function
+FtlPrintInfo:
+.LFB206:
+	.loc 3 159 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL21:
+	bx	lr
+	.cfi_endproc
+.LFE206:
+	.size	FtlPrintInfo, .-FtlPrintInfo
+	.section	.text.FtlSysBlkNumInit,"ax",%progbits
+	.align	1
+	.global	FtlSysBlkNumInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlSysBlkNumInit, %function
+FtlSysBlkNumInit:
+.LFB207:
+	.loc 3 165 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL22:
+	.loc 3 168 0
+	ldr	r3, .L13
+	cmp	r0, #24
+	it	cc
+	movcc	r0, #24
+.LVL23:
+	.loc 3 169 0
+	ldr	r2, .L13+4
+	.loc 3 168 0
+	str	r0, [r3]
+	.loc 3 169 0
+	ldr	r3, .L13+8
+	ldrh	r3, [r3]
+	muls	r3, r0, r3
+	str	r3, [r2]
+	.loc 3 170 0
+	ldr	r2, .L13+12
+	ldrh	r2, [r2]
+	subs	r0, r2, r0
+.LVL24:
+	ldr	r2, .L13+16
+	strh	r0, [r2]	@ movhi
+	.loc 3 174 0
+	movs	r0, #0
+	.loc 3 171 0
+	ldr	r2, .L13+20
+	ldr	r2, [r2]
+	subs	r3, r2, r3
+	ldr	r2, .L13+24
+	str	r3, [r2]
+	.loc 3 174 0
+	bx	lr
+.L14:
+	.align	2
+.L13:
+	.word	.LANCHOR2
+	.word	.LANCHOR4
+	.word	.LANCHOR3
+	.word	.LANCHOR6
+	.word	.LANCHOR5
+	.word	.LANCHOR8
+	.word	.LANCHOR7
+	.cfi_endproc
+.LFE207:
+	.size	FtlSysBlkNumInit, .-FtlSysBlkNumInit
+	.global	__aeabi_idiv
+	.section	.text.FtlConstantsInit,"ax",%progbits
+	.align	1
+	.global	FtlConstantsInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlConstantsInit, %function
+FtlConstantsInit:
+.LFB208:
+	.loc 3 183 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL25:
+	.loc 3 188 0
+	ldrh	r1, [r0]
+	ldr	r2, .L25
+	.loc 3 183 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 3 183 0
+	mov	r7, r0
+	.loc 3 189 0
+	ldrh	r5, [r0, #2]
+	.loc 3 188 0
+	strh	r1, [r2]	@ movhi
+	.loc 3 189 0
+	ldr	r2, .L25+4
+	.loc 3 190 0
+	ldrh	r0, [r0, #4]
+.LVL26:
+	.loc 3 189 0
+	strh	r5, [r2]	@ movhi
+	.loc 3 190 0
+	ldr	r2, .L25+8
+	strh	r0, [r2]	@ movhi
+	.loc 3 191 0
+	ldrh	r2, [r7, #14]
+	cmp	r2, #4
+	bne	.L16
+	.loc 3 192 0
+	ldrh	r2, [r7, #6]
+	ldr	r4, .L25+12
+	lsrs	r2, r2, #1
+	strh	r2, [r4]	@ movhi
+	.loc 3 193 0
+	movs	r4, #8
+	ldr	r2, .L25+16
+	strh	r4, [r2]	@ movhi
+.L16:
+	.loc 3 197 0 discriminator 3
+	ldr	r4, .L25+20
+	.loc 3 183 0 discriminator 3
+	movs	r2, #0
+.L17:
+.LVL27:
+	.loc 3 197 0 discriminator 3
+	strb	r2, [r2, r4]
+	.loc 3 196 0 discriminator 3
+	adds	r2, r2, #1
+.LVL28:
+	cmp	r2, #32
+	bne	.L17
+	.loc 3 198 0
+	ldr	r2, .L25+24
+.LVL29:
+	.loc 3 200 0
+	cmp	r1, #1
+	.loc 3 198 0
+	mov	r4, #5
+	.loc 3 204 0
+	smulbb	r5, r5, r0
+	.loc 3 199 0
+	mov	r6, #0
+	.loc 3 198 0
+	strh	r4, [r2]	@ movhi
+	.loc 3 201 0
+	it	eq
+	strheq	r1, [r2]	@ movhi
+	.loc 3 202 0
+	mov	r1, #640
+	ldr	r2, .L25+28
+	.loc 3 204 0
+	uxth	r5, r5
+	.loc 3 199 0
+	ldr	r4, .L25+32
+	.loc 3 202 0
+	strh	r1, [r2]	@ movhi
+	.loc 3 204 0
+	ldr	r2, .L25+36
+	.loc 3 199 0
+	strh	r6, [r4]	@ movhi
+	.loc 3 210 0
+	ldr	r6, .L25+40
+	.loc 3 204 0
+	strh	r5, [r2]	@ movhi
+	.loc 3 205 0
+	ldr	r2, .L25+12
+	ldrh	r4, [r2]
+	ldr	r2, .L25+44
+	smulbb	r0, r0, r4
+	uxth	r0, r0
+	strh	r0, [r2]	@ movhi
+	.loc 3 206 0
+	bl	Ftl_log2
+.LVL30:
+	ldr	r2, .L25+48
+	.loc 3 207 0
+	ldrh	r8, [r7, #12]
+	ldr	r3, .L25+52
+	.loc 3 206 0
+	strh	r0, [r2]	@ movhi
+	.loc 3 208 0
+	ldr	r2, .L25+56
+	.loc 3 209 0
+	smulbb	r1, r5, r8
+	.loc 3 207 0
+	strh	r8, [r3]	@ movhi
+	.loc 3 208 0
+	strh	r8, [r2]	@ movhi
+	.loc 3 209 0
+	ldr	r2, .L25+60
+	strh	r1, [r2]	@ movhi
+	.loc 3 210 0
+	ldr	r2, .L25+16
+	ldrh	fp, [r2]
+	mov	r0, fp
+	bl	Ftl_log2
+.LVL31:
+	.loc 3 212 0
+	lsl	r2, fp, #9
+	ldr	r1, .L25+64
+	.loc 3 214 0
+	ldr	r3, .L25+68
+	.loc 3 210 0
+	mov	r10, r0
+	.loc 3 212 0
+	uxth	r2, r2
+	.loc 3 210 0
+	strh	r0, [r6]	@ movhi
+	.loc 3 218 0
+	mov	r0, #5120
+	.loc 3 212 0
+	strh	r2, [r1]	@ movhi
+	.loc 3 213 0
+	lsrs	r2, r2, #8
+	ldr	r1, .L25+72
+	strh	r2, [r1]	@ movhi
+	.loc 3 218 0
+	mul	r1, r8, fp
+	.loc 3 214 0
+	ldrh	r2, [r7, #20]
+	ldr	r7, .L25+52
+.LVL32:
+	strh	r2, [r3]	@ movhi
+	.loc 3 216 0
+	mul	r3, r4, r5
+	ldr	r2, .L25+76
+	.loc 3 223 0
+	lsls	r4, r4, #6
+	.loc 3 216 0
+	str	r3, [r2]
+	.loc 3 217 0
+	mul	r3, fp, r3
+	ldr	r2, .L25+80
+	mul	r3, r8, r3
+	ldr	r8, .L25+116
+	asrs	r3, r3, #11
+	str	r3, [r2]
+	.loc 3 218 0
+	bl	__aeabi_idiv
+.LVL33:
+	uxth	r0, r0
+	.loc 3 221 0
+	ldr	r2, .L25+84
+	.loc 3 226 0
+	mov	r1, r5
+	.loc 3 219 0
+	cmp	r0, #4
+	.loc 3 220 0
+	itet	ls
+	movls	r3, #4
+	.loc 3 218 0
+	strhhi	r0, [r8]	@ movhi
+	.loc 3 220 0
+	strhls	r3, [r8]	@ movhi
+	.loc 3 221 0
+	mov	r3, #640
+	asr	r3, r3, r10
+	.loc 3 223 0
+	add	r10, r10, #9
+	asr	r4, r4, r10
+	.loc 3 224 0
+	ldr	r10, .L25+120
+	.loc 3 221 0
+	adds	r3, r3, #2
+	.loc 3 226 0
+	ldrh	r0, [r8]
+	.loc 3 221 0
+	strh	r3, [r2]	@ movhi
+	.loc 3 223 0
+	ldr	r3, .L25+88
+	strh	r4, [r3]	@ movhi
+	uxth	r4, r4
+	.loc 3 224 0
+	mul	r3, r5, r4
+	.loc 3 226 0
+	adds	r4, r4, #8
+	.loc 3 224 0
+	str	r3, [r10]
+	.loc 3 226 0
+	bl	__aeabi_uidiv
+.LVL34:
+	uxtah	r0, r4, r0
+	ldr	r4, .L25+92
+	.loc 3 227 0
+	cmp	r5, #1
+	.loc 3 228 0
+	it	eq
+	addeq	r0, r0, #4
+	str	r0, [r4]
+	.loc 3 231 0
+	ldrh	r0, [r4]
+	bl	FtlSysBlkNumInit
+.LVL35:
+	.loc 3 232 0
+	ldr	r2, [r4]
+	.loc 3 236 0
+	movs	r0, #0
+	.loc 3 232 0
+	ldr	r3, .L25+96
+	str	r2, [r3]
+	.loc 3 234 0
+	ldr	r3, .L25+100
+	ldr	r2, [r3]
+	ldrh	r3, [r7]
+	lsls	r2, r2, #2
+	muls	r3, r2, r3
+	ldrh	r2, [r6]
+	adds	r2, r2, #9
+	lsrs	r3, r3, r2
+	ldr	r2, .L25+104
+	adds	r3, r3, #2
+	strh	r3, [r2]	@ movhi
+	.loc 3 235 0
+	movs	r2, #32
+	ldr	r3, .L25+108
+	strh	r2, [r3]	@ movhi
+	.loc 3 236 0
+	ldr	r3, .L25+112
+	str	r0, [r3]
+	.loc 3 237 0
+	ldrh	r3, [r8]
+	adds	r3, r3, #3
+	strh	r3, [r8]	@ movhi
+	.loc 3 238 0
+	ldr	r3, [r10]
+	adds	r3, r3, #3
+	str	r3, [r10]
+	.loc 3 263 0
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L26:
+	.align	2
+.L25:
+	.word	.LANCHOR9
+	.word	.LANCHOR10
+	.word	.LANCHOR11
+	.word	.LANCHOR6
+	.word	.LANCHOR12
+	.word	.LANCHOR13
+	.word	.LANCHOR14
+	.word	.LANCHOR16
+	.word	.LANCHOR15
+	.word	.LANCHOR3
+	.word	.LANCHOR22
+	.word	.LANCHOR17
+	.word	.LANCHOR18
+	.word	.LANCHOR19
+	.word	.LANCHOR20
+	.word	.LANCHOR21
+	.word	.LANCHOR23
+	.word	.LANCHOR25
+	.word	.LANCHOR24
+	.word	.LANCHOR8
+	.word	.LANCHOR26
+	.word	.LANCHOR28
+	.word	.LANCHOR29
+	.word	.LANCHOR2
+	.word	.LANCHOR31
+	.word	.LANCHOR7
+	.word	.LANCHOR32
+	.word	.LANCHOR33
+	.word	.LANCHOR34
+	.word	.LANCHOR27
+	.word	.LANCHOR30
+	.cfi_endproc
+.LFE208:
+	.size	FtlConstantsInit, .-FtlConstantsInit
+	.section	.text.IsBlkInVendorPart,"ax",%progbits
+	.align	1
+	.global	IsBlkInVendorPart
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	IsBlkInVendorPart, %function
+IsBlkInVendorPart:
+.LFB211:
+	.loc 3 514 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL36:
+	.loc 3 517 0
+	ldr	r3, .L34
+	ldrh	r3, [r3]
+	cbz	r3, .L33
+.LBB164:
+.LBB165:
+	.loc 3 519 0
+	ldr	r3, .L34+4
+	.loc 3 518 0
+	ldr	r2, .L34+8
+	.loc 3 519 0
+	ldr	r3, [r3]
+	ldrh	r2, [r2]
+	add	r2, r3, r2, lsl #1
+.L29:
+	.loc 3 518 0
+	cmp	r3, r2
+	bne	.L30
+.L33:
+.LBE165:
+.LBE164:
+	.loc 3 524 0
+	movs	r0, #0
+.LVL37:
+	bx	lr
+.LVL38:
+.L30:
+.LBB167:
+.LBB166:
+	.loc 3 519 0
+	ldrh	r1, [r3], #2
+	cmp	r0, r1
+	bne	.L29
+	.loc 3 520 0
+	movs	r0, #1
+.LVL39:
+.LBE166:
+.LBE167:
+	.loc 3 525 0
+	bx	lr
+.L35:
+	.align	2
+.L34:
+	.word	.LANCHOR35
+	.word	.LANCHOR36
+	.word	.LANCHOR27
+	.cfi_endproc
+.LFE211:
+	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
+	.section	.text.sftl_get_density,"ax",%progbits
+	.align	1
+	.global	sftl_get_density
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sftl_get_density, %function
+sftl_get_density:
+.LFB224:
+	.loc 3 1214 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	.loc 3 1216 0
+	ldr	r3, .L37
+	ldr	r0, [r3]
+	bx	lr
+.L38:
+	.align	2
+.L37:
+	.word	.LANCHOR34
+	.cfi_endproc
+.LFE224:
+	.size	sftl_get_density, .-sftl_get_density
+	.global	__aeabi_uidivmod
+	.section	.text.FtlBbmMapBadBlock,"ax",%progbits
+	.align	1
+	.global	FtlBbmMapBadBlock
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlBbmMapBadBlock, %function
+FtlBbmMapBadBlock:
+.LFB225:
+	.file 4 "drivers/rkflash/sftl_bbm.c"
+	.loc 4 5 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL40:
+	.loc 4 10 0
+	ldr	r3, .L40
+	.loc 4 5 0
+	push	{r0, r1, r2, r4, r5, r6, r7, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -20
+	.cfi_offset 5, -16
+	.cfi_offset 6, -12
+	.cfi_offset 7, -8
+	.cfi_offset 14, -4
+	.loc 4 5 0
+	mov	r5, r0
+	.loc 4 10 0
+	ldrh	r4, [r3]
+	mov	r1, r4
+	bl	__aeabi_uidiv
+.LVL41:
+	mov	r1, r4
+	.loc 4 13 0
+	ldr	r4, .L40+4
+	.loc 4 10 0
+	uxth	r6, r0
+.LVL42:
+	mov	r0, r5
+	bl	__aeabi_uidivmod
+.LVL43:
+	.loc 4 13 0
+	add	r2, r4, r6, lsl #2
+	uxth	r3, r1
+.LVL44:
+	.loc 4 15 0
+	ldr	r2, [r2, #28]
+	lsrs	r1, r3, #5
+	and	r7, r3, #31
+	movs	r0, #1
+	lsls	r0, r0, r7
+	ldr	r7, [r2, r1, lsl #2]
+	orrs	r0, r0, r7
+	str	r0, [r2, r1, lsl #2]
+	.loc 4 16 0
+	mov	r2, r6
+	str	r0, [sp]
+	mov	r1, r5
+	ldr	r0, .L40+8
+	bl	printf
+.LVL45:
+	.loc 4 17 0
+	ldrh	r3, [r4, #6]
+	.loc 4 19 0
+	movs	r0, #0
+	.loc 4 17 0
+	adds	r3, r3, #1
+	strh	r3, [r4, #6]	@ movhi
+	.loc 4 19 0
+	add	sp, sp, #12
+	.cfi_def_cfa_offset 20
+	@ sp needed
+	pop	{r4, r5, r6, r7, pc}
+.LVL46:
+.L41:
+	.align	2
+.L40:
+	.word	.LANCHOR17
+	.word	.LANCHOR37
+	.word	.LC0
+	.cfi_endproc
+.LFE225:
+	.size	FtlBbmMapBadBlock, .-FtlBbmMapBadBlock
+	.section	.text.FtlBbmIsBadBlock,"ax",%progbits
+	.align	1
+	.global	FtlBbmIsBadBlock
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlBbmIsBadBlock, %function
+FtlBbmIsBadBlock:
+.LFB226:
+	.loc 4 24 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL47:
+	.loc 4 30 0
+	ldr	r3, .L43
+	.loc 4 24 0
+	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 4 24 0
+	mov	r6, r0
+	.loc 4 30 0
+	ldrh	r5, [r3]
+.LVL48:
+	.loc 4 31 0
+	mov	r1, r5
+	bl	__aeabi_uidivmod
+.LVL49:
+	.loc 4 30 0
+	mov	r0, r6
+	.loc 4 31 0
+	uxth	r4, r1
+.LVL50:
+	.loc 4 30 0
+	mov	r1, r5
+	bl	__aeabi_uidiv
+.LVL51:
+	.loc 4 33 0
+	ldr	r3, .L43+4
+	.loc 4 30 0
+	uxth	r0, r0
+	.loc 4 34 0
+	lsrs	r2, r4, #5
+	and	r4, r4, #31
+.LVL52:
+	.loc 4 33 0
+	add	r0, r3, r0, lsl #2
+	.loc 4 34 0
+	ldr	r3, [r0, #28]
+	ldr	r0, [r3, r2, lsl #2]
+	lsrs	r0, r0, r4
+	.loc 4 36 0
+	and	r0, r0, #1
+	pop	{r4, r5, r6, pc}
+.LVL53:
+.L44:
+	.align	2
+.L43:
+	.word	.LANCHOR17
+	.word	.LANCHOR37
+	.cfi_endproc
+.LFE226:
+	.size	FtlBbmIsBadBlock, .-FtlBbmIsBadBlock
+	.section	.text.FtlBbtInfoPrint,"ax",%progbits
+	.align	1
+	.global	FtlBbtInfoPrint
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlBbtInfoPrint, %function
+FtlBbtInfoPrint:
+.LFB227:
+	.loc 4 39 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.cfi_endproc
+.LFE227:
+	.size	FtlBbtInfoPrint, .-FtlBbtInfoPrint
+	.section	.text.FtlBbtCalcTotleCnt,"ax",%progbits
+	.align	1
+	.global	FtlBbtCalcTotleCnt
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlBbtCalcTotleCnt, %function
+FtlBbtCalcTotleCnt:
+.LFB231:
+	.loc 4 157 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL54:
+	.loc 4 160 0
+	ldr	r3, .L53
+	ldr	r2, .L53+4
+	.loc 4 157 0
+	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 4 160 0
+	movs	r5, #0
+	ldrh	r3, [r3]
+	.loc 4 159 0
+	mov	r4, r5
+	.loc 4 160 0
+	ldrh	r6, [r2]
+	muls	r6, r3, r6
+.LVL55:
+.L47:
+	uxth	r0, r5
+.LVL56:
+	.loc 4 160 0 is_stmt 0 discriminator 1
+	cmp	r0, r6
+	blt	.L49
+	.loc 4 169 0 is_stmt 1
+	mov	r0, r4
+.LVL57:
+	pop	{r4, r5, r6, pc}
+.LVL58:
+.L49:
+	.loc 4 162 0
+	bl	FtlBbmIsBadBlock
+.LVL59:
+	cbz	r0, .L48
+	.loc 4 164 0
+	adds	r4, r4, #1
+.LVL60:
+	uxth	r4, r4
+.LVL61:
+.L48:
+	adds	r5, r5, #1
+.LVL62:
+	b	.L47
+.L54:
+	.align	2
+.L53:
+	.word	.LANCHOR17
+	.word	.LANCHOR10
+	.cfi_endproc
+.LFE231:
+	.size	FtlBbtCalcTotleCnt, .-FtlBbtCalcTotleCnt
+	.section	.text.V2P_block,"ax",%progbits
+	.align	1
+	.global	V2P_block
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	V2P_block, %function
+V2P_block:
+.LFB235:
+	.loc 2 5 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL63:
+	push	{r3, r4, r5, r6, r7, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 3, -24
+	.cfi_offset 4, -20
+	.cfi_offset 5, -16
+	.cfi_offset 6, -12
+	.cfi_offset 7, -8
+	.cfi_offset 14, -4
+	.loc 2 5 0
+	mov	r5, r1
+	.loc 2 8 0
+	ldr	r3, .L56
+	.loc 2 5 0
+	mov	r7, r0
+	.loc 2 8 0
+	ldrh	r6, [r3]
+.LVL64:
+	mov	r1, r6
+.LVL65:
+	bl	__aeabi_uidiv
+.LVL66:
+	ldr	r3, .L56+4
+	smulbb	r5, r6, r5
+	mov	r1, r6
+	ldrh	r4, [r3]
+	smulbb	r4, r4, r0
+	mov	r0, r7
+	bl	__aeabi_uidivmod
+.LVL67:
+	adds	r0, r5, r1
+	add	r0, r0, r4
+	.loc 2 10 0
+	uxth	r0, r0
+	pop	{r3, r4, r5, r6, r7, pc}
+.L57:
+	.align	2
+.L56:
+	.word	.LANCHOR11
+	.word	.LANCHOR17
+	.cfi_endproc
+.LFE235:
+	.size	V2P_block, .-V2P_block
+	.section	.text.P2V_plane,"ax",%progbits
+	.align	1
+	.global	P2V_plane
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	P2V_plane, %function
+P2V_plane:
+.LFB236:
+	.loc 2 13 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL68:
+	.loc 2 16 0
+	ldr	r3, .L59
+	.loc 2 13 0
+	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 2 13 0
+	mov	r6, r0
+	.loc 2 16 0
+	ldrh	r5, [r3]
+.LVL69:
+	ldr	r3, .L59+4
+	ldrh	r1, [r3]
+	bl	__aeabi_uidiv
+.LVL70:
+	smulbb	r4, r0, r5
+	mov	r1, r5
+	mov	r0, r6
+	bl	__aeabi_uidivmod
+.LVL71:
+	add	r1, r1, r4
+	.loc 2 18 0
+	uxth	r0, r1
+	pop	{r4, r5, r6, pc}
+.L60:
+	.align	2
+.L59:
+	.word	.LANCHOR11
+	.word	.LANCHOR17
+	.cfi_endproc
+.LFE236:
+	.size	P2V_plane, .-P2V_plane
+	.section	.text.P2V_block_in_plane,"ax",%progbits
+	.align	1
+	.global	P2V_block_in_plane
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	P2V_block_in_plane, %function
+P2V_block_in_plane:
+.LFB237:
+	.loc 2 21 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL72:
+	push	{r3, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 3, -8
+	.cfi_offset 14, -4
+	.loc 2 24 0
+	ldr	r3, .L62
+	ldrh	r1, [r3]
+	bl	__aeabi_uidivmod
+.LVL73:
+	.loc 2 25 0
+	ldr	r3, .L62+4
+	.loc 2 24 0
+	uxth	r0, r1
+.LVL74:
+	.loc 2 25 0
+	ldrh	r1, [r3]
+	bl	__aeabi_uidiv
+.LVL75:
+	.loc 2 27 0
+	uxth	r0, r0
+	pop	{r3, pc}
+.L63:
+	.align	2
+.L62:
+	.word	.LANCHOR17
+	.word	.LANCHOR11
+	.cfi_endproc
+.LFE237:
+	.size	P2V_block_in_plane, .-P2V_block_in_plane
+	.section	.text.ftl_cmp_data_ver,"ax",%progbits
+	.align	1
+	.global	ftl_cmp_data_ver
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_cmp_data_ver, %function
+ftl_cmp_data_ver:
+.LFB238:
+	.loc 2 31 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL76:
+	.loc 2 34 0
+	cmp	r0, r1
+	bls	.L65
+	.loc 2 36 0
+	subs	r0, r0, r1
+.LVL77:
+	cmp	r0, #-2147483648
+	ite	hi
+	movhi	r0, #0
+	movls	r0, #1
+	bx	lr
+.LVL78:
+.L65:
+	.loc 2 40 0
+	subs	r0, r1, r0
+.LVL79:
+	cmp	r0, #-2147483648
+	ite	ls
+	movls	r0, #0
+	movhi	r0, #1
+.LVL80:
+	.loc 2 44 0
+	bx	lr
+	.cfi_endproc
+.LFE238:
+	.size	ftl_cmp_data_ver, .-ftl_cmp_data_ver
+	.section	.text.FtlFreeSysBlkQueueEmpty,"ax",%progbits
+	.align	1
+	.global	FtlFreeSysBlkQueueEmpty
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlFreeSysBlkQueueEmpty, %function
+FtlFreeSysBlkQueueEmpty:
+.LFB241:
+	.loc 2 88 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	.loc 2 89 0
+	ldr	r3, .L68
+	ldrh	r0, [r3, #6]
+	.loc 2 90 0
+	clz	r0, r0
+	lsrs	r0, r0, #5
+	bx	lr
+.L69:
+	.align	2
+.L68:
+	.word	.LANCHOR38
+	.cfi_endproc
+.LFE241:
+	.size	FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty
+	.section	.text.FtlFreeSysBlkQueueFull,"ax",%progbits
+	.align	1
+	.global	FtlFreeSysBlkQueueFull
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlFreeSysBlkQueueFull, %function
+FtlFreeSysBlkQueueFull:
+.LFB242:
+	.loc 2 93 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	.loc 2 94 0
+	ldr	r3, .L71
+	ldrh	r0, [r3, #6]
+	.loc 2 95 0
+	sub	r3, r0, #1024
+	rsbs	r0, r3, #0
+	adcs	r0, r0, r3
+	bx	lr
+.L72:
+	.align	2
+.L71:
+	.word	.LANCHOR38
+	.cfi_endproc
+.LFE242:
+	.size	FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull
+	.section	.text.FtlFreeSysBLkSort,"ax",%progbits
+	.align	1
+	.global	FtlFreeSysBLkSort
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlFreeSysBLkSort, %function
+FtlFreeSysBLkSort:
+.LFB244:
+	.loc 2 116 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL81:
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 123 0
+	ldr	r4, .L82
+	.loc 2 125 0
+	ldr	r3, .L82+4
+	.loc 2 124 0
+	ldrh	r7, [r4, #2]
+	.loc 2 123 0
+	ldrh	r6, [r4, #6]
+	.loc 2 125 0
+	ldr	r5, [r3]
+	ldr	r3, .L82+8
+	add	r8, r4, r7, lsl #1
+	mov	r10, r5
+	ldr	r3, [r3]
+	add	fp, r5, r6, lsl #2
+	add	r8, r8, #6
+.LVL82:
+.L74:
+	.loc 2 123 0 discriminator 1
+	cmp	r10, fp
+	bne	.L75
+	movs	r3, #0
+	.loc 2 128 0
+	add	lr, r6, #-1
+.L76:
+.LVL83:
+	.loc 2 128 0 is_stmt 0 discriminator 1
+	cmp	r3, lr
+	blt	.L81
+	.loc 2 144 0 is_stmt 1
+	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL84:
+.L75:
+	.cfi_restore_state
+	.loc 2 124 0 discriminator 3
+	ldrh	r0, [r8, #2]!
+	str	r3, [sp, #4]
+	bl	P2V_block_in_plane
+.LVL85:
+	.loc 2 125 0 discriminator 3
+	ldr	r3, [sp, #4]
+	ldrh	r2, [r3, r0, lsl #1]
+	str	r2, [r10], #4
+	b	.L74
+.LVL86:
+.L81:
+	.loc 2 130 0
+	add	ip, r3, #1
+	mov	r2, r3
+	uxth	ip, ip
+.LVL87:
+	mov	r8, ip
+.LVL88:
+.L77:
+	.loc 2 130 0 is_stmt 0 discriminator 1
+	cmp	r8, r6
+	bcc	.L79
+	.loc 2 134 0 is_stmt 1
+	cmp	r3, r2
+	beq	.L80
+	.loc 2 135 0
+	ldr	r0, [r5, r2, lsl #2]
+.LVL89:
+	.loc 2 136 0
+	ldr	r1, [r5, r3, lsl #2]
+	str	r1, [r5, r2, lsl #2]
+	.loc 2 139 0
+	add	r2, r2, r7
+.LVL90:
+	.loc 2 137 0
+	str	r0, [r5, r3, lsl #2]
+	.loc 2 140 0
+	add	r3, r3, r7
+.LVL91:
+	.loc 2 139 0
+	adds	r2, r2, #4
+	.loc 2 140 0
+	adds	r3, r3, #4
+	.loc 2 139 0
+	ldrh	r1, [r4, r2, lsl #1]
+.LVL92:
+	.loc 2 140 0
+	ldrh	r0, [r4, r3, lsl #1]
+.LVL93:
+	strh	r0, [r4, r2, lsl #1]	@ movhi
+	.loc 2 141 0
+	strh	r1, [r4, r3, lsl #1]	@ movhi
+.LVL94:
+.L80:
+	mov	r3, ip
+	b	.L76
+.LVL95:
+.L79:
+	.loc 2 131 0
+	ldr	r1, [r5, r8, lsl #2]
+	ldr	r0, [r5, r2, lsl #2]
+	cmp	r0, r1
+	it	hi
+	movhi	r2, r8
+.LVL96:
+	.loc 2 130 0
+	add	r8, r8, #1
+.LVL97:
+	uxth	r8, r8
+.LVL98:
+	b	.L77
+.L83:
+	.align	2
+.L82:
+	.word	.LANCHOR38
+	.word	.LANCHOR39
+	.word	.LANCHOR40
+	.cfi_endproc
+.LFE244:
+	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
+	.section	.text.IsInFreeQueue,"ax",%progbits
+	.align	1
+	.global	IsInFreeQueue
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	IsInFreeQueue, %function
+IsInFreeQueue:
+.LFB245:
+	.loc 2 147 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL99:
+.LBB168:
+.LBB169:
+	.loc 2 94 0
+	ldr	r3, .L90
+.LBE169:
+.LBE168:
+	.loc 2 147 0
+	push	{r4, r5, lr}
+	.cfi_def_cfa_offset 12
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+.LBB171:
+.LBB170:
+	.loc 2 94 0
+	ldrh	r4, [r3, #6]
+.LBE170:
+.LBE171:
+	.loc 2 152 0
+	cmp	r4, #1024
+	beq	.L88
+	.loc 2 155 0
+	ldrh	r5, [r3, #2]
+	movs	r1, #0
+.L86:
+.LVL100:
+	.loc 2 154 0 discriminator 1
+	cmp	r1, r4
+	bcc	.L87
+.LVL101:
+.L88:
+	.loc 2 148 0
+	movs	r0, #0
+.LVL102:
+	pop	{r4, r5, pc}
+.LVL103:
+.L87:
+	.loc 2 155 0
+	adds	r2, r1, r5
+	ubfx	r2, r2, #0, #10
+	adds	r2, r2, #4
+	ldrh	r2, [r3, r2, lsl #1]
+	cmp	r2, r0
+	beq	.L89
+	.loc 2 154 0 discriminator 2
+	adds	r1, r1, #1
+.LVL104:
+	b	.L86
+.L89:
+	.loc 2 156 0
+	movs	r0, #1
+.LVL105:
+	.loc 2 162 0
+	pop	{r4, r5, pc}
+.L91:
+	.align	2
+.L90:
+	.word	.LANCHOR38
+	.cfi_endproc
+.LFE245:
+	.size	IsInFreeQueue, .-IsInFreeQueue
+	.section	.text.FtlFreeSysBlkQueueOut,"ax",%progbits
+	.align	1
+	.global	FtlFreeSysBlkQueueOut
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlFreeSysBlkQueueOut, %function
+FtlFreeSysBlkQueueOut:
+.LFB246:
+	.loc 2 165 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL106:
+.LBB172:
+.LBB173:
+	.loc 2 89 0
+	ldr	r2, .L95
+	ldrh	r1, [r2, #6]
+.LBE173:
+.LBE172:
+	.loc 2 168 0
+	cbz	r1, .L94
+.LVL107:
+.LBB174:
+	.loc 2 170 0
+	ldrh	r3, [r2, #2]
+	.loc 2 171 0
+	subs	r1, r1, #1
+	strh	r1, [r2, #6]	@ movhi
+	.loc 2 170 0
+	adds	r0, r3, #4
+	.loc 2 172 0
+	adds	r3, r3, #1
+	ubfx	r3, r3, #0, #10
+	.loc 2 170 0
+	ldrh	r0, [r2, r0, lsl #1]
+.LVL108:
+	.loc 2 172 0
+	strh	r3, [r2, #2]	@ movhi
+	bx	lr
+.LVL109:
+.L94:
+.LBE174:
+	.loc 2 166 0
+	movw	r0, #65535
+.LVL110:
+	.loc 2 176 0
+	bx	lr
+.L96:
+	.align	2
+.L95:
+	.word	.LANCHOR38
+	.cfi_endproc
+.LFE246:
+	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
+	.section	.text.insert_data_list,"ax",%progbits
+	.align	1
+	.global	insert_data_list
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	insert_data_list, %function
+insert_data_list:
+.LFB249:
+	.loc 2 217 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL111:
+	.loc 2 225 0
+	movw	r3, #65535
+	.loc 2 217 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 225 0
+	cmp	r0, r3
+	beq	.L98
+	.loc 2 230 0
+	ldr	r2, .L111
+	movs	r5, #6
+	muls	r5, r0, r5
+	ldr	r4, [r2]
+	adds	r1, r4, r5
+.LVL112:
+	.loc 2 231 0
+	strh	r3, [r1, #2]	@ movhi
+	strh	r3, [r4, r5]	@ movhi
+	.loc 2 233 0
+	ldr	r3, .L111+4
+	ldr	ip, [r3]
+	cmp	ip, #0
+	bne	.L99
+.L110:
+	.loc 2 275 0
+	str	r1, [r3]
+.LVL113:
+.L98:
+	.loc 2 281 0
+	movs	r0, #0
+.LVL114:
+	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL115:
+.L99:
+	.cfi_restore_state
+	.loc 2 238 0
+	ldr	r3, .L111+8
+	lsls	r7, r0, #1
+	.loc 2 239 0
+	ldrh	r6, [r1, #4]
+	.loc 2 238 0
+	ldr	lr, [r3]
+	ldrh	r3, [lr, r0, lsl #1]
+.LVL116:
+	.loc 2 240 0
+	cbz	r6, .L108
+	.loc 2 239 0
+	muls	r6, r3, r6
+.LVL117:
+.L100:
+	.loc 2 244 0
+	sub	r2, ip, r4
+	asrs	r3, r2, #1
+.LVL118:
+	ldr	r2, .L111+12
+	muls	r2, r3, r2
+	.loc 2 252 0
+	ldr	r3, .L111+16
+	ldr	r8, [r3]
+	.loc 2 244 0
+	uxth	r2, r2
+.LVL119:
+	.loc 2 252 0
+	add	r3, r8, r7
+	str	r3, [sp, #4]
+	mov	r3, ip
+.LVL120:
+.L106:
+	.loc 2 247 0
+	ldrh	r7, [r3, #4]
+	.loc 2 246 0
+	lsl	r10, r2, #1
+	ldrh	fp, [lr, r2, lsl #1]
+.LVL121:
+	.loc 2 248 0
+	cbz	r7, .L109
+	.loc 2 247 0
+	mul	r7, r7, fp
+.LVL122:
+.L101:
+	.loc 2 251 0
+	cmp	r6, r7
+	bne	.L102
+	.loc 2 252 0
+	ldr	r7, [sp, #4]
+.LVL123:
+	ldrh	r10, [r8, r10]
+	ldrh	r7, [r7]
+	cmp	r10, r7
+	bcc	.L104
+.L103:
+	.loc 2 270 0
+	strh	r2, [r4, r5]	@ movhi
+.LVL124:
+	.loc 2 273 0
+	cmp	r3, ip
+	.loc 2 271 0
+	ldrh	r2, [r3, #2]
+.LVL125:
+	strh	r2, [r1, #2]	@ movhi
+	.loc 2 273 0
+	bne	.L107
+	.loc 2 274 0
+	strh	r0, [r3, #2]	@ movhi
+	.loc 2 275 0
+	ldr	r3, .L111+4
+.LVL126:
+	b	.L110
+.LVL127:
+.L108:
+	.loc 2 241 0
+	mov	r6, #-1
+.LVL128:
+	b	.L100
+.LVL129:
+.L109:
+	.loc 2 249 0
+	mov	r7, #-1
+.LVL130:
+	b	.L101
+.LVL131:
+.L102:
+	.loc 2 256 0
+	bcc	.L103
+.LVL132:
+.L104:
+	.loc 2 259 0
+	ldrh	r7, [r3]
+	movw	r10, #65535
+	cmp	r7, r10
+	bne	.L105
+	.loc 2 260 0
+	strh	r2, [r1, #2]	@ movhi
+.LVL133:
+	.loc 2 261 0
+	strh	r0, [r3]	@ movhi
+	.loc 2 262 0
+	ldr	r3, .L111+20
+.LVL134:
+	b	.L110
+.LVL135:
+.L105:
+	.loc 2 267 0
+	movs	r3, #6
+.LVL136:
+	.loc 2 246 0
+	mov	r2, r7
+	.loc 2 267 0
+	mla	r3, r3, r7, r4
+.LVL137:
+	.loc 2 246 0
+	b	.L106
+.LVL138:
+.L107:
+	.loc 2 277 0
+	ldrh	r1, [r3, #2]
+.LVL139:
+	movs	r2, #6
+	muls	r2, r1, r2
+	strh	r0, [r4, r2]	@ movhi
+.LVL140:
+	.loc 2 278 0
+	strh	r0, [r3, #2]	@ movhi
+	b	.L98
+.L112:
+	.align	2
+.L111:
+	.word	.LANCHOR41
+	.word	.LANCHOR42
+	.word	.LANCHOR43
+	.word	-1431655765
+	.word	.LANCHOR40
+	.word	.LANCHOR44
+	.cfi_endproc
+.LFE249:
+	.size	insert_data_list, .-insert_data_list
+	.section	.text.INSERT_DATA_LIST,"ax",%progbits
+	.align	1
+	.global	INSERT_DATA_LIST
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	INSERT_DATA_LIST, %function
+INSERT_DATA_LIST:
+.LFB248:
+	.loc 2 186 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL141:
+	push	{r3, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 3, -8
+	.cfi_offset 14, -4
+	.loc 2 187 0
+	bl	insert_data_list
+.LVL142:
+	.loc 2 188 0
+	ldr	r2, .L115
+	ldrh	r3, [r2]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	strh	r3, [r2]	@ movhi
+	.loc 2 189 0
+	ldr	r2, .L115+4
+	ldrh	r2, [r2]
+	cmp	r2, r3
+	bcs	.L113
+.LVL143:
+.LBB177:
+.LBB178:
+	movs	r2, #189
+	ldr	r1, .L115+8
+	ldr	r0, .L115+12
+.LBE178:
+.LBE177:
+	.loc 2 190 0
+	pop	{r3, lr}
+	.cfi_remember_state
+	.cfi_restore 14
+	.cfi_restore 3
+	.cfi_def_cfa_offset 0
+.LBB180:
+.LBB179:
+	.loc 2 189 0
+	b	printf
+.LVL144:
+.L113:
+	.cfi_restore_state
+	pop	{r3, pc}
+.L116:
+	.align	2
+.L115:
+	.word	.LANCHOR45
+	.word	.LANCHOR5
+	.word	.LANCHOR46
+	.word	.LC1
+.LBE179:
+.LBE180:
+	.cfi_endproc
+.LFE248:
+	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
+	.section	.text.insert_free_list,"ax",%progbits
+	.align	1
+	.global	insert_free_list
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	insert_free_list, %function
+insert_free_list:
+.LFB250:
+	.loc 2 284 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL145:
+	.loc 2 290 0
+	movw	r1, #65535
+	.loc 2 284 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 290 0
+	cmp	r0, r1
+	beq	.L118
+	.loc 2 293 0
+	ldr	r3, .L124
+	mov	r10, #6
+	mul	r7, r10, r0
+	ldr	r4, [r3]
+	.loc 2 296 0
+	ldr	r3, .L124+4
+	.loc 2 293 0
+	adds	r5, r4, r7
+.LVL146:
+	.loc 2 296 0
+	ldr	r6, [r3]
+	mov	lr, r3
+	.loc 2 294 0
+	strh	r1, [r5, #2]	@ movhi
+	strh	r1, [r4, r7]	@ movhi
+	.loc 2 296 0
+	cbnz	r6, .L119
+	.loc 2 297 0
+	str	r5, [r3]
+.LVL147:
+.L118:
+	.loc 2 330 0
+	movs	r0, #0
+.LVL148:
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL149:
+.L119:
+	.loc 2 301 0
+	ldr	r3, .L124+8
+	.loc 2 303 0
+	subs	r2, r6, r4
+	.loc 2 310 0
+	mov	fp, r1
+	.loc 2 301 0
+	ldr	ip, [r3]
+	.loc 2 303 0
+	asrs	r3, r2, #1
+	ldr	r2, .L124+12
+	.loc 2 301 0
+	ldrh	r8, [ip, r0, lsl #1]
+.LVL150:
+	.loc 2 303 0
+	muls	r2, r3, r2
+	mov	r3, r6
+	uxth	r2, r2
+.LVL151:
+.L122:
+	.loc 2 307 0
+	ldrh	r1, [ip, r2, lsl #1]
+	cmp	r1, r8
+	bcs	.L120
+	.loc 2 310 0
+	ldrh	r1, [r3]
+	cmp	r1, fp
+	bne	.L121
+	.loc 2 311 0
+	strh	r2, [r5, #2]	@ movhi
+.LVL152:
+	.loc 2 312 0
+	strh	r0, [r3]	@ movhi
+	.loc 2 313 0
+	b	.L118
+.LVL153:
+.L121:
+	.loc 2 316 0
+	mla	r3, r10, r1, r4
+.LVL154:
+	.loc 2 306 0
+	mov	r2, r1
+.LVL155:
+	b	.L122
+.LVL156:
+.L120:
+	.loc 2 319 0
+	ldrh	r1, [r3, #2]
+	.loc 2 322 0
+	cmp	r3, r6
+	.loc 2 319 0
+	strh	r1, [r5, #2]	@ movhi
+.LVL157:
+	.loc 2 326 0
+	it	ne
+	ldrhne	r1, [r3, #2]
+	.loc 2 320 0
+	strh	r2, [r4, r7]	@ movhi
+	.loc 2 326 0
+	iteet	ne
+	movne	r2, #6
+.LVL158:
+	.loc 2 323 0
+	strheq	r0, [r3, #2]	@ movhi
+	.loc 2 324 0
+	streq	r5, [lr]
+	.loc 2 326 0
+	mulne	r2, r2, r1
+	itt	ne
+	strhne	r0, [r4, r2]	@ movhi
+.LVL159:
+	.loc 2 327 0
+	strhne	r0, [r3, #2]	@ movhi
+	b	.L118
+.L125:
+	.align	2
+.L124:
+	.word	.LANCHOR41
+	.word	.LANCHOR47
+	.word	.LANCHOR40
+	.word	-1431655765
+	.cfi_endproc
+.LFE250:
+	.size	insert_free_list, .-insert_free_list
+	.section	.text.INSERT_FREE_LIST,"ax",%progbits
+	.align	1
+	.global	INSERT_FREE_LIST
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	INSERT_FREE_LIST, %function
+INSERT_FREE_LIST:
+.LFB247:
+	.loc 2 179 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL160:
+	push	{r3, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 3, -8
+	.cfi_offset 14, -4
+	.loc 2 180 0
+	bl	insert_free_list
+.LVL161:
+	.loc 2 181 0
+	ldr	r2, .L128
+	ldrh	r3, [r2]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	strh	r3, [r2]	@ movhi
+	.loc 2 182 0
+	ldr	r2, .L128+4
+	ldrh	r2, [r2]
+	cmp	r2, r3
+	bcs	.L126
+.LVL162:
+.LBB183:
+.LBB184:
+	movs	r2, #182
+	ldr	r1, .L128+8
+	ldr	r0, .L128+12
+.LBE184:
+.LBE183:
+	.loc 2 183 0
+	pop	{r3, lr}
+	.cfi_remember_state
+	.cfi_restore 14
+	.cfi_restore 3
+	.cfi_def_cfa_offset 0
+.LBB186:
+.LBB185:
+	.loc 2 182 0
+	b	printf
+.LVL163:
+.L126:
+	.cfi_restore_state
+	pop	{r3, pc}
+.L129:
+	.align	2
+.L128:
+	.word	.LANCHOR48
+	.word	.LANCHOR5
+	.word	.LANCHOR49
+	.word	.LC1
+.LBE185:
+.LBE186:
+	.cfi_endproc
+.LFE247:
+	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
+	.section	.text.List_remove_node,"ax",%progbits
+	.align	1
+	.global	List_remove_node
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	List_remove_node, %function
+List_remove_node:
+.LFB251:
+	.loc 2 333 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL164:
+	push	{r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
+	.cfi_offset 14, -4
+	.loc 2 336 0
+	movs	r6, #6
+	ldr	r5, .L137
+	muls	r6, r1, r6
+	.loc 2 337 0
+	movw	r3, #65535
+	.loc 2 333 0
+	mov	r8, r0
+	.loc 2 336 0
+	ldr	r7, [r5]
+	adds	r4, r7, r6
+.LVL165:
+	.loc 2 337 0
+	ldrh	r2, [r4, #2]
+	cmp	r2, r3
+	bne	.L131
+	.loc 2 337 0 is_stmt 0 discriminator 1
+	ldr	r3, [r0]
+	cmp	r4, r3
+	beq	.L131
+	.loc 2 337 0 discriminator 2
+	movw	r2, #337
+	ldr	r1, .L137+4
+.LVL166:
+	ldr	r0, .L137+8
+.LVL167:
+	bl	printf
+.LVL168:
+.L131:
+	.loc 2 339 0 is_stmt 1
+	ldr	r3, [r8]
+	movw	r1, #65535
+	ldrh	r2, [r7, r6]
+	cmp	r4, r3
+	bne	.L132
+	.loc 2 340 0
+	cmp	r2, r1
+	.loc 2 343 0
+	ittee	ne
+	ldrne	r0, [r5]
+	movne	r3, #6
+	.loc 2 341 0
+	moveq	r3, #0
+	streq	r3, [r8]
+	.loc 2 343 0
+	ittt	ne
+	mlane	r2, r3, r2, r0
+	strne	r2, [r8]
+	.loc 2 344 0
+	strhne	r1, [r2, #2]	@ movhi
+.L134:
+	.loc 2 355 0
+	movw	r3, #65535
+	.loc 2 357 0
+	movs	r0, #0
+	.loc 2 355 0
+	strh	r3, [r7, r6]	@ movhi
+	strh	r3, [r4, #2]	@ movhi
+	.loc 2 357 0
+	pop	{r4, r5, r6, r7, r8, pc}
+.LVL169:
+.L132:
+	.loc 2 346 0
+	cmp	r2, r1
+	.loc 2 348 0
+	ldr	r1, [r5]
+.LVL170:
+	mov	r3, #6
+	ldrh	r0, [r4, #2]
+	.loc 2 351 0
+	ittt	ne
+	mlane	r5, r3, r2, r1
+	strhne	r0, [r5, #2]	@ movhi
+.LVL171:
+	.loc 2 352 0
+	ldrhne	r0, [r4, #2]
+	.loc 2 353 0
+	muls	r3, r0, r3
+	strh	r2, [r1, r3]	@ movhi
+.LVL172:
+	b	.L134
+.L138:
+	.align	2
+.L137:
+	.word	.LANCHOR41
+	.word	.LANCHOR50
+	.word	.LC1
+	.cfi_endproc
+.LFE251:
+	.size	List_remove_node, .-List_remove_node
+	.section	.text.List_pop_index_node,"ax",%progbits
+	.align	1
+	.global	List_pop_index_node
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	List_pop_index_node, %function
+List_pop_index_node:
+.LFB252:
+	.loc 2 360 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL173:
+	.loc 2 364 0
+	ldr	r3, [r0]
+	.loc 2 360 0
+	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 2 364 0
+	cbz	r3, .L145
+	.loc 2 369 0
+	ldr	r2, .L146
+	.loc 2 368 0
+	movw	r5, #65535
+	.loc 2 369 0
+	movs	r6, #6
+	ldr	r2, [r2]
+.L141:
+.LVL174:
+	.loc 2 368 0
+	cbnz	r1, .L142
+.L144:
+	.loc 2 372 0
+	ldr	r4, .L146+4
+	subs	r3, r3, r2
+.LVL175:
+	asrs	r3, r3, #1
+	muls	r4, r3, r4
+.LVL176:
+	.loc 2 373 0
+	uxth	r1, r4
+.LVL177:
+	bl	List_remove_node
+.LVL178:
+	uxth	r0, r4
+	.loc 2 375 0
+	pop	{r4, r5, r6, pc}
+.LVL179:
+.L142:
+	.loc 2 368 0 discriminator 1
+	ldrh	r4, [r3]
+	cmp	r4, r5
+	beq	.L144
+	.loc 2 370 0
+	subs	r1, r1, #1
+.LVL180:
+	.loc 2 369 0
+	mla	r3, r6, r4, r2
+.LVL181:
+	.loc 2 370 0
+	uxth	r1, r1
+.LVL182:
+	b	.L141
+.LVL183:
+.L145:
+	.loc 2 365 0
+	movw	r0, #65535
+.LVL184:
+	.loc 2 376 0
+	pop	{r4, r5, r6, pc}
+.L147:
+	.align	2
+.L146:
+	.word	.LANCHOR41
+	.word	-1431655765
+	.cfi_endproc
+.LFE252:
+	.size	List_pop_index_node, .-List_pop_index_node
+	.section	.text.List_pop_head_node,"ax",%progbits
+	.align	1
+	.global	List_pop_head_node
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	List_pop_head_node, %function
+List_pop_head_node:
+.LFB253:
+	.loc 2 379 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL185:
+	.loc 2 380 0
+	movs	r1, #0
+	b	List_pop_index_node
+.LVL186:
+	.cfi_endproc
+.LFE253:
+	.size	List_pop_head_node, .-List_pop_head_node
+	.section	.text.List_get_gc_head_node,"ax",%progbits
+	.align	1
+	.global	List_get_gc_head_node
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	List_get_gc_head_node, %function
+List_get_gc_head_node:
+.LFB254:
+	.loc 2 384 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL187:
+	.loc 2 388 0
+	ldr	r3, .L155
+	.loc 2 384 0
+	push	{r4, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 4, -8
+	.cfi_offset 14, -4
+	.loc 2 388 0
+	ldr	r3, [r3]
+	cbz	r3, .L154
+	.loc 2 393 0
+	ldr	r2, .L155+4
+	movs	r4, #6
+	ldr	r1, [r2]
+	.loc 2 392 0
+	movw	r2, #65535
+.L151:
+.LVL188:
+	cbz	r0, .L152
+	.loc 2 392 0 is_stmt 0 discriminator 1
+	ldrh	r3, [r3]
+.LVL189:
+	cmp	r3, r2
+	bne	.L153
+.L154:
+	.loc 2 389 0 is_stmt 1
+	movw	r0, #65535
+.LVL190:
+	pop	{r4, pc}
+.LVL191:
+.L153:
+	.loc 2 394 0
+	subs	r0, r0, #1
+.LVL192:
+	.loc 2 393 0
+	mla	r3, r4, r3, r1
+.LVL193:
+	.loc 2 394 0
+	uxth	r0, r0
+.LVL194:
+	b	.L151
+.L152:
+.LVL195:
+	.loc 2 398 0
+	ldr	r0, .L155+8
+.LVL196:
+	subs	r3, r3, r1
+.LVL197:
+	asrs	r3, r3, #1
+	muls	r3, r0, r3
+	uxth	r0, r3
+	.loc 2 401 0
+	pop	{r4, pc}
+.L156:
+	.align	2
+.L155:
+	.word	.LANCHOR42
+	.word	.LANCHOR41
+	.word	-1431655765
+	.cfi_endproc
+.LFE254:
+	.size	List_get_gc_head_node, .-List_get_gc_head_node
+	.section	.text.List_update_data_list,"ax",%progbits
+	.align	1
+	.global	List_update_data_list
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	List_update_data_list, %function
+List_update_data_list:
+.LFB255:
+	.loc 2 404 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL198:
+	.loc 2 413 0
+	ldr	r3, .L165
+	.loc 2 404 0
+	push	{r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
+	.cfi_offset 14, -4
+	.loc 2 404 0
+	mov	r4, r0
+	.loc 2 413 0
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	beq	.L159
+	.loc 2 413 0 is_stmt 0 discriminator 1
+	ldr	r3, .L165+4
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	beq	.L159
+	.loc 2 413 0 discriminator 2
+	ldr	r3, .L165+8
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	beq	.L159
+.LVL199:
+.LBB189:
+.LBB190:
+	.loc 2 416 0 is_stmt 1
+	ldr	r6, .L165+12
+	movs	r3, #6
+	.loc 2 418 0
+	ldr	r2, .L165+16
+	.loc 2 416 0
+	muls	r3, r0, r3
+	ldr	r1, [r6]
+	.loc 2 418 0
+	ldr	r2, [r2]
+	.loc 2 416 0
+	add	r8, r1, r3
+.LVL200:
+	.loc 2 418 0
+	cmp	r8, r2
+	beq	.L159
+.LVL201:
+	.loc 2 421 0
+	ldr	r7, .L165+20
+	.loc 2 422 0
+	ldrh	r5, [r8, #4]
+	.loc 2 421 0
+	ldr	r2, [r7]
+	.loc 2 422 0
+	ldrh	r2, [r2, r0, lsl #1]
+.LVL202:
+	.loc 2 424 0
+	muls	r5, r2, r5
+.LVL203:
+	.loc 2 426 0
+	ldrh	r2, [r8, #2]
+	movw	r0, #65535
+.LVL204:
+	.loc 2 424 0
+	it	eq
+	moveq	r5, #-1
+.LVL205:
+	.loc 2 426 0
+	cmp	r2, r0
+	bne	.L162
+	ldrh	r3, [r1, r3]
+	cmp	r3, r2
+	bne	.L162
+	mov	r2, #426
+	ldr	r1, .L165+24
+	ldr	r0, .L165+28
+	bl	printf
+.LVL206:
+.L162:
+	.loc 2 427 0
+	ldrh	r3, [r8, #2]
+	movs	r2, #6
+	muls	r2, r3, r2
+.LVL207:
+	.loc 2 428 0
+	ldr	r3, .L165+32
+	asrs	r1, r2, #1
+	muls	r3, r1, r3
+	.loc 2 429 0
+	ldr	r1, [r7]
+	.loc 2 430 0
+	ldrh	r0, [r1, r3, lsl #1]
+	ldr	r1, [r6]
+	add	r2, r2, r1
+.LVL208:
+	ldrh	r3, [r2, #4]
+.LVL209:
+	.loc 2 432 0
+	muls	r3, r0, r3
+.LVL210:
+	it	eq
+	moveq	r3, #-1
+.LVL211:
+	.loc 2 434 0
+	cmp	r5, r3
+	bcs	.L159
+	.loc 2 435 0
+	ldr	r5, .L165+36
+.LVL212:
+	mov	r1, r4
+	ldr	r0, .L165+16
+	bl	List_remove_node
+.LVL213:
+	ldrh	r3, [r5]
+	cbnz	r3, .L164
+	movw	r2, #435
+	ldr	r1, .L165+24
+	ldr	r0, .L165+28
+	bl	printf
+.LVL214:
+.L164:
+	ldrh	r3, [r5]
+	.loc 2 436 0
+	mov	r0, r4
+	.loc 2 435 0
+	subs	r3, r3, #1
+	strh	r3, [r5]	@ movhi
+	.loc 2 436 0
+	bl	INSERT_DATA_LIST
+.LVL215:
+.L159:
+.LBE190:
+.LBE189:
+	.loc 2 439 0
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, pc}
+.L166:
+	.align	2
+.L165:
+	.word	.LANCHOR51
+	.word	.LANCHOR52
+	.word	.LANCHOR53
+	.word	.LANCHOR41
+	.word	.LANCHOR42
+	.word	.LANCHOR43
+	.word	.LANCHOR54
+	.word	.LC1
+	.word	-1431655765
+	.word	.LANCHOR45
+	.cfi_endproc
+.LFE255:
+	.size	List_update_data_list, .-List_update_data_list
+	.section	.text.ftl_map_blk_alloc_new_blk,"ax",%progbits
+	.align	1
+	.global	ftl_map_blk_alloc_new_blk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_map_blk_alloc_new_blk, %function
+ftl_map_blk_alloc_new_blk:
+.LFB258:
+	.loc 2 516 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL216:
+	.loc 2 520 0
+	ldrh	r1, [r0, #10]
+	ldr	r2, [r0, #12]
+	.loc 2 516 0
+	push	{r3, r4, r5, r6, r7, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 3, -24
+	.cfi_offset 4, -20
+	.cfi_offset 5, -16
+	.cfi_offset 6, -12
+	.cfi_offset 7, -8
+	.cfi_offset 14, -4
+	.loc 2 516 0
+	mov	r4, r0
+	.loc 2 520 0
+	movs	r3, #0
+.LVL217:
+.L168:
+	uxth	r5, r3
+.LVL218:
+	.loc 2 520 0 is_stmt 0 discriminator 1
+	cmp	r5, r1
+	bcc	.L170
+.LVL219:
+.L171:
+.LBB193:
+.LBB194:
+	.loc 2 532 0 is_stmt 1
+	mov	r2, #532
+	ldr	r1, .L177
+	ldr	r0, .L177+4
+	bl	printf
+.LVL220:
+	b	.L172
+.LVL221:
+.L170:
+.LBE194:
+.LBE193:
+	.loc 2 521 0
+	mov	r7, r2
+	adds	r3, r3, #1
+	ldrh	r6, [r7]
+	adds	r2, r2, #2
+	cmp	r6, #0
+	bne	.L168
+	.loc 2 522 0
+	bl	FtlFreeSysBlkQueueOut
+.LVL222:
+	strh	r0, [r7]	@ movhi
+	.loc 2 523 0
+	cbz	r0, .L169
+	.loc 2 526 0
+	ldr	r3, [r4, #28]
+	.loc 2 524 0
+	strh	r6, [r4, #2]	@ movhi
+	.loc 2 525 0
+	strh	r5, [r4]	@ movhi
+	.loc 2 526 0
+	adds	r3, r3, #1
+	str	r3, [r4, #28]
+	.loc 2 527 0
+	ldrh	r3, [r4, #8]
+	adds	r3, r3, #1
+	strh	r3, [r4, #8]	@ movhi
+.L169:
+	.loc 2 532 0
+	ldrh	r3, [r4, #10]
+	cmp	r3, r5
+	bls	.L171
+.L172:
+	.loc 2 534 0
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, pc}
+.LVL223:
+.L178:
+	.align	2
+.L177:
+	.word	.LANCHOR55
+	.word	.LC1
+	.cfi_endproc
+.LFE258:
+	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
+	.section	.text.select_l2p_ram_region,"ax",%progbits
+	.align	1
+	.global	select_l2p_ram_region
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	select_l2p_ram_region, %function
+select_l2p_ram_region:
+.LFB263:
+	.loc 2 700 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL224:
+	push	{r3, r4, r5, r6, r7, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 3, -24
+	.cfi_offset 4, -20
+	.cfi_offset 5, -16
+	.cfi_offset 6, -12
+	.cfi_offset 7, -8
+	.cfi_offset 14, -4
+	.loc 2 705 0
+	movs	r1, #0
+	ldr	r3, .L189
+	.loc 2 706 0
+	movs	r0, #12
+	movw	r5, #65535
+	.loc 2 705 0
+	ldrh	r2, [r3]
+	.loc 2 706 0
+	ldr	r3, .L189+4
+	ldr	r3, [r3]
+.LVL225:
+.L180:
+	uxth	r4, r1
+.LVL226:
+	.loc 2 705 0 discriminator 1
+	cmp	r4, r2
+	bcc	.L182
+	mov	r4, r2
+.LVL227:
+	movs	r1, #0
+.LVL228:
+	mov	r6, #-2147483648
+	.loc 2 716 0
+	movs	r7, #12
+.L183:
+	uxth	r5, r1
+.LVL229:
+	.loc 2 715 0 discriminator 1
+	cmp	r5, r2
+	bcc	.L185
+	.loc 2 724 0
+	cmp	r4, r2
+	bcc	.L181
+	.loc 2 730 0
+	ldr	r1, .L189+8
+	mov	r4, r2
+	mov	r0, #-1
+	ldrh	r7, [r1]
+	movs	r1, #0
+.LVL230:
+.L186:
+	uxth	r5, r1
+.LVL231:
+	.loc 2 729 0 discriminator 1
+	cmp	r5, r2
+	bcc	.L188
+	.loc 2 735 0
+	cmp	r4, r2
+	bcc	.L181
+	.loc 2 735 0 is_stmt 0 discriminator 1
+	movw	r2, #735
+	ldr	r1, .L189+12
+	ldr	r0, .L189+16
+.LVL232:
+	bl	printf
+.LVL233:
+	b	.L181
+.LVL234:
+.L182:
+	adds	r1, r1, #1
+	.loc 2 706 0 is_stmt 1
+	mla	r6, r0, r1, r3
+	ldrh	r6, [r6, #-12]
+	cmp	r6, r5
+	bne	.L180
+.LVL235:
+.L181:
+	.loc 2 737 0
+	mov	r0, r4
+	pop	{r3, r4, r5, r6, r7, pc}
+.LVL236:
+.L185:
+	.loc 2 716 0
+	mla	r0, r7, r1, r3
+	ldr	r0, [r0, #4]
+	cmp	r0, #0
+	blt	.L184
+	.loc 2 717 0
+	cmp	r6, r0
+	itt	hi
+	movhi	r6, r0
+.LVL237:
+	movhi	r4, r5
+.L184:
+.LVL238:
+	adds	r1, r1, #1
+.LVL239:
+	b	.L183
+.LVL240:
+.L188:
+	.loc 2 730 0
+	ldr	r6, [r3, #4]
+	cmp	r0, r6
+	bls	.L187
+	.loc 2 730 0 is_stmt 0 discriminator 1
+	ldrh	ip, [r3]
+	cmp	ip, r7
+	itt	ne
+	movne	r0, r6
+.LVL241:
+	movne	r4, r5
+.LVL242:
+.L187:
+	adds	r1, r1, #1
+.LVL243:
+	adds	r3, r3, #12
+	b	.L186
+.L190:
+	.align	2
+.L189:
+	.word	.LANCHOR33
+	.word	.LANCHOR56
+	.word	.LANCHOR57
+	.word	.LANCHOR58
+	.word	.LC1
+	.cfi_endproc
+.LFE263:
+	.size	select_l2p_ram_region, .-select_l2p_ram_region
+	.section	.text.FtlUpdateVaildLpn,"ax",%progbits
+	.align	1
+	.global	FtlUpdateVaildLpn
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlUpdateVaildLpn, %function
+FtlUpdateVaildLpn:
+.LFB269:
+	.loc 2 882 0 is_stmt 1
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL244:
+	.loc 2 885 0
+	ldr	r2, .L201
+	.loc 2 882 0
+	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	mov	r1, r2
+	.loc 2 885 0
+	ldrh	r3, [r2]
+	cmp	r3, #4
+	bhi	.L192
+	.loc 2 885 0 is_stmt 0 discriminator 1
+	cbnz	r0, .L192
+	.loc 2 885 0
+	adds	r3, r3, #1
+	strh	r3, [r2]	@ movhi
+	.loc 2 894 0 is_stmt 1
+	pop	{r4, r5, r6, pc}
+.L192:
+	.loc 2 886 0
+	movs	r3, #0
+.LBB197:
+.LBB198:
+	.loc 2 888 0
+	ldr	r0, .L201+4
+.LVL245:
+.LBE198:
+.LBE197:
+	.loc 2 886 0
+	strh	r3, [r1]	@ movhi
+.LBB202:
+.LBB199:
+	.loc 2 890 0
+	movw	r6, #65535
+	ldr	r1, .L201+8
+	ldrh	r4, [r0]
+	mov	r0, r3
+.LBE199:
+.LBE202:
+	.loc 2 887 0
+	ldr	r2, .L201+12
+.LBB203:
+.LBB200:
+	.loc 2 890 0
+	ldr	r1, [r1]
+.LBE200:
+.LBE203:
+	.loc 2 887 0
+	str	r3, [r2]
+.LVL246:
+	add	r4, r1, r4, lsl #1
+.L193:
+.LBB204:
+.LBB201:
+	.loc 2 888 0
+	cmp	r1, r4
+	bne	.L195
+	cbz	r3, .L191
+	str	r0, [r2]
+.L191:
+	pop	{r4, r5, r6, pc}
+.L195:
+	.loc 2 890 0
+	ldrh	r5, [r1], #2
+	cmp	r5, r6
+	.loc 2 891 0
+	itt	ne
+	addne	r0, r0, r5
+	movne	r3, #1
+	b	.L193
+.L202:
+	.align	2
+.L201:
+	.word	.LANCHOR59
+	.word	.LANCHOR5
+	.word	.LANCHOR43
+	.word	.LANCHOR60
+.LBE201:
+.LBE204:
+	.cfi_endproc
+.LFE269:
+	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
+	.section	.text.ftl_set_blk_mode,"ax",%progbits
+	.align	1
+	.global	ftl_set_blk_mode
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_set_blk_mode, %function
+ftl_set_blk_mode:
+.LFB275:
+	.loc 2 1347 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL247:
+	.loc 2 1347 0
+	mov	r3, r0
+	.loc 2 1348 0
+	cbz	r1, .L204
+	b	ftl_set_blk_mode.part.7
+.LVL248:
+.L204:
+	.loc 2 1351 0
+	ldr	r2, .L205
+	lsrs	r0, r0, #5
+.LVL249:
+	and	r3, r3, #31
+	ldr	r1, [r2]
+.LVL250:
+	movs	r2, #1
+	lsl	r3, r2, r3
+	ldr	r2, [r1, r0, lsl #2]
+	bic	r2, r2, r3
+	str	r2, [r1, r0, lsl #2]
+	bx	lr
+.L206:
+	.align	2
+.L205:
+	.word	.LANCHOR1
+	.cfi_endproc
+.LFE275:
+	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
+	.section	.text.ftl_get_blk_mode,"ax",%progbits
+	.align	1
+	.global	ftl_get_blk_mode
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_get_blk_mode, %function
+ftl_get_blk_mode:
+.LFB276:
+	.loc 2 1355 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL251:
+	.loc 2 1356 0
+	ldr	r3, .L208
+	lsrs	r2, r0, #5
+	and	r0, r0, #31
+.LVL252:
+	ldr	r3, [r3]
+	ldr	r3, [r3, r2, lsl #2]
+	lsr	r0, r3, r0
+	.loc 2 1357 0
+	and	r0, r0, #1
+	bx	lr
+.L209:
+	.align	2
+.L208:
+	.word	.LANCHOR1
+	.cfi_endproc
+.LFE276:
+	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
+	.section	.text.ftl_sb_update_avl_pages,"ax",%progbits
+	.align	1
+	.global	ftl_sb_update_avl_pages
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_sb_update_avl_pages, %function
+ftl_sb_update_avl_pages:
+.LFB282:
+	.loc 2 1608 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL253:
+	.loc 2 1610 0
+	movs	r3, #0
+	.loc 2 1608 0
+	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 2 1610 0
+	strh	r3, [r0, #4]	@ movhi
+.LVL254:
+	.loc 2 1613 0
+	movw	r6, #65535
+	.loc 2 1611 0
+	ldr	r3, .L217
+	ldrh	r4, [r3]
+	add	r3, r0, r2, lsl #1
+	adds	r3, r3, #14
+.LVL255:
+.L211:
+	.loc 2 1611 0 is_stmt 0 discriminator 1
+	cmp	r2, r4
+	bcc	.L213
+	.loc 2 1622 0 is_stmt 1
+	ldr	r3, .L217+4
+	add	r5, r0, #16
+	.loc 2 1620 0
+	movw	r6, #65535
+	ldrh	r3, [r3]
+	subs	r3, r3, #1
+	subs	r1, r3, r1
+.LVL256:
+	.loc 2 1622 0
+	movs	r3, #0
+	uxth	r1, r1
+.LVL257:
+.L214:
+	.loc 2 1618 0 discriminator 1
+	uxth	r2, r3
+	cmp	r4, r2
+	bhi	.L216
+	.loc 2 1625 0
+	pop	{r4, r5, r6, pc}
+.LVL258:
+.L213:
+	.loc 2 1613 0
+	ldrh	r5, [r3, #2]!
+	.loc 2 1611 0
+	adds	r2, r2, #1
+.LVL259:
+	uxth	r2, r2
+.LVL260:
+	.loc 2 1613 0
+	cmp	r5, r6
+	.loc 2 1615 0
+	ittt	ne
+	ldrhne	r5, [r0, #4]
+	addne	r5, r5, #1
+	strhne	r5, [r0, #4]	@ movhi
+	b	.L211
+.LVL261:
+.L216:
+	.loc 2 1620 0
+	ldrh	r2, [r5], #2
+	adds	r3, r3, #1
+.LVL262:
+	cmp	r2, r6
+	.loc 2 1622 0
+	ittt	ne
+	ldrhne	r2, [r0, #4]
+	addne	r2, r2, r1
+	strhne	r2, [r0, #4]	@ movhi
+	b	.L214
+.L218:
+	.align	2
+.L217:
+	.word	.LANCHOR3
+	.word	.LANCHOR19
+	.cfi_endproc
+.LFE282:
+	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
+	.section	.text.FtlSlcSuperblockCheck,"ax",%progbits
+	.align	1
+	.global	FtlSlcSuperblockCheck
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlSlcSuperblockCheck, %function
+FtlSlcSuperblockCheck:
+.LFB285:
+	.loc 2 2013 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL263:
+	.loc 2 2016 0
+	ldrh	r3, [r0, #4]
+	.loc 2 2013 0
+	push	{r4, r5, lr}
+	.cfi_def_cfa_offset 12
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 2 2016 0
+	cbz	r3, .L219
+	.loc 2 2018 0
+	ldrh	r2, [r0]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L219
+.LVL264:
+.LBB207:
+.LBB208:
+	.loc 2 2020 0
+	ldrb	r2, [r0, #6]	@ zero_extendqisi2
+	.loc 2 2025 0
+	movs	r5, #0
+	.loc 2 2020 0
+	adds	r2, r2, #8
+	ldrh	r1, [r0, r2, lsl #1]
+.LVL265:
+	.loc 2 2023 0
+	ldr	r2, .L225
+	ldrh	r4, [r2]
+	.loc 2 2021 0
+	mov	r2, r3
+.L222:
+	cmp	r1, r2
+	beq	.L224
+.LVL266:
+.L219:
+	pop	{r4, r5, pc}
+.LVL267:
+.L224:
+	.loc 2 2022 0
+	ldrb	r3, [r0, #6]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	.loc 2 2023 0
+	cmp	r3, r4
+	.loc 2 2022 0
+	strb	r3, [r0, #6]
+	.loc 2 2024 0
+	itttt	eq
+	ldrheq	r3, [r0, #2]
+	.loc 2 2025 0
+	strbeq	r5, [r0, #6]
+	.loc 2 2024 0
+	addeq	r3, r3, #1
+	strheq	r3, [r0, #2]	@ movhi
+	.loc 2 2027 0
+	ldrb	r3, [r0, #6]	@ zero_extendqisi2
+	adds	r3, r3, #8
+	ldrh	r1, [r0, r3, lsl #1]
+.LVL268:
+	b	.L222
+.L226:
+	.align	2
+.L225:
+	.word	.LANCHOR3
+.LBE208:
+.LBE207:
+	.cfi_endproc
+.LFE285:
+	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
+	.section	.text.make_superblock,"ax",%progbits
+	.align	1
+	.global	make_superblock
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	make_superblock, %function
+make_superblock:
+.LFB287:
+	.loc 2 2045 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL269:
+	.loc 2 2048 0
+	ldr	r3, .L232
+	ldrh	r2, [r0]
+	.loc 2 2045 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 2045 0
+	mov	r4, r0
+	.loc 2 2048 0
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L228
+	.loc 2 2048 0 is_stmt 0 discriminator 1
+	mov	r2, #2048
+	ldr	r1, .L232+4
+	ldr	r0, .L232+8
+.LVL270:
+	bl	printf
+.LVL271:
+.L228:
+	.loc 2 2051 0 is_stmt 1
+	ldr	r3, .L232+12
+	add	r6, r4, #16
+	.loc 2 2052 0
+	ldr	r10, .L232+20
+	.loc 2 2053 0
+	movw	r7, #65535
+	.loc 2 2049 0
+	movs	r5, #0
+	.loc 2 2051 0
+	ldrh	r8, [r3]
+	.loc 2 2049 0
+	strh	r5, [r4, #4]	@ movhi
+	.loc 2 2050 0
+	strb	r5, [r4, #7]
+.LVL272:
+.L229:
+	.loc 2 2051 0 discriminator 1
+	uxth	r3, r5
+	cmp	r8, r3
+	bhi	.L231
+	.loc 2 2061 0
+	ldr	r2, .L232+16
+	.loc 2 2064 0
+	movs	r0, #0
+	.loc 2 2061 0
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	ldrh	r2, [r2]
+	smulbb	r3, r3, r2
+	strh	r3, [r4, #4]	@ movhi
+	.loc 2 2062 0
+	movs	r3, #1
+	strb	r3, [r4, #9]
+	.loc 2 2064 0
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL273:
+.L231:
+	.loc 2 2052 0
+	ldrh	r1, [r4]
+	ldrb	r0, [r10, r5]	@ zero_extendqisi2
+	bl	V2P_block
+.LVL274:
+	.loc 2 2053 0
+	strh	r7, [r6]	@ movhi
+	.loc 2 2052 0
+	mov	fp, r0
+.LVL275:
+	.loc 2 2054 0
+	bl	FtlBbmIsBadBlock
+.LVL276:
+	cbnz	r0, .L230
+	.loc 2 2055 0
+	strh	fp, [r6]	@ movhi
+	.loc 2 2056 0
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	strb	r3, [r4, #7]
+.L230:
+.LVL277:
+	adds	r5, r5, #1
+.LVL278:
+	adds	r6, r6, #2
+	b	.L229
+.L233:
+	.align	2
+.L232:
+	.word	.LANCHOR5
+	.word	.LANCHOR61
+	.word	.LC1
+	.word	.LANCHOR3
+	.word	.LANCHOR19
+	.word	.LANCHOR13
+	.cfi_endproc
+.LFE287:
+	.size	make_superblock, .-make_superblock
+	.section	.text.update_multiplier_value,"ax",%progbits
+	.align	1
+	.global	update_multiplier_value
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	update_multiplier_value, %function
+update_multiplier_value:
+.LFB296:
+	.loc 2 2401 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL279:
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 3, -32
+	.cfi_offset 4, -28
+	.cfi_offset 5, -24
+	.cfi_offset 6, -20
+	.cfi_offset 7, -16
+	.cfi_offset 8, -12
+	.cfi_offset 10, -8
+	.cfi_offset 14, -4
+	.loc 2 2405 0
+	movs	r5, #0
+	ldr	r3, .L240
+	.loc 2 2401 0
+	mov	r6, r0
+	.loc 2 2403 0
+	mov	r4, r5
+	.loc 2 2406 0
+	ldr	r10, .L240+12
+	.loc 2 2405 0
+	ldrh	r7, [r3]
+	.loc 2 2408 0
+	ldr	r3, .L240+4
+	ldrh	r8, [r3]
+.LVL280:
+.L235:
+	.loc 2 2405 0 discriminator 1
+	uxth	r3, r5
+	cmp	r7, r3
+	bhi	.L237
+	.loc 2 2410 0
+	cbz	r4, .L239
+	.loc 2 2411 0
+	mov	r1, r4
+	mov	r0, #32768
+	bl	__aeabi_idiv
+.LVL281:
+.L238:
+	.loc 2 2412 0
+	ldr	r3, .L240+8
+	movs	r2, #6
+	ldr	r3, [r3]
+	mla	r6, r2, r6, r3
+	strh	r0, [r6, #4]	@ movhi
+	.loc 2 2414 0
+	movs	r0, #0
+.LVL282:
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.LVL283:
+.L237:
+	.loc 2 2406 0
+	mov	r1, r6
+	ldrb	r0, [r10, r5]	@ zero_extendqisi2
+	bl	V2P_block
+.LVL284:
+	.loc 2 2407 0
+	bl	FtlBbmIsBadBlock
+.LVL285:
+	cbnz	r0, .L236
+	.loc 2 2408 0
+	add	r4, r4, r8
+.LVL286:
+	uxth	r4, r4
+.LVL287:
+.L236:
+	adds	r5, r5, #1
+.LVL288:
+	b	.L235
+.LVL289:
+.L239:
+	mov	r0, r4
+	b	.L238
+.L241:
+	.align	2
+.L240:
+	.word	.LANCHOR3
+	.word	.LANCHOR19
+	.word	.LANCHOR41
+	.word	.LANCHOR13
+	.cfi_endproc
+.LFE296:
+	.size	update_multiplier_value, .-update_multiplier_value
+	.section	.text.GetFreeBlockMinEraseCount,"ax",%progbits
+	.align	1
+	.global	GetFreeBlockMinEraseCount
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	GetFreeBlockMinEraseCount, %function
+GetFreeBlockMinEraseCount:
+.LFB297:
+	.loc 2 2417 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL290:
+	.loc 2 2420 0
+	ldr	r3, .L245
+	ldr	r0, [r3]
+	cbz	r0, .L243
+	.loc 2 2421 0
+	ldr	r3, .L245+4
+	ldr	r3, [r3]
+	subs	r0, r0, r3
+	ldr	r3, .L245+8
+	asrs	r0, r0, #1
+	muls	r0, r3, r0
+	ldr	r3, .L245+12
+	ldr	r3, [r3]
+	uxth	r0, r0
+	ldrh	r0, [r3, r0, lsl #1]
+.LVL291:
+.L243:
+	.loc 2 2423 0
+	bx	lr
+.L246:
+	.align	2
+.L245:
+	.word	.LANCHOR47
+	.word	.LANCHOR41
+	.word	-1431655765
+	.word	.LANCHOR40
+	.cfi_endproc
+.LFE297:
+	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
+	.section	.text.GetFreeBlockMaxEraseCount,"ax",%progbits
+	.align	1
+	.global	GetFreeBlockMaxEraseCount
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	GetFreeBlockMaxEraseCount, %function
+GetFreeBlockMaxEraseCount:
+.LFB298:
+	.loc 2 2426 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL292:
+	.loc 2 2431 0
+	ldr	r3, .L255
+	.loc 2 2426 0
+	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 2 2431 0
+	ldr	r3, [r3]
+	cbz	r3, .L253
+	.loc 2 2432 0
+	ldr	r2, .L255+4
+	.loc 2 2436 0
+	movs	r5, #6
+	movw	r6, #65535
+	.loc 2 2432 0
+	ldrh	r2, [r2]
+	rsb	r2, r2, r2, lsl #3
+	asrs	r2, r2, #3
+	cmp	r0, r2
+	.loc 2 2433 0
+	it	gt
+	uxthgt	r0, r2
+.LVL293:
+	.loc 2 2434 0
+	ldr	r2, .L255+8
+	ldr	r1, [r2]
+	ldr	r2, .L255+12
+	subs	r3, r3, r1
+	asrs	r3, r3, #1
+	muls	r3, r2, r3
+	.loc 2 2435 0
+	movs	r2, #0
+	.loc 2 2434 0
+	uxth	r3, r3
+.LVL294:
+.L250:
+	.loc 2 2435 0 discriminator 1
+	uxth	r4, r2
+	cmp	r0, r4
+	bls	.L252
+	.loc 2 2436 0
+	mul	r4, r5, r3
+	adds	r2, r2, #1
+.LVL295:
+	ldrh	r4, [r1, r4]
+	cmp	r4, r6
+	bne	.L254
+.L252:
+	.loc 2 2440 0
+	ldr	r2, .L255+16
+	ldr	r2, [r2]
+	ldrh	r0, [r2, r3, lsl #1]
+.LVL296:
+	pop	{r4, r5, r6, pc}
+.LVL297:
+.L254:
+	mov	r3, r4
+.LVL298:
+	b	.L250
+.L253:
+	.loc 2 2427 0
+	mov	r0, r3
+.LVL299:
+	.loc 2 2443 0
+	pop	{r4, r5, r6, pc}
+.L256:
+	.align	2
+.L255:
+	.word	.LANCHOR47
+	.word	.LANCHOR48
+	.word	.LANCHOR41
+	.word	-1431655765
+	.word	.LANCHOR40
+	.cfi_endproc
+.LFE298:
+	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
+	.section	.text.FtlPrintInfo2buf,"ax",%progbits
+	.align	1
+	.global	FtlPrintInfo2buf
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlPrintInfo2buf, %function
+FtlPrintInfo2buf:
+.LFB203:
+	.loc 3 12 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL300:
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 48
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 3 12 0
+	mov	r8, r0
+.LVL301:
+	.loc 3 16 0
+	ldr	r1, .L269
+	bl	sprintf
+.LVL302:
+	.loc 3 17 0
+	ldr	r3, .L269+4
+	.loc 3 16 0
+	add	r5, r8, r0
+.LVL303:
+	.loc 3 17 0
+	ldr	r1, .L269+8
+	mov	r0, r5
+	.loc 3 31 0
+	ldr	r4, .L269+12
+	.loc 3 17 0
+	ldr	r2, [r3]
+	bl	sprintf
+.LVL304:
+	add	r5, r5, r0
+.LVL305:
+	.loc 3 18 0
+	ldr	r1, .L269+16
+	mov	r0, r5
+	.loc 3 32 0
+	ldr	r10, .L269+352
+	.loc 3 18 0
+	bl	sprintf
+.LVL306:
+	.loc 3 19 0
+	ldr	r3, .L269+20
+	.loc 3 18 0
+	add	r5, r5, r0
+.LVL307:
+	.loc 3 19 0
+	ldr	r1, .L269+24
+	mov	r0, r5
+	.loc 3 39 0
+	ldr	r6, .L269+28
+	.loc 3 19 0
+	ldr	r2, [r3]
+	bl	sprintf
+.LVL308:
+	.loc 3 20 0
+	ldr	r3, .L269+32
+	.loc 3 19 0
+	add	r5, r5, r0
+.LVL309:
+	.loc 3 20 0
+	ldr	r1, .L269+36
+	mov	r0, r5
+	.loc 3 67 0
+	ldr	r7, .L269+40
+	.loc 3 20 0
+	ldr	r2, [r3]
+	bl	sprintf
+.LVL310:
+	.loc 3 21 0
+	ldr	r3, .L269+44
+	.loc 3 20 0
+	add	r5, r5, r0
+.LVL311:
+	.loc 3 21 0
+	ldr	r1, .L269+48
+	mov	r0, r5
+	.loc 3 72 0
+	ldr	fp, .L269+356
+	.loc 3 21 0
+	ldr	r2, [r3]
+	bl	sprintf
+.LVL312:
+	.loc 3 22 0
+	ldr	r3, .L269+52
+	.loc 3 21 0
+	add	r5, r5, r0
+.LVL313:
+	.loc 3 22 0
+	ldr	r1, .L269+56
+	mov	r0, r5
+	ldr	r2, [r3]
+	bl	sprintf
+.LVL314:
+	.loc 3 23 0
+	ldr	r3, .L269+60
+	.loc 3 22 0
+	add	r5, r5, r0
+.LVL315:
+	.loc 3 23 0
+	ldr	r1, .L269+64
+	mov	r0, r5
+	ldr	r2, [r3]
+	bl	sprintf
+.LVL316:
+	.loc 3 24 0
+	ldr	r3, .L269+68
+	.loc 3 23 0
+	add	r5, r5, r0
+.LVL317:
+	.loc 3 24 0
+	ldr	r1, .L269+72
+	mov	r0, r5
+	ldr	r2, [r3]
+	bl	sprintf
+.LVL318:
+	.loc 3 25 0
+	ldr	r3, .L269+76
+	.loc 3 24 0
+	add	r5, r5, r0
+.LVL319:
+	.loc 3 25 0
+	ldr	r1, .L269+80
+	mov	r0, r5
+	ldr	r2, [r3]
+	bl	sprintf
+.LVL320:
+	.loc 3 26 0
+	ldr	r3, .L269+84
+	.loc 3 25 0
+	add	r5, r5, r0
+.LVL321:
+	.loc 3 26 0
+	ldr	r1, .L269+88
+	mov	r0, r5
+	ldr	r2, [r3]
+	bl	sprintf
+.LVL322:
+	.loc 3 27 0
+	ldr	r3, .L269+92
+	.loc 3 26 0
+	add	r5, r5, r0
+.LVL323:
+	.loc 3 27 0
+	ldr	r1, .L269+96
+	mov	r0, r5
+	ldr	r2, [r3]
+	lsrs	r2, r2, #11
+	bl	sprintf
+.LVL324:
+	.loc 3 28 0
+	ldr	r3, .L269+100
+	.loc 3 27 0
+	add	r5, r5, r0
+.LVL325:
+	.loc 3 28 0
+	ldr	r1, .L269+104
+	mov	r0, r5
+	ldr	r2, [r3]
+	lsrs	r2, r2, #11
+	bl	sprintf
+.LVL326:
+	.loc 3 29 0
+	ldr	r3, .L269+108
+	.loc 3 28 0
+	add	r5, r5, r0
+.LVL327:
+	.loc 3 29 0
+	ldr	r1, .L269+112
+	mov	r0, r5
+	ldr	r2, [r3]
+	bl	sprintf
+.LVL328:
+	.loc 3 30 0
+	ldr	r3, .L269+116
+	.loc 3 29 0
+	add	r5, r5, r0
+.LVL329:
+	.loc 3 30 0
+	ldr	r1, .L269+120
+	mov	r0, r5
+	ldr	r2, [r3]
+	bl	sprintf
+.LVL330:
+	add	r5, r5, r0
+.LVL331:
+	.loc 3 31 0
+	ldrh	r2, [r4, #6]
+	ldr	r1, .L269+124
+	mov	r0, r5
+	bl	sprintf
+.LVL332:
+	add	r5, r5, r0
+.LVL333:
+	.loc 3 32 0
+	ldrh	r2, [r10]
+	ldr	r1, .L269+128
+	mov	r0, r5
+	bl	sprintf
+.LVL334:
+	.loc 3 33 0
+	ldr	r3, .L269+132
+	.loc 3 32 0
+	add	r5, r5, r0
+.LVL335:
+	.loc 3 33 0
+	ldr	r1, .L269+136
+	mov	r0, r5
+	ldr	r2, [r3]
+	bl	sprintf
+.LVL336:
+	.loc 3 34 0
+	ldr	r3, .L269+140
+	.loc 3 33 0
+	add	r5, r5, r0
+.LVL337:
+	.loc 3 34 0
+	ldr	r1, .L269+144
+	mov	r0, r5
+	ldr	r2, [r3]
+	bl	sprintf
+.LVL338:
+	.loc 3 35 0
+	ldr	r3, .L269+148
+	.loc 3 34 0
+	add	r5, r5, r0
+.LVL339:
+	.loc 3 35 0
+	ldr	r1, .L269+152
+	mov	r0, r5
+	ldr	r2, [r3]
+	bl	sprintf
+.LVL340:
+	.loc 3 36 0
+	ldr	r3, .L269+156
+	.loc 3 35 0
+	add	r5, r5, r0
+.LVL341:
+	.loc 3 36 0
+	ldr	r1, .L269+160
+	mov	r0, r5
+	ldr	r2, [r3]
+	bl	sprintf
+.LVL342:
+	.loc 3 37 0
+	ldr	r3, .L269+164
+	.loc 3 36 0
+	add	r5, r5, r0
+.LVL343:
+	.loc 3 37 0
+	ldr	r1, .L269+168
+	mov	r0, r5
+	ldr	r2, [r3]
+	bl	sprintf
+.LVL344:
+	.loc 3 38 0
+	ldr	r3, .L269+172
+	.loc 3 37 0
+	add	r5, r5, r0
+.LVL345:
+	.loc 3 38 0
+	ldr	r1, .L269+176
+	mov	r0, r5
+	ldr	r2, [r3]
+	bl	sprintf
+.LVL346:
+	add	r5, r5, r0
+.LVL347:
+	.loc 3 39 0
+	ldrh	r2, [r6, #30]
+	ldr	r1, .L269+180
+	mov	r0, r5
+	bl	sprintf
+.LVL348:
+	add	r5, r5, r0
+.LVL349:
+	.loc 3 40 0
+	ldrh	r2, [r6, #28]
+	ldr	r1, .L269+184
+	mov	r0, r5
+	bl	sprintf
+.LVL350:
+	.loc 3 41 0
+	ldr	r3, .L269+188
+	.loc 3 40 0
+	add	r5, r5, r0
+.LVL351:
+	.loc 3 41 0
+	ldr	r1, .L269+192
+	mov	r0, r5
+	.loc 3 55 0
+	ldr	r6, .L269+196
+	.loc 3 41 0
+	ldr	r2, [r3]
+	bl	sprintf
+.LVL352:
+	.loc 3 42 0
+	ldr	r3, .L269+200
+	.loc 3 41 0
+	add	r5, r5, r0
+.LVL353:
+	.loc 3 42 0
+	ldr	r1, .L269+204
+	mov	r0, r5
+	ldr	r2, [r3]
+	bl	sprintf
+.LVL354:
+	.loc 3 43 0
+	ldr	r3, .L269+208
+	.loc 3 42 0
+	add	r5, r5, r0
+.LVL355:
+	.loc 3 43 0
+	ldr	r1, .L269+212
+	mov	r0, r5
+	ldr	r2, [r3]
+	bl	sprintf
+.LVL356:
+	.loc 3 44 0
+	ldr	r3, .L269+216
+	.loc 3 43 0
+	add	r5, r5, r0
+.LVL357:
+	.loc 3 44 0
+	ldr	r1, .L269+220
+	mov	r0, r5
+	ldrh	r2, [r3, #6]
+	bl	sprintf
+.LVL358:
+	.loc 3 45 0
+	ldr	r3, .L269+224
+	.loc 3 44 0
+	add	r5, r5, r0
+.LVL359:
+	.loc 3 45 0
+	ldr	r1, .L269+228
+	mov	r0, r5
+	ldrh	r2, [r3]
+	bl	sprintf
+.LVL360:
+	.loc 3 46 0
+	ldr	r3, .L269+232
+	.loc 3 45 0
+	add	r5, r5, r0
+.LVL361:
+	.loc 3 46 0
+	ldr	r1, .L269+236
+	mov	r0, r5
+	ldrh	r2, [r3]
+	bl	sprintf
+.LVL362:
+	.loc 3 47 0
+	ldr	r3, .L269+240
+	.loc 3 46 0
+	add	r5, r5, r0
+.LVL363:
+	.loc 3 47 0
+	ldr	r1, .L269+244
+	mov	r0, r5
+	ldr	r2, [r3]
+	bl	sprintf
+.LVL364:
+	.loc 3 48 0
+	ldr	r3, .L269+248
+	.loc 3 47 0
+	add	r5, r5, r0
+.LVL365:
+	.loc 3 48 0
+	ldr	r1, .L269+252
+	mov	r0, r5
+	ldrh	r2, [r3]
+	bl	sprintf
+.LVL366:
+	.loc 3 49 0
+	ldrh	r2, [r4]
+	.loc 3 48 0
+	add	r5, r5, r0
+.LVL367:
+	.loc 3 50 0
+	ldr	r4, .L269+256
+	.loc 3 49 0
+	mov	r0, r5
+	ldr	r1, .L269+260
+	bl	sprintf
+.LVL368:
+	add	r5, r5, r0
+.LVL369:
+	.loc 3 50 0
+	ldrh	r2, [r4, #2]
+	ldr	r1, .L269+264
+	mov	r0, r5
+	bl	sprintf
+.LVL370:
+	add	r5, r5, r0
+.LVL371:
+	.loc 3 51 0
+	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+	ldr	r1, .L269+268
+	mov	r0, r5
+	bl	sprintf
+.LVL372:
+	add	r5, r5, r0
+.LVL373:
+	.loc 3 52 0
+	ldrh	r2, [r4]
+	ldr	r1, .L269+272
+	mov	r0, r5
+	bl	sprintf
+.LVL374:
+	add	r5, r5, r0
+.LVL375:
+	.loc 3 53 0
+	ldrb	r2, [r4, #8]	@ zero_extendqisi2
+	ldr	r1, .L269+276
+	mov	r0, r5
+	bl	sprintf
+.LVL376:
+	add	r5, r5, r0
+.LVL377:
+	.loc 3 54 0
+	ldrh	r2, [r4, #4]
+	ldr	r1, .L269+280
+	mov	r0, r5
+	bl	sprintf
+.LVL378:
+	.loc 3 55 0
+	ldr	r3, [r6]
+	.loc 3 54 0
+	add	r5, r5, r0
+.LVL379:
+	.loc 3 55 0
+	ldrh	r2, [r4]
+	mov	r0, r5
+	.loc 3 56 0
+	ldr	r4, .L269+284
+	.loc 3 55 0
+	ldr	r1, .L269+288
+	ldrh	r2, [r3, r2, lsl #1]
+	bl	sprintf
+.LVL380:
+	add	r5, r5, r0
+.LVL381:
+	.loc 3 56 0
+	ldrh	r2, [r4, #2]
+	ldr	r1, .L269+292
+	mov	r0, r5
+	bl	sprintf
+.LVL382:
+	add	r5, r5, r0
+.LVL383:
+	.loc 3 57 0
+	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+	ldr	r1, .L269+296
+	mov	r0, r5
+	bl	sprintf
+.LVL384:
+	add	r5, r5, r0
+.LVL385:
+	.loc 3 58 0
+	ldrh	r2, [r4]
+	ldr	r1, .L269+300
+	mov	r0, r5
+	bl	sprintf
+.LVL386:
+	add	r5, r5, r0
+.LVL387:
+	.loc 3 59 0
+	ldrb	r2, [r4, #8]	@ zero_extendqisi2
+	ldr	r1, .L269+304
+	mov	r0, r5
+	bl	sprintf
+.LVL388:
+	add	r5, r5, r0
+.LVL389:
+	.loc 3 60 0
+	ldrh	r2, [r4, #4]
+	ldr	r1, .L269+308
+	mov	r0, r5
+	bl	sprintf
+.LVL390:
+	.loc 3 61 0
+	ldr	r3, [r6]
+	.loc 3 60 0
+	add	r5, r5, r0
+.LVL391:
+	.loc 3 61 0
+	ldrh	r2, [r4]
+	mov	r0, r5
+	.loc 3 62 0
+	ldr	r4, .L269+312
+	.loc 3 61 0
+	ldr	r1, .L269+316
+	ldrh	r2, [r3, r2, lsl #1]
+	bl	sprintf
+.LVL392:
+	add	r5, r5, r0
+.LVL393:
+	.loc 3 62 0
+	ldrh	r2, [r4, #2]
+	ldr	r1, .L269+320
+	mov	r0, r5
+	bl	sprintf
+.LVL394:
+	add	r5, r5, r0
+.LVL395:
+	.loc 3 63 0
+	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+	ldr	r1, .L269+324
+	mov	r0, r5
+	bl	sprintf
+.LVL396:
+	add	r5, r5, r0
+.LVL397:
+	.loc 3 64 0
+	ldrh	r2, [r4]
+	ldr	r1, .L269+328
+	mov	r0, r5
+	bl	sprintf
+.LVL398:
+	add	r5, r5, r0
+.LVL399:
+	.loc 3 65 0
+	ldrb	r2, [r4, #8]	@ zero_extendqisi2
+	ldr	r1, .L269+332
+	mov	r0, r5
+	bl	sprintf
+.LVL400:
+	add	r5, r5, r0
+.LVL401:
+	.loc 3 66 0
+	ldrh	r2, [r4, #4]
+	ldr	r1, .L269+336
+	mov	r0, r5
+	bl	sprintf
+.LVL402:
+	add	r5, r5, r0
+.LVL403:
+	.loc 3 67 0
+	ldrh	r2, [r7, #2]
+	ldr	r1, .L269+340
+	mov	r0, r5
+	bl	sprintf
+.LVL404:
+	add	r5, r5, r0
+.LVL405:
+	.loc 3 68 0
+	ldrb	r2, [r7, #6]	@ zero_extendqisi2
+	ldr	r1, .L269+344
+	mov	r0, r5
+	bl	sprintf
+.LVL406:
+	add	r5, r5, r0
+.LVL407:
+	.loc 3 69 0
+	ldrh	r2, [r7]
+	ldr	r1, .L269+348
+	mov	r0, r5
+	b	.L270
+.L271:
+	.align	2
+.L269:
+	.word	.LC2
+	.word	.LANCHOR26
+	.word	.LC3
+	.word	.LANCHOR37
+	.word	.LC4
+	.word	.LANCHOR62
+	.word	.LC5
+	.word	.LANCHOR79
+	.word	.LANCHOR60
+	.word	.LC6
+	.word	.LANCHOR82
+	.word	.LANCHOR63
+	.word	.LC7
+	.word	.LANCHOR64
+	.word	.LC8
+	.word	.LANCHOR65
+	.word	.LC9
+	.word	.LANCHOR66
+	.word	.LC10
+	.word	.LANCHOR67
+	.word	.LC11
+	.word	.LANCHOR68
+	.word	.LC12
+	.word	.LANCHOR69
+	.word	.LC13
+	.word	.LANCHOR70
+	.word	.LC14
+	.word	.LANCHOR71
+	.word	.LC15
+	.word	.LANCHOR72
+	.word	.LC16
+	.word	.LC17
+	.word	.LC18
+	.word	.LANCHOR73
+	.word	.LC19
+	.word	.LANCHOR74
+	.word	.LC20
+	.word	.LANCHOR75
+	.word	.LC21
+	.word	.LANCHOR76
+	.word	.LC22
+	.word	.LANCHOR77
+	.word	.LC23
+	.word	.LANCHOR78
+	.word	.LC24
+	.word	.LC25
+	.word	.LC26
+	.word	.LANCHOR34
+	.word	.LC27
+	.word	.LANCHOR43
+	.word	.LANCHOR31
+	.word	.LC28
+	.word	.LANCHOR2
+	.word	.LC29
+	.word	.LANCHOR38
+	.word	.LC30
+	.word	.LANCHOR5
+	.word	.LC31
+	.word	.LANCHOR80
+	.word	.LC32
+	.word	.LANCHOR7
+	.word	.LC33
+	.word	.LANCHOR81
+	.word	.LC34
+	.word	.LANCHOR51
+	.word	.LC35
+	.word	.LC36
+	.word	.LC37
+	.word	.LC38
+	.word	.LC39
+	.word	.LC40
+	.word	.LANCHOR52
+	.word	.LC41
+	.word	.LC42
+	.word	.LC43
+	.word	.LC44
+	.word	.LC45
+	.word	.LC46
+	.word	.LANCHOR53
+	.word	.LC47
+	.word	.LC48
+	.word	.LC49
+	.word	.LC50
+	.word	.LC51
+	.word	.LC52
+	.word	.LC53
+	.word	.LC54
+	.word	.LC55
+	.word	.LANCHOR48
+	.word	.LANCHOR83
+.L270:
+	bl	sprintf
+.LVL408:
+	add	r5, r5, r0
+.LVL409:
+	.loc 3 70 0
+	ldrb	r2, [r7, #8]	@ zero_extendqisi2
+	ldr	r1, .L272
+	mov	r0, r5
+	bl	sprintf
+.LVL410:
+	add	r5, r5, r0
+.LVL411:
+	.loc 3 71 0
+	ldrh	r2, [r7, #4]
+	ldr	r1, .L272+4
+	mov	r0, r5
+	bl	sprintf
+.LVL412:
+	.loc 3 72 0
+	ldr	r3, [fp, #76]
+	.loc 3 71 0
+	add	r5, r5, r0
+.LVL413:
+	.loc 3 72 0
+	ldr	r1, .L272+8
+	mov	r0, r5
+	str	r3, [sp]
+	ldr	r3, [fp, #84]
+	ldr	r2, [fp, #80]
+	bl	sprintf
+.LVL414:
+	adds	r4, r5, r0
+.LVL415:
+	.loc 3 73 0
+	ldr	r2, [fp, #72]
+	ldr	r1, .L272+12
+	mov	r0, r4
+	bl	sprintf
+.LVL416:
+	add	r4, r4, r0
+.LVL417:
+	.loc 3 74 0
+	ldr	r2, [fp, #96]
+	ldr	r1, .L272+16
+	mov	r0, r4
+	bl	sprintf
+.LVL418:
+	.loc 3 75 0
+	ldr	r3, .L272+20
+	.loc 3 74 0
+	add	r4, r4, r0
+.LVL419:
+	.loc 3 75 0
+	ldr	r1, .L272+24
+	mov	r0, r4
+	ldrh	r2, [r3]
+	bl	sprintf
+.LVL420:
+	.loc 3 76 0
+	ldr	r3, .L272+28
+	.loc 3 75 0
+	add	r4, r4, r0
+.LVL421:
+	.loc 3 76 0
+	ldr	r1, .L272+32
+	mov	r0, r4
+	ldrh	r2, [r3]
+	bl	sprintf
+.LVL422:
+	.loc 3 77 0
+	ldr	r3, .L272+36
+	.loc 3 76 0
+	add	r4, r4, r0
+.LVL423:
+	.loc 3 77 0
+	ldr	r1, .L272+40
+	mov	r0, r4
+	ldr	r2, [r3]
+	bl	sprintf
+.LVL424:
+	.loc 3 78 0
+	ldr	r3, .L272+44
+	.loc 3 77 0
+	add	r4, r4, r0
+.LVL425:
+	.loc 3 78 0
+	ldr	r1, .L272+48
+	mov	r0, r4
+	ldrh	r2, [r3]
+	bl	sprintf
+.LVL426:
+	add	r4, r4, r0
+.LVL427:
+	.loc 3 79 0
+	bl	GetFreeBlockMinEraseCount
+.LVL428:
+	ldr	r1, .L272+52
+	mov	r2, r0
+	mov	r0, r4
+	bl	sprintf
+.LVL429:
+	add	r4, r4, r0
+.LVL430:
+	.loc 3 80 0
+	ldrh	r0, [r10]
+	bl	GetFreeBlockMaxEraseCount
+.LVL431:
+	ldr	r1, .L272+56
+	mov	r2, r0
+	mov	r0, r4
+	bl	sprintf
+.LVL432:
+	.loc 3 81 0
+	ldr	r3, .L272+60
+	.loc 3 80 0
+	add	r4, r4, r0
+.LVL433:
+	.loc 3 81 0
+	ldr	r3, [r3]
+	cmp	r3, #1
+	beq	.L258
+.L263:
+	.loc 3 104 0
+	sub	r0, r4, r8
+	.loc 3 105 0
+	add	sp, sp, #16
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL434:
+.L258:
+	.cfi_restore_state
+	.loc 3 84 0
+	ldrh	r3, [r7]
+	movw	r2, #65535
+	cmp	r3, r2
+	beq	.L260
+	.loc 3 85 0
+	ldr	r2, [r6]
+	mov	r0, r4
+	ldr	r1, .L272+64
+	ldrh	r2, [r2, r3, lsl #1]
+	bl	sprintf
+.LVL435:
+	add	r4, r4, r0
+.LVL436:
+.L260:
+.LBB209:
+	.loc 3 87 0
+	movs	r0, #0
+	ldr	r5, .L272+68
+	.loc 3 91 0
+	ldr	fp, .L272+84
+	.loc 3 88 0
+	movs	r7, #0
+	.loc 3 87 0
+	bl	List_get_gc_head_node
+.LVL437:
+	uxth	r3, r0
+.LVL438:
+.L262:
+	.loc 3 89 0
+	movw	r2, #65535
+	cmp	r3, r2
+	beq	.L261
+	.loc 3 91 0 discriminator 2
+	ldr	r2, [fp]
+	mov	r10, #6
+	mul	r10, r10, r3
+	mov	r0, r4
+	ldr	r1, .L272+72
+	ldrh	r2, [r2, r3, lsl #1]
+	str	r2, [sp, #8]
+	ldr	r2, [r5]
+	add	r2, r2, r10
+	ldrh	r2, [r2, #4]
+	str	r2, [sp, #4]
+	ldr	r2, [r6]
+	ldrh	r2, [r2, r3, lsl #1]
+	str	r2, [sp]
+	mov	r2, r7
+	bl	sprintf
+.LVL439:
+	.loc 3 88 0 discriminator 2
+	adds	r7, r7, #1
+.LVL440:
+	.loc 3 92 0 discriminator 2
+	ldr	r3, [r5]
+	.loc 3 88 0 discriminator 2
+	cmp	r7, #16
+	.loc 3 91 0 discriminator 2
+	add	r4, r4, r0
+.LVL441:
+	.loc 3 92 0 discriminator 2
+	ldrh	r3, [r3, r10]
+.LVL442:
+	.loc 3 88 0 discriminator 2
+	bne	.L262
+.L261:
+.LBE209:
+.LBB210:
+	.loc 3 96 0
+	ldr	r3, .L272+76
+.LVL443:
+	.loc 3 97 0
+	movs	r7, #0
+.LVL444:
+	.loc 3 96 0
+	ldr	r2, [r5]
+	.loc 3 100 0
+	ldr	r10, .L272+84
+	.loc 3 96 0
+	ldr	r3, [r3]
+	.loc 3 100 0
+	ldr	fp, .L272+88
+	.loc 3 96 0
+	subs	r3, r3, r2
+	ldr	r2, .L272+80
+	asrs	r3, r3, #1
+	muls	r3, r2, r3
+	uxth	r3, r3
+.LVL445:
+.L264:
+	.loc 3 98 0
+	movw	r2, #65535
+	cmp	r3, r2
+	beq	.L263
+	.loc 3 100 0 discriminator 2
+	ldr	r2, [r10]
+	movs	r6, #6
+	muls	r6, r3, r6
+	mov	r0, r4
+	mov	r1, fp
+	ldrh	r2, [r2, r3, lsl #1]
+	str	r2, [sp, #4]
+	ldr	r2, [r5]
+	add	r2, r2, r6
+	ldrh	r2, [r2, #4]
+	str	r2, [sp]
+	mov	r2, r7
+	.loc 3 97 0 discriminator 2
+	adds	r7, r7, #1
+.LVL446:
+	.loc 3 100 0 discriminator 2
+	bl	sprintf
+.LVL447:
+	.loc 3 97 0 discriminator 2
+	cmp	r7, #4
+	.loc 3 100 0 discriminator 2
+	add	r4, r4, r0
+.LVL448:
+	.loc 3 97 0 discriminator 2
+	beq	.L263
+	.loc 3 101 0
+	ldr	r3, [r5]
+	ldrh	r3, [r3, r6]
+	b	.L264
+.L273:
+	.align	2
+.L272:
+	.word	.LC56
+	.word	.LC57
+	.word	.LC58
+	.word	.LC59
+	.word	.LC60
+	.word	.LANCHOR84
+	.word	.LC61
+	.word	.LANCHOR85
+	.word	.LC62
+	.word	.LANCHOR86
+	.word	.LC63
+	.word	.LANCHOR87
+	.word	.LC64
+	.word	.LC65
+	.word	.LC66
+	.word	.LANCHOR88
+	.word	.LC67
+	.word	.LANCHOR41
+	.word	.LC68
+	.word	.LANCHOR47
+	.word	-1431655765
+	.word	.LANCHOR40
+	.word	.LC69
+.LBE210:
+	.cfi_endproc
+.LFE203:
+	.size	FtlPrintInfo2buf, .-FtlPrintInfo2buf
+	.section	.text.rknand_proc_ftlread,"ax",%progbits
+	.align	1
+	.global	rknand_proc_ftlread
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rknand_proc_ftlread, %function
+rknand_proc_ftlread:
+.LFB204:
+	.loc 3 114 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL449:
+	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 3 114 0
+	mov	r5, r0
+.LVL450:
+	.loc 3 120 0
+	ldr	r2, .L275
+	ldr	r1, .L275+4
+	bl	sprintf
+.LVL451:
+	adds	r4, r5, r0
+.LVL452:
+	.loc 3 122 0
+	mov	r0, r4
+	bl	FtlPrintInfo2buf
+.LVL453:
+	add	r0, r0, r4
+.LVL454:
+	.loc 3 124 0
+	subs	r0, r0, r5
+.LVL455:
+	pop	{r3, r4, r5, pc}
+.LVL456:
+.L276:
+	.align	2
+.L275:
+	.word	.LC70
+	.word	.LC71
+	.cfi_endproc
+.LFE204:
+	.size	rknand_proc_ftlread, .-rknand_proc_ftlread
+	.section	.text.GetSwlReplaceBlock,"ax",%progbits
+	.align	1
+	.global	GetSwlReplaceBlock
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	GetSwlReplaceBlock, %function
+GetSwlReplaceBlock:
+.LFB299:
+	.loc 2 2447 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL457:
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 48
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 2456 0
+	ldr	r3, .L306
+	ldr	r6, .L306+4
+	ldr	r5, [r3]
+	mov	r10, r3
+	ldr	r1, [r6]
+	cmp	r1, r5
+	bcs	.L278
+	.loc 2 2459 0
+	ldr	r2, .L306+8
+	.loc 2 2458 0
+	movs	r3, #0
+	ldr	r4, .L306+12
+	.loc 2 2459 0
+	mov	r0, r3
+	ldrh	r1, [r2]
+	.loc 2 2460 0
+	ldr	r2, .L306+16
+	.loc 2 2458 0
+	str	r3, [r4]
+.LVL458:
+	.loc 2 2460 0
+	ldr	r7, [r2]
+	.loc 2 2459 0
+	mov	r2, r3
+.LVL459:
+.L279:
+	.loc 2 2459 0 is_stmt 0 discriminator 1
+	cmp	r2, r1
+	bcc	.L280
+	cbz	r3, .L281
+	str	r0, [r4]
+.L281:
+	.loc 2 2461 0 is_stmt 1
+	ldr	r7, [r4]
+	mov	r0, r7
+	bl	__aeabi_uidiv
+.LVL460:
+	.loc 2 2462 0
+	ldr	r3, .L306+20
+	.loc 2 2461 0
+	str	r0, [r6]
+	.loc 2 2462 0
+	ldr	r0, [r3]
+	ldr	r3, .L306+24
+	subs	r0, r7, r0
+	ldrh	r1, [r3]
+	bl	__aeabi_uidiv
+.LVL461:
+	str	r0, [r4]
+.L282:
+	.loc 2 2468 0
+	ldr	r6, [r6]
+	add	r3, r5, #256
+	cmp	r3, r6
+	bls	.L287
+	.loc 2 2468 0 is_stmt 0 discriminator 1
+	ldr	r2, .L306+28
+	add	r3, r5, #768
+	ldr	r2, [r2]
+	cmp	r3, r2
+	bls	.L287
+.LVL462:
+.L290:
+	.loc 2 2469 0 is_stmt 1
+	movw	r4, #65535
+.L288:
+	.loc 2 2518 0
+	mov	r0, r4
+	add	sp, sp, #16
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL463:
+.L280:
+	.cfi_restore_state
+	.loc 2 2460 0 discriminator 3
+	ldrh	r3, [r7, r2, lsl #1]
+	.loc 2 2459 0 discriminator 3
+	adds	r2, r2, #1
+.LVL464:
+	.loc 2 2460 0 discriminator 3
+	add	r0, r0, r3
+	movs	r3, #1
+	b	.L279
+.LVL465:
+.L278:
+	.loc 2 2463 0
+	ldr	r2, .L306+28
+	ldr	r3, [r2]
+	cmp	r1, r3
+	bls	.L282
+	.loc 2 2464 0
+	adds	r3, r3, #1
+	.loc 2 2465 0
+	ldr	r0, .L306+8
+	.loc 2 2464 0
+	str	r3, [r2]
+.LVL466:
+	.loc 2 2465 0
+	movs	r2, #0
+	.loc 2 2466 0
+	ldr	r3, .L306+16
+	ldr	r3, [r3]
+	subs	r3, r3, #2
+.LVL467:
+.L284:
+	.loc 2 2465 0 discriminator 1
+	ldrh	r1, [r0]
+	cmp	r2, r1
+	bcs	.L282
+	.loc 2 2466 0 discriminator 3
+	ldrh	r1, [r3, #2]
+	.loc 2 2465 0 discriminator 3
+	adds	r2, r2, #1
+.LVL468:
+	.loc 2 2466 0 discriminator 3
+	adds	r1, r1, #1
+	strh	r1, [r3, #2]!	@ movhi
+	b	.L284
+.LVL469:
+.L287:
+	.loc 2 2471 0
+	ldr	r3, .L306+32
+	ldrh	r0, [r3]
+	add	r0, r0, r0, lsl #1
+	ubfx	r0, r0, #2, #16
+	bl	GetFreeBlockMaxEraseCount
+.LVL470:
+	.loc 2 2472 0
+	add	r3, r5, #64
+	.loc 2 2471 0
+	mov	r2, r0
+.LVL471:
+	.loc 2 2472 0
+	cmp	r0, r3
+	bcs	.L289
+	.loc 2 2472 0 is_stmt 0 discriminator 1
+	cmp	r5, #30
+	bhi	.L290
+.L289:
+	.loc 2 2476 0 is_stmt 1
+	ldr	r3, .L306+36
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L290
+	.loc 2 2483 0
+	ldr	r1, .L306+40
+	.loc 2 2495 0
+	mov	fp, #6
+	.loc 2 2483 0
+	ldr	lr, [r1]
+	.loc 2 2484 0
+	ldr	r1, .L306+16
+	ldr	r0, [r1]
+.LVL472:
+	movw	r1, #65535
+	mov	r7, r1
+	.loc 2 2479 0
+	mov	r8, r1
+.LVL473:
+.L291:
+	ldrh	ip, [r3]
+	cmp	ip, r8
+	bne	.L294
+	mov	r4, r7
+.LVL474:
+.L293:
+	.loc 2 2498 0
+	movw	r3, #65535
+	cmp	r4, r3
+	beq	.L290
+	.loc 2 2500 0
+	ldrh	r7, [r0, r4, lsl #1]
+.LVL475:
+	lsl	r8, r4, #1
+	.loc 2 2501 0
+	cmp	r5, r7
+	bcs	.L295
+	.loc 2 2503 0
+	bl	GetFreeBlockMinEraseCount
+.LVL476:
+	cmp	r5, r0
+	.loc 2 2504 0
+	it	cc
+	strcc	r1, [r10]
+.L295:
+	.loc 2 2506 0
+	cmp	r6, r7
+	bls	.L290
+	.loc 2 2506 0 is_stmt 0 discriminator 1
+	add	r3, r7, #128
+	cmp	r2, r3
+	ble	.L290
+	.loc 2 2508 0 is_stmt 1
+	add	r3, r7, #256
+	ldr	r0, .L306+28
+	cmp	r6, r3
+	bhi	.L296
+	.loc 2 2508 0 is_stmt 0 discriminator 1
+	ldr	r1, [r0]
+.LVL477:
+	add	r3, r7, #768
+	cmp	r3, r1
+	bcs	.L290
+.L296:
+	.loc 2 2510 0 is_stmt 1
+	ldr	r3, .L306+44
+	mov	r1, r4
+	str	r2, [sp, #8]
+	mov	r2, r6
+	str	r7, [sp, #4]
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r8]
+	str	r3, [sp]
+	ldr	r3, [r0]
+	ldr	r0, .L306+48
+	bl	printf
+.LVL478:
+	.loc 2 2511 0
+	ldr	r3, .L306+52
+	movs	r2, #1
+	str	r2, [r3]
+	.loc 2 2512 0
+	b	.L288
+.LVL479:
+.L294:
+	.loc 2 2481 0
+	ldrh	r4, [r3, #4]
+	cbz	r4, .L292
+	.loc 2 2483 0
+	ldr	r4, .L306+56
+	sub	r3, r3, lr
+.LVL480:
+	asrs	r3, r3, #1
+	muls	r3, r4, r3
+	uxth	r4, r3
+.LVL481:
+	.loc 2 2484 0
+	ldrh	r3, [r0, r4, lsl #1]
+	cmp	r5, r3
+	bcs	.L293
+	.loc 2 2489 0
+	cmp	r1, r3
+	itt	hi
+	movhi	r1, r3
+.LVL482:
+	.loc 2 2483 0
+	movhi	r7, r4
+.LVL483:
+.L292:
+	.loc 2 2495 0
+	mla	r3, fp, ip, lr
+.LVL484:
+	b	.L291
+.L307:
+	.align	2
+.L306:
+	.word	.LANCHOR78
+	.word	.LANCHOR75
+	.word	.LANCHOR5
+	.word	.LANCHOR73
+	.word	.LANCHOR40
+	.word	.LANCHOR74
+	.word	.LANCHOR14
+	.word	.LANCHOR77
+	.word	.LANCHOR48
+	.word	.LANCHOR42
+	.word	.LANCHOR41
+	.word	.LANCHOR43
+	.word	.LC72
+	.word	.LANCHOR89
+	.word	-1431655765
+	.cfi_endproc
+.LFE299:
+	.size	GetSwlReplaceBlock, .-GetSwlReplaceBlock
+	.section	.text.free_data_superblock,"ax",%progbits
+	.align	1
+	.global	free_data_superblock
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	free_data_superblock, %function
+free_data_superblock:
+.LFB300:
+	.loc 2 2522 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL485:
+	.loc 2 2523 0
+	movw	r2, #65535
+	.loc 2 2522 0
+	push	{r3, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 3, -8
+	.cfi_offset 14, -4
+	.loc 2 2523 0
+	cmp	r0, r2
+	beq	.L309
+.LVL486:
+.LBB213:
+.LBB214:
+	.loc 2 2525 0
+	ldr	r2, .L310
+	movs	r1, #0
+	ldr	r2, [r2]
+	strh	r1, [r2, r0, lsl #1]	@ movhi
+	.loc 2 2526 0
+	bl	INSERT_FREE_LIST
+.LVL487:
+.L309:
+.LBE214:
+.LBE213:
+	.loc 2 2528 0
+	movs	r0, #0
+	pop	{r3, pc}
+.L311:
+	.align	2
+.L310:
+	.word	.LANCHOR43
+	.cfi_endproc
+.LFE300:
+	.size	free_data_superblock, .-free_data_superblock
+	.section	.text.get_new_active_ppa,"ax",%progbits
+	.align	1
+	.global	get_new_active_ppa
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	get_new_active_ppa, %function
+get_new_active_ppa:
+.LFB303:
+	.loc 2 2655 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL488:
+	.loc 2 2659 0
+	ldrh	r2, [r0]
+	.loc 2 2655 0
+	push	{r3, r4, r5, r6, r7, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 3, -24
+	.cfi_offset 4, -20
+	.cfi_offset 5, -16
+	.cfi_offset 6, -12
+	.cfi_offset 7, -8
+	.cfi_offset 14, -4
+	.loc 2 2659 0
+	movw	r3, #65535
+	.loc 2 2655 0
+	mov	r4, r0
+	.loc 2 2659 0
+	cmp	r2, r3
+	bne	.L313
+	.loc 2 2659 0 is_stmt 0 discriminator 1
+	movw	r2, #2659
+	ldr	r1, .L326
+	ldr	r0, .L326+4
+.LVL489:
+	bl	printf
+.LVL490:
+.L313:
+	.loc 2 2660 0 is_stmt 1
+	ldr	r5, .L326+8
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r5]
+	cmp	r2, r3
+	bne	.L314
+	.loc 2 2660 0 is_stmt 0 discriminator 1
+	movw	r2, #2660
+	ldr	r1, .L326
+	ldr	r0, .L326+4
+	bl	printf
+.LVL491:
+.L314:
+	.loc 2 2661 0 is_stmt 1
+	ldrh	r3, [r4, #4]
+	cbnz	r3, .L315
+	.loc 2 2661 0 is_stmt 0 discriminator 1
+	movw	r2, #2661
+	ldr	r1, .L326
+	ldr	r0, .L326+4
+	bl	printf
+.LVL492:
+.L315:
+	.loc 2 2663 0 is_stmt 1
+	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+	.loc 2 2662 0
+	movs	r3, #0
+	strb	r3, [r4, #10]
+	.loc 2 2664 0
+	movw	r6, #65535
+	.loc 2 2663 0
+	adds	r2, r2, #8
+	ldrh	r0, [r4, r2, lsl #1]
+.LVL493:
+	.loc 2 2666 0
+	ldr	r2, .L326+12
+	ldrh	r1, [r2]
+	.loc 2 2668 0
+	mov	r2, r3
+.L316:
+	.loc 2 2664 0
+	cmp	r0, r6
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	beq	.L318
+	.loc 2 2673 0
+	ldrh	r2, [r4, #4]
+	.loc 2 2672 0
+	ldrh	r6, [r4, #2]
+	.loc 2 2673 0
+	subs	r2, r2, #1
+	uxth	r2, r2
+	.loc 2 2672 0
+	orr	r6, r6, r0, lsl #10
+.LVL494:
+	.loc 2 2680 0
+	movw	r0, #65535
+.LVL495:
+	.loc 2 2673 0
+	strh	r2, [r4, #4]	@ movhi
+.L320:
+	.loc 2 2675 0
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	.loc 2 2676 0
+	cmp	r1, r3
+	.loc 2 2677 0
+	itttt	eq
+	ldrheq	r3, [r4, #2]
+	addeq	r3, r3, #1
+	strheq	r3, [r4, #2]	@ movhi
+	.loc 2 2678 0
+	moveq	r3, #0
+	.loc 2 2680 0
+	add	r7, r3, #8
+	ldrh	r7, [r4, r7, lsl #1]
+	cmp	r7, r0
+	beq	.L320
+	strb	r3, [r4, #6]
+	.loc 2 2682 0
+	ldrh	r1, [r4, #2]
+	ldrh	r3, [r5]
+	cmp	r1, r3
+	bne	.L312
+	.loc 2 2682 0 is_stmt 0 discriminator 1
+	cbz	r2, .L312
+	.loc 2 2682 0 discriminator 2
+	movw	r2, #2682
+	ldr	r1, .L326
+	ldr	r0, .L326+4
+	bl	printf
+.LVL496:
+.L312:
+	.loc 2 2684 0 is_stmt 1
+	mov	r0, r6
+	pop	{r3, r4, r5, r6, r7, pc}
+.LVL497:
+.L318:
+	.loc 2 2665 0
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	.loc 2 2666 0
+	cmp	r3, r1
+	.loc 2 2665 0
+	strb	r3, [r4, #6]
+	.loc 2 2667 0
+	itttt	eq
+	ldrheq	r3, [r4, #2]
+	.loc 2 2668 0
+	strbeq	r2, [r4, #6]
+	.loc 2 2667 0
+	addeq	r3, r3, #1
+	strheq	r3, [r4, #2]	@ movhi
+	.loc 2 2670 0
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	adds	r3, r3, #8
+	ldrh	r0, [r4, r3, lsl #1]
+.LVL498:
+	b	.L316
+.L327:
+	.align	2
+.L326:
+	.word	.LANCHOR90
+	.word	.LC1
+	.word	.LANCHOR19
+	.word	.LANCHOR3
+	.cfi_endproc
+.LFE303:
+	.size	get_new_active_ppa, .-get_new_active_ppa
+	.section	.text.FtlGcBufInit,"ax",%progbits
+	.align	1
+	.global	FtlGcBufInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcBufInit, %function
+FtlGcBufInit:
+.LFB306:
+	.file 5 "drivers/rkflash/sftl_gc.c"
+	.loc 5 22 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 5 25 0
+	movs	r3, #0
+	.loc 5 27 0
+	ldr	r1, .L333
+	mov	fp, #1
+	.loc 5 25 0
+	ldr	r2, .L333+4
+	.loc 5 27 0
+	ldr	r5, [r1]
+	.loc 5 28 0
+	ldr	r1, .L333+8
+	.loc 5 25 0
+	str	r3, [r2]
+.LVL499:
+	.loc 5 26 0
+	ldr	r2, .L333+12
+	mov	r0, r5
+	.loc 5 28 0
+	ldr	r1, [r1]
+	.loc 5 26 0
+	ldrh	r2, [r2]
+	.loc 5 28 0
+	str	r1, [sp, #4]
+	ldr	r1, .L333+16
+	ldrh	r1, [r1]
+	str	r1, [sp]
+	.loc 5 29 0
+	ldr	r1, .L333+20
+	ldr	r10, [r1]
+	ldr	r1, .L333+24
+	ldrh	r7, [r1]
+	.loc 5 30 0
+	ldr	r1, .L333+28
+	ldr	r4, [r1]
+	movs	r1, #12
+	mla	r1, r2, r1, r1
+	adds	r4, r4, #8
+	add	r8, r5, r1
+	.loc 5 26 0
+	mov	r1, r3
+.LVL500:
+.L329:
+	adds	r0, r0, #12
+	ldr	r6, [sp]
+	.loc 5 26 0 is_stmt 0 discriminator 1
+	cmp	r0, r8
+	add	ip, r3, r7
+	add	r4, r4, #20
+	add	lr, r1, r6
+	bne	.L330
+	.loc 5 34 0 is_stmt 1
+	ldr	r3, .L333+32
+	.loc 5 35 0
+	mov	lr, #12
+	mov	r8, #0
+	.loc 5 34 0
+	ldr	r0, [r3]
+	.loc 5 36 0
+	ldr	r3, .L333+8
+	ldr	r4, [r3]
+	.loc 5 37 0
+	ldr	r3, .L333+20
+	ldr	ip, [r3]
+.L331:
+.LVL501:
+	.loc 5 34 0 discriminator 1
+	cmp	r2, r0
+	bcc	.L332
+	.loc 5 39 0
+	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL502:
+.L330:
+	.cfi_restore_state
+	.loc 5 28 0 discriminator 3
+	bic	r1, r1, #3
+	.loc 5 29 0 discriminator 3
+	bic	r3, r3, #3
+	.loc 5 28 0 discriminator 3
+	mov	r6, r1
+	ldr	r1, [sp, #4]
+	.loc 5 29 0 discriminator 3
+	add	r3, r3, r10
+	.loc 5 27 0 discriminator 3
+	str	fp, [r0, #-4]
+	.loc 5 29 0 discriminator 3
+	str	r3, [r0, #-8]
+	.loc 5 28 0 discriminator 3
+	add	r6, r6, r1
+	.loc 5 31 0 discriminator 3
+	mov	r1, lr
+	.loc 5 28 0 discriminator 3
+	str	r6, [r0, #-12]
+	.loc 5 31 0 discriminator 3
+	str	r3, [r4, #-16]
+	mov	r3, ip
+	.loc 5 30 0 discriminator 3
+	str	r6, [r4, #-20]
+	b	.L329
+.LVL503:
+.L332:
+	.loc 5 36 0 discriminator 3
+	ldr	r3, [sp]
+	.loc 5 35 0 discriminator 3
+	mul	r10, lr, r2
+	.loc 5 36 0 discriminator 3
+	muls	r3, r2, r3
+	.loc 5 35 0 discriminator 3
+	add	r1, r5, r10
+	str	r8, [r1, #8]
+	.loc 5 36 0 discriminator 3
+	bic	r3, r3, #3
+	add	r3, r3, r4
+	str	r3, [r5, r10]
+	.loc 5 37 0 discriminator 3
+	mul	r3, r2, r7
+	.loc 5 34 0 discriminator 3
+	adds	r2, r2, #1
+.LVL504:
+	uxth	r2, r2
+.LVL505:
+	.loc 5 37 0 discriminator 3
+	bic	r3, r3, #3
+	add	r3, r3, ip
+	str	r3, [r1, #4]
+	b	.L331
+.L334:
+	.align	2
+.L333:
+	.word	.LANCHOR92
+	.word	.LANCHOR91
+	.word	.LANCHOR93
+	.word	.LANCHOR3
+	.word	.LANCHOR23
+	.word	.LANCHOR94
+	.word	.LANCHOR24
+	.word	.LANCHOR95
+	.word	.LANCHOR96
+	.cfi_endproc
+.LFE306:
+	.size	FtlGcBufInit, .-FtlGcBufInit
+	.section	.text.FtlGcBufFree,"ax",%progbits
+	.align	1
+	.global	FtlGcBufFree
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcBufFree, %function
+FtlGcBufFree:
+.LFB307:
+	.loc 5 42 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL506:
+	.loc 5 47 0
+	ldr	r3, .L342
+	.loc 5 48 0
+	mov	ip, #12
+	.loc 5 42 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 5 46 0
+	movs	r4, #0
+	.loc 5 48 0
+	mov	fp, #20
+	.loc 5 49 0
+	mov	lr, r4
+	.loc 5 47 0
+	ldr	r7, [r3]
+	.loc 5 48 0
+	ldr	r3, .L342+4
+	ldr	r5, [r3]
+.LVL507:
+.L336:
+	uxth	r3, r4
+	.loc 5 46 0 discriminator 1
+	cmp	r1, r3
+	bls	.L335
+	.loc 5 48 0
+	mla	r8, fp, r3, r0
+	movs	r2, #0
+.L337:
+.LVL508:
+	uxth	r3, r2
+	.loc 5 47 0 discriminator 1
+	cmp	r7, r3
+	bls	.L338
+	.loc 5 48 0
+	mul	r3, ip, r3
+	ldr	r6, [r8, #8]
+	adds	r2, r2, #1
+.LVL509:
+	add	r10, r5, r3
+	ldr	r3, [r5, r3]
+	cmp	r3, r6
+	bne	.L337
+	.loc 5 49 0
+	str	lr, [r10, #8]
+.L338:
+.LVL510:
+	adds	r4, r4, #1
+.LVL511:
+	b	.L336
+.LVL512:
+.L335:
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL513:
+.L343:
+	.align	2
+.L342:
+	.word	.LANCHOR96
+	.word	.LANCHOR92
+	.cfi_endproc
+.LFE307:
+	.size	FtlGcBufFree, .-FtlGcBufFree
+	.section	.text.FtlGcBufAlloc,"ax",%progbits
+	.align	1
+	.global	FtlGcBufAlloc
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcBufAlloc, %function
+FtlGcBufAlloc:
+.LFB308:
+	.loc 5 57 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL514:
+	.loc 5 62 0
+	ldr	r3, .L351
+	.loc 5 61 0
+	movs	r2, #0
+	.loc 5 57 0
+	push	{r4, r5, r6, r7, r8, r10, lr}
+	.cfi_def_cfa_offset 28
+	.cfi_offset 4, -28
+	.cfi_offset 5, -24
+	.cfi_offset 6, -20
+	.cfi_offset 7, -16
+	.cfi_offset 8, -12
+	.cfi_offset 10, -8
+	.cfi_offset 14, -4
+	.loc 5 63 0
+	mov	ip, #12
+	.loc 5 64 0
+	movs	r7, #1
+	.loc 5 65 0
+	mov	lr, #20
+	.loc 5 62 0
+	ldr	r4, [r3]
+	.loc 5 63 0
+	ldr	r3, .L351+4
+	ldr	r5, [r3]
+.LVL515:
+.L345:
+	uxth	r8, r2
+	.loc 5 61 0 discriminator 1
+	cmp	r1, r8
+	bhi	.L349
+	.loc 5 71 0
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.L349:
+	mov	r10, #0
+.L346:
+.LVL516:
+	uxth	r3, r10
+	.loc 5 62 0 discriminator 1
+	cmp	r4, r3
+	bls	.L347
+	.loc 5 63 0
+	mla	r3, ip, r3, r5
+	add	r10, r10, #1
+.LVL517:
+	ldr	r6, [r3, #8]
+	cmp	r6, #0
+	bne	.L346
+	.loc 5 65 0
+	mla	r8, lr, r8, r0
+	.loc 5 64 0
+	str	r7, [r3, #8]
+	.loc 5 65 0
+	ldr	r6, [r3]
+	.loc 5 66 0
+	ldr	r3, [r3, #4]
+	.loc 5 65 0
+	str	r6, [r8, #8]
+	.loc 5 66 0
+	str	r3, [r8, #12]
+.L347:
+.LVL518:
+	adds	r2, r2, #1
+.LVL519:
+	b	.L345
+.L352:
+	.align	2
+.L351:
+	.word	.LANCHOR96
+	.word	.LANCHOR92
+	.cfi_endproc
+.LFE308:
+	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
+	.section	.text.IsBlkInGcList,"ax",%progbits
+	.align	1
+	.global	IsBlkInGcList
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	IsBlkInGcList, %function
+IsBlkInGcList:
+.LFB309:
+	.loc 5 74 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL520:
+	.loc 5 78 0
+	ldr	r3, .L358
+	.loc 5 77 0
+	ldr	r2, .L358+4
+	.loc 5 78 0
+	ldr	r3, [r3]
+	ldrh	r2, [r2]
+	add	r2, r3, r2, lsl #1
+.LVL521:
+.L354:
+	.loc 5 77 0 discriminator 1
+	cmp	r3, r2
+	bne	.L356
+	.loc 5 81 0
+	movs	r0, #0
+.LVL522:
+	bx	lr
+.LVL523:
+.L356:
+	.loc 5 78 0
+	ldrh	r1, [r3], #2
+	cmp	r1, r0
+	bne	.L354
+	.loc 5 79 0
+	movs	r0, #1
+.LVL524:
+	.loc 5 82 0
+	bx	lr
+.L359:
+	.align	2
+.L358:
+	.word	.LANCHOR97
+	.word	.LANCHOR98
+	.cfi_endproc
+.LFE309:
+	.size	IsBlkInGcList, .-IsBlkInGcList
+	.section	.text.FtlGcUpdatePage,"ax",%progbits
+	.align	1
+	.global	FtlGcUpdatePage
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcUpdatePage, %function
+FtlGcUpdatePage:
+.LFB310:
+	.loc 5 85 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL525:
+	push	{r3, r4, r5, r6, r7, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 3, -24
+	.cfi_offset 4, -20
+	.cfi_offset 5, -16
+	.cfi_offset 6, -12
+	.cfi_offset 7, -8
+	.cfi_offset 14, -4
+	.loc 5 85 0
+	mov	r5, r0
+	.loc 5 91 0
+	ldr	r4, .L364
+	.loc 5 88 0
+	ubfx	r0, r0, #10, #16
+.LVL526:
+	.loc 5 85 0
+	mov	r6, r1
+	mov	r7, r2
+	.loc 5 88 0
+	bl	P2V_block_in_plane
+.LVL527:
+	.loc 5 92 0
+	ldr	r3, .L364+4
+	.loc 5 91 0
+	ldrh	r1, [r4]
+	.loc 5 92 0
+	ldr	r2, [r3]
+	.loc 5 91 0
+	movs	r3, #0
+.LVL528:
+.L361:
+	uxth	ip, r3
+.LVL529:
+	.loc 5 91 0 is_stmt 0 discriminator 1
+	cmp	ip, r1
+	bcc	.L363
+	.loc 5 96 0 is_stmt 1
+	bne	.L362
+	.loc 5 97 0
+	strh	r0, [r2, ip, lsl #1]	@ movhi
+	.loc 5 98 0
+	ldrh	r3, [r4]
+	adds	r3, r3, #1
+	strh	r3, [r4]	@ movhi
+	b	.L362
+.L363:
+	adds	r3, r3, #1
+	.loc 5 92 0
+	add	ip, r2, r3, lsl #1
+.LVL530:
+	ldrh	ip, [ip, #-2]
+	cmp	ip, r0
+	bne	.L361
+.L362:
+	.loc 5 101 0
+	ldr	r2, .L364+8
+	movs	r0, #12
+.LVL531:
+	ldr	r1, .L364+12
+	ldrh	r3, [r2]
+	ldr	r1, [r1]
+	muls	r0, r3, r0
+	.loc 5 107 0
+	adds	r3, r3, #1
+	.loc 5 101 0
+	adds	r4, r1, r0
+	str	r6, [r4, #4]
+	.loc 5 102 0
+	str	r7, [r4, #8]
+	.loc 5 103 0
+	str	r5, [r1, r0]
+	.loc 5 107 0
+	strh	r3, [r2]	@ movhi
+	pop	{r3, r4, r5, r6, r7, pc}
+.LVL532:
+.L365:
+	.align	2
+.L364:
+	.word	.LANCHOR98
+	.word	.LANCHOR97
+	.word	.LANCHOR99
+	.word	.LANCHOR100
+	.cfi_endproc
+.LFE310:
+	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
+	.section	.text.FtlGcRefreshBlock,"ax",%progbits
+	.align	1
+	.global	FtlGcRefreshBlock
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcRefreshBlock, %function
+FtlGcRefreshBlock:
+.LFB317:
+	.loc 5 345 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL533:
+	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 5 347 0
+	mov	r1, r0
+	.loc 5 345 0
+	mov	r4, r0
+	.loc 5 347 0
+	ldr	r0, .L369
+.LVL534:
+	bl	printf
+.LVL535:
+	.loc 5 349 0
+	ldr	r0, .L369+4
+	ldrh	r5, [r0]
+	cmp	r4, r5
+	beq	.L367
+	.loc 5 349 0 is_stmt 0 discriminator 1
+	ldr	r3, .L369+8
+	ldrh	r1, [r3]
+	cmp	r4, r1
+	beq	.L367
+	.loc 5 351 0 is_stmt 1
+	movw	r2, #65535
+	cmp	r5, r2
+	bne	.L368
+	.loc 5 352 0
+	strh	r4, [r0]	@ movhi
+.L367:
+	.loc 5 356 0
+	movs	r0, #0
+	pop	{r3, r4, r5, pc}
+.L368:
+	.loc 5 353 0
+	cmp	r1, r2
+	.loc 5 354 0
+	it	eq
+	strheq	r4, [r3]	@ movhi
+	b	.L367
+.L370:
+	.align	2
+.L369:
+	.word	.LC73
+	.word	.LANCHOR101
+	.word	.LANCHOR102
+	.cfi_endproc
+.LFE317:
+	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
+	.section	.text.FtlGcMarkBadPhyBlk,"ax",%progbits
+	.align	1
+	.global	FtlGcMarkBadPhyBlk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcMarkBadPhyBlk, %function
+FtlGcMarkBadPhyBlk:
+.LFB318:
+	.loc 5 359 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL536:
+	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 5 359 0
+	mov	r5, r0
+	.loc 5 364 0
+	ldr	r4, .L375
+	.loc 5 361 0
+	bl	P2V_block_in_plane
+.LVL537:
+	.loc 5 364 0
+	mov	r2, r5
+	.loc 5 361 0
+	mov	r6, r0
+.LVL538:
+	.loc 5 364 0
+	ldrh	r1, [r4]
+	ldr	r0, .L375+4
+	bl	printf
+.LVL539:
+	.loc 5 366 0
+	mov	r0, r6
+	bl	FtlGcRefreshBlock
+.LVL540:
+	.loc 5 368 0
+	ldrh	r3, [r4]
+	movs	r2, #0
+	.loc 5 369 0
+	ldr	r0, .L375+8
+.LVL541:
+.L372:
+	.loc 5 368 0 discriminator 1
+	uxth	r1, r2
+	cmp	r3, r1
+	bhi	.L374
+	.loc 5 372 0
+	cmp	r3, #15
+	.loc 5 373 0
+	itttt	ls
+	addls	r2, r3, #1
+.LVL542:
+	strhls	r2, [r4]	@ movhi
+	ldrls	r2, .L375+8
+	strhls	r5, [r2, r3, lsl #1]	@ movhi
+	b	.L373
+.LVL543:
+.L374:
+	adds	r2, r2, #1
+.LVL544:
+	.loc 5 369 0
+	add	r1, r0, r2, lsl #1
+.LVL545:
+	ldrh	r1, [r1, #-2]
+	cmp	r1, r5
+	bne	.L372
+.L373:
+	.loc 5 375 0
+	movs	r0, #0
+	pop	{r4, r5, r6, pc}
+.LVL546:
+.L376:
+	.align	2
+.L375:
+	.word	.LANCHOR103
+	.word	.LC74
+	.word	.LANCHOR104
+	.cfi_endproc
+.LFE318:
+	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
+	.section	.text.FtlGcReFreshBadBlk,"ax",%progbits
+	.align	1
+	.global	FtlGcReFreshBadBlk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcReFreshBadBlk, %function
+FtlGcReFreshBadBlk:
+.LFB319:
+	.loc 5 379 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	.loc 5 380 0
+	ldr	r3, .L383
+	.loc 5 379 0
+	push	{r4, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 4, -8
+	.cfi_offset 14, -4
+	.loc 5 380 0
+	ldrh	r3, [r3]
+	cbz	r3, .L378
+	.loc 5 380 0 is_stmt 0 discriminator 1
+	ldr	r2, .L383+4
+	ldrh	r1, [r2]
+	movw	r2, #65535
+	cmp	r1, r2
+	bne	.L378
+	.loc 5 381 0 is_stmt 1
+	ldr	r4, .L383+8
+	ldrh	r2, [r4]
+	cmp	r2, r3
+	.loc 5 382 0
+	itt	cs
+	movcs	r3, #0
+	strhcs	r3, [r4]	@ movhi
+.LBB217:
+.LBB218:
+	.loc 5 383 0
+	ldr	r3, .L383+12
+	ldrh	r2, [r4]
+	ldrh	r0, [r3, r2, lsl #1]
+	bl	P2V_block_in_plane
+.LVL547:
+	bl	FtlGcRefreshBlock
+.LVL548:
+	.loc 5 384 0
+	ldrh	r3, [r4]
+	adds	r3, r3, #1
+	strh	r3, [r4]	@ movhi
+.L378:
+.LBE218:
+.LBE217:
+	.loc 5 387 0
+	movs	r0, #0
+	pop	{r4, pc}
+.L384:
+	.align	2
+.L383:
+	.word	.LANCHOR103
+	.word	.LANCHOR101
+	.word	.LANCHOR105
+	.word	.LANCHOR104
+	.cfi_endproc
+.LFE319:
+	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
+	.section	.text.ftl_malloc,"ax",%progbits
+	.align	1
+	.global	ftl_malloc
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_malloc, %function
+ftl_malloc:
+.LFB340:
+	.loc 1 24 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL549:
+	.loc 1 25 0
+	movs	r1, #0
+	b	kmalloc
+.LVL550:
+	.cfi_endproc
+.LFE340:
+	.size	ftl_malloc, .-ftl_malloc
+	.section	.text.rknand_print_hex,"ax",%progbits
+	.align	1
+	.global	rknand_print_hex
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rknand_print_hex, %function
+rknand_print_hex:
+.LFB341:
+	.loc 1 29 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL551:
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 1 36 0
+	movs	r6, #0
+	.loc 1 29 0
+	mov	fp, r0
+	mov	r7, r1
+.LVL552:
+	mov	r8, r2
+	mov	r10, r3
+	.loc 1 35 0
+	mov	r5, r6
+	.loc 1 36 0
+	mov	r4, r6
+.LVL553:
+.L387:
+	.loc 1 36 0 is_stmt 0 discriminator 1
+	cmp	r4, r10
+	bcc	.L393
+	.loc 1 51 0 is_stmt 1
+	ldr	r0, .L396
+	.loc 1 52 0
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_remember_state
+	.cfi_restore 14
+	.cfi_restore 11
+	.cfi_restore 10
+	.cfi_restore 8
+	.cfi_restore 7
+	.cfi_restore 6
+	.cfi_restore 5
+	.cfi_restore 4
+	.cfi_def_cfa_offset 0
+.LVL554:
+	.loc 1 51 0
+	b	printf
+.LVL555:
+.L393:
+	.cfi_restore_state
+	.loc 1 37 0
+	cbnz	r5, .L388
+	.loc 1 38 0
+	mov	r2, r6
+	mov	r1, fp
+	ldr	r0, .L396+4
+	bl	printf
+.LVL556:
+.L388:
+	.loc 1 40 0
+	cmp	r8, #4
+	bne	.L389
+	.loc 1 41 0
+	ldr	r1, [r7, r4, lsl #2]
+.L395:
+	.loc 1 43 0
+	ldr	r0, .L396+8
+.L394:
+	.loc 1 46 0
+	adds	r5, r5, #1
+.LVL557:
+	.loc 1 45 0
+	bl	printf
+.LVL558:
+	.loc 1 46 0
+	cmp	r5, #15
+	bls	.L392
+.LVL559:
+	.loc 1 47 0
+	movs	r5, #0
+	.loc 1 48 0
+	ldr	r0, .L396
+	bl	printf
+.LVL560:
+.L392:
+	.loc 1 36 0 discriminator 2
+	adds	r4, r4, #1
+.LVL561:
+	add	r6, r6, r8
+	b	.L387
+.L389:
+	.loc 1 42 0
+	cmp	r8, #2
+	bne	.L391
+	.loc 1 43 0
+	ldrsh	r1, [r7, r4, lsl #1]
+	b	.L395
+.L391:
+	.loc 1 45 0
+	ldrb	r1, [r7, r4]	@ zero_extendqisi2
+	ldr	r0, .L396+12
+	b	.L394
+.L397:
+	.align	2
+.L396:
+	.word	.LC78
+	.word	.LC75
+	.word	.LC76
+	.word	.LC77
+	.cfi_endproc
+.LFE341:
+	.size	rknand_print_hex, .-rknand_print_hex
+	.section	.text.FlashReadPages,"ax",%progbits
+	.align	1
+	.global	FlashReadPages
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashReadPages, %function
+FlashReadPages:
+.LFB343:
+	.loc 1 81 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL562:
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 48
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 1 81 0
+	mov	r8, r1
+	.loc 1 83 0
+	ldr	r3, .L416
+	mov	r4, r0
+	.loc 1 87 0
+	movs	r5, #0
+	.loc 1 88 0
+	ldr	fp, .L416+12
+	.loc 1 83 0
+	ldrh	r2, [r3, #12]
+.LVL563:
+	mov	r10, r3
+	str	r2, [sp, #4]
+.LVL564:
+.L399:
+	.loc 1 87 0 discriminator 1
+	cmp	r5, r8
+	bne	.L406
+	.loc 1 108 0
+	movs	r0, #0
+	add	sp, sp, #16
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL565:
+.L406:
+	.cfi_restore_state
+	.loc 1 88 0
+	ldr	r3, [r4, #8]
+	cbz	r3, .L400
+	.loc 1 88 0 is_stmt 0 discriminator 2
+	ldr	r3, [r4, #12]
+	cbnz	r3, .L401
+.L400:
+	.loc 1 88 0 discriminator 3
+	movs	r2, #88
+	ldr	r1, .L416+4
+	mov	r0, fp
+	bl	printf
+.LVL566:
+.L401:
+	.loc 1 90 0 is_stmt 1
+	ldr	r6, .L416+8
+	.loc 1 89 0
+	add	r2, sp, #8
+	add	r1, sp, #12
+	ldr	r0, [r4, #4]
+	bl	l2p_addr_tran.isra.0
+.LVL567:
+	.loc 1 90 0
+	ldr	r3, [r4, #12]
+	ldr	r2, [r4, #8]
+	ldr	r1, [sp, #12]
+	ldrb	r0, [sp, #8]	@ zero_extendqisi2
+	ldr	r7, [r6, #12]
+	blx	r7
+.LVL568:
+	.loc 1 95 0
+	ldrh	r3, [r10, #14]
+	.loc 1 94 0
+	str	r0, [r4]
+	.loc 1 95 0
+	cmp	r3, #4
+	bne	.L403
+	.loc 1 96 0
+	ldr	r0, [sp, #4]
+.LVL569:
+	ldr	r3, [r4, #12]
+	ldr	r2, [r4, #8]
+	ldr	r1, [sp, #12]
+	ldr	r6, [r6, #12]
+	adds	r3, r3, #8
+	add	r2, r2, #2048
+	add	r1, r1, r0
+	ldrb	r0, [sp, #8]	@ zero_extendqisi2
+	blx	r6
+.LVL570:
+	.loc 1 100 0
+	adds	r0, r0, #1
+.LVL571:
+	beq	.L404
+	.loc 1 101 0 discriminator 1
+	ldr	r3, [r4, #12]
+	.loc 1 100 0 discriminator 1
+	ldr	r2, [r3, #12]
+	adds	r2, r2, #1
+	bne	.L403
+	.loc 1 101 0
+	ldr	r2, [r3, #8]
+	adds	r2, r2, #1
+	bne	.L403
+	.loc 1 102 0
+	ldr	r3, [r3]
+	adds	r3, r3, #1
+	beq	.L403
+.L404:
+	.loc 1 104 0
+	mov	r3, #-1
+	str	r3, [r4]
+.LVL572:
+.L403:
+	.loc 1 87 0 discriminator 2
+	adds	r5, r5, #1
+.LVL573:
+	adds	r4, r4, #20
+	b	.L399
+.L417:
+	.align	2
+.L416:
+	.word	.LANCHOR0
+	.word	.LANCHOR106
+	.word	.LANCHOR107
+	.word	.LC1
+	.cfi_endproc
+.LFE343:
+	.size	FlashReadPages, .-FlashReadPages
+	.section	.text.FtlLoadFactoryBbt,"ax",%progbits
+	.align	1
+	.global	FtlLoadFactoryBbt
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlLoadFactoryBbt, %function
+FtlLoadFactoryBbt:
+.LFB233:
+	.loc 4 279 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	.loc 4 286 0
+	ldr	r3, .L428
+	.loc 4 279 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 4 289 0
+	movs	r6, #0
+	.loc 4 286 0
+	ldr	r5, .L428+4
+	ldr	r3, [r3]
+	ldr	r7, .L428+8
+	.loc 4 291 0
+	ldr	r10, .L428+20
+	.loc 4 286 0
+	str	r3, [r5, #8]
+	.loc 4 287 0
+	ldr	r3, .L428+12
+	ldr	r8, [r3]
+	str	r8, [r5, #12]
+.LVL574:
+.L419:
+	.loc 4 289 0 discriminator 1
+	ldr	r3, .L428+16
+	ldrh	r3, [r3]
+	cmp	r6, r3
+	bcc	.L424
+	.loc 4 314 0
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL575:
+.L424:
+	.loc 4 291 0
+	ldrh	r4, [r10]
+	.loc 4 290 0
+	movw	r3, #65535
+	.loc 4 294 0
+	ldr	fp, .L428+4
+	.loc 4 290 0
+	strh	r3, [r7, #2]!	@ movhi
+	.loc 4 291 0
+	subs	r4, r4, #1
+	uxth	r4, r4
+.LVL576:
+.L420:
+	.loc 4 291 0 is_stmt 0 discriminator 1
+	ldrh	r3, [r10]
+	sub	r2, r3, #15
+	cmp	r2, r4
+	bgt	.L422
+.LVL577:
+	.loc 4 292 0 is_stmt 1
+	mla	r3, r6, r3, r4
+.LVL578:
+	.loc 4 294 0
+	movs	r2, #1
+.LVL579:
+	mov	r1, r2
+	mov	r0, fp
+	.loc 4 292 0
+	lsls	r3, r3, #10
+	.loc 4 293 0
+	str	r3, [r5, #4]
+	.loc 4 294 0
+	bl	FlashReadPages
+.LVL580:
+	.loc 4 295 0
+	ldr	r3, [r5]
+	adds	r3, r3, #1
+	beq	.L421
+	.loc 4 301 0
+	ldrh	r2, [r8]
+	movw	r3, #61664
+	cmp	r2, r3
+	bne	.L421
+	.loc 4 303 0
+	strh	r4, [r7]	@ movhi
+.L422:
+	.loc 4 289 0 discriminator 2
+	adds	r6, r6, #1
+.LVL581:
+	b	.L419
+.L421:
+	.loc 4 291 0 discriminator 2
+	subs	r4, r4, #1
+.LVL582:
+	uxth	r4, r4
+.LVL583:
+	b	.L420
+.L429:
+	.align	2
+.L428:
+	.word	.LANCHOR39
+	.word	.LANCHOR108
+	.word	.LANCHOR37+10
+	.word	.LANCHOR109
+	.word	.LANCHOR10
+	.word	.LANCHOR17
+	.cfi_endproc
+.LFE233:
+	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
+	.section	.text.FtlGetLastWrittenPage,"ax",%progbits
+	.align	1
+	.global	FtlGetLastWrittenPage
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGetLastWrittenPage, %function
+FtlGetLastWrittenPage:
+.LFB239:
+	.loc 2 47 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 88
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL584:
+	.loc 2 51 0
+	cmp	r1, #1
+	.loc 2 47 0
+	push	{r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
+	.cfi_offset 14, -4
+	.loc 2 51 0
+	it	eq
+	ldreq	r3, .L439
+	.loc 2 47 0
+	sub	sp, sp, #88
+	.cfi_def_cfa_offset 112
+	.loc 2 57 0
+	lsl	r7, r0, #10
+	.loc 2 58 0
+	mov	r2, r1
+	.loc 2 51 0
+	it	ne
+	ldrne	r3, .L439+4
+	.loc 2 47 0
+	mov	r6, r1
+	.loc 2 58 0
+	add	r0, sp, #4
+.LVL585:
+	movs	r1, #1
+.LVL586:
+	.loc 2 51 0
+	ldrh	r5, [r3]
+.LVL587:
+	.loc 2 53 0
+	ldr	r3, .L439+8
+	.loc 2 56 0
+	subs	r5, r5, #1
+.LVL588:
+	sxth	r5, r5
+.LVL589:
+	.loc 2 53 0
+	str	r3, [sp, #12]
+	.loc 2 54 0
+	add	r3, sp, #24
+	str	r3, [sp, #16]
+.LVL590:
+	.loc 2 57 0
+	orr	r3, r5, r7
+	str	r3, [sp, #8]
+	.loc 2 58 0
+	bl	FlashReadPages
+.LVL591:
+	.loc 2 59 0
+	ldr	r3, [sp, #24]
+	adds	r3, r3, #1
+	bne	.L433
+	mov	r8, #0
+.LVL592:
+.L434:
+	.loc 2 60 0
+	cmp	r8, r5
+	ble	.L437
+.LVL593:
+.L433:
+	.loc 2 73 0
+	mov	r0, r5
+	add	sp, sp, #88
+	.cfi_remember_state
+	.cfi_def_cfa_offset 24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.LVL594:
+.L437:
+	.cfi_restore_state
+	.loc 2 61 0
+	add	r3, r8, r5
+	.loc 2 63 0
+	mov	r2, r6
+	.loc 2 61 0
+	add	r3, r3, r3, lsr #31
+	.loc 2 63 0
+	movs	r1, #1
+	add	r0, sp, #4
+	.loc 2 61 0
+	asrs	r4, r3, #1
+.LVL595:
+	.loc 2 62 0
+	sxth	r3, r4
+	orrs	r3, r3, r7
+	str	r3, [sp, #8]
+	.loc 2 63 0
+	bl	FlashReadPages
+.LVL596:
+	.loc 2 65 0
+	ldr	r3, [sp, #24]
+	adds	r3, r3, #1
+	bne	.L435
+	.loc 2 65 0 is_stmt 0 discriminator 1
+	ldr	r3, [sp, #28]
+	adds	r3, r3, #1
+	bne	.L435
+	.loc 2 66 0 is_stmt 1
+	subs	r4, r4, #1
+.LVL597:
+	sxth	r5, r4
+.LVL598:
+	b	.L434
+.LVL599:
+.L435:
+	.loc 2 68 0
+	adds	r4, r4, #1
+.LVL600:
+	sxth	r8, r4
+.LVL601:
+	b	.L434
+.L440:
+	.align	2
+.L439:
+	.word	.LANCHOR20
+	.word	.LANCHOR19
+	.word	ftl_temp_buf
+	.cfi_endproc
+.LFE239:
+	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
+	.section	.text.FlashProgPages,"ax",%progbits
+	.align	1
+	.global	FlashProgPages
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashProgPages, %function
+FlashProgPages:
+.LFB344:
+	.loc 1 111 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 40
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL602:
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	sub	sp, sp, #40
+	.cfi_def_cfa_offset 72
+	.loc 1 111 0
+	str	r3, [sp]
+	mov	r10, r1
+	mov	r7, r2
+	mov	r4, r0
+	.loc 1 113 0
+	ldr	r3, .L471
+.LVL603:
+	.loc 1 117 0
+	mov	r5, r0
+	movs	r6, #0
+	.loc 1 113 0
+	ldrh	r8, [r3, #12]
+.LVL604:
+	str	r3, [sp, #4]
+.LVL605:
+.L442:
+	.loc 1 117 0 discriminator 1
+	cmp	r6, r10
+	bne	.L450
+	.loc 1 138 0
+	ldr	r3, [sp]
+	cmp	r3, #0
+	bne	.L457
+.LVL606:
+.L470:
+	.loc 1 168 0
+	movs	r0, #0
+	add	sp, sp, #40
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+.LVL607:
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL608:
+.L450:
+	.cfi_restore_state
+	.loc 1 118 0
+	ldr	r3, [r5, #8]
+	cbz	r3, .L443
+	.loc 1 118 0 is_stmt 0 discriminator 2
+	ldr	r3, [r5, #12]
+	cbnz	r3, .L444
+.L443:
+	.loc 1 118 0 discriminator 3
+	movs	r2, #118
+	ldr	r1, .L471+4
+	ldr	r0, .L471+8
+	bl	printf
+.LVL609:
+.L444:
+	.loc 1 119 0 is_stmt 1
+	add	r2, sp, #12
+	add	r1, sp, #16
+	ldr	r0, [r5, #4]
+	bl	l2p_addr_tran.isra.0
+.LVL610:
+	.loc 1 120 0
+	ldr	r3, .L471+12
+	ldr	r2, [r5, #8]
+	ldr	r1, [sp, #16]
+	ldr	fp, [r3, #8]
+	ldrb	r0, [sp, #12]	@ zero_extendqisi2
+	ldr	r3, [r5, #12]
+	blx	fp
+.LVL611:
+	.loc 1 125 0
+	cbnz	r0, .L445
+	.loc 1 124 0
+	str	r0, [r5]
+.L446:
+	.loc 1 128 0
+	ldr	r3, [sp, #4]
+	ldrh	r3, [r3, #14]
+	cmp	r3, #4
+	bne	.L448
+	.loc 1 129 0
+	ldr	r1, .L471+12
+	ldr	r3, [r5, #12]
+	ldr	r2, [r5, #8]
+	ldr	fp, [r1, #8]
+	ldr	r1, [sp, #16]
+	adds	r3, r3, #8
+	add	r2, r2, #2048
+	ldrb	r0, [sp, #12]	@ zero_extendqisi2
+.LVL612:
+	add	r1, r1, r8
+	blx	fp
+.LVL613:
+	.loc 1 133 0
+	cbz	r0, .L448
+	.loc 1 134 0
+	mov	r3, #-1
+	str	r3, [r5]
+.L448:
+	.loc 1 117 0 discriminator 2
+	adds	r6, r6, #1
+.LVL614:
+	adds	r5, r5, #20
+	b	.L442
+.L445:
+	.loc 1 126 0
+	mov	r3, #-1
+	str	r3, [r5]
+	b	.L446
+.LVL615:
+.L455:
+.LBB219:
+	.loc 1 143 0
+	movs	r3, #0
+	.loc 1 149 0
+	mov	r2, r7
+	.loc 1 143 0
+	str	r3, [r8]
+	.loc 1 149 0
+	movs	r1, #1
+	.loc 1 144 0
+	str	r3, [r10]
+	.loc 1 149 0
+	add	r0, sp, #20
+	.loc 1 145 0
+	ldr	r3, [r4, #4]
+	.loc 1 146 0
+	str	r8, [sp, #28]
+	.loc 1 147 0
+	str	r10, [sp, #32]
+	.loc 1 145 0
+	str	r3, [sp, #24]
+	.loc 1 149 0
+	bl	FlashReadPages
+.LVL616:
+	.loc 1 150 0
+	ldr	fp, [sp, #20]
+	cmp	fp, #-1
+	bne	.L452
+	.loc 1 151 0
+	ldr	r1, [r4, #4]
+	ldr	r0, .L471+16
+	bl	printf
+.LVL617:
+	.loc 1 152 0
+	str	fp, [r4]
+.L452:
+	.loc 1 154 0
+	ldr	r3, [r4, #12]
+	cbz	r3, .L453
+	.loc 1 155 0
+	ldr	r2, [r3]
+	ldr	r3, [r10]
+	cmp	r2, r3
+	beq	.L453
+	.loc 1 156 0
+	ldr	r1, [r4, #4]
+	ldr	r0, .L471+20
+	bl	printf
+.LVL618:
+	.loc 1 157 0
+	mov	r3, #-1
+	str	r3, [r4]
+.L453:
+	.loc 1 160 0
+	ldr	r3, [r4, #8]
+	cbz	r3, .L454
+	.loc 1 161 0
+	ldr	r2, [r3]
+	ldr	r3, [r8]
+	cmp	r2, r3
+	beq	.L454
+	.loc 1 162 0
+	ldr	r1, [r4, #4]
+	ldr	r0, .L471+24
+	bl	printf
+.LVL619:
+	.loc 1 163 0
+	mov	r3, #-1
+	str	r3, [r4]
+.L454:
+.LBE219:
+	.loc 1 140 0 discriminator 2
+	adds	r5, r5, #1
+.LVL620:
+	adds	r4, r4, #20
+.LVL621:
+.L451:
+	.loc 1 140 0 is_stmt 0 discriminator 1
+	cmp	r6, r5
+	bne	.L455
+	b	.L470
+.LVL622:
+.L457:
+	movs	r5, #0
+.LBB220:
+	.loc 1 143 0 is_stmt 1
+	ldr	r8, .L471+28
+.LVL623:
+	.loc 1 144 0
+	ldr	r10, .L471+32
+.LVL624:
+	b	.L451
+.L472:
+	.align	2
+.L471:
+	.word	.LANCHOR0
+	.word	.LANCHOR110
+	.word	.LC1
+	.word	.LANCHOR107
+	.word	.LC79
+	.word	.LC80
+	.word	.LC81
+	.word	check_buf
+	.word	.LANCHOR111
+.LBE220:
+	.cfi_endproc
+.LFE344:
+	.size	FlashProgPages, .-FlashProgPages
+	.section	.text.FlashEraseBlocks,"ax",%progbits
+	.align	1
+	.global	FlashEraseBlocks
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashEraseBlocks, %function
+FlashEraseBlocks:
+.LFB345:
+	.loc 1 171 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL625:
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -28
+	.cfi_offset 5, -24
+	.cfi_offset 6, -20
+	.cfi_offset 7, -16
+	.cfi_offset 8, -12
+	.cfi_offset 10, -8
+	.cfi_offset 14, -4
+	.loc 1 171 0
+	mov	r7, r2
+	.loc 1 174 0
+	ldr	r5, .L484
+	adds	r4, r0, #4
+	.loc 1 177 0
+	movs	r6, #0
+	.loc 1 179 0
+	ldr	r10, .L484+4
+	.loc 1 174 0
+	ldrh	r8, [r5, #12]
+.LVL626:
+.L474:
+	.loc 1 177 0 discriminator 1
+	cmp	r6, r7
+	bne	.L480
+	.loc 1 190 0
+	movs	r0, #0
+	add	sp, sp, #12
+	.cfi_remember_state
+	.cfi_def_cfa_offset 28
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.LVL627:
+.L480:
+	.cfi_restore_state
+	.loc 1 178 0
+	add	r1, sp, #4
+	mov	r2, sp
+	ldr	r0, [r4]
+	bl	l2p_addr_tran.isra.0
+.LVL628:
+	.loc 1 179 0
+	ldr	r3, [r10, #4]
+	ldr	r1, [sp, #4]
+	ldrb	r0, [sp]	@ zero_extendqisi2
+	blx	r3
+.LVL629:
+	.loc 1 181 0
+	cbnz	r0, .L475
+	.loc 1 180 0
+	str	r0, [r4, #-4]
+.L476:
+	.loc 1 183 0
+	ldrh	r3, [r5, #14]
+	cmp	r3, #4
+	bne	.L478
+	.loc 1 184 0
+	ldr	r1, [sp, #4]
+	ldr	r3, [r10, #4]
+	ldrb	r0, [sp]	@ zero_extendqisi2
+.LVL630:
+	add	r1, r1, r8
+	blx	r3
+.LVL631:
+	.loc 1 185 0
+	cbz	r0, .L478
+	.loc 1 186 0
+	mov	r3, #-1
+	str	r3, [r4, #-4]
+.L478:
+	.loc 1 177 0 discriminator 2
+	adds	r6, r6, #1
+.LVL632:
+	adds	r4, r4, #20
+	b	.L474
+.L475:
+	.loc 1 182 0
+	mov	r3, #-1
+	str	r3, [r4, #-4]
+	b	.L476
+.L485:
+	.align	2
+.L484:
+	.word	.LANCHOR0
+	.word	.LANCHOR107
+	.cfi_endproc
+.LFE345:
+	.size	FlashEraseBlocks, .-FlashEraseBlocks
+	.section	.text.FtlFreeSysBlkQueueIn,"ax",%progbits
+	.align	1
+	.global	FtlFreeSysBlkQueueIn
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlFreeSysBlkQueueIn, %function
+FtlFreeSysBlkQueueIn:
+.LFB243:
+	.loc 2 98 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL633:
+	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 2 98 0
+	mov	r5, r0
+.LBB221:
+.LBB222:
+	.loc 2 94 0
+	ldr	r4, .L495
+.LBE222:
+.LBE221:
+	.loc 2 99 0
+	ldrh	r3, [r4, #6]
+	cmp	r3, #1024
+	beq	.L486
+.LVL634:
+.LBB223:
+	.loc 2 101 0
+	cbz	r1, .L488
+.LBB224:
+	.loc 2 102 0
+	bl	P2V_block_in_plane
+.LVL635:
+	.loc 2 103 0
+	ldr	r3, .L495+4
+	.loc 2 102 0
+	mov	r6, r0
+.LVL636:
+	.loc 2 104 0
+	movs	r2, #1
+	mov	r1, r2
+	.loc 2 103 0
+	ldr	r0, [r3]
+	lsls	r3, r5, #10
+	str	r3, [r0, #4]
+	.loc 2 104 0
+	bl	FlashEraseBlocks
+.LVL637:
+	.loc 2 105 0
+	ldr	r3, .L495+8
+	ldr	r2, [r3]
+	ldrh	r3, [r2, r6, lsl #1]
+	adds	r3, r3, #1
+	strh	r3, [r2, r6, lsl #1]	@ movhi
+	.loc 2 106 0
+	ldr	r2, .L495+12
+	ldr	r3, [r2]
+	adds	r3, r3, #1
+	str	r3, [r2]
+.LVL638:
+.L488:
+.LBE224:
+	.loc 2 108 0
+	ldrh	r3, [r4, #6]
+	adds	r3, r3, #1
+	strh	r3, [r4, #6]	@ movhi
+	.loc 2 109 0
+	ldrh	r3, [r4, #4]
+	adds	r2, r3, #4
+	.loc 2 110 0
+	adds	r3, r3, #1
+	ubfx	r3, r3, #0, #10
+	.loc 2 109 0
+	strh	r5, [r4, r2, lsl #1]	@ movhi
+	.loc 2 110 0
+	strh	r3, [r4, #4]	@ movhi
+.LVL639:
+.L486:
+	pop	{r4, r5, r6, pc}
+.L496:
+	.align	2
+.L495:
+	.word	.LANCHOR38
+	.word	.LANCHOR112
+	.word	.LANCHOR40
+	.word	.LANCHOR76
+.LBE223:
+	.cfi_endproc
+.LFE243:
+	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
+	.section	.text.FtlLowFormatEraseBlock,"ax",%progbits
+	.align	1
+	.global	FtlLowFormatEraseBlock
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlLowFormatEraseBlock, %function
+FtlLowFormatEraseBlock:
+.LFB212:
+	.loc 3 528 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 32
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL640:
+	.loc 3 538 0
+	ldr	r3, .L540
+	.loc 3 528 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	sub	sp, sp, #32
+	.cfi_def_cfa_offset 64
+	.loc 3 540 0
+	ldr	r6, .L540+4
+	.loc 3 539 0
+	mov	fp, #0
+	.loc 3 536 0
+	mov	r5, fp
+	.loc 3 537 0
+	mov	r4, fp
+	.loc 3 538 0
+	str	r0, [r3]
+.LVL641:
+	.loc 3 540 0
+	mov	r10, #20
+	.loc 3 539 0
+	ldr	r3, .L540+8
+	.loc 3 540 0
+	ldr	r8, [r6]
+	.loc 3 528 0
+	str	r0, [sp, #4]
+	.loc 3 539 0
+	ldrh	r3, [r3]
+	.loc 3 528 0
+	str	r1, [sp]
+	.loc 3 539 0
+	str	r3, [sp, #8]
+	.loc 3 550 0
+	ldr	r3, .L540+12
+	ldr	r3, [r3]
+	str	r3, [sp, #12]
+	.loc 3 551 0
+	ldr	r3, .L540+16
+	ldr	r3, [r3]
+	str	r3, [sp, #16]
+	ldr	r3, .L540+20
+	ldrh	r3, [r3]
+	str	r3, [sp, #20]
+.LVL642:
+.L498:
+	.loc 3 539 0 discriminator 1
+	ldr	r3, [sp, #8]
+	uxth	r2, fp
+	cmp	r3, r2
+	bhi	.L502
+	.loc 3 559 0
+	cmp	r5, #0
+	beq	.L497
+	.loc 3 562 0
+	mov	r0, r8
+	.loc 3 563 0
+	movs	r7, #0
+	.loc 3 564 0
+	mov	r8, #20
+	.loc 3 562 0
+	mov	r2, r5
+	movs	r1, #0
+	bl	FlashEraseBlocks
+.LVL643:
+.L505:
+	.loc 3 563 0 discriminator 1
+	uxth	r3, r7
+	cmp	r5, r3
+	bhi	.L507
+	.loc 3 571 0
+	ldr	r3, [sp]
+	cmp	r3, #0
+	beq	.L523
+.LVL644:
+	.loc 3 573 0
+	ldr	r3, .L540+24
+	.loc 3 572 0
+	mov	r8, #1
+	.loc 3 573 0
+	ldrh	r10, [r3]
+.LVL645:
+	.loc 3 574 0
+	lsr	r3, r10, #2
+	str	r3, [sp, #12]
+.LVL646:
+.L508:
+	movs	r6, #0
+.LVL647:
+.L517:
+	.loc 3 578 0
+	ldr	r3, .L540+8
+	mov	fp, #0
+	.loc 3 577 0
+	mov	r5, fp
+	.loc 3 578 0
+	ldrh	r3, [r3]
+	str	r3, [sp, #16]
+	.loc 3 579 0
+	ldr	r3, .L540+4
+	ldr	r3, [r3]
+	str	r3, [sp, #8]
+	.loc 3 587 0
+	ldr	r3, .L540+28
+	ldr	r3, [r3]
+	str	r3, [sp, #20]
+	.loc 3 588 0
+	ldr	r3, .L540+12
+	ldr	r3, [r3]
+	str	r3, [sp, #24]
+	ldr	r3, .L540+20
+	ldrh	r3, [r3]
+	str	r3, [sp, #28]
+.LVL648:
+.L509:
+	.loc 3 578 0 discriminator 1
+	ldr	r3, [sp, #16]
+	uxth	r2, fp
+	cmp	r3, r2
+	bhi	.L512
+	.loc 3 593 0
+	cbz	r5, .L497
+	.loc 3 598 0
+	ldr	fp, .L540+4
+.LVL649:
+	.loc 3 596 0
+	movs	r3, #1
+	mov	r2, r8
+.LVL650:
+	mov	r1, r5
+	ldr	r0, [sp, #8]
+	.loc 3 597 0
+	movs	r7, #0
+	.loc 3 596 0
+	bl	FlashProgPages
+.LVL651:
+	.loc 3 598 0
+	movs	r3, #20
+.LVL652:
+.L514:
+	.loc 3 597 0 discriminator 1
+	uxth	r2, r7
+	cmp	r5, r2
+	bhi	.L516
+	.loc 3 604 0
+	ldr	r3, [sp, #12]
+	add	r6, r6, r3
+.LVL653:
+	uxth	r6, r6
+.LVL654:
+	.loc 3 605 0
+	cmp	r10, r6
+	bhi	.L517
+	.loc 3 611 0 discriminator 1
+	ldr	r7, .L540+4
+.LVL655:
+	movs	r6, #0
+.LVL656:
+	mov	r10, #20
+.LVL657:
+.L518:
+	.loc 3 610 0 discriminator 1
+	uxth	r3, r6
+	cmp	r5, r3
+	bhi	.L520
+	.loc 3 615 0
+	ldr	r3, [sp, #4]
+	cmp	r3, #63
+	bls	.L521
+	.loc 3 615 0 is_stmt 0 discriminator 1
+	ldr	r3, [sp]
+	cbz	r3, .L497
+.L521:
+	.loc 3 616 0 is_stmt 1
+	ldr	r3, .L540+4
+	mov	r2, r5
+	mov	r1, r8
+	ldr	r0, [r3]
+	bl	FlashEraseBlocks
+.LVL658:
+.L497:
+	.loc 3 619 0
+	mov	r0, r4
+	add	sp, sp, #32
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL659:
+.L502:
+	.cfi_restore_state
+	.loc 3 540 0
+	mul	r2, r10, fp
+	movs	r3, #0
+	.loc 3 541 0
+	ldr	r1, [sp, #4]
+	.loc 3 540 0
+	str	r3, [r8, r2]
+	.loc 3 541 0
+	ldr	r3, .L540+32
+	ldrb	r0, [r3, fp]	@ zero_extendqisi2
+	bl	V2P_block
+.LVL660:
+	.loc 3 543 0
+	ldr	r3, [sp]
+	.loc 3 541 0
+	mov	r7, r0
+.LVL661:
+	.loc 3 543 0
+	cbz	r3, .L499
+	.loc 3 544 0
+	bl	IsBlkInVendorPart
+.LVL662:
+	cbnz	r0, .L500
+.L499:
+	.loc 3 548 0
+	mov	r0, r7
+	bl	FtlBbmIsBadBlock
+.LVL663:
+	cbnz	r0, .L501
+	.loc 3 549 0
+	mla	r1, r10, r5, r8
+	.loc 3 550 0
+	ldr	r3, [sp, #12]
+	.loc 3 549 0
+	lsls	r7, r7, #10
+	.loc 3 550 0
+	str	r3, [r1, #8]
+	.loc 3 551 0
+	ldr	r3, [sp, #20]
+	.loc 3 549 0
+	str	r7, [r1, #4]
+	.loc 3 551 0
+	mul	r2, r3, r5
+	ldr	r3, [sp, #16]
+	.loc 3 552 0
+	adds	r5, r5, #1
+.LVL664:
+	uxth	r5, r5
+.LVL665:
+	.loc 3 551 0
+	bic	r2, r2, #3
+	add	r2, r2, r3
+	str	r2, [r1, #12]
+.L500:
+.LVL666:
+	add	fp, fp, #1
+.LVL667:
+	b	.L498
+.LVL668:
+.L501:
+	.loc 3 554 0
+	adds	r4, r4, #1
+.LVL669:
+	uxth	r4, r4
+.LVL670:
+	b	.L500
+.LVL671:
+.L507:
+	.loc 3 564 0
+	mul	r3, r8, r7
+	ldr	r2, [r6]
+	adds	r1, r2, r3
+	ldr	r3, [r2, r3]
+	adds	r3, r3, #1
+	bne	.L506
+	.loc 3 566 0
+	ldr	r0, [r1, #4]
+	.loc 3 565 0
+	adds	r4, r4, #1
+.LVL672:
+	uxth	r4, r4
+.LVL673:
+	.loc 3 566 0
+	ubfx	r0, r0, #10, #16
+	bl	FtlBbmMapBadBlock
+.LVL674:
+.L506:
+	adds	r7, r7, #1
+.LVL675:
+	b	.L505
+.LVL676:
+.L523:
+	.loc 3 533 0
+	movs	r3, #6
+	.loc 3 534 0
+	ldr	r8, [sp]
+	.loc 3 533 0
+	str	r3, [sp, #12]
+	.loc 3 531 0
+	mov	r10, #1
+	b	.L508
+.LVL677:
+.L512:
+	.loc 3 579 0
+	movs	r3, #20
+	mul	r2, r3, fp
+	ldr	r3, [sp, #8]
+	mov	r1, r3
+	movs	r3, #0
+	str	r3, [r1, r2]
+	.loc 3 580 0
+	ldr	r3, .L540+32
+	ldr	r1, [sp, #4]
+	ldrb	r0, [r3, fp]	@ zero_extendqisi2
+	bl	V2P_block
+.LVL678:
+	.loc 3 581 0
+	ldr	r3, [sp]
+	.loc 3 580 0
+	mov	r7, r0
+.LVL679:
+	.loc 3 581 0
+	cbz	r3, .L510
+	.loc 3 582 0
+	bl	IsBlkInVendorPart
+.LVL680:
+	cbnz	r0, .L511
+.L510:
+	.loc 3 585 0
+	mov	r0, r7
+	bl	FtlBbmIsBadBlock
+.LVL681:
+	cbnz	r0, .L511
+	.loc 3 586 0
+	ldr	r3, [sp, #8]
+	movs	r2, #20
+	add	r7, r6, r7, lsl #10
+	mla	r1, r2, r5, r3
+	.loc 3 587 0
+	ldr	r3, [sp, #20]
+	str	r3, [r1, #8]
+	.loc 3 588 0
+	ldr	r3, [sp, #28]
+	.loc 3 586 0
+	str	r7, [r1, #4]
+	.loc 3 588 0
+	mul	r2, r3, r5
+	ldr	r3, [sp, #24]
+	.loc 3 589 0
+	adds	r5, r5, #1
+.LVL682:
+	uxth	r5, r5
+.LVL683:
+	.loc 3 588 0
+	bic	r2, r2, #3
+	add	r2, r2, r3
+	str	r2, [r1, #12]
+.L511:
+.LVL684:
+	add	fp, fp, #1
+.LVL685:
+	b	.L509
+.LVL686:
+.L516:
+	.loc 3 598 0
+	mul	r2, r3, r7
+	ldr	r1, [fp]
+	adds	r0, r1, r2
+	ldr	r2, [r1, r2]
+	cbz	r2, .L515
+	.loc 3 600 0
+	ldr	r0, [r0, #4]
+	.loc 3 599 0
+	adds	r4, r4, #1
+.LVL687:
+	str	r3, [sp, #8]
+	uxth	r4, r4
+.LVL688:
+	.loc 3 600 0
+	ubfx	r0, r0, #10, #16
+	bl	FtlBbmMapBadBlock
+.LVL689:
+	ldr	r3, [sp, #8]
+.L515:
+.LVL690:
+	adds	r7, r7, #1
+.LVL691:
+	b	.L514
+.LVL692:
+.L520:
+	.loc 3 611 0
+	ldr	r3, [sp]
+	cbz	r3, .L519
+	.loc 3 611 0 is_stmt 0 discriminator 1
+	mul	r3, r10, r6
+	ldr	r2, [r7]
+	adds	r1, r2, r3
+	ldr	r3, [r2, r3]
+	cbnz	r3, .L519
+	.loc 3 612 0 is_stmt 1
+	ldr	r0, [r1, #4]
+	movs	r1, #1
+	ubfx	r0, r0, #10, #16
+	bl	FtlFreeSysBlkQueueIn
+.LVL693:
+.L519:
+	adds	r6, r6, #1
+.LVL694:
+	b	.L518
+.L541:
+	.align	2
+.L540:
+	.word	.LANCHOR113
+	.word	.LANCHOR112
+	.word	.LANCHOR3
+	.word	.LANCHOR114
+	.word	.LANCHOR115
+	.word	.LANCHOR24
+	.word	.LANCHOR20
+	.word	.LANCHOR116
+	.word	.LANCHOR13
+	.cfi_endproc
+.LFE212:
+	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
+	.section	.text.ftl_memset,"ax",%progbits
+	.align	1
+	.global	ftl_memset
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_memset, %function
+ftl_memset:
+.LFB348:
+	.loc 1 238 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL695:
+	.loc 1 239 0
+	b	memset
+.LVL696:
+	.cfi_endproc
+.LFE348:
+	.size	ftl_memset, .-ftl_memset
+	.section	.text.FtlMemInit,"ax",%progbits
+	.align	1
+	.global	FtlMemInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlMemInit, %function
+FtlMemInit:
+.LFB209:
+	.loc 3 279 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 48
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 3 282 0
+	movs	r1, #0
+	ldr	r3, .L644
+	.loc 3 311 0
+	mov	r8, #12
+	.loc 3 297 0
+	ldr	r2, .L644+4
+	.loc 3 282 0
+	str	r1, [r3]
+	.loc 3 283 0
+	ldr	r3, .L644+8
+	.loc 3 310 0
+	ldr	r4, .L644+12
+	.loc 3 307 0
+	str	r1, [sp, #4]
+	.loc 3 283 0
+	str	r1, [r3]
+	.loc 3 284 0
+	ldr	r3, .L644+16
+	.loc 3 310 0
+	ldrh	r0, [r4]
+	.loc 3 312 0
+	ldr	fp, .L644+288
+	.loc 3 284 0
+	str	r1, [r3]
+	.loc 3 285 0
+	ldr	r3, .L644+20
+	.loc 3 310 0
+	lsls	r0, r0, #1
+	.loc 3 316 0
+	ldr	r10, .L644+292
+	.loc 3 320 0
+	ldr	r5, .L644+24
+	.loc 3 285 0
+	str	r1, [r3]
+	.loc 3 286 0
+	ldr	r3, .L644+28
+	.loc 3 323 0
+	ldr	r7, .L644+32
+	.loc 3 286 0
+	str	r1, [r3]
+	.loc 3 287 0
+	ldr	r3, .L644+36
+	str	r1, [r3]
+	.loc 3 288 0
+	ldr	r3, .L644+40
+	str	r1, [r3]
+	.loc 3 289 0
+	ldr	r3, .L644+44
+	str	r1, [r3]
+	.loc 3 290 0
+	ldr	r3, .L644+48
+	str	r1, [r3]
+	.loc 3 291 0
+	ldr	r3, .L644+52
+	str	r1, [r3]
+	.loc 3 292 0
+	ldr	r3, .L644+56
+	str	r1, [r3]
+	.loc 3 293 0
+	ldr	r3, .L644+60
+	str	r1, [r3]
+	.loc 3 294 0
+	ldr	r3, .L644+64
+	str	r1, [r3]
+	.loc 3 295 0
+	ldr	r3, .L644+68
+	str	r1, [r3]
+	.loc 3 296 0
+	ldr	r3, .L644+72
+	str	r1, [r3]
+	.loc 3 297 0
+	movw	r3, #65535
+	str	r3, [r2]
+	.loc 3 298 0
+	ldr	r2, .L644+76
+	str	r1, [r2]
+	.loc 3 299 0
+	ldr	r2, .L644+80
+	str	r1, [r2]
+	.loc 3 300 0
+	ldr	r2, .L644+84
+	str	r1, [r2]
+	.loc 3 301 0
+	ldr	r2, .L644+88
+	strh	r3, [r2]	@ movhi
+	.loc 3 302 0
+	ldr	r2, .L644+92
+	strh	r3, [r2]	@ movhi
+	.loc 3 303 0
+	movs	r2, #32
+	ldr	r3, .L644+96
+	strh	r2, [r3]	@ movhi
+	.loc 3 304 0
+	movs	r2, #128
+	ldr	r3, .L644+100
+	strh	r2, [r3]	@ movhi
+	.loc 3 305 0
+	ldr	r3, .L644+104
+	strh	r1, [r3]	@ movhi
+	.loc 3 306 0
+	ldr	r3, .L644+108
+	strh	r1, [r3]	@ movhi
+	.loc 3 307 0
+	ldr	r3, .L644+112
+	strh	r1, [r3]	@ movhi
+	.loc 3 310 0
+	bl	ftl_malloc
+.LVL697:
+	ldr	r3, .L644+116
+	str	r0, [r3]
+	.loc 3 311 0
+	ldrh	r0, [r4]
+	.loc 3 312 0
+	movs	r4, #20
+	.loc 3 311 0
+	mul	r0, r8, r0
+	bl	ftl_malloc
+.LVL698:
+	.loc 3 312 0
+	ldrh	r2, [fp]
+	.loc 3 311 0
+	ldr	r3, .L644+120
+	.loc 3 312 0
+	muls	r4, r2, r4
+.LVL699:
+	.loc 3 311 0
+	str	r0, [r3]
+	.loc 3 313 0
+	lsls	r6, r4, #2
+	mov	r0, r6
+	bl	ftl_malloc
+.LVL700:
+	ldr	r3, .L644+124
+	str	r0, [r3]
+	.loc 3 314 0
+	mov	r0, r4
+	bl	ftl_malloc
+.LVL701:
+	ldr	r3, .L644+128
+	str	r0, [r3]
+	.loc 3 315 0
+	mov	r0, r6
+	bl	ftl_malloc
+.LVL702:
+	ldr	r3, .L644+132
+	.loc 3 324 0
+	ldr	r6, .L644+136
+	.loc 3 315 0
+	str	r0, [r3]
+	.loc 3 316 0
+	mov	r0, r4
+	bl	ftl_malloc
+.LVL703:
+	str	r0, [r10]
+	.loc 3 317 0
+	mov	r0, r4
+	bl	ftl_malloc
+.LVL704:
+	ldr	r3, .L644+140
+	.loc 3 320 0
+	ldrh	r2, [fp]
+	.loc 3 317 0
+	str	r0, [r3]
+	.loc 3 319 0
+	ldr	r3, .L644+144
+	.loc 3 320 0
+	lsls	r2, r2, #1
+	.loc 3 319 0
+	ldrh	r4, [r3]
+.LVL705:
+	.loc 3 320 0
+	adds	r2, r2, #1
+	str	r2, [r5]
+	.loc 3 321 0
+	mov	r0, r4
+	bl	ftl_malloc
+.LVL706:
+	ldr	r3, .L644+148
+	str	r0, [r3]
+	.loc 3 322 0
+	mov	r0, r4
+	bl	ftl_malloc
+.LVL707:
+	ldr	r3, .L644+152
+	str	r0, [r3]
+	.loc 3 323 0
+	mov	r0, r4
+	bl	ftl_malloc
+.LVL708:
+	str	r0, [r7]
+	.loc 3 324 0
+	ldr	r0, [r5]
+	muls	r0, r4, r0
+	bl	ftl_malloc
+.LVL709:
+	str	r0, [r6]
+	.loc 3 325 0
+	mov	r0, r4
+	bl	ftl_malloc
+.LVL710:
+	ldr	r2, .L644+156
+	str	r0, [r2]
+	.loc 3 326 0
+	mov	r0, r4
+	bl	ftl_malloc
+.LVL711:
+	ldr	r2, .L644+160
+	.loc 3 329 0
+	ldr	r4, .L644+164
+.LVL712:
+	.loc 3 326 0
+	str	r0, [r2]
+	.loc 3 327 0
+	ldr	r0, [r5]
+	mul	r0, r8, r0
+	bl	ftl_malloc
+.LVL713:
+	ldr	r2, .L644+168
+	.loc 3 329 0
+	ldrh	r3, [fp]
+	.loc 3 327 0
+	str	r0, [r2]
+	.loc 3 329 0
+	ldrh	r2, [r4]
+	mul	fp, r3, r2
+.LVL714:
+	.loc 3 330 0
+	mov	r0, fp
+	bl	ftl_malloc
+.LVL715:
+	ldr	r2, .L644+172
+	str	r0, [r2]
+	.loc 3 331 0
+	lsl	r0, fp, #2
+	bl	ftl_malloc
+.LVL716:
+	ldr	r3, .L644+176
+	str	r0, [r3]
+	.loc 3 332 0
+	ldrh	r3, [r4]
+	ldr	r0, [r5]
+	.loc 3 335 0
+	ldr	r4, .L644+180
+	ldr	r5, .L644+184
+	.loc 3 332 0
+	muls	r0, r3, r0
+	bl	ftl_malloc
+.LVL717:
+	ldr	r3, .L644+188
+	str	r0, [r3]
+	.loc 3 335 0
+	ldrh	r0, [r4]
+	lsls	r0, r0, #1
+	uxth	r0, r0
+	strh	r0, [r5]	@ movhi
+	.loc 3 336 0
+	bl	ftl_malloc
+.LVL718:
+	ldr	r3, .L644+192
+	str	r0, [r3]
+	.loc 3 337 0
+	ldrh	r3, [r5]
+	.loc 3 338 0
+	ldr	r0, .L644+196
+	.loc 3 337 0
+	addw	r3, r3, #547
+	lsrs	r3, r3, #9
+	.loc 3 338 0
+	and	r0, r0, r3, lsl #9
+	.loc 3 337 0
+	strh	r3, [r5]	@ movhi
+	.loc 3 338 0
+	bl	ftl_malloc
+.LVL719:
+	.loc 3 345 0
+	ldrh	fp, [r4]
+.LVL720:
+	.loc 3 338 0
+	ldr	r3, .L644+200
+	str	r0, [r3]
+	.loc 3 345 0
+	lsl	fp, fp, #1
+	.loc 3 339 0
+	ldr	r3, .L644+204
+	adds	r0, r0, #32
+	str	r0, [r3]
+.LVL721:
+	.loc 3 347 0
+	mov	r0, fp
+	bl	ftl_malloc
+.LVL722:
+	ldr	r3, .L644+208
+	str	r0, [r3]
+	.loc 3 349 0
+	mov	r0, fp
+	bl	ftl_malloc
+.LVL723:
+	.loc 3 350 0
+	ldr	fp, .L644+296
+.LVL724:
+	.loc 3 349 0
+	ldr	r3, .L644+212
+	str	r0, [r3]
+.LVL725:
+	.loc 3 350 0
+	ldr	r3, [fp]
+	lsls	r5, r3, #1
+.LVL726:
+	.loc 3 351 0
+	mov	r0, r5
+	bl	ftl_malloc
+.LVL727:
+	ldr	r2, .L644+216
+	str	r0, [r2]
+	.loc 3 352 0
+	mov	r0, r5
+	bl	ftl_malloc
+.LVL728:
+	ldr	r3, .L644+220
+	.loc 3 354 0
+	ldr	r5, .L644+224
+.LVL729:
+	.loc 3 352 0
+	str	r0, [r3]
+	.loc 3 353 0
+	ldrh	r0, [r4]
+	lsrs	r0, r0, #3
+	adds	r0, r0, #4
+	bl	ftl_malloc
+.LVL730:
+	ldr	r3, .L644+228
+	str	r0, [r3]
+	.loc 3 354 0
+	ldrh	r0, [r5]
+	lsls	r0, r0, #1
+	bl	ftl_malloc
+.LVL731:
+	ldr	r2, .L644+232
+	str	r0, [r2]
+	.loc 3 355 0
+	ldrh	r0, [r5]
+	lsls	r0, r0, #1
+	bl	ftl_malloc
+.LVL732:
+	ldr	r2, .L644+236
+	str	r0, [r2]
+	.loc 3 356 0
+	ldrh	r0, [r5]
+	ldr	r5, .L644+120
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+.LVL733:
+	ldr	r3, .L644+240
+	str	r0, [r3]
+	.loc 3 357 0
+	ldr	r3, .L644+244
+	ldrh	r0, [r3]
+	str	r3, [sp]
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+.LVL734:
+	.loc 3 358 0
+	ldr	r3, [sp]
+	.loc 3 357 0
+	ldr	r2, .L644+248
+	.loc 3 358 0
+	ldr	r1, [sp, #4]
+	.loc 3 357 0
+	str	r0, [r2]
+	.loc 3 358 0
+	ldrh	r2, [r3]
+	lsls	r2, r2, #2
+	bl	ftl_memset
+.LVL735:
+	.loc 3 360 0
+	ldr	r3, .L644+252
+	ldrh	r0, [r3]
+	.loc 3 361 0
+	lsls	r0, r0, #2
+.LVL736:
+	bl	ftl_malloc
+.LVL737:
+	ldr	r3, .L644+256
+	str	r0, [r3]
+.LVL738:
+	.loc 3 362 0
+	ldr	r0, [fp]
+	.loc 3 364 0
+	ldr	fp, .L644+300
+	.loc 3 363 0
+	lsls	r0, r0, #2
+.LVL739:
+	bl	ftl_malloc
+.LVL740:
+	ldr	r3, .L644+260
+	str	r0, [r3]
+.LVL741:
+	.loc 3 364 0
+	ldrh	r0, [fp]
+	.loc 3 365 0
+	mul	r0, r8, r0
+.LVL742:
+	.loc 3 371 0
+	ldr	r8, .L644+304
+	.loc 3 365 0
+	bl	ftl_malloc
+.LVL743:
+	.loc 3 366 0
+	ldr	r2, .L644+144
+	.loc 3 365 0
+	ldr	r3, .L644+264
+	str	r0, [r3]
+.LVL744:
+	.loc 3 366 0
+	ldrh	r0, [r2]
+	ldrh	r3, [fp]
+	ldr	fp, .L644+132
+	.loc 3 367 0
+	muls	r0, r3, r0
+.LVL745:
+	bl	ftl_malloc
+.LVL746:
+	ldr	r3, .L644+268
+	str	r0, [r3]
+.LVL747:
+	.loc 3 369 0
+	movs	r0, #6
+	.loc 3 368 0
+	ldrh	r3, [r4]
+	.loc 3 370 0
+	ldr	r4, .L644+272
+	.loc 3 369 0
+	muls	r0, r3, r0
+.LVL748:
+	bl	ftl_malloc
+.LVL749:
+	ldr	r3, .L644+276
+	str	r0, [r3]
+	.loc 3 370 0
+	ldr	r3, .L644+280
+	ldrh	r0, [r3]
+	.loc 3 371 0
+	ldrh	r3, [r8]
+	.loc 3 370 0
+	adds	r0, r0, #31
+	asrs	r0, r0, #5
+	strh	r0, [r4]	@ movhi
+.LVL750:
+	.loc 3 371 0
+	muls	r0, r3, r0
+.LVL751:
+	.loc 3 372 0
+	lsls	r0, r0, #2
+.LVL752:
+	bl	ftl_malloc
+.LVL753:
+	ldr	r2, .L644+284
+	str	r5, [sp, #4]
+	ldr	r5, .L644+124
+	mov	r1, r2
+	.loc 3 373 0
+	ldrh	r3, [r8]
+	.loc 3 372 0
+	str	r0, [r1, #28]!
+.LVL754:
+	.loc 3 374 0
+	ldrh	r0, [r4]
+	ldr	r8, .L644+140
+	ldr	lr, .L644+148
+	b	.L645
+.L646:
+	.align	2
+.L644:
+	.word	.LANCHOR71
+	.word	.LANCHOR118
+	.word	.LANCHOR72
+	.word	.LANCHOR21
+	.word	.LANCHOR68
+	.word	.LANCHOR65
+	.word	.LANCHOR96
+	.word	.LANCHOR64
+	.word	.LANCHOR124
+	.word	.LANCHOR66
+	.word	.LANCHOR67
+	.word	.LANCHOR63
+	.word	.LANCHOR73
+	.word	.LANCHOR74
+	.word	.LANCHOR76
+	.word	.LANCHOR77
+	.word	.LANCHOR78
+	.word	.LANCHOR117
+	.word	.LANCHOR89
+	.word	.LANCHOR119
+	.word	.LANCHOR86
+	.word	.LANCHOR113
+	.word	.LANCHOR101
+	.word	.LANCHOR102
+	.word	.LANCHOR84
+	.word	.LANCHOR85
+	.word	.LANCHOR87
+	.word	.LANCHOR103
+	.word	.LANCHOR105
+	.word	.LANCHOR97
+	.word	.LANCHOR100
+	.word	.LANCHOR120
+	.word	.LANCHOR121
+	.word	.LANCHOR122
+	.word	.LANCHOR93
+	.word	.LANCHOR95
+	.word	.LANCHOR23
+	.word	.LANCHOR39
+	.word	.LANCHOR123
+	.word	.LANCHOR116
+	.word	.LANCHOR114
+	.word	.LANCHOR24
+	.word	.LANCHOR92
+	.word	.LANCHOR109
+	.word	.LANCHOR115
+	.word	.LANCHOR6
+	.word	.LANCHOR125
+	.word	.LANCHOR94
+	.word	.LANCHOR126
+	.word	33553920
+	.word	.LANCHOR127
+	.word	.LANCHOR40
+	.word	.LANCHOR128
+	.word	.LANCHOR43
+	.word	.LANCHOR129
+	.word	.LANCHOR130
+	.word	.LANCHOR27
+	.word	.LANCHOR1
+	.word	.LANCHOR36
+	.word	.LANCHOR131
+	.word	.LANCHOR132
+	.word	.LANCHOR28
+	.word	.LANCHOR133
+	.word	.LANCHOR32
+	.word	.LANCHOR134
+	.word	.LANCHOR135
+	.word	.LANCHOR56
+	.word	.LANCHOR136
+	.word	.LANCHOR137
+	.word	.LANCHOR41
+	.word	.LANCHOR17
+	.word	.LANCHOR37
+	.word	.LANCHOR3
+	.word	.LANCHOR112
+	.word	.LANCHOR30
+	.word	.LANCHOR33
+	.word	.LANCHOR10
+.L645:
+	ldr	ip, .L647+100
+	lsls	r0, r0, #2
+	str	r5, [sp, #8]
+	ldr	r5, .L647
+	.loc 3 373 0
+	str	r3, [sp]
+	mov	r4, r0
+	movs	r3, #1
+	str	r5, [sp, #12]
+.LVL755:
+.L544:
+	.loc 3 373 0 is_stmt 0 discriminator 1
+	ldr	r5, [sp]
+	cmp	r3, r5
+	bcc	.L545
+	add	r3, r2, r3, lsl #2
+.LVL756:
+	ldr	r1, .L647+4
+	.loc 3 379 0 is_stmt 1
+	movs	r0, #0
+	adds	r3, r3, #24
+.L546:
+	.loc 3 377 0 discriminator 1
+	cmp	r1, r3
+	bne	.L547
+	.loc 3 383 0
+	ldr	r3, .L647+8
+	ldr	r3, [r3]
+	cbnz	r3, .L548
+.L550:
+	.loc 3 385 0
+	ldr	r1, .L647+12
+	ldr	r0, .L647+16
+	bl	printf
+.LVL757:
+	.loc 3 386 0
+	mov	r0, #-1
+.L543:
+	.loc 3 484 0
+	add	sp, sp, #16
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL758:
+.L545:
+	.cfi_restore_state
+	.loc 3 374 0 discriminator 3
+	ldr	r5, [r2, #28]
+	.loc 3 373 0 discriminator 3
+	adds	r3, r3, #1
+.LVL759:
+	.loc 3 374 0 discriminator 3
+	add	r5, r5, r4
+	add	r4, r4, r0
+	str	r5, [r1, #4]!
+	b	.L544
+.LVL760:
+.L547:
+	.loc 3 379 0 discriminator 2
+	str	r0, [r3, #4]!
+	b	.L546
+.L548:
+	.loc 3 388 0
+	ldr	r3, .L647+20
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 393 0
+	ldr	r3, .L647+24
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 398 0
+	ldr	r3, .L647+28
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 404 0
+	ldr	r3, .L647+32
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 409 0
+	ldr	r3, .L647+36
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 414 0
+	ldr	r3, .L647+40
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 419 0
+	ldr	r3, [r2, #28]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 425 0
+	ldr	r3, .L647+44
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 430 0
+	ldr	r3, .L647+48
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 430 0 is_stmt 0 discriminator 1
+	ldr	r3, [sp, #4]
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 435 0 is_stmt 1
+	ldr	r3, [sp, #8]
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 435 0 is_stmt 0 discriminator 1
+	ldr	r3, [fp]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 435 0 discriminator 2
+	ldr	r3, [r10]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 435 0 discriminator 3
+	ldr	r3, [r8]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 435 0 discriminator 4
+	ldr	r3, [sp, #12]
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 440 0 is_stmt 1
+	ldr	r3, [lr]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 440 0 is_stmt 0 discriminator 1
+	ldr	r3, [ip]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 440 0 discriminator 2
+	ldr	r3, [r7]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 440 0 discriminator 3
+	ldr	r3, [r6]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 441 0 is_stmt 1
+	ldr	r3, .L647+52
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 441 0 is_stmt 0 discriminator 1
+	ldr	r3, .L647+56
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 441 0 discriminator 2
+	ldr	r3, .L647+60
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 446 0 is_stmt 1
+	ldr	r3, .L647+64
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 446 0 is_stmt 0 discriminator 1
+	ldr	r3, .L647+68
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 446 0 discriminator 2
+	ldr	r3, .L647+72
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 452 0 is_stmt 1
+	ldr	r3, .L647+76
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 452 0 is_stmt 0 discriminator 1
+	ldr	r3, .L647+80
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 458 0 is_stmt 1
+	ldr	r3, .L647+84
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 464 0
+	ldr	r3, .L647+88
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 470 0
+	ldr	r3, .L647+92
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 476 0
+	ldr	r3, .L647+96
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 483 0
+	movs	r0, #0
+	b	.L543
+.L648:
+	.align	2
+.L647:
+	.word	.LANCHOR121
+	.word	.LANCHOR37+56
+	.word	.LANCHOR129
+	.word	.LANCHOR138
+	.word	.LC82
+	.word	.LANCHOR130
+	.word	.LANCHOR134
+	.word	.LANCHOR135
+	.word	.LANCHOR56
+	.word	.LANCHOR136
+	.word	.LANCHOR41
+	.word	.LANCHOR43
+	.word	.LANCHOR97
+	.word	.LANCHOR116
+	.word	.LANCHOR114
+	.word	.LANCHOR92
+	.word	.LANCHOR109
+	.word	.LANCHOR115
+	.word	.LANCHOR94
+	.word	.LANCHOR40
+	.word	.LANCHOR126
+	.word	.LANCHOR36
+	.word	.LANCHOR131
+	.word	.LANCHOR132
+	.word	.LANCHOR133
+	.word	.LANCHOR123
+	.cfi_endproc
+.LFE209:
+	.size	FtlMemInit, .-FtlMemInit
+	.section	.text.FtlBbt2Bitmap,"ax",%progbits
+	.align	1
+	.global	FtlBbt2Bitmap
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlBbt2Bitmap, %function
+FtlBbt2Bitmap:
+.LFB228:
+	.loc 4 66 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL761:
+	.loc 4 69 0
+	ldr	r3, .L655
+	.loc 4 66 0
+	push	{r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
+	.cfi_offset 14, -4
+	.loc 4 66 0
+	mov	r5, r0
+	.loc 4 74 0
+	ldr	r7, .L655+4
+	.loc 4 66 0
+	mov	r6, r1
+	subs	r4, r5, #2
+	addw	r5, r5, #1022
+	.loc 4 69 0
+	ldrh	r2, [r3]
+	movs	r1, #0
+.LVL762:
+	.loc 4 74 0
+	ldr	r8, .L655+12
+	.loc 4 69 0
+	mov	r0, r6
+.LVL763:
+	lsls	r2, r2, #2
+	bl	ftl_memset
+.LVL764:
+.L652:
+	.loc 4 72 0
+	ldrh	r3, [r4, #2]
+	movw	r2, #65535
+	cmp	r3, r2
+	beq	.L649
+	.loc 4 74 0
+	ldrh	r2, [r7]
+	cmp	r2, r3
+	bhi	.L651
+	.loc 4 74 0 is_stmt 0 discriminator 1
+	movs	r2, #74
+	mov	r1, r8
+	ldr	r0, .L655+8
+	bl	printf
+.LVL765:
+.L651:
+	.loc 4 75 0 is_stmt 1 discriminator 2
+	ldrh	r3, [r4, #2]!
+	movs	r2, #1
+	.loc 4 70 0 discriminator 2
+	cmp	r5, r4
+	.loc 4 75 0 discriminator 2
+	lsr	r1, r3, #5
+	and	r3, r3, #31
+	lsl	r3, r2, r3
+	ldr	r2, [r6, r1, lsl #2]
+	orr	r2, r2, r3
+	str	r2, [r6, r1, lsl #2]
+	.loc 4 70 0 discriminator 2
+	bne	.L652
+.L649:
+	pop	{r4, r5, r6, r7, r8, pc}
+.LVL766:
+.L656:
+	.align	2
+.L655:
+	.word	.LANCHOR137
+	.word	.LANCHOR17
+	.word	.LC1
+	.word	.LANCHOR139
+	.cfi_endproc
+.LFE228:
+	.size	FtlBbt2Bitmap, .-FtlBbt2Bitmap
+	.section	.text.FtlBbtMemInit,"ax",%progbits
+	.align	1
+	.global	FtlBbtMemInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlBbtMemInit, %function
+FtlBbtMemInit:
+.LFB230:
+	.loc 4 149 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	.loc 4 150 0
+	ldr	r0, .L658
+	movw	r3, #65535
+	.loc 4 152 0
+	movs	r2, #16
+	movs	r1, #255
+	.loc 4 150 0
+	strh	r3, [r0]	@ movhi
+	.loc 4 151 0
+	movs	r3, #0
+	strh	r3, [r0, #6]	@ movhi
+	.loc 4 152 0
+	adds	r0, r0, #12
+	b	ftl_memset
+.LVL767:
+.L659:
+	.align	2
+.L658:
+	.word	.LANCHOR37
+	.cfi_endproc
+.LFE230:
+	.size	FtlBbtMemInit, .-FtlBbtMemInit
+	.section	.text.FtlFreeSysBlkQueueInit,"ax",%progbits
+	.align	1
+	.global	FtlFreeSysBlkQueueInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlFreeSysBlkQueueInit, %function
+FtlFreeSysBlkQueueInit:
+.LFB240:
+	.loc 2 76 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL768:
+	.loc 2 79 0
+	ldr	r3, .L661
+	.loc 2 83 0
+	mov	r2, #2048
+	.loc 2 76 0
+	push	{r4, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 4, -8
+	.cfi_offset 14, -4
+	.loc 2 79 0
+	movs	r4, #0
+	.loc 2 83 0
+	mov	r1, r4
+	.loc 2 79 0
+	strh	r4, [r3, #2]	@ movhi
+	.loc 2 80 0
+	strh	r4, [r3, #4]	@ movhi
+	.loc 2 81 0
+	strh	r4, [r3, #6]	@ movhi
+	.loc 2 82 0
+	strh	r0, [r3], #8	@ movhi
+	.loc 2 83 0
+	mov	r0, r3
+.LVL769:
+	bl	ftl_memset
+.LVL770:
+	.loc 2 85 0
+	mov	r0, r4
+	pop	{r4, pc}
+.L662:
+	.align	2
+.L661:
+	.word	.LANCHOR38
+	.cfi_endproc
+.LFE240:
+	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
+	.section	.text.load_l2p_region,"ax",%progbits
+	.align	1
+	.global	load_l2p_region
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	load_l2p_region, %function
+load_l2p_region:
+.LFB256:
+	.loc 2 442 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL771:
+	.loc 2 446 0
+	ldr	r3, .L669
+	.loc 2 442 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 442 0
+	mov	r5, r0
+	mov	r10, r1
+	.loc 2 446 0
+	ldrh	r2, [r3]
+	str	r3, [sp, #4]
+	cmp	r2, r0
+	bcs	.L664
+	.loc 2 446 0 is_stmt 0 discriminator 1
+	mov	r2, #446
+	ldr	r1, .L669+4
+.LVL772:
+	ldr	r0, .L669+8
+.LVL773:
+	bl	printf
+.LVL774:
+.L664:
+	.loc 2 447 0 is_stmt 1
+	ldr	fp, .L669+40
+	movs	r4, #12
+	ldr	r7, .L669+12
+	ldr	r3, [fp]
+	ldr	r8, [r3, r5, lsl #2]
+.LVL775:
+	.loc 2 449 0
+	cmp	r8, #0
+	bne	.L665
+	.loc 2 450 0
+	mul	r4, r4, r10
+	ldr	r2, [r7]
+	movs	r1, #255
+	adds	r0, r2, r4
+	ldr	r2, .L669+16
+	ldr	r0, [r0, #8]
+	ldrh	r2, [r2]
+	bl	ftl_memset
+.LVL776:
+	.loc 2 451 0
+	ldr	r2, [r7]
+	adds	r1, r2, r4
+	strh	r5, [r2, r4]	@ movhi
+	.loc 2 452 0
+	str	r8, [r1, #4]
+.L666:
+	.loc 2 473 0
+	movs	r0, #0
+	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL777:
+.L665:
+	.cfi_restore_state
+	.loc 2 456 0
+	mul	r4, r4, r10
+	ldr	r2, [r7]
+	.loc 2 455 0
+	ldr	r6, .L669+20
+	.loc 2 456 0
+	add	r2, r2, r4
+	.loc 2 458 0
+	mov	r0, r6
+	.loc 2 456 0
+	ldr	r2, [r2, #8]
+	.loc 2 455 0
+	str	r8, [r6, #4]
+	.loc 2 456 0
+	str	r2, [r6, #8]
+	.loc 2 457 0
+	ldr	r2, .L669+24
+	ldr	r2, [r2]
+	str	r2, [r6, #12]
+	.loc 2 458 0
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+.LVL778:
+	.loc 2 459 0
+	ldr	r10, [r6, #12]
+.LVL779:
+	.loc 2 461 0
+	ldrh	r2, [r10, #8]
+	cmp	r2, r5
+	beq	.L667
+	.loc 2 462 0
+	mov	r2, r8
+	mov	r1, r5
+	ldr	r0, .L669+28
+	bl	printf
+.LVL780:
+	.loc 2 463 0
+	movs	r3, #4
+	ldr	r1, [r6, #12]
+	mov	r2, r3
+	ldr	r0, .L669+32
+	bl	rknand_print_hex
+.LVL781:
+	.loc 2 464 0
+	ldr	r3, [sp, #4]
+	movs	r2, #4
+	ldr	r1, [fp]
+	ldr	r0, .L669+36
+	ldrh	r3, [r3]
+	bl	rknand_print_hex
+.LVL782:
+.L667:
+	.loc 2 467 0
+	ldrh	r3, [r10, #8]
+	cmp	r3, r5
+	beq	.L668
+	.loc 2 467 0 is_stmt 0 discriminator 1
+	movw	r2, #467
+	ldr	r1, .L669+4
+	ldr	r0, .L669+8
+	bl	printf
+.LVL783:
+.L668:
+	.loc 2 470 0 is_stmt 1
+	ldr	r3, [r7]
+	movs	r1, #0
+	adds	r2, r3, r4
+	str	r1, [r2, #4]
+	.loc 2 471 0
+	strh	r5, [r3, r4]	@ movhi
+	.loc 2 472 0
+	b	.L666
+.L670:
+	.align	2
+.L669:
+	.word	.LANCHOR32
+	.word	.LANCHOR140
+	.word	.LC1
+	.word	.LANCHOR56
+	.word	.LANCHOR23
+	.word	.LANCHOR108
+	.word	.LANCHOR109
+	.word	.LC83
+	.word	.LC84
+	.word	.LC85
+	.word	.LANCHOR134
+	.cfi_endproc
+.LFE256:
+	.size	load_l2p_region, .-load_l2p_region
+	.section	.text.ftl_free_no_use_map_blk,"ax",%progbits
+	.align	1
+	.global	ftl_free_no_use_map_blk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_free_no_use_map_blk, %function
+ftl_free_no_use_map_blk:
+.LFB257:
+	.loc 2 476 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL784:
+	.loc 2 485 0
+	ldrh	r2, [r0, #10]
+	.loc 2 476 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 476 0
+	mov	r4, r0
+	.loc 2 479 0
+	ldr	r5, [r0, #20]
+	.loc 2 485 0
+	movs	r1, #0
+	.loc 2 477 0
+	ldr	r10, [r0, #12]
+.LVL785:
+	.loc 2 485 0
+	lsls	r2, r2, #1
+	.loc 2 478 0
+	ldr	r6, [r0, #24]
+.LVL786:
+	.loc 2 485 0
+	mov	r0, r5
+.LVL787:
+	bl	ftl_memset
+.LVL788:
+	.loc 2 486 0
+	movs	r3, #0
+.LVL789:
+.L672:
+	.loc 2 486 0 is_stmt 0 discriminator 1
+	ldrh	r1, [r4, #6]
+	uxth	r2, r3
+	cmp	r1, r2
+	bhi	.L676
+	.loc 2 494 0 is_stmt 1
+	ldrh	r3, [r5]
+.LVL790:
+	.loc 2 497 0
+	movs	r6, #0
+.LVL791:
+	.loc 2 498 0
+	ldr	r2, .L685
+.LVL792:
+	.loc 2 495 0
+	mov	fp, r6
+.LVL793:
+.L677:
+	.loc 2 497 0 discriminator 1
+	ldrh	r0, [r4, #10]
+	uxth	r1, r6
+.LVL794:
+	cmp	r0, r1
+	bhi	.L681
+	.loc 2 513 0
+	mov	r0, fp
+	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL795:
+.L676:
+	.cfi_restore_state
+	.loc 2 487 0
+	uxth	r2, r3
+	ldr	r1, [r6, r2, lsl #2]
+	.loc 2 488 0
+	movs	r2, #0
+	.loc 2 487 0
+	ubfx	r1, r1, #10, #16
+.LVL796:
+.L673:
+	.loc 2 488 0 discriminator 1
+	ldrh	r7, [r4, #10]
+	uxth	r0, r2
+	cmp	r7, r0
+	bhi	.L675
+.LVL797:
+	adds	r3, r3, #1
+.LVL798:
+	b	.L672
+.LVL799:
+.L675:
+	.loc 2 489 0
+	uxth	r0, r2
+	adds	r2, r2, #1
+.LVL800:
+	ldrh	r7, [r10, r0, lsl #1]
+	cmp	r7, r1
+	.loc 2 490 0
+	ittt	eq
+	ldrheq	r7, [r5, r0, lsl #1]
+	addeq	r7, r7, #1
+	strheq	r7, [r5, r0, lsl #1]	@ movhi
+.LVL801:
+	b	.L673
+.LVL802:
+.L681:
+	.loc 2 498 0
+	ldrh	r0, [r4]
+	uxth	r7, r6
+	cmp	r0, r1
+	bne	.L678
+	.loc 2 498 0 is_stmt 0 discriminator 1
+	ldrh	r0, [r2]
+	ldrh	ip, [r4, #2]
+	cmp	ip, r0
+	.loc 2 499 0 is_stmt 1 discriminator 1
+	it	cc
+	strhcc	r0, [r5, r7, lsl #1]	@ movhi
+.L678:
+	.loc 2 500 0
+	ldrh	r8, [r5, r7, lsl #1]
+	cmp	r3, r8
+	itt	hi
+	movhi	fp, r1
+	movhi	r3, r8
+.LVL803:
+	.loc 2 504 0
+	cmp	r8, #0
+	bne	.L680
+	.loc 2 504 0 is_stmt 0 discriminator 1
+	ldrh	r0, [r10, r7, lsl #1]
+	cbz	r0, .L680
+	.loc 2 506 0 is_stmt 1
+	movs	r1, #1
+.LVL804:
+	str	r2, [sp, #4]
+	str	r3, [sp]
+	bl	FtlFreeSysBlkQueueIn
+.LVL805:
+	.loc 2 507 0
+	strh	r8, [r10, r7, lsl #1]	@ movhi
+	.loc 2 508 0
+	ldr	r2, [sp, #4]
+	ldrh	r1, [r4, #8]
+	ldr	r3, [sp]
+	subs	r1, r1, #1
+	strh	r1, [r4, #8]	@ movhi
+.LVL806:
+.L680:
+	adds	r6, r6, #1
+.LVL807:
+	b	.L677
+.L686:
+	.align	2
+.L685:
+	.word	.LANCHOR20
+	.cfi_endproc
+.LFE257:
+	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
+	.section	.text.Ftl_write_map_blk_to_last_page,"ax",%progbits
+	.align	1
+	.global	Ftl_write_map_blk_to_last_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	Ftl_write_map_blk_to_last_page, %function
+Ftl_write_map_blk_to_last_page:
+.LFB260:
+	.loc 2 583 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL808:
+	push	{r3, r4, r5, r6, r7, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 3, -24
+	.cfi_offset 4, -20
+	.cfi_offset 5, -16
+	.cfi_offset 6, -12
+	.cfi_offset 7, -8
+	.cfi_offset 14, -4
+	.loc 2 591 0
+	movw	r2, #65535
+	ldrh	r3, [r0]
+	.loc 2 583 0
+	mov	r4, r0
+	.loc 2 586 0
+	ldr	r5, [r0, #12]
+.LVL809:
+	.loc 2 591 0
+	cmp	r3, r2
+	bne	.L688
+	.loc 2 592 0
+	ldrh	r3, [r0, #8]
+	cbz	r3, .L689
+	.loc 2 592 0 is_stmt 0 discriminator 1
+	mov	r2, #592
+	ldr	r1, .L697
+	ldr	r0, .L697+4
+.LVL810:
+	bl	printf
+.LVL811:
+.L689:
+	.loc 2 593 0 is_stmt 1
+	ldrh	r3, [r4, #8]
+	adds	r3, r3, #1
+	strh	r3, [r4, #8]	@ movhi
+	.loc 2 594 0
+	bl	FtlFreeSysBlkQueueOut
+.LVL812:
+	.loc 2 595 0
+	movs	r3, #0
+	.loc 2 594 0
+	strh	r0, [r5]	@ movhi
+	.loc 2 595 0
+	strh	r3, [r4, #2]	@ movhi
+	.loc 2 596 0
+	strh	r3, [r4]	@ movhi
+	.loc 2 597 0
+	ldr	r3, [r4, #28]
+	adds	r3, r3, #1
+	str	r3, [r4, #28]
+.LVL813:
+.L690:
+	.loc 2 628 0
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, pc}
+.LVL814:
+.L688:
+	.loc 2 601 0
+	ldrh	r5, [r5, r3, lsl #1]
+.LVL815:
+	.loc 2 612 0
+	movs	r1, #255
+	.loc 2 602 0
+	ldrh	r3, [r0, #2]
+	ldr	r2, .L697+8
+	.loc 2 603 0
+	ldr	r7, .L697+12
+	.loc 2 587 0
+	ldr	r6, [r0, #24]
+	.loc 2 602 0
+	orr	r3, r3, r5, lsl #10
+	.loc 2 603 0
+	ldr	r0, [r7]
+.LVL816:
+	.loc 2 602 0
+	str	r3, [r2, #4]
+	.loc 2 604 0
+	ldr	r3, .L697+16
+	.loc 2 603 0
+	str	r0, [r2, #8]
+	.loc 2 604 0
+	ldr	r3, [r3]
+	str	r3, [r2, #12]
+.LVL817:
+	.loc 2 607 0
+	ldr	r2, [r4, #28]
+	str	r2, [r3, #4]
+	.loc 2 608 0
+	movw	r2, #64245
+	strh	r2, [r3, #8]	@ movhi
+	.loc 2 609 0
+	ldrh	r2, [r4, #4]
+	.loc 2 610 0
+	strh	r5, [r3, #2]	@ movhi
+	.loc 2 609 0
+	strh	r2, [r3]	@ movhi
+	.loc 2 612 0
+	ldr	r3, .L697+20
+.LVL818:
+	ldrh	r2, [r3]
+	lsls	r2, r2, #3
+	bl	ftl_memset
+.LVL819:
+	.loc 2 614 0
+	ldrh	ip, [r4, #6]
+	movs	r3, #0
+	.loc 2 617 0
+	ldr	r1, [r7]
+	.loc 2 613 0
+	mov	r2, r3
+.LVL820:
+.L691:
+	.loc 2 614 0 discriminator 1
+	uxth	r0, r3
+	cmp	ip, r0
+	bhi	.L693
+	.loc 2 621 0
+	movs	r2, #1
+.LVL821:
+	movs	r3, #0
+.LVL822:
+	mov	r1, r2
+	ldr	r0, .L697+8
+.LVL823:
+	bl	FlashProgPages
+.LVL824:
+	.loc 2 622 0
+	ldrh	r3, [r4, #2]
+	.loc 2 626 0
+	mov	r0, r4
+	.loc 2 622 0
+	adds	r3, r3, #1
+	strh	r3, [r4, #2]	@ movhi
+	.loc 2 626 0
+	bl	ftl_map_blk_gc
+.LVL825:
+	.loc 2 627 0
+	b	.L690
+.LVL826:
+.L693:
+	.loc 2 615 0
+	ldr	r0, [r6, r3, lsl #2]
+	cmp	r5, r0, lsr #10
+	bne	.L692
+	.loc 2 616 0
+	adds	r2, r2, #1
+.LVL827:
+	uxth	r2, r2
+.LVL828:
+	.loc 2 617 0
+	str	r3, [r1, r2, lsl #3]
+	.loc 2 618 0
+	add	r7, r1, r2, lsl #3
+	ldr	r0, [r6, r3, lsl #2]
+	str	r0, [r7, #4]
+.L692:
+.LVL829:
+	adds	r3, r3, #1
+.LVL830:
+	b	.L691
+.L698:
+	.align	2
+.L697:
+	.word	.LANCHOR141
+	.word	.LC1
+	.word	.LANCHOR108
+	.word	.LANCHOR39
+	.word	.LANCHOR109
+	.word	.LANCHOR20
+	.cfi_endproc
+.LFE260:
+	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
+	.section	.text.FtlMapWritePage,"ax",%progbits
+	.align	1
+	.global	FtlMapWritePage
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlMapWritePage, %function
+FtlMapWritePage:
+.LFB261:
+	.loc 2 631 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL831:
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 631 0
+	mov	r4, r0
+	.loc 2 638 0
+	ldr	r8, .L718+28
+	.loc 2 631 0
+	mov	r7, r1
+	.loc 2 634 0
+	movs	r6, #0
+	.loc 2 631 0
+	str	r2, [sp, #4]
+	mov	fp, r8
+.LVL832:
+.L700:
+	.loc 2 637 0
+	ldr	r2, .L718
+	ldr	r3, [r2]
+	adds	r3, r3, #1
+	str	r3, [r2]
+	.loc 2 638 0
+	ldrh	r3, [r8]
+	ldrh	r2, [r4, #2]
+	subs	r3, r3, #1
+	cmp	r2, r3
+	bge	.L701
+	.loc 2 638 0 is_stmt 0 discriminator 1
+	ldrh	r2, [r4]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L702
+.L701:
+	.loc 2 639 0 is_stmt 1
+	mov	r0, r4
+	bl	Ftl_write_map_blk_to_last_page
+.LVL833:
+.L702:
+	.loc 2 650 0
+	ldrh	r2, [r4]
+	ldr	r3, [r4, #12]
+	ldrh	r3, [r3, r2, lsl #1]
+	cbnz	r3, .L703
+	.loc 2 650 0 is_stmt 0 discriminator 1
+	movw	r2, #650
+	ldr	r1, .L718+4
+	ldr	r0, .L718+8
+	bl	printf
+.LVL834:
+.L703:
+	.loc 2 651 0 is_stmt 1
+	ldrh	r2, [r4]
+	ldrh	r3, [r4, #10]
+	cmp	r2, r3
+	bcc	.L704
+	.loc 2 651 0 is_stmt 0 discriminator 1
+	movw	r2, #651
+	ldr	r1, .L718+4
+	ldr	r0, .L718+8
+	bl	printf
+.LVL835:
+.L704:
+	.loc 2 652 0 is_stmt 1
+	ldrh	r2, [r4]
+	.loc 2 658 0
+	movs	r1, #0
+	.loc 2 652 0
+	ldr	r3, [r4, #12]
+	.loc 2 654 0
+	ldr	r5, .L718+12
+	.loc 2 652 0
+	ldrh	r10, [r3, r2, lsl #1]
+.LVL836:
+	.loc 2 654 0
+	ldrh	r2, [r4, #2]
+	.loc 2 655 0
+	ldr	r3, [sp, #4]
+	.loc 2 654 0
+	orr	r2, r2, r10, lsl #10
+	.loc 2 655 0
+	str	r3, [r5, #8]
+	.loc 2 654 0
+	str	r2, [r5, #4]
+	.loc 2 656 0
+	ldr	r2, .L718+16
+	ldr	r0, [r2]
+	.loc 2 658 0
+	movs	r2, #16
+	.loc 2 656 0
+	str	r0, [r5, #12]
+	.loc 2 658 0
+	bl	ftl_memset
+.LVL837:
+	.loc 2 659 0
+	ldr	r2, [r5, #12]
+.LVL838:
+	.loc 2 664 0
+	movs	r3, #1
+	.loc 2 660 0
+	ldr	r1, [r4, #28]
+	.loc 2 664 0
+	mov	r0, r5
+	.loc 2 661 0
+	strh	r7, [r2, #8]	@ movhi
+	.loc 2 660 0
+	str	r1, [r2, #4]
+	.loc 2 662 0
+	ldrh	r1, [r4, #4]
+	.loc 2 663 0
+	strh	r10, [r2, #2]	@ movhi
+	.loc 2 662 0
+	strh	r1, [r2]	@ movhi
+	.loc 2 664 0
+	mov	r2, r3
+.LVL839:
+	mov	r1, r3
+	bl	FlashProgPages
+.LVL840:
+	.loc 2 665 0
+	ldrh	r2, [r4, #2]
+	.loc 2 667 0
+	ldr	r3, [r5]
+	.loc 2 665 0
+	adds	r2, r2, #1
+	uxth	r2, r2
+	.loc 2 667 0
+	adds	r3, r3, #1
+	.loc 2 665 0
+	strh	r2, [r4, #2]	@ movhi
+	.loc 2 667 0
+	bne	.L705
+	.loc 2 668 0
+	ldr	r1, [r5, #4]
+	.loc 2 669 0
+	adds	r6, r6, #1
+.LVL841:
+	.loc 2 668 0
+	ldr	r0, .L718+20
+	.loc 2 669 0
+	uxth	r6, r6
+	.loc 2 668 0
+	bl	printf
+.LVL842:
+	.loc 2 670 0
+	ldrh	r2, [r4, #2]
+	cmp	r2, #2
+	.loc 2 671 0
+	ittt	ls
+	ldrhls	r2, [fp]
+	addls	r2, r2, #-1
+	strhls	r2, [r4, #2]	@ movhi
+	.loc 2 673 0
+	cmp	r6, #3
+	bls	.L707
+	.loc 2 674 0
+	mov	r2, r6
+	ldr	r1, [r5, #4]
+	ldr	r0, .L718+24
+	bl	printf
+.LVL843:
+.L708:
+	b	.L708
+.L707:
+	.loc 2 678 0
+	ldr	r3, [r4, #32]
+	cmp	r3, #0
+	beq	.L700
+.L717:
+	b	.L717
+.L705:
+	.loc 2 682 0
+	cmp	r2, #1
+	beq	.L700
+	.loc 2 685 0
+	ldr	r2, [r5, #4]
+	.loc 2 687 0
+	movs	r0, #0
+	.loc 2 685 0
+	ldr	r3, [r4, #24]
+	str	r2, [r3, r7, lsl #2]
+	.loc 2 687 0
+	add	sp, sp, #8
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL844:
+.L719:
+	.align	2
+.L718:
+	.word	.LANCHOR67
+	.word	.LANCHOR142
+	.word	.LC1
+	.word	.LANCHOR108
+	.word	.LANCHOR109
+	.word	.LC86
+	.word	.LC87
+	.word	.LANCHOR20
+	.cfi_endproc
+.LFE261:
+	.size	FtlMapWritePage, .-FtlMapWritePage
+	.section	.text.ftl_map_blk_gc,"ax",%progbits
+	.align	1
+	.global	ftl_map_blk_gc
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_map_blk_gc, %function
+ftl_map_blk_gc:
+.LFB259:
+	.loc 2 537 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL845:
+	.loc 2 542 0
+	ldr	r3, [r0, #24]
+	.loc 2 537 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 537 0
+	mov	r4, r0
+	.loc 2 541 0
+	ldr	r5, [r0, #12]
+.LVL846:
+	.loc 2 542 0
+	str	r3, [sp]
+.LVL847:
+	.loc 2 545 0
+	bl	ftl_free_no_use_map_blk
+.LVL848:
+	.loc 2 547 0
+	ldrh	r3, [r4, #10]
+	ldrh	r2, [r4, #8]
+	subs	r3, r3, #4
+	cmp	r2, r3
+	blt	.L721
+	.loc 2 548 0
+	uxth	r0, r0
+	ldrh	r7, [r5, r0, lsl #1]
+.LVL849:
+	.loc 2 549 0
+	cbz	r7, .L721
+	.loc 2 549 0 is_stmt 0 discriminator 1
+	ldr	r3, [r4, #32]
+	cbnz	r3, .L721
+	.loc 2 550 0 is_stmt 1
+	movs	r2, #1
+	str	r2, [r4, #32]
+	.loc 2 551 0
+	strh	r3, [r5, r0, lsl #1]	@ movhi
+	.loc 2 552 0
+	ldrh	r3, [r4, #8]
+	.loc 2 553 0
+	ldrh	r2, [r4, #2]
+	.loc 2 552 0
+	subs	r3, r3, #1
+	strh	r3, [r4, #8]	@ movhi
+	.loc 2 553 0
+	ldr	r3, .L732
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L722
+	.loc 2 554 0
+	mov	r0, r4
+.LVL850:
+	bl	ftl_map_blk_alloc_new_blk
+.LVL851:
+.L722:
+	.loc 2 558 0 discriminator 1
+	ldr	r5, .L732+4
+.LVL852:
+	.loc 2 537 0 discriminator 1
+	movs	r6, #0
+	.loc 2 558 0 discriminator 1
+	ldr	fp, .L732+20
+.L723:
+	.loc 2 556 0 discriminator 1
+	ldrh	r3, [r4, #6]
+	uxth	r10, r6
+.LVL853:
+	cmp	r3, r10
+	bhi	.L727
+	.loc 2 572 0
+	movs	r1, #1
+	mov	r0, r7
+	bl	FtlFreeSysBlkQueueIn
+.LVL854:
+	.loc 2 573 0
+	movs	r3, #0
+	str	r3, [r4, #32]
+.LVL855:
+.L721:
+	.loc 2 577 0
+	ldr	r3, .L732
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L728
+	.loc 2 578 0
+	mov	r0, r4
+	bl	ftl_map_blk_alloc_new_blk
+.LVL856:
+.L728:
+	.loc 2 580 0
+	movs	r0, #0
+	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+.LVL857:
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL858:
+.L727:
+	.cfi_restore_state
+	.loc 2 557 0
+	ldr	r3, [sp]
+	uxth	r8, r6
+	ldr	r2, [r3, r8, lsl #2]
+	cmp	r7, r2, lsr #10
+	bne	.L724
+	.loc 2 558 0
+	ldr	r3, [fp]
+	.loc 2 560 0
+	str	r2, [r5, #4]
+.LVL859:
+	.loc 2 562 0
+	movs	r2, #1
+	mov	r1, r2
+	ldr	r0, .L732+4
+	.loc 2 558 0
+	str	r3, [r5, #8]
+	.loc 2 559 0
+	ldr	r3, .L732+8
+	ldr	r3, [r3]
+	str	r3, [r5, #12]
+	str	r3, [sp, #4]
+.LVL860:
+	.loc 2 562 0
+	bl	FlashReadPages
+.LVL861:
+	.loc 2 564 0
+	ldr	r3, [sp, #4]
+	ldrh	r3, [r3, #8]
+	cmp	r3, r10
+	beq	.L725
+	.loc 2 564 0 is_stmt 0 discriminator 1
+	mov	r2, #564
+	ldr	r1, .L732+12
+	ldr	r0, .L732+16
+	bl	printf
+.LVL862:
+.L725:
+	.loc 2 565 0 is_stmt 1
+	ldr	r3, [r5]
+	adds	r3, r3, #1
+	bne	.L726
+	.loc 2 566 0
+	ldr	r2, [sp]
+	movs	r3, #0
+	str	r3, [r2, r8, lsl #2]
+.L724:
+.LVL863:
+	adds	r6, r6, #1
+.LVL864:
+	b	.L723
+.LVL865:
+.L726:
+	.loc 2 568 0
+	ldr	r2, [r5, #8]
+	mov	r1, r8
+	mov	r0, r4
+	bl	FtlMapWritePage
+.LVL866:
+	b	.L724
+.L733:
+	.align	2
+.L732:
+	.word	.LANCHOR20
+	.word	.LANCHOR108
+	.word	.LANCHOR109
+	.word	.LANCHOR143
+	.word	.LC1
+	.word	.LANCHOR123
+	.cfi_endproc
+.LFE259:
+	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
+	.section	.text.flush_l2p_region,"ax",%progbits
+	.align	1
+	.global	flush_l2p_region
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flush_l2p_region, %function
+flush_l2p_region:
+.LFB262:
+	.loc 2 690 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL867:
+	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 2 693 0
+	movs	r4, #12
+	ldr	r5, .L735
+	muls	r4, r0, r4
+	.loc 2 694 0
+	ldr	r0, .L735+4
+.LVL868:
+	.loc 2 693 0
+	ldr	r3, [r5]
+	adds	r2, r3, r4
+.LVL869:
+	.loc 2 694 0
+	ldrh	r1, [r3, r4]
+.LVL870:
+	ldr	r2, [r2, #8]
+	bl	FtlMapWritePage
+.LVL871:
+	.loc 2 695 0
+	ldr	r3, [r5]
+	.loc 2 697 0
+	movs	r0, #0
+	.loc 2 695 0
+	add	r4, r4, r3
+	ldr	r3, [r4, #4]
+	bic	r3, r3, #-2147483648
+	str	r3, [r4, #4]
+	.loc 2 697 0
+	pop	{r3, r4, r5, pc}
+.L736:
+	.align	2
+.L735:
+	.word	.LANCHOR56
+	.word	.LANCHOR144
+	.cfi_endproc
+.LFE262:
+	.size	flush_l2p_region, .-flush_l2p_region
+	.section	.text.log2phys,"ax",%progbits
+	.align	1
+	.global	log2phys
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	log2phys, %function
+log2phys:
+.LFB265:
+	.loc 2 753 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL872:
+	.loc 2 756 0
+	ldr	r3, .L751
+	.loc 2 753 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 753 0
+	mov	r7, r1
+	mov	r10, r2
+	.loc 2 756 0
+	ldrh	r4, [r3]
+	adds	r3, r4, #7
+	.loc 2 757 0
+	movs	r4, #1
+	.loc 2 756 0
+	lsr	r8, r0, r3
+	.loc 2 757 0
+	lsls	r4, r4, r3
+	.loc 2 759 0
+	ldr	r3, .L751+4
+	.loc 2 757 0
+	subs	r4, r4, #1
+	.loc 2 756 0
+	uxth	r8, r8
+.LVL873:
+	.loc 2 757 0
+	ands	r4, r4, r0
+	.loc 2 759 0
+	ldr	r3, [r3]
+	.loc 2 757 0
+	uxth	r4, r4
+.LVL874:
+	.loc 2 759 0
+	cmp	r0, r3
+	bcc	.L738
+	.loc 2 759 0 is_stmt 0 discriminator 1
+	movw	r2, #759
+.LVL875:
+	ldr	r1, .L751+8
+.LVL876:
+	ldr	r0, .L751+12
+.LVL877:
+	bl	printf
+.LVL878:
+.L738:
+	.loc 2 762 0 is_stmt 1
+	ldr	r6, .L751+16
+	mov	fp, #12
+	.loc 2 761 0
+	ldr	r3, .L751+20
+	.loc 2 762 0
+	ldr	r1, [r6]
+	.loc 2 761 0
+	ldrh	r2, [r3]
+	movs	r3, #0
+.LVL879:
+.L739:
+	uxth	r5, r3
+.LVL880:
+	.loc 2 761 0 is_stmt 0 discriminator 1
+	cmp	r5, r2
+	bcc	.L744
+	.loc 2 776 0 is_stmt 1
+	bl	select_l2p_ram_region
+.LVL881:
+	.loc 2 777 0
+	mul	fp, fp, r0
+	ldr	r3, [r6]
+	.loc 2 776 0
+	mov	r5, r0
+.LVL882:
+	.loc 2 777 0
+	ldrh	r1, [r3, fp]
+	add	r2, r3, fp
+	movw	r3, #65535
+	cmp	r1, r3
+	beq	.L745
+	.loc 2 777 0 is_stmt 0 discriminator 1
+	ldr	r3, [r2, #4]
+	cmp	r3, #0
+	bge	.L745
+	.loc 2 778 0 is_stmt 1
+	bl	flush_l2p_region
+.LVL883:
+.L745:
+	.loc 2 781 0
+	mov	r1, r5
+	mov	r0, r8
+	bl	load_l2p_region
+.LVL884:
+	.loc 2 782 0
+	b	.L740
+.LVL885:
+.L744:
+	adds	r3, r3, #1
+	.loc 2 762 0
+	mla	r0, fp, r3, r1
+	ldrh	r0, [r0, #-12]
+	cmp	r0, r8
+	bne	.L739
+.LVL886:
+.L740:
+	.loc 2 765 0
+	ldr	r2, [r6]
+	movs	r3, #12
+	mla	r3, r3, r5, r2
+	.loc 2 764 0
+	cmp	r10, #0
+	bne	.L741
+	.loc 2 765 0
+	ldr	r3, [r3, #8]
+	ldr	r3, [r3, r4, lsl #2]
+	str	r3, [r7]
+.L742:
+	.loc 2 771 0
+	ldr	r2, [r6]
+	movs	r3, #12
+	mla	r5, r3, r5, r2
+.LVL887:
+	ldr	r3, [r5, #4]
+	adds	r2, r3, #1
+	beq	.L748
+	.loc 2 772 0
+	adds	r3, r3, #1
+	str	r3, [r5, #4]
+.L748:
+	.loc 2 783 0
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL888:
+.L741:
+	.loc 2 767 0
+	ldr	r1, [r7]
+	ldr	r2, [r3, #8]
+	str	r1, [r2, r4, lsl #2]
+	.loc 2 768 0
+	ldr	r2, [r3, #4]
+	orr	r2, r2, #-2147483648
+	str	r2, [r3, #4]
+	.loc 2 769 0
+	ldr	r3, .L751+24
+	strh	r8, [r3]	@ movhi
+	b	.L742
+.L752:
+	.align	2
+.L751:
+	.word	.LANCHOR22
+	.word	.LANCHOR62
+	.word	.LANCHOR145
+	.word	.LC1
+	.word	.LANCHOR56
+	.word	.LANCHOR33
+	.word	.LANCHOR57
+	.cfi_endproc
+.LFE265:
+	.size	log2phys, .-log2phys
+	.section	.text.FtlReUsePrevPpa,"ax",%progbits
+	.align	1
+	.global	FtlReUsePrevPpa
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlReUsePrevPpa, %function
+FtlReUsePrevPpa:
+.LFB283:
+	.loc 2 1628 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL889:
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
+	.cfi_offset 14, -4
+	.loc 2 1628 0
+	mov	r6, r0
+	.loc 2 1631 0
+	ldr	r5, .L763
+	.loc 2 1629 0
+	ubfx	r0, r1, #10, #16
+.LVL890:
+	.loc 2 1628 0
+	str	r1, [sp, #4]
+	.loc 2 1629 0
+	bl	P2V_block_in_plane
+.LVL891:
+	.loc 2 1631 0
+	ldr	r2, [r5]
+	.loc 2 1629 0
+	mov	r7, r0
+.LVL892:
+	.loc 2 1631 0
+	ldrh	r3, [r2, r0, lsl #1]
+	cbnz	r3, .L754
+	.loc 2 1632 0
+	ldr	r2, .L763+4
+	ldr	r4, [r2]
+	cmp	r4, #0
+	beq	.L755
+.LBB225:
+	.loc 2 1636 0
+	ldr	r2, .L763+8
+	.loc 2 1644 0
+	movw	lr, #65535
+	.loc 2 1636 0
+	ldr	ip, .L763+24
+	.loc 2 1635 0
+	ldr	r0, .L763+12
+.LVL893:
+	.loc 2 1636 0
+	ldr	r2, [r2]
+	.loc 2 1635 0
+	ldrh	r1, [r0]
+.LVL894:
+	mov	r8, r0
+	.loc 2 1636 0
+	subs	r4, r4, r2
+	asrs	r4, r4, #1
+	mul	r4, ip, r4
+	.loc 2 1644 0
+	mov	ip, #6
+	.loc 2 1636 0
+	uxth	r4, r4
+.LVL895:
+.L756:
+	.loc 2 1637 0 discriminator 1
+	uxth	r0, r3
+	cmp	r1, r0
+	bls	.L755
+	.loc 2 1638 0
+	cmp	r4, r7
+	bne	.L757
+	.loc 2 1639 0
+	mov	r1, r4
+.LVL896:
+	ldr	r0, .L763+4
+	bl	List_remove_node
+.LVL897:
+	ldrh	r3, [r8]
+	cbnz	r3, .L758
+	.loc 2 1639 0 is_stmt 0 discriminator 1
+	movw	r2, #1639
+	ldr	r1, .L763+16
+	ldr	r0, .L763+20
+	bl	printf
+.LVL898:
+.L758:
+	.loc 2 1639 0 discriminator 3
+	ldrh	r3, [r8]
+	.loc 2 1640 0 is_stmt 1 discriminator 3
+	mov	r0, r4
+	.loc 2 1639 0 discriminator 3
+	subs	r3, r3, #1
+	strh	r3, [r8]	@ movhi
+	.loc 2 1640 0 discriminator 3
+	bl	INSERT_DATA_LIST
+.LVL899:
+	.loc 2 1641 0 discriminator 3
+	ldr	r2, [r5]
+	ldrh	r3, [r2, r7, lsl #1]
+.LVL900:
+.L754:
+.LBE225:
+	.loc 2 1650 0
+	adds	r3, r3, #1
+	strh	r3, [r2, r7, lsl #1]	@ movhi
+	b	.L755
+.LVL901:
+.L757:
+.LBB226:
+	.loc 2 1644 0
+	mul	r4, ip, r4
+.LVL902:
+	adds	r3, r3, #1
+.LVL903:
+	ldrh	r4, [r2, r4]
+	cmp	r4, lr
+	bne	.L756
+.LVL904:
+.L755:
+.LBE226:
+	.loc 2 1652 0
+	movs	r2, #1
+	add	r1, sp, #4
+	mov	r0, r6
+	bl	log2phys
+.LVL905:
+	.loc 2 1653 0
+	add	sp, sp, #8
+	.cfi_def_cfa_offset 24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.LVL906:
+.L764:
+	.align	2
+.L763:
+	.word	.LANCHOR43
+	.word	.LANCHOR47
+	.word	.LANCHOR41
+	.word	.LANCHOR48
+	.word	.LANCHOR146
+	.word	.LC1
+	.word	-1431655765
+	.cfi_endproc
+.LFE283:
+	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
+	.section	.text.ftl_scan_all_data,"ax",%progbits
+	.align	1
+	.global	ftl_scan_all_data
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_scan_all_data, %function
+ftl_scan_all_data:
+.LFB294:
+	.loc 2 2275 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
+	.cfi_offset 14, -4
+	.loc 2 2281 0
+	movs	r5, #0
+	ldr	r7, .L779
+	.loc 2 2275 0
+	sub	sp, sp, #32
+	.cfi_def_cfa_offset 56
+	.loc 2 2280 0
+	movs	r1, #0
+	.loc 2 2284 0
+	ldr	r8, .L779+24
+	.loc 2 2280 0
+	ldr	r0, .L779+4
+	bl	printf
+.LVL907:
+.L766:
+	.loc 2 2281 0 discriminator 1
+	ldr	r3, [r7]
+	cmp	r5, r3
+	bcc	.L772
+	.loc 2 2303 0
+	add	sp, sp, #32
+	.cfi_remember_state
+	.cfi_def_cfa_offset 24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.LVL908:
+.L772:
+	.cfi_restore_state
+	.loc 2 2282 0
+	movs	r2, #0
+	add	r1, sp, #28
+	mov	r0, r5
+	bl	log2phys
+.LVL909:
+	.loc 2 2283 0
+	ubfx	r3, r5, #0, #11
+	cbnz	r3, .L767
+	.loc 2 2284 0
+	ldr	r2, [sp, #28]
+	mov	r1, r5
+	mov	r0, r8
+	bl	printf
+.LVL910:
+.L767:
+	.loc 2 2285 0
+	ldr	r3, [sp, #28]
+	adds	r2, r3, #1
+	beq	.L769
+	.loc 2 2286 0
+	ldr	r4, .L779+8
+	.loc 2 2290 0
+	movs	r2, #0
+	.loc 2 2292 0
+	movs	r1, #1
+	.loc 2 2286 0
+	str	r3, [r4, #4]
+	.loc 2 2292 0
+	mov	r0, r4
+	.loc 2 2288 0
+	ldr	r3, .L779+12
+	.loc 2 2287 0
+	str	r5, [r4, #16]
+	.loc 2 2290 0
+	str	r2, [r4]
+	.loc 2 2288 0
+	ldr	r3, [r3]
+	str	r3, [r4, #8]
+	.loc 2 2289 0
+	ldr	r3, .L779+16
+	ldr	r6, [r3]
+.LVL911:
+	str	r6, [r4, #12]
+	.loc 2 2292 0
+	bl	FlashReadPages
+.LVL912:
+	.loc 2 2293 0
+	ldr	r3, [r4]
+	cmp	r3, #256
+	beq	.L770
+	.loc 2 2293 0 is_stmt 0 discriminator 1
+	adds	r3, r3, #1
+	beq	.L770
+	.loc 2 2294 0 is_stmt 1
+	ldr	r3, [r6, #8]
+	cmp	r5, r3
+	beq	.L769
+.L770:
+	.loc 2 2297 0
+	ldr	r2, [r4, #8]
+	ldr	r3, [r4, #12]
+	ldr	r0, .L779+20
+	ldr	r1, [r2, #4]
+	str	r1, [sp, #16]
+	mov	r1, r5
+	ldr	r2, [r2]
+	str	r2, [sp, #12]
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	ldr	r2, [r3, #8]
+	str	r2, [sp, #4]
+	ldr	r2, [r3, #4]
+	str	r2, [sp]
+	ldr	r2, [r4, #4]
+	ldr	r3, [r3]
+	bl	printf
+.LVL913:
+.L769:
+	.loc 2 2281 0 discriminator 2
+	adds	r5, r5, #1
+.LVL914:
+	b	.L766
+.L780:
+	.align	2
+.L779:
+	.word	.LANCHOR62
+	.word	.LC88
+	.word	.LANCHOR108
+	.word	.LANCHOR39
+	.word	.LANCHOR109
+	.word	.LC90
+	.word	.LC89
+	.cfi_endproc
+.LFE294:
+	.size	ftl_scan_all_data, .-ftl_scan_all_data
+	.section	.text.FtlReadRefresh,"ax",%progbits
+	.align	1
+	.global	FtlReadRefresh
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlReadRefresh, %function
+FtlReadRefresh:
+.LFB321:
+	.loc 5 419 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 88
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL915:
+	.loc 5 425 0
+	ldr	r3, .L794
+	.loc 5 419 0
+	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	sub	sp, sp, #88
+	.cfi_def_cfa_offset 104
+	mov	r4, r3
+	.loc 5 425 0
+	ldr	r0, [r3, #80]
+	cmp	r0, #0
+	beq	.L782
+	.loc 5 426 0
+	ldr	r6, .L794+4
+	ldr	r0, [r3, #84]
+	ldr	r1, [r6]
+	cmp	r0, r1
+	bcs	.L783
+	mov	r5, #2048
+.L788:
+.LVL916:
+.LBB232:
+.LBB233:
+	.loc 5 428 0
+	ldr	r0, [r4, #84]
+	ldr	r3, [r6]
+	cmp	r0, r3
+	bcs	.L785
+	.loc 5 430 0
+	movs	r2, #0
+	mov	r1, sp
+	bl	log2phys
+.LVL917:
+	.loc 5 432 0
+	ldr	r2, [sp]
+	.loc 5 431 0
+	ldr	r3, [r4, #84]
+	.loc 5 432 0
+	adds	r1, r2, #1
+	.loc 5 431 0
+	add	r3, r3, #1
+	str	r3, [r4, #84]
+	.loc 5 432 0
+	beq	.L786
+.LBB234:
+	.loc 5 435 0
+	str	r3, [sp, #20]
+	.loc 5 438 0
+	add	r0, sp, #88
+	.loc 5 436 0
+	ldr	r3, .L794+8
+	.loc 5 439 0
+	movs	r1, #1
+	.loc 5 434 0
+	str	r2, [sp, #8]
+	.loc 5 438 0
+	movs	r2, #0
+	str	r2, [r0, #-84]!
+	.loc 5 436 0
+	str	r3, [sp, #12]
+	.loc 5 437 0
+	add	r3, sp, #24
+	str	r3, [sp, #16]
+	.loc 5 439 0
+	bl	FlashReadPages
+.LVL918:
+	.loc 5 440 0
+	ldr	r3, [sp, #4]
+	cmp	r3, #256
+	bne	.L785
+	.loc 5 442 0
+	ldr	r0, [sp]
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+.LVL919:
+	bl	FtlGcRefreshBlock
+.LVL920:
+.L785:
+.LBE234:
+	mov	r0, #-1
+.L781:
+.LBE233:
+.LBE232:
+	.loc 5 466 0
+	add	sp, sp, #88
+	.cfi_remember_state
+	.cfi_def_cfa_offset 16
+	@ sp needed
+	pop	{r4, r5, r6, pc}
+.LVL921:
+.L786:
+	.cfi_restore_state
+.LBB236:
+.LBB235:
+	.loc 5 427 0
+	subs	r5, r5, #1
+.LVL922:
+	bne	.L788
+	b	.L785
+.LVL923:
+.L783:
+.LBE235:
+.LBE236:
+	.loc 5 451 0
+	ldr	r2, .L794+12
+	.loc 5 449 0
+	movs	r0, #0
+	str	r0, [r3, #80]
+	.loc 5 450 0
+	str	r0, [r3, #84]
+	.loc 5 451 0
+	ldr	r2, [r2]
+	str	r2, [r3, #76]
+	b	.L781
+.L782:
+.LVL924:
+.LBB237:
+	.loc 5 456 0
+	ldr	r1, [r3, #76]
+	ldr	r3, .L794+12
+	ldr	r5, [r3]
+	add	r3, r5, #1048576
+	cmp	r1, r3
+	bhi	.L791
+	.loc 5 454 0
+	ldr	r3, .L794+16
+	ldr	r2, [r3]
+	mov	r3, #33554432
+	lsrs	r2, r2, #10
+	asrs	r3, r3, r2
+	.loc 5 457 0
+	add	r3, r3, r1
+	cmp	r5, r3
+	bhi	.L791
+	.loc 5 458 0
+	ldr	r3, .L794+20
+	ldrb	r3, [r3, #28]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L781
+.L791:
+	.loc 5 460 0
+	movs	r3, #1
+	.loc 5 461 0
+	movs	r0, #0
+	.loc 5 460 0
+	str	r3, [r4, #80]
+	.loc 5 461 0
+	str	r0, [r4, #84]
+	.loc 5 462 0
+	str	r5, [r4, #76]
+	b	.L781
+.L795:
+	.align	2
+.L794:
+	.word	.LANCHOR83
+	.word	.LANCHOR62
+	.word	ftl_temp_buf
+	.word	.LANCHOR63
+	.word	.LANCHOR77
+	.word	.LANCHOR79
+.LBE237:
+	.cfi_endproc
+.LFE321:
+	.size	FtlReadRefresh, .-FtlReadRefresh
+	.section	.text.FtlMapBlkWriteDump_data,"ax",%progbits
+	.align	1
+	.global	FtlMapBlkWriteDump_data
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlMapBlkWriteDump_data, %function
+FtlMapBlkWriteDump_data:
+.LFB270:
+	.loc 2 897 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL925:
+	.loc 2 903 0
+	ldr	r3, [r0, #36]
+	.loc 2 897 0
+	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 2 897 0
+	mov	r6, r0
+	.loc 2 903 0
+	cbz	r3, .L796
+	.loc 2 899 0
+	ldrh	r5, [r0, #6]
+	.loc 2 905 0
+	movs	r3, #0
+	.loc 2 900 0
+	ldr	r2, [r0, #24]
+	.loc 2 905 0
+	str	r3, [r0, #36]
+	.loc 2 899 0
+	subs	r5, r5, #1
+	.loc 2 907 0
+	ldr	r3, .L800
+	.loc 2 908 0
+	ldr	r1, .L800+4
+	.loc 2 930 0
+	uxth	r5, r5
+	.loc 2 907 0
+	ldr	r4, .L800+8
+	.loc 2 930 0
+	ldr	r2, [r2, r5, lsl #2]
+.LVL926:
+	.loc 2 907 0
+	ldr	r0, [r3]
+.LVL927:
+	.loc 2 908 0
+	ldr	r1, [r1]
+	.loc 2 931 0
+	str	r2, [r4, #4]
+	.loc 2 907 0
+	str	r0, [r4, #8]
+	.loc 2 908 0
+	str	r1, [r4, #12]
+	.loc 2 932 0
+	cbz	r2, .L798
+	.loc 2 934 0
+	movs	r2, #1
+.LVL928:
+	mov	r0, r4
+	mov	r1, r2
+	bl	FlashReadPages
+.LVL929:
+.L799:
+	.loc 2 941 0
+	ldr	r2, [r4, #8]
+	mov	r1, r5
+	mov	r0, r6
+	.loc 2 943 0
+	pop	{r4, r5, r6, lr}
+	.cfi_remember_state
+	.cfi_restore 14
+	.cfi_restore 6
+	.cfi_restore 5
+	.cfi_restore 4
+	.cfi_def_cfa_offset 0
+.LVL930:
+	.loc 2 941 0
+	b	FtlMapWritePage
+.LVL931:
+.L798:
+	.cfi_restore_state
+	.loc 2 938 0
+	ldr	r3, .L800+12
+	movs	r1, #255
+	ldrh	r2, [r3]
+.LVL932:
+	bl	ftl_memset
+.LVL933:
+	b	.L799
+.LVL934:
+.L796:
+	pop	{r4, r5, r6, pc}
+.L801:
+	.align	2
+.L800:
+	.word	.LANCHOR123
+	.word	.LANCHOR109
+	.word	.LANCHOR108
+	.word	.LANCHOR23
+	.cfi_endproc
+.LFE270:
+	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
+	.section	.text.FtlScanSysBlk,"ax",%progbits
+	.align	1
+	.global	FtlScanSysBlk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlScanSysBlk, %function
+FtlScanSysBlk:
+.LFB273:
+	.loc 2 1095 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 32
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 1101 0
+	movs	r4, #0
+	.loc 2 1103 0
+	ldr	r5, .L883
+	.loc 2 1095 0
+	sub	sp, sp, #32
+	.cfi_def_cfa_offset 64
+	.loc 2 1103 0
+	mov	r1, r4
+	.loc 2 1102 0
+	ldr	r3, .L883+4
+	.loc 2 1103 0
+	ldr	r2, [r5]
+	.loc 2 1101 0
+	ldr	r6, .L883+8
+	.loc 2 1102 0
+	strh	r4, [r3]	@ movhi
+	.loc 2 1103 0
+	ldr	r3, .L883+12
+	lsls	r2, r2, #2
+	.loc 2 1101 0
+	strh	r4, [r6]	@ movhi
+	.loc 2 1105 0
+	ldr	r7, .L883+16
+	.loc 2 1103 0
+	ldr	r0, [r3]
+	bl	ftl_memset
+.LVL935:
+	.loc 2 1104 0
+	ldr	r2, [r5]
+	mov	r1, r4
+	ldr	r3, .L883+20
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+.LVL936:
+	.loc 2 1105 0
+	ldrh	r2, [r7]
+	mov	r1, r4
+	ldr	r3, .L883+24
+	lsls	r2, r2, #2
+	ldr	r0, [r3]
+	bl	ftl_memset
+.LVL937:
+	.loc 2 1106 0
+	ldrh	r2, [r7]
+	mov	r1, r4
+	ldr	r3, .L883+28
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+.LVL938:
+	.loc 2 1107 0
+	movs	r2, #12
+	movs	r1, #255
+	ldr	r0, .L883+32
+	bl	ftl_memset
+.LVL939:
+	.loc 2 1109 0
+	ldr	r3, .L883+36
+	str	r6, [sp, #12]
+	str	r5, [sp, #16]
+	ldrh	r3, [r3]
+	str	r3, [sp, #4]
+.LVL940:
+.L803:
+	.loc 2 1109 0 is_stmt 0 discriminator 1
+	ldr	r3, .L883+40
+	ldr	r2, [sp, #4]
+	ldrh	r3, [r3]
+	cmp	r3, r2
+	bls	.L844
+	.loc 2 1113 0 is_stmt 1 discriminator 1
+	ldr	r3, .L883+44
+	.loc 2 1120 0 discriminator 1
+	movs	r5, #0
+	ldr	r1, .L883+48
+	mov	fp, r5
+	.loc 2 1118 0 discriminator 1
+	movs	r7, #20
+	.loc 2 1113 0 discriminator 1
+	ldrh	r8, [r3]
+	.loc 2 1118 0 discriminator 1
+	ldr	r3, .L883+52
+	.loc 2 1120 0 discriminator 1
+	ldr	r2, [r1]
+	ldr	r1, .L883+56
+	.loc 2 1118 0 discriminator 1
+	ldr	r6, [r3]
+	.loc 2 1119 0 discriminator 1
+	ldr	r3, .L883+60
+	.loc 2 1120 0 discriminator 1
+	str	r2, [sp, #8]
+	ldrh	r10, [r1]
+	.loc 2 1119 0 discriminator 1
+	ldr	r3, [r3]
+	.loc 2 1115 0 discriminator 1
+	ldr	r2, .L883+64
+	b	.L845
+.LVL941:
+.L805:
+	.loc 2 1115 0 is_stmt 0
+	ldrb	r0, [r2, r5]	@ zero_extendqisi2
+	ldr	r1, [sp, #4]
+	str	r3, [sp, #28]
+	str	r2, [sp, #24]
+	bl	V2P_block
+.LVL942:
+	str	r0, [sp, #20]
+.LVL943:
+	.loc 2 1116 0 is_stmt 1
+	bl	FtlBbmIsBadBlock
+.LVL944:
+	ldr	r2, [sp, #24]
+	ldr	r3, [sp, #28]
+	cbnz	r0, .L804
+	.loc 2 1118 0
+	ldr	r1, [sp, #20]
+	mla	r0, r7, fp, r6
+	.loc 2 1120 0
+	ldr	r4, [sp, #8]
+	.loc 2 1118 0
+	lsls	r1, r1, #10
+	.loc 2 1119 0
+	str	r3, [r0, #8]
+	.loc 2 1118 0
+	str	r1, [r0, #4]
+	.loc 2 1120 0
+	mul	r1, r10, fp
+	bic	r1, r1, #3
+	add	r1, r1, r4
+	str	r1, [r0, #12]
+	.loc 2 1121 0
+	add	r1, fp, #1
+	uxth	fp, r1
+.LVL945:
+.L804:
+	adds	r5, r5, #1
+.LVL946:
+.L845:
+	.loc 2 1113 0 discriminator 1
+	uxth	r1, r5
+	cmp	r8, r1
+	bhi	.L805
+	.loc 2 1124 0
+	cmp	fp, #0
+	bne	.L806
+.LVL947:
+.L843:
+	.loc 2 1109 0
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	str	r3, [sp, #4]
+.LVL948:
+	b	.L803
+.LVL949:
+.L806:
+	.loc 2 1128 0
+	movs	r7, #0
+	.loc 2 1127 0
+	movs	r2, #1
+	mov	r1, fp
+	mov	r0, r6
+	bl	FlashReadPages
+.LVL950:
+.L807:
+	.loc 2 1128 0 discriminator 1
+	uxth	r3, r7
+	cmp	fp, r3
+	bls	.L843
+	.loc 2 1129 0
+	ldr	r3, .L883+52
+	mov	r8, #20
+	mul	r8, r8, r7
+	ldr	r3, [r3]
+	add	r2, r3, r8
+	.loc 2 1132 0
+	ldr	r3, [r3, r8]
+	.loc 2 1129 0
+	ldr	r5, [r2, #4]
+	.loc 2 1130 0
+	ldr	r6, [r2, #12]
+	.loc 2 1132 0
+	adds	r3, r3, #1
+	.loc 2 1129 0
+	ubfx	r5, r5, #10, #16
+.LVL951:
+	.loc 2 1132 0
+	bne	.L810
+	mov	r10, #16
+.L812:
+.LVL952:
+	.loc 2 1134 0
+	ldr	r3, .L883+52
+	.loc 2 1135 0
+	movs	r2, #1
+	mov	r1, r2
+	.loc 2 1134 0
+	ldr	r0, [r3]
+	add	r0, r0, r8
+	ldr	r3, [r0, #4]
+	adds	r3, r3, #1
+	str	r3, [r0, #4]
+	.loc 2 1135 0
+	bl	FlashReadPages
+.LVL953:
+	.loc 2 1136 0
+	ldrh	r2, [r6]
+	movw	r3, #65535
+	cmp	r2, r3
+	.loc 2 1137 0
+	ldr	r3, .L883+52
+	ldr	r3, [r3]
+	.loc 2 1136 0
+	bne	.L809
+	.loc 2 1137 0
+	mov	r2, #-1
+	str	r2, [r3, r8]
+	.loc 2 1145 0
+	ldr	r3, .L883+52
+	ldr	r3, [r3]
+	ldr	r3, [r3, r8]
+	cmp	r3, r2
+	bne	.L810
+.LVL954:
+.L811:
+	.loc 2 1287 0
+	movs	r1, #1
+	b	.L882
+.LVL955:
+.L809:
+	.loc 2 1139 0
+	ldr	r3, [r3, r8]
+	adds	r3, r3, #1
+	bne	.L810
+.LVL956:
+	add	r10, r10, #-1
+.LVL957:
+	uxth	r10, r10
+	.loc 2 1133 0 discriminator 2
+	cmp	r10, #0
+	bne	.L812
+	b	.L811
+.L810:
+	.loc 2 1147 0
+	ldr	r3, .L883+68
+	ldr	r2, [r3]
+	ldr	r3, [r6, #4]
+	adds	r1, r2, #1
+	beq	.L813
+	.loc 2 1147 0 is_stmt 0 discriminator 1
+	cmp	r2, r3
+	bhi	.L814
+.L813:
+	.loc 2 1149 0 is_stmt 1
+	adds	r2, r3, #1
+	.loc 2 1152 0
+	ittt	ne
+	ldrne	r1, .L883+68
+	addne	r2, r3, #1
+	strne	r2, [r1]
+.L814:
+	.loc 2 1157 0
+	ldrh	r2, [r6]
+	movw	r1, #61604
+	cmp	r2, r1
+	beq	.L816
+	bhi	.L817
+	movw	r3, #61574
+	cmp	r2, r3
+	beq	.L818
+.L815:
+.LVL958:
+	adds	r7, r7, #1
+.LVL959:
+	b	.L807
+.LVL960:
+.L817:
+	movw	r3, #61634
+	cmp	r2, r3
+	beq	.L819
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L815
+	.loc 2 1280 0
+	movs	r1, #0
+.L882:
+	.loc 2 1287 0
+	mov	r0, r5
+	bl	FtlFreeSysBlkQueueIn
+.LVL961:
+	b	.L815
+.L819:
+	.loc 2 1162 0
+	ldr	r3, .L883+8
+	ldrh	r2, [r3]
+	ldr	r3, .L883
+	ldr	r3, [r3]
+	cmp	r2, r3
+	bls	.L821
+	.loc 2 1162 0 is_stmt 0 discriminator 1
+	movw	r2, #1162
+	ldr	r1, .L883+72
+	ldr	r0, .L883+76
+	bl	printf
+.LVL962:
+.L821:
+	.loc 2 1163 0 is_stmt 1
+	ldr	r3, [sp, #16]
+	ldr	r2, [sp, #12]
+	ldr	r1, [r3]
+	ldrh	r0, [r2]
+	.loc 2 1165 0
+	ldr	r2, .L883+12
+	.loc 2 1163 0
+	uxth	r10, r1
+	.loc 2 1165 0
+	ldr	ip, [r2]
+	.loc 2 1163 0
+	add	r3, r10, #-1
+	sub	r10, r10, r0
+	add	r10, r10, #-1
+	sxth	r3, r3
+.LVL963:
+	sxth	r10, r10
+.L822:
+	.loc 2 1163 0 is_stmt 0 discriminator 1
+	cmp	r3, r10
+	bgt	.L828
+	.loc 2 1186 0 is_stmt 1
+	cmp	r3, #0
+	bge	.L860
+	b	.L815
+.L828:
+	.loc 2 1165 0
+	ldr	r2, [ip, r3, lsl #2]
+	add	r8, ip, r3, lsl #2
+	ldr	r4, [r6, #4]
+	cmp	r4, r2
+	bls	.L823
+	.loc 2 1167 0
+	ldr	r2, [ip]
+	cbnz	r2, .L824
+	.loc 2 1167 0 is_stmt 0 discriminator 1
+	cmp	r1, r0
+	.loc 2 1172 0 is_stmt 1 discriminator 1
+	ittt	ne
+	ldrne	r2, .L883+8
+	addne	r0, r0, #1
+	strhne	r0, [r2]	@ movhi
+.L824:
+	.loc 2 1178 0 discriminator 1
+	ldr	r2, .L883+20
+	.loc 2 1175 0 discriminator 1
+	uxth	r10, r3
+	.loc 2 1178 0 discriminator 1
+	ldr	r0, [r2]
+	movs	r2, #0
+.L825:
+	.loc 2 1175 0 discriminator 1
+	uxth	lr, r2
+	sxth	r1, r2
+.LVL964:
+	cmp	r10, lr
+	bhi	.L826
+	.loc 2 1180 0
+	ldr	r2, [r6, #4]
+	.loc 2 1186 0
+	cmp	r3, #0
+	.loc 2 1180 0
+	str	r2, [r8]
+	.loc 2 1181 0
+	strh	r5, [r0, r3, lsl #1]	@ movhi
+	.loc 2 1186 0
+	blt	.L815
+	.loc 2 1193 0
+	ldr	r2, .L883+8
+	ldrh	r0, [r2]
+	ldr	r2, .L883
+	ldr	r2, [r2]
+	subs	r2, r2, r0
+	subs	r2, r2, #1
+	sxth	r2, r2
+	cmp	r3, r2
+	bgt	.L815
+.LVL965:
+.L860:
+	.loc 2 1195 0
+	ldr	r2, .L883+8
+	adds	r0, r0, #1
+	strh	r0, [r2]	@ movhi
+	.loc 2 1196 0
+	ldr	r2, [r6, #4]
+	str	r2, [ip, r3, lsl #2]
+	.loc 2 1197 0
+	ldr	r2, .L883+20
+.L880:
+	.loc 2 1241 0
+	ldr	r2, [r2]
+	strh	r5, [r2, r3, lsl #1]	@ movhi
+	b	.L815
+.LVL966:
+.L826:
+	.loc 2 1177 0 discriminator 3
+	add	lr, ip, r1, lsl #2
+	adds	r2, r2, #1
+	ldr	r4, [lr, #4]
+	.loc 2 1178 0 discriminator 3
+	add	lr, r0, r1, lsl #1
+	ldrh	lr, [lr, #2]
+	.loc 2 1177 0 discriminator 3
+	str	r4, [ip, r1, lsl #2]
+	.loc 2 1178 0 discriminator 3
+	strh	lr, [r0, r1, lsl #1]	@ movhi
+.LVL967:
+	b	.L825
+.L823:
+	subs	r3, r3, #1
+.LVL968:
+	sxth	r3, r3
+.LVL969:
+	b	.L822
+.L884:
+	.align	2
+.L883:
+	.word	.LANCHOR30
+	.word	.LANCHOR35
+	.word	.LANCHOR147
+	.word	.LANCHOR135
+	.word	.LANCHOR27
+	.word	.LANCHOR129
+	.word	.LANCHOR132
+	.word	.LANCHOR36
+	.word	.LANCHOR81
+	.word	.LANCHOR5
+	.word	.LANCHOR6
+	.word	.LANCHOR3
+	.word	.LANCHOR94
+	.word	.LANCHOR120
+	.word	.LANCHOR24
+	.word	.LANCHOR93
+	.word	.LANCHOR13
+	.word	.LANCHOR71
+	.word	.LANCHOR148
+	.word	.LC1
+.LVL970:
+.L818:
+	.loc 2 1203 0
+	ldr	r8, .L885+12
+	ldr	r10, .L885+20
+	ldrh	r2, [r8]
+	ldrh	r3, [r10]
+	cmp	r2, r3
+	bls	.L831
+	.loc 2 1203 0 is_stmt 0 discriminator 1
+	movw	r2, #1203
+	ldr	r1, .L885
+	ldr	r0, .L885+4
+	bl	printf
+.LVL971:
+.L831:
+	.loc 2 1206 0 is_stmt 1
+	ldr	r2, .L885+8
+	.loc 2 1204 0
+	ldrh	lr, [r10]
+	ldrh	ip, [r8]
+	.loc 2 1206 0
+	ldr	r0, [r2]
+	.loc 2 1204 0
+	add	r10, lr, #-1
+	sxth	r3, r10
+.LVL972:
+	sub	r10, r10, ip
+.L832:
+	.loc 2 1204 0 is_stmt 0 discriminator 1
+	cmp	r3, r10
+	ble	.L837
+	.loc 2 1206 0 is_stmt 1
+	ldr	r1, [r6, #4]
+	add	r8, r0, r3, lsl #2
+	ldr	r2, [r0, r3, lsl #2]
+	cmp	r1, r2
+	bls	.L833
+	.loc 2 1208 0
+	ldr	r2, [r0]
+	cbnz	r2, .L834
+	.loc 2 1208 0 is_stmt 0 discriminator 1
+	cmp	lr, ip
+	.loc 2 1216 0 is_stmt 1 discriminator 1
+	ittt	ne
+	ldrne	r2, .L885+12
+	addne	ip, ip, #1
+	strhne	ip, [r2]	@ movhi
+.L834:
+	.loc 2 1221 0 discriminator 1
+	ldr	r2, .L885+16
+	.loc 2 1218 0 discriminator 1
+	uxth	r10, r3
+	.loc 2 1221 0 discriminator 1
+	ldr	ip, [r2]
+	movs	r2, #0
+.L835:
+	.loc 2 1218 0 discriminator 1
+	uxth	lr, r2
+	sxth	r1, r2
+.LVL973:
+	cmp	r10, lr
+	bhi	.L836
+	.loc 2 1223 0
+	ldr	r2, [r6, #4]
+	str	r2, [r8]
+	.loc 2 1224 0
+	strh	r5, [ip, r3, lsl #1]	@ movhi
+.LVL974:
+.L837:
+	.loc 2 1229 0
+	cmp	r3, #0
+	blt	.L815
+	.loc 2 1237 0
+	ldr	r2, .L885+20
+	ldr	ip, .L885+12
+	ldrh	r2, [r2]
+	ldrh	r1, [ip]
+	subs	r2, r2, #1
+	subs	r2, r2, r1
+	sxth	r2, r2
+	cmp	r3, r2
+	bgt	.L815
+	.loc 2 1240 0
+	ldr	r2, [r6, #4]
+	.loc 2 1239 0
+	adds	r1, r1, #1
+	strh	r1, [ip]	@ movhi
+	.loc 2 1240 0
+	str	r2, [r0, r3, lsl #2]
+	.loc 2 1241 0
+	ldr	r2, .L885+16
+	b	.L880
+.LVL975:
+.L836:
+	.loc 2 1220 0 discriminator 3
+	add	lr, r0, r1, lsl #2
+	adds	r2, r2, #1
+	ldr	r4, [lr, #4]
+	.loc 2 1221 0 discriminator 3
+	add	lr, ip, r1, lsl #1
+	ldrh	lr, [lr, #2]
+	.loc 2 1220 0 discriminator 3
+	str	r4, [r0, r1, lsl #2]
+	.loc 2 1221 0 discriminator 3
+	strh	lr, [ip, r1, lsl #1]	@ movhi
+.LVL976:
+	b	.L835
+.L833:
+	subs	r3, r3, #1
+.LVL977:
+	sxth	r3, r3
+.LVL978:
+	b	.L832
+.LVL979:
+.L816:
+	.loc 2 1248 0
+	ldr	r8, .L885+40
+	movw	r2, #65535
+	ldrh	r1, [r8]
+	cmp	r1, r2
+	bne	.L839
+.L881:
+	.loc 2 1260 0
+	strh	r5, [r8]	@ movhi
+	.loc 2 1261 0
+	str	r3, [r8, #8]
+	b	.L815
+.L839:
+	.loc 2 1255 0
+	ldrh	r0, [r8, #4]
+	cmp	r0, r2
+	beq	.L840
+	.loc 2 1256 0
+	movs	r1, #1
+	bl	FtlFreeSysBlkQueueIn
+.LVL980:
+.L840:
+	.loc 2 1257 0
+	ldr	r3, [r6, #4]
+	ldr	r2, [r8, #8]
+	cmp	r2, r3
+	bcs	.L841
+	.loc 2 1259 0
+	ldrh	r2, [r8]
+	strh	r2, [r8, #4]	@ movhi
+	b	.L881
+.L841:
+	.loc 2 1265 0
+	strh	r5, [r8, #4]	@ movhi
+	b	.L815
+.LVL981:
+.L844:
+	.loc 2 1292 0
+	ldr	r3, .L885+24
+	ldr	r2, [r3]
+	ldrh	r3, [r2]
+	cbz	r3, .L846
+.L849:
+	.loc 2 1310 0
+	ldr	r3, .L885+16
+	ldr	r4, [r3]
+	ldrh	r2, [r4]
+	cmp	r2, #0
+	beq	.L847
+.L848:
+	.loc 2 1328 0
+	ldr	r3, .L885+28
+	ldrh	r2, [r3]
+	ldr	r3, .L885+32
+	ldr	r3, [r3]
+	cmp	r2, r3
+	bls	.L879
+	.loc 2 1328 0 is_stmt 0 discriminator 1
+	mov	r2, #1328
+	ldr	r1, .L885
+	ldr	r0, .L885+4
+	bl	printf
+.LVL982:
+.L879:
+	.loc 2 1330 0 is_stmt 1
+	movs	r0, #0
+	add	sp, sp, #32
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL983:
+.L846:
+	.cfi_restore_state
+	.loc 2 1292 0 discriminator 1
+	ldr	r1, .L885+28
+	ldrh	r1, [r1]
+	cmp	r1, #0
+	beq	.L849
+	.loc 2 1294 0 discriminator 1
+	ldr	r5, .L885+32
+	ldr	r0, [r5]
+.L850:
+	sxth	r1, r3
+.LVL984:
+	cmp	r1, r0
+	bcs	.L849
+	.loc 2 1296 0
+	ldrh	r4, [r2, r1, lsl #1]
+	adds	r3, r3, #1
+	cmp	r4, #0
+	beq	.L850
+	.loc 2 1301 0
+	ldr	r3, .L885+36
+	.loc 2 1302 0
+	movs	r6, #0
+	.loc 2 1301 0
+	ldr	r0, [r3]
+	mov	r3, r1
+.L851:
+.LVL985:
+	.loc 2 1298 0 discriminator 1
+	ldr	r4, [r5]
+	cmp	r3, r4
+	bcs	.L849
+	.loc 2 1300 0 discriminator 3
+	ldrh	r7, [r2, r3, lsl #1]
+	subs	r4, r3, r1
+	strh	r7, [r2, r4, lsl #1]	@ movhi
+	.loc 2 1301 0 discriminator 3
+	ldr	r7, [r0, r3, lsl #2]
+	str	r7, [r0, r4, lsl #2]
+	.loc 2 1302 0 discriminator 3
+	strh	r6, [r2, r3, lsl #1]	@ movhi
+	adds	r3, r3, #1
+.LVL986:
+	sxth	r3, r3
+.LVL987:
+	b	.L851
+.LVL988:
+.L847:
+	.loc 2 1310 0 discriminator 1
+	ldr	r3, .L885+12
+	ldrh	r3, [r3]
+	cmp	r3, #0
+	beq	.L848
+	.loc 2 1312 0 discriminator 1
+	ldr	r5, .L885+20
+	ldrh	r1, [r5]
+.L856:
+	sxth	r3, r2
+.LVL989:
+	cmp	r3, r1
+	mov	r6, r3
+	bge	.L848
+	.loc 2 1314 0
+	ldrh	r0, [r4, r3, lsl #1]
+	adds	r2, r2, #1
+	cmp	r0, #0
+	beq	.L856
+	.loc 2 1319 0
+	ldr	r2, .L885+8
+	.loc 2 1320 0
+	movs	r0, #0
+	.loc 2 1319 0
+	ldr	r2, [r2]
+.LVL990:
+.L857:
+	.loc 2 1316 0 discriminator 1
+	ldrh	r1, [r5]
+	cmp	r3, r1
+	bge	.L848
+	.loc 2 1318 0 discriminator 3
+	ldrh	r7, [r4, r3, lsl #1]
+	subs	r1, r3, r6
+	strh	r7, [r4, r1, lsl #1]	@ movhi
+	.loc 2 1319 0 discriminator 3
+	ldr	r7, [r2, r3, lsl #2]
+	str	r7, [r2, r1, lsl #2]
+	adds	r1, r3, #1
+	.loc 2 1320 0 discriminator 3
+	strh	r0, [r4, r3, lsl #1]	@ movhi
+	sxth	r3, r1
+.LVL991:
+	b	.L857
+.L886:
+	.align	2
+.L885:
+	.word	.LANCHOR148
+	.word	.LC1
+	.word	.LANCHOR132
+	.word	.LANCHOR35
+	.word	.LANCHOR36
+	.word	.LANCHOR27
+	.word	.LANCHOR129
+	.word	.LANCHOR147
+	.word	.LANCHOR30
+	.word	.LANCHOR135
+	.word	.LANCHOR81
+	.cfi_endproc
+.LFE273:
+	.size	FtlScanSysBlk, .-FtlScanSysBlk
+	.section	.text.FtlMapTblRecovery,"ax",%progbits
+	.align	1
+	.global	FtlMapTblRecovery
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlMapTblRecovery, %function
+FtlMapTblRecovery:
+.LFB278:
+	.loc 2 1466 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL992:
+	.loc 2 1472 0
+	ldr	r3, [r0, #16]
+	.loc 2 1477 0
+	movs	r1, #0
+	.loc 2 1466 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	sub	sp, sp, #24
+	.cfi_def_cfa_offset 56
+	.loc 2 1473 0
+	ldrh	fp, [r0, #6]
+	.loc 2 1466 0
+	mov	r4, r0
+	.loc 2 1483 0
+	movs	r6, #0
+	.loc 2 1470 0
+	ldr	r8, [r0, #24]
+.LVL993:
+	.loc 2 1472 0
+	str	r3, [sp, #12]
+	.loc 2 1474 0
+	ldrh	r3, [r0, #8]
+	.loc 2 1477 0
+	lsl	r2, fp, #2
+	.loc 2 1471 0
+	ldr	r10, [r0, #12]
+.LVL994:
+	.loc 2 1477 0
+	mov	r0, r8
+.LVL995:
+	.loc 2 1478 0
+	ldr	r5, .L914
+	.loc 2 1474 0
+	str	r3, [sp, #4]
+.LVL996:
+	.loc 2 1477 0
+	bl	ftl_memset
+.LVL997:
+	.loc 2 1478 0
+	ldr	r3, .L914+4
+	.loc 2 1483 0
+	str	r6, [r4, #32]
+	.loc 2 1484 0
+	str	r6, [r4, #28]
+	.loc 2 1478 0
+	ldr	r2, [r3]
+	.loc 2 1510 0
+	str	r3, [sp, #8]
+	.loc 2 1478 0
+	str	r2, [r5, #8]
+	.loc 2 1479 0
+	ldr	r2, .L914+8
+	ldr	r7, [r2]
+	.loc 2 1481 0
+	movw	r2, #65535
+	.loc 2 1479 0
+	str	r7, [r5, #12]
+.LVL998:
+	.loc 2 1481 0
+	strh	r2, [r4]	@ movhi
+	.loc 2 1482 0
+	strh	r2, [r4, #2]	@ movhi
+	.loc 2 1485 0
+	movs	r2, #1
+	str	r2, [r4, #36]
+.LVL999:
+.L888:
+	.loc 2 1486 0 discriminator 1
+	ldr	r2, [sp, #4]
+	sxth	r3, r6
+.LVL1000:
+	cmp	r3, r2
+	bge	.L905
+	.loc 2 1488 0
+	ldr	r2, [sp, #4]
+	subs	r2, r2, #1
+	cmp	r3, r2
+	lsl	r2, r3, #1
+	bne	.L889
+	.loc 2 1490 0
+	ldrh	r0, [r10, r3, lsl #1]
+	movs	r1, #1
+	add	r5, r10, r2
+	str	r3, [sp, #4]
+.LVL1001:
+	bl	FtlGetLastWrittenPage
+.LVL1002:
+	.loc 2 1493 0
+	ldr	r3, [sp, #12]
+	.loc 2 1490 0
+	sxth	r10, r0
+.LVL1003:
+	.loc 2 1492 0
+	strh	r6, [r4]	@ movhi
+	.loc 2 1494 0
+	movs	r6, #0
+	.loc 2 1491 0
+	adds	r0, r0, #1
+	.loc 2 1493 0
+	mov	r2, r3
+	ldr	r3, [sp, #4]
+	.loc 2 1491 0
+	strh	r0, [r4, #2]	@ movhi
+	.loc 2 1493 0
+	ldr	r3, [r2, r3, lsl #2]
+	str	r3, [r4, #28]
+.LVL1004:
+	.loc 2 1496 0
+	ldr	r3, .L914
+.LVL1005:
+.L890:
+	sxth	r2, r6
+.LVL1006:
+	.loc 2 1494 0 discriminator 1
+	cmp	r2, r10
+	ble	.L892
+.LVL1007:
+.L905:
+	.loc 2 1547 0
+	mov	r0, r4
+	bl	ftl_free_no_use_map_blk
+.LVL1008:
+	.loc 2 1548 0
+	ldr	r3, .L914+12
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bne	.L894
+	.loc 2 1550 0
+	mov	r0, r4
+	bl	ftl_map_blk_alloc_new_blk
+.LVL1009:
+.L894:
+	.loc 2 1553 0
+	mov	r0, r4
+	bl	ftl_map_blk_gc
+.LVL1010:
+	.loc 2 1555 0
+	mov	r0, r4
+	bl	ftl_map_blk_gc
+.LVL1011:
+	.loc 2 1557 0
+	movs	r0, #0
+	add	sp, sp, #24
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1012:
+.L892:
+	.cfi_restore_state
+	.loc 2 1496 0
+	ldrh	r1, [r5]
+	.loc 2 1497 0
+	ldr	r0, .L914
+	.loc 2 1496 0
+	str	r3, [sp, #4]
+	orr	r2, r2, r1, lsl #10
+.LVL1013:
+	str	r2, [r3, #4]
+	.loc 2 1497 0
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+.LVL1014:
+	.loc 2 1500 0
+	ldr	r3, [sp, #4]
+	ldr	r2, [r3]
+	adds	r2, r2, #1
+	beq	.L891
+	.loc 2 1502 0
+	ldrh	r2, [r7, #8]
+	cmp	fp, r2
+	bls	.L891
+	.loc 2 1502 0 is_stmt 0 discriminator 1
+	ldrh	r1, [r4, #4]
+	ldrh	r0, [r7]
+	cmp	r0, r1
+	.loc 2 1504 0 is_stmt 1 discriminator 1
+	itt	eq
+	ldreq	r1, [r3, #4]
+	streq	r1, [r8, r2, lsl #2]
+.L891:
+.LVL1015:
+	adds	r6, r6, #1
+.LVL1016:
+	b	.L890
+.LVL1017:
+.L889:
+	.loc 2 1510 0
+	ldr	r1, [sp, #8]
+	.loc 2 1511 0
+	add	r2, r10, r2
+	str	r2, [sp, #16]
+	.loc 2 1512 0
+	ldr	r0, .L914
+	.loc 2 1510 0
+	ldr	r1, [r1]
+	str	r1, [r5, #8]
+	.loc 2 1511 0
+	ldrh	r1, [r10, r3, lsl #1]
+	ldr	r3, .L914+12
+.LVL1018:
+	ldrh	r2, [r3]
+	str	r3, [sp, #20]
+	subs	r2, r2, #1
+	orr	r2, r2, r1, lsl #10
+	str	r2, [r5, #4]
+	.loc 2 1512 0
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+.LVL1019:
+	.loc 2 1515 0
+	ldr	r2, [r5]
+	adds	r2, r2, #1
+	beq	.L907
+	.loc 2 1515 0 is_stmt 0 discriminator 1
+	ldrh	r1, [r7]
+	ldrh	r2, [r4, #4]
+	ldr	r3, [sp, #20]
+	cmp	r1, r2
+	bne	.L907
+	.loc 2 1515 0 discriminator 2
+	ldrh	r1, [r7, #8]
+	movw	r2, #64245
+	cmp	r1, r2
+	beq	.L896
+.L907:
+	movs	r3, #0
+.L897:
+.LVL1020:
+	.loc 2 1530 0 is_stmt 1 discriminator 1
+	ldr	r1, .L914+12
+	sxth	r2, r3
+	ldrh	r1, [r1]
+	cmp	r2, r1
+	bge	.L903
+	str	r3, [sp, #20]
+	.loc 2 1532 0
+	ldr	r3, [sp, #16]
+.LVL1021:
+	.loc 2 1533 0
+	ldr	r0, .L914
+	.loc 2 1532 0
+	ldrh	r1, [r3]
+	orr	r2, r2, r1, lsl #10
+.LVL1022:
+	str	r2, [r5, #4]
+	.loc 2 1533 0
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+.LVL1023:
+	.loc 2 1536 0
+	ldr	r2, [r5]
+	ldr	r3, [sp, #20]
+	adds	r2, r2, #1
+	beq	.L901
+	.loc 2 1538 0
+	ldrh	r2, [r7, #8]
+	cmp	fp, r2
+	bls	.L901
+	.loc 2 1538 0 is_stmt 0 discriminator 1
+	ldrh	r1, [r4, #4]
+	ldrh	r0, [r7]
+	cmp	r0, r1
+	.loc 2 1540 0 is_stmt 1 discriminator 1
+	itt	eq
+	ldreq	r1, [r5, #4]
+	streq	r1, [r8, r2, lsl #2]
+.L901:
+.LVL1024:
+	adds	r3, r3, #1
+.LVL1025:
+	b	.L897
+.L896:
+	.loc 2 1518 0 discriminator 1
+	ldrh	r2, [r3]
+	.loc 2 1520 0 discriminator 1
+	movs	r1, #0
+	ldr	r3, [sp, #8]
+	.loc 2 1518 0 discriminator 1
+	subs	r2, r2, #1
+	.loc 2 1520 0 discriminator 1
+	ldr	ip, [r3]
+.L898:
+	sxth	r3, r1
+.LVL1026:
+	.loc 2 1518 0 discriminator 1
+	cmp	r3, r2
+	blt	.L900
+.L903:
+.LVL1027:
+	adds	r6, r6, #1
+.LVL1028:
+	b	.L888
+.LVL1029:
+.L900:
+	.loc 2 1520 0
+	lsls	r0, r3, #3
+	ldr	r3, [ip, r3, lsl #3]
+.LVL1030:
+	adds	r1, r1, #1
+.LVL1031:
+	.loc 2 1521 0
+	uxth	lr, r3
+	cmp	fp, lr
+	.loc 2 1523 0
+	itttt	hi
+	addhi	r0, r0, ip
+	movhi	r3, lr
+.LVL1032:
+	ldrhi	r0, [r0, #4]
+	strhi	r0, [r8, r3, lsl #2]
+	b	.L898
+.L915:
+	.align	2
+.L914:
+	.word	.LANCHOR108
+	.word	.LANCHOR39
+	.word	.LANCHOR109
+	.word	.LANCHOR20
+	.cfi_endproc
+.LFE278:
+	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
+	.section	.text.FtlLoadVonderInfo,"ax",%progbits
+	.align	1
+	.global	FtlLoadVonderInfo
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlLoadVonderInfo, %function
+FtlLoadVonderInfo:
+.LFB279:
+	.loc 2 1560 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 3, -8
+	.cfi_offset 14, -4
+	.loc 2 1561 0
+	ldr	r3, .L917
+	ldr	r0, .L917+4
+	ldrh	r3, [r3]
+	strh	r3, [r0, #10]	@ movhi
+	.loc 2 1562 0
+	movw	r3, #61574
+	strh	r3, [r0, #4]	@ movhi
+	.loc 2 1563 0
+	ldr	r3, .L917+8
+	ldrh	r3, [r3]
+	strh	r3, [r0, #8]	@ movhi
+	.loc 2 1564 0
+	ldr	r3, .L917+12
+	ldrh	r3, [r3]
+	strh	r3, [r0, #6]	@ movhi
+	.loc 2 1565 0
+	ldr	r3, .L917+16
+	ldr	r3, [r3]
+	str	r3, [r0, #12]
+	.loc 2 1566 0
+	ldr	r3, .L917+20
+	ldr	r3, [r3]
+	str	r3, [r0, #16]
+	.loc 2 1567 0
+	ldr	r3, .L917+24
+	ldr	r3, [r3]
+	str	r3, [r0, #20]
+	.loc 2 1568 0
+	ldr	r3, .L917+28
+	ldr	r3, [r3]
+	str	r3, [r0, #24]
+	.loc 2 1570 0
+	bl	FtlMapTblRecovery
+.LVL1033:
+	.loc 2 1573 0
+	movs	r0, #0
+	pop	{r3, pc}
+.L918:
+	.align	2
+.L917:
+	.word	.LANCHOR27
+	.word	.LANCHOR149
+	.word	.LANCHOR35
+	.word	.LANCHOR28
+	.word	.LANCHOR36
+	.word	.LANCHOR132
+	.word	.LANCHOR131
+	.word	.LANCHOR133
+	.cfi_endproc
+.LFE279:
+	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
+	.section	.text.FtlL2PDataInit,"ax",%progbits
+	.align	1
+	.global	FtlL2PDataInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlL2PDataInit, %function
+FtlL2PDataInit:
+.LFB280:
+	.loc 2 1576 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
+	.cfi_offset 14, -4
+	.loc 2 1578 0
+	movs	r1, #0
+	ldr	r5, .L922
+	ldr	r4, .L922+4
+	ldr	r2, [r5]
+	.loc 2 1579 0
+	ldr	r7, .L922+8
+	ldr	r6, .L922+12
+	.loc 2 1578 0
+	ldr	r0, [r4]
+	lsls	r2, r2, #1
+	.loc 2 1579 0
+	ldr	r8, .L922+44
+	.loc 2 1578 0
+	bl	ftl_memset
+.LVL1034:
+	.loc 2 1579 0
+	ldrh	r3, [r7]
+	movs	r1, #255
+	ldrh	r2, [r6]
+	ldr	r0, [r8]
+	muls	r2, r3, r2
+	bl	ftl_memset
+.LVL1035:
+	ldr	r3, .L922+16
+	movw	r0, #65535
+	ldrh	r1, [r6]
+	.loc 2 1584 0
+	ldr	ip, [r8]
+	ldr	r2, [r3]
+	movs	r3, #12
+	ldrh	r7, [r7]
+	mla	r3, r1, r3, r3
+	adds	r1, r2, r3
+	.loc 2 1580 0
+	movs	r3, #0
+	.loc 2 1582 0
+	mov	lr, r3
+.LVL1036:
+.L920:
+	adds	r2, r2, #12
+	adds	r6, r3, r7
+	.loc 2 1580 0 discriminator 1
+	cmp	r2, r1
+	bne	.L921
+	.loc 2 1586 0
+	ldr	r3, .L922+20
+	.loc 2 1588 0
+	ldr	r2, [r5]
+	.loc 2 1586 0
+	strh	r0, [r3, #2]	@ movhi
+	.loc 2 1588 0
+	strh	r2, [r3, #10]	@ movhi
+	.loc 2 1589 0
+	movw	r2, #61634
+	strh	r2, [r3, #4]	@ movhi
+	.loc 2 1590 0
+	ldr	r2, .L922+24
+	.loc 2 1587 0
+	strh	r0, [r3]	@ movhi
+	.loc 2 1590 0
+	ldrh	r2, [r2]
+	strh	r2, [r3, #8]	@ movhi
+	.loc 2 1591 0
+	ldr	r2, .L922+28
+	ldrh	r2, [r2]
+	strh	r2, [r3, #6]	@ movhi
+	.loc 2 1592 0
+	ldr	r2, .L922+32
+	ldr	r2, [r2]
+	str	r2, [r3, #12]
+	.loc 2 1593 0
+	ldr	r2, .L922+36
+	ldr	r2, [r2]
+	str	r2, [r3, #16]
+	.loc 2 1594 0
+	ldr	r2, [r4]
+	str	r2, [r3, #20]
+	.loc 2 1595 0
+	ldr	r2, .L922+40
+	ldr	r2, [r2]
+	str	r2, [r3, #24]
+	pop	{r4, r5, r6, r7, r8, pc}
+.L921:
+	.loc 2 1584 0 discriminator 3
+	bic	r3, r3, #3
+	.loc 2 1582 0 discriminator 3
+	str	lr, [r2, #-8]
+	.loc 2 1584 0 discriminator 3
+	add	r3, r3, ip
+	.loc 2 1583 0 discriminator 3
+	strh	r0, [r2, #-12]	@ movhi
+	.loc 2 1584 0 discriminator 3
+	str	r3, [r2, #-4]
+	mov	r3, r6
+	b	.L920
+.L923:
+	.align	2
+.L922:
+	.word	.LANCHOR30
+	.word	.LANCHOR130
+	.word	.LANCHOR23
+	.word	.LANCHOR33
+	.word	.LANCHOR56
+	.word	.LANCHOR144
+	.word	.LANCHOR147
+	.word	.LANCHOR32
+	.word	.LANCHOR129
+	.word	.LANCHOR135
+	.word	.LANCHOR134
+	.word	.LANCHOR136
+	.cfi_endproc
+.LFE280:
+	.size	FtlL2PDataInit, .-FtlL2PDataInit
+	.section	.text.FtlLoadMapInfo,"ax",%progbits
+	.align	1
+	.global	FtlLoadMapInfo
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlLoadMapInfo, %function
+FtlLoadMapInfo:
+.LFB281:
+	.loc 2 1599 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 3, -8
+	.cfi_offset 14, -4
+	.loc 2 1600 0
+	bl	FtlL2PDataInit
+.LVL1037:
+	.loc 2 1602 0
+	ldr	r0, .L925
+	bl	FtlMapTblRecovery
+.LVL1038:
+	.loc 2 1605 0
+	movs	r0, #0
+	pop	{r3, pc}
+.L926:
+	.align	2
+.L925:
+	.word	.LANCHOR144
+	.cfi_endproc
+.LFE281:
+	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
+	.section	.text.FtlVariablesInit,"ax",%progbits
+	.align	1
+	.global	FtlVariablesInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlVariablesInit, %function
+FtlVariablesInit:
+.LFB210:
+	.loc 3 493 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 3 496 0
+	movs	r4, #0
+	ldr	r3, .L928
+	.loc 3 497 0
+	movw	r2, #65535
+	.loc 3 502 0
+	mov	r1, r4
+	.loc 3 503 0
+	ldr	r5, .L928+4
+	.loc 3 496 0
+	str	r4, [r3]
+	.loc 3 497 0
+	ldr	r3, .L928+8
+	strh	r2, [r3]	@ movhi
+	.loc 3 500 0
+	mov	r2, #-1
+	.loc 3 498 0
+	ldr	r3, .L928+12
+	str	r4, [r3]
+	.loc 3 499 0
+	ldr	r3, .L928+16
+	str	r4, [r3]
+	.loc 3 500 0
+	ldr	r3, .L928+20
+	str	r2, [r3]
+	.loc 3 501 0
+	ldr	r3, .L928+24
+	strh	r4, [r3]	@ movhi
+	.loc 3 502 0
+	ldr	r3, .L928+28
+	ldrh	r2, [r3]
+	ldr	r3, .L928+32
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+.LVL1039:
+	.loc 3 503 0
+	ldrh	r2, [r5]
+	mov	r1, r4
+	ldr	r3, .L928+36
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+.LVL1040:
+	.loc 3 504 0
+	ldrh	r2, [r5]
+	mov	r1, r4
+	ldr	r3, .L928+40
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+.LVL1041:
+	.loc 3 505 0
+	mov	r1, r4
+	movs	r2, #48
+	ldr	r0, .L928+44
+	bl	ftl_memset
+.LVL1042:
+	.loc 3 506 0
+	mov	r2, #512
+	mov	r1, r4
+	ldr	r0, .L928+48
+	bl	ftl_memset
+.LVL1043:
+	.loc 3 507 0
+	bl	FtlGcBufInit
+.LVL1044:
+	.loc 3 508 0
+	bl	FtlL2PDataInit
+.LVL1045:
+	.loc 3 510 0
+	mov	r0, r4
+	pop	{r3, r4, r5, pc}
+.L929:
+	.align	2
+.L928:
+	.word	.LANCHOR150
+	.word	.LANCHOR6
+	.word	.LANCHOR151
+	.word	.LANCHOR152
+	.word	.LANCHOR153
+	.word	.LANCHOR154
+	.word	.LANCHOR35
+	.word	.LANCHOR27
+	.word	.LANCHOR36
+	.word	.LANCHOR40
+	.word	.LANCHOR126
+	.word	.LANCHOR79
+	.word	.LANCHOR83
+	.cfi_endproc
+.LFE210:
+	.size	FtlVariablesInit, .-FtlVariablesInit
+	.section	.text.SupperBlkListInit,"ax",%progbits
+	.align	1
+	.global	SupperBlkListInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	SupperBlkListInit, %function
+SupperBlkListInit:
+.LFB288:
+	.loc 2 2067 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 48
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 2071 0
+	movs	r2, #6
+	ldr	r3, .L941
+	movs	r1, #0
+	.loc 2 2072 0
+	movs	r4, #0
+	.loc 2 2071 0
+	ldr	r5, .L941+4
+	.loc 2 2077 0
+	mov	r8, r4
+	.loc 2 2071 0
+	ldrh	r3, [r3]
+	.loc 2 2077 0
+	mov	r6, r4
+	.loc 2 2071 0
+	ldr	r0, [r5]
+	mov	r10, r5
+	muls	r2, r3, r2
+	bl	ftl_memset
+.LVL1046:
+	.loc 2 2072 0
+	ldr	r3, .L941+8
+	.loc 2 2075 0
+	ldr	r2, .L941+12
+	.loc 2 2072 0
+	str	r4, [r3]
+	.loc 2 2073 0
+	ldr	r3, .L941+16
+	.loc 2 2075 0
+	strh	r4, [r2]	@ movhi
+	str	r2, [sp, #4]
+	.loc 2 2073 0
+	str	r4, [r3]
+	.loc 2 2074 0
+	ldr	r3, .L941+20
+	str	r4, [r3]
+	.loc 2 2076 0
+	ldr	r3, .L941+24
+	mov	fp, r3
+	strh	r4, [r3]	@ movhi
+.LVL1047:
+.L931:
+	.loc 2 2079 0 discriminator 1
+	ldr	r3, .L941+28
+	uxth	r7, r4
+.LVL1048:
+	ldrh	r3, [r3]
+	cmp	r7, r3
+	bcs	.L937
+	.loc 2 2081 0
+	ldr	r3, .L941+32
+	ldrh	r2, [r3]
+	.loc 2 2084 0
+	ldr	r3, .L941+36
+	ldrh	r3, [r3]
+	str	r3, [sp]
+	movs	r3, #0
+	mov	r5, r3
+	b	.L938
+.LVL1049:
+.L933:
+	str	r2, [sp, #12]
+	.loc 2 2082 0
+	mov	r1, r7
+	ldr	r2, .L941+40
+	str	r3, [sp, #8]
+	ldrb	r0, [r2, r3]	@ zero_extendqisi2
+	bl	V2P_block
+.LVL1050:
+	.loc 2 2083 0
+	bl	FtlBbmIsBadBlock
+.LVL1051:
+	ldr	r3, [sp, #8]
+	ldr	r2, [sp, #12]
+	cbnz	r0, .L932
+	.loc 2 2084 0
+	ldr	r1, [sp]
+	add	r5, r5, r1
+.LVL1052:
+	uxth	r5, r5
+.LVL1053:
+.L932:
+	adds	r3, r3, #1
+.LVL1054:
+.L938:
+	.loc 2 2081 0 discriminator 1
+	uxth	r1, r3
+	cmp	r2, r1
+	bhi	.L933
+	.loc 2 2086 0
+	cbz	r5, .L940
+	.loc 2 2087 0
+	mov	r1, r5
+	mov	r0, #32768
+	bl	__aeabi_idiv
+.LVL1055:
+.L934:
+	.loc 2 2088 0
+	ldr	r1, [r10]
+	uxth	r2, r4
+	movs	r3, #6
+	mla	r3, r3, r2, r1
+	strh	r0, [r3, #4]	@ movhi
+	.loc 2 2090 0
+	ldr	r3, .L941+44
+	ldrh	r3, [r3]
+	cmp	r3, r7
+	beq	.L935
+	.loc 2 2091 0 discriminator 1
+	ldr	r3, .L941+48
+	.loc 2 2090 0 discriminator 1
+	ldrh	r3, [r3]
+	cmp	r3, r7
+	beq	.L935
+	.loc 2 2092 0
+	ldr	r3, .L941+52
+	.loc 2 2091 0
+	ldrh	r3, [r3]
+	cmp	r3, r7
+	beq	.L935
+	.loc 2 2094 0
+	ldr	r3, .L941+56
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r2, lsl #1]
+	cbnz	r3, .L936
+	.loc 2 2095 0
+	add	r8, r8, #1
+.LVL1056:
+	.loc 2 2096 0
+	mov	r0, r7
+.LVL1057:
+	.loc 2 2095 0
+	uxth	r8, r8
+.LVL1058:
+	.loc 2 2096 0
+	bl	INSERT_FREE_LIST
+.LVL1059:
+.L935:
+	adds	r4, r4, #1
+.LVL1060:
+	b	.L931
+.LVL1061:
+.L940:
+	mov	r0, r5
+	b	.L934
+.LVL1062:
+.L936:
+	.loc 2 2098 0
+	adds	r6, r6, #1
+.LVL1063:
+	.loc 2 2099 0
+	mov	r0, r7
+.LVL1064:
+	.loc 2 2098 0
+	uxth	r6, r6
+.LVL1065:
+	.loc 2 2099 0
+	bl	INSERT_DATA_LIST
+.LVL1066:
+	b	.L935
+.L937:
+	.loc 2 2103 0
+	ldr	r2, [sp, #4]
+	.loc 2 2104 0
+	strh	r8, [fp]	@ movhi
+	.loc 2 2103 0
+	strh	r6, [r2]	@ movhi
+	.loc 2 2105 0
+	add	r6, r6, r8
+.LVL1067:
+	cmp	r6, r3
+	ble	.L939
+	.loc 2 2105 0 is_stmt 0 discriminator 1
+	movw	r2, #2105
+	ldr	r1, .L941+60
+	ldr	r0, .L941+64
+	bl	printf
+.LVL1068:
+.L939:
+	.loc 2 2107 0 is_stmt 1
+	movs	r0, #0
+	add	sp, sp, #16
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1069:
+.L942:
+	.align	2
+.L941:
+	.word	.LANCHOR6
+	.word	.LANCHOR41
+	.word	.LANCHOR47
+	.word	.LANCHOR45
+	.word	.LANCHOR42
+	.word	.LANCHOR44
+	.word	.LANCHOR48
+	.word	.LANCHOR5
+	.word	.LANCHOR3
+	.word	.LANCHOR19
+	.word	.LANCHOR13
+	.word	.LANCHOR51
+	.word	.LANCHOR52
+	.word	.LANCHOR53
+	.word	.LANCHOR43
+	.word	.LANCHOR155
+	.word	.LC1
+	.cfi_endproc
+.LFE288:
+	.size	SupperBlkListInit, .-SupperBlkListInit
+	.section	.text.ftl_check_vpc,"ax",%progbits
+	.align	1
+	.global	ftl_check_vpc
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_check_vpc, %function
+ftl_check_vpc:
+.LFB293:
+	.loc 2 2223 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1070:
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 2232 0
+	movs	r4, #0
+	ldr	r6, .L967
+	.loc 2 2238 0
+	ldr	r5, .L967+4
+	.loc 2 2229 0
+	ldr	r1, .L967+8
+	ldr	r0, .L967+12
+	bl	printf
+.LVL1071:
+	.loc 2 2231 0
+	mov	r2, #8192
+	movs	r1, #0
+	ldr	r0, .L967+4
+	bl	ftl_memset
+.LVL1072:
+.L944:
+	.loc 2 2232 0 discriminator 1
+	ldr	r3, [r6]
+	cmp	r4, r3
+	bcc	.L946
+	.loc 2 2243 0 discriminator 1
+	ldr	r10, .L967+48
+	movs	r4, #0
+.LVL1073:
+	.loc 2 2245 0 discriminator 1
+	ldr	r7, .L967+16
+	mov	r6, r4
+.LVL1074:
+.L947:
+	.loc 2 2243 0 discriminator 1
+	ldrh	r2, [r10]
+	uxth	r3, r4
+	cmp	r2, r3
+	bhi	.L949
+	.loc 2 2255 0
+	ldr	r3, .L967+20
+	ldr	r4, [r3]
+.LVL1075:
+	cbz	r4, .L950
+.LBB238:
+	.loc 2 2257 0
+	ldr	r3, .L967+24
+	.loc 2 2259 0
+	mov	r8, #0
+	.loc 2 2258 0
+	ldr	r5, .L967+28
+	.loc 2 2261 0
+	ldr	r10, .L967+16
+	.loc 2 2257 0
+	ldrh	r7, [r3]
+.LVL1076:
+	.loc 2 2258 0
+	ldr	r3, [r5]
+	.loc 2 2263 0
+	ldr	fp, .L967+4
+	.loc 2 2258 0
+	subs	r4, r4, r3
+	ldr	r3, .L967+32
+	asrs	r4, r4, #1
+	muls	r4, r3, r4
+	uxth	r4, r4
+.LVL1077:
+.L951:
+	.loc 2 2259 0 discriminator 1
+	uxth	r3, r8
+	cmp	r7, r3
+	bls	.L950
+	.loc 2 2261 0
+	ldr	r3, [r10]
+	ldrh	r2, [r3, r4, lsl #1]
+	cbz	r2, .L952
+	.loc 2 2264 0
+	movs	r6, #1
+	.loc 2 2263 0
+	ldrh	r3, [fp, r4, lsl #1]
+	mov	r1, r4
+	ldr	r0, .L967+36
+	bl	printf
+.LVL1078:
+.L952:
+	.loc 2 2266 0
+	movs	r3, #6
+	ldr	r2, [r5]
+	muls	r4, r3, r4
+.LVL1079:
+	movw	r3, #65535
+	add	r8, r8, #1
+.LVL1080:
+	ldrh	r4, [r2, r4]
+	cmp	r4, r3
+	bne	.L951
+.LVL1081:
+.L950:
+.LBE238:
+	.loc 2 2271 0
+	cbz	r6, .L943
+.LVL1082:
+	.loc 2 2271 0 is_stmt 0 discriminator 1
+	movw	r2, #2271
+	ldr	r1, .L967+8
+	ldr	r0, .L967+40
+	bl	printf
+.LVL1083:
+.L943:
+	.loc 2 2272 0 is_stmt 1
+	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1084:
+.L946:
+	.cfi_restore_state
+	.loc 2 2234 0
+	movs	r2, #0
+	add	r1, sp, #4
+	mov	r0, r4
+	bl	log2phys
+.LVL1085:
+	.loc 2 2235 0
+	ldr	r0, [sp, #4]
+	adds	r3, r0, #1
+	beq	.L945
+	.loc 2 2237 0
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+.LVL1086:
+	.loc 2 2238 0
+	ldrh	r3, [r5, r0, lsl #1]
+	adds	r3, r3, #1
+	strh	r3, [r5, r0, lsl #1]	@ movhi
+.LVL1087:
+.L945:
+	.loc 2 2232 0 discriminator 2
+	adds	r4, r4, #1
+.LVL1088:
+	b	.L944
+.LVL1089:
+.L949:
+	.loc 2 2245 0
+	ldr	r3, [r7]
+	uxth	r5, r4
+	ldr	r8, .L967+4
+	ldrh	r2, [r3, r5, lsl #1]
+	ldrh	r3, [r8, r5, lsl #1]
+	cmp	r2, r3
+	beq	.L948
+	.loc 2 2247 0
+	mov	r1, r5
+	ldr	r0, .L967+44
+	bl	printf
+.LVL1090:
+	.loc 2 2248 0
+	ldr	r3, [r7]
+	movw	r2, #65535
+	ldrh	r3, [r3, r5, lsl #1]
+	cmp	r3, r2
+	beq	.L948
+	.loc 2 2248 0 is_stmt 0 discriminator 1
+	ldrh	r2, [r8, r5, lsl #1]
+	.loc 2 2250 0 is_stmt 1 discriminator 1
+	cmp	r2, r3
+	it	hi
+	movhi	r6, #1
+.LVL1091:
+.L948:
+	adds	r4, r4, #1
+.LVL1092:
+	b	.L947
+.L968:
+	.align	2
+.L967:
+	.word	.LANCHOR62
+	.word	check_vpc_table
+	.word	.LANCHOR156
+	.word	.LC91
+	.word	.LANCHOR43
+	.word	.LANCHOR47
+	.word	.LANCHOR48
+	.word	.LANCHOR41
+	.word	-1431655765
+	.word	.LC93
+	.word	.LC1
+	.word	.LC92
+	.word	.LANCHOR5
+	.cfi_endproc
+.LFE293:
+	.size	ftl_check_vpc, .-ftl_check_vpc
+	.section	.text.FtlGcPageVarInit,"ax",%progbits
+	.align	1
+	.global	FtlGcPageVarInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcPageVarInit, %function
+FtlGcPageVarInit:
+.LFB312:
+	.loc 5 202 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	.loc 5 203 0
+	ldr	r2, .L970
+	movs	r3, #0
+	.loc 5 202 0
+	push	{r4, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 4, -8
+	.cfi_offset 14, -4
+	.loc 5 205 0
+	movs	r1, #255
+	ldr	r4, .L970+4
+	.loc 5 203 0
+	strh	r3, [r2]	@ movhi
+	.loc 5 204 0
+	ldr	r2, .L970+8
+	strh	r3, [r2]	@ movhi
+	.loc 5 205 0
+	ldrh	r2, [r4]
+	ldr	r3, .L970+12
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+.LVL1093:
+	.loc 5 206 0
+	ldrh	r3, [r4]
+	movs	r2, #12
+	movs	r1, #255
+	muls	r2, r3, r2
+	ldr	r3, .L970+16
+	ldr	r0, [r3]
+	bl	ftl_memset
+.LVL1094:
+	.loc 5 208 0
+	pop	{r4, lr}
+	.cfi_restore 14
+	.cfi_restore 4
+	.cfi_def_cfa_offset 0
+	.loc 5 207 0
+	b	FtlGcBufInit
+.LVL1095:
+.L971:
+	.align	2
+.L970:
+	.word	.LANCHOR98
+	.word	.LANCHOR21
+	.word	.LANCHOR99
+	.word	.LANCHOR97
+	.word	.LANCHOR100
+	.cfi_endproc
+.LFE312:
+	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
+	.section	.text.FtlGcScanTempBlk,"ax",%progbits
+	.align	1
+	.global	FtlGcScanTempBlk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcScanTempBlk, %function
+FtlGcScanTempBlk:
+.LFB313:
+	.loc 5 211 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1096:
+	.loc 5 220 0
+	ldr	r3, .L995
+	.loc 5 211 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	sub	sp, sp, #24
+	.cfi_def_cfa_offset 56
+	.loc 5 211 0
+	mov	r5, r0
+	str	r1, [sp, #8]
+	.loc 5 220 0
+	ldrh	r4, [r3]
+.LVL1097:
+	.loc 5 221 0
+	movw	r3, #65535
+	cmp	r4, r3
+	beq	.L989
+	.loc 5 223 0
+	cbnz	r4, .L973
+.L974:
+	.loc 5 224 0
+	bl	FtlGcPageVarInit
+.LVL1098:
+	b	.L975
+.LVL1099:
+.L989:
+	.loc 5 222 0
+	movs	r4, #0
+.LVL1100:
+.L973:
+	.loc 5 223 0 discriminator 1
+	ldr	r3, .L995+4
+	ldr	r2, [sp, #8]
+	ldrh	r3, [r3]
+	cmp	r3, r2
+	beq	.L974
+.LVL1101:
+.L975:
+	.loc 5 222 0
+	movs	r7, #0
+.LVL1102:
+.L983:
+	.loc 5 228 0
+	ldrh	r2, [r5]
+	movw	r3, #65535
+	.loc 5 226 0
+	movs	r0, #0
+	strb	r0, [r5, #8]
+.LVL1103:
+	.loc 5 228 0
+	cmp	r2, r3
+	beq	.L976
+.L986:
+.LVL1104:
+	.loc 5 231 0
+	ldr	r3, .L995+8
+	movs	r2, #0
+	add	ip, r5, #16
+	.loc 5 230 0
+	mov	r6, r2
+	.loc 5 233 0
+	movw	lr, #65535
+	.loc 5 234 0
+	mov	r8, #20
+	.loc 5 231 0
+	ldrh	fp, [r3]
+	.loc 5 234 0
+	ldr	r3, .L995+12
+	ldr	r3, [r3]
+	str	r3, [sp, #4]
+	.loc 5 235 0
+	ldr	r3, .L995+16
+	ldr	r3, [r3]
+	str	r3, [sp, #12]
+	ldr	r3, .L995+20
+	ldrh	r3, [r3]
+	str	r3, [sp, #16]
+	.loc 5 236 0
+	ldr	r3, .L995+24
+	ldr	r3, [r3]
+	str	r3, [sp, #20]
+	ldr	r3, .L995+28
+	ldrh	r10, [r3]
+.LVL1105:
+.L977:
+	.loc 5 231 0 discriminator 1
+	uxth	r3, r2
+	cmp	fp, r3
+	bhi	.L979
+	.loc 5 241 0
+	mov	r8, #0
+	.loc 5 242 0
+	mov	fp, #20
+	.loc 5 240 0
+	movs	r2, #0
+.LVL1106:
+	mov	r1, r6
+	ldr	r0, [sp, #4]
+	bl	FlashReadPages
+.LVL1107:
+.L980:
+	.loc 5 241 0 discriminator 1
+	uxth	r3, r8
+	cmp	r6, r3
+	bhi	.L984
+	.loc 5 268 0
+	ldr	r3, [sp, #8]
+	.loc 5 266 0
+	adds	r7, r7, #1
+.LVL1108:
+	.loc 5 264 0
+	adds	r4, r4, #1
+.LVL1109:
+	ldr	r2, .L995+4
+	uxth	r4, r4
+.LVL1110:
+	.loc 5 268 0
+	cmp	r3, r7
+	bls	.L985
+.L987:
+	.loc 5 274 0
+	ldrh	r3, [r2]
+	cmp	r3, r4
+	bhi	.L986
+	.loc 5 265 0
+	movs	r0, #0
+	b	.L976
+.LVL1111:
+.L979:
+	.loc 5 232 0
+	ldrh	r3, [ip], #2
+.LVL1112:
+	.loc 5 233 0
+	cmp	r3, lr
+	beq	.L978
+	.loc 5 234 0
+	ldr	r1, [sp, #4]
+	orr	r3, r4, r3, lsl #10
+.LVL1113:
+	.loc 5 235 0
+	ldr	r0, [sp, #12]
+	.loc 5 234 0
+	mla	r1, r8, r6, r1
+	str	r3, [r1, #4]
+	.loc 5 235 0
+	ldr	r3, [sp, #16]
+	muls	r3, r6, r3
+	bic	r3, r3, #3
+	add	r3, r3, r0
+	.loc 5 236 0
+	ldr	r0, [sp, #20]
+	.loc 5 235 0
+	str	r3, [r1, #8]
+	.loc 5 236 0
+	mul	r3, r10, r6
+	.loc 5 237 0
+	adds	r6, r6, #1
+.LVL1114:
+	uxth	r6, r6
+.LVL1115:
+	.loc 5 236 0
+	bic	r3, r3, #3
+	add	r3, r3, r0
+	str	r3, [r1, #12]
+.L978:
+.LVL1116:
+	adds	r2, r2, #1
+.LVL1117:
+	b	.L977
+.LVL1118:
+.L984:
+	.loc 5 242 0
+	ldr	r3, .L995+12
+	mul	r10, fp, r8
+	ldr	r2, [r3]
+	add	r3, r2, r10
+	str	r2, [sp, #16]
+	ldr	r1, [r3, #4]
+	str	r3, [sp, #12]
+.LVL1119:
+	.loc 5 243 0
+	ubfx	r0, r1, #10, #16
+	str	r1, [sp, #4]
+	bl	P2V_plane
+.LVL1120:
+	.loc 5 245 0
+	ldr	r2, [sp, #16]
+	ldr	r2, [r2, r10]
+	cbnz	r2, .L981
+	.loc 5 247 0
+	ldr	r3, [sp, #12]
+	.loc 5 248 0
+	movw	r2, #65535
+	add	r8, r8, #1
+.LVL1121:
+	ldr	r1, [sp, #4]
+	.loc 5 247 0
+	ldr	r3, [r3, #12]
+.LVL1122:
+	.loc 5 248 0
+	ldrh	ip, [r3]
+	cmp	ip, r2
+	bne	.L982
+	.loc 5 249 0
+	ldr	r3, .L995+32
+.LVL1123:
+	movs	r2, #1
+	str	r2, [r3]
+.LVL1124:
+.L976:
+	.loc 5 281 0
+	ldr	r3, .L995
+	movw	r2, #65535
+	.loc 5 283 0
+	strb	r0, [r5, #6]
+	.loc 5 284 0
+	mov	r1, r4
+	.loc 5 282 0
+	strh	r4, [r5, #2]	@ movhi
+	.loc 5 281 0
+	strh	r2, [r3]	@ movhi
+	.loc 5 284 0
+	mov	r2, r0
+	mov	r0, r5
+.LVL1125:
+	bl	ftl_sb_update_avl_pages
+.LVL1126:
+	.loc 5 285 0
+	b	.L988
+.LVL1127:
+.L982:
+	.loc 5 252 0
+	ldr	r2, [r3, #8]
+	ldr	r0, [r3, #12]
+.LVL1128:
+	bl	FtlGcUpdatePage
+.LVL1129:
+	b	.L980
+.LVL1130:
+.L981:
+	.loc 5 256 0
+	ldr	r3, .L995+36
+	movs	r4, #0
+.LVL1131:
+	ldrh	r2, [r5]
+	ldr	r3, [r3]
+	strh	r4, [r3, r2, lsl #1]	@ movhi
+	.loc 5 257 0
+	ldrh	r0, [r5]
+.LVL1132:
+	bl	INSERT_FREE_LIST
+.LVL1133:
+	.loc 5 258 0
+	movw	r3, #65535
+	strh	r3, [r5]	@ movhi
+.LVL1134:
+	.loc 5 260 0
+	bl	FtlGcPageVarInit
+.LVL1135:
+	.loc 5 261 0
+	b	.L983
+.LVL1136:
+.L985:
+	.loc 5 268 0 discriminator 1
+	ldr	r1, .L995
+	movw	r0, #65535
+	ldrh	r3, [r1]
+	cmp	r3, r0
+	beq	.L987
+	.loc 5 269 0
+	add	r3, r3, r7
+	strh	r3, [r1]	@ movhi
+	.loc 5 270 0
+	ldrh	r3, [r2]
+	cmp	r3, r4
+	bls	.L987
+.LVL1137:
+.L988:
+	.loc 5 286 0
+	mov	r0, #-1
+	add	sp, sp, #24
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1138:
+.L996:
+	.align	2
+.L995:
+	.word	.LANCHOR157
+	.word	.LANCHOR19
+	.word	.LANCHOR3
+	.word	.LANCHOR120
+	.word	.LANCHOR93
+	.word	.LANCHOR23
+	.word	.LANCHOR94
+	.word	.LANCHOR24
+	.word	.LANCHOR153
+	.word	.LANCHOR43
+	.cfi_endproc
+.LFE313:
+	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
+	.section	.text.FlashTestBlk,"ax",%progbits
+	.align	1
+	.global	FlashTestBlk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashTestBlk, %function
+FlashTestBlk:
+.LFB346:
+	.loc 1 193 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 88
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1139:
+	.loc 1 198 0
+	cmp	r0, #11
+	.loc 1 193 0
+	push	{r4, r5, lr}
+	.cfi_def_cfa_offset 12
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	mov	r4, r0
+	sub	sp, sp, #92
+	.cfi_def_cfa_offset 104
+	.loc 1 198 0
+	bls	.L999
+.LVL1140:
+.LBB241:
+.LBB242:
+	.loc 1 202 0
+	ldr	r5, .L1000
+	.loc 1 203 0
+	add	r0, sp, #24
+.LVL1141:
+	.loc 1 204 0
+	movs	r2, #32
+	movs	r1, #165
+	.loc 1 203 0
+	str	r0, [sp, #16]
+	.loc 1 206 0
+	lsls	r4, r4, #10
+.LVL1142:
+	.loc 1 202 0
+	str	r5, [sp, #12]
+	.loc 1 204 0
+	bl	ftl_memset
+.LVL1143:
+	.loc 1 205 0
+	movs	r2, #8
+	movs	r1, #90
+	mov	r0, r5
+	bl	ftl_memset
+.LVL1144:
+	.loc 1 207 0
+	movs	r2, #1
+	add	r0, sp, #4
+	mov	r1, r2
+	.loc 1 206 0
+	str	r4, [sp, #8]
+	.loc 1 207 0
+	bl	FlashEraseBlocks
+.LVL1145:
+	.loc 1 208 0
+	movs	r3, #1
+	add	r0, sp, #4
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+.LVL1146:
+	.loc 1 209 0
+	ldr	r4, [sp, #4]
+	.loc 1 215 0
+	movs	r2, #1
+	movs	r1, #0
+	add	r0, sp, #4
+	.loc 1 209 0
+	adds	r4, r4, #0
+	it	ne
+	movne	r4, #1
+	negs	r4, r4
+.LDL1:
+.LVL1147:
+	.loc 1 215 0
+	bl	FlashEraseBlocks
+.LVL1148:
+.L997:
+.LBE242:
+.LBE241:
+	.loc 1 217 0
+	mov	r0, r4
+	add	sp, sp, #92
+	.cfi_remember_state
+	.cfi_def_cfa_offset 12
+	@ sp needed
+	pop	{r4, r5, pc}
+.LVL1149:
+.L999:
+	.cfi_restore_state
+	.loc 1 199 0
+	movs	r4, #0
+	b	.L997
+.L1001:
+	.align	2
+.L1000:
+	.word	ftl_temp_buf
+	.cfi_endproc
+.LFE346:
+	.size	FlashTestBlk, .-FlashTestBlk
+	.section	.text.FlashGetBadBlockList,"ax",%progbits
+	.align	1
+	.global	FlashGetBadBlockList
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashGetBadBlockList, %function
+FlashGetBadBlockList:
+.LFB347:
+	.loc 1 220 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1150:
+	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 1 223 0
+	mov	r2, #256
+	.loc 1 220 0
+	mov	r5, r1
+	.loc 1 223 0
+	movs	r1, #255
+.LVL1151:
+	.loc 1 220 0
+	mov	r4, r0
+	.loc 1 223 0
+	bl	ftl_memset
+.LVL1152:
+	.loc 1 224 0
+	ldr	r3, .L1009
+	mov	r1, r5
+	mov	r0, r4
+	ldr	r3, [r3]
+	blx	r3
+.LVL1153:
+	uxth	r0, r0
+.LVL1154:
+	.loc 1 225 0
+	cmp	r0, #50
+	bls	.L1003
+	.loc 1 226 0
+	mov	r2, #256
+	movs	r1, #255
+	mov	r0, r4
+.LVL1155:
+	bl	ftl_memset
+.LVL1156:
+	.loc 1 227 0
+	movs	r0, #0
+.LVL1157:
+.L1003:
+	.loc 1 229 0
+	ldr	r3, .L1009+4
+	ldrh	r3, [r3, #14]
+	cmp	r3, #4
+	bne	.L1008
+	add	r1, r4, r0, lsl #1
+	mov	r3, r4
+.L1005:
+	.loc 1 230 0 discriminator 1
+	cmp	r3, r1
+	bne	.L1006
+.L1008:
+	.loc 1 235 0
+	pop	{r3, r4, r5, pc}
+.LVL1158:
+.L1006:
+	.loc 1 231 0 discriminator 3
+	ldrh	r2, [r3]
+	lsrs	r2, r2, #1
+	strh	r2, [r3], #2	@ movhi
+	b	.L1005
+.L1010:
+	.align	2
+.L1009:
+	.word	.LANCHOR107
+	.word	.LANCHOR0
+	.cfi_endproc
+.LFE347:
+	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
+	.section	.text.ftl_memcpy,"ax",%progbits
+	.align	1
+	.global	ftl_memcpy
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_memcpy, %function
+ftl_memcpy:
+.LFB349:
+	.loc 1 243 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL1159:
+	.loc 1 244 0
+	b	memcpy
+.LVL1160:
+	.cfi_endproc
+.LFE349:
+	.size	ftl_memcpy, .-ftl_memcpy
+	.section	.text.FtlBbmTblFlush,"ax",%progbits
+	.align	1
+	.global	FtlBbmTblFlush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlBbmTblFlush, %function
+FtlBbmTblFlush:
+.LFB229:
+	.loc 4 80 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1161:
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 48
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 4 91 0
+	movs	r4, #0
+	.loc 4 88 0
+	ldr	r7, .L1021
+	.loc 4 89 0
+	movs	r1, #0
+	.loc 4 87 0
+	ldr	r5, .L1021+4
+	.loc 4 88 0
+	ldr	r3, [r7]
+	mov	fp, r7
+	.loc 4 87 0
+	ldr	r8, .L1021+48
+	ldr	r6, .L1021+8
+	.loc 4 88 0
+	str	r3, [r5, #12]
+	.loc 4 91 0
+	ldr	r7, .L1021+12
+	.loc 4 89 0
+	ldr	r3, .L1021+16
+	.loc 4 92 0
+	ldr	r10, .L1021+52
+	.loc 4 87 0
+	ldr	r0, [r8]
+	.loc 4 89 0
+	ldrh	r2, [r3]
+	.loc 4 87 0
+	str	r0, [r5, #8]
+	.loc 4 89 0
+	bl	ftl_memset
+.LVL1162:
+.L1013:
+	.loc 4 91 0 discriminator 1
+	ldrh	r3, [r7]
+	cmp	r4, r3
+	blt	.L1014
+	.loc 4 94 0
+	ldr	r6, [r5, #12]
+.LVL1163:
+	.loc 4 95 0
+	movs	r2, #16
+	.loc 4 98 0
+	ldr	r4, .L1021+20
+.LVL1164:
+	.loc 4 95 0
+	movs	r1, #255
+	.loc 4 84 0
+	movs	r7, #0
+	.loc 4 95 0
+	mov	r0, r6
+	bl	ftl_memset
+.LVL1165:
+	.loc 4 97 0
+	movw	r3, #61649
+	mov	r10, r4
+	strh	r3, [r6]	@ movhi
+	.loc 4 98 0
+	ldr	r3, [r4, #8]
+	.loc 4 82 0
+	str	r7, [sp, #12]
+	.loc 4 98 0
+	str	r3, [r6, #4]
+	.loc 4 99 0
+	ldrh	r3, [r4]
+	strh	r3, [r6, #2]	@ movhi
+	.loc 4 100 0
+	ldrh	r3, [r4, #4]
+	strh	r3, [r6, #8]	@ movhi
+	.loc 4 101 0
+	ldrh	r3, [r4, #6]
+	strh	r3, [r6, #10]	@ movhi
+	.loc 4 102 0
+	ldr	r3, .L1021+24
+	ldr	r3, [r3]
+	strh	r3, [r6, #12]	@ movhi
+.LVL1166:
+.L1015:
+	.loc 4 104 0
+	ldr	r3, [r8]
+	.loc 4 107 0
+	ldrh	r1, [r4]
+	ldrh	r2, [r4, #2]
+	.loc 4 104 0
+	str	r3, [r5, #8]
+	.loc 4 105 0
+	ldr	r3, [fp]
+	.loc 4 108 0
+	ldrh	r0, [r6, #10]
+	.loc 4 105 0
+	str	r3, [r5, #12]
+	.loc 4 106 0
+	movs	r3, #0
+	str	r3, [r5]
+	.loc 4 107 0
+	orr	r3, r2, r1, lsl #10
+	str	r3, [r5, #4]
+	.loc 4 108 0
+	ldrh	r3, [r4, #4]
+	str	r0, [sp]
+	ldr	r0, .L1021+28
+	bl	printf
+.LVL1167:
+	.loc 4 109 0
+	movs	r3, #1
+	ldr	r0, .L1021+4
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+.LVL1168:
+	.loc 4 110 0
+	ldr	r3, .L1021+32
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3]
+	subs	r3, r3, #1
+	cmp	r2, r3
+	blt	.L1016
+	.loc 4 113 0
+	ldr	r3, [r4, #8]
+	.loc 4 117 0
+	mov	r1, #0	@ movhi
+	.loc 4 115 0
+	ldrh	r2, [r4]
+	.loc 4 117 0
+	strh	r1, [r4, #2]	@ movhi
+	.loc 4 113 0
+	adds	r3, r3, #1
+	str	r3, [r4, #8]
+	.loc 4 114 0
+	str	r3, [r6, #4]
+	.loc 4 115 0
+	strh	r2, [r6, #8]	@ movhi
+	.loc 4 116 0
+	ldrh	r3, [r4, #4]
+	.loc 4 118 0
+	strh	r2, [r4, #4]	@ movhi
+	.loc 4 121 0
+	ldr	r2, .L1021+36
+	.loc 4 116 0
+	strh	r3, [r4]	@ movhi
+	.loc 4 119 0
+	lsls	r3, r3, #10
+	.loc 4 121 0
+	ldr	r0, [r2]
+	.loc 4 122 0
+	movs	r2, #1
+	.loc 4 119 0
+	str	r3, [r5, #4]
+	.loc 4 122 0
+	mov	r1, r2
+	.loc 4 121 0
+	str	r3, [r0, #4]
+	.loc 4 122 0
+	bl	FlashEraseBlocks
+.LVL1169:
+	.loc 4 123 0
+	movs	r3, #1
+	ldr	r0, .L1021+4
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+.LVL1170:
+.L1016:
+	.loc 4 126 0
+	ldrh	r3, [r10, #2]
+	adds	r3, r3, #1
+	strh	r3, [r10, #2]	@ movhi
+	.loc 4 127 0
+	ldr	r3, [r5]
+	adds	r3, r3, #1
+	bne	.L1017
+	.loc 4 130 0
+	adds	r7, r7, #1
+.LVL1171:
+	.loc 4 129 0
+	ldr	r1, [r5, #4]
+	.loc 4 130 0
+	uxth	r7, r7
+	.loc 4 129 0
+	ldr	r0, .L1021+40
+	bl	printf
+.LVL1172:
+	.loc 4 131 0
+	cmp	r7, #3
+	bls	.L1015
+	.loc 4 132 0
+	mov	r2, r7
+	ldr	r1, [r5, #4]
+	ldr	r0, .L1021+44
+	bl	printf
+.LVL1173:
+.L1019:
+	b	.L1019
+.LVL1174:
+.L1014:
+	.loc 4 92 0 discriminator 3
+	ldrh	r2, [r10]
+	ldr	r3, [r5, #8]
+	ldr	r1, [r6, #4]!
+	mul	r0, r2, r4
+	lsls	r2, r2, #2
+	.loc 4 91 0 discriminator 3
+	adds	r4, r4, #1
+.LVL1175:
+	.loc 4 92 0 discriminator 3
+	add	r0, r3, r0, lsl #2
+	bl	ftl_memcpy
+.LVL1176:
+	b	.L1013
+.LVL1177:
+.L1020:
+	movs	r3, #1
+.LVL1178:
+	str	r3, [sp, #12]
+.LVL1179:
+	b	.L1015
+.LVL1180:
+.L1017:
+	.loc 4 139 0
+	ldr	r3, [sp, #12]
+	cmp	r3, #0
+	beq	.L1020
+	.loc 4 146 0
+	movs	r0, #0
+	add	sp, sp, #16
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1181:
+.L1022:
+	.align	2
+.L1021:
+	.word	.LANCHOR109
+	.word	.LANCHOR108
+	.word	.LANCHOR37+24
+	.word	.LANCHOR10
+	.word	.LANCHOR23
+	.word	.LANCHOR37
+	.word	.LANCHOR2
+	.word	.LC94
+	.word	.LANCHOR20
+	.word	.LANCHOR112
+	.word	.LC95
+	.word	.LC96
+	.word	.LANCHOR39
+	.word	.LANCHOR137
+	.cfi_endproc
+.LFE229:
+	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
+	.section	.text.allocate_data_superblock,"ax",%progbits
+	.align	1
+	.global	allocate_data_superblock
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	allocate_data_superblock, %function
+allocate_data_superblock:
+.LFB301:
+	.loc 2 2531 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1182:
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 48
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 2531 0
+	mov	r4, r0
+	ldr	r8, .L1061
+.LVL1183:
+.L1024:
+	.loc 2 2537 0
+	ldr	r3, .L1061
+	ldr	r6, .L1061+4
+	ldr	fp, .L1061+76
+	ldrh	r3, [r3]
+	ldrh	r2, [r6]
+	add	r3, r3, r2
+	ldrh	r2, [fp]
+	cmp	r3, r2
+	ble	.L1025
+	.loc 2 2537 0 is_stmt 0 discriminator 1
+	movw	r2, #2537
+	ldr	r1, .L1061+8
+	ldr	r0, .L1061+12
+	bl	printf
+.LVL1184:
+.L1025:
+	.loc 2 2539 0 is_stmt 1
+	ldr	r3, .L1061+16
+	cmp	r4, r3
+	bne	.L1050
+	.loc 2 2540 0
+	ldr	r2, .L1061+20
+	ldrh	r3, [r8]
+	ldr	r2, [r2]
+	lsrs	r1, r3, #1
+	muls	r2, r3, r2
+	adds	r1, r1, #1
+	add	r1, r1, r2, lsr #2
+	uxth	r1, r1
+.LVL1185:
+	.loc 2 2544 0
+	cbz	r1, .L1026
+	.loc 2 2545 0
+	subs	r1, r1, #1
+.LVL1186:
+	uxth	r1, r1
+.LVL1187:
+.L1026:
+	.loc 2 2546 0
+	ldr	r0, .L1061+24
+	bl	List_pop_index_node
+.LVL1188:
+	ldrh	r3, [r8]
+	mov	r5, r0
+	uxth	r7, r0
+.LVL1189:
+	cbnz	r3, .L1027
+	.loc 2 2546 0 is_stmt 0 discriminator 1
+	movw	r2, #2546
+	ldr	r1, .L1061+8
+	ldr	r0, .L1061+12
+	bl	printf
+.LVL1190:
+.L1027:
+	.loc 2 2546 0 discriminator 3
+	ldrh	r3, [r8]
+	.loc 2 2550 0 is_stmt 1 discriminator 3
+	mov	r0, r4
+	.loc 2 2546 0 discriminator 3
+	subs	r3, r3, #1
+	strh	r3, [r8]	@ movhi
+	.loc 2 2549 0 discriminator 3
+	strh	r7, [r4]	@ movhi
+	.loc 2 2550 0 discriminator 3
+	bl	make_superblock
+.LVL1191:
+	.loc 2 2551 0 discriminator 3
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	cbnz	r3, .L1028
+	.loc 2 2555 0
+	ldr	r3, .L1061+28
+	uxth	r5, r5
+	movw	r2, #65535
+	.loc 2 2556 0
+	mov	r0, r7
+	.loc 2 2555 0
+	ldr	r3, [r3]
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	.loc 2 2556 0
+	bl	INSERT_DATA_LIST
+.LVL1192:
+	.loc 2 2557 0
+	ldrh	r2, [r6]
+	ldrh	r3, [r8]
+	add	r3, r3, r2
+	ldrh	r2, [fp]
+	cmp	r3, r2
+	ble	.L1024
+	.loc 2 2557 0 is_stmt 0 discriminator 1
+	movw	r2, #2557
+	ldr	r1, .L1061+8
+	ldr	r0, .L1061+12
+	bl	printf
+.LVL1193:
+	b	.L1024
+.LVL1194:
+.L1050:
+	movs	r1, #0
+	b	.L1026
+.LVL1195:
+.L1028:
+	.loc 2 2560 0 is_stmt 1
+	ldrh	r2, [r6]
+	ldrh	r3, [r8]
+	add	r3, r3, r2
+	ldrh	r2, [fp]
+	cmp	r3, r2
+	ble	.L1030
+	.loc 2 2560 0 is_stmt 0 discriminator 1
+	mov	r2, #2560
+	ldr	r1, .L1061+8
+	ldr	r0, .L1061+12
+	bl	printf
+.LVL1196:
+.L1030:
+	.loc 2 2564 0 is_stmt 1 discriminator 1
+	ldr	r3, .L1061+32
+	movs	r6, #0
+	.loc 2 2563 0 discriminator 1
+	ldr	r2, .L1061+36
+	add	ip, r4, #16
+	.loc 2 2564 0 discriminator 1
+	mov	lr, r6
+	.loc 2 2566 0 discriminator 1
+	movw	r10, #65535
+	.loc 2 2564 0 discriminator 1
+	ldr	r0, [r3]
+	ldrh	r1, [r2]
+	movs	r2, #20
+	.loc 2 2567 0 discriminator 1
+	str	r2, [sp, #4]
+	mov	r3, r0
+	mla	r1, r2, r1, r0
+	str	r1, [sp]
+.L1031:
+.LVL1197:
+	.loc 2 2563 0 discriminator 1
+	ldr	r2, [sp]
+	cmp	r2, r3
+	bne	.L1033
+	.loc 2 2571 0
+	cbnz	r6, .L1034
+	.loc 2 2571 0 is_stmt 0 discriminator 1
+	movw	r2, #2571
+	ldr	r1, .L1061+8
+	ldr	r0, .L1061+12
+	bl	printf
+.LVL1198:
+.L1034:
+	.loc 2 2573 0 is_stmt 1
+	ldr	r3, .L1061+40
+	ldrh	r3, [r3]
+	cmp	r3, r7
+	bne	.L1035
+	.loc 2 2573 0 is_stmt 0 discriminator 1
+	movw	r2, #2573
+	ldr	r1, .L1061+8
+	ldr	r0, .L1061+12
+	bl	printf
+.LVL1199:
+.L1035:
+	.loc 2 2574 0 is_stmt 1
+	ldrb	r1, [r4, #8]	@ zero_extendqisi2
+	uxth	r5, r5
+	ldr	r2, .L1061+44
+	ldr	r3, .L1061+48
+	ldr	r10, .L1061+80
+	cmp	r1, #0
+	bne	.L1036
+	.loc 2 2575 0
+	ldr	r0, [r2]
+	ldrh	lr, [r0, r5, lsl #1]
+	cmp	lr, #0
+	beq	.L1037
+	.loc 2 2576 0
+	ldr	r1, .L1061+52
+	ldrh	ip, [r1]
+	add	r1, lr, ip
+.L1060:
+	.loc 2 2578 0
+	strh	r1, [r0, r5, lsl #1]	@ movhi
+	.loc 2 2580 0
+	mov	r0, r7
+	.loc 2 2579 0
+	ldr	r1, [r3]
+	str	r2, [sp, #4]
+	str	r3, [sp]
+	adds	r1, r1, #1
+	str	r1, [r3]
+	.loc 2 2580 0
+	movs	r1, #0
+	bl	ftl_set_blk_mode
+.LVL1200:
+	ldr	r3, [sp]
+	ldr	r2, [sp, #4]
+.L1039:
+	.loc 2 2587 0
+	ldr	r2, [r2]
+	lsls	r1, r5, #1
+	str	r1, [sp]
+	ldrh	r0, [r2, r5, lsl #1]
+	ldr	r2, .L1061+56
+	ldr	r1, [r2]
+	cmp	r0, r1
+	.loc 2 2590 0
+	ldrh	r1, [fp]
+	.loc 2 2588 0
+	it	hi
+	strhi	r0, [r2]
+	.loc 2 2590 0
+	ldr	r2, .L1061+52
+	ldr	r0, [r3]
+	ldr	r3, [r10]
+	ldrh	r2, [r2]
+	mla	r0, r0, r2, r3
+	bl	__aeabi_uidiv
+.LVL1201:
+	ldr	r3, .L1061+60
+	.loc 2 2594 0
+	ldr	ip, .L1061+84
+	.loc 2 2590 0
+	str	r0, [r3]
+	.loc 2 2591 0
+	ldr	r3, .L1061+64
+	ldr	r2, [r3]
+	ldr	r3, [r2, #16]
+	adds	r3, r3, #1
+	str	r3, [r2, #16]
+.LVL1202:
+	movs	r2, #20
+	.loc 2 2594 0
+	ldr	r3, .L1061+32
+	ldr	r0, [r3]
+	adds	r3, r0, #4
+	mla	r2, r2, r6, r0
+	adds	r2, r2, #24
+.LVL1203:
+.L1041:
+	adds	r3, r3, #20
+	.loc 2 2593 0 discriminator 1
+	cmp	r2, r3
+	bne	.L1042
+	.loc 2 2595 0
+	ldrb	r1, [r4, #8]	@ zero_extendqisi2
+	mov	r2, r6
+	.loc 2 2597 0
+	mov	r10, #0
+	.loc 2 2595 0
+	bl	FlashEraseBlocks
+.LVL1204:
+	.loc 2 2596 0
+	mov	r3, r10
+	.loc 2 2598 0
+	movs	r1, #20
+.LVL1205:
+.L1043:
+	.loc 2 2597 0 discriminator 1
+	uxth	r2, r10
+	cmp	r6, r2
+	bhi	.L1045
+	.loc 2 2608 0
+	cbz	r3, .L1046
+	.loc 2 2609 0
+	mov	r0, r7
+	bl	update_multiplier_value
+.LVL1206:
+	.loc 2 2610 0
+	bl	FtlBbmTblFlush
+.LVL1207:
+.L1046:
+	.loc 2 2613 0
+	ldrb	r2, [r4, #7]	@ zero_extendqisi2
+	ldr	r1, .L1061+28
+	cmp	r2, #0
+	bne	.L1047
+	.loc 2 2615 0
+	ldr	r3, [r1]
+	movw	r2, #65535
+	.loc 2 2616 0
+	mov	r0, r7
+	.loc 2 2615 0
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	.loc 2 2616 0
+	bl	INSERT_DATA_LIST
+.LVL1208:
+	.loc 2 2617 0
+	b	.L1024
+.LVL1209:
+.L1033:
+	.loc 2 2566 0
+	ldrh	r1, [ip], #2
+	.loc 2 2564 0
+	str	lr, [r3, #8]
+	.loc 2 2565 0
+	str	lr, [r3, #12]
+	.loc 2 2566 0
+	cmp	r1, r10
+	beq	.L1032
+	.loc 2 2567 0
+	ldr	r2, [sp, #4]
+	lsls	r1, r1, #10
+	mla	r2, r2, r6, r0
+	.loc 2 2568 0
+	adds	r6, r6, #1
+.LVL1210:
+	uxth	r6, r6
+.LVL1211:
+	.loc 2 2567 0
+	str	r1, [r2, #4]
+.L1032:
+	adds	r3, r3, #20
+	b	.L1031
+.L1037:
+	.loc 2 2578 0
+	movs	r1, #2
+	b	.L1060
+.L1036:
+	.loc 2 2582 0
+	ldr	r0, [r2]
+	str	r3, [sp, #4]
+	str	r2, [sp]
+	ldrh	r1, [r0, r5, lsl #1]
+	adds	r1, r1, #1
+	strh	r1, [r0, r5, lsl #1]	@ movhi
+.LBB243:
+.LBB244:
+	mov	r0, r7
+.LBE244:
+.LBE243:
+	.loc 2 2583 0
+	ldr	r1, [r10]
+	adds	r1, r1, #1
+	str	r1, [r10]
+.LVL1212:
+.LBB246:
+.LBB245:
+	bl	ftl_set_blk_mode.part.7
+.LVL1213:
+	ldm	sp, {r2, r3}
+	b	.L1039
+.LVL1214:
+.L1042:
+.LBE245:
+.LBE246:
+	.loc 2 2594 0 discriminator 3
+	ldr	r1, [r3, #-20]
+	and	r1, r1, ip
+	str	r1, [r3, #-20]
+	b	.L1041
+.LVL1215:
+.L1045:
+	.loc 2 2598 0
+	ldr	r0, .L1061+32
+	mul	r2, r1, r10
+	ldr	r0, [r0]
+	add	ip, r0, r2
+	ldr	r2, [r0, r2]
+	adds	r0, r2, #1
+	bne	.L1044
+	.loc 2 2600 0
+	ldr	r0, [ip, #4]
+	.loc 2 2599 0
+	adds	r3, r3, #1
+.LVL1216:
+	str	r1, [sp, #12]
+	str	r2, [sp, #8]
+	.loc 2 2601 0
+	ubfx	r0, r0, #10, #16
+	.loc 2 2599 0
+	str	r3, [sp, #4]
+.LVL1217:
+	.loc 2 2601 0
+	bl	FtlBbmMapBadBlock
+.LVL1218:
+	.loc 2 2602 0
+	ldr	r2, [sp, #8]
+	add	r0, r4, r10, lsl #1
+	.loc 2 2603 0
+	ldr	r1, [sp, #12]
+	ldr	r3, [sp, #4]
+	.loc 2 2602 0
+	strh	r2, [r0, #16]	@ movhi
+	.loc 2 2603 0
+	ldrb	r2, [r4, #7]	@ zero_extendqisi2
+	subs	r2, r2, #1
+	strb	r2, [r4, #7]
+.LVL1219:
+.L1044:
+	add	r10, r10, #1
+.LVL1220:
+	b	.L1043
+.LVL1221:
+.L1047:
+	.loc 2 2620 0
+	ldr	r3, .L1061+68
+	.loc 2 2624 0
+	ldr	r0, .L1061+72
+	.loc 2 2620 0
+	ldrh	r3, [r3]
+	.loc 2 2621 0
+	strh	r7, [r4]	@ movhi
+	.loc 2 2620 0
+	smulbb	r3, r3, r2
+	.loc 2 2622 0
+	movs	r2, #0
+	strh	r2, [r4, #2]	@ movhi
+	.loc 2 2623 0
+	strb	r2, [r4, #6]
+	.loc 2 2624 0
+	ldr	r2, [r0]
+	.loc 2 2620 0
+	uxth	r3, r3
+	strh	r3, [r4, #4]	@ movhi
+	.loc 2 2624 0
+	str	r2, [r4, #12]
+	adds	r2, r2, #1
+	str	r2, [r0]
+	.loc 2 2625 0
+	ldr	r2, [r1]
+	ldr	r1, [sp]
+	strh	r3, [r2, r1]	@ movhi
+	.loc 2 2626 0
+	ldrh	r3, [r4, #4]
+	cbz	r3, .L1048
+	.loc 2 2626 0 is_stmt 0 discriminator 2
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	cbnz	r3, .L1049
+.L1048:
+	.loc 2 2626 0 discriminator 3
+	movw	r2, #2626
+	ldr	r1, .L1061+8
+	ldr	r0, .L1061+12
+	bl	printf
+.LVL1222:
+.L1049:
+	.loc 2 2628 0 is_stmt 1
+	movs	r0, #0
+	add	sp, sp, #16
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1223:
+.L1062:
+	.align	2
+.L1061:
+	.word	.LANCHOR48
+	.word	.LANCHOR45
+	.word	.LANCHOR158
+	.word	.LC1
+	.word	.LANCHOR53
+	.word	.LANCHOR89
+	.word	.LANCHOR47
+	.word	.LANCHOR43
+	.word	.LANCHOR112
+	.word	.LANCHOR3
+	.word	.LANCHOR82
+	.word	.LANCHOR40
+	.word	.LANCHOR73
+	.word	.LANCHOR14
+	.word	.LANCHOR77
+	.word	.LANCHOR75
+	.word	.LANCHOR127
+	.word	.LANCHOR19
+	.word	.LANCHOR71
+	.word	.LANCHOR5
+	.word	.LANCHOR74
+	.word	-1024
+	.cfi_endproc
+.LFE301:
+	.size	allocate_data_superblock, .-allocate_data_superblock
+	.section	.text.FtlGcFreeBadSuperBlk,"ax",%progbits
+	.align	1
+	.global	FtlGcFreeBadSuperBlk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcFreeBadSuperBlk, %function
+FtlGcFreeBadSuperBlk:
+.LFB320:
+	.loc 5 390 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1224:
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 5 390 0
+	mov	r10, r0
+	.loc 5 395 0
+	ldr	r4, .L1075
+	ldrh	r3, [r4]
+	cbz	r3, .L1064
+.LBB249:
+.LBB250:
+	.loc 5 399 0
+	ldr	r8, .L1075+16
+.LBE250:
+.LBE249:
+	movs	r6, #0
+.LVL1225:
+.L1065:
+.LBB253:
+.LBB251:
+	.loc 5 396 0
+	ldr	r3, .L1075+4
+	ldrh	r2, [r3]
+	uxth	r3, r6
+	cmp	r2, r3
+	bhi	.L1071
+	.loc 5 412 0
+	bl	FtlGcReFreshBadBlk
+.LVL1226:
+.L1064:
+.LBE251:
+.LBE253:
+	.loc 5 415 0
+	movs	r0, #0
+	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1227:
+.L1071:
+	.cfi_restore_state
+.LBB254:
+.LBB252:
+	.loc 5 397 0
+	ldr	r2, .L1075+8
+	uxth	r3, r6
+	mov	r1, r10
+	movs	r7, #0
+	ldrb	r0, [r2, r3]	@ zero_extendqisi2
+	bl	V2P_block
+.LVL1228:
+	.loc 5 401 0
+	ldr	r2, .L1075+12
+	.loc 5 397 0
+	mov	fp, r0
+.LVL1229:
+.L1066:
+	.loc 5 398 0
+	ldrh	r3, [r4]
+	uxth	r5, r7
+.LVL1230:
+	cmp	r3, r5
+	bhi	.L1070
+.LVL1231:
+	adds	r6, r6, #1
+.LVL1232:
+	b	.L1065
+.LVL1233:
+.L1070:
+	.loc 5 399 0
+	uxth	r3, r7
+	ldrh	r1, [r8, r3, lsl #1]
+	cmp	r1, fp
+	bne	.L1067
+	.loc 5 401 0
+	mov	r1, fp
+	mov	r0, r2
+	str	r3, [sp, #4]
+	str	r2, [sp]
+	bl	printf
+.LVL1234:
+	.loc 5 403 0
+	mov	r0, fp
+	bl	FtlBbmMapBadBlock
+.LVL1235:
+	.loc 5 404 0
+	bl	FtlBbmTblFlush
+.LVL1236:
+	ldr	r3, [sp, #4]
+	.loc 5 405 0
+	ldrh	r1, [r4]
+	ldr	r2, [sp]
+	add	r3, r8, r3, lsl #1
+.LVL1237:
+.L1068:
+	cmp	r5, r1
+	bcc	.L1069
+	.loc 5 407 0
+	subs	r1, r1, #1
+	strh	r1, [r4]	@ movhi
+.LVL1238:
+.L1067:
+	adds	r7, r7, #1
+.LVL1239:
+	b	.L1066
+.LVL1240:
+.L1069:
+	.loc 5 406 0
+	ldrh	r0, [r3, #2]!
+	.loc 5 405 0
+	adds	r5, r5, #1
+.LVL1241:
+	uxth	r5, r5
+.LVL1242:
+	.loc 5 406 0
+	strh	r0, [r3, #-2]	@ movhi
+	b	.L1068
+.L1076:
+	.align	2
+.L1075:
+	.word	.LANCHOR103
+	.word	.LANCHOR3
+	.word	.LANCHOR13
+	.word	.LC97
+	.word	.LANCHOR104
+.LBE252:
+.LBE254:
+	.cfi_endproc
+.LFE320:
+	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
+	.section	.text.update_vpc_list,"ax",%progbits
+	.align	1
+	.global	update_vpc_list
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	update_vpc_list, %function
+update_vpc_list:
+.LFB304:
+	.loc 2 2687 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1243:
+	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 2 2687 0
+	mov	r4, r0
+	.loc 2 2688 0
+	ldr	r3, .L1087
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r0, lsl #1]
+	cmp	r3, #0
+	bne	.L1078
+	.loc 2 2689 0
+	ldr	r2, .L1087+4
+	ldrh	r1, [r2]
+	cmp	r1, r0
+	bne	.L1079
+	.loc 2 2691 0
+	movw	r3, #65535
+	strh	r3, [r2]	@ movhi
+.L1080:
+.LVL1244:
+.LBB257:
+.LBB258:
+	.loc 2 2696 0
+	ldr	r5, .L1087+8
+	mov	r1, r4
+	ldr	r0, .L1087+12
+.LVL1245:
+	bl	List_remove_node
+.LVL1246:
+	ldrh	r3, [r5]
+	cbnz	r3, .L1082
+	movw	r2, #2696
+	ldr	r1, .L1087+16
+	ldr	r0, .L1087+20
+	bl	printf
+.LVL1247:
+.L1082:
+	ldrh	r3, [r5]
+	.loc 2 2697 0
+	mov	r0, r4
+	.loc 2 2696 0
+	subs	r3, r3, #1
+	strh	r3, [r5]	@ movhi
+	.loc 2 2697 0
+	bl	free_data_superblock
+.LVL1248:
+	.loc 2 2698 0
+	mov	r0, r4
+	bl	FtlGcFreeBadSuperBlk
+.LVL1249:
+	.loc 2 2699 0
+	ldr	r3, .L1087+24
+	ldrh	r2, [r5]
+	ldrh	r3, [r3]
+	add	r3, r3, r2
+	ldr	r2, .L1087+28
+	ldrh	r2, [r2]
+	cmp	r3, r2
+	ble	.L1086
+	movw	r2, #2699
+	ldr	r1, .L1087+16
+	ldr	r0, .L1087+20
+	bl	printf
+.LVL1250:
+.L1086:
+	movs	r3, #1
+	b	.L1077
+.LVL1251:
+.L1079:
+.LBE258:
+.LBE257:
+	.loc 2 2692 0
+	ldr	r2, .L1087+32
+	ldrh	r2, [r2]
+	cmp	r2, r0
+	beq	.L1077
+	.loc 2 2692 0 is_stmt 0 discriminator 1
+	ldr	r2, .L1087+36
+	ldrh	r2, [r2]
+	cmp	r2, r0
+	beq	.L1077
+	.loc 2 2692 0 discriminator 2
+	ldr	r2, .L1087+40
+	ldrh	r2, [r2]
+	cmp	r2, r0
+	bne	.L1080
+.LVL1252:
+.L1077:
+	.loc 2 2705 0 is_stmt 1
+	mov	r0, r3
+	pop	{r3, r4, r5, pc}
+.LVL1253:
+.L1078:
+	.loc 2 2702 0
+	bl	List_update_data_list
+.LVL1254:
+	.loc 2 2704 0
+	movs	r3, #0
+	b	.L1077
+.L1088:
+	.align	2
+.L1087:
+	.word	.LANCHOR43
+	.word	.LANCHOR82
+	.word	.LANCHOR45
+	.word	.LANCHOR42
+	.word	.LANCHOR159
+	.word	.LC1
+	.word	.LANCHOR48
+	.word	.LANCHOR5
+	.word	.LANCHOR51
+	.word	.LANCHOR52
+	.word	.LANCHOR53
+	.cfi_endproc
+.LFE304:
+	.size	update_vpc_list, .-update_vpc_list
+	.section	.text.decrement_vpc_count,"ax",%progbits
+	.align	1
+	.global	decrement_vpc_count
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	decrement_vpc_count, %function
+decrement_vpc_count:
+.LFB305:
+	.loc 2 2708 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1255:
+	.loc 2 2711 0
+	movw	r3, #65535
+	.loc 2 2708 0
+	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 2 2711 0
+	cmp	r0, r3
+	.loc 2 2708 0
+	mov	r4, r0
+	.loc 2 2711 0
+	beq	.L1090
+	.loc 2 2712 0
+	ldr	r5, .L1098
+	ldr	r3, [r5]
+	ldrh	r2, [r3, r0, lsl #1]
+	cbnz	r2, .L1091
+	.loc 2 2713 0
+	mov	r1, r0
+	ldr	r0, .L1098+4
+.LVL1256:
+	bl	printf
+.LVL1257:
+	.loc 2 2714 0
+	ldr	r3, [r5]
+	ldrh	r5, [r3, r4, lsl #1]
+	cbz	r5, .L1092
+.L1096:
+	.loc 2 2723 0
+	movs	r5, #0
+.LVL1258:
+.L1089:
+	.loc 2 2733 0
+	mov	r0, r5
+	pop	{r4, r5, r6, pc}
+.LVL1259:
+.L1092:
+	.loc 2 2714 0 discriminator 1
+	movw	r2, #2714
+.LVL1260:
+.L1097:
+	.loc 2 2730 0 discriminator 2
+	ldr	r1, .L1098+8
+	ldr	r0, .L1098+12
+	bl	printf
+.LVL1261:
+	b	.L1089
+.LVL1262:
+.L1091:
+	.loc 2 2717 0
+	subs	r2, r2, #1
+	strh	r2, [r3, r0, lsl #1]	@ movhi
+.L1090:
+	.loc 2 2721 0
+	ldr	r6, .L1098+16
+	movw	r3, #65535
+	ldrh	r0, [r6]
+.LVL1263:
+	cmp	r0, r3
+	bne	.L1094
+	.loc 2 2722 0
+	strh	r4, [r6]	@ movhi
+	b	.L1096
+.L1094:
+	.loc 2 2724 0
+	cmp	r4, r0
+	beq	.L1096
+	.loc 2 2727 0
+	bl	update_vpc_list
+.LVL1264:
+	.loc 2 2730 0
+	ldr	r3, .L1098+20
+	.loc 2 2727 0
+	adds	r5, r0, #0
+	.loc 2 2730 0
+	ldr	r2, .L1098+24
+	.loc 2 2727 0
+	it	ne
+	movne	r5, #1
+.LVL1265:
+	.loc 2 2729 0
+	strh	r4, [r6]	@ movhi
+	.loc 2 2730 0
+	ldr	r3, [r3]
+	ldr	r2, [r2]
+	subs	r3, r3, r2
+	asrs	r2, r3, #1
+	ldr	r3, .L1098+28
+	muls	r3, r2, r3
+	ldr	r2, .L1098
+	ldr	r2, [r2]
+	uxth	r1, r3
+	ldrh	r2, [r2, r1, lsl #1]
+	cmp	r2, #0
+	bne	.L1089
+	.loc 2 2730 0 is_stmt 0 discriminator 1
+	cmp	r4, r1
+	beq	.L1089
+	.loc 2 2730 0 discriminator 2
+	movw	r2, #2730
+	b	.L1097
+.L1099:
+	.align	2
+.L1098:
+	.word	.LANCHOR43
+	.word	.LC98
+	.word	.LANCHOR160
+	.word	.LC1
+	.word	.LANCHOR151
+	.word	.LANCHOR42
+	.word	.LANCHOR41
+	.word	-1431655765
+	.cfi_endproc
+.LFE305:
+	.size	decrement_vpc_count, .-decrement_vpc_count
+	.section	.text.FtlWriteDump_data,"ax",%progbits
+	.align	1
+	.global	FtlWriteDump_data
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlWriteDump_data, %function
+FtlWriteDump_data:
+.LFB271:
+	.loc 2 947 0 is_stmt 1
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	sub	sp, sp, #24
+	.cfi_def_cfa_offset 56
+	.loc 2 948 0
+	ldr	r4, .L1119
+	ldrh	r2, [r4, #4]
+	cmp	r2, #0
+	beq	.L1101
+	.loc 2 948 0 is_stmt 0 discriminator 1
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L1101
+	.loc 2 949 0 is_stmt 1
+	ldr	r3, .L1119+4
+	ldrb	r1, [r4, #7]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	muls	r3, r1, r3
+	cmp	r2, r3
+	beq	.L1101
+.LVL1266:
+.LBB262:
+.LBB263:
+	.loc 2 956 0
+	ldrb	r7, [r4, #10]	@ zero_extendqisi2
+	cbnz	r7, .L1100
+	.loc 2 951 0
+	ldr	r3, .L1119+8
+	.loc 2 958 0
+	mov	r2, r7
+	mov	r1, sp
+	.loc 2 951 0
+	ldr	r6, [r3]
+	.loc 2 953 0
+	ldr	r3, .L1119+12
+	.loc 2 951 0
+	subs	r6, r6, #1
+	.loc 2 958 0
+	mov	r0, r6
+	.loc 2 953 0
+	ldrh	r8, [r3]
+	.loc 2 958 0
+	bl	log2phys
+.LVL1267:
+	.loc 2 963 0
+	ldr	r2, .L1119+16
+	.loc 2 961 0
+	ldr	r3, [sp]
+	.loc 2 962 0
+	str	r6, [sp, #20]
+	.loc 2 963 0
+	ldr	r0, [r2]
+	.loc 2 964 0
+	ldr	r2, .L1119+20
+	.loc 2 961 0
+	str	r3, [sp, #8]
+	.loc 2 967 0
+	adds	r3, r3, #1
+	.loc 2 963 0
+	str	r0, [sp, #12]
+	.loc 2 964 0
+	ldr	r5, [r2]
+	str	r5, [sp, #16]
+.LVL1268:
+	.loc 2 966 0
+	str	r7, [r5, #4]
+	.loc 2 967 0
+	beq	.L1103
+	.loc 2 969 0
+	mov	r2, r7
+	movs	r1, #1
+	add	r0, sp, #4
+	bl	FlashReadPages
+.LVL1269:
+.L1104:
+	.loc 2 986 0
+	ldr	fp, .L1119
+	.loc 2 953 0
+	lsl	r8, r8, #2
+.LVL1270:
+	.loc 2 987 0
+	ldr	r10, .L1119+28
+	.loc 2 975 0
+	movs	r7, #0
+	movw	r3, #61589
+	strh	r3, [r5]	@ movhi
+.L1105:
+	.loc 2 976 0
+	cmp	r8, r7
+	bne	.L1109
+.L1106:
+	.loc 2 992 0
+	movs	r3, #1
+.LVL1271:
+.L1118:
+.LBE263:
+.LBE262:
+	.loc 2 998 0
+	strb	r3, [r4, #10]
+.L1100:
+	.loc 2 1000 0
+	add	sp, sp, #24
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1272:
+.L1103:
+	.cfi_restore_state
+.LBB265:
+.LBB264:
+	.loc 2 973 0
+	ldr	r3, .L1119+24
+	movs	r1, #255
+	ldrh	r2, [r3]
+	bl	ftl_memset
+.LVL1273:
+	b	.L1104
+.LVL1274:
+.L1109:
+	.loc 2 978 0
+	ldrh	r3, [r4, #4]
+	cmp	r3, #0
+	beq	.L1106
+	.loc 2 983 0
+	ldr	r3, [sp, #8]
+	.loc 2 986 0
+	mov	r0, fp
+	.loc 2 982 0
+	str	r6, [r5, #8]
+	adds	r7, r7, #1
+	.loc 2 983 0
+	str	r3, [r5, #12]
+	.loc 2 984 0
+	ldrh	r3, [r4]
+	strh	r3, [r5, #2]	@ movhi
+	.loc 2 986 0
+	bl	get_new_active_ppa
+.LVL1275:
+	.loc 2 987 0
+	ldr	r3, [r10]
+	.loc 2 988 0
+	movs	r1, #1
+	.loc 2 986 0
+	str	r0, [sp, #8]
+	.loc 2 988 0
+	add	r0, sp, #4
+	.loc 2 987 0
+	str	r3, [r5, #4]
+	adds	r3, r3, #1
+	adds	r2, r3, #1
+	it	eq
+	moveq	r3, #0
+	str	r3, [r10]
+	.loc 2 988 0
+	movs	r3, #0
+	mov	r2, r3
+	bl	FlashProgPages
+.LVL1276:
+	.loc 2 990 0
+	ldrh	r0, [r4]
+	bl	decrement_vpc_count
+.LVL1277:
+	b	.L1105
+.LVL1278:
+.L1101:
+.LBE264:
+.LBE265:
+	.loc 2 998 0
+	movs	r3, #0
+	b	.L1118
+.L1120:
+	.align	2
+.L1119:
+	.word	.LANCHOR51
+	.word	.LANCHOR19
+	.word	.LANCHOR62
+	.word	.LANCHOR3
+	.word	.LANCHOR39
+	.word	.LANCHOR109
+	.word	.LANCHOR23
+	.word	.LANCHOR72
+	.cfi_endproc
+.LFE271:
+	.size	FtlWriteDump_data, .-FtlWriteDump_data
+	.section	.text.l2p_flush,"ax",%progbits
+	.align	1
+	.global	l2p_flush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	l2p_flush, %function
+l2p_flush:
+.LFB264:
+	.loc 2 740 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 2 746 0
+	movs	r4, #0
+	ldr	r5, .L1125
+	.loc 2 747 0
+	ldr	r6, .L1125+4
+	.loc 2 744 0
+	bl	FtlWriteDump_data
+.LVL1279:
+.L1122:
+	.loc 2 746 0 discriminator 1
+	ldrh	r3, [r5]
+	uxth	r0, r4
+.LVL1280:
+	cmp	r3, r0
+	bhi	.L1124
+	.loc 2 750 0
+	movs	r0, #0
+.LVL1281:
+	pop	{r4, r5, r6, pc}
+.LVL1282:
+.L1124:
+	.loc 2 747 0
+	ldr	r2, [r6]
+	uxth	r3, r4
+	movs	r1, #12
+	mla	r3, r1, r3, r2
+	ldr	r3, [r3, #4]
+	cmp	r3, #0
+	bge	.L1123
+	.loc 2 748 0
+	bl	flush_l2p_region
+.LVL1283:
+.L1123:
+	adds	r4, r4, #1
+.LVL1284:
+	b	.L1122
+.L1126:
+	.align	2
+.L1125:
+	.word	.LANCHOR33
+	.word	.LANCHOR56
+	.cfi_endproc
+.LFE264:
+	.size	l2p_flush, .-l2p_flush
+	.section	.text.FtlRecoverySuperblock,"ax",%progbits
+	.align	1
+	.global	FtlRecoverySuperblock
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlRecoverySuperblock, %function
+FtlRecoverySuperblock:
+.LFB284:
+	.loc 2 1656 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 48
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1285:
+	.loc 2 1670 0
+	ldrh	r3, [r0]
+	movw	r2, #65535
+	.loc 2 1656 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	mov	r8, r0
+	sub	sp, sp, #48
+	.cfi_def_cfa_offset 80
+	.loc 2 1670 0
+	cmp	r3, r2
+	beq	.L1256
+	.loc 2 1675 0
+	ldrh	r3, [r0, #2]
+	str	r3, [sp, #4]
+.LVL1286:
+	.loc 2 1676 0
+	ldrb	r3, [r0, #6]	@ zero_extendqisi2
+	.loc 2 1681 0
+	ldr	r1, [sp, #4]
+	.loc 2 1676 0
+	str	r3, [sp, #20]
+.LVL1287:
+	.loc 2 1681 0
+	ldr	r3, .L1264
+	ldrh	r3, [r3]
+	cmp	r3, r1
+	mov	r3, #0
+	bne	.L1130
+	.loc 2 1682 0
+	strh	r3, [r0, #4]	@ movhi
+.LVL1288:
+.L1262:
+	.loc 2 1989 0
+	strb	r3, [r8, #6]
+.LVL1289:
+.L1256:
+	.loc 2 2010 0
+	movs	r0, #0
+	add	sp, sp, #48
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1290:
+.L1130:
+	.cfi_restore_state
+	.loc 2 1689 0
+	ldrh	r0, [r0, #16]
+.LVL1291:
+.L1131:
+	.loc 2 1690 0
+	cmp	r0, r2
+	uxth	r5, r3
+.LVL1292:
+	add	r3, r3, #1
+	beq	.L1132
+	.loc 2 1697 0
+	movs	r1, #1
+	bl	FtlGetLastWrittenPage
+.LVL1293:
+	mov	r4, r0
+.LVL1294:
+	.loc 2 1705 0
+	adds	r0, r0, #1
+.LVL1295:
+	beq	.L1133
+	.loc 2 1717 0
+	ldr	r3, .L1264+4
+	.loc 2 1722 0
+	movs	r2, #0
+	mov	r5, r2
+.LVL1296:
+	.loc 2 1719 0
+	movw	fp, #65535
+	.loc 2 1720 0
+	mov	r10, #20
+	.loc 2 1717 0
+	ldrh	ip, [r3]
+	.loc 2 1720 0
+	ldr	r3, .L1264+8
+	ldr	r0, [r3]
+	.loc 2 1721 0
+	ldr	r3, .L1264+12
+	ldr	r3, [r3]
+	str	r3, [sp, #8]
+	ldr	r3, .L1264+16
+	ldrh	r7, [r3]
+	.loc 2 1722 0
+	ldr	r3, .L1264+20
+	ldr	r3, [r3]
+	str	r3, [sp, #12]
+	ldr	r3, .L1264+24
+	ldrh	lr, [r3]
+	add	r3, r8, #16
+	str	r3, [sp, #16]
+	str	r3, [sp]
+.L1134:
+.LVL1297:
+	.loc 2 1717 0 discriminator 1
+	uxth	r3, r2
+	cmp	ip, r3
+	bhi	.L1138
+	.loc 2 1727 0
+	movs	r2, #0
+.LVL1298:
+	mov	r1, r5
+	bl	FlashReadPages
+.LVL1299:
+	.loc 2 1728 0
+	ldr	r2, .L1264+28
+	.loc 2 1742 0
+	uxth	r1, r4
+	.loc 2 1666 0
+	movw	fp, #65535
+	.loc 2 1742 0
+	str	r1, [sp, #12]
+	.loc 2 1728 0
+	ldr	r3, [r2]
+	subs	r3, r3, #1
+	str	r3, [sp]
+.LVL1300:
+	.loc 2 1730 0
+	ldr	r3, .L1264+8
+.LVL1301:
+	ldr	r10, [r3]
+	.loc 2 1729 0
+	movs	r3, #0
+	mov	r7, r10
+.LVL1302:
+.L1139:
+	uxth	r1, r3
+.LVL1303:
+	.loc 2 1729 0 is_stmt 0 discriminator 1
+	cmp	r5, r1
+	bhi	.L1144
+	.loc 2 1745 0 is_stmt 1
+	bne	.L1142
+	.loc 2 1747 0
+	adds	r3, r4, #1
+	uxth	r3, r3
+	str	r3, [sp, #8]
+.LVL1304:
+.L1257:
+	.loc 2 1753 0
+	ldr	r0, [r10, #4]
+	ubfx	r0, r0, #10, #16
+	bl	P2V_plane
+.LVL1305:
+	.loc 2 1758 0
+	ldr	r3, .L1264
+	.loc 2 1753 0
+	mov	r10, r0
+.LVL1306:
+	.loc 2 1758 0
+	ldr	r2, [sp, #8]
+	ldrh	r3, [r3]
+	cmp	r3, r2
+	bne	.L1146
+	.loc 2 1759 0
+	ldrh	r3, [sp, #8]
+	strh	r3, [r8, #2]	@ movhi
+	.loc 2 1760 0
+	movs	r3, #0
+	strb	r3, [r8, #6]
+	.loc 2 1761 0
+	strh	r3, [r8, #4]	@ movhi
+.L1146:
+	.loc 2 1764 0
+	ldr	r3, [sp, #8]
+	ldr	r2, [sp, #4]
+	cmp	r3, r2
+	bne	.L1147
+	.loc 2 1764 0 is_stmt 0 discriminator 1
+	ldr	r3, [sp, #20]
+	cmp	r10, r3
+	bne	.L1147
+	.loc 2 1765 0 is_stmt 1
+	ldr	r1, [sp, #8]
+	mov	r2, r10
+.LVL1307:
+.L1263:
+	.loc 2 2004 0
+	mov	r0, r8
+	bl	ftl_sb_update_avl_pages
+.LVL1308:
+	b	.L1256
+.LVL1309:
+.L1132:
+	.loc 2 1692 0
+	uxth	r1, r3
+	adds	r1, r1, #8
+	ldrh	r0, [r8, r1, lsl #1]
+.LVL1310:
+	b	.L1131
+.LVL1311:
+.L1133:
+	.loc 2 1706 0
+	ldr	r3, [sp, #4]
+	cbz	r3, .L1135
+	.loc 2 1706 0 is_stmt 0 discriminator 1
+	movw	r2, #1706
+	ldr	r1, .L1264+32
+	ldr	r0, .L1264+36
+	bl	printf
+.LVL1312:
+.L1135:
+	.loc 2 1707 0 is_stmt 1
+	ldr	r3, [sp, #20]
+	cbz	r3, .L1136
+	.loc 2 1707 0 is_stmt 0 discriminator 1
+	cmp	r5, r3
+	beq	.L1136
+	.loc 2 1707 0 discriminator 2
+	movw	r2, #1707
+	ldr	r1, .L1264+32
+	ldr	r0, .L1264+36
+	bl	printf
+.LVL1313:
+.L1136:
+	.loc 2 1708 0 is_stmt 1
+	movs	r3, #0
+	strh	r3, [r8, #2]	@ movhi
+	b	.L1262
+.LVL1314:
+.L1138:
+	.loc 2 1718 0
+	ldr	r1, [sp]
+	ldrh	r3, [r1], #2
+	.loc 2 1719 0
+	cmp	r3, fp
+	.loc 2 1718 0
+	str	r1, [sp]
+.LVL1315:
+	.loc 2 1719 0
+	beq	.L1137
+	.loc 2 1720 0
+	mla	r1, r10, r5, r0
+	.loc 2 1721 0
+	ldr	r6, [sp, #8]
+	.loc 2 1720 0
+	orr	r3, r4, r3, lsl #10
+.LVL1316:
+	str	r3, [r1, #4]
+	.loc 2 1721 0
+	mul	r3, r7, r5
+	bic	r3, r3, #3
+	add	r3, r3, r6
+	.loc 2 1722 0
+	ldr	r6, [sp, #12]
+	.loc 2 1721 0
+	str	r3, [r1, #8]
+	.loc 2 1722 0
+	mul	r3, lr, r5
+	.loc 2 1723 0
+	adds	r5, r5, #1
+.LVL1317:
+	uxth	r5, r5
+.LVL1318:
+	.loc 2 1722 0
+	bic	r3, r3, #3
+	add	r3, r3, r6
+	str	r3, [r1, #12]
+.L1137:
+.LVL1319:
+	adds	r2, r2, #1
+.LVL1320:
+	b	.L1134
+.LVL1321:
+.L1144:
+	.loc 2 1730 0
+	ldr	r1, [r7]
+.LVL1322:
+	cbnz	r1, .L1140
+	.loc 2 1731 0
+	ldr	r1, [r7, #12]
+	.loc 2 1732 0
+	ldr	r6, [r1, #4]
+	.loc 2 1731 0
+	str	r1, [sp, #8]
+.LVL1323:
+	.loc 2 1732 0
+	adds	r1, r6, #1
+.LVL1324:
+	beq	.L1141
+	.loc 2 1733 0
+	ldr	r1, [r2]
+	mov	r0, r6
+	bl	ftl_cmp_data_ver
+.LVL1325:
+	cbz	r0, .L1141
+	.loc 2 1735 0
+	adds	r6, r6, #1
+	str	r6, [r2]
+.L1141:
+	.loc 2 1738 0
+	ldr	r1, [sp, #8]
+	ldr	r1, [r1]
+	adds	r1, r1, #1
+	bne	.L1143
+.LVL1326:
+.L1142:
+	.loc 2 1752 0
+	uxth	r2, r4
+	.loc 2 1753 0
+	uxth	r3, r3
+	.loc 2 1752 0
+	str	r2, [sp, #8]
+.LVL1327:
+	.loc 2 1753 0
+	movs	r2, #20
+	mla	r10, r2, r3, r10
+	b	.L1257
+.LVL1328:
+.L1140:
+	.loc 2 1742 0
+	ldr	fp, [sp, #12]
+.LVL1329:
+.L1143:
+	adds	r3, r3, #1
+.LVL1330:
+	adds	r7, r7, #20
+	b	.L1139
+.LVL1331:
+.L1147:
+	.loc 2 1770 0
+	movw	r3, #65535
+	cmp	fp, r3
+	bne	.L1148
+	.loc 2 1770 0 is_stmt 0 discriminator 1
+	ldrb	r3, [r8, #8]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L1149
+.L1148:
+.LVL1332:
+.LBB266:
+	.loc 2 1775 0 is_stmt 1
+	ldr	r3, .L1264+40
+	.loc 2 1774 0
+	uxth	r6, r4
+.LVL1333:
+	.loc 2 1778 0
+	uxth	r4, r4
+.LVL1334:
+	.loc 2 1785 0
+	ldr	r7, .L1264+8
+	.loc 2 1775 0
+	ldr	r2, [r3]
+	adds	r2, r2, #1
+	.loc 2 1776 0
+	itt	eq
+	ldreq	r2, [sp]
+	streq	r2, [r3]
+.LVL1335:
+	.loc 2 1778 0
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #7
+	cmp	r4, r3
+	.loc 2 1779 0
+	itet	gt
+	subgt	r4, r6, #7
+	ldrle	r4, [sp, #4]
+	uxthgt	r4, r4
+.LVL1336:
+.L1152:
+	.loc 2 1780 0 discriminator 1
+	cmp	r4, r6
+	bhi	.L1162
+	.loc 2 1782 0
+	ldr	r3, .L1264+4
+	.loc 2 1784 0
+	movw	lr, #65535
+	.loc 2 1785 0
+	ldr	r0, [r7]
+	mov	ip, #20
+	.loc 2 1782 0
+	ldrh	fp, [r3]
+	.loc 2 1785 0
+	ldr	r3, [sp, #16]
+	str	r3, [sp, #12]
+	movs	r3, #0
+	mov	r5, r3
+	b	.L1163
+.LVL1337:
+.L1154:
+	.loc 2 1783 0
+	ldr	r1, [sp, #12]
+	ldrh	r2, [r1], #2
+	.loc 2 1784 0
+	cmp	r2, lr
+	.loc 2 1783 0
+	str	r1, [sp, #12]
+.LVL1338:
+	.loc 2 1784 0
+	beq	.L1153
+	.loc 2 1785 0
+	mla	r1, ip, r5, r0
+	.loc 2 1786 0
+	adds	r5, r5, #1
+.LVL1339:
+	.loc 2 1785 0
+	orr	r2, r4, r2, lsl #10
+.LVL1340:
+	.loc 2 1786 0
+	uxth	r5, r5
+.LVL1341:
+	.loc 2 1785 0
+	str	r2, [r1, #4]
+.L1153:
+.LVL1342:
+	adds	r3, r3, #1
+.LVL1343:
+.L1163:
+	.loc 2 1782 0 discriminator 1
+	uxth	r2, r3
+	cmp	fp, r2
+	bhi	.L1154
+	.loc 2 1789 0
+	mov	r1, r5
+	movs	r2, #0
+	bl	FlashReadPages
+.LVL1344:
+	ldr	r3, .L1264+40
+	movs	r1, #20
+	.loc 2 1790 0
+	movs	r0, #0
+	.loc 2 1793 0
+	movw	ip, #65535
+	ldr	r2, [r3]
+	ldr	r3, [r7]
+	mla	r5, r1, r5, r3
+.LVL1345:
+.L1155:
+	.loc 2 1790 0 discriminator 1
+	cmp	r3, r5
+	bne	.L1160
+	cbz	r0, .L1161
+	ldr	r3, .L1264+40
+	str	r2, [r3]
+.L1161:
+	.loc 2 1780 0
+	adds	r4, r4, #1
+.LVL1346:
+	uxth	r4, r4
+.LVL1347:
+	b	.L1152
+.L1265:
+	.align	2
+.L1264:
+	.word	.LANCHOR19
+	.word	.LANCHOR3
+	.word	.LANCHOR120
+	.word	.LANCHOR93
+	.word	.LANCHOR23
+	.word	.LANCHOR94
+	.word	.LANCHOR24
+	.word	.LANCHOR72
+	.word	.LANCHOR161
+	.word	.LC1
+	.word	.LANCHOR154
+.L1160:
+	.loc 2 1791 0
+	ldr	r1, [r3]
+	cmp	r1, #0
+	beq	.L1156
+	cbz	r0, .L1149
+.L1258:
+	.loc 2 1809 0
+	ldr	r3, .L1266
+	str	r2, [r3]
+.LVL1348:
+.L1149:
+.LBE266:
+	.loc 2 1814 0
+	ldr	r3, .L1266+4
+	movs	r2, #1
+	.loc 2 1815 0
+	ldr	r0, .L1266+8
+	.loc 2 1824 0
+	ldr	r6, .L1266+12
+	.loc 2 1814 0
+	strh	r2, [r3]	@ movhi
+	.loc 2 1815 0
+	bl	FtlMapBlkWriteDump_data
+.LVL1349:
+	ldr	fp, [sp, #4]
+.LVL1350:
+.L1164:
+	.loc 2 1821 0
+	ldr	r3, .L1266+16
+	.loc 2 1823 0
+	movw	lr, #65535
+	.loc 2 1824 0
+	ldr	r0, [r6]
+	movs	r7, #20
+	.loc 2 1821 0
+	ldr	r1, [sp, #16]
+	ldrh	r4, [r3]
+	movs	r3, #0
+	.loc 2 1820 0
+	str	r3, [sp, #12]
+.LVL1351:
+.L1165:
+	.loc 2 1821 0 discriminator 1
+	uxth	r2, r3
+	cmp	r2, r4
+	bcc	.L1167
+	.loc 2 1828 0
+	movs	r2, #0
+	ldr	r1, [sp, #12]
+	bl	FlashReadPages
+.LVL1352:
+	.loc 2 1829 0
+	movs	r3, #0
+.LVL1353:
+.L1261:
+	str	r3, [sp, #24]
+.LVL1354:
+	.loc 2 1829 0 is_stmt 0 discriminator 2
+	ldr	r2, [sp, #12]
+	ldrh	r3, [sp, #24]
+	cmp	r2, r3
+	bhi	.L1196
+	.loc 2 1983 0 is_stmt 1
+	ldr	r3, .L1266+20
+	.loc 2 1982 0
+	add	fp, fp, #1
+.LVL1355:
+	uxth	fp, fp
+.LVL1356:
+	.loc 2 1983 0
+	ldrh	r3, [r3]
+	cmp	r3, fp
+	bne	.L1164
+	.loc 2 1986 0
+	ldr	r2, .L1266+16
+	.loc 2 1988 0
+	movw	r0, #65535
+	.loc 2 1985 0
+	movs	r3, #0
+	.loc 2 1984 0
+	strh	fp, [r8, #2]	@ movhi
+	.loc 2 1985 0
+	strh	r3, [r8, #4]	@ movhi
+.LVL1357:
+	.loc 2 1986 0
+	ldrh	r2, [r2]
+.LVL1358:
+.L1197:
+	.loc 2 1986 0 is_stmt 0 discriminator 1
+	uxth	r1, r3
+	cmp	r1, r2
+	bcs	.L1256
+	.loc 2 1987 0 is_stmt 1
+	ldr	r1, [sp, #16]
+	ldrh	r4, [r1], #2
+	.loc 2 1988 0
+	cmp	r4, r0
+	.loc 2 1987 0
+	str	r1, [sp, #16]
+.LVL1359:
+	add	r1, r3, #1
+	.loc 2 1988 0
+	bne	.L1262
+	mov	r3, r1
+.LVL1360:
+	b	.L1197
+.LVL1361:
+.L1156:
+.LBB267:
+	.loc 2 1792 0
+	ldr	r1, [r3, #12]
+.LVL1362:
+	.loc 2 1793 0
+	ldrh	lr, [r1]
+	cmp	lr, ip
+	beq	.L1159
+	.loc 2 1795 0
+	ldr	r1, [r1, #4]
+.LVL1363:
+	cmp	r1, #-1
+	itt	ne
+	movne	r2, r1
+	movne	r0, #1
+.L1159:
+	adds	r3, r3, #20
+.LVL1364:
+	b	.L1155
+.LVL1365:
+.L1162:
+	.loc 2 1809 0
+	mov	r2, #-1
+	b	.L1258
+.LVL1366:
+.L1167:
+.LBE267:
+	.loc 2 1822 0
+	ldrh	r2, [r1], #2
+.LVL1367:
+	.loc 2 1823 0
+	cmp	r2, lr
+	beq	.L1166
+	.loc 2 1824 0
+	ldr	r5, [sp, #12]
+	orr	r2, fp, r2, lsl #10
+.LVL1368:
+	mla	ip, r7, r5, r0
+	str	r2, [ip, #4]
+	.loc 2 1825 0
+	mov	r2, r5
+	adds	r2, r2, #1
+	uxth	r2, r2
+	str	r2, [sp, #12]
+.LVL1369:
+.L1166:
+	adds	r3, r3, #1
+.LVL1370:
+	b	.L1165
+.LVL1371:
+.L1196:
+	ldr	r3, [sp, #24]
+	movs	r5, #20
+	muls	r5, r3, r5
+	.loc 2 1830 0
+	ldr	r3, [r6]
+	str	r3, [sp, #28]
+	adds	r7, r3, r5
+	ldr	r4, [r7, #4]
+	.loc 2 1831 0
+	ubfx	r0, r4, #10, #16
+	.loc 2 1830 0
+	str	r4, [sp, #44]
+	.loc 2 1831 0
+	bl	P2V_plane
+.LVL1372:
+	.loc 2 1833 0
+	ldr	r3, [sp, #4]
+	cmp	fp, r3
+	bcc	.L1169
+	.loc 2 1833 0 is_stmt 0 discriminator 1
+	ldr	r3, [sp, #28]
+	bne	.L1170
+	.loc 2 1834 0 is_stmt 1
+	ldr	r2, [sp, #20]
+	cmp	r2, r0
+	bhi	.L1169
+.L1170:
+	.loc 2 1837 0
+	ldr	r2, [sp, #8]
+	cmp	fp, r2
+	bne	.L1171
+	.loc 2 1837 0 is_stmt 0 discriminator 1
+	cmp	r10, r0
+	beq	.L1172
+.L1171:
+.LVL1373:
+	.loc 2 1841 0 is_stmt 1
+	ldr	r3, [r3, r5]
+	adds	r3, r3, #1
+	beq	.L1173
+	.loc 2 1842 0
+	ldr	r3, [r7, #12]
+.LVL1374:
+	.loc 2 1843 0
+	movw	r2, #61589
+	ldrh	r1, [r3]
+	cmp	r1, r2
+	beq	.L1174
+.LVL1375:
+.L1180:
+.LBB268:
+	.loc 2 1876 0
+	ldrh	r0, [r8]
+.LVL1376:
+.L1260:
+.LBE268:
+	.loc 2 1960 0
+	bl	decrement_vpc_count
+.LVL1377:
+.L1169:
+	ldr	r3, [sp, #24]
+	adds	r3, r3, #1
+	b	.L1261
+.LVL1378:
+.L1174:
+	.loc 2 1849 0
+	ldr	r2, [r3, #4]
+	str	r2, [sp]
+.LVL1379:
+	.loc 2 1850 0
+	adds	r2, r2, #1
+.LVL1380:
+	beq	.L1175
+	.loc 2 1851 0 discriminator 1
+	ldr	r2, .L1266+24
+	ldr	r0, [sp]
+.LVL1381:
+	ldr	r1, [r2]
+	bl	ftl_cmp_data_ver
+.LVL1382:
+	.loc 2 1850 0 discriminator 1
+	cbz	r0, .L1175
+	.loc 2 1853 0
+	ldr	r1, [sp]
+	adds	r1, r1, #1
+	str	r1, [r2]
+.L1175:
+	.loc 2 1857 0
+	ldr	r4, [r3, #8]
+.LVL1383:
+	.loc 2 1859 0
+	add	r1, sp, #40
+	.loc 2 1858 0
+	ldr	r3, [r3, #12]
+.LVL1384:
+	.loc 2 1859 0
+	movs	r2, #0
+	mov	r0, r4
+	.loc 2 1858 0
+	str	r3, [sp, #36]
+	.loc 2 1859 0
+	bl	log2phys
+.LVL1385:
+	.loc 2 1860 0
+	ldr	r3, .L1266
+	ldr	r1, [r3]
+	adds	r3, r1, #1
+	beq	.L1176
+	.loc 2 1861 0 discriminator 1
+	ldr	r0, [sp]
+	bl	ftl_cmp_data_ver
+.LVL1386:
+	.loc 2 1860 0 discriminator 1
+	cmp	r0, #0
+	beq	.L1176
+.LBB269:
+	.loc 2 1865 0
+	ldr	r3, [sp, #36]
+	adds	r7, r3, #1
+	beq	.L1177
+	.loc 2 1866 0
+	ldr	r0, [r6]
+	.loc 2 1868 0
+	movs	r2, #0
+	movs	r1, #1
+	.loc 2 1866 0
+	add	r0, r0, r5
+	.loc 2 1867 0
+	str	r3, [r0, #4]
+	.loc 2 1866 0
+	ldr	r7, [r0, #12]
+.LVL1387:
+	.loc 2 1868 0
+	bl	FlashReadPages
+.LVL1388:
+	.loc 2 1881 0
+	ldr	r2, [r6]
+	ldr	r1, [r2, r5]
+	adds	r3, r2, r5
+	adds	r1, r1, #1
+	bne	.L1178
+.LVL1389:
+.L1179:
+	.loc 2 1913 0
+	mov	r3, #-1
+	.loc 2 1914 0
+	ldrh	r0, [r8]
+	.loc 2 1913 0
+	str	r3, [sp, #36]
+	.loc 2 1914 0
+	bl	decrement_vpc_count
+.LVL1390:
+.L1187:
+.LBE269:
+	.loc 2 1954 0
+	ldr	r7, [sp, #36]
+	adds	r0, r7, #1
+	beq	.L1169
+.L1200:
+	.loc 2 1956 0
+	ubfx	r0, r7, #10, #16
+	bl	P2V_block_in_plane
+.LVL1391:
+	.loc 2 1957 0
+	ldr	r3, .L1266+28
+	.loc 2 1956 0
+	mov	r4, r0
+.LVL1392:
+	.loc 2 1957 0
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bhi	.L1192
+	.loc 2 1957 0 is_stmt 0 discriminator 1
+	movw	r2, #1957
+	ldr	r1, .L1266+32
+	ldr	r0, .L1266+36
+.LVL1393:
+	bl	printf
+.LVL1394:
+.L1192:
+	.loc 2 1958 0 is_stmt 1
+	ldr	r3, .L1266+40
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r4, lsl #1]
+	cmp	r3, #0
+	beq	.L1193
+	.loc 2 1960 0
+	mov	r0, r4
+	b	.L1260
+.LVL1395:
+.L1177:
+.LBB270:
+	.loc 2 1872 0
+	ldr	r3, [sp, #44]
+	ldr	r2, [sp, #40]
+	cmp	r2, r3
+	bne	.L1180
+	.loc 2 1873 0
+	movs	r2, #1
+	add	r1, sp, #36
+	mov	r0, r4
+	bl	log2phys
+.LVL1396:
+	b	.L1180
+.LVL1397:
+.L1178:
+	.loc 2 1881 0 discriminator 1
+	ldr	r1, [r7, #8]
+	cmp	r4, r1
+	bne	.L1179
+	.loc 2 1882 0 discriminator 2
+	ldr	r0, .L1266
+	.loc 2 1869 0 discriminator 2
+	ldr	r1, [r7, #4]
+	.loc 2 1882 0 discriminator 2
+	ldr	r0, [r0]
+	.loc 2 1869 0 discriminator 2
+	str	r1, [sp, #28]
+	.loc 2 1882 0 discriminator 2
+	bl	ftl_cmp_data_ver
+.LVL1398:
+	.loc 2 1881 0 discriminator 2
+	cmp	r0, #0
+	beq	.L1179
+	.loc 2 1883 0
+	ldr	r1, [sp, #40]
+	ldr	r0, [sp, #44]
+	cmp	r1, r0
+	bne	.L1182
+.L1185:
+	.loc 2 1909 0
+	ldr	r1, [sp, #36]
+	mov	r0, r4
+	bl	FtlReUsePrevPpa
+.LVL1399:
+	b	.L1179
+.L1182:
+	.loc 2 1886 0
+	ldr	r0, [sp, #36]
+	cmp	r1, r0
+	beq	.L1179
+	.loc 2 1887 0
+	adds	r0, r1, #1
+	beq	.L1183
+.LVL1400:
+	.loc 2 1889 0
+	str	r1, [r3, #4]
+	.loc 2 1890 0
+	movs	r2, #0
+	movs	r1, #1
+	mov	r0, r3
+	.loc 2 1888 0
+	ldr	r7, [r3, #12]
+	.loc 2 1890 0
+	bl	FlashReadPages
+.LVL1401:
+.L1184:
+	.loc 2 1895 0
+	ldr	r3, [r6]
+	ldr	r3, [r3, r5]
+	adds	r3, r3, #1
+	beq	.L1185
+	.loc 2 1896 0
+	ldr	r3, [r7, #4]
+.LVL1402:
+	.loc 2 1897 0
+	ldr	r2, .L1266
+	mov	r1, r3
+	ldr	r0, [r2]
+	bl	ftl_cmp_data_ver
+.LVL1403:
+	cmp	r0, #0
+	beq	.L1185
+	.loc 2 1898 0
+	mov	r1, r3
+	ldr	r0, [sp, #28]
+	bl	ftl_cmp_data_ver
+.LVL1404:
+	cmp	r0, #0
+	beq	.L1179
+.LVL1405:
+	b	.L1185
+.LVL1406:
+.L1183:
+	.loc 2 1892 0
+	str	r1, [r2, r5]
+	b	.L1184
+.L1267:
+	.align	2
+.L1266:
+	.word	.LANCHOR154
+	.word	.LANCHOR162
+	.word	.LANCHOR144
+	.word	.LANCHOR120
+	.word	.LANCHOR3
+	.word	.LANCHOR19
+	.word	.LANCHOR72
+	.word	.LANCHOR5
+	.word	.LANCHOR161
+	.word	.LC1
+	.word	.LANCHOR43
+.LVL1407:
+.L1176:
+.LBE270:
+	.loc 2 1915 0
+	ldr	r3, [sp, #44]
+	ldr	r2, [sp, #40]
+	cmp	r2, r3
+	beq	.L1187
+	.loc 2 1917 0
+	movs	r2, #1
+	add	r1, sp, #44
+	mov	r0, r4
+	bl	log2phys
+.LVL1408:
+	.loc 2 1918 0
+	ldr	r7, [sp, #40]
+	adds	r5, r7, #1
+	beq	.L1187
+	.loc 2 1918 0 is_stmt 0 discriminator 1
+	ldr	r3, [sp, #36]
+	cmp	r7, r3
+	beq	.L1200
+	.loc 2 1919 0 is_stmt 1
+	ubfx	r0, r7, #10, #16
+	bl	P2V_block_in_plane
+.LVL1409:
+	.loc 2 1921 0
+	ldr	r3, .L1268
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	beq	.L1191
+	.loc 2 1922 0 discriminator 1
+	ldr	r3, .L1268+4
+	.loc 2 1921 0 discriminator 1
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	beq	.L1191
+	.loc 2 1923 0
+	ldr	r3, .L1268+8
+	.loc 2 1922 0
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bne	.L1187
+.L1191:
+.LVL1410:
+.LBB271:
+	.loc 2 1927 0
+	ldr	r0, [r6]
+.LVL1411:
+	.loc 2 1930 0
+	movs	r2, #0
+	movs	r1, #1
+	.loc 2 1929 0
+	str	r7, [r0, #4]
+	.loc 2 1927 0
+	ldr	r5, [r0, #12]
+.LVL1412:
+	.loc 2 1930 0
+	bl	FlashReadPages
+.LVL1413:
+	.loc 2 1933 0
+	ldr	r3, [r6]
+	ldr	r3, [r3]
+	adds	r3, r3, #1
+	beq	.L1187
+	.loc 2 1934 0
+	ldr	r1, [r5, #4]
+	ldr	r0, [sp]
+	bl	ftl_cmp_data_ver
+.LVL1414:
+	cmp	r0, #0
+	bne	.L1187
+	.loc 2 1941 0
+	movs	r2, #1
+	add	r1, sp, #40
+.LVL1415:
+	mov	r0, r4
+	bl	log2phys
+.LVL1416:
+	b	.L1187
+.LVL1417:
+.L1193:
+.LBE271:
+	.loc 2 1962 0
+	mov	r1, r4
+	ldr	r0, .L1268+12
+	bl	printf
+.LVL1418:
+	b	.L1169
+.LVL1419:
+.L1173:
+	.loc 2 1969 0
+	ldr	r3, .L1268+16
+	ldr	r3, [r3]
+	cmp	r3, #31
+	bhi	.L1194
+	.loc 2 1970 0
+	ldr	r2, .L1268+20
+	str	r4, [r2, r3, lsl #2]
+	.loc 2 1971 0
+	adds	r3, r3, #1
+	ldr	r2, .L1268+16
+	str	r3, [r2]
+.L1194:
+	.loc 2 1973 0
+	ldrh	r0, [r8]
+.LVL1420:
+	bl	decrement_vpc_count
+.LVL1421:
+	.loc 2 1975 0
+	ldr	r3, .L1268+24
+	ldr	r2, [r3]
+	adds	r1, r2, #1
+	bne	.L1195
+	.loc 2 1976 0
+	ldr	r2, [sp]
+.L1259:
+	.loc 2 1978 0
+	str	r2, [r3]
+	b	.L1169
+.L1195:
+	.loc 2 1977 0
+	ldr	r1, [sp]
+	cmp	r1, r2
+	bcs	.L1169
+	.loc 2 1978 0
+	mov	r2, r1
+	b	.L1259
+.LVL1422:
+.L1172:
+	.loc 2 2002 0
+	strb	r10, [r8, #6]
+	.loc 2 2004 0
+	mov	r2, r10
+	.loc 2 2003 0
+	strh	fp, [r8, #2]	@ movhi
+	.loc 2 2004 0
+	mov	r1, fp
+	b	.L1263
+.L1269:
+	.align	2
+.L1268:
+	.word	.LANCHOR51
+	.word	.LANCHOR52
+	.word	.LANCHOR53
+	.word	.LC99
+	.word	.LANCHOR163
+	.word	.LANCHOR164
+	.word	.LANCHOR154
+	.cfi_endproc
+.LFE284:
+	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
+	.section	.text.FtlSuperblockPowerLostFix,"ax",%progbits
+	.align	1
+	.global	FtlSuperblockPowerLostFix
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlSuperblockPowerLostFix, %function
+FtlSuperblockPowerLostFix:
+.LFB291:
+	.loc 2 2156 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1423:
+	push	{r4, r5, r6, r7, lr}
+	.cfi_def_cfa_offset 20
+	.cfi_offset 4, -20
+	.cfi_offset 5, -16
+	.cfi_offset 6, -12
+	.cfi_offset 7, -8
+	.cfi_offset 14, -4
+	mov	r4, r0
+	.loc 2 2169 0
+	ldr	r6, .L1281
+	.loc 2 2156 0
+	sub	sp, sp, #28
+	.cfi_def_cfa_offset 48
+	.loc 2 2162 0
+	movs	r5, #7
+	.loc 2 2170 0
+	ldr	r7, .L1281+4
+.LVL1424:
+.L1271:
+	.loc 2 2162 0
+	subs	r5, r5, #1
+.LVL1425:
+	beq	.L1273
+.LVL1426:
+	.loc 2 2163 0
+	ldrh	r3, [r4, #4]
+	cbnz	r3, .L1272
+.LVL1427:
+.L1273:
+	.loc 2 2183 0
+	ldr	r3, .L1281+8
+	ldrh	r1, [r4]
+	ldrh	r0, [r4, #4]
+	ldr	r2, [r3]
+	ldrh	r3, [r2, r1, lsl #1]
+	subs	r3, r3, r0
+	strh	r3, [r2, r1, lsl #1]	@ movhi
+	.loc 2 2184 0
+	ldr	r3, .L1281+12
+	ldrh	r3, [r3]
+	strh	r3, [r4, #2]	@ movhi
+	.loc 2 2185 0
+	movs	r3, #0
+	strb	r3, [r4, #6]
+	.loc 2 2186 0
+	strh	r3, [r4, #4]	@ movhi
+	.loc 2 2188 0
+	add	sp, sp, #28
+	.cfi_remember_state
+	.cfi_def_cfa_offset 20
+	@ sp needed
+	pop	{r4, r5, r6, r7, pc}
+.LVL1428:
+.L1272:
+	.cfi_restore_state
+	.loc 2 2165 0
+	mov	r0, r4
+	bl	get_new_active_ppa
+.LVL1429:
+	str	r0, [sp, #8]
+	.loc 2 2166 0
+	adds	r0, r0, #1
+	beq	.L1273
+	.loc 2 2170 0
+	ldr	r1, [r7]
+	.loc 2 2168 0
+	mov	r3, #-1
+	.loc 2 2169 0
+	ldr	r2, [r6]
+	.loc 2 2178 0
+	ldr	r0, .L1281+16
+	.loc 2 2168 0
+	str	r3, [sp, #20]
+	.loc 2 2170 0
+	str	r1, [sp, #16]
+.LVL1430:
+	.loc 2 2169 0
+	str	r2, [sp, #12]
+	.loc 2 2174 0
+	str	r3, [r1, #12]
+	.loc 2 2178 0
+	ldr	r2, [r0]
+	.loc 2 2173 0
+	str	r3, [r1, #8]
+	.loc 2 2175 0
+	ldrh	r3, [r4]
+	.loc 2 2178 0
+	str	r2, [r1, #4]
+	adds	r2, r2, #1
+	.loc 2 2175 0
+	strh	r3, [r1, #2]	@ movhi
+	.loc 2 2176 0
+	movs	r3, #0
+	strh	r3, [r1]	@ movhi
+	.loc 2 2178 0
+	adds	r1, r2, #1
+.LVL1431:
+	it	eq
+	moveq	r2, r3
+	.loc 2 2179 0
+	movs	r1, #1
+	.loc 2 2178 0
+	str	r2, [r0]
+	.loc 2 2179 0
+	mov	r2, r3
+	add	r0, sp, #4
+	bl	FlashProgPages
+.LVL1432:
+	.loc 2 2180 0
+	ldrh	r0, [r4]
+	bl	decrement_vpc_count
+.LVL1433:
+	b	.L1271
+.L1282:
+	.align	2
+.L1281:
+	.word	.LANCHOR39
+	.word	.LANCHOR109
+	.word	.LANCHOR43
+	.word	.LANCHOR19
+	.word	.LANCHOR72
+	.cfi_endproc
+.LFE291:
+	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
+	.section	.text.FtlLoadBbt,"ax",%progbits
+	.align	1
+	.global	FtlLoadBbt
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlLoadBbt, %function
+FtlLoadBbt:
+.LFB232:
+	.loc 4 173 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 3, -32
+	.cfi_offset 4, -28
+	.cfi_offset 5, -24
+	.cfi_offset 6, -20
+	.cfi_offset 7, -16
+	.cfi_offset 8, -12
+	.cfi_offset 10, -8
+	.cfi_offset 14, -4
+	.loc 4 180 0
+	ldr	r8, .L1312+40
+	ldr	r4, .L1312
+	ldr	r3, [r8]
+	.loc 4 184 0
+	ldr	r7, .L1312+4
+	.loc 4 186 0
+	mov	r10, r4
+	.loc 4 180 0
+	str	r3, [r4, #8]
+	.loc 4 181 0
+	ldr	r3, .L1312+8
+	ldr	r6, [r3]
+	str	r6, [r4, #12]
+.LVL1434:
+	.loc 4 183 0
+	bl	FtlBbtMemInit
+.LVL1435:
+	.loc 4 184 0
+	ldrh	r5, [r7]
+	subs	r5, r5, #1
+	uxth	r5, r5
+.LVL1436:
+.L1284:
+	.loc 4 184 0 is_stmt 0 discriminator 1
+	ldrh	r3, [r7]
+	subs	r3, r3, #15
+	cmp	r3, r5
+	bgt	.L1287
+	.loc 4 185 0 is_stmt 1
+	lsls	r3, r5, #10
+	.loc 4 186 0
+	movs	r2, #1
+	mov	r1, r2
+	mov	r0, r10
+	.loc 4 185 0
+	str	r3, [r4, #4]
+	.loc 4 186 0
+	bl	FlashReadPages
+.LVL1437:
+	.loc 4 187 0
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	bne	.L1285
+	.loc 4 188 0
+	ldr	r3, [r4, #4]
+	.loc 4 189 0
+	movs	r2, #1
+	mov	r1, r2
+	mov	r0, r10
+	.loc 4 188 0
+	adds	r3, r3, #1
+	str	r3, [r4, #4]
+	.loc 4 189 0
+	bl	FlashReadPages
+.LVL1438:
+.L1285:
+	.loc 4 191 0
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	beq	.L1286
+	.loc 4 196 0
+	ldrh	r2, [r6]
+	movw	r3, #61649
+	cmp	r2, r3
+	bne	.L1286
+	.loc 4 198 0
+	ldr	r3, .L1312+12
+	.loc 4 199 0
+	ldr	r2, [r6, #4]
+	.loc 4 198 0
+	strh	r5, [r3]	@ movhi
+	.loc 4 199 0
+	str	r2, [r3, #8]
+	.loc 4 200 0
+	ldrh	r2, [r6, #8]
+	strh	r2, [r3, #4]	@ movhi
+.L1287:
+	.loc 4 216 0
+	ldr	r5, .L1312+12
+.LVL1439:
+	movw	r2, #65535
+	ldrh	r3, [r5]
+	cmp	r3, r2
+	beq	.L1301
+	.loc 4 222 0
+	ldrh	r3, [r5, #4]
+	cmp	r3, r2
+	beq	.L1291
+	.loc 4 224 0
+	lsls	r3, r3, #10
+	.loc 4 225 0
+	movs	r2, #1
+	mov	r1, r2
+	ldr	r0, .L1312
+	.loc 4 224 0
+	str	r3, [r4, #4]
+	.loc 4 225 0
+	bl	FlashReadPages
+.LVL1440:
+	.loc 4 226 0
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	beq	.L1291
+	.loc 4 229 0
+	ldrh	r2, [r6]
+	movw	r3, #61649
+	cmp	r2, r3
+	bne	.L1291
+	.loc 4 229 0 is_stmt 0 discriminator 1
+	ldr	r3, [r6, #4]
+	ldr	r2, [r5, #8]
+	cmp	r3, r2
+	bls	.L1291
+	.loc 4 231 0 is_stmt 1
+	ldrh	r2, [r5, #4]
+	.loc 4 232 0
+	str	r3, [r5, #8]
+	.loc 4 233 0
+	ldrh	r3, [r6, #8]
+	.loc 4 231 0
+	strh	r2, [r5]	@ movhi
+	.loc 4 233 0
+	strh	r3, [r5, #4]	@ movhi
+.L1291:
+	.loc 4 245 0
+	ldr	r10, .L1312
+	.loc 4 238 0
+	movs	r1, #1
+	ldrh	r0, [r5]
+	bl	FtlGetLastWrittenPage
+.LVL1441:
+	sxth	r7, r0
+.LVL1442:
+	.loc 4 239 0
+	adds	r0, r0, #1
+	strh	r0, [r5, #2]	@ movhi
+.L1293:
+	.loc 4 241 0
+	cmp	r7, #0
+	bge	.L1296
+	.loc 4 254 0
+	movs	r2, #254
+	ldr	r1, .L1312+16
+	ldr	r0, .L1312+20
+	bl	printf
+.LVL1443:
+.L1295:
+	.loc 4 255 0
+	ldrh	r3, [r6, #10]
+	.loc 4 257 0
+	ldrh	r0, [r6, #12]
+	.loc 4 255 0
+	strh	r3, [r5, #6]	@ movhi
+	.loc 4 257 0
+	movw	r3, #65535
+	cmp	r0, r3
+	beq	.L1298
+	.loc 4 259 0
+	ldr	r3, .L1312+24
+	ldr	r2, [r3]
+	cmp	r0, r2
+	beq	.L1298
+	.loc 4 259 0 is_stmt 0 discriminator 1
+	ldr	r3, .L1312+28
+	ldrh	r3, [r3]
+	lsrs	r3, r3, #2
+	cmp	r2, r3
+	bcs	.L1298
+	.loc 4 261 0 is_stmt 1
+	cmp	r0, r3
+	bcs	.L1298
+	.loc 4 263 0
+	bl	FtlSysBlkNumInit
+.LVL1444:
+.L1298:
+	ldr	r6, .L1312+32
+.LVL1445:
+	.loc 4 173 0 discriminator 1
+	movs	r5, #0
+	.loc 4 268 0 discriminator 1
+	ldr	r7, .L1312+36
+.LVL1446:
+	.loc 4 269 0 discriminator 1
+	ldr	r8, .L1312+44
+.L1299:
+.LVL1447:
+	.loc 4 268 0 discriminator 1
+	ldrh	r3, [r7]
+	cmp	r5, r3
+	bcc	.L1300
+	.loc 4 275 0
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.LVL1448:
+.L1286:
+	.loc 4 184 0 discriminator 2
+	subs	r5, r5, #1
+.LVL1449:
+	uxth	r5, r5
+.LVL1450:
+	b	.L1284
+.LVL1451:
+.L1296:
+	.loc 4 243 0
+	ldrh	r3, [r5]
+	.loc 4 245 0
+	movs	r2, #1
+	mov	r1, r2
+	mov	r0, r10
+	.loc 4 243 0
+	orr	r3, r7, r3, lsl #10
+	str	r3, [r4, #4]
+	.loc 4 244 0
+	ldr	r3, [r8]
+	str	r3, [r4, #8]
+	.loc 4 245 0
+	bl	FlashReadPages
+.LVL1452:
+	.loc 4 247 0
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	beq	.L1294
+	.loc 4 247 0 is_stmt 0 discriminator 1
+	ldrh	r2, [r6]
+	movw	r3, #61649
+	cmp	r2, r3
+	beq	.L1295
+.L1294:
+	subs	r7, r7, #1
+.LVL1453:
+	sxth	r7, r7
+.LVL1454:
+	b	.L1293
+.LVL1455:
+.L1300:
+	.loc 4 269 0 is_stmt 1 discriminator 3
+	ldrh	r2, [r8]
+	ldr	r1, [r4, #8]
+	ldr	r0, [r6, #4]!
+	lsls	r2, r2, #2
+	mla	r1, r5, r2, r1
+	.loc 4 268 0 discriminator 3
+	adds	r5, r5, #1
+.LVL1456:
+	.loc 4 269 0 discriminator 3
+	bl	ftl_memcpy
+.LVL1457:
+	b	.L1299
+.LVL1458:
+.L1301:
+	.loc 4 218 0
+	mov	r0, #-1
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.LVL1459:
+.L1313:
+	.align	2
+.L1312:
+	.word	.LANCHOR108
+	.word	.LANCHOR17
+	.word	.LANCHOR109
+	.word	.LANCHOR37
+	.word	.LANCHOR165
+	.word	.LC1
+	.word	.LANCHOR2
+	.word	.LANCHOR6
+	.word	.LANCHOR37+24
+	.word	.LANCHOR10
+	.word	.LANCHOR39
+	.word	.LANCHOR137
+	.cfi_endproc
+.LFE232:
+	.size	FtlLoadBbt, .-FtlLoadBbt
+	.section	.text.FtlMakeBbt,"ax",%progbits
+	.align	1
+	.global	FtlMakeBbt
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlMakeBbt, %function
+FtlMakeBbt:
+.LFB234:
+	.loc 4 317 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 4 327 0
+	movs	r6, #0
+	ldr	r7, .L1333
+	.loc 4 325 0
+	bl	FtlBbtMemInit
+.LVL1460:
+	sub	r8, r7, #18
+	.loc 4 326 0
+	bl	FtlLoadFactoryBbt
+.LVL1461:
+.L1315:
+	.loc 4 327 0 discriminator 1
+	ldr	r3, .L1333+4
+	ldrh	r3, [r3]
+	cmp	r6, r3
+	bcc	.L1321
+	.loc 4 381 0 discriminator 1
+	ldr	r5, .L1333+8
+	movs	r4, #0
+.L1322:
+	ldrh	r3, [r5]
+	uxth	r0, r4
+.LVL1462:
+	adds	r4, r4, #1
+	cmp	r3, r0
+	bhi	.L1323
+	.loc 4 387 0
+	ldr	r4, .L1333+12
+	.loc 4 396 0
+	movw	r6, #65535
+.LVL1463:
+	.loc 4 387 0
+	ldrh	r5, [r4, #12]
+	subs	r5, r5, #1
+	uxth	r5, r5
+.LVL1464:
+.L1324:
+	.loc 4 387 0 is_stmt 0 discriminator 1
+	ldrh	r3, [r4, #12]
+	subs	r3, r3, #47
+	cmp	r3, r5
+	bgt	.L1328
+	.loc 4 389 0 is_stmt 1
+	mov	r0, r5
+	bl	FtlBbmIsBadBlock
+.LVL1465:
+	cmp	r0, #1
+	beq	.L1325
+	.loc 4 391 0
+	mov	r0, r5
+	bl	FlashTestBlk
+.LVL1466:
+	cmp	r0, #0
+	beq	.L1326
+	.loc 4 393 0
+	mov	r0, r5
+	bl	FtlBbmMapBadBlock
+.LVL1467:
+.L1325:
+	.loc 4 387 0 discriminator 2
+	subs	r5, r5, #1
+.LVL1468:
+	uxth	r5, r5
+.LVL1469:
+	b	.L1324
+.LVL1470:
+.L1321:
+	.loc 4 328 0
+	ldr	r3, .L1333+16
+	.loc 4 329 0
+	ldr	r5, .L1333+20
+	.loc 4 331 0
+	ldrh	r2, [r8, #2]!
+	.loc 4 328 0
+	ldr	r4, .L1333+24
+	ldr	r0, [r3]
+	.loc 4 331 0
+	movw	r3, #65535
+	.loc 4 329 0
+	ldr	r10, [r5]
+	.loc 4 331 0
+	cmp	r2, r3
+	mov	fp, r4
+	ldr	r3, .L1333+28
+	.loc 4 328 0
+	str	r0, [r4, #8]
+	.loc 4 329 0
+	str	r10, [r4, #12]
+.LVL1471:
+	.loc 4 331 0
+	beq	.L1316
+	.loc 4 333 0
+	ldrh	r5, [r3]
+	.loc 4 335 0
+	mov	r0, r4
+	.loc 4 333 0
+	str	r3, [sp]
+	mla	r5, r6, r5, r2
+.LVL1472:
+	.loc 4 334 0
+	lsls	r2, r5, #10
+	str	r2, [r4, #4]
+	.loc 4 335 0
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+.LVL1473:
+	.loc 4 336 0
+	ldr	r3, [sp]
+	ldr	r1, [r4, #8]
+	ldr	r0, [r7]
+	ldrh	r2, [r3]
+	adds	r2, r2, #7
+	asrs	r2, r2, #3
+	bl	ftl_memcpy
+.LVL1474:
+.L1317:
+	.loc 4 376 0 discriminator 2
+	uxth	r0, r5
+	.loc 4 327 0 discriminator 2
+	adds	r6, r6, #1
+.LVL1475:
+	adds	r7, r7, #4
+	.loc 4 376 0 discriminator 2
+	bl	FtlBbmMapBadBlock
+.LVL1476:
+	b	.L1315
+.LVL1477:
+.L1316:
+	.loc 4 340 0
+	mov	r1, r6
+	str	r3, [sp]
+	bl	FlashGetBadBlockList
+.LVL1478:
+	.loc 4 341 0
+	ldr	r0, [r4, #8]
+	ldr	r1, [r7]
+	bl	FtlBbt2Bitmap
+.LVL1479:
+	.loc 4 343 0
+	ldr	r3, [sp]
+	.loc 4 350 0
+	str	r5, [sp, #4]
+	.loc 4 343 0
+	ldrh	r4, [r3]
+	subs	r4, r4, #1
+	uxth	r4, r4
+.LVL1480:
+.L1318:
+	.loc 4 345 0
+	ldr	r3, [sp]
+	ldrh	r0, [r3]
+	smlabb	r0, r0, r6, r4
+	uxth	r0, r0
+	bl	FtlBbmIsBadBlock
+.LVL1481:
+	cmp	r0, #1
+	beq	.L1319
+	.loc 4 350 0
+	ldr	r3, [sp, #4]
+	movs	r2, #16
+	movs	r1, #0
+	.loc 4 349 0
+	strh	r4, [r8]	@ movhi
+	.loc 4 350 0
+	ldr	r0, [r3]
+	bl	ftl_memset
+.LVL1482:
+	.loc 4 351 0
+	ldr	r3, .L1333+16
+	mov	r2, #4096
+	movs	r1, #0
+	ldr	r0, [r3]
+	bl	ftl_memset
+.LVL1483:
+	.loc 4 355 0
+	ldr	r2, [sp]
+	.loc 4 352 0
+	movw	r3, #61664
+	strh	r3, [r10]	@ movhi
+	.loc 4 353 0
+	movs	r3, #0
+	str	r3, [r10, #4]
+	.loc 4 355 0
+	ldrh	r5, [r2]
+	.loc 4 354 0
+	ldrh	r3, [r8]
+	.loc 4 357 0
+	ldr	r1, [r7]
+	ldr	r0, [fp, #8]
+	.loc 4 354 0
+	strh	r3, [r10, #2]	@ movhi
+	.loc 4 355 0
+	mla	r5, r6, r5, r3
+.LVL1484:
+	.loc 4 356 0
+	lsls	r3, r5, #10
+	str	r3, [fp, #4]
+	.loc 4 357 0
+	ldr	r3, .L1333+32
+	ldrh	r2, [r3]
+	lsls	r2, r2, #2
+	bl	ftl_memcpy
+.LVL1485:
+	.loc 4 358 0
+	movs	r2, #1
+	ldr	r0, .L1333+24
+	mov	r1, r2
+	bl	FlashEraseBlocks
+.LVL1486:
+	.loc 4 359 0
+	movs	r3, #1
+	ldr	r0, .L1333+24
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+.LVL1487:
+	.loc 4 360 0
+	ldr	r3, [fp]
+	adds	r3, r3, #1
+	bne	.L1317
+	.loc 4 362 0
+	uxth	r0, r5
+	bl	FtlBbmMapBadBlock
+.LVL1488:
+	.loc 4 363 0
+	b	.L1318
+.LVL1489:
+.L1319:
+	.loc 4 347 0
+	subs	r4, r4, #1
+.LVL1490:
+	uxth	r4, r4
+.LVL1491:
+	b	.L1318
+.LVL1492:
+.L1323:
+	.loc 4 383 0 discriminator 3
+	bl	FtlBbmMapBadBlock
+.LVL1493:
+	b	.L1322
+.LVL1494:
+.L1326:
+	.loc 4 396 0
+	ldrh	r3, [r4]
+	cmp	r3, r6
+	bne	.L1327
+	.loc 4 398 0
+	strh	r5, [r4]	@ movhi
+	b	.L1325
+.L1327:
+	.loc 4 402 0
+	strh	r5, [r4, #4]	@ movhi
+.L1328:
+	.loc 4 414 0
+	ldr	r3, .L1333+36
+	.loc 4 411 0
+	movs	r5, #0
+.LVL1495:
+	.loc 4 413 0
+	str	r5, [r4, #8]
+	.loc 4 416 0
+	movs	r1, #1
+	movs	r2, #2
+	.loc 4 411 0
+	strh	r5, [r4, #2]	@ movhi
+	.loc 4 414 0
+	ldr	r0, [r3]
+	ldrh	r3, [r4]
+	lsls	r3, r3, #10
+	str	r3, [r0, #4]
+	.loc 4 415 0
+	ldrh	r3, [r4, #4]
+	lsls	r3, r3, #10
+	str	r3, [r0, #24]
+	.loc 4 416 0
+	bl	FlashEraseBlocks
+.LVL1496:
+	.loc 4 418 0
+	ldrh	r0, [r4]
+	bl	FtlBbmMapBadBlock
+.LVL1497:
+	.loc 4 419 0
+	ldrh	r0, [r4, #4]
+	bl	FtlBbmMapBadBlock
+.LVL1498:
+	.loc 4 421 0
+	bl	FtlBbmTblFlush
+.LVL1499:
+	.loc 4 422 0
+	ldr	r3, [r4, #8]
+	.loc 4 425 0
+	ldrh	r2, [r4, #4]
+	.loc 4 426 0
+	strh	r5, [r4, #2]	@ movhi
+	.loc 4 422 0
+	adds	r3, r3, #1
+	str	r3, [r4, #8]
+	.loc 4 424 0
+	ldrh	r3, [r4]
+.LVL1500:
+	.loc 4 425 0
+	strh	r2, [r4]	@ movhi
+	.loc 4 427 0
+	strh	r3, [r4, #4]	@ movhi
+	.loc 4 429 0
+	bl	FtlBbmTblFlush
+.LVL1501:
+	.loc 4 432 0
+	mov	r0, r5
+	add	sp, sp, #8
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1334:
+	.align	2
+.L1333:
+	.word	.LANCHOR37+28
+	.word	.LANCHOR10
+	.word	.LANCHOR25
+	.word	.LANCHOR37
+	.word	.LANCHOR39
+	.word	.LANCHOR109
+	.word	.LANCHOR108
+	.word	.LANCHOR17
+	.word	.LANCHOR137
+	.word	.LANCHOR112
+	.cfi_endproc
+.LFE234:
+	.size	FtlMakeBbt, .-FtlMakeBbt
+	.section	.text.FtlVendorPartWrite,"ax",%progbits
+	.align	1
+	.global	FtlVendorPartWrite
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlVendorPartWrite, %function
+FtlVendorPartWrite:
+.LFB266:
+	.loc 2 786 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 104
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1502:
+	.loc 2 794 0
+	ldr	r3, .L1347
+	.loc 2 786 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	sub	sp, sp, #104
+	.cfi_def_cfa_offset 136
+	.loc 2 786 0
+	str	r2, [sp]
+	.loc 2 794 0
+	adds	r2, r0, r1
+.LVL1503:
+	.loc 2 786 0
+	mov	r7, r0
+	mov	r5, r1
+	.loc 2 794 0
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bhi	.L1343
+	.loc 2 791 0
+	ldr	r3, .L1347+4
+	mov	r8, #0
+	ldrh	r6, [r3]
+	lsr	r6, r0, r6
+	lsl	fp, r6, #2
+.LVL1504:
+.L1337:
+	.loc 2 797 0
+	cbnz	r5, .L1342
+.LVL1505:
+.L1335:
+	.loc 2 820 0
+	mov	r0, r8
+	add	sp, sp, #104
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+.LVL1506:
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1507:
+.L1342:
+	.cfi_restore_state
+	.loc 2 798 0
+	ldr	r3, .L1347+8
+	.loc 2 799 0
+	mov	r0, r7
+	ldr	r10, .L1347+24
+	.loc 2 798 0
+	ldr	r3, [r3]
+	ldr	r2, [r3, fp]
+	.loc 2 799 0
+	ldr	r3, .L1347+12
+	.loc 2 798 0
+	str	r2, [sp, #12]
+.LVL1508:
+	.loc 2 799 0
+	ldrh	r3, [r3]
+	mov	r1, r3
+	str	r3, [sp, #8]
+	bl	__aeabi_uidivmod
+.LVL1509:
+	.loc 2 800 0
+	ldr	r3, [sp, #8]
+	.loc 2 801 0
+	ldr	r2, [sp, #12]
+	.loc 2 799 0
+	str	r1, [sp, #4]
+.LVL1510:
+	.loc 2 800 0
+	subs	r4, r3, r1
+	uxth	r4, r4
+.LVL1511:
+	.loc 2 801 0
+	cmp	r5, r4
+	.loc 2 802 0
+	it	cc
+	uxthcc	r4, r5
+.LVL1512:
+	.loc 2 803 0
+	cbz	r2, .L1339
+	.loc 2 803 0 is_stmt 0 discriminator 1
+	cmp	r4, r3
+	beq	.L1339
+	.loc 2 805 0 is_stmt 1
+	ldr	r3, [r10]
+	.loc 2 807 0
+	add	r0, sp, #20
+	.loc 2 804 0
+	str	r2, [sp, #24]
+	.loc 2 807 0
+	movs	r2, #1
+	mov	r1, r2
+	.loc 2 805 0
+	str	r3, [sp, #28]
+	.loc 2 806 0
+	add	r3, sp, #40
+	str	r3, [sp, #32]
+	.loc 2 807 0
+	bl	FlashReadPages
+.LVL1513:
+.L1340:
+	.loc 2 811 0
+	lsls	r3, r4, #9
+	ldr	r0, [r10]
+	.loc 2 815 0
+	subs	r5, r5, r4
+.LVL1514:
+	.loc 2 811 0
+	mov	r2, r3
+	str	r3, [sp, #8]
+	ldm	sp, {r1, r3}
+	.loc 2 816 0
+	add	r7, r7, r4
+.LVL1515:
+	add	fp, fp, #4
+	.loc 2 811 0
+	add	r0, r0, r3, lsl #9
+	bl	ftl_memcpy
+.LVL1516:
+	.loc 2 812 0
+	ldr	r2, [r10]
+	mov	r1, r6
+	ldr	r0, .L1347+16
+	.loc 2 814 0
+	adds	r6, r6, #1
+.LVL1517:
+	.loc 2 812 0
+	bl	FtlMapWritePage
+.LVL1518:
+	.loc 2 817 0
+	ldr	r3, [sp]
+	.loc 2 813 0
+	adds	r0, r0, #1
+	it	eq
+	moveq	r8, #-1
+.LVL1519:
+	.loc 2 817 0
+	mov	r2, r3
+	ldr	r3, [sp, #8]
+	add	r2, r2, r3
+	str	r2, [sp]
+.LVL1520:
+	b	.L1337
+.LVL1521:
+.L1339:
+	.loc 2 809 0
+	ldr	r3, .L1347+20
+	movs	r1, #0
+	ldr	r0, [r10]
+	ldrh	r2, [r3]
+.LVL1522:
+	bl	ftl_memset
+.LVL1523:
+	b	.L1340
+.LVL1524:
+.L1343:
+	.loc 2 795 0
+	mov	r8, #-1
+	b	.L1335
+.L1348:
+	.align	2
+.L1347:
+	.word	.LANCHOR16
+	.word	.LANCHOR22
+	.word	.LANCHOR133
+	.word	.LANCHOR12
+	.word	.LANCHOR149
+	.word	.LANCHOR23
+	.word	.LANCHOR124
+	.cfi_endproc
+.LFE266:
+	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
+	.section	.text.Ftl_save_ext_data,"ax",%progbits
+	.align	1
+	.global	Ftl_save_ext_data
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	Ftl_save_ext_data, %function
+Ftl_save_ext_data:
+.LFB289:
+	.loc 2 2110 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	.loc 2 2111 0
+	ldr	r2, .L1351
+	ldr	r3, .L1351+4
+	ldr	r1, [r2]
+	cmp	r1, r3
+	bne	.L1349
+.LBB274:
+.LBB275:
+	.loc 2 2112 0
+	ldr	r3, .L1351+8
+	.loc 2 2125 0
+	movs	r1, #1
+	movs	r0, #0
+	.loc 2 2112 0
+	str	r3, [r2, #4]
+	.loc 2 2113 0
+	ldr	r3, .L1351+12
+	ldr	r3, [r3]
+	str	r3, [r2, #88]
+	.loc 2 2114 0
+	ldr	r3, .L1351+16
+	ldr	r3, [r3]
+	str	r3, [r2, #92]
+	.loc 2 2115 0
+	ldr	r3, .L1351+20
+	ldr	r3, [r3]
+	str	r3, [r2, #8]
+	.loc 2 2116 0
+	ldr	r3, .L1351+24
+	ldr	r3, [r3]
+	str	r3, [r2, #12]
+	.loc 2 2117 0
+	ldr	r3, .L1351+28
+	ldr	r3, [r3]
+	str	r3, [r2, #16]
+	.loc 2 2118 0
+	ldr	r3, .L1351+32
+	ldr	r3, [r3]
+	str	r3, [r2, #20]
+	.loc 2 2119 0
+	ldr	r3, .L1351+36
+	ldr	r3, [r3]
+	str	r3, [r2, #28]
+	.loc 2 2120 0
+	ldr	r3, .L1351+40
+	ldr	r3, [r3]
+	str	r3, [r2, #32]
+	.loc 2 2121 0
+	ldr	r3, .L1351+44
+	ldr	r3, [r3]
+	str	r3, [r2, #36]
+	.loc 2 2122 0
+	ldr	r3, .L1351+48
+	ldr	r3, [r3]
+	str	r3, [r2, #40]
+	.loc 2 2123 0
+	ldr	r3, .L1351+52
+	ldr	r3, [r3]
+	str	r3, [r2, #44]
+	.loc 2 2124 0
+	ldr	r3, .L1351+56
+	ldr	r3, [r3]
+	str	r3, [r2, #48]
+	.loc 2 2125 0
+	b	FtlVendorPartWrite
+.LVL1525:
+.L1349:
+	bx	lr
+.L1352:
+	.align	2
+.L1351:
+	.word	.LANCHOR83
+	.word	1179929683
+	.word	1342177344
+	.word	.LANCHOR69
+	.word	.LANCHOR70
+	.word	.LANCHOR68
+	.word	.LANCHOR65
+	.word	.LANCHOR63
+	.word	.LANCHOR67
+	.word	.LANCHOR74
+	.word	.LANCHOR76
+	.word	.LANCHOR64
+	.word	.LANCHOR66
+	.word	.LANCHOR77
+	.word	.LANCHOR78
+.LBE275:
+.LBE274:
+	.cfi_endproc
+.LFE289:
+	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
+	.section	.text.FtlEctTblFlush,"ax",%progbits
+	.align	1
+	.global	FtlEctTblFlush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlEctTblFlush, %function
+FtlEctTblFlush:
+.LFB268:
+	.loc 2 861 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1526:
+	.loc 2 864 0
+	ldr	r2, .L1358
+	.loc 2 861 0
+	push	{r3, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 3, -8
+	.cfi_offset 14, -4
+	.loc 2 864 0
+	ldrh	r3, [r2]
+	cmp	r3, #31
+	.loc 2 865 0
+	itett	ls
+	addls	r3, r3, #1
+	.loc 2 862 0
+	movhi	r3, #32
+	.loc 2 865 0
+	strhls	r3, [r2]	@ movhi
+.LVL1527:
+	.loc 2 866 0
+	movls	r3, #1
+.LVL1528:
+	ldr	r2, .L1358+4
+	.loc 2 868 0
+	cbnz	r0, .L1355
+	.loc 2 868 0 is_stmt 0 discriminator 1
+	ldr	r1, [r2]
+	ldr	r0, [r1, #20]
+.LVL1529:
+	ldr	r1, [r1, #16]
+	add	r3, r3, r0
+.LVL1530:
+	cmp	r1, r3
+	bcc	.L1356
+.L1355:
+	.loc 2 870 0 is_stmt 1
+	ldr	r2, [r2]
+	.loc 2 875 0
+	movs	r0, #64
+	.loc 2 870 0
+	ldr	r3, [r2, #16]
+	str	r3, [r2, #20]
+	.loc 2 871 0
+	ldr	r3, .L1358+8
+	str	r3, [r2]
+	.loc 2 872 0
+	ldr	r3, .L1358+12
+	ldrh	r1, [r3]
+	lsls	r3, r1, #9
+	str	r3, [r2, #12]
+	.loc 2 873 0
+	ldr	r3, [r2, #8]
+	adds	r3, r3, #1
+	str	r3, [r2, #8]
+	.loc 2 874 0
+	movs	r3, #0
+	str	r3, [r2, #4]
+	.loc 2 875 0
+	bl	FtlVendorPartWrite
+.LVL1531:
+	.loc 2 876 0
+	bl	Ftl_save_ext_data
+.LVL1532:
+.L1356:
+	.loc 2 878 0
+	movs	r0, #0
+	pop	{r3, pc}
+.L1359:
+	.align	2
+.L1358:
+	.word	.LANCHOR166
+	.word	.LANCHOR127
+	.word	1112818501
+	.word	.LANCHOR125
+	.cfi_endproc
+.LFE268:
+	.size	FtlEctTblFlush, .-FtlEctTblFlush
+	.section	.text.FtlVendorPartRead,"ax",%progbits
+	.align	1
+	.global	FtlVendorPartRead
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlVendorPartRead, %function
+FtlVendorPartRead:
+.LFB267:
+	.loc 2 823 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 104
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1533:
+	.loc 2 832 0
+	ldr	r3, .L1369
+	.loc 2 823 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	mov	r8, r2
+	.loc 2 832 0
+	adds	r2, r0, r1
+.LVL1534:
+	.loc 2 823 0
+	sub	sp, sp, #104
+	.cfi_def_cfa_offset 136
+	.loc 2 823 0
+	mov	r6, r0
+	mov	r5, r1
+	.loc 2 832 0
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bhi	.L1368
+	.loc 2 828 0
+	ldr	r3, .L1369+4
+	movs	r7, #0
+	.loc 2 842 0
+	ldr	fp, .L1369+16
+	.loc 2 828 0
+	ldrh	r3, [r3]
+	lsr	r3, r0, r3
+	lsls	r3, r3, #2
+	str	r3, [sp, #4]
+.LVL1535:
+.L1362:
+	.loc 2 834 0
+	cbnz	r5, .L1367
+.LVL1536:
+.L1360:
+	.loc 2 857 0
+	mov	r0, r7
+	add	sp, sp, #104
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1537:
+.L1367:
+	.cfi_restore_state
+	.loc 2 835 0
+	ldr	r3, .L1369+8
+	.loc 2 836 0
+	mov	r0, r6
+	.loc 2 835 0
+	ldr	r2, [sp, #4]
+	ldr	r3, [r3]
+	ldr	r3, [r3, r2]
+	.loc 2 836 0
+	ldr	r2, .L1369+12
+	.loc 2 835 0
+	str	r3, [sp, #12]
+.LVL1538:
+	.loc 2 836 0
+	ldrh	r4, [r2]
+	mov	r1, r4
+	bl	__aeabi_uidivmod
+.LVL1539:
+	.loc 2 837 0
+	subs	r4, r4, r1
+	.loc 2 838 0
+	ldr	r3, [sp, #12]
+	.loc 2 837 0
+	uxth	r4, r4
+	.loc 2 836 0
+	str	r1, [sp, #8]
+.LVL1540:
+	.loc 2 838 0
+	cmp	r5, r4
+	.loc 2 839 0
+	it	cc
+	uxthcc	r4, r5
+.LVL1541:
+	lsl	r10, r4, #9
+	.loc 2 840 0
+	cbz	r3, .L1364
+	.loc 2 841 0
+	str	r3, [sp, #24]
+	.loc 2 844 0
+	movs	r2, #1
+	.loc 2 842 0
+	ldr	r3, [fp]
+	.loc 2 844 0
+	mov	r1, r2
+	add	r0, sp, #20
+	.loc 2 842 0
+	str	r3, [sp, #28]
+	.loc 2 843 0
+	add	r3, sp, #40
+	str	r3, [sp, #32]
+	.loc 2 844 0
+	bl	FlashReadPages
+.LVL1542:
+	.loc 2 845 0
+	ldr	r3, [sp, #20]
+	.loc 2 847 0
+	mov	r2, r10
+	ldr	r1, [fp]
+	mov	r0, r8
+	.loc 2 846 0
+	adds	r3, r3, #1
+	.loc 2 847 0
+	ldr	r3, [sp, #8]
+	.loc 2 846 0
+	it	eq
+	moveq	r7, #-1
+.LVL1543:
+	.loc 2 847 0
+	add	r1, r1, r3, lsl #9
+	bl	ftl_memcpy
+.LVL1544:
+.L1366:
+	ldr	r3, [sp, #4]
+	.loc 2 852 0
+	subs	r5, r5, r4
+.LVL1545:
+	.loc 2 853 0
+	add	r6, r6, r4
+.LVL1546:
+	.loc 2 854 0
+	add	r8, r8, r10
+.LVL1547:
+	adds	r3, r3, #4
+	str	r3, [sp, #4]
+	b	.L1362
+.LVL1548:
+.L1364:
+	.loc 2 849 0
+	mov	r2, r10
+	mov	r1, r3
+	mov	r0, r8
+	bl	ftl_memset
+.LVL1549:
+	b	.L1366
+.LVL1550:
+.L1368:
+	.loc 2 833 0
+	mov	r7, #-1
+	b	.L1360
+.L1370:
+	.align	2
+.L1369:
+	.word	.LANCHOR16
+	.word	.LANCHOR22
+	.word	.LANCHOR133
+	.word	.LANCHOR12
+	.word	.LANCHOR124
+	.cfi_endproc
+.LFE267:
+	.size	FtlVendorPartRead, .-FtlVendorPartRead
+	.section	.text.FtlLoadEctTbl,"ax",%progbits
+	.align	1
+	.global	FtlLoadEctTbl
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlLoadEctTbl, %function
+FtlLoadEctTbl:
+.LFB274:
+	.loc 2 1334 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 2 1335 0
+	movs	r0, #64
+	ldr	r4, .L1373
+	ldr	r5, .L1373+4
+	ldr	r2, [r4]
+	ldrh	r1, [r5]
+	bl	FtlVendorPartRead
+.LVL1551:
+	.loc 2 1336 0
+	ldr	r3, [r4]
+	ldr	r2, [r3]
+	ldr	r3, .L1373+8
+	cmp	r2, r3
+	beq	.L1372
+.LBB278:
+.LBB279:
+	.loc 2 1338 0
+	ldr	r1, .L1373+12
+	ldr	r0, .L1373+16
+	bl	printf
+.LVL1552:
+	.loc 2 1339 0
+	ldrh	r2, [r5]
+	movs	r1, #0
+	ldr	r0, [r4]
+	lsls	r2, r2, #9
+	bl	ftl_memset
+.LVL1553:
+.L1372:
+.LBE279:
+.LBE278:
+	.loc 2 1344 0
+	movs	r0, #0
+	pop	{r3, r4, r5, pc}
+.L1374:
+	.align	2
+.L1373:
+	.word	.LANCHOR127
+	.word	.LANCHOR125
+	.word	1112818501
+	.word	.LC100
+	.word	.LC71
+	.cfi_endproc
+.LFE274:
+	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
+	.section	.text.Ftl_load_ext_data,"ax",%progbits
+	.align	1
+	.global	Ftl_load_ext_data
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	Ftl_load_ext_data, %function
+Ftl_load_ext_data:
+.LFB290:
+	.loc 2 2130 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 2 2131 0
+	movs	r1, #1
+	ldr	r4, .L1378
+	movs	r0, #0
+	.loc 2 2132 0
+	ldr	r5, .L1378+4
+	.loc 2 2131 0
+	mov	r2, r4
+	bl	FtlVendorPartRead
+.LVL1554:
+	.loc 2 2132 0
+	ldr	r3, [r4]
+	cmp	r3, r5
+	beq	.L1376
+	.loc 2 2133 0
+	mov	r2, #512
+	movs	r1, #0
+	mov	r0, r4
+	bl	ftl_memset
+.LVL1555:
+	.loc 2 2134 0
+	str	r5, [r4]
+.L1376:
+	.loc 2 2137 0
+	ldr	r3, [r4]
+	cmp	r3, r5
+	ldr	r3, .L1378+8
+	bne	.L1377
+	.loc 2 2138 0
+	ldr	r1, [r4, #88]
+	ldr	r2, .L1378+12
+	str	r1, [r2]
+	.loc 2 2139 0
+	ldr	r1, [r4, #92]
+	ldr	r2, .L1378+16
+	str	r1, [r2]
+	.loc 2 2140 0
+	ldr	r1, [r4, #8]
+	ldr	r2, .L1378+20
+	str	r1, [r2]
+	.loc 2 2141 0
+	ldr	r1, [r4, #12]
+	ldr	r2, .L1378+24
+	str	r1, [r2]
+	.loc 2 2142 0
+	ldr	r1, [r4, #16]
+	ldr	r2, .L1378+28
+	str	r1, [r2]
+	.loc 2 2143 0
+	ldr	r1, [r4, #20]
+	ldr	r2, .L1378+32
+	str	r1, [r2]
+	.loc 2 2144 0
+	ldr	r2, [r4, #28]
+	.loc 2 2145 0
+	ldr	r1, [r4, #32]
+	.loc 2 2144 0
+	str	r2, [r3]
+	.loc 2 2145 0
+	ldr	r2, .L1378+36
+	str	r1, [r2]
+	.loc 2 2146 0
+	ldr	r1, [r4, #36]
+	ldr	r2, .L1378+40
+	str	r1, [r2]
+	.loc 2 2147 0
+	ldr	r1, [r4, #40]
+	ldr	r2, .L1378+44
+	str	r1, [r2]
+	.loc 2 2148 0
+	ldr	r1, [r4, #44]
+	ldr	r2, .L1378+48
+	str	r1, [r2]
+	.loc 2 2149 0
+	ldr	r1, [r4, #48]
+	ldr	r2, .L1378+52
+	str	r1, [r2]
+.L1377:
+	.loc 2 2152 0
+	ldr	r1, .L1378+56
+	ldr	r2, .L1378+60
+	ldr	r3, [r3]
+	ldr	r0, [r1]
+	ldrh	r2, [r2]
+	ldr	r1, .L1378+64
+	mla	r0, r0, r2, r3
+	ldrh	r1, [r1]
+	bl	__aeabi_uidiv
+.LVL1556:
+	ldr	r3, .L1378+68
+	str	r0, [r3]
+	pop	{r3, r4, r5, pc}
+.L1379:
+	.align	2
+.L1378:
+	.word	.LANCHOR83
+	.word	1179929683
+	.word	.LANCHOR74
+	.word	.LANCHOR69
+	.word	.LANCHOR70
+	.word	.LANCHOR68
+	.word	.LANCHOR65
+	.word	.LANCHOR63
+	.word	.LANCHOR67
+	.word	.LANCHOR76
+	.word	.LANCHOR64
+	.word	.LANCHOR66
+	.word	.LANCHOR77
+	.word	.LANCHOR78
+	.word	.LANCHOR73
+	.word	.LANCHOR14
+	.word	.LANCHOR5
+	.word	.LANCHOR75
+	.cfi_endproc
+.LFE290:
+	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
+	.section	.text.FtlVpcTblFlush,"ax",%progbits
+	.align	1
+	.global	FtlVpcTblFlush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlVpcTblFlush, %function
+FtlVpcTblFlush:
+.LFB272:
+	.loc 2 1004 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1557:
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 1016 0
+	movs	r6, #0
+	.loc 2 1013 0
+	ldr	r3, .L1392
+	.loc 2 1005 0
+	movw	fp, #65535
+	.loc 2 1010 0
+	ldr	r8, .L1392+80
+	.loc 2 1011 0
+	ldr	r10, .L1392+84
+	.loc 2 1013 0
+	ldrh	r2, [r3]
+	.loc 2 1010 0
+	ldr	r0, [r8]
+	.loc 2 1011 0
+	ldr	r7, [r10]
+	.loc 2 1010 0
+	ldr	r5, .L1392+4
+	.loc 2 1019 0
+	ldr	r4, .L1392+8
+	.loc 2 1020 0
+	ldr	r1, .L1392+12
+	.loc 2 1010 0
+	str	r0, [r5, #8]
+	.loc 2 1011 0
+	str	r7, [r5, #12]
+.LVL1558:
+	.loc 2 1013 0
+	strh	r2, [r7, #2]	@ movhi
+	.loc 2 1014 0
+	movw	r2, #61604
+	strh	r2, [r7]	@ movhi
+	.loc 2 1015 0
+	ldr	r2, [r3, #8]
+	.loc 2 1016 0
+	str	r6, [r7, #8]
+	.loc 2 1017 0
+	str	r6, [r7, #12]
+	.loc 2 1015 0
+	str	r2, [r7, #4]
+	.loc 2 1020 0
+	ldr	r2, .L1392+16
+	.loc 2 1021 0
+	str	r3, [sp, #4]
+	.loc 2 1020 0
+	stm	r4, {r1, r2}
+	.loc 2 1021 0
+	ldrh	r2, [r3, #6]
+	strh	r2, [r4, #8]	@ movhi
+	.loc 2 1022 0
+	ldr	r2, .L1392+20
+	ldrh	r2, [r2]
+	strb	r2, [r4, #10]
+	.loc 2 1024 0
+	ldr	r2, .L1392+24
+	ldrh	r1, [r2]
+	.loc 2 1025 0
+	ldrh	ip, [r2, #2]
+	.loc 2 1024 0
+	strh	r1, [r4, #14]	@ movhi
+	.loc 2 1025 0
+	ldrb	r1, [r2, #6]	@ zero_extendqisi2
+	.loc 2 1026 0
+	ldrb	r2, [r2, #8]	@ zero_extendqisi2
+	strb	r2, [r4, #11]
+	.loc 2 1025 0
+	orr	r1, r1, ip, lsl #6
+	.loc 2 1028 0
+	ldr	r2, .L1392+28
+	.loc 2 1025 0
+	strh	r1, [r4, #16]	@ movhi
+	.loc 2 1028 0
+	ldrh	r1, [r2]
+	.loc 2 1029 0
+	ldrh	ip, [r2, #2]
+	.loc 2 1028 0
+	strh	r1, [r4, #18]	@ movhi
+	.loc 2 1029 0
+	ldrb	r1, [r2, #6]	@ zero_extendqisi2
+	.loc 2 1030 0
+	ldrb	r2, [r2, #8]	@ zero_extendqisi2
+	.loc 2 1029 0
+	orr	r1, r1, ip, lsl #6
+	strh	r1, [r4, #20]	@ movhi
+	.loc 2 1030 0
+	strb	r2, [r4, #12]
+	.loc 2 1032 0
+	ldr	r2, .L1392+32
+	ldrh	r1, [r2]
+	.loc 2 1033 0
+	ldrh	ip, [r2, #2]
+	.loc 2 1032 0
+	strh	r1, [r4, #22]	@ movhi
+	.loc 2 1033 0
+	ldrb	r1, [r2, #6]	@ zero_extendqisi2
+	.loc 2 1034 0
+	ldrb	r2, [r2, #8]	@ zero_extendqisi2
+	strb	r2, [r4, #13]
+	.loc 2 1033 0
+	orr	r1, r1, ip, lsl #6
+	.loc 2 1036 0
+	ldr	r2, .L1392+36
+	.loc 2 1033 0
+	strh	r1, [r4, #24]	@ movhi
+	.loc 2 1047 0
+	movs	r1, #255
+	.loc 2 1036 0
+	ldr	r2, [r2]
+	str	r2, [r4, #32]
+	.loc 2 1041 0
+	ldr	r2, .L1392+40
+	ldr	r2, [r2]
+	str	r2, [r4, #40]
+	.loc 2 1042 0
+	ldr	r2, .L1392+44
+	ldr	r2, [r2]
+	str	r2, [r4, #36]
+	.loc 2 1047 0
+	ldr	r2, .L1392+48
+	ldrh	r2, [r2]
+	bl	ftl_memset
+.LVL1559:
+	.loc 2 1048 0
+	mov	r1, r4
+	.loc 2 1049 0
+	ldr	r4, .L1392+52
+	.loc 2 1048 0
+	movs	r2, #48
+	ldr	r0, [r5, #8]
+	bl	ftl_memcpy
+.LVL1560:
+	.loc 2 1049 0
+	ldrh	r2, [r4]
+	ldr	r0, [r5, #8]
+	ldr	r1, .L1392+56
+	lsls	r2, r2, #1
+	adds	r0, r0, #48
+	ldr	r1, [r1]
+	bl	ftl_memcpy
+.LVL1561:
+	.loc 2 1050 0
+	ldrh	r0, [r4]
+	ldr	r1, .L1392+60
+	ldr	r4, [r5, #8]
+	lsrs	r2, r0, #3
+	adds	r0, r0, #24
+	lsls	r0, r0, #1
+	ldr	r1, [r1]
+	adds	r2, r2, #4
+	bic	r0, r0, #3
+	add	r0, r0, r4
+	bl	ftl_memcpy
+.LVL1562:
+	.loc 2 1051 0
+	mov	r0, r6
+	bl	FtlUpdateVaildLpn
+.LVL1563:
+	ldr	r3, [sp, #4]
+	mov	r4, r3
+.LVL1564:
+.L1381:
+	.loc 2 1053 0
+	ldr	r3, [r8]
+	.loc 2 1055 0
+	ldrh	r2, [r4]
+	.loc 2 1056 0
+	ldr	r0, .L1392+4
+	.loc 2 1053 0
+	str	r3, [r5, #8]
+	.loc 2 1054 0
+	ldr	r3, [r10]
+	str	r3, [r5, #12]
+	.loc 2 1055 0
+	ldrh	r3, [r4, #2]
+	orr	r3, r3, r2, lsl #10
+	str	r3, [r5, #4]
+	.loc 2 1056 0
+	movs	r3, #1
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+.LVL1565:
+	.loc 2 1057 0
+	ldr	r3, .L1392+64
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3]
+	subs	r3, r3, #1
+	cmp	r2, r3
+	blt	.L1382
+	.loc 2 1059 0
+	ldrh	r3, [r4]
+	.loc 2 1058 0
+	ldrh	fp, [r4, #4]
+.LVL1566:
+	.loc 2 1059 0
+	strh	r3, [r4, #4]	@ movhi
+	.loc 2 1060 0
+	movs	r3, #0
+	strh	r3, [r4, #2]	@ movhi
+	.loc 2 1061 0
+	bl	FtlFreeSysBlkQueueOut
+.LVL1567:
+	.loc 2 1066 0
+	ldr	r2, .L1392+40
+	.loc 2 1061 0
+	strh	r0, [r4]	@ movhi
+	.loc 2 1066 0
+	ldr	r3, [r2]
+	adds	r1, r3, #1
+	str	r3, [r4, #8]
+	str	r1, [r2]
+	.loc 2 1067 0
+	lsls	r2, r0, #10
+	str	r2, [r5, #4]
+	.loc 2 1068 0
+	str	r3, [r7, #4]
+	.loc 2 1070 0
+	movs	r3, #1
+	.loc 2 1069 0
+	strh	r0, [r7, #2]	@ movhi
+	.loc 2 1070 0
+	mov	r2, r3
+	mov	r1, r3
+	ldr	r0, .L1392+4
+	bl	FlashProgPages
+.LVL1568:
+.L1382:
+	.loc 2 1072 0
+	ldrh	r3, [r4, #2]
+	.loc 2 1073 0
+	ldr	r2, [r5]
+	.loc 2 1072 0
+	adds	r3, r3, #1
+	uxth	r3, r3
+	.loc 2 1073 0
+	adds	r2, r2, #1
+	.loc 2 1072 0
+	strh	r3, [r4, #2]	@ movhi
+	.loc 2 1073 0
+	bne	.L1383
+	.loc 2 1075 0
+	cmp	r3, #1
+	bne	.L1384
+	.loc 2 1075 0 is_stmt 0 discriminator 1
+	movw	r2, #1075
+	ldr	r1, .L1392+68
+	ldr	r0, .L1392+72
+	bl	printf
+.LVL1569:
+.L1384:
+	.loc 2 1076 0 is_stmt 1
+	ldrh	r3, [r4, #2]
+	.loc 2 1078 0
+	adds	r6, r6, #1
+.LVL1570:
+	uxth	r6, r6
+.LVL1571:
+	.loc 2 1076 0
+	cmp	r3, #1
+	.loc 2 1077 0
+	itttt	eq
+	ldreq	r3, .L1392+64
+	ldrheq	r3, [r3]
+	addeq	r3, r3, #-1
+	strheq	r3, [r4, #2]	@ movhi
+	.loc 2 1079 0
+	cmp	r6, #3
+	bls	.L1381
+	.loc 2 1080 0
+	mov	r2, r6
+	ldr	r1, [r5, #4]
+	ldr	r0, .L1392+76
+	bl	printf
+.LVL1572:
+.L1387:
+	b	.L1387
+.L1383:
+	.loc 2 1086 0
+	cmp	r3, #1
+	beq	.L1381
+	.loc 2 1089 0
+	movw	r3, #65535
+	cmp	fp, r3
+	beq	.L1388
+	.loc 2 1090 0
+	movs	r1, #1
+	mov	r0, fp
+	bl	FtlFreeSysBlkQueueIn
+.LVL1573:
+.L1388:
+	.loc 2 1092 0
+	movs	r0, #0
+	add	sp, sp, #8
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1574:
+.L1393:
+	.align	2
+.L1392:
+	.word	.LANCHOR81
+	.word	.LANCHOR108
+	.word	.LANCHOR79
+	.word	1179929683
+	.word	1342177344
+	.word	.LANCHOR10
+	.word	.LANCHOR51
+	.word	.LANCHOR52
+	.word	.LANCHOR53
+	.word	.LANCHOR73
+	.word	.LANCHOR71
+	.word	.LANCHOR72
+	.word	.LANCHOR23
+	.word	.LANCHOR5
+	.word	.LANCHOR43
+	.word	.LANCHOR1
+	.word	.LANCHOR20
+	.word	.LANCHOR167
+	.word	.LC1
+	.word	.LC101
+	.word	.LANCHOR39
+	.word	.LANCHOR109
+	.cfi_endproc
+.LFE272:
+	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
+	.section	.text.FtlVpcCheckAndModify,"ax",%progbits
+	.align	1
+	.global	FtlVpcCheckAndModify
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlVpcCheckAndModify, %function
+FtlVpcCheckAndModify:
+.LFB292:
+	.loc 2 2192 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -28
+	.cfi_offset 5, -24
+	.cfi_offset 6, -20
+	.cfi_offset 7, -16
+	.cfi_offset 8, -12
+	.cfi_offset 10, -8
+	.cfi_offset 14, -4
+	.loc 2 2199 0
+	movs	r5, #0
+	.loc 2 2197 0
+	ldr	r1, .L1406
+	ldr	r0, .L1406+4
+	bl	printf
+.LVL1575:
+	.loc 2 2198 0
+	ldr	r3, .L1406+8
+	movs	r1, #0
+	ldr	r4, .L1406+12
+	.loc 2 2199 0
+	ldr	r6, .L1406+16
+	.loc 2 2198 0
+	ldrh	r2, [r3]
+	ldr	r0, [r4]
+	lsls	r2, r2, #1
+	bl	ftl_memset
+.LVL1576:
+.L1395:
+	.loc 2 2199 0 discriminator 1
+	ldr	r3, [r6]
+	cmp	r5, r3
+	bcc	.L1397
+	.loc 2 2206 0 discriminator 1
+	ldr	r10, .L1406+36
+	movs	r7, #0
+	.loc 2 2207 0 discriminator 1
+	ldr	r8, .L1406+40
+.LVL1577:
+.L1398:
+	.loc 2 2206 0 discriminator 1
+	ldrh	r3, [r10]
+	uxth	r5, r7
+.LVL1578:
+	cmp	r3, r5
+	bhi	.L1402
+	.loc 2 2218 0
+	add	sp, sp, #12
+	.cfi_remember_state
+	.cfi_def_cfa_offset 28
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.LVL1579:
+.L1397:
+	.cfi_restore_state
+	.loc 2 2200 0
+	movs	r2, #0
+	add	r1, sp, #4
+	mov	r0, r5
+	bl	log2phys
+.LVL1580:
+	.loc 2 2201 0
+	ldr	r0, [sp, #4]
+	adds	r3, r0, #1
+	beq	.L1396
+	.loc 2 2202 0
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+.LVL1581:
+	.loc 2 2203 0
+	ldr	r2, [r4]
+	ldrh	r3, [r2, r0, lsl #1]
+	adds	r3, r3, #1
+	strh	r3, [r2, r0, lsl #1]	@ movhi
+.LVL1582:
+.L1396:
+	.loc 2 2199 0 discriminator 2
+	adds	r5, r5, #1
+.LVL1583:
+	b	.L1395
+.LVL1584:
+.L1402:
+	.loc 2 2207 0
+	ldr	r3, [r8]
+	uxth	r6, r7
+	ldrh	r2, [r3, r6, lsl #1]
+	ldr	r3, [r4]
+	ldrh	r3, [r3, r6, lsl #1]
+	cmp	r2, r3
+	beq	.L1400
+	.loc 2 2207 0 is_stmt 0 discriminator 1
+	movw	r1, #65535
+	cmp	r2, r1
+	beq	.L1400
+	.loc 2 2209 0 is_stmt 1
+	mov	r1, r6
+	ldr	r0, .L1406+20
+	bl	printf
+.LVL1585:
+	.loc 2 2210 0
+	ldr	r3, .L1406+24
+	ldrh	r3, [r3]
+	cmp	r3, r5
+	beq	.L1400
+	.loc 2 2210 0 is_stmt 0 discriminator 1
+	ldr	r3, .L1406+28
+	ldrh	r3, [r3]
+	cmp	r3, r5
+	beq	.L1400
+	.loc 2 2210 0 discriminator 2
+	ldr	r3, .L1406+32
+	ldrh	r3, [r3]
+	cmp	r3, r5
+	beq	.L1400
+	.loc 2 2211 0 is_stmt 1
+	ldr	r3, [r4]
+	.loc 2 2212 0
+	mov	r0, r5
+	.loc 2 2211 0
+	ldrh	r2, [r3, r6, lsl #1]
+	ldr	r3, [r8]
+	strh	r2, [r3, r6, lsl #1]	@ movhi
+	.loc 2 2212 0
+	bl	update_vpc_list
+.LVL1586:
+	.loc 2 2213 0
+	bl	l2p_flush
+.LVL1587:
+	.loc 2 2214 0
+	bl	FtlVpcTblFlush
+.LVL1588:
+.L1400:
+	adds	r7, r7, #1
+.LVL1589:
+	b	.L1398
+.L1407:
+	.align	2
+.L1406:
+	.word	.LANCHOR168
+	.word	.LC91
+	.word	.LANCHOR6
+	.word	.LANCHOR128
+	.word	.LANCHOR62
+	.word	.LC102
+	.word	.LANCHOR51
+	.word	.LANCHOR53
+	.word	.LANCHOR52
+	.word	.LANCHOR5
+	.word	.LANCHOR43
+	.cfi_endproc
+.LFE292:
+	.size	FtlVpcCheckAndModify, .-FtlVpcCheckAndModify
+	.section	.text.allocate_new_data_superblock,"ax",%progbits
+	.align	1
+	.global	allocate_new_data_superblock
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	allocate_new_data_superblock, %function
+allocate_new_data_superblock:
+.LFB302:
+	.loc 2 2631 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1590:
+	.loc 2 2633 0
+	ldr	r3, .L1418
+	.loc 2 2631 0
+	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 2 2631 0
+	mov	r6, r0
+	.loc 2 2632 0
+	ldrh	r4, [r0]
+.LVL1591:
+	.loc 2 2633 0
+	ldrh	r3, [r3]
+	cmp	r3, r4
+	bcs	.L1409
+	.loc 2 2633 0 is_stmt 0 discriminator 1
+	movw	r2, #2633
+	ldr	r1, .L1418+4
+	ldr	r0, .L1418+8
+.LVL1592:
+	bl	printf
+.LVL1593:
+.L1409:
+	.loc 2 2635 0 is_stmt 1
+	movw	r3, #65535
+	cmp	r4, r3
+	beq	.L1410
+	.loc 2 2636 0
+	ldr	r3, .L1418+12
+	.loc 2 2637 0
+	mov	r0, r4
+	.loc 2 2636 0
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r4, lsl #1]
+	cbz	r3, .L1411
+	.loc 2 2637 0
+	bl	INSERT_DATA_LIST
+.LVL1594:
+.L1410:
+	.loc 2 2642 0
+	ldr	r5, .L1418+16
+	movw	r2, #65535
+	.loc 2 2641 0
+	movs	r3, #1
+	strb	r3, [r6, #8]
+	.loc 2 2642 0
+	ldrh	r0, [r5]
+	cmp	r0, r2
+	beq	.L1412
+	.loc 2 2643 0
+	cmp	r4, r0
+	bne	.L1413
+	.loc 2 2643 0 is_stmt 0 discriminator 1
+	ldr	r3, .L1418+12
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r0, lsl #1]
+	cbz	r3, .L1414
+.L1413:
+	.loc 2 2644 0 is_stmt 1
+	bl	update_vpc_list
+.LVL1595:
+.L1414:
+	.loc 2 2645 0
+	movw	r3, #65535
+	strh	r3, [r5]	@ movhi
+.L1412:
+	.loc 2 2647 0
+	mov	r0, r6
+	bl	allocate_data_superblock
+.LVL1596:
+	.loc 2 2648 0
+	bl	l2p_flush
+.LVL1597:
+	.loc 2 2649 0
+	movs	r0, #0
+	bl	FtlEctTblFlush
+.LVL1598:
+	.loc 2 2650 0
+	bl	FtlVpcTblFlush
+.LVL1599:
+	.loc 2 2652 0
+	movs	r0, #0
+	pop	{r4, r5, r6, pc}
+.LVL1600:
+.L1411:
+	.loc 2 2639 0
+	bl	INSERT_FREE_LIST
+.LVL1601:
+	b	.L1410
+.L1419:
+	.align	2
+.L1418:
+	.word	.LANCHOR5
+	.word	.LANCHOR169
+	.word	.LC1
+	.word	.LANCHOR43
+	.word	.LANCHOR151
+	.cfi_endproc
+.LFE302:
+	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
+	.section	.text.FtlProgPages,"ax",%progbits
+	.align	1
+	.global	FtlProgPages
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlProgPages, %function
+FtlProgPages:
+.LFB218:
+	.loc 3 904 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1602:
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 3 913 0
+	movs	r6, #0
+	.loc 3 917 0
+	ldr	r8, .L1434+24
+	.loc 3 904 0
+	mov	r4, r3
+	.loc 3 911 0
+	movs	r2, #0
+.LVL1603:
+	.loc 3 904 0
+	mov	r5, r0
+	.loc 3 911 0
+	ldrb	r3, [r3, #9]	@ zero_extendqisi2
+.LVL1604:
+	.loc 3 904 0
+	mov	r10, r1
+	.loc 3 911 0
+	bl	FlashProgPages
+.LVL1605:
+.L1421:
+	.loc 3 913 0 discriminator 1
+	cmp	r6, r10
+	beq	.L1428
+	.loc 3 918 0
+	ldr	r7, .L1434
+	b	.L1429
+.L1424:
+	.loc 3 915 0
+	ldr	r0, [r5, #4]
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+.LVL1606:
+	.loc 3 916 0
+	ldrh	r3, [r4]
+	cmp	r3, r0
+	bne	.L1422
+	.loc 3 917 0
+	ldr	r1, [r8]
+	ldrh	r0, [r4, #4]
+.LVL1607:
+	ldrh	r2, [r1, r3, lsl #1]
+	subs	r2, r2, r0
+	strh	r2, [r1, r3, lsl #1]	@ movhi
+	.loc 3 918 0
+	ldrh	r3, [r7]
+	strh	r3, [r4, #2]	@ movhi
+	.loc 3 919 0
+	movs	r3, #0
+	strb	r3, [r4, #6]
+	.loc 3 920 0
+	strh	r3, [r4, #4]	@ movhi
+.L1422:
+	.loc 3 922 0
+	ldrh	r3, [r4, #4]
+	cbnz	r3, .L1423
+	.loc 3 923 0
+	mov	r0, r4
+	bl	allocate_new_data_superblock
+.LVL1608:
+.L1423:
+	.loc 3 926 0
+	ldr	r2, .L1434+4
+	ldr	r3, [r2, #96]
+	adds	r3, r3, #1
+	str	r3, [r2, #96]
+	.loc 3 927 0
+	ldr	r0, [r5, #4]
+	ubfx	r0, r0, #10, #16
+	bl	FtlGcMarkBadPhyBlk
+.LVL1609:
+	.loc 3 928 0
+	mov	r0, r4
+	bl	get_new_active_ppa
+.LVL1610:
+	.loc 3 930 0
+	movs	r2, #0
+	.loc 3 929 0
+	str	r0, [r5, #4]
+	.loc 3 928 0
+	str	r0, [sp, #4]
+	.loc 3 930 0
+	movs	r1, #1
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	mov	r0, r5
+	bl	FlashProgPages
+.LVL1611:
+.L1429:
+	.loc 3 914 0
+	ldr	r3, [r5]
+	adds	r3, r3, #1
+	beq	.L1424
+	.loc 3 933 0
+	ldr	r3, .L1434+8
+	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L1425
+	.loc 3 933 0 is_stmt 0 discriminator 1
+	movw	r2, #933
+	ldr	r1, .L1434+12
+	ldr	r0, .L1434+16
+	bl	printf
+.LVL1612:
+.L1425:
+	.loc 3 934 0 is_stmt 1
+	ldr	r3, [r5, #4]
+	add	r1, sp, #8
+	.loc 3 935 0
+	movs	r2, #1
+	ldr	r0, [r5, #16]
+	.loc 3 934 0
+	str	r3, [r1, #-4]!
+	.loc 3 935 0
+	bl	log2phys
+.LVL1613:
+	.loc 3 937 0
+	ldr	r3, [r5, #12]
+	ldr	fp, [r3, #12]
+.LVL1614:
+	.loc 3 939 0
+	ubfx	r0, fp, #10, #16
+	bl	P2V_block_in_plane
+.LVL1615:
+	.loc 3 940 0
+	cmp	fp, #-1
+	.loc 3 939 0
+	mov	r7, r0
+.LVL1616:
+	.loc 3 940 0
+	beq	.L1426
+	.loc 3 942 0
+	ldr	r3, [r8]
+	ldrh	r2, [r3, r0, lsl #1]
+	cbnz	r2, .L1427
+	.loc 3 943 0
+	mov	r1, r0
+	ldr	r0, .L1434+20
+.LVL1617:
+	bl	printf
+.LVL1618:
+.L1427:
+	.loc 3 944 0
+	mov	r0, r7
+	bl	decrement_vpc_count
+.LVL1619:
+.L1426:
+	.loc 3 913 0 discriminator 2
+	adds	r6, r6, #1
+.LVL1620:
+	adds	r5, r5, #20
+	b	.L1421
+.LVL1621:
+.L1428:
+	.loc 3 948 0
+	ldr	r3, .L1434+8
+	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L1420
+	.loc 3 948 0 is_stmt 0 discriminator 1
+	mov	r2, #948
+	ldr	r1, .L1434+12
+	ldr	r0, .L1434+16
+	bl	printf
+.LVL1622:
+.L1420:
+	.loc 3 949 0 is_stmt 1
+	add	sp, sp, #8
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1623:
+.L1435:
+	.align	2
+.L1434:
+	.word	.LANCHOR19
+	.word	.LANCHOR83
+	.word	.LANCHOR3
+	.word	.LANCHOR170
+	.word	.LC1
+	.word	.LC103
+	.word	.LANCHOR43
+	.cfi_endproc
+.LFE218:
+	.size	FtlProgPages, .-FtlProgPages
+	.section	.text.FtlCacheWriteBack,"ax",%progbits
+	.align	1
+	.global	FtlCacheWriteBack
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlCacheWriteBack, %function
+FtlCacheWriteBack:
+.LFB219:
+	.loc 3 952 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 4, -8
+	.cfi_offset 14, -4
+	.loc 3 953 0
+	ldr	r4, .L1441
+	ldr	r0, [r4]
+	cbz	r0, .L1437
+	.loc 3 954 0
+	ldr	r3, .L1441+4
+	movs	r2, #0
+	movs	r1, #1
+	ldr	r3, [r3]
+	bl	FtlProgPages
+.LVL1624:
+	.loc 3 955 0
+	movs	r3, #0
+	str	r3, [r4]
+.L1437:
+	.loc 3 958 0
+	movs	r0, #0
+	pop	{r4, pc}
+.L1442:
+	.align	2
+.L1441:
+	.word	.LANCHOR150
+	.word	.LANCHOR171
+	.cfi_endproc
+.LFE219:
+	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
+	.section	.text.FtlSysFlush,"ax",%progbits
+	.align	1
+	.global	FtlSysFlush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlSysFlush, %function
+FtlSysFlush:
+.LFB215:
+	.loc 3 797 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 3, -8
+	.cfi_offset 14, -4
+	.loc 3 798 0
+	bl	FtlCacheWriteBack
+.LVL1625:
+	.loc 3 799 0
+	bl	l2p_flush
+.LVL1626:
+	.loc 3 800 0
+	movs	r0, #1
+	bl	FtlEctTblFlush
+.LVL1627:
+	.loc 3 801 0
+	bl	FtlVpcTblFlush
+.LVL1628:
+	.loc 3 803 0
+	movs	r0, #0
+	pop	{r3, pc}
+	.cfi_endproc
+.LFE215:
+	.size	FtlSysFlush, .-FtlSysFlush
+	.section	.text.sftl_deinit,"ax",%progbits
+	.align	1
+	.global	sftl_deinit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sftl_deinit, %function
+sftl_deinit:
+.LFB216:
+	.loc 3 806 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 3, -8
+	.cfi_offset 14, -4
+	.loc 3 807 0
+	ldr	r3, .L1446
+	ldr	r3, [r3]
+	cmp	r3, #1
+	bne	.L1445
+	.loc 3 808 0
+	bl	FtlSysFlush
+.LVL1629:
+.L1445:
+	.loc 3 810 0
+	movs	r0, #0
+	pop	{r3, pc}
+.L1447:
+	.align	2
+.L1446:
+	.word	.LANCHOR88
+	.cfi_endproc
+.LFE216:
+	.size	sftl_deinit, .-sftl_deinit
+	.section	.text.FtlDiscard,"ax",%progbits
+	.align	1
+	.global	FtlDiscard
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlDiscard, %function
+FtlDiscard:
+.LFB221:
+	.loc 3 1157 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1630:
+	.loc 3 1164 0
+	ldr	r3, .L1463
+	adds	r2, r0, r1
+	.loc 3 1157 0
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
+	.cfi_offset 14, -4
+	.loc 3 1157 0
+	mov	r6, r0
+	mov	r5, r1
+	.loc 3 1164 0
+	ldr	r3, [r3]
+	cmp	r2, r3
+	bhi	.L1456
+	.loc 3 1167 0
+	cmp	r1, #31
+	bhi	.L1450
+.LVL1631:
+.L1455:
+	.loc 3 1168 0
+	movs	r0, #0
+.L1448:
+	.loc 3 1201 0
+	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.LVL1632:
+.L1450:
+	.cfi_restore_state
+	.loc 3 1172 0
+	ldr	r8, .L1463+12
+	.loc 3 1170 0
+	bl	FtlCacheWriteBack
+.LVL1633:
+	.loc 3 1172 0
+	mov	r0, r6
+	ldrh	r4, [r8]
+	mov	r1, r4
+	bl	__aeabi_uidiv
+.LVL1634:
+	.loc 3 1173 0
+	smulbb	r3, r0, r4
+	.loc 3 1172 0
+	mov	r7, r0
+.LVL1635:
+	.loc 3 1173 0
+	subs	r6, r6, r3
+.LVL1636:
+	uxth	r6, r6
+.LVL1637:
+	.loc 3 1174 0
+	cbz	r6, .L1451
+.LVL1638:
+	.loc 3 1175 0
+	subs	r4, r4, r6
+.LVL1639:
+	.loc 3 1176 0
+	adds	r7, r7, #1
+.LVL1640:
+	.loc 3 1175 0
+	cmp	r4, r5
+	it	cs
+	movcs	r4, r5
+	uxth	r4, r4
+	.loc 3 1177 0
+	subs	r5, r5, r4
+.LVL1641:
+.L1451:
+	.loc 3 1184 0
+	ldr	r4, .L1463+4
+	.loc 3 1180 0
+	mov	r3, #-1
+	.loc 3 1185 0
+	ldr	r6, .L1463+8
+.LVL1642:
+	.loc 3 1180 0
+	str	r3, [sp, #4]
+.L1452:
+	.loc 3 1181 0
+	ldrh	r3, [r8]
+	cmp	r5, r3
+	bcs	.L1454
+	.loc 3 1194 0
+	ldr	r3, .L1463+4
+	ldr	r2, [r3]
+	cmp	r2, #32
+	bls	.L1455
+	.loc 3 1196 0
+	movs	r4, #0
+	str	r4, [r3]
+	.loc 3 1197 0
+	bl	l2p_flush
+.LVL1643:
+	.loc 3 1198 0
+	bl	FtlVpcTblFlush
+.LVL1644:
+	b	.L1455
+.L1454:
+	.loc 3 1182 0
+	movs	r2, #0
+	mov	r1, sp
+	mov	r0, r7
+	bl	log2phys
+.LVL1645:
+	.loc 3 1183 0
+	ldr	r3, [sp]
+	adds	r3, r3, #1
+	beq	.L1453
+	.loc 3 1184 0
+	ldr	r3, [r4]
+	.loc 3 1186 0
+	movs	r2, #1
+	add	r1, sp, #4
+	mov	r0, r7
+	.loc 3 1184 0
+	adds	r3, r3, #1
+	str	r3, [r4]
+	.loc 3 1185 0
+	ldr	r3, [r6]
+	adds	r3, r3, #1
+	str	r3, [r6]
+	.loc 3 1186 0
+	bl	log2phys
+.LVL1646:
+	.loc 3 1187 0
+	ldr	r0, [sp]
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+.LVL1647:
+	.loc 3 1188 0
+	bl	decrement_vpc_count
+.LVL1648:
+.L1453:
+	.loc 3 1191 0
+	ldrh	r3, [r8]
+	.loc 3 1190 0
+	adds	r7, r7, #1
+.LVL1649:
+	.loc 3 1191 0
+	subs	r5, r5, r3
+.LVL1650:
+	b	.L1452
+.LVL1651:
+.L1456:
+	.loc 3 1165 0
+	mov	r0, #-1
+.LVL1652:
+	b	.L1448
+.L1464:
+	.align	2
+.L1463:
+	.word	.LANCHOR34
+	.word	.LANCHOR172
+	.word	.LANCHOR64
+	.word	.LANCHOR12
+	.cfi_endproc
+.LFE221:
+	.size	FtlDiscard, .-FtlDiscard
+	.section	.text.FtlGcFreeTempBlock,"ax",%progbits
+	.align	1
+	.global	FtlGcFreeTempBlock
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcFreeTempBlock, %function
+FtlGcFreeTempBlock:
+.LFB311:
+	.loc 5 112 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1653:
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 48
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 5 119 0
+	movw	r2, #65535
+	ldr	r4, .L1491
+	.loc 5 115 0
+	ldr	r6, .L1491+4
+	.loc 5 119 0
+	ldrh	r5, [r4]
+	.loc 5 115 0
+	ldrh	r1, [r6]
+.LVL1654:
+	.loc 5 119 0
+	cmp	r5, r2
+	bne	.L1466
+.LVL1655:
+.L1476:
+	.loc 5 152 0
+	ldr	r3, .L1491+8
+	movs	r2, #0
+	str	r2, [r3]
+	.loc 5 153 0
+	movw	r3, #65535
+	ldrh	r2, [r4]
+	cmp	r2, r3
+	bne	.L1489
+.L1467:
+	.loc 5 154 0
+	movs	r0, #0
+.L1465:
+	.loc 5 199 0
+	add	sp, sp, #16
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1656:
+.L1466:
+	.cfi_restore_state
+	.loc 5 121 0
+	cbz	r0, .L1469
+.LVL1657:
+	.loc 5 123 0
+	ldr	r3, .L1491+12
+	ldrh	r0, [r3]
+.LVL1658:
+	cmp	r0, r2
+	beq	.L1470
+.L1471:
+	.loc 5 122 0
+	movs	r1, #2
+.LVL1659:
+.L1469:
+	.loc 5 131 0
+	ldr	r0, .L1491
+	bl	FtlGcScanTempBlk
+.LVL1660:
+	str	r0, [sp, #12]
+	.loc 5 132 0
+	adds	r0, r0, #1
+	beq	.L1472
+	.loc 5 135 0
+	ldr	r3, .L1491+16
+	ldr	r2, [r3]
+	ldrh	r3, [r2, r5, lsl #1]
+	cmp	r3, #4
+	bls	.L1473
+	.loc 5 136 0
+	subs	r3, r3, #5
+	.loc 5 137 0
+	movs	r0, #1
+	.loc 5 136 0
+	strh	r3, [r2, r5, lsl #1]	@ movhi
+	.loc 5 137 0
+	bl	FtlEctTblFlush
+.LVL1661:
+.L1473:
+	.loc 5 139 0
+	ldr	r4, .L1491+8
+	ldr	r2, [r4]
+	cbnz	r2, .L1474
+	.loc 5 140 0
+	ldr	r2, .L1491+20
+	.loc 5 141 0
+	ldr	r0, [sp, #12]
+	.loc 5 140 0
+	ldr	r3, [r2, #96]
+	.loc 5 141 0
+	ubfx	r0, r0, #10, #16
+	.loc 5 140 0
+	adds	r3, r3, #1
+	str	r3, [r2, #96]
+	.loc 5 141 0
+	bl	FtlBbmMapBadBlock
+.LVL1662:
+	.loc 5 142 0
+	bl	FtlBbmTblFlush
+.LVL1663:
+.L1474:
+	.loc 5 144 0
+	movs	r3, #0
+	str	r3, [r4]
+.L1485:
+	.loc 5 149 0
+	movs	r0, #1
+	b	.L1465
+.LVL1664:
+.L1470:
+	.loc 5 124 0
+	movs	r2, #0
+	strh	r2, [r3]	@ movhi
+	.loc 5 125 0
+	ldr	r3, .L1491+24
+	ldrh	r3, [r3]
+	cmp	r3, #17
+	bhi	.L1471
+	b	.L1469
+.LVL1665:
+.L1472:
+	.loc 5 148 0
+	ldr	r3, .L1491+12
+	ldrh	r2, [r3]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L1485
+	b	.L1476
+.LVL1666:
+.L1489:
+	.loc 5 160 0
+	bl	FtlCacheWriteBack
+.LVL1667:
+	.loc 5 162 0
+	ldrb	r1, [r4, #7]	@ zero_extendqisi2
+	ldrh	r3, [r6]
+	ldr	r5, .L1491+28
+	muls	r3, r1, r3
+	ldrh	r2, [r5]
+	cmp	r2, r3
+	beq	.L1477
+	.loc 5 162 0 is_stmt 0 discriminator 1
+	movs	r2, #162
+	ldr	r1, .L1491+32
+	ldr	r0, .L1491+36
+	bl	printf
+.LVL1668:
+.L1477:
+	.loc 5 163 0 is_stmt 1
+	ldrh	r6, [r6]
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	ldr	r2, .L1491+40
+	ldrh	r0, [r4]
+	.loc 5 168 0
+	ldr	fp, .L1491+68
+	.loc 5 163 0
+	smulbb	r3, r3, r6
+	ldr	r1, [r2]
+	.loc 5 165 0
+	movs	r6, #0
+	str	r2, [sp, #4]
+	.loc 5 163 0
+	strh	r3, [r1, r0, lsl #1]	@ movhi
+	.loc 5 164 0
+	ldr	r1, .L1491+44
+	ldrh	r3, [r5]
+	ldr	r0, [r1]
+	add	r3, r3, r0
+	str	r3, [r1]
+.LVL1669:
+.L1478:
+	.loc 5 165 0 discriminator 1
+	ldrh	r2, [r5]
+	uxth	r3, r6
+	cmp	r2, r3
+	bhi	.L1482
+	.loc 5 181 0
+	movw	r0, #65535
+	bl	decrement_vpc_count
+.LVL1670:
+	.loc 5 182 0
+	ldr	r3, [sp, #4]
+	ldrh	r0, [r4]
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r0, lsl #1]
+	cmp	r3, #0
+	beq	.L1483
+	.loc 5 183 0
+	bl	INSERT_DATA_LIST
+.LVL1671:
+.L1484:
+	.loc 5 188 0
+	ldr	r3, .L1491+48
+	.loc 5 186 0
+	movw	r6, #65535
+.LVL1672:
+	strh	r6, [r4]	@ movhi
+	.loc 5 187 0
+	movs	r4, #0
+	strh	r4, [r5]	@ movhi
+	.loc 5 188 0
+	strh	r4, [r3]	@ movhi
+	.loc 5 189 0
+	bl	l2p_flush
+.LVL1673:
+	.loc 5 190 0
+	bl	FtlVpcTblFlush
+.LVL1674:
+	.loc 5 191 0
+	ldr	r3, .L1491+24
+	ldrh	r2, [r3]
+	ldr	r3, .L1491+52
+	ldrh	r3, [r3]
+	add	r3, r3, r3, lsl #1
+	cmp	r2, r3, asr #2
+	ble	.L1467
+	.loc 5 192 0
+	ldr	r3, .L1491+56
+	.loc 5 193 0
+	movs	r2, #20
+	.loc 5 192 0
+	strh	r6, [r3]	@ movhi
+	.loc 5 193 0
+	ldr	r3, .L1491+60
+	strh	r2, [r3]	@ movhi
+	b	.L1467
+.LVL1675:
+.L1482:
+	.loc 5 166 0
+	uxth	r3, r6
+	movs	r7, #12
+	.loc 5 168 0
+	ldr	r2, [fp]
+	.loc 5 166 0
+	muls	r7, r3, r7
+	ldr	r3, .L1491+64
+	ldr	r8, [r3]
+	add	r10, r8, r7
+.LVL1676:
+	.loc 5 168 0
+	ldr	r1, [r10, #8]
+	cmp	r1, r2
+	bcc	.L1479
+	.loc 5 168 0 is_stmt 0 discriminator 1
+	movs	r2, #168
+	ldr	r1, .L1491+32
+	ldr	r0, .L1491+36
+	bl	printf
+.LVL1677:
+.L1479:
+	.loc 5 169 0 is_stmt 1
+	movs	r2, #0
+	add	r1, sp, #12
+	ldr	r0, [r10, #8]
+	bl	log2phys
+.LVL1678:
+	.loc 5 170 0
+	ldr	r2, [sp, #12]
+	ldr	r0, [r8, r7]
+	cmp	r0, r2
+	bne	.L1480
+	.loc 5 171 0
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+.LVL1679:
+	.loc 5 172 0
+	movs	r2, #1
+	.loc 5 171 0
+	mov	r7, r0
+.LVL1680:
+	.loc 5 172 0
+	add	r1, r10, #4
+	ldr	r0, [r10, #8]
+	bl	log2phys
+.LVL1681:
+	.loc 5 173 0
+	mov	r0, r7
+.LVL1682:
+.L1490:
+	.loc 5 177 0
+	bl	decrement_vpc_count
+.LVL1683:
+.L1481:
+	adds	r6, r6, #1
+.LVL1684:
+	b	.L1478
+.LVL1685:
+.L1480:
+	.loc 5 175 0
+	ldr	r3, [r10, #4]
+	cmp	r2, r3
+	beq	.L1481
+	.loc 5 177 0
+	ldrh	r0, [r4]
+	b	.L1490
+.LVL1686:
+.L1483:
+	.loc 5 185 0
+	bl	INSERT_FREE_LIST
+.LVL1687:
+	b	.L1484
+.L1492:
+	.align	2
+.L1491:
+	.word	.LANCHOR53
+	.word	.LANCHOR19
+	.word	.LANCHOR153
+	.word	.LANCHOR157
+	.word	.LANCHOR40
+	.word	.LANCHOR83
+	.word	.LANCHOR48
+	.word	.LANCHOR99
+	.word	.LANCHOR173
+	.word	.LC1
+	.word	.LANCHOR43
+	.word	.LANCHOR68
+	.word	.LANCHOR98
+	.word	.LANCHOR80
+	.word	.LANCHOR82
+	.word	.LANCHOR84
+	.word	.LANCHOR100
+	.word	.LANCHOR62
+	.cfi_endproc
+.LFE311:
+	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
+	.section	.text.FtlGcPageRecovery,"ax",%progbits
+	.align	1
+	.global	FtlGcPageRecovery
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcPageRecovery, %function
+FtlGcPageRecovery:
+.LFB314:
+	.loc 5 289 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 5 290 0
+	ldr	r4, .L1495
+	ldr	r5, .L1495+4
+	ldrh	r1, [r4]
+	mov	r0, r5
+	bl	FtlGcScanTempBlk
+.LVL1688:
+	.loc 5 291 0
+	ldrh	r2, [r5, #2]
+	ldrh	r3, [r4]
+	cmp	r2, r3
+	bcc	.L1493
+.LBB282:
+.LBB283:
+	.loc 5 293 0
+	ldr	r0, .L1495+8
+	bl	FtlMapBlkWriteDump_data
+.LVL1689:
+	.loc 5 294 0
+	movs	r0, #0
+	bl	FtlGcFreeTempBlock
+.LVL1690:
+	.loc 5 295 0
+	ldr	r3, .L1495+12
+	movs	r2, #0
+	str	r2, [r3]
+.L1493:
+	pop	{r3, r4, r5, pc}
+.L1496:
+	.align	2
+.L1495:
+	.word	.LANCHOR19
+	.word	.LANCHOR53
+	.word	.LANCHOR144
+	.word	.LANCHOR153
+.LBE283:
+.LBE282:
+	.cfi_endproc
+.LFE314:
+	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
+	.section	.text.FtlPowerLostRecovery,"ax",%progbits
+	.align	1
+	.global	FtlPowerLostRecovery
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlPowerLostRecovery, %function
+FtlPowerLostRecovery:
+.LFB286:
+	.loc 2 2032 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 2 2033 0
+	movs	r4, #0
+	.loc 2 2035 0
+	ldr	r5, .L1498
+	.loc 2 2033 0
+	ldr	r3, .L1498+4
+	.loc 2 2035 0
+	mov	r0, r5
+	.loc 2 2033 0
+	str	r4, [r3]
+	.loc 2 2035 0
+	bl	FtlRecoverySuperblock
+.LVL1691:
+	.loc 2 2036 0
+	mov	r0, r5
+	.loc 2 2037 0
+	ldr	r5, .L1498+8
+	.loc 2 2036 0
+	bl	FtlSlcSuperblockCheck
+.LVL1692:
+	.loc 2 2037 0
+	mov	r0, r5
+	bl	FtlRecoverySuperblock
+.LVL1693:
+	.loc 2 2038 0
+	mov	r0, r5
+	bl	FtlSlcSuperblockCheck
+.LVL1694:
+	.loc 2 2039 0
+	bl	FtlGcPageRecovery
+.LVL1695:
+	.loc 2 2040 0
+	movw	r0, #65535
+	bl	decrement_vpc_count
+.LVL1696:
+	.loc 2 2042 0
+	mov	r0, r4
+	pop	{r3, r4, r5, pc}
+.L1499:
+	.align	2
+.L1498:
+	.word	.LANCHOR51
+	.word	.LANCHOR163
+	.word	.LANCHOR52
+	.cfi_endproc
+.LFE286:
+	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
+	.section	.text.Ftl_gc_temp_data_write_back,"ax",%progbits
+	.align	1
+	.global	Ftl_gc_temp_data_write_back
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	Ftl_gc_temp_data_write_back, %function
+Ftl_gc_temp_data_write_back:
+.LFB316:
+	.loc 5 316 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 3, -24
+	.cfi_offset 4, -20
+	.cfi_offset 5, -16
+	.cfi_offset 6, -12
+	.cfi_offset 7, -8
+	.cfi_offset 14, -4
+	.loc 5 320 0
+	movs	r3, #0
+	ldr	r4, .L1507
+	.loc 5 321 0
+	movs	r6, #0
+	.loc 5 322 0
+	movs	r7, #20
+	.loc 5 320 0
+	mov	r2, r3
+	ldr	r5, .L1507+4
+	ldr	r1, [r4]
+	ldr	r0, [r5]
+	bl	FlashProgPages
+.LVL1697:
+.L1501:
+	.loc 5 321 0 discriminator 1
+	ldr	r1, [r4]
+	uxth	r3, r6
+	cmp	r1, r3
+	bhi	.L1504
+	.loc 5 335 0
+	ldr	r0, [r5]
+	bl	FtlGcBufFree
+.LVL1698:
+	.loc 5 337 0
+	ldr	r3, .L1507+8
+	.loc 5 336 0
+	movs	r0, #0
+	str	r0, [r4]
+	.loc 5 337 0
+	ldrh	r3, [r3, #4]
+	cbnz	r3, .L1500
+	.loc 5 338 0
+	movs	r0, #1
+	bl	FtlGcFreeTempBlock
+.LVL1699:
+	b	.L1506
+.L1504:
+	.loc 5 322 0
+	muls	r3, r7, r3
+	ldr	r2, [r5]
+	adds	r6, r6, #1
+.LVL1700:
+	adds	r1, r2, r3
+	ldr	r2, [r2, r3]
+	adds	r3, r2, #1
+	bne	.L1502
+	.loc 5 323 0
+	ldr	r3, .L1507+8
+	movs	r5, #0
+	ldr	r0, .L1507+12
+	ldrh	r4, [r3]
+	ldr	r0, [r0]
+	strh	r5, [r0, r4, lsl #1]	@ movhi
+	.loc 5 324 0
+	strh	r2, [r3]	@ movhi
+	.loc 5 325 0
+	ldr	r2, .L1507+16
+	.loc 5 326 0
+	ldr	r0, [r1, #4]
+	.loc 5 325 0
+	ldr	r3, [r2, #96]
+	.loc 5 326 0
+	ubfx	r0, r0, #10, #16
+	.loc 5 325 0
+	adds	r3, r3, #1
+	str	r3, [r2, #96]
+	.loc 5 326 0
+	bl	FtlBbmMapBadBlock
+.LVL1701:
+	.loc 5 327 0
+	bl	FtlBbmTblFlush
+.LVL1702:
+	.loc 5 328 0
+	bl	FtlGcPageVarInit
+.LVL1703:
+.L1506:
+	.loc 5 339 0
+	movs	r0, #1
+.L1500:
+	.loc 5 342 0
+	pop	{r3, r4, r5, r6, r7, pc}
+.L1502:
+	.loc 5 331 0 discriminator 2
+	ldr	r3, [r1, #12]
+.LVL1704:
+	.loc 5 332 0 discriminator 2
+	ldr	r1, [r1, #4]
+	ldr	r2, [r3, #8]
+	ldr	r0, [r3, #12]
+	bl	FtlGcUpdatePage
+.LVL1705:
+	b	.L1501
+.L1508:
+	.align	2
+.L1507:
+	.word	.LANCHOR91
+	.word	.LANCHOR121
+	.word	.LANCHOR53
+	.word	.LANCHOR43
+	.word	.LANCHOR83
+	.cfi_endproc
+.LFE316:
+	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
+	.section	.text.Ftl_get_new_temp_ppa,"ax",%progbits
+	.align	1
+	.global	Ftl_get_new_temp_ppa
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	Ftl_get_new_temp_ppa, %function
+Ftl_get_new_temp_ppa:
+.LFB315:
+	.loc 5 300 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 5 301 0
+	movw	r3, #65535
+	ldr	r4, .L1512
+	ldrh	r2, [r4]
+	cmp	r2, r3
+	beq	.L1510
+	.loc 5 301 0 is_stmt 0 discriminator 1
+	ldrh	r3, [r4, #4]
+	cbnz	r3, .L1511
+.L1510:
+	.loc 5 302 0 is_stmt 1
+	bl	FtlCacheWriteBack
+.LVL1706:
+	.loc 5 303 0
+	movs	r0, #0
+	.loc 5 304 0
+	movs	r5, #0
+	.loc 5 303 0
+	bl	FtlGcFreeTempBlock
+.LVL1707:
+	.loc 5 305 0
+	ldr	r0, .L1512
+	.loc 5 304 0
+	strb	r5, [r4, #8]
+	.loc 5 305 0
+	bl	allocate_data_superblock
+.LVL1708:
+	.loc 5 306 0
+	ldr	r3, .L1512+4
+	strh	r5, [r3]	@ movhi
+	.loc 5 307 0
+	ldr	r3, .L1512+8
+	strh	r5, [r3]	@ movhi
+	.loc 5 308 0
+	bl	l2p_flush
+.LVL1709:
+	.loc 5 309 0
+	mov	r0, r5
+	bl	FtlEctTblFlush
+.LVL1710:
+	.loc 5 310 0
+	bl	FtlVpcTblFlush
+.LVL1711:
+.L1511:
+	.loc 5 312 0
+	ldr	r0, .L1512
+	.loc 5 313 0
+	pop	{r3, r4, r5, lr}
+	.cfi_restore 14
+	.cfi_restore 5
+	.cfi_restore 4
+	.cfi_restore 3
+	.cfi_def_cfa_offset 0
+	.loc 5 312 0
+	b	get_new_active_ppa
+.LVL1712:
+.L1513:
+	.align	2
+.L1512:
+	.word	.LANCHOR53
+	.word	.LANCHOR98
+	.word	.LANCHOR99
+	.cfi_endproc
+.LFE315:
+	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
+	.section	.text.rk_ftl_garbage_collect,"ax",%progbits
+	.align	1
+	.global	rk_ftl_garbage_collect
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_ftl_garbage_collect, %function
+rk_ftl_garbage_collect:
+.LFB322:
+	.loc 5 470 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 40
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1713:
+	.loc 5 478 0
+	ldr	r3, .L1632
+	.loc 5 470 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	mov	r7, r0
+	sub	sp, sp, #48
+	.cfi_def_cfa_offset 80
+	.loc 5 478 0
+	ldr	r0, [r3]
+.LVL1714:
+	cmp	r0, #0
+	bne	.L1589
+	.loc 5 481 0
+	ldr	r3, .L1632+4
+	ldrh	r3, [r3]
+	cmp	r3, #47
+	bls	.L1514
+	.loc 5 485 0
+	ldr	r3, .L1632+8
+	ldrh	r2, [r3]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L1516
+.LVL1715:
+.L1519:
+.LBB287:
+.LBB288:
+	.loc 5 489 0
+	ldr	r3, .L1632+12
+	movw	r4, #65535
+	ldrh	r0, [r3]
+	cmp	r0, r4
+	bne	.L1517
+.L1518:
+	.loc 5 496 0
+	ldr	r2, .L1632+16
+	.loc 5 497 0
+	movw	r5, #65535
+	ldr	r6, .L1632+20
+	.loc 5 496 0
+	ldr	r3, [r2]
+	.loc 5 497 0
+	ldrh	r0, [r6]
+	.loc 5 496 0
+	adds	r3, r3, #1
+	add	r3, r3, r7, lsl #7
+	.loc 5 497 0
+	cmp	r0, r5
+	.loc 5 496 0
+	str	r3, [r2]
+	.loc 5 497 0
+	bne	.L1520
+	ldr	r1, .L1632+24
+	ldrh	r1, [r1]
+	cmp	r1, r0
+	bne	.L1521
+	ldr	r0, .L1632+28
+	ldrh	r10, [r0]
+	cmp	r10, r1
+	bne	.L1522
+	.loc 5 498 0
+	ldr	r1, .L1632+32
+	ldrh	r0, [r1]
+	mov	r8, r1
+	cmp	r0, #24
+	ite	cc
+	movcc	r1, #5120
+	movcs	r1, #1024
+	cmp	r3, r1
+	bls	.L1522
+.LBB289:
+	.loc 5 502 0
+	ldr	r3, .L1632+36
+	.loc 5 501 0
+	movs	r4, #0
+	str	r4, [r2]
+	.loc 5 502 0
+	strh	r4, [r3]	@ movhi
+	.loc 5 503 0
+	bl	GetSwlReplaceBlock
+.LVL1716:
+	.loc 5 504 0
+	cmp	r0, r10
+	.loc 5 503 0
+	mov	r5, r0
+.LVL1717:
+	.loc 5 504 0
+	bne	.L1593
+	.loc 5 505 0
+	ldr	r10, .L1632+96
+	ldrh	r2, [r8]
+	ldrh	r3, [r10]
+	cmp	r2, r3
+	bcs	.L1525
+	.loc 5 506 0
+	movs	r0, #64
+.LVL1718:
+	bl	List_get_gc_head_node
+.LVL1719:
+	.loc 5 507 0
+	uxth	r3, r0
+	cmp	r3, r5
+	beq	.L1527
+	.loc 5 508 0
+	mov	r0, r3
+	ldr	r3, .L1632+40
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r0, lsl #1]
+	cmp	r3, #7
+	bhi	.L1528
+	.loc 5 509 0
+	mov	r0, r4
+.LVL1720:
+	bl	List_get_gc_head_node
+.LVL1721:
+	uxth	r4, r0
+.LVL1722:
+	.loc 5 510 0
+	movs	r3, #128
+	strh	r3, [r10]	@ movhi
+	.loc 5 520 0
+	cmp	r4, r5
+	bne	.L1524
+.LVL1723:
+.L1527:
+	.loc 5 523 0
+	bl	FtlGcReFreshBadBlk
+.LVL1724:
+.LBE289:
+	.loc 5 527 0
+	cmp	r7, #0
+	bne	.L1530
+	movw	r3, #65535
+	cmp	r5, r3
+	bne	.L1530
+.LVL1725:
+.L1587:
+	.loc 5 528 0
+	ldr	r3, .L1632+32
+	ldrh	r3, [r3]
+	cmp	r3, #24
+	bhi	.L1594
+	ldr	r2, .L1632+44
+	.loc 5 530 0
+	cmp	r3, #16
+	.loc 5 531 0
+	ldrh	r4, [r2]
+	.loc 5 530 0
+	bls	.L1532
+	.loc 5 531 0
+	lsrs	r4, r4, #5
+.LVL1726:
+.L1531:
+	.loc 5 539 0
+	ldr	r2, .L1632+48
+	ldrh	r1, [r2]
+	cmp	r1, r3
+	mov	r1, r2
+	bcs	.L1535
+	.loc 5 540 0
+	ldr	r3, .L1632+24
+	movw	r0, #65535
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bne	.L1536
+	ldr	r0, .L1632+28
+	ldrh	r0, [r0]
+	cmp	r0, r3
+	bne	.L1536
+	.loc 5 542 0
+	ldr	r3, .L1632+36
+	ldrh	r0, [r3]
+	cbnz	r0, .L1537
+	ldr	r3, .L1632+52
+	ldr	r4, .L1632+56
+.LVL1727:
+	ldr	r3, [r3]
+	ldr	r4, [r4]
+	add	r3, r3, r3, lsl #1
+	cmp	r4, r3, lsr #2
+	bcs	.L1538
+.L1537:
+	.loc 5 543 0
+	ldr	r3, .L1632+60
+	ldrh	r3, [r3]
+	add	r3, r3, r3, lsl #1
+	asrs	r3, r3, #2
+	strh	r3, [r1]	@ movhi
+.L1539:
+	.loc 5 546 0
+	ldr	r3, .L1632+64
+	movs	r2, #0
+	str	r2, [r3]
+.LVL1728:
+.L1514:
+.LBE288:
+.LBE287:
+	.loc 5 758 0
+	add	sp, sp, #48
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1729:
+.L1516:
+	.cfi_restore_state
+	.loc 5 485 0 discriminator 1
+	ldr	r2, .L1632+24
+	ldrh	r2, [r2]
+	cmp	r2, r3
+	beq	.L1519
+	.loc 5 486 0
+	movs	r0, #1
+	bl	FtlGcFreeTempBlock
+.LVL1730:
+	cmp	r0, #0
+	beq	.L1519
+	.loc 5 487 0
+	movs	r0, #1
+	b	.L1514
+.LVL1731:
+.L1517:
+.LBB293:
+.LBB291:
+	.loc 5 489 0
+	ldr	r1, .L1632+28
+	ldrh	r2, [r1]
+	cmp	r2, r4
+	.loc 5 490 0
+	itt	eq
+	strheq	r0, [r1]	@ movhi
+	.loc 5 491 0
+	strheq	r2, [r3]	@ movhi
+	b	.L1518
+.LVL1732:
+.L1528:
+.LBB290:
+	.loc 5 512 0
+	movs	r3, #64
+.LVL1733:
+.L1626:
+	.loc 5 516 0
+	strh	r3, [r10]	@ movhi
+	b	.L1527
+.LVL1734:
+.L1525:
+	movs	r3, #80
+	b	.L1626
+.L1593:
+	.loc 5 504 0
+	mov	r4, r0
+.LVL1735:
+.L1524:
+	.loc 5 521 0
+	ldr	r3, .L1632+40
+	mov	r5, r4
+	ldr	r1, .L1632+48
+	ldrh	r2, [r8]
+	ldr	r3, [r3]
+	ldrh	r1, [r1]
+	ldr	r0, .L1632+68
+	ldrh	r3, [r3, r4, lsl #1]
+	str	r1, [sp, #4]
+	ldr	r1, .L1632+72
+	ldr	r1, [r1]
+	ldrh	r1, [r1, r4, lsl #1]
+	str	r1, [sp]
+	mov	r1, r4
+	bl	printf
+.LVL1736:
+	b	.L1527
+.LVL1737:
+.L1532:
+.LBE290:
+	.loc 5 532 0
+	cmp	r3, #12
+	bls	.L1533
+	.loc 5 533 0
+	lsrs	r4, r4, #4
+.LVL1738:
+	b	.L1531
+.LVL1739:
+.L1533:
+	.loc 5 534 0
+	cmp	r3, #8
+	bls	.L1531
+	.loc 5 535 0
+	lsrs	r4, r4, #2
+.LVL1740:
+	b	.L1531
+.LVL1741:
+.L1594:
+	.loc 5 529 0
+	movs	r4, #1
+	b	.L1531
+.L1538:
+	.loc 5 545 0
+	movs	r3, #18
+	strh	r3, [r2]	@ movhi
+	b	.L1539
+.LVL1742:
+.L1536:
+	.loc 5 549 0
+	ldr	r3, .L1632+60
+	ldrh	r3, [r3]
+	add	r3, r3, r3, lsl #1
+	asrs	r3, r3, #2
+	strh	r3, [r1]	@ movhi
+.L1535:
+	.loc 5 551 0
+	ldr	r3, .L1632+76
+	ldrh	r3, [r3]
+	cbz	r3, .L1595
+	.loc 5 552 0
+	adds	r4, r4, #32
+.LVL1743:
+	uxth	r4, r4
+.LVL1744:
+.L1595:
+	.loc 5 551 0
+	movw	r5, #65535
+.LVL1745:
+.L1541:
+	.loc 5 597 0
+	ldrh	r3, [r6]
+	movw	r2, #65535
+	cmp	r3, r2
+	bne	.L1550
+	.loc 5 598 0
+	cmp	r5, r3
+	beq	.L1551
+	.loc 5 599 0
+	strh	r5, [r6]	@ movhi
+.LVL1746:
+.L1552:
+	.loc 5 611 0
+	ldrh	r0, [r6]
+	movw	r7, #65535
+	.loc 5 610 0
+	movs	r3, #0
+	strb	r3, [r6, #8]
+	.loc 5 611 0
+	cmp	r0, r7
+	beq	.L1550
+	.loc 5 612 0
+	bl	IsBlkInGcList
+.LVL1747:
+	cbz	r0, .L1555
+	.loc 5 613 0
+	strh	r7, [r6]	@ movhi
+.L1555:
+	.loc 5 615 0
+	ldrh	r2, [r6]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L1550
+	.loc 5 616 0
+	ldr	r0, .L1632+20
+	bl	make_superblock
+.LVL1748:
+	.loc 5 619 0
+	ldr	r2, .L1632+80
+	.loc 5 617 0
+	movs	r3, #0
+	strh	r3, [r6, #2]	@ movhi
+	.loc 5 618 0
+	strb	r3, [r6, #6]
+	.loc 5 619 0
+	strh	r3, [r2]	@ movhi
+	.loc 5 620 0
+	ldr	r3, .L1632+40
+	ldrh	r2, [r6]
+	ldr	r3, [r3]
+	ldrh	r2, [r3, r2, lsl #1]
+	ldr	r3, .L1632+84
+	strh	r2, [r3]	@ movhi
+.L1550:
+	.loc 5 625 0
+	ldr	r2, .L1632+88
+	ldrh	r3, [r6]
+	ldrh	r2, [r2]
+	cmp	r2, r3
+	beq	.L1556
+	ldr	r2, .L1632+92
+	ldrh	r2, [r2]
+	cmp	r2, r3
+	beq	.L1556
+	.loc 5 631 0
+	ldr	r6, .L1632+20
+	mov	fp, r6
+.L1557:
+	ldrh	r2, [r6]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L1558
+	.loc 5 635 0
+	ldr	r8, .L1632+100
+	.loc 5 632 0
+	movs	r2, #0
+	ldr	r3, .L1632+64
+	str	r2, [r3]
+.L1559:
+	.loc 5 635 0
+	ldrh	r7, [r8]
+	mov	r0, r7
+	bl	List_get_gc_head_node
+.LVL1749:
+	uxth	r3, r0
+	.loc 5 636 0
+	movw	r1, #65535
+	cmp	r3, r1
+	.loc 5 635 0
+	strh	r3, [fp]	@ movhi
+	.loc 5 636 0
+	bne	.L1560
+	.loc 5 637 0
+	movs	r3, #0
+	.loc 5 638 0
+	movs	r0, #8
+	.loc 5 637 0
+	strh	r3, [r8]	@ movhi
+	b	.L1514
+.LVL1750:
+.L1542:
+	.loc 5 558 0
+	ldr	r3, .L1632+64
+	movs	r2, #0
+	.loc 5 560 0
+	ldr	r1, .L1632+48
+	ldr	r4, .L1632+32
+	.loc 5 558 0
+	str	r2, [r3]
+	.loc 5 560 0
+	ldrh	r3, [r1]
+	mov	r2, r1
+	ldrh	r8, [r4]
+	ldr	r5, .L1632+36
+	cmp	r3, r8
+	bcs	.L1543
+	.loc 5 561 0
+	ldrh	r3, [r5]
+	cbnz	r3, .L1544
+	ldr	r3, .L1632+52
+	ldr	r0, .L1632+56
+	ldr	r3, [r3]
+	ldr	r0, [r0]
+	add	r3, r3, r3, lsl #1
+	cmp	r0, r3, lsr #2
+	bcs	.L1545
+.L1544:
+	.loc 5 562 0
+	ldr	r3, .L1632+60
+	ldrh	r3, [r3]
+	add	r3, r3, r3, lsl #1
+	asrs	r3, r3, #2
+	strh	r3, [r2]	@ movhi
+.LVL1751:
+.L1629:
+	.loc 5 578 0
+	bl	FtlReadRefresh
+.LVL1752:
+	.loc 5 579 0
+	ldrh	r0, [r5]
+	b	.L1514
+.L1633:
+	.align	2
+.L1632:
+	.word	.LANCHOR117
+	.word	.LANCHOR45
+	.word	.LANCHOR157
+	.word	.LANCHOR102
+	.word	.LANCHOR86
+	.word	.LANCHOR82
+	.word	.LANCHOR53
+	.word	.LANCHOR101
+	.word	.LANCHOR48
+	.word	.LANCHOR174
+	.word	.LANCHOR43
+	.word	.LANCHOR19
+	.word	.LANCHOR84
+	.word	.LANCHOR62
+	.word	.LANCHOR60
+	.word	.LANCHOR80
+	.word	.LANCHOR89
+	.word	.LC104
+	.word	.LANCHOR40
+	.word	.LANCHOR103
+	.word	.LANCHOR175
+	.word	.LANCHOR176
+	.word	.LANCHOR51
+	.word	.LANCHOR52
+	.word	.LANCHOR85
+	.word	.LANCHOR87
+.LVL1753:
+.L1545:
+	.loc 5 564 0
+	movs	r3, #18
+	strh	r3, [r1]	@ movhi
+	b	.L1629
+.L1543:
+	.loc 5 572 0
+	ldrh	r0, [r5]
+	cmp	r0, #0
+	bne	.L1547
+	.loc 5 573 0
+	ldr	r3, .L1634
+	ldrh	r7, [r3]
+.LVL1754:
+	add	r2, r7, r7, lsl #1
+	asrs	r2, r2, #2
+	strh	r2, [r1]	@ movhi
+	.loc 5 574 0
+	bl	List_get_gc_head_node
+.LVL1755:
+	.loc 5 575 0
+	ldr	r3, .L1634+4
+	uxth	r0, r0
+	ldr	r2, .L1634+8
+	ldr	r3, [r3]
+	ldrh	r2, [r2]
+	ldrh	r1, [r3, r0, lsl #1]
+	ldr	r3, .L1634+12
+	ldrh	r3, [r3]
+	muls	r2, r3, r2
+	cmp	r1, r2, asr #1
+	ble	.L1548
+	.loc 5 576 0
+	subs	r3, r7, #1
+	.loc 5 575 0
+	cmp	r8, r3
+	bge	.L1629
+.L1548:
+	.loc 5 584 0
+	cmp	r1, #0
+	bne	.L1547
+	.loc 5 585 0
+	movw	r0, #65535
+.LVL1756:
+	bl	decrement_vpc_count
+.LVL1757:
+	.loc 5 586 0
+	ldrh	r0, [r4]
+	adds	r0, r0, #1
+	b	.L1514
+.LVL1758:
+.L1551:
+	.loc 5 600 0
+	ldr	r3, .L1634+16
+	ldrh	r2, [r3]
+	cmp	r2, r5
+	beq	.L1552
+	.loc 5 604 0
+	ldr	r1, .L1634+4
+	ldr	r1, [r1]
+	ldrh	r2, [r1, r2, lsl #1]
+	cbnz	r2, .L1553
+	.loc 5 605 0
+	strh	r5, [r3]	@ movhi
+.L1553:
+	.loc 5 606 0
+	ldrh	r2, [r3]
+	strh	r2, [r6]	@ movhi
+	.loc 5 607 0
+	movw	r2, #65535
+	strh	r2, [r3]	@ movhi
+	b	.L1552
+.LVL1759:
+.L1556:
+	.loc 5 626 0
+	movw	r3, #65535
+	strh	r3, [r6]	@ movhi
+.LVL1760:
+.L1630:
+	.loc 5 652 0
+	ldr	r3, .L1634+20
+	ldrh	r0, [r3]
+	b	.L1514
+.LVL1761:
+.L1560:
+	str	r0, [sp, #16]
+	.loc 5 640 0
+	mov	r0, r3
+	str	r3, [sp, #12]
+	adds	r7, r7, #1
+	bl	IsBlkInGcList
+.LVL1762:
+	ldr	r3, [sp, #12]
+	ldr	r2, [sp, #16]
+	cbz	r0, .L1561
+	.loc 5 641 0
+	strh	r7, [r8]	@ movhi
+	b	.L1559
+.L1561:
+	.loc 5 645 0
+	uxth	r0, r2
+	ldr	r2, .L1634+24
+	ldr	r10, .L1634+4
+	.loc 5 644 0
+	uxth	r7, r7
+	.loc 5 645 0
+	ldrh	lr, [r2]
+	ldr	r2, .L1634+8
+	ldr	r1, [r10]
+	.loc 5 644 0
+	strh	r7, [r8]	@ movhi
+	.loc 5 645 0
+	ldrh	r2, [r2]
+	ldrh	ip, [r1, r0, lsl #1]
+	mul	lr, r2, lr
+	cmp	ip, lr, asr #1
+	bgt	.L1563
+	.loc 5 646 0
+	cmp	r7, #48
+	bls	.L1564
+	cmp	ip, #8
+	bls	.L1564
+	ldr	r7, .L1634+28
+	ldrh	r7, [r7]
+	cmp	r7, #35
+	bhi	.L1564
+.L1563:
+	.loc 5 647 0
+	ldr	r2, .L1634+32
+	movs	r7, #0
+	strh	r7, [r2]	@ movhi
+.L1564:
+	.loc 5 649 0
+	ldrh	r1, [r1, r0, lsl #1]
+	cmp	lr, r1
+	bgt	.L1565
+	movw	r2, #65535
+	cmp	r5, r2
+	bne	.L1565
+	.loc 5 651 0
+	ldr	r2, .L1634+32
+	movs	r3, #0
+	.loc 5 650 0
+	strh	r5, [fp]	@ movhi
+	.loc 5 651 0
+	strh	r3, [r2]	@ movhi
+	b	.L1630
+.L1565:
+	.loc 5 655 0
+	cbnz	r1, .L1566
+	.loc 5 656 0
+	movw	r0, #65535
+	bl	decrement_vpc_count
+.LVL1763:
+	.loc 5 657 0
+	ldr	r3, .L1634+32
+	ldr	r2, .L1634+32
+	ldrh	r3, [r3]
+	adds	r3, r3, #1
+	strh	r3, [r2]	@ movhi
+	b	.L1559
+.L1566:
+	.loc 5 660 0
+	movs	r2, #0
+	strb	r2, [fp, #8]
+	.loc 5 662 0
+	ldr	r2, .L1634+36
+	ldrh	r2, [r2]
+	cmp	r2, r3
+	bne	.L1567
+	movw	r2, #662
+	ldr	r1, .L1634+40
+	ldr	r0, .L1634+44
+	bl	printf
+.LVL1764:
+.L1567:
+	.loc 5 663 0
+	ldr	r3, .L1634+48
+	ldrh	r2, [fp]
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bne	.L1568
+	movw	r2, #663
+	ldr	r1, .L1634+40
+	ldr	r0, .L1634+44
+	bl	printf
+.LVL1765:
+.L1568:
+	.loc 5 664 0
+	ldr	r3, .L1634+52
+	ldrh	r2, [fp]
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bne	.L1569
+	mov	r2, #664
+	ldr	r1, .L1634+40
+	ldr	r0, .L1634+44
+	bl	printf
+.LVL1766:
+.L1569:
+	.loc 5 665 0
+	mov	r0, r6
+	bl	make_superblock
+.LVL1767:
+	.loc 5 666 0
+	ldr	r2, .L1634+56
+	movs	r3, #0
+	.loc 5 667 0
+	ldrh	r1, [fp]
+	.loc 5 666 0
+	strh	r3, [r2]	@ movhi
+	.loc 5 667 0
+	ldr	r2, [r10]
+	ldrh	r1, [r2, r1, lsl #1]
+	ldr	r2, .L1634+60
+	.loc 5 668 0
+	strh	r3, [fp, #2]	@ movhi
+	.loc 5 669 0
+	strb	r3, [fp, #6]
+	.loc 5 667 0
+	strh	r1, [r2]	@ movhi
+.L1558:
+	.loc 5 675 0
+	bl	FtlReadRefresh
+.LVL1768:
+	.loc 5 678 0
+	ldr	r3, .L1634+64
+	movs	r2, #1
+	str	r2, [r3]
+	.loc 5 679 0
+	ldr	r3, .L1634+24
+	ldrh	r3, [r3]
+	str	r3, [sp, #28]
+.LVL1769:
+	.loc 5 680 0
+	ldrh	r3, [fp, #2]
+	ldr	r1, [sp, #28]
+	adds	r2, r3, r4
+	cmp	r2, r1
+	.loc 5 681 0
+	itt	gt
+	movgt	r2, r1
+	subgt	r4, r2, r3
+.LVL1770:
+	.loc 5 693 0
+	mov	r3, #0
+	.loc 5 681 0
+	it	gt
+	uxthgt	r4, r4
+.LVL1771:
+.L1628:
+	str	r3, [sp, #24]
+.LVL1772:
+	.loc 5 683 0
+	ldrh	r3, [sp, #24]
+	cmp	r4, r3
+	bls	.L1579
+	.loc 5 685 0
+	ldr	r3, .L1634+8
+	.loc 5 687 0
+	movw	r10, #65535
+	.loc 5 688 0
+	ldrh	r8, [r6, #2]
+	ldr	r1, .L1634+68
+	.loc 5 685 0
+	ldrh	ip, [r3]
+	.loc 5 688 0
+	ldr	r3, .L1634+72
+	ldr	r0, [r3]
+	ldr	r3, [sp, #24]
+	add	r8, r8, r3
+	movs	r3, #0
+	str	r3, [sp, #12]
+	b	.L1580
+.LVL1773:
+.L1573:
+	.loc 5 686 0
+	ldrh	r2, [r1, #2]!
+.LVL1774:
+	.loc 5 687 0
+	cmp	r2, r10
+	beq	.L1572
+	.loc 5 688 0
+	ldr	r7, [sp, #12]
+	mov	lr, #20
+	orr	r2, r8, r2, lsl #10
+.LVL1775:
+	mla	lr, lr, r7, r0
+	str	r2, [lr, #4]
+	.loc 5 689 0
+	mov	r2, r7
+	adds	r2, r2, #1
+	uxth	r2, r2
+	str	r2, [sp, #12]
+.LVL1776:
+.L1572:
+	adds	r3, r3, #1
+.LVL1777:
+.L1580:
+	.loc 5 685 0
+	uxth	r2, r3
+	cmp	ip, r2
+	bhi	.L1573
+	.loc 5 693 0
+	ldrb	r2, [r6, #8]	@ zero_extendqisi2
+	ldr	r1, [sp, #12]
+	bl	FlashReadPages
+.LVL1778:
+	movs	r3, #0
+.LVL1779:
+.L1627:
+	str	r3, [sp, #20]
+.LVL1780:
+	.loc 5 695 0
+	ldr	r2, [sp, #12]
+	ldrh	r3, [sp, #20]
+	cmp	r2, r3
+	bhi	.L1578
+.LVL1781:
+	ldr	r3, [sp, #24]
+	adds	r3, r3, #1
+	b	.L1628
+.L1635:
+	.align	2
+.L1634:
+	.word	.LANCHOR80
+	.word	.LANCHOR43
+	.word	.LANCHOR3
+	.word	.LANCHOR20
+	.word	.LANCHOR101
+	.word	.LANCHOR174
+	.word	.LANCHOR19
+	.word	.LANCHOR98
+	.word	.LANCHOR87
+	.word	.LANCHOR51
+	.word	.LANCHOR177
+	.word	.LC1
+	.word	.LANCHOR52
+	.word	.LANCHOR53
+	.word	.LANCHOR175
+	.word	.LANCHOR176
+	.word	.LANCHOR117
+	.word	.LANCHOR82+14
+	.word	.LANCHOR95
+.LVL1782:
+.L1578:
+	ldr	r3, [sp, #20]
+	movs	r7, #20
+	muls	r7, r3, r7
+	.loc 5 696 0
+	ldr	r3, .L1636
+	ldr	r3, [r3]
+	adds	r2, r3, r7
+.LVL1783:
+	.loc 5 697 0
+	ldr	r3, [r3, r7]
+	adds	r3, r3, #1
+	beq	.L1575
+	.loc 5 696 0
+	ldr	r3, [r2, #12]
+	.loc 5 697 0
+	ldrh	r2, [r3]
+.LVL1784:
+	.loc 5 696 0
+	str	r3, [sp, #16]
+	.loc 5 697 0
+	movw	r3, #61589
+.LVL1785:
+	cmp	r2, r3
+	bne	.L1575
+	.loc 5 699 0
+	ldr	r3, [sp, #16]
+	ldr	r8, [r3, #8]
+.LVL1786:
+	.loc 5 700 0
+	cmp	r8, #-1
+	bne	.L1576
+	mov	r2, #700
+	ldr	r1, .L1636+4
+	ldr	r0, .L1636+8
+	bl	printf
+.LVL1787:
+.L1576:
+	.loc 5 701 0
+	movs	r2, #0
+	add	r1, sp, #44
+	mov	r0, r8
+	bl	log2phys
+.LVL1788:
+	.loc 5 702 0
+	ldr	r3, .L1636
+	ldr	r1, [r3]
+	ldr	r3, [sp, #44]
+	add	r1, r1, r7
+	ldr	r2, [r1, #4]
+	cmp	r2, r3
+	bne	.L1575
+	.loc 5 704 0
+	ldr	r2, .L1636+12
+	.loc 5 705 0
+	mov	r10, #20
+	ldr	r8, .L1636+36
+.LVL1789:
+	ldr	r1, [r1, #16]
+	.loc 5 704 0
+	ldrh	r3, [r2]
+	adds	r3, r3, #1
+	strh	r3, [r2]	@ movhi
+	.loc 5 705 0
+	ldr	r2, .L1636+16
+	ldr	r3, [r8]
+	ldr	r0, [r2]
+	str	r2, [sp, #36]
+	mla	r3, r10, r3, r0
+	str	r1, [r3, #16]
+	str	r3, [sp, #32]
+	.loc 5 706 0
+	bl	Ftl_get_new_temp_ppa
+.LVL1790:
+	ldr	r3, [sp, #32]
+	.loc 5 707 0
+	ldr	r2, [sp, #36]
+	.loc 5 709 0
+	ldr	r1, [sp, #16]
+	.loc 5 706 0
+	str	r0, [r3, #4]
+	.loc 5 707 0
+	ldr	r2, [r2]
+	ldr	r3, [r8]
+	mla	r10, r10, r3, r2
+	ldr	r2, .L1636
+	.loc 5 715 0
+	adds	r3, r3, #1
+	.loc 5 707 0
+	ldr	r0, [r2]
+	add	r0, r0, r7
+	.loc 5 710 0
+	ldr	r7, .L1636+20
+	.loc 5 707 0
+	ldr	r2, [r0, #8]
+	str	r2, [r10, #8]
+	.loc 5 708 0
+	ldr	r2, [r0, #12]
+	str	r2, [r10, #12]
+	.loc 5 709 0
+	ldr	r2, [sp, #44]
+	str	r2, [r1, #12]
+	.loc 5 710 0
+	ldrh	r2, [r7]
+	strh	r2, [r1, #2]	@ movhi
+	.loc 5 713 0
+	ldr	r2, .L1636+24
+	.loc 5 715 0
+	str	r3, [r8]
+	.loc 5 713 0
+	ldr	r2, [r2]
+	str	r2, [r1, #4]
+	.loc 5 716 0
+	movs	r1, #1
+	bl	FtlGcBufAlloc
+.LVL1791:
+	.loc 5 717 0
+	ldrb	r2, [r7, #7]	@ zero_extendqisi2
+	ldr	r3, [r8]
+	cmp	r2, r3
+	beq	.L1577
+	ldrh	r3, [r7, #4]
+	cbnz	r3, .L1575
+.L1577:
+	.loc 5 718 0
+	bl	Ftl_gc_temp_data_write_back
+.LVL1792:
+	cbz	r0, .L1575
+.LVL1793:
+.L1631:
+	.loc 5 733 0
+	ldr	r3, .L1636+28
+	movs	r2, #0
+	str	r2, [r3]
+	b	.L1630
+.LVL1794:
+.L1575:
+	ldr	r3, [sp, #20]
+	adds	r3, r3, #1
+	b	.L1627
+.LVL1795:
+.L1579:
+	.loc 5 727 0
+	ldrh	r3, [r6, #2]
+	add	r4, r4, r3
+.LVL1796:
+	.loc 5 729 0
+	ldr	r3, [sp, #28]
+	.loc 5 727 0
+	uxth	r4, r4
+	.loc 5 729 0
+	cmp	r3, r4
+	.loc 5 727 0
+	strh	r4, [r6, #2]	@ movhi
+	.loc 5 729 0
+	bls	.L1581
+	ldr	r3, .L1636+12
+	ldrh	r2, [r3]
+	ldr	r3, .L1636+32
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bne	.L1582
+.L1581:
+	.loc 5 731 0
+	ldr	r3, .L1636+36
+	ldr	r3, [r3]
+	cbz	r3, .L1583
+	.loc 5 732 0
+	bl	Ftl_gc_temp_data_write_back
+.LVL1797:
+	cmp	r0, #0
+	bne	.L1631
+.L1583:
+	.loc 5 737 0
+	ldr	r3, .L1636+12
+	ldrh	r1, [r3]
+	cbnz	r1, .L1584
+	ldr	r3, .L1636+40
+	ldrh	r2, [r6]
+	ldr	r3, [r3]
+	ldrh	r0, [r3, r2, lsl #1]
+	cbz	r0, .L1584
+	.loc 5 739 0
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	.loc 5 740 0
+	ldrh	r0, [r6]
+	bl	update_vpc_list
+.LVL1798:
+	.loc 5 741 0
+	bl	FtlCacheWriteBack
+.LVL1799:
+	.loc 5 742 0
+	bl	l2p_flush
+.LVL1800:
+	.loc 5 743 0
+	bl	FtlVpcTblFlush
+.LVL1801:
+.L1584:
+	.loc 5 745 0
+	movw	r3, #65535
+	strh	r3, [r6]	@ movhi
+.L1582:
+	.loc 5 747 0
+	ldr	r3, .L1636+44
+	ldrh	r3, [r3]
+	cmp	r3, #2
+	bhi	.L1585
+	.loc 5 749 0
+	ldr	r3, .L1636+48
+	ldrh	r4, [r3]
+.LVL1802:
+	b	.L1557
+.LVL1803:
+.L1585:
+	.loc 5 752 0
+	ldr	r2, .L1636+28
+	movs	r1, #0
+	str	r1, [r2]
+	.loc 5 754 0
+	ldr	r2, .L1636+52
+	ldrh	r0, [r2]
+	cmp	r0, #0
+	bne	.L1514
+	.loc 5 757 0
+	adds	r0, r3, #1
+.LVL1804:
+	b	.L1514
+.LVL1805:
+.L1589:
+.LBE291:
+.LBE293:
+	.loc 5 479 0
+	movs	r0, #0
+	b	.L1514
+.LVL1806:
+.L1520:
+.LBB294:
+.LBB292:
+	.loc 5 527 0
+	cmp	r7, #0
+	beq	.L1587
+.LVL1807:
+.L1530:
+	.loc 5 557 0
+	ldr	r3, .L1636+20
+	ldrh	r2, [r3]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L1598
+.LVL1808:
+.L1588:
+	ldr	r3, .L1636+56
+	movw	r2, #65535
+	ldrh	r3, [r3]
+	cmp	r3, r2
+	bne	.L1598
+	cmp	r5, r3
+	bne	.L1598
+	ldrh	r3, [r6]
+	cmp	r3, r5
+	beq	.L1542
+.LVL1809:
+.L1547:
+	.loc 5 556 0
+	movw	r5, #65535
+.L1598:
+	movs	r4, #1
+	b	.L1541
+.LVL1810:
+.L1522:
+	.loc 5 527 0
+	cmp	r7, #0
+	beq	.L1587
+	movw	r5, #65535
+	b	.L1588
+.LVL1811:
+.L1521:
+	cmp	r7, #0
+	bne	.L1547
+	b	.L1587
+.L1637:
+	.align	2
+.L1636:
+	.word	.LANCHOR95
+	.word	.LANCHOR177
+	.word	.LC1
+	.word	.LANCHOR175
+	.word	.LANCHOR121
+	.word	.LANCHOR53
+	.word	.LANCHOR72
+	.word	.LANCHOR117
+	.word	.LANCHOR176
+	.word	.LANCHOR91
+	.word	.LANCHOR43
+	.word	.LANCHOR48
+	.word	.LANCHOR19
+	.word	.LANCHOR174
+	.word	.LANCHOR101
+.LBE292:
+.LBE294:
+	.cfi_endproc
+.LFE322:
+	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
+	.section	.text.sftl_gc,"ax",%progbits
+	.align	1
+	.global	sftl_gc
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sftl_gc, %function
+sftl_gc:
+.LFB323:
+	.loc 5 761 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	.loc 5 762 0
+	movs	r1, #1
+	mov	r0, r1
+	b	rk_ftl_garbage_collect
+.LVL1812:
+	.cfi_endproc
+.LFE323:
+	.size	sftl_gc, .-sftl_gc
+	.section	.text.FtlRead,"ax",%progbits
+	.align	1
+	.global	FtlRead
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlRead, %function
+FtlRead:
+.LFB217:
+	.loc 3 814 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 56
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1813:
+	.loc 3 824 0
+	cmp	r0, #16
+	.loc 3 814 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	sub	sp, sp, #56
+	.cfi_def_cfa_offset 88
+	.loc 3 814 0
+	mov	r6, r1
+	mov	r8, r3
+	str	r2, [sp, #32]
+	.loc 3 824 0
+	bne	.L1640
+	.loc 3 825 0
+	mov	r2, r3
+.LVL1814:
+	ldr	r1, [sp, #32]
+.LVL1815:
+	add	r0, r6, #256
+.LVL1816:
+	bl	FtlVendorPartRead
+.LVL1817:
+	str	r0, [sp, #4]
+.LVL1818:
+.L1639:
+	.loc 3 901 0
+	ldr	r0, [sp, #4]
+	add	sp, sp, #56
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1819:
+.L1640:
+	.cfi_restore_state
+	.loc 3 830 0
+	ldr	r3, [sp, #32]
+.LVL1820:
+	adds	r3, r1, r3
+	str	r3, [sp, #12]
+	ldr	r3, .L1671
+	ldr	r2, [sp, #12]
+.LVL1821:
+	ldr	r3, [r3]
+	cmp	r2, r3
+	bhi	.L1660
+	.loc 3 830 0 is_stmt 0 discriminator 1
+	ldr	r3, .L1671+4
+	ldr	r3, [r3]
+	adds	r0, r3, #1
+.LVL1822:
+	beq	.L1661
+	.loc 3 833 0 is_stmt 1
+	bl	FtlCacheWriteBack
+.LVL1823:
+	.loc 3 835 0
+	ldr	r3, .L1671+8
+	mov	r0, r6
+	.loc 3 828 0
+	movs	r7, #0
+	.loc 3 840 0
+	mov	r5, r7
+	.loc 3 835 0
+	ldrh	r4, [r3]
+	mov	r1, r4
+	bl	__aeabi_uidiv
+.LVL1824:
+	.loc 3 836 0
+	ldr	r3, [sp, #12]
+	mov	r1, r4
+	.loc 3 835 0
+	str	r0, [sp, #16]
+.LVL1825:
+	.loc 3 836 0
+	subs	r0, r3, #1
+.LVL1826:
+	bl	__aeabi_uidiv
+.LVL1827:
+	.loc 3 837 0
+	ldr	r3, [sp, #16]
+	.loc 3 841 0
+	ldr	r2, .L1671+12
+	.loc 3 835 0
+	ldr	r4, [sp, #16]
+	.loc 3 837 0
+	rsb	r3, r3, #1
+	.loc 3 836 0
+	str	r0, [sp, #20]
+.LVL1828:
+	.loc 3 837 0
+	add	r3, r3, r0
+	.loc 3 828 0
+	str	r7, [sp, #28]
+	.loc 3 837 0
+	str	r3, [sp, #8]
+.LVL1829:
+	.loc 3 841 0
+	ldr	r1, [sp, #8]
+	ldr	r3, [r2]
+.LVL1830:
+	.loc 3 820 0
+	str	r7, [sp, #24]
+	.loc 3 815 0
+	str	r7, [sp, #4]
+	.loc 3 841 0
+	add	r3, r3, r1
+	str	r3, [r2]
+.LVL1831:
+.L1642:
+	.loc 3 842 0
+	ldr	r3, [sp, #8]
+	cbnz	r3, .L1658
+	.loc 3 898 0
+	ldr	r3, .L1671+16
+	ldrh	r3, [r3]
+	cbnz	r3, .L1659
+	.loc 3 898 0 is_stmt 0 discriminator 1
+	ldr	r3, .L1671+20
+	ldrh	r3, [r3]
+	cmp	r3, #31
+	bhi	.L1639
+.L1659:
+	.loc 3 899 0 is_stmt 1
+	movs	r1, #1
+	movs	r0, #0
+	bl	rk_ftl_garbage_collect
+.LVL1832:
+	b	.L1639
+.LVL1833:
+.L1658:
+	.loc 3 843 0
+	add	r1, sp, #52
+	movs	r2, #0
+	mov	r0, r4
+	bl	log2phys
+.LVL1834:
+	.loc 3 844 0
+	ldr	r3, [sp, #52]
+	adds	r1, r3, #1
+	bne	.L1643
+	.loc 3 845 0 discriminator 1
+	ldr	fp, .L1671+8
+	mov	r10, #0
+.L1644:
+.LVL1835:
+	ldrh	r0, [fp]
+	cmp	r10, r0
+	bcc	.L1646
+.LVL1836:
+.L1647:
+	.loc 3 874 0
+	ldr	r3, [sp, #8]
+	.loc 3 872 0
+	adds	r4, r4, #1
+.LVL1837:
+	.loc 3 874 0
+	subs	r3, r3, #1
+.LVL1838:
+	str	r3, [sp, #8]
+	beq	.L1651
+	.loc 3 874 0 is_stmt 0 discriminator 1
+	ldr	r3, .L1671+24
+.LVL1839:
+	ldrh	r3, [r3]
+	cmp	r5, r3, lsl #2
+	bne	.L1642
+.L1651:
+	.loc 3 875 0 is_stmt 1
+	cmp	r5, #0
+	beq	.L1642
+	.loc 3 876 0
+	ldr	r3, .L1671+28
+	movs	r2, #0
+	mov	r1, r5
+	.loc 3 877 0
+	mov	r10, #0
+	.loc 3 876 0
+	ldr	r0, [r3]
+	bl	FlashReadPages
+.LVL1840:
+	.loc 3 883 0
+	lsls	r3, r7, #9
+	str	r3, [sp, #44]
+	.loc 3 880 0
+	ldr	r3, [sp, #24]
+	lsls	r3, r3, #9
+	str	r3, [sp, #36]
+	ldr	r3, [sp, #28]
+	lsls	r3, r3, #9
+	str	r3, [sp, #40]
+.LVL1841:
+.L1657:
+	movs	r3, #20
+	mul	fp, r3, r10
+	.loc 3 878 0
+	ldr	r3, .L1671+28
+	ldr	r2, [r3]
+	ldr	r3, [sp, #16]
+	add	r2, r2, fp
+	ldr	r1, [r2, #16]
+	cmp	r3, r1
+	bne	.L1653
+	.loc 3 879 0
+	ldr	r1, [r2, #8]
+	ldr	r2, .L1671+32
+	ldr	r2, [r2]
+	cmp	r1, r2
+	bne	.L1654
+	.loc 3 880 0
+	ldr	r3, [sp, #36]
+	mov	r0, r8
+	ldr	r2, [sp, #40]
+	add	r1, r1, r3
+.L1670:
+	.loc 3 883 0
+	bl	ftl_memcpy
+.LVL1842:
+.L1654:
+	.loc 3 885 0
+	ldr	r3, .L1671+28
+	ldr	r2, [r3]
+	ldr	r3, [r2, fp]
+	add	r1, r2, fp
+	adds	r2, r3, #1
+	bne	.L1655
+	.loc 3 886 0
+	ldr	r1, .L1671+36
+	.loc 3 887 0
+	str	r3, [sp, #4]
+	.loc 3 886 0
+	ldr	r2, [r1, #72]
+	adds	r2, r2, #1
+	str	r2, [r1, #72]
+.LVL1843:
+.L1656:
+	.loc 3 877 0 discriminator 2
+	add	r10, r10, #1
+.LVL1844:
+	cmp	r5, r10
+	bne	.L1657
+	.loc 3 894 0
+	movs	r5, #0
+.LVL1845:
+	b	.L1642
+.LVL1846:
+.L1646:
+	.loc 3 846 0
+	mla	r0, r0, r4, r10
+.LVL1847:
+	.loc 3 847 0
+	cmp	r6, r0
+	bhi	.L1645
+	.loc 3 847 0 is_stmt 0 discriminator 1
+	ldr	r3, [sp, #12]
+	cmp	r3, r0
+	bls	.L1645
+	.loc 3 848 0 is_stmt 1
+	subs	r0, r0, r6
+.LVL1848:
+	mov	r2, #512
+	movs	r1, #0
+	add	r0, r8, r0, lsl #9
+	bl	ftl_memset
+.LVL1849:
+.L1645:
+	.loc 3 845 0 discriminator 2
+	add	r10, r10, #1
+.LVL1850:
+	b	.L1644
+.LVL1851:
+.L1643:
+	.loc 3 851 0
+	ldr	r2, .L1671+28
+	mov	r10, #20
+	ldr	r2, [r2]
+	mla	r10, r10, r5, r2
+	str	r3, [r10, #4]
+	.loc 3 852 0
+	ldr	r3, [sp, #16]
+	cmp	r4, r3
+	ldr	r3, .L1671+8
+	bne	.L1648
+	.loc 3 853 0
+	ldr	r2, .L1671+32
+	.loc 3 854 0
+	mov	r0, r6
+	ldrh	fp, [r3]
+	.loc 3 853 0
+	ldr	r2, [r2]
+	.loc 3 854 0
+	mov	r1, fp
+	.loc 3 853 0
+	str	r2, [r10, #8]
+	.loc 3 854 0
+	bl	__aeabi_uidivmod
+.LVL1852:
+	ldr	r2, [sp, #32]
+	.loc 3 855 0
+	sub	r3, fp, r1
+	.loc 3 854 0
+	str	r1, [sp, #24]
+.LVL1853:
+	cmp	r3, r2
+	it	cs
+	movcs	r3, r2
+.LVL1854:
+	.loc 3 857 0
+	cmp	fp, r3
+	str	r3, [sp, #28]
+.LVL1855:
+	bne	.L1649
+	.loc 3 858 0
+	str	r8, [r10, #8]
+.LVL1856:
+.L1649:
+	.loc 3 867 0
+	ldr	r3, .L1671+40
+	ldr	r2, .L1671+44
+	.loc 3 868 0
+	str	r4, [r10, #16]
+	.loc 3 867 0
+	ldrh	r3, [r3]
+	ldr	r2, [r2]
+	muls	r3, r5, r3
+	.loc 3 869 0
+	adds	r5, r5, #1
+.LVL1857:
+	.loc 3 867 0
+	bic	r3, r3, #3
+	add	r3, r3, r2
+	str	r3, [r10, #12]
+	b	.L1647
+.L1648:
+	.loc 3 859 0
+	ldr	r2, [sp, #20]
+	cmp	r4, r2
+	bne	.L1650
+	.loc 3 860 0
+	ldr	r2, .L1671+48
+	.loc 3 861 0
+	ldr	r1, [sp, #12]
+	.loc 3 860 0
+	ldr	r2, [r2]
+	str	r2, [r10, #8]
+	.loc 3 861 0
+	ldrh	r2, [r3]
+	mul	r3, r2, r4
+	subs	r7, r1, r3
+.LVL1858:
+	.loc 3 862 0
+	cmp	r2, r7
+	bne	.L1649
+.L1669:
+	.loc 3 865 0
+	subs	r3, r3, r6
+	add	r3, r8, r3, lsl #9
+	str	r3, [r10, #8]
+	b	.L1649
+.L1650:
+	ldrh	r3, [r3]
+	muls	r3, r4, r3
+	b	.L1669
+.LVL1859:
+.L1653:
+	.loc 3 881 0
+	ldr	r3, [sp, #20]
+	cmp	r3, r1
+	bne	.L1654
+	.loc 3 882 0
+	ldr	r3, .L1671+48
+	ldr	r1, [r2, #8]
+	ldr	r2, [r3]
+	cmp	r1, r2
+	bne	.L1654
+	.loc 3 883 0
+	ldr	r2, .L1671+8
+	ldr	r3, [sp, #20]
+	ldrh	r0, [r2]
+	ldr	r2, [sp, #44]
+	muls	r0, r3, r0
+	subs	r0, r0, r6
+	add	r0, r8, r0, lsl #9
+	b	.L1670
+.L1655:
+	.loc 3 889 0
+	cmp	r3, #256
+	bne	.L1656
+.LBB295:
+	.loc 3 890 0
+	ldr	r0, [r1, #4]
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+.LVL1860:
+	.loc 3 891 0
+	bl	FtlGcRefreshBlock
+.LVL1861:
+	b	.L1656
+.LVL1862:
+.L1660:
+.LBE295:
+	.loc 3 831 0
+	mov	r3, #-1
+.LVL1863:
+.L1661:
+	str	r3, [sp, #4]
+	b	.L1639
+.L1672:
+	.align	2
+.L1671:
+	.word	.LANCHOR34
+	.word	.LANCHOR88
+	.word	.LANCHOR12
+	.word	.LANCHOR63
+	.word	.LANCHOR103
+	.word	.LANCHOR48
+	.word	.LANCHOR3
+	.word	.LANCHOR120
+	.word	.LANCHOR116
+	.word	.LANCHOR83
+	.word	.LANCHOR24
+	.word	.LANCHOR115
+	.word	.LANCHOR114
+	.cfi_endproc
+.LFE217:
+	.size	FtlRead, .-FtlRead
+	.section	.text.sftl_read,"ax",%progbits
+	.align	1
+	.global	sftl_read
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sftl_read, %function
+sftl_read:
+.LFB222:
+	.loc 3 1204 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL1864:
+	.loc 3 1205 0
+	mov	r3, r2
+	mov	r2, r1
+.LVL1865:
+	mov	r1, r0
+.LVL1866:
+	movs	r0, #0
+.LVL1867:
+	b	FtlRead
+.LVL1868:
+	.cfi_endproc
+.LFE222:
+	.size	sftl_read, .-sftl_read
+	.section	.text.FtlWrite,"ax",%progbits
+	.align	1
+	.global	FtlWrite
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlWrite, %function
+FtlWrite:
+.LFB220:
+	.loc 3 962 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 64
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1869:
+	.loc 3 970 0
+	cmp	r0, #16
+	.loc 3 962 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	sub	sp, sp, #64
+	.cfi_def_cfa_offset 96
+	.loc 3 962 0
+	mov	r8, r1
+	str	r2, [sp, #16]
+	str	r3, [sp, #4]
+	.loc 3 970 0
+	bne	.L1675
+	.loc 3 971 0
+	mov	r2, r3
+.LVL1870:
+	ldr	r1, [sp, #16]
+.LVL1871:
+	add	r0, r8, #256
+.LVL1872:
+	bl	FtlVendorPartWrite
+.LVL1873:
+.L1674:
+	.loc 3 1153 0
+	add	sp, sp, #64
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1874:
+.L1675:
+	.cfi_restore_state
+	.loc 3 974 0
+	ldr	r3, [sp, #16]
+.LVL1875:
+	adds	r5, r1, r3
+	ldr	r3, .L1740
+	ldr	r3, [r3]
+	cmp	r5, r3
+	bhi	.L1717
+	.loc 3 974 0 is_stmt 0 discriminator 1
+	ldr	r3, .L1740+4
+	ldr	r0, [r3]
+.LVL1876:
+	adds	r4, r0, #1
+	beq	.L1674
+	.loc 3 977 0 is_stmt 1
+	ldr	r3, .L1740+8
+	mov	r2, #2048
+.LVL1877:
+	.loc 3 978 0
+	mov	r0, r8
+	.loc 3 977 0
+	str	r2, [r3]
+	.loc 3 978 0
+	ldr	r3, .L1740+12
+	ldrh	r4, [r3]
+	mov	r1, r4
+.LVL1878:
+	bl	__aeabi_uidiv
+.LVL1879:
+	.loc 3 979 0
+	mov	r1, r4
+	.loc 3 978 0
+	str	r0, [sp]
+.LVL1880:
+	.loc 3 979 0
+	subs	r0, r5, #1
+.LVL1881:
+	bl	__aeabi_uidiv
+.LVL1882:
+	.loc 3 980 0
+	ldr	r2, [sp]
+	.loc 3 979 0
+	str	r0, [sp, #20]
+.LVL1883:
+	.loc 3 980 0
+	subs	r5, r0, r2
+	.loc 3 982 0
+	ldr	r2, .L1740+16
+	.loc 3 980 0
+	adds	r3, r5, #1
+	.loc 3 982 0
+	adds	r1, r5, #1
+	.loc 3 980 0
+	str	r3, [sp, #8]
+.LVL1884:
+	.loc 3 982 0
+	ldr	r3, [r2]
+	add	r3, r3, r1
+	str	r3, [r2]
+	.loc 3 983 0
+	ldr	r3, .L1740+20
+	ldr	r7, [r3]
+	cbz	r7, .L1677
+	.loc 3 984 0
+	ldr	r3, [r7, #16]
+	ldr	r2, [sp]
+	cmp	r2, r3
+	beq	.L1678
+	.loc 3 985 0
+	bl	FtlCacheWriteBack
+.LVL1885:
+.L1677:
+	.loc 3 1008 0
+	ldr	r3, .L1740+24
+	ldr	r4, .L1740+28
+	ldr	r3, [r3]
+	cbz	r3, .L1680
+	.loc 3 1008 0 is_stmt 0 discriminator 1
+	ldrh	r2, [r4, #4]
+	.loc 3 1009 0 is_stmt 1 discriminator 1
+	ldr	r3, .L1740+32
+	cmp	r2, #0
+	it	eq
+	moveq	r4, r3
+.L1680:
+	.loc 3 1068 0
+	ldr	r6, [sp]
+.LVL1886:
+.L1681:
+	.loc 3 1011 0
+	ldr	r3, [sp, #8]
+	cmp	r3, #0
+	beq	.L1715
+	.loc 3 1012 0
+	ldr	r3, .L1740+36
+	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L1682
+	.loc 3 1012 0 is_stmt 0 discriminator 1
+	mov	r2, #1012
+	ldr	r1, .L1740+40
+	ldr	r0, .L1740+44
+	bl	printf
+.LVL1887:
+.L1682:
+	.loc 3 1013 0 is_stmt 1
+	ldrh	r7, [r4, #4]
+	cbnz	r7, .L1683
+	.loc 3 1014 0
+	bl	FtlCacheWriteBack
+.LVL1888:
+	.loc 3 1016 0
+	ldr	r3, .L1740+28
+	ldr	r5, .L1740+24
+	cmp	r4, r3
+	bne	.L1684
+	.loc 3 1017 0
+	ldr	r0, .L1740+32
+	ldrh	r4, [r0, #4]
+.LVL1889:
+	cbnz	r4, .L1685
+	.loc 3 1018 0
+	bl	allocate_new_data_superblock
+.LVL1890:
+	.loc 3 1019 0
+	str	r4, [r5]
+.L1685:
+	.loc 3 1021 0
+	ldr	r0, .L1740+28
+	bl	allocate_new_data_superblock
+.LVL1891:
+	.loc 3 1023 0
+	ldr	r4, .L1740+28
+	.loc 3 1022 0
+	ldr	r2, [r5]
+	.loc 3 1023 0
+	ldr	r3, .L1740+32
+	cmp	r2, #0
+	it	ne
+	movne	r4, r3
+.L1686:
+.LVL1892:
+	.loc 3 1033 0
+	ldrh	r3, [r4, #4]
+	cbnz	r3, .L1683
+	.loc 3 1034 0
+	mov	r0, r4
+	bl	allocate_new_data_superblock
+.LVL1893:
+.L1683:
+	.loc 3 1041 0
+	ldrb	r2, [r4, #7]	@ zero_extendqisi2
+	.loc 3 1043 0
+	ldrh	r3, [r4, #4]
+	ldr	r1, [sp, #8]
+	.loc 3 1041 0
+	lsls	r2, r2, #2
+	cmp	r3, r1
+	it	cs
+	movcs	r3, r1
+	cmp	r2, r3
+	it	cs
+	movcs	r2, r3
+	.loc 3 1045 0
+	ldr	r3, .L1740+36
+	str	r2, [sp, #36]
+.LVL1894:
+	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+.LVL1895:
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L1687
+	.loc 3 1045 0 is_stmt 0 discriminator 1
+	movw	r2, #1045
+	ldr	r1, .L1740+40
+	ldr	r0, .L1740+44
+	bl	printf
+.LVL1896:
+.L1687:
+	.loc 3 1054 0 is_stmt 1 discriminator 1
+	ldr	r10, .L1740+80
+	.loc 3 1068 0 discriminator 1
+	mov	fp, #0
+.L1688:
+.LVL1897:
+	.loc 3 1046 0 discriminator 1
+	ldr	r3, [sp, #36]
+	cmp	fp, r3
+	bne	.L1709
+.L1689:
+.LVL1898:
+	.loc 3 1127 0
+	ldr	r3, .L1740+20
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L1710
+.LVL1899:
+	.loc 3 1129 0
+	ldr	r3, [sp, #8]
+	.loc 3 1130 0
+	subs	fp, fp, #1
+.LVL1900:
+	.loc 3 1129 0
+	add	r3, r3, #-1
+	str	r3, [sp, #8]
+.LVL1901:
+	.loc 3 1130 0
+	bne	.L1710
+.LVL1902:
+.L1715:
+	.loc 3 1137 0
+	ldr	r2, [sp]
+	movs	r0, #0
+	ldr	r3, [sp, #20]
+.LVL1903:
+	.loc 3 1139 0
+	ldr	r4, .L1740+48
+.LVL1904:
+	.loc 3 1137 0
+	subs	r1, r3, r2
+	bl	rk_ftl_garbage_collect
+.LVL1905:
+	.loc 3 1139 0
+	ldrh	r2, [r4]
+	cmp	r2, #15
+	bhi	.L1712
+	.loc 3 1141 0
+	ldr	r5, .L1740+52
+	ldr	r6, .L1740+56
+.LVL1906:
+.L1736:
+	ldrh	r3, [r5]
+	movw	r2, #65535
+	cmp	r3, r2
+	bne	.L1716
+	.loc 3 1141 0 is_stmt 0 discriminator 1
+	ldrh	r2, [r6]
+	cmp	r2, r3
+	bne	.L1716
+	.loc 3 1142 0 is_stmt 1
+	movs	r0, #0
+	bl	List_get_gc_head_node
+.LVL1907:
+	uxth	r0, r0
+	bl	FtlGcRefreshBlock
+.LVL1908:
+.L1716:
+	.loc 3 1143 0
+	ldr	r2, .L1740+60
+	movs	r3, #128
+	.loc 3 1145 0
+	movs	r1, #1
+	mov	r0, r1
+	.loc 3 1143 0
+	strh	r3, [r2]	@ movhi
+	.loc 3 1144 0
+	ldr	r2, .L1740+64
+	strh	r3, [r2]	@ movhi
+	.loc 3 1145 0
+	bl	rk_ftl_garbage_collect
+.LVL1909:
+	.loc 3 1146 0
+	movs	r1, #1
+	movs	r0, #0
+	bl	rk_ftl_garbage_collect
+.LVL1910:
+	.loc 3 1147 0
+	ldrh	r3, [r4]
+	cmp	r3, #8
+	bls	.L1736
+	b	.L1712
+.LVL1911:
+.L1678:
+	.loc 3 987 0
+	ldr	r2, .L1740+68
+.LVL1912:
+	.loc 3 988 0
+	mov	r1, r4
+.LVL1913:
+	mov	r0, r8
+.LVL1914:
+	.loc 3 987 0
+	ldr	r3, [r2]
+	adds	r3, r3, #1
+	str	r3, [r2]
+	.loc 3 988 0
+	bl	__aeabi_uidivmod
+.LVL1915:
+	ldr	r2, [sp, #16]
+	.loc 3 989 0
+	subs	r4, r4, r1
+	.loc 3 992 0
+	ldr	r0, [r7, #8]
+	.loc 3 988 0
+	mov	r3, r1
+.LVL1916:
+	.loc 3 992 0
+	ldr	r1, [sp, #4]
+.LVL1917:
+	cmp	r4, r2
+	it	cs
+	movcs	r4, r2
+.LVL1918:
+	lsls	r6, r4, #9
+	add	r0, r0, r3, lsl #9
+	mov	r2, r6
+	bl	ftl_memcpy
+.LVL1919:
+	.loc 3 994 0
+	cbnz	r5, .L1679
+.LVL1920:
+.L1712:
+	.loc 3 995 0
+	movs	r0, #0
+	b	.L1674
+.LVL1921:
+.L1679:
+	.loc 3 996 0
+	ldr	r3, [sp, #16]
+	.loc 3 997 0
+	add	r8, r8, r4
+.LVL1922:
+	.loc 3 996 0
+	subs	r3, r3, r4
+	str	r3, [sp, #16]
+.LVL1923:
+	.loc 3 998 0
+	ldr	r3, [sp, #4]
+.LVL1924:
+	add	r3, r3, r6
+	str	r3, [sp, #4]
+.LVL1925:
+	.loc 3 999 0
+	ldr	r3, [sp]
+.LVL1926:
+	adds	r3, r3, #1
+	str	r3, [sp]
+.LVL1927:
+	.loc 3 1000 0
+	bl	FtlCacheWriteBack
+.LVL1928:
+	str	r5, [sp, #8]
+	b	.L1677
+.LVL1929:
+.L1684:
+	.loc 3 1028 0
+	ldrh	r2, [r3, #4]
+	.loc 3 1027 0
+	str	r7, [r5]
+	.loc 3 1028 0
+	cbnz	r2, .L1722
+	.loc 3 1029 0
+	mov	r0, r4
+	bl	allocate_new_data_superblock
+.LVL1930:
+	b	.L1686
+.L1722:
+	mov	r4, r3
+.LVL1931:
+	b	.L1683
+.LVL1932:
+.L1709:
+	.loc 3 1047 0
+	ldrh	r2, [r4, #4]
+	cmp	r2, #0
+	beq	.L1689
+	.loc 3 1051 0
+	movs	r2, #0
+	add	r1, sp, #40
+	mov	r0, r6
+	movs	r7, #20
+	bl	log2phys
+.LVL1933:
+	.loc 3 1052 0
+	mov	r0, r4
+	mul	r7, r7, fp
+	bl	get_new_active_ppa
+.LVL1934:
+	.loc 3 1055 0
+	ldr	r3, .L1740+72
+	.loc 3 1054 0
+	ldr	r1, [r10]
+	.loc 3 1055 0
+	ldrh	r2, [r3]
+	.loc 3 1054 0
+	add	r1, r1, r7
+	str	r0, [r1, #4]
+	.loc 3 1056 0
+	str	r6, [r1, #16]
+.LVL1935:
+	.loc 3 1055 0
+	mul	r0, r2, fp
+.LVL1936:
+	bic	r3, r0, #3
+	ldr	r0, .L1740+76
+	str	r3, [sp, #28]
+	ldr	r3, [r0]
+	ldr	r0, [sp, #28]
+	str	r3, [sp, #32]
+	add	r3, r3, r0
+	str	r3, [r1, #12]
+	.loc 3 1059 0
+	mov	r0, r3
+	movs	r1, #0
+.LVL1937:
+	.loc 3 1055 0
+	str	r3, [sp, #12]
+.LVL1938:
+	.loc 3 1059 0
+	bl	ftl_memset
+.LVL1939:
+	.loc 3 1061 0
+	ldr	r3, [sp]
+	ldr	r2, .L1740+12
+	cmp	r6, r3
+	beq	.L1690
+	.loc 3 1061 0 is_stmt 0 discriminator 1
+	ldr	r3, [sp, #20]
+	cmp	r6, r3
+	bne	.L1735
+.LVL1940:
+	.loc 3 1069 0 is_stmt 1
+	ldrh	r2, [r2]
+	ldr	r3, [sp, #16]
+	smulbb	r2, r2, r6
+	add	r5, r8, r3
+	.loc 3 1068 0
+	movs	r3, #0
+	str	r3, [sp, #24]
+	.loc 3 1069 0
+	subs	r5, r5, r2
+	uxth	r5, r5
+.LVL1941:
+	b	.L1693
+.L1741:
+	.align	2
+.L1740:
+	.word	.LANCHOR34
+	.word	.LANCHOR88
+	.word	.LANCHOR178
+	.word	.LANCHOR12
+	.word	.LANCHOR65
+	.word	.LANCHOR150
+	.word	.LANCHOR179
+	.word	.LANCHOR51
+	.word	.LANCHOR52
+	.word	.LANCHOR3
+	.word	.LANCHOR180
+	.word	.LC1
+	.word	.LANCHOR48
+	.word	.LANCHOR82
+	.word	.LANCHOR101
+	.word	.LANCHOR85
+	.word	.LANCHOR84
+	.word	.LANCHOR66
+	.word	.LANCHOR24
+	.word	.LANCHOR115
+	.word	.LANCHOR122
+.LVL1942:
+.L1690:
+	.loc 3 1063 0
+	ldrh	r5, [r2]
+	mov	r0, r8
+	mov	r1, r5
+	bl	__aeabi_uidivmod
+.LVL1943:
+	ldr	r3, [sp, #16]
+	.loc 3 1064 0
+	subs	r5, r5, r1
+	.loc 3 1063 0
+	str	r1, [sp, #24]
+.LVL1944:
+	cmp	r5, r3
+	it	cs
+	movcs	r5, r3
+.LVL1945:
+.L1693:
+	.loc 3 1072 0
+	ldr	r2, .L1742
+	.loc 3 1073 0
+	ldr	r3, [sp]
+	.loc 3 1072 0
+	ldrh	r2, [r2]
+	cmp	r5, r2
+	.loc 3 1074 0
+	ldr	r2, [r10]
+	.loc 3 1072 0
+	bne	.L1694
+	.loc 3 1073 0
+	cmp	r6, r3
+	.loc 3 1074 0
+	add	r7, r7, r2
+	.loc 3 1076 0
+	ittet	ne
+	mulne	r5, r5, r6
+.LVL1946:
+	ldrne	r3, [sp, #4]
+	.loc 3 1074 0
+	ldreq	r3, [sp, #4]
+	.loc 3 1076 0
+	subne	r5, r5, r8
+	.loc 3 1074 0
+	itee	eq
+	streq	r3, [r7, #8]
+	.loc 3 1076 0
+	addne	r5, r3, r5, lsl #9
+	strne	r5, [r7, #8]
+.LVL1947:
+.L1696:
+	.loc 3 1119 0
+	ldr	r3, .L1742+4
+	ldrb	r1, [r4, #6]	@ zero_extendqisi2
+	ldrh	r2, [r3]
+	cmp	r1, r2
+	bcc	.L1706
+	.loc 3 1119 0 is_stmt 0 discriminator 1
+	movw	r2, #1119
+	ldr	r1, .L1742+8
+	ldr	r0, .L1742+12
+	bl	printf
+.LVL1948:
+.L1706:
+	.loc 3 1120 0 is_stmt 1
+	ldr	r3, [sp, #32]
+	movw	r2, #61589
+	ldr	r1, [sp, #28]
+	.loc 3 1046 0
+	add	fp, fp, #1
+.LVL1949:
+	.loc 3 1120 0
+	strh	r2, [r3, r1]	@ movhi
+	.loc 3 1121 0
+	ldr	r1, .L1742+16
+	ldr	r3, [sp, #12]
+	ldr	r2, [r1]
+	str	r2, [r3, #4]
+	adds	r2, r2, #1
+	adds	r3, r2, #1
+	.loc 3 1122 0
+	ldr	r3, [sp, #12]
+	.loc 3 1121 0
+	it	eq
+	moveq	r2, #0
+	str	r2, [r1]
+	.loc 3 1123 0
+	ldr	r2, [sp, #40]
+	.loc 3 1122 0
+	str	r6, [r3, #8]
+	.loc 3 1125 0
+	adds	r6, r6, #1
+.LVL1950:
+	.loc 3 1123 0
+	str	r2, [r3, #12]
+	.loc 3 1124 0
+	ldrh	r2, [r4]
+	strh	r2, [r3, #2]	@ movhi
+	b	.L1688
+.LVL1951:
+.L1694:
+	.loc 3 1079 0
+	cmp	r6, r3
+	.loc 3 1080 0
+	add	r2, r2, r7
+	ite	eq
+	ldreq	r1, .L1742+20
+	.loc 3 1082 0
+	ldrne	r1, .L1742+24
+	ldr	r1, [r1]
+	str	r1, [r2, #8]
+	.loc 3 1084 0
+	ldr	r2, [sp, #40]
+	adds	r1, r2, #1
+	beq	.L1699
+.LBB296:
+	.loc 3 1086 0
+	str	r2, [sp, #48]
+	.loc 3 1090 0
+	add	r0, sp, #44
+	.loc 3 1088 0
+	ldr	r2, [r10]
+	.loc 3 1087 0
+	str	r6, [sp, #60]
+	.loc 3 1088 0
+	add	r2, r2, r7
+	ldr	r1, [r2, #8]
+	.loc 3 1089 0
+	ldr	r2, [r2, #12]
+	.loc 3 1088 0
+	str	r1, [sp, #52]
+	.loc 3 1090 0
+	movs	r1, #1
+	.loc 3 1089 0
+	str	r2, [sp, #56]
+	.loc 3 1090 0
+	movs	r2, #0
+	bl	FlashReadPages
+.LVL1952:
+	.loc 3 1091 0
+	ldr	r2, [sp, #44]
+	adds	r2, r2, #1
+	bne	.L1700
+	.loc 3 1092 0
+	ldr	r1, .L1742+28
+	ldr	r2, [r1, #72]
+	adds	r2, r2, #1
+	str	r2, [r1, #72]
+.L1703:
+.LBE296:
+	.loc 3 1104 0
+	ldr	r3, [sp]
+	lsls	r2, r5, #9
+	cmp	r6, r3
+	bne	.L1704
+	.loc 3 1105 0
+	ldr	r1, [r10]
+	ldr	r3, [sp, #24]
+	add	r1, r1, r7
+	ldr	r0, [r1, #8]
+	ldr	r1, [sp, #4]
+	add	r0, r0, r3, lsl #9
+.L1738:
+	.loc 3 1107 0
+	bl	ftl_memcpy
+.LVL1953:
+	.loc 3 1109 0
+	ldr	r3, [sp, #20]
+	cmp	r6, r3
+	bne	.L1696
+	.loc 3 1110 0
+	ldrh	r2, [r4, #4]
+	cmp	r2, #0
+	beq	.L1696
+	.loc 3 1111 0
+	ldr	r2, [r10]
+	add	r7, r7, r2
+	ldr	r2, .L1742+32
+	str	r7, [r2]
+	.loc 3 1112 0
+	ldr	r2, .L1742+36
+	str	r4, [r2]
+	b	.L1696
+.L1700:
+.LBB297:
+	.loc 3 1094 0
+	ldr	r3, [sp, #12]
+	ldr	r1, [r3, #8]
+	cmp	r6, r1
+	beq	.L1702
+	.loc 3 1095 0
+	ldr	r0, .L1742+28
+	ldr	r2, [r0, #72]
+	adds	r2, r2, #1
+	str	r2, [r0, #72]
+	.loc 3 1096 0
+	mov	r2, r6
+	ldr	r0, .L1742+40
+	bl	printf
+.LVL1954:
+.L1702:
+	.loc 3 1098 0
+	ldr	r3, [sp, #12]
+	ldr	r2, [r3, #8]
+	cmp	r6, r2
+	beq	.L1703
+	.loc 3 1098 0 is_stmt 0 discriminator 1
+	movw	r2, #1098
+	ldr	r1, .L1742+8
+	ldr	r0, .L1742+12
+	bl	printf
+.LVL1955:
+	b	.L1703
+.LVL1956:
+.L1699:
+.LBE297:
+	.loc 3 1101 0 is_stmt 1
+	ldr	r2, [r10]
+	movs	r1, #0
+	adds	r0, r2, r7
+	ldr	r2, .L1742+44
+	ldr	r0, [r0, #8]
+	ldrh	r2, [r2]
+	bl	ftl_memset
+.LVL1957:
+	b	.L1703
+.L1704:
+	.loc 3 1107 0
+	ldr	r1, .L1742
+	ldr	r0, [r10]
+	ldr	r3, [sp, #4]
+	ldrh	r1, [r1]
+	add	r0, r0, r7
+	ldr	r0, [r0, #8]
+	muls	r1, r6, r1
+	sub	r1, r1, r8
+	add	r1, r3, r1, lsl #9
+	b	.L1738
+.LVL1958:
+.L1735:
+	.loc 3 1117 0
+	ldrh	r2, [r2]
+	ldr	r3, [sp, #4]
+	ldr	r1, [r10]
+	muls	r2, r6, r2
+	add	r7, r7, r1
+	sub	r2, r2, r8
+	add	r2, r3, r2, lsl #9
+	str	r2, [r7, #8]
+	b	.L1696
+.LVL1959:
+.L1710:
+	.loc 3 1133 0
+	ldr	r0, .L1742+48
+	mov	r3, r4
+	movs	r2, #0
+	mov	r1, fp
+	ldr	r0, [r0]
+	bl	FtlProgPages
+.LVL1960:
+	.loc 3 1134 0
+	ldr	r3, [sp, #8]
+	cmp	r3, fp
+	bcs	.L1713
+	.loc 3 1134 0 is_stmt 0 discriminator 1
+	movw	r2, #1134
+	ldr	r1, .L1742+8
+	ldr	r0, .L1742+12
+	bl	printf
+.LVL1961:
+.L1713:
+	.loc 3 1135 0 is_stmt 1
+	ldr	r3, [sp, #8]
+	sub	r3, r3, fp
+	str	r3, [sp, #8]
+.LVL1962:
+	b	.L1681
+.LVL1963:
+.L1717:
+	.loc 3 975 0
+	mov	r0, #-1
+.LVL1964:
+	b	.L1674
+.L1743:
+	.align	2
+.L1742:
+	.word	.LANCHOR12
+	.word	.LANCHOR3
+	.word	.LANCHOR180
+	.word	.LC1
+	.word	.LANCHOR72
+	.word	.LANCHOR116
+	.word	.LANCHOR114
+	.word	.LANCHOR83
+	.word	.LANCHOR150
+	.word	.LANCHOR171
+	.word	.LC105
+	.word	.LANCHOR23
+	.word	.LANCHOR122
+	.cfi_endproc
+.LFE220:
+	.size	FtlWrite, .-FtlWrite
+	.section	.text.sftl_write,"ax",%progbits
+	.align	1
+	.global	sftl_write
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sftl_write, %function
+sftl_write:
+.LFB223:
+	.loc 3 1209 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL1965:
+	.loc 3 1210 0
+	mov	r3, r2
+	mov	r2, r1
+.LVL1966:
+	mov	r1, r0
+.LVL1967:
+	movs	r0, #0
+.LVL1968:
+	b	FtlWrite
+.LVL1969:
+	.cfi_endproc
+.LFE223:
+	.size	sftl_write, .-sftl_write
+	.section	.text.FtlLoadSysInfo,"ax",%progbits
+	.align	1
+	.global	FtlLoadSysInfo
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlLoadSysInfo, %function
+FtlLoadSysInfo:
+.LFB277:
+	.loc 2 1360 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 1368 0
+	movs	r1, #0
+	.loc 2 1365 0
+	ldr	r8, .L1766+136
+	.loc 2 1368 0
+	ldr	r5, .L1766
+	.loc 2 1365 0
+	ldr	r3, [r8]
+	ldr	r4, .L1766+4
+	.loc 2 1366 0
+	ldr	r10, .L1766+140
+	.loc 2 1368 0
+	ldrh	r2, [r5]
+	ldr	r7, .L1766+8
+	.loc 2 1365 0
+	str	r3, [r4, #8]
+	.loc 2 1369 0
+	ldr	r6, .L1766+12
+	.loc 2 1366 0
+	ldr	r3, [r10]
+	.loc 2 1368 0
+	lsls	r2, r2, #1
+	ldr	r0, [r7]
+	.loc 2 1366 0
+	str	r3, [r4, #12]
+	.loc 2 1368 0
+	bl	ftl_memset
+.LVL1970:
+	.loc 2 1369 0
+	ldrh	r0, [r6]
+	movw	r3, #65535
+	str	r7, [sp]
+	cmp	r0, r3
+	bne	.L1746
+.L1754:
+	.loc 2 1370 0
+	mov	r0, #-1
+.L1745:
+	.loc 2 1463 0
+	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1746:
+	.cfi_restore_state
+	.loc 2 1372 0
+	movs	r1, #1
+	.loc 2 1378 0
+	mov	fp, r4
+	.loc 2 1372 0
+	bl	FtlGetLastWrittenPage
+.LVL1971:
+	.loc 2 1381 0
+	ldr	r3, .L1766+16
+	.loc 2 1372 0
+	sxth	r7, r0
+.LVL1972:
+	.loc 2 1373 0
+	adds	r0, r0, #1
+	strh	r0, [r6, #2]	@ movhi
+.L1748:
+	.loc 2 1375 0
+	cmp	r7, #0
+	bge	.L1751
+	.loc 2 1388 0
+	movw	r2, #1388
+	ldr	r1, .L1766+20
+	ldr	r0, .L1766+24
+	bl	printf
+.LVL1973:
+.L1750:
+	.loc 2 1390 0
+	ldr	r2, .L1766+28
+	ldrh	r3, [r5]
+	ldrh	r2, [r2]
+	adds	r3, r3, #24
+	cmp	r2, r3, lsl #1
+	bcs	.L1753
+	.loc 2 1390 0 is_stmt 0 discriminator 1
+	movw	r2, #1390
+	ldr	r1, .L1766+20
+	ldr	r0, .L1766+24
+	bl	printf
+.LVL1974:
+.L1753:
+	.loc 2 1392 0 is_stmt 1
+	ldr	r7, .L1766+32
+.LVL1975:
+	movs	r2, #48
+	ldr	r1, [r4, #8]
+	mov	r0, r7
+	bl	ftl_memcpy
+.LVL1976:
+	.loc 2 1393 0
+	ldrh	r2, [r5]
+	ldr	r1, [r4, #8]
+	ldr	r3, [sp]
+	lsls	r2, r2, #1
+	adds	r1, r1, #48
+	ldr	r0, [r3]
+	bl	ftl_memcpy
+.LVL1977:
+	.loc 2 1394 0
+	ldrh	r1, [r5]
+	ldr	r3, [r4, #8]
+	mov	r4, r7
+	lsrs	r2, r1, #3
+	adds	r1, r1, #24
+	lsls	r1, r1, #1
+	adds	r2, r2, #4
+	bic	r1, r1, #3
+	add	r1, r1, r3
+	ldr	r3, .L1766+36
+	ldr	r0, [r3]
+	bl	ftl_memcpy
+.LVL1978:
+	.loc 2 1396 0
+	ldr	r2, [r7]
+	ldr	r3, .L1766+16
+	cmp	r2, r3
+	bne	.L1754
+	.loc 2 1400 0
+	ldr	r3, .L1766+40
+	ldrb	r2, [r7, #10]	@ zero_extendqisi2
+	.loc 2 1399 0
+	ldrh	r5, [r7, #8]
+	.loc 2 1400 0
+	ldrh	r3, [r3]
+	.loc 2 1399 0
+	strh	r5, [r6, #6]	@ movhi
+	.loc 2 1400 0
+	cmp	r2, r3
+	bne	.L1754
+	.loc 2 1403 0
+	ldr	r3, .L1766+44
+	.loc 2 1404 0
+	ldr	r2, .L1766+48
+	.loc 2 1403 0
+	str	r5, [r3]
+	.loc 2 1404 0
+	ldr	r3, .L1766+52
+	ldrh	r3, [r3]
+	muls	r3, r5, r3
+	str	r3, [r2]
+	.loc 2 1405 0
+	ldr	r2, .L1766+56
+	ldrh	r2, [r2]
+	muls	r3, r2, r3
+	ldr	r2, .L1766+60
+	str	r3, [r2]
+	.loc 2 1406 0
+	ldr	r3, .L1766+64
+	ldr	r6, [r3]
+	ldr	r3, .L1766+68
+	ldrh	r0, [r3, #6]
+	ldr	r3, .L1766+72
+	subs	r0, r6, r0
+	ldrh	r1, [r3]
+	subs	r0, r0, r5
+	bl	__aeabi_uidiv
+.LVL1979:
+	ldr	r3, .L1766+76
+	.loc 2 1412 0
+	cmp	r5, r6
+	.loc 2 1406 0
+	strh	r0, [r3]	@ movhi
+	.loc 2 1412 0
+	bls	.L1755
+	.loc 2 1412 0 is_stmt 0 discriminator 1
+	movw	r2, #1412
+	ldr	r1, .L1766+20
+	ldr	r0, .L1766+24
+	bl	printf
+.LVL1980:
+.L1755:
+	.loc 2 1415 0 is_stmt 1
+	ldrh	r2, [r4, #16]
+	.loc 2 1414 0
+	ldr	r3, .L1766+80
+	ldrh	ip, [r4, #14]
+	.loc 2 1419 0
+	ldr	r7, .L1766+84
+	.loc 2 1415 0
+	lsrs	r1, r2, #6
+	.loc 2 1416 0
+	and	r2, r2, #63
+	strb	r2, [r3, #6]
+	.loc 2 1417 0
+	ldrb	r2, [r4, #11]	@ zero_extendqisi2
+	.loc 2 1415 0
+	strh	r1, [r3, #2]	@ movhi
+	.loc 2 1424 0
+	ldr	r1, .L1766+88
+	.loc 2 1417 0
+	strb	r2, [r3, #8]
+	.loc 2 1424 0
+	ldrh	r2, [r4, #18]
+	.loc 2 1414 0
+	strh	ip, [r3]	@ movhi
+	.loc 2 1419 0
+	movw	r3, #65535
+	strh	r3, [r7]	@ movhi
+	.loc 2 1420 0
+	movs	r3, #0
+	.loc 2 1424 0
+	strh	r2, [r1]	@ movhi
+	.loc 2 1425 0
+	ldrh	r2, [r4, #20]
+	.loc 2 1420 0
+	strh	r3, [r7, #2]	@ movhi
+	.loc 2 1421 0
+	strb	r3, [r7, #6]
+	.loc 2 1422 0
+	strb	r3, [r7, #8]
+	.loc 2 1425 0
+	lsrs	r5, r2, #6
+	.loc 2 1426 0
+	and	r2, r2, #63
+	strb	r2, [r1, #6]
+	.loc 2 1427 0
+	ldrb	r2, [r4, #12]	@ zero_extendqisi2
+	.loc 2 1425 0
+	strh	r5, [r1, #2]	@ movhi
+	.loc 2 1429 0
+	ldrh	r5, [r4, #22]
+	.loc 2 1427 0
+	strb	r2, [r1, #8]
+	.loc 2 1429 0
+	ldr	r2, .L1766+92
+	strh	r5, [r2]	@ movhi
+	.loc 2 1430 0
+	ldrh	r5, [r4, #24]
+	lsrs	r6, r5, #6
+	.loc 2 1431 0
+	and	r5, r5, #63
+	strb	r5, [r2, #6]
+	.loc 2 1432 0
+	ldrb	r5, [r4, #13]	@ zero_extendqisi2
+	.loc 2 1430 0
+	strh	r6, [r2, #2]	@ movhi
+	.loc 2 1439 0
+	ldr	r6, [r4, #32]
+	.loc 2 1432 0
+	strb	r5, [r2, #8]
+	.loc 2 1434 0
+	ldr	r5, .L1766+96
+	str	r3, [r5]
+	.loc 2 1435 0
+	ldr	r5, .L1766+100
+	str	r3, [r5]
+	.loc 2 1436 0
+	ldr	r5, .L1766+104
+	str	r3, [r5]
+	.loc 2 1437 0
+	ldr	r5, .L1766+108
+	str	r3, [r5]
+	.loc 2 1439 0
+	ldr	r5, .L1766+112
+	str	r6, [r5]
+	mov	r6, r1
+	.loc 2 1440 0
+	ldr	r5, .L1766+116
+	str	r3, [r5]
+	.loc 2 1441 0
+	ldr	r5, .L1766+120
+	str	r3, [r5]
+	.loc 2 1442 0
+	ldr	r5, .L1766+124
+	.loc 2 1444 0
+	ldr	lr, [r4, #40]
+	.loc 2 1442 0
+	str	r3, [r5]
+	.loc 2 1444 0
+	ldr	r3, .L1766+128
+	ldr	r5, [r3]
+	cmp	lr, r5
+	mov	r5, r2
+	.loc 2 1445 0
+	it	hi
+	strhi	lr, [r3]
+	.loc 2 1447 0
+	ldr	r3, .L1766+132
+	ldr	r2, [r4, #36]
+	ldr	r1, [r3]
+	cmp	r2, r1
+	.loc 2 1448 0
+	it	hi
+	strhi	r2, [r3]
+	.loc 2 1450 0
+	movw	r3, #65535
+	cmp	ip, r3
+	beq	.L1758
+	.loc 2 1451 0
+	ldr	r0, .L1766+80
+	bl	make_superblock
+.LVL1981:
+.L1758:
+	.loc 2 1453 0
+	ldrh	r2, [r6]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L1759
+	.loc 2 1454 0
+	ldr	r0, .L1766+88
+	bl	make_superblock
+.LVL1982:
+.L1759:
+	.loc 2 1456 0
+	ldrh	r2, [r5]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L1760
+	.loc 2 1457 0
+	ldr	r0, .L1766+92
+	bl	make_superblock
+.LVL1983:
+.L1760:
+	.loc 2 1459 0
+	ldrh	r2, [r7]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L1761
+	.loc 2 1460 0
+	ldr	r0, .L1766+84
+	bl	make_superblock
+.LVL1984:
+.L1761:
+	.loc 2 1462 0
+	movs	r0, #0
+	b	.L1745
+.LVL1985:
+.L1751:
+	.loc 2 1376 0
+	ldrh	r2, [r6]
+	.loc 2 1378 0
+	mov	r0, fp
+	str	r3, [sp, #4]
+	.loc 2 1376 0
+	orr	r2, r7, r2, lsl #10
+	str	r2, [r4, #4]
+	.loc 2 1377 0
+	ldr	r2, [r8]
+	str	r2, [r4, #8]
+	.loc 2 1378 0
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+.LVL1986:
+	.loc 2 1381 0
+	ldr	r2, [r4]
+	ldr	r3, [sp, #4]
+	adds	r2, r2, #1
+	beq	.L1749
+	.loc 2 1382 0 discriminator 1
+	ldr	r2, [r8]
+	.loc 2 1381 0 discriminator 1
+	ldr	r2, [r2]
+	cmp	r2, r3
+	bne	.L1749
+	.loc 2 1383 0
+	ldr	r2, [r10]
+	ldrh	r1, [r2]
+	.loc 2 1382 0
+	movw	r2, #61604
+	cmp	r1, r2
+	beq	.L1750
+.L1749:
+	subs	r7, r7, #1
+.LVL1987:
+	sxth	r7, r7
+.LVL1988:
+	b	.L1748
+.L1767:
+	.align	2
+.L1766:
+	.word	.LANCHOR5
+	.word	.LANCHOR108
+	.word	.LANCHOR43
+	.word	.LANCHOR81
+	.word	1179929683
+	.word	.LANCHOR181
+	.word	.LC1
+	.word	.LANCHOR23
+	.word	.LANCHOR79
+	.word	.LANCHOR1
+	.word	.LANCHOR10
+	.word	.LANCHOR182
+	.word	.LANCHOR62
+	.word	.LANCHOR19
+	.word	.LANCHOR12
+	.word	.LANCHOR34
+	.word	.LANCHOR7
+	.word	.LANCHOR37
+	.word	.LANCHOR3
+	.word	.LANCHOR80
+	.word	.LANCHOR51
+	.word	.LANCHOR82
+	.word	.LANCHOR52
+	.word	.LANCHOR53
+	.word	.LANCHOR68
+	.word	.LANCHOR65
+	.word	.LANCHOR63
+	.word	.LANCHOR67
+	.word	.LANCHOR73
+	.word	.LANCHOR74
+	.word	.LANCHOR77
+	.word	.LANCHOR66
+	.word	.LANCHOR71
+	.word	.LANCHOR72
+	.word	.LANCHOR39
+	.word	.LANCHOR109
+	.cfi_endproc
+.LFE277:
+	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
+	.section	.text.FtlSysBlkInit,"ax",%progbits
+	.align	1
+	.global	FtlSysBlkInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlSysBlkInit, %function
+FtlSysBlkInit:
+.LFB295:
+	.loc 2 2306 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 3, -24
+	.cfi_offset 4, -20
+	.cfi_offset 5, -16
+	.cfi_offset 6, -12
+	.cfi_offset 7, -8
+	.cfi_offset 14, -4
+	.loc 2 2310 0
+	movs	r3, #0
+	ldr	r6, .L1784
+	strh	r3, [r6]	@ movhi
+	.loc 2 2312 0
+	ldr	r3, .L1784+4
+	ldrh	r0, [r3]
+	bl	FtlFreeSysBlkQueueInit
+.LVL1989:
+	.loc 2 2313 0
+	bl	FtlScanSysBlk
+.LVL1990:
+	.loc 2 2314 0
+	ldr	r3, .L1784+8
+	ldrh	r2, [r3]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L1769
+.L1771:
+	.loc 2 2315 0
+	mov	r7, #-1
+.L1768:
+	.loc 2 2398 0
+	mov	r0, r7
+	pop	{r3, r4, r5, r6, r7, pc}
+.L1769:
+	.loc 2 2317 0
+	bl	FtlLoadSysInfo
+.LVL1991:
+	mov	r7, r0
+	cmp	r0, #0
+	bne	.L1771
+	.loc 2 2320 0
+	bl	FtlLoadMapInfo
+.LVL1992:
+	.loc 2 2321 0
+	bl	FtlLoadVonderInfo
+.LVL1993:
+	.loc 2 2322 0
+	bl	Ftl_load_ext_data
+.LVL1994:
+	.loc 2 2324 0
+	bl	FtlLoadEctTbl
+.LVL1995:
+	.loc 2 2325 0
+	bl	FtlFreeSysBLkSort
+.LVL1996:
+	.loc 2 2327 0
+	bl	SupperBlkListInit
+.LVL1997:
+	.loc 2 2328 0
+	bl	FtlPowerLostRecovery
+.LVL1998:
+	.loc 2 2330 0
+	movs	r0, #1
+	bl	FtlUpdateVaildLpn
+.LVL1999:
+.LBB301:
+.LBB302:
+	.loc 2 2332 0
+	ldr	r3, .L1784+12
+	.loc 2 2333 0
+	movs	r0, #12
+	.loc 2 2332 0
+	ldrh	r1, [r3]
+	.loc 2 2333 0
+	ldr	r3, .L1784+16
+	ldr	r2, [r3]
+	.loc 2 2332 0
+	mov	r3, r7
+.L1772:
+.LVL2000:
+	cmp	r3, r1
+	bge	.L1777
+	.loc 2 2333 0
+	mla	r4, r0, r3, r2
+	ldr	r4, [r4, #4]
+	cmp	r4, #0
+	bge	.L1773
+.L1777:
+	.loc 2 2336 0
+	ldr	r4, .L1784+20
+	.loc 2 2338 0
+	cmp	r3, r1
+	ldr	r5, .L1784+24
+	.loc 2 2336 0
+	ldrh	r2, [r4, #28]
+	add	r2, r2, #1
+	strh	r2, [r4, #28]	@ movhi
+	.loc 2 2338 0
+	bge	.L1783
+.LVL2001:
+.L1774:
+	.loc 2 2340 0
+	ldr	r6, .L1784+28
+	.loc 2 2339 0
+	ldr	r0, .L1784+24
+	bl	FtlSuperblockPowerLostFix
+.LVL2002:
+	.loc 2 2340 0
+	mov	r0, r6
+	bl	FtlSuperblockPowerLostFix
+.LVL2003:
+.LBB303:
+	.loc 2 2346 0
+	ldr	r3, .L1784+32
+	ldrh	r1, [r5]
+	ldrh	r0, [r5, #4]
+	ldr	r2, [r3]
+	ldrh	r3, [r2, r1, lsl #1]
+	subs	r3, r3, r0
+	.loc 2 2347 0
+	ldr	r0, .L1784+36
+	.loc 2 2346 0
+	strh	r3, [r2, r1, lsl #1]	@ movhi
+	.loc 2 2352 0
+	ldrh	ip, [r6]
+	.loc 2 2347 0
+	ldrh	r3, [r0]
+	.loc 2 2352 0
+	ldrh	lr, [r6, #4]
+	.loc 2 2347 0
+	strh	r3, [r5, #2]	@ movhi
+	.loc 2 2348 0
+	movs	r3, #0
+	strb	r3, [r5, #6]
+	.loc 2 2349 0
+	strh	r3, [r5, #4]	@ movhi
+.LVL2004:
+	.loc 2 2352 0
+	ldrh	r1, [r2, ip, lsl #1]
+	sub	r1, r1, lr
+	strh	r1, [r2, ip, lsl #1]	@ movhi
+	.loc 2 2353 0
+	ldrh	r2, [r0]
+.LBE303:
+	.loc 2 2359 0
+	ldr	r0, .L1784+40
+.LBB304:
+	.loc 2 2354 0
+	strb	r3, [r6, #6]
+	.loc 2 2353 0
+	strh	r2, [r6, #2]	@ movhi
+	.loc 2 2355 0
+	strh	r3, [r6, #4]	@ movhi
+.LBE304:
+	.loc 2 2359 0
+	bl	FtlMapBlkWriteDump_data
+.LVL2005:
+	.loc 2 2360 0
+	ldr	r0, .L1784+44
+	bl	FtlMapBlkWriteDump_data
+.LVL2006:
+	.loc 2 2372 0
+	ldrh	r3, [r4, #30]
+	adds	r3, r3, #1
+	strh	r3, [r4, #30]	@ movhi
+	.loc 2 2373 0
+	bl	l2p_flush
+.LVL2007:
+	.loc 2 2374 0
+	bl	FtlVpcTblFlush
+.LVL2008:
+	.loc 2 2375 0
+	bl	FtlVpcTblFlush
+.LVL2009:
+	b	.L1778
+.LVL2010:
+.L1773:
+	.loc 2 2332 0
+	adds	r3, r3, #1
+.LVL2011:
+	b	.L1772
+.L1783:
+	.loc 2 2338 0
+	ldrh	r3, [r6]
+.LVL2012:
+	cmp	r3, #0
+	bne	.L1774
+.L1778:
+	.loc 2 2379 0
+	ldrh	r0, [r5]
+	movw	r3, #65535
+	cmp	r0, r3
+	beq	.L1779
+	ldrh	r3, [r5, #4]
+	cbnz	r3, .L1779
+	.loc 2 2381 0
+	ldr	r5, .L1784+28
+	.loc 2 2380 0
+	ldrh	r3, [r5, #4]
+	cbnz	r3, .L1779
+	.loc 2 2382 0
+	bl	FtlGcRefreshBlock
+.LVL2013:
+	.loc 2 2383 0
+	ldrh	r0, [r5]
+	bl	FtlGcRefreshBlock
+.LVL2014:
+	.loc 2 2384 0
+	ldr	r0, .L1784+24
+	bl	allocate_new_data_superblock
+.LVL2015:
+	.loc 2 2385 0
+	mov	r0, r5
+	bl	allocate_new_data_superblock
+.LVL2016:
+.L1779:
+	.loc 2 2390 0
+	ldrh	r3, [r4, #28]
+	lsls	r3, r3, #27
+	bne	.L1768
+	.loc 2 2391 0
+	bl	FtlVpcCheckAndModify
+.LVL2017:
+	b	.L1768
+.L1785:
+	.align	2
+.L1784:
+	.word	.LANCHOR162
+	.word	.LANCHOR4
+	.word	.LANCHOR81
+	.word	.LANCHOR33
+	.word	.LANCHOR56
+	.word	.LANCHOR79
+	.word	.LANCHOR51
+	.word	.LANCHOR52
+	.word	.LANCHOR43
+	.word	.LANCHOR19
+	.word	.LANCHOR144
+	.word	.LANCHOR149
+.LBE302:
+.LBE301:
+	.cfi_endproc
+.LFE295:
+	.size	FtlSysBlkInit, .-FtlSysBlkInit
+	.section	.text.ftl_low_format,"ax",%progbits
+	.align	1
+	.global	ftl_low_format
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_low_format, %function
+ftl_low_format:
+.LFB213:
+	.loc 3 623 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 48
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 3 629 0
+	movs	r3, #0
+	.loc 3 631 0
+	ldr	r6, .L1810
+	.loc 3 630 0
+	ldr	r2, .L1810+4
+	.loc 3 629 0
+	ldr	r5, .L1810+8
+	.loc 3 631 0
+	ldrh	r0, [r6]
+	.loc 3 630 0
+	str	r3, [r2]
+	.loc 3 629 0
+	str	r3, [r5]
+	.loc 3 631 0
+	bl	FtlFreeSysBlkQueueInit
+.LVL2018:
+	.loc 3 632 0
+	bl	FtlLoadBbt
+.LVL2019:
+	cbz	r0, .L1787
+	.loc 3 633 0
+	bl	FtlMakeBbt
+.LVL2020:
+.L1787:
+	.loc 3 635 0 discriminator 1
+	ldr	r3, .L1810+12
+	.loc 3 636 0 discriminator 1
+	ldr	r2, .L1810+16
+	.loc 3 637 0 discriminator 1
+	ldr	ip, .L1810+100
+	.loc 3 635 0 discriminator 1
+	ldrh	r1, [r3]
+	.loc 3 636 0 discriminator 1
+	ldr	r4, [r2]
+	.loc 3 637 0 discriminator 1
+	ldr	r2, .L1810+20
+	str	r3, [sp, #4]
+	.loc 3 635 0 discriminator 1
+	lsls	r1, r1, #7
+	.loc 3 637 0 discriminator 1
+	ldr	r7, [r2]
+	movs	r2, #0
+.L1788:
+.LVL2021:
+	.loc 3 635 0 discriminator 1
+	uxth	r3, r2
+	adds	r2, r2, #1
+.LVL2022:
+	cmp	r3, r1
+	blt	.L1789
+.LVL2023:
+	.loc 3 642 0
+	ldr	r3, .L1810+24
+.LVL2024:
+	.loc 3 641 0
+	movs	r7, #0
+	.loc 3 642 0
+	ldr	r10, .L1810+104
+	ldrh	r4, [r3]
+.LVL2025:
+	mov	r8, r3
+	mov	fp, r10
+.LVL2026:
+.L1790:
+	.loc 3 642 0 is_stmt 0 discriminator 1
+	ldrh	r3, [r10]
+	cmp	r3, r4
+	bhi	.L1791
+	.loc 3 645 0 is_stmt 1
+	ldr	r4, .L1810+28
+.LVL2027:
+	subs	r3, r7, #2
+	ldrh	r1, [r4]
+	cmp	r3, r1, lsl #1
+	bgt	.L1792
+.LVL2028:
+.L1796:
+	.loc 3 641 0
+	movs	r6, #0
+	mov	r7, r6
+.L1793:
+	.loc 3 656 0 discriminator 1
+	ldrh	r3, [r8]
+	uxth	r0, r6
+.LVL2029:
+	adds	r6, r6, #1
+	cmp	r3, r0
+	bhi	.L1797
+	.loc 3 658 0
+	ldrh	r2, [fp]
+	ldr	r3, .L1810+32
+	.loc 3 661 0
+	ldrh	r4, [r4]
+	ldr	r6, .L1810+36
+	.loc 3 658 0
+	str	r2, [r3]
+	.loc 3 661 0
+	ldr	r3, .L1810+40
+	mov	r1, r4
+	ldr	r2, [r3]
+	mov	r0, r2
+.LVL2030:
+	str	r2, [sp, #12]
+	bl	__aeabi_uidiv
+.LVL2031:
+	.loc 3 662 0
+	ubfx	r10, r0, #5, #16
+	.loc 3 661 0
+	mov	r3, r0
+	str	r0, [r6]
+	.loc 3 662 0
+	add	r1, r10, #36
+	ldr	r0, .L1810+44
+	strh	r1, [r0]	@ movhi
+	.loc 3 663 0
+	movs	r1, #24
+	muls	r1, r4, r1
+	str	r0, [sp]
+	cmp	r7, r1
+	ble	.L1798
+	.loc 3 664 0
+	ldr	r2, [sp, #12]
+	mov	r1, r4
+	str	r3, [sp, #8]
+	subs	r0, r2, r7
+	bl	__aeabi_uidiv
+.LVL2032:
+	.loc 3 665 0
+	ldr	r3, [sp]
+	.loc 3 664 0
+	str	r0, [r6]
+	.loc 3 665 0
+	lsrs	r0, r0, #5
+	adds	r0, r0, #24
+	strh	r0, [r3]	@ movhi
+	ldr	r3, [sp, #8]
+.L1798:
+	.loc 3 668 0
+	ldr	r2, .L1810+48
+	ldrh	r2, [r2]
+	cbz	r2, .L1800
+	.loc 3 669 0
+	ldr	r1, .L1810+44
+	ldrh	r0, [r1]
+	add	r0, r0, r2, lsr #1
+	strh	r0, [r1]	@ movhi
+	.loc 3 670 0
+	mul	r0, r4, r2
+	cmp	r7, r0
+	.loc 3 672 0
+	itttt	lt
+	addlt	r2, r2, #32
+	.loc 3 671 0
+	strlt	r3, [r6]
+	.loc 3 672 0
+	addlt	r2, r2, r10
+	strhlt	r2, [r1]	@ movhi
+.L1800:
+	.loc 3 677 0
+	ldr	r3, [sp]
+	ldr	r7, .L1810+52
+.LVL2033:
+	.loc 3 687 0
+	ldr	r10, .L1810+108
+	.loc 3 677 0
+	ldrh	r2, [r3]
+	ldr	r3, [r6]
+	subs	r3, r3, r2
+	muls	r4, r3, r4
+	.loc 3 678 0
+	ldr	r3, .L1810+56
+	ldrh	r3, [r3]
+	.loc 3 677 0
+	str	r4, [r7]
+	.loc 3 678 0
+	muls	r4, r3, r4
+	.loc 3 679 0
+	ldr	r3, [sp, #4]
+	ldrh	r3, [r3]
+	.loc 3 678 0
+	str	r4, [r6]
+	.loc 3 694 0
+	ldr	r6, .L1810+60
+	.loc 3 679 0
+	muls	r4, r3, r4
+	ldr	r3, .L1810+64
+	str	r4, [r3]
+	.loc 3 689 0
+	movw	r4, #65535
+	.loc 3 684 0
+	bl	FtlBbmTblFlush
+.LVL2034:
+	.loc 3 687 0
+	ldrh	r2, [fp]
+	movs	r1, #0
+	ldr	r0, [r10]
+	lsls	r2, r2, #1
+	bl	ftl_memset
+.LVL2035:
+	.loc 3 688 0
+	ldr	r2, .L1810+68
+	movs	r3, #0
+	.loc 3 694 0
+	strh	r3, [r6, #2]	@ movhi
+	.loc 3 698 0
+	movs	r1, #255
+	.loc 3 695 0
+	strb	r3, [r6, #6]
+	.loc 3 688 0
+	str	r3, [r2]
+	.loc 3 689 0
+	ldr	r2, .L1810+72
+	.loc 3 696 0
+	strh	r3, [r6]	@ movhi
+	.loc 3 690 0
+	strh	r3, [r2, #2]	@ movhi
+	.loc 3 691 0
+	strb	r3, [r2, #6]
+	.loc 3 692 0
+	strb	r3, [r2, #8]
+	.loc 3 697 0
+	movs	r3, #1
+	.loc 3 689 0
+	strh	r4, [r2]	@ movhi
+	.loc 3 698 0
+	ldrh	r2, [r8]
+	mov	r8, r10
+	.loc 3 697 0
+	strb	r3, [r6, #8]
+	.loc 3 701 0
+	mov	r10, r6
+	.loc 3 698 0
+	ldr	r3, .L1810+76
+	lsrs	r2, r2, #3
+	ldr	r0, [r3]
+	bl	ftl_memset
+.LVL2036:
+.L1802:
+	.loc 3 701 0
+	mov	r0, r10
+	bl	make_superblock
+.LVL2037:
+	.loc 3 702 0
+	ldrb	r3, [r6, #7]	@ zero_extendqisi2
+	ldrh	r2, [r6]
+	cmp	r3, #0
+	bne	.L1803
+	.loc 3 705 0
+	ldr	r3, [r8]
+	strh	r4, [r3, r2, lsl #1]	@ movhi
+	.loc 3 706 0
+	ldrh	r3, [r6]
+	adds	r3, r3, #1
+	strh	r3, [r6]	@ movhi
+	.loc 3 707 0
+	b	.L1802
+.LVL2038:
+.L1789:
+	.loc 3 636 0 discriminator 3
+	mvns	r0, r3
+	orr	r0, r3, r0, lsl #16
+	str	r0, [r4, r3, lsl #2]
+	.loc 3 637 0 discriminator 3
+	str	ip, [r7, r3, lsl #2]
+.LVL2039:
+	b	.L1788
+.LVL2040:
+.L1791:
+	.loc 3 643 0 discriminator 3
+	mov	r0, r4
+	movs	r1, #1
+	bl	FtlLowFormatEraseBlock
+.LVL2041:
+	.loc 3 642 0 discriminator 3
+	adds	r4, r4, #1
+.LVL2042:
+	.loc 3 643 0 discriminator 3
+	add	r7, r7, r0
+.LVL2043:
+	uxth	r7, r7
+.LVL2044:
+	.loc 3 642 0 discriminator 3
+	uxth	r4, r4
+.LVL2045:
+	b	.L1790
+.LVL2046:
+.L1792:
+	.loc 3 647 0
+	mov	r0, r7
+	bl	__aeabi_uidiv
+.LVL2047:
+	ldr	r3, .L1810+80
+	ldr	r3, [r3]
+	add	r0, r0, r3
+	uxth	r0, r0
+	bl	FtlSysBlkNumInit
+.LVL2048:
+	.loc 3 648 0
+	ldrh	r0, [r6]
+	bl	FtlFreeSysBlkQueueInit
+.LVL2049:
+	.loc 3 650 0
+	ldrh	r6, [r8]
+.LVL2050:
+.L1794:
+	.loc 3 650 0 is_stmt 0 discriminator 1
+	ldrh	r3, [fp]
+	cmp	r3, r6
+	bls	.L1796
+	.loc 3 651 0 is_stmt 1 discriminator 3
+	mov	r0, r6
+	movs	r1, #1
+	.loc 3 650 0 discriminator 3
+	adds	r6, r6, #1
+.LVL2051:
+	.loc 3 651 0 discriminator 3
+	bl	FtlLowFormatEraseBlock
+.LVL2052:
+	.loc 3 650 0 discriminator 3
+	uxth	r6, r6
+.LVL2053:
+	b	.L1794
+.LVL2054:
+.L1797:
+	.loc 3 657 0 discriminator 3
+	movs	r1, #0
+	bl	FtlLowFormatEraseBlock
+.LVL2055:
+	add	r7, r7, r0
+.LVL2056:
+	uxth	r7, r7
+.LVL2057:
+	b	.L1793
+.LVL2058:
+.L1803:
+	.loc 3 709 0
+	ldr	r3, [r5]
+	.loc 3 710 0
+	ldrh	r1, [r6, #4]
+	.loc 3 712 0
+	ldr	r4, .L1810+84
+	.loc 3 709 0
+	str	r3, [r6, #12]
+	adds	r3, r3, #1
+	str	r3, [r5]
+	.loc 3 710 0
+	ldr	r3, [r8]
+	.loc 3 717 0
+	mov	r10, r4
+	.loc 3 710 0
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	.loc 3 712 0
+	movs	r3, #0
+	strh	r3, [r4, #2]	@ movhi
+	.loc 3 713 0
+	strb	r3, [r4, #6]
+	.loc 3 714 0
+	ldrh	r3, [r6]
+	.loc 3 721 0
+	movw	r6, #65535
+	.loc 3 714 0
+	adds	r3, r3, #1
+	strh	r3, [r4]	@ movhi
+	.loc 3 715 0
+	movs	r3, #1
+	strb	r3, [r4, #8]
+.L1804:
+	.loc 3 717 0
+	mov	r0, r10
+	bl	make_superblock
+.LVL2059:
+	.loc 3 718 0
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	ldrh	r2, [r4]
+	cbnz	r3, .L1805
+	.loc 3 721 0
+	ldr	r3, [r8]
+	strh	r6, [r3, r2, lsl #1]	@ movhi
+	.loc 3 722 0
+	ldrh	r3, [r4]
+	adds	r3, r3, #1
+	strh	r3, [r4]	@ movhi
+	.loc 3 723 0
+	b	.L1804
+.L1805:
+	.loc 3 725 0
+	ldr	r3, [r5]
+	.loc 3 726 0
+	ldrh	r1, [r4, #4]
+	.loc 3 725 0
+	str	r3, [r4, #12]
+	adds	r3, r3, #1
+	str	r3, [r5]
+	.loc 3 727 0
+	movw	r4, #65535
+	.loc 3 726 0
+	ldr	r3, [r8]
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	.loc 3 727 0
+	ldr	r3, .L1810+88
+	strh	r4, [r3]	@ movhi
+	.loc 3 730 0
+	bl	FtlFreeSysBlkQueueOut
+.LVL2060:
+	ldr	r3, .L1810+92
+	.loc 3 731 0
+	movs	r2, #0
+	strh	r2, [r3, #2]	@ movhi
+	.loc 3 733 0
+	ldr	r2, [r7]
+	.loc 3 730 0
+	strh	r0, [r3]	@ movhi
+	.loc 3 732 0
+	strh	r4, [r3, #4]	@ movhi
+	.loc 3 733 0
+	strh	r2, [r3, #6]	@ movhi
+	.loc 3 734 0
+	ldr	r2, [r5]
+	str	r2, [r3, #8]
+	adds	r2, r2, #1
+	str	r2, [r5]
+	.loc 3 735 0
+	bl	FtlVpcTblFlush
+.LVL2061:
+	.loc 3 736 0
+	bl	FtlSysBlkInit
+.LVL2062:
+	cbnz	r0, .L1806
+	.loc 3 737 0
+	ldr	r3, .L1810+96
+	movs	r2, #1
+	str	r2, [r3]
+.L1806:
+	.loc 3 739 0
+	movs	r0, #0
+	add	sp, sp, #16
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1811:
+	.align	2
+.L1810:
+	.word	.LANCHOR4
+	.word	.LANCHOR72
+	.word	.LANCHOR71
+	.word	.LANCHOR12
+	.word	.LANCHOR116
+	.word	.LANCHOR114
+	.word	.LANCHOR5
+	.word	.LANCHOR3
+	.word	.LANCHOR113
+	.word	.LANCHOR62
+	.word	.LANCHOR7
+	.word	.LANCHOR80
+	.word	.LANCHOR15
+	.word	.LANCHOR182
+	.word	.LANCHOR19
+	.word	.LANCHOR51
+	.word	.LANCHOR34
+	.word	.LANCHOR60
+	.word	.LANCHOR82
+	.word	.LANCHOR1
+	.word	.LANCHOR31
+	.word	.LANCHOR52
+	.word	.LANCHOR53
+	.word	.LANCHOR81
+	.word	.LANCHOR88
+	.word	168778952
+	.word	.LANCHOR6
+	.word	.LANCHOR43
+	.cfi_endproc
+.LFE213:
+	.size	ftl_low_format, .-ftl_low_format
+	.section	.text.sftl_init,"ax",%progbits
+	.align	1
+	.global	sftl_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sftl_init, %function
+sftl_init:
+.LFB214:
+	.loc 3 743 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL2063:
+	push	{r4, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 4, -8
+	.cfi_offset 14, -4
+	.loc 3 746 0
+	mov	r3, #-1
+	ldr	r4, .L1818
+	.loc 3 749 0
+	ldr	r1, .L1818+4
+	ldr	r0, .L1818+8
+	.loc 3 746 0
+	str	r3, [r4]
+	.loc 3 749 0
+	bl	printf
+.LVL2064:
+	.loc 3 750 0
+	ldr	r0, .L1818+12
+	bl	FtlConstantsInit
+.LVL2065:
+	.loc 3 751 0
+	bl	FtlMemInit
+.LVL2066:
+	.loc 3 752 0
+	bl	FtlVariablesInit
+.LVL2067:
+	.loc 3 753 0
+	ldr	r3, .L1818+16
+	ldrh	r0, [r3]
+	bl	FtlFreeSysBlkQueueInit
+.LVL2068:
+.LDL2:
+	.loc 3 756 0
+	bl	FtlLoadBbt
+.LVL2069:
+	cbnz	r0, .L1816
+	.loc 3 767 0
+	bl	FtlSysBlkInit
+.LVL2070:
+	cbnz	r0, .L1816
+	.loc 3 779 0
+	movs	r3, #1
+	str	r3, [r4]
+	.loc 3 783 0
+	ldr	r3, .L1818+20
+	ldrh	r3, [r3]
+	cmp	r3, #15
+	bhi	.L1816
+	movw	r4, #8129
+.L1815:
+.LVL2071:
+.LBB305:
+	.loc 3 786 0 discriminator 3
+	movs	r1, #1
+	movs	r0, #0
+	bl	rk_ftl_garbage_collect
+.LVL2072:
+	.loc 3 785 0 discriminator 3
+	subs	r4, r4, #1
+.LVL2073:
+	bne	.L1815
+.LVL2074:
+.L1816:
+.LBE305:
+	.loc 3 794 0
+	movs	r0, #0
+	pop	{r4, pc}
+.L1819:
+	.align	2
+.L1818:
+	.word	.LANCHOR88
+	.word	.LC70
+	.word	.LC71
+	.word	.LANCHOR0
+	.word	.LANCHOR4
+	.word	.LANCHOR48
+	.cfi_endproc
+.LFE214:
+	.size	sftl_init, .-sftl_init
+	.section	.text.ftl_memcmp,"ax",%progbits
+	.align	1
+	.global	ftl_memcmp
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_memcmp, %function
+ftl_memcmp:
+.LFB350:
+	.loc 1 248 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL2075:
+	.loc 1 249 0
+	b	memcmp
+.LVL2076:
+	.cfi_endproc
+.LFE350:
+	.size	ftl_memcmp, .-ftl_memcmp
+	.global	ftl_temp_buf
+	.global	g_nand_ops
+	.global	g_nand_phy_info
+	.global	gc_ink_free_return_value
+	.global	check_vpc_table
+	.global	FtlUpdateVaildLpnCount
+	.global	g_ect_tbl_power_up_flush
+	.global	power_up_flag
+	.global	gFtlInitStatus
+	.global	DeviceCapacity
+	.global	g_power_lost_recovery_flag
+	.global	c_mlc_erase_count_value
+	.global	g_recovery_ppa_tbl
+	.global	g_recovery_page_min_ver
+	.global	g_recovery_page_num
+	.global	g_cur_erase_blk
+	.global	g_gc_skip_write_count
+	.global	g_gc_head_data_block_count
+	.global	g_gc_head_data_block
+	.global	g_ftl_nand_free_count
+	.global	g_in_swl_replace
+	.global	g_in_gc_progress
+	.global	g_max_erase_count
+	.global	g_totle_sys_slc_erase_count
+	.global	g_totle_slc_erase_count
+	.global	g_min_erase_count
+	.global	g_totle_avg_erase_count
+	.global	g_totle_mlc_erase_count
+	.global	g_totle_l2p_write_count
+	.global	g_totle_cache_write_count
+	.global	g_tmp_data_superblock_id
+	.global	g_totle_read_page_count
+	.global	g_totle_discard_page_count
+	.global	g_totle_read_sector
+	.global	g_totle_write_sector
+	.global	g_totle_write_page_count
+	.global	g_totle_gc_page_count
+	.global	g_gc_blk_index
+	.global	g_gc_merge_free_blk_threshold
+	.global	g_gc_free_blk_threshold
+	.global	g_gc_bad_block_temp_tbl
+	.global	g_gc_bad_block_gc_index
+	.global	g_gc_bad_block_temp_num
+	.global	g_gc_next_blk_1
+	.global	g_gc_next_blk
+	.global	g_gc_cur_blk_max_valid_pages
+	.global	g_gc_cur_blk_valid_pages
+	.global	g_gc_page_offset
+	.global	g_gc_blk_num
+	.global	p_gc_blk_tbl
+	.global	p_gc_page_info
+	.global	g_sys_ext_data
+	.global	g_sys_save_data
+	.global	gp_last_act_superblock
+	.global	g_gc_superblock
+	.global	g_gc_temp_superblock
+	.global	g_buffer_superblock
+	.global	g_active_superblock
+	.global	g_num_data_superblocks
+	.global	g_num_free_superblocks
+	.global	p_data_block_list_tail
+	.global	p_data_block_list_head
+	.global	p_free_data_block_list_head
+	.global	p_data_block_list_table
+	.global	g_l2p_last_update_region_id
+	.global	p_l2p_map_buf
+	.global	p_l2p_ram_map
+	.global	g_totle_vendor_block
+	.global	p_vendor_region_ppn_table
+	.global	p_vendor_block_ver_table
+	.global	p_vendor_block_valid_page_count
+	.global	p_vendor_block_table
+	.global	g_totle_map_block
+	.global	p_map_region_ppn_table
+	.global	p_map_block_ver_table
+	.global	p_map_block_valid_page_count
+	.global	p_map_block_table
+	.global	p_blk_mode_table
+	.global	p_valid_page_count_check_table
+	.global	p_valid_page_count_table
+	.global	g_totle_swl_count
+	.global	p_swl_mul_table
+	.global	p_erase_count_table
+	.global	g_ect_tbl_info_size
+	.global	gp_ect_tbl_info
+	.global	g_gc_num_req
+	.global	c_gc_page_buf_num
+	.global	gp_gc_page_buf_info
+	.global	p_gc_data_buf
+	.global	p_gc_spare_buf
+	.global	p_io_spare_buf
+	.global	p_io_data_buf_1
+	.global	p_io_data_buf_0
+	.global	p_sys_spare_buf
+	.global	p_vendor_data_buf
+	.global	p_sys_data_buf_1
+	.global	p_sys_data_buf
+	.global	p_plane_order_table
+	.global	g_req_cache
+	.global	req_gc_dst
+	.global	req_gc
+	.global	req_erase
+	.global	req_prgm
+	.global	req_read
+	.global	req_sys
+	.global	gVendorBlkInfo
+	.global	gL2pMapInfo
+	.global	gSysFreeQueue
+	.global	gSysInfo
+	.global	gBbtInfo
+	.global	g_MaxLbn
+	.global	g_VaildLpn
+	.global	g_MaxLpn
+	.global	g_MaxLbaSector
+	.global	g_GlobalDataVersion
+	.global	g_GlobalSysVersion
+	.global	ftl_gc_temp_power_lost_recovery_flag
+	.global	c_ftl_nand_max_data_blks
+	.global	c_ftl_nand_data_op_blks_per_plane
+	.global	c_ftl_nand_data_blks_per_plane
+	.global	c_ftl_nand_max_sys_blks
+	.global	c_ftl_nand_init_sys_blks_per_plane
+	.global	c_ftl_nand_sys_blks_per_plane
+	.global	c_ftl_vendor_part_size
+	.global	c_ftl_nand_max_vendor_blks
+	.global	c_ftl_nand_max_map_blks
+	.global	c_ftl_nand_map_blks_per_plane
+	.global	c_ftl_nand_vendor_region_num
+	.global	c_ftl_nand_l2pmap_ram_region_num
+	.global	c_ftl_nand_map_region_num
+	.global	c_ftl_nand_totle_phy_blks
+	.global	c_ftl_nand_reserved_blks
+	.global	c_ftl_nand_byte_pre_oob
+	.global	c_ftl_nand_byte_pre_page
+	.global	c_ftl_nand_sec_pre_page_shift
+	.global	c_ftl_nand_sec_pre_page
+	.global	c_ftl_nand_page_pre_super_blk
+	.global	c_ftl_nand_page_pre_slc_blk
+	.global	c_ftl_nand_page_pre_blk
+	.global	c_ftl_nand_bbm_buf_size
+	.global	c_ftl_nand_ext_blk_pre_plane
+	.global	c_ftl_nand_blk_pre_plane
+	.global	c_ftl_nand_planes_num
+	.global	c_ftl_nand_blks_per_die_shift
+	.global	c_ftl_nand_blks_per_die
+	.global	c_ftl_nand_planes_per_die
+	.global	c_ftl_nand_die_num
+	.global	c_ftl_nand_type
+	.section	.bss.DeviceCapacity,"aw",%nobits
+	.align	2
+	.set	.LANCHOR26,. + 0
+	.type	DeviceCapacity, %object
+	.size	DeviceCapacity, 4
+DeviceCapacity:
+	.space	4
+	.section	.bss.FtlUpdateVaildLpnCount,"aw",%nobits
+	.align	1
+	.set	.LANCHOR59,. + 0
+	.type	FtlUpdateVaildLpnCount, %object
+	.size	FtlUpdateVaildLpnCount, 2
+FtlUpdateVaildLpnCount:
+	.space	2
+	.section	.bss.c_ftl_nand_bbm_buf_size,"aw",%nobits
+	.align	1
+	.set	.LANCHOR137,. + 0
+	.type	c_ftl_nand_bbm_buf_size, %object
+	.size	c_ftl_nand_bbm_buf_size, 2
+c_ftl_nand_bbm_buf_size:
+	.space	2
+	.section	.bss.c_ftl_nand_blk_pre_plane,"aw",%nobits
+	.align	1
+	.set	.LANCHOR6,. + 0
+	.type	c_ftl_nand_blk_pre_plane, %object
+	.size	c_ftl_nand_blk_pre_plane, 2
+c_ftl_nand_blk_pre_plane:
+	.space	2
+	.section	.bss.c_ftl_nand_blks_per_die,"aw",%nobits
+	.align	1
+	.set	.LANCHOR17,. + 0
+	.type	c_ftl_nand_blks_per_die, %object
+	.size	c_ftl_nand_blks_per_die, 2
+c_ftl_nand_blks_per_die:
+	.space	2
+	.section	.bss.c_ftl_nand_blks_per_die_shift,"aw",%nobits
+	.align	1
+	.set	.LANCHOR18,. + 0
+	.type	c_ftl_nand_blks_per_die_shift, %object
+	.size	c_ftl_nand_blks_per_die_shift, 2
+c_ftl_nand_blks_per_die_shift:
+	.space	2
+	.section	.bss.c_ftl_nand_byte_pre_oob,"aw",%nobits
+	.align	1
+	.set	.LANCHOR24,. + 0
+	.type	c_ftl_nand_byte_pre_oob, %object
+	.size	c_ftl_nand_byte_pre_oob, 2
+c_ftl_nand_byte_pre_oob:
+	.space	2
+	.section	.bss.c_ftl_nand_byte_pre_page,"aw",%nobits
+	.align	1
+	.set	.LANCHOR23,. + 0
+	.type	c_ftl_nand_byte_pre_page, %object
+	.size	c_ftl_nand_byte_pre_page, 2
+c_ftl_nand_byte_pre_page:
+	.space	2
+	.section	.bss.c_ftl_nand_data_blks_per_plane,"aw",%nobits
+	.align	1
+	.set	.LANCHOR5,. + 0
+	.type	c_ftl_nand_data_blks_per_plane, %object
+	.size	c_ftl_nand_data_blks_per_plane, 2
+c_ftl_nand_data_blks_per_plane:
+	.space	2
+	.section	.bss.c_ftl_nand_data_op_blks_per_plane,"aw",%nobits
+	.align	1
+	.set	.LANCHOR80,. + 0
+	.type	c_ftl_nand_data_op_blks_per_plane, %object
+	.size	c_ftl_nand_data_op_blks_per_plane, 2
+c_ftl_nand_data_op_blks_per_plane:
+	.space	2
+	.section	.bss.c_ftl_nand_die_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR10,. + 0
+	.type	c_ftl_nand_die_num, %object
+	.size	c_ftl_nand_die_num, 2
+c_ftl_nand_die_num:
+	.space	2
+	.section	.bss.c_ftl_nand_ext_blk_pre_plane,"aw",%nobits
+	.align	1
+	.set	.LANCHOR15,. + 0
+	.type	c_ftl_nand_ext_blk_pre_plane, %object
+	.size	c_ftl_nand_ext_blk_pre_plane, 2
+c_ftl_nand_ext_blk_pre_plane:
+	.space	2
+	.section	.bss.c_ftl_nand_init_sys_blks_per_plane,"aw",%nobits
+	.align	2
+	.set	.LANCHOR31,. + 0
+	.type	c_ftl_nand_init_sys_blks_per_plane, %object
+	.size	c_ftl_nand_init_sys_blks_per_plane, 4
+c_ftl_nand_init_sys_blks_per_plane:
+	.space	4
+	.section	.bss.c_ftl_nand_l2pmap_ram_region_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR33,. + 0
+	.type	c_ftl_nand_l2pmap_ram_region_num, %object
+	.size	c_ftl_nand_l2pmap_ram_region_num, 2
+c_ftl_nand_l2pmap_ram_region_num:
+	.space	2
+	.section	.bss.c_ftl_nand_map_blks_per_plane,"aw",%nobits
+	.align	1
+	.set	.LANCHOR29,. + 0
+	.type	c_ftl_nand_map_blks_per_plane, %object
+	.size	c_ftl_nand_map_blks_per_plane, 2
+c_ftl_nand_map_blks_per_plane:
+	.space	2
+	.section	.bss.c_ftl_nand_map_region_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR32,. + 0
+	.type	c_ftl_nand_map_region_num, %object
+	.size	c_ftl_nand_map_region_num, 2
+c_ftl_nand_map_region_num:
+	.space	2
+	.section	.bss.c_ftl_nand_max_data_blks,"aw",%nobits
+	.align	2
+	.set	.LANCHOR7,. + 0
+	.type	c_ftl_nand_max_data_blks, %object
+	.size	c_ftl_nand_max_data_blks, 4
+c_ftl_nand_max_data_blks:
+	.space	4
+	.section	.bss.c_ftl_nand_max_map_blks,"aw",%nobits
+	.align	2
+	.set	.LANCHOR30,. + 0
+	.type	c_ftl_nand_max_map_blks, %object
+	.size	c_ftl_nand_max_map_blks, 4
+c_ftl_nand_max_map_blks:
+	.space	4
+	.section	.bss.c_ftl_nand_max_sys_blks,"aw",%nobits
+	.align	2
+	.set	.LANCHOR4,. + 0
+	.type	c_ftl_nand_max_sys_blks, %object
+	.size	c_ftl_nand_max_sys_blks, 4
+c_ftl_nand_max_sys_blks:
+	.space	4
+	.section	.bss.c_ftl_nand_max_vendor_blks,"aw",%nobits
+	.align	1
+	.set	.LANCHOR27,. + 0
+	.type	c_ftl_nand_max_vendor_blks, %object
+	.size	c_ftl_nand_max_vendor_blks, 2
+c_ftl_nand_max_vendor_blks:
+	.space	2
+	.section	.bss.c_ftl_nand_page_pre_blk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR19,. + 0
+	.type	c_ftl_nand_page_pre_blk, %object
+	.size	c_ftl_nand_page_pre_blk, 2
+c_ftl_nand_page_pre_blk:
+	.space	2
+	.section	.bss.c_ftl_nand_page_pre_slc_blk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR20,. + 0
+	.type	c_ftl_nand_page_pre_slc_blk, %object
+	.size	c_ftl_nand_page_pre_slc_blk, 2
+c_ftl_nand_page_pre_slc_blk:
+	.space	2
+	.section	.bss.c_ftl_nand_page_pre_super_blk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR21,. + 0
+	.type	c_ftl_nand_page_pre_super_blk, %object
+	.size	c_ftl_nand_page_pre_super_blk, 2
+c_ftl_nand_page_pre_super_blk:
+	.space	2
+	.section	.bss.c_ftl_nand_planes_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR3,. + 0
+	.type	c_ftl_nand_planes_num, %object
+	.size	c_ftl_nand_planes_num, 2
+c_ftl_nand_planes_num:
+	.space	2
+	.section	.bss.c_ftl_nand_planes_per_die,"aw",%nobits
+	.align	1
+	.set	.LANCHOR11,. + 0
+	.type	c_ftl_nand_planes_per_die, %object
+	.size	c_ftl_nand_planes_per_die, 2
+c_ftl_nand_planes_per_die:
+	.space	2
+	.section	.bss.c_ftl_nand_reserved_blks,"aw",%nobits
+	.align	1
+	.set	.LANCHOR25,. + 0
+	.type	c_ftl_nand_reserved_blks, %object
+	.size	c_ftl_nand_reserved_blks, 2
+c_ftl_nand_reserved_blks:
+	.space	2
+	.section	.bss.c_ftl_nand_sec_pre_page,"aw",%nobits
+	.align	1
+	.set	.LANCHOR12,. + 0
+	.type	c_ftl_nand_sec_pre_page, %object
+	.size	c_ftl_nand_sec_pre_page, 2
+c_ftl_nand_sec_pre_page:
+	.space	2
+	.section	.bss.c_ftl_nand_sec_pre_page_shift,"aw",%nobits
+	.align	1
+	.set	.LANCHOR22,. + 0
+	.type	c_ftl_nand_sec_pre_page_shift, %object
+	.size	c_ftl_nand_sec_pre_page_shift, 2
+c_ftl_nand_sec_pre_page_shift:
+	.space	2
+	.section	.bss.c_ftl_nand_sys_blks_per_plane,"aw",%nobits
+	.align	2
+	.set	.LANCHOR2,. + 0
+	.type	c_ftl_nand_sys_blks_per_plane, %object
+	.size	c_ftl_nand_sys_blks_per_plane, 4
+c_ftl_nand_sys_blks_per_plane:
+	.space	4
+	.section	.bss.c_ftl_nand_totle_phy_blks,"aw",%nobits
+	.align	2
+	.set	.LANCHOR8,. + 0
+	.type	c_ftl_nand_totle_phy_blks, %object
+	.size	c_ftl_nand_totle_phy_blks, 4
+c_ftl_nand_totle_phy_blks:
+	.space	4
+	.section	.bss.c_ftl_nand_type,"aw",%nobits
+	.align	1
+	.set	.LANCHOR9,. + 0
+	.type	c_ftl_nand_type, %object
+	.size	c_ftl_nand_type, 2
+c_ftl_nand_type:
+	.space	2
+	.section	.bss.c_ftl_nand_vendor_region_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR28,. + 0
+	.type	c_ftl_nand_vendor_region_num, %object
+	.size	c_ftl_nand_vendor_region_num, 2
+c_ftl_nand_vendor_region_num:
+	.space	2
+	.section	.bss.c_ftl_vendor_part_size,"aw",%nobits
+	.align	1
+	.set	.LANCHOR16,. + 0
+	.type	c_ftl_vendor_part_size, %object
+	.size	c_ftl_vendor_part_size, 2
+c_ftl_vendor_part_size:
+	.space	2
+	.section	.bss.c_gc_page_buf_num,"aw",%nobits
+	.align	2
+	.set	.LANCHOR96,. + 0
+	.type	c_gc_page_buf_num, %object
+	.size	c_gc_page_buf_num, 4
+c_gc_page_buf_num:
+	.space	4
+	.section	.bss.c_mlc_erase_count_value,"aw",%nobits
+	.align	1
+	.set	.LANCHOR14,. + 0
+	.type	c_mlc_erase_count_value, %object
+	.size	c_mlc_erase_count_value, 2
+c_mlc_erase_count_value:
+	.space	2
+	.section	.bss.check_buf,"aw",%nobits
+	.align	2
+	.type	check_buf, %object
+	.size	check_buf, 4096
+check_buf:
+	.space	4096
+	.section	.bss.check_spare_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR111,. + 0
+	.type	check_spare_buf, %object
+	.size	check_spare_buf, 512
+check_spare_buf:
+	.space	512
+	.section	.bss.check_vpc_table,"aw",%nobits
+	.align	1
+	.type	check_vpc_table, %object
+	.size	check_vpc_table, 16384
+check_vpc_table:
+	.space	16384
+	.section	.bss.ftl_gc_temp_power_lost_recovery_flag,"aw",%nobits
+	.align	2
+	.set	.LANCHOR153,. + 0
+	.type	ftl_gc_temp_power_lost_recovery_flag, %object
+	.size	ftl_gc_temp_power_lost_recovery_flag, 4
+ftl_gc_temp_power_lost_recovery_flag:
+	.space	4
+	.section	.bss.ftl_temp_buf,"aw",%nobits
+	.align	2
+	.type	ftl_temp_buf, %object
+	.size	ftl_temp_buf, 4096
+ftl_temp_buf:
+	.space	4096
+	.section	.bss.gBbtInfo,"aw",%nobits
+	.align	2
+	.set	.LANCHOR37,. + 0
+	.type	gBbtInfo, %object
+	.size	gBbtInfo, 60
+gBbtInfo:
+	.space	60
+	.section	.bss.gL2pMapInfo,"aw",%nobits
+	.align	2
+	.set	.LANCHOR144,. + 0
+	.type	gL2pMapInfo, %object
+	.size	gL2pMapInfo, 40
+gL2pMapInfo:
+	.space	40
+	.section	.bss.gSysFreeQueue,"aw",%nobits
+	.align	1
+	.set	.LANCHOR38,. + 0
+	.type	gSysFreeQueue, %object
+	.size	gSysFreeQueue, 2056
+gSysFreeQueue:
+	.space	2056
+	.section	.bss.gSysInfo,"aw",%nobits
+	.align	2
+	.set	.LANCHOR81,. + 0
+	.type	gSysInfo, %object
+	.size	gSysInfo, 12
+gSysInfo:
+	.space	12
+	.section	.bss.gVendorBlkInfo,"aw",%nobits
+	.align	2
+	.set	.LANCHOR149,. + 0
+	.type	gVendorBlkInfo, %object
+	.size	gVendorBlkInfo, 40
+gVendorBlkInfo:
+	.space	40
+	.section	.bss.g_GlobalDataVersion,"aw",%nobits
+	.align	2
+	.set	.LANCHOR72,. + 0
+	.type	g_GlobalDataVersion, %object
+	.size	g_GlobalDataVersion, 4
+g_GlobalDataVersion:
+	.space	4
+	.section	.bss.g_GlobalSysVersion,"aw",%nobits
+	.align	2
+	.set	.LANCHOR71,. + 0
+	.type	g_GlobalSysVersion, %object
+	.size	g_GlobalSysVersion, 4
+g_GlobalSysVersion:
+	.space	4
+	.section	.bss.g_MaxLbaSector,"aw",%nobits
+	.align	2
+	.set	.LANCHOR34,. + 0
+	.type	g_MaxLbaSector, %object
+	.size	g_MaxLbaSector, 4
+g_MaxLbaSector:
+	.space	4
+	.section	.bss.g_MaxLbn,"aw",%nobits
+	.align	2
+	.set	.LANCHOR182,. + 0
+	.type	g_MaxLbn, %object
+	.size	g_MaxLbn, 4
+g_MaxLbn:
+	.space	4
+	.section	.bss.g_MaxLpn,"aw",%nobits
+	.align	2
+	.set	.LANCHOR62,. + 0
+	.type	g_MaxLpn, %object
+	.size	g_MaxLpn, 4
+g_MaxLpn:
+	.space	4
+	.section	.bss.g_VaildLpn,"aw",%nobits
+	.align	2
+	.set	.LANCHOR60,. + 0
+	.type	g_VaildLpn, %object
+	.size	g_VaildLpn, 4
+g_VaildLpn:
+	.space	4
+	.section	.bss.g_active_superblock,"aw",%nobits
+	.align	2
+	.set	.LANCHOR51,. + 0
+	.type	g_active_superblock, %object
+	.size	g_active_superblock, 48
+g_active_superblock:
+	.space	48
+	.section	.bss.g_buffer_superblock,"aw",%nobits
+	.align	2
+	.set	.LANCHOR52,. + 0
+	.type	g_buffer_superblock, %object
+	.size	g_buffer_superblock, 48
+g_buffer_superblock:
+	.space	48
+	.section	.bss.g_cur_erase_blk,"aw",%nobits
+	.align	2
+	.set	.LANCHOR113,. + 0
+	.type	g_cur_erase_blk, %object
+	.size	g_cur_erase_blk, 4
+g_cur_erase_blk:
+	.space	4
+	.section	.bss.g_ect_tbl_info_size,"aw",%nobits
+	.align	1
+	.set	.LANCHOR125,. + 0
+	.type	g_ect_tbl_info_size, %object
+	.size	g_ect_tbl_info_size, 2
+g_ect_tbl_info_size:
+	.space	2
+	.section	.bss.g_ect_tbl_power_up_flush,"aw",%nobits
+	.align	1
+	.set	.LANCHOR166,. + 0
+	.type	g_ect_tbl_power_up_flush, %object
+	.size	g_ect_tbl_power_up_flush, 2
+g_ect_tbl_power_up_flush:
+	.space	2
+	.section	.bss.g_ftl_nand_free_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR178,. + 0
+	.type	g_ftl_nand_free_count, %object
+	.size	g_ftl_nand_free_count, 4
+g_ftl_nand_free_count:
+	.space	4
+	.section	.bss.g_gc_bad_block_gc_index,"aw",%nobits
+	.align	1
+	.set	.LANCHOR105,. + 0
+	.type	g_gc_bad_block_gc_index, %object
+	.size	g_gc_bad_block_gc_index, 2
+g_gc_bad_block_gc_index:
+	.space	2
+	.section	.bss.g_gc_bad_block_temp_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR103,. + 0
+	.type	g_gc_bad_block_temp_num, %object
+	.size	g_gc_bad_block_temp_num, 2
+g_gc_bad_block_temp_num:
+	.space	2
+	.section	.bss.g_gc_bad_block_temp_tbl,"aw",%nobits
+	.align	1
+	.set	.LANCHOR104,. + 0
+	.type	g_gc_bad_block_temp_tbl, %object
+	.size	g_gc_bad_block_temp_tbl, 34
+g_gc_bad_block_temp_tbl:
+	.space	34
+	.section	.bss.g_gc_blk_index,"aw",%nobits
+	.align	1
+	.set	.LANCHOR87,. + 0
+	.type	g_gc_blk_index, %object
+	.size	g_gc_blk_index, 2
+g_gc_blk_index:
+	.space	2
+	.section	.bss.g_gc_blk_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR98,. + 0
+	.type	g_gc_blk_num, %object
+	.size	g_gc_blk_num, 2
+g_gc_blk_num:
+	.space	2
+	.section	.bss.g_gc_cur_blk_max_valid_pages,"aw",%nobits
+	.align	1
+	.set	.LANCHOR176,. + 0
+	.type	g_gc_cur_blk_max_valid_pages, %object
+	.size	g_gc_cur_blk_max_valid_pages, 2
+g_gc_cur_blk_max_valid_pages:
+	.space	2
+	.section	.bss.g_gc_cur_blk_valid_pages,"aw",%nobits
+	.align	1
+	.set	.LANCHOR175,. + 0
+	.type	g_gc_cur_blk_valid_pages, %object
+	.size	g_gc_cur_blk_valid_pages, 2
+g_gc_cur_blk_valid_pages:
+	.space	2
+	.section	.bss.g_gc_free_blk_threshold,"aw",%nobits
+	.align	1
+	.set	.LANCHOR84,. + 0
+	.type	g_gc_free_blk_threshold, %object
+	.size	g_gc_free_blk_threshold, 2
+g_gc_free_blk_threshold:
+	.space	2
+	.section	.bss.g_gc_head_data_block,"aw",%nobits
+	.align	2
+	.set	.LANCHOR118,. + 0
+	.type	g_gc_head_data_block, %object
+	.size	g_gc_head_data_block, 4
+g_gc_head_data_block:
+	.space	4
+	.section	.bss.g_gc_head_data_block_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR119,. + 0
+	.type	g_gc_head_data_block_count, %object
+	.size	g_gc_head_data_block_count, 4
+g_gc_head_data_block_count:
+	.space	4
+	.section	.bss.g_gc_merge_free_blk_threshold,"aw",%nobits
+	.align	1
+	.set	.LANCHOR85,. + 0
+	.type	g_gc_merge_free_blk_threshold, %object
+	.size	g_gc_merge_free_blk_threshold, 2
+g_gc_merge_free_blk_threshold:
+	.space	2
+	.section	.bss.g_gc_next_blk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR101,. + 0
+	.type	g_gc_next_blk, %object
+	.size	g_gc_next_blk, 2
+g_gc_next_blk:
+	.space	2
+	.section	.bss.g_gc_next_blk_1,"aw",%nobits
+	.align	1
+	.set	.LANCHOR102,. + 0
+	.type	g_gc_next_blk_1, %object
+	.size	g_gc_next_blk_1, 2
+g_gc_next_blk_1:
+	.space	2
+	.section	.bss.g_gc_num_req,"aw",%nobits
+	.align	2
+	.set	.LANCHOR91,. + 0
+	.type	g_gc_num_req, %object
+	.size	g_gc_num_req, 4
+g_gc_num_req:
+	.space	4
+	.section	.bss.g_gc_page_offset,"aw",%nobits
+	.align	1
+	.set	.LANCHOR99,. + 0
+	.type	g_gc_page_offset, %object
+	.size	g_gc_page_offset, 2
+g_gc_page_offset:
+	.space	2
+	.section	.bss.g_gc_skip_write_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR86,. + 0
+	.type	g_gc_skip_write_count, %object
+	.size	g_gc_skip_write_count, 4
+g_gc_skip_write_count:
+	.space	4
+	.section	.bss.g_gc_superblock,"aw",%nobits
+	.align	2
+	.set	.LANCHOR82,. + 0
+	.type	g_gc_superblock, %object
+	.size	g_gc_superblock, 48
+g_gc_superblock:
+	.space	48
+	.section	.bss.g_gc_temp_superblock,"aw",%nobits
+	.align	2
+	.set	.LANCHOR53,. + 0
+	.type	g_gc_temp_superblock, %object
+	.size	g_gc_temp_superblock, 48
+g_gc_temp_superblock:
+	.space	48
+	.section	.bss.g_in_gc_progress,"aw",%nobits
+	.align	2
+	.set	.LANCHOR117,. + 0
+	.type	g_in_gc_progress, %object
+	.size	g_in_gc_progress, 4
+g_in_gc_progress:
+	.space	4
+	.section	.bss.g_in_swl_replace,"aw",%nobits
+	.align	2
+	.set	.LANCHOR89,. + 0
+	.type	g_in_swl_replace, %object
+	.size	g_in_swl_replace, 4
+g_in_swl_replace:
+	.space	4
+	.section	.bss.g_l2p_last_update_region_id,"aw",%nobits
+	.align	1
+	.set	.LANCHOR57,. + 0
+	.type	g_l2p_last_update_region_id, %object
+	.size	g_l2p_last_update_region_id, 2
+g_l2p_last_update_region_id:
+	.space	2
+	.section	.bss.g_max_erase_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR77,. + 0
+	.type	g_max_erase_count, %object
+	.size	g_max_erase_count, 4
+g_max_erase_count:
+	.space	4
+	.section	.bss.g_min_erase_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR78,. + 0
+	.type	g_min_erase_count, %object
+	.size	g_min_erase_count, 4
+g_min_erase_count:
+	.space	4
+	.section	.bss.g_nand_ops,"aw",%nobits
+	.align	2
+	.set	.LANCHOR107,. + 0
+	.type	g_nand_ops, %object
+	.size	g_nand_ops, 16
+g_nand_ops:
+	.space	16
+	.section	.bss.g_nand_phy_info,"aw",%nobits
+	.align	1
+	.set	.LANCHOR0,. + 0
+	.type	g_nand_phy_info, %object
+	.size	g_nand_phy_info, 24
+g_nand_phy_info:
+	.space	24
+	.section	.bss.g_num_data_superblocks,"aw",%nobits
+	.align	1
+	.set	.LANCHOR45,. + 0
+	.type	g_num_data_superblocks, %object
+	.size	g_num_data_superblocks, 2
+g_num_data_superblocks:
+	.space	2
+	.section	.bss.g_num_free_superblocks,"aw",%nobits
+	.align	1
+	.set	.LANCHOR48,. + 0
+	.type	g_num_free_superblocks, %object
+	.size	g_num_free_superblocks, 2
+g_num_free_superblocks:
+	.space	2
+	.section	.bss.g_power_lost_recovery_flag,"aw",%nobits
+	.align	1
+	.set	.LANCHOR162,. + 0
+	.type	g_power_lost_recovery_flag, %object
+	.size	g_power_lost_recovery_flag, 2
+g_power_lost_recovery_flag:
+	.space	2
+	.section	.bss.g_recovery_page_min_ver,"aw",%nobits
+	.align	2
+	.set	.LANCHOR154,. + 0
+	.type	g_recovery_page_min_ver, %object
+	.size	g_recovery_page_min_ver, 4
+g_recovery_page_min_ver:
+	.space	4
+	.section	.bss.g_recovery_page_num,"aw",%nobits
+	.align	2
+	.set	.LANCHOR163,. + 0
+	.type	g_recovery_page_num, %object
+	.size	g_recovery_page_num, 4
+g_recovery_page_num:
+	.space	4
+	.section	.bss.g_recovery_ppa_tbl,"aw",%nobits
+	.align	2
+	.set	.LANCHOR164,. + 0
+	.type	g_recovery_ppa_tbl, %object
+	.size	g_recovery_ppa_tbl, 128
+g_recovery_ppa_tbl:
+	.space	128
+	.section	.bss.g_req_cache,"aw",%nobits
+	.align	2
+	.set	.LANCHOR150,. + 0
+	.type	g_req_cache, %object
+	.size	g_req_cache, 4
+g_req_cache:
+	.space	4
+	.section	.bss.g_sys_ext_data,"aw",%nobits
+	.align	2
+	.set	.LANCHOR83,. + 0
+	.type	g_sys_ext_data, %object
+	.size	g_sys_ext_data, 512
+g_sys_ext_data:
+	.space	512
+	.section	.bss.g_sys_save_data,"aw",%nobits
+	.align	2
+	.set	.LANCHOR79,. + 0
+	.type	g_sys_save_data, %object
+	.size	g_sys_save_data, 48
+g_sys_save_data:
+	.space	48
+	.section	.bss.g_tmp_data_superblock_id,"aw",%nobits
+	.align	1
+	.set	.LANCHOR151,. + 0
+	.type	g_tmp_data_superblock_id, %object
+	.size	g_tmp_data_superblock_id, 2
+g_tmp_data_superblock_id:
+	.space	2
+	.section	.bss.g_totle_avg_erase_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR75,. + 0
+	.type	g_totle_avg_erase_count, %object
+	.size	g_totle_avg_erase_count, 4
+g_totle_avg_erase_count:
+	.space	4
+	.section	.bss.g_totle_cache_write_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR66,. + 0
+	.type	g_totle_cache_write_count, %object
+	.size	g_totle_cache_write_count, 4
+g_totle_cache_write_count:
+	.space	4
+	.section	.bss.g_totle_discard_page_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR64,. + 0
+	.type	g_totle_discard_page_count, %object
+	.size	g_totle_discard_page_count, 4
+g_totle_discard_page_count:
+	.space	4
+	.section	.bss.g_totle_gc_page_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR68,. + 0
+	.type	g_totle_gc_page_count, %object
+	.size	g_totle_gc_page_count, 4
+g_totle_gc_page_count:
+	.space	4
+	.section	.bss.g_totle_l2p_write_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR67,. + 0
+	.type	g_totle_l2p_write_count, %object
+	.size	g_totle_l2p_write_count, 4
+g_totle_l2p_write_count:
+	.space	4
+	.section	.bss.g_totle_map_block,"aw",%nobits
+	.align	1
+	.set	.LANCHOR147,. + 0
+	.type	g_totle_map_block, %object
+	.size	g_totle_map_block, 2
+g_totle_map_block:
+	.space	2
+	.section	.bss.g_totle_mlc_erase_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR73,. + 0
+	.type	g_totle_mlc_erase_count, %object
+	.size	g_totle_mlc_erase_count, 4
+g_totle_mlc_erase_count:
+	.space	4
+	.section	.bss.g_totle_read_page_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR63,. + 0
+	.type	g_totle_read_page_count, %object
+	.size	g_totle_read_page_count, 4
+g_totle_read_page_count:
+	.space	4
+	.section	.bss.g_totle_read_sector,"aw",%nobits
+	.align	2
+	.set	.LANCHOR70,. + 0
+	.type	g_totle_read_sector, %object
+	.size	g_totle_read_sector, 4
+g_totle_read_sector:
+	.space	4
+	.section	.bss.g_totle_slc_erase_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR74,. + 0
+	.type	g_totle_slc_erase_count, %object
+	.size	g_totle_slc_erase_count, 4
+g_totle_slc_erase_count:
+	.space	4
+	.section	.bss.g_totle_swl_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR152,. + 0
+	.type	g_totle_swl_count, %object
+	.size	g_totle_swl_count, 4
+g_totle_swl_count:
+	.space	4
+	.section	.bss.g_totle_sys_slc_erase_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR76,. + 0
+	.type	g_totle_sys_slc_erase_count, %object
+	.size	g_totle_sys_slc_erase_count, 4
+g_totle_sys_slc_erase_count:
+	.space	4
+	.section	.bss.g_totle_vendor_block,"aw",%nobits
+	.align	1
+	.set	.LANCHOR35,. + 0
+	.type	g_totle_vendor_block, %object
+	.size	g_totle_vendor_block, 2
+g_totle_vendor_block:
+	.space	2
+	.section	.bss.g_totle_write_page_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR65,. + 0
+	.type	g_totle_write_page_count, %object
+	.size	g_totle_write_page_count, 4
+g_totle_write_page_count:
+	.space	4
+	.section	.bss.g_totle_write_sector,"aw",%nobits
+	.align	2
+	.set	.LANCHOR69,. + 0
+	.type	g_totle_write_sector, %object
+	.size	g_totle_write_sector, 4
+g_totle_write_sector:
+	.space	4
+	.section	.bss.gc_discard_updated,"aw",%nobits
+	.align	2
+	.set	.LANCHOR172,. + 0
+	.type	gc_discard_updated, %object
+	.size	gc_discard_updated, 4
+gc_discard_updated:
+	.space	4
+	.section	.bss.gc_ink_free_return_value,"aw",%nobits
+	.align	1
+	.set	.LANCHOR174,. + 0
+	.type	gc_ink_free_return_value, %object
+	.size	gc_ink_free_return_value, 2
+gc_ink_free_return_value:
+	.space	2
+	.section	.bss.gp_ect_tbl_info,"aw",%nobits
+	.align	2
+	.set	.LANCHOR127,. + 0
+	.type	gp_ect_tbl_info, %object
+	.size	gp_ect_tbl_info, 4
+gp_ect_tbl_info:
+	.space	4
+	.section	.bss.gp_gc_page_buf_info,"aw",%nobits
+	.align	2
+	.set	.LANCHOR92,. + 0
+	.type	gp_gc_page_buf_info, %object
+	.size	gp_gc_page_buf_info, 4
+gp_gc_page_buf_info:
+	.space	4
+	.section	.bss.gp_last_act_superblock,"aw",%nobits
+	.align	2
+	.set	.LANCHOR171,. + 0
+	.type	gp_last_act_superblock, %object
+	.size	gp_last_act_superblock, 4
+gp_last_act_superblock:
+	.space	4
+	.section	.bss.p_blk_mode_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR1,. + 0
+	.type	p_blk_mode_table, %object
+	.size	p_blk_mode_table, 4
+p_blk_mode_table:
+	.space	4
+	.section	.bss.p_data_block_list_head,"aw",%nobits
+	.align	2
+	.set	.LANCHOR42,. + 0
+	.type	p_data_block_list_head, %object
+	.size	p_data_block_list_head, 4
+p_data_block_list_head:
+	.space	4
+	.section	.bss.p_data_block_list_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR41,. + 0
+	.type	p_data_block_list_table, %object
+	.size	p_data_block_list_table, 4
+p_data_block_list_table:
+	.space	4
+	.section	.bss.p_data_block_list_tail,"aw",%nobits
+	.align	2
+	.set	.LANCHOR44,. + 0
+	.type	p_data_block_list_tail, %object
+	.size	p_data_block_list_tail, 4
+p_data_block_list_tail:
+	.space	4
+	.section	.bss.p_erase_count_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR40,. + 0
+	.type	p_erase_count_table, %object
+	.size	p_erase_count_table, 4
+p_erase_count_table:
+	.space	4
+	.section	.bss.p_free_data_block_list_head,"aw",%nobits
+	.align	2
+	.set	.LANCHOR47,. + 0
+	.type	p_free_data_block_list_head, %object
+	.size	p_free_data_block_list_head, 4
+p_free_data_block_list_head:
+	.space	4
+	.section	.bss.p_gc_blk_tbl,"aw",%nobits
+	.align	2
+	.set	.LANCHOR97,. + 0
+	.type	p_gc_blk_tbl, %object
+	.size	p_gc_blk_tbl, 4
+p_gc_blk_tbl:
+	.space	4
+	.section	.bss.p_gc_data_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR93,. + 0
+	.type	p_gc_data_buf, %object
+	.size	p_gc_data_buf, 4
+p_gc_data_buf:
+	.space	4
+	.section	.bss.p_gc_page_info,"aw",%nobits
+	.align	2
+	.set	.LANCHOR100,. + 0
+	.type	p_gc_page_info, %object
+	.size	p_gc_page_info, 4
+p_gc_page_info:
+	.space	4
+	.section	.bss.p_gc_spare_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR94,. + 0
+	.type	p_gc_spare_buf, %object
+	.size	p_gc_spare_buf, 4
+p_gc_spare_buf:
+	.space	4
+	.section	.bss.p_io_data_buf_0,"aw",%nobits
+	.align	2
+	.set	.LANCHOR116,. + 0
+	.type	p_io_data_buf_0, %object
+	.size	p_io_data_buf_0, 4
+p_io_data_buf_0:
+	.space	4
+	.section	.bss.p_io_data_buf_1,"aw",%nobits
+	.align	2
+	.set	.LANCHOR114,. + 0
+	.type	p_io_data_buf_1, %object
+	.size	p_io_data_buf_1, 4
+p_io_data_buf_1:
+	.space	4
+	.section	.bss.p_io_spare_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR115,. + 0
+	.type	p_io_spare_buf, %object
+	.size	p_io_spare_buf, 4
+p_io_spare_buf:
+	.space	4
+	.section	.bss.p_l2p_map_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR136,. + 0
+	.type	p_l2p_map_buf, %object
+	.size	p_l2p_map_buf, 4
+p_l2p_map_buf:
+	.space	4
+	.section	.bss.p_l2p_ram_map,"aw",%nobits
+	.align	2
+	.set	.LANCHOR56,. + 0
+	.type	p_l2p_ram_map, %object
+	.size	p_l2p_ram_map, 4
+p_l2p_ram_map:
+	.space	4
+	.section	.bss.p_map_block_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR129,. + 0
+	.type	p_map_block_table, %object
+	.size	p_map_block_table, 4
+p_map_block_table:
+	.space	4
+	.section	.bss.p_map_block_valid_page_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR130,. + 0
+	.type	p_map_block_valid_page_count, %object
+	.size	p_map_block_valid_page_count, 4
+p_map_block_valid_page_count:
+	.space	4
+	.section	.bss.p_map_block_ver_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR135,. + 0
+	.type	p_map_block_ver_table, %object
+	.size	p_map_block_ver_table, 4
+p_map_block_ver_table:
+	.space	4
+	.section	.bss.p_map_region_ppn_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR134,. + 0
+	.type	p_map_region_ppn_table, %object
+	.size	p_map_region_ppn_table, 4
+p_map_region_ppn_table:
+	.space	4
+	.section	.bss.p_plane_order_table,"aw",%nobits
+	.set	.LANCHOR13,. + 0
+	.type	p_plane_order_table, %object
+	.size	p_plane_order_table, 32
+p_plane_order_table:
+	.space	32
+	.section	.bss.p_swl_mul_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR126,. + 0
+	.type	p_swl_mul_table, %object
+	.size	p_swl_mul_table, 4
+p_swl_mul_table:
+	.space	4
+	.section	.bss.p_sys_data_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR39,. + 0
+	.type	p_sys_data_buf, %object
+	.size	p_sys_data_buf, 4
+p_sys_data_buf:
+	.space	4
+	.section	.bss.p_sys_data_buf_1,"aw",%nobits
+	.align	2
+	.set	.LANCHOR123,. + 0
+	.type	p_sys_data_buf_1, %object
+	.size	p_sys_data_buf_1, 4
+p_sys_data_buf_1:
+	.space	4
+	.section	.bss.p_sys_spare_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR109,. + 0
+	.type	p_sys_spare_buf, %object
+	.size	p_sys_spare_buf, 4
+p_sys_spare_buf:
+	.space	4
+	.section	.bss.p_valid_page_count_check_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR128,. + 0
+	.type	p_valid_page_count_check_table, %object
+	.size	p_valid_page_count_check_table, 4
+p_valid_page_count_check_table:
+	.space	4
+	.section	.bss.p_valid_page_count_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR43,. + 0
+	.type	p_valid_page_count_table, %object
+	.size	p_valid_page_count_table, 4
+p_valid_page_count_table:
+	.space	4
+	.section	.bss.p_vendor_block_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR36,. + 0
+	.type	p_vendor_block_table, %object
+	.size	p_vendor_block_table, 4
+p_vendor_block_table:
+	.space	4
+	.section	.bss.p_vendor_block_valid_page_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR131,. + 0
+	.type	p_vendor_block_valid_page_count, %object
+	.size	p_vendor_block_valid_page_count, 4
+p_vendor_block_valid_page_count:
+	.space	4
+	.section	.bss.p_vendor_block_ver_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR132,. + 0
+	.type	p_vendor_block_ver_table, %object
+	.size	p_vendor_block_ver_table, 4
+p_vendor_block_ver_table:
+	.space	4
+	.section	.bss.p_vendor_data_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR124,. + 0
+	.type	p_vendor_data_buf, %object
+	.size	p_vendor_data_buf, 4
+p_vendor_data_buf:
+	.space	4
+	.section	.bss.p_vendor_region_ppn_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR133,. + 0
+	.type	p_vendor_region_ppn_table, %object
+	.size	p_vendor_region_ppn_table, 4
+p_vendor_region_ppn_table:
+	.space	4
+	.section	.bss.req_erase,"aw",%nobits
+	.align	2
+	.set	.LANCHOR112,. + 0
+	.type	req_erase, %object
+	.size	req_erase, 4
+req_erase:
+	.space	4
+	.section	.bss.req_gc,"aw",%nobits
+	.align	2
+	.set	.LANCHOR95,. + 0
+	.type	req_gc, %object
+	.size	req_gc, 4
+req_gc:
+	.space	4
+	.section	.bss.req_gc_dst,"aw",%nobits
+	.align	2
+	.set	.LANCHOR121,. + 0
+	.type	req_gc_dst, %object
+	.size	req_gc_dst, 4
+req_gc_dst:
+	.space	4
+	.section	.bss.req_prgm,"aw",%nobits
+	.align	2
+	.set	.LANCHOR122,. + 0
+	.type	req_prgm, %object
+	.size	req_prgm, 4
+req_prgm:
+	.space	4
+	.section	.bss.req_read,"aw",%nobits
+	.align	2
+	.set	.LANCHOR120,. + 0
+	.type	req_read, %object
+	.size	req_read, 4
+req_read:
+	.space	4
+	.section	.bss.req_sys,"aw",%nobits
+	.align	2
+	.set	.LANCHOR108,. + 0
+	.type	req_sys, %object
+	.size	req_sys, 20
+req_sys:
+	.space	20
+	.section	.data.ftl_gc_temp_block_bops_scan_page_addr,"aw",%progbits
+	.align	1
+	.set	.LANCHOR157,. + 0
+	.type	ftl_gc_temp_block_bops_scan_page_addr, %object
+	.size	ftl_gc_temp_block_bops_scan_page_addr, 2
+ftl_gc_temp_block_bops_scan_page_addr:
+	.short	-1
+	.section	.data.gFtlInitStatus,"aw",%progbits
+	.align	2
+	.set	.LANCHOR88,. + 0
+	.type	gFtlInitStatus, %object
+	.size	gFtlInitStatus, 4
+gFtlInitStatus:
+	.word	-1
+	.section	.data.power_up_flag,"aw",%progbits
+	.align	2
+	.set	.LANCHOR179,. + 0
+	.type	power_up_flag, %object
+	.size	power_up_flag, 4
+power_up_flag:
+	.word	1
+	.section	.rodata.FlashProgPages.str1.1,"aMS",%progbits,1
+.LC79:
+	.ascii	"prog read error: = %x\012\000"
+.LC80:
+	.ascii	"prog read s error: = %x %x %x\012\000"
+.LC81:
+	.ascii	"prog read d error: = %x %x %x\012\000"
+	.section	.rodata.FtlBbmMapBadBlock.str1.1,"aMS",%progbits,1
+.LC0:
+	.ascii	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\012"
+	.ascii	"\000"
+	.section	.rodata.FtlBbmTblFlush.str1.1,"aMS",%progbits,1
+.LC94:
+	.ascii	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\012\000"
+.LC95:
+	.ascii	"FtlBbmTblFlush error:%x\012\000"
+.LC96:
+	.ascii	"FtlBbmTblFlush error = %x error count = %d\012\000"
+	.section	.rodata.FtlGcFreeBadSuperBlk.str1.1,"aMS",%progbits,1
+.LC97:
+	.ascii	"FtlGcFreeBadSuperBlk 0x%x\012\000"
+	.section	.rodata.FtlGcMarkBadPhyBlk.str1.1,"aMS",%progbits,1
+.LC74:
+	.ascii	"FtlGcMarkBadPhyBlk %d 0x%x\012\000"
+	.section	.rodata.FtlGcRefreshBlock.str1.1,"aMS",%progbits,1
+.LC73:
+	.ascii	"FtlGcRefreshBlock  0x%x\012\000"
+	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",%progbits,1
+.LC100:
+	.ascii	"no ect\000"
+	.section	.rodata.FtlMapWritePage.str1.1,"aMS",%progbits,1
+.LC86:
+	.ascii	"FtlMapWritePage error = %x \012\000"
+.LC87:
+	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
+	.section	.rodata.FtlMemInit.str1.1,"aMS",%progbits,1
+.LC82:
+	.ascii	"%s error allocating memory. return -1\012\000"
+	.section	.rodata.FtlPrintInfo2buf.str1.1,"aMS",%progbits,1
+.LC2:
+	.ascii	"FLASH INFO:\012\000"
+.LC3:
+	.ascii	"Device Capacity: %d MB\012\000"
+.LC4:
+	.ascii	"FTL INFO:\012\000"
+.LC5:
+	.ascii	"g_MaxLpn = 0x%x\012\000"
+.LC6:
+	.ascii	"g_VaildLpn = 0x%x\012\000"
+.LC7:
+	.ascii	"read_page_count = 0x%x\012\000"
+.LC8:
+	.ascii	"discard_page_count = 0x%x\012\000"
+.LC9:
+	.ascii	"write_page_count = 0x%x\012\000"
+.LC10:
+	.ascii	"cache_write_count = 0x%x\012\000"
+.LC11:
+	.ascii	"l2p_write_count = 0x%x\012\000"
+.LC12:
+	.ascii	"gc_page_count = 0x%x\012\000"
+.LC13:
+	.ascii	"totle_write = %d MB\012\000"
+.LC14:
+	.ascii	"totle_read = %d MB\012\000"
+.LC15:
+	.ascii	"GSV = 0x%x\012\000"
+.LC16:
+	.ascii	"GDV = 0x%x\012\000"
+.LC17:
+	.ascii	"bad blk num = %d\012\000"
+.LC18:
+	.ascii	"free_superblocks = 0x%x\012\000"
+.LC19:
+	.ascii	"mlc_EC = 0x%x\012\000"
+.LC20:
+	.ascii	"slc_EC = 0x%x\012\000"
+.LC21:
+	.ascii	"avg_EC = 0x%x\012\000"
+.LC22:
+	.ascii	"sys_EC = 0x%x\012\000"
+.LC23:
+	.ascii	"max_EC = 0x%x\012\000"
+.LC24:
+	.ascii	"min_EC = 0x%x\012\000"
+.LC25:
+	.ascii	"PLT = 0x%x\012\000"
+.LC26:
+	.ascii	"POT = 0x%x\012\000"
+.LC27:
+	.ascii	"MaxSector = 0x%x\012\000"
+.LC28:
+	.ascii	"init_sys_blks_pp = 0x%x\012\000"
+.LC29:
+	.ascii	"sys_blks_pp = 0x%x\012\000"
+.LC30:
+	.ascii	"free sysblock = 0x%x\012\000"
+.LC31:
+	.ascii	"data_blks_pp = 0x%x\012\000"
+.LC32:
+	.ascii	"data_op_blks_pp = 0x%x\012\000"
+.LC33:
+	.ascii	"max_data_blks = 0x%x\012\000"
+.LC34:
+	.ascii	"Sys.id = 0x%x\012\000"
+.LC35:
+	.ascii	"Bbt.id = 0x%x\012\000"
+.LC36:
+	.ascii	"ACT.page = 0x%x\012\000"
+.LC37:
+	.ascii	"ACT.plane = 0x%x\012\000"
+.LC38:
+	.ascii	"ACT.id = 0x%x\012\000"
+.LC39:
+	.ascii	"ACT.mode = 0x%x\012\000"
+.LC40:
+	.ascii	"ACT.a_pages = 0x%x\012\000"
+.LC41:
+	.ascii	"ACT VPC = 0x%x\012\000"
+.LC42:
+	.ascii	"BUF.page = 0x%x\012\000"
+.LC43:
+	.ascii	"BUF.plane = 0x%x\012\000"
+.LC44:
+	.ascii	"BUF.id = 0x%x\012\000"
+.LC45:
+	.ascii	"BUF.mode = 0x%x\012\000"
+.LC46:
+	.ascii	"BUF.a_pages = 0x%x\012\000"
+.LC47:
+	.ascii	"BUF VPC = 0x%x\012\000"
+.LC48:
+	.ascii	"TMP.page = 0x%x\012\000"
+.LC49:
+	.ascii	"TMP.plane = 0x%x\012\000"
+.LC50:
+	.ascii	"TMP.id = 0x%x\012\000"
+.LC51:
+	.ascii	"TMP.mode = 0x%x\012\000"
+.LC52:
+	.ascii	"TMP.a_pages = 0x%x\012\000"
+.LC53:
+	.ascii	"GC.page = 0x%x\012\000"
+.LC54:
+	.ascii	"GC.plane = 0x%x\012\000"
+.LC55:
+	.ascii	"GC.id = 0x%x\012\000"
+.LC56:
+	.ascii	"GC.mode = 0x%x\012\000"
+.LC57:
+	.ascii	"GC.a_pages = 0x%x\012\000"
+.LC58:
+	.ascii	"WR_CHK = %x %x %x\012\000"
+.LC59:
+	.ascii	"Read Err Cnt = 0x%x\012\000"
+.LC60:
+	.ascii	"Prog Err Cnt = 0x%x\012\000"
+.LC61:
+	.ascii	"gc_free_blk_th= 0x%x\012\000"
+.LC62:
+	.ascii	"gc_merge_free_blk_th= 0x%x\012\000"
+.LC63:
+	.ascii	"gc_skip_write_count= 0x%x\012\000"
+.LC64:
+	.ascii	"gc_blk_index= 0x%x\012\000"
+.LC65:
+	.ascii	"free min EC= 0x%x\012\000"
+.LC66:
+	.ascii	"free max EC= 0x%x\012\000"
+.LC67:
+	.ascii	"GC__SB VPC = 0x%x\012\000"
+.LC68:
+	.ascii	"%d. [0x%x]=0x%x 0x%x  0x%x\012\000"
+.LC69:
+	.ascii	"free %d. [0x%x] 0x%x  0x%x\012\000"
+	.section	.rodata.FtlProgPages.str1.1,"aMS",%progbits,1
+.LC103:
+	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
+	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",%progbits,1
+.LC99:
+	.ascii	"spuer block %x vpn is 0\012 \000"
+	.section	.rodata.FtlVpcCheckAndModify.str1.1,"aMS",%progbits,1
+.LC102:
+	.ascii	"FtlCheckVpc %x = %x  %x\012\000"
+	.section	.rodata.FtlVpcTblFlush.str1.1,"aMS",%progbits,1
+.LC101:
+	.ascii	"FtlVpcTblFlush error = %x error count = %d\012\000"
+	.section	.rodata.FtlWrite.str1.1,"aMS",%progbits,1
+.LC105:
+	.ascii	"FtlWrite: lpa error:%x %x\012\000"
+	.section	.rodata.GetSwlReplaceBlock.str1.1,"aMS",%progbits,1
+.LC72:
+	.ascii	"swblk %x ,avg = %x max= %x vpc= %x,ec=%x ,max ec=%x"
+	.ascii	"\012\000"
+	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",%progbits,1
+.LC1:
+	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
+	.section	.rodata.__func__.10046,"a",%progbits
+	.set	.LANCHOR177,. + 0
+	.type	__func__.10046, %object
+	.size	__func__.10046, 23
+__func__.10046:
+	.ascii	"rk_ftl_garbage_collect\000"
+	.section	.rodata.__func__.10307,"a",%progbits
+	.set	.LANCHOR106,. + 0
+	.type	__func__.10307, %object
+	.size	__func__.10307, 15
+__func__.10307:
+	.ascii	"FlashReadPages\000"
+	.section	.rodata.__func__.10324,"a",%progbits
+	.set	.LANCHOR110,. + 0
+	.type	__func__.10324, %object
+	.size	__func__.10324, 15
+__func__.10324:
+	.ascii	"FlashProgPages\000"
+	.section	.rodata.__func__.8799,"a",%progbits
+	.set	.LANCHOR138,. + 0
+	.type	__func__.8799, %object
+	.size	__func__.8799, 11
+__func__.8799:
+	.ascii	"FtlMemInit\000"
+	.section	.rodata.__func__.8923,"a",%progbits
+	.set	.LANCHOR170,. + 0
+	.type	__func__.8923, %object
+	.size	__func__.8923, 13
+__func__.8923:
+	.ascii	"FtlProgPages\000"
+	.section	.rodata.__func__.8951,"a",%progbits
+	.set	.LANCHOR180,. + 0
+	.type	__func__.8951, %object
+	.size	__func__.8951, 9
+__func__.8951:
+	.ascii	"FtlWrite\000"
+	.section	.rodata.__func__.9015,"a",%progbits
+	.set	.LANCHOR139,. + 0
+	.type	__func__.9015, %object
+	.size	__func__.9015, 14
+__func__.9015:
+	.ascii	"FtlBbt2Bitmap\000"
+	.section	.rodata.__func__.9058,"a",%progbits
+	.set	.LANCHOR165,. + 0
+	.type	__func__.9058, %object
+	.size	__func__.9058, 11
+__func__.9058:
+	.ascii	"FtlLoadBbt\000"
+	.section	.rodata.__func__.9181,"a",%progbits
+	.set	.LANCHOR49,. + 0
+	.type	__func__.9181, %object
+	.size	__func__.9181, 17
+__func__.9181:
+	.ascii	"INSERT_FREE_LIST\000"
+	.section	.rodata.__func__.9186,"a",%progbits
+	.set	.LANCHOR46,. + 0
+	.type	__func__.9186, %object
+	.size	__func__.9186, 17
+__func__.9186:
+	.ascii	"INSERT_DATA_LIST\000"
+	.section	.rodata.__func__.9216,"a",%progbits
+	.set	.LANCHOR50,. + 0
+	.type	__func__.9216, %object
+	.size	__func__.9216, 17
+__func__.9216:
+	.ascii	"List_remove_node\000"
+	.section	.rodata.__func__.9248,"a",%progbits
+	.set	.LANCHOR54,. + 0
+	.type	__func__.9248, %object
+	.size	__func__.9248, 22
+__func__.9248:
+	.ascii	"List_update_data_list\000"
+	.section	.rodata.__func__.9257,"a",%progbits
+	.set	.LANCHOR140,. + 0
+	.type	__func__.9257, %object
+	.size	__func__.9257, 16
+__func__.9257:
+	.ascii	"load_l2p_region\000"
+	.section	.rodata.__func__.9289,"a",%progbits
+	.set	.LANCHOR55,. + 0
+	.type	__func__.9289, %object
+	.size	__func__.9289, 26
+__func__.9289:
+	.ascii	"ftl_map_blk_alloc_new_blk\000"
+	.section	.rodata.__func__.9300,"a",%progbits
+	.set	.LANCHOR143,. + 0
+	.type	__func__.9300, %object
+	.size	__func__.9300, 15
+__func__.9300:
+	.ascii	"ftl_map_blk_gc\000"
+	.section	.rodata.__func__.9314,"a",%progbits
+	.set	.LANCHOR141,. + 0
+	.type	__func__.9314, %object
+	.size	__func__.9314, 31
+__func__.9314:
+	.ascii	"Ftl_write_map_blk_to_last_page\000"
+	.section	.rodata.__func__.9328,"a",%progbits
+	.set	.LANCHOR142,. + 0
+	.type	__func__.9328, %object
+	.size	__func__.9328, 16
+__func__.9328:
+	.ascii	"FtlMapWritePage\000"
+	.section	.rodata.__func__.9353,"a",%progbits
+	.set	.LANCHOR58,. + 0
+	.type	__func__.9353, %object
+	.size	__func__.9353, 22
+__func__.9353:
+	.ascii	"select_l2p_ram_region\000"
+	.section	.rodata.__func__.9370,"a",%progbits
+	.set	.LANCHOR145,. + 0
+	.type	__func__.9370, %object
+	.size	__func__.9370, 9
+__func__.9370:
+	.ascii	"log2phys\000"
+	.section	.rodata.__func__.9443,"a",%progbits
+	.set	.LANCHOR167,. + 0
+	.type	__func__.9443, %object
+	.size	__func__.9443, 15
+__func__.9443:
+	.ascii	"FtlVpcTblFlush\000"
+	.section	.rodata.__func__.9465,"a",%progbits
+	.set	.LANCHOR148,. + 0
+	.type	__func__.9465, %object
+	.size	__func__.9465, 14
+__func__.9465:
+	.ascii	"FtlScanSysBlk\000"
+	.section	.rodata.__func__.9522,"a",%progbits
+	.set	.LANCHOR181,. + 0
+	.type	__func__.9522, %object
+	.size	__func__.9522, 15
+__func__.9522:
+	.ascii	"FtlLoadSysInfo\000"
+	.section	.rodata.__func__.9585,"a",%progbits
+	.set	.LANCHOR146,. + 0
+	.type	__func__.9585, %object
+	.size	__func__.9585, 16
+__func__.9585:
+	.ascii	"FtlReUsePrevPpa\000"
+	.section	.rodata.__func__.9619,"a",%progbits
+	.set	.LANCHOR161,. + 0
+	.type	__func__.9619, %object
+	.size	__func__.9619, 22
+__func__.9619:
+	.ascii	"FtlRecoverySuperblock\000"
+	.section	.rodata.__func__.9676,"a",%progbits
+	.set	.LANCHOR61,. + 0
+	.type	__func__.9676, %object
+	.size	__func__.9676, 16
+__func__.9676:
+	.ascii	"make_superblock\000"
+	.section	.rodata.__func__.9697,"a",%progbits
+	.set	.LANCHOR155,. + 0
+	.type	__func__.9697, %object
+	.size	__func__.9697, 18
+__func__.9697:
+	.ascii	"SupperBlkListInit\000"
+	.section	.rodata.__func__.9722,"a",%progbits
+	.set	.LANCHOR168,. + 0
+	.type	__func__.9722, %object
+	.size	__func__.9722, 21
+__func__.9722:
+	.ascii	"FtlVpcCheckAndModify\000"
+	.section	.rodata.__func__.9738,"a",%progbits
+	.set	.LANCHOR156,. + 0
+	.type	__func__.9738, %object
+	.size	__func__.9738, 14
+__func__.9738:
+	.ascii	"ftl_check_vpc\000"
+	.section	.rodata.__func__.9822,"a",%progbits
+	.set	.LANCHOR158,. + 0
+	.type	__func__.9822, %object
+	.size	__func__.9822, 25
+__func__.9822:
+	.ascii	"allocate_data_superblock\000"
+	.section	.rodata.__func__.9843,"a",%progbits
+	.set	.LANCHOR169,. + 0
+	.type	__func__.9843, %object
+	.size	__func__.9843, 29
+__func__.9843:
+	.ascii	"allocate_new_data_superblock\000"
+	.section	.rodata.__func__.9850,"a",%progbits
+	.set	.LANCHOR90,. + 0
+	.type	__func__.9850, %object
+	.size	__func__.9850, 19
+__func__.9850:
+	.ascii	"get_new_active_ppa\000"
+	.section	.rodata.__func__.9863,"a",%progbits
+	.set	.LANCHOR159,. + 0
+	.type	__func__.9863, %object
+	.size	__func__.9863, 16
+__func__.9863:
+	.ascii	"update_vpc_list\000"
+	.section	.rodata.__func__.9870,"a",%progbits
+	.set	.LANCHOR160,. + 0
+	.type	__func__.9870, %object
+	.size	__func__.9870, 20
+__func__.9870:
+	.ascii	"decrement_vpc_count\000"
+	.section	.rodata.__func__.9940,"a",%progbits
+	.set	.LANCHOR173,. + 0
+	.type	__func__.9940, %object
+	.size	__func__.9940, 19
+__func__.9940:
+	.ascii	"FtlGcFreeTempBlock\000"
+	.section	.rodata.decrement_vpc_count.str1.1,"aMS",%progbits,1
+.LC98:
+	.ascii	"decrement_vpc_count %x = %d\012\000"
+	.section	.rodata.ftl_check_vpc.str1.1,"aMS",%progbits,1
+.LC91:
+	.ascii	"...%s enter...\012\000"
+.LC92:
+	.ascii	"FtlCheckVpc2 %x = %x  %x\012\000"
+.LC93:
+	.ascii	"free blk vpc error %x = %x  %x\012\000"
+	.section	.rodata.ftl_scan_all_data.str1.1,"aMS",%progbits,1
+.LC88:
+	.ascii	"ftl_scan_all_data = %x\012\000"
+.LC89:
+	.ascii	"scan lpa = %x ppa= %x\012\000"
+.LC90:
+	.ascii	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\012"
+	.ascii	"\000"
+	.section	.rodata.load_l2p_region.str1.1,"aMS",%progbits,1
+.LC83:
+	.ascii	"region_id = %x phyAddr = %x\012\000"
+.LC84:
+	.ascii	"spare:\000"
+.LC85:
+	.ascii	"map_ppn:\000"
+	.section	.rodata.rk_ftl_garbage_collect.str1.1,"aMS",%progbits,1
+.LC104:
+	.ascii	"SWL %x, FSB = %x vpc= %x,ec=%x th=%x\012\000"
+	.section	.rodata.rknand_print_hex.str1.1,"aMS",%progbits,1
+.LC75:
+	.ascii	"%s 0x%x:\000"
+.LC76:
+	.ascii	"%x \000"
+.LC77:
+	.ascii	"%02x \000"
+.LC78:
+	.ascii	"\012\000"
+	.section	.rodata.rknand_proc_ftlread.str1.1,"aMS",%progbits,1
+.LC70:
+	.ascii	"SFTL version: 5.0.43 20180116\000"
+.LC71:
+	.ascii	"%s\012\000"
+	.text
+.Letext0:
+	.file 6 "include/common.h"
+	.file 7 "./arch/arm/include/asm/types.h"
+	.file 8 "include/linux/types.h"
+	.file 9 "include/errno.h"
+	.file 10 "include/linux/string.h"
+	.file 11 "include/efi.h"
+	.file 12 "include/ide.h"
+	.file 13 "include/part.h"
+	.file 14 "include/flash.h"
+	.file 15 "include/lmb.h"
+	.file 16 "include/asm-generic/u-boot.h"
+	.file 17 "./arch/arm/include/asm/u-boot-arm.h"
+	.file 18 "include/../scripts/dtc/libfdt/fdt.h"
+	.file 19 "include/libfdt_env.h"
+	.file 20 "include/image.h"
+	.file 21 "include/net.h"
+	.file 22 "include/dm/uclass-id.h"
+	.file 23 "drivers/rkflash/sftl_inc.h"
+	.file 24 "drivers/rkflash/flash_com.h"
+	.file 25 "drivers/rkflash/sftl_struct.h"
+	.file 26 "drivers/rkflash/sftl_global.h"
+	.file 27 "include/malloc.h"
+	.file 28 "include/linux/compat.h"
+	.file 29 "include/stdio.h"
+	.file 30 "include/vsprintf.h"
+	.file 31 "include/log.h"
+	.section	.debug_info,"",%progbits
+.Ldebug_info0:
+	.4byte	0x9240
+	.2byte	0x4
+	.4byte	.Ldebug_abbrev0
+	.byte	0x4
+	.uleb128 0x1
+	.4byte	.LASF880
+	.byte	0xc
+	.4byte	.LASF881
+	.4byte	.LASF882
+	.4byte	.Ldebug_ranges0+0x1c0
+	.4byte	0
+	.4byte	.Ldebug_line0
+	.uleb128 0x2
+	.byte	0x2
+	.byte	0x7
+	.4byte	.LASF0
+	.uleb128 0x3
+	.4byte	.LASF4
+	.byte	0x6
+	.byte	0xd
+	.4byte	0x37
+	.uleb128 0x2
+	.byte	0x1
+	.byte	0x8
+	.4byte	.LASF1
+	.uleb128 0x2
+	.byte	0x4
+	.byte	0x7
+	.4byte	.LASF2
+	.uleb128 0x4
+	.4byte	.LASF20
+	.byte	0x9
+	.byte	0xc
+	.4byte	0x50
+	.uleb128 0x5
+	.byte	0x4
+	.byte	0x5
+	.ascii	"int\000"
+	.uleb128 0x2
+	.byte	0x1
+	.byte	0x6
+	.4byte	.LASF3
+	.uleb128 0x3
+	.4byte	.LASF5
+	.byte	0x7
+	.byte	0xc
+	.4byte	0x37
+	.uleb128 0x2
+	.byte	0x2
+	.byte	0x5
+	.4byte	.LASF6
+	.uleb128 0x3
+	.4byte	.LASF7
+	.byte	0x7
+	.byte	0x12
+	.4byte	0x7b
+	.uleb128 0x2
+	.byte	0x4
+	.byte	0x7
+	.4byte	.LASF8
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x5
+	.4byte	.LASF9
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF10
+	.uleb128 0x6
+	.ascii	"u8\000"
+	.byte	0x7
+	.byte	0x1f
+	.4byte	0x37
+	.uleb128 0x7
+	.4byte	0x90
+	.uleb128 0x6
+	.ascii	"u16\000"
+	.byte	0x7
+	.byte	0x22
+	.4byte	0x25
+	.uleb128 0x6
+	.ascii	"s32\000"
+	.byte	0x7
+	.byte	0x24
+	.4byte	0x50
+	.uleb128 0x6
+	.ascii	"u32\000"
+	.byte	0x7
+	.byte	0x25
+	.4byte	0x7b
+	.uleb128 0x3
+	.4byte	.LASF11
+	.byte	0x7
+	.byte	0x35
+	.4byte	0x3e
+	.uleb128 0x3
+	.4byte	.LASF12
+	.byte	0x7
+	.byte	0x36
+	.4byte	0x3e
+	.uleb128 0x2
+	.byte	0x4
+	.byte	0x7
+	.4byte	.LASF13
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xea
+	.uleb128 0x2
+	.byte	0x1
+	.byte	0x8
+	.4byte	.LASF14
+	.uleb128 0x7
+	.4byte	0xe3
+	.uleb128 0x2
+	.byte	0x4
+	.byte	0x5
+	.4byte	.LASF15
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xe3
+	.uleb128 0x3
+	.4byte	.LASF16
+	.byte	0x8
+	.byte	0x59
+	.4byte	0x25
+	.uleb128 0x3
+	.4byte	.LASF17
+	.byte	0x8
+	.byte	0x5b
+	.4byte	0x3e
+	.uleb128 0x3
+	.4byte	.LASF18
+	.byte	0x8
+	.byte	0x69
+	.4byte	0x5e
+	.uleb128 0x3
+	.4byte	.LASF19
+	.byte	0x8
+	.byte	0x97
+	.4byte	0x70
+	.uleb128 0x9
+	.byte	0x4
+	.uleb128 0x4
+	.4byte	.LASF21
+	.byte	0xa
+	.byte	0xb
+	.4byte	0xf6
+	.uleb128 0x2
+	.byte	0x1
+	.byte	0x2
+	.4byte	.LASF22
+	.uleb128 0xa
+	.4byte	0xe3
+	.4byte	0x147
+	.uleb128 0xb
+	.byte	0
+	.uleb128 0xc
+	.4byte	.LASF23
+	.byte	0xb
+	.2byte	0x140
+	.4byte	0x13c
+	.uleb128 0xc
+	.4byte	.LASF24
+	.byte	0xb
+	.2byte	0x143
+	.4byte	0x13c
+	.uleb128 0xc
+	.4byte	.LASF25
+	.byte	0xb
+	.2byte	0x143
+	.4byte	0x13c
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x171
+	.uleb128 0xd
+	.uleb128 0xa
+	.4byte	0x107
+	.4byte	0x17d
+	.uleb128 0xb
+	.byte	0
+	.uleb128 0x4
+	.4byte	.LASF26
+	.byte	0xc
+	.byte	0x10
+	.4byte	0x172
+	.uleb128 0xa
+	.4byte	0x37
+	.4byte	0x198
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x5
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF29
+	.byte	0x8
+	.byte	0xd
+	.byte	0xf
+	.4byte	0x1bd
+	.uleb128 0x10
+	.4byte	.LASF27
+	.byte	0xd
+	.byte	0x10
+	.4byte	0xf6
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF28
+	.byte	0xd
+	.byte	0x11
+	.4byte	0x1d6
+	.byte	0x4
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x198
+	.uleb128 0x11
+	.4byte	0x50
+	.4byte	0x1d6
+	.uleb128 0x12
+	.4byte	0x50
+	.uleb128 0x12
+	.4byte	0x50
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x1c2
+	.uleb128 0xa
+	.4byte	0x1bd
+	.4byte	0x1e7
+	.uleb128 0xb
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x1dc
+	.uleb128 0x4
+	.4byte	.LASF29
+	.byte	0xd
+	.byte	0xcd
+	.4byte	0x1e7
+	.uleb128 0x13
+	.2byte	0xa0c
+	.byte	0xe
+	.byte	0x13
+	.4byte	0x23e
+	.uleb128 0x10
+	.4byte	.LASF30
+	.byte	0xe
+	.byte	0x14
+	.4byte	0x107
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF31
+	.byte	0xe
+	.byte	0x15
+	.4byte	0xfc
+	.byte	0x4
+	.uleb128 0x10
+	.4byte	.LASF32
+	.byte	0xe
+	.byte	0x16
+	.4byte	0x107
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF33
+	.byte	0xe
+	.byte	0x17
+	.4byte	0x23e
+	.byte	0xc
+	.uleb128 0x14
+	.4byte	.LASF34
+	.byte	0xe
+	.byte	0x18
+	.4byte	0x24f
+	.2byte	0x80c
+	.byte	0
+	.uleb128 0xa
+	.4byte	0x107
+	.4byte	0x24f
+	.uleb128 0x15
+	.4byte	0xd6
+	.2byte	0x1ff
+	.byte	0
+	.uleb128 0xa
+	.4byte	0x2c
+	.4byte	0x260
+	.uleb128 0x15
+	.4byte	0xd6
+	.2byte	0x1ff
+	.byte	0
+	.uleb128 0x3
+	.4byte	.LASF35
+	.byte	0xe
+	.byte	0x32
+	.4byte	0x1f7
+	.uleb128 0xa
+	.4byte	0x260
+	.4byte	0x276
+	.uleb128 0xb
+	.byte	0
+	.uleb128 0x4
+	.4byte	.LASF36
+	.byte	0xe
+	.byte	0x34
+	.4byte	0x26b
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x4
+	.4byte	.LASF37
+	.uleb128 0xf
+	.4byte	.LASF38
+	.byte	0x8
+	.byte	0xf
+	.byte	0x10
+	.4byte	0x2ad
+	.uleb128 0x10
+	.4byte	.LASF39
+	.byte	0xf
+	.byte	0x11
+	.4byte	0xc0
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF30
+	.byte	0xf
+	.byte	0x12
+	.4byte	0xcb
+	.byte	0x4
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF40
+	.byte	0x50
+	.byte	0xf
+	.byte	0x15
+	.4byte	0x2de
+	.uleb128 0x16
+	.ascii	"cnt\000"
+	.byte	0xf
+	.byte	0x16
+	.4byte	0x3e
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF30
+	.byte	0xf
+	.byte	0x17
+	.4byte	0xcb
+	.byte	0x4
+	.uleb128 0x10
+	.4byte	.LASF41
+	.byte	0xf
+	.byte	0x18
+	.4byte	0x2de
+	.byte	0x8
+	.byte	0
+	.uleb128 0xa
+	.4byte	0x288
+	.4byte	0x2ee
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x8
+	.byte	0
+	.uleb128 0x17
+	.ascii	"lmb\000"
+	.byte	0xa0
+	.byte	0xf
+	.byte	0x1b
+	.4byte	0x313
+	.uleb128 0x10
+	.4byte	.LASF42
+	.byte	0xf
+	.byte	0x1c
+	.4byte	0x2ad
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF43
+	.byte	0xf
+	.byte	0x1d
+	.4byte	0x2ad
+	.byte	0x50
+	.byte	0
+	.uleb128 0x18
+	.ascii	"lmb\000"
+	.byte	0xf
+	.byte	0x20
+	.4byte	0x2ee
+	.uleb128 0x19
+	.byte	0x8
+	.byte	0x10
+	.byte	0x5a
+	.4byte	0x33f
+	.uleb128 0x10
+	.4byte	.LASF33
+	.byte	0x10
+	.byte	0x5b
+	.4byte	0xc0
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF30
+	.byte	0x10
+	.byte	0x5c
+	.4byte	0xcb
+	.byte	0x4
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF44
+	.byte	0x58
+	.byte	0x10
+	.byte	0x1b
+	.4byte	0x430
+	.uleb128 0x10
+	.4byte	.LASF45
+	.byte	0x10
+	.byte	0x1c
+	.4byte	0x3e
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF46
+	.byte	0x10
+	.byte	0x1d
+	.4byte	0xcb
+	.byte	0x4
+	.uleb128 0x10
+	.4byte	.LASF47
+	.byte	0x10
+	.byte	0x1e
+	.4byte	0x3e
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF48
+	.byte	0x10
+	.byte	0x1f
+	.4byte	0x3e
+	.byte	0xc
+	.uleb128 0x10
+	.4byte	.LASF49
+	.byte	0x10
+	.byte	0x20
+	.4byte	0x3e
+	.byte	0x10
+	.uleb128 0x10
+	.4byte	.LASF50
+	.byte	0x10
+	.byte	0x21
+	.4byte	0x3e
+	.byte	0x14
+	.uleb128 0x10
+	.4byte	.LASF51
+	.byte	0x10
+	.byte	0x22
+	.4byte	0x3e
+	.byte	0x18
+	.uleb128 0x10
+	.4byte	.LASF52
+	.byte	0x10
+	.byte	0x24
+	.4byte	0x3e
+	.byte	0x1c
+	.uleb128 0x10
+	.4byte	.LASF53
+	.byte	0x10
+	.byte	0x25
+	.4byte	0x3e
+	.byte	0x20
+	.uleb128 0x10
+	.4byte	.LASF54
+	.byte	0x10
+	.byte	0x26
+	.4byte	0x3e
+	.byte	0x24
+	.uleb128 0x10
+	.4byte	.LASF55
+	.byte	0x10
+	.byte	0x31
+	.4byte	0x3e
+	.byte	0x28
+	.uleb128 0x10
+	.4byte	.LASF56
+	.byte	0x10
+	.byte	0x32
+	.4byte	0x3e
+	.byte	0x2c
+	.uleb128 0x10
+	.4byte	.LASF57
+	.byte	0x10
+	.byte	0x33
+	.4byte	0x188
+	.byte	0x30
+	.uleb128 0x10
+	.4byte	.LASF58
+	.byte	0x10
+	.byte	0x34
+	.4byte	0x25
+	.byte	0x36
+	.uleb128 0x10
+	.4byte	.LASF59
+	.byte	0x10
+	.byte	0x35
+	.4byte	0x3e
+	.byte	0x38
+	.uleb128 0x10
+	.4byte	.LASF60
+	.byte	0x10
+	.byte	0x36
+	.4byte	0x3e
+	.byte	0x3c
+	.uleb128 0x10
+	.4byte	.LASF61
+	.byte	0x10
+	.byte	0x57
+	.4byte	0x107
+	.byte	0x40
+	.uleb128 0x10
+	.4byte	.LASF62
+	.byte	0x10
+	.byte	0x58
+	.4byte	0x107
+	.byte	0x44
+	.uleb128 0x10
+	.4byte	.LASF63
+	.byte	0x10
+	.byte	0x5d
+	.4byte	0x430
+	.byte	0x48
+	.byte	0
+	.uleb128 0xa
+	.4byte	0x31e
+	.4byte	0x440
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x1
+	.byte	0
+	.uleb128 0x3
+	.4byte	.LASF64
+	.byte	0x10
+	.byte	0x5f
+	.4byte	0x33f
+	.uleb128 0x4
+	.4byte	.LASF65
+	.byte	0x11
+	.byte	0x13
+	.4byte	0x107
+	.uleb128 0x4
+	.4byte	.LASF66
+	.byte	0x11
+	.byte	0x14
+	.4byte	0x107
+	.uleb128 0x4
+	.4byte	.LASF67
+	.byte	0x11
+	.byte	0x15
+	.4byte	0x107
+	.uleb128 0x4
+	.4byte	.LASF68
+	.byte	0x11
+	.byte	0x16
+	.4byte	0x107
+	.uleb128 0x4
+	.4byte	.LASF69
+	.byte	0x11
+	.byte	0x17
+	.4byte	0x107
+	.uleb128 0x4
+	.4byte	.LASF70
+	.byte	0x11
+	.byte	0x18
+	.4byte	0x107
+	.uleb128 0x4
+	.4byte	.LASF71
+	.byte	0x11
+	.byte	0x19
+	.4byte	0x107
+	.uleb128 0xf
+	.4byte	.LASF72
+	.byte	0x28
+	.byte	0x12
+	.byte	0x39
+	.4byte	0x51d
+	.uleb128 0x10
+	.4byte	.LASF73
+	.byte	0x12
+	.byte	0x3a
+	.4byte	0x52e
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF74
+	.byte	0x12
+	.byte	0x3b
+	.4byte	0x52e
+	.byte	0x4
+	.uleb128 0x10
+	.4byte	.LASF75
+	.byte	0x12
+	.byte	0x3c
+	.4byte	0x52e
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF76
+	.byte	0x12
+	.byte	0x3d
+	.4byte	0x52e
+	.byte	0xc
+	.uleb128 0x10
+	.4byte	.LASF77
+	.byte	0x12
+	.byte	0x3e
+	.4byte	0x52e
+	.byte	0x10
+	.uleb128 0x10
+	.4byte	.LASF78
+	.byte	0x12
+	.byte	0x3f
+	.4byte	0x52e
+	.byte	0x14
+	.uleb128 0x10
+	.4byte	.LASF79
+	.byte	0x12
+	.byte	0x40
+	.4byte	0x52e
+	.byte	0x18
+	.uleb128 0x10
+	.4byte	.LASF80
+	.byte	0x12
+	.byte	0x43
+	.4byte	0x52e
+	.byte	0x1c
+	.uleb128 0x10
+	.4byte	.LASF81
+	.byte	0x12
+	.byte	0x46
+	.4byte	0x52e
+	.byte	0x20
+	.uleb128 0x10
+	.4byte	.LASF82
+	.byte	0x12
+	.byte	0x49
+	.4byte	0x52e
+	.byte	0x24
+	.byte	0
+	.uleb128 0x4
+	.4byte	.LASF83
+	.byte	0x13
+	.byte	0xf
+	.4byte	0x528
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x498
+	.uleb128 0x3
+	.4byte	.LASF84
+	.byte	0x13
+	.byte	0x12
+	.4byte	0x11d
+	.uleb128 0x1a
+	.4byte	.LASF85
+	.byte	0x40
+	.byte	0x14
+	.2byte	0x133
+	.4byte	0x5e3
+	.uleb128 0x1b
+	.4byte	.LASF86
+	.byte	0x14
+	.2byte	0x134
+	.4byte	0x11d
+	.byte	0
+	.uleb128 0x1b
+	.4byte	.LASF87
+	.byte	0x14
+	.2byte	0x135
+	.4byte	0x11d
+	.byte	0x4
+	.uleb128 0x1b
+	.4byte	.LASF88
+	.byte	0x14
+	.2byte	0x136
+	.4byte	0x11d
+	.byte	0x8
+	.uleb128 0x1b
+	.4byte	.LASF89
+	.byte	0x14
+	.2byte	0x137
+	.4byte	0x11d
+	.byte	0xc
+	.uleb128 0x1b
+	.4byte	.LASF90
+	.byte	0x14
+	.2byte	0x138
+	.4byte	0x11d
+	.byte	0x10
+	.uleb128 0x1b
+	.4byte	.LASF91
+	.byte	0x14
+	.2byte	0x139
+	.4byte	0x11d
+	.byte	0x14
+	.uleb128 0x1b
+	.4byte	.LASF92
+	.byte	0x14
+	.2byte	0x13a
+	.4byte	0x11d
+	.byte	0x18
+	.uleb128 0x1b
+	.4byte	.LASF93
+	.byte	0x14
+	.2byte	0x13b
+	.4byte	0x112
+	.byte	0x1c
+	.uleb128 0x1b
+	.4byte	.LASF94
+	.byte	0x14
+	.2byte	0x13c
+	.4byte	0x112
+	.byte	0x1d
+	.uleb128 0x1b
+	.4byte	.LASF95
+	.byte	0x14
+	.2byte	0x13d
+	.4byte	0x112
+	.byte	0x1e
+	.uleb128 0x1b
+	.4byte	.LASF96
+	.byte	0x14
+	.2byte	0x13e
+	.4byte	0x112
+	.byte	0x1f
+	.uleb128 0x1b
+	.4byte	.LASF97
+	.byte	0x14
+	.2byte	0x13f
+	.4byte	0x5e3
+	.byte	0x20
+	.byte	0
+	.uleb128 0xa
+	.4byte	0x112
+	.4byte	0x5f3
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x1c
+	.4byte	.LASF98
+	.byte	0x14
+	.2byte	0x140
+	.4byte	0x539
+	.uleb128 0x1a
+	.4byte	.LASF99
+	.byte	0x18
+	.byte	0x14
+	.2byte	0x142
+	.4byte	0x681
+	.uleb128 0x1b
+	.4byte	.LASF33
+	.byte	0x14
+	.2byte	0x143
+	.4byte	0x107
+	.byte	0
+	.uleb128 0x1d
+	.ascii	"end\000"
+	.byte	0x14
+	.2byte	0x143
+	.4byte	0x107
+	.byte	0x4
+	.uleb128 0x1b
+	.4byte	.LASF100
+	.byte	0x14
+	.2byte	0x144
+	.4byte	0x107
+	.byte	0x8
+	.uleb128 0x1b
+	.4byte	.LASF101
+	.byte	0x14
+	.2byte	0x144
+	.4byte	0x107
+	.byte	0xc
+	.uleb128 0x1b
+	.4byte	.LASF102
+	.byte	0x14
+	.2byte	0x145
+	.4byte	0x107
+	.byte	0x10
+	.uleb128 0x1b
+	.4byte	.LASF103
+	.byte	0x14
+	.2byte	0x146
+	.4byte	0x112
+	.byte	0x14
+	.uleb128 0x1b
+	.4byte	.LASF104
+	.byte	0x14
+	.2byte	0x146
+	.4byte	0x112
+	.byte	0x15
+	.uleb128 0x1d
+	.ascii	"os\000"
+	.byte	0x14
+	.2byte	0x146
+	.4byte	0x112
+	.byte	0x16
+	.uleb128 0x1b
+	.4byte	.LASF105
+	.byte	0x14
+	.2byte	0x147
+	.4byte	0x112
+	.byte	0x17
+	.byte	0
+	.uleb128 0x1c
+	.4byte	.LASF106
+	.byte	0x14
+	.2byte	0x148
+	.4byte	0x5ff
+	.uleb128 0x1e
+	.4byte	.LASF107
+	.2byte	0x164
+	.byte	0x14
+	.2byte	0x14e
+	.4byte	0x820
+	.uleb128 0x1b
+	.4byte	.LASF108
+	.byte	0x14
+	.2byte	0x154
+	.4byte	0x820
+	.byte	0
+	.uleb128 0x1b
+	.4byte	.LASF109
+	.byte	0x14
+	.2byte	0x155
+	.4byte	0x5f3
+	.byte	0x4
+	.uleb128 0x1b
+	.4byte	.LASF110
+	.byte	0x14
+	.2byte	0x156
+	.4byte	0x107
+	.byte	0x44
+	.uleb128 0x1b
+	.4byte	.LASF111
+	.byte	0x14
+	.2byte	0x159
+	.4byte	0xdd
+	.byte	0x48
+	.uleb128 0x1b
+	.4byte	.LASF112
+	.byte	0x14
+	.2byte	0x15b
+	.4byte	0x128
+	.byte	0x4c
+	.uleb128 0x1b
+	.4byte	.LASF113
+	.byte	0x14
+	.2byte	0x15c
+	.4byte	0xdd
+	.byte	0x50
+	.uleb128 0x1b
+	.4byte	.LASF114
+	.byte	0x14
+	.2byte	0x15d
+	.4byte	0x50
+	.byte	0x54
+	.uleb128 0x1b
+	.4byte	.LASF115
+	.byte	0x14
+	.2byte	0x15f
+	.4byte	0x128
+	.byte	0x58
+	.uleb128 0x1b
+	.4byte	.LASF116
+	.byte	0x14
+	.2byte	0x160
+	.4byte	0xdd
+	.byte	0x5c
+	.uleb128 0x1b
+	.4byte	.LASF117
+	.byte	0x14
+	.2byte	0x161
+	.4byte	0x50
+	.byte	0x60
+	.uleb128 0x1b
+	.4byte	.LASF118
+	.byte	0x14
+	.2byte	0x163
+	.4byte	0x128
+	.byte	0x64
+	.uleb128 0x1b
+	.4byte	.LASF119
+	.byte	0x14
+	.2byte	0x164
+	.4byte	0xdd
+	.byte	0x68
+	.uleb128 0x1b
+	.4byte	.LASF120
+	.byte	0x14
+	.2byte	0x165
+	.4byte	0x50
+	.byte	0x6c
+	.uleb128 0x1b
+	.4byte	.LASF121
+	.byte	0x14
+	.2byte	0x167
+	.4byte	0x128
+	.byte	0x70
+	.uleb128 0x1b
+	.4byte	.LASF122
+	.byte	0x14
+	.2byte	0x168
+	.4byte	0xdd
+	.byte	0x74
+	.uleb128 0x1b
+	.4byte	.LASF123
+	.byte	0x14
+	.2byte	0x169
+	.4byte	0x50
+	.byte	0x78
+	.uleb128 0x1d
+	.ascii	"os\000"
+	.byte	0x14
+	.2byte	0x16d
+	.4byte	0x681
+	.byte	0x7c
+	.uleb128 0x1d
+	.ascii	"ep\000"
+	.byte	0x14
+	.2byte	0x16e
+	.4byte	0x107
+	.byte	0x94
+	.uleb128 0x1b
+	.4byte	.LASF124
+	.byte	0x14
+	.2byte	0x170
+	.4byte	0x107
+	.byte	0x98
+	.uleb128 0x1b
+	.4byte	.LASF125
+	.byte	0x14
+	.2byte	0x170
+	.4byte	0x107
+	.byte	0x9c
+	.uleb128 0x1b
+	.4byte	.LASF126
+	.byte	0x14
+	.2byte	0x172
+	.4byte	0xf6
+	.byte	0xa0
+	.uleb128 0x1b
+	.4byte	.LASF127
+	.byte	0x14
+	.2byte	0x173
+	.4byte	0x107
+	.byte	0xa4
+	.uleb128 0x1b
+	.4byte	.LASF128
+	.byte	0x14
+	.2byte	0x175
+	.4byte	0x107
+	.byte	0xa8
+	.uleb128 0x1b
+	.4byte	.LASF129
+	.byte	0x14
+	.2byte	0x176
+	.4byte	0x107
+	.byte	0xac
+	.uleb128 0x1b
+	.4byte	.LASF130
+	.byte	0x14
+	.2byte	0x177
+	.4byte	0x107
+	.byte	0xb0
+	.uleb128 0x1b
+	.4byte	.LASF131
+	.byte	0x14
+	.2byte	0x178
+	.4byte	0x107
+	.byte	0xb4
+	.uleb128 0x1d
+	.ascii	"kbd\000"
+	.byte	0x14
+	.2byte	0x179
+	.4byte	0x826
+	.byte	0xb8
+	.uleb128 0x1b
+	.4byte	.LASF132
+	.byte	0x14
+	.2byte	0x17c
+	.4byte	0x50
+	.byte	0xbc
+	.uleb128 0x1b
+	.4byte	.LASF133
+	.byte	0x14
+	.2byte	0x189
+	.4byte	0x50
+	.byte	0xc0
+	.uleb128 0x1d
+	.ascii	"lmb\000"
+	.byte	0x14
+	.2byte	0x18c
+	.4byte	0x2ee
+	.byte	0xc4
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x5f3
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x440
+	.uleb128 0x1c
+	.4byte	.LASF134
+	.byte	0x14
+	.2byte	0x18e
+	.4byte	0x68d
+	.uleb128 0xc
+	.4byte	.LASF135
+	.byte	0x14
+	.2byte	0x190
+	.4byte	0x82c
+	.uleb128 0x1f
+	.4byte	.LASF263
+	.byte	0x4
+	.4byte	0x50
+	.byte	0x16
+	.byte	0xe
+	.4byte	0xa41
+	.uleb128 0x20
+	.4byte	.LASF136
+	.byte	0
+	.uleb128 0x20
+	.4byte	.LASF137
+	.byte	0x1
+	.uleb128 0x20
+	.4byte	.LASF138
+	.byte	0x2
+	.uleb128 0x20
+	.4byte	.LASF139
+	.byte	0x3
+	.uleb128 0x20
+	.4byte	.LASF140
+	.byte	0x4
+	.uleb128 0x20
+	.4byte	.LASF141
+	.byte	0x5
+	.uleb128 0x20
+	.4byte	.LASF142
+	.byte	0x6
+	.uleb128 0x20
+	.4byte	.LASF143
+	.byte	0x7
+	.uleb128 0x20
+	.4byte	.LASF144
+	.byte	0x8
+	.uleb128 0x20
+	.4byte	.LASF145
+	.byte	0x9
+	.uleb128 0x20
+	.4byte	.LASF146
+	.byte	0xa
+	.uleb128 0x20
+	.4byte	.LASF147
+	.byte	0xb
+	.uleb128 0x20
+	.4byte	.LASF148
+	.byte	0xc
+	.uleb128 0x20
+	.4byte	.LASF149
+	.byte	0xd
+	.uleb128 0x20
+	.4byte	.LASF150
+	.byte	0xe
+	.uleb128 0x20
+	.4byte	.LASF151
+	.byte	0xf
+	.uleb128 0x20
+	.4byte	.LASF152
+	.byte	0x10
+	.uleb128 0x20
+	.4byte	.LASF153
+	.byte	0x11
+	.uleb128 0x20
+	.4byte	.LASF154
+	.byte	0x12
+	.uleb128 0x20
+	.4byte	.LASF155
+	.byte	0x13
+	.uleb128 0x20
+	.4byte	.LASF156
+	.byte	0x14
+	.uleb128 0x20
+	.4byte	.LASF157
+	.byte	0x15
+	.uleb128 0x20
+	.4byte	.LASF158
+	.byte	0x16
+	.uleb128 0x20
+	.4byte	.LASF159
+	.byte	0x17
+	.uleb128 0x20
+	.4byte	.LASF160
+	.byte	0x18
+	.uleb128 0x20
+	.4byte	.LASF161
+	.byte	0x19
+	.uleb128 0x20
+	.4byte	.LASF162
+	.byte	0x1a
+	.uleb128 0x20
+	.4byte	.LASF163
+	.byte	0x1b
+	.uleb128 0x20
+	.4byte	.LASF164
+	.byte	0x1c
+	.uleb128 0x20
+	.4byte	.LASF165
+	.byte	0x1d
+	.uleb128 0x20
+	.4byte	.LASF166
+	.byte	0x1e
+	.uleb128 0x20
+	.4byte	.LASF167
+	.byte	0x1f
+	.uleb128 0x20
+	.4byte	.LASF168
+	.byte	0x20
+	.uleb128 0x20
+	.4byte	.LASF169
+	.byte	0x21
+	.uleb128 0x20
+	.4byte	.LASF170
+	.byte	0x22
+	.uleb128 0x20
+	.4byte	.LASF171
+	.byte	0x23
+	.uleb128 0x20
+	.4byte	.LASF172
+	.byte	0x24
+	.uleb128 0x20
+	.4byte	.LASF173
+	.byte	0x25
+	.uleb128 0x20
+	.4byte	.LASF174
+	.byte	0x26
+	.uleb128 0x20
+	.4byte	.LASF175
+	.byte	0x27
+	.uleb128 0x20
+	.4byte	.LASF176
+	.byte	0x28
+	.uleb128 0x20
+	.4byte	.LASF177
+	.byte	0x29
+	.uleb128 0x20
+	.4byte	.LASF178
+	.byte	0x2a
+	.uleb128 0x20
+	.4byte	.LASF179
+	.byte	0x2b
+	.uleb128 0x20
+	.4byte	.LASF180
+	.byte	0x2c
+	.uleb128 0x20
+	.4byte	.LASF181
+	.byte	0x2d
+	.uleb128 0x20
+	.4byte	.LASF182
+	.byte	0x2e
+	.uleb128 0x20
+	.4byte	.LASF183
+	.byte	0x2f
+	.uleb128 0x20
+	.4byte	.LASF184
+	.byte	0x30
+	.uleb128 0x20
+	.4byte	.LASF185
+	.byte	0x31
+	.uleb128 0x20
+	.4byte	.LASF186
+	.byte	0x32
+	.uleb128 0x20
+	.4byte	.LASF187
+	.byte	0x33
+	.uleb128 0x20
+	.4byte	.LASF188
+	.byte	0x34
+	.uleb128 0x20
+	.4byte	.LASF189
+	.byte	0x35
+	.uleb128 0x20
+	.4byte	.LASF190
+	.byte	0x36
+	.uleb128 0x20
+	.4byte	.LASF191
+	.byte	0x37
+	.uleb128 0x20
+	.4byte	.LASF192
+	.byte	0x38
+	.uleb128 0x20
+	.4byte	.LASF193
+	.byte	0x39
+	.uleb128 0x20
+	.4byte	.LASF194
+	.byte	0x3a
+	.uleb128 0x20
+	.4byte	.LASF195
+	.byte	0x3b
+	.uleb128 0x20
+	.4byte	.LASF196
+	.byte	0x3c
+	.uleb128 0x20
+	.4byte	.LASF197
+	.byte	0x3d
+	.uleb128 0x20
+	.4byte	.LASF198
+	.byte	0x3e
+	.uleb128 0x20
+	.4byte	.LASF199
+	.byte	0x3f
+	.uleb128 0x20
+	.4byte	.LASF200
+	.byte	0x40
+	.uleb128 0x20
+	.4byte	.LASF201
+	.byte	0x41
+	.uleb128 0x20
+	.4byte	.LASF202
+	.byte	0x42
+	.uleb128 0x20
+	.4byte	.LASF203
+	.byte	0x43
+	.uleb128 0x20
+	.4byte	.LASF204
+	.byte	0x44
+	.uleb128 0x20
+	.4byte	.LASF205
+	.byte	0x45
+	.uleb128 0x20
+	.4byte	.LASF206
+	.byte	0x46
+	.uleb128 0x20
+	.4byte	.LASF207
+	.byte	0x47
+	.uleb128 0x20
+	.4byte	.LASF208
+	.byte	0x48
+	.uleb128 0x20
+	.4byte	.LASF209
+	.byte	0x49
+	.uleb128 0x20
+	.4byte	.LASF210
+	.byte	0x4a
+	.uleb128 0x20
+	.4byte	.LASF211
+	.byte	0x4b
+	.uleb128 0x20
+	.4byte	.LASF212
+	.byte	0x4c
+	.uleb128 0x20
+	.4byte	.LASF213
+	.byte	0x4d
+	.uleb128 0x20
+	.4byte	.LASF214
+	.byte	0x4e
+	.uleb128 0x20
+	.4byte	.LASF215
+	.byte	0x4f
+	.uleb128 0x20
+	.4byte	.LASF216
+	.byte	0x50
+	.uleb128 0x21
+	.4byte	.LASF217
+	.sleb128 -1
+	.byte	0
+	.uleb128 0x22
+	.byte	0x4
+	.4byte	0x7b
+	.byte	0x1f
+	.byte	0xe0
+	.4byte	0xa54
+	.uleb128 0x20
+	.4byte	.LASF218
+	.byte	0x5
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xe3
+	.4byte	0xa64
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x4
+	.4byte	.LASF219
+	.byte	0x6
+	.byte	0xa6
+	.4byte	0x107
+	.uleb128 0xa
+	.4byte	0x90
+	.4byte	0xa7a
+	.uleb128 0xb
+	.byte	0
+	.uleb128 0x4
+	.4byte	.LASF220
+	.byte	0x6
+	.byte	0xa8
+	.4byte	0xa6f
+	.uleb128 0x4
+	.4byte	.LASF221
+	.byte	0x6
+	.byte	0xa9
+	.4byte	0xa6f
+	.uleb128 0x4
+	.4byte	.LASF222
+	.byte	0x6
+	.byte	0xf7
+	.4byte	0x107
+	.uleb128 0x4
+	.4byte	.LASF223
+	.byte	0x6
+	.byte	0xf8
+	.4byte	0x107
+	.uleb128 0x4
+	.4byte	.LASF224
+	.byte	0x6
+	.byte	0xf9
+	.4byte	0x107
+	.uleb128 0xf
+	.4byte	.LASF225
+	.byte	0x4
+	.byte	0x15
+	.byte	0x2e
+	.4byte	0xaca
+	.uleb128 0x10
+	.4byte	.LASF226
+	.byte	0x15
+	.byte	0x2f
+	.4byte	0x11d
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x2c
+	.uleb128 0xf
+	.4byte	.LASF227
+	.byte	0x40
+	.byte	0x15
+	.byte	0xa6
+	.4byte	0xb6d
+	.uleb128 0x10
+	.4byte	.LASF27
+	.byte	0x15
+	.byte	0xa8
+	.4byte	0xb6d
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF228
+	.byte	0x15
+	.byte	0xa9
+	.4byte	0x188
+	.byte	0x10
+	.uleb128 0x10
+	.4byte	.LASF229
+	.byte	0x15
+	.byte	0xaa
+	.4byte	0xc0
+	.byte	0x18
+	.uleb128 0x10
+	.4byte	.LASF133
+	.byte	0x15
+	.byte	0xab
+	.4byte	0x50
+	.byte	0x1c
+	.uleb128 0x10
+	.4byte	.LASF230
+	.byte	0x15
+	.byte	0xad
+	.4byte	0xb97
+	.byte	0x20
+	.uleb128 0x10
+	.4byte	.LASF231
+	.byte	0x15
+	.byte	0xae
+	.4byte	0xbb6
+	.byte	0x24
+	.uleb128 0x10
+	.4byte	.LASF232
+	.byte	0x15
+	.byte	0xaf
+	.4byte	0xbcb
+	.byte	0x28
+	.uleb128 0x10
+	.4byte	.LASF233
+	.byte	0x15
+	.byte	0xb0
+	.4byte	0xbdc
+	.byte	0x2c
+	.uleb128 0x10
+	.4byte	.LASF234
+	.byte	0x15
+	.byte	0xb4
+	.4byte	0xbcb
+	.byte	0x30
+	.uleb128 0x10
+	.4byte	.LASF235
+	.byte	0x15
+	.byte	0xb5
+	.4byte	0xb91
+	.byte	0x34
+	.uleb128 0x10
+	.4byte	.LASF236
+	.byte	0x15
+	.byte	0xb6
+	.4byte	0x50
+	.byte	0x38
+	.uleb128 0x10
+	.4byte	.LASF237
+	.byte	0x15
+	.byte	0xb7
+	.4byte	0x128
+	.byte	0x3c
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xe3
+	.4byte	0xb7d
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0xf
+	.byte	0
+	.uleb128 0x11
+	.4byte	0x50
+	.4byte	0xb91
+	.uleb128 0x12
+	.4byte	0xb91
+	.uleb128 0x12
+	.4byte	0x826
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xad0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xb7d
+	.uleb128 0x11
+	.4byte	0x50
+	.4byte	0xbb6
+	.uleb128 0x12
+	.4byte	0xb91
+	.uleb128 0x12
+	.4byte	0x128
+	.uleb128 0x12
+	.4byte	0x50
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xb9d
+	.uleb128 0x11
+	.4byte	0x50
+	.4byte	0xbcb
+	.uleb128 0x12
+	.4byte	0xb91
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xbbc
+	.uleb128 0x23
+	.4byte	0xbdc
+	.uleb128 0x12
+	.4byte	0xb91
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xbd1
+	.uleb128 0x4
+	.4byte	.LASF238
+	.byte	0x15
+	.byte	0xbd
+	.4byte	0xb91
+	.uleb128 0x23
+	.4byte	0xbfd
+	.uleb128 0x12
+	.4byte	0x128
+	.uleb128 0x12
+	.4byte	0x50
+	.byte	0
+	.uleb128 0xc
+	.4byte	.LASF239
+	.byte	0x15
+	.2byte	0x11e
+	.4byte	0xc09
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xbed
+	.uleb128 0xa
+	.4byte	0x90
+	.4byte	0xc1f
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x5
+	.byte	0
+	.uleb128 0xc
+	.4byte	.LASF240
+	.byte	0x15
+	.2byte	0x1fd
+	.4byte	0xab1
+	.uleb128 0xc
+	.4byte	.LASF241
+	.byte	0x15
+	.2byte	0x1fe
+	.4byte	0xab1
+	.uleb128 0xc
+	.4byte	.LASF242
+	.byte	0x15
+	.2byte	0x200
+	.4byte	0xab1
+	.uleb128 0xc
+	.4byte	.LASF243
+	.byte	0x15
+	.2byte	0x205
+	.4byte	0xa54
+	.uleb128 0xc
+	.4byte	.LASF244
+	.byte	0x15
+	.2byte	0x206
+	.4byte	0xa54
+	.uleb128 0xa
+	.4byte	0xe3
+	.4byte	0xc6b
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x3f
+	.byte	0
+	.uleb128 0xc
+	.4byte	.LASF245
+	.byte	0x15
+	.2byte	0x207
+	.4byte	0xc5b
+	.uleb128 0xc
+	.4byte	.LASF246
+	.byte	0x15
+	.2byte	0x209
+	.4byte	0xc0f
+	.uleb128 0xc
+	.4byte	.LASF247
+	.byte	0x15
+	.2byte	0x20a
+	.4byte	0xc0f
+	.uleb128 0xc
+	.4byte	.LASF248
+	.byte	0x15
+	.2byte	0x20b
+	.4byte	0xab1
+	.uleb128 0xc
+	.4byte	.LASF249
+	.byte	0x15
+	.2byte	0x20c
+	.4byte	0xab1
+	.uleb128 0xc
+	.4byte	.LASF250
+	.byte	0x15
+	.2byte	0x20d
+	.4byte	0xaca
+	.uleb128 0xa
+	.4byte	0xaca
+	.4byte	0xcc3
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x3
+	.byte	0
+	.uleb128 0xc
+	.4byte	.LASF251
+	.byte	0x15
+	.2byte	0x20e
+	.4byte	0xcb3
+	.uleb128 0xc
+	.4byte	.LASF252
+	.byte	0x15
+	.2byte	0x20f
+	.4byte	0xaca
+	.uleb128 0xc
+	.4byte	.LASF253
+	.byte	0x15
+	.2byte	0x210
+	.4byte	0x50
+	.uleb128 0xa
+	.4byte	0x9a
+	.4byte	0xcf7
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x5
+	.byte	0
+	.uleb128 0x7
+	.4byte	0xce7
+	.uleb128 0xc
+	.4byte	.LASF254
+	.byte	0x15
+	.2byte	0x211
+	.4byte	0xcf7
+	.uleb128 0xc
+	.4byte	.LASF255
+	.byte	0x15
+	.2byte	0x212
+	.4byte	0xcf7
+	.uleb128 0xc
+	.4byte	.LASF256
+	.byte	0x15
+	.2byte	0x216
+	.4byte	0xfc
+	.uleb128 0xc
+	.4byte	.LASF257
+	.byte	0x15
+	.2byte	0x217
+	.4byte	0xfc
+	.uleb128 0xc
+	.4byte	.LASF258
+	.byte	0x15
+	.2byte	0x219
+	.4byte	0x50
+	.uleb128 0xa
+	.4byte	0xe3
+	.4byte	0xd49
+	.uleb128 0x15
+	.4byte	0xd6
+	.2byte	0x3ff
+	.byte	0
+	.uleb128 0xc
+	.4byte	.LASF259
+	.byte	0x15
+	.2byte	0x220
+	.4byte	0xd38
+	.uleb128 0xc
+	.4byte	.LASF260
+	.byte	0x15
+	.2byte	0x222
+	.4byte	0xb5
+	.uleb128 0xc
+	.4byte	.LASF261
+	.byte	0x15
+	.2byte	0x224
+	.4byte	0xb5
+	.uleb128 0xc
+	.4byte	.LASF262
+	.byte	0x15
+	.2byte	0x230
+	.4byte	0xab1
+	.uleb128 0x24
+	.4byte	.LASF264
+	.byte	0x4
+	.4byte	0x7b
+	.byte	0x15
+	.2byte	0x286
+	.4byte	0xda3
+	.uleb128 0x20
+	.4byte	.LASF265
+	.byte	0
+	.uleb128 0x20
+	.4byte	.LASF266
+	.byte	0x1
+	.uleb128 0x20
+	.4byte	.LASF267
+	.byte	0x2
+	.uleb128 0x20
+	.4byte	.LASF268
+	.byte	0x3
+	.byte	0
+	.uleb128 0xc
+	.4byte	.LASF269
+	.byte	0x15
+	.2byte	0x28c
+	.4byte	0xd79
+	.uleb128 0x3
+	.4byte	.LASF270
+	.byte	0x17
+	.byte	0x9
+	.4byte	0x37
+	.uleb128 0x3
+	.4byte	.LASF271
+	.byte	0x17
+	.byte	0xa
+	.4byte	0x25
+	.uleb128 0x3
+	.4byte	.LASF272
+	.byte	0x17
+	.byte	0xb
+	.4byte	0x7b
+	.uleb128 0x3
+	.4byte	.LASF273
+	.byte	0x17
+	.byte	0xc
+	.4byte	0x50
+	.uleb128 0x3
+	.4byte	.LASF274
+	.byte	0x17
+	.byte	0xd
+	.4byte	0x69
+	.uleb128 0xf
+	.4byte	.LASF275
+	.byte	0x14
+	.byte	0x18
+	.byte	0x27
+	.4byte	0xe2f
+	.uleb128 0x10
+	.4byte	.LASF276
+	.byte	0x18
+	.byte	0x28
+	.4byte	0xb5
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF277
+	.byte	0x18
+	.byte	0x29
+	.4byte	0xb5
+	.byte	0x4
+	.uleb128 0x10
+	.4byte	.LASF278
+	.byte	0x18
+	.byte	0x2a
+	.4byte	0xe2f
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF279
+	.byte	0x18
+	.byte	0x2b
+	.4byte	0xe2f
+	.byte	0xc
+	.uleb128 0x16
+	.ascii	"lpa\000"
+	.byte	0x18
+	.byte	0x2c
+	.4byte	0xb5
+	.byte	0x10
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xb5
+	.uleb128 0xf
+	.4byte	.LASF280
+	.byte	0x18
+	.byte	0x18
+	.byte	0x2f
+	.4byte	0xed2
+	.uleb128 0x10
+	.4byte	.LASF281
+	.byte	0x18
+	.byte	0x30
+	.4byte	0x9f
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF282
+	.byte	0x18
+	.byte	0x31
+	.4byte	0x9f
+	.byte	0x2
+	.uleb128 0x10
+	.4byte	.LASF283
+	.byte	0x18
+	.byte	0x32
+	.4byte	0x9f
+	.byte	0x4
+	.uleb128 0x10
+	.4byte	.LASF284
+	.byte	0x18
+	.byte	0x33
+	.4byte	0x9f
+	.byte	0x6
+	.uleb128 0x10
+	.4byte	.LASF285
+	.byte	0x18
+	.byte	0x34
+	.4byte	0x9f
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF286
+	.byte	0x18
+	.byte	0x35
+	.4byte	0x9f
+	.byte	0xa
+	.uleb128 0x10
+	.4byte	.LASF287
+	.byte	0x18
+	.byte	0x36
+	.4byte	0x9f
+	.byte	0xc
+	.uleb128 0x10
+	.4byte	.LASF288
+	.byte	0x18
+	.byte	0x37
+	.4byte	0x9f
+	.byte	0xe
+	.uleb128 0x10
+	.4byte	.LASF289
+	.byte	0x18
+	.byte	0x38
+	.4byte	0x9f
+	.byte	0x10
+	.uleb128 0x10
+	.4byte	.LASF290
+	.byte	0x18
+	.byte	0x39
+	.4byte	0x9f
+	.byte	0x12
+	.uleb128 0x10
+	.4byte	.LASF291
+	.byte	0x18
+	.byte	0x3a
+	.4byte	0x9f
+	.byte	0x14
+	.uleb128 0x10
+	.4byte	.LASF292
+	.byte	0x18
+	.byte	0x3b
+	.4byte	0x90
+	.byte	0x16
+	.byte	0
+	.uleb128 0x7
+	.4byte	0xe35
+	.uleb128 0xf
+	.4byte	.LASF293
+	.byte	0x10
+	.byte	0x18
+	.byte	0x3e
+	.4byte	0xf14
+	.uleb128 0x10
+	.4byte	.LASF294
+	.byte	0x18
+	.byte	0x3f
+	.4byte	0xf2e
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF295
+	.byte	0x18
+	.byte	0x40
+	.4byte	0xf48
+	.byte	0x4
+	.uleb128 0x10
+	.4byte	.LASF296
+	.byte	0x18
+	.byte	0x41
+	.4byte	0xf6c
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF297
+	.byte	0x18
+	.byte	0x42
+	.4byte	0xf6c
+	.byte	0xc
+	.byte	0
+	.uleb128 0x11
+	.4byte	0xaa
+	.4byte	0xf28
+	.uleb128 0x12
+	.4byte	0xf28
+	.uleb128 0x12
+	.4byte	0xb5
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x9f
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xf14
+	.uleb128 0x11
+	.4byte	0xb5
+	.4byte	0xf48
+	.uleb128 0x12
+	.4byte	0x90
+	.uleb128 0x12
+	.4byte	0xb5
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xf34
+	.uleb128 0x11
+	.4byte	0xb5
+	.4byte	0xf6c
+	.uleb128 0x12
+	.4byte	0x90
+	.uleb128 0x12
+	.4byte	0xb5
+	.uleb128 0x12
+	.4byte	0xe2f
+	.uleb128 0x12
+	.4byte	0xe2f
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xf4e
+	.uleb128 0xf
+	.4byte	.LASF298
+	.byte	0x3c
+	.byte	0x19
+	.byte	0x2b
+	.4byte	0xfd2
+	.uleb128 0x16
+	.ascii	"id\000"
+	.byte	0x19
+	.byte	0x2d
+	.4byte	0xdba
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF299
+	.byte	0x19
+	.byte	0x2e
+	.4byte	0xdba
+	.byte	0x2
+	.uleb128 0x10
+	.4byte	.LASF300
+	.byte	0x19
+	.byte	0x2f
+	.4byte	0xdba
+	.byte	0x4
+	.uleb128 0x16
+	.ascii	"cnt\000"
+	.byte	0x19
+	.byte	0x30
+	.4byte	0xdba
+	.byte	0x6
+	.uleb128 0x10
+	.4byte	.LASF78
+	.byte	0x19
+	.byte	0x31
+	.4byte	0xdc5
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF301
+	.byte	0x19
+	.byte	0x32
+	.4byte	0xfd2
+	.byte	0xc
+	.uleb128 0x10
+	.4byte	.LASF302
+	.byte	0x19
+	.byte	0x33
+	.4byte	0xfe2
+	.byte	0x1c
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xdba
+	.4byte	0xfe2
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x7
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xff2
+	.4byte	0xff2
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x7
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xdc5
+	.uleb128 0xf
+	.4byte	.LASF303
+	.byte	0xc
+	.byte	0x19
+	.byte	0x3f
+	.4byte	0x1040
+	.uleb128 0x16
+	.ascii	"id\000"
+	.byte	0x19
+	.byte	0x41
+	.4byte	0xdba
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF299
+	.byte	0x19
+	.byte	0x42
+	.4byte	0xdba
+	.byte	0x2
+	.uleb128 0x10
+	.4byte	.LASF300
+	.byte	0x19
+	.byte	0x43
+	.4byte	0xdba
+	.byte	0x4
+	.uleb128 0x10
+	.4byte	.LASF304
+	.byte	0x19
+	.byte	0x44
+	.4byte	0xdba
+	.byte	0x6
+	.uleb128 0x10
+	.4byte	.LASF78
+	.byte	0x19
+	.byte	0x45
+	.4byte	0xdc5
+	.byte	0x8
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF305
+	.byte	0x28
+	.byte	0x19
+	.byte	0x48
+	.4byte	0x10e9
+	.uleb128 0x10
+	.4byte	.LASF236
+	.byte	0x19
+	.byte	0x4a
+	.4byte	0xdba
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF299
+	.byte	0x19
+	.byte	0x4b
+	.4byte	0xdba
+	.byte	0x2
+	.uleb128 0x10
+	.4byte	.LASF306
+	.byte	0x19
+	.byte	0x4d
+	.4byte	0xdba
+	.byte	0x4
+	.uleb128 0x10
+	.4byte	.LASF307
+	.byte	0x19
+	.byte	0x4e
+	.4byte	0xdba
+	.byte	0x6
+	.uleb128 0x10
+	.4byte	.LASF308
+	.byte	0x19
+	.byte	0x50
+	.4byte	0xdba
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF309
+	.byte	0x19
+	.byte	0x51
+	.4byte	0xdba
+	.byte	0xa
+	.uleb128 0x10
+	.4byte	.LASF310
+	.byte	0x19
+	.byte	0x53
+	.4byte	0x10e9
+	.byte	0xc
+	.uleb128 0x10
+	.4byte	.LASF311
+	.byte	0x19
+	.byte	0x54
+	.4byte	0xff2
+	.byte	0x10
+	.uleb128 0x10
+	.4byte	.LASF312
+	.byte	0x19
+	.byte	0x55
+	.4byte	0x10e9
+	.byte	0x14
+	.uleb128 0x10
+	.4byte	.LASF313
+	.byte	0x19
+	.byte	0x56
+	.4byte	0xff2
+	.byte	0x18
+	.uleb128 0x10
+	.4byte	.LASF78
+	.byte	0x19
+	.byte	0x58
+	.4byte	0xdc5
+	.byte	0x1c
+	.uleb128 0x10
+	.4byte	.LASF314
+	.byte	0x19
+	.byte	0x59
+	.4byte	0xdc5
+	.byte	0x20
+	.uleb128 0x10
+	.4byte	.LASF315
+	.byte	0x19
+	.byte	0x5a
+	.4byte	0xdc5
+	.byte	0x24
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xdba
+	.uleb128 0xf
+	.4byte	.LASF316
+	.byte	0xc
+	.byte	0x19
+	.byte	0x5d
+	.4byte	0x112c
+	.uleb128 0x10
+	.4byte	.LASF317
+	.byte	0x19
+	.byte	0x5f
+	.4byte	0xdba
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF43
+	.byte	0x19
+	.byte	0x60
+	.4byte	0xdba
+	.byte	0x2
+	.uleb128 0x16
+	.ascii	"hit\000"
+	.byte	0x19
+	.byte	0x61
+	.4byte	0xdc5
+	.byte	0x4
+	.uleb128 0x10
+	.4byte	.LASF318
+	.byte	0x19
+	.byte	0x62
+	.4byte	0xff2
+	.byte	0x8
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF319
+	.byte	0x24
+	.byte	0x19
+	.byte	0x65
+	.4byte	0x1199
+	.uleb128 0x10
+	.4byte	.LASF306
+	.byte	0x19
+	.byte	0x67
+	.4byte	0xdc5
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF320
+	.byte	0x19
+	.byte	0x68
+	.4byte	0xdc5
+	.byte	0x4
+	.uleb128 0x10
+	.4byte	.LASF78
+	.byte	0x19
+	.byte	0x69
+	.4byte	0xdc5
+	.byte	0x8
+	.uleb128 0x16
+	.ascii	"len\000"
+	.byte	0x19
+	.byte	0x6a
+	.4byte	0xdc5
+	.byte	0xc
+	.uleb128 0x10
+	.4byte	.LASF321
+	.byte	0x19
+	.byte	0x6b
+	.4byte	0xdc5
+	.byte	0x10
+	.uleb128 0x10
+	.4byte	.LASF322
+	.byte	0x19
+	.byte	0x6c
+	.4byte	0xdc5
+	.byte	0x14
+	.uleb128 0x10
+	.4byte	.LASF323
+	.byte	0x19
+	.byte	0x6d
+	.4byte	0x1199
+	.byte	0x18
+	.uleb128 0x16
+	.ascii	"tbl\000"
+	.byte	0x19
+	.byte	0x6e
+	.4byte	0x11a9
+	.byte	0x20
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xdc5
+	.4byte	0x11a9
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x1
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xdba
+	.4byte	0x11b9
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x1
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF324
+	.byte	0x10
+	.byte	0x19
+	.byte	0x72
+	.4byte	0x1219
+	.uleb128 0x10
+	.4byte	.LASF306
+	.byte	0x19
+	.byte	0x74
+	.4byte	0xdba
+	.byte	0
+	.uleb128 0x16
+	.ascii	"id\000"
+	.byte	0x19
+	.byte	0x75
+	.4byte	0xdba
+	.byte	0x2
+	.uleb128 0x10
+	.4byte	.LASF78
+	.byte	0x19
+	.byte	0x76
+	.4byte	0xdc5
+	.byte	0x4
+	.uleb128 0x10
+	.4byte	.LASF300
+	.byte	0x19
+	.byte	0x77
+	.4byte	0xdba
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF325
+	.byte	0x19
+	.byte	0x78
+	.4byte	0xdba
+	.byte	0xa
+	.uleb128 0x10
+	.4byte	.LASF326
+	.byte	0x19
+	.byte	0x79
+	.4byte	0xdba
+	.byte	0xc
+	.uleb128 0x10
+	.4byte	.LASF323
+	.byte	0x19
+	.byte	0x7a
+	.4byte	0x1219
+	.byte	0xe
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xdaf
+	.4byte	0x1229
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x1
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF327
+	.byte	0x10
+	.byte	0x19
+	.byte	0x7d
+	.4byte	0x1271
+	.uleb128 0x10
+	.4byte	.LASF306
+	.byte	0x19
+	.byte	0x7f
+	.4byte	0xdba
+	.byte	0
+	.uleb128 0x16
+	.ascii	"id\000"
+	.byte	0x19
+	.byte	0x80
+	.4byte	0xdba
+	.byte	0x2
+	.uleb128 0x10
+	.4byte	.LASF78
+	.byte	0x19
+	.byte	0x81
+	.4byte	0xdc5
+	.byte	0x4
+	.uleb128 0x16
+	.ascii	"lpa\000"
+	.byte	0x19
+	.byte	0x82
+	.4byte	0xdc5
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF328
+	.byte	0x19
+	.byte	0x83
+	.4byte	0xdc5
+	.byte	0xc
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF329
+	.byte	0x10
+	.byte	0x19
+	.byte	0x8f
+	.4byte	0x12b9
+	.uleb128 0x10
+	.4byte	.LASF306
+	.byte	0x19
+	.byte	0x91
+	.4byte	0xdba
+	.byte	0
+	.uleb128 0x16
+	.ascii	"id\000"
+	.byte	0x19
+	.byte	0x92
+	.4byte	0xdba
+	.byte	0x2
+	.uleb128 0x10
+	.4byte	.LASF78
+	.byte	0x19
+	.byte	0x93
+	.4byte	0xdc5
+	.byte	0x4
+	.uleb128 0x10
+	.4byte	.LASF330
+	.byte	0x19
+	.byte	0x94
+	.4byte	0xdba
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF323
+	.byte	0x19
+	.byte	0x95
+	.4byte	0x12b9
+	.byte	0xa
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xdaf
+	.4byte	0x12c9
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x5
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF331
+	.byte	0x10
+	.byte	0x19
+	.byte	0x98
+	.4byte	0x1311
+	.uleb128 0x10
+	.4byte	.LASF306
+	.byte	0x19
+	.byte	0x9a
+	.4byte	0xdba
+	.byte	0
+	.uleb128 0x16
+	.ascii	"id\000"
+	.byte	0x19
+	.byte	0x9b
+	.4byte	0xdba
+	.byte	0x2
+	.uleb128 0x10
+	.4byte	.LASF78
+	.byte	0x19
+	.byte	0x9c
+	.4byte	0xdc5
+	.byte	0x4
+	.uleb128 0x10
+	.4byte	.LASF332
+	.byte	0x19
+	.byte	0x9d
+	.4byte	0xdc5
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF333
+	.byte	0x19
+	.byte	0x9e
+	.4byte	0xdc5
+	.byte	0xc
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF334
+	.byte	0x30
+	.byte	0x19
+	.byte	0xa1
+	.4byte	0x140e
+	.uleb128 0x16
+	.ascii	"tag\000"
+	.byte	0x19
+	.byte	0xa3
+	.4byte	0xdc5
+	.byte	0
+	.uleb128 0x16
+	.ascii	"ver\000"
+	.byte	0x19
+	.byte	0xa4
+	.4byte	0xdc5
+	.byte	0x4
+	.uleb128 0x10
+	.4byte	.LASF304
+	.byte	0x19
+	.byte	0xa6
+	.4byte	0xdba
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF335
+	.byte	0x19
+	.byte	0xa7
+	.4byte	0xdaf
+	.byte	0xa
+	.uleb128 0x10
+	.4byte	.LASF336
+	.byte	0x19
+	.byte	0xa8
+	.4byte	0xdaf
+	.byte	0xb
+	.uleb128 0x10
+	.4byte	.LASF337
+	.byte	0x19
+	.byte	0xa9
+	.4byte	0xdaf
+	.byte	0xc
+	.uleb128 0x10
+	.4byte	.LASF338
+	.byte	0x19
+	.byte	0xaa
+	.4byte	0xdaf
+	.byte	0xd
+	.uleb128 0x10
+	.4byte	.LASF339
+	.byte	0x19
+	.byte	0xab
+	.4byte	0xdba
+	.byte	0xe
+	.uleb128 0x10
+	.4byte	.LASF340
+	.byte	0x19
+	.byte	0xad
+	.4byte	0xdba
+	.byte	0x10
+	.uleb128 0x10
+	.4byte	.LASF341
+	.byte	0x19
+	.byte	0xae
+	.4byte	0xdba
+	.byte	0x12
+	.uleb128 0x10
+	.4byte	.LASF342
+	.byte	0x19
+	.byte	0xaf
+	.4byte	0xdba
+	.byte	0x14
+	.uleb128 0x10
+	.4byte	.LASF343
+	.byte	0x19
+	.byte	0xb0
+	.4byte	0xdba
+	.byte	0x16
+	.uleb128 0x10
+	.4byte	.LASF344
+	.byte	0x19
+	.byte	0xb2
+	.4byte	0xdba
+	.byte	0x18
+	.uleb128 0x10
+	.4byte	.LASF345
+	.byte	0x19
+	.byte	0xb3
+	.4byte	0xdba
+	.byte	0x1a
+	.uleb128 0x10
+	.4byte	.LASF346
+	.byte	0x19
+	.byte	0xb4
+	.4byte	0xdba
+	.byte	0x1c
+	.uleb128 0x10
+	.4byte	.LASF347
+	.byte	0x19
+	.byte	0xb5
+	.4byte	0xdba
+	.byte	0x1e
+	.uleb128 0x10
+	.4byte	.LASF348
+	.byte	0x19
+	.byte	0xb7
+	.4byte	0xdc5
+	.byte	0x20
+	.uleb128 0x10
+	.4byte	.LASF349
+	.byte	0x19
+	.byte	0xb8
+	.4byte	0xdc5
+	.byte	0x24
+	.uleb128 0x10
+	.4byte	.LASF350
+	.byte	0x19
+	.byte	0xb9
+	.4byte	0xdc5
+	.byte	0x28
+	.uleb128 0x10
+	.4byte	.LASF323
+	.byte	0x19
+	.byte	0xba
+	.4byte	0x11a9
+	.byte	0x2c
+	.byte	0
+	.uleb128 0x25
+	.4byte	.LASF351
+	.2byte	0x200
+	.byte	0x19
+	.byte	0xbe
+	.4byte	0x1554
+	.uleb128 0x16
+	.ascii	"tag\000"
+	.byte	0x19
+	.byte	0xc0
+	.4byte	0xdc5
+	.byte	0
+	.uleb128 0x16
+	.ascii	"ver\000"
+	.byte	0x19
+	.byte	0xc1
+	.4byte	0xdc5
+	.byte	0x4
+	.uleb128 0x10
+	.4byte	.LASF352
+	.byte	0x19
+	.byte	0xc3
+	.4byte	0xdc5
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF353
+	.byte	0x19
+	.byte	0xc4
+	.4byte	0xdc5
+	.byte	0xc
+	.uleb128 0x10
+	.4byte	.LASF354
+	.byte	0x19
+	.byte	0xc5
+	.4byte	0xdc5
+	.byte	0x10
+	.uleb128 0x10
+	.4byte	.LASF355
+	.byte	0x19
+	.byte	0xc6
+	.4byte	0xdc5
+	.byte	0x14
+	.uleb128 0x10
+	.4byte	.LASF348
+	.byte	0x19
+	.byte	0xc8
+	.4byte	0xdc5
+	.byte	0x18
+	.uleb128 0x10
+	.4byte	.LASF356
+	.byte	0x19
+	.byte	0xc9
+	.4byte	0xdc5
+	.byte	0x1c
+	.uleb128 0x10
+	.4byte	.LASF357
+	.byte	0x19
+	.byte	0xca
+	.4byte	0xdc5
+	.byte	0x20
+	.uleb128 0x10
+	.4byte	.LASF358
+	.byte	0x19
+	.byte	0xcb
+	.4byte	0xdc5
+	.byte	0x24
+	.uleb128 0x10
+	.4byte	.LASF345
+	.byte	0x19
+	.byte	0xcd
+	.4byte	0xdc5
+	.byte	0x28
+	.uleb128 0x10
+	.4byte	.LASF359
+	.byte	0x19
+	.byte	0xce
+	.4byte	0xdc5
+	.byte	0x2c
+	.uleb128 0x10
+	.4byte	.LASF360
+	.byte	0x19
+	.byte	0xcf
+	.4byte	0xdc5
+	.byte	0x30
+	.uleb128 0x10
+	.4byte	.LASF361
+	.byte	0x19
+	.byte	0xd0
+	.4byte	0xdc5
+	.byte	0x34
+	.uleb128 0x10
+	.4byte	.LASF362
+	.byte	0x19
+	.byte	0xd2
+	.4byte	0xdc5
+	.byte	0x38
+	.uleb128 0x10
+	.4byte	.LASF363
+	.byte	0x19
+	.byte	0xd3
+	.4byte	0xdc5
+	.byte	0x3c
+	.uleb128 0x10
+	.4byte	.LASF364
+	.byte	0x19
+	.byte	0xd4
+	.4byte	0xdc5
+	.byte	0x40
+	.uleb128 0x10
+	.4byte	.LASF365
+	.byte	0x19
+	.byte	0xd5
+	.4byte	0xdc5
+	.byte	0x44
+	.uleb128 0x10
+	.4byte	.LASF366
+	.byte	0x19
+	.byte	0xd7
+	.4byte	0xdc5
+	.byte	0x48
+	.uleb128 0x10
+	.4byte	.LASF367
+	.byte	0x19
+	.byte	0xd8
+	.4byte	0xdc5
+	.byte	0x4c
+	.uleb128 0x10
+	.4byte	.LASF368
+	.byte	0x19
+	.byte	0xd9
+	.4byte	0xdc5
+	.byte	0x50
+	.uleb128 0x10
+	.4byte	.LASF369
+	.byte	0x19
+	.byte	0xda
+	.4byte	0xdc5
+	.byte	0x54
+	.uleb128 0x10
+	.4byte	.LASF370
+	.byte	0x19
+	.byte	0xdc
+	.4byte	0xdc5
+	.byte	0x58
+	.uleb128 0x10
+	.4byte	.LASF371
+	.byte	0x19
+	.byte	0xdd
+	.4byte	0xdc5
+	.byte	0x5c
+	.uleb128 0x10
+	.4byte	.LASF372
+	.byte	0x19
+	.byte	0xde
+	.4byte	0xdc5
+	.byte	0x60
+	.uleb128 0x10
+	.4byte	.LASF323
+	.byte	0x19
+	.byte	0xe0
+	.4byte	0x1554
+	.byte	0x64
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xdc5
+	.4byte	0x1564
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x66
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF373
+	.byte	0x6
+	.byte	0x19
+	.byte	0xe4
+	.4byte	0x1595
+	.uleb128 0x10
+	.4byte	.LASF235
+	.byte	0x19
+	.byte	0xe6
+	.4byte	0xdba
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF374
+	.byte	0x19
+	.byte	0xe7
+	.4byte	0xdba
+	.byte	0x2
+	.uleb128 0x10
+	.4byte	.LASF375
+	.byte	0x19
+	.byte	0xe8
+	.4byte	0xdba
+	.byte	0x4
+	.byte	0
+	.uleb128 0x25
+	.4byte	.LASF376
+	.2byte	0x808
+	.byte	0x19
+	.byte	0xeb
+	.4byte	0x15df
+	.uleb128 0x16
+	.ascii	"max\000"
+	.byte	0x19
+	.byte	0xed
+	.4byte	0xdba
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF377
+	.byte	0x19
+	.byte	0xee
+	.4byte	0xdba
+	.byte	0x2
+	.uleb128 0x10
+	.4byte	.LASF378
+	.byte	0x19
+	.byte	0xef
+	.4byte	0xdba
+	.byte	0x4
+	.uleb128 0x10
+	.4byte	.LASF325
+	.byte	0x19
+	.byte	0xf0
+	.4byte	0xdba
+	.byte	0x6
+	.uleb128 0x16
+	.ascii	"arr\000"
+	.byte	0x19
+	.byte	0xf1
+	.4byte	0x15df
+	.byte	0x8
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xdba
+	.4byte	0x15f0
+	.uleb128 0x15
+	.4byte	0xd6
+	.2byte	0x3ff
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF379
+	.byte	0x30
+	.byte	0x19
+	.byte	0xf5
+	.4byte	0x1682
+	.uleb128 0x16
+	.ascii	"id\000"
+	.byte	0x19
+	.byte	0xf7
+	.4byte	0xdba
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF380
+	.byte	0x19
+	.byte	0xf8
+	.4byte	0xdba
+	.byte	0x2
+	.uleb128 0x10
+	.4byte	.LASF381
+	.byte	0x19
+	.byte	0xf9
+	.4byte	0xdba
+	.byte	0x4
+	.uleb128 0x10
+	.4byte	.LASF382
+	.byte	0x19
+	.byte	0xfa
+	.4byte	0xdaf
+	.byte	0x6
+	.uleb128 0x10
+	.4byte	.LASF383
+	.byte	0x19
+	.byte	0xfb
+	.4byte	0xdaf
+	.byte	0x7
+	.uleb128 0x10
+	.4byte	.LASF384
+	.byte	0x19
+	.byte	0xfc
+	.4byte	0xdaf
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF385
+	.byte	0x19
+	.byte	0xfd
+	.4byte	0xdaf
+	.byte	0x9
+	.uleb128 0x10
+	.4byte	.LASF386
+	.byte	0x19
+	.byte	0xfe
+	.4byte	0xdaf
+	.byte	0xa
+	.uleb128 0x10
+	.4byte	.LASF387
+	.byte	0x19
+	.byte	0xff
+	.4byte	0xdaf
+	.byte	0xb
+	.uleb128 0x1b
+	.4byte	.LASF78
+	.byte	0x19
+	.2byte	0x100
+	.4byte	0xdc5
+	.byte	0xc
+	.uleb128 0x1b
+	.4byte	.LASF388
+	.byte	0x19
+	.2byte	0x101
+	.4byte	0x1682
+	.byte	0x10
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xdba
+	.4byte	0x1692
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0xf
+	.byte	0
+	.uleb128 0x1a
+	.4byte	.LASF389
+	.byte	0xc
+	.byte	0x19
+	.2byte	0x105
+	.4byte	0x16c7
+	.uleb128 0x1b
+	.4byte	.LASF390
+	.byte	0x19
+	.2byte	0x107
+	.4byte	0xdc5
+	.byte	0
+	.uleb128 0x1b
+	.4byte	.LASF391
+	.byte	0x19
+	.2byte	0x108
+	.4byte	0xdc5
+	.byte	0x4
+	.uleb128 0x1d
+	.ascii	"lpa\000"
+	.byte	0x19
+	.2byte	0x109
+	.4byte	0xdc5
+	.byte	0x8
+	.byte	0
+	.uleb128 0x1a
+	.4byte	.LASF392
+	.byte	0xc
+	.byte	0x19
+	.2byte	0x10c
+	.4byte	0x16fc
+	.uleb128 0x1b
+	.4byte	.LASF278
+	.byte	0x19
+	.2byte	0x10e
+	.4byte	0xff2
+	.byte	0
+	.uleb128 0x1b
+	.4byte	.LASF279
+	.byte	0x19
+	.2byte	0x10f
+	.4byte	0xff2
+	.byte	0x4
+	.uleb128 0x1b
+	.4byte	.LASF393
+	.byte	0x19
+	.2byte	0x110
+	.4byte	0xdc5
+	.byte	0x8
+	.byte	0
+	.uleb128 0x26
+	.4byte	.LASF394
+	.byte	0x1a
+	.byte	0x12
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_type
+	.uleb128 0x26
+	.4byte	.LASF395
+	.byte	0x1a
+	.byte	0x13
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_die_num
+	.uleb128 0x26
+	.4byte	.LASF396
+	.byte	0x1a
+	.byte	0x14
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_planes_per_die
+	.uleb128 0x26
+	.4byte	.LASF397
+	.byte	0x1a
+	.byte	0x15
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_blks_per_die
+	.uleb128 0x26
+	.4byte	.LASF398
+	.byte	0x1a
+	.byte	0x16
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_blks_per_die_shift
+	.uleb128 0x26
+	.4byte	.LASF399
+	.byte	0x1a
+	.byte	0x17
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_planes_num
+	.uleb128 0x26
+	.4byte	.LASF400
+	.byte	0x1a
+	.byte	0x18
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_blk_pre_plane
+	.uleb128 0x26
+	.4byte	.LASF401
+	.byte	0x1a
+	.byte	0x19
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_ext_blk_pre_plane
+	.uleb128 0x26
+	.4byte	.LASF402
+	.byte	0x1a
+	.byte	0x1a
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_bbm_buf_size
+	.uleb128 0x26
+	.4byte	.LASF403
+	.byte	0x1a
+	.byte	0x1c
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_page_pre_blk
+	.uleb128 0x26
+	.4byte	.LASF404
+	.byte	0x1a
+	.byte	0x1d
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_page_pre_slc_blk
+	.uleb128 0x26
+	.4byte	.LASF405
+	.byte	0x1a
+	.byte	0x1e
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_page_pre_super_blk
+	.uleb128 0x26
+	.4byte	.LASF406
+	.byte	0x1a
+	.byte	0x1f
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_sec_pre_page
+	.uleb128 0x26
+	.4byte	.LASF407
+	.byte	0x1a
+	.byte	0x20
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_sec_pre_page_shift
+	.uleb128 0x26
+	.4byte	.LASF408
+	.byte	0x1a
+	.byte	0x24
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_byte_pre_page
+	.uleb128 0x26
+	.4byte	.LASF409
+	.byte	0x1a
+	.byte	0x25
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_byte_pre_oob
+	.uleb128 0x26
+	.4byte	.LASF410
+	.byte	0x1a
+	.byte	0x26
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_reserved_blks
+	.uleb128 0x26
+	.4byte	.LASF411
+	.byte	0x1a
+	.byte	0x27
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_totle_phy_blks
+	.uleb128 0x26
+	.4byte	.LASF412
+	.byte	0x1a
+	.byte	0x29
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_map_region_num
+	.uleb128 0x26
+	.4byte	.LASF413
+	.byte	0x1a
+	.byte	0x2a
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_l2pmap_ram_region_num
+	.uleb128 0x26
+	.4byte	.LASF414
+	.byte	0x1a
+	.byte	0x2c
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_vendor_region_num
+	.uleb128 0x26
+	.4byte	.LASF415
+	.byte	0x1a
+	.byte	0x2e
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_map_blks_per_plane
+	.uleb128 0x26
+	.4byte	.LASF416
+	.byte	0x1a
+	.byte	0x2f
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_max_map_blks
+	.uleb128 0x26
+	.4byte	.LASF417
+	.byte	0x1a
+	.byte	0x30
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_max_vendor_blks
+	.uleb128 0x26
+	.4byte	.LASF418
+	.byte	0x1a
+	.byte	0x31
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_vendor_part_size
+	.uleb128 0x26
+	.4byte	.LASF419
+	.byte	0x1a
+	.byte	0x32
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_sys_blks_per_plane
+	.uleb128 0x26
+	.4byte	.LASF420
+	.byte	0x1a
+	.byte	0x33
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_init_sys_blks_per_plane
+	.uleb128 0x26
+	.4byte	.LASF421
+	.byte	0x1a
+	.byte	0x34
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_max_sys_blks
+	.uleb128 0x26
+	.4byte	.LASF422
+	.byte	0x1a
+	.byte	0x35
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_data_blks_per_plane
+	.uleb128 0x26
+	.4byte	.LASF423
+	.byte	0x1a
+	.byte	0x36
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_data_op_blks_per_plane
+	.uleb128 0x26
+	.4byte	.LASF424
+	.byte	0x1a
+	.byte	0x37
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_max_data_blks
+	.uleb128 0x26
+	.4byte	.LASF425
+	.byte	0x1a
+	.byte	0x38
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	ftl_gc_temp_power_lost_recovery_flag
+	.uleb128 0x26
+	.4byte	.LASF426
+	.byte	0x1a
+	.byte	0x3a
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_GlobalSysVersion
+	.uleb128 0x26
+	.4byte	.LASF427
+	.byte	0x1a
+	.byte	0x3b
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_GlobalDataVersion
+	.uleb128 0x26
+	.4byte	.LASF428
+	.byte	0x1a
+	.byte	0x3c
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_MaxLbaSector
+	.uleb128 0x26
+	.4byte	.LASF429
+	.byte	0x1a
+	.byte	0x3d
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_MaxLpn
+	.uleb128 0x26
+	.4byte	.LASF430
+	.byte	0x1a
+	.byte	0x3e
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_VaildLpn
+	.uleb128 0x26
+	.4byte	.LASF431
+	.byte	0x1a
+	.byte	0x3f
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_MaxLbn
+	.uleb128 0x26
+	.4byte	.LASF432
+	.byte	0x1a
+	.byte	0x41
+	.4byte	0xf72
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gBbtInfo
+	.uleb128 0x26
+	.4byte	.LASF433
+	.byte	0x1a
+	.byte	0x42
+	.4byte	0xff8
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gSysInfo
+	.uleb128 0x26
+	.4byte	.LASF434
+	.byte	0x1a
+	.byte	0x43
+	.4byte	0x1595
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gSysFreeQueue
+	.uleb128 0x26
+	.4byte	.LASF435
+	.byte	0x1a
+	.byte	0x44
+	.4byte	0x1040
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gL2pMapInfo
+	.uleb128 0x26
+	.4byte	.LASF436
+	.byte	0x1a
+	.byte	0x45
+	.4byte	0x1040
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gVendorBlkInfo
+	.uleb128 0x26
+	.4byte	.LASF437
+	.byte	0x1a
+	.byte	0x46
+	.4byte	0xde6
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	req_sys
+	.uleb128 0x26
+	.4byte	.LASF438
+	.byte	0x1a
+	.byte	0x47
+	.4byte	0x19f9
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	req_read
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xde6
+	.uleb128 0x26
+	.4byte	.LASF439
+	.byte	0x1a
+	.byte	0x48
+	.4byte	0x19f9
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	req_prgm
+	.uleb128 0x26
+	.4byte	.LASF440
+	.byte	0x1a
+	.byte	0x49
+	.4byte	0x19f9
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	req_erase
+	.uleb128 0x26
+	.4byte	.LASF441
+	.byte	0x1a
+	.byte	0x4a
+	.4byte	0x19f9
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	req_gc
+	.uleb128 0x26
+	.4byte	.LASF442
+	.byte	0x1a
+	.byte	0x4b
+	.4byte	0x19f9
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	req_gc_dst
+	.uleb128 0x26
+	.4byte	.LASF443
+	.byte	0x1a
+	.byte	0x4d
+	.4byte	0x19f9
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_req_cache
+	.uleb128 0xa
+	.4byte	0xdaf
+	.4byte	0x1a64
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x26
+	.4byte	.LASF444
+	.byte	0x1a
+	.byte	0x4f
+	.4byte	0x1a54
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_plane_order_table
+	.uleb128 0x26
+	.4byte	.LASF445
+	.byte	0x1a
+	.byte	0x51
+	.4byte	0xff2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_sys_data_buf
+	.uleb128 0x26
+	.4byte	.LASF446
+	.byte	0x1a
+	.byte	0x52
+	.4byte	0xff2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_sys_data_buf_1
+	.uleb128 0x26
+	.4byte	.LASF447
+	.byte	0x1a
+	.byte	0x53
+	.4byte	0xff2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_vendor_data_buf
+	.uleb128 0x26
+	.4byte	.LASF448
+	.byte	0x1a
+	.byte	0x54
+	.4byte	0xff2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_sys_spare_buf
+	.uleb128 0x26
+	.4byte	.LASF449
+	.byte	0x1a
+	.byte	0x55
+	.4byte	0xff2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_io_data_buf_0
+	.uleb128 0x26
+	.4byte	.LASF450
+	.byte	0x1a
+	.byte	0x56
+	.4byte	0xff2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_io_data_buf_1
+	.uleb128 0x26
+	.4byte	.LASF451
+	.byte	0x1a
+	.byte	0x57
+	.4byte	0xff2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_io_spare_buf
+	.uleb128 0x26
+	.4byte	.LASF452
+	.byte	0x1a
+	.byte	0x58
+	.4byte	0xff2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_gc_spare_buf
+	.uleb128 0x26
+	.4byte	.LASF453
+	.byte	0x1a
+	.byte	0x59
+	.4byte	0xff2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_gc_data_buf
+	.uleb128 0x26
+	.4byte	.LASF454
+	.byte	0x1a
+	.byte	0x5a
+	.4byte	0x1b1f
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gp_gc_page_buf_info
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x16c7
+	.uleb128 0x26
+	.4byte	.LASF455
+	.byte	0x1a
+	.byte	0x5b
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_gc_page_buf_num
+	.uleb128 0x26
+	.4byte	.LASF456
+	.byte	0x1a
+	.byte	0x5c
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_num_req
+	.uleb128 0x26
+	.4byte	.LASF457
+	.byte	0x1a
+	.byte	0x5d
+	.4byte	0x1b58
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gp_ect_tbl_info
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x112c
+	.uleb128 0x26
+	.4byte	.LASF458
+	.byte	0x1a
+	.byte	0x5e
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_ect_tbl_info_size
+	.uleb128 0x26
+	.4byte	.LASF459
+	.byte	0x1a
+	.byte	0x5f
+	.4byte	0x10e9
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_erase_count_table
+	.uleb128 0x26
+	.4byte	.LASF460
+	.byte	0x1a
+	.byte	0x61
+	.4byte	0x10e9
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_swl_mul_table
+	.uleb128 0x26
+	.4byte	.LASF461
+	.byte	0x1a
+	.byte	0x62
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_swl_count
+	.uleb128 0x26
+	.4byte	.LASF462
+	.byte	0x1a
+	.byte	0x63
+	.4byte	0x10e9
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_valid_page_count_table
+	.uleb128 0x26
+	.4byte	.LASF463
+	.byte	0x1a
+	.byte	0x64
+	.4byte	0x10e9
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_valid_page_count_check_table
+	.uleb128 0x26
+	.4byte	.LASF464
+	.byte	0x1a
+	.byte	0x65
+	.4byte	0xff2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_blk_mode_table
+	.uleb128 0x26
+	.4byte	.LASF465
+	.byte	0x1a
+	.byte	0x67
+	.4byte	0x10e9
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_map_block_table
+	.uleb128 0x26
+	.4byte	.LASF466
+	.byte	0x1a
+	.byte	0x68
+	.4byte	0x10e9
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_map_block_valid_page_count
+	.uleb128 0x26
+	.4byte	.LASF467
+	.byte	0x1a
+	.byte	0x69
+	.4byte	0xff2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_map_block_ver_table
+	.uleb128 0x26
+	.4byte	.LASF468
+	.byte	0x1a
+	.byte	0x6a
+	.4byte	0xff2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_map_region_ppn_table
+	.uleb128 0x26
+	.4byte	.LASF469
+	.byte	0x1a
+	.byte	0x6b
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_map_block
+	.uleb128 0x26
+	.4byte	.LASF470
+	.byte	0x1a
+	.byte	0x6d
+	.4byte	0x10e9
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_vendor_block_table
+	.uleb128 0x26
+	.4byte	.LASF471
+	.byte	0x1a
+	.byte	0x6e
+	.4byte	0x10e9
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_vendor_block_valid_page_count
+	.uleb128 0x26
+	.4byte	.LASF472
+	.byte	0x1a
+	.byte	0x6f
+	.4byte	0xff2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_vendor_block_ver_table
+	.uleb128 0x26
+	.4byte	.LASF473
+	.byte	0x1a
+	.byte	0x70
+	.4byte	0xff2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_vendor_region_ppn_table
+	.uleb128 0x26
+	.4byte	.LASF474
+	.byte	0x1a
+	.byte	0x71
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_vendor_block
+	.uleb128 0x26
+	.4byte	.LASF475
+	.byte	0x1a
+	.byte	0x73
+	.4byte	0x1c90
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_l2p_ram_map
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x10ef
+	.uleb128 0x26
+	.4byte	.LASF476
+	.byte	0x1a
+	.byte	0x74
+	.4byte	0xff2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_l2p_map_buf
+	.uleb128 0x26
+	.4byte	.LASF477
+	.byte	0x1a
+	.byte	0x75
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_l2p_last_update_region_id
+	.uleb128 0x26
+	.4byte	.LASF478
+	.byte	0x1a
+	.byte	0x7c
+	.4byte	0x1cc9
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_data_block_list_table
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x1564
+	.uleb128 0x26
+	.4byte	.LASF479
+	.byte	0x1a
+	.byte	0x7d
+	.4byte	0x1cc9
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_free_data_block_list_head
+	.uleb128 0x26
+	.4byte	.LASF480
+	.byte	0x1a
+	.byte	0x7f
+	.4byte	0x1cc9
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_data_block_list_head
+	.uleb128 0x26
+	.4byte	.LASF481
+	.byte	0x1a
+	.byte	0x80
+	.4byte	0x1cc9
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_data_block_list_tail
+	.uleb128 0x26
+	.4byte	.LASF482
+	.byte	0x1a
+	.byte	0x81
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_num_free_superblocks
+	.uleb128 0x26
+	.4byte	.LASF483
+	.byte	0x1a
+	.byte	0x82
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_num_data_superblocks
+	.uleb128 0x26
+	.4byte	.LASF484
+	.byte	0x1a
+	.byte	0x83
+	.4byte	0x15f0
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_active_superblock
+	.uleb128 0x26
+	.4byte	.LASF485
+	.byte	0x1a
+	.byte	0x84
+	.4byte	0x15f0
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_buffer_superblock
+	.uleb128 0x26
+	.4byte	.LASF486
+	.byte	0x1a
+	.byte	0x85
+	.4byte	0x15f0
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_temp_superblock
+	.uleb128 0x26
+	.4byte	.LASF487
+	.byte	0x1a
+	.byte	0x86
+	.4byte	0x15f0
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_superblock
+	.uleb128 0x26
+	.4byte	.LASF488
+	.byte	0x1a
+	.byte	0x87
+	.4byte	0x1d79
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gp_last_act_superblock
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x15f0
+	.uleb128 0x26
+	.4byte	.LASF489
+	.byte	0x1a
+	.byte	0x88
+	.4byte	0x1311
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_sys_save_data
+	.uleb128 0x26
+	.4byte	.LASF490
+	.byte	0x1a
+	.byte	0x89
+	.4byte	0x140e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_sys_ext_data
+	.uleb128 0x26
+	.4byte	.LASF491
+	.byte	0x1a
+	.byte	0x8b
+	.4byte	0x1db2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_gc_page_info
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x1692
+	.uleb128 0x26
+	.4byte	.LASF492
+	.byte	0x1a
+	.byte	0x8c
+	.4byte	0x10e9
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_gc_blk_tbl
+	.uleb128 0x26
+	.4byte	.LASF493
+	.byte	0x1a
+	.byte	0x8d
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_blk_num
+	.uleb128 0x26
+	.4byte	.LASF494
+	.byte	0x1a
+	.byte	0x8e
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_page_offset
+	.uleb128 0x26
+	.4byte	.LASF495
+	.byte	0x1a
+	.byte	0x8f
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_cur_blk_valid_pages
+	.uleb128 0x26
+	.4byte	.LASF496
+	.byte	0x1a
+	.byte	0x90
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_cur_blk_max_valid_pages
+	.uleb128 0x26
+	.4byte	.LASF497
+	.byte	0x1a
+	.byte	0x91
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_next_blk
+	.uleb128 0x26
+	.4byte	.LASF498
+	.byte	0x1a
+	.byte	0x92
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_next_blk_1
+	.uleb128 0x26
+	.4byte	.LASF499
+	.byte	0x1a
+	.byte	0x93
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_bad_block_temp_num
+	.uleb128 0x26
+	.4byte	.LASF500
+	.byte	0x1a
+	.byte	0x94
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_bad_block_gc_index
+	.uleb128 0xa
+	.4byte	0xdba
+	.4byte	0x1e61
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x10
+	.byte	0
+	.uleb128 0x26
+	.4byte	.LASF501
+	.byte	0x1a
+	.byte	0x95
+	.4byte	0x1e51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_bad_block_temp_tbl
+	.uleb128 0x26
+	.4byte	.LASF502
+	.byte	0x1a
+	.byte	0x97
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_free_blk_threshold
+	.uleb128 0x26
+	.4byte	.LASF503
+	.byte	0x1a
+	.byte	0x98
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_merge_free_blk_threshold
+	.uleb128 0x26
+	.4byte	.LASF504
+	.byte	0x1a
+	.byte	0x99
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_blk_index
+	.uleb128 0x26
+	.4byte	.LASF505
+	.byte	0x1a
+	.byte	0x9b
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_gc_page_count
+	.uleb128 0x26
+	.4byte	.LASF506
+	.byte	0x1a
+	.byte	0x9c
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_write_page_count
+	.uleb128 0x26
+	.4byte	.LASF507
+	.byte	0x1a
+	.byte	0x9d
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_write_sector
+	.uleb128 0x26
+	.4byte	.LASF508
+	.byte	0x1a
+	.byte	0x9e
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_read_sector
+	.uleb128 0x26
+	.4byte	.LASF509
+	.byte	0x1a
+	.byte	0xa0
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_discard_page_count
+	.uleb128 0x26
+	.4byte	.LASF510
+	.byte	0x1a
+	.byte	0xa1
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_read_page_count
+	.uleb128 0x26
+	.4byte	.LASF511
+	.byte	0x1a
+	.byte	0xa2
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_tmp_data_superblock_id
+	.uleb128 0x26
+	.4byte	.LASF512
+	.byte	0x1a
+	.byte	0xa3
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_cache_write_count
+	.uleb128 0x26
+	.4byte	.LASF513
+	.byte	0x1a
+	.byte	0xa4
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_l2p_write_count
+	.uleb128 0x26
+	.4byte	.LASF514
+	.byte	0x1a
+	.byte	0xa6
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_mlc_erase_count
+	.uleb128 0x26
+	.4byte	.LASF515
+	.byte	0x1a
+	.byte	0xa7
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_avg_erase_count
+	.uleb128 0x26
+	.4byte	.LASF516
+	.byte	0x1a
+	.byte	0xa8
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_min_erase_count
+	.uleb128 0x26
+	.4byte	.LASF517
+	.byte	0x1a
+	.byte	0xa9
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_slc_erase_count
+	.uleb128 0x26
+	.4byte	.LASF518
+	.byte	0x1a
+	.byte	0xaa
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_sys_slc_erase_count
+	.uleb128 0x26
+	.4byte	.LASF519
+	.byte	0x1a
+	.byte	0xab
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_max_erase_count
+	.uleb128 0x26
+	.4byte	.LASF520
+	.byte	0x1a
+	.byte	0xac
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_in_gc_progress
+	.uleb128 0x26
+	.4byte	.LASF521
+	.byte	0x1a
+	.byte	0xad
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_in_swl_replace
+	.uleb128 0x26
+	.4byte	.LASF522
+	.byte	0x1a
+	.byte	0xae
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_ftl_nand_free_count
+	.uleb128 0x26
+	.4byte	.LASF523
+	.byte	0x1a
+	.byte	0xaf
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_head_data_block
+	.uleb128 0x26
+	.4byte	.LASF524
+	.byte	0x1a
+	.byte	0xb0
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_head_data_block_count
+	.uleb128 0x26
+	.4byte	.LASF525
+	.byte	0x1a
+	.byte	0xb1
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_skip_write_count
+	.uleb128 0x26
+	.4byte	.LASF526
+	.byte	0x1a
+	.byte	0xb2
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_cur_erase_blk
+	.uleb128 0x26
+	.4byte	.LASF527
+	.byte	0x1a
+	.byte	0xb4
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_recovery_page_num
+	.uleb128 0x26
+	.4byte	.LASF528
+	.byte	0x1a
+	.byte	0xb5
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_recovery_page_min_ver
+	.uleb128 0xa
+	.4byte	0xdc5
+	.4byte	0x204d
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x26
+	.4byte	.LASF529
+	.byte	0x1a
+	.byte	0xb6
+	.4byte	0x203d
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_recovery_ppa_tbl
+	.uleb128 0x26
+	.4byte	.LASF530
+	.byte	0x1a
+	.byte	0xb7
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_mlc_erase_count_value
+	.uleb128 0x26
+	.4byte	.LASF531
+	.byte	0x1a
+	.byte	0xb8
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_power_lost_recovery_flag
+	.uleb128 0x4
+	.4byte	.LASF532
+	.byte	0x17
+	.byte	0x14
+	.4byte	0xe35
+	.uleb128 0x4
+	.4byte	.LASF533
+	.byte	0x17
+	.byte	0x15
+	.4byte	0xe35
+	.uleb128 0x4
+	.4byte	.LASF534
+	.byte	0x17
+	.byte	0x16
+	.4byte	0xed7
+	.uleb128 0xa
+	.4byte	0xb5
+	.4byte	0x20b2
+	.uleb128 0x15
+	.4byte	0xd6
+	.2byte	0x3ff
+	.byte	0
+	.uleb128 0x4
+	.4byte	.LASF535
+	.byte	0x17
+	.byte	0x17
+	.4byte	0x20a1
+	.uleb128 0x26
+	.4byte	.LASF536
+	.byte	0x3
+	.byte	0x6
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	DeviceCapacity
+	.uleb128 0x26
+	.4byte	.LASF537
+	.byte	0x3
+	.byte	0x7
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gFtlInitStatus
+	.uleb128 0x4
+	.4byte	.LASF538
+	.byte	0x3
+	.byte	0x6d
+	.4byte	0xdc5
+	.uleb128 0x4
+	.4byte	.LASF539
+	.byte	0x3
+	.byte	0x6e
+	.4byte	0xdc5
+	.uleb128 0x4
+	.4byte	.LASF540
+	.byte	0x3
+	.byte	0x6f
+	.4byte	0xdc5
+	.uleb128 0x4
+	.4byte	.LASF541
+	.byte	0x3
+	.byte	0x70
+	.4byte	0xdc5
+	.uleb128 0x27
+	.4byte	.LASF542
+	.byte	0x3
+	.2byte	0x3c0
+	.4byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	power_up_flag
+	.uleb128 0x28
+	.4byte	.LASF546
+	.byte	0x3
+	.2byte	0x483
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gc_discard_updated
+	.uleb128 0x27
+	.4byte	.LASF543
+	.byte	0x2
+	.2byte	0x35b
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_ect_tbl_power_up_flush
+	.uleb128 0x27
+	.4byte	.LASF544
+	.byte	0x2
+	.2byte	0x370
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	FtlUpdateVaildLpnCount
+	.uleb128 0xa
+	.4byte	0xdba
+	.4byte	0x2164
+	.uleb128 0x15
+	.4byte	0xd6
+	.2byte	0x1fff
+	.byte	0
+	.uleb128 0x27
+	.4byte	.LASF545
+	.byte	0x2
+	.2byte	0x8ad
+	.4byte	0x2153
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	check_vpc_table
+	.uleb128 0x29
+	.4byte	.LASF547
+	.byte	0x5
+	.byte	0x6d
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	ftl_gc_temp_block_bops_scan_page_addr
+	.uleb128 0x27
+	.4byte	.LASF548
+	.byte	0x5
+	.2byte	0x1d4
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gc_ink_free_return_value
+	.uleb128 0xc
+	.4byte	.LASF549
+	.byte	0x1b
+	.2byte	0x3ba
+	.4byte	0x107
+	.uleb128 0xc
+	.4byte	.LASF550
+	.byte	0x1b
+	.2byte	0x3bb
+	.4byte	0x107
+	.uleb128 0xc
+	.4byte	.LASF551
+	.byte	0x1b
+	.2byte	0x3bc
+	.4byte	0x107
+	.uleb128 0xf
+	.4byte	.LASF552
+	.byte	0x4
+	.byte	0x1c
+	.byte	0xc
+	.4byte	0x21d6
+	.uleb128 0x16
+	.ascii	"pid\000"
+	.byte	0x1c
+	.byte	0xd
+	.4byte	0x50
+	.byte	0
+	.byte	0
+	.uleb128 0x4
+	.4byte	.LASF553
+	.byte	0x1c
+	.byte	0x10
+	.4byte	0x21e1
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x21bd
+	.uleb128 0x2a
+	.4byte	0x208b
+	.byte	0x1
+	.byte	0x10
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_nand_phy_info
+	.uleb128 0x2a
+	.4byte	0x2096
+	.byte	0x1
+	.byte	0x11
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_nand_ops
+	.uleb128 0x29
+	.4byte	.LASF554
+	.byte	0x1
+	.byte	0x13
+	.4byte	0x20a1
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	check_buf
+	.uleb128 0x2a
+	.4byte	0x20b2
+	.byte	0x1
+	.byte	0x14
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	ftl_temp_buf
+	.uleb128 0xa
+	.4byte	0xb5
+	.4byte	0x222f
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x7f
+	.byte	0
+	.uleb128 0x29
+	.4byte	.LASF555
+	.byte	0x1
+	.byte	0x15
+	.4byte	0x221f
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	check_spare_buf
+	.uleb128 0x2b
+	.4byte	.LASF558
+	.byte	0x1
+	.byte	0xf7
+	.4byte	0x50
+	.4byte	.LFB350
+	.4byte	.LFE350-.LFB350
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x22a6
+	.uleb128 0x2c
+	.4byte	.LASF556
+	.byte	0x1
+	.byte	0xf7
+	.4byte	0x128
+	.4byte	.LLST453
+	.uleb128 0x2c
+	.4byte	.LASF557
+	.byte	0x1
+	.byte	0xf7
+	.4byte	0x128
+	.4byte	.LLST454
+	.uleb128 0x2c
+	.4byte	.LASF325
+	.byte	0x1
+	.byte	0xf7
+	.4byte	0x7b
+	.4byte	.LLST455
+	.uleb128 0x2d
+	.4byte	.LVL2076
+	.4byte	0x91ff
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0
+	.byte	0
+	.uleb128 0x2b
+	.4byte	.LASF559
+	.byte	0x1
+	.byte	0xf2
+	.4byte	0x128
+	.4byte	.LFB349
+	.4byte	.LFE349-.LFB349
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x230c
+	.uleb128 0x2c
+	.4byte	.LASF560
+	.byte	0x1
+	.byte	0xf2
+	.4byte	0x128
+	.4byte	.LLST285
+	.uleb128 0x2c
+	.4byte	.LASF561
+	.byte	0x1
+	.byte	0xf2
+	.4byte	0x16b
+	.4byte	.LLST286
+	.uleb128 0x2c
+	.4byte	.LASF30
+	.byte	0x1
+	.byte	0xf2
+	.4byte	0x7b
+	.4byte	.LLST287
+	.uleb128 0x2d
+	.4byte	.LVL1160
+	.4byte	0x920a
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0
+	.byte	0
+	.uleb128 0x2b
+	.4byte	.LASF562
+	.byte	0x1
+	.byte	0xed
+	.4byte	0x128
+	.4byte	.LFB348
+	.4byte	.LFE348-.LFB348
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x236c
+	.uleb128 0x2f
+	.ascii	"s\000"
+	.byte	0x1
+	.byte	0xed
+	.4byte	0x128
+	.4byte	.LLST189
+	.uleb128 0x2f
+	.ascii	"c\000"
+	.byte	0x1
+	.byte	0xed
+	.4byte	0x50
+	.4byte	.LLST190
+	.uleb128 0x2f
+	.ascii	"n\000"
+	.byte	0x1
+	.byte	0xed
+	.4byte	0x7b
+	.4byte	.LLST191
+	.uleb128 0x2d
+	.4byte	.LVL696
+	.4byte	0x9216
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0
+	.byte	0
+	.uleb128 0x2b
+	.4byte	.LASF563
+	.byte	0x1
+	.byte	0xdb
+	.4byte	0xaa
+	.4byte	.LFB347
+	.4byte	.LFE347-.LFB347
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2410
+	.uleb128 0x2c
+	.4byte	.LASF564
+	.byte	0x1
+	.byte	0xdb
+	.4byte	0xf28
+	.4byte	.LLST282
+	.uleb128 0x2f
+	.ascii	"die\000"
+	.byte	0x1
+	.byte	0xdb
+	.4byte	0xb5
+	.4byte	.LLST283
+	.uleb128 0x30
+	.4byte	.LASF325
+	.byte	0x1
+	.byte	0xdd
+	.4byte	0x9f
+	.4byte	.LLST284
+	.uleb128 0x31
+	.ascii	"i\000"
+	.byte	0x1
+	.byte	0xdd
+	.4byte	0x9f
+	.uleb128 0x32
+	.4byte	.LVL1152
+	.4byte	0x230c
+	.4byte	0x23dc
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x100
+	.byte	0
+	.uleb128 0x33
+	.4byte	.LVL1153
+	.4byte	0x23f2
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL1156
+	.4byte	0x230c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x100
+	.byte	0
+	.byte	0
+	.uleb128 0x35
+	.4byte	.LASF586
+	.byte	0x1
+	.byte	0xc0
+	.4byte	0xdd0
+	.byte	0x1
+	.4byte	0x2454
+	.uleb128 0x36
+	.4byte	.LASF577
+	.byte	0x1
+	.byte	0xc0
+	.4byte	0xdba
+	.uleb128 0x31
+	.ascii	"sts\000"
+	.byte	0x1
+	.byte	0xc2
+	.4byte	0xdd0
+	.uleb128 0x37
+	.4byte	.LASF565
+	.byte	0x1
+	.byte	0xc3
+	.4byte	0x2454
+	.uleb128 0x31
+	.ascii	"req\000"
+	.byte	0x1
+	.byte	0xc4
+	.4byte	0xde6
+	.uleb128 0x38
+	.ascii	"out\000"
+	.byte	0x1
+	.byte	0xd6
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xdc5
+	.4byte	0x2464
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0xf
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LASF566
+	.byte	0x1
+	.byte	0xaa
+	.4byte	0xaa
+	.4byte	.LFB345
+	.4byte	.LFE345-.LFB345
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x251a
+	.uleb128 0x2c
+	.4byte	.LASF567
+	.byte	0x1
+	.byte	0xaa
+	.4byte	0x128
+	.4byte	.LLST170
+	.uleb128 0x2c
+	.4byte	.LASF568
+	.byte	0x1
+	.byte	0xaa
+	.4byte	0xb5
+	.4byte	.LLST171
+	.uleb128 0x2c
+	.4byte	.LASF569
+	.byte	0x1
+	.byte	0xaa
+	.4byte	0xb5
+	.4byte	.LLST172
+	.uleb128 0x3a
+	.ascii	"i\000"
+	.byte	0x1
+	.byte	0xac
+	.4byte	0xb5
+	.uleb128 0x1
+	.byte	0x56
+	.uleb128 0x3a
+	.ascii	"cs\000"
+	.byte	0x1
+	.byte	0xac
+	.4byte	0xb5
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -40
+	.uleb128 0x30
+	.4byte	.LASF276
+	.byte	0x1
+	.byte	0xac
+	.4byte	0xb5
+	.4byte	.LLST173
+	.uleb128 0x29
+	.4byte	.LASF570
+	.byte	0x1
+	.byte	0xac
+	.4byte	0xb5
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x3b
+	.ascii	"req\000"
+	.byte	0x1
+	.byte	0xad
+	.4byte	0x19f9
+	.4byte	.LLST174
+	.uleb128 0x29
+	.4byte	.LASF571
+	.byte	0x1
+	.byte	0xae
+	.4byte	0xb5
+	.uleb128 0x1
+	.byte	0x58
+	.uleb128 0x34
+	.4byte	.LVL628
+	.4byte	0x83c6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x3c
+	.4byte	0x27c7
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 -4
+	.byte	0
+	.byte	0
+	.uleb128 0x2b
+	.4byte	.LASF572
+	.byte	0x1
+	.byte	0x6e
+	.4byte	0xaa
+	.4byte	.LFB344
+	.4byte	.LFE344-.LFB344
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x26a4
+	.uleb128 0x2c
+	.4byte	.LASF567
+	.byte	0x1
+	.byte	0x6e
+	.4byte	0x128
+	.4byte	.LLST162
+	.uleb128 0x2c
+	.4byte	.LASF569
+	.byte	0x1
+	.byte	0x6e
+	.4byte	0xb5
+	.4byte	.LLST163
+	.uleb128 0x2c
+	.4byte	.LASF568
+	.byte	0x1
+	.byte	0x6e
+	.4byte	0xb5
+	.4byte	.LLST164
+	.uleb128 0x2c
+	.4byte	.LASF573
+	.byte	0x1
+	.byte	0x6e
+	.4byte	0xb5
+	.4byte	.LLST165
+	.uleb128 0x3b
+	.ascii	"i\000"
+	.byte	0x1
+	.byte	0x70
+	.4byte	0xb5
+	.4byte	.LLST166
+	.uleb128 0x3a
+	.ascii	"cs\000"
+	.byte	0x1
+	.byte	0x70
+	.4byte	0xb5
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -60
+	.uleb128 0x30
+	.4byte	.LASF276
+	.byte	0x1
+	.byte	0x70
+	.4byte	0xb5
+	.4byte	.LLST167
+	.uleb128 0x29
+	.4byte	.LASF570
+	.byte	0x1
+	.byte	0x70
+	.4byte	0xb5
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -56
+	.uleb128 0x30
+	.4byte	.LASF571
+	.byte	0x1
+	.byte	0x71
+	.4byte	0xb5
+	.4byte	.LLST168
+	.uleb128 0x3b
+	.ascii	"req\000"
+	.byte	0x1
+	.byte	0x72
+	.4byte	0x19f9
+	.4byte	.LLST169
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x26b4
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.10324
+	.uleb128 0x3e
+	.4byte	.Ldebug_ranges0+0x88
+	.4byte	0x264b
+	.uleb128 0x29
+	.4byte	.LASF575
+	.byte	0x1
+	.byte	0x8d
+	.4byte	0xde6
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -52
+	.uleb128 0x32
+	.4byte	.LVL616
+	.4byte	0x26b9
+	.4byte	0x2609
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -52
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL617
+	.4byte	0x9222
+	.4byte	0x2620
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC79
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL618
+	.4byte	0x9222
+	.4byte	0x2637
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC80
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL619
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC81
+	.byte	0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL609
+	.4byte	0x9222
+	.4byte	0x2671
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR110
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x76
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL610
+	.4byte	0x83c6
+	.4byte	0x2693
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -56
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -60
+	.uleb128 0x3c
+	.4byte	0x27c7
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x3f
+	.4byte	.LVL611
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.uleb128 0x3f
+	.4byte	.LVL613
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xea
+	.4byte	0x26b4
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0xe
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x26a4
+	.uleb128 0x2b
+	.4byte	.LASF576
+	.byte	0x1
+	.byte	0x50
+	.4byte	0xaa
+	.4byte	.LFB343
+	.4byte	.LFE343-.LFB343
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x27b7
+	.uleb128 0x2c
+	.4byte	.LASF567
+	.byte	0x1
+	.byte	0x50
+	.4byte	0x128
+	.4byte	.LLST151
+	.uleb128 0x2c
+	.4byte	.LASF569
+	.byte	0x1
+	.byte	0x50
+	.4byte	0xb5
+	.4byte	.LLST152
+	.uleb128 0x2c
+	.4byte	.LASF568
+	.byte	0x1
+	.byte	0x50
+	.4byte	0xb5
+	.4byte	.LLST153
+	.uleb128 0x3a
+	.ascii	"i\000"
+	.byte	0x1
+	.byte	0x52
+	.4byte	0xb5
+	.uleb128 0x1
+	.byte	0x55
+	.uleb128 0x3a
+	.ascii	"cs\000"
+	.byte	0x1
+	.byte	0x52
+	.4byte	0xb5
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -40
+	.uleb128 0x30
+	.4byte	.LASF276
+	.byte	0x1
+	.byte	0x52
+	.4byte	0xb5
+	.4byte	.LLST154
+	.uleb128 0x29
+	.4byte	.LASF570
+	.byte	0x1
+	.byte	0x52
+	.4byte	0xb5
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x29
+	.4byte	.LASF571
+	.byte	0x1
+	.byte	0x53
+	.4byte	0xb5
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -44
+	.uleb128 0x3a
+	.ascii	"req\000"
+	.byte	0x1
+	.byte	0x54
+	.4byte	0x19f9
+	.uleb128 0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x26b4
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.10307
+	.uleb128 0x32
+	.4byte	.LVL566
+	.4byte	0x9222
+	.4byte	0x2784
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR106
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x58
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL567
+	.4byte	0x83c6
+	.4byte	0x27a6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -40
+	.uleb128 0x3c
+	.4byte	0x27c7
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x3f
+	.4byte	.LVL568
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x3f
+	.4byte	.LVL570
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x40
+	.4byte	.LASF883
+	.byte	0x1
+	.byte	0x36
+	.4byte	0xb5
+	.byte	0x1
+	.4byte	0x2836
+	.uleb128 0x41
+	.ascii	"req\000"
+	.byte	0x1
+	.byte	0x36
+	.4byte	0x19f9
+	.uleb128 0x36
+	.4byte	.LASF570
+	.byte	0x1
+	.byte	0x36
+	.4byte	0xe2f
+	.uleb128 0x36
+	.4byte	.LASF578
+	.byte	0x1
+	.byte	0x36
+	.4byte	0xe2f
+	.uleb128 0x37
+	.4byte	.LASF579
+	.byte	0x1
+	.byte	0x38
+	.4byte	0x9f
+	.uleb128 0x37
+	.4byte	.LASF580
+	.byte	0x1
+	.byte	0x38
+	.4byte	0x9f
+	.uleb128 0x37
+	.4byte	.LASF285
+	.byte	0x1
+	.byte	0x39
+	.4byte	0x9f
+	.uleb128 0x37
+	.4byte	.LASF286
+	.byte	0x1
+	.byte	0x39
+	.4byte	0x9f
+	.uleb128 0x37
+	.4byte	.LASF581
+	.byte	0x1
+	.byte	0x3a
+	.4byte	0xb5
+	.uleb128 0x37
+	.4byte	.LASF277
+	.byte	0x1
+	.byte	0x3b
+	.4byte	0xb5
+	.uleb128 0x37
+	.4byte	.LASF582
+	.byte	0x1
+	.byte	0x3c
+	.4byte	0xb5
+	.byte	0
+	.uleb128 0x42
+	.4byte	.LASF619
+	.byte	0x1
+	.byte	0x1c
+	.4byte	.LFB341
+	.4byte	.LFE341-.LFB341
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2922
+	.uleb128 0x2f
+	.ascii	"s\000"
+	.byte	0x1
+	.byte	0x1c
+	.4byte	0xf6
+	.4byte	.LLST142
+	.uleb128 0x2f
+	.ascii	"buf\000"
+	.byte	0x1
+	.byte	0x1c
+	.4byte	0x128
+	.4byte	.LLST143
+	.uleb128 0x2c
+	.4byte	.LASF583
+	.byte	0x1
+	.byte	0x1c
+	.4byte	0x50
+	.4byte	.LLST144
+	.uleb128 0x2f
+	.ascii	"len\000"
+	.byte	0x1
+	.byte	0x1c
+	.4byte	0x50
+	.4byte	.LLST145
+	.uleb128 0x3b
+	.ascii	"i\000"
+	.byte	0x1
+	.byte	0x1e
+	.4byte	0xb5
+	.4byte	.LLST146
+	.uleb128 0x3b
+	.ascii	"j\000"
+	.byte	0x1
+	.byte	0x1e
+	.4byte	0xb5
+	.4byte	.LLST147
+	.uleb128 0x3b
+	.ascii	"p8\000"
+	.byte	0x1
+	.byte	0x1f
+	.4byte	0xf6
+	.4byte	.LLST148
+	.uleb128 0x3b
+	.ascii	"p16\000"
+	.byte	0x1
+	.byte	0x20
+	.4byte	0x2922
+	.4byte	.LLST149
+	.uleb128 0x3b
+	.ascii	"p32\000"
+	.byte	0x1
+	.byte	0x21
+	.4byte	0xe2f
+	.4byte	.LLST150
+	.uleb128 0x43
+	.4byte	.LVL555
+	.4byte	0x9222
+	.4byte	0x28e2
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC78
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL556
+	.4byte	0x9222
+	.4byte	0x2905
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC75
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL558
+	.4byte	0x9222
+	.uleb128 0x34
+	.4byte	.LVL560
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC78
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x69
+	.uleb128 0x2b
+	.4byte	.LASF584
+	.byte	0x1
+	.byte	0x17
+	.4byte	0x128
+	.4byte	.LFB340
+	.4byte	.LFE340-.LFB340
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2967
+	.uleb128 0x2c
+	.4byte	.LASF30
+	.byte	0x1
+	.byte	0x17
+	.4byte	0x50
+	.4byte	.LLST141
+	.uleb128 0x2d
+	.4byte	.LVL550
+	.4byte	0x922d
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF585
+	.byte	0x5
+	.2byte	0x2f8
+	.4byte	0xb5
+	.4byte	.LFB323
+	.4byte	.LFE323-.LFB323
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2996
+	.uleb128 0x2d
+	.4byte	.LVL1812
+	.4byte	0x2996
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF587
+	.byte	0x5
+	.2byte	0x1d5
+	.4byte	0x50
+	.byte	0x1
+	.4byte	0x2a63
+	.uleb128 0x47
+	.4byte	.LASF588
+	.byte	0x5
+	.2byte	0x1d5
+	.4byte	0xdc5
+	.uleb128 0x47
+	.4byte	.LASF589
+	.byte	0x5
+	.2byte	0x1d5
+	.4byte	0xdc5
+	.uleb128 0x48
+	.4byte	.LASF590
+	.byte	0x5
+	.2byte	0x1d7
+	.4byte	0xdba
+	.uleb128 0x49
+	.ascii	"lpa\000"
+	.byte	0x5
+	.2byte	0x1d8
+	.4byte	0xdc5
+	.uleb128 0x49
+	.ascii	"ppa\000"
+	.byte	0x5
+	.2byte	0x1d8
+	.4byte	0xdc5
+	.uleb128 0x48
+	.4byte	.LASF591
+	.byte	0x5
+	.2byte	0x1d9
+	.4byte	0xdba
+	.uleb128 0x48
+	.4byte	.LASF299
+	.byte	0x5
+	.2byte	0x1da
+	.4byte	0xdba
+	.uleb128 0x48
+	.4byte	.LASF592
+	.byte	0x5
+	.2byte	0x1da
+	.4byte	0xdba
+	.uleb128 0x48
+	.4byte	.LASF593
+	.byte	0x5
+	.2byte	0x1da
+	.4byte	0xdba
+	.uleb128 0x48
+	.4byte	.LASF594
+	.byte	0x5
+	.2byte	0x1da
+	.4byte	0xdba
+	.uleb128 0x48
+	.4byte	.LASF595
+	.byte	0x5
+	.2byte	0x1db
+	.4byte	0xdba
+	.uleb128 0x48
+	.4byte	.LASF596
+	.byte	0x5
+	.2byte	0x1dc
+	.4byte	0x2a63
+	.uleb128 0x4a
+	.4byte	.LASF597
+	.byte	0x5
+	.2byte	0x276
+	.uleb128 0x4a
+	.4byte	.LASF598
+	.byte	0x5
+	.2byte	0x279
+	.uleb128 0x4b
+	.4byte	.LASF574
+	.4byte	0x2a79
+	.4byte	.LASF587
+	.uleb128 0x4c
+	.uleb128 0x48
+	.4byte	.LASF599
+	.byte	0x5
+	.2byte	0x1f3
+	.4byte	0xdba
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x1229
+	.uleb128 0xa
+	.4byte	0xea
+	.4byte	0x2a79
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x16
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x2a69
+	.uleb128 0x46
+	.4byte	.LASF600
+	.byte	0x5
+	.2byte	0x1a2
+	.4byte	0x50
+	.byte	0x1
+	.4byte	0x2ade
+	.uleb128 0x49
+	.ascii	"ret\000"
+	.byte	0x5
+	.2byte	0x1a4
+	.4byte	0x50
+	.uleb128 0x49
+	.ascii	"i\000"
+	.byte	0x5
+	.2byte	0x1a5
+	.4byte	0x50
+	.uleb128 0x49
+	.ascii	"ppa\000"
+	.byte	0x5
+	.2byte	0x1a6
+	.4byte	0xdc5
+	.uleb128 0x48
+	.4byte	.LASF565
+	.byte	0x5
+	.2byte	0x1a7
+	.4byte	0x2454
+	.uleb128 0x4d
+	.4byte	0x2acf
+	.uleb128 0x48
+	.4byte	.LASF601
+	.byte	0x5
+	.2byte	0x1b1
+	.4byte	0xde6
+	.byte	0
+	.uleb128 0x4c
+	.uleb128 0x48
+	.4byte	.LASF602
+	.byte	0x5
+	.2byte	0x1c6
+	.4byte	0xdc5
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF603
+	.byte	0x5
+	.2byte	0x185
+	.4byte	0x50
+	.byte	0x1
+	.4byte	0x2b28
+	.uleb128 0x47
+	.4byte	.LASF604
+	.byte	0x5
+	.2byte	0x185
+	.4byte	0xdba
+	.uleb128 0x48
+	.4byte	.LASF592
+	.byte	0x5
+	.2byte	0x187
+	.4byte	0xdba
+	.uleb128 0x49
+	.ascii	"i\000"
+	.byte	0x5
+	.2byte	0x188
+	.4byte	0xdba
+	.uleb128 0x49
+	.ascii	"j\000"
+	.byte	0x5
+	.2byte	0x188
+	.4byte	0xdba
+	.uleb128 0x48
+	.4byte	.LASF388
+	.byte	0x5
+	.2byte	0x189
+	.4byte	0xdba
+	.byte	0
+	.uleb128 0x4e
+	.4byte	.LASF714
+	.byte	0x5
+	.2byte	0x17a
+	.4byte	0x50
+	.byte	0x1
+	.uleb128 0x45
+	.4byte	.LASF605
+	.byte	0x5
+	.2byte	0x166
+	.4byte	0x50
+	.4byte	.LFB318
+	.4byte	.LFE318-.LFB318
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2bbf
+	.uleb128 0x4f
+	.4byte	.LASF388
+	.byte	0x5
+	.2byte	0x166
+	.4byte	0xdba
+	.4byte	.LLST138
+	.uleb128 0x50
+	.ascii	"i\000"
+	.byte	0x5
+	.2byte	0x168
+	.4byte	0xdba
+	.4byte	.LLST139
+	.uleb128 0x51
+	.4byte	.LASF606
+	.byte	0x5
+	.2byte	0x169
+	.4byte	0xdba
+	.4byte	.LLST140
+	.uleb128 0x32
+	.4byte	.LVL537
+	.4byte	0x6122
+	.4byte	0x2b91
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL539
+	.4byte	0x9222
+	.4byte	0x2bae
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC74
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL540
+	.4byte	0x2bbf
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF607
+	.byte	0x5
+	.2byte	0x158
+	.4byte	0x50
+	.4byte	.LFB317
+	.4byte	.LFE317-.LFB317
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2c03
+	.uleb128 0x4f
+	.4byte	.LASF608
+	.byte	0x5
+	.2byte	0x158
+	.4byte	0xdba
+	.4byte	.LLST137
+	.uleb128 0x34
+	.4byte	.LVL535
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC73
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF609
+	.byte	0x5
+	.2byte	0x13b
+	.4byte	0xdc5
+	.4byte	.LFB316
+	.4byte	.LFE316-.LFB316
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2ca7
+	.uleb128 0x50
+	.ascii	"i\000"
+	.byte	0x5
+	.2byte	0x13d
+	.4byte	0xdba
+	.4byte	.LLST394
+	.uleb128 0x51
+	.4byte	.LASF596
+	.byte	0x5
+	.2byte	0x13e
+	.4byte	0x2a63
+	.4byte	.LLST395
+	.uleb128 0x32
+	.4byte	.LVL1697
+	.4byte	0x251a
+	.4byte	0x2c55
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1698
+	.4byte	0x3183
+	.4byte	0x2c6f
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1699
+	.4byte	0x2edb
+	.4byte	0x2c82
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1701
+	.4byte	0x6828
+	.uleb128 0x44
+	.4byte	.LVL1702
+	.4byte	0x65f0
+	.uleb128 0x44
+	.4byte	.LVL1703
+	.4byte	0x2e94
+	.uleb128 0x44
+	.4byte	.LVL1705
+	.4byte	0x308c
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF610
+	.byte	0x5
+	.2byte	0x12b
+	.4byte	0xdc5
+	.4byte	.LFB315
+	.4byte	.LFE315-.LFB315
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2d2c
+	.uleb128 0x44
+	.4byte	.LVL1706
+	.4byte	0x6e77
+	.uleb128 0x32
+	.4byte	.LVL1707
+	.4byte	0x2edb
+	.4byte	0x2cde
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1708
+	.4byte	0x34ac
+	.4byte	0x2cf2
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1709
+	.4byte	0x5313
+	.uleb128 0x32
+	.4byte	.LVL1710
+	.4byte	0x4f7f
+	.4byte	0x2d0f
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1711
+	.4byte	0x4d0e
+	.uleb128 0x2d
+	.4byte	.LVL1712
+	.4byte	0x32d7
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR53
+	.byte	0
+	.byte	0
+	.uleb128 0x52
+	.4byte	.LASF670
+	.byte	0x5
+	.2byte	0x120
+	.byte	0x1
+	.uleb128 0x2b
+	.4byte	.LASF611
+	.byte	0x5
+	.byte	0xd2
+	.4byte	0xdc5
+	.4byte	.LFB313
+	.4byte	.LFE313-.LFB313
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2e94
+	.uleb128 0x2c
+	.4byte	.LASF612
+	.byte	0x5
+	.byte	0xd2
+	.4byte	0x1d79
+	.4byte	.LLST269
+	.uleb128 0x2c
+	.4byte	.LASF613
+	.byte	0x5
+	.byte	0xd2
+	.4byte	0xdc5
+	.4byte	.LLST270
+	.uleb128 0x30
+	.4byte	.LASF594
+	.byte	0x5
+	.byte	0xd4
+	.4byte	0xdba
+	.4byte	.LLST271
+	.uleb128 0x30
+	.4byte	.LASF569
+	.byte	0x5
+	.byte	0xd5
+	.4byte	0xdba
+	.4byte	.LLST272
+	.uleb128 0x3b
+	.ascii	"req\000"
+	.byte	0x5
+	.byte	0xd5
+	.4byte	0xdba
+	.4byte	.LLST273
+	.uleb128 0x30
+	.4byte	.LASF592
+	.byte	0x5
+	.byte	0xd6
+	.4byte	0xdba
+	.4byte	.LLST274
+	.uleb128 0x30
+	.4byte	.LASF382
+	.byte	0x5
+	.byte	0xd6
+	.4byte	0xdba
+	.4byte	.LLST275
+	.uleb128 0x30
+	.4byte	.LASF380
+	.byte	0x5
+	.byte	0xd6
+	.4byte	0xdba
+	.4byte	.LLST276
+	.uleb128 0x30
+	.4byte	.LASF614
+	.byte	0x5
+	.byte	0xd7
+	.4byte	0xdc5
+	.4byte	.LLST277
+	.uleb128 0x30
+	.4byte	.LASF615
+	.byte	0x5
+	.byte	0xd8
+	.4byte	0xdc5
+	.4byte	.LLST278
+	.uleb128 0x53
+	.4byte	.LASF616
+	.byte	0x5
+	.byte	0xd9
+	.4byte	0xdc5
+	.sleb128 -1
+	.uleb128 0x30
+	.4byte	.LASF596
+	.byte	0x5
+	.byte	0xda
+	.4byte	0x2a63
+	.4byte	.LLST279
+	.uleb128 0x54
+	.4byte	.LASF617
+	.byte	0x5
+	.byte	0xe1
+	.uleb128 0x54
+	.4byte	.LASF618
+	.byte	0x5
+	.byte	0xe5
+	.uleb128 0x55
+	.4byte	.LASF688
+	.byte	0x5
+	.2byte	0x117
+	.4byte	.L976
+	.uleb128 0x44
+	.4byte	.LVL1098
+	.4byte	0x2e94
+	.uleb128 0x32
+	.4byte	.LVL1107
+	.4byte	0x26b9
+	.4byte	0x2e43
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -52
+	.byte	0x6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1120
+	.4byte	0x615a
+	.4byte	0x2e5e
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x91
+	.sleb128 -52
+	.byte	0x6
+	.byte	0x9
+	.byte	0xea
+	.byte	0x24
+	.byte	0x9
+	.byte	0xf4
+	.byte	0x25
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1126
+	.4byte	0x468d
+	.4byte	0x2e78
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1129
+	.4byte	0x308c
+	.uleb128 0x44
+	.4byte	.LVL1133
+	.4byte	0x5d9a
+	.uleb128 0x44
+	.4byte	.LVL1135
+	.4byte	0x2e94
+	.byte	0
+	.uleb128 0x42
+	.4byte	.LASF620
+	.byte	0x5
+	.byte	0xc9
+	.4byte	.LFB312
+	.4byte	.LFE312-.LFB312
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2edb
+	.uleb128 0x32
+	.4byte	.LVL1093
+	.4byte	0x230c
+	.4byte	0x2ebd
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1094
+	.4byte	0x230c
+	.4byte	0x2ed1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.uleb128 0x56
+	.4byte	.LVL1095
+	.4byte	0x31cf
+	.byte	0
+	.uleb128 0x2b
+	.4byte	.LASF621
+	.byte	0x5
+	.byte	0x6f
+	.4byte	0x50
+	.4byte	.LFB311
+	.4byte	.LFE311-.LFB311
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3077
+	.uleb128 0x2c
+	.4byte	.LASF622
+	.byte	0x5
+	.byte	0x6f
+	.4byte	0x50
+	.4byte	.LLST389
+	.uleb128 0x3b
+	.ascii	"i\000"
+	.byte	0x5
+	.byte	0x71
+	.4byte	0xdba
+	.4byte	.LLST390
+	.uleb128 0x30
+	.4byte	.LASF623
+	.byte	0x5
+	.byte	0x71
+	.4byte	0xdba
+	.4byte	.LLST391
+	.uleb128 0x29
+	.4byte	.LASF624
+	.byte	0x5
+	.byte	0x72
+	.4byte	0xdc5
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x30
+	.4byte	.LASF625
+	.byte	0x5
+	.byte	0x73
+	.4byte	0xdc5
+	.4byte	.LLST392
+	.uleb128 0x29
+	.4byte	.LASF612
+	.byte	0x5
+	.byte	0x74
+	.4byte	0x1d79
+	.uleb128 0x6
+	.byte	0x3
+	.4byte	g_gc_temp_superblock
+	.byte	0x9f
+	.uleb128 0x30
+	.4byte	.LASF626
+	.byte	0x5
+	.byte	0x75
+	.4byte	0x1db2
+	.4byte	.LLST393
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x3087
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.9940
+	.uleb128 0x32
+	.4byte	.LVL1660
+	.4byte	0x2d35
+	.4byte	0x2f80
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1661
+	.4byte	0x4f7f
+	.4byte	0x2f93
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1662
+	.4byte	0x6828
+	.uleb128 0x44
+	.4byte	.LVL1663
+	.4byte	0x65f0
+	.uleb128 0x44
+	.4byte	.LVL1667
+	.4byte	0x6e77
+	.uleb128 0x32
+	.4byte	.LVL1668
+	.4byte	0x9222
+	.4byte	0x2fd4
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR173
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xa2
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1670
+	.4byte	0x31f2
+	.4byte	0x2fe8
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x9
+	.byte	0xff
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1671
+	.4byte	0x5d75
+	.uleb128 0x44
+	.4byte	.LVL1673
+	.4byte	0x5313
+	.uleb128 0x44
+	.4byte	.LVL1674
+	.4byte	0x4d0e
+	.uleb128 0x32
+	.4byte	.LVL1677
+	.4byte	0x9222
+	.4byte	0x3029
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR173
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xa8
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1678
+	.4byte	0x5212
+	.4byte	0x3042
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1679
+	.4byte	0x6122
+	.uleb128 0x32
+	.4byte	.LVL1681
+	.4byte	0x5212
+	.4byte	0x3064
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 4
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1683
+	.4byte	0x31f2
+	.uleb128 0x44
+	.4byte	.LVL1687
+	.4byte	0x5d9a
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xea
+	.4byte	0x3087
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x12
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x3077
+	.uleb128 0x42
+	.4byte	.LASF627
+	.byte	0x5
+	.byte	0x54
+	.4byte	.LFB310
+	.4byte	.LFE310-.LFB310
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3101
+	.uleb128 0x2c
+	.4byte	.LASF628
+	.byte	0x5
+	.byte	0x54
+	.4byte	0xdc5
+	.4byte	.LLST132
+	.uleb128 0x2c
+	.4byte	.LASF391
+	.byte	0x5
+	.byte	0x54
+	.4byte	0xdc5
+	.4byte	.LLST133
+	.uleb128 0x2f
+	.ascii	"lpa\000"
+	.byte	0x5
+	.byte	0x54
+	.4byte	0xdc5
+	.4byte	.LLST134
+	.uleb128 0x30
+	.4byte	.LASF629
+	.byte	0x5
+	.byte	0x56
+	.4byte	0xdba
+	.4byte	.LLST135
+	.uleb128 0x3b
+	.ascii	"i\000"
+	.byte	0x5
+	.byte	0x57
+	.4byte	0xdba
+	.4byte	.LLST136
+	.uleb128 0x34
+	.4byte	.LVL527
+	.4byte	0x6122
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x8
+	.byte	0x75
+	.sleb128 0
+	.byte	0x9
+	.byte	0xea
+	.byte	0x24
+	.byte	0x9
+	.byte	0xf4
+	.byte	0x25
+	.byte	0
+	.byte	0
+	.uleb128 0x2b
+	.4byte	.LASF630
+	.byte	0x5
+	.byte	0x49
+	.4byte	0xdc5
+	.4byte	.LFB309
+	.4byte	.LFE309-.LFB309
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3137
+	.uleb128 0x2f
+	.ascii	"blk\000"
+	.byte	0x5
+	.byte	0x49
+	.4byte	0xdba
+	.4byte	.LLST130
+	.uleb128 0x3b
+	.ascii	"i\000"
+	.byte	0x5
+	.byte	0x4b
+	.4byte	0xdba
+	.4byte	.LLST131
+	.byte	0
+	.uleb128 0x42
+	.4byte	.LASF631
+	.byte	0x5
+	.byte	0x38
+	.4byte	.LFB308
+	.4byte	.LFE308-.LFB308
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3183
+	.uleb128 0x57
+	.ascii	"req\000"
+	.byte	0x5
+	.byte	0x38
+	.4byte	0x19f9
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x58
+	.4byte	.LASF632
+	.byte	0x5
+	.byte	0x38
+	.4byte	0xdc5
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3b
+	.ascii	"i\000"
+	.byte	0x5
+	.byte	0x3a
+	.4byte	0xdba
+	.4byte	.LLST128
+	.uleb128 0x30
+	.4byte	.LASF633
+	.byte	0x5
+	.byte	0x3b
+	.4byte	0xdba
+	.4byte	.LLST129
+	.byte	0
+	.uleb128 0x42
+	.4byte	.LASF634
+	.byte	0x5
+	.byte	0x29
+	.4byte	.LFB307
+	.4byte	.LFE307-.LFB307
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x31cf
+	.uleb128 0x57
+	.ascii	"req\000"
+	.byte	0x5
+	.byte	0x29
+	.4byte	0x19f9
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x58
+	.4byte	.LASF632
+	.byte	0x5
+	.byte	0x29
+	.4byte	0xdc5
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3b
+	.ascii	"i\000"
+	.byte	0x5
+	.byte	0x2b
+	.4byte	0xdba
+	.4byte	.LLST126
+	.uleb128 0x30
+	.4byte	.LASF633
+	.byte	0x5
+	.byte	0x2c
+	.4byte	0xdba
+	.4byte	.LLST127
+	.byte	0
+	.uleb128 0x42
+	.4byte	.LASF635
+	.byte	0x5
+	.byte	0x15
+	.4byte	.LFB306
+	.4byte	.LFE306-.LFB306
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x31f2
+	.uleb128 0x3b
+	.ascii	"i\000"
+	.byte	0x5
+	.byte	0x17
+	.4byte	0xdba
+	.4byte	.LLST125
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF636
+	.byte	0x2
+	.2byte	0xa93
+	.4byte	0x50
+	.4byte	.LFB305
+	.4byte	.LFE305-.LFB305
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3282
+	.uleb128 0x4f
+	.4byte	.LASF623
+	.byte	0x2
+	.2byte	0xa93
+	.4byte	0xdba
+	.4byte	.LLST307
+	.uleb128 0x50
+	.ascii	"ret\000"
+	.byte	0x2
+	.2byte	0xa95
+	.4byte	0x50
+	.4byte	.LLST308
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x3292
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.9870
+	.uleb128 0x32
+	.4byte	.LVL1257
+	.4byte	0x9222
+	.4byte	0x3258
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC98
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1261
+	.4byte	0x9222
+	.4byte	0x3278
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR160
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1264
+	.4byte	0x3297
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xea
+	.4byte	0x3292
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x13
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x3282
+	.uleb128 0x46
+	.4byte	.LASF637
+	.byte	0x2
+	.2byte	0xa7e
+	.4byte	0x50
+	.byte	0x1
+	.4byte	0x32c2
+	.uleb128 0x47
+	.4byte	.LASF623
+	.byte	0x2
+	.2byte	0xa7e
+	.4byte	0xdba
+	.uleb128 0x4b
+	.4byte	.LASF574
+	.4byte	0x32d2
+	.4byte	.LASF637
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xea
+	.4byte	0x32d2
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0xf
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x32c2
+	.uleb128 0x45
+	.4byte	.LASF638
+	.byte	0x2
+	.2byte	0xa5e
+	.4byte	0xdc5
+	.4byte	.LFB303
+	.4byte	.LFE303-.LFB303
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x33c9
+	.uleb128 0x4f
+	.4byte	.LASF639
+	.byte	0x2
+	.2byte	0xa5e
+	.4byte	0x1d79
+	.4byte	.LLST122
+	.uleb128 0x51
+	.4byte	.LASF594
+	.byte	0x2
+	.2byte	0xa60
+	.4byte	0xdba
+	.4byte	.LLST123
+	.uleb128 0x51
+	.4byte	.LASF640
+	.byte	0x2
+	.2byte	0xa61
+	.4byte	0xdc5
+	.4byte	.LLST124
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x3087
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.9850
+	.uleb128 0x32
+	.4byte	.LVL490
+	.4byte	0x9222
+	.4byte	0x3357
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR90
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xa63
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL491
+	.4byte	0x9222
+	.4byte	0x337e
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR90
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xa64
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL492
+	.4byte	0x9222
+	.4byte	0x33a5
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR90
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xa65
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL496
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR90
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xa7a
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF641
+	.byte	0x2
+	.2byte	0xa46
+	.4byte	0x50
+	.4byte	.LFB302
+	.4byte	.LFE302-.LFB302
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3497
+	.uleb128 0x4f
+	.4byte	.LASF639
+	.byte	0x2
+	.2byte	0xa46
+	.4byte	0x1d79
+	.4byte	.LLST374
+	.uleb128 0x28
+	.4byte	.LASF623
+	.byte	0x2
+	.2byte	0xa48
+	.4byte	0xdba
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x34a7
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.9843
+	.uleb128 0x32
+	.4byte	.LVL1593
+	.4byte	0x9222
+	.4byte	0x3437
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR169
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xa49
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1594
+	.4byte	0x5d75
+	.4byte	0x344b
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1595
+	.4byte	0x3297
+	.uleb128 0x32
+	.4byte	.LVL1596
+	.4byte	0x34ac
+	.4byte	0x3468
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1597
+	.4byte	0x5313
+	.uleb128 0x32
+	.4byte	.LVL1598
+	.4byte	0x4f7f
+	.4byte	0x3484
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1599
+	.4byte	0x4d0e
+	.uleb128 0x44
+	.4byte	.LVL1601
+	.4byte	0x5d9a
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xea
+	.4byte	0x34a7
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x3497
+	.uleb128 0x59
+	.4byte	.LASF642
+	.byte	0x2
+	.2byte	0x9e2
+	.4byte	0x50
+	.4byte	.LFB301
+	.4byte	.LFE301-.LFB301
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3747
+	.uleb128 0x5a
+	.ascii	"p\000"
+	.byte	0x2
+	.2byte	0x9e2
+	.4byte	0x1d79
+	.4byte	.LLST292
+	.uleb128 0x51
+	.4byte	.LASF643
+	.byte	0x2
+	.2byte	0x9e4
+	.4byte	0xdba
+	.4byte	.LLST293
+	.uleb128 0x48
+	.4byte	.LASF592
+	.byte	0x2
+	.2byte	0x9e5
+	.4byte	0xdba
+	.uleb128 0x51
+	.4byte	.LASF569
+	.byte	0x2
+	.2byte	0x9e5
+	.4byte	0xdba
+	.4byte	.LLST294
+	.uleb128 0x50
+	.ascii	"n\000"
+	.byte	0x2
+	.2byte	0x9e5
+	.4byte	0xdba
+	.4byte	.LLST295
+	.uleb128 0x51
+	.4byte	.LASF594
+	.byte	0x2
+	.2byte	0x9e5
+	.4byte	0xdba
+	.4byte	.LLST296
+	.uleb128 0x51
+	.4byte	.LASF644
+	.byte	0x2
+	.2byte	0x9e6
+	.4byte	0x50
+	.4byte	.LLST297
+	.uleb128 0x51
+	.4byte	.LASF645
+	.byte	0x2
+	.2byte	0x9e7
+	.4byte	0xdba
+	.4byte	.LLST298
+	.uleb128 0x4a
+	.4byte	.LASF646
+	.byte	0x2
+	.2byte	0x9e8
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x3757
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.9822
+	.uleb128 0x5b
+	.4byte	0x4ad9
+	.4byte	.LBB243
+	.4byte	.Ldebug_ranges0+0xd0
+	.byte	0x2
+	.2byte	0xa18
+	.4byte	0x3593
+	.uleb128 0x5c
+	.4byte	0x4af2
+	.4byte	.LLST299
+	.uleb128 0x5c
+	.4byte	0x4ae6
+	.4byte	.LLST300
+	.uleb128 0x34
+	.4byte	.LVL1213
+	.4byte	0x8420
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x3c
+	.4byte	0x4af2
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1184
+	.4byte	0x9222
+	.4byte	0x35ba
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR158
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x9e9
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1188
+	.4byte	0x5b5f
+	.4byte	0x35d1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR47
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1190
+	.4byte	0x9222
+	.4byte	0x35f8
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR158
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x9f2
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1191
+	.4byte	0x3ec7
+	.4byte	0x360c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1192
+	.4byte	0x5d75
+	.4byte	0x3620
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1193
+	.4byte	0x9222
+	.4byte	0x3647
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR158
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x9fd
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1196
+	.4byte	0x9222
+	.4byte	0x366e
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR158
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xa00
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1198
+	.4byte	0x9222
+	.4byte	0x3695
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR158
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xa0b
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1199
+	.4byte	0x9222
+	.4byte	0x36bc
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR158
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xa0d
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1200
+	.4byte	0x4ad9
+	.4byte	0x36d5
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1204
+	.4byte	0x2464
+	.4byte	0x36e9
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1206
+	.4byte	0x38bf
+	.4byte	0x36fd
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1207
+	.4byte	0x65f0
+	.uleb128 0x32
+	.4byte	.LVL1208
+	.4byte	0x5d75
+	.4byte	0x371a
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1218
+	.4byte	0x6828
+	.uleb128 0x34
+	.4byte	.LVL1222
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR158
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xa42
+	.byte	0
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xea
+	.4byte	0x3757
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x18
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x3747
+	.uleb128 0x46
+	.4byte	.LASF647
+	.byte	0x2
+	.2byte	0x9d9
+	.4byte	0x50
+	.byte	0x1
+	.4byte	0x377a
+	.uleb128 0x47
+	.4byte	.LASF623
+	.byte	0x2
+	.2byte	0x9d9
+	.4byte	0xdba
+	.byte	0
+	.uleb128 0x59
+	.4byte	.LASF648
+	.byte	0x2
+	.2byte	0x98e
+	.4byte	0xdba
+	.4byte	.LFB299
+	.4byte	.LFE299-.LFB299
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x383b
+	.uleb128 0x51
+	.4byte	.LASF649
+	.byte	0x2
+	.2byte	0x990
+	.4byte	0xdba
+	.4byte	.LLST113
+	.uleb128 0x51
+	.4byte	.LASF650
+	.byte	0x2
+	.2byte	0x991
+	.4byte	0xdba
+	.4byte	.LLST114
+	.uleb128 0x51
+	.4byte	.LASF651
+	.byte	0x2
+	.2byte	0x992
+	.4byte	0xdba
+	.4byte	.LLST115
+	.uleb128 0x51
+	.4byte	.LASF652
+	.byte	0x2
+	.2byte	0x993
+	.4byte	0x1cc9
+	.4byte	.LLST116
+	.uleb128 0x51
+	.4byte	.LASF653
+	.byte	0x2
+	.2byte	0x994
+	.4byte	0xdba
+	.4byte	.LLST117
+	.uleb128 0x51
+	.4byte	.LASF654
+	.byte	0x2
+	.2byte	0x995
+	.4byte	0xdba
+	.4byte	.LLST118
+	.uleb128 0x50
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x996
+	.4byte	0xdc5
+	.4byte	.LLST119
+	.uleb128 0x44
+	.4byte	.LVL470
+	.4byte	0x383b
+	.uleb128 0x44
+	.4byte	.LVL476
+	.4byte	0x3894
+	.uleb128 0x34
+	.4byte	.LVL478
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC72
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 4
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF655
+	.byte	0x2
+	.2byte	0x979
+	.4byte	0xdba
+	.4byte	.LFB298
+	.4byte	.LFE298-.LFB298
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3894
+	.uleb128 0x4f
+	.4byte	.LASF236
+	.byte	0x2
+	.2byte	0x979
+	.4byte	0xdba
+	.4byte	.LLST102
+	.uleb128 0x51
+	.4byte	.LASF656
+	.byte	0x2
+	.2byte	0x97b
+	.4byte	0xdba
+	.4byte	.LLST103
+	.uleb128 0x51
+	.4byte	.LASF608
+	.byte	0x2
+	.2byte	0x97c
+	.4byte	0xdba
+	.4byte	.LLST104
+	.uleb128 0x50
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x97d
+	.4byte	0xdba
+	.4byte	.LLST105
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF657
+	.byte	0x2
+	.2byte	0x970
+	.4byte	0xdba
+	.4byte	.LFB297
+	.4byte	.LFE297-.LFB297
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x38bf
+	.uleb128 0x51
+	.4byte	.LASF651
+	.byte	0x2
+	.2byte	0x972
+	.4byte	0xdba
+	.4byte	.LLST101
+	.byte	0
+	.uleb128 0x59
+	.4byte	.LASF658
+	.byte	0x2
+	.2byte	0x960
+	.4byte	0x50
+	.4byte	.LFB296
+	.4byte	.LFE296-.LFB296
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3937
+	.uleb128 0x4f
+	.4byte	.LASF623
+	.byte	0x2
+	.2byte	0x960
+	.4byte	0xdba
+	.4byte	.LLST97
+	.uleb128 0x51
+	.4byte	.LASF592
+	.byte	0x2
+	.2byte	0x962
+	.4byte	0xdba
+	.4byte	.LLST98
+	.uleb128 0x51
+	.4byte	.LASF594
+	.byte	0x2
+	.2byte	0x962
+	.4byte	0xdba
+	.4byte	.LLST99
+	.uleb128 0x51
+	.4byte	.LASF375
+	.byte	0x2
+	.2byte	0x963
+	.4byte	0xdba
+	.4byte	.LLST100
+	.uleb128 0x32
+	.4byte	.LVL284
+	.4byte	0x6192
+	.4byte	0x392d
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL285
+	.4byte	0x67c5
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF659
+	.byte	0x2
+	.2byte	0x901
+	.4byte	0x50
+	.byte	0x1
+	.4byte	0x3961
+	.uleb128 0x49
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x903
+	.4byte	0x50
+	.uleb128 0x4c
+	.uleb128 0x48
+	.4byte	.LASF612
+	.byte	0x2
+	.2byte	0x928
+	.4byte	0x1d79
+	.byte	0
+	.byte	0
+	.uleb128 0x5d
+	.4byte	.LASF660
+	.byte	0x2
+	.2byte	0x8e2
+	.4byte	.LFB294
+	.4byte	.LFE294-.LFB294
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3a30
+	.uleb128 0x5e
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x8e4
+	.4byte	0x50
+	.uleb128 0x1
+	.byte	0x55
+	.uleb128 0x5e
+	.ascii	"ppa\000"
+	.byte	0x2
+	.2byte	0x8e5
+	.4byte	0xdc5
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -28
+	.uleb128 0x51
+	.4byte	.LASF661
+	.byte	0x2
+	.2byte	0x8e6
+	.4byte	0x2a63
+	.4byte	.LLST237
+	.uleb128 0x32
+	.4byte	.LVL907
+	.4byte	0x9222
+	.4byte	0x39bf
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC88
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL909
+	.4byte	0x5212
+	.4byte	0x39de
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -28
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL910
+	.4byte	0x9222
+	.4byte	0x39f8
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL912
+	.4byte	0x26b9
+	.4byte	0x3a16
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL913
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC90
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x5d
+	.4byte	.LASF662
+	.byte	0x2
+	.2byte	0x8ae
+	.4byte	.LFB293
+	.4byte	.LFE293-.LFB293
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3b83
+	.uleb128 0x50
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x8b0
+	.4byte	0xdba
+	.4byte	.LLST264
+	.uleb128 0x50
+	.ascii	"lpn\000"
+	.byte	0x2
+	.2byte	0x8b1
+	.4byte	0xdc5
+	.4byte	.LLST265
+	.uleb128 0x28
+	.4byte	.LASF663
+	.byte	0x2
+	.2byte	0x8b2
+	.4byte	0xdc5
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x50
+	.ascii	"blk\000"
+	.byte	0x2
+	.2byte	0x8b3
+	.4byte	0xdba
+	.4byte	.LLST266
+	.uleb128 0x51
+	.4byte	.LASF664
+	.byte	0x2
+	.2byte	0x8b4
+	.4byte	0xdba
+	.4byte	.LLST267
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x3b93
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.9738
+	.uleb128 0x5f
+	.4byte	.LBB238
+	.4byte	.LBE238-.LBB238
+	.4byte	0x3ad9
+	.uleb128 0x51
+	.4byte	.LASF236
+	.byte	0x2
+	.2byte	0x8d1
+	.4byte	0xdba
+	.4byte	.LLST268
+	.uleb128 0x34
+	.4byte	.LVL1078
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC93
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1071
+	.4byte	0x9222
+	.4byte	0x3af9
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC91
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR156
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1072
+	.4byte	0x230c
+	.4byte	0x3b1a
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x2000
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1083
+	.4byte	0x9222
+	.4byte	0x3b41
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR156
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x8df
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1085
+	.4byte	0x5212
+	.4byte	0x3b60
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1086
+	.4byte	0x6122
+	.uleb128 0x34
+	.4byte	.LVL1090
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC92
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xea
+	.4byte	0x3b93
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0xd
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x3b83
+	.uleb128 0x5d
+	.4byte	.LASF665
+	.byte	0x2
+	.2byte	0x88f
+	.4byte	.LFB292
+	.4byte	.LFE292-.LFB292
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3c9a
+	.uleb128 0x50
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x891
+	.4byte	0xdba
+	.4byte	.LLST371
+	.uleb128 0x50
+	.ascii	"lpn\000"
+	.byte	0x2
+	.2byte	0x892
+	.4byte	0xdc5
+	.4byte	.LLST372
+	.uleb128 0x28
+	.4byte	.LASF663
+	.byte	0x2
+	.2byte	0x893
+	.4byte	0xdc5
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x50
+	.ascii	"blk\000"
+	.byte	0x2
+	.2byte	0x894
+	.4byte	0xdba
+	.4byte	.LLST373
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x3caa
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.9722
+	.uleb128 0x32
+	.4byte	.LVL1575
+	.4byte	0x9222
+	.4byte	0x3c1a
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC91
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR168
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1576
+	.4byte	0x230c
+	.4byte	0x3c2e
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1580
+	.4byte	0x5212
+	.4byte	0x3c4d
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1581
+	.4byte	0x6122
+	.uleb128 0x32
+	.4byte	.LVL1585
+	.4byte	0x9222
+	.4byte	0x3c73
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC102
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1586
+	.4byte	0x3297
+	.4byte	0x3c87
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1587
+	.4byte	0x5313
+	.uleb128 0x44
+	.4byte	.LVL1588
+	.4byte	0x4d0e
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xea
+	.4byte	0x3caa
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x14
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x3c9a
+	.uleb128 0x5d
+	.4byte	.LASF666
+	.byte	0x2
+	.2byte	0x86b
+	.4byte	.LFB291
+	.4byte	.LFE291-.LFB291
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3d52
+	.uleb128 0x4f
+	.4byte	.LASF612
+	.byte	0x2
+	.2byte	0x86b
+	.4byte	0x1d79
+	.4byte	.LLST339
+	.uleb128 0x28
+	.4byte	.LASF667
+	.byte	0x2
+	.2byte	0x86d
+	.4byte	0xde6
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -44
+	.uleb128 0x51
+	.4byte	.LASF596
+	.byte	0x2
+	.2byte	0x86e
+	.4byte	0x2a63
+	.4byte	.LLST340
+	.uleb128 0x51
+	.4byte	.LASF668
+	.byte	0x2
+	.2byte	0x86f
+	.4byte	0x50
+	.4byte	.LLST341
+	.uleb128 0x60
+	.4byte	.LASF384
+	.byte	0x2
+	.2byte	0x870
+	.4byte	0xdc5
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1429
+	.4byte	0x32d7
+	.4byte	0x3d25
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1432
+	.4byte	0x251a
+	.4byte	0x3d48
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -44
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1433
+	.4byte	0x31f2
+	.byte	0
+	.uleb128 0x61
+	.4byte	.LASF669
+	.byte	0x2
+	.2byte	0x851
+	.4byte	.LFB290
+	.4byte	.LFE290-.LFB290
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3da3
+	.uleb128 0x32
+	.4byte	.LVL1554
+	.4byte	0x4fd7
+	.4byte	0x3d86
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL1555
+	.4byte	0x230c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x200
+	.byte	0
+	.byte	0
+	.uleb128 0x52
+	.4byte	.LASF671
+	.byte	0x2
+	.2byte	0x83d
+	.byte	0x1
+	.uleb128 0x59
+	.4byte	.LASF672
+	.byte	0x2
+	.2byte	0x812
+	.4byte	0x50
+	.4byte	.LFB288
+	.4byte	.LFE288-.LFB288
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3eb2
+	.uleb128 0x51
+	.4byte	.LASF649
+	.byte	0x2
+	.2byte	0x814
+	.4byte	0xdba
+	.4byte	.LLST258
+	.uleb128 0x51
+	.4byte	.LASF592
+	.byte	0x2
+	.2byte	0x814
+	.4byte	0xdba
+	.4byte	.LLST259
+	.uleb128 0x51
+	.4byte	.LASF594
+	.byte	0x2
+	.2byte	0x814
+	.4byte	0xdba
+	.4byte	.LLST260
+	.uleb128 0x51
+	.4byte	.LASF375
+	.byte	0x2
+	.2byte	0x814
+	.4byte	0xdba
+	.4byte	.LLST261
+	.uleb128 0x51
+	.4byte	.LASF673
+	.byte	0x2
+	.2byte	0x815
+	.4byte	0xdba
+	.4byte	.LLST262
+	.uleb128 0x51
+	.4byte	.LASF674
+	.byte	0x2
+	.2byte	0x815
+	.4byte	0xdba
+	.4byte	.LLST263
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x3ec2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.9697
+	.uleb128 0x32
+	.4byte	.LVL1046
+	.4byte	0x230c
+	.4byte	0x3e49
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1050
+	.4byte	0x6192
+	.4byte	0x3e5d
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1051
+	.4byte	0x67c5
+	.uleb128 0x32
+	.4byte	.LVL1059
+	.4byte	0x5d9a
+	.4byte	0x3e7a
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1066
+	.4byte	0x5d75
+	.4byte	0x3e8e
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL1068
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR155
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x839
+	.byte	0
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xea
+	.4byte	0x3ec2
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x11
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x3eb2
+	.uleb128 0x45
+	.4byte	.LASF675
+	.byte	0x2
+	.2byte	0x7fc
+	.4byte	0x50
+	.4byte	.LFB287
+	.4byte	.LFE287-.LFB287
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3f5d
+	.uleb128 0x5a
+	.ascii	"p\000"
+	.byte	0x2
+	.2byte	0x7fc
+	.4byte	0x1d79
+	.4byte	.LLST95
+	.uleb128 0x51
+	.4byte	.LASF592
+	.byte	0x2
+	.2byte	0x7fe
+	.4byte	0xdba
+	.4byte	.LLST96
+	.uleb128 0x28
+	.4byte	.LASF594
+	.byte	0x2
+	.2byte	0x7fe
+	.4byte	0xdba
+	.uleb128 0x1
+	.byte	0x5b
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x32d2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.9676
+	.uleb128 0x32
+	.4byte	.LVL271
+	.4byte	0x9222
+	.4byte	0x3f43
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR61
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x800
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL274
+	.4byte	0x6192
+	.uleb128 0x34
+	.4byte	.LVL276
+	.4byte	0x67c5
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF676
+	.byte	0x2
+	.2byte	0x7ef
+	.4byte	0x50
+	.4byte	.LFB286
+	.4byte	.LFE286-.LFB286
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3fe1
+	.uleb128 0x32
+	.4byte	.LVL1691
+	.4byte	0x4007
+	.4byte	0x3f8b
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1692
+	.4byte	0x3fe1
+	.4byte	0x3f9f
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1693
+	.4byte	0x4007
+	.4byte	0x3fb3
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1694
+	.4byte	0x3fe1
+	.4byte	0x3fc7
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1695
+	.4byte	0x2d2c
+	.uleb128 0x34
+	.4byte	.LVL1696
+	.4byte	0x31f2
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x9
+	.byte	0xff
+	.byte	0
+	.byte	0
+	.uleb128 0x62
+	.4byte	.LASF712
+	.byte	0x2
+	.2byte	0x7dc
+	.byte	0x1
+	.4byte	0x4007
+	.uleb128 0x47
+	.4byte	.LASF639
+	.byte	0x2
+	.2byte	0x7dc
+	.4byte	0x1d79
+	.uleb128 0x48
+	.4byte	.LASF594
+	.byte	0x2
+	.2byte	0x7de
+	.4byte	0xdba
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF677
+	.byte	0x2
+	.2byte	0x677
+	.4byte	0x50
+	.4byte	.LFB284
+	.4byte	.LFE284-.LFB284
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4560
+	.uleb128 0x4f
+	.4byte	.LASF612
+	.byte	0x2
+	.2byte	0x677
+	.4byte	0x1d79
+	.4byte	.LLST313
+	.uleb128 0x51
+	.4byte	.LASF678
+	.byte	0x2
+	.2byte	0x679
+	.4byte	0xdba
+	.4byte	.LLST314
+	.uleb128 0x51
+	.4byte	.LASF679
+	.byte	0x2
+	.2byte	0x679
+	.4byte	0xdba
+	.4byte	.LLST315
+	.uleb128 0x51
+	.4byte	.LASF592
+	.byte	0x2
+	.2byte	0x67a
+	.4byte	0xdba
+	.4byte	.LLST316
+	.uleb128 0x51
+	.4byte	.LASF382
+	.byte	0x2
+	.2byte	0x67a
+	.4byte	0xdba
+	.4byte	.LLST317
+	.uleb128 0x51
+	.4byte	.LASF380
+	.byte	0x2
+	.2byte	0x67a
+	.4byte	0xdba
+	.4byte	.LLST318
+	.uleb128 0x51
+	.4byte	.LASF680
+	.byte	0x2
+	.2byte	0x67b
+	.4byte	0xdba
+	.4byte	.LLST319
+	.uleb128 0x51
+	.4byte	.LASF681
+	.byte	0x2
+	.2byte	0x67b
+	.4byte	0xdba
+	.4byte	.LLST320
+	.uleb128 0x51
+	.4byte	.LASF594
+	.byte	0x2
+	.2byte	0x67c
+	.4byte	0xdba
+	.4byte	.LLST321
+	.uleb128 0x51
+	.4byte	.LASF682
+	.byte	0x2
+	.2byte	0x67d
+	.4byte	0x50
+	.4byte	.LLST322
+	.uleb128 0x51
+	.4byte	.LASF683
+	.byte	0x2
+	.2byte	0x67d
+	.4byte	0x50
+	.4byte	.LLST322
+	.uleb128 0x51
+	.4byte	.LASF569
+	.byte	0x2
+	.2byte	0x67e
+	.4byte	0xdba
+	.4byte	.LLST324
+	.uleb128 0x50
+	.ascii	"n\000"
+	.byte	0x2
+	.2byte	0x67e
+	.4byte	0xdba
+	.4byte	.LLST325
+	.uleb128 0x50
+	.ascii	"req\000"
+	.byte	0x2
+	.2byte	0x67e
+	.4byte	0xdba
+	.4byte	.LLST326
+	.uleb128 0x50
+	.ascii	"lpa\000"
+	.byte	0x2
+	.2byte	0x67f
+	.4byte	0xdc5
+	.4byte	.LLST327
+	.uleb128 0x28
+	.4byte	.LASF663
+	.byte	0x2
+	.2byte	0x67f
+	.4byte	0xdc5
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -44
+	.uleb128 0x28
+	.4byte	.LASF624
+	.byte	0x2
+	.2byte	0x67f
+	.4byte	0xdc5
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -40
+	.uleb128 0x28
+	.4byte	.LASF614
+	.byte	0x2
+	.2byte	0x67f
+	.4byte	0xdc5
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x51
+	.4byte	.LASF629
+	.byte	0x2
+	.2byte	0x680
+	.4byte	0xdba
+	.4byte	.LLST328
+	.uleb128 0x51
+	.4byte	.LASF684
+	.byte	0x2
+	.2byte	0x680
+	.4byte	0xdba
+	.4byte	.LLST329
+	.uleb128 0x51
+	.4byte	.LASF685
+	.byte	0x2
+	.2byte	0x681
+	.4byte	0xdc5
+	.4byte	.LLST330
+	.uleb128 0x51
+	.4byte	.LASF686
+	.byte	0x2
+	.2byte	0x682
+	.4byte	0xdba
+	.4byte	.LLST331
+	.uleb128 0x51
+	.4byte	.LASF596
+	.byte	0x2
+	.2byte	0x683
+	.4byte	0x2a63
+	.4byte	.LLST332
+	.uleb128 0x60
+	.4byte	.LASF687
+	.byte	0x2
+	.2byte	0x684
+	.4byte	0xdc5
+	.byte	0
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x4570
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.9619
+	.uleb128 0x55
+	.4byte	.LASF689
+	.byte	0x2
+	.2byte	0x713
+	.4byte	.L1149
+	.uleb128 0x55
+	.4byte	.LASF618
+	.byte	0x2
+	.2byte	0x71b
+	.4byte	.L1164
+	.uleb128 0x55
+	.4byte	.LASF690
+	.byte	0x2
+	.2byte	0x7ce
+	.4byte	.L1172
+	.uleb128 0x4a
+	.4byte	.LASF691
+	.byte	0x2
+	.2byte	0x7d8
+	.uleb128 0x3e
+	.4byte	.Ldebug_ranges0+0x120
+	.4byte	0x4213
+	.uleb128 0x51
+	.4byte	.LASF692
+	.byte	0x2
+	.2byte	0x6eb
+	.4byte	0xdc5
+	.4byte	.LLST333
+	.uleb128 0x51
+	.4byte	.LASF693
+	.byte	0x2
+	.2byte	0x6ec
+	.4byte	0xdc5
+	.4byte	.LLST334
+	.uleb128 0x34
+	.4byte	.LVL1344
+	.4byte	0x26b9
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x3e
+	.4byte	.Ldebug_ranges0+0x138
+	.4byte	0x42e8
+	.uleb128 0x51
+	.4byte	.LASF694
+	.byte	0x2
+	.2byte	0x746
+	.4byte	0xdc5
+	.4byte	.LLST335
+	.uleb128 0x51
+	.4byte	.LASF695
+	.byte	0x2
+	.2byte	0x747
+	.4byte	0xdc5
+	.4byte	.LLST336
+	.uleb128 0x32
+	.4byte	.LVL1388
+	.4byte	0x26b9
+	.4byte	0x4254
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1390
+	.4byte	0x31f2
+	.uleb128 0x32
+	.4byte	.LVL1396
+	.4byte	0x5212
+	.4byte	0x427c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -44
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1398
+	.4byte	0x60dd
+	.4byte	0x4290
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1399
+	.4byte	0x4575
+	.4byte	0x42a4
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1401
+	.4byte	0x26b9
+	.4byte	0x42bc
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1403
+	.4byte	0x60dd
+	.4byte	0x42d0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x73
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL1404
+	.4byte	0x60dd
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -52
+	.byte	0x6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x5f
+	.4byte	.LBB271
+	.4byte	.LBE271-.LBB271
+	.4byte	0x4364
+	.uleb128 0x51
+	.4byte	.LASF696
+	.byte	0x2
+	.2byte	0x785
+	.4byte	0xdc5
+	.4byte	.LLST337
+	.uleb128 0x51
+	.4byte	.LASF695
+	.byte	0x2
+	.2byte	0x786
+	.4byte	0xdc5
+	.4byte	.LLST338
+	.uleb128 0x32
+	.4byte	.LVL1413
+	.4byte	0x26b9
+	.4byte	0x432d
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1414
+	.4byte	0x60dd
+	.4byte	0x4348
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x7d
+	.sleb128 0
+	.byte	0x6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL1416
+	.4byte	0x5212
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -40
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1293
+	.4byte	0x6011
+	.4byte	0x4377
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1299
+	.4byte	0x26b9
+	.4byte	0x4390
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1305
+	.4byte	0x615a
+	.uleb128 0x32
+	.4byte	.LVL1308
+	.4byte	0x468d
+	.4byte	0x43ad
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1312
+	.4byte	0x9222
+	.4byte	0x43d4
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR161
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x6aa
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1313
+	.4byte	0x9222
+	.4byte	0x43fb
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR161
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x6ab
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1325
+	.4byte	0x60dd
+	.4byte	0x4415
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1349
+	.4byte	0x4ec1
+	.4byte	0x442c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR144
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1352
+	.4byte	0x26b9
+	.4byte	0x4447
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -68
+	.byte	0x6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1372
+	.4byte	0x615a
+	.4byte	0x4461
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x8
+	.byte	0x74
+	.sleb128 0
+	.byte	0x9
+	.byte	0xea
+	.byte	0x24
+	.byte	0x9
+	.byte	0xf4
+	.byte	0x25
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1377
+	.4byte	0x31f2
+	.uleb128 0x32
+	.4byte	.LVL1382
+	.4byte	0x60dd
+	.4byte	0x4485
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x7d
+	.sleb128 0
+	.byte	0x6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1385
+	.4byte	0x5212
+	.4byte	0x44a4
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -40
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1386
+	.4byte	0x60dd
+	.4byte	0x44bf
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x7d
+	.sleb128 0
+	.byte	0x6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1391
+	.4byte	0x6122
+	.4byte	0x44d9
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x8
+	.byte	0x77
+	.sleb128 0
+	.byte	0x9
+	.byte	0xea
+	.byte	0x24
+	.byte	0x9
+	.byte	0xf4
+	.byte	0x25
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1394
+	.4byte	0x9222
+	.4byte	0x4500
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR161
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x7a5
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1408
+	.4byte	0x5212
+	.4byte	0x451f
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1409
+	.4byte	0x6122
+	.4byte	0x4539
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x8
+	.byte	0x77
+	.sleb128 0
+	.byte	0x9
+	.byte	0xea
+	.byte	0x24
+	.byte	0x9
+	.byte	0xf4
+	.byte	0x25
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1418
+	.4byte	0x9222
+	.4byte	0x4556
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC99
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1421
+	.4byte	0x31f2
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xea
+	.4byte	0x4570
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x15
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x4560
+	.uleb128 0x5d
+	.4byte	.LASF697
+	.byte	0x2
+	.2byte	0x65b
+	.4byte	.LFB283
+	.4byte	.LFE283-.LFB283
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x468d
+	.uleb128 0x5a
+	.ascii	"lpa\000"
+	.byte	0x2
+	.2byte	0x65b
+	.4byte	0xdc5
+	.4byte	.LLST231
+	.uleb128 0x4f
+	.4byte	.LASF663
+	.byte	0x2
+	.2byte	0x65b
+	.4byte	0xdc5
+	.4byte	.LLST232
+	.uleb128 0x51
+	.4byte	.LASF629
+	.byte	0x2
+	.2byte	0x65d
+	.4byte	0xdba
+	.4byte	.LLST233
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x32d2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.9585
+	.uleb128 0x3e
+	.4byte	.Ldebug_ranges0+0xa0
+	.4byte	0x4656
+	.uleb128 0x50
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x661
+	.4byte	0xdba
+	.4byte	.LLST234
+	.uleb128 0x51
+	.4byte	.LASF608
+	.byte	0x2
+	.2byte	0x662
+	.4byte	0xdba
+	.4byte	.LLST235
+	.uleb128 0x51
+	.4byte	.LASF236
+	.byte	0x2
+	.2byte	0x663
+	.4byte	0xdba
+	.4byte	.LLST236
+	.uleb128 0x32
+	.4byte	.LVL897
+	.4byte	0x5bca
+	.4byte	0x461e
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR47
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL898
+	.4byte	0x9222
+	.4byte	0x4645
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR146
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x667
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL899
+	.4byte	0x5d75
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL891
+	.4byte	0x6122
+	.4byte	0x4671
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9
+	.byte	0xea
+	.byte	0x24
+	.byte	0x9
+	.byte	0xf4
+	.byte	0x25
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL905
+	.4byte	0x5212
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -28
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x5d
+	.4byte	.LASF698
+	.byte	0x2
+	.2byte	0x647
+	.4byte	.LFB282
+	.4byte	.LFE282-.LFB282
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x46e2
+	.uleb128 0x63
+	.4byte	.LASF612
+	.byte	0x2
+	.2byte	0x647
+	.4byte	0x1d79
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4f
+	.4byte	.LASF380
+	.byte	0x2
+	.2byte	0x647
+	.4byte	0xdba
+	.4byte	.LLST90
+	.uleb128 0x4f
+	.4byte	.LASF382
+	.byte	0x2
+	.2byte	0x647
+	.4byte	0xdba
+	.4byte	.LLST91
+	.uleb128 0x51
+	.4byte	.LASF592
+	.byte	0x2
+	.2byte	0x649
+	.4byte	0xdba
+	.4byte	.LLST92
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF699
+	.byte	0x2
+	.2byte	0x63e
+	.4byte	0x50
+	.4byte	.LFB281
+	.4byte	.LFE281-.LFB281
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4719
+	.uleb128 0x44
+	.4byte	.LVL1037
+	.4byte	0x4719
+	.uleb128 0x34
+	.4byte	.LVL1038
+	.4byte	0x4791
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR144
+	.byte	0
+	.byte	0
+	.uleb128 0x5d
+	.4byte	.LASF700
+	.byte	0x2
+	.2byte	0x627
+	.4byte	.LFB280
+	.4byte	.LFE280-.LFB280
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4763
+	.uleb128 0x51
+	.4byte	.LASF330
+	.byte	0x2
+	.2byte	0x629
+	.4byte	0xdba
+	.4byte	.LLST257
+	.uleb128 0x32
+	.4byte	.LVL1034
+	.4byte	0x230c
+	.4byte	0x4752
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL1035
+	.4byte	0x230c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF701
+	.byte	0x2
+	.2byte	0x617
+	.4byte	0x50
+	.4byte	.LFB279
+	.4byte	.LFE279-.LFB279
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4791
+	.uleb128 0x34
+	.4byte	.LVL1033
+	.4byte	0x4791
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR149
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF702
+	.byte	0x2
+	.2byte	0x5b9
+	.4byte	0x50
+	.4byte	.LFB278
+	.4byte	.LFE278-.LFB278
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4934
+	.uleb128 0x4f
+	.4byte	.LASF703
+	.byte	0x2
+	.2byte	0x5b9
+	.4byte	0x4934
+	.4byte	.LLST249
+	.uleb128 0x51
+	.4byte	.LASF704
+	.byte	0x2
+	.2byte	0x5bb
+	.4byte	0xddb
+	.4byte	.LLST250
+	.uleb128 0x51
+	.4byte	.LASF299
+	.byte	0x2
+	.2byte	0x5bb
+	.4byte	0xddb
+	.4byte	.LLST251
+	.uleb128 0x51
+	.4byte	.LASF705
+	.byte	0x2
+	.2byte	0x5bc
+	.4byte	0xddb
+	.4byte	.LLST252
+	.uleb128 0x51
+	.4byte	.LASF330
+	.byte	0x2
+	.2byte	0x5bd
+	.4byte	0xdba
+	.4byte	.LLST253
+	.uleb128 0x28
+	.4byte	.LASF706
+	.byte	0x2
+	.2byte	0x5be
+	.4byte	0xff2
+	.uleb128 0x1
+	.byte	0x58
+	.uleb128 0x51
+	.4byte	.LASF310
+	.byte	0x2
+	.2byte	0x5bf
+	.4byte	0x10e9
+	.4byte	.LLST254
+	.uleb128 0x51
+	.4byte	.LASF311
+	.byte	0x2
+	.2byte	0x5c0
+	.4byte	0xff2
+	.4byte	.LLST255
+	.uleb128 0x28
+	.4byte	.LASF307
+	.byte	0x2
+	.2byte	0x5c1
+	.4byte	0xdba
+	.uleb128 0x1
+	.byte	0x5b
+	.uleb128 0x51
+	.4byte	.LASF707
+	.byte	0x2
+	.2byte	0x5c2
+	.4byte	0xdba
+	.4byte	.LLST256
+	.uleb128 0x28
+	.4byte	.LASF708
+	.byte	0x2
+	.2byte	0x5c3
+	.4byte	0x493a
+	.uleb128 0x1
+	.byte	0x57
+	.uleb128 0x32
+	.4byte	.LVL997
+	.4byte	0x230c
+	.4byte	0x4877
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x4
+	.byte	0x7b
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1002
+	.4byte	0x6011
+	.4byte	0x488a
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1008
+	.4byte	0x583d
+	.4byte	0x489e
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1009
+	.4byte	0x57e5
+	.4byte	0x48b2
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1010
+	.4byte	0x569b
+	.4byte	0x48c6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1011
+	.4byte	0x569b
+	.4byte	0x48da
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1014
+	.4byte	0x26b9
+	.4byte	0x48fb
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR108
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1019
+	.4byte	0x26b9
+	.4byte	0x4919
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL1023
+	.4byte	0x26b9
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x1040
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x1271
+	.uleb128 0x59
+	.4byte	.LASF709
+	.byte	0x2
+	.2byte	0x54f
+	.4byte	0x50
+	.4byte	.LFB277
+	.4byte	.LFE277-.LFB277
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4aae
+	.uleb128 0x51
+	.4byte	.LASF705
+	.byte	0x2
+	.2byte	0x551
+	.4byte	0xddb
+	.4byte	.LLST446
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x26b4
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.9522
+	.uleb128 0x32
+	.4byte	.LVL1970
+	.4byte	0x230c
+	.4byte	0x498c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1971
+	.4byte	0x6011
+	.4byte	0x499f
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1973
+	.4byte	0x9222
+	.4byte	0x49c6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR181
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x56c
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1974
+	.4byte	0x9222
+	.4byte	0x49ed
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR181
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x56e
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1976
+	.4byte	0x22a6
+	.4byte	0x4a07
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1977
+	.4byte	0x22a6
+	.uleb128 0x44
+	.4byte	.LVL1978
+	.4byte	0x22a6
+	.uleb128 0x32
+	.4byte	.LVL1980
+	.4byte	0x9222
+	.4byte	0x4a40
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR181
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x584
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1981
+	.4byte	0x3ec7
+	.4byte	0x4a57
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR51
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1982
+	.4byte	0x3ec7
+	.4byte	0x4a6b
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1983
+	.4byte	0x3ec7
+	.4byte	0x4a7f
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1984
+	.4byte	0x3ec7
+	.4byte	0x4a93
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL1986
+	.4byte	0x26b9
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF710
+	.byte	0x2
+	.2byte	0x54a
+	.4byte	0x50
+	.4byte	.LFB276
+	.4byte	.LFE276-.LFB276
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4ad9
+	.uleb128 0x4f
+	.4byte	.LASF711
+	.byte	0x2
+	.2byte	0x54a
+	.4byte	0xdba
+	.4byte	.LLST89
+	.byte	0
+	.uleb128 0x62
+	.4byte	.LASF713
+	.byte	0x2
+	.2byte	0x542
+	.byte	0x1
+	.4byte	0x4aff
+	.uleb128 0x47
+	.4byte	.LASF711
+	.byte	0x2
+	.2byte	0x542
+	.4byte	0xdba
+	.uleb128 0x47
+	.4byte	.LASF588
+	.byte	0x2
+	.2byte	0x542
+	.4byte	0x50
+	.byte	0
+	.uleb128 0x4e
+	.4byte	.LASF715
+	.byte	0x2
+	.2byte	0x535
+	.4byte	0x50
+	.byte	0x1
+	.uleb128 0x45
+	.4byte	.LASF716
+	.byte	0x2
+	.2byte	0x446
+	.4byte	0x50
+	.4byte	.LFB273
+	.4byte	.LFE273-.LFB273
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4d0e
+	.uleb128 0x51
+	.4byte	.LASF592
+	.byte	0x2
+	.2byte	0x448
+	.4byte	0xdba
+	.4byte	.LLST243
+	.uleb128 0x28
+	.4byte	.LASF717
+	.byte	0x2
+	.2byte	0x448
+	.4byte	0xdba
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -60
+	.uleb128 0x51
+	.4byte	.LASF388
+	.byte	0x2
+	.2byte	0x449
+	.4byte	0xdba
+	.4byte	.LLST244
+	.uleb128 0x51
+	.4byte	.LASF569
+	.byte	0x2
+	.2byte	0x449
+	.4byte	0xdba
+	.4byte	.LLST245
+	.uleb128 0x50
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x44a
+	.4byte	0xddb
+	.4byte	.LLST246
+	.uleb128 0x50
+	.ascii	"j\000"
+	.byte	0x2
+	.2byte	0x44a
+	.4byte	0xddb
+	.4byte	.LLST247
+	.uleb128 0x51
+	.4byte	.LASF718
+	.byte	0x2
+	.2byte	0x44b
+	.4byte	0x493a
+	.4byte	.LLST248
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x3b93
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.9465
+	.uleb128 0x32
+	.4byte	.LVL935
+	.4byte	0x230c
+	.4byte	0x4bb4
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL936
+	.4byte	0x230c
+	.4byte	0x4bc8
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL937
+	.4byte	0x230c
+	.4byte	0x4bdc
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL938
+	.4byte	0x230c
+	.4byte	0x4bf0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL939
+	.4byte	0x230c
+	.4byte	0x4c12
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR81
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x3c
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL942
+	.4byte	0x6192
+	.4byte	0x4c28
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -60
+	.byte	0x94
+	.byte	0x2
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL944
+	.4byte	0x67c5
+	.4byte	0x4c3e
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -44
+	.byte	0x94
+	.byte	0x2
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL950
+	.4byte	0x26b9
+	.4byte	0x4c5d
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL953
+	.4byte	0x26b9
+	.4byte	0x4c75
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL961
+	.4byte	0x5f01
+	.4byte	0x4c89
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL962
+	.4byte	0x9222
+	.4byte	0x4cb0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR148
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x48a
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL971
+	.4byte	0x9222
+	.4byte	0x4cd7
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR148
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x4b3
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL980
+	.4byte	0x5f01
+	.4byte	0x4cea
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL982
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR148
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x530
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF719
+	.byte	0x2
+	.2byte	0x3eb
+	.4byte	0x50
+	.4byte	.LFB272
+	.4byte	.LFE272-.LFB272
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4e6f
+	.uleb128 0x51
+	.4byte	.LASF300
+	.byte	0x2
+	.2byte	0x3ed
+	.4byte	0xdba
+	.4byte	.LLST368
+	.uleb128 0x51
+	.4byte	.LASF720
+	.byte	0x2
+	.2byte	0x3ee
+	.4byte	0x4e6f
+	.4byte	.LLST369
+	.uleb128 0x51
+	.4byte	.LASF721
+	.byte	0x2
+	.2byte	0x3ef
+	.4byte	0xdba
+	.4byte	.LLST370
+	.uleb128 0x4a
+	.4byte	.LASF722
+	.byte	0x2
+	.2byte	0x41c
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x26b4
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.9443
+	.uleb128 0x32
+	.4byte	.LVL1559
+	.4byte	0x230c
+	.4byte	0x4d83
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1560
+	.4byte	0x22a6
+	.4byte	0x4da0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR79
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1561
+	.4byte	0x22a6
+	.uleb128 0x44
+	.4byte	.LVL1562
+	.4byte	0x22a6
+	.uleb128 0x32
+	.4byte	.LVL1563
+	.4byte	0x4f5b
+	.4byte	0x4dc6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1565
+	.4byte	0x251a
+	.4byte	0x4de9
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1567
+	.4byte	0x5dbf
+	.uleb128 0x32
+	.4byte	.LVL1568
+	.4byte	0x251a
+	.4byte	0x4e15
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1569
+	.4byte	0x9222
+	.4byte	0x4e3c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR167
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x433
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1572
+	.4byte	0x9222
+	.4byte	0x4e59
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC101
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL1573
+	.4byte	0x5f01
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x12c9
+	.uleb128 0x62
+	.4byte	.LASF723
+	.byte	0x2
+	.2byte	0x3b2
+	.byte	0x1
+	.4byte	0x4ec1
+	.uleb128 0x4c
+	.uleb128 0x49
+	.ascii	"lpa\000"
+	.byte	0x2
+	.2byte	0x3b7
+	.4byte	0xdc5
+	.uleb128 0x49
+	.ascii	"ppa\000"
+	.byte	0x2
+	.2byte	0x3b8
+	.4byte	0xdc5
+	.uleb128 0x48
+	.4byte	.LASF724
+	.byte	0x2
+	.2byte	0x3b9
+	.4byte	0xdc5
+	.uleb128 0x48
+	.4byte	.LASF667
+	.byte	0x2
+	.2byte	0x3ba
+	.4byte	0xde6
+	.uleb128 0x48
+	.4byte	.LASF596
+	.byte	0x2
+	.2byte	0x3bb
+	.4byte	0x2a63
+	.byte	0
+	.byte	0
+	.uleb128 0x5d
+	.4byte	.LASF725
+	.byte	0x2
+	.2byte	0x380
+	.4byte	.LFB270
+	.4byte	.LFE270-.LFB270
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4f5b
+	.uleb128 0x4f
+	.4byte	.LASF703
+	.byte	0x2
+	.2byte	0x380
+	.4byte	0x4934
+	.4byte	.LLST239
+	.uleb128 0x50
+	.ascii	"ppa\000"
+	.byte	0x2
+	.2byte	0x382
+	.4byte	0xdc5
+	.4byte	.LLST240
+	.uleb128 0x51
+	.4byte	.LASF317
+	.byte	0x2
+	.2byte	0x383
+	.4byte	0xdba
+	.4byte	.LLST241
+	.uleb128 0x51
+	.4byte	.LASF706
+	.byte	0x2
+	.2byte	0x384
+	.4byte	0xff2
+	.4byte	.LLST242
+	.uleb128 0x32
+	.4byte	.LVL929
+	.4byte	0x26b9
+	.4byte	0x4f35
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x43
+	.4byte	.LVL931
+	.4byte	0x5417
+	.4byte	0x4f4a
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL933
+	.4byte	0x230c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.byte	0
+	.uleb128 0x62
+	.4byte	.LASF726
+	.byte	0x2
+	.2byte	0x371
+	.byte	0x1
+	.4byte	0x4f7f
+	.uleb128 0x47
+	.4byte	.LASF393
+	.byte	0x2
+	.2byte	0x371
+	.4byte	0xdc5
+	.uleb128 0x49
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x373
+	.4byte	0xdba
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF727
+	.byte	0x2
+	.2byte	0x35c
+	.4byte	0x50
+	.4byte	.LFB268
+	.4byte	.LFE268-.LFB268
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4fd7
+	.uleb128 0x4f
+	.4byte	.LASF728
+	.byte	0x2
+	.2byte	0x35c
+	.4byte	0xdc5
+	.4byte	.LLST358
+	.uleb128 0x51
+	.4byte	.LASF729
+	.byte	0x2
+	.2byte	0x35e
+	.4byte	0xdc5
+	.4byte	.LLST359
+	.uleb128 0x32
+	.4byte	.LVL1531
+	.4byte	0x50ef
+	.4byte	0x4fcd
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x40
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1532
+	.4byte	0x3da3
+	.byte	0
+	.uleb128 0x59
+	.4byte	.LASF730
+	.byte	0x2
+	.2byte	0x336
+	.4byte	0xdc5
+	.4byte	.LFB267
+	.4byte	.LFE267-.LFB267
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x50e9
+	.uleb128 0x4f
+	.4byte	.LASF731
+	.byte	0x2
+	.2byte	0x336
+	.4byte	0xdc5
+	.4byte	.LLST360
+	.uleb128 0x4f
+	.4byte	.LASF732
+	.byte	0x2
+	.2byte	0x336
+	.4byte	0xdc5
+	.4byte	.LLST361
+	.uleb128 0x4f
+	.4byte	.LASF733
+	.byte	0x2
+	.2byte	0x336
+	.4byte	0x50e9
+	.4byte	.LLST362
+	.uleb128 0x50
+	.ascii	"len\000"
+	.byte	0x2
+	.2byte	0x338
+	.4byte	0xdba
+	.4byte	.LLST363
+	.uleb128 0x51
+	.4byte	.LASF734
+	.byte	0x2
+	.2byte	0x338
+	.4byte	0xdba
+	.4byte	.LLST364
+	.uleb128 0x50
+	.ascii	"ppn\000"
+	.byte	0x2
+	.2byte	0x339
+	.4byte	0xdc5
+	.4byte	.LLST365
+	.uleb128 0x51
+	.4byte	.LASF735
+	.byte	0x2
+	.2byte	0x33a
+	.4byte	0xdc5
+	.4byte	.LLST366
+	.uleb128 0x5e
+	.ascii	"req\000"
+	.byte	0x2
+	.2byte	0x33b
+	.4byte	0xde6
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -116
+	.uleb128 0x51
+	.4byte	.LASF736
+	.byte	0x2
+	.2byte	0x33c
+	.4byte	0xdc5
+	.4byte	.LLST367
+	.uleb128 0x28
+	.4byte	.LASF565
+	.byte	0x2
+	.2byte	0x33d
+	.4byte	0x2454
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -96
+	.uleb128 0x32
+	.4byte	.LVL1542
+	.4byte	0x26b9
+	.4byte	0x50b0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -116
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1544
+	.4byte	0x22a6
+	.4byte	0x50ca
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL1549
+	.4byte	0x230c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -124
+	.byte	0x6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xdaf
+	.uleb128 0x59
+	.4byte	.LASF737
+	.byte	0x2
+	.2byte	0x311
+	.4byte	0xdc5
+	.4byte	.LFB266
+	.4byte	.LFE266-.LFB266
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5212
+	.uleb128 0x4f
+	.4byte	.LASF731
+	.byte	0x2
+	.2byte	0x311
+	.4byte	0xdc5
+	.4byte	.LLST350
+	.uleb128 0x4f
+	.4byte	.LASF732
+	.byte	0x2
+	.2byte	0x311
+	.4byte	0xdc5
+	.4byte	.LLST351
+	.uleb128 0x4f
+	.4byte	.LASF733
+	.byte	0x2
+	.2byte	0x311
+	.4byte	0x50e9
+	.4byte	.LLST352
+	.uleb128 0x50
+	.ascii	"len\000"
+	.byte	0x2
+	.2byte	0x313
+	.4byte	0xdba
+	.4byte	.LLST353
+	.uleb128 0x51
+	.4byte	.LASF734
+	.byte	0x2
+	.2byte	0x313
+	.4byte	0xdba
+	.4byte	.LLST354
+	.uleb128 0x50
+	.ascii	"ppn\000"
+	.byte	0x2
+	.2byte	0x314
+	.4byte	0xdc5
+	.4byte	.LLST355
+	.uleb128 0x51
+	.4byte	.LASF735
+	.byte	0x2
+	.2byte	0x315
+	.4byte	0xdc5
+	.4byte	.LLST356
+	.uleb128 0x5e
+	.ascii	"req\000"
+	.byte	0x2
+	.2byte	0x316
+	.4byte	0xde6
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -116
+	.uleb128 0x51
+	.4byte	.LASF736
+	.byte	0x2
+	.2byte	0x317
+	.4byte	0xdc5
+	.4byte	.LLST357
+	.uleb128 0x28
+	.4byte	.LASF565
+	.byte	0x2
+	.2byte	0x318
+	.4byte	0x2454
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -96
+	.uleb128 0x32
+	.4byte	.LVL1513
+	.4byte	0x26b9
+	.4byte	0x51c8
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -116
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1516
+	.4byte	0x22a6
+	.4byte	0x51e5
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x7d
+	.sleb128 0
+	.byte	0x6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -128
+	.byte	0x6
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1518
+	.4byte	0x5417
+	.4byte	0x5202
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR149
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 -1
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL1523
+	.4byte	0x230c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF738
+	.byte	0x2
+	.2byte	0x2f0
+	.4byte	0x50
+	.4byte	.LFB265
+	.4byte	.LFE265-.LFB265
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x52fe
+	.uleb128 0x5a
+	.ascii	"lpn\000"
+	.byte	0x2
+	.2byte	0x2f0
+	.4byte	0xdc5
+	.4byte	.LLST227
+	.uleb128 0x5a
+	.ascii	"ppn\000"
+	.byte	0x2
+	.2byte	0x2f0
+	.4byte	0xff2
+	.4byte	.LLST228
+	.uleb128 0x4f
+	.4byte	.LASF739
+	.byte	0x2
+	.2byte	0x2f0
+	.4byte	0x50
+	.4byte	.LLST229
+	.uleb128 0x51
+	.4byte	.LASF740
+	.byte	0x2
+	.2byte	0x2f2
+	.4byte	0xdba
+	.4byte	.LLST230
+	.uleb128 0x28
+	.4byte	.LASF741
+	.byte	0x2
+	.2byte	0x2f2
+	.4byte	0xdba
+	.uleb128 0x1
+	.byte	0x58
+	.uleb128 0x28
+	.4byte	.LASF742
+	.byte	0x2
+	.2byte	0x2f2
+	.4byte	0xdba
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x530e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.9370
+	.uleb128 0x55
+	.4byte	.LASF743
+	.byte	0x2
+	.2byte	0x2fb
+	.4byte	.L740
+	.uleb128 0x32
+	.4byte	.LVL878
+	.4byte	0x9222
+	.4byte	0x52ca
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR145
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x2f7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL881
+	.4byte	0x534e
+	.uleb128 0x32
+	.4byte	.LVL883
+	.4byte	0x53c9
+	.4byte	0x52e7
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL884
+	.4byte	0x590c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xea
+	.4byte	0x530e
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x8
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x52fe
+	.uleb128 0x45
+	.4byte	.LASF744
+	.byte	0x2
+	.2byte	0x2e3
+	.4byte	0x50
+	.4byte	.LFB264
+	.4byte	.LFE264-.LFB264
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x534e
+	.uleb128 0x50
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x2e5
+	.4byte	0xdba
+	.4byte	.LLST312
+	.uleb128 0x44
+	.4byte	.LVL1279
+	.4byte	0x4e75
+	.uleb128 0x44
+	.4byte	.LVL1283
+	.4byte	0x53c9
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF745
+	.byte	0x2
+	.2byte	0x2bb
+	.4byte	0xdba
+	.4byte	.LFB263
+	.4byte	.LFE263-.LFB263
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x53c9
+	.uleb128 0x50
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x2bd
+	.4byte	0xdba
+	.4byte	.LLST83
+	.uleb128 0x51
+	.4byte	.LASF746
+	.byte	0x2
+	.2byte	0x2be
+	.4byte	0xdba
+	.4byte	.LLST84
+	.uleb128 0x51
+	.4byte	.LASF747
+	.byte	0x2
+	.2byte	0x2bf
+	.4byte	0xdc5
+	.4byte	.LLST85
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x4570
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.9353
+	.uleb128 0x34
+	.4byte	.LVL233
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR58
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x2df
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF748
+	.byte	0x2
+	.2byte	0x2b1
+	.4byte	0x50
+	.4byte	.LFB262
+	.4byte	.LFE262-.LFB262
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5417
+	.uleb128 0x4f
+	.4byte	.LASF740
+	.byte	0x2
+	.2byte	0x2b1
+	.4byte	0xdba
+	.4byte	.LLST225
+	.uleb128 0x51
+	.4byte	.LASF317
+	.byte	0x2
+	.2byte	0x2b3
+	.4byte	0xdc5
+	.4byte	.LLST226
+	.uleb128 0x34
+	.4byte	.LVL871
+	.4byte	0x5417
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR144
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF749
+	.byte	0x2
+	.2byte	0x276
+	.4byte	0x50
+	.4byte	.LFB261
+	.4byte	.LFE261-.LFB261
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5576
+	.uleb128 0x4f
+	.4byte	.LASF703
+	.byte	0x2
+	.2byte	0x276
+	.4byte	0x4934
+	.4byte	.LLST212
+	.uleb128 0x4f
+	.4byte	.LASF317
+	.byte	0x2
+	.2byte	0x276
+	.4byte	0xdc5
+	.4byte	.LLST213
+	.uleb128 0x4f
+	.4byte	.LASF733
+	.byte	0x2
+	.2byte	0x276
+	.4byte	0xff2
+	.4byte	.LLST214
+	.uleb128 0x51
+	.4byte	.LASF388
+	.byte	0x2
+	.2byte	0x278
+	.4byte	0xdc5
+	.4byte	.LLST215
+	.uleb128 0x51
+	.4byte	.LASF708
+	.byte	0x2
+	.2byte	0x279
+	.4byte	0x493a
+	.4byte	.LLST216
+	.uleb128 0x51
+	.4byte	.LASF721
+	.byte	0x2
+	.2byte	0x27a
+	.4byte	0xdba
+	.4byte	.LLST217
+	.uleb128 0x4a
+	.4byte	.LASF750
+	.byte	0x2
+	.2byte	0x27c
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x32d2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.9328
+	.uleb128 0x32
+	.4byte	.LVL833
+	.4byte	0x5576
+	.4byte	0x54bc
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL834
+	.4byte	0x9222
+	.4byte	0x54e3
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR142
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x28a
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL835
+	.4byte	0x9222
+	.4byte	0x550a
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR142
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x28b
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL837
+	.4byte	0x230c
+	.4byte	0x5522
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x40
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL840
+	.4byte	0x251a
+	.4byte	0x5545
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL842
+	.4byte	0x9222
+	.4byte	0x555c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC86
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL843
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC87
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF751
+	.byte	0x2
+	.2byte	0x246
+	.4byte	0x50
+	.4byte	.LFB260
+	.4byte	.LFE260-.LFB260
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5686
+	.uleb128 0x4f
+	.4byte	.LASF703
+	.byte	0x2
+	.2byte	0x246
+	.4byte	0x4934
+	.4byte	.LLST206
+	.uleb128 0x48
+	.4byte	.LASF388
+	.byte	0x2
+	.2byte	0x248
+	.4byte	0xdba
+	.uleb128 0x51
+	.4byte	.LASF330
+	.byte	0x2
+	.2byte	0x248
+	.4byte	0xdba
+	.4byte	.LLST207
+	.uleb128 0x51
+	.4byte	.LASF752
+	.byte	0x2
+	.2byte	0x249
+	.4byte	0xdba
+	.4byte	.LLST208
+	.uleb128 0x51
+	.4byte	.LASF753
+	.byte	0x2
+	.2byte	0x24a
+	.4byte	0x10e9
+	.4byte	.LLST209
+	.uleb128 0x51
+	.4byte	.LASF706
+	.byte	0x2
+	.2byte	0x24b
+	.4byte	0xff2
+	.4byte	.LLST210
+	.uleb128 0x51
+	.4byte	.LASF708
+	.byte	0x2
+	.2byte	0x24c
+	.4byte	0x493a
+	.4byte	.LLST211
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x5696
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.9314
+	.uleb128 0x32
+	.4byte	.LVL811
+	.4byte	0x9222
+	.4byte	0x5632
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR141
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x250
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL812
+	.4byte	0x5dbf
+	.uleb128 0x32
+	.4byte	.LVL819
+	.4byte	0x230c
+	.4byte	0x564f
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL824
+	.4byte	0x251a
+	.4byte	0x5675
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR108
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL825
+	.4byte	0x569b
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xea
+	.4byte	0x5696
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x1e
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x5686
+	.uleb128 0x45
+	.4byte	.LASF754
+	.byte	0x2
+	.2byte	0x218
+	.4byte	0x50
+	.4byte	.LFB259
+	.4byte	.LFE259-.LFB259
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x57e5
+	.uleb128 0x4f
+	.4byte	.LASF703
+	.byte	0x2
+	.2byte	0x218
+	.4byte	0x4934
+	.4byte	.LLST218
+	.uleb128 0x51
+	.4byte	.LASF755
+	.byte	0x2
+	.2byte	0x21a
+	.4byte	0xdba
+	.4byte	.LLST219
+	.uleb128 0x51
+	.4byte	.LASF756
+	.byte	0x2
+	.2byte	0x21b
+	.4byte	0xdba
+	.4byte	.LLST220
+	.uleb128 0x51
+	.4byte	.LASF330
+	.byte	0x2
+	.2byte	0x21c
+	.4byte	0xdba
+	.4byte	.LLST221
+	.uleb128 0x51
+	.4byte	.LASF753
+	.byte	0x2
+	.2byte	0x21d
+	.4byte	0x10e9
+	.4byte	.LLST222
+	.uleb128 0x51
+	.4byte	.LASF706
+	.byte	0x2
+	.2byte	0x21e
+	.4byte	0xff2
+	.4byte	.LLST223
+	.uleb128 0x51
+	.4byte	.LASF708
+	.byte	0x2
+	.2byte	0x21f
+	.4byte	0x493a
+	.4byte	.LLST224
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x26b4
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.9300
+	.uleb128 0x32
+	.4byte	.LVL848
+	.4byte	0x583d
+	.4byte	0x5748
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL851
+	.4byte	0x57e5
+	.4byte	0x575c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL854
+	.4byte	0x5f01
+	.4byte	0x5775
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL856
+	.4byte	0x57e5
+	.4byte	0x5789
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL861
+	.4byte	0x26b9
+	.4byte	0x57a7
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL862
+	.4byte	0x9222
+	.4byte	0x57ce
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR143
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x234
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL866
+	.4byte	0x5417
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF757
+	.byte	0x2
+	.2byte	0x203
+	.4byte	0x50
+	.byte	0x1
+	.4byte	0x5828
+	.uleb128 0x47
+	.4byte	.LASF703
+	.byte	0x2
+	.2byte	0x203
+	.4byte	0x4934
+	.uleb128 0x48
+	.4byte	.LASF758
+	.byte	0x2
+	.2byte	0x205
+	.4byte	0xdba
+	.uleb128 0x48
+	.4byte	.LASF753
+	.byte	0x2
+	.2byte	0x206
+	.4byte	0x10e9
+	.uleb128 0x4b
+	.4byte	.LASF574
+	.4byte	0x5838
+	.4byte	.LASF757
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xea
+	.4byte	0x5838
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x19
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x5828
+	.uleb128 0x45
+	.4byte	.LASF759
+	.byte	0x2
+	.2byte	0x1db
+	.4byte	0x50
+	.4byte	.LFB257
+	.4byte	.LFE257-.LFB257
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x590c
+	.uleb128 0x4f
+	.4byte	.LASF703
+	.byte	0x2
+	.2byte	0x1db
+	.4byte	0x4934
+	.4byte	.LLST199
+	.uleb128 0x28
+	.4byte	.LASF753
+	.byte	0x2
+	.2byte	0x1dd
+	.4byte	0x10e9
+	.uleb128 0x1
+	.byte	0x5a
+	.uleb128 0x51
+	.4byte	.LASF706
+	.byte	0x2
+	.2byte	0x1de
+	.4byte	0xff2
+	.4byte	.LLST200
+	.uleb128 0x28
+	.4byte	.LASF760
+	.byte	0x2
+	.2byte	0x1df
+	.4byte	0x10e9
+	.uleb128 0x1
+	.byte	0x55
+	.uleb128 0x51
+	.4byte	.LASF388
+	.byte	0x2
+	.2byte	0x1e0
+	.4byte	0xdba
+	.4byte	.LLST201
+	.uleb128 0x51
+	.4byte	.LASF330
+	.byte	0x2
+	.2byte	0x1e0
+	.4byte	0xdba
+	.4byte	.LLST202
+	.uleb128 0x51
+	.4byte	.LASF758
+	.byte	0x2
+	.2byte	0x1e1
+	.4byte	0xdba
+	.4byte	.LLST203
+	.uleb128 0x51
+	.4byte	.LASF761
+	.byte	0x2
+	.2byte	0x1e2
+	.4byte	0xdba
+	.4byte	.LLST204
+	.uleb128 0x51
+	.4byte	.LASF756
+	.byte	0x2
+	.2byte	0x1e3
+	.4byte	0xdba
+	.4byte	.LLST205
+	.uleb128 0x32
+	.4byte	.LVL788
+	.4byte	0x230c
+	.4byte	0x58fc
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL805
+	.4byte	0x5f01
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF762
+	.byte	0x2
+	.2byte	0x1b9
+	.4byte	0x50
+	.4byte	.LFB256
+	.4byte	.LFE256-.LFB256
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5a4e
+	.uleb128 0x4f
+	.4byte	.LASF317
+	.byte	0x2
+	.2byte	0x1b9
+	.4byte	0xdba
+	.4byte	.LLST197
+	.uleb128 0x4f
+	.4byte	.LASF740
+	.byte	0x2
+	.2byte	0x1b9
+	.4byte	0xdba
+	.4byte	.LLST198
+	.uleb128 0x28
+	.4byte	.LASF708
+	.byte	0x2
+	.2byte	0x1bb
+	.4byte	0x493a
+	.uleb128 0x1
+	.byte	0x5a
+	.uleb128 0x28
+	.4byte	.LASF763
+	.byte	0x2
+	.2byte	0x1bc
+	.4byte	0xdc5
+	.uleb128 0x1
+	.byte	0x58
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x32d2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.9257
+	.uleb128 0x32
+	.4byte	.LVL774
+	.4byte	0x9222
+	.4byte	0x5998
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR140
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x1be
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL776
+	.4byte	0x230c
+	.4byte	0x59ac
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL778
+	.4byte	0x26b9
+	.4byte	0x59ca
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL780
+	.4byte	0x9222
+	.4byte	0x59ed
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC83
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL781
+	.4byte	0x2836
+	.4byte	0x5a0e
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC84
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x34
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x34
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL782
+	.4byte	0x2836
+	.4byte	0x5a2a
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC85
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x34
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL783
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR140
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x1d3
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF764
+	.byte	0x2
+	.2byte	0x193
+	.4byte	0x50
+	.byte	0x1
+	.4byte	0x5acd
+	.uleb128 0x47
+	.4byte	.LASF649
+	.byte	0x2
+	.2byte	0x193
+	.4byte	0xdba
+	.uleb128 0x48
+	.4byte	.LASF765
+	.byte	0x2
+	.2byte	0x195
+	.4byte	0xdba
+	.uleb128 0x48
+	.4byte	.LASF766
+	.byte	0x2
+	.2byte	0x196
+	.4byte	0xdba
+	.uleb128 0x48
+	.4byte	.LASF767
+	.byte	0x2
+	.2byte	0x197
+	.4byte	0xdc5
+	.uleb128 0x48
+	.4byte	.LASF768
+	.byte	0x2
+	.2byte	0x199
+	.4byte	0xdba
+	.uleb128 0x48
+	.4byte	.LASF769
+	.byte	0x2
+	.2byte	0x19a
+	.4byte	0xdc5
+	.uleb128 0x48
+	.4byte	.LASF652
+	.byte	0x2
+	.2byte	0x19b
+	.4byte	0x1cc9
+	.uleb128 0x48
+	.4byte	.LASF770
+	.byte	0x2
+	.2byte	0x19b
+	.4byte	0x1cc9
+	.uleb128 0x4b
+	.4byte	.LASF574
+	.4byte	0x4570
+	.4byte	.LASF764
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF771
+	.byte	0x2
+	.2byte	0x17f
+	.4byte	0x50
+	.4byte	.LFB254
+	.4byte	.LFE254-.LFB254
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5b18
+	.uleb128 0x4f
+	.4byte	.LASF236
+	.byte	0x2
+	.2byte	0x17f
+	.4byte	0xdba
+	.4byte	.LLST67
+	.uleb128 0x51
+	.4byte	.LASF649
+	.byte	0x2
+	.2byte	0x181
+	.4byte	0xdba
+	.4byte	.LLST68
+	.uleb128 0x51
+	.4byte	.LASF652
+	.byte	0x2
+	.2byte	0x182
+	.4byte	0x1cc9
+	.4byte	.LLST69
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF772
+	.byte	0x2
+	.2byte	0x17a
+	.4byte	0x50
+	.4byte	.LFB253
+	.4byte	.LFE253-.LFB253
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5b59
+	.uleb128 0x4f
+	.4byte	.LASF773
+	.byte	0x2
+	.2byte	0x17a
+	.4byte	0x5b59
+	.4byte	.LLST66
+	.uleb128 0x2d
+	.4byte	.LVL186
+	.4byte	0x5b5f
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x1cc9
+	.uleb128 0x45
+	.4byte	.LASF774
+	.byte	0x2
+	.2byte	0x167
+	.4byte	0x50
+	.4byte	.LFB252
+	.4byte	.LFE252-.LFB252
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5bca
+	.uleb128 0x4f
+	.4byte	.LASF773
+	.byte	0x2
+	.2byte	0x167
+	.4byte	0x5b59
+	.4byte	.LLST62
+	.uleb128 0x4f
+	.4byte	.LASF236
+	.byte	0x2
+	.2byte	0x167
+	.4byte	0xdba
+	.4byte	.LLST63
+	.uleb128 0x51
+	.4byte	.LASF649
+	.byte	0x2
+	.2byte	0x169
+	.4byte	0xdba
+	.4byte	.LLST64
+	.uleb128 0x51
+	.4byte	.LASF652
+	.byte	0x2
+	.2byte	0x16a
+	.4byte	0x1cc9
+	.4byte	.LLST65
+	.uleb128 0x34
+	.4byte	.LVL178
+	.4byte	0x5bca
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF775
+	.byte	0x2
+	.2byte	0x14c
+	.4byte	0x50
+	.4byte	.LFB251
+	.4byte	.LFE251-.LFB251
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5c55
+	.uleb128 0x4f
+	.4byte	.LASF773
+	.byte	0x2
+	.2byte	0x14c
+	.4byte	0x5b59
+	.4byte	.LLST59
+	.uleb128 0x4f
+	.4byte	.LASF649
+	.byte	0x2
+	.2byte	0x14c
+	.4byte	0xdba
+	.4byte	.LLST60
+	.uleb128 0x28
+	.4byte	.LASF652
+	.byte	0x2
+	.2byte	0x14e
+	.4byte	0x1cc9
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x51
+	.4byte	.LASF776
+	.byte	0x2
+	.2byte	0x14e
+	.4byte	0x1cc9
+	.4byte	.LLST61
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x5c65
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.9216
+	.uleb128 0x34
+	.4byte	.LVL168
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR50
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x151
+	.byte	0
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xea
+	.4byte	0x5c65
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x10
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x5c55
+	.uleb128 0x45
+	.4byte	.LASF777
+	.byte	0x2
+	.2byte	0x11b
+	.4byte	0x50
+	.4byte	.LFB250
+	.4byte	.LFE250-.LFB250
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5ce3
+	.uleb128 0x4f
+	.4byte	.LASF649
+	.byte	0x2
+	.2byte	0x11b
+	.4byte	0xdba
+	.4byte	.LLST53
+	.uleb128 0x51
+	.4byte	.LASF652
+	.byte	0x2
+	.2byte	0x11d
+	.4byte	0x1cc9
+	.4byte	.LLST54
+	.uleb128 0x51
+	.4byte	.LASF776
+	.byte	0x2
+	.2byte	0x11d
+	.4byte	0x1cc9
+	.4byte	.LLST55
+	.uleb128 0x28
+	.4byte	.LASF778
+	.byte	0x2
+	.2byte	0x11e
+	.4byte	0xdba
+	.uleb128 0x1
+	.byte	0x58
+	.uleb128 0x51
+	.4byte	.LASF779
+	.byte	0x2
+	.2byte	0x11f
+	.4byte	0xdba
+	.4byte	.LLST56
+	.uleb128 0x51
+	.4byte	.LASF780
+	.byte	0x2
+	.2byte	0x120
+	.4byte	0xdba
+	.4byte	.LLST57
+	.byte	0
+	.uleb128 0x2b
+	.4byte	.LASF781
+	.byte	0x2
+	.byte	0xd8
+	.4byte	0x50
+	.4byte	.LFB249
+	.4byte	.LFE249-.LFB249
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5d75
+	.uleb128 0x2c
+	.4byte	.LASF649
+	.byte	0x2
+	.byte	0xd8
+	.4byte	0xdba
+	.4byte	.LLST44
+	.uleb128 0x30
+	.4byte	.LASF652
+	.byte	0x2
+	.byte	0xda
+	.4byte	0x1cc9
+	.4byte	.LLST45
+	.uleb128 0x30
+	.4byte	.LASF776
+	.byte	0x2
+	.byte	0xda
+	.4byte	0x1cc9
+	.4byte	.LLST46
+	.uleb128 0x30
+	.4byte	.LASF782
+	.byte	0x2
+	.byte	0xdb
+	.4byte	0xdba
+	.4byte	.LLST47
+	.uleb128 0x30
+	.4byte	.LASF783
+	.byte	0x2
+	.byte	0xdc
+	.4byte	0xdba
+	.4byte	.LLST48
+	.uleb128 0x30
+	.4byte	.LASF767
+	.byte	0x2
+	.byte	0xdd
+	.4byte	0xdc5
+	.4byte	.LLST49
+	.uleb128 0x30
+	.4byte	.LASF784
+	.byte	0x2
+	.byte	0xde
+	.4byte	0xdc5
+	.4byte	.LLST50
+	.uleb128 0x30
+	.4byte	.LASF780
+	.byte	0x2
+	.byte	0xdf
+	.4byte	0xdba
+	.4byte	.LLST51
+	.byte	0
+	.uleb128 0x64
+	.4byte	.LASF785
+	.byte	0x2
+	.byte	0xb9
+	.byte	0x1
+	.4byte	0x5d9a
+	.uleb128 0x36
+	.4byte	.LASF649
+	.byte	0x2
+	.byte	0xb9
+	.4byte	0xdba
+	.uleb128 0x4b
+	.4byte	.LASF574
+	.4byte	0x5c65
+	.4byte	.LASF785
+	.byte	0
+	.uleb128 0x64
+	.4byte	.LASF786
+	.byte	0x2
+	.byte	0xb2
+	.byte	0x1
+	.4byte	0x5dbf
+	.uleb128 0x36
+	.4byte	.LASF649
+	.byte	0x2
+	.byte	0xb2
+	.4byte	0xdba
+	.uleb128 0x4b
+	.4byte	.LASF574
+	.4byte	0x5c65
+	.4byte	.LASF786
+	.byte	0
+	.uleb128 0x2b
+	.4byte	.LASF787
+	.byte	0x2
+	.byte	0xa4
+	.4byte	0xdba
+	.4byte	.LFB246
+	.4byte	.LFE246-.LFB246
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5e12
+	.uleb128 0x3b
+	.ascii	"tmp\000"
+	.byte	0x2
+	.byte	0xa6
+	.4byte	0xdba
+	.4byte	.LLST42
+	.uleb128 0x5f
+	.4byte	.LBB174
+	.4byte	.LBE174-.LBB174
+	.4byte	0x5e02
+	.uleb128 0x3b
+	.ascii	"Q\000"
+	.byte	0x2
+	.byte	0xa9
+	.4byte	0x5e12
+	.4byte	.LLST43
+	.byte	0
+	.uleb128 0x65
+	.4byte	0x5fac
+	.4byte	.LBB172
+	.4byte	.LBE172-.LBB172
+	.byte	0x2
+	.byte	0xa8
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x1595
+	.uleb128 0x2b
+	.4byte	.LASF788
+	.byte	0x2
+	.byte	0x92
+	.4byte	0x50
+	.4byte	.LFB245
+	.4byte	.LFE245-.LFB245
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5e7c
+	.uleb128 0x2f
+	.ascii	"blk\000"
+	.byte	0x2
+	.byte	0x92
+	.4byte	0xdba
+	.4byte	.LLST39
+	.uleb128 0x3b
+	.ascii	"ret\000"
+	.byte	0x2
+	.byte	0x94
+	.4byte	0x50
+	.4byte	.LLST40
+	.uleb128 0x3b
+	.ascii	"i\000"
+	.byte	0x2
+	.byte	0x95
+	.4byte	0xdc5
+	.4byte	.LLST41
+	.uleb128 0x3a
+	.ascii	"Q\000"
+	.byte	0x2
+	.byte	0x96
+	.4byte	0x5e12
+	.uleb128 0x6
+	.byte	0x3
+	.4byte	gSysFreeQueue
+	.byte	0x9f
+	.uleb128 0x66
+	.4byte	0x5fa0
+	.4byte	.LBB168
+	.4byte	.Ldebug_ranges0+0x18
+	.byte	0x2
+	.byte	0x98
+	.byte	0
+	.uleb128 0x42
+	.4byte	.LASF789
+	.byte	0x2
+	.byte	0x73
+	.4byte	.LFB244
+	.4byte	.LFE244-.LFB244
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5f01
+	.uleb128 0x3b
+	.ascii	"i\000"
+	.byte	0x2
+	.byte	0x75
+	.4byte	0xdba
+	.4byte	.LLST33
+	.uleb128 0x3b
+	.ascii	"tmp\000"
+	.byte	0x2
+	.byte	0x75
+	.4byte	0xdba
+	.4byte	.LLST34
+	.uleb128 0x3b
+	.ascii	"j\000"
+	.byte	0x2
+	.byte	0x75
+	.4byte	0xdba
+	.4byte	.LLST35
+	.uleb128 0x30
+	.4byte	.LASF599
+	.byte	0x2
+	.byte	0x76
+	.4byte	0xdba
+	.4byte	.LLST36
+	.uleb128 0x30
+	.4byte	.LASF790
+	.byte	0x2
+	.byte	0x77
+	.4byte	0xdba
+	.4byte	.LLST37
+	.uleb128 0x30
+	.4byte	.LASF791
+	.byte	0x2
+	.byte	0x78
+	.4byte	0xdc5
+	.4byte	.LLST38
+	.uleb128 0x3a
+	.ascii	"Q\000"
+	.byte	0x2
+	.byte	0x79
+	.4byte	0x5e12
+	.uleb128 0x6
+	.byte	0x3
+	.4byte	gSysFreeQueue
+	.byte	0x9f
+	.uleb128 0x44
+	.4byte	.LVL85
+	.4byte	0x6122
+	.byte	0
+	.uleb128 0x42
+	.4byte	.LASF792
+	.byte	0x2
+	.byte	0x61
+	.4byte	.LFB243
+	.4byte	.LFE243-.LFB243
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5fa0
+	.uleb128 0x2f
+	.ascii	"blk\000"
+	.byte	0x2
+	.byte	0x61
+	.4byte	0xdba
+	.4byte	.LLST175
+	.uleb128 0x2c
+	.4byte	.LASF793
+	.byte	0x2
+	.byte	0x61
+	.4byte	0xdba
+	.4byte	.LLST176
+	.uleb128 0x5f
+	.4byte	.LBB223
+	.4byte	.LBE223-.LBB223
+	.4byte	0x5f90
+	.uleb128 0x3b
+	.ascii	"Q\000"
+	.byte	0x2
+	.byte	0x64
+	.4byte	0x5e12
+	.4byte	.LLST177
+	.uleb128 0x67
+	.4byte	.LBB224
+	.4byte	.LBE224-.LBB224
+	.uleb128 0x30
+	.4byte	.LASF794
+	.byte	0x2
+	.byte	0x66
+	.4byte	0xdba
+	.4byte	.LLST178
+	.uleb128 0x32
+	.4byte	.LVL635
+	.4byte	0x6122
+	.4byte	0x5f7a
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL637
+	.4byte	0x2464
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x65
+	.4byte	0x5fa0
+	.4byte	.LBB221
+	.4byte	.LBE221-.LBB221
+	.byte	0x2
+	.byte	0x63
+	.byte	0
+	.uleb128 0x68
+	.4byte	.LASF795
+	.byte	0x2
+	.byte	0x5c
+	.4byte	0xdba
+	.byte	0x1
+	.uleb128 0x68
+	.4byte	.LASF796
+	.byte	0x2
+	.byte	0x57
+	.4byte	0xdba
+	.byte	0x1
+	.uleb128 0x2b
+	.4byte	.LASF797
+	.byte	0x2
+	.byte	0x4b
+	.4byte	0xdba
+	.4byte	.LFB240
+	.4byte	.LFE240-.LFB240
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6011
+	.uleb128 0x2f
+	.ascii	"max\000"
+	.byte	0x2
+	.byte	0x4b
+	.4byte	0xdba
+	.4byte	.LLST196
+	.uleb128 0x3a
+	.ascii	"Q\000"
+	.byte	0x2
+	.byte	0x4d
+	.4byte	0x5e12
+	.uleb128 0x6
+	.byte	0x3
+	.4byte	gSysFreeQueue
+	.byte	0x9f
+	.uleb128 0x34
+	.4byte	.LVL770
+	.4byte	0x230c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR38+8
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x800
+	.byte	0
+	.byte	0
+	.uleb128 0x2b
+	.4byte	.LASF798
+	.byte	0x2
+	.byte	0x2e
+	.4byte	0x50
+	.4byte	.LFB239
+	.4byte	.LFE239-.LFB239
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x60dd
+	.uleb128 0x2c
+	.4byte	.LASF388
+	.byte	0x2
+	.byte	0x2e
+	.4byte	0xdc5
+	.4byte	.LLST157
+	.uleb128 0x2c
+	.4byte	.LASF568
+	.byte	0x2
+	.byte	0x2e
+	.4byte	0x50
+	.4byte	.LLST158
+	.uleb128 0x3a
+	.ascii	"req\000"
+	.byte	0x2
+	.byte	0x30
+	.4byte	0xde6
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -108
+	.uleb128 0x3b
+	.ascii	"low\000"
+	.byte	0x2
+	.byte	0x31
+	.4byte	0xddb
+	.4byte	.LLST159
+	.uleb128 0x29
+	.4byte	.LASF799
+	.byte	0x2
+	.byte	0x31
+	.4byte	0xddb
+	.uleb128 0x1
+	.byte	0x55
+	.uleb128 0x3b
+	.ascii	"mid\000"
+	.byte	0x2
+	.byte	0x31
+	.4byte	0xddb
+	.4byte	.LLST160
+	.uleb128 0x29
+	.4byte	.LASF800
+	.byte	0x2
+	.byte	0x32
+	.4byte	0x2454
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -88
+	.uleb128 0x30
+	.4byte	.LASF801
+	.byte	0x2
+	.byte	0x33
+	.4byte	0xdba
+	.4byte	.LLST161
+	.uleb128 0x32
+	.4byte	.LVL591
+	.4byte	0x26b9
+	.4byte	0x60c0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -108
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL596
+	.4byte	0x26b9
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -108
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x2b
+	.4byte	.LASF802
+	.byte	0x2
+	.byte	0x1e
+	.4byte	0xdc5
+	.4byte	.LFB238
+	.4byte	.LFE238-.LFB238
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6122
+	.uleb128 0x2c
+	.4byte	.LASF803
+	.byte	0x2
+	.byte	0x1e
+	.4byte	0xdc5
+	.4byte	.LLST31
+	.uleb128 0x58
+	.4byte	.LASF804
+	.byte	0x2
+	.byte	0x1e
+	.4byte	0xdc5
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3b
+	.ascii	"ret\000"
+	.byte	0x2
+	.byte	0x20
+	.4byte	0xdc5
+	.4byte	.LLST32
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LASF805
+	.byte	0x2
+	.byte	0x14
+	.4byte	0xdba
+	.4byte	.LFB237
+	.4byte	.LFE237-.LFB237
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x615a
+	.uleb128 0x2c
+	.4byte	.LASF594
+	.byte	0x2
+	.byte	0x14
+	.4byte	0xdba
+	.4byte	.LLST29
+	.uleb128 0x30
+	.4byte	.LASF717
+	.byte	0x2
+	.byte	0x16
+	.4byte	0xdba
+	.4byte	.LLST30
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LASF806
+	.byte	0x2
+	.byte	0xc
+	.4byte	0xdba
+	.4byte	.LFB236
+	.4byte	.LFE236-.LFB236
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6192
+	.uleb128 0x2c
+	.4byte	.LASF594
+	.byte	0x2
+	.byte	0xc
+	.4byte	0xdba
+	.4byte	.LLST27
+	.uleb128 0x30
+	.4byte	.LASF592
+	.byte	0x2
+	.byte	0xe
+	.4byte	0xdba
+	.4byte	.LLST28
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LASF807
+	.byte	0x2
+	.byte	0x4
+	.4byte	0xdba
+	.4byte	.LFB235
+	.4byte	.LFE235-.LFB235
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x61d9
+	.uleb128 0x2c
+	.4byte	.LASF592
+	.byte	0x2
+	.byte	0x4
+	.4byte	0xdba
+	.4byte	.LLST24
+	.uleb128 0x2c
+	.4byte	.LASF717
+	.byte	0x2
+	.byte	0x4
+	.4byte	0xdba
+	.4byte	.LLST25
+	.uleb128 0x30
+	.4byte	.LASF608
+	.byte	0x2
+	.byte	0x6
+	.4byte	0xdba
+	.4byte	.LLST26
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF808
+	.byte	0x4
+	.2byte	0x13c
+	.4byte	0xdd0
+	.4byte	.LFB234
+	.4byte	.LFE234-.LFB234
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x63c0
+	.uleb128 0x50
+	.ascii	"die\000"
+	.byte	0x4
+	.2byte	0x13e
+	.4byte	0xdc5
+	.4byte	.LLST346
+	.uleb128 0x50
+	.ascii	"blk\000"
+	.byte	0x4
+	.2byte	0x13f
+	.4byte	0xdba
+	.4byte	.LLST347
+	.uleb128 0x51
+	.4byte	.LASF577
+	.byte	0x4
+	.2byte	0x140
+	.4byte	0xdc5
+	.4byte	.LLST348
+	.uleb128 0x51
+	.4byte	.LASF809
+	.byte	0x4
+	.2byte	0x142
+	.4byte	0x63c0
+	.4byte	.LLST349
+	.uleb128 0x4a
+	.4byte	.LASF810
+	.byte	0x4
+	.2byte	0x158
+	.uleb128 0x44
+	.4byte	.LVL1460
+	.4byte	0x65bc
+	.uleb128 0x44
+	.4byte	.LVL1461
+	.4byte	0x63c6
+	.uleb128 0x32
+	.4byte	.LVL1465
+	.4byte	0x67c5
+	.4byte	0x6261
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1466
+	.4byte	0x2410
+	.4byte	0x6275
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1467
+	.4byte	0x6828
+	.4byte	0x6289
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1473
+	.4byte	0x26b9
+	.4byte	0x62a7
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1474
+	.4byte	0x22a6
+	.uleb128 0x32
+	.4byte	.LVL1476
+	.4byte	0x6828
+	.4byte	0x62c4
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1478
+	.4byte	0x236c
+	.4byte	0x62d8
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1479
+	.4byte	0x6739
+	.uleb128 0x44
+	.4byte	.LVL1481
+	.4byte	0x67c5
+	.uleb128 0x32
+	.4byte	.LVL1482
+	.4byte	0x230c
+	.4byte	0x6302
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x40
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1483
+	.4byte	0x230c
+	.4byte	0x631c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x1000
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1485
+	.4byte	0x22a6
+	.uleb128 0x32
+	.4byte	.LVL1486
+	.4byte	0x2464
+	.4byte	0x6343
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1487
+	.4byte	0x251a
+	.4byte	0x6366
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1488
+	.4byte	0x6828
+	.4byte	0x637a
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1493
+	.4byte	0x6828
+	.uleb128 0x32
+	.4byte	.LVL1496
+	.4byte	0x2464
+	.4byte	0x639b
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x32
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1497
+	.4byte	0x6828
+	.uleb128 0x44
+	.4byte	.LVL1498
+	.4byte	0x6828
+	.uleb128 0x44
+	.4byte	.LVL1499
+	.4byte	0x65f0
+	.uleb128 0x44
+	.4byte	.LVL1501
+	.4byte	0x65f0
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x11b9
+	.uleb128 0x45
+	.4byte	.LASF811
+	.byte	0x4
+	.2byte	0x116
+	.4byte	0x50
+	.4byte	.LFB233
+	.4byte	.LFE233-.LFB233
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6437
+	.uleb128 0x5e
+	.ascii	"die\000"
+	.byte	0x4
+	.2byte	0x118
+	.4byte	0xdc5
+	.uleb128 0x1
+	.byte	0x56
+	.uleb128 0x50
+	.ascii	"blk\000"
+	.byte	0x4
+	.2byte	0x119
+	.4byte	0xdba
+	.4byte	.LLST155
+	.uleb128 0x51
+	.4byte	.LASF812
+	.byte	0x4
+	.2byte	0x11a
+	.4byte	0xdc5
+	.4byte	.LLST156
+	.uleb128 0x28
+	.4byte	.LASF809
+	.byte	0x4
+	.2byte	0x11b
+	.4byte	0x63c0
+	.uleb128 0x1
+	.byte	0x58
+	.uleb128 0x34
+	.4byte	.LVL580
+	.4byte	0x26b9
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x2b
+	.4byte	.LASF813
+	.byte	0x4
+	.byte	0xac
+	.4byte	0x50
+	.4byte	.LFB232
+	.4byte	.LFE232-.LFB232
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6566
+	.uleb128 0x3b
+	.ascii	"i\000"
+	.byte	0x4
+	.byte	0xae
+	.4byte	0xdc5
+	.4byte	.LLST342
+	.uleb128 0x3b
+	.ascii	"blk\000"
+	.byte	0x4
+	.byte	0xaf
+	.4byte	0xdba
+	.4byte	.LLST343
+	.uleb128 0x30
+	.4byte	.LASF705
+	.byte	0x4
+	.byte	0xb0
+	.4byte	0xddb
+	.4byte	.LLST344
+	.uleb128 0x30
+	.4byte	.LASF809
+	.byte	0x4
+	.byte	0xb1
+	.4byte	0x63c0
+	.4byte	.LLST345
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x6576
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.9058
+	.uleb128 0x44
+	.4byte	.LVL1435
+	.4byte	0x65bc
+	.uleb128 0x32
+	.4byte	.LVL1437
+	.4byte	0x26b9
+	.4byte	0x64c0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1438
+	.4byte	0x26b9
+	.4byte	0x64de
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1440
+	.4byte	0x26b9
+	.4byte	0x64fc
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1441
+	.4byte	0x6011
+	.4byte	0x650f
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1443
+	.4byte	0x9222
+	.4byte	0x6535
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR165
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xfe
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1444
+	.4byte	0x7a7c
+	.uleb128 0x32
+	.4byte	.LVL1452
+	.4byte	0x26b9
+	.4byte	0x655c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1457
+	.4byte	0x22a6
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xea
+	.4byte	0x6576
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0xa
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x6566
+	.uleb128 0x2b
+	.4byte	.LASF814
+	.byte	0x4
+	.byte	0x9c
+	.4byte	0xdba
+	.4byte	.LFB231
+	.4byte	.LFE231-.LFB231
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x65bc
+	.uleb128 0x3b
+	.ascii	"blk\000"
+	.byte	0x4
+	.byte	0x9e
+	.4byte	0xdba
+	.4byte	.LLST22
+	.uleb128 0x30
+	.4byte	.LASF815
+	.byte	0x4
+	.byte	0x9f
+	.4byte	0xdba
+	.4byte	.LLST23
+	.uleb128 0x44
+	.4byte	.LVL59
+	.4byte	0x67c5
+	.byte	0
+	.uleb128 0x42
+	.4byte	.LASF816
+	.byte	0x4
+	.byte	0x94
+	.4byte	.LFB230
+	.4byte	.LFE230-.LFB230
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x65f0
+	.uleb128 0x2d
+	.4byte	.LVL767
+	.4byte	0x230c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR37+12
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x40
+	.byte	0
+	.byte	0
+	.uleb128 0x2b
+	.4byte	.LASF817
+	.byte	0x4
+	.byte	0x4f
+	.4byte	0x50
+	.4byte	.LFB229
+	.4byte	.LFE229-.LFB229
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6739
+	.uleb128 0x3b
+	.ascii	"i\000"
+	.byte	0x4
+	.byte	0x51
+	.4byte	0x50
+	.4byte	.LLST288
+	.uleb128 0x30
+	.4byte	.LASF818
+	.byte	0x4
+	.byte	0x52
+	.4byte	0x50
+	.4byte	.LLST289
+	.uleb128 0x30
+	.4byte	.LASF809
+	.byte	0x4
+	.byte	0x53
+	.4byte	0x63c0
+	.4byte	.LLST290
+	.uleb128 0x30
+	.4byte	.LASF721
+	.byte	0x4
+	.byte	0x54
+	.4byte	0xdba
+	.4byte	.LLST291
+	.uleb128 0x54
+	.4byte	.LASF819
+	.byte	0x4
+	.byte	0x67
+	.uleb128 0x69
+	.4byte	.LASF574
+	.4byte	0x26b4
+	.uleb128 0x32
+	.4byte	.LVL1162
+	.4byte	0x230c
+	.4byte	0x6667
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1165
+	.4byte	0x230c
+	.4byte	0x6686
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x40
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1167
+	.4byte	0x9222
+	.4byte	0x669d
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC94
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1168
+	.4byte	0x251a
+	.4byte	0x66c0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1169
+	.4byte	0x2464
+	.4byte	0x66d8
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1170
+	.4byte	0x251a
+	.4byte	0x66fb
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1172
+	.4byte	0x9222
+	.4byte	0x6712
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC95
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1173
+	.4byte	0x9222
+	.4byte	0x672f
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC96
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1176
+	.4byte	0x22a6
+	.byte	0
+	.uleb128 0x42
+	.4byte	.LASF820
+	.byte	0x4
+	.byte	0x41
+	.4byte	.LFB228
+	.4byte	.LFE228-.LFB228
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x67bd
+	.uleb128 0x2c
+	.4byte	.LASF753
+	.byte	0x4
+	.byte	0x41
+	.4byte	0x10e9
+	.4byte	.LLST194
+	.uleb128 0x2c
+	.4byte	.LASF821
+	.byte	0x4
+	.byte	0x41
+	.4byte	0xff2
+	.4byte	.LLST195
+	.uleb128 0x31
+	.ascii	"i\000"
+	.byte	0x4
+	.byte	0x43
+	.4byte	0xdc5
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x3b93
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.9015
+	.uleb128 0x32
+	.4byte	.LVL764
+	.4byte	0x230c
+	.4byte	0x679d
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL765
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x4a
+	.byte	0
+	.byte	0
+	.uleb128 0x6a
+	.4byte	.LASF822
+	.byte	0x4
+	.byte	0x26
+	.byte	0x1
+	.uleb128 0x39
+	.4byte	.LASF823
+	.byte	0x4
+	.byte	0x17
+	.4byte	0x50
+	.4byte	.LFB226
+	.4byte	.LFE226-.LFB226
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6828
+	.uleb128 0x2c
+	.4byte	.LASF388
+	.byte	0x4
+	.byte	0x17
+	.4byte	0xdba
+	.4byte	.LLST17
+	.uleb128 0x3b
+	.ascii	"die\000"
+	.byte	0x4
+	.byte	0x19
+	.4byte	0xdc5
+	.4byte	.LLST18
+	.uleb128 0x3b
+	.ascii	"i\000"
+	.byte	0x4
+	.byte	0x1a
+	.4byte	0xdc5
+	.4byte	.LLST19
+	.uleb128 0x30
+	.4byte	.LASF821
+	.byte	0x4
+	.byte	0x1b
+	.4byte	0xff2
+	.4byte	.LLST20
+	.uleb128 0x30
+	.4byte	.LASF582
+	.byte	0x4
+	.byte	0x1c
+	.4byte	0xdba
+	.4byte	.LLST21
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LASF824
+	.byte	0x4
+	.byte	0x4
+	.4byte	0x50
+	.4byte	.LFB225
+	.4byte	.LFE225-.LFB225
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x689d
+	.uleb128 0x2c
+	.4byte	.LASF388
+	.byte	0x4
+	.byte	0x4
+	.4byte	0xdba
+	.4byte	.LLST13
+	.uleb128 0x3b
+	.ascii	"die\000"
+	.byte	0x4
+	.byte	0x6
+	.4byte	0xdc5
+	.4byte	.LLST14
+	.uleb128 0x30
+	.4byte	.LASF821
+	.byte	0x4
+	.byte	0x7
+	.4byte	0xff2
+	.4byte	.LLST15
+	.uleb128 0x30
+	.4byte	.LASF582
+	.byte	0x4
+	.byte	0x8
+	.4byte	0xdba
+	.4byte	.LLST16
+	.uleb128 0x34
+	.4byte	.LVL45
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x6b
+	.4byte	.LASF884
+	.byte	0x3
+	.2byte	0x4bd
+	.4byte	0xdc5
+	.4byte	.LFB224
+	.4byte	.LFE224-.LFB224
+	.uleb128 0x1
+	.byte	0x9c
+	.uleb128 0x45
+	.4byte	.LASF825
+	.byte	0x3
+	.2byte	0x4b8
+	.4byte	0x50
+	.4byte	.LFB223
+	.4byte	.LFE223-.LFB223
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6922
+	.uleb128 0x4f
+	.4byte	.LASF236
+	.byte	0x3
+	.2byte	0x4b8
+	.4byte	0xb5
+	.4byte	.LLST443
+	.uleb128 0x4f
+	.4byte	.LASF325
+	.byte	0x3
+	.2byte	0x4b8
+	.4byte	0xb5
+	.4byte	.LLST444
+	.uleb128 0x5a
+	.ascii	"buf\000"
+	.byte	0x3
+	.2byte	0x4b8
+	.4byte	0x6922
+	.4byte	.LLST445
+	.uleb128 0x2d
+	.4byte	.LVL1969
+	.4byte	0x6a9b
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x90
+	.uleb128 0x45
+	.4byte	.LASF826
+	.byte	0x3
+	.2byte	0x4b3
+	.4byte	0x50
+	.4byte	.LFB222
+	.4byte	.LFE222-.LFB222
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6997
+	.uleb128 0x4f
+	.4byte	.LASF236
+	.byte	0x3
+	.2byte	0x4b3
+	.4byte	0xb5
+	.4byte	.LLST425
+	.uleb128 0x4f
+	.4byte	.LASF325
+	.byte	0x3
+	.2byte	0x4b3
+	.4byte	0xb5
+	.4byte	.LLST426
+	.uleb128 0x5a
+	.ascii	"buf\000"
+	.byte	0x3
+	.2byte	0x4b3
+	.4byte	0x6922
+	.4byte	.LLST427
+	.uleb128 0x2d
+	.4byte	.LVL1868
+	.4byte	0x70a1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0
+	.byte	0
+	.uleb128 0x59
+	.4byte	.LASF827
+	.byte	0x3
+	.2byte	0x484
+	.4byte	0x50
+	.4byte	.LFB221
+	.4byte	.LFE221-.LFB221
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6a9b
+	.uleb128 0x4f
+	.4byte	.LASF731
+	.byte	0x3
+	.2byte	0x484
+	.4byte	0xdc5
+	.4byte	.LLST383
+	.uleb128 0x4f
+	.4byte	.LASF732
+	.byte	0x3
+	.2byte	0x484
+	.4byte	0xdc5
+	.4byte	.LLST384
+	.uleb128 0x51
+	.4byte	.LASF734
+	.byte	0x3
+	.2byte	0x486
+	.4byte	0xdba
+	.4byte	.LLST385
+	.uleb128 0x50
+	.ascii	"tmp\000"
+	.byte	0x3
+	.2byte	0x487
+	.4byte	0xdba
+	.4byte	.LLST386
+	.uleb128 0x50
+	.ascii	"lpa\000"
+	.byte	0x3
+	.2byte	0x488
+	.4byte	0xdc5
+	.4byte	.LLST387
+	.uleb128 0x28
+	.4byte	.LASF663
+	.byte	0x3
+	.2byte	0x489
+	.4byte	0xdc5
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -32
+	.uleb128 0x28
+	.4byte	.LASF640
+	.byte	0x3
+	.2byte	0x489
+	.4byte	0xdc5
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -28
+	.uleb128 0x51
+	.4byte	.LASF629
+	.byte	0x3
+	.2byte	0x48a
+	.4byte	0xdba
+	.4byte	.LLST388
+	.uleb128 0x44
+	.4byte	.LVL1633
+	.4byte	0x6e77
+	.uleb128 0x44
+	.4byte	.LVL1643
+	.4byte	0x5313
+	.uleb128 0x44
+	.4byte	.LVL1644
+	.4byte	0x4d0e
+	.uleb128 0x32
+	.4byte	.LVL1645
+	.4byte	0x5212
+	.4byte	0x6a69
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1646
+	.4byte	0x5212
+	.4byte	0x6a88
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -28
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1647
+	.4byte	0x6122
+	.uleb128 0x44
+	.4byte	.LVL1648
+	.4byte	0x31f2
+	.byte	0
+	.uleb128 0x59
+	.4byte	.LASF828
+	.byte	0x3
+	.2byte	0x3c1
+	.4byte	0x50
+	.4byte	.LFB220
+	.4byte	.LFE220-.LFB220
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6e77
+	.uleb128 0x5a
+	.ascii	"LUN\000"
+	.byte	0x3
+	.2byte	0x3c1
+	.4byte	0xdaf
+	.4byte	.LLST428
+	.uleb128 0x4f
+	.4byte	.LASF731
+	.byte	0x3
+	.2byte	0x3c1
+	.4byte	0xdc5
+	.4byte	.LLST429
+	.uleb128 0x4f
+	.4byte	.LASF732
+	.byte	0x3
+	.2byte	0x3c1
+	.4byte	0xdc5
+	.4byte	.LLST430
+	.uleb128 0x4f
+	.4byte	.LASF733
+	.byte	0x3
+	.2byte	0x3c1
+	.4byte	0x50e9
+	.4byte	.LLST431
+	.uleb128 0x51
+	.4byte	.LASF596
+	.byte	0x3
+	.2byte	0x3c3
+	.4byte	0x2a63
+	.4byte	.LLST432
+	.uleb128 0x50
+	.ascii	"lpa\000"
+	.byte	0x3
+	.2byte	0x3c4
+	.4byte	0xdc5
+	.4byte	.LLST433
+	.uleb128 0x51
+	.4byte	.LASF829
+	.byte	0x3
+	.2byte	0x3c4
+	.4byte	0xdc5
+	.4byte	.LLST434
+	.uleb128 0x51
+	.4byte	.LASF830
+	.byte	0x3
+	.2byte	0x3c4
+	.4byte	0xdc5
+	.4byte	.LLST435
+	.uleb128 0x28
+	.4byte	.LASF663
+	.byte	0x3
+	.2byte	0x3c5
+	.4byte	0xdc5
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -56
+	.uleb128 0x50
+	.ascii	"ppa\000"
+	.byte	0x3
+	.2byte	0x3c5
+	.4byte	0xdc5
+	.4byte	.LLST436
+	.uleb128 0x50
+	.ascii	"i\000"
+	.byte	0x3
+	.2byte	0x3c6
+	.4byte	0xdc5
+	.4byte	.LLST437
+	.uleb128 0x51
+	.4byte	.LASF831
+	.byte	0x3
+	.2byte	0x3c6
+	.4byte	0xdc5
+	.4byte	.LLST438
+	.uleb128 0x51
+	.4byte	.LASF593
+	.byte	0x3
+	.2byte	0x3c6
+	.4byte	0xdc5
+	.4byte	.LLST439
+	.uleb128 0x51
+	.4byte	.LASF832
+	.byte	0x3
+	.2byte	0x3c7
+	.4byte	0xdc5
+	.4byte	.LLST440
+	.uleb128 0x51
+	.4byte	.LASF833
+	.byte	0x3
+	.2byte	0x3c7
+	.4byte	0xdc5
+	.4byte	.LLST441
+	.uleb128 0x51
+	.4byte	.LASF639
+	.byte	0x3
+	.2byte	0x3c8
+	.4byte	0x1d79
+	.4byte	.LLST442
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x530e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.8951
+	.uleb128 0x3e
+	.4byte	.Ldebug_ranges0+0x190
+	.4byte	0x6c38
+	.uleb128 0x28
+	.4byte	.LASF601
+	.byte	0x3
+	.2byte	0x43d
+	.4byte	0xde6
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -52
+	.uleb128 0x32
+	.4byte	.LVL1952
+	.4byte	0x26b9
+	.4byte	0x6bf7
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -52
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1954
+	.4byte	0x9222
+	.4byte	0x6c14
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC105
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL1955
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR180
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x44a
+	.byte	0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1873
+	.4byte	0x50ef
+	.4byte	0x6c5d
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x78
+	.sleb128 256
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -80
+	.byte	0x6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -92
+	.byte	0x6
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1885
+	.4byte	0x6e77
+	.uleb128 0x32
+	.4byte	.LVL1887
+	.4byte	0x9222
+	.4byte	0x6c8d
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR180
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x3f4
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1888
+	.4byte	0x6e77
+	.uleb128 0x32
+	.4byte	.LVL1890
+	.4byte	0x33c9
+	.4byte	0x6cad
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR52
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1891
+	.4byte	0x33c9
+	.4byte	0x6cc4
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR51
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1893
+	.4byte	0x33c9
+	.4byte	0x6cd8
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1896
+	.4byte	0x9222
+	.4byte	0x6cff
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR180
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x415
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1905
+	.4byte	0x2996
+	.4byte	0x6d1e
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x8
+	.byte	0x91
+	.sleb128 -76
+	.byte	0x6
+	.byte	0x7d
+	.sleb128 0
+	.byte	0x6
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1907
+	.4byte	0x5acd
+	.4byte	0x6d31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1908
+	.4byte	0x2bbf
+	.uleb128 0x32
+	.4byte	.LVL1909
+	.4byte	0x2996
+	.4byte	0x6d52
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1910
+	.4byte	0x2996
+	.4byte	0x6d6a
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1919
+	.4byte	0x22a6
+	.4byte	0x6d86
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -92
+	.byte	0x6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1928
+	.4byte	0x6e77
+	.uleb128 0x32
+	.4byte	.LVL1930
+	.4byte	0x33c9
+	.4byte	0x6da3
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1933
+	.4byte	0x5212
+	.4byte	0x6dc2
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -56
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1934
+	.4byte	0x32d7
+	.4byte	0x6dd6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1939
+	.4byte	0x230c
+	.4byte	0x6df1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -84
+	.byte	0x6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1948
+	.4byte	0x9222
+	.4byte	0x6e18
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR180
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x45f
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1953
+	.4byte	0x22a6
+	.uleb128 0x32
+	.4byte	.LVL1957
+	.4byte	0x230c
+	.4byte	0x6e34
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1960
+	.4byte	0x6ea6
+	.4byte	0x6e53
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL1961
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR180
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x46e
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF834
+	.byte	0x3
+	.2byte	0x3b7
+	.4byte	0x50
+	.4byte	.LFB219
+	.4byte	.LFE219-.LFB219
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6ea6
+	.uleb128 0x34
+	.4byte	.LVL1624
+	.4byte	0x6ea6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x5d
+	.4byte	.LASF835
+	.byte	0x3
+	.2byte	0x387
+	.4byte	.LFB218
+	.4byte	.LFE218-.LFB218
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x708c
+	.uleb128 0x5a
+	.ascii	"req\000"
+	.byte	0x3
+	.2byte	0x387
+	.4byte	0x19f9
+	.4byte	.LLST375
+	.uleb128 0x4f
+	.4byte	.LASF593
+	.byte	0x3
+	.2byte	0x387
+	.4byte	0xdc5
+	.4byte	.LLST376
+	.uleb128 0x4f
+	.4byte	.LASF836
+	.byte	0x3
+	.2byte	0x387
+	.4byte	0xdc5
+	.4byte	.LLST377
+	.uleb128 0x4f
+	.4byte	.LASF639
+	.byte	0x3
+	.2byte	0x387
+	.4byte	0x1d79
+	.4byte	.LLST378
+	.uleb128 0x50
+	.ascii	"i\000"
+	.byte	0x3
+	.2byte	0x389
+	.4byte	0xdc5
+	.4byte	.LLST379
+	.uleb128 0x5e
+	.ascii	"ppa\000"
+	.byte	0x3
+	.2byte	0x38a
+	.4byte	0xdc5
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x51
+	.4byte	.LASF663
+	.byte	0x3
+	.2byte	0x38a
+	.4byte	0xdc5
+	.4byte	.LLST380
+	.uleb128 0x51
+	.4byte	.LASF623
+	.byte	0x3
+	.2byte	0x38b
+	.4byte	0xdba
+	.4byte	.LLST381
+	.uleb128 0x51
+	.4byte	.LASF596
+	.byte	0x3
+	.2byte	0x38c
+	.4byte	0x2a63
+	.4byte	.LLST382
+	.uleb128 0x60
+	.4byte	.LASF687
+	.byte	0x3
+	.2byte	0x38d
+	.4byte	0xdc5
+	.byte	0
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x709c
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.8923
+	.uleb128 0x32
+	.4byte	.LVL1605
+	.4byte	0x251a
+	.4byte	0x6f85
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1606
+	.4byte	0x6122
+	.uleb128 0x32
+	.4byte	.LVL1608
+	.4byte	0x33c9
+	.4byte	0x6fa2
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1609
+	.4byte	0x2b35
+	.uleb128 0x32
+	.4byte	.LVL1610
+	.4byte	0x32d7
+	.4byte	0x6fbf
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1611
+	.4byte	0x251a
+	.4byte	0x6fdd
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1612
+	.4byte	0x9222
+	.4byte	0x7004
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR170
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x3a5
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1613
+	.4byte	0x5212
+	.4byte	0x701d
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1615
+	.4byte	0x6122
+	.4byte	0x7037
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x8
+	.byte	0x7b
+	.sleb128 0
+	.byte	0x9
+	.byte	0xea
+	.byte	0x24
+	.byte	0x9
+	.byte	0xf4
+	.byte	0x25
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1618
+	.4byte	0x9222
+	.4byte	0x7054
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC103
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1619
+	.4byte	0x31f2
+	.4byte	0x7068
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL1622
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR170
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x3b4
+	.byte	0
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xea
+	.4byte	0x709c
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0xc
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x708c
+	.uleb128 0x59
+	.4byte	.LASF837
+	.byte	0x3
+	.2byte	0x32d
+	.4byte	0x50
+	.4byte	.LFB217
+	.4byte	.LFE217-.LFB217
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7294
+	.uleb128 0x5a
+	.ascii	"LUN\000"
+	.byte	0x3
+	.2byte	0x32d
+	.4byte	0xdaf
+	.4byte	.LLST408
+	.uleb128 0x4f
+	.4byte	.LASF731
+	.byte	0x3
+	.2byte	0x32d
+	.4byte	0xdc5
+	.4byte	.LLST409
+	.uleb128 0x4f
+	.4byte	.LASF732
+	.byte	0x3
+	.2byte	0x32d
+	.4byte	0xdc5
+	.4byte	.LLST410
+	.uleb128 0x4f
+	.4byte	.LASF733
+	.byte	0x3
+	.2byte	0x32d
+	.4byte	0x50e9
+	.4byte	.LLST411
+	.uleb128 0x50
+	.ascii	"ret\000"
+	.byte	0x3
+	.2byte	0x32f
+	.4byte	0x50
+	.4byte	.LLST412
+	.uleb128 0x51
+	.4byte	.LASF829
+	.byte	0x3
+	.2byte	0x330
+	.4byte	0xdc5
+	.4byte	.LLST413
+	.uleb128 0x51
+	.4byte	.LASF830
+	.byte	0x3
+	.2byte	0x330
+	.4byte	0xdc5
+	.4byte	.LLST414
+	.uleb128 0x51
+	.4byte	.LASF838
+	.byte	0x3
+	.2byte	0x330
+	.4byte	0xdc5
+	.4byte	.LLST415
+	.uleb128 0x50
+	.ascii	"lpa\000"
+	.byte	0x3
+	.2byte	0x331
+	.4byte	0xdc5
+	.4byte	.LLST416
+	.uleb128 0x5e
+	.ascii	"ppa\000"
+	.byte	0x3
+	.2byte	0x331
+	.4byte	0xdc5
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x50
+	.ascii	"n\000"
+	.byte	0x3
+	.2byte	0x333
+	.4byte	0xdc5
+	.4byte	.LLST417
+	.uleb128 0x51
+	.4byte	.LASF593
+	.byte	0x3
+	.2byte	0x333
+	.4byte	0xdc5
+	.4byte	.LLST418
+	.uleb128 0x51
+	.4byte	.LASF831
+	.byte	0x3
+	.2byte	0x333
+	.4byte	0xdc5
+	.4byte	.LLST419
+	.uleb128 0x51
+	.4byte	.LASF839
+	.byte	0x3
+	.2byte	0x334
+	.4byte	0xdc5
+	.4byte	.LLST420
+	.uleb128 0x51
+	.4byte	.LASF840
+	.byte	0x3
+	.2byte	0x334
+	.4byte	0xdc5
+	.4byte	.LLST421
+	.uleb128 0x51
+	.4byte	.LASF841
+	.byte	0x3
+	.2byte	0x335
+	.4byte	0xdc5
+	.4byte	.LLST422
+	.uleb128 0x51
+	.4byte	.LASF842
+	.byte	0x3
+	.2byte	0x336
+	.4byte	0xdc5
+	.4byte	.LLST423
+	.uleb128 0x5f
+	.4byte	.LBB295
+	.4byte	.LBE295-.LBB295
+	.4byte	0x71f8
+	.uleb128 0x51
+	.4byte	.LASF608
+	.byte	0x3
+	.2byte	0x37a
+	.4byte	0xdba
+	.4byte	.LLST424
+	.uleb128 0x44
+	.4byte	.LVL1860
+	.4byte	0x6122
+	.uleb128 0x44
+	.4byte	.LVL1861
+	.4byte	0x2bbf
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1817
+	.4byte	0x4fd7
+	.4byte	0x721a
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x76
+	.sleb128 256
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -56
+	.byte	0x6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1823
+	.4byte	0x6e77
+	.uleb128 0x32
+	.4byte	.LVL1832
+	.4byte	0x2996
+	.4byte	0x723b
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1834
+	.4byte	0x5212
+	.4byte	0x725a
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1840
+	.4byte	0x26b9
+	.4byte	0x7274
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1842
+	.4byte	0x22a6
+	.uleb128 0x34
+	.4byte	.LVL1849
+	.4byte	0x230c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x200
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF843
+	.byte	0x3
+	.2byte	0x325
+	.4byte	0x50
+	.4byte	.LFB216
+	.4byte	.LFE216-.LFB216
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x72b8
+	.uleb128 0x44
+	.4byte	.LVL1629
+	.4byte	0x72b8
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF844
+	.byte	0x3
+	.2byte	0x31c
+	.4byte	0x50
+	.4byte	.LFB215
+	.4byte	.LFE215-.LFB215
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7301
+	.uleb128 0x44
+	.4byte	.LVL1625
+	.4byte	0x6e77
+	.uleb128 0x44
+	.4byte	.LVL1626
+	.4byte	0x5313
+	.uleb128 0x32
+	.4byte	.LVL1627
+	.4byte	0x4f7f
+	.4byte	0x72f7
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1628
+	.4byte	0x4d0e
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF845
+	.byte	0x3
+	.2byte	0x2e6
+	.4byte	0x50
+	.4byte	.LFB214
+	.4byte	.LFE214-.LFB214
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x73cf
+	.uleb128 0x28
+	.4byte	.LASF846
+	.byte	0x3
+	.2byte	0x2e8
+	.4byte	0x73cf
+	.uleb128 0x6
+	.byte	0x3
+	.4byte	g_nand_phy_info
+	.byte	0x9f
+	.uleb128 0x55
+	.4byte	.LASF847
+	.byte	0x3
+	.2byte	0x2f3
+	.4byte	.LDL2
+	.uleb128 0x5f
+	.4byte	.LBB305
+	.4byte	.LBE305-.LBB305
+	.4byte	0x736a
+	.uleb128 0x50
+	.ascii	"i\000"
+	.byte	0x3
+	.2byte	0x310
+	.4byte	0xdc5
+	.4byte	.LLST452
+	.uleb128 0x34
+	.4byte	.LVL2072
+	.4byte	0x2996
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL2064
+	.4byte	0x9222
+	.4byte	0x738a
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC71
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC70
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL2065
+	.4byte	0x7a20
+	.4byte	0x73a1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2066
+	.4byte	0x77c3
+	.uleb128 0x44
+	.4byte	.LVL2067
+	.4byte	0x7713
+	.uleb128 0x44
+	.4byte	.LVL2068
+	.4byte	0x5fb8
+	.uleb128 0x44
+	.4byte	.LVL2069
+	.4byte	0x6437
+	.uleb128 0x44
+	.4byte	.LVL2070
+	.4byte	0x3937
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xed2
+	.uleb128 0x59
+	.4byte	.LASF848
+	.byte	0x3
+	.2byte	0x26e
+	.4byte	0x50
+	.4byte	.LFB213
+	.4byte	.LFE213-.LFB213
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x752b
+	.uleb128 0x51
+	.4byte	.LASF717
+	.byte	0x3
+	.2byte	0x270
+	.4byte	0xdba
+	.4byte	.LLST448
+	.uleb128 0x51
+	.4byte	.LASF849
+	.byte	0x3
+	.2byte	0x270
+	.4byte	0xdba
+	.4byte	.LLST449
+	.uleb128 0x51
+	.4byte	.LASF850
+	.byte	0x3
+	.2byte	0x271
+	.4byte	0xdba
+	.4byte	.LLST450
+	.uleb128 0x50
+	.ascii	"i\000"
+	.byte	0x3
+	.2byte	0x272
+	.4byte	0xdba
+	.4byte	.LLST451
+	.uleb128 0x55
+	.4byte	.LASF851
+	.byte	0x3
+	.2byte	0x2bc
+	.4byte	.L1802
+	.uleb128 0x55
+	.4byte	.LASF852
+	.byte	0x3
+	.2byte	0x2cc
+	.4byte	.L1804
+	.uleb128 0x44
+	.4byte	.LVL2018
+	.4byte	0x5fb8
+	.uleb128 0x44
+	.4byte	.LVL2019
+	.4byte	0x6437
+	.uleb128 0x44
+	.4byte	.LVL2020
+	.4byte	0x61d9
+	.uleb128 0x44
+	.4byte	.LVL2034
+	.4byte	0x65f0
+	.uleb128 0x32
+	.4byte	.LVL2035
+	.4byte	0x230c
+	.4byte	0x747c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL2036
+	.4byte	0x230c
+	.4byte	0x7490
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL2037
+	.4byte	0x3ec7
+	.4byte	0x74a4
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL2041
+	.4byte	0x752b
+	.4byte	0x74bd
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2048
+	.4byte	0x7a7c
+	.uleb128 0x44
+	.4byte	.LVL2049
+	.4byte	0x5fb8
+	.uleb128 0x32
+	.4byte	.LVL2052
+	.4byte	0x752b
+	.4byte	0x74e8
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 -1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL2055
+	.4byte	0x752b
+	.4byte	0x74fb
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL2059
+	.4byte	0x3ec7
+	.4byte	0x750f
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2060
+	.4byte	0x5dbf
+	.uleb128 0x44
+	.4byte	.LVL2061
+	.4byte	0x4d0e
+	.uleb128 0x44
+	.4byte	.LVL2062
+	.4byte	0x3937
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF853
+	.byte	0x3
+	.2byte	0x20f
+	.4byte	0x50
+	.4byte	.LFB212
+	.4byte	.LFE212-.LFB212
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x76e9
+	.uleb128 0x4f
+	.4byte	.LASF717
+	.byte	0x3
+	.2byte	0x20f
+	.4byte	0xdba
+	.4byte	.LLST179
+	.uleb128 0x4f
+	.4byte	.LASF854
+	.byte	0x3
+	.2byte	0x20f
+	.4byte	0xdaf
+	.4byte	.LLST180
+	.uleb128 0x51
+	.4byte	.LASF849
+	.byte	0x3
+	.2byte	0x211
+	.4byte	0xdba
+	.4byte	.LLST181
+	.uleb128 0x51
+	.4byte	.LASF569
+	.byte	0x3
+	.2byte	0x211
+	.4byte	0xdba
+	.4byte	.LLST182
+	.uleb128 0x51
+	.4byte	.LASF592
+	.byte	0x3
+	.2byte	0x212
+	.4byte	0xdba
+	.4byte	.LLST183
+	.uleb128 0x51
+	.4byte	.LASF388
+	.byte	0x3
+	.2byte	0x212
+	.4byte	0xdba
+	.4byte	.LLST184
+	.uleb128 0x51
+	.4byte	.LASF855
+	.byte	0x3
+	.2byte	0x213
+	.4byte	0xdba
+	.4byte	.LLST185
+	.uleb128 0x51
+	.4byte	.LASF856
+	.byte	0x3
+	.2byte	0x214
+	.4byte	0xdba
+	.4byte	.LLST186
+	.uleb128 0x51
+	.4byte	.LASF857
+	.byte	0x3
+	.2byte	0x215
+	.4byte	0xdba
+	.4byte	.LLST187
+	.uleb128 0x51
+	.4byte	.LASF858
+	.byte	0x3
+	.2byte	0x216
+	.4byte	0xdba
+	.4byte	.LLST188
+	.uleb128 0x55
+	.4byte	.LASF859
+	.byte	0x3
+	.2byte	0x240
+	.4byte	.L508
+	.uleb128 0x32
+	.4byte	.LVL643
+	.4byte	0x2464
+	.4byte	0x760b
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL651
+	.4byte	0x251a
+	.4byte	0x7631
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -56
+	.byte	0x6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL658
+	.4byte	0x2464
+	.4byte	0x764b
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL660
+	.4byte	0x6192
+	.4byte	0x7661
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -60
+	.byte	0x94
+	.byte	0x2
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL662
+	.4byte	0x76e9
+	.4byte	0x7675
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL663
+	.4byte	0x67c5
+	.4byte	0x7689
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL674
+	.4byte	0x6828
+	.uleb128 0x32
+	.4byte	.LVL678
+	.4byte	0x6192
+	.4byte	0x76a8
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -60
+	.byte	0x94
+	.byte	0x2
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL680
+	.4byte	0x76e9
+	.4byte	0x76bc
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL681
+	.4byte	0x67c5
+	.4byte	0x76d0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL689
+	.4byte	0x6828
+	.uleb128 0x34
+	.4byte	.LVL693
+	.4byte	0x5f01
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF860
+	.byte	0x3
+	.2byte	0x201
+	.4byte	0x50
+	.byte	0x1
+	.4byte	0x7713
+	.uleb128 0x47
+	.4byte	.LASF388
+	.byte	0x3
+	.2byte	0x201
+	.4byte	0xdba
+	.uleb128 0x48
+	.4byte	.LASF861
+	.byte	0x3
+	.2byte	0x203
+	.4byte	0xdba
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF862
+	.byte	0x3
+	.2byte	0x1ec
+	.4byte	0x50
+	.4byte	.LFB210
+	.4byte	.LFE210-.LFB210
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x77c3
+	.uleb128 0x32
+	.4byte	.LVL1039
+	.4byte	0x230c
+	.4byte	0x7741
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1040
+	.4byte	0x230c
+	.4byte	0x7755
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1041
+	.4byte	0x230c
+	.4byte	0x7769
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1042
+	.4byte	0x230c
+	.4byte	0x778c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR79
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x30
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1043
+	.4byte	0x230c
+	.4byte	0x77b0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR83
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x200
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1044
+	.4byte	0x31cf
+	.uleb128 0x44
+	.4byte	.LVL1045
+	.4byte	0x4719
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF863
+	.byte	0x3
+	.2byte	0x116
+	.4byte	0x50
+	.4byte	.LFB209
+	.4byte	.LFE209-.LFB209
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7a20
+	.uleb128 0x50
+	.ascii	"i\000"
+	.byte	0x3
+	.2byte	0x118
+	.4byte	0xdc5
+	.4byte	.LLST192
+	.uleb128 0x51
+	.4byte	.LASF864
+	.byte	0x3
+	.2byte	0x119
+	.4byte	0xdc5
+	.4byte	.LLST193
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x6576
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.8799
+	.uleb128 0x44
+	.4byte	.LVL697
+	.4byte	0x2928
+	.uleb128 0x44
+	.4byte	.LVL698
+	.4byte	0x2928
+	.uleb128 0x32
+	.4byte	.LVL700
+	.4byte	0x2928
+	.4byte	0x7830
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL701
+	.4byte	0x2928
+	.4byte	0x7844
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL702
+	.4byte	0x2928
+	.4byte	0x7858
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL703
+	.4byte	0x2928
+	.4byte	0x786c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL704
+	.4byte	0x2928
+	.4byte	0x7880
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL706
+	.4byte	0x2928
+	.4byte	0x7894
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL707
+	.4byte	0x2928
+	.4byte	0x78a8
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL708
+	.4byte	0x2928
+	.4byte	0x78bc
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL709
+	.4byte	0x2928
+	.uleb128 0x32
+	.4byte	.LVL710
+	.4byte	0x2928
+	.4byte	0x78d9
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL711
+	.4byte	0x2928
+	.4byte	0x78ed
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL713
+	.4byte	0x2928
+	.uleb128 0x32
+	.4byte	.LVL715
+	.4byte	0x2928
+	.4byte	0x790a
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL716
+	.4byte	0x2928
+	.4byte	0x7920
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x7b
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL717
+	.4byte	0x2928
+	.uleb128 0x44
+	.4byte	.LVL718
+	.4byte	0x2928
+	.uleb128 0x44
+	.4byte	.LVL719
+	.4byte	0x2928
+	.uleb128 0x32
+	.4byte	.LVL722
+	.4byte	0x2928
+	.4byte	0x794f
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL723
+	.4byte	0x2928
+	.4byte	0x7963
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL727
+	.4byte	0x2928
+	.4byte	0x7977
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL728
+	.4byte	0x2928
+	.4byte	0x798b
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL730
+	.4byte	0x2928
+	.uleb128 0x44
+	.4byte	.LVL731
+	.4byte	0x2928
+	.uleb128 0x44
+	.4byte	.LVL732
+	.4byte	0x2928
+	.uleb128 0x44
+	.4byte	.LVL733
+	.4byte	0x2928
+	.uleb128 0x44
+	.4byte	.LVL734
+	.4byte	0x2928
+	.uleb128 0x32
+	.4byte	.LVL735
+	.4byte	0x230c
+	.4byte	0x79cd
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -44
+	.byte	0x6
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL737
+	.4byte	0x2928
+	.uleb128 0x44
+	.4byte	.LVL740
+	.4byte	0x2928
+	.uleb128 0x44
+	.4byte	.LVL743
+	.4byte	0x2928
+	.uleb128 0x44
+	.4byte	.LVL746
+	.4byte	0x2928
+	.uleb128 0x44
+	.4byte	.LVL749
+	.4byte	0x2928
+	.uleb128 0x44
+	.4byte	.LVL753
+	.4byte	0x2928
+	.uleb128 0x34
+	.4byte	.LVL757
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC82
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR138
+	.byte	0
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LASF865
+	.byte	0x3
+	.byte	0xb6
+	.4byte	0x50
+	.4byte	.LFB208
+	.4byte	.LFE208-.LFB208
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7a7c
+	.uleb128 0x2c
+	.4byte	.LASF846
+	.byte	0x3
+	.byte	0xb6
+	.4byte	0x73cf
+	.4byte	.LLST10
+	.uleb128 0x3b
+	.ascii	"i\000"
+	.byte	0x3
+	.byte	0xb8
+	.4byte	0xdc5
+	.4byte	.LLST11
+	.uleb128 0x44
+	.4byte	.LVL30
+	.4byte	0x7abd
+	.uleb128 0x32
+	.4byte	.LVL31
+	.4byte	0x7abd
+	.4byte	0x7a72
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL35
+	.4byte	0x7a7c
+	.byte	0
+	.uleb128 0x2b
+	.4byte	.LASF866
+	.byte	0x3
+	.byte	0xa4
+	.4byte	0x50
+	.4byte	.LFB207
+	.4byte	.LFE207-.LFB207
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7aa5
+	.uleb128 0x2c
+	.4byte	.LASF867
+	.byte	0x3
+	.byte	0xa4
+	.4byte	0xdba
+	.4byte	.LLST9
+	.byte	0
+	.uleb128 0x64
+	.4byte	.LASF868
+	.byte	0x3
+	.byte	0x9e
+	.byte	0x1
+	.4byte	0x7abd
+	.uleb128 0x36
+	.4byte	.LASF869
+	.byte	0x3
+	.byte	0x9e
+	.4byte	0xdc5
+	.byte	0
+	.uleb128 0x2b
+	.4byte	.LASF870
+	.byte	0x3
+	.byte	0x7f
+	.4byte	0xdba
+	.4byte	.LFB205
+	.4byte	.LFE205-.LFB205
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7b02
+	.uleb128 0x2f
+	.ascii	"num\000"
+	.byte	0x3
+	.byte	0x7f
+	.4byte	0xdc5
+	.4byte	.LLST6
+	.uleb128 0x3b
+	.ascii	"i\000"
+	.byte	0x3
+	.byte	0x81
+	.4byte	0xdba
+	.4byte	.LLST7
+	.uleb128 0x30
+	.4byte	.LASF871
+	.byte	0x3
+	.byte	0x82
+	.4byte	0xdc5
+	.4byte	.LLST8
+	.byte	0
+	.uleb128 0x2b
+	.4byte	.LASF872
+	.byte	0x3
+	.byte	0x71
+	.4byte	0x50
+	.4byte	.LFB204
+	.4byte	.LFE204-.LFB204
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7b70
+	.uleb128 0x2c
+	.4byte	.LASF299
+	.byte	0x3
+	.byte	0x71
+	.4byte	0xf6
+	.4byte	.LLST111
+	.uleb128 0x3b
+	.ascii	"buf\000"
+	.byte	0x3
+	.byte	0x73
+	.4byte	0xf6
+	.4byte	.LLST112
+	.uleb128 0x32
+	.4byte	.LVL451
+	.4byte	0x9238
+	.4byte	0x7b5f
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC71
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC70
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL453
+	.4byte	0x7b70
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x2b
+	.4byte	.LASF873
+	.byte	0x3
+	.byte	0xb
+	.4byte	0x50
+	.4byte	.LFB203
+	.4byte	.LFE203-.LFB203
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x83c6
+	.uleb128 0x2c
+	.4byte	.LASF299
+	.byte	0x3
+	.byte	0xb
+	.4byte	0xf6
+	.4byte	.LLST106
+	.uleb128 0x3b
+	.ascii	"i\000"
+	.byte	0x3
+	.byte	0xd
+	.4byte	0x50
+	.4byte	.LLST107
+	.uleb128 0x3b
+	.ascii	"buf\000"
+	.byte	0x3
+	.byte	0xe
+	.4byte	0xf6
+	.4byte	.LLST108
+	.uleb128 0x5f
+	.4byte	.LBB209
+	.4byte	.LBE209-.LBB209
+	.4byte	0x7c04
+	.uleb128 0x30
+	.4byte	.LASF608
+	.byte	0x3
+	.byte	0x57
+	.4byte	0xdba
+	.4byte	.LLST109
+	.uleb128 0x32
+	.4byte	.LVL437
+	.4byte	0x5acd
+	.4byte	0x7be4
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL439
+	.4byte	0x9238
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC68
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x5f
+	.4byte	.LBB210
+	.4byte	.LBE210-.LBB210
+	.4byte	0x7c3d
+	.uleb128 0x30
+	.4byte	.LASF608
+	.byte	0x3
+	.byte	0x60
+	.4byte	0xdba
+	.4byte	.LLST110
+	.uleb128 0x34
+	.4byte	.LVL447
+	.4byte	0x9238
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 -1
+	.byte	0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL302
+	.4byte	0x9238
+	.4byte	0x7c5a
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC2
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL304
+	.4byte	0x9238
+	.4byte	0x7c77
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC3
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL306
+	.4byte	0x9238
+	.4byte	0x7c94
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC4
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL308
+	.4byte	0x9238
+	.4byte	0x7cb1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC5
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL310
+	.4byte	0x9238
+	.4byte	0x7cce
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL312
+	.4byte	0x9238
+	.4byte	0x7ceb
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL314
+	.4byte	0x9238
+	.4byte	0x7d08
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL316
+	.4byte	0x9238
+	.4byte	0x7d25
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC9
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL318
+	.4byte	0x9238
+	.4byte	0x7d42
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC10
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL320
+	.4byte	0x9238
+	.4byte	0x7d5f
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC11
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL322
+	.4byte	0x9238
+	.4byte	0x7d7c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC12
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL324
+	.4byte	0x9238
+	.4byte	0x7d99
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC13
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL326
+	.4byte	0x9238
+	.4byte	0x7db6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC14
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL328
+	.4byte	0x9238
+	.4byte	0x7dd3
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC15
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL330
+	.4byte	0x9238
+	.4byte	0x7df0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC16
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL332
+	.4byte	0x9238
+	.4byte	0x7e0d
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC17
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL334
+	.4byte	0x9238
+	.4byte	0x7e2a
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC18
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL336
+	.4byte	0x9238
+	.4byte	0x7e47
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC19
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL338
+	.4byte	0x9238
+	.4byte	0x7e64
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC20
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL340
+	.4byte	0x9238
+	.4byte	0x7e81
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC21
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL342
+	.4byte	0x9238
+	.4byte	0x7e9e
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC22
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL344
+	.4byte	0x9238
+	.4byte	0x7ebb
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC23
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL346
+	.4byte	0x9238
+	.4byte	0x7ed8
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC24
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL348
+	.4byte	0x9238
+	.4byte	0x7ef5
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC25
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL350
+	.4byte	0x9238
+	.4byte	0x7f12
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC26
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL352
+	.4byte	0x9238
+	.4byte	0x7f2f
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC27
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL354
+	.4byte	0x9238
+	.4byte	0x7f4c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC28
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL356
+	.4byte	0x9238
+	.4byte	0x7f69
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC29
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL358
+	.4byte	0x9238
+	.4byte	0x7f86
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC30
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL360
+	.4byte	0x9238
+	.4byte	0x7fa3
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL362
+	.4byte	0x9238
+	.4byte	0x7fc0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
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+	.byte	0
+	.uleb128 0x32
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+	.4byte	0x9238
+	.4byte	0x7fdd
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.uleb128 0x2e
+	.uleb128 0x1
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+	.byte	0
+	.uleb128 0x32
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+	.4byte	0x9238
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+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x1
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+	.uleb128 0x5
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+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL368
+	.4byte	0x9238
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+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x5
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+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL370
+	.4byte	0x9238
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+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL372
+	.4byte	0x9238
+	.4byte	0x8051
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x5
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+	.4byte	.LC37
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL374
+	.4byte	0x9238
+	.4byte	0x806e
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL376
+	.4byte	0x9238
+	.4byte	0x808b
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x5
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+	.4byte	.LC39
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL378
+	.4byte	0x9238
+	.4byte	0x80a8
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x5
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+	.4byte	.LC40
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL380
+	.4byte	0x9238
+	.4byte	0x80c5
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x5
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+	.4byte	.LC41
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL382
+	.4byte	0x9238
+	.4byte	0x80e2
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC42
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL384
+	.4byte	0x9238
+	.4byte	0x80ff
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC43
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL386
+	.4byte	0x9238
+	.4byte	0x811c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC44
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL388
+	.4byte	0x9238
+	.4byte	0x8139
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC45
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL390
+	.4byte	0x9238
+	.4byte	0x8156
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC46
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL392
+	.4byte	0x9238
+	.4byte	0x8173
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC47
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL394
+	.4byte	0x9238
+	.4byte	0x8190
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC48
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL396
+	.4byte	0x9238
+	.4byte	0x81ad
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC49
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL398
+	.4byte	0x9238
+	.4byte	0x81ca
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC50
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL400
+	.4byte	0x9238
+	.4byte	0x81e7
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x5
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+	.4byte	.LC51
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL402
+	.4byte	0x9238
+	.4byte	0x8204
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC52
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL404
+	.4byte	0x9238
+	.4byte	0x8221
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC53
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL406
+	.4byte	0x9238
+	.4byte	0x823e
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC54
+	.byte	0
+	.uleb128 0x32
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+	.4byte	0x9238
+	.4byte	0x825b
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC55
+	.byte	0
+	.uleb128 0x32
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+	.4byte	0x9238
+	.4byte	0x8278
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC56
+	.byte	0
+	.uleb128 0x32
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+	.4byte	0x9238
+	.4byte	0x8295
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x5
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+	.byte	0
+	.uleb128 0x32
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+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC58
+	.byte	0
+	.uleb128 0x32
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+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x5
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+	.4byte	.LC59
+	.byte	0
+	.uleb128 0x32
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+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC60
+	.byte	0
+	.uleb128 0x32
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+	.4byte	0x8309
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC61
+	.byte	0
+	.uleb128 0x32
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+	.4byte	0x8326
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC62
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL424
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+	.uleb128 0x2e
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+	.uleb128 0x2
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+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x5
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+	.byte	0
+	.uleb128 0x32
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+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x5
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+	.byte	0
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+	.uleb128 0x32
+	.4byte	.LVL429
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+	.uleb128 0x2e
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+	.uleb128 0x2
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+	.uleb128 0x5
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+	.byte	0
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+	.uleb128 0x5
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+	.uleb128 0x2e
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+	.4byte	.LFE351-.LFB351
+	.uleb128 0x1
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+	.uleb128 0x5c
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+	.uleb128 0x5c
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+	.uleb128 0x6e
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+	.uleb128 0x6f
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+	.uleb128 0x6f
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+	.uleb128 0x6f
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+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR46
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xbd
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL142
+	.4byte	0x5ce3
+	.byte	0
+	.uleb128 0x70
+	.4byte	0x5d9a
+	.4byte	.LFB247
+	.4byte	.LFE247-.LFB247
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8597
+	.uleb128 0x5c
+	.4byte	0x5da6
+	.4byte	.LLST58
+	.uleb128 0x6e
+	.4byte	0x5db1
+	.uleb128 0x3e
+	.4byte	.Ldebug_ranges0+0x48
+	.4byte	0x858d
+	.uleb128 0x6d
+	.4byte	0x5da6
+	.uleb128 0x72
+	.4byte	.Ldebug_ranges0+0x48
+	.uleb128 0x6e
+	.4byte	0x854c
+	.uleb128 0x2d
+	.4byte	.LVL163
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR49
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xb6
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL161
+	.4byte	0x5c6a
+	.byte	0
+	.uleb128 0x70
+	.4byte	0x5a4e
+	.4byte	.LFB255
+	.4byte	.LFE255-.LFB255
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x86b8
+	.uleb128 0x5c
+	.4byte	0x5a5f
+	.4byte	.LLST70
+	.uleb128 0x6e
+	.4byte	0x5a6b
+	.uleb128 0x6e
+	.4byte	0x5a77
+	.uleb128 0x6e
+	.4byte	0x5a83
+	.uleb128 0x6e
+	.4byte	0x5a8f
+	.uleb128 0x6e
+	.4byte	0x5a9b
+	.uleb128 0x6e
+	.4byte	0x5aa7
+	.uleb128 0x6e
+	.4byte	0x5ab3
+	.uleb128 0x6e
+	.4byte	0x5abf
+	.uleb128 0x67
+	.4byte	.LBB189
+	.4byte	.LBE189-.LBB189
+	.uleb128 0x5c
+	.4byte	0x5a5f
+	.4byte	.LLST71
+	.uleb128 0x67
+	.4byte	.LBB190
+	.4byte	.LBE190-.LBB190
+	.uleb128 0x6f
+	.4byte	0x85b3
+	.4byte	.LLST72
+	.uleb128 0x6f
+	.4byte	0x85b8
+	.4byte	.LLST73
+	.uleb128 0x6f
+	.4byte	0x85bd
+	.4byte	.LLST74
+	.uleb128 0x6f
+	.4byte	0x85c2
+	.4byte	.LLST75
+	.uleb128 0x6f
+	.4byte	0x85c7
+	.4byte	.LLST76
+	.uleb128 0x6f
+	.4byte	0x85cc
+	.4byte	.LLST77
+	.uleb128 0x6f
+	.4byte	0x85d1
+	.4byte	.LLST78
+	.uleb128 0x6e
+	.4byte	0x85d6
+	.uleb128 0x32
+	.4byte	.LVL206
+	.4byte	0x9222
+	.4byte	0x8661
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR54
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x1aa
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL213
+	.4byte	0x5bca
+	.4byte	0x867e
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR42
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL214
+	.4byte	0x9222
+	.4byte	0x86a5
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR54
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x1b3
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL215
+	.4byte	0x5d75
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x70
+	.4byte	0x57e5
+	.4byte	.LFB258
+	.4byte	.LFE258-.LFB258
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8748
+	.uleb128 0x5c
+	.4byte	0x57f6
+	.4byte	.LLST79
+	.uleb128 0x6f
+	.4byte	0x5802
+	.4byte	.LLST80
+	.uleb128 0x6f
+	.4byte	0x580e
+	.4byte	.LLST81
+	.uleb128 0x6e
+	.4byte	0x581a
+	.uleb128 0x5f
+	.4byte	.LBB193
+	.4byte	.LBE193-.LBB193
+	.4byte	0x873e
+	.uleb128 0x5c
+	.4byte	0x57f6
+	.4byte	.LLST82
+	.uleb128 0x67
+	.4byte	.LBB194
+	.4byte	.LBE194-.LBB194
+	.uleb128 0x6e
+	.4byte	0x86d4
+	.uleb128 0x6e
+	.4byte	0x86dd
+	.uleb128 0x6e
+	.4byte	0x86e6
+	.uleb128 0x34
+	.4byte	.LVL220
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR55
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x214
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL222
+	.4byte	0x5dbf
+	.byte	0
+	.uleb128 0x70
+	.4byte	0x4f5b
+	.4byte	.LFB269
+	.4byte	.LFE269-.LFB269
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8786
+	.uleb128 0x5c
+	.4byte	0x4f68
+	.4byte	.LLST86
+	.uleb128 0x74
+	.4byte	0x4f74
+	.byte	0
+	.uleb128 0x72
+	.4byte	.Ldebug_ranges0+0x60
+	.uleb128 0x71
+	.4byte	0x4f68
+	.uleb128 0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.uleb128 0x72
+	.4byte	.Ldebug_ranges0+0x60
+	.uleb128 0x6e
+	.4byte	0x8764
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x70
+	.4byte	0x4ad9
+	.4byte	.LFB275
+	.4byte	.LFE275-.LFB275
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x87bf
+	.uleb128 0x5c
+	.4byte	0x4ae6
+	.4byte	.LLST87
+	.uleb128 0x5c
+	.4byte	0x4af2
+	.4byte	.LLST88
+	.uleb128 0x2d
+	.4byte	.LVL248
+	.4byte	0x8420
+	.uleb128 0x3c
+	.4byte	0x4af2
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0
+	.byte	0
+	.uleb128 0x70
+	.4byte	0x3fe1
+	.4byte	.LFB285
+	.4byte	.LFE285-.LFB285
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8805
+	.uleb128 0x71
+	.4byte	0x3fee
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x6e
+	.4byte	0x3ffa
+	.uleb128 0x67
+	.4byte	.LBB207
+	.4byte	.LBE207-.LBB207
+	.uleb128 0x5c
+	.4byte	0x3fee
+	.4byte	.LLST93
+	.uleb128 0x67
+	.4byte	.LBB208
+	.4byte	.LBE208-.LBB208
+	.uleb128 0x6f
+	.4byte	0x87d9
+	.4byte	.LLST94
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x70
+	.4byte	0x375c
+	.4byte	.LFB300
+	.4byte	.LFE300-.LFB300
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x883e
+	.uleb128 0x5c
+	.4byte	0x376d
+	.4byte	.LLST120
+	.uleb128 0x67
+	.4byte	.LBB213
+	.4byte	.LBE213-.LBB213
+	.uleb128 0x5c
+	.4byte	0x376d
+	.4byte	.LLST121
+	.uleb128 0x44
+	.4byte	.LVL487
+	.4byte	0x5d9a
+	.byte	0
+	.byte	0
+	.uleb128 0x70
+	.4byte	0x2b28
+	.4byte	.LFB319
+	.4byte	.LFE319-.LFB319
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8864
+	.uleb128 0x44
+	.4byte	.LVL547
+	.4byte	0x6122
+	.uleb128 0x44
+	.4byte	.LVL548
+	.4byte	0x2bbf
+	.byte	0
+	.uleb128 0x70
+	.4byte	0x2a7e
+	.4byte	.LFB321
+	.4byte	.LFE321-.LFB321
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8931
+	.uleb128 0x74
+	.4byte	0x2a8f
+	.byte	0
+	.uleb128 0x6e
+	.4byte	0x2a9b
+	.uleb128 0x6e
+	.4byte	0x2aa5
+	.uleb128 0x6e
+	.4byte	0x2ab1
+	.uleb128 0x3e
+	.4byte	.Ldebug_ranges0+0xb8
+	.4byte	0x8913
+	.uleb128 0x6e
+	.4byte	0x8877
+	.uleb128 0x6f
+	.4byte	0x887d
+	.4byte	.LLST238
+	.uleb128 0x75
+	.4byte	0x8882
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -104
+	.uleb128 0x75
+	.4byte	0x8887
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -80
+	.uleb128 0x5f
+	.4byte	.LBB234
+	.4byte	.LBE234-.LBB234
+	.4byte	0x88fd
+	.uleb128 0x75
+	.4byte	0x2ac2
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -100
+	.uleb128 0x32
+	.4byte	.LVL918
+	.4byte	0x26b9
+	.4byte	0x88ea
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -100
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL919
+	.4byte	0x6122
+	.uleb128 0x44
+	.4byte	.LVL920
+	.4byte	0x2bbf
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL917
+	.4byte	0x5212
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x67
+	.4byte	.LBB237
+	.4byte	.LBE237-.LBB237
+	.uleb128 0x75
+	.4byte	0x2ad0
+	.uleb128 0xd
+	.byte	0x40
+	.byte	0x45
+	.byte	0x24
+	.byte	0x3
+	.4byte	g_max_erase_count
+	.byte	0x6
+	.byte	0x3a
+	.byte	0x25
+	.byte	0x26
+	.byte	0x9f
+	.byte	0
+	.byte	0
+	.uleb128 0x70
+	.4byte	0x2410
+	.4byte	.LFB346
+	.4byte	.LFE346-.LFB346
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8a39
+	.uleb128 0x5c
+	.4byte	0x2420
+	.4byte	.LLST280
+	.uleb128 0x74
+	.4byte	0x242b
+	.byte	0
+	.uleb128 0x6e
+	.4byte	0x2436
+	.uleb128 0x6e
+	.4byte	0x2441
+	.uleb128 0x67
+	.4byte	.LBB241
+	.4byte	.LBE241-.LBB241
+	.uleb128 0x5c
+	.4byte	0x2420
+	.4byte	.LLST281
+	.uleb128 0x67
+	.4byte	.LBB242
+	.4byte	.LBE242-.LBB242
+	.uleb128 0x6e
+	.4byte	0x894d
+	.uleb128 0x75
+	.4byte	0x8953
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -80
+	.uleb128 0x75
+	.4byte	0x8958
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -100
+	.uleb128 0x76
+	.4byte	0x244c
+	.4byte	.LDL1
+	.uleb128 0x32
+	.4byte	.LVL1143
+	.4byte	0x230c
+	.4byte	0x89b9
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -80
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xa5
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1144
+	.4byte	0x230c
+	.4byte	0x89d8
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x5a
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x38
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1145
+	.4byte	0x2464
+	.4byte	0x89f7
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -100
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1146
+	.4byte	0x251a
+	.4byte	0x8a1b
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -100
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL1148
+	.4byte	0x2464
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -100
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x70
+	.4byte	0x2ade
+	.4byte	.LFB320
+	.4byte	.LFE320-.LFB320
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8af2
+	.uleb128 0x5c
+	.4byte	0x2aef
+	.4byte	.LLST301
+	.uleb128 0x6e
+	.4byte	0x2afb
+	.uleb128 0x6e
+	.4byte	0x2b07
+	.uleb128 0x6e
+	.4byte	0x2b11
+	.uleb128 0x6e
+	.4byte	0x2b1b
+	.uleb128 0x72
+	.4byte	.Ldebug_ranges0+0xe8
+	.uleb128 0x6d
+	.4byte	0x2aef
+	.uleb128 0x72
+	.4byte	.Ldebug_ranges0+0xe8
+	.uleb128 0x6f
+	.4byte	0x8a55
+	.4byte	.LLST302
+	.uleb128 0x6f
+	.4byte	0x8a5a
+	.4byte	.LLST303
+	.uleb128 0x6f
+	.4byte	0x8a5f
+	.4byte	.LLST304
+	.uleb128 0x75
+	.4byte	0x8a64
+	.uleb128 0x1
+	.byte	0x5b
+	.uleb128 0x44
+	.4byte	.LVL1226
+	.4byte	0x2b28
+	.uleb128 0x32
+	.4byte	.LVL1228
+	.4byte	0x6192
+	.4byte	0x8ab7
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1234
+	.4byte	0x9222
+	.4byte	0x8ad2
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x7d
+	.sleb128 0
+	.byte	0x6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1235
+	.4byte	0x6828
+	.4byte	0x8ae6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1236
+	.4byte	0x65f0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x70
+	.4byte	0x3297
+	.4byte	.LFB304
+	.4byte	.LFE304-.LFB304
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8bd2
+	.uleb128 0x5c
+	.4byte	0x32a8
+	.4byte	.LLST305
+	.uleb128 0x6e
+	.4byte	0x32b4
+	.uleb128 0x5f
+	.4byte	.LBB257
+	.4byte	.LBE257-.LBB257
+	.4byte	0x8bc8
+	.uleb128 0x5c
+	.4byte	0x32a8
+	.4byte	.LLST306
+	.uleb128 0x67
+	.4byte	.LBB258
+	.4byte	.LBE258-.LBB258
+	.uleb128 0x6e
+	.4byte	0x8b0e
+	.uleb128 0x32
+	.4byte	.LVL1246
+	.4byte	0x5bca
+	.4byte	0x8b54
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR42
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1247
+	.4byte	0x9222
+	.4byte	0x8b7b
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR159
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xa88
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1248
+	.4byte	0x375c
+	.4byte	0x8b8f
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1249
+	.4byte	0x2ade
+	.4byte	0x8ba3
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL1250
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR159
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xa8b
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1254
+	.4byte	0x5a4e
+	.byte	0
+	.uleb128 0x70
+	.4byte	0x4e75
+	.4byte	.LFB271
+	.4byte	.LFE271-.LFB271
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8caa
+	.uleb128 0x72
+	.4byte	.Ldebug_ranges0+0x108
+	.uleb128 0x6f
+	.4byte	0x4e83
+	.4byte	.LLST309
+	.uleb128 0x75
+	.4byte	0x4e8f
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -56
+	.uleb128 0x6f
+	.4byte	0x4e9b
+	.4byte	.LLST310
+	.uleb128 0x75
+	.4byte	0x4ea7
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -52
+	.uleb128 0x6f
+	.4byte	0x4eb3
+	.4byte	.LLST311
+	.uleb128 0x32
+	.4byte	.LVL1267
+	.4byte	0x5212
+	.4byte	0x8c35
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1269
+	.4byte	0x26b9
+	.4byte	0x8c54
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -52
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1273
+	.4byte	0x230c
+	.4byte	0x8c68
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1275
+	.4byte	0x32d7
+	.4byte	0x8c7c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1276
+	.4byte	0x251a
+	.4byte	0x8c9f
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -52
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1277
+	.4byte	0x31f2
+	.byte	0
+	.byte	0
+	.uleb128 0x70
+	.4byte	0x3da3
+	.4byte	.LFB289
+	.4byte	.LFE289-.LFB289
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8cdb
+	.uleb128 0x2d
+	.4byte	.LVL1525
+	.4byte	0x50ef
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR83
+	.byte	0
+	.byte	0
+	.uleb128 0x70
+	.4byte	0x4aff
+	.4byte	.LFB274
+	.4byte	.LFE274-.LFB274
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8d32
+	.uleb128 0x32
+	.4byte	.LVL1551
+	.4byte	0x4fd7
+	.4byte	0x8d02
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x40
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1552
+	.4byte	0x9222
+	.4byte	0x8d22
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC71
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC100
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL1553
+	.4byte	0x230c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x70
+	.4byte	0x2d2c
+	.4byte	.LFB314
+	.4byte	.LFE314-.LFB314
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8d80
+	.uleb128 0x32
+	.4byte	.LVL1688
+	.4byte	0x2d35
+	.4byte	0x8d59
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1689
+	.4byte	0x4ec1
+	.4byte	0x8d70
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR144
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL1690
+	.4byte	0x2edb
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x70
+	.4byte	0x2996
+	.4byte	.LFB322
+	.4byte	.LFE322-.LFB322
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x909f
+	.uleb128 0x5c
+	.4byte	0x29a7
+	.4byte	.LLST396
+	.uleb128 0x5c
+	.4byte	0x29b3
+	.4byte	.LLST397
+	.uleb128 0x74
+	.4byte	0x29bf
+	.byte	0x1
+	.uleb128 0x6e
+	.4byte	0x29cb
+	.uleb128 0x6e
+	.4byte	0x29d7
+	.uleb128 0x77
+	.4byte	0x29e3
+	.sleb128 -1
+	.uleb128 0x6e
+	.4byte	0x29ef
+	.uleb128 0x6e
+	.4byte	0x29fb
+	.uleb128 0x6e
+	.4byte	0x2a07
+	.uleb128 0x6e
+	.4byte	0x2a13
+	.uleb128 0x6e
+	.4byte	0x2a1f
+	.uleb128 0x6e
+	.4byte	0x2a2b
+	.uleb128 0x6e
+	.4byte	0x2a47
+	.uleb128 0x3e
+	.4byte	.Ldebug_ranges0+0x158
+	.4byte	0x908f
+	.uleb128 0x5c
+	.4byte	0x29b3
+	.4byte	.LLST398
+	.uleb128 0x5c
+	.4byte	0x29a7
+	.4byte	.LLST399
+	.uleb128 0x72
+	.4byte	.Ldebug_ranges0+0x158
+	.uleb128 0x6e
+	.4byte	0x8da5
+	.uleb128 0x6f
+	.4byte	0x8dab
+	.4byte	.LLST400
+	.uleb128 0x75
+	.4byte	0x8db0
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x6e
+	.4byte	0x8db5
+	.uleb128 0x6f
+	.4byte	0x8dbb
+	.4byte	.LLST401
+	.uleb128 0x6f
+	.4byte	0x8dc0
+	.4byte	.LLST402
+	.uleb128 0x6f
+	.4byte	0x8dc5
+	.4byte	.LLST403
+	.uleb128 0x6f
+	.4byte	0x8dca
+	.4byte	.LLST404
+	.uleb128 0x6f
+	.4byte	0x8dcf
+	.4byte	.LLST405
+	.uleb128 0x6f
+	.4byte	0x8dd4
+	.4byte	.LLST406
+	.uleb128 0x78
+	.4byte	0x2a37
+	.uleb128 0x78
+	.4byte	0x2a3f
+	.uleb128 0x6e
+	.4byte	0x8dd9
+	.uleb128 0x3e
+	.4byte	.Ldebug_ranges0+0x178
+	.4byte	0x8ec4
+	.uleb128 0x6f
+	.4byte	0x2a55
+	.4byte	.LLST407
+	.uleb128 0x44
+	.4byte	.LVL1716
+	.4byte	0x377a
+	.uleb128 0x32
+	.4byte	.LVL1719
+	.4byte	0x5acd
+	.4byte	0x8e8d
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x40
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1721
+	.4byte	0x5acd
+	.4byte	0x8ea1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1724
+	.4byte	0x2b28
+	.uleb128 0x34
+	.4byte	.LVL1736
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC104
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1747
+	.4byte	0x3101
+	.uleb128 0x32
+	.4byte	.LVL1748
+	.4byte	0x3ec7
+	.4byte	0x8ee1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1749
+	.4byte	0x5acd
+	.4byte	0x8ef5
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1752
+	.4byte	0x2a7e
+	.uleb128 0x44
+	.4byte	.LVL1755
+	.4byte	0x5acd
+	.uleb128 0x32
+	.4byte	.LVL1757
+	.4byte	0x31f2
+	.4byte	0x8f1b
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x9
+	.byte	0xff
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1762
+	.4byte	0x3101
+	.4byte	0x8f32
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x91
+	.sleb128 -68
+	.byte	0x94
+	.byte	0x2
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1763
+	.4byte	0x31f2
+	.4byte	0x8f46
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x9
+	.byte	0xff
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1764
+	.4byte	0x9222
+	.4byte	0x8f6d
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR177
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x296
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1765
+	.4byte	0x9222
+	.4byte	0x8f94
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR177
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x297
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1766
+	.4byte	0x9222
+	.4byte	0x8fbb
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR177
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x298
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1767
+	.4byte	0x3ec7
+	.4byte	0x8fcf
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1768
+	.4byte	0x2a7e
+	.uleb128 0x32
+	.4byte	.LVL1778
+	.4byte	0x26b9
+	.4byte	0x8fee
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -68
+	.byte	0x6
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1787
+	.4byte	0x9222
+	.4byte	0x9015
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR177
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x2bc
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1788
+	.4byte	0x5212
+	.4byte	0x9034
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1790
+	.4byte	0x2ca7
+	.uleb128 0x32
+	.4byte	.LVL1791
+	.4byte	0x3137
+	.4byte	0x9057
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
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+	.sleb128 0
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+	.4byte	.LVL1800
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+	.uleb128 0x44
+	.4byte	.LVL1801
+	.4byte	0x4d0e
+	.byte	0
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL1730
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+	.uleb128 0x1
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+	.byte	0
+	.byte	0
+	.uleb128 0x70
+	.4byte	0x3937
+	.4byte	.LFB295
+	.4byte	.LFE295-.LFB295
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x91ff
+	.uleb128 0x74
+	.4byte	0x3948
+	.byte	0
+	.uleb128 0x5f
+	.4byte	.LBB302
+	.4byte	.LBE302-.LBB302
+	.4byte	0x9195
+	.uleb128 0x6e
+	.4byte	0x90b2
+	.uleb128 0x3e
+	.4byte	.Ldebug_ranges0+0x1a8
+	.4byte	0x90dd
+	.uleb128 0x6f
+	.4byte	0x3953
+	.4byte	.LLST447
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL2002
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+	.4byte	0x90f1
+	.uleb128 0x2e
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+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL2003
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+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL2005
+	.4byte	0x4ec1
+	.4byte	0x911c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR144
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL2006
+	.4byte	0x4ec1
+	.4byte	0x9133
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR149
+	.byte	0
+	.uleb128 0x44
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+	.4byte	0x5313
+	.uleb128 0x44
+	.4byte	.LVL2008
+	.4byte	0x4d0e
+	.uleb128 0x44
+	.4byte	.LVL2009
+	.4byte	0x4d0e
+	.uleb128 0x44
+	.4byte	.LVL2013
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+	.uleb128 0x44
+	.4byte	.LVL2014
+	.4byte	0x2bbf
+	.uleb128 0x32
+	.4byte	.LVL2015
+	.4byte	0x33c9
+	.4byte	0x9177
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR51
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL2016
+	.4byte	0x33c9
+	.4byte	0x918b
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
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+	.4byte	.LVL2017
+	.4byte	0x3b98
+	.byte	0
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+	.4byte	.LVL1989
+	.4byte	0x5fb8
+	.uleb128 0x44
+	.4byte	.LVL1990
+	.4byte	0x4b0c
+	.uleb128 0x44
+	.4byte	.LVL1991
+	.4byte	0x4940
+	.uleb128 0x44
+	.4byte	.LVL1992
+	.4byte	0x46e2
+	.uleb128 0x44
+	.4byte	.LVL1993
+	.4byte	0x4763
+	.uleb128 0x44
+	.4byte	.LVL1994
+	.4byte	0x3d52
+	.uleb128 0x44
+	.4byte	.LVL1995
+	.4byte	0x4aff
+	.uleb128 0x44
+	.4byte	.LVL1996
+	.4byte	0x5e7c
+	.uleb128 0x44
+	.4byte	.LVL1997
+	.4byte	0x3dac
+	.uleb128 0x44
+	.4byte	.LVL1998
+	.4byte	0x3f5d
+	.uleb128 0x34
+	.4byte	.LVL1999
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+	.uleb128 0x2e
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+	.uleb128 0x1
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+	.byte	0
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+	.uleb128 0x7a
+	.4byte	.LASF875
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+	.uleb128 0x7a
+	.4byte	.LASF876
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+	.uleb128 0x79
+	.4byte	.LASF877
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+	.4byte	.LASF879
+	.4byte	.LASF879
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+	.byte	0x6d
+	.byte	0
+	.section	.debug_abbrev,"",%progbits
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+	.uleb128 0x6e
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+	.uleb128 0x3a
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+	.uleb128 0x3b
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x7a
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
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+	.uleb128 0x3c
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+	.uleb128 0x6e
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+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.byte	0
+	.section	.debug_loc,"",%progbits
+.Ldebug_loc0:
+.LLST453:
+	.4byte	.LVL2075
+	.4byte	.LVL2076-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2076-1
+	.4byte	.LFE350
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST454:
+	.4byte	.LVL2075
+	.4byte	.LVL2076-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2076-1
+	.4byte	.LFE350
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST455:
+	.4byte	.LVL2075
+	.4byte	.LVL2076-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2076-1
+	.4byte	.LFE350
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST285:
+	.4byte	.LVL1159
+	.4byte	.LVL1160-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1160-1
+	.4byte	.LFE349
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST286:
+	.4byte	.LVL1159
+	.4byte	.LVL1160-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1160-1
+	.4byte	.LFE349
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST287:
+	.4byte	.LVL1159
+	.4byte	.LVL1160-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1160-1
+	.4byte	.LFE349
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST189:
+	.4byte	.LVL695
+	.4byte	.LVL696-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL696-1
+	.4byte	.LFE348
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST190:
+	.4byte	.LVL695
+	.4byte	.LVL696-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL696-1
+	.4byte	.LFE348
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST191:
+	.4byte	.LVL695
+	.4byte	.LVL696-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL696-1
+	.4byte	.LFE348
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST282:
+	.4byte	.LVL1150
+	.4byte	.LVL1152-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1152-1
+	.4byte	.LFE347
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST283:
+	.4byte	.LVL1150
+	.4byte	.LVL1151
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1151
+	.4byte	.LFE347
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST284:
+	.4byte	.LVL1154
+	.4byte	.LVL1155
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1156
+	.4byte	.LVL1157
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1157
+	.4byte	.LFE347
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST170:
+	.4byte	.LVL625
+	.4byte	.LVL626
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL626
+	.4byte	.LFE345
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST171:
+	.4byte	.LVL625
+	.4byte	.LVL626
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL626
+	.4byte	.LFE345
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST172:
+	.4byte	.LVL625
+	.4byte	.LVL626
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL626
+	.4byte	.LFE345
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST173:
+	.4byte	.LVL629
+	.4byte	.LVL630
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL631
+	.4byte	.LFE345
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST174:
+	.4byte	.LVL625
+	.4byte	.LVL626
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL626
+	.4byte	.LFE345
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST162:
+	.4byte	.LVL602
+	.4byte	.LVL605
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL605
+	.4byte	.LVL606
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL606
+	.4byte	.LVL608
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL608
+	.4byte	.LVL615
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL615
+	.4byte	.LVL622
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL622
+	.4byte	.LFE344
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST163:
+	.4byte	.LVL602
+	.4byte	.LVL605
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL605
+	.4byte	.LVL606
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL606
+	.4byte	.LVL608
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL608
+	.4byte	.LVL615
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL615
+	.4byte	.LVL622
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL622
+	.4byte	.LVL624
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL624
+	.4byte	.LFE344
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST164:
+	.4byte	.LVL602
+	.4byte	.LVL605
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL605
+	.4byte	.LFE344
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST165:
+	.4byte	.LVL602
+	.4byte	.LVL603
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL603
+	.4byte	.LVL607
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL607
+	.4byte	.LVL608
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -72
+	.4byte	.LVL608
+	.4byte	.LFE344
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST166:
+	.4byte	.LVL604
+	.4byte	.LVL605
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL605
+	.4byte	.LVL606
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL608
+	.4byte	.LVL615
+	.2byte	0x1
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+	.4byte	.LVL615
+	.4byte	.LVL622
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL622
+	.4byte	.LFE344
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST167:
+	.4byte	.LVL611
+	.4byte	.LVL612
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL613
+	.4byte	.LVL615
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST168:
+	.4byte	.LVL604
+	.4byte	.LVL606
+	.2byte	0x1
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+	.4byte	.LVL608
+	.4byte	.LVL615
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL622
+	.4byte	.LVL623
+	.2byte	0x1
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+	.4byte	0
+	.4byte	0
+.LLST169:
+	.4byte	.LVL604
+	.4byte	.LVL605
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL605
+	.4byte	.LVL606
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL606
+	.4byte	.LVL608
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL608
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+	.2byte	0x1
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+	.4byte	.LVL615
+	.4byte	.LVL622
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL622
+	.4byte	.LFE344
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST151:
+	.4byte	.LVL562
+	.4byte	.LVL564
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL564
+	.4byte	.LFE343
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST152:
+	.4byte	.LVL562
+	.4byte	.LVL564
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL564
+	.4byte	.LFE343
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST153:
+	.4byte	.LVL562
+	.4byte	.LVL563
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL563
+	.4byte	.LFE343
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST154:
+	.4byte	.LVL568
+	.4byte	.LVL569
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL569
+	.4byte	.LVL570-1
+	.2byte	0x2
+	.byte	0x74
+	.sleb128 0
+	.4byte	.LVL570
+	.4byte	.LVL571
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL571
+	.4byte	.LVL572
+	.2byte	0x3
+	.byte	0x70
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST142:
+	.4byte	.LVL551
+	.4byte	.LVL553
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL553
+	.4byte	.LVL554
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL554
+	.4byte	.LVL555
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL555
+	.4byte	.LFE341
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST143:
+	.4byte	.LVL551
+	.4byte	.LVL553
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL553
+	.4byte	.LVL554
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL554
+	.4byte	.LVL555
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL555
+	.4byte	.LFE341
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST144:
+	.4byte	.LVL551
+	.4byte	.LVL553
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL553
+	.4byte	.LVL554
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL554
+	.4byte	.LVL555
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	.LVL555
+	.4byte	.LFE341
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST145:
+	.4byte	.LVL551
+	.4byte	.LVL553
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL553
+	.4byte	.LVL554
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL554
+	.4byte	.LVL555
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.4byte	.LVL555
+	.4byte	.LFE341
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST146:
+	.4byte	.LVL552
+	.4byte	.LVL553
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL553
+	.4byte	.LVL554
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL555
+	.4byte	.LFE341
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST147:
+	.4byte	.LVL552
+	.4byte	.LVL553
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL553
+	.4byte	.LVL554
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL555
+	.4byte	.LVL557
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL557
+	.4byte	.LVL558
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL558
+	.4byte	.LVL559
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL559
+	.4byte	.LVL560
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL560
+	.4byte	.LFE341
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST148:
+	.4byte	.LVL552
+	.4byte	.LVL553
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL553
+	.4byte	.LVL554
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL554
+	.4byte	.LVL555
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL555
+	.4byte	.LFE341
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST149:
+	.4byte	.LVL552
+	.4byte	.LVL553
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL553
+	.4byte	.LVL554
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL554
+	.4byte	.LVL555
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL555
+	.4byte	.LFE341
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST150:
+	.4byte	.LVL552
+	.4byte	.LVL553
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL553
+	.4byte	.LVL554
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL554
+	.4byte	.LVL555
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL555
+	.4byte	.LFE341
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST141:
+	.4byte	.LVL549
+	.4byte	.LVL550-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL550-1
+	.4byte	.LFE340
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST138:
+	.4byte	.LVL536
+	.4byte	.LVL537-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL537-1
+	.4byte	.LFE318
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST139:
+	.4byte	.LVL540
+	.4byte	.LVL541
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL541
+	.4byte	.LVL542
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL542
+	.4byte	.LVL543
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL543
+	.4byte	.LVL544
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL544
+	.4byte	.LVL545
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST140:
+	.4byte	.LVL538
+	.4byte	.LVL546
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST137:
+	.4byte	.LVL533
+	.4byte	.LVL534
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL534
+	.4byte	.LFE317
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST394:
+	.4byte	.LVL1697
+	.4byte	.LVL1700
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1705
+	.4byte	.LFE316
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST395:
+	.4byte	.LVL1704
+	.4byte	.LVL1705-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST269:
+	.4byte	.LVL1096
+	.4byte	.LVL1098-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1098-1
+	.4byte	.LVL1099
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1099
+	.4byte	.LVL1101
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1101
+	.4byte	.LVL1138
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1138
+	.4byte	.LFE313
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST270:
+	.4byte	.LVL1096
+	.4byte	.LVL1098-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1098-1
+	.4byte	.LVL1099
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -48
+	.4byte	.LVL1099
+	.4byte	.LVL1101
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1101
+	.4byte	.LVL1138
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -48
+	.4byte	.LVL1138
+	.4byte	.LFE313
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 -48
+	.4byte	0
+	.4byte	0
+.LLST271:
+	.4byte	.LVL1112
+	.4byte	.LVL1113
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1113
+	.4byte	.LVL1118
+	.2byte	0x2
+	.byte	0x7c
+	.sleb128 -2
+	.4byte	0
+	.4byte	0
+.LLST272:
+	.4byte	.LVL1104
+	.4byte	.LVL1105
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1105
+	.4byte	.LVL1114
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1115
+	.4byte	.LVL1124
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1127
+	.4byte	.LVL1137
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST273:
+	.4byte	.LVL1107
+	.4byte	.LVL1111
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1118
+	.4byte	.LVL1121
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1129
+	.4byte	.LVL1137
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST274:
+	.4byte	.LVL1104
+	.4byte	.LVL1105
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1105
+	.4byte	.LVL1106
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1106
+	.4byte	.LVL1107-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1111
+	.4byte	.LVL1116
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1116
+	.4byte	.LVL1117
+	.2byte	0x3
+	.byte	0x72
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST275:
+	.4byte	.LVL1103
+	.4byte	.LVL1107
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1110
+	.4byte	.LVL1118
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1120
+	.4byte	.LVL1125
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1127
+	.4byte	.LVL1128
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1130
+	.4byte	.LVL1132
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1136
+	.4byte	.LVL1137
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST276:
+	.4byte	.LVL1097
+	.4byte	.LVL1109
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1110
+	.4byte	.LVL1131
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1134
+	.4byte	.LVL1136
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1136
+	.4byte	.LVL1138
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST277:
+	.4byte	.LVL1119
+	.4byte	.LVL1120-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1120-1
+	.4byte	.LVL1124
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	.LVL1127
+	.4byte	.LVL1129-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1129-1
+	.4byte	.LVL1136
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	0
+	.4byte	0
+.LLST278:
+	.4byte	.LVL1096
+	.4byte	.LVL1102
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1102
+	.4byte	.LVL1108
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1108
+	.4byte	.LVL1110
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL1110
+	.4byte	.LVL1138
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST279:
+	.4byte	.LVL1122
+	.4byte	.LVL1123
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1123
+	.4byte	.LVL1124
+	.2byte	0x5
+	.byte	0x91
+	.sleb128 -44
+	.byte	0x6
+	.byte	0x23
+	.uleb128 0xc
+	.4byte	.LVL1127
+	.4byte	.LVL1129-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST389:
+	.4byte	.LVL1653
+	.4byte	.LVL1655
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1655
+	.4byte	.LVL1656
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1656
+	.4byte	.LVL1658
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1658
+	.4byte	.LFE311
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST390:
+	.4byte	.LVL1666
+	.4byte	.LVL1669
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1669
+	.4byte	.LVL1672
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1675
+	.4byte	.LVL1683
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1683
+	.4byte	.LVL1684
+	.2byte	0x3
+	.byte	0x76
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1685
+	.4byte	.LFE311
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST391:
+	.4byte	.LVL1659
+	.4byte	.LVL1664
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1665
+	.4byte	.LVL1666
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1680
+	.4byte	.LVL1682
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST392:
+	.4byte	.LVL1654
+	.4byte	.LVL1655
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1656
+	.4byte	.LVL1657
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1657
+	.4byte	.LVL1659
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.4byte	.LVL1659
+	.4byte	.LVL1660-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1664
+	.4byte	.LVL1665
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST393:
+	.4byte	.LVL1676
+	.4byte	.LVL1686
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST132:
+	.4byte	.LVL525
+	.4byte	.LVL526
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL526
+	.4byte	.LVL532
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL532
+	.4byte	.LFE310
+	.2byte	0x5
+	.byte	0x71
+	.sleb128 0
+	.byte	0x70
+	.sleb128 0
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST133:
+	.4byte	.LVL525
+	.4byte	.LVL527-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL527-1
+	.4byte	.LVL532
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL532
+	.4byte	.LFE310
+	.2byte	0x7
+	.byte	0x71
+	.sleb128 0
+	.byte	0x70
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x4
+	.4byte	0
+	.4byte	0
+.LLST134:
+	.4byte	.LVL525
+	.4byte	.LVL527-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL527-1
+	.4byte	.LVL532
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL532
+	.4byte	.LFE310
+	.2byte	0x7
+	.byte	0x71
+	.sleb128 0
+	.byte	0x70
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x8
+	.4byte	0
+	.4byte	0
+.LLST135:
+	.4byte	.LVL527
+	.4byte	.LVL531
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST136:
+	.4byte	.LVL527
+	.4byte	.LVL528
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL529
+	.4byte	.LVL530
+	.2byte	0x1
+	.byte	0x5c
+	.4byte	0
+	.4byte	0
+.LLST130:
+	.4byte	.LVL520
+	.4byte	.LVL522
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL522
+	.4byte	.LVL523
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL523
+	.4byte	.LVL524
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL524
+	.4byte	.LFE309
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST131:
+	.4byte	.LVL520
+	.4byte	.LVL521
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST128:
+	.4byte	.LVL516
+	.4byte	.LVL517
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST129:
+	.4byte	.LVL514
+	.4byte	.LVL515
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL515
+	.4byte	.LVL518
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL518
+	.4byte	.LVL519
+	.2byte	0x3
+	.byte	0x72
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST126:
+	.4byte	.LVL508
+	.4byte	.LVL509
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST127:
+	.4byte	.LVL506
+	.4byte	.LVL507
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL507
+	.4byte	.LVL510
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL510
+	.4byte	.LVL511
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL512
+	.4byte	.LVL513
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL513
+	.4byte	.LFE307
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST125:
+	.4byte	.LVL499
+	.4byte	.LVL500
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL501
+	.4byte	.LVL502
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL503
+	.4byte	.LVL504
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL505
+	.4byte	.LFE306
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST307:
+	.4byte	.LVL1255
+	.4byte	.LVL1256
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1256
+	.4byte	.LVL1262
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1262
+	.4byte	.LVL1263
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1263
+	.4byte	.LFE305
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST308:
+	.4byte	.LVL1255
+	.4byte	.LVL1258
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1259
+	.4byte	.LVL1260
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1262
+	.4byte	.LVL1265
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1265
+	.4byte	.LFE305
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST122:
+	.4byte	.LVL488
+	.4byte	.LVL489
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL489
+	.4byte	.LFE303
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST123:
+	.4byte	.LVL493
+	.4byte	.LVL495
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL497
+	.4byte	.LFE303
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST124:
+	.4byte	.LVL488
+	.4byte	.LVL494
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL494
+	.4byte	.LVL497
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL497
+	.4byte	.LFE303
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST374:
+	.4byte	.LVL1590
+	.4byte	.LVL1592
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1592
+	.4byte	.LFE302
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST292:
+	.4byte	.LVL1182
+	.4byte	.LVL1183
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1183
+	.4byte	.LVL1223
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1223
+	.4byte	.LFE301
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST293:
+	.4byte	.LVL1189
+	.4byte	.LVL1194
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1195
+	.4byte	.LVL1223
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST294:
+	.4byte	.LVL1197
+	.4byte	.LVL1210
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1211
+	.4byte	.LVL1223
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST295:
+	.4byte	.LVL1202
+	.4byte	.LVL1203
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1204
+	.4byte	.LVL1205
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1205
+	.4byte	.LVL1209
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1215
+	.4byte	.LVL1219
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1219
+	.4byte	.LVL1220
+	.2byte	0x3
+	.byte	0x7a
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1221
+	.4byte	.LVL1223
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST296:
+	.4byte	.LVL1217
+	.4byte	.LVL1218-1
+	.2byte	0x6
+	.byte	0x7c
+	.sleb128 4
+	.byte	0x6
+	.byte	0x3a
+	.byte	0x25
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST297:
+	.4byte	.LVL1204
+	.4byte	.LVL1205
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1205
+	.4byte	.LVL1206-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1215
+	.4byte	.LVL1216
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1216
+	.4byte	.LVL1217
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL1217
+	.4byte	.LVL1218-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1218-1
+	.4byte	.LVL1219
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -44
+	.4byte	.LVL1219
+	.4byte	.LVL1221
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST298:
+	.4byte	.LVL1182
+	.4byte	.LVL1183
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1185
+	.4byte	.LVL1186
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1186
+	.4byte	.LVL1187
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1187
+	.4byte	.LVL1188-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST299:
+	.4byte	.LVL1212
+	.4byte	.LVL1214
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST300:
+	.4byte	.LVL1212
+	.4byte	.LVL1214
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST113:
+	.4byte	.LVL457
+	.4byte	.LVL462
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL463
+	.4byte	.LVL473
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL481
+	.4byte	.LVL483
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST114:
+	.4byte	.LVL457
+	.4byte	.LVL462
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL463
+	.4byte	.LVL473
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL474
+	.4byte	.LVL479
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST115:
+	.4byte	.LVL457
+	.4byte	.LVL462
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL463
+	.4byte	.LVL473
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL473
+	.4byte	.LVL477
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL479
+	.4byte	.LVL482
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL483
+	.4byte	.LFE299
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST116:
+	.4byte	.LVL473
+	.4byte	.LVL474
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL479
+	.4byte	.LVL480
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL484
+	.4byte	.LFE299
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST117:
+	.4byte	.LVL471
+	.4byte	.LVL472
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST118:
+	.4byte	.LVL475
+	.4byte	.LVL479
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST119:
+	.4byte	.LVL458
+	.4byte	.LVL459
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL459
+	.4byte	.LVL460-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL463
+	.4byte	.LVL465
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL466
+	.4byte	.LVL467
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL467
+	.4byte	.LVL469
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST102:
+	.4byte	.LVL292
+	.4byte	.LVL293
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL293
+	.4byte	.LVL296
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL297
+	.4byte	.LVL299
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL299
+	.4byte	.LFE298
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST103:
+	.4byte	.LVL292
+	.4byte	.LVL296
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL296
+	.4byte	.LVL297
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL297
+	.4byte	.LVL299
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL299
+	.4byte	.LFE298
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST104:
+	.4byte	.LVL294
+	.4byte	.LVL298
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST105:
+	.4byte	.LVL294
+	.4byte	.LVL295
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST101:
+	.4byte	.LVL290
+	.4byte	.LVL291
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL291
+	.4byte	.LFE297
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST97:
+	.4byte	.LVL279
+	.4byte	.LVL280
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL280
+	.4byte	.LFE296
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST98:
+	.4byte	.LVL279
+	.4byte	.LVL280
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL280
+	.4byte	.LVL287
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL287
+	.4byte	.LVL288
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL289
+	.4byte	.LFE296
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST99:
+	.4byte	.LVL284
+	.4byte	.LVL285-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST100:
+	.4byte	.LVL279
+	.4byte	.LVL280
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL280
+	.4byte	.LVL281
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL281
+	.4byte	.LVL282
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL282
+	.4byte	.LVL283
+	.2byte	0x2
+	.byte	0x76
+	.sleb128 4
+	.4byte	.LVL283
+	.4byte	.LVL286
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL287
+	.4byte	.LFE296
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST237:
+	.4byte	.LVL911
+	.4byte	.LVL913
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST264:
+	.4byte	.LVL1074
+	.4byte	.LVL1075
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1077
+	.4byte	.LVL1080
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1089
+	.4byte	.LVL1091
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1091
+	.4byte	.LVL1092
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1092
+	.4byte	.LFE293
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST265:
+	.4byte	.LVL1072
+	.4byte	.LVL1073
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1084
+	.4byte	.LVL1089
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST266:
+	.4byte	.LVL1077
+	.4byte	.LVL1079
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1086
+	.4byte	.LVL1087
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST267:
+	.4byte	.LVL1070
+	.4byte	.LVL1074
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1074
+	.4byte	.LVL1077
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1081
+	.4byte	.LVL1082
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1082
+	.4byte	.LVL1083
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL1084
+	.4byte	.LVL1089
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1089
+	.4byte	.LFE293
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST268:
+	.4byte	.LVL1076
+	.4byte	.LVL1081
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST371:
+	.4byte	.LVL1578
+	.4byte	.LVL1579
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1584
+	.4byte	.LVL1588
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1588
+	.4byte	.LVL1589
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1589
+	.4byte	.LFE292
+	.2byte	0x3
+	.byte	0x76
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST372:
+	.4byte	.LVL1576
+	.4byte	.LVL1577
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1579
+	.4byte	.LVL1584
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST373:
+	.4byte	.LVL1581
+	.4byte	.LVL1582
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST339:
+	.4byte	.LVL1423
+	.4byte	.LVL1424
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1424
+	.4byte	.LFE291
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST340:
+	.4byte	.LVL1430
+	.4byte	.LVL1431
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1431
+	.4byte	.LVL1432-1
+	.2byte	0x5
+	.byte	0x3
+	.4byte	p_sys_spare_buf
+	.4byte	0
+	.4byte	0
+.LLST341:
+	.4byte	.LVL1423
+	.4byte	.LVL1424
+	.2byte	0x2
+	.byte	0x36
+	.byte	0x9f
+	.4byte	.LVL1424
+	.4byte	.LVL1425
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 -2
+	.byte	0x9f
+	.4byte	.LVL1425
+	.4byte	.LVL1426
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL1426
+	.4byte	.LVL1427
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 -2
+	.byte	0x9f
+	.4byte	.LVL1428
+	.4byte	.LFE291
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 -2
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST258:
+	.4byte	.LVL1048
+	.4byte	.LVL1059
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1059
+	.4byte	.LVL1060
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1060
+	.4byte	.LVL1061
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1061
+	.4byte	.LVL1069
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST259:
+	.4byte	.LVL1049
+	.4byte	.LVL1050-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1053
+	.4byte	.LVL1054
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1054
+	.4byte	.LVL1055-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1061
+	.4byte	.LVL1062
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST260:
+	.4byte	.LVL1050
+	.4byte	.LVL1051-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST261:
+	.4byte	.LVL1049
+	.4byte	.LVL1052
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1053
+	.4byte	.LVL1055
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1055
+	.4byte	.LVL1057
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1057
+	.4byte	.LVL1059-1
+	.2byte	0x9
+	.byte	0x72
+	.sleb128 0
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x71
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x4
+	.4byte	.LVL1061
+	.4byte	.LVL1062
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1062
+	.4byte	.LVL1064
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1064
+	.4byte	.LVL1066-1
+	.2byte	0x9
+	.byte	0x72
+	.sleb128 0
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x71
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x4
+	.4byte	0
+	.4byte	0
+.LLST262:
+	.4byte	.LVL1048
+	.4byte	.LVL1063
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1065
+	.4byte	.LVL1067
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1067
+	.4byte	.LVL1068-1
+	.2byte	0x5
+	.byte	0x3
+	.4byte	g_num_data_superblocks
+	.4byte	0
+	.4byte	0
+.LLST263:
+	.4byte	.LVL1048
+	.4byte	.LVL1056
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1058
+	.4byte	.LVL1069
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST95:
+	.4byte	.LVL269
+	.4byte	.LVL270
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL270
+	.4byte	.LFE287
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST96:
+	.4byte	.LVL272
+	.4byte	.LVL277
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL277
+	.4byte	.LVL278
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST313:
+	.4byte	.LVL1285
+	.4byte	.LVL1288
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1288
+	.4byte	.LVL1290
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1290
+	.4byte	.LVL1291
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1291
+	.4byte	.LFE284
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST314:
+	.4byte	.LVL1286
+	.4byte	.LVL1289
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -76
+	.4byte	.LVL1290
+	.4byte	.LFE284
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -76
+	.4byte	0
+	.4byte	0
+.LLST315:
+	.4byte	.LVL1287
+	.4byte	.LVL1289
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -60
+	.4byte	.LVL1290
+	.4byte	.LFE284
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -60
+	.4byte	0
+	.4byte	0
+.LLST316:
+	.4byte	.LVL1290
+	.4byte	.LVL1291
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1292
+	.4byte	.LVL1296
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1297
+	.4byte	.LVL1298
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1298
+	.4byte	.LVL1299-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1309
+	.4byte	.LVL1311
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1311
+	.4byte	.LVL1314
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1314
+	.4byte	.LVL1319
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1319
+	.4byte	.LVL1320
+	.2byte	0x3
+	.byte	0x72
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1337
+	.4byte	.LVL1342
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1342
+	.4byte	.LVL1343
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1343
+	.4byte	.LVL1344-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1350
+	.4byte	.LVL1351
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1351
+	.4byte	.LVL1352-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1357
+	.4byte	.LVL1358
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1358
+	.4byte	.LVL1360
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1366
+	.4byte	.LVL1369
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1369
+	.4byte	.LVL1370
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST317:
+	.4byte	.LVL1349
+	.4byte	.LVL1350
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -60
+	.4byte	.LVL1372
+	.4byte	.LVL1375
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1378
+	.4byte	.LVL1381
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1419
+	.4byte	.LVL1420
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1422
+	.4byte	.LFE284
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST318:
+	.4byte	.LVL1335
+	.4byte	.LVL1336
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -76
+	.4byte	.LVL1336
+	.4byte	.LVL1346
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1347
+	.4byte	.LVL1348
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1349
+	.4byte	.LVL1350
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -76
+	.4byte	.LVL1350
+	.4byte	.LVL1355
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1356
+	.4byte	.LVL1361
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1361
+	.4byte	.LVL1366
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1366
+	.4byte	.LFE284
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST319:
+	.4byte	.LVL1306
+	.4byte	.LVL1309
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1331
+	.4byte	.LFE284
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST320:
+	.4byte	.LVL1304
+	.4byte	.LVL1309
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -72
+	.4byte	.LVL1327
+	.4byte	.LVL1328
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -72
+	.4byte	.LVL1331
+	.4byte	.LFE284
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -72
+	.4byte	0
+	.4byte	0
+.LLST321:
+	.4byte	.LVL1291
+	.4byte	.LVL1293-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1309
+	.4byte	.LVL1311
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1315
+	.4byte	.LVL1316
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1316
+	.4byte	.LVL1321
+	.2byte	0x5
+	.byte	0x7d
+	.sleb128 0
+	.byte	0x6
+	.byte	0x32
+	.byte	0x1c
+	.4byte	.LVL1338
+	.4byte	.LVL1340
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1340
+	.4byte	.LVL1343
+	.2byte	0x6
+	.byte	0x91
+	.sleb128 -68
+	.byte	0x6
+	.byte	0x32
+	.byte	0x1c
+	.4byte	.LVL1359
+	.4byte	.LVL1361
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1367
+	.4byte	.LVL1368
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1368
+	.4byte	.LVL1371
+	.2byte	0x2
+	.byte	0x71
+	.sleb128 -2
+	.4byte	0
+	.4byte	0
+.LLST322:
+	.4byte	.LVL1294
+	.4byte	.LVL1295
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1295
+	.4byte	.LVL1307
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1311
+	.4byte	.LVL1334
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST324:
+	.4byte	.LVL1297
+	.4byte	.LVL1307
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1314
+	.4byte	.LVL1317
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1318
+	.4byte	.LVL1336
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1337
+	.4byte	.LVL1339
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1341
+	.4byte	.LVL1345
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1350
+	.4byte	.LVL1351
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1351
+	.4byte	.LVL1361
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -68
+	.4byte	.LVL1366
+	.4byte	.LFE284
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -68
+	.4byte	0
+	.4byte	0
+.LLST325:
+	.4byte	.LVL1300
+	.4byte	.LVL1302
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1303
+	.4byte	.LVL1304
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1321
+	.4byte	.LVL1322
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1322
+	.4byte	.LVL1329
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1329
+	.4byte	.LVL1330
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST326:
+	.4byte	.LVL1344
+	.4byte	.LVL1345
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1352
+	.4byte	.LVL1353
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1354
+	.4byte	.LVL1361
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -56
+	.4byte	.LVL1371
+	.4byte	.LVL1377
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -56
+	.4byte	.LVL1377
+	.4byte	.LVL1378
+	.2byte	0x7
+	.byte	0x91
+	.sleb128 -56
+	.byte	0x94
+	.byte	0x2
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x9f
+	.4byte	.LVL1378
+	.4byte	.LFE284
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -56
+	.4byte	0
+	.4byte	0
+.LLST327:
+	.4byte	.LVL1383
+	.4byte	.LVL1392
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1395
+	.4byte	.LVL1417
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST328:
+	.4byte	.LVL1373
+	.4byte	.LVL1376
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1378
+	.4byte	.LVL1392
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1392
+	.4byte	.LVL1393
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1395
+	.4byte	.LVL1417
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1419
+	.4byte	.LVL1422
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST329:
+	.4byte	.LVL1373
+	.4byte	.LVL1376
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1378
+	.4byte	.LVL1390
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1395
+	.4byte	.LVL1409
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1409
+	.4byte	.LVL1411
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1419
+	.4byte	.LVL1422
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST330:
+	.4byte	.LVL1300
+	.4byte	.LVL1301
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1301
+	.4byte	.LVL1309
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL1321
+	.4byte	.LVL1379
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL1379
+	.4byte	.LVL1380
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1380
+	.4byte	.LFE284
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST331:
+	.4byte	.LVL1285
+	.4byte	.LVL1288
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1290
+	.4byte	.LVL1302
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1309
+	.4byte	.LVL1321
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1333
+	.4byte	.LVL1348
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1361
+	.4byte	.LVL1366
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST332:
+	.4byte	.LVL1323
+	.4byte	.LVL1324
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1324
+	.4byte	.LVL1326
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -72
+	.4byte	.LVL1362
+	.4byte	.LVL1363
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1363
+	.4byte	.LVL1364
+	.2byte	0x2
+	.byte	0x73
+	.sleb128 12
+	.4byte	.LVL1364
+	.4byte	.LVL1365
+	.2byte	0x2
+	.byte	0x73
+	.sleb128 -8
+	.4byte	.LVL1374
+	.4byte	.LVL1375
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1378
+	.4byte	.LVL1384
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1387
+	.4byte	.LVL1390
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1397
+	.4byte	.LVL1400
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1400
+	.4byte	.LVL1401-1
+	.2byte	0x2
+	.byte	0x73
+	.sleb128 12
+	.4byte	.LVL1401-1
+	.4byte	.LVL1407
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1412
+	.4byte	.LVL1417
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST333:
+	.4byte	.LVL1332
+	.4byte	.LVL1348
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1361
+	.4byte	.LVL1366
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST334:
+	.4byte	.LVL1332
+	.4byte	.LVL1336
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST335:
+	.4byte	.LVL1388
+	.4byte	.LVL1389
+	.2byte	0x2
+	.byte	0x77
+	.sleb128 4
+	.4byte	.LVL1397
+	.4byte	.LVL1398-1
+	.2byte	0x2
+	.byte	0x77
+	.sleb128 4
+	.4byte	0
+	.4byte	0
+.LLST336:
+	.4byte	.LVL1402
+	.4byte	.LVL1405
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1405
+	.4byte	.LVL1406
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST337:
+	.4byte	.LVL1410
+	.4byte	.LVL1417
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST338:
+	.4byte	.LVL1413
+	.4byte	.LVL1414-1
+	.2byte	0x2
+	.byte	0x75
+	.sleb128 4
+	.4byte	.LVL1414-1
+	.4byte	.LVL1415
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST231:
+	.4byte	.LVL889
+	.4byte	.LVL890
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL890
+	.4byte	.LVL906
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL906
+	.4byte	.LFE283
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST232:
+	.4byte	.LVL889
+	.4byte	.LVL891-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST233:
+	.4byte	.LVL892
+	.4byte	.LVL893
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST234:
+	.4byte	.LVL895
+	.4byte	.LVL897-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL901
+	.4byte	.LVL903
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL903
+	.4byte	.LVL904
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST235:
+	.4byte	.LVL895
+	.4byte	.LVL900
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL901
+	.4byte	.LVL902
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST236:
+	.4byte	.LVL894
+	.4byte	.LVL896
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL896
+	.4byte	.LVL897-1
+	.2byte	0x5
+	.byte	0x3
+	.4byte	g_num_free_superblocks
+	.4byte	.LVL901
+	.4byte	.LVL904
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST90:
+	.4byte	.LVL253
+	.4byte	.LVL256
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL256
+	.4byte	.LVL258
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL258
+	.4byte	.LVL261
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL261
+	.4byte	.LFE282
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST91:
+	.4byte	.LVL253
+	.4byte	.LVL255
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL255
+	.4byte	.LFE282
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST92:
+	.4byte	.LVL254
+	.4byte	.LVL257
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL257
+	.4byte	.LVL258
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL258
+	.4byte	.LVL259
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL260
+	.4byte	.LVL261
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL261
+	.4byte	.LVL262
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST257:
+	.4byte	.LVL1035
+	.4byte	.LVL1036
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST249:
+	.4byte	.LVL992
+	.4byte	.LVL995
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL995
+	.4byte	.LFE278
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST250:
+	.4byte	.LVL1000
+	.4byte	.LVL1002-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1002-1
+	.4byte	.LVL1005
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	.LVL1017
+	.4byte	.LVL1018
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1018
+	.4byte	.LVL1027
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1027
+	.4byte	.LVL1028
+	.2byte	0x3
+	.byte	0x76
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1029
+	.4byte	.LFE278
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST251:
+	.4byte	.LVL1004
+	.4byte	.LVL1005
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1006
+	.4byte	.LVL1007
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1012
+	.4byte	.LVL1013
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1013
+	.4byte	.LVL1015
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1015
+	.4byte	.LVL1016
+	.2byte	0x3
+	.byte	0x76
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1020
+	.4byte	.LVL1021
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1021
+	.4byte	.LVL1022
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1024
+	.4byte	.LVL1025
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1026
+	.4byte	.LVL1030
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1030
+	.4byte	.LVL1031
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST252:
+	.4byte	.LVL1003
+	.4byte	.LVL1007
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1012
+	.4byte	.LVL1017
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST253:
+	.4byte	.LVL1030
+	.4byte	.LVL1032
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1032
+	.4byte	.LFE278
+	.2byte	0x1
+	.byte	0x5e
+	.4byte	0
+	.4byte	0
+.LLST254:
+	.4byte	.LVL994
+	.4byte	.LVL1003
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1017
+	.4byte	.LFE278
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST255:
+	.4byte	.LVL994
+	.4byte	.LVL995
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 16
+	.4byte	.LVL995
+	.4byte	.LVL997-1
+	.2byte	0x2
+	.byte	0x74
+	.sleb128 16
+	.4byte	.LVL997-1
+	.4byte	.LFE278
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -44
+	.4byte	0
+	.4byte	0
+.LLST256:
+	.4byte	.LVL996
+	.4byte	.LVL1001
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	.LVL1017
+	.4byte	.LFE278
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	0
+	.4byte	0
+.LLST446:
+	.4byte	.LVL1972
+	.4byte	.LVL1975
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1985
+	.4byte	.LVL1987
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1988
+	.4byte	.LFE277
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST89:
+	.4byte	.LVL251
+	.4byte	.LVL252
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL252
+	.4byte	.LFE276
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST243:
+	.4byte	.LVL941
+	.4byte	.LVL945
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL945
+	.4byte	.LVL946
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL946
+	.4byte	.LVL947
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL949
+	.4byte	.LVL950
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL950
+	.4byte	.LVL958
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL958
+	.4byte	.LVL959
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL960
+	.4byte	.LVL981
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST244:
+	.4byte	.LVL943
+	.4byte	.LVL946
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -44
+	.4byte	.LVL951
+	.4byte	.LVL981
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST245:
+	.4byte	.LVL941
+	.4byte	.LVL981
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST246:
+	.4byte	.LVL964
+	.4byte	.LVL965
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL966
+	.4byte	.LVL967
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL973
+	.4byte	.LVL974
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL975
+	.4byte	.LVL976
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL984
+	.4byte	.LVL988
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL989
+	.4byte	.LVL990
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL990
+	.4byte	.LFE273
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST247:
+	.4byte	.LVL952
+	.4byte	.LVL954
+	.2byte	0x5
+	.byte	0x40
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL955
+	.4byte	.LVL956
+	.2byte	0x5
+	.byte	0x40
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL956
+	.4byte	.LVL957
+	.2byte	0x5
+	.byte	0x41
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL963
+	.4byte	.LVL968
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL969
+	.4byte	.LVL970
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL972
+	.4byte	.LVL977
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL978
+	.4byte	.LVL979
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL985
+	.4byte	.LVL986
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL987
+	.4byte	.LVL988
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL990
+	.4byte	.LFE273
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST248:
+	.4byte	.LVL951
+	.4byte	.LVL981
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST368:
+	.4byte	.LVL1557
+	.4byte	.LVL1564
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1566
+	.4byte	.LVL1568
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST369:
+	.4byte	.LVL1558
+	.4byte	.LVL1574
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST370:
+	.4byte	.LVL1557
+	.4byte	.LVL1564
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1564
+	.4byte	.LVL1570
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1571
+	.4byte	.LVL1574
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST239:
+	.4byte	.LVL925
+	.4byte	.LVL927
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL927
+	.4byte	.LVL930
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL930
+	.4byte	.LVL931-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL931-1
+	.4byte	.LVL931
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL931
+	.4byte	.LVL934
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL934
+	.4byte	.LFE270
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST240:
+	.4byte	.LVL926
+	.4byte	.LVL928
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL928
+	.4byte	.LVL929-1
+	.2byte	0x5
+	.byte	0x3
+	.4byte	req_sys+4
+	.4byte	.LVL931
+	.4byte	.LVL932
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL932
+	.4byte	.LVL933-1
+	.2byte	0x5
+	.byte	0x3
+	.4byte	req_sys+4
+	.4byte	0
+	.4byte	0
+.LLST241:
+	.4byte	.LVL925
+	.4byte	.LVL927
+	.2byte	0x7
+	.byte	0x70
+	.sleb128 6
+	.byte	0x94
+	.byte	0x2
+	.byte	0x31
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL927
+	.4byte	.LVL929-1
+	.2byte	0x7
+	.byte	0x76
+	.sleb128 6
+	.byte	0x94
+	.byte	0x2
+	.byte	0x31
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL931
+	.4byte	.LVL933-1
+	.2byte	0x7
+	.byte	0x76
+	.sleb128 6
+	.byte	0x94
+	.byte	0x2
+	.byte	0x31
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL934
+	.4byte	.LFE270
+	.2byte	0x7
+	.byte	0x70
+	.sleb128 6
+	.byte	0x94
+	.byte	0x2
+	.byte	0x31
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST242:
+	.4byte	.LVL925
+	.4byte	.LVL927
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 24
+	.4byte	.LVL927
+	.4byte	.LVL929-1
+	.2byte	0x2
+	.byte	0x76
+	.sleb128 24
+	.4byte	.LVL931
+	.4byte	.LVL933-1
+	.2byte	0x2
+	.byte	0x76
+	.sleb128 24
+	.4byte	.LVL934
+	.4byte	.LFE270
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 24
+	.4byte	0
+	.4byte	0
+.LLST358:
+	.4byte	.LVL1526
+	.4byte	.LVL1529
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1529
+	.4byte	.LFE268
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST359:
+	.4byte	.LVL1526
+	.4byte	.LVL1527
+	.2byte	0x3
+	.byte	0x8
+	.byte	0x20
+	.byte	0x9f
+	.4byte	.LVL1527
+	.4byte	.LVL1528
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL1528
+	.4byte	.LVL1530
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST360:
+	.4byte	.LVL1533
+	.4byte	.LVL1535
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1535
+	.4byte	.LVL1550
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1550
+	.4byte	.LFE267
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST361:
+	.4byte	.LVL1533
+	.4byte	.LVL1535
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1535
+	.4byte	.LVL1550
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1550
+	.4byte	.LFE267
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST362:
+	.4byte	.LVL1533
+	.4byte	.LVL1534
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1534
+	.4byte	.LFE267
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST363:
+	.4byte	.LVL1540
+	.4byte	.LVL1550
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST364:
+	.4byte	.LVL1540
+	.4byte	.LVL1550
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -128
+	.4byte	0
+	.4byte	0
+.LLST365:
+	.4byte	.LVL1538
+	.4byte	.LVL1539-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1539-1
+	.4byte	.LVL1548
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -124
+	.4byte	.LVL1548
+	.4byte	.LVL1549-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1549-1
+	.4byte	.LVL1550
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -124
+	.4byte	0
+	.4byte	0
+.LLST366:
+	.4byte	.LVL1533
+	.4byte	.LVL1535
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1535
+	.4byte	.LVL1536
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1537
+	.4byte	.LVL1550
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1550
+	.4byte	.LFE267
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST367:
+	.4byte	.LVL1533
+	.4byte	.LVL1535
+	.2byte	0xf
+	.byte	0x70
+	.sleb128 0
+	.byte	0x3
+	.4byte	c_ftl_nand_sec_pre_page_shift
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x25
+	.byte	0x9f
+	.4byte	.LVL1550
+	.4byte	.LFE267
+	.2byte	0xf
+	.byte	0x70
+	.sleb128 0
+	.byte	0x3
+	.4byte	c_ftl_nand_sec_pre_page_shift
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x25
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST350:
+	.4byte	.LVL1502
+	.4byte	.LVL1504
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1504
+	.4byte	.LVL1515
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1519
+	.4byte	.LVL1524
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1524
+	.4byte	.LFE266
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST351:
+	.4byte	.LVL1502
+	.4byte	.LVL1504
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1504
+	.4byte	.LVL1514
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1519
+	.4byte	.LVL1524
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1524
+	.4byte	.LFE266
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST352:
+	.4byte	.LVL1502
+	.4byte	.LVL1503
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1503
+	.4byte	.LVL1506
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL1506
+	.4byte	.LVL1507
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -136
+	.4byte	.LVL1507
+	.4byte	.LVL1520
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL1520
+	.4byte	.LVL1521
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1521
+	.4byte	.LFE266
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST353:
+	.4byte	.LVL1511
+	.4byte	.LVL1524
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST354:
+	.4byte	.LVL1510
+	.4byte	.LVL1524
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -132
+	.4byte	0
+	.4byte	0
+.LLST355:
+	.4byte	.LVL1508
+	.4byte	.LVL1509-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1509-1
+	.4byte	.LVL1521
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -124
+	.4byte	.LVL1521
+	.4byte	.LVL1522
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1522
+	.4byte	.LVL1524
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -124
+	.4byte	0
+	.4byte	0
+.LLST356:
+	.4byte	.LVL1502
+	.4byte	.LVL1504
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1504
+	.4byte	.LVL1505
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1507
+	.4byte	.LVL1524
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1524
+	.4byte	.LFE266
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST357:
+	.4byte	.LVL1502
+	.4byte	.LVL1504
+	.2byte	0xf
+	.byte	0x70
+	.sleb128 0
+	.byte	0x3
+	.4byte	c_ftl_nand_sec_pre_page_shift
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x25
+	.byte	0x9f
+	.4byte	.LVL1504
+	.4byte	.LVL1505
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1507
+	.4byte	.LVL1517
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1517
+	.4byte	.LVL1518-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1518-1
+	.4byte	.LVL1519
+	.2byte	0x3
+	.byte	0x76
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL1519
+	.4byte	.LVL1524
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1524
+	.4byte	.LFE266
+	.2byte	0xf
+	.byte	0x70
+	.sleb128 0
+	.byte	0x3
+	.4byte	c_ftl_nand_sec_pre_page_shift
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x25
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST227:
+	.4byte	.LVL872
+	.4byte	.LVL877
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL877
+	.4byte	.LFE265
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST228:
+	.4byte	.LVL872
+	.4byte	.LVL876
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL876
+	.4byte	.LFE265
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST229:
+	.4byte	.LVL872
+	.4byte	.LVL875
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL875
+	.4byte	.LFE265
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST230:
+	.4byte	.LVL878
+	.4byte	.LVL879
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL880
+	.4byte	.LVL882
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL882
+	.4byte	.LVL883-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL885
+	.4byte	.LVL887
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL888
+	.4byte	.LFE265
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST312:
+	.4byte	.LVL1280
+	.4byte	.LVL1281
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1281
+	.4byte	.LVL1282
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1282
+	.4byte	.LVL1283-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1283-1
+	.4byte	.LVL1283
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1283
+	.4byte	.LVL1284
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST83:
+	.4byte	.LVL224
+	.4byte	.LVL225
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL226
+	.4byte	.LVL227
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL227
+	.4byte	.LVL228
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL229
+	.4byte	.LVL230
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL231
+	.4byte	.LVL234
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL234
+	.4byte	.LVL235
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL236
+	.4byte	.LVL238
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL238
+	.4byte	.LVL239
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL239
+	.4byte	.LVL240
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL240
+	.4byte	.LVL242
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL242
+	.4byte	.LVL243
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL243
+	.4byte	.LFE263
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST84:
+	.4byte	.LVL231
+	.4byte	.LVL234
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL240
+	.4byte	.LFE263
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST85:
+	.4byte	.LVL229
+	.4byte	.LVL230
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL231
+	.4byte	.LVL232
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL236
+	.4byte	.LVL237
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL238
+	.4byte	.LVL240
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL240
+	.4byte	.LVL241
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL242
+	.4byte	.LFE263
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST225:
+	.4byte	.LVL867
+	.4byte	.LVL868
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL868
+	.4byte	.LFE262
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST226:
+	.4byte	.LVL869
+	.4byte	.LVL870
+	.2byte	0x9
+	.byte	0x72
+	.sleb128 0
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL870
+	.4byte	.LVL871-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST212:
+	.4byte	.LVL831
+	.4byte	.LVL832
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL832
+	.4byte	.LVL844
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL844
+	.4byte	.LFE261
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST213:
+	.4byte	.LVL831
+	.4byte	.LVL832
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL832
+	.4byte	.LVL844
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL844
+	.4byte	.LFE261
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST214:
+	.4byte	.LVL831
+	.4byte	.LVL832
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL832
+	.4byte	.LVL844
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -36
+	.4byte	.LVL844
+	.4byte	.LFE261
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 -36
+	.4byte	0
+	.4byte	0
+.LLST215:
+	.4byte	.LVL836
+	.4byte	.LVL844
+	.2byte	0x7
+	.byte	0x7a
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST216:
+	.4byte	.LVL838
+	.4byte	.LVL839
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL839
+	.4byte	.LVL840-1
+	.2byte	0x5
+	.byte	0x3
+	.4byte	req_sys+12
+	.4byte	0
+	.4byte	0
+.LLST217:
+	.4byte	.LVL831
+	.4byte	.LVL832
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL832
+	.4byte	.LVL841
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL842
+	.4byte	.LVL844
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST206:
+	.4byte	.LVL808
+	.4byte	.LVL810
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL810
+	.4byte	.LVL814
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL814
+	.4byte	.LVL816
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL816
+	.4byte	.LFE260
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST207:
+	.4byte	.LVL819
+	.4byte	.LVL820
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL820
+	.4byte	.LVL822
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL822
+	.4byte	.LVL823
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL826
+	.4byte	.LVL829
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL829
+	.4byte	.LVL830
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST208:
+	.4byte	.LVL819
+	.4byte	.LVL820
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL820
+	.4byte	.LVL821
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL826
+	.4byte	.LVL827
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL828
+	.4byte	.LFE260
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST209:
+	.4byte	.LVL809
+	.4byte	.LVL813
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL814
+	.4byte	.LVL815
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL815
+	.4byte	.LVL816
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 12
+	.4byte	.LVL816
+	.4byte	.LVL819-1
+	.2byte	0x2
+	.byte	0x74
+	.sleb128 12
+	.4byte	0
+	.4byte	0
+.LLST210:
+	.4byte	.LVL809
+	.4byte	.LVL810
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 24
+	.4byte	.LVL810
+	.4byte	.LVL811-1
+	.2byte	0x2
+	.byte	0x74
+	.sleb128 24
+	.4byte	.LVL814
+	.4byte	.LVL816
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 24
+	.4byte	.LVL816
+	.4byte	.LVL819-1
+	.2byte	0x2
+	.byte	0x74
+	.sleb128 24
+	.4byte	0
+	.4byte	0
+.LLST211:
+	.4byte	.LVL817
+	.4byte	.LVL818
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL818
+	.4byte	.LVL819-1
+	.2byte	0x5
+	.byte	0x3
+	.4byte	p_sys_spare_buf
+	.4byte	0
+	.4byte	0
+.LLST218:
+	.4byte	.LVL845
+	.4byte	.LVL848-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL848-1
+	.4byte	.LFE259
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST219:
+	.4byte	.LVL849
+	.4byte	.LVL855
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL858
+	.4byte	.LFE259
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST220:
+	.4byte	.LVL848
+	.4byte	.LVL850
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST221:
+	.4byte	.LVL853
+	.4byte	.LVL855
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL858
+	.4byte	.LVL863
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL863
+	.4byte	.LVL864
+	.2byte	0x3
+	.byte	0x76
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL864
+	.4byte	.LVL865
+	.2byte	0x3
+	.byte	0x78
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL865
+	.4byte	.LFE259
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST222:
+	.4byte	.LVL846
+	.4byte	.LVL852
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST223:
+	.4byte	.LVL847
+	.4byte	.LVL848-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL848-1
+	.4byte	.LVL857
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL857
+	.4byte	.LVL858
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -40
+	.4byte	.LVL858
+	.4byte	.LFE259
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST224:
+	.4byte	.LVL859
+	.4byte	.LVL860
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -36
+	.4byte	0
+	.4byte	0
+.LLST199:
+	.4byte	.LVL784
+	.4byte	.LVL787
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL787
+	.4byte	.LFE257
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST200:
+	.4byte	.LVL786
+	.4byte	.LVL791
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL795
+	.4byte	.LVL802
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST201:
+	.4byte	.LVL796
+	.4byte	.LVL802
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST202:
+	.4byte	.LVL788
+	.4byte	.LVL789
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL789
+	.4byte	.LVL790
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL790
+	.4byte	.LVL792
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL795
+	.4byte	.LVL797
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL797
+	.4byte	.LVL798
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL799
+	.4byte	.LVL802
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST203:
+	.4byte	.LVL790
+	.4byte	.LVL793
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL794
+	.4byte	.LVL795
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL796
+	.4byte	.LVL800
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL800
+	.4byte	.LVL801
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL802
+	.4byte	.LVL804
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL804
+	.4byte	.LVL806
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL806
+	.4byte	.LVL807
+	.2byte	0x3
+	.byte	0x76
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL807
+	.4byte	.LFE257
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST204:
+	.4byte	.LVL790
+	.4byte	.LVL793
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL794
+	.4byte	.LVL795
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL802
+	.4byte	.LVL805-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL805-1
+	.4byte	.LVL806
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST205:
+	.4byte	.LVL790
+	.4byte	.LVL793
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST197:
+	.4byte	.LVL771
+	.4byte	.LVL773
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL773
+	.4byte	.LFE256
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST198:
+	.4byte	.LVL771
+	.4byte	.LVL772
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL772
+	.4byte	.LFE256
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST67:
+	.4byte	.LVL187
+	.4byte	.LVL190
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL191
+	.4byte	.LVL192
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL194
+	.4byte	.LVL196
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST68:
+	.4byte	.LVL187
+	.4byte	.LVL195
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL195
+	.4byte	.LVL197
+	.2byte	0x8
+	.byte	0x73
+	.sleb128 0
+	.byte	0x71
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x36
+	.byte	0x1b
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST69:
+	.4byte	.LVL188
+	.4byte	.LVL189
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL193
+	.4byte	.LVL197
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST66:
+	.4byte	.LVL185
+	.4byte	.LVL186-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL186-1
+	.4byte	.LFE253
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST62:
+	.4byte	.LVL173
+	.4byte	.LVL178-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL178-1
+	.4byte	.LVL179
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL179
+	.4byte	.LVL184
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL184
+	.4byte	.LFE252
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST63:
+	.4byte	.LVL173
+	.4byte	.LVL177
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL179
+	.4byte	.LVL180
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL182
+	.4byte	.LFE252
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST64:
+	.4byte	.LVL173
+	.4byte	.LVL176
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL176
+	.4byte	.LVL179
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL179
+	.4byte	.LFE252
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST65:
+	.4byte	.LVL174
+	.4byte	.LVL175
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL179
+	.4byte	.LVL183
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST59:
+	.4byte	.LVL164
+	.4byte	.LVL167
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL167
+	.4byte	.LFE251
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST60:
+	.4byte	.LVL164
+	.4byte	.LVL166
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL166
+	.4byte	.LFE251
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST61:
+	.4byte	.LVL170
+	.4byte	.LVL171
+	.2byte	0xc
+	.byte	0x72
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x71
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.4byte	.LVL171
+	.4byte	.LVL172
+	.2byte	0xe
+	.byte	0x74
+	.sleb128 2
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x71
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST53:
+	.4byte	.LVL145
+	.4byte	.LVL148
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL148
+	.4byte	.LVL149
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL149
+	.4byte	.LFE250
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST54:
+	.4byte	.LVL146
+	.4byte	.LVL147
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL149
+	.4byte	.LFE250
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST55:
+	.4byte	.LVL150
+	.4byte	.LVL151
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL151
+	.4byte	.LFE250
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST56:
+	.4byte	.LVL151
+	.4byte	.LVL152
+	.2byte	0xb
+	.byte	0x72
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x31
+	.byte	0x24
+	.byte	0x7c
+	.sleb128 0
+	.byte	0x22
+	.4byte	.LVL153
+	.4byte	.LVL155
+	.2byte	0xb
+	.byte	0x72
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x31
+	.byte	0x24
+	.byte	0x7c
+	.sleb128 0
+	.byte	0x22
+	.4byte	.LVL156
+	.4byte	.LVL157
+	.2byte	0xb
+	.byte	0x72
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x31
+	.byte	0x24
+	.byte	0x7c
+	.sleb128 0
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST57:
+	.4byte	.LVL151
+	.4byte	.LVL153
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL153
+	.4byte	.LVL156
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL156
+	.4byte	.LVL158
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL158
+	.4byte	.LVL159
+	.2byte	0x5
+	.byte	0x74
+	.sleb128 0
+	.byte	0x77
+	.sleb128 0
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST44:
+	.4byte	.LVL111
+	.4byte	.LVL114
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL114
+	.4byte	.LVL115
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL115
+	.4byte	.LFE249
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST45:
+	.4byte	.LVL112
+	.4byte	.LVL113
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL115
+	.4byte	.LVL139
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL139
+	.4byte	.LFE249
+	.2byte	0x6
+	.byte	0x74
+	.sleb128 0
+	.byte	0x75
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST46:
+	.4byte	.LVL117
+	.4byte	.LVL120
+	.2byte	0x1
+	.byte	0x5c
+	.4byte	.LVL120
+	.4byte	.LVL126
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL129
+	.4byte	.LVL134
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL135
+	.4byte	.LVL136
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL137
+	.4byte	.LFE249
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST47:
+	.4byte	.LVL116
+	.4byte	.LVL118
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL118
+	.4byte	.LVL124
+	.2byte	0x7
+	.byte	0x70
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x22
+	.4byte	.LVL127
+	.4byte	.LVL129
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL129
+	.4byte	.LVL133
+	.2byte	0x7
+	.byte	0x70
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x22
+	.4byte	.LVL135
+	.4byte	.LVL138
+	.2byte	0x7
+	.byte	0x70
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST48:
+	.4byte	.LVL121
+	.4byte	.LVL127
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL129
+	.4byte	.LFE249
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST49:
+	.4byte	.LVL116
+	.4byte	.LVL117
+	.2byte	0xe
+	.byte	0x73
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x76
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL117
+	.4byte	.LVL127
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL127
+	.4byte	.LVL128
+	.2byte	0xe
+	.byte	0x73
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x76
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL128
+	.4byte	.LVL129
+	.2byte	0x10
+	.byte	0x73
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x71
+	.sleb128 4
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL129
+	.4byte	.LFE249
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST50:
+	.4byte	.LVL121
+	.4byte	.LVL122
+	.2byte	0xe
+	.byte	0x7b
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x77
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL122
+	.4byte	.LVL123
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL129
+	.4byte	.LVL130
+	.2byte	0xe
+	.byte	0x7b
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x77
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL130
+	.4byte	.LVL131
+	.2byte	0x10
+	.byte	0x7b
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x73
+	.sleb128 4
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL131
+	.4byte	.LVL132
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST51:
+	.4byte	.LVL119
+	.4byte	.LVL125
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL125
+	.4byte	.LVL127
+	.2byte	0x5
+	.byte	0x74
+	.sleb128 0
+	.byte	0x75
+	.sleb128 0
+	.byte	0x22
+	.4byte	.LVL129
+	.4byte	.LVL135
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL135
+	.4byte	.LVL138
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL138
+	.4byte	.LVL140
+	.2byte	0x5
+	.byte	0x74
+	.sleb128 0
+	.byte	0x75
+	.sleb128 0
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST42:
+	.4byte	.LVL106
+	.4byte	.LVL108
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL108
+	.4byte	.LVL109
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL109
+	.4byte	.LVL110
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL110
+	.4byte	.LFE246
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST43:
+	.4byte	.LVL107
+	.4byte	.LVL109
+	.2byte	0x6
+	.byte	0x3
+	.4byte	gSysFreeQueue
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST39:
+	.4byte	.LVL99
+	.4byte	.LVL102
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL102
+	.4byte	.LVL103
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL103
+	.4byte	.LVL105
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL105
+	.4byte	.LFE245
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST40:
+	.4byte	.LVL99
+	.4byte	.LVL105
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL105
+	.4byte	.LFE245
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST41:
+	.4byte	.LVL100
+	.4byte	.LVL101
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL103
+	.4byte	.LFE245
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST33:
+	.4byte	.LVL81
+	.4byte	.LVL82
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL83
+	.4byte	.LVL84
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL86
+	.4byte	.LVL91
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL95
+	.4byte	.LFE244
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST34:
+	.4byte	.LVL86
+	.4byte	.LVL88
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL88
+	.4byte	.LVL90
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL95
+	.4byte	.LFE244
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST35:
+	.4byte	.LVL87
+	.4byte	.LVL88
+	.2byte	0x1
+	.byte	0x5c
+	.4byte	.LVL88
+	.4byte	.LVL97
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL98
+	.4byte	.LFE244
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST36:
+	.4byte	.LVL92
+	.4byte	.LVL94
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST37:
+	.4byte	.LVL85
+	.4byte	.LVL86
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST38:
+	.4byte	.LVL89
+	.4byte	.LVL93
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST175:
+	.4byte	.LVL633
+	.4byte	.LVL635-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL635-1
+	.4byte	.LFE243
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST176:
+	.4byte	.LVL633
+	.4byte	.LVL635-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL635-1
+	.4byte	.LFE243
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST177:
+	.4byte	.LVL634
+	.4byte	.LVL639
+	.2byte	0x6
+	.byte	0x3
+	.4byte	gSysFreeQueue
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST178:
+	.4byte	.LVL636
+	.4byte	.LVL638
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST196:
+	.4byte	.LVL768
+	.4byte	.LVL769
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL769
+	.4byte	.LVL770-1
+	.2byte	0x5
+	.byte	0x3
+	.4byte	gSysFreeQueue
+	.4byte	.LVL770-1
+	.4byte	.LFE240
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST157:
+	.4byte	.LVL584
+	.4byte	.LVL585
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL585
+	.4byte	.LFE239
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST158:
+	.4byte	.LVL584
+	.4byte	.LVL586
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL586
+	.4byte	.LVL591-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL591-1
+	.4byte	.LFE239
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST159:
+	.4byte	.LVL590
+	.4byte	.LVL592
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL592
+	.4byte	.LVL593
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL594
+	.4byte	.LFE239
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST160:
+	.4byte	.LVL595
+	.4byte	.LVL597
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL597
+	.4byte	.LVL599
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL599
+	.4byte	.LVL600
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL600
+	.4byte	.LFE239
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST161:
+	.4byte	.LVL587
+	.4byte	.LVL588
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL588
+	.4byte	.LVL589
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST31:
+	.4byte	.LVL76
+	.4byte	.LVL77
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL77
+	.4byte	.LVL78
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL78
+	.4byte	.LVL79
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL79
+	.4byte	.LFE238
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST32:
+	.4byte	.LVL76
+	.4byte	.LVL78
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL78
+	.4byte	.LVL80
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL80
+	.4byte	.LFE238
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST29:
+	.4byte	.LVL72
+	.4byte	.LVL73-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL73-1
+	.4byte	.LFE237
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST30:
+	.4byte	.LVL74
+	.4byte	.LVL75-1
+	.2byte	0x11
+	.byte	0x70
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x3
+	.4byte	c_ftl_nand_planes_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST27:
+	.4byte	.LVL68
+	.4byte	.LVL70-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL70-1
+	.4byte	.LFE236
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST28:
+	.4byte	.LVL69
+	.4byte	.LVL70-1
+	.2byte	0x1a
+	.byte	0x76
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x3
+	.4byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0x75
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x76
+	.sleb128 0
+	.byte	0x75
+	.sleb128 0
+	.byte	0x1d
+	.byte	0x22
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST24:
+	.4byte	.LVL63
+	.4byte	.LVL66-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL66-1
+	.4byte	.LFE235
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST25:
+	.4byte	.LVL63
+	.4byte	.LVL65
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL65
+	.4byte	.LFE235
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST26:
+	.4byte	.LVL64
+	.4byte	.LVL66-1
+	.2byte	0x20
+	.byte	0x77
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x76
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0x3
+	.4byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0x1e
+	.byte	0x76
+	.sleb128 0
+	.byte	0x75
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x77
+	.sleb128 0
+	.byte	0x76
+	.sleb128 0
+	.byte	0x1d
+	.byte	0x22
+	.byte	0x22
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST346:
+	.4byte	.LVL1461
+	.4byte	.LVL1463
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1470
+	.4byte	.LVL1475
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1475
+	.4byte	.LVL1476
+	.2byte	0x3
+	.byte	0x76
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL1476
+	.4byte	.LVL1494
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST347:
+	.4byte	.LVL1462
+	.4byte	.LVL1464
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1464
+	.4byte	.LVL1468
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1469
+	.4byte	.LVL1470
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1480
+	.4byte	.LVL1490
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1491
+	.4byte	.LVL1492
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1492
+	.4byte	.LVL1493-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1493
+	.4byte	.LVL1494
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1494
+	.4byte	.LVL1495
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1500
+	.4byte	.LVL1501-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST348:
+	.4byte	.LVL1472
+	.4byte	.LVL1477
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1484
+	.4byte	.LVL1489
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST349:
+	.4byte	.LVL1471
+	.4byte	.LVL1492
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST155:
+	.4byte	.LVL576
+	.4byte	.LVL582
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL583
+	.4byte	.LFE233
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST156:
+	.4byte	.LVL577
+	.4byte	.LVL578
+	.2byte	0x13
+	.byte	0x73
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x76
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x74
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x3a
+	.byte	0x24
+	.byte	0x9f
+	.4byte	.LVL578
+	.4byte	.LVL579
+	.2byte	0x13
+	.byte	0x72
+	.sleb128 15
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x76
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x74
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x3a
+	.byte	0x24
+	.byte	0x9f
+	.4byte	.LVL579
+	.4byte	.LVL580-1
+	.2byte	0x18
+	.byte	0x3
+	.4byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x76
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x74
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x3a
+	.byte	0x24
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST342:
+	.4byte	.LVL1447
+	.4byte	.LVL1448
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1455
+	.4byte	.LVL1456
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1456
+	.4byte	.LVL1457
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL1457
+	.4byte	.LVL1458
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST343:
+	.4byte	.LVL1436
+	.4byte	.LVL1439
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1448
+	.4byte	.LVL1449
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1450
+	.4byte	.LVL1451
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST344:
+	.4byte	.LVL1442
+	.4byte	.LVL1446
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1451
+	.4byte	.LVL1453
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1454
+	.4byte	.LVL1455
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST345:
+	.4byte	.LVL1434
+	.4byte	.LVL1445
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1448
+	.4byte	.LVL1455
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1458
+	.4byte	.LVL1459
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST22:
+	.4byte	.LVL54
+	.4byte	.LVL55
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL56
+	.4byte	.LVL57
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL57
+	.4byte	.LVL58
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL58
+	.4byte	.LVL59-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL59-1
+	.4byte	.LVL61
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL61
+	.4byte	.LVL62
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST23:
+	.4byte	.LVL54
+	.4byte	.LVL55
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL56
+	.4byte	.LVL60
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL61
+	.4byte	.LFE231
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST288:
+	.4byte	.LVL1162
+	.4byte	.LVL1164
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1174
+	.4byte	.LVL1175
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1175
+	.4byte	.LVL1176
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL1176
+	.4byte	.LVL1177
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST289:
+	.4byte	.LVL1161
+	.4byte	.LVL1166
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1166
+	.4byte	.LVL1174
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -36
+	.4byte	.LVL1174
+	.4byte	.LVL1177
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1177
+	.4byte	.LVL1178
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1178
+	.4byte	.LVL1179
+	.2byte	0x6
+	.byte	0x91
+	.sleb128 -36
+	.byte	0x6
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x9f
+	.4byte	.LVL1180
+	.4byte	.LVL1181
+	.2byte	0x6
+	.byte	0x91
+	.sleb128 -36
+	.byte	0x6
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x9f
+	.4byte	.LVL1181
+	.4byte	.LFE229
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST290:
+	.4byte	.LVL1163
+	.4byte	.LVL1174
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1177
+	.4byte	.LVL1181
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST291:
+	.4byte	.LVL1161
+	.4byte	.LVL1166
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1166
+	.4byte	.LVL1171
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1172
+	.4byte	.LVL1174
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1174
+	.4byte	.LVL1177
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1177
+	.4byte	.LVL1181
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST194:
+	.4byte	.LVL761
+	.4byte	.LVL763
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL763
+	.4byte	.LVL766
+	.2byte	0x4
+	.byte	0x75
+	.sleb128 -1022
+	.byte	0x9f
+	.4byte	.LVL766
+	.4byte	.LFE228
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST195:
+	.4byte	.LVL761
+	.4byte	.LVL762
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL762
+	.4byte	.LVL766
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL766
+	.4byte	.LFE228
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST17:
+	.4byte	.LVL47
+	.4byte	.LVL49-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL49-1
+	.4byte	.LFE226
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST18:
+	.4byte	.LVL48
+	.4byte	.LVL53
+	.2byte	0x10
+	.byte	0x76
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x75
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST19:
+	.4byte	.LVL50
+	.4byte	.LVL51-1
+	.2byte	0x32
+	.byte	0x74
+	.sleb128 0
+	.byte	0x35
+	.byte	0x25
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x32
+	.byte	0x24
+	.byte	0x76
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x75
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x23
+	.uleb128 0x6
+	.byte	0x32
+	.byte	0x24
+	.byte	0x3
+	.4byte	gBbtInfo+4
+	.byte	0x22
+	.byte	0x6
+	.byte	0x22
+	.byte	0x6
+	.byte	0x74
+	.sleb128 0
+	.byte	0x4f
+	.byte	0x1a
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x25
+	.byte	0x31
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST20:
+	.4byte	.LVL50
+	.4byte	.LVL51-1
+	.2byte	0x19
+	.byte	0x76
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x75
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x23
+	.uleb128 0x6
+	.byte	0x32
+	.byte	0x24
+	.byte	0x3
+	.4byte	gBbtInfo+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST21:
+	.4byte	.LVL50
+	.4byte	.LVL52
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST13:
+	.4byte	.LVL40
+	.4byte	.LVL41-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL41-1
+	.4byte	.LFE225
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST14:
+	.4byte	.LVL42
+	.4byte	.LVL46
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST15:
+	.4byte	.LVL44
+	.4byte	.LVL45-1
+	.2byte	0xa
+	.byte	0x76
+	.sleb128 6
+	.byte	0x32
+	.byte	0x24
+	.byte	0x3
+	.4byte	gBbtInfo+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST16:
+	.4byte	.LVL44
+	.4byte	.LVL45-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST443:
+	.4byte	.LVL1965
+	.4byte	.LVL1968
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1968
+	.4byte	.LVL1969-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1969-1
+	.4byte	.LFE223
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST444:
+	.4byte	.LVL1965
+	.4byte	.LVL1967
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1967
+	.4byte	.LVL1969-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1969-1
+	.4byte	.LFE223
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST445:
+	.4byte	.LVL1965
+	.4byte	.LVL1966
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1966
+	.4byte	.LVL1969-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1969-1
+	.4byte	.LFE223
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST425:
+	.4byte	.LVL1864
+	.4byte	.LVL1867
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1867
+	.4byte	.LVL1868-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1868-1
+	.4byte	.LFE222
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST426:
+	.4byte	.LVL1864
+	.4byte	.LVL1866
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1866
+	.4byte	.LVL1868-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1868-1
+	.4byte	.LFE222
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST427:
+	.4byte	.LVL1864
+	.4byte	.LVL1865
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1865
+	.4byte	.LVL1868-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1868-1
+	.4byte	.LFE222
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST383:
+	.4byte	.LVL1630
+	.4byte	.LVL1631
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1631
+	.4byte	.LVL1632
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1632
+	.4byte	.LVL1633-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1633-1
+	.4byte	.LVL1636
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1636
+	.4byte	.LVL1651
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1651
+	.4byte	.LVL1652
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1652
+	.4byte	.LFE221
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST384:
+	.4byte	.LVL1630
+	.4byte	.LVL1631
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1631
+	.4byte	.LVL1632
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1632
+	.4byte	.LVL1633-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1633-1
+	.4byte	.LVL1651
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1651
+	.4byte	.LFE221
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST385:
+	.4byte	.LVL1637
+	.4byte	.LVL1642
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST386:
+	.4byte	.LVL1638
+	.4byte	.LVL1639
+	.2byte	0x21
+	.byte	0x74
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x76
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1c
+	.byte	0x12
+	.byte	0x40
+	.byte	0x4b
+	.byte	0x24
+	.byte	0x22
+	.byte	0x75
+	.sleb128 0
+	.byte	0x16
+	.byte	0x14
+	.byte	0x40
+	.byte	0x4b
+	.byte	0x24
+	.byte	0x22
+	.byte	0x2d
+	.byte	0x28
+	.2byte	0x1
+	.byte	0x16
+	.byte	0x13
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST387:
+	.4byte	.LVL1635
+	.4byte	.LVL1640
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1640
+	.4byte	.LVL1651
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST388:
+	.4byte	.LVL1647
+	.4byte	.LVL1648-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST428:
+	.4byte	.LVL1869
+	.4byte	.LVL1872
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1872
+	.4byte	.LVL1874
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1874
+	.4byte	.LVL1876
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1876
+	.4byte	.LVL1963
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1963
+	.4byte	.LVL1964
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1964
+	.4byte	.LFE220
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST429:
+	.4byte	.LVL1869
+	.4byte	.LVL1871
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1871
+	.4byte	.LVL1874
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1874
+	.4byte	.LVL1878
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1878
+	.4byte	.LVL1922
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1922
+	.4byte	.LVL1923
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL1923
+	.4byte	.LVL1963
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1963
+	.4byte	.LFE220
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST430:
+	.4byte	.LVL1869
+	.4byte	.LVL1870
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1870
+	.4byte	.LVL1874
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -80
+	.4byte	.LVL1874
+	.4byte	.LVL1877
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1877
+	.4byte	.LVL1923
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -80
+	.4byte	.LVL1923
+	.4byte	.LVL1924
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1924
+	.4byte	.LVL1963
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -80
+	.4byte	.LVL1963
+	.4byte	.LFE220
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST431:
+	.4byte	.LVL1869
+	.4byte	.LVL1873-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1873-1
+	.4byte	.LVL1874
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -92
+	.4byte	.LVL1874
+	.4byte	.LVL1875
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1875
+	.4byte	.LVL1925
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -92
+	.4byte	.LVL1925
+	.4byte	.LVL1926
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1926
+	.4byte	.LFE220
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -92
+	.4byte	0
+	.4byte	0
+.LLST432:
+	.4byte	.LVL1935
+	.4byte	.LVL1938
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -84
+	.4byte	0
+	.4byte	0
+.LLST433:
+	.4byte	.LVL1885
+	.4byte	.LVL1886
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL1886
+	.4byte	.LVL1906
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1929
+	.4byte	.LVL1963
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST434:
+	.4byte	.LVL1880
+	.4byte	.LVL1881
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1881
+	.4byte	.LVL1911
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL1911
+	.4byte	.LVL1912
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1912
+	.4byte	.LVL1927
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL1927
+	.4byte	.LVL1928-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1928-1
+	.4byte	.LVL1963
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST435:
+	.4byte	.LVL1883
+	.4byte	.LVL1885-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1885-1
+	.4byte	.LVL1911
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -76
+	.4byte	.LVL1911
+	.4byte	.LVL1914
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1914
+	.4byte	.LVL1963
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -76
+	.4byte	0
+	.4byte	0
+.LLST436:
+	.4byte	.LVL1934
+	.4byte	.LVL1936
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1936
+	.4byte	.LVL1937
+	.2byte	0x2
+	.byte	0x71
+	.sleb128 4
+	.4byte	.LVL1937
+	.4byte	.LVL1939-1
+	.2byte	0xb
+	.byte	0x3
+	.4byte	req_prgm
+	.byte	0x6
+	.byte	0x77
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x4
+	.4byte	0
+	.4byte	0
+.LLST437:
+	.4byte	.LVL1897
+	.4byte	.LVL1900
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1900
+	.4byte	.LVL1902
+	.2byte	0x3
+	.byte	0x7b
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1932
+	.4byte	.LVL1949
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1949
+	.4byte	.LVL1950
+	.2byte	0x3
+	.byte	0x7b
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL1950
+	.4byte	.LVL1959
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST438:
+	.4byte	.LVL1884
+	.4byte	.LVL1885-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1885-1
+	.4byte	.LVL1901
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -88
+	.4byte	.LVL1901
+	.4byte	.LVL1903
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1903
+	.4byte	.LVL1911
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -88
+	.4byte	.LVL1911
+	.4byte	.LVL1913
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1913
+	.4byte	.LVL1919
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -88
+	.4byte	.LVL1919
+	.4byte	.LVL1920
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1921
+	.4byte	.LVL1929
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1929
+	.4byte	.LVL1962
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -88
+	.4byte	.LVL1962
+	.4byte	.LVL1963
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST439:
+	.4byte	.LVL1893
+	.4byte	.LVL1894
+	.2byte	0x1f
+	.byte	0x74
+	.sleb128 7
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x32
+	.byte	0x24
+	.byte	0x12
+	.byte	0x40
+	.byte	0x4b
+	.byte	0x24
+	.byte	0x22
+	.byte	0x91
+	.sleb128 -88
+	.byte	0x6
+	.byte	0x16
+	.byte	0x14
+	.byte	0x40
+	.byte	0x4b
+	.byte	0x24
+	.byte	0x22
+	.byte	0x2d
+	.byte	0x28
+	.2byte	0x1
+	.byte	0x16
+	.byte	0x13
+	.byte	0x9f
+	.4byte	.LVL1894
+	.4byte	.LVL1895
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1895
+	.4byte	.LVL1898
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -60
+	.4byte	.LVL1898
+	.4byte	.LVL1899
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1899
+	.4byte	.LVL1900
+	.2byte	0x3
+	.byte	0x7b
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL1900
+	.4byte	.LVL1902
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1932
+	.4byte	.LVL1959
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -60
+	.4byte	.LVL1959
+	.4byte	.LVL1963
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST440:
+	.4byte	.LVL1885
+	.4byte	.LVL1886
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1916
+	.4byte	.LVL1917
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1917
+	.4byte	.LVL1919-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1940
+	.4byte	.LVL1942
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1944
+	.4byte	.LVL1945
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1945
+	.4byte	.LVL1947
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -72
+	.4byte	.LVL1951
+	.4byte	.LVL1958
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -72
+	.4byte	0
+	.4byte	0
+.LLST441:
+	.4byte	.LVL1885
+	.4byte	.LVL1886
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1916
+	.4byte	.LVL1920
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1921
+	.4byte	.LVL1929
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1941
+	.4byte	.LVL1942
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1945
+	.4byte	.LVL1946
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1951
+	.4byte	.LVL1958
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST442:
+	.4byte	.LVL1885
+	.4byte	.LVL1886
+	.2byte	0x6
+	.byte	0x3
+	.4byte	g_active_superblock
+	.byte	0x9f
+	.4byte	.LVL1886
+	.4byte	.LVL1889
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1892
+	.4byte	.LVL1904
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1929
+	.4byte	.LVL1931
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1932
+	.4byte	.LVL1963
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST375:
+	.4byte	.LVL1602
+	.4byte	.LVL1605-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1605-1
+	.4byte	.LVL1605
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1605
+	.4byte	.LFE218
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST376:
+	.4byte	.LVL1602
+	.4byte	.LVL1605-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1605-1
+	.4byte	.LVL1623
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1623
+	.4byte	.LFE218
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST377:
+	.4byte	.LVL1602
+	.4byte	.LVL1603
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1603
+	.4byte	.LFE218
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST378:
+	.4byte	.LVL1602
+	.4byte	.LVL1604
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1604
+	.4byte	.LVL1623
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1623
+	.4byte	.LFE218
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST379:
+	.4byte	.LVL1605
+	.4byte	.LVL1623
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST380:
+	.4byte	.LVL1614
+	.4byte	.LVL1621
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST381:
+	.4byte	.LVL1606
+	.4byte	.LVL1607
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1616
+	.4byte	.LVL1617
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST382:
+	.4byte	.LVL1613
+	.4byte	.LVL1615-1
+	.2byte	0x2
+	.byte	0x75
+	.sleb128 12
+	.4byte	0
+	.4byte	0
+.LLST408:
+	.4byte	.LVL1813
+	.4byte	.LVL1816
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1816
+	.4byte	.LVL1819
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1819
+	.4byte	.LVL1822
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1822
+	.4byte	.LVL1862
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1862
+	.4byte	.LVL1863
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1863
+	.4byte	.LFE217
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST409:
+	.4byte	.LVL1813
+	.4byte	.LVL1815
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1815
+	.4byte	.LVL1819
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1819
+	.4byte	.LVL1823-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1823-1
+	.4byte	.LVL1862
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1862
+	.4byte	.LFE217
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST410:
+	.4byte	.LVL1813
+	.4byte	.LVL1814
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1814
+	.4byte	.LVL1819
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -56
+	.4byte	.LVL1819
+	.4byte	.LVL1821
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1821
+	.4byte	.LFE217
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -56
+	.4byte	0
+	.4byte	0
+.LLST411:
+	.4byte	.LVL1813
+	.4byte	.LVL1817-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1817-1
+	.4byte	.LVL1819
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1819
+	.4byte	.LVL1820
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1820
+	.4byte	.LFE217
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST412:
+	.4byte	.LVL1813
+	.4byte	.LVL1818
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1819
+	.4byte	.LVL1831
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1862
+	.4byte	.LFE217
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST413:
+	.4byte	.LVL1825
+	.4byte	.LVL1826
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1826
+	.4byte	.LVL1862
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -72
+	.4byte	0
+	.4byte	0
+.LLST414:
+	.4byte	.LVL1828
+	.4byte	.LVL1831
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1831
+	.4byte	.LVL1862
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -68
+	.4byte	0
+	.4byte	0
+.LLST415:
+	.4byte	.LVL1847
+	.4byte	.LVL1848
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1848
+	.4byte	.LVL1849-1
+	.2byte	0x12
+	.byte	0x3
+	.4byte	c_ftl_nand_sec_pre_page
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x74
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST416:
+	.4byte	.LVL1829
+	.4byte	.LVL1831
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -72
+	.4byte	.LVL1831
+	.4byte	.LVL1862
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST417:
+	.4byte	.LVL1840
+	.4byte	.LVL1841
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1841
+	.4byte	.LVL1846
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1859
+	.4byte	.LVL1862
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST418:
+	.4byte	.LVL1829
+	.4byte	.LVL1831
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1831
+	.4byte	.LVL1845
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1846
+	.4byte	.LVL1862
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST419:
+	.4byte	.LVL1829
+	.4byte	.LVL1830
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1830
+	.4byte	.LVL1831
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1831
+	.4byte	.LVL1833
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -80
+	.4byte	.LVL1833
+	.4byte	.LVL1834-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1834-1
+	.4byte	.LVL1837
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -80
+	.4byte	.LVL1837
+	.4byte	.LVL1838
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL1838
+	.4byte	.LVL1839
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1839
+	.4byte	.LVL1862
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -80
+	.4byte	0
+	.4byte	0
+.LLST420:
+	.4byte	.LVL1813
+	.4byte	.LVL1818
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1819
+	.4byte	.LVL1831
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1831
+	.4byte	.LVL1853
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -64
+	.4byte	.LVL1853
+	.4byte	.LVL1856
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1856
+	.4byte	.LVL1862
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -64
+	.4byte	.LVL1862
+	.4byte	.LFE217
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST421:
+	.4byte	.LVL1819
+	.4byte	.LVL1831
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1831
+	.4byte	.LVL1853
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -60
+	.4byte	.LVL1853
+	.4byte	.LVL1854
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1854
+	.4byte	.LVL1855
+	.2byte	0x6
+	.byte	0x7b
+	.sleb128 0
+	.byte	0x71
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL1855
+	.4byte	.LVL1856
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1856
+	.4byte	.LVL1862
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -60
+	.4byte	.LVL1862
+	.4byte	.LFE217
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST422:
+	.4byte	.LVL1819
+	.4byte	.LVL1831
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1831
+	.4byte	.LVL1862
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1862
+	.4byte	.LFE217
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST423:
+	.4byte	.LVL1835
+	.4byte	.LVL1836
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1846
+	.4byte	.LVL1851
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST424:
+	.4byte	.LVL1860
+	.4byte	.LVL1861-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST452:
+	.4byte	.LVL2071
+	.4byte	.LVL2072
+	.2byte	0x7
+	.byte	0xa
+	.2byte	0x1fc1
+	.byte	0x74
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL2072
+	.4byte	.LVL2073
+	.2byte	0x7
+	.byte	0xa
+	.2byte	0x1fc2
+	.byte	0x74
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL2073
+	.4byte	.LVL2074
+	.2byte	0x7
+	.byte	0xa
+	.2byte	0x1fc1
+	.byte	0x74
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST448:
+	.4byte	.LVL2025
+	.4byte	.LVL2027
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2029
+	.4byte	.LVL2030
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2040
+	.4byte	.LVL2042
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2045
+	.4byte	.LVL2046
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2050
+	.4byte	.LVL2051
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2053
+	.4byte	.LVL2054
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2054
+	.4byte	.LVL2055-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2057
+	.4byte	.LVL2058
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST449:
+	.4byte	.LVL2029
+	.4byte	.LVL2033
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2054
+	.4byte	.LVL2056
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2057
+	.4byte	.LVL2058
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST450:
+	.4byte	.LVL2023
+	.4byte	.LVL2026
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2026
+	.4byte	.LVL2028
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2040
+	.4byte	.LVL2043
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2044
+	.4byte	.LVL2049
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2049
+	.4byte	.LVL2050
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST451:
+	.4byte	.LVL2021
+	.4byte	.LVL2022
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2022
+	.4byte	.LVL2024
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2038
+	.4byte	.LVL2039
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2039
+	.4byte	.LVL2040
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST179:
+	.4byte	.LVL640
+	.4byte	.LVL642
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL642
+	.4byte	.LFE212
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST180:
+	.4byte	.LVL640
+	.4byte	.LVL642
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL642
+	.4byte	.LFE212
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST181:
+	.4byte	.LVL640
+	.4byte	.LVL642
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL642
+	.4byte	.LVL669
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL670
+	.4byte	.LVL672
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL673
+	.4byte	.LVL687
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL688
+	.4byte	.LFE212
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST182:
+	.4byte	.LVL640
+	.4byte	.LVL642
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL642
+	.4byte	.LVL647
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL647
+	.4byte	.LVL648
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL648
+	.4byte	.LVL664
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL665
+	.4byte	.LVL682
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL683
+	.4byte	.LFE212
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST183:
+	.4byte	.LVL641
+	.4byte	.LVL642
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL642
+	.4byte	.LVL643
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL643
+	.4byte	.LVL647
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL647
+	.4byte	.LVL648
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL648
+	.4byte	.LVL649
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL649
+	.4byte	.LVL650
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL651
+	.4byte	.LVL652
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL652
+	.4byte	.LVL655
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL655
+	.4byte	.LVL657
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL657
+	.4byte	.LVL658
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL659
+	.4byte	.LVL666
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL666
+	.4byte	.LVL667
+	.2byte	0x3
+	.byte	0x7b
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL668
+	.4byte	.LVL671
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL671
+	.4byte	.LVL674
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL674
+	.4byte	.LVL675
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL676
+	.4byte	.LVL677
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL677
+	.4byte	.LVL684
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL684
+	.4byte	.LVL685
+	.2byte	0x3
+	.byte	0x7b
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL686
+	.4byte	.LVL690
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL690
+	.4byte	.LVL691
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL692
+	.4byte	.LVL693
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL693
+	.4byte	.LVL694
+	.2byte	0x3
+	.byte	0x76
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST184:
+	.4byte	.LVL661
+	.4byte	.LVL662-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL679
+	.4byte	.LVL680-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST185:
+	.4byte	.LVL640
+	.4byte	.LVL645
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL645
+	.4byte	.LVL646
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL659
+	.4byte	.LVL677
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST186:
+	.4byte	.LVL640
+	.4byte	.LVL647
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL647
+	.4byte	.LVL653
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL654
+	.4byte	.LVL656
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL659
+	.4byte	.LVL677
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL677
+	.4byte	.LVL692
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST187:
+	.4byte	.LVL640
+	.4byte	.LVL646
+	.2byte	0x2
+	.byte	0x36
+	.byte	0x9f
+	.4byte	.LVL659
+	.4byte	.LVL677
+	.2byte	0x2
+	.byte	0x36
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST188:
+	.4byte	.LVL640
+	.4byte	.LVL644
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL644
+	.4byte	.LVL646
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL659
+	.4byte	.LVL677
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST192:
+	.4byte	.LVL754
+	.4byte	.LVL755
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL755
+	.4byte	.LVL756
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL758
+	.4byte	.LVL760
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST193:
+	.4byte	.LVL699
+	.4byte	.LVL705
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL705
+	.4byte	.LVL712
+	.2byte	0x7
+	.byte	0x74
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL714
+	.4byte	.LVL720
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL721
+	.4byte	.LVL724
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL725
+	.4byte	.LVL726
+	.2byte	0x9
+	.byte	0x3
+	.4byte	c_ftl_nand_max_map_blks
+	.byte	0x6
+	.byte	0x31
+	.byte	0x24
+	.byte	0x9f
+	.4byte	.LVL726
+	.4byte	.LVL729
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL735
+	.4byte	.LVL736
+	.2byte	0xe
+	.byte	0x3
+	.4byte	c_ftl_nand_map_region_num
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x32
+	.byte	0x24
+	.byte	0x9f
+	.4byte	.LVL736
+	.4byte	.LVL737-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL738
+	.4byte	.LVL739
+	.2byte	0x9
+	.byte	0x3
+	.4byte	c_ftl_nand_max_map_blks
+	.byte	0x6
+	.byte	0x32
+	.byte	0x24
+	.byte	0x9f
+	.4byte	.LVL739
+	.4byte	.LVL740-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL741
+	.4byte	.LVL742
+	.2byte	0xe
+	.byte	0x3
+	.4byte	c_ftl_nand_l2pmap_ram_region_num
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x3c
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL742
+	.4byte	.LVL743-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL744
+	.4byte	.LVL745
+	.2byte	0x18
+	.byte	0x3
+	.4byte	c_ftl_nand_l2pmap_ram_region_num
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x3
+	.4byte	c_ftl_nand_byte_pre_page
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL745
+	.4byte	.LVL746-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL747
+	.4byte	.LVL748
+	.2byte	0xe
+	.byte	0x3
+	.4byte	c_ftl_nand_blk_pre_plane
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL748
+	.4byte	.LVL749-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL750
+	.4byte	.LVL751
+	.2byte	0x11
+	.byte	0x3
+	.4byte	c_ftl_nand_die_num
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x70
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x32
+	.byte	0x24
+	.byte	0x9f
+	.4byte	.LVL751
+	.4byte	.LVL752
+	.2byte	0x1e
+	.byte	0x3
+	.4byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x23
+	.uleb128 0x1f
+	.byte	0x35
+	.byte	0x26
+	.byte	0x3
+	.4byte	c_ftl_nand_die_num
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x32
+	.byte	0x24
+	.byte	0x9f
+	.4byte	.LVL752
+	.4byte	.LVL753-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST10:
+	.4byte	.LVL25
+	.4byte	.LVL26
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL26
+	.4byte	.LVL32
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL32
+	.4byte	.LFE208
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST11:
+	.4byte	.LVL27
+	.4byte	.LVL29
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST9:
+	.4byte	.LVL22
+	.4byte	.LVL23
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL23
+	.4byte	.LVL24
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL24
+	.4byte	.LFE207
+	.2byte	0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_sys_blks_per_plane
+	.4byte	0
+	.4byte	0
+.LLST6:
+	.4byte	.LVL14
+	.4byte	.LVL18
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL18
+	.4byte	.LVL19
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL19
+	.4byte	.LFE205
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST7:
+	.4byte	.LVL14
+	.4byte	.LVL15
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL16
+	.4byte	.LVL17
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL17
+	.4byte	.LVL19
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL19
+	.4byte	.LVL20
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL20
+	.4byte	.LFE205
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST8:
+	.4byte	.LVL14
+	.4byte	.LVL15
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL16
+	.4byte	.LFE205
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST111:
+	.4byte	.LVL449
+	.4byte	.LVL451-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL451-1
+	.4byte	.LVL456
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL456
+	.4byte	.LFE204
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST112:
+	.4byte	.LVL450
+	.4byte	.LVL451-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL451-1
+	.4byte	.LVL452
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL452
+	.4byte	.LVL453
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL453
+	.4byte	.LVL454
+	.2byte	0x6
+	.byte	0x74
+	.sleb128 0
+	.byte	0x70
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.4byte	.LVL454
+	.4byte	.LVL455
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST106:
+	.4byte	.LVL300
+	.4byte	.LVL302-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL302-1
+	.4byte	.LFE203
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST107:
+	.4byte	.LVL438
+	.4byte	.LVL440
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL440
+	.4byte	.LVL442
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL442
+	.4byte	.LVL444
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL445
+	.4byte	.LVL446
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL446
+	.4byte	.LVL447-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL447-1
+	.4byte	.LVL448
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL448
+	.4byte	.LFE203
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST108:
+	.4byte	.LVL301
+	.4byte	.LVL302-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL302-1
+	.4byte	.LVL303
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL303
+	.4byte	.LVL415
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL415
+	.4byte	.LFE203
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST109:
+	.4byte	.LVL438
+	.4byte	.LVL439-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL442
+	.4byte	.LVL443
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST110:
+	.4byte	.LVL445
+	.4byte	.LVL447-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL448
+	.4byte	.LFE203
+	.2byte	0x9
+	.byte	0x3
+	.4byte	p_data_block_list_table
+	.byte	0x6
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST0:
+	.4byte	.LVL0
+	.4byte	.LVL5
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL5
+	.4byte	.LVL11
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL11
+	.4byte	.LFE351
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST1:
+	.4byte	.LVL0
+	.4byte	.LVL7-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL7-1
+	.4byte	.LVL11
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL11
+	.4byte	.LFE351
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST2:
+	.4byte	.LVL1
+	.4byte	.LVL9
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST3:
+	.4byte	.LVL2
+	.4byte	.LVL4
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL4
+	.4byte	.LVL6
+	.2byte	0x5
+	.byte	0x3
+	.4byte	g_nand_phy_info+10
+	.4byte	.LVL6
+	.4byte	.LVL11
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST4:
+	.4byte	.LVL8
+	.4byte	.LVL10
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL10
+	.4byte	.LVL11
+	.2byte	0x2
+	.byte	0x7a
+	.sleb128 0
+	.4byte	.LVL11
+	.4byte	.LFE351
+	.2byte	0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST5:
+	.4byte	.LVL12
+	.4byte	.LVL13
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL13
+	.4byte	.LFE358
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST12:
+	.4byte	.LVL36
+	.4byte	.LVL37
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL37
+	.4byte	.LVL38
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL38
+	.4byte	.LVL39
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL39
+	.4byte	.LFE211
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST52:
+	.4byte	.LVL141
+	.4byte	.LVL142-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL142-1
+	.4byte	.LFE248
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST58:
+	.4byte	.LVL160
+	.4byte	.LVL161-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL161-1
+	.4byte	.LFE247
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST70:
+	.4byte	.LVL198
+	.4byte	.LVL204
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL204
+	.4byte	.LFE255
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST71:
+	.4byte	.LVL199
+	.4byte	.LVL204
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL204
+	.4byte	.LVL215
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST72:
+	.4byte	.LVL207
+	.4byte	.LVL208
+	.2byte	0x5
+	.byte	0x72
+	.sleb128 0
+	.byte	0x36
+	.byte	0x1b
+	.byte	0x9f
+	.4byte	.LVL208
+	.4byte	.LVL213-1
+	.2byte	0xd
+	.byte	0x78
+	.sleb128 2
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x36
+	.byte	0x1b
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST73:
+	.4byte	.LVL201
+	.4byte	.LVL204
+	.2byte	0xb
+	.byte	0x70
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x3
+	.4byte	p_valid_page_count_table
+	.byte	0x6
+	.byte	0x22
+	.4byte	.LVL204
+	.4byte	.LVL206-1
+	.2byte	0xb
+	.byte	0x74
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x3
+	.4byte	p_valid_page_count_table
+	.byte	0x6
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST74:
+	.4byte	.LVL202
+	.4byte	.LVL203
+	.2byte	0x6
+	.byte	0x75
+	.sleb128 0
+	.byte	0x72
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL203
+	.4byte	.LVL212
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST75:
+	.4byte	.LVL207
+	.4byte	.LVL208
+	.2byte	0xd
+	.byte	0x72
+	.sleb128 0
+	.byte	0x36
+	.byte	0x1b
+	.byte	0x31
+	.byte	0x24
+	.byte	0x3
+	.4byte	p_valid_page_count_table
+	.byte	0x6
+	.byte	0x22
+	.4byte	.LVL208
+	.4byte	.LVL213-1
+	.2byte	0x15
+	.byte	0x78
+	.sleb128 2
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x36
+	.byte	0x1b
+	.byte	0x31
+	.byte	0x24
+	.byte	0x3
+	.4byte	p_valid_page_count_table
+	.byte	0x6
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST76:
+	.4byte	.LVL209
+	.4byte	.LVL210
+	.2byte	0x6
+	.byte	0x73
+	.sleb128 0
+	.byte	0x70
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL210
+	.4byte	.LVL213-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST77:
+	.4byte	.LVL200
+	.4byte	.LVL215
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST78:
+	.4byte	.LVL207
+	.4byte	.LVL208
+	.2byte	0xa
+	.byte	0x3
+	.4byte	p_data_block_list_table
+	.byte	0x6
+	.byte	0x72
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.4byte	.LVL208
+	.4byte	.LVL213-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST79:
+	.4byte	.LVL216
+	.4byte	.LVL219
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL219
+	.4byte	.LVL221
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL221
+	.4byte	.LVL222-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL222-1
+	.4byte	.LVL223
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL223
+	.4byte	.LFE258
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST80:
+	.4byte	.LVL216
+	.4byte	.LVL217
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL218
+	.4byte	.LVL223
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST81:
+	.4byte	.LVL216
+	.4byte	.LVL219
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 12
+	.4byte	.LVL221
+	.4byte	.LVL222-1
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 12
+	.4byte	0
+	.4byte	0
+.LLST82:
+	.4byte	.LVL219
+	.4byte	.LVL221
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST86:
+	.4byte	.LVL244
+	.4byte	.LVL245
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL245
+	.4byte	.LFE269
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST87:
+	.4byte	.LVL247
+	.4byte	.LVL248-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL248-1
+	.4byte	.LVL248
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL248
+	.4byte	.LVL249
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL249
+	.4byte	.LFE275
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST88:
+	.4byte	.LVL247
+	.4byte	.LVL248-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL248-1
+	.4byte	.LVL248
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL248
+	.4byte	.LVL250
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL250
+	.4byte	.LFE275
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST93:
+	.4byte	.LVL264
+	.4byte	.LVL266
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL267
+	.4byte	.LFE285
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST94:
+	.4byte	.LVL265
+	.4byte	.LVL266
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL267
+	.4byte	.LFE285
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST120:
+	.4byte	.LVL485
+	.4byte	.LVL487-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL487-1
+	.4byte	.LFE300
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST121:
+	.4byte	.LVL486
+	.4byte	.LVL487-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL487-1
+	.4byte	.LVL487
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST238:
+	.4byte	.LVL916
+	.4byte	.LVL920
+	.2byte	0x7
+	.byte	0xa
+	.2byte	0x800
+	.byte	0x75
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL921
+	.4byte	.LVL922
+	.2byte	0x7
+	.byte	0xa
+	.2byte	0x801
+	.byte	0x75
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL922
+	.4byte	.LVL923
+	.2byte	0x7
+	.byte	0xa
+	.2byte	0x800
+	.byte	0x75
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST280:
+	.4byte	.LVL1139
+	.4byte	.LVL1141
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1141
+	.4byte	.LVL1149
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1149
+	.4byte	.LFE346
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST281:
+	.4byte	.LVL1140
+	.4byte	.LVL1142
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST301:
+	.4byte	.LVL1224
+	.4byte	.LVL1225
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1225
+	.4byte	.LFE320
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST302:
+	.4byte	.LVL1225
+	.4byte	.LVL1226
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1227
+	.4byte	.LVL1231
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1231
+	.4byte	.LVL1232
+	.2byte	0x3
+	.byte	0x76
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1233
+	.4byte	.LFE320
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST303:
+	.4byte	.LVL1230
+	.4byte	.LVL1237
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1237
+	.4byte	.LVL1238
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1238
+	.4byte	.LVL1239
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1240
+	.4byte	.LFE320
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST304:
+	.4byte	.LVL1236
+	.4byte	.LVL1238
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1240
+	.4byte	.LVL1241
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1242
+	.4byte	.LFE320
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST305:
+	.4byte	.LVL1243
+	.4byte	.LVL1245
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1245
+	.4byte	.LVL1251
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1251
+	.4byte	.LVL1252
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1252
+	.4byte	.LVL1253
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1253
+	.4byte	.LVL1254-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1254-1
+	.4byte	.LFE304
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST306:
+	.4byte	.LVL1244
+	.4byte	.LVL1251
+	.2byte	0x1
+	.byte	0x54
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+	.4byte	.LVL1266
+	.4byte	.LVL1267-1
+	.2byte	0x9
+	.byte	0x3
+	.4byte	g_MaxLpn
+	.byte	0x6
+	.byte	0x31
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL1267-1
+	.4byte	.LVL1271
+	.2byte	0x1
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+	.4byte	.LVL1272
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+	.2byte	0x1
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+	.4byte	0
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+	.4byte	.LVL1266
+	.4byte	.LVL1267-1
+	.2byte	0xe
+	.byte	0x3
+	.4byte	c_ftl_nand_planes_num
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x32
+	.byte	0x24
+	.byte	0x9f
+	.4byte	.LVL1267-1
+	.4byte	.LVL1270
+	.2byte	0x9
+	.byte	0x78
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
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+	.byte	0x24
+	.byte	0x9f
+	.4byte	.LVL1272
+	.4byte	.LVL1274
+	.2byte	0x9
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+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
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+	.4byte	.LVL1271
+	.2byte	0x1
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+	.4byte	.LVL1272
+	.4byte	.LVL1278
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+	.byte	0xf3
+	.uleb128 0x1
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+	.byte	0x9f
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+	.2byte	0x4
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+	.uleb128 0x1
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+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
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+	.byte	0x9f
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+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
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+	.byte	0x9f
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+	.2byte	0x1
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+	.byte	0xf3
+	.uleb128 0x1
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+	.byte	0x9f
+	.4byte	.LVL1810
+	.4byte	.LFE322
+	.2byte	0x1
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+	.4byte	0
+	.4byte	0
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+	.2byte	0x1
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+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
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+	.byte	0x9f
+	.4byte	.LVL1729
+	.4byte	.LVL1730-1
+	.2byte	0x1
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+	.4byte	.LVL1730-1
+	.4byte	.LVL1805
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
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+	.byte	0x9f
+	.4byte	.LVL1805
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+	.2byte	0x1
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+	.4byte	.LVL1806
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+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
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+	.4byte	.LVL1728
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL1731
+	.4byte	.LVL1804
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL1806
+	.4byte	.LFE322
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL1715
+	.4byte	.LVL1728
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1731
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+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1745
+	.4byte	.LVL1750
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1750
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+	.2byte	0x1
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+	.4byte	.LVL1751
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+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
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+	.2byte	0x1
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+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
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+	.2byte	0x1
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+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1810
+	.4byte	.LFE322
+	.2byte	0x1
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+	.4byte	0
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+	.4byte	.LVL1786
+	.4byte	.LVL1789
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL1781
+	.2byte	0x2
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+	.sleb128 -56
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+	.4byte	.LVL1782
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+	.sleb128 -56
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+	.byte	0x2
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+	.uleb128 0x1
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+	.2byte	0x2
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+	.sleb128 -56
+	.4byte	0
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+	.2byte	0x1
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+	.4byte	.LVL1776
+	.4byte	.LVL1777
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1777
+	.4byte	.LVL1778-1
+	.2byte	0x1
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+	.4byte	.LVL1778
+	.4byte	.LVL1779
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
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+	.2byte	0x2
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+	.sleb128 -60
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+	.4byte	.LVL1795
+	.2byte	0x7
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+	.sleb128 -60
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+	.uleb128 0x1
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+	.4byte	0
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+	.2byte	0x3
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+	.sleb128 -68
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+	.2byte	0x3
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+	.sleb128 -68
+	.4byte	0
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+	.4byte	.LVL1775
+	.2byte	0x1
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+	.4byte	.LVL1775
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+	.2byte	0x2
+	.byte	0x71
+	.sleb128 0
+	.4byte	0
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+	.4byte	.LVL1804
+	.2byte	0x2
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+	.sleb128 -52
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL1783
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+	.2byte	0x2
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+	.sleb128 12
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+	.2byte	0x1
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+	.4byte	.LVL1785
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+	.2byte	0x2
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+	.sleb128 -64
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+	.2byte	0x1
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+	.4byte	.LVL2003
+	.4byte	.LVL2004
+	.2byte	0x6
+	.byte	0x3
+	.4byte	g_active_superblock
+	.byte	0x9f
+	.4byte	.LVL2004
+	.4byte	.LVL2010
+	.2byte	0x6
+	.byte	0x3
+	.4byte	g_buffer_superblock
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+	.section	.debug_aranges,"",%progbits
+	.4byte	0x43c
+	.2byte	0x2
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+	.byte	0x4
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+.Ldebug_line0:
+	.section	.debug_str,"MS",%progbits,1
+.LASF727:
+	.ascii	"FtlEctTblFlush\000"
+.LASF590:
+	.ascii	"gc_page_num\000"
+.LASF606:
+	.ascii	"superBlk\000"
+.LASF499:
+	.ascii	"g_gc_bad_block_temp_num\000"
+.LASF363:
+	.ascii	"all_blk_used_slc_mode\000"
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+	.ascii	"reserved\000"
+.LASF508:
+	.ascii	"g_totle_read_sector\000"
+.LASF574:
+	.ascii	"__func__\000"
+.LASF419:
+	.ascii	"c_ftl_nand_sys_blks_per_plane\000"
+.LASF732:
+	.ascii	"nSec\000"
+.LASF728:
+	.ascii	"forceFlush\000"
+.LASF107:
+	.ascii	"bootm_headers\000"
+.LASF453:
+	.ascii	"p_gc_data_buf\000"
+.LASF125:
+	.ascii	"rd_end\000"
+.LASF492:
+	.ascii	"p_gc_blk_tbl\000"
+.LASF787:
+	.ascii	"FtlFreeSysBlkQueueOut\000"
+.LASF324:
+	.ascii	"ftl_bbt_blk_header\000"
+.LASF227:
+	.ascii	"eth_device\000"
+.LASF306:
+	.ascii	"sign\000"
+.LASF832:
+	.ascii	"sctidx\000"
+.LASF669:
+	.ascii	"Ftl_load_ext_data\000"
+.LASF96:
+	.ascii	"ih_comp\000"
+.LASF608:
+	.ascii	"block\000"
+.LASF22:
+	.ascii	"_Bool\000"
+.LASF651:
+	.ascii	"min_ec\000"
+.LASF601:
+	.ascii	"req_read_temp\000"
+.LASF279:
+	.ascii	"p_spare\000"
+.LASF685:
+	.ascii	"recovery_cur_page_ver\000"
+.LASF506:
+	.ascii	"g_totle_write_page_count\000"
+.LASF245:
+	.ascii	"net_root_path\000"
+.LASF624:
+	.ascii	"lookup_ppa\000"
+.LASF817:
+	.ascii	"FtlBbmTblFlush\000"
+.LASF610:
+	.ascii	"Ftl_get_new_temp_ppa\000"
+.LASF327:
+	.ascii	"ftl_data_blk_header\000"
+.LASF284:
+	.ascii	"blk_per_plane\000"
+.LASF360:
+	.ascii	"min_erase_count\000"
+.LASF114:
+	.ascii	"fit_noffset_os\000"
+.LASF391:
+	.ascii	"des_ppa\000"
+.LASF237:
+	.ascii	"priv\000"
+.LASF777:
+	.ascii	"insert_free_list\000"
+.LASF773:
+	.ascii	"pHead\000"
+.LASF21:
+	.ascii	"___strtok\000"
+.LASF198:
+	.ascii	"UCLASS_SPI_GENERIC\000"
+.LASF477:
+	.ascii	"g_l2p_last_update_region_id\000"
+.LASF698:
+	.ascii	"ftl_sb_update_avl_pages\000"
+.LASF572:
+	.ascii	"FlashProgPages\000"
+.LASF856:
+	.ascii	"test_page_num\000"
+.LASF684:
+	.ascii	"lookup_superblock_id\000"
+.LASF420:
+	.ascii	"c_ftl_nand_init_sys_blks_per_plane\000"
+.LASF865:
+	.ascii	"FtlConstantsInit\000"
+.LASF593:
+	.ascii	"num_io\000"
+.LASF868:
+	.ascii	"FtlPrintInfo\000"
+.LASF744:
+	.ascii	"l2p_flush\000"
+.LASF378:
+	.ascii	"rear\000"
+.LASF305:
+	.ascii	"ftl_l2p_map_info\000"
+.LASF521:
+	.ascii	"g_in_swl_replace\000"
+.LASF404:
+	.ascii	"c_ftl_nand_page_pre_slc_blk\000"
+.LASF243:
+	.ascii	"net_nis_domain\000"
+.LASF764:
+	.ascii	"List_update_data_list\000"
+.LASF852:
+	.ascii	"create_first_buffer_superblock\000"
+.LASF503:
+	.ascii	"g_gc_merge_free_blk_threshold\000"
+.LASF693:
+	.ascii	"last_mlc_page_version\000"
+.LASF630:
+	.ascii	"IsBlkInGcList\000"
+.LASF235:
+	.ascii	"next\000"
+.LASF312:
+	.ascii	"pBlkVpcTbl\000"
+.LASF697:
+	.ascii	"FtlReUsePrevPpa\000"
+.LASF658:
+	.ascii	"update_multiplier_value\000"
+.LASF411:
+	.ascii	"c_ftl_nand_totle_phy_blks\000"
+.LASF874:
+	.ascii	"memcmp\000"
+.LASF421:
+	.ascii	"c_ftl_nand_max_sys_blks\000"
+.LASF577:
+	.ascii	"PhyBlk\000"
+.LASF576:
+	.ascii	"FlashReadPages\000"
+.LASF479:
+	.ascii	"p_free_data_block_list_head\000"
+.LASF148:
+	.ascii	"UCLASS_AHCI\000"
+.LASF161:
+	.ascii	"UCLASS_I2C_MUX\000"
+.LASF263:
+	.ascii	"uclass_id\000"
+.LASF598:
+	.ascii	"get_new_gc_superblock\000"
+.LASF622:
+	.ascii	"BOPS_EN\000"
+.LASF241:
+	.ascii	"net_netmask\000"
+.LASF849:
+	.ascii	"bad_block_cnt\000"
+.LASF424:
+	.ascii	"c_ftl_nand_max_data_blks\000"
+.LASF560:
+	.ascii	"pvTo\000"
+.LASF117:
+	.ascii	"fit_noffset_rd\000"
+.LASF192:
+	.ascii	"UCLASS_RTC\000"
+.LASF809:
+	.ascii	"pBbtHeader\000"
+.LASF46:
+	.ascii	"bi_memsize\000"
+.LASF47:
+	.ascii	"bi_flashstart\000"
+.LASF761:
+	.ascii	"minValidPageCount\000"
+.LASF232:
+	.ascii	"recv\000"
+.LASF122:
+	.ascii	"fit_uname_setup\000"
+.LASF199:
+	.ascii	"UCLASS_SYSCON\000"
+.LASF153:
+	.ascii	"UCLASS_DISPLAY\000"
+.LASF519:
+	.ascii	"g_max_erase_count\000"
+.LASF568:
+	.ascii	"flash_type\000"
+.LASF529:
+	.ascii	"g_recovery_ppa_tbl\000"
+.LASF71:
+	.ascii	"IRQ_STACK_START_IN\000"
+.LASF63:
+	.ascii	"bi_dram\000"
+.LASF191:
+	.ascii	"UCLASS_RKNAND\000"
+.LASF581:
+	.ascii	"die_index\000"
+.LASF804:
+	.ascii	"ver2\000"
+.LASF434:
+	.ascii	"gSysFreeQueue\000"
+.LASF159:
+	.ascii	"UCLASS_I2C_EEPROM\000"
+.LASF533:
+	.ascii	"g_nand_phy_info\000"
+.LASF555:
+	.ascii	"check_spare_buf\000"
+.LASF144:
+	.ascii	"UCLASS_PCI_EMUL\000"
+.LASF72:
+	.ascii	"fdt_header\000"
+.LASF429:
+	.ascii	"g_MaxLpn\000"
+.LASF342:
+	.ascii	"bufferPageOffset\000"
+.LASF387:
+	.ascii	"reversed\000"
+.LASF507:
+	.ascii	"g_totle_write_sector\000"
+.LASF75:
+	.ascii	"off_dt_struct\000"
+.LASF417:
+	.ascii	"c_ftl_nand_max_vendor_blks\000"
+.LASF768:
+	.ascii	"prev_valid_page_count\000"
+.LASF873:
+	.ascii	"FtlPrintInfo2buf\000"
+.LASF480:
+	.ascii	"p_data_block_list_head\000"
+.LASF265:
+	.ascii	"NETLOOP_CONTINUE\000"
+.LASF806:
+	.ascii	"P2V_plane\000"
+.LASF486:
+	.ascii	"g_gc_temp_superblock\000"
+.LASF195:
+	.ascii	"UCLASS_SPI\000"
+.LASF416:
+	.ascii	"c_ftl_nand_max_map_blks\000"
+.LASF302:
+	.ascii	"BbtMap\000"
+.LASF743:
+	.ascii	"found_lpa\000"
+.LASF209:
+	.ascii	"UCLASS_VIDEO_CONSOLE\000"
+.LASF367:
+	.ascii	"last_refresh_read_count\000"
+.LASF207:
+	.ascii	"UCLASS_VIDEO\000"
+.LASF614:
+	.ascii	"current_ppa\000"
+.LASF851:
+	.ascii	"create_first_active_superblock\000"
+.LASF313:
+	.ascii	"pMapPpnTbl\000"
+.LASF269:
+	.ascii	"net_state\000"
+.LASF724:
+	.ascii	"num_page\000"
+.LASF425:
+	.ascii	"ftl_gc_temp_power_lost_recovery_flag\000"
+.LASF613:
+	.ascii	"totle_num\000"
+.LASF731:
+	.ascii	"Index\000"
+.LASF681:
+	.ascii	"next_free_active_page\000"
+.LASF604:
+	.ascii	"spperBlk\000"
+.LASF65:
+	.ascii	"IRQ_STACK_START\000"
+.LASF132:
+	.ascii	"verify\000"
+.LASF713:
+	.ascii	"ftl_set_blk_mode\000"
+.LASF266:
+	.ascii	"NETLOOP_RESTART\000"
+.LASF270:
+	.ascii	"uint8\000"
+.LASF353:
+	.ascii	"write_page_count\000"
+.LASF609:
+	.ascii	"Ftl_gc_temp_data_write_back\000"
+.LASF295:
+	.ascii	"erase_blk\000"
+.LASF722:
+	.ascii	"re_save_vpndata\000"
+.LASF463:
+	.ascii	"p_valid_page_count_check_table\000"
+.LASF502:
+	.ascii	"g_gc_free_blk_threshold\000"
+.LASF482:
+	.ascii	"g_num_free_superblocks\000"
+.LASF226:
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+.LASF634:
+	.ascii	"FtlGcBufFree\000"
+.LASF774:
+	.ascii	"List_pop_index_node\000"
+.LASF690:
+	.ascii	"scan_completed\000"
+.LASF637:
+	.ascii	"update_vpc_list\000"
+.LASF170:
+	.ascii	"UCLASS_MMC\000"
+.LASF465:
+	.ascii	"p_map_block_table\000"
+.LASF544:
+	.ascii	"FtlUpdateVaildLpnCount\000"
+.LASF332:
+	.ascii	"res32_0\000"
+.LASF333:
+	.ascii	"res32_1\000"
+.LASF726:
+	.ascii	"FtlUpdateVaildLpn\000"
+.LASF390:
+	.ascii	"scr_ppa\000"
+.LASF162:
+	.ascii	"UCLASS_IDE\000"
+.LASF224:
+	.ascii	"save_size\000"
+.LASF78:
+	.ascii	"version\000"
+.LASF652:
+	.ascii	"pNode\000"
+.LASF638:
+	.ascii	"get_new_active_ppa\000"
+.LASF878:
+	.ascii	"kmalloc\000"
+.LASF25:
+	.ascii	"_binary_u_boot_bin_end\000"
+.LASF595:
+	.ascii	"max_gc_page_num\000"
+.LASF8:
+	.ascii	"unsigned int\000"
+.LASF712:
+	.ascii	"FtlSlcSuperblockCheck\000"
+.LASF515:
+	.ascii	"g_totle_avg_erase_count\000"
+.LASF836:
+	.ascii	"flashType\000"
+.LASF789:
+	.ascii	"FtlFreeSysBLkSort\000"
+.LASF779:
+	.ascii	"tmp_erase_count\000"
+.LASF83:
+	.ascii	"working_fdt\000"
+.LASF862:
+	.ascii	"FtlVariablesInit\000"
+.LASF392:
+	.ascii	"ftl_gc_page_buffer\000"
+.LASF239:
+	.ascii	"push_packet\000"
+.LASF708:
+	.ascii	"pMapBlkHeader\000"
+.LASF82:
+	.ascii	"size_dt_struct\000"
+.LASF473:
+	.ascii	"p_vendor_region_ppn_table\000"
+.LASF675:
+	.ascii	"make_superblock\000"
+.LASF97:
+	.ascii	"ih_name\000"
+.LASF186:
+	.ascii	"UCLASS_PWRSEQ\000"
+.LASF337:
+	.ascii	"bufferFlashMode\000"
+.LASF6:
+	.ascii	"short int\000"
+.LASF837:
+	.ascii	"FtlRead\000"
+.LASF74:
+	.ascii	"totalsize\000"
+.LASF757:
+	.ascii	"ftl_map_blk_alloc_new_blk\000"
+.LASF385:
+	.ascii	"check_en\000"
+.LASF442:
+	.ascii	"req_gc_dst\000"
+.LASF374:
+	.ascii	"prev\000"
+.LASF423:
+	.ascii	"c_ftl_nand_data_op_blks_per_plane\000"
+.LASF650:
+	.ascii	"min_ec_id\000"
+.LASF388:
+	.ascii	"phyBlk\000"
+.LASF260:
+	.ascii	"net_boot_file_size\000"
+.LASF412:
+	.ascii	"c_ftl_nand_map_region_num\000"
+.LASF665:
+	.ascii	"FtlVpcCheckAndModify\000"
+.LASF127:
+	.ascii	"ft_len\000"
+.LASF188:
+	.ascii	"UCLASS_REGULATOR\000"
+.LASF311:
+	.ascii	"pBlkVerTbl\000"
+.LASF489:
+	.ascii	"g_sys_save_data\000"
+.LASF124:
+	.ascii	"rd_start\000"
diff --git a/drivers/rkflash/rk_sftl_arm_v8.S b/drivers/rkflash/rk_sftl_arm_v8.S
new file mode 100644
index 0000000000..ada1fa1a49
--- /dev/null
+++ b/drivers/rkflash/rk_sftl_arm_v8.S
@@ -0,0 +1,55428 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+	.arch armv8-a+nosimd
+	.file	"rk_sftl.c"
+	.text
+.Ltext0:
+	.cfi_sections	.debug_frame
+	.section	.text.l2p_addr_tran.isra.0,"ax",@progbits
+	.align	2
+	.type	l2p_addr_tran.isra.0, %function
+l2p_addr_tran.isra.0:
+.LFB348:
+	.file 1 "drivers/rkflash/rksftl/sftl_flash.c"
+	.loc 1 54 0
+	.cfi_startproc
+.LVL0:
+	.loc 1 62 0
+	adrp	x4, .LANCHOR0
+	add	x4, x4, :lo12:.LANCHOR0
+	ldrh	w3, [x4, 8]
+.LVL1:
+	.loc 1 63 0
+	ldrh	w6, [x4, 10]
+.LVL2:
+	.loc 1 64 0
+	ldrh	w4, [x4, 14]
+	cmp	w4, 4
+	bne	.L2
+	.loc 1 65 0
+	lsr	w3, w3, 1
+.LVL3:
+	.loc 1 66 0
+	ubfiz	w6, w6, 1, 15
+.LVL4:
+.L2:
+	.loc 1 70 0
+	lsr	w5, w0, 10
+.LVL5:
+	.loc 1 74 0
+	and	w0, w0, 1023
+.LVL6:
+	.loc 1 71 0
+	and	w4, w5, 65535
+	.loc 1 72 0
+	and	w5, w5, 65535
+.LVL7:
+	.loc 1 71 0
+	udiv	w4, w4, w3
+.LVL8:
+	.loc 1 72 0
+	msub	w3, w3, w4, w5
+.LVL9:
+	.loc 1 74 0
+	madd	w3, w3, w6, w0
+	.loc 1 78 0
+	mov	w0, 0
+	.loc 1 74 0
+	str	w3, [x1]
+	.loc 1 75 0
+	str	w4, [x2]
+	.loc 1 78 0
+	ret
+	.cfi_endproc
+.LFE348:
+	.size	l2p_addr_tran.isra.0, .-l2p_addr_tran.isra.0
+	.section	.text.ftl_set_blk_mode.part.7,"ax",@progbits
+	.align	2
+	.type	ftl_set_blk_mode.part.7, %function
+ftl_set_blk_mode.part.7:
+.LFB355:
+	.file 2 "drivers/rkflash/rksftl/sftl_sys.c"
+	.loc 2 1346 0
+	.cfi_startproc
+.LVL10:
+	.loc 2 1346 0
+	and	w0, w0, 65535
+	.loc 2 1349 0
+	adrp	x2, .LANCHOR1
+	ubfx	x1, x0, 5, 11
+	ldr	x3, [x2, #:lo12:.LANCHOR1]
+	lsl	x1, x1, 2
+	mov	w2, 1
+	lsl	w2, w2, w0
+	ldr	w0, [x3, x1]
+.LVL11:
+	orr	w0, w0, w2
+	str	w0, [x3, x1]
+	ret
+	.cfi_endproc
+.LFE355:
+	.size	ftl_set_blk_mode.part.7, .-ftl_set_blk_mode.part.7
+	.section	.text.Ftl_log2,"ax",@progbits
+	.align	2
+	.global	Ftl_log2
+	.type	Ftl_log2, %function
+Ftl_log2:
+.LFB202:
+	.file 3 "drivers/rkflash/rksftl/sftl_plat.c"
+	.loc 3 128 0
+	.cfi_startproc
+.LVL12:
+	.loc 3 130 0
+	mov	w2, 1
+	.loc 3 132 0
+	mov	w1, 0
+.LVL13:
+.L5:
+	.loc 3 132 0 is_stmt 0 discriminator 1
+	cmp	w2, w0
+	bls	.L6
+.LVL14:
+	.loc 3 134 0 is_stmt 1
+	sub	w0, w1, #1
+.LVL15:
+	.loc 3 136 0
+	ret
+.LVL16:
+.L6:
+	.loc 3 132 0 discriminator 3
+	add	w1, w1, 1
+.LVL17:
+	.loc 3 133 0 discriminator 3
+	lsl	w2, w2, 1
+.LVL18:
+	.loc 3 132 0 discriminator 3
+	and	w1, w1, 65535
+.LVL19:
+	b	.L5
+	.cfi_endproc
+.LFE202:
+	.size	Ftl_log2, .-Ftl_log2
+	.section	.text.FtlPrintInfo,"ax",@progbits
+	.align	2
+	.global	FtlPrintInfo
+	.type	FtlPrintInfo, %function
+FtlPrintInfo:
+.LFB203:
+	.loc 3 159 0
+	.cfi_startproc
+.LVL20:
+	ret
+	.cfi_endproc
+.LFE203:
+	.size	FtlPrintInfo, .-FtlPrintInfo
+	.section	.text.FtlSysBlkNumInit,"ax",@progbits
+	.align	2
+	.global	FtlSysBlkNumInit
+	.type	FtlSysBlkNumInit, %function
+FtlSysBlkNumInit:
+.LFB204:
+	.loc 3 165 0
+	.cfi_startproc
+.LVL21:
+	.loc 3 165 0
+	and	w0, w0, 65535
+	mov	w1, 24
+	cmp	w0, 24
+	.loc 3 169 0
+	adrp	x2, .LANCHOR4
+	csel	w0, w0, w1, cs
+.LVL22:
+	.loc 3 168 0
+	adrp	x1, .LANCHOR2
+	and	w0, w0, 65535
+.LVL23:
+	str	w0, [x1, #:lo12:.LANCHOR2]
+	.loc 3 169 0
+	adrp	x1, .LANCHOR3
+	ldrh	w1, [x1, #:lo12:.LANCHOR3]
+	mul	w1, w1, w0
+	str	w1, [x2, #:lo12:.LANCHOR4]
+	.loc 3 170 0
+	adrp	x2, .LANCHOR6
+	ldrh	w2, [x2, #:lo12:.LANCHOR6]
+	sub	w0, w2, w0
+.LVL24:
+	adrp	x2, .LANCHOR5
+	strh	w0, [x2, #:lo12:.LANCHOR5]
+	.loc 3 171 0
+	adrp	x0, .LANCHOR8
+	ldr	w0, [x0, #:lo12:.LANCHOR8]
+	sub	w1, w0, w1
+	adrp	x0, .LANCHOR7
+	str	w1, [x0, #:lo12:.LANCHOR7]
+	.loc 3 174 0
+	mov	w0, 0
+	ret
+	.cfi_endproc
+.LFE204:
+	.size	FtlSysBlkNumInit, .-FtlSysBlkNumInit
+	.section	.text.FtlConstantsInit,"ax",@progbits
+	.align	2
+	.global	FtlConstantsInit
+	.type	FtlConstantsInit, %function
+FtlConstantsInit:
+.LFB205:
+	.loc 3 183 0
+	.cfi_startproc
+.LVL25:
+	stp	x29, x30, [sp, -16]!
+	.cfi_def_cfa_offset 16
+	.cfi_offset 29, -16
+	.cfi_offset 30, -8
+	mov	x5, x0
+	.loc 3 190 0
+	adrp	x1, .LANCHOR11
+	.loc 3 183 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 3 188 0
+	ldrh	w2, [x0]
+	adrp	x0, .LANCHOR9
+.LVL26:
+	.loc 3 189 0
+	ldrh	w4, [x5, 2]
+	.loc 3 188 0
+	strh	w2, [x0, #:lo12:.LANCHOR9]
+	.loc 3 189 0
+	adrp	x0, .LANCHOR10
+	strh	w4, [x0, #:lo12:.LANCHOR10]
+	.loc 3 190 0
+	ldrh	w0, [x5, 4]
+	strh	w0, [x1, #:lo12:.LANCHOR11]
+	.loc 3 191 0
+	ldrh	w1, [x5, 14]
+	cmp	w1, 4
+	bne	.L10
+	.loc 3 192 0
+	ldrh	w1, [x5, 6]
+	adrp	x3, .LANCHOR6
+	lsr	w1, w1, 1
+	strh	w1, [x3, #:lo12:.LANCHOR6]
+	.loc 3 193 0
+	adrp	x1, .LANCHOR12
+	mov	w3, 8
+	strh	w3, [x1, #:lo12:.LANCHOR12]
+.L10:
+	.loc 3 197 0 discriminator 3
+	adrp	x3, .LANCHOR13
+	add	x3, x3, :lo12:.LANCHOR13
+	.loc 3 183 0 discriminator 3
+	mov	x1, 0
+.L11:
+.LVL27:
+	.loc 3 197 0 discriminator 3
+	strb	w1, [x1, x3]
+.LVL28:
+	add	x1, x1, 1
+.LVL29:
+	.loc 3 196 0 discriminator 3
+	cmp	x1, 32
+	bne	.L11
+	.loc 3 198 0
+	adrp	x1, .LANCHOR14
+	mov	w3, 5
+	.loc 3 200 0
+	cmp	w2, 1
+	.loc 3 198 0
+	strh	w3, [x1, #:lo12:.LANCHOR14]
+	.loc 3 199 0
+	adrp	x3, .LANCHOR15
+	strh	wzr, [x3, #:lo12:.LANCHOR15]
+	.loc 3 200 0
+	bne	.L12
+	.loc 3 201 0
+	strh	w2, [x1, #:lo12:.LANCHOR14]
+.L12:
+	.loc 3 202 0
+	adrp	x1, .LANCHOR16
+	mov	w2, 640
+	.loc 3 204 0
+	mul	w4, w4, w0
+	.loc 3 202 0
+	strh	w2, [x1, #:lo12:.LANCHOR16]
+	.loc 3 204 0
+	adrp	x1, .LANCHOR3
+	and	w4, w4, 65535
+	strh	w4, [x1, #:lo12:.LANCHOR3]
+	.loc 3 205 0
+	adrp	x1, .LANCHOR6
+	ldrh	w3, [x1, #:lo12:.LANCHOR6]
+	adrp	x1, .LANCHOR17
+	mul	w0, w0, w3
+	and	w0, w0, 65535
+	strh	w0, [x1, #:lo12:.LANCHOR17]
+	.loc 3 206 0
+	bl	Ftl_log2
+.LVL30:
+	.loc 3 207 0
+	ldrh	w7, [x5, 12]
+	.loc 3 206 0
+	adrp	x1, .LANCHOR18
+	.loc 3 207 0
+	adrp	x8, .LANCHOR19
+	.loc 3 206 0
+	strh	w0, [x1, #:lo12:.LANCHOR18]
+	.loc 3 208 0
+	adrp	x0, .LANCHOR20
+	.loc 3 209 0
+	mul	w1, w4, w7
+	.loc 3 207 0
+	strh	w7, [x8, #:lo12:.LANCHOR19]
+	.loc 3 208 0
+	strh	w7, [x0, #:lo12:.LANCHOR20]
+	.loc 3 209 0
+	adrp	x0, .LANCHOR21
+	strh	w1, [x0, #:lo12:.LANCHOR21]
+	.loc 3 210 0
+	adrp	x0, .LANCHOR12
+	ldrh	w6, [x0, #:lo12:.LANCHOR12]
+	mov	w0, w6
+	bl	Ftl_log2
+.LVL31:
+	and	w1, w0, 65535
+	adrp	x2, .LANCHOR22
+	.loc 3 212 0
+	adrp	x10, .LANCHOR23
+	.loc 3 214 0
+	ldrh	w5, [x5, 20]
+.LVL32:
+	.loc 3 210 0
+	strh	w0, [x2, #:lo12:.LANCHOR22]
+	.loc 3 212 0
+	ubfiz	w0, w6, 9, 7
+	strh	w0, [x10, #:lo12:.LANCHOR23]
+	.loc 3 213 0
+	adrp	x10, .LANCHOR24
+	ubfx	w0, w0, 8, 8
+	strh	w0, [x10, #:lo12:.LANCHOR24]
+	.loc 3 214 0
+	adrp	x0, .LANCHOR25
+	strh	w5, [x0, #:lo12:.LANCHOR25]
+	.loc 3 216 0
+	mul	w0, w4, w3
+	adrp	x5, .LANCHOR8
+	str	w0, [x5, #:lo12:.LANCHOR8]
+	.loc 3 217 0
+	adrp	x5, .LANCHOR26
+	mul	w0, w0, w6
+	.loc 3 218 0
+	mul	w6, w6, w7
+	.loc 3 217 0
+	mul	w0, w0, w7
+	mov	x7, x2
+	asr	w0, w0, 11
+	str	w0, [x5, #:lo12:.LANCHOR26]
+	.loc 3 218 0
+	mov	w0, 5120
+	adrp	x5, .LANCHOR27
+	sdiv	w0, w0, w6
+	and	w0, w0, 65535
+	.loc 3 219 0
+	cmp	w0, 4
+	bls	.L13
+.L19:
+	.loc 3 220 0
+	strh	w0, [x5, #:lo12:.LANCHOR27]
+	.loc 3 221 0
+	adrp	x2, .LANCHOR28
+	mov	w0, 640
+	.loc 3 223 0
+	lsl	w3, w3, 6
+	.loc 3 221 0
+	asr	w0, w0, w1
+	add	w0, w0, 2
+	.loc 3 223 0
+	add	w1, w1, 9
+	.loc 3 221 0
+	strh	w0, [x2, #:lo12:.LANCHOR28]
+	.loc 3 223 0
+	adrp	x0, .LANCHOR29
+	.loc 3 227 0
+	cmp	w4, 1
+	.loc 3 223 0
+	asr	w3, w3, w1
+	.loc 3 224 0
+	adrp	x1, .LANCHOR30
+	.loc 3 223 0
+	strh	w3, [x0, #:lo12:.LANCHOR29]
+	and	w3, w3, 65535
+	adrp	x6, .LANCHOR2
+	.loc 3 224 0
+	mul	w0, w3, w4
+	.loc 3 226 0
+	add	w3, w3, 8
+	.loc 3 224 0
+	str	w0, [x1, #:lo12:.LANCHOR30]
+	.loc 3 226 0
+	ldrh	w0, [x5, #:lo12:.LANCHOR27]
+	udiv	w0, w0, w4
+	mov	x4, x1
+	add	w3, w0, w3
+	.loc 3 227 0
+	beq	.L15
+.L20:
+	.loc 3 228 0
+	str	w3, [x6, #:lo12:.LANCHOR2]
+	.loc 3 231 0
+	ldrh	w0, [x6, #:lo12:.LANCHOR2]
+	bl	FtlSysBlkNumInit
+.LVL33:
+	.loc 3 232 0
+	ldr	w1, [x6, #:lo12:.LANCHOR2]
+	adrp	x0, .LANCHOR31
+	.loc 3 263 0
+	ldp	x29, x30, [sp], 16
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+	.loc 3 232 0
+	str	w1, [x0, #:lo12:.LANCHOR31]
+	.loc 3 234 0
+	adrp	x0, .LANCHOR7
+	ldrh	w1, [x8, #:lo12:.LANCHOR19]
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	lsl	w0, w0, 2
+	mul	w0, w0, w1
+	ldrh	w1, [x7, #:lo12:.LANCHOR22]
+	add	w1, w1, 9
+	lsr	w0, w0, w1
+	adrp	x1, .LANCHOR32
+	add	w0, w0, 2
+	strh	w0, [x1, #:lo12:.LANCHOR32]
+	.loc 3 235 0
+	adrp	x0, .LANCHOR33
+	mov	w1, 32
+	strh	w1, [x0, #:lo12:.LANCHOR33]
+	.loc 3 236 0
+	adrp	x0, .LANCHOR34
+	str	wzr, [x0, #:lo12:.LANCHOR34]
+	.loc 3 237 0
+	ldrh	w0, [x5, #:lo12:.LANCHOR27]
+	add	w0, w0, 3
+	strh	w0, [x5, #:lo12:.LANCHOR27]
+	.loc 3 238 0
+	ldr	w0, [x4, #:lo12:.LANCHOR30]
+	add	w0, w0, 3
+	str	w0, [x4, #:lo12:.LANCHOR30]
+	.loc 3 263 0
+	mov	w0, 0
+	ret
+.L13:
+	.cfi_restore_state
+	.loc 3 220 0
+	mov	w0, 4
+	b	.L19
+.L15:
+	.loc 3 228 0
+	add	w3, w3, 4
+	b	.L20
+	.cfi_endproc
+.LFE205:
+	.size	FtlConstantsInit, .-FtlConstantsInit
+	.section	.text.IsBlkInVendorPart,"ax",@progbits
+	.align	2
+	.global	IsBlkInVendorPart
+	.type	IsBlkInVendorPart, %function
+IsBlkInVendorPart:
+.LFB208:
+	.loc 3 514 0
+	.cfi_startproc
+.LVL34:
+	.loc 3 517 0
+	adrp	x1, .LANCHOR35
+	.loc 3 514 0
+	and	w0, w0, 65535
+	.loc 3 517 0
+	ldrh	w1, [x1, #:lo12:.LANCHOR35]
+	cbz	w1, .L25
+.LBB164:
+.LBB165:
+	.loc 3 518 0
+	adrp	x1, .LANCHOR27
+	ldrh	w2, [x1, #:lo12:.LANCHOR27]
+	.loc 3 519 0
+	adrp	x1, .LANCHOR36
+	ldr	x3, [x1, #:lo12:.LANCHOR36]
+	mov	x1, 0
+.L23:
+.LVL35:
+	.loc 3 518 0
+	cmp	w2, w1, uxth
+	bhi	.L24
+.LVL36:
+.L25:
+.LBE165:
+.LBE164:
+	.loc 3 524 0
+	mov	w0, 0
+.LVL37:
+	ret
+.LVL38:
+.L24:
+	add	x1, x1, 1
+.LVL39:
+.LBB167:
+.LBB166:
+	.loc 3 519 0
+	add	x4, x3, x1, lsl 1
+	ldrh	w4, [x4, -2]
+	cmp	w4, w0
+	bne	.L23
+	.loc 3 520 0
+	mov	w0, 1
+.LBE166:
+.LBE167:
+	.loc 3 525 0
+	ret
+	.cfi_endproc
+.LFE208:
+	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
+	.section	.text.sftl_get_density,"ax",@progbits
+	.align	2
+	.global	sftl_get_density
+	.type	sftl_get_density, %function
+sftl_get_density:
+.LFB221:
+	.loc 3 1215 0
+	.cfi_startproc
+	.loc 3 1217 0
+	adrp	x0, .LANCHOR34
+	ldr	w0, [x0, #:lo12:.LANCHOR34]
+	ret
+	.cfi_endproc
+.LFE221:
+	.size	sftl_get_density, .-sftl_get_density
+	.section	.text.FtlBbmMapBadBlock,"ax",@progbits
+	.align	2
+	.global	FtlBbmMapBadBlock
+	.type	FtlBbmMapBadBlock, %function
+FtlBbmMapBadBlock:
+.LFB222:
+	.file 4 "drivers/rkflash/rksftl/sftl_bbm.c"
+	.loc 4 5 0
+	.cfi_startproc
+.LVL40:
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	and	w1, w0, 65535
+	.loc 4 10 0
+	adrp	x0, .LANCHOR17
+.LVL41:
+	.loc 4 15 0
+	mov	w4, 1
+	.loc 4 5 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 4 10 0
+	ldrh	w0, [x0, #:lo12:.LANCHOR17]
+	.loc 4 5 0
+	str	x19, [sp, 16]
+	.cfi_offset 19, -16
+	.loc 4 13 0
+	adrp	x19, .LANCHOR37
+	add	x19, x19, :lo12:.LANCHOR37
+	.loc 4 10 0
+	udiv	w3, w1, w0
+	and	w2, w3, 65535
+.LVL42:
+	msub	w3, w3, w0, w1
+	.loc 4 13 0
+	add	x0, x19, x2, uxth 3
+	and	w3, w3, 65535
+.LVL43:
+	.loc 4 15 0
+	ldr	x0, [x0, 32]
+	ubfx	x5, x3, 5, 11
+	lsl	x5, x5, 2
+	lsl	w4, w4, w3
+	ldr	w6, [x0, x5]
+	orr	w4, w4, w6
+	str	w4, [x0, x5]
+	.loc 4 16 0
+	adrp	x0, .LC0
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.LVL44:
+	.loc 4 17 0
+	ldrh	w0, [x19, 6]
+	add	w0, w0, 1
+	strh	w0, [x19, 6]
+	.loc 4 19 0
+	mov	w0, 0
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE222:
+	.size	FtlBbmMapBadBlock, .-FtlBbmMapBadBlock
+	.section	.text.FtlBbmIsBadBlock,"ax",@progbits
+	.align	2
+	.global	FtlBbmIsBadBlock
+	.type	FtlBbmIsBadBlock, %function
+FtlBbmIsBadBlock:
+.LFB223:
+	.loc 4 24 0
+	.cfi_startproc
+.LVL45:
+	.loc 4 30 0
+	adrp	x1, .LANCHOR17
+	.loc 4 24 0
+	and	w0, w0, 65535
+	.loc 4 30 0
+	ldrh	w1, [x1, #:lo12:.LANCHOR17]
+.LVL46:
+	.loc 4 31 0
+	udiv	w2, w0, w1
+	msub	w0, w2, w1, w0
+.LVL47:
+	.loc 4 33 0
+	adrp	x1, .LANCHOR37
+.LVL48:
+	add	x1, x1, :lo12:.LANCHOR37
+	add	x2, x1, x2, uxth 3
+	.loc 4 31 0
+	and	w0, w0, 65535
+.LVL49:
+	.loc 4 34 0
+	ubfx	x3, x0, 5, 11
+	ldr	x1, [x2, 32]
+	ldr	w1, [x1, x3, lsl 2]
+	lsr	w0, w1, w0
+.LVL50:
+	.loc 4 36 0
+	and	w0, w0, 1
+	ret
+	.cfi_endproc
+.LFE223:
+	.size	FtlBbmIsBadBlock, .-FtlBbmIsBadBlock
+	.section	.text.FtlBbtInfoPrint,"ax",@progbits
+	.align	2
+	.global	FtlBbtInfoPrint
+	.type	FtlBbtInfoPrint, %function
+FtlBbtInfoPrint:
+.LFB224:
+	.loc 4 39 0
+	.cfi_startproc
+	ret
+	.cfi_endproc
+.LFE224:
+	.size	FtlBbtInfoPrint, .-FtlBbtInfoPrint
+	.section	.text.FtlBbtCalcTotleCnt,"ax",@progbits
+	.align	2
+	.global	FtlBbtCalcTotleCnt
+	.type	FtlBbtCalcTotleCnt, %function
+FtlBbtCalcTotleCnt:
+.LFB228:
+	.loc 4 157 0
+	.cfi_startproc
+.LVL51:
+	.loc 4 160 0
+	adrp	x0, .LANCHOR17
+	mov	w4, 0
+	.loc 4 159 0
+	mov	w5, 0
+.LVL52:
+	.loc 4 160 0
+	ldrh	w6, [x0, #:lo12:.LANCHOR17]
+	adrp	x0, .LANCHOR10
+	ldrh	w0, [x0, #:lo12:.LANCHOR10]
+	mul	w6, w6, w0
+	cmp	w4, w6
+	blt	.L42
+	.loc 4 169 0
+	mov	w0, w5
+	ret
+.L42:
+	.loc 4 157 0
+	stp	x29, x30, [sp, -16]!
+	.cfi_def_cfa_offset 16
+	.cfi_offset 29, -16
+	.cfi_offset 30, -8
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+.L35:
+	.loc 4 162 0
+	mov	w0, w4
+	bl	FtlBbmIsBadBlock
+.LVL53:
+	cbz	w0, .L34
+	.loc 4 164 0
+	add	w5, w5, 1
+.LVL54:
+	and	w5, w5, 65535
+.LVL55:
+.L34:
+	.loc 4 160 0 discriminator 2
+	add	w4, w4, 1
+.LVL56:
+	and	w4, w4, 65535
+.LVL57:
+	cmp	w4, w6
+	blt	.L35
+	.loc 4 169 0
+	mov	w0, w5
+	ldp	x29, x30, [sp], 16
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE228:
+	.size	FtlBbtCalcTotleCnt, .-FtlBbtCalcTotleCnt
+	.section	.text.V2P_block,"ax",@progbits
+	.align	2
+	.global	V2P_block
+	.type	V2P_block, %function
+V2P_block:
+.LFB232:
+	.loc 2 5 0
+	.cfi_startproc
+.LVL58:
+	.loc 2 8 0
+	adrp	x2, .LANCHOR11
+	.loc 2 5 0
+	and	w0, w0, 65535
+	.loc 2 8 0
+	adrp	x4, .LANCHOR17
+	.loc 2 5 0
+	and	w1, w1, 65535
+	.loc 2 8 0
+	ldrh	w2, [x2, #:lo12:.LANCHOR11]
+.LVL59:
+	ldrh	w4, [x4, #:lo12:.LANCHOR17]
+	udiv	w3, w0, w2
+	msub	w0, w3, w2, w0
+.LVL60:
+	madd	w2, w2, w1, w0
+.LVL61:
+	madd	w0, w3, w4, w2
+	.loc 2 10 0
+	ret
+	.cfi_endproc
+.LFE232:
+	.size	V2P_block, .-V2P_block
+	.section	.text.P2V_plane,"ax",@progbits
+	.align	2
+	.global	P2V_plane
+	.type	P2V_plane, %function
+P2V_plane:
+.LFB233:
+	.loc 2 13 0
+	.cfi_startproc
+.LVL62:
+	.loc 2 13 0
+	and	w3, w0, 65535
+	.loc 2 16 0
+	adrp	x0, .LANCHOR11
+.LVL63:
+	ldrh	w1, [x0, #:lo12:.LANCHOR11]
+.LVL64:
+	adrp	x0, .LANCHOR17
+	ldrh	w2, [x0, #:lo12:.LANCHOR17]
+	udiv	w0, w3, w1
+	udiv	w2, w3, w2
+	msub	w0, w0, w1, w3
+	madd	w0, w1, w2, w0
+	.loc 2 18 0
+	ret
+	.cfi_endproc
+.LFE233:
+	.size	P2V_plane, .-P2V_plane
+	.section	.text.P2V_block_in_plane,"ax",@progbits
+	.align	2
+	.global	P2V_block_in_plane
+	.type	P2V_block_in_plane, %function
+P2V_block_in_plane:
+.LFB234:
+	.loc 2 21 0
+	.cfi_startproc
+.LVL65:
+	.loc 2 21 0
+	and	w2, w0, 65535
+	.loc 2 24 0
+	adrp	x0, .LANCHOR17
+.LVL66:
+	ldrh	w1, [x0, #:lo12:.LANCHOR17]
+	udiv	w0, w2, w1
+	msub	w0, w0, w1, w2
+	.loc 2 25 0
+	adrp	x1, .LANCHOR11
+	ldrh	w1, [x1, #:lo12:.LANCHOR11]
+	.loc 2 24 0
+	and	w0, w0, 65535
+.LVL67:
+	.loc 2 27 0
+	udiv	w0, w0, w1
+.LVL68:
+	ret
+	.cfi_endproc
+.LFE234:
+	.size	P2V_block_in_plane, .-P2V_block_in_plane
+	.section	.text.ftl_cmp_data_ver,"ax",@progbits
+	.align	2
+	.global	ftl_cmp_data_ver
+	.type	ftl_cmp_data_ver, %function
+ftl_cmp_data_ver:
+.LFB235:
+	.loc 2 31 0
+	.cfi_startproc
+.LVL69:
+	.loc 2 34 0
+	cmp	w0, w1
+	mov	w2, -2147483648
+	bls	.L47
+	.loc 2 36 0
+	sub	w1, w0, w1
+.LVL70:
+	cmp	w1, w2
+	cset	w0, ls
+.LVL71:
+	ret
+.LVL72:
+.L47:
+	.loc 2 40 0
+	sub	w1, w1, w0
+.LVL73:
+	cmp	w1, w2
+	cset	w0, hi
+.LVL74:
+	.loc 2 44 0
+	ret
+	.cfi_endproc
+.LFE235:
+	.size	ftl_cmp_data_ver, .-ftl_cmp_data_ver
+	.section	.text.FtlFreeSysBlkQueueEmpty,"ax",@progbits
+	.align	2
+	.global	FtlFreeSysBlkQueueEmpty
+	.type	FtlFreeSysBlkQueueEmpty, %function
+FtlFreeSysBlkQueueEmpty:
+.LFB238:
+	.loc 2 88 0
+	.cfi_startproc
+	.loc 2 89 0
+	adrp	x0, .LANCHOR38+6
+	ldrh	w0, [x0, #:lo12:.LANCHOR38+6]
+	cmp	w0, 0
+	.loc 2 90 0
+	cset	w0, eq
+	ret
+	.cfi_endproc
+.LFE238:
+	.size	FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty
+	.section	.text.FtlFreeSysBlkQueueFull,"ax",@progbits
+	.align	2
+	.global	FtlFreeSysBlkQueueFull
+	.type	FtlFreeSysBlkQueueFull, %function
+FtlFreeSysBlkQueueFull:
+.LFB239:
+	.loc 2 93 0
+	.cfi_startproc
+	.loc 2 94 0
+	adrp	x0, .LANCHOR38+6
+	ldrh	w0, [x0, #:lo12:.LANCHOR38+6]
+	cmp	w0, 1024
+	.loc 2 95 0
+	cset	w0, eq
+	ret
+	.cfi_endproc
+.LFE239:
+	.size	FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull
+	.section	.text.FtlFreeSysBLkSort,"ax",@progbits
+	.align	2
+	.global	FtlFreeSysBLkSort
+	.type	FtlFreeSysBLkSort, %function
+FtlFreeSysBLkSort:
+.LFB241:
+	.loc 2 116 0
+	.cfi_startproc
+.LVL75:
+	stp	x29, x30, [sp, -16]!
+	.cfi_def_cfa_offset 16
+	.cfi_offset 29, -16
+	.cfi_offset 30, -8
+	.loc 2 123 0
+	adrp	x2, .LANCHOR38
+	.loc 2 125 0
+	adrp	x1, .LANCHOR39
+	.loc 2 123 0
+	add	x0, x2, :lo12:.LANCHOR38
+	.loc 2 116 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 2 125 0
+	ldr	x3, [x1, #:lo12:.LANCHOR39]
+	adrp	x1, .LANCHOR40
+	.loc 2 124 0
+	ldrh	w8, [x0, 2]
+	mov	x4, x2
+	.loc 2 123 0
+	ldrh	w7, [x0, 6]
+	.loc 2 124 0
+	mov	x6, x0
+	.loc 2 125 0
+	ldr	x10, [x1, #:lo12:.LANCHOR40]
+	.loc 2 124 0
+	and	x11, x8, 65535
+	.loc 2 123 0
+	mov	x5, 0
+.LVL76:
+.L52:
+	.loc 2 123 0 is_stmt 0 discriminator 1
+	cmp	w7, w5, uxth
+	bhi	.L53
+	.loc 2 128 0 is_stmt 1
+	sub	w10, w7, #1
+	.loc 2 139 0
+	add	x2, x4, :lo12:.LANCHOR38
+	mov	w0, 0
+.LVL77:
+.L54:
+	.loc 2 128 0 discriminator 1
+	cmp	w0, w10
+	blt	.L59
+	.loc 2 144 0
+	ldp	x29, x30, [sp], 16
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+	ret
+.LVL78:
+.L53:
+	.cfi_restore_state
+	.loc 2 124 0 discriminator 3
+	add	x0, x11, x5
+	add	x0, x6, x0, lsl 1
+	ldrh	w0, [x0, 8]
+	bl	P2V_block_in_plane
+.LVL79:
+	.loc 2 125 0 discriminator 3
+	ubfiz	x0, x0, 1, 16
+.LVL80:
+	ldrh	w0, [x10, x0]
+	str	w0, [x3, x5, lsl 2]
+.LVL81:
+	add	x5, x5, 1
+.LVL82:
+	b	.L52
+.LVL83:
+.L59:
+	.loc 2 130 0
+	add	w5, w0, 1
+	mov	w1, w0
+	and	w5, w5, 65535
+.LVL84:
+	mov	w4, w5
+.LVL85:
+.L55:
+	.loc 2 130 0 is_stmt 0 discriminator 1
+	cmp	w4, w7
+	bcc	.L57
+	.loc 2 134 0 is_stmt 1
+	cmp	w0, w1
+	beq	.L58
+	.loc 2 136 0
+	ubfiz	x4, x0, 2, 16
+.LVL86:
+	.loc 2 135 0
+	ubfiz	x6, x1, 2, 32
+	.loc 2 140 0
+	add	w0, w8, w0
+.LVL87:
+	.loc 2 139 0
+	add	w1, w1, w8
+.LVL88:
+	.loc 2 140 0
+	add	x0, x2, x0, sxtw 1
+	.loc 2 139 0
+	add	x1, x2, x1, sxtw 1
+	.loc 2 136 0
+	ldr	w12, [x3, x4]
+	.loc 2 135 0
+	ldr	w11, [x3, x6]
+.LVL89:
+	.loc 2 136 0
+	str	w12, [x3, x6]
+	.loc 2 137 0
+	str	w11, [x3, x4]
+	.loc 2 140 0
+	ldrh	w6, [x0, 8]
+	.loc 2 139 0
+	ldrh	w4, [x1, 8]
+.LVL90:
+	.loc 2 140 0
+	strh	w6, [x1, 8]
+	.loc 2 141 0
+	strh	w4, [x0, 8]
+.LVL91:
+.L58:
+	mov	w0, w5
+	b	.L54
+.LVL92:
+.L57:
+	.loc 2 131 0
+	ubfiz	x6, x4, 2, 16
+	ldr	w11, [x3, w1, uxtw 2]
+	ldr	w6, [x3, x6]
+	cmp	w11, w6
+	csel	w1, w1, w4, ls
+.LVL93:
+	.loc 2 130 0
+	add	w4, w4, 1
+.LVL94:
+	and	w4, w4, 65535
+.LVL95:
+	b	.L55
+	.cfi_endproc
+.LFE241:
+	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
+	.section	.text.IsInFreeQueue,"ax",@progbits
+	.align	2
+	.global	IsInFreeQueue
+	.type	IsInFreeQueue, %function
+IsInFreeQueue:
+.LFB242:
+	.loc 2 147 0
+	.cfi_startproc
+.LVL96:
+.LBB168:
+.LBB169:
+	.loc 2 94 0
+	adrp	x1, .LANCHOR38
+	add	x1, x1, :lo12:.LANCHOR38
+.LBE169:
+.LBE168:
+	.loc 2 147 0
+	and	w0, w0, 65535
+.LBB171:
+.LBB170:
+	.loc 2 94 0
+	ldrh	w4, [x1, 6]
+.LBE170:
+.LBE171:
+	.loc 2 152 0
+	cmp	w4, 1024
+	beq	.L65
+	.loc 2 155 0
+	ldrh	w5, [x1, 2]
+	mov	w3, 0
+.L63:
+.LVL97:
+	.loc 2 154 0 discriminator 1
+	cmp	w3, w4
+	bcc	.L64
+.LVL98:
+.L65:
+	.loc 2 148 0
+	mov	w0, 0
+.LVL99:
+	ret
+.LVL100:
+.L64:
+	.loc 2 155 0
+	add	w2, w3, w5
+	ubfiz	x2, x2, 1, 10
+	add	x2, x1, x2
+	ldrh	w2, [x2, 8]
+	cmp	w2, w0
+	beq	.L66
+	.loc 2 154 0 discriminator 2
+	add	w3, w3, 1
+.LVL101:
+	b	.L63
+.L66:
+	.loc 2 156 0
+	mov	w0, 1
+.LVL102:
+	.loc 2 162 0
+	ret
+	.cfi_endproc
+.LFE242:
+	.size	IsInFreeQueue, .-IsInFreeQueue
+	.section	.text.FtlFreeSysBlkQueueOut,"ax",@progbits
+	.align	2
+	.global	FtlFreeSysBlkQueueOut
+	.type	FtlFreeSysBlkQueueOut, %function
+FtlFreeSysBlkQueueOut:
+.LFB243:
+	.loc 2 165 0
+	.cfi_startproc
+.LVL103:
+.LBB172:
+.LBB173:
+	.loc 2 89 0
+	adrp	x1, .LANCHOR38
+	add	x1, x1, :lo12:.LANCHOR38
+	ldrh	w3, [x1, 6]
+.LBE173:
+.LBE172:
+	.loc 2 168 0
+	cbz	w3, .L69
+.LVL104:
+.LBB174:
+	.loc 2 170 0
+	ldrh	w2, [x1, 2]
+	.loc 2 171 0
+	sub	w3, w3, #1
+	strh	w3, [x1, 6]
+	.loc 2 170 0
+	add	x0, x1, x2, sxtw 1
+	.loc 2 172 0
+	add	w2, w2, 1
+	and	w2, w2, 1023
+	strh	w2, [x1, 2]
+	.loc 2 170 0
+	ldrh	w0, [x0, 8]
+.LVL105:
+	ret
+.LVL106:
+.L69:
+.LBE174:
+	.loc 2 166 0
+	mov	w0, 65535
+.LVL107:
+	.loc 2 176 0
+	ret
+	.cfi_endproc
+.LFE243:
+	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
+	.section	.text.insert_data_list,"ax",@progbits
+	.align	2
+	.global	insert_data_list
+	.type	insert_data_list, %function
+insert_data_list:
+.LFB246:
+	.loc 2 217 0
+	.cfi_startproc
+.LVL108:
+	and	w0, w0, 65535
+	.loc 2 225 0
+	mov	w11, 65535
+	cmp	w0, w11
+	beq	.L84
+	.loc 2 230 0
+	adrp	x1, .LANCHOR41
+	mov	w6, 6
+	ldr	x4, [x1, #:lo12:.LANCHOR41]
+	umull	x13, w0, w6
+	.loc 2 231 0
+	mov	w1, -1
+	.loc 2 230 0
+	add	x3, x4, x13
+.LVL109:
+	.loc 2 231 0
+	strh	w1, [x3, 2]
+	strh	w1, [x4, x13]
+	.loc 2 233 0
+	adrp	x1, .LANCHOR42
+	mov	x15, x1
+	ldr	x12, [x1, #:lo12:.LANCHOR42]
+	cbnz	x12, .L72
+	.loc 2 234 0
+	str	x3, [x1, #:lo12:.LANCHOR42]
+.LVL110:
+.L84:
+	.loc 2 281 0
+	mov	w0, 0
+.LVL111:
+	ret
+.LVL112:
+.L72:
+	.loc 2 217 0
+	stp	x29, x30, [sp, -16]!
+	.cfi_def_cfa_offset 16
+	.cfi_offset 29, -16
+	.cfi_offset 30, -8
+	.loc 2 238 0
+	adrp	x1, .LANCHOR43
+	ubfiz	x2, x0, 1, 16
+	.loc 2 244 0
+	mov	x8, -6148914691236517206
+	.loc 2 217 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 2 238 0
+	ldr	x14, [x1, #:lo12:.LANCHOR43]
+	.loc 2 244 0
+	movk	x8, 0xaaab, lsl 0
+	.loc 2 239 0
+	ldrh	w1, [x3, 4]
+	mov	w7, -1
+	.loc 2 247 0
+	mov	w10, w7
+	.loc 2 239 0
+	cmp	w1, 0
+	.loc 2 238 0
+	ldrh	w5, [x14, x2]
+.LVL113:
+	.loc 2 239 0
+	mul	w5, w5, w1
+.LVL114:
+	.loc 2 244 0
+	sub	x1, x12, x4
+.LVL115:
+	asr	x1, x1, 1
+	.loc 2 239 0
+	csel	w5, w5, w7, ne
+.LVL116:
+	.loc 2 267 0
+	mov	w7, w6
+	.loc 2 244 0
+	mul	x1, x1, x8
+	.loc 2 252 0
+	adrp	x8, .LANCHOR40
+	ldr	x16, [x8, #:lo12:.LANCHOR40]
+	.loc 2 244 0
+	and	w1, w1, 65535
+.LVL117:
+	.loc 2 252 0
+	add	x8, x16, x2
+	mov	x2, x12
+.LVL118:
+.L79:
+	.loc 2 246 0
+	ubfiz	x17, x1, 1, 16
+	.loc 2 247 0
+	ldrh	w30, [x2, 4]
+	cmp	w30, 0
+	.loc 2 246 0
+	ldrh	w6, [x14, x17]
+.LVL119:
+	.loc 2 247 0
+	mul	w6, w6, w30
+.LVL120:
+	csel	w6, w6, w10, ne
+.LVL121:
+	.loc 2 251 0
+	cmp	w5, w6
+	bne	.L75
+	.loc 2 252 0
+	ldrh	w17, [x16, x17]
+.LVL122:
+	ldrh	w6, [x8]
+.LVL123:
+	cmp	w17, w6
+	bcc	.L77
+.L76:
+	.loc 2 270 0
+	strh	w1, [x4, x13]
+.LVL124:
+	.loc 2 273 0
+	cmp	x2, x12
+	.loc 2 271 0
+	ldrh	w1, [x2, 2]
+.LVL125:
+	strh	w1, [x3, 2]
+	.loc 2 273 0
+	bne	.L80
+	.loc 2 274 0
+	strh	w0, [x2, 2]
+	.loc 2 275 0
+	str	x3, [x15, #:lo12:.LANCHOR42]
+	b	.L71
+.LVL126:
+.L75:
+	.loc 2 256 0
+	bcc	.L76
+.LVL127:
+.L77:
+	.loc 2 259 0
+	ldrh	w6, [x2]
+	cmp	w6, w11
+	bne	.L78
+	.loc 2 260 0
+	strh	w1, [x3, 2]
+.LVL128:
+	.loc 2 261 0
+	strh	w0, [x2]
+	.loc 2 262 0
+	adrp	x0, .LANCHOR44
+	str	x3, [x0, #:lo12:.LANCHOR44]
+.LVL129:
+.L71:
+	.loc 2 281 0
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+	ret
+.LVL130:
+.L78:
+	.cfi_restore_state
+	.loc 2 267 0
+	umaddl	x2, w6, w7, x4
+.LVL131:
+	.loc 2 246 0
+	mov	w1, w6
+.LVL132:
+	b	.L79
+.LVL133:
+.L80:
+	.loc 2 277 0
+	ldrh	w1, [x2, 2]
+	mov	w3, 6
+.LVL134:
+	umull	x1, w1, w3
+	strh	w0, [x4, x1]
+.LVL135:
+	.loc 2 278 0
+	strh	w0, [x2, 2]
+	b	.L71
+	.cfi_endproc
+.LFE246:
+	.size	insert_data_list, .-insert_data_list
+	.section	.text.INSERT_DATA_LIST,"ax",@progbits
+	.align	2
+	.global	INSERT_DATA_LIST
+	.type	INSERT_DATA_LIST, %function
+INSERT_DATA_LIST:
+.LFB245:
+	.loc 2 186 0
+	.cfi_startproc
+.LVL136:
+	stp	x29, x30, [sp, -16]!
+	.cfi_def_cfa_offset 16
+	.cfi_offset 29, -16
+	.cfi_offset 30, -8
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 2 187 0
+	bl	insert_data_list
+.LVL137:
+	.loc 2 188 0
+	adrp	x1, .LANCHOR45
+	ldrh	w0, [x1, #:lo12:.LANCHOR45]
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	strh	w0, [x1, #:lo12:.LANCHOR45]
+	.loc 2 189 0
+	adrp	x1, .LANCHOR5
+	ldrh	w1, [x1, #:lo12:.LANCHOR5]
+	cmp	w1, w0
+	bcs	.L86
+.LVL138:
+	.loc 2 190 0
+	ldp	x29, x30, [sp], 16
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+.LBB177:
+.LBB178:
+	.loc 2 189 0
+	mov	w2, 189
+	adrp	x1, .LANCHOR46
+	adrp	x0, .LC1
+	add	x1, x1, :lo12:.LANCHOR46
+	add	x0, x0, :lo12:.LC1
+	b	printf
+.LVL139:
+.L86:
+	.cfi_restore_state
+.LBE178:
+.LBE177:
+	.loc 2 190 0
+	ldp	x29, x30, [sp], 16
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE245:
+	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
+	.section	.text.insert_free_list,"ax",@progbits
+	.align	2
+	.global	insert_free_list
+	.type	insert_free_list, %function
+insert_free_list:
+.LFB247:
+	.loc 2 284 0
+	.cfi_startproc
+.LVL140:
+	.loc 2 284 0
+	and	w0, w0, 65535
+	.loc 2 290 0
+	mov	w7, 65535
+	cmp	w0, w7
+	beq	.L90
+	.loc 2 293 0
+	adrp	x1, .LANCHOR41
+	mov	w6, 6
+	ldr	x3, [x1, #:lo12:.LANCHOR41]
+	umull	x8, w0, w6
+	.loc 2 294 0
+	mov	w1, -1
+	.loc 2 293 0
+	add	x4, x3, x8
+.LVL141:
+	.loc 2 294 0
+	strh	w1, [x4, 2]
+	strh	w1, [x3, x8]
+	.loc 2 296 0
+	adrp	x1, .LANCHOR47
+	mov	x12, x1
+	ldr	x5, [x1, #:lo12:.LANCHOR47]
+	cbnz	x5, .L91
+	.loc 2 297 0
+	str	x4, [x1, #:lo12:.LANCHOR47]
+.LVL142:
+.L90:
+	.loc 2 330 0
+	mov	w0, 0
+.LVL143:
+	ret
+.LVL144:
+.L91:
+	.loc 2 301 0
+	adrp	x1, .LANCHOR40
+	.loc 2 303 0
+	mov	x2, -6148914691236517206
+	movk	x2, 0xaaab, lsl 0
+	.loc 2 301 0
+	ldr	x11, [x1, #:lo12:.LANCHOR40]
+	ubfiz	x1, x0, 1, 16
+	ldrh	w13, [x11, x1]
+.LVL145:
+	.loc 2 303 0
+	sub	x1, x5, x3
+	asr	x1, x1, 1
+	mul	x1, x1, x2
+	mov	x2, x5
+	and	w1, w1, 65535
+.LVL146:
+.L94:
+	.loc 2 306 0
+	ubfiz	x10, x1, 1, 16
+	.loc 2 307 0
+	ldrh	w10, [x11, x10]
+	cmp	w10, w13
+	bcs	.L92
+	.loc 2 310 0
+	ldrh	w10, [x2]
+	cmp	w10, w7
+	bne	.L93
+	.loc 2 311 0
+	strh	w1, [x4, 2]
+.LVL147:
+	.loc 2 312 0
+	strh	w0, [x2]
+	.loc 2 313 0
+	b	.L90
+.LVL148:
+.L93:
+	.loc 2 316 0
+	umaddl	x2, w10, w6, x3
+.LVL149:
+	.loc 2 306 0
+	mov	w1, w10
+.LVL150:
+	b	.L94
+.LVL151:
+.L92:
+	.loc 2 319 0
+	ldrh	w6, [x2, 2]
+	.loc 2 322 0
+	cmp	x2, x5
+	.loc 2 319 0
+	strh	w6, [x4, 2]
+.LVL152:
+	.loc 2 320 0
+	strh	w1, [x3, x8]
+	.loc 2 322 0
+	bne	.L95
+	.loc 2 323 0
+	strh	w0, [x2, 2]
+	.loc 2 324 0
+	str	x4, [x12, #:lo12:.LANCHOR47]
+	b	.L90
+.L95:
+	.loc 2 326 0
+	ldrh	w1, [x2, 2]
+.LVL153:
+	mov	w4, 6
+.LVL154:
+	umull	x1, w1, w4
+	strh	w0, [x3, x1]
+.LVL155:
+	.loc 2 327 0
+	strh	w0, [x2, 2]
+	b	.L90
+	.cfi_endproc
+.LFE247:
+	.size	insert_free_list, .-insert_free_list
+	.section	.text.INSERT_FREE_LIST,"ax",@progbits
+	.align	2
+	.global	INSERT_FREE_LIST
+	.type	INSERT_FREE_LIST, %function
+INSERT_FREE_LIST:
+.LFB244:
+	.loc 2 179 0
+	.cfi_startproc
+.LVL156:
+	stp	x29, x30, [sp, -16]!
+	.cfi_def_cfa_offset 16
+	.cfi_offset 29, -16
+	.cfi_offset 30, -8
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 2 180 0
+	bl	insert_free_list
+.LVL157:
+	.loc 2 181 0
+	adrp	x1, .LANCHOR48
+	ldrh	w0, [x1, #:lo12:.LANCHOR48]
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	strh	w0, [x1, #:lo12:.LANCHOR48]
+	.loc 2 182 0
+	adrp	x1, .LANCHOR5
+	ldrh	w1, [x1, #:lo12:.LANCHOR5]
+	cmp	w1, w0
+	bcs	.L96
+.LVL158:
+	.loc 2 183 0
+	ldp	x29, x30, [sp], 16
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+.LBB181:
+.LBB182:
+	.loc 2 182 0
+	mov	w2, 182
+	adrp	x1, .LANCHOR49
+	adrp	x0, .LC1
+	add	x1, x1, :lo12:.LANCHOR49
+	add	x0, x0, :lo12:.LC1
+	b	printf
+.LVL159:
+.L96:
+	.cfi_restore_state
+.LBE182:
+.LBE181:
+	.loc 2 183 0
+	ldp	x29, x30, [sp], 16
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE244:
+	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
+	.section	.text.List_remove_node,"ax",@progbits
+	.align	2
+	.global	List_remove_node
+	.type	List_remove_node, %function
+List_remove_node:
+.LFB248:
+	.loc 2 333 0
+	.cfi_startproc
+.LVL160:
+	stp	x29, x30, [sp, -64]!
+	.cfi_def_cfa_offset 64
+	.cfi_offset 29, -64
+	.cfi_offset 30, -56
+	and	w1, w1, 65535
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -48
+	.cfi_offset 20, -40
+	.loc 2 336 0
+	adrp	x20, .LANCHOR41
+	.loc 2 333 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -32
+	.cfi_offset 22, -24
+	mov	x22, x0
+	.loc 2 336 0
+	mov	w0, 6
+.LVL161:
+	.loc 2 333 0
+	str	x23, [sp, 48]
+	.cfi_offset 23, -16
+	.loc 2 336 0
+	ldr	x23, [x20, #:lo12:.LANCHOR41]
+	umull	x21, w1, w0
+	.loc 2 337 0
+	mov	w0, 65535
+	.loc 2 336 0
+	add	x19, x23, x21
+.LVL162:
+	.loc 2 337 0
+	ldrh	w1, [x19, 2]
+.LVL163:
+	cmp	w1, w0
+	bne	.L100
+	.loc 2 337 0 is_stmt 0 discriminator 1
+	ldr	x0, [x22]
+	cmp	x19, x0
+	beq	.L100
+	.loc 2 337 0 discriminator 2
+	adrp	x1, .LANCHOR50
+	adrp	x0, .LC1
+	mov	w2, 337
+	add	x1, x1, :lo12:.LANCHOR50
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL164:
+.L100:
+	.loc 2 339 0 is_stmt 1
+	ldr	x0, [x22]
+	mov	w1, 65535
+	cmp	x19, x0
+	ldrh	w0, [x23, x21]
+	bne	.L101
+	.loc 2 340 0
+	cmp	w0, w1
+	bne	.L102
+	.loc 2 341 0
+	str	xzr, [x22]
+.L103:
+	.loc 2 355 0
+	mov	w0, -1
+	strh	w0, [x23, x21]
+	strh	w0, [x19, 2]
+	.loc 2 357 0
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+.LVL165:
+	ldp	x21, x22, [sp, 32]
+.LVL166:
+	ldr	x23, [sp, 48]
+.LVL167:
+	ldp	x29, x30, [sp], 64
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 23
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL168:
+.L102:
+	.cfi_restore_state
+	.loc 2 343 0
+	ldr	x1, [x20, #:lo12:.LANCHOR41]
+	mov	w2, 6
+	umaddl	x0, w0, w2, x1
+	.loc 2 344 0
+	mov	w1, -1
+	.loc 2 343 0
+	str	x0, [x22]
+	.loc 2 344 0
+	strh	w1, [x0, 2]
+	b	.L103
+.L101:
+	.loc 2 346 0
+	cmp	w0, w1
+	mov	w2, 6
+	ldrh	w1, [x19, 2]
+	bne	.L104
+.LVL169:
+	.loc 2 347 0
+	umull	x1, w1, w2
+	.loc 2 348 0
+	ldr	x0, [x20, #:lo12:.LANCHOR41]
+	mov	w2, -1
+	strh	w2, [x0, x1]
+	b	.L103
+.LVL170:
+.L104:
+	.loc 2 350 0
+	ldr	x3, [x20, #:lo12:.LANCHOR41]
+.LVL171:
+	.loc 2 351 0
+	umaddl	x4, w0, w2, x3
+	strh	w1, [x4, 2]
+.LVL172:
+	.loc 2 352 0
+	ldrh	w1, [x19, 2]
+	umull	x1, w1, w2
+	.loc 2 353 0
+	strh	w0, [x3, x1]
+	b	.L103
+	.cfi_endproc
+.LFE248:
+	.size	List_remove_node, .-List_remove_node
+	.section	.text.List_pop_index_node,"ax",@progbits
+	.align	2
+	.global	List_pop_index_node
+	.type	List_pop_index_node, %function
+List_pop_index_node:
+.LFB249:
+	.loc 2 360 0
+	.cfi_startproc
+.LVL173:
+	.loc 2 364 0
+	ldr	x2, [x0]
+	cbz	x2, .L112
+	.loc 2 360 0
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	.loc 2 369 0
+	adrp	x3, .LANCHOR41
+	and	w1, w1, 65535
+	.loc 2 368 0
+	mov	w4, 65535
+	.loc 2 360 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	str	x19, [sp, 16]
+	.cfi_offset 19, -16
+	.loc 2 369 0
+	mov	w5, 6
+	ldr	x19, [x3, #:lo12:.LANCHOR41]
+.LVL174:
+.L108:
+	.loc 2 368 0
+	cbnz	w1, .L109
+.L111:
+	.loc 2 372 0
+	sub	x19, x2, x19
+	mov	x2, -6148914691236517206
+.LVL175:
+	asr	x19, x19, 1
+	movk	x2, 0xaaab, lsl 0
+	mul	x19, x19, x2
+	and	w19, w19, 65535
+.LVL176:
+	.loc 2 373 0
+	mov	w1, w19
+.LVL177:
+	bl	List_remove_node
+.LVL178:
+	.loc 2 375 0
+	mov	w0, w19
+	.loc 2 376 0
+	ldr	x19, [sp, 16]
+.LVL179:
+	ldp	x29, x30, [sp], 32
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_def_cfa 31, 0
+	ret
+.LVL180:
+.L109:
+	.cfi_restore_state
+	.loc 2 368 0 discriminator 1
+	ldrh	w3, [x2]
+	cmp	w3, w4
+	beq	.L111
+	.loc 2 370 0
+	sub	w1, w1, #1
+.LVL181:
+	.loc 2 369 0
+	umaddl	x2, w3, w5, x19
+.LVL182:
+	.loc 2 370 0
+	and	w1, w1, 65535
+.LVL183:
+	b	.L108
+.LVL184:
+.L112:
+	.cfi_def_cfa 31, 0
+	.cfi_restore 19
+	.cfi_restore 29
+	.cfi_restore 30
+	.loc 2 365 0
+	mov	w0, 65535
+.LVL185:
+	ret
+	.cfi_endproc
+.LFE249:
+	.size	List_pop_index_node, .-List_pop_index_node
+	.section	.text.List_pop_head_node,"ax",@progbits
+	.align	2
+	.global	List_pop_head_node
+	.type	List_pop_head_node, %function
+List_pop_head_node:
+.LFB250:
+	.loc 2 379 0
+	.cfi_startproc
+.LVL186:
+	.loc 2 380 0
+	mov	w1, 0
+	b	List_pop_index_node
+.LVL187:
+	.cfi_endproc
+.LFE250:
+	.size	List_pop_head_node, .-List_pop_head_node
+	.section	.text.List_get_gc_head_node,"ax",@progbits
+	.align	2
+	.global	List_get_gc_head_node
+	.type	List_get_gc_head_node, %function
+List_get_gc_head_node:
+.LFB251:
+	.loc 2 384 0
+	.cfi_startproc
+.LVL188:
+	.loc 2 384 0
+	and	w2, w0, 65535
+	.loc 2 388 0
+	adrp	x0, .LANCHOR42
+.LVL189:
+	ldr	x1, [x0, #:lo12:.LANCHOR42]
+	cbz	x1, .L123
+	.loc 2 393 0
+	adrp	x0, .LANCHOR41
+	mov	w4, 6
+	ldr	x3, [x0, #:lo12:.LANCHOR41]
+	.loc 2 392 0
+	mov	w0, 65535
+.LVL190:
+.L120:
+	cbz	w2, .L121
+	.loc 2 392 0 is_stmt 0 discriminator 1
+	ldrh	w1, [x1]
+.LVL191:
+	cmp	w1, w0
+	bne	.L122
+	ret
+.L122:
+	.loc 2 394 0 is_stmt 1
+	sub	w2, w2, #1
+.LVL192:
+	.loc 2 393 0
+	umaddl	x1, w1, w4, x3
+.LVL193:
+	.loc 2 394 0
+	and	w2, w2, 65535
+.LVL194:
+	b	.L120
+.LVL195:
+.L123:
+	.loc 2 389 0
+	mov	w0, 65535
+	ret
+.LVL196:
+.L121:
+	.loc 2 398 0
+	sub	x0, x1, x3
+	mov	x1, -6148914691236517206
+.LVL197:
+	asr	x0, x0, 1
+	movk	x1, 0xaaab, lsl 0
+	mul	x0, x0, x1
+	.loc 2 400 0
+	and	w0, w0, 65535
+	.loc 2 401 0
+	ret
+	.cfi_endproc
+.LFE251:
+	.size	List_get_gc_head_node, .-List_get_gc_head_node
+	.section	.text.List_update_data_list,"ax",@progbits
+	.align	2
+	.global	List_update_data_list
+	.type	List_update_data_list, %function
+List_update_data_list:
+.LFB252:
+	.loc 2 404 0
+	.cfi_startproc
+.LVL198:
+	stp	x29, x30, [sp, -64]!
+	.cfi_def_cfa_offset 64
+	.cfi_offset 29, -64
+	.cfi_offset 30, -56
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -48
+	.cfi_offset 20, -40
+	and	w19, w0, 65535
+	.loc 2 413 0
+	adrp	x0, .LANCHOR51
+.LVL199:
+	.loc 2 404 0
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 21, -32
+	.cfi_offset 22, -24
+	.cfi_offset 23, -16
+	.cfi_offset 24, -8
+	.loc 2 413 0
+	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+	cmp	w0, w19
+	beq	.L126
+	.loc 2 413 0 is_stmt 0 discriminator 1
+	adrp	x0, .LANCHOR52
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
+	cmp	w0, w19
+	beq	.L126
+	.loc 2 413 0 discriminator 2
+	adrp	x0, .LANCHOR53
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+	cmp	w0, w19
+	beq	.L126
+.LVL200:
+.LBB185:
+.LBB186:
+	.loc 2 416 0 is_stmt 1
+	adrp	x2, .LANCHOR41
+	mov	w1, 6
+	.loc 2 418 0
+	adrp	x0, .LANCHOR42
+	mov	x24, x2
+	.loc 2 416 0
+	umull	x1, w19, w1
+	ldr	x3, [x2, #:lo12:.LANCHOR41]
+	.loc 2 418 0
+	ldr	x4, [x0, #:lo12:.LANCHOR42]
+	mov	x23, x0
+	.loc 2 416 0
+	add	x22, x3, x1
+.LVL201:
+	.loc 2 418 0
+	cmp	x22, x4
+	beq	.L126
+.LVL202:
+	.loc 2 421 0
+	adrp	x0, .LANCHOR43
+	ubfiz	x2, x19, 1, 16
+	mov	x21, x0
+	ldr	x4, [x0, #:lo12:.LANCHOR43]
+	.loc 2 426 0
+	ldrh	w0, [x22, 2]
+	.loc 2 422 0
+	ldrh	w20, [x4, x2]
+	ldrh	w2, [x22, 4]
+	mul	w20, w20, w2
+.LVL203:
+	.loc 2 426 0
+	mov	w2, 65535
+	.loc 2 424 0
+	cmp	w20, 0
+	csinv	w20, w20, wzr, ne
+.LVL204:
+	.loc 2 426 0
+	cmp	w0, w2
+	bne	.L129
+	ldrh	w1, [x3, x1]
+	cmp	w1, w0
+	bne	.L129
+	adrp	x1, .LANCHOR54
+	adrp	x0, .LC1
+	mov	w2, 426
+	add	x1, x1, :lo12:.LANCHOR54
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL205:
+.L129:
+	.loc 2 427 0
+	ldrh	w1, [x22, 2]
+	mov	w0, 6
+	.loc 2 428 0
+	mov	x2, -6148914691236517206
+	movk	x2, 0xaaab, lsl 0
+	.loc 2 427 0
+	umull	x1, w1, w0
+.LVL206:
+	.loc 2 428 0
+	asr	x0, x1, 1
+	mul	x0, x0, x2
+	.loc 2 429 0
+	ldr	x2, [x21, #:lo12:.LANCHOR43]
+	.loc 2 430 0
+	ldrh	w0, [x2, x0, lsl 1]
+	ldr	x2, [x24, #:lo12:.LANCHOR41]
+	add	x1, x2, x1
+.LVL207:
+	ldrh	w1, [x1, 4]
+.LVL208:
+	mul	w0, w0, w1
+.LVL209:
+	.loc 2 432 0
+	cmp	w0, 0
+	csinv	w0, w0, wzr, ne
+.LVL210:
+	.loc 2 434 0
+	cmp	w20, w0
+	bcs	.L126
+	.loc 2 435 0
+	adrp	x20, .LANCHOR45
+.LVL211:
+	mov	w1, w19
+	add	x0, x23, :lo12:.LANCHOR42
+.LVL212:
+	bl	List_remove_node
+.LVL213:
+	ldrh	w0, [x20, #:lo12:.LANCHOR45]
+	cbnz	w0, .L131
+	adrp	x1, .LANCHOR54
+	adrp	x0, .LC1
+	mov	w2, 435
+	add	x1, x1, :lo12:.LANCHOR54
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL214:
+.L131:
+	ldrh	w0, [x20, #:lo12:.LANCHOR45]
+	sub	w0, w0, #1
+	strh	w0, [x20, #:lo12:.LANCHOR45]
+	.loc 2 436 0
+	mov	w0, w19
+	bl	INSERT_DATA_LIST
+.LVL215:
+.L126:
+.LBE186:
+.LBE185:
+	.loc 2 439 0
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+.LVL216:
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE252:
+	.size	List_update_data_list, .-List_update_data_list
+	.section	.text.ftl_map_blk_alloc_new_blk,"ax",@progbits
+	.align	2
+	.global	ftl_map_blk_alloc_new_blk
+	.type	ftl_map_blk_alloc_new_blk, %function
+ftl_map_blk_alloc_new_blk:
+.LFB255:
+	.loc 2 516 0
+	.cfi_startproc
+.LVL217:
+	stp	x29, x30, [sp, -16]!
+	.cfi_def_cfa_offset 16
+	.cfi_offset 29, -16
+	.cfi_offset 30, -8
+.LVL218:
+	mov	x4, x0
+	.loc 2 520 0
+	mov	w5, 0
+	.loc 2 516 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 2 520 0
+	ldrh	w1, [x0, 10]
+	ldr	x0, [x0, 16]
+.LVL219:
+.L134:
+	.loc 2 520 0 is_stmt 0 discriminator 1
+	cmp	w5, w1
+	bne	.L137
+.L138:
+.LVL220:
+.LBB189:
+.LBB190:
+	.loc 2 532 0 is_stmt 1
+	mov	w2, 532
+	adrp	x1, .LANCHOR55
+	adrp	x0, .LC1
+	add	x1, x1, :lo12:.LANCHOR55
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL221:
+	b	.L139
+.LVL222:
+.L137:
+.LBE190:
+.LBE189:
+	.loc 2 521 0
+	mov	x6, x0
+	ldrh	w2, [x0], 2
+	cbnz	w2, .L135
+	.loc 2 522 0
+	bl	FtlFreeSysBlkQueueOut
+.LVL223:
+	strh	w0, [x6]
+	.loc 2 523 0
+	tst	w0, 65535
+	beq	.L136
+	.loc 2 526 0
+	ldr	w0, [x4, 48]
+	.loc 2 524 0
+	strh	wzr, [x4, 2]
+	.loc 2 526 0
+	add	w0, w0, 1
+	str	w0, [x4, 48]
+	.loc 2 527 0
+	ldrh	w0, [x4, 8]
+	.loc 2 525 0
+	strh	w5, [x4]
+	.loc 2 527 0
+	add	w0, w0, 1
+	strh	w0, [x4, 8]
+.L136:
+	.loc 2 532 0
+	ldrh	w0, [x4, 10]
+	cmp	w0, w5
+	bls	.L138
+.LVL224:
+.L139:
+	.loc 2 534 0
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+	ret
+.LVL225:
+.L135:
+	.cfi_restore_state
+	.loc 2 520 0 discriminator 2
+	add	w5, w5, 1
+.LVL226:
+	and	w5, w5, 65535
+.LVL227:
+	b	.L134
+	.cfi_endproc
+.LFE255:
+	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
+	.section	.text.select_l2p_ram_region,"ax",@progbits
+	.align	2
+	.global	select_l2p_ram_region
+	.type	select_l2p_ram_region, %function
+select_l2p_ram_region:
+.LFB260:
+	.loc 2 700 0
+	.cfi_startproc
+.LVL228:
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	.loc 2 705 0
+	adrp	x0, .LANCHOR33
+	mov	x1, 0
+	.loc 2 706 0
+	mov	w3, 65535
+	.loc 2 700 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 2 705 0
+	ldrh	w2, [x0, #:lo12:.LANCHOR33]
+	.loc 2 706 0
+	adrp	x0, .LANCHOR56
+	.loc 2 700 0
+	str	x19, [sp, 16]
+	.cfi_offset 19, -16
+	.loc 2 706 0
+	ldr	x0, [x0, #:lo12:.LANCHOR56]
+.LVL229:
+.L145:
+	and	w19, w1, 65535
+.LVL230:
+	.loc 2 705 0 discriminator 1
+	cmp	w19, w2
+	bcc	.L147
+	add	x3, x0, 4
+	.loc 2 705 0 is_stmt 0
+	mov	w19, w2
+.LVL231:
+	mov	w5, -2147483648
+	mov	w1, 0
+.LVL232:
+.L148:
+	.loc 2 715 0 is_stmt 1 discriminator 1
+	cmp	w1, w2
+	bne	.L150
+	.loc 2 724 0
+	cmp	w19, w2
+	bcc	.L146
+	.loc 2 730 0
+	adrp	x1, .LANCHOR57
+.LVL233:
+	mov	w19, w2
+.LVL234:
+	mov	w3, -1
+	ldrh	w4, [x1, #:lo12:.LANCHOR57]
+	mov	w1, 0
+.LVL235:
+.L151:
+	.loc 2 729 0 discriminator 1
+	cmp	w1, w2
+	bne	.L153
+	.loc 2 735 0
+	cmp	w19, w1
+	bcc	.L146
+	.loc 2 735 0 is_stmt 0 discriminator 1
+	mov	w2, 735
+	adrp	x1, .LANCHOR58
+.LVL236:
+	adrp	x0, .LC1
+	add	x1, x1, :lo12:.LANCHOR58
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL237:
+	b	.L146
+.LVL238:
+.L147:
+	add	x1, x1, 1
+	.loc 2 706 0 is_stmt 1
+	add	x4, x0, x1, lsl 4
+	ldrh	w4, [x4, -16]
+	cmp	w4, w3
+	bne	.L145
+.LVL239:
+.L146:
+	.loc 2 737 0
+	mov	w0, w19
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_def_cfa 31, 0
+	ret
+.LVL240:
+.L150:
+	.cfi_restore_state
+	.loc 2 716 0
+	ldr	w4, [x3]
+	tbnz	w4, #31, .L149
+	.loc 2 717 0
+	cmp	w5, w4
+	bls	.L149
+	mov	w5, w4
+.LVL241:
+	mov	w19, w1
+.LVL242:
+.L149:
+	.loc 2 715 0 discriminator 2
+	add	w1, w1, 1
+.LVL243:
+	add	x3, x3, 16
+	and	w1, w1, 65535
+.LVL244:
+	b	.L148
+.LVL245:
+.L153:
+	.loc 2 730 0
+	ldr	w6, [x0, 4]
+	cmp	w3, w6
+	bls	.L152
+	.loc 2 730 0 is_stmt 0 discriminator 1
+	ldrh	w5, [x0]
+	cmp	w5, w4
+	csel	w3, w3, w6, eq
+.LVL246:
+	csel	w19, w19, w1, eq
+.LVL247:
+.L152:
+	.loc 2 729 0 is_stmt 1 discriminator 2
+	add	w1, w1, 1
+.LVL248:
+	add	x0, x0, 16
+	and	w1, w1, 65535
+.LVL249:
+	b	.L151
+	.cfi_endproc
+.LFE260:
+	.size	select_l2p_ram_region, .-select_l2p_ram_region
+	.section	.text.FtlUpdateVaildLpn,"ax",@progbits
+	.align	2
+	.global	FtlUpdateVaildLpn
+	.type	FtlUpdateVaildLpn, %function
+FtlUpdateVaildLpn:
+.LFB266:
+	.loc 2 882 0
+	.cfi_startproc
+.LVL250:
+	.loc 2 885 0
+	adrp	x2, .LANCHOR59
+	mov	x3, x2
+	ldrh	w1, [x2, #:lo12:.LANCHOR59]
+	cmp	w1, 4
+	bhi	.L156
+	.loc 2 885 0 is_stmt 0 discriminator 1
+	cbnz	w0, .L156
+	.loc 2 885 0
+	add	w1, w1, 1
+	strh	w1, [x2, #:lo12:.LANCHOR59]
+	.loc 2 894 0 is_stmt 1
+	ret
+.L156:
+.LBB193:
+.LBB194:
+	.loc 2 888 0
+	adrp	x1, .LANCHOR5
+.LBE194:
+.LBE193:
+	.loc 2 887 0
+	adrp	x0, .LANCHOR60
+.LVL251:
+	.loc 2 886 0
+	strh	wzr, [x3, #:lo12:.LANCHOR59]
+.LBB197:
+.LBB195:
+	.loc 2 890 0
+	mov	w2, 0
+	.loc 2 888 0
+	ldrh	w5, [x1, #:lo12:.LANCHOR5]
+	.loc 2 890 0
+	adrp	x1, .LANCHOR43
+.LBE195:
+.LBE197:
+	.loc 2 887 0
+	str	wzr, [x0, #:lo12:.LANCHOR60]
+.LVL252:
+.LBB198:
+.LBB196:
+	.loc 2 890 0
+	mov	w3, 0
+	ldr	x6, [x1, #:lo12:.LANCHOR43]
+	mov	w7, 65535
+	mov	x1, 0
+.L157:
+.LVL253:
+	.loc 2 888 0
+	cmp	w5, w1, uxth
+	bhi	.L159
+	cbz	w3, .L155
+	str	w2, [x0, #:lo12:.LANCHOR60]
+.L155:
+	ret
+.L159:
+	.loc 2 890 0
+	ldrh	w4, [x6, x1, lsl 1]
+	cmp	w4, w7
+	beq	.L158
+	.loc 2 891 0
+	add	w2, w2, w4
+	mov	w3, 1
+.L158:
+.LVL254:
+	add	x1, x1, 1
+.LVL255:
+	b	.L157
+.LBE196:
+.LBE198:
+	.cfi_endproc
+.LFE266:
+	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
+	.section	.text.ftl_set_blk_mode,"ax",@progbits
+	.align	2
+	.global	ftl_set_blk_mode
+	.type	ftl_set_blk_mode, %function
+ftl_set_blk_mode:
+.LFB272:
+	.loc 2 1347 0
+	.cfi_startproc
+.LVL256:
+	.loc 2 1347 0
+	and	w0, w0, 65535
+	.loc 2 1348 0
+	cbz	w1, .L166
+	b	ftl_set_blk_mode.part.7
+.LVL257:
+.L166:
+	.loc 2 1351 0
+	adrp	x1, .LANCHOR1
+.LVL258:
+	ubfx	x2, x0, 5, 11
+	lsl	x2, x2, 2
+	ldr	x3, [x1, #:lo12:.LANCHOR1]
+	mov	w1, 1
+	lsl	w0, w1, w0
+	ldr	w1, [x3, x2]
+	bic	w0, w1, w0
+	str	w0, [x3, x2]
+	ret
+	.cfi_endproc
+.LFE272:
+	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
+	.section	.text.ftl_get_blk_mode,"ax",@progbits
+	.align	2
+	.global	ftl_get_blk_mode
+	.type	ftl_get_blk_mode, %function
+ftl_get_blk_mode:
+.LFB273:
+	.loc 2 1355 0
+	.cfi_startproc
+.LVL259:
+	.loc 2 1355 0
+	and	w1, w0, 65535
+	.loc 2 1356 0
+	adrp	x0, .LANCHOR1
+.LVL260:
+	ldr	x0, [x0, #:lo12:.LANCHOR1]
+	ubfx	x2, x1, 5, 11
+	ldr	w0, [x0, x2, lsl 2]
+	lsr	w0, w0, w1
+	.loc 2 1357 0
+	and	w0, w0, 1
+	ret
+	.cfi_endproc
+.LFE273:
+	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
+	.section	.text.ftl_sb_update_avl_pages,"ax",@progbits
+	.align	2
+	.global	ftl_sb_update_avl_pages
+	.type	ftl_sb_update_avl_pages, %function
+ftl_sb_update_avl_pages:
+.LFB279:
+	.loc 2 1608 0
+	.cfi_startproc
+.LVL261:
+	.loc 2 1608 0
+	and	w2, w2, 65535
+	and	w6, w1, 65535
+	ubfiz	x4, x2, 1, 16
+	.loc 2 1611 0
+	adrp	x1, .LANCHOR3
+.LVL262:
+	add	x4, x4, 16
+	.loc 2 1610 0
+	strh	wzr, [x0, 4]
+.LVL263:
+	add	x4, x0, x4
+	.loc 2 1611 0
+	ldrh	w3, [x1, #:lo12:.LANCHOR3]
+	.loc 2 1613 0
+	mov	w1, 65535
+.LVL264:
+.L169:
+	.loc 2 1611 0 discriminator 1
+	cmp	w2, w3
+	bcc	.L171
+	.loc 2 1622 0
+	adrp	x1, .LANCHOR19
+	ubfiz	x3, x3, 1, 16
+	add	x3, x3, 16
+	add	x2, x0, 16
+.LVL265:
+	ldrh	w1, [x1, #:lo12:.LANCHOR19]
+	add	x3, x0, x3
+	.loc 2 1620 0
+	mov	w5, 65535
+	sub	w1, w1, #1
+	and	w1, w1, 65535
+	.loc 2 1622 0
+	sub	w1, w1, w6
+.L172:
+	.loc 2 1618 0 discriminator 1
+	cmp	x2, x3
+	bne	.L174
+	.loc 2 1625 0
+	ret
+.LVL266:
+.L171:
+	.loc 2 1613 0
+	ldrh	w5, [x4]
+	cmp	w5, w1
+	beq	.L170
+	.loc 2 1615 0
+	ldrh	w5, [x0, 4]
+	add	w5, w5, 1
+	strh	w5, [x0, 4]
+.L170:
+	.loc 2 1611 0 discriminator 2
+	add	w2, w2, 1
+.LVL267:
+	add	x4, x4, 2
+	and	w2, w2, 65535
+.LVL268:
+	b	.L169
+.LVL269:
+.L174:
+	.loc 2 1620 0
+	ldrh	w4, [x2]
+	cmp	w4, w5
+	beq	.L173
+	.loc 2 1622 0
+	ldrh	w4, [x0, 4]
+	add	w4, w1, w4
+	strh	w4, [x0, 4]
+.L173:
+	add	x2, x2, 2
+	b	.L172
+	.cfi_endproc
+.LFE279:
+	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
+	.section	.text.FtlSlcSuperblockCheck,"ax",@progbits
+	.align	2
+	.global	FtlSlcSuperblockCheck
+	.type	FtlSlcSuperblockCheck, %function
+FtlSlcSuperblockCheck:
+.LFB282:
+	.loc 2 2013 0
+	.cfi_startproc
+.LVL270:
+	.loc 2 2016 0
+	ldrh	w1, [x0, 4]
+	cbz	w1, .L175
+	.loc 2 2018 0
+	ldrh	w2, [x0]
+	mov	w1, 65535
+	cmp	w2, w1
+	beq	.L175
+.LVL271:
+.LBB201:
+.LBB202:
+	.loc 2 2020 0
+	ldrb	w2, [x0, 6]
+	add	x2, x2, 8
+	ldrh	w3, [x0, x2, lsl 1]
+.LVL272:
+	.loc 2 2023 0
+	adrp	x2, .LANCHOR3
+	ldrh	w4, [x2, #:lo12:.LANCHOR3]
+	.loc 2 2021 0
+	mov	w2, w1
+.L178:
+	cmp	w3, w2
+	beq	.L180
+.LVL273:
+.L175:
+	ret
+.LVL274:
+.L180:
+	.loc 2 2022 0
+	ldrb	w1, [x0, 6]
+	add	w1, w1, 1
+	and	w1, w1, 255
+	strb	w1, [x0, 6]
+	.loc 2 2023 0
+	cmp	w1, w4
+	bne	.L179
+	.loc 2 2024 0
+	ldrh	w1, [x0, 2]
+	.loc 2 2025 0
+	strb	wzr, [x0, 6]
+	.loc 2 2024 0
+	add	w1, w1, 1
+	strh	w1, [x0, 2]
+.L179:
+	.loc 2 2027 0
+	ldrb	w1, [x0, 6]
+	add	x1, x1, 8
+	ldrh	w3, [x0, x1, lsl 1]
+.LVL275:
+	b	.L178
+.LBE202:
+.LBE201:
+	.cfi_endproc
+.LFE282:
+	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
+	.section	.text.make_superblock,"ax",@progbits
+	.align	2
+	.global	make_superblock
+	.type	make_superblock, %function
+make_superblock:
+.LFB284:
+	.loc 2 2045 0
+	.cfi_startproc
+.LVL276:
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 2 2048 0
+	ldrh	w1, [x0]
+	.loc 2 2045 0
+	str	x19, [sp, 16]
+	.cfi_offset 19, -16
+	.loc 2 2045 0
+	mov	x19, x0
+	.loc 2 2048 0
+	adrp	x0, .LANCHOR5
+.LVL277:
+	ldrh	w0, [x0, #:lo12:.LANCHOR5]
+	cmp	w1, w0
+	bcc	.L182
+	.loc 2 2048 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR61
+	adrp	x0, .LC1
+	mov	w2, 2048
+	add	x1, x1, :lo12:.LANCHOR61
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL278:
+.L182:
+	.loc 2 2051 0 is_stmt 1
+	adrp	x0, .LANCHOR3
+	.loc 2 2052 0
+	adrp	x7, .LANCHOR13
+	add	x6, x19, 16
+	add	x7, x7, :lo12:.LANCHOR13
+	.loc 2 2051 0
+	ldrh	w8, [x0, #:lo12:.LANCHOR3]
+	mov	x5, 0
+	.loc 2 2049 0
+	strh	wzr, [x19, 4]
+	.loc 2 2053 0
+	mov	w10, -1
+	.loc 2 2050 0
+	strb	wzr, [x19, 7]
+.LVL279:
+.L183:
+	.loc 2 2051 0 discriminator 1
+	cmp	w8, w5, uxth
+	bhi	.L185
+	.loc 2 2061 0
+	adrp	x1, .LANCHOR19
+	ldrb	w0, [x19, 7]
+	ldrh	w1, [x1, #:lo12:.LANCHOR19]
+	mul	w0, w0, w1
+	strh	w0, [x19, 4]
+	.loc 2 2062 0
+	mov	w0, 1
+	strb	w0, [x19, 9]
+	.loc 2 2064 0
+	mov	w0, 0
+	ldr	x19, [sp, 16]
+.LVL280:
+	ldp	x29, x30, [sp], 32
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_def_cfa 31, 0
+	ret
+.LVL281:
+.L185:
+	.cfi_restore_state
+	.loc 2 2052 0
+	ldrh	w1, [x19]
+	ldrb	w0, [x7, x5]
+	bl	V2P_block
+.LVL282:
+	mov	w4, w0
+.LVL283:
+	.loc 2 2053 0
+	strh	w10, [x6]
+	.loc 2 2054 0
+	bl	FtlBbmIsBadBlock
+.LVL284:
+	cbnz	w0, .L184
+	.loc 2 2055 0
+	strh	w4, [x6]
+	.loc 2 2056 0
+	ldrb	w0, [x19, 7]
+	add	w0, w0, 1
+	strb	w0, [x19, 7]
+.L184:
+.LVL285:
+	add	x5, x5, 1
+.LVL286:
+	add	x6, x6, 2
+	b	.L183
+	.cfi_endproc
+.LFE284:
+	.size	make_superblock, .-make_superblock
+	.section	.text.update_multiplier_value,"ax",@progbits
+	.align	2
+	.global	update_multiplier_value
+	.type	update_multiplier_value, %function
+update_multiplier_value:
+.LFB293:
+	.loc 2 2401 0
+	.cfi_startproc
+.LVL287:
+	and	w6, w0, 65535
+	.loc 2 2405 0
+	adrp	x0, .LANCHOR3
+.LVL288:
+	mov	x7, 0
+	.loc 2 2406 0
+	adrp	x8, .LANCHOR13
+	.loc 2 2405 0
+	ldrh	w10, [x0, #:lo12:.LANCHOR3]
+	.loc 2 2408 0
+	adrp	x0, .LANCHOR19
+	.loc 2 2403 0
+	mov	w5, 0
+	.loc 2 2406 0
+	add	x8, x8, :lo12:.LANCHOR13
+.LVL289:
+	.loc 2 2408 0
+	ldrh	w11, [x0, #:lo12:.LANCHOR19]
+	.loc 2 2405 0
+	cmp	w10, w7, uxth
+	bhi	.L199
+	.loc 2 2410 0
+	cbz	w5, .L197
+	.loc 2 2411 0
+	mov	w0, 32768
+	sdiv	w5, w0, w5
+.LVL290:
+.L198:
+	.loc 2 2412 0
+	adrp	x0, .LANCHOR41
+	mov	w1, 6
+	ldr	x0, [x0, #:lo12:.LANCHOR41]
+	umaddl	x6, w6, w1, x0
+.LVL291:
+	.loc 2 2414 0
+	mov	w0, 0
+	.loc 2 2412 0
+	strh	w5, [x6, 4]
+	.loc 2 2414 0
+	ret
+.LVL292:
+.L192:
+	.cfi_def_cfa 29, 16
+	.cfi_offset 29, -16
+	.cfi_offset 30, -8
+	mov	w5, 0
+.LVL293:
+	b	.L191
+.LVL294:
+.L197:
+	.cfi_def_cfa 31, 0
+	.cfi_restore 29
+	.cfi_restore 30
+	mov	w5, 0
+	b	.L198
+.L199:
+	.loc 2 2401 0
+	stp	x29, x30, [sp, -16]!
+	.cfi_def_cfa_offset 16
+	.cfi_offset 29, -16
+	.cfi_offset 30, -8
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+.L190:
+	.loc 2 2406 0
+	ldrb	w0, [x8, x7]
+	mov	w1, w6
+	bl	V2P_block
+.LVL295:
+	.loc 2 2407 0
+	bl	FtlBbmIsBadBlock
+.LVL296:
+	cbnz	w0, .L189
+	.loc 2 2408 0
+	add	w5, w5, w11
+.LVL297:
+	and	w5, w5, 65535
+.LVL298:
+.L189:
+	add	x7, x7, 1
+.LVL299:
+	.loc 2 2405 0 discriminator 2
+	cmp	w10, w7, uxth
+	bhi	.L190
+	.loc 2 2410 0
+	cbz	w5, .L192
+	.loc 2 2411 0
+	mov	w0, 32768
+	sdiv	w5, w0, w5
+.LVL300:
+.L191:
+	.loc 2 2412 0
+	adrp	x0, .LANCHOR41
+	mov	w1, 6
+	ldr	x0, [x0, #:lo12:.LANCHOR41]
+	umaddl	x6, w6, w1, x0
+	.loc 2 2414 0
+	mov	w0, 0
+	.loc 2 2412 0
+	strh	w5, [x6, 4]
+	.loc 2 2414 0
+	ldp	x29, x30, [sp], 16
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE293:
+	.size	update_multiplier_value, .-update_multiplier_value
+	.section	.text.GetFreeBlockMinEraseCount,"ax",@progbits
+	.align	2
+	.global	GetFreeBlockMinEraseCount
+	.type	GetFreeBlockMinEraseCount, %function
+GetFreeBlockMinEraseCount:
+.LFB294:
+	.loc 2 2417 0
+	.cfi_startproc
+.LVL301:
+	.loc 2 2420 0
+	adrp	x0, .LANCHOR47
+	ldr	x0, [x0, #:lo12:.LANCHOR47]
+	cbz	x0, .L202
+	.loc 2 2421 0
+	adrp	x1, .LANCHOR41
+	ldr	x1, [x1, #:lo12:.LANCHOR41]
+	sub	x0, x0, x1
+	mov	x1, -6148914691236517206
+	asr	x0, x0, 1
+	movk	x1, 0xaaab, lsl 0
+	mul	x0, x0, x1
+	adrp	x1, .LANCHOR40
+	ldr	x1, [x1, #:lo12:.LANCHOR40]
+	and	x0, x0, 65535
+	ldrh	w0, [x1, x0, lsl 1]
+.LVL302:
+	ret
+.LVL303:
+.L202:
+	.loc 2 2418 0
+	mov	w0, 0
+.LVL304:
+	.loc 2 2423 0
+	ret
+	.cfi_endproc
+.LFE294:
+	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
+	.section	.text.GetFreeBlockMaxEraseCount,"ax",@progbits
+	.align	2
+	.global	GetFreeBlockMaxEraseCount
+	.type	GetFreeBlockMaxEraseCount, %function
+GetFreeBlockMaxEraseCount:
+.LFB295:
+	.loc 2 2426 0
+	.cfi_startproc
+.LVL305:
+	.loc 2 2431 0
+	adrp	x1, .LANCHOR47
+	.loc 2 2426 0
+	and	w0, w0, 65535
+	.loc 2 2431 0
+	ldr	x1, [x1, #:lo12:.LANCHOR47]
+	cbz	x1, .L210
+	.loc 2 2432 0
+	adrp	x2, .LANCHOR48
+	mov	w3, 7
+	.loc 2 2436 0
+	mov	w5, 6
+	mov	w6, 65535
+	.loc 2 2432 0
+	ldrh	w2, [x2, #:lo12:.LANCHOR48]
+	mul	w2, w2, w3
+	asr	w2, w2, 3
+	.loc 2 2433 0
+	cmp	w0, w2
+	csel	w0, w2, w0, gt
+.LVL306:
+	.loc 2 2434 0
+	adrp	x2, .LANCHOR41
+	ldr	x3, [x2, #:lo12:.LANCHOR41]
+	mov	x2, -6148914691236517206
+	movk	x2, 0xaaab, lsl 0
+	sub	x1, x1, x3
+	asr	x1, x1, 1
+	mul	x1, x1, x2
+	.loc 2 2435 0
+	mov	w2, 0
+	.loc 2 2434 0
+	and	w1, w1, 65535
+.LVL307:
+.L206:
+	.loc 2 2435 0 discriminator 1
+	cmp	w0, w2
+	beq	.L209
+	.loc 2 2436 0
+	umull	x4, w1, w5
+	ldrh	w4, [x3, x4]
+	cmp	w4, w6
+	bne	.L207
+.L209:
+	.loc 2 2440 0
+	adrp	x0, .LANCHOR40
+.LVL308:
+	ubfiz	x1, x1, 1, 16
+.LVL309:
+	ldr	x0, [x0, #:lo12:.LANCHOR40]
+	ldrh	w0, [x0, x1]
+.LVL310:
+	ret
+.LVL311:
+.L207:
+	.loc 2 2435 0 discriminator 2
+	add	w2, w2, 1
+.LVL312:
+	mov	w1, w4
+	and	w2, w2, 65535
+.LVL313:
+	b	.L206
+.LVL314:
+.L210:
+	.loc 2 2427 0
+	mov	w0, 0
+.LVL315:
+	.loc 2 2443 0
+	ret
+	.cfi_endproc
+.LFE295:
+	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
+	.section	.text.FtlPrintInfo2buf,"ax",@progbits
+	.align	2
+	.global	FtlPrintInfo2buf
+	.type	FtlPrintInfo2buf, %function
+FtlPrintInfo2buf:
+.LFB200:
+	.loc 3 12 0
+	.cfi_startproc
+.LVL316:
+	stp	x29, x30, [sp, -96]!
+	.cfi_def_cfa_offset 96
+	.cfi_offset 29, -96
+	.cfi_offset 30, -88
+	.loc 3 16 0
+	adrp	x1, .LC2
+	add	x1, x1, :lo12:.LC2
+	.loc 3 12 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -80
+	.cfi_offset 20, -72
+	.loc 3 31 0
+	adrp	x19, .LANCHOR37
+	.loc 3 12 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -64
+	.cfi_offset 22, -56
+	mov	x21, x0
+.LVL317:
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -48
+	.cfi_offset 24, -40
+	.loc 3 32 0
+	adrp	x23, .LANCHOR48
+	.loc 3 12 0
+	stp	x25, x26, [sp, 64]
+	.loc 3 39 0
+	adrp	x22, .LANCHOR79
+	.loc 3 12 0
+	str	x27, [sp, 80]
+	.cfi_offset 25, -32
+	.cfi_offset 26, -24
+	.cfi_offset 27, -16
+	.loc 3 16 0
+	bl	sprintf
+.LVL318:
+	add	x20, x21, x0, sxtw
+.LVL319:
+	.loc 3 17 0
+	adrp	x0, .LANCHOR26
+	adrp	x1, .LC3
+	add	x1, x1, :lo12:.LC3
+	ldr	w2, [x0, #:lo12:.LANCHOR26]
+	mov	x0, x20
+	.loc 3 39 0
+	add	x22, x22, :lo12:.LANCHOR79
+	.loc 3 50 0
+	adrp	x24, .LANCHOR51
+	.loc 3 67 0
+	adrp	x25, .LANCHOR82
+	.loc 3 17 0
+	bl	sprintf
+.LVL320:
+	add	x20, x20, x0, sxtw
+.LVL321:
+	.loc 3 18 0
+	mov	x0, x20
+	adrp	x1, .LC4
+	add	x1, x1, :lo12:.LC4
+	bl	sprintf
+.LVL322:
+	add	x20, x20, x0, sxtw
+.LVL323:
+	.loc 3 19 0
+	adrp	x0, .LANCHOR62
+	adrp	x1, .LC5
+	add	x1, x1, :lo12:.LC5
+	ldr	w2, [x0, #:lo12:.LANCHOR62]
+	mov	x0, x20
+	bl	sprintf
+.LVL324:
+	add	x20, x20, x0, sxtw
+.LVL325:
+	.loc 3 20 0
+	adrp	x0, .LANCHOR60
+	adrp	x1, .LC6
+	add	x1, x1, :lo12:.LC6
+	ldr	w2, [x0, #:lo12:.LANCHOR60]
+	mov	x0, x20
+	bl	sprintf
+.LVL326:
+	add	x20, x20, x0, sxtw
+.LVL327:
+	.loc 3 21 0
+	adrp	x0, .LANCHOR63
+	adrp	x1, .LC7
+	add	x1, x1, :lo12:.LC7
+	ldr	w2, [x0, #:lo12:.LANCHOR63]
+	mov	x0, x20
+	bl	sprintf
+.LVL328:
+	add	x20, x20, x0, sxtw
+.LVL329:
+	.loc 3 22 0
+	adrp	x0, .LANCHOR64
+	adrp	x1, .LC8
+	add	x1, x1, :lo12:.LC8
+	ldr	w2, [x0, #:lo12:.LANCHOR64]
+	mov	x0, x20
+	bl	sprintf
+.LVL330:
+	add	x20, x20, x0, sxtw
+.LVL331:
+	.loc 3 23 0
+	adrp	x0, .LANCHOR65
+	adrp	x1, .LC9
+	add	x1, x1, :lo12:.LC9
+	ldr	w2, [x0, #:lo12:.LANCHOR65]
+	mov	x0, x20
+	bl	sprintf
+.LVL332:
+	add	x20, x20, x0, sxtw
+.LVL333:
+	.loc 3 24 0
+	adrp	x0, .LANCHOR66
+	adrp	x1, .LC10
+	add	x1, x1, :lo12:.LC10
+	ldr	w2, [x0, #:lo12:.LANCHOR66]
+	mov	x0, x20
+	bl	sprintf
+.LVL334:
+	add	x20, x20, x0, sxtw
+.LVL335:
+	.loc 3 25 0
+	adrp	x0, .LANCHOR67
+	adrp	x1, .LC11
+	add	x1, x1, :lo12:.LC11
+	ldr	w2, [x0, #:lo12:.LANCHOR67]
+	mov	x0, x20
+	bl	sprintf
+.LVL336:
+	add	x20, x20, x0, sxtw
+.LVL337:
+	.loc 3 26 0
+	adrp	x0, .LANCHOR68
+	adrp	x1, .LC12
+	add	x1, x1, :lo12:.LC12
+	ldr	w2, [x0, #:lo12:.LANCHOR68]
+	mov	x0, x20
+	bl	sprintf
+.LVL338:
+	add	x20, x20, x0, sxtw
+.LVL339:
+	.loc 3 27 0
+	adrp	x0, .LANCHOR69
+	adrp	x1, .LC13
+	add	x1, x1, :lo12:.LC13
+	ldr	w2, [x0, #:lo12:.LANCHOR69]
+	mov	x0, x20
+	lsr	w2, w2, 11
+	bl	sprintf
+.LVL340:
+	add	x20, x20, x0, sxtw
+.LVL341:
+	.loc 3 28 0
+	adrp	x0, .LANCHOR70
+	adrp	x1, .LC14
+	add	x1, x1, :lo12:.LC14
+	ldr	w2, [x0, #:lo12:.LANCHOR70]
+	mov	x0, x20
+	lsr	w2, w2, 11
+	bl	sprintf
+.LVL342:
+	add	x20, x20, x0, sxtw
+.LVL343:
+	.loc 3 29 0
+	adrp	x0, .LANCHOR71
+	adrp	x1, .LC15
+	add	x1, x1, :lo12:.LC15
+	ldr	w2, [x0, #:lo12:.LANCHOR71]
+	mov	x0, x20
+	bl	sprintf
+.LVL344:
+	add	x20, x20, x0, sxtw
+.LVL345:
+	.loc 3 30 0
+	adrp	x0, .LANCHOR72
+	adrp	x1, .LC16
+	add	x1, x1, :lo12:.LC16
+	ldr	w2, [x0, #:lo12:.LANCHOR72]
+	mov	x0, x20
+	bl	sprintf
+.LVL346:
+	add	x20, x20, x0, sxtw
+.LVL347:
+	.loc 3 31 0
+	add	x0, x19, :lo12:.LANCHOR37
+	adrp	x1, .LC17
+	add	x1, x1, :lo12:.LC17
+	ldrh	w2, [x0, 6]
+	mov	x0, x20
+	bl	sprintf
+.LVL348:
+	add	x20, x20, x0, sxtw
+.LVL349:
+	.loc 3 32 0
+	ldrh	w2, [x23, #:lo12:.LANCHOR48]
+	mov	x0, x20
+	adrp	x1, .LC18
+	add	x1, x1, :lo12:.LC18
+	bl	sprintf
+.LVL350:
+	add	x20, x20, x0, sxtw
+.LVL351:
+	.loc 3 33 0
+	adrp	x0, .LANCHOR73
+	adrp	x1, .LC19
+	add	x1, x1, :lo12:.LC19
+	ldr	w2, [x0, #:lo12:.LANCHOR73]
+	mov	x0, x20
+	bl	sprintf
+.LVL352:
+	add	x20, x20, x0, sxtw
+.LVL353:
+	.loc 3 34 0
+	adrp	x0, .LANCHOR74
+	adrp	x1, .LC20
+	add	x1, x1, :lo12:.LC20
+	ldr	w2, [x0, #:lo12:.LANCHOR74]
+	mov	x0, x20
+	bl	sprintf
+.LVL354:
+	add	x20, x20, x0, sxtw
+.LVL355:
+	.loc 3 35 0
+	adrp	x0, .LANCHOR75
+	adrp	x1, .LC21
+	add	x1, x1, :lo12:.LC21
+	ldr	w2, [x0, #:lo12:.LANCHOR75]
+	mov	x0, x20
+	bl	sprintf
+.LVL356:
+	add	x20, x20, x0, sxtw
+.LVL357:
+	.loc 3 36 0
+	adrp	x0, .LANCHOR76
+	adrp	x1, .LC22
+	add	x1, x1, :lo12:.LC22
+	ldr	w2, [x0, #:lo12:.LANCHOR76]
+	mov	x0, x20
+	bl	sprintf
+.LVL358:
+	add	x20, x20, x0, sxtw
+.LVL359:
+	.loc 3 37 0
+	adrp	x0, .LANCHOR77
+	adrp	x1, .LC23
+	add	x1, x1, :lo12:.LC23
+	ldr	w2, [x0, #:lo12:.LANCHOR77]
+	mov	x0, x20
+	bl	sprintf
+.LVL360:
+	add	x20, x20, x0, sxtw
+.LVL361:
+	.loc 3 38 0
+	adrp	x0, .LANCHOR78
+	adrp	x1, .LC24
+	add	x1, x1, :lo12:.LC24
+	ldr	w2, [x0, #:lo12:.LANCHOR78]
+	mov	x0, x20
+	bl	sprintf
+.LVL362:
+	add	x20, x20, x0, sxtw
+.LVL363:
+	.loc 3 39 0
+	ldrh	w2, [x22, 30]
+	mov	x0, x20
+	adrp	x1, .LC25
+	add	x1, x1, :lo12:.LC25
+	bl	sprintf
+.LVL364:
+	add	x20, x20, x0, sxtw
+.LVL365:
+	.loc 3 40 0
+	ldrh	w2, [x22, 28]
+	mov	x0, x20
+	adrp	x1, .LC26
+	add	x1, x1, :lo12:.LC26
+	.loc 3 55 0
+	adrp	x22, .LANCHOR43
+	.loc 3 40 0
+	bl	sprintf
+.LVL366:
+	add	x20, x20, x0, sxtw
+.LVL367:
+	.loc 3 41 0
+	adrp	x0, .LANCHOR34
+	adrp	x1, .LC27
+	add	x1, x1, :lo12:.LC27
+	ldr	w2, [x0, #:lo12:.LANCHOR34]
+	mov	x0, x20
+	bl	sprintf
+.LVL368:
+	add	x20, x20, x0, sxtw
+.LVL369:
+	.loc 3 42 0
+	adrp	x0, .LANCHOR31
+	adrp	x1, .LC28
+	add	x1, x1, :lo12:.LC28
+	ldr	w2, [x0, #:lo12:.LANCHOR31]
+	mov	x0, x20
+	bl	sprintf
+.LVL370:
+	add	x20, x20, x0, sxtw
+.LVL371:
+	.loc 3 43 0
+	adrp	x0, .LANCHOR2
+	adrp	x1, .LC29
+	add	x1, x1, :lo12:.LC29
+	ldr	w2, [x0, #:lo12:.LANCHOR2]
+	mov	x0, x20
+	bl	sprintf
+.LVL372:
+	add	x20, x20, x0, sxtw
+.LVL373:
+	.loc 3 44 0
+	adrp	x0, .LANCHOR38+6
+	adrp	x1, .LC30
+	add	x1, x1, :lo12:.LC30
+	ldrh	w2, [x0, #:lo12:.LANCHOR38+6]
+	mov	x0, x20
+	bl	sprintf
+.LVL374:
+	add	x20, x20, x0, sxtw
+.LVL375:
+	.loc 3 45 0
+	adrp	x0, .LANCHOR5
+	adrp	x1, .LC31
+	add	x1, x1, :lo12:.LC31
+	ldrh	w2, [x0, #:lo12:.LANCHOR5]
+	mov	x0, x20
+	bl	sprintf
+.LVL376:
+	add	x20, x20, x0, sxtw
+.LVL377:
+	.loc 3 46 0
+	adrp	x0, .LANCHOR80
+	adrp	x1, .LC32
+	add	x1, x1, :lo12:.LC32
+	ldrh	w2, [x0, #:lo12:.LANCHOR80]
+	mov	x0, x20
+	bl	sprintf
+.LVL378:
+	add	x20, x20, x0, sxtw
+.LVL379:
+	.loc 3 47 0
+	adrp	x0, .LANCHOR7
+	adrp	x1, .LC33
+	add	x1, x1, :lo12:.LC33
+	ldr	w2, [x0, #:lo12:.LANCHOR7]
+	mov	x0, x20
+	bl	sprintf
+.LVL380:
+	add	x20, x20, x0, sxtw
+.LVL381:
+	.loc 3 48 0
+	adrp	x0, .LANCHOR81
+	adrp	x1, .LC34
+	add	x1, x1, :lo12:.LC34
+	ldrh	w2, [x0, #:lo12:.LANCHOR81]
+	mov	x0, x20
+	bl	sprintf
+.LVL382:
+	add	x20, x20, x0, sxtw
+.LVL383:
+	.loc 3 49 0
+	ldrh	w2, [x19, #:lo12:.LANCHOR37]
+	.loc 3 50 0
+	add	x19, x24, :lo12:.LANCHOR51
+	.loc 3 49 0
+	mov	x0, x20
+	adrp	x1, .LC35
+	add	x1, x1, :lo12:.LC35
+	bl	sprintf
+.LVL384:
+	add	x20, x20, x0, sxtw
+.LVL385:
+	.loc 3 50 0
+	ldrh	w2, [x19, 2]
+	mov	x0, x20
+	adrp	x1, .LC36
+	add	x1, x1, :lo12:.LC36
+	bl	sprintf
+.LVL386:
+	add	x20, x20, x0, sxtw
+.LVL387:
+	.loc 3 51 0
+	ldrb	w2, [x19, 6]
+	mov	x0, x20
+	adrp	x1, .LC37
+	add	x1, x1, :lo12:.LC37
+	bl	sprintf
+.LVL388:
+	add	x20, x20, x0, sxtw
+.LVL389:
+	.loc 3 52 0
+	ldrh	w2, [x24, #:lo12:.LANCHOR51]
+	mov	x0, x20
+	adrp	x1, .LC38
+	add	x1, x1, :lo12:.LC38
+	bl	sprintf
+.LVL390:
+	add	x20, x20, x0, sxtw
+.LVL391:
+	.loc 3 53 0
+	ldrb	w2, [x19, 8]
+	mov	x0, x20
+	adrp	x1, .LC39
+	add	x1, x1, :lo12:.LC39
+	bl	sprintf
+.LVL392:
+	add	x20, x20, x0, sxtw
+.LVL393:
+	.loc 3 54 0
+	ldrh	w2, [x19, 4]
+	mov	x0, x20
+	adrp	x1, .LC40
+	add	x1, x1, :lo12:.LC40
+	bl	sprintf
+.LVL394:
+	add	x20, x20, x0, sxtw
+.LVL395:
+	.loc 3 55 0
+	ldrh	w1, [x24, #:lo12:.LANCHOR51]
+	.loc 3 56 0
+	adrp	x24, .LANCHOR52
+	.loc 3 55 0
+	ldr	x0, [x22, #:lo12:.LANCHOR43]
+	.loc 3 56 0
+	add	x19, x24, :lo12:.LANCHOR52
+	.loc 3 55 0
+	ldrh	w2, [x0, x1, lsl 1]
+	mov	x0, x20
+	adrp	x1, .LC41
+	add	x1, x1, :lo12:.LC41
+	bl	sprintf
+.LVL396:
+	add	x20, x20, x0, sxtw
+.LVL397:
+	.loc 3 56 0
+	ldrh	w2, [x19, 2]
+	mov	x0, x20
+	adrp	x1, .LC42
+	add	x1, x1, :lo12:.LC42
+	bl	sprintf
+.LVL398:
+	add	x20, x20, x0, sxtw
+.LVL399:
+	.loc 3 57 0
+	ldrb	w2, [x19, 6]
+	mov	x0, x20
+	adrp	x1, .LC43
+	add	x1, x1, :lo12:.LC43
+	bl	sprintf
+.LVL400:
+	add	x20, x20, x0, sxtw
+.LVL401:
+	.loc 3 58 0
+	ldrh	w2, [x24, #:lo12:.LANCHOR52]
+	mov	x0, x20
+	adrp	x1, .LC44
+	add	x1, x1, :lo12:.LC44
+	bl	sprintf
+.LVL402:
+	add	x20, x20, x0, sxtw
+.LVL403:
+	.loc 3 59 0
+	ldrb	w2, [x19, 8]
+	mov	x0, x20
+	adrp	x1, .LC45
+	add	x1, x1, :lo12:.LC45
+	bl	sprintf
+.LVL404:
+	add	x20, x20, x0, sxtw
+.LVL405:
+	.loc 3 60 0
+	ldrh	w2, [x19, 4]
+	mov	x0, x20
+	adrp	x1, .LC46
+	add	x1, x1, :lo12:.LC46
+	bl	sprintf
+.LVL406:
+	add	x20, x20, x0, sxtw
+.LVL407:
+	.loc 3 61 0
+	ldrh	w1, [x24, #:lo12:.LANCHOR52]
+	.loc 3 62 0
+	adrp	x24, .LANCHOR53
+	.loc 3 61 0
+	ldr	x0, [x22, #:lo12:.LANCHOR43]
+	.loc 3 62 0
+	add	x19, x24, :lo12:.LANCHOR53
+	.loc 3 61 0
+	ldrh	w2, [x0, x1, lsl 1]
+	mov	x0, x20
+	adrp	x1, .LC47
+	add	x1, x1, :lo12:.LC47
+	bl	sprintf
+.LVL408:
+	add	x20, x20, x0, sxtw
+.LVL409:
+	.loc 3 62 0
+	ldrh	w2, [x19, 2]
+	mov	x0, x20
+	adrp	x1, .LC48
+	add	x1, x1, :lo12:.LC48
+	bl	sprintf
+.LVL410:
+	add	x20, x20, x0, sxtw
+.LVL411:
+	.loc 3 63 0
+	ldrb	w2, [x19, 6]
+	mov	x0, x20
+	adrp	x1, .LC49
+	add	x1, x1, :lo12:.LC49
+	bl	sprintf
+.LVL412:
+	add	x20, x20, x0, sxtw
+.LVL413:
+	.loc 3 64 0
+	ldrh	w2, [x24, #:lo12:.LANCHOR53]
+	mov	x0, x20
+	adrp	x1, .LC50
+	add	x1, x1, :lo12:.LC50
+	.loc 3 72 0
+	adrp	x24, .LANCHOR83
+	add	x24, x24, :lo12:.LANCHOR83
+	.loc 3 64 0
+	bl	sprintf
+.LVL414:
+	add	x20, x20, x0, sxtw
+.LVL415:
+	.loc 3 65 0
+	ldrb	w2, [x19, 8]
+	mov	x0, x20
+	adrp	x1, .LC51
+	add	x1, x1, :lo12:.LC51
+	bl	sprintf
+.LVL416:
+	add	x20, x20, x0, sxtw
+.LVL417:
+	.loc 3 66 0
+	ldrh	w2, [x19, 4]
+	.loc 3 67 0
+	add	x19, x25, :lo12:.LANCHOR82
+	.loc 3 66 0
+	mov	x0, x20
+	adrp	x1, .LC52
+	add	x1, x1, :lo12:.LC52
+	bl	sprintf
+.LVL418:
+	add	x20, x20, x0, sxtw
+.LVL419:
+	.loc 3 67 0
+	ldrh	w2, [x19, 2]
+	mov	x0, x20
+	adrp	x1, .LC53
+	add	x1, x1, :lo12:.LC53
+	bl	sprintf
+.LVL420:
+	add	x20, x20, x0, sxtw
+.LVL421:
+	.loc 3 68 0
+	ldrb	w2, [x19, 6]
+	mov	x0, x20
+	adrp	x1, .LC54
+	add	x1, x1, :lo12:.LC54
+	bl	sprintf
+.LVL422:
+	add	x20, x20, x0, sxtw
+.LVL423:
+	.loc 3 69 0
+	ldrh	w2, [x25, #:lo12:.LANCHOR82]
+	mov	x0, x20
+	adrp	x1, .LC55
+	add	x1, x1, :lo12:.LC55
+	bl	sprintf
+.LVL424:
+	add	x20, x20, x0, sxtw
+.LVL425:
+	.loc 3 70 0
+	ldrb	w2, [x19, 8]
+	mov	x0, x20
+	adrp	x1, .LC56
+	add	x1, x1, :lo12:.LC56
+	bl	sprintf
+.LVL426:
+	add	x20, x20, x0, sxtw
+.LVL427:
+	.loc 3 71 0
+	ldrh	w2, [x19, 4]
+	mov	x0, x20
+	adrp	x1, .LC57
+	add	x1, x1, :lo12:.LC57
+	bl	sprintf
+.LVL428:
+	add	x20, x20, x0, sxtw
+.LVL429:
+	.loc 3 72 0
+	ldp	w4, w2, [x24, 76]
+	adrp	x1, .LC58
+	ldr	w3, [x24, 84]
+	add	x1, x1, :lo12:.LC58
+	mov	x0, x20
+	bl	sprintf
+.LVL430:
+	add	x19, x20, x0, sxtw
+.LVL431:
+	.loc 3 73 0
+	ldr	w2, [x24, 72]
+	mov	x0, x19
+	adrp	x1, .LC59
+	add	x1, x1, :lo12:.LC59
+	bl	sprintf
+.LVL432:
+	add	x19, x19, x0, sxtw
+.LVL433:
+	.loc 3 74 0
+	ldr	w2, [x24, 96]
+	mov	x0, x19
+	adrp	x1, .LC60
+	add	x1, x1, :lo12:.LC60
+	bl	sprintf
+.LVL434:
+	add	x19, x19, x0, sxtw
+.LVL435:
+	.loc 3 75 0
+	adrp	x0, .LANCHOR84
+	adrp	x1, .LC61
+	add	x1, x1, :lo12:.LC61
+	ldrh	w2, [x0, #:lo12:.LANCHOR84]
+	mov	x0, x19
+	bl	sprintf
+.LVL436:
+	add	x19, x19, x0, sxtw
+.LVL437:
+	.loc 3 76 0
+	adrp	x0, .LANCHOR85
+	adrp	x1, .LC62
+	add	x1, x1, :lo12:.LC62
+	ldrh	w2, [x0, #:lo12:.LANCHOR85]
+	mov	x0, x19
+	bl	sprintf
+.LVL438:
+	add	x19, x19, x0, sxtw
+.LVL439:
+	.loc 3 77 0
+	adrp	x0, .LANCHOR86
+	adrp	x1, .LC63
+	add	x1, x1, :lo12:.LC63
+	ldr	w2, [x0, #:lo12:.LANCHOR86]
+	mov	x0, x19
+	bl	sprintf
+.LVL440:
+	add	x19, x19, x0, sxtw
+.LVL441:
+	.loc 3 78 0
+	adrp	x0, .LANCHOR87
+	adrp	x1, .LC64
+	add	x1, x1, :lo12:.LC64
+	ldrh	w2, [x0, #:lo12:.LANCHOR87]
+	mov	x0, x19
+	bl	sprintf
+.LVL442:
+	add	x19, x19, x0, sxtw
+.LVL443:
+	.loc 3 79 0
+	bl	GetFreeBlockMinEraseCount
+.LVL444:
+	and	w2, w0, 65535
+	adrp	x1, .LC65
+	mov	x0, x19
+	add	x1, x1, :lo12:.LC65
+	bl	sprintf
+.LVL445:
+	add	x19, x19, x0, sxtw
+.LVL446:
+	.loc 3 80 0
+	ldrh	w0, [x23, #:lo12:.LANCHOR48]
+	bl	GetFreeBlockMaxEraseCount
+.LVL447:
+	and	w2, w0, 65535
+	adrp	x1, .LC66
+	mov	x0, x19
+	add	x1, x1, :lo12:.LC66
+	bl	sprintf
+.LVL448:
+	add	x19, x19, x0, sxtw
+.LVL449:
+	.loc 3 81 0
+	adrp	x0, .LANCHOR88
+	ldr	w0, [x0, #:lo12:.LANCHOR88]
+	cmp	w0, 1
+	beq	.L212
+.L217:
+	.loc 3 104 0
+	sub	w0, w19, w21
+	.loc 3 105 0
+	ldr	x27, [sp, 80]
+	ldp	x19, x20, [sp, 16]
+.LVL450:
+	ldp	x21, x22, [sp, 32]
+.LVL451:
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL452:
+.L212:
+	.cfi_restore_state
+	.loc 3 84 0
+	ldrh	w0, [x25, #:lo12:.LANCHOR82]
+	mov	w1, 65535
+	cmp	w0, w1
+	beq	.L214
+	.loc 3 85 0
+	ldr	x1, [x22, #:lo12:.LANCHOR43]
+	ubfiz	x0, x0, 1, 16
+	ldrh	w2, [x1, x0]
+	mov	x0, x19
+	adrp	x1, .LC67
+	add	x1, x1, :lo12:.LC67
+	bl	sprintf
+.LVL453:
+	add	x19, x19, x0, sxtw
+.LVL454:
+.L214:
+.LBB203:
+	.loc 3 87 0
+	mov	w0, 0
+	.loc 3 91 0
+	adrp	x24, .LC68
+	.loc 3 87 0
+	bl	List_get_gc_head_node
+.LVL455:
+	.loc 3 91 0
+	add	x24, x24, :lo12:.LC68
+	.loc 3 87 0
+	and	w3, w0, 65535
+.LVL456:
+	.loc 3 88 0
+	mov	w23, 0
+	.loc 3 89 0
+	mov	w27, 65535
+	adrp	x20, .LANCHOR41
+	.loc 3 91 0
+	mov	w26, 6
+.LVL457:
+.L216:
+	.loc 3 89 0
+	cmp	w3, w27
+	beq	.L215
+	.loc 3 91 0 discriminator 2
+	adrp	x0, .LANCHOR40
+	umull	x25, w3, w26
+	ldr	x2, [x22, #:lo12:.LANCHOR43]
+	ubfiz	x1, x3, 1, 16
+	ldr	x4, [x0, #:lo12:.LANCHOR40]
+	ldr	x0, [x20, #:lo12:.LANCHOR41]
+	add	x0, x0, x25
+	ldrh	w6, [x4, x1]
+	ldrh	w4, [x2, x1]
+	mov	w2, w23
+	ldrh	w5, [x0, 4]
+	mov	x1, x24
+	mov	x0, x19
+	.loc 3 88 0 discriminator 2
+	add	w23, w23, 1
+.LVL458:
+	.loc 3 91 0 discriminator 2
+	bl	sprintf
+.LVL459:
+	add	x19, x19, x0, sxtw
+.LVL460:
+	.loc 3 92 0 discriminator 2
+	ldr	x0, [x20, #:lo12:.LANCHOR41]
+	.loc 3 88 0 discriminator 2
+	cmp	w23, 16
+	.loc 3 92 0 discriminator 2
+	ldrh	w3, [x0, x25]
+.LVL461:
+	.loc 3 88 0 discriminator 2
+	bne	.L216
+.L215:
+.LBE203:
+.LBB204:
+	.loc 3 96 0
+	adrp	x0, .LANCHOR47
+	.loc 3 100 0
+	adrp	x23, .LC69
+.LVL462:
+	add	x23, x23, :lo12:.LC69
+	.loc 3 97 0
+	mov	w22, 0
+	.loc 3 96 0
+	ldr	x3, [x0, #:lo12:.LANCHOR47]
+.LVL463:
+	.loc 3 98 0
+	mov	w25, 65535
+	.loc 3 96 0
+	ldr	x0, [x20, #:lo12:.LANCHOR41]
+	.loc 3 100 0
+	mov	w26, 6
+	adrp	x27, .LANCHOR40
+	.loc 3 96 0
+	sub	x3, x3, x0
+	mov	x0, -6148914691236517206
+	asr	x3, x3, 1
+	movk	x0, 0xaaab, lsl 0
+	mul	x3, x3, x0
+	and	w3, w3, 65535
+.LVL464:
+.L218:
+	.loc 3 98 0
+	cmp	w3, w25
+	beq	.L217
+	.loc 3 100 0 discriminator 2
+	umull	x24, w3, w26
+	ldr	x0, [x20, #:lo12:.LANCHOR41]
+	ldr	x2, [x27, #:lo12:.LANCHOR40]
+	ubfiz	x1, x3, 1, 16
+	add	x0, x0, x24
+	ldrh	w5, [x2, x1]
+	mov	w2, w22
+	ldrh	w4, [x0, 4]
+	mov	x1, x23
+	mov	x0, x19
+	.loc 3 97 0 discriminator 2
+	add	w22, w22, 1
+.LVL465:
+	.loc 3 100 0 discriminator 2
+	bl	sprintf
+.LVL466:
+	add	x19, x19, x0, sxtw
+.LVL467:
+	.loc 3 97 0 discriminator 2
+	cmp	w22, 4
+	beq	.L217
+	.loc 3 101 0
+	ldr	x0, [x20, #:lo12:.LANCHOR41]
+	ldrh	w3, [x0, x24]
+	b	.L218
+.LBE204:
+	.cfi_endproc
+.LFE200:
+	.size	FtlPrintInfo2buf, .-FtlPrintInfo2buf
+	.section	.text.rknand_proc_ftlread,"ax",@progbits
+	.align	2
+	.global	rknand_proc_ftlread
+	.type	rknand_proc_ftlread, %function
+rknand_proc_ftlread:
+.LFB201:
+	.loc 3 114 0
+	.cfi_startproc
+.LVL468:
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	.loc 3 120 0
+	adrp	x2, .LC70
+	adrp	x1, .LC71
+	add	x2, x2, :lo12:.LC70
+	.loc 3 114 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 3 120 0
+	add	x1, x1, :lo12:.LC71
+	.loc 3 114 0
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -16
+	.cfi_offset 20, -8
+	.loc 3 114 0
+	mov	x20, x0
+.LVL469:
+	.loc 3 120 0
+	bl	sprintf
+.LVL470:
+	add	x19, x20, x0, sxtw
+.LVL471:
+	.loc 3 122 0
+	mov	x0, x19
+	bl	FtlPrintInfo2buf
+.LVL472:
+	add	x0, x19, x0, sxtw
+.LVL473:
+	.loc 3 124 0
+	sub	w0, w0, w20
+.LVL474:
+	ldp	x19, x20, [sp, 16]
+.LVL475:
+	ldp	x29, x30, [sp], 32
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE201:
+	.size	rknand_proc_ftlread, .-rknand_proc_ftlread
+	.section	.text.GetSwlReplaceBlock,"ax",@progbits
+	.align	2
+	.global	GetSwlReplaceBlock
+	.type	GetSwlReplaceBlock, %function
+GetSwlReplaceBlock:
+.LFB296:
+	.loc 2 2447 0
+	.cfi_startproc
+.LVL476:
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	.loc 2 2456 0
+	adrp	x2, .LANCHOR75
+	adrp	x10, .LANCHOR78
+	.loc 2 2447 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	str	x19, [sp, 16]
+	.cfi_offset 19, -16
+	.loc 2 2456 0
+	ldr	w3, [x2, #:lo12:.LANCHOR75]
+	ldr	w7, [x10, #:lo12:.LANCHOR78]
+	cmp	w3, w7
+	bcs	.L227
+	.loc 2 2459 0
+	adrp	x1, .LANCHOR5
+	.loc 2 2458 0
+	adrp	x0, .LANCHOR73
+	.loc 2 2459 0
+	mov	w5, 0
+	mov	w4, 0
+	ldrh	w3, [x1, #:lo12:.LANCHOR5]
+	.loc 2 2460 0
+	adrp	x1, .LANCHOR40
+	.loc 2 2458 0
+	str	wzr, [x0, #:lo12:.LANCHOR73]
+.LVL477:
+	.loc 2 2460 0
+	ldr	x6, [x1, #:lo12:.LANCHOR40]
+	.loc 2 2459 0
+	mov	x1, 0
+.LVL478:
+.L228:
+	.loc 2 2459 0 is_stmt 0 discriminator 1
+	cmp	w3, w1
+	bhi	.L229
+	cbz	w5, .L230
+	str	w4, [x0, #:lo12:.LANCHOR73]
+.L230:
+	.loc 2 2461 0 is_stmt 1
+	ldr	w1, [x0, #:lo12:.LANCHOR73]
+.LVL479:
+	udiv	w3, w1, w3
+	str	w3, [x2, #:lo12:.LANCHOR75]
+	.loc 2 2462 0
+	adrp	x3, .LANCHOR74
+	ldr	w3, [x3, #:lo12:.LANCHOR74]
+	sub	w1, w1, w3
+	adrp	x3, .LANCHOR14
+	ldrh	w3, [x3, #:lo12:.LANCHOR14]
+	udiv	w1, w1, w3
+	str	w1, [x0, #:lo12:.LANCHOR73]
+.L231:
+	.loc 2 2468 0
+	ldr	w8, [x2, #:lo12:.LANCHOR75]
+	add	w0, w7, 256
+	cmp	w0, w8
+	bls	.L236
+	.loc 2 2468 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR77
+	add	w0, w7, 768
+	ldr	w1, [x1, #:lo12:.LANCHOR77]
+	cmp	w0, w1
+	bls	.L236
+.LVL480:
+.L239:
+	.loc 2 2469 0 is_stmt 1
+	mov	w19, 65535
+.L237:
+	.loc 2 2518 0
+	mov	w0, w19
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_def_cfa 31, 0
+	ret
+.LVL481:
+.L229:
+	.cfi_restore_state
+	.loc 2 2460 0 discriminator 3
+	ldrh	w5, [x6, x1, lsl 1]
+	add	x1, x1, 1
+.LVL482:
+	add	w4, w4, w5
+	mov	w5, 1
+	b	.L228
+.L227:
+	.loc 2 2463 0
+	adrp	x1, .LANCHOR77
+	ldr	w0, [x1, #:lo12:.LANCHOR77]
+	cmp	w3, w0
+	bls	.L231
+	.loc 2 2464 0
+	add	w0, w0, 1
+	str	w0, [x1, #:lo12:.LANCHOR77]
+.LVL483:
+	.loc 2 2466 0
+	adrp	x0, .LANCHOR40
+	.loc 2 2465 0
+	adrp	x1, .LANCHOR5
+	add	x1, x1, :lo12:.LANCHOR5
+	.loc 2 2466 0
+	ldr	x4, [x0, #:lo12:.LANCHOR40]
+	.loc 2 2465 0
+	mov	w0, 0
+.LVL484:
+.L233:
+	.loc 2 2465 0 is_stmt 0 discriminator 1
+	ldrh	w3, [x1]
+	cmp	w0, w3
+	bcs	.L231
+	.loc 2 2466 0 is_stmt 1 discriminator 3
+	ubfiz	x5, x0, 1, 32
+	.loc 2 2465 0 discriminator 3
+	add	w0, w0, 1
+.LVL485:
+	.loc 2 2466 0 discriminator 3
+	ldrh	w3, [x4, x5]
+	add	w3, w3, 1
+	strh	w3, [x4, x5]
+	b	.L233
+.LVL486:
+.L236:
+	.loc 2 2471 0
+	adrp	x0, .LANCHOR48
+	ldrh	w0, [x0, #:lo12:.LANCHOR48]
+	add	w0, w0, w0, lsl 1
+	lsr	w0, w0, 2
+	bl	GetFreeBlockMaxEraseCount
+.LVL487:
+	and	w6, w0, 65535
+.LVL488:
+	.loc 2 2472 0
+	add	w0, w7, 64
+.LVL489:
+	cmp	w6, w0
+	bcs	.L238
+	.loc 2 2472 0 is_stmt 0 discriminator 1
+	cmp	w7, 30
+	bhi	.L239
+.L238:
+	.loc 2 2476 0 is_stmt 1
+	adrp	x0, .LANCHOR42
+	ldr	x0, [x0, #:lo12:.LANCHOR42]
+	cbz	x0, .L239
+	.loc 2 2483 0
+	adrp	x1, .LANCHOR41
+	.loc 2 2484 0
+	mov	w3, 65535
+	.loc 2 2483 0
+	mov	x12, -6148914691236517206
+	.loc 2 2484 0
+	mov	w2, w3
+	.loc 2 2483 0
+	ldr	x5, [x1, #:lo12:.LANCHOR41]
+	.loc 2 2484 0
+	adrp	x1, .LANCHOR40
+	.loc 2 2479 0
+	mov	w11, w3
+	.loc 2 2483 0
+	movk	x12, 0xaaab, lsl 0
+	.loc 2 2484 0
+	ldr	x1, [x1, #:lo12:.LANCHOR40]
+	.loc 2 2495 0
+	mov	w13, 6
+.LVL490:
+.L240:
+	.loc 2 2479 0
+	ldrh	w4, [x0]
+	cmp	w4, w11
+	bne	.L243
+	mov	w19, w2
+.LVL491:
+.L242:
+	.loc 2 2498 0
+	mov	w0, 65535
+	cmp	w19, w0
+	beq	.L239
+	.loc 2 2500 0
+	ubfiz	x2, x19, 1, 32
+	ldrh	w5, [x1, x2]
+.LVL492:
+	.loc 2 2501 0
+	cmp	w7, w5
+	bcs	.L244
+	.loc 2 2503 0
+	bl	GetFreeBlockMinEraseCount
+.LVL493:
+	cmp	w7, w0, uxth
+	bcs	.L244
+	.loc 2 2504 0
+	str	w3, [x10, #:lo12:.LANCHOR78]
+.L244:
+	.loc 2 2506 0
+	cmp	w8, w5
+	bls	.L239
+	.loc 2 2506 0 is_stmt 0 discriminator 1
+	add	w0, w5, 128
+	cmp	w6, w0
+	ble	.L239
+	.loc 2 2508 0 is_stmt 1
+	add	w0, w5, 256
+	adrp	x1, .LANCHOR77
+	cmp	w8, w0
+	bhi	.L245
+	.loc 2 2508 0 is_stmt 0 discriminator 1
+	ldr	w3, [x1, #:lo12:.LANCHOR77]
+.LVL494:
+	add	w0, w5, 768
+	cmp	w0, w3
+	bcs	.L239
+.L245:
+	.loc 2 2510 0 is_stmt 1
+	adrp	x0, .LANCHOR43
+	ldr	w3, [x1, #:lo12:.LANCHOR77]
+	mov	w1, w19
+	ldr	x0, [x0, #:lo12:.LANCHOR43]
+	ldrh	w4, [x0, x2]
+	mov	w2, w8
+	adrp	x0, .LC72
+	add	x0, x0, :lo12:.LC72
+	bl	printf
+.LVL495:
+	.loc 2 2511 0
+	adrp	x0, .LANCHOR89
+	mov	w1, 1
+	str	w1, [x0, #:lo12:.LANCHOR89]
+	.loc 2 2512 0
+	b	.L237
+.LVL496:
+.L243:
+	.loc 2 2481 0
+	ldrh	w14, [x0, 4]
+	cbz	w14, .L241
+	.loc 2 2483 0
+	sub	x0, x0, x5
+.LVL497:
+	asr	x0, x0, 1
+	mul	x0, x0, x12
+	and	w19, w0, 65535
+.LVL498:
+	.loc 2 2484 0
+	and	x0, x0, 65535
+	ldrh	w0, [x1, x0, lsl 1]
+	cmp	w7, w0
+	bcs	.L242
+	.loc 2 2489 0
+	cmp	w3, w0
+	bls	.L241
+	mov	w3, w0
+.LVL499:
+	.loc 2 2483 0
+	mov	w2, w19
+.LVL500:
+.L241:
+	.loc 2 2495 0
+	umaddl	x0, w4, w13, x5
+.LVL501:
+	b	.L240
+	.cfi_endproc
+.LFE296:
+	.size	GetSwlReplaceBlock, .-GetSwlReplaceBlock
+	.section	.text.free_data_superblock,"ax",@progbits
+	.align	2
+	.global	free_data_superblock
+	.type	free_data_superblock, %function
+free_data_superblock:
+.LFB297:
+	.loc 2 2522 0
+	.cfi_startproc
+.LVL502:
+	and	w0, w0, 65535
+	.loc 2 2523 0
+	mov	w1, 65535
+	cmp	w0, w1
+	beq	.L259
+.LVL503:
+	.loc 2 2522 0
+	stp	x29, x30, [sp, -16]!
+	.cfi_def_cfa_offset 16
+	.cfi_offset 29, -16
+	.cfi_offset 30, -8
+.LBB207:
+.LBB208:
+	.loc 2 2525 0
+	adrp	x2, .LANCHOR43
+	ubfiz	x1, x0, 1, 16
+.LBE208:
+.LBE207:
+	.loc 2 2522 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+.LBB210:
+.LBB209:
+	.loc 2 2525 0
+	ldr	x2, [x2, #:lo12:.LANCHOR43]
+	strh	wzr, [x2, x1]
+	.loc 2 2526 0
+	bl	INSERT_FREE_LIST
+.LVL504:
+.LBE209:
+.LBE210:
+	.loc 2 2528 0
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+	ret
+.LVL505:
+.L259:
+	mov	w0, 0
+	ret
+	.cfi_endproc
+.LFE297:
+	.size	free_data_superblock, .-free_data_superblock
+	.section	.text.get_new_active_ppa,"ax",@progbits
+	.align	2
+	.global	get_new_active_ppa
+	.type	get_new_active_ppa, %function
+get_new_active_ppa:
+.LFB300:
+	.loc 2 2655 0
+	.cfi_startproc
+.LVL506:
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	mov	x19, x0
+	.loc 2 2659 0
+	ldrh	w1, [x0]
+	mov	w0, 65535
+.LVL507:
+	.loc 2 2655 0
+	str	x21, [sp, 32]
+	.cfi_offset 21, -16
+	.loc 2 2659 0
+	cmp	w1, w0
+	bne	.L263
+	.loc 2 2659 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR90
+	adrp	x0, .LC1
+	mov	w2, 2659
+	add	x1, x1, :lo12:.LANCHOR90
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL508:
+.L263:
+	.loc 2 2660 0 is_stmt 1
+	adrp	x20, .LANCHOR19
+	ldrh	w1, [x19, 2]
+	ldrh	w0, [x20, #:lo12:.LANCHOR19]
+	cmp	w1, w0
+	bne	.L264
+	.loc 2 2660 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR90
+	adrp	x0, .LC1
+	mov	w2, 2660
+	add	x1, x1, :lo12:.LANCHOR90
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL509:
+.L264:
+	.loc 2 2661 0 is_stmt 1
+	ldrh	w0, [x19, 4]
+	cbnz	w0, .L265
+	.loc 2 2661 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR90
+	adrp	x0, .LC1
+	mov	w2, 2661
+	add	x1, x1, :lo12:.LANCHOR90
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL510:
+.L265:
+	.loc 2 2663 0 is_stmt 1
+	ldrb	w0, [x19, 6]
+	.loc 2 2666 0
+	adrp	x1, .LANCHOR3
+	.loc 2 2662 0
+	strb	wzr, [x19, 10]
+	.loc 2 2663 0
+	add	x0, x0, 8
+	.loc 2 2666 0
+	ldrh	w2, [x1, #:lo12:.LANCHOR3]
+	.loc 2 2664 0
+	mov	w1, 65535
+	.loc 2 2663 0
+	ldrh	w0, [x19, x0, lsl 1]
+.LVL511:
+.L266:
+	.loc 2 2664 0
+	cmp	w0, w1
+	beq	.L268
+	.loc 2 2672 0
+	ldrh	w21, [x19, 2]
+	.loc 2 2680 0
+	mov	w3, 65535
+	.loc 2 2673 0
+	ldrh	w1, [x19, 4]
+	.loc 2 2672 0
+	orr	w21, w21, w0, lsl 10
+.LVL512:
+	ldrb	w0, [x19, 6]
+.LVL513:
+	.loc 2 2673 0
+	sub	w1, w1, #1
+	and	w1, w1, 65535
+	strh	w1, [x19, 4]
+.L270:
+	.loc 2 2675 0
+	add	w0, w0, 1
+	and	w0, w0, 255
+	.loc 2 2676 0
+	cmp	w2, w0
+	bne	.L269
+	.loc 2 2677 0
+	ldrh	w0, [x19, 2]
+	add	w0, w0, 1
+	strh	w0, [x19, 2]
+	.loc 2 2678 0
+	mov	w0, 0
+.L269:
+	.loc 2 2680 0
+	add	x4, x19, x0, sxtw 1
+	ldrh	w4, [x4, 16]
+	cmp	w4, w3
+	beq	.L270
+	strb	w0, [x19, 6]
+	.loc 2 2682 0
+	ldrh	w2, [x19, 2]
+	ldrh	w0, [x20, #:lo12:.LANCHOR19]
+	cmp	w2, w0
+	bne	.L262
+	.loc 2 2682 0 is_stmt 0 discriminator 1
+	cbz	w1, .L262
+	.loc 2 2682 0 discriminator 2
+	adrp	x1, .LANCHOR90
+	adrp	x0, .LC1
+	mov	w2, 2682
+	add	x1, x1, :lo12:.LANCHOR90
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL514:
+.L262:
+	.loc 2 2684 0 is_stmt 1
+	mov	w0, w21
+	ldr	x21, [sp, 32]
+.LVL515:
+	ldp	x19, x20, [sp, 16]
+.LVL516:
+	ldp	x29, x30, [sp], 48
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL517:
+.L268:
+	.cfi_restore_state
+	.loc 2 2665 0
+	ldrb	w0, [x19, 6]
+.LVL518:
+	add	w0, w0, 1
+	and	w0, w0, 255
+	strb	w0, [x19, 6]
+	.loc 2 2666 0
+	cmp	w0, w2
+	bne	.L267
+	.loc 2 2667 0
+	ldrh	w0, [x19, 2]
+	.loc 2 2668 0
+	strb	wzr, [x19, 6]
+	.loc 2 2667 0
+	add	w0, w0, 1
+	strh	w0, [x19, 2]
+.L267:
+	.loc 2 2670 0
+	ldrb	w0, [x19, 6]
+	add	x0, x0, 8
+	ldrh	w0, [x19, x0, lsl 1]
+.LVL519:
+	b	.L266
+	.cfi_endproc
+.LFE300:
+	.size	get_new_active_ppa, .-get_new_active_ppa
+	.section	.text.FtlGcBufInit,"ax",@progbits
+	.align	2
+	.global	FtlGcBufInit
+	.type	FtlGcBufInit, %function
+FtlGcBufInit:
+.LFB303:
+	.file 5 "drivers/rkflash/rksftl/sftl_gc.c"
+	.loc 5 22 0
+	.cfi_startproc
+	.loc 5 27 0
+	adrp	x1, .LANCHOR92
+	.loc 5 25 0
+	adrp	x0, .LANCHOR91
+	.loc 5 28 0
+	adrp	x7, .LANCHOR93
+	.loc 5 29 0
+	adrp	x6, .LANCHOR94
+	.loc 5 27 0
+	ldr	x5, [x1, #:lo12:.LANCHOR92]
+	.loc 5 28 0
+	adrp	x1, .LANCHOR23
+	.loc 5 25 0
+	str	wzr, [x0, #:lo12:.LANCHOR91]
+.LVL520:
+	.loc 5 26 0
+	adrp	x0, .LANCHOR3
+	.loc 5 28 0
+	ldrh	w10, [x1, #:lo12:.LANCHOR23]
+	.loc 5 29 0
+	adrp	x1, .LANCHOR24
+	.loc 5 26 0
+	ldrh	w0, [x0, #:lo12:.LANCHOR3]
+	mov	w8, 24
+	.loc 5 29 0
+	ldrh	w11, [x1, #:lo12:.LANCHOR24]
+	.loc 5 30 0
+	adrp	x1, .LANCHOR95
+	.loc 5 28 0
+	ldr	x14, [x7, #:lo12:.LANCHOR93]
+	mov	x3, x5
+	ldr	x4, [x1, #:lo12:.LANCHOR95]
+	.loc 5 26 0
+	mov	w2, 0
+	.loc 5 29 0
+	ldr	x15, [x6, #:lo12:.LANCHOR94]
+	nop // between mem op and mult-accumulate
+	umaddl	x8, w0, w8, x5
+	add	x4, x4, 8
+	.loc 5 26 0
+	mov	w1, 0
+	.loc 5 27 0
+	mov	w16, 1
+.LVL521:
+.L278:
+	add	w13, w2, w10
+	add	w12, w1, w11
+	.loc 5 26 0 discriminator 1
+	cmp	x3, x8
+	bne	.L279
+	.loc 5 34 0
+	adrp	x1, .LANCHOR96
+	.loc 5 36 0
+	ldr	x7, [x7, #:lo12:.LANCHOR93]
+	.loc 5 37 0
+	ldr	x6, [x6, #:lo12:.LANCHOR94]
+	.loc 5 35 0
+	mov	w8, 24
+	.loc 5 34 0
+	ldr	w4, [x1, #:lo12:.LANCHOR96]
+.L280:
+.LVL522:
+	.loc 5 34 0 is_stmt 0 discriminator 1
+	cmp	w0, w4
+	bcc	.L281
+	.loc 5 39 0 is_stmt 1
+	ret
+.LVL523:
+.L279:
+	.loc 5 28 0 discriminator 3
+	asr	w2, w2, 2
+	.loc 5 29 0 discriminator 3
+	asr	w1, w1, 2
+	.loc 5 28 0 discriminator 3
+	add	x2, x14, x2, sxtw 2
+	.loc 5 29 0 discriminator 3
+	add	x1, x15, x1, sxtw 2
+	.loc 5 27 0 discriminator 3
+	str	w16, [x3, 16]
+	.loc 5 29 0 discriminator 3
+	stp	x2, x1, [x3]
+	add	x3, x3, 24
+	.loc 5 31 0 discriminator 3
+	stp	x2, x1, [x4]
+	add	x4, x4, 32
+	mov	w1, w12
+	mov	w2, w13
+	b	.L278
+.LVL524:
+.L281:
+	.loc 5 35 0 discriminator 3
+	umull	x3, w0, w8
+	.loc 5 36 0 discriminator 3
+	mul	w1, w10, w0
+	.loc 5 35 0 discriminator 3
+	add	x2, x5, x3
+	.loc 5 36 0 discriminator 3
+	asr	w1, w1, 2
+	add	x1, x7, x1, sxtw 2
+	.loc 5 35 0 discriminator 3
+	str	wzr, [x2, 16]
+	.loc 5 36 0 discriminator 3
+	str	x1, [x5, x3]
+	.loc 5 37 0 discriminator 3
+	mul	w1, w11, w0
+	.loc 5 34 0 discriminator 3
+	add	w0, w0, 1
+.LVL525:
+	and	w0, w0, 65535
+.LVL526:
+	.loc 5 37 0 discriminator 3
+	asr	w1, w1, 2
+	add	x1, x6, x1, sxtw 2
+	str	x1, [x2, 8]
+	b	.L280
+	.cfi_endproc
+.LFE303:
+	.size	FtlGcBufInit, .-FtlGcBufInit
+	.section	.text.FtlGcBufFree,"ax",@progbits
+	.align	2
+	.global	FtlGcBufFree
+	.type	FtlGcBufFree, %function
+FtlGcBufFree:
+.LFB304:
+	.loc 5 42 0
+	.cfi_startproc
+.LVL527:
+	.loc 5 47 0
+	adrp	x2, .LANCHOR96
+	.loc 5 46 0
+	mov	w3, 0
+	.loc 5 48 0
+	mov	w8, 24
+	.loc 5 47 0
+	ldr	w7, [x2, #:lo12:.LANCHOR96]
+	.loc 5 48 0
+	adrp	x2, .LANCHOR92
+	ldr	x5, [x2, #:lo12:.LANCHOR92]
+.LVL528:
+.L283:
+	.loc 5 46 0 discriminator 1
+	cmp	w3, w1
+	bcs	.L282
+	.loc 5 48 0
+	ubfiz	x4, x3, 5, 16
+	mov	w2, 0
+	add	x4, x0, x4
+	b	.L288
+.LVL529:
+.L284:
+	.loc 5 47 0 discriminator 2
+	add	w2, w2, 1
+.LVL530:
+	and	w2, w2, 65535
+.LVL531:
+.L288:
+	.loc 5 47 0 is_stmt 0 discriminator 1
+	cmp	w2, w7
+	bcs	.L285
+	.loc 5 48 0 is_stmt 1
+	umull	x6, w2, w8
+	add	x10, x5, x6
+	ldr	x11, [x5, x6]
+	ldr	x6, [x4, 8]
+	cmp	x11, x6
+	bne	.L284
+	.loc 5 49 0
+	str	wzr, [x10, 16]
+.L285:
+	.loc 5 46 0 discriminator 2
+	add	w3, w3, 1
+.LVL532:
+	and	w3, w3, 65535
+.LVL533:
+	b	.L283
+.LVL534:
+.L282:
+	ret
+	.cfi_endproc
+.LFE304:
+	.size	FtlGcBufFree, .-FtlGcBufFree
+	.section	.text.FtlGcBufAlloc,"ax",@progbits
+	.align	2
+	.global	FtlGcBufAlloc
+	.type	FtlGcBufAlloc, %function
+FtlGcBufAlloc:
+.LFB305:
+	.loc 5 57 0
+	.cfi_startproc
+.LVL535:
+	.loc 5 62 0
+	adrp	x2, .LANCHOR96
+	.loc 5 61 0
+	mov	w3, 0
+	.loc 5 63 0
+	mov	w7, 24
+	.loc 5 64 0
+	mov	w8, 1
+	.loc 5 62 0
+	ldr	w5, [x2, #:lo12:.LANCHOR96]
+	.loc 5 63 0
+	adrp	x2, .LANCHOR92
+	ldr	x6, [x2, #:lo12:.LANCHOR92]
+.LVL536:
+.L290:
+	.loc 5 61 0 discriminator 1
+	cmp	w3, w1
+	bcs	.L289
+	mov	w2, 0
+	b	.L295
+.LVL537:
+.L291:
+	.loc 5 62 0 discriminator 2
+	add	w2, w2, 1
+.LVL538:
+	and	w2, w2, 65535
+.LVL539:
+.L295:
+	.loc 5 62 0 is_stmt 0 discriminator 1
+	cmp	w2, w5
+	bcs	.L292
+	.loc 5 63 0 is_stmt 1
+	umaddl	x4, w2, w7, x6
+	ldr	w10, [x4, 16]
+	cbnz	w10, .L291
+	.loc 5 65 0
+	ubfiz	x2, x3, 5, 16
+.LVL540:
+	ldr	x10, [x4]
+	add	x2, x0, x2
+	.loc 5 64 0
+	str	w8, [x4, 16]
+	.loc 5 66 0
+	ldr	x4, [x4, 8]
+	stp	x10, x4, [x2, 8]
+.L292:
+	.loc 5 61 0 discriminator 2
+	add	w3, w3, 1
+.LVL541:
+	and	w3, w3, 65535
+.LVL542:
+	b	.L290
+.L289:
+	ret
+	.cfi_endproc
+.LFE305:
+	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
+	.section	.text.IsBlkInGcList,"ax",@progbits
+	.align	2
+	.global	IsBlkInGcList
+	.type	IsBlkInGcList, %function
+IsBlkInGcList:
+.LFB306:
+	.loc 5 74 0
+	.cfi_startproc
+.LVL543:
+	.loc 5 77 0
+	adrp	x1, .LANCHOR97
+	.loc 5 74 0
+	and	w0, w0, 65535
+	.loc 5 77 0
+	ldrh	w2, [x1, #:lo12:.LANCHOR97]
+	.loc 5 78 0
+	adrp	x1, .LANCHOR98
+	ldr	x3, [x1, #:lo12:.LANCHOR98]
+	.loc 5 77 0
+	mov	x1, 0
+.LVL544:
+.L297:
+	.loc 5 77 0 is_stmt 0 discriminator 1
+	cmp	w2, w1, uxth
+	bhi	.L299
+	.loc 5 81 0 is_stmt 1
+	mov	w0, 0
+.LVL545:
+	ret
+.L299:
+	add	x1, x1, 1
+.LVL546:
+	.loc 5 78 0
+	add	x4, x3, x1, lsl 1
+	ldrh	w4, [x4, -2]
+	cmp	w4, w0
+	bne	.L297
+	.loc 5 79 0
+	mov	w0, 1
+	.loc 5 82 0
+	ret
+	.cfi_endproc
+.LFE306:
+	.size	IsBlkInGcList, .-IsBlkInGcList
+	.section	.text.FtlGcUpdatePage,"ax",@progbits
+	.align	2
+	.global	FtlGcUpdatePage
+	.type	FtlGcUpdatePage, %function
+FtlGcUpdatePage:
+.LFB307:
+	.loc 5 85 0
+	.cfi_startproc
+.LVL547:
+	mov	w6, w0
+	mov	w10, w1
+	mov	w8, w2
+	stp	x29, x30, [sp, -16]!
+	.cfi_def_cfa_offset 16
+	.cfi_offset 29, -16
+	.cfi_offset 30, -8
+	.loc 5 88 0
+	lsr	w0, w0, 10
+.LVL548:
+	.loc 5 85 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 5 88 0
+	bl	P2V_block_in_plane
+.LVL549:
+	and	w7, w0, 65535
+.LVL550:
+	.loc 5 91 0
+	adrp	x4, .LANCHOR97
+	.loc 5 92 0
+	adrp	x2, .LANCHOR98
+	.loc 5 91 0
+	mov	x3, 0
+	ldrh	w1, [x4, #:lo12:.LANCHOR97]
+	.loc 5 92 0
+	ldr	x5, [x2, #:lo12:.LANCHOR98]
+.LVL551:
+.L302:
+	and	w2, w3, 65535
+.LVL552:
+	.loc 5 91 0 discriminator 1
+	cmp	w2, w1
+	bcc	.L304
+	.loc 5 96 0
+	bne	.L303
+	.loc 5 97 0
+	and	x3, x3, 65535
+	strh	w0, [x5, x3, lsl 1]
+	.loc 5 98 0
+	ldrh	w0, [x4, #:lo12:.LANCHOR97]
+.LVL553:
+	add	w0, w0, 1
+	strh	w0, [x4, #:lo12:.LANCHOR97]
+.LVL554:
+	b	.L303
+.LVL555:
+.L304:
+	add	x3, x3, 1
+	.loc 5 92 0
+	add	x2, x5, x3, lsl 1
+.LVL556:
+	ldrh	w2, [x2, -2]
+	cmp	w2, w7
+	bne	.L302
+.LVL557:
+.L303:
+	.loc 5 101 0
+	adrp	x4, .LANCHOR99
+	adrp	x1, .LANCHOR100
+	mov	w3, 12
+	ldrh	w0, [x4, #:lo12:.LANCHOR99]
+	ldr	x5, [x1, #:lo12:.LANCHOR100]
+	umull	x3, w0, w3
+	.loc 5 107 0
+	add	w0, w0, 1
+	.loc 5 101 0
+	add	x7, x5, x3
+.LVL558:
+	.loc 5 102 0
+	stp	w10, w8, [x7, 4]
+	.loc 5 103 0
+	str	w6, [x5, x3]
+	.loc 5 107 0
+	strh	w0, [x4, #:lo12:.LANCHOR99]
+	.loc 5 108 0
+	ldp	x29, x30, [sp], 16
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE307:
+	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
+	.section	.text.FtlGcRefreshBlock,"ax",@progbits
+	.align	2
+	.global	FtlGcRefreshBlock
+	.type	FtlGcRefreshBlock, %function
+FtlGcRefreshBlock:
+.LFB314:
+	.loc 5 345 0
+	.cfi_startproc
+.LVL559:
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	str	x19, [sp, 16]
+	.cfi_offset 19, -16
+	.loc 5 345 0
+	and	w19, w0, 65535
+	.loc 5 347 0
+	mov	w1, w19
+	adrp	x0, .LC73
+.LVL560:
+	add	x0, x0, :lo12:.LC73
+	bl	printf
+.LVL561:
+	.loc 5 349 0
+	adrp	x3, .LANCHOR101
+	ldrh	w4, [x3, #:lo12:.LANCHOR101]
+	cmp	w19, w4
+	beq	.L307
+	.loc 5 349 0 is_stmt 0 discriminator 1
+	adrp	x0, .LANCHOR102
+	ldrh	w2, [x0, #:lo12:.LANCHOR102]
+	cmp	w19, w2
+	beq	.L307
+	.loc 5 351 0 is_stmt 1
+	mov	w1, 65535
+	cmp	w4, w1
+	bne	.L308
+	.loc 5 352 0
+	strh	w19, [x3, #:lo12:.LANCHOR101]
+.L307:
+	.loc 5 356 0
+	mov	w0, 0
+	ldr	x19, [sp, 16]
+.LVL562:
+	ldp	x29, x30, [sp], 32
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_def_cfa 31, 0
+	ret
+.L308:
+	.cfi_restore_state
+	.loc 5 353 0
+	cmp	w2, w1
+	bne	.L307
+	.loc 5 354 0
+	strh	w19, [x0, #:lo12:.LANCHOR102]
+	b	.L307
+	.cfi_endproc
+.LFE314:
+	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
+	.section	.text.FtlGcMarkBadPhyBlk,"ax",@progbits
+	.align	2
+	.global	FtlGcMarkBadPhyBlk
+	.type	FtlGcMarkBadPhyBlk, %function
+FtlGcMarkBadPhyBlk:
+.LFB315:
+	.loc 5 359 0
+	.cfi_startproc
+.LVL563:
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	and	w20, w0, 65535
+	.loc 5 364 0
+	adrp	x19, .LANCHOR103
+	.loc 5 359 0
+	str	x21, [sp, 32]
+	.cfi_offset 21, -16
+	.loc 5 361 0
+	mov	w0, w20
+.LVL564:
+	bl	P2V_block_in_plane
+.LVL565:
+	.loc 5 364 0
+	ldrh	w1, [x19, #:lo12:.LANCHOR103]
+	mov	w2, w20
+	.loc 5 361 0
+	mov	w21, w0
+.LVL566:
+	.loc 5 364 0
+	adrp	x0, .LC74
+.LVL567:
+	add	x0, x0, :lo12:.LC74
+	bl	printf
+.LVL568:
+	.loc 5 366 0
+	mov	w0, w21
+	bl	FtlGcRefreshBlock
+.LVL569:
+	.loc 5 368 0
+	ldrh	w0, [x19, #:lo12:.LANCHOR103]
+	.loc 5 369 0
+	adrp	x2, .LANCHOR104
+	add	x2, x2, :lo12:.LANCHOR104
+	.loc 5 368 0
+	mov	x1, 0
+.LVL570:
+.L311:
+	.loc 5 368 0 is_stmt 0 discriminator 1
+	cmp	w0, w1, uxth
+	bhi	.L313
+	.loc 5 372 0 is_stmt 1
+	cmp	w0, 15
+	bhi	.L312
+	.loc 5 373 0
+	add	w1, w0, 1
+.LVL571:
+	strh	w1, [x19, #:lo12:.LANCHOR103]
+	adrp	x1, .LANCHOR104
+	add	x1, x1, :lo12:.LANCHOR104
+	strh	w20, [x1, w0, sxtw 1]
+	b	.L312
+.LVL572:
+.L313:
+	add	x1, x1, 1
+.LVL573:
+	.loc 5 369 0
+	add	x3, x2, x1, lsl 1
+	ldrh	w3, [x3, -2]
+	cmp	w3, w20
+	bne	.L311
+.L312:
+	.loc 5 375 0
+	mov	w0, 0
+	ldr	x21, [sp, 32]
+.LVL574:
+	ldp	x19, x20, [sp, 16]
+.LVL575:
+	ldp	x29, x30, [sp], 48
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE315:
+	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
+	.section	.text.FtlGcReFreshBadBlk,"ax",@progbits
+	.align	2
+	.global	FtlGcReFreshBadBlk
+	.type	FtlGcReFreshBadBlk, %function
+FtlGcReFreshBadBlk:
+.LFB316:
+	.loc 5 379 0
+	.cfi_startproc
+	.loc 5 380 0
+	adrp	x0, .LANCHOR103
+	ldrh	w0, [x0, #:lo12:.LANCHOR103]
+	cbz	w0, .L322
+	.loc 5 380 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR101
+	ldrh	w2, [x1, #:lo12:.LANCHOR101]
+	mov	w1, 65535
+	cmp	w2, w1
+	bne	.L322
+	.loc 5 379 0 is_stmt 1
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	str	x19, [sp, 16]
+	.cfi_offset 19, -16
+	.loc 5 381 0
+	adrp	x19, .LANCHOR105
+	ldrh	w1, [x19, #:lo12:.LANCHOR105]
+	cmp	w1, w0
+	bcc	.L317
+	.loc 5 382 0
+	strh	wzr, [x19, #:lo12:.LANCHOR105]
+.L317:
+.LBB213:
+.LBB214:
+	.loc 5 383 0
+	ldrh	w1, [x19, #:lo12:.LANCHOR105]
+	adrp	x0, .LANCHOR104
+	add	x0, x0, :lo12:.LANCHOR104
+	ldrh	w0, [x0, x1, lsl 1]
+	bl	P2V_block_in_plane
+.LVL576:
+	bl	FtlGcRefreshBlock
+.LVL577:
+	.loc 5 384 0
+	ldrh	w0, [x19, #:lo12:.LANCHOR105]
+	add	w0, w0, 1
+	strh	w0, [x19, #:lo12:.LANCHOR105]
+.LBE214:
+.LBE213:
+	.loc 5 387 0
+	mov	w0, 0
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_def_cfa 31, 0
+	ret
+.L322:
+	mov	w0, 0
+	ret
+	.cfi_endproc
+.LFE316:
+	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
+	.section	.text.ftl_malloc,"ax",@progbits
+	.align	2
+	.global	ftl_malloc
+	.type	ftl_malloc, %function
+ftl_malloc:
+.LFB337:
+	.loc 1 24 0
+	.cfi_startproc
+.LVL578:
+	.loc 1 25 0
+	mov	w1, 0
+	sxtw	x0, w0
+	b	kmalloc
+.LVL579:
+	.cfi_endproc
+.LFE337:
+	.size	ftl_malloc, .-ftl_malloc
+	.section	.text.rknand_print_hex,"ax",@progbits
+	.align	2
+	.global	rknand_print_hex
+	.type	rknand_print_hex, %function
+rknand_print_hex:
+.LFB338:
+	.loc 1 29 0
+	.cfi_startproc
+.LVL580:
+	stp	x29, x30, [sp, -96]!
+	.cfi_def_cfa_offset 96
+	.cfi_offset 29, -96
+	.cfi_offset 30, -88
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -64
+	.cfi_offset 22, -56
+	mov	x22, x1
+.LVL581:
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -48
+	.cfi_offset 24, -40
+	.loc 1 38 0
+	adrp	x24, .LC75
+	.loc 1 29 0
+	stp	x25, x26, [sp, 64]
+	mov	w23, w2
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 25, -32
+	.cfi_offset 26, -24
+	.cfi_offset 27, -16
+	.cfi_offset 28, -8
+	.loc 1 45 0
+	adrp	x25, .LC77
+	.loc 1 29 0
+	mov	x28, x0
+	mov	w27, w3
+	.loc 1 38 0
+	add	x24, x24, :lo12:.LC75
+	.loc 1 45 0
+	add	x25, x25, :lo12:.LC77
+	.loc 1 29 0
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -80
+	.cfi_offset 20, -72
+	.loc 1 36 0
+	mov	w21, 0
+	mov	x19, 0
+	.loc 1 35 0
+	mov	w20, 0
+	.loc 1 43 0
+	adrp	x26, .LC76
+.LVL582:
+.L327:
+	.loc 1 36 0 discriminator 1
+	cmp	w27, w19
+	bhi	.L333
+	.loc 1 52 0
+	ldp	x19, x20, [sp, 16]
+.LVL583:
+	.loc 1 51 0
+	adrp	x0, .LC78
+	.loc 1 52 0
+	ldp	x21, x22, [sp, 32]
+.LVL584:
+	.loc 1 51 0
+	add	x0, x0, :lo12:.LC78
+	.loc 1 52 0
+	ldp	x23, x24, [sp, 48]
+.LVL585:
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+.LVL586:
+	ldp	x29, x30, [sp], 96
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	.loc 1 51 0
+	b	printf
+.LVL587:
+.L333:
+	.cfi_restore_state
+	.loc 1 37 0
+	cbnz	w20, .L328
+	.loc 1 38 0
+	mov	w2, w21
+	mov	x1, x28
+	mov	x0, x24
+	bl	printf
+.LVL588:
+.L328:
+	.loc 1 40 0
+	cmp	w23, 4
+	bne	.L329
+	.loc 1 41 0
+	ldr	w1, [x22, x19, lsl 2]
+.L336:
+	.loc 1 43 0
+	add	x0, x26, :lo12:.LC76
+.L335:
+	.loc 1 45 0
+	bl	printf
+.LVL589:
+	.loc 1 46 0
+	add	w20, w20, 1
+.LVL590:
+	cmp	w20, 15
+	bls	.L332
+.LVL591:
+	.loc 1 47 0
+	mov	w20, 0
+	.loc 1 48 0
+	adrp	x0, .LC78
+	add	x0, x0, :lo12:.LC78
+	bl	printf
+.LVL592:
+.L332:
+	add	x19, x19, 1
+.LVL593:
+	add	w21, w21, w23
+	b	.L327
+.LVL594:
+.L329:
+	.loc 1 42 0
+	cmp	w23, 2
+	bne	.L331
+	.loc 1 43 0
+	ldrsh	w1, [x22, x19, lsl 1]
+	b	.L336
+.L331:
+	.loc 1 45 0
+	ldrb	w1, [x22, x19]
+	mov	x0, x25
+	b	.L335
+	.cfi_endproc
+.LFE338:
+	.size	rknand_print_hex, .-rknand_print_hex
+	.section	.text.FlashReadPages,"ax",@progbits
+	.align	2
+	.global	FlashReadPages
+	.type	FlashReadPages, %function
+FlashReadPages:
+.LFB340:
+	.loc 1 81 0
+	.cfi_startproc
+.LVL595:
+	stp	x29, x30, [sp, -96]!
+	.cfi_def_cfa_offset 96
+	.cfi_offset 29, -96
+	.cfi_offset 30, -88
+	.loc 1 83 0
+	adrp	x2, .LANCHOR0
+.LVL596:
+	add	x3, x2, :lo12:.LANCHOR0
+	ubfiz	x1, x1, 5, 32
+.LVL597:
+	.loc 1 81 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	str	x25, [sp, 64]
+	.cfi_offset 25, -32
+	.loc 1 83 0
+	ldrh	w25, [x3, 12]
+.LVL598:
+	.loc 1 81 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -64
+	.cfi_offset 22, -56
+	.loc 1 88 0
+	adrp	x21, .LANCHOR106
+	.loc 1 81 0
+	stp	x23, x24, [sp, 48]
+	.loc 1 88 0
+	adrp	x22, .LC1
+	.loc 1 81 0
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 23, -48
+	.cfi_offset 24, -40
+	.cfi_offset 19, -80
+	.cfi_offset 20, -72
+	add	x24, x0, x1
+	mov	x19, x0
+	mov	x23, x2
+	.loc 1 88 0
+	add	x21, x21, :lo12:.LANCHOR106
+	add	x22, x22, :lo12:.LC1
+.LVL599:
+.L338:
+	.loc 1 87 0 discriminator 1
+	cmp	x19, x24
+	bne	.L345
+	.loc 1 108 0
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+.LVL600:
+	ldp	x29, x30, [sp], 96
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 25
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL601:
+.L345:
+	.cfi_restore_state
+	.loc 1 88 0
+	ldr	x0, [x19, 8]
+	cbz	x0, .L339
+	.loc 1 88 0 is_stmt 0 discriminator 2
+	ldr	x0, [x19, 16]
+	cbnz	x0, .L340
+.L339:
+	.loc 1 88 0 discriminator 3
+	mov	w2, 88
+	mov	x1, x21
+	mov	x0, x22
+	bl	printf
+.LVL602:
+.L340:
+	.loc 1 89 0 is_stmt 1
+	ldr	w0, [x19, 4]
+	.loc 1 90 0
+	adrp	x20, .LANCHOR107
+	add	x20, x20, :lo12:.LANCHOR107
+	.loc 1 89 0
+	add	x2, x29, 88
+	add	x1, x29, 92
+	bl	l2p_addr_tran.isra.0
+.LVL603:
+	.loc 1 90 0
+	ldrb	w0, [x29, 88]
+	ldr	w1, [x29, 92]
+	ldp	x2, x3, [x19, 8]
+	ldr	x4, [x20, 24]
+	blr	x4
+.LVL604:
+	.loc 1 94 0
+	str	w0, [x19]
+	.loc 1 95 0
+	add	x0, x23, :lo12:.LANCHOR0
+.LVL605:
+	ldrh	w0, [x0, 14]
+	cmp	w0, 4
+	bne	.L342
+	.loc 1 96 0
+	ldrb	w0, [x29, 88]
+	ldr	x4, [x20, 24]
+	ldp	x2, x3, [x19, 8]
+	ldr	w1, [x29, 92]
+	add	x3, x3, 8
+	add	x2, x2, 2048
+	add	w1, w25, w1
+	blr	x4
+.LVL606:
+	.loc 1 100 0
+	cmn	w0, #1
+	beq	.L343
+	.loc 1 101 0 discriminator 1
+	ldr	x0, [x19, 16]
+.LVL607:
+	.loc 1 100 0 discriminator 1
+	ldr	w1, [x0, 12]
+	cmn	w1, #1
+	bne	.L342
+	.loc 1 101 0
+	ldr	w1, [x0, 8]
+	cmn	w1, #1
+	bne	.L342
+	.loc 1 102 0
+	ldr	w0, [x0]
+	cmn	w0, #1
+	beq	.L342
+.L343:
+	.loc 1 104 0
+	mov	w0, -1
+	str	w0, [x19]
+.L342:
+	add	x19, x19, 32
+	b	.L338
+	.cfi_endproc
+.LFE340:
+	.size	FlashReadPages, .-FlashReadPages
+	.section	.text.FtlLoadFactoryBbt,"ax",@progbits
+	.align	2
+	.global	FtlLoadFactoryBbt
+	.type	FtlLoadFactoryBbt, %function
+FtlLoadFactoryBbt:
+.LFB230:
+	.loc 4 279 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -112]!
+	.cfi_def_cfa_offset 112
+	.cfi_offset 29, -112
+	.cfi_offset 30, -104
+	.loc 4 286 0
+	adrp	x2, .LANCHOR39
+	adrp	x0, .LANCHOR108
+	add	x1, x0, :lo12:.LANCHOR108
+	.loc 4 279 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 4 286 0
+	ldr	x2, [x2, #:lo12:.LANCHOR39]
+	.loc 4 279 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -80
+	.cfi_offset 22, -72
+	mov	x22, x0
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 25, -48
+	.cfi_offset 26, -40
+	.loc 4 291 0
+	adrp	x26, .LANCHOR17
+	.loc 4 279 0
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 27, -32
+	.cfi_offset 28, -24
+	.loc 4 291 0
+	add	x28, x26, :lo12:.LANCHOR17
+	.loc 4 279 0
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -96
+	.cfi_offset 20, -88
+	adrp	x20, .LANCHOR37
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -64
+	.cfi_offset 24, -56
+	add	x20, x20, :lo12:.LANCHOR37
+	.loc 4 286 0
+	str	x2, [x1, 8]
+	.loc 4 287 0
+	adrp	x2, .LANCHOR109
+	.loc 4 289 0
+	adrp	x23, .LANCHOR10
+	add	x20, x20, 12
+	.loc 4 287 0
+	ldr	x25, [x2, #:lo12:.LANCHOR109]
+	.loc 4 289 0
+	add	x23, x23, :lo12:.LANCHOR10
+	mov	w21, 0
+	.loc 4 290 0
+	mov	w27, -1
+	.loc 4 287 0
+	str	x25, [x1, 16]
+.LVL608:
+.L357:
+	.loc 4 289 0 discriminator 1
+	ldrh	w0, [x23]
+	cmp	w21, w0
+	bcc	.L362
+	.loc 4 314 0
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+.LVL609:
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+.LVL610:
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL611:
+.L362:
+	.cfi_restore_state
+	.loc 4 291 0
+	ldrh	w19, [x26, #:lo12:.LANCHOR17]
+	.loc 4 293 0
+	add	x24, x22, :lo12:.LANCHOR108
+	.loc 4 290 0
+	strh	w27, [x20]
+	.loc 4 301 0
+	mov	w3, 61664
+	.loc 4 291 0
+	sub	w19, w19, #1
+	and	w19, w19, 65535
+.LVL612:
+.L358:
+	.loc 4 291 0 is_stmt 0 discriminator 1
+	ldrh	w0, [x28]
+	sub	w1, w0, #15
+	cmp	w1, w19
+	bgt	.L360
+	.loc 4 292 0 is_stmt 1
+	madd	w0, w0, w21, w19
+	.loc 4 294 0
+	mov	w2, 1
+	str	w3, [x29, 108]
+.LVL613:
+	mov	w1, w2
+	.loc 4 292 0
+	lsl	w0, w0, 10
+	.loc 4 293 0
+	str	w0, [x24, 4]
+	.loc 4 294 0
+	mov	x0, x24
+	bl	FlashReadPages
+.LVL614:
+	.loc 4 295 0
+	ldr	w0, [x24]
+	ldr	w3, [x29, 108]
+	cmn	w0, #1
+	beq	.L359
+	.loc 4 301 0
+	ldrh	w0, [x25]
+	cmp	w0, w3
+	bne	.L359
+	.loc 4 303 0
+	strh	w19, [x20]
+.L360:
+	.loc 4 289 0 discriminator 2
+	add	w21, w21, 1
+.LVL615:
+	add	x20, x20, 2
+	b	.L357
+.L359:
+	.loc 4 291 0 discriminator 2
+	sub	w19, w19, #1
+.LVL616:
+	and	w19, w19, 65535
+.LVL617:
+	b	.L358
+	.cfi_endproc
+.LFE230:
+	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
+	.section	.text.FtlGetLastWrittenPage,"ax",@progbits
+	.align	2
+	.global	FtlGetLastWrittenPage
+	.type	FtlGetLastWrittenPage, %function
+FtlGetLastWrittenPage:
+.LFB236:
+	.loc 2 47 0
+	.cfi_startproc
+.LVL618:
+	stp	x29, x30, [sp, -160]!
+	.cfi_def_cfa_offset 160
+	.cfi_offset 29, -160
+	.cfi_offset 30, -152
+	.loc 2 51 0
+	cmp	w1, 1
+	.loc 2 47 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -112
+	.cfi_offset 24, -104
+	mov	w23, w1
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 19, -144
+	.cfi_offset 20, -136
+	.cfi_offset 21, -128
+	.cfi_offset 22, -120
+	.loc 2 51 0
+	bne	.L368
+	.loc 2 51 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR20
+.LVL619:
+	ldrh	w19, [x1, #:lo12:.LANCHOR20]
+.L369:
+.LVL620:
+	.loc 2 56 0 is_stmt 1 discriminator 4
+	sub	w19, w19, #1
+.LVL621:
+	.loc 2 53 0 discriminator 4
+	adrp	x1, ftl_temp_buf
+	.loc 2 56 0 discriminator 4
+	sxth	w19, w19
+	.loc 2 53 0 discriminator 4
+	add	x1, x1, :lo12:ftl_temp_buf
+	.loc 2 57 0 discriminator 4
+	lsl	w21, w0, 10
+	.loc 2 53 0 discriminator 4
+	str	x1, [x29, 72]
+	.loc 2 57 0 discriminator 4
+	orr	w0, w19, w21
+.LVL622:
+	.loc 2 54 0 discriminator 4
+	add	x1, x29, 96
+	.loc 2 57 0 discriminator 4
+	str	w0, [x29, 68]
+	.loc 2 58 0 discriminator 4
+	mov	w2, w23
+	.loc 2 54 0 discriminator 4
+	str	x1, [x29, 80]
+.LVL623:
+	.loc 2 58 0 discriminator 4
+	add	x0, x29, 64
+	mov	w1, 1
+	bl	FlashReadPages
+.LVL624:
+	.loc 2 59 0 discriminator 4
+	ldr	w0, [x29, 96]
+	cmn	w0, #1
+	bne	.L370
+	mov	w22, 0
+	.loc 2 61 0
+	mov	w24, 2
+.LVL625:
+.L371:
+	.loc 2 60 0
+	cmp	w22, w19
+	ble	.L374
+.LVL626:
+.L370:
+	.loc 2 73 0
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+.LVL627:
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+.LVL628:
+	ldp	x29, x30, [sp], 160
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL629:
+.L368:
+	.cfi_restore_state
+	.loc 2 51 0 discriminator 2
+	adrp	x1, .LANCHOR19
+.LVL630:
+	ldrh	w19, [x1, #:lo12:.LANCHOR19]
+	b	.L369
+.LVL631:
+.L374:
+	.loc 2 61 0
+	add	w20, w22, w19
+	.loc 2 63 0
+	mov	w2, w23
+	mov	w1, 1
+	.loc 2 61 0
+	sdiv	w20, w20, w24
+.LVL632:
+	.loc 2 62 0
+	sxth	w0, w20
+	orr	w0, w0, w21
+	str	w0, [x29, 68]
+	.loc 2 63 0
+	add	x0, x29, 64
+	bl	FlashReadPages
+.LVL633:
+	.loc 2 65 0
+	ldr	w0, [x29, 96]
+	cmn	w0, #1
+	bne	.L372
+	.loc 2 65 0 is_stmt 0 discriminator 1
+	ldr	w0, [x29, 100]
+	cmn	w0, #1
+	bne	.L372
+	.loc 2 66 0 is_stmt 1
+	sub	w19, w20, #1
+.LVL634:
+	sxth	w19, w19
+.LVL635:
+	b	.L371
+.L372:
+	.loc 2 68 0
+	add	w20, w20, 1
+.LVL636:
+	sxth	w22, w20
+.LVL637:
+	b	.L371
+	.cfi_endproc
+.LFE236:
+	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
+	.section	.text.FlashProgPages,"ax",@progbits
+	.align	2
+	.global	FlashProgPages
+	.type	FlashProgPages, %function
+FlashProgPages:
+.LFB341:
+	.loc 1 111 0
+	.cfi_startproc
+.LVL638:
+	stp	x29, x30, [sp, -144]!
+	.cfi_def_cfa_offset 144
+	.cfi_offset 29, -144
+	.cfi_offset 30, -136
+	ubfiz	x1, x1, 5, 32
+.LVL639:
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 25, -80
+	.cfi_offset 26, -72
+	mov	w25, w2
+	mov	w26, w3
+	.loc 1 113 0
+	adrp	x2, .LANCHOR0
+.LVL640:
+	add	x3, x2, :lo12:.LANCHOR0
+.LVL641:
+	.loc 1 111 0
+	stp	x27, x28, [sp, 80]
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 27, -64
+	.cfi_offset 28, -56
+	.cfi_offset 19, -128
+	.cfi_offset 20, -120
+	mov	x20, x0
+	stp	x21, x22, [sp, 32]
+	.loc 1 117 0
+	mov	x19, x0
+	.loc 1 113 0
+	ldrh	w27, [x3, 12]
+.LVL642:
+	.cfi_offset 21, -112
+	.cfi_offset 22, -104
+	.loc 1 118 0
+	adrp	x21, .LANCHOR110
+	.loc 1 111 0
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -96
+	.cfi_offset 24, -88
+	.loc 1 120 0
+	adrp	x22, .LANCHOR107
+	add	x24, x0, x1
+	mov	x23, x2
+	.loc 1 118 0
+	add	x21, x21, :lo12:.LANCHOR110
+	.loc 1 129 0
+	add	x28, x22, :lo12:.LANCHOR107
+.LVL643:
+.L377:
+	.loc 1 117 0 discriminator 1
+	cmp	x19, x24
+	bne	.L385
+	.loc 1 138 0
+	cbnz	w26, .L386
+.LVL644:
+.L404:
+	.loc 1 168 0
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+.LVL645:
+	ldp	x27, x28, [sp, 80]
+.LVL646:
+	ldp	x29, x30, [sp], 144
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL647:
+.L385:
+	.cfi_restore_state
+	.loc 1 118 0
+	ldr	x0, [x19, 8]
+	cbz	x0, .L378
+	.loc 1 118 0 is_stmt 0 discriminator 2
+	ldr	x0, [x19, 16]
+	cbnz	x0, .L379
+.L378:
+	.loc 1 118 0 discriminator 3
+	adrp	x0, .LC1
+	mov	w2, 118
+	mov	x1, x21
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL648:
+.L379:
+	.loc 1 119 0 is_stmt 1
+	ldr	w0, [x19, 4]
+	add	x2, x29, 104
+	add	x1, x29, 108
+	bl	l2p_addr_tran.isra.0
+.LVL649:
+	.loc 1 120 0
+	add	x0, x22, :lo12:.LANCHOR107
+	ldr	w1, [x29, 108]
+	ldp	x2, x3, [x19, 8]
+	ldr	x4, [x0, 16]
+	ldrb	w0, [x29, 104]
+	blr	x4
+.LVL650:
+	.loc 1 125 0
+	cbnz	w0, .L380
+	.loc 1 124 0
+	str	wzr, [x19]
+.LVL651:
+.L381:
+	.loc 1 128 0
+	add	x0, x23, :lo12:.LANCHOR0
+	ldrh	w0, [x0, 14]
+	cmp	w0, 4
+	bne	.L383
+	.loc 1 129 0
+	ldrb	w0, [x29, 104]
+	ldr	x4, [x28, 16]
+	ldp	x2, x3, [x19, 8]
+	ldr	w1, [x29, 108]
+	add	x3, x3, 8
+	add	x2, x2, 2048
+	add	w1, w27, w1
+	blr	x4
+.LVL652:
+	.loc 1 133 0
+	cbz	w0, .L383
+	.loc 1 134 0
+	mov	w0, -1
+.LVL653:
+	str	w0, [x19]
+.L383:
+	add	x19, x19, 32
+	b	.L377
+.LVL654:
+.L380:
+	.loc 1 126 0
+	mov	w0, -1
+.LVL655:
+	str	w0, [x19]
+	b	.L381
+.LVL656:
+.L390:
+.LBB215:
+	.loc 1 143 0
+	str	wzr, [x22]
+	.loc 1 149 0
+	mov	w2, w25
+	.loc 1 144 0
+	str	wzr, [x24]
+	.loc 1 149 0
+	mov	w1, 1
+	.loc 1 147 0
+	stp	x22, x24, [x29, 120]
+	.loc 1 145 0
+	ldr	w0, [x20, 4]
+	str	w0, [x29, 116]
+	.loc 1 149 0
+	add	x0, x29, 112
+	bl	FlashReadPages
+.LVL657:
+	.loc 1 150 0
+	ldr	w26, [x29, 112]
+	cmn	w26, #1
+	bne	.L387
+	.loc 1 151 0
+	ldr	w1, [x20, 4]
+	adrp	x0, .LC79
+	add	x0, x0, :lo12:.LC79
+	bl	printf
+.LVL658:
+	.loc 1 152 0
+	str	w26, [x20]
+.L387:
+	.loc 1 154 0
+	ldr	x0, [x20, 16]
+	cbz	x0, .L388
+	.loc 1 155 0
+	ldr	w3, [x23, #:lo12:.LANCHOR111]
+	ldr	w2, [x0]
+	cmp	w2, w3
+	beq	.L388
+	.loc 1 156 0
+	ldr	w1, [x20, 4]
+	adrp	x0, .LC80
+	add	x0, x0, :lo12:.LC80
+	bl	printf
+.LVL659:
+	.loc 1 157 0
+	mov	w0, -1
+	str	w0, [x20]
+.L388:
+	.loc 1 160 0
+	ldr	x0, [x20, 8]
+	cbz	x0, .L389
+	.loc 1 161 0
+	ldr	w3, [x21, #:lo12:check_buf]
+	ldr	w2, [x0]
+	cmp	w2, w3
+	beq	.L389
+	.loc 1 162 0
+	ldr	w1, [x20, 4]
+	adrp	x0, .LC81
+	add	x0, x0, :lo12:.LC81
+	bl	printf
+.LVL660:
+	.loc 1 163 0
+	mov	w0, -1
+	str	w0, [x20]
+.L389:
+	add	x20, x20, 32
+.L405:
+.LBE215:
+	.loc 1 140 0 discriminator 1
+	cmp	x20, x19
+	bne	.L390
+	b	.L404
+.LVL661:
+.L386:
+.LBB216:
+	.loc 1 143 0 discriminator 1
+	adrp	x21, check_buf
+	.loc 1 144 0 discriminator 1
+	adrp	x23, .LANCHOR111
+	.loc 1 143 0 discriminator 1
+	add	x22, x21, :lo12:check_buf
+	.loc 1 144 0 discriminator 1
+	add	x24, x23, :lo12:.LANCHOR111
+	b	.L405
+.LBE216:
+	.cfi_endproc
+.LFE341:
+	.size	FlashProgPages, .-FlashProgPages
+	.section	.text.FlashEraseBlocks,"ax",@progbits
+	.align	2
+	.global	FlashEraseBlocks
+	.type	FlashEraseBlocks, %function
+FlashEraseBlocks:
+.LFB342:
+	.loc 1 171 0
+	.cfi_startproc
+.LVL662:
+	stp	x29, x30, [sp, -80]!
+	.cfi_def_cfa_offset 80
+	.cfi_offset 29, -80
+	.cfi_offset 30, -72
+	.loc 1 174 0
+	adrp	x1, .LANCHOR0
+.LVL663:
+	add	x3, x1, :lo12:.LANCHOR0
+	ubfiz	x2, x2, 5, 32
+.LVL664:
+	.loc 1 171 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x23, x24, [sp, 48]
+	add	x2, x2, 4
+	.cfi_offset 23, -32
+	.cfi_offset 24, -24
+	.loc 1 174 0
+	ldrh	w23, [x3, 12]
+.LVL665:
+	.loc 1 171 0
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -64
+	.cfi_offset 20, -56
+	add	x19, x0, 4
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -48
+	.cfi_offset 22, -40
+	mov	x20, x1
+	.loc 1 179 0
+	adrp	x21, .LANCHOR107
+	add	x22, x0, x2
+	.loc 1 184 0
+	add	x24, x21, :lo12:.LANCHOR107
+.LVL666:
+.L408:
+	.loc 1 177 0 discriminator 1
+	cmp	x19, x22
+	bne	.L414
+	.loc 1 190 0
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+.LVL667:
+	ldp	x29, x30, [sp], 80
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL668:
+.L414:
+	.cfi_restore_state
+	.loc 1 178 0
+	ldr	w0, [x19]
+	add	x2, x29, 72
+	add	x1, x29, 76
+	bl	l2p_addr_tran.isra.0
+.LVL669:
+	.loc 1 179 0
+	add	x0, x21, :lo12:.LANCHOR107
+	ldr	w1, [x29, 76]
+	ldr	x2, [x0, 8]
+	ldrb	w0, [x29, 72]
+	blr	x2
+.LVL670:
+	.loc 1 181 0
+	cbnz	w0, .L409
+	.loc 1 180 0
+	str	wzr, [x19, -4]
+.LVL671:
+.L410:
+	.loc 1 183 0
+	add	x0, x20, :lo12:.LANCHOR0
+	ldrh	w0, [x0, 14]
+	cmp	w0, 4
+	bne	.L412
+	.loc 1 184 0
+	ldrb	w0, [x29, 72]
+	ldr	x2, [x24, 8]
+	ldr	w1, [x29, 76]
+	add	w1, w23, w1
+	blr	x2
+.LVL672:
+	.loc 1 185 0
+	cbz	w0, .L412
+	.loc 1 186 0
+	mov	w0, -1
+.LVL673:
+	str	w0, [x19, -4]
+.L412:
+	add	x19, x19, 32
+	b	.L408
+.LVL674:
+.L409:
+	.loc 1 182 0
+	mov	w0, -1
+.LVL675:
+	str	w0, [x19, -4]
+	b	.L410
+	.cfi_endproc
+.LFE342:
+	.size	FlashEraseBlocks, .-FlashEraseBlocks
+	.section	.text.FtlFreeSysBlkQueueIn,"ax",@progbits
+	.align	2
+	.global	FtlFreeSysBlkQueueIn
+	.type	FtlFreeSysBlkQueueIn, %function
+FtlFreeSysBlkQueueIn:
+.LFB240:
+	.loc 2 98 0
+	.cfi_startproc
+.LVL676:
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	str	x21, [sp, 32]
+	.cfi_offset 21, -16
+	and	w21, w0, 65535
+.LBB217:
+.LBB218:
+	.loc 2 94 0
+	adrp	x0, .LANCHOR38
+.LVL677:
+	add	x2, x0, :lo12:.LANCHOR38
+.LBE218:
+.LBE217:
+	.loc 2 98 0
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	.loc 2 99 0
+	ldrh	w2, [x2, 6]
+	cmp	w2, 1024
+	beq	.L419
+	and	w1, w1, 65535
+	mov	x19, x0
+.LVL678:
+.LBB219:
+	.loc 2 101 0
+	cbz	w1, .L421
+.LBB220:
+	.loc 2 102 0
+	mov	w0, w21
+	bl	P2V_block_in_plane
+.LVL679:
+	and	w20, w0, 65535
+.LVL680:
+	.loc 2 103 0
+	adrp	x0, .LANCHOR112
+.LVL681:
+	lsl	w1, w21, 10
+	.loc 2 104 0
+	mov	w2, 1
+	.loc 2 103 0
+	ldr	x0, [x0, #:lo12:.LANCHOR112]
+	str	w1, [x0, 4]
+	.loc 2 104 0
+	mov	w1, w2
+	bl	FlashEraseBlocks
+.LVL682:
+	.loc 2 105 0
+	adrp	x1, .LANCHOR40
+	ubfiz	x0, x20, 1, 16
+	ldr	x2, [x1, #:lo12:.LANCHOR40]
+	ldrh	w1, [x2, x0]
+	add	w1, w1, 1
+	strh	w1, [x2, x0]
+	.loc 2 106 0
+	adrp	x1, .LANCHOR76
+	ldr	w0, [x1, #:lo12:.LANCHOR76]
+	add	w0, w0, 1
+	str	w0, [x1, #:lo12:.LANCHOR76]
+.LVL683:
+.L421:
+.LBE220:
+	.loc 2 108 0
+	add	x0, x19, :lo12:.LANCHOR38
+	ldrh	w1, [x0, 6]
+	add	w1, w1, 1
+	strh	w1, [x0, 6]
+	.loc 2 109 0
+	ldrh	w1, [x0, 4]
+	add	x2, x0, x1, sxtw 1
+	.loc 2 110 0
+	add	w1, w1, 1
+	and	w1, w1, 1023
+	strh	w1, [x0, 4]
+	.loc 2 109 0
+	strh	w21, [x2, 8]
+.LVL684:
+.L419:
+.LBE219:
+	.loc 2 113 0
+	ldp	x19, x20, [sp, 16]
+	ldr	x21, [sp, 32]
+.LVL685:
+	ldp	x29, x30, [sp], 48
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE240:
+	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
+	.section	.text.FtlLowFormatEraseBlock,"ax",@progbits
+	.align	2
+	.global	FtlLowFormatEraseBlock
+	.type	FtlLowFormatEraseBlock, %function
+FtlLowFormatEraseBlock:
+.LFB209:
+	.loc 3 528 0
+	.cfi_startproc
+.LVL686:
+	stp	x29, x30, [sp, -144]!
+	.cfi_def_cfa_offset 144
+	.cfi_offset 29, -144
+	.cfi_offset 30, -136
+	.loc 3 541 0
+	adrp	x7, .LANCHOR13
+	add	x7, x7, :lo12:.LANCHOR13
+	.loc 3 539 0
+	mov	x5, 0
+	.loc 3 528 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -96
+	.cfi_offset 24, -88
+	and	w24, w0, 65535
+	.loc 3 538 0
+	adrp	x0, .LANCHOR113
+.LVL687:
+	.loc 3 528 0
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	and	w23, w1, 255
+	.loc 3 538 0
+	str	w24, [x0, #:lo12:.LANCHOR113]
+.LVL688:
+	.loc 3 551 0
+	adrp	x0, .LANCHOR115
+	.loc 3 550 0
+	adrp	x1, .LANCHOR114
+.LVL689:
+	.cfi_offset 19, -128
+	.cfi_offset 20, -120
+	.cfi_offset 21, -112
+	.cfi_offset 22, -104
+	.loc 3 539 0
+	adrp	x20, .LANCHOR3
+	.loc 3 540 0
+	adrp	x21, .LANCHOR112
+	.loc 3 551 0
+	ldr	x11, [x0, #:lo12:.LANCHOR115]
+	adrp	x0, .LANCHOR24
+	.loc 3 539 0
+	ldrh	w8, [x20, #:lo12:.LANCHOR3]
+	.loc 3 540 0
+	ldr	x6, [x21, #:lo12:.LANCHOR112]
+	.loc 3 536 0
+	mov	w22, 0
+	.loc 3 550 0
+	ldr	x10, [x1, #:lo12:.LANCHOR114]
+	.loc 3 537 0
+	mov	w19, 0
+	.loc 3 551 0
+	ldrh	w12, [x0, #:lo12:.LANCHOR24]
+	.loc 3 528 0
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 25, -80
+	.cfi_offset 26, -72
+	.cfi_offset 27, -64
+	.cfi_offset 28, -56
+	stp	x0, x1, [x29, 120]
+.LVL690:
+.L430:
+	.loc 3 539 0 discriminator 1
+	cmp	w8, w5, uxth
+	bhi	.L434
+	.loc 3 559 0
+	cbz	w22, .L429
+	.loc 3 562 0
+	mov	w2, w22
+	ubfiz	x22, x22, 5, 16
+.LVL691:
+	mov	x25, 0
+	mov	w1, 0
+	mov	x0, x6
+	bl	FlashEraseBlocks
+.LVL692:
+.L438:
+	.loc 3 564 0
+	ldr	x0, [x21, #:lo12:.LANCHOR112]
+	add	x1, x0, x25
+	ldr	w0, [x0, x25]
+	cmn	w0, #1
+	bne	.L437
+	.loc 3 566 0
+	ldr	w0, [x1, 4]
+	.loc 3 565 0
+	add	w19, w19, 1
+.LVL693:
+	and	w19, w19, 65535
+.LVL694:
+	.loc 3 566 0
+	lsr	w0, w0, 10
+	bl	FtlBbmMapBadBlock
+.LVL695:
+.L437:
+	add	x25, x25, 32
+	.loc 3 563 0 discriminator 2
+	cmp	x25, x22
+	bne	.L438
+	.loc 3 571 0
+	cbz	w23, .L451
+.LVL696:
+	.loc 3 573 0
+	adrp	x0, .LANCHOR20
+	.loc 3 572 0
+	mov	w25, 1
+	.loc 3 573 0
+	ldrh	w26, [x0, #:lo12:.LANCHOR20]
+.LVL697:
+	.loc 3 574 0
+	lsr	w28, w26, 2
+.LVL698:
+.L439:
+	.loc 3 578 0
+	add	x0, x20, :lo12:.LANCHOR3
+	.loc 3 580 0
+	adrp	x27, .LANCHOR13
+	.loc 3 578 0
+	str	x0, [x29, 136]
+	mov	w22, 0
+	.loc 3 580 0
+	add	x0, x27, :lo12:.LANCHOR13
+	str	x0, [x29, 112]
+.LVL699:
+.L447:
+	.loc 3 578 0
+	ldr	x0, [x29, 136]
+	mov	x5, 0
+	.loc 3 579 0
+	ldr	x6, [x21, #:lo12:.LANCHOR112]
+	.loc 3 577 0
+	mov	w20, 0
+	.loc 3 578 0
+	ldrh	w7, [x0]
+	.loc 3 587 0
+	adrp	x0, .LANCHOR116
+	ldr	x8, [x0, #:lo12:.LANCHOR116]
+	.loc 3 588 0
+	ldr	x0, [x29, 128]
+	ldr	x10, [x0, #:lo12:.LANCHOR114]
+	ldr	x0, [x29, 120]
+	ldrh	w11, [x0, #:lo12:.LANCHOR24]
+.LVL700:
+.L440:
+	.loc 3 578 0 discriminator 1
+	cmp	w7, w5, uxth
+	bhi	.L443
+	.loc 3 593 0
+	cbz	w20, .L429
+	.loc 3 596 0
+	mov	w1, w20
+	mov	w3, 1
+	mov	w2, w25
+	mov	x0, x6
+	bl	FlashProgPages
+.LVL701:
+	mov	x27, 0
+	ubfiz	x1, x20, 5, 16
+.LVL702:
+.L446:
+	.loc 3 598 0
+	ldr	x0, [x21, #:lo12:.LANCHOR112]
+	add	x3, x0, x27
+	ldr	w0, [x0, x27]
+	cbz	w0, .L445
+	.loc 3 600 0
+	ldr	w0, [x3, 4]
+	.loc 3 599 0
+	add	w19, w19, 1
+.LVL703:
+	str	x1, [x29, 104]
+	and	w19, w19, 65535
+.LVL704:
+	.loc 3 600 0
+	lsr	w0, w0, 10
+	bl	FtlBbmMapBadBlock
+.LVL705:
+	ldr	x1, [x29, 104]
+.L445:
+	add	x27, x27, 32
+	.loc 3 597 0 discriminator 2
+	cmp	x1, x27
+	bne	.L446
+	.loc 3 604 0
+	add	w22, w22, w28
+.LVL706:
+	and	w22, w22, 65535
+.LVL707:
+	.loc 3 605 0
+	cmp	w26, w22
+	bhi	.L447
+	mov	x22, 0
+.LVL708:
+.L449:
+	.loc 3 611 0
+	cbz	w23, .L448
+	.loc 3 611 0 is_stmt 0 discriminator 1
+	ldr	x0, [x21, #:lo12:.LANCHOR112]
+	add	x1, x0, x22
+	ldr	w0, [x0, x22]
+	cbnz	w0, .L448
+	.loc 3 612 0 is_stmt 1
+	ldr	w0, [x1, 4]
+	mov	w1, 1
+	lsr	w0, w0, 10
+	bl	FtlFreeSysBlkQueueIn
+.LVL709:
+.L448:
+	add	x22, x22, 32
+	.loc 3 610 0 discriminator 2
+	cmp	x22, x27
+	bne	.L449
+	.loc 3 615 0
+	cmp	w24, 63
+	ccmp	w23, 0, 0, hi
+	beq	.L429
+	.loc 3 616 0
+	ldr	x0, [x21, #:lo12:.LANCHOR112]
+	mov	w2, w20
+	mov	w1, w25
+	bl	FlashEraseBlocks
+.LVL710:
+.L429:
+	.loc 3 619 0
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+.LVL711:
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+.LVL712:
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 144
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL713:
+.L434:
+	.cfi_restore_state
+	.loc 3 540 0
+	lsl	x0, x5, 5
+	.loc 3 541 0
+	mov	w1, w24
+	.loc 3 540 0
+	str	wzr, [x6, x0]
+	.loc 3 541 0
+	ldrb	w0, [x7, x5]
+	bl	V2P_block
+.LVL714:
+	and	w13, w0, 65535
+	mov	w14, w13
+.LVL715:
+	.loc 3 543 0
+	cbz	w23, .L431
+	.loc 3 544 0
+	bl	IsBlkInVendorPart
+.LVL716:
+	cbnz	w0, .L432
+.L431:
+	.loc 3 548 0
+	mov	w0, w14
+	bl	FtlBbmIsBadBlock
+.LVL717:
+	cbnz	w0, .L433
+	.loc 3 549 0
+	ubfiz	x0, x22, 5, 16
+	.loc 3 551 0
+	mul	w1, w22, w12
+	.loc 3 549 0
+	add	x0, x6, x0
+	.loc 3 552 0
+	add	w22, w22, 1
+.LVL718:
+	and	w22, w22, 65535
+.LVL719:
+	.loc 3 549 0
+	lsl	w13, w13, 10
+.LVL720:
+	.loc 3 551 0
+	asr	w1, w1, 2
+	add	x1, x11, x1, sxtw 2
+	.loc 3 549 0
+	str	w13, [x0, 4]
+	.loc 3 551 0
+	stp	x10, x1, [x0, 8]
+.L432:
+.LVL721:
+	add	x5, x5, 1
+.LVL722:
+	b	.L430
+.LVL723:
+.L433:
+	.loc 3 554 0
+	add	w19, w19, 1
+.LVL724:
+	and	w19, w19, 65535
+.LVL725:
+	b	.L432
+.LVL726:
+.L451:
+	.loc 3 534 0
+	mov	w25, 0
+	.loc 3 533 0
+	mov	w28, 6
+	.loc 3 531 0
+	mov	w26, 1
+	b	.L439
+.LVL727:
+.L443:
+	.loc 3 579 0
+	lsl	x0, x5, 5
+	.loc 3 580 0
+	mov	w1, w24
+	.loc 3 579 0
+	str	wzr, [x6, x0]
+	.loc 3 580 0
+	ldr	x0, [x29, 112]
+	ldrb	w0, [x0, x5]
+	bl	V2P_block
+.LVL728:
+	and	w12, w0, 65535
+	mov	w13, w12
+.LVL729:
+	.loc 3 581 0
+	cbz	w23, .L441
+	.loc 3 582 0
+	bl	IsBlkInVendorPart
+.LVL730:
+	cbnz	w0, .L442
+.L441:
+	.loc 3 585 0
+	mov	w0, w13
+	bl	FtlBbmIsBadBlock
+.LVL731:
+	cbnz	w0, .L442
+	.loc 3 586 0
+	ubfiz	x0, x20, 5, 16
+	.loc 3 588 0
+	mul	w1, w20, w11
+	.loc 3 586 0
+	add	x0, x6, x0
+	.loc 3 589 0
+	add	w20, w20, 1
+.LVL732:
+	and	w20, w20, 65535
+.LVL733:
+	.loc 3 586 0
+	add	w12, w22, w12, lsl 10
+.LVL734:
+	.loc 3 588 0
+	asr	w1, w1, 2
+	add	x1, x10, x1, sxtw 2
+	.loc 3 586 0
+	str	w12, [x0, 4]
+	.loc 3 588 0
+	stp	x8, x1, [x0, 8]
+.L442:
+.LVL735:
+	add	x5, x5, 1
+.LVL736:
+	b	.L440
+	.cfi_endproc
+.LFE209:
+	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
+	.section	.text.ftl_memset,"ax",@progbits
+	.align	2
+	.global	ftl_memset
+	.type	ftl_memset, %function
+ftl_memset:
+.LFB345:
+	.loc 1 238 0
+	.cfi_startproc
+.LVL737:
+	.loc 1 239 0
+	uxtw	x2, w2
+	b	memset
+.LVL738:
+	.cfi_endproc
+.LFE345:
+	.size	ftl_memset, .-ftl_memset
+	.section	.text.FtlMemInit,"ax",@progbits
+	.align	2
+	.global	FtlMemInit
+	.type	FtlMemInit, %function
+FtlMemInit:
+.LFB206:
+	.loc 3 279 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -208]!
+	.cfi_def_cfa_offset 208
+	.cfi_offset 29, -208
+	.cfi_offset 30, -200
+	.loc 3 282 0
+	adrp	x0, .LANCHOR71
+	.loc 3 297 0
+	mov	w1, 65535
+	.loc 3 279 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 3 282 0
+	str	wzr, [x0, #:lo12:.LANCHOR71]
+	.loc 3 283 0
+	adrp	x0, .LANCHOR72
+	.loc 3 279 0
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -192
+	.cfi_offset 20, -184
+	.loc 3 310 0
+	adrp	x19, .LANCHOR21
+	.loc 3 283 0
+	str	wzr, [x0, #:lo12:.LANCHOR72]
+	.loc 3 284 0
+	adrp	x0, .LANCHOR68
+	.loc 3 279 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -176
+	.cfi_offset 22, -168
+	.loc 3 312 0
+	adrp	x22, .LANCHOR3
+	.loc 3 284 0
+	str	wzr, [x0, #:lo12:.LANCHOR68]
+	.loc 3 285 0
+	adrp	x0, .LANCHOR65
+	.loc 3 279 0
+	stp	x23, x24, [sp, 48]
+	.loc 3 319 0
+	adrp	x21, .LANCHOR23
+	.loc 3 285 0
+	str	wzr, [x0, #:lo12:.LANCHOR65]
+	.loc 3 286 0
+	adrp	x0, .LANCHOR64
+	.loc 3 279 0
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 23, -160
+	.cfi_offset 24, -152
+	.cfi_offset 25, -144
+	.cfi_offset 26, -136
+	.loc 3 330 0
+	adrp	x24, .LANCHOR109
+	.loc 3 286 0
+	str	wzr, [x0, #:lo12:.LANCHOR64]
+	.loc 3 287 0
+	adrp	x0, .LANCHOR66
+	.loc 3 279 0
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 27, -128
+	.cfi_offset 28, -120
+	.loc 3 331 0
+	adrp	x23, .LANCHOR115
+	.loc 3 287 0
+	str	wzr, [x0, #:lo12:.LANCHOR66]
+	.loc 3 288 0
+	adrp	x0, .LANCHOR67
+	.loc 3 349 0
+	adrp	x25, .LANCHOR43
+	.loc 3 351 0
+	adrp	x27, .LANCHOR129
+	.loc 3 288 0
+	str	wzr, [x0, #:lo12:.LANCHOR67]
+	.loc 3 289 0
+	adrp	x0, .LANCHOR63
+	.loc 3 352 0
+	adrp	x26, .LANCHOR130
+	.loc 3 289 0
+	str	wzr, [x0, #:lo12:.LANCHOR63]
+	.loc 3 290 0
+	adrp	x0, .LANCHOR73
+	str	wzr, [x0, #:lo12:.LANCHOR73]
+	.loc 3 291 0
+	adrp	x0, .LANCHOR74
+	str	wzr, [x0, #:lo12:.LANCHOR74]
+	.loc 3 292 0
+	adrp	x0, .LANCHOR76
+	str	wzr, [x0, #:lo12:.LANCHOR76]
+	.loc 3 293 0
+	adrp	x0, .LANCHOR77
+	str	wzr, [x0, #:lo12:.LANCHOR77]
+	.loc 3 294 0
+	adrp	x0, .LANCHOR78
+	str	wzr, [x0, #:lo12:.LANCHOR78]
+	.loc 3 295 0
+	adrp	x0, .LANCHOR117
+	str	wzr, [x0, #:lo12:.LANCHOR117]
+	.loc 3 296 0
+	adrp	x0, .LANCHOR89
+	str	wzr, [x0, #:lo12:.LANCHOR89]
+	.loc 3 297 0
+	adrp	x0, .LANCHOR118
+	str	w1, [x0, #:lo12:.LANCHOR118]
+	.loc 3 298 0
+	adrp	x0, .LANCHOR119
+	.loc 3 301 0
+	adrp	x1, .LANCHOR101
+	.loc 3 298 0
+	str	wzr, [x0, #:lo12:.LANCHOR119]
+	.loc 3 299 0
+	adrp	x0, .LANCHOR86
+	str	wzr, [x0, #:lo12:.LANCHOR86]
+	.loc 3 300 0
+	adrp	x0, .LANCHOR113
+	str	wzr, [x0, #:lo12:.LANCHOR113]
+	.loc 3 301 0
+	mov	w0, -1
+	strh	w0, [x1, #:lo12:.LANCHOR101]
+	.loc 3 302 0
+	adrp	x1, .LANCHOR102
+	strh	w0, [x1, #:lo12:.LANCHOR102]
+	.loc 3 303 0
+	adrp	x0, .LANCHOR84
+	mov	w1, 32
+	strh	w1, [x0, #:lo12:.LANCHOR84]
+	.loc 3 304 0
+	adrp	x0, .LANCHOR85
+	mov	w1, 128
+	strh	w1, [x0, #:lo12:.LANCHOR85]
+	.loc 3 305 0
+	adrp	x0, .LANCHOR87
+	strh	wzr, [x0, #:lo12:.LANCHOR87]
+	.loc 3 306 0
+	adrp	x0, .LANCHOR103
+	strh	wzr, [x0, #:lo12:.LANCHOR103]
+	.loc 3 307 0
+	adrp	x0, .LANCHOR105
+	strh	wzr, [x0, #:lo12:.LANCHOR105]
+	.loc 3 310 0
+	ldrh	w0, [x19, #:lo12:.LANCHOR21]
+	lsl	w0, w0, 1
+	bl	ftl_malloc
+.LVL739:
+	adrp	x1, .LANCHOR98
+	str	x0, [x1, #:lo12:.LANCHOR98]
+	.loc 3 311 0
+	mov	w0, 12
+	ldrh	w1, [x19, #:lo12:.LANCHOR21]
+	mul	w0, w1, w0
+	bl	ftl_malloc
+.LVL740:
+	.loc 3 312 0
+	ldrh	w19, [x22, #:lo12:.LANCHOR3]
+	.loc 3 311 0
+	adrp	x3, .LANCHOR100
+	str	x3, [x29, 104]
+	.loc 3 312 0
+	lsl	w20, w19, 5
+.LVL741:
+	.loc 3 313 0
+	lsl	w19, w19, 7
+	.loc 3 311 0
+	str	x0, [x3, #:lo12:.LANCHOR100]
+	.loc 3 313 0
+	mov	w0, w19
+	bl	ftl_malloc
+.LVL742:
+	adrp	x15, .LANCHOR120
+	str	x15, [x29, 112]
+	str	x0, [x15, #:lo12:.LANCHOR120]
+	.loc 3 314 0
+	mov	w0, w20
+	bl	ftl_malloc
+.LVL743:
+	adrp	x11, .LANCHOR121
+	str	x11, [x29, 120]
+	str	x0, [x11, #:lo12:.LANCHOR121]
+	.loc 3 315 0
+	mov	w0, w19
+	bl	ftl_malloc
+.LVL744:
+	adrp	x14, .LANCHOR122
+	str	x14, [x29, 128]
+	str	x0, [x14, #:lo12:.LANCHOR122]
+	.loc 3 316 0
+	mov	w0, w20
+	bl	ftl_malloc
+.LVL745:
+	adrp	x13, .LANCHOR112
+	str	x13, [x29, 136]
+	str	x0, [x13, #:lo12:.LANCHOR112]
+	.loc 3 317 0
+	mov	w0, w20
+	bl	ftl_malloc
+.LVL746:
+	.loc 3 320 0
+	adrp	x20, .LANCHOR96
+.LVL747:
+	.loc 3 317 0
+	adrp	x12, .LANCHOR95
+	.loc 3 319 0
+	ldrh	w19, [x21, #:lo12:.LANCHOR23]
+.LVL748:
+	.loc 3 317 0
+	str	x12, [x29, 144]
+	str	x0, [x12, #:lo12:.LANCHOR95]
+	.loc 3 320 0
+	ldrh	w0, [x22, #:lo12:.LANCHOR3]
+	lsl	w0, w0, 1
+	add	w0, w0, 1
+	str	w0, [x20, #:lo12:.LANCHOR96]
+	.loc 3 321 0
+	mov	w0, w19
+	bl	ftl_malloc
+.LVL749:
+	adrp	x10, .LANCHOR39
+	str	x10, [x29, 152]
+	str	x0, [x10, #:lo12:.LANCHOR39]
+	.loc 3 322 0
+	mov	w0, w19
+	bl	ftl_malloc
+.LVL750:
+	adrp	x8, .LANCHOR123
+	str	x8, [x29, 160]
+	str	x0, [x8, #:lo12:.LANCHOR123]
+	.loc 3 323 0
+	mov	w0, w19
+	bl	ftl_malloc
+.LVL751:
+	adrp	x7, .LANCHOR124
+	str	x7, [x29, 168]
+	str	x0, [x7, #:lo12:.LANCHOR124]
+	.loc 3 324 0
+	ldr	w0, [x20, #:lo12:.LANCHOR96]
+	mul	w0, w19, w0
+	bl	ftl_malloc
+.LVL752:
+	adrp	x6, .LANCHOR93
+	str	x6, [x29, 176]
+	str	x0, [x6, #:lo12:.LANCHOR93]
+	.loc 3 325 0
+	mov	w0, w19
+	bl	ftl_malloc
+.LVL753:
+	adrp	x5, .LANCHOR116
+	str	x5, [x29, 184]
+	str	x0, [x5, #:lo12:.LANCHOR116]
+	.loc 3 326 0
+	mov	w0, w19
+	bl	ftl_malloc
+.LVL754:
+	.loc 3 329 0
+	adrp	x19, .LANCHOR24
+.LVL755:
+	.loc 3 326 0
+	adrp	x4, .LANCHOR114
+	.loc 3 327 0
+	ldr	w2, [x20, #:lo12:.LANCHOR96]
+	.loc 3 326 0
+	str	x4, [x29, 192]
+	str	x0, [x4, #:lo12:.LANCHOR114]
+	.loc 3 327 0
+	mov	w0, 24
+	mul	w0, w2, w0
+	bl	ftl_malloc
+.LVL756:
+	.loc 3 329 0
+	ldrh	w28, [x19, #:lo12:.LANCHOR24]
+	.loc 3 327 0
+	adrp	x1, .LANCHOR92
+	str	x0, [x1, #:lo12:.LANCHOR92]
+	.loc 3 329 0
+	ldrh	w0, [x22, #:lo12:.LANCHOR3]
+	.loc 3 332 0
+	adrp	x22, .LANCHOR94
+	.loc 3 329 0
+	mul	w28, w28, w0
+.LVL757:
+	.loc 3 330 0
+	mov	w0, w28
+	bl	ftl_malloc
+.LVL758:
+	str	x0, [x24, #:lo12:.LANCHOR109]
+	.loc 3 331 0
+	lsl	w0, w28, 2
+	bl	ftl_malloc
+.LVL759:
+	str	x0, [x23, #:lo12:.LANCHOR115]
+	.loc 3 332 0
+	ldrh	w1, [x19, #:lo12:.LANCHOR24]
+	.loc 3 335 0
+	adrp	x28, .LANCHOR125
+.LVL760:
+	.loc 3 332 0
+	ldr	w0, [x20, #:lo12:.LANCHOR96]
+	.loc 3 335 0
+	adrp	x20, .LANCHOR6
+	.loc 3 332 0
+	mul	w0, w1, w0
+	bl	ftl_malloc
+.LVL761:
+	str	x0, [x22, #:lo12:.LANCHOR94]
+	.loc 3 335 0
+	ldrh	w0, [x20, #:lo12:.LANCHOR6]
+	ubfiz	w0, w0, 1, 15
+	strh	w0, [x28, #:lo12:.LANCHOR125]
+	.loc 3 336 0
+	and	w0, w0, 65534
+	bl	ftl_malloc
+.LVL762:
+	adrp	x1, .LANCHOR126
+	str	x0, [x1, #:lo12:.LANCHOR126]
+	.loc 3 337 0
+	ldrh	w0, [x28, #:lo12:.LANCHOR125]
+	add	x0, x0, 547
+	lsr	x0, x0, 9
+	strh	w0, [x28, #:lo12:.LANCHOR125]
+	.loc 3 338 0
+	lsl	w0, w0, 9
+	bl	ftl_malloc
+.LVL763:
+	adrp	x1, .LANCHOR127
+	.loc 3 345 0
+	ldrh	w28, [x20, #:lo12:.LANCHOR6]
+	.loc 3 338 0
+	str	x0, [x1, #:lo12:.LANCHOR127]
+	.loc 3 339 0
+	adrp	x1, .LANCHOR40
+	.loc 3 345 0
+	lsl	w28, w28, 1
+	.loc 3 339 0
+	add	x0, x0, 32
+	str	x0, [x1, #:lo12:.LANCHOR40]
+.LVL764:
+	.loc 3 347 0
+	mov	w0, w28
+	bl	ftl_malloc
+.LVL765:
+	adrp	x1, .LANCHOR128
+	str	x0, [x1, #:lo12:.LANCHOR128]
+	.loc 3 349 0
+	mov	w0, w28
+	.loc 3 350 0
+	adrp	x28, .LANCHOR30
+.LVL766:
+	.loc 3 349 0
+	bl	ftl_malloc
+.LVL767:
+	str	x0, [x25, #:lo12:.LANCHOR43]
+.LVL768:
+	.loc 3 350 0
+	ldr	w1, [x28, #:lo12:.LANCHOR30]
+	lsl	w19, w1, 1
+	.loc 3 351 0
+	mov	w0, w19
+	bl	ftl_malloc
+.LVL769:
+	str	x0, [x27, #:lo12:.LANCHOR129]
+	.loc 3 352 0
+	mov	w0, w19
+	bl	ftl_malloc
+.LVL770:
+	str	x0, [x26, #:lo12:.LANCHOR130]
+	.loc 3 353 0
+	ldrh	w0, [x20, #:lo12:.LANCHOR6]
+	.loc 3 354 0
+	adrp	x19, .LANCHOR27
+	.loc 3 353 0
+	lsr	w0, w0, 3
+	add	w0, w0, 4
+	bl	ftl_malloc
+.LVL771:
+	adrp	x1, .LANCHOR1
+	str	x0, [x1, #:lo12:.LANCHOR1]
+	.loc 3 354 0
+	ldrh	w0, [x19, #:lo12:.LANCHOR27]
+	lsl	w0, w0, 1
+	bl	ftl_malloc
+.LVL772:
+	adrp	x2, .LANCHOR36
+	str	x0, [x2, #:lo12:.LANCHOR36]
+	.loc 3 355 0
+	ldrh	w0, [x19, #:lo12:.LANCHOR27]
+	lsl	w0, w0, 1
+	bl	ftl_malloc
+.LVL773:
+	adrp	x2, .LANCHOR131
+	str	x0, [x2, #:lo12:.LANCHOR131]
+	.loc 3 356 0
+	ldrh	w0, [x19, #:lo12:.LANCHOR27]
+	adrp	x19, .LANCHOR40
+	lsl	w0, w0, 2
+	bl	ftl_malloc
+.LVL774:
+	adrp	x1, .LANCHOR132
+	str	x0, [x1, #:lo12:.LANCHOR132]
+	.loc 3 357 0
+	adrp	x1, .LANCHOR28
+	str	x1, [x29, 200]
+	ldrh	w0, [x1, #:lo12:.LANCHOR28]
+	lsl	w0, w0, 2
+	bl	ftl_malloc
+.LVL775:
+	.loc 3 358 0
+	ldr	x1, [x29, 200]
+	.loc 3 357 0
+	adrp	x2, .LANCHOR133
+	str	x0, [x2, #:lo12:.LANCHOR133]
+	.loc 3 358 0
+	ldrh	w2, [x1, #:lo12:.LANCHOR28]
+	mov	w1, 0
+	lsl	w2, w2, 2
+	bl	ftl_memset
+.LVL776:
+	.loc 3 360 0
+	adrp	x0, .LANCHOR32
+	ldrh	w0, [x0, #:lo12:.LANCHOR32]
+	.loc 3 361 0
+	lsl	w0, w0, 2
+.LVL777:
+	bl	ftl_malloc
+.LVL778:
+	adrp	x1, .LANCHOR134
+	str	x0, [x1, #:lo12:.LANCHOR134]
+.LVL779:
+	.loc 3 362 0
+	ldr	w0, [x28, #:lo12:.LANCHOR30]
+	.loc 3 364 0
+	adrp	x28, .LANCHOR33
+	.loc 3 363 0
+	lsl	w0, w0, 2
+	bl	ftl_malloc
+.LVL780:
+	adrp	x1, .LANCHOR135
+	str	x0, [x1, #:lo12:.LANCHOR135]
+.LVL781:
+	.loc 3 364 0
+	ldrh	w0, [x28, #:lo12:.LANCHOR33]
+	.loc 3 365 0
+	lsl	w0, w0, 4
+.LVL782:
+	bl	ftl_malloc
+.LVL783:
+	adrp	x1, .LANCHOR56
+	str	x0, [x1, #:lo12:.LANCHOR56]
+.LVL784:
+	.loc 3 366 0
+	ldrh	w1, [x28, #:lo12:.LANCHOR33]
+	ldrh	w0, [x21, #:lo12:.LANCHOR23]
+	.loc 3 371 0
+	adrp	x21, .LANCHOR10
+	.loc 3 367 0
+	mul	w0, w1, w0
+.LVL785:
+	bl	ftl_malloc
+.LVL786:
+	adrp	x1, .LANCHOR136
+	str	x0, [x1, #:lo12:.LANCHOR136]
+.LVL787:
+	.loc 3 369 0
+	mov	w0, 6
+	.loc 3 368 0
+	ldrh	w1, [x20, #:lo12:.LANCHOR6]
+	.loc 3 370 0
+	adrp	x20, .LANCHOR137
+	.loc 3 369 0
+	mul	w0, w1, w0
+.LVL788:
+	bl	ftl_malloc
+.LVL789:
+	adrp	x1, .LANCHOR41
+	str	x0, [x1, #:lo12:.LANCHOR41]
+	.loc 3 370 0
+	adrp	x0, .LANCHOR17
+	.loc 3 371 0
+	ldrh	w1, [x21, #:lo12:.LANCHOR10]
+	.loc 3 370 0
+	ldrh	w0, [x0, #:lo12:.LANCHOR17]
+	add	w0, w0, 31
+	asr	w0, w0, 5
+	strh	w0, [x20, #:lo12:.LANCHOR137]
+.LVL790:
+	.loc 3 371 0
+	mul	w0, w1, w0
+.LVL791:
+	.loc 3 372 0
+	lsl	w0, w0, 2
+.LVL792:
+	bl	ftl_malloc
+.LVL793:
+	ldp	x3, x15, [x29, 104]
+	adrp	x1, .LANCHOR37
+	.loc 3 374 0
+	ldrh	w20, [x20, #:lo12:.LANCHOR137]
+	.loc 3 372 0
+	add	x2, x1, :lo12:.LANCHOR37
+	ldp	x11, x14, [x29, 120]
+	.loc 3 373 0
+	mov	w30, w20
+	ldp	x13, x12, [x29, 136]
+	mov	x16, x3
+	ldp	x10, x8, [x29, 152]
+	.loc 3 372 0
+	str	x0, [x2, 32]
+.LVL794:
+	ldp	x7, x6, [x29, 168]
+	adrp	x17, .LANCHOR98
+	ldp	x5, x4, [x29, 184]
+	adrp	x3, .LANCHOR92
+	.loc 3 373 0
+	ldrh	w28, [x21, #:lo12:.LANCHOR10]
+	add	x21, x2, 40
+	mov	x0, 1
+	str	x19, [x29, 200]
+.LVL795:
+.L474:
+	.loc 3 373 0 is_stmt 0 discriminator 1
+	cmp	w0, w28
+	bcc	.L475
+	mov	w2, 8
+	sub	w2, w2, w0
+	add	x2, x2, 1
+	.loc 3 379 0 is_stmt 1
+	add	x1, x1, :lo12:.LANCHOR37
+	.loc 3 373 0
+	mov	x19, 0
+.L476:
+	add	x19, x19, 1
+	.loc 3 377 0 discriminator 1
+	cmp	x19, x2
+	bne	.L477
+	.loc 3 383 0
+	ldr	x0, [x27, #:lo12:.LANCHOR129]
+	cbnz	x0, .L478
+.L480:
+	.loc 3 385 0
+	adrp	x1, .LANCHOR138
+	adrp	x0, .LC82
+	add	x1, x1, :lo12:.LANCHOR138
+	add	x0, x0, :lo12:.LC82
+	bl	printf
+.LVL796:
+	.loc 3 386 0
+	mov	w0, -1
+.L473:
+	.loc 3 484 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 208
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.L475:
+	.cfi_restore_state
+	.loc 3 374 0 discriminator 3
+	ldr	x19, [x2, 32]
+	.loc 3 373 0 discriminator 3
+	add	w0, w0, 1
+	.loc 3 374 0 discriminator 3
+	add	x19, x19, x30, uxtw 2
+	add	w30, w30, w20
+	str	x19, [x21], 8
+	b	.L474
+.L477:
+	.loc 3 379 0 discriminator 2
+	add	x20, x0, x19
+	add	x20, x1, x20, lsl 3
+	str	xzr, [x20, 24]
+	b	.L476
+.L478:
+	.loc 3 388 0
+	ldr	x0, [x26, #:lo12:.LANCHOR130]
+	cbz	x0, .L480
+	.loc 3 393 0
+	adrp	x0, .LANCHOR134
+	ldr	x0, [x0, #:lo12:.LANCHOR134]
+	cbz	x0, .L480
+	.loc 3 398 0
+	adrp	x0, .LANCHOR135
+	ldr	x0, [x0, #:lo12:.LANCHOR135]
+	cbz	x0, .L480
+	.loc 3 404 0
+	adrp	x0, .LANCHOR56
+	ldr	x0, [x0, #:lo12:.LANCHOR56]
+	cbz	x0, .L480
+	.loc 3 409 0
+	adrp	x0, .LANCHOR136
+	ldr	x0, [x0, #:lo12:.LANCHOR136]
+	cbz	x0, .L480
+	.loc 3 414 0
+	adrp	x0, .LANCHOR41
+	ldr	x0, [x0, #:lo12:.LANCHOR41]
+	cbz	x0, .L480
+	.loc 3 419 0
+	adrp	x0, .LANCHOR37+32
+	ldr	x0, [x0, #:lo12:.LANCHOR37+32]
+	cbz	x0, .L480
+	.loc 3 425 0
+	ldr	x0, [x25, #:lo12:.LANCHOR43]
+	cbz	x0, .L480
+	.loc 3 430 0
+	ldr	x0, [x17, #:lo12:.LANCHOR98]
+	cbz	x0, .L480
+	.loc 3 430 0 is_stmt 0 discriminator 1
+	ldr	x0, [x16, #:lo12:.LANCHOR100]
+	cbz	x0, .L480
+	.loc 3 435 0 is_stmt 1
+	ldr	x0, [x15, #:lo12:.LANCHOR120]
+	cbz	x0, .L480
+	.loc 3 435 0 is_stmt 0 discriminator 1
+	ldr	x0, [x14, #:lo12:.LANCHOR122]
+	cbz	x0, .L480
+	.loc 3 435 0 discriminator 2
+	ldr	x0, [x13, #:lo12:.LANCHOR112]
+	cbz	x0, .L480
+	.loc 3 435 0 discriminator 3
+	ldr	x0, [x12, #:lo12:.LANCHOR95]
+	cbz	x0, .L480
+	.loc 3 435 0 discriminator 4
+	ldr	x0, [x11, #:lo12:.LANCHOR121]
+	cbz	x0, .L480
+	.loc 3 440 0 is_stmt 1
+	ldr	x0, [x10, #:lo12:.LANCHOR39]
+	cbz	x0, .L480
+	.loc 3 440 0 is_stmt 0 discriminator 1
+	ldr	x0, [x8, #:lo12:.LANCHOR123]
+	cbz	x0, .L480
+	.loc 3 440 0 discriminator 2
+	ldr	x0, [x7, #:lo12:.LANCHOR124]
+	cbz	x0, .L480
+	.loc 3 440 0 discriminator 3
+	ldr	x0, [x6, #:lo12:.LANCHOR93]
+	cbz	x0, .L480
+	.loc 3 441 0 is_stmt 1
+	ldr	x0, [x5, #:lo12:.LANCHOR116]
+	cbz	x0, .L480
+	.loc 3 441 0 is_stmt 0 discriminator 1
+	ldr	x0, [x4, #:lo12:.LANCHOR114]
+	cbz	x0, .L480
+	.loc 3 441 0 discriminator 2
+	ldr	x0, [x3, #:lo12:.LANCHOR92]
+	cbz	x0, .L480
+	.loc 3 446 0 is_stmt 1
+	ldr	x0, [x24, #:lo12:.LANCHOR109]
+	cbz	x0, .L480
+	.loc 3 446 0 is_stmt 0 discriminator 1
+	ldr	x0, [x23, #:lo12:.LANCHOR115]
+	cbz	x0, .L480
+	.loc 3 446 0 discriminator 2
+	ldr	x0, [x22, #:lo12:.LANCHOR94]
+	cbz	x0, .L480
+	.loc 3 452 0 is_stmt 1
+	ldr	x0, [x29, 200]
+	ldr	x0, [x0, #:lo12:.LANCHOR40]
+	cbz	x0, .L480
+	.loc 3 452 0 is_stmt 0 discriminator 1
+	adrp	x0, .LANCHOR126
+	ldr	x0, [x0, #:lo12:.LANCHOR126]
+	cbz	x0, .L480
+	.loc 3 458 0 is_stmt 1
+	adrp	x0, .LANCHOR36
+	ldr	x0, [x0, #:lo12:.LANCHOR36]
+	cbz	x0, .L480
+	.loc 3 464 0
+	adrp	x0, .LANCHOR131
+	ldr	x0, [x0, #:lo12:.LANCHOR131]
+	cbz	x0, .L480
+	.loc 3 470 0
+	adrp	x0, .LANCHOR132
+	ldr	x0, [x0, #:lo12:.LANCHOR132]
+	cbz	x0, .L480
+	.loc 3 476 0
+	adrp	x0, .LANCHOR133
+	ldr	x0, [x0, #:lo12:.LANCHOR133]
+	cbz	x0, .L480
+	.loc 3 483 0
+	mov	w0, 0
+	b	.L473
+	.cfi_endproc
+.LFE206:
+	.size	FtlMemInit, .-FtlMemInit
+	.section	.text.FtlBbt2Bitmap,"ax",@progbits
+	.align	2
+	.global	FtlBbt2Bitmap
+	.type	FtlBbt2Bitmap, %function
+FtlBbt2Bitmap:
+.LFB225:
+	.loc 4 66 0
+	.cfi_startproc
+.LVL797:
+	stp	x29, x30, [sp, -64]!
+	.cfi_def_cfa_offset 64
+	.cfi_offset 29, -64
+	.cfi_offset 30, -56
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -32
+	.cfi_offset 22, -24
+	mov	x22, x0
+	.loc 4 69 0
+	adrp	x0, .LANCHOR137
+.LVL798:
+	.loc 4 66 0
+	stp	x23, x24, [sp, 48]
+	.loc 4 74 0
+	adrp	x21, .LANCHOR17
+	.cfi_offset 23, -16
+	.cfi_offset 24, -8
+	adrp	x23, .LANCHOR139
+	.loc 4 69 0
+	ldrh	w2, [x0, #:lo12:.LANCHOR137]
+	.loc 4 74 0
+	add	x21, x21, :lo12:.LANCHOR17
+	add	x23, x23, :lo12:.LANCHOR139
+	.loc 4 66 0
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -48
+	.cfi_offset 20, -40
+	.loc 4 72 0
+	mov	w24, 65535
+	.loc 4 69 0
+	mov	x19, 0
+	.loc 4 66 0
+	mov	x20, x1
+	.loc 4 69 0
+	lsl	w2, w2, 2
+	mov	w1, 0
+.LVL799:
+	mov	x0, x20
+	bl	ftl_memset
+.LVL800:
+.L578:
+	.loc 4 72 0
+	ldrh	w0, [x22, x19]
+	cmp	w0, w24
+	beq	.L575
+	.loc 4 74 0
+	ldrh	w1, [x21]
+	cmp	w1, w0
+	bhi	.L577
+	.loc 4 74 0 is_stmt 0 discriminator 1
+	adrp	x0, .LC1
+	mov	w2, 74
+	mov	x1, x23
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL801:
+.L577:
+	.loc 4 75 0 is_stmt 1 discriminator 2
+	ldrh	w2, [x22, x19]
+	mov	w1, 1
+	add	x19, x19, 2
+	.loc 4 70 0 discriminator 2
+	cmp	x19, 1024
+	.loc 4 75 0 discriminator 2
+	ubfx	x0, x2, 5, 11
+	lsl	w2, w1, w2
+	lsl	x0, x0, 2
+	ldr	w1, [x20, x0]
+	orr	w1, w1, w2
+	str	w1, [x20, x0]
+	.loc 4 70 0 discriminator 2
+	bne	.L578
+.L575:
+	.loc 4 77 0
+	ldp	x19, x20, [sp, 16]
+.LVL802:
+	ldp	x21, x22, [sp, 32]
+.LVL803:
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE225:
+	.size	FtlBbt2Bitmap, .-FtlBbt2Bitmap
+	.section	.text.FtlBbtMemInit,"ax",@progbits
+	.align	2
+	.global	FtlBbtMemInit
+	.type	FtlBbtMemInit, %function
+FtlBbtMemInit:
+.LFB227:
+	.loc 4 149 0
+	.cfi_startproc
+	.loc 4 150 0
+	adrp	x1, .LANCHOR37
+	add	x0, x1, :lo12:.LANCHOR37
+	mov	w2, -1
+	.loc 4 152 0
+	add	x0, x0, 12
+	.loc 4 150 0
+	strh	w2, [x1, #:lo12:.LANCHOR37]
+	.loc 4 152 0
+	mov	w2, 16
+	.loc 4 151 0
+	strh	wzr, [x0, -6]
+	.loc 4 152 0
+	mov	w1, 255
+	b	ftl_memset
+.LVL804:
+	.cfi_endproc
+.LFE227:
+	.size	FtlBbtMemInit, .-FtlBbtMemInit
+	.section	.text.FtlFreeSysBlkQueueInit,"ax",@progbits
+	.align	2
+	.global	FtlFreeSysBlkQueueInit
+	.type	FtlFreeSysBlkQueueInit, %function
+FtlFreeSysBlkQueueInit:
+.LFB237:
+	.loc 2 76 0
+	.cfi_startproc
+.LVL805:
+	stp	x29, x30, [sp, -16]!
+	.cfi_def_cfa_offset 16
+	.cfi_offset 29, -16
+	.cfi_offset 30, -8
+	.loc 2 79 0
+	adrp	x1, .LANCHOR38
+	add	x3, x1, :lo12:.LANCHOR38
+	.loc 2 83 0
+	mov	w2, 2048
+	.loc 2 76 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 2 82 0
+	strh	w0, [x1, #:lo12:.LANCHOR38]
+	.loc 2 83 0
+	mov	w1, 0
+	.loc 2 79 0
+	strh	wzr, [x3, 2]
+	.loc 2 83 0
+	add	x0, x3, 8
+.LVL806:
+	.loc 2 80 0
+	strh	wzr, [x3, 4]
+	.loc 2 81 0
+	strh	wzr, [x3, 6]
+	.loc 2 83 0
+	bl	ftl_memset
+.LVL807:
+	.loc 2 85 0
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE237:
+	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
+	.section	.text.load_l2p_region,"ax",@progbits
+	.align	2
+	.global	load_l2p_region
+	.type	load_l2p_region, %function
+load_l2p_region:
+.LFB253:
+	.loc 2 442 0
+	.cfi_startproc
+.LVL808:
+	stp	x29, x30, [sp, -80]!
+	.cfi_def_cfa_offset 80
+	.cfi_offset 29, -80
+	.cfi_offset 30, -72
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -32
+	.cfi_offset 24, -24
+	.loc 2 446 0
+	adrp	x23, .LANCHOR32
+	.loc 2 442 0
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -64
+	.cfi_offset 20, -56
+	and	x19, x1, 65535
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -48
+	.cfi_offset 22, -40
+	and	w21, w0, 65535
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 25, -16
+	.cfi_offset 26, -8
+	.loc 2 446 0
+	ldrh	w0, [x23, #:lo12:.LANCHOR32]
+.LVL809:
+	cmp	w0, w21
+	bcs	.L586
+	.loc 2 446 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR140
+.LVL810:
+	adrp	x0, .LC1
+	mov	w2, 446
+	add	x1, x1, :lo12:.LANCHOR140
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL811:
+.L586:
+	.loc 2 447 0 is_stmt 1
+	adrp	x26, .LANCHOR134
+	ubfiz	x0, x21, 2, 16
+	adrp	x22, .LANCHOR56
+	ldr	x1, [x26, #:lo12:.LANCHOR134]
+	ldr	w24, [x1, x0]
+.LVL812:
+	.loc 2 449 0
+	cbnz	w24, .L587
+	.loc 2 450 0
+	ldr	x0, [x22, #:lo12:.LANCHOR56]
+	lsl	x19, x19, 4
+.LVL813:
+	adrp	x1, .LANCHOR23
+	add	x0, x0, x19
+	ldrh	w2, [x1, #:lo12:.LANCHOR23]
+	mov	w1, 255
+	ldr	x0, [x0, 8]
+	bl	ftl_memset
+.LVL814:
+	.loc 2 451 0
+	ldr	x0, [x22, #:lo12:.LANCHOR56]
+	add	x1, x0, x19
+	strh	w21, [x0, x19]
+	.loc 2 452 0
+	str	wzr, [x1, 4]
+.L588:
+	.loc 2 473 0
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+.LVL815:
+	ldp	x23, x24, [sp, 48]
+.LVL816:
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL817:
+.L587:
+	.cfi_restore_state
+	.loc 2 456 0
+	ldr	x0, [x22, #:lo12:.LANCHOR56]
+	lsl	x19, x19, 4
+	.loc 2 455 0
+	adrp	x20, .LANCHOR108
+	add	x20, x20, :lo12:.LANCHOR108
+	.loc 2 456 0
+	add	x0, x0, x19
+	.loc 2 458 0
+	mov	w2, 1
+	mov	w1, w2
+	.loc 2 455 0
+	str	w24, [x20, 4]
+	.loc 2 456 0
+	ldr	x0, [x0, 8]
+	str	x0, [x20, 8]
+	.loc 2 457 0
+	adrp	x0, .LANCHOR109
+	ldr	x0, [x0, #:lo12:.LANCHOR109]
+	str	x0, [x20, 16]
+	.loc 2 458 0
+	mov	x0, x20
+	bl	FlashReadPages
+.LVL818:
+	.loc 2 459 0
+	ldr	x25, [x20, 16]
+.LVL819:
+	.loc 2 461 0
+	ldrh	w0, [x25, 8]
+	cmp	w0, w21
+	beq	.L589
+	.loc 2 462 0
+	mov	w2, w24
+	mov	w1, w21
+	adrp	x0, .LC83
+	add	x0, x0, :lo12:.LC83
+	bl	printf
+.LVL820:
+	.loc 2 463 0
+	ldr	x1, [x20, 16]
+	mov	w3, 4
+	adrp	x0, .LC84
+	mov	w2, w3
+	add	x0, x0, :lo12:.LC84
+	bl	rknand_print_hex
+.LVL821:
+	.loc 2 464 0
+	ldrh	w3, [x23, #:lo12:.LANCHOR32]
+	adrp	x0, .LC85
+	ldr	x1, [x26, #:lo12:.LANCHOR134]
+	mov	w2, 4
+	add	x0, x0, :lo12:.LC85
+	bl	rknand_print_hex
+.LVL822:
+.L589:
+	.loc 2 467 0
+	ldrh	w0, [x25, 8]
+	cmp	w0, w21
+	beq	.L590
+	.loc 2 467 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR140
+	adrp	x0, .LC1
+	mov	w2, 467
+	add	x1, x1, :lo12:.LANCHOR140
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL823:
+.L590:
+	.loc 2 470 0 is_stmt 1
+	ldr	x0, [x22, #:lo12:.LANCHOR56]
+	add	x1, x0, x19
+	str	wzr, [x1, 4]
+	.loc 2 471 0
+	strh	w21, [x0, x19]
+	.loc 2 472 0
+	b	.L588
+	.cfi_endproc
+.LFE253:
+	.size	load_l2p_region, .-load_l2p_region
+	.section	.text.ftl_free_no_use_map_blk,"ax",@progbits
+	.align	2
+	.global	ftl_free_no_use_map_blk
+	.type	ftl_free_no_use_map_blk, %function
+ftl_free_no_use_map_blk:
+.LFB254:
+	.loc 2 476 0
+	.cfi_startproc
+.LVL824:
+	stp	x29, x30, [sp, -80]!
+	.cfi_def_cfa_offset 80
+	.cfi_offset 29, -80
+	.cfi_offset 30, -72
+	.loc 2 485 0
+	mov	w1, 0
+	.loc 2 476 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -64
+	.cfi_offset 20, -56
+	mov	x19, x0
+	.loc 2 485 0
+	ldrh	w2, [x0, 10]
+	.loc 2 476 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -48
+	.cfi_offset 22, -40
+	.loc 2 478 0
+	ldp	x21, x20, [x0, 32]
+	.loc 2 476 0
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 23, -32
+	.cfi_offset 24, -24
+	.cfi_offset 25, -16
+	.cfi_offset 26, -8
+	.loc 2 485 0
+	lsl	w2, w2, 1
+	.loc 2 477 0
+	ldr	x23, [x0, 16]
+.LVL825:
+	.loc 2 485 0
+	mov	x0, x21
+.LVL826:
+	bl	ftl_memset
+.LVL827:
+	.loc 2 486 0
+	mov	w0, 0
+.LVL828:
+.L593:
+	.loc 2 486 0 is_stmt 0 discriminator 1
+	ldrh	w1, [x19, 6]
+	cmp	w1, w0
+	bhi	.L597
+	.loc 2 494 0 is_stmt 1
+	ldrh	w26, [x21]
+.LVL829:
+	.loc 2 498 0
+	adrp	x24, .LANCHOR20
+	add	x24, x24, :lo12:.LANCHOR20
+	.loc 2 495 0
+	mov	w25, 0
+	.loc 2 497 0
+	mov	w20, 0
+.LVL830:
+.L598:
+	.loc 2 497 0 is_stmt 0 discriminator 1
+	ldrh	w0, [x19, 10]
+	cmp	w0, w20
+	bhi	.L602
+	.loc 2 513 0 is_stmt 1
+	mov	w0, w25
+	ldp	x19, x20, [sp, 16]
+.LVL831:
+	ldp	x21, x22, [sp, 32]
+.LVL832:
+	ldp	x23, x24, [sp, 48]
+.LVL833:
+	ldp	x25, x26, [sp, 64]
+.LVL834:
+	ldp	x29, x30, [sp], 80
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL835:
+.L597:
+	.cfi_restore_state
+	.loc 2 487 0
+	ubfiz	x1, x0, 2, 16
+	ldr	w2, [x20, x1]
+	.loc 2 488 0
+	mov	w1, 0
+	.loc 2 487 0
+	ubfx	x2, x2, 10, 16
+.LVL836:
+.L594:
+	.loc 2 488 0 discriminator 1
+	ldrh	w3, [x19, 10]
+	cmp	w3, w1
+	bhi	.L596
+	.loc 2 486 0 discriminator 2
+	add	w0, w0, 1
+.LVL837:
+	and	w0, w0, 65535
+.LVL838:
+	b	.L593
+.L596:
+	.loc 2 489 0
+	ubfiz	x3, x1, 1, 16
+	ldrh	w4, [x23, x3]
+	cmp	w4, w2
+	bne	.L595
+	.loc 2 490 0
+	ldrh	w4, [x21, x3]
+	add	w4, w4, 1
+	strh	w4, [x21, x3]
+.L595:
+	.loc 2 488 0 discriminator 2
+	add	w1, w1, 1
+.LVL839:
+	and	w1, w1, 65535
+.LVL840:
+	b	.L594
+.LVL841:
+.L602:
+	.loc 2 498 0
+	ldrh	w0, [x19]
+	uxtw	x22, w20
+	cmp	w0, w20
+	bne	.L599
+	.loc 2 498 0 is_stmt 0 discriminator 1
+	ldrh	w0, [x24]
+	ldrh	w1, [x19, 2]
+	cmp	w1, w0
+	bcs	.L599
+	.loc 2 499 0 is_stmt 1
+	strh	w0, [x21, x22, lsl 1]
+.L599:
+	.loc 2 500 0
+	lsl	x22, x22, 1
+	ldrh	w0, [x21, x22]
+	cmp	w26, w0
+	bls	.L600
+	mov	w25, w20
+.LVL842:
+	mov	w26, w0
+.LVL843:
+.L600:
+	.loc 2 504 0
+	cbnz	w0, .L601
+	.loc 2 504 0 is_stmt 0 discriminator 1
+	ldrh	w0, [x23, x22]
+	cbz	w0, .L601
+	.loc 2 506 0 is_stmt 1
+	mov	w1, 1
+	bl	FtlFreeSysBlkQueueIn
+.LVL844:
+	.loc 2 507 0
+	strh	wzr, [x23, x22]
+	.loc 2 508 0
+	ldrh	w0, [x19, 8]
+	sub	w0, w0, #1
+	strh	w0, [x19, 8]
+.L601:
+	.loc 2 497 0 discriminator 2
+	add	w20, w20, 1
+.LVL845:
+	and	w20, w20, 65535
+.LVL846:
+	b	.L598
+	.cfi_endproc
+.LFE254:
+	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
+	.section	.text.Ftl_write_map_blk_to_last_page,"ax",@progbits
+	.align	2
+	.global	Ftl_write_map_blk_to_last_page
+	.type	Ftl_write_map_blk_to_last_page, %function
+Ftl_write_map_blk_to_last_page:
+.LFB257:
+	.loc 2 583 0
+	.cfi_startproc
+.LVL847:
+	stp	x29, x30, [sp, -64]!
+	.cfi_def_cfa_offset 64
+	.cfi_offset 29, -64
+	.cfi_offset 30, -56
+	.loc 2 591 0
+	mov	w1, 65535
+	.loc 2 583 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -48
+	.cfi_offset 20, -40
+	mov	x19, x0
+	.loc 2 586 0
+	ldr	x20, [x0, 16]
+.LVL848:
+	.loc 2 583 0
+	stp	x21, x22, [sp, 32]
+	.loc 2 591 0
+	ldrh	w0, [x0]
+.LVL849:
+	.loc 2 583 0
+	str	x23, [sp, 48]
+	.cfi_offset 21, -32
+	.cfi_offset 22, -24
+	.cfi_offset 23, -16
+	.loc 2 591 0
+	cmp	w0, w1
+	bne	.L608
+	.loc 2 592 0
+	ldrh	w0, [x19, 8]
+	cbz	w0, .L609
+	.loc 2 592 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR141
+	adrp	x0, .LC1
+	mov	w2, 592
+	add	x1, x1, :lo12:.LANCHOR141
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL850:
+.L609:
+	.loc 2 593 0 is_stmt 1
+	ldrh	w0, [x19, 8]
+	add	w0, w0, 1
+	strh	w0, [x19, 8]
+	.loc 2 594 0
+	bl	FtlFreeSysBlkQueueOut
+.LVL851:
+	strh	w0, [x20]
+	.loc 2 597 0
+	ldr	w0, [x19, 48]
+	.loc 2 595 0
+	strh	wzr, [x19, 2]
+	.loc 2 597 0
+	add	w0, w0, 1
+	.loc 2 596 0
+	strh	wzr, [x19]
+	.loc 2 597 0
+	str	w0, [x19, 48]
+.LVL852:
+.L610:
+	.loc 2 628 0
+	mov	w0, 0
+	ldr	x23, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+.LVL853:
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 23
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL854:
+.L608:
+	.cfi_restore_state
+	.loc 2 601 0
+	ubfiz	x0, x0, 1, 16
+	.loc 2 604 0
+	adrp	x1, .LANCHOR109
+	.loc 2 603 0
+	adrp	x23, .LANCHOR39
+	.loc 2 587 0
+	ldr	x22, [x19, 40]
+	.loc 2 604 0
+	ldr	x1, [x1, #:lo12:.LANCHOR109]
+	.loc 2 601 0
+	ldrh	w21, [x20, x0]
+	.loc 2 602 0
+	adrp	x20, .LANCHOR108
+.LVL855:
+	ldrh	w0, [x19, 2]
+	add	x2, x20, :lo12:.LANCHOR108
+	orr	w0, w0, w21, lsl 10
+	str	w0, [x2, 4]
+	.loc 2 603 0
+	ldr	x0, [x23, #:lo12:.LANCHOR39]
+	.loc 2 604 0
+	str	x1, [x2, 16]
+.LVL856:
+	.loc 2 603 0
+	str	x0, [x2, 8]
+	.loc 2 607 0
+	ldr	w2, [x19, 48]
+	str	w2, [x1, 4]
+	.loc 2 608 0
+	mov	w2, -1291
+	strh	w2, [x1, 8]
+	.loc 2 609 0
+	ldrh	w2, [x19, 4]
+	strh	w2, [x1]
+	.loc 2 610 0
+	strh	w21, [x1, 2]
+	.loc 2 612 0
+	adrp	x1, .LANCHOR20
+.LVL857:
+	ldrh	w2, [x1, #:lo12:.LANCHOR20]
+	mov	w1, 255
+	lsl	w2, w2, 3
+	bl	ftl_memset
+.LVL858:
+	.loc 2 614 0
+	ldrh	w4, [x19, 6]
+	mov	x1, 0
+	.loc 2 617 0
+	ldr	x3, [x23, #:lo12:.LANCHOR39]
+	.loc 2 613 0
+	mov	w2, 0
+.LVL859:
+.L611:
+	.loc 2 614 0 discriminator 1
+	cmp	w4, w1, uxth
+	bhi	.L613
+	.loc 2 621 0
+	mov	w2, 1
+.LVL860:
+	mov	w3, 0
+	mov	w1, w2
+.LVL861:
+	add	x0, x20, :lo12:.LANCHOR108
+	bl	FlashProgPages
+.LVL862:
+	.loc 2 622 0
+	ldrh	w0, [x19, 2]
+	add	w0, w0, 1
+	strh	w0, [x19, 2]
+	.loc 2 626 0
+	mov	x0, x19
+	bl	ftl_map_blk_gc
+.LVL863:
+	.loc 2 627 0
+	b	.L610
+.LVL864:
+.L613:
+	.loc 2 615 0
+	ldr	w0, [x22, x1, lsl 2]
+	cmp	w21, w0, lsr 10
+	bne	.L612
+	.loc 2 616 0
+	add	w2, w2, 1
+.LVL865:
+	and	w2, w2, 65535
+.LVL866:
+	.loc 2 617 0
+	ubfiz	x0, x2, 1, 16
+	str	w1, [x3, x0, lsl 2]
+	.loc 2 618 0
+	add	x0, x0, 1
+	ldr	w5, [x22, x1, lsl 2]
+	str	w5, [x3, x0, lsl 2]
+.L612:
+.LVL867:
+	add	x1, x1, 1
+.LVL868:
+	b	.L611
+	.cfi_endproc
+.LFE257:
+	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
+	.section	.text.FtlMapWritePage,"ax",@progbits
+	.align	2
+	.global	FtlMapWritePage
+	.type	FtlMapWritePage, %function
+FtlMapWritePage:
+.LFB258:
+	.loc 2 631 0
+	.cfi_startproc
+.LVL869:
+	stp	x29, x30, [sp, -112]!
+	.cfi_def_cfa_offset 112
+	.cfi_offset 29, -112
+	.cfi_offset 30, -104
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -64
+	.cfi_offset 24, -56
+	.loc 2 637 0
+	adrp	x23, .LANCHOR67
+	.loc 2 631 0
+	stp	x25, x26, [sp, 64]
+	.loc 2 650 0
+	adrp	x24, .LANCHOR142
+	.loc 2 631 0
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 25, -48
+	.cfi_offset 26, -40
+	.cfi_offset 27, -32
+	.cfi_offset 28, -24
+	.loc 2 638 0
+	adrp	x26, .LANCHOR20
+	.loc 2 631 0
+	stp	x19, x20, [sp, 16]
+	mov	w25, w1
+	.cfi_offset 19, -96
+	.cfi_offset 20, -88
+	mov	x19, x0
+	mov	x27, x2
+	.loc 2 637 0
+	add	x23, x23, :lo12:.LANCHOR67
+	.loc 2 650 0
+	add	x24, x24, :lo12:.LANCHOR142
+	.loc 2 671 0
+	add	x28, x26, :lo12:.LANCHOR20
+	.loc 2 631 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -80
+	.cfi_offset 22, -72
+	.loc 2 634 0
+	mov	w22, 0
+.LVL870:
+.L619:
+	.loc 2 637 0
+	ldr	w0, [x23]
+	.loc 2 638 0
+	ldrh	w1, [x19, 2]
+	.loc 2 637 0
+	add	w0, w0, 1
+	str	w0, [x23]
+	.loc 2 638 0
+	ldrh	w0, [x26, #:lo12:.LANCHOR20]
+	sub	w0, w0, #1
+	cmp	w1, w0
+	bge	.L620
+	.loc 2 638 0 is_stmt 0 discriminator 1
+	ldrh	w1, [x19]
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L621
+.L620:
+	.loc 2 639 0 is_stmt 1
+	mov	x0, x19
+	bl	Ftl_write_map_blk_to_last_page
+.LVL871:
+.L621:
+	.loc 2 650 0
+	ldrh	w1, [x19]
+	ldr	x0, [x19, 16]
+	ldrh	w0, [x0, x1, lsl 1]
+	cbnz	w0, .L622
+	.loc 2 650 0 is_stmt 0 discriminator 1
+	adrp	x0, .LC1
+	mov	w2, 650
+	mov	x1, x24
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL872:
+.L622:
+	.loc 2 651 0 is_stmt 1
+	ldrh	w1, [x19]
+	ldrh	w0, [x19, 10]
+	cmp	w1, w0
+	bcc	.L623
+	.loc 2 651 0 is_stmt 0 discriminator 1
+	adrp	x0, .LC1
+	mov	w2, 651
+	mov	x1, x24
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL873:
+.L623:
+	.loc 2 652 0 is_stmt 1
+	ldrh	w1, [x19]
+	.loc 2 654 0
+	adrp	x21, .LANCHOR108
+	.loc 2 652 0
+	ldr	x0, [x19, 16]
+	.loc 2 654 0
+	add	x20, x21, :lo12:.LANCHOR108
+	.loc 2 658 0
+	mov	w2, 16
+	.loc 2 652 0
+	ldrh	w3, [x0, x1, lsl 1]
+.LVL874:
+	.loc 2 658 0
+	mov	w1, 0
+	.loc 2 654 0
+	ldrh	w0, [x19, 2]
+	str	w3, [x29, 108]
+	.loc 2 655 0
+	str	x27, [x20, 8]
+	.loc 2 654 0
+	orr	w0, w0, w3, lsl 10
+	str	w0, [x20, 4]
+	.loc 2 656 0
+	adrp	x0, .LANCHOR109
+	ldr	x0, [x0, #:lo12:.LANCHOR109]
+	str	x0, [x20, 16]
+	.loc 2 658 0
+	bl	ftl_memset
+.LVL875:
+	.loc 2 659 0
+	ldr	x0, [x20, 16]
+.LVL876:
+	.loc 2 660 0
+	ldr	w1, [x19, 48]
+	.loc 2 663 0
+	ldr	w3, [x29, 108]
+	.loc 2 660 0
+	str	w1, [x0, 4]
+	.loc 2 662 0
+	ldrh	w1, [x19, 4]
+	strh	w1, [x0]
+	.loc 2 663 0
+	strh	w3, [x0, 2]
+	.loc 2 664 0
+	mov	w3, 1
+	.loc 2 661 0
+	strh	w25, [x0, 8]
+	.loc 2 664 0
+	mov	w1, w3
+	mov	w2, w3
+	mov	x0, x20
+.LVL877:
+	bl	FlashProgPages
+.LVL878:
+	.loc 2 665 0
+	ldrh	w0, [x19, 2]
+	.loc 2 667 0
+	ldr	w1, [x21, #:lo12:.LANCHOR108]
+	.loc 2 665 0
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	strh	w0, [x19, 2]
+	.loc 2 667 0
+	cmn	w1, #1
+	bne	.L624
+	.loc 2 668 0
+	ldr	w1, [x20, 4]
+	adrp	x0, .LC86
+	add	x0, x0, :lo12:.LC86
+	.loc 2 669 0
+	add	w22, w22, 1
+.LVL879:
+	and	w22, w22, 65535
+	.loc 2 668 0
+	bl	printf
+.LVL880:
+	.loc 2 670 0
+	ldrh	w0, [x19, 2]
+	cmp	w0, 2
+	bhi	.L625
+	.loc 2 671 0
+	ldrh	w0, [x28]
+	sub	w0, w0, #1
+	strh	w0, [x19, 2]
+.L625:
+	.loc 2 673 0
+	cmp	w22, 3
+	bls	.L626
+	.loc 2 674 0
+	add	x21, x21, :lo12:.LANCHOR108
+	adrp	x0, .LC87
+	mov	w2, w22
+	add	x0, x0, :lo12:.LC87
+	ldr	w1, [x21, 4]
+	bl	printf
+.LVL881:
+.L627:
+	b	.L627
+.L626:
+	.loc 2 678 0
+	ldr	w0, [x19, 52]
+	cbz	w0, .L619
+.L636:
+	b	.L636
+.L624:
+	.loc 2 682 0
+	cmp	w0, 1
+	beq	.L619
+	.loc 2 685 0
+	ldr	x0, [x19, 40]
+	ldr	w1, [x20, 4]
+	.loc 2 687 0
+	ldp	x21, x22, [sp, 32]
+.LVL882:
+	ldp	x23, x24, [sp, 48]
+	ldp	x27, x28, [sp, 80]
+.LVL883:
+	.loc 2 685 0
+	str	w1, [x0, w25, uxtw 2]
+	.loc 2 687 0
+	ldp	x19, x20, [sp, 16]
+.LVL884:
+	mov	w0, 0
+	ldp	x25, x26, [sp, 64]
+.LVL885:
+	ldp	x29, x30, [sp], 112
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+.LVL886:
+	ret
+	.cfi_endproc
+.LFE258:
+	.size	FtlMapWritePage, .-FtlMapWritePage
+	.section	.text.ftl_map_blk_gc,"ax",@progbits
+	.align	2
+	.global	ftl_map_blk_gc
+	.type	ftl_map_blk_gc, %function
+ftl_map_blk_gc:
+.LFB256:
+	.loc 2 537 0
+	.cfi_startproc
+.LVL887:
+	stp	x29, x30, [sp, -96]!
+	.cfi_def_cfa_offset 96
+	.cfi_offset 29, -96
+	.cfi_offset 30, -88
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -80
+	.cfi_offset 20, -72
+	mov	x19, x0
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -48
+	.cfi_offset 24, -40
+	adrp	x23, .LANCHOR20
+	stp	x21, x22, [sp, 32]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 21, -64
+	.cfi_offset 22, -56
+	.cfi_offset 25, -32
+	.cfi_offset 26, -24
+	.cfi_offset 27, -16
+	.cfi_offset 28, -8
+	.loc 2 541 0
+	ldr	x20, [x0, 16]
+.LVL888:
+	.loc 2 542 0
+	ldr	x24, [x0, 40]
+.LVL889:
+	.loc 2 545 0
+	bl	ftl_free_no_use_map_blk
+.LVL890:
+	.loc 2 547 0
+	ldrh	w1, [x19, 10]
+	ldrh	w2, [x19, 8]
+	sub	w1, w1, #4
+	cmp	w2, w1
+	blt	.L639
+	.loc 2 548 0
+	ubfiz	x0, x0, 1, 16
+.LVL891:
+	ldrh	w21, [x20, x0]
+.LVL892:
+	.loc 2 549 0
+	cbz	w21, .L639
+	.loc 2 549 0 is_stmt 0 discriminator 1
+	ldr	w1, [x19, 52]
+	cbnz	w1, .L639
+	.loc 2 550 0 is_stmt 1
+	mov	w1, 1
+	str	w1, [x19, 52]
+	.loc 2 551 0
+	strh	wzr, [x20, x0]
+	.loc 2 552 0
+	ldrh	w0, [x19, 8]
+	.loc 2 553 0
+	ldrh	w1, [x19, 2]
+	.loc 2 552 0
+	sub	w0, w0, #1
+	strh	w0, [x19, 8]
+	.loc 2 553 0
+	ldrh	w0, [x23, #:lo12:.LANCHOR20]
+	cmp	w1, w0
+	bcc	.L640
+	.loc 2 554 0
+	mov	x0, x19
+	bl	ftl_map_blk_alloc_new_blk
+.LVL893:
+.L640:
+	.loc 2 558 0 discriminator 1
+	adrp	x25, .LANCHOR108
+	.loc 2 564 0 discriminator 1
+	adrp	x22, .LANCHOR143
+	.loc 2 565 0 discriminator 1
+	add	x26, x25, :lo12:.LANCHOR108
+	.loc 2 564 0 discriminator 1
+	add	x22, x22, :lo12:.LANCHOR143
+	.loc 2 537 0 discriminator 1
+	mov	w20, 0
+.LVL894:
+.L641:
+	.loc 2 556 0 discriminator 1
+	ldrh	w0, [x19, 6]
+	cmp	w0, w20
+	bhi	.L645
+	.loc 2 572 0
+	mov	w1, 1
+	mov	w0, w21
+	bl	FtlFreeSysBlkQueueIn
+.LVL895:
+	.loc 2 573 0
+	str	wzr, [x19, 52]
+.LVL896:
+.L639:
+	.loc 2 577 0
+	ldrh	w1, [x19, 2]
+	ldrh	w0, [x23, #:lo12:.LANCHOR20]
+	cmp	w1, w0
+	bcc	.L646
+	.loc 2 578 0
+	mov	x0, x19
+	bl	ftl_map_blk_alloc_new_blk
+.LVL897:
+.L646:
+	.loc 2 580 0
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+.LVL898:
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+.LVL899:
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL900:
+.L645:
+	.cfi_restore_state
+	.loc 2 557 0
+	ubfiz	x27, x20, 2, 16
+	ldr	w1, [x24, x27]
+	cmp	w21, w1, lsr 10
+	bne	.L642
+	.loc 2 558 0
+	adrp	x2, .LANCHOR123
+	add	x0, x25, :lo12:.LANCHOR108
+	ldr	x2, [x2, #:lo12:.LANCHOR123]
+	str	x2, [x0, 8]
+	.loc 2 559 0
+	adrp	x2, .LANCHOR109
+	.loc 2 560 0
+	str	w1, [x0, 4]
+	.loc 2 559 0
+	ldr	x28, [x2, #:lo12:.LANCHOR109]
+.LVL901:
+	.loc 2 562 0
+	mov	w2, 1
+	.loc 2 559 0
+	str	x28, [x0, 16]
+	.loc 2 562 0
+	mov	w1, w2
+	bl	FlashReadPages
+.LVL902:
+	.loc 2 564 0
+	ldrh	w0, [x28, 8]
+	cmp	w0, w20
+	beq	.L643
+	.loc 2 564 0 is_stmt 0 discriminator 1
+	adrp	x0, .LC1
+	mov	w2, 564
+	mov	x1, x22
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL903:
+.L643:
+	.loc 2 565 0 is_stmt 1
+	ldr	w0, [x26]
+	cmn	w0, #1
+	bne	.L644
+	.loc 2 566 0
+	str	wzr, [x24, x27]
+.LVL904:
+.L642:
+	.loc 2 556 0 discriminator 2
+	add	w20, w20, 1
+.LVL905:
+	and	w20, w20, 65535
+.LVL906:
+	b	.L641
+.LVL907:
+.L644:
+	.loc 2 568 0
+	ldr	x2, [x26, 8]
+	mov	w1, w20
+	mov	x0, x19
+	bl	FtlMapWritePage
+.LVL908:
+	b	.L642
+	.cfi_endproc
+.LFE256:
+	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
+	.section	.text.flush_l2p_region,"ax",@progbits
+	.align	2
+	.global	flush_l2p_region
+	.type	flush_l2p_region, %function
+flush_l2p_region:
+.LFB259:
+	.loc 2 690 0
+	.cfi_startproc
+.LVL909:
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -16
+	.cfi_offset 20, -8
+	.loc 2 693 0
+	adrp	x20, .LANCHOR56
+	ubfiz	x19, x0, 4, 16
+	ldr	x0, [x20, #:lo12:.LANCHOR56]
+.LVL910:
+	add	x1, x0, x19
+.LVL911:
+	.loc 2 694 0
+	ldr	x2, [x1, 8]
+	ldrh	w1, [x0, x19]
+.LVL912:
+	adrp	x0, .LANCHOR144
+	add	x0, x0, :lo12:.LANCHOR144
+	bl	FtlMapWritePage
+.LVL913:
+	.loc 2 695 0
+	ldr	x0, [x20, #:lo12:.LANCHOR56]
+	add	x0, x0, x19
+	.loc 2 697 0
+	ldp	x19, x20, [sp, 16]
+	.loc 2 695 0
+	ldr	w1, [x0, 4]
+	and	w1, w1, 2147483647
+	str	w1, [x0, 4]
+	.loc 2 697 0
+	mov	w0, 0
+	ldp	x29, x30, [sp], 32
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE259:
+	.size	flush_l2p_region, .-flush_l2p_region
+	.section	.text.log2phys,"ax",@progbits
+	.align	2
+	.global	log2phys
+	.type	log2phys, %function
+log2phys:
+.LFB262:
+	.loc 2 753 0
+	.cfi_startproc
+.LVL914:
+	stp	x29, x30, [sp, -80]!
+	.cfi_def_cfa_offset 80
+	.cfi_offset 29, -80
+	.cfi_offset 30, -72
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -32
+	.cfi_offset 24, -24
+	mov	x23, x1
+	.loc 2 756 0
+	adrp	x1, .LANCHOR22
+.LVL915:
+	.loc 2 753 0
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	mov	w24, w2
+	.cfi_offset 19, -64
+	.cfi_offset 20, -56
+	.cfi_offset 21, -48
+	.cfi_offset 22, -40
+	.loc 2 756 0
+	ldrh	w19, [x1, #:lo12:.LANCHOR22]
+	.loc 2 753 0
+	str	x25, [sp, 64]
+	.cfi_offset 25, -16
+	.loc 2 756 0
+	add	w1, w19, 7
+	.loc 2 757 0
+	mov	x19, 1
+	.loc 2 756 0
+	lsr	w22, w0, w1
+	and	w22, w22, 65535
+.LVL916:
+	.loc 2 757 0
+	lsl	x19, x19, x1
+	.loc 2 759 0
+	adrp	x1, .LANCHOR62
+	.loc 2 757 0
+	sub	w19, w19, #1
+	.loc 2 759 0
+	ldr	w1, [x1, #:lo12:.LANCHOR62]
+	.loc 2 757 0
+	and	w19, w19, w0
+	and	x19, x19, 65535
+.LVL917:
+	.loc 2 759 0
+	cmp	w0, w1
+	bcc	.L654
+	.loc 2 759 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR145
+	adrp	x0, .LC1
+.LVL918:
+	mov	w2, 759
+.LVL919:
+	add	x1, x1, :lo12:.LANCHOR145
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL920:
+.L654:
+	.loc 2 762 0 is_stmt 1
+	adrp	x21, .LANCHOR56
+	.loc 2 761 0
+	adrp	x0, .LANCHOR33
+	.loc 2 762 0
+	ldr	x2, [x21, #:lo12:.LANCHOR56]
+	.loc 2 761 0
+	ldrh	w1, [x0, #:lo12:.LANCHOR33]
+	mov	x0, 0
+.LVL921:
+.L655:
+	and	x20, x0, 65535
+.LVL922:
+	.loc 2 761 0 is_stmt 0 discriminator 1
+	cmp	w20, w1
+	bcc	.L660
+	.loc 2 776 0 is_stmt 1
+	bl	select_l2p_ram_region
+.LVL923:
+	and	x20, x0, 65535
+.LVL924:
+	.loc 2 777 0
+	ldr	x2, [x21, #:lo12:.LANCHOR56]
+	ubfiz	x1, x20, 4, 16
+	.loc 2 776 0
+	mov	w25, w0
+	.loc 2 777 0
+	add	x3, x2, x1
+	ldrh	w2, [x2, x1]
+	mov	w1, 65535
+	cmp	w2, w1
+	beq	.L661
+	.loc 2 777 0 is_stmt 0 discriminator 1
+	ldr	w1, [x3, 4]
+	tbz	w1, #31, .L661
+	.loc 2 778 0 is_stmt 1
+	bl	flush_l2p_region
+.LVL925:
+.L661:
+	.loc 2 781 0
+	mov	w1, w25
+	mov	w0, w22
+	bl	load_l2p_region
+.LVL926:
+	.loc 2 782 0
+	b	.L656
+.LVL927:
+.L660:
+	add	x0, x0, 1
+	.loc 2 762 0
+	add	x3, x2, x0, lsl 4
+	ldrh	w3, [x3, -16]
+	cmp	w3, w22
+	bne	.L655
+.LVL928:
+.L656:
+	.loc 2 765 0
+	ldr	x0, [x21, #:lo12:.LANCHOR56]
+	add	x0, x0, x20, lsl 4
+	.loc 2 764 0
+	cbnz	w24, .L657
+	.loc 2 765 0
+	ldr	x0, [x0, 8]
+	ldr	w0, [x0, x19, lsl 2]
+	str	w0, [x23]
+.L658:
+	.loc 2 771 0
+	ldr	x0, [x21, #:lo12:.LANCHOR56]
+	add	x20, x0, x20, lsl 4
+.LVL929:
+	ldr	w0, [x20, 4]
+	cmn	w0, #1
+	beq	.L663
+	.loc 2 772 0
+	add	w0, w0, 1
+	str	w0, [x20, 4]
+.L663:
+	.loc 2 783 0
+	mov	w0, 0
+	ldr	x25, [sp, 64]
+	ldp	x19, x20, [sp, 16]
+.LVL930:
+	ldp	x21, x22, [sp, 32]
+.LVL931:
+	ldp	x23, x24, [sp, 48]
+.LVL932:
+	ldp	x29, x30, [sp], 80
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 25
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL933:
+.L657:
+	.cfi_restore_state
+	.loc 2 767 0
+	ldr	x1, [x0, 8]
+	ldr	w2, [x23]
+	str	w2, [x1, x19, lsl 2]
+	.loc 2 768 0
+	ldr	w1, [x0, 4]
+	orr	w1, w1, -2147483648
+	str	w1, [x0, 4]
+	.loc 2 769 0
+	adrp	x0, .LANCHOR57
+	strh	w22, [x0, #:lo12:.LANCHOR57]
+	b	.L658
+	.cfi_endproc
+.LFE262:
+	.size	log2phys, .-log2phys
+	.section	.text.FtlReUsePrevPpa,"ax",@progbits
+	.align	2
+	.global	FtlReUsePrevPpa
+	.type	FtlReUsePrevPpa, %function
+FtlReUsePrevPpa:
+.LFB280:
+	.loc 2 1628 0
+	.cfi_startproc
+.LVL934:
+	stp	x29, x30, [sp, -80]!
+	.cfi_def_cfa_offset 80
+	.cfi_offset 29, -80
+	.cfi_offset 30, -72
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -48
+	.cfi_offset 22, -40
+	.loc 2 1631 0
+	adrp	x22, .LANCHOR43
+	.loc 2 1628 0
+	stp	x19, x20, [sp, 16]
+	mov	w21, w0
+	str	w1, [x29, 76]
+	.loc 2 1629 0
+	lsr	w0, w1, 10
+.LVL935:
+	.loc 2 1628 0
+	str	x23, [sp, 48]
+	.cfi_offset 19, -64
+	.cfi_offset 20, -56
+	.cfi_offset 23, -32
+	.loc 2 1629 0
+	bl	P2V_block_in_plane
+.LVL936:
+	.loc 2 1631 0
+	ldr	x2, [x22, #:lo12:.LANCHOR43]
+	.loc 2 1629 0
+	and	w3, w0, 65535
+.LVL937:
+	.loc 2 1631 0
+	ubfiz	x20, x3, 1, 16
+	ldrh	w1, [x2, x20]
+	cbnz	w1, .L669
+	.loc 2 1632 0
+	adrp	x0, .LANCHOR47
+.LVL938:
+	ldr	x19, [x0, #:lo12:.LANCHOR47]
+	cbz	x19, .L670
+.LBB221:
+	.loc 2 1636 0
+	adrp	x2, .LANCHOR41
+	mov	x5, -6148914691236517206
+	movk	x5, 0xaaab, lsl 0
+	.loc 2 1635 0
+	adrp	x23, .LANCHOR48
+	.loc 2 1636 0
+	ldr	x2, [x2, #:lo12:.LANCHOR41]
+	.loc 2 1644 0
+	mov	w6, 65535
+	.loc 2 1635 0
+	ldrh	w4, [x23, #:lo12:.LANCHOR48]
+.LVL939:
+	.loc 2 1636 0
+	sub	x19, x19, x2
+	asr	x19, x19, 1
+	mul	x19, x19, x5
+	.loc 2 1644 0
+	mov	w5, 6
+	.loc 2 1636 0
+	and	w19, w19, 65535
+.LVL940:
+.L671:
+	.loc 2 1637 0 discriminator 1
+	cmp	w1, w4
+	beq	.L670
+	.loc 2 1638 0
+	cmp	w19, w3
+	bne	.L672
+	.loc 2 1639 0
+	mov	w1, w19
+.LVL941:
+	add	x0, x0, :lo12:.LANCHOR47
+	bl	List_remove_node
+.LVL942:
+	ldrh	w0, [x23, #:lo12:.LANCHOR48]
+	cbnz	w0, .L673
+	.loc 2 1639 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR146
+	adrp	x0, .LC1
+	mov	w2, 1639
+	add	x1, x1, :lo12:.LANCHOR146
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL943:
+.L673:
+	.loc 2 1639 0 discriminator 3
+	ldrh	w0, [x23, #:lo12:.LANCHOR48]
+	sub	w0, w0, #1
+	strh	w0, [x23, #:lo12:.LANCHOR48]
+	.loc 2 1640 0 is_stmt 1 discriminator 3
+	mov	w0, w19
+	bl	INSERT_DATA_LIST
+.LVL944:
+	.loc 2 1641 0 discriminator 3
+	ldr	x1, [x22, #:lo12:.LANCHOR43]
+	ldrh	w0, [x1, x20]
+	add	w0, w0, 1
+	strh	w0, [x1, x20]
+.LVL945:
+.L670:
+.LBE221:
+	.loc 2 1652 0
+	add	x1, x29, 76
+	mov	w2, 1
+	mov	w0, w21
+	bl	log2phys
+.LVL946:
+	.loc 2 1653 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+.LVL947:
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 23
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL948:
+.L672:
+	.cfi_restore_state
+.LBB222:
+	.loc 2 1644 0
+	umull	x19, w19, w5
+.LVL949:
+	ldrh	w19, [x2, x19]
+	cmp	w19, w6
+	beq	.L670
+.LVL950:
+	.loc 2 1637 0 discriminator 2
+	add	w1, w1, 1
+.LVL951:
+	and	w1, w1, 65535
+.LVL952:
+	b	.L671
+.LVL953:
+.L669:
+.LBE222:
+	.loc 2 1650 0
+	add	w1, w1, 1
+	strh	w1, [x2, x20]
+	b	.L670
+	.cfi_endproc
+.LFE280:
+	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
+	.section	.text.ftl_scan_all_data,"ax",@progbits
+	.align	2
+	.global	ftl_scan_all_data
+	.type	ftl_scan_all_data, %function
+ftl_scan_all_data:
+.LFB291:
+	.loc 2 2275 0
+	.cfi_startproc
+	sub	sp, sp, #96
+	.cfi_def_cfa_offset 96
+	.loc 2 2280 0
+	adrp	x0, .LC88
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC88
+	.loc 2 2275 0
+	stp	x29, x30, [sp, 16]
+	.cfi_offset 29, -80
+	.cfi_offset 30, -72
+	add	x29, sp, 16
+	.cfi_def_cfa 29, 80
+	stp	x19, x20, [sp, 32]
+	.cfi_offset 19, -64
+	.cfi_offset 20, -56
+	.loc 2 2286 0
+	adrp	x20, .LANCHOR108
+	.loc 2 2275 0
+	stp	x21, x22, [sp, 48]
+	.loc 2 2281 0
+	mov	w19, 0
+	.cfi_offset 21, -48
+	.cfi_offset 22, -40
+	adrp	x21, .LANCHOR62
+	.loc 2 2297 0
+	add	x22, x20, :lo12:.LANCHOR108
+	.loc 2 2281 0
+	add	x21, x21, :lo12:.LANCHOR62
+	.loc 2 2275 0
+	str	x23, [sp, 64]
+	.cfi_offset 23, -32
+	.loc 2 2280 0
+	bl	printf
+.LVL954:
+.L680:
+	.loc 2 2281 0 discriminator 1
+	ldr	w0, [x21]
+	cmp	w19, w0
+	bcc	.L686
+	.loc 2 2303 0
+	ldp	x19, x20, [sp, 32]
+.LVL955:
+	ldp	x21, x22, [sp, 48]
+	ldp	x29, x30, [sp, 16]
+	ldr	x23, [sp, 64]
+	add	sp, sp, 96
+	.cfi_remember_state
+	.cfi_restore 29
+	.cfi_restore 30
+	.cfi_restore 23
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL956:
+.L686:
+	.cfi_restore_state
+	.loc 2 2282 0
+	mov	w2, 0
+	add	x1, x29, 76
+	mov	w0, w19
+	bl	log2phys
+.LVL957:
+	.loc 2 2283 0
+	tst	x19, 2047
+	bne	.L681
+	.loc 2 2284 0
+	ldr	w2, [x29, 76]
+	adrp	x0, .LC89
+	mov	w1, w19
+	add	x0, x0, :lo12:.LC89
+	bl	printf
+.LVL958:
+.L681:
+	.loc 2 2285 0
+	ldr	w1, [x29, 76]
+	cmn	w1, #1
+	beq	.L683
+	.loc 2 2286 0
+	add	x0, x20, :lo12:.LANCHOR108
+	.loc 2 2290 0
+	str	wzr, [x20, #:lo12:.LANCHOR108]
+	.loc 2 2292 0
+	mov	w2, 0
+	.loc 2 2286 0
+	str	w1, [x0, 4]
+	.loc 2 2288 0
+	adrp	x1, .LANCHOR39
+	.loc 2 2287 0
+	str	w19, [x0, 24]
+	.loc 2 2288 0
+	ldr	x1, [x1, #:lo12:.LANCHOR39]
+	str	x1, [x0, 8]
+	.loc 2 2289 0
+	adrp	x1, .LANCHOR109
+	ldr	x23, [x1, #:lo12:.LANCHOR109]
+.LVL959:
+	.loc 2 2292 0
+	mov	w1, 1
+	.loc 2 2289 0
+	str	x23, [x0, 16]
+	.loc 2 2292 0
+	bl	FlashReadPages
+.LVL960:
+	.loc 2 2293 0
+	ldr	w0, [x20, #:lo12:.LANCHOR108]
+	cmp	w0, 256
+	ccmn	w0, #1, 4, ne
+	beq	.L684
+	.loc 2 2294 0
+	ldr	w0, [x23, 8]
+	cmp	w19, w0
+	beq	.L683
+.L684:
+	.loc 2 2297 0
+	ldp	x1, x0, [x22, 8]
+	ldr	w2, [x1, 4]
+	str	w2, [sp]
+	ldr	w2, [x22, 4]
+	ldp	w3, w4, [x0]
+	ldp	w5, w6, [x0, 8]
+	adrp	x0, .LC90
+	ldr	w7, [x1]
+	add	x0, x0, :lo12:.LC90
+	mov	w1, w19
+	bl	printf
+.LVL961:
+.L683:
+	.loc 2 2281 0 discriminator 2
+	add	w19, w19, 1
+.LVL962:
+	b	.L680
+	.cfi_endproc
+.LFE291:
+	.size	ftl_scan_all_data, .-ftl_scan_all_data
+	.section	.text.FtlReadRefresh,"ax",@progbits
+	.align	2
+	.global	FtlReadRefresh
+	.type	FtlReadRefresh, %function
+FtlReadRefresh:
+.LFB318:
+	.loc 5 419 0
+	.cfi_startproc
+.LVL963:
+	.loc 5 425 0
+	adrp	x1, .LANCHOR83
+	add	x0, x1, :lo12:.LANCHOR83
+	ldr	w2, [x0, 80]
+	cbz	w2, .L689
+	.loc 5 426 0
+	adrp	x1, .LANCHOR62
+	ldr	w3, [x0, 84]
+	ldr	w2, [x1, #:lo12:.LANCHOR62]
+	cmp	w3, w2
+	bcs	.L690
+	.loc 5 419 0
+	stp	x29, x30, [sp, -160]!
+	.cfi_def_cfa_offset 160
+	.cfi_offset 29, -160
+	.cfi_offset 30, -152
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -144
+	.cfi_offset 20, -136
+.LBB228:
+.LBB229:
+	.loc 5 428 0
+	mov	x19, x0
+	add	x20, x1, :lo12:.LANCHOR62
+.LBE229:
+.LBE228:
+	.loc 5 419 0
+	str	x21, [sp, 32]
+	.cfi_offset 21, -128
+	mov	w21, 2048
+.L695:
+.LVL964:
+.LBB234:
+.LBB231:
+	.loc 5 428 0
+	ldr	w0, [x19, 84]
+	ldr	w1, [x20]
+	cmp	w0, w1
+	bcs	.L692
+	.loc 5 430 0
+	add	x1, x29, 60
+	mov	w2, 0
+	bl	log2phys
+.LVL965:
+	.loc 5 431 0
+	ldr	w0, [x19, 84]
+	.loc 5 432 0
+	ldr	w1, [x29, 60]
+	.loc 5 431 0
+	add	w0, w0, 1
+	str	w0, [x19, 84]
+	.loc 5 432 0
+	cmn	w1, #1
+	beq	.L693
+.LBB230:
+	.loc 5 435 0
+	str	w0, [x29, 88]
+	.loc 5 436 0
+	adrp	x0, ftl_temp_buf
+	add	x0, x0, :lo12:ftl_temp_buf
+	str	x0, [x29, 72]
+	.loc 5 437 0
+	add	x0, x29, 96
+	str	x0, [x29, 80]
+	.loc 5 438 0
+	add	x0, x29, 160
+	.loc 5 434 0
+	str	w1, [x29, 68]
+	.loc 5 439 0
+	mov	w2, 0
+	mov	w1, 1
+	.loc 5 438 0
+	str	wzr, [x0, -96]!
+	.loc 5 439 0
+	bl	FlashReadPages
+.LVL966:
+	.loc 5 440 0
+	ldr	w0, [x29, 64]
+	cmp	w0, 256
+	bne	.L692
+	.loc 5 442 0
+	ldr	w0, [x29, 60]
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+.LVL967:
+	bl	FtlGcRefreshBlock
+.LVL968:
+.L692:
+.LBE230:
+.LBE231:
+.LBE234:
+	.loc 5 466 0
+	ldp	x19, x20, [sp, 16]
+.LBB235:
+.LBB232:
+	mov	w0, -1
+.LBE232:
+.LBE235:
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 160
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL969:
+.L693:
+	.cfi_restore_state
+.LBB236:
+.LBB233:
+	.loc 5 427 0
+	subs	w21, w21, #1
+.LVL970:
+	bne	.L695
+	b	.L692
+.LVL971:
+.L690:
+	.cfi_def_cfa 31, 0
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_restore 21
+	.cfi_restore 29
+	.cfi_restore 30
+.LBE233:
+.LBE236:
+	.loc 5 451 0
+	adrp	x1, .LANCHOR63
+	.loc 5 450 0
+	str	wzr, [x0, 84]
+	.loc 5 451 0
+	ldr	w1, [x1, #:lo12:.LANCHOR63]
+	.loc 5 449 0
+	stp	w1, wzr, [x0, 76]
+.L699:
+	.loc 5 420 0
+	mov	w0, 0
+	.loc 5 465 0
+	ret
+.L689:
+.LVL972:
+.LBB237:
+	.loc 5 456 0
+	ldr	w4, [x0, 76]
+	adrp	x0, .LANCHOR63
+	ldr	w2, [x0, #:lo12:.LANCHOR63]
+	add	w0, w2, 1048576
+	cmp	w4, w0
+	bhi	.L698
+	.loc 5 454 0
+	adrp	x0, .LANCHOR77
+	ldr	w0, [x0, #:lo12:.LANCHOR77]
+	lsr	w3, w0, 10
+	mov	w0, 33554432
+	asr	w0, w0, w3
+	.loc 5 457 0
+	add	w0, w0, w4
+	cmp	w2, w0
+	bhi	.L698
+	.loc 5 458 0
+	adrp	x0, .LANCHOR79+28
+	ldrb	w0, [x0, #:lo12:.LANCHOR79+28]
+	cbnz	w0, .L699
+.L698:
+	.loc 5 460 0
+	add	x0, x1, :lo12:.LANCHOR83
+	mov	w1, 1
+	.loc 5 461 0
+	str	wzr, [x0, 84]
+	.loc 5 460 0
+	stp	w2, w1, [x0, 76]
+	b	.L699
+.LBE237:
+	.cfi_endproc
+.LFE318:
+	.size	FtlReadRefresh, .-FtlReadRefresh
+	.section	.text.FtlMapBlkWriteDump_data,"ax",@progbits
+	.align	2
+	.global	FtlMapBlkWriteDump_data
+	.type	FtlMapBlkWriteDump_data, %function
+FtlMapBlkWriteDump_data:
+.LFB267:
+	.loc 2 897 0
+	.cfi_startproc
+.LVL973:
+	.loc 2 903 0
+	ldr	w1, [x0, 56]
+	cbz	w1, .L705
+	.loc 2 897 0
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+.LVL974:
+	.loc 2 907 0
+	adrp	x1, .LANCHOR108
+	.loc 2 908 0
+	adrp	x2, .LANCHOR109
+	.loc 2 897 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	mov	x19, x0
+	.loc 2 899 0
+	ldrh	w20, [x0, 6]
+	.loc 2 907 0
+	adrp	x0, .LANCHOR123
+.LVL975:
+	.loc 2 908 0
+	ldr	x2, [x2, #:lo12:.LANCHOR109]
+	.loc 2 907 0
+	ldr	x3, [x0, #:lo12:.LANCHOR123]
+	add	x0, x1, :lo12:.LANCHOR108
+	.loc 2 899 0
+	sub	w20, w20, #1
+	.loc 2 900 0
+	ldr	x4, [x19, 40]
+	.loc 2 899 0
+	and	w20, w20, 65535
+	.loc 2 897 0
+	str	x21, [sp, 32]
+	.cfi_offset 21, -16
+	.loc 2 908 0
+	stp	x3, x2, [x0, 8]
+	.loc 2 930 0
+	ubfiz	x2, x20, 2, 16
+	.loc 2 905 0
+	str	wzr, [x19, 56]
+	mov	x21, x1
+	.loc 2 930 0
+	ldr	w2, [x4, x2]
+.LVL976:
+	.loc 2 931 0
+	str	w2, [x0, 4]
+	.loc 2 932 0
+	cbz	w2, .L707
+	.loc 2 934 0
+	mov	w2, 1
+.LVL977:
+	mov	w1, w2
+	bl	FlashReadPages
+.LVL978:
+.L708:
+	.loc 2 941 0
+	add	x1, x21, :lo12:.LANCHOR108
+	mov	x0, x19
+	.loc 2 943 0
+	ldr	x21, [sp, 32]
+	.loc 2 941 0
+	ldr	x2, [x1, 8]
+	mov	w1, w20
+	.loc 2 943 0
+	ldp	x19, x20, [sp, 16]
+.LVL979:
+	ldp	x29, x30, [sp], 48
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	.loc 2 941 0
+	b	FtlMapWritePage
+.LVL980:
+.L707:
+	.cfi_restore_state
+	.loc 2 938 0
+	adrp	x0, .LANCHOR23
+	mov	w1, 255
+	ldrh	w2, [x0, #:lo12:.LANCHOR23]
+.LVL981:
+	mov	x0, x3
+	bl	ftl_memset
+.LVL982:
+	b	.L708
+.LVL983:
+.L705:
+	.cfi_def_cfa 31, 0
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_restore 21
+	.cfi_restore 29
+	.cfi_restore 30
+	ret
+	.cfi_endproc
+.LFE267:
+	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
+	.section	.text.FtlScanSysBlk,"ax",@progbits
+	.align	2
+	.global	FtlScanSysBlk
+	.type	FtlScanSysBlk, %function
+FtlScanSysBlk:
+.LFB270:
+	.loc 2 1095 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -176]!
+	.cfi_def_cfa_offset 176
+	.cfi_offset 29, -176
+	.cfi_offset 30, -168
+	.loc 2 1103 0
+	mov	w1, 0
+	.loc 2 1095 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 25, -112
+	.cfi_offset 26, -104
+	.loc 2 1103 0
+	adrp	x25, .LANCHOR135
+	.loc 2 1095 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -144
+	.cfi_offset 22, -136
+	.loc 2 1103 0
+	adrp	x21, .LANCHOR30
+	ldr	x0, [x25, #:lo12:.LANCHOR135]
+	.loc 2 1105 0
+	adrp	x22, .LANCHOR132
+	.loc 2 1103 0
+	ldr	w2, [x21, #:lo12:.LANCHOR30]
+	.loc 2 1095 0
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -160
+	.cfi_offset 20, -152
+	.loc 2 1101 0
+	adrp	x20, .LANCHOR147
+	.loc 2 1095 0
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -128
+	.cfi_offset 24, -120
+	.loc 2 1102 0
+	adrp	x23, .LANCHOR35
+	.loc 2 1095 0
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 27, -96
+	.cfi_offset 28, -88
+	.loc 2 1104 0
+	adrp	x27, .LANCHOR129
+	.loc 2 1103 0
+	lsl	w2, w2, 2
+	.loc 2 1101 0
+	strh	wzr, [x20, #:lo12:.LANCHOR147]
+	.loc 2 1102 0
+	strh	wzr, [x23, #:lo12:.LANCHOR35]
+	.loc 2 1103 0
+	bl	ftl_memset
+.LVL984:
+	.loc 2 1104 0
+	ldr	x0, [x27, #:lo12:.LANCHOR129]
+	mov	w1, 0
+	ldr	w2, [x21, #:lo12:.LANCHOR30]
+	.loc 2 1105 0
+	adrp	x19, .LANCHOR27
+	.loc 2 1106 0
+	adrp	x28, .LANCHOR36
+	.loc 2 1107 0
+	adrp	x24, .LANCHOR81
+	.loc 2 1104 0
+	lsl	w2, w2, 1
+	bl	ftl_memset
+.LVL985:
+	.loc 2 1105 0
+	ldr	x0, [x22, #:lo12:.LANCHOR132]
+	mov	w1, 0
+	ldrh	w2, [x19, #:lo12:.LANCHOR27]
+	lsl	w2, w2, 2
+	bl	ftl_memset
+.LVL986:
+	.loc 2 1106 0
+	ldr	x0, [x28, #:lo12:.LANCHOR36]
+	mov	w1, 0
+	ldrh	w2, [x19, #:lo12:.LANCHOR27]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+.LVL987:
+	.loc 2 1107 0
+	mov	w2, 12
+	mov	w1, 255
+	add	x0, x24, :lo12:.LANCHOR81
+	bl	ftl_memset
+.LVL988:
+	.loc 2 1109 0
+	adrp	x0, .LANCHOR5
+	stp	x22, x25, [x29, 144]
+	str	x27, [x29, 160]
+	ldrh	w0, [x0, #:lo12:.LANCHOR5]
+	str	w0, [x29, 172]
+.LVL989:
+	adrp	x0, .LANCHOR6
+	add	x0, x0, :lo12:.LANCHOR6
+	str	x0, [x29, 120]
+	.loc 2 1152 0
+	adrp	x0, .LANCHOR71
+	add	x0, x0, :lo12:.LANCHOR71
+	str	x0, [x29, 112]
+.L713:
+	.loc 2 1109 0 discriminator 1
+	ldr	x0, [x29, 120]
+	ldr	w1, [x29, 172]
+	ldrh	w0, [x0]
+	cmp	w0, w1
+	bls	.L753
+	.loc 2 1113 0 discriminator 1
+	adrp	x0, .LANCHOR3
+	.loc 2 1118 0 discriminator 1
+	adrp	x25, .LANCHOR120
+	.loc 2 1115 0 discriminator 1
+	adrp	x6, .LANCHOR13
+	.loc 2 1120 0 discriminator 1
+	mov	x5, 0
+	.loc 2 1113 0 discriminator 1
+	ldrh	w12, [x0, #:lo12:.LANCHOR3]
+	.loc 2 1119 0 discriminator 1
+	adrp	x0, .LANCHOR93
+	.loc 2 1118 0 discriminator 1
+	ldr	x7, [x25, #:lo12:.LANCHOR120]
+	.loc 2 1120 0 discriminator 1
+	mov	w22, 0
+	.loc 2 1119 0 discriminator 1
+	ldr	x11, [x0, #:lo12:.LANCHOR93]
+	.loc 2 1120 0 discriminator 1
+	adrp	x0, .LANCHOR94
+	.loc 2 1115 0 discriminator 1
+	add	x6, x6, :lo12:.LANCHOR13
+	.loc 2 1120 0 discriminator 1
+	ldr	x10, [x0, #:lo12:.LANCHOR94]
+	adrp	x0, .LANCHOR24
+	ldrh	w8, [x0, #:lo12:.LANCHOR24]
+	b	.L754
+.LVL990:
+.L715:
+	.loc 2 1115 0
+	ldrh	w1, [x29, 172]
+	ldrb	w0, [x6, x5]
+	bl	V2P_block
+.LVL991:
+	and	w4, w0, 65535
+.LVL992:
+	.loc 2 1116 0
+	bl	FtlBbmIsBadBlock
+.LVL993:
+	cbnz	w0, .L714
+	.loc 2 1118 0
+	ubfiz	x0, x22, 5, 16
+	.loc 2 1120 0
+	mul	w1, w22, w8
+	.loc 2 1118 0
+	add	x0, x7, x0
+	.loc 2 1121 0
+	add	w22, w22, 1
+.LVL994:
+	and	w22, w22, 65535
+.LVL995:
+	.loc 2 1118 0
+	lsl	w4, w4, 10
+.LVL996:
+	.loc 2 1120 0
+	asr	w1, w1, 2
+	add	x1, x10, x1, sxtw 2
+	.loc 2 1118 0
+	str	w4, [x0, 4]
+	.loc 2 1120 0
+	stp	x11, x1, [x0, 8]
+.L714:
+.LVL997:
+	add	x5, x5, 1
+.LVL998:
+.L754:
+	.loc 2 1113 0 discriminator 1
+	cmp	w12, w5, uxth
+	bhi	.L715
+	.loc 2 1124 0
+	cbnz	w22, .L716
+.LVL999:
+.L752:
+	.loc 2 1109 0
+	ldr	w0, [x29, 172]
+	add	w26, w0, 1
+	and	w0, w26, 65535
+	str	w0, [x29, 172]
+.LVL1000:
+	b	.L713
+.LVL1001:
+.L716:
+	.loc 2 1127 0
+	mov	w1, w22
+	mov	w2, 1
+	mov	x0, x7
+	bl	FlashReadPages
+.LVL1002:
+	ubfiz	x0, x22, 5, 16
+	mov	x22, 0
+.LVL1003:
+	str	x0, [x29, 128]
+.LVL1004:
+	.loc 2 1162 0
+	adrp	x0, .LANCHOR148
+	add	x0, x0, :lo12:.LANCHOR148
+	str	x0, [x29, 136]
+.L751:
+	.loc 2 1129 0
+	ldr	x0, [x25, #:lo12:.LANCHOR120]
+	add	x1, x0, x22
+	.loc 2 1132 0
+	ldr	w0, [x0, x22]
+	.loc 2 1129 0
+	ldr	w3, [x1, 4]
+	.loc 2 1132 0
+	cmn	w0, #1
+	.loc 2 1130 0
+	ldr	x27, [x1, 16]
+	.loc 2 1129 0
+	ubfx	x26, x3, 10, 16
+.LVL1005:
+	.loc 2 1132 0
+	bne	.L719
+	mov	w5, 16
+	.loc 2 1136 0
+	mov	w7, 65535
+.L721:
+	.loc 2 1134 0
+	ldr	x0, [x25, #:lo12:.LANCHOR120]
+	add	x6, x25, :lo12:.LANCHOR120
+	.loc 2 1135 0
+	mov	w2, 1
+	str	w7, [x29, 100]
+	.loc 2 1134 0
+	add	x0, x0, x22
+	str	x6, [x29, 104]
+	str	w5, [x29, 168]
+.LVL1006:
+	ldr	w1, [x0, 4]
+	add	w1, w1, 1
+	str	w1, [x0, 4]
+	.loc 2 1135 0
+	mov	w1, w2
+	bl	FlashReadPages
+.LVL1007:
+	.loc 2 1136 0
+	ldrh	w0, [x27]
+	ldr	w7, [x29, 100]
+	ldr	w5, [x29, 168]
+	cmp	w0, w7
+	ldr	x6, [x29, 104]
+	bne	.L718
+	.loc 2 1137 0
+	ldr	x0, [x6]
+	mov	w1, -1
+	str	w1, [x0, x22]
+	.loc 2 1145 0
+	ldr	x0, [x6]
+	ldr	w0, [x0, x22]
+	cmp	w0, w1
+	bne	.L719
+.LVL1008:
+.L720:
+	.loc 2 1287 0
+	mov	w1, 1
+	b	.L790
+.LVL1009:
+.L718:
+	.loc 2 1139 0
+	ldr	x0, [x25, #:lo12:.LANCHOR120]
+	ldr	w0, [x0, x22]
+	cmn	w0, #1
+	bne	.L719
+.LVL1010:
+	sub	w5, w5, #1
+.LVL1011:
+	.loc 2 1133 0 discriminator 2
+	ands	w5, w5, 65535
+	bne	.L721
+	b	.L720
+.L719:
+	.loc 2 1147 0
+	adrp	x0, .LANCHOR71
+	ldr	w1, [x0, #:lo12:.LANCHOR71]
+	ldr	w0, [x27, 4]
+	cmn	w1, #1
+	beq	.L722
+	.loc 2 1147 0 is_stmt 0 discriminator 1
+	cmp	w1, w0
+	bhi	.L723
+.L722:
+	.loc 2 1149 0 is_stmt 1
+	cmn	w0, #1
+	beq	.L723
+	.loc 2 1152 0
+	ldr	x2, [x29, 112]
+	add	w1, w0, 1
+	str	w1, [x2]
+.L723:
+	.loc 2 1157 0
+	ldrh	w1, [x27]
+	mov	w2, 61604
+	cmp	w1, w2
+	beq	.L725
+	bhi	.L726
+	mov	w0, 61574
+	cmp	w1, w0
+	beq	.L727
+.L724:
+	.loc 2 1128 0 discriminator 2
+	ldr	x0, [x29, 128]
+	add	x22, x22, 32
+	cmp	x0, x22
+	bne	.L751
+	b	.L752
+.L726:
+	.loc 2 1157 0
+	mov	w0, 61634
+	cmp	w1, w0
+	beq	.L728
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L724
+	.loc 2 1280 0
+	mov	w1, 0
+.L790:
+	.loc 2 1287 0
+	mov	w0, w26
+	bl	FtlFreeSysBlkQueueIn
+.LVL1012:
+	b	.L724
+.L728:
+	.loc 2 1162 0
+	ldrh	w1, [x20, #:lo12:.LANCHOR147]
+	ldr	w0, [x21, #:lo12:.LANCHOR30]
+	cmp	w1, w0
+	bls	.L730
+	.loc 2 1162 0 is_stmt 0 discriminator 1
+	ldr	x1, [x29, 136]
+	adrp	x0, .LC1
+	mov	w2, 1162
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1013:
+.L730:
+	.loc 2 1163 0 is_stmt 1
+	ldr	w6, [x21, #:lo12:.LANCHOR30]
+	.loc 2 1165 0
+	ldr	x3, [x29, 152]
+	.loc 2 1163 0
+	ldrh	w1, [x20, #:lo12:.LANCHOR147]
+	and	w2, w6, 65535
+	sub	w0, w2, #1
+	sub	w2, w2, w1
+	sxth	x0, w0
+.LVL1014:
+	sub	w2, w2, #1
+	.loc 2 1165 0
+	ldr	x5, [x3, #:lo12:.LANCHOR135]
+	.loc 2 1163 0
+	sxth	w2, w2
+.L731:
+	.loc 2 1163 0 is_stmt 0 discriminator 1
+	cmp	w0, w2
+	bgt	.L737
+	.loc 2 1186 0 is_stmt 1
+	tbz	w0, #31, .L771
+	b	.L724
+.L737:
+	.loc 2 1165 0
+	sxtw	x8, w0
+	ldr	w11, [x27, 4]
+	lsl	x7, x8, 2
+	add	x10, x5, x7
+	ldr	w7, [x5, x7]
+	cmp	w11, w7
+	bls	.L732
+	.loc 2 1167 0
+	ldr	w2, [x5]
+	cbnz	w2, .L733
+	.loc 2 1167 0 is_stmt 0 discriminator 1
+	cmp	w6, w1
+	beq	.L733
+	.loc 2 1172 0 is_stmt 1
+	add	w1, w1, 1
+	strh	w1, [x20, #:lo12:.LANCHOR147]
+.L733:
+	.loc 2 1178 0 discriminator 1
+	ldr	x1, [x29, 160]
+	ldr	x6, [x1, #:lo12:.LANCHOR129]
+	mov	w1, 0
+.L734:
+.LVL1015:
+	.loc 2 1175 0 discriminator 1
+	cmp	w1, w0
+	bne	.L735
+	.loc 2 1180 0
+	ldr	w1, [x27, 4]
+.LVL1016:
+	str	w1, [x10]
+	.loc 2 1181 0
+	strh	w26, [x6, x8, lsl 1]
+	.loc 2 1186 0
+	tbnz	w0, #31, .L724
+	.loc 2 1193 0
+	ldrh	w1, [x20, #:lo12:.LANCHOR147]
+	ldr	w2, [x21, #:lo12:.LANCHOR30]
+	sub	w2, w2, w1
+	sub	w2, w2, #1
+	cmp	w0, w2, sxth
+	bgt	.L724
+.L771:
+	.loc 2 1195 0
+	add	w1, w1, 1
+	strh	w1, [x20, #:lo12:.LANCHOR147]
+	.loc 2 1196 0
+	ldr	w1, [x27, 4]
+	str	w1, [x5, x0, lsl 2]
+	.loc 2 1197 0
+	ldr	x1, [x29, 160]
+	ldr	x1, [x1, #:lo12:.LANCHOR129]
+.L789:
+	.loc 2 1241 0
+	strh	w26, [x1, x0, lsl 1]
+	b	.L724
+.LVL1017:
+.L735:
+	.loc 2 1177 0 discriminator 3
+	sxtw	x2, w1
+	add	w1, w1, 1
+.LVL1018:
+	lsl	x7, x2, 2
+	.loc 2 1178 0 discriminator 3
+	lsl	x2, x2, 1
+	.loc 2 1177 0 discriminator 3
+	add	x11, x5, x7
+	sxth	w1, w1
+.LVL1019:
+	ldr	w11, [x11, 4]
+	str	w11, [x5, x7]
+	.loc 2 1178 0 discriminator 3
+	add	x7, x6, x2
+	ldrh	w7, [x7, 2]
+	strh	w7, [x6, x2]
+	b	.L734
+.LVL1020:
+.L732:
+	sub	w0, w0, #1
+.LVL1021:
+	sxth	x0, w0
+.LVL1022:
+	b	.L731
+.LVL1023:
+.L727:
+	.loc 2 1203 0
+	ldrh	w1, [x23, #:lo12:.LANCHOR35]
+	ldrh	w0, [x19, #:lo12:.LANCHOR27]
+	cmp	w1, w0
+	bls	.L740
+	.loc 2 1203 0 is_stmt 0 discriminator 1
+	ldr	x1, [x29, 136]
+	adrp	x0, .LC1
+	mov	w2, 1203
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1024:
+.L740:
+	.loc 2 1204 0 is_stmt 1
+	ldrh	w6, [x19, #:lo12:.LANCHOR27]
+	ldrh	w2, [x23, #:lo12:.LANCHOR35]
+	sub	w1, w6, #1
+	sxth	x0, w1
+.LVL1025:
+	sub	w5, w1, w2
+	.loc 2 1206 0
+	ldr	x1, [x29, 144]
+	ldr	x1, [x1, #:lo12:.LANCHOR132]
+.L741:
+	.loc 2 1204 0 discriminator 1
+	cmp	w0, w5
+	ble	.L746
+	.loc 2 1206 0
+	sxtw	x7, w0
+	ldr	w11, [x27, 4]
+	lsl	x8, x7, 2
+	add	x10, x1, x8
+	ldr	w8, [x1, x8]
+	cmp	w11, w8
+	bls	.L742
+	.loc 2 1208 0
+	ldr	w5, [x1]
+	cbnz	w5, .L743
+	.loc 2 1208 0 is_stmt 0 discriminator 1
+	cmp	w6, w2
+	beq	.L743
+	.loc 2 1216 0 is_stmt 1
+	add	w2, w2, 1
+	strh	w2, [x23, #:lo12:.LANCHOR35]
+.L743:
+	.loc 2 1221 0 discriminator 1
+	ldr	x6, [x28, #:lo12:.LANCHOR36]
+	mov	w2, 0
+.L744:
+.LVL1026:
+	.loc 2 1218 0 discriminator 1
+	cmp	w2, w0
+	bne	.L745
+	.loc 2 1223 0
+	ldr	w2, [x27, 4]
+.LVL1027:
+	str	w2, [x10]
+	.loc 2 1224 0
+	strh	w26, [x6, x7, lsl 1]
+.L746:
+	.loc 2 1229 0
+	tbnz	w0, #31, .L724
+	.loc 2 1237 0
+	ldrh	w2, [x19, #:lo12:.LANCHOR27]
+	ldrh	w5, [x23, #:lo12:.LANCHOR35]
+	sub	w2, w2, #1
+	sub	w2, w2, w5
+	cmp	w0, w2, sxth
+	bgt	.L724
+	.loc 2 1239 0
+	add	w5, w5, 1
+	.loc 2 1240 0
+	ldr	w2, [x27, 4]
+	.loc 2 1239 0
+	strh	w5, [x23, #:lo12:.LANCHOR35]
+	.loc 2 1240 0
+	str	w2, [x1, x0, lsl 2]
+	.loc 2 1241 0
+	ldr	x1, [x28, #:lo12:.LANCHOR36]
+	b	.L789
+.LVL1028:
+.L745:
+	.loc 2 1220 0 discriminator 3
+	sxtw	x5, w2
+	add	w2, w2, 1
+.LVL1029:
+	lsl	x8, x5, 2
+	.loc 2 1221 0 discriminator 3
+	lsl	x5, x5, 1
+	.loc 2 1220 0 discriminator 3
+	add	x11, x1, x8
+	sxth	w2, w2
+.LVL1030:
+	ldr	w11, [x11, 4]
+	str	w11, [x1, x8]
+	.loc 2 1221 0 discriminator 3
+	add	x8, x6, x5
+	ldrh	w8, [x8, 2]
+	strh	w8, [x6, x5]
+	b	.L744
+.LVL1031:
+.L742:
+	sub	w0, w0, #1
+.LVL1032:
+	sxth	x0, w0
+.LVL1033:
+	b	.L741
+.LVL1034:
+.L725:
+	.loc 2 1248 0
+	ldrh	w5, [x24, #:lo12:.LANCHOR81]
+	mov	w1, 65535
+	add	x2, x24, :lo12:.LANCHOR81
+	cmp	w5, w1
+	bne	.L748
+	.loc 2 1250 0
+	strh	w26, [x24, #:lo12:.LANCHOR81]
+	.loc 2 1251 0
+	str	w0, [x2, 8]
+	b	.L724
+.L748:
+	.loc 2 1255 0
+	ldrh	w0, [x2, 4]
+	cmp	w0, w1
+	beq	.L749
+	.loc 2 1256 0
+	mov	w1, 1
+	bl	FtlFreeSysBlkQueueIn
+.LVL1035:
+.L749:
+	.loc 2 1257 0
+	add	x0, x24, :lo12:.LANCHOR81
+	ldr	w1, [x27, 4]
+	ldr	w2, [x0, 8]
+	cmp	w2, w1
+	bcs	.L750
+	.loc 2 1259 0
+	ldrh	w2, [x24, #:lo12:.LANCHOR81]
+	strh	w2, [x0, 4]
+	.loc 2 1260 0
+	strh	w26, [x24, #:lo12:.LANCHOR81]
+	.loc 2 1261 0
+	str	w1, [x0, 8]
+	b	.L724
+.L750:
+	.loc 2 1265 0
+	strh	w26, [x0, 4]
+	b	.L724
+.LVL1036:
+.L753:
+	.loc 2 1292 0
+	ldr	x0, [x29, 160]
+	ldr	x2, [x0, #:lo12:.LANCHOR129]
+	ldrh	w0, [x2]
+	cbz	w0, .L755
+.L758:
+	.loc 2 1310 0
+	ldr	x1, [x28, #:lo12:.LANCHOR36]
+	ldrh	w0, [x1]
+	cbz	w0, .L756
+.L757:
+	.loc 2 1328 0
+	ldrh	w1, [x20, #:lo12:.LANCHOR147]
+	ldr	w0, [x21, #:lo12:.LANCHOR30]
+	cmp	w1, w0
+	bls	.L787
+	.loc 2 1328 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR148
+	adrp	x0, .LC1
+	mov	w2, 1328
+	add	x1, x1, :lo12:.LANCHOR148
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1037:
+.L787:
+	.loc 2 1330 0 is_stmt 1
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 176
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+.LVL1038:
+	ret
+.LVL1039:
+.L755:
+	.cfi_restore_state
+	.loc 2 1292 0 discriminator 1
+	ldrh	w0, [x20, #:lo12:.LANCHOR147]
+	cbz	w0, .L758
+	.loc 2 1294 0 discriminator 1
+	ldr	w1, [x21, #:lo12:.LANCHOR30]
+	mov	w0, 0
+.L759:
+.LVL1040:
+	cmp	w0, w1
+	bcs	.L758
+	.loc 2 1296 0
+	ldrh	w3, [x2, w0, sxtw 1]
+	cbz	w3, .L760
+	.loc 2 1301 0
+	ldr	x1, [x29, 152]
+	.loc 2 1298 0
+	add	x7, x21, :lo12:.LANCHOR30
+	.loc 2 1301 0
+	ldr	x4, [x1, #:lo12:.LANCHOR135]
+	mov	w1, w0
+.L761:
+.LVL1041:
+	.loc 2 1298 0 discriminator 1
+	ldr	w3, [x7]
+	cmp	w1, w3
+	bcs	.L758
+	.loc 2 1300 0 discriminator 3
+	sxtw	x6, w1
+	sub	w3, w1, w0
+	lsl	x5, x6, 1
+	sxtw	x3, w3
+	add	w1, w1, 1
+.LVL1042:
+	.loc 2 1301 0 discriminator 3
+	ldr	w6, [x4, x6, lsl 2]
+	sxth	w1, w1
+.LVL1043:
+	.loc 2 1300 0 discriminator 3
+	ldrh	w8, [x2, x5]
+	strh	w8, [x2, x3, lsl 1]
+	.loc 2 1301 0 discriminator 3
+	str	w6, [x4, x3, lsl 2]
+	.loc 2 1302 0 discriminator 3
+	strh	wzr, [x2, x5]
+	b	.L761
+.LVL1044:
+.L760:
+	add	w0, w0, 1
+.LVL1045:
+	sxth	w0, w0
+.LVL1046:
+	b	.L759
+.LVL1047:
+.L756:
+	.loc 2 1310 0 discriminator 1
+	ldrh	w0, [x23, #:lo12:.LANCHOR35]
+	cbz	w0, .L757
+	.loc 2 1312 0 discriminator 1
+	ldrh	w2, [x19, #:lo12:.LANCHOR27]
+	mov	w0, 0
+.L766:
+.LVL1048:
+	mov	w6, w0
+	cmp	w0, w2
+	bge	.L757
+	.loc 2 1314 0
+	ldrh	w3, [x1, w0, sxtw 1]
+	cbz	w3, .L767
+	.loc 2 1319 0
+	ldr	x2, [x29, 144]
+	.loc 2 1316 0
+	add	x19, x19, :lo12:.LANCHOR27
+	.loc 2 1319 0
+	ldr	x3, [x2, #:lo12:.LANCHOR132]
+.LVL1049:
+.L768:
+	.loc 2 1316 0 discriminator 1
+	ldrh	w2, [x19]
+	cmp	w0, w2
+	bge	.L757
+	.loc 2 1318 0 discriminator 3
+	sxtw	x5, w0
+	sub	w2, w0, w6
+	lsl	x4, x5, 1
+	sxtw	x2, w2
+	add	w0, w0, 1
+.LVL1050:
+	.loc 2 1319 0 discriminator 3
+	ldr	w5, [x3, x5, lsl 2]
+	sxth	w0, w0
+.LVL1051:
+	.loc 2 1318 0 discriminator 3
+	ldrh	w7, [x1, x4]
+	strh	w7, [x1, x2, lsl 1]
+	.loc 2 1319 0 discriminator 3
+	str	w5, [x3, x2, lsl 2]
+	.loc 2 1320 0 discriminator 3
+	strh	wzr, [x1, x4]
+	b	.L768
+.LVL1052:
+.L767:
+	add	w0, w0, 1
+.LVL1053:
+	sxth	w0, w0
+.LVL1054:
+	b	.L766
+	.cfi_endproc
+.LFE270:
+	.size	FtlScanSysBlk, .-FtlScanSysBlk
+	.section	.text.FtlMapTblRecovery,"ax",@progbits
+	.align	2
+	.global	FtlMapTblRecovery
+	.type	FtlMapTblRecovery, %function
+FtlMapTblRecovery:
+.LFB275:
+	.loc 2 1466 0
+	.cfi_startproc
+.LVL1055:
+	stp	x29, x30, [sp, -144]!
+	.cfi_def_cfa_offset 144
+	.cfi_offset 29, -144
+	.cfi_offset 30, -136
+	.loc 2 1477 0
+	mov	w1, 0
+	.loc 2 1466 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -128
+	.cfi_offset 20, -120
+	mov	x19, x0
+	stp	x23, x24, [sp, 48]
+	.loc 2 1478 0
+	adrp	x20, .LANCHOR108
+	.cfi_offset 23, -96
+	.cfi_offset 24, -88
+	.loc 2 1473 0
+	ldrh	w23, [x0, 6]
+	.loc 2 1511 0
+	adrp	x24, .LANCHOR20
+	.loc 2 1466 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -112
+	.cfi_offset 22, -104
+	.loc 2 1470 0
+	ldr	x21, [x0, 40]
+.LVL1056:
+	.loc 2 1471 0
+	ldr	x22, [x0, 16]
+.LVL1057:
+	.loc 2 1477 0
+	lsl	w2, w23, 2
+	.loc 2 1472 0
+	ldr	x0, [x0, 24]
+.LVL1058:
+	str	x0, [x29, 128]
+.LVL1059:
+	.loc 2 1474 0
+	ldrh	w0, [x19, 8]
+.LVL1060:
+	.loc 2 1466 0
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 25, -80
+	.cfi_offset 26, -72
+	.cfi_offset 27, -64
+	.cfi_offset 28, -56
+	.loc 2 1486 0
+	mov	w27, 0
+	.loc 2 1474 0
+	str	w0, [x29, 140]
+.LVL1061:
+	.loc 2 1477 0
+	mov	x0, x21
+	bl	ftl_memset
+.LVL1062:
+	str	x20, [x29, 120]
+	.loc 2 1478 0
+	adrp	x7, .LANCHOR39
+	add	x3, x20, :lo12:.LANCHOR108
+	mov	x26, x7
+	.loc 2 1510 0
+	mov	x20, x3
+	.loc 2 1478 0
+	ldr	x0, [x7, #:lo12:.LANCHOR39]
+	str	x0, [x3, 8]
+	.loc 2 1479 0
+	adrp	x0, .LANCHOR109
+	.loc 2 1483 0
+	stp	wzr, wzr, [x19, 48]
+	.loc 2 1479 0
+	ldr	x25, [x0, #:lo12:.LANCHOR109]
+	.loc 2 1481 0
+	mov	w0, -1
+	.loc 2 1479 0
+	str	x25, [x3, 16]
+.LVL1063:
+	.loc 2 1481 0
+	strh	w0, [x19]
+	.loc 2 1482 0
+	strh	w0, [x19, 2]
+	.loc 2 1485 0
+	mov	w0, 1
+	str	w0, [x19, 56]
+.LVL1064:
+	.loc 2 1488 0
+	ldr	w0, [x29, 140]
+	sub	w0, w0, #1
+	str	w0, [x29, 136]
+	.loc 2 1530 0
+	add	x0, x24, :lo12:.LANCHOR20
+	str	x0, [x29, 112]
+.LVL1065:
+.L792:
+	.loc 2 1486 0 discriminator 1
+	ldr	w0, [x29, 140]
+	cmp	w27, w0
+	bge	.L809
+	.loc 2 1488 0
+	ldr	w0, [x29, 136]
+	sxtw	x28, w27
+	cmp	w27, w0
+	bne	.L793
+	.loc 2 1490 0
+	lsl	x0, x28, 1
+	mov	w1, 1
+	add	x24, x22, x0
+	ldrh	w0, [x22, x0]
+	.loc 2 1494 0
+	mov	w22, 0
+.LVL1066:
+	.loc 2 1490 0
+	bl	FtlGetLastWrittenPage
+.LVL1067:
+	sxth	w26, w0
+.LVL1068:
+	.loc 2 1491 0
+	add	w0, w0, 1
+	strh	w0, [x19, 2]
+	.loc 2 1493 0
+	ldr	x0, [x29, 128]
+	.loc 2 1492 0
+	strh	w27, [x19]
+	.loc 2 1493 0
+	ldr	w0, [x0, x28, lsl 2]
+	str	w0, [x19, 48]
+.LVL1069:
+	.loc 2 1496 0
+	ldr	x0, [x29, 120]
+	add	x20, x0, :lo12:.LANCHOR108
+.LVL1070:
+.L794:
+	.loc 2 1494 0 discriminator 1
+	cmp	w22, w26
+	ble	.L796
+.LVL1071:
+.L809:
+	.loc 2 1547 0
+	mov	x0, x19
+	bl	ftl_free_no_use_map_blk
+.LVL1072:
+	.loc 2 1548 0
+	adrp	x0, .LANCHOR20
+	ldrh	w1, [x19, 2]
+	ldrh	w0, [x0, #:lo12:.LANCHOR20]
+	cmp	w1, w0
+	bne	.L798
+	.loc 2 1550 0
+	mov	x0, x19
+	bl	ftl_map_blk_alloc_new_blk
+.LVL1073:
+.L798:
+	.loc 2 1553 0
+	mov	x0, x19
+	bl	ftl_map_blk_gc
+.LVL1074:
+	.loc 2 1555 0
+	mov	x0, x19
+	bl	ftl_map_blk_gc
+.LVL1075:
+	.loc 2 1557 0
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+.LVL1076:
+	ldp	x21, x22, [sp, 32]
+.LVL1077:
+	ldp	x23, x24, [sp, 48]
+.LVL1078:
+	ldp	x25, x26, [sp, 64]
+.LVL1079:
+	ldp	x27, x28, [sp, 80]
+.LVL1080:
+	ldp	x29, x30, [sp], 144
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+.LVL1081:
+	ret
+.LVL1082:
+.L796:
+	.cfi_restore_state
+	.loc 2 1496 0
+	ldrh	w0, [x24]
+	.loc 2 1497 0
+	mov	w2, 1
+	mov	w1, w2
+	.loc 2 1496 0
+	orr	w0, w22, w0, lsl 10
+	str	w0, [x20, 4]
+	.loc 2 1497 0
+	mov	x0, x20
+	bl	FlashReadPages
+.LVL1083:
+	.loc 2 1500 0
+	ldr	w0, [x20]
+	cmn	w0, #1
+	beq	.L795
+	.loc 2 1502 0
+	ldrh	w0, [x25, 8]
+	cmp	w23, w0
+	bls	.L795
+	.loc 2 1502 0 is_stmt 0 discriminator 1
+	ldrh	w2, [x25]
+	ldrh	w1, [x19, 4]
+	cmp	w2, w1
+	bne	.L795
+	.loc 2 1504 0 is_stmt 1
+	ubfiz	x0, x0, 2, 16
+	ldr	w1, [x20, 4]
+	str	w1, [x21, x0]
+.L795:
+	add	w22, w22, 1
+.LVL1084:
+	sxth	w22, w22
+.LVL1085:
+	b	.L794
+.LVL1086:
+.L793:
+	.loc 2 1510 0
+	ldr	x0, [x26, #:lo12:.LANCHOR39]
+	.loc 2 1512 0
+	mov	w2, 1
+	.loc 2 1510 0
+	str	x0, [x20, 8]
+	.loc 2 1511 0
+	lsl	x0, x28, 1
+	ldrh	w1, [x24, #:lo12:.LANCHOR20]
+	add	x28, x22, x0
+	ldrh	w0, [x22, x0]
+	sub	w1, w1, #1
+	orr	w0, w1, w0, lsl 10
+	.loc 2 1512 0
+	mov	w1, w2
+	.loc 2 1511 0
+	str	w0, [x20, 4]
+	.loc 2 1512 0
+	mov	x0, x20
+	bl	FlashReadPages
+.LVL1087:
+	.loc 2 1515 0
+	ldr	w0, [x20]
+	cmn	w0, #1
+	beq	.L811
+	.loc 2 1515 0 is_stmt 0 discriminator 1
+	ldrh	w1, [x25]
+	ldrh	w0, [x19, 4]
+	cmp	w1, w0
+	bne	.L811
+	.loc 2 1515 0 discriminator 2
+	ldrh	w1, [x25, 8]
+	mov	w0, 64245
+	cmp	w1, w0
+	beq	.L800
+.L811:
+	mov	w5, 0
+.L801:
+.LVL1088:
+	.loc 2 1530 0 is_stmt 1 discriminator 1
+	ldr	x0, [x29, 112]
+	ldrh	w0, [x0]
+	cmp	w5, w0
+	bge	.L807
+	.loc 2 1532 0
+	ldrh	w0, [x28]
+	.loc 2 1533 0
+	mov	w2, 1
+	.loc 2 1532 0
+	str	w5, [x29, 108]
+	.loc 2 1533 0
+	mov	w1, w2
+	.loc 2 1532 0
+	orr	w0, w5, w0, lsl 10
+	str	w0, [x20, 4]
+	.loc 2 1533 0
+	mov	x0, x20
+	bl	FlashReadPages
+.LVL1089:
+	.loc 2 1536 0
+	ldr	w0, [x20]
+	ldr	w5, [x29, 108]
+	cmn	w0, #1
+	beq	.L805
+	.loc 2 1538 0
+	ldrh	w0, [x25, 8]
+	cmp	w23, w0
+	bls	.L805
+	.loc 2 1538 0 is_stmt 0 discriminator 1
+	ldrh	w2, [x25]
+	ldrh	w1, [x19, 4]
+	cmp	w2, w1
+	bne	.L805
+	.loc 2 1540 0 is_stmt 1
+	ubfiz	x0, x0, 2, 16
+	ldr	w1, [x20, 4]
+	str	w1, [x21, x0]
+.L805:
+	add	w5, w5, 1
+	sxth	w5, w5
+.LVL1090:
+	b	.L801
+.LVL1091:
+.L800:
+	.loc 2 1518 0 discriminator 1
+	ldrh	w5, [x24, #:lo12:.LANCHOR20]
+	.loc 2 1520 0 discriminator 1
+	mov	w0, 0
+	ldr	x10, [x26, #:lo12:.LANCHOR39]
+	.loc 2 1518 0 discriminator 1
+	sub	w5, w5, #1
+.L802:
+.LVL1092:
+	cmp	w0, w5
+	blt	.L804
+.LVL1093:
+.L807:
+	add	w4, w27, 1
+	sxth	w27, w4
+.LVL1094:
+	b	.L792
+.LVL1095:
+.L804:
+	.loc 2 1520 0
+	lsl	w2, w0, 1
+	sxtw	x2, w2
+	lsl	x1, x2, 2
+	ldrh	w1, [x10, x1]
+.LVL1096:
+	.loc 2 1521 0
+	cmp	w23, w1
+	bls	.L803
+	.loc 2 1523 0
+	add	x2, x2, 1
+	ubfiz	x1, x1, 2, 16
+.LVL1097:
+	ldr	w2, [x10, x2, lsl 2]
+.LVL1098:
+	str	w2, [x21, x1]
+.LVL1099:
+.L803:
+	add	w0, w0, 1
+.LVL1100:
+	sxth	w0, w0
+.LVL1101:
+	b	.L802
+	.cfi_endproc
+.LFE275:
+	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
+	.section	.text.FtlLoadVonderInfo,"ax",@progbits
+	.align	2
+	.global	FtlLoadVonderInfo
+	.type	FtlLoadVonderInfo, %function
+FtlLoadVonderInfo:
+.LFB276:
+	.loc 2 1560 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -16]!
+	.cfi_def_cfa_offset 16
+	.cfi_offset 29, -16
+	.cfi_offset 30, -8
+	.loc 2 1561 0
+	adrp	x1, .LANCHOR27
+	adrp	x0, .LANCHOR149
+	add	x0, x0, :lo12:.LANCHOR149
+	.loc 2 1560 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 2 1561 0
+	ldrh	w1, [x1, #:lo12:.LANCHOR27]
+	strh	w1, [x0, 10]
+	.loc 2 1562 0
+	mov	w1, -3962
+	strh	w1, [x0, 4]
+	.loc 2 1563 0
+	adrp	x1, .LANCHOR35
+	ldrh	w1, [x1, #:lo12:.LANCHOR35]
+	strh	w1, [x0, 8]
+	.loc 2 1564 0
+	adrp	x1, .LANCHOR28
+	ldrh	w1, [x1, #:lo12:.LANCHOR28]
+	strh	w1, [x0, 6]
+	.loc 2 1565 0
+	adrp	x1, .LANCHOR36
+	ldr	x1, [x1, #:lo12:.LANCHOR36]
+	str	x1, [x0, 16]
+	.loc 2 1566 0
+	adrp	x1, .LANCHOR132
+	ldr	x1, [x1, #:lo12:.LANCHOR132]
+	str	x1, [x0, 24]
+	.loc 2 1567 0
+	adrp	x1, .LANCHOR131
+	ldr	x1, [x1, #:lo12:.LANCHOR131]
+	str	x1, [x0, 32]
+	.loc 2 1568 0
+	adrp	x1, .LANCHOR133
+	ldr	x1, [x1, #:lo12:.LANCHOR133]
+	str	x1, [x0, 40]
+	.loc 2 1570 0
+	bl	FtlMapTblRecovery
+.LVL1102:
+	.loc 2 1573 0
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE276:
+	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
+	.section	.text.FtlL2PDataInit,"ax",@progbits
+	.align	2
+	.global	FtlL2PDataInit
+	.type	FtlL2PDataInit, %function
+FtlL2PDataInit:
+.LFB277:
+	.loc 2 1576 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -64]!
+	.cfi_def_cfa_offset 64
+	.cfi_offset 29, -64
+	.cfi_offset 30, -56
+	.loc 2 1578 0
+	mov	w1, 0
+	.loc 2 1576 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -48
+	.cfi_offset 20, -40
+	.loc 2 1578 0
+	adrp	x19, .LANCHOR130
+	adrp	x20, .LANCHOR30
+	.loc 2 1576 0
+	stp	x21, x22, [sp, 32]
+	.loc 2 1578 0
+	ldr	x0, [x19, #:lo12:.LANCHOR130]
+	.cfi_offset 21, -32
+	.cfi_offset 22, -24
+	.loc 2 1579 0
+	adrp	x22, .LANCHOR23
+	.loc 2 1578 0
+	ldr	w2, [x20, #:lo12:.LANCHOR30]
+	.loc 2 1579 0
+	adrp	x21, .LANCHOR33
+	.loc 2 1576 0
+	str	x23, [sp, 48]
+	.cfi_offset 23, -16
+	.loc 2 1579 0
+	adrp	x23, .LANCHOR136
+	.loc 2 1578 0
+	lsl	w2, w2, 1
+	bl	ftl_memset
+.LVL1103:
+	.loc 2 1579 0
+	ldrh	w0, [x21, #:lo12:.LANCHOR33]
+	mov	w1, 255
+	ldrh	w2, [x22, #:lo12:.LANCHOR23]
+	mul	w2, w2, w0
+	ldr	x0, [x23, #:lo12:.LANCHOR136]
+	bl	ftl_memset
+.LVL1104:
+	adrp	x0, .LANCHOR56
+	ldrh	w3, [x21, #:lo12:.LANCHOR33]
+	.loc 2 1584 0
+	ldr	x6, [x23, #:lo12:.LANCHOR136]
+	.loc 2 1580 0
+	mov	x1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR56]
+	mov	w2, -1
+	ldrh	w5, [x22, #:lo12:.LANCHOR23]
+	add	x3, x0, x3, lsl 4
+.LVL1105:
+.L822:
+	add	x4, x1, x5
+	.loc 2 1580 0 is_stmt 0 discriminator 1
+	cmp	x0, x3
+	bne	.L823
+	.loc 2 1586 0 is_stmt 1
+	adrp	x1, .LANCHOR144
+	add	x0, x1, :lo12:.LANCHOR144
+	.loc 2 1596 0
+	ldp	x21, x22, [sp, 32]
+	.loc 2 1587 0
+	strh	w2, [x1, #:lo12:.LANCHOR144]
+	.loc 2 1588 0
+	ldr	w1, [x20, #:lo12:.LANCHOR30]
+	strh	w1, [x0, 10]
+	.loc 2 1589 0
+	mov	w1, -3902
+	strh	w1, [x0, 4]
+	.loc 2 1590 0
+	adrp	x1, .LANCHOR147
+	.loc 2 1596 0
+	ldr	x23, [sp, 48]
+	.loc 2 1586 0
+	strh	w2, [x0, 2]
+	.loc 2 1590 0
+	ldrh	w1, [x1, #:lo12:.LANCHOR147]
+	strh	w1, [x0, 8]
+	.loc 2 1591 0
+	adrp	x1, .LANCHOR32
+	ldrh	w1, [x1, #:lo12:.LANCHOR32]
+	strh	w1, [x0, 6]
+	.loc 2 1592 0
+	adrp	x1, .LANCHOR129
+	ldr	x1, [x1, #:lo12:.LANCHOR129]
+	str	x1, [x0, 16]
+	.loc 2 1593 0
+	adrp	x1, .LANCHOR135
+	ldr	x1, [x1, #:lo12:.LANCHOR135]
+	str	x1, [x0, 24]
+	.loc 2 1594 0
+	ldr	x1, [x19, #:lo12:.LANCHOR130]
+	.loc 2 1596 0
+	ldp	x19, x20, [sp, 16]
+	.loc 2 1594 0
+	str	x1, [x0, 32]
+	.loc 2 1595 0
+	adrp	x1, .LANCHOR134
+	ldr	x1, [x1, #:lo12:.LANCHOR134]
+	str	x1, [x0, 40]
+	.loc 2 1596 0
+	ldp	x29, x30, [sp], 64
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 23
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.L823:
+	.cfi_restore_state
+	.loc 2 1584 0 discriminator 3
+	and	x1, x1, -4
+	.loc 2 1583 0 discriminator 3
+	strh	w2, [x0]
+	.loc 2 1584 0 discriminator 3
+	add	x1, x6, x1
+	.loc 2 1582 0 discriminator 3
+	str	wzr, [x0, 4]
+	.loc 2 1584 0 discriminator 3
+	str	x1, [x0, 8]
+	add	x0, x0, 16
+	mov	x1, x4
+	b	.L822
+	.cfi_endproc
+.LFE277:
+	.size	FtlL2PDataInit, .-FtlL2PDataInit
+	.section	.text.FtlLoadMapInfo,"ax",@progbits
+	.align	2
+	.global	FtlLoadMapInfo
+	.type	FtlLoadMapInfo, %function
+FtlLoadMapInfo:
+.LFB278:
+	.loc 2 1599 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -16]!
+	.cfi_def_cfa_offset 16
+	.cfi_offset 29, -16
+	.cfi_offset 30, -8
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 2 1600 0
+	bl	FtlL2PDataInit
+.LVL1106:
+	.loc 2 1602 0
+	adrp	x0, .LANCHOR144
+	add	x0, x0, :lo12:.LANCHOR144
+	bl	FtlMapTblRecovery
+.LVL1107:
+	.loc 2 1605 0
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE278:
+	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
+	.section	.text.FtlVariablesInit,"ax",@progbits
+	.align	2
+	.global	FtlVariablesInit
+	.type	FtlVariablesInit, %function
+FtlVariablesInit:
+.LFB207:
+	.loc 3 493 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	.loc 3 496 0
+	adrp	x0, .LANCHOR150
+	.loc 3 497 0
+	mov	w1, -1
+	.loc 3 493 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 3 496 0
+	str	xzr, [x0, #:lo12:.LANCHOR150]
+	.loc 3 497 0
+	adrp	x0, .LANCHOR151
+	.loc 3 493 0
+	str	x19, [sp, 16]
+	.cfi_offset 19, -16
+	.loc 3 503 0
+	adrp	x19, .LANCHOR6
+	.loc 3 497 0
+	strh	w1, [x0, #:lo12:.LANCHOR151]
+	.loc 3 498 0
+	adrp	x0, .LANCHOR152
+	.loc 3 500 0
+	mov	w1, -1
+	.loc 3 498 0
+	str	wzr, [x0, #:lo12:.LANCHOR152]
+	.loc 3 499 0
+	adrp	x0, .LANCHOR153
+	str	wzr, [x0, #:lo12:.LANCHOR153]
+	.loc 3 500 0
+	adrp	x0, .LANCHOR154
+	str	w1, [x0, #:lo12:.LANCHOR154]
+	.loc 3 501 0
+	adrp	x0, .LANCHOR35
+	.loc 3 502 0
+	mov	w1, 0
+	.loc 3 501 0
+	strh	wzr, [x0, #:lo12:.LANCHOR35]
+	.loc 3 502 0
+	adrp	x0, .LANCHOR27
+	ldrh	w2, [x0, #:lo12:.LANCHOR27]
+	adrp	x0, .LANCHOR36
+	ldr	x0, [x0, #:lo12:.LANCHOR36]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+.LVL1108:
+	.loc 3 503 0
+	adrp	x0, .LANCHOR40
+	ldrh	w2, [x19, #:lo12:.LANCHOR6]
+	mov	w1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR40]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+.LVL1109:
+	.loc 3 504 0
+	adrp	x0, .LANCHOR126
+	ldrh	w2, [x19, #:lo12:.LANCHOR6]
+	mov	w1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR126]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+.LVL1110:
+	.loc 3 505 0
+	mov	w2, 48
+	mov	w1, 0
+	adrp	x0, .LANCHOR79
+	add	x0, x0, :lo12:.LANCHOR79
+	bl	ftl_memset
+.LVL1111:
+	.loc 3 506 0
+	mov	w2, 512
+	mov	w1, 0
+	adrp	x0, .LANCHOR83
+	add	x0, x0, :lo12:.LANCHOR83
+	bl	ftl_memset
+.LVL1112:
+	.loc 3 507 0
+	bl	FtlGcBufInit
+.LVL1113:
+	.loc 3 508 0
+	bl	FtlL2PDataInit
+.LVL1114:
+	.loc 3 510 0
+	ldr	x19, [sp, 16]
+	mov	w0, 0
+	ldp	x29, x30, [sp], 32
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE207:
+	.size	FtlVariablesInit, .-FtlVariablesInit
+	.section	.text.SupperBlkListInit,"ax",@progbits
+	.align	2
+	.global	SupperBlkListInit
+	.type	SupperBlkListInit, %function
+SupperBlkListInit:
+.LFB285:
+	.loc 2 2067 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -96]!
+	.cfi_def_cfa_offset 96
+	.cfi_offset 29, -96
+	.cfi_offset 30, -88
+	.loc 2 2071 0
+	adrp	x0, .LANCHOR6
+	mov	w1, 0
+	.loc 2 2067 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 2 2071 0
+	ldrh	w2, [x0, #:lo12:.LANCHOR6]
+	mov	w0, 6
+	.loc 2 2067 0
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -48
+	.cfi_offset 24, -40
+	.loc 2 2071 0
+	adrp	x24, .LANCHOR41
+	.loc 2 2067 0
+	stp	x19, x20, [sp, 16]
+	.loc 2 2075 0
+	adrp	x23, .LANCHOR45
+	.loc 2 2067 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 19, -80
+	.cfi_offset 20, -72
+	.cfi_offset 21, -64
+	.cfi_offset 22, -56
+	.loc 2 2076 0
+	adrp	x22, .LANCHOR48
+	.loc 2 2071 0
+	mul	w2, w2, w0
+	ldr	x0, [x24, #:lo12:.LANCHOR41]
+	.loc 2 2067 0
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 25, -32
+	.cfi_offset 26, -24
+	.loc 2 2079 0
+	adrp	x25, .LANCHOR5
+	.loc 2 2067 0
+	str	x27, [sp, 80]
+	.cfi_offset 27, -16
+	.loc 2 2082 0
+	adrp	x26, .LANCHOR13
+	.loc 2 2079 0
+	add	x25, x25, :lo12:.LANCHOR5
+	.loc 2 2082 0
+	add	x26, x26, :lo12:.LANCHOR13
+	.loc 2 2071 0
+	bl	ftl_memset
+.LVL1115:
+	.loc 2 2077 0
+	mov	w21, 0
+	.loc 2 2072 0
+	adrp	x0, .LANCHOR47
+	.loc 2 2077 0
+	mov	w20, 0
+	.loc 2 2079 0
+	mov	w19, 0
+	.loc 2 2075 0
+	strh	wzr, [x23, #:lo12:.LANCHOR45]
+	.loc 2 2072 0
+	str	xzr, [x0, #:lo12:.LANCHOR47]
+	.loc 2 2073 0
+	adrp	x0, .LANCHOR42
+	.loc 2 2076 0
+	strh	wzr, [x22, #:lo12:.LANCHOR48]
+.LVL1116:
+	.loc 2 2081 0
+	adrp	x27, .LANCHOR3
+	.loc 2 2073 0
+	str	xzr, [x0, #:lo12:.LANCHOR42]
+	.loc 2 2074 0
+	adrp	x0, .LANCHOR44
+	str	xzr, [x0, #:lo12:.LANCHOR44]
+.LVL1117:
+.L830:
+	.loc 2 2079 0 discriminator 1
+	ldrh	w0, [x25]
+	cmp	w19, w0
+	bcs	.L836
+	.loc 2 2084 0
+	adrp	x0, .LANCHOR19
+	.loc 2 2081 0
+	ldrh	w8, [x27, #:lo12:.LANCHOR3]
+	.loc 2 2084 0
+	mov	x6, 0
+	mov	w5, 0
+	ldrh	w7, [x0, #:lo12:.LANCHOR19]
+	b	.L837
+.LVL1118:
+.L832:
+	.loc 2 2082 0
+	ldrb	w0, [x26, x6]
+	mov	w1, w19
+	bl	V2P_block
+.LVL1119:
+	.loc 2 2083 0
+	bl	FtlBbmIsBadBlock
+.LVL1120:
+	cbnz	w0, .L831
+	.loc 2 2084 0
+	add	w5, w5, w7
+.LVL1121:
+	and	w5, w5, 65535
+.LVL1122:
+.L831:
+	add	x6, x6, 1
+.LVL1123:
+.L837:
+	.loc 2 2081 0 discriminator 1
+	cmp	w8, w6, uxth
+	bhi	.L832
+	.loc 2 2086 0
+	cbz	w5, .L839
+	.loc 2 2087 0
+	mov	w0, 32768
+	sdiv	w5, w0, w5
+.LVL1124:
+.L833:
+	.loc 2 2088 0
+	ldr	x1, [x24, #:lo12:.LANCHOR41]
+	mov	w0, 6
+	umaddl	x0, w19, w0, x1
+	strh	w5, [x0, 4]
+	.loc 2 2090 0
+	adrp	x0, .LANCHOR51
+	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+	cmp	w0, w19
+	beq	.L834
+	.loc 2 2091 0 discriminator 1
+	adrp	x0, .LANCHOR52
+	.loc 2 2090 0 discriminator 1
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
+	cmp	w0, w19
+	beq	.L834
+	.loc 2 2092 0
+	adrp	x0, .LANCHOR53
+	.loc 2 2091 0
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+	cmp	w0, w19
+	beq	.L834
+	.loc 2 2094 0
+	adrp	x1, .LANCHOR43
+	ubfiz	x0, x19, 1, 16
+	ldr	x1, [x1, #:lo12:.LANCHOR43]
+	ldrh	w0, [x1, x0]
+	cbnz	w0, .L835
+	.loc 2 2095 0
+	add	w21, w21, 1
+.LVL1125:
+	.loc 2 2096 0
+	mov	w0, w19
+	.loc 2 2095 0
+	and	w21, w21, 65535
+.LVL1126:
+	.loc 2 2096 0
+	bl	INSERT_FREE_LIST
+.LVL1127:
+.L834:
+	.loc 2 2079 0 discriminator 2
+	add	w19, w19, 1
+.LVL1128:
+	and	w19, w19, 65535
+.LVL1129:
+	b	.L830
+.LVL1130:
+.L839:
+	mov	w5, 0
+.LVL1131:
+	b	.L833
+.LVL1132:
+.L835:
+	.loc 2 2098 0
+	add	w20, w20, 1
+.LVL1133:
+	.loc 2 2099 0
+	mov	w0, w19
+	.loc 2 2098 0
+	and	w20, w20, 65535
+.LVL1134:
+	.loc 2 2099 0
+	bl	INSERT_DATA_LIST
+.LVL1135:
+	b	.L834
+.L836:
+	.loc 2 2103 0
+	strh	w20, [x23, #:lo12:.LANCHOR45]
+	.loc 2 2105 0
+	add	w20, w20, w21
+.LVL1136:
+	.loc 2 2104 0
+	strh	w21, [x22, #:lo12:.LANCHOR48]
+	.loc 2 2105 0
+	cmp	w20, w0
+	ble	.L838
+	.loc 2 2105 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR155
+	adrp	x0, .LC1
+	mov	w2, 2105
+	add	x1, x1, :lo12:.LANCHOR155
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1137:
+.L838:
+	.loc 2 2107 0 is_stmt 1
+	mov	w0, 0
+	ldr	x27, [sp, 80]
+	ldp	x19, x20, [sp, 16]
+.LVL1138:
+	ldp	x21, x22, [sp, 32]
+.LVL1139:
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE285:
+	.size	SupperBlkListInit, .-SupperBlkListInit
+	.section	.text.ftl_check_vpc,"ax",@progbits
+	.align	2
+	.global	ftl_check_vpc
+	.type	ftl_check_vpc, %function
+ftl_check_vpc:
+.LFB290:
+	.loc 2 2223 0
+	.cfi_startproc
+.LVL1140:
+	stp	x29, x30, [sp, -112]!
+	.cfi_def_cfa_offset 112
+	.cfi_offset 29, -112
+	.cfi_offset 30, -104
+	.loc 2 2229 0
+	adrp	x0, .LC91
+	add	x0, x0, :lo12:.LC91
+	.loc 2 2223 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -64
+	.cfi_offset 24, -56
+	.loc 2 2232 0
+	adrp	x23, .LANCHOR62
+	add	x23, x23, :lo12:.LANCHOR62
+	.loc 2 2223 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -80
+	.cfi_offset 22, -72
+	.loc 2 2232 0
+	mov	w22, 0
+	.loc 2 2223 0
+	stp	x19, x20, [sp, 16]
+	stp	x25, x26, [sp, 64]
+	.loc 2 2229 0
+	adrp	x21, .LANCHOR156
+	.loc 2 2223 0
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 19, -96
+	.cfi_offset 20, -88
+	.cfi_offset 25, -48
+	.cfi_offset 26, -40
+	.cfi_offset 27, -32
+	.cfi_offset 28, -24
+	.loc 2 2229 0
+	add	x1, x21, :lo12:.LANCHOR156
+	.loc 2 2231 0
+	adrp	x20, check_vpc_table
+	.loc 2 2229 0
+	bl	printf
+.LVL1141:
+	.loc 2 2231 0
+	add	x19, x20, :lo12:check_vpc_table
+	mov	w2, 8192
+	mov	w1, 0
+	mov	x0, x19
+	bl	ftl_memset
+.LVL1142:
+.L842:
+	.loc 2 2232 0 discriminator 1
+	ldr	w0, [x23]
+	cmp	w22, w0
+	bcc	.L844
+	.loc 2 2243 0 discriminator 1
+	adrp	x22, .LANCHOR5
+.LVL1143:
+	.loc 2 2247 0 discriminator 1
+	adrp	x24, .LC92
+	.loc 2 2243 0 discriminator 1
+	add	x22, x22, :lo12:.LANCHOR5
+	.loc 2 2245 0 discriminator 1
+	add	x26, x20, :lo12:check_vpc_table
+	.loc 2 2247 0 discriminator 1
+	add	x24, x24, :lo12:.LC92
+	mov	w23, 0
+	mov	w19, 0
+	.loc 2 2245 0 discriminator 1
+	adrp	x25, .LANCHOR43
+.LVL1144:
+.L845:
+	.loc 2 2243 0 discriminator 1
+	ldrh	w0, [x22]
+	cmp	w0, w19
+	bhi	.L847
+	.loc 2 2255 0
+	adrp	x0, .LANCHOR47
+	ldr	x19, [x0, #:lo12:.LANCHOR47]
+.LVL1145:
+	cbz	x19, .L848
+.LBB238:
+	.loc 2 2257 0
+	adrp	x0, .LANCHOR48
+	.loc 2 2263 0
+	adrp	x25, .LC93
+	add	x20, x20, :lo12:check_vpc_table
+	add	x25, x25, :lo12:.LC93
+	.loc 2 2257 0
+	ldrh	w26, [x0, #:lo12:.LANCHOR48]
+.LVL1146:
+	.loc 2 2258 0
+	adrp	x0, .LANCHOR41
+	mov	x24, x0
+	.loc 2 2259 0
+	mov	w22, 0
+	.loc 2 2258 0
+	ldr	x1, [x0, #:lo12:.LANCHOR41]
+	.loc 2 2261 0
+	adrp	x27, .LANCHOR43
+	.loc 2 2266 0
+	mov	w28, 6
+	.loc 2 2258 0
+	sub	x19, x19, x1
+	mov	x1, -6148914691236517206
+	asr	x19, x19, 1
+	movk	x1, 0xaaab, lsl 0
+	mul	x19, x19, x1
+	and	w19, w19, 65535
+.LVL1147:
+.L849:
+	.loc 2 2259 0 discriminator 1
+	cmp	w22, w26
+	bne	.L851
+.LVL1148:
+.L848:
+.LBE238:
+	.loc 2 2271 0
+	cbz	w23, .L841
+.LVL1149:
+	.loc 2 2271 0 is_stmt 0 discriminator 1
+	adrp	x0, .LC1
+	mov	w2, 2271
+	add	x1, x21, :lo12:.LANCHOR156
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1150:
+.L841:
+	.loc 2 2272 0 is_stmt 1
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL1151:
+.L844:
+	.cfi_restore_state
+	.loc 2 2234 0
+	mov	w2, 0
+	add	x1, x29, 108
+	mov	w0, w22
+	bl	log2phys
+.LVL1152:
+	.loc 2 2235 0
+	ldr	w0, [x29, 108]
+	cmn	w0, #1
+	beq	.L843
+	.loc 2 2237 0
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+.LVL1153:
+	.loc 2 2238 0
+	and	x0, x0, 65535
+	ldrh	w1, [x19, x0, lsl 1]
+	add	w1, w1, 1
+	strh	w1, [x19, x0, lsl 1]
+.LVL1154:
+.L843:
+	.loc 2 2232 0 discriminator 2
+	add	w22, w22, 1
+.LVL1155:
+	b	.L842
+.LVL1156:
+.L847:
+	.loc 2 2245 0
+	ldr	x0, [x25, #:lo12:.LANCHOR43]
+	ubfiz	x28, x19, 1, 16
+	sxtw	x27, w19
+	ldrh	w2, [x0, x28]
+	ldrh	w3, [x26, x27, lsl 1]
+	cmp	w2, w3
+	beq	.L846
+	.loc 2 2247 0
+	mov	w1, w19
+	mov	x0, x24
+	bl	printf
+.LVL1157:
+	.loc 2 2248 0
+	ldr	x0, [x25, #:lo12:.LANCHOR43]
+	mov	w1, 65535
+	ldrh	w0, [x0, x28]
+	cmp	w0, w1
+	beq	.L846
+	.loc 2 2248 0 is_stmt 0 discriminator 1
+	ldrh	w1, [x26, x27, lsl 1]
+	.loc 2 2250 0 is_stmt 1 discriminator 1
+	cmp	w1, w0
+	csinc	w23, w23, wzr, ls
+.LVL1158:
+.L846:
+	.loc 2 2243 0 discriminator 2
+	add	w19, w19, 1
+.LVL1159:
+	and	w19, w19, 65535
+.LVL1160:
+	b	.L845
+.LVL1161:
+.L851:
+.LBB239:
+	.loc 2 2261 0
+	ldr	x1, [x27, #:lo12:.LANCHOR43]
+	ubfiz	x0, x19, 1, 16
+	ldrh	w2, [x1, x0]
+	cbz	w2, .L850
+	.loc 2 2263 0
+	ldrh	w3, [x20, w19, sxtw 1]
+	.loc 2 2264 0
+	mov	w23, 1
+.LVL1162:
+	.loc 2 2263 0
+	mov	w1, w19
+	mov	x0, x25
+	bl	printf
+.LVL1163:
+.L850:
+	.loc 2 2266 0
+	ldr	x0, [x24, #:lo12:.LANCHOR41]
+	umull	x19, w19, w28
+.LVL1164:
+	ldrh	w19, [x0, x19]
+	mov	w0, 65535
+	cmp	w19, w0
+	beq	.L848
+.LVL1165:
+	.loc 2 2259 0 discriminator 2
+	add	w22, w22, 1
+.LVL1166:
+	and	w22, w22, 65535
+.LVL1167:
+	b	.L849
+.LBE239:
+	.cfi_endproc
+.LFE290:
+	.size	ftl_check_vpc, .-ftl_check_vpc
+	.section	.text.FtlGcPageVarInit,"ax",@progbits
+	.align	2
+	.global	FtlGcPageVarInit
+	.type	FtlGcPageVarInit, %function
+FtlGcPageVarInit:
+.LFB309:
+	.loc 5 202 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	.loc 5 203 0
+	adrp	x0, .LANCHOR97
+	.loc 5 205 0
+	mov	w1, 255
+	.loc 5 202 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 5 203 0
+	strh	wzr, [x0, #:lo12:.LANCHOR97]
+	.loc 5 204 0
+	adrp	x0, .LANCHOR99
+	.loc 5 202 0
+	str	x19, [sp, 16]
+	.cfi_offset 19, -16
+	.loc 5 205 0
+	adrp	x19, .LANCHOR21
+	.loc 5 204 0
+	strh	wzr, [x0, #:lo12:.LANCHOR99]
+	.loc 5 205 0
+	adrp	x0, .LANCHOR98
+	ldrh	w2, [x19, #:lo12:.LANCHOR21]
+	ldr	x0, [x0, #:lo12:.LANCHOR98]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+.LVL1168:
+	.loc 5 206 0
+	ldrh	w2, [x19, #:lo12:.LANCHOR21]
+	mov	w0, 12
+	mov	w1, 255
+	mul	w2, w2, w0
+	adrp	x0, .LANCHOR100
+	ldr	x0, [x0, #:lo12:.LANCHOR100]
+	bl	ftl_memset
+.LVL1169:
+	.loc 5 208 0
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_def_cfa 31, 0
+	.loc 5 207 0
+	b	FtlGcBufInit
+.LVL1170:
+	.cfi_endproc
+.LFE309:
+	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
+	.section	.text.FtlGcScanTempBlk,"ax",@progbits
+	.align	2
+	.global	FtlGcScanTempBlk
+	.type	FtlGcScanTempBlk, %function
+FtlGcScanTempBlk:
+.LFB310:
+	.loc 5 211 0
+	.cfi_startproc
+.LVL1171:
+	stp	x29, x30, [sp, -112]!
+	.cfi_def_cfa_offset 112
+	.cfi_offset 29, -112
+	.cfi_offset 30, -104
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -80
+	.cfi_offset 22, -72
+	.loc 5 220 0
+	adrp	x21, .LANCHOR157
+	.loc 5 211 0
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -96
+	.cfi_offset 20, -88
+	mov	x20, x0
+	stp	x27, x28, [sp, 80]
+	.loc 5 221 0
+	mov	w0, 65535
+.LVL1172:
+	.loc 5 220 0
+	ldrh	w19, [x21, #:lo12:.LANCHOR157]
+.LVL1173:
+	.cfi_offset 27, -32
+	.cfi_offset 28, -24
+	.loc 5 211 0
+	mov	w28, w1
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 23, -64
+	.cfi_offset 24, -56
+	.cfi_offset 25, -48
+	.cfi_offset 26, -40
+	.loc 5 221 0
+	cmp	w19, w0
+	beq	.L885
+	.loc 5 223 0
+	cbnz	w19, .L869
+.L870:
+	.loc 5 224 0
+	bl	FtlGcPageVarInit
+.LVL1174:
+	b	.L871
+.LVL1175:
+.L885:
+	.loc 5 222 0
+	mov	w19, 0
+.LVL1176:
+.L869:
+	.loc 5 223 0 discriminator 1
+	adrp	x0, .LANCHOR19
+	ldrh	w0, [x0, #:lo12:.LANCHOR19]
+	cmp	w0, w28
+	beq	.L870
+.LVL1177:
+.L871:
+	.loc 5 235 0
+	adrp	x27, .LANCHOR23
+	add	x27, x27, :lo12:.LANCHOR23
+	.loc 5 222 0
+	mov	w22, 0
+	.loc 5 228 0
+	mov	w23, 65535
+.LVL1178:
+.L879:
+	ldrh	w0, [x20]
+	.loc 5 226 0
+	strb	wzr, [x20, 8]
+.LVL1179:
+	.loc 5 228 0
+	cmp	w0, w23
+	beq	.L886
+	.loc 5 236 0
+	adrp	x25, .LANCHOR24
+	.loc 5 231 0
+	adrp	x26, .LANCHOR3
+	.loc 5 236 0
+	add	x25, x25, :lo12:.LANCHOR24
+	.loc 5 231 0
+	add	x26, x26, :lo12:.LANCHOR3
+.L882:
+.LVL1180:
+	.loc 5 235 0
+	adrp	x1, .LANCHOR93
+	.loc 5 234 0
+	adrp	x24, .LANCHOR120
+	.loc 5 235 0
+	ldrh	w7, [x27]
+	add	x5, x20, 16
+	ldr	x6, [x1, #:lo12:.LANCHOR93]
+	.loc 5 236 0
+	adrp	x1, .LANCHOR94
+	.loc 5 234 0
+	ldr	x0, [x24, #:lo12:.LANCHOR120]
+	.loc 5 230 0
+	mov	w3, 0
+	.loc 5 236 0
+	ldr	x8, [x1, #:lo12:.LANCHOR94]
+	ldrh	w1, [x26]
+	ldrh	w10, [x25]
+	add	x1, x1, 8
+	add	x1, x20, x1, lsl 1
+.LVL1181:
+.L873:
+	.loc 5 231 0 discriminator 1
+	cmp	x1, x5
+	bne	.L875
+	.loc 5 240 0
+	mov	w1, w3
+	str	w3, [x29, 108]
+	mov	w2, 0
+	bl	FlashReadPages
+.LVL1182:
+	ldr	w3, [x29, 108]
+	.loc 5 241 0
+	mov	x11, 0
+	ubfiz	x12, x3, 5, 16
+.LVL1183:
+.L876:
+	.loc 5 241 0 is_stmt 0 discriminator 1
+	cmp	x11, x12
+	bne	.L880
+	.loc 5 264 0 is_stmt 1
+	add	w19, w19, 1
+.LVL1184:
+	.loc 5 266 0
+	add	w22, w22, 1
+.LVL1185:
+	.loc 5 264 0
+	and	w19, w19, 65535
+.LVL1186:
+	.loc 5 268 0
+	cmp	w28, w22
+	adrp	x1, .LANCHOR19
+	bls	.L881
+.L883:
+	.loc 5 274 0
+	ldrh	w0, [x1, #:lo12:.LANCHOR19]
+	cmp	w0, w19
+	bhi	.L882
+.L886:
+	.loc 5 227 0
+	mov	w2, 0
+	b	.L872
+.LVL1187:
+.L875:
+	.loc 5 232 0
+	ldrh	w4, [x5]
+.LVL1188:
+	.loc 5 233 0
+	cmp	w4, w23
+	beq	.L874
+	.loc 5 234 0
+	ubfiz	x2, x3, 5, 16
+	orr	w4, w19, w4, lsl 10
+.LVL1189:
+	add	x2, x0, x2
+	str	w4, [x2, 4]
+	.loc 5 235 0
+	mul	w4, w3, w7
+	asr	w4, w4, 2
+	add	x4, x6, x4, sxtw 2
+	str	x4, [x2, 8]
+	.loc 5 236 0
+	mul	w4, w3, w10
+	.loc 5 237 0
+	add	w3, w3, 1
+.LVL1190:
+	and	w3, w3, 65535
+.LVL1191:
+	.loc 5 236 0
+	asr	w4, w4, 2
+	add	x4, x8, x4, sxtw 2
+	str	x4, [x2, 16]
+.L874:
+	add	x5, x5, 2
+.LVL1192:
+	b	.L873
+.LVL1193:
+.L880:
+	.loc 5 242 0
+	ldr	x6, [x24, #:lo12:.LANCHOR120]
+	add	x5, x6, x11
+	ldr	w4, [x5, 4]
+.LVL1194:
+	.loc 5 243 0
+	lsr	w0, w4, 10
+	bl	P2V_plane
+.LVL1195:
+	and	w2, w0, 65535
+.LVL1196:
+	.loc 5 245 0
+	ldr	w0, [x6, x11]
+.LVL1197:
+	cbnz	w0, .L877
+	.loc 5 247 0
+	ldr	x0, [x5, 16]
+.LVL1198:
+	add	x11, x11, 32
+	.loc 5 248 0
+	ldrh	w1, [x0]
+	cmp	w1, w23
+	bne	.L878
+	.loc 5 249 0
+	adrp	x0, .LANCHOR153
+.LVL1199:
+	mov	w1, 1
+	str	w1, [x0, #:lo12:.LANCHOR153]
+.LVL1200:
+.L872:
+	.loc 5 282 0
+	strh	w19, [x20, 2]
+	.loc 5 281 0
+	mov	w0, -1
+	.loc 5 283 0
+	strb	w2, [x20, 6]
+	.loc 5 284 0
+	mov	w1, w19
+	.loc 5 281 0
+	strh	w0, [x21, #:lo12:.LANCHOR157]
+	.loc 5 284 0
+	mov	x0, x20
+	bl	ftl_sb_update_avl_pages
+.LVL1201:
+	.loc 5 285 0
+	b	.L884
+.LVL1202:
+.L878:
+	.loc 5 252 0
+	ldp	w2, w0, [x0, 8]
+.LVL1203:
+	mov	w1, w4
+	bl	FtlGcUpdatePage
+.LVL1204:
+	b	.L876
+.LVL1205:
+.L877:
+	.loc 5 256 0
+	adrp	x0, .LANCHOR43
+	ldrh	w1, [x20]
+	.loc 5 259 0
+	mov	w19, 0
+.LVL1206:
+	.loc 5 256 0
+	ldr	x0, [x0, #:lo12:.LANCHOR43]
+	strh	wzr, [x0, x1, lsl 1]
+	.loc 5 257 0
+	ldrh	w0, [x20]
+	bl	INSERT_FREE_LIST
+.LVL1207:
+	.loc 5 258 0
+	mov	w0, -1
+	strh	w0, [x20]
+.LVL1208:
+	.loc 5 260 0
+	bl	FtlGcPageVarInit
+.LVL1209:
+	.loc 5 261 0
+	b	.L879
+.LVL1210:
+.L881:
+	.loc 5 268 0 discriminator 1
+	ldrh	w0, [x21, #:lo12:.LANCHOR157]
+	cmp	w0, w23
+	beq	.L883
+	.loc 5 269 0
+	add	w0, w0, w22
+	strh	w0, [x21, #:lo12:.LANCHOR157]
+	.loc 5 270 0
+	ldrh	w0, [x1, #:lo12:.LANCHOR19]
+	cmp	w0, w19
+	bls	.L883
+.LVL1211:
+.L884:
+	.loc 5 286 0
+	ldp	x19, x20, [sp, 16]
+.LVL1212:
+	mov	w0, -1
+	ldp	x21, x22, [sp, 32]
+.LVL1213:
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+.LVL1214:
+	ldp	x29, x30, [sp], 112
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE310:
+	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
+	.section	.text.FlashTestBlk,"ax",@progbits
+	.align	2
+	.global	FlashTestBlk
+	.type	FlashTestBlk, %function
+FlashTestBlk:
+.LFB343:
+	.loc 1 193 0
+	.cfi_startproc
+.LVL1215:
+	stp	x29, x30, [sp, -128]!
+	.cfi_def_cfa_offset 128
+	.cfi_offset 29, -128
+	.cfi_offset 30, -120
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -112
+	.cfi_offset 20, -104
+	.loc 1 193 0
+	and	w19, w0, 65535
+	.loc 1 198 0
+	cmp	w19, 11
+	bls	.L894
+.LVL1216:
+.LBB242:
+.LBB243:
+	.loc 1 203 0
+	add	x0, x29, 64
+.LVL1217:
+	.loc 1 204 0
+	mov	w2, 32
+	mov	w1, 165
+	.loc 1 202 0
+	adrp	x20, ftl_temp_buf
+	add	x20, x20, :lo12:ftl_temp_buf
+	.loc 1 203 0
+	stp	x20, x0, [x29, 40]
+	.loc 1 204 0
+	bl	ftl_memset
+.LVL1218:
+	.loc 1 206 0
+	lsl	w19, w19, 10
+.LVL1219:
+	.loc 1 205 0
+	mov	w2, 8
+	mov	w1, 90
+	mov	x0, x20
+	bl	ftl_memset
+.LVL1220:
+	.loc 1 207 0
+	mov	w2, 1
+	.loc 1 206 0
+	str	w19, [x29, 36]
+	.loc 1 207 0
+	mov	w1, w2
+	add	x0, x29, 32
+	bl	FlashEraseBlocks
+.LVL1221:
+	.loc 1 208 0
+	mov	w3, 1
+	add	x0, x29, 32
+	mov	w2, w3
+	mov	w1, w3
+	bl	FlashProgPages
+.LVL1222:
+	.loc 1 209 0
+	ldr	w0, [x29, 32]
+	.loc 1 215 0
+	mov	w2, 1
+	mov	w1, 0
+	.loc 1 209 0
+	cmp	w0, 0
+	.loc 1 215 0
+	add	x0, x29, 32
+	.loc 1 209 0
+	csetm	w19, ne
+.LDL1:
+.LVL1223:
+	.loc 1 215 0
+	bl	FlashEraseBlocks
+.LVL1224:
+.L892:
+.LBE243:
+.LBE242:
+	.loc 1 217 0
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 128
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL1225:
+.L894:
+	.cfi_restore_state
+	.loc 1 199 0
+	mov	w19, 0
+	b	.L892
+	.cfi_endproc
+.LFE343:
+	.size	FlashTestBlk, .-FlashTestBlk
+	.section	.text.FlashGetBadBlockList,"ax",@progbits
+	.align	2
+	.global	FlashGetBadBlockList
+	.type	FlashGetBadBlockList, %function
+FlashGetBadBlockList:
+.LFB344:
+	.loc 1 220 0
+	.cfi_startproc
+.LVL1226:
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	.loc 1 223 0
+	mov	w2, 256
+	.loc 1 220 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -16
+	.cfi_offset 20, -8
+	.loc 1 220 0
+	mov	x19, x0
+	mov	w20, w1
+	.loc 1 223 0
+	mov	w1, 255
+.LVL1227:
+	bl	ftl_memset
+.LVL1228:
+	.loc 1 224 0
+	adrp	x0, .LANCHOR107
+	mov	w1, w20
+	ldr	x2, [x0, #:lo12:.LANCHOR107]
+	mov	x0, x19
+	blr	x2
+.LVL1229:
+	and	w0, w0, 65535
+.LVL1230:
+	.loc 1 225 0
+	cmp	w0, 50
+	bls	.L897
+	.loc 1 226 0
+	mov	w2, 256
+	mov	w1, 255
+	mov	x0, x19
+.LVL1231:
+	bl	ftl_memset
+.LVL1232:
+	.loc 1 227 0
+	mov	w0, 0
+.LVL1233:
+.L897:
+	.loc 1 229 0
+	adrp	x1, .LANCHOR0+14
+	ldrh	w1, [x1, #:lo12:.LANCHOR0+14]
+	cmp	w1, 4
+	bne	.L901
+	mov	x1, 0
+.L899:
+.LVL1234:
+	.loc 1 230 0 discriminator 1
+	cmp	w0, w1, uxth
+	bhi	.L900
+.LVL1235:
+.L901:
+	.loc 1 235 0
+	ldp	x19, x20, [sp, 16]
+.LVL1236:
+	ldp	x29, x30, [sp], 32
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL1237:
+.L900:
+	.cfi_restore_state
+	.loc 1 231 0 discriminator 3
+	ldrh	w2, [x19, x1, lsl 1]
+	lsr	w2, w2, 1
+	strh	w2, [x19, x1, lsl 1]
+.LVL1238:
+	add	x1, x1, 1
+.LVL1239:
+	b	.L899
+	.cfi_endproc
+.LFE344:
+	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
+	.section	.text.ftl_memcpy,"ax",@progbits
+	.align	2
+	.global	ftl_memcpy
+	.type	ftl_memcpy, %function
+ftl_memcpy:
+.LFB346:
+	.loc 1 243 0
+	.cfi_startproc
+.LVL1240:
+	.loc 1 244 0
+	uxtw	x2, w2
+	b	memcpy
+.LVL1241:
+	.cfi_endproc
+.LFE346:
+	.size	ftl_memcpy, .-ftl_memcpy
+	.section	.text.FtlBbmTblFlush,"ax",@progbits
+	.align	2
+	.global	FtlBbmTblFlush
+	.type	FtlBbmTblFlush, %function
+FtlBbmTblFlush:
+.LFB226:
+	.loc 4 80 0
+	.cfi_startproc
+.LVL1242:
+	stp	x29, x30, [sp, -96]!
+	.cfi_def_cfa_offset 96
+	.cfi_offset 29, -96
+	.cfi_offset 30, -88
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -48
+	.cfi_offset 24, -40
+	.loc 4 88 0
+	adrp	x23, .LANCHOR109
+	.loc 4 80 0
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -80
+	.cfi_offset 20, -72
+	.loc 4 87 0
+	adrp	x19, .LANCHOR108
+	.loc 4 80 0
+	stp	x21, x22, [sp, 32]
+	.loc 4 87 0
+	add	x20, x19, :lo12:.LANCHOR108
+	.cfi_offset 21, -64
+	.cfi_offset 22, -56
+	adrp	x22, .LANCHOR39
+	.loc 4 88 0
+	ldr	x1, [x23, #:lo12:.LANCHOR109]
+	.loc 4 80 0
+	stp	x25, x26, [sp, 64]
+	adrp	x21, .LANCHOR37
+	str	x27, [sp, 80]
+	.cfi_offset 25, -32
+	.cfi_offset 26, -24
+	.cfi_offset 27, -16
+	add	x25, x21, :lo12:.LANCHOR37
+	.loc 4 87 0
+	ldr	x0, [x22, #:lo12:.LANCHOR39]
+	.loc 4 91 0
+	adrp	x26, .LANCHOR10
+	.loc 4 88 0
+	stp	x0, x1, [x20, 8]
+	.loc 4 89 0
+	adrp	x1, .LANCHOR23
+	.loc 4 92 0
+	adrp	x27, .LANCHOR137
+	add	x25, x25, 32
+	.loc 4 89 0
+	ldrh	w2, [x1, #:lo12:.LANCHOR23]
+	.loc 4 91 0
+	mov	w24, 0
+	add	x26, x26, :lo12:.LANCHOR10
+	.loc 4 92 0
+	add	x27, x27, :lo12:.LANCHOR137
+	.loc 4 89 0
+	mov	w1, 0
+	bl	ftl_memset
+.LVL1243:
+.L905:
+	.loc 4 91 0 discriminator 1
+	ldrh	w0, [x26]
+	cmp	w24, w0
+	blt	.L906
+	.loc 4 94 0
+	add	x19, x19, :lo12:.LANCHOR108
+	.loc 4 98 0
+	add	x20, x21, :lo12:.LANCHOR37
+	.loc 4 95 0
+	mov	w2, 16
+	mov	w1, 255
+	.loc 4 108 0
+	adrp	x24, .LC94
+.LVL1244:
+	.loc 4 110 0
+	adrp	x26, .LANCHOR20
+	.loc 4 94 0
+	ldr	x27, [x19, 16]
+.LVL1245:
+	.loc 4 108 0
+	add	x24, x24, :lo12:.LC94
+	.loc 4 110 0
+	add	x26, x26, :lo12:.LANCHOR20
+	.loc 4 82 0
+	mov	w25, 0
+	.loc 4 95 0
+	mov	x0, x27
+	bl	ftl_memset
+.LVL1246:
+	.loc 4 97 0
+	mov	w0, -3887
+	strh	w0, [x27]
+	.loc 4 98 0
+	ldr	w0, [x20, 8]
+	str	w0, [x27, 4]
+	.loc 4 99 0
+	ldrh	w0, [x21, #:lo12:.LANCHOR37]
+	.loc 4 84 0
+	mov	w21, 0
+	.loc 4 99 0
+	strh	w0, [x27, 2]
+	.loc 4 100 0
+	ldrh	w0, [x20, 4]
+	strh	w0, [x27, 8]
+	.loc 4 101 0
+	ldrh	w0, [x20, 6]
+	strh	w0, [x27, 10]
+	.loc 4 102 0
+	adrp	x0, .LANCHOR2
+	ldr	w0, [x0, #:lo12:.LANCHOR2]
+	strh	w0, [x27, 12]
+.LVL1247:
+.L907:
+	.loc 4 108 0
+	ldrh	w4, [x27, 10]
+	.loc 4 107 0
+	ldrh	w1, [x20]
+	ldrh	w2, [x20, 2]
+	.loc 4 108 0
+	ldrh	w3, [x20, 4]
+	.loc 4 104 0
+	ldr	x0, [x22, #:lo12:.LANCHOR39]
+	str	x0, [x19, 8]
+	.loc 4 105 0
+	ldr	x0, [x23, #:lo12:.LANCHOR109]
+	str	x0, [x19, 16]
+	.loc 4 107 0
+	orr	w0, w2, w1, lsl 10
+	.loc 4 106 0
+	str	wzr, [x19]
+	.loc 4 107 0
+	str	w0, [x19, 4]
+	.loc 4 108 0
+	mov	x0, x24
+	bl	printf
+.LVL1248:
+	.loc 4 109 0
+	mov	w3, 1
+	mov	x0, x19
+	mov	w1, w3
+	mov	w2, w3
+	bl	FlashProgPages
+.LVL1249:
+	.loc 4 110 0
+	ldrh	w0, [x26]
+	ldrh	w1, [x20, 2]
+	sub	w0, w0, #1
+	cmp	w1, w0
+	blt	.L908
+	.loc 4 113 0
+	ldr	w0, [x20, 8]
+	.loc 4 122 0
+	mov	w2, 1
+	.loc 4 116 0
+	ldrh	w1, [x20, 4]
+	.loc 4 113 0
+	add	w0, w0, 1
+	str	w0, [x20, 8]
+	.loc 4 114 0
+	str	w0, [x27, 4]
+	.loc 4 115 0
+	ldrh	w0, [x20]
+	strh	w0, [x27, 8]
+	.loc 4 118 0
+	strh	w0, [x20, 4]
+	.loc 4 121 0
+	adrp	x0, .LANCHOR112
+	.loc 4 116 0
+	strh	w1, [x20]
+	.loc 4 119 0
+	lsl	w1, w1, 10
+	.loc 4 121 0
+	ldr	x0, [x0, #:lo12:.LANCHOR112]
+	.loc 4 119 0
+	str	w1, [x19, 4]
+	.loc 4 117 0
+	strh	wzr, [x20, 2]
+	.loc 4 121 0
+	str	w1, [x0, 4]
+	.loc 4 122 0
+	mov	w1, w2
+	bl	FlashEraseBlocks
+.LVL1250:
+	.loc 4 123 0
+	mov	w3, 1
+	mov	x0, x19
+	mov	w2, w3
+	mov	w1, w3
+	bl	FlashProgPages
+.LVL1251:
+.L908:
+	.loc 4 126 0
+	ldrh	w0, [x20, 2]
+	add	w0, w0, 1
+	strh	w0, [x20, 2]
+	.loc 4 127 0
+	ldr	w0, [x19]
+	cmn	w0, #1
+	bne	.L909
+	.loc 4 129 0
+	ldr	w1, [x19, 4]
+	.loc 4 130 0
+	add	w21, w21, 1
+.LVL1252:
+	.loc 4 129 0
+	adrp	x0, .LC95
+	.loc 4 130 0
+	and	w21, w21, 65535
+	.loc 4 129 0
+	add	x0, x0, :lo12:.LC95
+	bl	printf
+.LVL1253:
+	.loc 4 131 0
+	cmp	w21, 3
+	bls	.L907
+	.loc 4 132 0
+	ldr	w1, [x19, 4]
+	adrp	x0, .LC96
+	mov	w2, w21
+	add	x0, x0, :lo12:.LC96
+	bl	printf
+.LVL1254:
+.L911:
+	b	.L911
+.LVL1255:
+.L906:
+	.loc 4 92 0 discriminator 3
+	ldrh	w2, [x27]
+	ldr	x1, [x25], 8
+	ldr	x0, [x20, 8]
+	mul	w3, w24, w2
+	lsl	w2, w2, 2
+	.loc 4 91 0 discriminator 3
+	add	w24, w24, 1
+.LVL1256:
+	.loc 4 92 0 discriminator 3
+	add	x0, x0, x3, sxtw 2
+	bl	ftl_memcpy
+.LVL1257:
+	b	.L905
+.LVL1258:
+.L912:
+	mov	w25, 1
+.LVL1259:
+	b	.L907
+.LVL1260:
+.L909:
+	.loc 4 139 0
+	cbz	w25, .L912
+	.loc 4 146 0
+	mov	w0, 0
+	ldr	x27, [sp, 80]
+.LVL1261:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+.LVL1262:
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+.LVL1263:
+	ldp	x29, x30, [sp], 96
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE226:
+	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
+	.section	.text.allocate_data_superblock,"ax",@progbits
+	.align	2
+	.global	allocate_data_superblock
+	.type	allocate_data_superblock, %function
+allocate_data_superblock:
+.LFB298:
+	.loc 2 2531 0
+	.cfi_startproc
+.LVL1264:
+	stp	x29, x30, [sp, -112]!
+	.cfi_def_cfa_offset 112
+	.cfi_offset 29, -112
+	.cfi_offset 30, -104
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 27, -32
+	.cfi_offset 28, -24
+	.loc 2 2537 0
+	adrp	x28, .LANCHOR48
+	.loc 2 2531 0
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -64
+	.cfi_offset 24, -56
+	.loc 2 2540 0
+	add	x23, x28, :lo12:.LANCHOR48
+	.loc 2 2531 0
+	stp	x19, x20, [sp, 16]
+	.loc 2 2537 0
+	adrp	x27, .LANCHOR45
+	.cfi_offset 19, -96
+	.cfi_offset 20, -88
+	.loc 2 2531 0
+	mov	x19, x0
+	stp	x21, x22, [sp, 32]
+	.loc 2 2537 0
+	add	x0, x27, :lo12:.LANCHOR45
+.LVL1265:
+	.loc 2 2531 0
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 21, -80
+	.cfi_offset 22, -72
+	.cfi_offset 25, -48
+	.cfi_offset 26, -40
+	.loc 2 2537 0
+	str	x0, [x29, 104]
+.LVL1266:
+.L915:
+	ldr	x1, [x29, 104]
+	adrp	x24, .LANCHOR5
+	ldrh	w0, [x28, #:lo12:.LANCHOR48]
+	ldrh	w1, [x1]
+	add	w0, w0, w1
+	ldrh	w1, [x24, #:lo12:.LANCHOR5]
+	cmp	w0, w1
+	ble	.L916
+	.loc 2 2537 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR158
+	adrp	x0, .LC1
+	mov	w2, 2537
+	add	x1, x1, :lo12:.LANCHOR158
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1267:
+.L916:
+	.loc 2 2539 0 is_stmt 1
+	adrp	x0, .LANCHOR53
+	add	x0, x0, :lo12:.LANCHOR53
+	cmp	x19, x0
+	bne	.L941
+	.loc 2 2540 0
+	adrp	x1, .LANCHOR89
+	ldrh	w0, [x23]
+	ldr	w1, [x1, #:lo12:.LANCHOR89]
+	mul	w1, w0, w1
+	lsr	w0, w0, 1
+	add	w0, w0, 1
+	add	w1, w0, w1, lsr 2
+.LVL1268:
+	.loc 2 2544 0
+	ands	w1, w1, 65535
+	beq	.L917
+	.loc 2 2545 0
+	sub	w1, w1, #1
+.LVL1269:
+	and	w1, w1, 65535
+.LVL1270:
+.L917:
+	.loc 2 2546 0
+	adrp	x0, .LANCHOR47
+	add	x0, x0, :lo12:.LANCHOR47
+	bl	List_pop_index_node
+.LVL1271:
+	and	w20, w0, 65535
+.LVL1272:
+	ldrh	w0, [x23]
+	cbnz	w0, .L918
+	.loc 2 2546 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR158
+	adrp	x0, .LC1
+	mov	w2, 2546
+	add	x1, x1, :lo12:.LANCHOR158
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1273:
+.L918:
+	.loc 2 2546 0 discriminator 3
+	ldrh	w0, [x23]
+	sub	w0, w0, #1
+	strh	w0, [x23]
+	.loc 2 2549 0 is_stmt 1 discriminator 3
+	strh	w20, [x19]
+	.loc 2 2550 0 discriminator 3
+	mov	x0, x19
+	bl	make_superblock
+.LVL1274:
+	.loc 2 2551 0 discriminator 3
+	ldrb	w0, [x19, 7]
+	cbnz	w0, .L919
+	.loc 2 2555 0
+	adrp	x1, .LANCHOR43
+	ubfiz	x0, x20, 1, 16
+	mov	w2, -1
+	ldr	x1, [x1, #:lo12:.LANCHOR43]
+	strh	w2, [x1, x0]
+	.loc 2 2556 0
+	mov	w0, w20
+	bl	INSERT_DATA_LIST
+.LVL1275:
+	.loc 2 2557 0
+	ldrh	w1, [x27, #:lo12:.LANCHOR45]
+	ldrh	w0, [x23]
+	add	w0, w0, w1
+	ldrh	w1, [x24, #:lo12:.LANCHOR5]
+	cmp	w0, w1
+	ble	.L915
+	.loc 2 2557 0 is_stmt 0 discriminator 1
+	mov	w2, 2557
+	adrp	x1, .LANCHOR158
+	adrp	x0, .LC1
+	add	x1, x1, :lo12:.LANCHOR158
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1276:
+	b	.L915
+.LVL1277:
+.L941:
+	mov	w1, 0
+	b	.L917
+.LVL1278:
+.L919:
+	.loc 2 2560 0 is_stmt 1
+	ldrh	w1, [x27, #:lo12:.LANCHOR45]
+	ldrh	w0, [x23]
+	add	w0, w0, w1
+	ldrh	w1, [x24, #:lo12:.LANCHOR5]
+	cmp	w0, w1
+	ble	.L921
+	.loc 2 2560 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR158
+	adrp	x0, .LC1
+	mov	w2, 2560
+	add	x1, x1, :lo12:.LANCHOR158
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1279:
+.L921:
+	.loc 2 2563 0 is_stmt 1 discriminator 1
+	adrp	x0, .LANCHOR3
+	.loc 2 2564 0 discriminator 1
+	adrp	x25, .LANCHOR112
+	add	x26, x19, 16
+	mov	w21, 0
+	ldrh	w0, [x0, #:lo12:.LANCHOR3]
+	mov	x4, x26
+	ldr	x3, [x25, #:lo12:.LANCHOR112]
+	.loc 2 2566 0 discriminator 1
+	mov	w6, 65535
+	ubfiz	x0, x0, 5, 16
+	add	x1, x3, 8
+	add	x0, x0, 8
+	add	x0, x3, x0
+.L922:
+.LVL1280:
+	.loc 2 2563 0 discriminator 1
+	cmp	x0, x1
+	bne	.L924
+	.loc 2 2571 0
+	cbnz	w21, .L925
+	.loc 2 2571 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR158
+	adrp	x0, .LC1
+	mov	w2, 2571
+	add	x1, x1, :lo12:.LANCHOR158
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1281:
+.L925:
+	.loc 2 2573 0 is_stmt 1
+	adrp	x0, .LANCHOR82
+	ldrh	w0, [x0, #:lo12:.LANCHOR82]
+	cmp	w0, w20
+	bne	.L926
+	.loc 2 2573 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR158
+	adrp	x0, .LC1
+	mov	w2, 2573
+	add	x1, x1, :lo12:.LANCHOR158
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1282:
+.L926:
+	.loc 2 2574 0 is_stmt 1
+	ldrb	w0, [x19, 8]
+	uxtw	x22, w20
+	adrp	x6, .LANCHOR40
+	adrp	x7, .LANCHOR14
+	adrp	x5, .LANCHOR73
+	adrp	x4, .LANCHOR74
+	cbnz	w0, .L927
+	.loc 2 2575 0
+	ldr	x2, [x6, #:lo12:.LANCHOR40]
+	lsl	x1, x22, 1
+	ldrh	w0, [x2, x1]
+	cbz	w0, .L928
+	.loc 2 2576 0
+	ldrh	w3, [x7, #:lo12:.LANCHOR14]
+	add	w0, w0, w3
+.L952:
+	.loc 2 2578 0
+	strh	w0, [x2, x1]
+	.loc 2 2580 0
+	mov	w1, 0
+	.loc 2 2579 0
+	ldr	w0, [x5, #:lo12:.LANCHOR73]
+	add	w0, w0, 1
+	str	w0, [x5, #:lo12:.LANCHOR73]
+	.loc 2 2580 0
+	mov	w0, w20
+	bl	ftl_set_blk_mode
+.LVL1283:
+.L930:
+	.loc 2 2587 0
+	ldr	x0, [x6, #:lo12:.LANCHOR40]
+	lsl	x22, x22, 1
+	ldrh	w1, [x0, x22]
+	adrp	x0, .LANCHOR77
+	ldr	w2, [x0, #:lo12:.LANCHOR77]
+	cmp	w1, w2
+	bls	.L931
+	.loc 2 2588 0
+	str	w1, [x0, #:lo12:.LANCHOR77]
+.L931:
+	.loc 2 2590 0
+	ldr	w2, [x5, #:lo12:.LANCHOR73]
+	ldr	w1, [x4, #:lo12:.LANCHOR74]
+	ldrh	w0, [x7, #:lo12:.LANCHOR14]
+	madd	w0, w0, w2, w1
+	ldrh	w1, [x24, #:lo12:.LANCHOR5]
+	udiv	w0, w0, w1
+	adrp	x1, .LANCHOR75
+	str	w0, [x1, #:lo12:.LANCHOR75]
+	.loc 2 2591 0
+	adrp	x0, .LANCHOR127
+	ldr	x1, [x0, #:lo12:.LANCHOR127]
+	ldr	w0, [x1, 16]
+	add	w0, w0, 1
+	str	w0, [x1, 16]
+.LVL1284:
+	.loc 2 2594 0
+	ldr	x0, [x25, #:lo12:.LANCHOR112]
+	ubfiz	x1, x21, 5, 16
+	add	x1, x1, 4
+	add	x2, x0, 4
+	add	x1, x0, x1
+.LVL1285:
+.L932:
+	.loc 2 2593 0 discriminator 1
+	cmp	x1, x2
+	bne	.L933
+	.loc 2 2595 0
+	ldrb	w1, [x19, 8]
+	mov	w2, w21
+	.loc 2 2597 0
+	mov	x24, 0
+	.loc 2 2595 0
+	bl	FlashEraseBlocks
+.LVL1286:
+	.loc 2 2596 0
+	mov	w1, 0
+.LVL1287:
+.L934:
+	.loc 2 2597 0 discriminator 1
+	cmp	w21, w24, uxth
+	bhi	.L936
+	.loc 2 2608 0
+	cbz	w1, .L937
+	.loc 2 2609 0
+	mov	w0, w20
+	bl	update_multiplier_value
+.LVL1288:
+	.loc 2 2610 0
+	bl	FtlBbmTblFlush
+.LVL1289:
+.L937:
+	.loc 2 2613 0
+	ldrb	w0, [x19, 7]
+	adrp	x2, .LANCHOR43
+	cbnz	w0, .L938
+	.loc 2 2615 0
+	ldr	x0, [x2, #:lo12:.LANCHOR43]
+	mov	w1, -1
+	strh	w1, [x0, x22]
+	.loc 2 2616 0
+	mov	w0, w20
+	bl	INSERT_DATA_LIST
+.LVL1290:
+	.loc 2 2617 0
+	b	.L915
+.LVL1291:
+.L924:
+	.loc 2 2566 0
+	ldrh	w2, [x4]
+	.loc 2 2565 0
+	stp	xzr, xzr, [x1]
+	.loc 2 2566 0
+	cmp	w2, w6
+	beq	.L923
+	.loc 2 2567 0
+	ubfiz	x5, x21, 5, 16
+	.loc 2 2568 0
+	add	w21, w21, 1
+.LVL1292:
+	.loc 2 2567 0
+	add	x5, x3, x5
+	.loc 2 2568 0
+	and	w21, w21, 65535
+.LVL1293:
+	.loc 2 2567 0
+	lsl	w2, w2, 10
+	str	w2, [x5, 4]
+.L923:
+	add	x1, x1, 32
+	add	x4, x4, 2
+	b	.L922
+.L928:
+	.loc 2 2578 0
+	mov	w0, 2
+	b	.L952
+.L927:
+	.loc 2 2582 0
+	ldr	x2, [x6, #:lo12:.LANCHOR40]
+	lsl	x0, x22, 1
+	ldrh	w1, [x2, x0]
+	add	w1, w1, 1
+	strh	w1, [x2, x0]
+	.loc 2 2583 0
+	ldr	w0, [x4, #:lo12:.LANCHOR74]
+	add	w0, w0, 1
+	str	w0, [x4, #:lo12:.LANCHOR74]
+.LVL1294:
+.LBB244:
+.LBB245:
+	mov	w0, w20
+	bl	ftl_set_blk_mode.part.7
+.LVL1295:
+	b	.L930
+.LVL1296:
+.L933:
+.LBE245:
+.LBE244:
+	.loc 2 2594 0 discriminator 3
+	ldr	w3, [x2]
+	and	w3, w3, -1024
+	str	w3, [x2], 32
+	b	.L932
+.LVL1297:
+.L936:
+	.loc 2 2598 0
+	ldr	x2, [x25, #:lo12:.LANCHOR112]
+	lsl	x0, x24, 5
+	add	x3, x2, x0
+	ldr	w2, [x2, x0]
+	cmn	w2, #1
+	bne	.L935
+	.loc 2 2599 0
+	add	w1, w1, 1
+.LVL1298:
+	.loc 2 2600 0
+	ldr	w0, [x3, 4]
+	.loc 2 2599 0
+	stp	w2, w1, [x29, 96]
+.LVL1299:
+	.loc 2 2601 0
+	lsr	w0, w0, 10
+	bl	FtlBbmMapBadBlock
+.LVL1300:
+	.loc 2 2603 0
+	ldp	w2, w1, [x29, 96]
+	.loc 2 2602 0
+	strh	w2, [x26]
+	.loc 2 2603 0
+	ldrb	w0, [x19, 7]
+	sub	w0, w0, #1
+	strb	w0, [x19, 7]
+.LVL1301:
+.L935:
+	add	x24, x24, 1
+.LVL1302:
+	add	x26, x26, 2
+	b	.L934
+.LVL1303:
+.L938:
+	.loc 2 2620 0
+	adrp	x1, .LANCHOR19
+	.loc 2 2624 0
+	adrp	x3, .LANCHOR71
+	.loc 2 2623 0
+	strb	wzr, [x19, 6]
+	.loc 2 2620 0
+	ldrh	w1, [x1, #:lo12:.LANCHOR19]
+	.loc 2 2622 0
+	strh	wzr, [x19, 2]
+	.loc 2 2621 0
+	strh	w20, [x19]
+	.loc 2 2620 0
+	mul	w0, w0, w1
+	.loc 2 2624 0
+	ldr	w1, [x3, #:lo12:.LANCHOR71]
+	str	w1, [x19, 12]
+	add	w1, w1, 1
+	str	w1, [x3, #:lo12:.LANCHOR71]
+	.loc 2 2625 0
+	ldr	x1, [x2, #:lo12:.LANCHOR43]
+	.loc 2 2620 0
+	and	w0, w0, 65535
+	strh	w0, [x19, 4]
+	.loc 2 2625 0
+	strh	w0, [x1, x22]
+	.loc 2 2626 0
+	ldrh	w0, [x19, 4]
+	cbz	w0, .L939
+	.loc 2 2626 0 is_stmt 0 discriminator 2
+	ldrb	w0, [x19, 7]
+	cbnz	w0, .L940
+.L939:
+	.loc 2 2626 0 discriminator 3
+	adrp	x1, .LANCHOR158
+	adrp	x0, .LC1
+	mov	w2, 2626
+	add	x1, x1, :lo12:.LANCHOR158
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1304:
+.L940:
+	.loc 2 2628 0 is_stmt 1
+	ldp	x19, x20, [sp, 16]
+.LVL1305:
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+.LVL1306:
+	ldp	x23, x24, [sp, 48]
+.LVL1307:
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE298:
+	.size	allocate_data_superblock, .-allocate_data_superblock
+	.section	.text.FtlGcFreeBadSuperBlk,"ax",@progbits
+	.align	2
+	.global	FtlGcFreeBadSuperBlk
+	.type	FtlGcFreeBadSuperBlk, %function
+FtlGcFreeBadSuperBlk:
+.LFB317:
+	.loc 5 390 0
+	.cfi_startproc
+.LVL1308:
+	stp	x29, x30, [sp, -96]!
+	.cfi_def_cfa_offset 96
+	.cfi_offset 29, -96
+	.cfi_offset 30, -88
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -64
+	.cfi_offset 22, -56
+	.loc 5 395 0
+	adrp	x21, .LANCHOR103
+	.loc 5 390 0
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 25, -32
+	.cfi_offset 26, -24
+	and	w25, w0, 65535
+	.loc 5 395 0
+	ldrh	w0, [x21, #:lo12:.LANCHOR103]
+.LVL1309:
+	.loc 5 390 0
+	stp	x19, x20, [sp, 16]
+	stp	x23, x24, [sp, 48]
+	str	x27, [sp, 80]
+	.cfi_offset 19, -80
+	.cfi_offset 20, -72
+	.cfi_offset 23, -48
+	.cfi_offset 24, -40
+	.cfi_offset 27, -16
+	.loc 5 395 0
+	cbz	w0, .L954
+.LBB248:
+.LBB249:
+	.loc 5 399 0
+	adrp	x23, .LANCHOR104
+	.loc 5 406 0
+	add	x24, x23, :lo12:.LANCHOR104
+.LBE249:
+.LBE248:
+	mov	w19, 0
+.L955:
+.LVL1310:
+.LBB252:
+.LBB250:
+	.loc 5 396 0
+	adrp	x0, .LANCHOR3
+	ldrh	w0, [x0, #:lo12:.LANCHOR3]
+	cmp	w0, w19
+	bhi	.L961
+	.loc 5 412 0
+	bl	FtlGcReFreshBadBlk
+.LVL1311:
+.L954:
+.LBE250:
+.LBE252:
+	.loc 5 415 0
+	mov	w0, 0
+	ldr	x27, [sp, 80]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+.LVL1312:
+	ldp	x29, x30, [sp], 96
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL1313:
+.L961:
+	.cfi_restore_state
+.LBB253:
+.LBB251:
+	.loc 5 397 0
+	adrp	x0, .LANCHOR13
+	add	x0, x0, :lo12:.LANCHOR13
+	mov	w1, w25
+	.loc 5 398 0
+	add	x22, x21, :lo12:.LANCHOR103
+	mov	w20, 0
+	.loc 5 397 0
+	ldrb	w0, [x0, w19, sxtw]
+	bl	V2P_block
+.LVL1314:
+	and	w26, w0, 65535
+.LVL1315:
+.L956:
+	.loc 5 398 0
+	ldrh	w0, [x22]
+	cmp	w0, w20
+	bhi	.L960
+	.loc 5 396 0
+	add	w19, w19, 1
+.LVL1316:
+	and	w19, w19, 65535
+.LVL1317:
+	b	.L955
+.L960:
+	.loc 5 399 0
+	add	x0, x23, :lo12:.LANCHOR104
+	add	w27, w20, 1
+	ldrh	w0, [x0, w20, sxtw 1]
+	cmp	w0, w26
+	bne	.L957
+	.loc 5 401 0
+	mov	w1, w26
+	adrp	x0, .LC97
+	add	x0, x0, :lo12:.LC97
+	bl	printf
+.LVL1318:
+	.loc 5 403 0
+	mov	w0, w26
+	bl	FtlBbmMapBadBlock
+.LVL1319:
+	.loc 5 404 0
+	bl	FtlBbmTblFlush
+.LVL1320:
+	.loc 5 405 0
+	ldrh	w1, [x22]
+	.loc 5 406 0
+	sxtw	x3, w27
+	and	x4, x20, 65535
+	.loc 5 405 0
+	mov	x0, 0
+.LVL1321:
+.L958:
+	add	w2, w20, w0
+	cmp	w1, w2, uxth
+	bhi	.L959
+	.loc 5 407 0
+	sub	w1, w1, #1
+	strh	w1, [x22]
+.LVL1322:
+.L957:
+	.loc 5 398 0
+	and	w20, w27, 65535
+.LVL1323:
+	b	.L956
+.LVL1324:
+.L959:
+	.loc 5 406 0
+	add	x2, x3, x0
+	ldrh	w5, [x24, x2, lsl 1]
+	add	x2, x4, x0
+	add	x0, x0, 1
+.LVL1325:
+	strh	w5, [x24, x2, lsl 1]
+	b	.L958
+.LBE251:
+.LBE253:
+	.cfi_endproc
+.LFE317:
+	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
+	.section	.text.update_vpc_list,"ax",@progbits
+	.align	2
+	.global	update_vpc_list
+	.type	update_vpc_list, %function
+update_vpc_list:
+.LFB301:
+	.loc 2 2687 0
+	.cfi_startproc
+.LVL1326:
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	.loc 2 2688 0
+	adrp	x1, .LANCHOR43
+	.loc 2 2687 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -16
+	.cfi_offset 20, -8
+	.loc 2 2687 0
+	and	w19, w0, 65535
+	.loc 2 2688 0
+	ldr	x1, [x1, #:lo12:.LANCHOR43]
+	ubfiz	x0, x19, 1, 16
+.LVL1327:
+	ldrh	w0, [x1, x0]
+	cbnz	w0, .L967
+	.loc 2 2689 0
+	adrp	x0, .LANCHOR82
+	ldrh	w1, [x0, #:lo12:.LANCHOR82]
+	cmp	w1, w19
+	bne	.L968
+	.loc 2 2691 0
+	mov	w1, -1
+	strh	w1, [x0, #:lo12:.LANCHOR82]
+.L969:
+.LVL1328:
+.LBB256:
+.LBB257:
+	.loc 2 2696 0
+	adrp	x20, .LANCHOR45
+	mov	w1, w19
+	adrp	x0, .LANCHOR42
+	add	x0, x0, :lo12:.LANCHOR42
+	bl	List_remove_node
+.LVL1329:
+	ldrh	w0, [x20, #:lo12:.LANCHOR45]
+	cbnz	w0, .L971
+	adrp	x1, .LANCHOR159
+	adrp	x0, .LC1
+	mov	w2, 2696
+	add	x1, x1, :lo12:.LANCHOR159
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1330:
+.L971:
+	ldrh	w0, [x20, #:lo12:.LANCHOR45]
+	sub	w0, w0, #1
+	strh	w0, [x20, #:lo12:.LANCHOR45]
+	.loc 2 2697 0
+	mov	w0, w19
+	bl	free_data_superblock
+.LVL1331:
+	.loc 2 2698 0
+	mov	w0, w19
+	bl	FtlGcFreeBadSuperBlk
+.LVL1332:
+	.loc 2 2699 0
+	adrp	x0, .LANCHOR48
+	ldrh	w1, [x20, #:lo12:.LANCHOR45]
+	ldrh	w0, [x0, #:lo12:.LANCHOR48]
+	add	w0, w0, w1
+	adrp	x1, .LANCHOR5
+	ldrh	w1, [x1, #:lo12:.LANCHOR5]
+	cmp	w0, w1
+	ble	.L975
+	adrp	x1, .LANCHOR159
+	adrp	x0, .LC1
+	mov	w2, 2699
+	add	x1, x1, :lo12:.LANCHOR159
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1333:
+.L975:
+	mov	w0, 1
+	b	.L966
+.LVL1334:
+.L968:
+.LBE257:
+.LBE256:
+	.loc 2 2692 0
+	adrp	x0, .LANCHOR51
+	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+	cmp	w0, w19
+	beq	.L974
+	.loc 2 2692 0 is_stmt 0 discriminator 1
+	adrp	x0, .LANCHOR52
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
+	cmp	w0, w19
+	beq	.L974
+	.loc 2 2692 0 discriminator 2
+	adrp	x0, .LANCHOR53
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+	cmp	w0, w19
+	bne	.L969
+.L974:
+	.loc 2 2694 0 is_stmt 1
+	mov	w0, 0
+.L966:
+	.loc 2 2705 0
+	ldp	x19, x20, [sp, 16]
+.LVL1335:
+	ldp	x29, x30, [sp], 32
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.L967:
+	.cfi_restore_state
+	.loc 2 2702 0
+	mov	w0, w19
+	bl	List_update_data_list
+.LVL1336:
+	b	.L974
+	.cfi_endproc
+.LFE301:
+	.size	update_vpc_list, .-update_vpc_list
+	.section	.text.decrement_vpc_count,"ax",@progbits
+	.align	2
+	.global	decrement_vpc_count
+	.type	decrement_vpc_count, %function
+decrement_vpc_count:
+.LFB302:
+	.loc 2 2708 0
+	.cfi_startproc
+.LVL1337:
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	and	w19, w0, 65535
+	str	x21, [sp, 32]
+	.cfi_offset 21, -16
+	.loc 2 2711 0
+	mov	w0, 65535
+.LVL1338:
+	cmp	w19, w0
+	beq	.L978
+	.loc 2 2712 0
+	adrp	x21, .LANCHOR43
+	ubfiz	x20, x19, 1, 16
+	ldr	x1, [x21, #:lo12:.LANCHOR43]
+	ldrh	w0, [x1, x20]
+	cbnz	w0, .L979
+	.loc 2 2713 0
+	mov	w2, 0
+	mov	w1, w19
+	adrp	x0, .LC98
+	add	x0, x0, :lo12:.LC98
+	bl	printf
+.LVL1339:
+	.loc 2 2714 0
+	ldr	x0, [x21, #:lo12:.LANCHOR43]
+	ldrh	w0, [x0, x20]
+	cbz	w0, .L980
+.L985:
+.LVL1340:
+	.loc 2 2715 0 discriminator 1
+	mov	w20, 0
+.LVL1341:
+.L977:
+	.loc 2 2733 0
+	mov	w0, w20
+	ldr	x21, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+.LVL1342:
+	ldp	x29, x30, [sp], 48
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL1343:
+.L980:
+	.cfi_restore_state
+	.loc 2 2714 0 discriminator 1
+	mov	w2, 2714
+	adrp	x1, .LANCHOR160
+	adrp	x0, .LC1
+	add	x1, x1, :lo12:.LANCHOR160
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1344:
+	b	.L985
+.L979:
+	.loc 2 2717 0
+	sub	w0, w0, #1
+	strh	w0, [x1, x20]
+.L978:
+	.loc 2 2721 0
+	adrp	x21, .LANCHOR151
+	mov	w1, 65535
+	ldrh	w0, [x21, #:lo12:.LANCHOR151]
+	cmp	w0, w1
+	bne	.L982
+	.loc 2 2722 0
+	strh	w19, [x21, #:lo12:.LANCHOR151]
+	b	.L985
+.L982:
+	.loc 2 2724 0
+	cmp	w19, w0
+	beq	.L985
+	.loc 2 2727 0
+	bl	update_vpc_list
+.LVL1345:
+	cmp	w0, 0
+	.loc 2 2730 0
+	adrp	x1, .LANCHOR41
+	adrp	x0, .LANCHOR42
+	.loc 2 2729 0
+	strh	w19, [x21, #:lo12:.LANCHOR151]
+	.loc 2 2727 0
+	cset	w20, ne
+.LVL1346:
+	.loc 2 2730 0
+	ldr	x1, [x1, #:lo12:.LANCHOR41]
+	ldr	x0, [x0, #:lo12:.LANCHOR42]
+	sub	x0, x0, x1
+	mov	x1, -6148914691236517206
+	asr	x0, x0, 1
+	movk	x1, 0xaaab, lsl 0
+	mul	x0, x0, x1
+	adrp	x1, .LANCHOR43
+	ldr	x1, [x1, #:lo12:.LANCHOR43]
+	and	x2, x0, 65535
+	ldrh	w1, [x1, x2, lsl 1]
+	cbnz	w1, .L977
+	.loc 2 2730 0 is_stmt 0 discriminator 1
+	cmp	w19, w0, uxth
+	beq	.L977
+	.loc 2 2730 0 discriminator 2
+	mov	w2, 2730
+	adrp	x1, .LANCHOR160
+	adrp	x0, .LC1
+	add	x1, x1, :lo12:.LANCHOR160
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1347:
+	b	.L977
+	.cfi_endproc
+.LFE302:
+	.size	decrement_vpc_count, .-decrement_vpc_count
+	.section	.text.FtlWriteDump_data,"ax",@progbits
+	.align	2
+	.global	FtlWriteDump_data
+	.type	FtlWriteDump_data, %function
+FtlWriteDump_data:
+.LFB268:
+	.loc 2 947 0 is_stmt 1
+	.cfi_startproc
+	stp	x29, x30, [sp, -128]!
+	.cfi_def_cfa_offset 128
+	.cfi_offset 29, -128
+	.cfi_offset 30, -120
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -112
+	.cfi_offset 20, -104
+	.loc 2 948 0
+	adrp	x19, .LANCHOR51
+	add	x0, x19, :lo12:.LANCHOR51
+	.loc 2 947 0
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	.loc 2 948 0
+	ldrh	w2, [x0, 4]
+	.loc 2 947 0
+	str	x25, [sp, 64]
+	.cfi_offset 21, -96
+	.cfi_offset 22, -88
+	.cfi_offset 23, -80
+	.cfi_offset 24, -72
+	.cfi_offset 25, -64
+	.loc 2 948 0
+	cbz	w2, .L987
+	.loc 2 948 0 is_stmt 0 discriminator 1
+	ldrb	w1, [x0, 8]
+	cbnz	w1, .L987
+	.loc 2 949 0 is_stmt 1
+	adrp	x3, .LANCHOR19
+	ldrb	w1, [x0, 7]
+	ldrh	w3, [x3, #:lo12:.LANCHOR19]
+	mul	w1, w1, w3
+	cmp	w2, w1
+	beq	.L987
+.LVL1348:
+.LBB261:
+.LBB262:
+	.loc 2 956 0
+	ldrb	w0, [x0, 10]
+	cbnz	w0, .L986
+	.loc 2 951 0
+	adrp	x0, .LANCHOR62
+	.loc 2 958 0
+	mov	w2, 0
+	add	x1, x29, 92
+	.loc 2 951 0
+	ldr	w21, [x0, #:lo12:.LANCHOR62]
+	.loc 2 953 0
+	adrp	x0, .LANCHOR3
+	.loc 2 951 0
+	sub	w21, w21, #1
+	.loc 2 953 0
+	ldrh	w25, [x0, #:lo12:.LANCHOR3]
+	.loc 2 958 0
+	mov	w0, w21
+	bl	log2phys
+.LVL1349:
+	.loc 2 964 0
+	adrp	x2, .LANCHOR109
+	.loc 2 963 0
+	adrp	x0, .LANCHOR39
+	.loc 2 961 0
+	ldr	w1, [x29, 92]
+	.loc 2 964 0
+	ldr	x20, [x2, #:lo12:.LANCHOR109]
+	.loc 2 963 0
+	ldr	x0, [x0, #:lo12:.LANCHOR39]
+	.loc 2 967 0
+	cmn	w1, #1
+	.loc 2 961 0
+	str	w1, [x29, 100]
+	.loc 2 964 0
+	stp	x0, x20, [x29, 104]
+.LVL1350:
+	.loc 2 962 0
+	str	w21, [x29, 120]
+	.loc 2 966 0
+	str	wzr, [x20, 4]
+	.loc 2 967 0
+	beq	.L989
+	.loc 2 969 0
+	mov	w2, 0
+	mov	w1, 1
+	add	x0, x29, 96
+	bl	FlashReadPages
+.LVL1351:
+.L990:
+	.loc 2 987 0
+	adrp	x23, .LANCHOR72
+	.loc 2 953 0
+	lsl	w25, w25, 2
+.LVL1352:
+	.loc 2 978 0
+	add	x22, x19, :lo12:.LANCHOR51
+	.loc 2 987 0
+	add	x23, x23, :lo12:.LANCHOR72
+	.loc 2 975 0
+	mov	w0, -3947
+	mov	w24, 0
+	strh	w0, [x20]
+.L991:
+	.loc 2 976 0
+	cmp	w25, w24
+	bne	.L995
+.L992:
+	.loc 2 992 0
+	add	x19, x19, :lo12:.LANCHOR51
+	mov	w0, 1
+	strb	w0, [x19, 10]
+.LVL1353:
+.L986:
+.LBE262:
+.LBE261:
+	.loc 2 1000 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 128
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 25
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL1354:
+.L989:
+	.cfi_restore_state
+.LBB264:
+.LBB263:
+	.loc 2 973 0
+	adrp	x1, .LANCHOR23
+	ldrh	w2, [x1, #:lo12:.LANCHOR23]
+	mov	w1, 255
+	bl	ftl_memset
+.LVL1355:
+	b	.L990
+.LVL1356:
+.L995:
+	.loc 2 978 0
+	ldrh	w0, [x22, 4]
+	cbz	w0, .L992
+	.loc 2 983 0
+	ldr	w0, [x29, 100]
+	add	w24, w24, 1
+	stp	w21, w0, [x20, 8]
+	.loc 2 984 0
+	ldrh	w0, [x22]
+	strh	w0, [x20, 2]
+	.loc 2 986 0
+	mov	x0, x22
+	bl	get_new_active_ppa
+.LVL1357:
+	str	w0, [x29, 100]
+	.loc 2 987 0
+	ldr	w0, [x23]
+	.loc 2 988 0
+	mov	w3, 0
+	.loc 2 987 0
+	str	w0, [x20, 4]
+	.loc 2 988 0
+	mov	w2, 0
+	.loc 2 987 0
+	add	w0, w0, 1
+	.loc 2 988 0
+	mov	w1, 1
+	.loc 2 987 0
+	cmn	w0, #1
+	csel	w0, w0, wzr, ne
+	str	w0, [x23]
+	.loc 2 988 0
+	add	x0, x29, 96
+	bl	FlashProgPages
+.LVL1358:
+	.loc 2 990 0
+	ldrh	w0, [x22]
+	bl	decrement_vpc_count
+.LVL1359:
+	b	.L991
+.LVL1360:
+.L987:
+.LBE263:
+.LBE264:
+	.loc 2 998 0
+	add	x19, x19, :lo12:.LANCHOR51
+	strb	wzr, [x19, 10]
+	.loc 2 1000 0
+	b	.L986
+	.cfi_endproc
+.LFE268:
+	.size	FtlWriteDump_data, .-FtlWriteDump_data
+	.section	.text.l2p_flush,"ax",@progbits
+	.align	2
+	.global	l2p_flush
+	.type	l2p_flush, %function
+l2p_flush:
+.LFB261:
+	.loc 2 740 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	.loc 2 746 0
+	adrp	x20, .LANCHOR33
+	add	x20, x20, :lo12:.LANCHOR33
+	.loc 2 740 0
+	str	x21, [sp, 32]
+	.cfi_offset 21, -16
+	.loc 2 746 0
+	mov	w19, 0
+	.loc 2 747 0
+	adrp	x21, .LANCHOR56
+	.loc 2 744 0
+	bl	FtlWriteDump_data
+.LVL1361:
+.L1005:
+	.loc 2 746 0 discriminator 1
+	ldrh	w0, [x20]
+	cmp	w0, w19
+	bhi	.L1007
+	.loc 2 750 0
+	mov	w0, 0
+	ldr	x21, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+.LVL1362:
+	ldp	x29, x30, [sp], 48
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL1363:
+.L1007:
+	.cfi_restore_state
+	.loc 2 747 0
+	ldr	x1, [x21, #:lo12:.LANCHOR56]
+	ubfiz	x0, x19, 4, 16
+	add	x0, x1, x0
+	ldr	w0, [x0, 4]
+	tbz	w0, #31, .L1006
+	.loc 2 748 0
+	mov	w0, w19
+	bl	flush_l2p_region
+.LVL1364:
+.L1006:
+	.loc 2 746 0 discriminator 2
+	add	w19, w19, 1
+.LVL1365:
+	and	w19, w19, 65535
+.LVL1366:
+	b	.L1005
+	.cfi_endproc
+.LFE261:
+	.size	l2p_flush, .-l2p_flush
+	.section	.text.FtlRecoverySuperblock,"ax",@progbits
+	.align	2
+	.global	FtlRecoverySuperblock
+	.type	FtlRecoverySuperblock, %function
+FtlRecoverySuperblock:
+.LFB281:
+	.loc 2 1656 0
+	.cfi_startproc
+.LVL1367:
+	stp	x29, x30, [sp, -192]!
+	.cfi_def_cfa_offset 192
+	.cfi_offset 29, -192
+	.cfi_offset 30, -184
+	.loc 2 1670 0
+	mov	w1, 65535
+	.loc 2 1656 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -176
+	.cfi_offset 20, -168
+	mov	x19, x0
+	stp	x21, x22, [sp, 32]
+	.loc 2 1670 0
+	ldrh	w0, [x0]
+.LVL1368:
+	.loc 2 1656 0
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	.loc 2 1670 0
+	cmp	w0, w1
+	.loc 2 1656 0
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 21, -160
+	.cfi_offset 22, -152
+	.cfi_offset 23, -144
+	.cfi_offset 24, -136
+	.cfi_offset 25, -128
+	.cfi_offset 26, -120
+	.cfi_offset 27, -112
+	.cfi_offset 28, -104
+	.loc 2 1670 0
+	beq	.L1133
+	.loc 2 1676 0
+	ldrb	w0, [x19, 6]
+	str	w0, [x29, 164]
+	.loc 2 1681 0
+	adrp	x0, .LANCHOR19
+	.loc 2 1675 0
+	ldrh	w26, [x19, 2]
+.LVL1369:
+	str	x0, [x29, 128]
+	.loc 2 1681 0
+	ldrh	w2, [x0, #:lo12:.LANCHOR19]
+	cmp	w2, w26
+	bne	.L1012
+	.loc 2 1682 0
+	strh	wzr, [x19, 4]
+.LVL1370:
+.L1139:
+	.loc 2 1709 0
+	strb	wzr, [x19, 6]
+.LVL1371:
+.L1133:
+	.loc 2 2010 0
+	ldp	x19, x20, [sp, 16]
+.LVL1372:
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 192
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL1373:
+.L1012:
+	.cfi_restore_state
+	.loc 2 1689 0
+	ldrh	w0, [x19, 16]
+.LVL1374:
+	.loc 2 1688 0
+	mov	w20, 0
+.LVL1375:
+.L1013:
+	.loc 2 1690 0
+	cmp	w0, w1
+	beq	.L1014
+	.loc 2 1697 0
+	mov	w1, 1
+	bl	FtlGetLastWrittenPage
+.LVL1376:
+	mov	w23, w0
+.LVL1377:
+	.loc 2 1705 0
+	cmn	w0, #1
+	beq	.L1015
+	.loc 2 1721 0
+	adrp	x1, .LANCHOR93
+	.loc 2 1717 0
+	adrp	x2, .LANCHOR3
+	.loc 2 1720 0
+	adrp	x20, .LANCHOR120
+.LVL1378:
+	.loc 2 1722 0
+	add	x4, x19, 16
+	.loc 2 1721 0
+	ldr	x5, [x1, #:lo12:.LANCHOR93]
+	adrp	x1, .LANCHOR23
+	.loc 2 1720 0
+	ldr	x0, [x20, #:lo12:.LANCHOR120]
+.LVL1379:
+	.loc 2 1722 0
+	mov	w22, 0
+	.loc 2 1721 0
+	ldrh	w6, [x1, #:lo12:.LANCHOR23]
+	.loc 2 1722 0
+	adrp	x1, .LANCHOR94
+	.loc 2 1719 0
+	mov	w10, 65535
+	str	x2, [x29, 152]
+	.loc 2 1722 0
+	ldr	x7, [x1, #:lo12:.LANCHOR94]
+	adrp	x1, .LANCHOR24
+	ldrh	w8, [x1, #:lo12:.LANCHOR24]
+	add	x1, x19, 16
+	str	x1, [x29, 168]
+	ldrh	w1, [x2, #:lo12:.LANCHOR3]
+	add	x1, x1, 8
+	add	x1, x19, x1, lsl 1
+.L1016:
+.LVL1380:
+	.loc 2 1717 0 discriminator 1
+	cmp	x4, x1
+	bne	.L1020
+	.loc 2 1727 0
+	mov	w2, 0
+	mov	w1, w22
+	bl	FlashReadPages
+.LVL1381:
+	.loc 2 1728 0
+	adrp	x0, .LANCHOR72
+	.loc 2 1730 0
+	ldr	x4, [x20, #:lo12:.LANCHOR120]
+	.loc 2 1742 0
+	and	w10, w23, 65535
+	.loc 2 1733 0
+	add	x7, x0, :lo12:.LANCHOR72
+	.loc 2 1728 0
+	ldr	w21, [x0, #:lo12:.LANCHOR72]
+	mov	x11, x4
+	.loc 2 1666 0
+	mov	w6, 65535
+	.loc 2 1729 0
+	mov	w3, 0
+	.loc 2 1728 0
+	sub	w21, w21, #1
+.LVL1382:
+	str	x0, [x29, 144]
+.LVL1383:
+.L1021:
+	.loc 2 1729 0 discriminator 1
+	cmp	w22, w3
+	bne	.L1026
+	.loc 2 1747 0
+	add	w22, w23, 1
+.LVL1384:
+	.loc 2 1749 0
+	ldr	w0, [x4, 4]
+	.loc 2 1747 0
+	and	w22, w22, 65535
+.LVL1385:
+.L1135:
+	.loc 2 1753 0
+	lsr	w0, w0, 10
+	bl	P2V_plane
+.LVL1386:
+	and	w27, w0, 65535
+.LVL1387:
+	.loc 2 1758 0
+	ldr	x0, [x29, 128]
+	ldrh	w0, [x0, #:lo12:.LANCHOR19]
+	cmp	w0, w22
+	bne	.L1028
+	.loc 2 1759 0
+	strh	w22, [x19, 2]
+	.loc 2 1760 0
+	strb	wzr, [x19, 6]
+	.loc 2 1761 0
+	strh	wzr, [x19, 4]
+.L1028:
+	.loc 2 1764 0
+	ldr	w0, [x29, 164]
+	cmp	w22, w26
+	cset	w1, eq
+	cmp	w27, w0
+	cset	w0, eq
+	tst	w1, w0
+	beq	.L1029
+.LVL1388:
+.L1140:
+	.loc 2 2004 0
+	mov	w2, w27
+	mov	w1, w22
+	mov	x0, x19
+	bl	ftl_sb_update_avl_pages
+.LVL1389:
+	b	.L1133
+.LVL1390:
+.L1014:
+	.loc 2 1691 0
+	add	w20, w20, 1
+.LVL1391:
+	and	w20, w20, 65535
+.LVL1392:
+	.loc 2 1692 0
+	add	x0, x19, x20, sxtw 1
+.LVL1393:
+	ldrh	w0, [x0, 16]
+.LVL1394:
+	b	.L1013
+.LVL1395:
+.L1015:
+	.loc 2 1706 0
+	cbz	w26, .L1017
+	.loc 2 1706 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR161
+	adrp	x0, .LC1
+.LVL1396:
+	mov	w2, 1706
+	add	x1, x1, :lo12:.LANCHOR161
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1397:
+.L1017:
+	.loc 2 1707 0 is_stmt 1
+	ldr	w0, [x29, 164]
+	cmp	w0, 0
+	ccmp	w20, w0, 4, ne
+	beq	.L1018
+	.loc 2 1707 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR161
+	adrp	x0, .LC1
+	mov	w2, 1707
+	add	x1, x1, :lo12:.LANCHOR161
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1398:
+.L1018:
+	.loc 2 1708 0 is_stmt 1
+	strh	wzr, [x19, 2]
+	b	.L1139
+.LVL1399:
+.L1020:
+	.loc 2 1718 0
+	ldrh	w3, [x4]
+.LVL1400:
+	.loc 2 1719 0
+	cmp	w3, w10
+	beq	.L1019
+	.loc 2 1720 0
+	ubfiz	x2, x22, 5, 16
+	orr	w3, w23, w3, lsl 10
+.LVL1401:
+	add	x2, x0, x2
+	str	w3, [x2, 4]
+	.loc 2 1721 0
+	mul	w3, w22, w6
+	asr	w3, w3, 2
+	add	x3, x5, x3, sxtw 2
+	str	x3, [x2, 8]
+	.loc 2 1722 0
+	mul	w3, w22, w8
+	.loc 2 1723 0
+	add	w22, w22, 1
+.LVL1402:
+	and	w22, w22, 65535
+.LVL1403:
+	.loc 2 1722 0
+	asr	w3, w3, 2
+	add	x3, x7, x3, sxtw 2
+	str	x3, [x2, 16]
+.L1019:
+	add	x4, x4, 2
+.LVL1404:
+	b	.L1016
+.LVL1405:
+.L1026:
+	.loc 2 1730 0
+	ldr	w0, [x11]
+	cbnz	w0, .L1022
+	.loc 2 1731 0
+	ldr	x8, [x11, 16]
+.LVL1406:
+	.loc 2 1732 0
+	ldr	w5, [x8, 4]
+	cmn	w5, #1
+	beq	.L1023
+	.loc 2 1733 0
+	ldr	w1, [x7]
+	mov	w0, w5
+	bl	ftl_cmp_data_ver
+.LVL1407:
+	cbz	w0, .L1023
+	.loc 2 1735 0
+	add	w5, w5, 1
+	str	w5, [x7]
+.L1023:
+	.loc 2 1738 0
+	ldr	w0, [x8]
+	cmn	w0, #1
+	bne	.L1025
+	.loc 2 1753 0
+	ubfiz	x3, x3, 5, 16
+.LVL1408:
+	.loc 2 1752 0
+	and	w22, w23, 65535
+.LVL1409:
+	.loc 2 1753 0
+	add	x3, x4, x3
+	ldr	w0, [x3, 4]
+	b	.L1135
+.LVL1410:
+.L1022:
+	.loc 2 1742 0
+	mov	w6, w10
+.LVL1411:
+.L1025:
+	.loc 2 1729 0 discriminator 2
+	add	w3, w3, 1
+.LVL1412:
+	add	x11, x11, 32
+	and	w3, w3, 65535
+.LVL1413:
+	b	.L1021
+.LVL1414:
+.L1029:
+	.loc 2 1770 0
+	mov	w0, 65535
+	cmp	w6, w0
+	bne	.L1030
+	.loc 2 1770 0 is_stmt 0 discriminator 1
+	ldrb	w0, [x19, 8]
+	cbnz	w0, .L1031
+.L1030:
+.LVL1415:
+.LBB265:
+	.loc 2 1775 0 is_stmt 1
+	adrp	x25, .LANCHOR154
+	.loc 2 1774 0
+	and	w28, w23, 65535
+.LVL1416:
+	.loc 2 1775 0
+	ldr	w0, [x25, #:lo12:.LANCHOR154]
+	cmn	w0, #1
+	bne	.L1032
+	.loc 2 1776 0
+	str	w21, [x25, #:lo12:.LANCHOR154]
+.L1032:
+.LVL1417:
+	.loc 2 1778 0
+	add	w0, w26, 7
+	cmp	w0, w23, uxth
+	bge	.L1082
+	.loc 2 1779 0
+	sub	w24, w28, #7
+	and	w24, w24, 65535
+.LVL1418:
+.L1033:
+	.loc 2 1782 0 discriminator 1
+	ldr	x0, [x29, 152]
+	.loc 2 1784 0 discriminator 1
+	mov	w3, 65535
+	mov	w5, 1
+	.loc 2 1782 0 discriminator 1
+	add	x4, x0, :lo12:.LANCHOR3
+.LVL1419:
+.L1034:
+	.loc 2 1780 0 discriminator 1
+	cmp	w24, w28
+	bhi	.L1044
+	ldrh	w1, [x4]
+	.loc 2 1785 0
+	mov	w23, 0
+	ldr	x0, [x20, #:lo12:.LANCHOR120]
+	add	x1, x1, 8
+	ldr	x2, [x29, 168]
+	add	x1, x19, x1, lsl 1
+	b	.L1045
+.LVL1420:
+.L1082:
+	mov	w24, w26
+	b	.L1033
+.LVL1421:
+.L1036:
+	.loc 2 1783 0
+	ldrh	w6, [x2]
+.LVL1422:
+	.loc 2 1784 0
+	cmp	w6, w3
+	beq	.L1035
+	.loc 2 1785 0
+	ubfiz	x7, x23, 5, 16
+	.loc 2 1786 0
+	add	w23, w23, 1
+.LVL1423:
+	.loc 2 1785 0
+	add	x7, x0, x7
+	.loc 2 1786 0
+	and	w23, w23, 65535
+.LVL1424:
+	.loc 2 1785 0
+	orr	w6, w24, w6, lsl 10
+.LVL1425:
+	str	w6, [x7, 4]
+.L1035:
+	add	x2, x2, 2
+.LVL1426:
+.L1045:
+	.loc 2 1782 0 discriminator 1
+	cmp	x2, x1
+	bne	.L1036
+	.loc 2 1789 0
+	mov	w1, w23
+	mov	w2, 0
+	str	w5, [x29, 112]
+	ubfiz	x23, x23, 5, 16
+.LVL1427:
+	str	w3, [x29, 120]
+	add	x23, x23, 16
+	str	x4, [x29, 136]
+	bl	FlashReadPages
+.LVL1428:
+	.loc 2 1791 0
+	ldr	x2, [x20, #:lo12:.LANCHOR120]
+	ldr	w1, [x25, #:lo12:.LANCHOR154]
+	.loc 2 1790 0
+	ldr	w5, [x29, 112]
+	add	x0, x2, 16
+	ldr	w3, [x29, 120]
+	add	x23, x2, x23
+	ldr	x4, [x29, 136]
+	mov	w2, 0
+.LVL1429:
+.L1037:
+	.loc 2 1790 0 is_stmt 0 discriminator 1
+	cmp	x23, x0
+	bne	.L1042
+	cbz	w2, .L1043
+	str	w1, [x25, #:lo12:.LANCHOR154]
+.L1043:
+	.loc 2 1780 0 is_stmt 1
+	add	w24, w24, 1
+.LVL1430:
+	and	w24, w24, 65535
+.LVL1431:
+	b	.L1034
+.L1042:
+	.loc 2 1791 0
+	ldr	w6, [x0, -16]
+	cbz	w6, .L1038
+	cbz	w2, .L1031
+	str	w1, [x25, #:lo12:.LANCHOR154]
+.LVL1432:
+.L1031:
+.LBE265:
+	.loc 2 1814 0
+	mov	w1, 1
+	adrp	x0, .LANCHOR162
+	.loc 2 1815 0
+	mov	w23, w26
+	.loc 2 1975 0
+	adrp	x28, .LANCHOR154
+	.loc 2 1814 0
+	strh	w1, [x0, #:lo12:.LANCHOR162]
+	.loc 2 1815 0
+	adrp	x0, .LANCHOR144
+	add	x0, x0, :lo12:.LANCHOR144
+	bl	FtlMapBlkWriteDump_data
+.LVL1433:
+.LBB266:
+	.loc 2 1897 0
+	add	x0, x28, :lo12:.LANCHOR154
+	str	x0, [x29, 104]
+.LVL1434:
+.L1046:
+	ldr	x1, [x29, 152]
+.LBE266:
+	.loc 2 1820 0
+	mov	w24, 0
+	.loc 2 1824 0
+	ldr	x0, [x20, #:lo12:.LANCHOR120]
+	.loc 2 1823 0
+	mov	w5, 65535
+	.loc 2 1821 0
+	ldr	x2, [x29, 168]
+	ldrh	w1, [x1, #:lo12:.LANCHOR3]
+	add	x1, x1, 8
+	add	x1, x19, x1, lsl 1
+.LVL1435:
+.L1047:
+	.loc 2 1821 0 is_stmt 0 discriminator 1
+	cmp	x1, x2
+	bne	.L1049
+	.loc 2 1828 0 is_stmt 1
+	mov	w2, 0
+	mov	w1, w24
+	bl	FlashReadPages
+.LVL1436:
+	.loc 2 1829 0
+	mov	x25, 0
+	ubfiz	x0, x24, 5, 16
+	str	x0, [x29, 112]
+	.loc 2 1969 0
+	adrp	x0, .LANCHOR163
+	add	x0, x0, :lo12:.LANCHOR163
+	str	x0, [x29, 120]
+.LVL1437:
+.L1050:
+	.loc 2 1829 0 discriminator 1
+	ldr	x0, [x29, 112]
+	cmp	x25, x0
+	bne	.L1076
+	.loc 2 1983 0
+	ldr	x0, [x29, 128]
+	.loc 2 1982 0
+	add	w23, w23, 1
+.LVL1438:
+	and	w23, w23, 65535
+.LVL1439:
+	.loc 2 1983 0
+	ldrh	w0, [x0, #:lo12:.LANCHOR19]
+	cmp	w0, w23
+	bne	.L1046
+	.loc 2 1986 0
+	ldr	x0, [x29, 152]
+	.loc 2 1988 0
+	mov	w2, 65535
+	.loc 2 1984 0
+	strh	w23, [x19, 2]
+	.loc 2 1985 0
+	strh	wzr, [x19, 4]
+.LVL1440:
+	.loc 2 1986 0
+	ldrh	w1, [x0, #:lo12:.LANCHOR3]
+	mov	w0, 0
+.LVL1441:
+.L1077:
+	.loc 2 1986 0 is_stmt 0 discriminator 1
+	cmp	w0, w1
+	beq	.L1133
+.LVL1442:
+	.loc 2 1988 0 is_stmt 1
+	ldr	x4, [x29, 168]
+	ldrh	w3, [x4], 2
+	str	x4, [x29, 168]
+.LVL1443:
+	cmp	w3, w2
+	beq	.L1078
+	.loc 2 1989 0
+	strb	w0, [x19, 6]
+.LVL1444:
+	.loc 2 1990 0
+	b	.L1133
+.LVL1445:
+.L1038:
+.LBB267:
+	.loc 2 1792 0
+	ldr	x6, [x0]
+.LVL1446:
+	.loc 2 1793 0
+	ldrh	w7, [x6]
+	cmp	w7, w3
+	beq	.L1041
+	.loc 2 1795 0
+	ldr	w6, [x6, 4]
+.LVL1447:
+	cmn	w6, #1
+	csel	w1, w1, w6, eq
+	csel	w2, w2, w5, eq
+.L1041:
+	add	x0, x0, 32
+.LVL1448:
+	b	.L1037
+.LVL1449:
+.L1044:
+	.loc 2 1809 0
+	mov	w0, -1
+	str	w0, [x25, #:lo12:.LANCHOR154]
+	b	.L1031
+.LVL1450:
+.L1049:
+.LBE267:
+	.loc 2 1822 0
+	ldrh	w3, [x2]
+.LVL1451:
+	.loc 2 1823 0
+	cmp	w3, w5
+	beq	.L1048
+	.loc 2 1824 0
+	ubfiz	x4, x24, 5, 16
+	.loc 2 1825 0
+	add	w24, w24, 1
+.LVL1452:
+	.loc 2 1824 0
+	add	x4, x0, x4
+	.loc 2 1825 0
+	and	w24, w24, 65535
+.LVL1453:
+	.loc 2 1824 0
+	orr	w3, w23, w3, lsl 10
+.LVL1454:
+	str	w3, [x4, 4]
+.L1048:
+	add	x2, x2, 2
+.LVL1455:
+	b	.L1047
+.LVL1456:
+.L1076:
+	.loc 2 1830 0
+	ldr	x4, [x20, #:lo12:.LANCHOR120]
+	add	x4, x4, x25
+	ldr	w5, [x4, 4]
+	str	w5, [x29, 188]
+	.loc 2 1831 0
+	lsr	w0, w5, 10
+	bl	P2V_plane
+.LVL1457:
+	and	w0, w0, 65535
+.LVL1458:
+	.loc 2 1833 0
+	cmp	w23, w26
+	bcc	.L1051
+	.loc 2 1833 0 is_stmt 0 discriminator 1
+	ldr	w1, [x29, 164]
+	ccmp	w1, w0, 0, eq
+	bhi	.L1051
+	.loc 2 1837 0 is_stmt 1
+	cmp	w23, w22
+	ccmp	w27, w0, 0, eq
+	beq	.L1052
+.LVL1459:
+	.loc 2 1841 0
+	ldr	w0, [x4]
+.LVL1460:
+	cmn	w0, #1
+	beq	.L1053
+	.loc 2 1842 0
+	ldr	x3, [x4, 16]
+.LVL1461:
+	.loc 2 1843 0
+	mov	w0, 61589
+	ldrh	w1, [x3]
+	cmp	w1, w0
+	beq	.L1054
+.LVL1462:
+.L1060:
+.LBB268:
+	.loc 2 1876 0
+	ldrh	w0, [x19]
+.LVL1463:
+.L1138:
+.LBE268:
+	.loc 2 1960 0
+	bl	decrement_vpc_count
+.LVL1464:
+.L1051:
+	add	x25, x25, 32
+	b	.L1050
+.LVL1465:
+.L1054:
+	.loc 2 1849 0
+	ldr	w21, [x3, 4]
+.LVL1466:
+	.loc 2 1850 0
+	cmn	w21, #1
+	beq	.L1055
+	.loc 2 1851 0 discriminator 1
+	ldr	x0, [x29, 144]
+	ldr	w1, [x0, #:lo12:.LANCHOR72]
+	mov	w0, w21
+	bl	ftl_cmp_data_ver
+.LVL1467:
+	.loc 2 1850 0 discriminator 1
+	cbz	w0, .L1055
+	.loc 2 1853 0
+	ldr	x1, [x29, 144]
+	add	w0, w21, 1
+	str	w0, [x1, #:lo12:.LANCHOR72]
+.L1055:
+	.loc 2 1858 0
+	ldp	w24, w0, [x3, 8]
+	.loc 2 1859 0
+	add	x1, x29, 184
+	.loc 2 1858 0
+	str	w0, [x29, 180]
+	.loc 2 1859 0
+	mov	w2, 0
+	mov	w0, w24
+	bl	log2phys
+.LVL1468:
+	.loc 2 1860 0
+	ldr	w1, [x28, #:lo12:.LANCHOR154]
+	cmn	w1, #1
+	beq	.L1056
+	.loc 2 1861 0 discriminator 1
+	mov	w0, w21
+	bl	ftl_cmp_data_ver
+.LVL1469:
+	.loc 2 1860 0 discriminator 1
+	cbz	w0, .L1056
+.LBB269:
+	.loc 2 1865 0
+	ldr	w1, [x29, 180]
+	cmn	w1, #1
+	beq	.L1057
+	.loc 2 1866 0
+	ldr	x0, [x20, #:lo12:.LANCHOR120]
+	.loc 2 1868 0
+	mov	w2, 0
+	.loc 2 1866 0
+	add	x0, x0, x25
+	ldr	x3, [x0, 16]
+	.loc 2 1867 0
+	str	w1, [x0, 4]
+	.loc 2 1868 0
+	mov	w1, 1
+	.loc 2 1866 0
+	str	x3, [x29, 136]
+.LVL1470:
+	.loc 2 1868 0
+	bl	FlashReadPages
+.LVL1471:
+	.loc 2 1881 0
+	ldr	x0, [x20, #:lo12:.LANCHOR120]
+	ldr	x3, [x29, 136]
+	add	x4, x0, x25
+	ldr	w0, [x0, x25]
+	cmn	w0, #1
+	bne	.L1058
+.LVL1472:
+.L1059:
+	.loc 2 1913 0
+	mov	w0, -1
+	str	w0, [x29, 180]
+	.loc 2 1914 0
+	ldrh	w0, [x19]
+	bl	decrement_vpc_count
+.LVL1473:
+.L1067:
+.LBE269:
+	.loc 2 1954 0
+	ldr	w3, [x29, 180]
+	cmn	w3, #1
+	beq	.L1051
+.L1081:
+	.loc 2 1956 0
+	lsr	w0, w3, 10
+	bl	P2V_block_in_plane
+.LVL1474:
+	and	w24, w0, 65535
+	.loc 2 1957 0
+	adrp	x0, .LANCHOR5
+	.loc 2 1956 0
+	mov	w3, w24
+.LVL1475:
+	.loc 2 1957 0
+	ldrh	w0, [x0, #:lo12:.LANCHOR5]
+	cmp	w0, w24
+	bhi	.L1072
+	.loc 2 1957 0 is_stmt 0 discriminator 1
+	mov	w2, 1957
+	adrp	x1, .LANCHOR161
+	adrp	x0, .LC1
+	add	x1, x1, :lo12:.LANCHOR161
+	add	x0, x0, :lo12:.LC1
+	str	w24, [x29, 136]
+	bl	printf
+.LVL1476:
+	ldr	w3, [x29, 136]
+.LVL1477:
+.L1072:
+	.loc 2 1958 0 is_stmt 1
+	adrp	x1, .LANCHOR43
+	ubfiz	x0, x24, 1, 16
+	ldr	x1, [x1, #:lo12:.LANCHOR43]
+	ldrh	w0, [x1, x0]
+	cbz	w0, .L1073
+	.loc 2 1960 0
+	mov	w0, w3
+	b	.L1138
+.LVL1478:
+.L1057:
+.LBB270:
+	.loc 2 1872 0
+	ldp	w1, w0, [x29, 184]
+	cmp	w1, w0
+	bne	.L1060
+	.loc 2 1873 0
+	mov	w2, 1
+	add	x1, x29, 180
+	mov	w0, w24
+	bl	log2phys
+.LVL1479:
+	b	.L1060
+.LVL1480:
+.L1058:
+	.loc 2 1881 0 discriminator 1
+	ldr	w0, [x3, 8]
+	cmp	w24, w0
+	bne	.L1059
+	.loc 2 1869 0 discriminator 2
+	ldr	w0, [x3, 4]
+	str	w0, [x29, 136]
+.LVL1481:
+	str	x3, [x29, 96]
+	.loc 2 1882 0 discriminator 2
+	uxtw	x1, w0
+	ldr	w0, [x28, #:lo12:.LANCHOR154]
+	bl	ftl_cmp_data_ver
+.LVL1482:
+	.loc 2 1881 0 discriminator 2
+	cbz	w0, .L1059
+	.loc 2 1883 0
+	ldp	w0, w1, [x29, 184]
+	ldr	x3, [x29, 96]
+	cmp	w0, w1
+	.loc 2 1885 0
+	ldr	w1, [x29, 180]
+	.loc 2 1883 0
+	bne	.L1062
+.L1136:
+	.loc 2 1909 0
+	mov	w0, w24
+	bl	FtlReUsePrevPpa
+.LVL1483:
+	b	.L1059
+.L1062:
+	.loc 2 1886 0
+	cmp	w0, w1
+	beq	.L1059
+	.loc 2 1887 0
+	cmn	w0, #1
+	beq	.L1063
+.LVL1484:
+	.loc 2 1888 0
+	ldr	x3, [x4, 16]
+	.loc 2 1890 0
+	mov	w2, 0
+	.loc 2 1889 0
+	str	w0, [x4, 4]
+	.loc 2 1890 0
+	mov	w1, 1
+	.loc 2 1888 0
+	str	x3, [x29, 96]
+	.loc 2 1890 0
+	mov	x0, x4
+	bl	FlashReadPages
+.LVL1485:
+	ldr	x3, [x29, 96]
+.LVL1486:
+.L1064:
+	.loc 2 1895 0
+	ldr	x0, [x20, #:lo12:.LANCHOR120]
+	ldr	w0, [x0, x25]
+	cmn	w0, #1
+	beq	.L1065
+	.loc 2 1897 0
+	ldr	x0, [x29, 104]
+	.loc 2 1896 0
+	ldr	w3, [x3, 4]
+.LVL1487:
+	.loc 2 1897 0
+	mov	w1, w3
+	ldr	w0, [x0]
+	bl	ftl_cmp_data_ver
+.LVL1488:
+	cbz	w0, .L1065
+	.loc 2 1898 0
+	ldr	w0, [x29, 136]
+	mov	w1, w3
+	bl	ftl_cmp_data_ver
+.LVL1489:
+	cbz	w0, .L1059
+.LVL1490:
+.L1065:
+	.loc 2 1909 0
+	ldr	w1, [x29, 180]
+	b	.L1136
+.L1063:
+	.loc 2 1892 0
+	str	w0, [x4]
+	b	.L1064
+.L1056:
+.LBE270:
+	.loc 2 1915 0
+	ldp	w1, w0, [x29, 184]
+	cmp	w1, w0
+	beq	.L1067
+	.loc 2 1917 0
+	mov	w2, 1
+	add	x1, x29, 188
+	mov	w0, w24
+	bl	log2phys
+.LVL1491:
+	.loc 2 1918 0
+	ldr	w3, [x29, 184]
+	cmn	w3, #1
+	beq	.L1067
+	.loc 2 1918 0 is_stmt 0 discriminator 1
+	ldr	w0, [x29, 180]
+	cmp	w3, w0
+	beq	.L1081
+	.loc 2 1919 0 is_stmt 1
+	lsr	w0, w3, 10
+	bl	P2V_block_in_plane
+.LVL1492:
+	.loc 2 1921 0
+	adrp	x1, .LANCHOR51
+	.loc 2 1919 0
+	and	w0, w0, 65535
+.LVL1493:
+	.loc 2 1921 0
+	ldrh	w1, [x1, #:lo12:.LANCHOR51]
+	cmp	w1, w0
+	beq	.L1071
+	.loc 2 1922 0 discriminator 1
+	adrp	x1, .LANCHOR52
+	.loc 2 1921 0 discriminator 1
+	ldrh	w1, [x1, #:lo12:.LANCHOR52]
+	cmp	w1, w0
+	beq	.L1071
+	.loc 2 1923 0
+	adrp	x1, .LANCHOR53
+	.loc 2 1922 0
+	ldrh	w1, [x1, #:lo12:.LANCHOR53]
+	cmp	w1, w0
+	bne	.L1067
+.L1071:
+.LVL1494:
+.LBB271:
+	.loc 2 1927 0
+	ldr	x0, [x20, #:lo12:.LANCHOR120]
+.LVL1495:
+	.loc 2 1930 0
+	mov	w2, 0
+	mov	w1, 1
+	.loc 2 1927 0
+	ldr	x4, [x0, 16]
+	.loc 2 1929 0
+	str	w3, [x0, 4]
+	.loc 2 1927 0
+	str	x4, [x29, 136]
+.LVL1496:
+	.loc 2 1930 0
+	bl	FlashReadPages
+.LVL1497:
+	.loc 2 1933 0
+	ldr	x0, [x20, #:lo12:.LANCHOR120]
+	ldr	w0, [x0]
+	cmn	w0, #1
+	beq	.L1067
+	.loc 2 1934 0
+	ldr	x4, [x29, 136]
+	mov	w0, w21
+	ldr	w1, [x4, 4]
+	bl	ftl_cmp_data_ver
+.LVL1498:
+	cbnz	w0, .L1067
+	.loc 2 1941 0
+	mov	w2, 1
+	add	x1, x29, 184
+	mov	w0, w24
+	bl	log2phys
+.LVL1499:
+	b	.L1067
+.LVL1500:
+.L1073:
+.LBE271:
+	.loc 2 1962 0
+	mov	w1, w24
+	adrp	x0, .LC99
+	add	x0, x0, :lo12:.LC99
+	bl	printf
+.LVL1501:
+	b	.L1051
+.LVL1502:
+.L1053:
+	.loc 2 1969 0
+	ldr	x0, [x29, 120]
+	ldr	w0, [x0]
+	cmp	w0, 31
+	bhi	.L1074
+	.loc 2 1970 0
+	adrp	x1, .LANCHOR164
+	add	x1, x1, :lo12:.LANCHOR164
+	str	w5, [x1, w0, uxtw 2]
+	.loc 2 1971 0
+	add	w0, w0, 1
+	ldr	x1, [x29, 120]
+	str	w0, [x1]
+.L1074:
+	.loc 2 1973 0
+	ldrh	w0, [x19]
+	bl	decrement_vpc_count
+.LVL1503:
+	.loc 2 1975 0
+	ldr	w0, [x28, #:lo12:.LANCHOR154]
+	cmn	w0, #1
+	bne	.L1075
+.L1137:
+	.loc 2 1978 0
+	str	w21, [x28, #:lo12:.LANCHOR154]
+	b	.L1051
+.L1075:
+	.loc 2 1977 0
+	cmp	w21, w0
+	bcs	.L1051
+	b	.L1137
+.LVL1504:
+.L1078:
+	.loc 2 1986 0 discriminator 2
+	add	w0, w0, 1
+.LVL1505:
+	and	w0, w0, 65535
+.LVL1506:
+	b	.L1077
+.LVL1507:
+.L1052:
+	.loc 2 2002 0
+	strb	w27, [x19, 6]
+	.loc 2 2003 0
+	strh	w22, [x19, 2]
+	b	.L1140
+	.cfi_endproc
+.LFE281:
+	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
+	.section	.text.FtlSuperblockPowerLostFix,"ax",@progbits
+	.align	2
+	.global	FtlSuperblockPowerLostFix
+	.type	FtlSuperblockPowerLostFix, %function
+FtlSuperblockPowerLostFix:
+.LFB288:
+	.loc 2 2156 0
+	.cfi_startproc
+.LVL1508:
+	stp	x29, x30, [sp, -96]!
+	.cfi_def_cfa_offset 96
+	.cfi_offset 29, -96
+	.cfi_offset 30, -88
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -80
+	.cfi_offset 20, -72
+	.loc 2 2178 0
+	adrp	x20, .LANCHOR72
+	.loc 2 2156 0
+	mov	x19, x0
+	.loc 2 2178 0
+	add	x20, x20, :lo12:.LANCHOR72
+	.loc 2 2156 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -64
+	.cfi_offset 22, -56
+	.loc 2 2162 0
+	mov	w21, 7
+	.loc 2 2156 0
+	str	x23, [sp, 48]
+	.cfi_offset 23, -48
+	.loc 2 2168 0
+	mov	w22, -1
+	.loc 2 2169 0
+	adrp	x23, .LANCHOR39
+.LVL1509:
+.L1142:
+	.loc 2 2162 0
+	subs	w21, w21, #1
+.LVL1510:
+	beq	.L1144
+.LVL1511:
+	.loc 2 2163 0
+	ldrh	w0, [x19, 4]
+	cbnz	w0, .L1143
+.LVL1512:
+.L1144:
+	.loc 2 2183 0
+	ldrh	w0, [x19]
+	adrp	x1, .LANCHOR43
+	ldrh	w3, [x19, 4]
+	ldr	x2, [x1, #:lo12:.LANCHOR43]
+	lsl	x0, x0, 1
+	ldrh	w1, [x2, x0]
+	sub	w1, w1, w3
+	strh	w1, [x2, x0]
+	.loc 2 2184 0
+	adrp	x0, .LANCHOR19
+	.loc 2 2185 0
+	strb	wzr, [x19, 6]
+	.loc 2 2186 0
+	strh	wzr, [x19, 4]
+	.loc 2 2184 0
+	ldrh	w0, [x0, #:lo12:.LANCHOR19]
+	strh	w0, [x19, 2]
+	.loc 2 2188 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+.LVL1513:
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 96
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 23
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL1514:
+.L1143:
+	.cfi_restore_state
+	.loc 2 2165 0
+	mov	x0, x19
+	bl	get_new_active_ppa
+.LVL1515:
+	str	w0, [x29, 68]
+	.loc 2 2166 0
+	cmn	w0, #1
+	beq	.L1144
+	.loc 2 2169 0
+	ldr	x0, [x23, #:lo12:.LANCHOR39]
+	.loc 2 2179 0
+	mov	w3, 0
+	.loc 2 2169 0
+	str	x0, [x29, 72]
+	.loc 2 2179 0
+	mov	w2, 0
+	.loc 2 2170 0
+	adrp	x0, .LANCHOR109
+	.loc 2 2168 0
+	str	w22, [x29, 88]
+	.loc 2 2170 0
+	ldr	x1, [x0, #:lo12:.LANCHOR109]
+	str	x1, [x29, 80]
+.LVL1516:
+	.loc 2 2175 0
+	ldrh	w0, [x19]
+	strh	w0, [x1, 2]
+	.loc 2 2178 0
+	ldr	w0, [x20]
+	.loc 2 2173 0
+	stp	w0, w22, [x1, 4]
+	.loc 2 2178 0
+	add	w0, w0, 1
+	.loc 2 2176 0
+	strh	wzr, [x1]
+	.loc 2 2178 0
+	cmn	w0, #1
+	.loc 2 2174 0
+	str	w22, [x1, 12]
+	.loc 2 2178 0
+	csel	w0, w0, wzr, ne
+	.loc 2 2179 0
+	mov	w1, 1
+.LVL1517:
+	.loc 2 2178 0
+	str	w0, [x20]
+	.loc 2 2179 0
+	add	x0, x29, 64
+	bl	FlashProgPages
+.LVL1518:
+	.loc 2 2180 0
+	ldrh	w0, [x19]
+	bl	decrement_vpc_count
+.LVL1519:
+	b	.L1142
+	.cfi_endproc
+.LFE288:
+	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
+	.section	.text.FtlLoadBbt,"ax",@progbits
+	.align	2
+	.global	FtlLoadBbt
+	.type	FtlLoadBbt, %function
+FtlLoadBbt:
+.LFB229:
+	.loc 4 173 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -80]!
+	.cfi_def_cfa_offset 80
+	.cfi_offset 29, -80
+	.cfi_offset 30, -72
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -32
+	.cfi_offset 24, -24
+	.loc 4 180 0
+	adrp	x23, .LANCHOR39
+	.loc 4 173 0
+	stp	x19, x20, [sp, 16]
+	.loc 4 184 0
+	adrp	x24, .LANCHOR17
+	.loc 4 173 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 19, -64
+	.cfi_offset 20, -56
+	.cfi_offset 21, -48
+	.cfi_offset 22, -40
+	.loc 4 180 0
+	adrp	x22, .LANCHOR108
+	add	x20, x22, :lo12:.LANCHOR108
+	ldr	x0, [x23, #:lo12:.LANCHOR39]
+	.loc 4 173 0
+	str	x25, [sp, 64]
+	.cfi_offset 25, -16
+	.loc 4 196 0
+	mov	w25, 61649
+	.loc 4 180 0
+	str	x0, [x20, 8]
+	.loc 4 181 0
+	adrp	x0, .LANCHOR109
+	ldr	x21, [x0, #:lo12:.LANCHOR109]
+	str	x21, [x20, 16]
+.LVL1520:
+	.loc 4 183 0
+	bl	FtlBbtMemInit
+.LVL1521:
+	.loc 4 184 0
+	ldrh	w19, [x24, #:lo12:.LANCHOR17]
+	add	x24, x24, :lo12:.LANCHOR17
+	sub	w19, w19, #1
+	and	w19, w19, 65535
+.LVL1522:
+.L1154:
+	.loc 4 184 0 is_stmt 0 discriminator 1
+	ldrh	w0, [x24]
+	sub	w0, w0, #15
+	cmp	w0, w19
+	bgt	.L1157
+	.loc 4 185 0 is_stmt 1
+	lsl	w0, w19, 10
+	.loc 4 186 0
+	mov	w2, 1
+	.loc 4 185 0
+	str	w0, [x20, 4]
+	.loc 4 186 0
+	mov	w1, w2
+	mov	x0, x20
+	bl	FlashReadPages
+.LVL1523:
+	.loc 4 187 0
+	ldr	w0, [x20]
+	cmn	w0, #1
+	bne	.L1155
+	.loc 4 188 0
+	ldr	w0, [x20, 4]
+	.loc 4 189 0
+	mov	w2, 1
+	mov	w1, w2
+	.loc 4 188 0
+	add	w0, w0, 1
+	str	w0, [x20, 4]
+	.loc 4 189 0
+	mov	x0, x20
+	bl	FlashReadPages
+.LVL1524:
+.L1155:
+	.loc 4 191 0
+	ldr	w0, [x20]
+	cmn	w0, #1
+	beq	.L1156
+	.loc 4 196 0
+	ldrh	w0, [x21]
+	cmp	w0, w25
+	bne	.L1156
+	.loc 4 198 0
+	adrp	x1, .LANCHOR37
+	add	x0, x1, :lo12:.LANCHOR37
+	strh	w19, [x1, #:lo12:.LANCHOR37]
+	.loc 4 199 0
+	ldr	w1, [x21, 4]
+	str	w1, [x0, 8]
+	.loc 4 200 0
+	ldrh	w1, [x21, 8]
+	strh	w1, [x0, 4]
+.L1157:
+	.loc 4 216 0
+	adrp	x19, .LANCHOR37
+.LVL1525:
+	mov	w0, 65535
+	add	x20, x19, :lo12:.LANCHOR37
+	ldrh	w1, [x19, #:lo12:.LANCHOR37]
+	cmp	w1, w0
+	beq	.L1171
+	.loc 4 222 0
+	ldrh	w1, [x20, 4]
+	cmp	w1, w0
+	beq	.L1161
+	.loc 4 224 0
+	add	x0, x22, :lo12:.LANCHOR108
+	lsl	w1, w1, 10
+	.loc 4 225 0
+	mov	w2, 1
+	.loc 4 224 0
+	str	w1, [x0, 4]
+	.loc 4 225 0
+	mov	w1, w2
+	bl	FlashReadPages
+.LVL1526:
+	.loc 4 226 0
+	ldr	w0, [x22, #:lo12:.LANCHOR108]
+	cmn	w0, #1
+	beq	.L1161
+	.loc 4 229 0
+	ldrh	w1, [x21]
+	mov	w0, 61649
+	cmp	w1, w0
+	bne	.L1161
+	.loc 4 229 0 is_stmt 0 discriminator 1
+	ldr	w1, [x20, 8]
+	ldr	w0, [x21, 4]
+	cmp	w0, w1
+	bls	.L1161
+	.loc 4 231 0 is_stmt 1
+	ldrh	w1, [x20, 4]
+	.loc 4 232 0
+	str	w0, [x20, 8]
+	.loc 4 233 0
+	ldrh	w0, [x21, 8]
+	.loc 4 231 0
+	strh	w1, [x19, #:lo12:.LANCHOR37]
+	.loc 4 233 0
+	strh	w0, [x20, 4]
+.L1161:
+	.loc 4 238 0
+	ldrh	w0, [x19, #:lo12:.LANCHOR37]
+	add	x24, x19, :lo12:.LANCHOR37
+	mov	w1, 1
+	.loc 4 247 0
+	mov	w25, 61649
+	.loc 4 238 0
+	bl	FtlGetLastWrittenPage
+.LVL1527:
+	sxth	w20, w0
+.LVL1528:
+	.loc 4 239 0
+	add	w0, w0, 1
+	strh	w0, [x24, 2]
+	.loc 4 243 0
+	add	x24, x22, :lo12:.LANCHOR108
+.L1163:
+	.loc 4 241 0
+	tbz	w20, #31, .L1166
+	.loc 4 254 0
+	adrp	x1, .LANCHOR165
+	adrp	x0, .LC1
+	mov	w2, 254
+	add	x1, x1, :lo12:.LANCHOR165
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1529:
+.L1165:
+	.loc 4 255 0
+	add	x0, x19, :lo12:.LANCHOR37
+	ldrh	w1, [x21, 10]
+	strh	w1, [x0, 6]
+	.loc 4 257 0
+	mov	w1, 65535
+	ldrh	w0, [x21, 12]
+	cmp	w0, w1
+	beq	.L1168
+	.loc 4 259 0
+	adrp	x1, .LANCHOR2
+	ldr	w2, [x1, #:lo12:.LANCHOR2]
+	cmp	w0, w2
+	beq	.L1168
+	.loc 4 259 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR6
+	ldrh	w1, [x1, #:lo12:.LANCHOR6]
+	lsr	w1, w1, 2
+	cmp	w2, w1
+	bcs	.L1168
+	.loc 4 261 0 is_stmt 1
+	cmp	w0, w1
+	bcs	.L1168
+	.loc 4 263 0
+	bl	FtlSysBlkNumInit
+.LVL1530:
+.L1168:
+	add	x19, x19, :lo12:.LANCHOR37
+	.loc 4 268 0 discriminator 1
+	adrp	x21, .LANCHOR10
+.LVL1531:
+	.loc 4 269 0 discriminator 1
+	adrp	x23, .LANCHOR137
+	add	x19, x19, 32
+	.loc 4 268 0 discriminator 1
+	add	x21, x21, :lo12:.LANCHOR10
+	.loc 4 269 0 discriminator 1
+	add	x23, x23, :lo12:.LANCHOR137
+	add	x22, x22, :lo12:.LANCHOR108
+	.loc 4 173 0 discriminator 1
+	mov	w20, 0
+.LVL1532:
+.L1169:
+	.loc 4 268 0 discriminator 1
+	ldrh	w0, [x21]
+	cmp	w20, w0
+	bcc	.L1170
+	.loc 4 275 0
+	mov	w0, 0
+.LVL1533:
+.L1153:
+	.loc 4 276 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 25
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL1534:
+.L1156:
+	.cfi_restore_state
+	.loc 4 184 0 discriminator 2
+	sub	w19, w19, #1
+.LVL1535:
+	and	w19, w19, 65535
+.LVL1536:
+	b	.L1154
+.LVL1537:
+.L1166:
+	.loc 4 243 0
+	ldrh	w0, [x19, #:lo12:.LANCHOR37]
+	.loc 4 245 0
+	mov	w2, 1
+	mov	w1, w2
+	.loc 4 243 0
+	orr	w0, w20, w0, lsl 10
+	str	w0, [x24, 4]
+	.loc 4 244 0
+	ldr	x0, [x23, #:lo12:.LANCHOR39]
+	str	x0, [x24, 8]
+	.loc 4 245 0
+	mov	x0, x24
+	bl	FlashReadPages
+.LVL1538:
+	.loc 4 247 0
+	ldr	w0, [x24]
+	cmn	w0, #1
+	beq	.L1164
+	.loc 4 247 0 is_stmt 0 discriminator 1
+	ldrh	w0, [x21]
+	cmp	w0, w25
+	beq	.L1165
+.L1164:
+	sub	w20, w20, #1
+.LVL1539:
+	sxth	w20, w20
+.LVL1540:
+	b	.L1163
+.LVL1541:
+.L1170:
+	.loc 4 269 0 is_stmt 1 discriminator 3
+	ldrh	w2, [x23]
+	ldr	x0, [x22, 8]
+	mul	w1, w2, w20
+	lsl	w2, w2, 2
+	.loc 4 268 0 discriminator 3
+	add	w20, w20, 1
+.LVL1542:
+	.loc 4 269 0 discriminator 3
+	add	x1, x0, x1, lsl 2
+	ldr	x0, [x19], 8
+	bl	ftl_memcpy
+.LVL1543:
+	b	.L1169
+.LVL1544:
+.L1171:
+	.loc 4 218 0
+	mov	w0, -1
+	b	.L1153
+	.cfi_endproc
+.LFE229:
+	.size	FtlLoadBbt, .-FtlLoadBbt
+	.section	.text.FtlMakeBbt,"ax",@progbits
+	.align	2
+	.global	FtlMakeBbt
+	.type	FtlMakeBbt, %function
+FtlMakeBbt:
+.LFB231:
+	.loc 4 317 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -128]!
+	.cfi_def_cfa_offset 128
+	.cfi_offset 29, -128
+	.cfi_offset 30, -120
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -96
+	.cfi_offset 22, -88
+	.loc 4 327 0
+	mov	w22, 0
+	.loc 4 317 0
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -112
+	.cfi_offset 20, -104
+	adrp	x20, .LANCHOR37
+	stp	x23, x24, [sp, 48]
+	add	x21, x20, :lo12:.LANCHOR37
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 23, -80
+	.cfi_offset 24, -72
+	.cfi_offset 25, -64
+	.cfi_offset 26, -56
+	add	x24, x21, 32
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 27, -48
+	.cfi_offset 28, -40
+	.loc 4 325 0
+	bl	FtlBbtMemInit
+.LVL1545:
+	.loc 4 326 0
+	bl	FtlLoadFactoryBbt
+.LVL1546:
+	.loc 4 328 0
+	adrp	x28, .LANCHOR108
+	add	x21, x21, 12
+	.loc 4 356 0
+	add	x25, x28, :lo12:.LANCHOR108
+	.loc 4 327 0
+	adrp	x0, .LANCHOR10
+	add	x0, x0, :lo12:.LANCHOR10
+	str	x0, [x29, 120]
+.LVL1547:
+.L1184:
+	.loc 4 327 0 is_stmt 0 discriminator 1
+	ldr	x0, [x29, 120]
+	ldrh	w0, [x0]
+	cmp	w22, w0
+	bcc	.L1190
+	.loc 4 381 0 is_stmt 1 discriminator 1
+	adrp	x21, .LANCHOR25
+	add	x21, x21, :lo12:.LANCHOR25
+	mov	w19, 0
+.L1191:
+.LVL1548:
+	ldrh	w0, [x21]
+	cmp	w0, w19
+	bhi	.L1192
+	.loc 4 387 0
+	add	x21, x20, :lo12:.LANCHOR37
+	.loc 4 396 0
+	mov	w22, 65535
+.LVL1549:
+	.loc 4 387 0
+	ldrh	w19, [x21, 12]
+.LVL1550:
+	sub	w19, w19, #1
+	and	w19, w19, 65535
+.LVL1551:
+.L1193:
+	.loc 4 387 0 is_stmt 0 discriminator 1
+	ldrh	w0, [x21, 12]
+	sub	w0, w0, #47
+	cmp	w0, w19
+	bgt	.L1197
+	.loc 4 389 0 is_stmt 1
+	mov	w0, w19
+	bl	FtlBbmIsBadBlock
+.LVL1552:
+	cmp	w0, 1
+	beq	.L1194
+	.loc 4 391 0
+	mov	w0, w19
+	bl	FlashTestBlk
+.LVL1553:
+	cbz	w0, .L1195
+	.loc 4 393 0
+	mov	w0, w19
+	bl	FtlBbmMapBadBlock
+.LVL1554:
+.L1194:
+	.loc 4 387 0 discriminator 2
+	sub	w19, w19, #1
+.LVL1555:
+	and	w19, w19, 65535
+.LVL1556:
+	b	.L1193
+.LVL1557:
+.L1190:
+	.loc 4 329 0
+	adrp	x2, .LANCHOR109
+	.loc 4 328 0
+	adrp	x0, .LANCHOR39
+	add	x19, x28, :lo12:.LANCHOR108
+	.loc 4 331 0
+	ldrh	w1, [x21]
+	.loc 4 328 0
+	ldr	x0, [x0, #:lo12:.LANCHOR39]
+	.loc 4 331 0
+	mov	w3, 65535
+	.loc 4 329 0
+	ldr	x26, [x2, #:lo12:.LANCHOR109]
+	.loc 4 331 0
+	cmp	w1, w3
+	.loc 4 329 0
+	stp	x0, x26, [x19, 8]
+.LVL1558:
+	adrp	x23, .LANCHOR17
+	str	x2, [x29, 112]
+	.loc 4 331 0
+	beq	.L1185
+	.loc 4 333 0
+	ldrh	w4, [x23, #:lo12:.LANCHOR17]
+	.loc 4 335 0
+	mov	w2, 1
+	.loc 4 333 0
+	madd	w27, w4, w22, w1
+.LVL1559:
+	.loc 4 335 0
+	mov	w1, w2
+	.loc 4 334 0
+	lsl	w0, w27, 10
+	str	w0, [x19, 4]
+	.loc 4 335 0
+	mov	x0, x19
+	bl	FlashReadPages
+.LVL1560:
+	.loc 4 336 0
+	ldr	x1, [x19, 8]
+	ldr	x0, [x24]
+	ldrh	w2, [x23, #:lo12:.LANCHOR17]
+	add	w2, w2, 7
+	lsr	w2, w2, 3
+	bl	ftl_memcpy
+.LVL1561:
+.L1186:
+	.loc 4 376 0 discriminator 2
+	mov	w0, w27
+	.loc 4 327 0 discriminator 2
+	add	w22, w22, 1
+.LVL1562:
+	.loc 4 376 0 discriminator 2
+	bl	FtlBbmMapBadBlock
+.LVL1563:
+	add	x24, x24, 8
+	add	x21, x21, 2
+	b	.L1184
+.LVL1564:
+.L1185:
+	.loc 4 340 0
+	mov	w1, w22
+	bl	FlashGetBadBlockList
+.LVL1565:
+	.loc 4 341 0
+	ldr	x0, [x19, 8]
+	ldr	x1, [x24]
+	bl	FtlBbt2Bitmap
+.LVL1566:
+	.loc 4 343 0
+	ldrh	w19, [x23, #:lo12:.LANCHOR17]
+	.loc 4 345 0
+	add	x23, x23, :lo12:.LANCHOR17
+	.loc 4 357 0
+	adrp	x0, .LANCHOR137
+	.loc 4 343 0
+	sub	w19, w19, #1
+	.loc 4 357 0
+	add	x0, x0, :lo12:.LANCHOR137
+	.loc 4 343 0
+	and	w19, w19, 65535
+.LVL1567:
+	.loc 4 357 0
+	str	x0, [x29, 104]
+.L1187:
+	.loc 4 345 0
+	ldrh	w0, [x23]
+	madd	w0, w22, w0, w19
+	bl	FtlBbmIsBadBlock
+.LVL1568:
+	cmp	w0, 1
+	beq	.L1188
+	.loc 4 350 0
+	ldr	x0, [x29, 112]
+	mov	w2, 16
+	.loc 4 349 0
+	strh	w19, [x21]
+	.loc 4 350 0
+	mov	w1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR109]
+	bl	ftl_memset
+.LVL1569:
+	.loc 4 351 0
+	adrp	x0, .LANCHOR39
+	mov	w2, 4096
+	mov	w1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR39]
+	bl	ftl_memset
+.LVL1570:
+	.loc 4 352 0
+	mov	w0, -3872
+	strh	w0, [x26]
+	.loc 4 355 0
+	ldrh	w4, [x23]
+	.loc 4 354 0
+	ldrh	w0, [x21]
+	strh	w0, [x26, 2]
+	.loc 4 357 0
+	ldr	x1, [x24]
+	.loc 4 353 0
+	str	wzr, [x26, 4]
+	.loc 4 355 0
+	madd	w27, w4, w22, w0
+.LVL1571:
+	.loc 4 356 0
+	lsl	w0, w27, 10
+	str	w0, [x25, 4]
+	.loc 4 357 0
+	ldr	x0, [x29, 104]
+	ldrh	w2, [x0]
+	ldr	x0, [x25, 8]
+	lsl	w2, w2, 2
+	bl	ftl_memcpy
+.LVL1572:
+	.loc 4 358 0
+	mov	w2, 1
+	mov	x0, x25
+	mov	w1, w2
+	bl	FlashEraseBlocks
+.LVL1573:
+	.loc 4 359 0
+	mov	w3, 1
+	mov	x0, x25
+	mov	w2, w3
+	mov	w1, w3
+	bl	FlashProgPages
+.LVL1574:
+	.loc 4 360 0
+	ldr	w0, [x25]
+	cmn	w0, #1
+	bne	.L1186
+	.loc 4 362 0
+	mov	w0, w27
+	bl	FtlBbmMapBadBlock
+.LVL1575:
+	.loc 4 363 0
+	b	.L1187
+.LVL1576:
+.L1188:
+	.loc 4 347 0
+	sub	w19, w19, #1
+.LVL1577:
+	and	w19, w19, 65535
+.LVL1578:
+	b	.L1187
+.LVL1579:
+.L1192:
+	.loc 4 383 0 discriminator 3
+	mov	w0, w19
+	.loc 4 381 0 discriminator 3
+	add	w19, w19, 1
+.LVL1580:
+	.loc 4 383 0 discriminator 3
+	bl	FtlBbmMapBadBlock
+.LVL1581:
+	.loc 4 381 0 discriminator 3
+	and	w19, w19, 65535
+.LVL1582:
+	b	.L1191
+.LVL1583:
+.L1195:
+	.loc 4 396 0
+	ldrh	w0, [x21]
+	cmp	w0, w22
+	bne	.L1196
+	.loc 4 398 0
+	strh	w19, [x21]
+	b	.L1194
+.L1196:
+	.loc 4 402 0
+	strh	w19, [x21, 4]
+.L1197:
+	.loc 4 414 0
+	adrp	x0, .LANCHOR112
+	.loc 4 411 0
+	add	x19, x20, :lo12:.LANCHOR37
+.LVL1584:
+	.loc 4 414 0
+	ldrh	w1, [x20, #:lo12:.LANCHOR37]
+	.loc 4 416 0
+	mov	w2, 2
+	.loc 4 414 0
+	ldr	x0, [x0, #:lo12:.LANCHOR112]
+	.loc 4 413 0
+	str	wzr, [x19, 8]
+	.loc 4 414 0
+	lsl	w1, w1, 10
+	.loc 4 411 0
+	strh	wzr, [x19, 2]
+	.loc 4 414 0
+	str	w1, [x0, 4]
+	.loc 4 415 0
+	ldrh	w1, [x19, 4]
+	lsl	w1, w1, 10
+	str	w1, [x0, 36]
+	.loc 4 416 0
+	mov	w1, 1
+	bl	FlashEraseBlocks
+.LVL1585:
+	.loc 4 418 0
+	ldrh	w0, [x20, #:lo12:.LANCHOR37]
+	bl	FtlBbmMapBadBlock
+.LVL1586:
+	.loc 4 419 0
+	ldrh	w0, [x19, 4]
+	bl	FtlBbmMapBadBlock
+.LVL1587:
+	.loc 4 421 0
+	bl	FtlBbmTblFlush
+.LVL1588:
+	.loc 4 426 0
+	strh	wzr, [x19, 2]
+	.loc 4 422 0
+	ldr	w0, [x19, 8]
+	.loc 4 425 0
+	ldrh	w1, [x19, 4]
+	.loc 4 422 0
+	add	w0, w0, 1
+	str	w0, [x19, 8]
+	.loc 4 424 0
+	ldrh	w0, [x20, #:lo12:.LANCHOR37]
+.LVL1589:
+	.loc 4 427 0
+	strh	w0, [x19, 4]
+	.loc 4 425 0
+	strh	w1, [x20, #:lo12:.LANCHOR37]
+	.loc 4 429 0
+	bl	FtlBbmTblFlush
+.LVL1590:
+	.loc 4 432 0
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE231:
+	.size	FtlMakeBbt, .-FtlMakeBbt
+	.section	.text.FtlVendorPartWrite,"ax",@progbits
+	.align	2
+	.global	FtlVendorPartWrite
+	.type	FtlVendorPartWrite, %function
+FtlVendorPartWrite:
+.LFB263:
+	.loc 2 786 0
+	.cfi_startproc
+.LVL1591:
+	stp	x29, x30, [sp, -208]!
+	.cfi_def_cfa_offset 208
+	.cfi_offset 29, -208
+	.cfi_offset 30, -200
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -192
+	.cfi_offset 20, -184
+	mov	w20, w1
+	stp	x27, x28, [sp, 80]
+	.loc 2 794 0
+	add	w1, w0, w1
+.LVL1592:
+	.cfi_offset 27, -128
+	.cfi_offset 28, -120
+	.loc 2 786 0
+	mov	w28, w0
+.LVL1593:
+	.loc 2 794 0
+	adrp	x0, .LANCHOR16
+.LVL1594:
+	.loc 2 786 0
+	stp	x21, x22, [sp, 32]
+	.loc 2 794 0
+	ldrh	w0, [x0, #:lo12:.LANCHOR16]
+	.loc 2 786 0
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 21, -176
+	.cfi_offset 22, -168
+	.cfi_offset 23, -160
+	.cfi_offset 24, -152
+	.cfi_offset 25, -144
+	.cfi_offset 26, -136
+	.loc 2 794 0
+	cmp	w1, w0
+	bhi	.L1211
+	.loc 2 791 0
+	adrp	x0, .LANCHOR22
+	.loc 2 799 0
+	adrp	x25, .LANCHOR12
+	.loc 2 809 0
+	adrp	x26, .LANCHOR23
+	mov	x24, x2
+	.loc 2 791 0
+	ldrh	w21, [x0, #:lo12:.LANCHOR22]
+	.loc 2 799 0
+	add	x25, x25, :lo12:.LANCHOR12
+	.loc 2 809 0
+	add	x26, x26, :lo12:.LANCHOR23
+	.loc 2 791 0
+	mov	w23, 0
+	lsr	w21, w28, w21
+.LVL1595:
+.L1205:
+	.loc 2 797 0
+	cbnz	w20, .L1210
+.LVL1596:
+.L1203:
+	.loc 2 820 0
+	mov	w0, w23
+	ldp	x19, x20, [sp, 16]
+.LVL1597:
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+.LVL1598:
+	ldp	x29, x30, [sp], 208
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL1599:
+.L1210:
+	.cfi_restore_state
+	.loc 2 799 0
+	ldrh	w1, [x25]
+	.loc 2 798 0
+	adrp	x0, .LANCHOR133
+	adrp	x27, .LANCHOR124
+	ldr	x0, [x0, #:lo12:.LANCHOR133]
+	.loc 2 799 0
+	udiv	w22, w28, w1
+	.loc 2 798 0
+	ldr	w2, [x0, w21, uxtw 2]
+.LVL1600:
+	.loc 2 802 0
+	and	w0, w20, 65535
+	.loc 2 799 0
+	msub	w22, w22, w1, w28
+.LVL1601:
+	.loc 2 800 0
+	sub	w19, w1, w22
+	and	w19, w19, 65535
+.LVL1602:
+	.loc 2 802 0
+	cmp	w20, w19
+	csel	w19, w0, w19, cc
+.LVL1603:
+	.loc 2 803 0
+	cbz	w2, .L1207
+	.loc 2 803 0 is_stmt 0 discriminator 1
+	cmp	w19, w1
+	beq	.L1207
+	.loc 2 805 0 is_stmt 1
+	ldr	x0, [x27, #:lo12:.LANCHOR124]
+	str	x0, [x29, 120]
+	.loc 2 806 0
+	add	x0, x29, 144
+	.loc 2 804 0
+	str	w2, [x29, 116]
+	.loc 2 807 0
+	mov	w2, 1
+.LVL1604:
+	.loc 2 806 0
+	str	x0, [x29, 128]
+	.loc 2 807 0
+	mov	w1, w2
+	add	x0, x29, 112
+.LVL1605:
+	bl	FlashReadPages
+.LVL1606:
+.L1208:
+	.loc 2 811 0
+	lsl	w4, w19, 9
+	ldr	x0, [x27, #:lo12:.LANCHOR124]
+	lsl	w22, w22, 7
+.LVL1607:
+	mov	w2, w4
+	mov	x1, x24
+	str	w4, [x29, 108]
+	add	x0, x0, x22, sxtw 2
+	bl	ftl_memcpy
+.LVL1608:
+	.loc 2 812 0
+	ldr	x2, [x27, #:lo12:.LANCHOR124]
+	mov	w1, w21
+	adrp	x0, .LANCHOR149
+	add	x0, x0, :lo12:.LANCHOR149
+	.loc 2 815 0
+	sub	w20, w20, w19
+.LVL1609:
+	.loc 2 816 0
+	add	w28, w28, w19
+.LVL1610:
+	.loc 2 814 0
+	add	w21, w21, 1
+.LVL1611:
+	.loc 2 812 0
+	bl	FtlMapWritePage
+.LVL1612:
+	.loc 2 813 0
+	cmn	w0, #1
+	.loc 2 817 0
+	ldr	w4, [x29, 108]
+	.loc 2 813 0
+	csinv	w23, w23, wzr, ne
+.LVL1613:
+	.loc 2 817 0
+	add	x24, x24, x4, sxtw
+.LVL1614:
+	b	.L1205
+.LVL1615:
+.L1207:
+	.loc 2 809 0
+	ldrh	w2, [x26]
+.LVL1616:
+	mov	w1, 0
+	ldr	x0, [x27, #:lo12:.LANCHOR124]
+	bl	ftl_memset
+.LVL1617:
+	b	.L1208
+.LVL1618:
+.L1211:
+	.loc 2 795 0
+	mov	w23, -1
+	b	.L1203
+	.cfi_endproc
+.LFE263:
+	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
+	.section	.text.Ftl_save_ext_data,"ax",@progbits
+	.align	2
+	.global	Ftl_save_ext_data
+	.type	Ftl_save_ext_data, %function
+Ftl_save_ext_data:
+.LFB286:
+	.loc 2 2110 0
+	.cfi_startproc
+	.loc 2 2111 0
+	adrp	x0, .LANCHOR83
+	add	x2, x0, :lo12:.LANCHOR83
+	ldr	w1, [x0, #:lo12:.LANCHOR83]
+	mov	w0, 19539
+	movk	w0, 0x4654, lsl 16
+	cmp	w1, w0
+	bne	.L1216
+.LBB274:
+.LBB275:
+	.loc 2 2112 0
+	mov	w0, 64
+	.loc 2 2125 0
+	mov	w1, 1
+	.loc 2 2112 0
+	movk	w0, 0x5000, lsl 16
+	str	w0, [x2, 4]
+	.loc 2 2113 0
+	adrp	x0, .LANCHOR69
+	ldr	w0, [x0, #:lo12:.LANCHOR69]
+	str	w0, [x2, 88]
+	.loc 2 2114 0
+	adrp	x0, .LANCHOR70
+	ldr	w0, [x0, #:lo12:.LANCHOR70]
+	str	w0, [x2, 92]
+	.loc 2 2115 0
+	adrp	x0, .LANCHOR68
+	ldr	w0, [x0, #:lo12:.LANCHOR68]
+	str	w0, [x2, 8]
+	.loc 2 2116 0
+	adrp	x0, .LANCHOR65
+	ldr	w0, [x0, #:lo12:.LANCHOR65]
+	str	w0, [x2, 12]
+	.loc 2 2117 0
+	adrp	x0, .LANCHOR63
+	ldr	w0, [x0, #:lo12:.LANCHOR63]
+	str	w0, [x2, 16]
+	.loc 2 2118 0
+	adrp	x0, .LANCHOR67
+	ldr	w0, [x0, #:lo12:.LANCHOR67]
+	str	w0, [x2, 20]
+	.loc 2 2119 0
+	adrp	x0, .LANCHOR74
+	ldr	w0, [x0, #:lo12:.LANCHOR74]
+	str	w0, [x2, 28]
+	.loc 2 2120 0
+	adrp	x0, .LANCHOR76
+	ldr	w0, [x0, #:lo12:.LANCHOR76]
+	str	w0, [x2, 32]
+	.loc 2 2121 0
+	adrp	x0, .LANCHOR64
+	ldr	w0, [x0, #:lo12:.LANCHOR64]
+	str	w0, [x2, 36]
+	.loc 2 2122 0
+	adrp	x0, .LANCHOR66
+	ldr	w0, [x0, #:lo12:.LANCHOR66]
+	str	w0, [x2, 40]
+	.loc 2 2123 0
+	adrp	x0, .LANCHOR77
+	ldr	w0, [x0, #:lo12:.LANCHOR77]
+	str	w0, [x2, 44]
+	.loc 2 2124 0
+	adrp	x0, .LANCHOR78
+	ldr	w0, [x0, #:lo12:.LANCHOR78]
+	str	w0, [x2, 48]
+	.loc 2 2125 0
+	mov	w0, 0
+	b	FtlVendorPartWrite
+.LVL1619:
+.L1216:
+	ret
+.LBE275:
+.LBE274:
+	.cfi_endproc
+.LFE286:
+	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
+	.section	.text.FtlEctTblFlush,"ax",@progbits
+	.align	2
+	.global	FtlEctTblFlush
+	.type	FtlEctTblFlush, %function
+FtlEctTblFlush:
+.LFB265:
+	.loc 2 861 0
+	.cfi_startproc
+.LVL1620:
+	.loc 2 864 0
+	adrp	x2, .LANCHOR166
+	ldrh	w1, [x2, #:lo12:.LANCHOR166]
+	cmp	w1, 31
+	bhi	.L1222
+	.loc 2 865 0
+	add	w1, w1, 1
+	strh	w1, [x2, #:lo12:.LANCHOR166]
+.LVL1621:
+	.loc 2 866 0
+	mov	w1, 1
+.LVL1622:
+.L1219:
+	adrp	x2, .LANCHOR127
+	.loc 2 868 0
+	cbnz	w0, .L1220
+	.loc 2 868 0 is_stmt 0 discriminator 1
+	ldr	x0, [x2, #:lo12:.LANCHOR127]
+.LVL1623:
+	ldr	w3, [x0, 20]
+	ldr	w0, [x0, 16]
+	add	w1, w1, w3
+.LVL1624:
+	cmp	w0, w1
+	bcc	.L1224
+.L1220:
+	.loc 2 861 0 is_stmt 1
+	stp	x29, x30, [sp, -16]!
+	.cfi_def_cfa_offset 16
+	.cfi_offset 29, -16
+	.cfi_offset 30, -8
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 2 870 0
+	ldr	x2, [x2, #:lo12:.LANCHOR127]
+	ldr	w0, [x2, 16]
+	str	w0, [x2, 20]
+	.loc 2 871 0
+	mov	w0, 17221
+	.loc 2 874 0
+	str	wzr, [x2, 4]
+	.loc 2 871 0
+	movk	w0, 0x4254, lsl 16
+	str	w0, [x2]
+	.loc 2 872 0
+	adrp	x0, .LANCHOR125
+	ldrh	w1, [x0, #:lo12:.LANCHOR125]
+	lsl	w0, w1, 9
+	str	w0, [x2, 12]
+	.loc 2 873 0
+	ldr	w0, [x2, 8]
+	add	w0, w0, 1
+	str	w0, [x2, 8]
+	.loc 2 875 0
+	mov	w0, 64
+	bl	FtlVendorPartWrite
+.LVL1625:
+	.loc 2 876 0
+	bl	Ftl_save_ext_data
+.LVL1626:
+	.loc 2 878 0
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+	ret
+.LVL1627:
+.L1222:
+	.loc 2 862 0
+	mov	w1, 32
+	b	.L1219
+.LVL1628:
+.L1224:
+	.loc 2 878 0
+	mov	w0, 0
+	ret
+	.cfi_endproc
+.LFE265:
+	.size	FtlEctTblFlush, .-FtlEctTblFlush
+	.section	.text.FtlVendorPartRead,"ax",@progbits
+	.align	2
+	.global	FtlVendorPartRead
+	.type	FtlVendorPartRead, %function
+FtlVendorPartRead:
+.LFB264:
+	.loc 2 823 0
+	.cfi_startproc
+.LVL1629:
+	stp	x29, x30, [sp, -208]!
+	.cfi_def_cfa_offset 208
+	.cfi_offset 29, -208
+	.cfi_offset 30, -200
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -192
+	.cfi_offset 20, -184
+	mov	w20, w1
+	stp	x21, x22, [sp, 32]
+	.loc 2 832 0
+	add	w1, w0, w1
+.LVL1630:
+	.cfi_offset 21, -176
+	.cfi_offset 22, -168
+	.loc 2 823 0
+	mov	w21, w0
+.LVL1631:
+	.loc 2 832 0
+	adrp	x0, .LANCHOR16
+.LVL1632:
+	.loc 2 823 0
+	stp	x23, x24, [sp, 48]
+	.loc 2 832 0
+	ldrh	w0, [x0, #:lo12:.LANCHOR16]
+	.loc 2 823 0
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 23, -160
+	.cfi_offset 24, -152
+	.cfi_offset 25, -144
+	.cfi_offset 26, -136
+	.cfi_offset 27, -128
+	.cfi_offset 28, -120
+	.loc 2 832 0
+	cmp	w1, w0
+	bhi	.L1234
+	.loc 2 828 0
+	adrp	x0, .LANCHOR22
+	.loc 2 836 0
+	adrp	x24, .LANCHOR12
+	mov	x23, x2
+	add	x24, x24, :lo12:.LANCHOR12
+	.loc 2 828 0
+	ldrh	w3, [x0, #:lo12:.LANCHOR22]
+	mov	w22, 0
+	.loc 2 835 0
+	adrp	x25, .LANCHOR133
+	.loc 2 828 0
+	lsr	w26, w21, w3
+.LVL1633:
+.L1228:
+	.loc 2 834 0
+	cbnz	w20, .L1233
+.LVL1634:
+.L1226:
+	.loc 2 857 0
+	mov	w0, w22
+	ldp	x19, x20, [sp, 16]
+.LVL1635:
+	ldp	x21, x22, [sp, 32]
+.LVL1636:
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 208
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL1637:
+.L1233:
+	.cfi_restore_state
+	.loc 2 836 0
+	ldrh	w19, [x24]
+	.loc 2 835 0
+	ldr	x0, [x25, #:lo12:.LANCHOR133]
+	.loc 2 836 0
+	udiv	w27, w21, w19
+	.loc 2 835 0
+	ldr	w1, [x0, w26, uxtw 2]
+.LVL1638:
+	.loc 2 839 0
+	and	w0, w20, 65535
+	.loc 2 836 0
+	msub	w27, w27, w19, w21
+.LVL1639:
+	.loc 2 837 0
+	sub	w19, w19, w27
+	and	w19, w19, 65535
+.LVL1640:
+	.loc 2 839 0
+	cmp	w20, w19
+	csel	w19, w0, w19, cc
+.LVL1641:
+	lsl	w28, w19, 9
+	.loc 2 840 0
+	cbz	w1, .L1230
+	.loc 2 842 0
+	adrp	x4, .LANCHOR124
+	.loc 2 844 0
+	mov	w2, 1
+	.loc 2 842 0
+	str	x4, [x29, 104]
+	.loc 2 847 0
+	lsl	w27, w27, 7
+.LVL1642:
+	.loc 2 842 0
+	ldr	x0, [x4, #:lo12:.LANCHOR124]
+	str	x0, [x29, 120]
+	.loc 2 843 0
+	add	x0, x29, 144
+	.loc 2 841 0
+	str	w1, [x29, 116]
+	.loc 2 844 0
+	mov	w1, w2
+.LVL1643:
+	.loc 2 843 0
+	str	x0, [x29, 128]
+	.loc 2 844 0
+	add	x0, x29, 112
+.LVL1644:
+	bl	FlashReadPages
+.LVL1645:
+	.loc 2 847 0
+	ldr	x4, [x29, 104]
+	mov	w2, w28
+	.loc 2 846 0
+	ldr	w0, [x29, 112]
+	cmn	w0, #1
+	.loc 2 847 0
+	mov	x0, x23
+	ldr	x1, [x4, #:lo12:.LANCHOR124]
+	.loc 2 846 0
+	csinv	w22, w22, wzr, ne
+.LVL1646:
+	.loc 2 847 0
+	add	x1, x1, x27, sxtw 2
+	bl	ftl_memcpy
+.LVL1647:
+.L1232:
+	.loc 2 851 0
+	add	w26, w26, 1
+.LVL1648:
+	.loc 2 852 0
+	sub	w20, w20, w19
+.LVL1649:
+	.loc 2 853 0
+	add	w21, w21, w19
+.LVL1650:
+	.loc 2 854 0
+	add	x23, x23, x28, sxtw
+.LVL1651:
+	b	.L1228
+.LVL1652:
+.L1230:
+	.loc 2 849 0
+	mov	w2, w28
+	mov	w1, 0
+.LVL1653:
+	mov	x0, x23
+	bl	ftl_memset
+.LVL1654:
+	b	.L1232
+.LVL1655:
+.L1234:
+	.loc 2 833 0
+	mov	w22, -1
+	b	.L1226
+	.cfi_endproc
+.LFE264:
+	.size	FtlVendorPartRead, .-FtlVendorPartRead
+	.section	.text.FtlLoadEctTbl,"ax",@progbits
+	.align	2
+	.global	FtlLoadEctTbl
+	.type	FtlLoadEctTbl, %function
+FtlLoadEctTbl:
+.LFB271:
+	.loc 2 1334 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	.loc 2 1335 0
+	mov	w0, 64
+	.loc 2 1334 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -16
+	.cfi_offset 20, -8
+	.loc 2 1335 0
+	adrp	x19, .LANCHOR127
+	adrp	x20, .LANCHOR125
+	ldr	x2, [x19, #:lo12:.LANCHOR127]
+	ldrh	w1, [x20, #:lo12:.LANCHOR125]
+	bl	FtlVendorPartRead
+.LVL1656:
+	.loc 2 1336 0
+	ldr	x0, [x19, #:lo12:.LANCHOR127]
+	ldr	w1, [x0]
+	mov	w0, 17221
+	movk	w0, 0x4254, lsl 16
+	cmp	w1, w0
+	beq	.L1237
+.LBB278:
+.LBB279:
+	.loc 2 1338 0
+	adrp	x1, .LC100
+	adrp	x0, .LC71
+	add	x1, x1, :lo12:.LC100
+	add	x0, x0, :lo12:.LC71
+	bl	printf
+.LVL1657:
+	.loc 2 1339 0
+	ldr	x0, [x19, #:lo12:.LANCHOR127]
+	mov	w1, 0
+	ldrh	w2, [x20, #:lo12:.LANCHOR125]
+	lsl	w2, w2, 9
+	bl	ftl_memset
+.LVL1658:
+.L1237:
+.LBE279:
+.LBE278:
+	.loc 2 1344 0
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE271:
+	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
+	.section	.text.Ftl_load_ext_data,"ax",@progbits
+	.align	2
+	.global	Ftl_load_ext_data
+	.type	Ftl_load_ext_data, %function
+Ftl_load_ext_data:
+.LFB287:
+	.loc 2 2130 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	.loc 2 2131 0
+	mov	w1, 1
+	mov	w0, 0
+	.loc 2 2130 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	.loc 2 2131 0
+	adrp	x19, .LANCHOR83
+	.loc 2 2130 0
+	str	x21, [sp, 32]
+	.cfi_offset 21, -16
+	.loc 2 2131 0
+	add	x21, x19, :lo12:.LANCHOR83
+	mov	x2, x21
+	bl	FtlVendorPartRead
+.LVL1659:
+	.loc 2 2132 0
+	ldr	w0, [x19, #:lo12:.LANCHOR83]
+	mov	w20, 19539
+	movk	w20, 0x4654, lsl 16
+	cmp	w0, w20
+	beq	.L1240
+	.loc 2 2133 0
+	mov	w2, 512
+	mov	w1, 0
+	mov	x0, x21
+	bl	ftl_memset
+.LVL1660:
+	.loc 2 2134 0
+	str	w20, [x19, #:lo12:.LANCHOR83]
+.L1240:
+	.loc 2 2137 0
+	ldr	w1, [x19, #:lo12:.LANCHOR83]
+	add	x0, x19, :lo12:.LANCHOR83
+	cmp	w1, w20
+	adrp	x1, .LANCHOR74
+	bne	.L1241
+	.loc 2 2138 0
+	adrp	x2, .LANCHOR69
+	ldr	w3, [x0, 88]
+	str	w3, [x2, #:lo12:.LANCHOR69]
+	.loc 2 2139 0
+	adrp	x2, .LANCHOR70
+	ldr	w3, [x0, 92]
+	str	w3, [x2, #:lo12:.LANCHOR70]
+	.loc 2 2140 0
+	adrp	x2, .LANCHOR68
+	ldr	w3, [x0, 8]
+	str	w3, [x2, #:lo12:.LANCHOR68]
+	.loc 2 2141 0
+	adrp	x2, .LANCHOR65
+	ldr	w3, [x0, 12]
+	str	w3, [x2, #:lo12:.LANCHOR65]
+	.loc 2 2142 0
+	adrp	x2, .LANCHOR63
+	ldr	w3, [x0, 16]
+	str	w3, [x2, #:lo12:.LANCHOR63]
+	.loc 2 2143 0
+	adrp	x2, .LANCHOR67
+	ldr	w3, [x0, 20]
+	str	w3, [x2, #:lo12:.LANCHOR67]
+	.loc 2 2145 0
+	ldp	w2, w3, [x0, 28]
+	.loc 2 2144 0
+	str	w2, [x1, #:lo12:.LANCHOR74]
+	.loc 2 2145 0
+	adrp	x2, .LANCHOR76
+	str	w3, [x2, #:lo12:.LANCHOR76]
+	.loc 2 2146 0
+	adrp	x2, .LANCHOR64
+	ldr	w3, [x0, 36]
+	str	w3, [x2, #:lo12:.LANCHOR64]
+	.loc 2 2147 0
+	adrp	x2, .LANCHOR66
+	ldr	w3, [x0, 40]
+	str	w3, [x2, #:lo12:.LANCHOR66]
+	.loc 2 2148 0
+	adrp	x2, .LANCHOR77
+	ldr	w3, [x0, 44]
+	str	w3, [x2, #:lo12:.LANCHOR77]
+	.loc 2 2149 0
+	ldr	w2, [x0, 48]
+	adrp	x0, .LANCHOR78
+	str	w2, [x0, #:lo12:.LANCHOR78]
+.L1241:
+	.loc 2 2152 0
+	adrp	x0, .LANCHOR14
+	adrp	x2, .LANCHOR73
+	ldr	w1, [x1, #:lo12:.LANCHOR74]
+	ldrh	w0, [x0, #:lo12:.LANCHOR14]
+	ldr	w2, [x2, #:lo12:.LANCHOR73]
+	.loc 2 2153 0
+	ldp	x19, x20, [sp, 16]
+	ldr	x21, [sp, 32]
+	.loc 2 2152 0
+	madd	w0, w0, w2, w1
+	adrp	x1, .LANCHOR5
+	.loc 2 2153 0
+	ldp	x29, x30, [sp], 48
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	.loc 2 2152 0
+	ldrh	w1, [x1, #:lo12:.LANCHOR5]
+	udiv	w0, w0, w1
+	adrp	x1, .LANCHOR75
+	str	w0, [x1, #:lo12:.LANCHOR75]
+	.loc 2 2153 0
+	ret
+	.cfi_endproc
+.LFE287:
+	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
+	.section	.text.FtlVpcTblFlush,"ax",@progbits
+	.align	2
+	.global	FtlVpcTblFlush
+	.type	FtlVpcTblFlush, %function
+FtlVpcTblFlush:
+.LFB269:
+	.loc 2 1004 0
+	.cfi_startproc
+.LVL1661:
+	stp	x29, x30, [sp, -112]!
+	.cfi_def_cfa_offset 112
+	.cfi_offset 29, -112
+	.cfi_offset 30, -104
+	.loc 2 1013 0
+	adrp	x1, .LANCHOR81
+	.loc 2 1019 0
+	mov	w2, 19539
+	.loc 2 1004 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 25, -48
+	.cfi_offset 26, -40
+	.loc 2 1011 0
+	adrp	x25, .LANCHOR109
+	.loc 2 1004 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -80
+	.cfi_offset 22, -72
+	.loc 2 1010 0
+	adrp	x22, .LANCHOR108
+	.loc 2 1004 0
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -64
+	.cfi_offset 24, -56
+	.loc 2 1010 0
+	adrp	x24, .LANCHOR39
+	.loc 2 1004 0
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 27, -32
+	.cfi_offset 28, -24
+	.loc 2 1010 0
+	add	x28, x22, :lo12:.LANCHOR108
+	.loc 2 1011 0
+	ldr	x21, [x25, #:lo12:.LANCHOR109]
+	.loc 2 1019 0
+	movk	w2, 0x4654, lsl 16
+	.loc 2 1004 0
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -96
+	.cfi_offset 20, -88
+	.loc 2 1013 0
+	add	x19, x1, :lo12:.LANCHOR81
+	.loc 2 1010 0
+	ldr	x0, [x24, #:lo12:.LANCHOR39]
+	.loc 2 1041 0
+	adrp	x23, .LANCHOR71
+	.loc 2 1013 0
+	ldrh	w1, [x1, #:lo12:.LANCHOR81]
+	.loc 2 1057 0
+	adrp	x27, .LANCHOR20
+	.loc 2 1011 0
+	stp	x0, x21, [x28, 8]
+.LVL1662:
+	.loc 2 1005 0
+	mov	w26, 65535
+	.loc 2 1013 0
+	strh	w1, [x21, 2]
+	.loc 2 1014 0
+	mov	w1, -3932
+	strh	w1, [x21]
+	.loc 2 1015 0
+	ldr	w1, [x19, 8]
+	.loc 2 1016 0
+	stp	w1, wzr, [x21, 4]
+	.loc 2 1019 0
+	adrp	x1, .LANCHOR79
+	add	x20, x1, :lo12:.LANCHOR79
+	.loc 2 1017 0
+	str	wzr, [x21, 12]
+	.loc 2 1019 0
+	str	w2, [x1, #:lo12:.LANCHOR79]
+	.loc 2 1020 0
+	mov	w1, 64
+	movk	w1, 0x5000, lsl 16
+	str	w1, [x20, 4]
+	.loc 2 1021 0
+	ldrh	w1, [x19, 6]
+	.loc 2 1024 0
+	adrp	x2, .LANCHOR51
+	.loc 2 1021 0
+	strh	w1, [x20, 8]
+	.loc 2 1022 0
+	adrp	x1, .LANCHOR10
+	ldrh	w1, [x1, #:lo12:.LANCHOR10]
+	strb	w1, [x20, 10]
+	.loc 2 1024 0
+	add	x1, x2, :lo12:.LANCHOR51
+	ldrh	w2, [x2, #:lo12:.LANCHOR51]
+	strh	w2, [x20, 14]
+	.loc 2 1025 0
+	ldrh	w2, [x1, 2]
+	ldrb	w3, [x1, 6]
+	.loc 2 1026 0
+	ldrb	w1, [x1, 8]
+	strb	w1, [x20, 11]
+	.loc 2 1025 0
+	orr	w2, w3, w2, lsl 6
+	strh	w2, [x20, 16]
+	.loc 2 1028 0
+	adrp	x2, .LANCHOR52
+	add	x1, x2, :lo12:.LANCHOR52
+	ldrh	w2, [x2, #:lo12:.LANCHOR52]
+	.loc 2 1029 0
+	ldrb	w3, [x1, 6]
+	.loc 2 1028 0
+	strh	w2, [x20, 18]
+	.loc 2 1029 0
+	ldrh	w2, [x1, 2]
+	.loc 2 1030 0
+	ldrb	w1, [x1, 8]
+	strb	w1, [x20, 12]
+	.loc 2 1029 0
+	orr	w2, w3, w2, lsl 6
+	strh	w2, [x20, 20]
+	.loc 2 1032 0
+	adrp	x2, .LANCHOR53
+	add	x1, x2, :lo12:.LANCHOR53
+	ldrh	w2, [x2, #:lo12:.LANCHOR53]
+	.loc 2 1033 0
+	ldrb	w3, [x1, 6]
+	.loc 2 1032 0
+	strh	w2, [x20, 22]
+	.loc 2 1033 0
+	ldrh	w2, [x1, 2]
+	.loc 2 1034 0
+	ldrb	w1, [x1, 8]
+	strb	w1, [x20, 13]
+	.loc 2 1036 0
+	adrp	x1, .LANCHOR73
+	.loc 2 1033 0
+	orr	w2, w3, w2, lsl 6
+	strh	w2, [x20, 24]
+	.loc 2 1036 0
+	ldr	w1, [x1, #:lo12:.LANCHOR73]
+	str	w1, [x20, 32]
+	.loc 2 1041 0
+	ldr	w1, [x23, #:lo12:.LANCHOR71]
+	str	w1, [x20, 40]
+	.loc 2 1042 0
+	adrp	x1, .LANCHOR72
+	ldr	w1, [x1, #:lo12:.LANCHOR72]
+	str	w1, [x20, 36]
+	.loc 2 1047 0
+	adrp	x1, .LANCHOR23
+	ldrh	w2, [x1, #:lo12:.LANCHOR23]
+	mov	w1, 255
+	bl	ftl_memset
+.LVL1663:
+	.loc 2 1048 0
+	ldr	x0, [x28, 8]
+	mov	x1, x20
+	mov	w2, 48
+	.loc 2 1049 0
+	adrp	x20, .LANCHOR5
+	.loc 2 1048 0
+	bl	ftl_memcpy
+.LVL1664:
+	.loc 2 1049 0
+	adrp	x1, .LANCHOR43
+	ldrh	w2, [x20, #:lo12:.LANCHOR5]
+	ldr	x0, [x28, 8]
+	ldr	x1, [x1, #:lo12:.LANCHOR43]
+	lsl	w2, w2, 1
+	add	x0, x0, 48
+	bl	ftl_memcpy
+.LVL1665:
+	.loc 2 1050 0
+	ldrh	w0, [x20, #:lo12:.LANCHOR5]
+	adrp	x1, .LANCHOR1
+	ldr	x3, [x28, 8]
+	.loc 2 1007 0
+	mov	w20, 0
+	.loc 2 1050 0
+	ldr	x1, [x1, #:lo12:.LANCHOR1]
+	lsr	w2, w0, 3
+	ubfiz	x0, x0, 1, 16
+	add	w2, w2, 4
+	add	x0, x0, 48
+	and	x0, x0, -4
+	add	x0, x3, x0
+	bl	ftl_memcpy
+.LVL1666:
+	.loc 2 1051 0
+	mov	w0, 0
+	bl	FtlUpdateVaildLpn
+.LVL1667:
+	.loc 2 1077 0
+	add	x0, x27, :lo12:.LANCHOR20
+	str	x0, [x29, 104]
+.LVL1668:
+.L1244:
+	.loc 2 1053 0
+	ldr	x0, [x24, #:lo12:.LANCHOR39]
+	.loc 2 1056 0
+	mov	w3, 1
+	.loc 2 1053 0
+	str	x0, [x28, 8]
+	.loc 2 1056 0
+	mov	w2, w3
+	.loc 2 1054 0
+	ldr	x0, [x25, #:lo12:.LANCHOR109]
+	.loc 2 1055 0
+	ldrh	w1, [x19, 2]
+	.loc 2 1054 0
+	str	x0, [x28, 16]
+	.loc 2 1055 0
+	ldrh	w0, [x19]
+	orr	w0, w1, w0, lsl 10
+	.loc 2 1056 0
+	mov	w1, w3
+	.loc 2 1055 0
+	str	w0, [x28, 4]
+	.loc 2 1056 0
+	mov	x0, x28
+	bl	FlashProgPages
+.LVL1669:
+	.loc 2 1057 0
+	ldrh	w0, [x27, #:lo12:.LANCHOR20]
+	ldrh	w1, [x19, 2]
+	sub	w0, w0, #1
+	cmp	w1, w0
+	blt	.L1245
+	.loc 2 1059 0
+	ldrh	w0, [x19]
+	.loc 2 1058 0
+	ldrh	w26, [x19, 4]
+.LVL1670:
+	.loc 2 1060 0
+	strh	wzr, [x19, 2]
+	.loc 2 1059 0
+	strh	w0, [x19, 4]
+	.loc 2 1061 0
+	bl	FtlFreeSysBlkQueueOut
+.LVL1671:
+	strh	w0, [x19]
+	.loc 2 1066 0
+	ldr	w1, [x23, #:lo12:.LANCHOR71]
+	.loc 2 1070 0
+	mov	w3, 1
+	.loc 2 1066 0
+	str	w1, [x19, 8]
+	add	w2, w1, 1
+	str	w2, [x23, #:lo12:.LANCHOR71]
+	.loc 2 1067 0
+	ubfiz	w2, w0, 10, 16
+	str	w2, [x28, 4]
+	.loc 2 1069 0
+	strh	w0, [x21, 2]
+	.loc 2 1070 0
+	mov	w2, w3
+	.loc 2 1068 0
+	str	w1, [x21, 4]
+	.loc 2 1070 0
+	mov	x0, x28
+	mov	w1, w3
+	bl	FlashProgPages
+.LVL1672:
+.L1245:
+	.loc 2 1072 0
+	ldrh	w0, [x19, 2]
+	.loc 2 1073 0
+	ldr	w1, [x28]
+	.loc 2 1072 0
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	strh	w0, [x19, 2]
+	.loc 2 1073 0
+	cmn	w1, #1
+	bne	.L1246
+	.loc 2 1075 0
+	cmp	w0, 1
+	bne	.L1247
+	.loc 2 1075 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR167
+	adrp	x0, .LC1
+	mov	w2, 1075
+	add	x1, x1, :lo12:.LANCHOR167
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1673:
+.L1247:
+	.loc 2 1076 0 is_stmt 1
+	ldrh	w0, [x19, 2]
+	cmp	w0, 1
+	bne	.L1248
+	.loc 2 1077 0
+	ldr	x0, [x29, 104]
+	ldrh	w0, [x0]
+	sub	w0, w0, #1
+	strh	w0, [x19, 2]
+.L1248:
+	.loc 2 1078 0
+	add	w20, w20, 1
+.LVL1674:
+	and	w20, w20, 65535
+.LVL1675:
+	.loc 2 1079 0
+	cmp	w20, 3
+	bls	.L1244
+	.loc 2 1080 0
+	add	x22, x22, :lo12:.LANCHOR108
+	adrp	x0, .LC101
+	mov	w2, w20
+	add	x0, x0, :lo12:.LC101
+	ldr	w1, [x22, 4]
+	bl	printf
+.LVL1676:
+.L1250:
+	b	.L1250
+.L1246:
+	.loc 2 1086 0
+	cmp	w0, 1
+	beq	.L1244
+	.loc 2 1089 0
+	mov	w0, 65535
+	cmp	w26, w0
+	beq	.L1251
+	.loc 2 1090 0
+	mov	w1, 1
+	mov	w0, w26
+	bl	FtlFreeSysBlkQueueIn
+.LVL1677:
+.L1251:
+	.loc 2 1092 0
+	ldp	x19, x20, [sp, 16]
+.LVL1678:
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+.LVL1679:
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+.LVL1680:
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE269:
+	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
+	.section	.text.FtlVpcCheckAndModify,"ax",@progbits
+	.align	2
+	.global	FtlVpcCheckAndModify
+	.type	FtlVpcCheckAndModify, %function
+FtlVpcCheckAndModify:
+.LFB289:
+	.loc 2 2192 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -96]!
+	.cfi_def_cfa_offset 96
+	.cfi_offset 29, -96
+	.cfi_offset 30, -88
+	.loc 2 2197 0
+	adrp	x1, .LANCHOR168
+	adrp	x0, .LC91
+	add	x1, x1, :lo12:.LANCHOR168
+	.loc 2 2192 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.loc 2 2197 0
+	add	x0, x0, :lo12:.LC91
+	.loc 2 2192 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 19, -80
+	.cfi_offset 20, -72
+	.cfi_offset 21, -64
+	.cfi_offset 22, -56
+	.loc 2 2198 0
+	adrp	x20, .LANCHOR128
+	.loc 2 2192 0
+	stp	x23, x24, [sp, 48]
+	.loc 2 2199 0
+	adrp	x21, .LANCHOR62
+	.loc 2 2192 0
+	str	x25, [sp, 64]
+	.cfi_offset 23, -48
+	.cfi_offset 24, -40
+	.cfi_offset 25, -32
+	.loc 2 2197 0
+	bl	printf
+.LVL1681:
+	.loc 2 2198 0
+	adrp	x0, .LANCHOR6
+	.loc 2 2199 0
+	mov	w19, 0
+	add	x21, x21, :lo12:.LANCHOR62
+	.loc 2 2198 0
+	mov	w1, 0
+	ldrh	w2, [x0, #:lo12:.LANCHOR6]
+	ldr	x0, [x20, #:lo12:.LANCHOR128]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+.LVL1682:
+.L1257:
+	.loc 2 2199 0 discriminator 1
+	ldr	w0, [x21]
+	cmp	w19, w0
+	bcc	.L1259
+	.loc 2 2206 0 discriminator 1
+	adrp	x22, .LANCHOR5
+	.loc 2 2209 0 discriminator 1
+	adrp	x23, .LC102
+	.loc 2 2206 0 discriminator 1
+	add	x22, x22, :lo12:.LANCHOR5
+	.loc 2 2209 0 discriminator 1
+	add	x23, x23, :lo12:.LC102
+	mov	w19, 0
+.LVL1683:
+	.loc 2 2207 0 discriminator 1
+	adrp	x25, .LANCHOR43
+	mov	w24, 65535
+.L1260:
+.LVL1684:
+	.loc 2 2206 0 discriminator 1
+	ldrh	w0, [x22]
+	cmp	w0, w19
+	bhi	.L1264
+	.loc 2 2218 0
+	ldp	x19, x20, [sp, 16]
+.LVL1685:
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 25
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL1686:
+.L1259:
+	.cfi_restore_state
+	.loc 2 2200 0
+	mov	w2, 0
+	add	x1, x29, 92
+	mov	w0, w19
+	bl	log2phys
+.LVL1687:
+	.loc 2 2201 0
+	ldr	w0, [x29, 92]
+	cmn	w0, #1
+	beq	.L1258
+	.loc 2 2202 0
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+.LVL1688:
+	.loc 2 2203 0
+	ldr	x2, [x20, #:lo12:.LANCHOR128]
+	ubfiz	x0, x0, 1, 16
+.LVL1689:
+	ldrh	w1, [x2, x0]
+	add	w1, w1, 1
+	strh	w1, [x2, x0]
+.L1258:
+	.loc 2 2199 0 discriminator 2
+	add	w19, w19, 1
+.LVL1690:
+	b	.L1257
+.LVL1691:
+.L1264:
+	.loc 2 2207 0
+	ldr	x0, [x25, #:lo12:.LANCHOR43]
+	ubfiz	x21, x19, 1, 16
+	ldrh	w2, [x0, x21]
+	ldr	x0, [x20, #:lo12:.LANCHOR128]
+	ldrh	w3, [x0, x21]
+	cmp	w2, w3
+	beq	.L1262
+	.loc 2 2207 0 is_stmt 0 discriminator 1
+	cmp	w2, w24
+	beq	.L1262
+	.loc 2 2209 0 is_stmt 1
+	mov	w1, w19
+	mov	x0, x23
+	bl	printf
+.LVL1692:
+	.loc 2 2210 0
+	adrp	x0, .LANCHOR51
+	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+	cmp	w0, w19
+	beq	.L1262
+	.loc 2 2210 0 is_stmt 0 discriminator 1
+	adrp	x0, .LANCHOR53
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+	cmp	w0, w19
+	beq	.L1262
+	.loc 2 2210 0 discriminator 2
+	adrp	x0, .LANCHOR52
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
+	cmp	w0, w19
+	beq	.L1262
+	.loc 2 2211 0 is_stmt 1
+	ldr	x0, [x20, #:lo12:.LANCHOR128]
+	ldrh	w1, [x0, x21]
+	ldr	x0, [x25, #:lo12:.LANCHOR43]
+	strh	w1, [x0, x21]
+	.loc 2 2212 0
+	mov	w0, w19
+	bl	update_vpc_list
+.LVL1693:
+	.loc 2 2213 0
+	bl	l2p_flush
+.LVL1694:
+	.loc 2 2214 0
+	bl	FtlVpcTblFlush
+.LVL1695:
+.L1262:
+	.loc 2 2206 0 discriminator 2
+	add	w19, w19, 1
+.LVL1696:
+	and	w19, w19, 65535
+.LVL1697:
+	b	.L1260
+	.cfi_endproc
+.LFE289:
+	.size	FtlVpcCheckAndModify, .-FtlVpcCheckAndModify
+	.section	.text.allocate_new_data_superblock,"ax",@progbits
+	.align	2
+	.global	allocate_new_data_superblock
+	.type	allocate_new_data_superblock, %function
+allocate_new_data_superblock:
+.LFB299:
+	.loc 2 2631 0
+	.cfi_startproc
+.LVL1698:
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	.loc 2 2632 0
+	ldrh	w19, [x0]
+.LVL1699:
+	.loc 2 2631 0
+	str	x21, [sp, 32]
+	.cfi_offset 21, -16
+	.loc 2 2631 0
+	mov	x21, x0
+	.loc 2 2633 0
+	adrp	x0, .LANCHOR5
+.LVL1700:
+	ldrh	w0, [x0, #:lo12:.LANCHOR5]
+	cmp	w0, w19
+	bcs	.L1270
+	.loc 2 2633 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR169
+	adrp	x0, .LC1
+	mov	w2, 2633
+	add	x1, x1, :lo12:.LANCHOR169
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1701:
+.L1270:
+	.loc 2 2635 0 is_stmt 1
+	mov	w0, 65535
+	cmp	w19, w0
+	beq	.L1271
+	.loc 2 2636 0
+	adrp	x1, .LANCHOR43
+	ubfiz	x0, x19, 1, 16
+	ldr	x1, [x1, #:lo12:.LANCHOR43]
+	ldrh	w0, [x1, x0]
+	cbz	w0, .L1272
+	.loc 2 2637 0
+	mov	w0, w19
+	bl	INSERT_DATA_LIST
+.LVL1702:
+.L1271:
+	.loc 2 2642 0
+	adrp	x1, .LANCHOR151
+	.loc 2 2641 0
+	mov	w0, 1
+	strb	w0, [x21, 8]
+	.loc 2 2642 0
+	mov	w2, 65535
+	ldrh	w0, [x1, #:lo12:.LANCHOR151]
+	mov	x20, x1
+	cmp	w0, w2
+	beq	.L1273
+	.loc 2 2643 0
+	cmp	w19, w0
+	bne	.L1274
+	.loc 2 2643 0 is_stmt 0 discriminator 1
+	adrp	x2, .LANCHOR43
+	ubfiz	x1, x0, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR43]
+	ldrh	w1, [x2, x1]
+	cbz	w1, .L1275
+.L1274:
+	.loc 2 2644 0 is_stmt 1
+	bl	update_vpc_list
+.LVL1703:
+.L1275:
+	.loc 2 2645 0
+	mov	w0, -1
+	strh	w0, [x20, #:lo12:.LANCHOR151]
+.L1273:
+	.loc 2 2647 0
+	mov	x0, x21
+	bl	allocate_data_superblock
+.LVL1704:
+	.loc 2 2648 0
+	bl	l2p_flush
+.LVL1705:
+	.loc 2 2649 0
+	mov	w0, 0
+	bl	FtlEctTblFlush
+.LVL1706:
+	.loc 2 2650 0
+	bl	FtlVpcTblFlush
+.LVL1707:
+	.loc 2 2652 0
+	ldr	x21, [sp, 32]
+.LVL1708:
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+.LVL1709:
+	ldp	x29, x30, [sp], 48
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL1710:
+.L1272:
+	.cfi_restore_state
+	.loc 2 2639 0
+	mov	w0, w19
+	bl	INSERT_FREE_LIST
+.LVL1711:
+	b	.L1271
+	.cfi_endproc
+.LFE299:
+	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
+	.section	.text.FtlProgPages,"ax",@progbits
+	.align	2
+	.global	FtlProgPages
+	.type	FtlProgPages, %function
+FtlProgPages:
+.LFB215:
+	.loc 3 904 0
+	.cfi_startproc
+.LVL1712:
+	stp	x29, x30, [sp, -96]!
+	.cfi_def_cfa_offset 96
+	.cfi_offset 29, -96
+	.cfi_offset 30, -88
+	.loc 3 911 0
+	mov	w2, 0
+.LVL1713:
+	.loc 3 904 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -80
+	.cfi_offset 20, -72
+	mov	x19, x3
+	stp	x23, x24, [sp, 48]
+	add	x20, x0, 4
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 23, -48
+	.cfi_offset 24, -40
+	.cfi_offset 21, -64
+	.cfi_offset 22, -56
+	mov	w21, w1
+	str	x25, [sp, 64]
+	.cfi_offset 25, -32
+	ubfiz	x21, x21, 5, 32
+	add	x21, x21, 4
+	.loc 3 918 0
+	adrp	x24, .LANCHOR19
+	.loc 3 911 0
+	ldrb	w3, [x3, 9]
+.LVL1714:
+	.loc 3 926 0
+	adrp	x23, .LANCHOR83
+	add	x21, x0, x21
+	.loc 3 918 0
+	add	x24, x24, :lo12:.LANCHOR19
+	.loc 3 926 0
+	add	x23, x23, :lo12:.LANCHOR83
+	.loc 3 911 0
+	bl	FlashProgPages
+.LVL1715:
+.L1281:
+	.loc 3 913 0 discriminator 1
+	cmp	x20, x21
+	beq	.L1288
+	sub	x22, x20, #4
+	.loc 3 917 0
+	adrp	x25, .LANCHOR43
+	b	.L1289
+.L1284:
+	.loc 3 915 0
+	ldr	w0, [x20]
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+.LVL1716:
+	.loc 3 916 0
+	ldrh	w1, [x19]
+	cmp	w1, w0, uxth
+	bne	.L1282
+	.loc 3 917 0
+	ldr	x2, [x25, #:lo12:.LANCHOR43]
+	ubfiz	x1, x1, 1, 16
+	ldrh	w3, [x19, 4]
+	ldrh	w0, [x2, x1]
+.LVL1717:
+	sub	w0, w0, w3
+	strh	w0, [x2, x1]
+	.loc 3 919 0
+	strb	wzr, [x19, 6]
+	.loc 3 918 0
+	ldrh	w0, [x24]
+	strh	w0, [x19, 2]
+	.loc 3 920 0
+	strh	wzr, [x19, 4]
+.L1282:
+	.loc 3 922 0
+	ldrh	w0, [x19, 4]
+	cbnz	w0, .L1283
+	.loc 3 923 0
+	mov	x0, x19
+	bl	allocate_new_data_superblock
+.LVL1718:
+.L1283:
+	.loc 3 926 0
+	ldr	w0, [x23, 96]
+	add	w0, w0, 1
+	str	w0, [x23, 96]
+	.loc 3 927 0
+	ldr	w0, [x20]
+	lsr	w0, w0, 10
+	bl	FtlGcMarkBadPhyBlk
+.LVL1719:
+	.loc 3 928 0
+	mov	x0, x19
+	bl	get_new_active_ppa
+.LVL1720:
+	.loc 3 929 0
+	str	w0, [x20]
+	.loc 3 930 0
+	mov	w2, 0
+	.loc 3 928 0
+	str	w0, [x29, 92]
+	.loc 3 930 0
+	mov	w1, 1
+	ldrb	w3, [x19, 9]
+	mov	x0, x22
+	bl	FlashProgPages
+.LVL1721:
+.L1289:
+	.loc 3 914 0
+	ldr	w0, [x20, -4]
+	cmn	w0, #1
+	beq	.L1284
+	.loc 3 933 0
+	adrp	x0, .LANCHOR3
+	ldrb	w1, [x19, 6]
+	ldrh	w0, [x0, #:lo12:.LANCHOR3]
+	cmp	w1, w0
+	bcc	.L1285
+	.loc 3 933 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR170
+	adrp	x0, .LC1
+	mov	w2, 933
+	add	x1, x1, :lo12:.LANCHOR170
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1722:
+.L1285:
+	.loc 3 934 0 is_stmt 1
+	add	x1, x29, 96
+	ldr	w0, [x22, 4]
+	.loc 3 935 0
+	mov	w2, 1
+	.loc 3 934 0
+	str	w0, [x1, -4]!
+	.loc 3 935 0
+	ldr	w0, [x22, 24]
+	bl	log2phys
+.LVL1723:
+	.loc 3 937 0
+	ldr	x0, [x22, 16]
+	ldr	w3, [x0, 12]
+.LVL1724:
+	.loc 3 939 0
+	lsr	w0, w3, 10
+	bl	P2V_block_in_plane
+.LVL1725:
+	and	w1, w0, 65535
+	mov	w22, w1
+.LVL1726:
+	.loc 3 940 0
+	cmn	w3, #1
+	beq	.L1286
+	.loc 3 942 0
+	adrp	x2, .LANCHOR43
+	ubfiz	x0, x1, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR43]
+	ldrh	w0, [x2, x0]
+	cbnz	w0, .L1287
+	.loc 3 943 0
+	adrp	x0, .LC103
+	mov	w2, 0
+	add	x0, x0, :lo12:.LC103
+	bl	printf
+.LVL1727:
+.L1287:
+	.loc 3 944 0
+	mov	w0, w22
+	bl	decrement_vpc_count
+.LVL1728:
+.L1286:
+	add	x20, x20, 32
+	b	.L1281
+.LVL1729:
+.L1288:
+	.loc 3 948 0
+	adrp	x0, .LANCHOR3
+	ldrb	w1, [x19, 6]
+	ldrh	w0, [x0, #:lo12:.LANCHOR3]
+	cmp	w1, w0
+	bcc	.L1280
+	.loc 3 948 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR170
+	adrp	x0, .LC1
+	mov	w2, 948
+	add	x1, x1, :lo12:.LANCHOR170
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1730:
+.L1280:
+	.loc 3 949 0 is_stmt 1
+	ldp	x19, x20, [sp, 16]
+.LVL1731:
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 25
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE215:
+	.size	FtlProgPages, .-FtlProgPages
+	.section	.text.FtlCacheWriteBack,"ax",@progbits
+	.align	2
+	.global	FtlCacheWriteBack
+	.type	FtlCacheWriteBack, %function
+FtlCacheWriteBack:
+.LFB216:
+	.loc 3 952 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	str	x19, [sp, 16]
+	.cfi_offset 19, -16
+	.loc 3 953 0
+	adrp	x19, .LANCHOR150
+	ldr	x0, [x19, #:lo12:.LANCHOR150]
+	cbz	x0, .L1296
+	.loc 3 954 0
+	adrp	x1, .LANCHOR171
+	mov	w2, 0
+	ldr	x3, [x1, #:lo12:.LANCHOR171]
+	mov	w1, 1
+	bl	FtlProgPages
+.LVL1732:
+	.loc 3 955 0
+	str	xzr, [x19, #:lo12:.LANCHOR150]
+.L1296:
+	.loc 3 958 0
+	mov	w0, 0
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE216:
+	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
+	.section	.text.FtlSysFlush,"ax",@progbits
+	.align	2
+	.global	FtlSysFlush
+	.type	FtlSysFlush, %function
+FtlSysFlush:
+.LFB212:
+	.loc 3 797 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -16]!
+	.cfi_def_cfa_offset 16
+	.cfi_offset 29, -16
+	.cfi_offset 30, -8
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 3 798 0
+	bl	FtlCacheWriteBack
+.LVL1733:
+	.loc 3 799 0
+	bl	l2p_flush
+.LVL1734:
+	.loc 3 800 0
+	mov	w0, 1
+	bl	FtlEctTblFlush
+.LVL1735:
+	.loc 3 801 0
+	bl	FtlVpcTblFlush
+.LVL1736:
+	.loc 3 803 0
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE212:
+	.size	FtlSysFlush, .-FtlSysFlush
+	.section	.text.sftl_deinit,"ax",@progbits
+	.align	2
+	.global	sftl_deinit
+	.type	sftl_deinit, %function
+sftl_deinit:
+.LFB213:
+	.loc 3 806 0
+	.cfi_startproc
+	.loc 3 807 0
+	adrp	x0, .LANCHOR88
+	ldr	w0, [x0, #:lo12:.LANCHOR88]
+	cmp	w0, 1
+	bne	.L1306
+	.loc 3 806 0
+	stp	x29, x30, [sp, -16]!
+	.cfi_def_cfa_offset 16
+	.cfi_offset 29, -16
+	.cfi_offset 30, -8
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 3 808 0
+	bl	FtlSysFlush
+.LVL1737:
+	.loc 3 810 0
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+	ret
+.L1306:
+	mov	w0, 0
+	ret
+	.cfi_endproc
+.LFE213:
+	.size	sftl_deinit, .-sftl_deinit
+	.section	.text.FtlDiscard,"ax",@progbits
+	.align	2
+	.global	FtlDiscard
+	.type	FtlDiscard, %function
+FtlDiscard:
+.LFB218:
+	.loc 3 1157 0
+	.cfi_startproc
+.LVL1738:
+	stp	x29, x30, [sp, -80]!
+	.cfi_def_cfa_offset 80
+	.cfi_offset 29, -80
+	.cfi_offset 30, -72
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -64
+	.cfi_offset 20, -56
+	mov	w20, w0
+	mov	w19, w1
+	.loc 3 1164 0
+	add	w1, w0, w1
+.LVL1739:
+	adrp	x0, .LANCHOR34
+.LVL1740:
+	.loc 3 1157 0
+	stp	x21, x22, [sp, 32]
+	str	x23, [sp, 48]
+	.cfi_offset 21, -48
+	.cfi_offset 22, -40
+	.cfi_offset 23, -32
+	.loc 3 1164 0
+	ldr	w0, [x0, #:lo12:.LANCHOR34]
+	cmp	w1, w0
+	bhi	.L1317
+	.loc 3 1167 0
+	cmp	w19, 31
+	bhi	.L1311
+.LVL1741:
+.L1325:
+	.loc 3 1200 0
+	mov	w0, 0
+.L1309:
+	.loc 3 1201 0
+	ldp	x19, x20, [sp, 16]
+.LVL1742:
+	ldp	x21, x22, [sp, 32]
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 23
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL1743:
+.L1311:
+	.cfi_restore_state
+	.loc 3 1172 0
+	adrp	x22, .LANCHOR12
+	.loc 3 1170 0
+	bl	FtlCacheWriteBack
+.LVL1744:
+	.loc 3 1172 0
+	ldrh	w1, [x22, #:lo12:.LANCHOR12]
+	udiv	w21, w20, w1
+.LVL1745:
+	.loc 3 1173 0
+	msub	w20, w1, w21, w20
+.LVL1746:
+	.loc 3 1174 0
+	ands	w20, w20, 65535
+	beq	.L1312
+.LVL1747:
+	.loc 3 1175 0
+	sub	w1, w1, w20
+.LVL1748:
+	.loc 3 1176 0
+	add	w21, w21, 1
+.LVL1749:
+	.loc 3 1175 0
+	cmp	w1, w19
+	csel	w1, w1, w19, ls
+	.loc 3 1177 0
+	sub	w19, w19, w1, uxth
+.LVL1750:
+.L1312:
+	.loc 3 1184 0
+	adrp	x20, .LANCHOR172
+.LVL1751:
+	.loc 3 1185 0
+	adrp	x23, .LANCHOR64
+	.loc 3 1184 0
+	add	x20, x20, :lo12:.LANCHOR172
+	.loc 3 1185 0
+	add	x23, x23, :lo12:.LANCHOR64
+	.loc 3 1180 0
+	mov	w0, -1
+	str	w0, [x29, 76]
+.LVL1752:
+.L1313:
+	.loc 3 1181 0
+	ldrh	w0, [x22, #:lo12:.LANCHOR12]
+	cmp	w19, w0
+	bcs	.L1315
+	.loc 3 1194 0
+	adrp	x0, .LANCHOR172
+	ldr	w1, [x0, #:lo12:.LANCHOR172]
+	cmp	w1, 32
+	bls	.L1325
+	.loc 3 1196 0
+	str	wzr, [x0, #:lo12:.LANCHOR172]
+	.loc 3 1197 0
+	bl	l2p_flush
+.LVL1753:
+	.loc 3 1198 0
+	bl	FtlVpcTblFlush
+.LVL1754:
+	b	.L1325
+.L1315:
+	.loc 3 1182 0
+	mov	w2, 0
+	add	x1, x29, 72
+	mov	w0, w21
+	bl	log2phys
+.LVL1755:
+	.loc 3 1183 0
+	ldr	w0, [x29, 72]
+	cmn	w0, #1
+	beq	.L1314
+	.loc 3 1184 0
+	ldr	w0, [x20]
+	.loc 3 1186 0
+	mov	w2, 1
+	add	x1, x29, 76
+	.loc 3 1184 0
+	add	w0, w0, 1
+	str	w0, [x20]
+	.loc 3 1185 0
+	ldr	w0, [x23]
+	add	w0, w0, 1
+	str	w0, [x23]
+	.loc 3 1186 0
+	mov	w0, w21
+	bl	log2phys
+.LVL1756:
+	.loc 3 1187 0
+	ldr	w0, [x29, 72]
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+.LVL1757:
+	.loc 3 1188 0
+	bl	decrement_vpc_count
+.LVL1758:
+.L1314:
+	.loc 3 1191 0
+	ldrh	w0, [x22, #:lo12:.LANCHOR12]
+	.loc 3 1190 0
+	add	w21, w21, 1
+.LVL1759:
+	.loc 3 1191 0
+	sub	w19, w19, w0
+.LVL1760:
+	b	.L1313
+.LVL1761:
+.L1317:
+	.loc 3 1165 0
+	mov	w0, -1
+	b	.L1309
+	.cfi_endproc
+.LFE218:
+	.size	FtlDiscard, .-FtlDiscard
+	.section	.text.FtlGcFreeTempBlock,"ax",@progbits
+	.align	2
+	.global	FtlGcFreeTempBlock
+	.type	FtlGcFreeTempBlock, %function
+FtlGcFreeTempBlock:
+.LFB308:
+	.loc 5 112 0
+	.cfi_startproc
+.LVL1762:
+	stp	x29, x30, [sp, -112]!
+	.cfi_def_cfa_offset 112
+	.cfi_offset 29, -112
+	.cfi_offset 30, -104
+	.loc 5 119 0
+	mov	w2, 65535
+	.loc 5 112 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -96
+	.cfi_offset 20, -88
+	.loc 5 119 0
+	adrp	x19, .LANCHOR53
+	.loc 5 112 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -80
+	.cfi_offset 22, -72
+	.loc 5 115 0
+	adrp	x21, .LANCHOR19
+	.loc 5 119 0
+	ldrh	w20, [x19, #:lo12:.LANCHOR53]
+	.loc 5 112 0
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	.loc 5 119 0
+	cmp	w20, w2
+	.loc 5 112 0
+	str	x27, [sp, 80]
+	.cfi_offset 23, -64
+	.cfi_offset 24, -56
+	.cfi_offset 25, -48
+	.cfi_offset 26, -40
+	.cfi_offset 27, -32
+	.loc 5 115 0
+	ldrh	w1, [x21, #:lo12:.LANCHOR19]
+.LVL1763:
+	.loc 5 119 0
+	bne	.L1327
+.LVL1764:
+.L1337:
+	.loc 5 152 0
+	adrp	x0, .LANCHOR153
+	.loc 5 153 0
+	ldrh	w1, [x19, #:lo12:.LANCHOR53]
+	add	x22, x19, :lo12:.LANCHOR53
+	.loc 5 152 0
+	str	wzr, [x0, #:lo12:.LANCHOR153]
+	.loc 5 153 0
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L1350
+.L1353:
+	.loc 5 198 0
+	mov	w0, 0
+.L1326:
+	.loc 5 199 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL1765:
+.L1327:
+	.cfi_restore_state
+	.loc 5 121 0
+	cbz	w0, .L1330
+.LVL1766:
+	.loc 5 123 0
+	adrp	x0, .LANCHOR157
+.LVL1767:
+	ldrh	w3, [x0, #:lo12:.LANCHOR157]
+	cmp	w3, w2
+	beq	.L1331
+.L1332:
+	.loc 5 122 0
+	mov	w1, 2
+.LVL1768:
+.L1330:
+	.loc 5 131 0
+	add	x0, x19, :lo12:.LANCHOR53
+	bl	FtlGcScanTempBlk
+.LVL1769:
+	str	w0, [x29, 108]
+	.loc 5 132 0
+	cmn	w0, #1
+	beq	.L1333
+	.loc 5 135 0
+	adrp	x0, .LANCHOR40
+	ubfiz	x20, x20, 1, 16
+.LVL1770:
+	ldr	x1, [x0, #:lo12:.LANCHOR40]
+	ldrh	w0, [x1, x20]
+	cmp	w0, 4
+	bls	.L1334
+	.loc 5 136 0
+	sub	w0, w0, #5
+	strh	w0, [x1, x20]
+	.loc 5 137 0
+	mov	w0, 1
+	bl	FtlEctTblFlush
+.LVL1771:
+.L1334:
+	.loc 5 139 0
+	adrp	x0, .LANCHOR153
+	mov	x19, x0
+	ldr	w1, [x0, #:lo12:.LANCHOR153]
+	cbnz	w1, .L1335
+	.loc 5 140 0
+	adrp	x0, .LANCHOR83
+	add	x0, x0, :lo12:.LANCHOR83
+	ldr	w1, [x0, 96]
+	add	w1, w1, 1
+	str	w1, [x0, 96]
+	.loc 5 141 0
+	ldr	w0, [x29, 108]
+	lsr	w0, w0, 10
+	bl	FtlBbmMapBadBlock
+.LVL1772:
+	.loc 5 142 0
+	bl	FtlBbmTblFlush
+.LVL1773:
+.L1335:
+	.loc 5 144 0
+	str	wzr, [x19, #:lo12:.LANCHOR153]
+.L1346:
+	.loc 5 149 0
+	mov	w0, 1
+	b	.L1326
+.LVL1774:
+.L1331:
+	.loc 5 124 0
+	strh	wzr, [x0, #:lo12:.LANCHOR157]
+	.loc 5 125 0
+	adrp	x0, .LANCHOR48
+	ldrh	w0, [x0, #:lo12:.LANCHOR48]
+	cmp	w0, 17
+	bhi	.L1332
+	b	.L1330
+.LVL1775:
+.L1333:
+	.loc 5 148 0
+	adrp	x0, .LANCHOR157
+	ldrh	w1, [x0, #:lo12:.LANCHOR157]
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L1346
+	b	.L1337
+.LVL1776:
+.L1350:
+	.loc 5 160 0
+	bl	FtlCacheWriteBack
+.LVL1777:
+	.loc 5 162 0
+	adrp	x20, .LANCHOR99
+	ldrb	w0, [x22, 7]
+	ldrh	w2, [x21, #:lo12:.LANCHOR19]
+	ldrh	w1, [x20, #:lo12:.LANCHOR99]
+	mul	w0, w0, w2
+	cmp	w1, w0
+	beq	.L1338
+	.loc 5 162 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR173
+	adrp	x0, .LC1
+	mov	w2, 162
+	add	x1, x1, :lo12:.LANCHOR173
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1778:
+.L1338:
+	.loc 5 163 0 is_stmt 1
+	add	x0, x19, :lo12:.LANCHOR53
+	adrp	x23, .LANCHOR43
+	ldrh	w3, [x21, #:lo12:.LANCHOR19]
+	.loc 5 168 0
+	adrp	x25, .LANCHOR62
+	.loc 5 163 0
+	ldrh	w2, [x19, #:lo12:.LANCHOR53]
+	.loc 5 168 0
+	adrp	x26, .LANCHOR173
+	.loc 5 163 0
+	ldrb	w0, [x0, 7]
+	.loc 5 168 0
+	add	x25, x25, :lo12:.LANCHOR62
+	.loc 5 163 0
+	ldr	x1, [x23, #:lo12:.LANCHOR43]
+	.loc 5 168 0
+	add	x26, x26, :lo12:.LANCHOR173
+	.loc 5 165 0
+	mov	w21, 0
+	.loc 5 163 0
+	mul	w0, w0, w3
+	strh	w0, [x1, x2, lsl 1]
+	.loc 5 164 0
+	adrp	x1, .LANCHOR68
+	ldrh	w0, [x20, #:lo12:.LANCHOR99]
+	ldr	w2, [x1, #:lo12:.LANCHOR68]
+	add	w0, w0, w2
+	str	w0, [x1, #:lo12:.LANCHOR68]
+.LVL1779:
+.L1339:
+	.loc 5 165 0 discriminator 1
+	ldrh	w0, [x20, #:lo12:.LANCHOR99]
+	cmp	w0, w21
+	bhi	.L1343
+	.loc 5 181 0
+	mov	w0, -1
+	bl	decrement_vpc_count
+.LVL1780:
+	.loc 5 182 0
+	ldrh	w0, [x19, #:lo12:.LANCHOR53]
+	ldr	x2, [x23, #:lo12:.LANCHOR43]
+	ubfiz	x1, x0, 1, 16
+	ldrh	w1, [x2, x1]
+	cbz	w1, .L1344
+	.loc 5 183 0
+	bl	INSERT_DATA_LIST
+.LVL1781:
+.L1345:
+	.loc 5 188 0
+	adrp	x0, .LANCHOR97
+	.loc 5 186 0
+	mov	w21, -1
+.LVL1782:
+	.loc 5 187 0
+	strh	wzr, [x20, #:lo12:.LANCHOR99]
+	.loc 5 186 0
+	strh	w21, [x19, #:lo12:.LANCHOR53]
+	.loc 5 188 0
+	strh	wzr, [x0, #:lo12:.LANCHOR97]
+	.loc 5 189 0
+	bl	l2p_flush
+.LVL1783:
+	.loc 5 190 0
+	bl	FtlVpcTblFlush
+.LVL1784:
+	.loc 5 191 0
+	adrp	x0, .LANCHOR48
+	ldrh	w1, [x0, #:lo12:.LANCHOR48]
+	adrp	x0, .LANCHOR80
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	add	w0, w0, w0, lsl 1
+	cmp	w1, w0, lsr 2
+	ble	.L1353
+	.loc 5 192 0
+	adrp	x0, .LANCHOR82
+	.loc 5 193 0
+	mov	w1, 20
+	.loc 5 192 0
+	strh	w21, [x0, #:lo12:.LANCHOR82]
+	.loc 5 193 0
+	adrp	x0, .LANCHOR84
+	strh	w1, [x0, #:lo12:.LANCHOR84]
+	b	.L1353
+.LVL1785:
+.L1343:
+	.loc 5 166 0
+	adrp	x0, .LANCHOR100
+	mov	w24, 12
+	ldr	x27, [x0, #:lo12:.LANCHOR100]
+	umull	x24, w21, w24
+	.loc 5 168 0
+	ldr	w0, [x25]
+	.loc 5 166 0
+	add	x22, x27, x24
+.LVL1786:
+	.loc 5 168 0
+	ldr	w1, [x22, 8]
+	cmp	w1, w0
+	bcc	.L1340
+	.loc 5 168 0 is_stmt 0 discriminator 1
+	adrp	x0, .LC1
+	mov	w2, 168
+	mov	x1, x26
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1787:
+.L1340:
+	.loc 5 169 0 is_stmt 1
+	ldr	w0, [x22, 8]
+	add	x1, x29, 108
+	mov	w2, 0
+	bl	log2phys
+.LVL1788:
+	.loc 5 170 0
+	ldr	w0, [x27, x24]
+	ldr	w1, [x29, 108]
+	cmp	w0, w1
+	bne	.L1341
+	.loc 5 171 0
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+.LVL1789:
+	mov	w24, w0
+.LVL1790:
+	.loc 5 172 0
+	ldr	w0, [x22, 8]
+.LVL1791:
+	mov	w2, 1
+	add	x1, x22, 4
+	bl	log2phys
+.LVL1792:
+	.loc 5 173 0
+	mov	w0, w24
+.LVL1793:
+.L1352:
+	.loc 5 177 0
+	bl	decrement_vpc_count
+.LVL1794:
+.L1342:
+	.loc 5 165 0 discriminator 2
+	add	w21, w21, 1
+.LVL1795:
+	and	w21, w21, 65535
+.LVL1796:
+	b	.L1339
+.L1341:
+	.loc 5 175 0
+	ldr	w0, [x22, 4]
+	cmp	w1, w0
+	beq	.L1342
+	.loc 5 177 0
+	ldrh	w0, [x19, #:lo12:.LANCHOR53]
+	b	.L1352
+.LVL1797:
+.L1344:
+	.loc 5 185 0
+	bl	INSERT_FREE_LIST
+.LVL1798:
+	b	.L1345
+	.cfi_endproc
+.LFE308:
+	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
+	.section	.text.FtlGcPageRecovery,"ax",@progbits
+	.align	2
+	.global	FtlGcPageRecovery
+	.type	FtlGcPageRecovery, %function
+FtlGcPageRecovery:
+.LFB311:
+	.loc 5 289 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -16
+	.cfi_offset 20, -8
+	.loc 5 290 0
+	adrp	x20, .LANCHOR19
+	adrp	x19, .LANCHOR53
+	add	x19, x19, :lo12:.LANCHOR53
+	ldrh	w1, [x20, #:lo12:.LANCHOR19]
+	mov	x0, x19
+	bl	FtlGcScanTempBlk
+.LVL1799:
+	.loc 5 291 0
+	ldrh	w1, [x19, 2]
+	ldrh	w0, [x20, #:lo12:.LANCHOR19]
+	cmp	w1, w0
+	bcc	.L1354
+.LBB282:
+.LBB283:
+	.loc 5 293 0
+	adrp	x0, .LANCHOR144
+	add	x0, x0, :lo12:.LANCHOR144
+	bl	FtlMapBlkWriteDump_data
+.LVL1800:
+	.loc 5 294 0
+	mov	w0, 0
+	bl	FtlGcFreeTempBlock
+.LVL1801:
+	.loc 5 295 0
+	adrp	x0, .LANCHOR153
+	str	wzr, [x0, #:lo12:.LANCHOR153]
+.L1354:
+.LBE283:
+.LBE282:
+	.loc 5 297 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE311:
+	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
+	.section	.text.FtlPowerLostRecovery,"ax",@progbits
+	.align	2
+	.global	FtlPowerLostRecovery
+	.type	FtlPowerLostRecovery, %function
+FtlPowerLostRecovery:
+.LFB283:
+	.loc 2 2032 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	.loc 2 2033 0
+	adrp	x0, .LANCHOR163
+	.loc 2 2032 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	str	x19, [sp, 16]
+	.cfi_offset 19, -16
+	.loc 2 2035 0
+	adrp	x19, .LANCHOR51
+	add	x19, x19, :lo12:.LANCHOR51
+	.loc 2 2033 0
+	str	wzr, [x0, #:lo12:.LANCHOR163]
+	.loc 2 2035 0
+	mov	x0, x19
+	bl	FtlRecoverySuperblock
+.LVL1802:
+	.loc 2 2036 0
+	mov	x0, x19
+	.loc 2 2037 0
+	adrp	x19, .LANCHOR52
+	.loc 2 2036 0
+	bl	FtlSlcSuperblockCheck
+.LVL1803:
+	.loc 2 2037 0
+	add	x19, x19, :lo12:.LANCHOR52
+	mov	x0, x19
+	bl	FtlRecoverySuperblock
+.LVL1804:
+	.loc 2 2038 0
+	mov	x0, x19
+	bl	FtlSlcSuperblockCheck
+.LVL1805:
+	.loc 2 2039 0
+	bl	FtlGcPageRecovery
+.LVL1806:
+	.loc 2 2040 0
+	mov	w0, -1
+	bl	decrement_vpc_count
+.LVL1807:
+	.loc 2 2042 0
+	mov	w0, 0
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE283:
+	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
+	.section	.text.Ftl_gc_temp_data_write_back,"ax",@progbits
+	.align	2
+	.global	Ftl_gc_temp_data_write_back
+	.type	Ftl_gc_temp_data_write_back, %function
+Ftl_gc_temp_data_write_back:
+.LFB313:
+	.loc 5 316 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	.loc 5 320 0
+	mov	w3, 0
+	mov	w2, 0
+	.loc 5 316 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -16
+	.cfi_offset 20, -8
+	.loc 5 320 0
+	adrp	x19, .LANCHOR91
+	adrp	x20, .LANCHOR121
+	ldr	w1, [x19, #:lo12:.LANCHOR91]
+	.loc 5 321 0
+	add	x19, x19, :lo12:.LANCHOR91
+	.loc 5 320 0
+	ldr	x0, [x20, #:lo12:.LANCHOR121]
+	bl	FlashProgPages
+.LVL1808:
+	.loc 5 321 0
+	mov	w11, 0
+.LVL1809:
+.L1360:
+	.loc 5 321 0 is_stmt 0 discriminator 1
+	ldr	w1, [x19]
+	cmp	w11, w1
+	bcc	.L1363
+	.loc 5 335 0 is_stmt 1
+	ldr	x0, [x20, #:lo12:.LANCHOR121]
+	bl	FtlGcBufFree
+.LVL1810:
+	.loc 5 336 0
+	str	wzr, [x19]
+	.loc 5 337 0
+	adrp	x0, .LANCHOR53+4
+	ldrh	w0, [x0, #:lo12:.LANCHOR53+4]
+	cbnz	w0, .L1364
+	.loc 5 338 0
+	mov	w0, 1
+	bl	FtlGcFreeTempBlock
+.LVL1811:
+	b	.L1366
+.LVL1812:
+.L1363:
+	.loc 5 322 0
+	ldr	x2, [x20, #:lo12:.LANCHOR121]
+	ubfiz	x0, x11, 5, 16
+	add	x1, x2, x0
+	ldr	w2, [x2, x0]
+	cmn	w2, #1
+	bne	.L1361
+	.loc 5 323 0
+	adrp	x0, .LANCHOR53
+	adrp	x3, .LANCHOR43
+	ldrh	w4, [x0, #:lo12:.LANCHOR53]
+	ldr	x3, [x3, #:lo12:.LANCHOR43]
+	strh	wzr, [x3, x4, lsl 1]
+	.loc 5 324 0
+	strh	w2, [x0, #:lo12:.LANCHOR53]
+	.loc 5 325 0
+	adrp	x0, .LANCHOR83
+	add	x0, x0, :lo12:.LANCHOR83
+	ldr	w2, [x0, 96]
+	add	w2, w2, 1
+	str	w2, [x0, 96]
+	.loc 5 326 0
+	ldr	w0, [x1, 4]
+	lsr	w0, w0, 10
+	bl	FtlBbmMapBadBlock
+.LVL1813:
+	.loc 5 327 0
+	bl	FtlBbmTblFlush
+.LVL1814:
+	.loc 5 328 0
+	bl	FtlGcPageVarInit
+.LVL1815:
+.L1366:
+	.loc 5 339 0
+	mov	w0, 1
+.L1359:
+	.loc 5 342 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL1816:
+.L1361:
+	.cfi_restore_state
+	.loc 5 331 0 discriminator 2
+	ldr	x0, [x1, 16]
+.LVL1817:
+	.loc 5 332 0 discriminator 2
+	ldr	w1, [x1, 4]
+	ldp	w2, w0, [x0, 8]
+.LVL1818:
+	bl	FtlGcUpdatePage
+.LVL1819:
+	.loc 5 321 0 discriminator 2
+	add	w11, w11, 1
+.LVL1820:
+	and	w11, w11, 65535
+.LVL1821:
+	b	.L1360
+.LVL1822:
+.L1364:
+	.loc 5 341 0
+	mov	w0, 0
+	b	.L1359
+	.cfi_endproc
+.LFE313:
+	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
+	.section	.text.Ftl_get_new_temp_ppa,"ax",@progbits
+	.align	2
+	.global	Ftl_get_new_temp_ppa
+	.type	Ftl_get_new_temp_ppa, %function
+Ftl_get_new_temp_ppa:
+.LFB312:
+	.loc 5 300 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	.loc 5 301 0
+	adrp	x0, .LANCHOR53
+	mov	w2, 65535
+	.loc 5 300 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	str	x19, [sp, 16]
+	.cfi_offset 19, -16
+	mov	x19, x0
+	.loc 5 301 0
+	ldrh	w3, [x0, #:lo12:.LANCHOR53]
+	cmp	w3, w2
+	beq	.L1368
+	add	x1, x0, :lo12:.LANCHOR53
+	.loc 5 301 0 is_stmt 0 discriminator 1
+	ldrh	w0, [x1, 4]
+	cbnz	w0, .L1369
+.L1368:
+	.loc 5 302 0 is_stmt 1
+	bl	FtlCacheWriteBack
+.LVL1823:
+	.loc 5 303 0
+	mov	w0, 0
+	bl	FtlGcFreeTempBlock
+.LVL1824:
+	.loc 5 304 0
+	add	x0, x19, :lo12:.LANCHOR53
+	strb	wzr, [x0, 8]
+	.loc 5 305 0
+	bl	allocate_data_superblock
+.LVL1825:
+	.loc 5 306 0
+	adrp	x0, .LANCHOR97
+	strh	wzr, [x0, #:lo12:.LANCHOR97]
+	.loc 5 307 0
+	adrp	x0, .LANCHOR99
+	strh	wzr, [x0, #:lo12:.LANCHOR99]
+	.loc 5 308 0
+	bl	l2p_flush
+.LVL1826:
+	.loc 5 309 0
+	mov	w0, 0
+	bl	FtlEctTblFlush
+.LVL1827:
+	.loc 5 310 0
+	bl	FtlVpcTblFlush
+.LVL1828:
+.L1369:
+	.loc 5 312 0
+	add	x0, x19, :lo12:.LANCHOR53
+	.loc 5 313 0
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_def_cfa 31, 0
+	.loc 5 312 0
+	b	get_new_active_ppa
+.LVL1829:
+	.cfi_endproc
+.LFE312:
+	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
+	.section	.text.rk_ftl_garbage_collect,"ax",@progbits
+	.align	2
+	.global	rk_ftl_garbage_collect
+	.type	rk_ftl_garbage_collect, %function
+rk_ftl_garbage_collect:
+.LFB319:
+	.loc 5 470 0
+	.cfi_startproc
+.LVL1830:
+	stp	x29, x30, [sp, -192]!
+	.cfi_def_cfa_offset 192
+	.cfi_offset 29, -192
+	.cfi_offset 30, -184
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -160
+	.cfi_offset 22, -152
+	.loc 5 478 0
+	adrp	x22, .LANCHOR117
+	.loc 5 470 0
+	stp	x19, x20, [sp, 16]
+	.loc 5 478 0
+	ldr	w1, [x22, #:lo12:.LANCHOR117]
+.LVL1831:
+	.loc 5 470 0
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 19, -176
+	.cfi_offset 20, -168
+	.cfi_offset 23, -144
+	.cfi_offset 24, -136
+	.cfi_offset 25, -128
+	.cfi_offset 26, -120
+	.cfi_offset 27, -112
+	.cfi_offset 28, -104
+	.loc 5 478 0
+	cbnz	w1, .L1443
+	.loc 5 481 0
+	adrp	x1, .LANCHOR45
+	ldrh	w1, [x1, #:lo12:.LANCHOR45]
+	cmp	w1, 47
+	bls	.L1443
+	mov	w24, w0
+	.loc 5 485 0
+	adrp	x0, .LANCHOR157
+.LVL1832:
+	ldrh	w1, [x0, #:lo12:.LANCHOR157]
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L1373
+.L1376:
+.LVL1833:
+.LBB287:
+.LBB288:
+	.loc 5 489 0
+	adrp	x0, .LANCHOR102
+	mov	w3, 65535
+	ldrh	w2, [x0, #:lo12:.LANCHOR102]
+	cmp	w2, w3
+	bne	.L1374
+.L1375:
+	.loc 5 496 0
+	adrp	x2, .LANCHOR86
+	.loc 5 497 0
+	adrp	x19, .LANCHOR82
+	mov	w20, 65535
+	.loc 5 496 0
+	ldr	w1, [x2, #:lo12:.LANCHOR86]
+	.loc 5 497 0
+	ldrh	w0, [x19, #:lo12:.LANCHOR82]
+	.loc 5 496 0
+	add	w1, w1, 1
+	add	w1, w1, w24, lsl 7
+	str	w1, [x2, #:lo12:.LANCHOR86]
+	.loc 5 497 0
+	cmp	w0, w20
+	bne	.L1377
+	adrp	x3, .LANCHOR53
+	ldrh	w20, [x3, #:lo12:.LANCHOR53]
+	cmp	w20, w0
+	bne	.L1446
+	adrp	x0, .LANCHOR101
+	ldrh	w21, [x0, #:lo12:.LANCHOR101]
+	cmp	w21, w20
+	bne	.L1377
+	.loc 5 498 0
+	adrp	x23, .LANCHOR48
+	mov	w3, 1024
+	ldrh	w0, [x23, #:lo12:.LANCHOR48]
+	cmp	w0, 24
+	mov	w0, 5120
+	csel	w0, w0, w3, cc
+	cmp	w1, w0
+	bls	.L1449
+.LBB289:
+	.loc 5 502 0
+	adrp	x0, .LANCHOR174
+	.loc 5 501 0
+	str	wzr, [x2, #:lo12:.LANCHOR86]
+	.loc 5 502 0
+	strh	wzr, [x0, #:lo12:.LANCHOR174]
+	.loc 5 503 0
+	bl	GetSwlReplaceBlock
+.LVL1834:
+	and	w20, w0, 65535
+.LVL1835:
+	.loc 5 504 0
+	cmp	w20, w21
+	bne	.L1450
+	.loc 5 505 0
+	adrp	x5, .LANCHOR85
+	ldrh	w1, [x23, #:lo12:.LANCHOR48]
+	ldrh	w0, [x5, #:lo12:.LANCHOR85]
+.LVL1836:
+	cmp	w1, w0
+	bcs	.L1380
+	.loc 5 506 0
+	mov	w0, 64
+	bl	List_get_gc_head_node
+.LVL1837:
+	and	w0, w0, 65535
+.LVL1838:
+	.loc 5 507 0
+	cmp	w0, w20
+	beq	.L1382
+	.loc 5 508 0
+	adrp	x1, .LANCHOR43
+	ubfiz	x0, x0, 1, 16
+.LVL1839:
+	ldr	x1, [x1, #:lo12:.LANCHOR43]
+	ldrh	w0, [x1, x0]
+	cmp	w0, 7
+	bhi	.L1383
+	.loc 5 509 0
+	mov	w0, 0
+	bl	List_get_gc_head_node
+.LVL1840:
+	and	w21, w0, 65535
+.LVL1841:
+	.loc 5 510 0
+	mov	w0, 128
+	strh	w0, [x5, #:lo12:.LANCHOR85]
+	.loc 5 520 0
+	cmp	w21, w20
+	bne	.L1379
+.LVL1842:
+.L1382:
+	.loc 5 523 0
+	bl	FtlGcReFreshBadBlk
+.LVL1843:
+.L1377:
+.LBE289:
+	.loc 5 527 0
+	cmp	w24, 0
+	mov	w0, 65535
+	ccmp	w20, w0, 0, eq
+	bne	.L1385
+	.loc 5 528 0
+	adrp	x0, .LANCHOR48
+	ldrh	w0, [x0, #:lo12:.LANCHOR48]
+	cmp	w0, 24
+	bhi	.L1451
+	adrp	x1, .LANCHOR19
+	.loc 5 530 0
+	cmp	w0, 16
+	.loc 5 531 0
+	ldrh	w21, [x1, #:lo12:.LANCHOR19]
+	.loc 5 530 0
+	bls	.L1387
+	.loc 5 531 0
+	lsr	w21, w21, 5
+.LVL1844:
+.L1386:
+	.loc 5 539 0
+	adrp	x2, .LANCHOR84
+	mov	x3, x2
+	ldrh	w1, [x2, #:lo12:.LANCHOR84]
+	cmp	w1, w0
+	bcs	.L1390
+	.loc 5 540 0
+	adrp	x0, .LANCHOR53
+	mov	w1, 65535
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+	cmp	w0, w1
+	bne	.L1391
+	adrp	x1, .LANCHOR101
+	ldrh	w1, [x1, #:lo12:.LANCHOR101]
+	cmp	w1, w0
+	bne	.L1391
+	.loc 5 542 0
+	adrp	x0, .LANCHOR174
+	ldrh	w0, [x0, #:lo12:.LANCHOR174]
+	cbnz	w0, .L1392
+	adrp	x1, .LANCHOR62
+	adrp	x4, .LANCHOR60
+	ldr	w1, [x1, #:lo12:.LANCHOR62]
+	ldr	w4, [x4, #:lo12:.LANCHOR60]
+	add	w1, w1, w1, lsl 1
+	cmp	w4, w1, lsr 2
+	bcs	.L1393
+.L1392:
+	.loc 5 543 0
+	adrp	x1, .LANCHOR80
+	ldrh	w1, [x1, #:lo12:.LANCHOR80]
+	add	w1, w1, w1, lsl 1
+	asr	w1, w1, 2
+	strh	w1, [x3, #:lo12:.LANCHOR84]
+.L1394:
+	.loc 5 546 0
+	adrp	x1, .LANCHOR89
+	str	wzr, [x1, #:lo12:.LANCHOR89]
+.LVL1845:
+.L1371:
+.LBE288:
+.LBE287:
+	.loc 5 758 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 192
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL1846:
+.L1373:
+	.cfi_restore_state
+	.loc 5 485 0 discriminator 1
+	adrp	x1, .LANCHOR53
+	ldrh	w1, [x1, #:lo12:.LANCHOR53]
+	cmp	w1, w0
+	beq	.L1376
+	.loc 5 486 0
+	mov	w0, 1
+	bl	FtlGcFreeTempBlock
+.LVL1847:
+	cbz	w0, .L1376
+	.loc 5 487 0
+	mov	w0, 1
+	b	.L1371
+.LVL1848:
+.L1374:
+.LBB292:
+.LBB291:
+	.loc 5 489 0
+	adrp	x1, .LANCHOR101
+	ldrh	w4, [x1, #:lo12:.LANCHOR101]
+	cmp	w4, w3
+	bne	.L1375
+	.loc 5 490 0
+	strh	w2, [x1, #:lo12:.LANCHOR101]
+	.loc 5 491 0
+	mov	w1, -1
+	strh	w1, [x0, #:lo12:.LANCHOR102]
+	b	.L1375
+.LVL1849:
+.L1383:
+.LBB290:
+	.loc 5 512 0
+	mov	w0, 64
+.L1475:
+	.loc 5 516 0
+	strh	w0, [x5, #:lo12:.LANCHOR85]
+	b	.L1382
+.L1380:
+	mov	w0, 80
+	b	.L1475
+.LVL1850:
+.L1450:
+	.loc 5 504 0
+	mov	w21, w20
+.LVL1851:
+.L1379:
+	.loc 5 521 0
+	adrp	x1, .LANCHOR40
+	ubfiz	x0, x21, 1, 32
+	adrp	x3, .LANCHOR84
+	mov	w20, w21
+	ldr	x2, [x1, #:lo12:.LANCHOR40]
+	adrp	x1, .LANCHOR43
+	ldrh	w5, [x3, #:lo12:.LANCHOR84]
+	ldr	x1, [x1, #:lo12:.LANCHOR43]
+	ldrh	w4, [x2, x0]
+	ldrh	w2, [x23, #:lo12:.LANCHOR48]
+	ldrh	w3, [x1, x0]
+	mov	w1, w21
+	adrp	x0, .LC104
+	add	x0, x0, :lo12:.LC104
+	bl	printf
+.LVL1852:
+	b	.L1382
+.LVL1853:
+.L1446:
+.LBE290:
+	.loc 5 473 0
+	mov	w20, w0
+	b	.L1377
+.L1449:
+	mov	w20, w21
+	b	.L1377
+.LVL1854:
+.L1387:
+	.loc 5 532 0
+	cmp	w0, 12
+	bls	.L1388
+	.loc 5 533 0
+	lsr	w21, w21, 4
+.LVL1855:
+	b	.L1386
+.LVL1856:
+.L1388:
+	.loc 5 534 0
+	cmp	w0, 8
+	bls	.L1386
+	.loc 5 535 0
+	lsr	w21, w21, 2
+.LVL1857:
+	b	.L1386
+.LVL1858:
+.L1451:
+	.loc 5 529 0
+	mov	w21, 1
+	b	.L1386
+.LVL1859:
+.L1393:
+	.loc 5 545 0
+	mov	w1, 18
+	strh	w1, [x2, #:lo12:.LANCHOR84]
+	b	.L1394
+.L1391:
+	.loc 5 549 0
+	adrp	x0, .LANCHOR80
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	add	w0, w0, w0, lsl 1
+	asr	w0, w0, 2
+	strh	w0, [x3, #:lo12:.LANCHOR84]
+.L1390:
+	.loc 5 551 0
+	adrp	x0, .LANCHOR103
+	ldrh	w0, [x0, #:lo12:.LANCHOR103]
+	cbz	w0, .L1452
+	.loc 5 552 0
+	add	w21, w21, 32
+.LVL1860:
+	and	w21, w21, 65535
+.LVL1861:
+.L1452:
+	.loc 5 551 0
+	mov	w20, 65535
+.LVL1862:
+.L1396:
+	.loc 5 597 0
+	ldrh	w0, [x19, #:lo12:.LANCHOR82]
+	mov	w1, 65535
+	cmp	w0, w1
+	bne	.L1405
+	.loc 5 598 0
+	cmp	w20, w0
+	beq	.L1406
+	.loc 5 599 0
+	strh	w20, [x19, #:lo12:.LANCHOR82]
+.LVL1863:
+.L1407:
+	.loc 5 610 0
+	add	x0, x19, :lo12:.LANCHOR82
+	.loc 5 611 0
+	mov	w1, 65535
+	.loc 5 610 0
+	strb	wzr, [x0, 8]
+	.loc 5 611 0
+	ldrh	w0, [x19, #:lo12:.LANCHOR82]
+	cmp	w0, w1
+	beq	.L1405
+	.loc 5 612 0
+	bl	IsBlkInGcList
+.LVL1864:
+	cbz	w0, .L1410
+	.loc 5 613 0
+	mov	w0, -1
+	strh	w0, [x19, #:lo12:.LANCHOR82]
+.L1410:
+	.loc 5 615 0
+	ldrh	w1, [x19, #:lo12:.LANCHOR82]
+	mov	w0, 65535
+	add	x23, x19, :lo12:.LANCHOR82
+	cmp	w1, w0
+	beq	.L1405
+	.loc 5 616 0
+	mov	x0, x23
+	bl	make_superblock
+.LVL1865:
+	.loc 5 619 0
+	adrp	x0, .LANCHOR175
+	.loc 5 620 0
+	ldrh	w1, [x19, #:lo12:.LANCHOR82]
+	.loc 5 617 0
+	strh	wzr, [x23, 2]
+	.loc 5 619 0
+	strh	wzr, [x0, #:lo12:.LANCHOR175]
+	.loc 5 620 0
+	adrp	x0, .LANCHOR43
+	.loc 5 618 0
+	strb	wzr, [x23, 6]
+	.loc 5 620 0
+	ldr	x0, [x0, #:lo12:.LANCHOR43]
+	ldrh	w1, [x0, x1, lsl 1]
+	adrp	x0, .LANCHOR176
+	strh	w1, [x0, #:lo12:.LANCHOR176]
+.L1405:
+	.loc 5 625 0
+	adrp	x0, .LANCHOR51
+	ldrh	w1, [x19, #:lo12:.LANCHOR82]
+	str	x0, [x29, 136]
+	ldrh	w2, [x0, #:lo12:.LANCHOR51]
+	cmp	w2, w1
+	beq	.L1411
+	adrp	x0, .LANCHOR52
+	str	x0, [x29, 128]
+	ldrh	w2, [x0, #:lo12:.LANCHOR52]
+	cmp	w2, w1
+	beq	.L1411
+	.loc 5 635 0
+	adrp	x24, .LANCHOR87
+.LVL1866:
+	.loc 5 657 0
+	add	x0, x24, :lo12:.LANCHOR87
+	str	x0, [x29, 160]
+.L1412:
+	.loc 5 631 0
+	ldrh	w1, [x19, #:lo12:.LANCHOR82]
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L1413
+	.loc 5 632 0
+	adrp	x0, .LANCHOR89
+	.loc 5 645 0
+	adrp	x25, .LANCHOR19
+	add	x25, x25, :lo12:.LANCHOR19
+	.loc 5 632 0
+	str	wzr, [x0, #:lo12:.LANCHOR89]
+.L1414:
+	.loc 5 635 0
+	ldrh	w5, [x24, #:lo12:.LANCHOR87]
+	add	x7, x24, :lo12:.LANCHOR87
+	mov	w0, w5
+	bl	List_get_gc_head_node
+.LVL1867:
+	and	w6, w0, 65535
+	strh	w6, [x19, #:lo12:.LANCHOR82]
+	.loc 5 636 0
+	mov	w0, 65535
+	cmp	w6, w0
+	bne	.L1415
+	.loc 5 637 0
+	strh	wzr, [x7]
+	.loc 5 638 0
+	mov	w0, 8
+	b	.L1371
+.LVL1868:
+.L1385:
+	.loc 5 557 0
+	adrp	x1, .LANCHOR53
+	ldrh	w1, [x1, #:lo12:.LANCHOR53]
+	cmp	w1, w0
+	bne	.L1455
+	adrp	x0, .LANCHOR101
+	ldrh	w0, [x0, #:lo12:.LANCHOR101]
+	cmp	w0, w1
+	bne	.L1455
+	cmp	w20, w0
+	bne	.L1455
+	ldrh	w0, [x19, #:lo12:.LANCHOR82]
+	cmp	w0, w20
+	beq	.L1397
+.LVL1869:
+.L1455:
+	.loc 5 556 0
+	mov	w21, 1
+	b	.L1396
+.LVL1870:
+.L1397:
+	.loc 5 558 0
+	adrp	x0, .LANCHOR89
+	.loc 5 560 0
+	adrp	x21, .LANCHOR48
+	adrp	x23, .LANCHOR174
+	.loc 5 558 0
+	str	wzr, [x0, #:lo12:.LANCHOR89]
+	.loc 5 560 0
+	adrp	x0, .LANCHOR84
+	ldrh	w6, [x21, #:lo12:.LANCHOR48]
+	mov	x2, x0
+	ldrh	w1, [x0, #:lo12:.LANCHOR84]
+	cmp	w1, w6
+	.loc 5 561 0
+	ldrh	w1, [x23, #:lo12:.LANCHOR174]
+	.loc 5 560 0
+	bcs	.L1398
+	.loc 5 561 0
+	cbnz	w1, .L1399
+	adrp	x1, .LANCHOR62
+	adrp	x3, .LANCHOR60
+	ldr	w1, [x1, #:lo12:.LANCHOR62]
+	ldr	w3, [x3, #:lo12:.LANCHOR60]
+	add	w1, w1, w1, lsl 1
+	cmp	w3, w1, lsr 2
+	bcs	.L1400
+.L1399:
+	.loc 5 562 0
+	adrp	x0, .LANCHOR80
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	add	w0, w0, w0, lsl 1
+	asr	w0, w0, 2
+	strh	w0, [x2, #:lo12:.LANCHOR84]
+.LVL1871:
+.L1476:
+	.loc 5 578 0
+	bl	FtlReadRefresh
+.LVL1872:
+	.loc 5 579 0
+	ldrh	w0, [x23, #:lo12:.LANCHOR174]
+	b	.L1371
+.LVL1873:
+.L1400:
+	.loc 5 564 0
+	mov	w1, 18
+	strh	w1, [x0, #:lo12:.LANCHOR84]
+	b	.L1476
+.L1398:
+	.loc 5 572 0
+	cbnz	w1, .L1455
+	.loc 5 573 0
+	adrp	x1, .LANCHOR80
+	ldrh	w5, [x1, #:lo12:.LANCHOR80]
+	add	w1, w5, w5, lsl 1
+	asr	w1, w1, 2
+	strh	w1, [x0, #:lo12:.LANCHOR84]
+	.loc 5 574 0
+	mov	w0, 0
+	bl	List_get_gc_head_node
+.LVL1874:
+	.loc 5 575 0
+	ubfiz	x0, x0, 1, 16
+.LVL1875:
+	adrp	x1, .LANCHOR43
+	adrp	x2, .LANCHOR3
+	ldr	x1, [x1, #:lo12:.LANCHOR43]
+	ldrh	w2, [x2, #:lo12:.LANCHOR3]
+	ldrh	w1, [x1, x0]
+	adrp	x0, .LANCHOR20
+	ldrh	w0, [x0, #:lo12:.LANCHOR20]
+	mul	w0, w0, w2
+	cmp	w1, w0, asr 1
+	ble	.L1403
+	.loc 5 576 0
+	sub	w5, w5, #1
+	.loc 5 575 0
+	cmp	w6, w5
+	bge	.L1476
+.L1403:
+	.loc 5 584 0
+	cbnz	w1, .L1455
+	.loc 5 585 0
+	mov	w0, -1
+	bl	decrement_vpc_count
+.LVL1876:
+	.loc 5 586 0
+	ldrh	w0, [x21, #:lo12:.LANCHOR48]
+	add	w0, w0, 1
+	b	.L1371
+.LVL1877:
+.L1406:
+	.loc 5 600 0
+	adrp	x0, .LANCHOR101
+	ldrh	w1, [x0, #:lo12:.LANCHOR101]
+	cmp	w1, w20
+	beq	.L1407
+	.loc 5 604 0
+	adrp	x2, .LANCHOR43
+	ubfiz	x1, x1, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR43]
+	ldrh	w1, [x2, x1]
+	cbnz	w1, .L1408
+	.loc 5 605 0
+	mov	w1, -1
+	strh	w1, [x0, #:lo12:.LANCHOR101]
+.L1408:
+	.loc 5 606 0
+	ldrh	w1, [x0, #:lo12:.LANCHOR101]
+	strh	w1, [x19, #:lo12:.LANCHOR82]
+	.loc 5 607 0
+	mov	w1, -1
+	strh	w1, [x0, #:lo12:.LANCHOR101]
+	b	.L1407
+.LVL1878:
+.L1411:
+	.loc 5 626 0
+	mov	w0, -1
+	strh	w0, [x19, #:lo12:.LANCHOR82]
+.LVL1879:
+.L1477:
+	.loc 5 734 0
+	adrp	x0, .LANCHOR174
+	ldrh	w0, [x0, #:lo12:.LANCHOR174]
+	b	.L1371
+.LVL1880:
+.L1415:
+	.loc 5 640 0
+	mov	w0, w6
+	bl	IsBlkInGcList
+.LVL1881:
+	add	w5, w5, 1
+	cbz	w0, .L1416
+	.loc 5 641 0
+	strh	w5, [x24, #:lo12:.LANCHOR87]
+	b	.L1414
+.L1416:
+	.loc 5 645 0
+	adrp	x23, .LANCHOR43
+	adrp	x4, .LANCHOR3
+	ldrh	w0, [x25]
+	ubfiz	x1, x6, 1, 16
+	ldr	x2, [x23, #:lo12:.LANCHOR43]
+	.loc 5 644 0
+	and	w5, w5, 65535
+	.loc 5 645 0
+	ldrh	w4, [x4, #:lo12:.LANCHOR3]
+	.loc 5 644 0
+	strh	w5, [x24, #:lo12:.LANCHOR87]
+	.loc 5 645 0
+	ldrh	w3, [x2, x1]
+	mul	w0, w0, w4
+	cmp	w3, w0, asr 1
+	bgt	.L1418
+	.loc 5 646 0
+	cmp	w5, 48
+	bls	.L1419
+	cmp	w3, 8
+	bls	.L1419
+	adrp	x3, .LANCHOR97
+	ldrh	w3, [x3, #:lo12:.LANCHOR97]
+	cmp	w3, 35
+	bhi	.L1419
+.L1418:
+	.loc 5 647 0
+	ldr	x3, [x29, 160]
+	strh	wzr, [x3]
+.L1419:
+	.loc 5 649 0
+	ldrh	w1, [x2, x1]
+	cmp	w0, w1
+	bgt	.L1420
+	mov	w0, 65535
+	cmp	w20, w0
+	bne	.L1420
+	.loc 5 650 0
+	mov	w0, -1
+	strh	w0, [x19, #:lo12:.LANCHOR82]
+	.loc 5 651 0
+	adrp	x0, .LANCHOR87
+	strh	wzr, [x0, #:lo12:.LANCHOR87]
+	b	.L1477
+.L1420:
+	.loc 5 655 0
+	cbnz	w1, .L1421
+	.loc 5 656 0
+	mov	w0, -1
+	bl	decrement_vpc_count
+.LVL1882:
+	.loc 5 657 0
+	ldr	x0, [x29, 160]
+	ldr	x1, [x29, 160]
+	ldrh	w0, [x0]
+	add	w0, w0, 1
+	strh	w0, [x1]
+	b	.L1414
+.L1421:
+	.loc 5 660 0
+	add	x0, x19, :lo12:.LANCHOR82
+	strb	wzr, [x0, 8]
+	.loc 5 662 0
+	ldr	x0, [x29, 136]
+	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+	cmp	w0, w6
+	bne	.L1422
+	adrp	x1, .LANCHOR177
+	adrp	x0, .LC1
+	mov	w2, 662
+	add	x1, x1, :lo12:.LANCHOR177
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1883:
+.L1422:
+	.loc 5 663 0
+	ldr	x0, [x29, 128]
+	ldrh	w1, [x19, #:lo12:.LANCHOR82]
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
+	cmp	w1, w0
+	bne	.L1423
+	adrp	x1, .LANCHOR177
+	adrp	x0, .LC1
+	mov	w2, 663
+	add	x1, x1, :lo12:.LANCHOR177
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1884:
+.L1423:
+	.loc 5 664 0
+	adrp	x0, .LANCHOR53
+	ldrh	w1, [x19, #:lo12:.LANCHOR82]
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+	cmp	w1, w0
+	bne	.L1424
+	adrp	x1, .LANCHOR177
+	adrp	x0, .LC1
+	mov	w2, 664
+	add	x1, x1, :lo12:.LANCHOR177
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1885:
+.L1424:
+	.loc 5 665 0
+	add	x25, x19, :lo12:.LANCHOR82
+	mov	x0, x25
+	bl	make_superblock
+.LVL1886:
+	.loc 5 666 0
+	adrp	x0, .LANCHOR175
+	.loc 5 667 0
+	ldrh	w1, [x19, #:lo12:.LANCHOR82]
+	.loc 5 666 0
+	strh	wzr, [x0, #:lo12:.LANCHOR175]
+	.loc 5 667 0
+	ldr	x0, [x23, #:lo12:.LANCHOR43]
+	ldrh	w1, [x0, x1, lsl 1]
+	adrp	x0, .LANCHOR176
+	.loc 5 668 0
+	strh	wzr, [x25, 2]
+	.loc 5 667 0
+	strh	w1, [x0, #:lo12:.LANCHOR176]
+	.loc 5 669 0
+	strb	wzr, [x25, 6]
+.L1413:
+	.loc 5 675 0
+	bl	FtlReadRefresh
+.LVL1887:
+	.loc 5 679 0
+	adrp	x1, .LANCHOR19
+	.loc 5 678 0
+	mov	w0, 1
+	str	w0, [x22, #:lo12:.LANCHOR117]
+	.loc 5 679 0
+	ldrh	w0, [x1, #:lo12:.LANCHOR19]
+	str	w0, [x29, 172]
+.LVL1888:
+	.loc 5 680 0
+	add	x0, x19, :lo12:.LANCHOR82
+	str	x1, [x29, 120]
+	ldr	w3, [x29, 172]
+	ldrh	w0, [x0, 2]
+	add	w2, w0, w21
+	cmp	w2, w3
+	ble	.L1425
+	.loc 5 681 0
+	sub	w21, w3, w0
+.LVL1889:
+	and	w21, w21, 65535
+.LVL1890:
+.L1425:
+	.loc 5 704 0
+	adrp	x0, .LANCHOR175
+	.loc 5 693 0
+	mov	w27, 0
+	.loc 5 704 0
+	add	x0, x0, :lo12:.LANCHOR175
+	str	x0, [x29, 152]
+.LVL1891:
+.L1426:
+	.loc 5 683 0
+	cmp	w21, w27, uxth
+	bls	.L1434
+	.loc 5 688 0
+	add	x1, x19, :lo12:.LANCHOR82
+	.loc 5 685 0
+	adrp	x0, .LANCHOR3
+	.loc 5 688 0
+	adrp	x25, .LANCHOR95
+	add	x1, x1, 16
+	.loc 5 685 0
+	ldrh	w7, [x0, #:lo12:.LANCHOR3]
+	.loc 5 688 0
+	mov	w23, 0
+	ldrh	w4, [x1, -14]
+	mov	w2, 0
+	ldr	x0, [x25, #:lo12:.LANCHOR95]
+	.loc 5 687 0
+	mov	w6, 65535
+	.loc 5 688 0
+	add	w4, w4, w27
+	b	.L1435
+.LVL1892:
+.L1428:
+	.loc 5 686 0
+	ldrh	w3, [x1]
+.LVL1893:
+	.loc 5 687 0
+	cmp	w3, w6
+	beq	.L1427
+	.loc 5 688 0
+	ubfiz	x5, x23, 5, 16
+	.loc 5 689 0
+	add	w23, w23, 1
+.LVL1894:
+	.loc 5 688 0
+	add	x5, x0, x5
+	.loc 5 689 0
+	and	w23, w23, 65535
+.LVL1895:
+	.loc 5 688 0
+	orr	w3, w4, w3, lsl 10
+.LVL1896:
+	str	w3, [x5, 4]
+.L1427:
+	.loc 5 685 0
+	add	w2, w2, 1
+.LVL1897:
+	add	x1, x1, 2
+.LVL1898:
+	and	w2, w2, 65535
+.LVL1899:
+.L1435:
+	cmp	w2, w7
+	bne	.L1428
+	.loc 5 693 0
+	add	x1, x19, :lo12:.LANCHOR82
+	.loc 5 705 0
+	adrp	x26, .LANCHOR91
+	add	x26, x26, :lo12:.LANCHOR91
+	.loc 5 693 0
+	ldrb	w2, [x1, 8]
+.LVL1900:
+	mov	w1, w23
+	bl	FlashReadPages
+.LVL1901:
+	ubfiz	x0, x23, 5, 16
+	mov	x23, 0
+.LVL1902:
+	str	x0, [x29, 144]
+.LVL1903:
+.L1429:
+	.loc 5 695 0
+	ldr	x0, [x29, 144]
+	cmp	x0, x23
+	bne	.L1433
+.LVL1904:
+	add	w27, w27, 1
+.LVL1905:
+	b	.L1426
+.LVL1906:
+.L1433:
+	.loc 5 696 0
+	ldr	x0, [x25, #:lo12:.LANCHOR95]
+	add	x1, x0, x23
+.LVL1907:
+	.loc 5 697 0
+	ldr	w0, [x0, x23]
+	cmn	w0, #1
+	beq	.L1430
+	.loc 5 696 0
+	ldr	x28, [x1, 16]
+	.loc 5 697 0
+	mov	w0, 61589
+	ldrh	w1, [x28]
+.LVL1908:
+	cmp	w1, w0
+	bne	.L1430
+	.loc 5 699 0
+	ldr	w4, [x28, 8]
+.LVL1909:
+	.loc 5 700 0
+	cmn	w4, #1
+	bne	.L1431
+	str	w4, [x29, 112]
+	mov	w2, 700
+	adrp	x1, .LANCHOR177
+	adrp	x0, .LC1
+	add	x1, x1, :lo12:.LANCHOR177
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1910:
+	ldr	w4, [x29, 112]
+.LVL1911:
+.L1431:
+	.loc 5 701 0
+	mov	w2, 0
+	add	x1, x29, 188
+	mov	w0, w4
+	bl	log2phys
+.LVL1912:
+	.loc 5 702 0
+	ldr	x0, [x25, #:lo12:.LANCHOR95]
+	ldr	w1, [x29, 188]
+	add	x0, x0, x23
+	ldr	w2, [x0, 4]
+	cmp	w2, w1
+	bne	.L1430
+	.loc 5 704 0
+	ldr	x1, [x29, 152]
+	.loc 5 705 0
+	adrp	x4, .LANCHOR121
+	.loc 5 704 0
+	ldr	x2, [x29, 152]
+	.loc 5 705 0
+	ldr	w0, [x0, 24]
+	.loc 5 704 0
+	ldrh	w1, [x1]
+	add	w1, w1, 1
+	strh	w1, [x2]
+	.loc 5 705 0
+	ldr	x2, [x4, #:lo12:.LANCHOR121]
+	ldr	w1, [x26]
+	add	x1, x2, x1, lsl 5
+	stp	x4, x1, [x29, 104]
+	str	w0, [x1, 24]
+	.loc 5 706 0
+	bl	Ftl_get_new_temp_ppa
+.LVL1913:
+	ldp	x4, x1, [x29, 104]
+	.loc 5 707 0
+	ldr	x2, [x4, #:lo12:.LANCHOR121]
+	.loc 5 706 0
+	str	w0, [x1, 4]
+	.loc 5 707 0
+	ldr	w1, [x26]
+	ubfiz	x0, x1, 5, 32
+	.loc 5 715 0
+	add	w1, w1, 1
+	.loc 5 707 0
+	add	x2, x2, x0
+	ldr	x0, [x25, #:lo12:.LANCHOR95]
+	add	x0, x0, x23
+	ldr	x4, [x0, 8]
+	str	x4, [x2, 8]
+	.loc 5 708 0
+	ldr	x4, [x0, 16]
+	str	x4, [x2, 16]
+	.loc 5 709 0
+	ldr	w2, [x29, 188]
+	str	w2, [x28, 12]
+	.loc 5 710 0
+	adrp	x2, .LANCHOR53
+	add	x11, x2, :lo12:.LANCHOR53
+	ldrh	w2, [x2, #:lo12:.LANCHOR53]
+	strh	w2, [x28, 2]
+	.loc 5 713 0
+	adrp	x2, .LANCHOR72
+	.loc 5 715 0
+	str	w1, [x26]
+	.loc 5 716 0
+	mov	w1, 1
+	.loc 5 713 0
+	ldr	w2, [x2, #:lo12:.LANCHOR72]
+	str	w2, [x28, 4]
+	.loc 5 716 0
+	bl	FtlGcBufAlloc
+.LVL1914:
+	.loc 5 717 0
+	ldrb	w1, [x11, 7]
+	ldr	w0, [x26]
+	cmp	w1, w0
+	beq	.L1432
+	ldrh	w0, [x11, 4]
+	cbnz	w0, .L1430
+.L1432:
+	.loc 5 718 0
+	bl	Ftl_gc_temp_data_write_back
+.LVL1915:
+	cbz	w0, .L1430
+.LVL1916:
+.L1478:
+	.loc 5 733 0
+	str	wzr, [x22, #:lo12:.LANCHOR117]
+	b	.L1477
+.LVL1917:
+.L1430:
+	add	x23, x23, 32
+	b	.L1429
+.L1434:
+	.loc 5 727 0
+	add	x1, x19, :lo12:.LANCHOR82
+	ldrh	w0, [x1, 2]
+	add	w21, w21, w0
+.LVL1918:
+	.loc 5 729 0
+	ldr	w0, [x29, 172]
+	.loc 5 727 0
+	and	w21, w21, 65535
+	strh	w21, [x1, 2]
+	.loc 5 729 0
+	cmp	w0, w21
+	bls	.L1436
+	adrp	x0, .LANCHOR175
+	ldrh	w1, [x0, #:lo12:.LANCHOR175]
+	adrp	x0, .LANCHOR176
+	ldrh	w0, [x0, #:lo12:.LANCHOR176]
+	cmp	w1, w0
+	bne	.L1437
+.L1436:
+	.loc 5 731 0
+	adrp	x0, .LANCHOR91
+	ldr	w0, [x0, #:lo12:.LANCHOR91]
+	cbz	w0, .L1438
+	.loc 5 732 0
+	bl	Ftl_gc_temp_data_write_back
+.LVL1919:
+	cbnz	w0, .L1478
+.L1438:
+	.loc 5 737 0
+	adrp	x0, .LANCHOR175
+	ldrh	w0, [x0, #:lo12:.LANCHOR175]
+	cbnz	w0, .L1439
+	ldrh	w0, [x19, #:lo12:.LANCHOR82]
+	adrp	x1, .LANCHOR43
+	ldr	x1, [x1, #:lo12:.LANCHOR43]
+	lsl	x0, x0, 1
+	ldrh	w2, [x1, x0]
+	cbz	w2, .L1439
+	.loc 5 739 0
+	strh	wzr, [x1, x0]
+	.loc 5 740 0
+	ldrh	w0, [x19, #:lo12:.LANCHOR82]
+	bl	update_vpc_list
+.LVL1920:
+	.loc 5 741 0
+	bl	FtlCacheWriteBack
+.LVL1921:
+	.loc 5 742 0
+	bl	l2p_flush
+.LVL1922:
+	.loc 5 743 0
+	bl	FtlVpcTblFlush
+.LVL1923:
+.L1439:
+	.loc 5 745 0
+	mov	w0, -1
+	strh	w0, [x19, #:lo12:.LANCHOR82]
+.L1437:
+	.loc 5 747 0
+	adrp	x0, .LANCHOR48
+	ldrh	w0, [x0, #:lo12:.LANCHOR48]
+	cmp	w0, 2
+	bhi	.L1440
+	.loc 5 749 0
+	ldr	x0, [x29, 120]
+	ldrh	w21, [x0, #:lo12:.LANCHOR19]
+.LVL1924:
+	b	.L1412
+.LVL1925:
+.L1440:
+	.loc 5 754 0
+	adrp	x1, .LANCHOR174
+	.loc 5 752 0
+	str	wzr, [x22, #:lo12:.LANCHOR117]
+	.loc 5 754 0
+	ldrh	w1, [x1, #:lo12:.LANCHOR174]
+	.loc 5 755 0
+	cmp	w1, 0
+	csinc	w0, w1, w0, ne
+	b	.L1371
+.LVL1926:
+.L1443:
+.LBE291:
+.LBE292:
+	.loc 5 479 0
+	mov	w0, 0
+.LVL1927:
+	b	.L1371
+	.cfi_endproc
+.LFE319:
+	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
+	.section	.text.sftl_gc,"ax",@progbits
+	.align	2
+	.global	sftl_gc
+	.type	sftl_gc, %function
+sftl_gc:
+.LFB320:
+	.loc 5 761 0
+	.cfi_startproc
+	.loc 5 762 0
+	mov	w1, 1
+	mov	w0, w1
+	b	rk_ftl_garbage_collect
+.LVL1928:
+	.cfi_endproc
+.LFE320:
+	.size	sftl_gc, .-sftl_gc
+	.section	.text.FtlRead,"ax",@progbits
+	.align	2
+	.global	FtlRead
+	.type	FtlRead, %function
+FtlRead:
+.LFB214:
+	.loc 3 814 0
+	.cfi_startproc
+.LVL1929:
+	stp	x29, x30, [sp, -176]!
+	.cfi_def_cfa_offset 176
+	.cfi_offset 29, -176
+	.cfi_offset 30, -168
+	and	w0, w0, 255
+	.loc 3 824 0
+	cmp	w0, 16
+	.loc 3 814 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -160
+	.cfi_offset 20, -152
+	mov	w19, w1
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -128
+	.cfi_offset 24, -120
+	mov	x23, x3
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 27, -96
+	.cfi_offset 28, -88
+	mov	w27, w2
+	stp	x21, x22, [sp, 32]
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 21, -144
+	.cfi_offset 22, -136
+	.cfi_offset 25, -112
+	.cfi_offset 26, -104
+	.loc 3 824 0
+	bne	.L1481
+	.loc 3 825 0
+	mov	x2, x3
+.LVL1930:
+	mov	w1, w27
+.LVL1931:
+	add	w0, w19, 256
+.LVL1932:
+	bl	FtlVendorPartRead
+.LVL1933:
+	mov	w21, w0
+.LVL1934:
+.L1480:
+	.loc 3 901 0
+	mov	w0, w21
+	ldp	x19, x20, [sp, 16]
+.LVL1935:
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+.LVL1936:
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+.LVL1937:
+	ldp	x29, x30, [sp], 176
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL1938:
+.L1481:
+	.cfi_restore_state
+	.loc 3 830 0
+	add	w0, w1, w2
+	str	w0, [x29, 140]
+	adrp	x0, .LANCHOR34
+	add	w1, w1, w2
+.LVL1939:
+	ldr	w0, [x0, #:lo12:.LANCHOR34]
+	cmp	w1, w0
+	bhi	.L1501
+	.loc 3 830 0 is_stmt 0 discriminator 1
+	adrp	x0, .LANCHOR88
+	ldr	w21, [x0, #:lo12:.LANCHOR88]
+	cmn	w21, #1
+	beq	.L1480
+	.loc 3 835 0 is_stmt 1
+	adrp	x22, .LANCHOR12
+	.loc 3 833 0
+	bl	FtlCacheWriteBack
+.LVL1940:
+	.loc 3 836 0
+	add	w1, w19, w27
+	.loc 3 840 0
+	mov	w25, 0
+	.loc 3 835 0
+	ldrh	w0, [x22, #:lo12:.LANCHOR12]
+	.loc 3 836 0
+	sub	w24, w1, #1
+	.loc 3 841 0
+	adrp	x1, .LANCHOR63
+	.loc 3 815 0
+	mov	w21, 0
+	.loc 3 851 0
+	adrp	x28, .LANCHOR120
+	.loc 3 828 0
+	stp	wzr, wzr, [x29, 144]
+	.loc 3 835 0
+	udiv	w26, w19, w0
+.LVL1941:
+	.loc 3 836 0
+	udiv	w24, w24, w0
+.LVL1942:
+	.loc 3 835 0
+	mov	w20, w26
+	.loc 3 837 0
+	sub	w0, w24, w26
+	add	w0, w0, 1
+	stp	wzr, w0, [x29, 152]
+.LVL1943:
+	.loc 3 841 0
+	ldr	w0, [x1, #:lo12:.LANCHOR63]
+.LVL1944:
+	ldr	w2, [x29, 156]
+	add	w0, w0, w2
+	str	w0, [x1, #:lo12:.LANCHOR63]
+	.loc 3 886 0
+	adrp	x0, .LANCHOR83
+	add	x0, x0, :lo12:.LANCHOR83
+	str	x0, [x29, 128]
+.LVL1945:
+.L1483:
+	.loc 3 842 0
+	ldr	w0, [x29, 156]
+	cbnz	w0, .L1499
+	.loc 3 898 0
+	adrp	x0, .LANCHOR103
+	ldrh	w0, [x0, #:lo12:.LANCHOR103]
+	cbnz	w0, .L1500
+	.loc 3 898 0 is_stmt 0 discriminator 1
+	adrp	x0, .LANCHOR48
+	ldrh	w0, [x0, #:lo12:.LANCHOR48]
+	cmp	w0, 31
+	bhi	.L1480
+.L1500:
+	.loc 3 899 0 is_stmt 1
+	mov	w1, 1
+	mov	w0, 0
+	bl	rk_ftl_garbage_collect
+.LVL1946:
+	b	.L1480
+.L1499:
+	.loc 3 843 0
+	add	x1, x29, 172
+	mov	w2, 0
+	mov	w0, w20
+	bl	log2phys
+.LVL1947:
+	.loc 3 844 0
+	ldr	w1, [x29, 172]
+	cmn	w1, #1
+	bne	.L1484
+	.loc 3 845 0 discriminator 1
+	add	x5, x22, :lo12:.LANCHOR12
+	mov	w4, 0
+.L1485:
+.LVL1948:
+	ldrh	w0, [x5]
+	cmp	w4, w0
+	bcc	.L1487
+.LVL1949:
+.L1488:
+	.loc 3 874 0
+	ldr	w0, [x29, 156]
+	.loc 3 872 0
+	add	w20, w20, 1
+.LVL1950:
+	.loc 3 874 0
+	subs	w0, w0, #1
+	str	w0, [x29, 156]
+.LVL1951:
+	beq	.L1492
+	.loc 3 874 0 is_stmt 0 discriminator 1
+	adrp	x0, .LANCHOR3
+	ldrh	w0, [x0, #:lo12:.LANCHOR3]
+	cmp	w25, w0, lsl 2
+	bne	.L1483
+.L1492:
+	.loc 3 875 0 is_stmt 1
+	cbz	w25, .L1483
+	.loc 3 876 0
+	ldr	x0, [x28, #:lo12:.LANCHOR120]
+	mov	w1, w25
+	mov	w2, 0
+	bl	FlashReadPages
+.LVL1952:
+	.loc 3 883 0
+	ldr	w0, [x29, 144]
+	lsl	w0, w0, 9
+	str	w0, [x29, 136]
+	.loc 3 880 0
+	ldr	w0, [x29, 152]
+	lsl	w0, w0, 9
+	str	x0, [x29, 120]
+	ldr	w0, [x29, 148]
+	lsl	w0, w0, 9
+	str	w0, [x29, 112]
+	ubfiz	x0, x25, 5, 32
+	mov	x25, 0
+.LVL1953:
+	str	x0, [x29, 104]
+.LVL1954:
+	.loc 3 883 0
+	add	x0, x22, :lo12:.LANCHOR12
+	str	x0, [x29, 96]
+.L1498:
+	.loc 3 878 0
+	ldr	x0, [x28, #:lo12:.LANCHOR120]
+	add	x0, x0, x25
+	ldr	w1, [x0, 24]
+	cmp	w26, w1
+	bne	.L1494
+	.loc 3 879 0
+	ldr	x1, [x0, 8]
+	adrp	x0, .LANCHOR116
+	ldr	x0, [x0, #:lo12:.LANCHOR116]
+	cmp	x1, x0
+	bne	.L1495
+	.loc 3 880 0
+	ldr	x0, [x29, 120]
+	ldr	w2, [x29, 112]
+	add	x1, x1, x0
+	mov	x0, x23
+.L1512:
+	.loc 3 883 0
+	bl	ftl_memcpy
+.LVL1955:
+.L1495:
+	.loc 3 885 0
+	ldr	x0, [x28, #:lo12:.LANCHOR120]
+	add	x1, x0, x25
+	ldr	w0, [x0, x25]
+	cmn	w0, #1
+	bne	.L1496
+	.loc 3 886 0
+	ldr	x1, [x29, 128]
+	.loc 3 887 0
+	mov	w21, w0
+.LVL1956:
+	.loc 3 886 0
+	ldr	x2, [x29, 128]
+	ldr	w1, [x1, 72]
+	add	w1, w1, 1
+	str	w1, [x2, 72]
+.LVL1957:
+.L1497:
+	.loc 3 877 0 discriminator 2
+	ldr	x0, [x29, 104]
+	add	x25, x25, 32
+.LVL1958:
+	cmp	x0, x25
+	bne	.L1498
+	.loc 3 894 0
+	mov	w25, 0
+	b	.L1483
+.LVL1959:
+.L1487:
+	.loc 3 846 0
+	madd	w0, w20, w0, w4
+.LVL1960:
+	.loc 3 847 0
+	cmp	w19, w0
+	bhi	.L1486
+	.loc 3 847 0 is_stmt 0 discriminator 1
+	ldr	w1, [x29, 140]
+	cmp	w1, w0
+	bls	.L1486
+	.loc 3 848 0 is_stmt 1
+	sub	w0, w0, w19
+.LVL1961:
+	str	x5, [x29, 112]
+	lsl	w0, w0, 9
+	str	w4, [x29, 120]
+	mov	w2, 512
+	mov	w1, 0
+	add	x0, x23, x0
+	bl	ftl_memset
+.LVL1962:
+	ldr	w4, [x29, 120]
+	ldr	x5, [x29, 112]
+.LVL1963:
+.L1486:
+	.loc 3 845 0 discriminator 2
+	add	w4, w4, 1
+.LVL1964:
+	b	.L1485
+.LVL1965:
+.L1484:
+	.loc 3 851 0
+	ldr	x2, [x28, #:lo12:.LANCHOR120]
+	ubfiz	x0, x25, 5, 32
+	.loc 3 852 0
+	cmp	w20, w26
+	.loc 3 851 0
+	add	x0, x2, x0
+	str	w1, [x0, 4]
+	.loc 3 852 0
+	bne	.L1489
+	.loc 3 853 0
+	adrp	x1, .LANCHOR116
+	ldr	x1, [x1, #:lo12:.LANCHOR116]
+	str	x1, [x0, 8]
+	.loc 3 854 0
+	ldrh	w1, [x22, #:lo12:.LANCHOR12]
+	udiv	w2, w19, w1
+	msub	w2, w2, w1, w19
+	str	w2, [x29, 152]
+.LVL1966:
+	.loc 3 855 0
+	sub	w2, w1, w2
+.LVL1967:
+	cmp	w27, w2
+	csel	w2, w27, w2, ls
+.LVL1968:
+	str	w2, [x29, 148]
+.LVL1969:
+	.loc 3 857 0
+	cmp	w1, w2
+	bne	.L1490
+	.loc 3 858 0
+	str	x23, [x0, 8]
+.LVL1970:
+.L1490:
+	.loc 3 867 0
+	adrp	x1, .LANCHOR24
+	adrp	x2, .LANCHOR115
+	.loc 3 868 0
+	str	w20, [x0, 24]
+	.loc 3 867 0
+	ldrh	w1, [x1, #:lo12:.LANCHOR24]
+	ldr	x2, [x2, #:lo12:.LANCHOR115]
+	mul	w1, w1, w25
+	.loc 3 869 0
+	add	w25, w25, 1
+.LVL1971:
+	.loc 3 867 0
+	and	x1, x1, 4294967292
+	add	x1, x2, x1
+	str	x1, [x0, 16]
+	b	.L1488
+.L1489:
+	.loc 3 859 0
+	cmp	w20, w24
+	bne	.L1491
+	.loc 3 861 0
+	ldrh	w2, [x22, #:lo12:.LANCHOR12]
+	.loc 3 860 0
+	adrp	x1, .LANCHOR114
+	.loc 3 861 0
+	ldr	w3, [x29, 140]
+	.loc 3 860 0
+	ldr	x1, [x1, #:lo12:.LANCHOR114]
+	str	x1, [x0, 8]
+	.loc 3 861 0
+	mul	w1, w20, w2
+	sub	w3, w3, w1
+	str	w3, [x29, 144]
+.LVL1972:
+	.loc 3 862 0
+	cmp	w2, w3
+	bne	.L1490
+.LVL1973:
+.L1511:
+	.loc 3 865 0
+	sub	w1, w1, w19
+	lsl	w1, w1, 9
+	add	x1, x23, x1
+	str	x1, [x0, 8]
+	b	.L1490
+.L1491:
+	ldrh	w1, [x22, #:lo12:.LANCHOR12]
+	mul	w1, w1, w20
+	b	.L1511
+.LVL1974:
+.L1494:
+	.loc 3 881 0
+	cmp	w24, w1
+	bne	.L1495
+	.loc 3 882 0
+	ldr	x1, [x0, 8]
+	adrp	x0, .LANCHOR114
+	ldr	x0, [x0, #:lo12:.LANCHOR114]
+	cmp	x1, x0
+	bne	.L1495
+	.loc 3 883 0
+	ldr	x0, [x29, 96]
+	ldr	w2, [x29, 136]
+	ldrh	w0, [x0]
+	mul	w0, w0, w24
+	sub	w0, w0, w19
+	lsl	w0, w0, 9
+	add	x0, x23, x0
+	b	.L1512
+.L1496:
+	.loc 3 889 0
+	cmp	w0, 256
+	bne	.L1497
+.LBB293:
+	.loc 3 890 0
+	ldr	w0, [x1, 4]
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+.LVL1975:
+	.loc 3 891 0
+	bl	FtlGcRefreshBlock
+.LVL1976:
+	b	.L1497
+.LVL1977:
+.L1501:
+.LBE293:
+	.loc 3 831 0
+	mov	w21, -1
+	b	.L1480
+	.cfi_endproc
+.LFE214:
+	.size	FtlRead, .-FtlRead
+	.section	.text.sftl_read,"ax",@progbits
+	.align	2
+	.global	sftl_read
+	.type	sftl_read, %function
+sftl_read:
+.LFB219:
+	.loc 3 1204 0
+	.cfi_startproc
+.LVL1978:
+	.loc 3 1205 0
+	mov	x3, x2
+	mov	w2, w1
+.LVL1979:
+	mov	w1, w0
+.LVL1980:
+	mov	w0, 0
+.LVL1981:
+	b	FtlRead
+.LVL1982:
+	.cfi_endproc
+.LFE219:
+	.size	sftl_read, .-sftl_read
+	.section	.text.FtlWrite,"ax",@progbits
+	.align	2
+	.global	FtlWrite
+	.type	FtlWrite, %function
+FtlWrite:
+.LFB217:
+	.loc 3 962 0
+	.cfi_startproc
+.LVL1983:
+	stp	x29, x30, [sp, -240]!
+	.cfi_def_cfa_offset 240
+	.cfi_offset 29, -240
+	.cfi_offset 30, -232
+	and	w0, w0, 255
+	.loc 3 970 0
+	cmp	w0, 16
+	.loc 3 962 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 25, -176
+	.cfi_offset 26, -168
+	mov	w25, w2
+	stp	x21, x22, [sp, 32]
+	mov	x26, x3
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 21, -208
+	.cfi_offset 22, -200
+	.cfi_offset 19, -224
+	.cfi_offset 20, -216
+	mov	w22, w1
+	stp	x23, x24, [sp, 48]
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 23, -192
+	.cfi_offset 24, -184
+	.cfi_offset 27, -160
+	.cfi_offset 28, -152
+	.loc 3 970 0
+	bne	.L1515
+	.loc 3 971 0
+	mov	x2, x3
+.LVL1984:
+	mov	w1, w25
+.LVL1985:
+	add	w0, w22, 256
+.LVL1986:
+	bl	FtlVendorPartWrite
+.LVL1987:
+.L1514:
+	.loc 3 1153 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+.LVL1988:
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 240
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL1989:
+.L1515:
+	.cfi_restore_state
+	.loc 3 974 0
+	adrp	x0, .LANCHOR34
+	add	w2, w1, w2
+.LVL1990:
+	ldr	w0, [x0, #:lo12:.LANCHOR34]
+	cmp	w2, w0
+	bhi	.L1557
+	.loc 3 974 0 is_stmt 0 discriminator 1
+	adrp	x0, .LANCHOR88
+	ldr	w0, [x0, #:lo12:.LANCHOR88]
+	cmn	w0, #1
+	beq	.L1514
+	.loc 3 977 0 is_stmt 1
+	adrp	x0, .LANCHOR178
+	.loc 3 978 0
+	adrp	x3, .LANCHOR12
+.LVL1991:
+	.loc 3 977 0
+	mov	w1, 2048
+.LVL1992:
+	.loc 3 979 0
+	sub	w2, w2, #1
+	.loc 3 977 0
+	str	w1, [x0, #:lo12:.LANCHOR178]
+	.loc 3 978 0
+	ldrh	w1, [x3, #:lo12:.LANCHOR12]
+	str	x3, [x29, 176]
+	.loc 3 979 0
+	udiv	w0, w2, w1
+	.loc 3 982 0
+	adrp	x2, .LANCHOR65
+	.loc 3 978 0
+	udiv	w21, w22, w1
+.LVL1993:
+	.loc 3 979 0
+	str	w0, [x29, 168]
+.LVL1994:
+	.loc 3 980 0
+	sub	w23, w0, w21
+	.loc 3 982 0
+	ldr	w0, [x2, #:lo12:.LANCHOR65]
+.LVL1995:
+	.loc 3 980 0
+	add	w24, w23, 1
+.LVL1996:
+	.loc 3 982 0
+	add	w0, w0, w24
+	str	w0, [x2, #:lo12:.LANCHOR65]
+	.loc 3 983 0
+	adrp	x0, .LANCHOR150
+	str	x0, [x29, 128]
+	ldr	x2, [x0, #:lo12:.LANCHOR150]
+	cbz	x2, .L1517
+	.loc 3 984 0
+	ldr	w0, [x2, 24]
+	cmp	w21, w0
+	beq	.L1518
+	.loc 3 985 0
+	bl	FtlCacheWriteBack
+.LVL1997:
+.L1517:
+	.loc 3 1008 0
+	adrp	x0, .LANCHOR179
+	str	x0, [x29, 152]
+	ldr	w1, [x0, #:lo12:.LANCHOR179]
+	adrp	x0, .LANCHOR51
+	add	x19, x0, :lo12:.LANCHOR51
+	cbz	w1, .L1520
+	.loc 3 1008 0 is_stmt 0 discriminator 1
+	ldrh	w0, [x19, 4]
+	cbnz	w0, .L1520
+	.loc 3 1009 0 is_stmt 1
+	adrp	x19, .LANCHOR52
+	add	x19, x19, :lo12:.LANCHOR52
+.L1520:
+	mov	w20, w21
+	.loc 3 1023 0
+	adrp	x0, .LANCHOR52
+	add	x0, x0, :lo12:.LANCHOR52
+	str	x0, [x29, 104]
+.LVL1998:
+.L1521:
+	.loc 3 1011 0
+	cbz	w24, .L1555
+	.loc 3 1012 0
+	adrp	x0, .LANCHOR3
+	ldrb	w2, [x19, 6]
+	str	x0, [x29, 120]
+	ldrh	w1, [x0, #:lo12:.LANCHOR3]
+	cmp	w2, w1
+	bcc	.L1522
+	.loc 3 1012 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR180
+	adrp	x0, .LC1
+	mov	w2, 1012
+	add	x1, x1, :lo12:.LANCHOR180
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1999:
+.L1522:
+	.loc 3 1013 0 is_stmt 1
+	ldrh	w0, [x19, 4]
+	cbnz	w0, .L1523
+	.loc 3 1014 0
+	bl	FtlCacheWriteBack
+.LVL2000:
+	.loc 3 1016 0
+	adrp	x0, .LANCHOR51
+	add	x0, x0, :lo12:.LANCHOR51
+	cmp	x19, x0
+	bne	.L1524
+	.loc 3 1017 0
+	adrp	x0, .LANCHOR52
+	add	x0, x0, :lo12:.LANCHOR52
+	ldrh	w1, [x0, 4]
+	cbnz	w1, .L1525
+	.loc 3 1018 0
+	bl	allocate_new_data_superblock
+.LVL2001:
+	.loc 3 1019 0
+	ldr	x0, [x29, 152]
+	str	wzr, [x0, #:lo12:.LANCHOR179]
+.L1525:
+	.loc 3 1021 0
+	adrp	x0, .LANCHOR51
+	add	x19, x0, :lo12:.LANCHOR51
+.LVL2002:
+	mov	x0, x19
+	bl	allocate_new_data_superblock
+.LVL2003:
+	.loc 3 1022 0
+	ldr	x0, [x29, 152]
+	ldr	w0, [x0, #:lo12:.LANCHOR179]
+	.loc 3 1023 0
+	cmp	w0, 0
+	ldr	x0, [x29, 104]
+	csel	x19, x0, x19, ne
+.L1526:
+.LVL2004:
+	.loc 3 1033 0
+	ldrh	w0, [x19, 4]
+	cbnz	w0, .L1523
+	.loc 3 1034 0
+	mov	x0, x19
+	bl	allocate_new_data_superblock
+.LVL2005:
+.L1523:
+	.loc 3 1043 0
+	ldrh	w0, [x19, 4]
+	.loc 3 1041 0
+	ldrb	w1, [x19, 7]
+	cmp	w0, w24
+	csel	w0, w0, w24, ls
+	lsl	w1, w1, 2
+	cmp	w0, w1
+	csel	w0, w0, w1, ls
+	str	w0, [x29, 160]
+.LVL2006:
+	.loc 3 1045 0
+	ldr	x0, [x29, 120]
+.LVL2007:
+	ldrb	w1, [x19, 6]
+	ldrh	w0, [x0, #:lo12:.LANCHOR3]
+	cmp	w1, w0
+	bcc	.L1527
+	.loc 3 1045 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR180
+	adrp	x0, .LC1
+	mov	w2, 1045
+	add	x1, x1, :lo12:.LANCHOR180
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL2008:
+.L1527:
+	.loc 3 1055 0 is_stmt 1 discriminator 1
+	adrp	x0, .LANCHOR24
+	adrp	x28, .LANCHOR122
+	add	x0, x0, :lo12:.LANCHOR24
+	.loc 3 1068 0 discriminator 1
+	str	xzr, [x29, 184]
+	.loc 3 1055 0 discriminator 1
+	str	x0, [x29, 112]
+.L1528:
+	.loc 3 1046 0 discriminator 1
+	ldr	w1, [x29, 160]
+	ldr	w27, [x29, 184]
+.LVL2009:
+	cmp	w27, w1
+	bcc	.L1549
+	mov	x27, x1
+.L1529:
+.LVL2010:
+	.loc 3 1127 0
+	ldr	x0, [x29, 128]
+	ldr	x0, [x0, #:lo12:.LANCHOR150]
+	cbz	x0, .L1550
+.LVL2011:
+	.loc 3 1129 0
+	sub	w24, w24, #1
+.LVL2012:
+	.loc 3 1130 0
+	subs	w27, w27, #1
+.LVL2013:
+	bne	.L1550
+.LVL2014:
+.L1555:
+	.loc 3 1137 0
+	ldr	w0, [x29, 168]
+	sub	w1, w0, w21
+	mov	w0, 0
+	bl	rk_ftl_garbage_collect
+.LVL2015:
+	.loc 3 1139 0
+	adrp	x0, .LANCHOR48
+	mov	x22, x0
+.LVL2016:
+	ldrh	w1, [x0, #:lo12:.LANCHOR48]
+	cmp	w1, 15
+	bhi	.L1552
+	.loc 3 1141 0
+	adrp	x21, .LANCHOR101
+.LVL2017:
+	.loc 3 1143 0
+	adrp	x20, .LANCHOR85
+.LVL2018:
+	.loc 3 1144 0
+	adrp	x19, .LANCHOR84
+.LVL2019:
+	.loc 3 1141 0
+	add	x21, x21, :lo12:.LANCHOR101
+	.loc 3 1143 0
+	add	x20, x20, :lo12:.LANCHOR85
+	.loc 3 1144 0
+	add	x19, x19, :lo12:.LANCHOR84
+.L1575:
+	.loc 3 1141 0
+	adrp	x0, .LANCHOR82
+	mov	w1, 65535
+	ldrh	w0, [x0, #:lo12:.LANCHOR82]
+	cmp	w0, w1
+	bne	.L1556
+	.loc 3 1141 0 is_stmt 0 discriminator 1
+	ldrh	w1, [x21]
+	cmp	w1, w0
+	bne	.L1556
+	.loc 3 1142 0 is_stmt 1
+	mov	w0, 0
+	bl	List_get_gc_head_node
+.LVL2020:
+	bl	FtlGcRefreshBlock
+.LVL2021:
+.L1556:
+	.loc 3 1143 0
+	mov	w0, 128
+	.loc 3 1145 0
+	mov	w1, 1
+	.loc 3 1143 0
+	strh	w0, [x20]
+	.loc 3 1144 0
+	strh	w0, [x19]
+	.loc 3 1145 0
+	mov	w0, w1
+	bl	rk_ftl_garbage_collect
+.LVL2022:
+	.loc 3 1146 0
+	mov	w1, 1
+	mov	w0, 0
+	bl	rk_ftl_garbage_collect
+.LVL2023:
+	.loc 3 1147 0
+	ldrh	w0, [x22, #:lo12:.LANCHOR48]
+	cmp	w0, 8
+	bls	.L1575
+	b	.L1552
+.LVL2024:
+.L1518:
+	.loc 3 987 0
+	adrp	x3, .LANCHOR66
+	ldr	w0, [x3, #:lo12:.LANCHOR66]
+	add	w0, w0, 1
+	str	w0, [x3, #:lo12:.LANCHOR66]
+	.loc 3 988 0
+	msub	w0, w21, w1, w22
+.LVL2025:
+	.loc 3 992 0
+	ldr	x3, [x2, 8]
+	.loc 3 989 0
+	sub	w1, w1, w0
+.LVL2026:
+	cmp	w25, w1
+	.loc 3 992 0
+	lsl	w0, w0, 9
+.LVL2027:
+	csel	w19, w25, w1, ls
+.LVL2028:
+	add	x0, x3, x0
+	lsl	w20, w19, 9
+	mov	x1, x26
+	mov	w2, w20
+	bl	ftl_memcpy
+.LVL2029:
+	.loc 3 994 0
+	cbnz	w23, .L1519
+.LVL2030:
+.L1552:
+	.loc 3 995 0
+	mov	w0, 0
+	b	.L1514
+.LVL2031:
+.L1519:
+	.loc 3 996 0
+	sub	w25, w25, w19
+.LVL2032:
+	.loc 3 997 0
+	add	w22, w22, w19
+.LVL2033:
+	.loc 3 998 0
+	add	x26, x26, x20
+.LVL2034:
+	.loc 3 999 0
+	add	w21, w21, 1
+.LVL2035:
+	.loc 3 1000 0
+	bl	FtlCacheWriteBack
+.LVL2036:
+	mov	w24, w23
+	b	.L1517
+.LVL2037:
+.L1524:
+	.loc 3 1027 0
+	ldr	x1, [x29, 152]
+	str	wzr, [x1, #:lo12:.LANCHOR179]
+	.loc 3 1028 0
+	ldrh	w1, [x0, 4]
+	cbnz	w1, .L1562
+	.loc 3 1029 0
+	mov	x0, x19
+	bl	allocate_new_data_superblock
+.LVL2038:
+	b	.L1526
+.L1562:
+	mov	x19, x0
+.LVL2039:
+	b	.L1523
+.LVL2040:
+.L1549:
+	.loc 3 1047 0
+	ldrh	w0, [x19, 4]
+	cbz	w0, .L1529
+	.loc 3 1051 0
+	add	x1, x29, 204
+	mov	w2, 0
+	mov	w0, w20
+	bl	log2phys
+.LVL2041:
+	.loc 3 1052 0
+	mov	x0, x19
+	bl	get_new_active_ppa
+.LVL2042:
+	ldr	x1, [x29, 184]
+	lsl	x23, x1, 5
+	.loc 3 1054 0
+	adrp	x1, .LANCHOR122
+	ldr	x1, [x1, #:lo12:.LANCHOR122]
+	add	x1, x1, x23
+	str	w0, [x1, 4]
+	.loc 3 1055 0
+	ldr	x0, [x29, 112]
+.LVL2043:
+	.loc 3 1056 0
+	str	w20, [x1, 24]
+	.loc 3 1055 0
+	ldrh	w2, [x0]
+	mul	w27, w27, w2
+	and	x0, x27, 4294967292
+	str	x0, [x29, 144]
+	adrp	x0, .LANCHOR115
+	ldr	x3, [x29, 144]
+	ldr	x0, [x0, #:lo12:.LANCHOR115]
+	str	x0, [x29, 136]
+	add	x27, x0, x3
+.LVL2044:
+	str	x27, [x1, 16]
+	.loc 3 1059 0
+	mov	x0, x27
+	mov	w1, 0
+.LVL2045:
+	bl	ftl_memset
+.LVL2046:
+	.loc 3 1061 0
+	ldr	w0, [x29, 168]
+	cmp	w20, w21
+	ccmp	w20, w0, 4, ne
+	bne	.L1530
+	.loc 3 1062 0
+	cmp	w20, w21
+	bne	.L1531
+	.loc 3 1063 0
+	ldr	x0, [x29, 176]
+	ldrh	w2, [x0, #:lo12:.LANCHOR12]
+	udiv	w0, w22, w2
+	msub	w0, w0, w2, w22
+	str	w0, [x29, 164]
+.LVL2047:
+	.loc 3 1064 0
+	sub	w2, w2, w0
+	cmp	w2, w25
+	csel	w0, w2, w25, ls
+.LVL2048:
+	str	w0, [x29, 172]
+.LVL2049:
+.L1532:
+	.loc 3 1072 0
+	ldr	x0, [x29, 176]
+	ldr	w1, [x29, 172]
+	ldrh	w0, [x0, #:lo12:.LANCHOR12]
+	cmp	w1, w0
+	.loc 3 1074 0
+	ldr	x0, [x28, #:lo12:.LANCHOR122]
+	.loc 3 1072 0
+	bne	.L1533
+	.loc 3 1074 0
+	add	x23, x0, x23
+	.loc 3 1073 0
+	cmp	w20, w21
+	bne	.L1534
+	.loc 3 1074 0
+	str	x26, [x23, 8]
+.LVL2050:
+.L1535:
+	.loc 3 1119 0
+	ldr	x0, [x29, 120]
+	ldrb	w1, [x19, 6]
+	ldrh	w0, [x0, #:lo12:.LANCHOR3]
+	cmp	w1, w0
+	bcc	.L1546
+	.loc 3 1119 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR180
+	adrp	x0, .LC1
+	mov	w2, 1119
+	add	x1, x1, :lo12:.LANCHOR180
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL2051:
+.L1546:
+	.loc 3 1120 0 is_stmt 1
+	ldp	x1, x2, [x29, 136]
+	mov	w0, -3947
+	strh	w0, [x1, x2]
+	.loc 3 1121 0
+	adrp	x1, .LANCHOR72
+	ldr	w0, [x1, #:lo12:.LANCHOR72]
+	.loc 3 1122 0
+	stp	w0, w20, [x27, 4]
+	.loc 3 1125 0
+	add	w20, w20, 1
+.LVL2052:
+	.loc 3 1121 0
+	add	w0, w0, 1
+	cmn	w0, #1
+	csel	w0, w0, wzr, ne
+	str	w0, [x1, #:lo12:.LANCHOR72]
+	.loc 3 1123 0
+	ldr	w0, [x29, 204]
+	str	w0, [x27, 12]
+	.loc 3 1124 0
+	ldrh	w0, [x19]
+	strh	w0, [x27, 2]
+	ldr	x0, [x29, 184]
+	add	x0, x0, 1
+	str	x0, [x29, 184]
+	b	.L1528
+.LVL2053:
+.L1531:
+	.loc 3 1069 0
+	ldr	x0, [x29, 176]
+	add	w2, w22, w25
+	.loc 3 1068 0
+	str	wzr, [x29, 164]
+	.loc 3 1069 0
+	ldrh	w0, [x0, #:lo12:.LANCHOR12]
+	msub	w2, w20, w0, w2
+	and	w0, w2, 65535
+	str	w0, [x29, 172]
+.LVL2054:
+	b	.L1532
+.LVL2055:
+.L1534:
+	.loc 3 1076 0
+	ldr	w0, [x29, 172]
+.LVL2056:
+.L1578:
+	.loc 3 1117 0
+	mul	w0, w0, w20
+	sub	w0, w0, w22
+	lsl	w0, w0, 9
+	add	x0, x26, x0
+	str	x0, [x23, 8]
+	b	.L1535
+.LVL2057:
+.L1533:
+	.loc 3 1080 0
+	add	x0, x0, x23
+	.loc 3 1079 0
+	cmp	w20, w21
+	bne	.L1536
+	.loc 3 1080 0
+	adrp	x1, .LANCHOR116
+	ldr	x1, [x1, #:lo12:.LANCHOR116]
+.L1577:
+	.loc 3 1082 0
+	str	x1, [x0, 8]
+	.loc 3 1084 0
+	ldr	w0, [x29, 204]
+	cmn	w0, #1
+	beq	.L1538
+.LBB294:
+	.loc 3 1086 0
+	str	w0, [x29, 212]
+	.loc 3 1090 0
+	mov	w2, 0
+	.loc 3 1088 0
+	ldr	x0, [x28, #:lo12:.LANCHOR122]
+	.loc 3 1087 0
+	str	w20, [x29, 232]
+	.loc 3 1088 0
+	add	x0, x0, x23
+	.loc 3 1089 0
+	ldp	x1, x0, [x0, 8]
+	stp	x1, x0, [x29, 216]
+	.loc 3 1090 0
+	mov	w1, 1
+	add	x0, x29, 208
+	bl	FlashReadPages
+.LVL2058:
+	.loc 3 1091 0
+	ldr	w0, [x29, 208]
+	cmn	w0, #1
+	bne	.L1539
+	.loc 3 1092 0
+	adrp	x0, .LANCHOR83
+	add	x0, x0, :lo12:.LANCHOR83
+	ldr	w1, [x0, 72]
+	add	w1, w1, 1
+	str	w1, [x0, 72]
+.L1542:
+	ldr	w0, [x29, 172]
+.LBE294:
+	.loc 3 1104 0
+	cmp	w20, w21
+	lsl	w2, w0, 9
+	bne	.L1543
+	.loc 3 1105 0
+	ldr	x1, [x28, #:lo12:.LANCHOR122]
+	ldr	w0, [x29, 164]
+	add	x1, x1, x23
+	lsl	w0, w0, 9
+	ldr	x4, [x1, 8]
+	mov	x1, x26
+	add	x0, x4, x0
+	bl	ftl_memcpy
+.LVL2059:
+	.loc 3 1109 0
+	ldr	w0, [x29, 168]
+	cmp	w20, w0
+	bne	.L1535
+.L1544:
+	.loc 3 1110 0
+	ldrh	w0, [x19, 4]
+	cbz	w0, .L1535
+	.loc 3 1111 0
+	ldr	x0, [x28, #:lo12:.LANCHOR122]
+	add	x23, x0, x23
+	ldr	x0, [x29, 128]
+	str	x23, [x0, #:lo12:.LANCHOR150]
+	.loc 3 1112 0
+	adrp	x0, .LANCHOR171
+	str	x19, [x0, #:lo12:.LANCHOR171]
+	b	.L1535
+.L1536:
+	.loc 3 1082 0
+	adrp	x1, .LANCHOR114
+	ldr	x1, [x1, #:lo12:.LANCHOR114]
+	b	.L1577
+.L1539:
+.LBB295:
+	.loc 3 1094 0
+	ldr	w1, [x27, 8]
+	cmp	w20, w1
+	beq	.L1541
+	.loc 3 1095 0
+	adrp	x0, .LANCHOR83
+	add	x0, x0, :lo12:.LANCHOR83
+	ldr	w2, [x0, 72]
+	add	w2, w2, 1
+	str	w2, [x0, 72]
+	.loc 3 1096 0
+	adrp	x0, .LC105
+	mov	w2, w20
+	add	x0, x0, :lo12:.LC105
+	bl	printf
+.LVL2060:
+.L1541:
+	.loc 3 1098 0
+	ldr	w0, [x27, 8]
+	cmp	w20, w0
+	beq	.L1542
+	.loc 3 1098 0 is_stmt 0 discriminator 1
+	mov	w2, 1098
+	adrp	x1, .LANCHOR180
+	adrp	x0, .LC1
+	add	x1, x1, :lo12:.LANCHOR180
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL2061:
+	b	.L1542
+.LVL2062:
+.L1538:
+.LBE295:
+	.loc 3 1101 0 is_stmt 1
+	ldr	x0, [x28, #:lo12:.LANCHOR122]
+	adrp	x1, .LANCHOR23
+	add	x0, x0, x23
+	ldrh	w2, [x1, #:lo12:.LANCHOR23]
+	mov	w1, 0
+	ldr	x0, [x0, 8]
+	bl	ftl_memset
+.LVL2063:
+	b	.L1542
+.L1543:
+	.loc 3 1107 0
+	ldr	x0, [x29, 176]
+	ldrh	w1, [x0, #:lo12:.LANCHOR12]
+	ldr	x0, [x28, #:lo12:.LANCHOR122]
+	add	x0, x0, x23
+	mul	w1, w1, w20
+	ldr	x0, [x0, 8]
+	sub	w1, w1, w22
+	lsl	w1, w1, 9
+	add	x1, x26, x1
+	bl	ftl_memcpy
+.LVL2064:
+	b	.L1544
+.LVL2065:
+.L1530:
+	.loc 3 1117 0
+	adrp	x0, .LANCHOR122
+	ldr	x0, [x0, #:lo12:.LANCHOR122]
+	add	x23, x0, x23
+	ldr	x0, [x29, 176]
+	ldrh	w0, [x0, #:lo12:.LANCHOR12]
+	b	.L1578
+.LVL2066:
+.L1550:
+	.loc 3 1133 0
+	adrp	x0, .LANCHOR122
+	mov	x3, x19
+	mov	w2, 0
+	mov	w1, w27
+	ldr	x0, [x0, #:lo12:.LANCHOR122]
+	bl	FtlProgPages
+.LVL2067:
+	.loc 3 1134 0
+	cmp	w24, w27
+	bcs	.L1553
+	.loc 3 1134 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR180
+	adrp	x0, .LC1
+	mov	w2, 1134
+	add	x1, x1, :lo12:.LANCHOR180
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL2068:
+.L1553:
+	.loc 3 1135 0 is_stmt 1
+	sub	w24, w24, w27
+.LVL2069:
+	b	.L1521
+.LVL2070:
+.L1557:
+	.loc 3 975 0
+	mov	w0, -1
+	b	.L1514
+	.cfi_endproc
+.LFE217:
+	.size	FtlWrite, .-FtlWrite
+	.section	.text.sftl_write,"ax",@progbits
+	.align	2
+	.global	sftl_write
+	.type	sftl_write, %function
+sftl_write:
+.LFB220:
+	.loc 3 1210 0
+	.cfi_startproc
+.LVL2071:
+	.loc 3 1211 0
+	mov	x3, x2
+	mov	w2, w1
+.LVL2072:
+	mov	w1, w0
+.LVL2073:
+	mov	w0, 0
+.LVL2074:
+	b	FtlWrite
+.LVL2075:
+	.cfi_endproc
+.LFE220:
+	.size	sftl_write, .-sftl_write
+	.section	.text.FtlLoadSysInfo,"ax",@progbits
+	.align	2
+	.global	FtlLoadSysInfo
+	.type	FtlLoadSysInfo, %function
+FtlLoadSysInfo:
+.LFB274:
+	.loc 2 1360 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -96]!
+	.cfi_def_cfa_offset 96
+	.cfi_offset 29, -96
+	.cfi_offset 30, -88
+	.loc 2 1368 0
+	mov	w1, 0
+	.loc 2 1360 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -80
+	.cfi_offset 20, -72
+	.loc 2 1365 0
+	adrp	x19, .LANCHOR108
+	.loc 2 1360 0
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -48
+	.cfi_offset 24, -40
+	.loc 2 1365 0
+	adrp	x23, .LANCHOR39
+	.loc 2 1360 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -64
+	.cfi_offset 22, -56
+	.loc 2 1365 0
+	add	x21, x19, :lo12:.LANCHOR108
+	.loc 2 1360 0
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 25, -32
+	.cfi_offset 26, -24
+	.loc 2 1366 0
+	adrp	x26, .LANCHOR109
+	.loc 2 1360 0
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 27, -16
+	.cfi_offset 28, -8
+	.loc 2 1368 0
+	adrp	x25, .LANCHOR43
+	.loc 2 1365 0
+	ldr	x0, [x23, #:lo12:.LANCHOR39]
+	.loc 2 1368 0
+	adrp	x24, .LANCHOR5
+	.loc 2 1365 0
+	str	x0, [x21, 8]
+	.loc 2 1369 0
+	adrp	x20, .LANCHOR81
+	.loc 2 1366 0
+	ldr	x0, [x26, #:lo12:.LANCHOR109]
+	str	x0, [x21, 16]
+	.loc 2 1368 0
+	ldr	x0, [x25, #:lo12:.LANCHOR43]
+	ldrh	w2, [x24, #:lo12:.LANCHOR5]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+.LVL2076:
+	.loc 2 1369 0
+	ldrh	w0, [x20, #:lo12:.LANCHOR81]
+	mov	w1, 65535
+	cmp	w0, w1
+	bne	.L1581
+.L1589:
+	.loc 2 1370 0
+	mov	w0, -1
+.L1580:
+	.loc 2 1463 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.L1581:
+	.cfi_restore_state
+	add	x27, x20, :lo12:.LANCHOR81
+	.loc 2 1372 0
+	mov	w1, 1
+	bl	FtlGetLastWrittenPage
+.LVL2077:
+	sxth	w22, w0
+.LVL2078:
+	.loc 2 1373 0
+	add	w0, w0, 1
+	.loc 2 1382 0
+	mov	w28, 61604
+	.loc 2 1373 0
+	strh	w0, [x27, 2]
+	.loc 2 1381 0
+	mov	w27, 19539
+	movk	w27, 0x4654, lsl 16
+.L1583:
+	.loc 2 1375 0
+	tbz	w22, #31, .L1586
+	.loc 2 1388 0
+	adrp	x1, .LANCHOR181
+	adrp	x0, .LC1
+	mov	w2, 1388
+	add	x1, x1, :lo12:.LANCHOR181
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL2079:
+.L1585:
+	.loc 2 1390 0
+	adrp	x1, .LANCHOR23
+	ldrh	w0, [x24, #:lo12:.LANCHOR5]
+	ldrh	w1, [x1, #:lo12:.LANCHOR23]
+	add	x0, x0, 24
+	cmp	x1, x0, lsl 1
+	bcs	.L1588
+	.loc 2 1390 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR181
+	adrp	x0, .LC1
+	mov	w2, 1390
+	add	x1, x1, :lo12:.LANCHOR181
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL2080:
+.L1588:
+	.loc 2 1392 0 is_stmt 1
+	add	x22, x19, :lo12:.LANCHOR108
+.LVL2081:
+	adrp	x19, .LANCHOR79
+	add	x21, x19, :lo12:.LANCHOR79
+	mov	w2, 48
+	mov	x0, x21
+	ldr	x1, [x22, 8]
+	bl	ftl_memcpy
+.LVL2082:
+	.loc 2 1393 0
+	ldr	x0, [x25, #:lo12:.LANCHOR43]
+	ldrh	w2, [x24, #:lo12:.LANCHOR5]
+	ldr	x1, [x22, 8]
+	lsl	w2, w2, 1
+	add	x1, x1, 48
+	bl	ftl_memcpy
+.LVL2083:
+	.loc 2 1394 0
+	ldrh	w1, [x24, #:lo12:.LANCHOR5]
+	ldr	x0, [x22, 8]
+	lsr	w2, w1, 3
+	ubfiz	x1, x1, 1, 16
+	add	x1, x1, 48
+	add	w2, w2, 4
+	and	x1, x1, -4
+	add	x1, x0, x1
+	adrp	x0, .LANCHOR1
+	ldr	x0, [x0, #:lo12:.LANCHOR1]
+	bl	ftl_memcpy
+.LVL2084:
+	.loc 2 1396 0
+	ldr	w1, [x19, #:lo12:.LANCHOR79]
+	mov	w0, 19539
+	movk	w0, 0x4654, lsl 16
+	cmp	w1, w0
+	bne	.L1589
+	.loc 2 1399 0
+	add	x20, x20, :lo12:.LANCHOR81
+	.loc 2 1400 0
+	adrp	x0, .LANCHOR10
+	.loc 2 1399 0
+	ldrh	w1, [x21, 8]
+	.loc 2 1400 0
+	ldrb	w2, [x21, 10]
+	ldrh	w0, [x0, #:lo12:.LANCHOR10]
+	.loc 2 1399 0
+	strh	w1, [x20, 6]
+	.loc 2 1400 0
+	cmp	w2, w0
+	bne	.L1589
+	.loc 2 1403 0
+	adrp	x0, .LANCHOR182
+	.loc 2 1404 0
+	adrp	x2, .LANCHOR62
+	.loc 2 1406 0
+	adrp	x3, .LANCHOR3
+	.loc 2 1403 0
+	str	w1, [x0, #:lo12:.LANCHOR182]
+	.loc 2 1404 0
+	adrp	x0, .LANCHOR19
+	.loc 2 1406 0
+	ldrh	w3, [x3, #:lo12:.LANCHOR3]
+	.loc 2 1404 0
+	ldrh	w0, [x0, #:lo12:.LANCHOR19]
+	mul	w0, w0, w1
+	str	w0, [x2, #:lo12:.LANCHOR62]
+	.loc 2 1405 0
+	adrp	x2, .LANCHOR12
+	ldrh	w2, [x2, #:lo12:.LANCHOR12]
+	mul	w0, w2, w0
+	adrp	x2, .LANCHOR34
+	str	w0, [x2, #:lo12:.LANCHOR34]
+	.loc 2 1406 0
+	adrp	x0, .LANCHOR7
+	ldr	w2, [x0, #:lo12:.LANCHOR7]
+	adrp	x0, .LANCHOR37+6
+	ldrh	w0, [x0, #:lo12:.LANCHOR37+6]
+	.loc 2 1412 0
+	cmp	w1, w2
+	.loc 2 1406 0
+	sub	w0, w2, w0
+	sub	w0, w0, w1
+	udiv	w0, w0, w3
+	adrp	x3, .LANCHOR80
+	strh	w0, [x3, #:lo12:.LANCHOR80]
+	.loc 2 1412 0
+	bls	.L1590
+	.loc 2 1412 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR181
+	adrp	x0, .LC1
+	mov	w2, 1412
+	add	x1, x1, :lo12:.LANCHOR181
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL2085:
+.L1590:
+	.loc 2 1414 0 is_stmt 1
+	add	x1, x19, :lo12:.LANCHOR79
+	adrp	x0, .LANCHOR51
+	add	x3, x0, :lo12:.LANCHOR51
+	.loc 2 1419 0
+	adrp	x20, .LANCHOR82
+	.loc 2 1415 0
+	ldrh	w2, [x1, 16]
+	.loc 2 1414 0
+	ldrh	w6, [x1, 14]
+	strh	w6, [x0, #:lo12:.LANCHOR51]
+	.loc 2 1415 0
+	lsr	w4, w2, 6
+	.loc 2 1416 0
+	and	w2, w2, 63
+	strb	w2, [x3, 6]
+	.loc 2 1417 0
+	ldrb	w2, [x1, 11]
+	strb	w2, [x3, 8]
+	.loc 2 1419 0
+	add	x2, x20, :lo12:.LANCHOR82
+	.loc 2 1415 0
+	strh	w4, [x3, 2]
+	.loc 2 1419 0
+	mov	w3, -1
+	strh	w3, [x20, #:lo12:.LANCHOR82]
+	.loc 2 1420 0
+	strh	wzr, [x2, 2]
+	.loc 2 1421 0
+	strb	wzr, [x2, 6]
+	.loc 2 1422 0
+	strb	wzr, [x2, 8]
+	.loc 2 1424 0
+	adrp	x2, .LANCHOR52
+	ldrh	w3, [x1, 18]
+	add	x4, x2, :lo12:.LANCHOR52
+	strh	w3, [x2, #:lo12:.LANCHOR52]
+	mov	x21, x2
+	.loc 2 1425 0
+	ldrh	w3, [x1, 20]
+	lsr	w5, w3, 6
+	.loc 2 1426 0
+	and	w3, w3, 63
+	strb	w3, [x4, 6]
+	.loc 2 1427 0
+	ldrb	w3, [x1, 12]
+	.loc 2 1425 0
+	strh	w5, [x4, 2]
+	.loc 2 1427 0
+	strb	w3, [x4, 8]
+	.loc 2 1429 0
+	adrp	x4, .LANCHOR53
+	ldrh	w3, [x1, 22]
+	add	x5, x4, :lo12:.LANCHOR53
+	strh	w3, [x4, #:lo12:.LANCHOR53]
+	mov	x22, x4
+	.loc 2 1430 0
+	ldrh	w3, [x1, 24]
+	lsr	w7, w3, 6
+	.loc 2 1431 0
+	and	w3, w3, 63
+	strb	w3, [x5, 6]
+	.loc 2 1432 0
+	ldrb	w3, [x1, 13]
+	strb	w3, [x5, 8]
+	.loc 2 1434 0
+	adrp	x3, .LANCHOR68
+	.loc 2 1430 0
+	strh	w7, [x5, 2]
+	.loc 2 1439 0
+	ldr	w5, [x1, 32]
+	.loc 2 1434 0
+	str	wzr, [x3, #:lo12:.LANCHOR68]
+	.loc 2 1435 0
+	adrp	x3, .LANCHOR65
+	str	wzr, [x3, #:lo12:.LANCHOR65]
+	.loc 2 1436 0
+	adrp	x3, .LANCHOR63
+	str	wzr, [x3, #:lo12:.LANCHOR63]
+	.loc 2 1437 0
+	adrp	x3, .LANCHOR67
+	str	wzr, [x3, #:lo12:.LANCHOR67]
+	.loc 2 1439 0
+	adrp	x3, .LANCHOR73
+	str	w5, [x3, #:lo12:.LANCHOR73]
+	.loc 2 1440 0
+	adrp	x3, .LANCHOR74
+	str	wzr, [x3, #:lo12:.LANCHOR74]
+	.loc 2 1441 0
+	adrp	x3, .LANCHOR77
+	str	wzr, [x3, #:lo12:.LANCHOR77]
+	.loc 2 1442 0
+	adrp	x3, .LANCHOR66
+	str	wzr, [x3, #:lo12:.LANCHOR66]
+	.loc 2 1444 0
+	ldr	w3, [x1, 40]
+	adrp	x1, .LANCHOR71
+	ldr	w5, [x1, #:lo12:.LANCHOR71]
+	cmp	w3, w5
+	bls	.L1591
+	.loc 2 1445 0
+	str	w3, [x1, #:lo12:.LANCHOR71]
+.L1591:
+	.loc 2 1447 0
+	add	x19, x19, :lo12:.LANCHOR79
+	adrp	x1, .LANCHOR72
+	ldr	w3, [x1, #:lo12:.LANCHOR72]
+	ldr	w2, [x19, 36]
+	cmp	w2, w3
+	bls	.L1592
+	.loc 2 1448 0
+	str	w2, [x1, #:lo12:.LANCHOR72]
+.L1592:
+	.loc 2 1450 0
+	mov	w1, 65535
+	cmp	w6, w1
+	beq	.L1593
+	.loc 2 1451 0
+	add	x0, x0, :lo12:.LANCHOR51
+	bl	make_superblock
+.LVL2086:
+.L1593:
+	.loc 2 1453 0
+	ldrh	w2, [x21, #:lo12:.LANCHOR52]
+	mov	w1, 65535
+	add	x0, x21, :lo12:.LANCHOR52
+	cmp	w2, w1
+	beq	.L1594
+	.loc 2 1454 0
+	bl	make_superblock
+.LVL2087:
+.L1594:
+	.loc 2 1456 0
+	ldrh	w2, [x22, #:lo12:.LANCHOR53]
+	mov	w1, 65535
+	add	x0, x22, :lo12:.LANCHOR53
+	cmp	w2, w1
+	beq	.L1595
+	.loc 2 1457 0
+	bl	make_superblock
+.LVL2088:
+.L1595:
+	.loc 2 1459 0
+	ldrh	w2, [x20, #:lo12:.LANCHOR82]
+	mov	w1, 65535
+	add	x0, x20, :lo12:.LANCHOR82
+	cmp	w2, w1
+	beq	.L1596
+	.loc 2 1460 0
+	bl	make_superblock
+.LVL2089:
+.L1596:
+	.loc 2 1462 0
+	mov	w0, 0
+	b	.L1580
+.LVL2090:
+.L1586:
+	.loc 2 1376 0
+	ldrh	w0, [x20, #:lo12:.LANCHOR81]
+	.loc 2 1378 0
+	mov	w2, 1
+	mov	w1, w2
+	.loc 2 1376 0
+	orr	w0, w22, w0, lsl 10
+	str	w0, [x21, 4]
+	.loc 2 1377 0
+	ldr	x0, [x23, #:lo12:.LANCHOR39]
+	str	x0, [x21, 8]
+	.loc 2 1378 0
+	mov	x0, x21
+	bl	FlashReadPages
+.LVL2091:
+	.loc 2 1381 0
+	ldr	w0, [x21]
+	cmn	w0, #1
+	beq	.L1584
+	.loc 2 1382 0 discriminator 1
+	ldr	x0, [x23, #:lo12:.LANCHOR39]
+	.loc 2 1381 0 discriminator 1
+	ldr	w0, [x0]
+	cmp	w0, w27
+	bne	.L1584
+	.loc 2 1383 0
+	ldr	x0, [x26, #:lo12:.LANCHOR109]
+	ldrh	w0, [x0]
+	.loc 2 1382 0
+	cmp	w0, w28
+	beq	.L1585
+.L1584:
+	sub	w22, w22, #1
+.LVL2092:
+	sxth	w22, w22
+.LVL2093:
+	b	.L1583
+	.cfi_endproc
+.LFE274:
+	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
+	.section	.text.FtlSysBlkInit,"ax",@progbits
+	.align	2
+	.global	FtlSysBlkInit
+	.type	FtlSysBlkInit, %function
+FtlSysBlkInit:
+.LFB292:
+	.loc 2 2306 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -64]!
+	.cfi_def_cfa_offset 64
+	.cfi_offset 29, -64
+	.cfi_offset 30, -56
+	.loc 2 2312 0
+	adrp	x0, .LANCHOR4
+	.loc 2 2306 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 2 2312 0
+	ldrh	w0, [x0, #:lo12:.LANCHOR4]
+	.loc 2 2306 0
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -48
+	.cfi_offset 20, -40
+	.loc 2 2310 0
+	adrp	x20, .LANCHOR162
+	.loc 2 2306 0
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 21, -32
+	.cfi_offset 22, -24
+	.cfi_offset 23, -16
+	.cfi_offset 24, -8
+	.loc 2 2310 0
+	strh	wzr, [x20, #:lo12:.LANCHOR162]
+	.loc 2 2312 0
+	bl	FtlFreeSysBlkQueueInit
+.LVL2094:
+	.loc 2 2313 0
+	bl	FtlScanSysBlk
+.LVL2095:
+	.loc 2 2314 0
+	adrp	x0, .LANCHOR81
+	ldrh	w1, [x0, #:lo12:.LANCHOR81]
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L1603
+.L1605:
+	.loc 2 2315 0
+	mov	w23, -1
+.L1602:
+	.loc 2 2398 0
+	mov	w0, w23
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.L1603:
+	.cfi_restore_state
+	.loc 2 2317 0
+	bl	FtlLoadSysInfo
+.LVL2096:
+	mov	w23, w0
+	cbnz	w0, .L1605
+	.loc 2 2320 0
+	bl	FtlLoadMapInfo
+.LVL2097:
+	.loc 2 2321 0
+	bl	FtlLoadVonderInfo
+.LVL2098:
+	.loc 2 2322 0
+	bl	Ftl_load_ext_data
+.LVL2099:
+	.loc 2 2324 0
+	bl	FtlLoadEctTbl
+.LVL2100:
+	.loc 2 2325 0
+	bl	FtlFreeSysBLkSort
+.LVL2101:
+	.loc 2 2327 0
+	bl	SupperBlkListInit
+.LVL2102:
+	.loc 2 2328 0
+	bl	FtlPowerLostRecovery
+.LVL2103:
+	.loc 2 2330 0
+	mov	w0, 1
+	bl	FtlUpdateVaildLpn
+.LVL2104:
+.LBB299:
+.LBB300:
+	.loc 2 2332 0
+	adrp	x0, .LANCHOR33
+	ldrh	w2, [x0, #:lo12:.LANCHOR33]
+	.loc 2 2333 0
+	adrp	x0, .LANCHOR56
+	ldr	x1, [x0, #:lo12:.LANCHOR56]
+	.loc 2 2332 0
+	mov	w0, 0
+	add	x1, x1, 4
+.L1606:
+.LVL2105:
+	cmp	w0, w2
+	bge	.L1611
+	.loc 2 2333 0
+	ldr	w3, [x1], 16
+	tbz	w3, #31, .L1607
+.L1611:
+	.loc 2 2336 0
+	adrp	x19, .LANCHOR79
+	add	x3, x19, :lo12:.LANCHOR79
+	.loc 2 2338 0
+	cmp	w0, w2
+	adrp	x22, .LANCHOR51
+	.loc 2 2336 0
+	ldrh	w1, [x3, 28]
+	add	w1, w1, 1
+	strh	w1, [x3, 28]
+	.loc 2 2338 0
+	bge	.L1617
+.LVL2106:
+.L1608:
+	.loc 2 2339 0
+	add	x21, x22, :lo12:.LANCHOR51
+	.loc 2 2340 0
+	adrp	x24, .LANCHOR52
+	.loc 2 2339 0
+	mov	x0, x21
+	.loc 2 2340 0
+	add	x20, x24, :lo12:.LANCHOR52
+	.loc 2 2339 0
+	bl	FtlSuperblockPowerLostFix
+.LVL2107:
+	.loc 2 2340 0
+	mov	x0, x20
+	bl	FtlSuperblockPowerLostFix
+.LVL2108:
+.LBB301:
+	.loc 2 2346 0
+	adrp	x0, .LANCHOR43
+	ldrh	w3, [x21, 4]
+	ldr	x1, [x0, #:lo12:.LANCHOR43]
+	ldrh	w0, [x22, #:lo12:.LANCHOR51]
+	lsl	x0, x0, 1
+	ldrh	w2, [x1, x0]
+	sub	w2, w2, w3
+	.loc 2 2347 0
+	adrp	x3, .LANCHOR19
+	.loc 2 2346 0
+	strh	w2, [x1, x0]
+	.loc 2 2348 0
+	strb	wzr, [x21, 6]
+	.loc 2 2347 0
+	ldrh	w0, [x3, #:lo12:.LANCHOR19]
+	strh	w0, [x21, 2]
+	.loc 2 2352 0
+	ldrh	w0, [x24, #:lo12:.LANCHOR52]
+	.loc 2 2349 0
+	strh	wzr, [x21, 4]
+.LVL2109:
+	.loc 2 2352 0
+	ldrh	w4, [x20, 4]
+	lsl	x0, x0, 1
+	ldrh	w2, [x1, x0]
+	sub	w2, w2, w4
+	strh	w2, [x1, x0]
+	.loc 2 2354 0
+	strb	wzr, [x20, 6]
+	.loc 2 2353 0
+	ldrh	w0, [x3, #:lo12:.LANCHOR19]
+	strh	w0, [x20, 2]
+	.loc 2 2355 0
+	strh	wzr, [x20, 4]
+.LBE301:
+	.loc 2 2359 0
+	adrp	x0, .LANCHOR144
+	add	x0, x0, :lo12:.LANCHOR144
+	bl	FtlMapBlkWriteDump_data
+.LVL2110:
+	.loc 2 2360 0
+	adrp	x0, .LANCHOR149
+	add	x0, x0, :lo12:.LANCHOR149
+	bl	FtlMapBlkWriteDump_data
+.LVL2111:
+	.loc 2 2372 0
+	add	x1, x19, :lo12:.LANCHOR79
+	ldrh	w0, [x1, 30]
+	add	w0, w0, 1
+	strh	w0, [x1, 30]
+	.loc 2 2373 0
+	bl	l2p_flush
+.LVL2112:
+	.loc 2 2374 0
+	bl	FtlVpcTblFlush
+.LVL2113:
+	.loc 2 2375 0
+	bl	FtlVpcTblFlush
+.LVL2114:
+	b	.L1612
+.LVL2115:
+.L1607:
+	.loc 2 2332 0
+	add	w0, w0, 1
+.LVL2116:
+	b	.L1606
+.L1617:
+	.loc 2 2338 0
+	ldrh	w0, [x20, #:lo12:.LANCHOR162]
+.LVL2117:
+	cbnz	w0, .L1608
+.L1612:
+	.loc 2 2379 0
+	ldrh	w0, [x22, #:lo12:.LANCHOR51]
+	mov	w1, 65535
+	add	x21, x22, :lo12:.LANCHOR51
+	cmp	w0, w1
+	beq	.L1613
+	ldrh	w1, [x21, 4]
+	cbnz	w1, .L1613
+	.loc 2 2381 0
+	adrp	x22, .LANCHOR52
+	add	x20, x22, :lo12:.LANCHOR52
+	.loc 2 2380 0
+	ldrh	w1, [x20, 4]
+	cbnz	w1, .L1613
+	.loc 2 2382 0
+	bl	FtlGcRefreshBlock
+.LVL2118:
+	.loc 2 2383 0
+	ldrh	w0, [x22, #:lo12:.LANCHOR52]
+	bl	FtlGcRefreshBlock
+.LVL2119:
+	.loc 2 2384 0
+	mov	x0, x21
+	bl	allocate_new_data_superblock
+.LVL2120:
+	.loc 2 2385 0
+	mov	x0, x20
+	bl	allocate_new_data_superblock
+.LVL2121:
+.L1613:
+	.loc 2 2390 0
+	add	x19, x19, :lo12:.LANCHOR79
+	ldrh	w0, [x19, 28]
+	tst	x0, 31
+	bne	.L1602
+	.loc 2 2391 0
+	bl	FtlVpcCheckAndModify
+.LVL2122:
+	b	.L1602
+.LBE300:
+.LBE299:
+	.cfi_endproc
+.LFE292:
+	.size	FtlSysBlkInit, .-FtlSysBlkInit
+	.section	.text.ftl_low_format,"ax",@progbits
+	.align	2
+	.global	ftl_low_format
+	.type	ftl_low_format, %function
+ftl_low_format:
+.LFB210:
+	.loc 3 623 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -80]!
+	.cfi_def_cfa_offset 80
+	.cfi_offset 29, -80
+	.cfi_offset 30, -72
+	.loc 3 630 0
+	adrp	x0, .LANCHOR72
+	.loc 3 623 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -32
+	.cfi_offset 24, -24
+	.loc 3 631 0
+	adrp	x24, .LANCHOR4
+	.loc 3 630 0
+	str	wzr, [x0, #:lo12:.LANCHOR72]
+	.loc 3 631 0
+	ldrh	w0, [x24, #:lo12:.LANCHOR4]
+	.loc 3 623 0
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -64
+	.cfi_offset 20, -56
+	.loc 3 629 0
+	adrp	x20, .LANCHOR71
+	.loc 3 623 0
+	stp	x21, x22, [sp, 32]
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 21, -48
+	.cfi_offset 22, -40
+	.cfi_offset 25, -16
+	.cfi_offset 26, -8
+	.loc 3 629 0
+	str	wzr, [x20, #:lo12:.LANCHOR71]
+	.loc 3 631 0
+	bl	FtlFreeSysBlkQueueInit
+.LVL2123:
+	.loc 3 632 0
+	bl	FtlLoadBbt
+.LVL2124:
+	cbz	w0, .L1620
+	.loc 3 633 0
+	bl	FtlMakeBbt
+.LVL2125:
+.L1620:
+	.loc 3 635 0 discriminator 1
+	adrp	x23, .LANCHOR12
+	.loc 3 636 0 discriminator 1
+	adrp	x0, .LANCHOR116
+	.loc 3 637 0 discriminator 1
+	mov	w6, 23752
+	.loc 3 635 0 discriminator 1
+	ldrh	w1, [x23, #:lo12:.LANCHOR12]
+	.loc 3 637 0 discriminator 1
+	movk	w6, 0xa0f, lsl 16
+	.loc 3 636 0 discriminator 1
+	ldr	x4, [x0, #:lo12:.LANCHOR116]
+	.loc 3 637 0 discriminator 1
+	adrp	x0, .LANCHOR114
+	.loc 3 635 0 discriminator 1
+	lsl	w1, w1, 7
+	.loc 3 637 0 discriminator 1
+	ldr	x5, [x0, #:lo12:.LANCHOR114]
+	mov	w0, 0
+.L1621:
+.LVL2126:
+	.loc 3 635 0 discriminator 1
+	cmp	w0, w1
+	blt	.L1622
+.LVL2127:
+	.loc 3 642 0
+	adrp	x21, .LANCHOR5
+	adrp	x22, .LANCHOR6
+	add	x26, x22, :lo12:.LANCHOR6
+	.loc 3 641 0
+	mov	w19, 0
+	.loc 3 642 0
+	ldrh	w25, [x21, #:lo12:.LANCHOR5]
+.LVL2128:
+.L1623:
+	.loc 3 642 0 is_stmt 0 discriminator 1
+	ldrh	w0, [x26]
+	cmp	w0, w25
+	bhi	.L1624
+	.loc 3 645 0 is_stmt 1
+	adrp	x25, .LANCHOR3
+.LVL2129:
+	sub	w1, w19, #2
+	ldrh	w0, [x25, #:lo12:.LANCHOR3]
+	cmp	w1, w0, lsl 1
+	bgt	.L1625
+.LVL2130:
+.L1629:
+	.loc 3 656 0
+	add	x26, x21, :lo12:.LANCHOR5
+	.loc 3 641 0
+	mov	w19, 0
+	mov	w24, 0
+.L1626:
+.LVL2131:
+	.loc 3 656 0 discriminator 1
+	ldrh	w0, [x26]
+	cmp	w0, w24
+	bhi	.L1630
+	.loc 3 658 0
+	adrp	x0, .LANCHOR113
+	ldrh	w1, [x22, #:lo12:.LANCHOR6]
+	.loc 3 661 0
+	ldrh	w4, [x25, #:lo12:.LANCHOR3]
+	.loc 3 662 0
+	adrp	x2, .LANCHOR80
+	.loc 3 658 0
+	str	w1, [x0, #:lo12:.LANCHOR113]
+	.loc 3 661 0
+	adrp	x0, .LANCHOR7
+	adrp	x3, .LANCHOR62
+	ldr	w1, [x0, #:lo12:.LANCHOR7]
+	udiv	w5, w1, w4
+	.loc 3 662 0
+	ubfx	x0, x5, 5, 16
+	.loc 3 661 0
+	str	w5, [x3, #:lo12:.LANCHOR62]
+	.loc 3 662 0
+	add	w6, w0, 36
+	strh	w6, [x2, #:lo12:.LANCHOR80]
+	.loc 3 663 0
+	mov	w6, 24
+	mul	w6, w4, w6
+	cmp	w19, w6
+	ble	.L1631
+	.loc 3 664 0
+	sub	w1, w1, w19
+	udiv	w1, w1, w4
+	str	w1, [x3, #:lo12:.LANCHOR62]
+	.loc 3 665 0
+	lsr	w1, w1, 5
+	add	w1, w1, 24
+	strh	w1, [x2, #:lo12:.LANCHOR80]
+.L1631:
+	.loc 3 668 0
+	adrp	x1, .LANCHOR15
+	ldrh	w1, [x1, #:lo12:.LANCHOR15]
+	cbz	w1, .L1633
+	.loc 3 669 0
+	ldrh	w6, [x2, #:lo12:.LANCHOR80]
+	add	w6, w6, w1, lsr 1
+	strh	w6, [x2, #:lo12:.LANCHOR80]
+	.loc 3 670 0
+	mul	w6, w1, w4
+	cmp	w19, w6
+	bge	.L1633
+	.loc 3 672 0
+	add	w1, w1, 32
+	.loc 3 671 0
+	str	w5, [x3, #:lo12:.LANCHOR62]
+	.loc 3 672 0
+	add	w1, w0, w1
+	strh	w1, [x2, #:lo12:.LANCHOR80]
+.L1633:
+	.loc 3 677 0
+	ldrh	w1, [x2, #:lo12:.LANCHOR80]
+	adrp	x25, .LANCHOR182
+	ldr	w0, [x3, #:lo12:.LANCHOR62]
+	.loc 3 687 0
+	adrp	x24, .LANCHOR43
+.LVL2132:
+	.loc 3 677 0
+	sub	w0, w0, w1
+	.loc 3 678 0
+	adrp	x1, .LANCHOR19
+	ldrh	w1, [x1, #:lo12:.LANCHOR19]
+	.loc 3 677 0
+	mul	w0, w0, w4
+	str	w0, [x25, #:lo12:.LANCHOR182]
+	.loc 3 678 0
+	mul	w0, w1, w0
+	.loc 3 679 0
+	ldrh	w1, [x23, #:lo12:.LANCHOR12]
+	.loc 3 678 0
+	str	w0, [x3, #:lo12:.LANCHOR62]
+	.loc 3 689 0
+	mov	w23, -1
+	.loc 3 679 0
+	mul	w0, w1, w0
+	adrp	x1, .LANCHOR34
+	str	w0, [x1, #:lo12:.LANCHOR34]
+	.loc 3 684 0
+	bl	FtlBbmTblFlush
+.LVL2133:
+	.loc 3 687 0
+	ldr	x0, [x24, #:lo12:.LANCHOR43]
+	mov	w1, 0
+	ldrh	w2, [x22, #:lo12:.LANCHOR6]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+.LVL2134:
+	.loc 3 688 0
+	adrp	x0, .LANCHOR60
+	.loc 3 689 0
+	adrp	x1, .LANCHOR82
+	.loc 3 698 0
+	ldrh	w2, [x21, #:lo12:.LANCHOR5]
+	.loc 3 688 0
+	str	wzr, [x0, #:lo12:.LANCHOR60]
+	.loc 3 689 0
+	add	x0, x1, :lo12:.LANCHOR82
+	strh	w23, [x1, #:lo12:.LANCHOR82]
+	.loc 3 698 0
+	mov	w1, 255
+	lsr	w2, w2, 3
+	.loc 3 690 0
+	strh	wzr, [x0, 2]
+	.loc 3 691 0
+	strb	wzr, [x0, 6]
+	.loc 3 692 0
+	strb	wzr, [x0, 8]
+	.loc 3 694 0
+	adrp	x0, .LANCHOR51
+	add	x19, x0, :lo12:.LANCHOR51
+.LVL2135:
+	.loc 3 696 0
+	strh	wzr, [x0, #:lo12:.LANCHOR51]
+	.loc 3 697 0
+	mov	w0, 1
+	strb	w0, [x19, 8]
+	.loc 3 698 0
+	adrp	x0, .LANCHOR1
+	.loc 3 694 0
+	strh	wzr, [x19, 2]
+	.loc 3 698 0
+	ldr	x0, [x0, #:lo12:.LANCHOR1]
+	.loc 3 695 0
+	strb	wzr, [x19, 6]
+	.loc 3 698 0
+	bl	ftl_memset
+.LVL2136:
+.L1635:
+	.loc 3 701 0
+	mov	x0, x19
+	bl	make_superblock
+.LVL2137:
+	.loc 3 702 0
+	ldrb	w1, [x19, 7]
+	ldrh	w0, [x19]
+	cbnz	w1, .L1636
+	.loc 3 705 0
+	ldr	x1, [x24, #:lo12:.LANCHOR43]
+	ubfiz	x0, x0, 1, 16
+	strh	w23, [x1, x0]
+	.loc 3 706 0
+	ldrh	w0, [x19]
+	add	w0, w0, 1
+	strh	w0, [x19]
+	.loc 3 707 0
+	b	.L1635
+.LVL2138:
+.L1622:
+	.loc 3 636 0 discriminator 3
+	ubfiz	x3, x0, 2, 16
+	mvn	w2, w0
+	orr	w2, w0, w2, lsl 16
+	.loc 3 635 0 discriminator 3
+	add	w0, w0, 1
+.LVL2139:
+	and	w0, w0, 65535
+.LVL2140:
+	.loc 3 636 0 discriminator 3
+	str	w2, [x4, x3]
+	.loc 3 637 0 discriminator 3
+	str	w6, [x5, x3]
+	b	.L1621
+.LVL2141:
+.L1624:
+	.loc 3 643 0 discriminator 3
+	mov	w0, w25
+	mov	w1, 1
+	.loc 3 642 0 discriminator 3
+	add	w25, w25, 1
+.LVL2142:
+	.loc 3 643 0 discriminator 3
+	bl	FtlLowFormatEraseBlock
+.LVL2143:
+	add	w19, w19, w0
+.LVL2144:
+	.loc 3 642 0 discriminator 3
+	and	w25, w25, 65535
+	.loc 3 643 0 discriminator 3
+	and	w19, w19, 65535
+.LVL2145:
+	b	.L1623
+.LVL2146:
+.L1625:
+	.loc 3 647 0
+	udiv	w0, w19, w0
+	adrp	x1, .LANCHOR31
+	ldr	w19, [x1, #:lo12:.LANCHOR31]
+.LVL2147:
+	add	w0, w0, w19
+	bl	FtlSysBlkNumInit
+.LVL2148:
+	.loc 3 648 0
+	ldrh	w0, [x24, #:lo12:.LANCHOR4]
+	.loc 3 650 0
+	add	x24, x22, :lo12:.LANCHOR6
+	.loc 3 648 0
+	bl	FtlFreeSysBlkQueueInit
+.LVL2149:
+	.loc 3 650 0
+	ldrh	w19, [x21, #:lo12:.LANCHOR5]
+.LVL2150:
+.L1627:
+	.loc 3 650 0 is_stmt 0 discriminator 1
+	ldrh	w0, [x24]
+	cmp	w0, w19
+	bls	.L1629
+	.loc 3 651 0 is_stmt 1 discriminator 3
+	mov	w0, w19
+	.loc 3 650 0 discriminator 3
+	add	w19, w19, 1
+.LVL2151:
+	.loc 3 651 0 discriminator 3
+	mov	w1, 1
+	.loc 3 650 0 discriminator 3
+	and	w19, w19, 65535
+	.loc 3 651 0 discriminator 3
+	bl	FtlLowFormatEraseBlock
+.LVL2152:
+	b	.L1627
+.LVL2153:
+.L1630:
+	.loc 3 657 0 discriminator 3
+	mov	w0, w24
+	mov	w1, 0
+	.loc 3 656 0 discriminator 3
+	add	w24, w24, 1
+.LVL2154:
+	.loc 3 657 0 discriminator 3
+	bl	FtlLowFormatEraseBlock
+.LVL2155:
+	add	w19, w19, w0
+.LVL2156:
+	.loc 3 656 0 discriminator 3
+	and	w24, w24, 65535
+	.loc 3 657 0 discriminator 3
+	and	w19, w19, 65535
+.LVL2157:
+	b	.L1626
+.LVL2158:
+.L1636:
+	.loc 3 709 0
+	ldr	w1, [x20, #:lo12:.LANCHOR71]
+	.loc 3 710 0
+	ubfiz	x0, x0, 1, 16
+	.loc 3 709 0
+	str	w1, [x19, 12]
+	.loc 3 721 0
+	mov	w23, -1
+	.loc 3 709 0
+	add	w1, w1, 1
+	str	w1, [x20, #:lo12:.LANCHOR71]
+	.loc 3 710 0
+	ldr	x1, [x24, #:lo12:.LANCHOR43]
+	ldrh	w2, [x19, 4]
+	strh	w2, [x1, x0]
+	.loc 3 712 0
+	adrp	x2, .LANCHOR52
+	add	x0, x2, :lo12:.LANCHOR52
+	.loc 3 714 0
+	ldrh	w1, [x19]
+	.loc 3 717 0
+	mov	x19, x0
+	.loc 3 714 0
+	add	w1, w1, 1
+	.loc 3 712 0
+	strh	wzr, [x0, 2]
+	.loc 3 714 0
+	strh	w1, [x2, #:lo12:.LANCHOR52]
+	.loc 3 715 0
+	mov	w1, 1
+	.loc 3 713 0
+	strb	wzr, [x0, 6]
+	.loc 3 715 0
+	strb	w1, [x0, 8]
+.L1637:
+	.loc 3 717 0
+	mov	x0, x19
+	bl	make_superblock
+.LVL2159:
+	.loc 3 718 0
+	ldrb	w1, [x19, 7]
+	ldrh	w0, [x19]
+	cbnz	w1, .L1638
+	.loc 3 721 0
+	ldr	x1, [x24, #:lo12:.LANCHOR43]
+	ubfiz	x0, x0, 1, 16
+	strh	w23, [x1, x0]
+	.loc 3 722 0
+	ldrh	w0, [x19]
+	add	w0, w0, 1
+	strh	w0, [x19]
+	.loc 3 723 0
+	b	.L1637
+.L1638:
+	.loc 3 725 0
+	ldr	w1, [x20, #:lo12:.LANCHOR71]
+	.loc 3 726 0
+	ubfiz	x0, x0, 1, 16
+	.loc 3 725 0
+	str	w1, [x19, 12]
+	.loc 3 727 0
+	mov	w4, -1
+	.loc 3 725 0
+	add	w1, w1, 1
+	str	w1, [x20, #:lo12:.LANCHOR71]
+	.loc 3 726 0
+	ldr	x1, [x24, #:lo12:.LANCHOR43]
+	ldrh	w2, [x19, 4]
+	strh	w2, [x1, x0]
+	.loc 3 727 0
+	adrp	x0, .LANCHOR53
+	strh	w4, [x0, #:lo12:.LANCHOR53]
+	.loc 3 730 0
+	bl	FtlFreeSysBlkQueueOut
+.LVL2160:
+	adrp	x2, .LANCHOR81
+	add	x1, x2, :lo12:.LANCHOR81
+	strh	w0, [x2, #:lo12:.LANCHOR81]
+	.loc 3 733 0
+	ldr	w0, [x25, #:lo12:.LANCHOR182]
+	strh	w0, [x1, 6]
+	.loc 3 734 0
+	ldr	w0, [x20, #:lo12:.LANCHOR71]
+	str	w0, [x1, 8]
+	add	w0, w0, 1
+	.loc 3 731 0
+	strh	wzr, [x1, 2]
+	.loc 3 732 0
+	strh	w4, [x1, 4]
+	.loc 3 734 0
+	str	w0, [x20, #:lo12:.LANCHOR71]
+	.loc 3 735 0
+	bl	FtlVpcTblFlush
+.LVL2161:
+	.loc 3 736 0
+	bl	FtlSysBlkInit
+.LVL2162:
+	cbnz	w0, .L1639
+	.loc 3 737 0
+	adrp	x0, .LANCHOR88
+	mov	w1, 1
+	str	w1, [x0, #:lo12:.LANCHOR88]
+.L1639:
+	.loc 3 739 0
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE210:
+	.size	ftl_low_format, .-ftl_low_format
+	.section	.text.sftl_init,"ax",@progbits
+	.align	2
+	.global	sftl_init
+	.type	sftl_init, %function
+sftl_init:
+.LFB211:
+	.loc 3 743 0
+	.cfi_startproc
+.LVL2163:
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	.loc 3 749 0
+	adrp	x1, .LC70
+	add	x1, x1, :lo12:.LC70
+	.loc 3 746 0
+	mov	w0, -1
+	.loc 3 743 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	str	x19, [sp, 16]
+	.cfi_offset 19, -16
+	.loc 3 746 0
+	adrp	x19, .LANCHOR88
+	str	w0, [x19, #:lo12:.LANCHOR88]
+	.loc 3 749 0
+	adrp	x0, .LC71
+	add	x0, x0, :lo12:.LC71
+	bl	printf
+.LVL2164:
+	.loc 3 750 0
+	adrp	x0, .LANCHOR0
+	add	x0, x0, :lo12:.LANCHOR0
+	bl	FtlConstantsInit
+.LVL2165:
+	.loc 3 751 0
+	bl	FtlMemInit
+.LVL2166:
+	.loc 3 752 0
+	bl	FtlVariablesInit
+.LVL2167:
+	.loc 3 753 0
+	adrp	x0, .LANCHOR4
+	ldrh	w0, [x0, #:lo12:.LANCHOR4]
+	bl	FtlFreeSysBlkQueueInit
+.LVL2168:
+.LDL2:
+	.loc 3 756 0
+	bl	FtlLoadBbt
+.LVL2169:
+	cbnz	w0, .L1648
+	.loc 3 767 0
+	bl	FtlSysBlkInit
+.LVL2170:
+	cbnz	w0, .L1648
+	.loc 3 779 0
+	mov	w0, 1
+	str	w0, [x19, #:lo12:.LANCHOR88]
+	.loc 3 783 0
+	adrp	x0, .LANCHOR48
+	ldrh	w0, [x0, #:lo12:.LANCHOR48]
+	cmp	w0, 15
+	bhi	.L1648
+	mov	w19, 8129
+.L1647:
+.LVL2171:
+.LBB302:
+	.loc 3 786 0 discriminator 3
+	mov	w1, 1
+	mov	w0, 0
+	bl	rk_ftl_garbage_collect
+.LVL2172:
+	.loc 3 785 0 discriminator 3
+	subs	w19, w19, #1
+.LVL2173:
+	bne	.L1647
+.LVL2174:
+.L1648:
+.LBE302:
+	.loc 3 794 0
+	mov	w0, 0
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE211:
+	.size	sftl_init, .-sftl_init
+	.section	.text.ftl_memcmp,"ax",@progbits
+	.align	2
+	.global	ftl_memcmp
+	.type	ftl_memcmp, %function
+ftl_memcmp:
+.LFB347:
+	.loc 1 248 0
+	.cfi_startproc
+.LVL2175:
+	.loc 1 249 0
+	uxtw	x2, w2
+	b	memcmp
+.LVL2176:
+	.cfi_endproc
+.LFE347:
+	.size	ftl_memcmp, .-ftl_memcmp
+	.global	ftl_temp_buf
+	.global	g_nand_ops
+	.global	g_nand_phy_info
+	.global	gc_ink_free_return_value
+	.global	check_vpc_table
+	.global	FtlUpdateVaildLpnCount
+	.global	g_ect_tbl_power_up_flush
+	.global	power_up_flag
+	.global	gFtlInitStatus
+	.global	DeviceCapacity
+	.global	g_power_lost_recovery_flag
+	.global	c_mlc_erase_count_value
+	.global	g_recovery_ppa_tbl
+	.global	g_recovery_page_min_ver
+	.global	g_recovery_page_num
+	.global	g_cur_erase_blk
+	.global	g_gc_skip_write_count
+	.global	g_gc_head_data_block_count
+	.global	g_gc_head_data_block
+	.global	g_ftl_nand_free_count
+	.global	g_in_swl_replace
+	.global	g_in_gc_progress
+	.global	g_max_erase_count
+	.global	g_totle_sys_slc_erase_count
+	.global	g_totle_slc_erase_count
+	.global	g_min_erase_count
+	.global	g_totle_avg_erase_count
+	.global	g_totle_mlc_erase_count
+	.global	g_totle_l2p_write_count
+	.global	g_totle_cache_write_count
+	.global	g_tmp_data_superblock_id
+	.global	g_totle_read_page_count
+	.global	g_totle_discard_page_count
+	.global	g_totle_read_sector
+	.global	g_totle_write_sector
+	.global	g_totle_write_page_count
+	.global	g_totle_gc_page_count
+	.global	g_gc_blk_index
+	.global	g_gc_merge_free_blk_threshold
+	.global	g_gc_free_blk_threshold
+	.global	g_gc_bad_block_temp_tbl
+	.global	g_gc_bad_block_gc_index
+	.global	g_gc_bad_block_temp_num
+	.global	g_gc_next_blk_1
+	.global	g_gc_next_blk
+	.global	g_gc_cur_blk_max_valid_pages
+	.global	g_gc_cur_blk_valid_pages
+	.global	g_gc_page_offset
+	.global	g_gc_blk_num
+	.global	p_gc_blk_tbl
+	.global	p_gc_page_info
+	.global	g_sys_ext_data
+	.global	g_sys_save_data
+	.global	gp_last_act_superblock
+	.global	g_gc_superblock
+	.global	g_gc_temp_superblock
+	.global	g_buffer_superblock
+	.global	g_active_superblock
+	.global	g_num_data_superblocks
+	.global	g_num_free_superblocks
+	.global	p_data_block_list_tail
+	.global	p_data_block_list_head
+	.global	p_free_data_block_list_head
+	.global	p_data_block_list_table
+	.global	g_l2p_last_update_region_id
+	.global	p_l2p_map_buf
+	.global	p_l2p_ram_map
+	.global	g_totle_vendor_block
+	.global	p_vendor_region_ppn_table
+	.global	p_vendor_block_ver_table
+	.global	p_vendor_block_valid_page_count
+	.global	p_vendor_block_table
+	.global	g_totle_map_block
+	.global	p_map_region_ppn_table
+	.global	p_map_block_ver_table
+	.global	p_map_block_valid_page_count
+	.global	p_map_block_table
+	.global	p_blk_mode_table
+	.global	p_valid_page_count_check_table
+	.global	p_valid_page_count_table
+	.global	g_totle_swl_count
+	.global	p_swl_mul_table
+	.global	p_erase_count_table
+	.global	g_ect_tbl_info_size
+	.global	gp_ect_tbl_info
+	.global	g_gc_num_req
+	.global	c_gc_page_buf_num
+	.global	gp_gc_page_buf_info
+	.global	p_gc_data_buf
+	.global	p_gc_spare_buf
+	.global	p_io_spare_buf
+	.global	p_io_data_buf_1
+	.global	p_io_data_buf_0
+	.global	p_sys_spare_buf
+	.global	p_vendor_data_buf
+	.global	p_sys_data_buf_1
+	.global	p_sys_data_buf
+	.global	p_plane_order_table
+	.global	g_req_cache
+	.global	req_gc_dst
+	.global	req_gc
+	.global	req_erase
+	.global	req_prgm
+	.global	req_read
+	.global	req_sys
+	.global	gVendorBlkInfo
+	.global	gL2pMapInfo
+	.global	gSysFreeQueue
+	.global	gSysInfo
+	.global	gBbtInfo
+	.global	g_MaxLbn
+	.global	g_VaildLpn
+	.global	g_MaxLpn
+	.global	g_MaxLbaSector
+	.global	g_GlobalDataVersion
+	.global	g_GlobalSysVersion
+	.global	ftl_gc_temp_power_lost_recovery_flag
+	.global	c_ftl_nand_max_data_blks
+	.global	c_ftl_nand_data_op_blks_per_plane
+	.global	c_ftl_nand_data_blks_per_plane
+	.global	c_ftl_nand_max_sys_blks
+	.global	c_ftl_nand_init_sys_blks_per_plane
+	.global	c_ftl_nand_sys_blks_per_plane
+	.global	c_ftl_vendor_part_size
+	.global	c_ftl_nand_max_vendor_blks
+	.global	c_ftl_nand_max_map_blks
+	.global	c_ftl_nand_map_blks_per_plane
+	.global	c_ftl_nand_vendor_region_num
+	.global	c_ftl_nand_l2pmap_ram_region_num
+	.global	c_ftl_nand_map_region_num
+	.global	c_ftl_nand_totle_phy_blks
+	.global	c_ftl_nand_reserved_blks
+	.global	c_ftl_nand_byte_pre_oob
+	.global	c_ftl_nand_byte_pre_page
+	.global	c_ftl_nand_sec_pre_page_shift
+	.global	c_ftl_nand_sec_pre_page
+	.global	c_ftl_nand_page_pre_super_blk
+	.global	c_ftl_nand_page_pre_slc_blk
+	.global	c_ftl_nand_page_pre_blk
+	.global	c_ftl_nand_bbm_buf_size
+	.global	c_ftl_nand_ext_blk_pre_plane
+	.global	c_ftl_nand_blk_pre_plane
+	.global	c_ftl_nand_planes_num
+	.global	c_ftl_nand_blks_per_die_shift
+	.global	c_ftl_nand_blks_per_die
+	.global	c_ftl_nand_planes_per_die
+	.global	c_ftl_nand_die_num
+	.global	c_ftl_nand_type
+	.section	.bss.DeviceCapacity,"aw",@nobits
+	.align	2
+	.set	.LANCHOR26,. + 0
+	.type	DeviceCapacity, %object
+	.size	DeviceCapacity, 4
+DeviceCapacity:
+	.zero	4
+	.section	.bss.FtlUpdateVaildLpnCount,"aw",@nobits
+	.align	1
+	.set	.LANCHOR59,. + 0
+	.type	FtlUpdateVaildLpnCount, %object
+	.size	FtlUpdateVaildLpnCount, 2
+FtlUpdateVaildLpnCount:
+	.zero	2
+	.section	.bss.c_ftl_nand_bbm_buf_size,"aw",@nobits
+	.align	1
+	.set	.LANCHOR137,. + 0
+	.type	c_ftl_nand_bbm_buf_size, %object
+	.size	c_ftl_nand_bbm_buf_size, 2
+c_ftl_nand_bbm_buf_size:
+	.zero	2
+	.section	.bss.c_ftl_nand_blk_pre_plane,"aw",@nobits
+	.align	1
+	.set	.LANCHOR6,. + 0
+	.type	c_ftl_nand_blk_pre_plane, %object
+	.size	c_ftl_nand_blk_pre_plane, 2
+c_ftl_nand_blk_pre_plane:
+	.zero	2
+	.section	.bss.c_ftl_nand_blks_per_die,"aw",@nobits
+	.align	1
+	.set	.LANCHOR17,. + 0
+	.type	c_ftl_nand_blks_per_die, %object
+	.size	c_ftl_nand_blks_per_die, 2
+c_ftl_nand_blks_per_die:
+	.zero	2
+	.section	.bss.c_ftl_nand_blks_per_die_shift,"aw",@nobits
+	.align	1
+	.set	.LANCHOR18,. + 0
+	.type	c_ftl_nand_blks_per_die_shift, %object
+	.size	c_ftl_nand_blks_per_die_shift, 2
+c_ftl_nand_blks_per_die_shift:
+	.zero	2
+	.section	.bss.c_ftl_nand_byte_pre_oob,"aw",@nobits
+	.align	1
+	.set	.LANCHOR24,. + 0
+	.type	c_ftl_nand_byte_pre_oob, %object
+	.size	c_ftl_nand_byte_pre_oob, 2
+c_ftl_nand_byte_pre_oob:
+	.zero	2
+	.section	.bss.c_ftl_nand_byte_pre_page,"aw",@nobits
+	.align	1
+	.set	.LANCHOR23,. + 0
+	.type	c_ftl_nand_byte_pre_page, %object
+	.size	c_ftl_nand_byte_pre_page, 2
+c_ftl_nand_byte_pre_page:
+	.zero	2
+	.section	.bss.c_ftl_nand_data_blks_per_plane,"aw",@nobits
+	.align	1
+	.set	.LANCHOR5,. + 0
+	.type	c_ftl_nand_data_blks_per_plane, %object
+	.size	c_ftl_nand_data_blks_per_plane, 2
+c_ftl_nand_data_blks_per_plane:
+	.zero	2
+	.section	.bss.c_ftl_nand_data_op_blks_per_plane,"aw",@nobits
+	.align	1
+	.set	.LANCHOR80,. + 0
+	.type	c_ftl_nand_data_op_blks_per_plane, %object
+	.size	c_ftl_nand_data_op_blks_per_plane, 2
+c_ftl_nand_data_op_blks_per_plane:
+	.zero	2
+	.section	.bss.c_ftl_nand_die_num,"aw",@nobits
+	.align	1
+	.set	.LANCHOR10,. + 0
+	.type	c_ftl_nand_die_num, %object
+	.size	c_ftl_nand_die_num, 2
+c_ftl_nand_die_num:
+	.zero	2
+	.section	.bss.c_ftl_nand_ext_blk_pre_plane,"aw",@nobits
+	.align	1
+	.set	.LANCHOR15,. + 0
+	.type	c_ftl_nand_ext_blk_pre_plane, %object
+	.size	c_ftl_nand_ext_blk_pre_plane, 2
+c_ftl_nand_ext_blk_pre_plane:
+	.zero	2
+	.section	.bss.c_ftl_nand_init_sys_blks_per_plane,"aw",@nobits
+	.align	2
+	.set	.LANCHOR31,. + 0
+	.type	c_ftl_nand_init_sys_blks_per_plane, %object
+	.size	c_ftl_nand_init_sys_blks_per_plane, 4
+c_ftl_nand_init_sys_blks_per_plane:
+	.zero	4
+	.section	.bss.c_ftl_nand_l2pmap_ram_region_num,"aw",@nobits
+	.align	1
+	.set	.LANCHOR33,. + 0
+	.type	c_ftl_nand_l2pmap_ram_region_num, %object
+	.size	c_ftl_nand_l2pmap_ram_region_num, 2
+c_ftl_nand_l2pmap_ram_region_num:
+	.zero	2
+	.section	.bss.c_ftl_nand_map_blks_per_plane,"aw",@nobits
+	.align	1
+	.set	.LANCHOR29,. + 0
+	.type	c_ftl_nand_map_blks_per_plane, %object
+	.size	c_ftl_nand_map_blks_per_plane, 2
+c_ftl_nand_map_blks_per_plane:
+	.zero	2
+	.section	.bss.c_ftl_nand_map_region_num,"aw",@nobits
+	.align	1
+	.set	.LANCHOR32,. + 0
+	.type	c_ftl_nand_map_region_num, %object
+	.size	c_ftl_nand_map_region_num, 2
+c_ftl_nand_map_region_num:
+	.zero	2
+	.section	.bss.c_ftl_nand_max_data_blks,"aw",@nobits
+	.align	2
+	.set	.LANCHOR7,. + 0
+	.type	c_ftl_nand_max_data_blks, %object
+	.size	c_ftl_nand_max_data_blks, 4
+c_ftl_nand_max_data_blks:
+	.zero	4
+	.section	.bss.c_ftl_nand_max_map_blks,"aw",@nobits
+	.align	2
+	.set	.LANCHOR30,. + 0
+	.type	c_ftl_nand_max_map_blks, %object
+	.size	c_ftl_nand_max_map_blks, 4
+c_ftl_nand_max_map_blks:
+	.zero	4
+	.section	.bss.c_ftl_nand_max_sys_blks,"aw",@nobits
+	.align	2
+	.set	.LANCHOR4,. + 0
+	.type	c_ftl_nand_max_sys_blks, %object
+	.size	c_ftl_nand_max_sys_blks, 4
+c_ftl_nand_max_sys_blks:
+	.zero	4
+	.section	.bss.c_ftl_nand_max_vendor_blks,"aw",@nobits
+	.align	1
+	.set	.LANCHOR27,. + 0
+	.type	c_ftl_nand_max_vendor_blks, %object
+	.size	c_ftl_nand_max_vendor_blks, 2
+c_ftl_nand_max_vendor_blks:
+	.zero	2
+	.section	.bss.c_ftl_nand_page_pre_blk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR19,. + 0
+	.type	c_ftl_nand_page_pre_blk, %object
+	.size	c_ftl_nand_page_pre_blk, 2
+c_ftl_nand_page_pre_blk:
+	.zero	2
+	.section	.bss.c_ftl_nand_page_pre_slc_blk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR20,. + 0
+	.type	c_ftl_nand_page_pre_slc_blk, %object
+	.size	c_ftl_nand_page_pre_slc_blk, 2
+c_ftl_nand_page_pre_slc_blk:
+	.zero	2
+	.section	.bss.c_ftl_nand_page_pre_super_blk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR21,. + 0
+	.type	c_ftl_nand_page_pre_super_blk, %object
+	.size	c_ftl_nand_page_pre_super_blk, 2
+c_ftl_nand_page_pre_super_blk:
+	.zero	2
+	.section	.bss.c_ftl_nand_planes_num,"aw",@nobits
+	.align	1
+	.set	.LANCHOR3,. + 0
+	.type	c_ftl_nand_planes_num, %object
+	.size	c_ftl_nand_planes_num, 2
+c_ftl_nand_planes_num:
+	.zero	2
+	.section	.bss.c_ftl_nand_planes_per_die,"aw",@nobits
+	.align	1
+	.set	.LANCHOR11,. + 0
+	.type	c_ftl_nand_planes_per_die, %object
+	.size	c_ftl_nand_planes_per_die, 2
+c_ftl_nand_planes_per_die:
+	.zero	2
+	.section	.bss.c_ftl_nand_reserved_blks,"aw",@nobits
+	.align	1
+	.set	.LANCHOR25,. + 0
+	.type	c_ftl_nand_reserved_blks, %object
+	.size	c_ftl_nand_reserved_blks, 2
+c_ftl_nand_reserved_blks:
+	.zero	2
+	.section	.bss.c_ftl_nand_sec_pre_page,"aw",@nobits
+	.align	1
+	.set	.LANCHOR12,. + 0
+	.type	c_ftl_nand_sec_pre_page, %object
+	.size	c_ftl_nand_sec_pre_page, 2
+c_ftl_nand_sec_pre_page:
+	.zero	2
+	.section	.bss.c_ftl_nand_sec_pre_page_shift,"aw",@nobits
+	.align	1
+	.set	.LANCHOR22,. + 0
+	.type	c_ftl_nand_sec_pre_page_shift, %object
+	.size	c_ftl_nand_sec_pre_page_shift, 2
+c_ftl_nand_sec_pre_page_shift:
+	.zero	2
+	.section	.bss.c_ftl_nand_sys_blks_per_plane,"aw",@nobits
+	.align	2
+	.set	.LANCHOR2,. + 0
+	.type	c_ftl_nand_sys_blks_per_plane, %object
+	.size	c_ftl_nand_sys_blks_per_plane, 4
+c_ftl_nand_sys_blks_per_plane:
+	.zero	4
+	.section	.bss.c_ftl_nand_totle_phy_blks,"aw",@nobits
+	.align	2
+	.set	.LANCHOR8,. + 0
+	.type	c_ftl_nand_totle_phy_blks, %object
+	.size	c_ftl_nand_totle_phy_blks, 4
+c_ftl_nand_totle_phy_blks:
+	.zero	4
+	.section	.bss.c_ftl_nand_type,"aw",@nobits
+	.align	1
+	.set	.LANCHOR9,. + 0
+	.type	c_ftl_nand_type, %object
+	.size	c_ftl_nand_type, 2
+c_ftl_nand_type:
+	.zero	2
+	.section	.bss.c_ftl_nand_vendor_region_num,"aw",@nobits
+	.align	1
+	.set	.LANCHOR28,. + 0
+	.type	c_ftl_nand_vendor_region_num, %object
+	.size	c_ftl_nand_vendor_region_num, 2
+c_ftl_nand_vendor_region_num:
+	.zero	2
+	.section	.bss.c_ftl_vendor_part_size,"aw",@nobits
+	.align	1
+	.set	.LANCHOR16,. + 0
+	.type	c_ftl_vendor_part_size, %object
+	.size	c_ftl_vendor_part_size, 2
+c_ftl_vendor_part_size:
+	.zero	2
+	.section	.bss.c_gc_page_buf_num,"aw",@nobits
+	.align	2
+	.set	.LANCHOR96,. + 0
+	.type	c_gc_page_buf_num, %object
+	.size	c_gc_page_buf_num, 4
+c_gc_page_buf_num:
+	.zero	4
+	.section	.bss.c_mlc_erase_count_value,"aw",@nobits
+	.align	1
+	.set	.LANCHOR14,. + 0
+	.type	c_mlc_erase_count_value, %object
+	.size	c_mlc_erase_count_value, 2
+c_mlc_erase_count_value:
+	.zero	2
+	.section	.bss.check_buf,"aw",@nobits
+	.align	3
+	.type	check_buf, %object
+	.size	check_buf, 4096
+check_buf:
+	.zero	4096
+	.section	.bss.check_spare_buf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR111,. + 0
+	.type	check_spare_buf, %object
+	.size	check_spare_buf, 512
+check_spare_buf:
+	.zero	512
+	.section	.bss.check_vpc_table,"aw",@nobits
+	.align	3
+	.type	check_vpc_table, %object
+	.size	check_vpc_table, 16384
+check_vpc_table:
+	.zero	16384
+	.section	.bss.ftl_gc_temp_power_lost_recovery_flag,"aw",@nobits
+	.align	2
+	.set	.LANCHOR153,. + 0
+	.type	ftl_gc_temp_power_lost_recovery_flag, %object
+	.size	ftl_gc_temp_power_lost_recovery_flag, 4
+ftl_gc_temp_power_lost_recovery_flag:
+	.zero	4
+	.section	.bss.ftl_temp_buf,"aw",@nobits
+	.align	3
+	.type	ftl_temp_buf, %object
+	.size	ftl_temp_buf, 4096
+ftl_temp_buf:
+	.zero	4096
+	.section	.bss.gBbtInfo,"aw",@nobits
+	.align	3
+	.set	.LANCHOR37,. + 0
+	.type	gBbtInfo, %object
+	.size	gBbtInfo, 96
+gBbtInfo:
+	.zero	96
+	.section	.bss.gL2pMapInfo,"aw",@nobits
+	.align	3
+	.set	.LANCHOR144,. + 0
+	.type	gL2pMapInfo, %object
+	.size	gL2pMapInfo, 64
+gL2pMapInfo:
+	.zero	64
+	.section	.bss.gSysFreeQueue,"aw",@nobits
+	.align	3
+	.set	.LANCHOR38,. + 0
+	.type	gSysFreeQueue, %object
+	.size	gSysFreeQueue, 2056
+gSysFreeQueue:
+	.zero	2056
+	.section	.bss.gSysInfo,"aw",@nobits
+	.align	3
+	.set	.LANCHOR81,. + 0
+	.type	gSysInfo, %object
+	.size	gSysInfo, 12
+gSysInfo:
+	.zero	12
+	.section	.bss.gVendorBlkInfo,"aw",@nobits
+	.align	3
+	.set	.LANCHOR149,. + 0
+	.type	gVendorBlkInfo, %object
+	.size	gVendorBlkInfo, 64
+gVendorBlkInfo:
+	.zero	64
+	.section	.bss.g_GlobalDataVersion,"aw",@nobits
+	.align	2
+	.set	.LANCHOR72,. + 0
+	.type	g_GlobalDataVersion, %object
+	.size	g_GlobalDataVersion, 4
+g_GlobalDataVersion:
+	.zero	4
+	.section	.bss.g_GlobalSysVersion,"aw",@nobits
+	.align	2
+	.set	.LANCHOR71,. + 0
+	.type	g_GlobalSysVersion, %object
+	.size	g_GlobalSysVersion, 4
+g_GlobalSysVersion:
+	.zero	4
+	.section	.bss.g_MaxLbaSector,"aw",@nobits
+	.align	2
+	.set	.LANCHOR34,. + 0
+	.type	g_MaxLbaSector, %object
+	.size	g_MaxLbaSector, 4
+g_MaxLbaSector:
+	.zero	4
+	.section	.bss.g_MaxLbn,"aw",@nobits
+	.align	2
+	.set	.LANCHOR182,. + 0
+	.type	g_MaxLbn, %object
+	.size	g_MaxLbn, 4
+g_MaxLbn:
+	.zero	4
+	.section	.bss.g_MaxLpn,"aw",@nobits
+	.align	2
+	.set	.LANCHOR62,. + 0
+	.type	g_MaxLpn, %object
+	.size	g_MaxLpn, 4
+g_MaxLpn:
+	.zero	4
+	.section	.bss.g_VaildLpn,"aw",@nobits
+	.align	2
+	.set	.LANCHOR60,. + 0
+	.type	g_VaildLpn, %object
+	.size	g_VaildLpn, 4
+g_VaildLpn:
+	.zero	4
+	.section	.bss.g_active_superblock,"aw",@nobits
+	.align	3
+	.set	.LANCHOR51,. + 0
+	.type	g_active_superblock, %object
+	.size	g_active_superblock, 48
+g_active_superblock:
+	.zero	48
+	.section	.bss.g_buffer_superblock,"aw",@nobits
+	.align	3
+	.set	.LANCHOR52,. + 0
+	.type	g_buffer_superblock, %object
+	.size	g_buffer_superblock, 48
+g_buffer_superblock:
+	.zero	48
+	.section	.bss.g_cur_erase_blk,"aw",@nobits
+	.align	2
+	.set	.LANCHOR113,. + 0
+	.type	g_cur_erase_blk, %object
+	.size	g_cur_erase_blk, 4
+g_cur_erase_blk:
+	.zero	4
+	.section	.bss.g_ect_tbl_info_size,"aw",@nobits
+	.align	1
+	.set	.LANCHOR125,. + 0
+	.type	g_ect_tbl_info_size, %object
+	.size	g_ect_tbl_info_size, 2
+g_ect_tbl_info_size:
+	.zero	2
+	.section	.bss.g_ect_tbl_power_up_flush,"aw",@nobits
+	.align	1
+	.set	.LANCHOR166,. + 0
+	.type	g_ect_tbl_power_up_flush, %object
+	.size	g_ect_tbl_power_up_flush, 2
+g_ect_tbl_power_up_flush:
+	.zero	2
+	.section	.bss.g_ftl_nand_free_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR178,. + 0
+	.type	g_ftl_nand_free_count, %object
+	.size	g_ftl_nand_free_count, 4
+g_ftl_nand_free_count:
+	.zero	4
+	.section	.bss.g_gc_bad_block_gc_index,"aw",@nobits
+	.align	1
+	.set	.LANCHOR105,. + 0
+	.type	g_gc_bad_block_gc_index, %object
+	.size	g_gc_bad_block_gc_index, 2
+g_gc_bad_block_gc_index:
+	.zero	2
+	.section	.bss.g_gc_bad_block_temp_num,"aw",@nobits
+	.align	1
+	.set	.LANCHOR103,. + 0
+	.type	g_gc_bad_block_temp_num, %object
+	.size	g_gc_bad_block_temp_num, 2
+g_gc_bad_block_temp_num:
+	.zero	2
+	.section	.bss.g_gc_bad_block_temp_tbl,"aw",@nobits
+	.align	3
+	.set	.LANCHOR104,. + 0
+	.type	g_gc_bad_block_temp_tbl, %object
+	.size	g_gc_bad_block_temp_tbl, 34
+g_gc_bad_block_temp_tbl:
+	.zero	34
+	.section	.bss.g_gc_blk_index,"aw",@nobits
+	.align	1
+	.set	.LANCHOR87,. + 0
+	.type	g_gc_blk_index, %object
+	.size	g_gc_blk_index, 2
+g_gc_blk_index:
+	.zero	2
+	.section	.bss.g_gc_blk_num,"aw",@nobits
+	.align	1
+	.set	.LANCHOR97,. + 0
+	.type	g_gc_blk_num, %object
+	.size	g_gc_blk_num, 2
+g_gc_blk_num:
+	.zero	2
+	.section	.bss.g_gc_cur_blk_max_valid_pages,"aw",@nobits
+	.align	1
+	.set	.LANCHOR176,. + 0
+	.type	g_gc_cur_blk_max_valid_pages, %object
+	.size	g_gc_cur_blk_max_valid_pages, 2
+g_gc_cur_blk_max_valid_pages:
+	.zero	2
+	.section	.bss.g_gc_cur_blk_valid_pages,"aw",@nobits
+	.align	1
+	.set	.LANCHOR175,. + 0
+	.type	g_gc_cur_blk_valid_pages, %object
+	.size	g_gc_cur_blk_valid_pages, 2
+g_gc_cur_blk_valid_pages:
+	.zero	2
+	.section	.bss.g_gc_free_blk_threshold,"aw",@nobits
+	.align	1
+	.set	.LANCHOR84,. + 0
+	.type	g_gc_free_blk_threshold, %object
+	.size	g_gc_free_blk_threshold, 2
+g_gc_free_blk_threshold:
+	.zero	2
+	.section	.bss.g_gc_head_data_block,"aw",@nobits
+	.align	2
+	.set	.LANCHOR118,. + 0
+	.type	g_gc_head_data_block, %object
+	.size	g_gc_head_data_block, 4
+g_gc_head_data_block:
+	.zero	4
+	.section	.bss.g_gc_head_data_block_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR119,. + 0
+	.type	g_gc_head_data_block_count, %object
+	.size	g_gc_head_data_block_count, 4
+g_gc_head_data_block_count:
+	.zero	4
+	.section	.bss.g_gc_merge_free_blk_threshold,"aw",@nobits
+	.align	1
+	.set	.LANCHOR85,. + 0
+	.type	g_gc_merge_free_blk_threshold, %object
+	.size	g_gc_merge_free_blk_threshold, 2
+g_gc_merge_free_blk_threshold:
+	.zero	2
+	.section	.bss.g_gc_next_blk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR101,. + 0
+	.type	g_gc_next_blk, %object
+	.size	g_gc_next_blk, 2
+g_gc_next_blk:
+	.zero	2
+	.section	.bss.g_gc_next_blk_1,"aw",@nobits
+	.align	1
+	.set	.LANCHOR102,. + 0
+	.type	g_gc_next_blk_1, %object
+	.size	g_gc_next_blk_1, 2
+g_gc_next_blk_1:
+	.zero	2
+	.section	.bss.g_gc_num_req,"aw",@nobits
+	.align	2
+	.set	.LANCHOR91,. + 0
+	.type	g_gc_num_req, %object
+	.size	g_gc_num_req, 4
+g_gc_num_req:
+	.zero	4
+	.section	.bss.g_gc_page_offset,"aw",@nobits
+	.align	1
+	.set	.LANCHOR99,. + 0
+	.type	g_gc_page_offset, %object
+	.size	g_gc_page_offset, 2
+g_gc_page_offset:
+	.zero	2
+	.section	.bss.g_gc_skip_write_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR86,. + 0
+	.type	g_gc_skip_write_count, %object
+	.size	g_gc_skip_write_count, 4
+g_gc_skip_write_count:
+	.zero	4
+	.section	.bss.g_gc_superblock,"aw",@nobits
+	.align	3
+	.set	.LANCHOR82,. + 0
+	.type	g_gc_superblock, %object
+	.size	g_gc_superblock, 48
+g_gc_superblock:
+	.zero	48
+	.section	.bss.g_gc_temp_superblock,"aw",@nobits
+	.align	3
+	.set	.LANCHOR53,. + 0
+	.type	g_gc_temp_superblock, %object
+	.size	g_gc_temp_superblock, 48
+g_gc_temp_superblock:
+	.zero	48
+	.section	.bss.g_in_gc_progress,"aw",@nobits
+	.align	2
+	.set	.LANCHOR117,. + 0
+	.type	g_in_gc_progress, %object
+	.size	g_in_gc_progress, 4
+g_in_gc_progress:
+	.zero	4
+	.section	.bss.g_in_swl_replace,"aw",@nobits
+	.align	2
+	.set	.LANCHOR89,. + 0
+	.type	g_in_swl_replace, %object
+	.size	g_in_swl_replace, 4
+g_in_swl_replace:
+	.zero	4
+	.section	.bss.g_l2p_last_update_region_id,"aw",@nobits
+	.align	1
+	.set	.LANCHOR57,. + 0
+	.type	g_l2p_last_update_region_id, %object
+	.size	g_l2p_last_update_region_id, 2
+g_l2p_last_update_region_id:
+	.zero	2
+	.section	.bss.g_max_erase_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR77,. + 0
+	.type	g_max_erase_count, %object
+	.size	g_max_erase_count, 4
+g_max_erase_count:
+	.zero	4
+	.section	.bss.g_min_erase_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR78,. + 0
+	.type	g_min_erase_count, %object
+	.size	g_min_erase_count, 4
+g_min_erase_count:
+	.zero	4
+	.section	.bss.g_nand_ops,"aw",@nobits
+	.align	3
+	.set	.LANCHOR107,. + 0
+	.type	g_nand_ops, %object
+	.size	g_nand_ops, 32
+g_nand_ops:
+	.zero	32
+	.section	.bss.g_nand_phy_info,"aw",@nobits
+	.align	3
+	.set	.LANCHOR0,. + 0
+	.type	g_nand_phy_info, %object
+	.size	g_nand_phy_info, 24
+g_nand_phy_info:
+	.zero	24
+	.section	.bss.g_num_data_superblocks,"aw",@nobits
+	.align	1
+	.set	.LANCHOR45,. + 0
+	.type	g_num_data_superblocks, %object
+	.size	g_num_data_superblocks, 2
+g_num_data_superblocks:
+	.zero	2
+	.section	.bss.g_num_free_superblocks,"aw",@nobits
+	.align	1
+	.set	.LANCHOR48,. + 0
+	.type	g_num_free_superblocks, %object
+	.size	g_num_free_superblocks, 2
+g_num_free_superblocks:
+	.zero	2
+	.section	.bss.g_power_lost_recovery_flag,"aw",@nobits
+	.align	1
+	.set	.LANCHOR162,. + 0
+	.type	g_power_lost_recovery_flag, %object
+	.size	g_power_lost_recovery_flag, 2
+g_power_lost_recovery_flag:
+	.zero	2
+	.section	.bss.g_recovery_page_min_ver,"aw",@nobits
+	.align	2
+	.set	.LANCHOR154,. + 0
+	.type	g_recovery_page_min_ver, %object
+	.size	g_recovery_page_min_ver, 4
+g_recovery_page_min_ver:
+	.zero	4
+	.section	.bss.g_recovery_page_num,"aw",@nobits
+	.align	2
+	.set	.LANCHOR163,. + 0
+	.type	g_recovery_page_num, %object
+	.size	g_recovery_page_num, 4
+g_recovery_page_num:
+	.zero	4
+	.section	.bss.g_recovery_ppa_tbl,"aw",@nobits
+	.align	3
+	.set	.LANCHOR164,. + 0
+	.type	g_recovery_ppa_tbl, %object
+	.size	g_recovery_ppa_tbl, 128
+g_recovery_ppa_tbl:
+	.zero	128
+	.section	.bss.g_req_cache,"aw",@nobits
+	.align	3
+	.set	.LANCHOR150,. + 0
+	.type	g_req_cache, %object
+	.size	g_req_cache, 8
+g_req_cache:
+	.zero	8
+	.section	.bss.g_sys_ext_data,"aw",@nobits
+	.align	3
+	.set	.LANCHOR83,. + 0
+	.type	g_sys_ext_data, %object
+	.size	g_sys_ext_data, 512
+g_sys_ext_data:
+	.zero	512
+	.section	.bss.g_sys_save_data,"aw",@nobits
+	.align	3
+	.set	.LANCHOR79,. + 0
+	.type	g_sys_save_data, %object
+	.size	g_sys_save_data, 48
+g_sys_save_data:
+	.zero	48
+	.section	.bss.g_tmp_data_superblock_id,"aw",@nobits
+	.align	1
+	.set	.LANCHOR151,. + 0
+	.type	g_tmp_data_superblock_id, %object
+	.size	g_tmp_data_superblock_id, 2
+g_tmp_data_superblock_id:
+	.zero	2
+	.section	.bss.g_totle_avg_erase_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR75,. + 0
+	.type	g_totle_avg_erase_count, %object
+	.size	g_totle_avg_erase_count, 4
+g_totle_avg_erase_count:
+	.zero	4
+	.section	.bss.g_totle_cache_write_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR66,. + 0
+	.type	g_totle_cache_write_count, %object
+	.size	g_totle_cache_write_count, 4
+g_totle_cache_write_count:
+	.zero	4
+	.section	.bss.g_totle_discard_page_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR64,. + 0
+	.type	g_totle_discard_page_count, %object
+	.size	g_totle_discard_page_count, 4
+g_totle_discard_page_count:
+	.zero	4
+	.section	.bss.g_totle_gc_page_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR68,. + 0
+	.type	g_totle_gc_page_count, %object
+	.size	g_totle_gc_page_count, 4
+g_totle_gc_page_count:
+	.zero	4
+	.section	.bss.g_totle_l2p_write_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR67,. + 0
+	.type	g_totle_l2p_write_count, %object
+	.size	g_totle_l2p_write_count, 4
+g_totle_l2p_write_count:
+	.zero	4
+	.section	.bss.g_totle_map_block,"aw",@nobits
+	.align	1
+	.set	.LANCHOR147,. + 0
+	.type	g_totle_map_block, %object
+	.size	g_totle_map_block, 2
+g_totle_map_block:
+	.zero	2
+	.section	.bss.g_totle_mlc_erase_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR73,. + 0
+	.type	g_totle_mlc_erase_count, %object
+	.size	g_totle_mlc_erase_count, 4
+g_totle_mlc_erase_count:
+	.zero	4
+	.section	.bss.g_totle_read_page_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR63,. + 0
+	.type	g_totle_read_page_count, %object
+	.size	g_totle_read_page_count, 4
+g_totle_read_page_count:
+	.zero	4
+	.section	.bss.g_totle_read_sector,"aw",@nobits
+	.align	2
+	.set	.LANCHOR70,. + 0
+	.type	g_totle_read_sector, %object
+	.size	g_totle_read_sector, 4
+g_totle_read_sector:
+	.zero	4
+	.section	.bss.g_totle_slc_erase_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR74,. + 0
+	.type	g_totle_slc_erase_count, %object
+	.size	g_totle_slc_erase_count, 4
+g_totle_slc_erase_count:
+	.zero	4
+	.section	.bss.g_totle_swl_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR152,. + 0
+	.type	g_totle_swl_count, %object
+	.size	g_totle_swl_count, 4
+g_totle_swl_count:
+	.zero	4
+	.section	.bss.g_totle_sys_slc_erase_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR76,. + 0
+	.type	g_totle_sys_slc_erase_count, %object
+	.size	g_totle_sys_slc_erase_count, 4
+g_totle_sys_slc_erase_count:
+	.zero	4
+	.section	.bss.g_totle_vendor_block,"aw",@nobits
+	.align	1
+	.set	.LANCHOR35,. + 0
+	.type	g_totle_vendor_block, %object
+	.size	g_totle_vendor_block, 2
+g_totle_vendor_block:
+	.zero	2
+	.section	.bss.g_totle_write_page_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR65,. + 0
+	.type	g_totle_write_page_count, %object
+	.size	g_totle_write_page_count, 4
+g_totle_write_page_count:
+	.zero	4
+	.section	.bss.g_totle_write_sector,"aw",@nobits
+	.align	2
+	.set	.LANCHOR69,. + 0
+	.type	g_totle_write_sector, %object
+	.size	g_totle_write_sector, 4
+g_totle_write_sector:
+	.zero	4
+	.section	.bss.gc_discard_updated,"aw",@nobits
+	.align	2
+	.set	.LANCHOR172,. + 0
+	.type	gc_discard_updated, %object
+	.size	gc_discard_updated, 4
+gc_discard_updated:
+	.zero	4
+	.section	.bss.gc_ink_free_return_value,"aw",@nobits
+	.align	1
+	.set	.LANCHOR174,. + 0
+	.type	gc_ink_free_return_value, %object
+	.size	gc_ink_free_return_value, 2
+gc_ink_free_return_value:
+	.zero	2
+	.section	.bss.gp_ect_tbl_info,"aw",@nobits
+	.align	3
+	.set	.LANCHOR127,. + 0
+	.type	gp_ect_tbl_info, %object
+	.size	gp_ect_tbl_info, 8
+gp_ect_tbl_info:
+	.zero	8
+	.section	.bss.gp_gc_page_buf_info,"aw",@nobits
+	.align	3
+	.set	.LANCHOR92,. + 0
+	.type	gp_gc_page_buf_info, %object
+	.size	gp_gc_page_buf_info, 8
+gp_gc_page_buf_info:
+	.zero	8
+	.section	.bss.gp_last_act_superblock,"aw",@nobits
+	.align	3
+	.set	.LANCHOR171,. + 0
+	.type	gp_last_act_superblock, %object
+	.size	gp_last_act_superblock, 8
+gp_last_act_superblock:
+	.zero	8
+	.section	.bss.p_blk_mode_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR1,. + 0
+	.type	p_blk_mode_table, %object
+	.size	p_blk_mode_table, 8
+p_blk_mode_table:
+	.zero	8
+	.section	.bss.p_data_block_list_head,"aw",@nobits
+	.align	3
+	.set	.LANCHOR42,. + 0
+	.type	p_data_block_list_head, %object
+	.size	p_data_block_list_head, 8
+p_data_block_list_head:
+	.zero	8
+	.section	.bss.p_data_block_list_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR41,. + 0
+	.type	p_data_block_list_table, %object
+	.size	p_data_block_list_table, 8
+p_data_block_list_table:
+	.zero	8
+	.section	.bss.p_data_block_list_tail,"aw",@nobits
+	.align	3
+	.set	.LANCHOR44,. + 0
+	.type	p_data_block_list_tail, %object
+	.size	p_data_block_list_tail, 8
+p_data_block_list_tail:
+	.zero	8
+	.section	.bss.p_erase_count_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR40,. + 0
+	.type	p_erase_count_table, %object
+	.size	p_erase_count_table, 8
+p_erase_count_table:
+	.zero	8
+	.section	.bss.p_free_data_block_list_head,"aw",@nobits
+	.align	3
+	.set	.LANCHOR47,. + 0
+	.type	p_free_data_block_list_head, %object
+	.size	p_free_data_block_list_head, 8
+p_free_data_block_list_head:
+	.zero	8
+	.section	.bss.p_gc_blk_tbl,"aw",@nobits
+	.align	3
+	.set	.LANCHOR98,. + 0
+	.type	p_gc_blk_tbl, %object
+	.size	p_gc_blk_tbl, 8
+p_gc_blk_tbl:
+	.zero	8
+	.section	.bss.p_gc_data_buf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR93,. + 0
+	.type	p_gc_data_buf, %object
+	.size	p_gc_data_buf, 8
+p_gc_data_buf:
+	.zero	8
+	.section	.bss.p_gc_page_info,"aw",@nobits
+	.align	3
+	.set	.LANCHOR100,. + 0
+	.type	p_gc_page_info, %object
+	.size	p_gc_page_info, 8
+p_gc_page_info:
+	.zero	8
+	.section	.bss.p_gc_spare_buf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR94,. + 0
+	.type	p_gc_spare_buf, %object
+	.size	p_gc_spare_buf, 8
+p_gc_spare_buf:
+	.zero	8
+	.section	.bss.p_io_data_buf_0,"aw",@nobits
+	.align	3
+	.set	.LANCHOR116,. + 0
+	.type	p_io_data_buf_0, %object
+	.size	p_io_data_buf_0, 8
+p_io_data_buf_0:
+	.zero	8
+	.section	.bss.p_io_data_buf_1,"aw",@nobits
+	.align	3
+	.set	.LANCHOR114,. + 0
+	.type	p_io_data_buf_1, %object
+	.size	p_io_data_buf_1, 8
+p_io_data_buf_1:
+	.zero	8
+	.section	.bss.p_io_spare_buf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR115,. + 0
+	.type	p_io_spare_buf, %object
+	.size	p_io_spare_buf, 8
+p_io_spare_buf:
+	.zero	8
+	.section	.bss.p_l2p_map_buf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR136,. + 0
+	.type	p_l2p_map_buf, %object
+	.size	p_l2p_map_buf, 8
+p_l2p_map_buf:
+	.zero	8
+	.section	.bss.p_l2p_ram_map,"aw",@nobits
+	.align	3
+	.set	.LANCHOR56,. + 0
+	.type	p_l2p_ram_map, %object
+	.size	p_l2p_ram_map, 8
+p_l2p_ram_map:
+	.zero	8
+	.section	.bss.p_map_block_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR129,. + 0
+	.type	p_map_block_table, %object
+	.size	p_map_block_table, 8
+p_map_block_table:
+	.zero	8
+	.section	.bss.p_map_block_valid_page_count,"aw",@nobits
+	.align	3
+	.set	.LANCHOR130,. + 0
+	.type	p_map_block_valid_page_count, %object
+	.size	p_map_block_valid_page_count, 8
+p_map_block_valid_page_count:
+	.zero	8
+	.section	.bss.p_map_block_ver_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR135,. + 0
+	.type	p_map_block_ver_table, %object
+	.size	p_map_block_ver_table, 8
+p_map_block_ver_table:
+	.zero	8
+	.section	.bss.p_map_region_ppn_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR134,. + 0
+	.type	p_map_region_ppn_table, %object
+	.size	p_map_region_ppn_table, 8
+p_map_region_ppn_table:
+	.zero	8
+	.section	.bss.p_plane_order_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR13,. + 0
+	.type	p_plane_order_table, %object
+	.size	p_plane_order_table, 32
+p_plane_order_table:
+	.zero	32
+	.section	.bss.p_swl_mul_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR126,. + 0
+	.type	p_swl_mul_table, %object
+	.size	p_swl_mul_table, 8
+p_swl_mul_table:
+	.zero	8
+	.section	.bss.p_sys_data_buf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR39,. + 0
+	.type	p_sys_data_buf, %object
+	.size	p_sys_data_buf, 8
+p_sys_data_buf:
+	.zero	8
+	.section	.bss.p_sys_data_buf_1,"aw",@nobits
+	.align	3
+	.set	.LANCHOR123,. + 0
+	.type	p_sys_data_buf_1, %object
+	.size	p_sys_data_buf_1, 8
+p_sys_data_buf_1:
+	.zero	8
+	.section	.bss.p_sys_spare_buf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR109,. + 0
+	.type	p_sys_spare_buf, %object
+	.size	p_sys_spare_buf, 8
+p_sys_spare_buf:
+	.zero	8
+	.section	.bss.p_valid_page_count_check_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR128,. + 0
+	.type	p_valid_page_count_check_table, %object
+	.size	p_valid_page_count_check_table, 8
+p_valid_page_count_check_table:
+	.zero	8
+	.section	.bss.p_valid_page_count_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR43,. + 0
+	.type	p_valid_page_count_table, %object
+	.size	p_valid_page_count_table, 8
+p_valid_page_count_table:
+	.zero	8
+	.section	.bss.p_vendor_block_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR36,. + 0
+	.type	p_vendor_block_table, %object
+	.size	p_vendor_block_table, 8
+p_vendor_block_table:
+	.zero	8
+	.section	.bss.p_vendor_block_valid_page_count,"aw",@nobits
+	.align	3
+	.set	.LANCHOR131,. + 0
+	.type	p_vendor_block_valid_page_count, %object
+	.size	p_vendor_block_valid_page_count, 8
+p_vendor_block_valid_page_count:
+	.zero	8
+	.section	.bss.p_vendor_block_ver_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR132,. + 0
+	.type	p_vendor_block_ver_table, %object
+	.size	p_vendor_block_ver_table, 8
+p_vendor_block_ver_table:
+	.zero	8
+	.section	.bss.p_vendor_data_buf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR124,. + 0
+	.type	p_vendor_data_buf, %object
+	.size	p_vendor_data_buf, 8
+p_vendor_data_buf:
+	.zero	8
+	.section	.bss.p_vendor_region_ppn_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR133,. + 0
+	.type	p_vendor_region_ppn_table, %object
+	.size	p_vendor_region_ppn_table, 8
+p_vendor_region_ppn_table:
+	.zero	8
+	.section	.bss.req_erase,"aw",@nobits
+	.align	3
+	.set	.LANCHOR112,. + 0
+	.type	req_erase, %object
+	.size	req_erase, 8
+req_erase:
+	.zero	8
+	.section	.bss.req_gc,"aw",@nobits
+	.align	3
+	.set	.LANCHOR95,. + 0
+	.type	req_gc, %object
+	.size	req_gc, 8
+req_gc:
+	.zero	8
+	.section	.bss.req_gc_dst,"aw",@nobits
+	.align	3
+	.set	.LANCHOR121,. + 0
+	.type	req_gc_dst, %object
+	.size	req_gc_dst, 8
+req_gc_dst:
+	.zero	8
+	.section	.bss.req_prgm,"aw",@nobits
+	.align	3
+	.set	.LANCHOR122,. + 0
+	.type	req_prgm, %object
+	.size	req_prgm, 8
+req_prgm:
+	.zero	8
+	.section	.bss.req_read,"aw",@nobits
+	.align	3
+	.set	.LANCHOR120,. + 0
+	.type	req_read, %object
+	.size	req_read, 8
+req_read:
+	.zero	8
+	.section	.bss.req_sys,"aw",@nobits
+	.align	3
+	.set	.LANCHOR108,. + 0
+	.type	req_sys, %object
+	.size	req_sys, 32
+req_sys:
+	.zero	32
+	.section	.data.ftl_gc_temp_block_bops_scan_page_addr,"aw",@progbits
+	.align	1
+	.set	.LANCHOR157,. + 0
+	.type	ftl_gc_temp_block_bops_scan_page_addr, %object
+	.size	ftl_gc_temp_block_bops_scan_page_addr, 2
+ftl_gc_temp_block_bops_scan_page_addr:
+	.hword	-1
+	.section	.data.gFtlInitStatus,"aw",@progbits
+	.align	2
+	.set	.LANCHOR88,. + 0
+	.type	gFtlInitStatus, %object
+	.size	gFtlInitStatus, 4
+gFtlInitStatus:
+	.word	-1
+	.section	.data.power_up_flag,"aw",@progbits
+	.align	2
+	.set	.LANCHOR179,. + 0
+	.type	power_up_flag, %object
+	.size	power_up_flag, 4
+power_up_flag:
+	.word	1
+	.section	.rodata.FlashProgPages.str1.1,"aMS",@progbits,1
+.LC79:
+	.string	"prog read error: = %x\n"
+.LC80:
+	.string	"prog read s error: = %x %x %x\n"
+.LC81:
+	.string	"prog read d error: = %x %x %x\n"
+	.section	.rodata.FtlBbmMapBadBlock.str1.1,"aMS",@progbits,1
+.LC0:
+	.string	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\n"
+	.section	.rodata.FtlBbmTblFlush.str1.1,"aMS",@progbits,1
+.LC94:
+	.string	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\n"
+.LC95:
+	.string	"FtlBbmTblFlush error:%x\n"
+.LC96:
+	.string	"FtlBbmTblFlush error = %x error count = %d\n"
+	.section	.rodata.FtlGcFreeBadSuperBlk.str1.1,"aMS",@progbits,1
+.LC97:
+	.string	"FtlGcFreeBadSuperBlk 0x%x\n"
+	.section	.rodata.FtlGcMarkBadPhyBlk.str1.1,"aMS",@progbits,1
+.LC74:
+	.string	"FtlGcMarkBadPhyBlk %d 0x%x\n"
+	.section	.rodata.FtlGcRefreshBlock.str1.1,"aMS",@progbits,1
+.LC73:
+	.string	"FtlGcRefreshBlock  0x%x\n"
+	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",@progbits,1
+.LC100:
+	.string	"no ect"
+	.section	.rodata.FtlMapWritePage.str1.1,"aMS",@progbits,1
+.LC86:
+	.string	"FtlMapWritePage error = %x \n"
+.LC87:
+	.string	"FtlMapWritePage error = %x error count = %d\n"
+	.section	.rodata.FtlMemInit.str1.1,"aMS",@progbits,1
+.LC82:
+	.string	"%s error allocating memory. return -1\n"
+	.section	.rodata.FtlPrintInfo2buf.str1.1,"aMS",@progbits,1
+.LC2:
+	.string	"FLASH INFO:\n"
+.LC3:
+	.string	"Device Capacity: %d MB\n"
+.LC4:
+	.string	"FTL INFO:\n"
+.LC5:
+	.string	"g_MaxLpn = 0x%x\n"
+.LC6:
+	.string	"g_VaildLpn = 0x%x\n"
+.LC7:
+	.string	"read_page_count = 0x%x\n"
+.LC8:
+	.string	"discard_page_count = 0x%x\n"
+.LC9:
+	.string	"write_page_count = 0x%x\n"
+.LC10:
+	.string	"cache_write_count = 0x%x\n"
+.LC11:
+	.string	"l2p_write_count = 0x%x\n"
+.LC12:
+	.string	"gc_page_count = 0x%x\n"
+.LC13:
+	.string	"totle_write = %d MB\n"
+.LC14:
+	.string	"totle_read = %d MB\n"
+.LC15:
+	.string	"GSV = 0x%x\n"
+.LC16:
+	.string	"GDV = 0x%x\n"
+.LC17:
+	.string	"bad blk num = %d\n"
+.LC18:
+	.string	"free_superblocks = 0x%x\n"
+.LC19:
+	.string	"mlc_EC = 0x%x\n"
+.LC20:
+	.string	"slc_EC = 0x%x\n"
+.LC21:
+	.string	"avg_EC = 0x%x\n"
+.LC22:
+	.string	"sys_EC = 0x%x\n"
+.LC23:
+	.string	"max_EC = 0x%x\n"
+.LC24:
+	.string	"min_EC = 0x%x\n"
+.LC25:
+	.string	"PLT = 0x%x\n"
+.LC26:
+	.string	"POT = 0x%x\n"
+.LC27:
+	.string	"MaxSector = 0x%x\n"
+.LC28:
+	.string	"init_sys_blks_pp = 0x%x\n"
+.LC29:
+	.string	"sys_blks_pp = 0x%x\n"
+.LC30:
+	.string	"free sysblock = 0x%x\n"
+.LC31:
+	.string	"data_blks_pp = 0x%x\n"
+.LC32:
+	.string	"data_op_blks_pp = 0x%x\n"
+.LC33:
+	.string	"max_data_blks = 0x%x\n"
+.LC34:
+	.string	"Sys.id = 0x%x\n"
+.LC35:
+	.string	"Bbt.id = 0x%x\n"
+.LC36:
+	.string	"ACT.page = 0x%x\n"
+.LC37:
+	.string	"ACT.plane = 0x%x\n"
+.LC38:
+	.string	"ACT.id = 0x%x\n"
+.LC39:
+	.string	"ACT.mode = 0x%x\n"
+.LC40:
+	.string	"ACT.a_pages = 0x%x\n"
+.LC41:
+	.string	"ACT VPC = 0x%x\n"
+.LC42:
+	.string	"BUF.page = 0x%x\n"
+.LC43:
+	.string	"BUF.plane = 0x%x\n"
+.LC44:
+	.string	"BUF.id = 0x%x\n"
+.LC45:
+	.string	"BUF.mode = 0x%x\n"
+.LC46:
+	.string	"BUF.a_pages = 0x%x\n"
+.LC47:
+	.string	"BUF VPC = 0x%x\n"
+.LC48:
+	.string	"TMP.page = 0x%x\n"
+.LC49:
+	.string	"TMP.plane = 0x%x\n"
+.LC50:
+	.string	"TMP.id = 0x%x\n"
+.LC51:
+	.string	"TMP.mode = 0x%x\n"
+.LC52:
+	.string	"TMP.a_pages = 0x%x\n"
+.LC53:
+	.string	"GC.page = 0x%x\n"
+.LC54:
+	.string	"GC.plane = 0x%x\n"
+.LC55:
+	.string	"GC.id = 0x%x\n"
+.LC56:
+	.string	"GC.mode = 0x%x\n"
+.LC57:
+	.string	"GC.a_pages = 0x%x\n"
+.LC58:
+	.string	"WR_CHK = %x %x %x\n"
+.LC59:
+	.string	"Read Err Cnt = 0x%x\n"
+.LC60:
+	.string	"Prog Err Cnt = 0x%x\n"
+.LC61:
+	.string	"gc_free_blk_th= 0x%x\n"
+.LC62:
+	.string	"gc_merge_free_blk_th= 0x%x\n"
+.LC63:
+	.string	"gc_skip_write_count= 0x%x\n"
+.LC64:
+	.string	"gc_blk_index= 0x%x\n"
+.LC65:
+	.string	"free min EC= 0x%x\n"
+.LC66:
+	.string	"free max EC= 0x%x\n"
+.LC67:
+	.string	"GC__SB VPC = 0x%x\n"
+.LC68:
+	.string	"%d. [0x%x]=0x%x 0x%x  0x%x\n"
+.LC69:
+	.string	"free %d. [0x%x] 0x%x  0x%x\n"
+	.section	.rodata.FtlProgPages.str1.1,"aMS",@progbits,1
+.LC103:
+	.string	"Ftlwrite decrement_vpc_count %x = %d\n"
+	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",@progbits,1
+.LC99:
+	.string	"spuer block %x vpn is 0\n "
+	.section	.rodata.FtlVpcCheckAndModify.str1.1,"aMS",@progbits,1
+.LC102:
+	.string	"FtlCheckVpc %x = %x  %x\n"
+	.section	.rodata.FtlVpcTblFlush.str1.1,"aMS",@progbits,1
+.LC101:
+	.string	"FtlVpcTblFlush error = %x error count = %d\n"
+	.section	.rodata.FtlWrite.str1.1,"aMS",@progbits,1
+.LC105:
+	.string	"FtlWrite: lpa error:%x %x\n"
+	.section	.rodata.GetSwlReplaceBlock.str1.1,"aMS",@progbits,1
+.LC72:
+	.string	"swblk %x ,avg = %x max= %x vpc= %x,ec=%x ,max ec=%x\n"
+	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",@progbits,1
+.LC1:
+	.string	"\n!!!!! error @ func:%s - line:%d\n"
+	.section	.rodata.__func__.6105,"a",@progbits
+	.align	3
+	.set	.LANCHOR138,. + 0
+	.type	__func__.6105, %object
+	.size	__func__.6105, 11
+__func__.6105:
+	.string	"FtlMemInit"
+	.section	.rodata.__func__.6229,"a",@progbits
+	.align	3
+	.set	.LANCHOR170,. + 0
+	.type	__func__.6229, %object
+	.size	__func__.6229, 13
+__func__.6229:
+	.string	"FtlProgPages"
+	.section	.rodata.__func__.6257,"a",@progbits
+	.align	3
+	.set	.LANCHOR180,. + 0
+	.type	__func__.6257, %object
+	.size	__func__.6257, 9
+__func__.6257:
+	.string	"FtlWrite"
+	.section	.rodata.__func__.6321,"a",@progbits
+	.align	3
+	.set	.LANCHOR139,. + 0
+	.type	__func__.6321, %object
+	.size	__func__.6321, 14
+__func__.6321:
+	.string	"FtlBbt2Bitmap"
+	.section	.rodata.__func__.6364,"a",@progbits
+	.align	3
+	.set	.LANCHOR165,. + 0
+	.type	__func__.6364, %object
+	.size	__func__.6364, 11
+__func__.6364:
+	.string	"FtlLoadBbt"
+	.section	.rodata.__func__.6487,"a",@progbits
+	.align	3
+	.set	.LANCHOR49,. + 0
+	.type	__func__.6487, %object
+	.size	__func__.6487, 17
+__func__.6487:
+	.string	"INSERT_FREE_LIST"
+	.section	.rodata.__func__.6492,"a",@progbits
+	.align	3
+	.set	.LANCHOR46,. + 0
+	.type	__func__.6492, %object
+	.size	__func__.6492, 17
+__func__.6492:
+	.string	"INSERT_DATA_LIST"
+	.section	.rodata.__func__.6522,"a",@progbits
+	.align	3
+	.set	.LANCHOR50,. + 0
+	.type	__func__.6522, %object
+	.size	__func__.6522, 17
+__func__.6522:
+	.string	"List_remove_node"
+	.section	.rodata.__func__.6554,"a",@progbits
+	.align	3
+	.set	.LANCHOR54,. + 0
+	.type	__func__.6554, %object
+	.size	__func__.6554, 22
+__func__.6554:
+	.string	"List_update_data_list"
+	.section	.rodata.__func__.6563,"a",@progbits
+	.align	3
+	.set	.LANCHOR140,. + 0
+	.type	__func__.6563, %object
+	.size	__func__.6563, 16
+__func__.6563:
+	.string	"load_l2p_region"
+	.section	.rodata.__func__.6595,"a",@progbits
+	.align	3
+	.set	.LANCHOR55,. + 0
+	.type	__func__.6595, %object
+	.size	__func__.6595, 26
+__func__.6595:
+	.string	"ftl_map_blk_alloc_new_blk"
+	.section	.rodata.__func__.6606,"a",@progbits
+	.align	3
+	.set	.LANCHOR143,. + 0
+	.type	__func__.6606, %object
+	.size	__func__.6606, 15
+__func__.6606:
+	.string	"ftl_map_blk_gc"
+	.section	.rodata.__func__.6620,"a",@progbits
+	.align	3
+	.set	.LANCHOR141,. + 0
+	.type	__func__.6620, %object
+	.size	__func__.6620, 31
+__func__.6620:
+	.string	"Ftl_write_map_blk_to_last_page"
+	.section	.rodata.__func__.6634,"a",@progbits
+	.align	3
+	.set	.LANCHOR142,. + 0
+	.type	__func__.6634, %object
+	.size	__func__.6634, 16
+__func__.6634:
+	.string	"FtlMapWritePage"
+	.section	.rodata.__func__.6659,"a",@progbits
+	.align	3
+	.set	.LANCHOR58,. + 0
+	.type	__func__.6659, %object
+	.size	__func__.6659, 22
+__func__.6659:
+	.string	"select_l2p_ram_region"
+	.section	.rodata.__func__.6676,"a",@progbits
+	.align	3
+	.set	.LANCHOR145,. + 0
+	.type	__func__.6676, %object
+	.size	__func__.6676, 9
+__func__.6676:
+	.string	"log2phys"
+	.section	.rodata.__func__.6749,"a",@progbits
+	.align	3
+	.set	.LANCHOR167,. + 0
+	.type	__func__.6749, %object
+	.size	__func__.6749, 15
+__func__.6749:
+	.string	"FtlVpcTblFlush"
+	.section	.rodata.__func__.6771,"a",@progbits
+	.align	3
+	.set	.LANCHOR148,. + 0
+	.type	__func__.6771, %object
+	.size	__func__.6771, 14
+__func__.6771:
+	.string	"FtlScanSysBlk"
+	.section	.rodata.__func__.6828,"a",@progbits
+	.align	3
+	.set	.LANCHOR181,. + 0
+	.type	__func__.6828, %object
+	.size	__func__.6828, 15
+__func__.6828:
+	.string	"FtlLoadSysInfo"
+	.section	.rodata.__func__.6891,"a",@progbits
+	.align	3
+	.set	.LANCHOR146,. + 0
+	.type	__func__.6891, %object
+	.size	__func__.6891, 16
+__func__.6891:
+	.string	"FtlReUsePrevPpa"
+	.section	.rodata.__func__.6925,"a",@progbits
+	.align	3
+	.set	.LANCHOR161,. + 0
+	.type	__func__.6925, %object
+	.size	__func__.6925, 22
+__func__.6925:
+	.string	"FtlRecoverySuperblock"
+	.section	.rodata.__func__.6982,"a",@progbits
+	.align	3
+	.set	.LANCHOR61,. + 0
+	.type	__func__.6982, %object
+	.size	__func__.6982, 16
+__func__.6982:
+	.string	"make_superblock"
+	.section	.rodata.__func__.7003,"a",@progbits
+	.align	3
+	.set	.LANCHOR155,. + 0
+	.type	__func__.7003, %object
+	.size	__func__.7003, 18
+__func__.7003:
+	.string	"SupperBlkListInit"
+	.section	.rodata.__func__.7028,"a",@progbits
+	.align	3
+	.set	.LANCHOR168,. + 0
+	.type	__func__.7028, %object
+	.size	__func__.7028, 21
+__func__.7028:
+	.string	"FtlVpcCheckAndModify"
+	.section	.rodata.__func__.7044,"a",@progbits
+	.align	3
+	.set	.LANCHOR156,. + 0
+	.type	__func__.7044, %object
+	.size	__func__.7044, 14
+__func__.7044:
+	.string	"ftl_check_vpc"
+	.section	.rodata.__func__.7128,"a",@progbits
+	.align	3
+	.set	.LANCHOR158,. + 0
+	.type	__func__.7128, %object
+	.size	__func__.7128, 25
+__func__.7128:
+	.string	"allocate_data_superblock"
+	.section	.rodata.__func__.7149,"a",@progbits
+	.align	3
+	.set	.LANCHOR169,. + 0
+	.type	__func__.7149, %object
+	.size	__func__.7149, 29
+__func__.7149:
+	.string	"allocate_new_data_superblock"
+	.section	.rodata.__func__.7156,"a",@progbits
+	.align	3
+	.set	.LANCHOR90,. + 0
+	.type	__func__.7156, %object
+	.size	__func__.7156, 19
+__func__.7156:
+	.string	"get_new_active_ppa"
+	.section	.rodata.__func__.7169,"a",@progbits
+	.align	3
+	.set	.LANCHOR159,. + 0
+	.type	__func__.7169, %object
+	.size	__func__.7169, 16
+__func__.7169:
+	.string	"update_vpc_list"
+	.section	.rodata.__func__.7176,"a",@progbits
+	.align	3
+	.set	.LANCHOR160,. + 0
+	.type	__func__.7176, %object
+	.size	__func__.7176, 20
+__func__.7176:
+	.string	"decrement_vpc_count"
+	.section	.rodata.__func__.7246,"a",@progbits
+	.align	3
+	.set	.LANCHOR173,. + 0
+	.type	__func__.7246, %object
+	.size	__func__.7246, 19
+__func__.7246:
+	.string	"FtlGcFreeTempBlock"
+	.section	.rodata.__func__.7352,"a",@progbits
+	.align	3
+	.set	.LANCHOR177,. + 0
+	.type	__func__.7352, %object
+	.size	__func__.7352, 23
+__func__.7352:
+	.string	"rk_ftl_garbage_collect"
+	.section	.rodata.__func__.7613,"a",@progbits
+	.align	3
+	.set	.LANCHOR106,. + 0
+	.type	__func__.7613, %object
+	.size	__func__.7613, 15
+__func__.7613:
+	.string	"FlashReadPages"
+	.section	.rodata.__func__.7630,"a",@progbits
+	.align	3
+	.set	.LANCHOR110,. + 0
+	.type	__func__.7630, %object
+	.size	__func__.7630, 15
+__func__.7630:
+	.string	"FlashProgPages"
+	.section	.rodata.decrement_vpc_count.str1.1,"aMS",@progbits,1
+.LC98:
+	.string	"decrement_vpc_count %x = %d\n"
+	.section	.rodata.ftl_check_vpc.str1.1,"aMS",@progbits,1
+.LC91:
+	.string	"...%s enter...\n"
+.LC92:
+	.string	"FtlCheckVpc2 %x = %x  %x\n"
+.LC93:
+	.string	"free blk vpc error %x = %x  %x\n"
+	.section	.rodata.ftl_scan_all_data.str1.1,"aMS",@progbits,1
+.LC88:
+	.string	"ftl_scan_all_data = %x\n"
+.LC89:
+	.string	"scan lpa = %x ppa= %x\n"
+.LC90:
+	.string	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\n"
+	.section	.rodata.load_l2p_region.str1.1,"aMS",@progbits,1
+.LC83:
+	.string	"region_id = %x phyAddr = %x\n"
+.LC84:
+	.string	"spare:"
+.LC85:
+	.string	"map_ppn:"
+	.section	.rodata.rk_ftl_garbage_collect.str1.1,"aMS",@progbits,1
+.LC104:
+	.string	"SWL %x, FSB = %x vpc= %x,ec=%x th=%x\n"
+	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
+.LC75:
+	.string	"%s 0x%x:"
+.LC76:
+	.string	"%x "
+.LC77:
+	.string	"%02x "
+.LC78:
+	.string	"\n"
+	.section	.rodata.rknand_proc_ftlread.str1.1,"aMS",@progbits,1
+.LC70:
+	.string	"SFTL version: 5.0.43 20180116"
+.LC71:
+	.string	"%s\n"
+	.text
+.Letext0:
+	.file 6 "include/common.h"
+	.file 7 "./arch/arm/include/asm/types.h"
+	.file 8 "include/linux/types.h"
+	.file 9 "include/errno.h"
+	.file 10 "include/linux/string.h"
+	.file 11 "include/efi.h"
+	.file 12 "include/ide.h"
+	.file 13 "include/part.h"
+	.file 14 "include/flash.h"
+	.file 15 "include/lmb.h"
+	.file 16 "include/asm-generic/u-boot.h"
+	.file 17 "./arch/arm/include/asm/u-boot-arm.h"
+	.file 18 "include/../scripts/dtc/libfdt/fdt.h"
+	.file 19 "include/libfdt_env.h"
+	.file 20 "include/image.h"
+	.file 21 "include/net.h"
+	.file 22 "include/dm/uclass-id.h"
+	.file 23 "drivers/rkflash/rksftl/sftl_inc.h"
+	.file 24 "drivers/rkflash/rksftl/flash_com.h"
+	.file 25 "drivers/rkflash/rksftl/sftl_struct.h"
+	.file 26 "drivers/rkflash/rksftl/sftl_global.h"
+	.file 27 "include/malloc.h"
+	.file 28 "include/linux/compat.h"
+	.file 29 "include/stdio.h"
+	.file 30 "include/vsprintf.h"
+	.file 31 "include/log.h"
+	.section	.debug_info,"",@progbits
+.Ldebug_info0:
+	.4byte	0xa8ec
+	.2byte	0x4
+	.4byte	.Ldebug_abbrev0
+	.byte	0x8
+	.uleb128 0x1
+	.4byte	.LASF880
+	.byte	0xc
+	.4byte	.LASF881
+	.4byte	.LASF882
+	.4byte	.Ldebug_ranges0+0x330
+	.8byte	0
+	.4byte	.Ldebug_line0
+	.uleb128 0x2
+	.byte	0x2
+	.byte	0x7
+	.4byte	.LASF0
+	.uleb128 0x2
+	.byte	0x4
+	.byte	0x7
+	.4byte	.LASF1
+	.uleb128 0x3
+	.4byte	.LASF5
+	.byte	0x6
+	.byte	0xd
+	.4byte	0x42
+	.uleb128 0x2
+	.byte	0x1
+	.byte	0x8
+	.4byte	.LASF2
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF3
+	.uleb128 0x4
+	.4byte	.LASF20
+	.byte	0x9
+	.byte	0xc
+	.4byte	0x5b
+	.uleb128 0x5
+	.byte	0x4
+	.byte	0x5
+	.string	"int"
+	.uleb128 0x2
+	.byte	0x1
+	.byte	0x6
+	.4byte	.LASF4
+	.uleb128 0x3
+	.4byte	.LASF6
+	.byte	0x7
+	.byte	0xc
+	.4byte	0x42
+	.uleb128 0x2
+	.byte	0x2
+	.byte	0x5
+	.4byte	.LASF7
+	.uleb128 0x3
+	.4byte	.LASF8
+	.byte	0x7
+	.byte	0x12
+	.4byte	0x30
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x5
+	.4byte	.LASF9
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF10
+	.uleb128 0x6
+	.string	"u8"
+	.byte	0x7
+	.byte	0x1f
+	.4byte	0x42
+	.uleb128 0x7
+	.4byte	0x94
+	.uleb128 0x6
+	.string	"u16"
+	.byte	0x7
+	.byte	0x22
+	.4byte	0x29
+	.uleb128 0x6
+	.string	"s32"
+	.byte	0x7
+	.byte	0x24
+	.4byte	0x5b
+	.uleb128 0x6
+	.string	"u32"
+	.byte	0x7
+	.byte	0x25
+	.4byte	0x30
+	.uleb128 0x3
+	.4byte	.LASF11
+	.byte	0x7
+	.byte	0x31
+	.4byte	0x8d
+	.uleb128 0x3
+	.4byte	.LASF12
+	.byte	0x7
+	.byte	0x32
+	.4byte	0x8d
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF13
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0xee
+	.uleb128 0x2
+	.byte	0x1
+	.byte	0x8
+	.4byte	.LASF14
+	.uleb128 0x7
+	.4byte	0xe7
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x5
+	.4byte	.LASF15
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0xe7
+	.uleb128 0x3
+	.4byte	.LASF16
+	.byte	0x8
+	.byte	0x59
+	.4byte	0x29
+	.uleb128 0x3
+	.4byte	.LASF17
+	.byte	0x8
+	.byte	0x5b
+	.4byte	0x49
+	.uleb128 0x3
+	.4byte	.LASF18
+	.byte	0x8
+	.byte	0x69
+	.4byte	0x69
+	.uleb128 0x3
+	.4byte	.LASF19
+	.byte	0x8
+	.byte	0x97
+	.4byte	0x7b
+	.uleb128 0x9
+	.byte	0x8
+	.uleb128 0x4
+	.4byte	.LASF21
+	.byte	0xa
+	.byte	0xb
+	.4byte	0xfa
+	.uleb128 0x2
+	.byte	0x1
+	.byte	0x2
+	.4byte	.LASF22
+	.uleb128 0xa
+	.4byte	0xe7
+	.4byte	0x14b
+	.uleb128 0xb
+	.byte	0
+	.uleb128 0xc
+	.4byte	.LASF23
+	.byte	0xb
+	.2byte	0x140
+	.4byte	0x140
+	.uleb128 0xc
+	.4byte	.LASF24
+	.byte	0xb
+	.2byte	0x143
+	.4byte	0x140
+	.uleb128 0xc
+	.4byte	.LASF25
+	.byte	0xb
+	.2byte	0x143
+	.4byte	0x140
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x175
+	.uleb128 0xd
+	.uleb128 0xa
+	.4byte	0x10b
+	.4byte	0x181
+	.uleb128 0xb
+	.byte	0
+	.uleb128 0x4
+	.4byte	.LASF26
+	.byte	0xc
+	.byte	0x10
+	.4byte	0x176
+	.uleb128 0xa
+	.4byte	0x42
+	.4byte	0x19c
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0x5
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF29
+	.byte	0x10
+	.byte	0xd
+	.byte	0xf
+	.4byte	0x1c1
+	.uleb128 0x10
+	.4byte	.LASF27
+	.byte	0xd
+	.byte	0x10
+	.4byte	0xfa
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF28
+	.byte	0xd
+	.byte	0x11
+	.4byte	0x1da
+	.byte	0x8
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x19c
+	.uleb128 0x11
+	.4byte	0x5b
+	.4byte	0x1da
+	.uleb128 0x12
+	.4byte	0x5b
+	.uleb128 0x12
+	.4byte	0x5b
+	.byte	0
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x1c6
+	.uleb128 0xa
+	.4byte	0x1c1
+	.4byte	0x1eb
+	.uleb128 0xb
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x1e0
+	.uleb128 0x4
+	.4byte	.LASF29
+	.byte	0xd
+	.byte	0xcd
+	.4byte	0x1eb
+	.uleb128 0x13
+	.2byte	0x1218
+	.byte	0xe
+	.byte	0x13
+	.4byte	0x242
+	.uleb128 0x10
+	.4byte	.LASF30
+	.byte	0xe
+	.byte	0x14
+	.4byte	0x10b
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF31
+	.byte	0xe
+	.byte	0x15
+	.4byte	0x100
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF32
+	.byte	0xe
+	.byte	0x16
+	.4byte	0x10b
+	.byte	0x10
+	.uleb128 0x10
+	.4byte	.LASF33
+	.byte	0xe
+	.byte	0x17
+	.4byte	0x242
+	.byte	0x18
+	.uleb128 0x14
+	.4byte	.LASF34
+	.byte	0xe
+	.byte	0x18
+	.4byte	0x253
+	.2byte	0x1018
+	.byte	0
+	.uleb128 0xa
+	.4byte	0x10b
+	.4byte	0x253
+	.uleb128 0x15
+	.4byte	0xda
+	.2byte	0x1ff
+	.byte	0
+	.uleb128 0xa
+	.4byte	0x37
+	.4byte	0x264
+	.uleb128 0x15
+	.4byte	0xda
+	.2byte	0x1ff
+	.byte	0
+	.uleb128 0x3
+	.4byte	.LASF35
+	.byte	0xe
+	.byte	0x32
+	.4byte	0x1fb
+	.uleb128 0xa
+	.4byte	0x264
+	.4byte	0x27a
+	.uleb128 0xb
+	.byte	0
+	.uleb128 0x4
+	.4byte	.LASF36
+	.byte	0xe
+	.byte	0x34
+	.4byte	0x26f
+	.uleb128 0x2
+	.byte	0x10
+	.byte	0x4
+	.4byte	.LASF37
+	.uleb128 0xf
+	.4byte	.LASF38
+	.byte	0x10
+	.byte	0xf
+	.byte	0x10
+	.4byte	0x2b1
+	.uleb128 0x10
+	.4byte	.LASF39
+	.byte	0xf
+	.byte	0x11
+	.4byte	0xc4
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF30
+	.byte	0xf
+	.byte	0x12
+	.4byte	0xcf
+	.byte	0x8
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF40
+	.byte	0xa0
+	.byte	0xf
+	.byte	0x15
+	.4byte	0x2e2
+	.uleb128 0x16
+	.string	"cnt"
+	.byte	0xf
+	.byte	0x16
+	.4byte	0x49
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF30
+	.byte	0xf
+	.byte	0x17
+	.4byte	0xcf
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF41
+	.byte	0xf
+	.byte	0x18
+	.4byte	0x2e2
+	.byte	0x10
+	.byte	0
+	.uleb128 0xa
+	.4byte	0x28c
+	.4byte	0x2f2
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0x8
+	.byte	0
+	.uleb128 0x17
+	.string	"lmb"
+	.2byte	0x140
+	.byte	0xf
+	.byte	0x1b
+	.4byte	0x318
+	.uleb128 0x10
+	.4byte	.LASF42
+	.byte	0xf
+	.byte	0x1c
+	.4byte	0x2b1
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF43
+	.byte	0xf
+	.byte	0x1d
+	.4byte	0x2b1
+	.byte	0xa0
+	.byte	0
+	.uleb128 0x18
+	.string	"lmb"
+	.byte	0xf
+	.byte	0x20
+	.4byte	0x2f2
+	.uleb128 0x19
+	.byte	0x10
+	.byte	0x10
+	.byte	0x5a
+	.4byte	0x344
+	.uleb128 0x10
+	.4byte	.LASF33
+	.byte	0x10
+	.byte	0x5b
+	.4byte	0xc4
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF30
+	.byte	0x10
+	.byte	0x5c
+	.4byte	0xcf
+	.byte	0x8
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF44
+	.byte	0xa8
+	.byte	0x10
+	.byte	0x1b
+	.4byte	0x435
+	.uleb128 0x10
+	.4byte	.LASF45
+	.byte	0x10
+	.byte	0x1c
+	.4byte	0x49
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF46
+	.byte	0x10
+	.byte	0x1d
+	.4byte	0xcf
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF47
+	.byte	0x10
+	.byte	0x1e
+	.4byte	0x49
+	.byte	0x10
+	.uleb128 0x10
+	.4byte	.LASF48
+	.byte	0x10
+	.byte	0x1f
+	.4byte	0x49
+	.byte	0x18
+	.uleb128 0x10
+	.4byte	.LASF49
+	.byte	0x10
+	.byte	0x20
+	.4byte	0x49
+	.byte	0x20
+	.uleb128 0x10
+	.4byte	.LASF50
+	.byte	0x10
+	.byte	0x21
+	.4byte	0x49
+	.byte	0x28
+	.uleb128 0x10
+	.4byte	.LASF51
+	.byte	0x10
+	.byte	0x22
+	.4byte	0x49
+	.byte	0x30
+	.uleb128 0x10
+	.4byte	.LASF52
+	.byte	0x10
+	.byte	0x24
+	.4byte	0x49
+	.byte	0x38
+	.uleb128 0x10
+	.4byte	.LASF53
+	.byte	0x10
+	.byte	0x25
+	.4byte	0x49
+	.byte	0x40
+	.uleb128 0x10
+	.4byte	.LASF54
+	.byte	0x10
+	.byte	0x26
+	.4byte	0x49
+	.byte	0x48
+	.uleb128 0x10
+	.4byte	.LASF55
+	.byte	0x10
+	.byte	0x31
+	.4byte	0x49
+	.byte	0x50
+	.uleb128 0x10
+	.4byte	.LASF56
+	.byte	0x10
+	.byte	0x32
+	.4byte	0x49
+	.byte	0x58
+	.uleb128 0x10
+	.4byte	.LASF57
+	.byte	0x10
+	.byte	0x33
+	.4byte	0x18c
+	.byte	0x60
+	.uleb128 0x10
+	.4byte	.LASF58
+	.byte	0x10
+	.byte	0x34
+	.4byte	0x29
+	.byte	0x66
+	.uleb128 0x10
+	.4byte	.LASF59
+	.byte	0x10
+	.byte	0x35
+	.4byte	0x49
+	.byte	0x68
+	.uleb128 0x10
+	.4byte	.LASF60
+	.byte	0x10
+	.byte	0x36
+	.4byte	0x49
+	.byte	0x70
+	.uleb128 0x10
+	.4byte	.LASF61
+	.byte	0x10
+	.byte	0x57
+	.4byte	0x10b
+	.byte	0x78
+	.uleb128 0x10
+	.4byte	.LASF62
+	.byte	0x10
+	.byte	0x58
+	.4byte	0x10b
+	.byte	0x80
+	.uleb128 0x10
+	.4byte	.LASF63
+	.byte	0x10
+	.byte	0x5d
+	.4byte	0x435
+	.byte	0x88
+	.byte	0
+	.uleb128 0xa
+	.4byte	0x323
+	.4byte	0x445
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0x1
+	.byte	0
+	.uleb128 0x3
+	.4byte	.LASF64
+	.byte	0x10
+	.byte	0x5f
+	.4byte	0x344
+	.uleb128 0x4
+	.4byte	.LASF65
+	.byte	0x11
+	.byte	0x13
+	.4byte	0x10b
+	.uleb128 0x4
+	.4byte	.LASF66
+	.byte	0x11
+	.byte	0x14
+	.4byte	0x10b
+	.uleb128 0x4
+	.4byte	.LASF67
+	.byte	0x11
+	.byte	0x15
+	.4byte	0x10b
+	.uleb128 0x4
+	.4byte	.LASF68
+	.byte	0x11
+	.byte	0x16
+	.4byte	0x10b
+	.uleb128 0x4
+	.4byte	.LASF69
+	.byte	0x11
+	.byte	0x17
+	.4byte	0x10b
+	.uleb128 0x4
+	.4byte	.LASF70
+	.byte	0x11
+	.byte	0x18
+	.4byte	0x10b
+	.uleb128 0x4
+	.4byte	.LASF71
+	.byte	0x11
+	.byte	0x19
+	.4byte	0x10b
+	.uleb128 0xf
+	.4byte	.LASF72
+	.byte	0x28
+	.byte	0x12
+	.byte	0x39
+	.4byte	0x522
+	.uleb128 0x10
+	.4byte	.LASF73
+	.byte	0x12
+	.byte	0x3a
+	.4byte	0x533
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF74
+	.byte	0x12
+	.byte	0x3b
+	.4byte	0x533
+	.byte	0x4
+	.uleb128 0x10
+	.4byte	.LASF75
+	.byte	0x12
+	.byte	0x3c
+	.4byte	0x533
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF76
+	.byte	0x12
+	.byte	0x3d
+	.4byte	0x533
+	.byte	0xc
+	.uleb128 0x10
+	.4byte	.LASF77
+	.byte	0x12
+	.byte	0x3e
+	.4byte	0x533
+	.byte	0x10
+	.uleb128 0x10
+	.4byte	.LASF78
+	.byte	0x12
+	.byte	0x3f
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+	.byte	0x14
+	.uleb128 0x10
+	.4byte	.LASF79
+	.byte	0x12
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+	.uleb128 0x10
+	.4byte	.LASF80
+	.byte	0x12
+	.byte	0x43
+	.4byte	0x533
+	.byte	0x1c
+	.uleb128 0x10
+	.4byte	.LASF81
+	.byte	0x12
+	.byte	0x46
+	.4byte	0x533
+	.byte	0x20
+	.uleb128 0x10
+	.4byte	.LASF82
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+	.byte	0x49
+	.4byte	0x533
+	.byte	0x24
+	.byte	0
+	.uleb128 0x4
+	.4byte	.LASF83
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+	.byte	0xf
+	.4byte	0x52d
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x49d
+	.uleb128 0x3
+	.4byte	.LASF84
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+	.byte	0x12
+	.4byte	0x121
+	.uleb128 0x1a
+	.4byte	.LASF85
+	.byte	0x40
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+	.2byte	0x133
+	.4byte	0x5e8
+	.uleb128 0x1b
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+	.byte	0
+	.uleb128 0x1b
+	.4byte	.LASF87
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+	.4byte	0x121
+	.byte	0x4
+	.uleb128 0x1b
+	.4byte	.LASF88
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+	.2byte	0x136
+	.4byte	0x121
+	.byte	0x8
+	.uleb128 0x1b
+	.4byte	.LASF89
+	.byte	0x14
+	.2byte	0x137
+	.4byte	0x121
+	.byte	0xc
+	.uleb128 0x1b
+	.4byte	.LASF90
+	.byte	0x14
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+	.4byte	0x121
+	.byte	0x10
+	.uleb128 0x1b
+	.4byte	.LASF91
+	.byte	0x14
+	.2byte	0x139
+	.4byte	0x121
+	.byte	0x14
+	.uleb128 0x1b
+	.4byte	.LASF92
+	.byte	0x14
+	.2byte	0x13a
+	.4byte	0x121
+	.byte	0x18
+	.uleb128 0x1b
+	.4byte	.LASF93
+	.byte	0x14
+	.2byte	0x13b
+	.4byte	0x116
+	.byte	0x1c
+	.uleb128 0x1b
+	.4byte	.LASF94
+	.byte	0x14
+	.2byte	0x13c
+	.4byte	0x116
+	.byte	0x1d
+	.uleb128 0x1b
+	.4byte	.LASF95
+	.byte	0x14
+	.2byte	0x13d
+	.4byte	0x116
+	.byte	0x1e
+	.uleb128 0x1b
+	.4byte	.LASF96
+	.byte	0x14
+	.2byte	0x13e
+	.4byte	0x116
+	.byte	0x1f
+	.uleb128 0x1b
+	.4byte	.LASF97
+	.byte	0x14
+	.2byte	0x13f
+	.4byte	0x5e8
+	.byte	0x20
+	.byte	0
+	.uleb128 0xa
+	.4byte	0x116
+	.4byte	0x5f8
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x1c
+	.4byte	.LASF98
+	.byte	0x14
+	.2byte	0x140
+	.4byte	0x53e
+	.uleb128 0x1a
+	.4byte	.LASF99
+	.byte	0x30
+	.byte	0x14
+	.2byte	0x142
+	.4byte	0x686
+	.uleb128 0x1b
+	.4byte	.LASF33
+	.byte	0x14
+	.2byte	0x143
+	.4byte	0x10b
+	.byte	0
+	.uleb128 0x1d
+	.string	"end"
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+	.uleb128 0xf
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+	.byte	0x10
+	.byte	0x19
+	.byte	0x8f
+	.4byte	0x12c8
+	.uleb128 0x10
+	.4byte	.LASF306
+	.byte	0x19
+	.byte	0x91
+	.4byte	0xdc9
+	.byte	0
+	.uleb128 0x16
+	.string	"id"
+	.byte	0x19
+	.byte	0x92
+	.4byte	0xdc9
+	.byte	0x2
+	.uleb128 0x10
+	.4byte	.LASF78
+	.byte	0x19
+	.byte	0x93
+	.4byte	0xdd4
+	.byte	0x4
+	.uleb128 0x10
+	.4byte	.LASF330
+	.byte	0x19
+	.byte	0x94
+	.4byte	0xdc9
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF323
+	.byte	0x19
+	.byte	0x95
+	.4byte	0x12c8
+	.byte	0xa
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xdbe
+	.4byte	0x12d8
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0x5
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF331
+	.byte	0x10
+	.byte	0x19
+	.byte	0x98
+	.4byte	0x1320
+	.uleb128 0x10
+	.4byte	.LASF306
+	.byte	0x19
+	.byte	0x9a
+	.4byte	0xdc9
+	.byte	0
+	.uleb128 0x16
+	.string	"id"
+	.byte	0x19
+	.byte	0x9b
+	.4byte	0xdc9
+	.byte	0x2
+	.uleb128 0x10
+	.4byte	.LASF78
+	.byte	0x19
+	.byte	0x9c
+	.4byte	0xdd4
+	.byte	0x4
+	.uleb128 0x10
+	.4byte	.LASF332
+	.byte	0x19
+	.byte	0x9d
+	.4byte	0xdd4
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF333
+	.byte	0x19
+	.byte	0x9e
+	.4byte	0xdd4
+	.byte	0xc
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF334
+	.byte	0x30
+	.byte	0x19
+	.byte	0xa1
+	.4byte	0x141d
+	.uleb128 0x16
+	.string	"tag"
+	.byte	0x19
+	.byte	0xa3
+	.4byte	0xdd4
+	.byte	0
+	.uleb128 0x16
+	.string	"ver"
+	.byte	0x19
+	.byte	0xa4
+	.4byte	0xdd4
+	.byte	0x4
+	.uleb128 0x10
+	.4byte	.LASF304
+	.byte	0x19
+	.byte	0xa6
+	.4byte	0xdc9
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF335
+	.byte	0x19
+	.byte	0xa7
+	.4byte	0xdbe
+	.byte	0xa
+	.uleb128 0x10
+	.4byte	.LASF336
+	.byte	0x19
+	.byte	0xa8
+	.4byte	0xdbe
+	.byte	0xb
+	.uleb128 0x10
+	.4byte	.LASF337
+	.byte	0x19
+	.byte	0xa9
+	.4byte	0xdbe
+	.byte	0xc
+	.uleb128 0x10
+	.4byte	.LASF338
+	.byte	0x19
+	.byte	0xaa
+	.4byte	0xdbe
+	.byte	0xd
+	.uleb128 0x10
+	.4byte	.LASF339
+	.byte	0x19
+	.byte	0xab
+	.4byte	0xdc9
+	.byte	0xe
+	.uleb128 0x10
+	.4byte	.LASF340
+	.byte	0x19
+	.byte	0xad
+	.4byte	0xdc9
+	.byte	0x10
+	.uleb128 0x10
+	.4byte	.LASF341
+	.byte	0x19
+	.byte	0xae
+	.4byte	0xdc9
+	.byte	0x12
+	.uleb128 0x10
+	.4byte	.LASF342
+	.byte	0x19
+	.byte	0xaf
+	.4byte	0xdc9
+	.byte	0x14
+	.uleb128 0x10
+	.4byte	.LASF343
+	.byte	0x19
+	.byte	0xb0
+	.4byte	0xdc9
+	.byte	0x16
+	.uleb128 0x10
+	.4byte	.LASF344
+	.byte	0x19
+	.byte	0xb2
+	.4byte	0xdc9
+	.byte	0x18
+	.uleb128 0x10
+	.4byte	.LASF345
+	.byte	0x19
+	.byte	0xb3
+	.4byte	0xdc9
+	.byte	0x1a
+	.uleb128 0x10
+	.4byte	.LASF346
+	.byte	0x19
+	.byte	0xb4
+	.4byte	0xdc9
+	.byte	0x1c
+	.uleb128 0x10
+	.4byte	.LASF347
+	.byte	0x19
+	.byte	0xb5
+	.4byte	0xdc9
+	.byte	0x1e
+	.uleb128 0x10
+	.4byte	.LASF348
+	.byte	0x19
+	.byte	0xb7
+	.4byte	0xdd4
+	.byte	0x20
+	.uleb128 0x10
+	.4byte	.LASF349
+	.byte	0x19
+	.byte	0xb8
+	.4byte	0xdd4
+	.byte	0x24
+	.uleb128 0x10
+	.4byte	.LASF350
+	.byte	0x19
+	.byte	0xb9
+	.4byte	0xdd4
+	.byte	0x28
+	.uleb128 0x10
+	.4byte	.LASF323
+	.byte	0x19
+	.byte	0xba
+	.4byte	0x11b8
+	.byte	0x2c
+	.byte	0
+	.uleb128 0x27
+	.4byte	.LASF351
+	.2byte	0x200
+	.byte	0x19
+	.byte	0xbe
+	.4byte	0x1563
+	.uleb128 0x16
+	.string	"tag"
+	.byte	0x19
+	.byte	0xc0
+	.4byte	0xdd4
+	.byte	0
+	.uleb128 0x16
+	.string	"ver"
+	.byte	0x19
+	.byte	0xc1
+	.4byte	0xdd4
+	.byte	0x4
+	.uleb128 0x10
+	.4byte	.LASF352
+	.byte	0x19
+	.byte	0xc3
+	.4byte	0xdd4
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF353
+	.byte	0x19
+	.byte	0xc4
+	.4byte	0xdd4
+	.byte	0xc
+	.uleb128 0x10
+	.4byte	.LASF354
+	.byte	0x19
+	.byte	0xc5
+	.4byte	0xdd4
+	.byte	0x10
+	.uleb128 0x10
+	.4byte	.LASF355
+	.byte	0x19
+	.byte	0xc6
+	.4byte	0xdd4
+	.byte	0x14
+	.uleb128 0x10
+	.4byte	.LASF348
+	.byte	0x19
+	.byte	0xc8
+	.4byte	0xdd4
+	.byte	0x18
+	.uleb128 0x10
+	.4byte	.LASF356
+	.byte	0x19
+	.byte	0xc9
+	.4byte	0xdd4
+	.byte	0x1c
+	.uleb128 0x10
+	.4byte	.LASF357
+	.byte	0x19
+	.byte	0xca
+	.4byte	0xdd4
+	.byte	0x20
+	.uleb128 0x10
+	.4byte	.LASF358
+	.byte	0x19
+	.byte	0xcb
+	.4byte	0xdd4
+	.byte	0x24
+	.uleb128 0x10
+	.4byte	.LASF345
+	.byte	0x19
+	.byte	0xcd
+	.4byte	0xdd4
+	.byte	0x28
+	.uleb128 0x10
+	.4byte	.LASF359
+	.byte	0x19
+	.byte	0xce
+	.4byte	0xdd4
+	.byte	0x2c
+	.uleb128 0x10
+	.4byte	.LASF360
+	.byte	0x19
+	.byte	0xcf
+	.4byte	0xdd4
+	.byte	0x30
+	.uleb128 0x10
+	.4byte	.LASF361
+	.byte	0x19
+	.byte	0xd0
+	.4byte	0xdd4
+	.byte	0x34
+	.uleb128 0x10
+	.4byte	.LASF362
+	.byte	0x19
+	.byte	0xd2
+	.4byte	0xdd4
+	.byte	0x38
+	.uleb128 0x10
+	.4byte	.LASF363
+	.byte	0x19
+	.byte	0xd3
+	.4byte	0xdd4
+	.byte	0x3c
+	.uleb128 0x10
+	.4byte	.LASF364
+	.byte	0x19
+	.byte	0xd4
+	.4byte	0xdd4
+	.byte	0x40
+	.uleb128 0x10
+	.4byte	.LASF365
+	.byte	0x19
+	.byte	0xd5
+	.4byte	0xdd4
+	.byte	0x44
+	.uleb128 0x10
+	.4byte	.LASF366
+	.byte	0x19
+	.byte	0xd7
+	.4byte	0xdd4
+	.byte	0x48
+	.uleb128 0x10
+	.4byte	.LASF367
+	.byte	0x19
+	.byte	0xd8
+	.4byte	0xdd4
+	.byte	0x4c
+	.uleb128 0x10
+	.4byte	.LASF368
+	.byte	0x19
+	.byte	0xd9
+	.4byte	0xdd4
+	.byte	0x50
+	.uleb128 0x10
+	.4byte	.LASF369
+	.byte	0x19
+	.byte	0xda
+	.4byte	0xdd4
+	.byte	0x54
+	.uleb128 0x10
+	.4byte	.LASF370
+	.byte	0x19
+	.byte	0xdc
+	.4byte	0xdd4
+	.byte	0x58
+	.uleb128 0x10
+	.4byte	.LASF371
+	.byte	0x19
+	.byte	0xdd
+	.4byte	0xdd4
+	.byte	0x5c
+	.uleb128 0x10
+	.4byte	.LASF372
+	.byte	0x19
+	.byte	0xde
+	.4byte	0xdd4
+	.byte	0x60
+	.uleb128 0x10
+	.4byte	.LASF323
+	.byte	0x19
+	.byte	0xe0
+	.4byte	0x1563
+	.byte	0x64
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xdd4
+	.4byte	0x1573
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0x66
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF373
+	.byte	0x6
+	.byte	0x19
+	.byte	0xe4
+	.4byte	0x15a4
+	.uleb128 0x10
+	.4byte	.LASF235
+	.byte	0x19
+	.byte	0xe6
+	.4byte	0xdc9
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF374
+	.byte	0x19
+	.byte	0xe7
+	.4byte	0xdc9
+	.byte	0x2
+	.uleb128 0x10
+	.4byte	.LASF375
+	.byte	0x19
+	.byte	0xe8
+	.4byte	0xdc9
+	.byte	0x4
+	.byte	0
+	.uleb128 0x27
+	.4byte	.LASF376
+	.2byte	0x808
+	.byte	0x19
+	.byte	0xeb
+	.4byte	0x15ee
+	.uleb128 0x16
+	.string	"max"
+	.byte	0x19
+	.byte	0xed
+	.4byte	0xdc9
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF377
+	.byte	0x19
+	.byte	0xee
+	.4byte	0xdc9
+	.byte	0x2
+	.uleb128 0x10
+	.4byte	.LASF378
+	.byte	0x19
+	.byte	0xef
+	.4byte	0xdc9
+	.byte	0x4
+	.uleb128 0x10
+	.4byte	.LASF325
+	.byte	0x19
+	.byte	0xf0
+	.4byte	0xdc9
+	.byte	0x6
+	.uleb128 0x16
+	.string	"arr"
+	.byte	0x19
+	.byte	0xf1
+	.4byte	0x15ee
+	.byte	0x8
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xdc9
+	.4byte	0x15ff
+	.uleb128 0x15
+	.4byte	0xda
+	.2byte	0x3ff
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF379
+	.byte	0x30
+	.byte	0x19
+	.byte	0xf5
+	.4byte	0x1691
+	.uleb128 0x16
+	.string	"id"
+	.byte	0x19
+	.byte	0xf7
+	.4byte	0xdc9
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF380
+	.byte	0x19
+	.byte	0xf8
+	.4byte	0xdc9
+	.byte	0x2
+	.uleb128 0x10
+	.4byte	.LASF381
+	.byte	0x19
+	.byte	0xf9
+	.4byte	0xdc9
+	.byte	0x4
+	.uleb128 0x10
+	.4byte	.LASF382
+	.byte	0x19
+	.byte	0xfa
+	.4byte	0xdbe
+	.byte	0x6
+	.uleb128 0x10
+	.4byte	.LASF383
+	.byte	0x19
+	.byte	0xfb
+	.4byte	0xdbe
+	.byte	0x7
+	.uleb128 0x10
+	.4byte	.LASF384
+	.byte	0x19
+	.byte	0xfc
+	.4byte	0xdbe
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF385
+	.byte	0x19
+	.byte	0xfd
+	.4byte	0xdbe
+	.byte	0x9
+	.uleb128 0x10
+	.4byte	.LASF386
+	.byte	0x19
+	.byte	0xfe
+	.4byte	0xdbe
+	.byte	0xa
+	.uleb128 0x10
+	.4byte	.LASF387
+	.byte	0x19
+	.byte	0xff
+	.4byte	0xdbe
+	.byte	0xb
+	.uleb128 0x1b
+	.4byte	.LASF78
+	.byte	0x19
+	.2byte	0x100
+	.4byte	0xdd4
+	.byte	0xc
+	.uleb128 0x1b
+	.4byte	.LASF388
+	.byte	0x19
+	.2byte	0x101
+	.4byte	0x1691
+	.byte	0x10
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xdc9
+	.4byte	0x16a1
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0xf
+	.byte	0
+	.uleb128 0x1a
+	.4byte	.LASF389
+	.byte	0xc
+	.byte	0x19
+	.2byte	0x105
+	.4byte	0x16d6
+	.uleb128 0x1b
+	.4byte	.LASF390
+	.byte	0x19
+	.2byte	0x107
+	.4byte	0xdd4
+	.byte	0
+	.uleb128 0x1b
+	.4byte	.LASF391
+	.byte	0x19
+	.2byte	0x108
+	.4byte	0xdd4
+	.byte	0x4
+	.uleb128 0x1d
+	.string	"lpa"
+	.byte	0x19
+	.2byte	0x109
+	.4byte	0xdd4
+	.byte	0x8
+	.byte	0
+	.uleb128 0x1a
+	.4byte	.LASF392
+	.byte	0x18
+	.byte	0x19
+	.2byte	0x10c
+	.4byte	0x170b
+	.uleb128 0x1b
+	.4byte	.LASF278
+	.byte	0x19
+	.2byte	0x10e
+	.4byte	0x1001
+	.byte	0
+	.uleb128 0x1b
+	.4byte	.LASF279
+	.byte	0x19
+	.2byte	0x10f
+	.4byte	0x1001
+	.byte	0x8
+	.uleb128 0x1b
+	.4byte	.LASF393
+	.byte	0x19
+	.2byte	0x110
+	.4byte	0xdd4
+	.byte	0x10
+	.byte	0
+	.uleb128 0x28
+	.4byte	.LASF394
+	.byte	0x1a
+	.byte	0x12
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_type
+	.uleb128 0x28
+	.4byte	.LASF395
+	.byte	0x1a
+	.byte	0x13
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_die_num
+	.uleb128 0x28
+	.4byte	.LASF396
+	.byte	0x1a
+	.byte	0x14
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_planes_per_die
+	.uleb128 0x28
+	.4byte	.LASF397
+	.byte	0x1a
+	.byte	0x15
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_blks_per_die
+	.uleb128 0x28
+	.4byte	.LASF398
+	.byte	0x1a
+	.byte	0x16
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_blks_per_die_shift
+	.uleb128 0x28
+	.4byte	.LASF399
+	.byte	0x1a
+	.byte	0x17
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_planes_num
+	.uleb128 0x28
+	.4byte	.LASF400
+	.byte	0x1a
+	.byte	0x18
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_blk_pre_plane
+	.uleb128 0x28
+	.4byte	.LASF401
+	.byte	0x1a
+	.byte	0x19
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_ext_blk_pre_plane
+	.uleb128 0x28
+	.4byte	.LASF402
+	.byte	0x1a
+	.byte	0x1a
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_bbm_buf_size
+	.uleb128 0x28
+	.4byte	.LASF403
+	.byte	0x1a
+	.byte	0x1c
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_page_pre_blk
+	.uleb128 0x28
+	.4byte	.LASF404
+	.byte	0x1a
+	.byte	0x1d
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_page_pre_slc_blk
+	.uleb128 0x28
+	.4byte	.LASF405
+	.byte	0x1a
+	.byte	0x1e
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_page_pre_super_blk
+	.uleb128 0x28
+	.4byte	.LASF406
+	.byte	0x1a
+	.byte	0x1f
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_sec_pre_page
+	.uleb128 0x28
+	.4byte	.LASF407
+	.byte	0x1a
+	.byte	0x20
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_sec_pre_page_shift
+	.uleb128 0x28
+	.4byte	.LASF408
+	.byte	0x1a
+	.byte	0x24
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_byte_pre_page
+	.uleb128 0x28
+	.4byte	.LASF409
+	.byte	0x1a
+	.byte	0x25
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_byte_pre_oob
+	.uleb128 0x28
+	.4byte	.LASF410
+	.byte	0x1a
+	.byte	0x26
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_reserved_blks
+	.uleb128 0x28
+	.4byte	.LASF411
+	.byte	0x1a
+	.byte	0x27
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_totle_phy_blks
+	.uleb128 0x28
+	.4byte	.LASF412
+	.byte	0x1a
+	.byte	0x29
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_map_region_num
+	.uleb128 0x28
+	.4byte	.LASF413
+	.byte	0x1a
+	.byte	0x2a
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_l2pmap_ram_region_num
+	.uleb128 0x28
+	.4byte	.LASF414
+	.byte	0x1a
+	.byte	0x2c
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_vendor_region_num
+	.uleb128 0x28
+	.4byte	.LASF415
+	.byte	0x1a
+	.byte	0x2e
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_map_blks_per_plane
+	.uleb128 0x28
+	.4byte	.LASF416
+	.byte	0x1a
+	.byte	0x2f
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_max_map_blks
+	.uleb128 0x28
+	.4byte	.LASF417
+	.byte	0x1a
+	.byte	0x30
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_max_vendor_blks
+	.uleb128 0x28
+	.4byte	.LASF418
+	.byte	0x1a
+	.byte	0x31
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_vendor_part_size
+	.uleb128 0x28
+	.4byte	.LASF419
+	.byte	0x1a
+	.byte	0x32
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_sys_blks_per_plane
+	.uleb128 0x28
+	.4byte	.LASF420
+	.byte	0x1a
+	.byte	0x33
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_init_sys_blks_per_plane
+	.uleb128 0x28
+	.4byte	.LASF421
+	.byte	0x1a
+	.byte	0x34
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_max_sys_blks
+	.uleb128 0x28
+	.4byte	.LASF422
+	.byte	0x1a
+	.byte	0x35
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_data_blks_per_plane
+	.uleb128 0x28
+	.4byte	.LASF423
+	.byte	0x1a
+	.byte	0x36
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_data_op_blks_per_plane
+	.uleb128 0x28
+	.4byte	.LASF424
+	.byte	0x1a
+	.byte	0x37
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_max_data_blks
+	.uleb128 0x28
+	.4byte	.LASF425
+	.byte	0x1a
+	.byte	0x38
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	ftl_gc_temp_power_lost_recovery_flag
+	.uleb128 0x28
+	.4byte	.LASF426
+	.byte	0x1a
+	.byte	0x3a
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_GlobalSysVersion
+	.uleb128 0x28
+	.4byte	.LASF427
+	.byte	0x1a
+	.byte	0x3b
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_GlobalDataVersion
+	.uleb128 0x28
+	.4byte	.LASF428
+	.byte	0x1a
+	.byte	0x3c
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_MaxLbaSector
+	.uleb128 0x28
+	.4byte	.LASF429
+	.byte	0x1a
+	.byte	0x3d
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_MaxLpn
+	.uleb128 0x28
+	.4byte	.LASF430
+	.byte	0x1a
+	.byte	0x3e
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_VaildLpn
+	.uleb128 0x28
+	.4byte	.LASF431
+	.byte	0x1a
+	.byte	0x3f
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_MaxLbn
+	.uleb128 0x28
+	.4byte	.LASF432
+	.byte	0x1a
+	.byte	0x41
+	.4byte	0xf81
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	gBbtInfo
+	.uleb128 0x28
+	.4byte	.LASF433
+	.byte	0x1a
+	.byte	0x42
+	.4byte	0x1007
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	gSysInfo
+	.uleb128 0x28
+	.4byte	.LASF434
+	.byte	0x1a
+	.byte	0x43
+	.4byte	0x15a4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	gSysFreeQueue
+	.uleb128 0x28
+	.4byte	.LASF435
+	.byte	0x1a
+	.byte	0x44
+	.4byte	0x104f
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	gL2pMapInfo
+	.uleb128 0x28
+	.4byte	.LASF436
+	.byte	0x1a
+	.byte	0x45
+	.4byte	0x104f
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	gVendorBlkInfo
+	.uleb128 0x28
+	.4byte	.LASF437
+	.byte	0x1a
+	.byte	0x46
+	.4byte	0xdf5
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	req_sys
+	.uleb128 0x28
+	.4byte	.LASF438
+	.byte	0x1a
+	.byte	0x47
+	.4byte	0x1abc
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	req_read
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0xdf5
+	.uleb128 0x28
+	.4byte	.LASF439
+	.byte	0x1a
+	.byte	0x48
+	.4byte	0x1abc
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	req_prgm
+	.uleb128 0x28
+	.4byte	.LASF440
+	.byte	0x1a
+	.byte	0x49
+	.4byte	0x1abc
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	req_erase
+	.uleb128 0x28
+	.4byte	.LASF441
+	.byte	0x1a
+	.byte	0x4a
+	.4byte	0x1abc
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	req_gc
+	.uleb128 0x28
+	.4byte	.LASF442
+	.byte	0x1a
+	.byte	0x4b
+	.4byte	0x1abc
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	req_gc_dst
+	.uleb128 0x28
+	.4byte	.LASF443
+	.byte	0x1a
+	.byte	0x4d
+	.4byte	0x1abc
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_req_cache
+	.uleb128 0xa
+	.4byte	0xdbe
+	.4byte	0x1b3b
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x28
+	.4byte	.LASF444
+	.byte	0x1a
+	.byte	0x4f
+	.4byte	0x1b2b
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_plane_order_table
+	.uleb128 0x28
+	.4byte	.LASF445
+	.byte	0x1a
+	.byte	0x51
+	.4byte	0x1001
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_sys_data_buf
+	.uleb128 0x28
+	.4byte	.LASF446
+	.byte	0x1a
+	.byte	0x52
+	.4byte	0x1001
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_sys_data_buf_1
+	.uleb128 0x28
+	.4byte	.LASF447
+	.byte	0x1a
+	.byte	0x53
+	.4byte	0x1001
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_vendor_data_buf
+	.uleb128 0x28
+	.4byte	.LASF448
+	.byte	0x1a
+	.byte	0x54
+	.4byte	0x1001
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_sys_spare_buf
+	.uleb128 0x28
+	.4byte	.LASF449
+	.byte	0x1a
+	.byte	0x55
+	.4byte	0x1001
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_io_data_buf_0
+	.uleb128 0x28
+	.4byte	.LASF450
+	.byte	0x1a
+	.byte	0x56
+	.4byte	0x1001
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_io_data_buf_1
+	.uleb128 0x28
+	.4byte	.LASF451
+	.byte	0x1a
+	.byte	0x57
+	.4byte	0x1001
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_io_spare_buf
+	.uleb128 0x28
+	.4byte	.LASF452
+	.byte	0x1a
+	.byte	0x58
+	.4byte	0x1001
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_gc_spare_buf
+	.uleb128 0x28
+	.4byte	.LASF453
+	.byte	0x1a
+	.byte	0x59
+	.4byte	0x1001
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_gc_data_buf
+	.uleb128 0x28
+	.4byte	.LASF454
+	.byte	0x1a
+	.byte	0x5a
+	.4byte	0x1c22
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	gp_gc_page_buf_info
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x16d6
+	.uleb128 0x28
+	.4byte	.LASF455
+	.byte	0x1a
+	.byte	0x5b
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_gc_page_buf_num
+	.uleb128 0x28
+	.4byte	.LASF456
+	.byte	0x1a
+	.byte	0x5c
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_gc_num_req
+	.uleb128 0x28
+	.4byte	.LASF457
+	.byte	0x1a
+	.byte	0x5d
+	.4byte	0x1c67
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	gp_ect_tbl_info
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x113b
+	.uleb128 0x28
+	.4byte	.LASF458
+	.byte	0x1a
+	.byte	0x5e
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_ect_tbl_info_size
+	.uleb128 0x28
+	.4byte	.LASF459
+	.byte	0x1a
+	.byte	0x5f
+	.4byte	0x10f8
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_erase_count_table
+	.uleb128 0x28
+	.4byte	.LASF460
+	.byte	0x1a
+	.byte	0x61
+	.4byte	0x10f8
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_swl_mul_table
+	.uleb128 0x28
+	.4byte	.LASF461
+	.byte	0x1a
+	.byte	0x62
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_totle_swl_count
+	.uleb128 0x28
+	.4byte	.LASF462
+	.byte	0x1a
+	.byte	0x63
+	.4byte	0x10f8
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_valid_page_count_table
+	.uleb128 0x28
+	.4byte	.LASF463
+	.byte	0x1a
+	.byte	0x64
+	.4byte	0x10f8
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_valid_page_count_check_table
+	.uleb128 0x28
+	.4byte	.LASF464
+	.byte	0x1a
+	.byte	0x65
+	.4byte	0x1001
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_blk_mode_table
+	.uleb128 0x28
+	.4byte	.LASF465
+	.byte	0x1a
+	.byte	0x67
+	.4byte	0x10f8
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_map_block_table
+	.uleb128 0x28
+	.4byte	.LASF466
+	.byte	0x1a
+	.byte	0x68
+	.4byte	0x10f8
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_map_block_valid_page_count
+	.uleb128 0x28
+	.4byte	.LASF467
+	.byte	0x1a
+	.byte	0x69
+	.4byte	0x1001
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_map_block_ver_table
+	.uleb128 0x28
+	.4byte	.LASF468
+	.byte	0x1a
+	.byte	0x6a
+	.4byte	0x1001
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_map_region_ppn_table
+	.uleb128 0x28
+	.4byte	.LASF469
+	.byte	0x1a
+	.byte	0x6b
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_totle_map_block
+	.uleb128 0x28
+	.4byte	.LASF470
+	.byte	0x1a
+	.byte	0x6d
+	.4byte	0x10f8
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_vendor_block_table
+	.uleb128 0x28
+	.4byte	.LASF471
+	.byte	0x1a
+	.byte	0x6e
+	.4byte	0x10f8
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_vendor_block_valid_page_count
+	.uleb128 0x28
+	.4byte	.LASF472
+	.byte	0x1a
+	.byte	0x6f
+	.4byte	0x1001
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_vendor_block_ver_table
+	.uleb128 0x28
+	.4byte	.LASF473
+	.byte	0x1a
+	.byte	0x70
+	.4byte	0x1001
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_vendor_region_ppn_table
+	.uleb128 0x28
+	.4byte	.LASF474
+	.byte	0x1a
+	.byte	0x71
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_totle_vendor_block
+	.uleb128 0x28
+	.4byte	.LASF475
+	.byte	0x1a
+	.byte	0x73
+	.4byte	0x1de7
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_l2p_ram_map
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x10fe
+	.uleb128 0x28
+	.4byte	.LASF476
+	.byte	0x1a
+	.byte	0x74
+	.4byte	0x1001
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_l2p_map_buf
+	.uleb128 0x28
+	.4byte	.LASF477
+	.byte	0x1a
+	.byte	0x75
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_l2p_last_update_region_id
+	.uleb128 0x28
+	.4byte	.LASF478
+	.byte	0x1a
+	.byte	0x7c
+	.4byte	0x1e2c
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_data_block_list_table
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x1573
+	.uleb128 0x28
+	.4byte	.LASF479
+	.byte	0x1a
+	.byte	0x7d
+	.4byte	0x1e2c
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_free_data_block_list_head
+	.uleb128 0x28
+	.4byte	.LASF480
+	.byte	0x1a
+	.byte	0x7f
+	.4byte	0x1e2c
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_data_block_list_head
+	.uleb128 0x28
+	.4byte	.LASF481
+	.byte	0x1a
+	.byte	0x80
+	.4byte	0x1e2c
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_data_block_list_tail
+	.uleb128 0x28
+	.4byte	.LASF482
+	.byte	0x1a
+	.byte	0x81
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_num_free_superblocks
+	.uleb128 0x28
+	.4byte	.LASF483
+	.byte	0x1a
+	.byte	0x82
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_num_data_superblocks
+	.uleb128 0x28
+	.4byte	.LASF484
+	.byte	0x1a
+	.byte	0x83
+	.4byte	0x15ff
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_active_superblock
+	.uleb128 0x28
+	.4byte	.LASF485
+	.byte	0x1a
+	.byte	0x84
+	.4byte	0x15ff
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_buffer_superblock
+	.uleb128 0x28
+	.4byte	.LASF486
+	.byte	0x1a
+	.byte	0x85
+	.4byte	0x15ff
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_gc_temp_superblock
+	.uleb128 0x28
+	.4byte	.LASF487
+	.byte	0x1a
+	.byte	0x86
+	.4byte	0x15ff
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_gc_superblock
+	.uleb128 0x28
+	.4byte	.LASF488
+	.byte	0x1a
+	.byte	0x87
+	.4byte	0x1f04
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	gp_last_act_superblock
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x15ff
+	.uleb128 0x28
+	.4byte	.LASF489
+	.byte	0x1a
+	.byte	0x88
+	.4byte	0x1320
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_sys_save_data
+	.uleb128 0x28
+	.4byte	.LASF490
+	.byte	0x1a
+	.byte	0x89
+	.4byte	0x141d
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_sys_ext_data
+	.uleb128 0x28
+	.4byte	.LASF491
+	.byte	0x1a
+	.byte	0x8b
+	.4byte	0x1f49
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_gc_page_info
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x16a1
+	.uleb128 0x28
+	.4byte	.LASF492
+	.byte	0x1a
+	.byte	0x8c
+	.4byte	0x10f8
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_gc_blk_tbl
+	.uleb128 0x28
+	.4byte	.LASF493
+	.byte	0x1a
+	.byte	0x8d
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_gc_blk_num
+	.uleb128 0x28
+	.4byte	.LASF494
+	.byte	0x1a
+	.byte	0x8e
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_gc_page_offset
+	.uleb128 0x28
+	.4byte	.LASF495
+	.byte	0x1a
+	.byte	0x8f
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_gc_cur_blk_valid_pages
+	.uleb128 0x28
+	.4byte	.LASF496
+	.byte	0x1a
+	.byte	0x90
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_gc_cur_blk_max_valid_pages
+	.uleb128 0x28
+	.4byte	.LASF497
+	.byte	0x1a
+	.byte	0x91
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_gc_next_blk
+	.uleb128 0x28
+	.4byte	.LASF498
+	.byte	0x1a
+	.byte	0x92
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_gc_next_blk_1
+	.uleb128 0x28
+	.4byte	.LASF499
+	.byte	0x1a
+	.byte	0x93
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_gc_bad_block_temp_num
+	.uleb128 0x28
+	.4byte	.LASF500
+	.byte	0x1a
+	.byte	0x94
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_gc_bad_block_gc_index
+	.uleb128 0xa
+	.4byte	0xdc9
+	.4byte	0x201c
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0x10
+	.byte	0
+	.uleb128 0x28
+	.4byte	.LASF501
+	.byte	0x1a
+	.byte	0x95
+	.4byte	0x200c
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_gc_bad_block_temp_tbl
+	.uleb128 0x28
+	.4byte	.LASF502
+	.byte	0x1a
+	.byte	0x97
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_gc_free_blk_threshold
+	.uleb128 0x28
+	.4byte	.LASF503
+	.byte	0x1a
+	.byte	0x98
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_gc_merge_free_blk_threshold
+	.uleb128 0x28
+	.4byte	.LASF504
+	.byte	0x1a
+	.byte	0x99
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_gc_blk_index
+	.uleb128 0x28
+	.4byte	.LASF505
+	.byte	0x1a
+	.byte	0x9b
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_totle_gc_page_count
+	.uleb128 0x28
+	.4byte	.LASF506
+	.byte	0x1a
+	.byte	0x9c
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_totle_write_page_count
+	.uleb128 0x28
+	.4byte	.LASF507
+	.byte	0x1a
+	.byte	0x9d
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_totle_write_sector
+	.uleb128 0x28
+	.4byte	.LASF508
+	.byte	0x1a
+	.byte	0x9e
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_totle_read_sector
+	.uleb128 0x28
+	.4byte	.LASF509
+	.byte	0x1a
+	.byte	0xa0
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_totle_discard_page_count
+	.uleb128 0x28
+	.4byte	.LASF510
+	.byte	0x1a
+	.byte	0xa1
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_totle_read_page_count
+	.uleb128 0x28
+	.4byte	.LASF511
+	.byte	0x1a
+	.byte	0xa2
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_tmp_data_superblock_id
+	.uleb128 0x28
+	.4byte	.LASF512
+	.byte	0x1a
+	.byte	0xa3
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_totle_cache_write_count
+	.uleb128 0x28
+	.4byte	.LASF513
+	.byte	0x1a
+	.byte	0xa4
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_totle_l2p_write_count
+	.uleb128 0x28
+	.4byte	.LASF514
+	.byte	0x1a
+	.byte	0xa6
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_totle_mlc_erase_count
+	.uleb128 0x28
+	.4byte	.LASF515
+	.byte	0x1a
+	.byte	0xa7
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_totle_avg_erase_count
+	.uleb128 0x28
+	.4byte	.LASF516
+	.byte	0x1a
+	.byte	0xa8
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_min_erase_count
+	.uleb128 0x28
+	.4byte	.LASF517
+	.byte	0x1a
+	.byte	0xa9
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_totle_slc_erase_count
+	.uleb128 0x28
+	.4byte	.LASF518
+	.byte	0x1a
+	.byte	0xaa
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_totle_sys_slc_erase_count
+	.uleb128 0x28
+	.4byte	.LASF519
+	.byte	0x1a
+	.byte	0xab
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_max_erase_count
+	.uleb128 0x28
+	.4byte	.LASF520
+	.byte	0x1a
+	.byte	0xac
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_in_gc_progress
+	.uleb128 0x28
+	.4byte	.LASF521
+	.byte	0x1a
+	.byte	0xad
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_in_swl_replace
+	.uleb128 0x28
+	.4byte	.LASF522
+	.byte	0x1a
+	.byte	0xae
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_ftl_nand_free_count
+	.uleb128 0x28
+	.4byte	.LASF523
+	.byte	0x1a
+	.byte	0xaf
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_gc_head_data_block
+	.uleb128 0x28
+	.4byte	.LASF524
+	.byte	0x1a
+	.byte	0xb0
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_gc_head_data_block_count
+	.uleb128 0x28
+	.4byte	.LASF525
+	.byte	0x1a
+	.byte	0xb1
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_gc_skip_write_count
+	.uleb128 0x28
+	.4byte	.LASF526
+	.byte	0x1a
+	.byte	0xb2
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_cur_erase_blk
+	.uleb128 0x28
+	.4byte	.LASF527
+	.byte	0x1a
+	.byte	0xb4
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_recovery_page_num
+	.uleb128 0x28
+	.4byte	.LASF528
+	.byte	0x1a
+	.byte	0xb5
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_recovery_page_min_ver
+	.uleb128 0xa
+	.4byte	0xdd4
+	.4byte	0x2278
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x28
+	.4byte	.LASF529
+	.byte	0x1a
+	.byte	0xb6
+	.4byte	0x2268
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_recovery_ppa_tbl
+	.uleb128 0x28
+	.4byte	.LASF530
+	.byte	0x1a
+	.byte	0xb7
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_mlc_erase_count_value
+	.uleb128 0x28
+	.4byte	.LASF531
+	.byte	0x1a
+	.byte	0xb8
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_power_lost_recovery_flag
+	.uleb128 0x4
+	.4byte	.LASF532
+	.byte	0x17
+	.byte	0x14
+	.4byte	0xe44
+	.uleb128 0x4
+	.4byte	.LASF533
+	.byte	0x17
+	.byte	0x15
+	.4byte	0xe44
+	.uleb128 0x4
+	.4byte	.LASF534
+	.byte	0x17
+	.byte	0x16
+	.4byte	0xee6
+	.uleb128 0xa
+	.4byte	0xb9
+	.4byte	0x22e9
+	.uleb128 0x15
+	.4byte	0xda
+	.2byte	0x3ff
+	.byte	0
+	.uleb128 0x4
+	.4byte	.LASF535
+	.byte	0x17
+	.byte	0x17
+	.4byte	0x22d8
+	.uleb128 0x28
+	.4byte	.LASF536
+	.byte	0x3
+	.byte	0x6
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	DeviceCapacity
+	.uleb128 0x28
+	.4byte	.LASF537
+	.byte	0x3
+	.byte	0x7
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	gFtlInitStatus
+	.uleb128 0x4
+	.4byte	.LASF538
+	.byte	0x3
+	.byte	0x6d
+	.4byte	0xdd4
+	.uleb128 0x4
+	.4byte	.LASF539
+	.byte	0x3
+	.byte	0x6e
+	.4byte	0xdd4
+	.uleb128 0x4
+	.4byte	.LASF540
+	.byte	0x3
+	.byte	0x6f
+	.4byte	0xdd4
+	.uleb128 0x4
+	.4byte	.LASF541
+	.byte	0x3
+	.byte	0x70
+	.4byte	0xdd4
+	.uleb128 0x29
+	.4byte	.LASF542
+	.byte	0x3
+	.2byte	0x3c0
+	.4byte	0x5b
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	power_up_flag
+	.uleb128 0x2a
+	.4byte	.LASF546
+	.byte	0x3
+	.2byte	0x483
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	gc_discard_updated
+	.uleb128 0x29
+	.4byte	.LASF543
+	.byte	0x2
+	.2byte	0x35b
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_ect_tbl_power_up_flush
+	.uleb128 0x29
+	.4byte	.LASF544
+	.byte	0x2
+	.2byte	0x370
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	FtlUpdateVaildLpnCount
+	.uleb128 0xa
+	.4byte	0xdc9
+	.4byte	0x23b3
+	.uleb128 0x15
+	.4byte	0xda
+	.2byte	0x1fff
+	.byte	0
+	.uleb128 0x29
+	.4byte	.LASF545
+	.byte	0x2
+	.2byte	0x8ad
+	.4byte	0x23a2
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	check_vpc_table
+	.uleb128 0x2b
+	.4byte	.LASF547
+	.byte	0x5
+	.byte	0x6d
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	ftl_gc_temp_block_bops_scan_page_addr
+	.uleb128 0x29
+	.4byte	.LASF548
+	.byte	0x5
+	.2byte	0x1d4
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	gc_ink_free_return_value
+	.uleb128 0xc
+	.4byte	.LASF549
+	.byte	0x1b
+	.2byte	0x3ba
+	.4byte	0x10b
+	.uleb128 0xc
+	.4byte	.LASF550
+	.byte	0x1b
+	.2byte	0x3bb
+	.4byte	0x10b
+	.uleb128 0xc
+	.4byte	.LASF551
+	.byte	0x1b
+	.2byte	0x3bc
+	.4byte	0x10b
+	.uleb128 0xf
+	.4byte	.LASF552
+	.byte	0x4
+	.byte	0x1c
+	.byte	0xc
+	.4byte	0x2431
+	.uleb128 0x16
+	.string	"pid"
+	.byte	0x1c
+	.byte	0xd
+	.4byte	0x5b
+	.byte	0
+	.byte	0
+	.uleb128 0x4
+	.4byte	.LASF553
+	.byte	0x1c
+	.byte	0x10
+	.4byte	0x243c
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x2418
+	.uleb128 0x2c
+	.4byte	0x22c2
+	.byte	0x1
+	.byte	0x10
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_nand_phy_info
+	.uleb128 0x2c
+	.4byte	0x22cd
+	.byte	0x1
+	.byte	0x11
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_nand_ops
+	.uleb128 0x2b
+	.4byte	.LASF554
+	.byte	0x1
+	.byte	0x13
+	.4byte	0x22d8
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	check_buf
+	.uleb128 0x2c
+	.4byte	0x22e9
+	.byte	0x1
+	.byte	0x14
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	ftl_temp_buf
+	.uleb128 0xa
+	.4byte	0xb9
+	.4byte	0x249a
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0x7f
+	.byte	0
+	.uleb128 0x2b
+	.4byte	.LASF555
+	.byte	0x1
+	.byte	0x15
+	.4byte	0x248a
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	check_spare_buf
+	.uleb128 0x2d
+	.4byte	.LASF558
+	.byte	0x1
+	.byte	0xf7
+	.4byte	0x5b
+	.8byte	.LFB347
+	.8byte	.LFE347-.LFB347
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2527
+	.uleb128 0x2e
+	.4byte	.LASF556
+	.byte	0x1
+	.byte	0xf7
+	.4byte	0x12c
+	.4byte	.LLST468
+	.uleb128 0x2e
+	.4byte	.LASF557
+	.byte	0x1
+	.byte	0xf7
+	.4byte	0x12c
+	.4byte	.LLST469
+	.uleb128 0x2e
+	.4byte	.LASF325
+	.byte	0x1
+	.byte	0xf7
+	.4byte	0x30
+	.4byte	.LLST470
+	.uleb128 0x2f
+	.8byte	.LVL2176
+	.4byte	0xa8ab
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x9
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0xc
+	.4byte	0xffffffff
+	.byte	0x1a
+	.byte	0
+	.byte	0
+	.uleb128 0x2d
+	.4byte	.LASF559
+	.byte	0x1
+	.byte	0xf2
+	.4byte	0x12c
+	.8byte	.LFB346
+	.8byte	.LFE346-.LFB346
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x259f
+	.uleb128 0x2e
+	.4byte	.LASF560
+	.byte	0x1
+	.byte	0xf2
+	.4byte	0x12c
+	.4byte	.LLST303
+	.uleb128 0x2e
+	.4byte	.LASF561
+	.byte	0x1
+	.byte	0xf2
+	.4byte	0x16f
+	.4byte	.LLST304
+	.uleb128 0x2e
+	.4byte	.LASF30
+	.byte	0x1
+	.byte	0xf2
+	.4byte	0x30
+	.4byte	.LLST305
+	.uleb128 0x2f
+	.8byte	.LVL1241
+	.4byte	0xa8b6
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x9
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0xc
+	.4byte	0xffffffff
+	.byte	0x1a
+	.byte	0
+	.byte	0
+	.uleb128 0x2d
+	.4byte	.LASF562
+	.byte	0x1
+	.byte	0xed
+	.4byte	0x12c
+	.8byte	.LFB345
+	.8byte	.LFE345-.LFB345
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2611
+	.uleb128 0x31
+	.string	"s"
+	.byte	0x1
+	.byte	0xed
+	.4byte	0x12c
+	.4byte	.LLST196
+	.uleb128 0x31
+	.string	"c"
+	.byte	0x1
+	.byte	0xed
+	.4byte	0x5b
+	.4byte	.LLST197
+	.uleb128 0x31
+	.string	"n"
+	.byte	0x1
+	.byte	0xed
+	.4byte	0x30
+	.4byte	.LLST198
+	.uleb128 0x2f
+	.8byte	.LVL738
+	.4byte	0xa8c2
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x9
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0xc
+	.4byte	0xffffffff
+	.byte	0x1a
+	.byte	0
+	.byte	0
+	.uleb128 0x2d
+	.4byte	.LASF563
+	.byte	0x1
+	.byte	0xdb
+	.4byte	0xae
+	.8byte	.LFB344
+	.8byte	.LFE344-.LFB344
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x26cd
+	.uleb128 0x2e
+	.4byte	.LASF564
+	.byte	0x1
+	.byte	0xdb
+	.4byte	0xf37
+	.4byte	.LLST299
+	.uleb128 0x31
+	.string	"die"
+	.byte	0x1
+	.byte	0xdb
+	.4byte	0xb9
+	.4byte	.LLST300
+	.uleb128 0x32
+	.4byte	.LASF325
+	.byte	0x1
+	.byte	0xdd
+	.4byte	0xa3
+	.4byte	.LLST301
+	.uleb128 0x33
+	.string	"i"
+	.byte	0x1
+	.byte	0xdd
+	.4byte	0xa3
+	.4byte	.LLST302
+	.uleb128 0x34
+	.8byte	.LVL1228
+	.4byte	0x259f
+	.4byte	0x2691
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
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+	.2byte	0x1d5
+	.4byte	0xdd4
+	.uleb128 0x49
+	.4byte	.LASF590
+	.byte	0x5
+	.2byte	0x1d7
+	.4byte	0xdc9
+	.uleb128 0x4a
+	.string	"lpa"
+	.byte	0x5
+	.2byte	0x1d8
+	.4byte	0xdd4
+	.uleb128 0x4a
+	.string	"ppa"
+	.byte	0x5
+	.2byte	0x1d8
+	.4byte	0xdd4
+	.uleb128 0x49
+	.4byte	.LASF591
+	.byte	0x5
+	.2byte	0x1d9
+	.4byte	0xdc9
+	.uleb128 0x49
+	.4byte	.LASF299
+	.byte	0x5
+	.2byte	0x1da
+	.4byte	0xdc9
+	.uleb128 0x49
+	.4byte	.LASF592
+	.byte	0x5
+	.2byte	0x1da
+	.4byte	0xdc9
+	.uleb128 0x49
+	.4byte	.LASF593
+	.byte	0x5
+	.2byte	0x1da
+	.4byte	0xdc9
+	.uleb128 0x49
+	.4byte	.LASF594
+	.byte	0x5
+	.2byte	0x1da
+	.4byte	0xdc9
+	.uleb128 0x49
+	.4byte	.LASF595
+	.byte	0x5
+	.2byte	0x1db
+	.4byte	0xdc9
+	.uleb128 0x49
+	.4byte	.LASF596
+	.byte	0x5
+	.2byte	0x1dc
+	.4byte	0x2d84
+	.uleb128 0x4b
+	.4byte	.LASF597
+	.byte	0x5
+	.2byte	0x276
+	.uleb128 0x4b
+	.4byte	.LASF598
+	.byte	0x5
+	.2byte	0x279
+	.uleb128 0x4c
+	.4byte	.LASF574
+	.4byte	0x2d9a
+	.4byte	.LASF587
+	.uleb128 0x4d
+	.uleb128 0x49
+	.4byte	.LASF599
+	.byte	0x5
+	.2byte	0x1f3
+	.4byte	0xdc9
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x1238
+	.uleb128 0xa
+	.4byte	0xee
+	.4byte	0x2d9a
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0x16
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x2d8a
+	.uleb128 0x47
+	.4byte	.LASF600
+	.byte	0x5
+	.2byte	0x1a2
+	.4byte	0x5b
+	.byte	0x1
+	.4byte	0x2dff
+	.uleb128 0x4a
+	.string	"ret"
+	.byte	0x5
+	.2byte	0x1a4
+	.4byte	0x5b
+	.uleb128 0x4a
+	.string	"i"
+	.byte	0x5
+	.2byte	0x1a5
+	.4byte	0x5b
+	.uleb128 0x4a
+	.string	"ppa"
+	.byte	0x5
+	.2byte	0x1a6
+	.4byte	0xdd4
+	.uleb128 0x49
+	.4byte	.LASF565
+	.byte	0x5
+	.2byte	0x1a7
+	.4byte	0x2711
+	.uleb128 0x4e
+	.4byte	0x2df0
+	.uleb128 0x49
+	.4byte	.LASF601
+	.byte	0x5
+	.2byte	0x1b1
+	.4byte	0xdf5
+	.byte	0
+	.uleb128 0x4d
+	.uleb128 0x49
+	.4byte	.LASF602
+	.byte	0x5
+	.2byte	0x1c6
+	.4byte	0xdd4
+	.byte	0
+	.byte	0
+	.uleb128 0x47
+	.4byte	.LASF603
+	.byte	0x5
+	.2byte	0x185
+	.4byte	0x5b
+	.byte	0x1
+	.4byte	0x2e49
+	.uleb128 0x48
+	.4byte	.LASF604
+	.byte	0x5
+	.2byte	0x185
+	.4byte	0xdc9
+	.uleb128 0x49
+	.4byte	.LASF592
+	.byte	0x5
+	.2byte	0x187
+	.4byte	0xdc9
+	.uleb128 0x4a
+	.string	"i"
+	.byte	0x5
+	.2byte	0x188
+	.4byte	0xdc9
+	.uleb128 0x4a
+	.string	"j"
+	.byte	0x5
+	.2byte	0x188
+	.4byte	0xdc9
+	.uleb128 0x49
+	.4byte	.LASF388
+	.byte	0x5
+	.2byte	0x189
+	.4byte	0xdc9
+	.byte	0
+	.uleb128 0x4f
+	.4byte	.LASF714
+	.byte	0x5
+	.2byte	0x17a
+	.4byte	0x5b
+	.byte	0x1
+	.uleb128 0x46
+	.4byte	.LASF605
+	.byte	0x5
+	.2byte	0x166
+	.4byte	0x5b
+	.8byte	.LFB315
+	.8byte	.LFE315-.LFB315
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2ef8
+	.uleb128 0x50
+	.4byte	.LASF388
+	.byte	0x5
+	.2byte	0x166
+	.4byte	0xdc9
+	.4byte	.LLST139
+	.uleb128 0x51
+	.string	"i"
+	.byte	0x5
+	.2byte	0x168
+	.4byte	0xdc9
+	.4byte	.LLST140
+	.uleb128 0x52
+	.4byte	.LASF606
+	.byte	0x5
+	.2byte	0x169
+	.4byte	0xdc9
+	.4byte	.LLST141
+	.uleb128 0x34
+	.8byte	.LVL565
+	.4byte	0x6cf6
+	.4byte	0x2ebe
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL568
+	.4byte	0xa8ce
+	.4byte	0x2ee3
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC74
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL569
+	.4byte	0x2ef8
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF607
+	.byte	0x5
+	.2byte	0x158
+	.4byte	0x5b
+	.8byte	.LFB314
+	.8byte	.LFE314-.LFB314
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2f4c
+	.uleb128 0x50
+	.4byte	.LASF608
+	.byte	0x5
+	.2byte	0x158
+	.4byte	0xdc9
+	.4byte	.LLST138
+	.uleb128 0x36
+	.8byte	.LVL561
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC73
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF609
+	.byte	0x5
+	.2byte	0x13b
+	.4byte	0xdd4
+	.8byte	.LFB313
+	.8byte	.LFE313-.LFB313
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3012
+	.uleb128 0x51
+	.string	"i"
+	.byte	0x5
+	.2byte	0x13d
+	.4byte	0xdc9
+	.4byte	.LLST409
+	.uleb128 0x52
+	.4byte	.LASF596
+	.byte	0x5
+	.2byte	0x13e
+	.4byte	0x2d84
+	.4byte	.LLST410
+	.uleb128 0x34
+	.8byte	.LVL1808
+	.4byte	0x27e7
+	.4byte	0x2fa8
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1810
+	.4byte	0x35c6
+	.4byte	0x2fc6
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1811
+	.4byte	0x32a5
+	.4byte	0x2fdd
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1813
+	.4byte	0x7574
+	.uleb128 0x45
+	.8byte	.LVL1814
+	.4byte	0x72c7
+	.uleb128 0x45
+	.8byte	.LVL1815
+	.4byte	0x324a
+	.uleb128 0x45
+	.8byte	.LVL1819
+	.4byte	0x34b7
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF610
+	.byte	0x5
+	.2byte	0x12b
+	.4byte	0xdd4
+	.8byte	.LFB312
+	.8byte	.LFE312-.LFB312
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x30c4
+	.uleb128 0x45
+	.8byte	.LVL1823
+	.4byte	0x7cda
+	.uleb128 0x34
+	.8byte	.LVL1824
+	.4byte	0x32a5
+	.4byte	0x3058
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1825
+	.4byte	0x39d7
+	.4byte	0x3077
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR53
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1826
+	.4byte	0x5ce8
+	.uleb128 0x34
+	.8byte	.LVL1827
+	.4byte	0x58ed
+	.4byte	0x309b
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1828
+	.4byte	0x5619
+	.uleb128 0x2f
+	.8byte	.LVL1829
+	.4byte	0x3789
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR53
+	.byte	0
+	.byte	0
+	.uleb128 0x53
+	.4byte	.LASF670
+	.byte	0x5
+	.2byte	0x120
+	.byte	0x1
+	.uleb128 0x2d
+	.4byte	.LASF611
+	.byte	0x5
+	.byte	0xd2
+	.4byte	0xdd4
+	.8byte	.LFB310
+	.8byte	.LFE310-.LFB310
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x324a
+	.uleb128 0x2e
+	.4byte	.LASF612
+	.byte	0x5
+	.byte	0xd2
+	.4byte	0x1f04
+	.4byte	.LLST286
+	.uleb128 0x2e
+	.4byte	.LASF613
+	.byte	0x5
+	.byte	0xd2
+	.4byte	0xdd4
+	.4byte	.LLST287
+	.uleb128 0x32
+	.4byte	.LASF594
+	.byte	0x5
+	.byte	0xd4
+	.4byte	0xdc9
+	.4byte	.LLST288
+	.uleb128 0x32
+	.4byte	.LASF569
+	.byte	0x5
+	.byte	0xd5
+	.4byte	0xdc9
+	.4byte	.LLST289
+	.uleb128 0x33
+	.string	"req"
+	.byte	0x5
+	.byte	0xd5
+	.4byte	0xdc9
+	.4byte	.LLST290
+	.uleb128 0x32
+	.4byte	.LASF592
+	.byte	0x5
+	.byte	0xd6
+	.4byte	0xdc9
+	.4byte	.LLST291
+	.uleb128 0x32
+	.4byte	.LASF382
+	.byte	0x5
+	.byte	0xd6
+	.4byte	0xdc9
+	.4byte	.LLST292
+	.uleb128 0x32
+	.4byte	.LASF380
+	.byte	0x5
+	.byte	0xd6
+	.4byte	0xdc9
+	.4byte	.LLST293
+	.uleb128 0x32
+	.4byte	.LASF614
+	.byte	0x5
+	.byte	0xd7
+	.4byte	0xdd4
+	.4byte	.LLST294
+	.uleb128 0x32
+	.4byte	.LASF615
+	.byte	0x5
+	.byte	0xd8
+	.4byte	0xdd4
+	.4byte	.LLST295
+	.uleb128 0x54
+	.4byte	.LASF616
+	.byte	0x5
+	.byte	0xd9
+	.4byte	0xdd4
+	.sleb128 -1
+	.uleb128 0x32
+	.4byte	.LASF596
+	.byte	0x5
+	.byte	0xda
+	.4byte	0x2d84
+	.4byte	.LLST296
+	.uleb128 0x55
+	.4byte	.LASF617
+	.byte	0x5
+	.byte	0xe1
+	.uleb128 0x55
+	.4byte	.LASF618
+	.byte	0x5
+	.byte	0xe5
+	.uleb128 0x56
+	.4byte	.LASF688
+	.byte	0x5
+	.2byte	0x117
+	.8byte	.L872
+	.uleb128 0x45
+	.8byte	.LVL1174
+	.4byte	0x324a
+	.uleb128 0x34
+	.8byte	.LVL1182
+	.4byte	0x29a4
+	.4byte	0x31ea
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x8f
+	.sleb128 204
+	.byte	0x94
+	.byte	0x4
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1195
+	.4byte	0x6d36
+	.4byte	0x3204
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x74
+	.sleb128 0
+	.byte	0x3a
+	.byte	0x25
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1201
+	.4byte	0x4e68
+	.4byte	0x3222
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1204
+	.4byte	0x34b7
+	.uleb128 0x45
+	.8byte	.LVL1207
+	.4byte	0x68e0
+	.uleb128 0x45
+	.8byte	.LVL1209
+	.4byte	0x324a
+	.byte	0
+	.uleb128 0x43
+	.4byte	.LASF620
+	.byte	0x5
+	.byte	0xc9
+	.8byte	.LFB309
+	.8byte	.LFE309-.LFB309
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x32a5
+	.uleb128 0x34
+	.8byte	.LVL1168
+	.4byte	0x259f
+	.4byte	0x327f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1169
+	.4byte	0x259f
+	.4byte	0x3297
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.uleb128 0x57
+	.8byte	.LVL1170
+	.4byte	0x361a
+	.byte	0
+	.uleb128 0x2d
+	.4byte	.LASF621
+	.byte	0x5
+	.byte	0x6f
+	.4byte	0x5b
+	.8byte	.LFB308
+	.8byte	.LFE308-.LFB308
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x34a2
+	.uleb128 0x2e
+	.4byte	.LASF622
+	.byte	0x5
+	.byte	0x6f
+	.4byte	0x5b
+	.4byte	.LLST404
+	.uleb128 0x33
+	.string	"i"
+	.byte	0x5
+	.byte	0x71
+	.4byte	0xdc9
+	.4byte	.LLST405
+	.uleb128 0x32
+	.4byte	.LASF623
+	.byte	0x5
+	.byte	0x71
+	.4byte	0xdc9
+	.4byte	.LLST406
+	.uleb128 0x2b
+	.4byte	.LASF624
+	.byte	0x5
+	.byte	0x72
+	.4byte	0xdd4
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -4
+	.uleb128 0x32
+	.4byte	.LASF625
+	.byte	0x5
+	.byte	0x73
+	.4byte	0xdd4
+	.4byte	.LLST407
+	.uleb128 0x2b
+	.4byte	.LASF612
+	.byte	0x5
+	.byte	0x74
+	.4byte	0x1f04
+	.uleb128 0xa
+	.byte	0x3
+	.8byte	g_gc_temp_superblock
+	.byte	0x9f
+	.uleb128 0x32
+	.4byte	.LASF626
+	.byte	0x5
+	.byte	0x75
+	.4byte	0x1f49
+	.4byte	.LLST408
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x34b2
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.7246
+	.uleb128 0x34
+	.8byte	.LVL1769
+	.4byte	0x30cd
+	.4byte	0x3365
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR53
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1771
+	.4byte	0x58ed
+	.4byte	0x337c
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1772
+	.4byte	0x7574
+	.uleb128 0x45
+	.8byte	.LVL1773
+	.4byte	0x72c7
+	.uleb128 0x45
+	.8byte	.LVL1777
+	.4byte	0x7cda
+	.uleb128 0x34
+	.8byte	.LVL1778
+	.4byte	0xa8ce
+	.4byte	0x33d5
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR173
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xa2
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1780
+	.4byte	0x3645
+	.4byte	0x33ed
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x9
+	.byte	0xff
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1781
+	.4byte	0x68bb
+	.uleb128 0x45
+	.8byte	.LVL1783
+	.4byte	0x5ce8
+	.uleb128 0x45
+	.8byte	.LVL1784
+	.4byte	0x5619
+	.uleb128 0x34
+	.8byte	.LVL1787
+	.4byte	0xa8ce
+	.4byte	0x343f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xa8
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1788
+	.4byte	0x5bbb
+	.4byte	0x345d
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 188
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1789
+	.4byte	0x6cf6
+	.uleb128 0x34
+	.8byte	.LVL1792
+	.4byte	0x5bbb
+	.4byte	0x3487
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 4
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1794
+	.4byte	0x3645
+	.uleb128 0x45
+	.8byte	.LVL1798
+	.4byte	0x68e0
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xee
+	.4byte	0x34b2
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0x12
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x34a2
+	.uleb128 0x43
+	.4byte	.LASF627
+	.byte	0x5
+	.byte	0x54
+	.8byte	.LFB307
+	.8byte	.LFE307-.LFB307
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3534
+	.uleb128 0x2e
+	.4byte	.LASF628
+	.byte	0x5
+	.byte	0x54
+	.4byte	0xdd4
+	.4byte	.LLST133
+	.uleb128 0x2e
+	.4byte	.LASF391
+	.byte	0x5
+	.byte	0x54
+	.4byte	0xdd4
+	.4byte	.LLST134
+	.uleb128 0x31
+	.string	"lpa"
+	.byte	0x5
+	.byte	0x54
+	.4byte	0xdd4
+	.4byte	.LLST135
+	.uleb128 0x32
+	.4byte	.LASF629
+	.byte	0x5
+	.byte	0x56
+	.4byte	0xdc9
+	.4byte	.LLST136
+	.uleb128 0x33
+	.string	"i"
+	.byte	0x5
+	.byte	0x57
+	.4byte	0xdc9
+	.4byte	.LLST137
+	.uleb128 0x36
+	.8byte	.LVL549
+	.4byte	0x6cf6
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x76
+	.sleb128 0
+	.byte	0x3a
+	.byte	0x25
+	.byte	0
+	.byte	0
+	.uleb128 0x2d
+	.4byte	.LASF630
+	.byte	0x5
+	.byte	0x49
+	.4byte	0xdd4
+	.8byte	.LFB306
+	.8byte	.LFE306-.LFB306
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3572
+	.uleb128 0x31
+	.string	"blk"
+	.byte	0x5
+	.byte	0x49
+	.4byte	0xdc9
+	.4byte	.LLST131
+	.uleb128 0x33
+	.string	"i"
+	.byte	0x5
+	.byte	0x4b
+	.4byte	0xdc9
+	.4byte	.LLST132
+	.byte	0
+	.uleb128 0x43
+	.4byte	.LASF631
+	.byte	0x5
+	.byte	0x38
+	.8byte	.LFB305
+	.8byte	.LFE305-.LFB305
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x35c6
+	.uleb128 0x58
+	.string	"req"
+	.byte	0x5
+	.byte	0x38
+	.4byte	0x1abc
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x59
+	.4byte	.LASF632
+	.byte	0x5
+	.byte	0x38
+	.4byte	0xdd4
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x33
+	.string	"i"
+	.byte	0x5
+	.byte	0x3a
+	.4byte	0xdc9
+	.4byte	.LLST129
+	.uleb128 0x32
+	.4byte	.LASF633
+	.byte	0x5
+	.byte	0x3b
+	.4byte	0xdc9
+	.4byte	.LLST130
+	.byte	0
+	.uleb128 0x43
+	.4byte	.LASF634
+	.byte	0x5
+	.byte	0x29
+	.8byte	.LFB304
+	.8byte	.LFE304-.LFB304
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x361a
+	.uleb128 0x58
+	.string	"req"
+	.byte	0x5
+	.byte	0x29
+	.4byte	0x1abc
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x59
+	.4byte	.LASF632
+	.byte	0x5
+	.byte	0x29
+	.4byte	0xdd4
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x33
+	.string	"i"
+	.byte	0x5
+	.byte	0x2b
+	.4byte	0xdc9
+	.4byte	.LLST127
+	.uleb128 0x32
+	.4byte	.LASF633
+	.byte	0x5
+	.byte	0x2c
+	.4byte	0xdc9
+	.4byte	.LLST128
+	.byte	0
+	.uleb128 0x43
+	.4byte	.LASF635
+	.byte	0x5
+	.byte	0x15
+	.8byte	.LFB303
+	.8byte	.LFE303-.LFB303
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3645
+	.uleb128 0x33
+	.string	"i"
+	.byte	0x5
+	.byte	0x17
+	.4byte	0xdc9
+	.4byte	.LLST126
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF636
+	.byte	0x2
+	.2byte	0xa93
+	.4byte	0x5b
+	.8byte	.LFB302
+	.8byte	.LFE302-.LFB302
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3734
+	.uleb128 0x50
+	.4byte	.LASF623
+	.byte	0x2
+	.2byte	0xa93
+	.4byte	0xdc9
+	.4byte	.LLST323
+	.uleb128 0x51
+	.string	"ret"
+	.byte	0x2
+	.2byte	0xa95
+	.4byte	0x5b
+	.4byte	.LLST324
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x3744
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.7176
+	.uleb128 0x34
+	.8byte	.LVL1339
+	.4byte	0xa8ce
+	.4byte	0x36c4
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC98
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1344
+	.4byte	0xa8ce
+	.4byte	0x36f7
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR160
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xa9a
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1345
+	.4byte	0x3749
+	.uleb128 0x36
+	.8byte	.LVL1347
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR160
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xaaa
+	.byte	0
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xee
+	.4byte	0x3744
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0x13
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x3734
+	.uleb128 0x47
+	.4byte	.LASF637
+	.byte	0x2
+	.2byte	0xa7e
+	.4byte	0x5b
+	.byte	0x1
+	.4byte	0x3774
+	.uleb128 0x48
+	.4byte	.LASF623
+	.byte	0x2
+	.2byte	0xa7e
+	.4byte	0xdc9
+	.uleb128 0x4c
+	.4byte	.LASF574
+	.4byte	0x3784
+	.4byte	.LASF637
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xee
+	.4byte	0x3784
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0xf
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x3774
+	.uleb128 0x46
+	.4byte	.LASF638
+	.byte	0x2
+	.2byte	0xa5e
+	.4byte	0xdd4
+	.8byte	.LFB300
+	.8byte	.LFE300-.LFB300
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x38b7
+	.uleb128 0x50
+	.4byte	.LASF639
+	.byte	0x2
+	.2byte	0xa5e
+	.4byte	0x1f04
+	.4byte	.LLST123
+	.uleb128 0x52
+	.4byte	.LASF594
+	.byte	0x2
+	.2byte	0xa60
+	.4byte	0xdc9
+	.4byte	.LLST124
+	.uleb128 0x52
+	.4byte	.LASF640
+	.byte	0x2
+	.2byte	0xa61
+	.4byte	0xdd4
+	.4byte	.LLST125
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x34b2
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.7156
+	.uleb128 0x34
+	.8byte	.LVL508
+	.4byte	0xa8ce
+	.4byte	0x3821
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR90
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xa63
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL509
+	.4byte	0xa8ce
+	.4byte	0x3854
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR90
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xa64
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL510
+	.4byte	0xa8ce
+	.4byte	0x3887
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR90
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xa65
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL514
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR90
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xa7a
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF641
+	.byte	0x2
+	.2byte	0xa46
+	.4byte	0x5b
+	.8byte	.LFB299
+	.8byte	.LFE299-.LFB299
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x39c2
+	.uleb128 0x50
+	.4byte	.LASF639
+	.byte	0x2
+	.2byte	0xa46
+	.4byte	0x1f04
+	.4byte	.LLST389
+	.uleb128 0x52
+	.4byte	.LASF623
+	.byte	0x2
+	.2byte	0xa48
+	.4byte	0xdc9
+	.4byte	.LLST390
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x39d2
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.7149
+	.uleb128 0x34
+	.8byte	.LVL1701
+	.4byte	0xa8ce
+	.4byte	0x393f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR169
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xa49
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1702
+	.4byte	0x68bb
+	.4byte	0x3957
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1703
+	.4byte	0x3749
+	.uleb128 0x34
+	.8byte	.LVL1704
+	.4byte	0x39d7
+	.4byte	0x397c
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1705
+	.4byte	0x5ce8
+	.uleb128 0x34
+	.8byte	.LVL1706
+	.4byte	0x58ed
+	.4byte	0x39a0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1707
+	.4byte	0x5619
+	.uleb128 0x36
+	.8byte	.LVL1711
+	.4byte	0x68e0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xee
+	.4byte	0x39d2
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x39c2
+	.uleb128 0x46
+	.4byte	.LASF642
+	.byte	0x2
+	.2byte	0x9e2
+	.4byte	0x5b
+	.8byte	.LFB298
+	.8byte	.LFE298-.LFB298
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3d02
+	.uleb128 0x5a
+	.string	"p"
+	.byte	0x2
+	.2byte	0x9e2
+	.4byte	0x1f04
+	.4byte	.LLST310
+	.uleb128 0x52
+	.4byte	.LASF643
+	.byte	0x2
+	.2byte	0x9e4
+	.4byte	0xdc9
+	.4byte	.LLST311
+	.uleb128 0x49
+	.4byte	.LASF592
+	.byte	0x2
+	.2byte	0x9e5
+	.4byte	0xdc9
+	.uleb128 0x52
+	.4byte	.LASF569
+	.byte	0x2
+	.2byte	0x9e5
+	.4byte	0xdc9
+	.4byte	.LLST312
+	.uleb128 0x51
+	.string	"n"
+	.byte	0x2
+	.2byte	0x9e5
+	.4byte	0xdc9
+	.4byte	.LLST313
+	.uleb128 0x49
+	.4byte	.LASF594
+	.byte	0x2
+	.2byte	0x9e5
+	.4byte	0xdc9
+	.uleb128 0x52
+	.4byte	.LASF644
+	.byte	0x2
+	.2byte	0x9e6
+	.4byte	0x5b
+	.4byte	.LLST314
+	.uleb128 0x52
+	.4byte	.LASF645
+	.byte	0x2
+	.2byte	0x9e7
+	.4byte	0xdc9
+	.4byte	.LLST315
+	.uleb128 0x4b
+	.4byte	.LASF646
+	.byte	0x2
+	.2byte	0x9e8
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x3d12
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.7128
+	.uleb128 0x5b
+	.4byte	0x5398
+	.8byte	.LBB244
+	.8byte	.LBE244-.LBB244
+	.byte	0x2
+	.2byte	0xa18
+	.4byte	0x3ad2
+	.uleb128 0x5c
+	.4byte	0x53b1
+	.4byte	.LLST316
+	.uleb128 0x5c
+	.4byte	0x53a5
+	.4byte	.LLST317
+	.uleb128 0x36
+	.8byte	.LVL1295
+	.4byte	0x9720
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x3e
+	.4byte	0x53b1
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1267
+	.4byte	0xa8ce
+	.4byte	0x3b05
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR158
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x9e9
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1271
+	.4byte	0x666f
+	.4byte	0x3b24
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR47
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1273
+	.4byte	0xa8ce
+	.4byte	0x3b57
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR158
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x9f2
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1274
+	.4byte	0x4593
+	.4byte	0x3b6f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1275
+	.4byte	0x68bb
+	.4byte	0x3b87
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1276
+	.4byte	0xa8ce
+	.4byte	0x3bba
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR158
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x9fd
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1279
+	.4byte	0xa8ce
+	.4byte	0x3bed
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR158
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xa00
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1281
+	.4byte	0xa8ce
+	.4byte	0x3c20
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR158
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xa0b
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1282
+	.4byte	0xa8ce
+	.4byte	0x3c53
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR158
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xa0d
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1283
+	.4byte	0x5398
+	.4byte	0x3c70
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1286
+	.4byte	0x2721
+	.4byte	0x3c88
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1288
+	.4byte	0x3e95
+	.4byte	0x3ca0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1289
+	.4byte	0x72c7
+	.uleb128 0x34
+	.8byte	.LVL1290
+	.4byte	0x68bb
+	.4byte	0x3cc5
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1300
+	.4byte	0x7574
+	.uleb128 0x36
+	.8byte	.LVL1304
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR158
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xa42
+	.byte	0
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xee
+	.4byte	0x3d12
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0x18
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x3d02
+	.uleb128 0x47
+	.4byte	.LASF647
+	.byte	0x2
+	.2byte	0x9d9
+	.4byte	0x5b
+	.byte	0x1
+	.4byte	0x3d35
+	.uleb128 0x48
+	.4byte	.LASF623
+	.byte	0x2
+	.2byte	0x9d9
+	.4byte	0xdc9
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF648
+	.byte	0x2
+	.2byte	0x98e
+	.4byte	0xdc9
+	.8byte	.LFB296
+	.8byte	.LFE296-.LFB296
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3e01
+	.uleb128 0x52
+	.4byte	.LASF649
+	.byte	0x2
+	.2byte	0x990
+	.4byte	0xdc9
+	.4byte	.LLST114
+	.uleb128 0x52
+	.4byte	.LASF650
+	.byte	0x2
+	.2byte	0x991
+	.4byte	0xdc9
+	.4byte	.LLST115
+	.uleb128 0x52
+	.4byte	.LASF651
+	.byte	0x2
+	.2byte	0x992
+	.4byte	0xdc9
+	.4byte	.LLST116
+	.uleb128 0x52
+	.4byte	.LASF652
+	.byte	0x2
+	.2byte	0x993
+	.4byte	0x1e2c
+	.4byte	.LLST117
+	.uleb128 0x52
+	.4byte	.LASF653
+	.byte	0x2
+	.2byte	0x994
+	.4byte	0xdc9
+	.4byte	.LLST118
+	.uleb128 0x52
+	.4byte	.LASF654
+	.byte	0x2
+	.2byte	0x995
+	.4byte	0xdc9
+	.4byte	.LLST119
+	.uleb128 0x51
+	.string	"i"
+	.byte	0x2
+	.2byte	0x996
+	.4byte	0xdd4
+	.4byte	.LLST120
+	.uleb128 0x45
+	.8byte	.LVL487
+	.4byte	0x3e01
+	.uleb128 0x45
+	.8byte	.LVL493
+	.4byte	0x3e62
+	.uleb128 0x36
+	.8byte	.LVL495
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC72
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF655
+	.byte	0x2
+	.2byte	0x979
+	.4byte	0xdc9
+	.8byte	.LFB295
+	.8byte	.LFE295-.LFB295
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3e62
+	.uleb128 0x50
+	.4byte	.LASF236
+	.byte	0x2
+	.2byte	0x979
+	.4byte	0xdc9
+	.4byte	.LLST103
+	.uleb128 0x52
+	.4byte	.LASF656
+	.byte	0x2
+	.2byte	0x97b
+	.4byte	0xdc9
+	.4byte	.LLST104
+	.uleb128 0x52
+	.4byte	.LASF608
+	.byte	0x2
+	.2byte	0x97c
+	.4byte	0xdc9
+	.4byte	.LLST105
+	.uleb128 0x51
+	.string	"i"
+	.byte	0x2
+	.2byte	0x97d
+	.4byte	0xdc9
+	.4byte	.LLST106
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF657
+	.byte	0x2
+	.2byte	0x970
+	.4byte	0xdc9
+	.8byte	.LFB294
+	.8byte	.LFE294-.LFB294
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3e95
+	.uleb128 0x52
+	.4byte	.LASF651
+	.byte	0x2
+	.2byte	0x972
+	.4byte	0xdc9
+	.4byte	.LLST102
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF658
+	.byte	0x2
+	.2byte	0x960
+	.4byte	0x5b
+	.8byte	.LFB293
+	.8byte	.LFE293-.LFB293
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3f1d
+	.uleb128 0x50
+	.4byte	.LASF623
+	.byte	0x2
+	.2byte	0x960
+	.4byte	0xdc9
+	.4byte	.LLST98
+	.uleb128 0x52
+	.4byte	.LASF592
+	.byte	0x2
+	.2byte	0x962
+	.4byte	0xdc9
+	.4byte	.LLST99
+	.uleb128 0x52
+	.4byte	.LASF594
+	.byte	0x2
+	.2byte	0x962
+	.4byte	0xdc9
+	.4byte	.LLST100
+	.uleb128 0x52
+	.4byte	.LASF375
+	.byte	0x2
+	.2byte	0x963
+	.4byte	0xdc9
+	.4byte	.LLST101
+	.uleb128 0x34
+	.8byte	.LVL295
+	.4byte	0x6d91
+	.4byte	0x3f0f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL296
+	.4byte	0x74e5
+	.byte	0
+	.uleb128 0x47
+	.4byte	.LASF659
+	.byte	0x2
+	.2byte	0x901
+	.4byte	0x5b
+	.byte	0x1
+	.4byte	0x3f47
+	.uleb128 0x4a
+	.string	"i"
+	.byte	0x2
+	.2byte	0x903
+	.4byte	0x5b
+	.uleb128 0x4d
+	.uleb128 0x49
+	.4byte	.LASF612
+	.byte	0x2
+	.2byte	0x928
+	.4byte	0x1f04
+	.byte	0
+	.byte	0
+	.uleb128 0x5d
+	.4byte	.LASF660
+	.byte	0x2
+	.2byte	0x8e2
+	.8byte	.LFB291
+	.8byte	.LFE291-.LFB291
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x404b
+	.uleb128 0x51
+	.string	"i"
+	.byte	0x2
+	.2byte	0x8e4
+	.4byte	0x5b
+	.4byte	.LLST249
+	.uleb128 0x5e
+	.string	"ppa"
+	.byte	0x2
+	.2byte	0x8e5
+	.4byte	0xdd4
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -4
+	.uleb128 0x52
+	.4byte	.LASF661
+	.byte	0x2
+	.2byte	0x8e6
+	.4byte	0x2d84
+	.4byte	.LLST250
+	.uleb128 0x34
+	.8byte	.LVL954
+	.4byte	0xa8ce
+	.4byte	0x3fb7
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC88
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL957
+	.4byte	0x5bbb
+	.4byte	0x3fdb
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 140
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL958
+	.4byte	0xa8ce
+	.4byte	0x4000
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC89
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL960
+	.4byte	0x29a4
+	.4byte	0x4029
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR108
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL961
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC90
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x5d
+	.4byte	.LASF662
+	.byte	0x2
+	.2byte	0x8ae
+	.8byte	.LFB290
+	.8byte	.LFE290-.LFB290
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x41cd
+	.uleb128 0x51
+	.string	"i"
+	.byte	0x2
+	.2byte	0x8b0
+	.4byte	0xdc9
+	.4byte	.LLST281
+	.uleb128 0x51
+	.string	"lpn"
+	.byte	0x2
+	.2byte	0x8b1
+	.4byte	0xdd4
+	.4byte	.LLST282
+	.uleb128 0x2a
+	.4byte	.LASF663
+	.byte	0x2
+	.2byte	0x8b2
+	.4byte	0xdd4
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -4
+	.uleb128 0x51
+	.string	"blk"
+	.byte	0x2
+	.2byte	0x8b3
+	.4byte	0xdc9
+	.4byte	.LLST283
+	.uleb128 0x52
+	.4byte	.LASF664
+	.byte	0x2
+	.2byte	0x8b4
+	.4byte	0xdc9
+	.4byte	.LLST284
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x41dd
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.7044
+	.uleb128 0x40
+	.4byte	.Ldebug_ranges0+0x180
+	.4byte	0x40fd
+	.uleb128 0x52
+	.4byte	.LASF236
+	.byte	0x2
+	.2byte	0x8d1
+	.4byte	0xdc9
+	.4byte	.LLST285
+	.uleb128 0x36
+	.8byte	.LVL1163
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1141
+	.4byte	0xa8ce
+	.4byte	0x4129
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC91
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR156
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1142
+	.4byte	0x259f
+	.4byte	0x414e
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x2000
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1150
+	.4byte	0xa8ce
+	.4byte	0x4181
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR156
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x8df
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1152
+	.4byte	0x5bbb
+	.4byte	0x41a5
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 188
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1153
+	.4byte	0x6cf6
+	.uleb128 0x36
+	.8byte	.LVL1157
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xee
+	.4byte	0x41dd
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0xd
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x41cd
+	.uleb128 0x5d
+	.4byte	.LASF665
+	.byte	0x2
+	.2byte	0x88f
+	.8byte	.LFB289
+	.8byte	.LFE289-.LFB289
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4316
+	.uleb128 0x51
+	.string	"i"
+	.byte	0x2
+	.2byte	0x891
+	.4byte	0xdc9
+	.4byte	.LLST386
+	.uleb128 0x51
+	.string	"lpn"
+	.byte	0x2
+	.2byte	0x892
+	.4byte	0xdd4
+	.4byte	.LLST387
+	.uleb128 0x2a
+	.4byte	.LASF663
+	.byte	0x2
+	.2byte	0x893
+	.4byte	0xdd4
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -4
+	.uleb128 0x51
+	.string	"blk"
+	.byte	0x2
+	.2byte	0x894
+	.4byte	0xdc9
+	.4byte	.LLST388
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x4326
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.7028
+	.uleb128 0x34
+	.8byte	.LVL1681
+	.4byte	0xa8ce
+	.4byte	0x427c
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC91
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR168
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1682
+	.4byte	0x259f
+	.4byte	0x4294
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1687
+	.4byte	0x5bbb
+	.4byte	0x42b8
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 156
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1688
+	.4byte	0x6cf6
+	.uleb128 0x34
+	.8byte	.LVL1692
+	.4byte	0xa8ce
+	.4byte	0x42e3
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1693
+	.4byte	0x3749
+	.4byte	0x42fb
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1694
+	.4byte	0x5ce8
+	.uleb128 0x45
+	.8byte	.LVL1695
+	.4byte	0x5619
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xee
+	.4byte	0x4326
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0x14
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x4316
+	.uleb128 0x5d
+	.4byte	.LASF666
+	.byte	0x2
+	.2byte	0x86b
+	.8byte	.LFB288
+	.8byte	.LFE288-.LFB288
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x43e3
+	.uleb128 0x50
+	.4byte	.LASF612
+	.byte	0x2
+	.2byte	0x86b
+	.4byte	0x1f04
+	.4byte	.LLST354
+	.uleb128 0x2a
+	.4byte	.LASF667
+	.byte	0x2
+	.2byte	0x86d
+	.4byte	0xdf5
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -32
+	.uleb128 0x52
+	.4byte	.LASF596
+	.byte	0x2
+	.2byte	0x86e
+	.4byte	0x2d84
+	.4byte	.LLST355
+	.uleb128 0x52
+	.4byte	.LASF668
+	.byte	0x2
+	.2byte	0x86f
+	.4byte	0x5b
+	.4byte	.LLST356
+	.uleb128 0x5f
+	.4byte	.LASF384
+	.byte	0x2
+	.2byte	0x870
+	.4byte	0xdd4
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1515
+	.4byte	0x3789
+	.4byte	0x43ad
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1518
+	.4byte	0x27e7
+	.4byte	0x43d5
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 112
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1519
+	.4byte	0x3645
+	.byte	0
+	.uleb128 0x5d
+	.4byte	.LASF669
+	.byte	0x2
+	.2byte	0x851
+	.8byte	.LFB287
+	.8byte	.LFE287-.LFB287
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4444
+	.uleb128 0x34
+	.8byte	.LVL1659
+	.4byte	0x5955
+	.4byte	0x4423
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL1660
+	.4byte	0x259f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x200
+	.byte	0
+	.byte	0
+	.uleb128 0x53
+	.4byte	.LASF671
+	.byte	0x2
+	.2byte	0x83d
+	.byte	0x1
+	.uleb128 0x46
+	.4byte	.LASF672
+	.byte	0x2
+	.2byte	0x812
+	.4byte	0x5b
+	.8byte	.LFB285
+	.8byte	.LFE285-.LFB285
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x457e
+	.uleb128 0x52
+	.4byte	.LASF649
+	.byte	0x2
+	.2byte	0x814
+	.4byte	0xdc9
+	.4byte	.LLST275
+	.uleb128 0x52
+	.4byte	.LASF592
+	.byte	0x2
+	.2byte	0x814
+	.4byte	0xdc9
+	.4byte	.LLST276
+	.uleb128 0x52
+	.4byte	.LASF594
+	.byte	0x2
+	.2byte	0x814
+	.4byte	0xdc9
+	.4byte	.LLST277
+	.uleb128 0x52
+	.4byte	.LASF375
+	.byte	0x2
+	.2byte	0x814
+	.4byte	0xdc9
+	.4byte	.LLST278
+	.uleb128 0x52
+	.4byte	.LASF673
+	.byte	0x2
+	.2byte	0x815
+	.4byte	0xdc9
+	.4byte	.LLST279
+	.uleb128 0x52
+	.4byte	.LASF674
+	.byte	0x2
+	.2byte	0x815
+	.4byte	0xdc9
+	.4byte	.LLST280
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x458e
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.7003
+	.uleb128 0x34
+	.8byte	.LVL1115
+	.4byte	0x259f
+	.4byte	0x44f9
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1119
+	.4byte	0x6d91
+	.4byte	0x4511
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1120
+	.4byte	0x74e5
+	.uleb128 0x34
+	.8byte	.LVL1127
+	.4byte	0x68e0
+	.4byte	0x4536
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1135
+	.4byte	0x68bb
+	.4byte	0x454e
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL1137
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR155
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x839
+	.byte	0
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xee
+	.4byte	0x458e
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0x11
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x457e
+	.uleb128 0x46
+	.4byte	.LASF675
+	.byte	0x2
+	.2byte	0x7fc
+	.4byte	0x5b
+	.8byte	.LFB284
+	.8byte	.LFE284-.LFB284
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x464b
+	.uleb128 0x5a
+	.string	"p"
+	.byte	0x2
+	.2byte	0x7fc
+	.4byte	0x1f04
+	.4byte	.LLST95
+	.uleb128 0x52
+	.4byte	.LASF592
+	.byte	0x2
+	.2byte	0x7fe
+	.4byte	0xdc9
+	.4byte	.LLST96
+	.uleb128 0x52
+	.4byte	.LASF594
+	.byte	0x2
+	.2byte	0x7fe
+	.4byte	0xdc9
+	.4byte	.LLST97
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x3784
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.6982
+	.uleb128 0x34
+	.8byte	.LVL278
+	.4byte	0xa8ce
+	.4byte	0x4629
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR61
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x800
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL282
+	.4byte	0x6d91
+	.uleb128 0x36
+	.8byte	.LVL284
+	.4byte	0x74e5
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF676
+	.byte	0x2
+	.2byte	0x7ef
+	.4byte	0x5b
+	.8byte	.LFB283
+	.8byte	.LFE283-.LFB283
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x46ef
+	.uleb128 0x34
+	.8byte	.LVL1802
+	.4byte	0x4715
+	.4byte	0x4685
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1803
+	.4byte	0x46ef
+	.4byte	0x469d
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1804
+	.4byte	0x4715
+	.4byte	0x46b5
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1805
+	.4byte	0x46ef
+	.4byte	0x46cd
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1806
+	.4byte	0x30c4
+	.uleb128 0x36
+	.8byte	.LVL1807
+	.4byte	0x3645
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x9
+	.byte	0xff
+	.byte	0
+	.byte	0
+	.uleb128 0x60
+	.4byte	.LASF712
+	.byte	0x2
+	.2byte	0x7dc
+	.byte	0x1
+	.4byte	0x4715
+	.uleb128 0x48
+	.4byte	.LASF639
+	.byte	0x2
+	.2byte	0x7dc
+	.4byte	0x1f04
+	.uleb128 0x49
+	.4byte	.LASF594
+	.byte	0x2
+	.2byte	0x7de
+	.4byte	0xdc9
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF677
+	.byte	0x2
+	.2byte	0x677
+	.4byte	0x5b
+	.8byte	.LFB281
+	.8byte	.LFE281-.LFB281
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4d12
+	.uleb128 0x50
+	.4byte	.LASF612
+	.byte	0x2
+	.2byte	0x677
+	.4byte	0x1f04
+	.4byte	.LLST329
+	.uleb128 0x52
+	.4byte	.LASF678
+	.byte	0x2
+	.2byte	0x679
+	.4byte	0xdc9
+	.4byte	.LLST330
+	.uleb128 0x52
+	.4byte	.LASF679
+	.byte	0x2
+	.2byte	0x679
+	.4byte	0xdc9
+	.4byte	.LLST331
+	.uleb128 0x52
+	.4byte	.LASF592
+	.byte	0x2
+	.2byte	0x67a
+	.4byte	0xdc9
+	.4byte	.LLST332
+	.uleb128 0x52
+	.4byte	.LASF382
+	.byte	0x2
+	.2byte	0x67a
+	.4byte	0xdc9
+	.4byte	.LLST333
+	.uleb128 0x52
+	.4byte	.LASF380
+	.byte	0x2
+	.2byte	0x67a
+	.4byte	0xdc9
+	.4byte	.LLST334
+	.uleb128 0x52
+	.4byte	.LASF680
+	.byte	0x2
+	.2byte	0x67b
+	.4byte	0xdc9
+	.4byte	.LLST335
+	.uleb128 0x52
+	.4byte	.LASF681
+	.byte	0x2
+	.2byte	0x67b
+	.4byte	0xdc9
+	.4byte	.LLST336
+	.uleb128 0x52
+	.4byte	.LASF594
+	.byte	0x2
+	.2byte	0x67c
+	.4byte	0xdc9
+	.4byte	.LLST337
+	.uleb128 0x52
+	.4byte	.LASF682
+	.byte	0x2
+	.2byte	0x67d
+	.4byte	0x5b
+	.4byte	.LLST338
+	.uleb128 0x52
+	.4byte	.LASF683
+	.byte	0x2
+	.2byte	0x67d
+	.4byte	0x5b
+	.4byte	.LLST338
+	.uleb128 0x52
+	.4byte	.LASF569
+	.byte	0x2
+	.2byte	0x67e
+	.4byte	0xdc9
+	.4byte	.LLST340
+	.uleb128 0x51
+	.string	"n"
+	.byte	0x2
+	.2byte	0x67e
+	.4byte	0xdc9
+	.4byte	.LLST341
+	.uleb128 0x51
+	.string	"req"
+	.byte	0x2
+	.2byte	0x67e
+	.4byte	0xdc9
+	.4byte	.LLST342
+	.uleb128 0x5e
+	.string	"lpa"
+	.byte	0x2
+	.2byte	0x67f
+	.4byte	0xdd4
+	.uleb128 0x1
+	.byte	0x68
+	.uleb128 0x2a
+	.4byte	.LASF663
+	.byte	0x2
+	.2byte	0x67f
+	.4byte	0xdd4
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -12
+	.uleb128 0x2a
+	.4byte	.LASF624
+	.byte	0x2
+	.2byte	0x67f
+	.4byte	0xdd4
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -8
+	.uleb128 0x2a
+	.4byte	.LASF614
+	.byte	0x2
+	.2byte	0x67f
+	.4byte	0xdd4
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -4
+	.uleb128 0x52
+	.4byte	.LASF629
+	.byte	0x2
+	.2byte	0x680
+	.4byte	0xdc9
+	.4byte	.LLST343
+	.uleb128 0x52
+	.4byte	.LASF684
+	.byte	0x2
+	.2byte	0x680
+	.4byte	0xdc9
+	.4byte	.LLST344
+	.uleb128 0x52
+	.4byte	.LASF685
+	.byte	0x2
+	.2byte	0x681
+	.4byte	0xdd4
+	.4byte	.LLST345
+	.uleb128 0x52
+	.4byte	.LASF686
+	.byte	0x2
+	.2byte	0x682
+	.4byte	0xdc9
+	.4byte	.LLST346
+	.uleb128 0x52
+	.4byte	.LASF596
+	.byte	0x2
+	.2byte	0x683
+	.4byte	0x2d84
+	.4byte	.LLST347
+	.uleb128 0x5f
+	.4byte	.LASF687
+	.byte	0x2
+	.2byte	0x684
+	.4byte	0xdd4
+	.byte	0
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x4d22
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.6925
+	.uleb128 0x56
+	.4byte	.LASF689
+	.byte	0x2
+	.2byte	0x713
+	.8byte	.L1031
+	.uleb128 0x56
+	.4byte	.LASF618
+	.byte	0x2
+	.2byte	0x71b
+	.8byte	.L1046
+	.uleb128 0x56
+	.4byte	.LASF690
+	.byte	0x2
+	.2byte	0x7ce
+	.8byte	.L1052
+	.uleb128 0x4b
+	.4byte	.LASF691
+	.byte	0x2
+	.2byte	0x7d8
+	.uleb128 0x40
+	.4byte	.Ldebug_ranges0+0x220
+	.4byte	0x4935
+	.uleb128 0x52
+	.4byte	.LASF692
+	.byte	0x2
+	.2byte	0x6eb
+	.4byte	0xdd4
+	.4byte	.LLST348
+	.uleb128 0x52
+	.4byte	.LASF693
+	.byte	0x2
+	.2byte	0x6ec
+	.4byte	0xdd4
+	.4byte	.LLST349
+	.uleb128 0x36
+	.8byte	.LVL1428
+	.4byte	0x29a4
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x40
+	.4byte	.Ldebug_ranges0+0x250
+	.4byte	0x4a30
+	.uleb128 0x52
+	.4byte	.LASF694
+	.byte	0x2
+	.2byte	0x746
+	.4byte	0xdd4
+	.4byte	.LLST350
+	.uleb128 0x52
+	.4byte	.LASF695
+	.byte	0x2
+	.2byte	0x747
+	.4byte	0xdd4
+	.4byte	.LLST351
+	.uleb128 0x34
+	.8byte	.LVL1471
+	.4byte	0x29a4
+	.4byte	0x497a
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1473
+	.4byte	0x3645
+	.uleb128 0x34
+	.8byte	.LVL1479
+	.4byte	0x5bbb
+	.4byte	0x49ab
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 340
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1482
+	.4byte	0x6ca7
+	.4byte	0x49c6
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x8f
+	.sleb128 296
+	.byte	0x94
+	.byte	0x4
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1483
+	.4byte	0x4d27
+	.4byte	0x49de
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1485
+	.4byte	0x29a4
+	.4byte	0x49fa
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1488
+	.4byte	0x6ca7
+	.4byte	0x4a12
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x73
+	.sleb128 0
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL1489
+	.4byte	0x6ca7
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x8f
+	.sleb128 296
+	.byte	0x94
+	.byte	0x4
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x73
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x61
+	.8byte	.LBB271
+	.8byte	.LBE271-.LBB271
+	.4byte	0x4aba
+	.uleb128 0x52
+	.4byte	.LASF696
+	.byte	0x2
+	.2byte	0x785
+	.4byte	0xdd4
+	.4byte	.LLST352
+	.uleb128 0x52
+	.4byte	.LASF695
+	.byte	0x2
+	.2byte	0x786
+	.4byte	0xdd4
+	.4byte	.LLST353
+	.uleb128 0x34
+	.8byte	.LVL1497
+	.4byte	0x29a4
+	.4byte	0x4a81
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1498
+	.4byte	0x6ca7
+	.4byte	0x4a99
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL1499
+	.4byte	0x5bbb
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 344
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1376
+	.4byte	0x6bca
+	.4byte	0x4ad1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1381
+	.4byte	0x29a4
+	.4byte	0x4aee
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1386
+	.4byte	0x6d36
+	.uleb128 0x34
+	.8byte	.LVL1389
+	.4byte	0x4e68
+	.4byte	0x4b1f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1397
+	.4byte	0xa8ce
+	.4byte	0x4b52
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR161
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x6aa
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1398
+	.4byte	0xa8ce
+	.4byte	0x4b85
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR161
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x6ab
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1407
+	.4byte	0x6ca7
+	.4byte	0x4b9d
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1433
+	.4byte	0x5814
+	.4byte	0x4bbc
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR144
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1436
+	.4byte	0x29a4
+	.4byte	0x4bd9
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1457
+	.4byte	0x6d36
+	.4byte	0x4bf3
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x75
+	.sleb128 0
+	.byte	0x3a
+	.byte	0x25
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1464
+	.4byte	0x3645
+	.uleb128 0x34
+	.8byte	.LVL1467
+	.4byte	0x6ca7
+	.4byte	0x4c18
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1468
+	.4byte	0x5bbb
+	.4byte	0x4c3c
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 344
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1469
+	.4byte	0x6ca7
+	.4byte	0x4c54
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1474
+	.4byte	0x6cf6
+	.4byte	0x4c6e
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x73
+	.sleb128 0
+	.byte	0x3a
+	.byte	0x25
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1476
+	.4byte	0xa8ce
+	.4byte	0x4ca1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR161
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x7a5
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1491
+	.4byte	0x5bbb
+	.4byte	0x4cc5
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 348
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1492
+	.4byte	0x6cf6
+	.4byte	0x4cdf
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x73
+	.sleb128 0
+	.byte	0x3a
+	.byte	0x25
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1501
+	.4byte	0xa8ce
+	.4byte	0x4d04
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC99
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1503
+	.4byte	0x3645
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xee
+	.4byte	0x4d22
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0x15
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x4d12
+	.uleb128 0x5d
+	.4byte	.LASF697
+	.byte	0x2
+	.2byte	0x65b
+	.8byte	.LFB280
+	.8byte	.LFE280-.LFB280
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4e68
+	.uleb128 0x5a
+	.string	"lpa"
+	.byte	0x2
+	.2byte	0x65b
+	.4byte	0xdd4
+	.4byte	.LLST243
+	.uleb128 0x50
+	.4byte	.LASF663
+	.byte	0x2
+	.2byte	0x65b
+	.4byte	0xdd4
+	.4byte	.LLST244
+	.uleb128 0x52
+	.4byte	.LASF629
+	.byte	0x2
+	.2byte	0x65d
+	.4byte	0xdc9
+	.4byte	.LLST245
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x3784
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.6891
+	.uleb128 0x40
+	.4byte	.Ldebug_ranges0+0x100
+	.4byte	0x4e2c
+	.uleb128 0x51
+	.string	"i"
+	.byte	0x2
+	.2byte	0x661
+	.4byte	0xdc9
+	.4byte	.LLST246
+	.uleb128 0x52
+	.4byte	.LASF608
+	.byte	0x2
+	.2byte	0x662
+	.4byte	0xdc9
+	.4byte	.LLST247
+	.uleb128 0x52
+	.4byte	.LASF236
+	.byte	0x2
+	.2byte	0x663
+	.4byte	0xdc9
+	.4byte	.LLST248
+	.uleb128 0x34
+	.8byte	.LVL942
+	.4byte	0x66e6
+	.4byte	0x4de4
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR47
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL943
+	.4byte	0xa8ce
+	.4byte	0x4e17
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR146
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x667
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL944
+	.4byte	0x68bb
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL936
+	.4byte	0x6cf6
+	.4byte	0x4e47
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x3a
+	.byte	0x25
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL946
+	.4byte	0x5bbb
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 124
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x5d
+	.4byte	.LASF698
+	.byte	0x2
+	.2byte	0x647
+	.8byte	.LFB279
+	.8byte	.LFE279-.LFB279
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4ec5
+	.uleb128 0x62
+	.4byte	.LASF612
+	.byte	0x2
+	.2byte	0x647
+	.4byte	0x1f04
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x50
+	.4byte	.LASF380
+	.byte	0x2
+	.2byte	0x647
+	.4byte	0xdc9
+	.4byte	.LLST90
+	.uleb128 0x50
+	.4byte	.LASF382
+	.byte	0x2
+	.2byte	0x647
+	.4byte	0xdc9
+	.4byte	.LLST91
+	.uleb128 0x52
+	.4byte	.LASF592
+	.byte	0x2
+	.2byte	0x649
+	.4byte	0xdc9
+	.4byte	.LLST92
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF699
+	.byte	0x2
+	.2byte	0x63e
+	.4byte	0x5b
+	.8byte	.LFB278
+	.8byte	.LFE278-.LFB278
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4f10
+	.uleb128 0x45
+	.8byte	.LVL1106
+	.4byte	0x4f10
+	.uleb128 0x36
+	.8byte	.LVL1107
+	.4byte	0x4fa8
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR144
+	.byte	0
+	.byte	0
+	.uleb128 0x5d
+	.4byte	.LASF700
+	.byte	0x2
+	.2byte	0x627
+	.8byte	.LFB277
+	.8byte	.LFE277-.LFB277
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4f6a
+	.uleb128 0x52
+	.4byte	.LASF330
+	.byte	0x2
+	.2byte	0x629
+	.4byte	0xdc9
+	.4byte	.LLST274
+	.uleb128 0x34
+	.8byte	.LVL1103
+	.4byte	0x259f
+	.4byte	0x4f55
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL1104
+	.4byte	0x259f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF701
+	.byte	0x2
+	.2byte	0x617
+	.4byte	0x5b
+	.8byte	.LFB276
+	.8byte	.LFE276-.LFB276
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4fa8
+	.uleb128 0x36
+	.8byte	.LVL1102
+	.4byte	0x4fa8
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR149
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF702
+	.byte	0x2
+	.2byte	0x5b9
+	.4byte	0x5b
+	.8byte	.LFB275
+	.8byte	.LFE275-.LFB275
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x517a
+	.uleb128 0x50
+	.4byte	.LASF703
+	.byte	0x2
+	.2byte	0x5b9
+	.4byte	0x517a
+	.4byte	.LLST263
+	.uleb128 0x52
+	.4byte	.LASF704
+	.byte	0x2
+	.2byte	0x5bb
+	.4byte	0xdea
+	.4byte	.LLST264
+	.uleb128 0x52
+	.4byte	.LASF299
+	.byte	0x2
+	.2byte	0x5bb
+	.4byte	0xdea
+	.4byte	.LLST265
+	.uleb128 0x52
+	.4byte	.LASF705
+	.byte	0x2
+	.2byte	0x5bc
+	.4byte	0xdea
+	.4byte	.LLST266
+	.uleb128 0x52
+	.4byte	.LASF330
+	.byte	0x2
+	.2byte	0x5bd
+	.4byte	0xdc9
+	.4byte	.LLST267
+	.uleb128 0x52
+	.4byte	.LASF706
+	.byte	0x2
+	.2byte	0x5be
+	.4byte	0x1001
+	.4byte	.LLST268
+	.uleb128 0x52
+	.4byte	.LASF310
+	.byte	0x2
+	.2byte	0x5bf
+	.4byte	0x10f8
+	.4byte	.LLST269
+	.uleb128 0x52
+	.4byte	.LASF311
+	.byte	0x2
+	.2byte	0x5c0
+	.4byte	0x1001
+	.4byte	.LLST270
+	.uleb128 0x52
+	.4byte	.LASF307
+	.byte	0x2
+	.2byte	0x5c1
+	.4byte	0xdc9
+	.4byte	.LLST271
+	.uleb128 0x52
+	.4byte	.LASF707
+	.byte	0x2
+	.2byte	0x5c2
+	.4byte	0xdc9
+	.4byte	.LLST272
+	.uleb128 0x52
+	.4byte	.LASF708
+	.byte	0x2
+	.2byte	0x5c3
+	.4byte	0x5180
+	.4byte	.LLST273
+	.uleb128 0x34
+	.8byte	.LVL1062
+	.4byte	0x259f
+	.4byte	0x50a0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x4
+	.byte	0x87
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1067
+	.4byte	0x6bca
+	.4byte	0x50b7
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1072
+	.4byte	0x62df
+	.4byte	0x50cf
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1073
+	.4byte	0x6287
+	.4byte	0x50e7
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1074
+	.4byte	0x610d
+	.4byte	0x50ff
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1075
+	.4byte	0x610d
+	.4byte	0x5117
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1083
+	.4byte	0x29a4
+	.4byte	0x5139
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1087
+	.4byte	0x29a4
+	.4byte	0x515b
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL1089
+	.4byte	0x29a4
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x104f
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x1280
+	.uleb128 0x46
+	.4byte	.LASF709
+	.byte	0x2
+	.2byte	0x54f
+	.4byte	0x5b
+	.8byte	.LFB274
+	.8byte	.LFE274-.LFB274
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5365
+	.uleb128 0x52
+	.4byte	.LASF705
+	.byte	0x2
+	.2byte	0x551
+	.4byte	0xdea
+	.4byte	.LLST461
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x299f
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.6828
+	.uleb128 0x34
+	.8byte	.LVL2076
+	.4byte	0x259f
+	.4byte	0x51e2
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2077
+	.4byte	0x6bca
+	.4byte	0x51f9
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2079
+	.4byte	0xa8ce
+	.4byte	0x522c
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR181
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x56c
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2080
+	.4byte	0xa8ce
+	.4byte	0x525f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR181
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x56e
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2082
+	.4byte	0x2527
+	.4byte	0x527d
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL2083
+	.4byte	0x2527
+	.uleb128 0x45
+	.8byte	.LVL2084
+	.4byte	0x2527
+	.uleb128 0x34
+	.8byte	.LVL2085
+	.4byte	0xa8ce
+	.4byte	0x52ca
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR181
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x584
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2086
+	.4byte	0x4593
+	.4byte	0x52e9
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR51
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2087
+	.4byte	0x4593
+	.4byte	0x5308
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR52
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2088
+	.4byte	0x4593
+	.4byte	0x5327
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR53
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2089
+	.4byte	0x4593
+	.4byte	0x5346
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR82
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL2091
+	.4byte	0x29a4
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF710
+	.byte	0x2
+	.2byte	0x54a
+	.4byte	0x5b
+	.8byte	.LFB273
+	.8byte	.LFE273-.LFB273
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5398
+	.uleb128 0x50
+	.4byte	.LASF711
+	.byte	0x2
+	.2byte	0x54a
+	.4byte	0xdc9
+	.4byte	.LLST89
+	.byte	0
+	.uleb128 0x60
+	.4byte	.LASF713
+	.byte	0x2
+	.2byte	0x542
+	.byte	0x1
+	.4byte	0x53be
+	.uleb128 0x48
+	.4byte	.LASF711
+	.byte	0x2
+	.2byte	0x542
+	.4byte	0xdc9
+	.uleb128 0x48
+	.4byte	.LASF588
+	.byte	0x2
+	.2byte	0x542
+	.4byte	0x5b
+	.byte	0
+	.uleb128 0x4f
+	.4byte	.LASF715
+	.byte	0x2
+	.2byte	0x535
+	.4byte	0x5b
+	.byte	0x1
+	.uleb128 0x46
+	.4byte	.LASF716
+	.byte	0x2
+	.2byte	0x446
+	.4byte	0x5b
+	.8byte	.LFB270
+	.8byte	.LFE270-.LFB270
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5619
+	.uleb128 0x52
+	.4byte	.LASF592
+	.byte	0x2
+	.2byte	0x448
+	.4byte	0xdc9
+	.4byte	.LLST256
+	.uleb128 0x52
+	.4byte	.LASF717
+	.byte	0x2
+	.2byte	0x448
+	.4byte	0xdc9
+	.4byte	.LLST257
+	.uleb128 0x52
+	.4byte	.LASF388
+	.byte	0x2
+	.2byte	0x449
+	.4byte	0xdc9
+	.4byte	.LLST258
+	.uleb128 0x52
+	.4byte	.LASF569
+	.byte	0x2
+	.2byte	0x449
+	.4byte	0xdc9
+	.4byte	.LLST259
+	.uleb128 0x51
+	.string	"i"
+	.byte	0x2
+	.2byte	0x44a
+	.4byte	0xdea
+	.4byte	.LLST260
+	.uleb128 0x51
+	.string	"j"
+	.byte	0x2
+	.2byte	0x44a
+	.4byte	0xdea
+	.4byte	.LLST261
+	.uleb128 0x52
+	.4byte	.LASF718
+	.byte	0x2
+	.2byte	0x44b
+	.4byte	0x5180
+	.4byte	.LLST262
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x41dd
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.6771
+	.uleb128 0x34
+	.8byte	.LVL984
+	.4byte	0x259f
+	.4byte	0x5483
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL985
+	.4byte	0x259f
+	.4byte	0x549a
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL986
+	.4byte	0x259f
+	.4byte	0x54b1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL987
+	.4byte	0x259f
+	.4byte	0x54c8
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL988
+	.4byte	0x259f
+	.4byte	0x54f2
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR81
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x3c
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL991
+	.4byte	0x6d91
+	.4byte	0x550d
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x8f
+	.sleb128 332
+	.byte	0x94
+	.byte	0x2
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL993
+	.4byte	0x74e5
+	.4byte	0x5525
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1002
+	.4byte	0x29a4
+	.4byte	0x5542
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1007
+	.4byte	0x29a4
+	.4byte	0x555e
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1012
+	.4byte	0x6a7f
+	.4byte	0x5576
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1013
+	.4byte	0xa8ce
+	.4byte	0x55a4
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x8f
+	.sleb128 296
+	.byte	0x6
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x48a
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1024
+	.4byte	0xa8ce
+	.4byte	0x55d2
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x8f
+	.sleb128 296
+	.byte	0x6
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x4b3
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1035
+	.4byte	0x6a7f
+	.4byte	0x55e9
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL1037
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR148
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x530
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF719
+	.byte	0x2
+	.2byte	0x3eb
+	.4byte	0x5b
+	.8byte	.LFB269
+	.8byte	.LFE269-.LFB269
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x57c2
+	.uleb128 0x52
+	.4byte	.LASF300
+	.byte	0x2
+	.2byte	0x3ed
+	.4byte	0xdc9
+	.4byte	.LLST383
+	.uleb128 0x52
+	.4byte	.LASF720
+	.byte	0x2
+	.2byte	0x3ee
+	.4byte	0x57c2
+	.4byte	.LLST384
+	.uleb128 0x52
+	.4byte	.LASF721
+	.byte	0x2
+	.2byte	0x3ef
+	.4byte	0xdc9
+	.4byte	.LLST385
+	.uleb128 0x4b
+	.4byte	.LASF722
+	.byte	0x2
+	.2byte	0x41c
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x299f
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.6749
+	.uleb128 0x34
+	.8byte	.LVL1663
+	.4byte	0x259f
+	.4byte	0x569e
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1664
+	.4byte	0x2527
+	.4byte	0x56c3
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR79
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1665
+	.4byte	0x2527
+	.uleb128 0x45
+	.8byte	.LVL1666
+	.4byte	0x2527
+	.uleb128 0x34
+	.8byte	.LVL1667
+	.4byte	0x58c9
+	.4byte	0x56f5
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1669
+	.4byte	0x27e7
+	.4byte	0x571c
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8c
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1671
+	.4byte	0x6905
+	.uleb128 0x34
+	.8byte	.LVL1672
+	.4byte	0x27e7
+	.4byte	0x5750
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8c
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1673
+	.4byte	0xa8ce
+	.4byte	0x5783
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR167
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x433
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1676
+	.4byte	0xa8ce
+	.4byte	0x57a8
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC101
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL1677
+	.4byte	0x6a7f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x12d8
+	.uleb128 0x60
+	.4byte	.LASF723
+	.byte	0x2
+	.2byte	0x3b2
+	.byte	0x1
+	.4byte	0x5814
+	.uleb128 0x4d
+	.uleb128 0x4a
+	.string	"lpa"
+	.byte	0x2
+	.2byte	0x3b7
+	.4byte	0xdd4
+	.uleb128 0x4a
+	.string	"ppa"
+	.byte	0x2
+	.2byte	0x3b8
+	.4byte	0xdd4
+	.uleb128 0x49
+	.4byte	.LASF724
+	.byte	0x2
+	.2byte	0x3b9
+	.4byte	0xdd4
+	.uleb128 0x49
+	.4byte	.LASF667
+	.byte	0x2
+	.2byte	0x3ba
+	.4byte	0xdf5
+	.uleb128 0x49
+	.4byte	.LASF596
+	.byte	0x2
+	.2byte	0x3bb
+	.4byte	0x2d84
+	.byte	0
+	.byte	0
+	.uleb128 0x5d
+	.4byte	.LASF725
+	.byte	0x2
+	.2byte	0x380
+	.8byte	.LFB267
+	.8byte	.LFE267-.LFB267
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x58c9
+	.uleb128 0x50
+	.4byte	.LASF703
+	.byte	0x2
+	.2byte	0x380
+	.4byte	0x517a
+	.4byte	.LLST252
+	.uleb128 0x51
+	.string	"ppa"
+	.byte	0x2
+	.2byte	0x382
+	.4byte	0xdd4
+	.4byte	.LLST253
+	.uleb128 0x52
+	.4byte	.LASF317
+	.byte	0x2
+	.2byte	0x383
+	.4byte	0xdc9
+	.4byte	.LLST254
+	.uleb128 0x52
+	.4byte	.LASF706
+	.byte	0x2
+	.2byte	0x384
+	.4byte	0x1001
+	.4byte	.LLST255
+	.uleb128 0x34
+	.8byte	.LVL978
+	.4byte	0x29a4
+	.4byte	0x589b
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR108
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.8byte	.LVL980
+	.4byte	0x5e2b
+	.4byte	0x58b4
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL982
+	.4byte	0x259f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.byte	0
+	.uleb128 0x60
+	.4byte	.LASF726
+	.byte	0x2
+	.2byte	0x371
+	.byte	0x1
+	.4byte	0x58ed
+	.uleb128 0x48
+	.4byte	.LASF393
+	.byte	0x2
+	.2byte	0x371
+	.4byte	0xdd4
+	.uleb128 0x4a
+	.string	"i"
+	.byte	0x2
+	.2byte	0x373
+	.4byte	0xdc9
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF727
+	.byte	0x2
+	.2byte	0x35c
+	.4byte	0x5b
+	.8byte	.LFB265
+	.8byte	.LFE265-.LFB265
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5955
+	.uleb128 0x50
+	.4byte	.LASF728
+	.byte	0x2
+	.2byte	0x35c
+	.4byte	0xdd4
+	.4byte	.LLST373
+	.uleb128 0x52
+	.4byte	.LASF729
+	.byte	0x2
+	.2byte	0x35e
+	.4byte	0xdd4
+	.4byte	.LLST374
+	.uleb128 0x34
+	.8byte	.LVL1625
+	.4byte	0x5a7d
+	.4byte	0x5947
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x40
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1626
+	.4byte	0x4444
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF730
+	.byte	0x2
+	.2byte	0x336
+	.4byte	0xdd4
+	.8byte	.LFB264
+	.8byte	.LFE264-.LFB264
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5a77
+	.uleb128 0x50
+	.4byte	.LASF731
+	.byte	0x2
+	.2byte	0x336
+	.4byte	0xdd4
+	.4byte	.LLST375
+	.uleb128 0x50
+	.4byte	.LASF732
+	.byte	0x2
+	.2byte	0x336
+	.4byte	0xdd4
+	.4byte	.LLST376
+	.uleb128 0x50
+	.4byte	.LASF733
+	.byte	0x2
+	.2byte	0x336
+	.4byte	0x5a77
+	.4byte	.LLST377
+	.uleb128 0x51
+	.string	"len"
+	.byte	0x2
+	.2byte	0x338
+	.4byte	0xdc9
+	.4byte	.LLST378
+	.uleb128 0x52
+	.4byte	.LASF734
+	.byte	0x2
+	.2byte	0x338
+	.4byte	0xdc9
+	.4byte	.LLST379
+	.uleb128 0x51
+	.string	"ppn"
+	.byte	0x2
+	.2byte	0x339
+	.4byte	0xdd4
+	.4byte	.LLST380
+	.uleb128 0x52
+	.4byte	.LASF735
+	.byte	0x2
+	.2byte	0x33a
+	.4byte	0xdd4
+	.4byte	.LLST381
+	.uleb128 0x5e
+	.string	"req"
+	.byte	0x2
+	.2byte	0x33b
+	.4byte	0xdf5
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -96
+	.uleb128 0x52
+	.4byte	.LASF736
+	.byte	0x2
+	.2byte	0x33c
+	.4byte	0xdd4
+	.4byte	.LLST382
+	.uleb128 0x2a
+	.4byte	.LASF565
+	.byte	0x2
+	.2byte	0x33d
+	.4byte	0x2711
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -64
+	.uleb128 0x34
+	.8byte	.LVL1645
+	.4byte	0x29a4
+	.4byte	0x5a39
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 208
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1647
+	.4byte	0x2527
+	.4byte	0x5a57
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8c
+	.sleb128 0
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL1654
+	.4byte	0x259f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8c
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0xdbe
+	.uleb128 0x46
+	.4byte	.LASF737
+	.byte	0x2
+	.2byte	0x311
+	.4byte	0xdd4
+	.8byte	.LFB263
+	.8byte	.LFE263-.LFB263
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5bbb
+	.uleb128 0x50
+	.4byte	.LASF731
+	.byte	0x2
+	.2byte	0x311
+	.4byte	0xdd4
+	.4byte	.LLST365
+	.uleb128 0x50
+	.4byte	.LASF732
+	.byte	0x2
+	.2byte	0x311
+	.4byte	0xdd4
+	.4byte	.LLST366
+	.uleb128 0x50
+	.4byte	.LASF733
+	.byte	0x2
+	.2byte	0x311
+	.4byte	0x5a77
+	.4byte	.LLST367
+	.uleb128 0x51
+	.string	"len"
+	.byte	0x2
+	.2byte	0x313
+	.4byte	0xdc9
+	.4byte	.LLST368
+	.uleb128 0x52
+	.4byte	.LASF734
+	.byte	0x2
+	.2byte	0x313
+	.4byte	0xdc9
+	.4byte	.LLST369
+	.uleb128 0x51
+	.string	"ppn"
+	.byte	0x2
+	.2byte	0x314
+	.4byte	0xdd4
+	.4byte	.LLST370
+	.uleb128 0x52
+	.4byte	.LASF735
+	.byte	0x2
+	.2byte	0x315
+	.4byte	0xdd4
+	.4byte	.LLST371
+	.uleb128 0x5e
+	.string	"req"
+	.byte	0x2
+	.2byte	0x316
+	.4byte	0xdf5
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -96
+	.uleb128 0x52
+	.4byte	.LASF736
+	.byte	0x2
+	.2byte	0x317
+	.4byte	0xdd4
+	.4byte	.LLST372
+	.uleb128 0x2a
+	.4byte	.LASF565
+	.byte	0x2
+	.2byte	0x318
+	.4byte	0x2711
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -64
+	.uleb128 0x34
+	.8byte	.LVL1606
+	.4byte	0x29a4
+	.4byte	0x5b61
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 208
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1608
+	.4byte	0x2527
+	.4byte	0x5b82
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x5
+	.byte	0x8f
+	.sleb128 204
+	.byte	0x94
+	.byte	0x4
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1612
+	.4byte	0x5e2b
+	.4byte	0x5ba7
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR149
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 -1
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL1617
+	.4byte	0x259f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF738
+	.byte	0x2
+	.2byte	0x2f0
+	.4byte	0x5b
+	.8byte	.LFB262
+	.8byte	.LFE262-.LFB262
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5cd3
+	.uleb128 0x5a
+	.string	"lpn"
+	.byte	0x2
+	.2byte	0x2f0
+	.4byte	0xdd4
+	.4byte	.LLST237
+	.uleb128 0x5a
+	.string	"ppn"
+	.byte	0x2
+	.2byte	0x2f0
+	.4byte	0x1001
+	.4byte	.LLST238
+	.uleb128 0x50
+	.4byte	.LASF739
+	.byte	0x2
+	.2byte	0x2f0
+	.4byte	0x5b
+	.4byte	.LLST239
+	.uleb128 0x52
+	.4byte	.LASF740
+	.byte	0x2
+	.2byte	0x2f2
+	.4byte	0xdc9
+	.4byte	.LLST240
+	.uleb128 0x52
+	.4byte	.LASF741
+	.byte	0x2
+	.2byte	0x2f2
+	.4byte	0xdc9
+	.4byte	.LLST241
+	.uleb128 0x52
+	.4byte	.LASF742
+	.byte	0x2
+	.2byte	0x2f2
+	.4byte	0xdc9
+	.4byte	.LLST242
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x5ce3
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.6676
+	.uleb128 0x56
+	.4byte	.LASF743
+	.byte	0x2
+	.2byte	0x2fb
+	.8byte	.L656
+	.uleb128 0x34
+	.8byte	.LVL920
+	.4byte	0xa8ce
+	.4byte	0x5c93
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR145
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x2f7
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL923
+	.4byte	0x5d3a
+	.uleb128 0x34
+	.8byte	.LVL925
+	.4byte	0x5dcd
+	.4byte	0x5cb8
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL926
+	.4byte	0x63c2
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xee
+	.4byte	0x5ce3
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0x8
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x5cd3
+	.uleb128 0x46
+	.4byte	.LASF744
+	.byte	0x2
+	.2byte	0x2e3
+	.4byte	0x5b
+	.8byte	.LFB261
+	.8byte	.LFE261-.LFB261
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5d3a
+	.uleb128 0x51
+	.string	"i"
+	.byte	0x2
+	.2byte	0x2e5
+	.4byte	0xdc9
+	.4byte	.LLST328
+	.uleb128 0x45
+	.8byte	.LVL1361
+	.4byte	0x57c8
+	.uleb128 0x36
+	.8byte	.LVL1364
+	.4byte	0x5dcd
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF745
+	.byte	0x2
+	.2byte	0x2bb
+	.4byte	0xdc9
+	.8byte	.LFB260
+	.8byte	.LFE260-.LFB260
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5dcd
+	.uleb128 0x51
+	.string	"i"
+	.byte	0x2
+	.2byte	0x2bd
+	.4byte	0xdc9
+	.4byte	.LLST83
+	.uleb128 0x52
+	.4byte	.LASF746
+	.byte	0x2
+	.2byte	0x2be
+	.4byte	0xdc9
+	.4byte	.LLST84
+	.uleb128 0x52
+	.4byte	.LASF747
+	.byte	0x2
+	.2byte	0x2bf
+	.4byte	0xdd4
+	.4byte	.LLST85
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x4d22
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.6659
+	.uleb128 0x36
+	.8byte	.LVL237
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR58
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x2df
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF748
+	.byte	0x2
+	.2byte	0x2b1
+	.4byte	0x5b
+	.8byte	.LFB259
+	.8byte	.LFE259-.LFB259
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5e2b
+	.uleb128 0x50
+	.4byte	.LASF740
+	.byte	0x2
+	.2byte	0x2b1
+	.4byte	0xdc9
+	.4byte	.LLST235
+	.uleb128 0x52
+	.4byte	.LASF317
+	.byte	0x2
+	.2byte	0x2b3
+	.4byte	0xdd4
+	.4byte	.LLST236
+	.uleb128 0x36
+	.8byte	.LVL913
+	.4byte	0x5e2b
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR144
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF749
+	.byte	0x2
+	.2byte	0x276
+	.4byte	0x5b
+	.8byte	.LFB258
+	.8byte	.LFE258-.LFB258
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5fbc
+	.uleb128 0x50
+	.4byte	.LASF703
+	.byte	0x2
+	.2byte	0x276
+	.4byte	0x517a
+	.4byte	.LLST222
+	.uleb128 0x50
+	.4byte	.LASF317
+	.byte	0x2
+	.2byte	0x276
+	.4byte	0xdd4
+	.4byte	.LLST223
+	.uleb128 0x50
+	.4byte	.LASF733
+	.byte	0x2
+	.2byte	0x276
+	.4byte	0x1001
+	.4byte	.LLST224
+	.uleb128 0x52
+	.4byte	.LASF388
+	.byte	0x2
+	.2byte	0x278
+	.4byte	0xdd4
+	.4byte	.LLST225
+	.uleb128 0x52
+	.4byte	.LASF708
+	.byte	0x2
+	.2byte	0x279
+	.4byte	0x5180
+	.4byte	.LLST226
+	.uleb128 0x52
+	.4byte	.LASF721
+	.byte	0x2
+	.2byte	0x27a
+	.4byte	0xdc9
+	.4byte	.LLST227
+	.uleb128 0x4b
+	.4byte	.LASF750
+	.byte	0x2
+	.2byte	0x27c
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x3784
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.6634
+	.uleb128 0x34
+	.8byte	.LVL871
+	.4byte	0x5fbc
+	.4byte	0x5ee0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL872
+	.4byte	0xa8ce
+	.4byte	0x5f0c
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x28a
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL873
+	.4byte	0xa8ce
+	.4byte	0x5f38
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x28b
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL875
+	.4byte	0x259f
+	.4byte	0x5f54
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x40
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL878
+	.4byte	0x27e7
+	.4byte	0x5f7b
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL880
+	.4byte	0xa8ce
+	.4byte	0x5f9a
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC86
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL881
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC87
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF751
+	.byte	0x2
+	.2byte	0x246
+	.4byte	0x5b
+	.8byte	.LFB257
+	.8byte	.LFE257-.LFB257
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x60f8
+	.uleb128 0x50
+	.4byte	.LASF703
+	.byte	0x2
+	.2byte	0x246
+	.4byte	0x517a
+	.4byte	.LLST216
+	.uleb128 0x49
+	.4byte	.LASF388
+	.byte	0x2
+	.2byte	0x248
+	.4byte	0xdc9
+	.uleb128 0x52
+	.4byte	.LASF330
+	.byte	0x2
+	.2byte	0x248
+	.4byte	0xdc9
+	.4byte	.LLST217
+	.uleb128 0x52
+	.4byte	.LASF752
+	.byte	0x2
+	.2byte	0x249
+	.4byte	0xdc9
+	.4byte	.LLST218
+	.uleb128 0x52
+	.4byte	.LASF753
+	.byte	0x2
+	.2byte	0x24a
+	.4byte	0x10f8
+	.4byte	.LLST219
+	.uleb128 0x52
+	.4byte	.LASF706
+	.byte	0x2
+	.2byte	0x24b
+	.4byte	0x1001
+	.4byte	.LLST220
+	.uleb128 0x52
+	.4byte	.LASF708
+	.byte	0x2
+	.2byte	0x24c
+	.4byte	0x5180
+	.4byte	.LLST221
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x6108
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.6620
+	.uleb128 0x34
+	.8byte	.LVL850
+	.4byte	0xa8ce
+	.4byte	0x6090
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR141
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x250
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL851
+	.4byte	0x6905
+	.uleb128 0x34
+	.8byte	.LVL858
+	.4byte	0x259f
+	.4byte	0x60b5
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL862
+	.4byte	0x27e7
+	.4byte	0x60e3
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR108
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL863
+	.4byte	0x610d
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xee
+	.4byte	0x6108
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0x1e
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x60f8
+	.uleb128 0x46
+	.4byte	.LASF754
+	.byte	0x2
+	.2byte	0x218
+	.4byte	0x5b
+	.8byte	.LFB256
+	.8byte	.LFE256-.LFB256
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6287
+	.uleb128 0x50
+	.4byte	.LASF703
+	.byte	0x2
+	.2byte	0x218
+	.4byte	0x517a
+	.4byte	.LLST228
+	.uleb128 0x52
+	.4byte	.LASF755
+	.byte	0x2
+	.2byte	0x21a
+	.4byte	0xdc9
+	.4byte	.LLST229
+	.uleb128 0x52
+	.4byte	.LASF756
+	.byte	0x2
+	.2byte	0x21b
+	.4byte	0xdc9
+	.4byte	.LLST230
+	.uleb128 0x52
+	.4byte	.LASF330
+	.byte	0x2
+	.2byte	0x21c
+	.4byte	0xdc9
+	.4byte	.LLST231
+	.uleb128 0x52
+	.4byte	.LASF753
+	.byte	0x2
+	.2byte	0x21d
+	.4byte	0x10f8
+	.4byte	.LLST232
+	.uleb128 0x52
+	.4byte	.LASF706
+	.byte	0x2
+	.2byte	0x21e
+	.4byte	0x1001
+	.4byte	.LLST233
+	.uleb128 0x52
+	.4byte	.LASF708
+	.byte	0x2
+	.2byte	0x21f
+	.4byte	0x5180
+	.4byte	.LLST234
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x299f
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.6606
+	.uleb128 0x34
+	.8byte	.LVL890
+	.4byte	0x62df
+	.4byte	0x61ca
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL893
+	.4byte	0x6287
+	.4byte	0x61e2
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL895
+	.4byte	0x6a7f
+	.4byte	0x61ff
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL897
+	.4byte	0x6287
+	.4byte	0x6217
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL902
+	.4byte	0x29a4
+	.4byte	0x6240
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR108
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL903
+	.4byte	0xa8ce
+	.4byte	0x626c
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x234
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL908
+	.4byte	0x5e2b
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x47
+	.4byte	.LASF757
+	.byte	0x2
+	.2byte	0x203
+	.4byte	0x5b
+	.byte	0x1
+	.4byte	0x62ca
+	.uleb128 0x48
+	.4byte	.LASF703
+	.byte	0x2
+	.2byte	0x203
+	.4byte	0x517a
+	.uleb128 0x49
+	.4byte	.LASF758
+	.byte	0x2
+	.2byte	0x205
+	.4byte	0xdc9
+	.uleb128 0x49
+	.4byte	.LASF753
+	.byte	0x2
+	.2byte	0x206
+	.4byte	0x10f8
+	.uleb128 0x4c
+	.4byte	.LASF574
+	.4byte	0x62da
+	.4byte	.LASF757
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xee
+	.4byte	0x62da
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0x19
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x62ca
+	.uleb128 0x46
+	.4byte	.LASF759
+	.byte	0x2
+	.2byte	0x1db
+	.4byte	0x5b
+	.8byte	.LFB254
+	.8byte	.LFE254-.LFB254
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x63c2
+	.uleb128 0x50
+	.4byte	.LASF703
+	.byte	0x2
+	.2byte	0x1db
+	.4byte	0x517a
+	.4byte	.LLST207
+	.uleb128 0x52
+	.4byte	.LASF753
+	.byte	0x2
+	.2byte	0x1dd
+	.4byte	0x10f8
+	.4byte	.LLST208
+	.uleb128 0x52
+	.4byte	.LASF706
+	.byte	0x2
+	.2byte	0x1de
+	.4byte	0x1001
+	.4byte	.LLST209
+	.uleb128 0x52
+	.4byte	.LASF760
+	.byte	0x2
+	.2byte	0x1df
+	.4byte	0x10f8
+	.4byte	.LLST210
+	.uleb128 0x52
+	.4byte	.LASF388
+	.byte	0x2
+	.2byte	0x1e0
+	.4byte	0xdc9
+	.4byte	.LLST211
+	.uleb128 0x52
+	.4byte	.LASF330
+	.byte	0x2
+	.2byte	0x1e0
+	.4byte	0xdc9
+	.4byte	.LLST212
+	.uleb128 0x52
+	.4byte	.LASF758
+	.byte	0x2
+	.2byte	0x1e1
+	.4byte	0xdc9
+	.4byte	.LLST213
+	.uleb128 0x52
+	.4byte	.LASF761
+	.byte	0x2
+	.2byte	0x1e2
+	.4byte	0xdc9
+	.4byte	.LLST214
+	.uleb128 0x52
+	.4byte	.LASF756
+	.byte	0x2
+	.2byte	0x1e3
+	.4byte	0xdc9
+	.4byte	.LLST215
+	.uleb128 0x34
+	.8byte	.LVL827
+	.4byte	0x259f
+	.4byte	0x63ae
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL844
+	.4byte	0x6a7f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF762
+	.byte	0x2
+	.2byte	0x1b9
+	.4byte	0x5b
+	.8byte	.LFB253
+	.8byte	.LFE253-.LFB253
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x654a
+	.uleb128 0x50
+	.4byte	.LASF317
+	.byte	0x2
+	.2byte	0x1b9
+	.4byte	0xdc9
+	.4byte	.LLST204
+	.uleb128 0x50
+	.4byte	.LASF740
+	.byte	0x2
+	.2byte	0x1b9
+	.4byte	0xdc9
+	.4byte	.LLST205
+	.uleb128 0x2a
+	.4byte	.LASF708
+	.byte	0x2
+	.2byte	0x1bb
+	.4byte	0x5180
+	.uleb128 0x1
+	.byte	0x69
+	.uleb128 0x52
+	.4byte	.LASF763
+	.byte	0x2
+	.2byte	0x1bc
+	.4byte	0xdd4
+	.4byte	.LLST206
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x3784
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.6563
+	.uleb128 0x34
+	.8byte	.LVL811
+	.4byte	0xa8ce
+	.4byte	0x6468
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR140
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x1be
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL814
+	.4byte	0x259f
+	.4byte	0x6480
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL818
+	.4byte	0x29a4
+	.4byte	0x64a2
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL820
+	.4byte	0xa8ce
+	.4byte	0x64cd
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC83
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL821
+	.4byte	0x2b1c
+	.4byte	0x64f6
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC84
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x34
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x34
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL822
+	.4byte	0x2b1c
+	.4byte	0x651a
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC85
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x34
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL823
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR140
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x1d3
+	.byte	0
+	.byte	0
+	.uleb128 0x47
+	.4byte	.LASF764
+	.byte	0x2
+	.2byte	0x193
+	.4byte	0x5b
+	.byte	0x1
+	.4byte	0x65c9
+	.uleb128 0x48
+	.4byte	.LASF649
+	.byte	0x2
+	.2byte	0x193
+	.4byte	0xdc9
+	.uleb128 0x49
+	.4byte	.LASF765
+	.byte	0x2
+	.2byte	0x195
+	.4byte	0xdc9
+	.uleb128 0x49
+	.4byte	.LASF766
+	.byte	0x2
+	.2byte	0x196
+	.4byte	0xdc9
+	.uleb128 0x49
+	.4byte	.LASF767
+	.byte	0x2
+	.2byte	0x197
+	.4byte	0xdd4
+	.uleb128 0x49
+	.4byte	.LASF768
+	.byte	0x2
+	.2byte	0x199
+	.4byte	0xdc9
+	.uleb128 0x49
+	.4byte	.LASF769
+	.byte	0x2
+	.2byte	0x19a
+	.4byte	0xdd4
+	.uleb128 0x49
+	.4byte	.LASF652
+	.byte	0x2
+	.2byte	0x19b
+	.4byte	0x1e2c
+	.uleb128 0x49
+	.4byte	.LASF770
+	.byte	0x2
+	.2byte	0x19b
+	.4byte	0x1e2c
+	.uleb128 0x4c
+	.4byte	.LASF574
+	.4byte	0x4d22
+	.4byte	.LASF764
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF771
+	.byte	0x2
+	.2byte	0x17f
+	.4byte	0x5b
+	.8byte	.LFB251
+	.8byte	.LFE251-.LFB251
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x661c
+	.uleb128 0x50
+	.4byte	.LASF236
+	.byte	0x2
+	.2byte	0x17f
+	.4byte	0xdc9
+	.4byte	.LLST67
+	.uleb128 0x52
+	.4byte	.LASF649
+	.byte	0x2
+	.2byte	0x181
+	.4byte	0xdc9
+	.4byte	.LLST68
+	.uleb128 0x52
+	.4byte	.LASF652
+	.byte	0x2
+	.2byte	0x182
+	.4byte	0x1e2c
+	.4byte	.LLST69
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF772
+	.byte	0x2
+	.2byte	0x17a
+	.4byte	0x5b
+	.8byte	.LFB250
+	.8byte	.LFE250-.LFB250
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6669
+	.uleb128 0x50
+	.4byte	.LASF773
+	.byte	0x2
+	.2byte	0x17a
+	.4byte	0x6669
+	.4byte	.LLST66
+	.uleb128 0x2f
+	.8byte	.LVL187
+	.4byte	0x666f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x1e2c
+	.uleb128 0x46
+	.4byte	.LASF774
+	.byte	0x2
+	.2byte	0x167
+	.4byte	0x5b
+	.8byte	.LFB249
+	.8byte	.LFE249-.LFB249
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x66e6
+	.uleb128 0x50
+	.4byte	.LASF773
+	.byte	0x2
+	.2byte	0x167
+	.4byte	0x6669
+	.4byte	.LLST62
+	.uleb128 0x50
+	.4byte	.LASF236
+	.byte	0x2
+	.2byte	0x167
+	.4byte	0xdc9
+	.4byte	.LLST63
+	.uleb128 0x52
+	.4byte	.LASF649
+	.byte	0x2
+	.2byte	0x169
+	.4byte	0xdc9
+	.4byte	.LLST64
+	.uleb128 0x52
+	.4byte	.LASF652
+	.byte	0x2
+	.2byte	0x16a
+	.4byte	0x1e2c
+	.4byte	.LLST65
+	.uleb128 0x36
+	.8byte	.LVL178
+	.4byte	0x66e6
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF775
+	.byte	0x2
+	.2byte	0x14c
+	.4byte	0x5b
+	.8byte	.LFB248
+	.8byte	.LFE248-.LFB248
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x678b
+	.uleb128 0x50
+	.4byte	.LASF773
+	.byte	0x2
+	.2byte	0x14c
+	.4byte	0x6669
+	.4byte	.LLST58
+	.uleb128 0x50
+	.4byte	.LASF649
+	.byte	0x2
+	.2byte	0x14c
+	.4byte	0xdc9
+	.4byte	.LLST59
+	.uleb128 0x52
+	.4byte	.LASF652
+	.byte	0x2
+	.2byte	0x14e
+	.4byte	0x1e2c
+	.4byte	.LLST60
+	.uleb128 0x52
+	.4byte	.LASF776
+	.byte	0x2
+	.2byte	0x14e
+	.4byte	0x1e2c
+	.4byte	.LLST61
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x679b
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.6522
+	.uleb128 0x36
+	.8byte	.LVL164
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR50
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x151
+	.byte	0
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xee
+	.4byte	0x679b
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0x10
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x678b
+	.uleb128 0x46
+	.4byte	.LASF777
+	.byte	0x2
+	.2byte	0x11b
+	.4byte	0x5b
+	.8byte	.LFB247
+	.8byte	.LFE247-.LFB247
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6821
+	.uleb128 0x50
+	.4byte	.LASF649
+	.byte	0x2
+	.2byte	0x11b
+	.4byte	0xdc9
+	.4byte	.LLST51
+	.uleb128 0x52
+	.4byte	.LASF652
+	.byte	0x2
+	.2byte	0x11d
+	.4byte	0x1e2c
+	.4byte	.LLST52
+	.uleb128 0x52
+	.4byte	.LASF776
+	.byte	0x2
+	.2byte	0x11d
+	.4byte	0x1e2c
+	.4byte	.LLST53
+	.uleb128 0x2a
+	.4byte	.LASF778
+	.byte	0x2
+	.2byte	0x11e
+	.4byte	0xdc9
+	.uleb128 0x1
+	.byte	0x5d
+	.uleb128 0x52
+	.4byte	.LASF779
+	.byte	0x2
+	.2byte	0x11f
+	.4byte	0xdc9
+	.4byte	.LLST54
+	.uleb128 0x52
+	.4byte	.LASF780
+	.byte	0x2
+	.2byte	0x120
+	.4byte	0xdc9
+	.4byte	.LLST55
+	.byte	0
+	.uleb128 0x2d
+	.4byte	.LASF781
+	.byte	0x2
+	.byte	0xd8
+	.4byte	0x5b
+	.8byte	.LFB246
+	.8byte	.LFE246-.LFB246
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x68bb
+	.uleb128 0x2e
+	.4byte	.LASF649
+	.byte	0x2
+	.byte	0xd8
+	.4byte	0xdc9
+	.4byte	.LLST41
+	.uleb128 0x32
+	.4byte	.LASF652
+	.byte	0x2
+	.byte	0xda
+	.4byte	0x1e2c
+	.4byte	.LLST42
+	.uleb128 0x32
+	.4byte	.LASF776
+	.byte	0x2
+	.byte	0xda
+	.4byte	0x1e2c
+	.4byte	.LLST43
+	.uleb128 0x32
+	.4byte	.LASF782
+	.byte	0x2
+	.byte	0xdb
+	.4byte	0xdc9
+	.4byte	.LLST44
+	.uleb128 0x32
+	.4byte	.LASF783
+	.byte	0x2
+	.byte	0xdc
+	.4byte	0xdc9
+	.4byte	.LLST45
+	.uleb128 0x32
+	.4byte	.LASF767
+	.byte	0x2
+	.byte	0xdd
+	.4byte	0xdd4
+	.4byte	.LLST46
+	.uleb128 0x32
+	.4byte	.LASF784
+	.byte	0x2
+	.byte	0xde
+	.4byte	0xdd4
+	.4byte	.LLST47
+	.uleb128 0x32
+	.4byte	.LASF780
+	.byte	0x2
+	.byte	0xdf
+	.4byte	0xdc9
+	.4byte	.LLST48
+	.byte	0
+	.uleb128 0x63
+	.4byte	.LASF785
+	.byte	0x2
+	.byte	0xb9
+	.byte	0x1
+	.4byte	0x68e0
+	.uleb128 0x38
+	.4byte	.LASF649
+	.byte	0x2
+	.byte	0xb9
+	.4byte	0xdc9
+	.uleb128 0x4c
+	.4byte	.LASF574
+	.4byte	0x679b
+	.4byte	.LASF785
+	.byte	0
+	.uleb128 0x63
+	.4byte	.LASF786
+	.byte	0x2
+	.byte	0xb2
+	.byte	0x1
+	.4byte	0x6905
+	.uleb128 0x38
+	.4byte	.LASF649
+	.byte	0x2
+	.byte	0xb2
+	.4byte	0xdc9
+	.uleb128 0x4c
+	.4byte	.LASF574
+	.4byte	0x679b
+	.4byte	.LASF786
+	.byte	0
+	.uleb128 0x2d
+	.4byte	.LASF787
+	.byte	0x2
+	.byte	0xa4
+	.4byte	0xdc9
+	.8byte	.LFB243
+	.8byte	.LFE243-.LFB243
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6970
+	.uleb128 0x33
+	.string	"tmp"
+	.byte	0x2
+	.byte	0xa6
+	.4byte	0xdc9
+	.4byte	.LLST39
+	.uleb128 0x61
+	.8byte	.LBB174
+	.8byte	.LBE174-.LBB174
+	.4byte	0x6958
+	.uleb128 0x33
+	.string	"Q"
+	.byte	0x2
+	.byte	0xa9
+	.4byte	0x6970
+	.4byte	.LLST40
+	.byte	0
+	.uleb128 0x64
+	.4byte	0x6b52
+	.8byte	.LBB172
+	.8byte	.LBE172-.LBB172
+	.byte	0x2
+	.byte	0xa8
+	.byte	0
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x15a4
+	.uleb128 0x2d
+	.4byte	.LASF788
+	.byte	0x2
+	.byte	0x92
+	.4byte	0x5b
+	.8byte	.LFB242
+	.8byte	.LFE242-.LFB242
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x69ea
+	.uleb128 0x31
+	.string	"blk"
+	.byte	0x2
+	.byte	0x92
+	.4byte	0xdc9
+	.4byte	.LLST36
+	.uleb128 0x33
+	.string	"ret"
+	.byte	0x2
+	.byte	0x94
+	.4byte	0x5b
+	.4byte	.LLST37
+	.uleb128 0x33
+	.string	"i"
+	.byte	0x2
+	.byte	0x95
+	.4byte	0xdd4
+	.4byte	.LLST38
+	.uleb128 0x3d
+	.string	"Q"
+	.byte	0x2
+	.byte	0x96
+	.4byte	0x6970
+	.uleb128 0xa
+	.byte	0x3
+	.8byte	gSysFreeQueue
+	.byte	0x9f
+	.uleb128 0x65
+	.4byte	0x6b46
+	.8byte	.LBB168
+	.4byte	.Ldebug_ranges0+0x30
+	.byte	0x2
+	.byte	0x98
+	.byte	0
+	.uleb128 0x43
+	.4byte	.LASF789
+	.byte	0x2
+	.byte	0x73
+	.8byte	.LFB241
+	.8byte	.LFE241-.LFB241
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6a7f
+	.uleb128 0x33
+	.string	"i"
+	.byte	0x2
+	.byte	0x75
+	.4byte	0xdc9
+	.4byte	.LLST30
+	.uleb128 0x33
+	.string	"tmp"
+	.byte	0x2
+	.byte	0x75
+	.4byte	0xdc9
+	.4byte	.LLST31
+	.uleb128 0x33
+	.string	"j"
+	.byte	0x2
+	.byte	0x75
+	.4byte	0xdc9
+	.4byte	.LLST32
+	.uleb128 0x32
+	.4byte	.LASF599
+	.byte	0x2
+	.byte	0x76
+	.4byte	0xdc9
+	.4byte	.LLST33
+	.uleb128 0x32
+	.4byte	.LASF790
+	.byte	0x2
+	.byte	0x77
+	.4byte	0xdc9
+	.4byte	.LLST34
+	.uleb128 0x32
+	.4byte	.LASF791
+	.byte	0x2
+	.byte	0x78
+	.4byte	0xdd4
+	.4byte	.LLST35
+	.uleb128 0x3d
+	.string	"Q"
+	.byte	0x2
+	.byte	0x79
+	.4byte	0x6970
+	.uleb128 0xa
+	.byte	0x3
+	.8byte	gSysFreeQueue
+	.byte	0x9f
+	.uleb128 0x45
+	.8byte	.LVL79
+	.4byte	0x6cf6
+	.byte	0
+	.uleb128 0x43
+	.4byte	.LASF792
+	.byte	0x2
+	.byte	0x61
+	.8byte	.LFB240
+	.8byte	.LFE240-.LFB240
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6b46
+	.uleb128 0x31
+	.string	"blk"
+	.byte	0x2
+	.byte	0x61
+	.4byte	0xdc9
+	.4byte	.LLST182
+	.uleb128 0x2e
+	.4byte	.LASF793
+	.byte	0x2
+	.byte	0x61
+	.4byte	0xdc9
+	.4byte	.LLST183
+	.uleb128 0x61
+	.8byte	.LBB219
+	.8byte	.LBE219-.LBB219
+	.4byte	0x6b2e
+	.uleb128 0x33
+	.string	"Q"
+	.byte	0x2
+	.byte	0x64
+	.4byte	0x6970
+	.4byte	.LLST184
+	.uleb128 0x66
+	.8byte	.LBB220
+	.8byte	.LBE220-.LBB220
+	.uleb128 0x32
+	.4byte	.LASF794
+	.byte	0x2
+	.byte	0x66
+	.4byte	0xdc9
+	.4byte	.LLST185
+	.uleb128 0x34
+	.8byte	.LVL679
+	.4byte	0x6cf6
+	.4byte	0x6b14
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL682
+	.4byte	0x2721
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x64
+	.4byte	0x6b46
+	.8byte	.LBB217
+	.8byte	.LBE217-.LBB217
+	.byte	0x2
+	.byte	0x63
+	.byte	0
+	.uleb128 0x67
+	.4byte	.LASF795
+	.byte	0x2
+	.byte	0x5c
+	.4byte	0xdc9
+	.byte	0x1
+	.uleb128 0x67
+	.4byte	.LASF796
+	.byte	0x2
+	.byte	0x57
+	.4byte	0xdc9
+	.byte	0x1
+	.uleb128 0x2d
+	.4byte	.LASF797
+	.byte	0x2
+	.byte	0x4b
+	.4byte	0xdc9
+	.8byte	.LFB237
+	.8byte	.LFE237-.LFB237
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6bca
+	.uleb128 0x31
+	.string	"max"
+	.byte	0x2
+	.byte	0x4b
+	.4byte	0xdc9
+	.4byte	.LLST203
+	.uleb128 0x3d
+	.string	"Q"
+	.byte	0x2
+	.byte	0x4d
+	.4byte	0x6970
+	.uleb128 0xa
+	.byte	0x3
+	.8byte	gSysFreeQueue
+	.byte	0x9f
+	.uleb128 0x36
+	.8byte	.LVL807
+	.4byte	0x259f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR38+8
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x800
+	.byte	0
+	.byte	0
+	.uleb128 0x2d
+	.4byte	.LASF798
+	.byte	0x2
+	.byte	0x2e
+	.4byte	0x5b
+	.8byte	.LFB236
+	.8byte	.LFE236-.LFB236
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6ca7
+	.uleb128 0x2e
+	.4byte	.LASF388
+	.byte	0x2
+	.byte	0x2e
+	.4byte	0xdd4
+	.4byte	.LLST161
+	.uleb128 0x2e
+	.4byte	.LASF568
+	.byte	0x2
+	.byte	0x2e
+	.4byte	0x5b
+	.4byte	.LLST162
+	.uleb128 0x3d
+	.string	"req"
+	.byte	0x2
+	.byte	0x30
+	.4byte	0xdf5
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -96
+	.uleb128 0x33
+	.string	"low"
+	.byte	0x2
+	.byte	0x31
+	.4byte	0xdea
+	.4byte	.LLST163
+	.uleb128 0x32
+	.4byte	.LASF799
+	.byte	0x2
+	.byte	0x31
+	.4byte	0xdea
+	.4byte	.LLST164
+	.uleb128 0x33
+	.string	"mid"
+	.byte	0x2
+	.byte	0x31
+	.4byte	0xdea
+	.4byte	.LLST165
+	.uleb128 0x2b
+	.4byte	.LASF800
+	.byte	0x2
+	.byte	0x32
+	.4byte	0x2711
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -64
+	.uleb128 0x32
+	.4byte	.LASF801
+	.byte	0x2
+	.byte	0x33
+	.4byte	0xdc9
+	.4byte	.LLST166
+	.uleb128 0x34
+	.8byte	.LVL624
+	.4byte	0x29a4
+	.4byte	0x6c86
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 112
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL633
+	.4byte	0x29a4
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 112
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x2d
+	.4byte	.LASF802
+	.byte	0x2
+	.byte	0x1e
+	.4byte	0xdd4
+	.8byte	.LFB235
+	.8byte	.LFE235-.LFB235
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6cf6
+	.uleb128 0x2e
+	.4byte	.LASF803
+	.byte	0x2
+	.byte	0x1e
+	.4byte	0xdd4
+	.4byte	.LLST27
+	.uleb128 0x2e
+	.4byte	.LASF804
+	.byte	0x2
+	.byte	0x1e
+	.4byte	0xdd4
+	.4byte	.LLST28
+	.uleb128 0x33
+	.string	"ret"
+	.byte	0x2
+	.byte	0x20
+	.4byte	0xdd4
+	.4byte	.LLST29
+	.byte	0
+	.uleb128 0x2d
+	.4byte	.LASF805
+	.byte	0x2
+	.byte	0x14
+	.4byte	0xdc9
+	.8byte	.LFB234
+	.8byte	.LFE234-.LFB234
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6d36
+	.uleb128 0x2e
+	.4byte	.LASF594
+	.byte	0x2
+	.byte	0x14
+	.4byte	0xdc9
+	.4byte	.LLST25
+	.uleb128 0x32
+	.4byte	.LASF717
+	.byte	0x2
+	.byte	0x16
+	.4byte	0xdc9
+	.4byte	.LLST26
+	.byte	0
+	.uleb128 0x2d
+	.4byte	.LASF806
+	.byte	0x2
+	.byte	0xc
+	.4byte	0xdc9
+	.8byte	.LFB233
+	.8byte	.LFE233-.LFB233
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6d91
+	.uleb128 0x2e
+	.4byte	.LASF594
+	.byte	0x2
+	.byte	0xc
+	.4byte	0xdc9
+	.4byte	.LLST24
+	.uleb128 0x2b
+	.4byte	.LASF592
+	.byte	0x2
+	.byte	0xe
+	.4byte	0xdc9
+	.uleb128 0x1e
+	.byte	0x73
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x3
+	.8byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0x71
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x73
+	.sleb128 0
+	.byte	0x71
+	.sleb128 0
+	.byte	0x1d
+	.byte	0x22
+	.byte	0x9f
+	.byte	0
+	.uleb128 0x2d
+	.4byte	.LASF807
+	.byte	0x2
+	.byte	0x4
+	.4byte	0xdc9
+	.8byte	.LFB232
+	.8byte	.LFE232-.LFB232
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6dde
+	.uleb128 0x2e
+	.4byte	.LASF592
+	.byte	0x2
+	.byte	0x4
+	.4byte	0xdc9
+	.4byte	.LLST22
+	.uleb128 0x59
+	.4byte	.LASF717
+	.byte	0x2
+	.byte	0x4
+	.4byte	0xdc9
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x32
+	.4byte	.LASF608
+	.byte	0x2
+	.byte	0x6
+	.4byte	0xdc9
+	.4byte	.LLST23
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF808
+	.byte	0x4
+	.2byte	0x13c
+	.4byte	0xddf
+	.8byte	.LFB231
+	.8byte	.LFE231-.LFB231
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7029
+	.uleb128 0x51
+	.string	"die"
+	.byte	0x4
+	.2byte	0x13e
+	.4byte	0xdd4
+	.4byte	.LLST361
+	.uleb128 0x51
+	.string	"blk"
+	.byte	0x4
+	.2byte	0x13f
+	.4byte	0xdc9
+	.4byte	.LLST362
+	.uleb128 0x52
+	.4byte	.LASF577
+	.byte	0x4
+	.2byte	0x140
+	.4byte	0xdd4
+	.4byte	.LLST363
+	.uleb128 0x52
+	.4byte	.LASF809
+	.byte	0x4
+	.2byte	0x142
+	.4byte	0x7029
+	.4byte	.LLST364
+	.uleb128 0x4b
+	.4byte	.LASF810
+	.byte	0x4
+	.2byte	0x158
+	.uleb128 0x45
+	.8byte	.LVL1545
+	.4byte	0x7283
+	.uleb128 0x45
+	.8byte	.LVL1546
+	.4byte	0x702f
+	.uleb128 0x34
+	.8byte	.LVL1552
+	.4byte	0x74e5
+	.4byte	0x6e7a
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1553
+	.4byte	0x26cd
+	.4byte	0x6e92
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1554
+	.4byte	0x7574
+	.4byte	0x6eaa
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1560
+	.4byte	0x29a4
+	.4byte	0x6ecc
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1561
+	.4byte	0x2527
+	.uleb128 0x34
+	.8byte	.LVL1563
+	.4byte	0x7574
+	.4byte	0x6ef1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1565
+	.4byte	0x2611
+	.4byte	0x6f09
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1566
+	.4byte	0x7441
+	.uleb128 0x45
+	.8byte	.LVL1568
+	.4byte	0x74e5
+	.uleb128 0x34
+	.8byte	.LVL1569
+	.4byte	0x259f
+	.4byte	0x6f3f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x40
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1570
+	.4byte	0x259f
+	.4byte	0x6f5d
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x1000
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1572
+	.4byte	0x2527
+	.uleb128 0x34
+	.8byte	.LVL1573
+	.4byte	0x2721
+	.4byte	0x6f8c
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1574
+	.4byte	0x27e7
+	.4byte	0x6fb3
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1575
+	.4byte	0x7574
+	.4byte	0x6fcb
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1581
+	.4byte	0x7574
+	.uleb128 0x34
+	.8byte	.LVL1585
+	.4byte	0x2721
+	.4byte	0x6ff4
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x32
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1586
+	.4byte	0x7574
+	.uleb128 0x45
+	.8byte	.LVL1587
+	.4byte	0x7574
+	.uleb128 0x45
+	.8byte	.LVL1588
+	.4byte	0x72c7
+	.uleb128 0x45
+	.8byte	.LVL1590
+	.4byte	0x72c7
+	.byte	0
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x11c8
+	.uleb128 0x46
+	.4byte	.LASF811
+	.byte	0x4
+	.2byte	0x116
+	.4byte	0x5b
+	.8byte	.LFB230
+	.8byte	.LFE230-.LFB230
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x70ac
+	.uleb128 0x51
+	.string	"die"
+	.byte	0x4
+	.2byte	0x118
+	.4byte	0xdd4
+	.4byte	.LLST158
+	.uleb128 0x51
+	.string	"blk"
+	.byte	0x4
+	.2byte	0x119
+	.4byte	0xdc9
+	.4byte	.LLST159
+	.uleb128 0x49
+	.4byte	.LASF812
+	.byte	0x4
+	.2byte	0x11a
+	.4byte	0xdd4
+	.uleb128 0x52
+	.4byte	.LASF809
+	.byte	0x4
+	.2byte	0x11b
+	.4byte	0x7029
+	.4byte	.LLST160
+	.uleb128 0x36
+	.8byte	.LVL614
+	.4byte	0x29a4
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x2d
+	.4byte	.LASF813
+	.byte	0x4
+	.byte	0xac
+	.4byte	0x5b
+	.8byte	.LFB229
+	.8byte	.LFE229-.LFB229
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x721a
+	.uleb128 0x33
+	.string	"i"
+	.byte	0x4
+	.byte	0xae
+	.4byte	0xdd4
+	.4byte	.LLST357
+	.uleb128 0x33
+	.string	"blk"
+	.byte	0x4
+	.byte	0xaf
+	.4byte	0xdc9
+	.4byte	.LLST358
+	.uleb128 0x32
+	.4byte	.LASF705
+	.byte	0x4
+	.byte	0xb0
+	.4byte	0xdea
+	.4byte	.LLST359
+	.uleb128 0x32
+	.4byte	.LASF809
+	.byte	0x4
+	.byte	0xb1
+	.4byte	0x7029
+	.4byte	.LLST360
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x722a
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.6364
+	.uleb128 0x45
+	.8byte	.LVL1521
+	.4byte	0x7283
+	.uleb128 0x34
+	.8byte	.LVL1523
+	.4byte	0x29a4
+	.4byte	0x7149
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1524
+	.4byte	0x29a4
+	.4byte	0x716b
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1526
+	.4byte	0x29a4
+	.4byte	0x7194
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR108
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1527
+	.4byte	0x6bca
+	.4byte	0x71ab
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1529
+	.4byte	0xa8ce
+	.4byte	0x71dd
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR165
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xfe
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1530
+	.4byte	0x8b14
+	.uleb128 0x34
+	.8byte	.LVL1538
+	.4byte	0x29a4
+	.4byte	0x720c
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1543
+	.4byte	0x2527
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xee
+	.4byte	0x722a
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0xa
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x721a
+	.uleb128 0x2d
+	.4byte	.LASF814
+	.byte	0x4
+	.byte	0x9c
+	.4byte	0xdc9
+	.8byte	.LFB228
+	.8byte	.LFE228-.LFB228
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7283
+	.uleb128 0x33
+	.string	"blk"
+	.byte	0x4
+	.byte	0x9e
+	.4byte	0xdc9
+	.4byte	.LLST20
+	.uleb128 0x32
+	.4byte	.LASF815
+	.byte	0x4
+	.byte	0x9f
+	.4byte	0xdc9
+	.4byte	.LLST21
+	.uleb128 0x36
+	.8byte	.LVL53
+	.4byte	0x74e5
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x43
+	.4byte	.LASF816
+	.byte	0x4
+	.byte	0x94
+	.8byte	.LFB227
+	.8byte	.LFE227-.LFB227
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x72c7
+	.uleb128 0x2f
+	.8byte	.LVL804
+	.4byte	0x259f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR37+12
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x40
+	.byte	0
+	.byte	0
+	.uleb128 0x2d
+	.4byte	.LASF817
+	.byte	0x4
+	.byte	0x4f
+	.4byte	0x5b
+	.8byte	.LFB226
+	.8byte	.LFE226-.LFB226
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7441
+	.uleb128 0x33
+	.string	"i"
+	.byte	0x4
+	.byte	0x51
+	.4byte	0x5b
+	.4byte	.LLST306
+	.uleb128 0x32
+	.4byte	.LASF818
+	.byte	0x4
+	.byte	0x52
+	.4byte	0x5b
+	.4byte	.LLST307
+	.uleb128 0x32
+	.4byte	.LASF809
+	.byte	0x4
+	.byte	0x53
+	.4byte	0x7029
+	.4byte	.LLST308
+	.uleb128 0x32
+	.4byte	.LASF721
+	.byte	0x4
+	.byte	0x54
+	.4byte	0xdc9
+	.4byte	.LLST309
+	.uleb128 0x55
+	.4byte	.LASF819
+	.byte	0x4
+	.byte	0x67
+	.uleb128 0x68
+	.4byte	.LASF574
+	.4byte	0x299f
+	.uleb128 0x34
+	.8byte	.LVL1243
+	.4byte	0x259f
+	.4byte	0x734a
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1246
+	.4byte	0x259f
+	.4byte	0x736d
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x40
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1248
+	.4byte	0xa8ce
+	.4byte	0x7385
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1249
+	.4byte	0x27e7
+	.4byte	0x73ac
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1250
+	.4byte	0x2721
+	.4byte	0x73c8
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1251
+	.4byte	0x27e7
+	.4byte	0x73ef
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1253
+	.4byte	0xa8ce
+	.4byte	0x740e
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC95
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1254
+	.4byte	0xa8ce
+	.4byte	0x7433
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC96
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1257
+	.4byte	0x2527
+	.byte	0
+	.uleb128 0x43
+	.4byte	.LASF820
+	.byte	0x4
+	.byte	0x41
+	.8byte	.LFB225
+	.8byte	.LFE225-.LFB225
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x74dd
+	.uleb128 0x2e
+	.4byte	.LASF753
+	.byte	0x4
+	.byte	0x41
+	.4byte	0x10f8
+	.4byte	.LLST201
+	.uleb128 0x2e
+	.4byte	.LASF821
+	.byte	0x4
+	.byte	0x41
+	.4byte	0x1001
+	.4byte	.LLST202
+	.uleb128 0x39
+	.string	"i"
+	.byte	0x4
+	.byte	0x43
+	.4byte	0xdd4
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x41dd
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.6321
+	.uleb128 0x34
+	.8byte	.LVL800
+	.4byte	0x259f
+	.4byte	0x74b5
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL801
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x4a
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF822
+	.byte	0x4
+	.byte	0x26
+	.byte	0x1
+	.uleb128 0x2d
+	.4byte	.LASF823
+	.byte	0x4
+	.byte	0x17
+	.4byte	0x5b
+	.8byte	.LFB223
+	.8byte	.LFE223-.LFB223
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7574
+	.uleb128 0x2e
+	.4byte	.LASF388
+	.byte	0x4
+	.byte	0x17
+	.4byte	0xdc9
+	.4byte	.LLST16
+	.uleb128 0x33
+	.string	"die"
+	.byte	0x4
+	.byte	0x19
+	.4byte	0xdd4
+	.4byte	.LLST17
+	.uleb128 0x33
+	.string	"i"
+	.byte	0x4
+	.byte	0x1a
+	.4byte	0xdd4
+	.4byte	.LLST18
+	.uleb128 0x2b
+	.4byte	.LASF821
+	.byte	0x4
+	.byte	0x1b
+	.4byte	0x1001
+	.uleb128 0x27
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x3
+	.8byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x23
+	.uleb128 0x4
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.8byte	gBbtInfo
+	.byte	0x22
+	.uleb128 0x32
+	.4byte	.LASF582
+	.byte	0x4
+	.byte	0x1c
+	.4byte	0xdc9
+	.4byte	.LLST19
+	.byte	0
+	.uleb128 0x2d
+	.4byte	.LASF824
+	.byte	0x4
+	.byte	0x4
+	.4byte	0x5b
+	.8byte	.LFB222
+	.8byte	.LFE222-.LFB222
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x75f8
+	.uleb128 0x2e
+	.4byte	.LASF388
+	.byte	0x4
+	.byte	0x4
+	.4byte	0xdc9
+	.4byte	.LLST12
+	.uleb128 0x33
+	.string	"die"
+	.byte	0x4
+	.byte	0x6
+	.4byte	0xdd4
+	.4byte	.LLST13
+	.uleb128 0x32
+	.4byte	.LASF821
+	.byte	0x4
+	.byte	0x7
+	.4byte	0x1001
+	.4byte	.LLST14
+	.uleb128 0x32
+	.4byte	.LASF582
+	.byte	0x4
+	.byte	0x8
+	.4byte	0xdc9
+	.4byte	.LLST15
+	.uleb128 0x36
+	.8byte	.LVL44
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x7
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0
+	.byte	0
+	.uleb128 0x6a
+	.4byte	.LASF884
+	.byte	0x3
+	.2byte	0x4be
+	.4byte	0xdd4
+	.8byte	.LFB221
+	.8byte	.LFE221-.LFB221
+	.uleb128 0x1
+	.byte	0x9c
+	.uleb128 0x46
+	.4byte	.LASF825
+	.byte	0x3
+	.2byte	0x4b9
+	.4byte	0x5b
+	.8byte	.LFB220
+	.8byte	.LFE220-.LFB220
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7691
+	.uleb128 0x50
+	.4byte	.LASF236
+	.byte	0x3
+	.2byte	0x4b9
+	.4byte	0xb9
+	.4byte	.LLST458
+	.uleb128 0x50
+	.4byte	.LASF325
+	.byte	0x3
+	.2byte	0x4b9
+	.4byte	0xb9
+	.4byte	.LLST459
+	.uleb128 0x5a
+	.string	"buf"
+	.byte	0x3
+	.2byte	0x4b9
+	.4byte	0x7691
+	.4byte	.LLST460
+	.uleb128 0x2f
+	.8byte	.LVL2075
+	.4byte	0x783c
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x94
+	.uleb128 0x46
+	.4byte	.LASF826
+	.byte	0x3
+	.2byte	0x4b3
+	.4byte	0x5b
+	.8byte	.LFB219
+	.8byte	.LFE219-.LFB219
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7712
+	.uleb128 0x50
+	.4byte	.LASF236
+	.byte	0x3
+	.2byte	0x4b3
+	.4byte	0xb9
+	.4byte	.LLST440
+	.uleb128 0x50
+	.4byte	.LASF325
+	.byte	0x3
+	.2byte	0x4b3
+	.4byte	0xb9
+	.4byte	.LLST441
+	.uleb128 0x5a
+	.string	"buf"
+	.byte	0x3
+	.2byte	0x4b3
+	.4byte	0x7691
+	.4byte	.LLST442
+	.uleb128 0x2f
+	.8byte	.LVL1982
+	.4byte	0x7f5e
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF827
+	.byte	0x3
+	.2byte	0x484
+	.4byte	0x5b
+	.8byte	.LFB218
+	.8byte	.LFE218-.LFB218
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x783c
+	.uleb128 0x50
+	.4byte	.LASF731
+	.byte	0x3
+	.2byte	0x484
+	.4byte	0xdd4
+	.4byte	.LLST398
+	.uleb128 0x50
+	.4byte	.LASF732
+	.byte	0x3
+	.2byte	0x484
+	.4byte	0xdd4
+	.4byte	.LLST399
+	.uleb128 0x52
+	.4byte	.LASF734
+	.byte	0x3
+	.2byte	0x486
+	.4byte	0xdc9
+	.4byte	.LLST400
+	.uleb128 0x51
+	.string	"tmp"
+	.byte	0x3
+	.2byte	0x487
+	.4byte	0xdc9
+	.4byte	.LLST401
+	.uleb128 0x51
+	.string	"lpa"
+	.byte	0x3
+	.2byte	0x488
+	.4byte	0xdd4
+	.4byte	.LLST402
+	.uleb128 0x2a
+	.4byte	.LASF663
+	.byte	0x3
+	.2byte	0x489
+	.4byte	0xdd4
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -8
+	.uleb128 0x2a
+	.4byte	.LASF640
+	.byte	0x3
+	.2byte	0x489
+	.4byte	0xdd4
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -4
+	.uleb128 0x52
+	.4byte	.LASF629
+	.byte	0x3
+	.2byte	0x48a
+	.4byte	0xdc9
+	.4byte	.LLST403
+	.uleb128 0x45
+	.8byte	.LVL1744
+	.4byte	0x7cda
+	.uleb128 0x45
+	.8byte	.LVL1753
+	.4byte	0x5ce8
+	.uleb128 0x45
+	.8byte	.LVL1754
+	.4byte	0x5619
+	.uleb128 0x34
+	.8byte	.LVL1755
+	.4byte	0x5bbb
+	.4byte	0x77fd
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 120
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1756
+	.4byte	0x5bbb
+	.4byte	0x7821
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 124
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1757
+	.4byte	0x6cf6
+	.uleb128 0x45
+	.8byte	.LVL1758
+	.4byte	0x3645
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF828
+	.byte	0x3
+	.2byte	0x3c1
+	.4byte	0x5b
+	.8byte	.LFB217
+	.8byte	.LFE217-.LFB217
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7cda
+	.uleb128 0x5a
+	.string	"LUN"
+	.byte	0x3
+	.2byte	0x3c1
+	.4byte	0xdbe
+	.4byte	.LLST443
+	.uleb128 0x50
+	.4byte	.LASF731
+	.byte	0x3
+	.2byte	0x3c1
+	.4byte	0xdd4
+	.4byte	.LLST444
+	.uleb128 0x50
+	.4byte	.LASF732
+	.byte	0x3
+	.2byte	0x3c1
+	.4byte	0xdd4
+	.4byte	.LLST445
+	.uleb128 0x50
+	.4byte	.LASF733
+	.byte	0x3
+	.2byte	0x3c1
+	.4byte	0x5a77
+	.4byte	.LLST446
+	.uleb128 0x52
+	.4byte	.LASF596
+	.byte	0x3
+	.2byte	0x3c3
+	.4byte	0x2d84
+	.4byte	.LLST447
+	.uleb128 0x51
+	.string	"lpa"
+	.byte	0x3
+	.2byte	0x3c4
+	.4byte	0xdd4
+	.4byte	.LLST448
+	.uleb128 0x52
+	.4byte	.LASF829
+	.byte	0x3
+	.2byte	0x3c4
+	.4byte	0xdd4
+	.4byte	.LLST449
+	.uleb128 0x52
+	.4byte	.LASF830
+	.byte	0x3
+	.2byte	0x3c4
+	.4byte	0xdd4
+	.4byte	.LLST450
+	.uleb128 0x2a
+	.4byte	.LASF663
+	.byte	0x3
+	.2byte	0x3c5
+	.4byte	0xdd4
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x51
+	.string	"ppa"
+	.byte	0x3
+	.2byte	0x3c5
+	.4byte	0xdd4
+	.4byte	.LLST451
+	.uleb128 0x51
+	.string	"i"
+	.byte	0x3
+	.2byte	0x3c6
+	.4byte	0xdd4
+	.4byte	.LLST452
+	.uleb128 0x52
+	.4byte	.LASF831
+	.byte	0x3
+	.2byte	0x3c6
+	.4byte	0xdd4
+	.4byte	.LLST453
+	.uleb128 0x52
+	.4byte	.LASF593
+	.byte	0x3
+	.2byte	0x3c6
+	.4byte	0xdd4
+	.4byte	.LLST454
+	.uleb128 0x52
+	.4byte	.LASF832
+	.byte	0x3
+	.2byte	0x3c7
+	.4byte	0xdd4
+	.4byte	.LLST455
+	.uleb128 0x52
+	.4byte	.LASF833
+	.byte	0x3
+	.2byte	0x3c7
+	.4byte	0xdd4
+	.4byte	.LLST456
+	.uleb128 0x52
+	.4byte	.LASF639
+	.byte	0x3
+	.2byte	0x3c8
+	.4byte	0x1f04
+	.4byte	.LLST457
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x5ce3
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.6257
+	.uleb128 0x40
+	.4byte	.Ldebug_ranges0+0x300
+	.4byte	0x79fe
+	.uleb128 0x2a
+	.4byte	.LASF601
+	.byte	0x3
+	.2byte	0x43d
+	.4byte	0xdf5
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -32
+	.uleb128 0x34
+	.8byte	.LVL2058
+	.4byte	0x29a4
+	.4byte	0x79a9
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 384
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2060
+	.4byte	0xa8ce
+	.4byte	0x79ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC105
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL2061
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR180
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x44a
+	.byte	0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1987
+	.4byte	0x5a7d
+	.4byte	0x7a23
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x86
+	.sleb128 256
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1997
+	.4byte	0x7cda
+	.uleb128 0x34
+	.8byte	.LVL1999
+	.4byte	0xa8ce
+	.4byte	0x7a63
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR180
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x3f4
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL2000
+	.4byte	0x7cda
+	.uleb128 0x34
+	.8byte	.LVL2001
+	.4byte	0x38b7
+	.4byte	0x7a8f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR52
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2003
+	.4byte	0x38b7
+	.4byte	0x7aa7
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2005
+	.4byte	0x38b7
+	.4byte	0x7abf
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2008
+	.4byte	0xa8ce
+	.4byte	0x7af2
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR180
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x415
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2015
+	.4byte	0x2cb7
+	.4byte	0x7b15
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x8
+	.byte	0x8f
+	.sleb128 344
+	.byte	0x94
+	.byte	0x4
+	.byte	0x85
+	.sleb128 0
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2020
+	.4byte	0x65c9
+	.4byte	0x7b2c
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL2021
+	.4byte	0x2ef8
+	.uleb128 0x34
+	.8byte	.LVL2022
+	.4byte	0x2cb7
+	.4byte	0x7b55
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2023
+	.4byte	0x2cb7
+	.4byte	0x7b71
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2029
+	.4byte	0x2527
+	.4byte	0x7b8f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL2036
+	.4byte	0x7cda
+	.uleb128 0x34
+	.8byte	.LVL2038
+	.4byte	0x38b7
+	.4byte	0x7bb4
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2041
+	.4byte	0x5bbb
+	.4byte	0x7bd8
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 380
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2042
+	.4byte	0x3789
+	.4byte	0x7bf0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2046
+	.4byte	0x259f
+	.4byte	0x7c0d
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2051
+	.4byte	0xa8ce
+	.4byte	0x7c40
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR180
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x45f
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2059
+	.4byte	0x2527
+	.4byte	0x7c63
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x7
+	.byte	0x8f
+	.sleb128 348
+	.byte	0x94
+	.byte	0x4
+	.byte	0x39
+	.byte	0x24
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2063
+	.4byte	0x259f
+	.4byte	0x7c7a
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL2064
+	.4byte	0x2527
+	.uleb128 0x34
+	.8byte	.LVL2067
+	.4byte	0x7d15
+	.4byte	0x7caa
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL2068
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR180
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x46e
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF834
+	.byte	0x3
+	.2byte	0x3b7
+	.4byte	0x5b
+	.8byte	.LFB216
+	.8byte	.LFE216-.LFB216
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7d15
+	.uleb128 0x36
+	.8byte	.LVL1732
+	.4byte	0x7d15
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x5d
+	.4byte	.LASF835
+	.byte	0x3
+	.2byte	0x387
+	.8byte	.LFB215
+	.8byte	.LFE215-.LFB215
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7f49
+	.uleb128 0x5a
+	.string	"req"
+	.byte	0x3
+	.2byte	0x387
+	.4byte	0x1abc
+	.4byte	.LLST391
+	.uleb128 0x50
+	.4byte	.LASF593
+	.byte	0x3
+	.2byte	0x387
+	.4byte	0xdd4
+	.4byte	.LLST392
+	.uleb128 0x50
+	.4byte	.LASF836
+	.byte	0x3
+	.2byte	0x387
+	.4byte	0xdd4
+	.4byte	.LLST393
+	.uleb128 0x50
+	.4byte	.LASF639
+	.byte	0x3
+	.2byte	0x387
+	.4byte	0x1f04
+	.4byte	.LLST394
+	.uleb128 0x4a
+	.string	"i"
+	.byte	0x3
+	.2byte	0x389
+	.4byte	0xdd4
+	.uleb128 0x5e
+	.string	"ppa"
+	.byte	0x3
+	.2byte	0x38a
+	.4byte	0xdd4
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -4
+	.uleb128 0x52
+	.4byte	.LASF663
+	.byte	0x3
+	.2byte	0x38a
+	.4byte	0xdd4
+	.4byte	.LLST395
+	.uleb128 0x52
+	.4byte	.LASF623
+	.byte	0x3
+	.2byte	0x38b
+	.4byte	0xdc9
+	.4byte	.LLST396
+	.uleb128 0x52
+	.4byte	.LASF596
+	.byte	0x3
+	.2byte	0x38c
+	.4byte	0x2d84
+	.4byte	.LLST397
+	.uleb128 0x5f
+	.4byte	.LASF687
+	.byte	0x3
+	.2byte	0x38d
+	.4byte	0xdd4
+	.byte	0
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x7f59
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.6229
+	.uleb128 0x34
+	.8byte	.LVL1715
+	.4byte	0x27e7
+	.4byte	0x7e00
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 -4
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1716
+	.4byte	0x6cf6
+	.uleb128 0x34
+	.8byte	.LVL1718
+	.4byte	0x38b7
+	.4byte	0x7e25
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1719
+	.4byte	0x2e56
+	.uleb128 0x34
+	.8byte	.LVL1720
+	.4byte	0x3789
+	.4byte	0x7e4a
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1721
+	.4byte	0x27e7
+	.4byte	0x7e6c
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1722
+	.4byte	0xa8ce
+	.4byte	0x7e9f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR170
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x3a5
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1723
+	.4byte	0x5bbb
+	.4byte	0x7ebd
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 156
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1725
+	.4byte	0x6cf6
+	.4byte	0x7ed7
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x73
+	.sleb128 0
+	.byte	0x3a
+	.byte	0x25
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1727
+	.4byte	0xa8ce
+	.4byte	0x7f01
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC103
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1728
+	.4byte	0x3645
+	.4byte	0x7f19
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL1730
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR170
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x3b4
+	.byte	0
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xee
+	.4byte	0x7f59
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0xc
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x7f49
+	.uleb128 0x46
+	.4byte	.LASF837
+	.byte	0x3
+	.2byte	0x32d
+	.4byte	0x5b
+	.8byte	.LFB214
+	.8byte	.LFE214-.LFB214
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8184
+	.uleb128 0x5a
+	.string	"LUN"
+	.byte	0x3
+	.2byte	0x32d
+	.4byte	0xdbe
+	.4byte	.LLST423
+	.uleb128 0x50
+	.4byte	.LASF731
+	.byte	0x3
+	.2byte	0x32d
+	.4byte	0xdd4
+	.4byte	.LLST424
+	.uleb128 0x50
+	.4byte	.LASF732
+	.byte	0x3
+	.2byte	0x32d
+	.4byte	0xdd4
+	.4byte	.LLST425
+	.uleb128 0x50
+	.4byte	.LASF733
+	.byte	0x3
+	.2byte	0x32d
+	.4byte	0x5a77
+	.4byte	.LLST426
+	.uleb128 0x51
+	.string	"ret"
+	.byte	0x3
+	.2byte	0x32f
+	.4byte	0x5b
+	.4byte	.LLST427
+	.uleb128 0x52
+	.4byte	.LASF829
+	.byte	0x3
+	.2byte	0x330
+	.4byte	0xdd4
+	.4byte	.LLST428
+	.uleb128 0x52
+	.4byte	.LASF830
+	.byte	0x3
+	.2byte	0x330
+	.4byte	0xdd4
+	.4byte	.LLST429
+	.uleb128 0x52
+	.4byte	.LASF838
+	.byte	0x3
+	.2byte	0x330
+	.4byte	0xdd4
+	.4byte	.LLST430
+	.uleb128 0x51
+	.string	"lpa"
+	.byte	0x3
+	.2byte	0x331
+	.4byte	0xdd4
+	.4byte	.LLST431
+	.uleb128 0x5e
+	.string	"ppa"
+	.byte	0x3
+	.2byte	0x331
+	.4byte	0xdd4
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -4
+	.uleb128 0x51
+	.string	"n"
+	.byte	0x3
+	.2byte	0x333
+	.4byte	0xdd4
+	.4byte	.LLST432
+	.uleb128 0x52
+	.4byte	.LASF593
+	.byte	0x3
+	.2byte	0x333
+	.4byte	0xdd4
+	.4byte	.LLST433
+	.uleb128 0x52
+	.4byte	.LASF831
+	.byte	0x3
+	.2byte	0x333
+	.4byte	0xdd4
+	.4byte	.LLST434
+	.uleb128 0x52
+	.4byte	.LASF839
+	.byte	0x3
+	.2byte	0x334
+	.4byte	0xdd4
+	.4byte	.LLST435
+	.uleb128 0x52
+	.4byte	.LASF840
+	.byte	0x3
+	.2byte	0x334
+	.4byte	0xdd4
+	.4byte	.LLST436
+	.uleb128 0x52
+	.4byte	.LASF841
+	.byte	0x3
+	.2byte	0x335
+	.4byte	0xdd4
+	.4byte	.LLST437
+	.uleb128 0x52
+	.4byte	.LASF842
+	.byte	0x3
+	.2byte	0x336
+	.4byte	0xdd4
+	.4byte	.LLST438
+	.uleb128 0x61
+	.8byte	.LBB293
+	.8byte	.LBE293-.LBB293
+	.4byte	0x80cd
+	.uleb128 0x52
+	.4byte	.LASF608
+	.byte	0x3
+	.2byte	0x37a
+	.4byte	0xdc9
+	.4byte	.LLST439
+	.uleb128 0x45
+	.8byte	.LVL1975
+	.4byte	0x6cf6
+	.uleb128 0x45
+	.8byte	.LVL1976
+	.4byte	0x2ef8
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1933
+	.4byte	0x5955
+	.4byte	0x80f2
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x83
+	.sleb128 256
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1940
+	.4byte	0x7cda
+	.uleb128 0x34
+	.8byte	.LVL1946
+	.4byte	0x2cb7
+	.4byte	0x811b
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1947
+	.4byte	0x5bbb
+	.4byte	0x813f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 316
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1952
+	.4byte	0x29a4
+	.4byte	0x815c
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1955
+	.4byte	0x2527
+	.uleb128 0x36
+	.8byte	.LVL1962
+	.4byte	0x259f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x200
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF843
+	.byte	0x3
+	.2byte	0x325
+	.4byte	0x5b
+	.8byte	.LFB213
+	.8byte	.LFE213-.LFB213
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x81b4
+	.uleb128 0x45
+	.8byte	.LVL1737
+	.4byte	0x81b4
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF844
+	.byte	0x3
+	.2byte	0x31c
+	.4byte	0x5b
+	.8byte	.LFB212
+	.8byte	.LFE212-.LFB212
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8215
+	.uleb128 0x45
+	.8byte	.LVL1733
+	.4byte	0x7cda
+	.uleb128 0x45
+	.8byte	.LVL1734
+	.4byte	0x5ce8
+	.uleb128 0x34
+	.8byte	.LVL1735
+	.4byte	0x58ed
+	.4byte	0x8207
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1736
+	.4byte	0x5619
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF845
+	.byte	0x3
+	.2byte	0x2e6
+	.4byte	0x5b
+	.8byte	.LFB211
+	.8byte	.LFE211-.LFB211
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8327
+	.uleb128 0x2a
+	.4byte	.LASF846
+	.byte	0x3
+	.2byte	0x2e8
+	.4byte	0x8327
+	.uleb128 0xa
+	.byte	0x3
+	.8byte	g_nand_phy_info
+	.byte	0x9f
+	.uleb128 0x56
+	.4byte	.LASF847
+	.byte	0x3
+	.2byte	0x2f3
+	.8byte	.LDL2
+	.uleb128 0x61
+	.8byte	.LBB302
+	.8byte	.LBE302-.LBB302
+	.4byte	0x829a
+	.uleb128 0x51
+	.string	"i"
+	.byte	0x3
+	.2byte	0x310
+	.4byte	0xdd4
+	.4byte	.LLST467
+	.uleb128 0x36
+	.8byte	.LVL2172
+	.4byte	0x2cb7
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2164
+	.4byte	0xa8ce
+	.4byte	0x82c6
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC71
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC70
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2165
+	.4byte	0x8aa4
+	.4byte	0x82e5
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL2166
+	.4byte	0x87b0
+	.uleb128 0x45
+	.8byte	.LVL2167
+	.4byte	0x86d9
+	.uleb128 0x45
+	.8byte	.LVL2168
+	.4byte	0x6b5e
+	.uleb128 0x45
+	.8byte	.LVL2169
+	.4byte	0x70ac
+	.uleb128 0x45
+	.8byte	.LVL2170
+	.4byte	0x3f1d
+	.byte	0
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0xee1
+	.uleb128 0x46
+	.4byte	.LASF848
+	.byte	0x3
+	.2byte	0x26e
+	.4byte	0x5b
+	.8byte	.LFB210
+	.8byte	.LFE210-.LFB210
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x84c7
+	.uleb128 0x52
+	.4byte	.LASF717
+	.byte	0x3
+	.2byte	0x270
+	.4byte	0xdc9
+	.4byte	.LLST463
+	.uleb128 0x52
+	.4byte	.LASF849
+	.byte	0x3
+	.2byte	0x270
+	.4byte	0xdc9
+	.4byte	.LLST464
+	.uleb128 0x52
+	.4byte	.LASF850
+	.byte	0x3
+	.2byte	0x271
+	.4byte	0xdc9
+	.4byte	.LLST465
+	.uleb128 0x51
+	.string	"i"
+	.byte	0x3
+	.2byte	0x272
+	.4byte	0xdc9
+	.4byte	.LLST466
+	.uleb128 0x56
+	.4byte	.LASF851
+	.byte	0x3
+	.2byte	0x2bc
+	.8byte	.L1635
+	.uleb128 0x56
+	.4byte	.LASF852
+	.byte	0x3
+	.2byte	0x2cc
+	.8byte	.L1637
+	.uleb128 0x45
+	.8byte	.LVL2123
+	.4byte	0x6b5e
+	.uleb128 0x45
+	.8byte	.LVL2124
+	.4byte	0x70ac
+	.uleb128 0x45
+	.8byte	.LVL2125
+	.4byte	0x6dde
+	.uleb128 0x45
+	.8byte	.LVL2133
+	.4byte	0x72c7
+	.uleb128 0x34
+	.8byte	.LVL2134
+	.4byte	0x259f
+	.4byte	0x83f8
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2136
+	.4byte	0x259f
+	.4byte	0x8410
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2137
+	.4byte	0x4593
+	.4byte	0x8428
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2143
+	.4byte	0x84c7
+	.4byte	0x843f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL2148
+	.4byte	0x8b14
+	.uleb128 0x45
+	.8byte	.LVL2149
+	.4byte	0x6b5e
+	.uleb128 0x34
+	.8byte	.LVL2152
+	.4byte	0x84c7
+	.4byte	0x8470
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2155
+	.4byte	0x84c7
+	.4byte	0x8487
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2159
+	.4byte	0x4593
+	.4byte	0x849f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL2160
+	.4byte	0x6905
+	.uleb128 0x45
+	.8byte	.LVL2161
+	.4byte	0x5619
+	.uleb128 0x45
+	.8byte	.LVL2162
+	.4byte	0x3f1d
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF853
+	.byte	0x3
+	.2byte	0x20f
+	.4byte	0x5b
+	.8byte	.LFB209
+	.8byte	.LFE209-.LFB209
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x86af
+	.uleb128 0x50
+	.4byte	.LASF717
+	.byte	0x3
+	.2byte	0x20f
+	.4byte	0xdc9
+	.4byte	.LLST186
+	.uleb128 0x50
+	.4byte	.LASF854
+	.byte	0x3
+	.2byte	0x20f
+	.4byte	0xdbe
+	.4byte	.LLST187
+	.uleb128 0x52
+	.4byte	.LASF849
+	.byte	0x3
+	.2byte	0x211
+	.4byte	0xdc9
+	.4byte	.LLST188
+	.uleb128 0x52
+	.4byte	.LASF569
+	.byte	0x3
+	.2byte	0x211
+	.4byte	0xdc9
+	.4byte	.LLST189
+	.uleb128 0x52
+	.4byte	.LASF592
+	.byte	0x3
+	.2byte	0x212
+	.4byte	0xdc9
+	.4byte	.LLST190
+	.uleb128 0x52
+	.4byte	.LASF388
+	.byte	0x3
+	.2byte	0x212
+	.4byte	0xdc9
+	.4byte	.LLST191
+	.uleb128 0x52
+	.4byte	.LASF855
+	.byte	0x3
+	.2byte	0x213
+	.4byte	0xdc9
+	.4byte	.LLST192
+	.uleb128 0x52
+	.4byte	.LASF856
+	.byte	0x3
+	.2byte	0x214
+	.4byte	0xdc9
+	.4byte	.LLST193
+	.uleb128 0x52
+	.4byte	.LASF857
+	.byte	0x3
+	.2byte	0x215
+	.4byte	0xdc9
+	.4byte	.LLST194
+	.uleb128 0x52
+	.4byte	.LASF858
+	.byte	0x3
+	.2byte	0x216
+	.4byte	0xdc9
+	.4byte	.LLST195
+	.uleb128 0x56
+	.4byte	.LASF859
+	.byte	0x3
+	.2byte	0x240
+	.8byte	.L439
+	.uleb128 0x34
+	.8byte	.LVL692
+	.4byte	0x2721
+	.4byte	0x85b0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL695
+	.4byte	0x7574
+	.uleb128 0x34
+	.8byte	.LVL701
+	.4byte	0x27e7
+	.4byte	0x85e0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL705
+	.4byte	0x7574
+	.uleb128 0x34
+	.8byte	.LVL709
+	.4byte	0x6a7f
+	.4byte	0x8604
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL710
+	.4byte	0x2721
+	.4byte	0x8622
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL714
+	.4byte	0x6d91
+	.4byte	0x863a
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL716
+	.4byte	0x86af
+	.4byte	0x8652
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL717
+	.4byte	0x74e5
+	.4byte	0x866a
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7e
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL728
+	.4byte	0x6d91
+	.4byte	0x8682
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL730
+	.4byte	0x86af
+	.4byte	0x869a
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7c
+	.sleb128 0
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL731
+	.4byte	0x74e5
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x47
+	.4byte	.LASF860
+	.byte	0x3
+	.2byte	0x201
+	.4byte	0x5b
+	.byte	0x1
+	.4byte	0x86d9
+	.uleb128 0x48
+	.4byte	.LASF388
+	.byte	0x3
+	.2byte	0x201
+	.4byte	0xdc9
+	.uleb128 0x49
+	.4byte	.LASF861
+	.byte	0x3
+	.2byte	0x203
+	.4byte	0xdc9
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF862
+	.byte	0x3
+	.2byte	0x1ec
+	.4byte	0x5b
+	.8byte	.LFB207
+	.8byte	.LFE207-.LFB207
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x87b0
+	.uleb128 0x34
+	.8byte	.LVL1108
+	.4byte	0x259f
+	.4byte	0x8712
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1109
+	.4byte	0x259f
+	.4byte	0x8729
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1110
+	.4byte	0x259f
+	.4byte	0x8740
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1111
+	.4byte	0x259f
+	.4byte	0x876a
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR79
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1112
+	.4byte	0x259f
+	.4byte	0x8795
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR83
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x200
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1113
+	.4byte	0x361a
+	.uleb128 0x45
+	.8byte	.LVL1114
+	.4byte	0x4f10
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF863
+	.byte	0x3
+	.2byte	0x116
+	.4byte	0x5b
+	.8byte	.LFB206
+	.8byte	.LFE206-.LFB206
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8aa4
+	.uleb128 0x51
+	.string	"i"
+	.byte	0x3
+	.2byte	0x118
+	.4byte	0xdd4
+	.4byte	.LLST199
+	.uleb128 0x52
+	.4byte	.LASF864
+	.byte	0x3
+	.2byte	0x119
+	.4byte	0xdd4
+	.4byte	.LLST200
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x722a
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.6105
+	.uleb128 0x45
+	.8byte	.LVL739
+	.4byte	0x2c2b
+	.uleb128 0x45
+	.8byte	.LVL740
+	.4byte	0x2c2b
+	.uleb128 0x34
+	.8byte	.LVL742
+	.4byte	0x2c2b
+	.4byte	0x8835
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL743
+	.4byte	0x2c2b
+	.4byte	0x884d
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL744
+	.4byte	0x2c2b
+	.4byte	0x8865
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL745
+	.4byte	0x2c2b
+	.4byte	0x887d
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL746
+	.4byte	0x2c2b
+	.4byte	0x8895
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL749
+	.4byte	0x2c2b
+	.4byte	0x88ad
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL750
+	.4byte	0x2c2b
+	.4byte	0x88c5
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL751
+	.4byte	0x2c2b
+	.4byte	0x88dd
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL752
+	.4byte	0x2c2b
+	.uleb128 0x34
+	.8byte	.LVL753
+	.4byte	0x2c2b
+	.4byte	0x8902
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL754
+	.4byte	0x2c2b
+	.4byte	0x891a
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL756
+	.4byte	0x2c2b
+	.uleb128 0x34
+	.8byte	.LVL758
+	.4byte	0x2c2b
+	.4byte	0x893f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8c
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL759
+	.4byte	0x2c2b
+	.4byte	0x8959
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x8c
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL761
+	.4byte	0x2c2b
+	.uleb128 0x45
+	.8byte	.LVL762
+	.4byte	0x2c2b
+	.uleb128 0x45
+	.8byte	.LVL763
+	.4byte	0x2c2b
+	.uleb128 0x34
+	.8byte	.LVL765
+	.4byte	0x2c2b
+	.4byte	0x8998
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8c
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL767
+	.4byte	0x2c2b
+	.uleb128 0x34
+	.8byte	.LVL769
+	.4byte	0x2c2b
+	.4byte	0x89bd
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL770
+	.4byte	0x2c2b
+	.4byte	0x89d5
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL771
+	.4byte	0x2c2b
+	.uleb128 0x45
+	.8byte	.LVL772
+	.4byte	0x2c2b
+	.uleb128 0x45
+	.8byte	.LVL773
+	.4byte	0x2c2b
+	.uleb128 0x45
+	.8byte	.LVL774
+	.4byte	0x2c2b
+	.uleb128 0x45
+	.8byte	.LVL775
+	.4byte	0x2c2b
+	.uleb128 0x34
+	.8byte	.LVL776
+	.4byte	0x259f
+	.4byte	0x8a2d
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL778
+	.4byte	0x2c2b
+	.uleb128 0x45
+	.8byte	.LVL780
+	.4byte	0x2c2b
+	.uleb128 0x45
+	.8byte	.LVL783
+	.4byte	0x2c2b
+	.uleb128 0x45
+	.8byte	.LVL786
+	.4byte	0x2c2b
+	.uleb128 0x45
+	.8byte	.LVL789
+	.4byte	0x2c2b
+	.uleb128 0x45
+	.8byte	.LVL793
+	.4byte	0x2c2b
+	.uleb128 0x36
+	.8byte	.LVL796
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC82
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR138
+	.byte	0
+	.byte	0
+	.uleb128 0x2d
+	.4byte	.LASF865
+	.byte	0x3
+	.byte	0xb6
+	.4byte	0x5b
+	.8byte	.LFB205
+	.8byte	.LFE205-.LFB205
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8b14
+	.uleb128 0x2e
+	.4byte	.LASF846
+	.byte	0x3
+	.byte	0xb6
+	.4byte	0x8327
+	.4byte	.LLST8
+	.uleb128 0x33
+	.string	"i"
+	.byte	0x3
+	.byte	0xb8
+	.4byte	0xdd4
+	.4byte	.LLST9
+	.uleb128 0x45
+	.8byte	.LVL30
+	.4byte	0x8b5d
+	.uleb128 0x34
+	.8byte	.LVL31
+	.4byte	0x8b5d
+	.4byte	0x8b06
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL33
+	.4byte	0x8b14
+	.byte	0
+	.uleb128 0x2d
+	.4byte	.LASF866
+	.byte	0x3
+	.byte	0xa4
+	.4byte	0x5b
+	.8byte	.LFB204
+	.8byte	.LFE204-.LFB204
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8b45
+	.uleb128 0x2e
+	.4byte	.LASF867
+	.byte	0x3
+	.byte	0xa4
+	.4byte	0xdc9
+	.4byte	.LLST7
+	.byte	0
+	.uleb128 0x63
+	.4byte	.LASF868
+	.byte	0x3
+	.byte	0x9e
+	.byte	0x1
+	.4byte	0x8b5d
+	.uleb128 0x38
+	.4byte	.LASF869
+	.byte	0x3
+	.byte	0x9e
+	.4byte	0xdd4
+	.byte	0
+	.uleb128 0x2d
+	.4byte	.LASF870
+	.byte	0x3
+	.byte	0x7f
+	.4byte	0xdc9
+	.8byte	.LFB202
+	.8byte	.LFE202-.LFB202
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8baa
+	.uleb128 0x31
+	.string	"num"
+	.byte	0x3
+	.byte	0x7f
+	.4byte	0xdd4
+	.4byte	.LLST4
+	.uleb128 0x33
+	.string	"i"
+	.byte	0x3
+	.byte	0x81
+	.4byte	0xdc9
+	.4byte	.LLST5
+	.uleb128 0x32
+	.4byte	.LASF871
+	.byte	0x3
+	.byte	0x82
+	.4byte	0xdd4
+	.4byte	.LLST6
+	.byte	0
+	.uleb128 0x2d
+	.4byte	.LASF872
+	.byte	0x3
+	.byte	0x71
+	.4byte	0x5b
+	.8byte	.LFB201
+	.8byte	.LFE201-.LFB201
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8c30
+	.uleb128 0x2e
+	.4byte	.LASF299
+	.byte	0x3
+	.byte	0x71
+	.4byte	0xfa
+	.4byte	.LLST112
+	.uleb128 0x33
+	.string	"buf"
+	.byte	0x3
+	.byte	0x73
+	.4byte	0xfa
+	.4byte	.LLST113
+	.uleb128 0x34
+	.8byte	.LVL470
+	.4byte	0xa8e4
+	.4byte	0x8c1b
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC71
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC70
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL472
+	.4byte	0x8c30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x2d
+	.4byte	.LASF873
+	.byte	0x3
+	.byte	0xb
+	.4byte	0x5b
+	.8byte	.LFB200
+	.8byte	.LFE200-.LFB200
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x96be
+	.uleb128 0x2e
+	.4byte	.LASF299
+	.byte	0x3
+	.byte	0xb
+	.4byte	0xfa
+	.4byte	.LLST107
+	.uleb128 0x33
+	.string	"i"
+	.byte	0x3
+	.byte	0xd
+	.4byte	0x5b
+	.4byte	.LLST108
+	.uleb128 0x33
+	.string	"buf"
+	.byte	0x3
+	.byte	0xe
+	.4byte	0xfa
+	.4byte	.LLST109
+	.uleb128 0x61
+	.8byte	.LBB203
+	.8byte	.LBE203-.LBB203
+	.4byte	0x8cd8
+	.uleb128 0x32
+	.4byte	.LASF608
+	.byte	0x3
+	.byte	0x57
+	.4byte	0xdc9
+	.4byte	.LLST110
+	.uleb128 0x34
+	.8byte	.LVL455
+	.4byte	0x65c9
+	.4byte	0x8cb7
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL459
+	.4byte	0xa8e4
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 -1
+	.byte	0
+	.byte	0
+	.uleb128 0x61
+	.8byte	.LBB204
+	.8byte	.LBE204-.LBB204
+	.4byte	0x8d1d
+	.uleb128 0x32
+	.4byte	.LASF608
+	.byte	0x3
+	.byte	0x60
+	.4byte	0xdc9
+	.4byte	.LLST111
+	.uleb128 0x36
+	.8byte	.LVL466
+	.4byte	0xa8e4
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 -1
+	.byte	0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL318
+	.4byte	0xa8e4
+	.4byte	0x8d42
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC2
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL320
+	.4byte	0xa8e4
+	.4byte	0x8d67
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC3
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL322
+	.4byte	0xa8e4
+	.4byte	0x8d8c
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC4
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL324
+	.4byte	0xa8e4
+	.4byte	0x8db1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC5
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL326
+	.4byte	0xa8e4
+	.4byte	0x8dd6
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC6
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL328
+	.4byte	0xa8e4
+	.4byte	0x8dfb
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC7
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL330
+	.4byte	0xa8e4
+	.4byte	0x8e20
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC8
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL332
+	.4byte	0xa8e4
+	.4byte	0x8e45
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC9
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL334
+	.4byte	0xa8e4
+	.4byte	0x8e6a
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC10
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL336
+	.4byte	0xa8e4
+	.4byte	0x8e8f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC11
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL338
+	.4byte	0xa8e4
+	.4byte	0x8eb4
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC12
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL340
+	.4byte	0xa8e4
+	.4byte	0x8ed9
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC13
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL342
+	.4byte	0xa8e4
+	.4byte	0x8efe
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC14
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL344
+	.4byte	0xa8e4
+	.4byte	0x8f23
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC15
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL346
+	.4byte	0xa8e4
+	.4byte	0x8f48
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC16
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL348
+	.4byte	0xa8e4
+	.4byte	0x8f6d
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC17
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL350
+	.4byte	0xa8e4
+	.4byte	0x8f92
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC18
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL352
+	.4byte	0xa8e4
+	.4byte	0x8fb7
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC19
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL354
+	.4byte	0xa8e4
+	.4byte	0x8fdc
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC20
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL356
+	.4byte	0xa8e4
+	.4byte	0x9001
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC21
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL358
+	.4byte	0xa8e4
+	.4byte	0x9026
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC22
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL360
+	.4byte	0xa8e4
+	.4byte	0x904b
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC23
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL362
+	.4byte	0xa8e4
+	.4byte	0x9070
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC24
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL364
+	.4byte	0xa8e4
+	.4byte	0x9095
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC25
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL366
+	.4byte	0xa8e4
+	.4byte	0x90ba
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC26
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL368
+	.4byte	0xa8e4
+	.4byte	0x90df
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC27
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL370
+	.4byte	0xa8e4
+	.4byte	0x9104
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC28
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL372
+	.4byte	0xa8e4
+	.4byte	0x9129
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC29
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL374
+	.4byte	0xa8e4
+	.4byte	0x914e
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL376
+	.4byte	0xa8e4
+	.4byte	0x9173
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL378
+	.4byte	0xa8e4
+	.4byte	0x9198
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC32
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL380
+	.4byte	0xa8e4
+	.4byte	0x91bd
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC33
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL382
+	.4byte	0xa8e4
+	.4byte	0x91e2
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC34
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL384
+	.4byte	0xa8e4
+	.4byte	0x9207
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC35
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL386
+	.4byte	0xa8e4
+	.4byte	0x922c
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC36
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL388
+	.4byte	0xa8e4
+	.4byte	0x9251
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC37
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL390
+	.4byte	0xa8e4
+	.4byte	0x9276
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
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+	.byte	0
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+	.byte	0
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+	.byte	0
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+	.uleb128 0x1
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+	.byte	0
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+	.uleb128 0x1
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+	.8byte	.LC49
+	.byte	0
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+	.uleb128 0x1
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+	.byte	0
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+	.byte	0
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+	.uleb128 0x71
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+	.uleb128 0x1
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+	.8byte	.LFE252-.LFB252
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x9aa0
+	.uleb128 0x5c
+	.4byte	0x655b
+	.4byte	.LLST70
+	.uleb128 0x6f
+	.4byte	0x6567
+	.uleb128 0x6f
+	.4byte	0x6573
+	.uleb128 0x6f
+	.4byte	0x657f
+	.uleb128 0x6f
+	.4byte	0x658b
+	.uleb128 0x6f
+	.4byte	0x6597
+	.uleb128 0x6f
+	.4byte	0x65a3
+	.uleb128 0x6f
+	.4byte	0x65af
+	.uleb128 0x6f
+	.4byte	0x65bb
+	.uleb128 0x66
+	.8byte	.LBB185
+	.8byte	.LBE185-.LBB185
+	.uleb128 0x5c
+	.4byte	0x655b
+	.4byte	.LLST71
+	.uleb128 0x66
+	.8byte	.LBB186
+	.8byte	.LBE186-.LBB186
+	.uleb128 0x6e
+	.4byte	0x9967
+	.4byte	.LLST72
+	.uleb128 0x6e
+	.4byte	0x996c
+	.4byte	.LLST73
+	.uleb128 0x6e
+	.4byte	0x9971
+	.4byte	.LLST74
+	.uleb128 0x6e
+	.4byte	0x9976
+	.4byte	.LLST75
+	.uleb128 0x6e
+	.4byte	0x997b
+	.4byte	.LLST76
+	.uleb128 0x6e
+	.4byte	0x9980
+	.4byte	.LLST77
+	.uleb128 0x6e
+	.4byte	0x9985
+	.4byte	.LLST78
+	.uleb128 0x6f
+	.4byte	0x998a
+	.uleb128 0x34
+	.8byte	.LVL205
+	.4byte	0xa8ce
+	.4byte	0x9a31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR54
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x1aa
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL213
+	.4byte	0x66e6
+	.4byte	0x9a56
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR42
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL214
+	.4byte	0xa8ce
+	.4byte	0x9a89
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR54
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x1b3
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL215
+	.4byte	0x68bb
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x6b
+	.4byte	0x6287
+	.8byte	.LFB255
+	.8byte	.LFE255-.LFB255
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x9b58
+	.uleb128 0x5c
+	.4byte	0x6298
+	.4byte	.LLST79
+	.uleb128 0x6e
+	.4byte	0x62a4
+	.4byte	.LLST80
+	.uleb128 0x6e
+	.4byte	0x62b0
+	.4byte	.LLST81
+	.uleb128 0x6f
+	.4byte	0x62bc
+	.uleb128 0x61
+	.8byte	.LBB189
+	.8byte	.LBE189-.LBB189
+	.4byte	0x9b4a
+	.uleb128 0x5c
+	.4byte	0x6298
+	.4byte	.LLST82
+	.uleb128 0x66
+	.8byte	.LBB190
+	.8byte	.LBE190-.LBB190
+	.uleb128 0x6f
+	.4byte	0x9ac4
+	.uleb128 0x6f
+	.4byte	0x9acd
+	.uleb128 0x6f
+	.4byte	0x9ad6
+	.uleb128 0x36
+	.8byte	.LVL221
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR55
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x214
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL223
+	.4byte	0x6905
+	.byte	0
+	.uleb128 0x6b
+	.4byte	0x58c9
+	.8byte	.LFB266
+	.8byte	.LFE266-.LFB266
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x9b9e
+	.uleb128 0x5c
+	.4byte	0x58d6
+	.4byte	.LLST86
+	.uleb128 0x73
+	.4byte	0x58e2
+	.byte	0
+	.uleb128 0x71
+	.4byte	.Ldebug_ranges0+0x60
+	.uleb128 0x6c
+	.4byte	0x58d6
+	.uleb128 0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.uleb128 0x71
+	.4byte	.Ldebug_ranges0+0x60
+	.uleb128 0x6f
+	.4byte	0x9b7c
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x6b
+	.4byte	0x5398
+	.8byte	.LFB272
+	.8byte	.LFE272-.LFB272
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x9bea
+	.uleb128 0x5c
+	.4byte	0x53a5
+	.4byte	.LLST87
+	.uleb128 0x5c
+	.4byte	0x53b1
+	.4byte	.LLST88
+	.uleb128 0x2f
+	.8byte	.LVL257
+	.4byte	0x9720
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3e
+	.4byte	0x53b1
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0
+	.byte	0
+	.uleb128 0x6b
+	.4byte	0x46ef
+	.8byte	.LFB282
+	.8byte	.LFE282-.LFB282
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x9c48
+	.uleb128 0x6c
+	.4byte	0x46fc
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x6f
+	.4byte	0x4708
+	.uleb128 0x66
+	.8byte	.LBB201
+	.8byte	.LBE201-.LBB201
+	.uleb128 0x5c
+	.4byte	0x46fc
+	.4byte	.LLST93
+	.uleb128 0x66
+	.8byte	.LBB202
+	.8byte	.LBE202-.LBB202
+	.uleb128 0x6e
+	.4byte	0x9c0c
+	.4byte	.LLST94
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x6b
+	.4byte	0x3d17
+	.8byte	.LFB297
+	.8byte	.LFE297-.LFB297
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x9c91
+	.uleb128 0x5c
+	.4byte	0x3d28
+	.4byte	.LLST121
+	.uleb128 0x71
+	.4byte	.Ldebug_ranges0+0xa0
+	.uleb128 0x5c
+	.4byte	0x3d28
+	.4byte	.LLST122
+	.uleb128 0x36
+	.8byte	.LVL504
+	.4byte	0x68e0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x6b
+	.4byte	0x2e49
+	.8byte	.LFB316
+	.8byte	.LFE316-.LFB316
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x9cc7
+	.uleb128 0x45
+	.8byte	.LVL576
+	.4byte	0x6cf6
+	.uleb128 0x45
+	.8byte	.LVL577
+	.4byte	0x2ef8
+	.byte	0
+	.uleb128 0x6b
+	.4byte	0x2d9f
+	.8byte	.LFB318
+	.8byte	.LFE318-.LFB318
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x9dc1
+	.uleb128 0x73
+	.4byte	0x2db0
+	.byte	0
+	.uleb128 0x6f
+	.4byte	0x2dbc
+	.uleb128 0x6f
+	.4byte	0x2dc6
+	.uleb128 0x6f
+	.4byte	0x2dd2
+	.uleb128 0x40
+	.4byte	.Ldebug_ranges0+0x130
+	.4byte	0x9d96
+	.uleb128 0x6f
+	.4byte	0x9ce2
+	.uleb128 0x6e
+	.4byte	0x9ce8
+	.4byte	.LLST251
+	.uleb128 0x70
+	.4byte	0x9ced
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -100
+	.uleb128 0x70
+	.4byte	0x9cf2
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -64
+	.uleb128 0x61
+	.8byte	.LBB230
+	.8byte	.LBE230-.LBB230
+	.4byte	0x9d7b
+	.uleb128 0x70
+	.4byte	0x2de3
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -96
+	.uleb128 0x34
+	.8byte	.LVL966
+	.4byte	0x29a4
+	.4byte	0x9d60
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 96
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL967
+	.4byte	0x6cf6
+	.uleb128 0x45
+	.8byte	.LVL968
+	.4byte	0x2ef8
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL965
+	.4byte	0x5bbb
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 92
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x66
+	.8byte	.LBB237
+	.8byte	.LBE237-.LBB237
+	.uleb128 0x70
+	.4byte	0x2df1
+	.uleb128 0x12
+	.byte	0x40
+	.byte	0x45
+	.byte	0x24
+	.byte	0x3
+	.8byte	g_max_erase_count
+	.byte	0x94
+	.byte	0x4
+	.byte	0x3a
+	.byte	0x25
+	.byte	0x26
+	.byte	0x9f
+	.byte	0
+	.byte	0
+	.uleb128 0x6b
+	.4byte	0x26cd
+	.8byte	.LFB343
+	.8byte	.LFE343-.LFB343
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x9ef5
+	.uleb128 0x5c
+	.4byte	0x26dd
+	.4byte	.LLST297
+	.uleb128 0x73
+	.4byte	0x26e8
+	.byte	0
+	.uleb128 0x6f
+	.4byte	0x26f3
+	.uleb128 0x6f
+	.4byte	0x26fe
+	.uleb128 0x66
+	.8byte	.LBB242
+	.8byte	.LBE242-.LBB242
+	.uleb128 0x5c
+	.4byte	0x26dd
+	.4byte	.LLST298
+	.uleb128 0x66
+	.8byte	.LBB243
+	.8byte	.LBE243-.LBB243
+	.uleb128 0x6f
+	.4byte	0x9de5
+	.uleb128 0x70
+	.4byte	0x9deb
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -64
+	.uleb128 0x70
+	.4byte	0x9df0
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -96
+	.uleb128 0x74
+	.4byte	0x2709
+	.8byte	.LDL1
+	.uleb128 0x34
+	.8byte	.LVL1218
+	.4byte	0x259f
+	.4byte	0x9e68
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 80
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xa5
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1220
+	.4byte	0x259f
+	.4byte	0x9e8b
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x5a
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x38
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1221
+	.4byte	0x2721
+	.4byte	0x9ead
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8f
+	.sleb128 48
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1222
+	.4byte	0x27e7
+	.4byte	0x9ed4
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8f
+	.sleb128 48
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL1224
+	.4byte	0x2721
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8f
+	.sleb128 48
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x6b
+	.4byte	0x2dff
+	.8byte	.LFB317
+	.8byte	.LFE317-.LFB317
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x9fce
+	.uleb128 0x5c
+	.4byte	0x2e10
+	.4byte	.LLST318
+	.uleb128 0x6f
+	.4byte	0x2e1c
+	.uleb128 0x6f
+	.4byte	0x2e28
+	.uleb128 0x6f
+	.4byte	0x2e32
+	.uleb128 0x6f
+	.4byte	0x2e3c
+	.uleb128 0x71
+	.4byte	.Ldebug_ranges0+0x1b0
+	.uleb128 0x6d
+	.4byte	0x2e10
+	.uleb128 0x71
+	.4byte	.Ldebug_ranges0+0x1b0
+	.uleb128 0x6e
+	.4byte	0x9f19
+	.4byte	.LLST319
+	.uleb128 0x70
+	.4byte	0x9f1e
+	.uleb128 0x1
+	.byte	0x64
+	.uleb128 0x6e
+	.4byte	0x9f23
+	.4byte	.LLST320
+	.uleb128 0x70
+	.4byte	0x9f28
+	.uleb128 0x1
+	.byte	0x6a
+	.uleb128 0x45
+	.8byte	.LVL1311
+	.4byte	0x2e49
+	.uleb128 0x34
+	.8byte	.LVL1314
+	.4byte	0x6d91
+	.4byte	0x9f81
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1318
+	.4byte	0xa8ce
+	.4byte	0x9fa6
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC97
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1319
+	.4byte	0x7574
+	.4byte	0x9fbe
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1320
+	.4byte	0x72c7
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x6b
+	.4byte	0x3749
+	.8byte	.LFB301
+	.8byte	.LFE301-.LFB301
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xa0f9
+	.uleb128 0x5c
+	.4byte	0x375a
+	.4byte	.LLST321
+	.uleb128 0x6f
+	.4byte	0x3766
+	.uleb128 0x61
+	.8byte	.LBB256
+	.8byte	.LBE256-.LBB256
+	.4byte	0xa0e4
+	.uleb128 0x5c
+	.4byte	0x375a
+	.4byte	.LLST322
+	.uleb128 0x66
+	.8byte	.LBB257
+	.8byte	.LBE257-.LBB257
+	.uleb128 0x6f
+	.4byte	0x9ff2
+	.uleb128 0x34
+	.8byte	.LVL1329
+	.4byte	0x66e6
+	.4byte	0xa050
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR42
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1330
+	.4byte	0xa8ce
+	.4byte	0xa083
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR159
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xa88
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1331
+	.4byte	0x3d17
+	.4byte	0xa09b
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1332
+	.4byte	0x2dff
+	.4byte	0xa0b3
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL1333
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR159
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xa8b
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL1336
+	.4byte	0x654a
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x6b
+	.4byte	0x57c8
+	.8byte	.LFB268
+	.8byte	.LFE268-.LFB268
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xa1f2
+	.uleb128 0x71
+	.4byte	.Ldebug_ranges0+0x1f0
+	.uleb128 0x6e
+	.4byte	0x57d6
+	.4byte	.LLST325
+	.uleb128 0x70
+	.4byte	0x57e2
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x6e
+	.4byte	0x57ee
+	.4byte	.LLST326
+	.uleb128 0x70
+	.4byte	0x57fa
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -32
+	.uleb128 0x6e
+	.4byte	0x5806
+	.4byte	.LLST327
+	.uleb128 0x34
+	.8byte	.LVL1349
+	.4byte	0x5bbb
+	.4byte	0xa168
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 156
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1351
+	.4byte	0x29a4
+	.4byte	0xa18b
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 160
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1355
+	.4byte	0x259f
+	.4byte	0xa1a3
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1357
+	.4byte	0x3789
+	.4byte	0xa1bb
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1358
+	.4byte	0x27e7
+	.4byte	0xa1e3
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 160
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1359
+	.4byte	0x3645
+	.byte	0
+	.byte	0
+	.uleb128 0x6b
+	.4byte	0x4444
+	.8byte	.LFB286
+	.8byte	.LFE286-.LFB286
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xa233
+	.uleb128 0x2f
+	.8byte	.LVL1619
+	.4byte	0x5a7d
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR83
+	.byte	0
+	.byte	0
+	.uleb128 0x6b
+	.4byte	0x53be
+	.8byte	.LFB271
+	.8byte	.LFE271-.LFB271
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xa2a6
+	.uleb128 0x34
+	.8byte	.LVL1656
+	.4byte	0x5955
+	.4byte	0xa266
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x40
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1657
+	.4byte	0xa8ce
+	.4byte	0xa292
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC71
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC100
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL1658
+	.4byte	0x259f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x6b
+	.4byte	0x30c4
+	.8byte	.LFB311
+	.8byte	.LFE311-.LFB311
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xa30c
+	.uleb128 0x34
+	.8byte	.LVL1799
+	.4byte	0x30cd
+	.4byte	0xa2d9
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1800
+	.4byte	0x5814
+	.4byte	0xa2f8
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR144
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL1801
+	.4byte	0x32a5
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x6b
+	.4byte	0x2cb7
+	.8byte	.LFB319
+	.8byte	.LFE319-.LFB319
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xa6ce
+	.uleb128 0x5c
+	.4byte	0x2cc8
+	.4byte	.LLST411
+	.uleb128 0x5c
+	.4byte	0x2cd4
+	.4byte	.LLST412
+	.uleb128 0x73
+	.4byte	0x2ce0
+	.byte	0x1
+	.uleb128 0x6f
+	.4byte	0x2cec
+	.uleb128 0x6f
+	.4byte	0x2cf8
+	.uleb128 0x75
+	.4byte	0x2d04
+	.sleb128 -1
+	.uleb128 0x6f
+	.4byte	0x2d10
+	.uleb128 0x6f
+	.4byte	0x2d1c
+	.uleb128 0x6f
+	.4byte	0x2d28
+	.uleb128 0x6f
+	.4byte	0x2d34
+	.uleb128 0x6f
+	.4byte	0x2d40
+	.uleb128 0x6f
+	.4byte	0x2d4c
+	.uleb128 0x6f
+	.4byte	0x2d68
+	.uleb128 0x40
+	.4byte	.Ldebug_ranges0+0x2a0
+	.4byte	0xa6ba
+	.uleb128 0x5c
+	.4byte	0x2cd4
+	.4byte	.LLST413
+	.uleb128 0x5c
+	.4byte	0x2cc8
+	.4byte	.LLST414
+	.uleb128 0x71
+	.4byte	.Ldebug_ranges0+0x2a0
+	.uleb128 0x6f
+	.4byte	0xa339
+	.uleb128 0x6e
+	.4byte	0xa33f
+	.4byte	.LLST415
+	.uleb128 0x70
+	.4byte	0xa344
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -4
+	.uleb128 0x6f
+	.4byte	0xa349
+	.uleb128 0x6e
+	.4byte	0xa34f
+	.4byte	.LLST416
+	.uleb128 0x6e
+	.4byte	0xa354
+	.4byte	.LLST417
+	.uleb128 0x6e
+	.4byte	0xa359
+	.4byte	.LLST418
+	.uleb128 0x6e
+	.4byte	0xa35e
+	.4byte	.LLST419
+	.uleb128 0x6e
+	.4byte	0xa363
+	.4byte	.LLST420
+	.uleb128 0x6e
+	.4byte	0xa368
+	.4byte	.LLST421
+	.uleb128 0x76
+	.4byte	0x2d58
+	.uleb128 0x76
+	.4byte	0x2d60
+	.uleb128 0x6f
+	.4byte	0xa36d
+	.uleb128 0x40
+	.4byte	.Ldebug_ranges0+0x2d0
+	.4byte	0xa46f
+	.uleb128 0x6e
+	.4byte	0x2d76
+	.4byte	.LLST422
+	.uleb128 0x45
+	.8byte	.LVL1834
+	.4byte	0x3d35
+	.uleb128 0x34
+	.8byte	.LVL1837
+	.4byte	0x65c9
+	.4byte	0xa429
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x40
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1840
+	.4byte	0x65c9
+	.4byte	0xa440
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1843
+	.4byte	0x2e49
+	.uleb128 0x36
+	.8byte	.LVL1852
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC104
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1864
+	.4byte	0x3534
+	.uleb128 0x34
+	.8byte	.LVL1865
+	.4byte	0x4593
+	.4byte	0xa494
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1867
+	.4byte	0x65c9
+	.4byte	0xa4ac
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1872
+	.4byte	0x2d9f
+	.uleb128 0x34
+	.8byte	.LVL1874
+	.4byte	0x65c9
+	.4byte	0xa4d0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1876
+	.4byte	0x3645
+	.4byte	0xa4e8
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x9
+	.byte	0xff
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1881
+	.4byte	0x3534
+	.4byte	0xa500
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1882
+	.4byte	0x3645
+	.4byte	0xa518
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x9
+	.byte	0xff
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1883
+	.4byte	0xa8ce
+	.4byte	0xa54b
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR177
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x296
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1884
+	.4byte	0xa8ce
+	.4byte	0xa57e
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR177
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x297
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1885
+	.4byte	0xa8ce
+	.4byte	0xa5b1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR177
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x298
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1886
+	.4byte	0x4593
+	.4byte	0xa5c9
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1887
+	.4byte	0x2d9f
+	.uleb128 0x34
+	.8byte	.LVL1901
+	.4byte	0x29a4
+	.4byte	0xa5ee
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1910
+	.4byte	0xa8ce
+	.4byte	0xa621
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR177
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x2bc
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1912
+	.4byte	0x5bbb
+	.4byte	0xa63f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 348
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1913
+	.4byte	0x3012
+	.uleb128 0x34
+	.8byte	.LVL1914
+	.4byte	0x3572
+	.4byte	0xa66a
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1915
+	.4byte	0x2f4c
+	.uleb128 0x45
+	.8byte	.LVL1919
+	.4byte	0x2f4c
+	.uleb128 0x45
+	.8byte	.LVL1920
+	.4byte	0x3749
+	.uleb128 0x45
+	.8byte	.LVL1921
+	.4byte	0x7cda
+	.uleb128 0x45
+	.8byte	.LVL1922
+	.4byte	0x5ce8
+	.uleb128 0x45
+	.8byte	.LVL1923
+	.4byte	0x5619
+	.byte	0
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL1847
+	.4byte	0x32a5
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x6b
+	.4byte	0x3f1d
+	.8byte	.LFB292
+	.8byte	.LFE292-.LFB292
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xa8ab
+	.uleb128 0x73
+	.4byte	0x3f2e
+	.byte	0
+	.uleb128 0x61
+	.8byte	.LBB300
+	.8byte	.LBE300-.LBB300
+	.4byte	0xa815
+	.uleb128 0x6f
+	.4byte	0xa6e9
+	.uleb128 0x61
+	.8byte	.LBB301
+	.8byte	.LBE301-.LBB301
+	.4byte	0xa728
+	.uleb128 0x6e
+	.4byte	0x3f39
+	.4byte	.LLST462
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2107
+	.4byte	0x432b
+	.4byte	0xa740
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2108
+	.4byte	0x432b
+	.4byte	0xa758
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2110
+	.4byte	0x5814
+	.4byte	0xa777
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR144
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2111
+	.4byte	0x5814
+	.4byte	0xa796
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR149
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL2112
+	.4byte	0x5ce8
+	.uleb128 0x45
+	.8byte	.LVL2113
+	.4byte	0x5619
+	.uleb128 0x45
+	.8byte	.LVL2114
+	.4byte	0x5619
+	.uleb128 0x45
+	.8byte	.LVL2118
+	.4byte	0x2ef8
+	.uleb128 0x45
+	.8byte	.LVL2119
+	.4byte	0x2ef8
+	.uleb128 0x34
+	.8byte	.LVL2120
+	.4byte	0x38b7
+	.4byte	0xa7ef
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
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+	.4byte	0x38b7
+	.4byte	0xa807
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
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+	.4byte	0x41e2
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL2094
+	.4byte	0x6b5e
+	.uleb128 0x45
+	.8byte	.LVL2095
+	.4byte	0x53cb
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+	.8byte	.LVL2096
+	.4byte	0x5186
+	.uleb128 0x45
+	.8byte	.LVL2097
+	.4byte	0x4ec5
+	.uleb128 0x45
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+	.4byte	0x4f6a
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+	.4byte	0x43e3
+	.uleb128 0x45
+	.8byte	.LVL2100
+	.4byte	0x53be
+	.uleb128 0x45
+	.8byte	.LVL2101
+	.4byte	0x69ea
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+	.uleb128 0x45
+	.8byte	.LVL2103
+	.4byte	0x464b
+	.uleb128 0x36
+	.8byte	.LVL2104
+	.4byte	0x58c9
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
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+	.uleb128 0x77
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+	.byte	0xa
+	.byte	0x72
+	.uleb128 0x78
+	.4byte	.LASF875
+	.4byte	.LASF875
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+	.uleb128 0x78
+	.4byte	.LASF876
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+	.2byte	0x16c
+	.uleb128 0x77
+	.4byte	.LASF877
+	.4byte	.LASF877
+	.byte	0x1d
+	.byte	0x12
+	.uleb128 0x77
+	.4byte	.LASF878
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+	.uleb128 0x77
+	.4byte	.LASF879
+	.4byte	.LASF879
+	.byte	0x1e
+	.byte	0x6d
+	.byte	0
+	.section	.debug_abbrev,"",@progbits
+.Ldebug_abbrev0:
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+	.uleb128 0x7
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+	.uleb128 0x1c
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+	.byte	0
+	.byte	0
+	.uleb128 0x76
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+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x77
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
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+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
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+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x78
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.byte	0
+	.section	.debug_loc,"",@progbits
+.Ldebug_loc0:
+.LLST468:
+	.8byte	.LVL2175
+	.8byte	.LVL2176-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL2176-1
+	.8byte	.LFE347
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST469:
+	.8byte	.LVL2175
+	.8byte	.LVL2176-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL2176-1
+	.8byte	.LFE347
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST470:
+	.8byte	.LVL2175
+	.8byte	.LVL2176-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL2176-1
+	.8byte	.LFE347
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST303:
+	.8byte	.LVL1240
+	.8byte	.LVL1241-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1241-1
+	.8byte	.LFE346
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST304:
+	.8byte	.LVL1240
+	.8byte	.LVL1241-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1241-1
+	.8byte	.LFE346
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST305:
+	.8byte	.LVL1240
+	.8byte	.LVL1241-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL1241-1
+	.8byte	.LFE346
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST196:
+	.8byte	.LVL737
+	.8byte	.LVL738-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL738-1
+	.8byte	.LFE345
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST197:
+	.8byte	.LVL737
+	.8byte	.LVL738-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL738-1
+	.8byte	.LFE345
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST198:
+	.8byte	.LVL737
+	.8byte	.LVL738-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL738-1
+	.8byte	.LFE345
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST299:
+	.8byte	.LVL1226
+	.8byte	.LVL1228-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1228-1
+	.8byte	.LVL1236
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1236
+	.8byte	.LVL1237
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL1237
+	.8byte	.LFE344
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST300:
+	.8byte	.LVL1226
+	.8byte	.LVL1227
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1227
+	.8byte	.LVL1236
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL1236
+	.8byte	.LVL1237
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL1237
+	.8byte	.LFE344
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST301:
+	.8byte	.LVL1230
+	.8byte	.LVL1231
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1232
+	.8byte	.LVL1233
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1233
+	.8byte	.LFE344
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST302:
+	.8byte	.LVL1234
+	.8byte	.LVL1235
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1237
+	.8byte	.LVL1238
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1238
+	.8byte	.LVL1239
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST175:
+	.8byte	.LVL662
+	.8byte	.LVL666
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL666
+	.8byte	.LFE342
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST176:
+	.8byte	.LVL662
+	.8byte	.LVL663
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL663
+	.8byte	.LFE342
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST177:
+	.8byte	.LVL662
+	.8byte	.LVL664
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL664
+	.8byte	.LFE342
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST178:
+	.8byte	.LVL665
+	.8byte	.LVL666
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST179:
+	.8byte	.LVL670
+	.8byte	.LVL671
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL672
+	.8byte	.LVL673
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL674
+	.8byte	.LVL675
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST180:
+	.8byte	.LVL662
+	.8byte	.LVL666
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL666
+	.8byte	.LFE342
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST181:
+	.8byte	.LVL665
+	.8byte	.LVL667
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL668
+	.8byte	.LFE342
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST167:
+	.8byte	.LVL638
+	.8byte	.LVL643
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL643
+	.8byte	.LVL644
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL644
+	.8byte	.LVL647
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL647
+	.8byte	.LVL656
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL656
+	.8byte	.LVL661
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL661
+	.8byte	.LFE341
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST168:
+	.8byte	.LVL638
+	.8byte	.LVL639
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL639
+	.8byte	.LFE341
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST169:
+	.8byte	.LVL638
+	.8byte	.LVL640
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL640
+	.8byte	.LVL645
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL645
+	.8byte	.LVL647
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	.LVL647
+	.8byte	.LFE341
+	.2byte	0x1
+	.byte	0x69
+	.8byte	0
+	.8byte	0
+.LLST170:
+	.8byte	.LVL638
+	.8byte	.LVL641
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL641
+	.8byte	.LVL644
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL644
+	.8byte	.LVL647
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL647
+	.8byte	.LVL656
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL656
+	.8byte	.LVL661
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL661
+	.8byte	.LFE341
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	0
+	.8byte	0
+.LLST171:
+	.8byte	.LVL642
+	.8byte	.LVL643
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST172:
+	.8byte	.LVL650
+	.8byte	.LVL651
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL652
+	.8byte	.LVL653
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL654
+	.8byte	.LVL655
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST173:
+	.8byte	.LVL642
+	.8byte	.LVL646
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL647
+	.8byte	.LFE341
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	0
+	.8byte	0
+.LLST174:
+	.8byte	.LVL642
+	.8byte	.LVL643
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL643
+	.8byte	.LVL644
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL644
+	.8byte	.LVL647
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL647
+	.8byte	.LVL656
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL656
+	.8byte	.LVL661
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL661
+	.8byte	.LFE341
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST152:
+	.8byte	.LVL595
+	.8byte	.LVL599
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL599
+	.8byte	.LFE340
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST153:
+	.8byte	.LVL595
+	.8byte	.LVL597
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL597
+	.8byte	.LFE340
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST154:
+	.8byte	.LVL595
+	.8byte	.LVL596
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL596
+	.8byte	.LFE340
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST155:
+	.8byte	.LVL598
+	.8byte	.LVL599
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST156:
+	.8byte	.LVL604
+	.8byte	.LVL605
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL605
+	.8byte	.LVL606-1
+	.2byte	0x2
+	.byte	0x83
+	.sleb128 0
+	.8byte	.LVL606
+	.8byte	.LVL607
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST157:
+	.8byte	.LVL598
+	.8byte	.LVL600
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL601
+	.8byte	.LFE340
+	.2byte	0x1
+	.byte	0x69
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL580
+	.8byte	.LVL582
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL582
+	.8byte	.LVL586
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL586
+	.8byte	.LVL587
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL587
+	.8byte	.LFE338
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL580
+	.8byte	.LVL582
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL582
+	.8byte	.LVL584
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL584
+	.8byte	.LVL587
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL587
+	.8byte	.LFE338
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL580
+	.8byte	.LVL582
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL582
+	.8byte	.LVL585
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL585
+	.8byte	.LVL587
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	.LVL587
+	.8byte	.LFE338
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL580
+	.8byte	.LVL582
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL582
+	.8byte	.LVL586
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL586
+	.8byte	.LVL587
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL587
+	.8byte	.LFE338
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL581
+	.8byte	.LVL582
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL582
+	.8byte	.LVL583
+	.2byte	0x1
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+	.8byte	.LVL587
+	.8byte	.LVL592
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL592
+	.8byte	.LVL593
+	.2byte	0x3
+	.byte	0x83
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL594
+	.8byte	.LFE338
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL581
+	.8byte	.LVL582
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL582
+	.8byte	.LVL583
+	.2byte	0x1
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+	.8byte	.LVL587
+	.8byte	.LVL591
+	.2byte	0x1
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+	.8byte	.LVL591
+	.8byte	.LVL592
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL592
+	.8byte	.LFE338
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL581
+	.8byte	.LVL582
+	.2byte	0x1
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+	.8byte	.LVL582
+	.8byte	.LVL584
+	.2byte	0x1
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+	.8byte	.LVL584
+	.8byte	.LVL587
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL587
+	.8byte	.LFE338
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL581
+	.8byte	.LVL582
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL582
+	.8byte	.LVL584
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL584
+	.8byte	.LVL587
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL587
+	.8byte	.LFE338
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL581
+	.8byte	.LVL582
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL582
+	.8byte	.LVL584
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL584
+	.8byte	.LVL587
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL587
+	.8byte	.LFE338
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL578
+	.8byte	.LVL579-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL579-1
+	.8byte	.LFE337
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST139:
+	.8byte	.LVL563
+	.8byte	.LVL564
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL564
+	.8byte	.LVL575
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL575
+	.8byte	.LFE315
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST140:
+	.8byte	.LVL569
+	.8byte	.LVL570
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL570
+	.8byte	.LVL571
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL572
+	.8byte	.LVL573
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL566
+	.8byte	.LVL567
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL567
+	.8byte	.LVL574
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL559
+	.8byte	.LVL560
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL560
+	.8byte	.LVL561-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL561-1
+	.8byte	.LVL562
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL562
+	.8byte	.LFE314
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST409:
+	.8byte	.LVL1808
+	.8byte	.LVL1809
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1809
+	.8byte	.LVL1810-1
+	.2byte	0x1
+	.byte	0x5b
+	.8byte	.LVL1812
+	.8byte	.LVL1813-1
+	.2byte	0x1
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+	.8byte	.LVL1816
+	.8byte	.LVL1820
+	.2byte	0x1
+	.byte	0x5b
+	.8byte	.LVL1821
+	.8byte	.LVL1822
+	.2byte	0x1
+	.byte	0x5b
+	.8byte	0
+	.8byte	0
+.LLST410:
+	.8byte	.LVL1817
+	.8byte	.LVL1818
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1818
+	.8byte	.LVL1819-1
+	.2byte	0x17
+	.byte	0x7b
+	.sleb128 0
+	.byte	0x35
+	.byte	0x24
+	.byte	0xc
+	.4byte	0x1fffe0
+	.byte	0x1a
+	.byte	0x3
+	.8byte	req_gc_dst
+	.byte	0x6
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x10
+	.8byte	0
+	.8byte	0
+.LLST286:
+	.8byte	.LVL1171
+	.8byte	.LVL1172
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1172
+	.8byte	.LVL1212
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL1212
+	.8byte	.LFE310
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST287:
+	.8byte	.LVL1171
+	.8byte	.LVL1174-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1174-1
+	.8byte	.LVL1175
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL1175
+	.8byte	.LVL1177
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1177
+	.8byte	.LVL1214
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL1214
+	.8byte	.LFE310
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST288:
+	.8byte	.LVL1188
+	.8byte	.LVL1189
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL1189
+	.8byte	.LVL1192
+	.2byte	0x2
+	.byte	0x75
+	.sleb128 0
+	.8byte	.LVL1192
+	.8byte	.LVL1193
+	.2byte	0x2
+	.byte	0x75
+	.sleb128 -2
+	.8byte	0
+	.8byte	0
+.LLST289:
+	.8byte	.LVL1180
+	.8byte	.LVL1181
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1181
+	.8byte	.LVL1182-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL1187
+	.8byte	.LVL1190
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL1191
+	.8byte	.LVL1193
+	.2byte	0x1
+	.byte	0x53
+	.8byte	0
+	.8byte	0
+.LLST290:
+	.8byte	.LVL1182
+	.8byte	.LVL1183
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST291:
+	.8byte	.LVL1180
+	.8byte	.LVL1181
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST292:
+	.8byte	.LVL1179
+	.8byte	.LVL1183
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1186
+	.8byte	.LVL1193
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1196
+	.8byte	.LVL1197
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1197
+	.8byte	.LVL1201-1
+	.2byte	0x1
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+	.8byte	.LVL1202
+	.8byte	.LVL1203
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL1205
+	.8byte	.LVL1207-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL1210
+	.8byte	.LVL1211
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL1173
+	.8byte	.LVL1184
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1186
+	.8byte	.LVL1206
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1208
+	.8byte	.LVL1210
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1210
+	.8byte	.LVL1212
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST294:
+	.8byte	.LVL1194
+	.8byte	.LVL1200
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL1202
+	.8byte	.LVL1204-1
+	.2byte	0x1
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+	.8byte	.LVL1205
+	.8byte	.LVL1207-1
+	.2byte	0x1
+	.byte	0x54
+	.8byte	0
+	.8byte	0
+.LLST295:
+	.8byte	.LVL1171
+	.8byte	.LVL1178
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1178
+	.8byte	.LVL1185
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL1185
+	.8byte	.LVL1186
+	.2byte	0x3
+	.byte	0x86
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL1186
+	.8byte	.LVL1213
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL1198
+	.8byte	.LVL1199
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1199
+	.8byte	.LVL1200
+	.2byte	0x2
+	.byte	0x75
+	.sleb128 16
+	.8byte	.LVL1202
+	.8byte	.LVL1203
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1203
+	.8byte	.LVL1204-1
+	.2byte	0x2
+	.byte	0x75
+	.sleb128 16
+	.8byte	0
+	.8byte	0
+.LLST404:
+	.8byte	.LVL1762
+	.8byte	.LVL1764
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1764
+	.8byte	.LVL1765
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL1765
+	.8byte	.LVL1767
+	.2byte	0x1
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+	.8byte	.LVL1767
+	.8byte	.LFE308
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL1776
+	.8byte	.LVL1779
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1779
+	.8byte	.LVL1782
+	.2byte	0x1
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+	.8byte	.LVL1785
+	.8byte	.LVL1795
+	.2byte	0x1
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+	.8byte	.LVL1796
+	.8byte	.LFE308
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL1768
+	.8byte	.LVL1770
+	.2byte	0x1
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+	.2byte	0x1
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+	.8byte	.LVL1790
+	.8byte	.LVL1791
+	.2byte	0x1
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+	.8byte	.LVL1791
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+	.2byte	0x1
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+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL1763
+	.8byte	.LVL1764
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1765
+	.8byte	.LVL1766
+	.2byte	0x1
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+	.8byte	.LVL1766
+	.8byte	.LVL1768
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL1768
+	.8byte	.LVL1769-1
+	.2byte	0x1
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+	.8byte	.LVL1774
+	.8byte	.LVL1775
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL1786
+	.8byte	.LVL1797
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL547
+	.8byte	.LVL548
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL548
+	.8byte	.LFE307
+	.2byte	0x1
+	.byte	0x56
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL547
+	.8byte	.LVL549-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL549-1
+	.8byte	.LFE307
+	.2byte	0x1
+	.byte	0x5a
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL547
+	.8byte	.LVL549-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL549-1
+	.8byte	.LFE307
+	.2byte	0x1
+	.byte	0x58
+	.8byte	0
+	.8byte	0
+.LLST136:
+	.8byte	.LVL550
+	.8byte	.LVL553
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL553
+	.8byte	.LVL554
+	.2byte	0x7
+	.byte	0x73
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x75
+	.sleb128 0
+	.byte	0x22
+	.8byte	.LVL554
+	.8byte	.LVL555
+	.2byte	0x1
+	.byte	0x57
+	.8byte	.LVL555
+	.8byte	.LVL557
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL557
+	.8byte	.LVL558
+	.2byte	0x1
+	.byte	0x57
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL550
+	.8byte	.LVL551
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL552
+	.8byte	.LVL556
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL543
+	.8byte	.LVL545
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL545
+	.8byte	.LFE306
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST132:
+	.8byte	.LVL543
+	.8byte	.LVL544
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL544
+	.8byte	.LVL546
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST129:
+	.8byte	.LVL537
+	.8byte	.LVL538
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL539
+	.8byte	.LVL540
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST130:
+	.8byte	.LVL535
+	.8byte	.LVL536
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL536
+	.8byte	.LVL541
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL542
+	.8byte	.LFE305
+	.2byte	0x1
+	.byte	0x53
+	.8byte	0
+	.8byte	0
+.LLST127:
+	.8byte	.LVL529
+	.8byte	.LVL530
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL531
+	.8byte	.LVL534
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST128:
+	.8byte	.LVL527
+	.8byte	.LVL528
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL528
+	.8byte	.LVL532
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL533
+	.8byte	.LFE304
+	.2byte	0x1
+	.byte	0x53
+	.8byte	0
+	.8byte	0
+.LLST126:
+	.8byte	.LVL520
+	.8byte	.LVL521
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL522
+	.8byte	.LVL523
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL524
+	.8byte	.LVL525
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL526
+	.8byte	.LFE303
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST323:
+	.8byte	.LVL1337
+	.8byte	.LVL1338
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1338
+	.8byte	.LVL1342
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1342
+	.8byte	.LFE302
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST324:
+	.8byte	.LVL1337
+	.8byte	.LVL1341
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1343
+	.8byte	.LVL1346
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1346
+	.8byte	.LFE302
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST123:
+	.8byte	.LVL506
+	.8byte	.LVL507
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL507
+	.8byte	.LVL516
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL516
+	.8byte	.LVL517
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL517
+	.8byte	.LFE300
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST124:
+	.8byte	.LVL511
+	.8byte	.LVL513
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL517
+	.8byte	.LVL518
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL519
+	.8byte	.LFE300
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST125:
+	.8byte	.LVL506
+	.8byte	.LVL512
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL512
+	.8byte	.LVL515
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL515
+	.8byte	.LVL517
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL517
+	.8byte	.LFE300
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST389:
+	.8byte	.LVL1698
+	.8byte	.LVL1700
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1700
+	.8byte	.LVL1708
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL1708
+	.8byte	.LVL1710
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL1710
+	.8byte	.LFE299
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST390:
+	.8byte	.LVL1699
+	.8byte	.LVL1709
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1710
+	.8byte	.LFE299
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST310:
+	.8byte	.LVL1264
+	.8byte	.LVL1265
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1265
+	.8byte	.LVL1305
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1305
+	.8byte	.LFE298
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST311:
+	.8byte	.LVL1272
+	.8byte	.LVL1277
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL1278
+	.8byte	.LVL1305
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST312:
+	.8byte	.LVL1280
+	.8byte	.LVL1292
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL1293
+	.8byte	.LVL1306
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST313:
+	.8byte	.LVL1284
+	.8byte	.LVL1285
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1286
+	.8byte	.LVL1287
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1287
+	.8byte	.LVL1291
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL1297
+	.8byte	.LVL1301
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL1301
+	.8byte	.LVL1302
+	.2byte	0x3
+	.byte	0x88
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL1303
+	.8byte	.LVL1307
+	.2byte	0x1
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST314:
+	.8byte	.LVL1286
+	.8byte	.LVL1287
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1287
+	.8byte	.LVL1288-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1297
+	.8byte	.LVL1298
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1298
+	.8byte	.LVL1299
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL1299
+	.8byte	.LVL1300-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1300-1
+	.8byte	.LVL1301
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 196
+	.8byte	.LVL1301
+	.8byte	.LVL1303
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST315:
+	.8byte	.LVL1264
+	.8byte	.LVL1266
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1268
+	.8byte	.LVL1269
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1269
+	.8byte	.LVL1270
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL1270
+	.8byte	.LVL1271-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST316:
+	.8byte	.LVL1294
+	.8byte	.LVL1296
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST317:
+	.8byte	.LVL1294
+	.8byte	.LVL1296
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST114:
+	.8byte	.LVL476
+	.8byte	.LVL480
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL481
+	.8byte	.LVL490
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL498
+	.8byte	.LVL500
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST115:
+	.8byte	.LVL476
+	.8byte	.LVL480
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL481
+	.8byte	.LVL490
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL490
+	.8byte	.LVL491
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL491
+	.8byte	.LVL496
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL496
+	.8byte	.LFE296
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST116:
+	.8byte	.LVL476
+	.8byte	.LVL480
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL481
+	.8byte	.LVL490
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL490
+	.8byte	.LVL494
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL496
+	.8byte	.LVL499
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL500
+	.8byte	.LFE296
+	.2byte	0x1
+	.byte	0x53
+	.8byte	0
+	.8byte	0
+.LLST117:
+	.8byte	.LVL490
+	.8byte	.LVL491
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL496
+	.8byte	.LVL497
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL501
+	.8byte	.LFE296
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST118:
+	.8byte	.LVL488
+	.8byte	.LVL489
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL489
+	.8byte	.LVL495-1
+	.2byte	0x1
+	.byte	0x56
+	.8byte	.LVL496
+	.8byte	.LFE296
+	.2byte	0x1
+	.byte	0x56
+	.8byte	0
+	.8byte	0
+.LLST119:
+	.8byte	.LVL492
+	.8byte	.LVL495-1
+	.2byte	0x1
+	.byte	0x55
+	.8byte	0
+	.8byte	0
+.LLST120:
+	.8byte	.LVL477
+	.8byte	.LVL478
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL478
+	.8byte	.LVL479
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL481
+	.8byte	.LVL482
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL483
+	.8byte	.LVL484
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL484
+	.8byte	.LVL486
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST103:
+	.8byte	.LVL305
+	.8byte	.LVL306
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL306
+	.8byte	.LVL308
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL308
+	.8byte	.LVL311
+	.2byte	0x41
+	.byte	0x3
+	.8byte	g_num_free_superblocks
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x37
+	.byte	0x1e
+	.byte	0x33
+	.byte	0x26
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x3
+	.8byte	g_num_free_superblocks
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x37
+	.byte	0x1e
+	.byte	0x33
+	.byte	0x26
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x2b
+	.byte	0x28
+	.2byte	0x1
+	.byte	0x16
+	.byte	0x13
+	.byte	0x9f
+	.8byte	.LVL311
+	.8byte	.LVL314
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL314
+	.8byte	.LFE295
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST104:
+	.8byte	.LVL305
+	.8byte	.LVL310
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL310
+	.8byte	.LVL311
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL311
+	.8byte	.LVL315
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL315
+	.8byte	.LFE295
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST105:
+	.8byte	.LVL307
+	.8byte	.LVL309
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL311
+	.8byte	.LVL314
+	.2byte	0x1
+	.byte	0x54
+	.8byte	0
+	.8byte	0
+.LLST106:
+	.8byte	.LVL307
+	.8byte	.LVL312
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL313
+	.8byte	.LVL314
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST102:
+	.8byte	.LVL301
+	.8byte	.LVL302
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL302
+	.8byte	.LVL303
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL303
+	.8byte	.LVL304
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL304
+	.8byte	.LFE294
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST98:
+	.8byte	.LVL287
+	.8byte	.LVL288
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL288
+	.8byte	.LVL291
+	.2byte	0x1
+	.byte	0x56
+	.8byte	.LVL291
+	.8byte	.LFE293
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST99:
+	.8byte	.LVL287
+	.8byte	.LVL289
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL289
+	.8byte	.LVL298
+	.2byte	0x1
+	.byte	0x57
+	.8byte	.LVL298
+	.8byte	.LVL299
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL299
+	.8byte	.LFE293
+	.2byte	0x1
+	.byte	0x57
+	.8byte	0
+	.8byte	0
+.LLST100:
+	.8byte	.LVL295
+	.8byte	.LVL296-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST101:
+	.8byte	.LVL287
+	.8byte	.LVL289
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL289
+	.8byte	.LVL293
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL294
+	.8byte	.LVL297
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL298
+	.8byte	.LFE293
+	.2byte	0x1
+	.byte	0x55
+	.8byte	0
+	.8byte	0
+.LLST249:
+	.8byte	.LVL954
+	.8byte	.LVL955
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL956
+	.8byte	.LFE291
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST250:
+	.8byte	.LVL959
+	.8byte	.LVL961
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST281:
+	.8byte	.LVL1144
+	.8byte	.LVL1145
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1147
+	.8byte	.LVL1148
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL1156
+	.8byte	.LVL1159
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1160
+	.8byte	.LVL1161
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1161
+	.8byte	.LVL1166
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL1167
+	.8byte	.LFE290
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST282:
+	.8byte	.LVL1142
+	.8byte	.LVL1143
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL1151
+	.8byte	.LVL1156
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST283:
+	.8byte	.LVL1147
+	.8byte	.LVL1148
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1153
+	.8byte	.LVL1154
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1161
+	.8byte	.LVL1164
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1165
+	.8byte	.LFE290
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST284:
+	.8byte	.LVL1140
+	.8byte	.LVL1144
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1144
+	.8byte	.LVL1149
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL1149
+	.8byte	.LVL1150
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL1151
+	.8byte	.LVL1156
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1156
+	.8byte	.LVL1162
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL1163
+	.8byte	.LFE290
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST285:
+	.8byte	.LVL1146
+	.8byte	.LVL1148
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL1161
+	.8byte	.LFE290
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	0
+	.8byte	0
+.LLST386:
+	.8byte	.LVL1684
+	.8byte	.LVL1685
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1691
+	.8byte	.LVL1696
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1697
+	.8byte	.LFE289
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST387:
+	.8byte	.LVL1682
+	.8byte	.LVL1683
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1686
+	.8byte	.LVL1691
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST388:
+	.8byte	.LVL1688
+	.8byte	.LVL1689
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST354:
+	.8byte	.LVL1508
+	.8byte	.LVL1509
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1509
+	.8byte	.LVL1513
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1513
+	.8byte	.LVL1514
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL1514
+	.8byte	.LFE288
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST355:
+	.8byte	.LVL1516
+	.8byte	.LVL1517
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1517
+	.8byte	.LVL1518-1
+	.2byte	0x9
+	.byte	0x3
+	.8byte	p_sys_spare_buf
+	.8byte	0
+	.8byte	0
+.LLST356:
+	.8byte	.LVL1508
+	.8byte	.LVL1509
+	.2byte	0x2
+	.byte	0x36
+	.byte	0x9f
+	.8byte	.LVL1509
+	.8byte	.LVL1510
+	.2byte	0x3
+	.byte	0x85
+	.sleb128 -2
+	.byte	0x9f
+	.8byte	.LVL1510
+	.8byte	.LVL1511
+	.2byte	0x3
+	.byte	0x85
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL1511
+	.8byte	.LVL1512
+	.2byte	0x3
+	.byte	0x85
+	.sleb128 -2
+	.byte	0x9f
+	.8byte	.LVL1514
+	.8byte	.LFE288
+	.2byte	0x3
+	.byte	0x85
+	.sleb128 -2
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST275:
+	.8byte	.LVL1116
+	.8byte	.LVL1117
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1117
+	.8byte	.LVL1128
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1129
+	.8byte	.LVL1138
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST276:
+	.8byte	.LVL1118
+	.8byte	.LVL1122
+	.2byte	0x1
+	.byte	0x56
+	.8byte	.LVL1122
+	.8byte	.LVL1123
+	.2byte	0x3
+	.byte	0x76
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL1123
+	.8byte	.LVL1127-1
+	.2byte	0x1
+	.byte	0x56
+	.8byte	.LVL1130
+	.8byte	.LVL1135-1
+	.2byte	0x1
+	.byte	0x56
+	.8byte	0
+	.8byte	0
+.LLST277:
+	.8byte	.LVL1119
+	.8byte	.LVL1120-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST278:
+	.8byte	.LVL1118
+	.8byte	.LVL1121
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL1122
+	.8byte	.LVL1127-1
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL1130
+	.8byte	.LVL1131
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL1132
+	.8byte	.LVL1135-1
+	.2byte	0x1
+	.byte	0x55
+	.8byte	0
+	.8byte	0
+.LLST279:
+	.8byte	.LVL1116
+	.8byte	.LVL1117
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1117
+	.8byte	.LVL1133
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL1134
+	.8byte	.LVL1136
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL1136
+	.8byte	.LVL1137-1
+	.2byte	0x9
+	.byte	0x3
+	.8byte	g_num_data_superblocks
+	.8byte	0
+	.8byte	0
+.LLST280:
+	.8byte	.LVL1116
+	.8byte	.LVL1117
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1117
+	.8byte	.LVL1125
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL1126
+	.8byte	.LVL1139
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST95:
+	.8byte	.LVL276
+	.8byte	.LVL277
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL277
+	.8byte	.LVL280
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL280
+	.8byte	.LVL281
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL281
+	.8byte	.LFE284
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST96:
+	.8byte	.LVL279
+	.8byte	.LVL285
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL285
+	.8byte	.LVL286
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST97:
+	.8byte	.LVL283
+	.8byte	.LVL284-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL284-1
+	.8byte	.LFE284
+	.2byte	0x1
+	.byte	0x54
+	.8byte	0
+	.8byte	0
+.LLST329:
+	.8byte	.LVL1367
+	.8byte	.LVL1368
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1368
+	.8byte	.LVL1372
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1372
+	.8byte	.LVL1373
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL1373
+	.8byte	.LFE281
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST330:
+	.8byte	.LVL1369
+	.8byte	.LVL1371
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL1373
+	.8byte	.LFE281
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	0
+	.8byte	0
+.LLST331:
+	.8byte	.LVL1369
+	.8byte	.LVL1370
+	.2byte	0x8
+	.byte	0x83
+	.sleb128 6
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	.LVL1370
+	.8byte	.LVL1371
+	.2byte	0x9
+	.byte	0x8f
+	.sleb128 324
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	.LVL1373
+	.8byte	.LVL1376-1
+	.2byte	0x8
+	.byte	0x83
+	.sleb128 6
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	.LVL1376-1
+	.8byte	.LVL1390
+	.2byte	0x9
+	.byte	0x8f
+	.sleb128 324
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	.LVL1390
+	.8byte	.LVL1395
+	.2byte	0x8
+	.byte	0x83
+	.sleb128 6
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	.LVL1395
+	.8byte	.LFE281
+	.2byte	0x9
+	.byte	0x8f
+	.sleb128 324
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST332:
+	.8byte	.LVL1373
+	.8byte	.LVL1375
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1375
+	.8byte	.LVL1378
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL1390
+	.8byte	.LVL1391
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL1392
+	.8byte	.LVL1399
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL1434
+	.8byte	.LVL1435
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1440
+	.8byte	.LVL1441
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1441
+	.8byte	.LVL1445
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1504
+	.8byte	.LVL1505
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1506
+	.8byte	.LVL1507
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST333:
+	.8byte	.LVL1433
+	.8byte	.LVL1434
+	.2byte	0x9
+	.byte	0x8f
+	.sleb128 324
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	.LVL1458
+	.8byte	.LVL1460
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1507
+	.8byte	.LFE281
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST334:
+	.8byte	.LVL1417
+	.8byte	.LVL1418
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL1419
+	.8byte	.LVL1420
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL1420
+	.8byte	.LVL1421
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL1421
+	.8byte	.LVL1430
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL1431
+	.8byte	.LVL1432
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL1433
+	.8byte	.LVL1434
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL1434
+	.8byte	.LVL1438
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL1439
+	.8byte	.LVL1445
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL1445
+	.8byte	.LVL1450
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL1450
+	.8byte	.LFE281
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST335:
+	.8byte	.LVL1387
+	.8byte	.LVL1390
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL1414
+	.8byte	.LFE281
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	0
+	.8byte	0
+.LLST336:
+	.8byte	.LVL1385
+	.8byte	.LVL1390
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL1409
+	.8byte	.LVL1410
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL1414
+	.8byte	.LFE281
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST337:
+	.8byte	.LVL1374
+	.8byte	.LVL1376-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1390
+	.8byte	.LVL1393
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1394
+	.8byte	.LVL1395
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1400
+	.8byte	.LVL1401
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL1401
+	.8byte	.LVL1404
+	.2byte	0x2
+	.byte	0x74
+	.sleb128 0
+	.8byte	.LVL1404
+	.8byte	.LVL1405
+	.2byte	0x2
+	.byte	0x74
+	.sleb128 -2
+	.8byte	.LVL1422
+	.8byte	.LVL1425
+	.2byte	0x1
+	.byte	0x56
+	.8byte	.LVL1425
+	.8byte	.LVL1426
+	.2byte	0x2
+	.byte	0x72
+	.sleb128 0
+	.8byte	.LVL1442
+	.8byte	.LVL1443
+	.2byte	0x6
+	.byte	0x8f
+	.sleb128 328
+	.byte	0x6
+	.byte	0x32
+	.byte	0x1c
+	.8byte	.LVL1443
+	.8byte	.LVL1444
+	.2byte	0x2
+	.byte	0x74
+	.sleb128 -4
+	.8byte	.LVL1451
+	.8byte	.LVL1454
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL1454
+	.8byte	.LVL1455
+	.2byte	0x2
+	.byte	0x72
+	.sleb128 0
+	.8byte	.LVL1455
+	.8byte	.LVL1456
+	.2byte	0x2
+	.byte	0x72
+	.sleb128 -2
+	.8byte	.LVL1504
+	.8byte	.LVL1507
+	.2byte	0x2
+	.byte	0x74
+	.sleb128 -4
+	.8byte	0
+	.8byte	0
+.LLST338:
+	.8byte	.LVL1377
+	.8byte	.LVL1379
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1379
+	.8byte	.LVL1388
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL1395
+	.8byte	.LVL1396
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1396
+	.8byte	.LVL1419
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL1420
+	.8byte	.LVL1421
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST340:
+	.8byte	.LVL1380
+	.8byte	.LVL1384
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL1399
+	.8byte	.LVL1402
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL1403
+	.8byte	.LVL1409
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL1410
+	.8byte	.LVL1414
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL1421
+	.8byte	.LVL1423
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL1424
+	.8byte	.LVL1427
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL1434
+	.8byte	.LVL1435
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1435
+	.8byte	.LVL1437
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL1450
+	.8byte	.LVL1452
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL1453
+	.8byte	.LVL1456
+	.2byte	0x1
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST341:
+	.8byte	.LVL1382
+	.8byte	.LVL1383
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1383
+	.8byte	.LVL1385
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL1405
+	.8byte	.LVL1408
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL1410
+	.8byte	.LVL1412
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL1413
+	.8byte	.LVL1414
+	.2byte	0x1
+	.byte	0x53
+	.8byte	0
+	.8byte	0
+.LLST342:
+	.8byte	.LVL1428
+	.8byte	.LVL1429
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1436
+	.8byte	.LVL1437
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST343:
+	.8byte	.LVL1459
+	.8byte	.LVL1463
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL1465
+	.8byte	.LVL1475
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL1475
+	.8byte	.LVL1478
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL1478
+	.8byte	.LVL1500
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL1500
+	.8byte	.LVL1502
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL1502
+	.8byte	.LVL1504
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST344:
+	.8byte	.LVL1459
+	.8byte	.LVL1463
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL1465
+	.8byte	.LVL1473
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL1478
+	.8byte	.LVL1493
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL1493
+	.8byte	.LVL1495
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1502
+	.8byte	.LVL1504
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST345:
+	.8byte	.LVL1382
+	.8byte	.LVL1390
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL1405
+	.8byte	.LFE281
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST346:
+	.8byte	.LVL1367
+	.8byte	.LVL1371
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL1373
+	.8byte	.LVL1383
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL1383
+	.8byte	.LVL1388
+	.2byte	0x1
+	.byte	0x56
+	.8byte	.LVL1390
+	.8byte	.LVL1405
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL1405
+	.8byte	.LVL1416
+	.2byte	0x1
+	.byte	0x56
+	.8byte	.LVL1416
+	.8byte	.LVL1432
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL1445
+	.8byte	.LVL1450
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	0
+	.8byte	0
+.LLST347:
+	.8byte	.LVL1406
+	.8byte	.LVL1410
+	.2byte	0x1
+	.byte	0x58
+	.8byte	.LVL1446
+	.8byte	.LVL1447
+	.2byte	0x1
+	.byte	0x56
+	.8byte	.LVL1447
+	.8byte	.LVL1448
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 0
+	.8byte	.LVL1448
+	.8byte	.LVL1449
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 -32
+	.8byte	.LVL1461
+	.8byte	.LVL1462
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL1465
+	.8byte	.LVL1468-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL1470
+	.8byte	.LVL1471-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL1471-1
+	.8byte	.LVL1472
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 296
+	.8byte	.LVL1480
+	.8byte	.LVL1481
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 296
+	.8byte	.LVL1484
+	.8byte	.LVL1485-1
+	.2byte	0x2
+	.byte	0x74
+	.sleb128 16
+	.8byte	.LVL1485-1
+	.8byte	.LVL1486
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 256
+	.8byte	.LVL1496
+	.8byte	.LVL1497-1
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL1497-1
+	.8byte	.LVL1500
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 296
+	.8byte	0
+	.8byte	0
+.LLST348:
+	.8byte	.LVL1415
+	.8byte	.LVL1432
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL1445
+	.8byte	.LVL1450
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST349:
+	.8byte	.LVL1415
+	.8byte	.LVL1419
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL1420
+	.8byte	.LVL1421
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST350:
+	.8byte	.LVL1471
+	.8byte	.LVL1472
+	.2byte	0x6
+	.byte	0x8f
+	.sleb128 296
+	.byte	0x6
+	.byte	0x23
+	.uleb128 0x4
+	.8byte	.LVL1480
+	.8byte	.LVL1481
+	.2byte	0x6
+	.byte	0x8f
+	.sleb128 296
+	.byte	0x6
+	.byte	0x23
+	.uleb128 0x4
+	.8byte	0
+	.8byte	0
+.LLST351:
+	.8byte	.LVL1487
+	.8byte	.LVL1490
+	.2byte	0x1
+	.byte	0x53
+	.8byte	0
+	.8byte	0
+.LLST352:
+	.8byte	.LVL1494
+	.8byte	.LVL1500
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST353:
+	.8byte	.LVL1497
+	.8byte	.LVL1498-1
+	.2byte	0x6
+	.byte	0x8f
+	.sleb128 296
+	.byte	0x6
+	.byte	0x23
+	.uleb128 0x4
+	.8byte	0
+	.8byte	0
+.LLST243:
+	.8byte	.LVL934
+	.8byte	.LVL935
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL935
+	.8byte	.LVL947
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL947
+	.8byte	.LVL948
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL948
+	.8byte	.LFE280
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST244:
+	.8byte	.LVL934
+	.8byte	.LVL936-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST245:
+	.8byte	.LVL937
+	.8byte	.LVL938
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL938
+	.8byte	.LVL942-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL948
+	.8byte	.LVL953
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL953
+	.8byte	.LFE280
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST246:
+	.8byte	.LVL940
+	.8byte	.LVL941
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL948
+	.8byte	.LVL951
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL952
+	.8byte	.LVL953
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST247:
+	.8byte	.LVL940
+	.8byte	.LVL945
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL948
+	.8byte	.LVL949
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL950
+	.8byte	.LVL953
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST248:
+	.8byte	.LVL939
+	.8byte	.LVL942-1
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL948
+	.8byte	.LVL953
+	.2byte	0x1
+	.byte	0x54
+	.8byte	0
+	.8byte	0
+.LLST90:
+	.8byte	.LVL261
+	.8byte	.LVL262
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL262
+	.8byte	.LFE279
+	.2byte	0x1
+	.byte	0x56
+	.8byte	0
+	.8byte	0
+.LLST91:
+	.8byte	.LVL261
+	.8byte	.LVL264
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL264
+	.8byte	.LFE279
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST92:
+	.8byte	.LVL263
+	.8byte	.LVL265
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL266
+	.8byte	.LVL267
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL268
+	.8byte	.LVL269
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST274:
+	.8byte	.LVL1104
+	.8byte	.LVL1105
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST263:
+	.8byte	.LVL1055
+	.8byte	.LVL1058
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1058
+	.8byte	.LVL1076
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1076
+	.8byte	.LVL1082
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL1082
+	.8byte	.LFE275
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST264:
+	.8byte	.LVL1064
+	.8byte	.LVL1065
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1065
+	.8byte	.LVL1080
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL1082
+	.8byte	.LFE275
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	0
+	.8byte	0
+.LLST265:
+	.8byte	.LVL1069
+	.8byte	.LVL1070
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1070
+	.8byte	.LVL1071
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL1082
+	.8byte	.LVL1084
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL1085
+	.8byte	.LVL1086
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL1088
+	.8byte	.LVL1089-1
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL1090
+	.8byte	.LVL1091
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL1092
+	.8byte	.LVL1093
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1095
+	.8byte	.LVL1100
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1101
+	.8byte	.LFE275
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST266:
+	.8byte	.LVL1068
+	.8byte	.LVL1071
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL1082
+	.8byte	.LVL1086
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	0
+	.8byte	0
+.LLST267:
+	.8byte	.LVL1096
+	.8byte	.LVL1097
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1097
+	.8byte	.LVL1098
+	.2byte	0x7
+	.byte	0x72
+	.sleb128 -1
+	.byte	0x32
+	.byte	0x24
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x22
+	.8byte	.LVL1098
+	.8byte	.LVL1099
+	.2byte	0xf
+	.byte	0x70
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x32
+	.byte	0x24
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x22
+	.8byte	0
+	.8byte	0
+.LLST268:
+	.8byte	.LVL1056
+	.8byte	.LVL1077
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL1082
+	.8byte	.LFE275
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST269:
+	.8byte	.LVL1057
+	.8byte	.LVL1066
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL1086
+	.8byte	.LFE275
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST270:
+	.8byte	.LVL1059
+	.8byte	.LVL1060
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1060
+	.8byte	.LVL1062-1
+	.2byte	0x2
+	.byte	0x83
+	.sleb128 24
+	.8byte	.LVL1062-1
+	.8byte	.LVL1081
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 256
+	.8byte	.LVL1081
+	.8byte	.LVL1082
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 112
+	.8byte	.LVL1082
+	.8byte	.LFE275
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 256
+	.8byte	0
+	.8byte	0
+.LLST271:
+	.8byte	.LVL1059
+	.8byte	.LVL1078
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL1082
+	.8byte	.LFE275
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST272:
+	.8byte	.LVL1061
+	.8byte	.LVL1081
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 268
+	.8byte	.LVL1081
+	.8byte	.LVL1082
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 124
+	.8byte	.LVL1082
+	.8byte	.LFE275
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 268
+	.8byte	0
+	.8byte	0
+.LLST273:
+	.8byte	.LVL1063
+	.8byte	.LVL1079
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL1082
+	.8byte	.LFE275
+	.2byte	0x1
+	.byte	0x69
+	.8byte	0
+	.8byte	0
+.LLST461:
+	.8byte	.LVL2078
+	.8byte	.LVL2081
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL2090
+	.8byte	.LVL2092
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL2093
+	.8byte	.LFE274
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST89:
+	.8byte	.LVL259
+	.8byte	.LVL260
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL260
+	.8byte	.LFE273
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST256:
+	.8byte	.LVL990
+	.8byte	.LVL997
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL997
+	.8byte	.LVL998
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL998
+	.8byte	.LVL999
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL1001
+	.8byte	.LVL1002-1
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL1002
+	.8byte	.LVL1004
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST257:
+	.8byte	.LVL989
+	.8byte	.LVL1038
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 332
+	.8byte	.LVL1038
+	.8byte	.LVL1039
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 156
+	.8byte	.LVL1039
+	.8byte	.LFE270
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 332
+	.8byte	0
+	.8byte	0
+.LLST258:
+	.8byte	.LVL992
+	.8byte	.LVL993-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL993-1
+	.8byte	.LVL996
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL1005
+	.8byte	.LVL1036
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	0
+	.8byte	0
+.LLST259:
+	.8byte	.LVL990
+	.8byte	.LVL994
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL995
+	.8byte	.LVL999
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL1001
+	.8byte	.LVL1003
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST260:
+	.8byte	.LVL1015
+	.8byte	.LVL1016
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1017
+	.8byte	.LVL1018
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1019
+	.8byte	.LVL1020
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1026
+	.8byte	.LVL1027
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL1028
+	.8byte	.LVL1029
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL1030
+	.8byte	.LVL1031
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL1040
+	.8byte	.LVL1045
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1046
+	.8byte	.LVL1047
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1048
+	.8byte	.LVL1049
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1052
+	.8byte	.LVL1053
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1054
+	.8byte	.LFE270
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST261:
+	.8byte	.LVL1006
+	.8byte	.LVL1008
+	.2byte	0x8
+	.byte	0x40
+	.byte	0x8f
+	.sleb128 328
+	.byte	0x94
+	.byte	0x2
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	.LVL1009
+	.8byte	.LVL1010
+	.2byte	0x8
+	.byte	0x40
+	.byte	0x8f
+	.sleb128 328
+	.byte	0x94
+	.byte	0x2
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	.LVL1010
+	.8byte	.LVL1011
+	.2byte	0x5
+	.byte	0x41
+	.byte	0x75
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	.LVL1014
+	.8byte	.LVL1021
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1022
+	.8byte	.LVL1023
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1025
+	.8byte	.LVL1032
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1033
+	.8byte	.LVL1034
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1041
+	.8byte	.LVL1042
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1043
+	.8byte	.LVL1044
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1049
+	.8byte	.LVL1050
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1051
+	.8byte	.LVL1052
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST262:
+	.8byte	.LVL1005
+	.8byte	.LVL1036
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	0
+	.8byte	0
+.LLST383:
+	.8byte	.LVL1661
+	.8byte	.LVL1668
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL1668
+	.8byte	.LVL1680
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	0
+	.8byte	0
+.LLST384:
+	.8byte	.LVL1662
+	.8byte	.LVL1679
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST385:
+	.8byte	.LVL1661
+	.8byte	.LVL1668
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1668
+	.8byte	.LVL1674
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL1675
+	.8byte	.LVL1678
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST252:
+	.8byte	.LVL973
+	.8byte	.LVL975
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL975
+	.8byte	.LVL979
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL979
+	.8byte	.LVL980-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL980-1
+	.8byte	.LVL980
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL980
+	.8byte	.LVL983
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL983
+	.8byte	.LFE267
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST253:
+	.8byte	.LVL976
+	.8byte	.LVL977
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL977
+	.8byte	.LVL978-1
+	.2byte	0x9
+	.byte	0x3
+	.8byte	req_sys+4
+	.8byte	.LVL980
+	.8byte	.LVL981
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL981
+	.8byte	.LVL982-1
+	.2byte	0x9
+	.byte	0x3
+	.8byte	req_sys+4
+	.8byte	0
+	.8byte	0
+.LLST254:
+	.8byte	.LVL973
+	.8byte	.LVL974
+	.2byte	0x7
+	.byte	0x70
+	.sleb128 6
+	.byte	0x94
+	.byte	0x2
+	.byte	0x31
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	.LVL983
+	.8byte	.LFE267
+	.2byte	0x7
+	.byte	0x70
+	.sleb128 6
+	.byte	0x94
+	.byte	0x2
+	.byte	0x31
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST255:
+	.8byte	.LVL973
+	.8byte	.LVL974
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 40
+	.8byte	.LVL983
+	.8byte	.LFE267
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 40
+	.8byte	0
+	.8byte	0
+.LLST373:
+	.8byte	.LVL1620
+	.8byte	.LVL1623
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1623
+	.8byte	.LVL1627
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL1627
+	.8byte	.LVL1628
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1628
+	.8byte	.LFE265
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST374:
+	.8byte	.LVL1620
+	.8byte	.LVL1621
+	.2byte	0x3
+	.byte	0x8
+	.byte	0x20
+	.byte	0x9f
+	.8byte	.LVL1621
+	.8byte	.LVL1622
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL1622
+	.8byte	.LVL1624
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1627
+	.8byte	.LVL1628
+	.2byte	0x3
+	.byte	0x8
+	.byte	0x20
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST375:
+	.8byte	.LVL1629
+	.8byte	.LVL1632
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1632
+	.8byte	.LVL1636
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL1637
+	.8byte	.LFE264
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST376:
+	.8byte	.LVL1629
+	.8byte	.LVL1630
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1630
+	.8byte	.LVL1635
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL1637
+	.8byte	.LFE264
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST377:
+	.8byte	.LVL1629
+	.8byte	.LVL1633
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL1633
+	.8byte	.LVL1634
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL1637
+	.8byte	.LVL1655
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL1655
+	.8byte	.LFE264
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST378:
+	.8byte	.LVL1640
+	.8byte	.LVL1655
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST379:
+	.8byte	.LVL1639
+	.8byte	.LVL1642
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL1642
+	.8byte	.LVL1645-1
+	.2byte	0x28
+	.byte	0x85
+	.sleb128 0
+	.byte	0x85
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x30
+	.byte	0x3
+	.8byte	c_ftl_nand_sec_pre_page
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0xf7
+	.uleb128 0x30
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0x3
+	.8byte	c_ftl_nand_sec_pre_page
+	.byte	0x94
+	.byte	0x2
+	.byte	0x1e
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	.LVL1652
+	.8byte	.LVL1655
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	0
+	.8byte	0
+.LLST380:
+	.8byte	.LVL1638
+	.8byte	.LVL1643
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1643
+	.8byte	.LVL1644
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 212
+	.8byte	.LVL1644
+	.8byte	.LVL1645-1
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 4
+	.8byte	.LVL1652
+	.8byte	.LVL1653
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1653
+	.8byte	.LVL1654-1
+	.2byte	0x16
+	.byte	0x8a
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x10
+	.uleb128 0x3fffffffc
+	.byte	0x1a
+	.byte	0x3
+	.8byte	p_vendor_region_ppn_table
+	.byte	0x6
+	.byte	0x22
+	.8byte	0
+	.8byte	0
+.LLST381:
+	.8byte	.LVL1629
+	.8byte	.LVL1633
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1633
+	.8byte	.LVL1634
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL1637
+	.8byte	.LVL1655
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL1655
+	.8byte	.LFE264
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST382:
+	.8byte	.LVL1631
+	.8byte	.LVL1632
+	.2byte	0x13
+	.byte	0x70
+	.sleb128 0
+	.byte	0x3
+	.8byte	c_ftl_nand_sec_pre_page_shift
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x25
+	.byte	0x9f
+	.8byte	.LVL1632
+	.8byte	.LVL1633
+	.2byte	0x13
+	.byte	0x85
+	.sleb128 0
+	.byte	0x3
+	.8byte	c_ftl_nand_sec_pre_page_shift
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x25
+	.byte	0x9f
+	.8byte	.LVL1633
+	.8byte	.LVL1634
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL1637
+	.8byte	.LVL1655
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL1655
+	.8byte	.LFE264
+	.2byte	0x13
+	.byte	0x85
+	.sleb128 0
+	.byte	0x3
+	.8byte	c_ftl_nand_sec_pre_page_shift
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x25
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST365:
+	.8byte	.LVL1591
+	.8byte	.LVL1594
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1594
+	.8byte	.LVL1598
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL1599
+	.8byte	.LVL1610
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL1613
+	.8byte	.LFE263
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	0
+	.8byte	0
+.LLST366:
+	.8byte	.LVL1591
+	.8byte	.LVL1592
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1592
+	.8byte	.LVL1597
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL1599
+	.8byte	.LVL1609
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL1613
+	.8byte	.LFE263
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST367:
+	.8byte	.LVL1591
+	.8byte	.LVL1595
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL1595
+	.8byte	.LVL1596
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL1599
+	.8byte	.LVL1618
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL1618
+	.8byte	.LFE263
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST368:
+	.8byte	.LVL1602
+	.8byte	.LVL1618
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST369:
+	.8byte	.LVL1601
+	.8byte	.LVL1607
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL1615
+	.8byte	.LVL1618
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST370:
+	.8byte	.LVL1600
+	.8byte	.LVL1604
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL1604
+	.8byte	.LVL1605
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 212
+	.8byte	.LVL1605
+	.8byte	.LVL1606-1
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 4
+	.8byte	.LVL1615
+	.8byte	.LVL1616
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL1616
+	.8byte	.LVL1617-1
+	.2byte	0x16
+	.byte	0x85
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x10
+	.uleb128 0x3fffffffc
+	.byte	0x1a
+	.byte	0x3
+	.8byte	p_vendor_region_ppn_table
+	.byte	0x6
+	.byte	0x22
+	.8byte	0
+	.8byte	0
+.LLST371:
+	.8byte	.LVL1591
+	.8byte	.LVL1595
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1595
+	.8byte	.LVL1596
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL1599
+	.8byte	.LVL1618
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL1618
+	.8byte	.LFE263
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST372:
+	.8byte	.LVL1593
+	.8byte	.LVL1594
+	.2byte	0x13
+	.byte	0x70
+	.sleb128 0
+	.byte	0x3
+	.8byte	c_ftl_nand_sec_pre_page_shift
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x25
+	.byte	0x9f
+	.8byte	.LVL1594
+	.8byte	.LVL1595
+	.2byte	0x13
+	.byte	0x8c
+	.sleb128 0
+	.byte	0x3
+	.8byte	c_ftl_nand_sec_pre_page_shift
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x25
+	.byte	0x9f
+	.8byte	.LVL1595
+	.8byte	.LVL1596
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL1599
+	.8byte	.LVL1611
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL1611
+	.8byte	.LVL1612-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1612-1
+	.8byte	.LVL1613
+	.2byte	0x3
+	.byte	0x85
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL1613
+	.8byte	.LVL1618
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL1618
+	.8byte	.LFE263
+	.2byte	0x13
+	.byte	0x8c
+	.sleb128 0
+	.byte	0x3
+	.8byte	c_ftl_nand_sec_pre_page_shift
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x25
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST237:
+	.8byte	.LVL914
+	.8byte	.LVL918
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL918
+	.8byte	.LFE262
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST238:
+	.8byte	.LVL914
+	.8byte	.LVL915
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL915
+	.8byte	.LVL932
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL932
+	.8byte	.LVL933
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL933
+	.8byte	.LFE262
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST239:
+	.8byte	.LVL914
+	.8byte	.LVL919
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL919
+	.8byte	.LVL932
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL932
+	.8byte	.LVL933
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	.LVL933
+	.8byte	.LFE262
+	.2byte	0x1
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST240:
+	.8byte	.LVL920
+	.8byte	.LVL921
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL922
+	.8byte	.LVL924
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL924
+	.8byte	.LVL925-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL925-1
+	.8byte	.LVL927
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL927
+	.8byte	.LVL929
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL933
+	.8byte	.LFE262
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST241:
+	.8byte	.LVL916
+	.8byte	.LVL931
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL933
+	.8byte	.LFE262
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST242:
+	.8byte	.LVL917
+	.8byte	.LVL930
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL933
+	.8byte	.LFE262
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST328:
+	.8byte	.LVL1361
+	.8byte	.LVL1362
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1363
+	.8byte	.LVL1365
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1366
+	.8byte	.LFE261
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST83:
+	.8byte	.LVL228
+	.8byte	.LVL229
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL230
+	.8byte	.LVL231
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL231
+	.8byte	.LVL233
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL235
+	.8byte	.LVL236
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL238
+	.8byte	.LVL239
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL240
+	.8byte	.LVL243
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL244
+	.8byte	.LVL248
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL249
+	.8byte	.LFE260
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST84:
+	.8byte	.LVL232
+	.8byte	.LVL234
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL235
+	.8byte	.LVL238
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL240
+	.8byte	.LFE260
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST85:
+	.8byte	.LVL232
+	.8byte	.LVL235
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL235
+	.8byte	.LVL237-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL240
+	.8byte	.LVL241
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL242
+	.8byte	.LVL245
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL245
+	.8byte	.LVL246
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL247
+	.8byte	.LFE260
+	.2byte	0x1
+	.byte	0x53
+	.8byte	0
+	.8byte	0
+.LLST235:
+	.8byte	.LVL909
+	.8byte	.LVL910
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL910
+	.8byte	.LFE259
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST236:
+	.8byte	.LVL911
+	.8byte	.LVL912
+	.2byte	0x9
+	.byte	0x71
+	.sleb128 0
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	.LVL912
+	.8byte	.LVL913-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST222:
+	.8byte	.LVL869
+	.8byte	.LVL870
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL870
+	.8byte	.LVL884
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL884
+	.8byte	.LFE258
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST223:
+	.8byte	.LVL869
+	.8byte	.LVL870
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL870
+	.8byte	.LVL885
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL885
+	.8byte	.LFE258
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST224:
+	.8byte	.LVL869
+	.8byte	.LVL870
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL870
+	.8byte	.LVL883
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL883
+	.8byte	.LFE258
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST225:
+	.8byte	.LVL874
+	.8byte	.LVL875-1
+	.2byte	0x7
+	.byte	0x73
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	.LVL875-1
+	.8byte	.LVL886
+	.2byte	0xa
+	.byte	0x8f
+	.sleb128 204
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	.LVL886
+	.8byte	.LFE258
+	.2byte	0xa
+	.byte	0x8f
+	.sleb128 92
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST226:
+	.8byte	.LVL876
+	.8byte	.LVL877
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL877
+	.8byte	.LVL878-1
+	.2byte	0x9
+	.byte	0x3
+	.8byte	req_sys+16
+	.8byte	0
+	.8byte	0
+.LLST227:
+	.8byte	.LVL869
+	.8byte	.LVL870
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL870
+	.8byte	.LVL879
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL880
+	.8byte	.LVL882
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST216:
+	.8byte	.LVL847
+	.8byte	.LVL849
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL849
+	.8byte	.LVL853
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL853
+	.8byte	.LVL854
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL854
+	.8byte	.LFE257
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST217:
+	.8byte	.LVL858
+	.8byte	.LVL859
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL859
+	.8byte	.LVL861
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL864
+	.8byte	.LVL867
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL867
+	.8byte	.LVL868
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST218:
+	.8byte	.LVL858
+	.8byte	.LVL859
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL859
+	.8byte	.LVL860
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL864
+	.8byte	.LVL865
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL866
+	.8byte	.LFE257
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST219:
+	.8byte	.LVL848
+	.8byte	.LVL852
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL854
+	.8byte	.LVL855
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL855
+	.8byte	.LVL858-1
+	.2byte	0x2
+	.byte	0x83
+	.sleb128 16
+	.8byte	0
+	.8byte	0
+.LLST220:
+	.8byte	.LVL848
+	.8byte	.LVL849
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 40
+	.8byte	.LVL849
+	.8byte	.LVL850-1
+	.2byte	0x2
+	.byte	0x83
+	.sleb128 40
+	.8byte	.LVL854
+	.8byte	.LVL858-1
+	.2byte	0x2
+	.byte	0x83
+	.sleb128 40
+	.8byte	0
+	.8byte	0
+.LLST221:
+	.8byte	.LVL856
+	.8byte	.LVL857
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL857
+	.8byte	.LVL858-1
+	.2byte	0x9
+	.byte	0x3
+	.8byte	p_sys_spare_buf
+	.8byte	0
+	.8byte	0
+.LLST228:
+	.8byte	.LVL887
+	.8byte	.LVL890-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL890-1
+	.8byte	.LVL898
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL898
+	.8byte	.LVL900
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL900
+	.8byte	.LFE256
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST229:
+	.8byte	.LVL892
+	.8byte	.LVL896
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL900
+	.8byte	.LFE256
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST230:
+	.8byte	.LVL890
+	.8byte	.LVL891
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST231:
+	.8byte	.LVL894
+	.8byte	.LVL896
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL900
+	.8byte	.LVL905
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL906
+	.8byte	.LFE256
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST232:
+	.8byte	.LVL888
+	.8byte	.LVL894
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST233:
+	.8byte	.LVL889
+	.8byte	.LVL899
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL900
+	.8byte	.LFE256
+	.2byte	0x1
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST234:
+	.8byte	.LVL901
+	.8byte	.LVL904
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL907
+	.8byte	.LFE256
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	0
+	.8byte	0
+.LLST207:
+	.8byte	.LVL824
+	.8byte	.LVL826
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL826
+	.8byte	.LVL831
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL831
+	.8byte	.LVL835
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL835
+	.8byte	.LFE254
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST208:
+	.8byte	.LVL825
+	.8byte	.LVL833
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL835
+	.8byte	.LFE254
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST209:
+	.8byte	.LVL825
+	.8byte	.LVL830
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL835
+	.8byte	.LVL841
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST210:
+	.8byte	.LVL825
+	.8byte	.LVL832
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL835
+	.8byte	.LFE254
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST211:
+	.8byte	.LVL836
+	.8byte	.LVL841
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST212:
+	.8byte	.LVL827
+	.8byte	.LVL828
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL828
+	.8byte	.LVL830
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL835
+	.8byte	.LVL837
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL838
+	.8byte	.LVL841
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST213:
+	.8byte	.LVL829
+	.8byte	.LVL830
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL830
+	.8byte	.LVL831
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL836
+	.8byte	.LVL839
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL840
+	.8byte	.LVL841
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL841
+	.8byte	.LVL845
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL846
+	.8byte	.LFE254
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST214:
+	.8byte	.LVL829
+	.8byte	.LVL834
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL841
+	.8byte	.LFE254
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	0
+	.8byte	0
+.LLST215:
+	.8byte	.LVL829
+	.8byte	.LVL830
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL830
+	.8byte	.LVL834
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL841
+	.8byte	.LVL842
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL843
+	.8byte	.LFE254
+	.2byte	0x1
+	.byte	0x69
+	.8byte	0
+	.8byte	0
+.LLST204:
+	.8byte	.LVL808
+	.8byte	.LVL809
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL809
+	.8byte	.LVL815
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL815
+	.8byte	.LFE253
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST205:
+	.8byte	.LVL808
+	.8byte	.LVL810
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL810
+	.8byte	.LVL813
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL813
+	.8byte	.LFE253
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST206:
+	.8byte	.LVL812
+	.8byte	.LVL816
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL817
+	.8byte	.LFE253
+	.2byte	0x1
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST67:
+	.8byte	.LVL188
+	.8byte	.LVL189
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL189
+	.8byte	.LVL192
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL194
+	.8byte	.LFE251
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST68:
+	.8byte	.LVL188
+	.8byte	.LVL196
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL196
+	.8byte	.LVL197
+	.2byte	0x8
+	.byte	0x71
+	.sleb128 0
+	.byte	0x73
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x36
+	.byte	0x1b
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST69:
+	.8byte	.LVL190
+	.8byte	.LVL191
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL193
+	.8byte	.LVL195
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL196
+	.8byte	.LVL197
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST66:
+	.8byte	.LVL186
+	.8byte	.LVL187-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL187-1
+	.8byte	.LFE250
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST62:
+	.8byte	.LVL173
+	.8byte	.LVL178-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL178-1
+	.8byte	.LVL180
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL180
+	.8byte	.LVL185
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL185
+	.8byte	.LFE249
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST63:
+	.8byte	.LVL173
+	.8byte	.LVL174
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL174
+	.8byte	.LVL177
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL180
+	.8byte	.LVL181
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL183
+	.8byte	.LFE249
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST64:
+	.8byte	.LVL173
+	.8byte	.LVL176
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL176
+	.8byte	.LVL179
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL179
+	.8byte	.LVL180
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL180
+	.8byte	.LFE249
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST65:
+	.8byte	.LVL174
+	.8byte	.LVL175
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL180
+	.8byte	.LVL184
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST58:
+	.8byte	.LVL160
+	.8byte	.LVL161
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL161
+	.8byte	.LVL166
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL166
+	.8byte	.LVL168
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL168
+	.8byte	.LFE248
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST59:
+	.8byte	.LVL160
+	.8byte	.LVL163
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL163
+	.8byte	.LFE248
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST60:
+	.8byte	.LVL162
+	.8byte	.LVL165
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL165
+	.8byte	.LVL166
+	.2byte	0x6
+	.byte	0x87
+	.sleb128 0
+	.byte	0x85
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.8byte	.LVL166
+	.8byte	.LVL167
+	.2byte	0xd
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x87
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.8byte	.LVL168
+	.8byte	.LFE248
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST61:
+	.8byte	.LVL169
+	.8byte	.LVL170
+	.2byte	0x16
+	.byte	0x83
+	.sleb128 2
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x3
+	.8byte	p_data_block_list_table
+	.byte	0x6
+	.byte	0x22
+	.byte	0x9f
+	.8byte	.LVL171
+	.8byte	.LVL172
+	.2byte	0xc
+	.byte	0x70
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x73
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.8byte	.LVL172
+	.8byte	.LFE248
+	.2byte	0xe
+	.byte	0x83
+	.sleb128 2
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x73
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST51:
+	.8byte	.LVL140
+	.8byte	.LVL143
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL143
+	.8byte	.LFE247
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST52:
+	.8byte	.LVL141
+	.8byte	.LVL142
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL144
+	.8byte	.LVL154
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL154
+	.8byte	.LFE247
+	.2byte	0x6
+	.byte	0x73
+	.sleb128 0
+	.byte	0x78
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST53:
+	.8byte	.LVL145
+	.8byte	.LVL146
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL146
+	.8byte	.LFE247
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST54:
+	.8byte	.LVL146
+	.8byte	.LVL147
+	.2byte	0xb
+	.byte	0x71
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x31
+	.byte	0x24
+	.byte	0x7b
+	.sleb128 0
+	.byte	0x22
+	.8byte	.LVL148
+	.8byte	.LVL150
+	.2byte	0xb
+	.byte	0x71
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x31
+	.byte	0x24
+	.byte	0x7b
+	.sleb128 0
+	.byte	0x22
+	.8byte	.LVL151
+	.8byte	.LVL152
+	.2byte	0xb
+	.byte	0x71
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x31
+	.byte	0x24
+	.byte	0x7b
+	.sleb128 0
+	.byte	0x22
+	.8byte	0
+	.8byte	0
+.LLST55:
+	.8byte	.LVL146
+	.8byte	.LVL148
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL148
+	.8byte	.LVL151
+	.2byte	0x1
+	.byte	0x5a
+	.8byte	.LVL151
+	.8byte	.LVL153
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL153
+	.8byte	.LVL155
+	.2byte	0x5
+	.byte	0x73
+	.sleb128 0
+	.byte	0x78
+	.sleb128 0
+	.byte	0x22
+	.8byte	0
+	.8byte	0
+.LLST41:
+	.8byte	.LVL108
+	.8byte	.LVL111
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL111
+	.8byte	.LFE246
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST42:
+	.8byte	.LVL109
+	.8byte	.LVL110
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL112
+	.8byte	.LVL129
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL129
+	.8byte	.LVL130
+	.2byte	0x6
+	.byte	0x74
+	.sleb128 0
+	.byte	0x7d
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.8byte	.LVL130
+	.8byte	.LVL134
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL134
+	.8byte	.LFE246
+	.2byte	0x6
+	.byte	0x74
+	.sleb128 0
+	.byte	0x7d
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST43:
+	.8byte	.LVL116
+	.8byte	.LVL118
+	.2byte	0x1
+	.byte	0x5c
+	.8byte	.LVL118
+	.8byte	.LFE246
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST44:
+	.8byte	.LVL113
+	.8byte	.LVL114
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL114
+	.8byte	.LVL118
+	.2byte	0x5
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x72
+	.sleb128 0
+	.byte	0x22
+	.8byte	.LVL118
+	.8byte	.LVL124
+	.2byte	0xd
+	.byte	0x70
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0xc
+	.4byte	0x1fffe
+	.byte	0x1a
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x22
+	.8byte	.LVL126
+	.8byte	.LVL128
+	.2byte	0xd
+	.byte	0x70
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0xc
+	.4byte	0x1fffe
+	.byte	0x1a
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x22
+	.8byte	.LVL130
+	.8byte	.LVL133
+	.2byte	0xd
+	.byte	0x70
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0xc
+	.4byte	0x1fffe
+	.byte	0x1a
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x22
+	.8byte	0
+	.8byte	0
+.LLST45:
+	.8byte	.LVL119
+	.8byte	.LVL120
+	.2byte	0x1
+	.byte	0x56
+	.8byte	.LVL120
+	.8byte	.LVL122
+	.2byte	0x5
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x81
+	.sleb128 0
+	.byte	0x22
+	.8byte	.LVL122
+	.8byte	.LVL124
+	.2byte	0xd
+	.byte	0x71
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0xc
+	.4byte	0x1fffe
+	.byte	0x1a
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x22
+	.8byte	.LVL126
+	.8byte	.LVL127
+	.2byte	0x5
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x81
+	.sleb128 0
+	.byte	0x22
+	.8byte	.LVL127
+	.8byte	.LVL128
+	.2byte	0xd
+	.byte	0x71
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0xc
+	.4byte	0x1fffe
+	.byte	0x1a
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x22
+	.8byte	.LVL130
+	.8byte	.LVL132
+	.2byte	0xd
+	.byte	0x71
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0xc
+	.4byte	0x1fffe
+	.byte	0x1a
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x22
+	.8byte	0
+	.8byte	0
+.LLST46:
+	.8byte	.LVL113
+	.8byte	.LVL114
+	.2byte	0xe
+	.byte	0x75
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x71
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.8byte	.LVL114
+	.8byte	.LVL115
+	.2byte	0x13
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x72
+	.sleb128 0
+	.byte	0x22
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x71
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.8byte	.LVL115
+	.8byte	.LVL116
+	.2byte	0x15
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x72
+	.sleb128 0
+	.byte	0x22
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x73
+	.sleb128 4
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.8byte	.LVL116
+	.8byte	.LFE246
+	.2byte	0x1
+	.byte	0x55
+	.8byte	0
+	.8byte	0
+.LLST47:
+	.8byte	.LVL119
+	.8byte	.LVL120
+	.2byte	0xe
+	.byte	0x76
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x8e
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.8byte	.LVL120
+	.8byte	.LVL121
+	.2byte	0x13
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x81
+	.sleb128 0
+	.byte	0x22
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x8e
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.8byte	.LVL121
+	.8byte	.LVL123
+	.2byte	0x1
+	.byte	0x56
+	.8byte	.LVL123
+	.8byte	.LVL124
+	.2byte	0x25
+	.byte	0x71
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0xc
+	.4byte	0x1fffe
+	.byte	0x1a
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x22
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x8e
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x8e
+	.sleb128 0
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x30
+	.byte	0x2e
+	.byte	0x28
+	.2byte	0x1
+	.byte	0x16
+	.byte	0x13
+	.byte	0x9f
+	.8byte	.LVL126
+	.8byte	.LVL127
+	.2byte	0x1
+	.byte	0x56
+	.8byte	.LVL127
+	.8byte	.LVL128
+	.2byte	0x25
+	.byte	0x71
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0xc
+	.4byte	0x1fffe
+	.byte	0x1a
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x22
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x8e
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x8e
+	.sleb128 0
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x30
+	.byte	0x2e
+	.byte	0x28
+	.2byte	0x1
+	.byte	0x16
+	.byte	0x13
+	.byte	0x9f
+	.8byte	.LVL130
+	.8byte	.LVL132
+	.2byte	0x25
+	.byte	0x71
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0xc
+	.4byte	0x1fffe
+	.byte	0x1a
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x22
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x8e
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x8e
+	.sleb128 0
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x30
+	.byte	0x2e
+	.byte	0x28
+	.2byte	0x1
+	.byte	0x16
+	.byte	0x13
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST48:
+	.8byte	.LVL117
+	.8byte	.LVL125
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL125
+	.8byte	.LVL126
+	.2byte	0x5
+	.byte	0x74
+	.sleb128 0
+	.byte	0x7d
+	.sleb128 0
+	.byte	0x22
+	.8byte	.LVL126
+	.8byte	.LVL129
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL130
+	.8byte	.LVL133
+	.2byte	0x1
+	.byte	0x56
+	.8byte	.LVL133
+	.8byte	.LVL135
+	.2byte	0x5
+	.byte	0x74
+	.sleb128 0
+	.byte	0x7d
+	.sleb128 0
+	.byte	0x22
+	.8byte	0
+	.8byte	0
+.LLST39:
+	.8byte	.LVL103
+	.8byte	.LVL105
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL105
+	.8byte	.LVL106
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL106
+	.8byte	.LVL107
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL107
+	.8byte	.LFE243
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST40:
+	.8byte	.LVL104
+	.8byte	.LVL106
+	.2byte	0xa
+	.byte	0x3
+	.8byte	gSysFreeQueue
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST36:
+	.8byte	.LVL96
+	.8byte	.LVL99
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL99
+	.8byte	.LFE242
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST37:
+	.8byte	.LVL96
+	.8byte	.LVL102
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL102
+	.8byte	.LFE242
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST38:
+	.8byte	.LVL97
+	.8byte	.LVL98
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL100
+	.8byte	.LFE242
+	.2byte	0x1
+	.byte	0x53
+	.8byte	0
+	.8byte	0
+.LLST30:
+	.8byte	.LVL75
+	.8byte	.LVL76
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL76
+	.8byte	.LVL77
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL77
+	.8byte	.LVL78
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL78
+	.8byte	.LVL81
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL81
+	.8byte	.LVL82
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL83
+	.8byte	.LVL87
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL92
+	.8byte	.LFE241
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST31:
+	.8byte	.LVL83
+	.8byte	.LVL85
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL85
+	.8byte	.LVL88
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL92
+	.8byte	.LFE241
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST32:
+	.8byte	.LVL84
+	.8byte	.LVL85
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL85
+	.8byte	.LVL86
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL92
+	.8byte	.LVL94
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL95
+	.8byte	.LFE241
+	.2byte	0x1
+	.byte	0x54
+	.8byte	0
+	.8byte	0
+.LLST33:
+	.8byte	.LVL90
+	.8byte	.LVL91
+	.2byte	0x1
+	.byte	0x54
+	.8byte	0
+	.8byte	0
+.LLST34:
+	.8byte	.LVL79
+	.8byte	.LVL80
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST35:
+	.8byte	.LVL89
+	.8byte	.LVL91
+	.2byte	0x1
+	.byte	0x5b
+	.8byte	0
+	.8byte	0
+.LLST182:
+	.8byte	.LVL676
+	.8byte	.LVL677
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL677
+	.8byte	.LVL685
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL685
+	.8byte	.LFE240
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST183:
+	.8byte	.LVL676
+	.8byte	.LVL679-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL679-1
+	.8byte	.LFE240
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST184:
+	.8byte	.LVL678
+	.8byte	.LVL684
+	.2byte	0xa
+	.byte	0x3
+	.8byte	gSysFreeQueue
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST185:
+	.8byte	.LVL680
+	.8byte	.LVL681
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL681
+	.8byte	.LVL683
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST203:
+	.8byte	.LVL805
+	.8byte	.LVL806
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL806
+	.8byte	.LVL807-1
+	.2byte	0x9
+	.byte	0x3
+	.8byte	gSysFreeQueue
+	.8byte	.LVL807-1
+	.8byte	.LFE237
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST161:
+	.8byte	.LVL618
+	.8byte	.LVL622
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL622
+	.8byte	.LVL629
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL629
+	.8byte	.LVL631
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL631
+	.8byte	.LFE236
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST162:
+	.8byte	.LVL618
+	.8byte	.LVL619
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL619
+	.8byte	.LVL628
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL628
+	.8byte	.LVL629
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL629
+	.8byte	.LVL630
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL630
+	.8byte	.LFE236
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST163:
+	.8byte	.LVL623
+	.8byte	.LVL625
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL625
+	.8byte	.LVL626
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL631
+	.8byte	.LFE236
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST164:
+	.8byte	.LVL623
+	.8byte	.LVL627
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL631
+	.8byte	.LVL634
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL635
+	.8byte	.LFE236
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST165:
+	.8byte	.LVL632
+	.8byte	.LVL636
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL636
+	.8byte	.LFE236
+	.2byte	0x3
+	.byte	0x84
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST166:
+	.8byte	.LVL620
+	.8byte	.LVL621
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST27:
+	.8byte	.LVL69
+	.8byte	.LVL71
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL71
+	.8byte	.LVL72
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL72
+	.8byte	.LVL74
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL74
+	.8byte	.LFE235
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST28:
+	.8byte	.LVL69
+	.8byte	.LVL70
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL70
+	.8byte	.LVL72
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL72
+	.8byte	.LVL73
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL73
+	.8byte	.LFE235
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST29:
+	.8byte	.LVL69
+	.8byte	.LVL72
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL72
+	.8byte	.LVL74
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL74
+	.8byte	.LFE235
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST25:
+	.8byte	.LVL65
+	.8byte	.LVL66
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL66
+	.8byte	.LFE234
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST26:
+	.8byte	.LVL67
+	.8byte	.LVL68
+	.2byte	0x15
+	.byte	0x70
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x3
+	.8byte	c_ftl_nand_planes_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0x9f
+	.8byte	.LVL68
+	.8byte	.LFE234
+	.2byte	0x3a
+	.byte	0x72
+	.sleb128 0
+	.byte	0x72
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x30
+	.byte	0x3
+	.8byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0xf7
+	.uleb128 0x30
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0x3
+	.8byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0x1e
+	.byte	0x1c
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x3
+	.8byte	c_ftl_nand_planes_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST24:
+	.8byte	.LVL62
+	.8byte	.LVL63
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL63
+	.8byte	.LFE233
+	.2byte	0x1
+	.byte	0x53
+	.8byte	0
+	.8byte	0
+.LLST22:
+	.8byte	.LVL58
+	.8byte	.LVL60
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL60
+	.8byte	.LFE232
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST23:
+	.8byte	.LVL59
+	.8byte	.LVL60
+	.2byte	0x24
+	.byte	0x70
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x72
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0x3
+	.8byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0x1e
+	.byte	0x72
+	.sleb128 0
+	.byte	0x71
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x70
+	.sleb128 0
+	.byte	0x72
+	.sleb128 0
+	.byte	0x1d
+	.byte	0x22
+	.byte	0x22
+	.byte	0x9f
+	.8byte	.LVL60
+	.8byte	.LVL61
+	.2byte	0x26
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x72
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0x3
+	.8byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0x1e
+	.byte	0x72
+	.sleb128 0
+	.byte	0x71
+	.sleb128 0
+	.byte	0x1e
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x72
+	.sleb128 0
+	.byte	0x1d
+	.byte	0x22
+	.byte	0x22
+	.byte	0x9f
+	.8byte	.LVL61
+	.8byte	.LFE232
+	.2byte	0x41
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x3
+	.8byte	c_ftl_nand_planes_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0x3
+	.8byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0x1e
+	.byte	0x3
+	.8byte	c_ftl_nand_planes_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0x1e
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x3
+	.8byte	c_ftl_nand_planes_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0x1d
+	.byte	0x22
+	.byte	0x22
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST361:
+	.8byte	.LVL1546
+	.8byte	.LVL1547
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1547
+	.8byte	.LVL1549
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL1557
+	.8byte	.LVL1562
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL1562
+	.8byte	.LVL1563
+	.2byte	0x3
+	.byte	0x86
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL1563
+	.8byte	.LVL1583
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST362:
+	.8byte	.LVL1548
+	.8byte	.LVL1550
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1551
+	.8byte	.LVL1555
+	.2byte	0x1
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+	.8byte	.LVL1556
+	.8byte	.LVL1557
+	.2byte	0x1
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+	.8byte	.LVL1567
+	.8byte	.LVL1577
+	.2byte	0x1
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+	.8byte	.LVL1578
+	.8byte	.LVL1580
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1580
+	.8byte	.LVL1581-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1582
+	.8byte	.LVL1584
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1589
+	.8byte	.LVL1590-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST363:
+	.8byte	.LVL1559
+	.8byte	.LVL1564
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL1571
+	.8byte	.LVL1576
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	0
+	.8byte	0
+.LLST364:
+	.8byte	.LVL1558
+	.8byte	.LVL1579
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	0
+	.8byte	0
+.LLST158:
+	.8byte	.LVL608
+	.8byte	.LVL609
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL611
+	.8byte	.LFE230
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST159:
+	.8byte	.LVL612
+	.8byte	.LVL616
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL617
+	.8byte	.LFE230
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST160:
+	.8byte	.LVL608
+	.8byte	.LVL610
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL611
+	.8byte	.LFE230
+	.2byte	0x1
+	.byte	0x69
+	.8byte	0
+	.8byte	0
+.LLST357:
+	.8byte	.LVL1532
+	.8byte	.LVL1533
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL1541
+	.8byte	.LVL1542
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL1542
+	.8byte	.LVL1543
+	.2byte	0x3
+	.byte	0x84
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL1543
+	.8byte	.LVL1544
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST358:
+	.8byte	.LVL1522
+	.8byte	.LVL1525
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1534
+	.8byte	.LVL1535
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1536
+	.8byte	.LVL1537
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST359:
+	.8byte	.LVL1528
+	.8byte	.LVL1532
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL1537
+	.8byte	.LVL1539
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL1540
+	.8byte	.LVL1541
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST360:
+	.8byte	.LVL1520
+	.8byte	.LVL1531
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL1534
+	.8byte	.LVL1541
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL1544
+	.8byte	.LFE229
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST20:
+	.8byte	.LVL51
+	.8byte	.LVL52
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL52
+	.8byte	.LVL56
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL57
+	.8byte	.LFE228
+	.2byte	0x1
+	.byte	0x54
+	.8byte	0
+	.8byte	0
+.LLST21:
+	.8byte	.LVL51
+	.8byte	.LVL52
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL52
+	.8byte	.LVL54
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL55
+	.8byte	.LFE228
+	.2byte	0x1
+	.byte	0x55
+	.8byte	0
+	.8byte	0
+.LLST306:
+	.8byte	.LVL1243
+	.8byte	.LVL1244
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL1255
+	.8byte	.LVL1256
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL1256
+	.8byte	.LVL1257
+	.2byte	0x3
+	.byte	0x88
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL1257
+	.8byte	.LVL1258
+	.2byte	0x1
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST307:
+	.8byte	.LVL1242
+	.8byte	.LVL1247
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1247
+	.8byte	.LVL1255
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL1255
+	.8byte	.LVL1258
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1258
+	.8byte	.LVL1259
+	.2byte	0x3
+	.byte	0x89
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL1260
+	.8byte	.LVL1263
+	.2byte	0x3
+	.byte	0x89
+	.sleb128 1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST308:
+	.8byte	.LVL1245
+	.8byte	.LVL1255
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL1258
+	.8byte	.LVL1261
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	0
+	.8byte	0
+.LLST309:
+	.8byte	.LVL1242
+	.8byte	.LVL1247
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1247
+	.8byte	.LVL1252
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL1253
+	.8byte	.LVL1255
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL1255
+	.8byte	.LVL1258
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1258
+	.8byte	.LVL1262
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST201:
+	.8byte	.LVL797
+	.8byte	.LVL798
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL798
+	.8byte	.LVL803
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL803
+	.8byte	.LFE225
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST202:
+	.8byte	.LVL797
+	.8byte	.LVL799
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL799
+	.8byte	.LVL802
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL802
+	.8byte	.LFE225
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST16:
+	.8byte	.LVL45
+	.8byte	.LVL47
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL47
+	.8byte	.LFE223
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST17:
+	.8byte	.LVL46
+	.8byte	.LVL47
+	.2byte	0x10
+	.byte	0x70
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x71
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	.LVL47
+	.8byte	.LVL48
+	.2byte	0x11
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x71
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	.LVL48
+	.8byte	.LFE223
+	.2byte	0x1a
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x3
+	.8byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST18:
+	.8byte	.LVL49
+	.8byte	.LVL50
+	.2byte	0x41
+	.byte	0x70
+	.sleb128 0
+	.byte	0x35
+	.byte	0x25
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x32
+	.byte	0x24
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x3
+	.8byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x23
+	.uleb128 0x4
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.8byte	gBbtInfo
+	.byte	0x22
+	.byte	0x6
+	.byte	0x22
+	.byte	0x94
+	.byte	0x4
+	.byte	0x70
+	.sleb128 0
+	.byte	0x4f
+	.byte	0x1a
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x25
+	.byte	0x31
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	.LVL50
+	.8byte	.LFE223
+	.2byte	0x97
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0xf7
+	.uleb128 0x30
+	.byte	0x3
+	.8byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0xf7
+	.uleb128 0x30
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0x3
+	.8byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0x1e
+	.byte	0x1c
+	.byte	0x35
+	.byte	0x25
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x32
+	.byte	0x24
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x3
+	.8byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x23
+	.uleb128 0x4
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.8byte	gBbtInfo
+	.byte	0x22
+	.byte	0x6
+	.byte	0x22
+	.byte	0x94
+	.byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0xf7
+	.uleb128 0x30
+	.byte	0x3
+	.8byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0xf7
+	.uleb128 0x30
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0x3
+	.8byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0x1e
+	.byte	0x1c
+	.byte	0x4f
+	.byte	0x1a
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x25
+	.byte	0x31
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST19:
+	.8byte	.LVL49
+	.8byte	.LVL50
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL50
+	.8byte	.LFE223
+	.2byte	0x2e
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0xf7
+	.uleb128 0x30
+	.byte	0x3
+	.8byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0xf7
+	.uleb128 0x30
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0x3
+	.8byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0x1e
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST12:
+	.8byte	.LVL40
+	.8byte	.LVL41
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL41
+	.8byte	.LVL44-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL44-1
+	.8byte	.LFE222
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST13:
+	.8byte	.LVL42
+	.8byte	.LVL44-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST14:
+	.8byte	.LVL43
+	.8byte	.LVL44-1
+	.2byte	0x16
+	.byte	0x72
+	.sleb128 0
+	.byte	0xc
+	.4byte	0xffffffff
+	.byte	0x1a
+	.byte	0x23
+	.uleb128 0x4
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.8byte	gBbtInfo
+	.byte	0x22
+	.8byte	0
+	.8byte	0
+.LLST15:
+	.8byte	.LVL43
+	.8byte	.LVL44-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	0
+	.8byte	0
+.LLST458:
+	.8byte	.LVL2071
+	.8byte	.LVL2074
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL2074
+	.8byte	.LVL2075-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL2075-1
+	.8byte	.LFE220
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST459:
+	.8byte	.LVL2071
+	.8byte	.LVL2073
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL2073
+	.8byte	.LVL2075-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL2075-1
+	.8byte	.LFE220
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST460:
+	.8byte	.LVL2071
+	.8byte	.LVL2072
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL2072
+	.8byte	.LVL2075-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL2075-1
+	.8byte	.LFE220
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST440:
+	.8byte	.LVL1978
+	.8byte	.LVL1981
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1981
+	.8byte	.LVL1982-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1982-1
+	.8byte	.LFE219
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST441:
+	.8byte	.LVL1978
+	.8byte	.LVL1980
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1980
+	.8byte	.LVL1982-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL1982-1
+	.8byte	.LFE219
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST442:
+	.8byte	.LVL1978
+	.8byte	.LVL1979
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL1979
+	.8byte	.LVL1982-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL1982-1
+	.8byte	.LFE219
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST398:
+	.8byte	.LVL1738
+	.8byte	.LVL1740
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1740
+	.8byte	.LVL1741
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL1741
+	.8byte	.LVL1743
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL1743
+	.8byte	.LVL1746
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL1746
+	.8byte	.LVL1761
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL1761
+	.8byte	.LFE218
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST399:
+	.8byte	.LVL1738
+	.8byte	.LVL1739
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1739
+	.8byte	.LVL1742
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1743
+	.8byte	.LFE218
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST400:
+	.8byte	.LVL1746
+	.8byte	.LVL1751
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL1751
+	.8byte	.LVL1752
+	.2byte	0x2a
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0xf7
+	.uleb128 0x30
+	.byte	0x3
+	.8byte	c_ftl_nand_sec_pre_page
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0xf7
+	.uleb128 0x30
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0x3
+	.8byte	c_ftl_nand_sec_pre_page
+	.byte	0x94
+	.byte	0x2
+	.byte	0x1e
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST401:
+	.8byte	.LVL1747
+	.8byte	.LVL1748
+	.2byte	0x25
+	.byte	0x71
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x84
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1c
+	.byte	0x12
+	.byte	0xc
+	.4byte	0xffffffff
+	.byte	0x1a
+	.byte	0x83
+	.sleb128 0
+	.byte	0x16
+	.byte	0x14
+	.byte	0xc
+	.4byte	0xffffffff
+	.byte	0x1a
+	.byte	0x2d
+	.byte	0x28
+	.2byte	0x1
+	.byte	0x16
+	.byte	0x13
+	.byte	0x9f
+	.8byte	.LVL1748
+	.8byte	.LVL1750
+	.2byte	0x2e
+	.byte	0x3
+	.8byte	c_ftl_nand_sec_pre_page
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x84
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1c
+	.byte	0x12
+	.byte	0xc
+	.4byte	0xffffffff
+	.byte	0x1a
+	.byte	0x83
+	.sleb128 0
+	.byte	0x16
+	.byte	0x14
+	.byte	0xc
+	.4byte	0xffffffff
+	.byte	0x1a
+	.byte	0x2d
+	.byte	0x28
+	.2byte	0x1
+	.byte	0x16
+	.byte	0x13
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST402:
+	.8byte	.LVL1745
+	.8byte	.LVL1761
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST403:
+	.8byte	.LVL1757
+	.8byte	.LVL1758-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST443:
+	.8byte	.LVL1983
+	.8byte	.LVL1986
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1986
+	.8byte	.LFE217
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST444:
+	.8byte	.LVL1983
+	.8byte	.LVL1985
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1985
+	.8byte	.LVL1987
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL1989
+	.8byte	.LVL1992
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1992
+	.8byte	.LVL2016
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL2024
+	.8byte	.LVL2030
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL2031
+	.8byte	.LVL2070
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL2070
+	.8byte	.LFE217
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST445:
+	.8byte	.LVL1983
+	.8byte	.LVL1984
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL1984
+	.8byte	.LVL1988
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL1989
+	.8byte	.LVL1990
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL1990
+	.8byte	.LFE217
+	.2byte	0x1
+	.byte	0x69
+	.8byte	0
+	.8byte	0
+.LLST446:
+	.8byte	.LVL1983
+	.8byte	.LVL1987-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL1987-1
+	.8byte	.LVL1988
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL1989
+	.8byte	.LVL1991
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL1991
+	.8byte	.LVL2070
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL2070
+	.8byte	.LFE217
+	.2byte	0x1
+	.byte	0x53
+	.8byte	0
+	.8byte	0
+.LLST447:
+	.8byte	.LVL2044
+	.8byte	.LVL2066
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	0
+	.8byte	0
+.LLST448:
+	.8byte	.LVL1997
+	.8byte	.LVL1998
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL1998
+	.8byte	.LVL2018
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL2037
+	.8byte	.LVL2070
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST449:
+	.8byte	.LVL1993
+	.8byte	.LVL2017
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL2024
+	.8byte	.LVL2030
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL2031
+	.8byte	.LVL2070
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST450:
+	.8byte	.LVL1994
+	.8byte	.LVL1995
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1995
+	.8byte	.LVL2070
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 344
+	.8byte	0
+	.8byte	0
+.LLST451:
+	.8byte	.LVL2042
+	.8byte	.LVL2043
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL2043
+	.8byte	.LVL2045
+	.2byte	0x2
+	.byte	0x71
+	.sleb128 4
+	.8byte	.LVL2045
+	.8byte	.LVL2046-1
+	.2byte	0xf
+	.byte	0x3
+	.8byte	req_prgm
+	.byte	0x6
+	.byte	0x87
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x4
+	.8byte	0
+	.8byte	0
+.LLST452:
+	.8byte	.LVL2009
+	.8byte	.LVL2014
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 360
+	.8byte	.LVL2040
+	.8byte	.LVL2052
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 360
+	.8byte	.LVL2052
+	.8byte	.LVL2053
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL2053
+	.8byte	.LVL2070
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 360
+	.8byte	0
+	.8byte	0
+.LLST453:
+	.8byte	.LVL1996
+	.8byte	.LVL2029
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL2029
+	.8byte	.LVL2030
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL2031
+	.8byte	.LVL2037
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL2037
+	.8byte	.LVL2070
+	.2byte	0x1
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST454:
+	.8byte	.LVL2005
+	.8byte	.LVL2006
+	.2byte	0x21
+	.byte	0x83
+	.sleb128 7
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x32
+	.byte	0x24
+	.byte	0x12
+	.byte	0xc
+	.4byte	0xffffffff
+	.byte	0x1a
+	.byte	0x88
+	.sleb128 0
+	.byte	0x16
+	.byte	0x14
+	.byte	0xc
+	.4byte	0xffffffff
+	.byte	0x1a
+	.byte	0x2d
+	.byte	0x28
+	.2byte	0x1
+	.byte	0x16
+	.byte	0x13
+	.byte	0x9f
+	.8byte	.LVL2006
+	.8byte	.LVL2007
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL2007
+	.8byte	.LVL2010
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 336
+	.8byte	.LVL2010
+	.8byte	.LVL2011
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL2011
+	.8byte	.LVL2013
+	.2byte	0x3
+	.byte	0x8b
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL2013
+	.8byte	.LVL2014
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL2040
+	.8byte	.LVL2066
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 336
+	.8byte	.LVL2066
+	.8byte	.LVL2070
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	0
+	.8byte	0
+.LLST455:
+	.8byte	.LVL1997
+	.8byte	.LVL1998
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL2025
+	.8byte	.LVL2027
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL2027
+	.8byte	.LVL2029-1
+	.2byte	0x16
+	.byte	0x86
+	.sleb128 0
+	.byte	0x3
+	.8byte	c_ftl_nand_sec_pre_page
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x85
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	.LVL2047
+	.8byte	.LVL2048
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL2048
+	.8byte	.LVL2050
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 340
+	.8byte	.LVL2053
+	.8byte	.LVL2055
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL2055
+	.8byte	.LVL2056
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 340
+	.8byte	.LVL2057
+	.8byte	.LVL2065
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 340
+	.8byte	0
+	.8byte	0
+.LLST456:
+	.8byte	.LVL1997
+	.8byte	.LVL1998
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL2026
+	.8byte	.LVL2028
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL2028
+	.8byte	.LVL2030
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL2031
+	.8byte	.LVL2037
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL2049
+	.8byte	.LVL2050
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 348
+	.8byte	.LVL2054
+	.8byte	.LVL2055
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL2055
+	.8byte	.LVL2056
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 348
+	.8byte	.LVL2057
+	.8byte	.LVL2065
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 348
+	.8byte	0
+	.8byte	0
+.LLST457:
+	.8byte	.LVL1997
+	.8byte	.LVL1998
+	.2byte	0xa
+	.byte	0x3
+	.8byte	g_active_superblock
+	.byte	0x9f
+	.8byte	.LVL1998
+	.8byte	.LVL2002
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL2004
+	.8byte	.LVL2019
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL2037
+	.8byte	.LVL2039
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL2040
+	.8byte	.LVL2070
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST391:
+	.8byte	.LVL1712
+	.8byte	.LVL1715-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1715-1
+	.8byte	.LVL1715
+	.2byte	0x3
+	.byte	0x84
+	.sleb128 -4
+	.byte	0x9f
+	.8byte	.LVL1715
+	.8byte	.LFE215
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST392:
+	.8byte	.LVL1712
+	.8byte	.LVL1715-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1715-1
+	.8byte	.LFE215
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST393:
+	.8byte	.LVL1712
+	.8byte	.LVL1713
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL1713
+	.8byte	.LFE215
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST394:
+	.8byte	.LVL1712
+	.8byte	.LVL1714
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL1714
+	.8byte	.LVL1731
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1731
+	.8byte	.LFE215
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST395:
+	.8byte	.LVL1724
+	.8byte	.LVL1727-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	0
+	.8byte	0
+.LLST396:
+	.8byte	.LVL1716
+	.8byte	.LVL1717
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1726
+	.8byte	.LVL1727-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1727-1
+	.8byte	.LVL1729
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST397:
+	.8byte	.LVL1723
+	.8byte	.LVL1725-1
+	.2byte	0x2
+	.byte	0x86
+	.sleb128 16
+	.8byte	0
+	.8byte	0
+.LLST423:
+	.8byte	.LVL1929
+	.8byte	.LVL1932
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1932
+	.8byte	.LFE214
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST424:
+	.8byte	.LVL1929
+	.8byte	.LVL1931
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1931
+	.8byte	.LVL1935
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1935
+	.8byte	.LVL1938
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL1938
+	.8byte	.LVL1939
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1939
+	.8byte	.LFE214
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST425:
+	.8byte	.LVL1929
+	.8byte	.LVL1930
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL1930
+	.8byte	.LVL1937
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL1937
+	.8byte	.LVL1938
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	.LVL1938
+	.8byte	.LVL1940-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL1940-1
+	.8byte	.LVL1977
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL1977
+	.8byte	.LFE214
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST426:
+	.8byte	.LVL1929
+	.8byte	.LVL1933-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL1933-1
+	.8byte	.LVL1936
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL1936
+	.8byte	.LVL1938
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL1938
+	.8byte	.LVL1940-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL1940-1
+	.8byte	.LVL1977
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL1977
+	.8byte	.LFE214
+	.2byte	0x1
+	.byte	0x53
+	.8byte	0
+	.8byte	0
+.LLST427:
+	.8byte	.LVL1929
+	.8byte	.LVL1934
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1938
+	.8byte	.LVL1945
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1945
+	.8byte	.LVL1956
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL1958
+	.8byte	.LVL1977
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL1977
+	.8byte	.LFE214
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST428:
+	.8byte	.LVL1941
+	.8byte	.LVL1977
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	0
+	.8byte	0
+.LLST429:
+	.8byte	.LVL1942
+	.8byte	.LVL1977
+	.2byte	0x1
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST430:
+	.8byte	.LVL1960
+	.8byte	.LVL1961
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1961
+	.8byte	.LVL1962-1
+	.2byte	0x16
+	.byte	0x3
+	.8byte	c_ftl_nand_sec_pre_page
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x84
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x74
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST431:
+	.8byte	.LVL1943
+	.8byte	.LVL1945
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL1945
+	.8byte	.LVL1977
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST432:
+	.8byte	.LVL1952
+	.8byte	.LVL1954
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST433:
+	.8byte	.LVL1943
+	.8byte	.LVL1945
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1945
+	.8byte	.LVL1953
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL1959
+	.8byte	.LVL1974
+	.2byte	0x1
+	.byte	0x69
+	.8byte	0
+	.8byte	0
+.LLST434:
+	.8byte	.LVL1943
+	.8byte	.LVL1944
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1944
+	.8byte	.LVL1950
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 300
+	.8byte	.LVL1950
+	.8byte	.LVL1951
+	.2byte	0x8
+	.byte	0x8f
+	.sleb128 300
+	.byte	0x94
+	.byte	0x4
+	.byte	0x31
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	.LVL1959
+	.8byte	.LVL1974
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 300
+	.8byte	0
+	.8byte	0
+.LLST435:
+	.8byte	.LVL1929
+	.8byte	.LVL1934
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1938
+	.8byte	.LVL1945
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1945
+	.8byte	.LVL1966
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 296
+	.8byte	.LVL1966
+	.8byte	.LVL1967
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL1967
+	.8byte	.LVL1977
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 296
+	.8byte	.LVL1977
+	.8byte	.LFE214
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST436:
+	.8byte	.LVL1938
+	.8byte	.LVL1945
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1945
+	.8byte	.LVL1967
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 292
+	.8byte	.LVL1967
+	.8byte	.LVL1968
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL1968
+	.8byte	.LVL1969
+	.2byte	0x9
+	.byte	0x71
+	.sleb128 0
+	.byte	0x8f
+	.sleb128 296
+	.byte	0x94
+	.byte	0x4
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	.LVL1969
+	.8byte	.LVL1970
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL1970
+	.8byte	.LVL1977
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 292
+	.8byte	.LVL1977
+	.8byte	.LFE214
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST437:
+	.8byte	.LVL1938
+	.8byte	.LVL1945
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1945
+	.8byte	.LVL1972
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 288
+	.8byte	.LVL1972
+	.8byte	.LVL1973
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL1973
+	.8byte	.LVL1977
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 288
+	.8byte	.LVL1977
+	.8byte	.LFE214
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST438:
+	.8byte	.LVL1948
+	.8byte	.LVL1949
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL1959
+	.8byte	.LVL1962-1
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL1962-1
+	.8byte	.LVL1963
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 264
+	.8byte	.LVL1964
+	.8byte	.LVL1965
+	.2byte	0x1
+	.byte	0x54
+	.8byte	0
+	.8byte	0
+.LLST439:
+	.8byte	.LVL1975
+	.8byte	.LVL1976-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST467:
+	.8byte	.LVL2171
+	.8byte	.LVL2172
+	.2byte	0x7
+	.byte	0xa
+	.2byte	0x1fc1
+	.byte	0x83
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	.LVL2172
+	.8byte	.LVL2173
+	.2byte	0x7
+	.byte	0xa
+	.2byte	0x1fc2
+	.byte	0x83
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	.LVL2173
+	.8byte	.LVL2174
+	.2byte	0x7
+	.byte	0xa
+	.2byte	0x1fc1
+	.byte	0x83
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST463:
+	.8byte	.LVL2128
+	.8byte	.LVL2129
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL2131
+	.8byte	.LVL2132
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL2141
+	.8byte	.LVL2142
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL2142
+	.8byte	.LVL2143-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL2145
+	.8byte	.LVL2146
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL2150
+	.8byte	.LVL2151
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL2151
+	.8byte	.LVL2152-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL2152
+	.8byte	.LVL2153
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL2153
+	.8byte	.LVL2154
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL2154
+	.8byte	.LVL2155-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL2157
+	.8byte	.LVL2158
+	.2byte	0x1
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST464:
+	.8byte	.LVL2131
+	.8byte	.LVL2135
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL2153
+	.8byte	.LVL2156
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL2157
+	.8byte	.LVL2158
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST465:
+	.8byte	.LVL2127
+	.8byte	.LVL2128
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL2128
+	.8byte	.LVL2130
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL2141
+	.8byte	.LVL2144
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL2145
+	.8byte	.LVL2147
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL2149
+	.8byte	.LVL2150
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST466:
+	.8byte	.LVL2126
+	.8byte	.LVL2128
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL2138
+	.8byte	.LVL2139
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL2140
+	.8byte	.LVL2141
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST186:
+	.8byte	.LVL686
+	.8byte	.LVL687
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL687
+	.8byte	.LVL712
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL712
+	.8byte	.LFE209
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST187:
+	.8byte	.LVL686
+	.8byte	.LVL689
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL689
+	.8byte	.LVL712
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL712
+	.8byte	.LFE209
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST188:
+	.8byte	.LVL686
+	.8byte	.LVL690
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL690
+	.8byte	.LVL693
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL694
+	.8byte	.LVL703
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL704
+	.8byte	.LVL711
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL713
+	.8byte	.LVL724
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL725
+	.8byte	.LFE209
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST189:
+	.8byte	.LVL686
+	.8byte	.LVL690
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL690
+	.8byte	.LVL691
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL699
+	.8byte	.LVL700
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL700
+	.8byte	.LVL710
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL713
+	.8byte	.LVL718
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL719
+	.8byte	.LVL726
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL727
+	.8byte	.LVL732
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL733
+	.8byte	.LFE209
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST190:
+	.8byte	.LVL688
+	.8byte	.LVL690
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL690
+	.8byte	.LVL692-1
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL699
+	.8byte	.LVL700
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL700
+	.8byte	.LVL701-1
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL701
+	.8byte	.LVL702
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL713
+	.8byte	.LVL721
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL721
+	.8byte	.LVL722
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL723
+	.8byte	.LVL726
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL727
+	.8byte	.LVL735
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL735
+	.8byte	.LVL736
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST191:
+	.8byte	.LVL715
+	.8byte	.LVL720
+	.2byte	0x1
+	.byte	0x5d
+	.8byte	.LVL720
+	.8byte	.LVL723
+	.2byte	0x1
+	.byte	0x5e
+	.8byte	.LVL723
+	.8byte	.LVL726
+	.2byte	0x1
+	.byte	0x5d
+	.8byte	.LVL729
+	.8byte	.LVL734
+	.2byte	0x1
+	.byte	0x5c
+	.8byte	.LVL734
+	.8byte	.LFE209
+	.2byte	0x1
+	.byte	0x5d
+	.8byte	0
+	.8byte	0
+.LLST192:
+	.8byte	.LVL686
+	.8byte	.LVL697
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL697
+	.8byte	.LVL698
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL699
+	.8byte	.LVL710
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL713
+	.8byte	.LVL727
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL727
+	.8byte	.LFE209
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	0
+	.8byte	0
+.LLST193:
+	.8byte	.LVL686
+	.8byte	.LVL699
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL699
+	.8byte	.LVL706
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL707
+	.8byte	.LVL708
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL713
+	.8byte	.LVL727
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL727
+	.8byte	.LFE209
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST194:
+	.8byte	.LVL686
+	.8byte	.LVL698
+	.2byte	0x2
+	.byte	0x36
+	.byte	0x9f
+	.8byte	.LVL699
+	.8byte	.LVL710
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL713
+	.8byte	.LVL727
+	.2byte	0x2
+	.byte	0x36
+	.byte	0x9f
+	.8byte	.LVL727
+	.8byte	.LFE209
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	0
+	.8byte	0
+.LLST195:
+	.8byte	.LVL686
+	.8byte	.LVL696
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL696
+	.8byte	.LVL698
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL699
+	.8byte	.LVL710
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL713
+	.8byte	.LVL727
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL727
+	.8byte	.LFE209
+	.2byte	0x1
+	.byte	0x69
+	.8byte	0
+	.8byte	0
+.LLST199:
+	.8byte	.LVL794
+	.8byte	.LVL795
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST200:
+	.8byte	.LVL741
+	.8byte	.LVL747
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL748
+	.8byte	.LVL755
+	.2byte	0x7
+	.byte	0x83
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	.LVL757
+	.8byte	.LVL760
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL764
+	.8byte	.LVL766
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL766
+	.8byte	.LVL767-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL768
+	.8byte	.LVL769-1
+	.2byte	0xe
+	.byte	0x3
+	.8byte	c_ftl_nand_max_map_blks
+	.byte	0x94
+	.byte	0x4
+	.byte	0x31
+	.byte	0x24
+	.byte	0x9f
+	.8byte	.LVL776
+	.8byte	.LVL777
+	.2byte	0x12
+	.byte	0x3
+	.8byte	c_ftl_nand_map_region_num
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x32
+	.byte	0x24
+	.byte	0x9f
+	.8byte	.LVL777
+	.8byte	.LVL778-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL779
+	.8byte	.LVL780-1
+	.2byte	0xe
+	.byte	0x3
+	.8byte	c_ftl_nand_max_map_blks
+	.byte	0x94
+	.byte	0x4
+	.byte	0x32
+	.byte	0x24
+	.byte	0x9f
+	.8byte	.LVL781
+	.8byte	.LVL782
+	.2byte	0x12
+	.byte	0x3
+	.8byte	c_ftl_nand_l2pmap_ram_region_num
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x34
+	.byte	0x24
+	.byte	0x9f
+	.8byte	.LVL782
+	.8byte	.LVL783-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL784
+	.8byte	.LVL785
+	.2byte	0x20
+	.byte	0x3
+	.8byte	c_ftl_nand_l2pmap_ram_region_num
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x3
+	.8byte	c_ftl_nand_byte_pre_page
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.8byte	.LVL785
+	.8byte	.LVL786-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL787
+	.8byte	.LVL788
+	.2byte	0x12
+	.byte	0x3
+	.8byte	c_ftl_nand_blk_pre_plane
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x9f
+	.8byte	.LVL788
+	.8byte	.LVL789-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL790
+	.8byte	.LVL791
+	.2byte	0x15
+	.byte	0x3
+	.8byte	c_ftl_nand_die_num
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x70
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x32
+	.byte	0x24
+	.byte	0x9f
+	.8byte	.LVL791
+	.8byte	.LVL792
+	.2byte	0x26
+	.byte	0x3
+	.8byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x23
+	.uleb128 0x1f
+	.byte	0x35
+	.byte	0x26
+	.byte	0x3
+	.8byte	c_ftl_nand_die_num
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x32
+	.byte	0x24
+	.byte	0x9f
+	.8byte	.LVL792
+	.8byte	.LVL793-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST8:
+	.8byte	.LVL25
+	.8byte	.LVL26
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL26
+	.8byte	.LVL32
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL32
+	.8byte	.LFE205
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST9:
+	.8byte	.LVL27
+	.8byte	.LVL28
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL28
+	.8byte	.LVL29
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST7:
+	.8byte	.LVL21
+	.8byte	.LVL22
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL22
+	.8byte	.LVL23
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL23
+	.8byte	.LVL24
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL24
+	.8byte	.LFE204
+	.2byte	0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_sys_blks_per_plane
+	.8byte	0
+	.8byte	0
+.LLST4:
+	.8byte	.LVL12
+	.8byte	.LVL15
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL15
+	.8byte	.LVL16
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL16
+	.8byte	.LFE202
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST5:
+	.8byte	.LVL12
+	.8byte	.LVL13
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL13
+	.8byte	.LVL14
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL14
+	.8byte	.LVL16
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL16
+	.8byte	.LVL17
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL19
+	.8byte	.LFE202
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST6:
+	.8byte	.LVL12
+	.8byte	.LVL13
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL13
+	.8byte	.LFE202
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST112:
+	.8byte	.LVL468
+	.8byte	.LVL470-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL470-1
+	.8byte	.LVL475
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL475
+	.8byte	.LFE201
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST113:
+	.8byte	.LVL469
+	.8byte	.LVL470-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL470-1
+	.8byte	.LVL471
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL471
+	.8byte	.LVL472
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL472
+	.8byte	.LVL473
+	.2byte	0xc
+	.byte	0x70
+	.sleb128 0
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x83
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.8byte	.LVL473
+	.8byte	.LVL474
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST107:
+	.8byte	.LVL316
+	.8byte	.LVL318-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL318-1
+	.8byte	.LVL451
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL451
+	.8byte	.LVL452
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL452
+	.8byte	.LFE200
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST108:
+	.8byte	.LVL456
+	.8byte	.LVL457
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL457
+	.8byte	.LVL458
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL458
+	.8byte	.LVL459-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL459-1
+	.8byte	.LVL461
+	.2byte	0x3
+	.byte	0x87
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL461
+	.8byte	.LVL462
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL464
+	.8byte	.LVL465
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL465
+	.8byte	.LVL466-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL466-1
+	.8byte	.LVL467
+	.2byte	0x3
+	.byte	0x86
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL467
+	.8byte	.LFE200
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST109:
+	.8byte	.LVL317
+	.8byte	.LVL318-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL318-1
+	.8byte	.LVL319
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL319
+	.8byte	.LVL431
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL431
+	.8byte	.LVL450
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL452
+	.8byte	.LFE200
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST110:
+	.8byte	.LVL456
+	.8byte	.LVL459-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL461
+	.8byte	.LVL463
+	.2byte	0x1
+	.byte	0x53
+	.8byte	0
+	.8byte	0
+.LLST111:
+	.8byte	.LVL464
+	.8byte	.LVL466-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL467
+	.8byte	.LFE200
+	.2byte	0xd
+	.byte	0x3
+	.8byte	p_data_block_list_table
+	.byte	0x6
+	.byte	0x88
+	.sleb128 0
+	.byte	0x22
+	.8byte	0
+	.8byte	0
+.LLST0:
+	.8byte	.LVL5
+	.8byte	.LVL7
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL7
+	.8byte	.LVL8
+	.2byte	0x1
+	.byte	0x54
+	.8byte	0
+	.8byte	0
+.LLST1:
+	.8byte	.LVL1
+	.8byte	.LVL9
+	.2byte	0x1
+	.byte	0x53
+	.8byte	0
+	.8byte	0
+.LLST2:
+	.8byte	.LVL4
+	.8byte	.LVL6
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST3:
+	.8byte	.LVL10
+	.8byte	.LVL11
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL11
+	.8byte	.LFE355
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST10:
+	.8byte	.LVL34
+	.8byte	.LVL37
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL37
+	.8byte	.LFE208
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST11:
+	.8byte	.LVL35
+	.8byte	.LVL36
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL38
+	.8byte	.LVL39
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST49:
+	.8byte	.LVL136
+	.8byte	.LVL137-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL137-1
+	.8byte	.LFE245
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST50:
+	.8byte	.LVL138
+	.8byte	.LVL139
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST56:
+	.8byte	.LVL156
+	.8byte	.LVL157-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL157-1
+	.8byte	.LFE244
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST57:
+	.8byte	.LVL158
+	.8byte	.LVL159
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST70:
+	.8byte	.LVL198
+	.8byte	.LVL199
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL199
+	.8byte	.LVL216
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL216
+	.8byte	.LFE252
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST71:
+	.8byte	.LVL200
+	.8byte	.LVL215
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST72:
+	.8byte	.LVL206
+	.8byte	.LVL207
+	.2byte	0x5
+	.byte	0x71
+	.sleb128 0
+	.byte	0x36
+	.byte	0x1b
+	.byte	0x9f
+	.8byte	.LVL207
+	.8byte	.LVL213-1
+	.2byte	0xd
+	.byte	0x86
+	.sleb128 2
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x36
+	.byte	0x1b
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST73:
+	.8byte	.LVL202
+	.8byte	.LVL205-1
+	.2byte	0x13
+	.byte	0x83
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x31
+	.byte	0x24
+	.byte	0x3
+	.8byte	p_valid_page_count_table
+	.byte	0x6
+	.byte	0x22
+	.8byte	0
+	.8byte	0
+.LLST74:
+	.8byte	.LVL203
+	.8byte	.LVL211
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST75:
+	.8byte	.LVL206
+	.8byte	.LVL207
+	.2byte	0x11
+	.byte	0x71
+	.sleb128 0
+	.byte	0x36
+	.byte	0x1b
+	.byte	0x31
+	.byte	0x24
+	.byte	0x3
+	.8byte	p_valid_page_count_table
+	.byte	0x6
+	.byte	0x22
+	.8byte	.LVL207
+	.8byte	.LVL213-1
+	.2byte	0x19
+	.byte	0x86
+	.sleb128 2
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x36
+	.byte	0x1b
+	.byte	0x31
+	.byte	0x24
+	.byte	0x3
+	.8byte	p_valid_page_count_table
+	.byte	0x6
+	.byte	0x22
+	.8byte	0
+	.8byte	0
+.LLST76:
+	.8byte	.LVL209
+	.8byte	.LVL212
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST77:
+	.8byte	.LVL201
+	.8byte	.LVL215
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST78:
+	.8byte	.LVL206
+	.8byte	.LVL207
+	.2byte	0xe
+	.byte	0x3
+	.8byte	p_data_block_list_table
+	.byte	0x6
+	.byte	0x71
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.8byte	.LVL207
+	.8byte	.LVL208
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL208
+	.8byte	.LVL213-1
+	.2byte	0x16
+	.byte	0x86
+	.sleb128 2
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x3
+	.8byte	p_data_block_list_table
+	.byte	0x6
+	.byte	0x22
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST79:
+	.8byte	.LVL217
+	.8byte	.LVL219
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL219
+	.8byte	.LVL221-1
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL221-1
+	.8byte	.LVL222
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL222
+	.8byte	.LVL224
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL224
+	.8byte	.LVL225
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL225
+	.8byte	.LFE255
+	.2byte	0x1
+	.byte	0x54
+	.8byte	0
+	.8byte	0
+.LLST80:
+	.8byte	.LVL217
+	.8byte	.LVL219
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL219
+	.8byte	.LVL221-1
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL222
+	.8byte	.LVL224
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL225
+	.8byte	.LVL226
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL227
+	.8byte	.LFE255
+	.2byte	0x1
+	.byte	0x55
+	.8byte	0
+	.8byte	0
+.LLST81:
+	.8byte	.LVL217
+	.8byte	.LVL218
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 16
+	.8byte	0
+	.8byte	0
+.LLST82:
+	.8byte	.LVL220
+	.8byte	.LVL221-1
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL221-1
+	.8byte	.LVL222
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST86:
+	.8byte	.LVL250
+	.8byte	.LVL251
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL251
+	.8byte	.LFE266
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST87:
+	.8byte	.LVL256
+	.8byte	.LVL257-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL257-1
+	.8byte	.LFE272
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST88:
+	.8byte	.LVL256
+	.8byte	.LVL257-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL257-1
+	.8byte	.LVL257
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL257
+	.8byte	.LVL258
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL258
+	.8byte	.LFE272
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST93:
+	.8byte	.LVL271
+	.8byte	.LVL273
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL274
+	.8byte	.LFE282
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST94:
+	.8byte	.LVL272
+	.8byte	.LVL273
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL274
+	.8byte	.LFE282
+	.2byte	0x1
+	.byte	0x53
+	.8byte	0
+	.8byte	0
+.LLST121:
+	.8byte	.LVL502
+	.8byte	.LVL504-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL504-1
+	.8byte	.LFE297
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST122:
+	.8byte	.LVL503
+	.8byte	.LVL504-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL504-1
+	.8byte	.LVL505
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST251:
+	.8byte	.LVL964
+	.8byte	.LVL968
+	.2byte	0x7
+	.byte	0xa
+	.2byte	0x800
+	.byte	0x85
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	.LVL969
+	.8byte	.LVL970
+	.2byte	0x7
+	.byte	0xa
+	.2byte	0x801
+	.byte	0x85
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	.LVL970
+	.8byte	.LVL971
+	.2byte	0x7
+	.byte	0xa
+	.2byte	0x800
+	.byte	0x85
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST297:
+	.8byte	.LVL1215
+	.8byte	.LVL1217
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1217
+	.8byte	.LVL1219
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1219
+	.8byte	.LVL1225
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL1225
+	.8byte	.LFE343
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST298:
+	.8byte	.LVL1216
+	.8byte	.LVL1219
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1219
+	.8byte	.LVL1224
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST318:
+	.8byte	.LVL1308
+	.8byte	.LVL1309
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1309
+	.8byte	.LVL1312
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL1312
+	.8byte	.LFE317
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST319:
+	.8byte	.LVL1310
+	.8byte	.LVL1311
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1313
+	.8byte	.LVL1316
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1317
+	.8byte	.LFE317
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST320:
+	.8byte	.LVL1320
+	.8byte	.LVL1321
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL1321
+	.8byte	.LVL1322
+	.2byte	0x6
+	.byte	0x70
+	.sleb128 0
+	.byte	0x84
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.8byte	.LVL1324
+	.8byte	.LVL1325
+	.2byte	0x6
+	.byte	0x70
+	.sleb128 0
+	.byte	0x84
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST321:
+	.8byte	.LVL1326
+	.8byte	.LVL1327
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1327
+	.8byte	.LVL1335
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1335
+	.8byte	.LFE301
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST322:
+	.8byte	.LVL1328
+	.8byte	.LVL1334
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST325:
+	.8byte	.LVL1348
+	.8byte	.LVL1349-1
+	.2byte	0xe
+	.byte	0x3
+	.8byte	g_MaxLpn
+	.byte	0x94
+	.byte	0x4
+	.byte	0x31
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST326:
+	.8byte	.LVL1348
+	.8byte	.LVL1349-1
+	.2byte	0x12
+	.byte	0x3
+	.8byte	c_ftl_nand_planes_num
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x32
+	.byte	0x24
+	.byte	0x9f
+	.8byte	.LVL1349-1
+	.8byte	.LVL1352
+	.2byte	0x9
+	.byte	0x89
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x32
+	.byte	0x24
+	.byte	0x9f
+	.8byte	.LVL1354
+	.8byte	.LVL1356
+	.2byte	0x9
+	.byte	0x89
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x32
+	.byte	0x24
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST327:
+	.8byte	.LVL1350
+	.8byte	.LVL1353
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL1354
+	.8byte	.LVL1360
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
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+	.8byte	.LVL1832
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1832
+	.8byte	.LVL1845
+	.2byte	0x1
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+	.8byte	.LVL1845
+	.8byte	.LVL1846
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL1846
+	.8byte	.LVL1866
+	.2byte	0x1
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+	.8byte	.LVL1866
+	.8byte	.LVL1868
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL1868
+	.8byte	.LVL1879
+	.2byte	0x1
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+	.8byte	.LVL1879
+	.8byte	.LVL1926
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL1926
+	.8byte	.LVL1927
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1927
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+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL1830
+	.8byte	.LVL1831
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1831
+	.8byte	.LFE319
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL1833
+	.8byte	.LVL1845
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL1848
+	.8byte	.LVL1926
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
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+	.8byte	.LVL1833
+	.8byte	.LVL1845
+	.2byte	0x1
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+	.8byte	.LVL1848
+	.8byte	.LVL1866
+	.2byte	0x1
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+	.8byte	.LVL1866
+	.8byte	.LVL1868
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL1868
+	.8byte	.LVL1879
+	.2byte	0x1
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+	.8byte	.LVL1879
+	.8byte	.LVL1926
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL1909
+	.8byte	.LVL1910-1
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL1910-1
+	.8byte	.LVL1911
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 272
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL1890
+	.8byte	.LVL1891
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1891
+	.8byte	.LVL1904
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL1904
+	.8byte	.LVL1905
+	.2byte	0x3
+	.byte	0x8b
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL1906
+	.8byte	.LVL1926
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	0
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+	.8byte	.LVL1892
+	.8byte	.LVL1897
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL1899
+	.8byte	.LVL1900
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL1901
+	.8byte	.LVL1903
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST418:
+	.8byte	.LVL1892
+	.8byte	.LVL1894
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL1895
+	.8byte	.LVL1902
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST419:
+	.8byte	.LVL1893
+	.8byte	.LVL1896
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL1896
+	.8byte	.LVL1898
+	.2byte	0x2
+	.byte	0x71
+	.sleb128 0
+	.8byte	.LVL1898
+	.8byte	.LVL1899
+	.2byte	0x2
+	.byte	0x71
+	.sleb128 -2
+	.8byte	0
+	.8byte	0
+.LLST420:
+	.8byte	.LVL1888
+	.8byte	.LVL1926
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 332
+	.8byte	0
+	.8byte	0
+.LLST421:
+	.8byte	.LVL1907
+	.8byte	.LVL1908
+	.2byte	0x2
+	.byte	0x71
+	.sleb128 16
+	.8byte	.LVL1908
+	.8byte	.LVL1916
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	0
+	.8byte	0
+.LLST422:
+	.8byte	.LVL1838
+	.8byte	.LVL1839
+	.2byte	0x1
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+	.8byte	0
+	.8byte	0
+.LLST462:
+	.8byte	.LVL2108
+	.8byte	.LVL2109
+	.2byte	0xa
+	.byte	0x3
+	.8byte	g_active_superblock
+	.byte	0x9f
+	.8byte	.LVL2109
+	.8byte	.LVL2115
+	.2byte	0xa
+	.byte	0x3
+	.8byte	g_buffer_superblock
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+	.section	.debug_aranges,"",@progbits
+	.4byte	0x86c
+	.2byte	0x2
+	.4byte	.Ldebug_info0
+	.byte	0x8
+	.byte	0
+	.2byte	0
+	.2byte	0
+	.8byte	.LFB348
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+	.8byte	.LFB355
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+	.8byte	.LFB203
+	.8byte	.LFE203-.LFB203
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+	.8byte	.LFB205
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+	.8byte	.LFB221
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+	.8byte	.LFB228
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+	.8byte	.LFB233
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+	.8byte	.LFB227
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+	.8byte	0
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+	.section	.debug_ranges,"",@progbits
+.Ldebug_ranges0:
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+	.8byte	.LFE244
+	.8byte	.LFB248
+	.8byte	.LFE248
+	.8byte	.LFB249
+	.8byte	.LFE249
+	.8byte	.LFB250
+	.8byte	.LFE250
+	.8byte	.LFB251
+	.8byte	.LFE251
+	.8byte	.LFB252
+	.8byte	.LFE252
+	.8byte	.LFB255
+	.8byte	.LFE255
+	.8byte	.LFB260
+	.8byte	.LFE260
+	.8byte	.LFB266
+	.8byte	.LFE266
+	.8byte	.LFB272
+	.8byte	.LFE272
+	.8byte	.LFB273
+	.8byte	.LFE273
+	.8byte	.LFB279
+	.8byte	.LFE279
+	.8byte	.LFB282
+	.8byte	.LFE282
+	.8byte	.LFB284
+	.8byte	.LFE284
+	.8byte	.LFB293
+	.8byte	.LFE293
+	.8byte	.LFB294
+	.8byte	.LFE294
+	.8byte	.LFB295
+	.8byte	.LFE295
+	.8byte	.LFB200
+	.8byte	.LFE200
+	.8byte	.LFB201
+	.8byte	.LFE201
+	.8byte	.LFB296
+	.8byte	.LFE296
+	.8byte	.LFB297
+	.8byte	.LFE297
+	.8byte	.LFB300
+	.8byte	.LFE300
+	.8byte	.LFB303
+	.8byte	.LFE303
+	.8byte	.LFB304
+	.8byte	.LFE304
+	.8byte	.LFB305
+	.8byte	.LFE305
+	.8byte	.LFB306
+	.8byte	.LFE306
+	.8byte	.LFB307
+	.8byte	.LFE307
+	.8byte	.LFB314
+	.8byte	.LFE314
+	.8byte	.LFB315
+	.8byte	.LFE315
+	.8byte	.LFB316
+	.8byte	.LFE316
+	.8byte	.LFB337
+	.8byte	.LFE337
+	.8byte	.LFB338
+	.8byte	.LFE338
+	.8byte	.LFB340
+	.8byte	.LFE340
+	.8byte	.LFB230
+	.8byte	.LFE230
+	.8byte	.LFB236
+	.8byte	.LFE236
+	.8byte	.LFB341
+	.8byte	.LFE341
+	.8byte	.LFB342
+	.8byte	.LFE342
+	.8byte	.LFB240
+	.8byte	.LFE240
+	.8byte	.LFB209
+	.8byte	.LFE209
+	.8byte	.LFB345
+	.8byte	.LFE345
+	.8byte	.LFB206
+	.8byte	.LFE206
+	.8byte	.LFB225
+	.8byte	.LFE225
+	.8byte	.LFB227
+	.8byte	.LFE227
+	.8byte	.LFB237
+	.8byte	.LFE237
+	.8byte	.LFB253
+	.8byte	.LFE253
+	.8byte	.LFB254
+	.8byte	.LFE254
+	.8byte	.LFB257
+	.8byte	.LFE257
+	.8byte	.LFB258
+	.8byte	.LFE258
+	.8byte	.LFB256
+	.8byte	.LFE256
+	.8byte	.LFB259
+	.8byte	.LFE259
+	.8byte	.LFB262
+	.8byte	.LFE262
+	.8byte	.LFB280
+	.8byte	.LFE280
+	.8byte	.LFB291
+	.8byte	.LFE291
+	.8byte	.LFB318
+	.8byte	.LFE318
+	.8byte	.LFB267
+	.8byte	.LFE267
+	.8byte	.LFB270
+	.8byte	.LFE270
+	.8byte	.LFB275
+	.8byte	.LFE275
+	.8byte	.LFB276
+	.8byte	.LFE276
+	.8byte	.LFB277
+	.8byte	.LFE277
+	.8byte	.LFB278
+	.8byte	.LFE278
+	.8byte	.LFB207
+	.8byte	.LFE207
+	.8byte	.LFB285
+	.8byte	.LFE285
+	.8byte	.LFB290
+	.8byte	.LFE290
+	.8byte	.LFB309
+	.8byte	.LFE309
+	.8byte	.LFB310
+	.8byte	.LFE310
+	.8byte	.LFB343
+	.8byte	.LFE343
+	.8byte	.LFB344
+	.8byte	.LFE344
+	.8byte	.LFB346
+	.8byte	.LFE346
+	.8byte	.LFB226
+	.8byte	.LFE226
+	.8byte	.LFB298
+	.8byte	.LFE298
+	.8byte	.LFB317
+	.8byte	.LFE317
+	.8byte	.LFB301
+	.8byte	.LFE301
+	.8byte	.LFB302
+	.8byte	.LFE302
+	.8byte	.LFB268
+	.8byte	.LFE268
+	.8byte	.LFB261
+	.8byte	.LFE261
+	.8byte	.LFB281
+	.8byte	.LFE281
+	.8byte	.LFB288
+	.8byte	.LFE288
+	.8byte	.LFB229
+	.8byte	.LFE229
+	.8byte	.LFB231
+	.8byte	.LFE231
+	.8byte	.LFB263
+	.8byte	.LFE263
+	.8byte	.LFB286
+	.8byte	.LFE286
+	.8byte	.LFB265
+	.8byte	.LFE265
+	.8byte	.LFB264
+	.8byte	.LFE264
+	.8byte	.LFB271
+	.8byte	.LFE271
+	.8byte	.LFB287
+	.8byte	.LFE287
+	.8byte	.LFB269
+	.8byte	.LFE269
+	.8byte	.LFB289
+	.8byte	.LFE289
+	.8byte	.LFB299
+	.8byte	.LFE299
+	.8byte	.LFB215
+	.8byte	.LFE215
+	.8byte	.LFB216
+	.8byte	.LFE216
+	.8byte	.LFB212
+	.8byte	.LFE212
+	.8byte	.LFB213
+	.8byte	.LFE213
+	.8byte	.LFB218
+	.8byte	.LFE218
+	.8byte	.LFB308
+	.8byte	.LFE308
+	.8byte	.LFB311
+	.8byte	.LFE311
+	.8byte	.LFB283
+	.8byte	.LFE283
+	.8byte	.LFB313
+	.8byte	.LFE313
+	.8byte	.LFB312
+	.8byte	.LFE312
+	.8byte	.LFB319
+	.8byte	.LFE319
+	.8byte	.LFB320
+	.8byte	.LFE320
+	.8byte	.LFB214
+	.8byte	.LFE214
+	.8byte	.LFB219
+	.8byte	.LFE219
+	.8byte	.LFB217
+	.8byte	.LFE217
+	.8byte	.LFB220
+	.8byte	.LFE220
+	.8byte	.LFB274
+	.8byte	.LFE274
+	.8byte	.LFB292
+	.8byte	.LFE292
+	.8byte	.LFB210
+	.8byte	.LFE210
+	.8byte	.LFB211
+	.8byte	.LFE211
+	.8byte	.LFB347
+	.8byte	.LFE347
+	.8byte	0
+	.8byte	0
+	.section	.debug_line,"",@progbits
+.Ldebug_line0:
+	.section	.debug_str,"MS",@progbits,1
+.LASF727:
+	.string	"FtlEctTblFlush"
+.LASF590:
+	.string	"gc_page_num"
+.LASF606:
+	.string	"superBlk"
+.LASF499:
+	.string	"g_gc_bad_block_temp_num"
+.LASF363:
+	.string	"all_blk_used_slc_mode"
+.LASF43:
+	.string	"reserved"
+.LASF508:
+	.string	"g_totle_read_sector"
+.LASF574:
+	.string	"__func__"
+.LASF419:
+	.string	"c_ftl_nand_sys_blks_per_plane"
+.LASF732:
+	.string	"nSec"
+.LASF728:
+	.string	"forceFlush"
+.LASF107:
+	.string	"bootm_headers"
+.LASF453:
+	.string	"p_gc_data_buf"
+.LASF125:
+	.string	"rd_end"
+.LASF492:
+	.string	"p_gc_blk_tbl"
+.LASF787:
+	.string	"FtlFreeSysBlkQueueOut"
+.LASF324:
+	.string	"ftl_bbt_blk_header"
+.LASF227:
+	.string	"eth_device"
+.LASF306:
+	.string	"sign"
+.LASF832:
+	.string	"sctidx"
+.LASF669:
+	.string	"Ftl_load_ext_data"
+.LASF96:
+	.string	"ih_comp"
+.LASF608:
+	.string	"block"
+.LASF22:
+	.string	"_Bool"
+.LASF651:
+	.string	"min_ec"
+.LASF601:
+	.string	"req_read_temp"
+.LASF279:
+	.string	"p_spare"
+.LASF685:
+	.string	"recovery_cur_page_ver"
+.LASF506:
+	.string	"g_totle_write_page_count"
+.LASF245:
+	.string	"net_root_path"
+.LASF624:
+	.string	"lookup_ppa"
+.LASF817:
+	.string	"FtlBbmTblFlush"
+.LASF610:
+	.string	"Ftl_get_new_temp_ppa"
+.LASF327:
+	.string	"ftl_data_blk_header"
+.LASF284:
+	.string	"blk_per_plane"
+.LASF360:
+	.string	"min_erase_count"
+.LASF114:
+	.string	"fit_noffset_os"
+.LASF391:
+	.string	"des_ppa"
+.LASF237:
+	.string	"priv"
+.LASF777:
+	.string	"insert_free_list"
+.LASF880:
+	.ascii	"GNU C11 6.3.1 20170404 -ms"
+	.string	"trict-align -march=armv8-a+nosimd -mlittle-endian -mabi=lp64 -g -Os -fno-builtin -ffreestanding -fshort-wchar -fno-stack-protector -fno-delete-null-pointer-checks -fstack-usage -fno-pic -ffunction-sections -fdata-sections -ffixed-r9 -fno-common -ffixed-x18"
+.LASF21:
+	.string	"___strtok"
+.LASF198:
+	.string	"UCLASS_SPI_GENERIC"
+.LASF477:
+	.string	"g_l2p_last_update_region_id"
+.LASF698:
+	.string	"ftl_sb_update_avl_pages"
+.LASF572:
+	.string	"FlashProgPages"
+.LASF856:
+	.string	"test_page_num"
+.LASF684:
+	.string	"lookup_superblock_id"
+.LASF420:
+	.string	"c_ftl_nand_init_sys_blks_per_plane"
+.LASF865:
+	.string	"FtlConstantsInit"
+.LASF593:
+	.string	"num_io"
+.LASF868:
+	.string	"FtlPrintInfo"
+.LASF744:
+	.string	"l2p_flush"
+.LASF378:
+	.string	"rear"
+.LASF305:
+	.string	"ftl_l2p_map_info"
+.LASF521:
+	.string	"g_in_swl_replace"
+.LASF404:
+	.string	"c_ftl_nand_page_pre_slc_blk"
+.LASF243:
+	.string	"net_nis_domain"
+.LASF764:
+	.string	"List_update_data_list"
+.LASF852:
+	.string	"create_first_buffer_superblock"
+.LASF503:
+	.string	"g_gc_merge_free_blk_threshold"
+.LASF693:
+	.string	"last_mlc_page_version"
+.LASF630:
+	.string	"IsBlkInGcList"
+.LASF235:
+	.string	"next"
+.LASF312:
+	.string	"pBlkVpcTbl"
+.LASF697:
+	.string	"FtlReUsePrevPpa"
+.LASF658:
+	.string	"update_multiplier_value"
+.LASF411:
+	.string	"c_ftl_nand_totle_phy_blks"
+.LASF874:
+	.string	"memcmp"
+.LASF421:
+	.string	"c_ftl_nand_max_sys_blks"
+.LASF577:
+	.string	"PhyBlk"
+.LASF576:
+	.string	"FlashReadPages"
+.LASF479:
+	.string	"p_free_data_block_list_head"
+.LASF148:
+	.string	"UCLASS_AHCI"
+.LASF161:
+	.string	"UCLASS_I2C_MUX"
+.LASF263:
+	.string	"uclass_id"
+.LASF598:
+	.string	"get_new_gc_superblock"
+.LASF622:
+	.string	"BOPS_EN"
+.LASF241:
+	.string	"net_netmask"
+.LASF849:
+	.string	"bad_block_cnt"
+.LASF424:
+	.string	"c_ftl_nand_max_data_blks"
+.LASF560:
+	.string	"pvTo"
+.LASF117:
+	.string	"fit_noffset_rd"
+.LASF192:
+	.string	"UCLASS_RTC"
+.LASF809:
+	.string	"pBbtHeader"
+.LASF46:
+	.string	"bi_memsize"
+.LASF47:
+	.string	"bi_flashstart"
+.LASF761:
+	.string	"minValidPageCount"
+.LASF232:
+	.string	"recv"
+.LASF122:
+	.string	"fit_uname_setup"
+.LASF199:
+	.string	"UCLASS_SYSCON"
+.LASF153:
+	.string	"UCLASS_DISPLAY"
+.LASF519:
+	.string	"g_max_erase_count"
+.LASF568:
+	.string	"flash_type"
+.LASF529:
+	.string	"g_recovery_ppa_tbl"
+.LASF71:
+	.string	"IRQ_STACK_START_IN"
+.LASF63:
+	.string	"bi_dram"
+.LASF191:
+	.string	"UCLASS_RKNAND"
+.LASF581:
+	.string	"die_index"
+.LASF804:
+	.string	"ver2"
+.LASF434:
+	.string	"gSysFreeQueue"
+.LASF159:
+	.string	"UCLASS_I2C_EEPROM"
+.LASF533:
+	.string	"g_nand_phy_info"
+.LASF555:
+	.string	"check_spare_buf"
+.LASF144:
+	.string	"UCLASS_PCI_EMUL"
+.LASF72:
+	.string	"fdt_header"
+.LASF429:
+	.string	"g_MaxLpn"
+.LASF342:
+	.string	"bufferPageOffset"
+.LASF387:
+	.string	"reversed"
+.LASF507:
+	.string	"g_totle_write_sector"
+.LASF75:
+	.string	"off_dt_struct"
+.LASF417:
+	.string	"c_ftl_nand_max_vendor_blks"
+.LASF768:
+	.string	"prev_valid_page_count"
+.LASF873:
+	.string	"FtlPrintInfo2buf"
+.LASF480:
+	.string	"p_data_block_list_head"
+.LASF265:
+	.string	"NETLOOP_CONTINUE"
+.LASF806:
+	.string	"P2V_plane"
+.LASF486:
+	.string	"g_gc_temp_superblock"
+.LASF195:
+	.string	"UCLASS_SPI"
+.LASF416:
+	.string	"c_ftl_nand_max_map_blks"
+.LASF302:
+	.string	"BbtMap"
+.LASF743:
+	.string	"found_lpa"
+.LASF209:
+	.string	"UCLASS_VIDEO_CONSOLE"
+.LASF367:
+	.string	"last_refresh_read_count"
+.LASF207:
+	.string	"UCLASS_VIDEO"
+.LASF614:
+	.string	"current_ppa"
+.LASF851:
+	.string	"create_first_active_superblock"
+.LASF313:
+	.string	"pMapPpnTbl"
+.LASF269:
+	.string	"net_state"
+.LASF724:
+	.string	"num_page"
+.LASF425:
+	.string	"ftl_gc_temp_power_lost_recovery_flag"
+.LASF613:
+	.string	"totle_num"
+.LASF731:
+	.string	"Index"
+.LASF681:
+	.string	"next_free_active_page"
+.LASF604:
+	.string	"spperBlk"
+.LASF65:
+	.string	"IRQ_STACK_START"
+.LASF132:
+	.string	"verify"
+.LASF713:
+	.string	"ftl_set_blk_mode"
+.LASF266:
+	.string	"NETLOOP_RESTART"
+.LASF270:
+	.string	"uint8"
+.LASF353:
+	.string	"write_page_count"
+.LASF609:
+	.string	"Ftl_gc_temp_data_write_back"
+.LASF295:
+	.string	"erase_blk"
+.LASF722:
+	.string	"re_save_vpndata"
+.LASF463:
+	.string	"p_valid_page_count_check_table"
+.LASF502:
+	.string	"g_gc_free_blk_threshold"
+.LASF482:
+	.string	"g_num_free_superblocks"
+.LASF226:
+	.string	"s_addr"
+.LASF819:
+	.string	"re_save_bbmdata"
+.LASF200:
+	.string	"UCLASS_SYSRESET"
+.LASF627:
+	.string	"FtlGcUpdatePage"
+.LASF811:
+	.string	"FtlLoadFactoryBbt"
+.LASF289:
+	.string	"sec_per_blk"
+.LASF136:
+	.string	"UCLASS_ROOT"
+.LASF296:
+	.string	"prog_page"
+.LASF340:
+	.string	"activePageOffset"
+.LASF152:
+	.string	"UCLASS_CROS_EC"
+.LASF407:
+	.string	"c_ftl_nand_sec_pre_page_shift"
+.LASF788:
+	.string	"IsInFreeQueue"
+.LASF236:
+	.string	"index"
+.LASF745:
+	.string	"select_l2p_ram_region"
+.LASF335:
+	.string	"maxDieNum"
+.LASF290:
+	.string	"byte_per_sec"
+.LASF278:
+	.string	"p_data"
+.LASF528:
+	.string	"g_recovery_page_min_ver"
+.LASF571:
+	.string	"block_size"
+.LASF90:
+	.string	"ih_load"
+.LASF835:
+	.string	"FtlProgPages"
+.LASF664:
+	.string	"error_flag"
+.LASF403:
+	.string	"c_ftl_nand_page_pre_blk"
+.LASF794:
+	.string	"blk_Id"
+.LASF213:
+	.string	"UCLASS_KEY"
+.LASF875:
+	.string	"memcpy"
+.LASF67:
+	.string	"_datarel_start_ofs"
+.LASF373:
+	.string	"List_Node"
+.LASF578:
+	.string	"p_die"
+.LASF314:
+	.string	"in_gc_mode"
+.LASF147:
+	.string	"UCLASS_ADC"
+.LASF94:
+	.string	"ih_arch"
+.LASF163:
+	.string	"UCLASS_IRQ"
+.LASF6:
+	.string	"__u8"
+.LASF494:
+	.string	"g_gc_page_offset"
+.LASF240:
+	.string	"net_gateway"
+.LASF802:
+	.string	"ftl_cmp_data_ver"
+.LASF430:
+	.string	"g_VaildLpn"
+.LASF471:
+	.string	"p_vendor_block_valid_page_count"
+.LASF262:
+	.string	"net_ping_ip"
+.LASF104:
+	.string	"type"
+.LASF40:
+	.string	"lmb_region"
+.LASF632:
+	.string	"numREQ"
+.LASF34:
+	.string	"protect"
+.LASF855:
+	.string	"max_test_page_num"
+.LASF704:
+	.string	"blk_id"
+.LASF349:
+	.string	"GlobalDataVersion"
+.LASF793:
+	.string	"erase_flag"
+.LASF362:
+	.string	"last_refresh_data_times"
+.LASF707:
+	.string	"totleBlkNum"
+.LASF678:
+	.string	"saved_active_page"
+.LASF776:
+	.string	"pTmp"
+.LASF602:
+	.string	"add_count"
+.LASF547:
+	.string	"ftl_gc_temp_block_bops_scan_page_addr"
+.LASF394:
+	.string	"c_ftl_nand_type"
+.LASF773:
+	.string	"pHead"
+.LASF687:
+	.string	"recovery_flash_mode"
+.LASF138:
+	.string	"UCLASS_TEST"
+.LASF485:
+	.string	"g_buffer_superblock"
+.LASF649:
+	.string	"node_id"
+.LASF397:
+	.string	"c_ftl_nand_blks_per_die"
+.LASF261:
+	.string	"net_boot_file_expected_size_in_blocks"
+.LASF23:
+	.string	"image_base"
+.LASF110:
+	.string	"legacy_hdr_valid"
+.LASF203:
+	.string	"UCLASS_TPM"
+.LASF575:
+	.string	"read_req"
+.LASF432:
+	.string	"gBbtInfo"
+.LASF169:
+	.string	"UCLASS_MISC"
+.LASF31:
+	.string	"sector_count"
+.LASF406:
+	.string	"c_ftl_nand_sec_pre_page"
+.LASF588:
+	.string	"mode"
+.LASF813:
+	.string	"FtlLoadBbt"
+.LASF561:
+	.string	"pvForm"
+.LASF323:
+	.string	"padding"
+.LASF460:
+	.string	"p_swl_mul_table"
+.LASF628:
+	.string	"src_ppa"
+.LASF682:
+	.string	"detected_active_page"
+.LASF389:
+	.string	"ftl_gc_page_item"
+.LASF549:
+	.string	"mem_malloc_start"
+.LASF210:
+	.string	"UCLASS_VIDEO_CRTC"
+.LASF58:
+	.string	"bi_ethspeed"
+.LASF98:
+	.string	"image_header_t"
+.LASF770:
+	.string	"pPrev"
+.LASF474:
+	.string	"g_totle_vendor_block"
+.LASF623:
+	.string	"superblock_id"
+.LASF592:
+	.string	"plane"
+.LASF11:
+	.string	"phys_addr_t"
+.LASF95:
+	.string	"ih_type"
+.LASF845:
+	.string	"sftl_init"
+.LASF2:
+	.string	"unsigned char"
+.LASF611:
+	.string	"FtlGcScanTempBlk"
+.LASF109:
+	.string	"legacy_hdr_os_copy"
+.LASF760:
+	.string	"vpcTbl"
+.LASF176:
+	.string	"UCLASS_PANEL_BACKLIGHT"
+.LASF339:
+	.string	"activeSuperblockId"
+.LASF803:
+	.string	"ver1"
+.LASF280:
+	.string	"nand_phy_info"
+.LASF759:
+	.string	"ftl_free_no_use_map_blk"
+.LASF805:
+	.string	"P2V_block_in_plane"
+.LASF556:
+	.string	"str1"
+.LASF557:
+	.string	"str2"
+.LASF718:
+	.string	"pMapHeader"
+.LASF140:
+	.string	"UCLASS_TEST_BUS"
+.LASF716:
+	.string	"FtlScanSysBlk"
+.LASF52:
+	.string	"bi_arm_freq"
+.LASF695:
+	.string	"lookup_ppa_ver"
+.LASF752:
+	.string	"region_num"
+.LASF476:
+	.string	"p_l2p_map_buf"
+.LASF488:
+	.string	"gp_last_act_superblock"
+.LASF870:
+	.string	"Ftl_log2"
+.LASF448:
+	.string	"p_sys_spare_buf"
+.LASF165:
+	.string	"UCLASS_LED"
+.LASF552:
+	.string	"p_current"
+.LASF646:
+	.string	"get_new_id"
+.LASF253:
+	.string	"net_rx_packet_len"
+.LASF255:
+	.string	"net_null_ethaddr"
+.LASF543:
+	.string	"g_ect_tbl_power_up_flush"
+.LASF594:
+	.string	"physical_block"
+.LASF32:
+	.string	"flash_id"
+.LASF838:
+	.string	"absolute_sector"
+.LASF222:
+	.string	"load_addr"
+.LASF347:
+	.string	"PowerLostTimes"
+.LASF501:
+	.string	"g_gc_bad_block_temp_tbl"
+.LASF464:
+	.string	"p_blk_mode_table"
+.LASF775:
+	.string	"List_remove_node"
+.LASF291:
+	.string	"reserved_blk"
+.LASF733:
+	.string	"pBuf"
+.LASF791:
+	.string	"tmp_ec"
+.LASF484:
+	.string	"g_active_superblock"
+.LASF689:
+	.string	"recovery_super_page"
+.LASF437:
+	.string	"req_sys"
+.LASF381:
+	.string	"available_pages"
+.LASF799:
+	.string	"high"
+.LASF833:
+	.string	"nscts"
+.LASF410:
+	.string	"c_ftl_nand_reserved_blks"
+.LASF700:
+	.string	"FtlL2PDataInit"
+.LASF230:
+	.string	"init"
+.LASF215:
+	.string	"UCLASS_CHARGE_DISPLAY"
+.LASF573:
+	.string	"check"
+.LASF145:
+	.string	"UCLASS_USB_EMUL"
+.LASF797:
+	.string	"FtlFreeSysBlkQueueInit"
+.LASF677:
+	.string	"FtlRecoverySuperblock"
+.LASF396:
+	.string	"c_ftl_nand_planes_per_die"
+.LASF405:
+	.string	"c_ftl_nand_page_pre_super_blk"
+.LASF292:
+	.string	"ecc_bits"
+.LASF293:
+	.string	"nand_ops"
+.LASF599:
+	.string	"tmp_blk"
+.LASF523:
+	.string	"g_gc_head_data_block"
+.LASF828:
+	.string	"FtlWrite"
+.LASF182:
+	.string	"UCLASS_PINCTRL"
+.LASF831:
+	.string	"num_lpa"
+.LASF867:
+	.string	"blkNum"
+.LASF364:
+	.string	"SlcPartLbaEndSector"
+.LASF84:
+	.string	"fdt32_t"
+.LASF469:
+	.string	"g_totle_map_block"
+.LASF375:
+	.string	"value"
+.LASF211:
+	.string	"UCLASS_WDT"
+.LASF101:
+	.string	"image_len"
+.LASF441:
+	.string	"req_gc"
+.LASF854:
+	.string	"is_sys_blk"
+.LASF42:
+	.string	"memory"
+.LASF821:
+	.string	"bitmap"
+.LASF319:
+	.string	"ftl_ect_tbl_info"
+.LASF205:
+	.string	"UCLASS_USB_DEV_GENERIC"
+.LASF212:
+	.string	"UCLASS_FG"
+.LASF755:
+	.string	"lastMapBlk"
+.LASF370:
+	.string	"totle_write_sector"
+.LASF522:
+	.string	"g_ftl_nand_free_count"
+.LASF626:
+	.string	"p_gc_page"
+.LASF20:
+	.string	"errno"
+.LASF532:
+	.string	"gNandPhyInfo"
+.LASF861:
+	.string	"ven_blk"
+.LASF30:
+	.string	"size"
+.LASF244:
+	.string	"net_hostname"
+.LASF772:
+	.string	"List_pop_head_node"
+.LASF308:
+	.string	"BlkNum"
+.LASF850:
+	.string	"sys_bad_block_cnt"
+.LASF596:
+	.string	"p_dataHeader"
+.LASF780:
+	.string	"tmp_id"
+.LASF600:
+	.string	"FtlReadRefresh"
+.LASF645:
+	.string	"free_blk_index"
+.LASF820:
+	.string	"FtlBbt2Bitmap"
+.LASF662:
+	.string	"ftl_check_vpc"
+.LASF108:
+	.string	"legacy_hdr_os"
+.LASF100:
+	.string	"image_start"
+.LASF580:
+	.string	"page_index"
+.LASF18:
+	.string	"uint8_t"
+.LASF55:
+	.string	"bi_bootflags"
+.LASF487:
+	.string	"g_gc_superblock"
+.LASF303:
+	.string	"ftl_sys_info"
+.LASF87:
+	.string	"ih_hcrc"
+.LASF377:
+	.string	"front"
+.LASF175:
+	.string	"UCLASS_PANEL"
+.LASF472:
+	.string	"p_vendor_block_ver_table"
+.LASF204:
+	.string	"UCLASS_USB"
+.LASF517:
+	.string	"g_totle_slc_erase_count"
+.LASF461:
+	.string	"g_totle_swl_count"
+.LASF139:
+	.string	"UCLASS_TEST_FDT"
+.LASF294:
+	.string	"get_bad_blk_list"
+.LASF343:
+	.string	"gcTempSuperblockId"
+.LASF238:
+	.string	"eth_current"
+.LASF766:
+	.string	"node_valid_page_count"
+.LASF53:
+	.string	"bi_dsp_freq"
+.LASF5:
+	.string	"uchar"
+.LASF668:
+	.string	"pages"
+.LASF89:
+	.string	"ih_size"
+.LASF570:
+	.string	"addr"
+.LASF142:
+	.string	"UCLASS_SPI_EMUL"
+.LASF863:
+	.string	"FtlMemInit"
+.LASF818:
+	.string	"write_count"
+.LASF663:
+	.string	"prev_ppa"
+.LASF586:
+	.string	"FlashTestBlk"
+.LASF179:
+	.string	"UCLASS_PCI_GENERIC"
+.LASF50:
+	.string	"bi_sramstart"
+.LASF66:
+	.string	"FIQ_STACK_START"
+.LASF872:
+	.string	"rknand_proc_ftlread"
+.LASF228:
+	.string	"enetaddr"
+.LASF181:
+	.string	"UCLASS_PINCONFIG"
+.LASF741:
+	.string	"l2p_region_id"
+.LASF554:
+	.string	"check_buf"
+.LASF190:
+	.string	"UCLASS_RESET"
+.LASF137:
+	.string	"UCLASS_DEMO"
+.LASF44:
+	.string	"bd_info"
+.LASF275:
+	.string	"nand_req"
+.LASF356:
+	.string	"slc_erase_count"
+.LASF60:
+	.string	"bi_busfreq"
+.LASF769:
+	.string	"prev_multiplier_value"
+.LASF497:
+	.string	"g_gc_next_blk"
+.LASF516:
+	.string	"g_min_erase_count"
+.LASF149:
+	.string	"UCLASS_BLK"
+.LASF546:
+	.string	"gc_discard_updated"
+.LASF737:
+	.string	"FtlVendorPartWrite"
+.LASF621:
+	.string	"FtlGcFreeTempBlock"
+.LASF248:
+	.string	"net_ip"
+.LASF229:
+	.string	"iobase"
+.LASF657:
+	.string	"GetFreeBlockMinEraseCount"
+.LASF336:
+	.string	"activeFlashMode"
+.LASF92:
+	.string	"ih_dcrc"
+.LASF35:
+	.string	"flash_info_t"
+.LASF655:
+	.string	"GetFreeBlockMaxEraseCount"
+.LASF711:
+	.string	"sblk"
+.LASF754:
+	.string	"ftl_map_blk_gc"
+.LASF877:
+	.string	"printf"
+.LASF59:
+	.string	"bi_intfreq"
+.LASF223:
+	.string	"save_addr"
+.LASF538:
+	.string	"TotleReadBufferCount1"
+.LASF567:
+	.string	"request"
+.LASF330:
+	.string	"regionId"
+.LASF166:
+	.string	"UCLASS_LPC"
+.LASF285:
+	.string	"blk_per_die"
+.LASF352:
+	.string	"gc_page_count"
+.LASF49:
+	.string	"bi_flashoffset"
+.LASF541:
+	.string	"TotleReadBufferMatchCount"
+.LASF438:
+	.string	"req_read"
+.LASF751:
+	.string	"Ftl_write_map_blk_to_last_page"
+.LASF466:
+	.string	"p_map_block_valid_page_count"
+.LASF167:
+	.string	"UCLASS_MAILBOX"
+.LASF792:
+	.string	"FtlFreeSysBlkQueueIn"
+.LASF366:
+	.string	"readErrorCount"
+.LASF585:
+	.string	"sftl_gc"
+.LASF796:
+	.string	"FtlFreeSysBlkQueueEmpty"
+.LASF762:
+	.string	"load_l2p_region"
+.LASF639:
+	.string	"p_superblock"
+.LASF301:
+	.string	"fBbtBlk"
+.LASF77:
+	.string	"off_mem_rsvmap"
+.LASF445:
+	.string	"p_sys_data_buf"
+.LASF883:
+	.string	"l2p_addr_tran"
+.LASF164:
+	.string	"UCLASS_KEYBOARD"
+.LASF287:
+	.string	"page_per_slc_blk"
+.LASF398:
+	.string	"c_ftl_nand_blks_per_die_shift"
+.LASF738:
+	.string	"log2phys"
+.LASF478:
+	.string	"p_data_block_list_table"
+.LASF171:
+	.string	"UCLASS_MOD_EXP"
+.LASF644:
+	.string	"num_bad_block"
+.LASF85:
+	.string	"image_header"
+.LASF701:
+	.string	"FtlLoadVonderInfo"
+.LASF612:
+	.string	"pSuperblock"
+.LASF535:
+	.string	"ftl_temp_buf"
+.LASF384:
+	.string	"flash_mode"
+.LASF514:
+	.string	"g_totle_mlc_erase_count"
+.LASF79:
+	.string	"last_comp_version"
+.LASF415:
+	.string	"c_ftl_nand_map_blks_per_plane"
+.LASF810:
+	.string	"re_try_next_blk"
+.LASF56:
+	.string	"bi_ip_addr"
+.LASF579:
+	.string	"block_index"
+.LASF36:
+	.string	"flash_info"
+.LASF496:
+	.string	"g_gc_cur_blk_max_valid_pages"
+.LASF16:
+	.string	"ushort"
+.LASF763:
+	.string	"phyAddr"
+.LASF73:
+	.string	"magic"
+.LASF790:
+	.string	"tmp_blk_id"
+.LASF876:
+	.string	"memset"
+.LASF242:
+	.string	"net_dns_server"
+.LASF562:
+	.string	"ftl_memset"
+.LASF830:
+	.string	"end_lpa"
+.LASF882:
+	.string	"/home/ldq/rk-linux/u-boot-debug"
+.LASF735:
+	.string	"result"
+.LASF625:
+	.string	"scan_page_num"
+.LASF267:
+	.string	"NETLOOP_SUCCESS"
+.LASF27:
+	.string	"name"
+.LASF512:
+	.string	"g_totle_cache_write_count"
+.LASF767:
+	.string	"node_multiplier_value"
+.LASF758:
+	.string	"blk_index"
+.LASF69:
+	.string	"_datarellocal_start_ofs"
+.LASF288:
+	.string	"sec_per_page"
+.LASF409:
+	.string	"c_ftl_nand_byte_pre_oob"
+.LASF121:
+	.string	"fit_hdr_setup"
+.LASF150:
+	.string	"UCLASS_CLK"
+.LASF686:
+	.string	"detected_error_page"
+.LASF129:
+	.string	"initrd_end"
+.LASF618:
+	.string	"read_super_page"
+.LASF219:
+	.string	"monitor_flash_len"
+.LASF620:
+	.string	"FtlGcPageVarInit"
+.LASF822:
+	.string	"FtlBbtInfoPrint"
+.LASF530:
+	.string	"c_mlc_erase_count_value"
+.LASF551:
+	.string	"mem_malloc_brk"
+.LASF483:
+	.string	"g_num_data_superblocks"
+.LASF753:
+	.string	"blkTbl"
+.LASF348:
+	.string	"mlc_erase_count"
+.LASF12:
+	.string	"phys_size_t"
+.LASF715:
+	.string	"FtlLoadEctTbl"
+.LASF62:
+	.string	"bi_boot_params"
+.LASF214:
+	.string	"UCLASS_RC"
+.LASF51:
+	.string	"bi_sramsize"
+.LASF879:
+	.string	"sprintf"
+.LASF605:
+	.string	"FtlGcMarkBadPhyBlk"
+.LASF641:
+	.string	"allocate_new_data_superblock"
+.LASF13:
+	.string	"sizetype"
+.LASF57:
+	.string	"bi_enetaddr"
+.LASF252:
+	.string	"net_rx_packet"
+.LASF350:
+	.string	"GlobalSysVersion"
+.LASF329:
+	.string	"ftl_map_blk_header"
+.LASF597:
+	.string	"gc_next_superblock"
+.LASF812:
+	.string	"blkAddr"
+.LASF193:
+	.string	"UCLASS_SCSI"
+.LASF0:
+	.string	"short unsigned int"
+.LASF4:
+	.string	"signed char"
+.LASF250:
+	.string	"net_tx_packet"
+.LASF696:
+	.string	"current_ppa_ver"
+.LASF784:
+	.string	"tmp_multiplier_value"
+.LASF566:
+	.string	"FlashEraseBlocks"
+.LASF33:
+	.string	"start"
+.LASF829:
+	.string	"start_lpa"
+.LASF553:
+	.string	"current"
+.LASF218:
+	.string	"LOGF_MAX_CATEGORIES"
+.LASF518:
+	.string	"g_totle_sys_slc_erase_count"
+.LASF300:
+	.string	"prev_id"
+.LASF276:
+	.string	"status"
+.LASF103:
+	.string	"comp"
+.LASF325:
+	.string	"count"
+.LASF146:
+	.string	"UCLASS_SIMPLE_BUS"
+.LASF539:
+	.string	"TotleReadBufferCount2"
+.LASF540:
+	.string	"TotleReadBufferCount3"
+.LASF455:
+	.string	"c_gc_page_buf_num"
+.LASF719:
+	.string	"FtlVpcTblFlush"
+.LASF189:
+	.string	"UCLASS_REMOTEPROC"
+.LASF742:
+	.string	"lpn_index"
+.LASF118:
+	.string	"fit_hdr_fdt"
+.LASF631:
+	.string	"FtlGcBufAlloc"
+.LASF569:
+	.string	"num_req"
+.LASF778:
+	.string	"node_erase_count"
+.LASF254:
+	.string	"net_bcast_ethaddr"
+.LASF736:
+	.string	"ppn_index"
+.LASF795:
+	.string	"FtlFreeSysBlkQueueFull"
+.LASF133:
+	.string	"state"
+.LASF48:
+	.string	"bi_flashsize"
+.LASF746:
+	.string	"target_region"
+.LASF19:
+	.string	"__be32"
+.LASF131:
+	.string	"cmdline_end"
+.LASF418:
+	.string	"c_ftl_vendor_part_size"
+.LASF251:
+	.string	"net_rx_packets"
+.LASF826:
+	.string	"sftl_read"
+.LASF452:
+	.string	"p_gc_spare_buf"
+.LASF151:
+	.string	"UCLASS_CPU"
+.LASF467:
+	.string	"p_map_block_ver_table"
+.LASF456:
+	.string	"g_gc_num_req"
+.LASF449:
+	.string	"p_io_data_buf_0"
+.LASF450:
+	.string	"p_io_data_buf_1"
+.LASF68:
+	.string	"_datarelrolocal_start_ofs"
+.LASF683:
+	.string	"mlc_detected_active_page"
+.LASF853:
+	.string	"FtlLowFormatEraseBlock"
+.LASF317:
+	.string	"region_id"
+.LASF326:
+	.string	"sysBlksPerPlane"
+.LASF816:
+	.string	"FtlBbtMemInit"
+.LASF309:
+	.string	"maxBlkNum"
+.LASF395:
+	.string	"c_ftl_nand_die_num"
+.LASF286:
+	.string	"page_per_blk"
+.LASF721:
+	.string	"prog_error_count"
+.LASF372:
+	.string	"progErrorCount"
+.LASF259:
+	.string	"net_boot_file_name"
+.LASF495:
+	.string	"g_gc_cur_blk_valid_pages"
+.LASF233:
+	.string	"halt"
+.LASF653:
+	.string	"maxFreeBlockEraseCount"
+.LASF86:
+	.string	"ih_magic"
+.LASF582:
+	.string	"block_in_die"
+.LASF457:
+	.string	"gp_ect_tbl_info"
+.LASF654:
+	.string	"minDataBlockEraseCount"
+.LASF17:
+	.string	"ulong"
+.LASF41:
+	.string	"region"
+.LASF315:
+	.string	"dump_write_en"
+.LASF8:
+	.string	"__u32"
+.LASF249:
+	.string	"net_server_ip"
+.LASF785:
+	.string	"INSERT_DATA_LIST"
+.LASF206:
+	.string	"UCLASS_USB_HUB"
+.LASF825:
+	.string	"sftl_write"
+.LASF444:
+	.string	"p_plane_order_table"
+.LASF781:
+	.string	"insert_data_list"
+.LASF70:
+	.string	"_datarelro_start_ofs"
+.LASF617:
+	.string	"ReInit"
+.LASF172:
+	.string	"UCLASS_MTD"
+.LASF134:
+	.string	"bootm_headers_t"
+.LASF729:
+	.string	"ec_mod_count"
+.LASF565:
+	.string	"spare"
+.LASF527:
+	.string	"g_recovery_page_num"
+.LASF15:
+	.string	"long int"
+.LASF667:
+	.string	"req_temp"
+.LASF141:
+	.string	"UCLASS_TEST_PROBE"
+.LASF881:
+	.string	"drivers/rkflash/rksftl/rk_sftl.c"
+.LASF659:
+	.string	"FtlSysBlkInit"
+.LASF524:
+	.string	"g_gc_head_data_block_count"
+.LASF297:
+	.string	"read_page"
+.LASF177:
+	.string	"UCLASS_PCH"
+.LASF178:
+	.string	"UCLASS_PCI"
+.LASF154:
+	.string	"UCLASS_DMA"
+.LASF426:
+	.string	"g_GlobalSysVersion"
+.LASF511:
+	.string	"g_tmp_data_superblock_id"
+.LASF871:
+	.string	"limit"
+.LASF660:
+	.string	"ftl_scan_all_data"
+.LASF331:
+	.string	"ftl_sys_blk_header"
+.LASF393:
+	.string	"flag"
+.LASF470:
+	.string	"p_vendor_block_table"
+.LASF679:
+	.string	"saved_active_plane"
+.LASF747:
+	.string	"hit_count"
+.LASF714:
+	.string	"FtlGcReFreshBadBlk"
+.LASF380:
+	.string	"current_page"
+.LASF201:
+	.string	"UCLASS_THERMAL"
+.LASF814:
+	.string	"FtlBbtCalcTotleCnt"
+.LASF786:
+	.string	"INSERT_FREE_LIST"
+.LASF563:
+	.string	"FlashGetBadBlockList"
+.LASF694:
+	.string	"prev_ppa_ver"
+.LASF246:
+	.string	"net_ethaddr"
+.LASF225:
+	.string	"in_addr"
+.LASF844:
+	.string	"FtlSysFlush"
+.LASF99:
+	.string	"image_info"
+.LASF88:
+	.string	"ih_time"
+.LASF607:
+	.string	"FtlGcRefreshBlock"
+.LASF334:
+	.string	"ftl_sys_save_info"
+.LASF771:
+	.string	"List_get_gc_head_node"
+.LASF399:
+	.string	"c_ftl_nand_planes_num"
+.LASF808:
+	.string	"FtlMakeBbt"
+.LASF37:
+	.string	"long double"
+.LASF481:
+	.string	"p_data_block_list_tail"
+.LASF493:
+	.string	"g_gc_blk_num"
+.LASF81:
+	.string	"size_dt_strings"
+.LASF271:
+	.string	"uint16"
+.LASF603:
+	.string	"FtlGcFreeBadSuperBlk"
+.LASF106:
+	.string	"image_info_t"
+.LASF703:
+	.string	"pMapBlockInfo"
+.LASF616:
+	.string	"error_phy_page"
+.LASF3:
+	.string	"long unsigned int"
+.LASF414:
+	.string	"c_ftl_nand_vendor_region_num"
+.LASF158:
+	.string	"UCLASS_I2C"
+.LASF143:
+	.string	"UCLASS_I2C_EMUL"
+.LASF28:
+	.string	"select_hwpart"
+.LASF257:
+	.string	"net_native_vlan"
+.LASF351:
+	.string	"ftl_sys_ext_info"
+.LASF247:
+	.string	"net_server_ethaddr"
+.LASF208:
+	.string	"UCLASS_VIDEO_BRIDGE"
+.LASF691:
+	.string	"function_exit"
+.LASF135:
+	.string	"images"
+.LASF525:
+	.string	"g_gc_skip_write_count"
+.LASF619:
+	.string	"rknand_print_hex"
+.LASF635:
+	.string	"FtlGcBufInit"
+.LASF446:
+	.string	"p_sys_data_buf_1"
+.LASF14:
+	.string	"char"
+.LASF310:
+	.string	"pBlkTbl"
+.LASF113:
+	.string	"fit_uname_os"
+.LASF500:
+	.string	"g_gc_bad_block_gc_index"
+.LASF692:
+	.string	"last_page_version"
+.LASF801:
+	.string	"pagePreBlk"
+.LASF281:
+	.string	"nand_type"
+.LASF112:
+	.string	"fit_hdr_os"
+.LASF283:
+	.string	"plane_per_die"
+.LASF490:
+	.string	"g_sys_ext_data"
+.LASF272:
+	.string	"uint32"
+.LASF564:
+	.string	"table"
+.LASF299:
+	.string	"page"
+.LASF642:
+	.string	"allocate_data_superblock"
+.LASF316:
+	.string	"ftl_l2p_ram_map_info"
+.LASF102:
+	.string	"load"
+.LASF264:
+	.string	"net_loop_state"
+.LASF433:
+	.string	"gSysInfo"
+.LASF629:
+	.string	"prev_superblock_id"
+.LASF196:
+	.string	"UCLASS_SPMI"
+.LASF756:
+	.string	"minValidPageIndex"
+.LASF841:
+	.string	"last_lpa_nscts"
+.LASF194:
+	.string	"UCLASS_SERIAL"
+.LASF709:
+	.string	"FtlLoadSysInfo"
+.LASF440:
+	.string	"req_erase"
+.LASF320:
+	.string	"hash"
+.LASF545:
+	.string	"check_vpc_table"
+.LASF180:
+	.string	"UCLASS_PHY"
+.LASF54:
+	.string	"bi_ddr_freq"
+.LASF858:
+	.string	"test_mode"
+.LASF827:
+	.string	"FtlDiscard"
+.LASF670:
+	.string	"FtlGcPageRecovery"
+.LASF105:
+	.string	"arch"
+.LASF510:
+	.string	"g_totle_read_page_count"
+.LASF710:
+	.string	"ftl_get_blk_mode"
+.LASF740:
+	.string	"ram_region_id"
+.LASF435:
+	.string	"gL2pMapInfo"
+.LASF322:
+	.string	"lastEc"
+.LASF842:
+	.string	"sector"
+.LASF558:
+	.string	"ftl_memcmp"
+.LASF468:
+	.string	"p_map_region_ppn_table"
+.LASF120:
+	.string	"fit_noffset_fdt"
+.LASF866:
+	.string	"FtlSysBlkNumInit"
+.LASF671:
+	.string	"Ftl_save_ext_data"
+.LASF116:
+	.string	"fit_uname_rd"
+.LASF648:
+	.string	"GetSwlReplaceBlock"
+.LASF359:
+	.string	"max_erase_count"
+.LASF475:
+	.string	"p_l2p_ram_map"
+.LASF633:
+	.string	"req_num"
+.LASF115:
+	.string	"fit_hdr_rd"
+.LASF268:
+	.string	"NETLOOP_FAIL"
+.LASF823:
+	.string	"FtlBbmIsBadBlock"
+.LASF666:
+	.string	"FtlSuperblockPowerLostFix"
+.LASF157:
+	.string	"UCLASS_FIRMWARE"
+.LASF123:
+	.string	"fit_noffset_setup"
+.LASF401:
+	.string	"c_ftl_nand_ext_blk_pre_plane"
+.LASF550:
+	.string	"mem_malloc_end"
+.LASF451:
+	.string	"p_io_spare_buf"
+.LASF185:
+	.string	"UCLASS_POWER_DOMAIN"
+.LASF520:
+	.string	"g_in_gc_progress"
+.LASF168:
+	.string	"UCLASS_MASS_STORAGE"
+.LASF29:
+	.string	"block_drvr"
+.LASF173:
+	.string	"UCLASS_NORTHBRIDGE"
+.LASF422:
+	.string	"c_ftl_nand_data_blks_per_plane"
+.LASF615:
+	.string	"page_count"
+.LASF298:
+	.string	"ftl_bbt_info"
+.LASF160:
+	.string	"UCLASS_I2C_GENERIC"
+.LASF231:
+	.string	"send"
+.LASF531:
+	.string	"g_power_lost_recovery_flag"
+.LASF589:
+	.string	"numPages"
+.LASF447:
+	.string	"p_vendor_data_buf"
+.LASF354:
+	.string	"read_page_count"
+.LASF234:
+	.string	"write_hwaddr"
+.LASF725:
+	.string	"FtlMapBlkWriteDump_data"
+.LASF834:
+	.string	"FtlCacheWriteBack"
+.LASF699:
+	.string	"FtlLoadMapInfo"
+.LASF807:
+	.string	"V2P_block"
+.LASF720:
+	.string	"pSysHeader"
+.LASF672:
+	.string	"SupperBlkListInit"
+.LASF706:
+	.string	"ppnTbl"
+.LASF846:
+	.string	"pNand"
+.LASF559:
+	.string	"ftl_memcpy"
+.LASF346:
+	.string	"PowerOnTimes"
+.LASF505:
+	.string	"g_totle_gc_page_count"
+.LASF24:
+	.string	"_binary_u_boot_bin_start"
+.LASF673:
+	.string	"num_data_node"
+.LASF400:
+	.string	"c_ftl_nand_blk_pre_plane"
+.LASF64:
+	.string	"bd_t"
+.LASF705:
+	.string	"lastWritePage"
+.LASF91:
+	.string	"ih_ep"
+.LASF45:
+	.string	"bi_memstart"
+.LASF119:
+	.string	"fit_uname_fdt"
+.LASF187:
+	.string	"UCLASS_RAM"
+.LASF674:
+	.string	"num_free_node"
+.LASF379:
+	.string	"ftl_superblock_info"
+.LASF126:
+	.string	"ft_addr"
+.LASF357:
+	.string	"sys_slc_erase_count"
+.LASF513:
+	.string	"g_totle_l2p_write_count"
+.LASF220:
+	.string	"__dtb_dt_begin"
+.LASF217:
+	.string	"UCLASS_INVALID"
+.LASF443:
+	.string	"g_req_cache"
+.LASF591:
+	.string	"gc_blk"
+.LASF277:
+	.string	"page_addr"
+.LASF864:
+	.string	"mem_size"
+.LASF857:
+	.string	"test_page_step"
+.LASF688:
+	.string	"read_super_page_end"
+.LASF368:
+	.string	"refresh_enable_mode"
+.LASF847:
+	.string	"load_bbt"
+.LASF860:
+	.string	"IsBlkInVendorPart"
+.LASF402:
+	.string	"c_ftl_nand_bbm_buf_size"
+.LASF782:
+	.string	"node_data_count"
+.LASF583:
+	.string	"width"
+.LASF39:
+	.string	"base"
+.LASF884:
+	.string	"sftl_get_density"
+.LASF839:
+	.string	"first_lpa_sctidx"
+.LASF587:
+	.string	"rk_ftl_garbage_collect"
+.LASF328:
+	.string	"lastPpa"
+.LASF111:
+	.string	"fit_uname_cfg"
+.LASF344:
+	.string	"gcTempPageOffset"
+.LASF636:
+	.string	"decrement_vpc_count"
+.LASF386:
+	.string	"dump_writed"
+.LASF748:
+	.string	"flush_l2p_region"
+.LASF130:
+	.string	"cmdline_start"
+.LASF536:
+	.string	"DeviceCapacity"
+.LASF355:
+	.string	"l2p_write_count"
+.LASF548:
+	.string	"gc_ink_free_return_value"
+.LASF358:
+	.string	"discard_page_count"
+.LASF155:
+	.string	"UCLASS_ETH"
+.LASF221:
+	.string	"__dtb_dt_spl_begin"
+.LASF10:
+	.string	"long long unsigned int"
+.LASF274:
+	.string	"int16"
+.LASF848:
+	.string	"ftl_low_format"
+.LASF734:
+	.string	"offset"
+.LASF504:
+	.string	"g_gc_blk_index"
+.LASF439:
+	.string	"req_prgm"
+.LASF436:
+	.string	"gVendorBlkInfo"
+.LASF676:
+	.string	"FtlPowerLostRecovery"
+.LASF462:
+	.string	"p_valid_page_count_table"
+.LASF702:
+	.string	"FtlMapTblRecovery"
+.LASF156:
+	.string	"UCLASS_GPIO"
+.LASF869:
+	.string	"debug_flag"
+.LASF498:
+	.string	"g_gc_next_blk_1"
+.LASF76:
+	.string	"off_dt_strings"
+.LASF376:
+	.string	"sys_blk_queue"
+.LASF647:
+	.string	"free_data_superblock"
+.LASF859:
+	.string	"re_test_next_page"
+.LASF61:
+	.string	"bi_arch_number"
+.LASF749:
+	.string	"FtlMapWritePage"
+.LASF783:
+	.string	"tmp_data_count"
+.LASF26:
+	.string	"ide_bus_offset"
+.LASF739:
+	.string	"action"
+.LASF408:
+	.string	"c_ftl_nand_byte_pre_page"
+.LASF216:
+	.string	"UCLASS_COUNT"
+.LASF174:
+	.string	"UCLASS_NVME"
+.LASF643:
+	.string	"new_id"
+.LASF345:
+	.string	"cache_write_count"
+.LASF640:
+	.string	"new_ppa"
+.LASF258:
+	.string	"net_restart_wrap"
+.LASF371:
+	.string	"totle_read_sector"
+.LASF341:
+	.string	"bufferSuperblockId"
+.LASF273:
+	.string	"int32"
+.LASF369:
+	.string	"refresh_start_lpa"
+.LASF80:
+	.string	"boot_cpuid_phys"
+.LASF304:
+	.string	"maxLogicBlk"
+.LASF321:
+	.string	"totleEc"
+.LASF38:
+	.string	"lmb_property"
+.LASF458:
+	.string	"g_ect_tbl_info_size"
+.LASF338:
+	.string	"gcTempFlashMode"
+.LASF431:
+	.string	"g_MaxLbn"
+.LASF534:
+	.string	"g_nand_ops"
+.LASF584:
+	.string	"ftl_malloc"
+.LASF840:
+	.string	"first_lpa_nscts"
+.LASF183:
+	.string	"UCLASS_PMIC"
+.LASF318:
+	.string	"L2PMap"
+.LASF765:
+	.string	"prev_node_id"
+.LASF454:
+	.string	"gp_gc_page_buf_info"
+.LASF509:
+	.string	"g_totle_discard_page_count"
+.LASF656:
+	.string	"max_ec"
+.LASF537:
+	.string	"gFtlInitStatus"
+.LASF9:
+	.string	"long long int"
+.LASF459:
+	.string	"p_erase_count_table"
+.LASF824:
+	.string	"FtlBbmMapBadBlock"
+.LASF427:
+	.string	"g_GlobalDataVersion"
+.LASF717:
+	.string	"block_in_plane"
+.LASF128:
+	.string	"initrd_start"
+.LASF428:
+	.string	"g_MaxLbaSector"
+.LASF382:
+	.string	"current_plane"
+.LASF383:
+	.string	"num_planes"
+.LASF800:
+	.string	"spareBuf"
+.LASF730:
+	.string	"FtlVendorPartRead"
+.LASF723:
+	.string	"FtlWriteDump_data"
+.LASF197:
+	.string	"UCLASS_SPI_FLASH"
+.LASF202:
+	.string	"UCLASS_TIMER"
+.LASF798:
+	.string	"FtlGetLastWrittenPage"
+.LASF661:
+	.string	"pDataHeader"
+.LASF542:
+	.string	"power_up_flag"
+.LASF365:
+	.string	"inkDie_write_and_check_en"
+.LASF413:
+	.string	"c_ftl_nand_l2pmap_ram_region_num"
+.LASF843:
+	.string	"sftl_deinit"
+.LASF815:
+	.string	"totle_count"
+.LASF282:
+	.string	"die_num"
+.LASF750:
+	.string	"update_map_block"
+.LASF307:
+	.string	"maxRegion"
+.LASF680:
+	.string	"next_free_active_plane"
+.LASF491:
+	.string	"p_gc_page_info"
+.LASF256:
+	.string	"net_our_vlan"
+.LASF361:
+	.string	"totle_power_on_run_times"
+.LASF93:
+	.string	"ih_os"
+.LASF526:
+	.string	"g_cur_erase_blk"
+.LASF184:
+	.string	"UCLASS_PWM"
+.LASF634:
+	.string	"FtlGcBufFree"
+.LASF774:
+	.string	"List_pop_index_node"
+.LASF690:
+	.string	"scan_completed"
+.LASF637:
+	.string	"update_vpc_list"
+.LASF170:
+	.string	"UCLASS_MMC"
+.LASF465:
+	.string	"p_map_block_table"
+.LASF544:
+	.string	"FtlUpdateVaildLpnCount"
+.LASF332:
+	.string	"res32_0"
+.LASF333:
+	.string	"res32_1"
+.LASF726:
+	.string	"FtlUpdateVaildLpn"
+.LASF390:
+	.string	"scr_ppa"
+.LASF162:
+	.string	"UCLASS_IDE"
+.LASF224:
+	.string	"save_size"
+.LASF78:
+	.string	"version"
+.LASF652:
+	.string	"pNode"
+.LASF638:
+	.string	"get_new_active_ppa"
+.LASF878:
+	.string	"kmalloc"
+.LASF25:
+	.string	"_binary_u_boot_bin_end"
+.LASF595:
+	.string	"max_gc_page_num"
+.LASF1:
+	.string	"unsigned int"
+.LASF712:
+	.string	"FtlSlcSuperblockCheck"
+.LASF515:
+	.string	"g_totle_avg_erase_count"
+.LASF836:
+	.string	"flashType"
+.LASF789:
+	.string	"FtlFreeSysBLkSort"
+.LASF779:
+	.string	"tmp_erase_count"
+.LASF83:
+	.string	"working_fdt"
+.LASF862:
+	.string	"FtlVariablesInit"
+.LASF392:
+	.string	"ftl_gc_page_buffer"
+.LASF239:
+	.string	"push_packet"
+.LASF708:
+	.string	"pMapBlkHeader"
+.LASF82:
+	.string	"size_dt_struct"
+.LASF473:
+	.string	"p_vendor_region_ppn_table"
+.LASF675:
+	.string	"make_superblock"
+.LASF97:
+	.string	"ih_name"
+.LASF186:
+	.string	"UCLASS_PWRSEQ"
+.LASF337:
+	.string	"bufferFlashMode"
+.LASF7:
+	.string	"short int"
+.LASF837:
+	.string	"FtlRead"
+.LASF74:
+	.string	"totalsize"
+.LASF757:
+	.string	"ftl_map_blk_alloc_new_blk"
+.LASF385:
+	.string	"check_en"
+.LASF442:
+	.string	"req_gc_dst"
+.LASF374:
+	.string	"prev"
+.LASF423:
+	.string	"c_ftl_nand_data_op_blks_per_plane"
+.LASF650:
+	.string	"min_ec_id"
+.LASF388:
+	.string	"phyBlk"
+.LASF260:
+	.string	"net_boot_file_size"
+.LASF412:
+	.string	"c_ftl_nand_map_region_num"
+.LASF665:
+	.string	"FtlVpcCheckAndModify"
+.LASF127:
+	.string	"ft_len"
+.LASF188:
+	.string	"UCLASS_REGULATOR"
+.LASF311:
+	.string	"pBlkVerTbl"
+.LASF489:
+	.string	"g_sys_save_data"
+.LASF124:
+	.string	"rd_start"
diff --git a/drivers/rkflash/rkflash_api.c b/drivers/rkflash/rkflash_api.c
index bc7b4c839e..a52d2a9f02 100644
--- a/drivers/rkflash/rkflash_api.c
+++ b/drivers/rkflash/rkflash_api.c
@@ -1,8 +1,9 @@
 /*
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ * SPDX-License-Identifier:	GPL-2.0
  */
+
 #include <common.h>
 #include <dm.h>
 
@@ -10,7 +11,7 @@
 #include "rkflash_blk.h"
 
 #ifdef CONFIG_RKSFC_NOR
-int rk_snor_init(struct udevice *udev)
+int rksfc_nor_init(struct udevice *udev)
 {
 	struct rkflash_info *priv = dev_get_priv(udev);
 	struct SFNOR_DEV *p_dev = (struct SFNOR_DEV *)&priv->flash_dev_info;
@@ -18,7 +19,7 @@ int rk_snor_init(struct udevice *udev)
 	return snor_init(p_dev);
 }
 
-u32 rk_snor_get_capacity(struct udevice *udev)
+u32 rksfc_nor_get_capacity(struct udevice *udev)
 {
 	struct rkflash_info *priv = dev_get_priv(udev);
 	struct SFNOR_DEV *p_dev = (struct SFNOR_DEV *)&priv->flash_dev_info;
@@ -26,20 +27,182 @@ u32 rk_snor_get_capacity(struct udevice *udev)
 	return snor_get_capacity(p_dev);
 }
 
-int rk_snor_read(struct udevice *udev, u32 sec, u32 n_sec, void *p_data)
+int rksfc_nor_read(struct udevice *udev, u32 sec, u32 n_sec, void *p_data)
 {
+	u32 ret;
+	u32 offset, count = 0;
+	char *buf = (char *)p_data;
 	struct rkflash_info *priv = dev_get_priv(udev);
 	struct SFNOR_DEV *p_dev = (struct SFNOR_DEV *)&priv->flash_dev_info;
 
-	return snor_read(p_dev, sec, n_sec, p_data);
+	if (sec + n_sec - 1 < FLASH_VENDOR_PART_START ||
+	    sec > FLASH_VENDOR_PART_END) {
+		ret = snor_read(p_dev, sec, n_sec, p_data);
+		if (ret != n_sec)
+			return ret;
+	} else {
+		memset(p_data, 0, 512 * n_sec);
+		if (sec < FLASH_VENDOR_PART_START) {
+			count = FLASH_VENDOR_PART_START - sec;
+			buf = (char *)p_data;
+			ret = snor_read(p_dev, sec, count, buf);
+			if (ret != count)
+				return ret;
+		}
+		if ((sec + n_sec - 1) > FLASH_VENDOR_PART_END) {
+			count = sec + n_sec - 1 - FLASH_VENDOR_PART_END;
+			offset = FLASH_VENDOR_PART_END - sec + 1;
+			buf = (char *)p_data + offset * 512;
+			ret = snor_read(p_dev,
+					FLASH_VENDOR_PART_END + 1,
+					count, buf);
+			if (ret != count)
+				return ret;
+		}
+	}
+
+	return n_sec;
 }
 
-int rk_snor_write(struct udevice *udev, u32 sec, u32 n_sec, const void *p_data)
+int rksfc_nor_write(struct udevice *udev,
+		    u32 sec,
+		    u32 n_sec,
+		    const void *p_data)
 {
+	u32 ret;
+	u32 offset, count = 0;
+	char *buf = (char *)p_data;
 	struct rkflash_info *priv = dev_get_priv(udev);
 	struct SFNOR_DEV *p_dev = (struct SFNOR_DEV *)&priv->flash_dev_info;
 
+	if (sec + n_sec - 1 < FLASH_VENDOR_PART_START ||
+	    sec > FLASH_VENDOR_PART_END) {
+		ret = snor_write(p_dev, sec, n_sec, p_data);
+		if (ret != n_sec)
+			return ret;
+	} else {
+		if (sec < FLASH_VENDOR_PART_START) {
+			count = FLASH_VENDOR_PART_START - sec;
+			buf = (char *)p_data;
+			ret = snor_write(p_dev, sec, count, buf);
+			if (ret != count)
+				return ret;
+		}
+		if ((sec + n_sec - 1) > FLASH_VENDOR_PART_END) {
+			count = sec + n_sec - 1 - FLASH_VENDOR_PART_END;
+			offset = FLASH_VENDOR_PART_END - sec + 1;
+			buf = (char *)p_data + offset * 512;
+			ret = snor_write(p_dev,
+					 FLASH_VENDOR_PART_END + 1,
+					 count, buf);
+			if (ret != count)
+				return ret;
+		}
+	}
+
+	return n_sec;
+}
+
+int rksfc_nor_vendor_read(struct blk_desc *dev_desc,
+			  u32 sec,
+			  u32 n_sec,
+			  void *p_data)
+{
+	struct rkflash_info *priv = dev_get_priv(dev_desc->bdev->parent);
+	struct SFNOR_DEV *p_dev = (struct SFNOR_DEV *)&priv->flash_dev_info;
+
+	return snor_read(p_dev, sec, n_sec, p_data);
+}
+
+int rksfc_nor_vendor_write(struct blk_desc *dev_desc,
+			   u32 sec,
+			   u32 n_sec,
+			   void *p_data)
+{
+	struct rkflash_info *priv = dev_get_priv(dev_desc->bdev->parent);
+	struct SFNOR_DEV *p_dev = (struct SFNOR_DEV *)&priv->flash_dev_info;
+
 	return snor_write(p_dev, sec, n_sec, p_data);
 }
+
+#endif
+
+#ifdef CONFIG_RKSFC_NAND
+int rksfc_nand_init(struct udevice *udev)
+{
+	int ret;
+
+	ret = sfc_nand_init();
+	if (ret)
+		return ret;
+	else
+		return sftl_init();
+}
+
+int rksfc_nand_read(struct udevice *udev, u32 index, u32 count, void *buf)
+{
+	int ret;
+
+	ret = sftl_read(index, count, (u8 *)buf);
+	if (!ret)
+		return count;
+	else
+		return -EIO;
+}
+
+int rksfc_nand_write(struct udevice *udev,
+		     u32 index,
+		     u32 count,
+		     const void *buf)
+{
+	int ret;
+
+	ret = sftl_write(index, count, (u8 *)buf);
+	if (!ret)
+		return count;
+	else
+		return -EIO;
+}
+
+u32 rksfc_nand_get_density(struct udevice *udev)
+{
+	return sftl_get_density();
+}
 #endif
 
+#ifdef CONFIG_RKNANDC_NAND
+int rknand_flash_init(struct udevice *udev)
+{
+	return sftl_init();
+}
+
+int rknand_flash_read(struct udevice *udev, u32 index, u32 count, void *buf)
+{
+	int ret;
+
+	ret = sftl_read(index, count, (u8 *)buf);
+	if (!ret)
+		return count;
+	else
+		return -EIO;
+}
+
+int rknand_flash_write(struct udevice *udev,
+		       u32 index,
+		       u32 count,
+		       const void *buf)
+{
+	int ret;
+
+	ret = sftl_write(index, count, (u8 *)buf);
+	if (!ret)
+		return count;
+	else
+		return -EIO;
+}
+
+u32 rknand_flash_get_density(struct udevice *udev)
+{
+	return sftl_get_density();
+}
+#endif
diff --git a/drivers/rkflash/rkflash_api.h b/drivers/rkflash/rkflash_api.h
index ece56c0944..f1f9bfee39 100644
--- a/drivers/rkflash/rkflash_api.h
+++ b/drivers/rkflash/rkflash_api.h
@@ -1,20 +1,59 @@
 /*
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ * SPDX-License-Identifier:	GPL-2.0
  */
 
 #ifndef __RKFLASH_API_H
 #define __RKFLASH_API_H
 
+#define	FLASH_VENDOR_PART_START		8
+#define	FLASH_VENDOR_PART_END		39	/* 8 + 8 * 4 - 1 */
+
 #ifdef CONFIG_RKSFC_NOR
 #include "sfc_nor.h"
 #include "sfc.h"
 
-int rk_snor_init(struct udevice *udev);
-u32 rk_snor_get_capacity(struct udevice *udev);
-int rk_snor_read(struct udevice *udev, u32 sec, u32 n_sec, void *p_data);
-int rk_snor_write(struct udevice *udev, u32 sec, u32 n_sec, const void *p_data);
+int rksfc_nor_init(struct udevice *udev);
+u32 rksfc_nor_get_capacity(struct udevice *udev);
+int rksfc_nor_read(struct udevice *udev, u32 sec, u32 n_sec, void *p_data);
+int rksfc_nor_write(struct udevice *udev,
+		    u32 sec,
+		    u32 n_sec,
+		    const void *p_data);
+int rksfc_nor_vendor_read(struct blk_desc *dev_desc,
+			  u32 sec,
+			  u32 n_sec,
+			  void *p_data);
+int rksfc_nor_vendor_write(struct blk_desc *dev_desc,
+			   u32 sec,
+			   u32 n_sec,
+			   void *p_data);
+
+#endif
+
+#ifdef CONFIG_RKSFC_NAND
+#include "sfc_nand.h"
+#include "sfc.h"
+#include "rk_sftl.h"
+int rksfc_nand_init(struct udevice *udev);
+u32 rksfc_nand_get_density(struct udevice *udev);
+int rksfc_nand_read(struct udevice *udev, u32 index, u32 count, void *buf);
+int rksfc_nand_write(struct udevice *udev,
+		     u32 index,
+		     u32 count,
+		     const void *buf);
 #endif
 
+#ifdef CONFIG_RKNANDC_NAND
+#include "flash.h"
+#include "rk_sftl.h"
+int rknand_flash_init(struct udevice *udev);
+u32 rknand_flash_get_density(struct udevice *udev);
+int rknand_flash_read(struct udevice *udev, u32 index, u32 count, void *buf);
+int rknand_flash_write(struct udevice *udev,
+		       u32 index,
+		       u32 count,
+		       const void *buf);
+#endif
 #endif
diff --git a/drivers/rkflash/rkflash_blk.c b/drivers/rkflash/rkflash_blk.c
index 702fc1aed1..8481d93fd9 100644
--- a/drivers/rkflash/rkflash_blk.c
+++ b/drivers/rkflash/rkflash_blk.c
@@ -1,7 +1,7 @@
 /*
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ * SPDX-License-Identifier:	GPL-2.0
  */
 
 #include <common.h>
@@ -13,20 +13,26 @@
 #include "rkflash_blk.h"
 #include "rkflash_debug.h"
 
+void ftl_free(void *buf)
+{
+	kfree(buf);
+}
+
 ulong rkflash_bread(struct udevice *udev, lbaint_t start,
 		    lbaint_t blkcnt, void *dst)
 {
 	struct blk_desc *block_dev = dev_get_uclass_platdata(udev);
 	struct rkflash_info *priv = dev_get_priv(udev->parent);
 
+	debug("%s lba %x cnt %x", __func__, (u32)start, (u32)blkcnt);
 	if (blkcnt == 0)
-		return 0;
+		return -EINVAL;
 
 	if ((start + blkcnt) > block_dev->lba)
-		return 0;
+		return -EINVAL;
 
 	if (!priv->read)
-		return 0;
+		return -EINVAL;
 
 	return (ulong)priv->read(udev->parent, (u32)start, (u32)blkcnt, dst);
 }
@@ -38,13 +44,13 @@ ulong rkflash_bwrite(struct udevice *udev, lbaint_t start,
 	struct rkflash_info *priv = dev_get_priv(udev->parent);
 
 	if (blkcnt == 0)
-		return 0;
+		return -EINVAL;
 
 	if ((start + blkcnt) > block_dev->lba)
-		return 0;
+		return -EINVAL;
 
 	if (!priv->write)
-		return 0;
+		return -EINVAL;
 
 	return (ulong)priv->write(udev->parent, (u32)start, (u32)blkcnt, src);
 }
@@ -56,13 +62,13 @@ ulong rkflash_berase(struct udevice *udev, lbaint_t start,
 	struct rkflash_info *priv = dev_get_priv(udev->parent);
 
 	if (blkcnt == 0)
-		return 0;
+		return -EINVAL;
 
 	if ((start + blkcnt) > block_dev->lba)
-		return 0;
+		return -EINVAL;
 
 	if (!priv->erase)
-		return 0;
+		return -EINVAL;
 
 	return (ulong)priv->erase(udev->parent, (u32)start, (u32)blkcnt);
 }
@@ -77,6 +83,9 @@ static int rkflash_blk_probe(struct udevice *udev)
 	priv->child_dev = udev;
 	if (priv->flash_con_type == FLASH_CON_TYPE_SFC)
 		desc->if_type = IF_TYPE_RKSFC;
+	else if (priv->flash_con_type == FLASH_CON_TYPE_NANDC)
+		desc->if_type = IF_TYPE_RKNAND;
+
 	desc->lba = priv->density;
 	desc->log2blksz = 9;
 	desc->blksz = 512;
diff --git a/drivers/rkflash/rkflash_blk.h b/drivers/rkflash/rkflash_blk.h
index 9384b0ac49..c6f8b6de0f 100644
--- a/drivers/rkflash/rkflash_blk.h
+++ b/drivers/rkflash/rkflash_blk.h
@@ -1,7 +1,7 @@
 /*
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ * SPDX-License-Identifier:	GPL-2.0
  */
 
 #ifndef __RKFLASH_BLK_H__
@@ -32,6 +32,17 @@ struct flash_operation {
 			   u32 start,
 			   u32 blkcnt,
 			   const void *buffer);
+	int (*flash_erase)(struct udevice *udev,
+			   u32 start,
+			   u32 blkcnt);
+	int (*vendor_read)(struct blk_desc *dev_desc,
+			   u32 start,
+			   u32 blkcnt,
+			   void *buffer);
+	int (*vendor_write)(struct blk_desc *dev_desc,
+			    u32 start,
+			    u32 blkcnt,
+			    void *buffer);
 };
 
 struct rkflash_dev {
diff --git a/drivers/rkflash/rkflash_debug.c b/drivers/rkflash/rkflash_debug.c
index 8321522fec..f30fdafb10 100644
--- a/drivers/rkflash/rkflash_debug.c
+++ b/drivers/rkflash/rkflash_debug.c
@@ -1,7 +1,7 @@
 /*
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ * SPDX-License-Identifier:	GPL-2.0
  */
 
 #include <blk.h>
@@ -37,9 +37,9 @@ void rkflash_print_hex(char *s, void *buf, u32 width, u32 len)
 
 #if (BLK_STRESS_TEST_EN)
 #define max_test_sector 64
-u8 pwrite[max_test_sector * 512];
-u8 pread[max_test_sector * 512];
-u32 *pwrite32;
+static u8 pwrite[max_test_sector * 512];
+static u8 pread[max_test_sector * 512];
+static u32 *pwrite32;
 void blk_stress_test(struct udevice *udev)
 {
 	struct blk_desc *block_dev = dev_get_uclass_platdata(udev);
diff --git a/drivers/rkflash/rkflash_debug.h b/drivers/rkflash/rkflash_debug.h
index d9a968ec4a..e93c837c2d 100644
--- a/drivers/rkflash/rkflash_debug.h
+++ b/drivers/rkflash/rkflash_debug.h
@@ -1,7 +1,7 @@
 /*
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ * SPDX-License-Identifier:	GPL-2.0
  */
 
 #ifndef _RKFLASH_DEBUG_H
@@ -10,6 +10,11 @@
 #include <common.h>
 #include <dm.h>
 
+/*
+ * Test switch
+ */
+#define BLK_STRESS_TEST_EN	0
+
 /*
  * Print switch, set to 1 if needed
  * I - info
@@ -21,12 +26,11 @@
 #define	PRINT_SWI_SFC_E		1
 #define PRINT_SWI_SFC_HEX	1
 
-/*
- * Test switch
- */
-#define BLK_STRESS_TEST_EN	0
+#define	PRINT_SWI_NANDC_I	0
+#define	PRINT_SWI_NANDC_E	1
+#define PRINT_SWI_NANDC_HEX	1
 
-#if (RINT_SWI_SFC_I)
+#if (PRINT_SWI_SFC_I)
 #define PRINT_SFC_I(...) printf(__VA_ARGS__)
 #else
 #define PRINT_SFC_I(...)
@@ -45,6 +49,25 @@
 #define PRINT_SFC_HEX(s, buf, width, len)
 #endif
 
+#if (PRINT_SWI_NANDC_I)
+#define PRINT_NANDC_I(...) printf(__VA_ARGS__)
+#else
+#define PRINT_NANDC_I(...)
+#endif
+
+#if (PRINT_SWI_NANDC_E)
+#define PRINT_NANDC_E(...) printf(__VA_ARGS__)
+#else
+#define PRINT_NANDC_E(...)
+#endif
+
+#if (PRINT_SWI_NANDC_HEX)
+#define PRINT_NANDC_HEX(s, buf, width, len)\
+		rkflash_print_hex(s, buf, width, len)
+#else
+#define PRINT_NANDC_HEX(s, buf, width, len)
+#endif
+
 void rkflash_print_hex(char *s, void *buf, u32 width, u32 len);
 void rkflash_test(struct udevice *p_dev);
 
diff --git a/drivers/rkflash/rknandc_base.c b/drivers/rkflash/rknandc_base.c
new file mode 100644
index 0000000000..ef824e36dd
--- /dev/null
+++ b/drivers/rkflash/rknandc_base.c
@@ -0,0 +1,121 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <dm/device-internal.h>
+#include <asm/arch/clock.h>
+
+#include "rkflash_blk.h"
+#include "rkflash_api.h"
+
+static struct flash_operation nandc_flash_op = {
+#ifdef	CONFIG_RKNANDC_NAND
+	FLASH_TYPE_NANDC_NAND,
+	rknand_flash_init,
+	rknand_flash_get_density,
+	rknand_flash_read,
+	rknand_flash_write,
+	NULL,
+	NULL,
+	NULL,
+#else
+	-1, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+#endif
+};
+
+int rknand_scan_namespace(void)
+{
+	struct uclass *uc;
+	struct udevice *dev;
+	int ret;
+
+	ret = uclass_get(UCLASS_RKNAND, &uc);
+	if (ret)
+		return ret;
+
+	uclass_foreach_dev(dev, uc) {
+		debug("%s %d %p\n", __func__, __LINE__, dev);
+		ret = device_probe(dev);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+static int rknand_blk_bind(struct udevice *udev)
+{
+	struct udevice *bdev;
+	int ret;
+
+	ret = blk_create_devicef(udev, "rkflash_blk", "blk",
+				 IF_TYPE_RKNAND,
+				 0, 512, 0, &bdev);
+	if (ret) {
+		debug("Cannot create block device\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+static int rockchip_nand_ofdata_to_platdata(struct udevice *dev)
+{
+	struct rkflash_info *priv = dev_get_priv(dev);
+
+	priv->ioaddr = dev_read_addr_ptr(dev);
+
+	return 0;
+}
+
+static int rockchip_nand_probe(struct udevice *udev)
+{
+	int ret;
+	struct rkflash_info *priv = dev_get_priv(udev);
+
+	debug("%s %d %p ndev = %p\n", __func__, __LINE__, udev, priv);
+
+	ret = nandc_flash_init(priv->ioaddr);
+	if (ret) {
+		debug("nandc_flash_init failed, ret %d", ret);
+		return ret;
+	}
+	ret = nandc_flash_op.flash_init(udev);
+	if (!ret) {
+		priv->flash_con_type = FLASH_CON_TYPE_NANDC;
+		priv->density = nandc_flash_op.flash_get_capacity(udev);
+		priv->read = nandc_flash_op.flash_read;
+		priv->write = nandc_flash_op.flash_write;
+		priv->erase = nandc_flash_op.flash_erase;
+		debug("%s probe success\n", __func__);
+	}
+
+	return ret;
+}
+
+UCLASS_DRIVER(rknand) = {
+	.id		= UCLASS_RKNAND,
+	.name		= "rknand",
+	.flags		= DM_UC_FLAG_SEQ_ALIAS,
+};
+
+static const struct udevice_id rockchip_nand_ids[] = {
+	{ .compatible = "rockchip,rk-nandc" },
+	{ }
+};
+
+U_BOOT_DRIVER(rknand) = {
+	.name		= "rknand",
+	.id		= UCLASS_RKNAND,
+	.of_match	= rockchip_nand_ids,
+	.bind		= rknand_blk_bind,
+	.probe		= rockchip_nand_probe,
+	.priv_auto_alloc_size = sizeof(struct rkflash_info),
+	.ofdata_to_platdata = rockchip_nand_ofdata_to_platdata,
+};
+
diff --git a/drivers/rkflash/rksfc_base.c b/drivers/rkflash/rksfc_base.c
index 713b6b5b3b..b813ae9e11 100644
--- a/drivers/rkflash/rksfc_base.c
+++ b/drivers/rkflash/rksfc_base.c
@@ -1,7 +1,7 @@
 /*
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ * SPDX-License-Identifier:	GPL-2.0
  */
 
 #include <common.h>
@@ -13,18 +13,41 @@
 #include "rkflash_blk.h"
 #include "rkflash_api.h"
 
-static struct flash_operation spi_flash_op = {
+static struct flash_operation sfc_nor_op = {
 #ifdef	CONFIG_RKSFC_NOR
 	FLASH_TYPE_SFC_NOR,
-	rk_snor_init,
-	rk_snor_get_capacity,
-	rk_snor_read,
-	rk_snor_write,
+	rksfc_nor_init,
+	rksfc_nor_get_capacity,
+	rksfc_nor_read,
+	rksfc_nor_write,
+	NULL,
+	rksfc_nor_vendor_read,
+	rksfc_nor_vendor_write,
 #else
-	-1, NULL, NULL, NULL, NULL,
+	-1, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
 #endif
 };
 
+static struct flash_operation sfc_nand_op = {
+#ifdef CONFIG_RKSFC_NAND
+	FLASH_TYPE_SFC_NAND,
+	rksfc_nand_init,
+	rksfc_nand_get_density,
+	rksfc_nand_read,
+	rksfc_nand_write,
+	NULL,
+	NULL,
+	NULL,
+#else
+	-1, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+#endif
+};
+
+static struct flash_operation *spi_flash_op[2] = {
+	&sfc_nor_op,
+	&sfc_nand_op,
+};
+
 int rksfc_scan_namespace(void)
 {
 	struct uclass *uc;
@@ -72,22 +95,29 @@ static int rockchip_rksfc_ofdata_to_platdata(struct udevice *dev)
 
 static int rockchip_rksfc_probe(struct udevice *udev)
 {
-	int ret;
+	int ret = 0;
+	int i;
 	struct rkflash_info *priv = dev_get_priv(udev);
 
 	debug("%s %d %p ndev = %p\n", __func__, __LINE__, udev, priv);
 
 	sfc_init(priv->ioaddr);
-	if (spi_flash_op.id == -1) {
-		debug("%s no optional spi flash\n", __func__);
-		return 0;
-	}
-	ret = spi_flash_op.flash_init(udev);
-	if (!ret) {
-		priv->flash_con_type = FLASH_CON_TYPE_SFC;
-		priv->density = spi_flash_op.flash_get_capacity(udev);
-		priv->read = spi_flash_op.flash_read;
-		priv->write = spi_flash_op.flash_write;
+	for (i = 0; i < 2; i++) {
+		if (spi_flash_op[i]->id == -1) {
+			debug("%s no optional spi flash for type %x\n",
+			      __func__, i);
+			continue;
+		}
+		ret = spi_flash_op[i]->flash_init(udev);
+		if (!ret) {
+			priv->flash_con_type = FLASH_CON_TYPE_SFC;
+			priv->density =
+				spi_flash_op[i]->flash_get_capacity(udev);
+			priv->read = spi_flash_op[i]->flash_read;
+			priv->write = spi_flash_op[i]->flash_write;
+			debug("%s probe success\n", __func__);
+			break;
+		}
 	}
 
 	return ret;
diff --git a/drivers/rkflash/sfc.c b/drivers/rkflash/sfc.c
index cb4920b5a8..f913112e96 100644
--- a/drivers/rkflash/sfc.c
+++ b/drivers/rkflash/sfc.c
@@ -1,7 +1,7 @@
 /*
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ * SPDX-License-Identifier:	GPL-2.0
  */
 
 #include <common.h>
diff --git a/drivers/rkflash/sfc.h b/drivers/rkflash/sfc.h
index 9a9095470a..a1431f8b09 100644
--- a/drivers/rkflash/sfc.h
+++ b/drivers/rkflash/sfc.h
@@ -1,7 +1,7 @@
 /*
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ * SPDX-License-Identifier:	GPL-2.0
  */
 
 #ifndef _SFC_H
diff --git a/drivers/rkflash/sfc_nand.c b/drivers/rkflash/sfc_nand.c
new file mode 100644
index 0000000000..2bfd63b331
--- /dev/null
+++ b/drivers/rkflash/sfc_nand.c
@@ -0,0 +1,528 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#include <common.h>
+#include <linux/bug.h>
+#include <linux/delay.h>
+
+#include "flash.h"
+#include "flash_com.h"
+#include "sfc.h"
+#include "sfc_nand.h"
+#include "rkflash_debug.h"
+
+static struct nand_info spi_nand_tbl[] = {
+	/* TC58CVG0S0HxAIx */
+	{0x98C2, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x02, 0xD8, 0x00, 18, 8, 0xB0, 0XFF, 4, 8},
+	/* TC58CVG1S0HxAIx */
+	{0x98CB, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x02, 0xD8, 0x00, 19, 8, 0xB0, 0XFF, 4, 8},
+	/* MX35LF1GE4AB */
+	{0xC212, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xB0, 0, 4, 8},
+	/* MX35LF2GE4AB */
+	{0xC222, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 1, 0xB0, 0, 4, 8},
+	/* GD5F1GQ4UAYIG */
+	{0xC8F1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xB0, 0, 4, 8},
+	/* GD5F2GQ40BY2GR */
+	{0xC8D2, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xB0, 0, 4, 8},
+	/* MT29F1G01ZAC */
+	{0x2C12, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x00, 18, 1, 0xB0, 0, 4, 8},
+	/* GD5F1GQ4U */
+	{0xC8B1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xB0, 0, 4, 8},
+	/* GD5F2GQ4U */
+	{0xC8B2, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 1, 0xB0, 0, 4, 8},
+	/* GD5F1GQ4U */
+	{0xC8D1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xB0, 0, 4, 8},
+	/* IS37SML01G1 */
+	{0xC821, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x00, 18, 1, 0xB0, 0XFF, 8, 12},
+	/* W25N01GV */
+	{0xEFAA, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xFF, 0XFF, 4, 20},
+};
+
+static u8 id_byte[8];
+static struct nand_info *p_nand_info;
+static u32 gp_page_buf[SFC_NAND_PAGE_MAX_SIZE / 4];
+static struct SFNAND_DEV sfc_nand_dev;
+
+static struct nand_info *spi_nand_get_info(u8 *nand_id)
+{
+	u32 i;
+	u32 id = (nand_id[0] << 8) | (nand_id[1] << 0);
+
+	for (i = 0; i < ARRAY_SIZE(spi_nand_tbl); i++) {
+		if (spi_nand_tbl[i].id == id)
+			return &spi_nand_tbl[i];
+	}
+	return NULL;
+}
+
+static int sfc_nand_write_en(void)
+{
+	int ret;
+	union SFCCMD_DATA sfcmd;
+
+	sfcmd.d32 = 0;
+	sfcmd.b.cmd = CMD_WRITE_EN;
+	ret = sfc_request(sfcmd.d32, 0, 0, NULL);
+	return ret;
+}
+
+static int sfc_nand_rw_preset(void)
+{
+	int ret;
+	union SFCCTRL_DATA sfctrl;
+	union SFCCMD_DATA sfcmd;
+	u8 status = 0xFF;
+
+	sfcmd.d32 = 0;
+	sfcmd.b.cmd = 0;
+	sfcmd.b.datasize = 1;
+	sfcmd.b.rw = SFC_WRITE;
+
+	sfctrl.b.datalines = 2;
+	ret = sfc_request(sfcmd.d32, sfctrl.d32, 0, &status);
+	return ret;
+}
+
+static int sfc_nand_read_feature(u8 addr, u8 *data)
+{
+	int ret;
+	union SFCCMD_DATA sfcmd;
+
+	sfcmd.d32 = 0;
+	sfcmd.b.cmd = 0x0F;
+	sfcmd.b.datasize = 1;
+	sfcmd.b.addrbits = SFC_ADDR_XBITS;
+	*data = 0;
+
+	ret = sfc_request(sfcmd.d32, 0x8 << 16, addr, data);
+	if (ret != SFC_OK)
+		return ret;
+	return SFC_OK;
+}
+
+static int sfc_nand_write_feature(u32 addr, u8 status)
+{
+	int ret;
+	union SFCCMD_DATA sfcmd;
+
+	sfc_nand_write_en();
+
+	sfcmd.d32 = 0;
+	sfcmd.b.cmd = 0x1F;
+	sfcmd.b.datasize = 1;
+	sfcmd.b.addrbits = SFC_ADDR_XBITS;
+	sfcmd.b.rw = SFC_WRITE;
+
+	ret = sfc_request(sfcmd.d32, 0x8 << 16, addr, &status);
+	if (ret != SFC_OK)
+		return ret;
+	return ret;
+}
+
+static int sfc_nand_wait_busy(u8 *data, int timeout)
+{
+	int ret;
+	int i;
+	u8 status;
+
+	*data = 0;
+	for (i = 0; i < timeout; i++) {
+		ret = sfc_nand_read_feature(0xC0, &status);
+		if (ret != SFC_OK)
+			return ret;
+		*data = status;
+		if (!(status & (1 << 0)))
+			return SFC_OK;
+		sfc_delay(1);
+	}
+	return -1;
+}
+
+static u32 sfc_nand_erase_block(u8 cs, u32 addr)
+{
+	int ret;
+	union SFCCMD_DATA sfcmd;
+	u8 status;
+
+	sfcmd.d32 = 0;
+	sfcmd.b.cmd = p_nand_info->block_erase_cmd;
+	sfcmd.b.addrbits = SFC_ADDR_24BITS;
+	sfc_nand_write_en();
+	ret = sfc_request(sfcmd.d32, 0, addr, NULL);
+	if (ret != SFC_OK)
+		return ret;
+	ret = sfc_nand_wait_busy(&status, 1000 * 1000);
+	if (status & (1 << 2))
+		return SFC_NAND_PROG_ERASE_ERROR;
+	return ret;
+}
+
+static u32 sfc_nand_prog_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
+{
+	int ret;
+	union SFCCMD_DATA sfcmd;
+	union SFCCTRL_DATA sfctrl;
+	u8 status;
+	u32 data_sz = 2048;
+	u32 spare_offs_1 = p_nand_info->spare_offs_1;
+	u32 spare_offs_2 = p_nand_info->spare_offs_2;
+
+	memcpy(gp_page_buf, p_data, data_sz);
+	gp_page_buf[(data_sz + spare_offs_1) / 4] = p_spare[0];
+	gp_page_buf[(data_sz + spare_offs_2) / 4] = p_spare[1];
+
+	sfc_nand_write_en();
+	if (sfc_nand_dev.prog_lines == DATA_LINES_X4 &&
+	    p_nand_info->QE_address == 0xFF &&
+	    sfc_get_version() != SFC_VER_3)
+		sfc_nand_rw_preset();
+
+	sfcmd.d32 = 0;
+	sfcmd.b.cmd = sfc_nand_dev.page_prog_cmd;
+	sfcmd.b.addrbits = SFC_ADDR_XBITS;
+	sfcmd.b.datasize = SFC_NAND_PAGE_MAX_SIZE;
+	sfcmd.b.rw = SFC_WRITE;
+
+	sfctrl.d32 = 0;
+	sfctrl.b.datalines = sfc_nand_dev.prog_lines;
+	sfctrl.b.addrbits = 16;
+	sfc_request(sfcmd.d32, sfctrl.d32, 0, gp_page_buf);
+
+	sfcmd.d32 = 0;
+	sfcmd.b.cmd = p_nand_info->page_prog_cmd;
+	sfcmd.b.addrbits = SFC_ADDR_24BITS;
+	sfcmd.b.datasize = 0;
+	sfcmd.b.rw = SFC_WRITE;
+	ret = sfc_request(sfcmd.d32, 0, addr, p_data);
+	if (ret != SFC_OK)
+		return ret;
+	ret = sfc_nand_wait_busy(&status, 1000 * 1000);
+	if (status & (1 << 3))
+		return SFC_NAND_PROG_ERASE_ERROR;
+	return ret;
+}
+
+static u32 sfc_nand_read_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
+{
+	int ret;
+	union SFCCMD_DATA sfcmd;
+	union SFCCTRL_DATA sfctrl;
+	u8 status;
+	u8 ecc;
+	u32 data_sz = 2048;
+	u32 spare_offs_1 = p_nand_info->spare_offs_1;
+	u32 spare_offs_2 = p_nand_info->spare_offs_2;
+
+	sfcmd.d32 = 0;
+	sfcmd.b.cmd = p_nand_info->page_read_cmd;
+	sfcmd.b.datasize = 0;
+	sfcmd.b.addrbits = SFC_ADDR_24BITS;
+	sfc_request(sfcmd.d32, 0, addr, p_data);
+
+	sfc_nand_wait_busy(&status, 1000 * 1000);
+	ecc = (status >> 4) & 0x03;
+	if (sfc_nand_dev.read_lines == DATA_LINES_X4 &&
+	    p_nand_info->QE_address == 0xFF &&
+	    sfc_get_version() != SFC_VER_3)
+		sfc_nand_rw_preset();
+
+	sfcmd.d32 = 0;
+	sfcmd.b.cmd = sfc_nand_dev.page_read_cmd;
+	sfcmd.b.datasize = SFC_NAND_PAGE_MAX_SIZE;
+	sfcmd.b.addrbits = SFC_ADDR_24BITS;
+	sfctrl.d32 = 0;
+	sfctrl.b.datalines = sfc_nand_dev.read_lines;
+
+	memset(gp_page_buf, 0, SFC_NAND_PAGE_MAX_SIZE);
+	ret = sfc_request(sfcmd.d32, sfctrl.d32, 0, gp_page_buf);
+
+	memcpy(p_data, gp_page_buf, data_sz);
+	p_spare[0] = gp_page_buf[(data_sz + spare_offs_1) / 4];
+	p_spare[1] = gp_page_buf[(data_sz + spare_offs_2) / 4];
+	if (ret != SFC_OK)
+		return SFC_NAND_ECC_ERROR;
+
+	/*
+	 * ecc status:
+	 * 0, No bit errors were detected
+	 * 1, Bit errors were detected and corrected. If max_ecc_bits equals 1,
+	 *	Bit error count exceed the bit flip detection threshold.
+	 * 2, Multiple bit errors were detected and not corrected.
+	 * 3, If max_ecc_bits equals 1, reserved, else bit errors were detected
+	 *	and corrected, bit error count exceed the bit flip detection
+	 *	threshold
+	 */
+
+	if (ecc == 0) {
+		ret = SFC_NAND_ECC_OK;
+	} else if (ecc == 1) {
+		if (p_nand_info->max_ecc_bits == 1)
+			ret = SFC_NAND_ECC_REFRESH;
+		else
+			ret = SFC_NAND_ECC_OK;
+	} else if (ecc == 2) {
+		ret = SFC_NAND_ECC_ERROR;
+	} else {
+		if (p_nand_info->max_ecc_bits == 1)
+			ret = SFC_NAND_ECC_ERROR;
+		else
+			ret = SFC_NAND_ECC_REFRESH;
+	}
+
+	if (ret != SFC_NAND_ECC_OK) {
+		PRINT_SFC_E("%s[0x%x], ret=0x%x\n", __func__, addr, ret);
+		if (p_data)
+			PRINT_SFC_HEX("data:", p_data, 4, 8);
+		if (p_spare)
+			PRINT_SFC_HEX("spare:", p_spare, 4, 2);
+	}
+	return ret;
+}
+
+static int sfc_nand_read_id_raw(u8 *data)
+{
+	int ret;
+	union SFCCMD_DATA sfcmd;
+
+	sfcmd.d32 = 0;
+	sfcmd.b.cmd = CMD_READ_JEDECID;
+	sfcmd.b.datasize = 3;
+	sfcmd.b.addrbits = SFC_ADDR_XBITS;
+
+	ret = sfc_request(sfcmd.d32, 0x8 << 16, 0, data);
+
+	return ret;
+}
+
+/*
+ * Read the 1st page's 1st byte of a phy_blk
+ * If not FF, it's bad blk
+ */
+static int sfc_nand_get_bad_block_list(u16 *table, u32 die)
+{
+	u16 blk;
+	u32 bad_cnt, page;
+	u32 blk_per_die;
+	u32 *pread;
+	u32 *pspare_read;
+
+	PRINT_SFC_E("%s\n", __func__);
+	pread = ftl_malloc(2048);
+	pspare_read = ftl_malloc(8);
+	bad_cnt = 0;
+	blk_per_die = p_nand_info->plane_per_die *
+			p_nand_info->blk_per_plane;
+	for (blk = 0; blk < blk_per_die; blk++) {
+		page = (blk + blk_per_die * die) *
+			p_nand_info->page_per_blk;
+		sfc_nand_read_page(0, page, pread, pspare_read);
+
+		if (pread[0] != 0xFFFFFFFF ||
+		    pspare_read[0] != 0xFFFFFFFF) {
+			table[bad_cnt++] = blk;
+			PRINT_SFC_E("die[%d], bad_blk[%d]\n", die, blk);
+		}
+	}
+	ftl_free(pread);
+	ftl_free(pspare_read);
+	return (int)bad_cnt;
+}
+
+#if SFC_NAND_STRESS_TEST_EN
+
+#define SFC_NAND_PAGE_SIZE	2048
+#define SFC_NAND_SPARE_SIZE	8
+
+static u16 bad_blk_list[1024];
+static u32 pwrite[SFC_NAND_PAGE_SIZE / 4];
+static u32 pread[SFC_NAND_PAGE_SIZE / 4];
+static u32 pspare_write[SFC_NAND_SPARE_SIZE / 4];
+static u32 pspare_read[SFC_NAND_SPARE_SIZE / 4];
+static u32 bad_blk_num;
+static u32 bad_page_num;
+
+static void sfc_nand_test(void)
+{
+	u32 i, blk, page, bad_cnt, page_addr;
+	int ret;
+	u32 pages_num = 64;
+	u32 blk_addr = 64;
+	u32 is_bad_blk = 0;
+
+	PRINT_SFC_E("%s\n", __func__);
+
+	bad_blk_num = 0;
+	bad_page_num = 0;
+	bad_cnt	= sfc_nand_get_bad_block_list(bad_blk_list, 0);
+
+	for (blk = 0; blk < 1024; blk++) {
+		for (i = 0; i < bad_cnt; i++) {
+			if (bad_blk_list[i] == blk)
+				break;
+		}
+		if (i < bad_cnt)
+			continue;
+		is_bad_blk = 0;
+		PRINT_SFC_E("Flash prog block: %x\n", blk);
+		sfc_nand_erase_block(0, blk * blk_addr);
+		for (page = 0; page < pages_num; page++) {
+			page_addr = blk * blk_addr + page;
+			for (i = 0; i < 512; i++)
+				pwrite[i] = (page_addr << 16) + i;
+			pspare_write[0] = pwrite[0] + 0x5AF0;
+			pspare_write[1] = pspare_write[0] + 1;
+			sfc_nand_prog_page(0, page_addr, pwrite, pspare_write);
+			memset(pread, 0, 2048);
+			memset(pspare_read, 0, 8);
+			ret = sfc_nand_read_page(0, page_addr, pread,
+						 pspare_read);
+			if (ret != SFC_NAND_ECC_OK)
+				is_bad_blk = 1;
+			for (i = 0; i < 512; i++) {
+				if (pwrite[i] != pread[i]) {
+					is_bad_blk = 1;
+					break;
+				}
+			}
+			for (i = 0; i < 2; i++) {
+				if (pspare_write[i] != pspare_read[i]) {
+					is_bad_blk = 1;
+					break;
+				}
+			}
+			if (is_bad_blk) {
+				bad_page_num++;
+				PRINT_SFC_E("ERR:page%x, ret=%x\n",
+					    page_addr, ret);
+				PRINT_SFC_HEX("data:", pread, 4, 8);
+				PRINT_SFC_HEX("spare:", pspare_read, 4, 2);
+			}
+		}
+		sfc_nand_erase_block(0, blk * blk_addr);
+		if (is_bad_blk)
+			bad_blk_num++;
+	}
+	PRINT_SFC_E("bad_blk_num = %d, bad_page_num = %d\n",
+		    bad_blk_num, bad_page_num);
+
+	PRINT_SFC_E("Flash Test Finish!!!\n");
+	while (1)
+		;
+}
+#endif
+
+static void ftl_flash_init(void)
+{
+	/* para init */
+	g_nand_phy_info.nand_type	= 1;
+	g_nand_phy_info.die_num		= 1;
+	g_nand_phy_info.plane_per_die	= p_nand_info->plane_per_die;
+	g_nand_phy_info.blk_per_plane	= p_nand_info->blk_per_plane;
+	g_nand_phy_info.page_per_blk	= p_nand_info->page_per_blk;
+	g_nand_phy_info.page_per_slc_blk = p_nand_info->page_per_blk;
+	g_nand_phy_info.byte_per_sec	= 512;
+	g_nand_phy_info.sec_per_page	= p_nand_info->sec_per_page;
+	g_nand_phy_info.sec_per_blk	= p_nand_info->sec_per_page *
+					  p_nand_info->page_per_blk;
+	g_nand_phy_info.reserved_blk	= 8;
+	g_nand_phy_info.blk_per_die	= p_nand_info->plane_per_die *
+					  p_nand_info->blk_per_plane;
+	g_nand_phy_info.ecc_bits	= p_nand_info->max_ecc_bits;
+
+	/* driver register */
+	g_nand_ops.get_bad_blk_list	= sfc_nand_get_bad_block_list;
+	g_nand_ops.erase_blk		= sfc_nand_erase_block;
+	g_nand_ops.prog_page		= sfc_nand_prog_page;
+	g_nand_ops.read_page		= sfc_nand_read_page;
+}
+
+static int spi_nand_enable_QE(void)
+{
+	int ret = SFC_OK;
+	u8 status;
+	int bit_offset = p_nand_info->QE_bits;
+
+	if (bit_offset == 0xFF)
+		return SFC_OK;
+
+	ret = sfc_nand_read_feature(p_nand_info->QE_address, &status);
+	if (ret != SFC_OK)
+		return ret;
+
+	if (status & (1 << bit_offset))   /* is QE bit set */
+		return SFC_OK;
+
+	status |= (1 << bit_offset);
+		return sfc_nand_write_feature(p_nand_info->QE_address, status);
+
+	return ret;
+}
+
+u32 sfc_nand_init(void)
+{
+	PRINT_SFC_I("...%s enter...\n", __func__);
+
+	sfc_nand_read_id_raw(id_byte);
+	PRINT_SFC_E("sfc_nand id: %x %x %x\n",
+		    id_byte[0], id_byte[1], id_byte[2]);
+	if (id_byte[0] == 0xFF || id_byte[0] == 0x00)
+		return FTL_NO_FLASH;
+
+	p_nand_info = spi_nand_get_info(id_byte);
+	if (!p_nand_info)
+		return FTL_UNSUPPORTED_FLASH;
+
+	sfc_nand_dev.manufacturer = id_byte[0];
+	sfc_nand_dev.mem_type = id_byte[1];
+
+	/* disable block lock */
+	sfc_nand_write_feature(0xA0, 0);
+	sfc_nand_dev.read_lines = DATA_LINES_X1;
+	sfc_nand_dev.prog_lines = DATA_LINES_X1;
+	sfc_nand_dev.page_read_cmd = p_nand_info->read_cache_cmd_1;
+	sfc_nand_dev.page_prog_cmd = p_nand_info->prog_cache_cmd_1;
+	if (p_nand_info->feature & FEA_4BIT_READ) {
+		if (spi_nand_enable_QE() == SFC_OK) {
+			sfc_nand_dev.read_lines = DATA_LINES_X4;
+			sfc_nand_dev.page_read_cmd =
+				p_nand_info->read_cache_cmd_4;
+		}
+	}
+
+	if (p_nand_info->feature & FEA_4BIT_PROG &&
+	    sfc_nand_dev.read_lines == DATA_LINES_X4) {
+		sfc_nand_dev.prog_lines = DATA_LINES_X4;
+		sfc_nand_dev.page_prog_cmd = p_nand_info->prog_cache_cmd_4;
+	}
+
+	if (1) {
+		u8 status;
+
+		sfc_nand_read_feature(0xA0, &status);
+		PRINT_SFC_I("sfc_nand A0 = 0x%x\n", status);
+		sfc_nand_read_feature(0xB0, &status);
+		PRINT_SFC_I("sfc_nand B0 = 0x%x\n", status);
+		sfc_nand_read_feature(0xC0, &status);
+		PRINT_SFC_I("sfc_nand C0 = 0x%x\n", status);
+		PRINT_SFC_I("read_lines = %x\n", sfc_nand_dev.read_lines);
+		PRINT_SFC_I("prog_lines = %x\n", sfc_nand_dev.prog_lines);
+		PRINT_SFC_I("page_read_cmd = %x\n", sfc_nand_dev.page_read_cmd);
+		PRINT_SFC_I("page_prog_cmd = %x\n", sfc_nand_dev.page_prog_cmd);
+	}
+	ftl_flash_init();
+
+	#if SFC_NAND_STRESS_TEST_EN
+	sfc_nand_test();
+	#endif
+
+	return SFC_OK;
+}
+
+int sfc_nand_read_id(u8 *data)
+{
+	memcpy(data, id_byte, 3);
+	return 0;
+}
diff --git a/drivers/rkflash/sfc_nand.h b/drivers/rkflash/sfc_nand.h
new file mode 100644
index 0000000000..4b96d5b9f2
--- /dev/null
+++ b/drivers/rkflash/sfc_nand.h
@@ -0,0 +1,122 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#ifndef __SFC_NAND_H
+#define __SFC_NAND_H
+
+#define SFC_NAND_STRESS_TEST_EN		0
+
+#define SFC_NAND_PROG_ERASE_ERROR	-2
+#define SFC_NAND_HW_ERROR		-1
+#define SFC_NAND_ECC_ERROR		NAND_ERROR
+#define SFC_NAND_ECC_REFRESH		NAND_STS_REFRESH
+#define SFC_NAND_ECC_OK			NAND_STS_OK
+
+#define SFC_NAND_PAGE_MAX_SIZE		2112
+
+#define FEA_READ_STATUE_MASK    (0x3 << 0)
+#define FEA_STATUE_MODE1        0
+#define FEA_STATUE_MODE2        1
+#define FEA_4BIT_READ           BIT(2)
+#define FEA_4BIT_PROG           BIT(3)
+#define FEA_4BYTE_ADDR          BIT(4)
+#define FEA_4BYTE_ADDR_MODE	BIT(5)
+
+#define MID_WINBOND             0xEF
+#define MID_GIGADEV             0xC8
+#define MID_MICRON              0x2C
+#define MID_MACRONIX            0xC2
+#define MID_SPANSION            0x01
+#define MID_EON                 0x1C
+#define MID_ST                  0x20
+
+/* Command Set */
+#define CMD_READ_JEDECID        (0x9F)
+#define CMD_READ_DATA           (0x03)
+#define CMD_READ_STATUS         (0x05)
+#define CMD_WRITE_STATUS        (0x01)
+#define CMD_PAGE_PROG           (0x02)
+#define CMD_SECTOR_ERASE        (0x20)
+#define CMD_BLK64K_ERASE        (0xD8)
+#define CMD_BLK32K_ERASE        (0x52)
+#define CMD_CHIP_ERASE          (0xC7)
+#define CMD_WRITE_EN            (0x06)
+#define CMD_WRITE_DIS           (0x04)
+#define CMD_PAGE_READ           (0x13)
+#define CMD_GET_FEATURE         (0x0F)
+#define CMD_SET_FEATURE         (0x1F)
+#define CMD_PROG_LOAD           (0x02)
+#define CMD_PROG_EXEC           (0x10)
+#define CMD_BLOCK_ERASE         (0xD8)
+#define CMD_READ_DATA_X2        (0x3B)
+#define CMD_READ_DATA_X4        (0x6B)
+#define CMD_PROG_LOAD_X4        (0x32)
+#define CMD_READ_STATUS2        (0x35)
+#define CMD_READ_STATUS3        (0x15)
+#define CMD_WRITE_STATUS2       (0x31)
+#define CMD_WRITE_STATUS3       (0x11)
+#define CMD_FAST_READ_X1        (0x0B)  /* X1 cmd, X1 addr, X1 data */
+#define CMD_FAST_READ_X2        (0x3B)  /* X1 cmd, X1 addr, X2 data */
+/* X1 cmd, X1 addr, X4 data SUPPORT GD MARCONIX WINBOND */
+#define CMD_FAST_READ_X4        (0x6B)
+/* X1 cmd, X1 addr, X4 data SUPPORT GD MARCONIX WINBOND */
+#define CMD_FAST_4READ_X4       (0x6C)
+/* X1 cmd, X4 addr, X4 data SUPPORT EON GD MARCONIX WINBOND */
+#define CMD_FAST_READ_A4        (0xEB)
+/* X1 cmd, X1 addr, X4 data, SUPPORT GD WINBOND */
+#define CMD_PAGE_PROG_X4        (0x32)
+/* X1 cmd, X4 addr, X4 data, SUPPORT MARCONIX */
+#define CMD_PAGE_PROG_A4        (0x38)
+#define CMD_RESET_NAND          (0xFF)
+
+#define CMD_ENTER_4BYTE_MODE    (0xB7)
+#define CMD_EXIT_4BYTE_MODE     (0xE9)
+#define CMD_ENABLE_RESER	(0x66)
+#define CMD_RESET_DEVICE	(0x99)
+
+struct SFNAND_DEV {
+	u32 capacity;
+	u32 block_size;
+	u16 page_size;
+	u8 manufacturer;
+	u8 mem_type;
+	u8 read_lines;
+	u8 prog_lines;
+	u8 page_read_cmd;
+	u8 page_prog_cmd;
+};
+
+struct nand_info {
+	u32 id;
+
+	u16 sec_per_page;
+	u16 page_per_blk;
+	u16 plane_per_die;
+	u16 blk_per_plane;
+
+	u8 page_read_cmd;
+	u8 page_prog_cmd;
+	u8 read_cache_cmd_1;
+	u8 prog_cache_cmd_1;
+
+	u8 read_cache_cmd_4;
+	u8 prog_cache_cmd_4;
+	u8 block_erase_cmd;
+	u8 feature;
+
+	u8 density;  /* (1 << density) sectors*/
+	u8 max_ecc_bits;
+	u8 QE_address;
+	u8 QE_bits;
+
+	u8 spare_offs_1;
+	u8 spare_offs_2;
+};
+
+u32 sfc_nand_init(void);
+int sfc_nand_read_id(u8 *buf);
+
+#endif
diff --git a/drivers/rkflash/sfc_nor.c b/drivers/rkflash/sfc_nor.c
index bff5cdf8d3..1a1cd01492 100644
--- a/drivers/rkflash/sfc_nor.c
+++ b/drivers/rkflash/sfc_nor.c
@@ -1,11 +1,11 @@
 /*
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ * SPDX-License-Identifier:	GPL-2.0
  */
-
-#include <linux/delay.h>
 #include <linux/compat.h>
+#include <linux/delay.h>
+#include <linux/kernel.h>
 #include <linux/string.h>
 
 #include "sfc_nor.h"
@@ -103,7 +103,8 @@ static int snor_wait_busy(int timeout)
 {
 	int ret;
 	union SFCCMD_DATA sfcmd;
-	u32 i, status;
+	int i;
+	u32 status;
 
 	sfcmd.d32 = 0;
 	sfcmd.b.cmd = CMD_READ_STATUS;
@@ -195,7 +196,7 @@ static int snor_erase(struct SFNOR_DEV *p_dev,
 
 	sfcmd.b.addrbits = (erase_type != ERASE_CHIP) ?
 				SFC_ADDR_24BITS : SFC_ADDR_0BITS;
-	if ((p_dev->addr_mode == ADDR_MODE_4BYTE) && (erase_type != ERASE_CHIP))
+	if (p_dev->addr_mode == ADDR_MODE_4BYTE && erase_type != ERASE_CHIP)
 		sfcmd.b.addrbits = SFC_ADDR_32BITS;
 
 	snor_write_en();
@@ -401,6 +402,7 @@ int snor_write(struct SFNOR_DEV *p_dev, u32 sec, u32 n_sec, const void *p_data)
 	int ret = SFC_OK;
 	u32 len, blk_size, offset;
 	u8 *p_buf =  (u8 *)p_data;
+	u32 total_sec = n_sec;
 
 	if ((sec + n_sec) > p_dev->capacity)
 		return SFC_PARAM_ERR;
@@ -436,7 +438,7 @@ int snor_write(struct SFNOR_DEV *p_dev, u32 sec, u32 n_sec, const void *p_data)
 out:
 	mutex_unlock(&p_dev->lock);
 	if (!ret)
-		ret = n_sec;
+		ret = total_sec;
 
 	return ret;
 }
@@ -492,9 +494,7 @@ static struct flash_info *snor_get_flash_info(u8 *flash_id)
 	u32 i;
 	u32 id = (flash_id[0] << 16) | (flash_id[1] << 8) | (flash_id[2] << 0);
 
-	for (i = 0;
-		i < (sizeof(spi_flash_tbl) / sizeof(struct flash_info));
-		i++) {
+	for (i = 0; i < ARRAY_SIZE(spi_flash_tbl); i++) {
 		if (spi_flash_tbl[i].id == id)
 			return &spi_flash_tbl[i];
 	}
@@ -520,7 +520,7 @@ static void *snor_flash_info_adjust(struct flash_info *spi_flash_info)
 
 int snor_init(struct SFNOR_DEV *p_dev)
 {
-	int i;
+	u32 i;
 	u8 id_byte[5];
 	int err;
 
@@ -562,8 +562,8 @@ int snor_init(struct SFNOR_DEV *p_dev)
 				p_dev->read_cmd = g_spi_flash_info->read_cmd_4;
 			}
 		}
-		if ((g_spi_flash_info->feature & FEA_4BIT_PROG) &&
-		    (p_dev->read_lines == DATA_LINES_X4)) {
+		if (g_spi_flash_info->feature & FEA_4BIT_PROG &&
+		    p_dev->read_lines == DATA_LINES_X4) {
 			p_dev->prog_lines = DATA_LINES_X4;
 			p_dev->prog_cmd = g_spi_flash_info->prog_cmd_4;
 		}
diff --git a/drivers/rkflash/sfc_nor.h b/drivers/rkflash/sfc_nor.h
index 6f36358898..105683e84f 100644
--- a/drivers/rkflash/sfc_nor.h
+++ b/drivers/rkflash/sfc_nor.h
@@ -1,7 +1,7 @@
 /*
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ * SPDX-License-Identifier:	GPL-2.0
  */
 
 #ifndef _SFNOR_H
diff --git a/drivers/rkflash/typedef.h b/drivers/rkflash/typedef.h
new file mode 100644
index 0000000000..ca20ceeb18
--- /dev/null
+++ b/drivers/rkflash/typedef.h
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#ifndef	__TYPE_DEF_H
+#define	__TYPE_DEF_H
+
+#include <asm/types.h>
+
+#ifndef NULL
+#define NULL	0
+#endif
+
+#define OK	0
+#define ERROR	(-1)
+
+#define FTL_ERROR	ERROR
+#define FTL_OK		OK
+#define FTL_NO_FLASH	-2
+#define FTL_NO_IDB	-3
+#define FTL_UNSUPPORTED_FLASH	-4
+
+#define FALSE		0
+#define TRUE		(!FALSE)
+
+#define INVALID_UINT8	((u8)0xFF)
+#define INVALID_UINT16	((u16)0xFFFF)
+#define INVALID_UINT32	((u32)0xFFFFFFFFL)
+
+#define PRINT_E	pr_info
+#define PRINT_I	pr_info
+
+void *ftl_malloc(int n_size);
+void *ftl_memset(void *s, int c, unsigned int n);
+void *ftl_memcpy(void *pv_to,
+		 const void *pv_from,
+		 unsigned int size);
+void ftl_free(void *p);
+void rknand_print_hex(char *s, void *buf, int width, int len);
+
+#endif  /*__TYPEDEF_H */

commit 504d9922d7962ecf19c00d1965fb36a07a330eec
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Tue Feb 27 11:13:22 2018 +0800

    drm/rockchip: vop: delete aclk frequence set
    
    aclk freq should same to kernel, in addition the aclk is also used by
    oteher IP, like RGA,IEP and so on. so we move this to cru driver to do
    aclk init.
    
    Change-Id: I0d2395506a185548e64d8d2e37024c0de656514b
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index 739595d782..201fd20082 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -196,7 +196,7 @@ static int rockchip_vop_init(struct display_state *state)
 	u16 vsync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
 	u16 vact_st = mode->crtc_vtotal - mode->crtc_vsync_start;
 	u16 vact_end = vact_st + vdisplay;
-	struct clk dclk, aclk;
+	struct clk dclk;
 	u32 val, act_end;
 	int ret;
 	bool yuv_overlay = false, post_r2y_en = false, post_y2r_en = false;
@@ -237,12 +237,6 @@ static int rockchip_vop_init(struct display_state *state)
 		return ret;
 	}
 
-	ret = clk_get_by_name(crtc_state->dev, "aclk_vop", &aclk);
-	if (!ret)
-		ret = clk_set_rate(&aclk, 400 * 1000 * 1000);
-	if (IS_ERR_VALUE(ret))
-		printf("%s: Failed to set aclk: ret=%d\n", __func__, ret);
-
 	memcpy(vop->regsbak, vop->regs, vop_data->reg_len);
 
 	rockchip_vop_init_gamma(vop, state);

commit 7a1915c07b081eaeaf68b22bcf1841cee9cddd08
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Thu Mar 22 16:25:06 2018 +0800

    clk: rockchip: px30: implement soc_clk_dump
    
    Change-Id: I8c5c4468ed6c6d1f4767a0a6ddaa2b47037fe8bc
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_px30.h b/arch/arm/include/asm/arch-rockchip/cru_px30.h
index df5ec9b9e2..acaa204a25 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_px30.h
@@ -27,6 +27,12 @@ enum px30_pll_id {
 	PLL_COUNT,
 };
 
+struct px30_clk_info {
+	unsigned long id;
+	char *name;
+	bool is_cru;
+};
+
 /* Private data for the clock driver - used by rockchip_get_cru() */
 struct px30_clk_priv {
 	struct px30_cru *cru;
diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 3b8dca8547..7fbb279247 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -40,6 +40,13 @@ enum {
 
 #define DIV_TO_RATE(input_rate, div)    ((input_rate) / ((div) + 1))
 
+#define PX30_CLK_DUMP(_id, _name, _iscru)	\
+{						\
+	.id = _id,				\
+	.name = _name,				\
+	.is_cru = _iscru,			\
+}
+
 static struct pll_rate_table px30_pll_rates[] = {
 	/* _mhz, _refdiv, _fbdiv, _postdiv1, _postdiv2, _dsmpd, _frac */
 	PX30_PLL_RATE(1200000000, 1, 50, 1, 1, 1, 0),
@@ -49,6 +56,20 @@ static struct pll_rate_table px30_pll_rates[] = {
 	PX30_PLL_RATE(816000000, 1, 68, 2, 1, 1, 0),
 };
 
+static const struct px30_clk_info clks_dump[] = {
+	PX30_CLK_DUMP(PLL_APLL, "apll", true),
+	PX30_CLK_DUMP(PLL_DPLL, "dpll", true),
+	PX30_CLK_DUMP(PLL_CPLL, "cpll", true),
+	PX30_CLK_DUMP(PLL_NPLL, "npll", true),
+	PX30_CLK_DUMP(PLL_GPLL, "gpll", false),
+	PX30_CLK_DUMP(ACLK_BUS_PRE, "aclk_bus", true),
+	PX30_CLK_DUMP(HCLK_BUS_PRE, "hclk_bus", true),
+	PX30_CLK_DUMP(PCLK_BUS_PRE, "pclk_bus", true),
+	PX30_CLK_DUMP(ACLK_PERI_PRE, "aclk_peri", true),
+	PX30_CLK_DUMP(HCLK_PERI_PRE, "hclk_peri", true),
+	PX30_CLK_DUMP(PCLK_PMU_PRE, "pclk_pmu", false),
+};
+
 static u8 pll_mode_shift[PLL_COUNT] = {
 	APLL_MODE_SHIFT, DPLL_MODE_SHIFT, CPLL_MODE_SHIFT,
 	NPLL_MODE_SHIFT, GPLL_MODE_SHIFT
@@ -1281,3 +1302,69 @@ U_BOOT_DRIVER(rockchip_px30_pmucru) = {
 	.ops		= &px30_pmuclk_ops,
 	.probe		= px30_pmuclk_probe,
 };
+
+/**
+ * soc_clk_dump() - Print clock frequencies
+ * Returns zero on success
+ *
+ * Implementation for the clk dump command.
+ */
+int soc_clk_dump(void)
+{
+	struct udevice *cru_dev, *pmucru_dev;
+	const struct px30_clk_info *clk_dump;
+	struct clk clk;
+	unsigned long clk_count = ARRAY_SIZE(clks_dump);
+	unsigned long rate;
+	int i, ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_CLK,
+					  DM_GET_DRIVER(rockchip_px30_cru),
+					  &cru_dev);
+	if (ret) {
+		printf("%s failed to get cru device\n", __func__);
+		return ret;
+	}
+
+	ret = uclass_get_device_by_driver(UCLASS_CLK,
+					  DM_GET_DRIVER(rockchip_px30_pmucru),
+					  &pmucru_dev);
+	if (ret) {
+		printf("%s failed to get pmucru device\n", __func__);
+		return ret;
+	}
+
+	printf("CLK:");
+	for (i = 0; i < clk_count; i++) {
+		clk_dump = &clks_dump[i];
+		if (clk_dump->name) {
+			clk.id = clk_dump->id;
+			if (clk_dump->is_cru)
+				ret = clk_request(cru_dev, &clk);
+			else
+				ret = clk_request(pmucru_dev, &clk);
+			if (ret < 0)
+				return ret;
+
+			rate = clk_get_rate(&clk);
+			clk_free(&clk);
+			if (i == 0) {
+				if (rate < 0)
+					printf("%10s%20s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("%10s%20lu Hz\n", clk_dump->name,
+					       rate);
+			} else {
+				if (rate < 0)
+					printf("%14s%20s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("%14s%20lu Hz\n", clk_dump->name,
+					       rate);
+			}
+		}
+	}
+
+	return 0;
+}

commit 8b1aed51a630d15c96a7adfd99c2ea7bf2c3d834
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Thu Mar 22 16:46:07 2018 +0800

    clk: rockchip: px30: Add support to get pll rate
    
    Change-Id: I41834e2d5e2537a71d68228d995cbfcc04744959
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 0e4e4b1faf..3b8dca8547 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -758,6 +758,14 @@ static int px30_clk_get_gpll_rate(ulong *rate)
 	return 0;
 }
 
+static ulong px30_clk_get_pll_rate(struct px30_clk_priv *priv,
+				   enum px30_pll_id pll_id)
+{
+	struct px30_cru *cru = priv->cru;
+
+	return rkclk_pll_get_rate(&cru->pll[pll_id], &cru->mode, pll_id);
+}
+
 static ulong px30_clk_get_rate(struct clk *clk)
 {
 	struct px30_clk_priv *priv = dev_get_priv(clk->dev);
@@ -775,8 +783,18 @@ static ulong px30_clk_get_rate(struct clk *clk)
 
 	debug("%s %ld\n", __func__, clk->id);
 	switch (clk->id) {
-	case 0 ... 15:
-		return 0;
+	case PLL_APLL:
+		rate = px30_clk_get_pll_rate(priv, APLL);
+		break;
+	case PLL_DPLL:
+		rate = px30_clk_get_pll_rate(priv, DPLL);
+		break;
+	case PLL_CPLL:
+		rate = px30_clk_get_pll_rate(priv, CPLL);
+		break;
+	case PLL_NPLL:
+		rate = px30_clk_get_pll_rate(priv, NPLL);
+		break;
 	case HCLK_SDMMC:
 	case HCLK_EMMC:
 	case SCLK_SDMMC:

commit cefa5186b040a24890d8f0f2e9020fe0f1b645ed
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Wed Jun 6 16:57:55 2018 +0800

    clk: rockchip: px30: Add support for pmucru
    
    Change-Id: I445ae2b2491d1709d2790412fcc07dccf56189d9
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_px30.h b/arch/arm/include/asm/arch-rockchip/cru_px30.h
index 3bb6007ff2..df5ec9b9e2 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_px30.h
@@ -13,31 +13,10 @@
 #define OSC_HZ		(24 * MHz)
 
 #define APLL_HZ		(816 * MHz)
-#define GPLL_HZ		(1200 * MHz)
-#define CPLL_HZ		(594 * MHz)
 
 #define CORE_PERI_HZ	204000000
 #define CORE_ACLK_HZ	408000000
 
-#define BUS_ACLK_HZ	148500000
-#define BUS_HCLK_HZ	148500000
-#define BUS_PCLK_HZ	74250000
-
-#define PERI_ACLK_HZ	148500000
-#define PERI_HCLK_HZ	148500000
-#define PERI_PCLK_HZ	74250000
-
-enum apll_frequencies {
-	APLL_816_MHZ,
-	APLL_600_MHZ,
-};
-
-/* Private data for the clock driver - used by rockchip_get_cru() */
-struct px30_clk_priv {
-	struct px30_cru *cru;
-	ulong rate;
-};
-
 /* PX30 pll id */
 enum px30_pll_id {
 	APLL,
@@ -48,15 +27,28 @@ enum px30_pll_id {
 	PLL_COUNT,
 };
 
+/* Private data for the clock driver - used by rockchip_get_cru() */
+struct px30_clk_priv {
+	struct px30_cru *cru;
+	ulong gpll_hz;
+};
+
+struct px30_pmuclk_priv {
+	struct px30_pmucru *pmucru;
+	ulong gpll_hz;
+};
+
+struct px30_pll {
+	unsigned int con0;
+	unsigned int con1;
+	unsigned int con2;
+	unsigned int con3;
+	unsigned int con4;
+	unsigned int reserved0[3];
+};
+
 struct px30_cru {
-	struct px30_pll {
-		unsigned int con0;
-		unsigned int con1;
-		unsigned int con2;
-		unsigned int con3;
-		unsigned int con4;
-		unsigned int reserved0[3];
-	} pll[4];
+	struct px30_pll pll[4];
 	unsigned int reserved1[8];
 	unsigned int mode;
 	unsigned int misc;
@@ -87,23 +79,31 @@ struct px30_cru {
 	unsigned int emmc_con[2];
 	unsigned int reserved9[(0x400 - 0x394) / 4 - 1];
 	unsigned int autocs_con[8];
-	unsigned int reserved10[(0xc000 - 0x41c) / 4 - 1];
-	struct px30_pll gpll;
+};
+
+check_member(px30_cru, autocs_con[7], 0x41c);
+
+struct px30_pmucru {
+	struct px30_pll pll;
 	unsigned int pmu_mode;
-	unsigned int reserved11[7];
+	unsigned int reserved1[7];
 	unsigned int pmu_clksel_con[6];
+	unsigned int reserved2[10];
 	unsigned int pmu_clkgate_con[2];
-	unsigned int reserved12[(0xc0c0 - 0xc05c) / 4 - 1];
+	unsigned int reserved3[14];
 	unsigned int pmu_autocs_con[2];
 };
-check_member(px30_cru, pmu_autocs_con[1], 0xc0c4);
-
-struct pll_div {
-	u32 refdiv;
-	u32 fbdiv;
-	u32 postdiv1;
-	u32 postdiv2;
-	u32 frac;
+
+check_member(px30_pmucru, pmu_autocs_con[1], 0xc4);
+
+struct pll_rate_table {
+	unsigned long rate;
+	unsigned int fbdiv;
+	unsigned int postdiv1;
+	unsigned int refdiv;
+	unsigned int postdiv2;
+	unsigned int dsmpd;
+	unsigned int frac;
 };
 
 enum {
@@ -194,6 +194,21 @@ enum {
 	PERI_ACLK_DIV_SHIFT	= 0,
 	PERI_ACLK_DIV_MASK	= 0x1f << PERI_ACLK_DIV_SHIFT,
 
+	/* CRU_CLKSEL15_CON */
+	NANDC_CLK_SEL_SHIFT	= 15,
+	NANDC_CLK_SEL_MASK	= 0x1 << NANDC_CLK_SEL_SHIFT,
+	NANDC_CLK_SEL_NANDC	= 0,
+	NANDC_CLK_SEL_NANDC_DIV50,
+	NANDC_DIV50_SHIFT	= 8,
+	NANDC_DIV50_MASK	= 0x1f << NANDC_DIV50_SHIFT,
+	NANDC_PLL_SHIFT		= 6,
+	NANDC_PLL_MASK		= 0x3 << NANDC_PLL_SHIFT,
+	NANDC_SEL_GPLL		= 0,
+	NANDC_SEL_CPLL,
+	NANDC_SEL_NPLL,
+	NANDC_DIV_SHIFT		= 0,
+	NANDC_DIV_MASK		= 0x1f << NANDC_DIV_SHIFT,
+
 	/* CRU_CLKSEL20_CON */
 	EMMC_PLL_SHIFT		= 14,
 	EMMC_PLL_MASK		= 3 << EMMC_PLL_SHIFT,
@@ -309,8 +324,11 @@ enum {
 	CLK_SARADC_DIV_CON_MASK		= 0x7ff,
 
 	/* CRU_PMU_MODE */
-	GPLL_MODE_SHIFT		= 0,
-	GPLL_MODE_MASK		= 3 << GPLL_MODE_SHIFT,
-	
+	GPLL_MODE_SHIFT			= 0,
+	GPLL_MODE_MASK			= 3 << GPLL_MODE_SHIFT,
+
+	/* CRU_PMU_CLK_SEL0_CON */
+	CLK_PMU_PCLK_DIV_SHIFT		= 0,
+	CLK_PMU_PCLK_DIV_MASK		= 0x1f << CLK_PMU_PCLK_DIV_SHIFT,
 };
 #endif
diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 17effb0239..0e4e4b1faf 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -26,20 +26,27 @@ enum {
 	OUTPUT_MIN_HZ	= 24 * 1000000,
 };
 
-#define DIV_TO_RATE(input_rate, div)    ((input_rate) / ((div) + 1))
-
-#define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\
-	.refdiv = _refdiv,\
-	.fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ),\
-	.postdiv1 = _postdiv1, .postdiv2 = _postdiv2};
-static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 1, 1, 1);
+#define PX30_PLL_RATE(_rate, _refdiv, _fbdiv, _postdiv1,	\
+			_postdiv2, _dsmpd, _frac)		\
+{								\
+	.rate	= _rate##U,					\
+	.fbdiv = _fbdiv,					\
+	.postdiv1 = _postdiv1,					\
+	.refdiv = _refdiv,					\
+	.postdiv2 = _postdiv2,					\
+	.dsmpd = _dsmpd,					\
+	.frac = _frac,						\
+}
 
-static const struct pll_div apll_816_cfg = PLL_DIVISORS(816 * MHz, 1, 2, 1);
-static const struct pll_div apll_600_cfg = PLL_DIVISORS(600 * MHz, 1, 3, 1);
+#define DIV_TO_RATE(input_rate, div)    ((input_rate) / ((div) + 1))
 
-static const struct pll_div *apll_cfgs[] = {
-	[APLL_816_MHZ] = &apll_816_cfg,
-	[APLL_600_MHZ] = &apll_600_cfg,
+static struct pll_rate_table px30_pll_rates[] = {
+	/* _mhz, _refdiv, _fbdiv, _postdiv1, _postdiv2, _dsmpd, _frac */
+	PX30_PLL_RATE(1200000000, 1, 50, 1, 1, 1, 0),
+	PX30_PLL_RATE(1188000000, 2, 99, 1, 1, 1, 0),
+	PX30_PLL_RATE(1100000000, 12, 550, 1, 1, 1, 0),
+	PX30_PLL_RATE(1000000000, 6, 500, 2, 1, 1, 0),
+	PX30_PLL_RATE(816000000, 1, 68, 2, 1, 1, 0),
 };
 
 static u8 pll_mode_shift[PLL_COUNT] = {
@@ -51,12 +58,86 @@ static u32 pll_mode_mask[PLL_COUNT] = {
 	NPLL_MODE_MASK, GPLL_MODE_MASK
 };
 
-/*
- *  the div restructions of pll in integer mode, these are defined in
- *  * CRU_*PLL_CON0 or PMUCRU_*PLL_CON0
- */
-#define PLL_DIV_MIN	16
-#define PLL_DIV_MAX	3200
+static struct pll_rate_table auto_table;
+
+static struct pll_rate_table *pll_clk_set_by_auto(u32 drate)
+{
+	struct pll_rate_table *rate = &auto_table;
+	u32 ref_khz = OSC_HZ / KHz, refdiv, fbdiv = 0;
+	u32 postdiv1, postdiv2 = 1;
+	u32 fref_khz;
+	u32 diff_khz, best_diff_khz;
+	const u32 max_refdiv = 63, max_fbdiv = 3200, min_fbdiv = 16;
+	const u32 max_postdiv1 = 7, max_postdiv2 = 7;
+	u32 vco_khz;
+	u32 rate_khz = drate / KHz;
+
+	if (!drate) {
+		printf("%s: the frequency can't be 0 Hz\n", __func__);
+		return NULL;
+	}
+
+	postdiv1 = DIV_ROUND_UP(VCO_MIN_HZ / 1000, rate_khz);
+	if (postdiv1 > max_postdiv1) {
+		postdiv2 = DIV_ROUND_UP(postdiv1, max_postdiv1);
+		postdiv1 = DIV_ROUND_UP(postdiv1, postdiv2);
+	}
+
+	vco_khz = rate_khz * postdiv1 * postdiv2;
+
+	if (vco_khz < (VCO_MIN_HZ / KHz) || vco_khz > (VCO_MAX_HZ / KHz) ||
+	    postdiv2 > max_postdiv2) {
+		printf("%s: Cannot find out a supported VCO for Freq (%uHz)\n",
+		       __func__, rate_khz);
+		return NULL;
+	}
+
+	rate->postdiv1 = postdiv1;
+	rate->postdiv2 = postdiv2;
+
+	best_diff_khz = vco_khz;
+	for (refdiv = 1; refdiv < max_refdiv && best_diff_khz; refdiv++) {
+		fref_khz = ref_khz / refdiv;
+
+		fbdiv = vco_khz / fref_khz;
+		if ((fbdiv >= max_fbdiv) || (fbdiv <= min_fbdiv))
+			continue;
+		diff_khz = vco_khz - fbdiv * fref_khz;
+		if (fbdiv + 1 < max_fbdiv && diff_khz > fref_khz / 2) {
+			fbdiv++;
+			diff_khz = fref_khz - diff_khz;
+		}
+
+		if (diff_khz >= best_diff_khz)
+			continue;
+
+		best_diff_khz = diff_khz;
+		rate->refdiv = refdiv;
+		rate->fbdiv = fbdiv;
+	}
+
+	if (best_diff_khz > 4 * (MHz / KHz)) {
+		printf("%s: Failed to match output frequency %u bestis %u Hz\n",
+		       __func__, rate_khz,
+		       best_diff_khz * KHz);
+		return NULL;
+	}
+
+	return rate;
+}
+
+static const struct pll_rate_table *get_pll_settings(unsigned long rate)
+{
+	unsigned int rate_count = ARRAY_SIZE(px30_pll_rates);
+	int i;
+
+	for (i = 0; i < rate_count; i++) {
+		if (rate == px30_pll_rates[i].rate)
+			return &px30_pll_rates[i];
+	}
+
+	return pll_clk_set_by_auto(rate);
+}
 
 /*
  * How to calculate the PLL(from TRM V0.3 Part 1 Page 63):
@@ -73,26 +154,26 @@ static u32 pll_mode_mask[PLL_COUNT] = {
  * FBDIV = Integer value programmed into feedback divide
  *
  */
-static void rkclk_set_pll(struct px30_cru *cru, enum px30_pll_id pll_id,
-			  const struct pll_div *div)
+static int rkclk_set_pll(struct px30_pll *pll, unsigned int *mode,
+			 enum px30_pll_id pll_id,
+			 unsigned long drate)
 {
-	struct px30_pll *pll;
-	unsigned int *mode;
-	/* All PLLs have same VCO and output frequency range restrictions. */
-	uint vco_hz = OSC_HZ / 1000 * div->fbdiv / div->refdiv * 1000;
-	uint output_hz = vco_hz / div->postdiv1 / div->postdiv2;
+	const struct pll_rate_table *rate;
+	uint vco_hz, output_hz;
 
-	if (pll_id == GPLL) {
-		pll = &cru->gpll;
-		mode = &cru->pmu_mode;
-	} else {
-		pll = &cru->pll[pll_id];
-		mode = &cru->mode;
-	};
+	rate = get_pll_settings(drate);
+	if (!rate) {
+		printf("%s unsupport rate\n", __func__);
+		return -EINVAL;
+	}
+
+	/* All PLLs have same VCO and output frequency range restrictions. */
+	vco_hz = OSC_HZ / 1000 * rate->fbdiv / rate->refdiv * 1000;
+	output_hz = vco_hz / rate->postdiv1 / rate->postdiv2;
 
 	debug("PLL at %p: fb=%d, ref=%d, pst1=%d, pst2=%d, vco=%u Hz, output=%u Hz\n",
-	      pll, div->fbdiv, div->refdiv, div->postdiv1,
-	      div->postdiv2, vco_hz, output_hz);
+	      pll, rate->fbdiv, rate->refdiv, rate->postdiv1,
+	      rate->postdiv2, vco_hz, output_hz);
 	assert(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ &&
 	       output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ);
 
@@ -110,10 +191,10 @@ static void rkclk_set_pll(struct px30_cru *cru, enum px30_pll_id pll_id,
 
 	rk_clrsetreg(&pll->con0,
 		     PLL_POSTDIV1_MASK | PLL_FBDIV_MASK,
-		     (div->postdiv1 << PLL_POSTDIV1_SHIFT) | div->fbdiv);
+		     (rate->postdiv1 << PLL_POSTDIV1_SHIFT) | rate->fbdiv);
 	rk_clrsetreg(&pll->con1, PLL_POSTDIV2_MASK | PLL_REFDIV_MASK,
-		     (div->postdiv2 << PLL_POSTDIV2_SHIFT |
-		     div->refdiv << PLL_REFDIV_SHIFT));
+		     (rate->postdiv2 << PLL_POSTDIV2_SHIFT |
+		     rate->refdiv << PLL_REFDIV_SHIFT));
 
 	/* Power Up */
 	rk_clrreg(&pll->con1, 1 << PLL_PD_SHIFT);
@@ -125,26 +206,16 @@ static void rkclk_set_pll(struct px30_cru *cru, enum px30_pll_id pll_id,
 	rk_clrsetreg(mode, pll_mode_mask[pll_id],
 		     PLLMUX_FROM_PLL << pll_mode_shift[pll_id]);
 
-	return;
+	return 0;
 }
 
-static uint32_t rkclk_pll_get_rate(struct px30_cru *cru,
+static uint32_t rkclk_pll_get_rate(struct px30_pll *pll, unsigned int *mode,
 				   enum px30_pll_id pll_id)
 {
 	u32 refdiv, fbdiv, postdiv1, postdiv2;
-	u32 con;
-	struct px30_pll *pll;
-	uint shift;
-	uint mask;
-
-	if (pll_id == GPLL) {
-		pll = &cru->gpll;
-		con = readl(&cru->pmu_mode);
-	} else {
-		pll = &cru->pll[pll_id];
-		con = readl(&cru->mode);
-	}
+	u32 con, shift, mask;
 
+	con = readl(mode);
 	shift = pll_mode_shift[pll_id];
 	mask = pll_mode_mask[pll_id];
 
@@ -166,94 +237,9 @@ static uint32_t rkclk_pll_get_rate(struct px30_cru *cru,
 	}
 }
 
-static int pll_para_config(u32 freq_hz, struct pll_div *div)
-{
-	u32 ref_khz = OSC_HZ / KHz, refdiv, fbdiv = 0;
-	u32 postdiv1, postdiv2 = 1;
-	u32 fref_khz;
-	u32 diff_khz, best_diff_khz;
-	const u32 max_refdiv = 63, max_fbdiv = 3200, min_fbdiv = 16;
-	const u32 max_postdiv1 = 7, max_postdiv2 = 7;
-	u32 vco_khz;
-	u32 freq_khz = freq_hz / KHz;
-
-	if (!freq_hz) {
-		printf("%s: the frequency can't be 0 Hz\n", __func__);
-		return -1;
-	}
-
-	postdiv1 = DIV_ROUND_UP(VCO_MIN_HZ / 1000, freq_khz);
-	if (postdiv1 > max_postdiv1) {
-		postdiv2 = DIV_ROUND_UP(postdiv1, max_postdiv1);
-		postdiv1 = DIV_ROUND_UP(postdiv1, postdiv2);
-	}
-
-	vco_khz = freq_khz * postdiv1 * postdiv2;
-
-	if (vco_khz < (VCO_MIN_HZ / KHz) || vco_khz > (VCO_MAX_HZ / KHz) ||
-	    postdiv2 > max_postdiv2) {
-		printf("%s: Cannot find out a supported VCO for Freq (%uHz)\n",
-		       __func__, freq_hz);
-		return -1;
-	}
-
-	div->postdiv1 = postdiv1;
-	div->postdiv2 = postdiv2;
-
-	best_diff_khz = vco_khz;
-	for (refdiv = 1; refdiv < max_refdiv && best_diff_khz; refdiv++) {
-		fref_khz = ref_khz / refdiv;
-
-		fbdiv = vco_khz / fref_khz;
-		if ((fbdiv >= max_fbdiv) || (fbdiv <= min_fbdiv))
-			continue;
-		diff_khz = vco_khz - fbdiv * fref_khz;
-		if (fbdiv + 1 < max_fbdiv && diff_khz > fref_khz / 2) {
-			fbdiv++;
-			diff_khz = fref_khz - diff_khz;
-		}
-
-		if (diff_khz >= best_diff_khz)
-			continue;
-
-		best_diff_khz = diff_khz;
-		div->refdiv = refdiv;
-		div->fbdiv = fbdiv;
-	}
-
-	if (best_diff_khz > 4 * (MHz / KHz)) {
-		printf("%s: Failed to match output frequency %u bestis %u Hz\n",
-		       __func__, freq_hz,
-		       best_diff_khz * KHz);
-		return -1;
-	}
-	return 0;
-}
-
-static void rkclk_init(struct px30_cru *cru)
-{
-	u32 aclk_div;
-
-	/* init pll */
-	rkclk_set_pll(cru, APLL, apll_cfgs[APLL_816_MHZ]);
-	rkclk_set_pll(cru, GPLL, &gpll_init_cfg);
-
-	/*
-	 * select apll as cpu/core clock pll source and
-	 * set up dependent divisors for PERI and ACLK clocks.
-	 * core hz : apll = 1:1
-	 */
-	aclk_div = APLL_HZ / CORE_ACLK_HZ - 1;
-	rk_clrsetreg(&cru->clksel_con[0],
-		     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK |
-		     CORE_ACLK_DIV_MASK,
-		     aclk_div << CORE_ACLK_DIV_SHIFT |
-		     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
-		     0 << CORE_DIV_CON_SHIFT);
-}
-
-static ulong px30_i2c_get_clk(struct px30_cru *cru, ulong clk_id)
+static ulong px30_i2c_get_clk(struct px30_clk_priv *priv, ulong clk_id)
 {
+	struct px30_cru *cru = priv->cru;
 	u32 div, con;
 
 	switch (clk_id) {
@@ -278,14 +264,15 @@ static ulong px30_i2c_get_clk(struct px30_cru *cru, ulong clk_id)
 		return -EINVAL;
 	}
 
-	return DIV_TO_RATE(GPLL_HZ, div);
+	return DIV_TO_RATE(priv->gpll_hz, div);
 }
 
-static ulong px30_i2c_set_clk(struct px30_cru *cru, ulong clk_id, uint hz)
+static ulong px30_i2c_set_clk(struct px30_clk_priv *priv, ulong clk_id, uint hz)
 {
+	struct px30_cru *cru = priv->cru;
 	int src_clk_div;
 
-	src_clk_div = GPLL_HZ / hz;
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
 	assert(src_clk_div - 1 < 127);
 
 	switch (clk_id) {
@@ -322,11 +309,44 @@ static ulong px30_i2c_set_clk(struct px30_cru *cru, ulong clk_id, uint hz)
 		return -EINVAL;
 	}
 
-	return px30_i2c_get_clk(cru, clk_id);
+	return px30_i2c_get_clk(priv, clk_id);
+}
+
+static ulong px30_nandc_get_clk(struct px30_clk_priv *priv)
+{
+	struct px30_cru *cru = priv->cru;
+	u32 div, con;
+
+	con = readl(&cru->clksel_con[15]);
+	div = (con & NANDC_DIV_MASK) >> NANDC_DIV_SHIFT;
+
+	return DIV_TO_RATE(priv->gpll_hz, div) / 2;
+}
+
+static ulong px30_nandc_set_clk(struct px30_clk_priv *priv,
+				ulong set_rate)
+{
+	struct px30_cru *cru = priv->cru;
+	int src_clk_div;
+
+	/* Select nandc source from GPLL by default */
+	/* nandc clock defaulg div 2 internal, need provide double in cru */
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz / 2, set_rate);
+	assert(src_clk_div - 1 < 31);
+
+	rk_clrsetreg(&cru->clksel_con[15],
+		     NANDC_CLK_SEL_MASK | NANDC_PLL_MASK |
+		     NANDC_DIV_MASK,
+		     NANDC_CLK_SEL_NANDC << NANDC_CLK_SEL_SHIFT |
+		     NANDC_SEL_GPLL << NANDC_PLL_SHIFT |
+		     (src_clk_div - 1) << NANDC_DIV_SHIFT);
+
+	return px30_nandc_get_clk(priv);
 }
 
-static ulong px30_mmc_get_clk(struct px30_cru *cru, uint clk_id)
+static ulong px30_mmc_get_clk(struct px30_clk_priv *priv, uint clk_id)
 {
+	struct px30_cru *cru = priv->cru;
 	u32 div, con, con_id;
 
 	switch (clk_id) {
@@ -350,17 +370,17 @@ static ulong px30_mmc_get_clk(struct px30_cru *cru, uint clk_id)
 	    == EMMC_SEL_24M)
 		return DIV_TO_RATE(OSC_HZ, div) / 2;
 	else
-		return DIV_TO_RATE(GPLL_HZ, div) / 2;
+		return DIV_TO_RATE(priv->gpll_hz, div) / 2;
 
 }
 
-static ulong px30_mmc_set_clk(struct px30_cru *cru,
-				ulong clk_id, ulong set_rate)
+static ulong px30_mmc_set_clk(struct px30_clk_priv *priv,
+			      ulong clk_id, ulong set_rate)
 {
+	struct px30_cru *cru = priv->cru;
 	int src_clk_div;
 	u32 con_id;
 
-	debug("%s %ld %ld\n", __func__, clk_id, set_rate);
 	switch (clk_id) {
 	case HCLK_SDMMC:
 	case SCLK_SDMMC:
@@ -373,9 +393,10 @@ static ulong px30_mmc_set_clk(struct px30_cru *cru,
 	default:
 		return -EINVAL;
 	}
+
 	/* Select clk_sdmmc/emmc source from GPLL by default */
 	/* mmc clock defaulg div 2 internal, need provide double in cru */
-	src_clk_div = DIV_ROUND_UP(GPLL_HZ / 2, set_rate);
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz / 2, set_rate);
 
 	if (src_clk_div > 127) {
 		/* use 24MHz source for 400KHz clock */
@@ -393,11 +414,12 @@ static ulong px30_mmc_set_clk(struct px30_cru *cru,
 	rk_clrsetreg(&cru->clksel_con[con_id +1], EMMC_CLK_SEL_MASK,
 		     EMMC_CLK_SEL_EMMC);
 
-	return px30_mmc_get_clk(cru, clk_id);
+	return px30_mmc_get_clk(priv, clk_id);
 }
 
-static ulong px30_pwm_get_clk(struct px30_cru *cru, ulong clk_id)
+static ulong px30_pwm_get_clk(struct px30_clk_priv *priv, ulong clk_id)
 {
+	struct px30_cru *cru = priv->cru;
 	u32 div, con;
 
 	switch (clk_id) {
@@ -414,14 +436,15 @@ static ulong px30_pwm_get_clk(struct px30_cru *cru, ulong clk_id)
 		return -EINVAL;
 	}
 
-	return DIV_TO_RATE(GPLL_HZ, div);
+	return DIV_TO_RATE(priv->gpll_hz, div);
 }
 
-static ulong px30_pwm_set_clk(struct px30_cru *cru, ulong clk_id, uint hz)
+static ulong px30_pwm_set_clk(struct px30_clk_priv *priv, ulong clk_id, uint hz)
 {
+	struct px30_cru *cru = priv->cru;
 	int src_clk_div;
 
-	src_clk_div = GPLL_HZ / hz;
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
 	assert(src_clk_div - 1 < 127);
 
 	switch (clk_id) {
@@ -444,11 +467,12 @@ static ulong px30_pwm_set_clk(struct px30_cru *cru, ulong clk_id, uint hz)
 		return -EINVAL;
 	}
 
-	return px30_pwm_get_clk(cru, clk_id);
+	return px30_pwm_get_clk(priv, clk_id);
 }
 
-static ulong px30_saradc_get_clk(struct px30_cru *cru)
+static ulong px30_saradc_get_clk(struct px30_clk_priv *priv)
 {
+	struct px30_cru *cru = priv->cru;
 	u32 div, con;
 
 	con = readl(&cru->clksel_con[55]);
@@ -457,22 +481,24 @@ static ulong px30_saradc_get_clk(struct px30_cru *cru)
 	return DIV_TO_RATE(OSC_HZ, div);
 }
 
-static ulong px30_saradc_set_clk(struct px30_cru *cru, uint hz)
+static ulong px30_saradc_set_clk(struct px30_clk_priv *priv, uint hz)
 {
+	struct px30_cru *cru = priv->cru;
 	int src_clk_div;
 
-	src_clk_div = OSC_HZ / hz;
+	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz);
 	assert(src_clk_div - 1 < 2047);
 
 	rk_clrsetreg(&cru->clksel_con[55],
 		     CLK_SARADC_DIV_CON_MASK,
 		     (src_clk_div - 1) << CLK_SARADC_DIV_CON_SHIFT);
 
-	return px30_saradc_get_clk(cru);
+	return px30_saradc_get_clk(priv);
 }
 
-static ulong px30_spi_get_clk(struct px30_cru *cru, ulong clk_id)
+static ulong px30_spi_get_clk(struct px30_clk_priv *priv, ulong clk_id)
 {
+	struct px30_cru *cru = priv->cru;
 	u32 div, con;
 
 	switch (clk_id) {
@@ -489,14 +515,15 @@ static ulong px30_spi_get_clk(struct px30_cru *cru, ulong clk_id)
 		return -EINVAL;
 	}
 
-	return DIV_TO_RATE(GPLL_HZ, div);
+	return DIV_TO_RATE(priv->gpll_hz, div);
 }
 
-static ulong px30_spi_set_clk(struct px30_cru *cru, ulong clk_id, uint hz)
+static ulong px30_spi_set_clk(struct px30_clk_priv *priv, ulong clk_id, uint hz)
 {
+	struct px30_cru *cru = priv->cru;
 	int src_clk_div;
 
-	src_clk_div = GPLL_HZ / hz;
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
 	assert(src_clk_div - 1 < 127);
 
 	switch (clk_id) {
@@ -519,23 +546,24 @@ static ulong px30_spi_set_clk(struct px30_cru *cru, ulong clk_id, uint hz)
 		return -EINVAL;
 	}
 
-	return px30_spi_get_clk(cru, clk_id);
+	return px30_spi_get_clk(priv, clk_id);
 }
 
-static ulong px30_vop_get_clk(struct px30_cru *cru, ulong clk_id)
+static ulong px30_vop_get_clk(struct px30_clk_priv *priv, ulong clk_id)
 {
+	struct px30_cru *cru = priv->cru;
 	u32 div, con, parent;
 
 	switch (clk_id) {
 	case ACLK_VOPB:
 		con = readl(&cru->clksel_con[3]);
 		div = con & ACLK_VO_DIV_MASK;
-		parent = GPLL_HZ;
+		parent = priv->gpll_hz;
 		break;
 	case DCLK_VOPB:
 		con = readl(&cru->clksel_con[5]);
 		div = con & DCLK_VOPB_DIV_MASK;
-		parent = rkclk_pll_get_rate(cru, CPLL);
+		parent = rkclk_pll_get_rate(&cru->pll[CPLL], &cru->mode, CPLL);
 		break;
 	default:
 		return -ENOENT;
@@ -544,12 +572,12 @@ static ulong px30_vop_get_clk(struct px30_cru *cru, ulong clk_id)
 	return DIV_TO_RATE(parent, div);
 }
 
-static ulong px30_vop_set_clk(struct px30_cru *cru, ulong clk_id, uint hz)
+static ulong px30_vop_set_clk(struct px30_clk_priv *priv, ulong clk_id, uint hz)
 {
+	struct px30_cru *cru = priv->cru;
 	int src_clk_div;
-	struct pll_div cpll_config = {0};
 
-	src_clk_div = GPLL_HZ / hz;
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
 	assert(src_clk_div - 1 < 31);
 
 	switch (clk_id) {
@@ -564,9 +592,7 @@ static ulong px30_vop_set_clk(struct px30_cru *cru, ulong clk_id, uint hz)
 		 * vopb dclk source from cpll, and equals to
 		 * cpll(means div == 1)
 		 */
-		if (pll_para_config(hz, &cpll_config))
-			return -1;
-		rkclk_set_pll(cru, CPLL, &cpll_config);
+		rkclk_set_pll(&cru->pll[CPLL], &cru->mode, CPLL, hz);
 
 		rk_clrsetreg(&cru->clksel_con[5],
 			     DCLK_VOPB_SEL_MASK | DCLK_VOPB_PLL_SEL_MASK |
@@ -580,26 +606,27 @@ static ulong px30_vop_set_clk(struct px30_cru *cru, ulong clk_id, uint hz)
 		return -EINVAL;
 	}
 
-	return hz;
+	return px30_vop_get_clk(priv, clk_id);
 }
 
-static ulong px30_bus_get_clk(struct px30_cru *cru, ulong clk_id)
+static ulong px30_bus_get_clk(struct px30_clk_priv *priv, ulong clk_id)
 {
+	struct px30_cru *cru = priv->cru;
 	u32 div, con, parent;
 
 	switch (clk_id) {
 	case ACLK_BUS_PRE:
 		con = readl(&cru->clksel_con[23]);
 		div = (con & BUS_ACLK_DIV_MASK) >> BUS_ACLK_DIV_SHIFT;
-		parent = GPLL_HZ;
+		parent = priv->gpll_hz;
 		break;
 	case HCLK_BUS_PRE:
 		con = readl(&cru->clksel_con[24]);
 		div = (con & BUS_HCLK_DIV_MASK) >> BUS_HCLK_DIV_SHIFT;
-		parent = GPLL_HZ;
+		parent = priv->gpll_hz;
 		break;
 	case PCLK_BUS_PRE:
-		parent = px30_bus_get_clk(cru, ACLK_BUS_PRE);
+		parent = px30_bus_get_clk(priv, ACLK_BUS_PRE);
 		con = readl(&cru->clksel_con[24]);
 		div = (con & BUS_PCLK_DIV_MASK) >> BUS_PCLK_DIV_SHIFT;
 		break;
@@ -610,8 +637,10 @@ static ulong px30_bus_get_clk(struct px30_cru *cru, ulong clk_id)
 	return DIV_TO_RATE(parent, div);
 }
 
-static ulong px30_bus_set_clk(struct px30_cru *cru, ulong clk_id, ulong hz)
+static ulong px30_bus_set_clk(struct px30_clk_priv *priv, ulong clk_id,
+			      ulong hz)
 {
+	struct px30_cru *cru = priv->cru;
 	int src_clk_div;
 
 	/*
@@ -620,7 +649,7 @@ static ulong px30_bus_set_clk(struct px30_cru *cru, ulong clk_id, ulong hz)
 	 */
 	switch (clk_id) {
 	case ACLK_BUS_PRE:
-		src_clk_div = GPLL_HZ / hz;
+		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
 		assert(src_clk_div - 1 < 31);
 		rk_clrsetreg(&cru->clksel_con[23],
 			     BUS_PLL_SEL_MASK | BUS_ACLK_DIV_MASK,
@@ -628,7 +657,7 @@ static ulong px30_bus_set_clk(struct px30_cru *cru, ulong clk_id, ulong hz)
 			     (src_clk_div - 1) << BUS_ACLK_DIV_SHIFT);
 		break;
 	case HCLK_BUS_PRE:
-		src_clk_div = GPLL_HZ / hz;
+		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
 		assert(src_clk_div - 1 < 31);
 		rk_clrsetreg(&cru->clksel_con[24],
 			     BUS_PLL_SEL_MASK | BUS_HCLK_DIV_MASK,
@@ -636,7 +665,8 @@ static ulong px30_bus_set_clk(struct px30_cru *cru, ulong clk_id, ulong hz)
 			     (src_clk_div - 1) << BUS_HCLK_DIV_SHIFT);
 		break;
 	case PCLK_BUS_PRE:
-		src_clk_div = px30_bus_get_clk(cru, ACLK_BUS_PRE) / hz;
+		src_clk_div =
+			DIV_ROUND_UP(px30_bus_get_clk(priv, ACLK_BUS_PRE), hz);
 		assert(src_clk_div - 1 < 3);
 		rk_clrsetreg(&cru->clksel_con[24],
 			     BUS_PCLK_DIV_MASK,
@@ -647,23 +677,24 @@ static ulong px30_bus_set_clk(struct px30_cru *cru, ulong clk_id, ulong hz)
 		return -EINVAL;
 	}
 
-	return px30_bus_get_clk(cru, clk_id);
+	return px30_bus_get_clk(priv, clk_id);
 }
 
-static ulong px30_peri_get_clk(struct px30_cru *cru, ulong clk_id)
+static ulong px30_peri_get_clk(struct px30_clk_priv *priv, ulong clk_id)
 {
+	struct px30_cru *cru = priv->cru;
 	u32 div, con, parent;
 
 	switch (clk_id) {
 	case ACLK_PERI_PRE:
 		con = readl(&cru->clksel_con[14]);
 		div = (con & PERI_ACLK_DIV_MASK) >> PERI_ACLK_DIV_SHIFT;
-		parent = GPLL_HZ;
+		parent = priv->gpll_hz;
 		break;
 	case HCLK_PERI_PRE:
 		con = readl(&cru->clksel_con[14]);
 		div = (con & PERI_HCLK_DIV_MASK) >> PERI_HCLK_DIV_SHIFT;
-		parent = GPLL_HZ;
+		parent = priv->gpll_hz;
 		break;
 	default:
 		return -ENOENT;
@@ -672,11 +703,13 @@ static ulong px30_peri_get_clk(struct px30_cru *cru, ulong clk_id)
 	return DIV_TO_RATE(parent, div);
 }
 
-static ulong px30_peri_set_clk(struct px30_cru *cru, ulong clk_id, ulong hz)
+static ulong px30_peri_set_clk(struct px30_clk_priv *priv, ulong clk_id,
+			       ulong hz)
 {
+	struct px30_cru *cru = priv->cru;
 	int src_clk_div;
 
-	src_clk_div = GPLL_HZ / hz;
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
 	assert(src_clk_div - 1 < 31);
 
 	/*
@@ -701,14 +734,46 @@ static ulong px30_peri_set_clk(struct px30_cru *cru, ulong clk_id, ulong hz)
 		return -EINVAL;
 	}
 
-	return px30_peri_get_clk(cru, clk_id);
+	return px30_peri_get_clk(priv, clk_id);
+}
+
+static int px30_clk_get_gpll_rate(ulong *rate)
+{
+	struct udevice *pmucru_dev;
+	struct px30_pmuclk_priv *priv;
+	struct px30_pmucru *pmucru;
+	int ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_CLK,
+					  DM_GET_DRIVER(rockchip_px30_pmucru),
+					  &pmucru_dev);
+	if (ret) {
+		printf("%s: could not find pmucru device\n", __func__);
+		return ret;
+	}
+	priv = dev_get_priv(pmucru_dev);
+	pmucru = priv->pmucru;
+	*rate =  rkclk_pll_get_rate(&pmucru->pll, &pmucru->pmu_mode, GPLL);
+
+	return 0;
 }
 
 static ulong px30_clk_get_rate(struct clk *clk)
 {
 	struct px30_clk_priv *priv = dev_get_priv(clk->dev);
 	ulong rate = 0;
+	int ret;
+
+	if (!priv->gpll_hz) {
+		ret = px30_clk_get_gpll_rate(&priv->gpll_hz);
+		if (ret) {
+			printf("%s failed to get gpll rate\n", __func__);
+			return ret;
+		}
+		debug("%s gpll=%lu\n", __func__, priv->gpll_hz);
+	}
 
+	debug("%s %ld\n", __func__, clk->id);
 	switch (clk->id) {
 	case 0 ... 15:
 		return 0;
@@ -717,37 +782,37 @@ static ulong px30_clk_get_rate(struct clk *clk)
 	case SCLK_SDMMC:
 	case SCLK_EMMC:
 	case SCLK_EMMC_SAMPLE:
-		rate = px30_mmc_get_clk(priv->cru, clk->id);
+		rate = px30_mmc_get_clk(priv, clk->id);
 		break;
 	case SCLK_I2C0:
 	case SCLK_I2C1:
 	case SCLK_I2C2:
 	case SCLK_I2C3:
-		rate = px30_i2c_get_clk(priv->cru, clk->id);
+		rate = px30_i2c_get_clk(priv, clk->id);
 		break;
 	case SCLK_PWM0:
 	case SCLK_PWM1:
-		rate = px30_pwm_get_clk(priv->cru, clk->id);
+		rate = px30_pwm_get_clk(priv, clk->id);
 		break;
 	case SCLK_SARADC:
-		rate = px30_saradc_get_clk(priv->cru);
+		rate = px30_saradc_get_clk(priv);
 		break;
 	case SCLK_SPI0:
 	case SCLK_SPI1:
-		rate = px30_spi_get_clk(priv->cru, clk->id);
+		rate = px30_spi_get_clk(priv, clk->id);
 		break;
 	case ACLK_VOPB:
 	case DCLK_VOPB:
-		rate = px30_vop_get_clk(priv->cru, clk->id);
+		rate = px30_vop_get_clk(priv, clk->id);
 		break;
 	case ACLK_BUS_PRE:
 	case HCLK_BUS_PRE:
 	case PCLK_BUS_PRE:
-		rate = px30_bus_get_clk(priv->cru, clk->id);
+		rate = px30_bus_get_clk(priv, clk->id);
 		break;
 	case ACLK_PERI_PRE:
 	case HCLK_PERI_PRE:
-		rate = px30_peri_get_clk(priv->cru, clk->id);
+		rate = px30_peri_get_clk(priv, clk->id);
 		break;
 	default:
 		return -ENOENT;
@@ -761,6 +826,15 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate)
 	struct px30_clk_priv *priv = dev_get_priv(clk->dev);
 	ulong ret = 0;
 
+	if (!priv->gpll_hz) {
+		ret = px30_clk_get_gpll_rate(&priv->gpll_hz);
+		if (ret) {
+			printf("%s failed to get gpll rate\n", __func__);
+			return ret;
+		}
+		debug("%s gpll=%lu\n", __func__, priv->gpll_hz);
+	}
+
 	debug("%s %ld %ld\n", __func__, clk->id, rate);
 	switch (clk->id) {
 	case 0 ... 15:
@@ -769,37 +843,37 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate)
 	case HCLK_EMMC:
 	case SCLK_SDMMC:
 	case SCLK_EMMC:
-		ret = px30_mmc_set_clk(priv->cru, clk->id, rate);
+		ret = px30_mmc_set_clk(priv, clk->id, rate);
 		break;
 	case SCLK_I2C0:
 	case SCLK_I2C1:
 	case SCLK_I2C2:
 	case SCLK_I2C3:
-		ret = px30_i2c_set_clk(priv->cru, clk->id, rate);
+		ret = px30_i2c_set_clk(priv, clk->id, rate);
 		break;
 	case SCLK_PWM0:
 	case SCLK_PWM1:
-		ret = px30_pwm_set_clk(priv->cru, clk->id, rate);
+		ret = px30_pwm_set_clk(priv, clk->id, rate);
 		break;
 	case SCLK_SARADC:
-		ret = px30_saradc_set_clk(priv->cru, rate);
+		ret = px30_saradc_set_clk(priv, rate);
 		break;
 	case SCLK_SPI0:
 	case SCLK_SPI1:
-		ret = px30_spi_set_clk(priv->cru, clk->id, rate);
+		ret = px30_spi_set_clk(priv, clk->id, rate);
 		break;
 	case ACLK_VOPB:
 	case DCLK_VOPB:
-		ret = px30_vop_set_clk(priv->cru, clk->id, rate);
+		ret = px30_vop_set_clk(priv, clk->id, rate);
 		break;
 	case ACLK_BUS_PRE:
 	case HCLK_BUS_PRE:
 	case PCLK_BUS_PRE:
-		ret = px30_bus_set_clk(priv->cru, clk->id, rate);
+		ret = px30_bus_set_clk(priv, clk->id, rate);
 		break;
 	case ACLK_PERI_PRE:
 	case HCLK_PERI_PRE:
-		ret = px30_peri_set_clk(priv->cru, clk->id, rate);
+		ret = px30_peri_set_clk(priv, clk->id, rate);
 		break;
 	default:
 		return -ENOENT;
@@ -900,7 +974,7 @@ int rockchip_mmc_set_phase(struct clk *clk, u32 degrees)
 static int px30_clk_get_phase(struct clk *clk)
 {
 	int ret;
-
+	debug("%s %ld\n", __func__, clk->id);
 	switch (clk->id) {
 	case SCLK_EMMC_SAMPLE:
 	case SCLK_SDMMC_SAMPLE:
@@ -917,6 +991,7 @@ static int px30_clk_set_phase(struct clk *clk, int degrees)
 {
 	int ret;
 
+	debug("%s %ld\n", __func__, clk->id);
 	switch (clk->id) {
 	case SCLK_EMMC_SAMPLE:
 	case SCLK_SDMMC_SAMPLE:
@@ -939,12 +1014,23 @@ static struct clk_ops px30_clk_ops = {
 static int px30_clk_probe(struct udevice *dev)
 {
 	struct px30_clk_priv *priv = dev_get_priv(dev);
-	u32 reg = readl(&priv->cru->clksel_con[23]);
+	struct px30_cru *cru = priv->cru;
+	u32 aclk_div;
 
-	/* Only do the rkclk_init() one time for boot up */
-	if (((reg & BUS_ACLK_DIV_MASK) >> BUS_ACLK_DIV_SHIFT) !=
-	    (GPLL_HZ / BUS_ACLK_HZ - 1))
-		rkclk_init(priv->cru);
+	/* init pll */
+	rkclk_set_pll(&cru->pll[APLL], &cru->mode, APLL, APLL_HZ);
+	/*
+	 * select apll as cpu/core clock pll source and
+	 * set up dependent divisors for PERI and ACLK clocks.
+	 * core hz : apll = 1:1
+	 */
+	aclk_div = APLL_HZ / CORE_ACLK_HZ - 1;
+	rk_clrsetreg(&cru->clksel_con[0],
+		     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK |
+		     CORE_ACLK_DIV_MASK,
+		     aclk_div << CORE_ACLK_DIV_SHIFT |
+		     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
+		     0 << CORE_DIV_CON_SHIFT);
 
 	return 0;
 }
@@ -1009,3 +1095,171 @@ U_BOOT_DRIVER(rockchip_px30_cru) = {
 	.bind		= px30_clk_bind,
 	.probe		= px30_clk_probe,
 };
+
+static ulong px30_pclk_pmu_get_pmuclk(struct px30_pmuclk_priv *priv)
+{
+	struct px30_pmucru *pmucru = priv->pmucru;
+	u32 div, con;
+
+	con = readl(&pmucru->pmu_clksel_con[0]);
+	div = (con & CLK_PMU_PCLK_DIV_MASK) >> CLK_PMU_PCLK_DIV_SHIFT;
+
+	return DIV_TO_RATE(priv->gpll_hz, div);
+}
+
+static ulong px30_pclk_pmu_set_pmuclk(struct px30_pmuclk_priv *priv, ulong hz)
+{
+	struct px30_pmucru *pmucru = priv->pmucru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+	assert(src_clk_div - 1 < 31);
+
+	rk_clrsetreg(&pmucru->pmu_clksel_con[0],
+		     CLK_PMU_PCLK_DIV_MASK,
+		     (src_clk_div - 1) << CLK_PMU_PCLK_DIV_SHIFT);
+
+	return px30_pclk_pmu_get_pmuclk(priv);
+}
+
+static ulong px30_gpll_get_pmuclk(struct px30_pmuclk_priv *priv)
+{
+	struct px30_pmucru *pmucru = priv->pmucru;
+
+	return rkclk_pll_get_rate(&pmucru->pll, &pmucru->pmu_mode, GPLL);
+}
+
+static ulong px30_gpll_set_pmuclk(struct px30_pmuclk_priv *priv, ulong hz)
+{
+	struct udevice *cru_dev;
+	struct px30_clk_priv *cru_priv;
+	struct px30_pmucru *pmucru = priv->pmucru;
+	u32 div;
+	ulong emmc_rate, sdmmc_rate, nandc_rate;
+	int ret;
+
+	priv->gpll_hz = px30_gpll_get_pmuclk(priv);
+
+	ret = uclass_get_device_by_name(UCLASS_CLK,
+					"clock-controller@ff2b0000",
+					 &cru_dev);
+	if (ret) {
+		printf("%s failed to get cru device\n", __func__);
+		return ret;
+	}
+	cru_priv = dev_get_priv(cru_dev);
+	cru_priv->gpll_hz = priv->gpll_hz;
+
+	div = DIV_ROUND_UP(hz, priv->gpll_hz);
+
+	/*
+	 * avoid bus and peri clock rate too large, reduce rate first.
+	 * they will be assigned by clk_set_defaults.
+	 */
+	px30_bus_set_clk(cru_priv, ACLK_BUS_PRE,
+			 px30_bus_get_clk(cru_priv, ACLK_BUS_PRE) / div);
+	px30_bus_set_clk(cru_priv, HCLK_BUS_PRE,
+			 px30_bus_get_clk(cru_priv, HCLK_BUS_PRE) / div);
+	px30_bus_set_clk(cru_priv, PCLK_BUS_PRE,
+			 px30_bus_get_clk(cru_priv, PCLK_BUS_PRE) / div);
+	px30_peri_set_clk(cru_priv, ACLK_PERI_PRE,
+			  px30_bus_get_clk(cru_priv, ACLK_PERI_PRE) / div);
+	px30_peri_set_clk(cru_priv, HCLK_PERI_PRE,
+			  px30_bus_get_clk(cru_priv, HCLK_PERI_PRE) / div);
+	px30_pclk_pmu_set_pmuclk(priv, px30_pclk_pmu_get_pmuclk(priv) / div);
+
+	/*
+	 * save emmc, sdmmc and nandc clock rate,
+	 * nandc clock rate should less than or equal to 150Mhz.
+	 */
+	emmc_rate = px30_mmc_get_clk(cru_priv, SCLK_EMMC);
+	sdmmc_rate = px30_mmc_get_clk(cru_priv, SCLK_SDMMC);
+	nandc_rate = px30_nandc_get_clk(cru_priv);
+	debug("%s emmc=%lu, sdmmc=%lu, nandc=%lu\n", __func__, emmc_rate,
+	      sdmmc_rate, nandc_rate);
+
+	rkclk_set_pll(&pmucru->pll, &pmucru->pmu_mode, GPLL, hz);
+	priv->gpll_hz = px30_gpll_get_pmuclk(priv);
+	cru_priv->gpll_hz = priv->gpll_hz;
+
+	/* restore emmc, sdmmc and nandc clock rate */
+	px30_mmc_set_clk(cru_priv, SCLK_EMMC, emmc_rate);
+	px30_mmc_set_clk(cru_priv, SCLK_SDMMC, sdmmc_rate);
+	px30_nandc_set_clk(cru_priv, nandc_rate);
+
+	return priv->gpll_hz;
+}
+
+static ulong px30_pmuclk_get_rate(struct clk *clk)
+{
+	struct px30_pmuclk_priv *priv = dev_get_priv(clk->dev);
+	ulong rate = 0;
+
+	debug("%s %ld\n", __func__, clk->id);
+	switch (clk->id) {
+	case PLL_GPLL:
+		rate = px30_gpll_get_pmuclk(priv);
+		break;
+	case PCLK_PMU_PRE:
+		rate = px30_pclk_pmu_get_pmuclk(priv);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return rate;
+}
+
+static ulong px30_pmuclk_set_rate(struct clk *clk, ulong rate)
+{
+	struct px30_pmuclk_priv *priv = dev_get_priv(clk->dev);
+	ulong ret = 0;
+
+	debug("%s %ld %ld\n", __func__, clk->id, rate);
+	switch (clk->id) {
+	case PLL_GPLL:
+		ret = px30_gpll_set_pmuclk(priv, rate);
+		break;
+	case PCLK_PMU_PRE:
+		ret = px30_pclk_pmu_set_pmuclk(priv, rate);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+}
+
+static struct clk_ops px30_pmuclk_ops = {
+	.get_rate = px30_pmuclk_get_rate,
+	.set_rate = px30_pmuclk_set_rate,
+};
+
+static int px30_pmuclk_probe(struct udevice *dev)
+{
+	return 0;
+}
+
+static int px30_pmuclk_ofdata_to_platdata(struct udevice *dev)
+{
+	struct px30_pmuclk_priv *priv = dev_get_priv(dev);
+
+	priv->pmucru = dev_read_addr_ptr(dev);
+
+	return 0;
+}
+
+static const struct udevice_id px30_pmuclk_ids[] = {
+	{ .compatible = "rockchip,px30-pmucru" },
+	{ }
+};
+
+U_BOOT_DRIVER(rockchip_px30_pmucru) = {
+	.name		= "rockchip_px30_pmucru",
+	.id		= UCLASS_CLK,
+	.of_match	= px30_pmuclk_ids,
+	.priv_auto_alloc_size = sizeof(struct px30_pmuclk_priv),
+	.ofdata_to_platdata = px30_pmuclk_ofdata_to_platdata,
+	.ops		= &px30_pmuclk_ops,
+	.probe		= px30_pmuclk_probe,
+};

commit 713d964649c9705b58cf31c8dd37844abe7862f9
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Wed Jun 6 15:08:18 2018 +0800

    core: device_bind_common: remove the same clk device
    
    With kernel dtb support, there are two dtbs and some devices may have
    the same driver and nanme, the api uclass_get_device_by_driver() and
    uclass_get_device_by_name() may get wrong value. In order to use cru
    node in kernel dtb, remove the same device whose node is in u-boot dtb.
    
    Change-Id: Id19eedb276731fa18b07bca51bbc203636f20c31
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/core/device.c b/drivers/core/device.c
index b68b277bd8..f754824c22 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -61,6 +61,16 @@ static int device_bind_common(struct udevice *parent, const struct driver *drv,
 			return 0;
 		}
 	}
+
+	/* use cru node from kernel dtb */
+	if (drv->id == UCLASS_CLK) {
+		struct udevice *n;
+
+		list_for_each_entry_safe(dev, n, &uc->dev_head, uclass_node) {
+			if (!strcmp(name, dev->name))
+				list_del(&dev->uclass_node);
+		}
+	}
 #endif
 	dev = calloc(1, sizeof(struct udevice));
 	if (!dev)

commit da7f6ae0bb45622df167141336514cf95d48fe26
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Tue Jun 5 15:07:31 2018 +0800

    rockchip: dts: px30: enable pmucru in pre-reloc
    
    We will add a pmucru driver for handling some clocks, such as
    PLL_GPLL and PCLK_PMU.
    
    Change-Id: I8fb8979b02c4f3a7c4a6a4d6f20a5ed1bb11dd8d
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/dts/px30-u-boot.dtsi b/arch/arm/dts/px30-u-boot.dtsi
index 2e9ef97d26..865eb8fd94 100644
--- a/arch/arm/dts/px30-u-boot.dtsi
+++ b/arch/arm/dts/px30-u-boot.dtsi
@@ -38,6 +38,10 @@
 	u-boot,dm-pre-reloc;
 };
 
+&pmucru {
+	u-boot,dm-pre-reloc;
+};
+
 &gpio0 {
 	u-boot,dm-pre-reloc;
 	status = "disabled";

commit 7b1c1c4be3bdc441501dcfbfa08d53b38e777147
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Thu Jun 7 11:34:32 2018 +0800

    clk: rockchip: rk3308: check pll rate before set and get rate
    
    As clk_set_defaults() is called before rk3308_clk_probe() and pll rate are
    assigned when clk probe at present, so if enable kernel dtb and it contains
    "assigned-clocks" property, the pll rate will be zero when set and get clk rate.
    In order to fix this, check and assign pll rate before set and get rate.
    
    Change-Id: Ic8e9fcf487e7531a8ef23f54d0786e0cbc9a9f4a
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index 3f5b59ff3f..de0f32459d 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -224,6 +224,16 @@ static uint32_t rkclk_pll_get_rate(struct rk3308_clk_priv *priv,
 	}
 }
 
+static void rk3308_clk_get_pll_rate(struct rk3308_clk_priv *priv)
+{
+	if (!priv->dpll_hz)
+		priv->dpll_hz = rkclk_pll_get_rate(priv, DPLL);
+	if (!priv->vpll0_hz)
+		priv->vpll0_hz = rkclk_pll_get_rate(priv, VPLL0);
+	if (!priv->vpll1_hz)
+		priv->vpll1_hz = rkclk_pll_get_rate(priv, VPLL1);
+}
+
 static void rkclk_init(struct udevice *dev)
 {
 	struct rk3308_clk_priv *priv = dev_get_priv(dev);
@@ -250,9 +260,8 @@ static void rkclk_init(struct udevice *dev)
 		     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
 		     0 << CORE_DIV_CON_SHIFT);
 
-	priv->dpll_hz = rkclk_pll_get_rate(priv, DPLL);
-	priv->vpll0_hz = rkclk_pll_get_rate(priv, VPLL0);
-	priv->vpll1_hz = rkclk_pll_get_rate(priv, VPLL1);
+#ifndef CONFIG_USING_KERNEL_DTB
+	rk3308_clk_get_pll_rate(priv);
 
 	rk3308_bus_set_clk(priv, ACLK_BUS, BUS_ACLK_HZ);
 	rk3308_bus_set_clk(priv, HCLK_BUS, BUS_HCLK_HZ);
@@ -264,6 +273,7 @@ static void rkclk_init(struct udevice *dev)
 
 	rk3308_audio_set_clk(priv, HCLK_AUDIO, AUDIO_HCLK_HZ);
 	rk3308_audio_set_clk(priv, PCLK_AUDIO, AUDIO_PCLK_HZ);
+#endif
 }
 
 static ulong rk3308_i2c_get_clk(struct clk *clk)
@@ -536,13 +546,13 @@ static ulong rk3308_vop_get_clk(struct clk *clk)
 	} else if (vol_sel == DCLK_VOP_SEL_DIVOUT) {
 		switch (pll_sel) {
 		case DCLK_VOP_PLL_SEL_DPLL:
-			parent = rkclk_pll_get_rate(priv, DPLL);
+			parent = priv->dpll_hz;
 			break;
 		case DCLK_VOP_PLL_SEL_VPLL0:
-			parent = rkclk_pll_get_rate(priv, VPLL0);
+			parent = priv->vpll0_hz;
 			break;
 		case DCLK_VOP_PLL_SEL_VPLL1:
-			parent = rkclk_pll_get_rate(priv, VPLL1);
+			parent = priv->vpll0_hz;
 			break;
 		default:
 			printf("do not support this vop pll sel\n");
@@ -797,6 +807,8 @@ static ulong rk3308_clk_get_rate(struct clk *clk)
 	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
 	ulong rate = 0;
 
+	rk3308_clk_get_pll_rate(priv);
+
 	debug("%s id:%ld\n", __func__, clk->id);
 
 	switch (clk->id) {
@@ -864,6 +876,8 @@ static ulong rk3308_clk_set_rate(struct clk *clk, ulong rate)
 	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
 	ulong ret = 0;
 
+	rk3308_clk_get_pll_rate(priv);
+
 	debug("%s %ld %ld\n", __func__, clk->id, rate);
 
 	switch (clk->id) {

commit 6399bf1d8a3df3386bed45a809b3b624d23cbb5a
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Wed Jun 6 21:13:10 2018 +0800

    clk: rockchip: rk3308: update dpll_hz if dpll rate is changed
    
    Change-Id: I133c4c19968de249902db005fea31648bb69a7fc
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index 0a68eff080..3f5b59ff3f 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -869,6 +869,7 @@ static ulong rk3308_clk_set_rate(struct clk *clk, ulong rate)
 	switch (clk->id) {
 	case PLL_DPLL:
 		ret = rkclk_set_pll(priv, DPLL, rate);
+		priv->dpll_hz = rkclk_pll_get_rate(priv, DPLL);
 		break;
 	case HCLK_SDMMC:
 	case HCLK_EMMC:

commit 4e6d575238b8a995b4561fd5dc049fe8abf0bc37
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Wed Jun 6 21:17:46 2018 +0800

    clk: rockchip: rk3308: Fix divisor for i2c, saradc, pwm and spi
    
    Some divisor calculations were misrounded, causing higher than
    requested rates on some clocks. Fix them up using DIV_ROUND_UP.
    
    Change-Id: Ie90598d94e9a8dcde9c68ec9986ea200293c2d5b
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index c1480c4ea2..0a68eff080 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -302,7 +302,7 @@ static ulong rk3308_i2c_set_clk(struct clk *clk, uint hz)
 	struct rk3308_cru *cru = priv->cru;
 	u32 src_clk_div, con_id;
 
-	src_clk_div = priv->dpll_hz / hz;
+	src_clk_div = DIV_ROUND_UP(priv->dpll_hz, hz);
 	assert(src_clk_div - 1 < 127);
 
 	switch (clk->id) {
@@ -422,7 +422,7 @@ static ulong rk3308_saradc_set_clk(struct clk *clk, uint hz)
 	struct rk3308_cru *cru = priv->cru;
 	int src_clk_div;
 
-	src_clk_div = OSC_HZ / hz;
+	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz);
 	assert(src_clk_div - 1 < 2047);
 
 	rk_clrsetreg(&cru->clksel_con[34],
@@ -465,7 +465,7 @@ static ulong rk3308_spi_set_clk(struct clk *clk, uint hz)
 	struct rk3308_cru *cru = priv->cru;
 	u32 src_clk_div, con_id;
 
-	src_clk_div = priv->dpll_hz / hz;
+	src_clk_div = DIV_ROUND_UP(priv->dpll_hz, hz);
 	assert(src_clk_div - 1 < 127);
 
 	switch (clk->id) {
@@ -509,7 +509,7 @@ static ulong rk3308_pwm_set_clk(struct clk *clk, uint hz)
 	struct rk3308_cru *cru = priv->cru;
 	int src_clk_div;
 
-	src_clk_div = priv->dpll_hz / hz;
+	src_clk_div = DIV_ROUND_UP(priv->dpll_hz, hz);
 	assert(src_clk_div - 1 < 127);
 
 	rk_clrsetreg(&cru->clksel_con[29],

commit e8ca712810504151eec022d6044dccf769893622
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Wed Jun 6 21:08:51 2018 +0800

    clk: rockchip: Fix clk name of PLL_DPLL
    
    Change-Id: Id2d9e91917a8011d150f499bfc91eae02e5a0642
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index 0ed825d93b..c1480c4ea2 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -66,7 +66,7 @@ static u32 pll_mode_mask[PLL_COUNT] = {
 
 static const struct rk3308_clk_info clks_dump[] = {
 	RK3308_CLK_DUMP(PLL_APLL, "apll"),
-	RK3308_CLK_DUMP(PLL_DPLL, "gpll"),
+	RK3308_CLK_DUMP(PLL_DPLL, "dpll"),
 	RK3308_CLK_DUMP(PLL_VPLL0, "vpll0"),
 	RK3308_CLK_DUMP(PLL_VPLL1, "vpll1"),
 	RK3308_CLK_DUMP(ACLK_BUS, "aclk_bus"),

commit 471ba803ddc2fe83bb1961dd5140df22fd798603
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Thu Jun 7 08:50:14 2018 +0800

    usb: phy: fixed otg-phy init error for rk3288 platform
    
    The defect was introduced when clean up platform board file in commit
    fc98393 (rockchip: rk3288: use common board file). This change padded
    USB otg-phy private data before otg-phy init to fix it.
    
    Change-Id: I3188a3d04c4ba04435fa279668fc69bac847ba89
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/phy/rockchip_usb2_phy.c b/drivers/usb/phy/rockchip_usb2_phy.c
index 1958478d62..720014a6ce 100644
--- a/drivers/usb/phy/rockchip_usb2_phy.c
+++ b/drivers/usb/phy/rockchip_usb2_phy.c
@@ -5,8 +5,11 @@
  */
 
 #include <common.h>
+#include <asm/arch/clock.h>
 #include <asm/io.h>
+#include <fdtdec.h>
 #include <libfdt.h>
+#include <syscon.h>
 
 #include "../gadget/dwc2_udc_otg_priv.h"
 
@@ -62,6 +65,55 @@ static void property_enable(struct dwc2_plat_otg_data *pdata,
 	writel(val, pdata->regs_phy + reg->offset);
 }
 
+static int otg_phy_parse(struct dwc2_udc *dev)
+{
+	int node, phy_node;
+	u32 grf_base, grf_offset;
+	const char *mode;
+	bool matched = false;
+	const void *blob = gd->fdt_blob;
+	struct dwc2_plat_otg_data *pdata = dev->pdata;
+
+	/* Find the usb_otg node */
+	node = fdt_node_offset_by_compatible(blob, -1, "snps,dwc2");
+	while (node > 0) {
+		mode = fdt_getprop(blob, node, "dr_mode", NULL);
+		if (mode && strcmp(mode, "otg") == 0) {
+			matched = true;
+			break;
+		}
+
+		node = fdt_node_offset_by_compatible(blob, node, "snps,dwc2");
+	}
+
+	if (!matched) {
+		pr_err("Not found usb_otg device\n");
+		return -ENODEV;
+	}
+
+	/* Find the usb phy node */
+	node = fdtdec_lookup_phandle(blob, node, "phys");
+	if (node <= 0) {
+		pr_err("Not found usbphy device\n");
+		return -ENODEV;
+	}
+
+	/* Find the usb otg-phy node */
+	phy_node = fdt_parent_offset(blob, node);
+	if (phy_node <= 0) {
+		pr_err("Not found sub usbphy device\n");
+		return -ENODEV;
+	}
+
+	grf_base = (u32)syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	grf_offset = fdtdec_get_addr(blob, node, "reg");
+
+	/* Pad dwc2_plat_otg_data related to phy */
+	pdata->phy_of_node = phy_node;
+	pdata->regs_phy = grf_base + grf_offset;
+
+	return 0;
+}
 
 void otg_phy_init(struct dwc2_udc *dev)
 {
@@ -70,6 +122,11 @@ void otg_phy_init(struct dwc2_udc *dev)
 	struct rockchip_usb2_phy_dt_id *of_id;
 	int i;
 
+	if (!pdata->regs_phy && otg_phy_parse(dev)) {
+		pr_err("otg-phy parse error\n");
+		return;
+	}
+
 	for (i = 0; i < ARRAY_SIZE(rockchip_usb2_phy_dt_ids); i++) {
 		of_id = &rockchip_usb2_phy_dt_ids[i];
 		if (fdt_node_check_compatible(gd->fdt_blob, pdata->phy_of_node,
@@ -100,6 +157,11 @@ void otg_phy_off(struct dwc2_udc *dev)
 	struct dwc2_plat_otg_data *pdata = dev->pdata;
 	struct rockchip_usb2_phy_cfg *phy_cfg = pdata->priv;
 
+	if (!pdata->regs_phy && otg_phy_parse(dev)) {
+		pr_err("otg-phy parse error\n");
+		return;
+	}
+
 	/* enable software control */
 	property_enable(pdata, &phy_cfg->soft_con, true);
 	/* enter suspend */

commit fb90bd1d33cd8b3820ac6bb6cb948ba116ae89c5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 11 16:46:55 2018 +0800

    make.sh: clean up code
    
    Change-Id: If6379bc4c9c5b177f4997791324ad2665fcb6b11
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index bb062a9310..9eee27c9d5 100755
--- a/make.sh
+++ b/make.sh
@@ -5,29 +5,32 @@ SUBCMD=$2
 RKCHIP=${BOARD##*-}
 RKCHIP=$(echo ${RKCHIP} | tr '[a-z]' '[A-Z]')
 JOB=`sed -n "N;/processor/p" /proc/cpuinfo|wc -l`
-SUPPROT_LIST=`ls configs/*-r[v,k][0-9][0-9][0-9][0-9]_defconfig`
+SUPPROT_LIST=`ls configs/*-[r,p][x,v,k][0-9][0-9]*_defconfig`
 
-# Declare global default output dir and cmd, update in prepare()
-OUTDIR=.
-OUTOPT=
-
-# Declare global rkbin tools and rkbin Responsity path, updated in prepare()
-TOOLCHAIN_RKBIN=./
-RKBIN=./
-# RKTOOL path
+########################################### User can modify #############################################
+# User's rkbin tool relative path
 RKBIN_TOOLS=../rkbin/tools
 
-# Declare global toolchain path for CROSS_COMPILE, updated in select_toolchain()
-TOOLCHAIN_GCC=./
-TOOLCHAIN_OBJDUMP=./
-# GCC toolchain
+# User's GCC toolchain and relative path
+OBJ_ARM32=arm-linux-gnueabihf-objdump
+OBJ_ARM64=aarch64-linux-gnu-objdump
 GCC_ARM32=arm-linux-gnueabihf-
 GCC_ARM64=aarch64-linux-gnu-
 TOOLCHAIN_ARM32=../prebuilts/gcc/linux-x86/arm/gcc-linaro-6.3.1-2017.05-x86_64_arm-linux-gnueabihf/bin
 TOOLCHAIN_ARM64=../prebuilts/gcc/linux-x86/aarch64/gcc-linaro-6.3.1-2017.05-x86_64_aarch64-linux-gnu/bin
-# OBJDMP
-OBJ_ARM32=arm-linux-gnueabihf-objdump
-OBJ_ARM64=aarch64-linux-gnu-objdump
+
+########################################### User not touch #############################################
+# Declare global rkbin RKTOOLS and rkbin repository path, updated in prepare()
+RKTOOLS=
+RKBIN=
+
+# Declare global toolchain path for CROSS_COMPILE, updated in select_toolchain()
+TOOLCHAIN_GCC=
+TOOLCHAIN_OBJDUMP=
+
+# Declare global default output dir and cmd, update in prepare()
+OUTDIR=
+OUTOPT=
 
 # Declare global plaform configure, updated in fixup_platform_configure()
 PLATFORM_RSA=
@@ -35,12 +38,13 @@ PLATFORM_SHA=
 PLATFORM_UBOOT_IMG_SIZE=
 PLATFORM_TRUST_IMG_SIZE=
 PLATFORM_AARCH32=
+#########################################################################################################
 
 prepare()
 {
 	local absolute_path cmd
 
-	# Check invaid args and help
+	# Check invalid args and help
 	if [ "$BOARD" = '--help' -o "$BOARD" = '-h' -o "$BOARD" = '--h' -o "$BOARD" = '' ]; then
 		echo
 		echo "Usage: ./make.sh [board]"
@@ -52,24 +56,24 @@ prepare()
 		echo "Can't find: configs/${BOARD}_defconfig"
 		echo
 		echo "*************** Support list ***************"
-		echo "$SUPPROT_LIST"
+		echo "${SUPPROT_LIST}"
 		echo "********************************************"
 		echo
 		exit 1
 	fi
 
-	# Initialize RKBIN and TOOLCHAIN_RKBIN
+	# Initialize RKBIN and RKTOOLS
 	if [ -d ${RKBIN_TOOLS} ]; then
 		absolute_path=$(cd `dirname ${RKBIN_TOOLS}`; pwd)
 		RKBIN=${absolute_path}
-		TOOLCHAIN_RKBIN=${absolute_path}/tools
+		RKTOOLS=${absolute_path}/tools
 	else
 		echo
-		echo "Can't find '../rkbin/' Responsity, please download it before pack image!"
+		echo "Can't find '../rkbin/' repository, please download it before pack image!"
 		echo "How to obtain? 3 ways:"
-		echo "	1. Login your Rockchip gerrit account: \"Projects\" -> \"List\" -> search \"rk/rkbin\" Responsity"
-		echo "	2. Github Responsity: https://github.com/rockchip-linux/rkbin"
-		echo "	3. Download full release SDK Responsity"
+		echo "	1. Login your Rockchip gerrit account: \"Projects\" -> \"List\" -> search \"rk/rkbin\" repository"
+		echo "	2. Github repository: https://github.com/rockchip-linux/rkbin"
+		echo "	3. Download full release SDK repository"
 		exit 1
 	fi
 
@@ -78,6 +82,8 @@ prepare()
 	if [ "${cmd}" = 'O' ]; then
 		OUTDIR=${SUBCMD#*=}
 		OUTOPT=O=${OUTDIR}
+	else
+		OUTDIR=.
 	fi
 }
 
@@ -108,6 +114,12 @@ select_toolchain()
 	echo "toolchain: ${TOOLCHAIN_GCC}"
 }
 
+# Support subcmd:
+#	./make.sh evb-rk3288 elf	--- dump elf file with -D(default)
+#	./make.sh evb-rk3288 elf-S	--- dump elf file with -S
+#	./make.sh evb-rk3288 trust	--- pack trust.img without compile u-boot
+#	./make.sh evb-rk3288 loader	--- pack loader bin without compile u-boot
+#	./make.sh evb-rk3288 uboot	--- pack uboot.img without compile u-boot
 sub_commands()
 {
 	local elf=${SUBCMD%-*} opt=${SUBCMD#*-}
@@ -131,9 +143,17 @@ sub_commands()
 	elif [ "$SUBCMD" = 'loader' ]; then
 		pack_loader_image
 		exit 0
+	elif [ "$SUBCMD" = 'uboot' ]; then
+		pack_uboot_image
+		exit 0
 	fi
 }
 
+# Support platform special configure
+#	1. fixup chip name;
+#	2. fixup pack mode;
+#	3. fixup image size
+#	4. fixup ARM64 cpu boot with AArch32
 fixup_platform_configure()
 {
 # <1> Fixup chip name for searching trust/loader ini files
@@ -175,8 +195,9 @@ pack_uboot_image()
 	local UBOOT_LOAD_ADDR
 
 	UBOOT_LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
-	${TOOLCHAIN_RKBIN}/loaderimage --pack --uboot ${OUTDIR}/u-boot.bin uboot.img ${UBOOT_LOAD_ADDR} ${PLATFORM_UBOOT_IMG_SIZE}
+	${RKTOOLS}/loaderimage --pack --uboot ${OUTDIR}/u-boot.bin uboot.img ${UBOOT_LOAD_ADDR} ${PLATFORM_UBOOT_IMG_SIZE}
 
+	# Delete u-boot.img and u-boot-dtb.img, which makes users not be confused with final uboot.img
 	if [ -f ${OUTDIR}/u-boot.img ]; then
 		rm ${OUTDIR}/u-boot.img
 	fi
@@ -196,9 +217,8 @@ pack_loader_image()
 	fi
 
 	cd ${RKBIN}
-	${TOOLCHAIN_RKBIN}/boot_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini
-	cd -
-	mv ${RKBIN}/*_loader_*.bin ./
+	${RKTOOLS}/boot_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini
+	cd - && mv ${RKBIN}/*_loader_*.bin ./
 	echo "pack loader okay! Input: ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini"
 }
 
@@ -214,10 +234,9 @@ pack_trust_image()
 		fi
 
 		cd ${RKBIN}
-		${TOOLCHAIN_RKBIN}/trust_merger ${PLATFORM_SHA} ${PLATFORM_RSA} ${PLATFORM_TRUST_IMG_SIZE} --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}${PLATFORM_AARCH32}TRUST.ini
+		${RKTOOLS}/trust_merger ${PLATFORM_SHA} ${PLATFORM_RSA} ${PLATFORM_TRUST_IMG_SIZE} --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}${PLATFORM_AARCH32}TRUST.ini
 
-		cd -
-		mv ${RKBIN}/trust.img ./trust.img
+		cd - && mv ${RKBIN}/trust.img ./trust.img
 		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKCHIP}${PLATFORM_AARCH32}TRUST.ini"
 	# ARM uses loaderimage
 	else
@@ -242,14 +261,14 @@ pack_trust_image()
 		TOS_TA=$(echo ${TOS_TA} | sed "s/tools\/rk_tools\//\.\//g")
 
 		if [ $TOS_TA -a $TOS ]; then
-			${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS} ./trust.img ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
-			${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ./trust_with_ta.img ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
+			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS} ./trust.img ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
+			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ./trust_with_ta.img ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
 			echo "Both trust.img and trust_with_ta.img are ready"
 		elif [ $TOS ]; then
-			${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS} ./trust.img ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
+			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS} ./trust.img ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
 			echo "trust.img is ready"
 		elif [ $TOS_TA ]; then
-			${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ./trust.img ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
+			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ./trust.img ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
 			echo "trust.img with ta is ready"
 		else
 			echo "Can't find any tee bin"

commit 41cf5e5a16714dd40c62cf9540d4f27009cb5a77
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 11 16:11:39 2018 +0800

    make.sh: clean up platform fixup configures
    
    1. move all platform fixup together in fixup_platform_configure();
    2. Support rk3308 build trust.img/uboot.img AArch32 1MB and AArch64 2MB.
    
    Change-Id: I02cf51bc8e01317caee0d6de157d832ef133ab4c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 2490260123..bb062a9310 100755
--- a/make.sh
+++ b/make.sh
@@ -29,6 +29,13 @@ TOOLCHAIN_ARM64=../prebuilts/gcc/linux-x86/aarch64/gcc-linaro-6.3.1-2017.05-x86_
 OBJ_ARM32=arm-linux-gnueabihf-objdump
 OBJ_ARM64=aarch64-linux-gnu-objdump
 
+# Declare global plaform configure, updated in fixup_platform_configure()
+PLATFORM_RSA=
+PLATFORM_SHA=
+PLATFORM_UBOOT_IMG_SIZE=
+PLATFORM_TRUST_IMG_SIZE=
+PLATFORM_AARCH32=
+
 prepare()
 {
 	local absolute_path cmd
@@ -127,11 +134,40 @@ sub_commands()
 	fi
 }
 
-fixup_chip_name()
+fixup_platform_configure()
 {
+# <1> Fixup chip name for searching trust/loader ini files
 	if [ "$RKCHIP" = 'RK3228' -o "$RKCHIP" = 'RK3229' ]; then
 		RKCHIP=RK322X
 	fi
+
+# <2> Fixup rsa/sha pack mode for platforms
+	# RK3308/PX30/RK3326 use RSA-PKCS1 V2.1, it's pack magic is "3"
+	if [ $RKCHIP = "PX30" -o $RKCHIP = "RK3326" -o $RKCHIP = "RK3308" ]; then
+		PLATFORM_RSA="--rsa 3"
+	# RK3368 use rk big endian SHA256, it's pack magic is "2"
+	elif [ $RKCHIP = "RK3368" ]; then
+		PLATFORM_SHA="--sha 2"
+	# other platforms use default configure
+	fi
+
+# <3> Fixup images size pack for platforms
+	if [ $RKCHIP = "RK3308" ]; then
+		if grep -q '^CONFIG_ARM64_BOOT_AARCH32=y' ${OUTDIR}/.config ; then
+			PLATFORM_UBOOT_IMG_SIZE="--size 512 2"
+			PLATFORM_TRUST_IMG_SIZE="--size 512 2"
+		else
+			PLATFORM_UBOOT_IMG_SIZE="--size 1024 2"
+			PLATFORM_TRUST_IMG_SIZE="--size 1024 2"
+		fi
+	fi
+
+# <4> Fixup PLATFORM_AARCH32 for ARM64 cpu platforms
+	if [ $RKCHIP = "RK3308" ]; then
+		if grep -q '^CONFIG_ARM64_BOOT_AARCH32=y' ${OUTDIR}/.config ; then
+			PLATFORM_AARCH32="AARCH32"
+		fi
+	fi
 }
 
 pack_uboot_image()
@@ -139,7 +175,7 @@ pack_uboot_image()
 	local UBOOT_LOAD_ADDR
 
 	UBOOT_LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
-	${TOOLCHAIN_RKBIN}/loaderimage --pack --uboot ${OUTDIR}/u-boot.bin uboot.img ${UBOOT_LOAD_ADDR}
+	${TOOLCHAIN_RKBIN}/loaderimage --pack --uboot ${OUTDIR}/u-boot.bin uboot.img ${UBOOT_LOAD_ADDR} ${PLATFORM_UBOOT_IMG_SIZE}
 
 	if [ -f ${OUTDIR}/u-boot.img ]; then
 		rm ${OUTDIR}/u-boot.img
@@ -168,34 +204,21 @@ pack_loader_image()
 
 pack_trust_image()
 {
-	local TOS TOS_TA DARM_BASE TEE_LOAD_ADDR TEE_OFFSET=0x8400000 AARCH32
+	local TOS TOS_TA DARM_BASE TEE_LOAD_ADDR TEE_OFFSET=0x8400000
 
 	# ARM64 uses trust_merger
 	if grep -Eq ''^CONFIG_ARM64=y'|'^CONFIG_ARM64_BOOT_AARCH32=y'' ${OUTDIR}/.config ; then
-		if grep -q '^CONFIG_ARM64_BOOT_AARCH32=y' ${OUTDIR}/.config ; then
-			AARCH32=AARCH32
-		fi
-
-		if [ ! -f ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini ]; then
-			echo "pack trust failed! Can't find: ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini"
+		if [ ! -f ${RKBIN}/RKTRUST/${RKCHIP}${PLATFORM_AARCH32}TRUST.ini ]; then
+			echo "pack trust failed! Can't find: ${RKBIN}/RKTRUST/${RKCHIP}${PLATFORM_AARCH32}TRUST.ini"
 			return
 		fi
 
 		cd ${RKBIN}
-
-		# RK3308/PX30/RK3326 use RSA-PKCS1 V2.1, it's pack magic is "3"
-		if [ $RKCHIP = "PX30" -o $RKCHIP = "RK3326" -o $RKCHIP = "RK3308" ]; then
-			${TOOLCHAIN_RKBIN}/trust_merger --rsa 3 --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}${AARCH32}TRUST.ini
-		# RK3368 use rk big endian SHA256, it's pack magic is "2"
-		elif [ $RKCHIP = "RK3368" ]; then
-			${TOOLCHAIN_RKBIN}/trust_merger --sha 2 --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}${AARCH32}TRUST.ini
-		else
-			${TOOLCHAIN_RKBIN}/trust_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}${AARCH32}TRUST.ini
-		fi
+		${TOOLCHAIN_RKBIN}/trust_merger ${PLATFORM_SHA} ${PLATFORM_RSA} ${PLATFORM_TRUST_IMG_SIZE} --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}${PLATFORM_AARCH32}TRUST.ini
 
 		cd -
 		mv ${RKBIN}/trust.img ./trust.img
-		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKCHIP}${AARCH32}TRUST.ini"
+		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKCHIP}${PLATFORM_AARCH32}TRUST.ini"
 	# ARM uses loaderimage
 	else
 		if [ ! -f ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini ]; then
@@ -219,14 +242,14 @@ pack_trust_image()
 		TOS_TA=$(echo ${TOS_TA} | sed "s/tools\/rk_tools\//\.\//g")
 
 		if [ $TOS_TA -a $TOS ]; then
-			${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS} ./trust.img ${TEE_LOAD_ADDR}
-			${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ./trust_with_ta.img ${TEE_LOAD_ADDR}
+			${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS} ./trust.img ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
+			${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ./trust_with_ta.img ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
 			echo "Both trust.img and trust_with_ta.img are ready"
 		elif [ $TOS ]; then
-			${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS} ./trust.img ${TEE_LOAD_ADDR}
+			${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS} ./trust.img ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
 			echo "trust.img is ready"
 		elif [ $TOS_TA ]; then
-			${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ./trust.img ${TEE_LOAD_ADDR}
+			${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ./trust.img ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
 			echo "trust.img with ta is ready"
 		else
 			echo "Can't find any tee bin"
@@ -241,7 +264,7 @@ prepare
 echo "make for ${BOARD}_defconfig by -j${JOB}"
 make ${BOARD}_defconfig ${OUTOPT}
 select_toolchain
-fixup_chip_name
+fixup_platform_configure
 sub_commands
 make CROSS_COMPILE=${TOOLCHAIN_GCC}  all --jobs=${JOB} ${OUTOPT}
 pack_uboot_image

commit a64486b5426a52b10c3c8d4f9b24fbb06fb1322d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 11 14:48:20 2018 +0800

    Revert "make.sh: support rk312x trust.img pack"
    
    This reverts commit b45ec7ccd833efcd005fe4a9630a532d0341cf65.
    
    Due to commit d77daa4 in rkbin project, which supports muitiple filesystem,
    so we don't need this patch any more.
    
    Change-Id: I73fab6f865a8428c9ecf41406fd5bbeffe6920cc
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index d6f1c41ae9..2490260123 100755
--- a/make.sh
+++ b/make.sh
@@ -166,47 +166,6 @@ pack_loader_image()
 	echo "pack loader okay! Input: ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini"
 }
 
-pack_mass_trust_image()
-{
-	local TOS0 TOS1 IMG0 IMG1 DARM_BASE TEE_LOAD_ADDR TEE_OFFSET=0x8400000
-
-	TOS0=`sed -n "/TOS0=/s/TOS0=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
-	TOS1=`sed -n "/TOS1=/s/TOS1=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
-	IMG0=`sed -n "/PATH0=/s/PATH0=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
-	IMG1=`sed -n "/PATH1=/s/PATH1=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
-
-# OP-TEE is 132M(0x8400000) offset from DRAM base.
-	DARM_BASE=`sed -n "/CONFIG_SYS_SDRAM_BASE=/s/CONFIG_SYS_SDRAM_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
-	TEE_LOAD_ADDR=$((DARM_BASE+TEE_OFFSET))
-
-# Convert Dec to Hex
-	TEE_LOAD_ADDR=$(echo "obase=16;${TEE_LOAD_ADDR}"|bc)
-
-# Parse orignal path
-	TOS0=`sed -n "/TOS0=/s/TOS0=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
-	TOS1=`sed -n "/TOS1=/s/TOS1=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
-	IMG0=`sed -n "/PATH0=/s/PATH0=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
-	IMG1=`sed -n "/PATH1=/s/PATH1=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
-
-# replace "./tools/rk_tools/" with "./" to compatible legacy ini content of rkdevelop branch
-	TOS0=$(echo ${TOS0} | sed "s/tools\/rk_tools\//\.\//g")
-	TOS1=$(echo ${TOS1} | sed "s/tools\/rk_tools\//\.\//g")
-
-	if [ "$TOS0" ]; then
-		${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS0} ./${IMG0} ${TEE_LOAD_ADDR}
-		echo "${IMG0} is ready"
-	fi
-
-	if [ "$TOS1" ]; then
-		${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS1} ./${IMG1} ${TEE_LOAD_ADDR}
-		echo "${IMG1} is ready"
-	fi
-
-	if [ -z "$TOS0" -a -z "$TOS1" ]; then
-		echo "pack trust failed! Can't find any tee bin"
-	fi
-}
-
 pack_trust_image()
 {
 	local TOS TOS_TA DARM_BASE TEE_LOAD_ADDR TEE_OFFSET=0x8400000 AARCH32
@@ -259,7 +218,7 @@ pack_trust_image()
 		TOS=$(echo ${TOS} | sed "s/tools\/rk_tools\//\.\//g")
 		TOS_TA=$(echo ${TOS_TA} | sed "s/tools\/rk_tools\//\.\//g")
 
-		if [ "$TOS_TA" -a "$TOS" ]; then
+		if [ $TOS_TA -a $TOS ]; then
 			${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS} ./trust.img ${TEE_LOAD_ADDR}
 			${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ./trust_with_ta.img ${TEE_LOAD_ADDR}
 			echo "Both trust.img and trust_with_ta.img are ready"
@@ -270,8 +229,8 @@ pack_trust_image()
 			${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ./trust.img ${TEE_LOAD_ADDR}
 			echo "trust.img with ta is ready"
 		else
-			# Only RK312X need it to pack trust_emmc.img trust_nand.img
-			pack_mass_trust_image
+			echo "Can't find any tee bin"
+			exit 1
 		fi
 
 		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini"

commit c563adc74ed429641f937ead6730be016f4b56ad
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jun 7 12:01:09 2018 +0800

    rockchip: add interrupt debugger to dump pt_regs
    
    We install a timer interrupt and dump pt_regs when
    the timeout event trigger. This help us to know cpu
    state when system hang.
    
    Change-Id: I91aa2322036ae83ac8b9cd299bef9b521995d85b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 4501d4d6b3..839c2b18f6 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -424,6 +424,14 @@ config ROCKCHIP_SMCCC
 	help
 	  This enable support for Rockchip SMC calls
 
+config ROCKCHIP_DEBUGGER
+	bool "Rockchip debugger"
+	depends on IRQ
+	help
+	  This enable support for Rockchip debugger. Now we install a timer interrupt
+	  and dump pt_regs when the timeout event trigger. This helps us to know cpu
+	  state when system hang.
+
 config GICV2
 	bool "ARM GICv2"
 
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index de4faf2fa9..1cc2cc35e7 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -28,6 +28,7 @@ obj-$(CONFIG_ROCKCHIP_CRC) += rockchip_crc.o
 obj-$(CONFIG_ROCKCHIP_SMCCC) += rockchip_smccc.o
 obj-$(CONFIG_ROCKCHIP_VENDOR_PARTITION) += vendor.o
 obj-$(CONFIG_ROCKCHIP_RESOURCE_IMAGE) += resource_img.o
+obj-$(CONFIG_ROCKCHIP_DEBUGGER) += rockchip_debugger.o
 endif
 
 obj-$(CONFIG_$(SPL_TPL_)RAM) += sdram_common.o
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index beb476a0c1..e4ed09dabe 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -25,6 +25,9 @@
 #ifdef CONFIG_DRM_ROCKCHIP
 #include <video_rockchip.h>
 #endif
+#ifdef CONFIG_ROCKCHIP_DEBUGGER
+#include <rockchip_debugger.h>
+#endif
 #include <mmc.h>
 #include <of_live.h>
 #include <dm/root.h>
@@ -234,6 +237,16 @@ int board_init(void)
 	return rk_board_init();
 }
 
+int interrupt_debugger_init(void)
+{
+	int ret = 0;
+
+#ifdef CONFIG_ROCKCHIP_DEBUGGER
+	ret = rockchip_debugger_init();
+#endif
+	return ret;
+}
+
 int board_fdt_fixup(void *blob)
 {
 	__maybe_unused int ret = 0;
diff --git a/arch/arm/mach-rockchip/rockchip_debugger.c b/arch/arm/mach-rockchip/rockchip_debugger.c
new file mode 100644
index 0000000000..f9c0b1a95e
--- /dev/null
+++ b/arch/arm/mach-rockchip/rockchip_debugger.c
@@ -0,0 +1,48 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <asm/io.h>
+#include <common.h>
+#include <irq-generic.h>
+#include <rk_timer_irq.h>
+
+/*
+ * Currently, we support a timer timeout to generate a IRQ to dump cpu context.
+ */
+#define ROCKCHIP_DEBUGGER_TIMEOUT	5	/* seconds */
+
+static void rockchip_debugger_isr(int irq, void *data)
+{
+	writel(TIMER_CLR_INT, TIMER_BASE + TIMER_INTSTATUS);
+}
+
+int rockchip_debugger_init(void)
+{
+	uint32_t load_count0, load_count1;
+	uint64_t delay_c = ROCKCHIP_DEBUGGER_TIMEOUT * COUNTER_FREQUENCY;
+
+	if (!delay_c)
+		return 0;
+
+	printf("Enable rockchip debugger\n");
+
+	/* Disable first */
+	writel(0, TIMER_BASE + TIMER_CTRL);
+
+	/* Config */
+	load_count0 = (uint32_t)(delay_c);
+	load_count1 = (uint32_t)(delay_c >> 32);
+	writel(load_count0, TIMER_BASE + TIMER_LOAD_COUNT0);
+	writel(load_count1, TIMER_BASE + TIMER_LOAD_COUNT1);
+	writel(TIMER_CLR_INT, TIMER_BASE + TIMER_INTSTATUS);
+	writel(TIMER_EN | TIMER_INT_EN, TIMER_BASE + TIMER_CTRL);
+
+	/* Request irq */
+	irq_install_handler(TIMER_IRQ, rockchip_debugger_isr, NULL);
+	irq_handler_enable(TIMER_IRQ);
+
+	return 0;
+}
diff --git a/drivers/irq/irq-generic.c b/drivers/irq/irq-generic.c
index 593a122e74..9bf3d6411f 100644
--- a/drivers/irq/irq-generic.c
+++ b/drivers/irq/irq-generic.c
@@ -243,6 +243,11 @@ static int cpu_local_irq_disable(void)
 
 void do_irq(struct pt_regs *pt_regs, unsigned int esr)
 {
+#ifdef CONFIG_ROCKCHIP_DEBUGGER
+	printf("\n>>> Rockchip Debugger:\n");
+	show_regs(pt_regs);
+#endif
+
 	_do_generic_irq_handler();
 }
 #else
@@ -272,6 +277,11 @@ static int cpu_local_irq_disable(void)
 
 void do_irq(struct pt_regs *pt_regs)
 {
+#ifdef CONFIG_ROCKCHIP_DEBUGGER
+	printf("\n>>> Rockchp Debugger:\n");
+	show_regs(pt_regs);
+#endif
+
 	_do_generic_irq_handler();
 }
 #endif
diff --git a/include/rockchip_debugger.h b/include/rockchip_debugger.h
new file mode 100644
index 0000000000..c64f98e719
--- /dev/null
+++ b/include/rockchip_debugger.h
@@ -0,0 +1,12 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _ROCKCHIP_DEBUGGER_H_
+#define _ROCKCHIP_DEBUGGER_H_
+
+int rockchip_debugger_init(void);
+
+#endif

commit 7f571427efa668c12c58532f754dbd5869e3087f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jun 7 11:57:26 2018 +0800

    board_r: add interrupt_debugger_init()
    
    provide for platforms to override as early as possible since
    interrupt is ready.
    
    Change-Id: I803620b71c3f1559e79074c03bee36a84f1ebc1c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/board_r.c b/common/board_r.c
index 6c4256a723..e8ca37294e 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -652,6 +652,11 @@ static int initr_kbd(void)
 }
 #endif
 
+__weak int interrupt_debugger_init(void)
+{
+	return 0;
+}
+
 static int run_main_loop(void)
 {
 #ifdef CONFIG_SANDBOX
@@ -703,6 +708,7 @@ static init_fnc_t init_sequence_r[] = {
 #ifdef CONFIG_ARM
 	initr_enable_interrupts,
 #endif
+	interrupt_debugger_init,
 
 #ifdef CONFIG_OF_LIVE
 	initr_of_live,

commit ab608f806ee1d7fa63a18cc035e8ea62b67634e5
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jun 11 16:52:48 2018 +0800

    lib: avb: update avb source code
    
    according to google lib avb
    commit id: 44e07124afb1f46af0d745d83481f49c482900b1
    
    Change-Id: Ie59a7265699e3e6b1673bb64da6d1c7a1e7b6201
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/android_avb/avb_ab_flow.h b/include/android_avb/avb_ab_flow.h
old mode 100644
new mode 100755
diff --git a/include/android_avb/avb_ab_ops.h b/include/android_avb/avb_ab_ops.h
old mode 100644
new mode 100755
diff --git a/include/android_avb/avb_atx_ops.h b/include/android_avb/avb_atx_ops.h
old mode 100644
new mode 100755
index 726dd6a8a1..a7da29a7dd
--- a/include/android_avb/avb_atx_ops.h
+++ b/include/android_avb/avb_atx_ops.h
@@ -68,6 +68,15 @@ struct AvbAtxOps {
   void (*set_key_version)(AvbAtxOps* atx_ops,
                           size_t rollback_index_location,
                           uint64_t key_version);
+
+  /* Generates |num_bytes| random bytes and stores them in |output|,
+   * which must point to a buffer large enough to store the bytes.
+   *
+   * Returns AVB_IO_RESULT_OK on success, otherwise an error code.
+   */
+  AvbIOResult (*get_random)(AvbAtxOps* atx_ops,
+                            size_t num_bytes,
+                            uint8_t* output);
 };
 
 #ifdef __cplusplus
diff --git a/include/android_avb/avb_atx_types.h b/include/android_avb/avb_atx_types.h
old mode 100644
new mode 100755
index 9b1c36a3c3..6985ac0be8
--- a/include/android_avb/avb_atx_types.h
+++ b/include/android_avb/avb_atx_types.h
@@ -41,6 +41,9 @@ extern "C" {
 /* Size in bytes of an Android Things product ID. */
 #define AVB_ATX_PRODUCT_ID_SIZE 16
 
+/* Size in bytes of an Android Things unlock challenge. */
+#define AVB_ATX_UNLOCK_CHALLENGE_SIZE 16
+
 /* Size in bytes of a serialized public key with a 4096-bit modulus. */
 #define AVB_ATX_PUBLIC_KEY_SIZE (sizeof(AvbRSAPublicKeyHeader) + 1024)
 
@@ -73,6 +76,21 @@ typedef struct AvbAtxPublicKeyMetadata {
   AvbAtxCertificate product_signing_key_certificate;
 } AVB_ATTR_PACKED AvbAtxPublicKeyMetadata;
 
+/* Data structure of an Android Things unlock challenge. */
+typedef struct AvbAtxUnlockChallenge {
+  uint32_t version;
+  uint8_t product_id_hash[AVB_SHA256_DIGEST_SIZE];
+  uint8_t challenge[AVB_ATX_UNLOCK_CHALLENGE_SIZE];
+} AVB_ATTR_PACKED AvbAtxUnlockChallenge;
+
+/* Data structure of an Android Things unlock credential. */
+typedef struct AvbAtxUnlockCredential {
+  uint32_t version;
+  AvbAtxCertificate product_intermediate_key_certificate;
+  AvbAtxCertificate product_unlock_key_certificate;
+  uint8_t challenge_signature[AVB_RSA4096_NUM_BYTES];
+} AVB_ATTR_PACKED AvbAtxUnlockCredential;
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/include/android_avb/avb_atx_validate.h b/include/android_avb/avb_atx_validate.h
old mode 100644
new mode 100755
index 9989bb1ddb..8f784cd466
--- a/include/android_avb/avb_atx_validate.h
+++ b/include/android_avb/avb_atx_validate.h
@@ -72,6 +72,20 @@ AvbIOResult avb_atx_validate_vbmeta_public_key(
     size_t public_key_metadata_length,
     bool* out_is_trusted);
 
+/* Generates a challenge which can be used to create an unlock credential. */
+AvbIOResult avb_atx_generate_unlock_challenge(
+    AvbAtxOps* atx_ops, AvbAtxUnlockChallenge* out_unlock_challenge);
+
+/* Validates an unlock credential. The certificate validation is very similar to
+ * the validation of public key metadata except in place of the PSK is a Product
+ * Unlock Key (PUK) and the certificate usage field identifies it as such. The
+ * challenge signature field is verified against this PUK.
+ */
+AvbIOResult avb_atx_validate_unlock_credential(
+    AvbAtxOps* atx_ops,
+    const AvbAtxUnlockCredential* unlock_credential,
+    bool* out_is_trusted);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/include/android_avb/avb_chain_partition_descriptor.h b/include/android_avb/avb_chain_partition_descriptor.h
old mode 100644
new mode 100755
diff --git a/include/android_avb/avb_cmdline.h b/include/android_avb/avb_cmdline.h
old mode 100644
new mode 100755
index 717381a3f4..8e5caf61b0
--- a/include/android_avb/avb_cmdline.h
+++ b/include/android_avb/avb_cmdline.h
@@ -45,12 +45,24 @@
  */
 #define AVB_PART_NAME_MAX_SIZE 32
 
+#define AVB_MAX_NUM_CMDLINE_SUBST 10
+
+/* Holds information about command-line substitutions. */
+typedef struct AvbCmdlineSubstList {
+  size_t size;
+  char* tokens[AVB_MAX_NUM_CMDLINE_SUBST];
+  char* values[AVB_MAX_NUM_CMDLINE_SUBST];
+} AvbCmdlineSubstList;
+
 /* Substitutes all variables (e.g. $(ANDROID_SYSTEM_PARTUUID)) with
  * values. Returns NULL on OOM, otherwise the cmdline with values
  * replaced.
  */
-char* avb_sub_cmdline(AvbOps* ops, const char* cmdline, const char* ab_suffix,
-                      bool using_boot_for_vbmeta);
+char* avb_sub_cmdline(AvbOps* ops,
+                      const char* cmdline,
+                      const char* ab_suffix,
+                      bool using_boot_for_vbmeta,
+                      const AvbCmdlineSubstList* additional_substitutions);
 
 AvbSlotVerifyResult avb_append_options(
     AvbOps* ops,
@@ -59,4 +71,24 @@ AvbSlotVerifyResult avb_append_options(
     AvbAlgorithmType algorithm_type,
     AvbHashtreeErrorMode hashtree_error_mode);
 
+/* Allocates and initializes a new command line substitution list. Free with
+ * |avb_free_cmdline_subst_list|.
+ */
+AvbCmdlineSubstList* avb_new_cmdline_subst_list(void);
+
+/* Use this instead of |avb_free| to deallocate a AvbCmdlineSubstList. */
+void avb_free_cmdline_subst_list(AvbCmdlineSubstList* cmdline_subst);
+
+/* Adds a hashtree root digest to be substituted in $(AVB_*_ROOT_DIGEST)
+ * variables. The partition name differentiates the variable. For example, if
+ * |part_name| is "foo" then $(AVB_FOO_ROOT_DIGEST) will be substituted with the
+ * hex encoding of the digest. The substitution will be added to
+ * |out_cmdline_subst|. Returns AVB_SLOT_VERIFY_RESULT_OK on success.
+ */
+AvbSlotVerifyResult avb_add_root_digest_substitution(
+    const char* part_name,
+    const uint8_t* digest,
+    size_t digest_size,
+    AvbCmdlineSubstList* out_cmdline_subst);
+
 #endif
diff --git a/include/android_avb/avb_crypto.h b/include/android_avb/avb_crypto.h
old mode 100644
new mode 100755
index b99a905d70..258a938093
--- a/include/android_avb/avb_crypto.h
+++ b/include/android_avb/avb_crypto.h
@@ -46,12 +46,21 @@ extern "C" {
 /* Size of a RSA-8192 signature. */
 #define AVB_RSA8192_NUM_BYTES 1024
 
+/* Size in bytes of a SHA-1 digest. */
+#define AVB_SHA1_DIGEST_SIZE 20
+
 /* Size in bytes of a SHA-256 digest. */
 #define AVB_SHA256_DIGEST_SIZE 32
 
 /* Size in bytes of a SHA-512 digest. */
 #define AVB_SHA512_DIGEST_SIZE 64
 
+/* Possible digest types supported by libavb routines. */
+typedef enum {
+  AVB_DIGEST_TYPE_SHA256,
+  AVB_DIGEST_TYPE_SHA512,
+} AvbDigestType;
+
 /* Algorithms that can be used in the vbmeta image for
  * verification. An algorithm consists of a hash type and a signature
  * type.
diff --git a/include/android_avb/avb_descriptor.h b/include/android_avb/avb_descriptor.h
old mode 100644
new mode 100755
diff --git a/include/android_avb/avb_footer.h b/include/android_avb/avb_footer.h
old mode 100644
new mode 100755
diff --git a/include/android_avb/avb_hash_descriptor.h b/include/android_avb/avb_hash_descriptor.h
old mode 100644
new mode 100755
index ef3f27117a..633b2691de
--- a/include/android_avb/avb_hash_descriptor.h
+++ b/include/android_avb/avb_hash_descriptor.h
@@ -37,6 +37,16 @@
 extern "C" {
 #endif
 
+/* Flags for hash descriptors.
+ *
+ * AVB_HASH_DESCRIPTOR_FLAGS_DO_NOT_USE_AB: Do not apply the default A/B
+ *   partition logic to this partition. This is intentionally a negative boolean
+ *   because A/B should be both the default and most used in practice.
+ */
+typedef enum {
+  AVB_HASH_DESCRIPTOR_FLAGS_DO_NOT_USE_AB = (1 << 0),
+} AvbHashDescriptorFlags;
+
 /* A descriptor containing information about hash for an image.
  *
  * This descriptor is typically used for boot partitions to verify the
@@ -48,6 +58,10 @@ extern "C" {
  *
  * The |reserved| field is for future expansion and must be set to NUL
  * bytes.
+ *
+ * Changes in v1.1:
+ *   - flags field is added which supports AVB_HASH_DESCRIPTOR_FLAGS_USE_AB
+ *   - digest_len may be zero, which indicates the use of a persistent digest
  */
 typedef struct AvbHashDescriptor {
   AvbDescriptor parent_descriptor;
@@ -56,7 +70,8 @@ typedef struct AvbHashDescriptor {
   uint32_t partition_name_len;
   uint32_t salt_len;
   uint32_t digest_len;
-  uint8_t reserved[64];
+  uint32_t flags;
+  uint8_t reserved[60];
 } AVB_ATTR_PACKED AvbHashDescriptor;
 
 /* Copies |src| to |dest| and validates, byte-swapping fields in the
diff --git a/include/android_avb/avb_hashtree_descriptor.h b/include/android_avb/avb_hashtree_descriptor.h
old mode 100644
new mode 100755
index d579275e73..e447ebf8aa
--- a/include/android_avb/avb_hashtree_descriptor.h
+++ b/include/android_avb/avb_hashtree_descriptor.h
@@ -37,6 +37,16 @@
 extern "C" {
 #endif
 
+/* Flags for hashtree descriptors.
+ *
+ * AVB_HASHTREE_DESCRIPTOR_FLAGS_DO_NOT_USE_AB: Do not apply the default A/B
+ *   partition logic to this partition. This is intentionally a negative boolean
+ *   because A/B should be both the default and most used in practice.
+ */
+typedef enum {
+  AVB_HASHTREE_DESCRIPTOR_FLAGS_DO_NOT_USE_AB = (1 << 0),
+} AvbHashtreeDescriptorFlags;
+
 /* A descriptor containing information about a dm-verity hashtree.
  *
  * Hash-trees are used to verify large partitions typically containing
@@ -50,6 +60,10 @@ extern "C" {
  *
  * The |reserved| field is for future expansion and must be set to NUL
  * bytes.
+ *
+ * Changes in v1.1:
+ *   - flags field is added which supports AVB_HASHTREE_DESCRIPTOR_FLAGS_USE_AB
+ *   - digest_len may be zero, which indicates the use of a persistent digest
  */
 typedef struct AvbHashtreeDescriptor {
   AvbDescriptor parent_descriptor;
@@ -66,7 +80,8 @@ typedef struct AvbHashtreeDescriptor {
   uint32_t partition_name_len;
   uint32_t salt_len;
   uint32_t root_digest_len;
-  uint8_t reserved[64];
+  uint32_t flags;
+  uint8_t reserved[60];
 } AVB_ATTR_PACKED AvbHashtreeDescriptor;
 
 /* Copies |src| to |dest| and validates, byte-swapping fields in the
diff --git a/include/android_avb/avb_kernel_cmdline_descriptor.h b/include/android_avb/avb_kernel_cmdline_descriptor.h
old mode 100644
new mode 100755
diff --git a/include/android_avb/avb_ops.h b/include/android_avb/avb_ops.h
old mode 100644
new mode 100755
index 2a418454d4..f58f18cae8
--- a/include/android_avb/avb_ops.h
+++ b/include/android_avb/avb_ops.h
@@ -37,6 +37,9 @@
 extern "C" {
 #endif
 
+/* Well-known names of named persistent values. */
+#define AVB_NPV_PERSISTENT_DIGEST_PREFIX "avb.persistent_digest."
+
 /* Return codes used for I/O operations.
  *
  * AVB_IO_RESULT_OK is returned if the requested operation was
@@ -53,13 +56,25 @@ extern "C" {
  * AVB_IO_RESULT_ERROR_RANGE_OUTSIDE_PARTITION is returned if the
  * range of bytes requested to be read or written is outside the range
  * of the partition.
+ *
+ * AVB_IO_RESULT_ERROR_NO_SUCH_VALUE is returned if a named persistent value
+ * does not exist.
+ *
+ * AVB_IO_RESULT_ERROR_INVALID_VALUE_SIZE is returned if a named persistent
+ * value size is not supported or does not match the expected size.
+ *
+ * AVB_IO_RESULT_ERROR_INSUFFICIENT_SPACE is returned if a buffer is too small
+ * for the requested operation.
  */
 typedef enum {
   AVB_IO_RESULT_OK,
   AVB_IO_RESULT_ERROR_OOM,
   AVB_IO_RESULT_ERROR_IO,
   AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION,
-  AVB_IO_RESULT_ERROR_RANGE_OUTSIDE_PARTITION
+  AVB_IO_RESULT_ERROR_RANGE_OUTSIDE_PARTITION,
+  AVB_IO_RESULT_ERROR_NO_SUCH_VALUE,
+  AVB_IO_RESULT_ERROR_INVALID_VALUE_SIZE,
+  AVB_IO_RESULT_ERROR_INSUFFICIENT_SPACE,
 } AvbIOResult;
 
 struct AvbOps;
@@ -247,6 +262,53 @@ struct AvbOps {
   AvbIOResult (*get_size_of_partition)(AvbOps* ops,
                                        const char* partition,
                                        uint64_t* out_size_num_bytes);
+
+  /* Reads a persistent value corresponding to the given |name|. The value is
+   * returned in |out_buffer| which must point to |buffer_size| bytes. On
+   * success |out_num_bytes_read| contains the number of bytes read into
+   * |out_buffer|. If AVB_IO_RESULT_ERROR_INSUFFICIENT_SPACE is returned,
+   * |out_num_bytes_read| contains the number of bytes that would have been read
+   * which can be used to allocate a buffer.
+   *
+   * The |buffer_size| may be zero and the |out_buffer| may be NULL, but if
+   * |out_buffer| is NULL then |buffer_size| *must* be zero.
+   *
+   * Returns AVB_IO_RESULT_OK on success, otherwise an error code.
+   *
+   * If the value does not exist, is not supported, or is not populated, returns
+   * AVB_IO_RESULT_ERROR_NO_SUCH_VALUE. If |buffer_size| is smaller than the
+   * size of the stored value, returns AVB_IO_RESULT_ERROR_INSUFFICIENT_SPACE.
+   *
+   * This operation is currently only used to support persistent digests. If a
+   * device does not use persistent digests this function pointer can be set to
+   * NULL.
+   */
+  AvbIOResult (*read_persistent_value)(AvbOps* ops,
+                                       const char* name,
+                                       size_t buffer_size,
+                                       uint8_t* out_buffer,
+                                       size_t* out_num_bytes_read);
+
+  /* Writes a persistent value corresponding to the given |name|. The value is
+   * supplied in |value| which must point to |value_size| bytes. Any existing
+   * value with the same name is overwritten. If |value_size| is zero, future
+   * calls to |read_persistent_value| will return
+   * AVB_IO_RESULT_ERROR_NO_SUCH_VALUE.
+   *
+   * Returns AVB_IO_RESULT_OK on success, otherwise an error code.
+   *
+   * If the value |name| is not supported, returns
+   * AVB_IO_RESULT_ERROR_NO_SUCH_VALUE. If the |value_size| is not supported,
+   * returns AVB_IO_RESULT_ERROR_INVALID_VALUE_SIZE.
+   *
+   * This operation is currently only used to support persistent digests. If a
+   * device does not use persistent digests this function pointer can be set to
+   * NULL.
+   */
+  AvbIOResult (*write_persistent_value)(AvbOps* ops,
+                                        const char* name,
+                                        size_t value_size,
+                                        const uint8_t* value);
 };
 
 #ifdef __cplusplus
diff --git a/include/android_avb/avb_ops_user.h b/include/android_avb/avb_ops_user.h
old mode 100644
new mode 100755
diff --git a/include/android_avb/avb_property_descriptor.h b/include/android_avb/avb_property_descriptor.h
old mode 100644
new mode 100755
diff --git a/include/android_avb/avb_rsa.h b/include/android_avb/avb_rsa.h
old mode 100644
new mode 100755
diff --git a/include/android_avb/avb_sha.h b/include/android_avb/avb_sha.h
old mode 100644
new mode 100755
diff --git a/include/android_avb/avb_slot_verify.h b/include/android_avb/avb_slot_verify.h
old mode 100644
new mode 100755
index 1b7932496c..8b40676a6b
--- a/include/android_avb/avb_slot_verify.h
+++ b/include/android_avb/avb_slot_verify.h
@@ -262,6 +262,15 @@ typedef struct {
   uint64_t rollback_indexes[AVB_MAX_NUMBER_OF_ROLLBACK_INDEX_LOCATIONS];
 } AvbSlotVerifyData;
 
+/* Calculates a digest of all vbmeta images in |data| using
+ * the digest indicated by |digest_type|. Stores the result
+ * in |out_digest| which must be large enough to hold a digest
+ * of the requested type.
+ */
+void avb_slot_verify_data_calculate_vbmeta_digest(AvbSlotVerifyData* data,
+                                                  AvbDigestType digest_type,
+                                                  uint8_t* out_digest);
+
 /* Frees a |AvbSlotVerifyData| including all data it points to. */
 void avb_slot_verify_data_free(AvbSlotVerifyData* data);
 
diff --git a/include/android_avb/avb_sysdeps.h b/include/android_avb/avb_sysdeps.h
old mode 100644
new mode 100755
diff --git a/include/android_avb/avb_user_verification.h b/include/android_avb/avb_user_verification.h
old mode 100644
new mode 100755
diff --git a/include/android_avb/avb_user_verity.h b/include/android_avb/avb_user_verity.h
old mode 100644
new mode 100755
diff --git a/include/android_avb/avb_util.h b/include/android_avb/avb_util.h
old mode 100644
new mode 100755
index d23c961e10..99e94d0ac7
--- a/include/android_avb/avb_util.h
+++ b/include/android_avb/avb_util.h
@@ -272,6 +272,16 @@ uint32_t avb_crc32(const uint8_t* buf, size_t buf_size);
  */
 const char* avb_basename(const char* str);
 
+/* Converts any ascii lowercase characters in |str| to uppercase in-place.
+ * |str| must be NUL-terminated and valid UTF-8.
+ */
+void avb_uppercase(char* str);
+
+/* Converts |data_len| bytes of |data| to hex and returns the result. Returns
+ * NULL on OOM. Caller must free the returned string with avb_free.
+ */
+char* avb_bin2hex(const uint8_t* data, size_t data_len);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/include/android_avb/avb_vbmeta_image.h b/include/android_avb/avb_vbmeta_image.h
old mode 100644
new mode 100755
diff --git a/include/android_avb/avb_version.h b/include/android_avb/avb_version.h
old mode 100644
new mode 100755
index 48e11705a9..9fa509ea45
--- a/include/android_avb/avb_version.h
+++ b/include/android_avb/avb_version.h
@@ -39,7 +39,7 @@ extern "C" {
 
 /* The version number of AVB - keep in sync with avbtool. */
 #define AVB_VERSION_MAJOR 1
-#define AVB_VERSION_MINOR 0
+#define AVB_VERSION_MINOR 1
 #define AVB_VERSION_SUB 0
 
 /* Returns a NUL-terminated string for the libavb version in use.  The
diff --git a/include/android_avb/libavb.h b/include/android_avb/libavb.h
old mode 100644
new mode 100755
diff --git a/include/android_avb/libavb_ab.h b/include/android_avb/libavb_ab.h
old mode 100644
new mode 100755
diff --git a/include/android_avb/libavb_atx.h b/include/android_avb/libavb_atx.h
old mode 100644
new mode 100755
diff --git a/include/android_avb/libavb_user.h b/include/android_avb/libavb_user.h
old mode 100644
new mode 100755
diff --git a/include/android_avb/rk_avb_ops_user.h b/include/android_avb/rk_avb_ops_user.h
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb/Kconfig b/lib/avb/libavb/Kconfig
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb/Makefile b/lib/avb/libavb/Makefile
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb/avb_chain_partition_descriptor.c b/lib/avb/libavb/avb_chain_partition_descriptor.c
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb/avb_cmdline.c b/lib/avb/libavb/avb_cmdline.c
old mode 100644
new mode 100755
index ecf582ebd9..a4bb2edc34
--- a/lib/avb/libavb/avb_cmdline.c
+++ b/lib/avb/libavb/avb_cmdline.c
@@ -33,8 +33,11 @@
  * values. Returns NULL on OOM, otherwise the cmdline with values
  * replaced.
  */
-char* avb_sub_cmdline(AvbOps* ops, const char* cmdline, const char* ab_suffix,
-                      bool using_boot_for_vbmeta) {
+char* avb_sub_cmdline(AvbOps* ops,
+                      const char* cmdline,
+                      const char* ab_suffix,
+                      bool using_boot_for_vbmeta,
+                      const AvbCmdlineSubstList* additional_substitutions) {
   const char* part_name_str[NUM_GUIDS] = {"system", "boot", "vbmeta"};
   const char* replace_str[NUM_GUIDS] = {"$(ANDROID_SYSTEM_PARTUUID)",
                                         "$(ANDROID_BOOT_PARTUUID)",
@@ -68,7 +71,7 @@ char* avb_sub_cmdline(AvbOps* ops, const char* cmdline, const char* ab_suffix,
     io_ret = ops->get_unique_guid_for_partition(
         ops, part_name, guid_buf, sizeof guid_buf);
     if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-      return NULL;
+      goto fail;
     } else if (io_ret != AVB_IO_RESULT_OK) {
       avb_error("Error getting unique GUID for partition.\n");
       goto fail;
@@ -86,6 +89,22 @@ char* avb_sub_cmdline(AvbOps* ops, const char* cmdline, const char* ab_suffix,
     }
   }
 
+  avb_assert(ret != NULL);
+
+  /* Replace any additional substitutions. */
+  if (additional_substitutions != NULL) {
+    for (n = 0; n < additional_substitutions->size; ++n) {
+      char* new_ret = avb_replace(ret,
+                                  additional_substitutions->tokens[n],
+                                  additional_substitutions->values[n]);
+      avb_free(ret);
+      ret = new_ret;
+      if (ret == NULL) {
+        goto fail;
+      }
+    }
+  }
+
   return ret;
 
 fail:
@@ -186,22 +205,11 @@ static int cmdline_append_hex(AvbSlotVerifyData* slot_data,
                               const char* key,
                               const uint8_t* data,
                               size_t data_len) {
-  char hex_digits[17] = "0123456789abcdef";
-  char* hex_data;
   int ret;
-  size_t n;
-
-  hex_data = avb_malloc(data_len * 2 + 1);
+  char* hex_data = avb_bin2hex(data, data_len);
   if (hex_data == NULL) {
     return 0;
   }
-
-  for (n = 0; n < data_len; n++) {
-    hex_data[n * 2] = hex_digits[data[n] >> 4];
-    hex_data[n * 2 + 1] = hex_digits[data[n] & 0x0f];
-  }
-  hex_data[n * 2] = '\0';
-
   ret = cmdline_append_option(slot_data, key, hex_data);
   avb_free(hex_data);
   return ret;
@@ -261,13 +269,11 @@ AvbSlotVerifyResult avb_append_options(
     case AVB_ALGORITHM_TYPE_SHA256_RSA2048:
     case AVB_ALGORITHM_TYPE_SHA256_RSA4096:
     case AVB_ALGORITHM_TYPE_SHA256_RSA8192: {
-      AvbSHA256Ctx ctx;
       size_t n, total_size = 0;
-      avb_sha256_init(&ctx);
+      uint8_t vbmeta_digest[AVB_SHA256_DIGEST_SIZE];
+      avb_slot_verify_data_calculate_vbmeta_digest(
+          slot_data, AVB_DIGEST_TYPE_SHA256, vbmeta_digest);
       for (n = 0; n < slot_data->num_vbmeta_images; n++) {
-        avb_sha256_update(&ctx,
-                          slot_data->vbmeta_images[n].vbmeta_data,
-                          slot_data->vbmeta_images[n].vbmeta_size);
         total_size += slot_data->vbmeta_images[n].vbmeta_size;
       }
       if (!cmdline_append_option(
@@ -276,7 +282,7 @@ AvbSlotVerifyResult avb_append_options(
               slot_data, "androidboot.vbmeta.size", total_size) ||
           !cmdline_append_hex(slot_data,
                               "androidboot.vbmeta.digest",
-                              avb_sha256_final(&ctx),
+                              vbmeta_digest,
                               AVB_SHA256_DIGEST_SIZE)) {
         ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
         goto out;
@@ -286,13 +292,11 @@ AvbSlotVerifyResult avb_append_options(
     case AVB_ALGORITHM_TYPE_SHA512_RSA2048:
     case AVB_ALGORITHM_TYPE_SHA512_RSA4096:
     case AVB_ALGORITHM_TYPE_SHA512_RSA8192: {
-      AvbSHA512Ctx ctx;
       size_t n, total_size = 0;
-      avb_sha512_init(&ctx);
+      uint8_t vbmeta_digest[AVB_SHA512_DIGEST_SIZE];
+      avb_slot_verify_data_calculate_vbmeta_digest(
+          slot_data, AVB_DIGEST_TYPE_SHA512, vbmeta_digest);
       for (n = 0; n < slot_data->num_vbmeta_images; n++) {
-        avb_sha512_update(&ctx,
-                          slot_data->vbmeta_images[n].vbmeta_data,
-                          slot_data->vbmeta_images[n].vbmeta_size);
         total_size += slot_data->vbmeta_images[n].vbmeta_size;
       }
       if (!cmdline_append_option(
@@ -301,7 +305,7 @@ AvbSlotVerifyResult avb_append_options(
               slot_data, "androidboot.vbmeta.size", total_size) ||
           !cmdline_append_hex(slot_data,
                               "androidboot.vbmeta.digest",
-                              avb_sha512_final(&ctx),
+                              vbmeta_digest,
                               AVB_SHA512_DIGEST_SIZE)) {
         ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
         goto out;
@@ -369,3 +373,68 @@ out:
   return ret;
 }
 
+AvbCmdlineSubstList* avb_new_cmdline_subst_list() {
+  return (AvbCmdlineSubstList*)avb_calloc(sizeof(AvbCmdlineSubstList));
+}
+
+void avb_free_cmdline_subst_list(AvbCmdlineSubstList* cmdline_subst) {
+  size_t i;
+  for (i = 0; i < cmdline_subst->size; ++i) {
+    avb_free(cmdline_subst->tokens[i]);
+    avb_free(cmdline_subst->values[i]);
+  }
+  cmdline_subst->size = 0;
+  avb_free(cmdline_subst);
+}
+
+AvbSlotVerifyResult avb_add_root_digest_substitution(
+    const char* part_name,
+    const uint8_t* digest,
+    size_t digest_size,
+    AvbCmdlineSubstList* out_cmdline_subst) {
+  const char* kDigestSubPrefix = "$(AVB_";
+  const char* kDigestSubSuffix = "_ROOT_DIGEST)";
+  size_t part_name_len = avb_strlen(part_name);
+  size_t list_index = out_cmdline_subst->size;
+
+  avb_assert(part_name_len < AVB_PART_NAME_MAX_SIZE);
+  avb_assert(digest_size <= AVB_SHA512_DIGEST_SIZE);
+  if (part_name_len >= AVB_PART_NAME_MAX_SIZE ||
+      digest_size > AVB_SHA512_DIGEST_SIZE) {
+    return AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+  }
+
+  if (out_cmdline_subst->size >= AVB_MAX_NUM_CMDLINE_SUBST) {
+    /* The list is full. Currently dynamic growth of this list is not supported.
+     */
+    return AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+  }
+
+  /* Construct the token to replace in the command line based on the partition
+   * name. For partition 'foo', this will be '$(AVB_FOO_ROOT_DIGEST)'.
+   */
+  out_cmdline_subst->tokens[list_index] =
+      avb_strdupv(kDigestSubPrefix, part_name, kDigestSubSuffix, NULL);
+  if (out_cmdline_subst->tokens[list_index] == NULL) {
+    goto fail;
+  }
+  avb_uppercase(out_cmdline_subst->tokens[list_index]);
+
+  /* The digest value is hex encoded when inserted in the command line. */
+  out_cmdline_subst->values[list_index] = avb_bin2hex(digest, digest_size);
+  if (out_cmdline_subst->values[list_index] == NULL) {
+    goto fail;
+  }
+
+  out_cmdline_subst->size++;
+  return AVB_SLOT_VERIFY_RESULT_OK;
+
+fail:
+  if (out_cmdline_subst->tokens[list_index]) {
+    avb_free(out_cmdline_subst->tokens[list_index]);
+  }
+  if (out_cmdline_subst->values[list_index]) {
+    avb_free(out_cmdline_subst->values[list_index]);
+  }
+  return AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+}
diff --git a/lib/avb/libavb/avb_crc32.c b/lib/avb/libavb/avb_crc32.c
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb/avb_crypto.c b/lib/avb/libavb/avb_crypto.c
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb/avb_descriptor.c b/lib/avb/libavb/avb_descriptor.c
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb/avb_footer.c b/lib/avb/libavb/avb_footer.c
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb/avb_hash_descriptor.c b/lib/avb/libavb/avb_hash_descriptor.c
old mode 100644
new mode 100755
index 294f3d648e..ef9921a20c
--- a/lib/avb/libavb/avb_hash_descriptor.c
+++ b/lib/avb/libavb/avb_hash_descriptor.c
@@ -44,6 +44,7 @@ bool avb_hash_descriptor_validate_and_byteswap(const AvbHashDescriptor* src,
   dest->partition_name_len = avb_be32toh(dest->partition_name_len);
   dest->salt_len = avb_be32toh(dest->salt_len);
   dest->digest_len = avb_be32toh(dest->digest_len);
+  dest->flags = avb_be32toh(dest->flags);
 
   /* Check that partition_name, salt, and digest are fully contained. */
   expected_size = sizeof(AvbHashDescriptor) - sizeof(AvbDescriptor);
diff --git a/lib/avb/libavb/avb_hashtree_descriptor.c b/lib/avb/libavb/avb_hashtree_descriptor.c
old mode 100644
new mode 100755
index 0e95e8762d..19de1e3d70
--- a/lib/avb/libavb/avb_hashtree_descriptor.c
+++ b/lib/avb/libavb/avb_hashtree_descriptor.c
@@ -52,6 +52,7 @@ bool avb_hashtree_descriptor_validate_and_byteswap(
   dest->partition_name_len = avb_be32toh(dest->partition_name_len);
   dest->salt_len = avb_be32toh(dest->salt_len);
   dest->root_digest_len = avb_be32toh(dest->root_digest_len);
+  dest->flags = avb_be32toh(dest->flags);
 
   /* Check that partition_name, salt, and root_digest are fully contained. */
   expected_size = sizeof(AvbHashtreeDescriptor) - sizeof(AvbDescriptor);
diff --git a/lib/avb/libavb/avb_kernel_cmdline_descriptor.c b/lib/avb/libavb/avb_kernel_cmdline_descriptor.c
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb/avb_property_descriptor.c b/lib/avb/libavb/avb_property_descriptor.c
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb/avb_rsa.c b/lib/avb/libavb/avb_rsa.c
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb/avb_sha256.c b/lib/avb/libavb/avb_sha256.c
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb/avb_sha512.c b/lib/avb/libavb/avb_sha512.c
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb/avb_slot_verify.c b/lib/avb/libavb/avb_slot_verify.c
old mode 100644
new mode 100755
index 972fda0e9c..d6a843853f
--- a/lib/avb/libavb/avb_slot_verify.c
+++ b/lib/avb/libavb/avb_slot_verify.c
@@ -27,6 +27,7 @@
 #include <android_avb/avb_cmdline.h>
 #include <android_avb/avb_footer.h>
 #include <android_avb/avb_hash_descriptor.h>
+#include <android_avb/avb_hashtree_descriptor.h>
 #include <android_avb/avb_kernel_cmdline_descriptor.h>
 #include <android_avb/avb_sha.h>
 #include <android_avb/avb_util.h>
@@ -65,10 +66,11 @@ static inline bool result_should_continue(AvbSlotVerifyResult result) {
   return false;
 }
 
-static AvbSlotVerifyResult load_full_partition(
-    AvbOps* ops, const char* part_name,
-    uint64_t image_size, uint8_t** out_image_buf,
-    bool* out_image_preloaded) {
+static AvbSlotVerifyResult load_full_partition(AvbOps* ops,
+                                               const char* part_name,
+                                               uint64_t image_size,
+                                               uint8_t** out_image_buf,
+                                               bool* out_image_preloaded) {
   size_t part_num_read;
   AvbIOResult io_ret;
 
@@ -110,9 +112,12 @@ static AvbSlotVerifyResult load_full_partition(
       return AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
     }
 
-    io_ret = ops->read_from_partition(
-        ops, part_name, 0 /* offset */, image_size, *out_image_buf,
-        &part_num_read);
+    io_ret = ops->read_from_partition(ops,
+                                      part_name,
+                                      0 /* offset */,
+                                      image_size,
+                                      *out_image_buf,
+                                      &part_num_read);
     if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
       return AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
     } else if (io_ret != AVB_IO_RESULT_OK) {
@@ -128,6 +133,47 @@ static AvbSlotVerifyResult load_full_partition(
   return AVB_SLOT_VERIFY_RESULT_OK;
 }
 
+static AvbSlotVerifyResult read_persistent_digest(AvbOps* ops,
+                                                  const char* part_name,
+                                                  size_t expected_digest_size,
+                                                  uint8_t* out_digest) {
+  char* persistent_value_name = NULL;
+  AvbIOResult io_ret = AVB_IO_RESULT_OK;
+  size_t stored_digest_size = 0;
+
+  if (ops->read_persistent_value == NULL) {
+    avb_errorv(part_name, ": Persistent values are not implemented.\n", NULL);
+    return AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+  }
+  persistent_value_name =
+      avb_strdupv(AVB_NPV_PERSISTENT_DIGEST_PREFIX, part_name, NULL);
+  if (persistent_value_name == NULL) {
+    return AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+  }
+  io_ret = ops->read_persistent_value(ops,
+                                      persistent_value_name,
+                                      expected_digest_size,
+                                      out_digest,
+                                      &stored_digest_size);
+  avb_free(persistent_value_name);
+  if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+    return AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+  } else if (io_ret == AVB_IO_RESULT_ERROR_NO_SUCH_VALUE) {
+    avb_errorv(part_name, ": Persistent digest does not exist.\n", NULL);
+    return AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+  } else if (io_ret == AVB_IO_RESULT_ERROR_INVALID_VALUE_SIZE ||
+             io_ret == AVB_IO_RESULT_ERROR_INSUFFICIENT_SPACE ||
+             expected_digest_size != stored_digest_size) {
+    avb_errorv(
+        part_name, ": Persistent digest is not of expected size.\n", NULL);
+    return AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+  } else if (io_ret != AVB_IO_RESULT_OK) {
+    avb_errorv(part_name, ": Error reading persistent digest.\n", NULL);
+    return AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+  }
+  return AVB_SLOT_VERIFY_RESULT_OK;
+}
+
 static AvbSlotVerifyResult load_and_verify_hash_partition(
     AvbOps* ops,
     const char* const* requested_partitions,
@@ -148,6 +194,9 @@ static AvbSlotVerifyResult load_and_verify_hash_partition(
   size_t digest_len;
   const char* found;
   uint64_t image_size = 0;
+  size_t expected_digest_len = 0;
+  uint8_t expected_digest_buf[AVB_SHA512_DIGEST_SIZE];
+  const uint8_t* expected_digest = NULL;
 
   if (!avb_hash_descriptor_validate_and_byteswap(
           (const AvbHashDescriptor*)descriptor, &hash_desc)) {
@@ -177,15 +226,35 @@ static AvbSlotVerifyResult load_and_verify_hash_partition(
     goto out;
   }
 
-  if (!avb_str_concat(part_name,
-                      sizeof part_name,
-                      (const char*)desc_partition_name,
-                      hash_desc.partition_name_len,
-                      ab_suffix,
-                      avb_strlen(ab_suffix))) {
-    avb_error("Partition name and suffix does not fit.\n");
+  if ((hash_desc.flags & AVB_HASH_DESCRIPTOR_FLAGS_DO_NOT_USE_AB) != 0) {
+    /* No ab_suffix, just copy the partition name as is. */
+    if (hash_desc.partition_name_len >= AVB_PART_NAME_MAX_SIZE) {
+      avb_error("Partition name does not fit.\n");
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+      goto out;
+    }
+    avb_memcpy(part_name, desc_partition_name, hash_desc.partition_name_len);
+    part_name[hash_desc.partition_name_len] = '\0';
+  } else if (hash_desc.digest_len == 0 && avb_strlen(ab_suffix) != 0) {
+    /* No ab_suffix allowed for partitions without a digest in the descriptor
+     * because these partitions hold data unique to this device and are not
+     * updated using an A/B scheme.
+     */
+    avb_error("Cannot use A/B with a persistent digest.\n");
     ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
     goto out;
+  } else {
+    /* Add ab_suffix to the partition name. */
+    if (!avb_str_concat(part_name,
+                        sizeof part_name,
+                        (const char*)desc_partition_name,
+                        hash_desc.partition_name_len,
+                        ab_suffix,
+                        avb_strlen(ab_suffix))) {
+      avb_error("Partition name and suffix does not fit.\n");
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+      goto out;
+    }
   }
 
   /* If we're allowing verification errors then hash_desc.image_size
@@ -244,14 +313,31 @@ static AvbSlotVerifyResult load_and_verify_hash_partition(
     goto out;
   }
 
-  if (digest_len != hash_desc.digest_len) {
+  if (hash_desc.digest_len == 0) {
+    // Expect a match to a persistent digest.
+    avb_debugv(part_name, ": No digest, using persistent digest.\n", NULL);
+    expected_digest_len = digest_len;
+    expected_digest = expected_digest_buf;
+    avb_assert(expected_digest_len <= sizeof(expected_digest_buf));
+    ret =
+        read_persistent_digest(ops, part_name, digest_len, expected_digest_buf);
+    if (ret != AVB_SLOT_VERIFY_RESULT_OK) {
+      goto out;
+    }
+  } else {
+    // Expect a match to the digest in the descriptor.
+    expected_digest_len = hash_desc.digest_len;
+    expected_digest = desc_digest;
+  }
+
+  if (digest_len != expected_digest_len) {
     avb_errorv(
         part_name, ": Digest in descriptor not of expected size.\n", NULL);
     ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
     goto out;
   }
 
-  if (avb_safe_memcmp(digest, desc_digest, digest_len) != 0) {
+  if (avb_safe_memcmp(digest, expected_digest, digest_len) != 0) {
     avb_errorv(part_name,
                ": Hash of data does not match digest in descriptor.\n",
                NULL);
@@ -352,7 +438,7 @@ static AvbSlotVerifyResult load_requested_partitions(
       goto out;
     }
     loaded_partition->data_size = image_size;
-    loaded_partition->data = image_buf;  /* Transferring the owner. */
+    loaded_partition->data = image_buf; /* Transferring the owner. */
     loaded_partition->preloaded = image_preloaded;
     image_buf = NULL;
     image_preloaded = false;
@@ -382,7 +468,8 @@ static AvbSlotVerifyResult load_and_verify_vbmeta(
     const uint8_t* expected_public_key,
     size_t expected_public_key_length,
     AvbSlotVerifyData* slot_data,
-    AvbAlgorithmType* out_algorithm_type) {
+    AvbAlgorithmType* out_algorithm_type,
+    AvbCmdlineSubstList* out_additional_cmdline_subst) {
   char full_partition_name[AVB_PART_NAME_MAX_SIZE];
   AvbSlotVerifyResult ret;
   AvbIOResult io_ret;
@@ -518,7 +605,8 @@ static AvbSlotVerifyResult load_and_verify_vbmeta(
                                    NULL /* expected_public_key */,
                                    0 /* expected_public_key_length */,
                                    slot_data,
-                                   out_algorithm_type);
+                                   out_algorithm_type,
+                                   out_additional_cmdline_subst);
       goto out;
     } else {
       avb_errorv(full_partition_name, ": Error loading vbmeta data.\n", NULL);
@@ -714,7 +802,8 @@ static AvbSlotVerifyResult load_and_verify_vbmeta(
    *   checks that it matches what's in the hash descriptor.
    *
    * - hashtree descriptor: Do nothing since verification happens
-   *   on-the-fly from within the OS.
+   *   on-the-fly from within the OS. (Unless the descriptor uses a
+   *   persistent digest, in which case we need to find it).
    *
    * - chained partition descriptor: Load the footer, load the vbmeta
    *   image, verify vbmeta image (includes rollback checks, hash
@@ -785,18 +874,20 @@ static AvbSlotVerifyResult load_and_verify_vbmeta(
                                sizeof(AvbChainPartitionDescriptor);
         chain_public_key = chain_partition_name + chain_desc.partition_name_len;
 
-        sub_ret = load_and_verify_vbmeta(ops,
-                                         requested_partitions,
-                                         ab_suffix,
-                                         allow_verification_error,
-                                         toplevel_vbmeta_flags,
-                                         chain_desc.rollback_index_location,
-                                         (const char*)chain_partition_name,
-                                         chain_desc.partition_name_len,
-                                         chain_public_key,
-                                         chain_desc.public_key_len,
-                                         slot_data,
-                                         NULL /* out_algorithm_type */);
+        sub_ret =
+            load_and_verify_vbmeta(ops,
+                                   requested_partitions,
+                                   ab_suffix,
+                                   allow_verification_error,
+                                   toplevel_vbmeta_flags,
+                                   chain_desc.rollback_index_location,
+                                   (const char*)chain_partition_name,
+                                   chain_desc.partition_name_len,
+                                   chain_public_key,
+                                   chain_desc.public_key_len,
+                                   slot_data,
+                                   NULL, /* out_algorithm_type */
+                                   NULL /* out_additional_cmdline_subst */);
         if (sub_ret != AVB_SLOT_VERIFY_RESULT_OK) {
           ret = sub_ret;
           if (!result_should_continue(ret)) {
@@ -882,9 +973,90 @@ static AvbSlotVerifyResult load_and_verify_vbmeta(
         }
       } break;
 
-      /* Explicit fall-through */
+      case AVB_DESCRIPTOR_TAG_HASHTREE: {
+        AvbHashtreeDescriptor hashtree_desc;
+
+        if (!avb_hashtree_descriptor_validate_and_byteswap(
+                (AvbHashtreeDescriptor*)descriptors[n], &hashtree_desc)) {
+          avb_errorv(
+              full_partition_name, ": Hashtree descriptor is invalid.\n", NULL);
+          ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+          goto out;
+        }
+
+        /* We only need to continue when there is no digest in the descriptor.
+         * This is because the only processing here is to find the digest and
+         * make it available on the kernel command line.
+         */
+        if (hashtree_desc.root_digest_len == 0) {
+          char part_name[AVB_PART_NAME_MAX_SIZE];
+          size_t digest_len = 0;
+          uint8_t digest_buf[AVB_SHA512_DIGEST_SIZE];
+          const uint8_t* desc_partition_name =
+              ((const uint8_t*)descriptors[n]) + sizeof(AvbHashtreeDescriptor);
+
+          if (!avb_validate_utf8(desc_partition_name,
+                                 hashtree_desc.partition_name_len)) {
+            avb_error("Partition name is not valid UTF-8.\n");
+            ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+            goto out;
+          }
+
+          /* No ab_suffix for partitions without a digest in the descriptor
+           * because these partitions hold data unique to this device and are
+           * not updated using an A/B scheme.
+           */
+          if ((hashtree_desc.flags &
+               AVB_HASHTREE_DESCRIPTOR_FLAGS_DO_NOT_USE_AB) == 0 &&
+              avb_strlen(ab_suffix) != 0) {
+            avb_error("Cannot use A/B with a persistent root digest.\n");
+            ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+            goto out;
+          }
+          if (hashtree_desc.partition_name_len >= AVB_PART_NAME_MAX_SIZE) {
+            avb_error("Partition name does not fit.\n");
+            ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+            goto out;
+          }
+          avb_memcpy(
+              part_name, desc_partition_name, hashtree_desc.partition_name_len);
+          part_name[hashtree_desc.partition_name_len] = '\0';
+
+          /* Determine the expected digest size from the hash algorithm. */
+          if (avb_strcmp((const char*)hashtree_desc.hash_algorithm, "sha1") ==
+              0) {
+            digest_len = AVB_SHA1_DIGEST_SIZE;
+          } else if (avb_strcmp((const char*)hashtree_desc.hash_algorithm,
+                                "sha256") == 0) {
+            digest_len = AVB_SHA256_DIGEST_SIZE;
+          } else if (avb_strcmp((const char*)hashtree_desc.hash_algorithm,
+                                "sha512") == 0) {
+            digest_len = AVB_SHA512_DIGEST_SIZE;
+          } else {
+            avb_errorv(part_name, ": Unsupported hash algorithm.\n", NULL);
+            ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+            goto out;
+          }
+
+          ret = read_persistent_digest(ops, part_name, digest_len, digest_buf);
+          if (ret != AVB_SLOT_VERIFY_RESULT_OK) {
+            goto out;
+          }
+
+          if (out_additional_cmdline_subst) {
+            ret =
+                avb_add_root_digest_substitution(part_name,
+                                                 digest_buf,
+                                                 digest_len,
+                                                 out_additional_cmdline_subst);
+            if (ret != AVB_SLOT_VERIFY_RESULT_OK) {
+              goto out;
+            }
+          }
+        }
+      } break;
+
       case AVB_DESCRIPTOR_TAG_PROPERTY:
-      case AVB_DESCRIPTOR_TAG_HASHTREE:
         /* Do nothing. */
         break;
     }
@@ -932,6 +1104,7 @@ AvbSlotVerifyResult avb_slot_verify(AvbOps* ops,
   AvbVBMetaImageHeader toplevel_vbmeta;
   bool allow_verification_error =
       (flags & AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR);
+  AvbCmdlineSubstList* additional_cmdline_subst = NULL;
 
   /* Fail early if we're missing the AvbOps needed for slot verification.
    *
@@ -976,6 +1149,12 @@ AvbSlotVerifyResult avb_slot_verify(AvbOps* ops,
     goto fail;
   }
 
+  additional_cmdline_subst = avb_new_cmdline_subst_list();
+  if (additional_cmdline_subst == NULL) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto fail;
+  }
+
   ret = load_and_verify_vbmeta(ops,
                                requested_partitions,
                                ab_suffix,
@@ -987,7 +1166,8 @@ AvbSlotVerifyResult avb_slot_verify(AvbOps* ops,
                                NULL /* expected_public_key */,
                                0 /* expected_public_key_length */,
                                slot_data,
-                               &algorithm_type);
+                               &algorithm_type,
+                               additional_cmdline_subst);
   if (!allow_verification_error && ret != AVB_SLOT_VERIFY_RESULT_OK) {
     goto fail;
   }
@@ -1032,9 +1212,11 @@ AvbSlotVerifyResult avb_slot_verify(AvbOps* ops,
       /* Add options - any failure in avb_append_options() is either an
        * I/O or OOM error.
        */
-      AvbSlotVerifyResult sub_ret = avb_append_options(
-          ops, slot_data, &toplevel_vbmeta, algorithm_type,
-          hashtree_error_mode);
+      AvbSlotVerifyResult sub_ret = avb_append_options(ops,
+                                                       slot_data,
+                                                       &toplevel_vbmeta,
+                                                       algorithm_type,
+                                                       hashtree_error_mode);
       if (sub_ret != AVB_SLOT_VERIFY_RESULT_OK) {
         ret = sub_ret;
         goto fail;
@@ -1044,8 +1226,11 @@ AvbSlotVerifyResult avb_slot_verify(AvbOps* ops,
     /* Substitute $(ANDROID_SYSTEM_PARTUUID) and friends. */
     if (slot_data->cmdline != NULL) {
       char* new_cmdline;
-      new_cmdline = avb_sub_cmdline(
-          ops, slot_data->cmdline, ab_suffix, using_boot_for_vbmeta);
+      new_cmdline = avb_sub_cmdline(ops,
+                                    slot_data->cmdline,
+                                    ab_suffix,
+                                    using_boot_for_vbmeta,
+                                    additional_cmdline_subst);
       if (new_cmdline != slot_data->cmdline) {
         if (new_cmdline == NULL) {
           ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
@@ -1063,6 +1248,9 @@ AvbSlotVerifyResult avb_slot_verify(AvbOps* ops,
     }
   }
 
+  avb_free_cmdline_subst_list(additional_cmdline_subst);
+  additional_cmdline_subst = NULL;
+
   if (!allow_verification_error) {
     avb_assert(ret == AVB_SLOT_VERIFY_RESULT_OK);
   }
@@ -1073,6 +1261,9 @@ fail:
   if (slot_data != NULL) {
     avb_slot_verify_data_free(slot_data);
   }
+  if (additional_cmdline_subst != NULL) {
+    avb_free_cmdline_subst_list(additional_cmdline_subst);
+  }
   return ret;
 }
 
@@ -1153,3 +1344,42 @@ const char* avb_slot_verify_result_to_string(AvbSlotVerifyResult result) {
 
   return ret;
 }
+
+void avb_slot_verify_data_calculate_vbmeta_digest(AvbSlotVerifyData* data,
+                                                  AvbDigestType digest_type,
+                                                  uint8_t* out_digest) {
+  bool ret = false;
+  size_t n;
+
+  switch (digest_type) {
+    case AVB_DIGEST_TYPE_SHA256: {
+      AvbSHA256Ctx ctx;
+      avb_sha256_init(&ctx);
+      for (n = 0; n < data->num_vbmeta_images; n++) {
+        avb_sha256_update(&ctx,
+                          data->vbmeta_images[n].vbmeta_data,
+                          data->vbmeta_images[n].vbmeta_size);
+      }
+      avb_memcpy(out_digest, avb_sha256_final(&ctx), AVB_SHA256_DIGEST_SIZE);
+      ret = true;
+    } break;
+
+    case AVB_DIGEST_TYPE_SHA512: {
+      AvbSHA512Ctx ctx;
+      avb_sha512_init(&ctx);
+      for (n = 0; n < data->num_vbmeta_images; n++) {
+        avb_sha512_update(&ctx,
+                          data->vbmeta_images[n].vbmeta_data,
+                          data->vbmeta_images[n].vbmeta_size);
+      }
+      avb_memcpy(out_digest, avb_sha512_final(&ctx), AVB_SHA512_DIGEST_SIZE);
+      ret = true;
+    } break;
+
+      /* Do not add a 'default:' case here because of -Wswitch. */
+  }
+
+  if (!ret) {
+    avb_fatal("Unknown digest type");
+  }
+}
diff --git a/lib/avb/libavb/avb_sysdeps_posix.c b/lib/avb/libavb/avb_sysdeps_posix.c
old mode 100644
new mode 100755
index 9df018f7c8..638ce9867a
--- a/lib/avb/libavb/avb_sysdeps_posix.c
+++ b/lib/avb/libavb/avb_sysdeps_posix.c
@@ -22,6 +22,7 @@
  * SOFTWARE.
  */
 
+#include <stdio.h>
 #include <common.h>
 #include <stdarg.h>
 #include <stdlib.h>
@@ -31,8 +32,10 @@
 
 #include <android_avb/avb_sysdeps.h>
 
-void abort(void);
-
+void abort(void)
+{
+	
+}
 int avb_memcmp(const void* src1, const void* src2, size_t n) {
   return memcmp(src1, src2, n);
 }
diff --git a/lib/avb/libavb/avb_util.c b/lib/avb/libavb/avb_util.c
old mode 100644
new mode 100755
index 434cb39e2b..7b2053b5bd
--- a/lib/avb/libavb/avb_util.c
+++ b/lib/avb/libavb/avb_util.c
@@ -401,3 +401,30 @@ const char* avb_basename(const char* str) {
   }
   return str;
 }
+
+void avb_uppercase(char* str) {
+  size_t i;
+  for (i = 0; str[i] != '\0'; ++i) {
+    if (str[i] <= 0x7A && str[i] >= 0x61) {
+      str[i] -= 0x20;
+    }
+  }
+}
+
+char* avb_bin2hex(const uint8_t* data, size_t data_len) {
+  const char hex_digits[17] = "0123456789abcdef";
+  char* hex_data;
+  size_t n;
+
+  hex_data = avb_malloc(data_len * 2 + 1);
+  if (hex_data == NULL) {
+    return NULL;
+  }
+
+  for (n = 0; n < data_len; n++) {
+    hex_data[n * 2] = hex_digits[data[n] >> 4];
+    hex_data[n * 2 + 1] = hex_digits[data[n] & 0x0f];
+  }
+  hex_data[n * 2] = '\0';
+  return hex_data;
+}
diff --git a/lib/avb/libavb/avb_vbmeta_image.c b/lib/avb/libavb/avb_vbmeta_image.c
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb/avb_version.c b/lib/avb/libavb/avb_version.c
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb_ab/Kconfig b/lib/avb/libavb_ab/Kconfig
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb_ab/Makefile b/lib/avb/libavb_ab/Makefile
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb_ab/avb_ab_flow.c b/lib/avb/libavb_ab/avb_ab_flow.c
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb_atx/Kconfig b/lib/avb/libavb_atx/Kconfig
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb_atx/Makefile b/lib/avb/libavb_atx/Makefile
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb_atx/avb_atx_validate.c b/lib/avb/libavb_atx/avb_atx_validate.c
old mode 100644
new mode 100755
index e0f205a728..74a34fd0fd
--- a/lib/avb/libavb_atx/avb_atx_validate.c
+++ b/lib/avb/libavb_atx/avb_atx_validate.c
@@ -29,6 +29,9 @@
 #include <android_avb/avb_sysdeps.h>
 #include <android_avb/avb_util.h>
 
+/* The most recent unlock challenge generated. */
+static uint8_t last_unlock_challenge[AVB_ATX_UNLOCK_CHALLENGE_SIZE];
+
 /* Computes the SHA256 |hash| of |length| bytes of |data|. */
 static void sha256(const uint8_t* data,
                    uint32_t length,
@@ -59,7 +62,7 @@ static void sha256_str(const char* str, uint8_t hash[AVB_SHA256_DIGEST_SIZE]) {
 /* Verifies structure and |expected_hash| of permanent |attributes|. */
 static bool verify_permanent_attributes(
     const AvbAtxPermanentAttributes* attributes,
-    uint8_t expected_hash[AVB_SHA256_DIGEST_SIZE]) {
+    const uint8_t expected_hash[AVB_SHA256_DIGEST_SIZE]) {
   uint8_t hash[AVB_SHA256_DIGEST_SIZE];
 
   if (attributes->version != 1) {
@@ -75,10 +78,11 @@ static bool verify_permanent_attributes(
 }
 
 /* Verifies the format, key version, usage, and signature of a certificate. */
-static bool verify_certificate(AvbAtxCertificate* certificate,
-                               uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
-                               uint64_t minimum_key_version,
-                               uint8_t expected_usage[AVB_SHA256_DIGEST_SIZE]) {
+static bool verify_certificate(
+    const AvbAtxCertificate* certificate,
+    const uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
+    uint64_t minimum_key_version,
+    const uint8_t expected_usage[AVB_SHA256_DIGEST_SIZE]) {
   const AvbAlgorithmData* algorithm_data;
   uint8_t certificate_hash[AVB_SHA512_DIGEST_SIZE];
 
@@ -115,9 +119,10 @@ static bool verify_certificate(AvbAtxCertificate* certificate,
 }
 
 /* Verifies signature and fields of a PIK certificate. */
-static bool verify_pik_certificate(AvbAtxCertificate* certificate,
-                                   uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
-                                   uint64_t minimum_version) {
+static bool verify_pik_certificate(
+    const AvbAtxCertificate* certificate,
+    const uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
+    uint64_t minimum_version) {
   uint8_t expected_usage[AVB_SHA256_DIGEST_SIZE];
 
   sha256_str("com.google.android.things.vboot.ca", expected_usage);
@@ -131,10 +136,10 @@ static bool verify_pik_certificate(AvbAtxCertificate* certificate,
 
 /* Verifies signature and fields of a PSK certificate. */
 static bool verify_psk_certificate(
-    AvbAtxCertificate* certificate,
-    uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
+    const AvbAtxCertificate* certificate,
+    const uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
     uint64_t minimum_version,
-    uint8_t product_id[AVB_ATX_PRODUCT_ID_SIZE]) {
+    const uint8_t product_id[AVB_ATX_PRODUCT_ID_SIZE]) {
   uint8_t expected_subject[AVB_SHA256_DIGEST_SIZE];
   uint8_t expected_usage[AVB_SHA256_DIGEST_SIZE];
 
@@ -148,7 +153,32 @@ static bool verify_psk_certificate(
   if (0 != avb_safe_memcmp(certificate->signed_data.subject,
                            expected_subject,
                            AVB_SHA256_DIGEST_SIZE)) {
-    avb_error("Product ID mismatch.\n");
+    avb_error("PSK: Product ID mismatch.\n");
+    return false;
+  }
+  return true;
+}
+
+/* Verifies signature and fields of a PUK certificate. */
+static bool verify_puk_certificate(
+    const AvbAtxCertificate* certificate,
+    const uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
+    uint64_t minimum_version,
+    const uint8_t product_id[AVB_ATX_PRODUCT_ID_SIZE]) {
+  uint8_t expected_subject[AVB_SHA256_DIGEST_SIZE];
+  uint8_t expected_usage[AVB_SHA256_DIGEST_SIZE];
+
+  sha256_str("com.google.android.things.vboot.unlock", expected_usage);
+  if (!verify_certificate(
+          certificate, authority, minimum_version, expected_usage)) {
+    avb_error("Invalid PUK certificate.\n");
+    return false;
+  }
+  sha256(product_id, AVB_ATX_PRODUCT_ID_SIZE, expected_subject);
+  if (0 != avb_safe_memcmp(certificate->signed_data.subject,
+                           expected_subject,
+                           AVB_SHA256_DIGEST_SIZE)) {
+    avb_error("PUK: Product ID mismatch.\n");
     return false;
   }
   return true;
@@ -254,3 +284,118 @@ AvbIOResult avb_atx_validate_vbmeta_public_key(
   *out_is_trusted = true;
   return AVB_IO_RESULT_OK;
 }
+
+AvbIOResult avb_atx_generate_unlock_challenge(
+    AvbAtxOps* atx_ops, AvbAtxUnlockChallenge* out_unlock_challenge) {
+  AvbIOResult result = AVB_IO_RESULT_OK;
+  AvbAtxPermanentAttributes permanent_attributes;
+
+  /* We need the permanent attributes to compute the product_id_hash. */
+  result = atx_ops->read_permanent_attributes(atx_ops, &permanent_attributes);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to read permanent attributes.\n");
+    return result;
+  }
+  result = atx_ops->get_random(
+      atx_ops, AVB_ATX_UNLOCK_CHALLENGE_SIZE, last_unlock_challenge);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to generate random challenge.\n");
+    return result;
+  }
+  out_unlock_challenge->version = 1;
+  sha256(permanent_attributes.product_id,
+         AVB_ATX_PRODUCT_ID_SIZE,
+         out_unlock_challenge->product_id_hash);
+  avb_memcpy(out_unlock_challenge->challenge,
+             last_unlock_challenge,
+             AVB_ATX_UNLOCK_CHALLENGE_SIZE);
+  return result;
+}
+
+AvbIOResult avb_atx_validate_unlock_credential(
+    AvbAtxOps* atx_ops,
+    const AvbAtxUnlockCredential* unlock_credential,
+    bool* out_is_trusted) {
+  AvbIOResult result = AVB_IO_RESULT_OK;
+  AvbAtxPermanentAttributes permanent_attributes;
+  uint8_t permanent_attributes_hash[AVB_SHA256_DIGEST_SIZE];
+  uint64_t minimum_version;
+  const AvbAlgorithmData* algorithm_data;
+  uint8_t challenge_hash[AVB_SHA512_DIGEST_SIZE];
+
+  /* Be pessimistic so we can exit early without having to remember to clear.
+   */
+  *out_is_trusted = false;
+
+  /* Sanity check the credential. */
+  if (unlock_credential->version != 1) {
+    avb_error("Unsupported unlock credential format.\n");
+    return AVB_IO_RESULT_OK;
+  }
+
+  /* Read and verify permanent attributes. */
+  result = atx_ops->read_permanent_attributes(atx_ops, &permanent_attributes);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to read permanent attributes.\n");
+    return result;
+  }
+  result = atx_ops->read_permanent_attributes_hash(atx_ops,
+                                                   permanent_attributes_hash);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to read permanent attributes hash.\n");
+    return result;
+  }
+  if (!verify_permanent_attributes(&permanent_attributes,
+                                   permanent_attributes_hash)) {
+    return AVB_IO_RESULT_OK;
+  }
+
+  /* Verify the PIK certificate. */
+  result = atx_ops->ops->read_rollback_index(
+      atx_ops->ops, AVB_ATX_PIK_VERSION_LOCATION, &minimum_version);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to read PIK minimum version.\n");
+    return result;
+  }
+  if (!verify_pik_certificate(
+          &unlock_credential->product_intermediate_key_certificate,
+          permanent_attributes.product_root_public_key,
+          minimum_version)) {
+    return AVB_IO_RESULT_OK;
+  }
+
+  /* Verify the PUK certificate. The minimum version is shared with the PSK. */
+  result = atx_ops->ops->read_rollback_index(
+      atx_ops->ops, AVB_ATX_PSK_VERSION_LOCATION, &minimum_version);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to read PSK minimum version.\n");
+    return result;
+  }
+  if (!verify_puk_certificate(
+          &unlock_credential->product_unlock_key_certificate,
+          unlock_credential->product_intermediate_key_certificate.signed_data
+              .public_key,
+          minimum_version,
+          permanent_attributes.product_id)) {
+    return AVB_IO_RESULT_OK;
+  }
+
+  /* Verify the challenge signature. */
+  algorithm_data = avb_get_algorithm_data(AVB_ALGORITHM_TYPE_SHA512_RSA4096);
+  sha512(last_unlock_challenge, AVB_ATX_UNLOCK_CHALLENGE_SIZE, challenge_hash);
+  if (!avb_rsa_verify(unlock_credential->product_unlock_key_certificate
+                          .signed_data.public_key,
+                      AVB_ATX_PUBLIC_KEY_SIZE,
+                      unlock_credential->challenge_signature,
+                      AVB_RSA4096_NUM_BYTES,
+                      challenge_hash,
+                      AVB_SHA512_DIGEST_SIZE,
+                      algorithm_data->padding,
+                      algorithm_data->padding_len)) {
+    avb_error("Invalid unlock challenge signature.\n");
+    return AVB_IO_RESULT_OK;
+  }
+
+  *out_is_trusted = true;
+  return AVB_IO_RESULT_OK;
+}
diff --git a/lib/avb/libavb_user/Kconfig b/lib/avb/libavb_user/Kconfig
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb_user/Makefile b/lib/avb/libavb_user/Makefile
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb_user/avb_ops_user.c b/lib/avb/libavb_user/avb_ops_user.c
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb_user/avb_user_verification.c b/lib/avb/libavb_user/avb_user_verification.c
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb_user/avb_user_verity.c b/lib/avb/libavb_user/avb_user_verity.c
old mode 100644
new mode 100755
diff --git a/lib/avb/rk_avb_user/Kconfig b/lib/avb/rk_avb_user/Kconfig
old mode 100644
new mode 100755
diff --git a/lib/avb/rk_avb_user/Makefile b/lib/avb/rk_avb_user/Makefile
old mode 100644
new mode 100755
diff --git a/lib/avb/rk_avb_user/rk_avb_ops_user.c b/lib/avb/rk_avb_user/rk_avb_ops_user.c
old mode 100644
new mode 100755

commit 62b1148596a6b6d426748984fc540b2ee51ad497
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jun 11 19:57:12 2018 +0800

    fastboot: support oem at-get-vboot-unlock-challenge
    
    Change-Id: I34785710a3edc80fbc5e98d4a26c98f8bd12a15b
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index b1377df514..ded9d2db29 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -1326,6 +1326,22 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 #else
 		fastboot_tx_write_str("FAILnot implemented");
 		return;
+#endif
+	} else if (strncmp("at-get-vboot-unlock-challenge", cmd + 4, 29) == 0) {
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
+		uint32_t challenge_len = 0;
+		int ret = 0;
+
+		ret = rk_generate_unlock_challenge((void *)CONFIG_FASTBOOT_BUF_ADDR, &challenge_len);
+		if (ret == 0) {
+			upload_size = challenge_len;
+			fastboot_tx_write_str("OKAY");
+		} else {
+			fastboot_tx_write_str("FAILgenerate unlock challenge fail!");
+		}
+#else
+		fastboot_tx_write_str("FAILnot implemented");
+		return;
 #endif
 	} else if (strncmp("at-lock-vboot", cmd + 4, 13) == 0) {
 #ifdef CONFIG_RK_AVB_LIBAVB_USER

commit 57c7f8fe0d71f0d7e81cfdb66f5dc311f9b55d77
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jun 11 19:49:01 2018 +0800

    lib: avb: support generate unlock challenge
    
    Change-Id: Ia21746ec2bc729fd92ca7ea7a3320dfcbd4dd238
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/android_avb/rk_avb_ops_user.h b/include/android_avb/rk_avb_ops_user.h
index 099be41da8..76a4de6349 100644
--- a/include/android_avb/rk_avb_ops_user.h
+++ b/include/android_avb/rk_avb_ops_user.h
@@ -254,6 +254,19 @@ AvbABFlowResult rk_avb_ab_slot_select(AvbABOps* ab_ops,char select_slot[]);
  */
 int rk_auth_unlock(void *buffer, char *out_is_trusted);
 
+/**
+ * generate unlock challenge
+ *
+ * @param buffer: AvbAtxUnlockChallenge
+ *
+ * @param challenge_len: Challenge length
+ *
+ * @param out_is_trusted: true or false
+ *
+ * @return 0 if generate unlock challenge OK, -1 if not
+ */
+int rk_generate_unlock_challenge(void *buffer, uint32_t *challenge_len);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/lib/avb/rk_avb_user/rk_avb_ops_user.c b/lib/avb/rk_avb_user/rk_avb_ops_user.c
index a2279ae562..92e50c38dd 100644
--- a/lib/avb/rk_avb_user/rk_avb_ops_user.c
+++ b/lib/avb/rk_avb_user/rk_avb_ops_user.c
@@ -655,3 +655,24 @@ int rk_auth_unlock(void *buffer, char *out_is_trusted)
 	else
 		return -1;
 }
+
+int rk_generate_unlock_challenge(void *buffer, uint32_t *challenge_len)
+{
+	AvbOps* ops;
+	AvbIOResult result = AVB_IO_RESULT_OK;
+
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		avb_error("avb_ops_user_new() failed!");
+		return -1;
+	}
+
+	result = avb_atx_generate_unlock_challenge(ops->atx_ops,
+						   (AvbAtxUnlockChallenge *)buffer);
+	avb_ops_user_free(ops);
+	*challenge_len = sizeof(AvbAtxUnlockChallenge);
+	if (result == AVB_IO_RESULT_OK)
+		return 0;
+	else
+		return -1;
+}

commit 542316a9d41c8ee243546a37588a04afeb9718aa
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jun 11 19:23:33 2018 +0800

    fastboot: support authenticated unlock
    
    Change-Id: I1a92652ab031f370ff37b73dfd2d7e4b2ec957e7
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index b505ce9ce1..b1377df514 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -1341,16 +1341,28 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 	} else if (strncmp("at-unlock-vboot", cmd + 4, 15) == 0) {
 #ifdef CONFIG_RK_AVB_LIBAVB_USER
 		uint8_t lock_state;
+		char out_is_trusted;
+
 		if (rk_avb_read_lock_state(&lock_state))
 			fastboot_tx_write_str("FAILlock sate read failure");
 		if (lock_state >> 1 == 1) {
 			fastboot_tx_write_str("FAILThe vboot is disable!");
 		} else {
 			lock_state = 1;
-			if (rk_avb_write_lock_state(lock_state))
-				fastboot_tx_write_str("FAILwrite lock state failed");
-			else
-				fastboot_tx_write_str("OKAY");
+			if (rk_auth_unlock((void *)CONFIG_FASTBOOT_BUF_ADDR,
+					   &out_is_trusted)) {
+				printf("rk_auth_unlock ops error!\n");
+				fastboot_tx_write_str("FAILrk_auth_unlock ops error!");
+				return;
+			}
+			if (out_is_trusted == true) {
+				if (rk_avb_write_lock_state(lock_state))
+					fastboot_tx_write_str("FAILwrite lock state failed");
+				else
+					fastboot_tx_write_str("OKAY");
+			} else {
+				fastboot_tx_write_str("FAILauthenticated unlock fail");
+			}
 		}
 #else
 		fastboot_tx_write_str("FAILnot implemented");

commit 83ab7b4937c098a3febc8f361a6be16f28ae16aa
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jun 11 18:16:04 2018 +0800

    lib: avb: rk: add authenticated unlock interface
    
    Change-Id: Ib2aa1ac07d25f14aa08fc759ec99b6ba64d6abef
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/android_avb/rk_avb_ops_user.h b/include/android_avb/rk_avb_ops_user.h
index 48e1f58afe..099be41da8 100644
--- a/include/android_avb/rk_avb_ops_user.h
+++ b/include/android_avb/rk_avb_ops_user.h
@@ -243,6 +243,17 @@ int rk_avb_get_part_has_slot_info(const char *base_name);
 
 AvbABFlowResult rk_avb_ab_slot_select(AvbABOps* ab_ops,char select_slot[]);
 
+/**
+ * authenticated unlock
+ *
+ * @param buffer: AvbAtxUnlockCredential
+ *
+ * @param out_is_trusted: true or false
+ *
+ * @return 0 if authenticated unlock OK, -1 if not
+ */
+int rk_auth_unlock(void *buffer, char *out_is_trusted);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/lib/avb/rk_avb_user/rk_avb_ops_user.c b/lib/avb/rk_avb_user/rk_avb_ops_user.c
index 01cfb0c41a..a2279ae562 100644
--- a/lib/avb/rk_avb_user/rk_avb_ops_user.c
+++ b/lib/avb/rk_avb_user/rk_avb_ops_user.c
@@ -632,3 +632,26 @@ int rk_avb_get_part_has_slot_info(const char *base_name)
 	free(part_name);
 	return part_num;
 }
+
+int rk_auth_unlock(void *buffer, char *out_is_trusted)
+{
+	AvbOps* ops;
+
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		avb_error("avb_ops_user_new() failed!");
+		return -1;
+	}
+
+	if (avb_atx_validate_unlock_credential(ops->atx_ops,
+					   (AvbAtxUnlockCredential*)buffer,
+					   (bool*)out_is_trusted)) {
+		avb_ops_user_free(ops);
+		return -1;
+	}
+	avb_ops_user_free(ops);
+	if (*out_is_trusted == true)
+		return 0;
+	else
+		return -1;
+}

commit cb49af8fa64463a09a4cc77d49615cb0db50ee82
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Wed Jun 6 16:17:42 2018 +0800

    lib: optee_client: Change param when get share memory config
    
    Change-Id: I572bf900af26b2c2dcfce23e912b95aa729d786b
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/OpteeClientMem.c b/lib/optee_clientApi/OpteeClientMem.c
index 7ecb769e3e..969a5bb348 100644
--- a/lib/optee_clientApi/OpteeClientMem.c
+++ b/lib/optee_clientApi/OpteeClientMem.c
@@ -132,7 +132,7 @@ void OpteeClientMemInit(void)
 	ARM_SMC_ARGS ArmSmcArgs = {0};
 
 #ifdef CONFIG_OPTEE_V1
-	ArmSmcArgs.Arg0 = TEESMC_OPTEE_FUNCID_GET_SHM_CONFIG;
+	ArmSmcArgs.Arg0 = TEESMC32_OPTEE_FASTCALL_GET_SHM_CONFIG;
 #endif
 #ifdef CONFIG_OPTEE_V2
 	ArmSmcArgs.Arg0 = OPTEE_SMC_GET_SHM_CONFIG_V2;

commit 151a2fa402ae1ce587965c710d488af11472abea
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Mon Jun 11 15:12:29 2018 +0800

    rockchip: dts: rv1108-evb: add mipi display support
    
    Add lcd-e555hbm2-mipi display support for show logo
    on RK_MINIEVB_RV1108_V10.
    
    Change-Id: I1eb61a2977d68679835697e5400dbfb1f57bd70e
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/arch/arm/dts/rv1108-evb.dts b/arch/arm/dts/rv1108-evb.dts
index 51353c8fac..338a04534b 100644
--- a/arch/arm/dts/rv1108-evb.dts
+++ b/arch/arm/dts/rv1108-evb.dts
@@ -33,6 +33,44 @@
 		};
 	};
 
+	backlight: backlight {
+		compatible = "pwm-backlight";
+		pwms = <&pwm0 0 25000 0>;
+		default-brightness-level = <200>;
+		brightness-levels = <
+			  0   1   2   3   4   5   6   7
+			  8   9  10  11  12  13  14  15
+			 16  17  18  19  20  21  22  23
+			 24  25  26  27  28  29  30  31
+			 32  33  34  35  36  37  38  39
+			 40  41  42  43  44  45  46  47
+			 48  49  50  51  52  53  54  55
+			 56  57  58  59  60  61  62  63
+			 64  65  66  67  68  69  70  71
+			 72  73  74  75  76  77  78  79
+			 80  81  82  83  84  85  86  87
+			 88  89  90  91  92  93  94  95
+			 96  97  98  99 100 101 102 103
+			104 105 106 107 108 109 110 111
+			112 113 114 115 116 117 118 119
+			120 121 122 123 124 125 126 127
+			128 129 130 131 132 133 134 135
+			136 137 138 139 140 141 142 143
+			144 145 146 147 148 149 150 151
+			152 153 154 155 156 157 158 159
+			160 161 162 163 164 165 166 167
+			168 169 170 171 172 173 174 175
+			176 177 178 179 180 181 182 183
+			184 185 186 187 188 189 190 191
+			192 193 194 195 196 197 198 199
+			200 201 202 203 204 205 206 207
+			208 209 210 211 212 213 214 215
+			216 217 218 219 220 221 222 223
+			224 225 226 227 228 229 230 231
+			232 233 234 235 236 237 238 239
+			240 241 242 243 244 245 246 247
+			248 249 250 251 252 253 254 255>;
+	};
 
 	vcc5v0_otg: vcc5v0-otg-drv {
 		compatible = "regulator-fixed";
@@ -44,6 +82,86 @@
 	};
 };
 
+&display_subsystem {
+	status = "okay";
+};
+
+&dsi {
+	status = "okay";
+
+	panel: panel@0 {
+		compatible = "simple-panel-dsi";
+		reset-gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_LOW>;
+		enable-gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
+		prepare-delay-ms = <20>;
+		reset-delay-ms = <20>;
+		init-delay-ms = <20>;
+		enable-delay-ms = <20>;
+		reg =<0>;
+		dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
+			      MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
+		dsi,format = <MIPI_DSI_FMT_RGB888>;
+		dsi,lanes = <4>;
+		status = "okay";
+
+		panel-init-sequence = [
+			39 00 06 F0 55 AA 52 08 00
+			39 00 05 B0 0F 0F 1E 14
+			15 00 02 B2 00
+			15 00 02 B6 03
+			39 00 15 C0 03 00 06 07 08 09 00 00 00 00 02 00 0A 0B 0C 0D 00 00 00 00
+			39 00 11 C1 08 24 24 01 18 24 9F 85 08 24 24 01 18 24 95 85
+			39 00 19 C2 03 05 1B 24 13 31 01 05 1B 24 13 31 03 05 1B 38 00 11 02 05 1B 38 00 11
+			39 00 19 C3 02 05 1B 24 13 11 03 05 1B 24 13 11 03 05 1B 38 00 11 02 05 1B 38 00 11
+			39 00 06 F0 55 AA 52 08 01
+			15 00 02 B5 1E
+			15 00 02 B6 2D
+			15 00 02 B7 04
+			15 00 02 B8 05
+			15 00 02 B9 04
+			15 00 02 BA 14
+			15 00 02 BB 2F
+			15 00 02 BE 12
+			39 00 04 C2 00 35 07
+			39 00 06 F0 55 AA 52 08 02
+			15 00 02 C9 13
+			39 00 04 D4 02 04 2C
+			39 00 24 E1 00 91 AE CB E6 54 FF 1e 33 43 55 4F 66 78 8B 55 9D AC C0 CF 55 E0 e8 F2 FB AA 03 0D 15 1F AA 27 2C 31 34
+			39 00 24 E2 00 AD C6 E4 FD 55 11 2A 3B 49 55 54 6B 7C 8F 55 A1 AF C3 D1 55 E2 EA F3 FC AA 04 0E 15 20 AA 28 2D 32 35
+			39 00 24 E3 55 05 1E 37 4B 55 5A 64 72 7F 55 8B A3 B8 D1 A5 E4 F6 0E 23 AA 39 42 4F 59 AA 64 70 7A 86 AA 90 96 9C 9F
+			39 00 07 8F 5A 96 3C C3 A5 69
+			15 00 02 89 00
+			39 00 04 8C 55 49 53
+			15 00 02 9A 5A
+			39 00 05 FF A5 5A 13 86
+			39 00 03 FE 01 54
+			15 00 02 35 00
+			15 96 02 11 00
+			15 32 02 29 00
+		];
+
+		display-timings {
+			native-mode = <&timing_e555hbm2>;
+
+			timing_e555hbm2: timing0 {
+				clock-frequency = <62000000>;
+				hactive = <720>;
+				vactive = <1280>;
+				hsync-len = <4>;
+				hback-porch = <20>;
+				hfront-porch = <32>;
+				vsync-len = <4>;
+				vback-porch = <15>;
+				vfront-porch = <15>;
+				hsync-active = <0>;
+				vsync-active = <0>;
+				de-active = <0>;
+				pixelclk-active = <0>;
+			};
+		};
+	};
+};
+
 &gmac {
 	status = "okay";
 	clock_in_out = <0>;
@@ -52,6 +170,18 @@
 	snps,reset-gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_LOW>;
 };
 
+&mipi_dphy {
+	status = "okay";
+};
+
+&pwm0 {
+	status = "okay";
+};
+
+&route_dsi {
+	status = "okay";
+};
+
 &saradc {
 	status = "okay";
 };
@@ -98,6 +228,10 @@
 	status = "okay";
 };
 
+&vop {
+	status = "okay";
+};
+
 &i2c0 {
 	i2c-scl-rising-time-ns = <275>;
 	i2c-scl-falling-time-ns = <16>;

commit 3cf7b58c24548c63a248ac0ff65bbbca0358d05a
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Sat Jun 9 15:15:04 2018 +0800

    defconfig: rv1108: enable drm display drivers
    
    Change-Id: Id01979462e9ea0cf8329e3afbcdf83c16ca4c1fc
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig
index 53838f5638..2096487043 100644
--- a/configs/evb-rv1108_defconfig
+++ b/configs/evb-rv1108_defconfig
@@ -7,11 +7,13 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ROCKCHIP_RV1108=y
 CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_RKIMG_BOOTLOADER=y
+# CONFIG_USING_KERNEL_DTB is not set
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_TARGET_EVB_RV1108=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rv1108-evb"
 CONFIG_DEBUG_UART=y
+# CONFIG_CONSOLE_MUX is not set
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_FASTBOOT_BUF_ADDR=0x62000000
@@ -27,6 +29,7 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIME=y
 CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
 CONFIG_SPL_OF_PLATDATA=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_REGMAP=y
@@ -78,5 +81,9 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Rockchip"
 CONFIG_G_DNL_VENDOR_NUM=0x2207
 CONFIG_G_DNL_PRODUCT_NUM=0x110a
+CONFIG_DISPLAY=y
+CONFIG_DM_VIDEO=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y

commit a41197ef2ed4cc316c7749042a32ea618fe34135
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Tue May 29 14:27:29 2018 +0800

    rockchip: dts: rv1108: Add vop and mipi mipi-dphy node
    
    Change-Id: Ifa31422f96e98e47ca4857bf8bdee52c0756ca91
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/arch/arm/dts/rv1108.dtsi b/arch/arm/dts/rv1108.dtsi
index b9b15da5c2..5331c9a9ee 100644
--- a/arch/arm/dts/rv1108.dtsi
+++ b/arch/arm/dts/rv1108.dtsi
@@ -9,6 +9,8 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/clock/rv1108-cru.h>
 #include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/media/rockchip_mipi_dsi.h>
+#include <linux/media-bus-format.h>
 / {
 	#address-cells = <1>;
 	#size-cells = <1>;
@@ -41,6 +43,70 @@
 		interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
 	};
 
+	display_subsystem: display-subsystem {
+		compatible = "rockchip,display-subsystem";
+		ports = <&vop_out>;
+		status = "disabled";
+
+		route {
+			route_dsi: route-dsi {
+				status = "okay";
+				logo,uboot = "logo.bmp";
+				logo,kernel = "logo_kernel.bmp";
+				logo,mode = "center";
+				charge_logo,mode = "center";
+				connect = <&vop_out_mipi>;
+			};
+		};
+	};
+
+	mipi_dphy: mipi-dphy@0x20228000 {
+		compatible = "rockchip,rv1108-mipi-dphy";
+		reg = <0x20228000 0x8000>;
+		clock-output-names = "mipi_dphy_pll";
+		#clock-cells = <0>;
+		resets = <&cru PRST_MIPI_DSI_PHY>;
+		reset-names = "apb";
+		#phy-cells = <0>;
+		status = "disabled";
+	};
+
+	dsi: dsi@300e0000 {
+		compatible = "rockchip,rv1108-mipi-dsi";
+		reg = <0x300e0000 0x10000>;
+		interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru PCLK_MIPI_DSI>, <&mipi_dphy>;
+		clock-names = "pclk", "hs_clk";
+		resets = <&cru 127>;
+		reset-names = "apb";
+		phys = <&mipi_dphy>;
+		phy-names = "mipi_dphy";
+		rockchip,grf = <&grf>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&lcdc_mipi_data>;
+		status = "disabled";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				mipi_in_vop: endpoint@0 {
+					reg = <0>;
+					remote-endpoint = <&vop_out_mipi>;
+				};
+			};
+
+		};
+	};
+
 	timer {
 		compatible = "arm,armv7-timer";
 		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>,
@@ -448,6 +514,23 @@
 			};
 		};
 
+		gpio1_lcdc {
+			lcdc_mipi_data: lcdc-mipi_data {
+				rockchip,pins = <1 RK_PA0 RK_FUNC_1 &pcfg_pull_none>, /* DSI_CLKP */
+						<1 RK_PA1 RK_FUNC_1 &pcfg_pull_none>, /* DSI_CLKN */
+						<1 RK_PA2 RK_FUNC_1 &pcfg_pull_none>, /* D0P */
+						<1 RK_PA3 RK_FUNC_1 &pcfg_pull_none>, /* D0N */
+						<1 RK_PA4 RK_FUNC_1 &pcfg_pull_none>, /* D1P */
+						<1 RK_PA5 RK_FUNC_1 &pcfg_pull_none>, /* D1N */
+						<1 RK_PA6 RK_FUNC_1 &pcfg_pull_none>, /* D2P */
+						<1 RK_PA7 RK_FUNC_1 &pcfg_pull_none>, /* D2N */
+						<1 RK_PB0 RK_FUNC_1 &pcfg_pull_none>, /* D3P */
+						<1 RK_PB1 RK_FUNC_1 &pcfg_pull_none>, /* D3N */
+						<1 RK_PC1 RK_FUNC_1 &pcfg_pull_none>, /* D10 */
+						<1 RK_PC0 RK_FUNC_1 &pcfg_pull_none>; /* D11 */
+			};
+		};
+
 		i2c0 {
 			i2c0_xfer: i2c0-xfer {
 				rockchip,pins = <0 RK_PB1 RK_FUNC_1 &pcfg_pull_none_smt>,
@@ -599,4 +682,25 @@
 		       0x20200000 0x1f0
 		       0x20010000 0x78>;
         };
+
+	vop: vop@30040000 {
+		compatible = "rockchip,rv1108-vop";
+		reg = <0x30040000 0xe00>;
+		reg-names = "regs";
+		interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_VOP>, <&cru DCLK_VOP>,
+			 <&cru HCLK_VOP>;
+		clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
+		status = "disabled";
+
+		vop_out: port {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			vop_out_mipi: endpoint@0 {
+				reg = <0>;
+				remote-endpoint = <&mipi_in_vop>;
+			};
+		};
+	};
 };

commit 544f4e917b499d62abe1912c733db2d90f0e43ec
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Sat Jun 9 15:45:46 2018 +0800

    arm: dts: rv1108: Add pwm0 node support
    
    Change-Id: Id0bb2776abd70eaabff21bf6af950ef11bcf37cd
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/arch/arm/dts/rv1108.dtsi b/arch/arm/dts/rv1108.dtsi
index 37faa1859c..b9b15da5c2 100644
--- a/arch/arm/dts/rv1108.dtsi
+++ b/arch/arm/dts/rv1108.dtsi
@@ -160,6 +160,18 @@
 		status = "disabled";
 	};
 
+	pwm0: pwm@20040000 {
+		compatible = "rockchip,rk1108-pwm", "rockchip,rk3328-pwm";
+		reg = <0x20040000 0x10>;
+		interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm0_pin>;
+		clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
 	pmugrf: syscon@20060000 {
 		compatible = "rockchip,rv1108-pmugrf", "syscon";
 		reg = <0x20060000 0x1000>;
@@ -415,6 +427,12 @@
 			input-enable;
 		};
 
+		pwm0 {
+			pwm0_pin: pwm0-pin {
+				rockchip,pins = <0 RK_PC5 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
 		gmac {
 			rmii_pins: rmii-pins {
 				rockchip,pins = <1 RK_PC5 RK_FUNC_2 &pcfg_pull_none>,

commit 1abf41e2abb06ea21113373000080b09417869b3
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Tue Jun 5 20:44:49 2018 +0800

    video/drm: dphy: Add support for RV1108
    
    Change-Id: I86fe9df2e1fb74792a60eb672f664878a4134826
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_phy.c b/drivers/video/drm/rockchip_phy.c
index c6893a29ef..c7f147f826 100644
--- a/drivers/video/drm/rockchip_phy.c
+++ b/drivers/video/drm/rockchip_phy.c
@@ -40,6 +40,10 @@ static const struct udevice_id rockchip_phy_ids[] = {
 		.compatible = "rockchip,rk3368-mipi-dphy",
 		.data = (ulong)&rockchip_inno_mipi_dphy_data,
 	},
+	{
+		.compatible = "rockchip,rv1108-mipi-dphy",
+		.data = (ulong)&rockchip_inno_mipi_dphy_data,
+	},
 #endif
 	{}
 };

commit e6f516ad96dc86e9465681959bb8186f66c18291
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Tue Jun 5 16:42:25 2018 +0800

    video/drm: dsi: Add support for RV1108
    
    Change-Id: Iad3fa58ebbfc7395f7d72d17d79dcd56888dee6d
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index 4cd967fccd..04784d5d79 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -269,6 +269,7 @@ enum soc_type {
 	RK3366,
 	RK3368,
 	RK3399,
+	RV1108,
 };
 
 #define GRF_REG_FIELD(reg, lsb, msb)	((reg << 16) | (lsb << 8) | (msb))
@@ -1296,6 +1297,26 @@ static const struct rockchip_connector rk3399_mipi_dsi_data = {
 	 .data = &rk3399_mipi_dsi_drv_data,
 };
 
+static const u32 rv1108_dsi_grf_reg_fields[MAX_FIELDS] = {
+	[DPICOLORM]		= GRF_REG_FIELD(0x0410,  7,  7),
+	[DPISHUTDN]		= GRF_REG_FIELD(0x0410,  6,  6),
+	[DPIUPDATECFG]		= GRF_REG_FIELD(0x0410,  8,  8),
+	[FORCERXMODE]		= GRF_REG_FIELD(0x0414,  5,  5),
+	[FORCETXSTOPMODE]	= GRF_REG_FIELD(0x0414,  6,  9),
+	[TURNDISABLE]		= GRF_REG_FIELD(0x0414,  4,  4),
+};
+
+static const struct dw_mipi_dsi_plat_data rv1108_mipi_dsi_drv_data = {
+	.dsi0_grf_reg_fields = rv1108_dsi_grf_reg_fields,
+	.max_bit_rate_per_lane = 1000000000UL,
+	.soc_type = RV1108,
+};
+
+static const struct rockchip_connector rv1108_mipi_dsi_data = {
+	 .funcs = &rockchip_dw_mipi_dsi_funcs,
+	 .data = &rv1108_mipi_dsi_drv_data,
+};
+
 static const struct udevice_id rockchip_mipi_dsi_ids[] = {
 	{
 		.compatible = "rockchip,px30-mipi-dsi",
@@ -1321,6 +1342,10 @@ static const struct udevice_id rockchip_mipi_dsi_ids[] = {
 		.compatible = "rockchip,rk3399-mipi-dsi",
 		.data = (ulong)&rk3399_mipi_dsi_data,
 	},
+	{
+		.compatible = "rockchip,rv1108-mipi-dsi",
+		.data = (ulong)&rv1108_mipi_dsi_data,
+	},
 	{}
 };
 

commit fe49d27610cb521301d5e633e30b495989f62362
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Tue May 29 14:24:22 2018 +0800

    drm/rockchip: vop: add support rv1108
    
    rv1108 have one vop, support win0(scale) and win1(for ui)
    most register layout is similar with rk3366.
    
    Change-Id: Ifc1b8488ce18bdc579ae0db214d71c104708c206
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_crtc.c b/drivers/video/drm/rockchip_crtc.c
index 722998a68d..3fb1886df8 100644
--- a/drivers/video/drm/rockchip_crtc.c
+++ b/drivers/video/drm/rockchip_crtc.c
@@ -22,6 +22,11 @@ static const struct rockchip_crtc rk3036_vop_data = {
 	.data = &rk3036_vop,
 };
 
+static const struct rockchip_crtc rv1108_vop_data = {
+	.funcs = &rockchip_vop_funcs,
+	.data = &rv1108_vop,
+};
+
 static const struct rockchip_crtc px30_vop_lit_data = {
 	.funcs = &rockchip_vop_funcs,
 	.data = &px30_vop_lit,
@@ -81,6 +86,9 @@ static const struct udevice_id rockchip_vop_ids[] = {
 	{
 		.compatible = "rockchip,rk3036-vop",
 		.data = (ulong)&rk3036_vop_data,
+	}, {
+		.compatible = "rockchip,rv1108-vop",
+		.data = (ulong)&rv1108_vop_data,
 	}, {
 		.compatible = "rockchip,rk3126-vop",
 		.data = (ulong)&rk3036_vop_data,
diff --git a/drivers/video/drm/rockchip_crtc.h b/drivers/video/drm/rockchip_crtc.h
index 60ace69f5f..44a5012461 100644
--- a/drivers/video/drm/rockchip_crtc.h
+++ b/drivers/video/drm/rockchip_crtc.h
@@ -37,4 +37,5 @@ extern const struct vop_data rk3399_vop_big;
 extern const struct vop_data rk3399_vop_lit;
 extern const struct vop_data rk322x_vop;
 extern const struct vop_data rk3328_vop;
+extern const struct vop_data rv1108_vop;
 #endif
diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index 9445fb5d8d..8dee6129e1 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -602,3 +602,12 @@ const struct vop_data rk3308_vop = {
 	.line_flag = &rk3366_vop_lite_line_flag,
 	.reg_len = RK3366_LIT_FRC_LOWER01_0 * 4,
 };
+
+const struct vop_data rv1108_vop = {
+	.version = VOP_VERSION(2, 4),
+	.max_output = {1920, 1080},
+	.ctrl = &rk3308_ctrl_data,
+	.win = &rk3366_win0_data,
+	.line_flag = &rk3366_vop_lite_line_flag,
+	.reg_len = RK3366_LIT_FRC_LOWER01_0 * 4,
+};

commit 3fc26c82e81096f12426674e29e6b2d208b61780
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jun 7 11:56:37 2018 +0800

    board_r: initialize interrupt earlier
    
    Change-Id: I1c674efd0d1b7e8229179ac570727da9b4adab27
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/board_r.c b/common/board_r.c
index 582a155e98..6c4256a723 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -698,6 +698,12 @@ static init_fnc_t init_sequence_r[] = {
 	initr_noncached,
 #endif
 	bootstage_relocate,
+
+	interrupt_init,
+#ifdef CONFIG_ARM
+	initr_enable_interrupts,
+#endif
+
 #ifdef CONFIG_OF_LIVE
 	initr_of_live,
 #endif
@@ -812,10 +818,7 @@ static init_fnc_t init_sequence_r[] = {
 #ifdef CONFIG_CMD_KGDB
 	initr_kgdb,
 #endif
-	interrupt_init,
-#ifdef CONFIG_ARM
-	initr_enable_interrupts,
-#endif
+
 #if defined(CONFIG_MICROBLAZE) || defined(CONFIG_M68K)
 	timer_init,		/* initialize timer */
 #endif

commit 2eddc6d65fe490944427d89ac55f8de45717057d
Author: Caesar Wang <wxt@rock-chips.com>
Date:   Mon Jun 11 16:10:41 2018 +0800

    rockchip/rk3399: Fixes the typo
    
    Change-Id: I2133cae52c78edbead32ad57b47d22dfb12ab785
    Signed-off-by: Caesar Wang <wxt@rock-chips.com>

diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index 2f582a150a..20dfd2d71f 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -61,7 +61,7 @@
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x01f00000\0" \
 	"kernel_addr_r=0x02080000\0" \
-	"ramdisk_addr_r=0x0a200000\\0"
+	"ramdisk_addr_r=0x0a200000\0"
 
 #include <config_distro_bootcmd.h>
 #define CONFIG_EXTRA_ENV_SETTINGS \

commit 395ad7c88f0d7fd12921fc109f4ea92b15c56a4d
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Fri Jun 1 17:39:09 2018 +0800

    arm: dts: evb_rv1108: add adc-keys dt node
    
    Add adc-keys for download mode detection.
    
    Change-Id: Id38b7b716fe742c182cceb6921cd23b20c6e6e8e
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/dts/rv1108-evb.dts b/arch/arm/dts/rv1108-evb.dts
index 0203a9a5ef..51353c8fac 100644
--- a/arch/arm/dts/rv1108-evb.dts
+++ b/arch/arm/dts/rv1108-evb.dts
@@ -8,6 +8,7 @@
 
 #include "rv1108.dtsi"
 #include "rv1108-sdram-ddr3-400.dtsi"
+#include <dt-bindings/input/input.h>
 
 / {
 	model = "Rockchip RV1108 Evaluation board";
@@ -22,6 +23,17 @@
 		stdout-path = "serial2:1500000n8";
 	};
 
+	adc-keys {
+		compatible = "adc-keys";
+		io-channels = <&saradc 0>;
+		volup-key {
+			linux,code = <KEY_VOLUMEUP>;
+			label = "volume up";
+			press-threshold-microvolt = <18000>;
+		};
+	};
+
+
 	vcc5v0_otg: vcc5v0-otg-drv {
 		compatible = "regulator-fixed";
 		enable-active-high;

commit dfe03786591925e6b5fe6afc4a1c50140dc1495f
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Fri Jun 1 17:37:24 2018 +0800

    rockchip: rv1108: select BOARD_LATE_INIT
    
    Set bootup mode in board_late_init.
    
    Change-Id: I11eb28251bb1b7761397c6d4ee344f1b9755cc46
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 915f5fa6db..4501d4d6b3 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -250,6 +250,7 @@ config ROCKCHIP_RV1108
 	select CPU_V7
 	select SUPPORT_SPL
 	select SPL
+	select BOARD_LATE_INIT
 	help
 	  The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
 	  and a DSP.

commit d5d88d949f515f366e158b86f013516bdaccbdab
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Tue May 29 10:58:41 2018 +0800

    rockchip: rv1108: use RKIMG_BOOTCOMMAND
    
    Boot system by bootrkp or boot_android
    
    Change-Id: Ieea7aa778ae14a08f7c40c48a88822058a2985f5
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig
index ab5b68954a..53838f5638 100644
--- a/configs/evb-rv1108_defconfig
+++ b/configs/evb-rv1108_defconfig
@@ -6,6 +6,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ROCKCHIP_RV1108=y
 CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_TARGET_EVB_RV1108=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
@@ -13,15 +14,13 @@ CONFIG_DEFAULT_DEVICE_TREE="rv1108-evb"
 CONFIG_DEBUG_UART=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
-CONFIG_FASTBOOT=y
-CONFIG_USB_FUNCTION_FASTBOOT=y
-CONFIG_CMD_FASTBOOT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x62000000
 CONFIG_FASTBOOT_BUF_SIZE=0x08000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=1
 # CONFIG_CMD_IMLS is not set
 CONFIG_RANDOM_UUID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
@@ -34,8 +33,6 @@ CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
-CONFIG_PHY=y
-CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
@@ -45,6 +42,8 @@ CONFIG_SPI_FLASH_MTD=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_PMIC=y
 CONFIG_DM_REGULATOR_FIXED=y
@@ -56,6 +55,8 @@ CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_DM_RESET=y
+CONFIG_RKFLASH=y
+CONFIG_RKSFC_NOR=y
 CONFIG_BAUDRATE=1500000
 # CONFIG_SPL_SERIAL_PRESENT is not set
 CONFIG_DEBUG_UART_BASE=0x10210000
diff --git a/include/configs/evb_rv1108.h b/include/configs/evb_rv1108.h
index c02ce65b28..9b2a767f91 100644
--- a/include/configs/evb_rv1108.h
+++ b/include/configs/evb_rv1108.h
@@ -9,18 +9,10 @@
 
 #include <configs/rv1108_common.h>
 
-/*
- * Default environment settings
- */
-#define CONFIG_EXTRA_ENV_SETTINGS                                       \
-	"netdev=eth0\0"                                                 \
-	"ipaddr=172.16.12.50\0"                                         \
-	"serverip=172.16.12.69\0"					\
-	""
-#define CONFIG_BOOTCOMMAND						\
-	"sf probe;"							\
-	"sf read 0x62000000 0xc0000 0x500000;"				\
-	"dcache off;"							\
-	"go 0x62000000"
+#ifndef CONFIG_SPL_BUILD
+
+#undef CONFIG_BOOTCOMMAND
+#define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
+#endif
 
 #endif
diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h
index d0afa41a99..73b75b16c7 100644
--- a/include/configs/rv1108_common.h
+++ b/include/configs/rv1108_common.h
@@ -37,4 +37,21 @@
 /* rockchip ohci host driver */
 #define CONFIG_USB_OHCI_NEW
 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	1
+
+#ifndef CONFIG_SPL_BUILD
+
+#define ENV_MEM_LAYOUT_SETTINGS \
+	"scriptaddr=0x60000000\0" \
+	"fdt_addr_r=0x61f00000\0" \
+	"kernel_addr_r=0x62000000\0" \
+	"ramdisk_addr_r=0x64000000\0"
+
+#include <config_distro_bootcmd.h>
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	ENV_MEM_LAYOUT_SETTINGS \
+	"partitions=" PARTS_DEFAULT \
+	RKIMG_DET_BOOTDEV \
+	BOOTENV
+#endif
+
 #endif

commit f42a70b193dddf6bc9f746e341ff90ee1dec7701
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Tue May 29 10:57:30 2018 +0800

    rockchip: rv1108: switch to rksfc
    
    rksfc will emulate the spi nor flash as a block
    device, then we can access it via gpt partition.
    
    Change-Id: Idc9bb2532d8fcc82af03f451735a487ef22abe00
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/dts/rv1108-evb.dts b/arch/arm/dts/rv1108-evb.dts
index 2494548260..0203a9a5ef 100644
--- a/arch/arm/dts/rv1108-evb.dts
+++ b/arch/arm/dts/rv1108-evb.dts
@@ -45,14 +45,8 @@
 };
 
 &sfc {
+	compatible = "rockchip,rksfc";
 	status = "okay";
-	flash@0 {
-		compatible = "gd25q256","spi-flash";
-		reg = <0>;
-		spi-tx-bus-width = <1>;
-		spi-rx-bus-width = <4>;
-		spi-max-frequency = <96000000>;
-	};
 };
 
 &u2phy {

commit c791e8a87d6643c2b0a57b23224e34abb2610c6b
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Wed May 30 17:31:16 2018 +0800

    rockchip: rk3308: set text base to 0x00600000
    
    Memory layout now:
    -----------------
    |Offset| Blob   |
    -----------------
    |0M    | ATF    |
    -----------------
    |2M    | OP-TEE |
    -----------------
    |6M    | U-BOOT |
    -----------------
    
    Also remove unused SPL definition.
    
    Change-Id: I3daadd45267c90752de51aa6ec8ccdf1d5e1c2b3
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h
index 379e4a1789..e4756a043c 100644
--- a/include/configs/rk3308_common.h
+++ b/include/configs/rk3308_common.h
@@ -17,14 +17,10 @@
 
 #define CONFIG_SYS_NS16550_MEM32
 
-#define CONFIG_SYS_TEXT_BASE		0x00200000
-#define CONFIG_SYS_INIT_SP_ADDR		0x00300000
-#define CONFIG_SYS_LOAD_ADDR		0x00800800
+#define CONFIG_SYS_TEXT_BASE		0x00600000
+#define CONFIG_SYS_INIT_SP_ADDR		0x00700000
+#define CONFIG_SYS_LOAD_ADDR		0x00C00800
 #define CONFIG_SPL_STACK		0x00400000
-#define CONFIG_SPL_TEXT_BASE		0x00000000
-#define CONFIG_SPL_MAX_SIZE		0x10000
-#define CONFIG_SPL_BSS_START_ADDR	0x2000000
-#define CONFIG_SPL_BSS_MAX_SIZE		0x2000
 #define CONFIG_SYS_BOOTM_LEN		(64 << 20)	/* 64M */
 
 #define COUNTER_FREQUENCY		24000000

commit 9c629953c6415578cfbf5b51de0f8f0640b75d4b
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Wed Jun 6 17:03:21 2018 +0800

    defconfig: rockchip: rv1108: enable PMIC and regulator by default
    
    Change-Id: I8c144c507efa9bf3608d70554ab0866faa309e99
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig
index fe77072827..ab5b68954a 100644
--- a/configs/evb-rv1108_defconfig
+++ b/configs/evb-rv1108_defconfig
@@ -46,7 +46,13 @@ CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
+CONFIG_DM_PMIC=y
 CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_DM_RESET=y

commit 2fe2ebad16a535161c9a2bd560ba1bf2ddddfdf5
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Wed Jun 6 17:01:14 2018 +0800

    arm: rv1108: support rk805 setting voltage
    
    add rk805 and i2c dts node.
    support rk805 i2c read and write.
    
    Change-Id: I74d6a9f6ff5609ebdbc1a272cd044fdaa7041d7f
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/dts/rv1108-evb.dts b/arch/arm/dts/rv1108-evb.dts
index 568e082a53..2494548260 100644
--- a/arch/arm/dts/rv1108-evb.dts
+++ b/arch/arm/dts/rv1108-evb.dts
@@ -91,3 +91,125 @@
 &usb_host_ohci {
 	status = "okay";
 };
+
+&i2c0 {
+	i2c-scl-rising-time-ns = <275>;
+	i2c-scl-falling-time-ns = <16>;
+	clock-frequency = <200000>;
+	nack-retry = <1>;
+	status = "okay";
+
+	rk805: pmic@18 {
+		compatible = "rockchip,rk805";
+		status = "okay";
+		reg = <0x18>;
+		interrupt-parent = <&gpio1>;
+		interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pmic_int_l>;
+		rockchip,system-power-controller;
+		wakeup-source;
+		gpio-controller;
+		#gpio-cells = <2>;
+		#clock-cells = <1>;
+		clock-output-names = "xin32k", "rk805-clkout2";
+
+		pwrkey {
+			status = "okay";
+		};
+
+		regulators {
+			vdd_arm: DCDC_REG1 {
+				regulator-name = "vdd_arm";
+				regulator-min-microvolt = <712500>;
+				regulator-max-microvolt = <1450000>;
+				regulator-ramp-delay = <6001>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1000000>;
+				};
+			};
+
+			vdd_cam: DCDC_REG2 {
+				regulator-name = "vdd_cam";
+				regulator-min-microvolt = <712500>;
+				regulator-max-microvolt = <2000000>;
+				regulator-ramp-delay = <6001>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <2000000>;
+				};
+			};
+
+			vcc_ddr: DCDC_REG3 {
+				regulator-name = "vcc_ddr";
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+				};
+			};
+
+			vcc_io: DCDC_REG4 {
+				regulator-name = "vcc_io";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3300000>;
+				};
+			};
+
+			vdd_10: LDO_REG1 {
+				regulator-name = "vdd_10";
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1000000>;
+				};
+			};
+
+			vcc_18emmc: LDO_REG2 {
+				regulator-name = "vcc_18emmc";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vdd_10_pmu: LDO_REG3 {
+				regulator-name = "vdd_10_pmu";
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1000000>;
+				};
+			};
+		};
+	};
+};
+
+&pinctrl {
+	pmic {
+		pmic_int_l: pmic-int-l {
+		rockchip,pins =
+			<0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+};
diff --git a/arch/arm/dts/rv1108.dtsi b/arch/arm/dts/rv1108.dtsi
index ce6021a234..37faa1859c 100644
--- a/arch/arm/dts/rv1108.dtsi
+++ b/arch/arm/dts/rv1108.dtsi
@@ -18,6 +18,7 @@
 	interrupt-parent = <&gic>;
 
 	aliases {
+		i2c0 = &i2c0;
 		serial0 = &uart0;
 		serial1 = &uart1;
 		serial2 = &uart2;
@@ -171,7 +172,19 @@
 		#clock-cells = <1>;
 		#reset-cells = <1>;
 	};
-
+	i2c0: i2c@20000000 {
+		compatible = "rockchip,rv1108-i2c";
+		reg = <0x20000000 0x1000>;
+		interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+		rockchip,grf = <&grf>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&cru SCLK_I2C0_PMU>, <&cru PCLK_I2C0_PMU>;
+		clock-names = "i2c", "pclk";
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c0_xfer>;
+		status = "disabled";
+	};
 	usbgrf: syscon@202a0000 {
 		compatible = "rockchip,rv1108-usbgrf", "syscon";
 		reg = <0x202a0000 0x1000>;
@@ -384,6 +397,11 @@
 			drive-strength = <4>;
 		};
 
+		pcfg_pull_none_smt: pcfg-pull-none-smt {
+			bias-disable;
+			input-schmitt-enable;
+		};
+
 		pcfg_output_high: pcfg-output-high {
 			output-high;
 		};
@@ -412,6 +430,13 @@
 			};
 		};
 
+		i2c0 {
+			i2c0_xfer: i2c0-xfer {
+				rockchip,pins = <0 RK_PB1 RK_FUNC_1 &pcfg_pull_none_smt>,
+						<0 RK_PB2 RK_FUNC_1 &pcfg_pull_none_smt>;
+			};
+		};
+
 		i2c1 {
 			i2c1_xfer: i2c1-xfer {
 				rockchip,pins = <2 RK_PD3 RK_FUNC_1 &pcfg_pull_up>,
diff --git a/drivers/i2c/rk_i2c.c b/drivers/i2c/rk_i2c.c
index 482c3da644..f9d71fc1f1 100644
--- a/drivers/i2c/rk_i2c.c
+++ b/drivers/i2c/rk_i2c.c
@@ -399,6 +399,7 @@ static const struct udevice_id rockchip_i2c_ids[] = {
 	{ .compatible = "rockchip,rk3328-i2c" },
 	{ .compatible = "rockchip,rk3399-i2c" },
 	{ .compatible = "rockchip,rk3228-i2c" },
+	{ .compatible = "rockchip,rv1108-i2c" },
 	{ }
 };
 

commit 680c48344fec20ad0b7a348d4553e518c0a03ca7
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Wed Jun 6 16:50:42 2018 +0800

    clk: rockchip: rv1108: support i2c clk get and set rate
    
    Change-Id: Iff7e9191e66e0eff828b9ea51cb952ee7139457f
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rv1108.h b/arch/arm/include/asm/arch-rockchip/cru_rv1108.h
index b57c07e55e..3e752ab62e 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rv1108.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rv1108.h
@@ -128,6 +128,31 @@ enum {
 	CLK_DDR_DIV_CON_SHIFT		= 0,
 	CLK_DDR_DIV_CON_MASK		= 0x3 << CLK_DDR_DIV_CON_SHIFT,
 
+	/* CLKSEL_CON19 */
+	CLK_I2C1_PLL_SEL_SHIFT		= 15,
+	CLK_I2C1_PLL_SEL_MASK		= 1 << CLK_I2C1_PLL_SEL_SHIFT,
+	CLK_I2C1_PLL_SEL_DPLL		= 0,
+	CLK_I2C1_PLL_SEL_GPLL		= 1,
+	CLK_I2C1_DIV_CON_SHIFT		= 8,
+	CLK_I2C1_DIV_CON_MASK		= 0x7f << CLK_I2C1_DIV_CON_SHIFT,
+	CLK_I2C0_PLL_SEL_SHIFT		= 7,
+	CLK_I2C0_PLL_SEL_MASK		= 1 << CLK_I2C0_PLL_SEL_SHIFT,
+	CLK_I2C0_DIV_CON_SHIFT		= 0,
+	CLK_I2C0_DIV_CON_MASK		= 0x7f,
+	I2C_DIV_CON_WIDTH		= 7,
+
+	/* CLKSEL_CON20 */
+	CLK_I2C3_PLL_SEL_SHIFT		= 15,
+	CLK_I2C3_PLL_SEL_MASK		= 1 << CLK_I2C3_PLL_SEL_SHIFT,
+	CLK_I2C3_PLL_SEL_DPLL		= 0,
+	CLK_I2C3_PLL_SEL_GPLL		= 1,
+	CLK_I2C3_DIV_CON_SHIFT		= 8,
+	CLK_I2C3_DIV_CON_MASK		= 0x7f << CLK_I2C3_DIV_CON_SHIFT,
+	CLK_I2C2_PLL_SEL_SHIFT		= 7,
+	CLK_I2C2_PLL_SEL_MASK		= 1 << CLK_I2C2_PLL_SEL_SHIFT,
+	CLK_I2C2_DIV_CON_SHIFT		= 0,
+	CLK_I2C2_DIV_CON_MASK		= 0x7f,
+
 	/* CLKSEL_CON22 */
 	CLK_SARADC_DIV_CON_SHIFT	= 0,
 	CLK_SARADC_DIV_CON_MASK		= GENMASK(9, 0),
diff --git a/drivers/clk/rockchip/clk_rv1108.c b/drivers/clk/rockchip/clk_rv1108.c
index 266d012258..62c239283f 100644
--- a/drivers/clk/rockchip/clk_rv1108.c
+++ b/drivers/clk/rockchip/clk_rv1108.c
@@ -410,6 +410,80 @@ static ulong rv1108_pclk_peri_set_clk(struct rv1108_cru *cru, uint hz)
 	return rv1108_pclk_peri_get_clk(cru);
 }
 
+static ulong rv1108_i2c_get_clk(struct rv1108_cru *cru, ulong clk_id)
+{
+	u32 div, con;
+
+	switch (clk_id) {
+	case SCLK_I2C0_PMU:
+		con = readl(&cru->clksel_con[19]);
+		div = bitfield_extract(con, CLK_I2C0_DIV_CON_SHIFT,
+				       I2C_DIV_CON_WIDTH);
+		break;
+	case SCLK_I2C1:
+		con = readl(&cru->clksel_con[19]);
+		div = bitfield_extract(con, CLK_I2C1_DIV_CON_SHIFT,
+				       I2C_DIV_CON_WIDTH);
+		break;
+	case SCLK_I2C2:
+		con = readl(&cru->clksel_con[20]);
+		div = bitfield_extract(con, CLK_I2C2_DIV_CON_SHIFT,
+				       I2C_DIV_CON_WIDTH);
+		break;
+	case SCLK_I2C3:
+		con = readl(&cru->clksel_con[20]);
+		div = bitfield_extract(con, CLK_I2C3_DIV_CON_SHIFT,
+				       I2C_DIV_CON_WIDTH);
+		break;
+	default:
+		printf("do not support this i2c bus\n");
+		return -EINVAL;
+	}
+
+	return DIV_TO_RATE(GPLL_HZ, div);
+}
+
+static ulong rv1108_i2c_set_clk(struct rv1108_cru *cru, ulong clk_id, uint hz)
+{
+	int src_clk_div;
+
+	/* i2c0,4,8 src clock from ppll, i2c1,2,3,5,6,7 src clock from gpll*/
+	src_clk_div = GPLL_HZ / hz;
+	assert(src_clk_div - 1 <= 127);
+
+	switch (clk_id) {
+	case SCLK_I2C0_PMU:
+		rk_clrsetreg(&cru->clksel_con[19],
+			     CLK_I2C0_DIV_CON_MASK | CLK_I2C1_PLL_SEL_MASK,
+			     (src_clk_div << CLK_I2C0_DIV_CON_SHIFT) |
+			     (CLK_I2C1_PLL_SEL_GPLL << CLK_I2C1_PLL_SEL_SHIFT));
+		break;
+	case SCLK_I2C1:
+		rk_clrsetreg(&cru->clksel_con[19],
+			     CLK_I2C1_DIV_CON_MASK | CLK_I2C1_PLL_SEL_MASK,
+			     (src_clk_div << CLK_I2C1_DIV_CON_SHIFT) |
+			     (CLK_I2C1_PLL_SEL_GPLL << CLK_I2C1_PLL_SEL_SHIFT));
+		break;
+	case SCLK_I2C2:
+		rk_clrsetreg(&cru->clksel_con[20],
+			     CLK_I2C2_DIV_CON_MASK | CLK_I2C3_PLL_SEL_MASK,
+			     (src_clk_div << CLK_I2C2_DIV_CON_SHIFT) |
+			     (CLK_I2C3_PLL_SEL_GPLL << CLK_I2C3_PLL_SEL_SHIFT));
+		break;
+	case SCLK_I2C3:
+		rk_clrsetreg(&cru->clksel_con[20],
+			     CLK_I2C3_DIV_CON_MASK | CLK_I2C3_PLL_SEL_MASK,
+			     (src_clk_div << CLK_I2C3_DIV_CON_SHIFT) |
+			     (CLK_I2C3_PLL_SEL_GPLL << CLK_I2C3_PLL_SEL_SHIFT));
+		break;
+	default:
+		printf("do not support this i2c bus\n");
+		return -EINVAL;
+	}
+
+	return rv1108_i2c_get_clk(cru, clk_id);
+}
+
 static ulong rv1108_clk_get_rate(struct clk *clk)
 {
 	struct rv1108_clk_priv *priv = dev_get_priv(clk->dev);
@@ -433,6 +507,11 @@ static ulong rv1108_clk_get_rate(struct clk *clk)
 		return rv1108_hclk_peri_get_clk(priv->cru);
 	case PCLK_PERI:
 		return rv1108_pclk_peri_get_clk(priv->cru);
+	case SCLK_I2C0_PMU:
+	case SCLK_I2C1:
+	case SCLK_I2C2:
+	case SCLK_I2C3:
+		return rv1108_i2c_get_clk(priv->cru, clk->id);
 	default:
 		return -ENOENT;
 	}
@@ -474,6 +553,12 @@ static ulong rv1108_clk_set_rate(struct clk *clk, ulong rate)
 	case PCLK_PERI:
 		new_rate = rv1108_pclk_peri_set_clk(priv->cru, rate);
 		break;
+	case SCLK_I2C0_PMU:
+	case SCLK_I2C1:
+	case SCLK_I2C2:
+	case SCLK_I2C3:
+		new_rate = rv1108_i2c_set_clk(priv->cru, clk->id, rate);
+		break;
 	default:
 		return -ENOENT;
 	}

commit 1636e7c2d44abbfb7db4fa675149e822d0b2cc99
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Jun 5 10:45:19 2018 +0800

    clk: rockchip: rv1108: Make clock ids consistent with kernel
    
    Change-Id: Idd295c633dffbe2ed6c3f5b6e115b0fd5b040251
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/dts/rv1108.dtsi b/arch/arm/dts/rv1108.dtsi
index a4a673c846..ce6021a234 100644
--- a/arch/arm/dts/rv1108.dtsi
+++ b/arch/arm/dts/rv1108.dtsi
@@ -264,7 +264,7 @@
 		rockchip,grf = <&grf>;
 		clocks = <&cru SCLK_MAC>,
 			<&cru SCLK_MAC_RX>, <&cru SCLK_MAC_TX>,
-			<&cru SCLK_MACREF>, <&cru SCLK_MACREF_OUT>,
+			<&cru SCLK_MAC_REF>, <&cru SCLK_MAC_REFOUT>,
 			<&cru ACLK_GMAC>, <&cru PCLK_GMAC>;
                 clock-names = "stmmaceth",
                         "mac_clk_rx", "mac_clk_tx",
diff --git a/include/dt-bindings/clock/rv1108-cru.h b/include/dt-bindings/clock/rv1108-cru.h
index dcc6e42463..ff3688e827 100644
--- a/include/dt-bindings/clock/rv1108-cru.h
+++ b/include/dt-bindings/clock/rv1108-cru.h
@@ -14,7 +14,6 @@
 #define ARMCLK				3
 
 /* sclk gates (special clocks) */
-#define SCLK_MAC			64
 #define SCLK_SPI0			65
 #define SCLK_NANDC			67
 #define SCLK_SDMMC			68
@@ -35,23 +34,75 @@
 #define SCLK_SDMMC_SAMPLE		84
 #define SCLK_SDIO_SAMPLE		85
 #define SCLK_EMMC_SAMPLE		86
-#define SCLK_MAC_RX			87
-#define SCLK_MAC_TX			88
-#define SCLK_MACREF			89
-#define SCLK_MACREF_OUT			90
-#define SCLK_SARADC			91
+#define SCLK_VENC_CORE			87
+#define SCLK_HEVC_CORE			88
+#define SCLK_HEVC_CABAC			89
+#define SCLK_PWM0_PMU			90
+#define SCLK_I2C0_PMU			91
+#define SCLK_WIFI			92
+#define SCLK_CIFOUT			93
+#define SCLK_MIPI_CSI_OUT		94
+#define SCLK_CIF0			95
+#define SCLK_CIF1			96
+#define SCLK_CIF2			97
+#define SCLK_CIF3			98
+#define SCLK_DSP			99
+#define SCLK_DSP_IOP			100
+#define SCLK_DSP_EPP			101
+#define SCLK_DSP_EDP			102
+#define SCLK_DSP_EDAP			103
+#define SCLK_CVBS_HOST			104
+#define SCLK_HDMI_SFR			105
+#define SCLK_HDMI_CEC			106
+#define SCLK_CRYPTO			107
+#define SCLK_SPI			108
+#define SCLK_SARADC			109
+#define SCLK_TSADC			110
+#define SCLK_MAC_PRE			111
+#define SCLK_MAC			112
+#define SCLK_MAC_RX			113
+#define SCLK_MAC_REF			114
+#define SCLK_MAC_REFOUT			115
+#define SCLK_DSP_PFM			116
+#define SCLK_RGA			117
+#define SCLK_I2C1			118
+#define SCLK_I2C2			119
+#define SCLK_I2C3			120
+#define SCLK_PWM			121
+#define SCLK_ISP			122
+#define SCLK_USBPHY			123
+#define SCLK_I2S0_SRC			124
+#define SCLK_I2S1_SRC			125
+#define SCLK_I2S2_SRC			126
+#define SCLK_UART0_SRC			127
+#define SCLK_UART1_SRC			128
+#define SCLK_UART2_SRC			129
+#define SCLK_MAC_TX			130
 
-#define DCLK_VOP                        187
+#define DCLK_VOP_SRC			185
+#define DCLK_HDMIPHY			186
+#define DCLK_VOP			187
 
 /* aclk gates */
 #define ACLK_DMAC			192
 #define ACLK_PRE			193
 #define ACLK_CORE			194
 #define ACLK_ENMCORE			195
-#define ACLK_GMAC			196
-#define ACLK_VIO0                       200
-#define ACLK_VIO1                       201
-#define ACLK_PERI                       209
+#define ACLK_RKVENC			196
+#define ACLK_RKVDEC			197
+#define ACLK_VPU			198
+#define ACLK_CIF0			199
+#define ACLK_VIO0			200
+#define ACLK_VIO1			201
+#define ACLK_VOP			202
+#define ACLK_IEP			203
+#define ACLK_RGA			204
+#define ACLK_ISP			205
+#define ACLK_CIF1			206
+#define ACLK_CIF2			207
+#define ACLK_CIF3			208
+#define ACLK_PERI			209
+#define ACLK_GMAC			210
 
 /* pclk gates */
 #define PCLK_GPIO1			256
@@ -70,13 +121,24 @@
 #define PCLK_PWM			269
 #define PCLK_TIMER			270
 #define PCLK_PERI			271
-#define PCLK_GMAC			272
-#define PCLK_SARADC			273
-#define PCLK_VIO                        276
+#define PCLK_GPIO0_PMU			272
+#define PCLK_I2C0_PMU			273
+#define PCLK_PWM0_PMU			274
+#define PCLK_ISP			275
+#define PCLK_VIO			276
+#define PCLK_MIPI_DSI			277
+#define PCLK_HDMI_CTRL			278
+#define PCLK_SARADC			279
+#define PCLK_DSP_CFG			280
+#define PCLK_BUS			281
+#define PCLK_EFUSE0			282
+#define PCLK_EFUSE1			283
+#define PCLK_WDT			284
+#define PCLK_GMAC			285
 
 /* hclk gates */
 #define HCLK_I2S0_8CH			320
-#define HCLK_I2S1_8CH			321
+#define HCLK_I2S1_2CH			321
 #define HCLK_I2S2_2CH			322
 #define HCLK_NANDC			323
 #define HCLK_SDMMC			324
@@ -84,9 +146,25 @@
 #define HCLK_EMMC			326
 #define HCLK_PERI			327
 #define HCLK_SFC			328
-#define HCLK_VIO                        332
+#define HCLK_RKVENC			329
+#define HCLK_RKVDEC			330
+#define HCLK_CIF0			331
+#define HCLK_VIO			332
+#define HCLK_VOP			333
+#define HCLK_IEP			334
+#define HCLK_RGA			335
+#define HCLK_ISP			336
+#define HCLK_CRYPTO_MST			337
+#define HCLK_CRYPTO_SLV			338
+#define HCLK_HOST0			339
+#define HCLK_OTG			340
+#define HCLK_CIF1			341
+#define HCLK_CIF2			342
+#define HCLK_CIF3			343
+#define HCLK_BUS			344
+#define HCLK_VPU			345
 
-#define CLK_NR_CLKS			(HCLK_VIO + 1)
+#define CLK_NR_CLKS			(HCLK_VPU + 1)
 
 /* reset id */
 #define SRST_CORE_PO_AD		0

commit 4cda57496112483d201288a6cb1851a4591ae72a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 5 17:53:42 2018 +0800

    boot_rkimg: check recovery mode by env "reboot_mode"
    
    This is set when recovery key pressed.
    
    Change-Id: Id5fe334fafd67fec461c36df13b2e856e519a083
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 1e33a5e335..0252924c59 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -274,6 +274,18 @@ void board_run_recovery_wipe_data(void)
 	board_run_recovery();
 }
 
+/*
+ * Generally, we have 3 ways to get reboot mode:
+ *
+ * 1. from bootloader_message which is defined in MISC partition;
+ * 2. from CONFIG_ROCKCHIP_BOOT_MODE_REG which supports "reboot xxx" commands;
+ * 3. from env "reboot_mode" which is added by U-Boot code(currently only when
+ *    recovery key pressed);
+ *
+ * 1st and 2nd cases are static determined at system start and we check it once,
+ * while 3th case is dynamically added by U-Boot code, so we have to check it
+ * everytime.
+ */
 int rockchip_get_boot_mode(void)
 {
 	struct blk_desc *dev_desc;
@@ -283,6 +295,16 @@ int rockchip_get_boot_mode(void)
 		   * RK_BLK_SIZE;
 	int ret;
 	uint32_t reg_boot_mode;
+	char *env_reboot_mode;
+
+	/*
+	 * Here, we mainly check for:
+	 * In rockchip_dnl_mode_check(), that recovery key is pressed without
+	 * USB attach will do env_set("reboot_mode", "recovery");
+	 */
+	env_reboot_mode = env_get("reboot_mode");
+	if (env_reboot_mode && !strcmp(env_reboot_mode, "recovery"))
+		boot_mode = BOOT_MODE_RECOVERY;
 
 	if (boot_mode != -1)
 		return boot_mode;

commit 28f6607570203160ea22f2d1374ead776f2c4d1f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 5 17:52:13 2018 +0800

    rockchip: boot_mode: support enter recovery mode by key
    
    When recovery key is pressed without USB attach, enter
    recovery mode by env_set("reboot_mode", "recovery"), it
    would be used at boot flow.
    
    Change-Id: I8730ad16c3c4a530179f41d3c3e5683a2138d8a5
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index 9aa425a31d..9ae0611004 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -87,12 +87,17 @@ void devtype_num_envset(void)
 
 void rockchip_dnl_mode_check(void)
 {
-	if (rockchip_dnl_key_pressed() && rockchip_u2phy_vbus_detect()) {
-		printf("download key pressed, entering download mode...\n");
-		/* If failed, we fall back to bootrom download mode */
-		run_command_list("rockusb 0 ${devtype} ${devnum}", -1, 0);
-		set_back_to_bootrom_dnl_flag();
-		do_reset(NULL, 0, 0, NULL);
+	if (rockchip_dnl_key_pressed()) {
+		if (rockchip_u2phy_vbus_detect()) {
+			printf("download key pressed, entering download mode...\n");
+			/* If failed, we fall back to bootrom download mode */
+			run_command_list("rockusb 0 ${devtype} ${devnum}", -1, 0);
+			set_back_to_bootrom_dnl_flag();
+			do_reset(NULL, 0, 0, NULL);
+		} else {
+			printf("recovery key pressed, entering recovery mode!\n");
+			env_set("reboot_mode", "recovery");
+		}
 	}
 }
 

commit e09b1e4a58f9ee118f46daae5188bd0295974acc
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jun 1 17:46:16 2018 +0800

    bootm-fdt: fixup rk3288w compatible in fdt
    
    1. recoganize RK3288w according to HDMI Revision ID;
    2. proive a weak board_fdt_fixup() as common fixup place;
    3. move rockchip_display_fixup() into board_fdt_fixup();
    
    Change-Id: Ib3f4e991ffd7420a8f39390ae067340a65183a26
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/lib/bootm-fdt.c b/arch/arm/lib/bootm-fdt.c
index adf0d249f9..b693496d39 100644
--- a/arch/arm/lib/bootm-fdt.c
+++ b/arch/arm/lib/bootm-fdt.c
@@ -22,9 +22,6 @@
 #endif
 #include <asm/psci.h>
 #include <asm/spin_table.h>
-#ifdef CONFIG_DRM_ROCKCHIP
-#include <video_rockchip.h>
-#endif
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -35,6 +32,11 @@ __weak int fdt_update_ethernet_dt(void *blob)
 }
 #endif
 
+__weak int board_fdt_fixup(void *blob)
+{
+	return 0;
+}
+
 int arch_fixup_fdt(void *blob)
 {
 	int ret = 0;
@@ -78,9 +80,10 @@ int arch_fixup_fdt(void *blob)
 		return ret;
 #endif
 #endif
-#ifdef CONFIG_DRM_ROCKCHIP
-	rockchip_display_fixup(blob);
-#endif
+	ret = board_fdt_fixup(blob);
+	if (ret)
+		return ret;
+
 #ifdef CONFIG_FMAN_ENET
 	ret = fdt_update_ethernet_dt(blob);
 	if (ret)
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 4325098eb4..beb476a0c1 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -234,6 +234,27 @@ int board_init(void)
 	return rk_board_init();
 }
 
+int board_fdt_fixup(void *blob)
+{
+	__maybe_unused int ret = 0;
+
+#ifdef CONFIG_DRM_ROCKCHIP
+	rockchip_display_fixup(blob);
+#endif
+
+#ifdef CONFIG_ROCKCHIP_RK3288
+	/* RK3288W HDMI Revision ID is 0x1A */
+	if (readl(0xff980004) == 0x1A) {
+		ret = fdt_setprop_string(blob, 0,
+					 "compatible", "rockchip,rk3288w");
+		if (ret)
+			printf("fdt set compatible failed: %d\n", ret);
+	}
+#endif
+
+	return ret;
+}
+
 #if !defined(CONFIG_SYS_DCACHE_OFF) && !defined(CONFIG_ARM64)
 void enable_caches(void)
 {

commit c5ffdb29c3c0a456924555bb1d14e47c2b412205
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 5 16:35:34 2018 +0800

    rockchip: resource: fix resource double found issue
    
    It should not try to find dtb from resource partition depends
    on boot mode, otherwiser in boot normal mode, it try to load
    dtb from resource partition when we use boot.img(AOSP).
    
    Change-Id: Ic27bb76ecbf80794e8c7298d209f139176ccef78
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 0766f15bcc..faa85d022a 100644
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -160,7 +160,7 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 	int ret;
 	int e_num;
 	int offset = 0;
-	int mode = 0;
+	int resource_found = 0;
 	struct blk_desc *dev_desc;
 	disk_partition_t part_info;
 #ifdef CONFIG_ANDROID_BOOT_IMAGE
@@ -188,8 +188,7 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 
 #ifdef CONFIG_ANDROID_BOOT_IMAGE
 	/* Get boot mode from misc */
-	mode = rockchip_get_boot_mode();
-	if (mode == BOOT_MODE_RECOVERY)
+	if (rockchip_get_boot_mode() == BOOT_MODE_RECOVERY)
 		boot_partname = PART_RECOVERY;
 	/* Read boot/recovery and chenc if this is an AOSP img */
 #ifdef CONFIG_ANDROID_AB
@@ -206,7 +205,6 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 	if (ret < 0) {
 		printf("fail to get %s part\n", boot_partname);
 		/* RKIMG can support part table without 'boot' */
-		mode = 0;
 		goto next;
 	}
 	andr_hdr = (void *)hdr;
@@ -225,13 +223,12 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 		offset += ALIGN(andr_hdr->kernel_size, andr_hdr->page_size);
 		offset += ALIGN(andr_hdr->ramdisk_size, andr_hdr->page_size);
 		offset = offset / RK_BLK_SIZE;
-	} else {
-		/* Set mode to 0 in for recovery is not valid AOSP img */
-		mode = 0;
+
+		resource_found = 1;
 	}
 next:
 #endif
-	if (!mode) {
+	if (!resource_found) {
 		/* Read resource from Rockchip Resource partition */
 		ret = part_get_info_by_name(dev_desc, PART_RESOURCE,
 					 &part_info);

commit c701866bfcd4589e45c6eb1498318b77c4e30de5
Author: MengDongyang <daniel.meng@rock-chips.com>
Date:   Sun Jun 3 21:24:01 2018 -0700

    rockchip: dts: rv1108: delete property of usbgrf
    
    Delete property of usbgrf to make the driver use grf to
    refrence the base address only.
    
    Change-Id: I4601f6d263595eeabd861e5e01230bd8411bae83
    Signed-off-by: MengDongyang <daniel.meng@rock-chips.com>

diff --git a/arch/arm/dts/rv1108.dtsi b/arch/arm/dts/rv1108.dtsi
index da3123b8d1..a4a673c846 100644
--- a/arch/arm/dts/rv1108.dtsi
+++ b/arch/arm/dts/rv1108.dtsi
@@ -130,7 +130,6 @@
 		compatible = "rockchip,rv1108-usb2phy";
 		reg = <0x100 0x0c>;
 		rockchip,grf = <&grf>;
-		rockchip,usbgrf = <&usbgrf>;
 		#phy-cells = <1>;
 		status = "disabled";
 

commit 9482282bd7fd184e70888d4d3a119d4a0775a851
Author: MengDongyang <daniel.meng@rock-chips.com>
Date:   Sun Jun 3 21:13:26 2018 -0700

    phy: phy-rockchip-inno-usb2: correct the error of address for rv1108
    
    The driver of u2phy use either grf or usbgrf to detect charger type.
    But the register is divide into two parts both in grf and usbgrf in
    rv1108. So rebase the regitster in usbgrf to grf register to make
    sure that the driver can use a same base address.
    
    Change-Id: I90ac8164b4dce2412a21ed7b5a5180dca1e9af3c
    Signed-off-by: MengDongyang <daniel.meng@rock-chips.com>

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index ee06ae21eb..70bdcd1f4e 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -650,7 +650,7 @@ static const struct rockchip_usb2phy_cfg rv1108_phy_cfgs[] = {
 		.clkout_ctl	= { 0x108, 4, 4, 1, 0 },
 		.port_cfgs	= {
 			[USB2PHY_PORT_OTG] = {
-				.phy_sus	= { 0x0100, 8, 0, 0, 0x1d1 },
+				.phy_sus	= { 0x0ffa0100, 8, 0, 0, 0x1d1 },
 				.bvalid_det_en	= { 0x0680, 3, 3, 0, 1 },
 				.bvalid_det_st	= { 0x0690, 3, 3, 0, 1 },
 				.bvalid_det_clr = { 0x06a0, 3, 3, 0, 1 },
@@ -661,7 +661,7 @@ static const struct rockchip_usb2phy_cfg rv1108_phy_cfgs[] = {
 				.utmi_ls	= { 0x0804, 13, 12, 0, 1 },
 			},
 			[USB2PHY_PORT_HOST] = {
-				.phy_sus	= { 0x0104, 8, 0, 0, 0x1d1 },
+				.phy_sus	= { 0x0ffa0104, 8, 0, 0, 0x1d1 },
 				.ls_det_en	= { 0x0680, 4, 4, 0, 1 },
 				.ls_det_st	= { 0x0690, 4, 4, 0, 1 },
 				.ls_det_clr	= { 0x06a0, 4, 4, 0, 1 },
@@ -670,16 +670,16 @@ static const struct rockchip_usb2phy_cfg rv1108_phy_cfgs[] = {
 			}
 		},
 		.chg_det = {
-			.opmode		= { 0x0100, 3, 0, 5, 1 },
+			.opmode		= { 0x0ffa0100, 3, 0, 5, 1 },
 			.cp_det		= { 0x0804, 1, 1, 0, 1 },
 			.dcp_det	= { 0x0804, 0, 0, 0, 1 },
 			.dp_det		= { 0x0804, 2, 2, 0, 1 },
-			.idm_sink_en	= { 0x0108, 8, 8, 0, 1 },
-			.idp_sink_en	= { 0x0108, 7, 7, 0, 1 },
-			.idp_src_en	= { 0x0108, 9, 9, 0, 1 },
-			.rdm_pdwn_en	= { 0x0108, 10, 10, 0, 1 },
-			.vdm_src_en	= { 0x0108, 12, 12, 0, 1 },
-			.vdp_src_en	= { 0x0108, 11, 11, 0, 1 },
+			.idm_sink_en	= { 0x0ffa0108, 8, 8, 0, 1 },
+			.idp_sink_en	= { 0x0ffa0108, 7, 7, 0, 1 },
+			.idp_src_en	= { 0x0ffa0108, 9, 9, 0, 1 },
+			.rdm_pdwn_en	= { 0x0ffa0108, 10, 10, 0, 1 },
+			.vdm_src_en	= { 0x0ffa0108, 12, 12, 0, 1 },
+			.vdp_src_en	= { 0x0ffa0108, 11, 11, 0, 1 },
 		},
 	},
 	{ /* sentinel */ }

commit 564ab2efb0af171ff62022de8aa5df42be724b57
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jun 6 15:15:40 2018 +0800

    common: bootm: reserve memory bank
    
    Reserve lmb according to gd->bd->bi_dram.
    
    Change-Id: Ib1d4da95e826d3afe034bd3a90ec1d1c92a692bf
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/bootm.c b/common/bootm.c
index 5e1f7c218c..0bebb2d046 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -50,16 +50,23 @@ static const void *boot_get_kernel(cmd_tbl_t *cmdtp, int flag, int argc,
 #ifdef CONFIG_LMB
 static void boot_start_lmb(bootm_headers_t *images)
 {
-	ulong		mem_start;
-	phys_size_t	mem_size;
 
 	lmb_init(&images->lmb);
+#ifdef CONFIG_NR_DRAM_BANKS
+	int i;
+
+	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+		lmb_add(&images->lmb, gd->bd->bi_dram[i].start,
+			gd->bd->bi_dram[i].size);
+	}
+#else
+	ulong		mem_start;
+	phys_size_t	mem_size;
 
 	mem_start = env_get_bootm_low();
 	mem_size = env_get_bootm_size();
-
 	lmb_add(&images->lmb, (phys_addr_t)mem_start, mem_size);
-
+#endif
 	arch_lmb_reserve(&images->lmb);
 	board_lmb_reserve(&images->lmb);
 }

commit fa7f201ba7479ace62947bc801c5b60bc91cefa3
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jun 6 14:42:57 2018 +0800

    arm: bootm: reserve stack space
    
    BUG: LMB save the stack space according to the
    gd->bd->bi_dram[0], but sometimes the SDRAM is
    divided into several banks. The stack space is not
    in the bank0 but the high bank.
    
    SOLVE: use the gd->ram_top instead of gd->bd->bi_dram[0].
    
    Change-Id: I347c7dff279bab62754a5785fed0dd5b4c1464dd
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index 5c62d9c144..5e6336cbd8 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -64,7 +64,7 @@ void arch_lmb_reserve(struct lmb *lmb)
 	/* adjust sp by 4K to be safe */
 	sp -= 4096;
 	lmb_reserve(lmb, sp,
-		    gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size - sp);
+		    gd->ram_top - sp);
 }
 
 __weak void board_quiesce_devices(void)

commit 981b79162bacefa5d08f08caa210d293c7b6be3a
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Tue Jun 5 14:59:31 2018 +0800

    lib: optee_client: get share memory config to init
    
    Change-Id: I92fff248650ff239e050fb058ee095e9bed231c6
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/include/optee_include/teesmc_v2.h b/include/optee_include/teesmc_v2.h
index 43bcd1a7ee..840cd97861 100644
--- a/include/optee_include/teesmc_v2.h
+++ b/include/optee_include/teesmc_v2.h
@@ -85,5 +85,30 @@ typedef struct optee_msg_param_v2      t_teesmc32_param;
 
 #define OPTEE_MSG_RPC_CMD_FS_V2		2
 
+#define OPTEE_SMC_32_V2			0
+#define OPTEE_SMC_64_V2			0x40000000
+#define OPTEE_SMC_FAST_CALL_V2		0x80000000
+#define OPTEE_SMC_STD_CALL_V2		0
+
+#define OPTEE_SMC_OWNER_MASK_V2		0x3F
+#define OPTEE_SMC_OWNER_SHIFT_V2		24
+
+#define OPTEE_SMC_FUNC_MASK_V2		0xFFFF
+
+#define OPTEE_SMC_OWNER_TRUSTED_OS_V2	50
+
+#define OPTEE_SMC_FUNCID_GET_SHM_CONFIG_V2	7
+#define OPTEE_SMC_GET_SHM_CONFIG_V2 \
+	OPTEE_SMC_FAST_CALL_VAL_V2(OPTEE_SMC_FUNCID_GET_SHM_CONFIG_V2)
+
+#define OPTEE_SMC_FAST_CALL_VAL_V2(func_num) \
+	OPTEE_SMC_CALL_VAL_V2(OPTEE_SMC_32_V2, OPTEE_SMC_FAST_CALL_V2, \
+			   OPTEE_SMC_OWNER_TRUSTED_OS_V2, (func_num))
+
+#define OPTEE_SMC_CALL_VAL_V2(type, calling_convention, owner, func_num) \
+			((type) | (calling_convention) | \
+			(((owner) & OPTEE_SMC_OWNER_MASK_V2) << \
+				OPTEE_SMC_OWNER_SHIFT_V2) |\
+			((func_num) & OPTEE_SMC_FUNC_MASK_V2))
 
 #endif /* TEESMC_V2_H */
diff --git a/lib/optee_clientApi/OpteeClientMem.c b/lib/optee_clientApi/OpteeClientMem.c
index e78b603f29..7ecb769e3e 100644
--- a/lib/optee_clientApi/OpteeClientMem.c
+++ b/lib/optee_clientApi/OpteeClientMem.c
@@ -7,6 +7,10 @@
 #include <common.h>
 #include <stdlib.h>
 #include <optee_include/OpteeClientMem.h>
+#include <optee_include/OpteeClientRPC.h>
+#include <optee_include/teesmc.h>
+#include <optee_include/teesmc_optee.h>
+#include <optee_include/teesmc_v2.h>
 
 void *my_mem_start;
 uint32_t my_count;
@@ -125,17 +129,21 @@ void my_free(void *ptr)
  */
 void OpteeClientMemInit(void)
 {
-#ifdef CONFIG_ARM64
-	debug(" OpteeClientMemInit 64\n");
-	my_malloc_init((void *)0x09e10000, 0x003e0000);
-#else
-	debug(" OpteeClientMemInit 32\n");
-#ifdef CONFIG_ROCKCHIP_RK3288
-	my_malloc_init((void *)0x0910a000, 0x000e0000);
-#else
-	my_malloc_init((void *)0x6910a000, 0x000e0000);
+	ARM_SMC_ARGS ArmSmcArgs = {0};
+
+#ifdef CONFIG_OPTEE_V1
+	ArmSmcArgs.Arg0 = TEESMC_OPTEE_FUNCID_GET_SHM_CONFIG;
 #endif
+#ifdef CONFIG_OPTEE_V2
+	ArmSmcArgs.Arg0 = OPTEE_SMC_GET_SHM_CONFIG_V2;
 #endif
+
+	tee_smc_call(&ArmSmcArgs);
+
+	printf("get share memory, arg0=0x%x arg1=0x%x arg2=0x%x arg3=0x%x",
+			ArmSmcArgs.Arg0, ArmSmcArgs.Arg1, ArmSmcArgs.Arg2, ArmSmcArgs.Arg3);
+
+	my_malloc_init((void *)(size_t)ArmSmcArgs.Arg1, ArmSmcArgs.Arg2);
 }
 
 /*

commit 69285f9ef7a2b3e2194a60eaabefe96dd82b320a
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Thu May 31 10:25:53 2018 +0800

    cmd: mmc: remove test vboot hash code
    
    trusty_write_vbootkey_hash will set secure boot flag
    when we write vboot key hash success, we should remove it
    
    Change-Id: I7b45739918b10b6847a7f5bf6b7c740f3b802870
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/cmd/mmc.c b/cmd/mmc.c
index 8d320fa122..74b379ebf3 100644
--- a/cmd/mmc.c
+++ b/cmd/mmc.c
@@ -189,15 +189,6 @@ static int do_mmc_testefuse(cmd_tbl_t *cmdtp,
 
 	trusty_read_attribute_hash(outbuf32, 8);
 
-	printf(" 0x%x  0x%x  0x%x  0x%x \n",
-		outbuf32[0], outbuf32[1], outbuf32[2], outbuf32[3]);
-	printf(" 0x%x  0x%x  0x%x  0x%x \n",
-		outbuf32[4], outbuf32[5], outbuf32[6], outbuf32[7]);
-
-	trusty_write_vbootkey_hash(buf32, 8);
-
-	trusty_read_vbootkey_hash(outbuf32, 8);
-
 	printf(" 0x%x  0x%x  0x%x  0x%x \n",
 		outbuf32[0], outbuf32[1], outbuf32[2], outbuf32[3]);
 	printf(" 0x%x  0x%x  0x%x  0x%x \n",

commit f303baf0d8d327fa53781870689349fcd21098b8
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Wed May 30 08:47:04 2018 +0800

    lib: optee_client: optee os v1 support multi file system
    
    Change-Id: I78487659e9fb5b9f2b5d468d587cd00756fdb98c
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index 0632b33733..e5400a2ed6 100644
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -44,12 +44,7 @@ void test_optee(void)
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
-#ifdef CONFIG_OPTEE_V1
-				NULL,
-#endif
-#ifdef CONFIG_OPTEE_V2
 				&TeecOperation,
-#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -159,12 +154,8 @@ uint32_t trusty_read_rollback_index(uint32_t slot, uint64_t *value)
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
-#ifdef CONFIG_OPTEE_V1
-				NULL,
-#endif
-#ifdef CONFIG_OPTEE_V2
 				&TeecOperation,
-#endif
+
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -246,12 +237,7 @@ uint32_t trusty_write_rollback_index(uint32_t slot, uint64_t value)
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
-#ifdef CONFIG_OPTEE_V1
-				NULL,
-#endif
-#ifdef CONFIG_OPTEE_V2
 				&TeecOperation,
-#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -334,12 +320,7 @@ uint32_t trusty_read_permanent_attributes(uint8_t *attributes, uint32_t size)
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
-#ifdef CONFIG_OPTEE_V1
-				NULL,
-#endif
-#ifdef CONFIG_OPTEE_V2
 				&TeecOperation,
-#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -418,12 +399,7 @@ uint32_t trusty_write_permanent_attributes(uint8_t *attributes, uint32_t size)
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
-#ifdef CONFIG_OPTEE_V1
-				NULL,
-#endif
-#ifdef CONFIG_OPTEE_V2
 				&TeecOperation,
-#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -503,12 +479,7 @@ uint32_t trusty_read_lock_state(uint8_t *lock_state)
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
-#ifdef CONFIG_OPTEE_V1
-				NULL,
-#endif
-#ifdef CONFIG_OPTEE_V2
 				&TeecOperation,
-#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -587,12 +558,7 @@ uint32_t trusty_write_lock_state(uint8_t lock_state)
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
-#ifdef CONFIG_OPTEE_V1
-				NULL,
-#endif
-#ifdef CONFIG_OPTEE_V2
 				&TeecOperation,
-#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -672,12 +638,7 @@ uint32_t trusty_read_flash_lock_state(uint8_t *flash_lock_state)
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
-#ifdef CONFIG_OPTEE_V1
-				NULL,
-#endif
-#ifdef CONFIG_OPTEE_V2
 				&TeecOperation,
-#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -757,12 +718,7 @@ uint32_t trusty_write_flash_lock_state(uint8_t flash_lock_state)
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
-#ifdef CONFIG_OPTEE_V1
-				NULL,
-#endif
-#ifdef CONFIG_OPTEE_V2
 				&TeecOperation,
-#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -845,12 +801,7 @@ TEEC_Result read_from_keymaster(uint8_t *filename,
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
-#ifdef CONFIG_OPTEE_V1
-				NULL,
-#endif
-#ifdef CONFIG_OPTEE_V2
 				&TeecOperation,
-#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -933,12 +884,7 @@ uint32_t write_to_keymaster(uint8_t *filename,
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
-#ifdef CONFIG_OPTEE_V1
-				NULL,
-#endif
-#ifdef CONFIG_OPTEE_V2
 				&TeecOperation,
-#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -1377,12 +1323,7 @@ uint32_t trusty_read_permanent_attributes_flag(uint8_t *attributes)
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
-#ifdef CONFIG_OPTEE_V1
-				NULL,
-#endif
-#ifdef CONFIG_OPTEE_V2
 				&TeecOperation,
-#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -1460,12 +1401,7 @@ uint32_t trusty_write_permanent_attributes_flag(uint8_t attributes)
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
-#ifdef CONFIG_OPTEE_V1
-				NULL,
-#endif
-#ifdef CONFIG_OPTEE_V2
 				&TeecOperation,
-#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -1546,12 +1482,7 @@ uint32_t trusty_attest_dh(uint8_t *dh, uint32_t *dh_size)
 				      TeecUuid,
 				      TEEC_LOGIN_PUBLIC,
 				      NULL,
-#ifdef CONFIG_OPTEE_V1
-					NULL,
-#endif
-#ifdef CONFIG_OPTEE_V2
 					&TeecOperation,
-#endif
 				      &ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -1620,12 +1551,7 @@ uint32_t trusty_attest_uuid(uint8_t *uuid, uint32_t *uuid_size)
 				      TeecUuid,
 				      TEEC_LOGIN_PUBLIC,
 				      NULL,
-#ifdef CONFIG_OPTEE_V1
-					NULL,
-#endif
-#ifdef CONFIG_OPTEE_V2
 					&TeecOperation,
-#endif
 				      &ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -1701,12 +1627,7 @@ uint32_t trusty_attest_get_ca(uint8_t *operation_start,
 				      TeecUuid,
 				      TEEC_LOGIN_PUBLIC,
 				      NULL,
-#ifdef CONFIG_OPTEE_V1
-					NULL,
-#endif
-#ifdef CONFIG_OPTEE_V2
 					&TeecOperation,
-#endif
 				      &ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -1782,12 +1703,7 @@ uint32_t trusty_attest_set_ca(uint8_t *ca_response, uint32_t *ca_response_size)
 					TeecUuid,
 					TEEC_LOGIN_PUBLIC,
 					NULL,
-#ifdef CONFIG_OPTEE_V1
-					NULL,
-#endif
-#ifdef CONFIG_OPTEE_V2
 					&TeecOperation,
-#endif
 					&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};

commit 58737b30a231f0ca62858c9c44ec950ac9fe530d
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Wed May 30 08:46:10 2018 +0800

    lib: optee_client: update keymaster TA
    
    compile form keymaster 8.0/develop commit:ddd71dca
    Features:
            ddd71dca ta: support emmc/nand storage for keymaster & gatekeeper
            2692c551 Update export-user_ta/ to support dual filesystems
            bc288722 keymaster: uboot write data overwrite
    
    Change-Id: I51b84f62db15bd4825035089dbb6ee38d11d4cac
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta
index 7de07bb0cf..dfdefc81d8 100644
Binary files a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta and b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta differ

commit dce239c78748169efcfad7615226f133a7436fdf
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 5 15:28:32 2018 +0800

    rockchip: vendor: fix typo 'Vednor' -> 'Vendor'
    
    Change-Id: I1fb7eec71ef9f1f24c6404534a8e4b99193ddeb7
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/vendor.c b/arch/arm/mach-rockchip/vendor.c
index ecaeea98b0..cef6e5254d 100644
--- a/arch/arm/mach-rockchip/vendor.c
+++ b/arch/arm/mach-rockchip/vendor.c
@@ -124,7 +124,7 @@ static int vendor_ops(u8 *buffer, u32 addr, u32 n_sec, int write)
 		 * ----------------------------------------------------
 		 */
 		lba = EMMC_VENDOR_PART_OFFSET;
-		debug("[Vednor INFO]:VendorStorage offset address=0x%x\n", lba);
+		debug("[Vendor INFO]:VendorStorage offset address=0x%x\n", lba);
 		break;
 	case IF_TYPE_RKNAND:
 	case IF_TYPE_SPINOR:
@@ -139,17 +139,17 @@ static int vendor_ops(u8 *buffer, u32 addr, u32 n_sec, int write)
 		 * ----------------------------------------------------
 		 */
 		lba = FLASH_VENDOR_PART_OFFSET;
-		debug("[Vednor INFO]:VendorStorage offset address=0x%x\n", lba);
+		debug("[Vendor INFO]:VendorStorage offset address=0x%x\n", lba);
 		break;
 	default:
-		printf("[Vednor ERROR]:Boot device type is invalid!\n");
+		printf("[Vendor ERROR]:Boot device type is invalid!\n");
 		return -ENODEV;
 	}
 	if (write)
 		ret = blk_dwrite(dev_desc, lba + addr, n_sec, buffer);
 	else
 		ret = blk_dread(dev_desc, lba + addr, n_sec, buffer);
-	debug("[Vednor INFO]:op=%s, ret=%d\n", write ? "write" : "read", ret);
+	debug("[Vendor INFO]:op=%s, ret=%d\n", write ? "write" : "read", ret);
 
 	return ret;
 }
@@ -182,7 +182,7 @@ int vendor_storage_init(void)
 
 	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {
-		printf("[Vednor ERROR]:Invalid boot device type(%d)\n",
+		printf("[Vendor ERROR]:Invalid boot device type(%d)\n",
 		       bootdev_type);
 		return -ENODEV;
 	}
@@ -205,7 +205,7 @@ int vendor_storage_init(void)
 		version2_offset = FLASH_VENDOR_VERSION2_OFFSET;
 		break;
 	default:
-		debug("[Vednor ERROR]:Boot device type is invalid!\n");
+		debug("[Vendor ERROR]:Boot device type is invalid!\n");
 		ret = -ENODEV;
 		break;
 	}
@@ -219,7 +219,7 @@ int vendor_storage_init(void)
 	/* Always use, no need to release */
 	buffer = (u8 *)malloc(size);
 	if (!buffer) {
-		printf("[Vednor ERROR]:Malloc failed!\n");
+		printf("[Vendor ERROR]:Malloc failed!\n");
 		return -ENOMEM;
 	}
 	/* Pointer initialization */
@@ -244,7 +244,7 @@ int vendor_storage_init(void)
 		}
 	}
 	if (max_ver) {
-		debug("[Vednor INFO]:max_ver=%d, vendor_id=%d.\n", max_ver, max_index);
+		debug("[Vendor INFO]:max_ver=%d, vendor_id=%d.\n", max_ver, max_index);
 		/*
 		 * Keep vendor_info the same as the largest
 		 * version of vendor
@@ -255,7 +255,7 @@ int vendor_storage_init(void)
 				return -EIO;
 		}
 	} else {
-		debug("[Vednor INFO]:Reset vendor info...\n");
+		debug("[Vendor INFO]:Reset vendor info...\n");
 		memset((u8 *)vendor_info.hdr, 0, size);
 		vendor_info.hdr->version = 1;
 		vendor_info.hdr->tag = VENDOR_TAG;
@@ -265,7 +265,7 @@ int vendor_storage_init(void)
 			- (u32)(size_t)vendor_info.data);
 		*(vendor_info.version2) = vendor_info.hdr->version;
 	}
-	debug("[Vednor INFO]:ret=%d.\n", ret);
+	debug("[Vendor INFO]:ret=%d.\n", ret);
 
 #ifdef VENDOR_STORAGE_TEST
 	if (vendor_storage_test())
@@ -303,7 +303,7 @@ int vendor_storage_read(u16 id, void *pbuf, u16 size)
 	item = vendor_info.item;
 	for (i = 0; i < vendor_info.hdr->item_num; i++) {
 		if ((item + i)->id == id) {
-			debug("[Vednor INFO]:Find the matching item, id=%d\n", id);
+			debug("[Vendor INFO]:Find the matching item, id=%d\n", id);
 			/* Correct the size value */
 			if (size > (item + i)->size)
 				size = (item + i)->size;
@@ -312,7 +312,7 @@ int vendor_storage_read(u16 id, void *pbuf, u16 size)
 			return size;
 		}
 	}
-	debug("[Vednor ERROR]:No matching item, id=%d\n", id);
+	debug("[Vendor ERROR]:No matching item, id=%d\n", id);
 
 	return -EINVAL;
 }
@@ -371,7 +371,7 @@ int vendor_storage_write(u16 id, void *pbuf, u16 size)
 	/* If item already exist, update the item data */
 	for (i = 0; i < vendor_info.hdr->item_num; i++) {
 		if ((item + i)->id == id) {
-			debug("[Vednor INFO]:Find the matching item, id=%d\n", id);
+			debug("[Vendor INFO]:Find the matching item, id=%d\n", id);
 			offset = (item + i)->offset;
 			memcpy((vendor_info.data + offset), pbuf, size);
 			(item + i)->size = size;
@@ -390,7 +390,7 @@ int vendor_storage_write(u16 id, void *pbuf, u16 size)
 	 */
 	if ((vendor_info.hdr->item_num < max_item_num) &&
 	    (vendor_info.hdr->free_size >= align_size)) {
-		debug("[Vednor INFO]:Create new Item, id=%d\n", id);
+		debug("[Vendor INFO]:Create new Item, id=%d\n", id);
 		item = vendor_info.item + vendor_info.hdr->item_num;
 		item->id = id;
 		item->offset = vendor_info.hdr->free_offset;
@@ -409,7 +409,7 @@ int vendor_storage_write(u16 id, void *pbuf, u16 size)
 		cnt = vendor_ops((u8 *)vendor_info.hdr, part_size * next_index, part_size, 1);
 		return (cnt == part_size) ? size : -EIO;
 	}
-	debug("[Vednor ERROR]:Vendor has no space left!\n");
+	debug("[Vendor ERROR]:Vendor has no space left!\n");
 
 	return -ENOMEM;
 }

commit 72c2cf15e0deb2013a641a69f90d4f4ef91ce608
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 5 15:25:41 2018 +0800

    rockchip: vendor: fix return value error
    
    1. initialize global variant bootdev_type;
    2. fix return value;
    
    Change-Id: I0f20ff931c5896be06e802cffbc1b4a7a6848c94
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/vendor.c b/arch/arm/mach-rockchip/vendor.c
index 7848d71660..ecaeea98b0 100644
--- a/arch/arm/mach-rockchip/vendor.c
+++ b/arch/arm/mach-rockchip/vendor.c
@@ -212,6 +212,10 @@ int vendor_storage_init(void)
 	/* Invalid bootdev type */
 	if (ret)
 		return ret;
+
+	/* Initialize */
+	bootdev_type = dev_desc->if_type;
+
 	/* Always use, no need to release */
 	buffer = (u8 *)malloc(size);
 	if (!buffer) {
@@ -228,8 +232,8 @@ int vendor_storage_init(void)
 	/* Find valid and up-to-date one from (vendor0 - vendor3) */
 	for (i = 0; i < VENDOR_PART_NUM; i++) {
 		ret = vendor_ops((u8 *)vendor_info.hdr, part_size * i, part_size, 0);
-		if (ret < 0)
-			return ret;
+		if (ret != part_size)
+			return -EIO;
 
 		if ((vendor_info.hdr->tag == VENDOR_TAG) &&
 		    (*(vendor_info.version2) == vendor_info.hdr->version)) {
@@ -245,8 +249,11 @@ int vendor_storage_init(void)
 		 * Keep vendor_info the same as the largest
 		 * version of vendor
 		 */
-		if (max_index != (VENDOR_PART_NUM - 1))
+		if (max_index != (VENDOR_PART_NUM - 1)) {
 			ret = vendor_ops((u8 *)vendor_info.hdr, part_size * max_index, part_size, 0);
+			if (ret != part_size)
+				return -EIO;
+		}
 	} else {
 		debug("[Vednor INFO]:Reset vendor info...\n");
 		memset((u8 *)vendor_info.hdr, 0, size);
@@ -268,6 +275,17 @@ int vendor_storage_init(void)
 	return ret;
 }
 
+/*
+ * @id: item id, first 4 id is occupied:
+ *	VENDOR_SN_ID
+ *	VENDOR_WIFI_MAC_ID
+ *	VENDOR_LAN_MAC_ID
+ *	VENDOR_BLUETOOTH_ID
+ * @pbuf: read data buffer;
+ * @size: read bytes;
+ *
+ * return: bytes equal to @size is success, other fail;
+ */
 int vendor_storage_read(u16 id, void *pbuf, u16 size)
 {
 	int ret = 0;
@@ -299,9 +317,20 @@ int vendor_storage_read(u16 id, void *pbuf, u16 size)
 	return -EINVAL;
 }
 
+/*
+ * @id: item id, first 4 id is occupied:
+ *	VENDOR_SN_ID
+ *	VENDOR_WIFI_MAC_ID
+ *	VENDOR_LAN_MAC_ID
+ *	VENDOR_BLUETOOTH_ID
+ * @pbuf: write data buffer;
+ * @size: write bytes;
+ *
+ * return: bytes equal to @size is success, other fail;
+ */
 int vendor_storage_write(u16 id, void *pbuf, u16 size)
 {
-	int ret = 0;
+	int cnt, ret = 0;
 	u32 i, next_index, align_size;
 	struct vendor_item *item;
 	u16 part_size, max_item_num, offset;
@@ -351,7 +380,8 @@ int vendor_storage_write(u16 id, void *pbuf, u16 size)
 			vendor_info.hdr->next_index++;
 			if (vendor_info.hdr->next_index >= VENDOR_PART_NUM)
 				vendor_info.hdr->next_index = 0;
-			return vendor_ops((u8 *)vendor_info.hdr, part_size * next_index, part_size, 1);
+			cnt = vendor_ops((u8 *)vendor_info.hdr, part_size * next_index, part_size, 1);
+			return (cnt == part_size) ? size : -EIO;
 		}
 	}
 	/*
@@ -376,7 +406,8 @@ int vendor_storage_write(u16 id, void *pbuf, u16 size)
 		if (vendor_info.hdr->next_index >= VENDOR_PART_NUM)
 			vendor_info.hdr->next_index = 0;
 
-		return vendor_ops((u8 *)vendor_info.hdr, part_size * next_index, part_size, 1);
+		cnt = vendor_ops((u8 *)vendor_info.hdr, part_size * next_index, part_size, 1);
+		return (cnt == part_size) ? size : -EIO;
 	}
 	debug("[Vednor ERROR]:Vendor has no space left!\n");
 
@@ -496,7 +527,7 @@ int vendor_storage_test(void)
 	for (id = 0; id < item_num; id++) {
 		memset(buffer, 0, size);
 		ret = vendor_storage_read(id, buffer, size);
-		if (ret != size) {
+		if (ret < 0) {
 			printf("[Vendor Test]:vendor read failed(id=%d)!\n", id);
 			free(buffer);
 			return ret;

commit 9cc336e89e858e0607f7b7c72166345b0a882be5
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu May 31 15:30:41 2018 +0800

    android: bring up the kernel if device is unlock
    
    If the device is unlock, the device can be brought
    up when use avb.
    
    Change-Id: I82dd71d33f47dda0a760740428988dd658a96713
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index d31e583c12..91b227087e 100755
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -436,7 +436,7 @@ static AvbSlotVerifyResult android_slot_verify(char *boot_partname,
 			AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE,
 			&slot_data[0]);
 
-	if (verify_result != AVB_SLOT_VERIFY_RESULT_OK) {
+	if (verify_result != AVB_SLOT_VERIFY_RESULT_OK && !(unlocked & LOCK_MASK)) {
 		slot_set_unbootable(&ab_data.slots[slot_index_to_boot]);
 		goto out;
 	}
@@ -460,7 +460,10 @@ out:
 	if (slot_data[0] != NULL)
 		avb_slot_verify_data_free(slot_data[0]);
 
-	return verify_result;
+	if (unlocked & LOCK_MASK)
+		return 0;
+	else
+		return verify_result;
 }
 #endif
 

commit efdbac3478cedf49c0d31f177215ce1266a19823
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Fri May 18 21:27:00 2018 +0800

    clk: rockchip: rk3308: implement soc_clk_dump
    
    Change-Id: I6f0c3f56a878f491c4bb1deafd8e020e052e2287
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
index 8746c9aa60..ca74a833d7 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
@@ -36,6 +36,11 @@ enum rk3308_pll_id {
 	PLL_COUNT,
 };
 
+struct rk3308_clk_info {
+	unsigned long id;
+	char *name;
+};
+
 struct pll_rate_table {
 	unsigned long rate;
 	unsigned int fbdiv;
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 70ce25c25c..4325098eb4 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -132,6 +132,11 @@ __weak int rk_board_late_init(void)
 	return 0;
 }
 
+__weak int soc_clk_dump(void)
+{
+	return 0;
+}
+
 int board_late_init(void)
 {
 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0)
@@ -147,6 +152,8 @@ int board_late_init(void)
 #endif
 	rockchip_set_serialno();
 
+	soc_clk_dump();
+
 	return rk_board_late_init();
 }
 
diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index 6a0a595548..0ed825d93b 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -28,6 +28,12 @@ enum {
 
 #define DIV_TO_RATE(input_rate, div)    ((input_rate) / ((div) + 1))
 
+#define RK3308_CLK_DUMP(_id, _name)		\
+{						\
+	.id = _id,				\
+	.name = _name,				\
+}
+
 #define RK3308_PLL_RATE(_rate, _refdiv, _fbdiv, _postdiv1,	\
 			_postdiv2, _dsmpd, _frac)		\
 {								\
@@ -58,6 +64,21 @@ static u32 pll_mode_mask[PLL_COUNT] = {
 	VPLL1_MODE_MASK
 };
 
+static const struct rk3308_clk_info clks_dump[] = {
+	RK3308_CLK_DUMP(PLL_APLL, "apll"),
+	RK3308_CLK_DUMP(PLL_DPLL, "gpll"),
+	RK3308_CLK_DUMP(PLL_VPLL0, "vpll0"),
+	RK3308_CLK_DUMP(PLL_VPLL1, "vpll1"),
+	RK3308_CLK_DUMP(ACLK_BUS, "aclk_bus"),
+	RK3308_CLK_DUMP(HCLK_BUS, "hclk_bus"),
+	RK3308_CLK_DUMP(PCLK_BUS, "pclk_bus"),
+	RK3308_CLK_DUMP(ACLK_PERI, "aclk_peri"),
+	RK3308_CLK_DUMP(HCLK_PERI, "hclk_peri"),
+	RK3308_CLK_DUMP(PCLK_PERI, "pclk_peri"),
+	RK3308_CLK_DUMP(HCLK_AUDIO, "hclk_audio"),
+	RK3308_CLK_DUMP(PCLK_AUDIO, "pclk_audio"),
+};
+
 static ulong rk3308_bus_set_clk(struct rk3308_clk_priv *priv, ulong clk_id,
 				ulong hz);
 static ulong rk3308_peri_set_clk(struct rk3308_clk_priv *priv, ulong clk_id,
@@ -1092,3 +1113,58 @@ U_BOOT_DRIVER(rockchip_rk3308_cru) = {
 	.bind		= rk3308_clk_bind,
 	.probe		= rk3308_clk_probe,
 };
+
+/**
+ * soc_clk_dump() - Print clock frequencies
+ * Returns zero on success
+ *
+ * Implementation for the clk dump command.
+ */
+int soc_clk_dump(void)
+{
+	struct udevice *cru_dev;
+	const struct rk3308_clk_info *clk_dump;
+	struct clk clk;
+	unsigned long clk_count = ARRAY_SIZE(clks_dump);
+	unsigned long rate;
+	int i, ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_CLK,
+					  DM_GET_DRIVER(rockchip_rk3308_cru),
+					  &cru_dev);
+	if (ret) {
+		printf("%s failed to get cru device\n", __func__);
+		return ret;
+	}
+
+	printf("CLK:");
+	for (i = 0; i < clk_count; i++) {
+		clk_dump = &clks_dump[i];
+		if (clk_dump->name) {
+			clk.id = clk_dump->id;
+			ret = clk_request(cru_dev, &clk);
+			if (ret < 0)
+				return ret;
+
+			rate = clk_get_rate(&clk);
+			clk_free(&clk);
+			if (i == 0) {
+				if (rate < 0)
+					printf("%10s%20s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("%10s%20lu Hz\n", clk_dump->name,
+					       rate);
+			} else {
+				if (rate < 0)
+					printf("%14s%20s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("%14s%20lu Hz\n", clk_dump->name,
+					       rate);
+			}
+		}
+	}
+
+	return 0;
+}

commit 6c96c4c34573d57258b9ad3ed897c87a6bea5c98
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Mon Jun 4 16:26:55 2018 +0800

    clk: rockchip: px30: Add support to set rate for bus and peri clks
    
    Change-Id: Ic122eaea3c1c63e6108eabf41ca1b46a30cc66ef
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
index 5385381306..8746c9aa60 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
@@ -245,6 +245,17 @@ enum {
 	EMMC_SEL_24M,
 	EMMC_DIV_SHIFT		= 0,
 	EMMC_DIV_MASK		= 0xff << EMMC_DIV_SHIFT,
+
+	/* CRU_CLK_SEL45_CON */
+	AUDIO_PCLK_DIV_SHIFT	= 8,
+	AUDIO_PCLK_DIV_MASK	= 0x1f << AUDIO_PCLK_DIV_SHIFT,
+	AUDIO_PLL_SEL_SHIFT	= 6,
+	AUDIO_PLL_SEL_MASK	= 0x3 << AUDIO_PLL_SEL_SHIFT,
+	AUDIO_PLL_VPLL0		= 0,
+	AUDIO_PLL_VPLL1,
+	AUDIO_PLL_24M,
+	AUDIO_HCLK_DIV_SHIFT	= 0,
+	AUDIO_HCLK_DIV_MASK	= 0x1f << AUDIO_HCLK_DIV_SHIFT,
 };
 
 check_member(rk3308_cru, emmc_con[1], 0x494);
diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index 21af800e58..6a0a595548 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -58,6 +58,13 @@ static u32 pll_mode_mask[PLL_COUNT] = {
 	VPLL1_MODE_MASK
 };
 
+static ulong rk3308_bus_set_clk(struct rk3308_clk_priv *priv, ulong clk_id,
+				ulong hz);
+static ulong rk3308_peri_set_clk(struct rk3308_clk_priv *priv, ulong clk_id,
+				 ulong hz);
+static ulong rk3308_audio_set_clk(struct rk3308_clk_priv *priv,
+				  ulong clk_id, ulong hz);
+
 static const struct pll_rate_table *get_pll_settings(unsigned long rate)
 {
 	unsigned int rate_count = ARRAY_SIZE(rk3308_pll_rates);
@@ -200,8 +207,7 @@ static void rkclk_init(struct udevice *dev)
 {
 	struct rk3308_clk_priv *priv = dev_get_priv(dev);
 	struct rk3308_cru *cru = priv->cru;
-
-	u32 aclk_div, hclk_div, pclk_div;
+	u32 aclk_div, pclk_div;
 
 	/* init pll */
 	if (rkclk_set_pll(priv, APLL, APLL_HZ))
@@ -223,41 +229,20 @@ static void rkclk_init(struct udevice *dev)
 		     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
 		     0 << CORE_DIV_CON_SHIFT);
 
-	/*
-	 * select dpll as pd_bus bus clock source and
-	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
-	 */
 	priv->dpll_hz = rkclk_pll_get_rate(priv, DPLL);
-	aclk_div = priv->dpll_hz / BUS_ACLK_HZ - 1;
-	hclk_div = priv->dpll_hz / BUS_HCLK_HZ - 1;
-	pclk_div = priv->dpll_hz / BUS_PCLK_HZ - 1;
-	rk_clrsetreg(&cru->clksel_con[5],
-		     BUS_PLL_SEL_MASK | BUS_ACLK_DIV_MASK,
-		     BUS_PLL_SEL_DPLL << BUS_PLL_SEL_SHIFT |
-		     aclk_div << BUS_ACLK_DIV_SHIFT);
-	rk_clrsetreg(&cru->clksel_con[6],
-		     BUS_PCLK_DIV_MASK | BUS_HCLK_DIV_MASK,
-		     pclk_div << BUS_PCLK_DIV_SHIFT |
-		     hclk_div << BUS_HCLK_DIV_SHIFT);
-
-	/*
-	 * select dpll as pd_peri bus clock source and
-	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
-	 */
-	aclk_div = priv->dpll_hz / PERI_ACLK_HZ - 1;
-	hclk_div = priv->dpll_hz / PERI_HCLK_HZ - 1;
-	pclk_div = priv->dpll_hz / PERI_PCLK_HZ - 1;
-	rk_clrsetreg(&cru->clksel_con[36],
-		     PERI_PLL_SEL_MASK | PERI_ACLK_DIV_MASK,
-		     BUS_PLL_SEL_DPLL << PERI_PLL_SEL_SHIFT |
-		     aclk_div << PERI_ACLK_DIV_SHIFT);
-	rk_clrsetreg(&cru->clksel_con[37],
-		     PERI_PCLK_DIV_MASK | PERI_HCLK_DIV_MASK,
-		     pclk_div << PERI_PCLK_DIV_SHIFT |
-		     hclk_div << PERI_HCLK_DIV_SHIFT);
-
 	priv->vpll0_hz = rkclk_pll_get_rate(priv, VPLL0);
 	priv->vpll1_hz = rkclk_pll_get_rate(priv, VPLL1);
+
+	rk3308_bus_set_clk(priv, ACLK_BUS, BUS_ACLK_HZ);
+	rk3308_bus_set_clk(priv, HCLK_BUS, BUS_HCLK_HZ);
+	rk3308_bus_set_clk(priv, PCLK_BUS, BUS_PCLK_HZ);
+
+	rk3308_peri_set_clk(priv, ACLK_PERI, PERI_ACLK_HZ);
+	rk3308_peri_set_clk(priv, HCLK_PERI, PERI_HCLK_HZ);
+	rk3308_peri_set_clk(priv, PCLK_PERI, PERI_PCLK_HZ);
+
+	rk3308_audio_set_clk(priv, HCLK_AUDIO, AUDIO_HCLK_HZ);
+	rk3308_audio_set_clk(priv, PCLK_AUDIO, AUDIO_PCLK_HZ);
 }
 
 static ulong rk3308_i2c_get_clk(struct clk *clk)
@@ -605,6 +590,187 @@ static ulong rk3308_vop_set_clk(struct clk *clk, ulong hz)
 	return rk3308_vop_get_clk(clk);
 }
 
+static ulong rk3308_bus_get_clk(struct rk3308_clk_priv *priv, ulong clk_id)
+{
+	struct rk3308_cru *cru = priv->cru;
+	u32 div, con, parent = priv->dpll_hz;
+
+	switch (clk_id) {
+	case ACLK_BUS:
+		con = readl(&cru->clksel_con[5]);
+		div = (con & BUS_ACLK_DIV_MASK) >> BUS_ACLK_DIV_SHIFT;
+		break;
+	case HCLK_BUS:
+		con = readl(&cru->clksel_con[6]);
+		div = (con & BUS_HCLK_DIV_MASK) >> BUS_HCLK_DIV_SHIFT;
+		break;
+	case PCLK_BUS:
+		con = readl(&cru->clksel_con[6]);
+		div = (con & BUS_PCLK_DIV_MASK) >> BUS_PCLK_DIV_SHIFT;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rk3308_bus_set_clk(struct rk3308_clk_priv *priv, ulong clk_id,
+				ulong hz)
+{
+	struct rk3308_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->dpll_hz, hz);
+	assert(src_clk_div - 1 < 31);
+
+	/*
+	 * select dpll as pd_bus bus clock source and
+	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
+	 */
+	switch (clk_id) {
+	case ACLK_BUS:
+		rk_clrsetreg(&cru->clksel_con[5],
+			     BUS_PLL_SEL_MASK | BUS_ACLK_DIV_MASK,
+			     BUS_PLL_SEL_DPLL << BUS_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << BUS_ACLK_DIV_SHIFT);
+		break;
+	case HCLK_BUS:
+		rk_clrsetreg(&cru->clksel_con[6],
+			     BUS_HCLK_DIV_MASK,
+			     (src_clk_div - 1) << BUS_HCLK_DIV_SHIFT);
+		break;
+	case PCLK_BUS:
+		rk_clrsetreg(&cru->clksel_con[6],
+			     BUS_PCLK_DIV_MASK,
+			     (src_clk_div - 1) << BUS_PCLK_DIV_SHIFT);
+		break;
+	default:
+		printf("do not support this bus freq\n");
+		return -EINVAL;
+	}
+
+	return rk3308_bus_get_clk(priv, clk_id);
+}
+
+static ulong rk3308_peri_get_clk(struct rk3308_clk_priv *priv, ulong clk_id)
+{
+	struct rk3308_cru *cru = priv->cru;
+	u32 div, con, parent = priv->dpll_hz;
+
+	switch (clk_id) {
+	case ACLK_PERI:
+		con = readl(&cru->clksel_con[36]);
+		div = (con & PERI_ACLK_DIV_MASK) >> PERI_ACLK_DIV_SHIFT;
+		break;
+	case HCLK_PERI:
+		con = readl(&cru->clksel_con[37]);
+		div = (con & PERI_HCLK_DIV_MASK) >> PERI_HCLK_DIV_SHIFT;
+		break;
+	case PCLK_PERI:
+		con = readl(&cru->clksel_con[37]);
+		div = (con & PERI_PCLK_DIV_MASK) >> PERI_PCLK_DIV_SHIFT;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rk3308_peri_set_clk(struct rk3308_clk_priv *priv, ulong clk_id,
+				 ulong hz)
+{
+	struct rk3308_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->dpll_hz, hz);
+	assert(src_clk_div - 1 < 31);
+
+	/*
+	 * select dpll as pd_peri bus clock source and
+	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
+	 */
+	switch (clk_id) {
+	case ACLK_PERI:
+		rk_clrsetreg(&cru->clksel_con[36],
+			     PERI_PLL_SEL_MASK | PERI_ACLK_DIV_MASK,
+			     PERI_PLL_DPLL << PERI_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << PERI_ACLK_DIV_SHIFT);
+		break;
+	case HCLK_PERI:
+		rk_clrsetreg(&cru->clksel_con[37],
+			     PERI_HCLK_DIV_MASK,
+			     (src_clk_div - 1) << PERI_HCLK_DIV_SHIFT);
+		break;
+	case PCLK_PERI:
+		rk_clrsetreg(&cru->clksel_con[37],
+			     PERI_PCLK_DIV_MASK,
+			     (src_clk_div - 1) << PERI_PCLK_DIV_SHIFT);
+		break;
+	default:
+		printf("do not support this peri freq\n");
+		return -EINVAL;
+	}
+
+	return rk3308_peri_get_clk(priv, clk_id);
+}
+
+static ulong rk3308_audio_get_clk(struct rk3308_clk_priv *priv, ulong clk_id)
+{
+	struct rk3308_cru *cru = priv->cru;
+	u32 div, con, parent = priv->vpll0_hz;
+
+	switch (clk_id) {
+	case HCLK_AUDIO:
+		con = readl(&cru->clksel_con[45]);
+		div = (con & AUDIO_HCLK_DIV_MASK) >> AUDIO_HCLK_DIV_SHIFT;
+		break;
+	case PCLK_AUDIO:
+		con = readl(&cru->clksel_con[45]);
+		div = (con & AUDIO_PCLK_DIV_MASK) >> AUDIO_PCLK_DIV_SHIFT;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rk3308_audio_set_clk(struct rk3308_clk_priv *priv, ulong clk_id,
+				  ulong hz)
+{
+	struct rk3308_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->vpll0_hz, hz);
+	assert(src_clk_div - 1 < 31);
+
+	/*
+	 * select vpll0 as audio bus clock source and
+	 * set up dependent divisors for HCLK and PCLK clocks.
+	 */
+	switch (clk_id) {
+	case HCLK_AUDIO:
+		rk_clrsetreg(&cru->clksel_con[45],
+			     AUDIO_PLL_SEL_MASK | AUDIO_HCLK_DIV_MASK,
+			     AUDIO_PLL_VPLL0 << AUDIO_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << AUDIO_HCLK_DIV_SHIFT);
+		break;
+	case PCLK_AUDIO:
+		rk_clrsetreg(&cru->clksel_con[45],
+			     AUDIO_PLL_SEL_MASK | AUDIO_PCLK_DIV_MASK,
+			     AUDIO_PLL_VPLL0 << AUDIO_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << AUDIO_PCLK_DIV_SHIFT);
+		break;
+	default:
+		printf("do not support this audio freq\n");
+		return -EINVAL;
+	}
+
+	return rk3308_peri_get_clk(priv, clk_id);
+}
+
 static ulong rk3308_clk_get_rate(struct clk *clk)
 {
 	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
@@ -651,6 +817,20 @@ static ulong rk3308_clk_get_rate(struct clk *clk)
 	case DCLK_VOP:
 		rate = rk3308_vop_get_clk(clk);
 		break;
+	case ACLK_BUS:
+	case HCLK_BUS:
+	case PCLK_BUS:
+		rate = rk3308_bus_get_clk(priv, clk->id);
+		break;
+	case ACLK_PERI:
+	case HCLK_PERI:
+	case PCLK_PERI:
+		rate = rk3308_peri_get_clk(priv, clk->id);
+		break;
+	case HCLK_AUDIO:
+	case PCLK_AUDIO:
+		rate = rk3308_audio_get_clk(priv, clk->id);
+		break;
 	default:
 		return -ENOENT;
 	}
@@ -694,6 +874,20 @@ static ulong rk3308_clk_set_rate(struct clk *clk, ulong rate)
 	case DCLK_VOP:
 		ret = rk3308_vop_set_clk(clk, rate);
 		break;
+	case ACLK_BUS:
+	case HCLK_BUS:
+	case PCLK_BUS:
+		rate = rk3308_bus_set_clk(priv, clk->id, rate);
+		break;
+	case ACLK_PERI:
+	case HCLK_PERI:
+	case PCLK_PERI:
+		rate = rk3308_peri_set_clk(priv, clk->id, rate);
+		break;
+	case HCLK_AUDIO:
+	case PCLK_AUDIO:
+		rate = rk3308_audio_set_clk(priv, clk->id, rate);
+		break;
 	default:
 		return -ENOENT;
 	}

commit 1e180a5641549ff946ab17afb26cc1b021b4dfac
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Fri May 18 19:29:33 2018 +0800

    clk: rockchip: rk3308: Add support to set and get pll rate
    
    Change-Id: Idfbe59c3f1d12d0e9adcb253e3d6db9e994bc44c
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
index bf5bf57c8c..5385381306 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
@@ -11,6 +11,8 @@
 #define MHz		1000000
 #define OSC_HZ		(24 * MHz)
 
+#define APLL_HZ		(816 * MHz)
+
 #define CORE_ACLK_HZ	408000000
 #define CORE_DBG_HZ	204000000
 
@@ -34,12 +36,14 @@ enum rk3308_pll_id {
 	PLL_COUNT,
 };
 
-struct pll_div {
-	u32 refdiv;
-	u32 fbdiv;
-	u32 postdiv1;
-	u32 postdiv2;
-	u32 frac;
+struct pll_rate_table {
+	unsigned long rate;
+	unsigned int fbdiv;
+	unsigned int postdiv1;
+	unsigned int refdiv;
+	unsigned int postdiv2;
+	unsigned int dsmpd;
+	unsigned int frac;
 };
 
 /* Private data for the clock driver - used by rockchip_get_cru() */
diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index 3e39cfba91..21af800e58 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -7,6 +7,7 @@
 #include <bitfield.h>
 #include <clk-uclass.h>
 #include <dm.h>
+#include <div64.h>
 #include <errno.h>
 #include <syscon.h>
 #include <asm/arch/clock.h>
@@ -27,12 +28,25 @@ enum {
 
 #define DIV_TO_RATE(input_rate, div)    ((input_rate) / ((div) + 1))
 
-#define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\
-	.refdiv = _refdiv,\
-	.fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ),\
-	.postdiv1 = _postdiv1, .postdiv2 = _postdiv2};
+#define RK3308_PLL_RATE(_rate, _refdiv, _fbdiv, _postdiv1,	\
+			_postdiv2, _dsmpd, _frac)		\
+{								\
+	.rate	= _rate##U,					\
+	.fbdiv = _fbdiv,					\
+	.postdiv1 = _postdiv1,					\
+	.refdiv = _refdiv,					\
+	.postdiv2 = _postdiv2,					\
+	.dsmpd = _dsmpd,					\
+	.frac = _frac,						\
+}
 
-static const struct pll_div apll_816_cfg = PLL_DIVISORS(816 * MHz, 1, 2, 1);
+static struct pll_rate_table rk3308_pll_rates[] = {
+	/* _mhz, _refdiv, _fbdiv, _postdiv1, _postdiv2, _dsmpd, _frac */
+	RK3308_PLL_RATE(1300000000, 6, 325, 1, 1, 1, 0),
+	RK3308_PLL_RATE(1200000000, 1, 50, 1, 1, 1, 0),
+	RK3308_PLL_RATE(816000000, 1, 68, 2, 1, 1, 0),
+	RK3308_PLL_RATE(748000000, 2, 187, 3, 1, 1, 0),
+};
 
 static u8 pll_mode_shift[PLL_COUNT] = {
 	APLL_MODE_SHIFT, DPLL_MODE_SHIFT, VPLL0_MODE_SHIFT,
@@ -44,6 +58,19 @@ static u32 pll_mode_mask[PLL_COUNT] = {
 	VPLL1_MODE_MASK
 };
 
+static const struct pll_rate_table *get_pll_settings(unsigned long rate)
+{
+	unsigned int rate_count = ARRAY_SIZE(rk3308_pll_rates);
+	int i;
+
+	for (i = 0; i < rate_count; i++) {
+		if (rate == rk3308_pll_rates[i].rate)
+			return &rk3308_pll_rates[i];
+	}
+
+	return NULL;
+}
+
 /*
  * How to calculate the PLL:
  * Formulas also embedded within the Fractional PLL Verilog model:
@@ -60,21 +87,32 @@ static u32 pll_mode_mask[PLL_COUNT] = {
  *
  */
 
-static void rkclk_set_pll(struct rk3308_cru *cru, enum rk3308_pll_id pll_id,
-			  const struct pll_div *div)
+static int rkclk_set_pll(struct rk3308_clk_priv *priv,
+			 enum rk3308_pll_id pll_id,
+			 unsigned long drate)
 {
+	struct rk3308_cru *cru = priv->cru;
 	struct rk3308_pll *pll;
 	unsigned int *mode;
+	const struct pll_rate_table *rate;
+	uint vco_hz, output_hz;
+
+	rate = get_pll_settings(drate);
+	if (!rate) {
+		printf("%s unsupport rate\n", __func__);
+		return -EINVAL;
+	}
+
 	/* All PLLs have same VCO and output frequency range restrictions. */
-	uint vco_hz = OSC_HZ / 1000 * div->fbdiv / div->refdiv * 1000;
-	uint output_hz = vco_hz / div->postdiv1 / div->postdiv2;
+	vco_hz = OSC_HZ / 1000 * rate->fbdiv / rate->refdiv * 1000;
+	output_hz = vco_hz / rate->postdiv1 / rate->postdiv2;
 
 	pll = &cru->pll[pll_id];
 	mode = &cru->mode;
 
 	debug("PLL at %p: fb=%d, ref=%d, pst1=%d, pst2=%d, vco=%u Hz, output=%u Hz\n",
-	      pll, div->fbdiv, div->refdiv, div->postdiv1,
-	      div->postdiv2, vco_hz, output_hz);
+	      pll, rate->fbdiv, rate->refdiv, rate->postdiv1,
+	      rate->postdiv2, vco_hz, output_hz);
 	assert(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ &&
 	       output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ);
 
@@ -92,10 +130,10 @@ static void rkclk_set_pll(struct rk3308_cru *cru, enum rk3308_pll_id pll_id,
 
 	rk_clrsetreg(&pll->con0,
 		     PLL_POSTDIV1_MASK | PLL_FBDIV_MASK,
-		     (div->postdiv1 << PLL_POSTDIV1_SHIFT) | div->fbdiv);
+		     (rate->postdiv1 << PLL_POSTDIV1_SHIFT) | rate->fbdiv);
 	rk_clrsetreg(&pll->con1, PLL_POSTDIV2_MASK | PLL_REFDIV_MASK,
-		     (div->postdiv2 << PLL_POSTDIV2_SHIFT |
-		     div->refdiv << PLL_REFDIV_SHIFT));
+		     (rate->postdiv2 << PLL_POSTDIV2_SHIFT |
+		     rate->refdiv << PLL_REFDIV_SHIFT));
 
 	/* Power Up */
 	rk_clrreg(&pll->con1, 1 << PLL_PD_SHIFT);
@@ -106,14 +144,18 @@ static void rkclk_set_pll(struct rk3308_cru *cru, enum rk3308_pll_id pll_id,
 
 	rk_clrsetreg(mode, pll_mode_mask[pll_id],
 		     PLLMUX_FROM_PLL << pll_mode_shift[pll_id]);
+
+	return 0;
 }
 
-static uint32_t rkclk_pll_get_rate(struct rk3308_cru *cru,
+static uint32_t rkclk_pll_get_rate(struct rk3308_clk_priv *priv,
 				   enum rk3308_pll_id pll_id)
 {
-	u32 refdiv, fbdiv, postdiv1, postdiv2;
-	u32 con;
+	struct rk3308_cru *cru = priv->cru;
 	struct rk3308_pll *pll;
+	u32 con, refdiv, fbdiv, postdiv1, postdiv2, dsmpd, frac;
+	u32 rate = 0;
+	u64 frac_rate64 = 0;
 	uint shift;
 	uint mask;
 
@@ -134,7 +176,20 @@ static uint32_t rkclk_pll_get_rate(struct rk3308_cru *cru,
 		con = readl(&pll->con1);
 		postdiv2 = (con & PLL_POSTDIV2_MASK) >> PLL_POSTDIV2_SHIFT;
 		refdiv = (con & PLL_REFDIV_MASK) >> PLL_REFDIV_SHIFT;
-		return (24 * fbdiv / (refdiv * postdiv1 * postdiv2)) * 1000000;
+		dsmpd = (con & PLL_DSMPD_MASK) >> PLL_DSMPD_SHIFT;
+		con = readl(&pll->con2);
+		frac = con & PLL_FRAC_DIV;
+		rate = (24 * fbdiv / (refdiv * postdiv1 * postdiv2)) * 1000000;
+		if (dsmpd == 0) {
+			/* fractional mode */
+			frac_rate64 = 24000000 * (u64)frac;
+			do_div(frac_rate64, refdiv);
+			frac_rate64 >>= 24;
+			do_div(frac_rate64, postdiv1);
+			do_div(frac_rate64, postdiv2);
+			rate += (uint32_t)frac_rate64;
+		}
+		return rate;
 	case PLLMUX_FROM_RTC32K:
 	default:
 		return 32768;
@@ -149,14 +204,15 @@ static void rkclk_init(struct udevice *dev)
 	u32 aclk_div, hclk_div, pclk_div;
 
 	/* init pll */
-	rkclk_set_pll(cru, APLL, &apll_816_cfg);
+	if (rkclk_set_pll(priv, APLL, APLL_HZ))
+		printf("%s set apll unsuccessfully\n", __func__);
 
 	/*
 	 * select apll as cpu/core clock pll source and
 	 * set up dependent divisors for PCLK and ACLK clocks.
 	 * core hz : apll = 1:1
 	 */
-	priv->apll_hz = rkclk_pll_get_rate(cru, APLL);
+	priv->apll_hz = rkclk_pll_get_rate(priv, APLL);
 	aclk_div = priv->apll_hz / CORE_ACLK_HZ - 1;
 	pclk_div = priv->apll_hz / CORE_DBG_HZ - 1;
 	rk_clrsetreg(&cru->clksel_con[0],
@@ -171,7 +227,7 @@ static void rkclk_init(struct udevice *dev)
 	 * select dpll as pd_bus bus clock source and
 	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
 	 */
-	priv->dpll_hz = rkclk_pll_get_rate(cru, DPLL);
+	priv->dpll_hz = rkclk_pll_get_rate(priv, DPLL);
 	aclk_div = priv->dpll_hz / BUS_ACLK_HZ - 1;
 	hclk_div = priv->dpll_hz / BUS_HCLK_HZ - 1;
 	pclk_div = priv->dpll_hz / BUS_PCLK_HZ - 1;
@@ -200,8 +256,8 @@ static void rkclk_init(struct udevice *dev)
 		     pclk_div << PERI_PCLK_DIV_SHIFT |
 		     hclk_div << PERI_HCLK_DIV_SHIFT);
 
-	priv->vpll0_hz = rkclk_pll_get_rate(cru, VPLL0);
-	priv->vpll1_hz = rkclk_pll_get_rate(cru, VPLL1);
+	priv->vpll0_hz = rkclk_pll_get_rate(priv, VPLL0);
+	priv->vpll1_hz = rkclk_pll_get_rate(priv, VPLL1);
 }
 
 static ulong rk3308_i2c_get_clk(struct clk *clk)
@@ -474,13 +530,13 @@ static ulong rk3308_vop_get_clk(struct clk *clk)
 	} else if (vol_sel == DCLK_VOP_SEL_DIVOUT) {
 		switch (pll_sel) {
 		case DCLK_VOP_PLL_SEL_DPLL:
-			parent = rkclk_pll_get_rate(cru, DPLL);
+			parent = rkclk_pll_get_rate(priv, DPLL);
 			break;
 		case DCLK_VOP_PLL_SEL_VPLL0:
-			parent = rkclk_pll_get_rate(cru, VPLL0);
+			parent = rkclk_pll_get_rate(priv, VPLL0);
 			break;
 		case DCLK_VOP_PLL_SEL_VPLL1:
-			parent = rkclk_pll_get_rate(cru, VPLL1);
+			parent = rkclk_pll_get_rate(priv, VPLL1);
 			break;
 		default:
 			printf("do not support this vop pll sel\n");
@@ -551,13 +607,24 @@ static ulong rk3308_vop_set_clk(struct clk *clk, ulong hz)
 
 static ulong rk3308_clk_get_rate(struct clk *clk)
 {
+	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
 	ulong rate = 0;
 
 	debug("%s id:%ld\n", __func__, clk->id);
 
 	switch (clk->id) {
-	case 0 ... 15:
-		return 0;
+	case PLL_APLL:
+		rate = rkclk_pll_get_rate(priv, APLL);
+		break;
+	case PLL_DPLL:
+		rate = rkclk_pll_get_rate(priv, DPLL);
+		break;
+	case PLL_VPLL0:
+		rate = rkclk_pll_get_rate(priv, VPLL0);
+		break;
+	case PLL_VPLL1:
+		rate = rkclk_pll_get_rate(priv, VPLL1);
+		break;
 	case HCLK_SDMMC:
 	case HCLK_EMMC:
 	case SCLK_SDMMC:
@@ -593,12 +660,15 @@ static ulong rk3308_clk_get_rate(struct clk *clk)
 
 static ulong rk3308_clk_set_rate(struct clk *clk, ulong rate)
 {
+	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
 	ulong ret = 0;
 
 	debug("%s %ld %ld\n", __func__, clk->id, rate);
+
 	switch (clk->id) {
-	case 0 ... 15:
-		return 0;
+	case PLL_DPLL:
+		ret = rkclk_set_pll(priv, DPLL, rate);
+		break;
 	case HCLK_SDMMC:
 	case HCLK_EMMC:
 	case SCLK_SDMMC:

commit 4af5b92cfb763ab5537066f5c3ce20f3e25747ed
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Mon May 21 17:20:36 2018 +0800

    clk: rockchip: rk3308: Make clock ids consistent with kernel
    
    Change-Id: I79db3bd2faa4f296efab68d15cae5548314b446f
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/include/dt-bindings/clock/rk3308-cru.h b/include/dt-bindings/clock/rk3308-cru.h
index 1346a6929b..7ba1b86ccd 100644
--- a/include/dt-bindings/clock/rk3308-cru.h
+++ b/include/dt-bindings/clock/rk3308-cru.h
@@ -73,11 +73,11 @@
 #define SCLK_EMMC_SAMPLE	60
 #define SCLK_SFC		61
 #define SCLK_OTG_ADP		62
-#define SCLK_GMAC_SRC		63
-#define SCLK_GMAC		64
+#define SCLK_MAC_SRC		63
+#define SCLK_MAC		64
 #define SCLK_MAC_REF		65
-#define SCLK_GMAC_RX_TX		66
-#define SCLK_GMAC_RMII		67
+#define SCLK_MAC_RX_TX		66
+#define SCLK_MAC_RMII		67
 #define SCLK_DDR_MON_TIMER	68
 #define SCLK_DDR_MON		69
 #define SCLK_DDRCLK		70
@@ -112,18 +112,39 @@
 #define SCLK_SPDIF_RX_DIV	99
 #define SCLK_SPDIF_RX_DIV50	100
 #define SCLK_SPDIF_RX		101
+#define SCLK_I2S0_8CH_TX_MUX	102
+#define SCLK_I2S0_8CH_RX_MUX	103
+#define SCLK_I2S1_8CH_TX_MUX	104
+#define SCLK_I2S1_8CH_RX_MUX	105
+#define SCLK_I2S2_8CH_TX_MUX	106
+#define SCLK_I2S2_8CH_RX_MUX	107
+#define SCLK_I2S3_8CH_TX_MUX	108
+#define SCLK_I2S3_8CH_RX_MUX	109
+#define SCLK_I2S0_8CH_TX_SRC	110
+#define SCLK_I2S0_8CH_RX_SRC	111
+#define SCLK_I2S1_8CH_TX_SRC	112
+#define SCLK_I2S1_8CH_RX_SRC	113
+#define SCLK_I2S2_8CH_TX_SRC	114
+#define SCLK_I2S2_8CH_RX_SRC	115
+#define SCLK_I2S3_8CH_TX_SRC	116
+#define SCLK_I2S3_8CH_RX_SRC	117
+#define SCLK_I2S0_2CH_SRC	118
+#define SCLK_I2S1_2CH_SRC	119
 
 /* dclk */
 #define DCLK_VOP		120
 
 /* aclk */
-#define ACLK_CORE		130
+#define ACLK_BUS_SRC		130
 #define ACLK_BUS		131
-#define ACLK_PERI		132
-#define ACLK_GMAC		133
-#define ACLK_CRYPTO		134
-#define ACLK_VOP		135
-#define ACLK_GIC		136
+#define ACLK_PERI_SRC		132
+#define ACLK_PERI		133
+#define ACLK_MAC		134
+#define ACLK_CRYPTO		135
+#define ACLK_VOP		136
+#define ACLK_GIC		137
+#define ACLK_DMAC0		138
+#define ACLK_DMAC1		139
 
 /* hclk */
 #define HCLK_BUS		150
@@ -156,7 +177,7 @@
 #define PCLK_PERI		192
 #define PCLK_PMU		193
 #define PCLK_AUDIO		194
-#define PCLK_GMAC		195
+#define PCLK_MAC		195
 #define PCLK_ACODEC		196
 #define PCLK_UART0		197
 #define PCLK_UART1		198
@@ -175,14 +196,14 @@
 #define PCLK_TSADC		211
 #define PCLK_TIMER		212
 #define PCLK_OTP_NS		213
-#define PCLK_WDT_NS		214
+#define PCLK_WDT		214
 #define PCLK_GPIO0		215
 #define PCLK_GPIO1		216
 #define PCLK_GPIO2		217
 #define PCLK_GPIO3		218
 #define PCLK_GPIO4		219
 #define PCLK_SGRF		220
-#define PCLK_GRF			221
+#define PCLK_GRF		221
 #define PCLK_USBSD_DET		222
 #define PCLK_DDR_UPCTL		223
 #define PCLK_DDR_MON		224
@@ -327,7 +348,7 @@
 #define SRST_SD_H		122
 #define SRST_NANDC_H		123
 #define SRST_NANDC_N		124
-#define SRST_GMAC_A		125
+#define SRST_MAC_A		125
 
 /* cru_softrst_con8 */
 #define SRST_AUDIO_NIU_H	128

commit d23ec8c4ae7a709b700692f5e3f06ae629c67d8f
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jun 4 18:09:42 2018 +0800

    rockchip: rockusb: add copatible with legacy upgrade tool
    
    Legacy upgrade tool may not set correct transfer size for cmds,
    and for get flash info there no size in cmnd[7], fix it.
    
    Change-Id: I4060d72bb1f814903ed3c5b6b13689609dc905c8
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index 9b06812bff..2e89051462 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -189,7 +189,7 @@ static int rkusb_do_read_flash_info(struct fsg_common *common,
 				    struct fsg_buffhd *bh)
 {
 	u8 *buf = (u8 *)bh->buf;
-	u32 len = common->data_size;
+	u32 len = sizeof(struct rk_flash_info);
 	struct rk_flash_info finfo = {
 		.block_size = 1024,
 		.ecc_bits = 0,
@@ -208,6 +208,8 @@ static int rkusb_do_read_flash_info(struct fsg_common *common,
 
 	/* Set data xfer size */
 	common->residue = common->data_size_from_cmnd = len;
+        /* legacy upgrade_tool does not set correct transfer size */
+	common->data_size = len;
 
 	return len;
 }
@@ -292,6 +294,31 @@ static int rkusb_do_read_capacity(struct fsg_common *common,
 	return len;
 }
 
+static void rkusb_fixup_cbwcb(struct fsg_common *common,
+			      struct fsg_buffhd *bh)
+{
+	struct usb_request      *req = bh->outreq;
+	struct fsg_bulk_cb_wrap *cbw = req->buf;
+
+	/* FIXME cbw.DataTransferLength was not set by Upgrade Tool */
+	common->data_size = le32_to_cpu(cbw->DataTransferLength);
+	if (common->data_size == 0) {
+		common->data_size =
+		get_unaligned_be16(&common->cmnd[7]) << 9;
+		printf("Trasfer Length NOT set, please use new version tool\n");
+		debug("%s %d, cmnd1 %x\n", __func__,
+		      get_unaligned_be16(&common->cmnd[7]),
+		      get_unaligned_be16(&common->cmnd[1]));
+	}
+	if (cbw->Flags & USB_BULK_IN_FLAG)
+		common->data_dir = DATA_DIR_TO_HOST;
+	else
+		common->data_dir = DATA_DIR_FROM_HOST;
+
+	/* Not support */
+	common->cmnd[1] = 0;
+}
+
 static int rkusb_cmd_process(struct fsg_common *common,
 			     struct fsg_buffhd *bh, int *reply)
 {
@@ -301,6 +328,7 @@ static int rkusb_cmd_process(struct fsg_common *common,
 
 	dump_cbw(cbw);
 
+	rkusb_fixup_cbwcb(common, bh);
 	if (rkusb_check_lun(common)) {
 		*reply = -EINVAL;
 		return RKUSB_RC_ERROR;

commit d80d7b52d3ac29353027cfb7934e007bad3e7614
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jun 4 11:40:24 2018 +0800

    rockchip: rk3328: add vendor storage support for sn
    
    We need to read sn from vendor storage.
    
    Change-Id: If0e41d1eecd66fcf7733fb02e1f6609971ef0d1e
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index aff65d1e1d..b0fe0ad1ee 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -104,6 +104,7 @@ CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y

commit 55a83ed534dd026951bfa4277f5c82b0b07cb843
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jun 4 11:39:28 2018 +0800

    rockchip: gva-rk3229: add fastboot key detect
    
    Since the common board init do not detect the fastboot key,
    we need to add it in gva board init.
    
    Change-Id: I7f5ea5df740e855c1ec4f64092450d028321200b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/board/rockchip/gva_rk3229/gva_rk3229.c b/board/rockchip/gva_rk3229/gva_rk3229.c
index ece9ed57a9..c6c4ae2433 100644
--- a/board/rockchip/gva_rk3229/gva_rk3229.c
+++ b/board/rockchip/gva_rk3229/gva_rk3229.c
@@ -8,6 +8,7 @@
 #include <dm.h>
 #include <misc.h>
 #include <time.h>
+#include <asm/gpio.h>
 #include <asm/io.h>
 #include <asm/setup.h>
 #include <asm/arch/uart.h>
@@ -102,3 +103,22 @@ void get_board_serial(struct tag_serialnr *serialnr)
 	serialnr->low = (u32)(serial & 0xffffffff);
 }
 #endif
+
+#define FASTBOOT_KEY_GPIO 43 /*GPIO1B3*/
+
+int fastboot_key_pressed(void)
+{
+	gpio_request(FASTBOOT_KEY_GPIO, "fastboot_key");
+	gpio_direction_input(FASTBOOT_KEY_GPIO);
+	return !gpio_get_value(FASTBOOT_KEY_GPIO);
+}
+
+int rk_board_late_init(void)
+{
+	if (fastboot_key_pressed()) {
+		printf("enter fastboot!\n");
+		env_set("preboot", "setenv preboot; fastboot usb0");
+	}
+
+	return 0;
+}

commit 99fa2bd0a6eb6ad5161bfeeeaa6f9b03b87d4bbd
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jun 4 11:38:24 2018 +0800

    rockchip: board: remove fastboot key detect
    
    Most of rockchip board do not have a fastboot key, remove it
    from common board init.
    Boards need to add it back in per-board init if needed.
    
    Change-Id: I8e3ae1f767485ae075811f406c6822f333d1bd78
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 62dab89b99..70ce25c25c 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -101,14 +101,6 @@ int fb_set_reboot_flag(void)
 
 	return 0;
 }
-
-#define FASTBOOT_KEY_GPIO 43 /* GPIO1_B3 */
-static int fastboot_key_pressed(void)
-{
-	gpio_request(FASTBOOT_KEY_GPIO, "fastboot_key");
-	gpio_direction_input(FASTBOOT_KEY_GPIO);
-	return !gpio_get_value(FASTBOOT_KEY_GPIO);
-}
 #endif
 
 #ifdef CONFIG_DM_CHARGE_DISPLAY
@@ -142,13 +134,6 @@ __weak int rk_board_late_init(void)
 
 int board_late_init(void)
 {
-#if defined(CONFIG_USB_FUNCTION_FASTBOOT)
-	if (fastboot_key_pressed()) {
-		printf("fastboot key pressed!\n");
-		fb_set_reboot_flag();
-	}
-#endif
-
 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0)
 	setup_boot_mode();
 #endif

commit 1203ea6358458cbf8343d2decdda06058970715c
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu May 31 15:48:52 2018 +0800

    rockchip: vendor: unify vendor_ops return value
    
    The blk_dread will return cnt if execute successful.
    This is different with blk_dwrite. So unify the return
    value in function vendor_ops.
    
    Change-Id: I31a91b2281de840a06e2d8c96a7316202d2d5424
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/vendor.c b/arch/arm/mach-rockchip/vendor.c
index 71f318cd37..7848d71660 100644
--- a/arch/arm/mach-rockchip/vendor.c
+++ b/arch/arm/mach-rockchip/vendor.c
@@ -142,16 +142,13 @@ static int vendor_ops(u8 *buffer, u32 addr, u32 n_sec, int write)
 		debug("[Vednor INFO]:VendorStorage offset address=0x%x\n", lba);
 		break;
 	default:
-		debug("[Vednor ERROR]:Boot device type is invalid!\n");
-		ret = -ENODEV;
-		break;
-	}
-	if (!ret) {
-		if (write)
-			ret = blk_dwrite(dev_desc, lba + addr, n_sec, buffer);
-		else
-			ret = blk_dread(dev_desc, lba + addr, n_sec, buffer);
+		printf("[Vednor ERROR]:Boot device type is invalid!\n");
+		return -ENODEV;
 	}
+	if (write)
+		ret = blk_dwrite(dev_desc, lba + addr, n_sec, buffer);
+	else
+		ret = blk_dread(dev_desc, lba + addr, n_sec, buffer);
 	debug("[Vednor INFO]:op=%s, ret=%d\n", write ? "write" : "read", ret);
 
 	return ret;
@@ -231,7 +228,7 @@ int vendor_storage_init(void)
 	/* Find valid and up-to-date one from (vendor0 - vendor3) */
 	for (i = 0; i < VENDOR_PART_NUM; i++) {
 		ret = vendor_ops((u8 *)vendor_info.hdr, part_size * i, part_size, 0);
-		if (ret)
+		if (ret < 0)
 			return ret;
 
 		if ((vendor_info.hdr->tag == VENDOR_TAG) &&
@@ -281,7 +278,7 @@ int vendor_storage_read(u16 id, void *pbuf, u16 size)
 	/* init vendor storage */
 	if (!bootdev_type) {
 		ret = vendor_storage_init();
-		if (ret)
+		if (ret < 0)
 			return ret;
 	}
 
@@ -312,7 +309,7 @@ int vendor_storage_write(u16 id, void *pbuf, u16 size)
 	/* init vendor storage */
 	if (!bootdev_type) {
 		ret = vendor_storage_init();
-		if (ret)
+		if (ret < 0)
 			return ret;
 	}
 
@@ -332,7 +329,7 @@ int vendor_storage_write(u16 id, void *pbuf, u16 size)
 		break;
 	}
 	/* Invalid bootdev? */
-	if (ret)
+	if (ret < 0)
 		return ret;
 
 	next_index = vendor_info.hdr->next_index;
@@ -489,7 +486,7 @@ int vendor_storage_test(void)
 	for (id = 0; id < item_num; id++) {
 		memset(buffer, id, size);
 		ret = vendor_storage_write(id, buffer, size);
-		if (ret) {
+		if (ret < 0) {
 			printf("[Vendor Test]:vendor write failed(id=%d)!\n", id);
 			free(buffer);
 			return ret;
@@ -572,7 +569,7 @@ int vendor_storage_test(void)
 	id = 0;
 	printf("[Vendor Test]:id=%d, size=%d.\n", id, size);
 	ret = vendor_storage_write(id, buffer, size);
-	if (!ret)
+	if (ret == size)
 		printf("[Vendor Test]:<Single Item Memory Overflow> Test End, States:OK\n");
 	else
 		printf("[Vendor Test]:<Single Item Memory Overflow> Test End, States:Failed\n");
@@ -585,7 +582,7 @@ int vendor_storage_test(void)
 	for (id = 0; id <= item_num; id++) {
 		memset(buffer, id, size);
 		ret = vendor_storage_write(id, buffer, size);
-		if (ret) {
+		if (ret < 0) {
 			if ((id == item_num) && (ret == -ENOMEM)) {
 				printf("[Vendor Test]:<Total memory overflow> Test End, States:OK\n");
 				break;

commit 064b2675e01d61deadaf6161f699f53f611f4913
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jun 1 17:42:16 2018 +0800

    rockchip: board: support get serialno
    
    The serialno is used to identify the device.
    Serialno can be got from vendor storage, efuse,
    and generated ramdom. The order is:
    vendor storage > cpuid(efuse) > ramdom
    
    Change-Id: Ic805848d59eec761fe1eac6ee43558b2ba06e3c8
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index e5c54ee541..62dab89b99 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -10,6 +10,8 @@
 #include <ram.h>
 #include <syscon.h>
 #include <asm/io.h>
+#include <asm/arch/vendor.h>
+#include <misc.h>
 #include <asm/gpio.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/periph.h>
@@ -28,6 +30,67 @@
 #include <dm/root.h>
 
 DECLARE_GLOBAL_DATA_PTR;
+/* define serialno max length, the max length is 512 Bytes
+ * The remaining bytes are used to ensure that the first 512 bytes
+ * are valid when executing 'env_set("serial#", value)'.
+ */
+#define VENDOR_SN_MAX	513
+#define CPUID_LEN       0x10
+#define CPUID_OFF       0x7
+
+static int rockchip_set_serialno(void)
+{
+	char serialno_str[VENDOR_SN_MAX];
+	int ret = 0, i;
+	u8 cpuid[CPUID_LEN] = {0};
+	u8 low[CPUID_LEN / 2], high[CPUID_LEN / 2];
+	u64 serialno;
+
+	/* Read serial number from vendor storage part */
+	memset(serialno_str, 0, VENDOR_SN_MAX);
+#ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
+	ret = vendor_storage_read(VENDOR_SN_ID, serialno_str, (VENDOR_SN_MAX-1));
+	if (ret > 0) {
+		env_set("serial#", serialno_str);
+	} else {
+#endif
+#ifdef CONFIG_ROCKCHIP_EFUSE
+		struct udevice *dev;
+
+		/* retrieve the device */
+		ret = uclass_get_device_by_driver(UCLASS_MISC,
+						  DM_GET_DRIVER(rockchip_efuse), &dev);
+		if (ret) {
+			printf("%s: could not find efuse device\n", __func__);
+			return ret;
+		}
+		/* read the cpu_id range from the efuses */
+		ret = misc_read(dev, CPUID_OFF, &cpuid, sizeof(cpuid));
+		if (ret) {
+			printf("%s: reading cpuid from the efuses failed\n", __func__);
+			return ret;
+		}
+#else
+		/* generate random cpuid */
+		for (i = 0; i < CPUID_LEN; i++) {
+			cpuid[i] = (u8)(rand());
+		}
+#endif
+		/* Generate the serial number based on CPU ID */
+		for (i = 0; i < 8; i++) {
+			low[i] = cpuid[1 + (i << 1)];
+			high[i] = cpuid[i << 1];
+		}
+		serialno = crc32_no_comp(0, low, 8);
+		serialno |= (u64)crc32_no_comp(serialno, high, 8) << 32;
+		snprintf(serialno_str, sizeof(serialno_str), "%llx", serialno);
+
+		env_set("serial#", serialno_str);
+#ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
+	}
+#endif
+	return ret;
+}
 
 #if defined(CONFIG_USB_FUNCTION_FASTBOOT)
 int fb_set_reboot_flag(void)
@@ -97,6 +160,7 @@ int board_late_init(void)
 #ifdef CONFIG_DRM_ROCKCHIP
 	rockchip_show_logo();
 #endif
+	rockchip_set_serialno();
 
 	return rk_board_late_init();
 }

commit 348264084d7b5cee05333cdf825599c803726081
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu May 31 14:45:14 2018 +0800

    rockchip: vendor: fix compile warning in arm64
    
    Change-Id: I578344812ea2ac1cb1142244741b827b8714d47a
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/vendor.c b/arch/arm/mach-rockchip/vendor.c
index 627e123339..71f318cd37 100644
--- a/arch/arm/mach-rockchip/vendor.c
+++ b/arch/arm/mach-rockchip/vendor.c
@@ -256,7 +256,9 @@ int vendor_storage_init(void)
 		vendor_info.hdr->version = 1;
 		vendor_info.hdr->tag = VENDOR_TAG;
 		/* data field length */
-		vendor_info.hdr->free_size = ((u32)vendor_info.hash - (u32)vendor_info.data);
+		vendor_info.hdr->free_size =
+			((u32)(size_t)vendor_info.hash
+			- (u32)(size_t)vendor_info.data);
 		*(vendor_info.version2) = vendor_info.hdr->version;
 	}
 	debug("[Vednor INFO]:ret=%d.\n", ret);

commit 05b226ad5bcb86f584a3a6099daa83c8f7529dea
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Jun 1 11:49:49 2018 +0800

    rockchip: clk: rk3328: convert to live dt
    
    Use dev_read_addr_ptr to get cru base
    
    Change-Id: I6bae4b3e540f2d70f50615bf7cff0af99908f859
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c
index dcf0d4028d..c0cfcf1f19 100644
--- a/drivers/clk/rockchip/clk_rk3328.c
+++ b/drivers/clk/rockchip/clk_rk3328.c
@@ -767,7 +767,7 @@ static int rk3328_clk_ofdata_to_platdata(struct udevice *dev)
 {
 	struct rk3328_clk_priv *priv = dev_get_priv(dev);
 
-	priv->cru = (struct rk3328_cru *)devfdt_get_addr(dev);
+	priv->cru = dev_read_addr_ptr(dev);
 
 	return 0;
 }

commit 7d9cf22de952def3ef629d5d5f9276b660cfd7de
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Jun 1 11:49:30 2018 +0800

    rockchip: clk: rk3288: convert to live dt
    
    Use dev_read_addr_ptr to get cru base
    
    Change-Id: Ia0c7e42beff1442055156d2125d35a58b5be8b13
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index b730cefbf7..c18d7819bc 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -1030,7 +1030,7 @@ static int rk3288_clk_ofdata_to_platdata(struct udevice *dev)
 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
 	struct rk3288_clk_priv *priv = dev_get_priv(dev);
 
-	priv->cru = (struct rk3288_cru *)devfdt_get_addr(dev);
+	priv->cru = dev_read_addr_ptr(dev);
 #endif
 
 	return 0;

commit b1cc17a3f7a28abac0b7b825aec7876190349daf
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Jun 1 11:49:05 2018 +0800

    rockchip: clk: rk3188: convert to live dt
    
    Use dev_read_addr_ptr to get cru base
    
    Change-Id: Ib0903a0ec7b0602fb2f78bab65c44db071f13bd0
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3188.c b/drivers/clk/rockchip/clk_rk3188.c
index ad00d6e0e1..287c44093c 100644
--- a/drivers/clk/rockchip/clk_rk3188.c
+++ b/drivers/clk/rockchip/clk_rk3188.c
@@ -571,7 +571,7 @@ static int rk3188_clk_ofdata_to_platdata(struct udevice *dev)
 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
 	struct rk3188_clk_priv *priv = dev_get_priv(dev);
 
-	priv->cru = (struct rk3188_cru *)devfdt_get_addr(dev);
+	priv->cru = dev_read_addr_ptr(dev);
 #endif
 
 	return 0;

commit 11143e9c4538f7546983efd15c3fc49845f4bef3
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Jun 1 11:48:14 2018 +0800

    rockchip: clk: rk3066: convert to live dt
    
    Use dev_read_addr_ptr to get cru base
    
    Change-Id: I22d0a98ff29d894ec777574f93f145c55383ffa0
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3066.c b/drivers/clk/rockchip/clk_rk3066.c
index e15273268e..57f8640089 100644
--- a/drivers/clk/rockchip/clk_rk3066.c
+++ b/drivers/clk/rockchip/clk_rk3066.c
@@ -530,7 +530,7 @@ static int rk3066_clk_ofdata_to_platdata(struct udevice *dev)
 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
 	struct rk3066_clk_priv *priv = dev_get_priv(dev);
 
-	priv->cru = (struct rk3066_cru *)devfdt_get_addr(dev);
+	priv->cru = dev_read_addr_ptr(dev);
 #endif
 
 	return 0;

commit dae34b54f3a34571449e91630b118c62d3903ae7
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Jun 1 11:47:23 2018 +0800

    rockchip: rk3328: add common config
    
    Add common config to support rkimg/android image.
    
    Change-Id: I58ef7a9155abdbe22a82b24cdd8412b71b62e276
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
new file mode 100644
index 0000000000..aff65d1e1d
--- /dev/null
+++ b/configs/rk3328_defconfig
@@ -0,0 +1,111 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_ROCKCHIP_RK3328=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
+CONFIG_DEFAULT_DEVICE_TREE="rk3328-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_TPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_TPL_BOOTROM_SUPPORT=y
+CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x800800
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_RKPARM_PARTITION=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_TPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_TPL_OF_PLATDATA=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_TPL_DM=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_TPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_TPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PINCTRL=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0xFF130000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x330a
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_DRM_ROCKCHIP_LVDS=y
+CONFIG_DRM_ROCKCHIP_RGB=y
+CONFIG_LCD=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
+CONFIG_TEST_ROCKCHIP=y

commit 26258180d667da3d2dae0df4abc1867c63093d2d
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Jun 1 11:46:55 2018 +0800

    rockchip: rk3328: config: update for rkimg support
    
    Change-Id: Ia1599b94f6a243bd75edb923d7956a45396193ac
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3328/Kconfig b/arch/arm/mach-rockchip/rk3328/Kconfig
index 43afba2430..def8381cbc 100644
--- a/arch/arm/mach-rockchip/rk3328/Kconfig
+++ b/arch/arm/mach-rockchip/rk3328/Kconfig
@@ -5,6 +5,7 @@ choice
 
 config TARGET_EVB_RK3328
 	bool "RK3328 evaluation board"
+	select BOARD_LATE_INIT
 	help
 	  RK3328evb is a evaluation board for Rockchip rk3328,
 	  with full function and phisical connectors support like
diff --git a/include/configs/evb_rk3328.h b/include/configs/evb_rk3328.h
index 87f2c9e21a..2f16ddbed5 100644
--- a/include/configs/evb_rk3328.h
+++ b/include/configs/evb_rk3328.h
@@ -13,8 +13,6 @@
 
 #define SDRAM_BANK_SIZE			(2UL << 30)
 
-#define CONFIG_CONSOLE_SCROLL_LINES		10
-
 #ifndef CONFIG_SPL_BUILD
 #undef CONFIG_BOOTCOMMAND
 #define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index a55dd5e644..03b6ce4955 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -57,17 +57,20 @@
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x01f00000\0" \
-	"kernel_addr_r=0x02000000\0" \
+	"kernel_addr_r=0x02080000\0" \
 	"ramdisk_addr_r=0x04000000\0"
 
 #include <config_distro_bootcmd.h>
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	ENV_MEM_LAYOUT_SETTINGS \
+	RKIMG_DET_BOOTDEV \
 	"partitions=" PARTS_DEFAULT \
 	BOOTENV
 
 #endif
 
+#define CONFIG_PREBOOT
+
 /* rockchip ohci host driver */
 #define CONFIG_USB_OHCI_NEW
 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	1

commit a14c50f0dfd10c2337745490166090f9f1cd6710
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Jun 1 11:07:39 2018 +0800

    rockchip: test: eth: fix build error
    
    add header file for cli;
    use simplg_strtoul() instead of strtoul();
    
    Change-Id: I274710be24132fd9188be4b2283bea747bcfe667
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/test/rockchip/test-eth.c b/test/rockchip/test-eth.c
index 364e106f54..4e04416935 100644
--- a/test/rockchip/test-eth.c
+++ b/test/rockchip/test-eth.c
@@ -6,6 +6,7 @@
 
 #include <asm/io.h>
 #include <adc.h>
+#include <cli.h>
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
@@ -274,15 +275,15 @@ int board_eth_test(int argc, char * const argv[])
 		break;
 	case 4:
 		if (!strncmp(argv[2], "loopback", sizeof("loopback"))) {
-			speed = strtoul(argv[3], NULL, 0);
+			speed = simple_strtoul(argv[3], NULL, 0);
 			ret = eth_loopback_test(speed, 0);
 			return ret;
 		}
 		break;
 	case 5:
 		if (!strncmp(argv[2], "delayline", sizeof("delayline"))) {
-			tx_delay = strtoul(argv[3], NULL, 0);
-			rx_delay = strtoul(argv[4], NULL, 0);
+			tx_delay = simple_strtoul(argv[3], NULL, 0);
+			rx_delay = simple_strtoul(argv[4], NULL, 0);
 			gmac_set_rgmii(current, tx_delay, rx_delay);
 			return 0;
 		}

commit 49f41c7b1e4112d3adbbf3bebf4277782312da7c
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Jun 1 15:47:02 2018 +0800

    part: efi: fix error pointer for buffer pte
    
    Set to NULL after the pointer is free.
    
    Change-Id: I7fd703984514295bc9e5eea34808e0ac941bdb30
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/disk/part_efi.c b/disk/part_efi.c
index a83558a976..f2454e28d3 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -276,7 +276,7 @@ int part_get_info_efi(struct blk_desc *dev_desc, int part,
 		gpt_head = memalign(ARCH_DMA_MINALIGN, dev_desc->blksz);
 
 	/* We suppose different dev have different size, eg. emmc vs sd */
-	if (!gpt_head && (gpt_head->last_usable_lba + 0x22) != dev_desc->lba)
+	if (gpt_head && (gpt_head->last_usable_lba + 0x22) != dev_desc->lba)
 		gpt_pte = NULL;
 
 	/* "part" argument must be at least 1 */
@@ -985,6 +985,7 @@ static int is_gpt_valid(struct blk_desc *dev_desc, u64 lba,
 
 	if (validate_gpt_entries(pgpt_head, *pgpt_pte)) {
 		free(*pgpt_pte);
+		*pgpt_pte = NULL;
 		return 0;
 	}
 

commit 52ae0af19e68659c6024c69a39f0b5e40062f9c2
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Jun 1 10:50:20 2018 +0800

    rockchip: clk: rv1108: use ofdata_to_platdata for cru base
    
    We use ofdata_to_platdata() to get cru base from dtb,
    update the api with support for live dt.
    
    Change-Id: I652c82a427693093d4ceca5d747543af945b0986
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rv1108.c b/drivers/clk/rockchip/clk_rv1108.c
index cbaf0b2913..266d012258 100644
--- a/drivers/clk/rockchip/clk_rv1108.c
+++ b/drivers/clk/rockchip/clk_rv1108.c
@@ -518,11 +518,18 @@ static void rkclk_init(struct rv1108_cru *cru)
 	       aclk_bus, aclk_peri, hclk_peri, pclk_peri);
 }
 
-static int rv1108_clk_probe(struct udevice *dev)
+static int rv1108_clk_ofdata_to_platdata(struct udevice *dev)
 {
 	struct rv1108_clk_priv *priv = dev_get_priv(dev);
 
-	priv->cru = (struct rv1108_cru *)devfdt_get_addr(dev);
+	priv->cru = dev_read_addr_ptr(dev);
+
+	return 0;
+}
+
+static int rv1108_clk_probe(struct udevice *dev)
+{
+	struct rv1108_clk_priv *priv = dev_get_priv(dev);
 
 	rkclk_init(priv->cru);
 
@@ -577,5 +584,6 @@ U_BOOT_DRIVER(clk_rv1108) = {
 	.priv_auto_alloc_size = sizeof(struct rv1108_clk_priv),
 	.ops		= &rv1108_clk_ops,
 	.bind		= rv1108_clk_bind,
+	.ofdata_to_platdata	= rv1108_clk_ofdata_to_platdata,
 	.probe		= rv1108_clk_probe,
 };

commit 640d29ee2a27c709709a44f7959c4581ff5bfb92
Author: Lin Huang <hl@rock-chips.com>
Date:   Tue May 29 11:02:55 2018 +0800

    config: rk3288: support android boot image
    
    The boot.img will instead of the kernel.img and resource.img on linux
    platform, so need to support android boot image in rk3288 uboot.
    
    Change-Id: I6d7d42d80026cad594e720e279b7213dd4adcadd
    Signed-off-by: Lin Huang <hl@rock-chips.com>

diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig
index 11c323dae5..7c155cd7be 100644
--- a/configs/evb-rk3288_defconfig
+++ b/configs/evb-rk3288_defconfig
@@ -8,7 +8,6 @@ CONFIG_TARGET_EVB_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-evb"
 CONFIG_DEBUG_UART=y
-# CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_SILENT_CONSOLE=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
@@ -17,6 +16,9 @@ CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
diff --git a/configs/fennec-rk3288_defconfig b/configs/fennec-rk3288_defconfig
index 64c4827879..37c5ee6556 100644
--- a/configs/fennec-rk3288_defconfig
+++ b/configs/fennec-rk3288_defconfig
@@ -8,7 +8,6 @@ CONFIG_TARGET_FENNEC_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-fennec"
 CONFIG_DEBUG_UART=y
-# CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_SILENT_CONSOLE=y
 CONFIG_CONSOLE_MUX=y
 # CONFIG_DISPLAY_CPUINFO is not set
@@ -18,6 +17,9 @@ CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig
index 8d2809b6aa..1d3856a08e 100644
--- a/configs/firefly-rk3288_defconfig
+++ b/configs/firefly-rk3288_defconfig
@@ -8,7 +8,6 @@ CONFIG_TARGET_FIREFLY_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-firefly"
 CONFIG_DEBUG_UART=y
-# CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_SILENT_CONSOLE=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
@@ -17,6 +16,9 @@ CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig
index 7c4cbfc7e1..7b76be8f3a 100644
--- a/configs/miqi-rk3288_defconfig
+++ b/configs/miqi-rk3288_defconfig
@@ -8,7 +8,6 @@ CONFIG_TARGET_MIQI_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-miqi"
 CONFIG_DEBUG_UART=y
-# CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_SILENT_CONSOLE=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
@@ -17,6 +16,9 @@ CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index b0eed9b4eb..91611c1cd4 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -30,6 +30,7 @@
 #define CONFIG_SYS_LOAD_ADDR		0x00800800
 #define CONFIG_SPL_STACK		0xff718000
 
+#define CONFIG_SYS_BOOTM_LEN		(64 << 20)	/*  64M */
 #define GICD_BASE			0xffc01000
 #define GICC_BASE			0xffc02000
 

commit 1ba474786a542a5836475b7684fed1ad5ebca0d0
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed May 30 16:28:34 2018 +0800

    make.sh: support pack ARM64 AArch32 trust.img
    
    Change-Id: Ic04bc1624505200989301c904194a41b043ec16b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 2e1fa79343..d6f1c41ae9 100755
--- a/make.sh
+++ b/make.sh
@@ -209,10 +209,14 @@ pack_mass_trust_image()
 
 pack_trust_image()
 {
-	local TOS TOS_TA DARM_BASE TEE_LOAD_ADDR TEE_OFFSET=0x8400000
+	local TOS TOS_TA DARM_BASE TEE_LOAD_ADDR TEE_OFFSET=0x8400000 AARCH32
 
 	# ARM64 uses trust_merger
 	if grep -Eq ''^CONFIG_ARM64=y'|'^CONFIG_ARM64_BOOT_AARCH32=y'' ${OUTDIR}/.config ; then
+		if grep -q '^CONFIG_ARM64_BOOT_AARCH32=y' ${OUTDIR}/.config ; then
+			AARCH32=AARCH32
+		fi
+
 		if [ ! -f ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini ]; then
 			echo "pack trust failed! Can't find: ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini"
 			return
@@ -222,17 +226,17 @@ pack_trust_image()
 
 		# RK3308/PX30/RK3326 use RSA-PKCS1 V2.1, it's pack magic is "3"
 		if [ $RKCHIP = "PX30" -o $RKCHIP = "RK3326" -o $RKCHIP = "RK3308" ]; then
-			${TOOLCHAIN_RKBIN}/trust_merger --rsa 3 --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini
+			${TOOLCHAIN_RKBIN}/trust_merger --rsa 3 --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}${AARCH32}TRUST.ini
 		# RK3368 use rk big endian SHA256, it's pack magic is "2"
 		elif [ $RKCHIP = "RK3368" ]; then
-			${TOOLCHAIN_RKBIN}/trust_merger --sha 2 --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini
+			${TOOLCHAIN_RKBIN}/trust_merger --sha 2 --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}${AARCH32}TRUST.ini
 		else
-			${TOOLCHAIN_RKBIN}/trust_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini
+			${TOOLCHAIN_RKBIN}/trust_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}${AARCH32}TRUST.ini
 		fi
 
 		cd -
 		mv ${RKBIN}/trust.img ./trust.img
-		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini"
+		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKCHIP}${AARCH32}TRUST.ini"
 	# ARM uses loaderimage
 	else
 		if [ ! -f ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini ]; then

commit 76a38da738e8d6eab8a4ae8460a0678386aa1cb8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed May 30 14:34:19 2018 +0800

    configs: add android6.0-rk3399_defconfig
    
    This is a copy from evb-rk3399_defconfig
    
    Change-Id: I2c9511252da97832ca7774f399170ea7494ee2e4
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/android6.0-rk3399_defconfig b/configs/android6.0-rk3399_defconfig
new file mode 100644
index 0000000000..2a907019bd
--- /dev/null
+++ b/configs/android6.0-rk3399_defconfig
@@ -0,0 +1,104 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_ROCKCHIP_RK3399=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
+CONFIG_RKIMG_BOOTLOADER=y
+# CONFIG_USING_KERNEL_DTB is not set
+CONFIG_SPL_STACK_R_ADDR=0x80000
+CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_FASTBOOT_BUF_ADDR=0x00800800
+CONFIG_FASTBOOT_BUF_SIZE=0x08000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_RKPARM_PARTITION=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_ROCKCHIP_EFUSE=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0xFF1A0000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x330a
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX=y
+CONFIG_USB_ETHER_ASIX88179=y
+CONFIG_USB_ETHER_MCS7830=y
+CONFIG_USB_ETHER_RTL8152=y
+CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
+CONFIG_DRM_ROCKCHIP_LVDS=y
+CONFIG_DRM_ROCKCHIP_RGB=y
+CONFIG_LCD=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_ERRNO_STR=y

commit 5cb579f13bf7e1a5e850c392a6c9197881ae8176
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu May 31 14:29:49 2018 +0800

    rockchip: clk: rv1108: Add some frequency setting interfaces
    
    support PLL freq setting,
    support bus and peri clk freq setting,
    support aclk vio and dclk vop freq setting.
    
    Change-Id: I894552c1e1bb1bd13a143e200edf289234a53c1d
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rv1108.h b/arch/arm/include/asm/arch-rockchip/cru_rv1108.h
index f7b8c13d0f..b57c07e55e 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rv1108.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rv1108.h
@@ -12,7 +12,11 @@
 #define OSC_HZ		(24 * 1000 * 1000)
 
 #define APLL_HZ		(600 * 1000000)
-#define GPLL_HZ		(594 * 1000000)
+#define GPLL_HZ		(1188 * 1000000)
+#define ACLK_PERI_HZ	(148500000)
+#define HCLK_PERI_HZ	(148500000)
+#define PCLK_PERI_HZ	(74250000)
+#define ACLK_BUS_HZ	(148500000)
 
 struct rv1108_clk_priv {
 	struct rv1108_cru *cru;
@@ -110,6 +114,7 @@ enum {
 	ACLK_BUS_PLL_SEL_DPLL		= 2,
 	ACLK_BUS_DIV_CON_SHIFT		= 0,
 	ACLK_BUS_DIV_CON_MASK		= 0x1f << ACLK_BUS_DIV_CON_SHIFT,
+	ACLK_BUS_DIV_CON_WIDTH		= 5,
 
 	/* CLKSEL_CON3 */
 	PCLK_BUS_DIV_CON_SHIFT		= 8,
@@ -139,6 +144,7 @@ enum {
 	HCLK_PERI_DIV_CON_MASK		= 0x1f << HCLK_PERI_DIV_CON_SHIFT,
 	ACLK_PERI_DIV_CON_SHIFT		= 0,
 	ACLK_PERI_DIV_CON_MASK		= 0x1f,
+	PERI_DIV_CON_WIDTH		= 5,
 
 	/* CLKSEL24_CON */
 	MAC_PLL_SEL_SHIFT		= 12,
@@ -158,6 +164,38 @@ enum {
 	SFC_CLK_DIV_SHIFT		= 0,
 	SFC_CLK_DIV_MASK		= 0x3f << SFC_CLK_DIV_SHIFT,
 
+	/* CLKSEL28_CON */
+	ACLK_VIO1_PLL_SEL_SHIFT		= 14,
+	ACLK_VIO1_PLL_SEL_MASK		= 3 << ACLK_VIO1_PLL_SEL_SHIFT,
+	VIO_PLL_SEL_DPLL		= 0,
+	VIO_PLL_SEL_GPLL		= 1,
+	ACLK_VIO1_CLK_DIV_SHIFT		= 8,
+	ACLK_VIO1_CLK_DIV_MASK		= 0x1f << ACLK_VIO1_CLK_DIV_SHIFT,
+	CLK_VIO_DIV_CON_WIDTH		= 5,
+	ACLK_VIO0_PLL_SEL_SHIFT		= 6,
+	ACLK_VIO0_PLL_SEL_MASK		= 3 << ACLK_VIO0_PLL_SEL_SHIFT,
+	ACLK_VIO0_CLK_DIV_SHIFT		= 0,
+	ACLK_VIO0_CLK_DIV_MASK		= 0x1f << ACLK_VIO0_CLK_DIV_SHIFT,
+
+	/* CLKSEL29_CON */
+	PCLK_VIO_CLK_DIV_SHIFT		= 8,
+	PCLK_VIO_CLK_DIV_MASK		= 0x1f << PCLK_VIO_CLK_DIV_SHIFT,
+	HCLK_VIO_CLK_DIV_SHIFT		= 0,
+	HCLK_VIO_CLK_DIV_MASK		= 0x1f << HCLK_VIO_CLK_DIV_SHIFT,
+
+	/* CLKSEL32_CON */
+	DCLK_VOP_SEL_SHIFT		= 7,
+	DCLK_VOP_SEL_MASK		= 1 << DCLK_VOP_SEL_SHIFT,
+	DCLK_VOP_SEL_HDMI		= 0,
+	DCLK_VOP_SEL_PLL		= 1,
+	DCLK_VOP_PLL_SEL_SHIFT		= 6,
+	DCLK_VOP_PLL_SEL_MASK		= 1 << DCLK_VOP_PLL_SEL_SHIFT,
+	DCLK_VOP_PLL_SEL_GPLL		= 0,
+	DCLK_VOP_PLL_SEL_DPLL		= 1,
+	DCLK_VOP_CLK_DIV_SHIFT		= 0,
+	DCLK_VOP_CLK_DIV_MASK		= 0x3f << DCLK_VOP_CLK_DIV_SHIFT,
+	DCLK_VOP_DIV_CON_WIDTH		= 6,
+
 	/* SOFTRST1_CON*/
 	DDRPHY_SRSTN_CLKDIV_REQ_SHIFT	= 0,
 	DDRPHY_SRSTN_CLKDIV_REQ		= 1,
diff --git a/drivers/clk/rockchip/clk_rv1108.c b/drivers/clk/rockchip/clk_rv1108.c
index a6c5c47ad8..cbaf0b2913 100644
--- a/drivers/clk/rockchip/clk_rv1108.c
+++ b/drivers/clk/rockchip/clk_rv1108.c
@@ -37,6 +37,9 @@ enum {
 			 #hz "Hz cannot be hit with PLL "\
 			 "divisors on line " __stringify(__LINE__));
 
+static const struct pll_div apll_init_cfg = PLL_DIVISORS(APLL_HZ, 1, 3, 1);
+static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 2, 1);
+
 /* use integer mode */
 static inline int rv1108_pll_id(enum rk_clk_id clk_id)
 {
@@ -59,6 +62,58 @@ static inline int rv1108_pll_id(enum rk_clk_id clk_id)
 	return id;
 }
 
+static int rkclk_set_pll(struct rv1108_cru *cru, enum rk_clk_id clk_id,
+			 const struct pll_div *div)
+{
+	int pll_id = rv1108_pll_id(clk_id);
+	struct rv1108_pll *pll = &cru->pll[pll_id];
+
+	/* All PLLs have same VCO and output frequency range restrictions. */
+	uint vco_hz = OSC_HZ / 1000 * div->fbdiv / div->refdiv * 1000;
+	uint output_hz = vco_hz / div->postdiv1 / div->postdiv2;
+
+	debug("PLL at %p: fb=%d, ref=%d, pst1=%d, pst2=%d, vco=%u Hz, output=%u Hz\n",
+	      pll, div->fbdiv, div->refdiv, div->postdiv1,
+	      div->postdiv2, vco_hz, output_hz);
+	assert(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ &&
+	       output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ);
+
+	/*
+	 * When power on or changing PLL setting,
+	 * we must force PLL into slow mode to ensure output stable clock.
+	 */
+	rk_clrsetreg(&pll->con3, WORK_MODE_MASK,
+		     WORK_MODE_SLOW << WORK_MODE_SHIFT);
+
+	/* use integer mode */
+	rk_setreg(&pll->con3, 1 << DSMPD_SHIFT);
+	/* Power down */
+	rk_setreg(&pll->con3, 1 << GLOBAL_POWER_DOWN_SHIFT);
+
+	rk_clrsetreg(&pll->con0, FBDIV_MASK, div->fbdiv << FBDIV_SHIFT);
+	rk_clrsetreg(&pll->con1, POSTDIV1_MASK | POSTDIV2_MASK | REFDIV_MASK,
+		     (div->postdiv1 << POSTDIV1_SHIFT |
+		     div->postdiv2 << POSTDIV2_SHIFT |
+		     div->refdiv << REFDIV_SHIFT));
+	rk_clrsetreg(&pll->con2, FRACDIV_MASK,
+		     (div->refdiv << REFDIV_SHIFT));
+
+	/* Power Up */
+	rk_clrreg(&pll->con3, 1 << GLOBAL_POWER_DOWN_SHIFT);
+
+	/* waiting for pll lock */
+	while (readl(&pll->con2) & (1 << LOCK_STA_SHIFT))
+		udelay(1);
+
+	/*
+	 * set PLL into normal mode.
+	 */
+	rk_clrsetreg(&pll->con3, WORK_MODE_MASK,
+		     WORK_MODE_NORMAL << WORK_MODE_SHIFT);
+
+	return 0;
+}
+
 static uint32_t rkclk_pll_get_rate(struct rv1108_cru *cru,
 				   enum rk_clk_id clk_id)
 {
@@ -76,7 +131,7 @@ static uint32_t rkclk_pll_get_rate(struct rv1108_cru *cru,
 		fbdiv = (con0 >> FBDIV_SHIFT) & FBDIV_MASK;
 		postdiv1 = (con1 & POSTDIV1_MASK) >> POSTDIV1_SHIFT;
 		postdiv2 = (con1 & POSTDIV2_MASK) >> POSTDIV2_SHIFT;
-		refdiv = (con1 & REFDIV_MASK) >> REFDIV_SHIFT;
+		refdiv = (con1 >> REFDIV_SHIFT) & REFDIV_MASK;
 		freq = (24 * fbdiv / (refdiv * postdiv1 * postdiv2)) * 1000000;
 	} else {
 		freq = OSC_HZ;
@@ -156,6 +211,205 @@ static ulong rv1108_saradc_set_clk(struct rv1108_cru *cru, uint hz)
 	return rv1108_saradc_get_clk(cru);
 }
 
+static ulong rv1108_aclk_vio1_get_clk(struct rv1108_cru *cru)
+{
+	u32 div, val;
+
+	val = readl(&cru->clksel_con[28]);
+	div = bitfield_extract(val, ACLK_VIO1_CLK_DIV_SHIFT,
+			       CLK_VIO_DIV_CON_WIDTH);
+
+	return DIV_TO_RATE(GPLL_HZ, div);
+}
+
+static ulong rv1108_aclk_vio1_set_clk(struct rv1108_cru *cru, uint hz)
+{
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(GPLL_HZ, hz) - 1;
+	assert(src_clk_div < 32);
+
+	rk_clrsetreg(&cru->clksel_con[28],
+		     ACLK_VIO1_CLK_DIV_MASK | ACLK_VIO1_PLL_SEL_MASK,
+		     (src_clk_div << ACLK_VIO1_CLK_DIV_SHIFT) |
+		     (VIO_PLL_SEL_GPLL << ACLK_VIO1_PLL_SEL_SHIFT));
+
+	return rv1108_aclk_vio1_get_clk(cru);
+}
+
+static ulong rv1108_aclk_vio0_get_clk(struct rv1108_cru *cru)
+{
+	u32 div, val;
+
+	val = readl(&cru->clksel_con[28]);
+	div = bitfield_extract(val, ACLK_VIO0_CLK_DIV_SHIFT,
+			       CLK_VIO_DIV_CON_WIDTH);
+
+	return DIV_TO_RATE(GPLL_HZ, div);
+}
+
+static ulong rv1108_aclk_vio0_set_clk(struct rv1108_cru *cru, uint hz)
+{
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(GPLL_HZ, hz) - 1;
+	assert(src_clk_div < 32);
+
+	rk_clrsetreg(&cru->clksel_con[28],
+		     ACLK_VIO0_CLK_DIV_MASK | ACLK_VIO0_PLL_SEL_MASK,
+		     (src_clk_div << ACLK_VIO0_CLK_DIV_SHIFT) |
+		     (VIO_PLL_SEL_GPLL << ACLK_VIO0_PLL_SEL_SHIFT));
+
+	/*HCLK_VIO default div = 4*/
+	rk_clrsetreg(&cru->clksel_con[29],
+		     HCLK_VIO_CLK_DIV_MASK,
+		     3 << HCLK_VIO_CLK_DIV_SHIFT);
+	/*PCLK_VIO default div = 4*/
+	rk_clrsetreg(&cru->clksel_con[29],
+		     PCLK_VIO_CLK_DIV_MASK,
+		     3 << PCLK_VIO_CLK_DIV_SHIFT);
+
+	return rv1108_aclk_vio0_get_clk(cru);
+}
+
+static ulong rv1108_dclk_vop_get_clk(struct rv1108_cru *cru)
+{
+	u32 div, val;
+
+	val = readl(&cru->clksel_con[32]);
+	div = bitfield_extract(val, DCLK_VOP_CLK_DIV_SHIFT,
+			       DCLK_VOP_DIV_CON_WIDTH);
+
+	return DIV_TO_RATE(GPLL_HZ, div);
+}
+
+static ulong rv1108_dclk_vop_set_clk(struct rv1108_cru *cru, uint hz)
+{
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(GPLL_HZ, hz) - 1;
+	assert(src_clk_div < 64);
+
+	rk_clrsetreg(&cru->clksel_con[32],
+		     DCLK_VOP_CLK_DIV_MASK | DCLK_VOP_PLL_SEL_MASK |
+		     DCLK_VOP_SEL_SHIFT,
+		     (src_clk_div << DCLK_VOP_CLK_DIV_SHIFT) |
+		     (DCLK_VOP_PLL_SEL_GPLL << DCLK_VOP_PLL_SEL_SHIFT) |
+		     (DCLK_VOP_SEL_PLL << DCLK_VOP_SEL_SHIFT));
+
+	return rv1108_dclk_vop_get_clk(cru);
+}
+
+static ulong rv1108_aclk_bus_get_clk(struct rv1108_cru *cru)
+{
+	u32 div, val;
+	ulong parent_rate = rkclk_pll_get_rate(cru, CLK_GENERAL);
+
+	val = readl(&cru->clksel_con[2]);
+	div = bitfield_extract(val, ACLK_BUS_DIV_CON_SHIFT,
+			       ACLK_BUS_DIV_CON_WIDTH);
+
+	return DIV_TO_RATE(parent_rate, div);
+}
+
+static ulong rv1108_aclk_bus_set_clk(struct rv1108_cru *cru, uint hz)
+{
+	int src_clk_div;
+	ulong parent_rate = rkclk_pll_get_rate(cru, CLK_GENERAL);
+
+	src_clk_div = DIV_ROUND_UP(parent_rate, hz) - 1;
+	assert(src_clk_div < 32);
+
+	rk_clrsetreg(&cru->clksel_con[2],
+		     ACLK_BUS_DIV_CON_MASK | ACLK_BUS_PLL_SEL_MASK,
+		     (src_clk_div << ACLK_BUS_DIV_CON_SHIFT) |
+		     (ACLK_BUS_PLL_SEL_GPLL << ACLK_BUS_PLL_SEL_SHIFT));
+
+	return rv1108_aclk_bus_get_clk(cru);
+}
+
+static ulong rv1108_aclk_peri_get_clk(struct rv1108_cru *cru)
+{
+	u32 div, val;
+	ulong parent_rate = rkclk_pll_get_rate(cru, CLK_GENERAL);
+
+	val = readl(&cru->clksel_con[23]);
+	div = bitfield_extract(val, ACLK_PERI_DIV_CON_SHIFT,
+			       PERI_DIV_CON_WIDTH);
+
+	return DIV_TO_RATE(parent_rate, div);
+}
+
+static ulong rv1108_hclk_peri_get_clk(struct rv1108_cru *cru)
+{
+	u32 div, val;
+	ulong parent_rate = rkclk_pll_get_rate(cru, CLK_GENERAL);
+
+	val = readl(&cru->clksel_con[23]);
+	div = bitfield_extract(val, HCLK_PERI_DIV_CON_SHIFT,
+			       PERI_DIV_CON_WIDTH);
+
+	return DIV_TO_RATE(parent_rate, div);
+}
+
+static ulong rv1108_pclk_peri_get_clk(struct rv1108_cru *cru)
+{
+	u32 div, val;
+	ulong parent_rate = rkclk_pll_get_rate(cru, CLK_GENERAL);
+
+	val = readl(&cru->clksel_con[23]);
+	div = bitfield_extract(val, PCLK_PERI_DIV_CON_SHIFT,
+			       PERI_DIV_CON_WIDTH);
+
+	return DIV_TO_RATE(parent_rate, div);
+}
+
+static ulong rv1108_aclk_peri_set_clk(struct rv1108_cru *cru, uint hz)
+{
+	int src_clk_div;
+	ulong parent_rate = rkclk_pll_get_rate(cru, CLK_GENERAL);
+
+	src_clk_div = DIV_ROUND_UP(parent_rate, hz) - 1;
+	assert(src_clk_div < 32);
+
+	rk_clrsetreg(&cru->clksel_con[23],
+		     ACLK_PERI_DIV_CON_MASK | ACLK_PERI_PLL_SEL_MASK,
+		     (src_clk_div << ACLK_PERI_DIV_CON_SHIFT) |
+		     (ACLK_PERI_PLL_SEL_GPLL << ACLK_PERI_PLL_SEL_SHIFT));
+
+	return rv1108_aclk_peri_get_clk(cru);
+}
+
+static ulong rv1108_hclk_peri_set_clk(struct rv1108_cru *cru, uint hz)
+{
+	int src_clk_div;
+	ulong parent_rate = rkclk_pll_get_rate(cru, CLK_GENERAL);
+
+	src_clk_div = DIV_ROUND_UP(parent_rate, hz) - 1;
+	assert(src_clk_div < 32);
+
+	rk_clrsetreg(&cru->clksel_con[23],
+		     HCLK_PERI_DIV_CON_MASK,
+		     (src_clk_div << HCLK_PERI_DIV_CON_SHIFT));
+
+	return rv1108_hclk_peri_get_clk(cru);
+}
+
+static ulong rv1108_pclk_peri_set_clk(struct rv1108_cru *cru, uint hz)
+{
+	int src_clk_div;
+	ulong parent_rate = rkclk_pll_get_rate(cru, CLK_GENERAL);
+
+	src_clk_div = DIV_ROUND_UP(parent_rate, hz) - 1;
+	assert(src_clk_div < 32);
+
+	rk_clrsetreg(&cru->clksel_con[23],
+		     PCLK_PERI_DIV_CON_MASK,
+		     (src_clk_div << PCLK_PERI_DIV_CON_SHIFT));
+
+	return rv1108_pclk_peri_get_clk(cru);
+}
+
 static ulong rv1108_clk_get_rate(struct clk *clk)
 {
 	struct rv1108_clk_priv *priv = dev_get_priv(clk->dev);
@@ -165,6 +419,20 @@ static ulong rv1108_clk_get_rate(struct clk *clk)
 		return rkclk_pll_get_rate(priv->cru, clk->id);
 	case SCLK_SARADC:
 		return rv1108_saradc_get_clk(priv->cru);
+	case ACLK_VIO0:
+		return rv1108_aclk_vio0_get_clk(priv->cru);
+	case ACLK_VIO1:
+		return rv1108_aclk_vio1_get_clk(priv->cru);
+	case DCLK_VOP:
+		return rv1108_dclk_vop_get_clk(priv->cru);
+	case ACLK_PRE:
+		return rv1108_aclk_bus_get_clk(priv->cru);
+	case ACLK_PERI:
+		return rv1108_aclk_peri_get_clk(priv->cru);
+	case HCLK_PERI:
+		return rv1108_hclk_peri_get_clk(priv->cru);
+	case PCLK_PERI:
+		return rv1108_pclk_peri_get_clk(priv->cru);
 	default:
 		return -ENOENT;
 	}
@@ -185,6 +453,27 @@ static ulong rv1108_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_SARADC:
 		new_rate = rv1108_saradc_set_clk(priv->cru, rate);
 		break;
+	case ACLK_VIO0:
+		new_rate = rv1108_aclk_vio0_set_clk(priv->cru, rate);
+		break;
+	case ACLK_VIO1:
+		new_rate = rv1108_aclk_vio1_set_clk(priv->cru, rate);
+		break;
+	case DCLK_VOP:
+		new_rate = rv1108_dclk_vop_set_clk(priv->cru, rate);
+		break;
+	case ACLK_PRE:
+		new_rate = rv1108_aclk_bus_set_clk(priv->cru, rate);
+		break;
+	case ACLK_PERI:
+		new_rate = rv1108_aclk_peri_set_clk(priv->cru, rate);
+		break;
+	case HCLK_PERI:
+		new_rate = rv1108_hclk_peri_set_clk(priv->cru, rate);
+		break;
+	case PCLK_PERI:
+		new_rate = rv1108_pclk_peri_set_clk(priv->cru, rate);
+		break;
 	default:
 		return -ENOENT;
 	}
@@ -199,14 +488,34 @@ static const struct clk_ops rv1108_clk_ops = {
 
 static void rkclk_init(struct rv1108_cru *cru)
 {
-	unsigned int apll = rkclk_pll_get_rate(cru, CLK_ARM);
-	unsigned int dpll = rkclk_pll_get_rate(cru, CLK_DDR);
-	unsigned int gpll = rkclk_pll_get_rate(cru, CLK_GENERAL);
+	unsigned int apll, dpll, gpll;
+	unsigned int aclk_bus, aclk_peri, hclk_peri, pclk_peri;
+
+	aclk_bus = rv1108_aclk_bus_set_clk(cru, ACLK_BUS_HZ / 2);
+	aclk_peri = rv1108_aclk_peri_set_clk(cru, ACLK_PERI_HZ / 2);
+	hclk_peri = rv1108_hclk_peri_set_clk(cru, HCLK_PERI_HZ / 2);
+	pclk_peri = rv1108_pclk_peri_set_clk(cru, PCLK_PERI_HZ / 2);
+	rv1108_aclk_vio0_set_clk(cru, 297000000);
+	rv1108_aclk_vio1_set_clk(cru, 297000000);
+
+	/* configure apll */
+	rkclk_set_pll(cru, CLK_ARM, &apll_init_cfg);
+	rkclk_set_pll(cru, CLK_GENERAL, &gpll_init_cfg);
+	aclk_bus = rv1108_aclk_bus_set_clk(cru, ACLK_BUS_HZ);
+	aclk_peri = rv1108_aclk_peri_set_clk(cru, ACLK_PERI_HZ);
+	hclk_peri = rv1108_hclk_peri_set_clk(cru, HCLK_PERI_HZ);
+	pclk_peri = rv1108_pclk_peri_set_clk(cru, PCLK_PERI_HZ);
+
+	apll = rkclk_pll_get_rate(cru, CLK_ARM);
+	dpll = rkclk_pll_get_rate(cru, CLK_DDR);
+	gpll = rkclk_pll_get_rate(cru, CLK_GENERAL);
 
 	rk_clrsetreg(&cru->clksel_con[0], CORE_CLK_DIV_MASK,
 		     0 << MAC_CLK_DIV_SHIFT);
 
 	printf("APLL: %d DPLL:%d GPLL:%d\n", apll, dpll, gpll);
+	printf("ACLK_BUS: %d ACLK_PERI:%d HCLK_PERI:%d PCLK_PERI:%d\n",
+	       aclk_bus, aclk_peri, hclk_peri, pclk_peri);
 }
 
 static int rv1108_clk_probe(struct udevice *dev)
diff --git a/include/dt-bindings/clock/rv1108-cru.h b/include/dt-bindings/clock/rv1108-cru.h
index 7defc6b282..dcc6e42463 100644
--- a/include/dt-bindings/clock/rv1108-cru.h
+++ b/include/dt-bindings/clock/rv1108-cru.h
@@ -41,6 +41,7 @@
 #define SCLK_MACREF_OUT			90
 #define SCLK_SARADC			91
 
+#define DCLK_VOP                        187
 
 /* aclk gates */
 #define ACLK_DMAC			192
@@ -48,7 +49,9 @@
 #define ACLK_CORE			194
 #define ACLK_ENMCORE			195
 #define ACLK_GMAC			196
-
+#define ACLK_VIO0                       200
+#define ACLK_VIO1                       201
+#define ACLK_PERI                       209
 
 /* pclk gates */
 #define PCLK_GPIO1			256
@@ -69,6 +72,7 @@
 #define PCLK_PERI			271
 #define PCLK_GMAC			272
 #define PCLK_SARADC			273
+#define PCLK_VIO                        276
 
 /* hclk gates */
 #define HCLK_I2S0_8CH			320
@@ -80,8 +84,9 @@
 #define HCLK_EMMC			326
 #define HCLK_PERI			327
 #define HCLK_SFC			328
+#define HCLK_VIO                        332
 
-#define CLK_NR_CLKS			(HCLK_SFC + 1)
+#define CLK_NR_CLKS			(HCLK_VIO + 1)
 
 /* reset id */
 #define SRST_CORE_PO_AD		0

commit 3b296e2b3d2e422038b490a1aaa54033804346f9
Author: MengDongyang <daniel.meng@rock-chips.com>
Date:   Tue May 29 04:59:28 2018 -0700

    rockchip: dts: rv1108: correct the reference of u2phy
    
    The reference of u2phy should be OTG port or host port in
    the DT node of USB controller. Because the phy ops is bind
    to each port or u2phy. So it will result in a NULL point if
    we use the parent DT node as reference. This patch change
    <&u2phy 1> to <&u2phy_otg> and <&u2phy_host> to solve this
    problem.
    
    Change-Id: I7e8fc5fcdeb1ce188c857bb3c5caa23aa713988e
    Signed-off-by: MengDongyang <daniel.meng@rock-chips.com>

diff --git a/arch/arm/dts/rv1108.dtsi b/arch/arm/dts/rv1108.dtsi
index 7349239007..da3123b8d1 100644
--- a/arch/arm/dts/rv1108.dtsi
+++ b/arch/arm/dts/rv1108.dtsi
@@ -218,7 +218,7 @@
 		compatible = "generic-ehci";
 		reg = <0x30140000 0x20000>;
 		interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
-		phys = <&u2phy 1>;
+		phys = <&u2phy_host>;
 		phy-names = "usb";
 		status = "disabled";
 	};
@@ -227,7 +227,7 @@
 		compatible = "generic-ohci";
 		reg = <0x30160000 0x20000>;
 		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
-		phys = <&u2phy 1>;
+		phys = <&u2phy_host>;
 		phy-names = "usb";
 		status = "disabled";
 	};
@@ -239,7 +239,7 @@
 		interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
 		hnp-srp-disable;
 		dr_mode = "otg";
-		phys = <&u2phy 0>;
+		phys = <&u2phy_otg>;
 		phy-names = "usb";
 		status = "disabled";
 	};

commit 5cfdc12322e0357b93ce91105b5797d07be3b9a9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon May 7 16:00:16 2018 +0800

    pmic: rk8xx: make relative message more clear
    
    1. adjust error message easy to be understood;
    2. show RK808 chip id as "RK808";
    3. check PMIC chip id read failed;
    
    Change-Id: Ifc4c25ccc8cac4fdd91bcf6515b1dd6aa1bf71fa
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index 6dc3edb13c..732f3dca5e 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -56,7 +56,7 @@ static int rk8xx_write(struct udevice *dev, uint reg, const uint8_t *buff,
 
 	ret = dm_i2c_write(dev, reg, buff, len);
 	if (ret) {
-		debug("write error to device: %p register: %#x!", dev, reg);
+		printf("%s: write reg 0x%02x failed, ret=%d\n", __func__, reg, ret);
 		return ret;
 	}
 
@@ -69,7 +69,7 @@ static int rk8xx_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
 
 	ret = dm_i2c_read(dev, reg, buff, len);
 	if (ret) {
-		debug("read error from device: %p register: %#x!", dev, reg);
+		printf("%s: read reg 0x%02x failed, ret=%d\n", __func__, reg, ret);
 		return ret;
 	}
 
@@ -105,16 +105,14 @@ static int rk8xx_shutdown(struct udevice *dev)
 
 	ret = dm_i2c_read(dev, devctrl_reg, &val, 1);
 	if (ret) {
-		printf("read error from device: %p register: %#x!",
-		       dev, devctrl_reg);
+		printf("%s: read reg 0x%02x failed, ret=%d\n", __func__, devctrl_reg, ret);
 		return ret;
 	}
 
 	val |= dev_off;
 	ret = dm_i2c_write(dev, devctrl_reg, &val, 1);
 	if (ret) {
-		printf("write error to device: %p register: %#x!",
-		       dev, devctrl_reg);
+		printf("%s: write reg 0x%02x failed, ret=%d\n", __func__, devctrl_reg, ret);
 		return ret;
 	}
 
@@ -129,7 +127,7 @@ static int rk8xx_bind(struct udevice *dev)
 
 	regulators_node = dev_read_subnode(dev, "regulators");
 	if (!ofnode_valid(regulators_node)) {
-		debug("%s: %s regulators subnode not found!", __func__,
+		debug("%s: %s regulators subnode not found!\n", __func__,
 		      dev->name);
 		return -ENXIO;
 	}
@@ -158,7 +156,7 @@ static int rk8xx_probe(struct udevice *dev)
 	struct rk8xx_priv *priv = dev_get_priv(dev);
 	struct reg_data *init_data = NULL;
 	int init_data_num = 0;
-	int ret = 0, i;
+	int ret = 0, i, show_variant;
 	uint8_t msb, lsb, id_msb, id_lsb;
 
 	/* read Chip variant */
@@ -171,13 +169,20 @@ static int rk8xx_probe(struct udevice *dev)
 		id_lsb = ID_LSB;
 	}
 
-	rk8xx_read(dev, id_msb, &msb, 1);
-	rk8xx_read(dev, id_lsb, &lsb, 1);
+	ret = rk8xx_read(dev, id_msb, &msb, 1);
+	if (ret)
+		return ret;
+	ret = rk8xx_read(dev, id_lsb, &lsb, 1);
+	if (ret)
+		return ret;
 
 	priv->variant = ((msb << 8) | lsb) & RK8XX_ID_MSK;
+	show_variant = priv->variant;
 	switch (priv->variant) {
-	case RK805_ID:
 	case RK808_ID:
+		show_variant = 0x808;	/* RK808 hardware ID is 0 */
+		break;
+	case RK805_ID:
 	case RK816_ID:
 	case RK818_ID:
 		break;
@@ -207,7 +212,7 @@ static int rk8xx_probe(struct udevice *dev)
 		      pmic_reg_read(dev, init_data[i].reg));
 	}
 
-	printf("PMIC:  RK%x\n", priv->variant);
+	printf("PMIC:  RK%x\n", show_variant);
 
 	return 0;
 }

commit 1bb49bc4e2f612da166d09b71ad250f00f6f643c
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Tue May 29 11:07:19 2018 +0800

    rockchip: rkflash: adjust sfc bounce buffer addr for 32bits and 64bits alterable
    
    Change-Id: I276540d8ae20536124bcb9ad995d941fd8c04866
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/sfc.c b/drivers/rkflash/sfc.c
index b0f50defb7..cb4920b5a8 100644
--- a/drivers/rkflash/sfc.c
+++ b/drivers/rkflash/sfc.c
@@ -91,7 +91,7 @@ int sfc_request(u32 sfcmd, u32 sfctrl, u32 addr, void *data)
 
 		writel(0xFFFFFFFF, g_sfc_reg + SFC_ICLR);
 		writel(~((u32)FINISH_INT), g_sfc_reg + SFC_IMR);
-		writel((u64)bb.bounce_buffer, g_sfc_reg + SFC_DMA_ADDR);
+		writel((unsigned long)bb.bounce_buffer, g_sfc_reg + SFC_DMA_ADDR);
 		writel(SFC_DMA_START, g_sfc_reg + SFC_DMA_TRIGGER);
 
 		timeout = cmd.b.datasize * 10;

commit 5eb61944c8dd44b34ab22d821a2775b182e3c23a
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Mon May 28 20:32:36 2018 +0800

    drm/rockchip: loader kernel bmp for rk fb driver
    
    Kernel rkfb driver need a separate function to load the kernel bmp,
    which is different with kernel using drm driver.
    
    Change-Id: I01662bf88e47e685f2a4ee1c4306f1f7e69bed3b
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 69eb7900e4..f9d1919918 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -790,6 +790,41 @@ struct rockchip_logo_cache *find_or_alloc_logo_cache(const char *bmp)
 	return logo_cache;
 }
 
+/* Note: used only for rkfb kernel driver */
+static int load_kernel_bmp_logo(struct logo_info *logo, const char *bmp_name)
+{
+#ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
+	void *dst = NULL;
+	int len, size;
+	struct bmp_header *header;
+
+	if (!logo || !bmp_name)
+		return -EINVAL;
+
+	header = malloc(RK_BLK_SIZE);
+	if (!header)
+		return -ENOMEM;
+
+	len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE);
+	if (len != RK_BLK_SIZE) {
+		free(header);
+		return -EINVAL;
+	}
+	size = get_unaligned_le32(&header->file_size);
+	dst = (void *)(memory_start + MEMORY_POOL_SIZE / 2);
+	len = rockchip_read_resource_file(dst, bmp_name, 0, size);
+	if (len != size) {
+		printf("failed to load bmp %s\n", bmp_name);
+		free(header);
+		return -ENOENT;
+	}
+
+	logo->mem = dst;
+
+	return 0;
+#endif
+}
+
 static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 {
 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
@@ -930,8 +965,8 @@ void rockchip_show_logo(void)
 			printf("failed to display uboot logo\n");
 		else
 			display_logo(s);
-		if (load_bmp_logo(&s->logo, s->klogo_name))
-			printf("failed to display kernel logo\n");
+
+		/* Load kernel bmp in rockchip_display_fixup() later */
 	}
 }
 
@@ -1096,17 +1131,25 @@ void rockchip_display_fixup(void *blob)
 	if (!get_display_size())
 		return;
 
-	offset = fdt_update_reserved_memory(blob, "rockchip,drm-logo",
-					       (u64)memory_start,
-					       (u64)get_display_size());
-	if (offset < 0) {
-		printf("failed to add drm-loader-logo memory\n");
+	if (fdt_node_offset_by_compatible(blob, 0, "rockchip,drm-logo") >= 0) {
+		list_for_each_entry(s, &rockchip_display_list, head)
+			load_bmp_logo(&s->logo, s->klogo_name);
+		offset = fdt_update_reserved_memory(blob, "rockchip,drm-logo",
+						    (u64)memory_start,
+						    (u64)get_display_size());
+		if (offset < 0)
+			printf("failed to reserve drm-loader-logo memory\n");
+	} else {
+		printf("can't found rockchip,drm-logo, use rockchip,fb-logo\n");
 		/* Compatible with rkfb display, only need reserve memory */
 		offset = fdt_update_reserved_memory(blob, "rockchip,fb-logo",
-					       (u64)memory_start,
-					       (u64)get_display_size());
+						    (u64)memory_start,
+						    MEMORY_POOL_SIZE);
 		if (offset < 0)
-			printf("failed to add fb-loader-logo memory\n");
+			printf("failed to reserve fb-loader-logo memory\n");
+		else
+			list_for_each_entry(s, &rockchip_display_list, head)
+				load_kernel_bmp_logo(&s->logo, s->klogo_name);
 		return;
 	}
 

commit 5757fb55a6df9fbeb750736def54313ef70c00e6
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu May 24 10:02:19 2018 +0800

    rockchip: rk3399-evb: enable rockchip drm display without kernel dtb
    
    Use rockchip display driver instead of upstream display driver.
    
    Change-Id: Ie6356f447bcd49d65b81cec8c09a80c3cb333c70
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index ccd490fbb2..2a907019bd 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -6,15 +6,15 @@ CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_ROCKCHIP_RK3399=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
 CONFIG_RKIMG_BOOTLOADER=y
-CONFIG_ANDROID_BOOTLOADER=y
+# CONFIG_USING_KERNEL_DTB is not set
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb"
 CONFIG_DEBUG_UART=y
-CONFIG_ANDROID_BOOT_IMAGE=y
 CONFIG_FIT=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
 CONFIG_SPL_ATF=y
@@ -37,6 +37,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y
 CONFIG_CMD_TIME=y
 CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_REGMAP=y
@@ -93,9 +94,11 @@ CONFIG_USB_ETHER_RTL8152=y
 CONFIG_USB_ETHER_SMSC95XX=y
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
-CONFIG_VIDEO_ROCKCHIP=y
-CONFIG_VIDEO_ROCKCHIP_MAX_YRES=1200
-CONFIG_DISPLAY_ROCKCHIP_MIPI=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
+CONFIG_DRM_ROCKCHIP_LVDS=y
+CONFIG_DRM_ROCKCHIP_RGB=y
+CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_ERRNO_STR=y
-CONFIG_ENV_IS_NOWHERE=y

commit 694afdc865333f8f628d6f5841f48b2ceef3258b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon May 28 17:54:11 2018 +0800

    rockchip: display: support reserve memory for rkfb
    
    Some rockchip SDK like rk3399 Android 6.0 is still using rkfb in
    kernel as display framework, in this case we need to:
    - use a separate dtb in U-Boot which is drm display node;
    - disable CONFIG_USING_KERNEL_DTB in U-Boot
    - pass the reserve memory for kernel rkfb in U-Boot
    
    Change-Id: I80df05d3cf15dce203c4397544b65f80fde1d22a
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index d192193476..69eb7900e4 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -1089,7 +1089,7 @@ void rockchip_display_fixup(void *blob)
 	const struct rockchip_connector *conn;
 	const struct rockchip_crtc *crtc;
 	struct display_state *s;
-	u32 offset;
+	int offset;
 	const struct device_node *np;
 	const char *path;
 
@@ -1101,6 +1101,12 @@ void rockchip_display_fixup(void *blob)
 					       (u64)get_display_size());
 	if (offset < 0) {
 		printf("failed to add drm-loader-logo memory\n");
+		/* Compatible with rkfb display, only need reserve memory */
+		offset = fdt_update_reserved_memory(blob, "rockchip,fb-logo",
+					       (u64)memory_start,
+					       (u64)get_display_size());
+		if (offset < 0)
+			printf("failed to add fb-loader-logo memory\n");
 		return;
 	}
 

commit 0313794beec099a565b407e8a41c5bfdb25dafc9
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon May 28 17:56:56 2018 +0800

    rockchip: dts: update rk3399 drm display node
    
    This has been test in rk3399-execavator board with edp panel.
    
    Change-Id: I6ad5176c305883a037f6571623b5f6f754a8f6c1
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts
index 42f67e7a89..a4ddd0075e 100644
--- a/arch/arm/dts/rk3399-evb.dts
+++ b/arch/arm/dts/rk3399-evb.dts
@@ -10,6 +10,7 @@
 #include "rk3399.dtsi"
 #include "rk3399-sdram-lpddr3-4GB-1600.dtsi"
 #include "rk3399-u-boot.dtsi"
+#include <linux/media-bus-format.h>
 
 / {
 	model = "Rockchip RK3399 Evaluation Board";
@@ -126,13 +127,62 @@
 		status = "disabled";
 	};
 
-	panel:panel {
+	vcc5v0_sys: vcc5v0-sys {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc5v0_sys";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+	};
+
+	vcc_lcd: vcc-lcd {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_lcd";
+		gpio = <&gpio4 30 GPIO_ACTIVE_HIGH>;
+		startup-delay-us = <20000>;
+		enable-active-high;
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-boot-on;
+		vin-supply = <&vcc5v0_sys>;
+	};
+
+	panel: panel {
 		compatible = "simple-panel";
-		power-supply = <&vcc33_lcd>;
 		backlight = <&backlight>;
-		/*enable-gpios = <&gpio4 18 GPIO_ACTIVE_HIGH>;*/
-		status = "disabled";
+		power-supply = <&vcc_lcd>;
+		enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
+		prepare-delay-ms = <20>;
+		enable-delay-ms = <20>;
+
+		display-timings {
+			native-mode = <&timing0>;
+
+			timing0: timing0 {
+				clock-frequency = <200000000>;
+				hactive = <1536>;
+				vactive = <2048>;
+				hfront-porch = <12>;
+				hsync-len = <16>;
+				hback-porch = <48>;
+				vfront-porch = <8>;
+				vsync-len = <4>;
+				vback-porch = <8>;
+				hsync-active = <0>;
+				vsync-active = <0>;
+				de-active = <0>;
+				pixelclk-active = <0>;
+			};
+		};
+
+		ports {
+			panel_in: endpoint {
+				remote-endpoint = <&edp_out>;
+			};
+		};
 	};
+
 };
 
 &emmc_phy {
@@ -276,3 +326,39 @@
 	rx_delay = <0x11>;
 	status = "okay";
 };
+
+&backlight {
+	status = "okay";
+	enable-gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
+};
+
+&route_edp {
+	status = "okay";
+};
+
+&edp_in_vopl {
+	status = "disabled";
+};
+
+&edp_in_vopb {
+	status = "okay";
+};
+
+&edp {
+	status = "okay";
+	force-hpd;
+
+	ports {
+		port@1 {
+			reg = <1>;
+
+			edp_out: endpoint {
+				remote-endpoint = <&panel_in>;
+			};
+		};
+	};
+};
+
+&vopb {
+	status = "okay";
+};
diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
index cfae43ef9f..6c56e51588 100644
--- a/arch/arm/dts/rk3399.dtsi
+++ b/arch/arm/dts/rk3399.dtsi
@@ -118,6 +118,32 @@
 		};
 	};
 
+	display_subsystem: display-subsystem {
+		compatible = "rockchip,display-subsystem";
+		ports = <&vopb_out>, <&vopl_out>;
+		status = "okay";
+
+		route {
+			route_hdmi: route-hdmi {
+				status = "disabled";
+				logo,uboot = "logo.bmp";
+				logo,kernel = "logo_kernel.bmp";
+				logo,mode = "center";
+				charge_logo,mode = "center";
+				connect = <&vopb_out_hdmi>;
+			};
+
+			route_edp: route-edp {
+				status = "disabled";
+				logo,uboot = "logo.bmp";
+				logo,kernel = "logo_kernel.bmp";
+				logo,mode = "center";
+				charge_logo,mode = "center";
+				connect = <&vopb_out_edp>;
+			};
+		};
+	};
+
 	pmu_a53 {
 		compatible = "arm,cortex-a53-pmu";
 		interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW &ppi_cluster0>;
@@ -1405,7 +1431,7 @@
 			#address-cells = <1>;
 			#size-cells = <0>;
 			vopl_out_mipi: endpoint@0 {
-				reg = <3>;
+				reg = <0>;
 				remote-endpoint = <&mipi_in_vopl>;
 			};
 
@@ -1413,6 +1439,11 @@
 				reg = <1>;
 				remote-endpoint = <&hdmi_in_vopl>;
 			};
+
+			vopl_out_edp: endpoint@2 {
+				reg = <2>;
+				remote-endpoint = <&edp_in_vopl>;
+			};
 		};
 	};
 
@@ -1430,7 +1461,7 @@
 			#address-cells = <1>;
 			#size-cells = <0>;
 			vopb_out_mipi: endpoint@0 {
-				reg = <3>;
+				reg = <0>;
 				remote-endpoint = <&mipi_in_vopb>;
 			};
 
@@ -1438,6 +1469,11 @@
 				reg = <1>;
 				remote-endpoint = <&hdmi_in_vopb>;
 			};
+
+			vopb_out_edp: endpoint@2 {
+				reg = <2>;
+				remote-endpoint = <&edp_in_vopb>;
+			};
 		};
 	};
 
@@ -1452,7 +1488,7 @@
 		interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH 0>;
 		clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_SFR>, <&cru PLL_VPLL>, <&cru PCLK_VIO_GRF>;
 		clock-names = "iahb", "isfr", "vpll", "grf";
-		status = "disabled";
+		status = "okay";
 
 		ports {
 			hdmi_in: port {
@@ -1500,6 +1536,42 @@
 		};
 	};
 
+	edp: edp@ff970000 {
+		compatible = "rockchip,rk3399-edp";
+		reg = <0x0 0xff970000 0x0 0x8000>;
+		interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH 0>;
+		clocks = <&cru PCLK_EDP>, <&cru PCLK_EDP_CTRL>;
+		clock-names = "dp", "pclk";
+		power-domains = <&power RK3399_PD_EDP>;
+		resets = <&cru SRST_P_EDP_CTRL>;
+		reset-names = "dp";
+		rockchip,grf = <&grf>;
+		status = "disabled";
+		pinctrl-names = "default";
+		pinctrl-0 = <&edp_hpd>;
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			edp_in: port@0 {
+				reg = <0>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				edp_in_vopb: endpoint@0 {
+					reg = <0>;
+					remote-endpoint = <&vopb_out_edp>;
+				};
+
+				edp_in_vopl: endpoint@1 {
+					reg = <1>;
+					remote-endpoint = <&vopl_out_edp>;
+				};
+			};
+		};
+	};
+
 	pinctrl: pinctrl {
 		compatible = "rockchip,rk3399-pinctrl";
 		rockchip,grf = <&grf>;

commit 532b87c785bae5460bd1bea099ae44e2219c7bd8
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon May 28 11:47:08 2018 +0800

    video/drm: edp: fix compile error
    
    Change-Id: Iacf2f895c44689c25cf4ac735b60618f959d2aed
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_analogix_dp.c b/drivers/video/drm/rockchip_analogix_dp.c
index b86863ec3f..7b92e1b632 100644
--- a/drivers/video/drm/rockchip_analogix_dp.c
+++ b/drivers/video/drm/rockchip_analogix_dp.c
@@ -11,6 +11,7 @@
 #include <asm/unaligned.h>
 #include <asm/io.h>
 #include <dm/device.h>
+#include <dm/read.h>
 #include <linux/list.h>
 #include <syscon.h>
 #include <asm/arch-rockchip/clock.h>
@@ -841,7 +842,6 @@ static int rockchip_analogix_dp_init(struct display_state *state)
 	struct connector_state *conn_state = &state->conn_state;
 	const struct rockchip_connector *connector = conn_state->connector;
 	const struct rockchip_dp_chip_data *pdata = connector->data;
-	int dp_node = conn_state->node;
 	struct analogix_dp_device *dp;
 	struct analogix_dp_plat_data *plat_data;
 	int ret;
diff --git a/drivers/video/drm/rockchip_analogix_dp.h b/drivers/video/drm/rockchip_analogix_dp.h
index aa3add0554..dc54ea8e1b 100644
--- a/drivers/video/drm/rockchip_analogix_dp.h
+++ b/drivers/video/drm/rockchip_analogix_dp.h
@@ -7,10 +7,6 @@
 #ifndef __DRM_ANALOGIX_DP_H__
 #define __DRM_ANALOGIX_DP_H__
 
-#define pr_err printf
-#define pr_info printf
-#define pr_debug debug
-
 /*
  * Unless otherwise noted, all values are from the DP 1.1a spec.  Note that
  * DP and DPCD versions are independent.  Differences from 1.0 are not noted,

commit 6f7b6465e903a33a52ed79400c6047f64515313d
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Wed May 23 14:08:17 2018 +0800

    rockchip: board: fix usb-otg address parse error
    
    Using fdt_translate_address() instead of fdtdec_get_addr() to avoid
    address parse error when 64-bits CPU works at 32-bits mode but uses
    64-bits DT files.
    
    Change-Id: I8c605ab2e5b3fc0d5267af6094c2a7f54c2d7e89
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 3c7a41f14f..e5c54ee541 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -187,6 +187,7 @@ void enable_caches(void)
 #endif
 
 #if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
+#include <fdt_support.h>
 #include <usb.h>
 #include <usb/dwc2_udc.h>
 
@@ -200,6 +201,8 @@ int board_usb_init(int index, enum usb_init_type init)
 {
 	int node;
 	const char *mode;
+	fdt_addr_t addr;
+	const fdt32_t *reg;
 	bool matched = false;
 	const void *blob = gd->fdt_blob;
 
@@ -221,7 +224,18 @@ int board_usb_init(int index, enum usb_init_type init)
 		debug("Not found usb_otg device\n");
 		return -ENODEV;
 	}
-	otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
+
+	reg = fdt_getprop(blob, node, "reg", NULL);
+	if (!reg)
+		return -EINVAL;
+
+	addr = fdt_translate_address(blob, node, reg);
+	if (addr == OF_BAD_ADDR) {
+		pr_err("Not found usb_otg address\n");
+		return -EINVAL;
+	}
+
+	otg_data.regs_otg = (uintptr_t)addr;
 
 	return dwc2_udc_probe(&otg_data);
 }

commit 46a684d29c5b26890ca1a232be52af6831a883ad
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Wed May 23 09:17:36 2018 +0800

    rockchip: sdram: Reserve ram space for ATF when boot an arm64 on AArch32 state
    
    When we boot an ARM64 processor on AArch32 execution state,
    it's still need to run ATF, so we have to reserve 2M space
    from the start of dram.
    
    Change-Id: Ida7c35e35bc04c97616279906b3de95c8aaf36af
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
index 50828deff1..546eb768c5 100644
--- a/arch/arm/mach-rockchip/sdram_common.c
+++ b/arch/arm/mach-rockchip/sdram_common.c
@@ -69,14 +69,15 @@ int dram_init_banksize(void)
 
 	checksum = trust_checksum((uint8_t *)(unsigned long)tos_parameter + 8,
 				  sizeof(struct tos_parameter_t) - 8);
-#ifdef CONFIG_ARM64
+
+#if defined(CONFIG_ARM64) || defined(CONFIG_ARM64_BOOT_AARCH32)
 	/* Reserve 0x200000 for ATF bl31 */
 	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE + 0x200000;
-	gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start;
 #else
 	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
-	gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start;
 #endif
+	gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start;
+
 	if ((checksum == tos_parameter->checksum) &&
 	    (tos_parameter->tee_mem.flags == 1)) {
 		gd->bd->bi_dram[0].size = tos_parameter->tee_mem.phy_addr
@@ -97,7 +98,6 @@ size_t rockchip_sdram_size(phys_addr_t reg)
 	size_t size_mb = 0;
 	u32 ch;
 	u32 cs1_col = 0;
-
 	u32 sys_reg = readl(reg);
 	u32 sys_reg1 = readl(reg + 4);
 	u32 ch_num = 1 + ((sys_reg >> SYS_REG_NUM_CH_SHIFT)

commit b4bed602c04c6e734cc28869e7d42d69c9f46e02
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Tue May 22 20:19:23 2018 +0800

    rockchip: rk3308: add AAarch32 execution state support
    
    Support boot ARMv8 based RK3308 on AARCH32 state
    
    Change-Id: I62f857b61668fb6ff50136ffff2b09349492c218
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index d295c83750..915f5fa6db 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -139,7 +139,7 @@ config ROCKCHIP_RK3288
 
 config ROCKCHIP_RK3308
 	bool "Support Rockchip RK3308"
-	select ARM64
+	select ARM64 if !ARM64_BOOT_AARCH32
 	select DEBUG_UART_BOARD_INIT
 	select ARM_SMCCC
 	help
@@ -274,6 +274,13 @@ config TPL_ROCKCHIP_BACK_TO_BROM
           SPL will return to the boot rom, which will then load the U-Boot
           binary to keep going on.
 
+config ARM64_BOOT_AARCH32
+	bool "Support Boot an ARM64 on AArch32 execution state"
+	select CPU_V7
+	default n
+	help
+	  If you want to boot an ARM64 processor on 32-bit mode, say y here.
+
 config ROCKCHIP_BOOT_MODE_REG
 	hex "Rockchip boot mode flag register address"
 	default 0xff010200 if ROCKCHIP_PX30
diff --git a/arch/arm/mach-rockchip/rk3308/rk3308.c b/arch/arm/mach-rockchip/rk3308/rk3308.c
index 238f4ae2b7..384ef42f90 100644
--- a/arch/arm/mach-rockchip/rk3308/rk3308.c
+++ b/arch/arm/mach-rockchip/rk3308/rk3308.c
@@ -7,9 +7,10 @@
 #include <asm/io.h>
 #include <asm/arch/grf_rk3308.h>
 #include <asm/arch/hardware.h>
-#include <asm/armv8/mmu.h>
 #include <debug_uart.h>
 
+#ifdef CONFIG_ARM64
+#include <asm/armv8/mmu.h>
 static struct mm_region rk3308_mem_map[] = {
 	{
 		.virt = 0x0UL,
@@ -31,6 +32,7 @@ static struct mm_region rk3308_mem_map[] = {
 };
 
 struct mm_region *mem_map = rk3308_mem_map;
+#endif
 
 #define GRF_BASE	0xff000000
 
diff --git a/configs/evb-aarch32-rk3308_defconfig b/configs/evb-aarch32-rk3308_defconfig
new file mode 100644
index 0000000000..80d7028268
--- /dev/null
+++ b/configs/evb-aarch32-rk3308_defconfig
@@ -0,0 +1,63 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_ROCKCHIP_RK3308=y
+CONFIG_ARM64_BOOT_AARCH32=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_RKIMG_BOOTLOADER=y
+# CONFIG_USING_KERNEL_DTB is not set
+CONFIG_TARGET_EVB_RK3308=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3308-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_BOOTDELAY=0
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+# CONFIG_FASTBOOT is not set
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_ADC_KEY=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PINCTRL=y
+CONFIG_DM_FUEL_GAUGE=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_RKNAND=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0xFF0C0000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x330d
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h
index 37e8128bf3..379e4a1789 100644
--- a/include/configs/rk3308_common.h
+++ b/include/configs/rk3308_common.h
@@ -9,7 +9,7 @@
 
 #include "rockchip-common.h"
 
-#define CONFIG_SYS_MALLOC_LEN		(32 << 20)
+#define CONFIG_SYS_MALLOC_LEN		(10 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
@@ -48,12 +48,21 @@
 #define CONFIG_USB_FUNCTION_MASS_STORAGE
 #define CONFIG_ROCKUSB_G_DNL_PID        0x330d
 
+#ifdef CONFIG_ARM64
 #define ENV_MEM_LAYOUT_SETTINGS \
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x01f00000\0" \
 	"kernel_addr_r=0x02080000\0" \
 	"ramdisk_addr_r=0x04000000\0"
+#else
+#define ENV_MEM_LAYOUT_SETTINGS \
+	"scriptaddr=0x00500000\0" \
+	"pxefile_addr_r=0x00600000\0" \
+	"fdt_addr_r=0x03200000\0" \
+	"kernel_addr_r=0x2008000\0" \
+	"ramdisk_addr_r=0x03080000\0"
+#endif
 
 #include <config_distro_bootcmd.h>
 #define CONFIG_EXTRA_ENV_SETTINGS \

commit e424c91f23b3da69a2aace28717232bc04de318c
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri May 25 09:08:02 2018 +0800

    rockchip: rk3308: enable CONFIG_SUPPORT_EMMC_RPMB
    
    Change-Id: I8fc57eb27f45efd6d3e92c56813e7f1959c0960b
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/configs/evb_rk3308.h b/include/configs/evb_rk3308.h
index 1fa3c14d65..a09a18271f 100644
--- a/include/configs/evb_rk3308.h
+++ b/include/configs/evb_rk3308.h
@@ -9,6 +9,7 @@
 
 #include <configs/rk3308_common.h>
 
+#define CONFIG_SUPPORT_EMMC_RPMB
 #define CONFIG_SYS_MMC_ENV_DEV 0
 
 

commit e96eea958a89f4134480ecd2b966031596afd56b
Author: Eddie Cai <eddie.cai.linux@gmail.com>
Date:   Fri May 25 17:13:39 2018 +0800

    px3se: support android boot image
    
    Change-Id: I19048288d0646547821ad80dc1a3e2cb27e23953
    Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com>

diff --git a/configs/evb-px3se_defconfig b/configs/evb-px3se_defconfig
index 791a90b2cd..a36e775541 100644
--- a/configs/evb-px3se_defconfig
+++ b/configs/evb-px3se_defconfig
@@ -2,6 +2,8 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_ROCKCHIP_RK3128=y
 CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_ANDROID_BOOT_IMAGE=y
 CONFIG_DEFAULT_DEVICE_TREE="px3se-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
@@ -9,7 +11,9 @@ CONFIG_FIT=y
 # CONFIG_FASTBOOT is not set
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
+CONFIG_CMD_LOAD_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y

commit 9920102d3cff2b08e64f5f30b4c704ad3517e467
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 25 15:58:29 2018 +0800

    Revert "rockchip: dts: px30: enable saradc in pre-reloc"
    
    This reverts commit 73f99ea810566e73bfb31c7196ce303b098c8260.
    
    There is something wrong with saradc clk after reloc, and saradc
    doesn't work. we don't find the root cause, so revert it temporary.
    
    Change-Id: Ica8b61225ffbd3578860b03faa4b0f2b13f77584

diff --git a/arch/arm/dts/px30-u-boot.dtsi b/arch/arm/dts/px30-u-boot.dtsi
index 0204cede7b..2e9ef97d26 100644
--- a/arch/arm/dts/px30-u-boot.dtsi
+++ b/arch/arm/dts/px30-u-boot.dtsi
@@ -38,11 +38,6 @@
 	u-boot,dm-pre-reloc;
 };
 
-&saradc {
-	u-boot,dm-pre-reloc;
-	status = "okay";
-};
-
 &gpio0 {
 	u-boot,dm-pre-reloc;
 	status = "disabled";

commit 93d59c05c71154275f64a6af0ee9c83d90b8f19d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 25 15:27:57 2018 +0800

    android: fix "reboot recovery" command doesn't work
    
    If not find recovery message in misc partition, we try to check
    kernel reboot command.
    
    Change-Id: I25847cb5cc06efc39c419426ab6dbe9acde3797d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 7016f33e5a..d31e583c12 100755
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -492,6 +492,12 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 #endif
 
 	mode = android_bootloader_load_and_clear_mode(dev_desc, &misc_part_info);
+#ifdef CONFIG_RKIMG_BOOTLOADER
+	if (mode == ANDROID_BOOT_MODE_NORMAL) {
+		if (rockchip_get_boot_mode() == BOOT_MODE_RECOVERY)
+			mode = ANDROID_BOOT_MODE_RECOVERY;
+	}
+#endif
 	printf("ANDROID: reboot reason: \"%s\"\n", android_boot_mode_str(mode));
 
 	switch (mode) {

commit bad3fe2d02a54f6f51ae2f7f28bc333b9fb0330b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri May 25 16:27:35 2018 +0800

    part: rkparm: update part table if device change
    
    Do not re-use the partition table for 'mmc 1' from the partition
    table of 'mmc 0', update the table if the device number changed.
    
    Change-Id: I03b8509749d079ded6a0e0a87929be21732399fb
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/disk/part_rkparm.c b/disk/part_rkparm.c
index 0398e4d5ab..38bc2e112b 100644
--- a/disk/part_rkparm.c
+++ b/disk/part_rkparm.c
@@ -27,6 +27,7 @@ struct rkparm_part {
 
 
 static LIST_HEAD(parts_head);
+static int dev_num = -1;
 
 static int rkparm_param_parse(char *param, struct list_head *parts_head,
 			      struct blk_desc *dev_desc)
@@ -56,6 +57,7 @@ static int rkparm_param_parse(char *param, struct list_head *parts_head,
 	 */
 	env_delete("bootargs", "initrd=");
 
+	INIT_LIST_HEAD(parts_head);
 	while (next) {
 		/* Skip ':' and ',' */
 		next++;
@@ -88,6 +90,8 @@ static int rkparm_param_parse(char *param, struct list_head *parts_head,
 		next = strchr(next, ',');
 	}
 
+	dev_num = ((dev_desc->if_type << 8) + dev_desc->devnum);
+
 	return 0;
 }
 
@@ -124,7 +128,8 @@ static void part_print_rkparm(struct blk_desc *dev_desc)
 	struct rkparm_part *p = NULL;
 	int i = 0;
 
-	if (list_empty(&parts_head))
+	if (list_empty(&parts_head) ||
+	    (dev_num != ((dev_desc->if_type << 8) + dev_desc->devnum)))
 		ret = rkparm_init_param(dev_desc, &parts_head);
 
 	if (ret) {
@@ -156,7 +161,8 @@ static int part_get_info_rkparm(struct blk_desc *dev_desc, int idx,
 		return -EINVAL;
 	}
 
-	if (list_empty(&parts_head))
+	if (list_empty(&parts_head) ||
+	    (dev_num != ((dev_desc->if_type << 8) + dev_desc->devnum)))
 		ret = rkparm_init_param(dev_desc, &parts_head);
 
 	if (ret) {
@@ -191,7 +197,8 @@ static int part_test_rkparm(struct blk_desc *dev_desc)
 {
 	int ret = 0;
 
-	if (list_empty(&parts_head))
+	if (list_empty(&parts_head) ||
+	    (dev_num != ((dev_desc->if_type << 8) + dev_desc->devnum)))
 		ret = rkparm_init_param(dev_desc, &parts_head);
 	if (ret)
 		ret = -1;

commit 48b6ef28caa69acca5eeeb87322fbc285f2e7e37
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri May 25 15:51:12 2018 +0800

    rockchip: dts: rk3399 use -u-boot.dtsi for rk3399
    
    Move u-boot config into rk3399-u-boot.dtsi
    
    Change-Id: Ia3cb1ecc379c62f2e071947e308e29038bfffbea
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts
index 38d2a458ef..42f67e7a89 100644
--- a/arch/arm/dts/rk3399-evb.dts
+++ b/arch/arm/dts/rk3399-evb.dts
@@ -9,6 +9,7 @@
 #include <dt-bindings/pinctrl/rockchip.h>
 #include "rk3399.dtsi"
 #include "rk3399-sdram-lpddr3-4GB-1600.dtsi"
+#include "rk3399-u-boot.dtsi"
 
 / {
 	model = "Rockchip RK3399 Evaluation Board";
@@ -167,11 +168,6 @@
 	status = "okay";
 };
 
-&uart2 {
-	u-boot,dm-pre-reloc;
-	status = "okay";
-};
-
 &usb_host0_ehci {
 	status = "okay";
 };
diff --git a/arch/arm/dts/rk3399-firefly.dts b/arch/arm/dts/rk3399-firefly.dts
index a007fa1013..85c5208ee1 100644
--- a/arch/arm/dts/rk3399-firefly.dts
+++ b/arch/arm/dts/rk3399-firefly.dts
@@ -9,6 +9,7 @@
 #include <dt-bindings/pinctrl/rockchip.h>
 #include "rk3399.dtsi"
 #include "rk3399-sdram-ddr3-1600.dtsi"
+#include "rk3399-u-boot.dtsi"
 
 / {
 	model = "Firefly-RK3399 Board";
@@ -593,7 +594,6 @@
 };
 
 &sdmmc {
-	u-boot,dm-pre-reloc;
 	bus-width = <4>;
 	status = "okay";
 };
@@ -647,11 +647,6 @@
 	status = "okay";
 };
 
-&uart2 {
-	u-boot,dm-pre-reloc;
-	status = "okay";
-};
-
 &usb_host0_ehci {
 	status = "okay";
 };
diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi
new file mode 100644
index 0000000000..7bd104fb3f
--- /dev/null
+++ b/arch/arm/dts/rk3399-u-boot.dtsi
@@ -0,0 +1,58 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+/ {
+	aliases {
+		mmc0 = &sdhci;
+		mmc1 = &sdmmc;
+	};
+};
+
+&uart2 {
+	clock-frequency = <24000000>;
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&sdmmc {
+	u-boot,dm-pre-reloc;
+};
+
+&sdhci {
+	u-boot,dm-pre-reloc;
+};
+
+&pmugrf {
+	u-boot,dm-pre-reloc;
+};
+
+&pmusgrf {
+	u-boot,dm-pre-reloc;
+};
+
+&pmucru {
+	u-boot,dm-pre-reloc;
+};
+
+&cru {
+	u-boot,dm-pre-reloc;
+};
+
+&grf {
+	u-boot,dm-pre-reloc;
+};
+
+&cic {
+	u-boot,dm-pre-reloc;
+};
+
+&dmc {
+	u-boot,dm-pre-reloc;
+};
+
+&emmc_phy {
+	u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
index 584f0a58f5..cfae43ef9f 100644
--- a/arch/arm/dts/rk3399.dtsi
+++ b/arch/arm/dts/rk3399.dtsi
@@ -35,8 +35,6 @@
 		serial2 = &uart2;
 		serial3 = &uart3;
 		serial4 = &uart4;
-		mmc0 = &sdhci;
-		mmc1 = &sdmmc;
 	};
 
 	cpus {
@@ -276,7 +274,6 @@
 	};
 
 	sdhci: sdhci@fe330000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3399-sdhci-5.1", "arasan,sdhci-5.1";
 		reg = <0x0 0xfe330000 0x0 0x10000>;
 		interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH 0>;
@@ -1013,7 +1010,6 @@
 	};
 
 	pmugrf: syscon@ff320000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3399-pmugrf", "syscon", "simple-mfd";
 		reg = <0x0 0xff320000 0x0 0x1000>;
 		#address-cells = <1>;
@@ -1026,7 +1022,6 @@
 	};
 
 	pmusgrf: syscon@ff330000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3399-pmusgrf", "syscon";
 		reg = <0x0 0xff330000 0x0 0xe3d4>;
 	};
@@ -1132,7 +1127,6 @@
 	};
 
 	cic: syscon@ff620000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3399-cic", "syscon";
 		reg = <0x0 0xff620000 0x0 0x100>;
 	};
@@ -1147,7 +1141,6 @@
 	};
 
 	dmc: dmc {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3399-dmc";
 		devfreq-events = <&dfi>;
 		interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 0>;
@@ -1196,7 +1189,6 @@
 	};
 
 	pmucru: pmu-clock-controller@ff750000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3399-pmucru";
 		reg = <0x0 0xff750000 0x0 0x1000>;
 		rockchip,grf = <&pmugrf>;
@@ -1207,7 +1199,6 @@
 	};
 
 	cru: clock-controller@ff760000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3399-cru";
 		reg = <0x0 0xff760000 0x0 0x1000>;
 		rockchip,grf = <&grf>;
@@ -1232,7 +1223,6 @@
 	};
 
 	grf: syscon@ff770000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd";
 		reg = <0x0 0xff770000 0x0 0x10000>;
 		#address-cells = <1>;
@@ -1298,7 +1288,6 @@
 		};
 
 		emmc_phy: phy@f780 {
-		u-boot,dm-pre-reloc;
 			compatible = "rockchip,rk3399-emmc-phy";
 			reg = <0xf780 0x24>;
 			clocks = <&sdhci>;
@@ -1512,7 +1501,6 @@
 	};
 
 	pinctrl: pinctrl {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3399-pinctrl";
 		rockchip,grf = <&grf>;
 		rockchip,pmu = <&pmugrf>;

commit fa400ae59ca161528229163d65dab9b375069a4c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 25 11:16:24 2018 +0800

    make.sh: support pack trust.img that ARM64 cpu boot on AArch32
    
    Change-Id: I5207c644284b686513d3d3536e4032d0980f9112
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 62419d277a..2e1fa79343 100755
--- a/make.sh
+++ b/make.sh
@@ -212,7 +212,7 @@ pack_trust_image()
 	local TOS TOS_TA DARM_BASE TEE_LOAD_ADDR TEE_OFFSET=0x8400000
 
 	# ARM64 uses trust_merger
-	if grep  -q '^CONFIG_ARM64=y' ${OUTDIR}/.config ; then
+	if grep -Eq ''^CONFIG_ARM64=y'|'^CONFIG_ARM64_BOOT_AARCH32=y'' ${OUTDIR}/.config ; then
 		if [ ! -f ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini ]; then
 			echo "pack trust failed! Can't find: ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini"
 			return

commit 2c7457942fd2758d5e728740ad8e80d1f26f3587
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Fri May 11 17:06:00 2018 +0800

    drivers: rknand: zftl static wear leveling strategy optimize
    
    1. Garbage collection does not deal with the updated blocks.
    2. Static wear considers the SLC mode erase count and XLC
    mode erase count
    
    Change-Id: I6054fbc1726be1c93558eafad59fa9ea38d6a206
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/drivers/rknand/rk_zftl_arm_v8.S b/drivers/rknand/rk_zftl_arm_v8.S
index ec6c5a4cc2..57a74d592d 100644
--- a/drivers/rknand/rk_zftl_arm_v8.S
+++ b/drivers/rknand/rk_zftl_arm_v8.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2018-04-23
+ * date: 2018-05-11
  */
 	.arch armv8-a
 	.file	"rk_zftl_arm_v8.S"
@@ -65,7 +65,7 @@ _list_remove_node:
 	beq	.L9
 	adrp	x1, .LANCHOR1
 	adrp	x0, .LC0
-	mov	w2, 184
+	mov	w2, 188
 	add	x1, x1, :lo12:.LANCHOR1
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -176,73 +176,74 @@ _insert_free_list:
 	cmp	w3, w1
 	bls	.L23
 	ldrh	w3, [x2]
-	mov	w5, 6
-	ldr	x8, [x0]
+	mov	w8, 6
+	ldr	x7, [x0]
 	add	w3, w3, 1
 	strh	w3, [x2]
 	adrp	x2, .LANCHOR0
-	umull	x12, w1, w5
-	ldr	x6, [x2, #:lo12:.LANCHOR0]
+	umull	x12, w1, w8
+	ldr	x5, [x2, #:lo12:.LANCHOR0]
 	mov	w2, -1
-	add	x7, x6, x12
-	strh	w2, [x7, 2]
-	strh	w2, [x6, x12]
-	cbnz	x8, .L25
+	add	x6, x5, x12
+	strh	w2, [x6, 2]
+	strh	w2, [x5, x12]
+	cbnz	x7, .L25
 .L30:
-	str	x7, [x0]
+	str	x6, [x0]
 	ret
 .L25:
 	adrp	x2, .LANCHOR3
-	mov	x3, -6148914691236517206
-	movk	x3, 0xaaab, lsl 0
-	mov	w10, w5
+	adrp	x3, .LANCHOR4
+	mov	w10, w8
+	mov	w15, 65535
 	ldr	x11, [x2, #:lo12:.LANCHOR3]
 	ubfiz	x2, x1, 2, 16
-	mov	w14, 65535
+	ldrh	w14, [x3, #:lo12:.LANCHOR4]
+	mov	x3, -6148914691236517206
+	movk	x3, 0xaaab, lsl 0
 	ldr	w4, [x11, x2]
 	ldrh	w2, [x11, x2]
 	ubfx	x4, x4, 11, 8
 	and	w2, w2, 2047
-	add	w4, w2, w4, lsl 3
-	sub	x2, x8, x6
+	madd	w4, w14, w4, w2
+	sub	x2, x7, x5
 	asr	x2, x2, 1
-	and	w4, w4, 4095
+	and	w4, w4, 65535
 	mul	x2, x2, x3
-	mov	x3, x8
+	mov	x3, x7
 	and	w2, w2, 65535
 .L28:
 	ubfiz	x13, x2, 2, 16
-	ldr	w5, [x11, x13]
+	ldr	w8, [x11, x13]
 	ldrh	w13, [x11, x13]
-	ubfx	x5, x5, 11, 8
+	ubfx	x8, x8, 11, 8
 	and	w13, w13, 2047
-	add	w5, w13, w5, lsl 3
-	and	w5, w5, 4095
-	cmp	w4, w5
+	madd	w8, w14, w8, w13
+	cmp	w4, w8, uxth
 	bls	.L26
-	ldrh	w5, [x3]
-	cmp	w5, w14
+	ldrh	w8, [x3]
+	cmp	w8, w15
 	bne	.L27
-	strh	w2, [x7, 2]
+	strh	w2, [x6, 2]
 	strh	w1, [x3]
 	ret
 .L27:
-	umaddl	x3, w5, w10, x6
-	mov	w2, w5
+	umaddl	x3, w8, w10, x5
+	mov	w2, w8
 	b	.L28
 .L26:
 	ldrh	w4, [x3, 2]
-	cmp	x8, x3
-	strh	w4, [x7, 2]
-	strh	w2, [x6, x12]
+	cmp	x7, x3
+	strh	w4, [x6, 2]
+	strh	w2, [x5, x12]
 	bne	.L29
-	strh	w1, [x8, 2]
+	strh	w1, [x7, 2]
 	b	.L30
 .L29:
 	ldrh	w0, [x3, 2]
 	mov	w2, 6
 	umull	x0, w0, w2
-	strh	w1, [x6, x0]
+	strh	w1, [x5, x0]
 	strh	w1, [x3, 2]
 .L23:
 	ret
@@ -251,108 +252,122 @@ _insert_free_list:
 	.align	2
 	.type	_insert_data_list, %function
 _insert_data_list:
-	adrp	x4, .LANCHOR2
+	adrp	x3, .LANCHOR2
 	and	w1, w1, 65535
-	ldrh	w3, [x4, #:lo12:.LANCHOR2]
-	cmp	w3, w1
-	bls	.L47
+	ldrh	w4, [x3, #:lo12:.LANCHOR2]
+	cmp	w4, w1
+	bls	.L51
+	mov	x5, x3
 	ldrh	w3, [x2]
-	mov	w11, 6
-	ldr	x8, [x0]
+	mov	w12, 6
+	ldr	x11, [x0]
 	add	w3, w3, 1
 	strh	w3, [x2]
 	adrp	x2, .LANCHOR0
-	umull	x13, w1, w11
-	ldr	x6, [x2, #:lo12:.LANCHOR0]
+	umull	x12, w1, w12
+	ldr	x8, [x2, #:lo12:.LANCHOR0]
 	mov	w2, -1
-	add	x7, x6, x13
-	strh	w2, [x7, 2]
-	strh	w2, [x6, x13]
-	cbnz	x8, .L34
-	str	x7, [x0]
+	add	x10, x8, x12
+	strh	w2, [x10, 2]
+	strh	w2, [x8, x12]
+	cbnz	x11, .L34
+	str	x10, [x0]
 	ret
 .L34:
 	stp	x29, x30, [sp, -32]!
-	adrp	x2, .LANCHOR4
-	mov	x3, -6148914691236517206
-	mov	w12, -1
+	adrp	x2, .LANCHOR5
+	uxtw	x3, w1
+	adrp	x7, .LANCHOR4
 	add	x29, sp, 0
-	ldr	x15, [x2, #:lo12:.LANCHOR4]
-	ubfiz	x2, x1, 1, 16
-	movk	x3, 0xaaab, lsl 0
-	ldrh	w30, [x4, #:lo12:.LANCHOR2]
-	mov	x5, x8
+	ldr	x15, [x2, #:lo12:.LANCHOR5]
+	adrp	x2, .LANCHOR3
+	ldrh	w4, [x10, 4]
+	ldr	x13, [x2, #:lo12:.LANCHOR3]
 	stp	x19, x20, [sp, 16]
-	mov	w10, 0
-	mov	w19, 65535
-	ldrh	w16, [x15, x2]
-	ldrh	w2, [x7, 4]
-	cmp	w2, 0
-	mul	w14, w16, w2
-	sub	x2, x8, x6
+	ldrh	w6, [x15, x3, lsl 1]
+	lsl	x3, x3, 2
+	ldrh	w16, [x7, #:lo12:.LANCHOR4]
+	ldr	w2, [x13, x3]
+	mul	w6, w6, w4
+	ldrh	w3, [x13, x3]
+	ubfx	x2, x2, 11, 8
+	and	w3, w3, 2047
+	cbz	w6, .L35
+	madd	w2, w16, w2, w3
+	add	w6, w6, w2, uxth
+.L35:
+	sub	x2, x11, x8
+	mov	x3, -6148914691236517206
 	asr	x2, x2, 1
-	csel	w14, w14, w12, ne
+	movk	x3, 0xaaab, lsl 0
+	cmp	w4, 0
+	ldrh	w30, [x5, #:lo12:.LANCHOR2]
+	csinv	w6, w6, wzr, ne
+	mov	x7, x11
 	mul	x2, x2, x3
-	adrp	x3, .LANCHOR3
-	ldr	x17, [x3, #:lo12:.LANCHOR3]
+	mov	w4, 0
+	mov	w19, 65535
+	mov	w20, 6
 	and	w2, w2, 65535
 .L42:
-	add	w10, w10, 1
-	and	w10, w10, 65535
-	cmp	w10, w30
+	add	w4, w4, 1
+	and	w4, w4, 65535
+	cmp	w4, w30
 	bhi	.L31
 	cmp	w1, w2
 	beq	.L31
-	uxtw	x4, w2
-	ldrh	w20, [x5, 4]
-	cmp	w20, 0
-	ldrh	w3, [x15, x4, lsl 1]
-	mul	w3, w3, w20
-	csel	w3, w3, w12, ne
-	cmp	w14, w3
-	bne	.L38
-	lsl	x4, x4, 2
-	ldr	w3, [x17, x4]
-	ldrh	w4, [x17, x4]
+	uxtw	x5, w2
+	ldrh	w17, [x7, 4]
+	ldrh	w3, [x15, x5, lsl 1]
+	lsl	x5, x5, 2
+	mul	w14, w3, w17
+	ldr	w3, [x13, x5]
+	ldrh	w5, [x13, x5]
 	ubfx	x3, x3, 11, 8
-	and	w4, w4, 2047
-	add	w3, w4, w3, lsl 3
-	and	w3, w3, 4095
-	cmp	w16, w3
-	bhi	.L40
+	and	w5, w5, 2047
+	cbz	w14, .L38
+	cbz	w17, .L46
+	madd	w3, w16, w3, w5
+	add	w3, w14, w3, uxth
 .L39:
-	ldrh	w3, [x5, 2]
-	cmp	x8, x5
-	strh	w3, [x7, 2]
-	strh	w2, [x6, x13]
-	bne	.L43
-	strh	w1, [x8, 2]
-	str	x7, [x0]
-	b	.L31
-.L38:
-	bcc	.L39
-.L40:
-	ldrh	w3, [x5]
+	cmp	w6, w3
+	bcc	.L40
+.L44:
+	ldrh	w3, [x7]
 	cmp	w3, w19
 	bne	.L41
-	strh	w2, [x7, 2]
-	strh	w1, [x5]
+	strh	w2, [x10, 2]
+	strh	w1, [x7]
 .L31:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
 .L41:
-	umaddl	x5, w3, w11, x6
+	umaddl	x7, w3, w20, x8
 	mov	w2, w3
 	b	.L42
+.L40:
+	ldrh	w3, [x7, 2]
+	cmp	x11, x7
+	strh	w3, [x10, 2]
+	strh	w2, [x8, x12]
+	bne	.L43
+	strh	w1, [x11, 2]
+	str	x10, [x0]
+	b	.L31
 .L43:
-	ldrh	w0, [x5, 2]
+	ldrh	w0, [x7, 2]
 	mov	w2, 6
 	umull	x0, w0, w2
-	strh	w1, [x6, x0]
-	strh	w1, [x5, 2]
+	strh	w1, [x8, x0]
+	strh	w1, [x7, 2]
 	b	.L31
-.L47:
+.L38:
+	cbnz	w17, .L44
+.L46:
+	mov	w3, -1
+	b	.L39
+.L51:
 	ret
 	.size	_insert_data_list, .-_insert_data_list
 	.section	.text._list_get_gc_head_node.isra.2,"ax",@progbits
@@ -360,26 +375,26 @@ _insert_data_list:
 	.type	_list_get_gc_head_node.isra.2, %function
 _list_get_gc_head_node.isra.2:
 	and	w1, w1, 65535
-	cbz	x0, .L54
+	cbz	x0, .L58
 	adrp	x2, .LANCHOR0
 	mov	w3, 65535
 	mov	w4, 6
 	ldr	x2, [x2, #:lo12:.LANCHOR0]
-.L51:
-	cbz	w1, .L52
+.L55:
+	cbz	w1, .L56
 	ldrh	w0, [x0]
 	cmp	w0, w3
-	bne	.L53
+	bne	.L57
 	ret
-.L53:
+.L57:
 	sub	w1, w1, #1
 	umaddl	x0, w0, w4, x2
 	and	w1, w1, 65535
-	b	.L51
-.L54:
+	b	.L55
+.L58:
 	mov	w0, 65535
 	ret
-.L52:
+.L56:
 	sub	x0, x0, x2
 	mov	x1, -6148914691236517206
 	asr	x0, x0, 1
@@ -396,20 +411,20 @@ _list_update_data_list:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w19, w1, 65535
-	adrp	x1, .LANCHOR5
+	adrp	x1, .LANCHOR6
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	ldr	x1, [x1, #:lo12:.LANCHOR5]
+	ldr	x1, [x1, #:lo12:.LANCHOR6]
 	ldrh	w3, [x1, 16]
 	str	x25, [sp, 64]
 	cmp	w3, w19
-	beq	.L56
+	beq	.L60
 	ldrh	w3, [x1, 48]
 	cmp	w3, w19
-	beq	.L56
+	beq	.L60
 	ldrh	w1, [x1, 80]
 	cmp	w1, w19
-	beq	.L56
+	beq	.L60
 	adrp	x1, .LANCHOR0
 	mov	w22, 6
 	ldr	x3, [x0]
@@ -418,36 +433,36 @@ _list_update_data_list:
 	ldr	x24, [x1, #:lo12:.LANCHOR0]
 	add	x23, x24, x22
 	cmp	x23, x3
-	beq	.L56
+	beq	.L60
 	mov	x20, x0
 	ldrh	w0, [x23, 2]
 	mov	w1, 65535
 	mov	x21, x2
 	cmp	w0, w1
-	bne	.L60
+	bne	.L64
 	ldrh	w1, [x24, x22]
 	cmp	w1, w0
-	bne	.L60
-	adrp	x1, .LANCHOR6
+	bne	.L64
+	adrp	x1, .LANCHOR7
 	adrp	x0, .LC0
-	mov	w2, 251
-	add	x1, x1, :lo12:.LANCHOR6
+	mov	w2, 255
+	add	x1, x1, :lo12:.LANCHOR7
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L60:
+.L64:
 	ldrh	w1, [x23, 2]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L61
+	bne	.L65
 	ldrh	w0, [x24, x22]
 	cmp	w0, w1
-	beq	.L56
-.L61:
-	adrp	x0, .LANCHOR4
+	beq	.L60
+.L65:
+	adrp	x0, .LANCHOR5
 	ubfiz	x2, x19, 1, 16
 	mov	x5, -6148914691236517206
 	mov	w4, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR4]
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	movk	x5, 0xaaab, lsl 0
 	ldrh	w3, [x0, x2]
 	ldrh	w2, [x23, 4]
@@ -466,7 +481,7 @@ _list_update_data_list:
 	mul	w0, w0, w1
 	csel	w0, w0, w4, ne
 	cmp	w3, w0
-	bcs	.L56
+	bcs	.L60
 	mov	x2, x21
 	mov	w1, w19
 	mov	x0, x20
@@ -480,7 +495,7 @@ _list_update_data_list:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	b	_insert_data_list
-.L56:
+.L60:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -488,6 +503,15 @@ _list_update_data_list:
 	ldp	x29, x30, [sp], 80
 	ret
 	.size	_list_update_data_list, .-_list_update_data_list
+	.section	.text.zftl_get_gc_node.part.10,"ax",@progbits
+	.align	2
+	.type	zftl_get_gc_node.part.10, %function
+zftl_get_gc_node.part.10:
+	mov	w1, w0
+	adrp	x0, .LANCHOR8
+	ldr	x0, [x0, #:lo12:.LANCHOR8]
+	b	_list_get_gc_head_node.isra.2
+	.size	zftl_get_gc_node.part.10, .-zftl_get_gc_node.part.10
 	.section	.text.nand_flash_print_info,"ax",@progbits
 	.align	2
 	.global	nand_flash_print_info
@@ -496,19 +520,19 @@ nand_flash_print_info:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR7
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L68
-	adrp	x1, .LANCHOR8
+	adrp	x19, .LANCHOR9
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L73
+	adrp	x1, .LANCHOR10
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR8
+	add	x1, x1, :lo12:.LANCHOR10
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L68:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L69
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L73:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L74
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrb	w6, [x0, 6]
 	ldrb	w5, [x0, 5]
 	ldrb	w4, [x0, 4]
@@ -518,278 +542,278 @@ nand_flash_print_info:
 	adrp	x0, .LC2
 	add	x0, x0, :lo12:.LC2
 	bl	printf
-.L69:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L70
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L74:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L75
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrb	w1, [x0, 8]
 	adrp	x0, .LC3
 	add	x0, x0, :lo12:.LC3
 	bl	printf
-.L70:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L71
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L75:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L76
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrb	w1, [x0, 9]
 	adrp	x0, .LC4
 	add	x0, x0, :lo12:.LC4
 	bl	printf
-.L71:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L72
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L76:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L77
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrh	w1, [x0, 10]
 	adrp	x0, .LC5
 	add	x0, x0, :lo12:.LC5
 	bl	printf
-.L72:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L73
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L77:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L78
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrb	w1, [x0, 12]
 	adrp	x0, .LC6
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L73:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L74
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L78:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L79
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrb	w1, [x0, 13]
 	adrp	x0, .LC7
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L74:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L75
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L79:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L80
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrh	w1, [x0, 14]
 	adrp	x0, .LC8
 	add	x0, x0, :lo12:.LC8
 	bl	printf
-.L75:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L76
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L80:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L81
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrb	w1, [x0, 23]
 	adrp	x0, .LC9
 	add	x0, x0, :lo12:.LC9
 	bl	printf
-.L76:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L77
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L81:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L82
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrb	w1, [x0, 18]
 	adrp	x0, .LC10
 	add	x0, x0, :lo12:.LC10
 	bl	printf
-.L77:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L78
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L82:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L83
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrb	w1, [x0, 19]
 	adrp	x0, .LC11
 	add	x0, x0, :lo12:.LC11
 	bl	printf
-.L78:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L79
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L83:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L84
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrb	w1, [x0, 20]
 	adrp	x0, .LC12
 	add	x0, x0, :lo12:.LC12
 	bl	printf
-.L79:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L80
-	adrp	x0, .LANCHOR10
-	ldrb	w1, [x0, #:lo12:.LANCHOR10]
+.L84:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L85
+	adrp	x0, .LANCHOR12
+	ldrb	w1, [x0, #:lo12:.LANCHOR12]
 	adrp	x0, .LC13
 	add	x0, x0, :lo12:.LC13
 	bl	printf
-.L80:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L81
-	adrp	x0, .LANCHOR11
-	ldrb	w1, [x0, #:lo12:.LANCHOR11]
+.L85:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L86
+	adrp	x0, .LANCHOR13
+	ldrb	w1, [x0, #:lo12:.LANCHOR13]
 	adrp	x0, .LC14
 	add	x0, x0, :lo12:.LC14
 	bl	printf
-.L81:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L82
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L86:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L87
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrb	w1, [x0, 22]
 	adrp	x0, .LC15
 	add	x0, x0, :lo12:.LC15
 	bl	printf
-.L82:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L83
-	adrp	x0, .LANCHOR12
-	ldrb	w1, [x0, #:lo12:.LANCHOR12]
+.L87:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L88
+	adrp	x0, .LANCHOR14
+	ldrb	w1, [x0, #:lo12:.LANCHOR14]
 	adrp	x0, .LC16
 	add	x0, x0, :lo12:.LC16
 	bl	printf
-.L83:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L84
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L88:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L89
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrb	w1, [x0, 16]
 	adrp	x0, .LC17
 	add	x0, x0, :lo12:.LC17
 	and	w1, w1, 1
 	bl	printf
-.L84:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L85
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L89:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L90
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC18
 	add	x0, x0, :lo12:.LC18
 	ubfx	x1, x1, 1, 1
 	bl	printf
-.L85:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L86
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L90:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L91
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC19
 	add	x0, x0, :lo12:.LC19
 	ubfx	x1, x1, 2, 1
 	bl	printf
-.L86:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L87
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L91:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L92
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC20
 	add	x0, x0, :lo12:.LC20
 	ubfx	x1, x1, 3, 1
 	bl	printf
-.L87:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L88
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L92:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L93
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC21
 	add	x0, x0, :lo12:.LC21
 	ubfx	x1, x1, 4, 1
 	bl	printf
-.L88:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L89
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L93:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L94
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC22
 	add	x0, x0, :lo12:.LC22
 	ubfx	x1, x1, 5, 1
 	bl	printf
-.L89:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L90
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L94:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L95
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC23
 	add	x0, x0, :lo12:.LC23
 	ubfx	x1, x1, 6, 1
 	bl	printf
-.L90:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L91
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L95:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L96
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC24
 	add	x0, x0, :lo12:.LC24
 	ubfx	x1, x1, 7, 1
 	bl	printf
-.L91:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L92
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L96:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L97
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrb	w1, [x0, 17]
 	adrp	x0, .LC25
 	add	x0, x0, :lo12:.LC25
 	and	w1, w1, 1
 	bl	printf
-.L92:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L93
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L97:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L98
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC26
 	add	x0, x0, :lo12:.LC26
 	ubfx	x1, x1, 9, 1
 	bl	printf
-.L93:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L94
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L98:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L99
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC27
 	add	x0, x0, :lo12:.LC27
 	ubfx	x1, x1, 10, 1
 	bl	printf
-.L94:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L95
-	adrp	x0, .LANCHOR11
-	ldrb	w1, [x0, #:lo12:.LANCHOR11]
+.L99:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L100
+	adrp	x0, .LANCHOR13
+	ldrb	w1, [x0, #:lo12:.LANCHOR13]
 	adrp	x0, .LC14
 	add	x0, x0, :lo12:.LC14
 	bl	printf
-.L95:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L96
-	adrp	x0, .LANCHOR13
-	add	x0, x0, :lo12:.LANCHOR13
+.L100:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L101
+	adrp	x0, .LANCHOR15
+	add	x0, x0, :lo12:.LANCHOR15
 	ldrb	w2, [x0, 11]
 	ldrb	w1, [x0, 10]
 	adrp	x0, .LC28
 	add	x0, x0, :lo12:.LC28
 	bl	printf
-.L96:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L97
-	adrp	x0, .LANCHOR13
-	add	x0, x0, :lo12:.LANCHOR13
+.L101:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L102
+	adrp	x0, .LANCHOR15
+	add	x0, x0, :lo12:.LANCHOR15
 	ldrb	w2, [x0, 9]
 	ldrb	w1, [x0, 8]
 	adrp	x0, .LC29
 	add	x0, x0, :lo12:.LC29
 	bl	printf
-.L97:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L67
-	adrp	x0, .LANCHOR14
+.L102:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L72
+	adrp	x0, .LANCHOR16
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	ldrb	w1, [x0, #:lo12:.LANCHOR14]
+	ldrb	w1, [x0, #:lo12:.LANCHOR16]
 	adrp	x0, .LC30
 	add	x0, x0, :lo12:.LC30
 	b	printf
-.L67:
+.L72:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -802,11 +826,11 @@ timer_delay_ns:
 	sub	sp, sp, #16
 	lsr	w0, w0, 4
 	str	w0, [sp, 12]
-.L191:
+.L196:
 	ldr	w0, [sp, 12]
 	sub	w1, w0, #1
 	str	w1, [sp, 12]
-	cbnz	w0, .L191
+	cbnz	w0, .L196
 	add	sp, sp, 16
 	ret
 	.size	timer_delay_ns, .-timer_delay_ns
@@ -836,54 +860,54 @@ toshiba_set_rr_para:
 	mov	x4, x0
 	add	w2, w11, 1
 	mov	w0, 5
-	adrp	x6, .LANCHOR19
-	add	x6, x6, :lo12:.LANCHOR19
-	adrp	x3, .LANCHOR15
-	add	x3, x3, :lo12:.LANCHOR15
+	adrp	x6, .LANCHOR21
+	add	x6, x6, :lo12:.LANCHOR21
+	adrp	x3, .LANCHOR17
+	add	x3, x3, :lo12:.LANCHOR17
 	umull	x2, w2, w0
-	adrp	x0, .LANCHOR16
-	add	x7, x0, :lo12:.LANCHOR16
+	adrp	x0, .LANCHOR18
+	add	x7, x0, :lo12:.LANCHOR18
 	mov	x5, x0
 	ldrb	w0, [x6]
 	add	x3, x3, x2
 	add	x7, x7, x2
-	adrp	x8, .LANCHOR17
+	adrp	x8, .LANCHOR19
 	mov	x2, 0
-	adrp	x10, .LANCHOR18
-	add	x8, x8, :lo12:.LANCHOR17
-	add	x10, x10, :lo12:.LANCHOR18
+	adrp	x10, .LANCHOR20
+	add	x8, x8, :lo12:.LANCHOR19
+	add	x10, x10, :lo12:.LANCHOR20
 	cmp	w0, w2
-	bhi	.L204
+	bhi	.L209
 	ret
-.L198:
+.L203:
 	cmp	w0, 35
-	bne	.L200
+	bne	.L205
 	ldrsb	w0, [x3, x2]
-	b	.L205
-.L200:
+	b	.L210
+.L205:
 	ldrsb	w0, [x10, w11, sxtw]
-	b	.L205
-.L204:
+	b	.L210
+.L209:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
-.L201:
+.L206:
 	mov	w0, 85
 	str	w0, [x4, 8]
-	add	x0, x5, :lo12:.LANCHOR16
+	add	x0, x5, :lo12:.LANCHOR18
 	ldrsb	w0, [x2, x0]
 	str	w0, [x4, 4]
 	mov	w0, 200
 	bl	timer_delay_ns
 	ldrb	w0, [x8]
 	cmp	w0, 34
-	bne	.L198
+	bne	.L203
 	ldrsb	w0, [x7, x2]
-.L205:
+.L210:
 	str	w0, [x4]
 	add	x2, x2, 1
 	ldrb	w0, [x6]
 	cmp	w0, w2
-	bhi	.L201
+	bhi	.L206
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	toshiba_set_rr_para, .-toshiba_set_rr_para
@@ -891,11 +915,11 @@ toshiba_set_rr_para:
 	.align	2
 	.type	hynix_set_rr_para, %function
 hynix_set_rr_para:
-	adrp	x2, .LANCHOR20
+	adrp	x2, .LANCHOR22
 	and	w1, w1, 255
 	mov	x3, 32
 	and	w0, w0, 255
-	ldr	x2, [x2, #:lo12:.LANCHOR20]
+	ldr	x2, [x2, #:lo12:.LANCHOR22]
 	mov	x4, 0
 	add	x6, x2, 128
 	add	x2, x2, 112
@@ -906,19 +930,19 @@ hynix_set_rr_para:
 	umaddl	x1, w1, w0, x3
 	ubfiz	x0, x0, 8, 8
 	add	x2, x2, x1
-	adrp	x1, .LANCHOR21
-	ldr	x3, [x1, #:lo12:.LANCHOR21]
+	adrp	x1, .LANCHOR23
+	ldr	x3, [x1, #:lo12:.LANCHOR23]
 	add	x3, x3, x0
 	mov	w0, 54
 	str	w0, [x3, 2056]
-	bhi	.L212
+	bhi	.L217
 	mov	w0, 22
 	str	w0, [x3, 2056]
 	ret
-.L212:
+.L217:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
-.L208:
+.L213:
 	ldrb	w0, [x6, x4]
 	str	w0, [x3, 2052]
 	mov	w0, 120
@@ -927,7 +951,7 @@ hynix_set_rr_para:
 	str	w0, [x3, 2048]
 	add	x4, x4, 1
 	cmp	w5, w4, uxtb
-	bhi	.L208
+	bhi	.L213
 	mov	w0, 22
 	str	w0, [x3, 2056]
 	ldp	x29, x30, [sp], 16
@@ -938,29 +962,29 @@ hynix_set_rr_para:
 	.global	hynix_reconfig_rr_para
 	.type	hynix_reconfig_rr_para, %function
 hynix_reconfig_rr_para:
-	adrp	x1, .LANCHOR17
-	ldrb	w1, [x1, #:lo12:.LANCHOR17]
+	adrp	x1, .LANCHOR19
+	ldrb	w1, [x1, #:lo12:.LANCHOR19]
 	sub	w1, w1, #1
 	and	w1, w1, 255
 	cmp	w1, 6
-	bhi	.L219
-	adrp	x8, .LANCHOR20
+	bhi	.L224
+	adrp	x8, .LANCHOR22
 	and	w0, w0, 255
 	sxtw	x7, w0
-	ldr	x1, [x8, #:lo12:.LANCHOR20]
+	ldr	x1, [x8, #:lo12:.LANCHOR22]
 	add	x1, x1, x7
 	ldrb	w1, [x1, 120]
-	cbz	w1, .L219
+	cbz	w1, .L224
 	stp	x29, x30, [sp, -16]!
 	mov	w1, 0
 	add	x29, sp, 0
 	bl	hynix_set_rr_para
-	ldr	x0, [x8, #:lo12:.LANCHOR20]
+	ldr	x0, [x8, #:lo12:.LANCHOR22]
 	add	x0, x0, x7
 	strb	wzr, [x0, 120]
 	ldp	x29, x30, [sp], 16
 	ret
-.L219:
+.L224:
 	ret
 	.size	hynix_reconfig_rr_para, .-hynix_reconfig_rr_para
 	.section	.text.nandc_set_ddr_para,"ax",@progbits
@@ -968,20 +992,20 @@ hynix_reconfig_rr_para:
 	.global	nandc_set_ddr_para
 	.type	nandc_set_ddr_para, %function
 nandc_set_ddr_para:
-	adrp	x1, .LANCHOR22
+	adrp	x1, .LANCHOR24
 	and	w0, w0, 255
-	adrp	x2, .LANCHOR21
-	ldrb	w1, [x1, #:lo12:.LANCHOR22]
-	ldr	x2, [x2, #:lo12:.LANCHOR21]
+	adrp	x2, .LANCHOR23
+	ldrb	w1, [x1, #:lo12:.LANCHOR24]
+	ldr	x2, [x2, #:lo12:.LANCHOR23]
 	cmp	w1, 9
 	lsl	w1, w0, 16
 	lsl	w0, w0, 8
 	orr	w1, w1, w0
 	orr	w1, w1, 3
-	bne	.L223
+	bne	.L228
 	str	w1, [x2, 80]
 	ret
-.L223:
+.L228:
 	str	w1, [x2, 304]
 	ret
 	.size	nandc_set_ddr_para, .-nandc_set_ddr_para
@@ -990,43 +1014,43 @@ nandc_set_ddr_para:
 	.global	nandc_get_ddr_para
 	.type	nandc_get_ddr_para, %function
 nandc_get_ddr_para:
-	adrp	x0, .LANCHOR22
-	ldrb	w0, [x0, #:lo12:.LANCHOR22]
+	adrp	x0, .LANCHOR24
+	ldrb	w0, [x0, #:lo12:.LANCHOR24]
 	cmp	w0, 9
-	adrp	x0, .LANCHOR21
-	ldr	x0, [x0, #:lo12:.LANCHOR21]
-	bne	.L226
+	adrp	x0, .LANCHOR23
+	ldr	x0, [x0, #:lo12:.LANCHOR23]
+	bne	.L231
 	ldr	w0, [x0, 80]
-.L228:
+.L233:
 	ubfx	x0, x0, 8, 8
 	ret
-.L226:
+.L231:
 	ldr	w0, [x0, 304]
-	b	.L228
+	b	.L233
 	.size	nandc_get_ddr_para, .-nandc_get_ddr_para
 	.section	.text.nandc_set_if_mode,"ax",@progbits
 	.align	2
 	.global	nandc_set_if_mode
 	.type	nandc_set_if_mode, %function
 nandc_set_if_mode:
-	adrp	x1, .LANCHOR21
+	adrp	x1, .LANCHOR23
 	and	w0, w0, 255
 	tst	w0, 6
-	ldr	x2, [x1, #:lo12:.LANCHOR21]
+	ldr	x2, [x1, #:lo12:.LANCHOR23]
 	ldr	w1, [x2]
-	beq	.L230
+	beq	.L235
 	tst	x0, 4
 	orr	w1, w1, 24576
-	adrp	x0, .LANCHOR22
+	adrp	x0, .LANCHOR24
 	and	w1, w1, -32769
 	orr	w1, w1, 196608
-	ldrb	w0, [x0, #:lo12:.LANCHOR22]
+	ldrb	w0, [x0, #:lo12:.LANCHOR24]
 	orr	w3, w1, 32768
 	csel	w1, w3, w1, ne
 	cmp	w0, 9
 	mov	w0, 4099
 	movk	w0, 0x10, lsl 16
-	bne	.L232
+	bne	.L237
 	mov	w3, 8321
 	str	w3, [x2, 8]
 	str	w0, [x2, 80]
@@ -1034,10 +1058,10 @@ nandc_set_if_mode:
 	str	w0, [x2, 84]
 	mov	w0, 39
 	str	w0, [x2, 84]
-.L233:
+.L238:
 	str	w1, [x2]
 	ret
-.L232:
+.L237:
 	mov	w3, 8322
 	str	w3, [x2, 344]
 	str	w0, [x2, 304]
@@ -1045,20 +1069,20 @@ nandc_set_if_mode:
 	str	w0, [x2, 308]
 	mov	w0, 39
 	str	w0, [x2, 308]
-	b	.L233
-.L230:
+	b	.L238
+.L235:
 	and	w1, w1, -8193
-	b	.L233
+	b	.L238
 	.size	nandc_set_if_mode, .-nandc_set_if_mode
 	.section	.text.nandc_cs,"ax",@progbits
 	.align	2
 	.global	nandc_cs
 	.type	nandc_cs, %function
 nandc_cs:
-	adrp	x1, .LANCHOR21
+	adrp	x1, .LANCHOR23
 	mov	w2, 1
 	lsl	w0, w2, w0
-	ldr	x3, [x1, #:lo12:.LANCHOR21]
+	ldr	x3, [x1, #:lo12:.LANCHOR23]
 	ldr	w1, [x3]
 	bfi	w1, w0, 0, 8
 	str	w1, [x3]
@@ -1069,8 +1093,8 @@ nandc_cs:
 	.global	nandc_de_cs
 	.type	nandc_de_cs, %function
 nandc_de_cs:
-	adrp	x0, .LANCHOR21
-	ldr	x1, [x0, #:lo12:.LANCHOR21]
+	adrp	x0, .LANCHOR23
+	ldr	x1, [x0, #:lo12:.LANCHOR23]
 	ldr	w0, [x1]
 	and	w0, w0, -256
 	and	w0, w0, -131073
@@ -1086,25 +1110,25 @@ flash_wait_device_ready_raw:
 	add	x29, sp, 0
 	str	x21, [sp, 32]
 	and	w21, w0, 255
-	adrp	x0, .LANCHOR12
+	adrp	x0, .LANCHOR14
 	stp	x19, x20, [sp, 16]
 	mov	w19, w1
 	mov	w20, w2
-	ldrb	w0, [x0, #:lo12:.LANCHOR12]
+	ldrb	w0, [x0, #:lo12:.LANCHOR14]
 	cmp	w0, w21
-	bhi	.L239
-	adrp	x1, .LANCHOR23
+	bhi	.L244
+	adrp	x1, .LANCHOR25
 	adrp	x0, .LC0
 	mov	w2, 599
-	add	x1, x1, :lo12:.LANCHOR23
+	add	x1, x1, :lo12:.LANCHOR25
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L239:
-	adrp	x0, .LANCHOR24
-	add	x0, x0, :lo12:.LANCHOR24
+.L244:
+	adrp	x0, .LANCHOR26
+	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w5, [x0, w21, sxtw]
-	adrp	x0, .LANCHOR21
-	ldr	x4, [x0, #:lo12:.LANCHOR21]
+	adrp	x0, .LANCHOR23
+	ldr	x4, [x0, #:lo12:.LANCHOR23]
 	mov	w0, w5
 	bl	nandc_cs
 	ubfiz	x2, x5, 8, 8
@@ -1113,7 +1137,7 @@ flash_wait_device_ready_raw:
 	and	w19, w19, 255
 	add	x2, x4, x2
 	mov	w4, 120
-.L242:
+.L247:
 	str	w4, [x2, 2056]
 	mov	w0, 120
 	str	w19, [x2, 2052]
@@ -1123,9 +1147,9 @@ flash_wait_device_ready_raw:
 	ldr	w3, [x2, 2048]
 	and	w3, w3, 255
 	bics	wzr, w20, w3
-	bne	.L242
+	bne	.L247
 	cmp	w3, 255
-	beq	.L242
+	beq	.L247
 	mov	w0, w5
 	bl	nandc_de_cs
 	ldp	x19, x20, [sp, 16]
@@ -1143,31 +1167,31 @@ flash_wait_device_ready:
 	ubfx	x6, x0, 21, 3
 	and	w1, w0, 2097151
 	tst	x0, 50331648
-	bne	.L246
-	adrp	x0, .LANCHOR11
-	adrp	x5, .LANCHOR25
-	ldrb	w0, [x0, #:lo12:.LANCHOR11]
-	cbz	w0, .L247
-	ldrb	w0, [x5, #:lo12:.LANCHOR25]
-	cbz	w0, .L246
-.L247:
-	adrp	x0, .LANCHOR26
-	ldrh	w3, [x0, #:lo12:.LANCHOR26]
-	ldrb	w0, [x5, #:lo12:.LANCHOR25]
+	bne	.L251
+	adrp	x0, .LANCHOR13
+	adrp	x5, .LANCHOR27
+	ldrb	w0, [x0, #:lo12:.LANCHOR13]
+	cbz	w0, .L252
+	ldrb	w0, [x5, #:lo12:.LANCHOR27]
+	cbz	w0, .L251
+.L252:
+	adrp	x0, .LANCHOR28
+	ldrh	w3, [x0, #:lo12:.LANCHOR28]
+	ldrb	w0, [x5, #:lo12:.LANCHOR27]
 	udiv	w4, w1, w3
 	mul	w4, w4, w3
 	sub	w3, w1, w4
-	cbz	w0, .L248
+	cbz	w0, .L253
 	add	w1, w4, w3, lsl 1
-.L246:
+.L251:
 	mov	w0, w6
 	b	flash_wait_device_ready_raw
-.L248:
-	adrp	x5, .LANCHOR27
-	add	x5, x5, :lo12:.LANCHOR27
+.L253:
+	adrp	x5, .LANCHOR29
+	add	x5, x5, :lo12:.LANCHOR29
 	ldrh	w3, [x5, w3, uxtw 1]
 	add	w1, w3, w4
-	b	.L246
+	b	.L251
 	.size	flash_wait_device_ready, .-flash_wait_device_ready
 	.section	.text.nandc_wait_flash_ready,"ax",@progbits
 	.align	2
@@ -1177,25 +1201,25 @@ nandc_wait_flash_ready:
 	mov	w2, 34464
 	stp	x29, x30, [sp, -32]!
 	movk	w2, 0x1, lsl 16
-	adrp	x3, .LANCHOR21
+	adrp	x3, .LANCHOR23
 	add	x29, sp, 0
-.L257:
+.L262:
 	mov	w0, 100
 	bl	timer_delay_ns
-	ldr	x0, [x3, #:lo12:.LANCHOR21]
+	ldr	x0, [x3, #:lo12:.LANCHOR23]
 	ldr	w0, [x0]
 	str	w0, [x29, 24]
 	ldr	w0, [x29, 24]
-	tbnz	x0, 9, .L258
+	tbnz	x0, 9, .L263
 	subs	w2, w2, #1
-	bne	.L257
+	bne	.L262
 	mov	w0, -1
-.L255:
+.L260:
 	ldp	x29, x30, [sp], 32
 	ret
-.L258:
+.L263:
 	mov	w0, 0
-	b	.L255
+	b	.L260
 	.size	nandc_wait_flash_ready, .-nandc_wait_flash_ready
 	.section	.text.sandisk_set_rr_para,"ax",@progbits
 	.align	2
@@ -1213,35 +1237,35 @@ sandisk_set_rr_para:
 	mov	w0, 200
 	bl	timer_delay_ns
 	add	w1, w2, 1
+	adrp	x0, .LANCHOR21
+	adrp	x2, .LANCHOR17
+	add	x2, x2, :lo12:.LANCHOR17
+	ldrb	w4, [x0, #:lo12:.LANCHOR21]
 	adrp	x0, .LANCHOR19
-	adrp	x2, .LANCHOR15
-	add	x2, x2, :lo12:.LANCHOR15
-	ldrb	w4, [x0, #:lo12:.LANCHOR19]
-	adrp	x0, .LANCHOR17
-	ldrb	w5, [x0, #:lo12:.LANCHOR17]
+	ldrb	w5, [x0, #:lo12:.LANCHOR19]
 	mov	w0, 5
 	umull	x1, w1, w0
-	adrp	x0, .LANCHOR16
-	add	x0, x0, :lo12:.LANCHOR16
+	adrp	x0, .LANCHOR18
+	add	x0, x0, :lo12:.LANCHOR18
 	add	x2, x2, x1
 	add	x1, x0, x1
 	mov	x0, 0
-.L262:
+.L267:
 	cmp	w4, w0
-	bhi	.L265
+	bhi	.L270
 	ldp	x29, x30, [sp], 16
 	b	nandc_wait_flash_ready
-.L265:
+.L270:
 	cmp	w5, 67
-	bne	.L263
+	bne	.L268
 	ldrsb	w6, [x1, x0]
-.L267:
+.L272:
 	add	x0, x0, 1
 	str	w6, [x3]
-	b	.L262
-.L263:
-	ldrsb	w6, [x2, x0]
 	b	.L267
+.L268:
+	ldrsb	w6, [x2, x0]
+	b	.L272
 	.size	sandisk_set_rr_para, .-sandisk_set_rr_para
 	.section	.text.toshiba_3d_set_tlc_rr_para,"ax",@progbits
 	.align	2
@@ -1260,8 +1284,8 @@ toshiba_3d_set_tlc_rr_para:
 	madd	x1, x2, x1, x1
 	mov	w0, -119
 	str	w0, [x4, 4]
-	adrp	x0, .LANCHOR28
-	add	x0, x0, :lo12:.LANCHOR28
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
 	add	x5, x0, x1
 	ldrsb	w0, [x0, x1]
 	str	w0, [x4]
@@ -1296,8 +1320,8 @@ toshiba_3d_set_slc_rr_para:
 	str	wzr, [x0, 4]
 	mov	w2, -117
 	str	w2, [x0, 4]
-	adrp	x2, .LANCHOR29
-	add	x2, x2, :lo12:.LANCHOR29
+	adrp	x2, .LANCHOR31
+	add	x2, x2, :lo12:.LANCHOR31
 	add	x1, x2, x1, uxtb
 	ldrsb	w1, [x1, 1]
 	str	w1, [x0]
@@ -1313,7 +1337,7 @@ toshiba_3d_set_slc_rr_para:
 toshiba_tlc_set_rr_para:
 	mov	w6, 239
 	uxtw	x1, w1
-	cbz	w2, .L272
+	cbz	w2, .L277
 	stp	x29, x30, [sp, -16]!
 	mov	x4, x0
 	mov	x2, 7
@@ -1322,8 +1346,8 @@ toshiba_tlc_set_rr_para:
 	str	w6, [x4, 8]
 	mul	x1, x1, x2
 	str	w0, [x4, 4]
-	adrp	x0, .LANCHOR30
-	add	x0, x0, :lo12:.LANCHOR30
+	adrp	x0, .LANCHOR32
+	add	x0, x0, :lo12:.LANCHOR32
 	add	x5, x0, x1
 	ldrb	w0, [x0, x1]
 	str	w0, [x4]
@@ -1345,59 +1369,59 @@ toshiba_tlc_set_rr_para:
 	str	w0, [x4]
 	str	wzr, [x4]
 	ldp	x29, x30, [sp], 16
-.L275:
+.L280:
 	b	nandc_wait_flash_ready
-.L272:
+.L277:
 	str	w6, [x0, 8]
 	mov	w2, 20
 	str	w2, [x0, 4]
-	adrp	x2, .LANCHOR31
-	add	x2, x2, :lo12:.LANCHOR31
+	adrp	x2, .LANCHOR33
+	add	x2, x2, :lo12:.LANCHOR33
 	ldrb	w1, [x2, x1]
 	str	w1, [x0]
 	str	wzr, [x0]
 	str	wzr, [x0]
 	str	wzr, [x0]
-	b	.L275
+	b	.L280
 	.size	toshiba_tlc_set_rr_para, .-toshiba_tlc_set_rr_para
 	.section	.text.zftl_flash_enter_slc_mode,"ax",@progbits
 	.align	2
 	.global	zftl_flash_enter_slc_mode
 	.type	zftl_flash_enter_slc_mode, %function
 zftl_flash_enter_slc_mode:
-	adrp	x1, .LANCHOR11
+	adrp	x1, .LANCHOR13
 	and	x0, x0, 255
-	ldrb	w2, [x1, #:lo12:.LANCHOR11]
-	cbz	w2, .L278
-	adrp	x1, .LANCHOR21
+	ldrb	w2, [x1, #:lo12:.LANCHOR13]
+	cbz	w2, .L283
+	adrp	x1, .LANCHOR23
 	cmp	w2, 1
-	ldr	x1, [x1, #:lo12:.LANCHOR21]
-	bne	.L281
-.L298:
-	adrp	x2, .LANCHOR32+29
-	ldrb	w2, [x2, #:lo12:.LANCHOR32+29]
-	cbz	w2, .L278
+	ldr	x1, [x1, #:lo12:.LANCHOR23]
+	bne	.L286
+.L303:
+	adrp	x2, .LANCHOR34+29
+	ldrb	w2, [x2, #:lo12:.LANCHOR34+29]
+	cbz	w2, .L283
 	add	x0, x0, 8
 	add	x0, x1, x0, lsl 8
 	str	w2, [x0, 8]
 	ret
-.L281:
+.L286:
 	cmp	w2, 2
-	bne	.L283
-	adrp	x2, .LANCHOR33
-	add	x2, x2, :lo12:.LANCHOR33
+	bne	.L288
+	adrp	x2, .LANCHOR35
+	add	x2, x2, :lo12:.LANCHOR35
 	ldrb	w3, [x2, x0]
-	cbz	w3, .L278
+	cbz	w3, .L283
 	strb	wzr, [x2, x0]
-	b	.L298
-.L283:
+	b	.L303
+.L288:
 	cmp	w2, 3
-	bne	.L278
-	adrp	x2, .LANCHOR33
+	bne	.L283
+	adrp	x2, .LANCHOR35
 	sxtw	x3, w0
-	add	x2, x2, :lo12:.LANCHOR33
+	add	x2, x2, :lo12:.LANCHOR35
 	ldrb	w4, [x2, x3]
-	cbz	w4, .L278
+	cbz	w4, .L283
 	ubfiz	x0, x0, 8, 8
 	strb	wzr, [x2, x3]
 	add	x0, x1, x0
@@ -1411,7 +1435,7 @@ zftl_flash_enter_slc_mode:
 	str	wzr, [x0, 2048]
 	str	wzr, [x0, 2048]
 	b	nandc_wait_flash_ready
-.L278:
+.L283:
 	ret
 	.size	zftl_flash_enter_slc_mode, .-zftl_flash_enter_slc_mode
 	.section	.text.zftl_flash_exit_slc_mode,"ax",@progbits
@@ -1419,51 +1443,51 @@ zftl_flash_enter_slc_mode:
 	.global	zftl_flash_exit_slc_mode
 	.type	zftl_flash_exit_slc_mode, %function
 zftl_flash_exit_slc_mode:
-	adrp	x1, .LANCHOR11
+	adrp	x1, .LANCHOR13
 	and	x0, x0, 255
-	ldrb	w2, [x1, #:lo12:.LANCHOR11]
-	cbz	w2, .L299
-	adrp	x1, .LANCHOR21
+	ldrb	w2, [x1, #:lo12:.LANCHOR13]
+	cbz	w2, .L304
+	adrp	x1, .LANCHOR23
 	cmp	w2, 1
-	ldr	x1, [x1, #:lo12:.LANCHOR21]
-	bne	.L302
-	adrp	x2, .LANCHOR32+30
-	ldrb	w2, [x2, #:lo12:.LANCHOR32+30]
-.L319:
-	cbz	w2, .L299
+	ldr	x1, [x1, #:lo12:.LANCHOR23]
+	bne	.L307
+	adrp	x2, .LANCHOR34+30
+	ldrb	w2, [x2, #:lo12:.LANCHOR34+30]
+.L324:
+	cbz	w2, .L304
 	add	x0, x0, 8
 	add	x0, x1, x0, lsl 8
 	str	w2, [x0, 8]
 	ret
-.L302:
+.L307:
 	cmp	w2, 2
-	bne	.L304
-	adrp	x3, .LANCHOR33
-	add	x3, x3, :lo12:.LANCHOR33
+	bne	.L309
+	adrp	x3, .LANCHOR35
+	add	x3, x3, :lo12:.LANCHOR35
 	ldrb	w2, [x3, x0]
-	cbnz	w2, .L299
-	adrp	x2, .LANCHOR32
-	add	x2, x2, :lo12:.LANCHOR32
+	cbnz	w2, .L304
+	adrp	x2, .LANCHOR34
+	add	x2, x2, :lo12:.LANCHOR34
 	mov	w5, 4
 	ldrb	w4, [x2, 12]
 	ldrb	w2, [x2, 30]
 	cmp	w4, 2
 	csel	w4, w4, w5, eq
 	strb	w4, [x3, x0]
-	b	.L319
-.L304:
+	b	.L324
+.L309:
 	cmp	w2, 3
-	bne	.L299
-	adrp	x3, .LANCHOR33
+	bne	.L304
+	adrp	x3, .LANCHOR35
 	sxtw	x4, w0
-	add	x3, x3, :lo12:.LANCHOR33
+	add	x3, x3, :lo12:.LANCHOR35
 	ldrb	w2, [x3, x4]
-	cbnz	w2, .L299
+	cbnz	w2, .L304
 	ubfiz	x0, x0, 8, 8
-	adrp	x2, .LANCHOR32+12
+	adrp	x2, .LANCHOR34+12
 	add	x0, x1, x0
 	mov	w1, 239
-	ldrb	w2, [x2, #:lo12:.LANCHOR32+12]
+	ldrb	w2, [x2, #:lo12:.LANCHOR34+12]
 	mov	w5, 4
 	str	w1, [x0, 2056]
 	cmp	w2, 2
@@ -1477,7 +1501,7 @@ zftl_flash_exit_slc_mode:
 	str	wzr, [x0, 2048]
 	strb	w2, [x3, x4]
 	b	nandc_wait_flash_ready
-.L299:
+.L304:
 	ret
 	.size	zftl_flash_exit_slc_mode, .-zftl_flash_exit_slc_mode
 	.section	.text.flash_start_page_read,"ax",@progbits
@@ -1489,54 +1513,54 @@ flash_start_page_read:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 255
-	adrp	x0, .LANCHOR12
+	adrp	x0, .LANCHOR14
 	stp	x21, x22, [sp, 32]
 	ubfx	x22, x1, 21, 3
 	and	w19, w1, 2097151
-	ldrb	w0, [x0, #:lo12:.LANCHOR12]
+	ldrb	w0, [x0, #:lo12:.LANCHOR14]
 	ubfx	x21, x1, 24, 2
 	cmp	w0, w22
-	bhi	.L321
-	adrp	x1, .LANCHOR34
+	bhi	.L326
+	adrp	x1, .LANCHOR36
 	adrp	x0, .LC0
 	mov	w2, 736
-	add	x1, x1, :lo12:.LANCHOR34
+	add	x1, x1, :lo12:.LANCHOR36
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L321:
-	adrp	x0, .LANCHOR24
-	add	x0, x0, :lo12:.LANCHOR24
+.L326:
+	adrp	x0, .LANCHOR26
+	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w7, [x0, w22, sxtw]
-	adrp	x0, .LANCHOR21
-	ldr	x6, [x0, #:lo12:.LANCHOR21]
+	adrp	x0, .LANCHOR23
+	ldr	x6, [x0, #:lo12:.LANCHOR23]
 	mov	w0, w7
 	bl	nandc_cs
-	cbnz	w21, .L322
-	adrp	x0, .LANCHOR11
-	adrp	x1, .LANCHOR25
-	ldrb	w0, [x0, #:lo12:.LANCHOR11]
-	cbz	w0, .L323
-	ldrb	w0, [x1, #:lo12:.LANCHOR25]
-	cbz	w0, .L324
-.L323:
-	adrp	x0, .LANCHOR26
-	ldrb	w1, [x1, #:lo12:.LANCHOR25]
-	ldrh	w2, [x0, #:lo12:.LANCHOR26]
+	cbnz	w21, .L327
+	adrp	x0, .LANCHOR13
+	adrp	x1, .LANCHOR27
+	ldrb	w0, [x0, #:lo12:.LANCHOR13]
+	cbz	w0, .L328
+	ldrb	w0, [x1, #:lo12:.LANCHOR27]
+	cbz	w0, .L329
+.L328:
+	adrp	x0, .LANCHOR28
+	ldrb	w1, [x1, #:lo12:.LANCHOR27]
+	ldrh	w2, [x0, #:lo12:.LANCHOR28]
 	udiv	w0, w19, w2
 	mul	w0, w0, w2
 	sub	w19, w19, w0
-	cbz	w1, .L325
+	cbz	w1, .L330
 	add	w19, w0, w19, lsl 1
-.L324:
+.L329:
 	mov	w0, w7
 	bl	zftl_flash_enter_slc_mode
-	b	.L326
-.L325:
-	adrp	x1, .LANCHOR27
-	add	x1, x1, :lo12:.LANCHOR27
+	b	.L331
+.L330:
+	adrp	x1, .LANCHOR29
+	add	x1, x1, :lo12:.LANCHOR29
 	ldrh	w19, [x1, w19, uxtw 1]
 	add	w19, w19, w0
-.L326:
+.L331:
 	ubfiz	x0, x7, 8, 8
 	and	w1, w19, 255
 	add	x0, x6, x0
@@ -1554,21 +1578,21 @@ flash_start_page_read:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	b	nandc_de_cs
-.L322:
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L327:
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L327
+	bne	.L332
 	sxtw	x0, w7
 	add	x0, x0, 8
 	add	x0, x6, x0, lsl 8
 	str	w21, [x0, 8]
-	b	.L326
-.L327:
+	b	.L331
+.L332:
 	mov	w0, w7
 	bl	zftl_flash_exit_slc_mode
-	b	.L326
+	b	.L331
 	.size	flash_start_page_read, .-flash_start_page_read
 	.section	.text.flash_erase_duplane_block,"ax",@progbits
 	.align	2
@@ -1579,48 +1603,48 @@ flash_erase_duplane_block:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w19, w0, 255
-	adrp	x0, .LANCHOR12
+	adrp	x0, .LANCHOR14
 	stp	x21, x22, [sp, 32]
 	str	x25, [sp, 64]
 	mov	w22, w2
-	ldrb	w0, [x0, #:lo12:.LANCHOR12]
+	ldrb	w0, [x0, #:lo12:.LANCHOR14]
 	mov	w21, w3
 	stp	x23, x24, [sp, 48]
 	and	w25, w1, 255
 	cmp	w0, w19
-	bhi	.L333
-	adrp	x1, .LANCHOR35
+	bhi	.L338
+	adrp	x1, .LANCHOR37
 	adrp	x0, .LC0
 	mov	w2, 510
-	add	x1, x1, :lo12:.LANCHOR35
+	add	x1, x1, :lo12:.LANCHOR37
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L333:
-	adrp	x0, .LANCHOR24
-	add	x0, x0, :lo12:.LANCHOR24
+.L338:
+	adrp	x0, .LANCHOR26
+	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w20, [x0, w19, sxtw]
-	adrp	x0, .LANCHOR21
-	ldr	x24, [x0, #:lo12:.LANCHOR21]
-	adrp	x0, .LANCHOR7
+	adrp	x0, .LANCHOR23
+	ldr	x24, [x0, #:lo12:.LANCHOR23]
+	adrp	x0, .LANCHOR9
 	and	x19, x20, 255
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
 	add	x23, x19, 8
 	add	x23, x24, x23, lsl 8
-	tbz	x0, 4, .L334
+	tbz	x0, 4, .L339
 	adrp	x0, .LC31
 	mov	w3, w21
 	mov	w2, w22
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC31
 	bl	printf
-.L334:
+.L339:
 	bl	nandc_wait_flash_ready
 	mov	w0, w20
 	bl	nandc_cs
 	mov	w0, w20
-	cbnz	w25, .L335
+	cbnz	w25, .L340
 	bl	zftl_flash_enter_slc_mode
-.L336:
+.L341:
 	add	x24, x24, x19, lsl 8
 	mov	w0, 96
 	str	w0, [x24, 2056]
@@ -1630,9 +1654,9 @@ flash_erase_duplane_block:
 	str	w0, [x24, 2052]
 	lsr	w0, w22, 16
 	str	w0, [x24, 2052]
-	adrp	x0, .LANCHOR36
-	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbnz	w0, .L339
+	adrp	x0, .LANCHOR38
+	ldrb	w0, [x0, #:lo12:.LANCHOR38]
+	cbnz	w0, .L344
 	mov	w0, 208
 	str	w0, [x24, 2056]
 	mov	w19, 5
@@ -1640,7 +1664,7 @@ flash_erase_duplane_block:
 	mov	x0, x23
 	bl	flash_read_status
 	and	w5, w0, w19
-.L337:
+.L342:
 	mov	w0, 96
 	str	w0, [x24, 2056]
 	and	w0, w21, 255
@@ -1660,12 +1684,12 @@ flash_erase_duplane_block:
 	bl	nandc_de_cs
 	and	w19, w2, w19
 	orr	w19, w19, w5
-	cbz	w19, .L338
+	cbz	w19, .L343
 	adrp	x0, .LC32
 	mov	w1, w22
 	add	x0, x0, :lo12:.LC32
 	bl	printf
-.L338:
+.L343:
 	mov	w0, w19
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -1673,12 +1697,12 @@ flash_erase_duplane_block:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L335:
+.L340:
 	bl	zftl_flash_exit_slc_mode
-	b	.L336
-.L339:
+	b	.L341
+.L344:
 	mov	w5, 0
-	b	.L337
+	b	.L342
 	.size	flash_erase_duplane_block, .-flash_erase_duplane_block
 	.section	.text.flash_erase_block_en,"ax",@progbits
 	.align	2
@@ -1689,47 +1713,47 @@ flash_erase_block_en:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w19, w0, 255
-	adrp	x0, .LANCHOR12
+	adrp	x0, .LANCHOR14
 	stp	x21, x22, [sp, 32]
 	str	x25, [sp, 64]
 	mov	w21, w2
-	ldrb	w0, [x0, #:lo12:.LANCHOR12]
+	ldrb	w0, [x0, #:lo12:.LANCHOR14]
 	and	w22, w2, 2097151
 	stp	x23, x24, [sp, 48]
 	and	w25, w1, 255
 	cmp	w0, w19
-	bhi	.L348
-	adrp	x1, .LANCHOR37
+	bhi	.L353
+	adrp	x1, .LANCHOR39
 	adrp	x0, .LC0
 	mov	w2, 555
-	add	x1, x1, :lo12:.LANCHOR37
+	add	x1, x1, :lo12:.LANCHOR39
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L348:
-	adrp	x0, .LANCHOR24
-	add	x0, x0, :lo12:.LANCHOR24
+.L353:
+	adrp	x0, .LANCHOR26
+	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w20, [x0, w19, sxtw]
-	adrp	x0, .LANCHOR21
-	ldr	x24, [x0, #:lo12:.LANCHOR21]
-	adrp	x0, .LANCHOR7
+	adrp	x0, .LANCHOR23
+	ldr	x24, [x0, #:lo12:.LANCHOR23]
+	adrp	x0, .LANCHOR9
 	and	x19, x20, 255
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
 	add	x23, x19, 8
 	add	x23, x24, x23, lsl 8
-	tbz	x0, 4, .L349
+	tbz	x0, 4, .L354
 	adrp	x0, .LC33
 	mov	w2, w21
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC33
 	bl	printf
-.L349:
+.L354:
 	bl	nandc_wait_flash_ready
 	mov	w0, w20
 	bl	nandc_cs
 	mov	w0, w20
-	cbnz	w25, .L350
+	cbnz	w25, .L355
 	bl	zftl_flash_enter_slc_mode
-.L351:
+.L356:
 	add	x0, x24, x19, lsl 8
 	mov	w1, 96
 	str	w1, [x0, 2056]
@@ -1749,15 +1773,15 @@ flash_erase_block_en:
 	bl	nandc_de_cs
 	mov	w0, 5
 	ands	w19, w19, w0
-	beq	.L352
-	adrp	x0, .LANCHOR26
+	beq	.L357
+	adrp	x0, .LANCHOR28
 	mov	w2, w19
-	ldrh	w1, [x0, #:lo12:.LANCHOR26]
+	ldrh	w1, [x0, #:lo12:.LANCHOR28]
 	adrp	x0, .LC34
 	add	x0, x0, :lo12:.LC34
 	udiv	w1, w21, w1
 	bl	printf
-.L352:
+.L357:
 	mov	w0, w19
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -1765,9 +1789,9 @@ flash_erase_block_en:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L350:
+.L355:
 	bl	zftl_flash_exit_slc_mode
-	b	.L351
+	b	.L356
 	.size	flash_erase_block_en, .-flash_erase_block_en
 	.section	.text.flash_erase_block,"ax",@progbits
 	.align	2
@@ -1784,27 +1808,27 @@ flash_erase_block:
 	.type	flash_erase_all, %function
 flash_erase_all:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR32
-	add	x0, x0, :lo12:.LANCHOR32
+	adrp	x0, .LANCHOR34
+	add	x0, x0, :lo12:.LANCHOR34
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w19, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR26
+	adrp	x23, .LANCHOR28
 	stp	x21, x22, [sp, 32]
-	add	x23, x23, :lo12:.LANCHOR26
+	add	x23, x23, :lo12:.LANCHOR28
 	ldrh	w20, [x0, 14]
-	adrp	x22, .LANCHOR12
+	adrp	x22, .LANCHOR14
 	str	x25, [sp, 64]
-	add	x22, x22, :lo12:.LANCHOR12
-	adrp	x24, .LANCHOR24
+	add	x22, x22, :lo12:.LANCHOR14
+	adrp	x24, .LANCHOR26
 	ldrb	w1, [x0, 13]
 	mul	w20, w20, w1
 	and	w20, w20, 65535
-.L362:
+.L367:
 	ldrb	w0, [x22]
 	cmp	w0, w19
-	bhi	.L365
+	bhi	.L370
 	ldp	x19, x20, [sp, 16]
 	mov	w1, 0
 	ldp	x21, x22, [sp, 32]
@@ -1814,23 +1838,23 @@ flash_erase_all:
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	b	printf
-.L365:
-	add	x0, x24, :lo12:.LANCHOR24
+.L370:
+	add	x0, x24, :lo12:.LANCHOR26
 	mov	w21, 0
 	ldrb	w25, [x0, w19, sxtw]
-.L363:
+.L368:
 	cmp	w20, w21, uxth
-	bhi	.L364
+	bhi	.L369
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L362
-.L364:
+	b	.L367
+.L369:
 	ldrh	w1, [x23]
 	mov	w0, w25
 	mul	w1, w1, w21
 	add	w21, w21, 1
 	bl	flash_erase_block
-	b	.L363
+	b	.L368
 	.size	flash_erase_all, .-flash_erase_all
 	.section	.text.flash_set_interface_mode,"ax",@progbits
 	.align	2
@@ -1840,57 +1864,57 @@ flash_set_interface_mode:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR38
+	adrp	x24, .LANCHOR40
 	stp	x21, x22, [sp, 32]
-	adrp	x23, .LANCHOR7
-	adrp	x22, .LANCHOR39
+	adrp	x23, .LANCHOR9
+	adrp	x22, .LANCHOR41
 	str	x25, [sp, 64]
-	add	x24, x24, :lo12:.LANCHOR38
-	add	x22, x22, :lo12:.LANCHOR39
-	add	x23, x23, :lo12:.LANCHOR7
+	add	x24, x24, :lo12:.LANCHOR40
+	add	x22, x22, :lo12:.LANCHOR41
+	add	x23, x23, :lo12:.LANCHOR9
 	mov	w25, w0
 	stp	x19, x20, [sp, 16]
 	mov	x20, 0
-.L377:
+.L382:
 	lsl	x0, x20, 3
 	ldrb	w21, [x0, x24]
 	mov	w0, 69
 	cmp	w21, 152
 	ccmp	w21, w0, 4, ne
-	beq	.L368
+	beq	.L373
 	cmp	w21, 44
-	bne	.L369
-.L368:
-	adrp	x0, .LANCHOR21
+	bne	.L374
+.L373:
+	adrp	x0, .LANCHOR23
 	ldrb	w1, [x22]
 	cmp	w25, 1
-	ldr	x19, [x0, #:lo12:.LANCHOR21]
-	bne	.L370
-	tbz	x1, 0, .L369
+	ldr	x19, [x0, #:lo12:.LANCHOR23]
+	bne	.L375
+	tbz	x1, 0, .L374
 	ldr	w0, [x23]
-	tbz	x0, 12, .L371
+	tbz	x0, 12, .L376
 	adrp	x0, .LC36
 	add	x0, x0, :lo12:.LC36
 	bl	printf
-.L371:
+.L376:
 	add	x0, x19, x20, lsl 8
 	mov	w1, 239
 	cmp	w21, 44
 	str	w1, [x0, 2056]
 	mov	w1, 1
-	bne	.L372
+	bne	.L377
 	str	w1, [x0, 2052]
 	mov	w1, 5
-.L392:
+.L397:
 	str	w1, [x0, 2048]
-.L376:
+.L381:
 	str	wzr, [x0, 2048]
 	str	wzr, [x0, 2048]
 	str	wzr, [x0, 2048]
-.L369:
+.L374:
 	add	x20, x20, 1
 	cmp	x20, 4
-	bne	.L377
+	bne	.L382
 	bl	nandc_wait_flash_ready
 	ldr	x25, [sp, 64]
 	mov	w0, 0
@@ -1899,42 +1923,42 @@ flash_set_interface_mode:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L372:
+.L377:
 	mov	w2, 128
 	str	w2, [x0, 2052]
-	b	.L392
-.L370:
-	tbz	x1, 2, .L369
+	b	.L397
+.L375:
+	tbz	x1, 2, .L374
 	ldr	w0, [x23]
-	tbz	x0, 12, .L374
+	tbz	x0, 12, .L379
 	adrp	x0, .LC37
 	add	x0, x0, :lo12:.LC37
 	bl	printf
-.L374:
+.L379:
 	add	x0, x19, x20, lsl 8
 	mov	w1, 239
 	cmp	w21, 44
 	str	w1, [x0, 2056]
-	bne	.L375
+	bne	.L380
 	mov	w1, 1
 	str	w1, [x0, 2052]
 	mov	w1, 35
-	b	.L392
-.L375:
+	b	.L397
+.L380:
 	mov	w1, 128
 	str	w1, [x0, 2052]
 	str	wzr, [x0, 2048]
-	b	.L376
+	b	.L381
 	.size	flash_set_interface_mode, .-flash_set_interface_mode
 	.section	.text.flash_reset,"ax",@progbits
 	.align	2
 	.global	flash_reset
 	.type	flash_reset, %function
 flash_reset:
-	adrp	x1, .LANCHOR21
+	adrp	x1, .LANCHOR23
 	ubfiz	x0, x0, 8, 8
 	add	x0, x0, 2048
-	ldr	x1, [x1, #:lo12:.LANCHOR21]
+	ldr	x1, [x1, #:lo12:.LANCHOR23]
 	add	x1, x1, x0
 	mov	w0, 255
 	str	w0, [x1, 8]
@@ -1947,10 +1971,10 @@ flash_reset:
 flash_read_id:
 	and	w10, w0, 255
 	stp	x29, x30, [sp, -16]!
-	adrp	x0, .LANCHOR21
+	adrp	x0, .LANCHOR23
 	mov	x8, x1
 	add	x29, sp, 0
-	ldr	x4, [x0, #:lo12:.LANCHOR21]
+	ldr	x4, [x0, #:lo12:.LANCHOR23]
 	mov	w0, w10
 	bl	flash_reset
 	mov	w0, w10
@@ -1984,7 +2008,7 @@ flash_read_id:
 	sub	w0, w2, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bhi	.L394
+	bhi	.L399
 	ldrb	w7, [x8, 5]
 	add	w1, w10, 1
 	ldrb	w6, [x8, 4]
@@ -1995,7 +2019,7 @@ flash_read_id:
 	ldrb	w3, [x8, 1]
 	ldp	x29, x30, [sp], 16
 	b	printf
-.L394:
+.L399:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	flash_read_id, .-flash_read_id
@@ -2006,12 +2030,12 @@ flash_read_id:
 flash_read_spare:
 	stp	x29, x30, [sp, -16]!
 	mov	x5, x2
-	adrp	x2, .LANCHOR32+9
+	adrp	x2, .LANCHOR34+9
 	ubfiz	x0, x0, 8, 8
 	add	x29, sp, 0
-	ldrb	w3, [x2, #:lo12:.LANCHOR32+9]
-	adrp	x2, .LANCHOR21
-	ldr	x4, [x2, #:lo12:.LANCHOR21]
+	ldrb	w3, [x2, #:lo12:.LANCHOR34+9]
+	adrp	x2, .LANCHOR23
+	ldr	x4, [x2, #:lo12:.LANCHOR23]
 	lsl	w3, w3, 9
 	add	x4, x4, x0
 	and	w0, w1, 255
@@ -2039,20 +2063,20 @@ flash_read_spare:
 sandisk_prog_test_bad_block:
 	stp	x29, x30, [sp, -48]!
 	mov	w4, w1
-	adrp	x1, .LANCHOR21
+	adrp	x1, .LANCHOR23
 	and	x2, x0, 255
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR32
-	ldr	x19, [x1, #:lo12:.LANCHOR21]
-	add	x1, x20, :lo12:.LANCHOR32
+	adrp	x20, .LANCHOR34
+	ldr	x19, [x1, #:lo12:.LANCHOR23]
+	add	x1, x20, :lo12:.LANCHOR34
 	str	x21, [sp, 32]
 	mov	x0, x2
 	add	x2, x2, 8
 	ldrb	w1, [x1, 29]
 	add	x2, x19, x2, lsl 8
-	cbz	w1, .L400
-.L414:
+	cbz	w1, .L405
+.L419:
 	ubfiz	x0, x0, 8, 8
 	str	w1, [x2, 8]
 	add	x19, x19, x0
@@ -2076,37 +2100,37 @@ sandisk_prog_test_bad_block:
 	ldr	w2, [x19, 2048]
 	mov	w0, 5
 	ands	w21, w2, w0
-	beq	.L402
-	adrp	x0, .LANCHOR7
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L402
+	beq	.L407
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L407
 	adrp	x0, .LC39
 	mov	w1, w4
 	add	x0, x0, :lo12:.LC39
 	bl	printf
-.L402:
-	add	x20, x20, :lo12:.LANCHOR32
+.L407:
+	add	x20, x20, :lo12:.LANCHOR34
 	ldrb	w0, [x20, 30]
-	cbz	w0, .L399
+	cbz	w0, .L404
 	str	w0, [x19, 2056]
-.L399:
+.L404:
 	mov	w0, w21
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L400:
+.L405:
 	mov	w1, 162
-	b	.L414
+	b	.L419
 	.size	sandisk_prog_test_bad_block, .-sandisk_prog_test_bad_block
 	.section	.text.nandc_rdy_status,"ax",@progbits
 	.align	2
 	.global	nandc_rdy_status
 	.type	nandc_rdy_status, %function
 nandc_rdy_status:
-	adrp	x0, .LANCHOR21
+	adrp	x0, .LANCHOR23
 	sub	sp, sp, #16
-	ldr	x0, [x0, #:lo12:.LANCHOR21]
+	ldr	x0, [x0, #:lo12:.LANCHOR23]
 	ldr	w0, [x0]
 	str	w0, [sp, 8]
 	ldr	w0, [sp, 8]
@@ -2119,69 +2143,69 @@ nandc_rdy_status:
 	.global	nandc_bch_sel
 	.type	nandc_bch_sel, %function
 nandc_bch_sel:
-	adrp	x2, .LANCHOR40
+	adrp	x2, .LANCHOR42
 	mov	w1, 1
-	strb	w0, [x2, #:lo12:.LANCHOR40]
-	adrp	x2, .LANCHOR22
-	ldrb	w2, [x2, #:lo12:.LANCHOR22]
+	strb	w0, [x2, #:lo12:.LANCHOR42]
+	adrp	x2, .LANCHOR24
+	ldrb	w2, [x2, #:lo12:.LANCHOR24]
 	cmp	w2, 9
-	adrp	x2, .LANCHOR21
-	ldr	x2, [x2, #:lo12:.LANCHOR21]
-	bne	.L418
+	adrp	x2, .LANCHOR23
+	ldr	x2, [x2, #:lo12:.LANCHOR23]
+	bne	.L423
 	str	w1, [x2, 16]
 	cmp	w0, 70
-	beq	.L425
+	beq	.L430
 	cmp	w0, 60
-	beq	.L426
+	beq	.L431
 	cmp	w0, 40
 	cset	w1, eq
 	add	w1, w1, 1
-.L419:
+.L424:
 	lsl	w1, w1, 25
 	orr	w1, w1, 1
 	str	w1, [x2, 32]
 	ret
-.L425:
+.L430:
 	mov	w1, 0
-	b	.L419
-.L426:
+	b	.L424
+.L431:
 	mov	w1, 3
-	b	.L419
-.L418:
+	b	.L424
+.L423:
 	str	w1, [x2, 8]
 	cmp	w0, 16
 	mov	w1, 4096
-	bne	.L421
-.L424:
+	bne	.L426
+.L429:
 	and	w1, w1, -17
-.L422:
+.L427:
 	orr	w1, w1, 1
 	str	w1, [x2, 12]
 	ret
-.L421:
+.L426:
 	cmp	w0, 24
-	bne	.L423
+	bne	.L428
 	orr	w1, w1, 16
-	b	.L422
-.L423:
+	b	.L427
+.L428:
 	orr	w1, w1, 262144
 	cmp	w0, 40
 	orr	w1, w1, 16
-	bne	.L422
-	b	.L424
+	bne	.L427
+	b	.L429
 	.size	nandc_bch_sel, .-nandc_bch_sel
 	.section	.text.zftl_nandc_get_irq_status,"ax",@progbits
 	.align	2
 	.global	zftl_nandc_get_irq_status
 	.type	zftl_nandc_get_irq_status, %function
 zftl_nandc_get_irq_status:
-	adrp	x1, .LANCHOR22
-	ldrb	w1, [x1, #:lo12:.LANCHOR22]
+	adrp	x1, .LANCHOR24
+	ldrb	w1, [x1, #:lo12:.LANCHOR24]
 	cmp	w1, 9
-	bne	.L432
+	bne	.L437
 	ldr	w0, [x0, 296]
 	ret
-.L432:
+.L437:
 	ldr	w0, [x0, 372]
 	ret
 	.size	zftl_nandc_get_irq_status, .-zftl_nandc_get_irq_status
@@ -2213,38 +2237,38 @@ rk_nandc_flash_xfer_completed:
 nandc_xfer_start:
 	stp	x29, x30, [sp, -64]!
 	and	w1, w1, 255
-	adrp	x4, .LANCHOR43
+	adrp	x4, .LANCHOR45
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	w23, w0, 255
-	adrp	x0, .LANCHOR22
+	adrp	x0, .LANCHOR24
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	add	w20, w1, 1
-	ldrb	w0, [x0, #:lo12:.LANCHOR22]
-	adrp	x24, .LANCHOR21
+	ldrb	w0, [x0, #:lo12:.LANCHOR24]
+	adrp	x24, .LANCHOR23
 	cmp	w0, 9
-	bne	.L438
+	bne	.L443
 	ubfiz	w19, w23, 1, 1
 	mov	w0, 1
 	orr	w19, w19, 8
 	asr	w20, w20, 1
 	bfi	w19, w0, 5, 2
-	adrp	x0, .LANCHOR41
+	adrp	x0, .LANCHOR43
 	orr	w19, w19, 536870912
 	orr	w19, w19, 1024
-	ldrb	w0, [x0, #:lo12:.LANCHOR41]
+	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	and	w19, w19, -17
 	bfi	w19, w20, 22, 6
 	orr	w19, w19, 128
-	cbz	w0, .L439
-	adrp	x0, .LANCHOR42
-	ldrb	w1, [x0, #:lo12:.LANCHOR42]
+	cbz	w0, .L444
+	adrp	x0, .LANCHOR44
+	ldrb	w1, [x0, #:lo12:.LANCHOR44]
 	orr	w0, w19, 512
 	cmp	w1, 0
 	csel	w19, w0, w19, ne
-.L439:
-	add	x21, x4, :lo12:.LANCHOR43
+.L444:
+	add	x21, x4, :lo12:.LANCHOR45
 	add	x0, x2, 63
 	and	w20, w20, 63
 	and	x0, x0, -64
@@ -2261,7 +2285,7 @@ nandc_xfer_start:
 	and	x1, x1, -64
 	add	x1, x1, x20
 	bl	flush_dcache_range
-	ldr	x1, [x24, #:lo12:.LANCHOR21]
+	ldr	x1, [x24, #:lo12:.LANCHOR23]
 	mov	w0, 1
 	str	w0, [x21, 32]
 	mov	w2, 16
@@ -2278,22 +2302,22 @@ nandc_xfer_start:
 	cset	w2, eq
 	orr	w0, w0, 4
 	bfi	w0, w2, 1, 1
-	adrp	x2, .LANCHOR44
+	adrp	x2, .LANCHOR46
 	orr	w0, w0, 1
-	ldrh	w2, [x2, #:lo12:.LANCHOR44]
+	ldrh	w2, [x2, #:lo12:.LANCHOR46]
 	bfi	w0, w2, 16, 11
 	str	w0, [x1, 48]
 	str	w19, [x1, 16]
 	orr	w19, w19, 4
 	str	w19, [x1, 16]
-.L437:
+.L442:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L438:
-	ldr	x0, [x24, #:lo12:.LANCHOR21]
+.L443:
+	ldr	x0, [x24, #:lo12:.LANCHOR23]
 	ubfiz	w19, w23, 1, 1
 	orr	w19, w19, 8
 	asr	w20, w20, 1
@@ -2308,24 +2332,24 @@ nandc_xfer_start:
 	orr	w19, w19, 1024
 	and	w19, w19, -17
 	bfi	w19, w20, 22, 6
-	cbz	w23, .L441
-	adrp	x0, .LANCHOR40
+	cbz	w23, .L446
+	adrp	x0, .LANCHOR42
 	ubfx	x1, x1, 1, 7
-	ldr	x8, [x4, #:lo12:.LANCHOR43]
+	ldr	x8, [x4, #:lo12:.LANCHOR45]
 	add	x1, x3, x1, lsl 2
-	ldrb	w0, [x0, #:lo12:.LANCHOR40]
+	ldrb	w0, [x0, #:lo12:.LANCHOR42]
 	mov	w5, 128
 	cmp	w0, 24
 	mov	w0, 64
 	csel	w5, w5, w0, hi
 	mov	w0, 0
-.L443:
+.L448:
 	add	w7, w5, w0
 	cmp	x3, x1
-	bne	.L444
-.L445:
-	add	x21, x4, :lo12:.LANCHOR43
-	ldr	x0, [x4, #:lo12:.LANCHOR43]
+	bne	.L449
+.L450:
+	add	x21, x4, :lo12:.LANCHOR45
+	ldr	x0, [x4, #:lo12:.LANCHOR45]
 	and	w20, w20, 63
 	ubfiz	x1, x20, 10, 6
 	ubfiz	x20, x20, 7, 6
@@ -2342,7 +2366,7 @@ nandc_xfer_start:
 	and	x1, x1, -64
 	add	x1, x1, x20
 	bl	flush_dcache_range
-	ldr	x1, [x24, #:lo12:.LANCHOR21]
+	ldr	x1, [x24, #:lo12:.LANCHOR23]
 	mov	w0, 1
 	str	w0, [x21, 32]
 	cmp	w23, 0
@@ -2359,8 +2383,8 @@ nandc_xfer_start:
 	str	w19, [x1, 8]
 	orr	w19, w19, 4
 	str	w19, [x1, 8]
-	b	.L437
-.L444:
+	b	.L442
+.L449:
 	ldrh	w10, [x3]
 	and	x0, x0, 4294967292
 	ldrh	w6, [x3, 2]
@@ -2368,11 +2392,11 @@ nandc_xfer_start:
 	orr	x6, x10, x6, lsl 16
 	str	w6, [x8, x0]
 	mov	w0, w7
-	b	.L443
-.L441:
-	ldr	x1, [x4, #:lo12:.LANCHOR43]
+	b	.L448
+.L446:
+	ldr	x1, [x4, #:lo12:.LANCHOR45]
 	str	w0, [x1]
-	b	.L445
+	b	.L450
 	.size	nandc_xfer_start, .-nandc_xfer_start
 	.section	.text.nandc_set_seed,"ax",@progbits
 	.align	2
@@ -2380,23 +2404,23 @@ nandc_xfer_start:
 	.type	nandc_set_seed, %function
 nandc_set_seed:
 	and	x0, x0, 127
-	adrp	x1, .LANCHOR45
-	add	x1, x1, :lo12:.LANCHOR45
+	adrp	x1, .LANCHOR47
+	add	x1, x1, :lo12:.LANCHOR47
 	ldrh	w0, [x1, x0, lsl 1]
-	adrp	x1, .LANCHOR42
-	ldrb	w2, [x1, #:lo12:.LANCHOR42]
+	adrp	x1, .LANCHOR44
+	ldrb	w2, [x1, #:lo12:.LANCHOR44]
 	orr	w1, w0, -1073741824
 	cmp	w2, 0
 	csel	w0, w1, w0, ne
-	adrp	x1, .LANCHOR22
-	ldrb	w1, [x1, #:lo12:.LANCHOR22]
+	adrp	x1, .LANCHOR24
+	ldrb	w1, [x1, #:lo12:.LANCHOR24]
 	cmp	w1, 9
-	adrp	x1, .LANCHOR21
-	ldr	x1, [x1, #:lo12:.LANCHOR21]
-	bne	.L455
+	adrp	x1, .LANCHOR23
+	ldr	x1, [x1, #:lo12:.LANCHOR23]
+	bne	.L460
 	str	w0, [x1, 520]
 	ret
-.L455:
+.L460:
 	str	w0, [x1, 336]
 	ret
 	.size	nandc_set_seed, .-nandc_set_seed
@@ -2409,29 +2433,29 @@ zftl_flash_de_init:
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	bl	nandc_wait_flash_ready
-	adrp	x19, .LANCHOR14
+	adrp	x19, .LANCHOR16
 	mov	w0, 0
 	bl	hynix_reconfig_rr_para
-	ldrb	w0, [x19, #:lo12:.LANCHOR14]
-	cbz	w0, .L460
-	adrp	x0, .LANCHOR39
-	ldrb	w0, [x0, #:lo12:.LANCHOR39]
-	tbz	x0, 0, .L460
+	ldrb	w0, [x19, #:lo12:.LANCHOR16]
+	cbz	w0, .L465
+	adrp	x0, .LANCHOR41
+	ldrb	w0, [x0, #:lo12:.LANCHOR41]
+	tbz	x0, 0, .L465
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
 	bl	nandc_set_if_mode
-	strb	wzr, [x19, #:lo12:.LANCHOR14]
-.L460:
-	adrp	x3, .LANCHOR42
-	ldrb	w0, [x3, #:lo12:.LANCHOR42]
-	cbz	w0, .L461
+	strb	wzr, [x19, #:lo12:.LANCHOR16]
+.L465:
+	adrp	x3, .LANCHOR44
+	ldrb	w0, [x3, #:lo12:.LANCHOR44]
+	cbz	w0, .L466
 	mov	w0, 0
-	strb	wzr, [x3, #:lo12:.LANCHOR42]
+	strb	wzr, [x3, #:lo12:.LANCHOR44]
 	bl	nandc_set_seed
 	mov	w0, 1
-	strb	w0, [x3, #:lo12:.LANCHOR42]
-.L461:
+	strb	w0, [x3, #:lo12:.LANCHOR44]
+.L466:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -2442,8 +2466,8 @@ zftl_flash_de_init:
 	.global	nandc_randomizer_enable
 	.type	nandc_randomizer_enable, %function
 nandc_randomizer_enable:
-	adrp	x1, .LANCHOR42
-	strb	w0, [x1, #:lo12:.LANCHOR42]
+	adrp	x1, .LANCHOR44
+	strb	w0, [x1, #:lo12:.LANCHOR44]
 	ret
 	.size	nandc_randomizer_enable, .-nandc_randomizer_enable
 	.section	.text.nandc_get_chip_if,"ax",@progbits
@@ -2451,10 +2475,10 @@ nandc_randomizer_enable:
 	.global	nandc_get_chip_if
 	.type	nandc_get_chip_if, %function
 nandc_get_chip_if:
-	adrp	x1, .LANCHOR21
+	adrp	x1, .LANCHOR23
 	ubfiz	x0, x0, 8, 8
 	add	x0, x0, 2048
-	ldr	x1, [x1, #:lo12:.LANCHOR21]
+	ldr	x1, [x1, #:lo12:.LANCHOR23]
 	add	x0, x1, x0
 	ret
 	.size	nandc_get_chip_if, .-nandc_get_chip_if
@@ -2463,10 +2487,10 @@ nandc_get_chip_if:
 	.global	buf_reinit
 	.type	buf_reinit, %function
 buf_reinit:
-	adrp	x0, .LANCHOR46
-	add	x1, x0, :lo12:.LANCHOR46
+	adrp	x0, .LANCHOR48
+	add	x1, x0, :lo12:.LANCHOR48
 	mov	w2, 0
-.L475:
+.L480:
 	and	w3, w2, 255
 	strb	wzr, [x1, 2]
 	add	w4, w3, 1
@@ -2476,14 +2500,14 @@ buf_reinit:
 	str	xzr, [x1, 16]
 	cmp	w2, 32
 	add	x1, x1, 64
-	bne	.L475
-	add	x0, x0, :lo12:.LANCHOR46
+	bne	.L480
+	add	x0, x0, :lo12:.LANCHOR48
 	mov	w1, -1
 	strb	w1, [x0, 1984]
-	adrp	x0, .LANCHOR47
-	strb	wzr, [x0, #:lo12:.LANCHOR47]
-	adrp	x0, .LANCHOR48
-	strb	w2, [x0, #:lo12:.LANCHOR48]
+	adrp	x0, .LANCHOR49
+	strb	wzr, [x0, #:lo12:.LANCHOR49]
+	adrp	x0, .LANCHOR50
+	strb	w2, [x0, #:lo12:.LANCHOR50]
 	ret
 	.size	buf_reinit, .-buf_reinit
 	.section	.text.buf_add_tail,"ax",@progbits
@@ -2501,49 +2525,49 @@ buf_add_tail:
 	mov	x20, x1
 	ldrb	w1, [x19]
 	cmp	w1, 255
-	bne	.L483
+	bne	.L488
 	ldrb	w0, [x20, 1]
 	cmp	w0, 255
-	bne	.L479
-	adrp	x1, .LANCHOR49
+	bne	.L484
+	adrp	x1, .LANCHOR51
 	adrp	x0, .LC0
 	mov	w2, 74
-	add	x1, x1, :lo12:.LANCHOR49
+	add	x1, x1, :lo12:.LANCHOR51
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L479:
+.L484:
 	ldrb	w0, [x20, 1]
 	strb	w0, [x19]
-.L477:
+.L482:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L483:
-	adrp	x0, .LANCHOR46
-	add	x2, x0, :lo12:.LANCHOR46
+.L488:
+	adrp	x0, .LANCHOR48
+	add	x2, x0, :lo12:.LANCHOR48
 	mov	x19, x0
-.L484:
+.L489:
 	sbfiz	x0, x1, 6, 32
 	mov	w21, w1
 	ldrb	w1, [x2, x0]
 	cmp	w1, 255
-	bne	.L484
+	bne	.L489
 	ldrb	w0, [x20, 1]
 	cmp	w0, 255
-	bne	.L481
-	adrp	x1, .LANCHOR49
+	bne	.L486
+	adrp	x1, .LANCHOR51
 	adrp	x0, .LC0
 	mov	w2, 81
-	add	x1, x1, :lo12:.LANCHOR49
+	add	x1, x1, :lo12:.LANCHOR51
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L481:
-	add	x0, x19, :lo12:.LANCHOR46
+.L486:
+	add	x0, x19, :lo12:.LANCHOR48
 	sbfiz	x21, x21, 6, 32
 	ldrb	w1, [x20, 1]
 	strb	w1, [x0, x21]
-	b	.L477
+	b	.L482
 	.size	buf_add_tail, .-buf_add_tail
 	.section	.text.buf_free,"ax",@progbits
 	.align	2
@@ -2551,30 +2575,30 @@ buf_add_tail:
 	.type	buf_free, %function
 buf_free:
 	ldrb	w1, [x0, 2]
-	adrp	x2, .LANCHOR47
+	adrp	x2, .LANCHOR49
 	and	w1, w1, 8
 	strb	w1, [x0, 2]
-	cbz	w1, .L487
+	cbz	w1, .L492
 	stp	x29, x30, [sp, -16]!
 	mov	x1, x0
-	add	x0, x2, :lo12:.LANCHOR47
+	add	x0, x2, :lo12:.LANCHOR49
 	add	x29, sp, 0
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR48
+	adrp	x1, .LANCHOR50
 	ldp	x29, x30, [sp], 16
-	ldrb	w0, [x1, #:lo12:.LANCHOR48]
+	ldrb	w0, [x1, #:lo12:.LANCHOR50]
 	add	w0, w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR48]
+	strb	w0, [x1, #:lo12:.LANCHOR50]
 	ret
-.L487:
-	ldrb	w1, [x2, #:lo12:.LANCHOR47]
+.L492:
+	ldrb	w1, [x2, #:lo12:.LANCHOR49]
 	strb	w1, [x0]
-	adrp	x1, .LANCHOR48
+	adrp	x1, .LANCHOR50
 	ldrb	w0, [x0, 1]
-	strb	w0, [x2, #:lo12:.LANCHOR47]
-	ldrb	w0, [x1, #:lo12:.LANCHOR48]
+	strb	w0, [x2, #:lo12:.LANCHOR49]
+	ldrb	w0, [x1, #:lo12:.LANCHOR50]
 	add	w0, w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR48]
+	strb	w0, [x1, #:lo12:.LANCHOR50]
 	ret
 	.size	buf_free, .-buf_free
 	.section	.text.buf_alloc,"ax",@progbits
@@ -2585,29 +2609,29 @@ buf_alloc:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR48
+	adrp	x19, .LANCHOR50
 	and	w20, w0, 255
-	ldrb	w0, [x19, #:lo12:.LANCHOR48]
-	cbz	w0, .L494
-.L497:
-	adrp	x3, .LANCHOR47
-	adrp	x1, .LANCHOR46
-	add	x0, x1, :lo12:.LANCHOR46
-	ldrb	w2, [x3, #:lo12:.LANCHOR47]
+	ldrb	w0, [x19, #:lo12:.LANCHOR50]
+	cbz	w0, .L499
+.L502:
+	adrp	x3, .LANCHOR49
+	adrp	x1, .LANCHOR48
+	add	x0, x1, :lo12:.LANCHOR48
+	ldrb	w2, [x3, #:lo12:.LANCHOR49]
 	ubfiz	x4, x2, 6, 8
 	add	x0, x0, x4
 	mov	x4, x3
-	cbz	w20, .L495
-.L496:
-	add	x1, x1, :lo12:.LANCHOR46
+	cbz	w20, .L500
+.L501:
+	add	x1, x1, :lo12:.LANCHOR48
 	sbfiz	x2, x2, 6, 32
 	add	x3, x1, x2
 	ldrb	w5, [x1, x2]
-	strb	w5, [x4, #:lo12:.LANCHOR47]
-	ldrb	w4, [x19, #:lo12:.LANCHOR48]
+	strb	w5, [x4, #:lo12:.LANCHOR49]
+	ldrb	w4, [x19, #:lo12:.LANCHOR50]
 	strh	wzr, [x3, 50]
 	sub	w4, w4, #1
-	strb	w4, [x19, #:lo12:.LANCHOR48]
+	strb	w4, [x19, #:lo12:.LANCHOR50]
 	mov	w4, 1
 	str	xzr, [x3, 16]
 	strb	w4, [x3, 2]
@@ -2615,27 +2639,27 @@ buf_alloc:
 	strb	w4, [x1, x2]
 	mov	w1, -1
 	str	w1, [x3, 36]
-	b	.L493
-.L494:
+	b	.L498
+.L499:
 	mov	w2, 121
-	adrp	x1, .LANCHOR50
+	adrp	x1, .LANCHOR52
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR50
+	add	x1, x1, :lo12:.LANCHOR52
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	ldrb	w0, [x19, #:lo12:.LANCHOR48]
-	cbnz	w0, .L497
-.L499:
+	ldrb	w0, [x19, #:lo12:.LANCHOR50]
+	cbnz	w0, .L502
+.L504:
 	mov	x0, 0
-.L493:
+.L498:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L495:
-	ldrb	w3, [x19, #:lo12:.LANCHOR48]
+.L500:
+	ldrb	w3, [x19, #:lo12:.LANCHOR50]
 	cmp	w3, 1
-	bne	.L496
-	b	.L499
+	bne	.L501
+	b	.L504
 	.size	buf_alloc, .-buf_alloc
 	.section	.text.buf_remove_buf,"ax",@progbits
 	.align	2
@@ -2645,30 +2669,30 @@ buf_remove_buf:
 	ldrb	w4, [x1, 1]
 	ldrb	w2, [x0]
 	cmp	w4, w2
-	bne	.L507
+	bne	.L512
 	ldrb	w1, [x1]
 	strb	w1, [x0]
-.L511:
+.L516:
 	mov	w0, 1
 	ret
-.L508:
+.L513:
 	mov	w3, w2
 	sbfiz	x2, x2, 6, 32
 	ldrb	w2, [x0, x2]
 	cmp	w4, w2
-	bne	.L509
+	bne	.L514
 	sbfiz	x3, x3, 6, 32
 	ldrb	w2, [x1]
 	strb	w2, [x0, x3]
 	mov	w0, -1
 	strb	w0, [x1]
-	b	.L511
-.L507:
-	adrp	x0, .LANCHOR46
-	add	x0, x0, :lo12:.LANCHOR46
-.L509:
+	b	.L516
+.L512:
+	adrp	x0, .LANCHOR48
+	add	x0, x0, :lo12:.LANCHOR48
+.L514:
 	cmp	w2, 255
-	bne	.L508
+	bne	.L513
 	mov	w0, 0
 	ret
 	.size	buf_remove_buf, .-buf_remove_buf
@@ -2680,32 +2704,32 @@ buf_remove_free:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR48
+	adrp	x19, .LANCHOR50
 	mov	x20, x0
-	ldrb	w0, [x19, #:lo12:.LANCHOR48]
-	cbnz	w0, .L513
-	adrp	x1, .LANCHOR51
+	ldrb	w0, [x19, #:lo12:.LANCHOR50]
+	cbnz	w0, .L518
+	adrp	x1, .LANCHOR53
 	adrp	x0, .LC0
 	mov	w2, 170
-	add	x1, x1, :lo12:.LANCHOR51
+	add	x1, x1, :lo12:.LANCHOR53
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L513:
-	ldrb	w0, [x19, #:lo12:.LANCHOR48]
-	cbz	w0, .L512
+.L518:
+	ldrb	w0, [x19, #:lo12:.LANCHOR50]
+	cbz	w0, .L517
 	mov	x1, x20
-	adrp	x0, .LANCHOR47
-	add	x0, x0, :lo12:.LANCHOR47
+	adrp	x0, .LANCHOR49
+	add	x0, x0, :lo12:.LANCHOR49
 	bl	buf_remove_buf
 	cmp	w0, 1
-	bne	.L512
-	ldrb	w0, [x19, #:lo12:.LANCHOR48]
+	bne	.L517
+	ldrb	w0, [x19, #:lo12:.LANCHOR50]
 	sub	w0, w0, #1
-	strb	w0, [x19, #:lo12:.LANCHOR48]
+	strb	w0, [x19, #:lo12:.LANCHOR50]
 	ldrb	w0, [x20, 2]
 	orr	w0, w0, 1
 	strb	w0, [x20, 2]
-.L512:
+.L517:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -2715,8 +2739,8 @@ buf_remove_free:
 	.global	flash_check_bad_block
 	.type	flash_check_bad_block, %function
 flash_check_bad_block:
-	adrp	x3, .LANCHOR32
-	add	x3, x3, :lo12:.LANCHOR32
+	adrp	x3, .LANCHOR34
+	add	x3, x3, :lo12:.LANCHOR34
 	and	w5, w0, 255
 	lsr	w4, w1, 5
 	and	w1, w1, 31
@@ -2729,8 +2753,8 @@ flash_check_bad_block:
 	asr	w2, w2, 5
 	lsl	w2, w2, 2
 	umaddl	x0, w2, w5, x0
-	adrp	x2, .LANCHOR20
-	ldr	x2, [x2, #:lo12:.LANCHOR20]
+	adrp	x2, .LANCHOR22
+	ldr	x2, [x2, #:lo12:.LANCHOR22]
 	add	x0, x0, x4, uxtw 2
 	ldr	w0, [x2, x0]
 	lsr	w0, w0, w1
@@ -2747,8 +2771,8 @@ flash_mask_bad_block:
 	add	x29, sp, 0
 	str	x21, [sp, 32]
 	and	w21, w0, 255
-	adrp	x0, .LANCHOR32
-	add	x0, x0, :lo12:.LANCHOR32
+	adrp	x0, .LANCHOR34
+	add	x0, x0, :lo12:.LANCHOR34
 	stp	x19, x20, [sp, 16]
 	mov	w20, w1
 	ldrh	w19, [x0, 14]
@@ -2768,8 +2792,8 @@ flash_mask_bad_block:
 	umaddl	x1, w1, w21, x19
 	ldr	x21, [sp, 32]
 	add	x1, x1, x0, uxtw 2
-	adrp	x0, .LANCHOR20
-	ldr	x2, [x0, #:lo12:.LANCHOR20]
+	adrp	x0, .LANCHOR22
+	ldr	x2, [x0, #:lo12:.LANCHOR22]
 	mov	w0, 1
 	lsl	w0, w0, w20
 	ldr	w20, [x2, x1]
@@ -2790,15 +2814,15 @@ ftl_gc_write_buf:
 	orr	w1, w1, 2
 	strb	w1, [x0, 2]
 	mov	x1, x0
-	adrp	x0, .LANCHOR52
-	add	x0, x0, :lo12:.LANCHOR52
+	adrp	x0, .LANCHOR54
+	add	x0, x0, :lo12:.LANCHOR54
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR53
+	adrp	x1, .LANCHOR55
 	ldp	x29, x30, [sp], 16
-	ldrb	w0, [x1, #:lo12:.LANCHOR53]
+	ldrb	w0, [x1, #:lo12:.LANCHOR55]
 	add	w0, w0, 1
 	and	w0, w0, 255
-	strb	w0, [x1, #:lo12:.LANCHOR53]
+	strb	w0, [x1, #:lo12:.LANCHOR55]
 	ret
 	.size	ftl_gc_write_buf, .-ftl_gc_write_buf
 	.section	.text.zftl_cache_flush,"ax",@progbits
@@ -2817,58 +2841,58 @@ ftl_read_buf:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w20, w0
-	adrp	x0, .LANCHOR54
+	adrp	x0, .LANCHOR56
 	str	x21, [sp, 32]
 	mov	x21, x1
-	ldr	w0, [x0, #:lo12:.LANCHOR54]
+	ldr	w0, [x0, #:lo12:.LANCHOR56]
 	cmp	w0, w20
-	bhi	.L525
-	adrp	x1, .LANCHOR55
+	bhi	.L530
+	adrp	x1, .LANCHOR57
 	adrp	x0, .LC0
-	mov	w2, 888
-	add	x1, x1, :lo12:.LANCHOR55
+	mov	w2, 905
+	add	x1, x1, :lo12:.LANCHOR57
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L525:
-	adrp	x19, .LANCHOR46
-	add	x1, x19, :lo12:.LANCHOR46
+.L530:
+	adrp	x19, .LANCHOR48
+	add	x1, x19, :lo12:.LANCHOR48
 	add	x1, x1, 2
 	mov	w0, 0
-.L528:
+.L533:
 	ldr	w2, [x1, 34]
 	cmp	w20, w2
-	bne	.L526
+	bne	.L531
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L526
+	tbz	x2, 3, .L531
 	ubfiz	x0, x0, 6, 32
-	add	x19, x19, :lo12:.LANCHOR46
+	add	x19, x19, :lo12:.LANCHOR48
 	add	x19, x19, x0
 	orr	w0, w2, 4
 	strb	w0, [x19, 2]
-	tbnz	x2, 0, .L524
+	tbnz	x2, 0, .L529
 	mov	x0, x19
 	bl	buf_remove_free
-.L524:
+.L529:
 	mov	x0, x19
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L526:
+.L531:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 32
-	bne	.L528
-	adrp	x0, .LANCHOR56
-	ldr	w1, [x0, #:lo12:.LANCHOR56]
+	bne	.L533
+	adrp	x0, .LANCHOR58
+	ldr	w1, [x0, #:lo12:.LANCHOR58]
 	cmn	w1, #1
-	bne	.L529
-	str	w20, [x0, #:lo12:.LANCHOR56]
-	adrp	x0, .LANCHOR57
-	str	x21, [x0, #:lo12:.LANCHOR57]
-.L529:
+	bne	.L534
+	str	w20, [x0, #:lo12:.LANCHOR58]
+	adrp	x0, .LANCHOR59
+	str	x21, [x0, #:lo12:.LANCHOR59]
+.L534:
 	mov	x19, 0
-	b	.L524
+	b	.L529
 	.size	ftl_read_buf, .-ftl_read_buf
 	.section	.text.ftl_read_buf_free,"ax",@progbits
 	.align	2
@@ -2878,17 +2902,17 @@ ftl_read_buf_free:
 	mov	x5, x0
 	stp	x29, x30, [sp, -16]!
 	mov	x1, x0
-	adrp	x0, .LANCHOR58
+	adrp	x0, .LANCHOR60
 	add	x29, sp, 0
-	add	x0, x0, :lo12:.LANCHOR58
+	add	x0, x0, :lo12:.LANCHOR60
 	bl	buf_remove_buf
 	ldrb	w0, [x5, 2]
-	tbz	x0, 1, .L536
+	tbz	x0, 1, .L541
 	and	w0, w0, -5
 	strb	w0, [x5, 2]
 	ldp	x29, x30, [sp], 16
 	ret
-.L536:
+.L541:
 	ldp	x29, x30, [sp], 16
 	mov	x0, x5
 	b	buf_free
@@ -2898,11 +2922,11 @@ ftl_read_buf_free:
 	.global	zftl_get_density
 	.type	zftl_get_density, %function
 zftl_get_density:
-	cbnz	w0, .L541
-	adrp	x0, .LANCHOR59
-	ldr	w0, [x0, #:lo12:.LANCHOR59]
+	cbnz	w0, .L546
+	adrp	x0, .LANCHOR61
+	ldr	w0, [x0, #:lo12:.LANCHOR61]
 	ret
-.L541:
+.L546:
 	cmp	w0, 4
 	cset	w0, cc
 	lsl	w0, w0, 13
@@ -2915,13 +2939,20 @@ zftl_get_density:
 gc_hook:
 	ret
 	.size	gc_hook, .-gc_hook
+	.section	.text.vpn_check,"ax",@progbits
+	.align	2
+	.global	vpn_check
+	.type	vpn_check, %function
+vpn_check:
+	ret
+	.size	vpn_check, .-vpn_check
 	.section	.text.FtlGetCurEraseBlock,"ax",@progbits
 	.align	2
 	.global	FtlGetCurEraseBlock
 	.type	FtlGetCurEraseBlock, %function
 FtlGetCurEraseBlock:
-	adrp	x0, .LANCHOR60
-	ldrh	w0, [x0, #:lo12:.LANCHOR60]
+	adrp	x0, .LANCHOR62
+	ldrh	w0, [x0, #:lo12:.LANCHOR62]
 	ret
 	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
 	.section	.text.FtlGetAllBlockNum,"ax",@progbits
@@ -2951,118 +2982,151 @@ gc_add_sblk:
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 65535
 	adrp	x0, .LANCHOR2
-	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	and	w22, w1, 65535
-	ldrh	w0, [x0, #:lo12:.LANCHOR2]
-	and	w23, w2, 65535
 	stp	x25, x26, [sp, 64]
+	and	w24, w1, 65535
+	ldrh	w0, [x0, #:lo12:.LANCHOR2]
+	and	w25, w2, 65535
+	stp	x21, x22, [sp, 32]
 	str	x27, [sp, 80]
 	cmp	w0, w20
-	bhi	.L549
-	adrp	x1, .LANCHOR61
+	bhi	.L555
+	adrp	x1, .LANCHOR63
 	adrp	x0, .LC0
-	mov	w2, 252
-	add	x1, x1, :lo12:.LANCHOR61
+	mov	w2, 258
+	add	x1, x1, :lo12:.LANCHOR63
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L549:
-	adrp	x24, .LANCHOR4
+.L555:
+	adrp	x22, .LANCHOR5
 	uxtw	x19, w20
 	lsl	x26, x19, 1
-	adrp	x25, .LANCHOR7
-	ldr	x0, [x24, #:lo12:.LANCHOR4]
+	adrp	x23, .LANCHOR9
+	ldr	x0, [x22, #:lo12:.LANCHOR5]
 	adrp	x27, .LANCHOR3
 	ldrh	w21, [x0, x26]
-	ldr	w0, [x25, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L550
+	ldr	w0, [x23, #:lo12:.LANCHOR9]
+	tbz	x0, 8, .L556
 	ldr	x0, [x27, #:lo12:.LANCHOR3]
 	mov	w4, w21
-	mov	w2, w22
+	mov	w2, w24
 	mov	w1, w20
 	add	x0, x0, x19, lsl 2
 	ldrb	w3, [x0, 2]
-	adrp	x0, .LANCHOR62
-	ldrh	w6, [x0, #:lo12:.LANCHOR62]
-	adrp	x0, .LANCHOR63+56
+	adrp	x0, .LANCHOR64
+	ldrh	w6, [x0, #:lo12:.LANCHOR64]
+	adrp	x0, .LANCHOR65+56
 	ubfx	x3, x3, 5, 3
-	ldrh	w5, [x0, #:lo12:.LANCHOR63+56]
+	ldrh	w5, [x0, #:lo12:.LANCHOR65+56]
 	adrp	x0, .LC41
 	add	x0, x0, :lo12:.LC41
 	bl	printf
-.L550:
+.L556:
 	ldr	x0, [x27, #:lo12:.LANCHOR3]
 	add	x19, x0, x19, lsl 2
-	ldrb	w3, [x19, 2]
-	tst	w3, 224
-	bne	.L551
-	cbz	w21, .L566
-	adrp	x1, .LANCHOR61
+	ldrb	w2, [x19, 2]
+	tst	w2, 224
+	bne	.L557
+	cbz	w21, .L577
+	adrp	x1, .LANCHOR63
 	adrp	x0, .LC0
-	mov	w2, 257
-	add	x1, x1, :lo12:.LANCHOR61
+	mov	w2, 263
+	add	x1, x1, :lo12:.LANCHOR63
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L566:
+.L577:
 	mov	w0, 0
-	b	.L548
-.L551:
-	adrp	x0, .LANCHOR63
-	add	x1, x0, :lo12:.LANCHOR63
-	ldrh	w0, [x0, #:lo12:.LANCHOR63]
+	b	.L554
+.L557:
+	adrp	x0, .LANCHOR65
+	add	x1, x0, :lo12:.LANCHOR65
+	ldrh	w0, [x0, #:lo12:.LANCHOR65]
 	cmp	w0, w20
-	beq	.L566
-	adrp	x21, .LANCHOR5
-	ldr	x0, [x21, #:lo12:.LANCHOR5]
-	ldrh	w2, [x0, 48]
-	cmp	w2, w20
-	beq	.L566
-	ldrh	w2, [x0, 16]
-	cmp	w2, w20
-	beq	.L566
-	ldrh	w2, [x0, 80]
-	cmp	w2, w20
-	beq	.L566
-	ldrh	w5, [x1, 56]
+	beq	.L577
+	adrp	x21, .LANCHOR6
+	ldr	x0, [x21, #:lo12:.LANCHOR6]
+	ldrh	w3, [x0, 48]
+	cmp	w3, w20
+	beq	.L577
+	ldrh	w3, [x0, 16]
+	cmp	w3, w20
+	beq	.L577
+	ldrh	w3, [x0, 80]
+	cmp	w3, w20
+	beq	.L577
+	ldrh	w4, [x1, 56]
 	add	x1, x1, 58
-	mov	w2, 0
-.L553:
-	cmp	w2, w5
-	bcc	.L554
-	cbnz	w22, .L555
-	ubfiz	x19, x23, 7, 16
+	mov	w3, 0
+.L559:
+	cmp	w3, w4
+	bcc	.L560
+	cbnz	w24, .L564
+	adrp	x1, .LANCHOR66
+	ldrh	w5, [x1, #:lo12:.LANCHOR66]
+	cmp	w20, w5
+	beq	.L577
+	adrp	x3, .LANCHOR67
+	add	x3, x3, :lo12:.LANCHOR67
+	mov	x1, 0
+.L563:
+	ldrh	w6, [x1, x3]
+	cmp	w20, w6
+	bne	.L562
+	ldr	w0, [x23, #:lo12:.LANCHOR9]
+	tbz	x0, 8, .L577
+	ldr	x0, [x22, #:lo12:.LANCHOR5]
+	mov	w4, w20
+	ubfx	x2, x2, 5, 3
+	mov	w1, w20
+	ldrh	w3, [x0, x26]
+	adrp	x0, .LC42
+	add	x0, x0, :lo12:.LC42
+	bl	printf
+	b	.L577
+.L560:
+	ldrh	w5, [x1], 2
+	cmp	w5, w20
+	beq	.L577
+	add	w3, w3, 1
+	b	.L559
+.L562:
+	add	x1, x1, 2
+	cmp	x1, 16
+	bne	.L563
+	ubfiz	x19, x25, 7, 16
 	add	x19, x19, 136
 	add	x19, x0, x19
-.L556:
-	ldr	w0, [x25, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L557
-	ldr	x0, [x24, #:lo12:.LANCHOR4]
-	adrp	x1, .LANCHOR62
-	ubfx	x3, x3, 5, 3
-	mov	w2, w22
-	ldrh	w6, [x1, #:lo12:.LANCHOR62]
+.L565:
+	ldr	w0, [x23, #:lo12:.LANCHOR9]
+	tbz	x0, 8, .L566
+	ldr	x0, [x22, #:lo12:.LANCHOR5]
+	adrp	x1, .LANCHOR64
+	mov	w5, w4
+	ubfx	x3, x2, 5, 3
+	ldrh	w6, [x1, #:lo12:.LANCHOR64]
+	mov	w2, w24
 	mov	w1, w20
 	ldrh	w4, [x0, x26]
 	adrp	x0, .LC41
 	add	x0, x0, :lo12:.LC41
 	bl	printf
-.L557:
+.L566:
 	mov	x0, x19
 	add	x1, x19, 128
 	mov	w2, 65535
-.L560:
+.L569:
 	ldrh	w3, [x0]
 	cmp	w3, w2
-	bne	.L558
+	bne	.L567
 	strh	w20, [x0]
-	cbz	w22, .L559
-	ldr	x1, [x21, #:lo12:.LANCHOR5]
+	cbz	w24, .L568
+	ldr	x1, [x21, #:lo12:.LANCHOR6]
 	ldrh	w0, [x1, 124]
 	add	w0, w0, 1
 	strh	w0, [x1, 124]
-.L575:
+.L587:
 	mov	w0, 1
-.L548:
+.L554:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -3070,36 +3134,30 @@ gc_add_sblk:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L554:
-	ldrh	w4, [x1], 2
-	cmp	w4, w20
-	beq	.L566
-	add	w2, w2, 1
-	b	.L553
-.L555:
+.L564:
 	add	x19, x0, 392
-	b	.L556
-.L559:
-	ldr	x0, [x21, #:lo12:.LANCHOR5]
-	add	x23, x0, x23, uxth 1
-	ldrh	w0, [x23, 120]
+	b	.L565
+.L568:
+	ldr	x0, [x21, #:lo12:.LANCHOR6]
+	add	x25, x0, x25, uxth 1
+	ldrh	w0, [x25, 120]
 	add	w0, w0, 1
-	strh	w0, [x23, 120]
-	b	.L575
-.L558:
+	strh	w0, [x25, 120]
+	b	.L587
+.L567:
 	add	x0, x0, 2
 	cmp	x1, x0
-	bne	.L560
-	b	.L575
+	bne	.L569
+	b	.L587
 	.size	gc_add_sblk, .-gc_add_sblk
 	.section	.text.gc_get_src_ppa_from_index,"ax",@progbits
 	.align	2
 	.global	gc_get_src_ppa_from_index
 	.type	gc_get_src_ppa_from_index, %function
 gc_get_src_ppa_from_index:
-	adrp	x1, .LANCHOR64
+	adrp	x1, .LANCHOR68
 	ubfiz	x0, x0, 2, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR64]
+	ldr	x1, [x1, #:lo12:.LANCHOR68]
 	ldr	w0, [x1, x0]
 	ret
 	.size	gc_get_src_ppa_from_index, .-gc_get_src_ppa_from_index
@@ -3111,18 +3169,18 @@ gc_write_completed:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR65
+	adrp	x23, .LANCHOR69
 	stp	x21, x22, [sp, 32]
-	adrp	x24, .LANCHOR46
-	add	x23, x23, :lo12:.LANCHOR65
-	add	x22, x24, :lo12:.LANCHOR46
+	adrp	x24, .LANCHOR48
+	add	x23, x23, :lo12:.LANCHOR69
+	add	x22, x24, :lo12:.LANCHOR48
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-.L578:
+.L590:
 	ldrb	w19, [x23]
 	cmp	w19, 255
-	bne	.L589
+	bne	.L601
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -3130,104 +3188,104 @@ gc_write_completed:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L589:
+.L601:
 	lsl	x1, x19, 6
-	add	x0, x24, :lo12:.LANCHOR46
+	add	x0, x24, :lo12:.LANCHOR48
 	add	x2, x0, x1
 	ldrb	w0, [x0, x1]
 	ldr	w1, [x2, 52]
 	strb	w0, [x23]
 	ldrh	w25, [x2, 48]
-	cbz	w1, .L579
+	cbz	w1, .L591
 	ldr	w2, [x2, 40]
-	adrp	x0, .LANCHOR63
-	add	x0, x0, :lo12:.LANCHOR63
+	adrp	x0, .LANCHOR65
+	add	x0, x0, :lo12:.LANCHOR65
 	mov	w3, 1
-	str	w2, [x0, 320]
-	strh	w3, [x0, 318]
-	adrp	x0, .LC42
-	add	x0, x0, :lo12:.LC42
+	str	w2, [x0, 324]
+	strh	w3, [x0, 320]
+	adrp	x0, .LC43
+	add	x0, x0, :lo12:.LC43
 	bl	printf
-	adrp	x1, .LANCHOR66
+	adrp	x1, .LANCHOR70
 	adrp	x0, .LC0
-	mov	w2, 519
-	add	x1, x1, :lo12:.LANCHOR66
+	mov	w2, 539
+	add	x1, x1, :lo12:.LANCHOR70
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L579:
-	adrp	x26, .LANCHOR67
-	ldrb	w0, [x26, #:lo12:.LANCHOR67]
+.L591:
+	adrp	x26, .LANCHOR71
+	ldrb	w0, [x26, #:lo12:.LANCHOR71]
 	cmp	w0, 3
-	bne	.L590
-	adrp	x0, .LANCHOR5
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	bne	.L602
+	adrp	x0, .LANCHOR6
+	ldr	x0, [x0, #:lo12:.LANCHOR6]
 	ldrb	w20, [x0, 89]
 	add	w20, w20, w20, lsl 1
 	and	w20, w20, 1023
-.L580:
-	adrp	x0, .LANCHOR7
-	adrp	x28, .LANCHOR68
+.L592:
+	adrp	x0, .LANCHOR9
+	adrp	x28, .LANCHOR72
 	and	x21, x25, 65535
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L581
-	ldr	x1, [x28, #:lo12:.LANCHOR68]
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 8, .L593
+	ldr	x1, [x28, #:lo12:.LANCHOR72]
 	add	x0, x22, x19, lsl 6
 	mov	w3, w25
 	ldrb	w2, [x0, 1]
-	adrp	x0, .LC43
+	adrp	x0, .LC44
 	ldrb	w4, [x1, x21]
-	add	x0, x0, :lo12:.LC43
+	add	x0, x0, :lo12:.LC44
 	mov	w1, w25
 	bl	printf
-.L581:
-	ldr	x1, [x28, #:lo12:.LANCHOR68]
+.L593:
+	ldr	x1, [x28, #:lo12:.LANCHOR72]
 	add	x0, x22, x19, lsl 6
 	mov	x27, x21
 	ldrb	w0, [x0, 1]
 	ldrb	w1, [x1, x21]
 	cmp	w1, w0
-	beq	.L582
-	adrp	x1, .LANCHOR66
+	beq	.L594
+	adrp	x1, .LANCHOR70
 	adrp	x0, .LC0
-	mov	w2, 526
-	add	x1, x1, :lo12:.LANCHOR66
+	mov	w2, 546
+	add	x1, x1, :lo12:.LANCHOR70
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L582:
+.L594:
 	add	x19, x22, x19, lsl 6
 	ldrb	w0, [x19, 61]
 	cmp	w0, 3
-	beq	.L583
-	ldrb	w0, [x26, #:lo12:.LANCHOR67]
+	beq	.L595
+	ldrb	w0, [x26, #:lo12:.LANCHOR71]
 	cmp	w0, 3
-	bne	.L583
-	adrp	x0, .LANCHOR69
-	ldrb	w0, [x0, #:lo12:.LANCHOR69]
-	cbnz	w0, .L583
-	ldr	x1, [x28, #:lo12:.LANCHOR68]
+	bne	.L595
+	adrp	x0, .LANCHOR73
+	ldrb	w0, [x0, #:lo12:.LANCHOR73]
+	cbnz	w0, .L595
+	ldr	x1, [x28, #:lo12:.LANCHOR72]
 	mov	x0, 0
 	add	x21, x1, x21
-.L584:
+.L596:
 	cmp	w20, w0, uxth
-	bls	.L578
+	bls	.L590
 	ldrb	w1, [x21, x0]
 	add	x0, x0, 1
 	add	x1, x22, x1, lsl 6
 	strb	wzr, [x1, 61]
-	b	.L584
-.L590:
+	b	.L596
+.L602:
 	mov	w20, 1
-	b	.L580
-.L583:
-	adrp	x19, .LANCHOR63
-	add	x19, x19, :lo12:.LANCHOR63
+	b	.L592
+.L595:
+	adrp	x19, .LANCHOR65
+	add	x19, x19, :lo12:.LANCHOR65
 	add	x20, x21, x20, uxth
 	mov	w21, -1
 	strh	w25, [x19, 316]
-.L585:
+.L597:
 	cmp	x20, x27
-	beq	.L578
-	ldr	x1, [x28, #:lo12:.LANCHOR68]
+	beq	.L590
+	ldr	x1, [x28, #:lo12:.LANCHOR72]
 	ldrb	w0, [x1, x27]
 	strb	w21, [x1, x27]
 	add	x27, x27, 1
@@ -3240,56 +3298,56 @@ gc_write_completed:
 	ldrb	w0, [x19, 7]
 	sub	w0, w0, #1
 	strb	w0, [x19, 7]
-	b	.L585
+	b	.L597
 	.size	gc_write_completed, .-gc_write_completed
 	.section	.text.gc_get_src_blk,"ax",@progbits
 	.align	2
 	.global	gc_get_src_blk
 	.type	gc_get_src_blk, %function
 gc_get_src_blk:
-	adrp	x0, .LANCHOR5
-	ldr	x2, [x0, #:lo12:.LANCHOR5]
-	adrp	x0, .LANCHOR70
-	ldrb	w3, [x0, #:lo12:.LANCHOR70]
+	adrp	x0, .LANCHOR6
+	ldr	x2, [x0, #:lo12:.LANCHOR6]
+	adrp	x0, .LANCHOR74
+	ldrb	w3, [x0, #:lo12:.LANCHOR74]
 	ldrh	w0, [x2, 124]
-	cbz	w0, .L602
+	cbz	w0, .L614
 	add	x1, x2, 392
 	mov	w4, 1
-.L603:
+.L615:
 	add	x5, x1, 128
 	mov	w6, 65535
-.L607:
+.L619:
 	ldrh	w0, [x1]
 	cmp	w0, w6
-	beq	.L605
+	beq	.L617
 	mov	w5, -1
 	strh	w5, [x1]
-	cbz	w4, .L606
+	cbz	w4, .L618
 	ldrh	w1, [x2, 124]
 	sub	w1, w1, #1
 	strh	w1, [x2, 124]
 	ret
-.L602:
+.L614:
 	add	x0, x2, x3, sxtw 1
 	ldrh	w0, [x0, 120]
-	cbz	w0, .L608
+	cbz	w0, .L620
 	ubfiz	x1, x3, 7, 8
 	mov	w4, 0
 	add	x1, x1, 136
 	add	x1, x2, x1
-	b	.L603
-.L606:
+	b	.L615
+.L618:
 	add	x2, x2, x3, uxtb 1
 	ldrh	w1, [x2, 120]
 	sub	w1, w1, #1
 	strh	w1, [x2, 120]
 	ret
-.L605:
+.L617:
 	add	x1, x1, 2
 	cmp	x1, x5
-	bne	.L607
+	bne	.L619
 	ret
-.L608:
+.L620:
 	mov	w0, 65535
 	ret
 	.size	gc_get_src_blk, .-gc_get_src_blk
@@ -3301,90 +3359,90 @@ gc_free_temp_buf:
 	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR63
-	add	x0, x20, :lo12:.LANCHOR63
+	adrp	x20, .LANCHOR65
+	add	x0, x20, :lo12:.LANCHOR65
 	stp	x21, x22, [sp, 32]
 	ldrb	w1, [x0, 7]
-	cbz	w1, .L617
-	adrp	x1, .LANCHOR48
-	ldrb	w1, [x1, #:lo12:.LANCHOR48]
+	cbz	w1, .L629
+	adrp	x1, .LANCHOR50
+	ldrb	w1, [x1, #:lo12:.LANCHOR50]
 	cmp	w1, 1
-	bhi	.L617
+	bhi	.L629
 	ldrh	w19, [x0, 316]
-	adrp	x2, .LANCHOR72
-	adrp	x0, .LANCHOR71
-	adrp	x21, .LANCHOR68
-	ldrb	w2, [x2, #:lo12:.LANCHOR72]
+	adrp	x2, .LANCHOR76
+	adrp	x0, .LANCHOR75
+	adrp	x21, .LANCHOR72
+	ldrb	w2, [x2, #:lo12:.LANCHOR76]
 	add	w1, w19, 24
-	ldrh	w0, [x0, #:lo12:.LANCHOR71]
-	ldr	x4, [x21, #:lo12:.LANCHOR68]
+	ldrh	w0, [x0, #:lo12:.LANCHOR75]
+	ldr	x4, [x21, #:lo12:.LANCHOR72]
 	mul	w0, w0, w2
 	cmp	w0, w1
 	csel	w1, w0, w1, ls
-	adrp	x0, .LANCHOR46
-	add	x0, x0, :lo12:.LANCHOR46
-.L612:
+	adrp	x0, .LANCHOR48
+	add	x0, x0, :lo12:.LANCHOR48
+.L624:
 	cmp	w19, w1
-	bcc	.L615
-.L617:
+	bcc	.L627
+.L629:
 	mov	w0, 0
-	b	.L610
-.L615:
+	b	.L622
+.L627:
 	uxtw	x22, w19
 	ldrb	w2, [x4, x22]
 	cmp	w2, 255
-	beq	.L613
+	beq	.L625
 	sbfiz	x3, x2, 6, 32
 	add	x3, x0, x3
 	ldrb	w3, [x3, 61]
-	cbnz	w3, .L613
+	cbnz	w3, .L625
 	ubfiz	x2, x2, 6, 8
 	add	x0, x0, x2
 	bl	buf_free
-	adrp	x0, .LANCHOR7
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L614
-	ldr	x0, [x21, #:lo12:.LANCHOR68]
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 8, .L626
+	ldr	x0, [x21, #:lo12:.LANCHOR72]
 	mov	w1, w19
 	ldrb	w2, [x0, x22]
-	adrp	x0, .LC44
-	add	x0, x0, :lo12:.LC44
+	adrp	x0, .LC45
+	add	x0, x0, :lo12:.LC45
 	bl	printf
-.L614:
-	ldr	x0, [x21, #:lo12:.LANCHOR68]
-	add	x20, x20, :lo12:.LANCHOR63
+.L626:
+	ldr	x0, [x21, #:lo12:.LANCHOR72]
+	add	x20, x20, :lo12:.LANCHOR65
 	mov	w1, -1
 	strb	w1, [x0, x22]
 	ldrb	w0, [x20, 7]
 	sub	w0, w0, #1
 	strb	w0, [x20, 7]
 	mov	w0, 1
-.L610:
+.L622:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L613:
+.L625:
 	add	w19, w19, 1
-	b	.L612
+	b	.L624
 	.size	gc_free_temp_buf, .-gc_free_temp_buf
 	.section	.text.print_gc_debug_info,"ax",@progbits
 	.align	2
 	.global	print_gc_debug_info
 	.type	print_gc_debug_info, %function
 print_gc_debug_info:
-	adrp	x2, .LANCHOR73
-	adrp	x1, .LANCHOR63
-	add	x0, x1, :lo12:.LANCHOR63
-	ldrh	w6, [x2, #:lo12:.LANCHOR73]
-	adrp	x2, .LANCHOR48
-	ldrh	w1, [x1, #:lo12:.LANCHOR63]
+	adrp	x2, .LANCHOR77
+	adrp	x1, .LANCHOR65
+	add	x0, x1, :lo12:.LANCHOR65
+	ldrh	w6, [x2, #:lo12:.LANCHOR77]
+	adrp	x2, .LANCHOR50
+	ldrh	w1, [x1, #:lo12:.LANCHOR65]
 	ldrb	w5, [x0, 7]
-	ldrb	w4, [x2, #:lo12:.LANCHOR48]
+	ldrb	w4, [x2, #:lo12:.LANCHOR50]
 	ldrh	w3, [x0, 314]
 	ldrh	w2, [x0, 2]
-	adrp	x0, .LC45
-	add	x0, x0, :lo12:.LC45
+	adrp	x0, .LC46
+	add	x0, x0, :lo12:.LC46
 	b	printf
 	.size	print_gc_debug_info, .-print_gc_debug_info
 	.section	.text.zftl_get_gc_node,"ax",@progbits
@@ -3395,23 +3453,21 @@ zftl_get_gc_node:
 	and	w1, w1, 65535
 	and	w0, w0, 65535
 	cmp	w1, 5
-	bne	.L627
+	bne	.L639
 	mov	w1, w0
-	adrp	x0, .LANCHOR74
-	ldr	x0, [x0, #:lo12:.LANCHOR74]
-.L629:
+	adrp	x0, .LANCHOR78
+	ldr	x0, [x0, #:lo12:.LANCHOR78]
+.L641:
 	b	_list_get_gc_head_node.isra.2
-.L627:
+.L639:
 	cmp	w1, 2
+	bne	.L640
+	b	zftl_get_gc_node.part.10
+.L640:
 	mov	w1, w0
-	bne	.L628
-	adrp	x0, .LANCHOR75
-	ldr	x0, [x0, #:lo12:.LANCHOR75]
-	b	.L629
-.L628:
-	adrp	x0, .LANCHOR76
-	ldr	x0, [x0, #:lo12:.LANCHOR76]
-	b	.L629
+	adrp	x0, .LANCHOR79
+	ldr	x0, [x0, #:lo12:.LANCHOR79]
+	b	.L641
 	.size	zftl_get_gc_node, .-zftl_get_gc_node
 	.section	.text.gc_search_src_blk,"ax",@progbits
 	.align	2
@@ -3425,16 +3481,16 @@ gc_search_src_blk:
 	and	w0, w1, 255
 	stp	x19, x20, [sp, 16]
 	str	w0, [x29, 112]
-	adrp	x0, .LANCHOR5
+	adrp	x0, .LANCHOR6
 	stp	x23, x24, [sp, 48]
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	ldr	x0, [x0, #:lo12:.LANCHOR6]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	add	x0, x0, x21, sxtw 1
 	ldrh	w19, [x0, 120]
-	cbz	w19, .L631
+	cbz	w19, .L643
 	mov	w0, w19
-.L630:
+.L642:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -3442,439 +3498,487 @@ gc_search_src_blk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L631:
+.L643:
 	and	w20, w2, 255
-	cbnz	w21, .L633
-	adrp	x24, .LANCHOR77
-	adrp	x26, .LANCHOR7
-	adrp	x27, .LC46
-	and	w23, w20, 65535
-	add	x26, x26, :lo12:.LANCHOR7
-	add	x27, x27, :lo12:.LC46
-	strh	wzr, [x24, #:lo12:.LANCHOR77]
-	mov	w22, 0
+	cbnz	w21, .L645
+	adrp	x24, .LANCHOR80
+	adrp	x26, .LANCHOR9
+	adrp	x27, .LC47
+	and	w22, w20, 65535
+	add	x26, x26, :lo12:.LANCHOR9
+	add	x27, x27, :lo12:.LC47
+	strh	wzr, [x24, #:lo12:.LANCHOR80]
+	mov	w23, 0
 	mov	w25, 0
-.L634:
-	cmp	w25, w23
-	bcs	.L639
-	ldrh	w6, [x24, #:lo12:.LANCHOR77]
-	add	x7, x24, :lo12:.LANCHOR77
+.L646:
+	cmp	w25, w22
+	bcs	.L651
+	ldrh	w6, [x24, #:lo12:.LANCHOR80]
+	add	x7, x24, :lo12:.LANCHOR80
 	mov	w1, 3
 	mov	w0, w6
 	bl	zftl_get_gc_node
 	add	w2, w6, 1
 	and	w2, w2, 65535
-	strh	w2, [x24, #:lo12:.LANCHOR77]
+	strh	w2, [x24, #:lo12:.LANCHOR80]
 	and	w1, w0, 65535
 	mov	w0, 65535
 	mov	w28, w1
 	cmp	w1, w0
-	beq	.L635
+	beq	.L647
 	ldr	w0, [x26]
-	adrp	x6, .LANCHOR4
+	adrp	x6, .LANCHOR5
 	uxtw	x4, w1
-	tbz	x0, 8, .L636
-	ldr	x0, [x6, #:lo12:.LANCHOR4]
+	tbz	x0, 8, .L648
+	ldr	x0, [x6, #:lo12:.LANCHOR5]
 	stp	x6, x4, [x29, 96]
 	ldrh	w3, [x0, x4, lsl 1]
 	mov	x0, x27
 	bl	printf
 	ldp	x6, x4, [x29, 96]
-.L636:
-	ldr	x0, [x6, #:lo12:.LANCHOR4]
+.L648:
+	ldr	x0, [x6, #:lo12:.LANCHOR5]
 	ldrh	w1, [x0, x4, lsl 1]
-	adrp	x0, .LANCHOR62
-	ldrh	w0, [x0, #:lo12:.LANCHOR62]
+	adrp	x0, .LANCHOR64
+	ldrh	w0, [x0, #:lo12:.LANCHOR64]
 	cmp	w1, w0
-	bcs	.L637
+	bcs	.L649
 	mov	w2, 0
 	mov	w1, 0
 	mov	w0, w28
 	bl	gc_add_sblk
-	cbz	w0, .L638
-	add	w5, w22, 1
-	and	w22, w5, 65535
-	cmp	w23, w22
-	bcs	.L638
-.L639:
+	cbz	w0, .L650
+	add	w5, w23, 1
+	and	w23, w5, 65535
+	cmp	w22, w23
+	bcs	.L650
+.L651:
 	ldr	x0, [x29, 112]
-	tbz	x0, 1, .L641
-	adrp	x25, .LANCHOR79
-	adrp	x28, .LANCHOR78
-	add	x27, x25, :lo12:.LANCHOR79
-	add	x28, x28, :lo12:.LANCHOR78
+	tbz	x0, 1, .L653
+	adrp	x25, .LANCHOR82
+	adrp	x24, .LANCHOR81
+	add	x27, x25, :lo12:.LANCHOR82
+	add	x24, x24, :lo12:.LANCHOR81
+	mov	w28, 0
 	mov	w26, 65535
-.L642:
-	cmp	w19, w23
-	beq	.L646
-	ldrh	w6, [x28]
+.L654:
+	cmp	w28, w22
+	beq	.L658
+	ldrh	w6, [x24]
 	mov	w1, 5
 	mov	w0, w6
 	bl	zftl_get_gc_node
 	add	w6, w6, 1
-	strh	w6, [x28]
+	strh	w6, [x24]
 	and	w1, w0, 65535
 	cmp	w1, w26
-	beq	.L643
-	adrp	x2, .LANCHOR4
+	beq	.L655
+	adrp	x2, .LANCHOR5
 	ubfiz	x1, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR4]
+	ldr	x2, [x2, #:lo12:.LANCHOR5]
 	ldrh	w2, [x2, x1]
 	ldrh	w1, [x27]
 	cmp	w2, w1
-	bcs	.L644
+	bcs	.L655
 	mov	w2, 0
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L645
-	add	w5, w22, 1
-	and	w22, w5, 65535
-	cmp	w23, w22
-	bcs	.L645
-.L646:
-	ldrh	w1, [x25, #:lo12:.LANCHOR79]
+	cbz	w0, .L657
+	add	w5, w23, 1
+	and	w23, w5, 65535
 	cmp	w22, w23
-	adrp	x0, .LANCHOR80
-	bcs	.L648
-	ldrh	w3, [x0, #:lo12:.LANCHOR80]
-	adrp	x0, .LANCHOR72
-	ldrb	w0, [x0, #:lo12:.LANCHOR72]
-	lsr	w2, w3, 3
+	bcs	.L657
+.L658:
+	cmp	w23, w22
+	adrp	x0, .LANCHOR83
+	bcs	.L660
+	ldrh	w1, [x0, #:lo12:.LANCHOR83]
+	adrp	x3, .LANCHOR76
+	adrp	x0, .LANCHOR75
+	ldrh	w2, [x25, #:lo12:.LANCHOR82]
+	ldrb	w3, [x3, #:lo12:.LANCHOR76]
+	ldrh	w0, [x0, #:lo12:.LANCHOR75]
 	mul	w0, w0, w3
-	sub	w0, w0, w2
-	cmp	w1, w0
-	bge	.L641
-	add	w1, w1, w2
-	strh	w1, [x25, #:lo12:.LANCHOR79]
-.L641:
+	sub	w0, w0, w1, lsr 2
+	cmp	w2, w0
+	bge	.L653
+	add	w1, w2, w1, lsr 3
+	strh	w1, [x25, #:lo12:.LANCHOR82]
+.L653:
 	ldr	x0, [x29, 112]
-	tbz	x0, 0, .L649
-	cmp	w22, w23
-	bcs	.L649
-	adrp	x25, .LANCHOR81
-	add	x25, x25, :lo12:.LANCHOR81
-	mov	w24, 64
-	adrp	x26, .LANCHOR75
-	mov	w27, 65535
-.L654:
-	ldrh	w6, [x25]
-	ldr	x0, [x26, #:lo12:.LANCHOR75]
-	mov	w1, w6
-	bl	_list_get_gc_head_node.isra.2
+	tbz	x0, 0, .L661
+	cmp	w23, w22
+	bcs	.L661
+	adrp	x24, .LANCHOR84
+	add	x24, x24, :lo12:.LANCHOR84
+	mov	w25, 65535
+.L666:
+	ldrh	w6, [x24]
+	mov	w0, w6
+	bl	zftl_get_gc_node.part.10
 	add	w6, w6, 1
-	strh	w6, [x25]
-	cmp	w27, w0, uxth
-	beq	.L650
+	strh	w6, [x24]
+	cmp	w25, w0, uxth
+	beq	.L662
 	mov	w2, 0
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L651
-	add	w5, w22, 1
-	and	w22, w5, 65535
-	cmp	w23, w22
-	bhi	.L651
-.L652:
-	adrp	x1, .LANCHOR62
-	adrp	x2, .LANCHOR80
-	ldrh	w0, [x1, #:lo12:.LANCHOR62]
-	ldrh	w2, [x2, #:lo12:.LANCHOR80]
-	cmp	w0, w2, lsr 1
-	bls	.L649
-	sub	w0, w0, #8
-	b	.L728
-.L637:
-	strh	wzr, [x24, #:lo12:.LANCHOR77]
-	b	.L639
-.L635:
+	cbz	w0, .L663
+	add	w5, w23, 1
+	and	w23, w5, 65535
+	cmp	w22, w23
+	bhi	.L663
+.L664:
+	adrp	x0, .LANCHOR83
+	adrp	x1, .LANCHOR64
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	ldrh	w2, [x1, #:lo12:.LANCHOR64]
+	cmp	w2, w0, lsr 1
+	bls	.L661
+	sub	w0, w2, w0, lsr 3
+	b	.L741
+.L649:
+	strh	wzr, [x24, #:lo12:.LANCHOR80]
+	b	.L651
+.L647:
 	strh	wzr, [x7]
-	b	.L639
-.L638:
+	b	.L651
+.L650:
 	add	w25, w25, 1
 	and	w25, w25, 65535
-	b	.L634
-.L644:
-	strh	wzr, [x28]
-	b	.L646
-.L643:
-	strh	wzr, [x24, #:lo12:.LANCHOR77]
 	b	.L646
-.L645:
-	add	w19, w19, 1
-	and	w19, w19, 65535
-	b	.L642
-.L648:
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+.L655:
+	strh	wzr, [x24]
+	b	.L658
+.L657:
+	add	w28, w28, 1
+	and	w28, w28, 65535
+	b	.L654
+.L660:
+	ldrh	w1, [x25, #:lo12:.LANCHOR82]
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
 	cmp	w1, w0
-	bls	.L641
+	bls	.L653
 	sub	w0, w1, w0, lsr 3
-	strh	w0, [x25, #:lo12:.LANCHOR79]
-	b	.L641
-.L650:
-	strh	wzr, [x25]
-.L653:
-	cmp	w22, w23
-	bcs	.L652
-	adrp	x1, .LANCHOR62
-	adrp	x2, .LANCHOR80
-	ldrh	w0, [x1, #:lo12:.LANCHOR62]
-	ldrh	w2, [x2, #:lo12:.LANCHOR80]
+	strh	w0, [x25, #:lo12:.LANCHOR82]
+	b	.L653
+.L662:
+	strh	wzr, [x24]
+.L665:
+	cmp	w23, w22
+	bcs	.L664
+	adrp	x1, .LANCHOR64
+	adrp	x0, .LANCHOR83
+	ldrh	w2, [x1, #:lo12:.LANCHOR64]
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
 	cmp	w2, w0
-	bls	.L649
-	add	w0, w0, 8
-.L728:
-	strh	w0, [x1, #:lo12:.LANCHOR62]
-.L649:
-	adrp	x0, .LANCHOR7
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L676
+	bcs	.L661
+	add	w0, w2, w0, lsr 3
+.L741:
+	strh	w0, [x1, #:lo12:.LANCHOR64]
+.L661:
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 8, .L688
 	ldr	w2, [x29, 112]
-	adrp	x0, .LC47
+	adrp	x0, .LC48
 	mov	w4, w20
-	mov	w3, w22
+	mov	w3, w23
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC47
+	add	x0, x0, :lo12:.LC48
 	bl	printf
-.L676:
-	mov	w0, w22
-	b	.L630
-.L651:
-	sub	w24, w24, #1
-	ands	w24, w24, 65535
-	bne	.L654
-	b	.L653
-.L633:
+.L688:
+	mov	w0, w23
+	b	.L642
+.L663:
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	cmp	w22, w19
+	bne	.L666
+	b	.L665
+.L645:
+	adrp	x0, .LANCHOR65+318
+	strh	wzr, [x0, #:lo12:.LANCHOR65+318]
+	adrp	x0, .LANCHOR85
+	strh	wzr, [x0, #:lo12:.LANCHOR85]
 	ldr	w0, [x29, 112]
-	adrp	x3, .LANCHOR81
 	and	w0, w0, 1
 	str	w0, [x29, 104]
 	ldr	x0, [x29, 112]
-	strh	wzr, [x3, #:lo12:.LANCHOR81]
-	tbz	x0, 0, .L678
-	adrp	x23, .LANCHOR82
-	adrp	x24, .LANCHOR83
-	ldrh	w0, [x23, #:lo12:.LANCHOR82]
-	ldrh	w1, [x24, #:lo12:.LANCHOR83]
-	cmp	w0, w1, lsr 1
-	bcc	.L679
-	adrp	x1, .LANCHOR84
-	mov	w22, 0
-	ldrh	w1, [x1, #:lo12:.LANCHOR84]
+	tbz	x0, 0, .L691
+	adrp	x1, .LANCHOR87
+	adrp	x25, .LANCHOR86
+	str	x1, [x29, 96]
+	adrp	x26, .LANCHOR88
+	ldrh	w0, [x25, #:lo12:.LANCHOR86]
+	ldrh	w2, [x1, #:lo12:.LANCHOR87]
+	cmp	w0, w2, lsr 2
+	bcc	.L668
+	ldrh	w1, [x26, #:lo12:.LANCHOR88]
 	cmp	w1, w0
-	bls	.L657
-.L726:
-	add	x26, x3, :lo12:.LANCHOR81
+	bls	.L692
+.L668:
+	ldrh	w0, [x26, #:lo12:.LANCHOR88]
+	adrp	x22, .LANCHOR84
+	lsr	w0, w0, 2
+	strh	w0, [x22, #:lo12:.LANCHOR84]
+	mov	w0, 0
+	bl	zftl_get_gc_node.part.10
+	and	w1, w0, 65535
+	mov	w2, 65535
+	cmp	w1, w2
+	beq	.L694
+	adrp	x2, .LANCHOR5
+	ubfiz	x1, x1, 1, 16
+	ldr	x3, [x2, #:lo12:.LANCHOR5]
+	adrp	x2, .LANCHOR83
+	ldrh	w2, [x2, #:lo12:.LANCHOR83]
+	ldrh	w1, [x3, x1]
+	cmp	w1, w2, lsr 2
+	bcs	.L694
+	strh	wzr, [x22, #:lo12:.LANCHOR84]
+	mov	w2, w21
+	mov	w1, 0
+	bl	gc_add_sblk
+	cmp	w0, 0
+	cset	w23, ne
+.L670:
+	add	x22, x22, :lo12:.LANCHOR84
 	and	w28, w20, 65535
-	mov	w25, 64
+	mov	w24, 64
 	mov	w27, 65535
-.L660:
-	adrp	x0, .LANCHOR75
-	ldrh	w6, [x26]
-	ldr	x0, [x0, #:lo12:.LANCHOR75]
-	mov	w1, w6
-	bl	_list_get_gc_head_node.isra.2
+.L672:
+	ldrh	w6, [x22]
+	mov	w0, w6
+	bl	zftl_get_gc_node.part.10
 	add	w6, w6, 1
-	strh	w6, [x26]
+	strh	w6, [x22]
 	cmp	w27, w0, uxth
-	beq	.L658
+	beq	.L669
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L659
-	add	w5, w22, 1
-	and	w22, w5, 65535
-	cmp	w22, w28
-	bcc	.L659
-.L657:
-	ldrh	w1, [x24, #:lo12:.LANCHOR83]
-	ldrh	w0, [x23, #:lo12:.LANCHOR82]
-	cmp	w0, w1, lsr 1
-	bls	.L655
-	adrp	x24, .LANCHOR77
-	and	w27, w20, 65535
-	mov	w23, 64
-	mov	w26, 65535
-	strh	wzr, [x24, #:lo12:.LANCHOR77]
-	add	x24, x24, :lo12:.LANCHOR77
-.L662:
+	cbz	w0, .L671
+	add	w5, w23, 1
+	and	w23, w5, 65535
+	cmp	w23, w28
+	bcs	.L669
+.L671:
+	sub	w24, w24, #1
+	ands	w24, w24, 65535
+	bne	.L672
+.L669:
+	ldr	x0, [x29, 96]
+	ldrh	w1, [x25, #:lo12:.LANCHOR86]
+	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	cmp	w1, w0, lsr 3
+	bhi	.L689
+	ldrh	w0, [x26, #:lo12:.LANCHOR88]
+	add	w0, w0, 8
+	cmp	w1, w0
+	ble	.L667
+.L689:
+	adrp	x24, .LANCHOR80
+	and	w26, w20, 65535
+	mov	w22, 64
+	mov	w25, 65535
+	strh	wzr, [x24, #:lo12:.LANCHOR80]
+	add	x24, x24, :lo12:.LANCHOR80
+.L674:
 	ldrh	w6, [x24]
 	mov	w1, 3
 	mov	w0, w6
 	bl	zftl_get_gc_node
 	add	w6, w6, 1
 	strh	w6, [x24]
-	cmp	w26, w0, uxth
-	beq	.L655
+	cmp	w25, w0, uxth
+	beq	.L667
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L661
-	add	w5, w22, 1
-	and	w22, w5, 65535
-	cmp	w22, w27
-	bcs	.L655
-.L661:
-	sub	w23, w23, #1
-	ands	w23, w23, 65535
-	bne	.L662
-.L655:
+	cbz	w0, .L673
+	add	w5, w23, 1
+	and	w23, w5, 65535
+	cmp	w23, w26
+	bcs	.L667
+.L673:
+	sub	w22, w22, #1
+	ands	w22, w22, 65535
+	bne	.L674
+.L667:
 	ldr	x0, [x29, 112]
-	tbz	x0, 1, .L663
-	adrp	x28, .LANCHOR78
-	adrp	x24, .LANCHOR85
-	add	x27, x24, :lo12:.LANCHOR85
-	mov	w23, 64
-	strh	wzr, [x28, #:lo12:.LANCHOR78]
-	add	x28, x28, :lo12:.LANCHOR78
-	mov	w25, 65535
-	adrp	x26, .LANCHOR4
-.L668:
-	ldrh	w6, [x28]
+	tbz	x0, 1, .L675
+	adrp	x24, .LANCHOR81
+	adrp	x28, .LANCHOR89
+	adrp	x25, .LANCHOR76
+	add	x26, x24, :lo12:.LANCHOR81
+	add	x27, x28, :lo12:.LANCHOR89
+	add	x25, x25, :lo12:.LANCHOR76
+	strh	wzr, [x24, #:lo12:.LANCHOR81]
+	mov	w22, 64
+.L680:
+	ldrh	w6, [x26]
 	mov	w1, 5
 	mov	w0, w6
 	bl	zftl_get_gc_node
 	add	w6, w6, 1
-	strh	w6, [x28]
+	strh	w6, [x26]
 	and	w1, w0, 65535
-	cmp	w1, w25
-	beq	.L664
-	ldr	x2, [x26, #:lo12:.LANCHOR4]
+	mov	w2, 65535
+	cmp	w1, w2
+	beq	.L676
+	cmp	w20, 1
+	bne	.L677
+	adrp	x3, .LANCHOR75
+	ldrb	w2, [x25]
+	ldrh	w3, [x3, #:lo12:.LANCHOR75]
+	mul	w3, w2, w3
+	adrp	x2, .LANCHOR83
+	ldrh	w2, [x2, #:lo12:.LANCHOR83]
+	sub	w2, w3, w2, lsr 3
+	strh	w2, [x27]
+.L677:
+	adrp	x2, .LANCHOR5
 	ubfiz	x1, x1, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR5]
 	ldrh	w2, [x2, x1]
 	ldrh	w1, [x27]
 	cmp	w2, w1
-	bcs	.L665
+	bcs	.L678
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L666
-	add	w5, w22, 1
+	cbz	w0, .L679
+	add	w5, w23, 1
 	add	w19, w19, 1
-	and	w22, w5, 65535
+	and	w23, w5, 65535
 	and	w19, w19, 65535
-	cmp	w22, w20
-	bcc	.L666
-.L667:
-	cmp	w22, w20
-	adrp	x4, .LANCHOR80
-	adrp	x2, .LANCHOR72
-	bcc	.L669
-	cbnz	w19, .L670
-	adrp	x0, .LANCHOR86
-	ldrh	w1, [x0, #:lo12:.LANCHOR86]
-	adrp	x0, .LANCHOR87
-	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	cmp	w23, w20
+	bcc	.L679
+.L676:
+	cmp	w23, w20
+	adrp	x0, .LANCHOR83
+	adrp	x3, .LANCHOR76
+	bcc	.L681
+	cbnz	w19, .L682
+	adrp	x1, .LANCHOR90
+	ldrh	w2, [x1, #:lo12:.LANCHOR90]
+	adrp	x1, .LANCHOR91
+	ldrh	w1, [x1, #:lo12:.LANCHOR91]
+	cmp	w2, w1
+	bls	.L682
+.L681:
+	ldrh	w2, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR75
+	ldrb	w3, [x3, #:lo12:.LANCHOR76]
+	ldrh	w0, [x0, #:lo12:.LANCHOR75]
+	ldrh	w1, [x28, #:lo12:.LANCHOR89]
+	lsr	w2, w2, 3
+	mul	w0, w0, w3
+	sub	w0, w0, w2
 	cmp	w1, w0
-	bls	.L670
-.L669:
-	adrp	x1, .LANCHOR71
-	ldrb	w2, [x2, #:lo12:.LANCHOR72]
-	ldrh	w0, [x24, #:lo12:.LANCHOR85]
-	ldrh	w1, [x1, #:lo12:.LANCHOR71]
-	mul	w2, w1, w2
-	ldrh	w1, [x4, #:lo12:.LANCHOR80]
-	sub	w1, w2, w1, lsr 3
-	cmp	w0, w1
-	bge	.L663
-	add	w0, w0, 4
-.L727:
-	strh	w0, [x24, #:lo12:.LANCHOR85]
-.L663:
+	bge	.L675
+	add	w1, w1, w2
+	strh	w1, [x28, #:lo12:.LANCHOR89]
+.L675:
 	ldr	w0, [x29, 104]
-	cbz	w0, .L649
-	adrp	x25, .LANCHOR78
-	adrp	x23, .LANCHOR88
-	add	x28, x23, :lo12:.LANCHOR88
+	cbz	w0, .L661
+	adrp	x25, .LANCHOR80
+	adrp	x22, .LANCHOR92
+	adrp	x26, .LANCHOR87
+	adrp	x27, .LANCHOR86
+	add	x28, x22, :lo12:.LANCHOR92
+	add	x26, x26, :lo12:.LANCHOR87
+	add	x27, x27, :lo12:.LANCHOR86
+	strh	wzr, [x25, #:lo12:.LANCHOR80]
 	mov	w24, 64
-	strh	wzr, [x25, #:lo12:.LANCHOR78]
-	add	x25, x25, :lo12:.LANCHOR78
-	mov	w26, 65535
-	adrp	x27, .LANCHOR4
-.L674:
-	ldrh	w0, [x25]
+.L686:
+	ldrh	w6, [x25, #:lo12:.LANCHOR80]
 	mov	w1, 3
+	mov	w0, w6
 	bl	zftl_get_gc_node
+	add	w6, w6, 1
+	strh	w6, [x25, #:lo12:.LANCHOR80]
 	and	w1, w0, 65535
-	cmp	w1, w26
-	beq	.L671
-	ldr	x2, [x27, #:lo12:.LANCHOR4]
+	mov	w2, 65535
+	cmp	w1, w2
+	beq	.L683
+	adrp	x2, .LANCHOR5
 	ubfiz	x1, x1, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR5]
 	ldrh	w1, [x2, x1]
 	ldrh	w2, [x28]
 	cmp	w2, w1
-	bls	.L672
+	bls	.L684
 	cmp	w1, 2
-	bhi	.L673
-.L672:
+	bls	.L684
+	ldrh	w2, [x26]
+	ldrh	w1, [x27]
+	cmp	w1, w2, lsr 1
+	bls	.L683
+.L684:
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L673
-	add	w5, w22, 1
-	and	w22, w5, 65535
-	cmp	w22, w20
-	bcs	.L671
-.L673:
+	cbz	w0, .L685
+	add	w5, w23, 1
+	and	w23, w5, 65535
+	cmp	w23, w20
+	bcs	.L683
+.L685:
 	sub	w24, w24, #1
 	ands	w24, w24, 65535
-	bne	.L674
-.L671:
-	cmp	w22, w20
-	adrp	x2, .LANCHOR80
-	bcs	.L675
-	ldrh	w0, [x23, #:lo12:.LANCHOR88]
-	ldrh	w1, [x2, #:lo12:.LANCHOR80]
-	cmp	w0, w1, lsr 1
-	bls	.L649
-	sub	w0, w0, #4
-	strh	w0, [x23, #:lo12:.LANCHOR88]
-	b	.L649
-.L679:
-	mov	w22, 0
-	b	.L726
-.L658:
-	strh	wzr, [x26]
-	b	.L657
-.L659:
-	sub	w4, w25, #1
-	ands	w25, w4, 65535
-	bne	.L660
-	b	.L657
-.L678:
-	mov	w22, 0
-	b	.L655
-.L665:
-	strh	wzr, [x28]
-	b	.L667
-.L664:
-	adrp	x0, .LANCHOR77
-	strh	wzr, [x0, #:lo12:.LANCHOR77]
-	b	.L667
-.L666:
-	sub	w23, w23, #1
-	ands	w23, w23, 65535
-	bne	.L668
+	bne	.L686
+.L683:
+	cmp	w23, w20
+	adrp	x0, .LANCHOR83
+	bcs	.L687
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	ldrh	w1, [x22, #:lo12:.LANCHOR92]
+	cmp	w1, w0, lsr 1
+	bls	.L661
+	sub	w0, w1, w0, lsr 3
+	strh	w0, [x22, #:lo12:.LANCHOR92]
+	b	.L661
+.L694:
+	mov	w23, 0
+	b	.L670
+.L691:
+	mov	w23, 0
 	b	.L667
-.L670:
-	ldrh	w1, [x4, #:lo12:.LANCHOR80]
-	ldrb	w2, [x2, #:lo12:.LANCHOR72]
-	ldrh	w0, [x24, #:lo12:.LANCHOR85]
-	mul	w1, w1, w2
-	cmp	w0, w1
-	ble	.L663
-	sub	w0, w0, #4
-	b	.L727
-.L675:
-	ldrh	w0, [x2, #:lo12:.LANCHOR80]
-	adrp	x2, .LANCHOR72
-	ldrh	w1, [x23, #:lo12:.LANCHOR88]
-	ldrb	w2, [x2, #:lo12:.LANCHOR72]
-	mul	w0, w0, w2
+.L678:
+	strh	wzr, [x24, #:lo12:.LANCHOR81]
+	b	.L676
+.L679:
+	sub	w22, w22, #1
+	ands	w22, w22, 65535
+	bne	.L680
+	b	.L676
+.L682:
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	ldrb	w1, [x3, #:lo12:.LANCHOR76]
+	ldrh	w2, [x28, #:lo12:.LANCHOR89]
+	mul	w1, w1, w0
+	cmp	w2, w1
+	ble	.L675
+	sub	w0, w2, w0, lsr 3
+	strh	w0, [x28, #:lo12:.LANCHOR89]
+	b	.L675
+.L687:
+	ldrh	w1, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR76
+	ldrh	w2, [x22, #:lo12:.LANCHOR92]
+	ldrb	w0, [x0, #:lo12:.LANCHOR76]
+	mul	w0, w0, w1
 	sub	w0, w0, #32
-	cmp	w1, w0
-	bge	.L649
-	add	w1, w1, 4
-	strh	w1, [x23, #:lo12:.LANCHOR88]
-	b	.L649
+	cmp	w2, w0
+	bge	.L661
+	add	w1, w2, w1, lsr 3
+	strh	w1, [x22, #:lo12:.LANCHOR92]
+	b	.L661
+.L692:
+	mov	w23, 0
+	b	.L669
 	.size	gc_search_src_blk, .-gc_search_src_blk
 	.section	.text.zftl_insert_free_list,"ax",@progbits
 	.align	2
@@ -3887,27 +3991,27 @@ zftl_insert_free_list:
 	add	x0, x0, x1, uxth 2
 	ldrb	w0, [x0, 2]
 	ands	w0, w0, 24
-	bne	.L730
-	adrp	x2, .LANCHOR89
-	adrp	x0, .LANCHOR90
-	add	x2, x2, :lo12:.LANCHOR89
-	add	x0, x0, :lo12:.LANCHOR90
-.L732:
-	b	_insert_free_list
-.L730:
-	cmp	w0, 16
-	bne	.L731
-	adrp	x2, .LANCHOR91
-	adrp	x0, .LANCHOR92
-	add	x2, x2, :lo12:.LANCHOR91
-	add	x0, x0, :lo12:.LANCHOR92
-	b	.L732
-.L731:
+	bne	.L743
 	adrp	x2, .LANCHOR93
 	adrp	x0, .LANCHOR94
 	add	x2, x2, :lo12:.LANCHOR93
 	add	x0, x0, :lo12:.LANCHOR94
-	b	.L732
+.L745:
+	b	_insert_free_list
+.L743:
+	cmp	w0, 16
+	bne	.L744
+	adrp	x2, .LANCHOR95
+	adrp	x0, .LANCHOR96
+	add	x2, x2, :lo12:.LANCHOR95
+	add	x0, x0, :lo12:.LANCHOR96
+	b	.L745
+.L744:
+	adrp	x2, .LANCHOR97
+	adrp	x0, .LANCHOR98
+	add	x2, x2, :lo12:.LANCHOR97
+	add	x0, x0, :lo12:.LANCHOR98
+	b	.L745
 	.size	zftl_insert_free_list, .-zftl_insert_free_list
 	.section	.text.zftl_insert_data_list,"ax",@progbits
 	.align	2
@@ -3921,94 +4025,235 @@ zftl_insert_data_list:
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L734
-	adrp	x2, .LANCHOR84
-	adrp	x0, .LANCHOR75
-	add	x2, x2, :lo12:.LANCHOR84
-	add	x0, x0, :lo12:.LANCHOR75
-.L737:
+	bne	.L747
+	adrp	x2, .LANCHOR88
+	adrp	x0, .LANCHOR8
+	add	x2, x2, :lo12:.LANCHOR88
+	add	x0, x0, :lo12:.LANCHOR8
+.L750:
 	b	_insert_data_list
-.L734:
+.L747:
 	cmp	w2, 96
-	bne	.L735
-	adrp	x2, .LANCHOR82
-	adrp	x0, .LANCHOR76
-	add	x2, x2, :lo12:.LANCHOR82
-	add	x0, x0, :lo12:.LANCHOR76
-	b	.L737
-.L735:
-	cmp	w2, 160
-	bne	.L733
+	bne	.L748
 	adrp	x2, .LANCHOR86
-	adrp	x0, .LANCHOR74
+	adrp	x0, .LANCHOR79
 	add	x2, x2, :lo12:.LANCHOR86
-	add	x0, x0, :lo12:.LANCHOR74
-	b	.L737
-.L733:
+	add	x0, x0, :lo12:.LANCHOR79
+	b	.L750
+.L748:
+	cmp	w2, 160
+	bne	.L746
+	adrp	x2, .LANCHOR90
+	adrp	x0, .LANCHOR78
+	add	x2, x2, :lo12:.LANCHOR90
+	add	x0, x0, :lo12:.LANCHOR78
+	b	.L750
+.L746:
 	ret
 	.size	zftl_insert_data_list, .-zftl_insert_data_list
+	.section	.text.zftl_gc_get_free_sblk,"ax",@progbits
+	.align	2
+	.global	zftl_gc_get_free_sblk
+	.type	zftl_gc_get_free_sblk, %function
+zftl_gc_get_free_sblk:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR6
+	stp	x21, x22, [sp, 32]
+	and	w21, w0, 65535
+	ldr	x0, [x20, #:lo12:.LANCHOR6]
+	and	w22, w1, 65535
+	ldrh	w19, [x0, 588]
+	mov	w0, 65535
+	cmp	w19, w0
+	beq	.L752
+	cbnz	w21, .L752
+	mov	w1, w19
+	adrp	x0, .LC49
+	add	x0, x0, :lo12:.LC49
+	bl	printf
+	ldr	x0, [x20, #:lo12:.LANCHOR6]
+	mov	w1, -1
+	strh	w1, [x0, 588]
+.L753:
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
+.L752:
+	adrp	x2, .LANCHOR95
+	adrp	x20, .LANCHOR97
+	ldrh	w0, [x2, #:lo12:.LANCHOR95]
+	ldrh	w1, [x20, #:lo12:.LANCHOR97]
+	cmp	w0, w1
+	bls	.L754
+	lsr	w1, w0, 3
+	cmp	w21, 0
+	adrp	x0, .LANCHOR96
+	csel	w1, w1, wzr, ne
+	add	x2, x2, :lo12:.LANCHOR95
+	add	x0, x0, :lo12:.LANCHOR96
+.L768:
+	bl	_list_pop_index_node
+	and	w19, w0, 65535
+	mov	w0, 65535
+	cmp	w19, w0
+	bne	.L759
+	adrp	x0, .LANCHOR93
+	ldrh	w5, [x20, #:lo12:.LANCHOR97]
+	mov	w2, w22
+	mov	w1, w19
+	ldrh	w4, [x0, #:lo12:.LANCHOR93]
+	adrp	x0, .LANCHOR94
+	ldr	x3, [x0, #:lo12:.LANCHOR94]
+	adrp	x0, .LC50
+	add	x0, x0, :lo12:.LC50
+	bl	printf
+.L759:
+	cbz	w21, .L753
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 8, .L753
+	adrp	x4, .LANCHOR5
+	adrp	x1, .LANCHOR3
+	uxtw	x3, w19
+	ldr	x1, [x1, #:lo12:.LANCHOR3]
+	lsl	x0, x3, 2
+	ldr	x6, [x4, #:lo12:.LANCHOR5]
+	add	x2, x1, x0
+	ldr	w4, [x1, x0]
+	ldrh	w6, [x6, x3, lsl 1]
+	ldrb	w2, [x2, 2]
+	ldrh	w5, [x1, x0]
+	ubfx	x4, x4, 11, 8
+	mov	w1, w19
+	adrp	x0, .LC51
+	ubfx	x3, x2, 3, 2
+	and	w5, w5, 2047
+	ubfx	x2, x2, 5, 3
+	add	x0, x0, :lo12:.LC51
+	bl	printf
+	b	.L753
+.L754:
+	cbnz	w21, .L757
+	lsr	w1, w1, 2
+.L758:
+	adrp	x0, .LANCHOR98
+	add	x2, x20, :lo12:.LANCHOR97
+	add	x0, x0, :lo12:.LANCHOR98
+	b	.L768
+.L757:
+	mov	w1, 7
+	mul	w1, w0, w1
+	lsr	w1, w1, 3
+	b	.L758
+	.size	zftl_gc_get_free_sblk, .-zftl_gc_get_free_sblk
 	.section	.text.zftl_get_free_sblk,"ax",@progbits
 	.align	2
 	.global	zftl_get_free_sblk
 	.type	zftl_get_free_sblk, %function
 zftl_get_free_sblk:
 	stp	x29, x30, [sp, -48]!
-	and	w0, w0, 65535
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR93
+	and	w20, w1, 65535
 	str	x21, [sp, 32]
-	and	w21, w1, 65535
-	cmp	w21, 5
-	bne	.L739
-	adrp	x1, .LANCHOR91
-	add	x2, x1, :lo12:.LANCHOR91
-	ldrh	w3, [x1, #:lo12:.LANCHOR91]
-	ldrh	w1, [x20, #:lo12:.LANCHOR93]
+	cmp	w20, 5
+	bne	.L770
+	adrp	x2, .LANCHOR95
+	adrp	x0, .LANCHOR97
+	ldrh	w3, [x2, #:lo12:.LANCHOR95]
+	ldrh	w1, [x0, #:lo12:.LANCHOR97]
 	cmp	w3, w1
-	bls	.L740
-	mov	w1, w0
-	adrp	x0, .LANCHOR92
-	add	x0, x0, :lo12:.LANCHOR92
-.L744:
+	bcc	.L771
+	adrp	x4, .LANCHOR93
+	ldrh	w4, [x4, #:lo12:.LANCHOR93]
+	cmp	w4, w3
+	bls	.L772
+	cbz	w1, .L772
+.L771:
+	add	x2, x0, :lo12:.LANCHOR97
+	lsr	w1, w1, 1
+.L791:
+	adrp	x0, .LANCHOR98
+	add	x0, x0, :lo12:.LANCHOR98
+	b	.L790
+.L772:
+	adrp	x0, .LANCHOR96
+	add	x2, x2, :lo12:.LANCHOR95
+	add	x0, x0, :lo12:.LANCHOR96
+	mov	w1, 0
+.L790:
 	bl	_list_pop_index_node
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	bne	.L742
-	adrp	x0, .LANCHOR89
-	ldrh	w5, [x20, #:lo12:.LANCHOR93]
-	mov	w2, w21
+	bne	.L775
+	adrp	x0, .LANCHOR97
+	mov	w2, w20
 	mov	w1, w19
-	ldrh	w4, [x0, #:lo12:.LANCHOR89]
-	adrp	x0, .LANCHOR90
-	ldr	x3, [x0, #:lo12:.LANCHOR90]
-	adrp	x0, .LC48
-	add	x0, x0, :lo12:.LC48
+	ldrh	w5, [x0, #:lo12:.LANCHOR97]
+	adrp	x0, .LANCHOR93
+	ldrh	w4, [x0, #:lo12:.LANCHOR93]
+	adrp	x0, .LANCHOR94
+	ldr	x3, [x0, #:lo12:.LANCHOR94]
+	adrp	x0, .LC50
+	add	x0, x0, :lo12:.LC50
 	bl	printf
-.L742:
+	b	.L775
+.L770:
+	adrp	x21, .LANCHOR6
+	and	w0, w0, 65535
+	ldr	x1, [x21, #:lo12:.LANCHOR6]
+	ldrh	w19, [x1, 590]
+	mov	w1, 65535
+	cmp	w19, w1
+	beq	.L774
+	cmp	w20, 1
+	beq	.L774
+	mov	w1, w19
+	adrp	x0, .LC52
+	add	x0, x0, :lo12:.LC52
+	bl	printf
+	ldr	x0, [x21, #:lo12:.LANCHOR6]
+	mov	w1, -1
+	strh	w1, [x0, 590]
+.L775:
 	mov	w0, w19
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L740:
+.L774:
+	adrp	x2, .LANCHOR93
+	adrp	x4, .LANCHOR97
+	ldrh	w1, [x2, #:lo12:.LANCHOR93]
+	ldrh	w3, [x4, #:lo12:.LANCHOR97]
+	cmp	w1, w3
+	bcc	.L776
+	adrp	x5, .LANCHOR95
+	ldrh	w5, [x5, #:lo12:.LANCHOR95]
+	cmp	w5, w1
+	bls	.L777
+	cbz	w3, .L777
+.L776:
+	cmp	w20, 1
+	lsr	w3, w3, 1
+	csel	w0, w3, w0, eq
+	add	x2, x4, :lo12:.LANCHOR97
+	mov	w1, w0
+	b	.L791
+.L777:
+	lsr	w1, w1, 1
+	cmp	w20, 1
+	csel	w0, w1, w0, eq
+	add	x2, x2, :lo12:.LANCHOR93
 	mov	w1, w0
-	add	x2, x20, :lo12:.LANCHOR93
 	adrp	x0, .LANCHOR94
 	add	x0, x0, :lo12:.LANCHOR94
-	b	.L744
-.L739:
-	adrp	x1, .LANCHOR89
-	add	x2, x1, :lo12:.LANCHOR89
-	ldrh	w3, [x1, #:lo12:.LANCHOR89]
-	ldrh	w1, [x20, #:lo12:.LANCHOR93]
-	cmp	w3, w1
-	bls	.L740
-	mov	w1, w0
-	adrp	x0, .LANCHOR90
-	add	x0, x0, :lo12:.LANCHOR90
-	b	.L744
+	b	.L790
 	.size	zftl_get_free_sblk, .-zftl_get_free_sblk
 	.section	.text.zftl_remove_data_node,"ax",@progbits
 	.align	2
@@ -4022,30 +4267,30 @@ zftl_remove_data_node:
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L746
-	adrp	x2, .LANCHOR84
-	adrp	x0, .LANCHOR75
-	add	x2, x2, :lo12:.LANCHOR84
-	add	x0, x0, :lo12:.LANCHOR75
-.L749:
+	bne	.L793
+	adrp	x2, .LANCHOR88
+	adrp	x0, .LANCHOR8
+	add	x2, x2, :lo12:.LANCHOR88
+	add	x0, x0, :lo12:.LANCHOR8
+.L796:
 	b	_list_remove_node
-.L746:
+.L793:
 	cmp	w2, 96
-	bne	.L747
-	adrp	x2, .LANCHOR82
-	adrp	x0, .LANCHOR76
-	add	x2, x2, :lo12:.LANCHOR82
-	add	x0, x0, :lo12:.LANCHOR76
-	b	.L749
-.L747:
-	cmp	w2, 160
-	bne	.L745
+	bne	.L794
 	adrp	x2, .LANCHOR86
-	adrp	x0, .LANCHOR74
+	adrp	x0, .LANCHOR79
 	add	x2, x2, :lo12:.LANCHOR86
-	add	x0, x0, :lo12:.LANCHOR74
-	b	.L749
-.L745:
+	add	x0, x0, :lo12:.LANCHOR79
+	b	.L796
+.L794:
+	cmp	w2, 160
+	bne	.L792
+	adrp	x2, .LANCHOR90
+	adrp	x0, .LANCHOR78
+	add	x2, x2, :lo12:.LANCHOR90
+	add	x0, x0, :lo12:.LANCHOR78
+	b	.L796
+.L792:
 	ret
 	.size	zftl_remove_data_node, .-zftl_remove_data_node
 	.section	.text.zftl_remove_free_node,"ax",@progbits
@@ -4059,27 +4304,27 @@ zftl_remove_free_node:
 	add	x0, x0, x1, uxth 2
 	ldrb	w0, [x0, 2]
 	ands	w0, w0, 24
-	bne	.L751
-	adrp	x2, .LANCHOR89
-	adrp	x0, .LANCHOR90
-	add	x2, x2, :lo12:.LANCHOR89
-	add	x0, x0, :lo12:.LANCHOR90
-.L753:
-	b	_list_remove_node
-.L751:
-	cmp	w0, 16
-	bne	.L752
-	adrp	x2, .LANCHOR91
-	adrp	x0, .LANCHOR92
-	add	x2, x2, :lo12:.LANCHOR91
-	add	x0, x0, :lo12:.LANCHOR92
-	b	.L753
-.L752:
+	bne	.L798
 	adrp	x2, .LANCHOR93
 	adrp	x0, .LANCHOR94
 	add	x2, x2, :lo12:.LANCHOR93
 	add	x0, x0, :lo12:.LANCHOR94
-	b	.L753
+.L800:
+	b	_list_remove_node
+.L798:
+	cmp	w0, 16
+	bne	.L799
+	adrp	x2, .LANCHOR95
+	adrp	x0, .LANCHOR96
+	add	x2, x2, :lo12:.LANCHOR95
+	add	x0, x0, :lo12:.LANCHOR96
+	b	.L800
+.L799:
+	adrp	x2, .LANCHOR97
+	adrp	x0, .LANCHOR98
+	add	x2, x2, :lo12:.LANCHOR97
+	add	x0, x0, :lo12:.LANCHOR98
+	b	.L800
 	.size	zftl_remove_free_node, .-zftl_remove_free_node
 	.section	.text.zftl_list_update_data_list,"ax",@progbits
 	.align	2
@@ -4093,30 +4338,30 @@ zftl_list_update_data_list:
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L755
-	adrp	x2, .LANCHOR84
-	adrp	x0, .LANCHOR75
-	add	x2, x2, :lo12:.LANCHOR84
-	add	x0, x0, :lo12:.LANCHOR75
-.L758:
+	bne	.L802
+	adrp	x2, .LANCHOR88
+	adrp	x0, .LANCHOR8
+	add	x2, x2, :lo12:.LANCHOR88
+	add	x0, x0, :lo12:.LANCHOR8
+.L805:
 	b	_list_update_data_list
-.L755:
+.L802:
 	cmp	w2, 96
-	bne	.L756
-	adrp	x2, .LANCHOR82
-	adrp	x0, .LANCHOR76
-	add	x2, x2, :lo12:.LANCHOR82
-	add	x0, x0, :lo12:.LANCHOR76
-	b	.L758
-.L756:
-	cmp	w2, 160
-	bne	.L754
+	bne	.L803
 	adrp	x2, .LANCHOR86
-	adrp	x0, .LANCHOR74
+	adrp	x0, .LANCHOR79
 	add	x2, x2, :lo12:.LANCHOR86
-	add	x0, x0, :lo12:.LANCHOR74
-	b	.L758
-.L754:
+	add	x0, x0, :lo12:.LANCHOR79
+	b	.L805
+.L803:
+	cmp	w2, 160
+	bne	.L801
+	adrp	x2, .LANCHOR90
+	adrp	x0, .LANCHOR78
+	add	x2, x2, :lo12:.LANCHOR90
+	add	x0, x0, :lo12:.LANCHOR78
+	b	.L805
+.L801:
 	ret
 	.size	zftl_list_update_data_list, .-zftl_list_update_data_list
 	.section	.text.print_list_info,"ax",@progbits
@@ -4124,7 +4369,7 @@ zftl_list_update_data_list:
 	.global	print_list_info
 	.type	print_list_info, %function
 print_list_info:
-	sub	sp, sp, #112
+	sub	sp, sp, #96
 	stp	x29, x30, [sp, 32]
 	add	x29, sp, 32
 	ldrh	w2, [x1]
@@ -4132,30 +4377,31 @@ print_list_info:
 	stp	x19, x20, [sp, 48]
 	mov	x19, x0
 	stp	x21, x22, [sp, 64]
-	adrp	x0, .LC49
+	adrp	x0, .LC53
 	stp	x23, x24, [sp, 80]
-	add	x0, x0, :lo12:.LC49
-	str	x25, [sp, 96]
+	add	x0, x0, :lo12:.LC53
 	bl	printf
 	ldr	x19, [x19]
-	cbz	x19, .L759
-	mov	x23, -6148914691236517206
-	adrp	x21, .LC50
-	add	x21, x21, :lo12:.LC50
+	cbz	x19, .L806
+	mov	x24, -6148914691236517206
+	adrp	x22, .LC54
+	adrp	x21, .LANCHOR99
+	add	x22, x22, :lo12:.LC54
+	add	x21, x21, :lo12:.LANCHOR99
 	mov	w20, 0
-	adrp	x22, .LANCHOR0
-	movk	x23, 0xaaab, lsl 0
-	adrp	x24, .LANCHOR3
-	adrp	x25, .LANCHOR4
-.L766:
-	ldr	x2, [x22, #:lo12:.LANCHOR0]
-	ldr	x1, [x24, #:lo12:.LANCHOR3]
+	adrp	x23, .LANCHOR0
+	movk	x24, 0xaaab, lsl 0
+.L810:
+	ldr	x2, [x23, #:lo12:.LANCHOR0]
+	adrp	x1, .LANCHOR3
+	adrp	x8, .LANCHOR5
+	ldrh	w5, [x19, 4]
 	sub	x2, x19, x2
-	ldr	x8, [x25, #:lo12:.LANCHOR4]
+	ldr	x1, [x1, #:lo12:.LANCHOR3]
 	asr	x2, x2, 1
-	ldrh	w5, [x19, 4]
+	ldr	x8, [x8, #:lo12:.LANCHOR5]
 	ldrh	w4, [x19, 2]
-	mul	x2, x2, x23
+	mul	x2, x2, x24
 	and	x7, x2, 65535
 	and	w2, w2, 65535
 	lsl	x0, x7, 2
@@ -4173,25 +4419,26 @@ print_list_info:
 	mov	w1, w20
 	ubfx	x0, x0, 11, 8
 	str	w0, [sp]
-	mov	x0, x21
+	mov	x0, x22
 	bl	printf
 	ldrh	w19, [x19]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L759
-	ldr	x0, [x22, #:lo12:.LANCHOR0]
+	beq	.L806
+	ldr	x0, [x23, #:lo12:.LANCHOR0]
 	mov	w1, 6
 	add	w20, w20, 1
-	cmp	w20, 33
+	and	w20, w20, 65535
 	umaddl	x19, w19, w1, x0
-	bne	.L766
-.L759:
+	ldrh	w0, [x21]
+	cmp	w0, w20
+	bcs	.L810
+.L806:
 	ldp	x19, x20, [sp, 48]
 	ldp	x21, x22, [sp, 64]
 	ldp	x23, x24, [sp, 80]
 	ldp	x29, x30, [sp, 32]
-	ldr	x25, [sp, 96]
-	add	sp, sp, 112
+	add	sp, sp, 96
 	ret
 	.size	print_list_info, .-print_list_info
 	.section	.text.dump_all_list_info,"ax",@progbits
@@ -4200,39 +4447,80 @@ print_list_info:
 	.type	dump_all_list_info, %function
 dump_all_list_info:
 	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR89
-	adrp	x0, .LANCHOR90
-	add	x1, x1, :lo12:.LANCHOR89
-	add	x29, sp, 0
-	add	x0, x0, :lo12:.LANCHOR90
-	bl	print_list_info
-	adrp	x1, .LANCHOR91
-	adrp	x0, .LANCHOR92
-	add	x1, x1, :lo12:.LANCHOR91
-	add	x0, x0, :lo12:.LANCHOR92
-	bl	print_list_info
 	adrp	x1, .LANCHOR93
 	adrp	x0, .LANCHOR94
 	add	x1, x1, :lo12:.LANCHOR93
+	add	x29, sp, 0
 	add	x0, x0, :lo12:.LANCHOR94
 	bl	print_list_info
-	adrp	x1, .LANCHOR84
-	adrp	x0, .LANCHOR75
-	add	x1, x1, :lo12:.LANCHOR84
-	add	x0, x0, :lo12:.LANCHOR75
+	adrp	x1, .LANCHOR95
+	adrp	x0, .LANCHOR96
+	add	x1, x1, :lo12:.LANCHOR95
+	add	x0, x0, :lo12:.LANCHOR96
 	bl	print_list_info
-	adrp	x1, .LANCHOR82
-	adrp	x0, .LANCHOR76
-	add	x1, x1, :lo12:.LANCHOR82
-	add	x0, x0, :lo12:.LANCHOR76
+	adrp	x1, .LANCHOR97
+	adrp	x0, .LANCHOR98
+	add	x1, x1, :lo12:.LANCHOR97
+	add	x0, x0, :lo12:.LANCHOR98
+	bl	print_list_info
+	adrp	x1, .LANCHOR88
+	adrp	x0, .LANCHOR8
+	add	x1, x1, :lo12:.LANCHOR88
+	add	x0, x0, :lo12:.LANCHOR8
 	bl	print_list_info
-	ldp	x29, x30, [sp], 16
 	adrp	x1, .LANCHOR86
-	adrp	x0, .LANCHOR74
+	adrp	x0, .LANCHOR79
 	add	x1, x1, :lo12:.LANCHOR86
-	add	x0, x0, :lo12:.LANCHOR74
+	add	x0, x0, :lo12:.LANCHOR79
+	bl	print_list_info
+	ldp	x29, x30, [sp], 16
+	adrp	x1, .LANCHOR90
+	adrp	x0, .LANCHOR78
+	add	x1, x1, :lo12:.LANCHOR90
+	add	x0, x0, :lo12:.LANCHOR78
 	b	print_list_info
 	.size	dump_all_list_info, .-dump_all_list_info
+	.section	.text.ftl_tmp_into_update,"ax",@progbits
+	.align	2
+	.global	ftl_tmp_into_update
+	.type	ftl_tmp_into_update, %function
+ftl_tmp_into_update:
+	adrp	x0, .LANCHOR100
+	ldr	x0, [x0, #:lo12:.LANCHOR100]
+	ldr	w1, [x0, 16]
+	cmp	w1, 2048
+	bls	.L815
+	ldr	w2, [x0, 20]
+	add	w2, w2, w1, lsr 11
+	and	w1, w1, 2047
+	stp	w1, w2, [x0, 16]
+.L815:
+	ldr	w1, [x0, 24]
+	cmp	w1, 2048
+	bls	.L816
+	ldr	w2, [x0, 28]
+	add	w2, w2, w1, lsr 11
+	and	w1, w1, 2047
+	stp	w1, w2, [x0, 24]
+.L816:
+	ldr	w1, [x0, 32]
+	cmp	w1, 1024
+	bls	.L817
+	ldr	w2, [x0, 36]
+	add	w2, w2, w1, lsr 10
+	and	w1, w1, 1023
+	stp	w1, w2, [x0, 32]
+.L817:
+	ldr	w1, [x0, 40]
+	cmp	w1, 1024
+	bls	.L814
+	ldr	w2, [x0, 44]
+	add	w2, w2, w1, lsr 10
+	and	w1, w1, 1023
+	stp	w1, w2, [x0, 40]
+.L814:
+	ret
+	.size	ftl_tmp_into_update, .-ftl_tmp_into_update
 	.section	.text.ftl_get_blk_list_in_sblk,"ax",@progbits
 	.align	2
 	.global	ftl_get_blk_list_in_sblk
@@ -4240,35 +4528,35 @@ dump_all_list_info:
 ftl_get_blk_list_in_sblk:
 	adrp	x2, .LANCHOR3
 	and	w0, w0, 65535
-	adrp	x7, .LANCHOR96
-	add	x7, x7, :lo12:.LANCHOR96
+	adrp	x7, .LANCHOR102
+	add	x7, x7, :lo12:.LANCHOR102
 	ldr	x2, [x2, #:lo12:.LANCHOR3]
 	mov	w3, 0
 	mov	w13, 21
 	add	x2, x2, x0, uxth 2
 	ldrb	w12, [x2, 3]
-	adrp	x2, .LANCHOR72
-	ldrb	w10, [x2, #:lo12:.LANCHOR72]
-	adrp	x2, .LANCHOR95
-	ldrb	w6, [x2, #:lo12:.LANCHOR95]
+	adrp	x2, .LANCHOR76
+	ldrb	w10, [x2, #:lo12:.LANCHOR76]
+	adrp	x2, .LANCHOR101
+	ldrb	w6, [x2, #:lo12:.LANCHOR101]
 	and	w2, w6, 65535
 	mul	w0, w0, w2
 	sub	w2, w2, #1
 	sxth	w5, w2
 	and	w4, w0, 65535
 	mov	w0, 0
-.L771:
+.L820:
 	cmp	w3, w10
-	blt	.L775
+	blt	.L824
 	sxtw	x2, w0
 	mov	w3, -1
-.L776:
+.L825:
 	cmp	w10, w2
-	bgt	.L777
+	bgt	.L826
 	ret
-.L775:
+.L824:
 	asr	w2, w12, w3
-	tbnz	x2, 0, .L772
+	tbnz	x2, 0, .L821
 	sdiv	w2, w3, w6
 	ldrh	w8, [x7]
 	sbfiz	x11, x0, 1, 32
@@ -4277,106 +4565,200 @@ ftl_get_blk_list_in_sblk:
 	lsl	w2, w2, w8
 	add	w2, w4, w2
 	and	w2, w2, 65535
-	bhi	.L773
-.L778:
+	bhi	.L822
+.L827:
 	add	w0, w0, 1
 	strh	w2, [x1, x11]
-.L772:
+.L821:
 	add	w3, w3, 1
-	b	.L771
-.L773:
+	b	.L820
+.L822:
 	and	w8, w5, w3
 	add	w2, w2, w8
-	b	.L778
-.L777:
+	b	.L827
+.L826:
 	strh	w3, [x1, x2, lsl 1]
 	add	x2, x2, 1
-	b	.L776
+	b	.L825
 	.size	ftl_get_blk_list_in_sblk, .-ftl_get_blk_list_in_sblk
 	.section	.text.ftl_free_sblk,"ax",@progbits
 	.align	2
 	.global	ftl_free_sblk
 	.type	ftl_free_sblk, %function
 ftl_free_sblk:
-	stp	x29, x30, [sp, -48]!
-	adrp	x1, .LANCHOR3
+	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	and	x20, x0, 65535
-	ldr	x2, [x1, #:lo12:.LANCHOR3]
-	lsl	x19, x20, 2
 	stp	x21, x22, [sp, 32]
-	mov	x22, x20
-	add	x0, x2, x19
-	mov	x21, x1
-	ldrb	w3, [x0, 2]
-	tbz	x3, 3, .L780
-	adrp	x1, .LANCHOR97
-	ldr	x3, [x1, #:lo12:.LANCHOR97]
-	ldrh	w1, [x2, x19]
-	ldrh	w4, [x3, 74]
-	ubfx	x1, x1, 0, 11
-	add	w1, w1, w4
-	adrp	x4, .LANCHOR98
-	ldrh	w4, [x4, #:lo12:.LANCHOR98]
-	cmp	w4, w1, uxth
-	bcc	.L781
-	ldr	w1, [x2, x19]
-	ldrh	w2, [x3, 72]
-	ubfx	x1, x1, 11, 8
-	add	w1, w1, w2
-	adrp	x2, .LANCHOR99
-	ldrh	w2, [x2, #:lo12:.LANCHOR99]
-	cmp	w2, w1, uxth
-	bcs	.L780
-.L781:
-	adrp	x1, .LANCHOR86
-	adrp	x2, .LANCHOR91
-	ldrh	w1, [x1, #:lo12:.LANCHOR86]
-	ldrh	w2, [x2, #:lo12:.LANCHOR91]
-	add	w1, w1, w2
-	adrp	x2, .LANCHOR87
-	ldrh	w2, [x2, #:lo12:.LANCHOR87]
-	cmp	w1, w2
-	bge	.L782
-	ldrb	w1, [x0, 2]
-	mov	w2, 2
-	bfi	w1, w2, 3, 2
-.L787:
-	strb	w1, [x0, 2]
-.L780:
-	mov	w0, w22
+	adrp	x22, .LANCHOR3
+	str	x23, [sp, 48]
+	and	x23, x0, 65535
+	ldr	x4, [x22, #:lo12:.LANCHOR3]
+	lsl	x21, x23, 2
+	stp	x19, x20, [sp, 16]
+	mov	x19, x23
+	add	x20, x4, x21
+	ldrb	w0, [x20, 2]
+	tbz	x0, 3, .L830
+	adrp	x1, .LANCHOR100
+	ldrh	w2, [x4, x21]
+	adrp	x8, .LANCHOR103
+	ldr	x7, [x1, #:lo12:.LANCHOR100]
+	and	w3, w2, 2047
+	ldr	w2, [x4, x21]
+	ldrh	w8, [x8, #:lo12:.LANCHOR103]
+	ldrh	w1, [x7, 74]
+	ubfx	x6, x2, 11, 8
+	adrp	x2, .LANCHOR4
+	add	w1, w3, w1
+	ldrh	w2, [x2, #:lo12:.LANCHOR4]
+	and	w5, w1, 65535
+	ldrh	w1, [x7, 72]
+	add	w1, w6, w1
+	udiv	w7, w5, w2
+	and	w1, w1, 65535
+	add	w7, w7, w1
+	cmp	w7, w8
+	ble	.L831
+	adrp	x1, .LANCHOR91
+	adrp	x7, .LANCHOR95
+	ldrh	w5, [x1, #:lo12:.LANCHOR91]
+	adrp	x1, .LANCHOR90
+	ldrh	w7, [x7, #:lo12:.LANCHOR95]
+	ldrh	w1, [x1, #:lo12:.LANCHOR90]
+	add	w5, w5, 7
+	add	w1, w1, w7
+	cmp	w5, w1
+	blt	.L832
+.L847:
+	mov	w1, 2
+	bfi	w0, w1, 3, 2
+.L845:
+	strb	w0, [x20, 2]
+.L833:
+	ldrb	w0, [x20, 2]
+	ands	w0, w0, 24
+	bne	.L837
+	mul	w2, w6, w2
+	ldrh	w0, [x4, x21]
+	add	w2, w2, w2, lsl 1
+	add	w2, w3, w2, lsr 2
+	ubfx	x2, x2, 2, 9
+	bfi	w0, w2, 0, 11
+	strh	w0, [x4, x21]
+.L830:
+	mov	w0, w19
 	bl	zftl_remove_data_node
-	mov	w0, w22
-	bl	zftl_insert_free_list
-	ldr	x0, [x21, #:lo12:.LANCHOR3]
+	ldr	x0, [x22, #:lo12:.LANCHOR3]
+	add	x21, x0, x21
+	ldrb	w0, [x21, 2]
+	and	w0, w0, 31
+	strb	w0, [x21, 2]
+	adrp	x0, .LANCHOR5
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	strh	wzr, [x0, x23, lsl 1]
+	ldrb	w0, [x20, 2]
+	tbz	x0, 3, .L839
+	adrp	x0, .LANCHOR6
+	ldr	x0, [x0, #:lo12:.LANCHOR6]
+	ldrh	w1, [x0, 584]
+	cmp	w1, w19
+	bne	.L840
+	mov	w1, -1
+	ldrh	w2, [x0, 588]
+	strh	w1, [x0, 584]
+	mov	w1, 65535
+	cmp	w2, w1
+	bne	.L840
+	strh	w19, [x0, 588]
+	mov	w1, w19
+	adrp	x0, .LC55
+	add	x0, x0, :lo12:.LC55
+.L846:
+	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	add	x0, x0, x19
-	ldrb	w1, [x0, 2]
-	and	w1, w1, 31
-	strb	w1, [x0, 2]
-	adrp	x0, .LANCHOR4
-	ldr	x0, [x0, #:lo12:.LANCHOR4]
-	strh	wzr, [x0, x20, lsl 1]
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	b	printf
+.L832:
+	adrp	x1, .LANCHOR104
+	adrp	x7, .LANCHOR93
+	ldrh	w5, [x1, #:lo12:.LANCHOR104]
+	adrp	x1, .LANCHOR88
+	ldrh	w7, [x7, #:lo12:.LANCHOR93]
+	ldrh	w1, [x1, #:lo12:.LANCHOR88]
+	add	w5, w5, 7
+	add	w1, w1, w7
+	adrp	x7, .LANCHOR86
+	ldrh	w7, [x7, #:lo12:.LANCHOR86]
+	add	w1, w1, w7
+	cmp	w5, w1
+	blt	.L847
+.L836:
+	and	w0, w0, -25
+	b	.L845
+.L831:
+	madd	w1, w2, w1, w5
+	adrp	x5, .LANCHOR105
+	ldrh	w5, [x5, #:lo12:.LANCHOR105]
+	cmp	w1, w5
+	ble	.L833
+	adrp	x1, .LANCHOR104
+	adrp	x7, .LANCHOR93
+	ldrh	w5, [x1, #:lo12:.LANCHOR104]
+	adrp	x1, .LANCHOR88
+	ldrh	w7, [x7, #:lo12:.LANCHOR93]
+	ldrh	w1, [x1, #:lo12:.LANCHOR88]
+	add	w5, w5, 7
+	add	w1, w1, w7
+	adrp	x7, .LANCHOR86
+	ldrh	w7, [x7, #:lo12:.LANCHOR86]
+	add	w1, w1, w7
+	cmp	w5, w1
+	bge	.L836
+	adrp	x1, .LANCHOR91
+	adrp	x7, .LANCHOR95
+	ldrh	w5, [x1, #:lo12:.LANCHOR91]
+	adrp	x1, .LANCHOR90
+	ldrh	w7, [x7, #:lo12:.LANCHOR95]
+	ldrh	w1, [x1, #:lo12:.LANCHOR90]
+	add	w5, w5, 7
+	add	w1, w1, w7
+	cmp	w5, w1
+	blt	.L836
+	b	.L847
+.L837:
+	cmp	w0, 16
+	bne	.L830
+	sdiv	w2, w3, w2
+	ldr	w0, [x4, x21]
+	add	w2, w2, w2, lsl 1
+	add	w2, w6, w2, lsr 2
+	ubfx	x2, x2, 2, 6
+	bfi	w0, w2, 11, 8
+	str	w0, [x4, x21]
+	b	.L830
+.L840:
+	ldrh	w1, [x0, 586]
+	cmp	w1, w19
+	bne	.L839
+	mov	w1, -1
+	ldrh	w2, [x0, 590]
+	strh	w1, [x0, 586]
+	mov	w1, 65535
+	cmp	w2, w1
+	bne	.L839
+	strh	w19, [x0, 590]
+	mov	w1, w19
+	adrp	x0, .LC56
+	add	x0, x0, :lo12:.LC56
+	b	.L846
+.L839:
+	mov	w0, w19
+	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
-	ret
-.L782:
-	adrp	x1, .LANCHOR84
-	adrp	x2, .LANCHOR89
-	ldrh	w1, [x1, #:lo12:.LANCHOR84]
-	ldrh	w2, [x2, #:lo12:.LANCHOR89]
-	add	w1, w1, w2
-	adrp	x2, .LANCHOR82
-	ldrh	w2, [x2, #:lo12:.LANCHOR82]
-	add	w1, w1, w2
-	adrp	x2, .LANCHOR100
-	ldrh	w2, [x2, #:lo12:.LANCHOR100]
-	cmp	w1, w2
-	bge	.L780
-	ldrb	w1, [x0, 2]
-	and	w1, w1, -25
-	b	.L787
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	b	zftl_insert_free_list
 	.size	ftl_free_sblk, .-ftl_free_sblk
 	.section	.text.gc_free_src_blk,"ax",@progbits
 	.align	2
@@ -4386,20 +4768,20 @@ gc_free_src_blk:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR63
+	adrp	x21, .LANCHOR65
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LC51
-	adrp	x23, .LANCHOR4
-	add	x21, x21, :lo12:.LANCHOR63
+	adrp	x22, .LC57
+	adrp	x23, .LANCHOR5
+	add	x21, x21, :lo12:.LANCHOR65
 	mov	x24, x23
-	add	x22, x22, :lo12:.LC51
+	add	x22, x22, :lo12:.LC57
 	stp	x19, x20, [sp, 16]
 	mov	w20, 0
 	stp	x25, x26, [sp, 64]
-.L789:
+.L849:
 	ldrh	w0, [x21, 56]
 	cmp	w0, w20
-	bhi	.L804
+	bhi	.L863
 	strh	wzr, [x21, 56]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -4407,121 +4789,114 @@ gc_free_src_blk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L804:
+.L863:
 	add	x0, x21, x20, sxtw 1
 	ldrh	w25, [x0, 58]
-	ldr	x0, [x23, #:lo12:.LANCHOR4]
+	ldr	x0, [x23, #:lo12:.LANCHOR5]
 	mov	x19, x25
 	lsl	x26, x25, 1
 	ldrh	w2, [x0, x26]
-	cbz	w2, .L790
+	cbz	w2, .L850
 	mov	w1, w25
 	mov	x0, x22
 	bl	printf
-.L790:
-	ldr	x0, [x24, #:lo12:.LANCHOR4]
-	ldrh	w0, [x0, x26]
-	cbnz	w0, .L791
+.L850:
+	ldr	x0, [x24, #:lo12:.LANCHOR5]
+	strh	wzr, [x0, x26]
 	adrp	x0, .LANCHOR3
 	ldr	x0, [x0, #:lo12:.LANCHOR3]
 	add	x25, x0, x25, lsl 2
-	adrp	x0, .LANCHOR7
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L792
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 8, .L851
 	ldrb	w2, [x25, 2]
-	adrp	x0, .LC52
+	adrp	x0, .LC58
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC52
+	add	x0, x0, :lo12:.LC58
 	ubfx	x2, x2, 5, 3
 	bl	printf
-.L792:
+.L851:
 	ldrb	w0, [x25, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L793
+	beq	.L852
 	tst	w0, 192
-	bne	.L794
-.L793:
-	adrp	x1, .LANCHOR101
+	bne	.L853
+.L852:
+	adrp	x1, .LANCHOR106
 	adrp	x0, .LC0
-	mov	w2, 770
-	add	x1, x1, :lo12:.LANCHOR101
+	mov	w2, 793
+	add	x1, x1, :lo12:.LANCHOR106
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L794:
+.L853:
 	mov	w0, w19
 	bl	ftl_free_sblk
-	adrp	x0, .LANCHOR5
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	adrp	x0, .LANCHOR6
+	ldr	x0, [x0, #:lo12:.LANCHOR6]
 	ldrh	w2, [x0, 124]
-	cbz	w2, .L795
+	cbz	w2, .L854
 	add	x3, x0, 392
 	mov	w1, 0
-.L797:
+.L856:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L796
+	bne	.L855
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 392]
 	strh	w2, [x0, 124]
-.L795:
+.L854:
 	ldrh	w2, [x0, 120]
-	cbz	w2, .L798
+	cbz	w2, .L857
 	add	x3, x0, 136
 	mov	w1, 0
-.L800:
+.L859:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L799
+	bne	.L858
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 136]
 	strh	w2, [x0, 120]
-.L798:
+.L857:
 	ldrh	w2, [x0, 122]
-	cbz	w2, .L801
+	cbz	w2, .L860
 	add	x3, x0, 264
 	mov	w1, 0
-.L803:
+.L862:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L802
+	bne	.L861
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 264]
 	strh	w2, [x0, 122]
-.L801:
+.L860:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L789
-.L796:
+	b	.L849
+.L855:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L797
-	b	.L795
-.L799:
+	bne	.L856
+	b	.L854
+.L858:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L800
-	b	.L798
-.L802:
+	bne	.L859
+	b	.L857
+.L861:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L803
-	b	.L801
-.L791:
-	mov	w2, 0
-	mov	w1, 1
-	mov	w0, w19
-	bl	gc_add_sblk
-	b	.L801
+	bne	.L862
+	b	.L860
 	.size	gc_free_src_blk, .-gc_free_src_blk
 	.section	.text.ftl_erase_phy_blk,"ax",@progbits
 	.align	2
@@ -4533,29 +4908,29 @@ ftl_erase_phy_blk:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	mov	w21, w1
-	adrp	x1, .LANCHOR96
+	adrp	x1, .LANCHOR102
 	stp	x19, x20, [sp, 16]
 	mov	w19, 21
-	adrp	x22, .LANCHOR103
-	ldrh	w1, [x1, #:lo12:.LANCHOR96]
+	adrp	x22, .LANCHOR108
+	ldrh	w1, [x1, #:lo12:.LANCHOR102]
 	sub	w1, w19, w1
 	mov	w19, 1
 	lsl	w19, w19, w1
 	sub	w19, w19, #1
 	and	w19, w19, w0
 	asr	w20, w0, w1
-	adrp	x0, .LANCHOR102
+	adrp	x0, .LANCHOR107
 	sxth	w19, w19
-	ldrb	w0, [x0, #:lo12:.LANCHOR102]
-	cbz	w0, .L828
-	ldrh	w2, [x22, #:lo12:.LANCHOR103]
+	ldrb	w0, [x0, #:lo12:.LANCHOR107]
+	cbz	w0, .L887
+	ldrh	w2, [x22, #:lo12:.LANCHOR108]
 	cmp	w21, 0
 	cset	w1, eq
 	mov	w0, w20
 	mul	w2, w2, w19
 	bl	flash_erase_block_en
-.L828:
-	ldrh	w2, [x22, #:lo12:.LANCHOR103]
+.L887:
+	ldrh	w2, [x22, #:lo12:.LANCHOR108]
 	mov	w1, w21
 	mov	w0, w20
 	ldp	x21, x22, [sp, 32]
@@ -4576,56 +4951,56 @@ ftl_erase_sblk:
 	stp	x25, x26, [sp, 64]
 	and	w26, w0, 65535
 	ldr	x0, [x23, #:lo12:.LANCHOR3]
-	adrp	x25, .LANCHOR104
+	adrp	x25, .LANCHOR109
 	stp	x21, x22, [sp, 32]
 	ubfiz	x22, x26, 2, 16
 	add	x0, x0, x22
 	stp	x27, x28, [sp, 80]
 	stp	x19, x20, [sp, 16]
-	adrp	x24, .LANCHOR95
+	adrp	x24, .LANCHOR101
 	mov	w20, w1
-	add	x25, x25, :lo12:.LANCHOR104
+	add	x25, x25, :lo12:.LANCHOR109
 	ldrb	w28, [x0, 3]
-	add	x24, x24, :lo12:.LANCHOR95
+	add	x24, x24, :lo12:.LANCHOR101
 	add	x27, x29, 112
 	mov	w19, 0
-.L834:
+.L893:
 	ldrb	w0, [x25]
 	cmp	w19, w0
-	bge	.L845
+	bge	.L904
 	ldrb	w1, [x24]
-	adrp	x0, .LANCHOR103
+	adrp	x0, .LANCHOR108
 	mov	w21, 0
-	ldrh	w3, [x0, #:lo12:.LANCHOR103]
+	ldrh	w3, [x0, #:lo12:.LANCHOR108]
 	sub	w4, w1, #1
 	mov	w0, 0
 	mul	w6, w19, w1
 	mul	w5, w26, w1
-	b	.L846
-.L836:
+	b	.L905
+.L895:
 	add	w2, w0, w6
 	asr	w2, w28, w2
-	tbnz	x2, 0, .L835
+	tbnz	x2, 0, .L894
 	and	w2, w0, w4
 	add	w2, w2, w5
 	mul	w2, w2, w3
 	str	w2, [x27, w21, sxtw 2]
 	add	w21, w21, 1
-.L835:
+.L894:
 	add	w0, w0, 1
-.L846:
+.L905:
 	cmp	w0, w1
-	blt	.L836
+	blt	.L895
 	cmp	w1, 4
-	bne	.L837
+	bne	.L896
 	mov	x3, 0
-.L838:
+.L897:
 	cmp	w21, w3
-	bgt	.L839
-.L840:
+	bgt	.L898
+.L899:
 	add	w19, w19, 1
-	b	.L834
-.L839:
+	b	.L893
+.L898:
 	ldr	w2, [x27, x3, lsl 2]
 	mov	w1, w20
 	str	x3, [x29, 104]
@@ -4633,59 +5008,59 @@ ftl_erase_sblk:
 	bl	flash_erase_block_en
 	ldr	x3, [x29, 104]
 	add	x3, x3, 1
-	b	.L838
-.L837:
+	b	.L897
+.L896:
 	cmp	w21, 2
-	bne	.L841
-	adrp	x0, .LANCHOR102
-	ldrb	w0, [x0, #:lo12:.LANCHOR102]
-	cbz	w0, .L842
+	bne	.L900
+	adrp	x0, .LANCHOR107
+	ldrb	w0, [x0, #:lo12:.LANCHOR107]
+	cbz	w0, .L901
 	ldp	w2, w3, [x29, 112]
 	cmp	w20, 0
 	cset	w1, eq
 	mov	w0, w19
 	bl	flash_erase_duplane_block
-.L842:
+.L901:
 	ldp	w2, w3, [x29, 112]
 	mov	w1, w20
 	mov	w0, w19
 	bl	flash_erase_duplane_block
-	b	.L840
-.L841:
+	b	.L899
+.L900:
 	cmp	w21, 1
-	bne	.L840
-	adrp	x0, .LANCHOR102
-	ldrb	w0, [x0, #:lo12:.LANCHOR102]
-	cbz	w0, .L844
+	bne	.L899
+	adrp	x0, .LANCHOR107
+	ldrb	w0, [x0, #:lo12:.LANCHOR107]
+	cbz	w0, .L903
 	ldr	w2, [x29, 112]
 	cmp	w20, 0
 	cset	w1, eq
 	mov	w0, w19
 	bl	flash_erase_block_en
-.L844:
+.L903:
 	ldr	w2, [x29, 112]
 	mov	w1, w20
 	mov	w0, w19
 	bl	flash_erase_block_en
-	b	.L840
-.L845:
-	adrp	x2, .LANCHOR97
+	b	.L899
+.L904:
+	adrp	x2, .LANCHOR100
 	ldr	x3, [x23, #:lo12:.LANCHOR3]
-	cbnz	w20, .L847
+	cbnz	w20, .L906
 	ldrh	w1, [x3, x22]
 	add	w0, w1, 1
 	and	w0, w0, 2047
 	bfi	w1, w0, 0, 11
 	strh	w1, [x3, x22]
-	ldr	x1, [x2, #:lo12:.LANCHOR97]
+	ldr	x1, [x2, #:lo12:.LANCHOR100]
 	ldr	w2, [x1, 84]
 	add	w2, w2, 1
 	str	w2, [x1, 84]
 	ldrh	w2, [x1, 96]
 	cmp	w2, w0
-	bge	.L849
+	bge	.L908
 	strh	w0, [x1, 96]
-.L849:
+.L908:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -4694,7 +5069,7 @@ ftl_erase_sblk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L847:
+.L906:
 	ldr	w1, [x3, x22]
 	ubfx	x0, x1, 11, 8
 	add	w0, w0, 1
@@ -4702,15 +5077,15 @@ ftl_erase_sblk:
 	bfi	w1, w0, 11, 8
 	str	w1, [x3, x22]
 	and	w0, w0, 65535
-	ldr	x1, [x2, #:lo12:.LANCHOR97]
+	ldr	x1, [x2, #:lo12:.LANCHOR100]
 	ldr	w2, [x1, 80]
 	add	w2, w2, 1
 	str	w2, [x1, 80]
 	ldrh	w2, [x1, 98]
 	cmp	w2, w0
-	bcs	.L849
+	bcs	.L908
 	strh	w0, [x1, 98]
-	b	.L849
+	b	.L908
 	.size	ftl_erase_sblk, .-ftl_erase_sblk
 	.section	.text.ftl_alloc_sys_blk,"ax",@progbits
 	.align	2
@@ -4718,44 +5093,44 @@ ftl_erase_sblk:
 	.type	ftl_alloc_sys_blk, %function
 ftl_alloc_sys_blk:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR97
+	adrp	x0, .LANCHOR100
 	add	x29, sp, 0
-	ldr	x1, [x0, #:lo12:.LANCHOR97]
+	ldr	x1, [x0, #:lo12:.LANCHOR100]
 	ldrh	w2, [x1, 136]
 	str	x19, [sp, 16]
 	mov	x19, x0
 	cmp	w2, 63
-	bls	.L859
+	bls	.L918
 	strh	wzr, [x1, 136]
-.L859:
+.L918:
 	ldrh	w0, [x1, 112]
-	cbnz	w0, .L860
-	adrp	x1, .LANCHOR105
+	cbnz	w0, .L919
+	adrp	x1, .LANCHOR110
 	adrp	x0, .LC0
-	mov	w2, 1012
-	add	x1, x1, :lo12:.LANCHOR105
+	mov	w2, 1118
+	add	x1, x1, :lo12:.LANCHOR110
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L860:
-	ldr	x1, [x19, #:lo12:.LANCHOR97]
+.L919:
+	ldr	x1, [x19, #:lo12:.LANCHOR100]
 	mov	w5, 65535
-.L863:
+.L922:
 	ldrh	w2, [x1, 136]
-.L861:
+.L920:
 	mov	w3, w2
 	cmp	w2, 63
-	ble	.L862
+	ble	.L921
 	strh	wzr, [x1, 136]
-	b	.L863
-.L862:
+	b	.L922
+.L921:
 	add	x4, x2, 1
 	add	x0, x1, x4, lsl 1
 	ldrh	w0, [x0, 158]
 	cmp	w0, w5
-	bne	.L866
+	bne	.L925
 	mov	x2, x4
-	b	.L861
-.L866:
+	b	.L920
+.L925:
 	add	x3, x1, x3, sxtw 1
 	mov	w4, -1
 	ldr	x19, [sp, 16]
@@ -4776,40 +5151,40 @@ ftl_free_sys_blk:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 65535
-	adrp	x0, .LANCHOR97
+	adrp	x0, .LANCHOR100
 	mov	x19, x0
-	ldr	x1, [x0, #:lo12:.LANCHOR97]
+	ldr	x1, [x0, #:lo12:.LANCHOR100]
 	ldrh	w2, [x1, 138]
 	cmp	w2, 63
-	bls	.L869
+	bls	.L928
 	strh	wzr, [x1, 138]
-.L869:
+.L928:
 	ldrh	w0, [x1, 112]
 	cmp	w0, 63
-	bls	.L870
-	adrp	x1, .LANCHOR106
+	bls	.L929
+	adrp	x1, .LANCHOR111
 	adrp	x0, .LC0
-	mov	w2, 1036
-	add	x1, x1, :lo12:.LANCHOR106
+	mov	w2, 1142
+	add	x1, x1, :lo12:.LANCHOR111
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L870:
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+.L929:
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	mov	w4, 65535
-.L873:
+.L932:
 	ldrh	w1, [x0, 138]
-.L871:
+.L930:
 	mov	w2, w1
 	cmp	w1, 63
-	ble	.L872
+	ble	.L931
 	strh	wzr, [x0, 138]
-	b	.L873
-.L872:
+	b	.L932
+.L931:
 	add	x3, x1, 1
 	add	x5, x0, x3, lsl 1
 	ldrh	w5, [x5, 158]
 	cmp	w5, w4
-	bne	.L874
+	bne	.L933
 	add	x2, x0, x2, sxtw 1
 	strh	w20, [x2, 160]
 	strh	w1, [x0, 138]
@@ -4819,9 +5194,9 @@ ftl_free_sys_blk:
 	strh	w1, [x0, 112]
 	ldp	x29, x30, [sp], 32
 	ret
-.L874:
+.L933:
 	mov	x1, x3
-	b	.L871
+	b	.L930
 	.size	ftl_free_sys_blk, .-ftl_free_sys_blk
 	.section	.text.ftl_info_data_recovery,"ax",@progbits
 	.align	2
@@ -4831,7 +5206,7 @@ ftl_info_data_recovery:
 	ldrh	w2, [x0]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L887
+	beq	.L946
 	stp	x29, x30, [sp, -48]!
 	adrp	x1, .LANCHOR3
 	add	x29, sp, 0
@@ -4842,25 +5217,25 @@ ftl_info_data_recovery:
 	add	x21, x20, x19
 	ldrb	w1, [x21, 2]
 	tst	w1, 224
-	bne	.L877
+	bne	.L936
 	ldrb	w0, [x0, 4]
 	bfi	w1, w0, 5, 3
 	strb	w1, [x21, 2]
 	mov	w0, w2
 	bl	zftl_remove_free_node
 	ldrb	w0, [x21, 2]
-	adrp	x1, .LANCHOR97
-	ldr	x3, [x1, #:lo12:.LANCHOR97]
-	tbz	x0, 3, .L881
+	adrp	x1, .LANCHOR100
+	ldr	x3, [x1, #:lo12:.LANCHOR100]
+	tbz	x0, 3, .L940
 	ldrh	w2, [x3, 116]
 	sub	w2, w2, #1
 	strh	w2, [x3, 116]
-.L882:
+.L941:
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L884
+	bne	.L943
 	ldr	w0, [x20, x19]
-	ldr	x1, [x1, #:lo12:.LANCHOR97]
+	ldr	x1, [x1, #:lo12:.LANCHOR100]
 	ubfx	x2, x0, 11, 8
 	add	w2, w2, 1
 	bfi	w0, w2, 11, 8
@@ -4868,44 +5243,44 @@ ftl_info_data_recovery:
 	ldrh	w0, [x1, 120]
 	sub	w0, w0, #1
 	strh	w0, [x1, 120]
-.L877:
+.L936:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L881:
+.L940:
 	tst	w0, 24
-	bne	.L883
+	bne	.L942
 	ldrh	w2, [x3, 114]
 	sub	w2, w2, #1
 	strh	w2, [x3, 114]
-	b	.L882
-.L883:
+	b	.L941
+.L942:
 	ldrh	w2, [x3, 118]
 	sub	w2, w2, #1
 	strh	w2, [x3, 118]
-	b	.L882
-.L884:
+	b	.L941
+.L943:
 	ldrh	w2, [x20, x19]
 	cmp	w0, 64
 	add	w3, w2, 1
 	bfi	w2, w3, 0, 11
 	strh	w2, [x20, x19]
-	bne	.L885
-	ldr	x1, [x1, #:lo12:.LANCHOR97]
+	bne	.L944
+	ldr	x1, [x1, #:lo12:.LANCHOR100]
 	ldrh	w0, [x1, 122]
 	sub	w0, w0, #1
 	strh	w0, [x1, 122]
-	b	.L877
-.L885:
+	b	.L936
+.L944:
 	cmp	w0, 96
-	bne	.L877
-	ldr	x1, [x1, #:lo12:.LANCHOR97]
+	bne	.L936
+	ldr	x1, [x1, #:lo12:.LANCHOR100]
 	ldrh	w0, [x1, 124]
 	sub	w0, w0, #1
 	strh	w0, [x1, 124]
-	b	.L877
-.L887:
+	b	.L936
+.L946:
 	ret
 	.size	ftl_info_data_recovery, .-ftl_info_data_recovery
 	.section	.text.ftl_get_ppa_from_index,"ax",@progbits
@@ -4914,20 +5289,20 @@ ftl_info_data_recovery:
 	.type	ftl_get_ppa_from_index, %function
 ftl_get_ppa_from_index:
 	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LANCHOR5
-	adrp	x3, .LANCHOR72
+	adrp	x1, .LANCHOR6
+	adrp	x3, .LANCHOR76
 	and	w0, w0, 65535
 	add	x29, sp, 0
-	ldr	x2, [x1, #:lo12:.LANCHOR5]
-	adrp	x1, .LANCHOR80
-	ldrb	w3, [x3, #:lo12:.LANCHOR72]
-	ldrh	w1, [x1, #:lo12:.LANCHOR80]
+	ldr	x2, [x1, #:lo12:.LANCHOR6]
+	adrp	x1, .LANCHOR83
+	ldrb	w3, [x3, #:lo12:.LANCHOR76]
+	ldrh	w1, [x1, #:lo12:.LANCHOR83]
 	stp	x19, x20, [sp, 16]
 	mul	w1, w1, w3
 	cmp	w0, w1
-	bge	.L891
+	bge	.L950
 	add	x2, x2, 16
-.L892:
+.L951:
 	ldrb	w1, [x2, 9]
 	sdiv	w19, w0, w1
 	msub	w0, w19, w1, w0
@@ -4935,25 +5310,25 @@ ftl_get_ppa_from_index:
 	ldrh	w20, [x0, 16]
 	mov	w0, 65535
 	cmp	w20, w0
-	bne	.L893
-	adrp	x1, .LANCHOR107
+	bne	.L952
+	adrp	x1, .LANCHOR112
 	adrp	x0, .LC0
-	mov	w2, 1421
-	add	x1, x1, :lo12:.LANCHOR107
+	mov	w2, 1529
+	add	x1, x1, :lo12:.LANCHOR112
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L893:
-	adrp	x0, .LANCHOR103
-	ldrh	w0, [x0, #:lo12:.LANCHOR103]
+.L952:
+	adrp	x0, .LANCHOR108
+	ldrh	w0, [x0, #:lo12:.LANCHOR108]
 	madd	w0, w0, w20, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L891:
+.L950:
 	sub	w0, w0, w1
 	add	x2, x2, 48
 	and	w0, w0, 65535
-	b	.L892
+	b	.L951
 	.size	ftl_get_ppa_from_index, .-ftl_get_ppa_from_index
 	.section	.text.lpa_hash_get_ppa,"ax",@progbits
 	.align	2
@@ -4961,29 +5336,29 @@ ftl_get_ppa_from_index:
 	.type	lpa_hash_get_ppa, %function
 lpa_hash_get_ppa:
 	and	x2, x0, 255
-	adrp	x1, .LANCHOR108
-	add	x1, x1, :lo12:.LANCHOR108
+	adrp	x1, .LANCHOR113
+	add	x1, x1, :lo12:.LANCHOR113
 	mov	w3, 65535
 	ldrh	w1, [x1, x2, lsl 1]
-	adrp	x2, .LANCHOR109
-	ldr	x4, [x2, #:lo12:.LANCHOR109]
-	adrp	x2, .LANCHOR110
-	ldr	x5, [x2, #:lo12:.LANCHOR110]
-.L896:
+	adrp	x2, .LANCHOR114
+	ldr	x4, [x2, #:lo12:.LANCHOR114]
+	adrp	x2, .LANCHOR115
+	ldr	x5, [x2, #:lo12:.LANCHOR115]
+.L955:
 	cmp	w1, w3
-	bne	.L898
+	bne	.L957
 	mov	w0, -1
 	ret
-.L898:
+.L957:
 	uxtw	x2, w1
 	ldr	w6, [x4, x2, lsl 2]
 	cmp	w0, w6
-	bne	.L897
+	bne	.L956
 	mov	w0, w1
 	b	ftl_get_ppa_from_index
-.L897:
+.L956:
 	ldrh	w1, [x5, x2, lsl 1]
-	b	.L896
+	b	.L955
 	.size	lpa_hash_get_ppa, .-lpa_hash_get_ppa
 	.section	.text.ftl_get_new_free_page,"ax",@progbits
 	.align	2
@@ -4997,50 +5372,50 @@ ftl_get_new_free_page:
 	mov	x19, x0
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L900
-	adrp	x1, .LANCHOR111
+	bne	.L959
+	adrp	x1, .LANCHOR116
 	adrp	x0, .LC0
-	mov	w2, 1536
-	add	x1, x1, :lo12:.LANCHOR111
+	mov	w2, 1644
+	add	x1, x1, :lo12:.LANCHOR116
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L900:
-	adrp	x0, .LANCHOR80
+.L959:
+	adrp	x0, .LANCHOR83
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
 	cmp	w1, w0
-	bne	.L901
-	adrp	x1, .LANCHOR111
+	bne	.L960
+	adrp	x1, .LANCHOR116
 	adrp	x0, .LC0
-	mov	w2, 1537
-	add	x1, x1, :lo12:.LANCHOR111
+	mov	w2, 1645
+	add	x1, x1, :lo12:.LANCHOR116
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L901:
+.L960:
 	ldrh	w0, [x19, 6]
-	cbnz	w0, .L902
-	adrp	x1, .LANCHOR111
+	cbnz	w0, .L961
+	adrp	x1, .LANCHOR116
 	adrp	x0, .LC0
-	mov	w2, 1538
-	add	x1, x1, :lo12:.LANCHOR111
+	mov	w2, 1646
+	add	x1, x1, :lo12:.LANCHOR116
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L902:
+.L961:
 	ldrb	w0, [x19, 5]
 	mov	w2, 65535
 	add	x0, x0, 8
 	ldrh	w3, [x19, x0, lsl 1]
-	adrp	x0, .LANCHOR72
-	ldrb	w4, [x0, #:lo12:.LANCHOR72]
-.L903:
+	adrp	x0, .LANCHOR76
+	ldrb	w4, [x0, #:lo12:.LANCHOR76]
+.L962:
 	cmp	w3, w2
 	ldrb	w1, [x19, 5]
-	beq	.L905
-	adrp	x0, .LANCHOR103
+	beq	.L964
+	adrp	x0, .LANCHOR108
 	add	w1, w1, 1
 	and	w1, w1, 255
 	ldrh	w2, [x19, 2]
-	ldrh	w0, [x0, #:lo12:.LANCHOR103]
+	ldrh	w0, [x0, #:lo12:.LANCHOR108]
 	cmp	w4, w1
 	strb	w1, [x19, 5]
 	mul	w0, w0, w3
@@ -5051,29 +5426,29 @@ ftl_get_new_free_page:
 	orr	w0, w0, w2
 	add	w3, w3, 1
 	strh	w3, [x19, 10]
-	bne	.L899
+	bne	.L958
 	add	w2, w2, 1
 	strb	wzr, [x19, 5]
 	strh	w2, [x19, 2]
-.L899:
+.L958:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L905:
+.L964:
 	add	w1, w1, 1
 	and	w1, w1, 255
 	strb	w1, [x19, 5]
 	cmp	w1, w4
-	bne	.L904
+	bne	.L963
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 5]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L904:
+.L963:
 	ldrb	w0, [x19, 5]
 	add	x0, x0, 8
 	ldrh	w3, [x19, x0, lsl 1]
-	b	.L903
+	b	.L962
 	.size	ftl_get_new_free_page, .-ftl_get_new_free_page
 	.section	.text.ftl_ext_alloc_new_blk,"ax",@progbits
 	.align	2
@@ -5089,22 +5464,22 @@ ftl_ext_alloc_new_blk:
 	mov	w19, w0
 	sub	w0, w0, #1
 	cmp	w1, w0, uxth
-	bcs	.L909
-	adrp	x1, .LANCHOR112
+	bcs	.L968
+	adrp	x1, .LANCHOR117
 	adrp	x0, .LC0
-	mov	w2, 1569
-	add	x1, x1, :lo12:.LANCHOR112
+	mov	w2, 1677
+	add	x1, x1, :lo12:.LANCHOR117
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L909:
-	adrp	x20, .LANCHOR97
+.L968:
+	adrp	x20, .LANCHOR100
 	mov	w1, 0
 	mov	w0, w19
 	bl	ftl_erase_phy_blk
-	ldr	x0, [x20, #:lo12:.LANCHOR97]
+	ldr	x0, [x20, #:lo12:.LANCHOR100]
 	ldrh	w0, [x0, 130]
 	bl	ftl_free_sys_blk
-	ldr	x0, [x20, #:lo12:.LANCHOR97]
+	ldr	x0, [x20, #:lo12:.LANCHOR100]
 	strh	w19, [x0, 130]
 	strh	wzr, [x0, 140]
 	mov	w0, 0
@@ -5117,58 +5492,58 @@ ftl_ext_alloc_new_blk:
 	.global	ftl_total_vpn_update
 	.type	ftl_total_vpn_update, %function
 ftl_total_vpn_update:
-	adrp	x2, .LANCHOR113
+	adrp	x2, .LANCHOR118
 	mov	x3, x2
-	ldrh	w1, [x2, #:lo12:.LANCHOR113]
+	ldrh	w1, [x2, #:lo12:.LANCHOR118]
 	cmp	w1, 4
-	bhi	.L912
-	cbnz	w0, .L912
+	bhi	.L971
+	cbnz	w0, .L971
 	add	w1, w1, 1
-	strh	w1, [x2, #:lo12:.LANCHOR113]
+	strh	w1, [x2, #:lo12:.LANCHOR118]
 	ret
-.L912:
+.L971:
 	adrp	x0, .LANCHOR2
-	strh	wzr, [x3, #:lo12:.LANCHOR113]
+	strh	wzr, [x3, #:lo12:.LANCHOR118]
 	mov	x1, 0
 	mov	w2, 0
 	ldrh	w5, [x0, #:lo12:.LANCHOR2]
-	adrp	x0, .LANCHOR4
+	adrp	x0, .LANCHOR5
 	mov	w8, 65535
-	ldr	x6, [x0, #:lo12:.LANCHOR4]
+	ldr	x6, [x0, #:lo12:.LANCHOR5]
 	adrp	x0, .LANCHOR3
 	ldr	x7, [x0, #:lo12:.LANCHOR3]
 	mov	w0, 0
-.L914:
+.L973:
 	cmp	w5, w1, uxth
-	bhi	.L917
-	adrp	x1, .LANCHOR5
-	ldr	x1, [x1, #:lo12:.LANCHOR5]
+	bhi	.L976
+	adrp	x1, .LANCHOR6
+	ldr	x1, [x1, #:lo12:.LANCHOR6]
 	str	w2, [x1, 524]
-	adrp	x2, .LANCHOR97
+	adrp	x2, .LANCHOR100
 	str	w0, [x1, 528]
-	ldr	x2, [x2, #:lo12:.LANCHOR97]
+	ldr	x2, [x2, #:lo12:.LANCHOR100]
 	ldrh	w2, [x2, 120]
-	cbz	w2, .L911
+	cbz	w2, .L970
 	udiv	w0, w0, w2
 	str	w0, [x1, 532]
-.L911:
+.L970:
 	ret
-.L917:
+.L976:
 	ldrh	w3, [x6, x1, lsl 1]
 	cmp	w3, w8
-	beq	.L915
+	beq	.L974
 	add	x4, x7, x1, lsl 2
 	ldrb	w4, [x4, 2]
 	and	w4, w4, 224
 	cmp	w4, 160
-	bne	.L916
+	bne	.L975
 	add	w0, w0, w3
-.L915:
+.L974:
 	add	x1, x1, 1
-	b	.L914
-.L916:
+	b	.L973
+.L975:
 	add	w2, w2, w3
-	b	.L915
+	b	.L974
 	.size	ftl_total_vpn_update, .-ftl_total_vpn_update
 	.section	.text.ftl_debug_info_fill,"ax",@progbits
 	.align	2
@@ -5189,15 +5564,21 @@ ftl_vpn_update:
 	and	w19, w0, 65535
 	mov	w0, w19
 	bl	zftl_list_update_data_list
-	adrp	x0, .LANCHOR4
+	adrp	x0, .LANCHOR5
 	ubfiz	x19, x19, 1, 16
-	ldr	x0, [x0, #:lo12:.LANCHOR4]
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	ldrh	w0, [x0, x19]
+	cbnz	w0, .L984
+	adrp	x1, .LANCHOR119
+	mov	w0, 1
+	str	w0, [x1, #:lo12:.LANCHOR119]
+.L982:
 	ldr	x19, [sp, 16]
-	cmp	w0, 0
-	cset	w0, eq
 	ldp	x29, x30, [sp], 32
 	ret
+.L984:
+	mov	w0, 0
+	b	.L982
 	.size	ftl_vpn_update, .-ftl_vpn_update
 	.section	.text.ftl_vpn_decrement,"ax",@progbits
 	.align	2
@@ -5210,39 +5591,51 @@ ftl_vpn_decrement:
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L926
-	adrp	x0, .LANCHOR4
+	beq	.L987
+	adrp	x0, .LANCHOR5
 	ubfiz	x1, x19, 1, 16
-	ldr	x2, [x0, #:lo12:.LANCHOR4]
+	ldr	x2, [x0, #:lo12:.LANCHOR5]
 	ldrh	w0, [x2, x1]
-	cbnz	w0, .L927
-	adrp	x0, .LC53
+	cbnz	w0, .L988
+	adrp	x0, .LC59
 	mov	w2, 0
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC53
+	add	x0, x0, :lo12:.LC59
 	bl	printf
-.L930:
+.L993:
 	mov	w0, 0
-	b	.L925
-.L927:
+	b	.L986
+.L988:
 	sub	w0, w0, #1
 	strh	w0, [x2, x1]
-.L926:
-	adrp	x20, .LANCHOR114
-	ldrh	w0, [x20, #:lo12:.LANCHOR114]
+.L987:
+	adrp	x20, .LANCHOR66
+	ldrh	w0, [x20, #:lo12:.LANCHOR66]
 	cmp	w19, w0
-	beq	.L930
+	beq	.L993
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L929
-	strh	w19, [x20, #:lo12:.LANCHOR114]
-	b	.L930
-.L929:
+	bne	.L990
+	strh	w19, [x20, #:lo12:.LANCHOR66]
+	b	.L993
+.L990:
 	bl	ftl_vpn_update
 	cmp	w0, 0
+	adrp	x1, .LANCHOR120
 	cset	w0, ne
-	strh	w19, [x20, #:lo12:.LANCHOR114]
-.L925:
+	ldrh	w3, [x20, #:lo12:.LANCHOR66]
+	ldrh	w2, [x1, #:lo12:.LANCHOR120]
+	strh	w19, [x20, #:lo12:.LANCHOR66]
+	add	w2, w2, 1
+	and	w2, w2, 65535
+	cmp	w2, 7
+	csel	w2, w2, wzr, ls
+	strh	w2, [x1, #:lo12:.LANCHOR120]
+	and	x2, x2, 65535
+	adrp	x1, .LANCHOR67
+	add	x1, x1, :lo12:.LANCHOR67
+	strh	w3, [x1, x2, lsl 1]
+.L986:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -5252,50 +5645,50 @@ ftl_vpn_decrement:
 	.global	lpa_hash_update_ppa
 	.type	lpa_hash_update_ppa, %function
 lpa_hash_update_ppa:
-	adrp	x3, .LANCHOR108
+	adrp	x3, .LANCHOR113
 	and	x5, x0, 255
-	add	x4, x3, :lo12:.LANCHOR108
+	add	x4, x3, :lo12:.LANCHOR113
 	mov	w7, 65535
 	and	w2, w2, 65535
 	mov	w12, w7
 	ldrh	w6, [x4, x5, lsl 1]
-	adrp	x4, .LANCHOR109
-	ldr	x8, [x4, #:lo12:.LANCHOR109]
-	adrp	x4, .LANCHOR110
-	ldr	x4, [x4, #:lo12:.LANCHOR110]
-.L933:
+	adrp	x4, .LANCHOR114
+	ldr	x8, [x4, #:lo12:.LANCHOR114]
+	adrp	x4, .LANCHOR115
+	ldr	x4, [x4, #:lo12:.LANCHOR115]
+.L996:
 	cmp	w6, w12
-	beq	.L937
+	beq	.L1000
 	uxtw	x11, w6
 	lsl	x10, x11, 2
 	add	x13, x8, x10
 	ldr	w10, [x8, x10]
 	cmp	w0, w10
 	lsl	x10, x11, 1
-	bne	.L934
+	bne	.L997
 	mov	w6, -1
 	str	w6, [x13]
 	cmp	w7, w12
-	bne	.L935
-	add	x6, x3, :lo12:.LANCHOR108
+	bne	.L998
+	add	x6, x3, :lo12:.LANCHOR113
 	ldrh	w7, [x4, x10]
 	strh	w7, [x6, x5, lsl 1]
-.L936:
+.L999:
 	mov	w6, -1
 	strh	w6, [x4, x11, lsl 1]
-.L937:
+.L1000:
 	uxtw	x6, w2
-	add	x3, x3, :lo12:.LANCHOR108
+	add	x3, x3, :lo12:.LANCHOR113
 	cmn	w1, #1
 	str	w0, [x8, x6, lsl 2]
 	ldrh	w0, [x3, x5, lsl 1]
 	strh	w2, [x3, x5, lsl 1]
 	strh	w0, [x4, x6, lsl 1]
-	beq	.L944
+	beq	.L1007
 	stp	x29, x30, [sp, -16]!
-	adrp	x0, .LANCHOR96
+	adrp	x0, .LANCHOR102
 	add	x29, sp, 0
-	ldrh	w3, [x0, #:lo12:.LANCHOR96]
+	ldrh	w3, [x0, #:lo12:.LANCHOR102]
 	mov	w0, 21
 	sub	w2, w0, w3
 	mov	w0, 1
@@ -5303,22 +5696,22 @@ lpa_hash_update_ppa:
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
 	and	w1, w0, w1
-	adrp	x0, .LANCHOR95
-	ldrb	w0, [x0, #:lo12:.LANCHOR95]
+	adrp	x0, .LANCHOR101
+	ldrb	w0, [x0, #:lo12:.LANCHOR101]
 	udiv	w0, w1, w0
 	bl	ftl_vpn_decrement
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
-.L935:
+.L998:
 	ldrh	w6, [x4, x10]
 	strh	w6, [x4, w7, uxtw 1]
-	b	.L936
-.L934:
+	b	.L999
+.L997:
 	mov	w7, w6
 	ldrh	w6, [x4, x10]
-	b	.L933
-.L944:
+	b	.L996
+.L1007:
 	mov	w0, -1
 	ret
 	.size	lpa_hash_update_ppa, .-lpa_hash_update_ppa
@@ -5328,10 +5721,10 @@ lpa_hash_update_ppa:
 	.type	ftl_mask_bad_block, %function
 ftl_mask_bad_block:
 	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LANCHOR96
+	adrp	x1, .LANCHOR102
 	mov	w2, 21
 	add	x29, sp, 0
-	ldrh	w3, [x1, #:lo12:.LANCHOR96]
+	ldrh	w3, [x1, #:lo12:.LANCHOR102]
 	stp	x19, x20, [sp, 16]
 	ubfx	x20, x0, 21, 3
 	sub	w1, w2, w3
@@ -5340,23 +5733,23 @@ ftl_mask_bad_block:
 	lsl	w2, w2, w1
 	sub	w2, w2, #1
 	and	w2, w2, w0
-	adrp	x0, .LANCHOR95
-	ldrb	w0, [x0, #:lo12:.LANCHOR95]
+	adrp	x0, .LANCHOR101
+	ldrb	w0, [x0, #:lo12:.LANCHOR101]
 	udiv	w2, w2, w0
-	adrp	x0, .LANCHOR7
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
 	and	w19, w2, 65535
-	tbz	x0, 14, .L948
-	adrp	x0, .LC54
+	tbz	x0, 14, .L1011
+	adrp	x0, .LC60
 	mov	w2, w19
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC54
+	add	x0, x0, :lo12:.LC60
 	bl	printf
-.L948:
+.L1011:
 	adrp	x0, .LANCHOR2
 	ldrh	w0, [x0, #:lo12:.LANCHOR2]
 	cmp	w0, w19
-	bls	.L947
+	bls	.L1010
 	adrp	x0, .LANCHOR3
 	mov	w1, 1
 	lsl	w1, w1, w20
@@ -5365,7 +5758,7 @@ ftl_mask_bad_block:
 	ldrb	w0, [x19, 3]
 	orr	w1, w1, w0
 	strb	w1, [x19, 3]
-.L947:
+.L1010:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -5376,52 +5769,52 @@ ftl_mask_bad_block:
 	.type	print_ftl_debug_info, %function
 print_ftl_debug_info:
 	sub	sp, sp, #64
-	adrp	x1, .LANCHOR86
-	adrp	x0, .LANCHOR5
-	adrp	x7, .LANCHOR54
+	adrp	x1, .LANCHOR90
+	adrp	x0, .LANCHOR6
+	adrp	x7, .LANCHOR56
 	stp	x29, x30, [sp, 32]
 	add	x29, sp, 32
-	ldrh	w6, [x1, #:lo12:.LANCHOR86]
-	adrp	x1, .LANCHOR82
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
-	ldr	w7, [x7, #:lo12:.LANCHOR54]
-	ldrh	w5, [x1, #:lo12:.LANCHOR82]
-	adrp	x1, .LANCHOR84
+	ldrh	w6, [x1, #:lo12:.LANCHOR90]
+	adrp	x1, .LANCHOR86
+	ldr	x0, [x0, #:lo12:.LANCHOR6]
+	ldr	w7, [x7, #:lo12:.LANCHOR56]
+	ldrh	w5, [x1, #:lo12:.LANCHOR86]
+	adrp	x1, .LANCHOR88
 	str	w7, [sp, 8]
-	ldrh	w4, [x1, #:lo12:.LANCHOR84]
-	adrp	x1, .LANCHOR93
+	ldrh	w4, [x1, #:lo12:.LANCHOR88]
+	adrp	x1, .LANCHOR97
 	ldr	w7, [x0, 528]
-	ldrh	w3, [x1, #:lo12:.LANCHOR93]
-	adrp	x1, .LANCHOR91
+	ldrh	w3, [x1, #:lo12:.LANCHOR97]
+	adrp	x1, .LANCHOR95
 	str	w7, [sp]
-	ldrh	w2, [x1, #:lo12:.LANCHOR91]
-	adrp	x1, .LANCHOR89
+	ldrh	w2, [x1, #:lo12:.LANCHOR95]
+	adrp	x1, .LANCHOR93
 	ldr	w7, [x0, 524]
-	adrp	x0, .LC55
-	ldrh	w1, [x1, #:lo12:.LANCHOR89]
-	add	x0, x0, :lo12:.LC55
+	adrp	x0, .LC61
+	ldrh	w1, [x1, #:lo12:.LANCHOR93]
+	add	x0, x0, :lo12:.LC61
 	str	x19, [sp, 48]
-	adrp	x19, .LANCHOR97
+	adrp	x19, .LANCHOR100
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	adrp	x1, .LANCHOR115
-	ldrb	w3, [x1, #:lo12:.LANCHOR115]
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	adrp	x1, .LANCHOR121
+	ldrb	w3, [x1, #:lo12:.LANCHOR121]
 	ldr	w4, [x0, 8]
 	ldr	w5, [x0, 64]
 	ldr	w1, [x0, 20]
 	ldr	w2, [x0, 28]
-	adrp	x0, .LC56
-	add	x0, x0, :lo12:.LC56
+	adrp	x0, .LC62
+	add	x0, x0, :lo12:.LC62
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	ldr	w1, [x0, 52]
 	ldr	w2, [x0, 60]
 	ldr	w3, [x0, 16]
-	adrp	x0, .LC57
-	add	x0, x0, :lo12:.LC57
+	adrp	x0, .LC63
+	add	x0, x0, :lo12:.LC63
 	lsr	w3, w3, 11
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	ldrh	w2, [x0, 98]
 	ldrh	w6, [x0, 72]
 	ldrh	w5, [x0, 96]
@@ -5434,24 +5827,24 @@ print_ftl_debug_info:
 	ldrh	w2, [x0, 90]
 	str	w2, [sp]
 	ldp	w7, w2, [x0, 80]
-	adrp	x0, .LC58
-	add	x0, x0, :lo12:.LC58
+	adrp	x0, .LC64
+	add	x0, x0, :lo12:.LC64
 	bl	printf
 	ldr	x19, [sp, 48]
-	adrp	x0, .LANCHOR73
+	adrp	x0, .LANCHOR77
 	ldp	x29, x30, [sp, 32]
 	add	sp, sp, 64
-	ldrh	w5, [x0, #:lo12:.LANCHOR73]
-	adrp	x0, .LANCHOR79
-	ldrh	w4, [x0, #:lo12:.LANCHOR79]
-	adrp	x0, .LANCHOR62
-	ldrh	w3, [x0, #:lo12:.LANCHOR62]
-	adrp	x0, .LANCHOR88
-	ldrh	w2, [x0, #:lo12:.LANCHOR88]
-	adrp	x0, .LANCHOR85
-	ldrh	w1, [x0, #:lo12:.LANCHOR85]
-	adrp	x0, .LC59
-	add	x0, x0, :lo12:.LC59
+	ldrh	w5, [x0, #:lo12:.LANCHOR77]
+	adrp	x0, .LANCHOR82
+	ldrh	w4, [x0, #:lo12:.LANCHOR82]
+	adrp	x0, .LANCHOR64
+	ldrh	w3, [x0, #:lo12:.LANCHOR64]
+	adrp	x0, .LANCHOR92
+	ldrh	w2, [x0, #:lo12:.LANCHOR92]
+	adrp	x0, .LANCHOR89
+	ldrh	w1, [x0, #:lo12:.LANCHOR89]
+	adrp	x0, .LC65
+	add	x0, x0, :lo12:.LC65
 	b	printf
 	.size	print_ftl_debug_info, .-print_ftl_debug_info
 	.section	.text.ftl_write_buf,"ax",@progbits
@@ -5463,65 +5856,65 @@ ftl_write_buf:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	str	x21, [sp, 32]
-	cbnz	x0, .L957
-	adrp	x1, .LANCHOR116
-	add	x1, x1, :lo12:.LANCHOR116
-	mov	w2, 639
+	cbnz	x0, .L1020
+	adrp	x1, .LANCHOR122
+	add	x1, x1, :lo12:.LANCHOR122
+	mov	w2, 652
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	bl	print_ftl_debug_info
 	mov	w0, -1
-.L956:
+.L1019:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L960:
+.L1023:
 	mov	x1, x19
-	adrp	x0, .LANCHOR52
-	add	x0, x0, :lo12:.LANCHOR52
+	adrp	x0, .LANCHOR54
+	add	x0, x0, :lo12:.LANCHOR54
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR97
+	adrp	x1, .LANCHOR100
 	ldrb	w3, [x19, 56]
-	ldrb	w0, [x21, #:lo12:.LANCHOR53]
-	ldr	x1, [x1, #:lo12:.LANCHOR97]
+	ldrb	w0, [x21, #:lo12:.LANCHOR55]
+	ldr	x1, [x1, #:lo12:.LANCHOR100]
 	add	w0, w0, 1
 	and	w0, w0, 255
-	strb	w0, [x21, #:lo12:.LANCHOR53]
+	strb	w0, [x21, #:lo12:.LANCHOR55]
 	ldr	w2, [x1, 16]
 	add	w2, w2, w3
 	str	w2, [x1, 16]
 	ldr	w2, [x1, 32]
 	add	w2, w2, 1
 	str	w2, [x1, 32]
-	b	.L956
-.L957:
+	b	.L1019
+.L1020:
 	mov	x19, x0
-	adrp	x0, .LANCHOR117
+	adrp	x0, .LANCHOR123
 	mov	x20, x0
-	ldrb	w1, [x0, #:lo12:.LANCHOR117]
+	ldrb	w1, [x0, #:lo12:.LANCHOR123]
 	ldrb	w2, [x19, 56]
 	cmp	w2, w1
-	bls	.L962
-	adrp	x1, .LANCHOR116
+	bls	.L1025
+	adrp	x1, .LANCHOR122
 	adrp	x0, .LC0
-	mov	w2, 644
-	add	x1, x1, :lo12:.LANCHOR116
+	mov	w2, 657
+	add	x1, x1, :lo12:.LANCHOR122
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L962:
+.L1025:
 	ldrb	w0, [x19, 56]
-	adrp	x21, .LANCHOR53
-	cbz	w0, .L959
-	ldrb	w1, [x20, #:lo12:.LANCHOR117]
+	adrp	x21, .LANCHOR55
+	cbz	w0, .L1022
+	ldrb	w1, [x20, #:lo12:.LANCHOR123]
 	cmp	w1, w0
-	bcs	.L960
-.L959:
+	bcs	.L1023
+.L1022:
 	mov	x0, x19
 	bl	buf_free
-	ldrb	w0, [x21, #:lo12:.LANCHOR53]
-	b	.L956
+	ldrb	w0, [x21, #:lo12:.LANCHOR55]
+	b	.L1019
 	.size	ftl_write_buf, .-ftl_write_buf
 	.section	.text.ftl_write_completed,"ax",@progbits
 	.align	2
@@ -5531,26 +5924,26 @@ ftl_write_completed:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR118
+	adrp	x20, .LANCHOR124
 	stp	x21, x22, [sp, 32]
-	adrp	x19, .LANCHOR46
-	adrp	x22, .LANCHOR96
-	add	x20, x20, :lo12:.LANCHOR118
-	add	x19, x19, :lo12:.LANCHOR46
-	add	x22, x22, :lo12:.LANCHOR96
+	adrp	x19, .LANCHOR48
+	adrp	x22, .LANCHOR102
+	add	x20, x20, :lo12:.LANCHOR124
+	add	x19, x19, :lo12:.LANCHOR48
+	add	x22, x22, :lo12:.LANCHOR102
 	stp	x23, x24, [sp, 48]
 	str	x25, [sp, 64]
-.L968:
+.L1031:
 	ldrb	w0, [x20]
 	cmp	w0, 255
-	bne	.L974
+	bne	.L1037
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L974:
+.L1037:
 	ubfiz	x21, x0, 6, 8
 	sbfiz	x0, x0, 6, 32
 	add	x23, x19, x0
@@ -5559,7 +5952,7 @@ ftl_write_completed:
 	strb	w0, [x20]
 	ldr	w0, [x23, 52]
 	cmn	w0, #1
-	bne	.L969
+	bne	.L1032
 	ldp	w2, w3, [x23, 36]
 	mov	w1, 21
 	ldrh	w0, [x22]
@@ -5569,11 +5962,11 @@ ftl_write_completed:
 	lsl	w1, w25, w1
 	sub	w1, w1, #1
 	and	w1, w1, w0
-	adrp	x0, .LANCHOR95
-	ldrb	w0, [x0, #:lo12:.LANCHOR95]
+	adrp	x0, .LANCHOR101
+	ldrb	w0, [x0, #:lo12:.LANCHOR101]
 	udiv	w1, w1, w0
-	adrp	x0, .LC60
-	add	x0, x0, :lo12:.LC60
+	adrp	x0, .LC66
+	add	x0, x0, :lo12:.LC66
 	and	w24, w1, 65535
 	mov	w1, w24
 	bl	printf
@@ -5581,39 +5974,39 @@ ftl_write_completed:
 	mov	w2, 0
 	mov	w0, w24
 	bl	gc_add_sblk
-	adrp	x0, .LANCHOR5
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	adrp	x0, .LANCHOR6
+	ldr	x0, [x0, #:lo12:.LANCHOR6]
 	ldr	w1, [x0, 556]
 	add	w1, w1, w25
 	str	w1, [x0, 556]
 	ldrh	w1, [x0, 16]
 	cmp	w1, w24
-	bne	.L970
+	bne	.L1033
 	strh	wzr, [x0, 22]
-.L971:
+.L1034:
 	mov	x0, x21
 	bl	ftl_write_buf
-	b	.L968
-.L970:
+	b	.L1031
+.L1033:
 	ldrh	w1, [x0, 48]
 	cmp	w1, w24
-	bne	.L971
+	bne	.L1034
 	strh	wzr, [x0, 54]
-	b	.L971
-.L969:
+	b	.L1034
+.L1032:
 	ldrh	w2, [x23, 48]
 	ldr	w0, [x23, 36]
 	ldr	w1, [x23, 44]
 	bl	lpa_hash_update_ppa
 	ldrb	w0, [x23, 2]
-	tbz	x0, 2, .L973
+	tbz	x0, 2, .L1036
 	and	w0, w0, -3
 	strb	w0, [x23, 2]
-	b	.L968
-.L973:
+	b	.L1031
+.L1036:
 	mov	x0, x21
 	bl	buf_free
-	b	.L968
+	b	.L1031
 	.size	ftl_write_completed, .-ftl_write_completed
 	.section	.text.ftl_alloc_sblk,"ax",@progbits
 	.align	2
@@ -5635,39 +6028,39 @@ ftl_alloc_sblk:
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L978
+	beq	.L1041
 	adrp	x0, .LANCHOR3
 	lsl	w22, w22, 1
 	ldr	x21, [x0, #:lo12:.LANCHOR3]
 	add	x21, x21, x19, uxth 2
 	ldrb	w0, [x21, 2]
 	tst	w0, 224
-	beq	.L979
-	adrp	x1, .LANCHOR119
+	beq	.L1042
+	adrp	x1, .LANCHOR125
 	adrp	x0, .LC0
-	mov	w2, 757
-	add	x1, x1, :lo12:.LANCHOR119
+	mov	w2, 827
+	add	x1, x1, :lo12:.LANCHOR125
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L979:
+.L1042:
 	ldrb	w0, [x21, 2]
 	bfi	w0, w20, 5, 3
 	ubfx	x1, x0, 3, 2
 	orr	w22, w22, w1
 	bfi	w0, w22, 3, 2
 	strb	w0, [x21, 2]
-.L980:
+.L1043:
 	mov	w0, w19
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L978:
+.L1041:
 	bl	print_ftl_debug_info
-	adrp	x21, .LC61
+	adrp	x21, .LC67
 	mov	w2, w20
-	add	x21, x21, :lo12:.LC61
+	add	x21, x21, :lo12:.LC67
 	mov	w1, w19
 	mov	x0, x21
 	bl	printf
@@ -5680,28 +6073,28 @@ ftl_alloc_sblk:
 	mov	x0, x21
 	bl	printf
 	bl	dump_all_list_info
-	mov	w2, 767
-	adrp	x1, .LANCHOR119
+	mov	w2, 837
+	adrp	x1, .LANCHOR125
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR119
+	add	x1, x1, :lo12:.LANCHOR125
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L980
+	b	.L1043
 	.size	ftl_alloc_sblk, .-ftl_alloc_sblk
 	.section	.text.sblk_init,"ax",@progbits
 	.align	2
 	.global	sblk_init
 	.type	sblk_init, %function
 sblk_init:
-	adrp	x1, .LANCHOR120
+	adrp	x1, .LANCHOR126
 	mov	w0, -1
-	strb	w0, [x1, #:lo12:.LANCHOR120]
-	adrp	x1, .LANCHOR118
-	strb	w0, [x1, #:lo12:.LANCHOR118]
-	adrp	x1, .LANCHOR58
-	strb	w0, [x1, #:lo12:.LANCHOR58]
-	adrp	x1, .LANCHOR65
-	strb	w0, [x1, #:lo12:.LANCHOR65]
+	strb	w0, [x1, #:lo12:.LANCHOR126]
+	adrp	x1, .LANCHOR124
+	strb	w0, [x1, #:lo12:.LANCHOR124]
+	adrp	x1, .LANCHOR60
+	strb	w0, [x1, #:lo12:.LANCHOR60]
+	adrp	x1, .LANCHOR69
+	strb	w0, [x1, #:lo12:.LANCHOR69]
 	mov	w0, 0
 	ret
 	.size	sblk_init, .-sblk_init
@@ -5711,25 +6104,25 @@ sblk_init:
 	.type	dump_sblk_queue, %function
 dump_sblk_queue:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LC62
-	add	x0, x0, :lo12:.LC62
+	adrp	x0, .LC68
+	add	x0, x0, :lo12:.LC68
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR120
+	adrp	x19, .LANCHOR126
 	str	x21, [sp, 32]
-	ldrb	w1, [x19, #:lo12:.LANCHOR120]
+	ldrb	w1, [x19, #:lo12:.LANCHOR126]
 	bl	printf
-	ldrb	w19, [x19, #:lo12:.LANCHOR120]
+	ldrb	w19, [x19, #:lo12:.LANCHOR126]
 	cmp	w19, 255
-	beq	.L987
-	adrp	x1, .LANCHOR46
+	beq	.L1050
+	adrp	x1, .LANCHOR48
 	ubfiz	x19, x19, 6, 8
-	add	x1, x1, :lo12:.LANCHOR46
-	adrp	x21, .LC63
+	add	x1, x1, :lo12:.LANCHOR48
+	adrp	x21, .LC69
 	add	x19, x1, x19
-	add	x21, x21, :lo12:.LC63
+	add	x21, x21, :lo12:.LC69
 	mov	x20, x1
-.L989:
+.L1052:
 	ldrb	w2, [x19, 58]
 	mov	x0, x21
 	ldrb	w1, [x19, 1]
@@ -5737,11 +6130,11 @@ dump_sblk_queue:
 	bl	printf
 	ldrb	w19, [x19]
 	cmp	w19, 255
-	beq	.L987
+	beq	.L1050
 	ubfiz	x19, x19, 6, 8
 	add	x19, x20, x19
-	b	.L989
-.L987:
+	b	.L1052
+.L1050:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -5752,86 +6145,86 @@ dump_sblk_queue:
 	.global	queue_lun_state
 	.type	queue_lun_state, %function
 queue_lun_state:
-	adrp	x2, .LANCHOR120
-	ldrb	w2, [x2, #:lo12:.LANCHOR120]
+	adrp	x2, .LANCHOR126
+	ldrb	w2, [x2, #:lo12:.LANCHOR126]
 	cmp	w2, 255
-	beq	.L1006
-	adrp	x3, .LANCHOR96
-	adrp	x7, .LANCHOR46
-	add	x7, x7, :lo12:.LANCHOR46
-	adrp	x10, .L1002
-	ldrh	w8, [x3, #:lo12:.LANCHOR96]
+	beq	.L1069
+	adrp	x3, .LANCHOR102
+	adrp	x7, .LANCHOR48
+	add	x7, x7, :lo12:.LANCHOR48
+	adrp	x10, .L1065
+	ldrh	w8, [x3, #:lo12:.LANCHOR102]
 	mov	w3, 21
 	ubfx	x11, x0, 21, 3
-	add	x10, x10, :lo12:.L1002
+	add	x10, x10, :lo12:.L1065
 	sub	w4, w3, w8
 	mov	w3, 1
 	mov	x12, x7
 	lsl	w3, w3, w4
-	adrp	x4, .LANCHOR95
+	adrp	x4, .LANCHOR101
 	sub	w3, w3, #1
-	ldrb	w6, [x4, #:lo12:.LANCHOR95]
+	ldrb	w6, [x4, #:lo12:.LANCHOR101]
 	and	w3, w3, 65535
 	asr	w4, w0, w8
 	sub	w6, w6, #1
 	and	w6, w6, 65535
 	and	w4, w4, w6
 	and	w4, w4, w3
-.L1005:
+.L1068:
 	add	x0, x7, x2, lsl 6
 	ldr	w5, [x0, 40]
 	ubfx	x13, x5, 21, 3
 	cmp	w11, w13
-	bne	.L999
+	bne	.L1062
 	lsr	w5, w5, w8
 	and	w5, w6, w5
 	and	w5, w3, w5
 	ldrb	w0, [x0, 58]
 	cmp	w4, w5
-	bne	.L1000
+	bne	.L1063
 	cmp	w1, 1
-	bne	.L997
+	bne	.L1060
 	cmp	w0, 6
 	ccmp	w0, 8, 4, ne
-	beq	.L999
+	beq	.L1062
 	ret
-.L1000:
+.L1063:
 	cmp	w1, 3
-	bhi	.L999
+	bhi	.L1062
 	ldrb	w5, [x10,w1,uxtw]
-	adr	x13, .Lrtx1002
+	adr	x13, .Lrtx1065
 	add	x5, x13, w5, sxtb #2
 	br	x5
-.Lrtx1002:
+.Lrtx1065:
 	.section	.rodata.queue_lun_state,"a",@progbits
 	.align	0
 	.align	2
-.L1002:
-	.byte	(.L1001 - .Lrtx1002) / 4
-	.byte	(.L1003 - .Lrtx1002) / 4
-	.byte	(.L1004 - .Lrtx1002) / 4
-	.byte	(.L997 - .Lrtx1002) / 4
+.L1065:
+	.byte	(.L1064 - .Lrtx1065) / 4
+	.byte	(.L1066 - .Lrtx1065) / 4
+	.byte	(.L1067 - .Lrtx1065) / 4
+	.byte	(.L1060 - .Lrtx1065) / 4
 	.section	.text.queue_lun_state
-.L1001:
+.L1064:
 	cmp	w0, 2
-	beq	.L999
+	beq	.L1062
 	ret
-.L1003:
+.L1066:
 	cmp	w0, 6
 	ccmp	w0, 8, 4, ne
-	beq	.L999
+	beq	.L1062
 	ret
-.L1004:
+.L1067:
 	cmp	w0, 10
-	bne	.L997
-.L999:
+	bne	.L1060
+.L1062:
 	lsl	x2, x2, 6
 	ldrb	w2, [x12, x2]
 	cmp	w2, 255
-	bne	.L1005
-.L1006:
+	bne	.L1068
+.L1069:
 	mov	w0, 0
-.L997:
+.L1060:
 	ret
 	.size	queue_lun_state, .-queue_lun_state
 	.section	.text.queue_remove_completed_req,"ax",@progbits
@@ -5839,68 +6232,68 @@ queue_lun_state:
 	.global	queue_remove_completed_req
 	.type	queue_remove_completed_req, %function
 queue_remove_completed_req:
-	adrp	x6, .LANCHOR120
-	ldrb	w2, [x6, #:lo12:.LANCHOR120]
+	adrp	x6, .LANCHOR126
+	ldrb	w2, [x6, #:lo12:.LANCHOR126]
 	cmp	w2, 255
-	beq	.L1008
-	adrp	x0, .LANCHOR46
+	beq	.L1071
+	adrp	x0, .LANCHOR48
 	lsl	x4, x2, 6
-	add	x5, x0, :lo12:.LANCHOR46
+	add	x5, x0, :lo12:.LANCHOR48
 	add	x3, x5, x4
 	ldrb	w1, [x3, 58]
 	sub	w1, w1, #11
 	and	w1, w1, 255
 	cmp	w1, 1
 	mov	x1, x0
-	bhi	.L1008
+	bhi	.L1071
 	ldrb	w0, [x5, x4]
-	strb	w0, [x6, #:lo12:.LANCHOR120]
+	strb	w0, [x6, #:lo12:.LANCHOR126]
 	mov	w0, -1
 	strb	w0, [x5, x4]
 	ldrb	w0, [x3, 59]
 	cmp	w0, 1
-	bne	.L1010
+	bne	.L1073
 	ldrh	w0, [x3, 50]
-	cbnz	w0, .L1011
-	adrp	x0, .LANCHOR118
-	ldrb	w3, [x0, #:lo12:.LANCHOR118]
-	add	x0, x0, :lo12:.LANCHOR118
-.L1012:
+	cbnz	w0, .L1074
+	adrp	x0, .LANCHOR124
+	ldrb	w3, [x0, #:lo12:.LANCHOR124]
+	add	x0, x0, :lo12:.LANCHOR124
+.L1075:
 	cmp	w3, 255
-	bne	.L1016
-	add	x1, x1, :lo12:.LANCHOR46
+	bne	.L1079
+	add	x1, x1, :lo12:.LANCHOR48
 	add	x1, x1, x2, lsl 6
 	ldrb	w1, [x1, 1]
 	strb	w1, [x0]
 	ret
-.L1011:
-	adrp	x0, .LANCHOR65
-	ldrb	w3, [x0, #:lo12:.LANCHOR65]
-	add	x0, x0, :lo12:.LANCHOR65
-	b	.L1012
-.L1010:
-	cbnz	w0, .L1008
+.L1074:
+	adrp	x0, .LANCHOR69
+	ldrb	w3, [x0, #:lo12:.LANCHOR69]
+	add	x0, x0, :lo12:.LANCHOR69
+	b	.L1075
+.L1073:
+	cbnz	w0, .L1071
 	ldr	w0, [x3, 36]
 	cmn	w0, #1
-	beq	.L1008
-	adrp	x0, .LANCHOR58
-	ldrb	w3, [x0, #:lo12:.LANCHOR58]
-	add	x0, x0, :lo12:.LANCHOR58
-	b	.L1012
-.L1016:
-	add	x0, x1, :lo12:.LANCHOR46
-.L1023:
+	beq	.L1071
+	adrp	x0, .LANCHOR60
+	ldrb	w3, [x0, #:lo12:.LANCHOR60]
+	add	x0, x0, :lo12:.LANCHOR60
+	b	.L1075
+.L1079:
+	add	x0, x1, :lo12:.LANCHOR48
+.L1086:
 	mov	w1, w3
 	sbfiz	x3, x3, 6, 32
 	ldrb	w3, [x0, x3]
 	cmp	w3, 255
-	bne	.L1023
+	bne	.L1086
 	add	x2, x0, x2, lsl 6
 	sbfiz	x1, x1, 6, 32
 	ldrb	w2, [x2, 1]
 	strb	w2, [x0, x1]
 	ret
-.L1008:
+.L1071:
 	ret
 	.size	queue_remove_completed_req, .-queue_remove_completed_req
 	.section	.text.pm_alloc_new_blk,"ax",@progbits
@@ -5909,42 +6302,42 @@ queue_remove_completed_req:
 	.type	pm_alloc_new_blk, %function
 pm_alloc_new_blk:
 	stp	x29, x30, [sp, -64]!
-	adrp	x2, .LANCHOR72
+	adrp	x2, .LANCHOR76
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR97
+	adrp	x20, .LANCHOR100
 	stp	x21, x22, [sp, 32]
-	ldr	x1, [x20, #:lo12:.LANCHOR97]
-	ldrb	w2, [x2, #:lo12:.LANCHOR72]
+	ldr	x1, [x20, #:lo12:.LANCHOR100]
+	ldrb	w2, [x2, #:lo12:.LANCHOR76]
 	ldrh	w0, [x1, 690]
 	str	x23, [sp, 48]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	strh	w0, [x1, 690]
 	cmp	w2, w0
-	bls	.L1025
+	bls	.L1088
 	add	x0, x1, x0, sxtw 1
 	ldrh	w1, [x0, 672]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1026
-.L1025:
-	adrp	x19, .LC64
-	add	x19, x19, :lo12:.LC64
+	bne	.L1089
+.L1088:
+	adrp	x19, .LC70
+	add	x19, x19, :lo12:.LC70
 	adrp	x23, .LANCHOR3
-.L1038:
+.L1101:
 	mov	w0, 1
 	bl	ftl_alloc_sblk
 	mov	w1, 0
 	and	w21, w0, 65535
 	bl	ftl_erase_sblk
-	add	x14, x20, :lo12:.LANCHOR97
-	ldr	x1, [x20, #:lo12:.LANCHOR97]
+	add	x14, x20, :lo12:.LANCHOR100
+	ldr	x1, [x20, #:lo12:.LANCHOR100]
 	mov	w0, w21
 	add	x1, x1, 672
 	bl	ftl_get_blk_list_in_sblk
 	tst	w0, 65535
-	bne	.L1027
+	bne	.L1090
 	mov	w1, w21
 	mov	x0, x19
 	bl	printf
@@ -5953,76 +6346,76 @@ pm_alloc_new_blk:
 	ldrb	w0, [x1, 2]
 	orr	w0, w0, -32
 	strb	w0, [x1, 2]
-	b	.L1038
-.L1027:
+	b	.L1101
+.L1090:
 	ldr	x0, [x14]
-	adrp	x1, .LANCHOR121
+	adrp	x1, .LANCHOR127
 	mov	w2, 1
 	mov	w19, 0
 	add	x0, x0, 416
-	str	w2, [x1, #:lo12:.LANCHOR121]
+	str	w2, [x1, #:lo12:.LANCHOR127]
 	mov	w1, 65535
 	strh	wzr, [x0, 274]
-.L1029:
+.L1092:
 	ldrh	w2, [x0]
 	cmp	w2, w1
-	beq	.L1028
+	beq	.L1091
 	add	w19, w19, 1
 	add	x0, x0, 2
 	and	w19, w19, 65535
 	cmp	w19, 128
-	bne	.L1029
-	adrp	x1, .LANCHOR122
+	bne	.L1092
+	adrp	x1, .LANCHOR128
 	adrp	x0, .LC0
-	mov	w2, 192
-	add	x1, x1, :lo12:.LANCHOR122
+	mov	w2, 194
+	add	x1, x1, :lo12:.LANCHOR128
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1028:
-	ldr	x0, [x20, #:lo12:.LANCHOR97]
+.L1091:
+	ldr	x0, [x20, #:lo12:.LANCHOR100]
 	add	x19, x0, x19, sxtw 1
 	ldrh	w1, [x0, 688]
 	strh	w21, [x19, 416]
 	add	w1, w1, 1
 	strh	w1, [x0, 688]
-.L1026:
-	ldr	x1, [x20, #:lo12:.LANCHOR97]
+.L1089:
+	ldr	x1, [x20, #:lo12:.LANCHOR100]
 	ldrh	w0, [x1, 690]
 	add	x0, x0, 336
 	ldrh	w19, [x1, x0, lsl 1]
 	mov	w0, 65533
 	sub	w1, w19, #1
 	cmp	w0, w1, uxth
-	bcs	.L1031
-	adrp	x1, .LANCHOR122
+	bcs	.L1094
+	adrp	x1, .LANCHOR128
 	adrp	x0, .LC0
-	mov	w2, 197
-	add	x1, x1, :lo12:.LANCHOR122
+	mov	w2, 199
+	add	x1, x1, :lo12:.LANCHOR128
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1031:
-	adrp	x1, .LANCHOR96
-	ldr	x0, [x20, #:lo12:.LANCHOR97]
+.L1094:
+	adrp	x1, .LANCHOR102
+	ldr	x0, [x20, #:lo12:.LANCHOR100]
 	mov	w2, 21
-	ldrh	w1, [x1, #:lo12:.LANCHOR96]
+	ldrh	w1, [x1, #:lo12:.LANCHOR102]
 	sub	w2, w2, w1
 	strh	wzr, [x0, 696]
 	strh	w19, [x0, 692]
 	asr	w4, w19, w2
 	strh	w4, [x0, 694]
-	adrp	x0, .LANCHOR7
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L1034
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L1097
 	mov	w0, 1
 	and	w4, w4, 65535
 	lsl	w2, w0, w2
 	mov	w3, w19
-	adrp	x0, .LC65
+	adrp	x0, .LC71
 	sub	w2, w2, #1
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC65
+	add	x0, x0, :lo12:.LC71
 	bl	printf
-.L1034:
+.L1097:
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -6036,68 +6429,68 @@ pm_alloc_new_blk:
 	.type	pm_select_ram_region, %function
 pm_select_ram_region:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR123
-	add	x0, x0, :lo12:.LANCHOR123
+	adrp	x0, .LANCHOR129
+	add	x0, x0, :lo12:.LANCHOR129
 	mov	x1, 0
 	add	x29, sp, 0
 	mov	w2, 65535
 	str	x19, [sp, 16]
-.L1043:
+.L1106:
 	lsl	x3, x1, 4
 	and	w19, w1, 65535
 	ldrh	w3, [x3, x0]
 	cmp	w3, w2
-	beq	.L1042
+	beq	.L1105
 	add	x1, x1, 1
 	cmp	x1, 32
-	bne	.L1043
+	bne	.L1106
 	add	x0, x0, 2
 	mov	w19, w1
 	mov	x2, x0
 	mov	w4, 32768
 	mov	w1, 0
-.L1045:
+.L1108:
 	ldrh	w3, [x2]
-	tbnz	x3, 15, .L1044
+	tbnz	x3, 15, .L1107
 	cmp	w3, w4
-	bcs	.L1044
+	bcs	.L1107
 	mov	w4, w3
 	mov	w19, w1
-.L1044:
+.L1107:
 	add	w1, w1, 1
 	add	x2, x2, 16
 	and	w1, w1, 65535
 	cmp	w1, 32
-	bne	.L1045
+	bne	.L1108
 	cmp	w19, 32
-	bne	.L1042
-	adrp	x1, .LANCHOR124
+	bne	.L1105
+	adrp	x1, .LANCHOR130
 	mov	w2, -1
-	ldrb	w3, [x1, #:lo12:.LANCHOR124]
+	ldrb	w3, [x1, #:lo12:.LANCHOR130]
 	mov	w1, 0
-.L1047:
+.L1110:
 	ldrh	w5, [x0]
 	cmp	w5, w2
-	bcs	.L1046
+	bcs	.L1109
 	ldrh	w4, [x0, -2]
 	cmp	w4, w3
 	csel	w2, w2, w5, eq
 	csel	w19, w19, w1, eq
-.L1046:
+.L1109:
 	add	w1, w1, 1
 	add	x0, x0, 16
 	and	w1, w1, 65535
 	cmp	w1, 32
-	bne	.L1047
+	bne	.L1110
 	cmp	w19, 32
-	bne	.L1042
-	adrp	x1, .LANCHOR125
+	bne	.L1105
+	adrp	x1, .LANCHOR131
 	adrp	x0, .LC0
-	mov	w2, 295
-	add	x1, x1, :lo12:.LANCHOR125
+	mov	w2, 297
+	add	x1, x1, :lo12:.LANCHOR131
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1042:
+.L1105:
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -6119,60 +6512,60 @@ flash_lsb_page_tbl_build:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR27
-	cbnz	w0, .L1054
-	add	x1, x19, :lo12:.LANCHOR27
+	adrp	x19, .LANCHOR29
+	cbnz	w0, .L1117
+	add	x1, x19, :lo12:.LANCHOR29
 	mov	x0, 0
-.L1055:
+.L1118:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 256
-	bne	.L1055
-.L1061:
-	adrp	x20, .LANCHOR126
-	add	x20, x20, :lo12:.LANCHOR126
+	bne	.L1118
+.L1124:
+	adrp	x20, .LANCHOR132
+	add	x20, x20, :lo12:.LANCHOR132
 	mov	w2, 1024
 	mov	w1, 255
 	mov	x0, x20
-	add	x19, x19, :lo12:.LANCHOR27
+	add	x19, x19, :lo12:.LANCHOR29
 	bl	ftl_memset
 	mov	x0, 0
-.L1056:
+.L1119:
 	ldrh	w1, [x0, x19]
 	add	x0, x0, 2
 	cmp	x0, 512
 	strh	w1, [x20, w1, sxtw 1]
-	bne	.L1056
+	bne	.L1119
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1054:
+.L1117:
 	cmp	w0, 1
-	bne	.L1057
-	add	x3, x19, :lo12:.LANCHOR27
+	bne	.L1120
+	add	x3, x19, :lo12:.LANCHOR29
 	mov	x1, 0
-.L1060:
+.L1123:
 	and	w0, w1, 65535
 	cmp	x1, 3
-	bls	.L1058
+	bls	.L1121
 	ubfiz	w2, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 2
 	sub	w0, w2, w0
 	and	w0, w0, 65535
-.L1058:
+.L1121:
 	strh	w0, [x3, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L1060
-	b	.L1061
-.L1057:
+	bne	.L1123
+	b	.L1124
+.L1120:
 	cmp	w0, 2
-	bne	.L1062
-	add	x3, x19, :lo12:.LANCHOR27
+	bne	.L1125
+	add	x3, x19, :lo12:.LANCHOR29
 	mov	w1, 65535
 	mov	x0, 0
-.L1064:
+.L1127:
 	cmp	x0, 2
 	and	w2, w0, 65535
 	csel	w2, w2, w1, cc
@@ -6181,35 +6574,35 @@ flash_lsb_page_tbl_build:
 	add	x0, x0, 1
 	and	w1, w1, 65535
 	cmp	x0, 256
-	bne	.L1064
-	b	.L1061
-.L1062:
+	bne	.L1127
+	b	.L1124
+.L1125:
 	cmp	w0, 3
-	bne	.L1065
-	add	x3, x19, :lo12:.LANCHOR27
+	bne	.L1128
+	add	x3, x19, :lo12:.LANCHOR29
 	mov	x1, 0
-.L1068:
+.L1131:
 	and	w0, w1, 65535
 	cmp	x1, 5
-	bls	.L1066
+	bls	.L1129
 	ubfiz	w2, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 4
 	sub	w0, w2, w0
 	and	w0, w0, 65535
-.L1066:
+.L1129:
 	strh	w0, [x3, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L1068
-	b	.L1061
-.L1065:
+	bne	.L1131
+	b	.L1124
+.L1128:
 	cmp	w0, 4
-	bne	.L1069
-	add	x1, x19, :lo12:.LANCHOR27
+	bne	.L1132
+	add	x1, x19, :lo12:.LANCHOR29
 	mov	w2, 1
 	add	x1, x1, 16
-	strh	wzr, [x19, #:lo12:.LANCHOR27]
+	strh	wzr, [x19, #:lo12:.LANCHOR29]
 	strh	w0, [x1, -8]
 	mov	w0, 5
 	strh	w2, [x1, -14]
@@ -6223,7 +6616,7 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1, -10]
 	strh	w0, [x1, -2]
 	mov	w0, 8
-.L1071:
+.L1134:
 	and	w3, w0, 1
 	ubfiz	w2, w0, 1, 15
 	add	w3, w3, 6
@@ -6232,37 +6625,37 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1], 2
 	and	w0, w0, 65535
 	cmp	w0, 256
-	bne	.L1071
-	b	.L1061
-.L1069:
+	bne	.L1134
+	b	.L1124
+.L1132:
 	cmp	w0, 5
-	bne	.L1072
-	add	x1, x19, :lo12:.LANCHOR27
+	bne	.L1135
+	add	x1, x19, :lo12:.LANCHOR29
 	mov	x0, 0
-.L1073:
+.L1136:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 16
-	bne	.L1073
+	bne	.L1136
 	add	x1, x1, 32
-.L1074:
+.L1137:
 	strh	w0, [x1], 2
 	add	w0, w0, 2
 	and	w0, w0, 65535
 	cmp	w0, 496
-	bne	.L1074
-	b	.L1061
-.L1072:
+	bne	.L1137
+	b	.L1124
+.L1135:
 	cmp	w0, 8
-	bne	.L1061
-	add	x1, x19, :lo12:.LANCHOR27
+	bne	.L1124
+	add	x1, x19, :lo12:.LANCHOR29
 	mov	x0, 0
-.L1075:
+.L1138:
 	strh	w0, [x0, x1]
 	add	x0, x0, 2
 	cmp	x0, 512
-	bne	.L1075
-	b	.L1061
+	bne	.L1138
+	b	.L1124
 	.size	flash_lsb_page_tbl_build, .-flash_lsb_page_tbl_build
 	.section	.text.flash_die_info_init,"ax",@progbits
 	.align	2
@@ -6270,38 +6663,38 @@ flash_lsb_page_tbl_build:
 	.type	flash_die_info_init, %function
 flash_die_info_init:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR7
+	adrp	x0, .LANCHOR9
 	add	x29, sp, 0
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	tbz	x0, 12, .L1091
-	adrp	x1, .LANCHOR127
+	tbz	x0, 12, .L1154
+	adrp	x1, .LANCHOR133
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR127
+	add	x1, x1, :lo12:.LANCHOR133
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1091:
-	adrp	x23, .LANCHOR32
-	add	x19, x23, :lo12:.LANCHOR32
-	adrp	x25, .LANCHOR26
-	adrp	x26, .LANCHOR12
-	adrp	x22, .LANCHOR24
-	add	x21, x22, :lo12:.LANCHOR24
+.L1154:
+	adrp	x23, .LANCHOR34
+	add	x19, x23, :lo12:.LANCHOR34
+	adrp	x25, .LANCHOR28
+	adrp	x26, .LANCHOR14
+	adrp	x22, .LANCHOR26
+	add	x21, x22, :lo12:.LANCHOR26
 	ldrh	w0, [x19, 26]
 	mov	w2, 8
 	ldrb	w1, [x19, 12]
-	adrp	x24, .LANCHOR129
-	strh	w0, [x25, #:lo12:.LANCHOR26]
-	add	x20, x24, :lo12:.LANCHOR129
+	adrp	x24, .LANCHOR135
+	strh	w0, [x25, #:lo12:.LANCHOR28]
+	add	x20, x24, :lo12:.LANCHOR135
 	ldrh	w0, [x19, 10]
 	add	x19, x19, 1
-	strb	wzr, [x26, #:lo12:.LANCHOR12]
+	strb	wzr, [x26, #:lo12:.LANCHOR14]
 	sdiv	w0, w0, w1
-	adrp	x1, .LANCHOR128
-	strh	w0, [x1, #:lo12:.LANCHOR128]
+	adrp	x1, .LANCHOR134
+	strh	w0, [x1, #:lo12:.LANCHOR134]
 	mov	w1, 0
 	mov	x0, x21
 	bl	ftl_memset
@@ -6309,34 +6702,34 @@ flash_die_info_init:
 	mov	w1, 0
 	mov	x0, x20
 	bl	ftl_memset
-	ldrb	w13, [x23, #:lo12:.LANCHOR32]
+	ldrb	w13, [x23, #:lo12:.LANCHOR34]
 	mov	x7, x23
-	adrp	x14, .LANCHOR38
-	add	x11, x26, :lo12:.LANCHOR12
-	add	x23, x14, :lo12:.LANCHOR38
+	adrp	x14, .LANCHOR40
+	add	x11, x26, :lo12:.LANCHOR14
+	add	x23, x14, :lo12:.LANCHOR40
 	mov	x8, 0
-.L1093:
+.L1156:
 	mov	w2, w13
 	add	x1, x23, x8, lsl 3
 	mov	x0, x19
 	bl	flash_mem_cmp8
-	cbnz	w0, .L1092
+	cbnz	w0, .L1155
 	ldrb	w1, [x11]
 	add	w0, w1, 1
 	strb	w0, [x11]
 	str	wzr, [x20, x1, lsl 2]
 	strb	w8, [x21, x1]
-.L1092:
+.L1155:
 	add	x8, x8, 1
 	cmp	x8, 4
-	bne	.L1093
-	add	x0, x7, :lo12:.LANCHOR32
+	bne	.L1156
+	add	x0, x7, :lo12:.LANCHOR34
 	ldrb	w1, [x0, 8]
 	cmp	w1, 2
-	beq	.L1094
-.L1098:
-	add	x7, x7, :lo12:.LANCHOR32
-	ldrb	w0, [x26, #:lo12:.LANCHOR12]
+	beq	.L1157
+.L1161:
+	add	x7, x7, :lo12:.LANCHOR34
+	ldrb	w0, [x26, #:lo12:.LANCHOR14]
 	ldp	x19, x20, [sp, 16]
 	ldrb	w1, [x7, 13]
 	ldp	x21, x22, [sp, 32]
@@ -6346,30 +6739,30 @@ flash_die_info_init:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	mul	w0, w0, w1
-	adrp	x1, .LANCHOR130
-	strh	w0, [x1, #:lo12:.LANCHOR130]
+	adrp	x1, .LANCHOR136
+	strh	w0, [x1, #:lo12:.LANCHOR136]
 	ret
-.L1094:
-	ldrh	w1, [x25, #:lo12:.LANCHOR26]
-	add	x14, x14, :lo12:.LANCHOR38
+.L1157:
+	ldrh	w1, [x25, #:lo12:.LANCHOR28]
+	add	x14, x14, :lo12:.LANCHOR40
 	ldrb	w11, [x0, 13]
 	add	x8, x0, 1
 	ldrb	w20, [x0, 23]
-	add	x19, x26, :lo12:.LANCHOR12
-	add	x15, x24, :lo12:.LANCHOR129
-	add	x22, x22, :lo12:.LANCHOR24
+	add	x19, x26, :lo12:.LANCHOR14
+	add	x15, x24, :lo12:.LANCHOR135
+	add	x22, x22, :lo12:.LANCHOR26
 	mov	x12, 0
 	mul	w11, w11, w1
 	ldrh	w1, [x0, 14]
 	and	w1, w1, 65280
 	mul	w11, w11, w1
 	lsl	w21, w11, 1
-.L1097:
+.L1160:
 	mov	w2, w13
 	add	x1, x14, x12, lsl 3
 	mov	x0, x8
 	bl	flash_mem_cmp8
-	cbnz	w0, .L1095
+	cbnz	w0, .L1158
 	ldrb	w1, [x19]
 	cmp	w20, 0
 	csel	w2, w11, w21, eq
@@ -6377,11 +6770,11 @@ flash_die_info_init:
 	strb	w0, [x19]
 	str	w2, [x15, x1, lsl 2]
 	strb	w12, [x22, x1]
-.L1095:
+.L1158:
 	add	x12, x12, 1
 	cmp	x12, 4
-	bne	.L1097
-	b	.L1098
+	bne	.L1160
+	b	.L1161
 	.size	flash_die_info_init, .-flash_die_info_init
 	.section	.text.lpa_hash_init,"ax",@progbits
 	.align	2
@@ -6391,19 +6784,19 @@ lpa_hash_init:
 	stp	x29, x30, [sp, -16]!
 	mov	w2, 512
 	mov	w1, 255
-	adrp	x0, .LANCHOR108
+	adrp	x0, .LANCHOR113
 	add	x29, sp, 0
-	add	x0, x0, :lo12:.LANCHOR108
+	add	x0, x0, :lo12:.LANCHOR113
 	bl	ftl_memset
-	adrp	x0, .LANCHOR80
+	adrp	x0, .LANCHOR83
 	mov	w1, 255
 	ldp	x29, x30, [sp], 16
-	ldrh	w2, [x0, #:lo12:.LANCHOR80]
-	adrp	x0, .LANCHOR72
-	ldrb	w0, [x0, #:lo12:.LANCHOR72]
+	ldrh	w2, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR76
+	ldrb	w0, [x0, #:lo12:.LANCHOR76]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR110
-	ldr	x0, [x0, #:lo12:.LANCHOR110]
+	adrp	x0, .LANCHOR115
+	ldr	x0, [x0, #:lo12:.LANCHOR115]
 	lsl	w2, w2, 2
 	b	ftl_memset
 	.size	lpa_hash_init, .-lpa_hash_init
@@ -6413,64 +6806,64 @@ lpa_hash_init:
 	.type	lpa_rebuild_hash, %function
 lpa_rebuild_hash:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LANCHOR7
+	adrp	x0, .LANCHOR9
 	add	x29, sp, 0
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	tbz	x0, 12, .L1111
-	adrp	x1, .LANCHOR131
-	adrp	x0, .LC66
+	tbz	x0, 12, .L1174
+	adrp	x1, .LANCHOR137
+	adrp	x0, .LC72
 	mov	w3, 0
-	mov	w2, 218
-	add	x1, x1, :lo12:.LANCHOR131
-	add	x0, x0, :lo12:.LC66
+	mov	w2, 220
+	add	x1, x1, :lo12:.LANCHOR137
+	add	x0, x0, :lo12:.LC72
 	bl	printf
-.L1111:
-	adrp	x20, .LANCHOR80
-	adrp	x22, .LANCHOR72
-	adrp	x19, .LANCHOR108
-	add	x19, x19, :lo12:.LANCHOR108
+.L1174:
+	adrp	x20, .LANCHOR83
+	adrp	x22, .LANCHOR76
+	adrp	x19, .LANCHOR113
+	add	x19, x19, :lo12:.LANCHOR113
 	mov	w2, 512
 	mov	w1, 255
 	mov	x0, x19
 	bl	ftl_memset
-	ldrh	w2, [x20, #:lo12:.LANCHOR80]
-	adrp	x21, .LANCHOR110
-	ldrb	w0, [x22, #:lo12:.LANCHOR72]
+	ldrh	w2, [x20, #:lo12:.LANCHOR83]
+	adrp	x21, .LANCHOR115
+	ldrb	w0, [x22, #:lo12:.LANCHOR76]
 	mov	w1, 255
-	add	x20, x20, :lo12:.LANCHOR80
+	add	x20, x20, :lo12:.LANCHOR83
 	mul	w2, w2, w0
-	ldr	x0, [x21, #:lo12:.LANCHOR110]
+	ldr	x0, [x21, #:lo12:.LANCHOR115]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	adrp	x0, .LANCHOR109
-	ldrb	w3, [x22, #:lo12:.LANCHOR72]
-	ldr	x5, [x21, #:lo12:.LANCHOR110]
+	adrp	x0, .LANCHOR114
+	ldrb	w3, [x22, #:lo12:.LANCHOR76]
+	ldr	x5, [x21, #:lo12:.LANCHOR115]
 	mov	w1, 0
-	ldr	x4, [x0, #:lo12:.LANCHOR109]
-.L1112:
+	ldr	x4, [x0, #:lo12:.LANCHOR114]
+.L1175:
 	ldrh	w0, [x20]
 	mul	w0, w0, w3
 	cmp	w1, w0, lsl 1
-	blt	.L1114
+	blt	.L1177
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1114:
+.L1177:
 	uxtw	x2, w1
 	ldr	w0, [x4, x2, lsl 2]
 	cmn	w0, #1
-	beq	.L1113
+	beq	.L1176
 	and	x0, x0, 255
 	ldrh	w6, [x19, x0, lsl 1]
 	strh	w1, [x19, x0, lsl 1]
 	strh	w6, [x5, x2, lsl 1]
-.L1113:
+.L1176:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L1112
+	b	.L1175
 	.size	lpa_rebuild_hash, .-lpa_rebuild_hash
 	.section	.text.zftl_read_flash_info,"ax",@progbits
 	.align	2
@@ -6484,19 +6877,19 @@ zftl_read_flash_info:
 	str	x19, [sp, 16]
 	mov	x19, x0
 	bl	ftl_memset
-	adrp	x1, .LANCHOR32
-	add	x1, x1, :lo12:.LANCHOR32
-	adrp	x0, .LANCHOR26
+	adrp	x1, .LANCHOR34
+	add	x1, x1, :lo12:.LANCHOR34
+	adrp	x0, .LANCHOR28
 	mov	w4, 1
 	ldrb	w3, [x1, 9]
-	ldrh	w0, [x0, #:lo12:.LANCHOR26]
+	ldrh	w0, [x0, #:lo12:.LANCHOR28]
 	mul	w0, w3, w0
 	and	w2, w0, 65535
 	strb	w2, [x19, 4]
 	ubfx	x0, x2, 8, 8
 	strb	w0, [x19, 5]
-	adrp	x0, .LANCHOR40
-	ldrb	w0, [x0, #:lo12:.LANCHOR40]
+	adrp	x0, .LANCHOR42
+	ldrb	w0, [x0, #:lo12:.LANCHOR42]
 	strb	w0, [x19, 7]
 	ldrb	w0, [x1, 13]
 	mul	w0, w0, w2
@@ -6512,30 +6905,30 @@ zftl_read_flash_info:
 	ubfx	x2, x0, 16, 8
 	lsr	w0, w0, 24
 	strb	w2, [x19, 2]
-	adrp	x2, .LANCHOR24
+	adrp	x2, .LANCHOR26
 	strb	w0, [x19, 3]
 	mov	w0, 32
 	strb	w0, [x19, 8]
-	add	x2, x2, :lo12:.LANCHOR24
+	add	x2, x2, :lo12:.LANCHOR26
 	ldrb	w0, [x1, 7]
 	mov	x1, 0
 	strb	w0, [x19, 9]
-	adrp	x0, .LANCHOR12
-	ldrb	w3, [x0, #:lo12:.LANCHOR12]
-.L1123:
+	adrp	x0, .LANCHOR14
+	ldrb	w3, [x0, #:lo12:.LANCHOR14]
+.L1186:
 	cmp	w3, w1, uxtb
-	bhi	.L1124
+	bhi	.L1187
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1124:
+.L1187:
 	ldrb	w0, [x1, x2]
 	add	x1, x1, 1
 	ldrb	w5, [x19, 10]
 	lsl	w0, w4, w0
 	orr	w0, w0, w5
 	strb	w0, [x19, 10]
-	b	.L1123
+	b	.L1186
 	.size	zftl_read_flash_info, .-zftl_read_flash_info
 	.section	.text.gc_static_wearleveling,"ax",@progbits
 	.align	2
@@ -6543,132 +6936,319 @@ zftl_read_flash_info:
 	.type	gc_static_wearleveling, %function
 gc_static_wearleveling:
 	stp	x29, x30, [sp, -160]!
-	mov	w1, 10240
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR97
+	stp	x25, x26, [sp, 64]
+	adrp	x25, .LANCHOR100
 	stp	x19, x20, [sp, 16]
-	ldr	x5, [x22, #:lo12:.LANCHOR97]
+	ldr	x0, [x25, #:lo12:.LANCHOR100]
+	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	ldr	w0, [x5, 32]
-	cmp	w0, w1
-	bls	.L1127
-	ldr	w1, [x5, 36]
-	add	w1, w1, w0, lsr 10
-	and	w0, w0, 1023
-	stp	w0, w1, [x5, 32]
-.L1127:
-	adrp	x25, .LANCHOR5
-	ldr	w3, [x5, 36]
-	ldr	x0, [x25, #:lo12:.LANCHOR5]
+	ldr	w1, [x0, 32]
+	mov	w0, 10240
+	cmp	w1, w0
+	bls	.L1190
+	bl	ftl_tmp_into_update
+.L1190:
+	adrp	x19, .LANCHOR6
+	ldr	x0, [x19, #:lo12:.LANCHOR6]
 	ldr	w1, [x0, 568]
 	ldr	w2, [x0, 12]
 	add	w1, w1, 860160
 	add	w1, w1, 3840
 	cmp	w2, w1
-	bhi	.L1128
+	bhi	.L1191
+	ldr	x3, [x25, #:lo12:.LANCHOR100]
 	ldr	w1, [x0, 572]
 	add	w1, w1, 32
+	ldr	w3, [x3, 36]
 	cmp	w3, w1
-	bls	.L1126
-.L1128:
-	adrp	x21, .LANCHOR3
-	ldrh	w10, [x5, 134]
-	adrp	x23, .LANCHOR2
-	mov	w27, 65535
-	ldr	x8, [x21, #:lo12:.LANCHOR3]
-	mov	w19, w27
-	ldrh	w11, [x23, #:lo12:.LANCHOR2]
-	mov	w12, w27
+	bls	.L1240
+.L1191:
+	ldr	x1, [x25, #:lo12:.LANCHOR100]
+	mov	w20, 65535
+	adrp	x8, .LANCHOR9
+	mov	w21, w20
+	add	x8, x8, :lo12:.LANCHOR9
+	mov	w28, 0
+	mov	w27, 0
+	mov	w22, 0
+	ldr	w3, [x1, 36]
+	adrp	x23, .LANCHOR3
+	ldrh	w24, [x1, 134]
 	str	w2, [x0, 568]
-	mov	w4, 0
-	add	x8, x8, x10, uxth 2
 	str	w3, [x0, 572]
+	adrp	x0, .LANCHOR2
+	add	x10, x0, :lo12:.LANCHOR2
+	str	wzr, [x29, 128]
+	str	wzr, [x29, 136]
+	stp	wzr, wzr, [x29, 148]
+	str	wzr, [x29, 156]
+.L1193:
+	ldrh	w0, [x10]
+	cmp	w0, w24
+	bhi	.L1202
+	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	mov	w2, 128
+	mov	w1, 255
+	adrp	x24, .LANCHOR9
+	add	x0, x0, 264
+	strh	wzr, [x0, -142]
+	bl	ftl_memset
+	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	ldr	w3, [x24, #:lo12:.LANCHOR9]
+	ldr	x2, [x23, #:lo12:.LANCHOR3]
+	ldrh	w5, [x0, 586]
+	mov	x1, x5
+	lsl	x0, x5, 2
+	add	x26, x2, x0
+	tbz	x3, 10, .L1203
+	adrp	x3, .LANCHOR5
+	ldrb	w4, [x26, 2]
+	ldr	x6, [x3, #:lo12:.LANCHOR5]
+	ldr	w3, [x2, x0]
+	ldrh	w2, [x2, x0]
+	adrp	x0, .LC74
+	add	x0, x0, :lo12:.LC74
+	ldrh	w7, [x6, x5, lsl 1]
+	ubfx	x3, x3, 11, 8
+	ldrb	w6, [x26, 3]
+	ubfx	x5, x4, 5, 3
+	and	w2, w2, 2047
+	ubfx	x4, x4, 3, 2
+	bl	printf
+.L1203:
+	ldrb	w0, [x26, 2]
+	tbz	x0, 3, .L1204
+	ldrb	w0, [x26, 2]
+	and	w1, w0, 192
+	cmp	w1, 64
+	bne	.L1205
+	ldr	x0, [x19, #:lo12:.LANCHOR6]
 	mov	w1, 0
-	mov	w20, 0
-	mov	w26, 0
-	mov	w3, 0
-	mov	w2, 0
-.L1130:
-	cmp	w10, w11
-	bcc	.L1134
-	ldrh	w0, [x5, 96]
-	cmp	w0, w20
-	bcs	.L1135
-	strh	w20, [x5, 96]
-.L1135:
-	ldrh	w0, [x5, 98]
-	cmp	w0, w26
-	bcs	.L1136
-	strh	w26, [x5, 98]
-.L1136:
-	udiv	w3, w3, w1
-	adrp	x24, .LANCHOR7
-	udiv	w4, w4, w2
-	ldr	w0, [x24, #:lo12:.LANCHOR7]
-	strh	w3, [x5, 88]
-	strh	w4, [x5, 90]
-	tbz	x0, 10, .L1137
-	adrp	x0, .LC67
+	mov	w2, 1
+	ldrh	w0, [x0, 586]
+	bl	gc_add_sblk
+	adrp	x0, .LANCHOR65+318
+	mov	w1, 1
+	strh	w1, [x0, #:lo12:.LANCHOR65+318]
+.L1204:
+	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	ldr	w3, [x24, #:lo12:.LANCHOR9]
+	ldr	x2, [x23, #:lo12:.LANCHOR3]
+	ldrh	w5, [x0, 584]
+	mov	x1, x5
+	lsl	x0, x5, 2
+	add	x26, x2, x0
+	tbz	x3, 10, .L1206
+	adrp	x3, .LANCHOR5
+	ldrb	w4, [x26, 2]
+	ldr	x6, [x3, #:lo12:.LANCHOR5]
+	ldr	w3, [x2, x0]
+	ldrh	w2, [x2, x0]
+	adrp	x0, .LC75
+	add	x0, x0, :lo12:.LC75
+	ldrh	w7, [x6, x5, lsl 1]
+	ubfx	x3, x3, 11, 8
+	ldrb	w6, [x26, 3]
+	ubfx	x5, x4, 5, 3
+	and	w2, w2, 2047
+	ubfx	x4, x4, 3, 2
+	bl	printf
+.L1206:
+	ldrb	w0, [x26, 2]
+	tbz	x0, 3, .L1207
+	ldrb	w0, [x26, 2]
+	and	w1, w0, 192
+	cmp	w1, 64
+	bne	.L1208
+	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	mov	w1, 0
+	mov	w2, 1
+	ldrh	w0, [x0, 584]
+	bl	gc_add_sblk
+	adrp	x0, .LANCHOR65+318
+	mov	w1, 1
+	strh	w1, [x0, #:lo12:.LANCHOR65+318]
+.L1207:
+	ldr	w0, [x24, #:lo12:.LANCHOR9]
+	tbz	x0, 10, .L1209
+	ldr	w6, [x29, 128]
+	adrp	x2, .LANCHOR5
+	ldr	x1, [x23, #:lo12:.LANCHOR3]
+	ldr	x7, [x2, #:lo12:.LANCHOR5]
+	lsl	x0, x6, 2
+	add	x5, x1, x0
+	ldr	w3, [x1, x0]
+	ldrh	w2, [x1, x0]
+	adrp	x0, .LC76
+	ldrh	w7, [x7, x6, lsl 1]
+	add	x0, x0, :lo12:.LC76
+	ldrb	w6, [x5, 3]
+	ubfx	x3, x3, 11, 8
+	ldr	w1, [x29, 128]
+	and	w2, w2, 2047
+	ldrb	w4, [x5, 2]
+	ubfx	x5, x4, 5, 3
+	ubfx	x4, x4, 3, 2
+	bl	printf
+.L1209:
+	ldr	w0, [x24, #:lo12:.LANCHOR9]
+	tbz	x0, 10, .L1210
+	ldr	w6, [x29, 136]
+	adrp	x2, .LANCHOR5
+	ldr	x1, [x23, #:lo12:.LANCHOR3]
+	ldr	x7, [x2, #:lo12:.LANCHOR5]
+	lsl	x0, x6, 2
+	add	x5, x1, x0
+	ldr	w3, [x1, x0]
+	ldrh	w2, [x1, x0]
+	adrp	x0, .LC77
+	ldrh	w7, [x7, x6, lsl 1]
+	add	x0, x0, :lo12:.LC77
+	ldrb	w6, [x5, 3]
+	ubfx	x3, x3, 11, 8
+	ldr	w1, [x29, 136]
+	and	w2, w2, 2047
+	ldrb	w4, [x5, 2]
+	ubfx	x5, x4, 5, 3
+	ubfx	x4, x4, 3, 2
+	bl	printf
+.L1210:
+	ldr	x0, [x25, #:lo12:.LANCHOR100]
+	ldrh	w1, [x29, 156]
+	strh	w1, [x0, 96]
+	ldr	w1, [x29, 148]
+	strh	w22, [x0, 98]
+	strh	w20, [x0, 92]
+	strh	w21, [x0, 94]
+	udiv	w3, w1, w27
+	ldr	w1, [x29, 152]
+	udiv	w4, w1, w28
+	strh	w3, [x0, 88]
+	strh	w4, [x0, 90]
+	ldr	w0, [x24, #:lo12:.LANCHOR9]
+	tbz	x0, 10, .L1211
+	adrp	x0, .LC78
 	and	w4, w4, 65535
 	and	w3, w3, 65535
-	add	x0, x0, :lo12:.LC67
-	bl	printf
-.L1137:
-	ldr	w0, [x24, #:lo12:.LANCHOR7]
-	adrp	x28, .LANCHOR132
-	tbz	x0, 10, .L1138
-	adrp	x0, .LANCHOR133
-	ldrh	w6, [x28, #:lo12:.LANCHOR132]
-	mov	w4, w26
-	mov	w3, w20
-	ldrh	w5, [x0, #:lo12:.LANCHOR133]
-	mov	w2, w19
-	adrp	x0, .LC68
+	mov	w2, w28
 	mov	w1, w27
-	add	x0, x0, :lo12:.LC68
+	add	x0, x0, :lo12:.LC78
 	bl	printf
-.L1138:
-	ldr	x0, [x25, #:lo12:.LANCHOR5]
-	mov	w1, 255
-	mov	w2, 128
-	add	x0, x0, 264
-	strh	wzr, [x0, -142]
-	bl	ftl_memset
-	sub	w0, w26, w19
+.L1211:
+	ldr	w0, [x24, #:lo12:.LANCHOR9]
+	tbz	x0, 10, .L1212
+	adrp	x0, .LANCHOR138
+	ldr	w3, [x29, 156]
+	mov	w4, w22
+	mov	w2, w21
+	ldrh	w6, [x0, #:lo12:.LANCHOR138]
+	adrp	x0, .LANCHOR139
+	mov	w1, w20
+	ldrh	w5, [x0, #:lo12:.LANCHOR139]
+	adrp	x0, .LC79
+	add	x0, x0, :lo12:.LC79
+	bl	printf
+.L1212:
+	sub	w0, w22, w21
 	str	w0, [x29, 148]
-	ldrh	w0, [x28, #:lo12:.LANCHOR132]
+	adrp	x0, .LANCHOR138
 	ldr	w1, [x29, 148]
+	ldrh	w0, [x0, #:lo12:.LANCHOR138]
 	cmp	w1, w0
-	bgt	.L1139
-	adrp	x1, .LANCHOR133
-	sub	w0, w20, w27
-	ldrh	w1, [x1, #:lo12:.LANCHOR133]
+	bgt	.L1213
+	adrp	x1, .LANCHOR139
+	ldr	w0, [x29, 156]
+	ldrh	w1, [x1, #:lo12:.LANCHOR139]
+	sub	w0, w0, w20
 	cmp	w0, w1
-	bgt	.L1139
-.L1146:
-	cbnz	w19, .L1140
-.L1148:
-	cbz	w27, .L1126
-	ldr	x2, [x22, #:lo12:.LANCHOR97]
-	ldr	x1, [x21, #:lo12:.LANCHOR3]
-	ldrh	w5, [x23, #:lo12:.LANCHOR2]
-	ldrh	w0, [x2, 134]
-	add	x1, x1, x0, uxth 2
-.L1153:
-	cmp	w0, w5
-	bcc	.L1155
+	ble	.L1241
+.L1213:
+	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	adrp	x28, .LANCHOR65
+	add	x28, x28, :lo12:.LANCHOR65
+	mov	w27, 0
+	mov	w22, 0
+	ldrh	w26, [x0, 580]
+	ldr	x0, [x25, #:lo12:.LANCHOR100]
+	ldrh	w0, [x0, 134]
+	str	w0, [x29, 152]
+	adrp	x0, .LANCHOR2
+	add	x0, x0, :lo12:.LANCHOR2
+	str	x0, [x29, 136]
+	adrp	x0, .LANCHOR139
+	add	x0, x0, :lo12:.LANCHOR139
+	str	x0, [x29, 128]
+.L1215:
+	ldr	x0, [x29, 136]
+	ldr	w1, [x29, 152]
+	ldrh	w0, [x0]
+	cmp	w1, w0
+	bcc	.L1225
+.L1224:
+	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	str	w26, [x0, 580]
+.L1214:
+	cbz	w21, .L1227
+	ldr	x2, [x25, #:lo12:.LANCHOR100]
+	adrp	x0, .LANCHOR2
+	ldrh	w5, [x0, #:lo12:.LANCHOR2]
+	ldr	x0, [x23, #:lo12:.LANCHOR3]
+	ldrh	w1, [x2, 134]
+	add	x0, x0, x1, uxth 2
+.L1228:
+	cmp	w1, w5
+	bcc	.L1230
+	ldrh	w0, [x2, 72]
+	add	w0, w21, w0
+	strh	w0, [x2, 72]
+	ldrh	w0, [x2, 98]
+	cmp	w21, w0
+	bcs	.L1227
+	sub	w21, w0, w21
+	strh	w21, [x2, 98]
+.L1227:
+	cbz	w20, .L1233
+	ldr	x2, [x25, #:lo12:.LANCHOR100]
+	adrp	x0, .LANCHOR2
+	ldrh	w6, [x0, #:lo12:.LANCHOR2]
+	ldr	x0, [x23, #:lo12:.LANCHOR3]
+	ldrh	w1, [x2, 134]
+	add	x0, x0, x1, uxth 2
+.L1234:
+	cmp	w1, w6
+	bcc	.L1236
 	ldrh	w0, [x2, 74]
-	add	w0, w27, w0
+	add	w0, w20, w0
 	strh	w0, [x2, 74]
 	ldrh	w0, [x2, 96]
-	cmp	w27, w0
-	bcs	.L1126
-	sub	w7, w0, w27
-	strh	w7, [x2, 96]
-.L1126:
+	cmp	w20, w0
+	bcs	.L1233
+	sub	w20, w0, w20
+	strh	w20, [x2, 96]
+.L1233:
+	mov	w1, 5
+	mov	w0, 0
+	bl	zftl_get_gc_node
+	and	w1, w0, 65535
+	mov	w2, 65535
+	cmp	w1, w2
+	beq	.L1192
+	adrp	x2, .LANCHOR5
+	ubfiz	x1, x1, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR5]
+	ldrh	w2, [x2, x1]
+	adrp	x1, .LANCHOR83
+	ldrh	w1, [x1, #:lo12:.LANCHOR83]
+	cmp	w2, w1
+	bhi	.L1192
+	add	w22, w22, 1
+	mov	w2, 1
+	mov	w1, 0
+	bl	gc_add_sblk
+.L1192:
+	add	w0, w22, w27
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -6676,210 +7256,297 @@ gc_static_wearleveling:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L1134:
-	ldrb	w0, [x8, 2]
-	tbz	x0, 3, .L1131
-	ldr	w0, [x8]
-	ldrh	w6, [x8]
+.L1202:
+	uxtw	x7, w24
+	ldr	x6, [x23, #:lo12:.LANCHOR3]
+	lsl	x2, x7, 2
+	add	x11, x6, x2
+	ldrb	w0, [x11, 2]
+	and	w1, w0, 224
+	cmp	w1, 224
+	beq	.L1194
+	ubfx	x4, x0, 3, 2
+	tbz	x4, 0, .L1195
+	ldr	w0, [x6, x2]
+	ldrh	w1, [x6, x2]
 	ubfx	x0, x0, 11, 8
-	and	w6, w6, 2047
-.L1132:
-	cmp	w6, w27
-	add	w1, w1, 1
-	csel	w7, w6, w27, cc
-	cmp	w6, w20
-	csel	w20, w6, w20, hi
-	and	w1, w1, 65535
-	add	w3, w3, w6
-	and	w27, w7, 65535
-	and	w20, w20, 65535
-	cmp	w0, w12
-	bne	.L1156
-	b	.L1157
-.L1131:
+	and	w1, w1, 2047
+.L1196:
+	ldr	w3, [x29, 148]
+	add	w27, w27, 1
+	and	w27, w27, 65535
+	cmp	w20, w1
+	add	w3, w3, w1
+	str	w3, [x29, 148]
+	bls	.L1239
+	ldr	x3, [x19, #:lo12:.LANCHOR6]
+	mov	w20, w1
+	strh	w24, [x3, 586]
+.L1239:
+	ldr	w3, [x29, 156]
+	cmp	w3, w1
+	bcs	.L1199
+	str	w24, [x29, 128]
+	str	w1, [x29, 156]
+.L1199:
+	mov	w3, 65535
+	cmp	w0, w3
+	bne	.L1198
+.L1200:
+	cmp	w0, 9
+	ccmp	w1, 9, 0, hi
+	bhi	.L1194
+	ldr	w0, [x8]
+	tbz	x0, 8, .L1194
+	adrp	x0, .LANCHOR5
+	ldr	w3, [x6, x2]
+	ldrh	w2, [x6, x2]
+	mov	w1, w24
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	ldrb	w6, [x11, 3]
+	ubfx	x3, x3, 11, 8
+	ldrb	w5, [x11, 2]
+	and	w2, w2, 2047
+	stp	x8, x10, [x29, 112]
+	ldrh	w7, [x0, x7, lsl 1]
+	adrp	x0, .LC73
+	ubfx	x5, x5, 5, 3
+	add	x0, x0, :lo12:.LC73
+	bl	printf
+	ldp	x8, x10, [x29, 112]
+.L1194:
+	add	w24, w24, 1
+	and	w24, w24, 65535
+	b	.L1193
+.L1195:
 	tst	w0, 24
-	bne	.L1133
-	ldrh	w6, [x8]
+	bne	.L1197
+	ldrh	w1, [x6, x2]
 	mov	w0, 65535
-	and	w6, w6, 2047
-	b	.L1132
-.L1133:
-	ldr	w0, [x8]
+	and	w1, w1, 2047
+	b	.L1196
+.L1197:
+	ldr	w0, [x6, x2]
+	mov	w1, 65535
 	ubfx	x0, x0, 11, 8
-.L1156:
-	cmp	w0, w19
-	add	w2, w2, 1
-	csel	w19, w0, w19, cc
-	cmp	w0, w26
-	add	w4, w4, w0
-	csel	w0, w0, w26, hi
-	and	w2, w2, 65535
-	and	w19, w19, 65535
-	and	w26, w0, 65535
-.L1157:
-	add	w10, w10, 1
-	add	x8, x8, 4
-	and	w10, w10, 65535
-	b	.L1130
-.L1139:
-	ldr	x0, [x22, #:lo12:.LANCHOR97]
-	adrp	x25, .LANCHOR63
-	stp	wzr, wzr, [x29, 152]
-	ldrh	w26, [x0, 134]
-	add	x0, x23, :lo12:.LANCHOR2
-	str	x0, [x29, 128]
-	adrp	x0, .LANCHOR133
-	add	x0, x0, :lo12:.LANCHOR133
-	str	x0, [x29, 120]
-	add	x0, x25, :lo12:.LANCHOR63
-	str	x0, [x29, 136]
-.L1142:
-	ldr	x0, [x29, 128]
-	ldrh	w0, [x0]
+.L1198:
+	ldr	w3, [x29, 152]
+	add	w28, w28, 1
+	and	w28, w28, 65535
+	cmp	w21, w0
+	add	w3, w3, w0
+	str	w3, [x29, 152]
+	bls	.L1201
+	ldr	x3, [x19, #:lo12:.LANCHOR6]
+	mov	w21, w0
+	strh	w24, [x3, 584]
+.L1201:
+	cmp	w22, w0
+	bcs	.L1200
+	mov	w22, w0
+	str	w24, [x29, 136]
+	b	.L1200
+.L1205:
+	tst	w0, 224
+	bne	.L1204
+	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	mov	w1, 65535
+	ldrh	w2, [x0, 590]
+	cmp	w2, w1
+	bne	.L1204
+	ldrh	w0, [x0, 586]
+	bl	zftl_remove_free_node
+	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	ldrh	w1, [x0, 586]
+	strh	w1, [x0, 590]
+	mov	w1, -1
+	strh	w1, [x0, 586]
+	b	.L1204
+.L1208:
+	tst	w0, 224
+	bne	.L1207
+	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	mov	w1, 65535
+	ldrh	w2, [x0, 588]
+	cmp	w2, w1
+	bne	.L1207
+	ldrh	w0, [x0, 584]
+	bl	zftl_remove_free_node
+	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	ldrh	w1, [x0, 584]
+	strh	w1, [x0, 588]
+	mov	w1, -1
+	strh	w1, [x0, 584]
+	b	.L1207
+.L1225:
+	add	w7, w26, 1
+	ldr	x4, [x23, #:lo12:.LANCHOR3]
+	and	w26, w7, 65535
 	cmp	w0, w26
-	bls	.L1146
-	uxtw	x25, w26
-	ldr	x4, [x21, #:lo12:.LANCHOR3]
-	lsl	x3, x25, 2
+	csel	w26, w26, wzr, hi
+	uxtw	x8, w26
+	lsl	x3, x8, 2
 	add	x0, x4, x3
 	ldrb	w0, [x0, 2]
 	tst	w0, 192
-	beq	.L1143
-	and	w1, w0, 224
-	cmp	w1, 224
-	beq	.L1143
-	tbz	x0, 4, .L1144
-	ldrh	w0, [x28, #:lo12:.LANCHOR132]
-	ldr	w1, [x29, 148]
-	cmp	w1, w0
-	ble	.L1145
+	beq	.L1217
+	and	w2, w0, 224
+	cmp	w2, 224
+	beq	.L1217
+	ubfx	x0, x0, 3, 2
+	and	w1, w0, 1
+	tbz	x0, 0, .L1218
+	cmp	w2, 160
+.L1305:
+	bne	.L1220
+	adrp	x0, .LANCHOR138
+	ldr	w2, [x29, 148]
+	ldrh	w0, [x0, #:lo12:.LANCHOR138]
+	cmp	w2, w0
+	ble	.L1221
 	ldr	w0, [x4, x3]
-	add	w1, w19, 1
+	add	w2, w21, 2
 	ubfx	x0, x0, 11, 8
-	cmp	w0, w1
-	bgt	.L1145
-	stp	x4, x3, [x29, 104]
+	cmp	w0, w2
+	ble	.L1222
+	cbz	w1, .L1221
+	ldrh	w0, [x4, x3]
+	and	w0, w0, 2047
+	cmp	w0, w20
+	bgt	.L1221
+.L1222:
+	stp	x4, x8, [x29, 104]
 	mov	w2, 1
+	str	x3, [x29, 120]
 	mov	w1, 0
 	mov	w0, w26
 	bl	gc_add_sblk
-	ldr	w0, [x29, 156]
-	ldp	x4, x3, [x29, 104]
-	add	w0, w0, 1
-	str	w0, [x29, 156]
-	ldr	w0, [x24, #:lo12:.LANCHOR7]
-	tbz	x0, 10, .L1145
-	adrp	x0, .LANCHOR4
+	mov	w0, 1
+	strh	w0, [x28, 318]
+	ldr	w0, [x24, #:lo12:.LANCHOR9]
+	add	w22, w22, 1
+	ldp	x4, x8, [x29, 104]
+	ldr	x3, [x29, 120]
+	tbz	x0, 10, .L1221
+	adrp	x0, .LANCHOR5
 	ldr	w6, [x4, x3]
 	ldrh	w5, [x4, x3]
-	ldr	x1, [x0, #:lo12:.LANCHOR4]
-	ldr	x0, [x21, #:lo12:.LANCHOR3]
+	ldr	x1, [x0, #:lo12:.LANCHOR5]
+	ldr	x0, [x23, #:lo12:.LANCHOR3]
 	ubfx	x6, x6, 11, 8
+	ldrh	w4, [x28, 56]
 	and	w5, w5, 2047
 	add	x3, x0, x3
-	ldr	x0, [x29, 136]
+	adrp	x0, .LC80
+	add	x0, x0, :lo12:.LC80
 	ldrb	w2, [x3, 2]
-	ldrh	w4, [x0, 56]
-	adrp	x0, .LC69
-	ldrh	w3, [x1, x25, lsl 1]
-	add	x0, x0, :lo12:.LC69
-	ubfx	x2, x2, 5, 3
+	ldrh	w3, [x1, x8, lsl 1]
 	mov	w1, w26
-.L1180:
+	ubfx	x2, x2, 5, 3
+.L1306:
 	bl	printf
-.L1145:
-	ldr	w0, [x29, 156]
-	cmp	w0, 4
+.L1221:
+	cmp	w22, 4
+	ccmp	w27, 4, 2, ls
+	bhi	.L1224
+.L1217:
 	ldr	w0, [x29, 152]
-	ccmp	w0, 4, 2, ls
-	bhi	.L1146
-.L1143:
-	add	w8, w26, 1
-	and	w26, w8, 65535
-	b	.L1142
-.L1144:
-	ldr	x1, [x29, 120]
-	sub	w0, w20, w27
-	ldrh	w1, [x1]
-	cmp	w0, w1
-	ble	.L1145
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	str	w0, [x29, 152]
+	b	.L1215
+.L1218:
+	cmp	w0, 2
+	b	.L1305
+.L1220:
+	ldr	x2, [x29, 128]
+	ldr	w0, [x29, 156]
+	sub	w0, w0, w20
+	ldrh	w2, [x2]
+	cmp	w0, w2
+	ble	.L1221
 	ldrh	w0, [x4, x3]
-	add	w1, w27, 1
+	add	w2, w20, 2
 	and	w0, w0, 2047
+	cmp	w0, w2
+	ble	.L1223
+	cbz	w1, .L1221
+	ldr	w0, [x4, x3]
+	add	w1, w21, 2
+	ubfx	x0, x0, 11, 8
 	cmp	w0, w1
-	bgt	.L1145
-	stp	x4, x3, [x29, 104]
+	bgt	.L1221
+.L1223:
+	stp	x4, x8, [x29, 104]
 	mov	w2, 1
+	str	x3, [x29, 120]
 	mov	w1, 0
 	mov	w0, w26
 	bl	gc_add_sblk
-	ldr	w0, [x29, 152]
-	ldp	x4, x3, [x29, 104]
-	add	w0, w0, 1
-	str	w0, [x29, 152]
-	ldr	w0, [x24, #:lo12:.LANCHOR7]
-	tbz	x0, 10, .L1145
-	adrp	x0, .LANCHOR4
+	mov	w0, 1
+	strh	w0, [x28, 318]
+	ldr	w0, [x24, #:lo12:.LANCHOR9]
+	add	w27, w27, 1
+	ldp	x4, x8, [x29, 104]
+	ldr	x3, [x29, 120]
+	tbz	x0, 10, .L1221
+	adrp	x0, .LANCHOR5
 	ldr	w6, [x4, x3]
 	ldrh	w5, [x4, x3]
-	ldr	x1, [x0, #:lo12:.LANCHOR4]
-	ldr	x0, [x21, #:lo12:.LANCHOR3]
+	ldr	x1, [x0, #:lo12:.LANCHOR5]
+	ldr	x0, [x23, #:lo12:.LANCHOR3]
 	ubfx	x6, x6, 11, 8
 	and	w5, w5, 2047
+	ldrh	w4, [x28, 56]
 	add	x3, x0, x3
-	ldr	x0, [x29, 136]
+	adrp	x0, .LC81
+	add	x0, x0, :lo12:.LC81
 	ldrb	w2, [x3, 2]
-	ldrh	w4, [x0, 56]
-	adrp	x0, .LC70
-	ldrh	w3, [x1, x25, lsl 1]
-	add	x0, x0, :lo12:.LC70
-	ubfx	x2, x2, 5, 3
+	ldrh	w3, [x1, x8, lsl 1]
 	mov	w1, w26
-	b	.L1180
-.L1140:
-	ldr	x2, [x22, #:lo12:.LANCHOR97]
-	ldr	x1, [x21, #:lo12:.LANCHOR3]
-	ldrh	w5, [x23, #:lo12:.LANCHOR2]
-	ldrh	w0, [x2, 134]
-	add	x1, x1, x0, uxth 2
-.L1149:
-	cmp	w0, w5
-	bcc	.L1151
-	ldrh	w0, [x2, 72]
-	add	w0, w19, w0
-	strh	w0, [x2, 72]
-	ldrh	w0, [x2, 98]
-	cmp	w19, w0
-	bcs	.L1148
-	sub	w19, w0, w19
-	strh	w19, [x2, 98]
-	b	.L1148
-.L1151:
-	ldr	w3, [x1]
+	ubfx	x2, x2, 5, 3
+	b	.L1306
+.L1241:
+	mov	w27, 0
+	mov	w22, 0
+	b	.L1214
+.L1230:
+	ldr	w3, [x0]
 	ubfx	x4, x3, 11, 8
-	cmp	w19, w4
-	bhi	.L1150
-	sub	w4, w4, w19
+	cmp	w21, w4
+	bhi	.L1229
+	ldrb	w6, [x0, 2]
+	tst	w6, 24
+	beq	.L1229
+	sub	w4, w4, w21
 	bfi	w3, w4, 11, 8
-	str	w3, [x1]
-.L1150:
-	add	w0, w0, 1
-	add	x1, x1, 4
-	and	w0, w0, 65535
-	b	.L1149
-.L1155:
-	ldrh	w3, [x1]
+	str	w3, [x0]
+.L1229:
+	add	w1, w1, 1
+	add	x0, x0, 4
+	and	w1, w1, 65535
+	b	.L1228
+.L1236:
+	ldrh	w3, [x0]
 	and	w4, w3, 2047
-	cmp	w4, w27
-	blt	.L1154
-	sub	w4, w4, w27
+	cmp	w4, w20
+	blt	.L1235
+	ldrb	w5, [x0, 2]
+	and	w5, w5, 24
+	cmp	w5, 16
+	beq	.L1235
+	sub	w4, w4, w20
 	bfi	w3, w4, 0, 11
-	strh	w3, [x1]
-.L1154:
-	add	w0, w0, 1
-	add	x1, x1, 4
-	and	w0, w0, 65535
-	b	.L1153
+	strh	w3, [x0]
+.L1235:
+	add	w1, w1, 1
+	add	x0, x0, 4
+	and	w1, w1, 65535
+	b	.L1234
+.L1240:
+	mov	w27, 0
+	mov	w22, 0
+	b	.L1192
 	.size	gc_static_wearleveling, .-gc_static_wearleveling
 	.section	.text.zftl_sblk_list_init,"ax",@progbits
 	.align	2
@@ -6895,77 +7562,80 @@ zftl_sblk_list_init:
 	adrp	x28, .LANCHOR0
 	stp	x19, x20, [sp, 16]
 	ldrh	w2, [x27, #:lo12:.LANCHOR2]
-	adrp	x20, .LANCHOR86
+	adrp	x20, .LANCHOR90
 	stp	x21, x22, [sp, 32]
-	adrp	x19, .LANCHOR82
+	adrp	x19, .LANCHOR86
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR93
+	adrp	x22, .LANCHOR97
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR97
+	adrp	x25, .LANCHOR100
 	mul	w2, w2, w0
 	ldr	x0, [x28, #:lo12:.LANCHOR0]
-	adrp	x24, .LANCHOR89
-	adrp	x23, .LANCHOR91
-	adrp	x21, .LANCHOR84
+	adrp	x24, .LANCHOR93
+	adrp	x23, .LANCHOR95
+	adrp	x21, .LANCHOR88
 	bl	ftl_memset
 	str	x28, [x29, 168]
-	adrp	x2, .LANCHOR72
-	adrp	x3, .LANCHOR80
-	adrp	x10, .LANCHOR90
-	adrp	x8, .LANCHOR92
-	ldrb	w0, [x2, #:lo12:.LANCHOR72]
-	adrp	x7, .LANCHOR94
-	ldrh	w1, [x3, #:lo12:.LANCHOR80]
-	adrp	x6, .LANCHOR76
-	adrp	x5, .LANCHOR75
-	adrp	x4, .LANCHOR74
-	str	xzr, [x10, #:lo12:.LANCHOR90]
+	adrp	x0, .LANCHOR99
+	adrp	x2, .LANCHOR76
+	adrp	x3, .LANCHOR75
+	mov	w1, 16
+	strh	w1, [x0, #:lo12:.LANCHOR99]
+	adrp	x10, .LANCHOR94
+	ldrb	w0, [x2, #:lo12:.LANCHOR76]
+	adrp	x8, .LANCHOR96
+	ldrh	w1, [x3, #:lo12:.LANCHOR75]
+	adrp	x7, .LANCHOR98
+	adrp	x6, .LANCHOR79
+	adrp	x5, .LANCHOR8
+	adrp	x4, .LANCHOR78
+	str	xzr, [x10, #:lo12:.LANCHOR94]
+	str	xzr, [x8, #:lo12:.LANCHOR96]
 	adrp	x28, .LANCHOR3
-	str	xzr, [x8, #:lo12:.LANCHOR92]
 	mul	w1, w0, w1
 	mov	w0, 32768
-	str	xzr, [x7, #:lo12:.LANCHOR94]
-	str	xzr, [x6, #:lo12:.LANCHOR76]
-	str	xzr, [x5, #:lo12:.LANCHOR75]
+	str	xzr, [x7, #:lo12:.LANCHOR98]
+	str	xzr, [x6, #:lo12:.LANCHOR79]
+	str	xzr, [x5, #:lo12:.LANCHOR8]
 	sdiv	w0, w0, w1
-	str	xzr, [x4, #:lo12:.LANCHOR74]
-	strh	wzr, [x24, #:lo12:.LANCHOR89]
-	strh	wzr, [x23, #:lo12:.LANCHOR91]
-	strh	wzr, [x22, #:lo12:.LANCHOR93]
+	str	xzr, [x4, #:lo12:.LANCHOR78]
+	strh	wzr, [x24, #:lo12:.LANCHOR93]
+	strh	wzr, [x23, #:lo12:.LANCHOR95]
+	strh	wzr, [x22, #:lo12:.LANCHOR97]
 	sxth	w0, w0
 	str	w0, [x29, 188]
-	ldr	x0, [x25, #:lo12:.LANCHOR97]
-	strh	wzr, [x21, #:lo12:.LANCHOR84]
-	strh	wzr, [x20, #:lo12:.LANCHOR86]
-	strh	wzr, [x19, #:lo12:.LANCHOR82]
+	ldr	x0, [x25, #:lo12:.LANCHOR100]
+	strh	wzr, [x21, #:lo12:.LANCHOR88]
+	strh	wzr, [x20, #:lo12:.LANCHOR90]
+	strh	wzr, [x19, #:lo12:.LANCHOR86]
 	strh	wzr, [x0, 146]
 	ldrsh	w26, [x0, 134]
 	add	x0, x27, :lo12:.LANCHOR2
-	adrp	x27, .LC71
-	add	x27, x27, :lo12:.LC71
+	adrp	x27, .LC82
+	add	x27, x27, :lo12:.LC82
 	stp	x3, x2, [x29, 104]
 	stp	x4, x5, [x29, 120]
 	stp	x6, x7, [x29, 136]
 	stp	x8, x10, [x29, 152]
 	str	x0, [x29, 176]
-.L1182:
+.L1308:
 	ldr	x0, [x29, 176]
 	ldrh	w0, [x0]
 	cmp	w26, w0
-	blt	.L1198
-	ldr	x0, [x25, #:lo12:.LANCHOR97]
-	ldrh	w1, [x24, #:lo12:.LANCHOR89]
+	blt	.L1324
+	ldr	x0, [x25, #:lo12:.LANCHOR100]
+	ldrh	w1, [x24, #:lo12:.LANCHOR93]
 	ldp	x25, x26, [sp, 64]
 	strh	w1, [x0, 114]
-	ldrh	w1, [x23, #:lo12:.LANCHOR91]
+	ldrh	w1, [x23, #:lo12:.LANCHOR95]
 	strh	w1, [x0, 118]
-	ldrh	w1, [x22, #:lo12:.LANCHOR93]
+	ldrh	w1, [x22, #:lo12:.LANCHOR97]
 	strh	w1, [x0, 116]
-	ldrh	w1, [x21, #:lo12:.LANCHOR84]
+	ldrh	w1, [x21, #:lo12:.LANCHOR88]
 	strh	w1, [x0, 122]
-	ldrh	w1, [x20, #:lo12:.LANCHOR86]
+	ldrh	w1, [x20, #:lo12:.LANCHOR90]
 	strh	w1, [x0, 120]
-	ldrh	w1, [x19, #:lo12:.LANCHOR82]
+	ldrh	w1, [x19, #:lo12:.LANCHOR86]
 	strh	w1, [x0, 124]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6973,27 +7643,28 @@ zftl_sblk_list_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L1198:
+.L1324:
 	ldr	x4, [x28, #:lo12:.LANCHOR3]
 	sxtw	x2, w26
 	add	x4, x4, x2, lsl 2
 	ldrb	w6, [x4, 3]
-	cbz	w6, .L1199
+	cbz	w6, .L1325
 	ldr	x0, [x29, 112]
 	mov	w1, 0
-	ldr	x7, [x25, #:lo12:.LANCHOR97]
-	ldrb	w8, [x0, #:lo12:.LANCHOR72]
+	ldr	x7, [x25, #:lo12:.LANCHOR100]
+	ldrb	w8, [x0, #:lo12:.LANCHOR76]
 	ldr	x0, [x29, 104]
-	ldrh	w10, [x0, #:lo12:.LANCHOR80]
+	ldrh	w10, [x0, #:lo12:.LANCHOR75]
 	mov	w0, 0
-.L1184:
+.L1310:
 	cmp	w1, w8
-	blt	.L1187
-	cbz	w0, .L1188
+	blt	.L1313
+	cbz	w0, .L1314
 	mov	w1, 32768
 	sdiv	w0, w1, w0
+	add	w0, w0, 1
 	sxth	w0, w0
-.L1183:
+.L1309:
 	ldr	x3, [x29, 168]
 	mov	w1, 6
 	smull	x1, w26, w1
@@ -7008,120 +7679,120 @@ zftl_sblk_list_init:
 	and	w0, w1, 224
 	cmp	w0, 32
 	ccmp	w0, w5, 4, ne
-	beq	.L1189
-	adrp	x5, .LANCHOR5
-	ldr	x5, [x5, #:lo12:.LANCHOR5]
+	beq	.L1315
+	adrp	x5, .LANCHOR6
+	ldr	x5, [x5, #:lo12:.LANCHOR6]
 	ldrh	w6, [x5, 16]
 	cmp	w26, w6
-	beq	.L1189
+	beq	.L1315
 	ldrh	w6, [x5, 48]
 	cmp	w26, w6
-	beq	.L1189
+	beq	.L1315
 	ldrh	w5, [x5, 80]
 	cmp	w26, w5
-	beq	.L1189
+	beq	.L1315
 	cmp	w0, 64
-	bne	.L1190
+	bne	.L1316
 	ldr	x0, [x29, 128]
-	add	x2, x21, :lo12:.LANCHOR84
+	add	x2, x21, :lo12:.LANCHOR88
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR75
-.L1202:
+	add	x0, x0, :lo12:.LANCHOR8
+.L1328:
 	bl	_insert_data_list
-.L1189:
+.L1315:
 	add	w3, w26, 1
 	sxth	w26, w3
-	b	.L1182
-.L1187:
+	b	.L1308
+.L1313:
 	asr	w5, w6, w1
-	tbnz	x5, 0, .L1185
+	tbnz	x5, 0, .L1311
 	add	w0, w10, w0
 	sxth	w0, w0
-.L1186:
+.L1312:
 	add	w1, w1, 1
-	b	.L1184
-.L1185:
+	b	.L1310
+.L1311:
 	ldrh	w5, [x7, 146]
 	add	w5, w5, 1
 	strh	w5, [x7, 146]
-	b	.L1186
-.L1188:
+	b	.L1312
+.L1314:
 	ldrb	w1, [x4, 2]
 	mov	w5, -1
 	orr	w1, w1, -32
 	strb	w1, [x4, 2]
-	adrp	x1, .LANCHOR4
-	ldr	x1, [x1, #:lo12:.LANCHOR4]
+	adrp	x1, .LANCHOR5
+	ldr	x1, [x1, #:lo12:.LANCHOR5]
 	strh	w5, [x1, x2, lsl 1]
-	b	.L1183
-.L1199:
+	b	.L1309
+.L1325:
 	ldr	w0, [x29, 188]
-	b	.L1183
-.L1190:
+	b	.L1309
+.L1316:
 	cmp	w0, 96
-	bne	.L1191
+	bne	.L1317
 	ldr	x0, [x29, 136]
-	add	x2, x19, :lo12:.LANCHOR82
+	add	x2, x19, :lo12:.LANCHOR86
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR76
-	b	.L1202
-.L1191:
+	add	x0, x0, :lo12:.LANCHOR79
+	b	.L1328
+.L1317:
 	cmp	w0, 160
-	bne	.L1192
+	bne	.L1318
 	ldr	x0, [x29, 120]
-	add	x2, x20, :lo12:.LANCHOR86
+	add	x2, x20, :lo12:.LANCHOR90
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR74
-	b	.L1202
-.L1192:
-	cbnz	w0, .L1189
-	adrp	x0, .LANCHOR4
-	ldr	x0, [x0, #:lo12:.LANCHOR4]
+	add	x0, x0, :lo12:.LANCHOR78
+	b	.L1328
+.L1318:
+	cbnz	w0, .L1315
+	adrp	x0, .LANCHOR5
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	ldrh	w2, [x0, x2, lsl 1]
-	cbz	w2, .L1193
+	cbz	w2, .L1319
 	str	x4, [x29, 96]
 	mov	w1, w26
 	mov	x0, x27
 	bl	printf
 	ldr	x4, [x29, 96]
 	ldrb	w0, [x4, 2]
-	tbz	x0, 4, .L1194
+	tbz	x0, 4, .L1320
 	mov	w1, 5
-.L1201:
+.L1327:
 	bfi	w0, w1, 5, 3
 	strb	w0, [x4, 2]
 	mov	w2, 0
 	mov	w1, 1
 	mov	w0, w26
 	bl	gc_add_sblk
-	b	.L1189
-.L1194:
+	b	.L1315
+.L1320:
 	mov	w1, 2
-	b	.L1201
-.L1193:
+	b	.L1327
+.L1319:
 	ands	w1, w1, 24
-	bne	.L1196
+	bne	.L1322
 	ldr	x0, [x29, 160]
-	add	x2, x24, :lo12:.LANCHOR89
+	add	x2, x24, :lo12:.LANCHOR93
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR90
-.L1203:
+	add	x0, x0, :lo12:.LANCHOR94
+.L1329:
 	bl	_insert_free_list
-	b	.L1189
-.L1196:
+	b	.L1315
+.L1322:
 	cmp	w1, 16
-	bne	.L1197
+	bne	.L1323
 	ldr	x0, [x29, 152]
-	add	x2, x23, :lo12:.LANCHOR91
+	add	x2, x23, :lo12:.LANCHOR95
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR92
-	b	.L1203
-.L1197:
+	add	x0, x0, :lo12:.LANCHOR96
+	b	.L1329
+.L1323:
 	ldr	x0, [x29, 144]
-	add	x2, x22, :lo12:.LANCHOR93
+	add	x2, x22, :lo12:.LANCHOR97
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR94
-	b	.L1203
+	add	x0, x0, :lo12:.LANCHOR98
+	b	.L1329
 	.size	zftl_sblk_list_init, .-zftl_sblk_list_init
 	.section	.text.ftl_open_sblk_init,"ax",@progbits
 	.align	2
@@ -7131,19 +7802,19 @@ ftl_open_sblk_init:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR72
+	adrp	x20, .LANCHOR76
 	stp	x21, x22, [sp, 32]
 	mov	x19, x0
 	stp	x23, x24, [sp, 48]
-	adrp	x21, .LC64
-	adrp	x23, .LANCHOR80
+	adrp	x21, .LC70
+	adrp	x23, .LANCHOR83
 	mov	w22, w1
-	add	x23, x23, :lo12:.LANCHOR80
-	add	x20, x20, :lo12:.LANCHOR72
-	add	x21, x21, :lo12:.LC64
+	add	x23, x23, :lo12:.LANCHOR83
+	add	x20, x20, :lo12:.LANCHOR76
+	add	x21, x21, :lo12:.LC70
 	stp	x25, x26, [sp, 64]
-.L1205:
-.L1208:
+.L1331:
+.L1334:
 	mov	w0, w22
 	bl	ftl_alloc_sblk
 	mov	w1, 0
@@ -7163,40 +7834,40 @@ ftl_open_sblk_init:
 	strh	w0, [x19, 6]
 	strh	wzr, [x19, 10]
 	strb	w22, [x19, 4]
-	beq	.L1209
+	beq	.L1335
 	ldrb	w0, [x20]
 	mul	w0, w1, w0
 	and	w0, w0, 65535
-.L1206:
+.L1332:
 	ldrb	w2, [x20]
-	adrp	x26, .LANCHOR4
+	adrp	x26, .LANCHOR5
 	strh	w0, [x19, 12]
 	ubfiz	x25, x24, 1, 16
 	mul	w2, w2, w1
-	adrp	x1, .LANCHOR109
-	ldr	x3, [x1, #:lo12:.LANCHOR109]
+	adrp	x1, .LANCHOR114
+	ldr	x3, [x1, #:lo12:.LANCHOR114]
 	mov	w1, 255
 	lsl	w2, w2, 2
 	add	x0, x3, x0, uxth 2
 	bl	ftl_memset
-	ldr	x0, [x26, #:lo12:.LANCHOR4]
+	ldr	x0, [x26, #:lo12:.LANCHOR5]
 	ldrh	w1, [x19, 6]
 	strh	w1, [x0, x25]
 	ldrb	w0, [x19, 9]
-	cbnz	w0, .L1204
+	cbnz	w0, .L1330
 	mov	w1, w24
 	mov	x0, x21
 	bl	printf
-	ldr	x0, [x26, #:lo12:.LANCHOR4]
+	ldr	x0, [x26, #:lo12:.LANCHOR5]
 	mov	w1, -1
 	strh	w1, [x0, x25]
 	mov	w0, 7
 	strb	w0, [x19, 4]
-	b	.L1208
-.L1209:
+	b	.L1334
+.L1335:
 	mov	w0, 0
-	b	.L1206
-.L1204:
+	b	.L1332
+.L1330:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -7212,34 +7883,34 @@ pm_free_sblk:
 	stp	x29, x30, [sp, -368]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR134
+	adrp	x20, .LANCHOR140
 	stp	x21, x22, [sp, 32]
-	ldrh	w0, [x20, #:lo12:.LANCHOR134]
+	ldrh	w0, [x20, #:lo12:.LANCHOR140]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w0, 128
 	stp	x27, x28, [sp, 80]
-	bls	.L1212
-	adrp	x1, .LANCHOR135
+	bls	.L1338
+	adrp	x1, .LANCHOR141
 	adrp	x0, .LC0
-	mov	w2, 76
-	add	x1, x1, :lo12:.LANCHOR135
+	mov	w2, 78
+	add	x1, x1, :lo12:.LANCHOR141
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1212:
+.L1338:
 	add	x28, x29, 112
 	mov	w2, 256
 	mov	w1, 0
 	mov	x0, x28
 	bl	ftl_memset
-	adrp	x23, .LANCHOR95
-	adrp	x5, .LANCHOR97
-	adrp	x0, .LANCHOR96
+	adrp	x23, .LANCHOR101
+	adrp	x5, .LANCHOR100
+	adrp	x0, .LANCHOR102
 	mov	w2, 21
-	ldrb	w12, [x23, #:lo12:.LANCHOR95]
-	ldr	x7, [x5, #:lo12:.LANCHOR97]
-	ldrh	w11, [x0, #:lo12:.LANCHOR96]
-	ldrh	w13, [x20, #:lo12:.LANCHOR134]
+	ldrb	w12, [x23, #:lo12:.LANCHOR101]
+	ldr	x7, [x5, #:lo12:.LANCHOR100]
+	ldrh	w11, [x0, #:lo12:.LANCHOR102]
+	ldrh	w13, [x20, #:lo12:.LANCHOR140]
 	add	x4, x7, 704
 	sub	w0, w2, w11
 	mov	w2, 1
@@ -7248,26 +7919,26 @@ pm_free_sblk:
 	sub	w2, w2, #1
 	add	x1, x1, 176
 	add	x1, x7, x1, lsl 2
-.L1213:
+.L1339:
 	cmp	x4, x1
-	bne	.L1217
-	adrp	x24, .LANCHOR72
-	adrp	x25, .LANCHOR80
-	adrp	x26, .LANCHOR7
-	adrp	x27, .LC72
-	ldrb	w22, [x24, #:lo12:.LANCHOR72]
-	add	x20, x20, :lo12:.LANCHOR134
-	ldrh	w0, [x25, #:lo12:.LANCHOR80]
-	add	x26, x26, :lo12:.LANCHOR7
-	add	x27, x27, :lo12:.LC72
+	bne	.L1343
+	adrp	x24, .LANCHOR76
+	adrp	x25, .LANCHOR83
+	adrp	x26, .LANCHOR9
+	adrp	x27, .LC83
+	ldrb	w22, [x24, #:lo12:.LANCHOR76]
+	add	x20, x20, :lo12:.LANCHOR140
+	ldrh	w0, [x25, #:lo12:.LANCHOR83]
+	add	x26, x26, :lo12:.LANCHOR9
+	add	x27, x27, :lo12:.LC83
 	mov	w19, 0
 	str	wzr, [x29, 108]
 	mul	w22, w22, w0
 	and	w22, w22, 65535
-.L1218:
+.L1344:
 	ldrh	w0, [x20]
 	cmp	w0, w19
-	bhi	.L1224
+	bhi	.L1350
 	ldr	w0, [x29, 108]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -7276,7 +7947,7 @@ pm_free_sblk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 368
 	ret
-.L1217:
+.L1343:
 	ldr	w0, [x4]
 	add	x8, x7, 416
 	mov	x3, 0
@@ -7284,47 +7955,47 @@ pm_free_sblk:
 	and	w0, w0, w2
 	udiv	w0, w0, w12
 	and	w0, w0, 65535
-.L1214:
+.L1340:
 	cmp	w13, w3, uxth
-	bhi	.L1216
+	bhi	.L1342
 	add	x4, x4, 4
-	b	.L1213
-.L1216:
+	b	.L1339
+.L1342:
 	ldrh	w10, [x8]
 	cmp	w10, w0
-	bne	.L1215
+	bne	.L1341
 	ldrh	w10, [x28, x3, lsl 1]
 	add	w10, w10, 1
 	strh	w10, [x28, x3, lsl 1]
-.L1215:
+.L1341:
 	add	x3, x3, 1
 	add	x8, x8, 2
-	b	.L1214
-.L1224:
-	ldr	x1, [x5, #:lo12:.LANCHOR97]
+	b	.L1340
+.L1350:
+	ldr	x1, [x5, #:lo12:.LANCHOR100]
 	sxtw	x21, w19
 	add	x0, x21, 208
-	ldrb	w2, [x23, #:lo12:.LANCHOR95]
+	ldrb	w2, [x23, #:lo12:.LANCHOR101]
 	ldrh	w3, [x1, x0, lsl 1]
 	ldrh	w0, [x1, 692]
 	sdiv	w0, w0, w2
 	cmp	w0, w3
-	bne	.L1219
-	ldrb	w0, [x24, #:lo12:.LANCHOR72]
-	ldrh	w2, [x25, #:lo12:.LANCHOR80]
+	bne	.L1345
+	ldrb	w0, [x24, #:lo12:.LANCHOR76]
+	ldrh	w2, [x25, #:lo12:.LANCHOR83]
 	mul	w0, w0, w2
 	strh	w0, [x28, x21, lsl 1]
-.L1219:
+.L1345:
 	ldrh	w0, [x28, x21, lsl 1]
 	cmp	w22, w0
-	bls	.L1220
-	cbnz	w0, .L1225
-.L1222:
+	bls	.L1346
+	cbnz	w0, .L1351
+.L1348:
 	mov	w0, 65535
 	cmp	w3, w0
-	beq	.L1221
+	beq	.L1347
 	ldr	w0, [x26]
-	tbz	x0, 12, .L1223
+	tbz	x0, 12, .L1349
 	ldrh	w4, [x1, 688]
 	mov	w2, 0
 	str	x5, [x29, 96]
@@ -7332,30 +8003,30 @@ pm_free_sblk:
 	mov	x0, x27
 	bl	printf
 	ldr	x5, [x29, 96]
-.L1223:
-	ldr	x0, [x5, #:lo12:.LANCHOR97]
+.L1349:
+	ldr	x0, [x5, #:lo12:.LANCHOR100]
 	add	x21, x21, 208
 	str	x5, [x29, 96]
 	ldrh	w0, [x0, x21, lsl 1]
 	bl	ftl_free_sblk
 	ldr	x5, [x29, 96]
 	mov	w1, -1
-	ldr	x0, [x5, #:lo12:.LANCHOR97]
+	ldr	x0, [x5, #:lo12:.LANCHOR100]
 	strh	w1, [x0, x21, lsl 1]
 	ldrh	w1, [x0, 688]
 	sub	w1, w1, #1
 	strh	w1, [x0, 688]
-	b	.L1221
-.L1220:
-	cbz	w0, .L1222
-.L1221:
+	b	.L1347
+.L1346:
+	cbz	w0, .L1348
+.L1347:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1218
-.L1225:
+	b	.L1344
+.L1351:
 	mov	w22, w0
 	str	w19, [x29, 108]
-	b	.L1221
+	b	.L1347
 	.size	pm_free_sblk, .-pm_free_sblk
 	.section	.text.idb_init,"ax",@progbits
 	.align	2
@@ -7387,24 +8058,24 @@ ftl_memcpy:
 	.type	flash_into_data_init, %function
 flash_into_data_init:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR7
+	adrp	x0, .LANCHOR9
 	add	x29, sp, 0
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
 	str	x19, [sp, 16]
-	tbz	x0, 12, .L1234
-	adrp	x2, .LANCHOR136
-	adrp	x0, .LC73
-	add	x2, x2, :lo12:.LANCHOR136
+	tbz	x0, 12, .L1360
+	adrp	x2, .LANCHOR142
+	adrp	x0, .LC84
+	add	x2, x2, :lo12:.LANCHOR142
 	mov	w1, 100
-	add	x0, x0, :lo12:.LC73
+	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L1234:
-	adrp	x19, .LANCHOR20
+.L1360:
+	adrp	x19, .LANCHOR22
 	mov	w2, 2048
 	mov	w1, 0
-	ldr	x0, [x19, #:lo12:.LANCHOR20]
+	ldr	x0, [x19, #:lo12:.LANCHOR22]
 	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR20]
+	ldr	x0, [x19, #:lo12:.LANCHOR22]
 	mov	w1, 21321
 	movk	w1, 0x5359, lsl 16
 	mov	w2, 32
@@ -7414,15 +8085,15 @@ flash_into_data_init:
 	str	w1, [x0, -72]
 	mov	w1, 1
 	strh	w1, [x0, -64]
-	adrp	x1, .LANCHOR13
-	add	x1, x1, :lo12:.LANCHOR13
+	adrp	x1, .LANCHOR15
+	add	x1, x1, :lo12:.LANCHOR15
 	bl	ftl_memcpy
-	ldr	x0, [x19, #:lo12:.LANCHOR20]
+	ldr	x0, [x19, #:lo12:.LANCHOR22]
 	mov	w2, 32
 	ldr	x19, [sp, 16]
-	adrp	x1, .LANCHOR32
+	adrp	x1, .LANCHOR34
 	ldp	x29, x30, [sp], 32
-	add	x1, x1, :lo12:.LANCHOR32
+	add	x1, x1, :lo12:.LANCHOR34
 	add	x0, x0, 48
 	b	ftl_memcpy
 	.size	flash_into_data_init, .-flash_into_data_init
@@ -7432,15 +8103,15 @@ flash_into_data_init:
 	.type	ftl_memcpy32, %function
 ftl_memcpy32:
 	mov	x3, 0
-.L1240:
+.L1366:
 	cmp	w2, w3
-	bhi	.L1241
+	bhi	.L1367
 	ret
-.L1241:
+.L1367:
 	ldr	w4, [x1, x3, lsl 2]
 	str	w4, [x0, x3, lsl 2]
 	add	x3, x3, 1
-	b	.L1240
+	b	.L1366
 	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.ftl_memcmp,"ax",@progbits
 	.align	2
@@ -7476,47 +8147,47 @@ nandc_init:
 	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR7
+	adrp	x21, .LANCHOR9
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	ldr	w0, [x21, #:lo12:.LANCHOR7]
+	ldr	w0, [x21, #:lo12:.LANCHOR9]
 	str	wzr, [x29, 56]
-	tbz	x0, 12, .L1246
-	adrp	x1, .LANCHOR137
-	adrp	x0, .LC74
+	tbz	x0, 12, .L1372
+	adrp	x1, .LANCHOR143
+	adrp	x0, .LC85
 	mov	x2, x19
-	add	x1, x1, :lo12:.LANCHOR137
-	add	x0, x0, :lo12:.LC74
+	add	x1, x1, :lo12:.LANCHOR143
+	add	x0, x0, :lo12:.LC85
 	bl	printf
-.L1246:
-	adrp	x20, .LANCHOR22
+.L1372:
+	adrp	x20, .LANCHOR24
 	mov	w0, 6
 	ldr	w2, [x19, 352]
 	mov	w1, 12336
-	strb	w0, [x20, #:lo12:.LANCHOR22]
-	adrp	x0, .LANCHOR21
+	strb	w0, [x20, #:lo12:.LANCHOR24]
+	adrp	x0, .LANCHOR23
 	movk	w1, 0x5638, lsl 16
 	mov	x22, x0
-	str	x19, [x0, #:lo12:.LANCHOR21]
+	str	x19, [x0, #:lo12:.LANCHOR23]
 	cmp	w2, w1
-	bne	.L1247
+	bne	.L1373
 	mov	w0, 8
-	strb	w0, [x20, #:lo12:.LANCHOR22]
-.L1247:
+	strb	w0, [x20, #:lo12:.LANCHOR24]
+.L1373:
 	ldr	w1, [x19, 128]
 	mov	w0, 12336
 	movk	w0, 0x5639, lsl 16
 	cmp	w1, w0
-	bne	.L1248
+	bne	.L1374
 	mov	w0, 9
-	strb	w0, [x20, #:lo12:.LANCHOR22]
-.L1248:
-	ldrb	w0, [x20, #:lo12:.LANCHOR22]
+	strb	w0, [x20, #:lo12:.LANCHOR24]
+.L1374:
+	ldrb	w0, [x20, #:lo12:.LANCHOR24]
 	cmp	w0, 9
-	adrp	x0, .LANCHOR41
-	bne	.L1249
+	adrp	x0, .LANCHOR43
+	bne	.L1375
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR41]
+	strb	w1, [x0, #:lo12:.LANCHOR43]
 	ldr	w0, [x29, 56]
 	orr	w0, w0, 256
 	str	w0, [x29, 56]
@@ -7534,38 +8205,38 @@ nandc_init:
 	str	w0, [x19, 84]
 	mov	w0, 39
 	str	w0, [x19, 84]
-	ldr	w0, [x21, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L1251
+	ldr	w0, [x21, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L1377
 	ldr	w1, [x19]
 	ldr	w2, [x19, 8]
 	ldr	w3, [x19, 80]
 	ldr	w4, [x19, 84]
 	ldr	w5, [x19, 88]
-.L1264:
-	adrp	x0, .LC75
-	add	x0, x0, :lo12:.LC75
+.L1390:
+	adrp	x0, .LC86
+	add	x0, x0, :lo12:.LC86
 	bl	printf
-.L1251:
-	adrp	x0, .LANCHOR42
-	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR42]
+.L1377:
 	adrp	x0, .LANCHOR44
-	strh	wzr, [x0, #:lo12:.LANCHOR44]
-	adrp	x0, .LANCHOR40
-	strb	wzr, [x0, #:lo12:.LANCHOR40]
-	ldr	w0, [x21, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L1245
-	ldrb	w1, [x20, #:lo12:.LANCHOR22]
-	adrp	x0, .LC76
-	add	x0, x0, :lo12:.LC76
+	mov	w1, 1
+	strb	w1, [x0, #:lo12:.LANCHOR44]
+	adrp	x0, .LANCHOR46
+	strh	wzr, [x0, #:lo12:.LANCHOR46]
+	adrp	x0, .LANCHOR42
+	strb	wzr, [x0, #:lo12:.LANCHOR42]
+	ldr	w0, [x21, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L1371
+	ldrb	w1, [x20, #:lo12:.LANCHOR24]
+	adrp	x0, .LC87
+	add	x0, x0, :lo12:.LC87
 	bl	printf
-.L1245:
+.L1371:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1249:
-	strb	wzr, [x0, #:lo12:.LANCHOR41]
+.L1375:
+	strb	wzr, [x0, #:lo12:.LANCHOR43]
 	ldr	w0, [x29, 56]
 	orr	w0, w0, 256
 	str	w0, [x29, 56]
@@ -7585,17 +8256,17 @@ nandc_init:
 	str	w0, [x19, 308]
 	mov	w0, 2048
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR43
-	str	x0, [x1, #:lo12:.LANCHOR43]
-	ldr	w0, [x21, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L1251
-	ldr	x0, [x22, #:lo12:.LANCHOR21]
+	adrp	x1, .LANCHOR45
+	str	x0, [x1, #:lo12:.LANCHOR45]
+	ldr	w0, [x21, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L1377
+	ldr	x0, [x22, #:lo12:.LANCHOR23]
 	ldr	w1, [x0]
 	ldr	w2, [x0, 344]
 	ldr	w3, [x0, 304]
 	ldr	w4, [x0, 308]
 	ldr	w5, [x0, 312]
-	b	.L1264
+	b	.L1390
 	.size	nandc_init, .-nandc_init
 	.section	.text.buf_init,"ax",@progbits
 	.align	2
@@ -7603,16 +8274,16 @@ nandc_init:
 	.type	buf_init, %function
 buf_init:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LANCHOR46
+	adrp	x0, .LANCHOR48
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	add	x19, x0, :lo12:.LANCHOR46
+	add	x19, x0, :lo12:.LANCHOR48
 	stp	x21, x22, [sp, 32]
 	mov	x20, x0
-	adrp	x22, .LANCHOR117
-	add	x22, x22, :lo12:.LANCHOR117
+	adrp	x22, .LANCHOR123
+	add	x22, x22, :lo12:.LANCHOR123
 	mov	w21, 0
-.L1266:
+.L1392:
 	and	w0, w21, 255
 	strb	w0, [x19, 1]
 	add	w1, w0, 1
@@ -7630,15 +8301,15 @@ buf_init:
 	bl	ftl_malloc
 	str	x0, [x19, -40]
 	cmp	w21, 32
-	bne	.L1266
-	add	x0, x20, :lo12:.LANCHOR46
+	bne	.L1392
+	add	x0, x20, :lo12:.LANCHOR48
 	mov	w1, -1
 	strb	w1, [x0, 1984]
-	adrp	x0, .LANCHOR47
-	strb	wzr, [x0, #:lo12:.LANCHOR47]
-	adrp	x0, .LANCHOR48
+	adrp	x0, .LANCHOR49
+	strb	wzr, [x0, #:lo12:.LANCHOR49]
+	adrp	x0, .LANCHOR50
 	ldp	x19, x20, [sp, 16]
-	strb	w21, [x0, #:lo12:.LANCHOR48]
+	strb	w21, [x0, #:lo12:.LANCHOR50]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
@@ -7649,86 +8320,91 @@ buf_init:
 	.type	gc_init, %function
 gc_init:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR70
+	adrp	x0, .LANCHOR74
 	mov	w2, 328
 	mov	w1, 0
 	add	x29, sp, 0
-	strb	wzr, [x0, #:lo12:.LANCHOR70]
-	adrp	x0, .LANCHOR138
+	strb	wzr, [x0, #:lo12:.LANCHOR74]
+	adrp	x0, .LANCHOR144
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR63
-	add	x19, x20, :lo12:.LANCHOR63
-	strb	wzr, [x0, #:lo12:.LANCHOR138]
+	adrp	x20, .LANCHOR65
+	strb	wzr, [x0, #:lo12:.LANCHOR144]
+	adrp	x0, .LANCHOR145
+	add	x19, x20, :lo12:.LANCHOR65
+	str	wzr, [x0, #:lo12:.LANCHOR145]
+	adrp	x0, .LANCHOR85
+	strh	wzr, [x0, #:lo12:.LANCHOR85]
 	mov	x0, x19
 	bl	ftl_memset
-	mov	w0, -1
-	strh	w0, [x20, #:lo12:.LANCHOR63]
-	adrp	x0, .LANCHOR80
 	str	xzr, [x19, 8]
-	adrp	x4, .LANCHOR88
-	adrp	x20, .LANCHOR71
-	ldrh	w1, [x0, #:lo12:.LANCHOR80]
+	mov	w0, -1
+	strh	w0, [x20, #:lo12:.LANCHOR65]
+	adrp	x0, .LANCHOR83
+	adrp	x4, .LANCHOR92
+	adrp	x20, .LANCHOR75
+	ldrh	w1, [x0, #:lo12:.LANCHOR83]
 	lsr	w2, w1, 1
 	lsr	w0, w1, 2
 	strh	w2, [x19, 38]
-	adrp	x2, .LANCHOR81
+	adrp	x2, .LANCHOR84
 	strh	w0, [x19, 36]
-	adrp	x19, .LANCHOR72
+	adrp	x19, .LANCHOR76
+	strh	wzr, [x2, #:lo12:.LANCHOR84]
+	adrp	x2, .LANCHOR80
+	ldrb	w3, [x19, #:lo12:.LANCHOR76]
+	strh	wzr, [x2, #:lo12:.LANCHOR80]
+	adrp	x2, .LANCHOR81
 	strh	wzr, [x2, #:lo12:.LANCHOR81]
-	adrp	x2, .LANCHOR77
-	ldrb	w3, [x19, #:lo12:.LANCHOR72]
-	strh	wzr, [x2, #:lo12:.LANCHOR77]
-	adrp	x2, .LANCHOR78
-	strh	wzr, [x2, #:lo12:.LANCHOR78]
 	mul	w2, w1, w3
 	and	w2, w2, 65535
 	sub	w5, w2, #32
-	strh	w5, [x4, #:lo12:.LANCHOR88]
-	adrp	x4, .LANCHOR85
-	strh	w2, [x4, #:lo12:.LANCHOR85]
-	adrp	x2, .LANCHOR79
-	strh	w1, [x2, #:lo12:.LANCHOR79]
-	adrp	x1, .LANCHOR62
-	strh	w0, [x1, #:lo12:.LANCHOR62]
-	ldrh	w0, [x20, #:lo12:.LANCHOR71]
+	strh	w5, [x4, #:lo12:.LANCHOR92]
+	adrp	x4, .LANCHOR89
+	strh	w2, [x4, #:lo12:.LANCHOR89]
+	adrp	x2, .LANCHOR82
+	strh	w1, [x2, #:lo12:.LANCHOR82]
+	adrp	x1, .LANCHOR64
+	strh	w0, [x1, #:lo12:.LANCHOR64]
+	ldrh	w0, [x20, #:lo12:.LANCHOR75]
 	mul	w0, w0, w3
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR139
-	str	x0, [x1, #:lo12:.LANCHOR139]
-	ldrb	w1, [x19, #:lo12:.LANCHOR72]
-	ldrh	w0, [x20, #:lo12:.LANCHOR71]
+	adrp	x1, .LANCHOR146
+	str	x0, [x1, #:lo12:.LANCHOR146]
+	ldrb	w1, [x19, #:lo12:.LANCHOR76]
+	ldrh	w0, [x20, #:lo12:.LANCHOR75]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR140
-	str	x0, [x1, #:lo12:.LANCHOR140]
-	ldrh	w1, [x20, #:lo12:.LANCHOR71]
-	ldrb	w0, [x19, #:lo12:.LANCHOR72]
+	adrp	x1, .LANCHOR147
+	str	x0, [x1, #:lo12:.LANCHOR147]
+	ldrh	w1, [x20, #:lo12:.LANCHOR75]
+	ldrb	w0, [x19, #:lo12:.LANCHOR76]
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR68
-	str	x0, [x1, #:lo12:.LANCHOR68]
-	ldrb	w1, [x19, #:lo12:.LANCHOR72]
-	ldrh	w0, [x20, #:lo12:.LANCHOR71]
+	adrp	x1, .LANCHOR72
+	str	x0, [x1, #:lo12:.LANCHOR72]
+	ldrb	w1, [x19, #:lo12:.LANCHOR76]
+	ldrh	w0, [x20, #:lo12:.LANCHOR75]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR64
-	str	x0, [x1, #:lo12:.LANCHOR64]
-	ldrb	w1, [x19, #:lo12:.LANCHOR72]
-	ldrh	w0, [x20, #:lo12:.LANCHOR71]
+	adrp	x1, .LANCHOR68
+	str	x0, [x1, #:lo12:.LANCHOR68]
+	ldrb	w1, [x19, #:lo12:.LANCHOR76]
+	ldrh	w0, [x20, #:lo12:.LANCHOR75]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR141
+	adrp	x1, .LANCHOR148
 	ldp	x19, x20, [sp, 16]
-	str	x0, [x1, #:lo12:.LANCHOR141]
-	adrp	x0, .LANCHOR83
+	str	x0, [x1, #:lo12:.LANCHOR148]
+	adrp	x0, .LANCHOR87
+	adrp	x1, .LANCHOR77
 	ldp	x29, x30, [sp], 32
-	ldrh	w1, [x0, #:lo12:.LANCHOR83]
-	adrp	x0, .LANCHOR73
-	strh	w1, [x0, #:lo12:.LANCHOR73]
+	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	lsr	w0, w0, 2
+	strh	w0, [x1, #:lo12:.LANCHOR77]
 	ret
 	.size	gc_init, .-gc_init
 	.section	.text.ftl_free,"ax",@progbits
@@ -7747,18 +8423,18 @@ js_hash:
 	mov	w0, 42982
 	mov	x3, 0
 	movk	w0, 0x47c6, lsl 16
-.L1273:
+.L1399:
 	cmp	w1, w3
-	bhi	.L1274
+	bhi	.L1400
 	ret
-.L1274:
+.L1400:
 	lsr	w2, w0, 2
 	ldrb	w5, [x4, x3]
 	add	w2, w2, w0, lsl 5
 	add	x3, x3, 1
 	add	w2, w2, w5
 	eor	w0, w0, w2
-	b	.L1273
+	b	.L1399
 	.size	js_hash, .-js_hash
 	.section	.text.timer_get_time,"ax",@progbits
 	.align	2
@@ -7795,8 +8471,8 @@ ftl_get_density:
 	.global	ftl_get_capacity
 	.type	ftl_get_capacity, %function
 ftl_get_capacity:
-	adrp	x0, .LANCHOR59
-	ldr	w0, [x0, #:lo12:.LANCHOR59]
+	adrp	x0, .LANCHOR61
+	ldr	w0, [x0, #:lo12:.LANCHOR61]
 	ret
 	.size	ftl_get_capacity, .-ftl_get_capacity
 	.section	.text.rknand_print_hex,"ax",@progbits
@@ -7807,67 +8483,67 @@ rknand_print_hex:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LC78
+	adrp	x21, .LC89
 	stp	x23, x24, [sp, 48]
 	mov	x22, x1
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LC77
+	adrp	x23, .LC88
 	mov	x26, x0
 	mov	w24, w2
 	uxtw	x25, w3
-	add	x23, x23, :lo12:.LC77
-	add	x21, x21, :lo12:.LC78
+	add	x23, x23, :lo12:.LC88
+	add	x21, x21, :lo12:.LC89
 	stp	x19, x20, [sp, 16]
 	str	x27, [sp, 80]
 	mov	x19, 0
 	mov	w20, 0
-	adrp	x27, .LC79
-.L1281:
+	adrp	x27, .LC90
+.L1407:
 	cmp	x25, x19
-	bne	.L1287
+	bne	.L1413
 	ldp	x19, x20, [sp, 16]
-	adrp	x1, .LC79
+	adrp	x1, .LC90
 	ldp	x21, x22, [sp, 32]
-	add	x1, x1, :lo12:.LC79
+	add	x1, x1, :lo12:.LC90
 	ldp	x23, x24, [sp, 48]
-	adrp	x0, .LC80
+	adrp	x0, .LC91
 	ldp	x25, x26, [sp, 64]
-	add	x0, x0, :lo12:.LC80
+	add	x0, x0, :lo12:.LC91
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	printf
-.L1287:
-	cbnz	w20, .L1282
+.L1413:
+	cbnz	w20, .L1408
 	mov	w2, w19
 	mov	x1, x26
 	mov	x0, x23
 	bl	printf
-.L1282:
+.L1408:
 	cmp	w24, 4
-	bne	.L1283
+	bne	.L1409
 	ldr	w1, [x22, x19, lsl 2]
-.L1289:
+.L1415:
 	mov	x0, x21
 	add	w20, w20, 1
 	bl	printf
 	cmp	w20, 15
-	bls	.L1286
+	bls	.L1412
 	mov	w20, 0
-	add	x1, x27, :lo12:.LC79
-	adrp	x0, .LC80
-	add	x0, x0, :lo12:.LC80
+	add	x1, x27, :lo12:.LC90
+	adrp	x0, .LC91
+	add	x0, x0, :lo12:.LC91
 	bl	printf
-.L1286:
+.L1412:
 	add	x19, x19, 1
-	b	.L1281
-.L1283:
+	b	.L1407
+.L1409:
 	cmp	w24, 2
-	bne	.L1285
+	bne	.L1411
 	ldrsh	w1, [x22, x19, lsl 1]
-	b	.L1289
-.L1285:
+	b	.L1415
+.L1411:
 	ldrb	w1, [x22, x19]
-	b	.L1289
+	b	.L1415
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.hynix_get_read_retry_default,"ax",@progbits
 	.align	2
@@ -7881,9 +8557,9 @@ hynix_get_read_retry_default:
 	stp	x27, x28, [sp, 80]
 	stp	x21, x22, [sp, 32]
 	str	w0, [x29, 140]
-	adrp	x0, .LANCHOR20
+	adrp	x0, .LANCHOR22
 	stp	x19, x20, [sp, 16]
-	ldr	x28, [x0, #:lo12:.LANCHOR20]
+	ldr	x28, [x0, #:lo12:.LANCHOR22]
 	stp	x23, x24, [sp, 48]
 	add	x0, x28, 112
 	str	x0, [x29, 112]
@@ -7899,43 +8575,43 @@ hynix_get_read_retry_default:
 	cmp	w3, 2
 	strb	w1, [x28, 130]
 	strb	w0, [x28, 131]
-	bne	.L1291
+	bne	.L1417
 	mov	w0, -89
 	strb	w0, [x28, 128]
-	adrp	x0, .LANCHOR142+17
+	adrp	x0, .LANCHOR149+17
 	mov	w1, -9
-	strb	w1, [x0, #:lo12:.LANCHOR142+17]
-.L1346:
+	strb	w1, [x0, #:lo12:.LANCHOR149+17]
+.L1472:
 	mov	w0, 7
-	b	.L1381
-.L1291:
+	b	.L1507
+.L1417:
 	ldr	w3, [x29, 140]
 	cmp	w3, 3
-	bne	.L1293
+	bne	.L1419
 	mov	x6, 0
-.L1294:
+.L1420:
 	sub	w0, w6, #80
 	strb	w0, [x22, x6]
 	add	x6, x6, 1
 	cmp	x6, 8
-	bne	.L1294
+	bne	.L1420
 	stp	w6, w6, [x29, 132]
-.L1292:
+.L1418:
 	ldr	w0, [x29, 140]
 	sub	w0, w0, #1
 	cmp	w0, 1
-	bhi	.L1299
-	adrp	x7, .LANCHOR12
-	adrp	x11, .LANCHOR24
-	add	x24, x7, :lo12:.LANCHOR12
-	add	x25, x11, :lo12:.LANCHOR24
+	bhi	.L1425
+	adrp	x7, .LANCHOR14
+	adrp	x11, .LANCHOR26
+	add	x24, x7, :lo12:.LANCHOR14
+	add	x25, x11, :lo12:.LANCHOR26
 	mov	w20, 0
 	mov	w26, 55
-.L1300:
+.L1426:
 	ldrb	w0, [x24]
 	cmp	w0, w20
-	bhi	.L1306
-.L1307:
+	bhi	.L1432
+.L1433:
 	ldr	x0, [x29, 112]
 	ldrb	w1, [x29, 136]
 	strb	w1, [x0, 1]
@@ -7948,10 +8624,10 @@ hynix_get_read_retry_default:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1293:
+.L1419:
 	ldr	w3, [x29, 140]
 	cmp	w3, 4
-	bne	.L1295
+	bne	.L1421
 	mov	w3, -52
 	strb	w3, [x28, 128]
 	mov	w3, -65
@@ -7967,13 +8643,13 @@ hynix_get_read_retry_default:
 	strb	w3, [x28, 132]
 	strb	w1, [x28, 134]
 	str	w0, [x29, 132]
-.L1382:
+.L1508:
 	str	w0, [x29, 136]
-	b	.L1292
-.L1295:
+	b	.L1418
+.L1421:
 	ldr	w0, [x29, 140]
 	cmp	w0, 5
-	bne	.L1296
+	bne	.L1422
 	mov	w0, 56
 	strb	w0, [x28, 128]
 	mov	w0, 57
@@ -7983,14 +8659,14 @@ hynix_get_read_retry_default:
 	mov	w0, 59
 	strb	w0, [x28, 131]
 	mov	w0, 8
-.L1381:
+.L1507:
 	str	w0, [x29, 132]
 	mov	w0, 4
-	b	.L1382
-.L1296:
+	b	.L1508
+.L1422:
 	ldr	w0, [x29, 140]
 	cmp	w0, 6
-	bne	.L1297
+	bne	.L1423
 	mov	w0, 14
 	strb	w0, [x28, 128]
 	mov	w0, 15
@@ -8000,18 +8676,18 @@ hynix_get_read_retry_default:
 	mov	w0, 17
 	strb	w0, [x28, 131]
 	mov	w0, 12
-	b	.L1381
-.L1297:
+	b	.L1507
+.L1423:
 	ldr	w0, [x29, 140]
 	cmp	w0, 7
-	bne	.L1346
+	bne	.L1472
 	mov	x0, 0
-.L1298:
+.L1424:
 	sub	w1, w0, #80
 	strb	w1, [x22, x0]
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L1298
+	bne	.L1424
 	mov	w0, -44
 	strb	w0, [x28, 136]
 	mov	w0, -43
@@ -8019,8 +8695,8 @@ hynix_get_read_retry_default:
 	mov	w0, 12
 	str	w0, [x29, 132]
 	mov	w0, 10
-	b	.L1382
-.L1306:
+	b	.L1508
+.L1432:
 	ldrb	w0, [x25, w20, sxtw]
 	mov	x1, 32
 	mov	w2, 160
@@ -8029,10 +8705,10 @@ hynix_get_read_retry_default:
 	ldr	x1, [x29, 112]
 	ubfiz	x0, x0, 8, 8
 	add	x19, x1, x2
-	adrp	x1, .LANCHOR21
-	ldr	x4, [x1, #:lo12:.LANCHOR21]
+	adrp	x1, .LANCHOR23
+	ldr	x4, [x1, #:lo12:.LANCHOR23]
 	add	x23, x4, x0
-.L1301:
+.L1427:
 	str	w26, [x23, 2056]
 	ldrb	w0, [x22, x21]
 	str	w0, [x23, 2052]
@@ -8043,15 +8719,15 @@ hynix_get_read_retry_default:
 	add	x21, x21, 1
 	ldr	w0, [x29, 136]
 	cmp	w0, w21, uxtb
-	bhi	.L1301
-	adrp	x3, .LANCHOR142
-	add	x3, x3, :lo12:.LANCHOR142
+	bhi	.L1427
+	adrp	x3, .LANCHOR149
+	add	x3, x3, :lo12:.LANCHOR149
 	mov	x0, 0
-.L1304:
+.L1430:
 	add	x15, x19, x0
 	add	x14, x3, x0
 	mov	x1, 1
-.L1303:
+.L1429:
 	lsl	x4, x1, 2
 	lsl	x16, x1, 3
 	ldrb	w17, [x19, x0]
@@ -8060,10 +8736,10 @@ hynix_get_read_retry_default:
 	ldrb	w4, [x14, x4]
 	add	w4, w4, w17
 	strb	w4, [x15, x16]
-	bne	.L1303
+	bne	.L1429
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L1304
+	bne	.L1430
 	add	w5, w20, 1
 	strb	wzr, [x19, 16]
 	strb	wzr, [x19, 24]
@@ -8073,15 +8749,15 @@ hynix_get_read_retry_default:
 	strb	wzr, [x19, 48]
 	strb	wzr, [x19, 41]
 	strb	wzr, [x19, 49]
-	b	.L1300
-.L1299:
+	b	.L1426
+.L1425:
 	ldr	w0, [x29, 140]
 	sub	w0, w0, #3
 	cmp	w0, 4
-	bhi	.L1307
+	bhi	.L1433
 	ldp	w0, w1, [x29, 132]
-	adrp	x19, .LANCHOR12
-	add	x19, x19, :lo12:.LANCHOR12
+	adrp	x19, .LANCHOR14
+	add	x19, x19, :lo12:.LANCHOR14
 	sub	w13, w1, #1
 	mul	w15, w0, w1
 	and	x13, x13, 255
@@ -8096,14 +8772,14 @@ hynix_get_read_retry_default:
 	sub	w20, w0, #5
 	add	x0, x13, 1
 	str	x0, [x29, 96]
-.L1308:
+.L1434:
 	ldrb	w0, [x19]
 	ldr	w1, [x29, 128]
 	cmp	w0, w1
-	bls	.L1307
+	bls	.L1433
 	ldr	w1, [x29, 128]
-	adrp	x0, .LANCHOR24
-	add	x0, x0, :lo12:.LANCHOR24
+	adrp	x0, .LANCHOR26
+	add	x0, x0, :lo12:.LANCHOR26
 	mov	w10, 160
 	mov	w23, 255
 	ldrb	w4, [x0, w1, sxtw]
@@ -8113,8 +8789,8 @@ hynix_get_read_retry_default:
 	ubfiz	x4, x4, 8, 8
 	add	x0, x0, x10
 	str	x0, [x29, 104]
-	adrp	x0, .LANCHOR21
-	ldr	x0, [x0, #:lo12:.LANCHOR21]
+	adrp	x0, .LANCHOR23
+	ldr	x0, [x0, #:lo12:.LANCHOR23]
 	add	x27, x0, x4
 	str	w23, [x27, 2056]
 	bl	nandc_wait_flash_ready
@@ -8122,22 +8798,22 @@ hynix_get_read_retry_default:
 	str	w0, [x27, 2056]
 	ldr	w0, [x29, 140]
 	cmp	w0, 4
-	bne	.L1309
+	bne	.L1435
 	mov	w0, 64
 	str	w23, [x27, 2052]
 	str	w0, [x27, 2048]
 	mov	w0, 204
-.L1383:
+.L1509:
 	str	w0, [x27, 2052]
 	mov	w0, 77
-	b	.L1384
-.L1309:
+	b	.L1510
+.L1435:
 	cmp	w20, 1
-	bhi	.L1311
+	bhi	.L1437
 	ldrb	w0, [x28, 128]
 	str	w0, [x27, 2052]
 	mov	w0, 82
-.L1384:
+.L1510:
 	str	w0, [x27, 2048]
 	mov	w0, 22
 	str	w0, [x27, 2056]
@@ -8152,10 +8828,10 @@ hynix_get_read_retry_default:
 	ldr	w0, [x29, 140]
 	str	wzr, [x27, 2052]
 	cmp	w0, 6
-	bne	.L1312
+	bne	.L1438
 	mov	w0, 31
 	str	w0, [x27, 2052]
-.L1313:
+.L1439:
 	mov	w23, 2
 	str	w23, [x27, 2052]
 	str	wzr, [x27, 2052]
@@ -8163,192 +8839,192 @@ hynix_get_read_retry_default:
 	str	w0, [x27, 2056]
 	bl	nandc_wait_flash_ready
 	cmp	w20, 1
-	bls	.L1347
+	bls	.L1473
 	ldr	w0, [x29, 140]
 	cmp	w0, 7
 	mov	w0, 32
 	csel	w23, w23, w0, ne
-.L1314:
-	adrp	x3, .LANCHOR143
+.L1440:
+	adrp	x3, .LANCHOR150
 	mov	x1, 0
-	ldr	x0, [x3, #:lo12:.LANCHOR143]
-.L1315:
+	ldr	x0, [x3, #:lo12:.LANCHOR150]
+.L1441:
 	ldr	w2, [x27, 2048]
 	strb	w2, [x0, x1]
 	add	x1, x1, 1
 	cmp	w23, w1, uxtb
-	bhi	.L1315
+	bhi	.L1441
 	ldr	w1, [x29, 140]
 	cmp	w1, 7
-	bne	.L1316
+	bne	.L1442
 	mov	w1, 0
-.L1318:
+.L1444:
 	ldrb	w2, [x0]
 	cmp	w2, 12
-	beq	.L1317
+	beq	.L1443
 	ldrb	w2, [x0, 1]
 	cmp	w2, 10
-	beq	.L1317
+	beq	.L1443
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 255
 	cmp	w1, 8
-	bne	.L1318
-.L1319:
-	adrp	x0, .LC81
+	bne	.L1444
+.L1445:
+	adrp	x0, .LC92
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC81
+	add	x0, x0, :lo12:.LC92
 	bl	printf
-.L1321:
-	b	.L1321
-.L1311:
+.L1447:
+	b	.L1447
+.L1437:
 	mov	w0, 174
 	str	w0, [x27, 2052]
 	str	wzr, [x27, 2048]
 	mov	w0, 176
-	b	.L1383
-.L1312:
+	b	.L1509
+.L1438:
 	str	wzr, [x27, 2052]
-	b	.L1313
-.L1347:
+	b	.L1439
+.L1473:
 	mov	w23, 16
-	b	.L1314
-.L1317:
+	b	.L1440
+.L1443:
 	cmp	w1, 6
-	bhi	.L1319
-.L1320:
-	ldr	x2, [x3, #:lo12:.LANCHOR143]
+	bhi	.L1445
+.L1446:
+	ldr	x2, [x3, #:lo12:.LANCHOR150]
 	mov	x0, 0
-.L1325:
+.L1451:
 	ldr	w1, [x29, 120]
 	cmp	w1, w0
-	bgt	.L1326
-	ldr	x1, [x3, #:lo12:.LANCHOR143]
+	bgt	.L1452
+	ldr	x1, [x3, #:lo12:.LANCHOR150]
 	mov	w16, 8
 	add	x3, x1, x21
-.L1328:
+.L1454:
 	mov	x0, 0
-.L1327:
+.L1453:
 	ldr	w17, [x3, x0, lsl 2]
 	ldr	w4, [x29, 124]
 	mvn	w17, w17
 	str	w17, [x3, x0, lsl 2]
 	add	x0, x0, 1
 	cmp	w4, w0
-	bgt	.L1327
+	bgt	.L1453
 	add	x3, x3, x22, uxtw 2
 	subs	w16, w16, #1
-	bne	.L1328
+	bne	.L1454
 	mov	x17, x1
 	mov	w23, 0
 	mov	w26, 1
-.L1329:
+.L1455:
 	mov	w3, 0
 	mov	w0, 0
-.L1333:
+.L1459:
 	mov	x25, x17
 	lsl	w16, w26, w0
 	mov	w24, 16
 	mov	w30, 0
-.L1331:
+.L1457:
 	ldr	w4, [x25]
 	add	x25, x25, x21
 	bics	wzr, w16, w4
 	cinc	w30, w30, eq
 	subs	w24, w24, #1
-	bne	.L1331
+	bne	.L1457
 	cmp	w30, 9
 	orr	w16, w3, w16
 	add	w0, w0, 1
 	csel	w3, w16, w3, cs
 	cmp	w0, 32
-	bne	.L1333
+	bne	.L1459
 	ldr	w0, [x29, 124]
 	add	w23, w23, 1
 	str	w3, [x17], 4
 	cmp	w0, w23
-	bgt	.L1329
+	bgt	.L1455
 	mov	x0, 0
 	mov	w3, 0
-.L1336:
+.L1462:
 	ldr	w16, [x1, x0]
 	add	x0, x0, 4
 	cmp	w16, 0
 	cinc	w3, w3, eq
 	cmp	x0, 32
-	bne	.L1336
+	bne	.L1462
 	cmp	w3, 7
-	ble	.L1337
+	ble	.L1463
 	mov	w3, 1024
 	mov	w2, 1
-	adrp	x0, .LC82
-	add	x0, x0, :lo12:.LC82
+	adrp	x0, .LC93
+	add	x0, x0, :lo12:.LC93
 	bl	rknand_print_hex
-	adrp	x0, .LC81
+	adrp	x0, .LC92
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC81
+	add	x0, x0, :lo12:.LC92
 	bl	printf
-.L1338:
-	b	.L1338
-.L1316:
+.L1464:
+	b	.L1464
+.L1442:
 	ldr	w1, [x29, 140]
 	cmp	w1, 6
-	bne	.L1320
+	bne	.L1446
 	mov	x1, 0
-.L1322:
+.L1448:
 	ldrb	w2, [x0, x1]
 	cmp	w2, 12
-	beq	.L1320
+	beq	.L1446
 	add	x2, x0, x1
 	ldrb	w2, [x2, 8]
 	cmp	w2, 4
-	beq	.L1320
+	beq	.L1446
 	add	x1, x1, 1
 	cmp	x1, 8
-	bne	.L1322
-	adrp	x0, .LC81
+	bne	.L1448
+	adrp	x0, .LC92
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC81
+	add	x0, x0, :lo12:.LC92
 	bl	printf
-.L1324:
-	b	.L1324
-.L1326:
+.L1450:
+	b	.L1450
+.L1452:
 	ldr	w1, [x27, 2048]
 	strb	w1, [x2, x0]
 	add	x0, x0, 1
-	b	.L1325
-.L1337:
+	b	.L1451
+.L1463:
 	ldr	w0, [x29, 140]
 	cmp	w0, 6
-	beq	.L1349
+	beq	.L1475
 	cmp	w0, 7
 	mov	x1, 10
 	mov	x0, 8
 	csel	x0, x0, x1, ne
-.L1339:
+.L1465:
 	ldr	x10, [x29, 104]
 	mov	w3, 0
-.L1340:
+.L1466:
 	mov	x1, 0
-.L1341:
+.L1467:
 	ldrb	w16, [x2, x1]
 	ldr	w4, [x29, 136]
 	strb	w16, [x10, x1]
 	add	x1, x1, 1
 	cmp	w4, w1, uxtb
-	bhi	.L1341
+	bhi	.L1467
 	ldr	x1, [x29, 96]
 	add	w3, w3, 1
 	add	x10, x10, x0
 	add	x2, x2, x1
 	ldr	w1, [x29, 132]
 	cmp	w1, w3
-	bgt	.L1340
+	bgt	.L1466
 	mov	w23, 255
 	str	w23, [x27, 2056]
 	bl	nandc_wait_flash_ready
 	cmp	w20, 1
-	bhi	.L1343
+	bhi	.L1469
 	mov	w0, 54
 	str	w0, [x27, 2056]
 	ldrb	w0, [x28, 128]
@@ -8363,34 +9039,34 @@ hynix_get_read_retry_default:
 	str	w23, [x27, 2052]
 	str	w23, [x27, 2052]
 	str	w23, [x27, 2052]
-.L1385:
+.L1511:
 	str	w0, [x27, 2056]
 	bl	nandc_wait_flash_ready
 	ldr	w0, [x29, 128]
 	add	w11, w0, 1
 	and	w0, w11, 255
 	str	w0, [x29, 128]
-	b	.L1308
-.L1349:
+	b	.L1434
+.L1475:
 	mov	x0, 4
-	b	.L1339
-.L1343:
+	b	.L1465
+.L1469:
 	mov	w0, 56
-	b	.L1385
+	b	.L1511
 	.size	hynix_get_read_retry_default, .-hynix_get_read_retry_default
 	.section	.text.flash_get_read_retry_tbl,"ax",@progbits
 	.align	2
 	.global	flash_get_read_retry_tbl
 	.type	flash_get_read_retry_tbl, %function
 flash_get_read_retry_tbl:
-	adrp	x0, .LANCHOR32+19
-	ldrb	w0, [x0, #:lo12:.LANCHOR32+19]
+	adrp	x0, .LANCHOR34+19
+	ldrb	w0, [x0, #:lo12:.LANCHOR34+19]
 	sub	w1, w0, #1
 	and	w1, w1, 255
 	cmp	w1, 6
-	bhi	.L1386
+	bhi	.L1512
 	b	hynix_get_read_retry_default
-.L1386:
+.L1512:
 	ret
 	.size	flash_get_read_retry_tbl, .-flash_get_read_retry_tbl
 	.section	.text.nandc_xfer_done,"ax",@progbits
@@ -8399,81 +9075,81 @@ flash_get_read_retry_tbl:
 	.type	nandc_xfer_done, %function
 nandc_xfer_done:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR144
-	adrp	x1, .LANCHOR22
+	adrp	x0, .LANCHOR151
+	adrp	x1, .LANCHOR24
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR21
-	ldrb	w1, [x1, #:lo12:.LANCHOR22]
+	adrp	x19, .LANCHOR23
+	ldrb	w1, [x1, #:lo12:.LANCHOR24]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	cmp	w1, 9
-	strb	wzr, [x0, #:lo12:.LANCHOR144]
-	bne	.L1389
-	ldr	x20, [x19, #:lo12:.LANCHOR21]
+	strb	wzr, [x0, #:lo12:.LANCHOR151]
+	bne	.L1515
+	ldr	x20, [x19, #:lo12:.LANCHOR23]
 	mov	x24, x0
 	mov	w21, 0
 	ldr	w0, [x20, 16]
 	str	w0, [x29, 64]
 	ldr	w0, [x20, 48]
-	tbnz	x0, 1, .L1390
-	adrp	x22, .LC86
-	adrp	x23, .LC85
-	add	x22, x22, :lo12:.LC86
-	add	x23, x23, :lo12:.LC85
-.L1391:
+	tbnz	x0, 1, .L1516
+	adrp	x22, .LC97
+	adrp	x23, .LC96
+	add	x22, x22, :lo12:.LC97
+	add	x23, x23, :lo12:.LC96
+.L1517:
 	ldr	w0, [x29, 64]
-	tbnz	x0, 20, .L1394
-	ldr	x0, [x19, #:lo12:.LANCHOR21]
+	tbnz	x0, 20, .L1520
+	ldr	x0, [x19, #:lo12:.LANCHOR23]
 	add	w21, w21, 1
 	tst	x21, 16777215
 	ldr	w0, [x0, 16]
 	str	w0, [x29, 64]
-	bne	.L1391
+	bne	.L1517
 	ldr	w2, [x29, 64]
 	mov	w1, w21
 	ldr	w3, [x20, 64]
 	mov	x0, x22
 	ubfx	x3, x3, 16, 6
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR21]
+	ldr	x1, [x19, #:lo12:.LANCHOR23]
 	mov	w3, 64
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1391
-.L1390:
-	adrp	x22, .LC84
-	adrp	x23, .LC85
-	add	x22, x22, :lo12:.LC84
-	add	x23, x23, :lo12:.LC85
-.L1392:
+	b	.L1517
+.L1516:
+	adrp	x22, .LC95
+	adrp	x23, .LC96
+	add	x22, x22, :lo12:.LC95
+	add	x23, x23, :lo12:.LC96
+.L1518:
 	ldr	w1, [x20, 64]
 	ldr	w0, [x29, 64]
 	ubfx	x1, x1, 16, 6
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0
-	bge	.L1394
-	ldr	x0, [x19, #:lo12:.LANCHOR21]
+	bge	.L1520
+	ldr	x0, [x19, #:lo12:.LANCHOR23]
 	ldr	w0, [x0]
 	str	w0, [x29, 72]
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1393
+	tbz	x0, 13, .L1519
 	ldr	w0, [x29, 72]
-	tbz	x0, 17, .L1393
+	tbz	x0, 17, .L1519
 	ldr	w1, [x29, 72]
-	adrp	x0, .LC83
-	add	x0, x0, :lo12:.LC83
+	adrp	x0, .LC94
+	add	x0, x0, :lo12:.LC94
 	ubfx	x1, x1, 17, 1
-.L1426:
+.L1552:
 	bl	printf
-	b	.L1394
-.L1393:
+	b	.L1520
+.L1519:
 	ldr	w0, [x29, 64]
 	add	w21, w21, 1
 	ubfx	x0, x0, 22, 6
 	cmp	w21, w0, lsl 12
-	bne	.L1392
+	bne	.L1518
 	ldr	w2, [x20, 64]
 	mov	w1, w21
 	ldr	w3, [x29, 64]
@@ -8481,82 +9157,82 @@ nandc_xfer_done:
 	ubfx	x2, x2, 16, 5
 	ubfx	x3, x3, 22, 6
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR21]
+	ldr	x1, [x19, #:lo12:.LANCHOR23]
 	mov	x0, x23
 	mov	w3, 64
 	mov	w2, 4
 	bl	rknand_print_hex
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1392
+	tbz	x0, 13, .L1518
 	mov	w0, 1
-	strb	w0, [x24, #:lo12:.LANCHOR144]
-.L1394:
-	adrp	x0, .LANCHOR43+32
+	strb	w0, [x24, #:lo12:.LANCHOR151]
+.L1520:
+	adrp	x0, .LANCHOR45+32
 	ldp	x19, x20, [sp, 16]
-	str	wzr, [x0, #:lo12:.LANCHOR43+32]
+	str	wzr, [x0, #:lo12:.LANCHOR45+32]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1389:
-	ldr	x20, [x19, #:lo12:.LANCHOR21]
+.L1515:
+	ldr	x20, [x19, #:lo12:.LANCHOR23]
 	mov	w21, 0
 	ldr	w0, [x20, 8]
 	str	w0, [x29, 64]
 	ldr	w0, [x20, 16]
-	tbnz	x0, 1, .L1400
-	adrp	x22, .LC86
-	adrp	x23, .LC85
-	add	x22, x22, :lo12:.LC86
-	add	x23, x23, :lo12:.LC85
-.L1401:
+	tbnz	x0, 1, .L1526
+	adrp	x22, .LC97
+	adrp	x23, .LC96
+	add	x22, x22, :lo12:.LC97
+	add	x23, x23, :lo12:.LC96
+.L1527:
 	ldr	w0, [x29, 64]
-	tbnz	x0, 20, .L1394
-	ldr	x0, [x19, #:lo12:.LANCHOR21]
+	tbnz	x0, 20, .L1520
+	ldr	x0, [x19, #:lo12:.LANCHOR23]
 	add	w21, w21, 1
 	tst	x21, 16777215
 	ldr	w0, [x0, 8]
 	str	w0, [x29, 64]
-	bne	.L1401
+	bne	.L1527
 	ldr	w2, [x29, 64]
 	mov	w1, w21
 	ldr	w3, [x20, 28]
 	mov	x0, x22
 	ubfx	x3, x3, 16, 5
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR21]
+	ldr	x1, [x19, #:lo12:.LANCHOR23]
 	mov	w3, 64
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1401
-.L1400:
-	adrp	x22, .LC84
-	adrp	x23, .LC85
-	add	x22, x22, :lo12:.LC84
-	add	x23, x23, :lo12:.LC85
-.L1402:
+	b	.L1527
+.L1526:
+	adrp	x22, .LC95
+	adrp	x23, .LC96
+	add	x22, x22, :lo12:.LC95
+	add	x23, x23, :lo12:.LC96
+.L1528:
 	ldr	w1, [x20, 28]
 	ldr	w0, [x29, 64]
 	ubfx	x1, x1, 16, 5
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0
-	bge	.L1394
-	ldr	x0, [x19, #:lo12:.LANCHOR21]
+	bge	.L1520
+	ldr	x0, [x19, #:lo12:.LANCHOR23]
 	ldr	w0, [x0]
 	str	w0, [x29, 72]
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1403
+	tbz	x0, 13, .L1529
 	ldr	w0, [x29, 72]
-	tbz	x0, 17, .L1403
-	adrp	x0, .LC87
+	tbz	x0, 17, .L1529
+	adrp	x0, .LC98
 	ldr	w1, [x29, 72]
-	add	x0, x0, :lo12:.LC87
-	b	.L1426
-.L1403:
+	add	x0, x0, :lo12:.LC98
+	b	.L1552
+.L1529:
 	add	w21, w21, 1
 	tst	x21, 16777215
-	bne	.L1402
+	bne	.L1528
 	ldr	w2, [x20, 28]
 	mov	w1, w21
 	ldr	w3, [x29, 64]
@@ -8564,12 +9240,12 @@ nandc_xfer_done:
 	ubfx	x2, x2, 16, 5
 	ubfx	x3, x3, 22, 6
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR21]
+	ldr	x1, [x19, #:lo12:.LANCHOR23]
 	mov	w3, 64
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1402
+	b	.L1528
 	.size	nandc_xfer_done, .-nandc_xfer_done
 	.section	.text.nandc_xfer,"ax",@progbits
 	.align	2
@@ -8590,20 +9266,20 @@ nandc_xfer:
 	mov	x21, x4
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
-	cbnz	w22, .L1446
-	adrp	x0, .LANCHOR22
-	ldrb	w0, [x0, #:lo12:.LANCHOR22]
+	cbnz	w22, .L1572
+	adrp	x0, .LANCHOR24
+	ldrb	w0, [x0, #:lo12:.LANCHOR24]
 	cmp	w0, 9
-	bne	.L1429
-	adrp	x22, .LANCHOR21
+	bne	.L1555
+	adrp	x22, .LANCHOR23
 	lsr	w19, w19, 2
 	mov	w3, 1
 	mov	w2, 0
-	ldr	x5, [x22, #:lo12:.LANCHOR21]
+	ldr	x5, [x22, #:lo12:.LANCHOR23]
 	mov	w0, 0
-.L1430:
+.L1556:
 	cmp	w2, w19
-	bcc	.L1434
+	bcc	.L1560
 	ldr	w19, [x5]
 	cmp	w3, 0
 	mov	w1, 512
@@ -8612,35 +9288,35 @@ nandc_xfer:
 	movk	w1, 0x2, lsl 16
 	and	w1, w19, w1
 	cmp	w1, 139264
-	bne	.L1436
+	bne	.L1562
 	mov	w1, w19
-	adrp	x0, .LC88
-	add	x0, x0, :lo12:.LC88
+	adrp	x0, .LC99
+	add	x0, x0, :lo12:.LC99
 	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR21]
+	ldr	x0, [x22, #:lo12:.LANCHOR23]
 	orr	w19, w19, 131072
 	str	w19, [x0]
 	mov	w0, -1
-.L1436:
-	tbz	x19, 13, .L1437
-	adrp	x1, .LANCHOR144
-	ldrb	w1, [x1, #:lo12:.LANCHOR144]
-	cbz	w1, .L1437
+.L1562:
+	tbz	x19, 13, .L1563
+	adrp	x1, .LANCHOR151
+	ldrb	w1, [x1, #:lo12:.LANCHOR151]
+	cbz	w1, .L1563
 	mov	w1, w19
-	adrp	x0, .LC89
-	add	x0, x0, :lo12:.LC89
+	adrp	x0, .LC100
+	add	x0, x0, :lo12:.LC100
 	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR21]
+	ldr	x0, [x22, #:lo12:.LANCHOR23]
 	mov	w1, 1
 	str	w1, [x0, 16]
-.L1465:
+.L1591:
 	mov	w0, -1
-.L1428:
+.L1554:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1434:
+.L1560:
 	uxtw	x1, w2
 	add	x1, x1, 84
 	ldr	w1, [x5, x1, lsl 2]
@@ -8651,70 +9327,70 @@ nandc_xfer:
 	and	w1, w4, w1, lsr 10
 	and	w3, w3, w1
 	ldr	w1, [x29, 56]
-	tbnz	x1, 2, .L1448
+	tbnz	x1, 2, .L1574
 	ldr	w1, [x29, 56]
-	tbnz	x1, 18, .L1448
+	tbnz	x1, 18, .L1574
 	ldr	w4, [x29, 56]
 	ldr	w1, [x29, 56]
 	ubfx	x4, x4, 3, 7
 	ubfx	x1, x1, 19, 7
 	cmp	w4, w1
 	ldr	w1, [x29, 56]
-	ble	.L1432
+	ble	.L1558
 	ubfx	x1, x1, 3, 7
-.L1433:
+.L1559:
 	cmp	w0, w1
 	csel	w0, w0, w1, cs
-.L1431:
+.L1557:
 	add	w2, w2, 1
-	b	.L1430
-.L1432:
+	b	.L1556
+.L1558:
 	ubfx	x1, x1, 19, 7
-	b	.L1433
-.L1448:
+	b	.L1559
+.L1574:
 	mov	w0, -1
-	b	.L1431
-.L1429:
-	adrp	x0, .LANCHOR40
+	b	.L1557
+.L1555:
+	adrp	x0, .LANCHOR42
 	lsr	w4, w19, 1
 	mov	w3, 64
 	mov	w1, 1
-	ldrb	w0, [x0, #:lo12:.LANCHOR40]
+	ldrb	w0, [x0, #:lo12:.LANCHOR42]
 	mov	w2, 0
-	adrp	x6, .LANCHOR43
+	adrp	x6, .LANCHOR45
 	cmp	w0, 25
 	mov	w0, 128
 	csel	w3, w3, w0, cc
 	mov	w0, 0
-.L1439:
+.L1565:
 	add	w5, w3, w0
 	cmp	w2, w4
-	bcc	.L1440
-	adrp	x22, .LANCHOR21
+	bcc	.L1566
+	adrp	x22, .LANCHOR23
 	lsr	w19, w19, 2
 	mov	w3, 0
 	mov	w0, 0
-	ldr	x4, [x22, #:lo12:.LANCHOR21]
-.L1441:
+	ldr	x4, [x22, #:lo12:.LANCHOR23]
+.L1567:
 	cmp	w3, w19
-	bcc	.L1445
+	bcc	.L1571
 	str	wzr, [x4, 16]
 	mov	w1, 8192
 	movk	w1, 0x2, lsl 16
 	ldr	w19, [x4]
 	and	w1, w19, w1
 	cmp	w1, 139264
-	bne	.L1437
+	bne	.L1563
 	mov	w1, w19
-	adrp	x0, .LC90
-	add	x0, x0, :lo12:.LC90
+	adrp	x0, .LC101
+	add	x0, x0, :lo12:.LC101
 	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR21]
+	ldr	x0, [x22, #:lo12:.LANCHOR23]
 	orr	w19, w19, 131072
 	str	w19, [x0]
-	b	.L1465
-.L1440:
-	ldr	x7, [x6, #:lo12:.LANCHOR43]
+	b	.L1591
+.L1566:
+	ldr	x7, [x6, #:lo12:.LANCHOR45]
 	and	x0, x0, 4294967292
 	ldr	w0, [x7, x0]
 	lsl	w7, w2, 2
@@ -8730,16 +9406,16 @@ nandc_xfer:
 	add	w1, w1, 4
 	strb	w0, [x21, x7]
 	mov	w0, w5
-	b	.L1439
-.L1445:
+	b	.L1565
+.L1571:
 	uxtw	x1, w3
 	add	x1, x1, 8
 	ldr	w1, [x4, x1, lsl 2]
 	str	w1, [x29, 56]
 	ldr	w1, [x29, 56]
-	tbnz	x1, 2, .L1451
+	tbnz	x1, 2, .L1577
 	ldr	w1, [x29, 56]
-	tbnz	x1, 15, .L1451
+	tbnz	x1, 15, .L1577
 	ldr	w2, [x29, 56]
 	ubfx	x6, x2, 3, 5
 	ldr	w2, [x29, 56]
@@ -8752,42 +9428,42 @@ nandc_xfer:
 	orr	w1, w5, w1, lsl 5
 	cmp	w2, w1
 	ldr	w1, [x29, 56]
-	bls	.L1443
+	bls	.L1569
 	ubfx	x2, x1, 3, 5
 	ldr	w1, [x29, 56]
 	ubfx	x1, x1, 27, 1
-.L1464:
+.L1590:
 	orr	w1, w2, w1, lsl 5
 	cmp	w0, w1
 	csel	w0, w0, w1, cs
-.L1442:
+.L1568:
 	add	w3, w3, 1
-	b	.L1441
-.L1443:
+	b	.L1567
+.L1569:
 	ubfx	x2, x1, 16, 5
 	ldr	w1, [x29, 56]
 	ubfx	x1, x1, 29, 1
-	b	.L1464
-.L1451:
+	b	.L1590
+.L1577:
 	mov	w0, -1
-	b	.L1442
-.L1437:
+	b	.L1568
+.L1563:
 	cmn	w0, #1
-	beq	.L1428
+	beq	.L1554
 	ldr	w1, [x21]
 	cmn	w1, #1
-	bne	.L1428
+	bne	.L1554
 	ldr	w1, [x21, 4]
 	cmn	w1, #1
-	bne	.L1428
+	bne	.L1554
 	ldr	w1, [x20]
 	cmn	w1, #1
 	mov	w1, 512
 	csel	w0, w0, w1, ne
-	b	.L1428
-.L1446:
+	b	.L1554
+.L1572:
 	mov	w0, 0
-	b	.L1428
+	b	.L1554
 	.size	nandc_xfer, .-nandc_xfer
 	.section	.text.flash_read_page,"ax",@progbits
 	.align	2
@@ -8798,35 +9474,35 @@ flash_read_page:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	and	w21, w0, 255
-	adrp	x0, .LANCHOR21
+	adrp	x0, .LANCHOR23
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	mov	w22, w1
-	ldr	x19, [x0, #:lo12:.LANCHOR21]
-	adrp	x0, .LANCHOR7
+	ldr	x19, [x0, #:lo12:.LANCHOR23]
+	adrp	x0, .LANCHOR9
 	stp	x25, x26, [sp, 64]
 	mov	w24, w4
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
 	mov	x25, x2
 	mov	x26, x3
 	and	w20, w1, 2097151
 	ubfx	x23, x22, 24, 2
-	tbz	x0, 4, .L1467
+	tbz	x0, 4, .L1593
 	mov	w3, w1
-	adrp	x0, .LC91
+	adrp	x0, .LC102
 	mov	w2, w23
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC91
+	add	x0, x0, :lo12:.LC102
 	bl	printf
-.L1467:
+.L1593:
 	bl	nandc_wait_flash_ready
 	mov	w0, w21
 	bl	nandc_cs
-	adrp	x6, .LANCHOR9
-	cbnz	w23, .L1468
+	adrp	x6, .LANCHOR11
+	cbnz	w23, .L1594
 	mov	w0, w21
 	bl	zftl_flash_enter_slc_mode
-.L1469:
+.L1595:
 	ubfiz	x4, x21, 8, 8
 	lsr	w0, w20, 8
 	add	x4, x19, x4
@@ -8840,15 +9516,15 @@ flash_read_page:
 	str	w0, [x4, 2052]
 	mov	w0, 48
 	str	w0, [x4, 2056]
-	ldr	x0, [x6, #:lo12:.LANCHOR9]
+	ldr	x0, [x6, #:lo12:.LANCHOR11]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1471
-	cbz	w23, .L1471
+	bne	.L1597
+	cbz	w23, .L1597
 	add	w20, w20, w20, lsl 1
 	sub	w0, w20, #1
 	add	w0, w0, w23
-.L1480:
+.L1606:
 	bl	nandc_set_seed
 	bl	nandc_wait_flash_ready
 	mov	w0, 5
@@ -8873,23 +9549,23 @@ flash_read_page:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1468:
-	ldr	x0, [x6, #:lo12:.LANCHOR9]
+.L1594:
+	ldr	x0, [x6, #:lo12:.LANCHOR11]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1470
+	bne	.L1596
 	sxtw	x0, w21
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 8
 	str	w23, [x0, 8]
-	b	.L1469
-.L1470:
+	b	.L1595
+.L1596:
 	mov	w0, w21
 	bl	zftl_flash_exit_slc_mode
-	b	.L1469
-.L1471:
+	b	.L1595
+.L1597:
 	mov	w0, w20
-	b	.L1480
+	b	.L1606
 	.size	flash_read_page, .-flash_read_page
 	.section	.text.micron_read_retrial,"ax",@progbits
 	.align	2
@@ -8900,7 +9576,7 @@ micron_read_retrial:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	w24, w0, 255
-	adrp	x0, .LANCHOR40
+	adrp	x0, .LANCHOR42
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	mov	w22, w1
@@ -8908,31 +9584,31 @@ micron_read_retrial:
 	mov	x25, x2
 	stp	x27, x28, [sp, 80]
 	mov	x26, x3
-	ldrb	w20, [x0, #:lo12:.LANCHOR40]
+	ldrb	w20, [x0, #:lo12:.LANCHOR42]
 	and	x19, x24, 255
 	str	w4, [x29, 116]
 	bl	nandc_wait_flash_ready
-	adrp	x0, .LANCHOR21
+	adrp	x0, .LANCHOR23
 	mov	w21, 0
 	add	w20, w20, w20, lsl 1
 	mov	w28, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR21]
+	ldr	x0, [x0, #:lo12:.LANCHOR23]
 	asr	w20, w20, 2
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR146
-	add	x0, x0, :lo12:.LANCHOR146
+	adrp	x0, .LANCHOR153
+	add	x0, x0, :lo12:.LANCHOR153
 	str	x0, [x29, 104]
 	ldr	x0, [x29, 120]
 	add	x23, x0, x19, lsl 8
-	adrp	x0, .LANCHOR7
-	add	x0, x0, :lo12:.LANCHOR7
+	adrp	x0, .LANCHOR9
+	add	x0, x0, :lo12:.LANCHOR9
 	str	x0, [x29, 96]
-.L1482:
+.L1608:
 	ldr	x0, [x29, 104]
 	ldrb	w0, [x0]
 	cmp	w21, w0
-	bcc	.L1487
-.L1486:
+	bcc	.L1613
+.L1612:
 	ldr	x0, [x29, 120]
 	add	x19, x0, x19, lsl 8
 	mov	w0, 239
@@ -8946,22 +9622,22 @@ micron_read_retrial:
 	cmp	w28, w20
 	str	wzr, [x19, 2048]
 	str	wzr, [x19, 2048]
-	bcc	.L1488
+	bcc	.L1614
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L1488:
+.L1614:
 	cmp	w28, 256
 	ccmn	w28, #1, 4, ne
-	bne	.L1481
-	adrp	x0, .LC93
+	bne	.L1607
+	adrp	x0, .LC104
 	mov	w4, w28
 	mov	w3, w21
 	mov	w2, w22
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC93
+	add	x0, x0, :lo12:.LC104
 	bl	printf
-.L1481:
+.L1607:
 	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -8970,7 +9646,7 @@ micron_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1487:
+.L1613:
 	mov	w0, 239
 	str	w0, [x23, 2056]
 	mov	w0, 137
@@ -8991,33 +9667,33 @@ micron_read_retrial:
 	mov	w7, w0
 	ldr	x0, [x29, 96]
 	ldr	w0, [x0]
-	tbz	x0, 12, .L1483
+	tbz	x0, 12, .L1609
 	str	w7, [x29, 112]
 	mov	w4, w28
 	mov	w3, w21
 	mov	w2, w22
 	mov	w1, w21
-	adrp	x0, .LC92
-	add	x0, x0, :lo12:.LC92
+	adrp	x0, .LC103
+	add	x0, x0, :lo12:.LC103
 	bl	printf
 	ldr	w7, [x29, 112]
-.L1483:
+.L1609:
 	cmn	w7, #1
-	beq	.L1484
-	adrp	x0, .LANCHOR143
+	beq	.L1610
+	adrp	x0, .LANCHOR150
 	cmn	w28, #1
 	csel	w28, w28, w7, ne
 	cmp	w7, w20
-	ldr	x25, [x0, #:lo12:.LANCHOR143]
-	adrp	x0, .LANCHOR145
-	ldr	x26, [x0, #:lo12:.LANCHOR145]
-	bcc	.L1490
-.L1484:
+	ldr	x25, [x0, #:lo12:.LANCHOR150]
+	adrp	x0, .LANCHOR152
+	ldr	x26, [x0, #:lo12:.LANCHOR152]
+	bcc	.L1616
+.L1610:
 	mov	w21, w27
-	b	.L1482
-.L1490:
+	b	.L1608
+.L1616:
 	mov	w28, w7
-	b	.L1486
+	b	.L1612
 	.size	micron_read_retrial, .-micron_read_retrial
 	.section	.text.toshiba_3d_read_retrial,"ax",@progbits
 	.align	2
@@ -9038,15 +9714,15 @@ toshiba_3d_read_retrial:
 	mov	x27, x3
 	mov	x26, x2
 	bl	nandc_wait_flash_ready
-	adrp	x0, .LANCHOR21
-	adrp	x22, .LANCHOR17
+	adrp	x0, .LANCHOR23
+	adrp	x22, .LANCHOR19
 	mov	w1, 46
 	mov	w2, 56
-	ldr	x25, [x0, #:lo12:.LANCHOR21]
+	ldr	x25, [x0, #:lo12:.LANCHOR23]
 	and	x0, x24, 255
 	add	x21, x0, 8
 	str	x0, [x29, 128]
-	ldrb	w0, [x22, #:lo12:.LANCHOR17]
+	ldrb	w0, [x22, #:lo12:.LANCHOR19]
 	mov	w19, -1
 	add	x21, x25, x21, lsl 8
 	mov	w20, 1
@@ -9057,18 +9733,18 @@ toshiba_3d_read_retrial:
 	mov	w1, 10
 	csel	w0, w1, w0, ne
 	str	w0, [x29, 136]
-	add	x0, x22, :lo12:.LANCHOR17
-	cbnz	w4, .L1505
+	add	x0, x22, :lo12:.LANCHOR19
+	cbnz	w4, .L1631
 	str	x0, [x29, 120]
 	sxtw	x0, w24
 	add	x0, x0, 8
 	add	x0, x25, x0, lsl 8
 	str	x0, [x29, 112]
-.L1512:
+.L1638:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, 36
-	bne	.L1506
+	bne	.L1632
 	mov	w1, w20
 	mov	x0, x21
 	mov	w2, 0
@@ -9076,7 +9752,7 @@ toshiba_3d_read_retrial:
 	ldr	x1, [x29, 112]
 	mov	w0, 93
 	str	w0, [x1, 8]
-.L1507:
+.L1633:
 	mov	w4, w28
 	mov	x3, x27
 	mov	x2, x26
@@ -9084,62 +9760,62 @@ toshiba_3d_read_retrial:
 	mov	w0, w24
 	bl	flash_read_page
 	mov	w4, w0
-	adrp	x0, .LANCHOR7
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 4, .L1508
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 4, .L1634
 	mov	w3, w4
 	str	w4, [x29, 108]
 	mov	w2, w23
 	mov	w1, w20
-	adrp	x0, .LC94
-	add	x0, x0, :lo12:.LC94
+	adrp	x0, .LC105
+	add	x0, x0, :lo12:.LC105
 	bl	printf
 	ldr	w4, [x29, 108]
-.L1508:
+.L1634:
 	cmn	w4, #1
-	beq	.L1509
-	adrp	x0, .LANCHOR143
+	beq	.L1635
+	adrp	x0, .LANCHOR150
 	cmn	w19, #1
 	csel	w19, w19, w4, ne
-	ldr	x26, [x0, #:lo12:.LANCHOR143]
-	adrp	x0, .LANCHOR145
-	ldr	x27, [x0, #:lo12:.LANCHOR145]
-	adrp	x0, .LANCHOR40
-	ldrb	w0, [x0, #:lo12:.LANCHOR40]
+	ldr	x26, [x0, #:lo12:.LANCHOR150]
+	adrp	x0, .LANCHOR152
+	ldr	x27, [x0, #:lo12:.LANCHOR152]
+	adrp	x0, .LANCHOR42
+	ldrb	w0, [x0, #:lo12:.LANCHOR42]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1527
-.L1509:
+	bcc	.L1653
+.L1635:
 	ldr	w0, [x29, 136]
 	add	w20, w20, 1
 	cmp	w0, w20
-	bne	.L1512
-.L1511:
-	ldrb	w0, [x22, #:lo12:.LANCHOR17]
+	bne	.L1638
+.L1637:
+	ldrb	w0, [x22, #:lo12:.LANCHOR19]
 	cmp	w0, 36
-	bne	.L1513
+	bne	.L1639
 	mov	w2, 0
-.L1550:
+.L1676:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_tlc_set_rr_para
-	b	.L1514
-.L1506:
+	b	.L1640
+.L1632:
 	mov	w1, w20
 	mov	x0, x21
 	bl	toshiba_3d_set_slc_rr_para
-	b	.L1507
-.L1527:
+	b	.L1633
+.L1653:
 	mov	w19, w4
-	b	.L1511
-.L1513:
+	b	.L1637
+.L1639:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_3d_set_slc_rr_para
-.L1514:
-	ldrb	w0, [x22, #:lo12:.LANCHOR17]
+.L1640:
+	ldrb	w0, [x22, #:lo12:.LANCHOR19]
 	cmp	w0, 36
-	bne	.L1523
+	bne	.L1649
 	ldr	x0, [x29, 128]
 	add	x25, x25, x0, lsl 8
 	mov	w0, 85
@@ -9148,27 +9824,27 @@ toshiba_3d_read_retrial:
 	str	wzr, [x25, 2052]
 	str	wzr, [x25, 2048]
 	str	w0, [x25, 2056]
-.L1523:
-	adrp	x0, .LANCHOR40
-	ldrb	w0, [x0, #:lo12:.LANCHOR40]
+.L1649:
+	adrp	x0, .LANCHOR42
+	ldrb	w0, [x0, #:lo12:.LANCHOR42]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L1524
+	bcc	.L1650
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L1524:
+.L1650:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L1525
-	adrp	x0, .LC96
+	bne	.L1651
+	adrp	x0, .LC107
 	mov	w4, w19
 	mov	w3, w20
 	mov	w2, w23
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC96
+	add	x0, x0, :lo12:.LC107
 	bl	printf
-.L1525:
+.L1651:
 	bl	nandc_wait_flash_ready
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
@@ -9178,23 +9854,23 @@ toshiba_3d_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1505:
+.L1631:
 	str	x0, [x29, 112]
 	sxtw	x0, w24
 	add	x0, x0, 8
 	add	x0, x25, x0, lsl 8
 	str	x0, [x29, 136]
-.L1521:
+.L1647:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
 	cmp	w0, 36
-	bne	.L1515
+	bne	.L1641
 	mov	x0, x21
 	mov	w2, 1
 	mov	w1, w20
 	bl	toshiba_tlc_set_rr_para
 	mov	w0, 93
-.L1549:
+.L1675:
 	ldr	x1, [x29, 136]
 	mov	w4, w28
 	mov	x3, x27
@@ -9204,56 +9880,56 @@ toshiba_3d_read_retrial:
 	mov	w0, w24
 	bl	flash_read_page
 	mov	w4, w0
-	adrp	x0, .LANCHOR7
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 4, .L1517
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 4, .L1643
 	mov	w3, w4
 	str	w4, [x29, 108]
 	mov	w2, w23
 	mov	w1, w20
-	adrp	x0, .LC95
-	add	x0, x0, :lo12:.LC95
+	adrp	x0, .LC106
+	add	x0, x0, :lo12:.LC106
 	bl	printf
 	ldr	w4, [x29, 108]
-.L1517:
+.L1643:
 	cmn	w4, #1
-	beq	.L1518
-	adrp	x0, .LANCHOR143
+	beq	.L1644
+	adrp	x0, .LANCHOR150
 	cmn	w19, #1
 	csel	w19, w19, w4, ne
-	ldr	x26, [x0, #:lo12:.LANCHOR143]
-	adrp	x0, .LANCHOR145
-	ldr	x27, [x0, #:lo12:.LANCHOR145]
-	adrp	x0, .LANCHOR40
-	ldrb	w0, [x0, #:lo12:.LANCHOR40]
+	ldr	x26, [x0, #:lo12:.LANCHOR150]
+	adrp	x0, .LANCHOR152
+	ldr	x27, [x0, #:lo12:.LANCHOR152]
+	adrp	x0, .LANCHOR42
+	ldrb	w0, [x0, #:lo12:.LANCHOR42]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1528
-.L1518:
+	bcc	.L1654
+.L1644:
 	ldr	w0, [x29, 120]
 	add	w20, w20, 1
 	cmp	w0, w20
-	bne	.L1521
-.L1520:
-	ldrb	w0, [x22, #:lo12:.LANCHOR17]
+	bne	.L1647
+.L1646:
+	ldrb	w0, [x22, #:lo12:.LANCHOR19]
 	cmp	w0, 36
-	bne	.L1522
+	bne	.L1648
 	mov	w2, 1
-	b	.L1550
-.L1515:
+	b	.L1676
+.L1641:
 	mov	x0, x21
 	mov	w1, w20
 	bl	toshiba_3d_set_tlc_rr_para
 	mov	w0, 38
-	b	.L1549
-.L1528:
+	b	.L1675
+.L1654:
 	mov	w19, w4
-	b	.L1520
-.L1522:
+	b	.L1646
+.L1648:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_3d_set_tlc_rr_para
-	b	.L1514
+	b	.L1640
 	.size	toshiba_3d_read_retrial, .-toshiba_3d_read_retrial
 	.section	.text.toshiba_read_retrial,"ax",@progbits
 	.align	2
@@ -9273,87 +9949,87 @@ toshiba_read_retrial:
 	mov	x27, x3
 	str	w4, [x29, 116]
 	bl	nandc_wait_flash_ready
-	adrp	x0, .LANCHOR21
-	adrp	x1, .LANCHOR17
+	adrp	x0, .LANCHOR23
+	adrp	x1, .LANCHOR19
 	str	x1, [x29, 120]
-	ldr	x22, [x0, #:lo12:.LANCHOR21]
+	ldr	x22, [x0, #:lo12:.LANCHOR23]
 	and	x0, x19, 255
 	add	x21, x0, 8
 	str	x0, [x29, 104]
-	ldrb	w0, [x1, #:lo12:.LANCHOR17]
+	ldrb	w0, [x1, #:lo12:.LANCHOR19]
 	add	x21, x22, x21, lsl 8
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
-	bls	.L1569
-	adrp	x0, .LANCHOR14
-	ldrb	w0, [x0, #:lo12:.LANCHOR14]
-	cbz	w0, .L1570
+	bls	.L1695
+	adrp	x0, .LANCHOR16
+	ldrb	w0, [x0, #:lo12:.LANCHOR16]
+	cbz	w0, .L1696
 	mov	w23, 1
 	mov	w0, 1
 	bl	nandc_set_if_mode
-.L1553:
+.L1679:
 	and	x0, x19, 255
 	mov	w1, 92
 	add	x0, x22, x0, lsl 8
 	str	w1, [x0, 2056]
 	mov	w1, 197
 	str	w1, [x0, 2056]
-.L1552:
+.L1678:
 	sxtw	x0, w19
 	mov	w20, 1
 	add	x0, x0, 8
 	mov	w24, -1
 	add	x0, x22, x0, lsl 8
 	str	x0, [x29, 96]
-.L1554:
-	adrp	x0, .LANCHOR146
-	ldrb	w0, [x0, #:lo12:.LANCHOR146]
+.L1680:
+	adrp	x0, .LANCHOR153
+	ldrb	w0, [x0, #:lo12:.LANCHOR153]
 	add	w0, w0, 1
 	cmp	w20, w0
-	bcc	.L1563
+	bcc	.L1689
 	mov	w28, w24
-.L1562:
+.L1688:
 	ldr	x0, [x29, 120]
 	mov	w1, 0
-	ldrb	w0, [x0, #:lo12:.LANCHOR17]
+	ldrb	w0, [x0, #:lo12:.LANCHOR19]
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x21
-	bhi	.L1564
+	bhi	.L1690
 	bl	sandisk_set_rr_para
-.L1565:
+.L1691:
 	sxtw	x19, w19
 	mov	w0, 255
 	add	x19, x19, 8
 	add	x22, x22, x19, lsl 8
 	str	w0, [x22, 8]
-	adrp	x0, .LANCHOR40
-	ldrb	w0, [x0, #:lo12:.LANCHOR40]
+	adrp	x0, .LANCHOR42
+	ldrb	w0, [x0, #:lo12:.LANCHOR42]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L1566
+	bcc	.L1692
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L1566:
+.L1692:
 	cmp	w28, 256
 	ccmn	w28, #1, 4, ne
-	bne	.L1567
-	adrp	x0, .LC96
+	bne	.L1693
+	adrp	x0, .LC107
 	mov	w4, w28
 	mov	w3, w20
 	mov	w2, w25
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC96
+	add	x0, x0, :lo12:.LC107
 	bl	printf
-.L1567:
+.L1693:
 	bl	nandc_wait_flash_ready
-	cbz	w23, .L1551
+	cbz	w23, .L1677
 	mov	w0, 4
 	bl	nandc_set_if_mode
-.L1551:
+.L1677:
 	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9362,36 +10038,36 @@ toshiba_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1570:
+.L1696:
 	mov	w23, 0
-	b	.L1553
-.L1569:
+	b	.L1679
+.L1695:
 	mov	w23, 0
-	b	.L1552
-.L1563:
+	b	.L1678
+.L1689:
 	ldr	x0, [x29, 120]
 	mov	w1, w20
-	ldrb	w0, [x0, #:lo12:.LANCHOR17]
+	ldrb	w0, [x0, #:lo12:.LANCHOR19]
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x21
-	bhi	.L1555
+	bhi	.L1681
 	bl	sandisk_set_rr_para
-.L1556:
+.L1682:
 	ldr	x0, [x29, 120]
-	ldrb	w0, [x0, #:lo12:.LANCHOR17]
+	ldrb	w0, [x0, #:lo12:.LANCHOR19]
 	cmp	w0, 34
-	bne	.L1557
-	adrp	x0, .LANCHOR146
-	ldrb	w0, [x0, #:lo12:.LANCHOR146]
+	bne	.L1683
+	adrp	x0, .LANCHOR153
+	ldrb	w0, [x0, #:lo12:.LANCHOR153]
 	sub	w0, w0, #3
 	cmp	w20, w0
-	bne	.L1557
+	bne	.L1683
 	ldr	x1, [x29, 96]
 	mov	w0, 179
 	str	w0, [x1, 8]
-.L1557:
+.L1683:
 	ldr	x0, [x29, 104]
 	mov	w1, 38
 	ldr	w4, [x29, 116]
@@ -9406,27 +10082,27 @@ toshiba_read_retrial:
 	bl	flash_read_page
 	mov	w28, w0
 	cmn	w0, #1
-	beq	.L1560
+	beq	.L1686
 	cmn	w24, #1
 	csel	w24, w24, w0, ne
-	adrp	x0, .LANCHOR143
-	ldr	x26, [x0, #:lo12:.LANCHOR143]
-	adrp	x0, .LANCHOR145
-	ldr	x27, [x0, #:lo12:.LANCHOR145]
-	adrp	x0, .LANCHOR40
-	ldrb	w0, [x0, #:lo12:.LANCHOR40]
+	adrp	x0, .LANCHOR150
+	ldr	x26, [x0, #:lo12:.LANCHOR150]
+	adrp	x0, .LANCHOR152
+	ldr	x27, [x0, #:lo12:.LANCHOR152]
+	adrp	x0, .LANCHOR42
+	ldrb	w0, [x0, #:lo12:.LANCHOR42]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L1562
-.L1560:
+	bcc	.L1688
+.L1686:
 	add	w20, w20, 1
-	b	.L1554
-.L1555:
+	b	.L1680
+.L1681:
 	bl	toshiba_set_rr_para
-	b	.L1556
-.L1564:
+	b	.L1682
+.L1690:
 	bl	toshiba_set_rr_para
-	b	.L1565
+	b	.L1691
 	.size	toshiba_read_retrial, .-toshiba_read_retrial
 	.section	.text.hynix_read_retrial,"ax",@progbits
 	.align	2
@@ -9437,11 +10113,11 @@ hynix_read_retrial:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	x23, x0, 255
-	adrp	x0, .LANCHOR20
+	adrp	x0, .LANCHOR22
 	stp	x27, x28, [sp, 80]
 	stp	x21, x22, [sp, 32]
 	mov	w27, w4
-	ldr	x28, [x0, #:lo12:.LANCHOR20]
+	ldr	x28, [x0, #:lo12:.LANCHOR22]
 	mov	w22, w1
 	stp	x25, x26, [sp, 64]
 	mov	x25, x2
@@ -9454,37 +10130,37 @@ hynix_read_retrial:
 	ldrb	w24, [x28, 2]
 	ldrb	w20, [x0, 8]
 	bl	nandc_wait_flash_ready
-	adrp	x6, .LANCHOR40
-	add	x6, x6, :lo12:.LANCHOR40
+	adrp	x6, .LANCHOR42
+	add	x6, x6, :lo12:.LANCHOR42
 	mov	w5, 0
-	adrp	x7, .LANCHOR143
-	adrp	x8, .LANCHOR145
-.L1584:
+	adrp	x7, .LANCHOR150
+	adrp	x8, .LANCHOR152
+.L1710:
 	cmp	w5, w24
-	bcc	.L1589
-.L1588:
-	adrp	x0, .LANCHOR40
+	bcc	.L1715
+.L1714:
+	adrp	x0, .LANCHOR42
 	add	x23, x28, x23
-	ldrb	w0, [x0, #:lo12:.LANCHOR40]
+	ldrb	w0, [x0, #:lo12:.LANCHOR42]
 	strb	w20, [x23, 8]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L1590
+	bcc	.L1716
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L1590:
+.L1716:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L1583
-	adrp	x0, .LC97
+	bne	.L1709
+	adrp	x0, .LC108
 	mov	w4, w19
 	mov	w3, w5
 	mov	w2, w22
 	mov	w1, w5
-	add	x0, x0, :lo12:.LC97
+	add	x0, x0, :lo12:.LC108
 	bl	printf
-.L1583:
+.L1709:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9493,7 +10169,7 @@ hynix_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1589:
+.L1715:
 	add	w20, w20, 1
 	stp	x6, x8, [x29, 96]
 	and	w20, w20, 255
@@ -9514,42 +10190,42 @@ hynix_read_retrial:
 	cmn	w0, #1
 	ldp	x6, x8, [x29, 96]
 	ldr	x7, [x29, 112]
-	beq	.L1586
+	beq	.L1712
 	ldrb	w1, [x6]
 	cmn	w19, #1
 	csel	w19, w19, w0, ne
-	ldr	x25, [x7, #:lo12:.LANCHOR143]
-	ldr	x26, [x8, #:lo12:.LANCHOR145]
+	ldr	x25, [x7, #:lo12:.LANCHOR150]
+	ldr	x26, [x8, #:lo12:.LANCHOR152]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L1592
-.L1586:
+	bcc	.L1718
+.L1712:
 	add	w5, w5, 1
-	b	.L1584
-.L1592:
+	b	.L1710
+.L1718:
 	mov	w19, w0
-	b	.L1588
+	b	.L1714
 	.size	hynix_read_retrial, .-hynix_read_retrial
-	.section	.text.flash_ddr_tunning_read,"ax",@progbits
+	.section	.text.flash_ddr_tuning_read,"ax",@progbits
 	.align	2
-	.global	flash_ddr_tunning_read
-	.type	flash_ddr_tunning_read, %function
-flash_ddr_tunning_read:
+	.global	flash_ddr_tuning_read
+	.type	flash_ddr_tuning_read, %function
+flash_ddr_tuning_read:
 	stp	x29, x30, [sp, -144]!
 	and	w0, w0, 255
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w20, w1
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LC98
+	adrp	x21, .LC109
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR40
+	adrp	x22, .LANCHOR42
 	stp	x25, x26, [sp, 64]
-	add	x21, x21, :lo12:.LC98
+	add	x21, x21, :lo12:.LC109
 	stp	x27, x28, [sp, 80]
 	mov	x26, x3
 	str	w4, [x29, 120]
-	add	x22, x22, :lo12:.LANCHOR40
+	add	x22, x22, :lo12:.LANCHOR42
 	str	x2, [x29, 128]
 	mov	w28, 0
 	str	w0, [x29, 136]
@@ -9557,14 +10233,14 @@ flash_ddr_tunning_read:
 	mov	w23, 0
 	str	w0, [x29, 124]
 	mov	w24, 0
-	adrp	x0, .LANCHOR7
+	adrp	x0, .LANCHOR9
 	mov	w27, 1024
-	add	x0, x0, :lo12:.LANCHOR7
+	add	x0, x0, :lo12:.LANCHOR9
 	mov	w25, 6
 	mov	w19, -1
 	str	wzr, [x29, 140]
 	str	x0, [x29, 112]
-.L1608:
+.L1734:
 	mov	w0, w25
 	bl	nandc_set_ddr_para
 	ldr	w4, [x29, 120]
@@ -9576,7 +10252,7 @@ flash_ddr_tunning_read:
 	mov	w4, w0
 	ldr	x0, [x29, 112]
 	ldr	w0, [x0]
-	tbz	x0, 4, .L1603
+	tbz	x0, 4, .L1729
 	mov	w3, w4
 	str	w4, [x29, 108]
 	mov	w2, w20
@@ -9584,51 +10260,51 @@ flash_ddr_tunning_read:
 	mov	x0, x21
 	bl	printf
 	ldr	w4, [x29, 108]
-.L1603:
+.L1729:
 	add	w0, w27, 1
 	cmp	w4, w0
-	bhi	.L1604
-	adrp	x0, .LANCHOR143
-	ldr	x0, [x0, #:lo12:.LANCHOR143]
+	bhi	.L1730
+	adrp	x0, .LANCHOR150
+	ldr	x0, [x0, #:lo12:.LANCHOR150]
 	str	x0, [x29, 128]
-	adrp	x0, .LANCHOR145
-	ldr	x26, [x0, #:lo12:.LANCHOR145]
+	adrp	x0, .LANCHOR152
+	ldr	x26, [x0, #:lo12:.LANCHOR152]
 	ldrb	w0, [x22]
 	cmp	w4, w0, lsr 2
-	bcs	.L1613
+	bcs	.L1739
 	add	w24, w24, 1
 	cmp	w24, 7
-	bls	.L1613
+	bls	.L1739
 	sub	w28, w25, w24
 	mov	w27, w4
 	mov	w19, 0
-.L1606:
+.L1732:
 	ldr	w0, [x29, 140]
 	cmp	w24, w23
 	csel	w28, w28, w0, cs
-.L1607:
-	cbz	w28, .L1609
-	adrp	x0, .LANCHOR40
+.L1733:
+	cbz	w28, .L1735
+	adrp	x0, .LANCHOR42
 	mov	w1, 3
-	ldrb	w0, [x0, #:lo12:.LANCHOR40]
+	ldrb	w0, [x0, #:lo12:.LANCHOR42]
 	udiv	w0, w0, w1
 	cmp	w0, w27
-	bls	.L1609
+	bls	.L1735
 	mov	w1, w28
-	adrp	x0, .LC99
-	add	x0, x0, :lo12:.LC99
+	adrp	x0, .LC110
+	add	x0, x0, :lo12:.LC110
 	bl	printf
 	mov	w0, w28
-.L1623:
+.L1749:
 	bl	nandc_set_ddr_para
-	cbz	w19, .L1602
+	cbz	w19, .L1728
 	ldr	w1, [x29, 136]
-	adrp	x0, .LC100
+	adrp	x0, .LC111
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC100
+	add	x0, x0, :lo12:.LC111
 	mov	w27, w19
 	bl	printf
-.L1602:
+.L1728:
 	mov	w0, w27
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9637,30 +10313,30 @@ flash_ddr_tunning_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1604:
+.L1730:
 	cmp	w24, w23
-	bls	.L1614
+	bls	.L1740
 	sub	w0, w28, w24
 	str	w0, [x29, 140]
 	cmp	w24, 7
-	bhi	.L1607
+	bhi	.L1733
 	mov	w23, w24
-.L1614:
+.L1740:
 	mov	w24, 0
-	b	.L1605
-.L1613:
+	b	.L1731
+.L1739:
 	mov	w28, w25
 	mov	w27, w4
 	mov	w19, 0
-.L1605:
+.L1731:
 	add	w25, w25, 2
 	cmp	w25, 50
-	bne	.L1608
-	b	.L1606
-.L1609:
+	bne	.L1734
+	b	.L1732
+.L1735:
 	ldrb	w0, [x29, 124]
-	b	.L1623
-	.size	flash_ddr_tunning_read, .-flash_ddr_tunning_read
+	b	.L1749
+	.size	flash_ddr_tuning_read, .-flash_ddr_tuning_read
 	.section	.text.flash_read_page_en,"ax",@progbits
 	.align	2
 	.global	flash_read_page_en
@@ -9670,11 +10346,11 @@ flash_read_page_en:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 255
-	adrp	x0, .LANCHOR12
+	adrp	x0, .LANCHOR14
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	mov	w19, w1
-	ldrb	w0, [x0, #:lo12:.LANCHOR12]
+	ldrb	w0, [x0, #:lo12:.LANCHOR14]
 	mov	x22, x2
 	stp	x25, x26, [sp, 64]
 	mov	x23, x3
@@ -9682,43 +10358,43 @@ flash_read_page_en:
 	mov	w24, w4
 	ubfx	x21, x19, 24, 2
 	cmp	w0, w20
-	bhi	.L1625
-	adrp	x1, .LANCHOR147
+	bhi	.L1751
+	adrp	x1, .LANCHOR154
 	adrp	x0, .LC0
 	mov	w2, 378
-	add	x1, x1, :lo12:.LANCHOR147
+	add	x1, x1, :lo12:.LANCHOR154
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1625:
-	adrp	x0, .LANCHOR24
-	add	x0, x0, :lo12:.LANCHOR24
+.L1751:
+	adrp	x0, .LANCHOR26
+	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w20, [x0, w20, sxtw]
-	adrp	x0, .LANCHOR7
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 4, .L1626
-	adrp	x0, .LC101
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 4, .L1752
+	adrp	x0, .LC112
 	mov	w2, w19
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC101
+	add	x0, x0, :lo12:.LC112
 	bl	printf
-.L1626:
-	cbnz	w21, .L1627
-	adrp	x0, .LANCHOR11
-	adrp	x1, .LANCHOR25
-	ldrb	w0, [x0, #:lo12:.LANCHOR11]
-	cbz	w0, .L1628
-	ldrb	w0, [x1, #:lo12:.LANCHOR25]
-	cbz	w0, .L1627
-.L1628:
-	adrp	x0, .LANCHOR26
-	ldrb	w1, [x1, #:lo12:.LANCHOR25]
-	ldrh	w2, [x0, #:lo12:.LANCHOR26]
+.L1752:
+	cbnz	w21, .L1753
+	adrp	x0, .LANCHOR13
+	adrp	x1, .LANCHOR27
+	ldrb	w0, [x0, #:lo12:.LANCHOR13]
+	cbz	w0, .L1754
+	ldrb	w0, [x1, #:lo12:.LANCHOR27]
+	cbz	w0, .L1753
+.L1754:
+	adrp	x0, .LANCHOR28
+	ldrb	w1, [x1, #:lo12:.LANCHOR27]
+	ldrh	w2, [x0, #:lo12:.LANCHOR28]
 	udiv	w0, w19, w2
 	mul	w0, w0, w2
 	sub	w19, w19, w0
-	cbz	w1, .L1629
+	cbz	w1, .L1755
 	add	w19, w0, w19, lsl 1
-.L1627:
+.L1753:
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -9727,26 +10403,26 @@ flash_read_page_en:
 	bl	flash_read_page
 	mov	w21, w0
 	cmn	w0, #1
-	bne	.L1624
-	adrp	x25, .LANCHOR42
+	bne	.L1750
+	adrp	x25, .LANCHOR44
 	mov	x26, x25
-	ldrb	w27, [x25, #:lo12:.LANCHOR42]
-	cbnz	w27, .L1631
-.L1634:
-	adrp	x0, .LANCHOR148
-	ldr	x5, [x0, #:lo12:.LANCHOR148]
-	cbnz	x5, .L1632
-.L1633:
-	ldrb	w4, [x26, #:lo12:.LANCHOR42]
+	ldrb	w27, [x25, #:lo12:.LANCHOR44]
+	cbnz	w27, .L1757
+.L1760:
+	adrp	x0, .LANCHOR155
+	ldr	x5, [x0, #:lo12:.LANCHOR155]
+	cbnz	x5, .L1758
+.L1759:
+	ldrb	w4, [x26, #:lo12:.LANCHOR44]
 	mov	w3, -1
 	mov	w2, w19
 	mov	w1, 0
-	adrp	x0, .LC102
-	add	x0, x0, :lo12:.LC102
+	adrp	x0, .LC113
+	add	x0, x0, :lo12:.LC113
 	bl	printf
-	adrp	x0, .LANCHOR14
-	ldrb	w0, [x0, #:lo12:.LANCHOR14]
-	cbz	w0, .L1624
+	adrp	x0, .LANCHOR16
+	ldrb	w0, [x0, #:lo12:.LANCHOR16]
+	cbz	w0, .L1750
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -9758,27 +10434,27 @@ flash_read_page_en:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
-	b	flash_ddr_tunning_read
-.L1629:
-	adrp	x1, .LANCHOR27
-	add	x1, x1, :lo12:.LANCHOR27
+	b	flash_ddr_tuning_read
+.L1755:
+	adrp	x1, .LANCHOR29
+	add	x1, x1, :lo12:.LANCHOR29
 	ldrh	w19, [x1, w19, uxtw 1]
 	add	w19, w19, w0
-	b	.L1627
-.L1631:
-	strb	wzr, [x25, #:lo12:.LANCHOR42]
+	b	.L1753
+.L1757:
+	strb	wzr, [x25, #:lo12:.LANCHOR44]
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
 	mov	w1, w19
 	mov	w0, w20
 	bl	flash_read_page
-	strb	w27, [x25, #:lo12:.LANCHOR42]
+	strb	w27, [x25, #:lo12:.LANCHOR44]
 	cmn	w0, #1
-	beq	.L1634
-.L1652:
+	beq	.L1760
+.L1778:
 	mov	w21, w0
-.L1624:
+.L1750:
 	mov	w0, w21
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -9787,7 +10463,7 @@ flash_read_page_en:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1632:
+.L1758:
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -9795,8 +10471,8 @@ flash_read_page_en:
 	mov	w0, w20
 	blr	x5
 	cmn	w0, #1
-	beq	.L1633
-	b	.L1652
+	beq	.L1759
+	b	.L1778
 	.size	flash_read_page_en, .-flash_read_page_en
 	.section	.text.flash_get_last_written_page,"ax",@progbits
 	.align	2
@@ -9807,15 +10483,15 @@ flash_get_last_written_page:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	w23, w0, 255
-	adrp	x0, .LANCHOR128
+	adrp	x0, .LANCHOR134
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
 	mov	x24, x2
-	ldrh	w19, [x0, #:lo12:.LANCHOR128]
-	adrp	x0, .LANCHOR32+26
+	ldrh	w19, [x0, #:lo12:.LANCHOR134]
+	adrp	x0, .LANCHOR34+26
 	stp	x21, x22, [sp, 32]
 	and	w21, w1, 65535
-	ldrh	w26, [x0, #:lo12:.LANCHOR32+26]
+	ldrh	w26, [x0, #:lo12:.LANCHOR34+26]
 	sub	w19, w19, #1
 	sxth	w19, w19
 	stp	x27, x28, [sp, 80]
@@ -9826,23 +10502,23 @@ flash_get_last_written_page:
 	add	w1, w19, w26
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L1654
+	bne	.L1780
 	mov	w27, 0
 	mov	w28, 2
-.L1655:
+.L1781:
 	cmp	w27, w19
-	ble	.L1658
-.L1654:
-	adrp	x0, .LANCHOR7
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L1659
+	ble	.L1784
+.L1780:
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L1785
 	ldr	w3, [x22]
-	adrp	x0, .LC103
+	adrp	x0, .LC114
 	mov	w2, w19
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC103
+	add	x0, x0, :lo12:.LC114
 	bl	printf
-.L1659:
+.L1785:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9851,7 +10527,7 @@ flash_get_last_written_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1658:
+.L1784:
 	add	w20, w27, w19
 	mov	w4, w25
 	mov	x3, x22
@@ -9861,25 +10537,25 @@ flash_get_last_written_page:
 	add	w1, w26, w20, sxth
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L1656
+	bne	.L1782
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L1655
-.L1656:
+	b	.L1781
+.L1782:
 	add	w20, w20, 1
 	sxth	w27, w20
-	b	.L1655
+	b	.L1781
 	.size	flash_get_last_written_page, .-flash_get_last_written_page
 	.section	.text.flash_get_last_written_page_ext,"ax",@progbits
 	.align	2
 	.global	flash_get_last_written_page_ext
 	.type	flash_get_last_written_page_ext, %function
 flash_get_last_written_page_ext:
-	adrp	x4, .LANCHOR96
+	adrp	x4, .LANCHOR102
 	mov	w6, 21
 	and	w0, w0, 65535
 	mov	w5, 1
-	ldrh	w4, [x4, #:lo12:.LANCHOR96]
+	ldrh	w4, [x4, #:lo12:.LANCHOR102]
 	sub	w6, w6, w4
 	mov	w4, w3
 	mov	x3, x2
@@ -9896,55 +10572,55 @@ flash_get_last_written_page_ext:
 	.type	flash_info_blk_init, %function
 flash_info_blk_init:
 	stp	x29, x30, [sp, -96]!
-	adrp	x0, .LANCHOR7
+	adrp	x0, .LANCHOR9
 	add	x29, sp, 0
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR20
+	adrp	x20, .LANCHOR22
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	tbz	x0, 12, .L1666
-	ldr	x4, [x20, #:lo12:.LANCHOR20]
-	adrp	x2, .LANCHOR149
-	adrp	x0, .LC104
+	tbz	x0, 12, .L1792
+	ldr	x4, [x20, #:lo12:.LANCHOR22]
+	adrp	x2, .LANCHOR156
+	adrp	x0, .LC115
 	mov	w3, 2048
-	add	x2, x2, :lo12:.LANCHOR149
+	add	x2, x2, :lo12:.LANCHOR156
 	mov	w1, 49
-	add	x0, x0, :lo12:.LC104
+	add	x0, x0, :lo12:.LC115
 	bl	printf
-.L1666:
-	adrp	x21, .LANCHOR150
-	adrp	x23, .LANCHOR26
+.L1792:
+	adrp	x21, .LANCHOR157
+	adrp	x23, .LANCHOR28
 	mov	w24, 21321
-	add	x26, x23, :lo12:.LANCHOR26
+	add	x26, x23, :lo12:.LANCHOR28
 	mov	x22, x21
 	mov	w19, 4
 	movk	w24, 0x5359, lsl 16
-.L1669:
+.L1795:
 	ldrh	w1, [x26]
 	mov	w4, 4
-	ldr	x3, [x21, #:lo12:.LANCHOR150]
+	ldr	x3, [x21, #:lo12:.LANCHOR157]
 	mov	w0, 0
-	ldr	x2, [x20, #:lo12:.LANCHOR20]
-	add	x27, x21, :lo12:.LANCHOR150
-	add	x25, x20, :lo12:.LANCHOR20
+	ldr	x2, [x20, #:lo12:.LANCHOR22]
+	add	x27, x21, :lo12:.LANCHOR157
+	add	x25, x20, :lo12:.LANCHOR22
 	mul	w1, w1, w19
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L1667
-	ldr	x2, [x20, #:lo12:.LANCHOR20]
+	beq	.L1793
+	ldr	x2, [x20, #:lo12:.LANCHOR22]
 	ldr	w0, [x2]
 	cmp	w0, w24
-	beq	.L1668
-.L1667:
+	beq	.L1794
+.L1793:
 	add	w19, w19, 1
 	cmp	w19, 16
-	bne	.L1669
-.L1693:
+	bne	.L1795
+.L1819:
 	mov	w0, -1
-.L1665:
+.L1791:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9952,102 +10628,102 @@ flash_info_blk_init:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1677:
+.L1803:
 	ldr	x0, [x25]
 	ldr	w1, [x0]
 	cmp	w1, w24
-	bne	.L1678
+	bne	.L1804
 	ldr	w19, [x0, 4]
-.L1671:
-	add	x24, x21, :lo12:.LANCHOR151
-	ldrh	w0, [x23, #:lo12:.LANCHOR26]
-	ldr	x3, [x22, #:lo12:.LANCHOR150]
+.L1797:
+	add	x24, x21, :lo12:.LANCHOR158
+	ldrh	w0, [x23, #:lo12:.LANCHOR28]
+	ldr	x3, [x22, #:lo12:.LANCHOR157]
 	mov	w4, 4
-	ldr	x2, [x20, #:lo12:.LANCHOR20]
+	ldr	x2, [x20, #:lo12:.LANCHOR22]
 	ldrb	w1, [x24, 1]
 	mul	w1, w1, w0
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L1672
-	ldr	x0, [x20, #:lo12:.LANCHOR20]
+	beq	.L1798
+	ldr	x0, [x20, #:lo12:.LANCHOR22]
 	mov	w1, 21321
 	movk	w1, 0x5359, lsl 16
 	ldr	w2, [x0]
 	cmp	w2, w1
-	bne	.L1672
+	bne	.L1798
 	ldr	w1, [x0, 4]
 	cmp	w19, w1
-	bcs	.L1672
+	bcs	.L1798
 	ldrb	w1, [x0, 37]
 	ldrb	w0, [x0, 36]
-	strb	w1, [x21, #:lo12:.LANCHOR151]
+	strb	w1, [x21, #:lo12:.LANCHOR158]
 	strb	w0, [x24, 1]
-.L1672:
-	ldrb	w1, [x21, #:lo12:.LANCHOR151]
-	add	x24, x21, :lo12:.LANCHOR151
-	ldr	x3, [x22, #:lo12:.LANCHOR150]
+.L1798:
+	ldrb	w1, [x21, #:lo12:.LANCHOR158]
+	add	x24, x21, :lo12:.LANCHOR158
+	ldr	x3, [x22, #:lo12:.LANCHOR157]
 	mov	w4, 4
-	ldr	x2, [x20, #:lo12:.LANCHOR20]
+	ldr	x2, [x20, #:lo12:.LANCHOR22]
 	mov	w0, 0
 	bl	flash_get_last_written_page
 	sxth	w19, w0
 	add	w0, w0, 1
-	ldrb	w21, [x21, #:lo12:.LANCHOR151]
+	ldrb	w21, [x21, #:lo12:.LANCHOR158]
 	strh	w0, [x24, 2]
-	ldrh	w0, [x23, #:lo12:.LANCHOR26]
+	ldrh	w0, [x23, #:lo12:.LANCHOR28]
 	mov	w23, 21321
 	movk	w23, 0x5359, lsl 16
 	madd	w21, w21, w0, w19
-.L1673:
-	tbz	w19, #31, .L1675
+.L1799:
+	tbz	w19, #31, .L1801
 	cmn	w19, #1
-	bne	.L1676
-	ldr	x0, [x20, #:lo12:.LANCHOR20]
+	bne	.L1802
+	ldr	x0, [x20, #:lo12:.LANCHOR22]
 	ldr	w1, [x0]
-	adrp	x0, .LC105
-	add	x0, x0, :lo12:.LC105
+	adrp	x0, .LC116
+	add	x0, x0, :lo12:.LC116
 	bl	printf
-	b	.L1693
-.L1675:
-	ldr	x3, [x22, #:lo12:.LANCHOR150]
+	b	.L1819
+.L1801:
+	ldr	x3, [x22, #:lo12:.LANCHOR157]
 	mov	w4, 4
-	ldr	x2, [x20, #:lo12:.LANCHOR20]
+	ldr	x2, [x20, #:lo12:.LANCHOR22]
 	mov	w1, w21
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L1674
-	ldr	x0, [x20, #:lo12:.LANCHOR20]
+	beq	.L1800
+	ldr	x0, [x20, #:lo12:.LANCHOR22]
 	ldr	w0, [x0]
 	cmp	w0, w23
-	bne	.L1674
-.L1676:
+	bne	.L1800
+.L1802:
 	mov	w0, 0
-	b	.L1665
-.L1674:
+	b	.L1791
+.L1800:
 	sub	w19, w19, #1
 	sub	w21, w21, #1
 	sxth	w19, w19
-	b	.L1673
-.L1668:
-	adrp	x21, .LANCHOR151
-	add	x1, x21, :lo12:.LANCHOR151
+	b	.L1799
+.L1794:
+	adrp	x21, .LANCHOR158
+	add	x1, x21, :lo12:.LANCHOR158
 	ldrb	w3, [x2, 37]
 	mov	w4, 4
 	ldrb	w0, [x2, 36]
 	strb	w3, [x1, 1]
 	ldrh	w1, [x26]
 	ldr	x3, [x27]
-	strb	w0, [x21, #:lo12:.LANCHOR151]
+	strb	w0, [x21, #:lo12:.LANCHOR158]
 	mul	w1, w1, w0
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	bne	.L1677
-.L1678:
+	bne	.L1803
+.L1804:
 	mov	w19, 0
-	b	.L1671
+	b	.L1797
 	.size	flash_info_blk_init, .-flash_info_blk_init
 	.section	.text.flash_ddr_para_scan,"ax",@progbits
 	.align	2
@@ -10057,44 +10733,44 @@ flash_ddr_para_scan:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR39
+	adrp	x20, .LANCHOR41
 	stp	x21, x22, [sp, 32]
 	and	w22, w0, 255
-	ldrb	w0, [x20, #:lo12:.LANCHOR39]
-	adrp	x19, .LANCHOR14
+	ldrb	w0, [x20, #:lo12:.LANCHOR41]
+	adrp	x19, .LANCHOR16
 	stp	x23, x24, [sp, 48]
 	mov	w21, 1
 	mov	w23, w1
 	str	x25, [sp, 64]
-	strb	w21, [x19, #:lo12:.LANCHOR14]
-	adrp	x24, .LANCHOR153
+	strb	w21, [x19, #:lo12:.LANCHOR16]
+	adrp	x24, .LANCHOR160
 	bl	flash_set_interface_mode
-	adrp	x25, .LANCHOR152
-	ldrb	w0, [x20, #:lo12:.LANCHOR39]
+	adrp	x25, .LANCHOR159
+	ldrb	w0, [x20, #:lo12:.LANCHOR41]
 	bl	nandc_set_if_mode
-	ldr	x3, [x25, #:lo12:.LANCHOR152]
+	ldr	x3, [x25, #:lo12:.LANCHOR159]
 	mov	w4, 4
-	ldr	x2, [x24, #:lo12:.LANCHOR153]
+	ldr	x2, [x24, #:lo12:.LANCHOR160]
 	mov	w1, w23
 	mov	w0, w22
-	bl	flash_ddr_tunning_read
-	ldr	x3, [x25, #:lo12:.LANCHOR152]
+	bl	flash_ddr_tuning_read
+	ldr	x3, [x25, #:lo12:.LANCHOR159]
 	mov	w4, 4
-	ldr	x2, [x24, #:lo12:.LANCHOR153]
+	ldr	x2, [x24, #:lo12:.LANCHOR160]
 	mov	w1, w23
 	mov	w0, w22
 	bl	flash_read_page
 	cmn	w0, #1
 	mov	x0, x19
-	bne	.L1695
-	ldrb	w1, [x20, #:lo12:.LANCHOR39]
-	tbz	x1, 0, .L1695
+	bne	.L1821
+	ldrb	w1, [x20, #:lo12:.LANCHOR41]
+	tbz	x1, 0, .L1821
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, w21
 	bl	nandc_set_if_mode
-	strb	wzr, [x19, #:lo12:.LANCHOR14]
-.L1696:
+	strb	wzr, [x19, #:lo12:.LANCHOR16]
+.L1822:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -10102,10 +10778,10 @@ flash_ddr_para_scan:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1695:
+.L1821:
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR14]
-	b	.L1696
+	strb	w1, [x0, #:lo12:.LANCHOR16]
+	b	.L1822
 	.size	flash_ddr_para_scan, .-flash_ddr_para_scan
 	.section	.text.flash_complete_page_read,"ax",@progbits
 	.align	2
@@ -10118,48 +10794,48 @@ flash_complete_page_read:
 	and	w19, w0, 2097151
 	stp	x23, x24, [sp, 48]
 	mov	w23, w0
-	adrp	x0, .LANCHOR12
+	adrp	x0, .LANCHOR14
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	ubfx	x20, x23, 21, 3
-	ldrb	w0, [x0, #:lo12:.LANCHOR12]
+	ldrb	w0, [x0, #:lo12:.LANCHOR14]
 	mov	x24, x1
 	stp	x27, x28, [sp, 80]
 	mov	x25, x2
 	ubfx	x21, x23, 24, 2
 	cmp	w0, w20
-	bhi	.L1702
-	adrp	x1, .LANCHOR154
+	bhi	.L1828
+	adrp	x1, .LANCHOR161
 	adrp	x0, .LC0
 	mov	w2, 789
-	add	x1, x1, :lo12:.LANCHOR154
+	add	x1, x1, :lo12:.LANCHOR161
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1702:
-	adrp	x0, .LANCHOR24
-	add	x0, x0, :lo12:.LANCHOR24
+.L1828:
+	adrp	x0, .LANCHOR26
+	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w22, [x0, w20, sxtw]
-	adrp	x0, .LANCHOR21
-	ldr	x4, [x0, #:lo12:.LANCHOR21]
+	adrp	x0, .LANCHOR23
+	ldr	x4, [x0, #:lo12:.LANCHOR23]
 	mov	w0, w22
 	bl	nandc_cs
-	cbnz	w21, .L1703
-	adrp	x0, .LANCHOR11
-	adrp	x1, .LANCHOR25
-	ldrb	w0, [x0, #:lo12:.LANCHOR11]
-	cbz	w0, .L1704
-	ldrb	w0, [x1, #:lo12:.LANCHOR25]
-	cbz	w0, .L1703
-.L1704:
-	adrp	x0, .LANCHOR26
-	ldrb	w1, [x1, #:lo12:.LANCHOR25]
-	ldrh	w2, [x0, #:lo12:.LANCHOR26]
+	cbnz	w21, .L1829
+	adrp	x0, .LANCHOR13
+	adrp	x1, .LANCHOR27
+	ldrb	w0, [x0, #:lo12:.LANCHOR13]
+	cbz	w0, .L1830
+	ldrb	w0, [x1, #:lo12:.LANCHOR27]
+	cbz	w0, .L1829
+.L1830:
+	adrp	x0, .LANCHOR28
+	ldrb	w1, [x1, #:lo12:.LANCHOR27]
+	ldrh	w2, [x0, #:lo12:.LANCHOR28]
 	udiv	w0, w19, w2
 	mul	w0, w0, w2
 	sub	w19, w19, w0
-	cbz	w1, .L1705
+	cbz	w1, .L1831
 	add	w19, w0, w19, lsl 1
-.L1703:
+.L1829:
 	ubfiz	x0, x22, 8, 8
 	mov	w1, 5
 	add	x0, x4, x0
@@ -10174,18 +10850,18 @@ flash_complete_page_read:
 	str	w1, [x0, 2052]
 	mov	w1, 224
 	str	w1, [x0, 2056]
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1706
-	cbz	w21, .L1706
+	bne	.L1832
+	cbz	w21, .L1832
 	sub	w0, w21, #1
 	add	w1, w19, w19, lsl 1
 	add	w0, w0, w1
-.L1739:
-	adrp	x20, .LANCHOR32
-	add	x28, x20, :lo12:.LANCHOR32
+.L1865:
+	adrp	x20, .LANCHOR34
+	add	x28, x20, :lo12:.LANCHOR34
 	bl	nandc_set_seed
 	mov	x4, x25
 	mov	x3, x24
@@ -10194,36 +10870,36 @@ flash_complete_page_read:
 	mov	w0, w22
 	bl	nandc_xfer
 	cmn	w0, #1
-	bne	.L1708
-	adrp	x26, .LANCHOR42
-	ldrb	w27, [x26, #:lo12:.LANCHOR42]
-	cbz	w27, .L1709
+	bne	.L1834
+	adrp	x26, .LANCHOR44
+	ldrb	w27, [x26, #:lo12:.LANCHOR44]
+	cbz	w27, .L1835
 	ldrb	w4, [x28, 9]
 	mov	x3, x25
-	strb	wzr, [x26, #:lo12:.LANCHOR42]
+	strb	wzr, [x26, #:lo12:.LANCHOR44]
 	mov	x2, x24
 	orr	w1, w19, w21, lsl 24
 	mov	w0, w22
 	bl	flash_read_page
-	strb	w27, [x26, #:lo12:.LANCHOR42]
-	cbnz	w21, .L1710
-.L1715:
-	adrp	x1, .LANCHOR11
-	ldrb	w1, [x1, #:lo12:.LANCHOR11]
-	cbz	w1, .L1710
-	adrp	x1, .LANCHOR40
-	ldrb	w1, [x1, #:lo12:.LANCHOR40]
+	strb	w27, [x26, #:lo12:.LANCHOR44]
+	cbnz	w21, .L1836
+.L1841:
+	adrp	x1, .LANCHOR13
+	ldrb	w1, [x1, #:lo12:.LANCHOR13]
+	cbz	w1, .L1836
+	adrp	x1, .LANCHOR42
+	ldrb	w1, [x1, #:lo12:.LANCHOR42]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	blt	.L1710
-	add	x20, x20, :lo12:.LANCHOR32
+	blt	.L1836
+	add	x20, x20, :lo12:.LANCHOR34
 	ldrb	w1, [x20, 19]
 	sub	w1, w1, #4
 	and	w1, w1, 255
 	cmp	w1, 3
 	mov	w1, 256
 	csel	w0, w0, w1, hi
-.L1701:
+.L1827:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -10231,38 +10907,38 @@ flash_complete_page_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1705:
-	adrp	x1, .LANCHOR27
-	add	x1, x1, :lo12:.LANCHOR27
+.L1831:
+	adrp	x1, .LANCHOR29
+	add	x1, x1, :lo12:.LANCHOR29
 	ldrh	w19, [x1, w19, uxtw 1]
 	add	w19, w19, w0
-	b	.L1703
-.L1706:
+	b	.L1829
+.L1832:
 	mov	w0, w19
-	b	.L1739
-.L1710:
+	b	.L1865
+.L1836:
 	cmn	w0, #1
-	bne	.L1701
-.L1716:
-	adrp	x0, .LANCHOR148
-	ldr	x5, [x0, #:lo12:.LANCHOR148]
-	cbnz	x5, .L1712
-.L1714:
-	adrp	x0, .LANCHOR42
+	bne	.L1827
+.L1842:
+	adrp	x0, .LANCHOR155
+	ldr	x5, [x0, #:lo12:.LANCHOR155]
+	cbnz	x5, .L1838
+.L1840:
+	adrp	x0, .LANCHOR44
 	mov	w3, -1
 	mov	w2, w23
 	mov	w1, 0
-	ldrb	w4, [x0, #:lo12:.LANCHOR42]
-	adrp	x0, .LC106
-	add	x0, x0, :lo12:.LC106
+	ldrb	w4, [x0, #:lo12:.LANCHOR44]
+	adrp	x0, .LC117
+	add	x0, x0, :lo12:.LC117
 	bl	printf
-	adrp	x0, .LANCHOR14
-	ldrb	w0, [x0, #:lo12:.LANCHOR14]
-	cbnz	w0, .L1713
+	adrp	x0, .LANCHOR16
+	ldrb	w0, [x0, #:lo12:.LANCHOR16]
+	cbnz	w0, .L1839
 	mov	w0, -1
-	b	.L1701
-.L1712:
-	add	x0, x20, :lo12:.LANCHOR32
+	b	.L1827
+.L1838:
+	add	x0, x20, :lo12:.LANCHOR34
 	mov	x3, x25
 	mov	x2, x24
 	orr	w1, w19, w21, lsl 24
@@ -10270,10 +10946,10 @@ flash_complete_page_read:
 	mov	w0, w22
 	blr	x5
 	cmn	w0, #1
-	beq	.L1714
-	b	.L1701
-.L1713:
-	add	x20, x20, :lo12:.LANCHOR32
+	beq	.L1840
+	b	.L1827
+.L1839:
+	add	x20, x20, :lo12:.LANCHOR34
 	orr	w1, w19, w21, lsl 24
 	mov	x3, x25
 	mov	x2, x24
@@ -10285,68 +10961,68 @@ flash_complete_page_read:
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
-	b	flash_ddr_tunning_read
-.L1709:
-	cbz	w21, .L1715
-	b	.L1716
-.L1708:
-	cbnz	w21, .L1701
-	b	.L1715
+	b	flash_ddr_tuning_read
+.L1835:
+	cbz	w21, .L1841
+	b	.L1842
+.L1834:
+	cbnz	w21, .L1827
+	b	.L1841
 	.size	flash_complete_page_read, .-flash_complete_page_read
 	.section	.text.queue_wait_first_req_completed,"ax",@progbits
 	.align	2
 	.type	queue_wait_first_req_completed, %function
 queue_wait_first_req_completed:
 	stp	x29, x30, [sp, -64]!
-	adrp	x0, .LANCHOR120
+	adrp	x0, .LANCHOR126
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	ldrb	w0, [x0, #:lo12:.LANCHOR120]
+	ldrb	w0, [x0, #:lo12:.LANCHOR126]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	cmp	w0, 255
-	bne	.L1741
-.L1759:
+	bne	.L1867
+.L1885:
 	mov	w21, 0
-	b	.L1740
-.L1741:
-	adrp	x19, .LANCHOR46
+	b	.L1866
+.L1867:
+	adrp	x19, .LANCHOR48
 	sxtw	x22, w0
-	add	x1, x19, :lo12:.LANCHOR46
+	add	x1, x19, :lo12:.LANCHOR48
 	add	x1, x1, x22, lsl 6
 	ldrb	w2, [x1, 58]
 	ldr	w21, [x1, 40]
 	sub	w3, w2, #1
 	cmp	w3, 9
-	bhi	.L1759
-	adrp	x1, .L1744
-	add	x1, x1, :lo12:.L1744
+	bhi	.L1885
+	adrp	x1, .L1870
+	add	x1, x1, :lo12:.L1870
 	ldrb	w1, [x1,w3,uxtw]
-	adr	x3, .Lrtx1744
+	adr	x3, .Lrtx1870
 	add	x1, x3, w1, sxtb #2
 	br	x1
-.Lrtx1744:
+.Lrtx1870:
 	.section	.rodata.queue_wait_first_req_completed,"a",@progbits
 	.align	0
 	.align	2
-.L1744:
-	.byte	(.L1743 - .Lrtx1744) / 4
-	.byte	(.L1743 - .Lrtx1744) / 4
-	.byte	(.L1745 - .Lrtx1744) / 4
-	.byte	(.L1745 - .Lrtx1744) / 4
-	.byte	(.L1745 - .Lrtx1744) / 4
-	.byte	(.L1746 - .Lrtx1744) / 4
-	.byte	(.L1747 - .Lrtx1744) / 4
-	.byte	(.L1748 - .Lrtx1744) / 4
-	.byte	(.L1745 - .Lrtx1744) / 4
-	.byte	(.L1748 - .Lrtx1744) / 4
+.L1870:
+	.byte	(.L1869 - .Lrtx1870) / 4
+	.byte	(.L1869 - .Lrtx1870) / 4
+	.byte	(.L1871 - .Lrtx1870) / 4
+	.byte	(.L1871 - .Lrtx1870) / 4
+	.byte	(.L1871 - .Lrtx1870) / 4
+	.byte	(.L1872 - .Lrtx1870) / 4
+	.byte	(.L1873 - .Lrtx1870) / 4
+	.byte	(.L1874 - .Lrtx1870) / 4
+	.byte	(.L1871 - .Lrtx1870) / 4
+	.byte	(.L1874 - .Lrtx1870) / 4
 	.section	.text.queue_wait_first_req_completed
-.L1743:
+.L1869:
 	mov	w1, 64
 	mov	w0, w21
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1759
-	add	x19, x19, :lo12:.LANCHOR46
+	tbz	x0, 6, .L1885
+	add	x19, x19, :lo12:.LANCHOR48
 	add	x19, x19, x22, lsl 6
 	ldp	x1, x0, [x19, 8]
 	ldr	x2, [x19, 24]
@@ -10360,128 +11036,128 @@ queue_wait_first_req_completed:
 	ldrb	w0, [x19, 2]
 	orr	w0, w0, 8
 	strb	w0, [x19, 2]
-	b	.L1759
-.L1745:
+	b	.L1885
+.L1871:
 	mov	w0, w21
 	mov	w1, 64
 	bl	flash_wait_device_ready
 	mov	w21, w0
-	tbz	x21, 6, .L1759
-	add	x19, x19, :lo12:.LANCHOR46
+	tbz	x21, 6, .L1885
+	add	x19, x19, :lo12:.LANCHOR48
 	mov	w0, 5
 	add	x19, x19, x22, lsl 6
 	tst	w21, w0
-	beq	.L1758
+	beq	.L1884
 	ldrb	w1, [x19, 1]
 	mov	w0, 11
 	ldr	w3, [x19, 40]
 	mov	w4, 11
 	ldr	w2, [x19, 52]
 	strb	w0, [x19, 58]
-	adrp	x0, .LC107
-	add	x0, x0, :lo12:.LC107
+	adrp	x0, .LC118
+	add	x0, x0, :lo12:.LC118
 	bl	printf
-.L1777:
+.L1903:
 	mov	w0, -1
 	str	w0, [x19, 52]
-	b	.L1740
-.L1748:
+	b	.L1866
+.L1874:
 	cmp	w2, 10
-	add	x20, x19, :lo12:.LANCHOR46
+	add	x20, x19, :lo12:.LANCHOR48
 	ubfiz	x0, x0, 6, 8
 	mov	w1, 3
 	mov	w2, 9
 	add	x0, x20, x0
 	csel	w2, w2, w1, eq
 	ubfx	x3, x21, 21, 3
-.L1753:
+.L1879:
 	ldrb	w1, [x0]
 	cmp	w1, 255
-	bne	.L1757
+	bne	.L1883
 	mov	w21, -1
-	b	.L1740
-.L1757:
+	b	.L1866
+.L1883:
 	sxtw	x23, w1
 	ubfiz	x0, x1, 6, 8
 	add	x1, x20, x23, lsl 6
 	add	x0, x20, x0
 	ldrb	w4, [x1, 58]
 	cmp	w4, w2
-	bne	.L1753
+	bne	.L1879
 	ldr	w1, [x1, 40]
 	ubfx	x1, x1, 21, 3
 	cmp	w3, w1
-	bne	.L1753
+	bne	.L1879
 	mov	w0, w21
 	mov	w1, 64
 	bl	flash_wait_device_ready
 	mov	w24, w0
 	and	w21, w0, 64
-	tbz	x24, 6, .L1755
+	tbz	x24, 6, .L1881
 	add	x20, x20, x22, lsl 6
 	ands	w21, w0, 15
-	beq	.L1756
+	beq	.L1882
 	ldrb	w1, [x20, 1]
 	mov	w4, 11
 	ldr	w3, [x20, 40]
-	adrp	x0, .LC107
+	adrp	x0, .LC118
 	ldr	w2, [x20, 52]
-	add	x0, x0, :lo12:.LC107
+	add	x0, x0, :lo12:.LC118
 	mov	w21, w24
 	bl	printf
 	mov	w0, 11
 	strb	w0, [x20, 58]
 	mov	w0, -1
 	str	w0, [x20, 52]
-.L1755:
-	add	x1, x19, :lo12:.LANCHOR46
+.L1881:
+	add	x1, x19, :lo12:.LANCHOR48
 	add	x22, x1, x22, lsl 6
 	add	x1, x1, x23, lsl 6
 	ldrb	w0, [x22, 58]
 	strb	w0, [x1, 58]
 	ldr	w0, [x22, 52]
 	str	w0, [x1, 52]
-.L1740:
+.L1866:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1756:
+.L1882:
 	mov	w0, 12
 	str	wzr, [x20, 52]
 	strb	w0, [x20, 58]
-	b	.L1755
-.L1746:
+	b	.L1881
+.L1872:
 	mov	w0, w21
 	mov	w1, 32
 	bl	flash_wait_device_ready
 	mov	w21, w0
-	tbz	x21, 5, .L1759
-	add	x19, x19, :lo12:.LANCHOR46
+	tbz	x21, 5, .L1885
+	add	x19, x19, :lo12:.LANCHOR48
 	tst	x21, 15
 	add	x19, x19, x22, lsl 6
-	beq	.L1758
+	beq	.L1884
 	mov	w0, 11
 	strb	w0, [x19, 58]
-	b	.L1777
-.L1758:
+	b	.L1903
+.L1884:
 	mov	w0, 12
 	str	wzr, [x19, 52]
 	strb	w0, [x19, 58]
-	b	.L1759
-.L1747:
+	b	.L1885
+.L1873:
 	mov	w1, 64
 	mov	w0, w21
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1759
-	add	x19, x19, :lo12:.LANCHOR46
+	tbz	x0, 6, .L1885
+	add	x19, x19, :lo12:.LANCHOR48
 	add	x19, x19, x22, lsl 6
 	str	w0, [x19, 52]
 	mov	w0, 6
 	strb	w0, [x19, 58]
-	b	.L1759
+	b	.L1885
 	.size	queue_wait_first_req_completed, .-queue_wait_first_req_completed
 	.section	.text.sblk_wait_write_queue_completed,"ax",@progbits
 	.align	2
@@ -10491,19 +11167,19 @@ sblk_wait_write_queue_completed:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR120
-	add	x19, x19, :lo12:.LANCHOR120
-.L1779:
+	adrp	x19, .LANCHOR126
+	add	x19, x19, :lo12:.LANCHOR126
+.L1905:
 	ldrb	w0, [x19]
 	cmp	w0, 255
-	bne	.L1780
+	bne	.L1906
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1780:
+.L1906:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L1779
+	b	.L1905
 	.size	sblk_wait_write_queue_completed, .-sblk_wait_write_queue_completed
 	.section	.text.ftl_read_page,"ax",@progbits
 	.align	2
@@ -10556,72 +11232,6 @@ ftl_read_ppa_page:
 	ldp	x29, x30, [sp], 48
 	b	flash_read_page_en
 	.size	ftl_read_ppa_page, .-ftl_read_ppa_page
-	.section	.text.ftl_open_sblk_read_test,"ax",@progbits
-	.align	2
-	.global	ftl_open_sblk_read_test
-	.type	ftl_open_sblk_read_test, %function
-ftl_open_sblk_read_test:
-	stp	x29, x30, [sp, -96]!
-	and	w14, w0, 65535
-	mov	w0, w14
-	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR80
-	adrp	x24, .LANCHOR117
-	add	x23, x23, :lo12:.LANCHOR80
-	add	x24, x24, :lo12:.LANCHOR117
-	stp	x19, x20, [sp, 16]
-	stp	x21, x22, [sp, 32]
-	add	x1, x29, 80
-	mov	w20, 0
-	bl	ftl_get_blk_list_in_sblk
-	strb	w0, [x29, 73]
-	strh	w14, [x29, 64]
-.L1787:
-	ldrh	w0, [x23]
-	cmp	w0, w20
-	bls	.L1786
-	adrp	x22, .LANCHOR72
-	adrp	x21, .LANCHOR155
-	mov	w19, 0
-	add	x22, x22, :lo12:.LANCHOR72
-	add	x21, x21, :lo12:.LANCHOR155
-	b	.L1789
-.L1792:
-	add	x0, x29, 64
-	mov	w1, 65535
-	add	x0, x0, x19, sxtw 1
-	ldrh	w0, [x0, 16]
-	cmp	w0, w1
-	bne	.L1788
-.L1791:
-	add	w19, w19, 1
-	and	w19, w19, 65535
-.L1789:
-	ldrb	w0, [x22]
-	cmp	w0, w19
-	bhi	.L1792
-	add	w20, w20, 1
-	and	w20, w20, 65535
-	b	.L1787
-.L1788:
-	adrp	x1, .LANCHOR103
-	ldrb	w3, [x24]
-	mov	x2, x21
-	ldrh	w4, [x1, #:lo12:.LANCHOR103]
-	adrp	x1, ftl_tmp_buffer
-	add	x1, x1, :lo12:ftl_tmp_buffer
-	madd	w0, w4, w0, w20
-	bl	ftl_read_ppa_page
-	cmp	w0, 512
-	bne	.L1791
-.L1786:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 96
-	ret
-	.size	ftl_open_sblk_read_test, .-ftl_open_sblk_read_test
 	.section	.text.sblk_read_page,"ax",@progbits
 	.align	2
 	.global	sblk_read_page
@@ -10635,19 +11245,19 @@ sblk_read_page:
 	mov	w22, w21
 	stp	x23, x24, [sp, 48]
 	mov	x20, x0
-	adrp	x23, .LANCHOR120
-	adrp	x24, .LANCHOR46
+	adrp	x23, .LANCHOR126
+	adrp	x24, .LANCHOR48
 	mov	x19, x0
-	add	x23, x23, :lo12:.LANCHOR120
-	add	x24, x24, :lo12:.LANCHOR46
+	add	x23, x23, :lo12:.LANCHOR126
+	add	x24, x24, :lo12:.LANCHOR48
 	stp	x25, x26, [sp, 64]
-.L1798:
-	cbnz	w22, .L1802
-.L1810:
-	adrp	x19, .LANCHOR46
-	add	x19, x19, :lo12:.LANCHOR46
-.L1803:
-	cbnz	w21, .L1806
+.L1913:
+	cbnz	w22, .L1917
+.L1925:
+	adrp	x19, .LANCHOR48
+	add	x19, x19, :lo12:.LANCHOR48
+.L1918:
+	cbnz	w21, .L1921
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10655,14 +11265,14 @@ sblk_read_page:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1802:
+.L1917:
 	ldrb	w25, [x19]
 	ldr	w26, [x19, 40]
-.L1799:
+.L1914:
 	mov	w1, 0
 	mov	w0, w26
 	bl	queue_lun_state
-	cbnz	w0, .L1800
+	cbnz	w0, .L1915
 	ldr	w1, [x19, 40]
 	mov	w0, 48
 	bl	flash_start_page_read
@@ -10675,26 +11285,26 @@ sblk_read_page:
 	mov	x0, x23
 	bl	buf_add_tail
 	subs	w22, w22, #1
-	beq	.L1810
+	beq	.L1925
 	ubfiz	x19, x25, 6, 8
 	add	x19, x24, x19
-	b	.L1798
-.L1800:
+	b	.L1913
+.L1915:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L1799
-.L1806:
+	b	.L1914
+.L1921:
 	ldrb	w0, [x20, 58]
 	cmp	w0, 12
-	bne	.L1804
+	bne	.L1919
 	ldrb	w20, [x20]
 	sub	w21, w21, #1
 	add	x20, x19, x20, lsl 6
-	b	.L1803
-.L1804:
+	b	.L1918
+.L1919:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L1803
+	b	.L1918
 	.size	sblk_read_page, .-sblk_read_page
 	.section	.text.gc_check_data_one_wl,"ax",@progbits
 	.align	2
@@ -10702,108 +11312,108 @@ sblk_read_page:
 	.type	gc_check_data_one_wl, %function
 gc_check_data_one_wl:
 	sub	sp, sp, #112
-	adrp	x0, .LANCHOR5
+	adrp	x0, .LANCHOR6
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x19, x20, [sp, 32]
-	adrp	x19, .LANCHOR63
-	add	x20, x19, :lo12:.LANCHOR63
+	adrp	x19, .LANCHOR65
+	add	x20, x19, :lo12:.LANCHOR65
 	stp	x21, x22, [sp, 48]
-	ldr	x21, [x0, #:lo12:.LANCHOR5]
+	ldr	x21, [x0, #:lo12:.LANCHOR6]
 	stp	x23, x24, [sp, 64]
 	ldr	x0, [x20, 8]
 	stp	x25, x26, [sp, 80]
 	str	x27, [sp, 96]
-	cbnz	x0, .L1813
+	cbnz	x0, .L1928
 	mov	w0, 1
 	bl	buf_alloc
 	str	x0, [x20, 8]
-.L1813:
-	add	x0, x19, :lo12:.LANCHOR63
+.L1928:
+	add	x0, x19, :lo12:.LANCHOR65
 	ldr	x20, [x0, 8]
-	cbnz	x20, .L1814
-	adrp	x1, .LANCHOR156
+	cbnz	x20, .L1929
+	adrp	x1, .LANCHOR162
 	adrp	x0, .LC0
-	mov	w2, 348
-	add	x1, x1, :lo12:.LANCHOR156
+	mov	w2, 366
+	add	x1, x1, :lo12:.LANCHOR162
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1814:
-	adrp	x26, .LANCHOR103
-	adrp	x27, .LANCHOR67
+.L1929:
+	adrp	x26, .LANCHOR108
+	adrp	x27, .LANCHOR71
 	add	x25, x21, 96
-	add	x26, x26, :lo12:.LANCHOR103
-	add	x27, x27, :lo12:.LANCHOR67
+	add	x26, x26, :lo12:.LANCHOR108
+	add	x27, x27, :lo12:.LANCHOR71
 	mov	w24, 0
-.L1815:
+.L1930:
 	ldrb	w0, [x21, 89]
 	cmp	w24, w0
-	bge	.L1824
+	bge	.L1939
 	mov	w23, 1
-	add	x22, x19, :lo12:.LANCHOR63
-	b	.L1825
-.L1823:
+	add	x22, x19, :lo12:.LANCHOR65
+	b	.L1940
+.L1938:
 	ldrh	w0, [x25]
 	ldrh	w1, [x26]
 	ldrb	w2, [x27]
 	cmp	w2, 3
 	mul	w1, w0, w1
 	ldrh	w0, [x22, 16]
-	bne	.L1816
+	bne	.L1931
 	add	w0, w0, w1
 	orr	w0, w0, w23, lsl 24
-.L1836:
+.L1951:
 	str	w0, [x20, 40]
 	mov	w1, 1
 	mov	x0, x20
 	bl	sblk_read_page
 	ldr	w2, [x20, 52]
-	adrp	x1, .LANCHOR139
+	adrp	x1, .LANCHOR146
 	cmn	w2, #1
-	beq	.L1819
+	beq	.L1934
 	ldrh	w0, [x22, 22]
-	ldr	x4, [x1, #:lo12:.LANCHOR139]
+	ldr	x4, [x1, #:lo12:.LANCHOR146]
 	ldr	x3, [x20, 24]
 	lsl	x0, x0, 2
 	ldr	w5, [x4, x0]
 	ldr	w4, [x3, 4]
 	cmp	w5, w4
-	bne	.L1819
-	adrp	x4, .LANCHOR140
-	ldr	x4, [x4, #:lo12:.LANCHOR140]
+	bne	.L1934
+	adrp	x4, .LANCHOR147
+	ldr	x4, [x4, #:lo12:.LANCHOR147]
 	ldr	w4, [x4, x0]
 	ldr	w0, [x3, 8]
 	cmp	w4, w0
-	beq	.L1820
-.L1819:
+	beq	.L1935
+.L1934:
 	ldrh	w0, [x22, 22]
-	ldr	x1, [x1, #:lo12:.LANCHOR139]
+	ldr	x1, [x1, #:lo12:.LANCHOR146]
 	lsl	x0, x0, 2
 	ldr	w3, [x1, x0]
 	cmn	w3, #1
-	beq	.L1820
-	adrp	x1, .LANCHOR7
-	ldr	w1, [x1, #:lo12:.LANCHOR7]
-	tbz	x1, 10, .L1821
+	beq	.L1935
+	adrp	x1, .LANCHOR9
+	ldr	w1, [x1, #:lo12:.LANCHOR9]
+	tbz	x1, 10, .L1936
 	ldr	x1, [x20, 24]
-	adrp	x4, .LANCHOR140
-	ldr	x4, [x4, #:lo12:.LANCHOR140]
+	adrp	x4, .LANCHOR147
+	ldr	x4, [x4, #:lo12:.LANCHOR147]
 	ldr	w5, [x1, 12]
 	str	w5, [sp]
 	ldr	w4, [x4, x0]
-	adrp	x0, .LC108
+	adrp	x0, .LC119
 	ldp	w5, w6, [x1]
-	add	x0, x0, :lo12:.LC108
+	add	x0, x0, :lo12:.LC119
 	ldr	w7, [x1, 8]
 	ldr	w1, [x20, 40]
 	bl	printf
-.L1821:
-	adrp	x0, .LANCHOR4
+.L1936:
+	adrp	x0, .LANCHOR5
 	ldrh	w1, [x21, 80]
-	ldr	x0, [x0, #:lo12:.LANCHOR4]
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	strh	wzr, [x0, x1, lsl 1]
 	mov	w0, -1
-.L1812:
+.L1927:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -10812,37 +11422,37 @@ gc_check_data_one_wl:
 	ldr	x27, [sp, 96]
 	add	sp, sp, 112
 	ret
-.L1816:
+.L1931:
 	cmp	w2, 2
-	bne	.L1818
+	bne	.L1933
 	sub	w0, w0, #1
 	add	w1, w23, w1
 	add	w0, w0, w1
 	orr	w0, w0, 33554432
-	b	.L1836
-.L1818:
+	b	.L1951
+.L1933:
 	add	w0, w0, w1
-	b	.L1836
-.L1820:
+	b	.L1951
+.L1935:
 	ldrh	w0, [x22, 22]
 	add	w23, w23, 1
 	add	w0, w0, 1
 	strh	w0, [x22, 22]
-.L1825:
+.L1940:
 	ldrh	w0, [x22, 20]
 	cmp	w23, w0
-	ble	.L1823
+	ble	.L1938
 	add	w24, w24, 1
 	add	x25, x25, 2
-	b	.L1815
-.L1824:
-.L1822:
-	add	x19, x19, :lo12:.LANCHOR63
+	b	.L1930
+.L1939:
+.L1937:
+	add	x19, x19, :lo12:.LANCHOR65
 	ldrh	w0, [x19, 16]
 	add	w0, w0, 1
 	strh	w0, [x19, 16]
 	mov	w0, 0
-	b	.L1812
+	b	.L1927
 	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
 	.section	.text.flash_prog_page,"ax",@progbits
 	.align	2
@@ -10854,12 +11464,12 @@ flash_prog_page:
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 255
 	stp	x21, x22, [sp, 32]
-	adrp	x0, .LANCHOR21
-	adrp	x22, .LANCHOR7
+	adrp	x0, .LANCHOR23
+	adrp	x22, .LANCHOR9
 	stp	x25, x26, [sp, 64]
-	ldr	x25, [x0, #:lo12:.LANCHOR21]
+	ldr	x25, [x0, #:lo12:.LANCHOR23]
 	mov	w21, w1
-	ldr	w0, [x22, #:lo12:.LANCHOR7]
+	ldr	w0, [x22, #:lo12:.LANCHOR9]
 	and	x19, x20, 255
 	stp	x23, x24, [sp, 48]
 	add	x23, x19, 8
@@ -10869,22 +11479,22 @@ flash_prog_page:
 	add	x23, x25, x23, lsl 8
 	and	w24, w1, 2097151
 	ubfx	x28, x21, 24, 2
-	tbz	x0, 4, .L1838
-	adrp	x0, .LC109
+	tbz	x0, 4, .L1953
+	adrp	x0, .LC120
 	mov	w3, w4
 	mov	w2, w28
-	add	x0, x0, :lo12:.LC109
+	add	x0, x0, :lo12:.LC120
 	bl	printf
-.L1838:
+.L1953:
 	bl	nandc_wait_flash_ready
 	mov	w0, w20
 	bl	hynix_reconfig_rr_para
 	mov	w0, w20
 	bl	nandc_cs
 	mov	w0, w20
-	cbnz	w28, .L1839
+	cbnz	w28, .L1954
 	bl	zftl_flash_enter_slc_mode
-.L1840:
+.L1955:
 	add	x19, x25, x19, lsl 8
 	mov	w0, 128
 	str	w0, [x19, 2056]
@@ -10898,10 +11508,10 @@ flash_prog_page:
 	str	w0, [x19, 2052]
 	mov	w0, w24
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR32+9
+	adrp	x0, .LANCHOR34+9
 	mov	x3, x27
 	mov	x2, x26
-	ldrb	w1, [x0, #:lo12:.LANCHOR32+9]
+	ldrb	w1, [x0, #:lo12:.LANCHOR34+9]
 	mov	w0, 1
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
@@ -10914,15 +11524,15 @@ flash_prog_page:
 	mov	w0, w20
 	bl	nandc_de_cs
 	and	w19, w2, 4
-	tbz	x2, 2, .L1837
-	ldr	w0, [x22, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L1837
-	adrp	x0, .LC110
+	tbz	x2, 2, .L1952
+	ldr	w0, [x22, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L1952
+	adrp	x0, .LC121
 	mov	w2, w19
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC110
+	add	x0, x0, :lo12:.LC121
 	bl	printf
-.L1837:
+.L1952:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10931,9 +11541,9 @@ flash_prog_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1839:
+.L1954:
 	bl	zftl_flash_exit_slc_mode
-	b	.L1840
+	b	.L1955
 	.size	flash_prog_page, .-flash_prog_page
 	.section	.text.flash_test_blk,"ax",@progbits
 	.align	2
@@ -10947,77 +11557,77 @@ flash_test_blk:
 	stp	x21, x22, [sp, 32]
 	ands	w21, w0, 255
 	str	x23, [sp, 48]
-	bne	.L1853
-	adrp	x0, .LANCHOR157
-	ldrb	w0, [x0, #:lo12:.LANCHOR157]
+	bne	.L1968
+	adrp	x0, .LANCHOR163
+	ldrb	w0, [x0, #:lo12:.LANCHOR163]
 	cmp	w0, w19
-	bhi	.L1857
-.L1853:
-	adrp	x22, .LANCHOR152
-	adrp	x23, .LANCHOR153
+	bhi	.L1972
+.L1968:
+	adrp	x22, .LANCHOR159
+	adrp	x23, .LANCHOR160
 	mov	w2, 32
 	mov	w1, 165
-	ldr	x0, [x22, #:lo12:.LANCHOR152]
+	ldr	x0, [x22, #:lo12:.LANCHOR159]
 	bl	ftl_memset
-	ldr	x0, [x23, #:lo12:.LANCHOR153]
+	ldr	x0, [x23, #:lo12:.LANCHOR160]
 	mov	w2, 8
 	mov	w1, 90
 	bl	ftl_memset
-	adrp	x0, .LANCHOR26
-	ldrh	w20, [x0, #:lo12:.LANCHOR26]
+	adrp	x0, .LANCHOR28
+	ldrh	w20, [x0, #:lo12:.LANCHOR28]
 	mov	w0, w21
 	mul	w20, w20, w19
 	mov	w1, w20
 	bl	flash_erase_block
 	cmn	w0, #1
-	beq	.L1855
-	adrp	x19, .LANCHOR32
-	add	x19, x19, :lo12:.LANCHOR32
-	ldr	x3, [x22, #:lo12:.LANCHOR152]
+	beq	.L1970
+	adrp	x19, .LANCHOR34
+	add	x19, x19, :lo12:.LANCHOR34
+	ldr	x3, [x22, #:lo12:.LANCHOR159]
 	mov	w1, w20
-	ldr	x2, [x23, #:lo12:.LANCHOR153]
+	ldr	x2, [x23, #:lo12:.LANCHOR160]
 	mov	w0, w21
 	ldrb	w4, [x19, 9]
 	bl	flash_prog_page
 	cmn	w0, #1
-	beq	.L1855
+	beq	.L1970
 	ldrb	w4, [x19, 9]
 	mov	w1, w20
-	ldr	x3, [x22, #:lo12:.LANCHOR152]
+	ldr	x3, [x22, #:lo12:.LANCHOR159]
 	mov	w0, w21
-	ldr	x2, [x23, #:lo12:.LANCHOR153]
+	ldr	x2, [x23, #:lo12:.LANCHOR160]
 	bl	flash_read_page
 	mov	w19, w0
 	cmn	w0, #1
-	beq	.L1855
-	ldr	x0, [x23, #:lo12:.LANCHOR153]
+	beq	.L1970
+	ldr	x0, [x23, #:lo12:.LANCHOR160]
 	ldr	w1, [x0]
 	mov	w0, 23130
 	movk	w0, 0x5a5a, lsl 16
 	cmp	w1, w0
-	bne	.L1855
-	ldr	x0, [x22, #:lo12:.LANCHOR152]
+	bne	.L1970
+	ldr	x0, [x22, #:lo12:.LANCHOR159]
 	ldr	w1, [x0]
 	mov	w0, 42405
 	movk	w0, 0xa5a5, lsl 16
 	cmp	w1, w0
-	beq	.L1856
-.L1855:
+	beq	.L1971
+.L1970:
 	mov	w19, -1
-.L1856:
+.L1971:
 	mov	w1, w20
 	mov	w0, w21
 	bl	flash_erase_block
 	mov	w0, w19
-.L1852:
+.L1967:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1857:
+.L1972:
 	mov	w0, 0
-	b	.L1852
+	b	.L1967
 	.size	flash_test_blk, .-flash_test_blk
 	.section	.text.id_block_prog_msb_ff_data,"ax",@progbits
 	.align	2
@@ -11028,50 +11638,50 @@ id_block_prog_msb_ff_data:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	and	w22, w0, 255
-	adrp	x0, .LANCHOR158
+	adrp	x0, .LANCHOR164
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
-	ldrb	w0, [x0, #:lo12:.LANCHOR158]
+	ldrb	w0, [x0, #:lo12:.LANCHOR164]
 	str	x25, [sp, 64]
-	cbnz	w0, .L1868
-	adrp	x20, .LANCHOR32
-	add	x20, x20, :lo12:.LANCHOR32
+	cbnz	w0, .L1983
+	adrp	x20, .LANCHOR34
+	add	x20, x20, :lo12:.LANCHOR34
 	ldrb	w0, [x20, 19]
 	sub	w0, w0, #5
 	and	w3, w0, 255
 	cmp	w3, 63
-	bhi	.L1868
+	bhi	.L1983
 	and	w19, w2, 65535
 	mov	x2, 16391
 	movk	x2, 0x4000, lsl 16
 	movk	x2, 0x8000, lsl 48
 	lsr	x0, x2, x3
-	tbz	x0, 0, .L1868
-	adrp	x21, .LANCHOR126
+	tbz	x0, 0, .L1983
+	adrp	x21, .LANCHOR132
 	mov	w23, w1
-	add	x21, x21, :lo12:.LANCHOR126
+	add	x21, x21, :lo12:.LANCHOR132
 	mov	w25, 65535
-	adrp	x24, .LANCHOR143
-.L1870:
+	adrp	x24, .LANCHOR150
+.L1985:
 	ldrh	w0, [x20, 10]
 	cmp	w0, w19
-	bhi	.L1871
-.L1868:
+	bhi	.L1986
+.L1983:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1871:
+.L1986:
 	ldrh	w0, [x21, w19, sxtw 1]
 	cmp	w0, w25
-	bne	.L1868
-	ldr	x0, [x24, #:lo12:.LANCHOR143]
+	bne	.L1983
+	ldr	x0, [x24, #:lo12:.LANCHOR150]
 	mov	w2, 16384
 	mov	w1, 255
 	bl	ftl_memset
-	ldr	x3, [x24, #:lo12:.LANCHOR143]
+	ldr	x3, [x24, #:lo12:.LANCHOR150]
 	add	w1, w19, w23
 	ldrb	w4, [x20, 9]
 	add	w19, w19, 1
@@ -11079,7 +11689,7 @@ id_block_prog_msb_ff_data:
 	mov	w0, w22
 	and	w19, w19, 65535
 	bl	flash_prog_page
-	b	.L1870
+	b	.L1985
 	.size	id_block_prog_msb_ff_data, .-id_block_prog_msb_ff_data
 	.section	.text.idb_write_data,"ax",@progbits
 	.align	2
@@ -11096,16 +11706,16 @@ idb_write_data:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	bls	.L1874
+	bls	.L1989
 	cmp	w1, 575
-	bhi	.L1875
-	adrp	x0, .LANCHOR159
+	bhi	.L1990
+	adrp	x0, .LANCHOR165
 	mov	x1, x2
 	mov	w2, 1
 	cmp	w4, 64
-	str	w2, [x0, #:lo12:.LANCHOR159]
+	str	w2, [x0, #:lo12:.LANCHOR165]
 	adrp	x0, idb_buf
-	bhi	.L1876
+	bhi	.L1991
 	mov	w2, 64
 	sub	w4, w2, w4
 	sub	w2, w3, w4
@@ -11113,9 +11723,9 @@ idb_write_data:
 	lsl	w2, w2, 9
 	add	x1, x1, x4
 	add	x0, x0, :lo12:idb_buf
-.L1952:
+.L2067:
 	bl	ftl_memcpy
-.L1931:
+.L2046:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -11124,7 +11734,7 @@ idb_write_data:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 256
 	ret
-.L1876:
+.L1991:
 	mov	w2, 576
 	sub	w2, w2, w4
 	cmp	w3, w2
@@ -11134,16 +11744,16 @@ idb_write_data:
 	add	x0, x0, :lo12:idb_buf
 	lsl	w2, w2, 9
 	add	x0, x0, x4
-	b	.L1952
-.L1874:
+	b	.L2067
+.L1989:
 	cmp	w1, 575
-	bls	.L1931
-.L1875:
-	adrp	x0, .LANCHOR159
-	ldr	w0, [x0, #:lo12:.LANCHOR159]
-	cbz	w0, .L1931
-	adrp	x3, .LANCHOR32
-	add	x1, x3, :lo12:.LANCHOR32
+	bls	.L2046
+.L1990:
+	adrp	x0, .LANCHOR165
+	ldr	w0, [x0, #:lo12:.LANCHOR165]
+	cbz	w0, .L2046
+	adrp	x3, .LANCHOR34
+	add	x1, x3, :lo12:.LANCHOR34
 	str	x3, [x29, 176]
 	adrp	x3, idb_buf
 	add	x6, x3, :lo12:idb_buf
@@ -11163,9 +11773,9 @@ idb_write_data:
 	cmp	w27, 512
 	csel	w27, w27, w0, lt
 	mov	w0, 0
-.L1881:
+.L1996:
 	ldr	w5, [x1]
-	cbnz	w5, .L1879
+	cbnz	w5, .L1994
 	ldr	w5, [x6, w0, uxtw 2]
 	add	w0, w0, 1
 	str	w5, [x1], -4
@@ -11173,40 +11783,40 @@ idb_write_data:
 	sub	w2, w2, #1
 	csel	w0, w0, wzr, cc
 	cmp	w2, 4096
-	bne	.L1881
-.L1879:
+	bne	.L1996
+.L1994:
 	add	x0, x3, :lo12:idb_buf
 	mov	w3, w27
 	ldr	w1, [x0, w2, uxtw 2]
-	adrp	x0, .LC111
-	add	x0, x0, :lo12:.LC111
+	adrp	x0, .LC122
+	add	x0, x0, :lo12:.LC122
 	bl	printf
 	stp	wzr, wzr, [x29, 168]
 	adrp	x0, gp_flash_check_buf
 	add	x0, x0, :lo12:gp_flash_check_buf
 	str	x0, [x29, 184]
-.L1915:
+.L2030:
 	adrp	x0, gp_flash_check_buf
 	add	x20, x0, :lo12:gp_flash_check_buf
 	mov	w1, 0
 	mov	w2, 512
 	mov	x0, x20
 	bl	ftl_memset
-	adrp	x0, .LANCHOR20
+	adrp	x0, .LANCHOR22
 	ldr	w1, [x29, 172]
-	ldr	x0, [x0, #:lo12:.LANCHOR20]
+	ldr	x0, [x0, #:lo12:.LANCHOR22]
 	add	x0, x0, x1, uxtw
 	ldrb	w0, [x0, 32]
 	cmp	w0, 255
-	beq	.L1882
+	beq	.L1997
 	ldr	w1, [x29, 132]
-	adrp	x19, .LANCHOR42
+	adrp	x19, .LANCHOR44
 	mul	w26, w0, w1
 	ldr	x0, [x29, 176]
-	add	x25, x0, :lo12:.LANCHOR32
-	ldrb	w0, [x19, #:lo12:.LANCHOR42]
+	add	x25, x0, :lo12:.LANCHOR34
+	ldrb	w0, [x19, #:lo12:.LANCHOR44]
 	str	w0, [x29, 128]
-	strb	wzr, [x19, #:lo12:.LANCHOR42]
+	strb	wzr, [x19, #:lo12:.LANCHOR44]
 	mov	w0, 0
 	ldrb	w21, [x25, 9]
 	ldrh	w23, [x25, 10]
@@ -11218,11 +11828,11 @@ idb_write_data:
 	msub	w23, w23, w22, w26
 	sub	w24, w26, w23
 	cmp	w26, w24
-	bne	.L1921
-	adrp	x0, .LANCHOR22
-	ldrb	w0, [x0, #:lo12:.LANCHOR22]
+	bne	.L2036
+	adrp	x0, .LANCHOR24
+	ldrb	w0, [x0, #:lo12:.LANCHOR24]
 	cmp	w0, 9
-	bne	.L1921
+	bne	.L2036
 	mov	w2, 1024
 	mov	w1, 0
 	mov	x0, x20
@@ -11258,24 +11868,24 @@ idb_write_data:
 	str	w0, [x1, 8]
 	sub	w0, w27, #4
 	str	w0, [x29, 164]
-.L1883:
+.L1998:
 	adrp	x22, idb_buf
-	adrp	x28, .LANCHOR158
+	adrp	x28, .LANCHOR164
 	add	x22, x22, :lo12:idb_buf
-	add	x0, x28, :lo12:.LANCHOR158
-	adrp	x25, .LANCHOR27
+	add	x0, x28, :lo12:.LANCHOR164
+	adrp	x25, .LANCHOR29
 	str	x0, [x29, 152]
 	mov	w20, 0
-	add	x0, x25, :lo12:.LANCHOR27
+	add	x0, x25, :lo12:.LANCHOR29
 	str	x0, [x29, 144]
-.L1885:
+.L2000:
 	cmp	w27, w20
-	bhi	.L1896
+	bhi	.L2011
 	ldr	x0, [x29, 176]
-	add	x25, x19, :lo12:.LANCHOR42
-	strb	wzr, [x19, #:lo12:.LANCHOR42]
+	add	x25, x19, :lo12:.LANCHOR44
+	strb	wzr, [x19, #:lo12:.LANCHOR44]
 	mov	w21, 4
-	add	x0, x0, :lo12:.LANCHOR32
+	add	x0, x0, :lo12:.LANCHOR34
 	mov	w22, 0
 	str	wzr, [x29, 144]
 	ldrb	w1, [x0, 9]
@@ -11293,72 +11903,72 @@ idb_write_data:
 	str	w0, [x29, 160]
 	adrp	x0, gp_flash_check_buf
 	add	x20, x0, :lo12:gp_flash_check_buf
-	adrp	x0, .LANCHOR27
-	add	x0, x0, :lo12:.LANCHOR27
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
 	str	x0, [x29, 104]
-.L1897:
+.L2012:
 	ldr	w0, [x29, 160]
 	cmp	w22, w0
-	bcc	.L1911
-	adrp	x0, .LANCHOR42
+	bcc	.L2026
+	adrp	x0, .LANCHOR44
 	ldrb	w1, [x29, 128]
 	adrp	x3, idb_buf
 	add	x3, x3, :lo12:idb_buf
-	strb	w1, [x0, #:lo12:.LANCHOR42]
+	strb	w1, [x0, #:lo12:.LANCHOR44]
 	mov	x1, 0
 	ldr	w0, [x29, 164]
 	lsl	w0, w0, 7
-.L1912:
+.L2027:
 	mov	w19, w1
 	cmp	w1, w0
-	bcc	.L1913
+	bcc	.L2028
 	ldr	w0, [x29, 168]
 	add	w0, w0, 1
 	str	w0, [x29, 168]
 	cmp	w0, 5
-	bls	.L1882
-	b	.L1917
-.L1921:
+	bls	.L1997
+	b	.L2032
+.L2036:
 	mov	x6, 0
 	str	w27, [x29, 164]
-	b	.L1883
-.L1896:
+	b	.L1998
+.L2011:
 	ldr	x2, [x29, 152]
 	add	w5, w23, w20
 	lsr	w5, w5, 2
-	add	x0, x25, :lo12:.LANCHOR27
+	add	x0, x25, :lo12:.LANCHOR29
 	add	w1, w5, 1
 	ldrb	w2, [x2]
 	ldrh	w0, [x0, w1, sxtw 1]
-	cbz	w2, .L1887
-	adrp	x0, .LANCHOR25
-	ldrb	w3, [x0, #:lo12:.LANCHOR25]
+	cbz	w2, .L2002
+	adrp	x0, .LANCHOR27
+	ldrb	w3, [x0, #:lo12:.LANCHOR27]
 	lsl	w0, w1, 1
 	cmp	w3, 0
 	csel	w0, w0, w1, ne
-.L1887:
-	adrp	x1, .LANCHOR22
-	ldrb	w1, [x1, #:lo12:.LANCHOR22]
+.L2002:
+	adrp	x1, .LANCHOR24
+	ldrb	w1, [x1, #:lo12:.LANCHOR24]
 	cmp	w1, 9
-	bne	.L1889
-.L1950:
+	bne	.L2004
+.L2065:
 	str	w0, [x29, 192]
 	mov	w0, 61424
 	str	w0, [x29, 196]
 	ldr	x0, [x29, 144]
 	ldrh	w0, [x0, w5, sxtw 1]
-	cbnz	w2, .L1891
+	cbnz	w2, .L2006
 	mov	w5, w0
-.L1892:
+.L2007:
 	mul	w1, w21, w5
-	adrp	x2, .LANCHOR40
-	adrp	x0, .LANCHOR10
-	cbnz	x6, .L1893
+	adrp	x2, .LANCHOR42
+	adrp	x0, .LANCHOR12
+	cbnz	x6, .L2008
 	ldr	x3, [x29, 176]
 	add	w1, w1, w24
-	ldrb	w7, [x2, #:lo12:.LANCHOR40]
-	add	x3, x3, :lo12:.LANCHOR32
-	ldrb	w0, [x0, #:lo12:.LANCHOR10]
+	ldrb	w7, [x2, #:lo12:.LANCHOR42]
+	add	x3, x3, :lo12:.LANCHOR34
+	ldrb	w0, [x0, #:lo12:.LANCHOR12]
 	str	w5, [x29, 140]
 	str	w7, [x29, 160]
 	ldrb	w6, [x3, 9]
@@ -11373,36 +11983,36 @@ idb_write_data:
 	ldr	w7, [x29, 160]
 	mov	w0, w7
 	bl	nandc_bch_sel
-	ldrb	w0, [x28, #:lo12:.LANCHOR158]
+	ldrb	w0, [x28, #:lo12:.LANCHOR164]
 	ldr	w5, [x29, 140]
-	cbnz	w0, .L1894
+	cbnz	w0, .L2009
 	udiv	w1, w24, w21
 	add	w2, w5, 1
 	bl	id_block_prog_msb_ff_data
-.L1894:
+.L2009:
 	add	x22, x22, 2048
-.L1895:
+.L2010:
 	add	w20, w20, 4
 	mov	x6, 0
 	and	w20, w20, 65535
-	b	.L1885
-.L1889:
+	b	.L2000
+.L2004:
 	sub	w0, w0, #1
 	lsl	w0, w0, 2
-	b	.L1950
-.L1891:
-	adrp	x0, .LANCHOR25
-	ldrb	w1, [x0, #:lo12:.LANCHOR25]
+	b	.L2065
+.L2006:
+	adrp	x0, .LANCHOR27
+	ldrb	w1, [x0, #:lo12:.LANCHOR27]
 	lsl	w0, w5, 1
 	cmp	w1, 0
 	csel	w5, w0, w5, ne
-	b	.L1892
-.L1893:
+	b	.L2007
+.L2008:
 	ldr	x3, [x29, 176]
 	add	w1, w1, w24
-	ldrb	w7, [x2, #:lo12:.LANCHOR40]
-	add	x3, x3, :lo12:.LANCHOR32
-	ldrb	w0, [x0, #:lo12:.LANCHOR10]
+	ldrb	w7, [x2, #:lo12:.LANCHOR42]
+	add	x3, x3, :lo12:.LANCHOR34
+	ldrb	w0, [x0, #:lo12:.LANCHOR12]
 	str	w7, [x29, 160]
 	ldrb	w5, [x3, 9]
 	udiv	w5, w1, w5
@@ -11416,41 +12026,41 @@ idb_write_data:
 	ldr	w7, [x29, 160]
 	mov	w0, w7
 	bl	nandc_bch_sel
-	b	.L1895
-.L1911:
+	b	.L2010
+.L2026:
 	add	w19, w28, w22
 	ldr	w0, [x29, 152]
-	adrp	x1, .LANCHOR158
+	adrp	x1, .LANCHOR164
 	sub	w24, w21, w0
 	ldr	x0, [x29, 104]
 	udiv	w19, w19, w21
-	ldrb	w1, [x1, #:lo12:.LANCHOR158]
+	ldrb	w1, [x1, #:lo12:.LANCHOR164]
 	and	w24, w24, 65535
 	and	w19, w19, 65535
 	ldrh	w0, [x0, w19, sxtw 1]
-	cbnz	w1, .L1898
+	cbnz	w1, .L2013
 	mov	w19, w0
-.L1899:
-	adrp	x0, .LANCHOR10
+.L2014:
+	adrp	x0, .LANCHOR12
 	ldr	w1, [x29, 136]
-	ldrb	w23, [x0, #:lo12:.LANCHOR10]
+	ldrb	w23, [x0, #:lo12:.LANCHOR12]
 	ldr	w0, [x29, 152]
 	add	w0, w0, w1
 	ldr	w1, [x29, 140]
 	madd	w19, w1, w19, w0
 	ldr	x0, [x29, 176]
-	add	x0, x0, :lo12:.LANCHOR32
+	add	x0, x0, :lo12:.LANCHOR34
 	ldrb	w0, [x0, 9]
 	udiv	w19, w19, w0
-	adrp	x0, .LANCHOR40
-	ldrb	w0, [x0, #:lo12:.LANCHOR40]
+	adrp	x0, .LANCHOR42
+	ldrb	w0, [x0, #:lo12:.LANCHOR42]
 	str	w0, [x29, 124]
 	mov	w0, w23
 	bl	nandc_bch_sel
-	adrp	x0, .LANCHOR14
-	add	x0, x0, :lo12:.LANCHOR14
+	adrp	x0, .LANCHOR16
+	add	x0, x0, :lo12:.LANCHOR16
 	str	x0, [x29, 112]
-.L1900:
+.L2015:
 	mov	w4, w21
 	add	x3, x29, 192
 	mov	x2, x20
@@ -11459,32 +12069,32 @@ idb_write_data:
 	bl	flash_read_page
 	mov	w5, w0
 	cmn	w0, #1
-	bne	.L1901
+	bne	.L2016
 	ldrb	w6, [x25]
-	cbnz	w6, .L1902
-.L1905:
-	adrp	x0, .LANCHOR148
-	ldr	x6, [x0, #:lo12:.LANCHOR148]
-	cbnz	x6, .L1903
-.L1904:
+	cbnz	w6, .L2017
+.L2020:
+	adrp	x0, .LANCHOR155
+	ldr	x6, [x0, #:lo12:.LANCHOR155]
+	cbnz	x6, .L2018
+.L2019:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
-	cbz	w0, .L1901
+	cbz	w0, .L2016
 	mov	w4, w21
 	add	x3, x29, 192
 	mov	x2, x20
 	mov	w1, w19
 	mov	w0, 0
-	bl	flash_ddr_tunning_read
-	b	.L1951
-.L1898:
-	adrp	x0, .LANCHOR25
-	ldrb	w1, [x0, #:lo12:.LANCHOR25]
+	bl	flash_ddr_tuning_read
+	b	.L2066
+.L2013:
+	adrp	x0, .LANCHOR27
+	ldrb	w1, [x0, #:lo12:.LANCHOR27]
 	lsl	w0, w19, 1
 	cmp	w1, 0
 	csel	w19, w0, w19, ne
-	b	.L1899
-.L1902:
+	b	.L2014
+.L2017:
 	str	w6, [x29, 100]
 	mov	w4, w21
 	str	w5, [x29, 120]
@@ -11498,21 +12108,21 @@ idb_write_data:
 	ldr	w6, [x29, 100]
 	strb	w6, [x25]
 	ldr	w5, [x29, 120]
-	beq	.L1905
-.L1951:
+	beq	.L2020
+.L2066:
 	mov	w5, w0
-.L1901:
+.L2016:
 	cmn	w5, #1
 	cset	w3, eq
 	cmp	w23, 16
 	cset	w0, ne
 	tst	w3, w0
-	beq	.L1907
+	beq	.L2022
 	mov	w0, 16
 	mov	w23, 16
 	bl	nandc_bch_sel
-	b	.L1900
-.L1903:
+	b	.L2015
+.L2018:
 	str	w5, [x29, 120]
 	mov	w4, w21
 	add	x3, x29, 192
@@ -11522,9 +12132,9 @@ idb_write_data:
 	blr	x6
 	cmn	w0, #1
 	ldr	w5, [x29, 120]
-	beq	.L1904
-	b	.L1951
-.L1907:
+	beq	.L2019
+	b	.L2066
+.L2022:
 	ldr	w0, [x29, 124]
 	bl	nandc_bch_sel
 	cmp	w3, 0
@@ -11534,62 +12144,62 @@ idb_write_data:
 	ldr	w0, [x29, 136]
 	cmp	w22, 0
 	ccmp	w26, w0, 0, eq
-	bne	.L1909
+	bne	.L2024
 	ldr	w0, [x29, 144]
-	cbnz	w0, .L1909
+	cbnz	w0, .L2024
 	ldr	w1, [x20]
 	mov	w0, 18766
 	movk	w0, 0x464e, lsl 16
 	cmp	w1, w0
-	bne	.L1909
+	bne	.L2024
 	ldr	w0, [x29, 160]
 	ldrb	w21, [x20, 17]
 	add	w0, w0, w24
 	str	w0, [x29, 160]
-.L1910:
+.L2025:
 	add	w22, w24, w22
 	and	w22, w22, 65535
-	b	.L1897
-.L1909:
+	b	.L2012
+.L2024:
 	ubfiz	x0, x24, 9, 16
 	str	wzr, [x29, 152]
 	add	x20, x20, x0
-	b	.L1910
-.L1913:
+	b	.L2025
+.L2028:
 	ldr	x4, [x29, 184]
 	lsl	x2, x1, 2
 	add	x1, x1, 1
 	ldr	w4, [x2, x4]
 	ldr	w2, [x3, x2]
 	cmp	w4, w2
-	beq	.L1912
+	beq	.L2027
 	ldr	x0, [x29, 184]
 	mov	w2, 512
 	mov	w1, 0
 	bl	ftl_memset
 	mov	w1, w19
-	adrp	x0, .LC112
-	add	x0, x0, :lo12:.LC112
+	adrp	x0, .LC123
+	add	x0, x0, :lo12:.LC123
 	bl	printf
 	mov	w1, w26
 	mov	w0, 0
 	bl	flash_erase_block
-.L1882:
+.L1997:
 	ldr	w0, [x29, 172]
 	add	w0, w0, 1
 	str	w0, [x29, 172]
 	cmp	w0, 4
-	bne	.L1915
+	bne	.L2030
 	ldr	w0, [x29, 168]
-	cbnz	w0, .L1917
-	adrp	x0, .LC113
+	cbnz	w0, .L2032
+	adrp	x0, .LC124
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC113
+	add	x0, x0, :lo12:.LC124
 	bl	printf
-.L1917:
-	adrp	x0, .LANCHOR159
-	str	wzr, [x0, #:lo12:.LANCHOR159]
-	b	.L1931
+.L2032:
+	adrp	x0, .LANCHOR165
+	str	wzr, [x0, #:lo12:.LANCHOR165]
+	b	.L2046
 	.size	idb_write_data, .-idb_write_data
 	.section	.text.flash_start_tlc_page_prog,"ax",@progbits
 	.align	2
@@ -11600,39 +12210,39 @@ flash_start_tlc_page_prog:
 	add	x29, sp, 0
 	stp	x25, x26, [sp, 64]
 	and	w25, w0, 255
-	adrp	x0, .LANCHOR12
+	adrp	x0, .LANCHOR14
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	and	w19, w3, 255
 	stp	x23, x24, [sp, 48]
 	and	w21, w1, 255
-	ldrb	w0, [x0, #:lo12:.LANCHOR12]
+	ldrb	w0, [x0, #:lo12:.LANCHOR14]
 	and	w22, w2, 255
 	mov	w20, w4
 	mov	x23, x5
 	mov	x24, x6
 	cmp	w0, w19
-	bhi	.L1954
-	adrp	x1, .LANCHOR160
+	bhi	.L2069
+	adrp	x1, .LANCHOR166
 	adrp	x0, .LC0
 	mov	w2, 648
-	add	x1, x1, :lo12:.LANCHOR160
+	add	x1, x1, :lo12:.LANCHOR166
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1954:
-	adrp	x0, .LANCHOR24
-	add	x0, x0, :lo12:.LANCHOR24
+.L2069:
+	adrp	x0, .LANCHOR26
+	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w26, [x0, w19, sxtw]
-	adrp	x0, .LANCHOR21
-	ldr	x19, [x0, #:lo12:.LANCHOR21]
+	adrp	x0, .LANCHOR23
+	ldr	x19, [x0, #:lo12:.LANCHOR23]
 	mov	w0, w26
 	bl	nandc_cs
-	cbz	w25, .L1955
+	cbz	w25, .L2070
 	sxtw	x0, w26
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 8
 	str	w25, [x0, 8]
-.L1955:
+.L2070:
 	ubfiz	x0, x26, 8, 8
 	add	x19, x19, x0
 	mov	w0, 128
@@ -11650,10 +12260,10 @@ flash_start_tlc_page_prog:
 	sub	w0, w20, #1
 	add	w0, w0, w21
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR32+9
+	adrp	x0, .LANCHOR34+9
 	mov	x3, x24
 	mov	x2, x23
-	ldrb	w1, [x0, #:lo12:.LANCHOR32+9]
+	ldrb	w1, [x0, #:lo12:.LANCHOR34+9]
 	mov	w0, 1
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
@@ -11715,8 +12325,8 @@ queue_tlc_prog_cmd:
 	strb	w0, [x1, 59]
 	mov	w0, -1
 	strb	w0, [x1]
-	adrp	x0, .LANCHOR120
-	add	x0, x0, :lo12:.LANCHOR120
+	adrp	x0, .LANCHOR126
+	add	x0, x0, :lo12:.LANCHOR126
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -11733,21 +12343,21 @@ sblk_tlc_prog_one_page:
 	mov	x19, x0
 	ldr	x0, [x0]
 	ldr	w20, [x0, 40]
-.L1963:
+.L2078:
 	mov	w1, 1
 	mov	w0, w20
 	bl	queue_lun_state
-	cbnz	w0, .L1964
+	cbnz	w0, .L2079
 	mov	x0, x19
 	bl	queue_tlc_prog_cmd
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1964:
+.L2079:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L1963
+	b	.L2078
 	.size	sblk_tlc_prog_one_page, .-sblk_tlc_prog_one_page
 	.section	.text.sblk_xlc_prog_pages,"ax",@progbits
 	.align	2
@@ -11764,13 +12374,13 @@ sblk_xlc_prog_pages:
 	stp	x23, x24, [sp, 48]
 	mov	w24, w2
 	ldr	w20, [x0, 40]
-.L1967:
+.L2082:
 	mov	w1, 1
 	mov	w0, w20
 	bl	queue_lun_state
-	cbnz	w0, .L1968
+	cbnz	w0, .L2083
 	cmp	w24, 2
-	bne	.L1969
+	bne	.L2084
 	ldr	x0, [x19]
 	mov	w2, 17
 	ldr	x1, [x22]
@@ -11847,24 +12457,24 @@ sblk_xlc_prog_pages:
 	strb	w0, [x1, 59]
 	mov	w0, -1
 	strb	w0, [x1]
-	adrp	x0, .LANCHOR120
-	add	x0, x0, :lo12:.LANCHOR120
+	adrp	x0, .LANCHOR126
+	add	x0, x0, :lo12:.LANCHOR126
 	bl	buf_add_tail
-.L1970:
+.L2085:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1968:
+.L2083:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L1967
-.L1969:
+	b	.L2082
+.L2084:
 	mov	x0, x19
 	bl	queue_tlc_prog_cmd
-	b	.L1970
+	b	.L2085
 	.size	sblk_xlc_prog_pages, .-sblk_xlc_prog_pages
 	.section	.text.flash_start_page_prog,"ax",@progbits
 	.align	2
@@ -11874,75 +12484,75 @@ flash_start_page_prog:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x25, x26, [sp, 64]
-	adrp	x26, .LANCHOR12
+	adrp	x26, .LANCHOR14
 	stp	x23, x24, [sp, 48]
 	and	w23, w0, 255
 	stp	x19, x20, [sp, 16]
 	mov	x24, x2
 	stp	x21, x22, [sp, 32]
 	mov	x25, x3
-	ldrb	w0, [x26, #:lo12:.LANCHOR12]
+	ldrb	w0, [x26, #:lo12:.LANCHOR14]
 	and	w19, w1, 2097151
 	str	x27, [sp, 80]
 	ubfx	x27, x1, 21, 3
 	ubfx	x22, x1, 24, 2
 	cmp	w0, w27
-	bhi	.L1973
-	adrp	x1, .LANCHOR161
+	bhi	.L2088
+	adrp	x1, .LANCHOR167
 	adrp	x0, .LC0
 	mov	w2, 685
-	add	x1, x1, :lo12:.LANCHOR161
+	add	x1, x1, :lo12:.LANCHOR167
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1973:
-	adrp	x0, .LANCHOR24
-	add	x0, x0, :lo12:.LANCHOR24
+.L2088:
+	adrp	x0, .LANCHOR26
+	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w21, [x0, w27, sxtw]
-	adrp	x0, .LANCHOR21
-	ldr	x20, [x0, #:lo12:.LANCHOR21]
+	adrp	x0, .LANCHOR23
+	ldr	x20, [x0, #:lo12:.LANCHOR23]
 	bl	nandc_rdy_status
-	cbnz	w0, .L1974
-	ldrb	w0, [x26, #:lo12:.LANCHOR12]
+	cbnz	w0, .L2089
+	ldrb	w0, [x26, #:lo12:.LANCHOR14]
 	cmp	w0, 1
-	bne	.L1975
+	bne	.L2090
 	bl	nandc_wait_flash_ready
-.L1974:
+.L2089:
 	mov	w0, w21
 	bl	hynix_reconfig_rr_para
 	mov	w0, w21
 	bl	nandc_cs
-	cbnz	w22, .L1976
-	adrp	x0, .LANCHOR11
-	adrp	x1, .LANCHOR25
-	ldrb	w0, [x0, #:lo12:.LANCHOR11]
-	cbz	w0, .L1977
-	ldrb	w0, [x1, #:lo12:.LANCHOR25]
-	cbz	w0, .L1978
-.L1977:
-	adrp	x0, .LANCHOR26
-	ldrb	w1, [x1, #:lo12:.LANCHOR25]
-	ldrh	w2, [x0, #:lo12:.LANCHOR26]
+	cbnz	w22, .L2091
+	adrp	x0, .LANCHOR13
+	adrp	x1, .LANCHOR27
+	ldrb	w0, [x0, #:lo12:.LANCHOR13]
+	cbz	w0, .L2092
+	ldrb	w0, [x1, #:lo12:.LANCHOR27]
+	cbz	w0, .L2093
+.L2092:
+	adrp	x0, .LANCHOR28
+	ldrb	w1, [x1, #:lo12:.LANCHOR27]
+	ldrh	w2, [x0, #:lo12:.LANCHOR28]
 	udiv	w0, w19, w2
 	mul	w0, w0, w2
 	sub	w19, w19, w0
-	cbz	w1, .L1979
+	cbz	w1, .L2094
 	add	w19, w0, w19, lsl 1
-.L1978:
+.L2093:
 	mov	w0, w21
 	bl	zftl_flash_enter_slc_mode
-	b	.L1980
-.L1975:
+	b	.L2095
+.L2090:
 	mov	w2, 64
 	mov	w1, w19
 	mov	w0, w27
 	bl	flash_wait_device_ready_raw
-	b	.L1974
-.L1979:
-	adrp	x1, .LANCHOR27
-	add	x1, x1, :lo12:.LANCHOR27
+	b	.L2089
+.L2094:
+	adrp	x1, .LANCHOR29
+	add	x1, x1, :lo12:.LANCHOR29
 	ldrh	w19, [x1, w19, uxtw 1]
 	add	w19, w19, w0
-.L1980:
+.L2095:
 	ubfiz	x0, x21, 8, 8
 	add	x20, x20, x0
 	mov	w0, 128
@@ -11957,10 +12567,10 @@ flash_start_page_prog:
 	str	w0, [x20, 2052]
 	mov	w0, w19
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR32+9
+	adrp	x0, .LANCHOR34+9
 	mov	x3, x25
 	mov	x2, x24
-	ldrb	w1, [x0, #:lo12:.LANCHOR32+9]
+	ldrb	w1, [x0, #:lo12:.LANCHOR34+9]
 	mov	w0, 1
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
@@ -11973,10 +12583,10 @@ flash_start_page_prog:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 96
 	b	nandc_de_cs
-.L1976:
+.L2091:
 	mov	w0, w21
 	bl	zftl_flash_exit_slc_mode
-	b	.L1980
+	b	.L2095
 	.size	flash_start_page_prog, .-flash_start_page_prog
 	.section	.text.queue_prog_cmd,"ax",@progbits
 	.align	2
@@ -11991,27 +12601,27 @@ queue_prog_cmd:
 	mov	x19, x0
 	mov	w0, 16
 	bl	flash_start_page_prog
-	adrp	x0, .LANCHOR120
+	adrp	x0, .LANCHOR126
 	ldr	w3, [x19, 40]
-	ldrb	w1, [x0, #:lo12:.LANCHOR120]
+	ldrb	w1, [x0, #:lo12:.LANCHOR126]
 	cmp	w1, 255
-	beq	.L1986
-	adrp	x2, .LANCHOR46
-	add	x2, x2, :lo12:.LANCHOR46
+	beq	.L2101
+	adrp	x2, .LANCHOR48
+	add	x2, x2, :lo12:.LANCHOR48
 	ubfx	x3, x3, 21, 3
 	mov	x6, x2
-.L1988:
+.L2103:
 	add	x4, x2, x1, lsl 6
 	ldr	w5, [x4, 40]
 	ubfx	x5, x5, 21, 3
 	cmp	w3, w5
-	bne	.L1987
+	bne	.L2102
 	ldrb	w5, [x4, 58]
 	cmp	w5, 6
-	bne	.L1987
+	bne	.L2102
 	mov	w1, 3
 	strb	w1, [x4, 58]
-.L1986:
+.L2101:
 	mov	w1, 3
 	strb	w1, [x19, 58]
 	mov	w1, 1
@@ -12019,16 +12629,16 @@ queue_prog_cmd:
 	mov	w1, -1
 	strb	w1, [x19]
 	mov	x1, x19
-	add	x0, x0, :lo12:.LANCHOR120
+	add	x0, x0, :lo12:.LANCHOR126
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	buf_add_tail
-.L1987:
+.L2102:
 	lsl	x1, x1, 6
 	ldrb	w1, [x6, x1]
 	cmp	w1, 255
-	bne	.L1988
-	b	.L1986
+	bne	.L2103
+	b	.L2101
 	.size	queue_prog_cmd, .-queue_prog_cmd
 	.section	.text.sblk_prog_page,"ax",@progbits
 	.align	2
@@ -12045,24 +12655,24 @@ sblk_prog_page:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	cbz	w0, .L1995
-	adrp	x0, .LANCHOR7
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L1995
+	cbz	w0, .L2110
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 8, .L2110
 	ldr	w1, [x19, 40]
-	adrp	x0, .LC114
+	adrp	x0, .LC125
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC114
+	add	x0, x0, :lo12:.LC125
 	bl	printf
-.L1995:
-	adrp	x25, .LANCHOR36
-	adrp	x23, .LANCHOR46
-	add	x25, x25, :lo12:.LANCHOR36
-	add	x23, x23, :lo12:.LANCHOR46
+.L2110:
+	adrp	x25, .LANCHOR38
+	adrp	x23, .LANCHOR48
+	add	x25, x25, :lo12:.LANCHOR38
+	add	x23, x23, :lo12:.LANCHOR48
 	mov	w21, 0
 	mov	w24, 1
-.L1996:
-	cbnz	w20, .L2006
+.L2111:
+	cbnz	w20, .L2121
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -12071,52 +12681,52 @@ sblk_prog_page:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2006:
+.L2121:
 	ldrb	w26, [x19]
 	ldr	w22, [x19, 40]
-.L1997:
+.L2112:
 	mov	w1, 1
 	mov	w0, w22
 	bl	queue_lun_state
-	cbnz	w0, .L1998
+	cbnz	w0, .L2113
 	cmp	w20, 1
-	beq	.L1999
+	beq	.L2114
 	ldrb	w0, [x25]
-	cbnz	w0, .L2000
-.L1999:
+	cbnz	w0, .L2115
+.L2114:
 	mov	x0, x19
 	bl	queue_prog_cmd
-.L2001:
+.L2116:
 	ubfiz	x19, x26, 6, 8
 	sub	w20, w20, #1
 	add	x19, x23, x19
-	b	.L1996
-.L1998:
+	b	.L2111
+.L2113:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L1997
-.L2000:
+	b	.L2112
+.L2115:
 	ldrb	w0, [x19]
 	ubfx	x27, x22, 21, 3
 	cmp	w0, 255
-	bne	.L2002
-	adrp	x1, .LANCHOR162
+	bne	.L2117
+	adrp	x1, .LANCHOR168
 	adrp	x0, .LC0
 	mov	w2, 489
-	add	x1, x1, :lo12:.LANCHOR162
+	add	x1, x1, :lo12:.LANCHOR168
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2002:
+.L2117:
 	ldrb	w0, [x19]
 	add	x0, x23, x0, lsl 6
 	ldr	w5, [x0, 40]
 	ubfx	x0, x5, 21, 3
 	cmp	w27, w0
-	bne	.L2003
-	adrp	x0, .LANCHOR96
-	ldrh	w2, [x0, #:lo12:.LANCHOR96]
-	adrp	x0, .LANCHOR95
-	ldrb	w3, [x0, #:lo12:.LANCHOR95]
+	bne	.L2118
+	adrp	x0, .LANCHOR102
+	ldrh	w2, [x0, #:lo12:.LANCHOR102]
+	adrp	x0, .LANCHOR101
+	ldrb	w3, [x0, #:lo12:.LANCHOR101]
 	mov	w0, 21
 	sub	w0, w0, w2
 	lsl	w1, w24, w2
@@ -12135,9 +12745,9 @@ sblk_prog_page:
 	cmp	w4, w0
 	and	w1, w1, w5
 	ccmp	w22, w1, 0, ne
-	bne	.L2003
+	bne	.L2118
 	cmp	w21, w3
-	beq	.L2003
+	beq	.L2118
 	ldr	w1, [x19, 40]
 	mov	w0, 17
 	ldr	x2, [x19, 8]
@@ -12150,15 +12760,15 @@ sblk_prog_page:
 	mov	w0, -1
 	strb	w0, [x19]
 	mov	x1, x19
-	adrp	x0, .LANCHOR120
-	add	x0, x0, :lo12:.LANCHOR120
+	adrp	x0, .LANCHOR126
+	add	x0, x0, :lo12:.LANCHOR126
 	bl	buf_add_tail
-	b	.L2001
-.L2003:
+	b	.L2116
+.L2118:
 	mov	x0, x19
 	mov	w21, 0
 	bl	queue_prog_cmd
-	b	.L2001
+	b	.L2116
 	.size	sblk_prog_page, .-sblk_prog_page
 	.section	.text.ftl_flush,"ax",@progbits
 	.align	2
@@ -12166,22 +12776,22 @@ sblk_prog_page:
 	.type	ftl_flush, %function
 ftl_flush:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR115
+	adrp	x0, .LANCHOR121
 	add	x29, sp, 0
-	ldrb	w1, [x0, #:lo12:.LANCHOR115]
+	ldrb	w1, [x0, #:lo12:.LANCHOR121]
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	adrp	x20, .LANCHOR163
-	cbz	w1, .L2018
-	ldrb	w2, [x20, #:lo12:.LANCHOR163]
-	adrp	x0, .LANCHOR46
-	add	x0, x0, :lo12:.LANCHOR46
+	adrp	x20, .LANCHOR169
+	cbz	w1, .L2133
+	ldrb	w2, [x20, #:lo12:.LANCHOR169]
+	adrp	x0, .LANCHOR48
+	add	x0, x0, :lo12:.LANCHOR48
 	add	x0, x0, x2, lsl 6
 	bl	sblk_prog_page
-.L2018:
+.L2133:
 	mov	w0, -1
-	strb	wzr, [x19, #:lo12:.LANCHOR115]
-	strb	w0, [x20, #:lo12:.LANCHOR163]
+	strb	wzr, [x19, #:lo12:.LANCHOR121]
+	strb	w0, [x20, #:lo12:.LANCHOR169]
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	ldp	x19, x20, [sp, 16]
@@ -12198,55 +12808,55 @@ flash_prog_page_en:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	and	w22, w0, 255
-	adrp	x0, .LANCHOR12
+	adrp	x0, .LANCHOR14
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	mov	w20, w1
 	stp	x25, x26, [sp, 64]
 	mov	x24, x2
-	ldrb	w0, [x0, #:lo12:.LANCHOR12]
+	ldrb	w0, [x0, #:lo12:.LANCHOR14]
 	mov	x23, x3
 	mov	w25, w4
 	and	w21, w5, 255
 	ubfx	x19, x20, 24, 2
 	cmp	w0, w22
-	bhi	.L2024
-	adrp	x1, .LANCHOR164
+	bhi	.L2139
+	adrp	x1, .LANCHOR170
 	adrp	x0, .LC0
 	mov	w2, 473
-	add	x1, x1, :lo12:.LANCHOR164
+	add	x1, x1, :lo12:.LANCHOR170
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2024:
-	adrp	x0, .LANCHOR24
-	add	x0, x0, :lo12:.LANCHOR24
+.L2139:
+	adrp	x0, .LANCHOR26
+	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w26, [x0, w22, sxtw]
-	cbnz	w19, .L2034
-	adrp	x0, .LANCHOR11
-	ldrb	w1, [x0, #:lo12:.LANCHOR11]
-	adrp	x0, .LANCHOR25
-	cbz	w1, .L2026
-	ldrb	w1, [x0, #:lo12:.LANCHOR25]
-	cbz	w1, .L2034
-.L2026:
-	adrp	x1, .LANCHOR26
-	ldrb	w0, [x0, #:lo12:.LANCHOR25]
-	ldrh	w1, [x1, #:lo12:.LANCHOR26]
+	cbnz	w19, .L2149
+	adrp	x0, .LANCHOR13
+	ldrb	w1, [x0, #:lo12:.LANCHOR13]
+	adrp	x0, .LANCHOR27
+	cbz	w1, .L2141
+	ldrb	w1, [x0, #:lo12:.LANCHOR27]
+	cbz	w1, .L2149
+.L2141:
+	adrp	x1, .LANCHOR28
+	ldrb	w0, [x0, #:lo12:.LANCHOR27]
+	ldrh	w1, [x1, #:lo12:.LANCHOR28]
 	udiv	w19, w20, w1
 	mul	w19, w19, w1
 	sub	w1, w20, w19
-	cbz	w0, .L2027
+	cbz	w0, .L2142
 	add	w19, w19, w1, lsl 1
-.L2025:
-	adrp	x0, .LANCHOR7
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 4, .L2028
-	adrp	x0, .LC115
+.L2140:
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 4, .L2143
+	adrp	x0, .LC126
 	mov	w2, w20
 	mov	w1, w26
-	add	x0, x0, :lo12:.LC115
+	add	x0, x0, :lo12:.LC126
 	bl	printf
-.L2028:
+.L2143:
 	mov	w1, w19
 	mov	w4, w25
 	mov	x3, x23
@@ -12254,68 +12864,68 @@ flash_prog_page_en:
 	mov	w0, w26
 	bl	flash_prog_page
 	mov	w19, w0
-	cbz	w21, .L2029
-	adrp	x26, .LANCHOR152
-	adrp	x21, .LANCHOR153
+	cbz	w21, .L2144
+	adrp	x26, .LANCHOR159
+	adrp	x21, .LANCHOR160
 	mov	w4, w25
 	mov	w1, w20
-	ldr	x3, [x26, #:lo12:.LANCHOR152]
+	ldr	x3, [x26, #:lo12:.LANCHOR159]
 	mov	w0, w22
-	ldr	x2, [x21, #:lo12:.LANCHOR153]
+	ldr	x2, [x21, #:lo12:.LANCHOR160]
 	bl	flash_read_page_en
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2030
-	ldr	x0, [x21, #:lo12:.LANCHOR153]
+	beq	.L2145
+	ldr	x0, [x21, #:lo12:.LANCHOR160]
 	ldr	w1, [x24]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	bne	.L2030
-	ldr	x0, [x26, #:lo12:.LANCHOR152]
+	bne	.L2145
+	ldr	x0, [x26, #:lo12:.LANCHOR159]
 	ldr	w1, [x23]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	beq	.L2029
-.L2030:
-	ldr	x1, [x26, #:lo12:.LANCHOR152]
+	beq	.L2144
+.L2145:
+	ldr	x1, [x26, #:lo12:.LANCHOR159]
 	mov	w3, 4
-	adrp	x0, .LC116
+	adrp	x0, .LC127
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC116
+	add	x0, x0, :lo12:.LC127
 	bl	rknand_print_hex
-	ldr	x1, [x21, #:lo12:.LANCHOR153]
+	ldr	x1, [x21, #:lo12:.LANCHOR160]
 	mov	w3, 4
-	adrp	x0, .LC117
+	adrp	x0, .LC128
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC117
+	add	x0, x0, :lo12:.LC128
 	bl	rknand_print_hex
-.L2031:
+.L2146:
 	mov	w1, w20
-	adrp	x0, .LC118
-	add	x0, x0, :lo12:.LC118
+	adrp	x0, .LC129
+	add	x0, x0, :lo12:.LC129
 	bl	printf
 	mov	w2, 499
-	adrp	x1, .LANCHOR164
+	adrp	x1, .LANCHOR170
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR164
+	add	x1, x1, :lo12:.LANCHOR170
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	mov	w0, -1
-	b	.L2032
-.L2027:
-	adrp	x0, .LANCHOR27
-	add	x0, x0, :lo12:.LANCHOR27
+	b	.L2147
+.L2142:
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
 	ldrh	w0, [x0, w1, uxtw 1]
 	add	w19, w0, w19
-	b	.L2025
-.L2034:
+	b	.L2140
+.L2149:
 	mov	w19, w20
-	b	.L2025
-.L2029:
+	b	.L2140
+.L2144:
 	mov	w0, w19
 	cmn	w19, #1
-	beq	.L2031
-.L2032:
+	beq	.L2146
+.L2147:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -12333,113 +12943,113 @@ ftl_test_block:
 	stp	x23, x24, [sp, 48]
 	adrp	x24, ftl_tmp_buffer
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR155
+	adrp	x25, .LANCHOR171
 	stp	x21, x22, [sp, 32]
-	adrp	x26, .LANCHOR104
+	adrp	x26, .LANCHOR109
 	and	w21, w0, 65535
-	add	x0, x26, :lo12:.LANCHOR104
+	add	x0, x26, :lo12:.LANCHOR109
 	stp	x19, x20, [sp, 16]
 	mov	w23, 0
 	stp	x27, x28, [sp, 80]
 	mov	w20, 0
-	adrp	x27, .LANCHOR95
+	adrp	x27, .LANCHOR101
 	str	x0, [x29, 112]
 	str	wzr, [x24, #:lo12:ftl_tmp_buffer]
-	add	x0, x27, :lo12:.LANCHOR95
-	str	wzr, [x25, #:lo12:.LANCHOR155]
+	add	x0, x27, :lo12:.LANCHOR101
+	str	wzr, [x25, #:lo12:.LANCHOR171]
 	str	x0, [x29, 96]
-.L2046:
+.L2161:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
 	cmp	w0, w20
-	bls	.L2056
-	add	x0, x27, :lo12:.LANCHOR95
+	bls	.L2171
+	add	x0, x27, :lo12:.LANCHOR101
 	mov	w22, 0
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR7
-	add	x0, x0, :lo12:.LANCHOR7
+	adrp	x0, .LANCHOR9
+	add	x0, x0, :lo12:.LANCHOR9
 	str	x0, [x29, 104]
-	b	.L2057
-.L2055:
+	b	.L2172
+.L2170:
 	ldr	x0, [x29, 104]
 	ldr	w0, [x0]
-	tbz	x0, 12, .L2047
-	adrp	x0, .LC119
+	tbz	x0, 12, .L2162
+	adrp	x0, .LC130
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC119
+	add	x0, x0, :lo12:.LC130
 	bl	printf
-.L2047:
+.L2162:
 	ldr	x0, [x29, 96]
 	ldrb	w19, [x0]
 	madd	w19, w21, w19, w22
 	and	w19, w19, 65535
-	cbnz	w20, .L2048
-	adrp	x0, .LANCHOR20
-	ldr	x0, [x0, #:lo12:.LANCHOR20]
+	cbnz	w20, .L2163
+	adrp	x0, .LANCHOR22
+	ldr	x0, [x0, #:lo12:.LANCHOR22]
 	ldrb	w0, [x0, 47]
 	cmp	w0, w19
-	bcs	.L2049
-.L2048:
+	bcs	.L2164
+.L2163:
 	and	w28, w20, 255
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_check_bad_block
-	cbnz	w0, .L2049
-	adrp	x0, .LANCHOR103
+	cbnz	w0, .L2164
+	adrp	x0, .LANCHOR108
 	mov	w1, w23
-	ldrh	w7, [x0, #:lo12:.LANCHOR103]
+	ldrh	w7, [x0, #:lo12:.LANCHOR108]
 	mov	w0, w28
 	mul	w26, w7, w19
 	mov	w2, w26
 	bl	flash_erase_block_en
-	cbz	w0, .L2050
-	adrp	x0, .LANCHOR67
-	ldrb	w0, [x0, #:lo12:.LANCHOR67]
+	cbz	w0, .L2165
+	adrp	x0, .LANCHOR71
+	ldrb	w0, [x0, #:lo12:.LANCHOR71]
 	cmp	w0, 2
-	bne	.L2072
-	adrp	x0, .LANCHOR11
-	ldrb	w0, [x0, #:lo12:.LANCHOR11]
-	cbz	w0, .L2072
+	bne	.L2187
+	adrp	x0, .LANCHOR13
+	ldrb	w0, [x0, #:lo12:.LANCHOR13]
+	cbz	w0, .L2187
 	mov	w2, w26
 	mov	w1, 1
 	mov	w0, w28
 	bl	flash_erase_block_en
-	cbnz	w0, .L2072
-.L2054:
-	adrp	x0, .LANCHOR67
+	cbnz	w0, .L2187
+.L2169:
+	adrp	x0, .LANCHOR71
 	mov	w23, 1
-	ldrb	w0, [x0, #:lo12:.LANCHOR67]
+	ldrb	w0, [x0, #:lo12:.LANCHOR71]
 	add	w26, w26, w0, lsl 24
-.L2053:
-	adrp	x0, .LANCHOR117
+.L2168:
+	adrp	x0, .LANCHOR123
 	mov	w5, 1
-	add	x3, x25, :lo12:.LANCHOR155
+	add	x3, x25, :lo12:.LANCHOR171
 	add	x2, x24, :lo12:ftl_tmp_buffer
-	ldrb	w4, [x0, #:lo12:.LANCHOR117]
+	ldrb	w4, [x0, #:lo12:.LANCHOR123]
 	mov	w1, w26
 	mov	w0, w28
 	bl	flash_prog_page_en
-	cbz	w0, .L2049
-.L2072:
+	cbz	w0, .L2164
+.L2187:
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_mask_bad_block
-.L2049:
+.L2164:
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L2057:
+.L2172:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, w22
-	bhi	.L2055
+	bhi	.L2170
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2046
-.L2050:
-	cbz	w23, .L2053
-	b	.L2054
-.L2056:
-	cbz	w23, .L2058
+	b	.L2161
+.L2165:
+	cbz	w23, .L2168
+	b	.L2169
+.L2171:
+	cbz	w23, .L2173
 	adrp	x0, .LANCHOR3
 	mov	w1, 2
 	ldr	x0, [x0, #:lo12:.LANCHOR3]
@@ -12447,7 +13057,7 @@ ftl_test_block:
 	ldrb	w0, [x21, 2]
 	bfi	w0, w1, 3, 2
 	strb	w0, [x21, 2]
-.L2058:
+.L2173:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -12482,18 +13092,18 @@ ftl_prog_page:
 	bl	flash_prog_page_en
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L2073
-	mov	w2, 2052
-	adrp	x1, .LANCHOR165
+	bne	.L2188
+	mov	w2, 2147
+	adrp	x1, .LANCHOR172
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR165
+	add	x1, x1, :lo12:.LANCHOR172
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	adrp	x0, .LC118
+	adrp	x0, .LC129
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC118
+	add	x0, x0, :lo12:.LC129
 	bl	printf
-.L2073:
+.L2188:
 	mov	w0, w19
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -12510,69 +13120,69 @@ ftl_info_flush:
 	mov	w1, 0
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR117
+	adrp	x21, .LANCHOR123
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR167
+	adrp	x22, .LANCHOR174
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LANCHOR103
+	adrp	x23, .LANCHOR108
 	stp	x27, x28, [sp, 80]
 	mov	x26, x23
-	ldrb	w2, [x21, #:lo12:.LANCHOR117]
-	add	x25, x22, :lo12:.LANCHOR167
-	add	x28, x23, :lo12:.LANCHOR103
+	ldrb	w2, [x21, #:lo12:.LANCHOR123]
+	add	x25, x22, :lo12:.LANCHOR174
+	add	x28, x23, :lo12:.LANCHOR108
 	mov	w24, 0
 	stp	x19, x20, [sp, 16]
 	mov	w27, w0
-	adrp	x20, .LANCHOR166
+	adrp	x20, .LANCHOR173
 	lsl	w2, w2, 1
-	add	x0, x20, :lo12:.LANCHOR166
+	add	x0, x20, :lo12:.LANCHOR173
 	bl	ftl_memset
-.L2077:
-	add	x0, x22, :lo12:.LANCHOR167
-	ldrb	w6, [x22, #:lo12:.LANCHOR167]
-	ldrh	w19, [x23, #:lo12:.LANCHOR103]
+.L2192:
+	add	x0, x22, :lo12:.LANCHOR174
+	ldrb	w6, [x22, #:lo12:.LANCHOR174]
+	ldrh	w19, [x23, #:lo12:.LANCHOR108]
 	ldrh	w4, [x0, 2]
-	adrp	x0, .LANCHOR97
-	ldr	x0, [x0, #:lo12:.LANCHOR97]
+	adrp	x0, .LANCHOR100
+	ldr	x0, [x0, #:lo12:.LANCHOR100]
 	ldr	w3, [x0, 4]
 	add	w3, w3, 1
 	str	w3, [x0, 4]
-	add	x0, x20, :lo12:.LANCHOR166
-	str	w27, [x20, #:lo12:.LANCHOR166]
+	add	x0, x20, :lo12:.LANCHOR173
+	str	w27, [x20, #:lo12:.LANCHOR173]
 	str	w3, [x0, 4]
-	adrp	x0, .LANCHOR7
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2078
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L2193
 	mov	w2, w4
 	mov	w1, w6
 	str	w4, [x29, 96]
-	adrp	x0, .LC120
+	adrp	x0, .LC131
 	str	w6, [x29, 104]
-	add	x0, x0, :lo12:.LC120
+	add	x0, x0, :lo12:.LC131
 	bl	printf
 	ldr	w4, [x29, 96]
 	ldr	w6, [x29, 104]
-.L2078:
-	adrp	x1, .LANCHOR80
+.L2193:
+	adrp	x1, .LANCHOR83
 	ldrh	w0, [x25, 2]
-	ldrh	w1, [x1, #:lo12:.LANCHOR80]
+	ldrh	w1, [x1, #:lo12:.LANCHOR83]
 	cmp	w1, w0
-	bhi	.L2079
-	adrp	x19, .LANCHOR168
+	bhi	.L2194
+	adrp	x19, .LANCHOR175
 	adrp	x3, .LC0
-	add	x19, x19, :lo12:.LANCHOR168
+	add	x19, x19, :lo12:.LANCHOR175
 	add	x3, x3, :lo12:.LC0
-.L2086:
+.L2201:
 	ldrb	w0, [x25, 1]
-	adrp	x4, .LANCHOR20
+	adrp	x4, .LANCHOR22
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x25, 1]
 	cmp	w0, 7
-	bls	.L2080
+	bls	.L2195
 	mov	x0, 0
-.L2085:
-	ldr	x2, [x4, #:lo12:.LANCHOR20]
+.L2200:
+	ldr	x2, [x4, #:lo12:.LANCHOR22]
 	add	w1, w0, 8
 	and	w24, w0, 65535
 	add	x1, x2, x1, sxtw
@@ -12580,32 +13190,32 @@ ftl_info_flush:
 	add	w1, w2, 127
 	and	w1, w1, 255
 	cmp	w1, 125
-	bhi	.L2081
+	bhi	.L2196
 	mov	x0, x3
 	stp	x4, x3, [x29, 96]
-	mov	w2, 672
+	mov	w2, 742
 	mov	x1, x19
 	bl	printf
 	ldp	x4, x3, [x29, 96]
-.L2084:
+.L2199:
 	strb	w24, [x25, 1]
 	mov	w24, 1
-.L2080:
-	ldr	x0, [x4, #:lo12:.LANCHOR20]
+.L2195:
+	ldr	x0, [x4, #:lo12:.LANCHOR22]
 	ldrb	w1, [x25, 1]
 	add	x0, x0, x1
 	ldrb	w0, [x0, 40]
 	strb	w0, [x25]
 	cmp	w0, 255
-	beq	.L2086
+	beq	.L2201
 	ldrh	w19, [x28]
 	mul	w19, w19, w0
 	mov	w0, 0
 	mov	w1, w19
 	bl	flash_erase_block
-	ldrb	w4, [x21, #:lo12:.LANCHOR117]
+	ldrb	w4, [x21, #:lo12:.LANCHOR123]
 	mov	w1, w19
-	add	x3, x20, :lo12:.LANCHOR166
+	add	x3, x20, :lo12:.LANCHOR173
 	adrp	x2, ftl_info_data_buffer
 	mov	w0, 0
 	add	x2, x2, :lo12:ftl_info_data_buffer
@@ -12613,53 +13223,53 @@ ftl_info_flush:
 	bl	ftl_prog_page
 	mov	w0, 1
 	strh	w0, [x25, 2]
-.L2087:
-	ldrb	w4, [x21, #:lo12:.LANCHOR117]
+.L2202:
+	ldrb	w4, [x21, #:lo12:.LANCHOR123]
 	mov	w1, w19
-	add	x3, x20, :lo12:.LANCHOR166
+	add	x3, x20, :lo12:.LANCHOR173
 	adrp	x2, ftl_info_data_buffer
 	mov	w0, 0
 	add	x2, x2, :lo12:ftl_info_data_buffer
 	bl	ftl_prog_page
 	cmn	w0, #1
 	ldrh	w1, [x25, 2]
-	adrp	x0, .LANCHOR169
+	adrp	x0, .LANCHOR176
 	add	w1, w1, 1
 	strh	w1, [x25, 2]
-	beq	.L2088
-	ldrb	w1, [x0, #:lo12:.LANCHOR169]
-	cbz	w1, .L2089
-.L2088:
-	strb	wzr, [x0, #:lo12:.LANCHOR169]
-	b	.L2077
-.L2081:
+	beq	.L2203
+	ldrb	w1, [x0, #:lo12:.LANCHOR176]
+	cbz	w1, .L2204
+.L2203:
+	strb	wzr, [x0, #:lo12:.LANCHOR176]
+	b	.L2192
+.L2196:
 	cmp	w2, 255
-	bne	.L2084
+	bne	.L2199
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L2085
+	bne	.L2200
 	mov	w24, w0
-	b	.L2084
-.L2079:
+	b	.L2199
+.L2194:
 	madd	w19, w19, w6, w4
-	cbnz	w0, .L2087
+	cbnz	w0, .L2202
 	mov	w1, w19
 	bl	flash_erase_block
-	b	.L2087
-.L2089:
-	cbnz	w24, .L2090
-.L2098:
-	adrp	x0, .LANCHOR167
-	ldrb	w0, [x0, #:lo12:.LANCHOR167]
+	b	.L2202
+.L2204:
+	cbnz	w24, .L2205
+.L2213:
+	adrp	x0, .LANCHOR174
+	ldrb	w0, [x0, #:lo12:.LANCHOR174]
 	cmp	w0, 255
-	bne	.L2092
-	adrp	x1, .LANCHOR168
+	bne	.L2207
+	adrp	x1, .LANCHOR175
 	adrp	x0, .LC0
-	mov	w2, 708
-	add	x1, x1, :lo12:.LANCHOR168
+	mov	w2, 778
+	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2092:
+.L2207:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -12668,42 +13278,42 @@ ftl_info_flush:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2090:
+.L2205:
 	ldrb	w19, [x25, 1]
-	adrp	x20, .LANCHOR168
+	adrp	x20, .LANCHOR175
 	adrp	x21, .LC0
-	add	x20, x20, :lo12:.LANCHOR168
+	add	x20, x20, :lo12:.LANCHOR175
 	add	w19, w19, 1
 	add	x21, x21, :lo12:.LC0
-	adrp	x22, .LANCHOR20
-.L2093:
+	adrp	x22, .LANCHOR22
+.L2208:
 	cmp	w19, 7
-	bhi	.L2098
-	ldr	x1, [x22, #:lo12:.LANCHOR20]
+	bhi	.L2213
+	ldr	x1, [x22, #:lo12:.LANCHOR22]
 	add	w0, w19, 8
 	add	x0, x1, x0, sxtw
 	ldrb	w23, [x0, 32]
 	add	w0, w23, 127
 	and	w0, w0, 255
 	cmp	w0, 125
-	bhi	.L2094
-	mov	w2, 701
+	bhi	.L2209
+	mov	w2, 771
 	mov	x1, x20
 	mov	x0, x21
 	bl	printf
-.L2095:
-	ldrh	w1, [x26, #:lo12:.LANCHOR103]
+.L2210:
+	ldrh	w1, [x26, #:lo12:.LANCHOR108]
 	mov	w0, 0
 	mul	w1, w1, w23
 	bl	flash_erase_block
-	b	.L2096
-.L2094:
+	b	.L2211
+.L2209:
 	cmp	w23, 255
-	bne	.L2095
-.L2096:
+	bne	.L2210
+.L2211:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L2093
+	b	.L2208
 	.size	ftl_info_flush, .-ftl_info_flush
 	.section	.text.ftl_info_blk_init,"ax",@progbits
 	.align	2
@@ -12711,32 +13321,32 @@ ftl_info_flush:
 	.type	ftl_info_blk_init, %function
 ftl_info_blk_init:
 	stp	x29, x30, [sp, -128]!
-	adrp	x0, .LANCHOR170
-	adrp	x1, .LANCHOR169
+	adrp	x0, .LANCHOR177
+	adrp	x1, .LANCHOR176
 	mov	w2, 16384
 	add	x29, sp, 0
-	strb	wzr, [x0, #:lo12:.LANCHOR170]
+	strb	wzr, [x0, #:lo12:.LANCHOR177]
 	mov	w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR169]
-	adrp	x1, .LANCHOR171
+	strb	w0, [x1, #:lo12:.LANCHOR176]
+	adrp	x1, .LANCHOR178
 	stp	x19, x20, [sp, 16]
 	adrp	x20, ftl_info_data_buffer
-	strb	w0, [x1, #:lo12:.LANCHOR171]
+	strb	w0, [x1, #:lo12:.LANCHOR178]
 	adrp	x1, .LANCHOR3
 	add	x0, x20, :lo12:ftl_info_data_buffer
 	stp	x21, x22, [sp, 32]
 	str	x0, [x1, #:lo12:.LANCHOR3]
 	adrp	x1, .LANCHOR2
-	adrp	x22, .LANCHOR97
+	adrp	x22, .LANCHOR100
 	stp	x25, x26, [sp, 64]
 	ldrh	w1, [x1, #:lo12:.LANCHOR2]
-	adrp	x21, .LANCHOR167
+	adrp	x21, .LANCHOR174
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR20
+	adrp	x23, .LANCHOR22
 	stp	x27, x28, [sp, 80]
-	adrp	x26, .LANCHOR103
+	adrp	x26, .LANCHOR108
 	add	x1, x0, x1, lsl 2
-	str	x1, [x22, #:lo12:.LANCHOR97]
+	str	x1, [x22, #:lo12:.LANCHOR100]
 	mov	w1, 0
 	bl	ftl_memset
 	mov	w1, 0
@@ -12744,56 +13354,59 @@ ftl_info_blk_init:
 	adrp	x0, ftl_ext_info_data_buffer
 	add	x0, x0, :lo12:ftl_ext_info_data_buffer
 	bl	ftl_memset
-	adrp	x25, .LANCHOR117
-	ldr	x1, [x23, #:lo12:.LANCHOR20]
-	add	x0, x21, :lo12:.LANCHOR167
+	adrp	x25, .LANCHOR123
+	ldr	x1, [x23, #:lo12:.LANCHOR22]
+	add	x0, x21, :lo12:.LANCHOR174
 	mov	w27, 21574
-	add	x26, x26, :lo12:.LANCHOR103
-	add	x25, x25, :lo12:.LANCHOR117
+	add	x26, x26, :lo12:.LANCHOR108
+	add	x25, x25, :lo12:.LANCHOR123
 	mov	x19, 7
 	strb	wzr, [x0, 1]
 	movk	w27, 0x494c, lsl 16
 	ldrb	w1, [x1, 40]
-	strb	w1, [x21, #:lo12:.LANCHOR167]
+	strb	w1, [x21, #:lo12:.LANCHOR174]
 	strh	wzr, [x0, 2]
-.L2114:
-	ldr	x1, [x23, #:lo12:.LANCHOR20]
+.L2229:
+	ldr	x1, [x23, #:lo12:.LANCHOR22]
 	add	w0, w19, 8
 	sxth	w24, w19
 	mov	w28, w19
 	add	x0, x1, x0, sxtw
 	ldrb	w0, [x0, 32]
 	cmp	w0, 255
-	bne	.L2113
-.L2118:
+	bne	.L2228
+.L2233:
 	sub	x19, x19, #1
 	cmn	x19, #1
-	bne	.L2114
+	bne	.L2229
 	mov	w24, 0
-.L2115:
-	adrp	x0, .LANCHOR7
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2119
-	ldr	x0, [x22, #:lo12:.LANCHOR97]
+.L2230:
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L2234
+	ldr	x0, [x22, #:lo12:.LANCHOR100]
 	mov	w2, 4800
 	mov	w1, w19
 	ldr	w3, [x0]
-	adrp	x0, .LC122
-	add	x0, x0, :lo12:.LC122
+	adrp	x0, .LC133
+	add	x0, x0, :lo12:.LC133
 	bl	printf
-.L2119:
+.L2234:
 	cmn	w19, #1
-	bne	.L2120
+	bne	.L2235
 	mov	w1, 0
 	mov	w2, 16384
 	add	x0, x20, :lo12:ftl_info_data_buffer
 	bl	ftl_memset
-	ldr	x0, [x22, #:lo12:.LANCHOR97]
+	ldr	x0, [x22, #:lo12:.LANCHOR100]
 	mov	w1, 21574
 	movk	w1, 0x494c, lsl 16
 	str	w1, [x0]
+	mov	w1, 8
+	movk	w1, 0x6, lsl 16
+	str	w1, [x0, 12]
 	mov	w0, w19
-.L2112:
+.L2227:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -12801,12 +13414,12 @@ ftl_info_blk_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2113:
+.L2228:
 	ldrh	w6, [x26]
 	add	x8, x20, :lo12:ftl_info_data_buffer
 	ldrb	w4, [x25]
-	adrp	x7, .LANCHOR166
-	add	x7, x7, :lo12:.LANCHOR166
+	adrp	x7, .LANCHOR173
+	add	x7, x7, :lo12:.LANCHOR173
 	mov	x2, x8
 	mov	x3, x7
 	stp	x7, x8, [x29, 104]
@@ -12819,7 +13432,7 @@ ftl_info_blk_init:
 	cmn	w0, #1
 	ldr	w6, [x29, 124]
 	ldp	x7, x8, [x29, 104]
-	bne	.L2116
+	bne	.L2231
 	ldrb	w4, [x25]
 	mov	x3, x7
 	mov	x2, x8
@@ -12827,58 +13440,58 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_read_page
 	mov	w5, w0
-.L2116:
-	adrp	x0, .LANCHOR7
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2117
-	ldr	x0, [x22, #:lo12:.LANCHOR97]
+.L2231:
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L2232
+	ldr	x0, [x22, #:lo12:.LANCHOR100]
 	mov	w2, w5
 	str	w5, [x29, 124]
-	mov	w3, 580
+	mov	w3, 672
 	mov	w1, w28
 	ldr	w4, [x0]
-	adrp	x0, .LC121
-	add	x0, x0, :lo12:.LC121
+	adrp	x0, .LC132
+	add	x0, x0, :lo12:.LC132
 	bl	printf
 	ldr	w5, [x29, 124]
-.L2117:
+.L2232:
 	cmn	w5, #1
-	beq	.L2118
-	ldr	x0, [x22, #:lo12:.LANCHOR97]
+	beq	.L2233
+	ldr	x0, [x22, #:lo12:.LANCHOR100]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L2118
+	bne	.L2233
 	mov	w19, w24
-	b	.L2115
-.L2120:
-	ldr	x1, [x23, #:lo12:.LANCHOR20]
+	b	.L2230
+.L2235:
+	ldr	x1, [x23, #:lo12:.LANCHOR22]
 	add	w0, w24, 8
 	add	x20, x20, :lo12:ftl_info_data_buffer
 	mov	w4, 4
 	mov	x2, x20
-	adrp	x26, .LANCHOR117
+	adrp	x26, .LANCHOR123
 	add	x0, x1, x0, sxtw
 	mov	w27, 21574
-	add	x26, x26, :lo12:.LANCHOR117
+	add	x26, x26, :lo12:.LANCHOR123
 	movk	w27, 0x494c, lsl 16
 	ldrb	w1, [x0, 32]
-	add	x0, x21, :lo12:.LANCHOR167
-	strb	w1, [x21, #:lo12:.LANCHOR167]
+	add	x0, x21, :lo12:.LANCHOR174
+	strb	w1, [x21, #:lo12:.LANCHOR174]
 	strb	w24, [x0, 1]
-	adrp	x24, .LANCHOR166
-	add	x24, x24, :lo12:.LANCHOR166
+	adrp	x24, .LANCHOR173
+	add	x24, x24, :lo12:.LANCHOR173
 	mov	w0, 0
 	mov	x3, x24
 	bl	flash_get_last_written_page
 	sxth	w23, w0
 	add	w0, w0, 1
 	and	w19, w0, 65535
-	adrp	x0, .LANCHOR103
-	ldrb	w25, [x21, #:lo12:.LANCHOR167]
-	ldrh	w0, [x0, #:lo12:.LANCHOR103]
+	adrp	x0, .LANCHOR108
+	ldrb	w25, [x21, #:lo12:.LANCHOR174]
+	ldrh	w0, [x0, #:lo12:.LANCHOR108]
 	madd	w25, w25, w0, w23
-.L2122:
-	tbnz	w23, #31, .L2127
+.L2237:
+	tbnz	w23, #31, .L2240
 	ldrb	w4, [x26]
 	mov	x3, x24
 	mov	x2, x20
@@ -12886,63 +13499,30 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_read_page
 	cmn	w0, #1
-	beq	.L2123
-	ldr	x0, [x22, #:lo12:.LANCHOR97]
+	beq	.L2238
+	ldr	x0, [x22, #:lo12:.LANCHOR100]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L2123
-.L2127:
-	ldr	x0, [x22, #:lo12:.LANCHOR97]
-	add	x21, x21, :lo12:.LANCHOR167
+	bne	.L2238
+.L2240:
+	add	x21, x21, :lo12:.LANCHOR174
 	strh	w19, [x21, 2]
-	ldr	w1, [x0, 16]
-	cmp	w1, 2048
-	bhi	.L2124
-.L2125:
-	ldr	w1, [x0, 24]
-	cmp	w1, 2048
-	bls	.L2128
-	ldr	w2, [x0, 28]
-	add	w2, w2, w1, lsr 11
-	and	w1, w1, 2047
-	stp	w1, w2, [x0, 24]
-.L2128:
-	ldr	w1, [x0, 32]
-	cmp	w1, 1024
-	bls	.L2129
-	ldr	w2, [x0, 36]
-	add	w2, w2, w1, lsr 10
-	and	w1, w1, 1023
-	stp	w1, w2, [x0, 32]
-.L2129:
-	ldr	w1, [x0, 40]
-	cmp	w1, 1024
-	bls	.L2130
-	ldr	w2, [x0, 44]
-	add	w2, w2, w1, lsr 10
-	and	w1, w1, 1023
-	stp	w1, w2, [x0, 40]
-.L2130:
-	ldr	w1, [x0, 64]
-	add	w1, w1, 1
-	str	w1, [x0, 64]
+	bl	ftl_tmp_into_update
+	ldr	x1, [x22, #:lo12:.LANCHOR100]
+	ldr	w0, [x1, 64]
+	add	w0, w0, 1
+	str	w0, [x1, 64]
 	mov	w0, 0
 	bl	ftl_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
 	mov	w0, 0
-	b	.L2112
-.L2123:
+	b	.L2227
+.L2238:
 	sub	w23, w23, #1
 	sub	w25, w25, #1
 	sxth	w23, w23
-	b	.L2122
-.L2124:
-	ldr	w2, [x0, 20]
-	add	w2, w2, w1, lsr 11
-	and	w1, w1, 2047
-	stp	w1, w2, [x0, 16]
-	b	.L2125
+	b	.L2237
 	.size	ftl_info_blk_init, .-ftl_info_blk_init
 	.section	.text.ftl_ext_info_flush,"ax",@progbits
 	.align	2
@@ -12950,57 +13530,57 @@ ftl_info_blk_init:
 	.type	ftl_ext_info_flush, %function
 ftl_ext_info_flush:
 	stp	x29, x30, [sp, -96]!
-	adrp	x0, .LANCHOR5
+	adrp	x0, .LANCHOR6
 	add	x29, sp, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	ldr	x0, [x0, #:lo12:.LANCHOR6]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	ldr	w1, [x0, 520]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbz	w1, .L2146
+	cbz	w1, .L2256
 	str	wzr, [x0, 520]
-.L2146:
-	adrp	x20, .LANCHOR80
-	adrp	x22, .LANCHOR172
-	adrp	x21, .LANCHOR96
-	add	x20, x20, :lo12:.LANCHOR80
-	add	x22, x22, :lo12:.LANCHOR172
-	add	x21, x21, :lo12:.LANCHOR96
+.L2256:
+	adrp	x20, .LANCHOR83
+	adrp	x22, .LANCHOR179
+	adrp	x21, .LANCHOR102
+	add	x20, x20, :lo12:.LANCHOR83
+	add	x22, x22, :lo12:.LANCHOR179
+	add	x21, x21, :lo12:.LANCHOR102
 	mov	w0, 0
 	bl	ftl_total_vpn_update
-.L2147:
-	adrp	x23, .LANCHOR97
+.L2257:
+	adrp	x23, .LANCHOR100
 	mov	x24, x23
-.L2150:
-	ldr	x0, [x23, #:lo12:.LANCHOR97]
+.L2260:
+	ldr	x0, [x23, #:lo12:.LANCHOR100]
 	ldr	w1, [x0, 56]
 	add	w1, w1, 1
 	str	w1, [x0, 56]
 	ldrh	w1, [x0, 140]
 	ldrh	w0, [x20]
 	cmp	w1, w0
-	bcc	.L2148
+	bcc	.L2258
 	bl	ftl_ext_alloc_new_blk
-.L2148:
-	ldr	x0, [x24, #:lo12:.LANCHOR97]
+.L2258:
+	ldr	x0, [x24, #:lo12:.LANCHOR100]
 	ldrh	w1, [x0, 130]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2149
+	bne	.L2259
 	adrp	x0, .LC0
-	mov	w2, 1639
+	mov	w2, 1747
 	mov	x1, x22
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2149:
-	ldr	x1, [x24, #:lo12:.LANCHOR97]
+.L2259:
+	ldr	x1, [x24, #:lo12:.LANCHOR100]
 	mov	w19, 21
 	ldrh	w0, [x21]
-	adrp	x26, .LANCHOR117
-	adrp	x27, .LANCHOR166
-	add	x25, x27, :lo12:.LANCHOR166
+	adrp	x26, .LANCHOR123
+	adrp	x27, .LANCHOR173
+	add	x25, x27, :lo12:.LANCHOR173
 	sub	w0, w19, w0
 	mov	w19, 1
 	ldrh	w2, [x1, 130]
@@ -13008,43 +13588,43 @@ ftl_ext_info_flush:
 	sub	w19, w19, #1
 	and	w19, w19, w2
 	asr	w28, w2, w0
-	adrp	x0, .LANCHOR103
-	ldrh	w2, [x0, #:lo12:.LANCHOR103]
+	adrp	x0, .LANCHOR108
+	ldrh	w2, [x0, #:lo12:.LANCHOR108]
 	ldrh	w0, [x1, 140]
 	mov	w1, 0
 	madd	w19, w19, w2, w0
-	ldrb	w2, [x26, #:lo12:.LANCHOR117]
+	ldrb	w2, [x26, #:lo12:.LANCHOR123]
 	mov	x0, x25
 	and	w19, w19, 65535
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	ldr	x0, [x24, #:lo12:.LANCHOR97]
+	ldr	x0, [x24, #:lo12:.LANCHOR100]
 	mov	w1, w19
-	ldrb	w4, [x26, #:lo12:.LANCHOR117]
+	ldrb	w4, [x26, #:lo12:.LANCHOR123]
 	mov	x3, x25
-	str	wzr, [x27, #:lo12:.LANCHOR166]
+	str	wzr, [x27, #:lo12:.LANCHOR173]
 	adrp	x2, ftl_ext_info_data_buffer
 	add	x2, x2, :lo12:ftl_ext_info_data_buffer
 	ldr	w0, [x0, 56]
 	str	w0, [x25, 4]
 	mov	w0, w28
 	bl	ftl_prog_page
-	ldr	x2, [x24, #:lo12:.LANCHOR97]
+	ldr	x2, [x24, #:lo12:.LANCHOR100]
 	ldrh	w1, [x2, 140]
 	add	w1, w1, 1
 	and	w1, w1, 65535
 	strh	w1, [x2, 140]
 	cmp	w1, 1
-	beq	.L2150
+	beq	.L2260
 	cmn	w0, #1
-	adrp	x0, .LANCHOR171
-	beq	.L2151
-	ldrb	w1, [x0, #:lo12:.LANCHOR171]
-	cbz	w1, .L2152
-.L2151:
-	strb	wzr, [x0, #:lo12:.LANCHOR171]
-	b	.L2147
-.L2152:
+	adrp	x0, .LANCHOR178
+	beq	.L2261
+	ldrb	w1, [x0, #:lo12:.LANCHOR178]
+	cbz	w1, .L2262
+.L2261:
+	strb	wzr, [x0, #:lo12:.LANCHOR178]
+	b	.L2257
+.L2262:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -13060,24 +13640,24 @@ ftl_ext_info_flush:
 	.type	ftl_ext_info_init, %function
 ftl_ext_info_init:
 	stp	x29, x30, [sp, -112]!
-	adrp	x0, .LANCHOR113
+	adrp	x0, .LANCHOR118
 	mov	w4, 4
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR97
-	strh	wzr, [x0, #:lo12:.LANCHOR113]
-	ldr	x0, [x23, #:lo12:.LANCHOR97]
+	adrp	x23, .LANCHOR100
+	strh	wzr, [x0, #:lo12:.LANCHOR118]
+	ldr	x0, [x23, #:lo12:.LANCHOR100]
 	stp	x19, x20, [sp, 16]
 	mov	w19, 1
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR166
+	adrp	x25, .LANCHOR173
 	stp	x21, x22, [sp, 32]
 	adrp	x26, ftl_ext_info_data_buffer
 	ldrh	w20, [x0, 130]
-	adrp	x0, .LANCHOR96
+	adrp	x0, .LANCHOR102
 	stp	x27, x28, [sp, 80]
-	add	x3, x25, :lo12:.LANCHOR166
-	ldrh	w1, [x0, #:lo12:.LANCHOR96]
+	add	x3, x25, :lo12:.LANCHOR173
+	ldrh	w1, [x0, #:lo12:.LANCHOR102]
 	mov	w0, 21
 	add	x2, x26, :lo12:ftl_ext_info_data_buffer
 	sub	w0, w0, w1
@@ -13090,32 +13670,32 @@ ftl_ext_info_init:
 	mov	w0, w20
 	bl	flash_get_last_written_page
 	sxth	w22, w0
-	adrp	x0, .LANCHOR7
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2163
-	adrp	x1, .LANCHOR173
-	adrp	x0, .LC66
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L2273
+	adrp	x1, .LANCHOR180
+	adrp	x0, .LC72
 	mov	w3, w22
-	mov	w2, 1683
-	add	x1, x1, :lo12:.LANCHOR173
-	add	x0, x0, :lo12:.LC66
+	mov	w2, 1791
+	add	x1, x1, :lo12:.LANCHOR180
+	add	x0, x0, :lo12:.LC72
 	bl	printf
-.L2163:
-	adrp	x27, .LANCHOR117
-	adrp	x28, .LANCHOR103
+.L2273:
+	adrp	x27, .LANCHOR123
+	adrp	x28, .LANCHOR108
 	mov	w5, 20038
-	add	x27, x27, :lo12:.LANCHOR117
-	add	x28, x28, :lo12:.LANCHOR103
+	add	x27, x27, :lo12:.LANCHOR123
+	add	x28, x28, :lo12:.LANCHOR108
 	mov	w24, 0
 	movk	w5, 0x4549, lsl 16
-.L2164:
+.L2274:
 	and	w21, w22, 65535
 	sub	w0, w21, w24
-	tbnz	x0, 15, .L2169
+	tbnz	x0, 15, .L2279
 	ldrh	w0, [x28]
 	sub	w1, w22, w24
 	ldrb	w4, [x27]
-	add	x3, x25, :lo12:.LANCHOR166
+	add	x3, x25, :lo12:.LANCHOR173
 	str	w5, [x29, 108]
 	add	x2, x26, :lo12:ftl_ext_info_data_buffer
 	madd	w1, w0, w19, w1
@@ -13124,144 +13704,260 @@ ftl_ext_info_init:
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
 	ldr	w5, [x29, 108]
-	beq	.L2165
-	adrp	x0, .LANCHOR5
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	beq	.L2275
+	adrp	x0, .LANCHOR6
+	ldr	x0, [x0, #:lo12:.LANCHOR6]
 	ldr	w0, [x0]
 	cmp	w0, w5
-	bne	.L2165
-.L2169:
+	bne	.L2275
+.L2279:
 	bl	zftl_sblk_list_init
-	ldr	x0, [x23, #:lo12:.LANCHOR97]
+	ldr	x0, [x23, #:lo12:.LANCHOR100]
 	ldrh	w1, [x0, 140]
 	cmp	w1, w22
-	bgt	.L2167
+	bgt	.L2277
 	add	w21, w21, 1
 	strh	w21, [x0, 140]
 	bl	ftl_ext_info_flush
-.L2167:
-	adrp	x0, .LANCHOR5
+.L2277:
+	adrp	x0, .LANCHOR6
 	mov	w1, -1
 	ldp	x19, x20, [sp, 16]
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	ldr	x0, [x0, #:lo12:.LANCHOR6]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
+	strh	w1, [x0, 584]
 	ldp	x25, x26, [sp, 64]
+	strh	w1, [x0, 586]
 	ldp	x27, x28, [sp, 80]
+	strh	w1, [x0, 588]
+	strh	w1, [x0, 590]
 	str	wzr, [x0, 520]
 	str	wzr, [x0, 604]
 	str	wzr, [x0, 608]
-	adrp	x0, .LANCHOR114
-	strh	w1, [x0, #:lo12:.LANCHOR114]
+	adrp	x0, .LANCHOR66
+	strh	w1, [x0, #:lo12:.LANCHOR66]
 	mov	w0, 0
 	ldp	x29, x30, [sp], 112
 	ret
-.L2165:
+.L2275:
 	add	w24, w24, 1
-	b	.L2164
+	b	.L2274
 	.size	ftl_ext_info_init, .-ftl_ext_info_init
+	.section	.text.ftl_low_format_data_init,"ax",@progbits
+	.align	2
+	.global	ftl_low_format_data_init
+	.type	ftl_low_format_data_init, %function
+ftl_low_format_data_init:
+	stp	x29, x30, [sp, -48]!
+	mov	w2, 16384
+	mov	w1, 0
+	adrp	x0, ftl_ext_info_data_buffer
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	add	x0, x0, :lo12:ftl_ext_info_data_buffer
+	str	x21, [sp, 32]
+	bl	ftl_memset
+	bl	zftl_sblk_list_init
+	adrp	x19, .LANCHOR100
+	mov	w0, 1
+	bl	ftl_alloc_sblk
+	mov	w1, 0
+	mov	w21, w0
+	bl	ftl_erase_sblk
+	ldr	x1, [x19, #:lo12:.LANCHOR100]
+	mov	w0, w21
+	add	x1, x1, 672
+	bl	ftl_get_blk_list_in_sblk
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldrh	w20, [x0, 672]
+	strh	wzr, [x0, 690]
+	mov	w0, 65533
+	sub	w1, w20, #1
+	cmp	w0, w1, uxth
+	bcs	.L2288
+	adrp	x1, .LANCHOR181
+	adrp	x0, .LC0
+	mov	w2, 1974
+	add	x1, x1, :lo12:.LANCHOR181
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2288:
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	mov	w2, 256
+	mov	w1, 255
+	add	x0, x0, 416
+	strh	wzr, [x0, 280]
+	bl	ftl_memset
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	mov	w2, 4096
+	mov	w1, 0
+	add	x0, x0, 704
+	bl	ftl_memset
+	adrp	x1, .LANCHOR102
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldrh	w2, [x1, #:lo12:.LANCHOR102]
+	mov	w1, 21
+	sub	w1, w1, w2
+	strh	w20, [x0, 692]
+	strh	w21, [x0, 416]
+	asr	w1, w20, w1
+	strh	w1, [x0, 694]
+	mov	w1, 1
+	strh	w1, [x0, 688]
+	adrp	x1, .LANCHOR182
+	adrp	x20, .LANCHOR6
+	ldrh	w1, [x1, #:lo12:.LANCHOR182]
+	strh	w1, [x0, 698]
+	ldr	x0, [x20, #:lo12:.LANCHOR6]
+	mov	w1, 20038
+	movk	w1, 0x4549, lsl 16
+	str	w1, [x0]
+	bl	ftl_alloc_sys_blk
+	mov	w21, w0
+	mov	w1, 0
+	bl	ftl_erase_phy_blk
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	mov	w1, 2
+	strh	w21, [x0, 130]
+	strh	wzr, [x0, 140]
+	ldr	x0, [x20, #:lo12:.LANCHOR6]
+	add	x0, x0, 16
+	bl	ftl_open_sblk_init
+	ldr	x0, [x20, #:lo12:.LANCHOR6]
+	mov	w1, 3
+	add	x0, x0, 48
+	bl	ftl_open_sblk_init
+	ldr	x1, [x19, #:lo12:.LANCHOR100]
+	ldr	x0, [x20, #:lo12:.LANCHOR6]
+	add	x0, x0, 136
+	ldrh	w2, [x1, 134]
+	strh	w2, [x0, -10]
+	mov	w2, -1
+	strh	wzr, [x0, -12]
+	strh	w2, [x0, -56]
+	strh	w2, [x0, -6]
+	mov	w2, -1
+	strh	wzr, [x0, -16]
+	str	w2, [x0, 408]
+	strh	wzr, [x0, -14]
+	strh	w2, [x1, 126]
+	mov	w2, 256
+	str	wzr, [x0, 384]
+	mov	w1, 255
+	str	wzr, [x0, 388]
+	str	wzr, [x0, 392]
+	bl	ftl_memset
+	ldr	x0, [x20, #:lo12:.LANCHOR6]
+	mov	w2, 128
+	mov	w1, 255
+	add	x0, x0, 392
+	bl	ftl_memset
+	bl	ftl_ext_info_flush
+	mov	w0, 0
+	bl	ftl_info_flush
+	bl	ftl_info_blk_init
+	ldr	x21, [sp, 32]
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+	.size	ftl_low_format_data_init, .-ftl_low_format_data_init
 	.section	.text.ftl_low_format,"ax",@progbits
 	.align	2
 	.global	ftl_low_format
 	.type	ftl_low_format, %function
 ftl_low_format:
 	stp	x29, x30, [sp, -80]!
+	mov	w1, 0
+	adrp	x0, .LC134
+	add	x0, x0, :lo12:.LC134
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR174
+	adrp	x20, .LANCHOR183
 	stp	x21, x22, [sp, 32]
-	add	x20, x20, :lo12:.LANCHOR174
+	add	x20, x20, :lo12:.LANCHOR183
 	stp	x25, x26, [sp, 64]
-	adrp	x22, .LANCHOR20
+	adrp	x22, .LANCHOR22
 	mov	x25, x22
 	stp	x23, x24, [sp, 48]
 	mov	w19, 8
 	adrp	x23, .LC0
-.L2180:
-	ldr	x0, [x22, #:lo12:.LANCHOR20]
+	bl	printf
+.L2293:
+	ldr	x0, [x22, #:lo12:.LANCHOR22]
 	add	x0, x0, x19, sxtw
 	ldrb	w21, [x0, 32]
 	add	w0, w21, 127
 	and	w0, w0, 255
 	cmp	w0, 125
-	bhi	.L2178
-	mov	w2, 1854
+	bhi	.L2291
+	mov	w2, 2024
 	mov	x1, x20
 	add	x0, x23, :lo12:.LC0
 	bl	printf
-.L2178:
+.L2291:
 	cmp	w21, 255
-	beq	.L2179
-	adrp	x0, .LANCHOR103
-	ldrh	w1, [x0, #:lo12:.LANCHOR103]
+	beq	.L2292
+	adrp	x0, .LANCHOR108
+	ldrh	w1, [x0, #:lo12:.LANCHOR108]
 	mov	w0, 0
 	mul	w1, w1, w21
 	bl	flash_erase_block
-.L2179:
+.L2292:
 	add	w19, w19, 1
 	cmp	w19, 16
-	bne	.L2180
+	bne	.L2293
 	bl	sblk_init
-	adrp	x19, .LANCHOR97
-	bl	ftl_info_blk_init
 	adrp	x22, .LANCHOR3
-	mov	w1, 0
+	bl	ftl_info_blk_init
+	adrp	x19, .LANCHOR2
 	mov	w2, 16384
+	mov	w1, 0
 	adrp	x0, ftl_info_data_buffer
 	add	x0, x0, :lo12:ftl_info_data_buffer
 	bl	ftl_memset
-	adrp	x20, .LANCHOR2
-	ldr	x3, [x19, #:lo12:.LANCHOR97]
-	mov	w5, 1
-	ldr	x1, [x22, #:lo12:.LANCHOR3]
-	ldrh	w4, [x20, #:lo12:.LANCHOR2]
-	ldrh	w0, [x3, 134]
-	add	x1, x1, x0, uxth 2
-.L2181:
-	cmp	w0, w4
-	bcc	.L2182
-	mov	w0, 21574
-	adrp	x24, .LANCHOR60
-	add	x24, x24, :lo12:.LANCHOR60
-	movk	w0, 0x494c, lsl 16
-	strh	wzr, [x3, 148]
-	mov	w21, 0
+	ldr	x0, [x22, #:lo12:.LANCHOR3]
+	mov	w3, 1
+	ldrh	w2, [x19, #:lo12:.LANCHOR2]
+	add	x2, x0, x2, lsl 2
+.L2294:
+	cmp	x0, x2
+	bne	.L2295
+	adrp	x21, .LANCHOR100
+	mov	w1, 21574
+	adrp	x24, .LANCHOR62
+	add	x24, x24, :lo12:.LANCHOR62
+	ldr	x0, [x21, #:lo12:.LANCHOR100]
+	movk	w1, 0x494c, lsl 16
+	mov	w20, 0
 	mov	w26, 1
-	str	w0, [x3]
-.L2183:
-	ldrh	w0, [x20, #:lo12:.LANCHOR2]
-	adrp	x23, .LANCHOR95
-	cmp	w0, w21
-	bhi	.L2191
-	adrp	x21, .LANCHOR5
-	mov	w2, 16384
-	mov	w1, 0
-	adrp	x0, ftl_ext_info_data_buffer
-	add	x0, x0, :lo12:ftl_ext_info_data_buffer
-	bl	ftl_memset
-	ldr	x0, [x21, #:lo12:.LANCHOR5]
-	mov	w1, 20038
-	ldr	x6, [x19, #:lo12:.LANCHOR97]
-	movk	w1, 0x4549, lsl 16
+	strh	wzr, [x0, 148]
+	str	w1, [x0]
+.L2296:
+	ldrh	w0, [x19, #:lo12:.LANCHOR2]
+	adrp	x23, .LANCHOR101
+	cmp	w0, w20
+	bhi	.L2304
+	ldr	x0, [x25, #:lo12:.LANCHOR22]
 	mov	w4, 3
+	ldrb	w2, [x23, #:lo12:.LANCHOR101]
 	mov	w10, 15
-	ldrh	w3, [x6, 148]
-	str	w1, [x0]
-	ldr	x0, [x25, #:lo12:.LANCHOR20]
-	ldrb	w2, [x23, #:lo12:.LANCHOR95]
-	ldr	x1, [x22, #:lo12:.LANCHOR3]
+	ldr	x6, [x21, #:lo12:.LANCHOR100]
 	cmp	w2, 1
-	and	w8, w2, 65535
+	ldr	x1, [x22, #:lo12:.LANCHOR3]
 	ldrb	w0, [x0, 47]
 	csinc	w4, w4, wzr, ne
 	and	w4, w4, 255
+	and	w8, w2, 65535
+	ldrh	w3, [x6, 148]
 	udiv	w0, w0, w2
 	and	w5, w0, 65535
 	ubfiz	x0, x0, 2, 8
 	add	x0, x0, 4
-	add	w24, w5, 1
+	add	w20, w5, 1
 	add	x0, x1, x0
-.L2194:
+.L2307:
 	cmp	w2, 4
 	add	x1, x1, 4
 	csel	w7, w10, w4, eq
@@ -13270,148 +13966,59 @@ ftl_low_format:
 	orr	w7, w7, -32
 	strb	w7, [x1, -2]
 	cmp	x1, x0
-	bne	.L2194
+	bne	.L2307
 	mul	w5, w5, w8
 	mov	w4, 16
-	add	w0, w8, w3
+	add	w0, w3, w8
 	sdiv	w4, w4, w2
 	add	w0, w5, w0, uxth
 	strh	w0, [x6, 148]
-	adrp	x0, .LANCHOR7
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	add	w4, w24, w4
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	add	w4, w20, w4
 	and	w4, w4, 65535
 	strh	w4, [x6, 134]
-	tbz	x0, 12, .L2195
-	adrp	x0, .LC123
-	mov	w3, w24
+	tbz	x0, 12, .L2308
+	adrp	x0, .LC135
+	mov	w3, w20
 	mov	w2, 128
-	mov	w1, 1901
-	add	x0, x0, :lo12:.LC123
+	mov	w1, 2070
+	add	x0, x0, :lo12:.LC135
 	bl	printf
-.L2195:
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+.L2308:
+	ldr	x0, [x21, #:lo12:.LANCHOR100]
 	mov	w2, 128
 	mov	w1, 255
 	add	x0, x0, 160
 	bl	ftl_memset
-	ldrb	w6, [x23, #:lo12:.LANCHOR95]
-	adrp	x0, .LANCHOR104
-	ldr	x11, [x22, #:lo12:.LANCHOR3]
-	adrp	x22, .LANCHOR96
-	ldr	x8, [x19, #:lo12:.LANCHOR97]
-	and	w7, w6, 65535
-	ldrb	w12, [x0, #:lo12:.LANCHOR104]
-	mov	w2, 21
-	ldrh	w0, [x22, #:lo12:.LANCHOR96]
-	mov	w23, 0
-	mul	w1, w24, w7
-	sub	w0, w2, w0
-	ldrh	w10, [x8, 134]
-	mov	w2, 1
+	adrp	x0, .LANCHOR109
+	ldrb	w13, [x23, #:lo12:.LANCHOR101]
+	ldr	x2, [x21, #:lo12:.LANCHOR100]
+	mov	w4, 21
+	ldrb	w15, [x0, #:lo12:.LANCHOR109]
+	adrp	x0, .LANCHOR102
+	and	w16, w13, 65535
+	ldr	x14, [x22, #:lo12:.LANCHOR3]
+	ldrh	w0, [x0, #:lo12:.LANCHOR102]
+	mov	w3, 0
+	ldrh	w12, [x2, 134]
+	sub	w0, w4, w0
+	mul	w1, w20, w16
+	mov	w4, 1
+	lsl	w4, w4, w0
 	and	w1, w1, 65535
-	lsl	w2, w2, w0
-	and	w2, w2, 65535
-.L2196:
-	cmp	w24, w10
-	bcc	.L2202
-	adrp	x0, .LANCHOR4
-	ldrh	w2, [x20, #:lo12:.LANCHOR2]
-	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR4]
-	lsl	w2, w2, 1
-	bl	ftl_memset
-	bl	zftl_sblk_list_init
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	ldrh	w1, [x20, #:lo12:.LANCHOR2]
-	ldrh	w2, [x0, 134]
-	strh	w23, [x0, 112]
-	sub	w1, w1, w2
-	strh	wzr, [x0, 114]
-	strh	w1, [x0, 116]
-	strh	wzr, [x0, 118]
-	mov	w0, 1
-	bl	ftl_alloc_sblk
-	mov	w23, w0
-	mov	w1, 0
-	bl	ftl_erase_sblk
-	ldr	x1, [x19, #:lo12:.LANCHOR97]
-	mov	w0, w23
-	add	x1, x1, 672
-	bl	ftl_get_blk_list_in_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	ldrh	w20, [x0, 672]
-	strh	wzr, [x0, 690]
-	mov	w0, 65533
-	sub	w1, w20, #1
-	cmp	w0, w1, uxth
-	bcs	.L2203
-	adrp	x1, .LANCHOR174
-	adrp	x0, .LC0
-	mov	w2, 1932
-	add	x1, x1, :lo12:.LANCHOR174
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2203:
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	mov	w2, 256
-	mov	w1, 255
-	add	x0, x0, 416
-	strh	wzr, [x0, 280]
-	bl	ftl_memset
-	ldrh	w2, [x22, #:lo12:.LANCHOR96]
-	mov	w1, 21
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	sub	w1, w1, w2
-	asr	w1, w20, w1
-	strh	w1, [x0, 694]
-	mov	w1, 1
-	strh	w1, [x0, 688]
-	adrp	x1, .LANCHOR175
-	strh	w20, [x0, 692]
-	ldrh	w1, [x1, #:lo12:.LANCHOR175]
-	strh	w23, [x0, 416]
-	strh	w1, [x0, 698]
-	bl	ftl_alloc_sys_blk
-	mov	w20, w0
-	mov	w1, 0
-	bl	ftl_erase_phy_blk
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	mov	w1, 2
-	strh	w20, [x0, 130]
-	ldr	x0, [x21, #:lo12:.LANCHOR5]
-	add	x0, x0, 16
-	bl	ftl_open_sblk_init
-	ldr	x0, [x21, #:lo12:.LANCHOR5]
-	mov	w1, 3
-	add	x0, x0, 48
-	bl	ftl_open_sblk_init
-	ldr	x1, [x19, #:lo12:.LANCHOR97]
-	ldr	x0, [x21, #:lo12:.LANCHOR5]
-	add	x0, x0, 136
-	ldrh	w2, [x1, 134]
-	strh	w2, [x0, -10]
-	mov	w2, -1
-	strh	wzr, [x0, -12]
-	strh	w2, [x0, -56]
-	strh	w2, [x0, -6]
-	mov	w2, -1
-	strh	wzr, [x0, -16]
-	str	w2, [x0, 408]
-	strh	wzr, [x0, -14]
-	strh	w2, [x1, 126]
-	mov	w2, 256
-	mov	w1, 255
-	bl	ftl_memset
-	ldr	x0, [x21, #:lo12:.LANCHOR5]
-	mov	w2, 128
-	mov	w1, 255
-	add	x0, x0, 392
-	bl	ftl_memset
-	bl	ftl_ext_info_flush
-	mov	w0, 0
-	bl	ftl_info_flush
-	bl	ftl_info_blk_init
+	and	w4, w4, 65535
+.L2309:
+	cmp	w20, w12
+	bcc	.L2315
+	ldrh	w0, [x19, #:lo12:.LANCHOR2]
+	strh	w3, [x2, 112]
+	sub	w0, w0, w12
+	strh	wzr, [x2, 114]
+	strh	w0, [x2, 116]
+	strh	wzr, [x2, 118]
+	strh	w12, [x2, 132]
+	bl	ftl_low_format_data_init
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -13419,39 +14026,37 @@ ftl_low_format:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2182:
-	ldrb	w2, [x1, 2]
-	add	w0, w0, 1
-	and	w0, w0, 65535
-	add	x1, x1, 4
-	and	w2, w2, 31
-	bfi	w2, w5, 3, 2
-	strb	w2, [x1, -2]
-	b	.L2181
-.L2191:
-	strh	w21, [x24]
-	mov	w0, w21
+.L2295:
+	ldrb	w1, [x0, 2]
+	add	x0, x0, 4
+	and	w1, w1, 31
+	bfi	w1, w3, 3, 2
+	strb	w1, [x0, -2]
+	b	.L2294
+.L2304:
+	strh	w20, [x24]
+	mov	w0, w20
 	bl	ftl_test_block
-	ldrb	w11, [x23, #:lo12:.LANCHOR95]
-	adrp	x0, .LANCHOR104
+	ldrb	w11, [x23, #:lo12:.LANCHOR101]
+	adrp	x0, .LANCHOR109
 	ldr	x6, [x22, #:lo12:.LANCHOR3]
 	mov	w7, 0
-	ldrb	w14, [x0, #:lo12:.LANCHOR104]
+	ldrb	w14, [x0, #:lo12:.LANCHOR109]
 	mov	w10, 0
-	ldr	x13, [x19, #:lo12:.LANCHOR97]
+	ldr	x13, [x21, #:lo12:.LANCHOR100]
 	mov	w8, 0
-	mul	w12, w21, w11
-	add	x6, x6, x21, uxth 2
-.L2184:
+	mul	w12, w20, w11
+	add	x6, x6, x20, uxth 2
+.L2297:
 	cmp	w8, w14
-	bcs	.L2188
+	bcs	.L2301
 	add	w15, w11, w7
-	b	.L2189
-.L2187:
+	b	.L2302
+.L2300:
 	add	w1, w7, w12
 	mov	w0, w8
 	bl	flash_check_bad_block
-	cbz	w0, .L2185
+	cbz	w0, .L2298
 	ldrb	w1, [x6, 3]
 	lsl	w0, w26, w7
 	orr	w0, w0, w1
@@ -13459,241 +14064,141 @@ ftl_low_format:
 	ldrh	w0, [x13, 148]
 	add	w0, w0, 1
 	strh	w0, [x13, 148]
-.L2186:
+.L2299:
 	add	w7, w7, 1
-.L2189:
+.L2302:
 	cmp	w7, w15
-	bne	.L2187
+	bne	.L2300
 	add	w8, w8, 1
 	sub	w12, w12, w11
 	and	w8, w8, 65535
-	b	.L2184
-.L2185:
+	b	.L2297
+.L2298:
 	add	w10, w10, 1
 	and	w10, w10, 65535
-	b	.L2186
-.L2188:
-	cbnz	w10, .L2190
+	b	.L2299
+.L2301:
+	cbnz	w10, .L2303
 	ldrb	w0, [x6, 2]
 	orr	w0, w0, -32
 	strb	w0, [x6, 2]
-.L2190:
-	add	w21, w21, 1
-	and	w21, w21, 65535
-	b	.L2183
-.L2202:
-	add	x13, x11, x24, uxth 2
-	mov	w14, 0
-	mov	w15, 0
-	mov	w3, 0
-	ldrb	w0, [x13, 2]
+.L2303:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L2296
+.L2315:
+	add	x10, x14, x20, uxth 2
+	mov	w6, 0
+	mov	w8, 0
+	mov	w5, 0
+	ldrb	w0, [x10, 2]
 	orr	w0, w0, -32
-	strb	w0, [x13, 2]
-.L2197:
-	cmp	w3, w12
-	bcc	.L2205
-	add	w24, w24, 1
-	add	w1, w7, w1
-	and	w24, w24, 65535
+	strb	w0, [x10, 2]
+.L2310:
+	cmp	w5, w15
+	bcc	.L2317
+	add	w20, w20, 1
+	add	w1, w16, w1
+	and	w20, w20, 65535
 	and	w1, w1, 65535
-	b	.L2196
-.L2200:
-	ldrb	w5, [x13, 3]
-	add	w16, w15, w4
-	asr	w5, w5, w16
-	tbnz	x5, 0, .L2198
-	cmp	w6, 1
-	bls	.L2204
+	b	.L2309
+.L2313:
+	ldrb	w11, [x10, 3]
+	add	w17, w8, w7
+	asr	w11, w11, w17
+	tbnz	x11, 0, .L2311
+	cmp	w13, 1
+	bls	.L2316
 	and	w0, w0, 1
 	add	w0, w1, w0
 	and	w0, w0, 65535
-.L2199:
-	add	x5, x8, x23, sxtw 1
-	add	w23, w23, 1
-	and	w23, w23, 65535
-	add	w0, w0, w14
-	strh	w0, [x5, 160]
-.L2198:
-	add	x4, x4, 1
-.L2201:
-	and	w0, w4, 65535
-	cmp	w0, w7
-	bcc	.L2200
+.L2312:
+	add	x11, x2, x3, sxtw 1
 	add	w3, w3, 1
-	add	w0, w2, w14
 	and	w3, w3, 65535
-	add	w15, w15, w6
-	and	w14, w0, 65535
-	b	.L2197
-.L2204:
+	add	w0, w0, w6
+	strh	w0, [x11, 160]
+.L2311:
+	add	x7, x7, 1
+.L2314:
+	and	w0, w7, 65535
+	cmp	w0, w16
+	bcc	.L2313
+	add	w5, w5, 1
+	add	w6, w6, w4
+	and	w5, w5, 65535
+	add	w8, w8, w13
+	and	w6, w6, 65535
+	b	.L2310
+.L2316:
 	mov	w0, w1
-	b	.L2199
-.L2205:
-	mov	x4, 0
-	b	.L2201
+	b	.L2312
+.L2317:
+	mov	x7, 0
+	b	.L2314
 	.size	ftl_low_format, .-ftl_low_format
-	.section	.text.ftl_re_low_format_test,"ax",@progbits
+	.section	.text.ftl_re_low_format,"ax",@progbits
 	.align	2
-	.global	ftl_re_low_format_test
-	.type	ftl_re_low_format_test, %function
-ftl_re_low_format_test:
-	stp	x29, x30, [sp, -64]!
+	.global	ftl_re_low_format
+	.type	ftl_re_low_format, %function
+ftl_re_low_format:
+	stp	x29, x30, [sp, -16]!
 	mov	w1, 1
-	adrp	x0, .LC124
-	add	x0, x0, :lo12:.LC124
+	adrp	x0, .LC136
+	add	x0, x0, :lo12:.LC136
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR97
-	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR2
-	str	x23, [sp, 48]
 	bl	printf
 	bl	sblk_init
 	bl	ftl_info_blk_init
 	bl	ftl_ext_info_init
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	adrp	x3, .LANCHOR3
-	ldrh	w2, [x21, #:lo12:.LANCHOR2]
+	adrp	x0, .LANCHOR100
+	adrp	x2, .LANCHOR2
+	mov	w3, 0
 	mov	w4, 0
-	ldr	x3, [x3, #:lo12:.LANCHOR3]
+	ldr	x0, [x0, #:lo12:.LANCHOR100]
 	mov	w5, 0
-	mov	w6, 0
+	ldrh	w7, [x2, #:lo12:.LANCHOR2]
+	adrp	x2, .LANCHOR3
+	ldr	x2, [x2, #:lo12:.LANCHOR3]
 	ldrh	w1, [x0, 134]
-	add	x3, x3, x1, uxth 2
-.L2216:
-	cmp	w1, w2
-	bcc	.L2220
-	adrp	x23, .LANCHOR4
-	strh	w6, [x0, 114]
-	strh	w5, [x0, 118]
-	lsl	w2, w2, 1
-	strh	w4, [x0, 116]
-	mov	w1, 0
+	add	x2, x2, x1, uxth 2
+.L2328:
+	cmp	w1, w7
+	bcc	.L2332
+	strh	w5, [x0, 114]
+	strh	w4, [x0, 118]
+	strh	w3, [x0, 116]
 	strh	wzr, [x0, 122]
 	strh	wzr, [x0, 120]
 	strh	wzr, [x0, 124]
-	ldr	x0, [x23, #:lo12:.LANCHOR4]
-	bl	ftl_memset
-	bl	zftl_sblk_list_init
-	mov	w0, 1
-	bl	ftl_alloc_sblk
-	mov	w1, 0
-	mov	w22, w0
-	bl	ftl_erase_sblk
-	ldr	x1, [x19, #:lo12:.LANCHOR97]
-	mov	w0, w22
-	add	x1, x1, 672
-	bl	ftl_get_blk_list_in_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	ldrh	w20, [x0, 672]
-	strh	wzr, [x0, 690]
-	mov	w0, 65533
-	sub	w1, w20, #1
-	cmp	w0, w1, uxth
-	bcs	.L2221
-	adrp	x1, .LANCHOR176
-	adrp	x0, .LC0
-	mov	w2, 2004
-	add	x1, x1, :lo12:.LANCHOR176
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2221:
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	mov	w2, 256
-	mov	w1, 255
-	add	x0, x0, 416
-	strh	wzr, [x0, 280]
-	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	mov	w2, 4096
-	mov	w1, 0
-	add	x0, x0, 704
-	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	lsr	w1, w20, 14
-	and	w20, w20, 16383
-	ldrh	w2, [x21, #:lo12:.LANCHOR2]
-	strh	w1, [x0, 694]
-	mov	w1, 1
-	strh	w1, [x0, 688]
-	adrp	x1, .LANCHOR175
-	strh	w20, [x0, 692]
-	adrp	x20, .LANCHOR5
-	ldrh	w1, [x1, #:lo12:.LANCHOR175]
-	lsl	w2, w2, 1
-	strh	w22, [x0, 416]
-	strh	w1, [x0, 698]
-	mov	w1, 0
-	ldr	x0, [x23, #:lo12:.LANCHOR4]
-	bl	ftl_memset
-	ldr	x0, [x20, #:lo12:.LANCHOR5]
-	mov	w1, 2
-	add	x0, x0, 16
-	bl	ftl_open_sblk_init
-	ldr	x0, [x20, #:lo12:.LANCHOR5]
-	mov	w1, 3
-	add	x0, x0, 48
-	bl	ftl_open_sblk_init
-	ldr	x1, [x19, #:lo12:.LANCHOR97]
-	ldr	x0, [x20, #:lo12:.LANCHOR5]
-	add	x0, x0, 136
-	ldrh	w2, [x1, 134]
-	strh	w2, [x0, -10]
-	mov	w2, -1
-	strh	wzr, [x0, -12]
-	strh	w2, [x0, -56]
-	strh	w2, [x0, -6]
-	mov	w2, -1
-	strh	wzr, [x0, -16]
-	str	w2, [x0, 408]
-	strh	wzr, [x0, -14]
-	strh	w2, [x1, 126]
-	mov	w2, 256
-	mov	w1, 255
-	bl	ftl_memset
-	ldr	x0, [x20, #:lo12:.LANCHOR5]
-	mov	w2, 128
-	mov	w1, 255
-	add	x0, x0, 392
-	bl	ftl_memset
-	ldr	x0, [x20, #:lo12:.LANCHOR5]
-	str	wzr, [x0, 520]
-	str	wzr, [x0, 524]
-	str	wzr, [x0, 528]
-	bl	ftl_ext_info_flush
-	mov	w0, 0
-	bl	ftl_info_flush
-	bl	ftl_info_blk_init
-	ldr	x23, [sp, 48]
+	bl	ftl_low_format_data_init
 	mov	w0, 0
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 64
+	ldp	x29, x30, [sp], 16
 	ret
-.L2220:
-	ldrb	w7, [x3, 2]
-	and	w8, w7, 31
-	strb	w8, [x3, 2]
-	ands	w7, w7, 24
-	bne	.L2217
-	add	w6, w6, 1
-	and	w6, w6, 65535
-.L2218:
-	add	w1, w1, 1
-	add	x3, x3, 4
-	and	w1, w1, 65535
-	b	.L2216
-.L2217:
-	cmp	w7, 16
-	bne	.L2219
+.L2332:
+	ldrb	w6, [x2, 2]
+	and	w8, w6, 31
+	strb	w8, [x2, 2]
+	ands	w6, w6, 24
+	bne	.L2329
 	add	w5, w5, 1
 	and	w5, w5, 65535
-	b	.L2218
-.L2219:
+.L2330:
+	add	w1, w1, 1
+	add	x2, x2, 4
+	and	w1, w1, 65535
+	b	.L2328
+.L2329:
+	cmp	w6, 16
+	bne	.L2331
 	add	w4, w4, 1
 	and	w4, w4, 65535
-	b	.L2218
-	.size	ftl_re_low_format_test, .-ftl_re_low_format_test
+	b	.L2330
+.L2331:
+	add	w3, w3, 1
+	and	w3, w3, 65535
+	b	.L2330
+	.size	ftl_re_low_format, .-ftl_re_low_format
 	.section	.text.ftl_prog_ppa_page,"ax",@progbits
 	.align	2
 	.global	ftl_prog_ppa_page
@@ -13714,50 +14219,50 @@ ftl_prog_ppa_page:
 ftl_write_last_log_page:
 	ldrh	w1, [x0, 6]
 	cmp	w1, 1
-	bne	.L2226
+	bne	.L2337
 	stp	x29, x30, [sp, -48]!
-	adrp	x1, .LANCHOR109
+	adrp	x1, .LANCHOR114
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
 	stp	x21, x22, [sp, 32]
-	ldr	x20, [x1, #:lo12:.LANCHOR109]
+	ldr	x20, [x1, #:lo12:.LANCHOR114]
 	ldrh	w22, [x0, 12]
 	bl	ftl_get_new_free_page
 	mov	w21, w0
 	cmn	w0, #1
-	beq	.L2227
+	beq	.L2338
 	ldrh	w0, [x19]
 	add	x20, x20, x22, uxth 2
 	bl	ftl_vpn_decrement
-	adrp	x0, .LANCHOR155
+	adrp	x0, .LANCHOR171
 	mov	w1, 15555
-	add	x6, x0, :lo12:.LANCHOR155
+	add	x6, x0, :lo12:.LANCHOR171
 	movk	w1, 0xf55f, lsl 16
-	str	w1, [x0, #:lo12:.LANCHOR155]
-	adrp	x0, .LANCHOR80
-	ldrh	w1, [x0, #:lo12:.LANCHOR80]
-	adrp	x0, .LANCHOR72
-	ldrb	w0, [x0, #:lo12:.LANCHOR72]
-	mul	w1, w1, w0
-	mov	x0, x20
+	str	w1, [x0, #:lo12:.LANCHOR171]
+	adrp	x0, .LANCHOR83
+	ldrh	w1, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR76
+	ldrb	w0, [x0, #:lo12:.LANCHOR76]
+	mul	w1, w1, w0
+	mov	x0, x20
 	lsl	w1, w1, 2
 	bl	js_hash
 	stp	w0, wzr, [x6, 4]
-	adrp	x0, .LANCHOR117
+	adrp	x0, .LANCHOR123
 	mov	x2, x6
 	mov	x1, x20
-	ldrb	w3, [x0, #:lo12:.LANCHOR117]
+	ldrb	w3, [x0, #:lo12:.LANCHOR123]
 	mov	w0, w21
 	str	wzr, [x6, 12]
 	bl	ftl_prog_ppa_page
-.L2227:
+.L2338:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L2226:
+.L2337:
 	mov	w0, -1
 	ret
 	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
@@ -13766,309 +14271,286 @@ ftl_write_last_log_page:
 	.global	ftl_open_sblk_recovery
 	.type	ftl_open_sblk_recovery, %function
 ftl_open_sblk_recovery:
-	sub	sp, sp, #192
-	stp	x29, x30, [sp, 48]
-	add	x29, sp, 48
-	stp	x21, x22, [sp, 80]
-	adrp	x22, .LANCHOR7
-	stp	x27, x28, [sp, 128]
+	stp	x29, x30, [sp, -144]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR9
+	stp	x27, x28, [sp, 80]
 	mov	x28, x0
-	ldr	w0, [x22, #:lo12:.LANCHOR7]
-	stp	x25, x26, [sp, 112]
+	ldr	w0, [x22, #:lo12:.LANCHOR9]
+	stp	x25, x26, [sp, 64]
 	mov	x25, x1
-	stp	x19, x20, [sp, 64]
-	stp	x23, x24, [sp, 96]
-	tbz	x0, 12, .L2233
+	stp	x19, x20, [sp, 16]
+	stp	x23, x24, [sp, 48]
+	tbz	x0, 12, .L2344
 	ldrh	w1, [x28, 2]
-	adrp	x0, .LC125
-	add	x0, x0, :lo12:.LC125
+	adrp	x0, .LC137
+	add	x0, x0, :lo12:.LC137
 	bl	printf
-.L2233:
-	ldr	w0, [x22, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2234
+.L2344:
+	ldr	w0, [x22, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L2345
 	ldrb	w1, [x28, 5]
-	adrp	x0, .LC126
-	add	x0, x0, :lo12:.LC126
+	adrp	x0, .LC138
+	add	x0, x0, :lo12:.LC138
 	bl	printf
-.L2234:
-	ldr	w0, [x22, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2235
+.L2345:
+	ldr	w0, [x22, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L2346
 	ldrh	w1, [x28]
-	adrp	x0, .LC127
-	add	x0, x0, :lo12:.LC127
+	adrp	x0, .LC139
+	add	x0, x0, :lo12:.LC139
 	bl	printf
-.L2235:
-	ldr	w0, [x22, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2236
+.L2346:
+	ldr	w0, [x22, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L2347
 	ldrh	w2, [x28, 18]
-	adrp	x0, .LC128
+	adrp	x0, .LC140
 	ldrh	w1, [x28, 16]
-	add	x0, x0, :lo12:.LC128
+	add	x0, x0, :lo12:.LC140
 	bl	printf
-.L2236:
+.L2347:
 	ldrh	w0, [x28, 10]
-	adrp	x26, .LANCHOR117
 	strh	w0, [x28, 14]
-	mov	w27, 0
+	adrp	x0, .LANCHOR2
+	ldrh	w1, [x28]
+	ldrh	w0, [x0, #:lo12:.LANCHOR2]
+	cmp	w1, w0
+	bcs	.L2343
 	mov	w0, 1
-	adrp	x23, .LANCHOR80
 	bl	buf_alloc
 	ldrb	w20, [x28, 5]
-	ldrh	w21, [x28, 2]
 	mov	x19, x0
-	add	x0, x26, :lo12:.LANCHOR117
+	ldrh	w21, [x28, 2]
+	adrp	x26, .LANCHOR123
+	mov	w27, 0
+	add	x0, x26, :lo12:.LANCHOR123
+	adrp	x23, .LANCHOR83
 	str	x0, [x29, 128]
-.L2237:
-	ldrh	w0, [x23, #:lo12:.LANCHOR80]
+.L2350:
+	ldrh	w0, [x23, #:lo12:.LANCHOR83]
 	cmp	w0, w21
-	bhi	.L2251
-.L2240:
+	bhi	.L2363
+.L2353:
 	ldrh	w0, [x28, 10]
 	ldrh	w1, [x28, 6]
-	ldrh	w2, [x23, #:lo12:.LANCHOR80]
+	ldrh	w2, [x23, #:lo12:.LANCHOR83]
 	add	w1, w1, w0
 	ldrb	w0, [x28, 9]
 	strh	w21, [x28, 2]
 	strb	w20, [x28, 5]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L2252
-	adrp	x1, .LANCHOR177
+	beq	.L2364
+	adrp	x1, .LANCHOR184
 	adrp	x0, .LC0
-	mov	w2, 1365
-	add	x1, x1, :lo12:.LANCHOR177
+	mov	w2, 1473
+	add	x1, x1, :lo12:.LANCHOR184
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2252:
-	adrp	x21, .LANCHOR109
+.L2364:
+	adrp	x21, .LANCHOR114
 	ldrh	w3, [x28, 10]
 	mov	w0, 0
 	mov	w1, 0
-	ldr	x4, [x21, #:lo12:.LANCHOR109]
-.L2253:
+	ldr	x5, [x21, #:lo12:.LANCHOR114]
+.L2365:
 	cmp	w1, w3
-	bcc	.L2255
+	bcc	.L2367
 	ldrb	w20, [x28, 9]
-	adrp	x24, .LANCHOR4
-	ldrh	w1, [x23, #:lo12:.LANCHOR80]
+	adrp	x24, .LANCHOR5
+	ldrh	w1, [x23, #:lo12:.LANCHOR83]
 	madd	w20, w20, w1, w0
-	ldr	w0, [x22, #:lo12:.LANCHOR7]
+	ldr	w0, [x22, #:lo12:.LANCHOR9]
 	sub	w20, w20, w3
 	and	w20, w20, 65535
-	tbz	x0, 12, .L2256
+	tbz	x0, 12, .L2368
 	ldrh	w1, [x28]
-	ldr	x2, [x24, #:lo12:.LANCHOR4]
+	ldr	x2, [x24, #:lo12:.LANCHOR5]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w3, [x2, x0]
-	adrp	x0, .LC130
+	adrp	x0, .LC141
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC130
+	add	x0, x0, :lo12:.LC141
 	bl	printf
-.L2256:
-	ldr	x0, [x24, #:lo12:.LANCHOR4]
-	adrp	x25, .LANCHOR117
+.L2368:
+	ldr	x0, [x24, #:lo12:.LANCHOR5]
+	adrp	x25, .LANCHOR123
 	ldrh	w1, [x28]
-	adrp	x24, .LANCHOR72
-	adrp	x26, .LC131
-	add	x24, x24, :lo12:.LANCHOR72
-	add	x25, x25, :lo12:.LANCHOR117
-	add	x26, x26, :lo12:.LC131
+	adrp	x24, .LANCHOR76
+	adrp	x26, .LC142
+	add	x24, x24, :lo12:.LANCHOR76
+	add	x25, x25, :lo12:.LANCHOR123
+	add	x26, x26, :lo12:.LC142
 	strh	w20, [x0, x1, lsl 1]
 	mov	w20, 0
 	mov	x0, x19
 	bl	buf_free
-.L2257:
+.L2369:
 	ldrb	w0, [x24]
 	cmp	w20, w0, lsl 1
-	bcc	.L2260
+	bcc	.L2372
 	ldrh	w1, [x28, 12]
-	ldrh	w0, [x23, #:lo12:.LANCHOR80]
+	ldrh	w0, [x23, #:lo12:.LANCHOR83]
 	ldrb	w2, [x28, 9]
 	madd	w0, w0, w2, w1
 	mov	x1, -4
 	add	x0, x1, x0, sxtw 2
-	ldr	x1, [x21, #:lo12:.LANCHOR109]
+	ldr	x1, [x21, #:lo12:.LANCHOR114]
 	ldr	w0, [x1, x0]
 	cmn	w0, #1
-	beq	.L2261
-	adrp	x1, .LANCHOR177
+	beq	.L2373
+	adrp	x1, .LANCHOR184
 	adrp	x0, .LC0
-	mov	w2, 1395
-	add	x1, x1, :lo12:.LANCHOR177
+	mov	w2, 1503
+	add	x1, x1, :lo12:.LANCHOR184
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2261:
+.L2373:
 	ldrh	w0, [x28, 6]
 	cmp	w0, 1
-	bne	.L2232
-	ldp	x19, x20, [sp, 64]
+	bne	.L2343
+	ldp	x19, x20, [sp, 16]
 	mov	x0, x28
-	ldp	x21, x22, [sp, 80]
-	ldp	x23, x24, [sp, 96]
-	ldp	x25, x26, [sp, 112]
-	ldp	x27, x28, [sp, 128]
-	ldp	x29, x30, [sp, 48]
-	add	sp, sp, 192
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 144
 	b	ftl_write_last_log_page
-.L2251:
+.L2363:
 	ldrb	w20, [x28, 5]
-	adrp	x0, .LANCHOR103
-	add	x0, x0, :lo12:.LANCHOR103
+	adrp	x24, .LANCHOR108
+	add	x0, x24, :lo12:.LANCHOR108
 	str	x0, [x29, 136]
-.L2238:
+.L2351:
 	ldrb	w0, [x28, 9]
 	cmp	w0, w20
-	bhi	.L2250
+	bhi	.L2362
 	add	w21, w21, 1
 	strb	wzr, [x28, 5]
 	and	w21, w21, 65535
-	b	.L2237
-.L2250:
+	b	.L2350
+.L2362:
 	add	x0, x28, x20, sxtw 1
-	ldrh	w11, [x0, 16]
-	mov	w0, 65535
-	cmp	w11, w0
-	beq	.L2239
-	ldr	x0, [x29, 136]
-	ldrb	w3, [x26, #:lo12:.LANCHOR117]
-	ldr	x1, [x19, 8]
+	mov	w1, 65535
+	ldrh	w0, [x0, 16]
+	cmp	w0, w1
+	beq	.L2352
+	ldr	x1, [x29, 136]
+	ldrb	w3, [x26, #:lo12:.LANCHOR123]
 	ldr	x2, [x19, 24]
-	ldrh	w10, [x0]
-	madd	w10, w10, w11, w21
-	stp	w11, w10, [x29, 116]
-	mov	w0, w10
+	ldrh	w5, [x1]
+	ldr	x1, [x19, 8]
+	madd	w0, w5, w0, w21
 	bl	ftl_read_ppa_page
 	mov	w24, w0
 	cmp	w0, 512
-	beq	.L2240
+	beq	.L2353
 	cmn	w0, #1
-	ldp	w11, w10, [x29, 116]
-	beq	.L2241
+	beq	.L2354
 	ldr	x0, [x19, 24]
 	ldr	w1, [x0]
 	cmn	w1, #1
-	bne	.L2241
+	bne	.L2354
 	ldr	w0, [x0, 4]
 	cmn	w0, #1
-	bne	.L2241
+	bne	.L2354
 	ldr	x0, [x19, 8]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L2240
-.L2241:
-	ldr	w0, [x22, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2242
-	ldr	x1, [x19, 24]
-	mov	w4, w24
-	ldr	x0, [x19, 8]
-	mov	w3, w10
-	ldr	w2, [x1, 12]
-	str	w2, [sp, 32]
-	ldr	w2, [x1, 8]
-	str	w2, [sp, 24]
-	ldr	w2, [x1, 4]
-	str	w2, [sp, 16]
-	mov	w2, w21
-	ldr	w1, [x1]
-	str	w1, [sp, 8]
-	ldr	w1, [x0, 12]
-	str	w1, [sp]
-	mov	w1, w11
-	ldp	w5, w6, [x0]
-	ldr	w7, [x0, 8]
-	adrp	x0, .LC129
-	add	x0, x0, :lo12:.LC129
-	bl	printf
-.L2242:
-	adrp	x0, .LANCHOR170
+	beq	.L2353
+.L2354:
+	adrp	x0, .LANCHOR177
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR170]
+	strb	w1, [x0, #:lo12:.LANCHOR177]
 	ldrb	w0, [x28, 9]
 	ldrh	w1, [x28, 10]
 	madd	w0, w0, w21, w20
 	cmp	w1, w0
-	beq	.L2243
-	adrp	x1, .LANCHOR177
+	beq	.L2355
+	adrp	x1, .LANCHOR184
 	adrp	x0, .LC0
-	mov	w2, 1288
-	add	x1, x1, :lo12:.LANCHOR177
+	mov	w2, 1396
+	add	x1, x1, :lo12:.LANCHOR184
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2243:
+.L2355:
 	ldrh	w0, [x28, 10]
 	ldrh	w1, [x28, 6]
 	ldrb	w2, [x28, 9]
 	add	w1, w1, w0
-	ldrh	w0, [x23, #:lo12:.LANCHOR80]
+	ldrh	w0, [x23, #:lo12:.LANCHOR83]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L2244
-	adrp	x1, .LANCHOR177
+	beq	.L2356
+	adrp	x1, .LANCHOR184
 	adrp	x0, .LC0
-	mov	w2, 1289
-	add	x1, x1, :lo12:.LANCHOR177
+	mov	w2, 1397
+	add	x1, x1, :lo12:.LANCHOR184
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2244:
+.L2356:
 	cmn	w24, #1
-	beq	.L2246
+	beq	.L2358
 	ldr	x0, [x19, 24]
 	ldr	w0, [x0, 4]
 	cmn	w0, #1
-	beq	.L2246
+	beq	.L2358
 	bl	lpa_hash_get_ppa
-	cbz	x25, .L2248
+	cbz	x25, .L2360
 	ldr	x3, [x19, 24]
 	ldr	w1, [x3, 8]
 	cmp	w0, w1
-	beq	.L2248
+	beq	.L2360
 	cmn	w0, #1
-	beq	.L2248
-	adrp	x4, .LANCHOR96
-	mov	w27, 21
-	mov	w24, 1
-	ldrh	w5, [x4, #:lo12:.LANCHOR96]
-	sub	w1, w27, w5
-	lsr	w2, w0, w5
-	adrp	x5, .LANCHOR95
-	lsl	w1, w24, w1
+	beq	.L2360
+	adrp	x6, .LANCHOR102
+	mov	w5, 21
+	mov	w27, 1
+	ldrh	w7, [x6, #:lo12:.LANCHOR102]
+	sub	w1, w5, w7
+	lsr	w2, w0, w7
+	adrp	x7, .LANCHOR101
+	lsl	w1, w27, w1
 	sub	w1, w1, #1
 	and	w1, w1, w2
-	ldrb	w2, [x5, #:lo12:.LANCHOR95]
+	ldrb	w2, [x7, #:lo12:.LANCHOR101]
 	udiv	w1, w1, w2
 	ldrh	w2, [x25]
 	cmp	w2, w1, uxth
-	bne	.L2248
+	bne	.L2360
 	ldr	x1, [x29, 128]
-	adrp	x6, .LANCHOR166
-	ldr	w7, [x3]
-	add	x2, x6, :lo12:.LANCHOR166
-	str	w7, [x29, 116]
-	str	x6, [x29, 120]
+	adrp	x8, .LANCHOR173
+	ldr	w10, [x3]
+	add	x2, x8, :lo12:.LANCHOR173
+	stp	w5, w10, [x29, 112]
+	str	x8, [x29, 120]
 	ldrb	w3, [x1]
 	ldr	x1, [x19, 8]
-	stp	x5, x4, [x29, 96]
+	stp	x7, x6, [x29, 96]
 	bl	ftl_read_ppa_page
-	ldr	x6, [x29, 120]
-	ldr	w7, [x29, 116]
-	ldr	w0, [x6, #:lo12:.LANCHOR166]
-	cmp	w7, w0
-	bhi	.L2248
+	ldr	x8, [x29, 120]
+	ldr	w10, [x29, 116]
+	ldr	w0, [x8, #:lo12:.LANCHOR173]
+	cmp	w10, w0
+	bhi	.L2360
 	ldr	x0, [x19, 24]
 	ldr	w0, [x0, 8]
 	cmn	w0, #1
-	beq	.L2246
-	ldp	x5, x4, [x29, 96]
-	ldrh	w1, [x4, #:lo12:.LANCHOR96]
-	sub	w27, w27, w1
+	beq	.L2358
+	ldp	x7, x6, [x29, 96]
+	ldr	w5, [x29, 112]
+	ldrh	w1, [x6, #:lo12:.LANCHOR102]
+	sub	w5, w5, w1
 	lsr	w0, w0, w1
-	lsl	w24, w24, w27
-	sub	w24, w24, #1
-	and	w24, w24, w0
-	ldrb	w0, [x5, #:lo12:.LANCHOR95]
-	udiv	w0, w24, w0
+	lsl	w27, w27, w5
+	sub	w27, w27, #1
+	and	w27, w27, w0
+	ldrb	w0, [x7, #:lo12:.LANCHOR101]
+	udiv	w0, w27, w0
 	bl	ftl_vpn_decrement
-.L2246:
+.L2358:
 	ldrh	w0, [x28, 6]
 	mov	w27, 1
 	sub	w0, w0, #1
@@ -14076,41 +14558,41 @@ ftl_open_sblk_recovery:
 	ldrh	w0, [x28, 10]
 	add	w0, w0, 1
 	strh	w0, [x28, 10]
-.L2239:
+.L2352:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2238
-.L2255:
+	b	.L2351
+.L2367:
 	ldrh	w2, [x28, 12]
 	add	w2, w2, w1
-	ldr	w2, [x4, x2, lsl 2]
+	ldr	w2, [x5, x2, lsl 2]
 	cmn	w2, #1
-	beq	.L2254
+	beq	.L2366
 	add	w20, w0, 1
 	and	w0, w20, 65535
-.L2254:
+.L2366:
 	add	w1, w1, 1
-	b	.L2253
-.L2260:
-	cbz	w27, .L2258
+	b	.L2365
+.L2372:
+	cbz	w27, .L2370
 	ldrh	w0, [x28, 6]
 	cmp	w0, 1
-	bls	.L2258
+	bls	.L2370
 	mov	x0, x28
 	bl	ftl_get_new_free_page
 	mov	w4, w0
-	ldr	w0, [x22, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2259
+	ldr	w0, [x22, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L2371
 	mov	w1, w4
 	str	w4, [x29, 136]
 	mov	x0, x26
 	bl	printf
 	ldr	w4, [x29, 136]
-.L2259:
-	adrp	x0, .LANCHOR97
+.L2371:
+	adrp	x0, .LANCHOR100
 	ldr	x2, [x19, 24]
 	ldr	x1, [x19, 8]
-	ldr	x0, [x0, #:lo12:.LANCHOR97]
+	ldr	x0, [x0, #:lo12:.LANCHOR100]
 	ldr	w0, [x0, 8]
 	str	w0, [x2]
 	str	wzr, [x2, 12]
@@ -14122,44 +14604,43 @@ ftl_open_sblk_recovery:
 	bl	ftl_prog_ppa_page
 	ldrh	w0, [x28]
 	bl	ftl_vpn_decrement
-.L2258:
+.L2370:
 	add	w20, w20, 1
-	b	.L2257
-.L2248:
+	b	.L2369
+.L2360:
 	ldr	x3, [x19, 24]
-	adrp	x0, .LANCHOR54
-	ldr	w0, [x0, #:lo12:.LANCHOR54]
+	adrp	x0, .LANCHOR56
+	ldr	w0, [x0, #:lo12:.LANCHOR56]
 	ldr	w1, [x3, 4]
 	cmp	w1, w0
-	bcs	.L2246
+	bcs	.L2358
 	ldrb	w0, [x28, 9]
-	ldrh	w1, [x23, #:lo12:.LANCHOR80]
+	ldrh	w1, [x23, #:lo12:.LANCHOR83]
 	ldrh	w2, [x28, 10]
 	mul	w0, w0, w1
 	sub	w0, w0, #1
 	cmp	w2, w0
-	bge	.L2246
-	adrp	x0, .LANCHOR97
+	bge	.L2358
+	adrp	x0, .LANCHOR100
 	ldr	w1, [x3]
-	ldr	x0, [x0, #:lo12:.LANCHOR97]
-	ldr	w4, [x0, 8]
-	cmp	w1, w4
-	bls	.L2249
+	ldr	x0, [x0, #:lo12:.LANCHOR100]
+	ldr	w5, [x0, 8]
+	cmp	w1, w5
+	bls	.L2361
 	str	w1, [x0, 8]
-.L2249:
+.L2361:
 	ldrh	w0, [x28, 12]
 	add	w2, w2, w0
 	ldp	w0, w1, [x3, 4]
 	bl	lpa_hash_update_ppa
-	b	.L2246
-.L2232:
-	ldp	x19, x20, [sp, 64]
-	ldp	x21, x22, [sp, 80]
-	ldp	x23, x24, [sp, 96]
-	ldp	x25, x26, [sp, 112]
-	ldp	x27, x28, [sp, 128]
-	ldp	x29, x30, [sp, 48]
-	add	sp, sp, 192
+	b	.L2358
+.L2343:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 144
 	ret
 	.size	ftl_open_sblk_recovery, .-ftl_open_sblk_recovery
 	.section	.text.pm_write_page,"ax",@progbits
@@ -14172,94 +14653,94 @@ pm_write_page:
 	stp	x19, x20, [sp, 16]
 	mov	w19, w0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR80
+	adrp	x21, .LANCHOR83
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR103
+	adrp	x22, .LANCHOR108
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LANCHOR97
+	adrp	x23, .LANCHOR100
 	mov	x25, x1
-	add	x21, x21, :lo12:.LANCHOR80
+	add	x21, x21, :lo12:.LANCHOR83
 	mov	x20, x23
-	add	x22, x22, :lo12:.LANCHOR103
+	add	x22, x22, :lo12:.LANCHOR108
 	mov	w24, 65535
 	str	x27, [sp, 80]
-.L2314:
-	ldr	x0, [x23, #:lo12:.LANCHOR97]
+.L2423:
+	ldr	x0, [x23, #:lo12:.LANCHOR100]
 	ldr	w1, [x0, 48]
 	ldrh	w2, [x0, 696]
 	add	w1, w1, 1
 	str	w1, [x0, 48]
 	ldrh	w1, [x21]
 	cmp	w2, w1
-	bcs	.L2315
+	bcs	.L2424
 	ldrh	w0, [x0, 692]
 	cmp	w0, w24
-	bne	.L2316
-.L2315:
+	bne	.L2425
+.L2424:
 	bl	pm_alloc_new_blk
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2316:
-	ldr	x0, [x20, #:lo12:.LANCHOR97]
+.L2425:
+	ldr	x0, [x20, #:lo12:.LANCHOR100]
 	ldrh	w0, [x0, 692]
 	cmp	w0, w24
-	bne	.L2317
-	adrp	x1, .LANCHOR178
+	bne	.L2426
+	adrp	x1, .LANCHOR185
 	adrp	x0, .LC0
-	mov	w2, 228
-	add	x1, x1, :lo12:.LANCHOR178
+	mov	w2, 230
+	add	x1, x1, :lo12:.LANCHOR185
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2317:
-	ldr	x0, [x20, #:lo12:.LANCHOR97]
-	adrp	x27, .LANCHOR179
+.L2426:
+	ldr	x0, [x20, #:lo12:.LANCHOR100]
+	adrp	x27, .LANCHOR186
 	ldrh	w1, [x22]
 	mov	w2, 64
 	ldrh	w26, [x0, 692]
 	ldrh	w0, [x0, 696]
 	madd	w26, w26, w1, w0
-	ldr	x0, [x27, #:lo12:.LANCHOR179]
+	ldr	x0, [x27, #:lo12:.LANCHOR186]
 	mov	w1, 0
 	bl	ftl_memset
-	ldr	x3, [x27, #:lo12:.LANCHOR179]
+	ldr	x3, [x27, #:lo12:.LANCHOR186]
 	mov	x2, x25
-	ldr	x0, [x20, #:lo12:.LANCHOR97]
+	ldr	x0, [x20, #:lo12:.LANCHOR100]
 	str	w19, [x3]
 	ldr	w1, [x0, 48]
 	ldrb	w0, [x0, 694]
 	str	w1, [x3, 4]
-	adrp	x1, .LANCHOR117
-	ldrb	w4, [x1, #:lo12:.LANCHOR117]
+	adrp	x1, .LANCHOR123
+	ldrb	w4, [x1, #:lo12:.LANCHOR123]
 	mov	w1, w26
 	bl	ftl_prog_page
-	ldr	x2, [x20, #:lo12:.LANCHOR97]
+	ldr	x2, [x20, #:lo12:.LANCHOR100]
 	ldrh	w1, [x2, 696]
 	add	w1, w1, 1
 	and	w1, w1, 65535
 	strh	w1, [x2, 696]
 	cmp	w1, 1
-	adrp	x1, .LANCHOR180
-	beq	.L2318
-	ldrb	w3, [x1, #:lo12:.LANCHOR180]
-	cbz	w3, .L2319
-.L2318:
-	strb	wzr, [x1, #:lo12:.LANCHOR180]
-	b	.L2314
-.L2319:
+	adrp	x1, .LANCHOR187
+	beq	.L2427
+	ldrb	w3, [x1, #:lo12:.LANCHOR187]
+	cbz	w3, .L2428
+.L2427:
+	strb	wzr, [x1, #:lo12:.LANCHOR187]
+	b	.L2423
+.L2428:
 	cmn	w0, #1
-	bne	.L2321
+	bne	.L2430
 	mov	w1, w26
-	adrp	x0, .LC132
-	add	x0, x0, :lo12:.LC132
+	adrp	x0, .LC143
+	add	x0, x0, :lo12:.LC143
 	bl	printf
-	b	.L2314
-.L2321:
+	b	.L2423
+.L2430:
 	ldrh	w0, [x2, 698]
 	cmp	w19, w0
-	bcs	.L2322
+	bcs	.L2431
 	add	x19, x2, x19, uxtw 2
 	str	w26, [x19, 704]
-.L2322:
+.L2431:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -14275,51 +14756,51 @@ pm_write_page:
 	.type	flash_info_flush, %function
 flash_info_flush:
 	stp	x29, x30, [sp, -112]!
-	adrp	x0, .LANCHOR7
+	adrp	x0, .LANCHOR9
 	add	x29, sp, 0
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2328
-	adrp	x2, .LANCHOR181
-	adrp	x0, .LC73
-	add	x2, x2, :lo12:.LANCHOR181
+	tbz	x0, 12, .L2437
+	adrp	x2, .LANCHOR188
+	adrp	x0, .LC84
+	add	x2, x2, :lo12:.LANCHOR188
 	mov	w1, 251
-	add	x0, x0, :lo12:.LC73
+	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2328:
-	adrp	x23, .LANCHOR150
-	adrp	x20, .LANCHOR20
+.L2437:
+	adrp	x23, .LANCHOR157
+	adrp	x20, .LANCHOR22
 	mov	w2, 64
 	mov	w1, 0
-	ldr	x0, [x23, #:lo12:.LANCHOR150]
-	adrp	x21, .LANCHOR151
-	adrp	x22, .LANCHOR26
-	adrp	x24, .LC134
-	adrp	x25, .LANCHOR128
-	add	x22, x22, :lo12:.LANCHOR26
-	add	x24, x24, :lo12:.LC134
-	add	x25, x25, :lo12:.LANCHOR128
+	ldr	x0, [x23, #:lo12:.LANCHOR157]
+	adrp	x21, .LANCHOR158
+	adrp	x22, .LANCHOR28
+	adrp	x24, .LC145
+	adrp	x25, .LANCHOR134
+	add	x22, x22, :lo12:.LANCHOR28
+	add	x24, x24, :lo12:.LC145
+	add	x25, x25, :lo12:.LANCHOR134
 	bl	ftl_memset
-	add	x27, x21, :lo12:.LANCHOR151
-	ldr	x1, [x20, #:lo12:.LANCHOR20]
+	add	x27, x21, :lo12:.LANCHOR158
+	ldr	x1, [x20, #:lo12:.LANCHOR22]
 	mov	w3, 16
 	mov	w2, 4
-	adrp	x0, .LC133
-	add	x0, x0, :lo12:.LC133
+	adrp	x0, .LC144
+	add	x0, x0, :lo12:.LC144
 	mov	w26, 0
 	bl	rknand_print_hex
-	ldr	x6, [x20, #:lo12:.LANCHOR20]
+	ldr	x6, [x20, #:lo12:.LANCHOR22]
 	add	x0, x6, 16
 	ldr	w1, [x6, 8]
 	bl	js_hash
 	str	w0, [x6, 12]
-.L2329:
-	add	x28, x21, :lo12:.LANCHOR151
-	ldrb	w4, [x21, #:lo12:.LANCHOR151]
+.L2438:
+	add	x28, x21, :lo12:.LANCHOR158
+	ldrb	w4, [x21, #:lo12:.LANCHOR158]
 	ldrh	w19, [x22]
 	mov	x0, x24
 	mov	w1, w4
@@ -14332,40 +14813,40 @@ flash_info_flush:
 	sub	w0, w0, #1
 	cmp	w1, w0
 	ldp	w3, w4, [x29, 104]
-	blt	.L2330
-	ldr	x6, [x20, #:lo12:.LANCHOR20]
+	blt	.L2439
+	ldr	x6, [x20, #:lo12:.LANCHOR22]
 	ldrb	w7, [x28, 1]
 	strh	wzr, [x28, 2]
 	ldr	w0, [x6, 4]
 	ldrh	w1, [x6, 16]
 	add	w0, w0, 1
 	str	w0, [x6, 4]
-	ldrb	w0, [x21, #:lo12:.LANCHOR151]
+	ldrb	w0, [x21, #:lo12:.LANCHOR158]
 	add	w1, w1, 1
 	strb	w0, [x28, 1]
 	mov	x0, x6
-	strb	w7, [x21, #:lo12:.LANCHOR151]
+	strb	w7, [x21, #:lo12:.LANCHOR158]
 	strh	w1, [x0, 16]!
 	ldr	w1, [x6, 8]
 	bl	js_hash
 	ldrh	w19, [x22]
 	str	w0, [x6, 12]
 	mul	w19, w19, w7
-.L2339:
+.L2448:
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_erase_block
-	b	.L2331
-.L2334:
+	b	.L2440
+.L2443:
 	mov	w26, 1
-	b	.L2329
-.L2330:
+	b	.L2438
+.L2439:
 	madd	w19, w19, w4, w3
-	cbz	w1, .L2339
-.L2331:
-	ldr	x2, [x20, #:lo12:.LANCHOR20]
+	cbz	w1, .L2448
+.L2440:
+	ldr	x2, [x20, #:lo12:.LANCHOR22]
 	mov	w1, w19
-	ldr	x3, [x23, #:lo12:.LANCHOR150]
+	ldr	x3, [x23, #:lo12:.LANCHOR157]
 	mov	w5, 1
 	mov	w4, 4
 	ldr	w0, [x2, 4]
@@ -14379,14 +14860,14 @@ flash_info_flush:
 	ldrh	w1, [x27, 2]
 	add	w1, w1, 1
 	strh	w1, [x27, 2]
-	bne	.L2332
+	bne	.L2441
 	mov	w1, w19
-	adrp	x0, .LC135
-	add	x0, x0, :lo12:.LC135
+	adrp	x0, .LC146
+	add	x0, x0, :lo12:.LC146
 	bl	printf
-	b	.L2329
-.L2332:
-	cbz	w26, .L2334
+	b	.L2438
+.L2441:
+	cbz	w26, .L2443
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -14404,49 +14885,49 @@ nand_flash_init:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR7
+	adrp	x21, .LANCHOR9
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	ldr	w0, [x21, #:lo12:.LANCHOR7]
+	ldr	w0, [x21, #:lo12:.LANCHOR9]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2341
-	adrp	x2, .LANCHOR182
-	adrp	x0, .LC73
-	add	x2, x2, :lo12:.LANCHOR182
+	tbz	x0, 12, .L2450
+	adrp	x2, .LANCHOR189
+	adrp	x0, .LC84
+	add	x2, x2, :lo12:.LANCHOR189
 	mov	w1, 2101
-	add	x0, x0, :lo12:.LC73
+	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2341:
-	adrp	x22, .LANCHOR9
-	adrp	x20, .LANCHOR38
-	add	x24, x20, :lo12:.LANCHOR38
+.L2450:
+	adrp	x22, .LANCHOR11
+	adrp	x20, .LANCHOR40
+	add	x24, x20, :lo12:.LANCHOR40
 	mov	x0, x19
-	adrp	x25, .LANCHOR33
+	adrp	x25, .LANCHOR35
 	bl	nandc_init
-	add	x25, x25, :lo12:.LANCHOR33
+	add	x25, x25, :lo12:.LANCHOR35
 	mov	x26, x24
-	adrp	x19, .LANCHOR32
+	adrp	x19, .LANCHOR34
 	mov	x23, 0
-	add	x0, x19, :lo12:.LANCHOR32
+	add	x0, x19, :lo12:.LANCHOR34
 	mov	w27, 2
-	str	x0, [x22, #:lo12:.LANCHOR9]
+	str	x0, [x22, #:lo12:.LANCHOR11]
 	mov	w28, 44
-.L2347:
+.L2456:
 	mov	x1, x24
 	mov	w0, w23
 	bl	flash_read_id
 	strb	w27, [x23, x25]
-	cbnz	x23, .L2342
+	cbnz	x23, .L2451
 	ldrb	w0, [x26]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bls	.L2343
-.L2345:
+	bls	.L2452
+.L2454:
 	mov	w19, -2
-.L2340:
+.L2449:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -14455,326 +14936,326 @@ nand_flash_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2343:
+.L2452:
 	ldrb	w0, [x26, 1]
 	cmp	w0, 255
-	beq	.L2345
-.L2342:
+	beq	.L2454
+.L2451:
 	ldrb	w0, [x24]
 	cmp	w0, 181
-	bne	.L2346
+	bne	.L2455
 	strb	w28, [x24]
-.L2346:
+.L2455:
 	add	x23, x23, 1
 	add	x24, x24, 8
 	cmp	x23, 4
-	bne	.L2347
-	adrp	x0, .LANCHOR183
-	add	x8, x0, :lo12:.LANCHOR183
+	bne	.L2456
+	adrp	x0, .LANCHOR190
+	add	x8, x0, :lo12:.LANCHOR190
 	add	x8, x8, 1
 	mov	x7, x0
-	add	x12, x20, :lo12:.LANCHOR38
+	add	x12, x20, :lo12:.LANCHOR40
 	mov	x10, 0
-.L2350:
+.L2459:
 	ldrb	w2, [x8, -1]
 	mov	w11, w10
 	lsl	x24, x10, 5
 	mov	x1, x12
 	mov	x0, x8
 	bl	flash_mem_cmp8
-	cbnz	w0, .L2348
-	add	x0, x7, :lo12:.LANCHOR183
+	cbnz	w0, .L2457
+	add	x0, x7, :lo12:.LANCHOR190
 	ubfiz	x11, x11, 5, 32
 	add	x24, x0, x24
 	add	x0, x0, x11
-	adrp	x1, .LANCHOR184
-	add	x4, x1, :lo12:.LANCHOR184
+	adrp	x1, .LANCHOR191
+	add	x4, x1, :lo12:.LANCHOR191
 	ldrb	w3, [x0, 22]
 	mov	x0, 0
-.L2349:
+.L2458:
 	lsl	x5, x0, 5
 	mov	w2, w0
 	ldrb	w5, [x5, x4]
 	cmp	w5, w3
-	beq	.L2351
+	beq	.L2460
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L2349
+	bne	.L2458
 	mov	w2, w0
-.L2351:
+.L2460:
 	ubfiz	x0, x2, 5, 32
-	add	x1, x1, :lo12:.LANCHOR184
+	add	x1, x1, :lo12:.LANCHOR191
 	add	x1, x1, x0
 	mov	w2, 32
-	adrp	x0, .LANCHOR13
-	add	x0, x0, :lo12:.LANCHOR13
+	adrp	x0, .LANCHOR15
+	add	x0, x0, :lo12:.LANCHOR15
 	bl	ftl_memcpy
-	add	x23, x19, :lo12:.LANCHOR32
+	add	x23, x19, :lo12:.LANCHOR34
 	mov	x1, x24
-	adrp	x24, .LANCHOR22
+	adrp	x24, .LANCHOR24
 	mov	w2, 32
 	mov	x0, x23
 	bl	ftl_memcpy
-	ldrb	w0, [x24, #:lo12:.LANCHOR22]
+	ldrb	w0, [x24, #:lo12:.LANCHOR24]
 	cmp	w0, 8
-	bhi	.L2352
+	bhi	.L2461
 	ldrb	w1, [x23, 20]
 	cmp	w1, 60
-	bls	.L2353
+	bls	.L2462
 	mov	w1, 60
 	strb	w1, [x23, 20]
-.L2353:
+.L2462:
 	cmp	w0, 8
-	bne	.L2352
-	ldrb	w0, [x20, #:lo12:.LANCHOR38]
+	bne	.L2461
+	ldrb	w0, [x20, #:lo12:.LANCHOR40]
 	cmp	w0, 44
-	bne	.L2352
-	add	x0, x19, :lo12:.LANCHOR32
+	bne	.L2461
+	add	x0, x19, :lo12:.LANCHOR34
 	ldrb	w1, [x0, 28]
 	cmp	w1, 3
-	bne	.L2352
+	bne	.L2461
 	strb	wzr, [x0, 28]
-.L2352:
-	ldr	w0, [x21, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2354
-	adrp	x2, .LANCHOR182
-	adrp	x0, .LC73
-	add	x2, x2, :lo12:.LANCHOR182
+.L2461:
+	ldr	w0, [x21, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L2463
+	adrp	x2, .LANCHOR189
+	adrp	x0, .LC84
+	add	x2, x2, :lo12:.LANCHOR189
 	mov	w1, 2122
-	add	x0, x0, :lo12:.LC73
+	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2354:
+.L2463:
 	mov	w0, 16384
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR153
-	adrp	x25, .LANCHOR20
-	add	x20, x19, :lo12:.LANCHOR32
-	adrp	x23, .LANCHOR39
-	str	x0, [x1, #:lo12:.LANCHOR153]
+	adrp	x1, .LANCHOR160
+	adrp	x25, .LANCHOR22
+	add	x20, x19, :lo12:.LANCHOR34
+	adrp	x23, .LANCHOR41
+	str	x0, [x1, #:lo12:.LANCHOR160]
 	mov	w0, 16384
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR143
-	str	x0, [x1, #:lo12:.LANCHOR143]
+	adrp	x1, .LANCHOR150
+	str	x0, [x1, #:lo12:.LANCHOR150]
 	mov	w0, 2048
 	bl	ftl_malloc
-	str	x0, [x25, #:lo12:.LANCHOR20]
+	str	x0, [x25, #:lo12:.LANCHOR22]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR152
-	str	x0, [x1, #:lo12:.LANCHOR152]
+	adrp	x1, .LANCHOR159
+	str	x0, [x1, #:lo12:.LANCHOR159]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR145
-	str	x0, [x1, #:lo12:.LANCHOR145]
+	adrp	x1, .LANCHOR152
+	str	x0, [x1, #:lo12:.LANCHOR152]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR150
-	str	x0, [x1, #:lo12:.LANCHOR150]
-	adrp	x0, .LANCHOR157
-	strb	wzr, [x0, #:lo12:.LANCHOR157]
+	adrp	x1, .LANCHOR157
+	str	x0, [x1, #:lo12:.LANCHOR157]
+	adrp	x0, .LANCHOR163
+	strb	wzr, [x0, #:lo12:.LANCHOR163]
 	bl	flash_die_info_init
 	ldrb	w0, [x20, 18]
 	bl	flash_lsb_page_tbl_build
 	ldrb	w0, [x20, 20]
-	adrp	x20, .LANCHOR148
+	adrp	x20, .LANCHOR155
 	bl	nandc_bch_sel
-	str	xzr, [x20, #:lo12:.LANCHOR148]
-	ldr	x1, [x22, #:lo12:.LANCHOR9]
+	str	xzr, [x20, #:lo12:.LANCHOR155]
+	ldr	x1, [x22, #:lo12:.LANCHOR11]
 	mov	x22, x25
 	ldrh	w0, [x1, 16]
 	ubfx	x2, x0, 8, 3
-	strb	w2, [x23, #:lo12:.LANCHOR39]
-	adrp	x2, .LANCHOR185
+	strb	w2, [x23, #:lo12:.LANCHOR41]
+	adrp	x2, .LANCHOR192
 	ubfx	x3, x0, 3, 1
-	strb	w3, [x2, #:lo12:.LANCHOR185]
-	adrp	x2, .LANCHOR36
+	strb	w3, [x2, #:lo12:.LANCHOR192]
+	adrp	x2, .LANCHOR38
 	ubfx	x3, x0, 4, 1
-	strb	w3, [x2, #:lo12:.LANCHOR36]
-	adrp	x2, .LANCHOR69
+	strb	w3, [x2, #:lo12:.LANCHOR38]
+	adrp	x2, .LANCHOR73
 	ubfx	x3, x0, 12, 1
-	strb	w3, [x2, #:lo12:.LANCHOR69]
-	adrp	x2, .LANCHOR102
+	strb	w3, [x2, #:lo12:.LANCHOR73]
+	adrp	x2, .LANCHOR107
 	ubfx	x3, x0, 13, 1
 	ubfx	x0, x0, 14, 1
-	strb	w3, [x2, #:lo12:.LANCHOR102]
-	adrp	x2, .LANCHOR25
-	strb	w0, [x2, #:lo12:.LANCHOR25]
+	strb	w3, [x2, #:lo12:.LANCHOR107]
+	adrp	x2, .LANCHOR27
+	strb	w0, [x2, #:lo12:.LANCHOR27]
 	mov	w2, 60
 	ldrb	w0, [x1, 28]
-	adrp	x1, .LANCHOR11
-	strb	w0, [x1, #:lo12:.LANCHOR11]
-	adrp	x1, .LANCHOR10
-	strb	w2, [x1, #:lo12:.LANCHOR10]
-	ldrb	w2, [x24, #:lo12:.LANCHOR22]
+	adrp	x1, .LANCHOR13
+	strb	w0, [x1, #:lo12:.LANCHOR13]
+	adrp	x1, .LANCHOR12
+	strb	w2, [x1, #:lo12:.LANCHOR12]
+	ldrb	w2, [x24, #:lo12:.LANCHOR24]
 	cmp	w2, 9
-	bne	.L2355
+	bne	.L2464
 	mov	w2, 70
-	strb	w2, [x1, #:lo12:.LANCHOR10]
-.L2355:
-	add	x19, x19, :lo12:.LANCHOR32
-	adrp	x1, .LANCHOR158
-	adrp	x25, .LANCHOR17
-	strb	w0, [x1, #:lo12:.LANCHOR158]
+	strb	w2, [x1, #:lo12:.LANCHOR12]
+.L2464:
+	add	x19, x19, :lo12:.LANCHOR34
+	adrp	x1, .LANCHOR164
+	adrp	x25, .LANCHOR19
+	strb	w0, [x1, #:lo12:.LANCHOR164]
 	ldrh	w1, [x19, 16]
 	ldrb	w0, [x19, 19]
-	strb	w0, [x25, #:lo12:.LANCHOR17]
-	tbz	x1, 6, .L2357
+	strb	w0, [x25, #:lo12:.LANCHOR19]
+	tbz	x1, 6, .L2466
 	sub	w1, w0, #17
 	and	w1, w1, 255
 	cmp	w1, 2
-	bhi	.L2358
+	bhi	.L2467
 	adrp	x1, micron_read_retrial
 	add	x1, x1, :lo12:micron_read_retrial
-	str	x1, [x20, #:lo12:.LANCHOR148]
+	str	x1, [x20, #:lo12:.LANCHOR155]
 	cmp	w0, 19
-	adrp	x0, .LANCHOR146
-	beq	.L2359
+	adrp	x0, .LANCHOR153
+	beq	.L2468
 	mov	w1, 7
-.L2402:
-	strb	w1, [x0, #:lo12:.LANCHOR146]
-	b	.L2357
-.L2348:
+.L2511:
+	strb	w1, [x0, #:lo12:.LANCHOR153]
+	b	.L2466
+.L2457:
 	add	x10, x10, 1
 	add	x8, x8, 32
 	cmp	x10, 30
-	bne	.L2350
-	b	.L2345
-.L2359:
+	bne	.L2459
+	b	.L2454
+.L2468:
 	mov	w1, 15
-	b	.L2402
-.L2358:
+	b	.L2511
+.L2467:
 	sub	w1, w0, #65
 	cmp	w0, 33
 	and	w1, w1, 255
 	ccmp	w1, 1, 0, ne
-	bhi	.L2361
+	bhi	.L2470
 	adrp	x0, toshiba_read_retrial
 	add	x0, x0, :lo12:toshiba_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR148]
-	adrp	x0, .LANCHOR19
+	str	x0, [x20, #:lo12:.LANCHOR155]
+	adrp	x0, .LANCHOR21
 	mov	w1, 4
-	strb	w1, [x0, #:lo12:.LANCHOR19]
-.L2404:
+	strb	w1, [x0, #:lo12:.LANCHOR21]
+.L2513:
 	mov	w1, 7
-	adrp	x0, .LANCHOR146
-	b	.L2402
-.L2361:
+	adrp	x0, .LANCHOR153
+	b	.L2511
+.L2470:
 	sub	w2, w0, #34
 	sub	w1, w0, #67
 	and	w2, w2, 255
 	and	w1, w1, 255
 	cmp	w2, 1
 	ccmp	w1, 1, 0, hi
-	bhi	.L2362
+	bhi	.L2471
 	adrp	x2, toshiba_read_retrial
 	add	x2, x2, :lo12:toshiba_read_retrial
-	str	x2, [x20, #:lo12:.LANCHOR148]
+	str	x2, [x20, #:lo12:.LANCHOR155]
 	cmp	w0, 35
 	mov	w2, 68
 	ccmp	w0, w2, 4, ne
-	adrp	x0, .LANCHOR146
-	beq	.L2363
+	adrp	x0, .LANCHOR153
+	beq	.L2472
 	mov	w2, 7
-.L2401:
-	strb	w2, [x0, #:lo12:.LANCHOR146]
+.L2510:
+	strb	w2, [x0, #:lo12:.LANCHOR153]
 	cmp	w1, 1
-	adrp	x0, .LANCHOR19
-	bhi	.L2365
+	adrp	x0, .LANCHOR21
+	bhi	.L2474
 	mov	w1, 4
-.L2403:
-	strb	w1, [x0, #:lo12:.LANCHOR19]
-.L2357:
-	ldr	w0, [x21, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2366
-	adrp	x2, .LANCHOR182
-	adrp	x0, .LC73
-	add	x2, x2, :lo12:.LANCHOR182
+.L2512:
+	strb	w1, [x0, #:lo12:.LANCHOR21]
+.L2466:
+	ldr	w0, [x21, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L2475
+	adrp	x2, .LANCHOR189
+	adrp	x0, .LC84
+	add	x2, x2, :lo12:.LANCHOR189
 	mov	w1, 2170
-	add	x0, x0, :lo12:.LC73
+	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2366:
-	adrp	x24, .LANCHOR14
-	ldrb	w0, [x23, #:lo12:.LANCHOR39]
-	strb	wzr, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 0, .L2367
+.L2475:
+	adrp	x24, .LANCHOR16
+	ldrb	w0, [x23, #:lo12:.LANCHOR41]
+	strb	wzr, [x24, #:lo12:.LANCHOR16]
+	tbz	x0, 0, .L2476
 	mov	w0, 4
 	bl	nandc_set_if_mode
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
-.L2405:
+.L2514:
 	bl	nandc_set_if_mode
 	bl	flash_info_blk_init
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L2369
-	ldr	w0, [x21, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2340
-	adrp	x2, .LANCHOR182
+	bne	.L2478
+	ldr	w0, [x21, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L2449
+	adrp	x2, .LANCHOR189
 	mov	w1, 2190
-	add	x2, x2, :lo12:.LANCHOR182
-	adrp	x0, .LC73
-	add	x0, x0, :lo12:.LC73
+	add	x2, x2, :lo12:.LANCHOR189
+	adrp	x0, .LC84
+	add	x0, x0, :lo12:.LC84
 	bl	printf
-	b	.L2340
-.L2363:
+	b	.L2449
+.L2472:
 	mov	w2, 17
-	b	.L2401
-.L2365:
+	b	.L2510
+.L2474:
 	mov	w1, 5
-	b	.L2403
-.L2362:
+	b	.L2512
+.L2471:
 	sub	w0, w0, #36
 	and	w0, w0, 255
 	cmp	w0, 1
-	bhi	.L2357
+	bhi	.L2466
 	adrp	x0, toshiba_3d_read_retrial
 	add	x0, x0, :lo12:toshiba_3d_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR148]
-	b	.L2404
-.L2367:
+	str	x0, [x20, #:lo12:.LANCHOR155]
+	b	.L2513
+.L2476:
 	mov	w0, 4
-	b	.L2405
-.L2369:
-	ldrb	w0, [x25, #:lo12:.LANCHOR17]
+	b	.L2514
+.L2478:
+	ldrb	w0, [x25, #:lo12:.LANCHOR19]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 6
-	bhi	.L2370
+	bhi	.L2479
 	adrp	x0, hynix_read_retrial
 	add	x0, x0, :lo12:hynix_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR148]
-.L2370:
-	ldrb	w0, [x23, #:lo12:.LANCHOR39]
-	tbz	x0, 2, .L2372
-	ldr	x0, [x22, #:lo12:.LANCHOR20]
+	str	x0, [x20, #:lo12:.LANCHOR155]
+.L2479:
+	ldrb	w0, [x23, #:lo12:.LANCHOR41]
+	tbz	x0, 2, .L2481
+	ldr	x0, [x22, #:lo12:.LANCHOR22]
 	ldrb	w0, [x0, 19]
-	cbz	w0, .L2372
-	adrp	x0, .LANCHOR151
-	ldrb	w1, [x0, #:lo12:.LANCHOR151]
-	adrp	x0, .LANCHOR26
-	ldrh	w0, [x0, #:lo12:.LANCHOR26]
+	cbz	w0, .L2481
+	adrp	x0, .LANCHOR158
+	ldrb	w1, [x0, #:lo12:.LANCHOR158]
+	adrp	x0, .LANCHOR28
+	ldrh	w0, [x0, #:lo12:.LANCHOR28]
 	mul	w1, w1, w0
 	mov	w0, 0
 	bl	flash_ddr_para_scan
-	ldrb	w0, [x24, #:lo12:.LANCHOR14]
-	cbnz	w0, .L2372
-	ldr	x0, [x22, #:lo12:.LANCHOR20]
+	ldrb	w0, [x24, #:lo12:.LANCHOR16]
+	cbnz	w0, .L2481
+	ldr	x0, [x22, #:lo12:.LANCHOR22]
 	strb	wzr, [x0, 19]
 	bl	flash_info_flush
-.L2372:
-	ldr	w0, [x21, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2374
-	adrp	x2, .LANCHOR182
-	adrp	x0, .LC73
-	add	x2, x2, :lo12:.LANCHOR182
+.L2481:
+	ldr	w0, [x21, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L2483
+	adrp	x2, .LANCHOR189
+	adrp	x0, .LC84
+	add	x2, x2, :lo12:.LANCHOR189
 	mov	w1, 2243
-	add	x0, x0, :lo12:.LC73
+	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2374:
+.L2483:
 	bl	nand_flash_print_info
 	mov	w19, 0
-	b	.L2340
+	b	.L2449
 	.size	nand_flash_init, .-nand_flash_init
 	.section	.text.ftl_sysblk_dump,"ax",@progbits
 	.align	2
@@ -14791,31 +15272,31 @@ ftl_sysblk_dump:
 	stp	x25, x26, [sp, 112]
 	mov	w0, 1
 	stp	x27, x28, [sp, 128]
-	adrp	x26, .LANCHOR80
+	adrp	x26, .LANCHOR83
 	stp	x21, x22, [sp, 80]
 	bl	buf_alloc
 	ldr	x24, [x0, 8]
-	adrp	x27, .LANCHOR103
-	adrp	x28, .LANCHOR117
+	adrp	x27, .LANCHOR108
+	adrp	x28, .LANCHOR123
 	mov	x25, x0
-	add	x26, x26, :lo12:.LANCHOR80
-	add	x27, x27, :lo12:.LANCHOR103
-	add	x28, x28, :lo12:.LANCHOR117
+	add	x26, x26, :lo12:.LANCHOR83
+	add	x27, x27, :lo12:.LANCHOR108
+	add	x28, x28, :lo12:.LANCHOR123
 	mov	w19, 0
-.L2407:
+.L2516:
 	ldrh	w0, [x26]
 	cmp	w0, w19
-	bhi	.L2409
+	bhi	.L2518
 	mov	x0, x25
 	bl	buf_free
-	cbz	w20, .L2410
-	adrp	x1, .LANCHOR186
+	cbz	w20, .L2519
+	adrp	x1, .LANCHOR193
 	adrp	x0, .LC0
-	mov	w2, 1232
-	add	x1, x1, :lo12:.LANCHOR186
+	mov	w2, 1339
+	add	x1, x1, :lo12:.LANCHOR193
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2410:
+.L2519:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
@@ -14825,7 +15306,7 @@ ftl_sysblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 144
 	ret
-.L2409:
+.L2518:
 	ldrh	w21, [x27]
 	ldrb	w3, [x28]
 	ldr	x1, [x25, 8]
@@ -14854,19 +15335,19 @@ ftl_sysblk_dump:
 	mov	w1, w23
 	ldp	w5, w6, [x0]
 	ldr	w7, [x0, 8]
-	adrp	x0, .LC129
-	add	x0, x0, :lo12:.LC129
+	adrp	x0, .LC147
+	add	x0, x0, :lo12:.LC147
 	bl	printf
 	mov	w3, 32
 	mov	w2, 4
 	add	x1, x24, 704
-	adrp	x0, .LC136
-	add	x0, x0, :lo12:.LC136
+	adrp	x0, .LC148
+	add	x0, x0, :lo12:.LC148
 	bl	rknand_print_hex
 	cmp	w22, 512
 	ccmn	w22, #1, 4, ne
 	csinc	w20, w20, wzr, ne
-	b	.L2407
+	b	.L2516
 	.size	ftl_sysblk_dump, .-ftl_sysblk_dump
 	.section	.text.dump_ftl_info,"ax",@progbits
 	.align	2
@@ -14874,81 +15355,81 @@ ftl_sysblk_dump:
 	.type	dump_ftl_info, %function
 dump_ftl_info:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LANCHOR48
+	adrp	x0, .LANCHOR50
 	add	x29, sp, 0
-	ldrb	w1, [x0, #:lo12:.LANCHOR48]
-	adrp	x0, .LC137
+	ldrb	w1, [x0, #:lo12:.LANCHOR50]
+	adrp	x0, .LC149
 	stp	x19, x20, [sp, 16]
-	add	x0, x0, :lo12:.LC137
+	add	x0, x0, :lo12:.LC149
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR97
-	adrp	x19, .LANCHOR5
-	adrp	x20, .LANCHOR80
+	adrp	x22, .LANCHOR100
+	adrp	x19, .LANCHOR6
+	adrp	x20, .LANCHOR83
 	bl	printf
 	adrp	x21, .LANCHOR2
-	adrp	x0, .LANCHOR167
-	add	x1, x0, :lo12:.LANCHOR167
+	adrp	x0, .LANCHOR174
+	add	x1, x0, :lo12:.LANCHOR174
 	ldrh	w3, [x1, 2]
 	ldrb	w2, [x1, 1]
-	ldrb	w1, [x0, #:lo12:.LANCHOR167]
-	adrp	x0, .LC138
-	add	x0, x0, :lo12:.LC138
+	ldrb	w1, [x0, #:lo12:.LANCHOR174]
+	adrp	x0, .LC150
+	add	x0, x0, :lo12:.LC150
 	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR97]
+	ldr	x0, [x22, #:lo12:.LANCHOR100]
 	ldrh	w2, [x0, 140]
 	ldrh	w1, [x0, 130]
-	adrp	x0, .LC139
-	add	x0, x0, :lo12:.LC139
+	adrp	x0, .LC151
+	add	x0, x0, :lo12:.LC151
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR5]
-	adrp	x0, .LC140
-	add	x0, x0, :lo12:.LC140
+	ldr	x1, [x19, #:lo12:.LANCHOR6]
+	adrp	x0, .LC152
+	add	x0, x0, :lo12:.LC152
 	ldrh	w5, [x1, 26]
 	ldrh	w4, [x1, 22]
 	ldrb	w3, [x1, 21]
 	ldrh	w2, [x1, 18]
 	ldrh	w1, [x1, 16]
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR5]
-	adrp	x0, .LC141
-	add	x0, x0, :lo12:.LC141
+	ldr	x1, [x19, #:lo12:.LANCHOR6]
+	adrp	x0, .LC153
+	add	x0, x0, :lo12:.LC153
 	ldrh	w5, [x1, 58]
 	ldrh	w4, [x1, 54]
 	ldrb	w3, [x1, 53]
 	ldrh	w2, [x1, 50]
 	ldrh	w1, [x1, 48]
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR5]
-	adrp	x19, .LANCHOR72
-	adrp	x0, .LC142
-	add	x0, x0, :lo12:.LC142
+	ldr	x1, [x19, #:lo12:.LANCHOR6]
+	adrp	x19, .LANCHOR76
+	adrp	x0, .LC154
+	add	x0, x0, :lo12:.LC154
 	ldrh	w5, [x1, 90]
 	ldrh	w4, [x1, 86]
 	ldrb	w3, [x1, 85]
 	ldrh	w2, [x1, 82]
 	ldrh	w1, [x1, 80]
 	bl	printf
-	ldrb	w0, [x19, #:lo12:.LANCHOR72]
+	ldrb	w0, [x19, #:lo12:.LANCHOR76]
 	mov	w2, 4
-	ldrh	w3, [x20, #:lo12:.LANCHOR80]
+	ldrh	w3, [x20, #:lo12:.LANCHOR83]
 	mul	w3, w3, w0
-	adrp	x0, .LANCHOR109
-	ldr	x1, [x0, #:lo12:.LANCHOR109]
-	adrp	x0, .LC143
+	adrp	x0, .LANCHOR114
+	ldr	x1, [x0, #:lo12:.LANCHOR114]
+	adrp	x0, .LC155
 	lsl	w3, w3, 1
-	add	x0, x0, :lo12:.LC143
+	add	x0, x0, :lo12:.LC155
 	bl	rknand_print_hex
-	adrp	x0, .LANCHOR4
+	adrp	x0, .LANCHOR5
 	ldrh	w3, [x21, #:lo12:.LANCHOR2]
 	mov	w2, 2
-	ldr	x1, [x0, #:lo12:.LANCHOR4]
-	adrp	x0, .LC144
-	add	x0, x0, :lo12:.LC144
+	ldr	x1, [x0, #:lo12:.LANCHOR5]
+	adrp	x0, .LC156
+	add	x0, x0, :lo12:.LC156
 	bl	rknand_print_hex
-	ldr	x1, [x22, #:lo12:.LANCHOR97]
+	ldr	x1, [x22, #:lo12:.LANCHOR100]
 	mov	w2, 4
-	adrp	x0, .LC136
-	add	x0, x0, :lo12:.LC136
+	adrp	x0, .LC148
+	add	x0, x0, :lo12:.LC148
 	add	x1, x1, 704
 	ldrh	w3, [x1, -6]
 	bl	rknand_print_hex
@@ -14956,28 +15437,28 @@ dump_ftl_info:
 	ldrh	w3, [x21, #:lo12:.LANCHOR2]
 	mov	w2, 4
 	ldr	x1, [x0, #:lo12:.LANCHOR3]
-	adrp	x0, .LC145
-	add	x0, x0, :lo12:.LC145
+	adrp	x0, .LC157
+	add	x0, x0, :lo12:.LC157
 	bl	rknand_print_hex
 	mov	w3, 256
 	mov	w2, 2
-	adrp	x1, .LANCHOR108
-	adrp	x0, .LC146
-	add	x1, x1, :lo12:.LANCHOR108
-	add	x0, x0, :lo12:.LC146
+	adrp	x1, .LANCHOR113
+	adrp	x0, .LC158
+	add	x1, x1, :lo12:.LANCHOR113
+	add	x0, x0, :lo12:.LC158
 	bl	rknand_print_hex
-	ldrb	w0, [x19, #:lo12:.LANCHOR72]
+	ldrb	w0, [x19, #:lo12:.LANCHOR76]
 	mov	w2, 2
-	ldrh	w3, [x20, #:lo12:.LANCHOR80]
+	ldrh	w3, [x20, #:lo12:.LANCHOR83]
 	ldp	x21, x22, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	mul	w3, w3, w0
-	adrp	x0, .LANCHOR110
+	adrp	x0, .LANCHOR115
 	ldp	x29, x30, [sp], 48
 	lsl	w3, w3, 1
-	ldr	x1, [x0, #:lo12:.LANCHOR110]
-	adrp	x0, .LC147
-	add	x0, x0, :lo12:.LC147
+	ldr	x1, [x0, #:lo12:.LANCHOR115]
+	adrp	x0, .LC159
+	add	x0, x0, :lo12:.LC159
 	b	rknand_print_hex
 	.size	dump_ftl_info, .-dump_ftl_info
 	.section	.text.pm_ppa_update_check,"ax",@progbits
@@ -14985,17 +15466,17 @@ dump_ftl_info:
 	.global	pm_ppa_update_check
 	.type	pm_ppa_update_check, %function
 pm_ppa_update_check:
-	adrp	x3, .LANCHOR96
+	adrp	x3, .LANCHOR102
 	mov	w4, 21
-	ldrh	w3, [x3, #:lo12:.LANCHOR96]
+	ldrh	w3, [x3, #:lo12:.LANCHOR102]
 	sub	w5, w4, w3
 	mov	w4, 1
 	lsr	w3, w2, w3
 	lsl	w4, w4, w5
 	sub	w4, w4, #1
 	and	w4, w4, w3
-	adrp	x3, .LANCHOR95
-	ldrb	w3, [x3, #:lo12:.LANCHOR95]
+	adrp	x3, .LANCHOR101
+	ldrb	w3, [x3, #:lo12:.LANCHOR101]
 	udiv	w4, w4, w3
 	adrp	x3, .LANCHOR3
 	ldr	x3, [x3, #:lo12:.LANCHOR3]
@@ -15004,20 +15485,20 @@ pm_ppa_update_check:
 	ubfx	x3, x3, 5, 3
 	cmp	w3, 1
 	ccmp	w3, 7, 4, ne
-	bne	.L2421
+	bne	.L2530
 	stp	x29, x30, [sp, -16]!
 	mov	w3, w2
 	mov	w2, w1
 	mov	x1, x0
 	add	x29, sp, 0
-	adrp	x0, .LC148
-	add	x0, x0, :lo12:.LC148
+	adrp	x0, .LC160
+	add	x0, x0, :lo12:.LC160
 	bl	printf
 	bl	dump_ftl_info
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
-.L2421:
+.L2530:
 	mov	w0, 0
 	ret
 	.size	pm_ppa_update_check, .-pm_ppa_update_check
@@ -15033,127 +15514,113 @@ load_l2p_region:
 	and	w19, w0, 65535
 	stp	x23, x24, [sp, 48]
 	cmp	w20, 31
-	bls	.L2427
-	adrp	x1, .LANCHOR187
+	bls	.L2536
+	adrp	x1, .LANCHOR194
 	adrp	x0, .LC0
 	mov	w2, 31
-	add	x1, x1, :lo12:.LANCHOR187
+	add	x1, x1, :lo12:.LANCHOR194
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2427:
-	adrp	x23, .LANCHOR97
-	ldr	x0, [x23, #:lo12:.LANCHOR97]
+.L2536:
+	adrp	x22, .LANCHOR100
+	ldr	x0, [x22, #:lo12:.LANCHOR100]
 	ldrh	w2, [x0, 698]
 	cmp	w2, w19
-	bcs	.L2428
+	bcs	.L2537
 	mov	w1, w19
-	adrp	x0, .LC149
-	add	x0, x0, :lo12:.LC149
+	adrp	x0, .LC161
+	add	x0, x0, :lo12:.LC161
 	bl	printf
-	adrp	x0, .LANCHOR188
+	adrp	x0, .LANCHOR195
 	mov	w1, 255
-	ldrh	w2, [x0, #:lo12:.LANCHOR188]
+	ldrh	w2, [x0, #:lo12:.LANCHOR195]
 	mov	x0, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	ldr	x0, [x23, #:lo12:.LANCHOR97]
+	ldr	x0, [x22, #:lo12:.LANCHOR100]
 	ldrh	w0, [x0, 698]
 	cmp	w0, w19
-	bcs	.L2430
+	bcs	.L2539
 	mov	w2, 35
-.L2435:
-	adrp	x1, .LANCHOR187
+.L2544:
+	adrp	x1, .LANCHOR194
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR187
+	add	x1, x1, :lo12:.LANCHOR194
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L2430
-.L2428:
+	b	.L2539
+.L2537:
 	add	x0, x0, x19, sxtw 2
 	sbfiz	x20, x20, 4, 32
 	ldr	w21, [x0, 704]
-	adrp	x0, .LANCHOR123
-	add	x0, x0, :lo12:.LANCHOR123
-	add	x22, x0, x20
+	adrp	x0, .LANCHOR129
+	add	x0, x0, :lo12:.LANCHOR129
+	add	x23, x0, x20
 	strh	w19, [x0, x20]
-	strh	wzr, [x22, 2]
-	cbnz	w21, .L2431
+	strh	wzr, [x23, 2]
+	cbnz	w21, .L2540
 	mov	w2, 0
 	mov	w1, w19
-	adrp	x0, .LC150
-	add	x0, x0, :lo12:.LC150
+	adrp	x0, .LC162
+	add	x0, x0, :lo12:.LC162
 	bl	printf
-	adrp	x0, .LANCHOR188
+	adrp	x0, .LANCHOR195
 	mov	w1, 255
-	ldrh	w2, [x0, #:lo12:.LANCHOR188]
-	ldr	x0, [x22, 8]
+	ldrh	w2, [x0, #:lo12:.LANCHOR195]
+	ldr	x0, [x23, 8]
 	bl	ftl_memset
-.L2430:
+.L2539:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2431:
-	adrp	x20, .LANCHOR179
-	adrp	x24, .LANCHOR117
-	ldr	x1, [x22, 8]
+.L2540:
+	adrp	x20, .LANCHOR186
+	adrp	x24, .LANCHOR123
+	ldr	x1, [x23, 8]
 	mov	w0, w21
-	ldr	x2, [x20, #:lo12:.LANCHOR179]
-	ldrb	w3, [x24, #:lo12:.LANCHOR117]
+	ldr	x2, [x20, #:lo12:.LANCHOR186]
+	ldrb	w3, [x24, #:lo12:.LANCHOR123]
 	bl	ftl_read_ppa_page
-	ldr	x1, [x20, #:lo12:.LANCHOR179]
+	ldr	x1, [x20, #:lo12:.LANCHOR186]
 	ldr	w2, [x1]
 	cmp	w2, w19
-	beq	.L2432
+	beq	.L2541
 	mov	w4, w21
 	mov	w3, w0
 	mov	w1, w19
-	adrp	x0, .LC151
-	add	x0, x0, :lo12:.LC151
+	adrp	x0, .LC163
+	add	x0, x0, :lo12:.LC163
 	bl	printf
-	ldr	x1, [x23, #:lo12:.LANCHOR97]
+	ldr	x1, [x22, #:lo12:.LANCHOR100]
 	mov	w2, 4
-	adrp	x0, .LC152
-	add	x0, x0, :lo12:.LC152
+	adrp	x0, .LC164
+	add	x0, x0, :lo12:.LC164
 	add	x1, x1, 704
 	ldrh	w3, [x1, -6]
 	bl	rknand_print_hex
-	ldr	x1, [x22, 8]
+	ldr	x1, [x23, 8]
 	mov	w2, 4
-	ldrb	w3, [x24, #:lo12:.LANCHOR117]
-	adrp	x0, .LC153
-	add	x0, x0, :lo12:.LC153
+	ldrb	w3, [x24, #:lo12:.LANCHOR123]
+	adrp	x0, .LC165
+	add	x0, x0, :lo12:.LC165
 	lsl	w3, w3, 7
 	bl	rknand_print_hex
-	ldr	x1, [x20, #:lo12:.LANCHOR179]
-	mov	w2, 4
+	ldr	x1, [x20, #:lo12:.LANCHOR186]
+	adrp	x0, .LC166
 	mov	w3, 16
-	adrp	x0, .LC154
-	add	x0, x0, :lo12:.LC154
+	mov	w2, 4
+	add	x0, x0, :lo12:.LC166
 	bl	rknand_print_hex
-	adrp	x0, .LANCHOR96
-	ldrh	w2, [x0, #:lo12:.LANCHOR96]
-	mov	w0, 21
-	sub	w1, w0, w2
-	mov	w0, 1
-	lsr	w21, w21, w2
-	lsl	w0, w0, w1
-	adrp	x1, .LANCHOR95
-	sub	w0, w0, #1
-	ldrb	w2, [x1, #:lo12:.LANCHOR95]
-	and	w0, w0, w21
-	mov	x1, 0
-	udiv	w0, w0, w2
-	bl	ftl_sblk_dump
-.L2432:
-	ldr	x0, [x20, #:lo12:.LANCHOR179]
+.L2541:
+	ldr	x0, [x20, #:lo12:.LANCHOR186]
 	ldr	w0, [x0]
 	cmp	w19, w0
-	beq	.L2430
-	mov	w2, 57
-	b	.L2435
+	beq	.L2539
+	mov	w2, 59
+	b	.L2544
 	.size	load_l2p_region, .-load_l2p_region
 	.section	.text.pm_gc,"ax",@progbits
 	.align	2
@@ -15163,73 +15630,73 @@ pm_gc:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR97
-	adrp	x19, .LANCHOR134
+	adrp	x20, .LANCHOR100
+	adrp	x19, .LANCHOR140
 	stp	x21, x22, [sp, 32]
-	ldr	x0, [x20, #:lo12:.LANCHOR97]
+	ldr	x0, [x20, #:lo12:.LANCHOR100]
 	stp	x23, x24, [sp, 48]
 	ldrh	w1, [x0, 688]
-	ldrh	w0, [x19, #:lo12:.LANCHOR134]
+	ldrh	w0, [x19, #:lo12:.LANCHOR140]
 	str	x25, [sp, 64]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L2438
+	blt	.L2547
 	bl	pm_free_sblk
-	ldr	x2, [x20, #:lo12:.LANCHOR97]
-	ldrh	w1, [x19, #:lo12:.LANCHOR134]
+	ldr	x2, [x20, #:lo12:.LANCHOR100]
+	ldrh	w1, [x19, #:lo12:.LANCHOR140]
 	sub	w1, w1, #1
 	ldrh	w3, [x2, 688]
 	cmp	w3, w1
-	blt	.L2438
+	blt	.L2547
 	add	x0, x2, x0, uxth 1
 	ldrh	w21, [x0, 416]
 	mov	w0, 65535
 	cmp	w21, w0
-	bne	.L2440
-	adrp	x1, .LANCHOR189
-	add	x1, x1, :lo12:.LANCHOR189
-	mov	w2, 129
+	bne	.L2549
+	adrp	x1, .LANCHOR196
+	add	x1, x1, :lo12:.LANCHOR196
+	mov	w2, 131
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	bl	pm_free_sblk
-	ldr	x1, [x20, #:lo12:.LANCHOR97]
+	ldr	x1, [x20, #:lo12:.LANCHOR100]
 	add	x0, x1, x0, uxth 1
 	ldrh	w21, [x0, 416]
-.L2440:
+.L2549:
 	bl	pm_select_ram_region
 	and	x24, x0, 65535
-	adrp	x1, .LANCHOR123
+	adrp	x1, .LANCHOR129
 	lsl	x0, x24, 4
-	add	x2, x1, :lo12:.LANCHOR123
+	add	x2, x1, :lo12:.LANCHOR129
 	mov	x22, x24
 	add	x19, x2, x0
 	mov	x23, x1
 	ldrh	w0, [x2, x0]
 	mov	w2, 65535
 	cmp	w0, w2
-	beq	.L2441
+	beq	.L2550
 	ldr	x1, [x19, 8]
-	cbz	x1, .L2441
+	cbz	x1, .L2550
 	ldrsh	w2, [x19, 2]
-	tbz	w2, #31, .L2441
+	tbz	w2, #31, .L2550
 	bl	pm_write_page
 	ldrh	w0, [x19, 2]
 	and	w0, w0, 32767
 	strh	w0, [x19, 2]
-.L2441:
-	add	x1, x23, :lo12:.LANCHOR123
-	adrp	x25, .LANCHOR96
+.L2550:
+	add	x1, x23, :lo12:.LANCHOR129
+	adrp	x25, .LANCHOR102
 	add	x24, x1, x24, lsl 4
-	add	x25, x25, :lo12:.LANCHOR96
+	add	x25, x25, :lo12:.LANCHOR102
 	mov	w19, 0
-.L2442:
-	ldr	x1, [x20, #:lo12:.LANCHOR97]
+.L2551:
+	ldr	x1, [x20, #:lo12:.LANCHOR100]
 	ldrh	w0, [x1, 698]
 	cmp	w0, w19
-	bhi	.L2444
+	bhi	.L2553
 	bl	pm_free_sblk
-.L2438:
+.L2547:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -15237,7 +15704,7 @@ pm_gc:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2444:
+.L2553:
 	add	x1, x1, x19, sxtw 2
 	ldrh	w3, [x25]
 	mov	w0, 21
@@ -15248,11 +15715,11 @@ pm_gc:
 	sub	w0, w0, #1
 	lsr	w1, w1, w3
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR95
-	ldrb	w1, [x1, #:lo12:.LANCHOR95]
+	adrp	x1, .LANCHOR101
+	ldrb	w1, [x1, #:lo12:.LANCHOR101]
 	udiv	w0, w0, w1
 	cmp	w21, w0, uxth
-	bne	.L2443
+	bne	.L2552
 	mov	w1, w22
 	mov	w0, w19
 	bl	load_l2p_region
@@ -15261,10 +15728,10 @@ pm_gc:
 	bl	pm_write_page
 	mov	w0, -1
 	strh	w0, [x24]
-.L2443:
+.L2552:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L2442
+	b	.L2551
 	.size	pm_gc, .-pm_gc
 	.section	.text.pm_flush_id,"ax",@progbits
 	.align	2
@@ -15273,8 +15740,8 @@ pm_gc:
 pm_flush_id:
 	stp	x29, x30, [sp, -32]!
 	ubfiz	x0, x0, 4, 16
-	adrp	x2, .LANCHOR123
-	add	x2, x2, :lo12:.LANCHOR123
+	adrp	x2, .LANCHOR129
+	add	x2, x2, :lo12:.LANCHOR129
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	add	x19, x2, x0
@@ -15284,12 +15751,12 @@ pm_flush_id:
 	ldrh	w0, [x19, 2]
 	and	w0, w0, 32767
 	strh	w0, [x19, 2]
-	adrp	x19, .LANCHOR121
-	ldr	w0, [x19, #:lo12:.LANCHOR121]
-	cbz	w0, .L2450
+	adrp	x19, .LANCHOR127
+	ldr	w0, [x19, #:lo12:.LANCHOR127]
+	cbz	w0, .L2559
 	bl	pm_gc
-	str	wzr, [x19, #:lo12:.LANCHOR121]
-.L2450:
+	str	wzr, [x19, #:lo12:.LANCHOR127]
+.L2559:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -15303,21 +15770,21 @@ pm_flush:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR123
-	add	x19, x19, :lo12:.LANCHOR123
+	adrp	x19, .LANCHOR129
+	add	x19, x19, :lo12:.LANCHOR129
 	mov	w20, 0
 	add	x19, x19, 2
-.L2457:
+.L2566:
 	ldrsh	w0, [x19]
-	tbz	w0, #31, .L2456
+	tbz	w0, #31, .L2565
 	mov	w0, w20
 	bl	pm_flush_id
-.L2456:
+.L2565:
 	add	w20, w20, 1
 	add	x19, x19, 16
 	and	w20, w20, 65535
 	cmp	w20, 32
-	bne	.L2457
+	bne	.L2566
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -15366,74 +15833,74 @@ pm_init:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	mov	w24, w0
-	adrp	x0, .LANCHOR121
+	adrp	x0, .LANCHOR127
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	adrp	x20, .LANCHOR123
-	str	wzr, [x0, #:lo12:.LANCHOR121]
-	adrp	x0, .LANCHOR180
+	adrp	x20, .LANCHOR129
+	str	wzr, [x0, #:lo12:.LANCHOR127]
+	adrp	x0, .LANCHOR187
 	stp	x25, x26, [sp, 64]
-	add	x19, x20, :lo12:.LANCHOR123
-	strb	w1, [x0, #:lo12:.LANCHOR180]
+	add	x19, x20, :lo12:.LANCHOR129
+	strb	w1, [x0, #:lo12:.LANCHOR187]
 	mov	w0, 64
 	stp	x27, x28, [sp, 80]
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR179
-	adrp	x22, .LANCHOR117
+	adrp	x1, .LANCHOR186
+	adrp	x22, .LANCHOR123
 	add	x23, x19, 512
 	mov	x21, x1
-	add	x22, x22, :lo12:.LANCHOR117
-	str	x0, [x1, #:lo12:.LANCHOR179]
+	add	x22, x22, :lo12:.LANCHOR123
+	str	x0, [x1, #:lo12:.LANCHOR186]
 	mov	w25, -1
-.L2467:
+.L2576:
 	strh	w25, [x19]
 	strh	wzr, [x19, 2]
-	cbz	w24, .L2466
+	cbz	w24, .L2575
 	ldrb	w0, [x22]
 	lsl	w0, w0, 9
 	bl	ftl_malloc
 	str	x0, [x19, 8]
-.L2466:
+.L2575:
 	add	x19, x19, 16
 	cmp	x19, x23
-	bne	.L2467
-	add	x0, x20, :lo12:.LANCHOR123
-	adrp	x19, .LANCHOR97
-	ldr	x24, [x21, #:lo12:.LANCHOR179]
+	bne	.L2576
+	add	x0, x20, :lo12:.LANCHOR129
+	adrp	x19, .LANCHOR100
+	ldr	x24, [x21, #:lo12:.LANCHOR186]
 	mov	w4, 4
 	ldr	x25, [x0, 8]
 	mov	x3, x24
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	mov	x2, x25
 	ldrh	w1, [x0, 692]
 	ldrb	w0, [x0, 694]
 	bl	flash_get_last_written_page
 	sxth	w26, w0
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	mov	w23, w26
 	ldrh	w2, [x0, 696]
 	cmp	w2, w26
-	bgt	.L2468
+	bgt	.L2577
 	ldrh	w1, [x0, 692]
 	mov	w3, w26
-	adrp	x0, .LC155
-	add	x0, x0, :lo12:.LC155
-	adrp	x27, .LANCHOR103
-	adrp	x28, .LANCHOR117
-	add	x27, x27, :lo12:.LANCHOR103
-	add	x28, x28, :lo12:.LANCHOR117
+	adrp	x0, .LC167
+	add	x0, x0, :lo12:.LC167
+	adrp	x27, .LANCHOR108
+	adrp	x28, .LANCHOR123
+	add	x27, x27, :lo12:.LANCHOR108
+	add	x28, x28, :lo12:.LANCHOR123
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	ldrsh	w21, [x0, 696]
-.L2469:
+.L2578:
 	cmp	w21, w26
-	ble	.L2471
-	adrp	x0, .LANCHOR170
+	ble	.L2580
+	adrp	x0, .LANCHOR177
 	mov	w1, 1
-	add	x20, x20, :lo12:.LANCHOR123
+	add	x20, x20, :lo12:.LANCHOR129
 	add	w23, w23, 1
-	strb	w1, [x0, #:lo12:.LANCHOR170]
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	strb	w1, [x0, #:lo12:.LANCHOR177]
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	strh	w23, [x0, 696]
 	bl	pm_free_sblk
 	ldr	x1, [x20, 8]
@@ -15442,7 +15909,7 @@ pm_init:
 	ldr	x1, [x20, 8]
 	mov	w0, -1
 	bl	pm_write_page
-.L2468:
+.L2577:
 	bl	pm_free_sblk
 	bl	pm_gc
 	mov	w0, 0
@@ -15453,8 +15920,8 @@ pm_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2471:
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+.L2580:
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	mov	x3, x24
 	ldrh	w1, [x27]
 	mov	x2, x25
@@ -15465,32 +15932,32 @@ pm_init:
 	mov	w1, w22
 	bl	flash_read_page_en
 	mov	w4, w0
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	str	w4, [x29, 108]
 	mov	w2, w22
 	ldr	w1, [x0, 48]
 	ldrh	w3, [x0, 694]
 	add	w1, w1, 1
 	str	w1, [x0, 48]
-	adrp	x0, .LC156
-	add	x0, x0, :lo12:.LC156
+	adrp	x0, .LC168
+	add	x0, x0, :lo12:.LC168
 	ldr	w1, [x24]
 	bl	printf
 	ldr	w4, [x29, 108]
 	cmp	w4, 512
 	ccmn	w4, #1, 4, ne
-	beq	.L2470
-	ldr	x1, [x19, #:lo12:.LANCHOR97]
+	beq	.L2579
+	ldr	x1, [x19, #:lo12:.LANCHOR100]
 	ldr	w0, [x24]
 	ldrh	w2, [x1, 698]
 	cmp	w0, w2
-	bcs	.L2470
+	bcs	.L2579
 	add	x0, x1, x0, uxtw 2
 	str	w22, [x0, 704]
-.L2470:
+.L2579:
 	add	w21, w21, 1
 	sxth	w21, w21
-	b	.L2469
+	b	.L2578
 	.size	pm_init, .-pm_init
 	.section	.text.pm_log2phys,"ax",@progbits
 	.align	2
@@ -15501,66 +15968,66 @@ pm_log2phys:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	mov	x22, x1
-	adrp	x1, .LANCHOR117
+	adrp	x1, .LANCHOR123
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
-	ldrb	w1, [x1, #:lo12:.LANCHOR117]
+	ldrb	w1, [x1, #:lo12:.LANCHOR123]
 	stp	x23, x24, [sp, 48]
 	mov	w23, w2
 	lsl	w21, w1, 7
 	ubfiz	w20, w1, 7, 9
-	adrp	x1, .LANCHOR54
+	adrp	x1, .LANCHOR56
 	udiv	w21, w0, w21
-	ldr	w2, [x1, #:lo12:.LANCHOR54]
+	ldr	w2, [x1, #:lo12:.LANCHOR56]
 	cmp	w0, w2
 	and	w25, w21, 65535
 	msub	w20, w25, w20, w0
-	bcc	.L2481
+	bcc	.L2590
 	mov	w1, w0
-	adrp	x0, .LC157
-	add	x0, x0, :lo12:.LC157
+	adrp	x0, .LC169
+	add	x0, x0, :lo12:.LC169
 	bl	printf
 	mov	w0, -1
-.L2480:
+.L2589:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2481:
-	adrp	x24, .LANCHOR123
-	add	x0, x24, :lo12:.LANCHOR123
+.L2590:
+	adrp	x24, .LANCHOR129
+	add	x0, x24, :lo12:.LANCHOR129
 	and	x20, x20, 65535
 	add	x0, x0, 8
 	mov	x19, 0
-.L2487:
+.L2596:
 	ldr	x1, [x0]
-	cbz	x1, .L2483
+	cbz	x1, .L2592
 	ldrh	w1, [x0, -8]
 	cmp	w1, w25
-	bne	.L2483
-.L2484:
-	cbnz	w23, .L2485
-	add	x0, x24, :lo12:.LANCHOR123
+	bne	.L2592
+.L2593:
+	cbnz	w23, .L2594
+	add	x0, x24, :lo12:.LANCHOR129
 	add	x0, x0, x19, lsl 4
 	ldr	x0, [x0, 8]
 	ldr	w0, [x0, x20, lsl 2]
 	str	w0, [x22]
-.L2486:
-	add	x24, x24, :lo12:.LANCHOR123
+.L2595:
+	add	x24, x24, :lo12:.LANCHOR129
 	add	x19, x24, x19, lsl 4
 	ldrh	w0, [x19, 2]
 	mvn	x1, x0
 	tst	x1, 32767
-	beq	.L2489
+	beq	.L2598
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L2489:
+.L2598:
 	mov	w0, 0
-	b	.L2480
-.L2485:
-	add	x0, x24, :lo12:.LANCHOR123
+	b	.L2589
+.L2594:
+	add	x0, x24, :lo12:.LANCHOR129
 	ldr	w2, [x22]
 	add	x0, x0, x19, lsl 4
 	ldr	x1, [x0, 8]
@@ -15568,35 +16035,35 @@ pm_log2phys:
 	ldrh	w1, [x0, 2]
 	orr	w1, w1, -32768
 	strh	w1, [x0, 2]
-	adrp	x0, .LANCHOR124
-	strb	w21, [x0, #:lo12:.LANCHOR124]
-	b	.L2486
-.L2483:
+	adrp	x0, .LANCHOR130
+	strb	w21, [x0, #:lo12:.LANCHOR130]
+	b	.L2595
+.L2592:
 	add	w19, w19, 1
 	add	x0, x0, 16
 	and	x19, x19, 65535
 	cmp	w19, 32
-	bne	.L2487
+	bne	.L2596
 	bl	pm_select_ram_region
 	and	x19, x0, 65535
 	sbfiz	x1, x19, 4, 32
-	add	x2, x24, :lo12:.LANCHOR123
+	add	x2, x24, :lo12:.LANCHOR129
 	add	x3, x2, x1
 	mov	w26, w0
 	ldrh	w2, [x2, x1]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L2488
+	beq	.L2597
 	ldrsh	w1, [x3, 2]
-	tbz	w1, #31, .L2488
+	tbz	w1, #31, .L2597
 	bl	pm_flush_id
-.L2488:
-	adrp	x0, .LANCHOR190
+.L2597:
+	adrp	x0, .LANCHOR197
 	mov	w1, w26
-	strb	w19, [x0, #:lo12:.LANCHOR190]
+	strb	w19, [x0, #:lo12:.LANCHOR197]
 	mov	w0, w25
 	bl	load_l2p_region
-	b	.L2484
+	b	.L2593
 	.size	pm_log2phys, .-pm_log2phys
 	.section	.text.ftl_read_ahead,"ax",@progbits
 	.align	2
@@ -15606,101 +16073,98 @@ ftl_read_ahead:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR56
+	adrp	x20, .LANCHOR58
 	stp	x21, x22, [sp, 32]
-	ldr	w0, [x20, #:lo12:.LANCHOR56]
+	ldr	w0, [x20, #:lo12:.LANCHOR58]
 	stp	x23, x24, [sp, 48]
 	cmn	w0, #1
-	beq	.L2504
+	beq	.L2613
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x19, x0
 	mov	w0, -1
-	cbz	x19, .L2495
-	ldr	w21, [x20, #:lo12:.LANCHOR56]
+	cbz	x19, .L2604
+	ldr	w21, [x20, #:lo12:.LANCHOR58]
 	str	w21, [x19, 36]
-	str	w0, [x20, #:lo12:.LANCHOR56]
+	str	w0, [x20, #:lo12:.LANCHOR58]
 	mov	w0, w21
 	ldr	x20, [x19, 8]
 	ldr	x22, [x19, 24]
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 76]
 	cmn	w0, #1
-	bne	.L2498
+	bne	.L2607
 	mov	w2, 0
 	add	x1, x29, 76
 	mov	w0, w21
 	bl	pm_log2phys
-.L2498:
+.L2607:
 	ldr	w0, [x29, 76]
 	stp	w0, w0, [x19, 40]
 	cmn	w0, #1
-	bne	.L2499
-	adrp	x0, .LANCHOR117
+	bne	.L2608
+	adrp	x0, .LANCHOR123
 	mov	w1, 0
-	ldrb	w2, [x0, #:lo12:.LANCHOR117]
+	ldrb	w2, [x0, #:lo12:.LANCHOR123]
 	mov	x0, x20
 	lsl	w2, w2, 9
 	bl	ftl_memset
 	ldrb	w0, [x19, 2]
 	orr	w0, w0, 8
 	strb	w0, [x19, 2]
-.L2504:
+.L2613:
 	mov	w0, 0
-.L2495:
+.L2604:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2499:
+.L2608:
 	mov	w1, 1
 	mov	x0, x19
 	bl	sblk_read_page
 	ldr	w23, [x19, 52]
 	cmn	w23, #1
-	bne	.L2500
-	ldrb	w0, [x19, 2]
-	and	w0, w0, -9
-	strb	w0, [x19, 2]
-	adrp	x0, .LANCHOR5
-	ldr	x1, [x0, #:lo12:.LANCHOR5]
+	bne	.L2609
+	adrp	x0, .LANCHOR6
+	ldr	x1, [x0, #:lo12:.LANCHOR6]
 	ldr	w0, [x1, 552]
 	add	w0, w0, 1
 	str	w0, [x1, 552]
-.L2501:
+.L2610:
 	ldr	w5, [x22, 4]
 	cmp	w21, w5
-	beq	.L2502
+	beq	.L2611
 	ldrb	w1, [x19, 1]
-	adrp	x0, .LC159
+	adrp	x0, .LC171
 	ldr	w4, [x22]
 	mov	w2, w21
 	ldp	w6, w7, [x22, 8]
-	add	x0, x0, :lo12:.LC159
+	add	x0, x0, :lo12:.LC171
 	ldr	w3, [x29, 76]
 	bl	printf
-.L2502:
+.L2611:
 	ldr	w0, [x22, 4]
 	cmp	w21, w0
-	bne	.L2503
+	bne	.L2612
 	cmn	w23, #1
-	bne	.L2504
-.L2503:
-	mov	w2, 875
-	adrp	x1, .LANCHOR191
+	bne	.L2613
+.L2612:
+	mov	w2, 892
+	adrp	x1, .LANCHOR198
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR191
+	add	x1, x1, :lo12:.LANCHOR198
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L2504
-.L2500:
+	b	.L2613
+.L2609:
 	cmp	w23, 256
-	bne	.L2501
-	adrp	x0, .LANCHOR96
+	bne	.L2610
+	adrp	x0, .LANCHOR102
 	mov	w20, 21
 	mov	w24, 1
-	ldrh	w1, [x0, #:lo12:.LANCHOR96]
+	ldrh	w1, [x0, #:lo12:.LANCHOR102]
 	ldr	w0, [x29, 76]
 	sub	w20, w20, w1
 	ldp	w2, w3, [x19, 36]
@@ -15708,18 +16172,18 @@ ftl_read_ahead:
 	lsl	w20, w24, w20
 	sub	w20, w20, #1
 	and	w20, w20, w0
-	adrp	x0, .LANCHOR95
-	ldrb	w0, [x0, #:lo12:.LANCHOR95]
+	adrp	x0, .LANCHOR101
+	ldrb	w0, [x0, #:lo12:.LANCHOR101]
 	udiv	w20, w20, w0
-	adrp	x0, .LC158
-	add	x0, x0, :lo12:.LC158
+	adrp	x0, .LC170
+	add	x0, x0, :lo12:.LC170
 	and	w1, w20, 65535
 	bl	printf
 	mov	w2, 0
 	mov	w1, w24
 	mov	w0, w20
 	bl	gc_add_sblk
-	b	.L2501
+	b	.L2610
 	.size	ftl_read_ahead, .-ftl_read_ahead
 	.section	.text.gc_recovery,"ax",@progbits
 	.align	2
@@ -15727,73 +16191,73 @@ ftl_read_ahead:
 	.type	gc_recovery, %function
 gc_recovery:
 	sub	sp, sp, #240
-	adrp	x0, .LANCHOR70
+	adrp	x0, .LANCHOR74
 	stp	x29, x30, [sp, 32]
 	add	x29, sp, 32
 	stp	x21, x22, [sp, 64]
-	adrp	x21, .LANCHOR5
+	adrp	x21, .LANCHOR6
 	stp	x19, x20, [sp, 48]
-	ldr	x20, [x21, #:lo12:.LANCHOR5]
-	strb	wzr, [x0, #:lo12:.LANCHOR70]
-	adrp	x0, .LANCHOR138
+	ldr	x20, [x21, #:lo12:.LANCHOR6]
+	strb	wzr, [x0, #:lo12:.LANCHOR74]
+	adrp	x0, .LANCHOR144
 	stp	x23, x24, [sp, 80]
-	strb	wzr, [x0, #:lo12:.LANCHOR138]
+	strb	wzr, [x0, #:lo12:.LANCHOR144]
 	stp	x25, x26, [sp, 96]
 	stp	x27, x28, [sp, 112]
 	bl	gc_init
 	add	x0, x20, 80
 	ldrh	w1, [x20, 80]
-	str	x0, [x29, 168]
+	str	x0, [x29, 176]
 	mov	w0, 65535
 	cmp	w1, w0
-	ldr	x0, [x21, #:lo12:.LANCHOR5]
-	beq	.L2509
+	ldr	x0, [x21, #:lo12:.LANCHOR6]
+	beq	.L2618
 	mov	w1, -1
 	strh	w1, [x0, 130]
 	mov	w0, 1
 	bl	buf_alloc
-	mov	x27, x0
+	mov	x25, x0
 	ldrb	w0, [x20, 89]
 	add	x1, x20, 80
-	adrp	x3, .LANCHOR103
-	adrp	x2, .LANCHOR67
+	adrp	x3, .LANCHOR108
+	adrp	x2, .LANCHOR71
 	sub	w0, w0, #1
-	str	x3, [x29, 128]
+	str	x3, [x29, 152]
 	add	x0, x1, x0, sxtw 1
-	ldrh	w1, [x3, #:lo12:.LANCHOR103]
-	str	x2, [x29, 160]
+	ldrh	w1, [x3, #:lo12:.LANCHOR108]
+	str	x2, [x29, 168]
 	ldrh	w0, [x0, 16]
 	mul	w1, w0, w1
-	ldrb	w0, [x2, #:lo12:.LANCHOR67]
+	ldrb	w0, [x2, #:lo12:.LANCHOR71]
 	str	w1, [x29, 200]
 	cmp	w0, 3
-	bne	.L2510
-	adrp	x0, .LANCHOR80
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	bne	.L2619
+	adrp	x0, .LANCHOR83
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
 	sub	w0, w0, #1
 	add	w0, w0, w1
 	orr	w0, w0, 50331648
-.L2557:
-	str	w0, [x27, 40]
-.L2511:
+.L2663:
+	str	w0, [x25, 40]
+.L2620:
 	mov	w1, 1
-	mov	x0, x27
+	mov	x0, x25
 	bl	sblk_read_page
-	ldr	w0, [x27, 52]
+	ldr	w0, [x25, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2512
-	ldr	x0, [x27, 24]
+	beq	.L2621
+	ldr	x0, [x25, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L2513
-.L2512:
-	mov	x0, x27
+	beq	.L2622
+.L2621:
+	mov	x0, x25
 	bl	buf_free
-	ldr	x1, [x27, 24]
-	ldr	x0, [x27, 8]
+	ldr	x1, [x25, 24]
+	ldr	x0, [x25, 8]
 	ldr	w2, [x1, 12]
 	str	w2, [sp, 16]
 	ldr	w2, [x1, 8]
@@ -15802,47 +16266,47 @@ gc_recovery:
 	str	w2, [sp]
 	ldp	w3, w4, [x0]
 	ldp	w5, w6, [x0, 8]
-	adrp	x0, .LC160
+	adrp	x0, .LC172
 	ldr	w7, [x1]
-	add	x0, x0, :lo12:.LC160
-	ldr	w1, [x27, 40]
-	ldr	w2, [x27, 52]
+	add	x0, x0, :lo12:.LC172
+	ldr	w1, [x25, 40]
+	ldr	w2, [x25, 52]
 	bl	printf
-.L2561:
-	adrp	x0, .LANCHOR4
+.L2667:
+	adrp	x0, .LANCHOR5
 	ldrh	w1, [x20, 80]
-	mov	w22, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR4]
+	mov	w28, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	strh	wzr, [x0, x1, lsl 1]
-	ldr	x0, [x21, #:lo12:.LANCHOR5]
+	ldr	x0, [x21, #:lo12:.LANCHOR6]
 	ldrh	w1, [x20, 80]
 	strh	w1, [x0, 130]
-.L2514:
+.L2623:
 	ldrh	w1, [x20, 80]
-	mov	w2, w22
-	adrp	x0, .LC163
-	add	x0, x0, :lo12:.LC163
+	mov	w2, w28
+	adrp	x0, .LC174
+	add	x0, x0, :lo12:.LC174
 	bl	printf
 	mov	w0, -1
 	strh	w0, [x20, 80]
 	bl	pm_flush
 	bl	ftl_ext_info_flush
-	ldr	x0, [x21, #:lo12:.LANCHOR5]
+	ldr	x0, [x21, #:lo12:.LANCHOR6]
 	mov	w1, 65535
 	ldrh	w0, [x0, 130]
 	cmp	w0, w1
-	beq	.L2543
+	beq	.L2650
 	bl	ftl_free_sblk
-.L2543:
-	adrp	x0, .LANCHOR97
-	ldr	x1, [x0, #:lo12:.LANCHOR97]
+.L2650:
+	adrp	x0, .LANCHOR100
+	ldr	x1, [x0, #:lo12:.LANCHOR100]
 	mov	w0, -1
 	strh	w0, [x1, 126]
-	ldr	x1, [x21, #:lo12:.LANCHOR5]
+	ldr	x1, [x21, #:lo12:.LANCHOR6]
 	strh	w0, [x1, 130]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2508:
+.L2617:
 	ldp	x19, x20, [sp, 48]
 	ldp	x21, x22, [sp, 64]
 	ldp	x23, x24, [sp, 80]
@@ -15851,327 +16315,319 @@ gc_recovery:
 	ldp	x29, x30, [sp, 32]
 	add	sp, sp, 240
 	ret
-.L2510:
+.L2619:
 	cmp	w0, 2
-	bne	.L2511
-	adrp	x0, .LANCHOR80
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	bne	.L2620
+	adrp	x0, .LANCHOR83
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
 	add	w0, w1, w0, lsl 1
 	sub	w0, w0, #1
 	orr	w0, w0, 33554432
-	b	.L2557
-.L2513:
-	adrp	x26, .LANCHOR71
-	adrp	x19, .LANCHOR72
-	adrp	x22, .LANCHOR139
-	ldr	x1, [x27, 8]
-	ldrb	w0, [x19, #:lo12:.LANCHOR72]
-	ldrh	w2, [x26, #:lo12:.LANCHOR71]
+	b	.L2663
+.L2622:
+	adrp	x19, .LANCHOR75
+	adrp	x22, .LANCHOR76
+	adrp	x23, .LANCHOR146
+	ldr	x1, [x25, 8]
+	ldrb	w0, [x22, #:lo12:.LANCHOR76]
+	adrp	x24, .LANCHOR147
+	ldrh	w2, [x19, #:lo12:.LANCHOR75]
 	mul	w2, w2, w0
-	ldr	x0, [x22, #:lo12:.LANCHOR139]
+	ldr	x0, [x23, #:lo12:.LANCHOR146]
 	lsl	w2, w2, 2
 	bl	ftl_memcpy
-	ldrb	w1, [x19, #:lo12:.LANCHOR72]
-	adrp	x19, .LANCHOR140
-	ldrh	w0, [x26, #:lo12:.LANCHOR71]
+	ldrb	w1, [x22, #:lo12:.LANCHOR76]
+	ldrh	w0, [x19, #:lo12:.LANCHOR75]
 	mul	w0, w0, w1
-	ldr	x1, [x27, 8]
+	ldr	x1, [x25, 8]
 	lsl	w2, w0, 2
 	add	x1, x1, x0, sxtw 2
-	ldr	x0, [x19, #:lo12:.LANCHOR140]
+	ldr	x0, [x24, #:lo12:.LANCHOR147]
 	bl	ftl_memcpy
-	str	x26, [x29, 120]
-	adrp	x0, .LANCHOR80
-	stp	x19, x22, [x29, 144]
-	ldrh	w24, [x0, #:lo12:.LANCHOR80]
-	ldr	x0, [x29, 160]
-	ldrb	w0, [x0, #:lo12:.LANCHOR67]
+	str	x19, [x29, 144]
+	adrp	x0, .LANCHOR83
+	ldrh	w14, [x0, #:lo12:.LANCHOR83]
+	ldr	x0, [x29, 168]
+	ldrb	w0, [x0, #:lo12:.LANCHOR71]
 	cmp	w0, 2
-	beq	.L2515
-.L2558:
-	str	w0, [x29, 180]
-	adrp	x23, .LC161
-	ldr	x0, [x29, 128]
-	add	x23, x23, :lo12:.LC161
-	mov	w26, 0
-	mov	w22, 0
-	add	x0, x0, :lo12:.LANCHOR103
-	str	x0, [x29, 104]
-.L2517:
-	sub	w0, w26, #1
+	beq	.L2624
+.L2664:
 	str	w0, [x29, 184]
-	cmp	w26, w24
-	beq	.L2526
-	mov	x19, 0
-	b	.L2527
-.L2515:
-	lsl	w24, w24, 1
+	adrp	x26, .LC173
+	ldr	x0, [x29, 152]
+	mov	w22, 0
+	mov	w28, 0
+	add	x0, x0, :lo12:.LANCHOR108
+	str	x0, [x29, 128]
+	add	x0, x26, :lo12:.LC173
+	str	x0, [x29, 120]
+.L2626:
+	sub	w0, w22, #1
+	str	w0, [x29, 188]
+	cmp	w22, w14
+	beq	.L2635
+	mov	x27, 0
+	b	.L2636
+.L2624:
+	lsl	w14, w14, 1
 	mov	w0, 1
-	b	.L2558
-.L2523:
-	ldr	x1, [x29, 104]
-	ldr	x0, [x29, 136]
+	b	.L2664
+.L2632:
+	ldr	x1, [x29, 128]
+	ldr	x0, [x29, 160]
 	ldrh	w1, [x1]
 	ldrh	w0, [x0, 96]
 	mul	w0, w0, w1
-	ldr	x1, [x29, 112]
+	ldr	x1, [x29, 136]
 	str	w0, [x29, 200]
 	ldrb	w1, [x1]
 	cmp	w1, 3
-	bne	.L2518
-	add	w0, w26, w0
-	orr	w0, w0, w25, lsl 24
-.L2559:
-	str	w0, [x27, 40]
+	bne	.L2627
+	add	w0, w22, w0
+	orr	w0, w0, w26, lsl 24
+.L2665:
+	str	w0, [x25, 40]
 	mov	w1, 1
-	mov	x0, x27
+	str	w14, [x29, 112]
+	mov	x0, x25
 	bl	sblk_read_page
-	ldr	x0, [x29, 152]
-	ldr	x0, [x0, #:lo12:.LANCHOR139]
-	ldr	w3, [x0, x28]
-	ldr	x0, [x27, 24]
+	ldr	x0, [x23, #:lo12:.LANCHOR146]
+	ldr	w14, [x29, 112]
+	ldr	w3, [x0, x19]
+	ldr	x0, [x25, 24]
 	ldr	w6, [x0, 4]
 	cmp	w3, w6
-	bne	.L2521
-	ldr	x1, [x29, 144]
-	ldr	x1, [x1, #:lo12:.LANCHOR140]
-	ldr	w2, [x1, x28]
+	bne	.L2630
+	ldr	x1, [x24, #:lo12:.LANCHOR147]
+	ldr	w2, [x1, x19]
 	ldr	w1, [x0, 8]
 	cmp	w2, w1
-	beq	.L2522
-.L2521:
-	ldr	x1, [x29, 144]
+	beq	.L2631
+.L2630:
+	ldr	x1, [x24, #:lo12:.LANCHOR147]
 	ldr	w2, [x0, 12]
 	str	w2, [sp]
-	ldr	x1, [x1, #:lo12:.LANCHOR140]
+	str	w14, [x29, 112]
+	ldr	w4, [x1, x19]
 	ldr	w5, [x0]
 	ldr	w7, [x0, 8]
-	mov	x0, x23
-	ldr	w2, [x27, 52]
-	ldr	w4, [x1, x28]
-	ldr	w1, [x27, 40]
+	ldr	w1, [x25, 40]
+	ldr	w2, [x25, 52]
+	ldr	x0, [x29, 120]
 	bl	printf
-	ldr	x0, [x29, 152]
-	ldr	x0, [x0, #:lo12:.LANCHOR139]
-	ldr	w0, [x0, x28]
+	ldr	x0, [x23, #:lo12:.LANCHOR146]
+	ldr	w14, [x29, 112]
+	ldr	w0, [x0, x19]
 	cmn	w0, #1
-	beq	.L2522
-	mov	x0, x27
+	beq	.L2631
+	mov	x0, x25
 	bl	buf_free
-	b	.L2561
-.L2518:
+	b	.L2667
+.L2627:
 	cmp	w1, 2
-	bne	.L2520
-	ldr	w1, [x29, 184]
+	bne	.L2629
+	ldr	w1, [x29, 188]
 	add	w0, w0, w1
-	add	w0, w0, w25
+	add	w0, w0, w26
 	orr	w0, w0, 33554432
-	b	.L2559
-.L2520:
-	add	w0, w26, w0
-	b	.L2559
-.L2522:
-	add	w22, w22, 1
-	add	w25, w25, 1
-	add	x28, x28, 4
-.L2525:
-	ldr	w0, [x29, 180]
-	cmp	w0, w25
-	bcs	.L2523
-	add	x19, x19, 1
-.L2527:
-	ldr	x0, [x29, 168]
+	b	.L2665
+.L2629:
+	add	w0, w22, w0
+	b	.L2665
+.L2631:
+	add	w28, w28, 1
+	add	w26, w26, 1
+	add	x19, x19, 4
+.L2634:
+	ldr	w0, [x29, 184]
+	cmp	w0, w26
+	bcs	.L2632
+	add	x27, x27, 1
+.L2636:
+	ldr	x0, [x29, 176]
 	ldrb	w0, [x0, 9]
-	cmp	w0, w19
-	ble	.L2524
-	add	x0, x20, x19, lsl 1
+	cmp	w0, w27
+	ble	.L2633
+	add	x0, x20, x27, lsl 1
+	str	x0, [x29, 160]
+	ldr	x0, [x29, 168]
+	sbfiz	x19, x28, 2, 32
+	mov	w26, 1
+	add	x0, x0, :lo12:.LANCHOR71
 	str	x0, [x29, 136]
-	ldr	x0, [x29, 160]
-	sbfiz	x28, x22, 2, 32
-	mov	w25, 1
-	add	x0, x0, :lo12:.LANCHOR67
-	str	x0, [x29, 112]
-	b	.L2525
-.L2524:
-	add	w26, w26, 1
-	b	.L2517
-.L2526:
-	mov	x0, x27
+	b	.L2634
+.L2633:
+	add	w22, w22, 1
+	b	.L2626
+.L2635:
+	mov	x0, x25
 	bl	buf_free
-	ldr	x3, [x29, 120]
-	adrp	x24, .LANCHOR4
-	ldr	x0, [x29, 168]
-	mov	w22, 0
+	ldr	x3, [x29, 144]
+	adrp	x25, .LANCHOR5
+	ldr	x0, [x29, 176]
+	mov	w28, 0
 	ldrh	w2, [x20, 80]
-	mov	w23, 0
-	ldr	x1, [x24, #:lo12:.LANCHOR4]
 	mov	w27, 0
-	ldrh	w3, [x3, #:lo12:.LANCHOR71]
+	ldr	x1, [x25, #:lo12:.LANCHOR5]
+	ldrh	w3, [x3, #:lo12:.LANCHOR75]
 	ldrb	w0, [x0, 9]
+	str	x25, [x29, 144]
+	str	wzr, [x29, 188]
 	mul	w0, w0, w3
 	strh	w0, [x1, x2, lsl 1]
-	adrp	x0, .LANCHOR96
-	add	x0, x0, :lo12:.LANCHOR96
-	str	x0, [x29, 96]
-.L2528:
-	sub	w0, w23, #1
-	str	w0, [x29, 120]
-	cmp	w26, w23
-	beq	.L2541
-	str	xzr, [x29, 184]
-	b	.L2542
-.L2538:
-	ldr	x1, [x29, 152]
-	sbfiz	x0, x27, 2, 32
-	ldr	x1, [x1, #:lo12:.LANCHOR139]
-	ldr	w28, [x1, x0]
-	cmn	w28, #1
-	beq	.L2529
-	ldr	x1, [x29, 144]
-	ldr	x1, [x1, #:lo12:.LANCHOR140]
-	ldr	w0, [x1, x0]
+	adrp	x0, .LANCHOR102
+	add	x0, x0, :lo12:.LANCHOR102
+	str	x0, [x29, 112]
+.L2637:
+	sub	w0, w27, #1
 	str	w0, [x29, 136]
-	mov	w0, w28
+	cmp	w22, w27
+	beq	.L2648
+	mov	x26, 0
+	b	.L2649
+.L2645:
+	ldr	w0, [x29, 188]
+	ldr	x1, [x23, #:lo12:.LANCHOR146]
+	sbfiz	x0, x0, 2, 32
+	ldr	w6, [x1, x0]
+	cmn	w6, #1
+	beq	.L2638
+	ldr	x1, [x24, #:lo12:.LANCHOR147]
+	str	w6, [x29, 108]
+	ldr	w0, [x1, x0]
+	str	w0, [x29, 160]
+	mov	w0, w6
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 204]
 	cmn	w0, #1
-	bne	.L2530
+	ldr	w6, [x29, 108]
+	bne	.L2639
+	mov	w0, w6
+	str	w6, [x29, 108]
 	mov	w2, 0
 	add	x1, x29, 204
-	mov	w0, w28
 	bl	pm_log2phys
-.L2530:
-	ldr	x0, [x29, 112]
-	ldr	x1, [x29, 128]
+	ldr	w6, [x29, 108]
+.L2639:
+	ldr	x0, [x29, 128]
+	ldr	x1, [x29, 152]
 	ldrh	w0, [x0, 96]
-	ldrh	w1, [x1, #:lo12:.LANCHOR103]
+	ldrh	w1, [x1, #:lo12:.LANCHOR108]
 	mul	w0, w0, w1
-	ldr	x1, [x29, 160]
-	ldrb	w1, [x1, #:lo12:.LANCHOR67]
+	ldr	x1, [x29, 168]
+	ldrb	w1, [x1, #:lo12:.LANCHOR71]
 	cmp	w1, 3
-	bne	.L2531
-	add	w0, w23, w0
+	bne	.L2640
+	add	w0, w27, w0
 	orr	w0, w0, w25, lsl 24
-.L2560:
+.L2666:
 	str	w0, [x29, 200]
 	mov	w19, 21
-	ldr	x0, [x29, 96]
-	mov	w4, 1
-	ldr	w1, [x29, 136]
+	ldr	x0, [x29, 112]
+	mov	w2, 1
+	ldr	w1, [x29, 160]
 	ldrh	w0, [x0]
 	sub	w19, w19, w0
 	lsr	w0, w1, w0
-	lsl	w19, w4, w19
+	lsl	w19, w2, w19
 	sub	w19, w19, #1
 	and	w19, w19, w0
-	ldr	x0, [x29, 104]
+	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	udiv	w19, w19, w0
 	ldr	w0, [x29, 204]
 	cmp	w1, w0
 	and	x19, x19, 65535
-	bne	.L2534
-	ldr	w2, [x29, 200]
-	mov	w1, w28
-	str	w4, [x29, 136]
-	adrp	x0, .LC162
-	add	x0, x0, :lo12:.LC162
-	bl	pm_ppa_update_check
-	ldr	w4, [x29, 136]
-	cbz	w0, .L2535
-.L2555:
-	b	.L2555
-.L2531:
-	cmp	w1, 2
-	bne	.L2533
-	ldr	w1, [x29, 120]
-	add	w0, w0, w1
-	add	w0, w0, w25
-	orr	w0, w0, 33554432
-	b	.L2560
-.L2533:
-	add	w0, w23, w0
-	b	.L2560
-.L2535:
-	mov	w2, w4
+	bne	.L2643
 	add	x1, x29, 200
-	mov	w0, w28
+	mov	w0, w6
 	bl	pm_log2phys
-	add	w22, w22, 1
+	add	w28, w28, 1
 	mov	w0, w19
 	bl	ftl_vpn_decrement
-.L2537:
+.L2644:
+	ldr	w0, [x29, 188]
+	add	w0, w0, 1
+	str	w0, [x29, 188]
 	adrp	x0, .LANCHOR3
-	add	w27, w27, 1
 	ldr	x0, [x0, #:lo12:.LANCHOR3]
 	add	x0, x0, x19, lsl 2
 	ldrb	w0, [x0, 2]
 	tst	w0, 224
-	bne	.L2529
-	ldr	x0, [x24, #:lo12:.LANCHOR4]
+	bne	.L2638
+	ldr	x0, [x29, 144]
 	lsl	x19, x19, 1
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	ldrh	w1, [x0, x19]
-	cbz	w1, .L2529
+	cbz	w1, .L2638
 	strh	wzr, [x0, x19]
-.L2529:
+.L2638:
 	add	w25, w25, 1
-.L2540:
-	ldr	w0, [x29, 180]
+.L2647:
+	ldr	w0, [x29, 184]
 	cmp	w0, w25
-	bcs	.L2538
-	ldr	x0, [x29, 184]
-	add	x0, x0, 1
-	str	x0, [x29, 184]
-.L2542:
-	ldr	x0, [x29, 168]
-	ldr	w1, [x29, 184]
+	bcs	.L2645
+	add	x26, x26, 1
+.L2649:
+	ldr	x0, [x29, 176]
 	ldrb	w0, [x0, 9]
-	cmp	w0, w1
-	ble	.L2539
-	ldr	x0, [x29, 184]
+	cmp	w0, w26
+	ble	.L2646
+	add	x0, x20, x26, lsl 1
 	mov	w25, 1
-	add	x0, x20, x0, lsl 1
-	str	x0, [x29, 112]
-	adrp	x0, .LANCHOR95
-	add	x0, x0, :lo12:.LANCHOR95
-	str	x0, [x29, 104]
-	b	.L2540
-.L2534:
+	str	x0, [x29, 128]
+	adrp	x0, .LANCHOR101
+	add	x0, x0, :lo12:.LANCHOR101
+	str	x0, [x29, 120]
+	b	.L2647
+.L2640:
+	cmp	w1, 2
+	bne	.L2642
+	ldr	w1, [x29, 136]
+	add	w0, w0, w1
+	add	w0, w0, w25
+	orr	w0, w0, 33554432
+	b	.L2666
+.L2642:
+	add	w0, w27, w0
+	b	.L2666
+.L2643:
 	ldr	w1, [x29, 200]
 	cmp	w0, w1
-	cinc	w22, w22, eq
-	b	.L2537
-.L2539:
-	add	w23, w23, 1
-	b	.L2528
-.L2541:
+	cinc	w28, w28, eq
+	b	.L2644
+.L2646:
+	add	w27, w27, 1
+	b	.L2637
+.L2648:
+	ldr	x0, [x29, 144]
 	ldrh	w1, [x20, 80]
-	ldr	x0, [x24, #:lo12:.LANCHOR4]
-	strh	w22, [x0, x1, lsl 1]
-	b	.L2514
-.L2509:
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	strh	w28, [x0, x1, lsl 1]
+	b	.L2623
+.L2618:
 	ldrh	w0, [x0, 130]
 	cmp	w0, w1
-	beq	.L2508
-	adrp	x19, .LANCHOR97
-	ldr	x1, [x19, #:lo12:.LANCHOR97]
+	beq	.L2617
+	adrp	x19, .LANCHOR100
+	ldr	x1, [x19, #:lo12:.LANCHOR100]
 	ldrh	w1, [x1, 126]
 	cmp	w1, w0
-	bne	.L2545
+	bne	.L2652
 	bl	pm_flush
-	ldr	x0, [x21, #:lo12:.LANCHOR5]
+	ldr	x0, [x21, #:lo12:.LANCHOR6]
 	ldrh	w0, [x0, 130]
 	bl	ftl_free_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	mov	w1, -1
 	strh	w1, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2545:
-	ldr	x0, [x21, #:lo12:.LANCHOR5]
+.L2652:
+	ldr	x0, [x21, #:lo12:.LANCHOR6]
 	mov	w1, -1
 	strh	w1, [x0, 130]
-	b	.L2508
+	b	.L2617
 	.size	gc_recovery, .-gc_recovery
 	.section	.text.zftl_init,"ax",@progbits
 	.align	2
@@ -16179,333 +16635,351 @@ gc_recovery:
 	.type	zftl_init, %function
 zftl_init:
 	stp	x29, x30, [sp, -112]!
-	adrp	x1, .LANCHOR52
+	adrp	x1, .LANCHOR54
 	mov	w0, -1
 	add	x29, sp, 0
-	strb	w0, [x1, #:lo12:.LANCHOR52]
-	adrp	x1, .LANCHOR53
+	strb	w0, [x1, #:lo12:.LANCHOR54]
+	adrp	x1, .LANCHOR55
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR80
-	strb	wzr, [x1, #:lo12:.LANCHOR53]
-	adrp	x1, .LANCHOR163
+	adrp	x22, .LANCHOR83
+	strb	wzr, [x1, #:lo12:.LANCHOR55]
+	adrp	x1, .LANCHOR169
 	stp	x19, x20, [sp, 16]
-	adrp	x21, .LANCHOR72
-	strb	w0, [x1, #:lo12:.LANCHOR163]
-	adrp	x0, .LANCHOR115
+	adrp	x21, .LANCHOR76
+	strb	w0, [x1, #:lo12:.LANCHOR169]
+	adrp	x0, .LANCHOR121
 	mov	w1, -1
 	stp	x23, x24, [sp, 48]
-	strb	wzr, [x0, #:lo12:.LANCHOR115]
-	adrp	x0, .LANCHOR56
+	strb	wzr, [x0, #:lo12:.LANCHOR121]
+	adrp	x0, .LANCHOR58
 	stp	x25, x26, [sp, 64]
 	adrp	x23, .LANCHOR2
-	str	w1, [x0, #:lo12:.LANCHOR56]
-	adrp	x1, .LC164
+	str	w1, [x0, #:lo12:.LANCHOR58]
+	adrp	x1, .LC175
 	stp	x27, x28, [sp, 80]
-	add	x1, x1, :lo12:.LC164
-	adrp	x0, .LC80
-	add	x0, x0, :lo12:.LC80
+	add	x1, x1, :lo12:.LC175
+	adrp	x0, .LC91
+	add	x0, x0, :lo12:.LC91
 	bl	printf
-	adrp	x20, .LANCHOR188
-	adrp	x1, .LANCHOR32
-	add	x1, x1, :lo12:.LANCHOR32
-	adrp	x0, .LANCHOR67
-	adrp	x2, .LANCHOR117
-	adrp	x7, .LANCHOR95
+	adrp	x20, .LANCHOR195
+	adrp	x1, .LANCHOR34
+	add	x1, x1, :lo12:.LANCHOR34
+	adrp	x0, .LANCHOR71
+	adrp	x2, .LANCHOR123
+	adrp	x3, .LANCHOR75
+	adrp	x4, .LANCHOR101
 	ldrb	w5, [x1, 12]
-	strb	w5, [x0, #:lo12:.LANCHOR67]
+	strb	w5, [x0, #:lo12:.LANCHOR71]
 	ldrb	w0, [x1, 9]
-	strb	w0, [x2, #:lo12:.LANCHOR117]
-	adrp	x2, .LANCHOR71
-	ldrh	w3, [x1, 10]
-	strh	w3, [x2, #:lo12:.LANCHOR71]
-	adrp	x2, .LANCHOR12
-	ldrh	w8, [x1, 14]
-	ubfiz	w11, w0, 9, 7
-	ldrb	w4, [x2, #:lo12:.LANCHOR12]
-	adrp	x2, .LANCHOR104
-	sdiv	w6, w3, w5
-	strh	w8, [x23, #:lo12:.LANCHOR2]
-	strb	w4, [x2, #:lo12:.LANCHOR104]
-	ldrb	w2, [x1, 13]
-	adrp	x1, .LANCHOR26
-	strb	w2, [x7, #:lo12:.LANCHOR95]
-	ldrh	w7, [x1, #:lo12:.LANCHOR26]
-	adrp	x1, .LANCHOR103
-	strh	w6, [x22, #:lo12:.LANCHOR80]
-	mul	w4, w4, w2
-	strh	w7, [x1, #:lo12:.LANCHOR103]
-	strh	w11, [x20, #:lo12:.LANCHOR188]
-	mov	w2, 1
-	and	w4, w4, 255
+	strb	w0, [x2, #:lo12:.LANCHOR123]
+	ldrh	w2, [x1, 10]
+	strh	w2, [x3, #:lo12:.LANCHOR75]
+	adrp	x3, .LANCHOR14
+	ldrh	w7, [x1, 14]
+	ubfiz	w10, w0, 9, 7
+	ldrb	w6, [x3, #:lo12:.LANCHOR14]
+	adrp	x3, .LANCHOR109
+	sdiv	w8, w2, w5
+	strh	w7, [x23, #:lo12:.LANCHOR2]
+	strb	w6, [x3, #:lo12:.LANCHOR109]
+	ldrb	w3, [x1, 13]
+	adrp	x1, .LANCHOR28
+	strb	w3, [x4, #:lo12:.LANCHOR101]
+	ldrh	w4, [x1, #:lo12:.LANCHOR28]
+	adrp	x1, .LANCHOR108
+	strh	w8, [x22, #:lo12:.LANCHOR83]
+	mul	w6, w6, w3
+	strh	w4, [x1, #:lo12:.LANCHOR108]
+	strh	w10, [x20, #:lo12:.LANCHOR195]
+	mov	w3, 1
+	and	w6, w6, 255
 	mov	w1, 0
-	strb	w4, [x21, #:lo12:.LANCHOR72]
-.L2563:
-	cmp	w7, w2
-	bcs	.L2564
-	mul	w3, w0, w3
-	adrp	x2, .LANCHOR96
+	strb	w6, [x21, #:lo12:.LANCHOR76]
+.L2669:
+	cmp	w4, w3
+	bcs	.L2670
+	mul	w2, w0, w2
+	adrp	x3, .LANCHOR102
 	sub	w1, w1, #1
-	adrp	x10, .LANCHOR192
-	strh	w1, [x2, #:lo12:.LANCHOR96]
+	mov	w4, 0
+	strh	w1, [x3, #:lo12:.LANCHOR102]
+	mov	w1, 1
+	mul	w3, w2, w7
+	lsr	w11, w3, 21
+.L2671:
+	cmp	w11, w1
+	bcs	.L2672
 	mov	w1, 57344
+	sub	w4, w4, #1
 	movk	w1, 0x1c, lsl 16
-	adrp	x28, .LANCHOR54
-	mul	w7, w3, w8
-	adrp	x24, .LANCHOR175
-	mul	w1, w4, w1
-	adrp	x27, .LANCHOR193
-	mul	w3, w3, w4
-	adrp	x26, .LANCHOR134
-	lsr	w2, w7, 21
-	mul	w6, w6, w4
-	mul	w7, w7, w4
-	sub	w3, w3, #1
-	str	w7, [x10, #:lo12:.LANCHOR192]
-	sub	w7, w11, #1
-	mul	w1, w1, w2
-	adrp	x2, .LANCHOR59
-	adrp	x25, .LANCHOR83
-	str	w1, [x2, #:lo12:.LANCHOR59]
-	add	w2, w1, 24576
-	str	w2, [x27, #:lo12:.LANCHOR193]
-	udiv	w0, w2, w0
-	udiv	w2, w2, w3
-	str	w0, [x28, #:lo12:.LANCHOR54]
-	add	w0, w7, w0, lsl 2
-	add	w2, w2, 8
-	udiv	w0, w0, w11
-	strh	w0, [x24, #:lo12:.LANCHOR175]
+	mul	w3, w3, w6
+	adrp	x28, .LANCHOR56
+	sub	w11, w10, #1
+	mul	w1, w6, w1
+	adrp	x24, .LANCHOR182
+	mul	w8, w8, w6
+	adrp	x27, .LANCHOR200
+	mul	w2, w2, w6
+	adrp	x26, .LANCHOR140
+	lsl	w1, w1, w4
+	adrp	x4, .LANCHOR61
+	sub	w2, w2, #1
+	adrp	x25, .LANCHOR87
+	str	w1, [x4, #:lo12:.LANCHOR61]
+	adrp	x4, .LANCHOR199
+	str	w3, [x4, #:lo12:.LANCHOR199]
+	add	w3, w1, 24576
+	str	w3, [x27, #:lo12:.LANCHOR200]
+	udiv	w0, w3, w0
+	udiv	w3, w3, w2
+	adrp	x2, .LANCHOR104
+	str	w0, [x28, #:lo12:.LANCHOR56]
+	add	w0, w11, w0, lsl 2
+	add	w3, w3, 8
+	udiv	w0, w0, w10
+	strh	w0, [x24, #:lo12:.LANCHOR182]
 	ubfiz	w0, w0, 4, 16
-	sdiv	w0, w0, w6
-	adrp	x6, .LANCHOR87
-	str	x6, [x29, 104]
-	strh	w2, [x6, #:lo12:.LANCHOR87]
-	adrp	x2, .LANCHOR100
-	strh	w0, [x26, #:lo12:.LANCHOR134]
-	add	w0, w8, w8, lsl 1
+	sdiv	w0, w0, w8
+	adrp	x8, .LANCHOR91
+	str	x8, [x29, 104]
+	strh	w3, [x8, #:lo12:.LANCHOR91]
+	strh	w0, [x26, #:lo12:.LANCHOR140]
+	add	w0, w7, w7, lsl 1
 	asr	w0, w0, 2
-	strh	w0, [x2, #:lo12:.LANCHOR100]
-	lsr	w0, w8, 4
-	strh	w0, [x25, #:lo12:.LANCHOR83]
+	strh	w0, [x2, #:lo12:.LANCHOR104]
+	lsr	w0, w7, 4
+	strh	w0, [x25, #:lo12:.LANCHOR87]
 	cmp	w0, 79
-	bhi	.L2565
+	bhi	.L2673
 	mov	w0, 80
-	strh	w0, [x25, #:lo12:.LANCHOR83]
-.L2565:
-	adrp	x2, .LANCHOR98
-	mov	w0, 4000
-	adrp	x4, .LANCHOR99
-	mov	w3, 1024
-	strh	w0, [x2, #:lo12:.LANCHOR98]
+	strh	w0, [x25, #:lo12:.LANCHOR87]
+.L2673:
+	adrp	x7, .LANCHOR105
+	mov	w0, 2000
+	adrp	x3, .LANCHOR103
+	adrp	x6, .LANCHOR139
+	strh	w0, [x7, #:lo12:.LANCHOR105]
 	mov	w0, 50
-	strh	w0, [x4, #:lo12:.LANCHOR99]
-	adrp	x0, .LANCHOR133
-	mov	w6, 64
+	adrp	x2, .LANCHOR138
+	strh	w0, [x3, #:lo12:.LANCHOR103]
+	mov	w0, 256
+	strh	w0, [x6, #:lo12:.LANCHOR139]
+	mov	w0, 48
+	strh	w0, [x2, #:lo12:.LANCHOR138]
+	adrp	x0, .LANCHOR4
+	mov	w8, 32
 	cmp	w5, 2
-	strh	w3, [x0, #:lo12:.LANCHOR133]
-	adrp	x3, .LANCHOR132
-	strh	w6, [x3, #:lo12:.LANCHOR132]
-	beq	.L2566
-	adrp	x5, .LANCHOR69
-	ldrb	w5, [x5, #:lo12:.LANCHOR69]
-	cbz	w5, .L2567
-.L2566:
+	strh	w8, [x0, #:lo12:.LANCHOR4]
+	beq	.L2674
+	adrp	x5, .LANCHOR73
+	ldrb	w5, [x5, #:lo12:.LANCHOR73]
+	cbz	w5, .L2675
+.L2674:
 	mov	w5, 150
-	strh	w5, [x4, #:lo12:.LANCHOR99]
-	mov	w4, 128
-	strh	w4, [x3, #:lo12:.LANCHOR132]
-	adrp	x3, .LANCHOR11
-	ldrb	w3, [x3, #:lo12:.LANCHOR11]
-	cbnz	w3, .L2567
-	mov	w3, 600
-	strh	w3, [x2, #:lo12:.LANCHOR98]
-	mov	w2, 512
-	strh	w2, [x0, #:lo12:.LANCHOR133]
-.L2567:
-	adrp	x19, .LANCHOR7
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2569
-	str	x10, [x29, 96]
-	adrp	x0, .LC165
-	add	x0, x0, :lo12:.LC165
-	bl	printf
-	ldr	x10, [x29, 96]
-.L2569:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2570
-	ldr	w1, [x10, #:lo12:.LANCHOR192]
-	adrp	x0, .LC166
-	add	x0, x0, :lo12:.LC166
-	bl	printf
-.L2570:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2571
-	ldr	w1, [x28, #:lo12:.LANCHOR54]
-	adrp	x0, .LC167
-	add	x0, x0, :lo12:.LC167
+	strh	w5, [x3, #:lo12:.LANCHOR103]
+	mov	w3, 64
+	strh	w3, [x2, #:lo12:.LANCHOR138]
+	mov	w2, 12
+	strh	w2, [x0, #:lo12:.LANCHOR4]
+	adrp	x2, .LANCHOR13
+	ldrb	w2, [x2, #:lo12:.LANCHOR13]
+	cbnz	w2, .L2675
+	mov	w2, 4
+	strh	w2, [x0, #:lo12:.LANCHOR4]
+	mov	w0, 600
+	strh	w0, [x7, #:lo12:.LANCHOR105]
+	mov	w0, 128
+	strh	w0, [x6, #:lo12:.LANCHOR139]
+.L2675:
+	adrp	x19, .LANCHOR9
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L2677
+	str	x4, [x29, 96]
+	adrp	x0, .LC176
+	add	x0, x0, :lo12:.LC176
 	bl	printf
-.L2571:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2572
-	ldr	w1, [x27, #:lo12:.LANCHOR193]
-	adrp	x0, .LC168
-	add	x0, x0, :lo12:.LC168
+	ldr	x4, [x29, 96]
+.L2677:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L2678
+	ldr	w1, [x4, #:lo12:.LANCHOR199]
+	adrp	x0, .LC177
+	add	x0, x0, :lo12:.LC177
 	bl	printf
-.L2572:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2573
-	ldrh	w1, [x24, #:lo12:.LANCHOR175]
-	adrp	x0, .LC169
-	add	x0, x0, :lo12:.LC169
+.L2678:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L2679
+	ldr	w1, [x28, #:lo12:.LANCHOR56]
+	adrp	x0, .LC178
+	add	x0, x0, :lo12:.LC178
 	bl	printf
-.L2573:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2574
-	ldrh	w1, [x20, #:lo12:.LANCHOR188]
-	adrp	x0, .LC170
-	add	x0, x0, :lo12:.LC170
+.L2679:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L2680
+	ldr	w1, [x27, #:lo12:.LANCHOR200]
+	adrp	x0, .LC179
+	add	x0, x0, :lo12:.LC179
 	bl	printf
-.L2574:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2575
-	ldrh	w1, [x26, #:lo12:.LANCHOR134]
-	adrp	x0, .LC171
-	add	x0, x0, :lo12:.LC171
+.L2680:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L2681
+	ldrh	w1, [x24, #:lo12:.LANCHOR182]
+	adrp	x0, .LC180
+	add	x0, x0, :lo12:.LC180
 	bl	printf
-.L2575:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2576
-	ldrh	w1, [x25, #:lo12:.LANCHOR83]
-	adrp	x0, .LC172
-	add	x0, x0, :lo12:.LC172
+.L2681:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L2682
+	ldrh	w1, [x20, #:lo12:.LANCHOR195]
+	adrp	x0, .LC181
+	add	x0, x0, :lo12:.LC181
 	bl	printf
-.L2576:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2577
+.L2682:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L2683
+	ldrh	w1, [x26, #:lo12:.LANCHOR140]
+	adrp	x0, .LC182
+	add	x0, x0, :lo12:.LC182
+	bl	printf
+.L2683:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L2684
+	ldrh	w1, [x25, #:lo12:.LANCHOR87]
+	adrp	x0, .LC183
+	add	x0, x0, :lo12:.LC183
+	bl	printf
+.L2684:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L2685
 	ldr	x0, [x29, 104]
-	ldrh	w1, [x0, #:lo12:.LANCHOR87]
-	adrp	x0, .LC173
-	add	x0, x0, :lo12:.LC173
+	ldrh	w1, [x0, #:lo12:.LANCHOR91]
+	adrp	x0, .LC184
+	add	x0, x0, :lo12:.LC184
 	bl	printf
-.L2577:
+.L2685:
 	bl	buf_init
-	adrp	x25, .LANCHOR5
+	adrp	x25, .LANCHOR6
 	ldrh	w1, [x23, #:lo12:.LANCHOR2]
 	mov	w0, 6
 	mul	w0, w1, w0
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR0
 	str	x0, [x1, #:lo12:.LANCHOR0]
-	ldrb	w1, [x21, #:lo12:.LANCHOR72]
-	ldrh	w0, [x22, #:lo12:.LANCHOR80]
+	ldrb	w1, [x21, #:lo12:.LANCHOR76]
+	ldrh	w0, [x22, #:lo12:.LANCHOR83]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR110
+	adrp	x1, .LANCHOR115
 	adrp	x2, ftl_ext_info_data_buffer
 	add	x2, x2, :lo12:ftl_ext_info_data_buffer
-	str	x0, [x1, #:lo12:.LANCHOR110]
-	adrp	x0, .LANCHOR109
-	ldrh	w1, [x22, #:lo12:.LANCHOR80]
-	str	x2, [x0, #:lo12:.LANCHOR109]
-	ldrb	w0, [x21, #:lo12:.LANCHOR72]
+	str	x0, [x1, #:lo12:.LANCHOR115]
+	adrp	x0, .LANCHOR114
+	ldrh	w1, [x22, #:lo12:.LANCHOR83]
+	str	x2, [x0, #:lo12:.LANCHOR114]
+	ldrb	w0, [x21, #:lo12:.LANCHOR76]
 	mul	w1, w1, w0
 	lsl	w0, w1, 1
-	adrp	x1, .LANCHOR4
+	adrp	x1, .LANCHOR5
 	add	x3, x2, x0, sxtw 2
-	str	x3, [x1, #:lo12:.LANCHOR4]
+	str	x3, [x1, #:lo12:.LANCHOR5]
 	ldrh	w1, [x23, #:lo12:.LANCHOR2]
 	add	w1, w0, w1, lsr 1
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
 	add	x1, x2, x1, sxtw 2
-	str	x1, [x25, #:lo12:.LANCHOR5]
-	tbz	x0, 12, .L2578
-	adrp	x0, .LC174
-	add	x0, x0, :lo12:.LC174
+	str	x1, [x25, #:lo12:.LANCHOR6]
+	tbz	x0, 12, .L2686
+	adrp	x0, .LC185
+	add	x0, x0, :lo12:.LC185
 	bl	printf
-.L2578:
-	ldrh	w0, [x22, #:lo12:.LANCHOR80]
-	ldrb	w21, [x21, #:lo12:.LANCHOR72]
+.L2686:
+	ldrh	w0, [x22, #:lo12:.LANCHOR83]
+	ldrb	w21, [x21, #:lo12:.LANCHOR76]
 	ldrh	w1, [x23, #:lo12:.LANCHOR2]
-	ldrh	w22, [x24, #:lo12:.LANCHOR175]
+	ldrh	w22, [x24, #:lo12:.LANCHOR182]
 	mul	w21, w0, w21
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
 	add	w21, w1, w21, lsl 2
 	lsl	w1, w1, 2
 	lsl	w21, w21, 1
 	add	w22, w1, w22, lsl 2
-	add	w21, w21, 612
+	add	w21, w21, 632
 	add	w22, w22, 704
-	tbz	x0, 12, .L2579
-	ldrh	w3, [x20, #:lo12:.LANCHOR188]
-	adrp	x0, .LC175
+	tbz	x0, 12, .L2687
+	ldrh	w3, [x20, #:lo12:.LANCHOR195]
+	adrp	x0, .LC186
 	mov	w2, w22
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC175
+	add	x0, x0, :lo12:.LC186
 	bl	printf
-.L2579:
-	ldrh	w0, [x20, #:lo12:.LANCHOR188]
+.L2687:
+	ldrh	w0, [x20, #:lo12:.LANCHOR195]
 	cmp	w21, w0
-	bhi	.L2580
+	bhi	.L2688
 	cmp	w22, w0
-	bls	.L2581
-.L2580:
-.L2624:
-	b	.L2624
-.L2564:
+	bls	.L2689
+.L2688:
+.L2732:
+	b	.L2732
+.L2670:
 	add	w1, w1, 1
-	lsl	w2, w2, 1
+	lsl	w3, w3, 1
 	and	w1, w1, 65535
-	b	.L2563
-.L2581:
+	b	.L2669
+.L2672:
+	add	w4, w4, 1
+	lsl	w1, w1, 1
+	and	w4, w4, 65535
+	b	.L2671
+.L2689:
 	bl	sblk_init
 	bl	ftl_info_blk_init
 	cmn	w0, #1
-	beq	.L2562
+	beq	.L2668
 	bl	ftl_ext_info_init
-	adrp	x19, .LANCHOR97
+	adrp	x19, .LANCHOR100
 	mov	w0, 1
 	bl	pm_init
 	bl	lpa_rebuild_hash
-	ldr	x0, [x25, #:lo12:.LANCHOR5]
+	ldr	x0, [x25, #:lo12:.LANCHOR6]
 	mov	x1, 0
 	add	x0, x0, 16
 	bl	ftl_open_sblk_recovery
-	ldr	x0, [x25, #:lo12:.LANCHOR5]
+	ldr	x0, [x25, #:lo12:.LANCHOR6]
 	add	x1, x0, 16
 	add	x0, x0, 48
 	bl	ftl_open_sblk_recovery
-	ldr	x1, [x19, #:lo12:.LANCHOR97]
+	ldr	x1, [x19, #:lo12:.LANCHOR100]
 	ldr	w0, [x1, 8]
 	add	w0, w0, 16
 	str	w0, [x1, 8]
-	ldr	x0, [x25, #:lo12:.LANCHOR5]
+	ldr	x0, [x25, #:lo12:.LANCHOR6]
 	add	x0, x0, 16
 	bl	ftl_info_data_recovery
-	ldr	x0, [x25, #:lo12:.LANCHOR5]
+	ldr	x0, [x25, #:lo12:.LANCHOR6]
 	add	x0, x0, 48
 	bl	ftl_info_data_recovery
-	ldr	x0, [x25, #:lo12:.LANCHOR5]
+	ldr	x0, [x25, #:lo12:.LANCHOR6]
 	add	x0, x0, 80
 	bl	ftl_info_data_recovery
 	bl	gc_recovery
 	bl	pm_flush
 	mov	w0, 1
 	bl	ftl_total_vpn_update
-	adrp	x0, .LANCHOR170
-	ldrb	w0, [x0, #:lo12:.LANCHOR170]
-	cbz	w0, .L2583
-	ldr	x1, [x19, #:lo12:.LANCHOR97]
+	adrp	x0, .LANCHOR177
+	ldrb	w0, [x0, #:lo12:.LANCHOR177]
+	cbz	w0, .L2691
+	ldr	x1, [x19, #:lo12:.LANCHOR100]
 	ldr	w0, [x1, 68]
 	add	w0, w0, 1
 	str	w0, [x1, 68]
-.L2583:
+.L2691:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
 	bl	print_ftl_debug_info
 	mov	w0, 0
-.L2562:
+.L2668:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -16523,14 +16997,14 @@ rk_ftl_init:
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	bl	nand_flash_init
-	cbnz	w0, .L2628
+	cbnz	w0, .L2736
 	bl	zftl_init
-.L2628:
+.L2736:
 	mov	w19, w0
 	bl	idb_init
 	mov	w1, w19
-	adrp	x0, .LC176
-	add	x0, x0, :lo12:.LC176
+	adrp	x0, .LC187
+	add	x0, x0, :lo12:.LC187
 	bl	printf
 	mov	w0, w19
 	ldr	x19, [sp, 16]
@@ -16543,72 +17017,71 @@ rk_ftl_init:
 	.type	gc_update_l2p_map_new, %function
 gc_update_l2p_map_new:
 	stp	x29, x30, [sp, -176]!
-	adrp	x0, .LANCHOR5
-	adrp	x1, .LANCHOR71
+	adrp	x0, .LANCHOR6
+	adrp	x1, .LANCHOR75
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	ldr	x20, [x0, #:lo12:.LANCHOR5]
-	stp	x25, x26, [sp, 64]
-	ldrh	w25, [x1, #:lo12:.LANCHOR71]
-	add	x1, x20, 80
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR7
+	ldr	x21, [x0, #:lo12:.LANCHOR6]
+	stp	x25, x26, [sp, 64]
+	ldrh	w26, [x1, #:lo12:.LANCHOR75]
+	add	x1, x21, 80
 	stp	x23, x24, [sp, 48]
+	adrp	x24, .LANCHOR9
+	stp	x19, x20, [sp, 16]
 	stp	x27, x28, [sp, 80]
-	str	x1, [x29, 144]
+	stp	x0, x1, [x29, 128]
 	ldrb	w1, [x1, 9]
-	str	x0, [x29, 128]
-	mul	w25, w25, w1
-	ldr	w1, [x21, #:lo12:.LANCHOR7]
-	tbz	x1, 8, .L2631
-	ldrh	w1, [x20, 80]
-	adrp	x0, .LC177
-	add	x0, x0, :lo12:.LC177
+	mul	w26, w26, w1
+	ldr	w1, [x24, #:lo12:.LANCHOR9]
+	tbz	x1, 8, .L2739
+	ldrh	w1, [x21, 80]
+	adrp	x0, .LC188
+	add	x0, x0, :lo12:.LC188
 	bl	printf
-.L2631:
-	adrp	x23, .LANCHOR4
-	ldrh	w1, [x20, 80]
-	sub	w2, w25, #1
+.L2739:
+	adrp	x23, .LANCHOR5
+	ldrh	w1, [x21, 80]
+	sub	w2, w26, #1
 	mov	x22, 0
-	ldr	x0, [x23, #:lo12:.LANCHOR4]
-	mov	w24, 0
+	ldr	x0, [x23, #:lo12:.LANCHOR5]
+	mov	w25, 0
 	strh	w2, [x0, x1, lsl 1]
-	adrp	x0, .LANCHOR117
-	add	x0, x0, :lo12:.LANCHOR117
+	adrp	x0, .LANCHOR123
+	add	x0, x0, :lo12:.LANCHOR123
 	str	x0, [x29, 104]
-.L2632:
-	mov	w27, w22
-	cmp	w25, w22
-	bhi	.L2642
-	ldr	w0, [x21, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L2643
+.L2740:
+	mov	w28, w22
+	cmp	w26, w22
+	bhi	.L2750
+	ldr	w0, [x24, #:lo12:.LANCHOR9]
+	tbz	x0, 8, .L2751
 	ldr	x0, [x29, 128]
-	mov	w3, w24
-	ldr	x1, [x23, #:lo12:.LANCHOR4]
-	ldrh	w2, [x20, 80]
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	mov	w3, w25
+	ldr	x1, [x23, #:lo12:.LANCHOR5]
+	ldrh	w2, [x21, 80]
+	ldr	x0, [x0, #:lo12:.LANCHOR6]
 	ldrh	w2, [x1, x2, lsl 1]
 	ldrh	w1, [x0, 80]
-	adrp	x0, .LC181
-	add	x0, x0, :lo12:.LC181
+	adrp	x0, .LC191
+	add	x0, x0, :lo12:.LC191
 	bl	printf
-.L2643:
-	ldrh	w1, [x20, 80]
-	ldr	x0, [x23, #:lo12:.LANCHOR4]
+.L2751:
+	ldrh	w1, [x21, 80]
+	ldr	x0, [x23, #:lo12:.LANCHOR5]
 	ldrh	w0, [x0, x1, lsl 1]
-	cmp	w24, w0
-	beq	.L2644
-	adrp	x1, .LANCHOR194
+	cmp	w25, w0
+	beq	.L2752
+	adrp	x1, .LANCHOR201
 	adrp	x0, .LC0
-	mov	w2, 463
-	add	x1, x1, :lo12:.LANCHOR194
+	mov	w2, 483
+	add	x1, x1, :lo12:.LANCHOR201
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2644:
-	ldrh	w1, [x20, 80]
-	ldr	x0, [x23, #:lo12:.LANCHOR4]
-	strh	w24, [x0, x1, lsl 1]
-	ldrh	w0, [x20, 80]
+.L2752:
+	ldrh	w1, [x21, 80]
+	ldr	x0, [x23, #:lo12:.LANCHOR5]
+	strh	w25, [x0, x1, lsl 1]
+	ldrh	w0, [x21, 80]
 	bl	zftl_insert_data_list
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -16617,129 +17090,112 @@ gc_update_l2p_map_new:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L2642:
-	adrp	x26, .LANCHOR139
+.L2750:
+	adrp	x27, .LANCHOR146
 	lsl	x19, x22, 2
-	ldr	x0, [x26, #:lo12:.LANCHOR139]
+	ldr	x0, [x27, #:lo12:.LANCHOR146]
 	ldr	w2, [x0, x19]
 	cmn	w2, #1
-	beq	.L2633
-	adrp	x0, .LANCHOR117
-	ldrb	w0, [x0, #:lo12:.LANCHOR117]
-	lsl	w0, w0, 7
-	udiv	w0, w2, w0
-	and	w0, w0, 65535
+	beq	.L2741
+	adrp	x0, .LANCHOR123
+	ldrb	w20, [x0, #:lo12:.LANCHOR123]
+	lsl	w20, w20, 7
+	udiv	w20, w2, w20
+	and	w0, w20, 65535
 	str	w0, [x29, 156]
-	ldr	w0, [x21, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L2634
+	ldr	w0, [x24, #:lo12:.LANCHOR9]
+	tbz	x0, 8, .L2742
 	ldr	w1, [x29, 156]
-	adrp	x0, .LC178
+	adrp	x0, .LC189
 	mov	w3, w22
-	add	x0, x0, :lo12:.LC178
+	add	x0, x0, :lo12:.LC189
 	bl	printf
-.L2634:
-	sub	w27, w25, w27
-	add	x27, x27, x22
-	lsl	x0, x27, 2
-	str	x0, [x29, 136]
-	adrp	x0, .LC180
-	add	x0, x0, :lo12:.LC180
+.L2742:
+	sub	w28, w26, w28
+	add	x28, x28, x22
+	lsl	x0, x28, 2
+	str	x0, [x29, 144]
+	adrp	x0, .LC190
+	add	x0, x0, :lo12:.LC190
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR96
-	add	x0, x0, :lo12:.LANCHOR96
+	adrp	x0, .LANCHOR102
+	add	x0, x0, :lo12:.LANCHOR102
 	str	x0, [x29, 112]
-.L2635:
-	ldr	x0, [x29, 136]
+.L2743:
+	ldr	x0, [x29, 144]
 	cmp	x0, x19
-	bne	.L2641
-.L2633:
+	bne	.L2749
+.L2741:
 	add	x22, x22, 1
-	b	.L2632
-.L2641:
-	ldr	x0, [x26, #:lo12:.LANCHOR139]
-	ldr	w28, [x0, x19]
-	cmn	w28, #1
-	beq	.L2636
+	b	.L2740
+.L2749:
+	ldr	x0, [x27, #:lo12:.LANCHOR146]
+	ldr	w20, [x0, x19]
+	cmn	w20, #1
+	beq	.L2744
 	ldr	x0, [x29, 104]
 	ldr	w1, [x29, 156]
 	ldrb	w0, [x0]
 	lsl	w0, w0, 7
-	udiv	w0, w28, w0
+	udiv	w0, w20, w0
 	cmp	w1, w0, uxth
-	bne	.L2636
-	adrp	x0, .LANCHOR140
-	ldr	x0, [x0, #:lo12:.LANCHOR140]
-	ldr	w27, [x0, x19]
-	mov	w0, w28
+	bne	.L2744
+	adrp	x0, .LANCHOR147
+	ldr	x0, [x0, #:lo12:.LANCHOR147]
+	ldr	w28, [x0, x19]
+	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 172]
 	cmn	w0, #1
-	bne	.L2637
+	bne	.L2745
 	mov	w2, 0
 	add	x1, x29, 172
-	mov	w0, w28
+	mov	w0, w20
 	bl	pm_log2phys
-.L2637:
+.L2745:
 	ldr	w3, [x29, 172]
-	cmp	w27, w3
-	bne	.L2638
-	adrp	x0, .LANCHOR141
+	cmp	w28, w3
+	bne	.L2746
+	adrp	x0, .LANCHOR148
 	mov	w2, 1
 	add	x1, x29, 168
-	add	w24, w24, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR141]
+	add	w25, w25, 1
+	ldr	x0, [x0, #:lo12:.LANCHOR148]
 	ldr	w0, [x0, x19]
 	str	w0, [x29, 168]
-	mov	w0, w28
+	mov	w0, w20
 	bl	pm_log2phys
 	ldr	x0, [x29, 112]
-	mov	w1, 21
-	ldrh	w0, [x0]
-	sub	w2, w1, w0
-	mov	w1, 1
-	lsr	w0, w27, w0
-	lsl	w1, w1, w2
-	sub	w1, w1, #1
-	and	w1, w1, w0
-	adrp	x0, .LANCHOR95
-	ldrb	w0, [x0, #:lo12:.LANCHOR95]
-	udiv	w1, w1, w0
-	and	w1, w1, 65535
-	str	w1, [x29, 152]
-	mov	w0, w1
+	ldrh	w1, [x0]
+	mov	w0, 21
+	sub	w2, w0, w1
+	mov	w0, 1
+	lsr	w28, w28, w1
+	lsl	w0, w0, w2
+	sub	w0, w0, #1
+	and	w28, w0, w28
+	adrp	x0, .LANCHOR101
+	ldrb	w0, [x0, #:lo12:.LANCHOR101]
+	udiv	w0, w28, w0
+.L2772:
 	bl	ftl_vpn_decrement
-	ldr	x0, [x29, 144]
-	ldr	w1, [x29, 152]
-	ldrh	w0, [x0]
-	cmp	w0, w1
-	bne	.L2639
-	ldr	w0, [x21, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L2639
-	ldr	w3, [x29, 172]
-	adrp	x0, .LC179
-	mov	w2, w27
-	mov	w1, w28
-	add	x0, x0, :lo12:.LC179
-	bl	printf
-.L2639:
-	ldr	x0, [x26, #:lo12:.LANCHOR139]
+	ldr	x0, [x27, #:lo12:.LANCHOR146]
 	mov	w1, -1
 	str	w1, [x0, x19]
-.L2636:
+.L2744:
 	add	x19, x19, 4
-	b	.L2635
-.L2638:
-	ldr	w0, [x21, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L2640
+	b	.L2743
+.L2746:
+	ldr	w0, [x24, #:lo12:.LANCHOR9]
+	tbz	x0, 8, .L2748
 	ldr	x0, [x29, 120]
-	mov	w2, w27
-	mov	w1, w28
+	mov	w2, w28
+	mov	w1, w20
 	bl	printf
-.L2640:
-	ldr	x0, [x29, 144]
+.L2748:
+	ldr	x0, [x29, 136]
 	ldrh	w0, [x0]
-	bl	ftl_vpn_decrement
-	b	.L2639
+	b	.L2772
 	.size	gc_update_l2p_map_new, .-gc_update_l2p_map_new
 	.section	.text.gc_scan_src_blk_one_page,"ax",@progbits
 	.align	2
@@ -16752,70 +17208,70 @@ gc_scan_src_blk_one_page:
 	mov	w7, 65535
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR63
-	add	x1, x19, :lo12:.LANCHOR63
+	adrp	x19, .LANCHOR65
+	add	x1, x19, :lo12:.LANCHOR65
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	str	x25, [sp, 64]
 	ldrb	w0, [x1, 4]
 	add	x2, x1, x0, sxtw 1
 	ldrh	w3, [x2, 40]
-	adrp	x2, .LANCHOR72
-	ldrb	w4, [x2, #:lo12:.LANCHOR72]
+	adrp	x2, .LANCHOR76
+	ldrb	w4, [x2, #:lo12:.LANCHOR76]
 	ldrh	w2, [x1, 2]
-.L2668:
+.L2774:
 	cmp	w3, w7
-	beq	.L2670
-	cbz	w6, .L2671
-	add	x1, x19, :lo12:.LANCHOR63
+	beq	.L2776
+	cbz	w6, .L2777
+	add	x1, x19, :lo12:.LANCHOR65
 	strb	w0, [x1, 4]
-.L2671:
-	cbz	w5, .L2672
-	add	x0, x19, :lo12:.LANCHOR63
+.L2777:
+	cbz	w5, .L2778
+	add	x0, x19, :lo12:.LANCHOR65
 	strh	w2, [x0, 2]
-.L2672:
-	adrp	x0, .LANCHOR103
-	ldrh	w22, [x0, #:lo12:.LANCHOR103]
-	adrp	x0, .LANCHOR67
+.L2778:
+	adrp	x0, .LANCHOR108
+	ldrh	w22, [x0, #:lo12:.LANCHOR108]
+	adrp	x0, .LANCHOR71
 	mov	x23, x0
-	ldrb	w1, [x0, #:lo12:.LANCHOR67]
+	ldrb	w1, [x0, #:lo12:.LANCHOR71]
 	mul	w22, w22, w3
 	cmp	w1, 2
-	bne	.L2673
-	add	x0, x19, :lo12:.LANCHOR63
+	bne	.L2779
+	add	x0, x19, :lo12:.LANCHOR65
 	ldrb	w1, [x0, 6]
-	cbnz	w1, .L2673
+	cbnz	w1, .L2779
 	ldrh	w0, [x0, 2]
 	add	w22, w22, w0, lsl 1
-.L2674:
-	add	x1, x19, :lo12:.LANCHOR63
+.L2780:
+	add	x1, x19, :lo12:.LANCHOR65
 	ldrb	w0, [x1, 4]
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x1, 4]
 	cmp	w4, w0
-	bne	.L2675
+	bne	.L2781
 	ldrh	w0, [x1, 2]
 	strb	wzr, [x1, 4]
 	add	w0, w0, 1
 	strh	w0, [x1, 2]
-.L2675:
+.L2781:
 	mov	w0, 1
-	add	x19, x19, :lo12:.LANCHOR63
+	add	x19, x19, :lo12:.LANCHOR65
 	bl	buf_alloc
-	add	x23, x23, :lo12:.LANCHOR67
+	add	x23, x23, :lo12:.LANCHOR71
 	mov	x21, x0
 	mov	w20, 0
-	adrp	x24, .LANCHOR64
-.L2685:
+	adrp	x24, .LANCHOR68
+.L2791:
 	ldrb	w0, [x19, 6]
 	cmp	w0, 3
-	bne	.L2676
-	cbz	w20, .L2677
-.L2676:
+	bne	.L2782
+	cbz	w20, .L2783
+.L2782:
 	cmp	w0, w20
-	bgt	.L2678
-.L2686:
+	bgt	.L2784
+.L2792:
 	mov	x0, x21
 	bl	buf_free
 	ldp	x19, x20, [sp, 16]
@@ -16824,33 +17280,33 @@ gc_scan_src_blk_one_page:
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2670:
+.L2776:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	cmp	w0, w4
-	bne	.L2669
+	bne	.L2775
 	add	w2, w2, 1
 	mov	w5, 1
 	and	w2, w2, 65535
 	mov	w0, 0
-.L2669:
+.L2775:
 	add	x3, x1, x0, sxtw 1
 	mov	w6, 1
 	ldrh	w3, [x3, 40]
-	b	.L2668
-.L2673:
-	add	x0, x19, :lo12:.LANCHOR63
+	b	.L2774
+.L2779:
+	add	x0, x19, :lo12:.LANCHOR65
 	ldrh	w0, [x0, 2]
 	add	w22, w0, w22
-	b	.L2674
-.L2678:
+	b	.L2780
+.L2784:
 	ldrb	w1, [x23]
 	cmp	w1, 2
-	bne	.L2679
-	cbnz	w0, .L2679
+	bne	.L2785
+	cbnz	w0, .L2785
 	add	w0, w20, w22
 	orr	w0, w0, 33554432
-.L2699:
+.L2805:
 	str	w0, [x21, 40]
 	mov	w1, 1
 	mov	x0, x21
@@ -16858,72 +17314,344 @@ gc_scan_src_blk_one_page:
 	ldr	w0, [x21, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2682
+	beq	.L2788
 	ldr	x0, [x21, 24]
 	ldr	w25, [x0, 4]
 	mov	w0, w25
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 92]
 	cmn	w0, #1
-	bne	.L2683
+	bne	.L2789
 	mov	w2, 0
 	add	x1, x29, 92
 	mov	w0, w25
 	bl	pm_log2phys
-.L2683:
+.L2789:
 	ldr	w0, [x29, 92]
 	cmp	w22, w0
-	bne	.L2682
+	bne	.L2788
 	ldrh	w0, [x19, 24]
-	ldr	x2, [x24, #:lo12:.LANCHOR64]
+	ldr	x2, [x24, #:lo12:.LANCHOR68]
 	ubfiz	x1, x0, 2, 16
 	add	w0, w0, 1
 	str	w22, [x2, x1]
 	strh	w0, [x19, 24]
-.L2682:
+.L2788:
 	ldrh	w0, [x19, 26]
 	add	w0, w0, 1
 	strh	w0, [x19, 26]
-.L2677:
+.L2783:
 	add	w20, w20, 1
 	cmp	w20, 4
-	bne	.L2685
-	b	.L2686
-.L2679:
+	bne	.L2791
+	b	.L2792
+.L2785:
 	orr	w0, w22, w20, lsl 24
-	b	.L2699
+	b	.L2805
 	.size	gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page
-	.section	.text.gc_scan_static_data,"ax",@progbits
+	.section	.text.gc_scan_src_blk,"ax",@progbits
 	.align	2
-	.global	gc_scan_static_data
-	.type	gc_scan_static_data, %function
-gc_scan_static_data:
-	stp	x29, x30, [sp, -80]!
+	.global	gc_scan_src_blk
+	.type	gc_scan_src_blk, %function
+gc_scan_src_blk:
+	stp	x29, x30, [sp, -96]!
+	mov	w0, 65535
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR5
+	adrp	x19, .LANCHOR65
 	stp	x21, x22, [sp, 32]
-	ldr	x0, [x19, #:lo12:.LANCHOR5]
-	ldr	w1, [x0, 544]
-	str	x23, [sp, 48]
-	cmn	w1, #1
-	beq	.L2701
-	adrp	x21, .LANCHOR195
-	adrp	x22, .LC0
-	add	x21, x21, :lo12:.LANCHOR195
-	add	x22, x22, :lo12:.LC0
-	mov	w20, 11
-.L2709:
-	ldr	x0, [x19, #:lo12:.LANCHOR5]
-	mov	w2, 0
-	add	x1, x29, 76
-	ldr	w0, [x0, 544]
-	bl	pm_log2phys
-	ldr	w0, [x29, 76]
-	cmn	w0, #1
-	beq	.L2702
-	mov	w0, 1
-	bl	buf_alloc
+	ldrh	w1, [x19, #:lo12:.LANCHOR65]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	cmp	w1, w0
+	bne	.L2807
+	adrp	x1, .LANCHOR202
+	adrp	x0, .LC0
+	mov	w2, 920
+	add	x1, x1, :lo12:.LANCHOR202
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2807:
+	ldrh	w1, [x19, #:lo12:.LANCHOR65]
+	mov	w0, 65535
+	cmp	w1, w0
+	beq	.L2827
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 8, .L2809
+	adrp	x2, .LANCHOR5
+	ubfiz	x0, x1, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR5]
+	ldrh	w2, [x2, x0]
+	adrp	x0, .LC192
+	add	x0, x0, :lo12:.LC192
+	bl	printf
+.L2809:
+	ldrh	w0, [x19, #:lo12:.LANCHOR65]
+	add	x14, x19, :lo12:.LANCHOR65
+	add	x1, x14, 40
+	bl	ftl_get_blk_list_in_sblk
+	and	w1, w0, 255
+	strb	w1, [x14, 5]
+	cbnz	w1, .L2810
+	mov	w0, -1
+	strh	w0, [x19, #:lo12:.LANCHOR65]
+.L2827:
+	mov	w0, 0
+	b	.L2806
+.L2810:
+	adrp	x4, .LANCHOR3
+	ldrh	w3, [x19, #:lo12:.LANCHOR65]
+	mov	x22, x4
+	ldr	x1, [x4, #:lo12:.LANCHOR3]
+	mov	x2, x3
+	add	x1, x1, x3, lsl 2
+	ldrb	w1, [x1, 2]
+	and	w1, w1, 224
+	cmp	w1, 32
+	beq	.L2811
+	cmp	w1, 224
+	beq	.L2811
+	cbz	w1, .L2812
+	adrp	x1, .LANCHOR6
+	ldr	x1, [x1, #:lo12:.LANCHOR6]
+	ldrh	w3, [x1, 16]
+	cmp	w3, w2
+	beq	.L2811
+	ldrh	w3, [x1, 48]
+	cmp	w3, w2
+	beq	.L2811
+	ldrh	w1, [x1, 80]
+	cmp	w1, w2
+	bne	.L2841
+.L2811:
+	add	x0, x19, :lo12:.LANCHOR65
+	mov	w1, -1
+	strh	w1, [x19, #:lo12:.LANCHOR65]
+	strh	wzr, [x0, 24]
+	b	.L2827
+.L2812:
+	adrp	x0, .LANCHOR5
+	mov	x20, x0
+	ldr	x1, [x0, #:lo12:.LANCHOR5]
+	ldrh	w1, [x1, x3, lsl 1]
+	cbz	w1, .L2814
+	adrp	x1, .LANCHOR202
+	adrp	x0, .LC0
+	mov	w2, 940
+	add	x1, x1, :lo12:.LANCHOR202
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2814:
+	ldrh	w1, [x19, #:lo12:.LANCHOR65]
+	ldr	x0, [x20, #:lo12:.LANCHOR5]
+	strh	wzr, [x0, x1, lsl 1]
+	b	.L2811
+.L2841:
+	and	w0, w0, 255
+	sub	w0, w0, #1
+	add	x0, x14, x0, sxtw 1
+	ldrh	w21, [x0, 40]
+	mov	w0, 65535
+	cmp	w21, w0
+	bne	.L2815
+	adrp	x1, .LANCHOR202
+	adrp	x0, .LC0
+	mov	w2, 948
+	add	x1, x1, :lo12:.LANCHOR202
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2815:
+	adrp	x1, .LANCHOR108
+	ldr	x3, [x22, #:lo12:.LANCHOR3]
+	adrp	x2, .LANCHOR83
+	adrp	x23, .LANCHOR75
+	ldrh	w20, [x1, #:lo12:.LANCHOR108]
+	mov	x24, x2
+	ldrh	w1, [x19, #:lo12:.LANCHOR65]
+	ldrh	w0, [x2, #:lo12:.LANCHOR83]
+	add	x1, x3, x1, lsl 2
+	sub	w0, w0, #1
+	and	w0, w0, 65535
+	mul	w20, w20, w21
+	ldrb	w1, [x1, 2]
+	and	w1, w1, 224
+	cmp	w1, 160
+	bne	.L2828
+	adrp	x1, .LANCHOR71
+	ldrb	w21, [x1, #:lo12:.LANCHOR71]
+	cmp	w21, 2
+	orr	w20, w20, w21, lsl 24
+	beq	.L2817
+	and	w21, w21, 65535
+.L2816:
+	add	x22, x19, :lo12:.LANCHOR65
+	orr	w20, w0, w20
+	mov	w0, 1
+	strb	w21, [x22, 6]
+	strh	wzr, [x22, 2]
+	strb	wzr, [x22, 4]
+	strh	wzr, [x22, 26]
+	bl	buf_alloc
+	str	w20, [x0, 40]
+	mov	x25, x0
+	mov	w1, 1
+	adrp	x20, .LANCHOR68
+	bl	sblk_read_page
+	ldrh	w2, [x23, #:lo12:.LANCHOR75]
+	adrp	x23, .LANCHOR76
+	mov	w1, 255
+	ldrb	w0, [x23, #:lo12:.LANCHOR76]
+	mul	w2, w2, w0
+	ldr	x0, [x20, #:lo12:.LANCHOR68]
+	lsl	w2, w2, 2
+	bl	ftl_memset
+	strh	wzr, [x22, 24]
+	ldr	w0, [x25, 52]
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	bne	.L2818
+.L2843:
+	mov	x0, x25
+	bl	buf_free
+	mov	w0, -1
+.L2806:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	ret
+.L2817:
+	ldrh	w0, [x23, #:lo12:.LANCHOR75]
+	sub	w0, w0, #1
+	and	w0, w0, 65535
+	b	.L2816
+.L2828:
+	mov	w21, 1
+	b	.L2816
+.L2818:
+	ldr	x0, [x25, 24]
+	ldr	w1, [x0]
+	mov	w0, 15555
+	movk	w0, 0xf55f, lsl 16
+	cmp	w1, w0
+	beq	.L2819
+	mov	w2, 980
+	adrp	x1, .LANCHOR202
+	adrp	x0, .LC0
+	add	x1, x1, :lo12:.LANCHOR202
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+	b	.L2843
+.L2819:
+	ldrb	w0, [x23, #:lo12:.LANCHOR76]
+	adrp	x22, .LANCHOR102
+	ldrh	w1, [x24, #:lo12:.LANCHOR83]
+	adrp	x23, .LANCHOR101
+	ldr	x24, [x25, 8]
+	add	x22, x22, :lo12:.LANCHOR102
+	add	x23, x23, :lo12:.LANCHOR101
+	mov	x26, 0
+	mul	w0, w0, w1
+	mul	w21, w21, w0
+	and	w21, w21, 65535
+.L2820:
+	cmp	w21, w26
+	bgt	.L2825
+	mov	x0, x25
+	bl	buf_free
+	adrp	x0, .LANCHOR5
+	ldrh	w1, [x19, #:lo12:.LANCHOR65]
+	add	x3, x19, :lo12:.LANCHOR65
+	mov	x20, x0
+	ldr	x4, [x0, #:lo12:.LANCHOR5]
+	ubfiz	x2, x1, 1, 16
+	ldrh	w3, [x3, 24]
+	ldrh	w2, [x4, x2]
+	cmp	w2, w3
+	beq	.L2826
+	adrp	x0, .LC193
+	add	x0, x0, :lo12:.LC193
+	bl	printf
+.L2826:
+	add	x0, x19, :lo12:.LANCHOR65
+	ldrh	w2, [x19, #:lo12:.LANCHOR65]
+	ldr	x1, [x20, #:lo12:.LANCHOR5]
+	ldrh	w3, [x0, 24]
+	strh	w3, [x1, x2, lsl 1]
+	strh	wzr, [x0, 28]
+	ldrh	w0, [x0, 24]
+	b	.L2806
+.L2825:
+	ldr	w0, [x24, x26, lsl 2]
+	cmn	w0, #1
+	beq	.L2822
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 92]
+	cmn	w0, #1
+	bne	.L2823
+	ldr	w0, [x24, x26, lsl 2]
+	mov	w2, 0
+	add	x1, x29, 92
+	bl	pm_log2phys
+.L2823:
+	ldrh	w1, [x22]
+	mov	w0, 21
+	ldr	w3, [x29, 92]
+	sub	w2, w0, w1
+	mov	w0, 1
+	lsl	w0, w0, w2
+	sub	w0, w0, #1
+	lsr	w1, w3, w1
+	and	w0, w0, w1
+	ldrb	w1, [x23]
+	ldrh	w2, [x19, #:lo12:.LANCHOR65]
+	udiv	w0, w0, w1
+	add	x1, x19, :lo12:.LANCHOR65
+	cmp	w0, w2
+	bne	.L2822
+	ldrh	w0, [x1, 24]
+	ldr	x4, [x20, #:lo12:.LANCHOR68]
+	ubfiz	x2, x0, 2, 16
+	add	w0, w0, 1
+	str	w3, [x4, x2]
+	strh	w0, [x1, 24]
+.L2822:
+	add	x26, x26, 1
+	b	.L2820
+	.size	gc_scan_src_blk, .-gc_scan_src_blk
+	.section	.text.gc_scan_static_data,"ax",@progbits
+	.align	2
+	.global	gc_scan_static_data
+	.type	gc_scan_static_data, %function
+gc_scan_static_data:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR6
+	stp	x21, x22, [sp, 32]
+	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	ldr	w1, [x0, 544]
+	str	x23, [sp, 48]
+	cmn	w1, #1
+	beq	.L2845
+	adrp	x21, .LANCHOR203
+	adrp	x22, .LC0
+	add	x21, x21, :lo12:.LANCHOR203
+	add	x22, x22, :lo12:.LC0
+	mov	w20, 11
+.L2853:
+	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	mov	w2, 0
+	add	x1, x29, 76
+	ldr	w0, [x0, 544]
+	bl	pm_log2phys
+	ldr	w0, [x29, 76]
+	cmn	w0, #1
+	beq	.L2846
+	mov	w0, 1
+	bl	buf_alloc
 	ldr	w1, [x29, 76]
 	mov	x23, x0
 	str	w1, [x0, 40]
@@ -16931,45 +17659,45 @@ gc_scan_static_data:
 	bl	sblk_read_page
 	ldr	w0, [x23, 52]
 	cmp	w0, 256
-	bne	.L2703
-	adrp	x0, .LANCHOR96
+	bne	.L2847
+	adrp	x0, .LANCHOR102
 	ldr	w2, [x29, 76]
 	mov	w1, 1
-	ldrh	w3, [x0, #:lo12:.LANCHOR96]
+	ldrh	w3, [x0, #:lo12:.LANCHOR102]
 	mov	w0, 21
 	sub	w0, w0, w3
 	lsr	w2, w2, w3
 	lsl	w0, w1, w0
 	sub	w0, w0, #1
 	and	w0, w0, w2
-	adrp	x2, .LANCHOR95
-	ldrb	w3, [x2, #:lo12:.LANCHOR95]
+	adrp	x2, .LANCHOR101
+	ldrb	w3, [x2, #:lo12:.LANCHOR101]
 	mov	w2, 0
 	udiv	w0, w0, w3
 	bl	gc_add_sblk
-.L2703:
-	ldr	x0, [x19, #:lo12:.LANCHOR5]
+.L2847:
+	ldr	x0, [x19, #:lo12:.LANCHOR6]
 	ldr	x1, [x23, 24]
 	ldr	w0, [x0, 544]
 	ldr	w1, [x1, 4]
 	cmp	w1, w0
-	beq	.L2704
-	mov	w2, 1369
+	beq	.L2848
+	mov	w2, 1419
 	mov	x1, x21
 	mov	x0, x22
 	bl	printf
-.L2704:
+.L2848:
 	mov	x0, x23
 	bl	buf_free
-.L2702:
-	ldr	x0, [x19, #:lo12:.LANCHOR5]
-	adrp	x2, .LANCHOR54
-	ldr	w2, [x2, #:lo12:.LANCHOR54]
+.L2846:
+	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	adrp	x2, .LANCHOR56
+	ldr	w2, [x2, #:lo12:.LANCHOR56]
 	ldr	w1, [x0, 544]
 	add	w1, w1, 1
 	str	w1, [x0, 544]
 	cmp	w1, w2
-	bcc	.L2705
+	bcc	.L2849
 	mov	w1, -1
 	str	w1, [x0, 544]
 	ldr	w1, [x0, 548]
@@ -16980,48 +17708,42 @@ gc_scan_static_data:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2700:
+.L2844:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2705:
+.L2849:
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	bne	.L2700
+	bne	.L2844
 	sub	w20, w20, #1
 	ands	w20, w20, 65535
-	bne	.L2709
-	b	.L2700
-.L2701:
-	adrp	x1, .LANCHOR97
-	ldr	x1, [x1, #:lo12:.LANCHOR97]
-	ldr	w2, [x1, 40]
-	cmp	w2, 20480
-	bls	.L2711
-	ldr	w3, [x1, 44]
-	add	w3, w3, w2, lsr 10
-	and	w2, w2, 1023
-	stp	w2, w3, [x1, 40]
-.L2711:
-	ldr	w2, [x0, 536]
-	ldr	w3, [x0, 12]
-	add	w2, w2, 12959744
-	add	w2, w2, 256
-	cmp	w3, w2
-	ldr	w2, [x1, 44]
-	bhi	.L2712
+	bne	.L2853
+	b	.L2844
+.L2845:
+	ldr	w1, [x0, 536]
+	adrp	x3, .LANCHOR100
+	ldr	w2, [x0, 12]
+	add	w1, w1, 12959744
+	add	w1, w1, 256
+	cmp	w2, w1
+	bhi	.L2855
+	ldr	x4, [x3, #:lo12:.LANCHOR100]
 	ldr	w1, [x0, 540]
 	add	w1, w1, 98304
+	ldr	w4, [x4, 44]
 	add	w1, w1, 1696
-	cmp	w2, w1
-	bls	.L2700
-.L2712:
-	str	w3, [x0, 536]
-	str	w2, [x0, 540]
+	cmp	w4, w1
+	bls	.L2844
+.L2855:
+	ldr	x1, [x3, #:lo12:.LANCHOR100]
+	ldr	w1, [x1, 44]
+	str	w1, [x0, 540]
+	str	w2, [x0, 536]
 	str	wzr, [x0, 544]
-	b	.L2700
+	b	.L2844
 	.size	gc_scan_static_data, .-gc_scan_static_data
 	.section	.text.ftl_sblk_dump,"ax",@progbits
 	.align	2
@@ -17029,116 +17751,125 @@ gc_scan_static_data:
 	.type	ftl_sblk_dump, %function
 ftl_sblk_dump:
 	sub	sp, sp, #272
+	and	x0, x0, 65535
 	stp	x29, x30, [sp, 48]
 	add	x29, sp, 48
+	stp	x23, x24, [sp, 96]
+	adrp	x24, .LANCHOR3
+	lsl	x23, x0, 2
+	stp	x0, x1, [x29, 144]
 	stp	x21, x22, [sp, 80]
-	and	w21, w0, 65535
+	mov	x21, x0
+	ldr	x0, [x24, #:lo12:.LANCHOR3]
 	stp	x19, x20, [sp, 64]
-	mov	w0, 65535
-	stp	x23, x24, [sp, 96]
-	cmp	w21, w0
+	add	x1, x0, x23
 	stp	x25, x26, [sp, 112]
 	stp	x27, x28, [sp, 128]
-	beq	.L2739
+	ldr	w5, [x0, x23]
+	ldrb	w2, [x1, 2]
+	mov	w1, w21
+	ldrh	w4, [x0, x23]
+	adrp	x0, .LC194
+	ubfx	x5, x5, 11, 8
+	add	x0, x0, :lo12:.LC194
+	ubfx	x3, x2, 3, 2
+	and	w4, w4, 2047
+	ubfx	x2, x2, 5, 3
+	bl	printf
+	mov	w0, 65535
+	cmp	w21, w0
+	beq	.L2882
 	adrp	x0, .LANCHOR2
 	ldrh	w0, [x0, #:lo12:.LANCHOR2]
 	cmp	w0, w21
-	bls	.L2739
-	uxtw	x0, w21
-	adrp	x25, .LANCHOR3
-	str	x0, [x29, 136]
-	lsl	x0, x0, 2
-	str	x0, [x29, 160]
-	ldr	x0, [x25, #:lo12:.LANCHOR3]
-	ldr	x2, [x29, 160]
-	add	x0, x0, x2
+	bls	.L2882
+	ldr	x0, [x24, #:lo12:.LANCHOR3]
+	add	x0, x0, x23
 	ldrb	w0, [x0, 2]
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L2740
-	adrp	x0, .LANCHOR67
-	ldrb	w24, [x0, #:lo12:.LANCHOR67]
-.L2720:
+	bne	.L2883
+	adrp	x0, .LANCHOR71
+	ldrb	w25, [x0, #:lo12:.LANCHOR71]
+.L2863:
 	add	x28, x29, 224
-	adrp	x19, .LANCHOR80
-	str	x1, [x29, 152]
+	adrp	x19, .LANCHOR83
 	mov	w0, w21
 	mov	w27, 0
 	mov	w20, 0
 	strh	w21, [x28, -32]!
 	add	x1, x28, 16
 	bl	ftl_get_blk_list_in_sblk
-	ldrh	w2, [x19, #:lo12:.LANCHOR80]
+	ldrh	w2, [x19, #:lo12:.LANCHOR83]
 	and	w1, w0, 255
 	strb	w1, [x29, 201]
 	and	w4, w0, 255
 	strb	wzr, [x29, 197]
-	mov	w3, w24
+	mov	w3, w25
 	strh	wzr, [x29, 194]
-	adrp	x0, .LC182
+	adrp	x0, .LC195
 	mul	w1, w1, w2
-	ldr	x2, [x29, 160]
-	strh	w1, [x29, 198]
-	add	x0, x0, :lo12:.LC182
-	ldr	x1, [x25, #:lo12:.LANCHOR3]
 	strh	wzr, [x29, 202]
-	add	x1, x1, x2
+	strh	w1, [x29, 198]
+	add	x0, x0, :lo12:.LC195
+	ldr	x1, [x24, #:lo12:.LANCHOR3]
+	add	x1, x1, x23
 	ldrb	w2, [x1, 2]
 	mov	w1, w21
 	ubfx	x2, x2, 5, 3
 	bl	printf
 	mov	w0, 1
 	bl	buf_alloc
-	str	x19, [x29, 128]
+	str	x19, [x29, 136]
 	mov	x26, x0
-	stp	wzr, wzr, [x29, 168]
-	adrp	x0, .LANCHOR103
-	add	x0, x0, :lo12:.LANCHOR103
-	str	x0, [x29, 104]
-.L2721:
-	ldr	x0, [x29, 128]
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	stp	wzr, wzr, [x29, 164]
+	adrp	x0, .LANCHOR108
+	add	x0, x0, :lo12:.LANCHOR108
+	str	x0, [x29, 112]
+.L2864:
+	ldr	x0, [x29, 136]
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
 	cmp	w0, w20
-	bls	.L2736
+	bls	.L2879
 	lsl	w0, w20, 1
-	mov	w23, 0
+	str	wzr, [x29, 172]
 	sub	w0, w0, #1
-	str	w0, [x29, 148]
-	adrp	x0, .LC129
-	add	x0, x0, :lo12:.LC129
-	str	x0, [x29, 112]
-	b	.L2737
-.L2740:
-	mov	w24, 1
-	b	.L2720
-.L2733:
-	ldr	x0, [x29, 120]
+	str	w0, [x29, 160]
+	adrp	x0, .LC147
+	add	x0, x0, :lo12:.LC147
+	str	x0, [x29, 120]
+	b	.L2880
+.L2883:
+	mov	w25, 1
+	b	.L2863
+.L2876:
+	ldr	x0, [x29, 128]
 	ldrh	w10, [x28, x0]
 	mov	w0, 65535
 	cmp	w10, w0
-	beq	.L2722
-	ldr	x0, [x29, 104]
-	cmp	w24, 3
+	beq	.L2865
+	ldr	x0, [x29, 112]
+	cmp	w25, 3
 	ldrh	w19, [x0]
 	mul	w19, w19, w10
-	bne	.L2723
+	bne	.L2866
 	add	w19, w20, w19
 	orr	w19, w19, w22, lsl 24
-.L2724:
+.L2867:
 	str	w19, [x26, 40]
 	mov	w1, 1
-	str	w10, [x29, 100]
+	str	w10, [x29, 104]
 	mov	x0, x26
 	bl	sblk_read_page
 	ldr	x1, [x26, 24]
 	mov	w3, w19
 	ldr	x0, [x26, 8]
 	ldr	w11, [x26, 52]
-	ldr	w10, [x29, 100]
+	ldr	w10, [x29, 104]
 	ldr	w2, [x1, 12]
 	mov	w4, w11
 	str	w2, [sp, 32]
-	str	w11, [x29, 144]
+	str	w11, [x29, 108]
 	ldr	w2, [x1, 8]
 	str	w2, [sp, 24]
 	ldr	w2, [x1, 4]
@@ -17151,130 +17882,132 @@ ftl_sblk_dump:
 	mov	w1, w10
 	ldp	w5, w6, [x0]
 	ldr	w7, [x0, 8]
-	ldr	x0, [x29, 112]
+	ldr	x0, [x29, 120]
 	bl	printf
-	ldr	w11, [x29, 144]
-	ldr	w0, [x29, 168]
+	ldr	w11, [x29, 108]
+	mov	w1, 32
+	ldr	w0, [x29, 164]
 	cmp	w11, 512
-	ldr	x1, [x29, 160]
 	ccmn	w11, #1, 4, ne
 	csinc	w0, w0, wzr, ne
-	str	w0, [x29, 168]
-	ldr	x0, [x25, #:lo12:.LANCHOR3]
-	add	x0, x0, x1
-	mov	w1, 32
+	str	w0, [x29, 164]
+	ldr	x0, [x24, #:lo12:.LANCHOR3]
+	add	x0, x0, x23
 	ldrb	w0, [x0, 2]
 	and	w0, w0, 224
 	cmp	w0, 224
 	ccmp	w0, w1, 4, ne
-	beq	.L2722
+	beq	.L2865
 	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L2727
+	bne	.L2870
 	ldr	x0, [x26, 24]
 	mov	w2, 0
 	add	x1, x29, 188
 	ldr	w0, [x0, 4]
 	bl	pm_log2phys
-.L2727:
+.L2870:
 	ldr	w0, [x29, 188]
 	cmp	w19, w0
-	bne	.L2728
-	ldr	w0, [x29, 172]
+	bne	.L2871
+	ldr	w0, [x29, 168]
 	mov	w1, w19
 	add	w0, w0, 1
-	str	w0, [x29, 172]
+	str	w0, [x29, 168]
 	ldr	x0, [x26, 24]
-	ldr	w3, [x29, 172]
+	ldr	w3, [x29, 168]
 	ldr	w2, [x0, 4]
-	adrp	x0, .LC183
-	add	x0, x0, :lo12:.LC183
+	adrp	x0, .LC196
+	add	x0, x0, :lo12:.LC196
 	bl	printf
-.L2728:
+.L2871:
 	ldr	x0, [x29, 152]
-	cbz	x0, .L2730
+	cbz	x0, .L2873
 	ubfiz	x19, x27, 2, 32
 	ldr	w2, [x0, x19]
 	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	cmp	w0, w2
-	beq	.L2731
-	adrp	x0, .LANCHOR7
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2731
-	adrp	x0, .LC184
+	beq	.L2874
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L2874
+	adrp	x0, .LC197
 	mov	w1, w27
-	add	x0, x0, :lo12:.LC184
+	add	x0, x0, :lo12:.LC197
 	bl	printf
-.L2731:
+.L2874:
 	ldr	x1, [x26, 24]
 	ldr	x0, [x29, 152]
 	ldr	w1, [x1, 4]
 	ldr	w0, [x0, x19]
 	cmp	w1, w0
-	beq	.L2730
+	beq	.L2873
 	cmn	w0, #1
-	beq	.L2730
-	adrp	x1, .LANCHOR196
+	beq	.L2873
+	adrp	x1, .LANCHOR204
 	adrp	x0, .LC0
-	mov	w2, 1193
-	add	x1, x1, :lo12:.LANCHOR196
+	mov	w2, 1300
+	add	x1, x1, :lo12:.LANCHOR204
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2730:
+.L2873:
 	add	w27, w27, 1
-.L2722:
+.L2865:
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L2735:
-	cmp	w24, w22
-	bcs	.L2733
-	add	w23, w23, 1
-	and	w23, w23, 65535
-.L2737:
+.L2878:
+	cmp	w25, w22
+	bcs	.L2876
+	ldr	w0, [x29, 172]
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	str	w0, [x29, 172]
+.L2880:
 	ldrb	w0, [x29, 201]
-	cmp	w0, w23
-	bls	.L2734
-	sxtw	x0, w23
+	ldr	w1, [x29, 172]
+	cmp	w0, w1
+	bls	.L2877
+	ldrsw	x0, [x29, 172]
 	mov	w22, 1
 	add	x0, x0, 8
 	lsl	x0, x0, 1
-	str	x0, [x29, 120]
-	b	.L2735
-.L2723:
-	cmp	w24, 2
-	bne	.L2725
-	ldr	w0, [x29, 148]
+	str	x0, [x29, 128]
+	b	.L2878
+.L2866:
+	cmp	w25, 2
+	bne	.L2868
+	ldr	w0, [x29, 160]
 	add	w19, w19, w0
-	adrp	x0, .LANCHOR67
+	adrp	x0, .LANCHOR71
 	add	w19, w19, w22
-	ldrb	w0, [x0, #:lo12:.LANCHOR67]
+	ldrb	w0, [x0, #:lo12:.LANCHOR71]
 	orr	w19, w19, w0, lsl 24
-	b	.L2724
-.L2725:
+	b	.L2867
+.L2868:
 	add	w19, w20, w19
-	b	.L2724
-.L2734:
+	b	.L2867
+.L2877:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2721
-.L2736:
+	b	.L2864
+.L2879:
 	mov	x0, x26
 	bl	buf_free
-	adrp	x0, .LANCHOR4
-	ldr	x1, [x29, 136]
-	ldr	w3, [x29, 172]
-	ldr	x0, [x0, #:lo12:.LANCHOR4]
+	adrp	x0, .LANCHOR5
+	ldr	x1, [x29, 144]
+	ldr	w3, [x29, 168]
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	ldrh	w2, [x0, x1, lsl 1]
 	mov	w1, w21
-	adrp	x0, .LC185
-	add	x0, x0, :lo12:.LC185
+	adrp	x0, .LC198
+	add	x0, x0, :lo12:.LC198
 	bl	printf
-	ldr	w0, [x29, 168]
-.L2718:
+	ldr	w0, [x29, 164]
+.L2861:
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
 	ldp	x23, x24, [sp, 96]
@@ -17283,9 +18016,9 @@ ftl_sblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 272
 	ret
-.L2739:
+.L2882:
 	mov	w0, 0
-	b	.L2718
+	b	.L2861
 	.size	ftl_sblk_dump, .-ftl_sblk_dump
 	.section	.text.zftl_read,"ax",@progbits
 	.align	2
@@ -17296,40 +18029,40 @@ zftl_read:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	mov	w21, w0
-	adrp	x0, .LANCHOR7
+	adrp	x0, .LANCHOR9
 	stp	x23, x24, [sp, 48]
 	stp	x19, x20, [sp, 16]
 	mov	w24, w2
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
 	mov	w19, w1
 	stp	x25, x26, [sp, 64]
 	mov	x23, x3
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2751
+	tbz	x0, 12, .L2894
 	mov	w3, w2
-	adrp	x0, .LC186
+	adrp	x0, .LC199
 	mov	w2, w1
-	add	x0, x0, :lo12:.LC186
+	add	x0, x0, :lo12:.LC199
 	mov	w1, w21
 	bl	printf
-.L2751:
-	cbnz	w21, .L2752
-	adrp	x0, .LANCHOR59
+.L2894:
+	cbnz	w21, .L2895
+	adrp	x0, .LANCHOR61
 	mov	w21, 24576
-	ldr	w0, [x0, #:lo12:.LANCHOR59]
-.L2753:
+	ldr	w0, [x0, #:lo12:.LANCHOR61]
+.L2896:
 	add	w1, w19, w24
 	cmp	w0, w1
-	bcc	.L2777
-	adrp	x1, .LANCHOR97
-	adrp	x25, .LANCHOR117
+	bcc	.L2920
+	adrp	x1, .LANCHOR100
+	adrp	x25, .LANCHOR123
 	add	w21, w21, w19
 	str	x1, [x29, 120]
-	ldr	x2, [x1, #:lo12:.LANCHOR97]
+	ldr	x2, [x1, #:lo12:.LANCHOR100]
 	ldr	w0, [x2, 24]
 	add	w0, w0, w24
 	str	w0, [x2, 24]
-	ldrb	w0, [x25, #:lo12:.LANCHOR117]
+	ldrb	w0, [x25, #:lo12:.LANCHOR123]
 	add	w2, w24, w21
 	stp	w2, wzr, [x29, 136]
 	sub	w2, w2, #1
@@ -17339,16 +18072,16 @@ zftl_read:
 	sub	w26, w0, w27
 	str	w0, [x29, 132]
 	add	w26, w26, 1
-	adrp	x0, .LANCHOR197
-	add	x0, x0, :lo12:.LANCHOR197
+	adrp	x0, .LANCHOR205
+	add	x0, x0, :lo12:.LANCHOR205
 	str	x0, [x29, 112]
-	adrp	x0, .LANCHOR46
-	add	x0, x0, :lo12:.LANCHOR46
+	adrp	x0, .LANCHOR48
+	add	x0, x0, :lo12:.LANCHOR48
 	str	x0, [x29, 104]
-.L2755:
-	cbnz	w26, .L2775
+.L2898:
+	cbnz	w26, .L2918
 	ldr	w0, [x29, 140]
-.L2750:
+.L2893:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -17356,21 +18089,21 @@ zftl_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L2752:
+.L2895:
 	cmp	w21, 3
-	bhi	.L2777
+	bhi	.L2920
 	lsl	w21, w21, 13
 	mov	w0, 8192
-	b	.L2753
-.L2775:
-	ldrb	w1, [x25, #:lo12:.LANCHOR117]
+	b	.L2896
+.L2918:
+	ldrb	w1, [x25, #:lo12:.LANCHOR123]
 	cmp	w20, w27
 	ldr	w0, [x29, 132]
 	and	w19, w1, 65535
 	ccmp	w20, w0, 4, ne
-	bne	.L2778
+	bne	.L2921
 	cmp	w20, w27
-	bne	.L2757
+	bne	.L2900
 	udiv	w22, w21, w1
 	and	w0, w24, 65535
 	msub	w1, w22, w1, w21
@@ -17379,17 +18112,17 @@ zftl_read:
 	and	w19, w19, 65535
 	cmp	w24, w19
 	csel	w19, w0, w19, cc
-.L2756:
-	adrp	x0, .LANCHOR46
-	add	x1, x0, :lo12:.LANCHOR46
+.L2899:
+	adrp	x0, .LANCHOR48
+	add	x1, x0, :lo12:.LANCHOR48
 	add	x1, x1, 2
 	mov	w0, 0
-.L2760:
+.L2903:
 	ldr	w2, [x1, 34]
 	cmp	w20, w2
-	bne	.L2758
+	bne	.L2901
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L2758
+	tbz	x2, 3, .L2901
 	ldr	x1, [x29, 104]
 	ubfiz	x0, x0, 6, 32
 	lsl	w2, w19, 9
@@ -17401,104 +18134,104 @@ zftl_read:
 	add	x23, x23, x19
 	add	x1, x1, x22
 	bl	ftl_memcpy
-.L2759:
+.L2902:
 	add	w20, w20, 1
 	sub	w26, w26, #1
-	b	.L2755
-.L2757:
+	b	.L2898
+.L2900:
 	ldr	w0, [x29, 136]
 	msub	w19, w1, w20, w0
 	and	w19, w19, 255
-.L2778:
+.L2921:
 	mov	w22, 0
-	b	.L2756
-.L2758:
+	b	.L2899
+.L2901:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 32
-	bne	.L2760
+	bne	.L2903
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 156]
 	cmn	w0, #1
-	bne	.L2761
+	bne	.L2904
 	mov	w2, 0
 	add	x1, x29, 156
 	mov	w0, w20
 	bl	pm_log2phys
-.L2761:
+.L2904:
 	ldr	w0, [x29, 156]
 	cmn	w0, #1
-	bne	.L2762
-	add	x22, x25, :lo12:.LANCHOR117
+	bne	.L2905
+	add	x22, x25, :lo12:.LANCHOR123
 	mov	w19, 0
-.L2763:
+.L2906:
 	ldrb	w0, [x22]
 	cmp	w19, w0
-	bcs	.L2759
+	bcs	.L2902
 	madd	w0, w20, w0, w19
 	cmp	w21, w0
-	bhi	.L2764
+	bhi	.L2907
 	ldr	w1, [x29, 136]
 	cmp	w1, w0
-	bls	.L2764
+	bls	.L2907
 	mov	x0, x23
 	add	x23, x23, 512
 	mov	w2, 512
 	mov	w1, 0
 	bl	ftl_memset
-.L2764:
+.L2907:
 	add	w19, w19, 1
-	b	.L2763
-.L2762:
+	b	.L2906
+.L2905:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbnz	x0, .L2766
+	cbnz	x0, .L2909
 	bl	ftl_read_ahead
-	b	.L2755
-.L2766:
+	b	.L2898
+.L2909:
 	ldr	x0, [x29, 120]
-	ldr	x1, [x0, #:lo12:.LANCHOR97]
+	ldr	x1, [x0, #:lo12:.LANCHOR100]
 	ldr	w0, [x1, 40]
 	add	w0, w0, 1
 	str	w0, [x1, 40]
 	ldr	w0, [x29, 156]
 	stp	w0, w0, [x28, 40]
-	ldrb	w0, [x25, #:lo12:.LANCHOR117]
+	ldrb	w0, [x25, #:lo12:.LANCHOR123]
 	cmp	w0, w19
-	bne	.L2768
+	bne	.L2911
 	str	x23, [x28, 16]
-.L2768:
+.L2911:
 	mov	w1, 1
 	mov	x0, x28
 	bl	sblk_read_page
 	ldr	w10, [x28, 52]
 	cmn	w10, #1
-	bne	.L2769
-	adrp	x0, .LANCHOR5
+	bne	.L2912
+	adrp	x0, .LANCHOR6
 	str	w10, [x29, 140]
-	ldr	x1, [x0, #:lo12:.LANCHOR5]
+	ldr	x1, [x0, #:lo12:.LANCHOR6]
 	ldr	w0, [x1, 552]
 	add	w0, w0, 1
 	str	w0, [x1, 552]
-.L2770:
+.L2913:
 	ldr	x0, [x28, 24]
 	ldr	w5, [x0, 4]
 	cmp	w20, w5
-	beq	.L2771
+	beq	.L2914
 	ldr	w4, [x0]
 	mov	w2, w20
 	ldp	w6, w7, [x0, 8]
 	str	w10, [x29, 128]
 	ldrb	w1, [x28, 1]
-	adrp	x0, .LC159
+	adrp	x0, .LC171
 	ldr	w3, [x29, 156]
-	add	x0, x0, :lo12:.LC159
+	add	x0, x0, :lo12:.LC171
 	bl	printf
-	adrp	x0, .LANCHOR96
+	adrp	x0, .LANCHOR102
 	ldr	w1, [x29, 156]
-	ldrh	w3, [x0, #:lo12:.LANCHOR96]
+	ldrh	w3, [x0, #:lo12:.LANCHOR102]
 	mov	w0, 21
 	sub	w2, w0, w3
 	mov	w0, 1
@@ -17506,48 +18239,48 @@ zftl_read:
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR95
-	ldrb	w2, [x1, #:lo12:.LANCHOR95]
+	adrp	x1, .LANCHOR101
+	ldrb	w2, [x1, #:lo12:.LANCHOR101]
 	mov	x1, 0
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
 	ldr	w10, [x29, 128]
-.L2771:
+.L2914:
 	ldr	x0, [x28, 24]
 	ldr	w0, [x0, 4]
 	cmp	w20, w0
-	bne	.L2772
+	bne	.L2915
 	cmn	w10, #1
-	bne	.L2773
-.L2772:
+	bne	.L2916
+.L2915:
 	ldr	x1, [x29, 112]
 	adrp	x0, .LC0
-	mov	w2, 1031
+	mov	w2, 1048
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2773:
+.L2916:
 	ldr	x0, [x28, 16]
-	cbnz	x0, .L2774
+	cbnz	x0, .L2917
 	ldr	x1, [x28, 8]
 	ubfiz	x22, x22, 9, 16
 	lsl	w2, w19, 9
 	mov	x0, x23
 	add	x1, x1, x22
 	bl	ftl_memcpy
-.L2774:
+.L2917:
 	ubfiz	x19, x19, 9, 16
 	mov	x0, x28
 	add	x23, x23, x19
 	bl	buf_free
-	b	.L2759
-.L2769:
+	b	.L2902
+.L2912:
 	cmp	w10, 256
-	bne	.L2770
-	adrp	x0, .LANCHOR96
+	bne	.L2913
+	adrp	x0, .LANCHOR102
 	mov	w4, 21
 	mov	w5, 1
 	stp	w10, w5, [x29, 96]
-	ldrh	w1, [x0, #:lo12:.LANCHOR96]
+	ldrh	w1, [x0, #:lo12:.LANCHOR102]
 	ldr	w0, [x29, 156]
 	sub	w4, w4, w1
 	ldp	w2, w3, [x28, 36]
@@ -17555,11 +18288,11 @@ zftl_read:
 	lsr	w0, w0, w1
 	sub	w4, w4, #1
 	and	w4, w4, w0
-	adrp	x0, .LANCHOR95
-	ldrb	w0, [x0, #:lo12:.LANCHOR95]
+	adrp	x0, .LANCHOR101
+	ldrb	w0, [x0, #:lo12:.LANCHOR101]
 	udiv	w4, w4, w0
-	adrp	x0, .LC187
-	add	x0, x0, :lo12:.LC187
+	adrp	x0, .LC200
+	add	x0, x0, :lo12:.LC200
 	and	w1, w4, 65535
 	str	w4, [x29, 128]
 	bl	printf
@@ -17570,10 +18303,10 @@ zftl_read:
 	mov	w0, w4
 	bl	gc_add_sblk
 	ldr	w10, [x29, 96]
-	b	.L2770
-.L2777:
+	b	.L2913
+.L2920:
 	mov	w0, -1
-	b	.L2750
+	b	.L2893
 	.size	zftl_read, .-zftl_read
 	.section	.text.zftl_vendor_read,"ax",@progbits
 	.align	2
@@ -17638,883 +18371,102 @@ ftl_read:
 	and	w0, w0, 255
 	b	zftl_read
 	.size	ftl_read, .-ftl_read
-	.section	.text.vpn_check,"ax",@progbits
+	.section	.text.ftl_update_l2p_map,"ax",@progbits
 	.align	2
-	.global	vpn_check
-	.type	vpn_check, %function
-vpn_check:
+	.global	ftl_update_l2p_map
+	.type	ftl_update_l2p_map, %function
+ftl_update_l2p_map:
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR5
+	mov	x22, x0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR4
+	adrp	x0, .LANCHOR83
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR54
 	stp	x25, x26, [sp, 64]
-	adrp	x24, .LANCHOR2
 	stp	x27, x28, [sp, 80]
-	bl	dump_ftl_info
-	ldr	x0, [x21, #:lo12:.LANCHOR5]
-	add	x23, x23, :lo12:.LANCHOR54
-	add	x25, x24, :lo12:.LANCHOR2
-	mov	w22, 0
-	adrp	x20, check_vpc_tbl
-	ldrh	w3, [x0, 80]
-	ldrh	w2, [x0, 48]
-	ldrh	w1, [x0, 16]
-	adrp	x0, .LC188
-	add	x0, x0, :lo12:.LC188
-	bl	printf
-	ldr	x0, [x21, #:lo12:.LANCHOR5]
-	ldr	x3, [x19, #:lo12:.LANCHOR4]
-	ldrh	w1, [x0, 16]
-	ldrh	w2, [x0, 22]
-	ubfiz	x0, x1, 1, 16
-	ldrh	w3, [x3, x0]
-	adrp	x0, .LC189
-	add	x0, x0, :lo12:.LC189
-	sub	w4, w3, w2
-	bl	printf
-	ldr	x0, [x21, #:lo12:.LANCHOR5]
-	ldr	x3, [x19, #:lo12:.LANCHOR4]
-	ldrh	w1, [x0, 48]
-	ldrh	w2, [x0, 54]
-	ubfiz	x0, x1, 1, 16
-	ldrh	w3, [x3, x0]
-	adrp	x0, .LC190
-	add	x0, x0, :lo12:.LC190
-	sub	w4, w3, w2
+	ldrh	w23, [x0, #:lo12:.LANCHOR83]
+	ldrb	w0, [x22, 9]
+	ldrh	w19, [x22, 12]
+	mul	w23, w23, w0
+	adrp	x0, .LANCHOR114
+	str	x0, [x29, 104]
+	ldr	x1, [x0, #:lo12:.LANCHOR114]
+	add	x19, x1, x19, lsl 2
+	add	x1, x19, x23, sxtw 2
+	ldr	w1, [x1, -4]
+	cmn	w1, #1
+	beq	.L2937
+	adrp	x1, .LANCHOR206
+	adrp	x0, .LC0
+	mov	w2, 1576
+	add	x1, x1, :lo12:.LANCHOR206
+	add	x0, x0, :lo12:.LC0
 	bl	printf
-	mov	w2, 4608
-	mov	w1, 0
-	add	x0, x20, :lo12:check_vpc_tbl
-	bl	ftl_memset
-.L2794:
-	ldr	w0, [x23]
-	cmp	w22, w0
-	bcc	.L2802
-	adrp	x0, .LANCHOR2
-	adrp	x24, .LC193
-	add	x5, x0, :lo12:.LANCHOR2
-	mov	x28, x0
-	add	x24, x24, :lo12:.LC193
-	mov	w23, 0
-	mov	w22, 0
-.L2803:
-	ldrh	w0, [x5]
-	cmp	w0, w22
-	bhi	.L2805
-	adrp	x24, .LANCHOR198
-	adrp	x25, .LC0
-	add	x22, x28, :lo12:.LANCHOR2
-	add	x24, x24, :lo12:.LANCHOR198
-	add	x25, x25, :lo12:.LC0
+.L2937:
+	adrp	x27, .LANCHOR123
+	mov	x24, 0
+	add	x0, x27, :lo12:.LANCHOR123
 	mov	w21, 0
-.L2806:
-	ldrh	w0, [x22]
-	cmp	w0, w21
-	bhi	.L2812
-	mov	w2, w23
-	adrp	x1, .LANCHOR198
-	adrp	x0, .LC195
-	add	x1, x1, :lo12:.LANCHOR198
-	add	x0, x0, :lo12:.LC195
+	str	x0, [x29, 96]
+.L2938:
+	cmp	w24, w23
+	blt	.L2944
+	adrp	x0, .LANCHOR9
+	adrp	x19, .LANCHOR5
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L2945
+	ldrh	w1, [x22]
+	ldr	x2, [x19, #:lo12:.LANCHOR5]
+	ubfiz	x0, x1, 1, 16
+	ldrh	w3, [x2, x0]
+	adrp	x0, .LC204
+	mov	w2, w21
+	add	x0, x0, :lo12:.LC204
 	bl	printf
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
+.L2945:
+	ldrh	w1, [x22]
+	ldr	x0, [x19, #:lo12:.LANCHOR5]
 	ldp	x23, x24, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	strh	w21, [x0, x1, lsl 1]
 	ldp	x25, x26, [sp, 64]
+	ldp	x21, x22, [sp, 32]
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2802:
-	mov	w0, w22
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 124]
-	cmn	w0, #1
-	bne	.L2795
-	mov	w2, 0
-	add	x1, x29, 124
-	mov	w0, w22
-	bl	pm_log2phys
-.L2796:
-	ldr	w2, [x29, 124]
+.L2944:
+	ldr	w2, [x19, x24, lsl 2]
 	cmn	w2, #1
-	beq	.L2798
-	adrp	x0, .LANCHOR96
-	mov	w3, 21
-	ldrh	w0, [x0, #:lo12:.LANCHOR96]
-	sub	w1, w3, w0
-	mov	w3, 1
-	lsr	w0, w2, w0
-	lsl	w3, w3, w1
-	sub	w3, w3, #1
-	and	w3, w3, w0
-	adrp	x0, .LANCHOR95
-	ldrb	w0, [x0, #:lo12:.LANCHOR95]
-	udiv	w3, w3, w0
-	ldrh	w0, [x24, #:lo12:.LANCHOR2]
-	and	w26, w3, 65535
-	and	w3, w3, 65535
-	cmp	w0, w26
-	bls	.L2799
-	add	x0, x20, :lo12:check_vpc_tbl
-	sxtw	x3, w3
-	ldrh	w1, [x0, x3, lsl 1]
-	add	w1, w1, 1
-	strh	w1, [x0, x3, lsl 1]
-.L2800:
-	ldrh	w0, [x25]
-	cmp	w0, w26
-	bhi	.L2798
-	adrp	x1, .LANCHOR198
-	adrp	x0, .LC0
-	mov	w2, 1267
-	add	x1, x1, :lo12:.LANCHOR198
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2798:
-	add	w22, w22, 1
-	b	.L2794
-.L2795:
-	adrp	x1, .LANCHOR96
-	ldrh	w3, [x1, #:lo12:.LANCHOR96]
-	mov	w1, 21
-	sub	w2, w1, w3
-	mov	w1, 1
-	lsr	w0, w0, w3
-	lsl	w1, w1, w2
-	sub	w1, w1, #1
-	and	w0, w1, w0
-	adrp	x1, .LANCHOR95
-	ldrb	w1, [x1, #:lo12:.LANCHOR95]
-	udiv	w0, w0, w1
-	ldrh	w1, [x24, #:lo12:.LANCHOR2]
-	cmp	w1, w0, uxth
-	bhi	.L2796
-	mov	w2, 1257
-	adrp	x1, .LANCHOR198
-	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR198
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-	b	.L2796
-.L2799:
-	mov	w1, w22
-	adrp	x0, .LC191
-	add	x0, x0, :lo12:.LC191
-	bl	printf
-	adrp	x0, .LANCHOR117
-	mov	w2, 4
-	ldrb	w3, [x0, #:lo12:.LANCHOR117]
-	adrp	x0, .LANCHOR123+8
-	ldr	x1, [x0, #:lo12:.LANCHOR123+8]
-	adrp	x0, .LC192
-	lsl	w3, w3, 7
-	add	x0, x0, :lo12:.LC192
-	bl	rknand_print_hex
-	b	.L2800
-.L2805:
-	uxtw	x0, w22
-	ldr	x1, [x19, #:lo12:.LANCHOR4]
-	lsl	x27, x0, 1
-	add	x25, x20, :lo12:check_vpc_tbl
-	sxtw	x26, w22
-	ldrh	w3, [x1, x27]
-	ldrh	w2, [x25, x26, lsl 1]
-	cmp	w3, w2
-	beq	.L2804
-	adrp	x1, .LANCHOR3
-	str	x5, [x29, 104]
-	ldr	x1, [x1, #:lo12:.LANCHOR3]
-	add	x0, x1, x0, lsl 2
-	mov	w1, w22
-	ldrb	w4, [x0, 2]
-	mov	x0, x24
-	ubfx	x4, x4, 5, 3
+	beq	.L2939
+	ldrb	w20, [x27, #:lo12:.LANCHOR123]
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	lsl	w20, w20, 7
+	udiv	w20, w2, w20
+	and	w20, w20, 65535
+	tbz	x0, 12, .L2940
+	adrp	x0, .LC201
+	mov	w3, w24
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC201
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR4]
-	mov	w1, 65535
-	ldr	x5, [x29, 104]
-	ldrh	w0, [x0, x27]
-	cmp	w0, w1
-	beq	.L2804
-	ldrh	w1, [x25, x26, lsl 1]
-	cmp	w1, w0
-	bls	.L2804
-	ldr	x0, [x21, #:lo12:.LANCHOR5]
-	ldrh	w1, [x0, 16]
-	cmp	w1, w22
-	beq	.L2804
-	ldrh	w1, [x0, 80]
-	cmp	w1, w22
-	beq	.L2804
-	ldrh	w0, [x0, 48]
-	cmp	w0, w22
-	csinc	w23, w23, wzr, eq
-.L2804:
-	add	w0, w22, 1
-	and	w22, w0, 65535
-	b	.L2803
-.L2812:
-	adrp	x0, .LANCHOR3
-	uxtw	x26, w21
-	ldr	x0, [x0, #:lo12:.LANCHOR3]
-	add	x0, x0, x26, lsl 2
-	ldrb	w0, [x0, 2]
-	tst	w0, 224
-	bne	.L2808
-	add	x0, x20, :lo12:check_vpc_tbl
-	sxtw	x27, w21
-	ldrh	w0, [x0, x27, lsl 1]
-	cbnz	w0, .L2809
-	ldr	x0, [x19, #:lo12:.LANCHOR4]
-	lsl	x28, x26, 1
-	ldrh	w0, [x0, x28]
-	cbz	w0, .L2810
-	adrp	x0, .LC194
-	mov	w1, w21
-	add	x0, x0, :lo12:.LC194
-	bl	printf
-.L2810:
-	ldr	x0, [x19, #:lo12:.LANCHOR4]
-	strh	wzr, [x0, x28]
-.L2809:
-	ldr	x0, [x19, #:lo12:.LANCHOR4]
-	ldrh	w0, [x0, x26, lsl 1]
-	cbz	w0, .L2808
-	add	x0, x20, :lo12:check_vpc_tbl
-	ldrh	w0, [x0, x27, lsl 1]
-	cbz	w0, .L2808
-	mov	w2, 1299
-	mov	x1, x24
-	mov	x0, x25
-	bl	printf
-.L2808:
-	add	w21, w21, 1
-	and	w21, w21, 65535
-	b	.L2806
-	.size	vpn_check, .-vpn_check
-	.section	.text.gc_scan_src_blk,"ax",@progbits
-	.align	2
-	.global	gc_scan_src_blk
-	.type	gc_scan_src_blk, %function
-gc_scan_src_blk:
-	stp	x29, x30, [sp, -96]!
-	mov	w0, 65535
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR63
-	stp	x21, x22, [sp, 32]
-	ldrh	w1, [x19, #:lo12:.LANCHOR63]
-	stp	x23, x24, [sp, 48]
-	stp	x25, x26, [sp, 64]
-	cmp	w1, w0
-	bne	.L2824
-	adrp	x1, .LANCHOR199
-	adrp	x0, .LC0
-	mov	w2, 897
-	add	x1, x1, :lo12:.LANCHOR199
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2824:
-	ldrh	w1, [x19, #:lo12:.LANCHOR63]
-	mov	w0, 65535
-	cmp	w1, w0
-	beq	.L2846
-	adrp	x0, .LANCHOR7
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L2826
-	adrp	x2, .LANCHOR4
-	ubfiz	x0, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR4]
-	ldrh	w2, [x2, x0]
-	adrp	x0, .LC196
-	add	x0, x0, :lo12:.LC196
-	bl	printf
-.L2826:
-	ldrh	w0, [x19, #:lo12:.LANCHOR63]
-	add	x14, x19, :lo12:.LANCHOR63
-	add	x1, x14, 40
-	bl	ftl_get_blk_list_in_sblk
-	and	w1, w0, 255
-	strb	w1, [x14, 5]
-	cbnz	w1, .L2827
-	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR63]
-.L2846:
-	mov	w0, 0
-	b	.L2823
-.L2827:
-	adrp	x4, .LANCHOR3
-	ldrh	w3, [x19, #:lo12:.LANCHOR63]
-	mov	x22, x4
-	ldr	x1, [x4, #:lo12:.LANCHOR3]
-	mov	x2, x3
-	add	x1, x1, x3, lsl 2
-	ldrb	w1, [x1, 2]
-	and	w1, w1, 224
-	cmp	w1, 32
-	beq	.L2828
-	cmp	w1, 224
-	beq	.L2828
-	cbz	w1, .L2829
-	adrp	x1, .LANCHOR5
-	ldr	x1, [x1, #:lo12:.LANCHOR5]
-	ldrh	w3, [x1, 16]
-	cmp	w3, w2
-	beq	.L2828
-	ldrh	w3, [x1, 48]
-	cmp	w3, w2
-	beq	.L2828
-	ldrh	w1, [x1, 80]
-	cmp	w1, w2
-	bne	.L2860
-.L2828:
-	add	x0, x19, :lo12:.LANCHOR63
-	mov	w1, -1
-	strh	w1, [x19, #:lo12:.LANCHOR63]
-	strh	wzr, [x0, 24]
-	b	.L2846
-.L2829:
-	adrp	x0, .LANCHOR4
-	mov	x20, x0
-	ldr	x1, [x0, #:lo12:.LANCHOR4]
-	ldrh	w1, [x1, x3, lsl 1]
-	cbz	w1, .L2831
-	adrp	x1, .LANCHOR199
-	adrp	x0, .LC0
-	mov	w2, 917
-	add	x1, x1, :lo12:.LANCHOR199
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2831:
-	ldrh	w1, [x19, #:lo12:.LANCHOR63]
-	ldr	x0, [x20, #:lo12:.LANCHOR4]
-	strh	wzr, [x0, x1, lsl 1]
-	b	.L2828
-.L2860:
-	and	w0, w0, 255
-	sub	w0, w0, #1
-	add	x0, x14, x0, sxtw 1
-	ldrh	w21, [x0, 40]
-	mov	w0, 65535
-	cmp	w21, w0
-	bne	.L2832
-	adrp	x1, .LANCHOR199
-	adrp	x0, .LC0
-	mov	w2, 925
-	add	x1, x1, :lo12:.LANCHOR199
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2832:
-	adrp	x1, .LANCHOR103
-	ldr	x3, [x22, #:lo12:.LANCHOR3]
-	adrp	x2, .LANCHOR80
-	adrp	x23, .LANCHOR71
-	ldrh	w20, [x1, #:lo12:.LANCHOR103]
-	mov	x24, x2
-	ldrh	w1, [x19, #:lo12:.LANCHOR63]
-	ldrh	w0, [x2, #:lo12:.LANCHOR80]
-	add	x1, x3, x1, lsl 2
-	sub	w0, w0, #1
-	and	w0, w0, 65535
-	mul	w20, w20, w21
-	ldrb	w1, [x1, 2]
-	and	w1, w1, 224
-	cmp	w1, 160
-	bne	.L2847
-	adrp	x1, .LANCHOR67
-	ldrb	w21, [x1, #:lo12:.LANCHOR67]
-	cmp	w21, 2
-	orr	w20, w20, w21, lsl 24
-	beq	.L2834
-	and	w21, w21, 65535
-.L2833:
-	add	x22, x19, :lo12:.LANCHOR63
-	orr	w20, w0, w20
-	mov	w0, 1
-	strb	w21, [x22, 6]
-	strh	wzr, [x22, 2]
-	strb	wzr, [x22, 4]
-	strh	wzr, [x22, 26]
-	bl	buf_alloc
-	str	w20, [x0, 40]
-	mov	x25, x0
-	mov	w1, 1
-	adrp	x20, .LANCHOR64
-	bl	sblk_read_page
-	ldrh	w2, [x23, #:lo12:.LANCHOR71]
-	adrp	x23, .LANCHOR72
-	mov	w1, 255
-	ldrb	w0, [x23, #:lo12:.LANCHOR72]
-	mul	w2, w2, w0
-	ldr	x0, [x20, #:lo12:.LANCHOR64]
-	lsl	w2, w2, 2
-	bl	ftl_memset
-	strh	wzr, [x22, 24]
-	ldr	w0, [x25, 52]
-	cmp	w0, 512
-	ccmn	w0, #1, 4, ne
-	bne	.L2835
-.L2837:
-	mov	x0, x25
-	bl	buf_free
-	mov	w0, -1
-.L2823:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 96
-	ret
-.L2834:
-	ldrh	w0, [x23, #:lo12:.LANCHOR71]
-	sub	w0, w0, #1
-	and	w0, w0, 65535
-	b	.L2833
-.L2847:
-	mov	w21, 1
-	b	.L2833
-.L2835:
-	ldr	x0, [x25, 24]
-	mov	w22, 15555
-	movk	w22, 0xf55f, lsl 16
-	ldr	w0, [x0]
-	cmp	w0, w22
-	beq	.L2836
-	ldrh	w0, [x19, #:lo12:.LANCHOR63]
-	mov	x1, 0
-	bl	ftl_sblk_dump
-	ldr	x0, [x25, 24]
-	ldr	w0, [x0]
-	cmp	w0, w22
-	beq	.L2837
-	mov	w2, 955
-	adrp	x1, .LANCHOR199
-	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR199
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-	b	.L2837
-.L2836:
-	ldrb	w0, [x23, #:lo12:.LANCHOR72]
-	adrp	x22, .LANCHOR96
-	ldrh	w1, [x24, #:lo12:.LANCHOR80]
-	adrp	x23, .LANCHOR95
-	ldr	x24, [x25, 8]
-	add	x22, x22, :lo12:.LANCHOR96
-	add	x23, x23, :lo12:.LANCHOR95
-	mov	x26, 0
-	mul	w0, w0, w1
-	mul	w21, w21, w0
-	and	w21, w21, 65535
-.L2838:
-	cmp	w21, w26
-	bgt	.L2843
-	mov	x0, x25
-	bl	buf_free
-	ldrh	w1, [x19, #:lo12:.LANCHOR63]
-	adrp	x20, .LANCHOR4
-	add	x0, x19, :lo12:.LANCHOR63
-	ldr	x3, [x20, #:lo12:.LANCHOR4]
-	ubfiz	x2, x1, 1, 16
-	ldrh	w2, [x3, x2]
-	ldrh	w3, [x0, 24]
-	cmp	w2, w3
-	beq	.L2844
-	adrp	x0, .LC197
-	add	x0, x0, :lo12:.LC197
-	bl	printf
-.L2844:
-	ldrh	w2, [x19, #:lo12:.LANCHOR63]
-	add	x0, x19, :lo12:.LANCHOR63
-	ldr	x1, [x20, #:lo12:.LANCHOR4]
-	ldrh	w0, [x0, 24]
-	ldrh	w1, [x1, x2, lsl 1]
-	cmp	w1, w0
-	bcs	.L2845
-	bl	vpn_check
-.L2845:
-	add	x0, x19, :lo12:.LANCHOR63
-	ldrh	w2, [x19, #:lo12:.LANCHOR63]
-	ldr	x1, [x20, #:lo12:.LANCHOR4]
-	ldrh	w3, [x0, 24]
-	strh	w3, [x1, x2, lsl 1]
-	strh	wzr, [x0, 28]
-	ldrh	w0, [x0, 24]
-	b	.L2823
-.L2843:
-	ldr	w0, [x24, x26, lsl 2]
-	cmn	w0, #1
-	beq	.L2840
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 92]
-	cmn	w0, #1
-	bne	.L2841
-	ldr	w0, [x24, x26, lsl 2]
-	mov	w2, 0
-	add	x1, x29, 92
-	bl	pm_log2phys
-.L2841:
-	ldrh	w1, [x22]
-	mov	w0, 21
-	ldr	w3, [x29, 92]
-	sub	w2, w0, w1
-	mov	w0, 1
-	lsl	w0, w0, w2
-	sub	w0, w0, #1
-	lsr	w1, w3, w1
-	and	w0, w0, w1
-	ldrb	w1, [x23]
-	ldrh	w2, [x19, #:lo12:.LANCHOR63]
-	udiv	w0, w0, w1
-	add	x1, x19, :lo12:.LANCHOR63
-	cmp	w0, w2
-	bne	.L2840
-	ldrh	w0, [x1, 24]
-	ldr	x4, [x20, #:lo12:.LANCHOR64]
-	ubfiz	x2, x0, 2, 16
-	add	w0, w0, 1
-	str	w3, [x4, x2]
-	strh	w0, [x1, 24]
-.L2840:
-	add	x26, x26, 1
-	b	.L2838
-	.size	gc_scan_src_blk, .-gc_scan_src_blk
-	.section	.text.ftl_scan_all_data,"ax",@progbits
-	.align	2
-	.global	ftl_scan_all_data
-	.type	ftl_scan_all_data, %function
-ftl_scan_all_data:
-	sub	sp, sp, #160
-	mov	w0, 0
-	stp	x29, x30, [sp, 16]
-	add	x29, sp, 16
-	stp	x19, x20, [sp, 32]
-	mov	w20, 0
-	stp	x23, x24, [sp, 64]
-	adrp	x23, .LANCHOR54
-	stp	x27, x28, [sp, 96]
-	add	x28, x23, :lo12:.LANCHOR54
-	stp	x21, x22, [sp, 48]
-	adrp	x24, .LC200
-	stp	x25, x26, [sp, 80]
-	bl	buf_alloc
-	mov	w1, 0
-	mov	x19, x0
-	adrp	x0, .LC198
-	add	x0, x0, :lo12:.LC198
-	bl	printf
-	add	x0, x24, :lo12:.LC200
-	str	x0, [x29, 120]
-.L2863:
-	ldr	w0, [x23, #:lo12:.LANCHOR54]
-	cmp	w20, w0
-	bcc	.L2876
-	mov	x0, x19
-	bl	buf_free
-	ldp	x29, x30, [sp, 16]
-	ldp	x19, x20, [sp, 32]
-	ldp	x21, x22, [sp, 48]
-	ldp	x23, x24, [sp, 64]
-	ldp	x25, x26, [sp, 80]
-	ldp	x27, x28, [sp, 96]
-	add	sp, sp, 160
-	ret
-.L2876:
-	mov	w0, -1
-	str	w0, [x19, 36]
-	mov	w0, w20
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 140]
-	cmn	w0, #1
-	bne	.L2864
-	mov	w2, 0
-	add	x1, x29, 140
-	mov	w0, w20
-	bl	pm_log2phys
-.L2864:
-	tst	x20, 4095
-	bne	.L2865
-	ldr	w2, [x29, 140]
-	adrp	x0, .LC199
-	mov	w1, w20
-	add	x0, x0, :lo12:.LC199
-	bl	printf
-.L2865:
-	ldr	w0, [x29, 140]
-	stp	w0, w0, [x19, 40]
-	cmn	w0, #1
-	bne	.L2866
-.L2868:
-	add	w20, w20, 1
-	b	.L2863
-.L2866:
-	mov	w1, 1
-	mov	x0, x19
-	bl	sblk_read_page
-	ldr	w3, [x19, 52]
-	ldr	x0, [x19, 24]
-	cmp	w3, 256
-	ccmn	w3, #1, 4, ne
-	beq	.L2867
-	ldr	w1, [x0, 4]
-	cmp	w20, w1
-	beq	.L2868
-.L2867:
-	ldr	x1, [x19, 8]
-	add	x27, x24, :lo12:.LC200
-	adrp	x25, .LANCHOR117
-	adrp	x26, .LC201
-	adrp	x22, .LANCHOR123
-	ldr	w2, [x1, 4]
-	str	w2, [sp, 8]
-	ldr	w1, [x1]
-	str	w1, [sp]
-	mov	w1, w20
-	ldp	w4, w5, [x0]
-	ldp	w6, w7, [x0, 8]
-	mov	x0, x27
-	ldr	w2, [x19, 40]
-	bl	printf
-	ldr	x1, [x19, 24]
-	ldr	w0, [x1, 8]
-	cmn	w0, #1
-	bne	.L2869
-.L2871:
-	ldrb	w21, [x25, #:lo12:.LANCHOR117]
-	mov	w0, w20
-	bl	lpa_hash_get_ppa
-	add	x22, x22, :lo12:.LANCHOR123
-	mov	w4, w0
-	add	x0, x26, :lo12:.LC201
-	lsl	w27, w21, 7
-	ubfiz	w3, w21, 7, 9
-	sub	w3, w3, #1
-	add	x21, x22, 8
-	and	w3, w3, w20
-	adrp	x26, .LC203
-	sdiv	w27, w20, w27
-	and	w3, w3, 65535
-	add	x22, x22, 520
-	add	x26, x26, :lo12:.LC203
-	mov	w1, w20
-	and	w25, w27, 65535
-	mov	w2, w25
-	bl	printf
-	mov	w2, 0
-	add	x1, x29, 140
-	mov	w0, w20
-	bl	pm_log2phys
-.L2870:
-	ldr	x1, [x21]
-	cbz	x1, .L2875
-	ldrh	w0, [x21, -8]
-	cmp	w0, w25
-	bne	.L2875
-	mov	w3, 4096
-	mov	w2, 4
-	mov	x0, x26
-	bl	rknand_print_hex
-.L2875:
-	add	x21, x21, 16
-	cmp	x22, x21
-	bne	.L2870
-	b	.L2868
-.L2869:
-	ldr	w21, [x1, 4]
-	ldr	w1, [x28]
-	cmp	w21, w1
-	bcs	.L2871
-	str	w0, [x19, 40]
-	mov	w1, 1
-	mov	x0, x19
-	bl	sblk_read_page
-	ldr	x1, [x19, 8]
-	ldr	x0, [x19, 24]
-	ldr	w2, [x1, 4]
-	str	w2, [sp, 8]
-	ldr	w1, [x1]
-	str	w1, [sp]
-	mov	w1, w20
-	ldp	w4, w5, [x0]
-	ldp	w6, w7, [x0, 8]
-	mov	x0, x27
-	ldr	w2, [x19, 40]
-	ldr	w3, [x19, 52]
-	bl	printf
-	mov	w0, w21
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 140]
-	cmn	w0, #1
-	bne	.L2872
-	mov	w2, 0
-	add	x1, x29, 140
-	mov	w0, w21
-	bl	pm_log2phys
-.L2872:
-	ldr	w0, [x29, 140]
-	mov	w1, 1
-	str	w0, [x19, 40]
-	mov	x0, x19
-	bl	sblk_read_page
-	ldr	x1, [x19, 8]
-	ldr	x0, [x19, 24]
-	ldr	w2, [x1, 4]
-	str	w2, [sp, 8]
-	ldr	w1, [x1]
-	str	w1, [sp]
-	mov	w1, w21
-	ldp	w4, w5, [x0]
-	ldp	w6, w7, [x0, 8]
-	ldr	w2, [x19, 40]
-	ldr	w3, [x19, 52]
-	ldr	x0, [x29, 120]
-	bl	printf
-	ldrb	w3, [x25, #:lo12:.LANCHOR117]
-	mov	w0, w21
-	str	w3, [x29, 104]
-	lsl	w2, w3, 7
-	udiv	w2, w21, w2
-	and	w27, w2, 65535
-	str	w2, [x29, 112]
-	bl	lpa_hash_get_ppa
-	mov	w4, w0
-	ldr	w3, [x29, 104]
-	mov	w1, w21
-	ldr	w2, [x29, 112]
-	add	x0, x26, :lo12:.LC201
-	ubfiz	w3, w3, 7, 9
-	and	w2, w2, 65535
-	sub	w3, w3, #1
-	and	w3, w3, w21
-	and	w3, w3, 65535
-	bl	printf
-	mov	w0, w21
-	mov	w2, 0
-	add	x1, x29, 140
-	bl	pm_log2phys
-	add	x0, x22, :lo12:.LANCHOR123
-	adrp	x5, .LC202
-	add	x21, x0, 8
-	add	x4, x0, 520
-	add	x5, x5, :lo12:.LC202
-.L2874:
-	ldr	x1, [x21]
-	cbz	x1, .L2873
-	ldrh	w0, [x21, -8]
-	cmp	w0, w27
-	bne	.L2873
-	mov	x0, x5
-	stp	x4, x5, [x29, 104]
-	mov	w3, 4096
-	mov	w2, 4
-	bl	rknand_print_hex
-	ldp	x4, x5, [x29, 104]
-.L2873:
-	add	x21, x21, 16
-	cmp	x4, x21
-	bne	.L2874
-	b	.L2871
-	.size	ftl_scan_all_data, .-ftl_scan_all_data
-	.section	.text.ftl_update_l2p_map,"ax",@progbits
-	.align	2
-	.global	ftl_update_l2p_map
-	.type	ftl_update_l2p_map, %function
-ftl_update_l2p_map:
-	stp	x29, x30, [sp, -128]!
-	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	mov	x22, x0
-	stp	x19, x20, [sp, 16]
-	adrp	x0, .LANCHOR80
-	stp	x23, x24, [sp, 48]
-	stp	x25, x26, [sp, 64]
-	stp	x27, x28, [sp, 80]
-	ldrh	w23, [x0, #:lo12:.LANCHOR80]
-	ldrb	w0, [x22, 9]
-	ldrh	w19, [x22, 12]
-	mul	w23, w23, w0
-	adrp	x0, .LANCHOR109
-	str	x0, [x29, 104]
-	ldr	x1, [x0, #:lo12:.LANCHOR109]
-	add	x19, x1, x19, lsl 2
-	add	x1, x19, x23, sxtw 2
-	ldr	w1, [x1, -4]
-	cmn	w1, #1
-	beq	.L2887
-	adrp	x1, .LANCHOR200
-	adrp	x0, .LC0
-	mov	w2, 1468
-	add	x1, x1, :lo12:.LANCHOR200
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2887:
-	adrp	x27, .LANCHOR117
-	mov	x24, 0
-	add	x0, x27, :lo12:.LANCHOR117
-	mov	w21, 0
-	str	x0, [x29, 96]
-.L2888:
-	cmp	w24, w23
-	blt	.L2894
-	adrp	x0, .LANCHOR7
-	adrp	x19, .LANCHOR4
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2895
-	ldrh	w1, [x22]
-	ldr	x2, [x19, #:lo12:.LANCHOR4]
-	ubfiz	x0, x1, 1, 16
-	ldrh	w3, [x2, x0]
-	adrp	x0, .LC207
-	mov	w2, w21
-	add	x0, x0, :lo12:.LC207
-	bl	printf
-.L2895:
-	ldrh	w1, [x22]
-	ldr	x0, [x19, #:lo12:.LANCHOR4]
-	ldp	x23, x24, [sp, 48]
-	ldp	x19, x20, [sp, 16]
-	strh	w21, [x0, x1, lsl 1]
-	ldp	x25, x26, [sp, 64]
-	ldp	x21, x22, [sp, 32]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 128
-	ret
-.L2894:
-	ldr	w2, [x19, x24, lsl 2]
-	cmn	w2, #1
-	beq	.L2889
-	ldrb	w20, [x27, #:lo12:.LANCHOR117]
-	adrp	x0, .LANCHOR7
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	lsl	w20, w20, 7
-	udiv	w20, w2, w20
-	and	w20, w20, 65535
-	tbz	x0, 12, .L2890
-	adrp	x0, .LC204
-	mov	w3, w24
-	mov	w1, w20
-	add	x0, x0, :lo12:.LC204
-	bl	printf
-.L2890:
-	adrp	x25, .LANCHOR103
-	adrp	x26, .LC205
+.L2940:
+	adrp	x25, .LANCHOR108
+	adrp	x26, .LC202
 	mov	x28, x24
-	add	x25, x25, :lo12:.LANCHOR103
-	add	x26, x26, :lo12:.LC205
-.L2893:
+	add	x25, x25, :lo12:.LANCHOR108
+	add	x26, x26, :lo12:.LC202
+.L2943:
 	ldr	w1, [x19, x28, lsl 2]
 	cmn	w1, #1
-	beq	.L2891
+	beq	.L2941
 	ldr	x0, [x29, 96]
 	ldrb	w2, [x0]
 	lsl	w2, w2, 7
 	udiv	w1, w1, w2
 	cmp	w20, w1, uxth
-	bne	.L2891
+	bne	.L2941
 	ldrb	w0, [x22, 9]
 	sdiv	w1, w28, w0
 	msub	w0, w1, w0, w28
@@ -18526,15 +18478,15 @@ ftl_update_l2p_map:
 	str	w2, [x29, 124]
 	ldr	w1, [x19, x28, lsl 2]
 	bl	pm_ppa_update_check
-	cbz	w0, .L2892
+	cbz	w0, .L2942
 	ldr	x0, [x29, 104]
 	mov	w3, w23
 	mov	w2, 4
-	ldr	x1, [x0, #:lo12:.LANCHOR109]
-	adrp	x0, .LC206
-	add	x0, x0, :lo12:.LC206
+	ldr	x1, [x0, #:lo12:.LANCHOR114]
+	adrp	x0, .LC203
+	add	x0, x0, :lo12:.LC203
 	bl	rknand_print_hex
-.L2892:
+.L2942:
 	ldr	w0, [x19, x28, lsl 2]
 	add	w21, w21, 1
 	mov	w2, 1
@@ -18543,13 +18495,13 @@ ftl_update_l2p_map:
 	bl	pm_log2phys
 	mov	w0, -1
 	str	w0, [x19, x28, lsl 2]
-.L2891:
+.L2941:
 	add	x28, x28, 1
 	cmp	w23, w28
-	bgt	.L2893
-.L2889:
+	bgt	.L2943
+.L2939:
 	add	x24, x24, 1
-	b	.L2888
+	b	.L2938
 	.size	ftl_update_l2p_map, .-ftl_update_l2p_map
 	.section	.text.ftl_alloc_new_data_sblk,"ax",@progbits
 	.align	2
@@ -18565,11 +18517,11 @@ ftl_alloc_new_data_sblk:
 	ldrh	w0, [x19]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L2917
+	beq	.L2967
 	bl	zftl_insert_data_list
-.L2917:
-	adrp	x0, .LANCHOR5
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
+.L2967:
+	adrp	x0, .LANCHOR6
+	ldr	x0, [x0, #:lo12:.LANCHOR6]
 	add	x0, x0, 16
 	cmp	x19, x0
 	mov	x0, x19
@@ -18591,41 +18543,54 @@ ftl_alloc_new_data_sblk:
 	.type	ftl_write_commit, %function
 ftl_write_commit:
 	stp	x29, x30, [sp, -144]!
-	adrp	x0, .LANCHOR46
+	adrp	x0, .LANCHOR48
 	add	x29, sp, 0
-	stp	x25, x26, [sp, 64]
-	add	x26, x0, :lo12:.LANCHOR46
+	stp	x23, x24, [sp, 48]
+	add	x23, x0, :lo12:.LANCHOR48
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-.L2922:
-	adrp	x3, .LANCHOR53
-	ldrb	w1, [x3, #:lo12:.LANCHOR53]
-	cbz	w1, .L2924
-	adrp	x4, .LANCHOR52
-	adrp	x2, .LANCHOR46
-	add	x2, x2, :lo12:.LANCHOR46
+.L2972:
+	adrp	x2, .LANCHOR55
+	ldrb	w1, [x2, #:lo12:.LANCHOR55]
+	cbz	w1, .L2974
+	adrp	x3, .LANCHOR54
+	adrp	x0, .LANCHOR48
+	add	x0, x0, :lo12:.LANCHOR48
 	sub	w1, w1, #1
-	ldrb	w0, [x4, #:lo12:.LANCHOR52]
-	str	x0, [x29, 104]
-	strb	w1, [x3, #:lo12:.LANCHOR53]
-	adrp	x1, .LANCHOR54
-	ubfiz	x27, x0, 6, 8
-	add	x5, x2, x27
-	str	x5, [x29, 120]
-	lsl	x5, x0, 6
-	ldr	w1, [x1, #:lo12:.LANCHOR54]
-	add	x0, x2, x5
-	ldrb	w5, [x2, x5]
+	ldrb	w4, [x3, #:lo12:.LANCHOR54]
+	strb	w1, [x2, #:lo12:.LANCHOR55]
+	ubfiz	x27, x4, 6, 8
+	add	x5, x0, x27
+	stp	x4, x5, [x29, 112]
+	lsl	x4, x4, 6
+	add	x5, x0, x4
+	ldrb	w0, [x0, x4]
+	strb	w0, [x3, #:lo12:.LANCHOR54]
+	adrp	x0, .LANCHOR56
+	ldr	w2, [x5, 36]
+	mov	x19, x0
+	ldr	w1, [x0, #:lo12:.LANCHOR56]
+	cmp	w2, w1
+	bcc	.L2976
+	adrp	x1, .LANCHOR207
+	adrp	x0, .LC0
+	mov	w2, 487
+	add	x1, x1, :lo12:.LANCHOR207
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2976:
+	ldr	x0, [x29, 112]
+	ldr	w1, [x19, #:lo12:.LANCHOR56]
+	add	x0, x23, x0, lsl 6
 	ldr	w22, [x0, 36]
-	strb	w5, [x4, #:lo12:.LANCHOR52]
 	cmp	w22, w1
-	bcc	.L2926
+	bcc	.L2977
 	ldr	x0, [x29, 120]
 	bl	buf_free
 	mov	w0, -1
-.L2921:
+.L2971:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -18633,111 +18598,111 @@ ftl_write_commit:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L2926:
+.L2977:
 	ldrb	w21, [x0, 57]
 	ldrb	w20, [x0, 56]
-	ldr	x24, [x0, 8]
+	ldr	x25, [x0, 8]
 	ldr	x28, [x0, 24]
-	adrp	x0, .LANCHOR115
-	str	x0, [x29, 112]
-	ldrb	w1, [x0, #:lo12:.LANCHOR115]
-	cbz	w1, .L2928
-	adrp	x0, .LANCHOR163
-	ldrb	w1, [x0, #:lo12:.LANCHOR163]
-	add	x1, x2, x1, lsl 6
-.L2929:
+	adrp	x0, .LANCHOR121
+	str	x0, [x29, 104]
+	ldrb	w1, [x0, #:lo12:.LANCHOR121]
+	cbz	w1, .L2979
+	adrp	x0, .LANCHOR169
+	ldrb	w1, [x0, #:lo12:.LANCHOR169]
+	add	x1, x23, x1, lsl 6
+.L2980:
 	ldrb	w0, [x1]
 	cmp	w0, 255
-	bne	.L2930
+	bne	.L2981
 	ldr	w0, [x1, 36]
 	cmp	w22, w0
-	bne	.L2928
+	bne	.L2979
 	ldr	x0, [x1, 8]
 	ubfiz	x21, x21, 9, 8
 	lsl	w2, w20, 9
-	add	x1, x24, x21
+	add	x1, x25, x21
 	add	x0, x0, x21
 	bl	ftl_memcpy
 	ldr	x0, [x29, 120]
 	bl	buf_free
-	b	.L2922
-.L2930:
+	b	.L2972
+.L2981:
 	ubfiz	x1, x0, 6, 8
-	add	x1, x26, x1
-	b	.L2929
-.L2928:
+	add	x1, x23, x1
+	b	.L2980
+.L2979:
 	mov	w0, w22
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 140]
 	cmn	w0, #1
-	bne	.L2932
+	bne	.L2983
 	mov	w2, 0
 	add	x1, x29, 140
 	mov	w0, w22
 	bl	pm_log2phys
-.L2932:
-	adrp	x25, .LANCHOR5
-	add	x1, x26, 2
+.L2983:
+	adrp	x26, .LANCHOR6
+	add	x1, x23, 2
 	mov	w0, 0
-	ldr	x19, [x25, #:lo12:.LANCHOR5]
+	ldr	x19, [x26, #:lo12:.LANCHOR6]
 	add	x19, x19, 16
-.L2935:
+.L2986:
 	ldr	w2, [x1, 34]
 	cmp	w22, w2
-	bne	.L2933
+	bne	.L2984
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L2933
+	tbz	x2, 3, .L2984
 	ubfiz	x0, x0, 6, 32
 	and	w2, w2, -9
-	add	x0, x26, x0
+	add	x0, x23, x0
 	strb	w2, [x0, 2]
-	ldr	x23, [x0, 8]
+	ldr	x24, [x0, 8]
 	ldr	w0, [x0, 40]
 	str	w0, [x29, 140]
-.L2934:
-	adrp	x0, .LANCHOR117
+.L2985:
+	adrp	x0, .LANCHOR123
 	str	x0, [x29, 96]
-	ldrb	w1, [x0, #:lo12:.LANCHOR117]
+	ldrb	w1, [x0, #:lo12:.LANCHOR123]
 	cmp	w20, w1
-	bcs	.L2959
+	bcs	.L3010
 	add	w20, w21, w20
-	cbz	x23, .L2937
-	cbz	w21, .L2938
+	cbz	x24, .L2988
+	cbz	w21, .L2989
 	lsl	w2, w21, 9
-	mov	x1, x23
-	mov	x0, x24
+	mov	x1, x24
+	mov	x0, x25
 	bl	ftl_memcpy
-	ldr	x19, [x25, #:lo12:.LANCHOR5]
+	ldr	x19, [x26, #:lo12:.LANCHOR6]
 	add	x19, x19, 48
-.L2938:
+.L2989:
 	ldr	x0, [x29, 96]
-	ldrb	w2, [x0, #:lo12:.LANCHOR117]
+	ldrb	w2, [x0, #:lo12:.LANCHOR123]
 	cmp	w20, w2
-	bcc	.L2939
-	ldr	x19, [x25, #:lo12:.LANCHOR5]
+	bcc	.L2990
+	ldr	x19, [x26, #:lo12:.LANCHOR6]
 	add	x19, x19, 16
-.L2959:
-	mov	w23, 0
-	b	.L2936
-.L2933:
+.L3010:
+	mov	w24, 0
+	b	.L2987
+.L2984:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 32
-	bne	.L2935
-	mov	x23, 0
-	b	.L2934
-.L2939:
+	bne	.L2986
+	mov	x24, 0
+	b	.L2985
+.L2990:
 	ubfiz	x0, x20, 9, 9
 	sub	w2, w2, w20
-	add	x1, x23, x0
+	add	x1, x24, x0
 	lsl	w2, w2, 9
-	add	x0, x24, x0
+	add	x0, x25, x0
 	bl	ftl_memcpy
-	b	.L2959
-.L2937:
+	b	.L3010
+.L2988:
 	ldr	w0, [x29, 140]
 	cmn	w0, #1
-	beq	.L2940
+	beq	.L2991
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 140]
@@ -18746,110 +18711,95 @@ ftl_write_commit:
 	mov	w1, 1
 	bl	sblk_read_page
 	ldr	x0, [x27, 24]
-	ldr	w23, [x0, 12]
+	ldr	w24, [x0, 12]
 	ldr	w0, [x0, 4]
-	add	w23, w23, 1
+	add	w24, w24, 1
 	cmp	w22, w0
-	bne	.L2941
+	bne	.L2992
 	ldr	w0, [x27, 52]
 	cmn	w0, #1
-	bne	.L2942
-.L2941:
+	bne	.L2993
+.L2992:
 	ldrb	w1, [x27, 1]
 	mov	w3, w22
-	ldr	w4, [x27, 52]
-	adrp	x0, .LC208
 	ldr	w2, [x29, 140]
-	add	x0, x0, :lo12:.LC208
+	adrp	x0, .LC205
+	ldr	w4, [x27, 52]
+	add	x0, x0, :lo12:.LC205
 	bl	printf
 	ldr	x1, [x27, 24]
 	mov	w3, 4
-	adrp	x0, .LC154
+	adrp	x0, .LC166
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC154
+	add	x0, x0, :lo12:.LC166
 	bl	rknand_print_hex
-	adrp	x0, .LANCHOR96
-	ldr	w1, [x29, 140]
-	ldrh	w3, [x0, #:lo12:.LANCHOR96]
-	mov	w0, 21
-	sub	w2, w0, w3
-	mov	w0, 1
-	lsr	w1, w1, w3
-	lsl	w0, w0, w2
-	sub	w0, w0, #1
-	and	w0, w0, w1
-	adrp	x1, .LANCHOR95
-	ldrb	w2, [x1, #:lo12:.LANCHOR95]
-	mov	x1, 0
-	udiv	w0, w0, w2
-	bl	ftl_sblk_dump
-.L2942:
+.L2993:
 	ldr	x0, [x27, 24]
 	ldr	w0, [x0, 4]
 	cmp	w22, w0
-	bne	.L2943
+	bne	.L2994
 	ldr	w0, [x27, 52]
 	cmn	w0, #1
-	bne	.L2944
-.L2943:
-	adrp	x1, .LANCHOR201
+	bne	.L2995
+.L2994:
+	adrp	x1, .LANCHOR207
 	adrp	x0, .LC0
-	mov	w2, 544
-	add	x1, x1, :lo12:.LANCHOR201
+	mov	w2, 557
+	add	x1, x1, :lo12:.LANCHOR207
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2944:
-	cbz	w21, .L2945
+.L2995:
+	cbz	w21, .L2996
 	ldr	w0, [x29, 140]
 	lsl	w2, w21, 9
 	cmn	w0, #1
-	beq	.L2946
+	beq	.L2997
 	ldr	x1, [x27, 8]
-	mov	x0, x24
+	mov	x0, x25
 	bl	ftl_memcpy
-.L2947:
-	ldr	x19, [x25, #:lo12:.LANCHOR5]
+.L2998:
+	ldr	x19, [x26, #:lo12:.LANCHOR6]
 	add	x19, x19, 48
-.L2945:
+.L2996:
 	ldr	x0, [x29, 96]
-	ldrb	w2, [x0, #:lo12:.LANCHOR117]
+	ldrb	w2, [x0, #:lo12:.LANCHOR123]
 	cmp	w20, w2
-	bcc	.L2948
-	bls	.L2949
-	ldr	x19, [x25, #:lo12:.LANCHOR5]
+	bcc	.L2999
+	bls	.L3000
+	ldr	x19, [x26, #:lo12:.LANCHOR6]
 	add	x19, x19, 16
-.L2949:
-	cbz	x27, .L2936
+.L3000:
+	cbz	x27, .L2987
 	ldrb	w0, [x27, 2]
 	mov	x1, x27
 	and	w0, w0, -9
 	strb	w0, [x27, 2]
-	adrp	x0, .LANCHOR58
-	add	x0, x0, :lo12:.LANCHOR58
+	adrp	x0, .LANCHOR60
+	add	x0, x0, :lo12:.LANCHOR60
 	bl	buf_remove_buf
 	mov	x0, x27
 	bl	buf_free
-.L2936:
+.L2987:
 	ldrh	w0, [x19, 6]
-	cbnz	w0, .L2951
+	cbnz	w0, .L3002
 	bl	ftl_flush
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L2951:
+.L3002:
 	mov	x0, x19
 	bl	ftl_get_new_free_page
-	ldr	x1, [x29, 104]
-	adrp	x20, .LANCHOR163
+	ldr	x1, [x29, 112]
+	adrp	x20, .LANCHOR169
 	lsl	x2, x1, 6
-	add	x1, x26, x2
+	add	x1, x23, x2
 	ldr	w3, [x1, 32]
 	stp	w3, w22, [x28]
-	str	w23, [x28, 12]
+	str	w24, [x28, 12]
 	ldr	w3, [x29, 140]
 	str	w3, [x28, 8]
 	stp	w0, w3, [x1, 40]
 	mov	w0, -1
-	strb	w0, [x26, x2]
+	strb	w0, [x23, x2]
 	mov	w2, 10
 	ldrb	w0, [x1, 2]
 	orr	w0, w0, w2
@@ -18860,94 +18810,94 @@ ftl_write_commit:
 	sub	w0, w0, #1
 	strh	w0, [x1, 48]
 	ldr	x1, [x29, 120]
-	add	x0, x20, :lo12:.LANCHOR163
+	add	x0, x20, :lo12:.LANCHOR169
 	bl	buf_add_tail
-	ldr	x0, [x29, 112]
-	ldrb	w2, [x0, #:lo12:.LANCHOR115]
+	ldr	x0, [x29, 104]
+	ldrb	w2, [x0, #:lo12:.LANCHOR121]
 	add	w2, w2, 1
 	and	w2, w2, 255
-	strb	w2, [x0, #:lo12:.LANCHOR115]
-	adrp	x0, .LANCHOR202
+	strb	w2, [x0, #:lo12:.LANCHOR121]
+	adrp	x0, .LANCHOR208
 	cmp	w2, 2
-	str	wzr, [x0, #:lo12:.LANCHOR202]
+	str	wzr, [x0, #:lo12:.LANCHOR208]
 	ldrh	w0, [x19, 6]
-	bhi	.L2952
+	bhi	.L3003
 	cmp	w0, 1
-	bne	.L2925
-.L2952:
+	bne	.L2975
+.L3003:
 	ldrb	w1, [x19, 5]
 	cmp	w1, 0
 	mov	w1, 0
 	cset	w4, ne
 	cmp	w0, 1
-	ldrb	w0, [x20, #:lo12:.LANCHOR163]
+	ldrb	w0, [x20, #:lo12:.LANCHOR169]
 	csinc	w4, w2, w4, eq
 	mov	w3, w0
-.L2956:
+.L3007:
 	cmp	w1, w4
-	bne	.L2957
-	strb	w3, [x20, #:lo12:.LANCHOR163]
+	bne	.L3008
+	strb	w3, [x20, #:lo12:.LANCHOR169]
 	and	w1, w1, 255
-	ldr	x3, [x29, 112]
+	ldr	x3, [x29, 104]
 	sub	w2, w2, w1
 	ubfiz	x0, x0, 6, 8
-	add	x0, x26, x0
-	strb	w2, [x3, #:lo12:.LANCHOR115]
+	add	x0, x23, x0
+	strb	w2, [x3, #:lo12:.LANCHOR121]
 	bl	sblk_prog_page
 	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bne	.L2925
+	bne	.L2975
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	mov	x0, x19
 	bl	ftl_write_last_log_page
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L2925:
-	adrp	x0, .LANCHOR53
-	ldrb	w0, [x0, #:lo12:.LANCHOR53]
-	cbnz	w0, .L2922
-.L2924:
+.L2975:
+	adrp	x0, .LANCHOR55
+	ldrb	w0, [x0, #:lo12:.LANCHOR55]
+	cbnz	w0, .L2972
+.L2974:
 	bl	ftl_write_completed
 	mov	w0, 0
-	b	.L2921
-.L2948:
+	b	.L2971
+.L2999:
 	ldr	w0, [x29, 140]
 	sub	w2, w2, w20
 	lsl	w2, w2, 9
 	cmn	w0, #1
 	ubfiz	x0, x20, 7, 9
-	beq	.L2950
+	beq	.L3001
 	ldr	x1, [x27, 8]
 	lsl	x0, x0, 2
 	add	x1, x1, x0
-	add	x0, x24, x0
+	add	x0, x25, x0
 	bl	ftl_memcpy
-	b	.L2949
-.L2950:
+	b	.L3000
+.L3001:
 	mov	w1, 0
-	add	x0, x24, x0, lsl 2
+	add	x0, x25, x0, lsl 2
 	bl	ftl_memset
-	b	.L2949
-.L2957:
+	b	.L3000
+.L3008:
 	ubfiz	x3, x3, 6, 8
 	add	w1, w1, 1
-	ldrb	w3, [x26, x3]
-	b	.L2956
-.L2958:
+	ldrb	w3, [x23, x3]
+	b	.L3007
+.L3009:
 	lsl	w2, w21, 9
 	mov	x27, 0
-	mov	w23, 0
-.L2946:
+	mov	w24, 0
+.L2997:
 	mov	w1, 0
-	mov	x0, x24
+	mov	x0, x25
 	bl	ftl_memset
-	b	.L2947
-.L2940:
-	cbnz	w21, .L2958
-	mov	w23, 0
+	b	.L2998
+.L2991:
+	cbnz	w21, .L3009
+	mov	w24, 0
 	mov	x27, 0
-	b	.L2945
+	b	.L2996
 	.size	ftl_write_commit, .-ftl_write_commit
 	.section	.text.gc_do_copy_back,"ax",@progbits
 	.align	2
@@ -18955,21 +18905,21 @@ ftl_write_commit:
 	.type	gc_do_copy_back, %function
 gc_do_copy_back:
 	sub	sp, sp, #224
-	adrp	x0, .LANCHOR70
+	adrp	x0, .LANCHOR74
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
-	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	ldrb	w0, [x0, #:lo12:.LANCHOR74]
 	stp	x19, x20, [sp, 32]
 	stp	x21, x22, [sp, 48]
 	stp	x23, x24, [sp, 64]
 	stp	x25, x26, [sp, 80]
 	stp	x27, x28, [sp, 96]
-	cbnz	w0, .L2982
+	cbnz	w0, .L3033
 	bl	buf_alloc
 	mov	x19, x0
-	cbz	x0, .L2981
-	adrp	x20, .LANCHOR63
-	add	x3, x20, :lo12:.LANCHOR63
+	cbz	x0, .L3032
+	adrp	x20, .LANCHOR65
+	add	x3, x20, :lo12:.LANCHOR65
 	ldrh	w2, [x3, 26]
 	mov	w0, w2
 	bl	gc_get_src_ppa_from_index
@@ -18983,71 +18933,52 @@ gc_do_copy_back:
 	ldr	w0, [x19, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L2984
-	adrp	x0, .LANCHOR96
-	ldrh	w1, [x0, #:lo12:.LANCHOR96]
-	mov	w0, 21
-	sub	w2, w0, w1
-	mov	w0, 1
-	lsr	w1, w22, w1
-	lsl	w0, w0, w2
-	sub	w0, w0, #1
-	and	w0, w0, w1
-	adrp	x1, .LANCHOR95
-	ldrb	w2, [x1, #:lo12:.LANCHOR95]
-	mov	x1, 0
-	udiv	w0, w0, w2
-	bl	ftl_sblk_dump
-.L2984:
-	ldr	w0, [x19, 52]
-	cmp	w0, 512
-	ccmn	w0, #1, 4, ne
-	bne	.L2985
-	adrp	x1, .LANCHOR203
+	bne	.L3035
+	adrp	x1, .LANCHOR209
 	adrp	x0, .LC0
-	mov	w2, 573
-	add	x1, x1, :lo12:.LANCHOR203
+	mov	w2, 595
+	add	x1, x1, :lo12:.LANCHOR209
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2985:
+.L3035:
 	ldr	x0, [x19, 24]
 	ldr	w21, [x0, 4]
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 160]
 	cmn	w0, #1
-	bne	.L2986
+	bne	.L3036
 	mov	w2, 0
 	add	x1, x29, 160
 	mov	w0, w21
 	bl	pm_log2phys
-.L2986:
+.L3036:
 	ldr	w23, [x29, 160]
 	cmp	w22, w23
-	bne	.L2987
-	adrp	x0, .LANCHOR46
-	add	x0, x0, :lo12:.LANCHOR46
+	bne	.L3037
+	adrp	x0, .LANCHOR48
+	add	x0, x0, :lo12:.LANCHOR48
 	add	x1, x0, 2
 	add	x0, x0, 2050
-.L2990:
+.L3040:
 	ldr	w2, [x1, 34]
 	cmp	w21, w2
-	bne	.L2988
+	bne	.L3038
 	ldrb	w2, [x1]
-	tbz	x2, 1, .L2988
+	tbz	x2, 1, .L3038
 	mov	x0, x19
 	bl	buf_free
-	adrp	x0, .LANCHOR7
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L2981
-	add	x20, x20, :lo12:.LANCHOR63
-	adrp	x0, .LC209
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 8, .L3032
+	add	x20, x20, :lo12:.LANCHOR65
+	adrp	x0, .LC206
 	mov	w2, w22
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC209
+	add	x0, x0, :lo12:.LC206
 	ldrh	w3, [x20, 26]
 	bl	printf
-.L2981:
+.L3032:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -19056,14 +18987,14 @@ gc_do_copy_back:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 224
 	ret
-.L2988:
+.L3038:
 	add	x1, x1, 64
 	cmp	x0, x1
-	bne	.L2990
-	adrp	x0, .LANCHOR117
+	bne	.L3040
+	adrp	x0, .LANCHOR123
 	mov	w1, 10
 	strb	wzr, [x19, 57]
-	ldrb	w0, [x0, #:lo12:.LANCHOR117]
+	ldrb	w0, [x0, #:lo12:.LANCHOR123]
 	strb	w0, [x19, 56]
 	ldrb	w0, [x19, 2]
 	str	w21, [x19, 36]
@@ -19072,67 +19003,67 @@ gc_do_copy_back:
 	ldr	x0, [x19, 24]
 	ldr	w0, [x0]
 	str	w0, [x19, 32]
-	adrp	x0, .LANCHOR7
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L2991
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 8, .L3041
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
-	add	x1, x20, :lo12:.LANCHOR63
+	add	x1, x20, :lo12:.LANCHOR65
 	mov	w3, w0
 	mov	w4, w22
-	adrp	x0, .LC210
+	adrp	x0, .LC207
 	mov	w2, w23
-	add	x0, x0, :lo12:.LC210
+	add	x0, x0, :lo12:.LC207
 	ldrh	w5, [x1, 26]
 	mov	w1, w21
 	bl	printf
-.L2991:
+.L3041:
 	mov	x0, x19
 	bl	ftl_gc_write_buf
 	bl	ftl_write_commit
-	add	x20, x20, :lo12:.LANCHOR63
-	adrp	x0, .LANCHOR97
-	ldr	x1, [x0, #:lo12:.LANCHOR97]
+	add	x20, x20, :lo12:.LANCHOR65
+	adrp	x0, .LANCHOR100
+	ldr	x1, [x0, #:lo12:.LANCHOR100]
 	ldr	w0, [x1, 60]
 	add	w0, w0, 1
 	str	w0, [x1, 60]
 	ldrh	w0, [x20, 28]
 	add	w0, w0, 1
 	strh	w0, [x20, 28]
-	b	.L2981
-.L2987:
-	adrp	x0, .LANCHOR7
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L2992
-	add	x20, x20, :lo12:.LANCHOR63
+	b	.L3032
+.L3037:
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 8, .L3042
+	add	x20, x20, :lo12:.LANCHOR65
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	mov	w3, w0
 	mov	w4, w22
-	adrp	x0, .LC210
+	adrp	x0, .LC207
 	ldrh	w5, [x20, 26]
 	mov	w2, w23
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC210
+	add	x0, x0, :lo12:.LC207
 	bl	printf
-.L2992:
+.L3042:
 	mov	x0, x19
 	bl	buf_free
-	b	.L2981
-.L2982:
-	adrp	x1, .LANCHOR5
-	adrp	x0, .LANCHOR67
+	b	.L3032
+.L3033:
+	adrp	x1, .LANCHOR6
+	adrp	x0, .LANCHOR71
 	stp	x0, x1, [x29, 128]
-	adrp	x24, .LANCHOR63
-	ldr	x22, [x1, #:lo12:.LANCHOR5]
-	ldrb	w25, [x0, #:lo12:.LANCHOR67]
+	adrp	x24, .LANCHOR65
+	ldr	x22, [x1, #:lo12:.LANCHOR6]
+	ldrb	w25, [x0, #:lo12:.LANCHOR71]
 	add	x22, x22, 80
 	cmp	w25, 3
-	bne	.L2993
-	adrp	x0, .LANCHOR69
-	ldrb	w0, [x0, #:lo12:.LANCHOR69]
-	cbz	w0, .L2994
-	add	x0, x24, :lo12:.LANCHOR63
+	bne	.L3043
+	adrp	x0, .LANCHOR73
+	ldrb	w0, [x0, #:lo12:.LANCHOR73]
+	cbz	w0, .L3044
+	add	x0, x24, :lo12:.LANCHOR65
 	ldrb	w19, [x22, 9]
 	ldrh	w20, [x0, 314]
 	add	w21, w19, w19, lsl 1
@@ -19140,30 +19071,30 @@ gc_do_copy_back:
 	sdiv	w21, w20, w21
 	madd	w19, w21, w19, w20
 	and	w19, w19, 65535
-.L2995:
-	adrp	x1, .LANCHOR71
+.L3045:
+	adrp	x1, .LANCHOR75
 	ldrb	w0, [x22, 9]
-	add	x4, x24, :lo12:.LANCHOR63
+	add	x4, x24, :lo12:.LANCHOR65
 	mov	w2, 0
-	ldrh	w3, [x1, #:lo12:.LANCHOR71]
+	ldrh	w3, [x1, #:lo12:.LANCHOR75]
 	mul	w8, w25, w0
 	ldrh	w10, [x4, 24]
 	mul	w3, w3, w0
-	adrp	x0, .LANCHOR140
-	ldr	x7, [x0, #:lo12:.LANCHOR140]
+	adrp	x0, .LANCHOR147
+	ldr	x7, [x0, #:lo12:.LANCHOR147]
 	sub	w3, w3, #1
-.L2998:
+.L3048:
 	cmp	w2, w8
-	blt	.L3000
-.L3027:
+	blt	.L3050
+.L3077:
 	mov	w23, 1
-	b	.L2996
-.L2994:
-	add	x0, x24, :lo12:.LANCHOR63
+	b	.L3046
+.L3044:
+	add	x0, x24, :lo12:.LANCHOR65
 	ldrb	w20, [x22, 9]
 	ldrh	w1, [x0, 314]
-	adrp	x0, .LANCHOR204
-	add	x0, x0, :lo12:.LANCHOR204
+	adrp	x0, .LANCHOR210
+	add	x0, x0, :lo12:.LANCHOR210
 	sdiv	w19, w1, w20
 	ldrh	w23, [x0, w19, sxtw 1]
 	msub	w19, w19, w20, w1
@@ -19174,31 +19105,31 @@ gc_do_copy_back:
 	madd	w20, w21, w20, w19
 	add	w20, w20, w20, lsl 1
 	and	w20, w20, 65535
-	beq	.L2995
-.L2996:
-	adrp	x0, .LANCHOR7
+	beq	.L3045
+.L3046:
+	adrp	x0, .LANCHOR9
 	str	x0, [x29, 112]
-	ldr	w1, [x0, #:lo12:.LANCHOR7]
-	tbz	x1, 8, .L3001
-	adrp	x0, .LANCHOR140
+	ldr	w1, [x0, #:lo12:.LANCHOR9]
+	tbz	x1, 8, .L3051
+	adrp	x0, .LANCHOR147
 	ubfiz	x1, x20, 2, 16
 	mov	w6, w20
 	mov	w3, w19
-	ldr	x2, [x0, #:lo12:.LANCHOR140]
-	add	x0, x24, :lo12:.LANCHOR63
+	ldr	x2, [x0, #:lo12:.LANCHOR147]
+	add	x0, x24, :lo12:.LANCHOR65
 	ldrh	w4, [x0, 314]
-	adrp	x0, .LC211
+	adrp	x0, .LC208
 	ldr	w5, [x2, x1]
-	add	x0, x0, :lo12:.LC211
+	add	x0, x0, :lo12:.LC208
 	mov	w2, w23
 	mov	w1, w21
 	bl	printf
-.L3001:
-	adrp	x0, .LANCHOR46
+.L3051:
+	adrp	x0, .LANCHOR48
 	str	wzr, [x29, 152]
-	add	x0, x0, :lo12:.LANCHOR46
+	add	x0, x0, :lo12:.LANCHOR48
 	str	x0, [x29, 120]
-.L3002:
+.L3052:
 	ldrb	w2, [x22, 9]
 	ldr	w0, [x29, 152]
 	ldrh	w26, [x29, 152]
@@ -19206,78 +19137,78 @@ gc_do_copy_back:
 	str	w0, [x29, 156]
 	mul	w1, w25, w2
 	cmp	w0, w1
-	blt	.L3014
+	blt	.L3064
 	ldr	x0, [x29, 128]
-	ldrb	w0, [x0, #:lo12:.LANCHOR67]
+	ldrb	w0, [x0, #:lo12:.LANCHOR71]
 	cmp	w0, 3
 	add	x0, x29, 160
-	beq	.L3015
+	beq	.L3065
 	sub	w3, w1, #1
 	mov	w2, 0
-.L3016:
+.L3066:
 	cmp	w2, w3
-	blt	.L3022
+	blt	.L3072
 	ldr	x0, [x0, w3, sxtw 3]
 	mov	w2, -1
 	strb	w2, [x0]
 	ldr	x0, [x29, 160]
 	bl	sblk_prog_page
-	b	.L3021
-.L2993:
-	adrp	x0, .LANCHOR102
-	ldrb	w0, [x0, #:lo12:.LANCHOR102]
-	cbnz	w0, .L2997
-	add	x0, x24, :lo12:.LANCHOR63
+	b	.L3071
+.L3043:
+	adrp	x0, .LANCHOR107
+	ldrb	w0, [x0, #:lo12:.LANCHOR107]
+	cbnz	w0, .L3047
+	add	x0, x24, :lo12:.LANCHOR65
 	ldrb	w19, [x22, 9]
 	mov	w25, 1
 	ldrh	w20, [x0, 314]
 	sdiv	w21, w20, w19
 	msub	w19, w21, w19, w20
 	and	w19, w19, 65535
-	b	.L2995
-.L2997:
-	add	x0, x24, :lo12:.LANCHOR63
+	b	.L3045
+.L3047:
+	add	x0, x24, :lo12:.LANCHOR65
 	ldrb	w19, [x22, 9]
 	mov	w25, 2
 	ldrh	w20, [x0, 314]
 	sdiv	w21, w20, w19
 	msub	w19, w21, w19, w20
 	and	w19, w19, 65535
-	b	.L2995
-.L3000:
+	b	.L3045
+.L3050:
 	add	w5, w20, w2
 	cmp	w5, w3
-	beq	.L3027
+	beq	.L3077
 	sbfiz	x5, x5, 2, 32
 	ldr	w0, [x7, x5]
 	cmn	w0, #1
-	bne	.L2999
+	bne	.L3049
 	ldrh	w6, [x4, 26]
 	cmp	w6, w10
-	bcs	.L2981
+	bcs	.L3032
 	mov	w0, w6
 	bl	gc_get_src_ppa_from_index
 	add	w6, w6, 1
 	strh	w6, [x4, 26]
 	str	w0, [x7, x5]
-.L2999:
+.L3049:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-	b	.L2998
-.L3014:
+	b	.L3048
+.L3064:
 	ldr	w0, [x29, 156]
 	add	w0, w20, w0
 	str	w0, [x29, 144]
 	sxtw	x27, w0
-	adrp	x0, .LANCHOR68
-	ldr	x0, [x0, #:lo12:.LANCHOR68]
+	adrp	x0, .LANCHOR72
+	ldr	x0, [x0, #:lo12:.LANCHOR72]
 	ldrb	w0, [x0, x27]
 	cmp	w0, 255
-	bne	.L3003
+	bne	.L3053
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbnz	x0, .L3004
+	cbnz	x0, .L3054
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	bl	gc_write_completed
@@ -19285,17 +19216,17 @@ gc_do_copy_back:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbz	x0, .L2981
-.L3004:
-	adrp	x0, .LANCHOR68
+	cbz	x0, .L3032
+.L3054:
+	adrp	x0, .LANCHOR72
 	ldrb	w1, [x28, 1]
-	adrp	x5, .LANCHOR71
-	adrp	x6, .LANCHOR140
-	ldr	x0, [x0, #:lo12:.LANCHOR68]
+	adrp	x5, .LANCHOR75
+	adrp	x6, .LANCHOR147
+	ldr	x0, [x0, #:lo12:.LANCHOR72]
 	strb	w1, [x0, x27]
-	add	x1, x24, :lo12:.LANCHOR63
+	add	x1, x24, :lo12:.LANCHOR65
 	strb	w23, [x28, 61]
-	ldrh	w7, [x5, #:lo12:.LANCHOR71]
+	ldrh	w7, [x5, #:lo12:.LANCHOR75]
 	ldrb	w0, [x1, 7]
 	add	w0, w0, 1
 	strb	w0, [x1, 7]
@@ -19306,32 +19237,32 @@ gc_do_copy_back:
 	mul	w0, w0, w7
 	sub	w0, w0, #1
 	cmp	w1, w0
-	bne	.L3005
-	adrp	x0, .LANCHOR139
-	adrp	x4, .LANCHOR72
+	bne	.L3055
+	adrp	x0, .LANCHOR146
+	adrp	x4, .LANCHOR76
 	stp	x6, x5, [x29, 96]
-	ldr	x1, [x0, #:lo12:.LANCHOR139]
+	ldr	x1, [x0, #:lo12:.LANCHOR146]
 	mov	w0, -1
 	str	x4, [x29, 144]
 	str	w0, [x1, x27, lsl 2]
 	ldr	x0, [x28, 8]
-	ldrb	w2, [x4, #:lo12:.LANCHOR72]
+	ldrb	w2, [x4, #:lo12:.LANCHOR76]
 	mul	w2, w2, w7
 	lsl	w2, w2, 2
 	bl	ftl_memcpy
 	ldp	x6, x5, [x29, 96]
 	ldr	x4, [x29, 144]
 	ldr	x7, [x28, 8]
-	ldrh	w0, [x5, #:lo12:.LANCHOR71]
-	ldrb	w1, [x4, #:lo12:.LANCHOR72]
+	ldrh	w0, [x5, #:lo12:.LANCHOR75]
+	ldrb	w1, [x4, #:lo12:.LANCHOR76]
 	mul	w0, w0, w1
-	ldr	x1, [x6, #:lo12:.LANCHOR140]
+	ldr	x1, [x6, #:lo12:.LANCHOR147]
 	lsl	w2, w0, 2
 	add	x0, x7, x0, sxtw 2
 	bl	ftl_memcpy
-	adrp	x0, .LANCHOR117
+	adrp	x0, .LANCHOR123
 	mov	w1, 0
-	ldrb	w2, [x0, #:lo12:.LANCHOR117]
+	ldrb	w2, [x0, #:lo12:.LANCHOR123]
 	ldr	x0, [x28, 24]
 	lsl	w2, w2, 1
 	bl	ftl_memset
@@ -19340,88 +19271,88 @@ gc_do_copy_back:
 	ldr	x5, [x29, 104]
 	movk	w0, 0xf55f, lsl 16
 	ldr	x4, [x29, 144]
-	ldrh	w1, [x5, #:lo12:.LANCHOR71]
+	ldrh	w1, [x5, #:lo12:.LANCHOR75]
 	str	w0, [x6]
-	ldrb	w0, [x4, #:lo12:.LANCHOR72]
+	ldrb	w0, [x4, #:lo12:.LANCHOR76]
 	mul	w1, w1, w0
 	ldr	x0, [x28, 8]
 	lsl	w1, w1, 2
 	bl	js_hash
 	str	w0, [x6, 4]
 	ldr	x0, [x29, 136]
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	ldr	x0, [x0, #:lo12:.LANCHOR6]
 	ldr	w0, [x0, 132]
 	str	w0, [x6, 8]
-.L3003:
-	adrp	x0, .LANCHOR68
+.L3053:
+	adrp	x0, .LANCHOR72
 	ldr	w5, [x29, 156]
-	add	x3, x29, 160
-	ldr	x4, [x0, #:lo12:.LANCHOR68]
-	adrp	x0, .LANCHOR46
-	add	x2, x0, :lo12:.LANCHOR46
-	ldrb	w1, [x4, x27]
-	ubfiz	x0, x1, 6, 8
-	add	x0, x2, x0
-	add	x2, x2, x1, lsl 6
-	str	x0, [x3, w5, sxtw 3]
+	add	x1, x29, 160
+	ldr	x4, [x0, #:lo12:.LANCHOR72]
+	adrp	x0, .LANCHOR48
+	add	x3, x0, :lo12:.LANCHOR48
+	ldrb	w2, [x4, x27]
+	ubfiz	x0, x2, 6, 8
+	add	x0, x3, x0
+	add	x3, x3, x2, lsl 6
+	str	x0, [x1, w5, sxtw 3]
 	mov	w0, 2
-	adrp	x5, .LANCHOR141
-	strh	w0, [x2, 50]
+	adrp	x5, .LANCHOR148
+	strh	w0, [x3, 50]
 	ldr	x0, [x29, 128]
-	strb	w23, [x2, 61]
-	ldrb	w0, [x0, #:lo12:.LANCHOR67]
+	strb	w23, [x3, 61]
+	ldrb	w0, [x0, #:lo12:.LANCHOR71]
 	cmp	w0, 3
-	bne	.L3009
+	bne	.L3059
 	udiv	w0, w26, w0
-	adrp	x6, .LANCHOR103
-	ldrh	w6, [x6, #:lo12:.LANCHOR103]
-	add	w3, w0, w19
+	adrp	x6, .LANCHOR108
+	ldrh	w6, [x6, #:lo12:.LANCHOR108]
+	add	w1, w0, w19
 	add	w0, w0, w0, lsl 1
-	add	x3, x22, x3, sxtw 1
+	add	x1, x22, x1, sxtw 1
 	sub	w0, w26, w0
 	and	w0, w0, 65535
 	add	w0, w0, 1
-	ldrh	w3, [x3, 16]
-	mul	w3, w3, w6
-	ldrh	w6, [x2, 48]
-	orr	w3, w3, w21
-	str	w3, [x2, 40]
-	ldr	x2, [x5, #:lo12:.LANCHOR141]
-	orr	w0, w3, w0, lsl 24
-	str	w0, [x2, x6, lsl 2]
-.L3010:
+	ldrh	w1, [x1, 16]
+	mul	w1, w1, w6
+	ldrh	w6, [x3, 48]
+	orr	w1, w1, w21
+	str	w1, [x3, 40]
+	ldr	x3, [x5, #:lo12:.LANCHOR148]
+	orr	w0, w1, w0, lsl 24
+	str	w0, [x3, x6, lsl 2]
+.L3060:
 	ldr	x0, [x29, 112]
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L3013
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 8, .L3063
 	ldr	x0, [x29, 120]
-	mov	w2, w23
 	ldrb	w4, [x4, x27]
-	add	x1, x0, x1, lsl 6
-	add	x0, x24, :lo12:.LANCHOR63
+	ldr	w1, [x29, 156]
+	add	x2, x0, x2, lsl 6
+	add	x0, x24, :lo12:.LANCHOR65
 	ldrb	w3, [x0, 6]
-	ldr	x0, [x1, 24]
-	ldrb	w7, [x1, 1]
-	ldrh	w6, [x1, 48]
+	ldr	x0, [x2, 24]
+	ldrb	w7, [x2, 1]
+	ldrh	w6, [x2, 48]
 	ldr	w0, [x0, 4]
 	str	w0, [sp, 8]
 	mov	w0, 3
 	udiv	w26, w26, w0
-	adrp	x0, .LC212
-	add	x0, x0, :lo12:.LC212
+	adrp	x0, .LC209
+	add	x0, x0, :lo12:.LC209
 	add	w26, w26, w19
 	str	w26, [sp]
-	ldr	w5, [x1, 40]
-	ldr	w1, [x29, 156]
+	ldr	w5, [x2, 40]
+	mov	w2, w23
 	bl	printf
-.L3013:
+.L3063:
 	ldr	w0, [x29, 152]
 	add	w0, w0, 1
 	str	w0, [x29, 152]
-	b	.L3002
-.L3005:
+	b	.L3052
+.L3055:
 	lsl	x0, x27, 2
 	str	x0, [x29, 144]
-	ldr	x0, [x6, #:lo12:.LANCHOR140]
+	ldr	x0, [x6, #:lo12:.LANCHOR147]
 	lsl	x1, x27, 2
 	ldr	w0, [x0, x1]
 	mov	w1, 1
@@ -19431,10 +19362,10 @@ gc_do_copy_back:
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3007
-	adrp	x0, .LANCHOR96
+	bne	.L3057
+	adrp	x0, .LANCHOR102
 	ldr	w1, [x28, 40]
-	ldrh	w4, [x0, #:lo12:.LANCHOR96]
+	ldrh	w4, [x0, #:lo12:.LANCHOR102]
 	mov	w0, 21
 	sub	w2, w0, w4
 	mov	w0, 1
@@ -19442,1137 +19373,1176 @@ gc_do_copy_back:
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR95
-	ldrb	w2, [x1, #:lo12:.LANCHOR95]
+	adrp	x1, .LANCHOR101
+	ldrb	w2, [x1, #:lo12:.LANCHOR101]
 	mov	x1, 0
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3007
+	bne	.L3057
 	ldr	x0, [x28, 24]
 	mov	w1, -1
 	str	w1, [x0, 4]
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmp	w0, w1, 4, ne
-	bne	.L3007
-	adrp	x1, .LANCHOR203
+	bne	.L3057
+	adrp	x1, .LANCHOR209
 	adrp	x0, .LC0
-	mov	w2, 688
-	add	x1, x1, :lo12:.LANCHOR203
+	mov	w2, 710
+	add	x1, x1, :lo12:.LANCHOR209
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3007:
+.L3057:
 	ldr	x0, [x28, 24]
-	adrp	x1, .LANCHOR54
-	ldr	w1, [x1, #:lo12:.LANCHOR54]
+	adrp	x1, .LANCHOR56
+	ldr	w1, [x1, #:lo12:.LANCHOR56]
 	ldr	w2, [x0, 4]
 	cmp	w2, w1
-	bcc	.L3008
+	bcc	.L3058
 	mov	w1, -1
 	str	w1, [x0, 4]
-.L3008:
-	adrp	x1, .LANCHOR139
+.L3058:
+	adrp	x1, .LANCHOR146
 	lsl	x3, x27, 2
 	ldr	w2, [x0, 4]
-	ldr	x1, [x1, #:lo12:.LANCHOR139]
+	ldr	x1, [x1, #:lo12:.LANCHOR146]
 	str	w2, [x1, x3]
 	ldr	w1, [x28, 40]
 	str	w1, [x0, 8]
-	b	.L3003
-.L3009:
+	b	.L3053
+.L3059:
 	cmp	w0, 2
-	bne	.L3011
-	adrp	x0, .LANCHOR102
-	adrp	x3, .LANCHOR103
-	ldrb	w0, [x0, #:lo12:.LANCHOR102]
-	cbnz	w0, .L3012
+	bne	.L3061
+	adrp	x0, .LANCHOR107
+	adrp	x1, .LANCHOR108
+	ldrb	w0, [x0, #:lo12:.LANCHOR107]
+	cbnz	w0, .L3062
 	ldr	w0, [x29, 156]
-	ldrh	w3, [x3, #:lo12:.LANCHOR103]
+	ldrh	w1, [x1, #:lo12:.LANCHOR108]
 	add	w0, w19, w0
 	add	x0, x22, x0, sxtw 1
 	ldrh	w0, [x0, 16]
-	madd	w0, w0, w3, w21
-.L3073:
+	madd	w0, w0, w1, w21
+.L3120:
 	orr	w0, w0, 33554432
-	str	w0, [x2, 40]
-.L3011:
+	str	w0, [x3, 40]
+.L3061:
 	ldr	x0, [x29, 120]
-	add	x0, x0, x1, lsl 6
-	ldrh	w2, [x0, 48]
-	ldr	w3, [x0, 40]
-	ldr	x0, [x5, #:lo12:.LANCHOR141]
-	str	w3, [x0, x2, lsl 2]
-	b	.L3010
-.L3012:
-	add	w0, w19, w26, lsr 1
-	ldrh	w3, [x3, #:lo12:.LANCHOR103]
-	add	x0, x22, x0, sxtw 1
-	ldrh	w0, [x0, 16]
-	madd	w0, w0, w3, w21
-	and	w3, w26, 1
-	add	w0, w0, w3
-	b	.L3073
-.L3015:
-	adrp	x1, .LANCHOR69
-	ldrb	w3, [x1, #:lo12:.LANCHOR69]
-	ldr	x1, [x29, 160]
-	cbz	w3, .L3017
-.L3020:
-	strb	wzr, [x1, 60]
-	b	.L3018
-.L3017:
-	cmp	w23, 1
-	bne	.L3019
-	mov	w3, 9
-.L3072:
-	strb	w3, [x1, 60]
-.L3018:
-	add	x1, x0, 24
-	bl	sblk_xlc_prog_pages
-.L3021:
-	adrp	x1, .LANCHOR69
-	ldrb	w3, [x22, 9]
-	ldrb	w1, [x1, #:lo12:.LANCHOR69]
-	and	w0, w3, 65535
-	cbz	w1, .L3023
-	add	w0, w0, w0, lsl 1
-.L3024:
-	adrp	x1, .LANCHOR97
-	add	x24, x24, :lo12:.LANCHOR63
-	ldr	x1, [x1, #:lo12:.LANCHOR97]
-	ldr	w2, [x1, 52]
-	add	w2, w2, w0
-	str	w2, [x1, 52]
-	ldrh	w1, [x24, 314]
-	add	w0, w0, w1
-	adrp	x1, .LANCHOR71
-	and	w0, w0, 65535
-	strh	w0, [x24, 314]
-	ldrh	w1, [x1, #:lo12:.LANCHOR71]
-	mul	w1, w1, w3
-	cmp	w0, w1
-	blt	.L3025
-	ldr	x0, [x29, 136]
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
-	strh	wzr, [x0, 86]
-.L3025:
-	bl	gc_write_completed
-	b	.L2981
-.L3019:
-	cmp	w23, 2
-	bne	.L3020
-	mov	w3, 13
-	b	.L3072
-.L3022:
-	ldr	x4, [x0, w2, sxtw 3]
-	add	w2, w2, 1
-	ldr	x5, [x0, w2, sxtw 3]
-	and	w2, w2, 65535
-	ldrb	w5, [x5, 1]
-	strb	w5, [x4]
-	b	.L3016
-.L3023:
-	adrp	x1, .LANCHOR102
-	ldrb	w2, [x1, #:lo12:.LANCHOR102]
-	mov	w1, w0
-	ubfiz	w0, w0, 1, 15
-	cmp	w2, 0
-	csel	w0, w0, w1, ne
-	b	.L3024
-	.size	gc_do_copy_back, .-gc_do_copy_back
-	.section	.text.zftl_discard,"ax",@progbits
-	.align	2
-	.global	zftl_discard
-	.type	zftl_discard, %function
-zftl_discard:
-	stp	x29, x30, [sp, -128]!
-	adrp	x2, .LANCHOR59
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	w19, w1
-	ldr	w2, [x2, #:lo12:.LANCHOR59]
-	add	w1, w0, w1
-	stp	x21, x22, [sp, 32]
-	stp	x23, x24, [sp, 48]
-	cmp	w2, w1
-	stp	x25, x26, [sp, 64]
-	stp	x27, x28, [sp, 80]
-	bcc	.L3095
-	adrp	x24, .LANCHOR205
-	add	w22, w0, 24576
-	adrp	x0, .LANCHOR7
-	str	x0, [x29, 104]
-	ldr	w1, [x24, #:lo12:.LANCHOR205]
-	ldr	w2, [x0, #:lo12:.LANCHOR7]
-	add	w1, w19, w1
-	str	w1, [x24, #:lo12:.LANCHOR205]
-	tbz	x2, 12, .L3076
-	adrp	x0, .LC213
-	mov	w4, 0
-	mov	w3, w19
-	mov	w2, w22
-	add	x0, x0, :lo12:.LC213
-	bl	printf
-.L3076:
-	adrp	x23, .LANCHOR97
-	adrp	x26, .LANCHOR117
-	ldr	x0, [x23, #:lo12:.LANCHOR97]
-	ldr	w27, [x0, 8]
-	add	w1, w27, 1
-	str	w1, [x0, 8]
-	bl	ftl_write_commit
-	bl	ftl_flush
-	ldrb	w21, [x26, #:lo12:.LANCHOR117]
-	udiv	w20, w22, w21
-	msub	w25, w20, w21, w22
-	cbz	w25, .L3077
-	sub	w21, w21, w25
-	mov	w0, w20
-	cmp	w21, w19
-	csel	w21, w21, w19, ls
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 120]
-	cmn	w0, #1
-	bne	.L3078
-	mov	w2, 0
-	add	x1, x29, 120
-	mov	w0, w20
-	bl	pm_log2phys
-.L3078:
-	ldr	w0, [x29, 120]
-	and	w28, w21, 65535
-	cmn	w0, #1
-	beq	.L3080
-	mov	w0, 0
-	bl	buf_alloc
-	mov	x3, x0
-	cbz	x0, .L3080
-	strb	w25, [x0, 57]
-	ubfiz	x25, x25, 9, 25
-	strb	w21, [x0, 56]
-	mov	w1, 0
-	ldr	x0, [x0, 8]
-	lsl	w2, w28, 9
-	stp	w27, w20, [x3, 32]
-	str	x3, [x29, 96]
-	add	x0, x0, x25
-	bl	ftl_memset
-	ldr	x3, [x29, 96]
-	mov	x0, x3
-	bl	ftl_write_buf
-	bl	ftl_write_commit
-	ldr	x1, [x23, #:lo12:.LANCHOR97]
-	ldr	w0, [x1, 76]
-	add	w0, w0, 1
-	str	w0, [x1, 76]
-.L3080:
-	add	w20, w20, 1
-	sub	w19, w19, w28
-.L3077:
-	cbz	w19, .L3082
-	bl	ftl_flush
-.L3082:
-	adrp	x25, .LANCHOR96
-	add	x21, x26, :lo12:.LANCHOR117
-	add	x25, x25, :lo12:.LANCHOR96
-	mov	w0, -1
-	str	w0, [x29, 124]
-.L3083:
-	ldrb	w0, [x21]
-	cmp	w19, w0
-	bcs	.L3088
-	cbz	w19, .L3090
-	mov	w0, w20
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 120]
-	cmn	w0, #1
-	bne	.L3091
-	mov	w2, 0
-	add	x1, x29, 120
-	mov	w0, w20
-	bl	pm_log2phys
-.L3091:
-	ldr	w0, [x29, 120]
-	cmn	w0, #1
-	beq	.L3090
-	mov	w0, 0
-	bl	buf_alloc
-	mov	x21, x0
-	cbz	x0, .L3090
-	strb	wzr, [x0, 57]
-	strb	w19, [x0, 56]
-	stp	w27, w20, [x21, 32]
-	ldrb	w0, [x26, #:lo12:.LANCHOR117]
-	cmp	w19, w0
-	bcc	.L3093
-	adrp	x1, .LANCHOR206
-	adrp	x0, .LC0
-	mov	w2, 1178
-	add	x1, x1, :lo12:.LANCHOR206
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L3093:
-	ldr	x0, [x21, 8]
-	lsl	w2, w19, 9
-	mov	w1, 0
-	bl	ftl_memset
-	mov	x0, x21
-	bl	ftl_write_buf
-	bl	ftl_write_commit
-	ldr	x1, [x23, #:lo12:.LANCHOR97]
-	ldr	w0, [x1, 76]
-	add	w0, w0, 1
-	str	w0, [x1, 76]
-.L3090:
-	ldr	w1, [x24, #:lo12:.LANCHOR205]
-	cmp	w1, 8192
-	bls	.L3096
-	ldr	x0, [x29, 104]
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L3094
-	adrp	x0, .LC213
-	mov	w4, 0
-	mov	w3, w19
-	mov	w2, w22
-	add	x0, x0, :lo12:.LC213
-	bl	printf
-.L3094:
-	str	wzr, [x24, #:lo12:.LANCHOR205]
-	bl	flt_sys_flush
-	adrp	x0, .LANCHOR207
-	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR207]
-.L3096:
-	mov	w0, 0
-	b	.L3074
-.L3088:
-	mov	w0, w20
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 120]
-	cmn	w0, #1
-	beq	.L3084
-	mov	w0, 0
-	bl	buf_alloc
-	mov	x28, x0
-	cbz	x0, .L3086
-	ldrb	w2, [x21]
-	mov	w1, 0
-	strb	w2, [x0, 56]
-	strb	wzr, [x0, 57]
-	ldr	x0, [x0, 8]
-	lsl	w2, w2, 9
-	stp	w27, w20, [x28, 32]
-	bl	ftl_memset
-	mov	x0, x28
-	bl	ftl_write_buf
-	bl	ftl_write_commit
-.L3122:
-	ldr	x1, [x23, #:lo12:.LANCHOR97]
-	ldr	w0, [x1, 76]
-	add	w0, w0, 1
-	str	w0, [x1, 76]
-.L3086:
-	ldrb	w0, [x21]
-	add	w20, w20, 1
-	sub	w19, w19, w0
-	b	.L3083
-.L3084:
-	mov	w2, 0
-	add	x1, x29, 120
-	mov	w0, w20
-	bl	pm_log2phys
-	ldr	w0, [x29, 120]
-	cmn	w0, #1
-	beq	.L3086
-	add	x1, x29, 124
-	mov	w2, 1
-	mov	w0, w20
-	bl	pm_log2phys
-	ldrh	w3, [x25]
-	mov	w0, 21
-	ldr	w1, [x29, 120]
-	sub	w2, w0, w3
-	mov	w0, 1
-	lsr	w1, w1, w3
-	lsl	w0, w0, w2
-	sub	w0, w0, #1
-	and	w0, w0, w1
-	adrp	x1, .LANCHOR95
-	ldrb	w1, [x1, #:lo12:.LANCHOR95]
-	udiv	w0, w0, w1
-	bl	ftl_vpn_decrement
-	b	.L3122
-.L3095:
-	mov	w0, -1
+	add	x0, x0, x2, lsl 6
+	ldrh	w1, [x0, 48]
+	ldr	w3, [x0, 40]
+	ldr	x0, [x5, #:lo12:.LANCHOR148]
+	str	w3, [x0, x1, lsl 2]
+	b	.L3060
+.L3062:
+	add	w0, w19, w26, lsr 1
+	ldrh	w1, [x1, #:lo12:.LANCHOR108]
+	add	x0, x22, x0, sxtw 1
+	ldrh	w0, [x0, 16]
+	madd	w0, w0, w1, w21
+	and	w1, w26, 1
+	add	w0, w0, w1
+	b	.L3120
+.L3065:
+	adrp	x1, .LANCHOR73
+	ldrb	w3, [x1, #:lo12:.LANCHOR73]
+	ldr	x1, [x29, 160]
+	cbz	w3, .L3067
+.L3070:
+	strb	wzr, [x1, 60]
+	b	.L3068
+.L3067:
+	cmp	w23, 1
+	bne	.L3069
+	mov	w3, 9
+.L3119:
+	strb	w3, [x1, 60]
+.L3068:
+	add	x1, x0, 24
+	bl	sblk_xlc_prog_pages
+.L3071:
+	adrp	x1, .LANCHOR73
+	ldrb	w3, [x22, 9]
+	ldrb	w1, [x1, #:lo12:.LANCHOR73]
+	and	w0, w3, 65535
+	cbz	w1, .L3073
+	add	w0, w0, w0, lsl 1
 .L3074:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 128
-	ret
-	.size	zftl_discard, .-zftl_discard
-	.section	.text.ftl_discard,"ax",@progbits
-	.align	2
-	.global	ftl_discard
-	.type	ftl_discard, %function
-ftl_discard:
-	mov	w0, w1
-	mov	w1, w2
-	b	zftl_discard
-	.size	ftl_discard, .-ftl_discard
+	adrp	x1, .LANCHOR100
+	add	x24, x24, :lo12:.LANCHOR65
+	ldr	x1, [x1, #:lo12:.LANCHOR100]
+	ldr	w2, [x1, 52]
+	add	w2, w2, w0
+	str	w2, [x1, 52]
+	ldrh	w1, [x24, 314]
+	add	w0, w0, w1
+	adrp	x1, .LANCHOR75
+	and	w0, w0, 65535
+	strh	w0, [x24, 314]
+	ldrh	w1, [x1, #:lo12:.LANCHOR75]
+	mul	w1, w1, w3
+	cmp	w0, w1
+	blt	.L3075
+	ldr	x0, [x29, 136]
+	ldr	x0, [x0, #:lo12:.LANCHOR6]
+	strh	wzr, [x0, 86]
+.L3075:
+	bl	gc_write_completed
+	b	.L3032
+.L3069:
+	cmp	w23, 2
+	bne	.L3070
+	mov	w3, 13
+	b	.L3119
+.L3072:
+	ldr	x4, [x0, w2, sxtw 3]
+	add	w2, w2, 1
+	ldr	x5, [x0, w2, sxtw 3]
+	and	w2, w2, 65535
+	ldrb	w5, [x5, 1]
+	strb	w5, [x4]
+	b	.L3066
+.L3073:
+	adrp	x1, .LANCHOR107
+	ldrb	w2, [x1, #:lo12:.LANCHOR107]
+	mov	w1, w0
+	ubfiz	w0, w0, 1, 15
+	cmp	w2, 0
+	csel	w0, w0, w1, ne
+	b	.L3074
+	.size	gc_do_copy_back, .-gc_do_copy_back
 	.section	.text.zftl_do_gc,"ax",@progbits
 	.align	2
 	.global	zftl_do_gc
 	.type	zftl_do_gc, %function
 zftl_do_gc:
-	sub	sp, sp, #96
-	adrp	x2, .LANCHOR89
-	adrp	x1, .LANCHOR93
+	sub	sp, sp, #128
+	adrp	x1, .LANCHOR97
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
+	stp	x21, x22, [sp, 48]
 	stp	x19, x20, [sp, 32]
-	adrp	x19, .LANCHOR138
+	adrp	x19, .LANCHOR144
+	ldrh	w22, [x1, #:lo12:.LANCHOR97]
+	adrp	x1, .LANCHOR93
 	stp	x23, x24, [sp, 64]
-	adrp	x24, .LANCHOR5
-	ldrh	w20, [x2, #:lo12:.LANCHOR89]
-	stp	x21, x22, [sp, 48]
-	ldrb	w2, [x19, #:lo12:.LANCHOR138]
+	adrp	x23, .LANCHOR6
 	ldrh	w21, [x1, #:lo12:.LANCHOR93]
 	stp	x25, x26, [sp, 80]
-	cmp	w2, 6
-	ldr	x23, [x24, #:lo12:.LANCHOR5]
-	add	w20, w21, w20
-	bhi	.L3231
-	mov	w22, w0
-	and	w20, w20, 65535
-	adrp	x0, .L3127
-	mov	x25, x1
-	add	x0, x0, :lo12:.L3127
-	ldrh	w0, [x0,w2,uxtw #1]
-	adr	x1, .Lrtx3127
+	ldrb	w1, [x19, #:lo12:.LANCHOR144]
+	add	w21, w22, w21
+	stp	x27, x28, [sp, 96]
+	ldr	x24, [x23, #:lo12:.LANCHOR6]
+	cmp	w1, 6
+	bhi	.L3226
+	mov	w26, w0
+	and	w21, w21, 65535
+	adrp	x0, .L3124
+	add	x0, x0, :lo12:.L3124
+	ldrh	w0, [x0,w1,uxtw #1]
+	adr	x1, .Lrtx3124
 	add	x0, x1, w0, sxth #2
 	br	x0
-.Lrtx3127:
+.Lrtx3124:
 	.section	.rodata.zftl_do_gc,"a",@progbits
 	.align	0
 	.align	2
-.L3127:
-	.2byte	(.L3126 - .Lrtx3127) / 4
-	.2byte	(.L3128 - .Lrtx3127) / 4
-	.2byte	(.L3129 - .Lrtx3127) / 4
-	.2byte	(.L3130 - .Lrtx3127) / 4
-	.2byte	(.L3131 - .Lrtx3127) / 4
-	.2byte	(.L3132 - .Lrtx3127) / 4
-	.2byte	(.L3133 - .Lrtx3127) / 4
+.L3124:
+	.2byte	(.L3123 - .Lrtx3124) / 4
+	.2byte	(.L3125 - .Lrtx3124) / 4
+	.2byte	(.L3126 - .Lrtx3124) / 4
+	.2byte	(.L3127 - .Lrtx3124) / 4
+	.2byte	(.L3128 - .Lrtx3124) / 4
+	.2byte	(.L3129 - .Lrtx3124) / 4
+	.2byte	(.L3130 - .Lrtx3124) / 4
 	.section	.text.zftl_do_gc
-.L3132:
-	adrp	x21, .LANCHOR63
-	add	x25, x21, :lo12:.LANCHOR63
-	mov	w23, 0
-.L3134:
+.L3129:
+	adrp	x20, .LANCHOR65
+	add	x24, x20, :lo12:.LANCHOR65
+	mov	w22, 0
+.L3131:
 	bl	gc_check_data_one_wl
-	cbz	w0, .L3199
-	ldr	x0, [x24, #:lo12:.LANCHOR5]
-	add	x21, x21, :lo12:.LANCHOR63
-	strh	wzr, [x21, 56]
+	cbz	w0, .L3222
+	ldr	x0, [x23, #:lo12:.LANCHOR6]
+	add	x20, x20, :lo12:.LANCHOR65
+	strh	wzr, [x20, 56]
 	ldrh	w0, [x0, 80]
 	bl	ftl_free_sblk
-	adrp	x2, .LANCHOR97
-	ldr	x1, [x24, #:lo12:.LANCHOR5]
+	adrp	x2, .LANCHOR100
+	ldr	x1, [x23, #:lo12:.LANCHOR6]
 	mov	w0, -1
-	ldr	x2, [x2, #:lo12:.LANCHOR97]
+	ldr	x2, [x2, #:lo12:.LANCHOR100]
 	strh	w0, [x1, 80]
 	strh	w0, [x2, 126]
 	strh	w0, [x1, 130]
-	ldr	x0, [x21, 8]
+	ldr	x0, [x20, 8]
 	bl	buf_free
-	strb	wzr, [x19, #:lo12:.LANCHOR138]
-	str	xzr, [x21, 8]
-	b	.L3255
-.L3126:
-	adrp	x0, .LANCHOR91
+	strb	wzr, [x19, #:lo12:.LANCHOR144]
+	str	xzr, [x20, 8]
+	b	.L3290
+.L3123:
+	adrp	x0, .LANCHOR95
+	adrp	x28, .LANCHOR88
+	adrp	x27, .LANCHOR86
+	ldrh	w1, [x24, 80]
+	ldrh	w0, [x0, #:lo12:.LANCHOR95]
+	ldrh	w25, [x28, #:lo12:.LANCHOR88]
+	add	w22, w22, w0
+	ldrh	w0, [x27, #:lo12:.LANCHOR86]
+	and	w22, w22, 65535
+	add	w25, w25, w0
+	mov	w0, 65535
+	and	w25, w25, 65535
+	cmp	w1, w0
+	beq	.L3132
+	cbnz	w26, .L3133
+	adrp	x0, .LANCHOR77
+	ldrh	w0, [x0, #:lo12:.LANCHOR77]
+	cmp	w21, w0, lsl 1
+	blt	.L3133
+.L3226:
+	mov	w20, 16
+	b	.L3121
+.L3133:
+	adrp	x5, .LANCHOR85
+	mov	w1, 5
+	adrp	x26, .LANCHOR74
+	ldrh	w0, [x5, #:lo12:.LANCHOR85]
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	strh	w0, [x5, #:lo12:.LANCHOR85]
+	bl	zftl_get_gc_node
+	and	w3, w0, 65535
 	mov	w1, 65535
-	ldrh	w4, [x0, #:lo12:.LANCHOR91]
-	ldrh	w0, [x23, 80]
-	add	w21, w21, w4
-	and	w21, w21, 65535
-	cmp	w0, w1
-	beq	.L3135
-	adrp	x1, .LANCHOR7
-	cmp	w21, 7
-	mov	w22, 3
-	adrp	x24, .LANCHOR70
-	ldr	w1, [x1, #:lo12:.LANCHOR7]
-	csinc	w22, w22, wzr, hi
-	tbz	x1, 8, .L3137
-	ldrh	w7, [x23, 122]
-	mov	w4, w21
-	ldrh	w6, [x23, 120]
-	mov	w3, w20
-	ldrh	w5, [x23, 124]
-	mov	w1, 1705
-	ldrb	w2, [x24, #:lo12:.LANCHOR70]
+	cmp	w3, w1
+	beq	.L3134
+	adrp	x4, .LANCHOR5
+	ubfiz	x3, x3, 1, 16
+	adrp	x1, .LANCHOR145
+	mov	x20, x1
+	ldr	x4, [x4, #:lo12:.LANCHOR5]
+	ldr	w2, [x1, #:lo12:.LANCHOR145]
+	add	w2, w2, 1
+	str	w2, [x1, #:lo12:.LANCHOR145]
+	ldrh	w3, [x4, x3]
+	adrp	x4, .LANCHOR83
+	ldrh	w4, [x4, #:lo12:.LANCHOR83]
+	cmp	w4, w3
+	bcs	.L3135
+	adrp	x1, .LANCHOR2
+	ldrh	w1, [x1, #:lo12:.LANCHOR2]
+	cmp	w2, w1, lsr 4
+	bls	.L3134
+	adrp	x1, .LANCHOR89
+	ldrh	w1, [x1, #:lo12:.LANCHOR89]
+	cmp	w1, w3
+	bls	.L3134
+.L3135:
+	ldrb	w2, [x26, #:lo12:.LANCHOR74]
+	mov	w1, 0
+	bl	gc_add_sblk
+	cbz	w0, .L3136
+	mov	w0, 1
+	str	wzr, [x20, #:lo12:.LANCHOR145]
+	strb	w0, [x19, #:lo12:.LANCHOR144]
+	b	.L3226
+.L3134:
+	strh	wzr, [x5, #:lo12:.LANCHOR85]
+.L3136:
+	cmp	w22, 15
+	bls	.L3228
+	adrp	x0, .LANCHOR90
+	ldrh	w1, [x0, #:lo12:.LANCHOR90]
+	adrp	x0, .LANCHOR91
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	cmp	w1, w0
+	bhi	.L3228
+	cmp	w25, 0
+	cset	w20, eq
+	add	w20, w20, 1
+.L3137:
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 8, .L3138
+	ldr	x0, [x23, #:lo12:.LANCHOR6]
+	mov	w4, w22
+	ldrb	w2, [x26, #:lo12:.LANCHOR74]
+	mov	w3, w21
+	mov	w1, 1848
+	ldrh	w7, [x0, 122]
+	ldrh	w6, [x0, 120]
+	ldrh	w5, [x0, 124]
+	ldrh	w0, [x24, 80]
 	str	w0, [sp]
-	adrp	x0, .LC214
-	add	x0, x0, :lo12:.LC214
+	adrp	x0, .LC210
+	add	x0, x0, :lo12:.LC210
 	bl	printf
-.L3137:
-	ldrb	w0, [x24, #:lo12:.LANCHOR70]
+.L3138:
+	ldrb	w0, [x26, #:lo12:.LANCHOR74]
 	mov	w2, 1
-	mov	w1, w22
+	mov	w1, w20
 	bl	gc_search_src_blk
 	cmp	w0, 0
-	ble	.L3231
-.L3138:
+	ble	.L3139
+.L3140:
 	mov	w0, 1
-.L3254:
-	strb	w0, [x19, #:lo12:.LANCHOR138]
-	b	.L3231
-.L3135:
-	adrp	x0, .LANCHOR84
-	cmp	w22, 1
-	ldrh	w25, [x0, #:lo12:.LANCHOR84]
-	adrp	x0, .LANCHOR82
-	ldrh	w26, [x0, #:lo12:.LANCHOR82]
-	bne	.L3139
+.L3292:
+	strb	w0, [x19, #:lo12:.LANCHOR144]
+	b	.L3226
+.L3228:
+	mov	w20, 2
+	b	.L3137
+.L3139:
+	ldrb	w0, [x26, #:lo12:.LANCHOR74]
+	mov	w2, 1
+	mov	w1, 3
+	bl	gc_search_src_blk
+	cmp	w0, 0
+	bgt	.L3140
+	b	.L3226
+.L3132:
+	cmp	w26, 1
+	bne	.L3142
 	bl	gc_scan_static_data
-	bl	gc_static_wearleveling
-.L3140:
-	ldr	x2, [x24, #:lo12:.LANCHOR5]
-	adrp	x1, .LANCHOR70
+	adrp	x24, .LANCHOR74
+	ldr	x0, [x23, #:lo12:.LANCHOR6]
+	ldrh	w0, [x0, 122]
+	cbz	w0, .L3143
+.L3144:
 	mov	w0, 1
-	mov	x24, x1
-	strb	w0, [x1, #:lo12:.LANCHOR70]
-	ldrh	w5, [x2, 124]
-	cbz	w5, .L3142
-	strb	w0, [x19, #:lo12:.LANCHOR138]
-	adrp	x0, .LANCHOR7
-	strb	wzr, [x1, #:lo12:.LANCHOR70]
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L3231
-	ldrh	w7, [x2, 122]
-	mov	w4, w21
-	ldrh	w6, [x2, 120]
-	mov	w3, w20
+	strb	w0, [x24, #:lo12:.LANCHOR74]
+	b	.L3292
+.L3143:
+	bl	gc_static_wearleveling
+	mov	w20, w0
+	cbnz	w0, .L3144
+	cbnz	w22, .L3145
+.L3149:
+	mov	w20, 16
+.L3146:
+	ldr	x0, [x23, #:lo12:.LANCHOR6]
+	adrp	x3, .LANCHOR74
+	mov	w1, 1
+	mov	x23, x3
+	strb	w1, [x3, #:lo12:.LANCHOR74]
+	ldrh	w5, [x0, 124]
+	cbz	w5, .L3154
+	strb	w1, [x19, #:lo12:.LANCHOR144]
+	adrp	x1, .LANCHOR9
+	strb	wzr, [x3, #:lo12:.LANCHOR74]
+	ldr	w1, [x1, #:lo12:.LANCHOR9]
+	tbz	x1, 8, .L3121
+	ldrh	w7, [x0, 122]
+	mov	w4, w22
+	ldrh	w6, [x0, 120]
+	mov	w3, w21
+	adrp	x0, .LC211
 	mov	w2, 0
-	mov	w1, 1762
-	adrp	x0, .LC215
-	add	x0, x0, :lo12:.LC215
+	mov	w1, 1946
+	add	x0, x0, :lo12:.LC211
 	bl	printf
-	b	.L3231
-.L3139:
-	adrp	x0, .LANCHOR73
-	ldrh	w0, [x0, #:lo12:.LANCHOR73]
-	cmp	w0, w20
-	bcs	.L3140
-.L3231:
-	mov	w0, 16
+.L3121:
+	mov	w0, w20
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
 	ldp	x25, x26, [sp, 80]
+	ldp	x27, x28, [sp, 96]
 	ldp	x29, x30, [sp, 16]
-	add	sp, sp, 96
+	add	sp, sp, 128
 	ret
-.L3142:
-	adrp	x23, .LANCHOR73
-	ldrh	w1, [x23, #:lo12:.LANCHOR73]
-	cmp	w20, w1
-	bcs	.L3143
-	cmp	w21, 1
-	bls	.L3144
-	cmp	w21, 16
-	bls	.L3145
-	adrp	x1, .LANCHOR86
-	ldrh	w2, [x1, #:lo12:.LANCHOR86]
-	adrp	x1, .LANCHOR87
-	ldrh	w1, [x1, #:lo12:.LANCHOR87]
-	cmp	w2, w1
-	bcs	.L3145
-	mov	w2, 16
-	mov	w1, 3
-.L3251:
+.L3145:
+	cmp	w21, w25
+	adrp	x1, .LANCHOR90
+	adrp	x2, .LANCHOR87
+	bcs	.L3147
+	ldrh	w0, [x2, #:lo12:.LANCHOR87]
+	cmp	w21, w0, lsl 1
+	blt	.L3148
+.L3147:
+	ldrh	w2, [x2, #:lo12:.LANCHOR87]
+	add	w0, w21, w25
+	cmp	w0, w2, lsl 1
+	blt	.L3148
+	adrp	x0, .LANCHOR91
+	ldrh	w2, [x1, #:lo12:.LANCHOR90]
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	cmp	w2, w0
+	bcc	.L3149
+.L3148:
+	adrp	x5, .LANCHOR145
+	adrp	x2, .LANCHOR2
+	mov	w6, 1
+	strb	w6, [x24, #:lo12:.LANCHOR74]
+	ldr	w0, [x5, #:lo12:.LANCHOR145]
+	ldrh	w2, [x2, #:lo12:.LANCHOR2]
+	add	w0, w0, 1
+	str	w0, [x5, #:lo12:.LANCHOR145]
+	cmp	w0, w2, lsr 5
+	bls	.L3150
+	ldrh	w0, [x1, #:lo12:.LANCHOR90]
+	cmp	w0, w22
+	bls	.L3150
+	mov	w1, 5
+	mov	w0, 0
+	bl	zftl_get_gc_node
+	and	w0, w0, 65535
+	mov	w1, 65535
+	cmp	w0, w1
+	beq	.L3149
+	adrp	x1, .LANCHOR5
+	ubfiz	x0, x0, 1, 16
+	adrp	x2, .LANCHOR76
+	ldr	x1, [x1, #:lo12:.LANCHOR5]
+	ldrb	w2, [x2, #:lo12:.LANCHOR76]
+	ldrh	w1, [x1, x0]
+	adrp	x0, .LANCHOR83
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	mul	w0, w0, w2
+	cmp	w1, w0
+	bgt	.L3149
+	mov	w0, w6
+	str	wzr, [x5, #:lo12:.LANCHOR145]
+	mov	w2, 4
+	mov	w1, 2
+.L3280:
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-.L3146:
-	cbnz	w0, .L3138
-	b	.L3231
-.L3145:
-	mov	w2, 2
-	mov	w1, w2
+	cbz	w0, .L3149
+	b	.L3140
+.L3150:
+	adrp	x0, .LANCHOR91
+	ldrh	w1, [x1, #:lo12:.LANCHOR90]
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	cmp	w1, w0
+	bcc	.L3152
+	mov	w2, 1
+	mov	w1, 2
+	mov	w0, w2
+	b	.L3280
+.L3152:
+	ldrh	w0, [x28, #:lo12:.LANCHOR88]
+	cbnz	w0, .L3153
+	ldrh	w0, [x27, #:lo12:.LANCHOR86]
+	cmp	w0, 8
+	bls	.L3146
+.L3153:
+	mov	w1, 1
+	mov	w2, 4
+	mov	w0, w1
+	b	.L3280
+.L3142:
+	adrp	x0, .LANCHOR77
+	ldrh	w0, [x0, #:lo12:.LANCHOR77]
+	cmp	w0, w21
+	bcc	.L3226
+	b	.L3149
+.L3154:
+	adrp	x2, .LANCHOR77
+	mov	x24, x2
+	ldrh	w4, [x2, #:lo12:.LANCHOR77]
+	cmp	w21, w4
+	bcs	.L3155
+	cbz	w22, .L3156
+	cmp	w22, 16
+	bls	.L3157
+	adrp	x0, .LANCHOR90
+	ldrh	w2, [x0, #:lo12:.LANCHOR90]
+	adrp	x0, .LANCHOR91
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	cmp	w2, w0
+	bhi	.L3157
+	str	x3, [x29, 104]
+	mov	w2, 4
+	mov	w0, w1
+	bl	gc_search_src_blk
+	ldr	x3, [x29, 104]
+	tst	w0, 65535
+	bne	.L3158
+	ldrb	w0, [x3, #:lo12:.LANCHOR74]
+	mov	w2, 4
+	mov	w1, 3
+.L3282:
+	bl	gc_search_src_blk
+	and	w0, w0, 65535
+.L3159:
+	cbnz	w0, .L3161
+	b	.L3121
+.L3158:
+	mov	w1, 5
+	mov	w0, 0
+	bl	zftl_get_gc_node
+	and	w3, w0, 65535
+	mov	w1, 65535
+	cmp	w3, w1
+	beq	.L3161
+	adrp	x4, .LANCHOR5
+	ubfiz	x3, x3, 1, 16
+	adrp	x1, .LANCHOR145
+	mov	x21, x1
+	ldr	x4, [x4, #:lo12:.LANCHOR5]
+	ldr	w2, [x1, #:lo12:.LANCHOR145]
+	add	w2, w2, 1
+	str	w2, [x1, #:lo12:.LANCHOR145]
+	ldrh	w3, [x4, x3]
+	adrp	x4, .LANCHOR83
+	ldrh	w4, [x4, #:lo12:.LANCHOR83]
+	cmp	w4, w3
+	bcs	.L3162
+	adrp	x1, .LANCHOR2
+	ldrh	w1, [x1, #:lo12:.LANCHOR2]
+	cmp	w2, w1, lsr 4
+	bls	.L3161
+	adrp	x1, .LANCHOR89
+	ldrh	w1, [x1, #:lo12:.LANCHOR89]
+	cmp	w1, w3
+	bls	.L3161
+.L3162:
+	ldrb	w2, [x23, #:lo12:.LANCHOR74]
+	mov	w1, 0
+	bl	gc_add_sblk
+	str	wzr, [x21, #:lo12:.LANCHOR145]
+	adrp	x0, .LANCHOR119
+	mov	w1, 1
+	str	w1, [x0, #:lo12:.LANCHOR119]
+.L3161:
 	mov	w0, 1
-.L3257:
+	strb	w0, [x19, #:lo12:.LANCHOR144]
+	b	.L3121
+.L3157:
+	mov	w2, 1
+	mov	w0, w2
+	mov	w1, 2
+.L3289:
 	bl	gc_search_src_blk
 	tst	w0, 65535
-	bne	.L3138
+	bne	.L3161
 	mov	w2, 2
-	b	.L3252
-.L3144:
-	adrp	x0, .LANCHOR7
-	strb	wzr, [x24, #:lo12:.LANCHOR70]
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L3148
-	ldrh	w7, [x2, 122]
-	adrp	x0, .LC215
-	ldrh	w6, [x2, 120]
+.L3285:
+	mov	w1, 3
+	ldrb	w0, [x23, #:lo12:.LANCHOR74]
+	b	.L3282
+.L3156:
+	adrp	x1, .LANCHOR9
+	strb	wzr, [x3, #:lo12:.LANCHOR74]
+	ldr	w1, [x1, #:lo12:.LANCHOR9]
+	tbz	x1, 8, .L3164
+	ldrh	w7, [x0, 122]
 	mov	w5, 0
-	mov	w4, w21
-	mov	w3, w20
+	ldrh	w6, [x0, 120]
+	mov	w4, 0
+	adrp	x0, .LC211
+	mov	w3, w21
 	mov	w2, 0
-	mov	w1, 1778
-	add	x0, x0, :lo12:.LC215
+	mov	w1, 1976
+	add	x0, x0, :lo12:.LC211
 	bl	printf
-.L3148:
-	cmp	w20, 16
-	bls	.L3149
+.L3164:
+	cmp	w21, 16
+	bls	.L3165
 	mov	w2, 4
-.L3252:
-	mov	w1, 3
-	ldrb	w0, [x24, #:lo12:.LANCHOR70]
-	b	.L3251
-.L3149:
+	b	.L3285
+.L3165:
 	mov	w2, 1
-	ldrb	w0, [x24, #:lo12:.LANCHOR70]
+	ldrb	w0, [x23, #:lo12:.LANCHOR74]
 	mov	w1, w2
-	b	.L3257
-.L3143:
+	b	.L3289
+.L3155:
+	cmp	w26, 1
+	bne	.L3121
+	cmp	w21, w4, lsl 1
+	bge	.L3166
+	cmp	w25, w22, lsr 1
+	bcs	.L3167
+	adrp	x0, .LANCHOR90
+	ldrh	w1, [x0, #:lo12:.LANCHOR90]
+	adrp	x0, .LANCHOR91
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	cmp	w1, w0
+	bcs	.L3167
+	adrp	x0, .LANCHOR87
+	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	lsr	w0, w0, 2
+	strh	w0, [x2, #:lo12:.LANCHOR77]
+	b	.L3121
+.L3167:
+	mov	w1, 5
+	mov	w0, 0
+	bl	zftl_get_gc_node
+	and	w26, w0, 65535
+	mov	w1, 65535
+	mov	w3, w26
+	cmp	w26, w1
+	bne	.L3168
+.L3173:
 	cmp	w22, 1
-	lsl	w1, w1, 1
-	bne	.L3151
-	cmp	w20, w1
-	bge	.L3151
-	add	w0, w25, w26
+	bhi	.L3169
+.L3170:
+	cmp	w21, w25
+	adrp	x21, .LANCHOR87
+	bcs	.L3177
+	strb	wzr, [x23, #:lo12:.LANCHOR74]
+	mov	w0, 4
+	bl	zftl_get_gc_node.part.10
 	and	w0, w0, 65535
-	cmp	w0, w21, lsr 1
-	bcs	.L3152
-	adrp	x1, .LANCHOR86
-	ldrh	w2, [x1, #:lo12:.LANCHOR86]
-	adrp	x1, .LANCHOR87
-	ldrh	w1, [x1, #:lo12:.LANCHOR87]
+	mov	w1, 65535
+	cmp	w0, w1
+	beq	.L3177
+	adrp	x1, .LANCHOR5
+	ubfiz	x0, x0, 1, 16
+	adrp	x2, .LANCHOR76
+	ldr	x1, [x1, #:lo12:.LANCHOR5]
+	ldrb	w2, [x2, #:lo12:.LANCHOR76]
+	ldrh	w1, [x1, x0]
+	adrp	x0, .LANCHOR83
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	mul	w0, w0, w2
+	cmp	w1, w0, lsr 1
+	ble	.L3179
+.L3177:
+	ldrh	w0, [x21, #:lo12:.LANCHOR87]
+	lsr	w0, w0, 2
+	strh	w0, [x24, #:lo12:.LANCHOR77]
+	b	.L3121
+.L3168:
+	adrp	x2, .LANCHOR145
+	adrp	x4, .LANCHOR2
+	uxtw	x26, w26
+	ldr	w1, [x2, #:lo12:.LANCHOR145]
+	ldrh	w4, [x4, #:lo12:.LANCHOR2]
+	add	w1, w1, 1
+	str	w1, [x2, #:lo12:.LANCHOR145]
+	cmp	w1, w4, lsr 4
+	adrp	x4, .LANCHOR5
+	bls	.L3171
+	ldr	x1, [x4, #:lo12:.LANCHOR5]
+	str	wzr, [x2, #:lo12:.LANCHOR145]
+	ldrh	w2, [x1, x26, lsl 1]
+	adrp	x1, .LANCHOR89
+	ldrh	w1, [x1, #:lo12:.LANCHOR89]
 	cmp	w2, w1
-	bcs	.L3152
-.L3156:
+	bcs	.L3171
+	str	x4, [x29, 96]
+	mov	w2, 1
+	str	w3, [x29, 104]
+	mov	w1, 0
+	bl	gc_add_sblk
+	ldr	w3, [x29, 104]
+	ldr	x4, [x29, 96]
+	cbnz	w0, .L3161
+.L3171:
+	ldr	x0, [x4, #:lo12:.LANCHOR5]
+	ldrh	w1, [x0, x26, lsl 1]
 	adrp	x0, .LANCHOR83
 	ldrh	w0, [x0, #:lo12:.LANCHOR83]
-	lsr	w0, w0, 1
-	strh	w0, [x23, #:lo12:.LANCHOR73]
-	b	.L3231
-.L3152:
-	cmp	w21, 1
-	adrp	x22, .LANCHOR83
-	bls	.L3153
-	cmp	w21, 16
-	bls	.L3154
-	mov	w2, 8
+	cmp	w1, w0, lsr 1
+	bhi	.L3172
+	mov	w2, 0
+	mov	w1, 1
+	mov	w0, w3
+	bl	gc_add_sblk
+	b	.L3161
+.L3172:
+	ldrh	w2, [x27, #:lo12:.LANCHOR86]
+	ldrh	w0, [x28, #:lo12:.LANCHOR88]
+	add	w0, w0, w2
+	adrp	x2, .LANCHOR87
+	ldrh	w2, [x2, #:lo12:.LANCHOR87]
+	cmp	w0, w2, lsl 1
+	ble	.L3173
+	adrp	x0, .LANCHOR89
+	ldrh	w0, [x0, #:lo12:.LANCHOR89]
+	cmp	w0, w1
+	bcc	.L3170
+	b	.L3173
+.L3169:
+	mov	w1, 1
+	strb	w1, [x23, #:lo12:.LANCHOR74]
+	cmp	w22, 16
+	bls	.L3174
+	adrp	x0, .LANCHOR90
+	ldrh	w2, [x0, #:lo12:.LANCHOR90]
+	adrp	x0, .LANCHOR91
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	cmp	w2, w0
+	bhi	.L3174
+	mov	w2, 4
+	mov	w0, w1
+	bl	gc_search_src_blk
+	ands	w0, w0, 65535
+	bne	.L3175
+	mov	w2, 4
+.L3281:
+	ldrb	w0, [x23, #:lo12:.LANCHOR74]
 	mov	w1, 3
-	mov	w0, 1
-.L3249:
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-.L3155:
-	ldrh	w1, [x22, #:lo12:.LANCHOR83]
-	strh	w1, [x23, #:lo12:.LANCHOR73]
-	b	.L3146
-.L3154:
-	mov	w2, 2
-	mov	w0, 1
-	mov	w1, w2
+.L3175:
+	adrp	x1, .LANCHOR87
+	cmp	w21, w25, lsr 1
+	ldrh	w1, [x1, #:lo12:.LANCHOR87]
+	bls	.L3283
+	lsr	w1, w1, 2
+.L3284:
+	strh	w1, [x24, #:lo12:.LANCHOR77]
+	b	.L3159
+.L3174:
+	mov	w2, 1
+	mov	w1, 2
+	mov	w0, w2
 	bl	gc_search_src_blk
 	ands	w0, w0, 65535
-	bne	.L3155
+	bne	.L3175
 	mov	w2, 2
+	b	.L3281
+.L3179:
 	mov	w1, 3
-	ldrb	w0, [x24, #:lo12:.LANCHOR70]
-	b	.L3249
-.L3153:
-	cmp	w20, w0
-	bcs	.L3156
-	strb	wzr, [x24, #:lo12:.LANCHOR70]
-	mov	w2, 8
-	mov	w1, 3
+	mov	w2, 4
 	mov	w0, 0
-	b	.L3249
-.L3151:
-	cmp	w20, w1
-	bge	.L3156
-	b	.L3231
-.L3128:
-	adrp	x7, .LANCHOR63
+	bl	gc_search_src_blk
+	ldrh	w1, [x21, #:lo12:.LANCHOR87]
+	and	w0, w0, 65535
+.L3283:
+	lsr	w1, w1, 1
+	b	.L3284
+.L3166:
+	adrp	x0, .LANCHOR87
+	mov	w20, 0
+	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	lsr	w0, w0, 2
+	strh	w0, [x2, #:lo12:.LANCHOR77]
+	b	.L3121
+.L3125:
+	adrp	x7, .LANCHOR65
 	mov	w0, 65535
-	ldrh	w1, [x7, #:lo12:.LANCHOR63]
+	ldrh	w1, [x7, #:lo12:.LANCHOR65]
 	cmp	w1, w0
-	bne	.L3157
+	bne	.L3180
 	bl	gc_get_src_blk
-	strh	w0, [x7, #:lo12:.LANCHOR63]
-.L3157:
-	ldrh	w3, [x7, #:lo12:.LANCHOR63]
+	strh	w0, [x7, #:lo12:.LANCHOR65]
+.L3180:
+	ldrh	w3, [x7, #:lo12:.LANCHOR65]
 	mov	w0, 65535
-	add	x1, x7, :lo12:.LANCHOR63
+	add	x1, x7, :lo12:.LANCHOR65
 	cmp	w3, w0
-	beq	.L3158
+	beq	.L3291
 	adrp	x0, .LANCHOR3
 	ldrh	w5, [x1, 56]
 	uxtw	x4, w3
 	ldr	x2, [x0, #:lo12:.LANCHOR3]
 	add	x2, x2, x4, lsl 2
-	cbz	w5, .L3159
+	cbz	w5, .L3182
 	add	x1, x1, 58
 	mov	w0, 0
-.L3161:
+.L3184:
 	ldrh	w6, [x1], 2
 	cmp	w6, w3
-	bne	.L3160
-.L3165:
-	adrp	x0, .LANCHOR63
+	bne	.L3183
+.L3188:
+	adrp	x0, .LANCHOR65
 	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR63]
-	b	.L3231
-.L3160:
+	strh	w1, [x0, #:lo12:.LANCHOR65]
+	b	.L3226
+.L3183:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w5, w0
-	bne	.L3161
-.L3159:
+	bne	.L3184
+.L3182:
 	ldrb	w0, [x2, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L3162
+	beq	.L3185
 	tst	w0, 192
-	bne	.L3163
-.L3162:
-	adrp	x0, .LANCHOR4
-	ldr	x0, [x0, #:lo12:.LANCHOR4]
+	bne	.L3186
+.L3185:
+	adrp	x0, .LANCHOR5
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	ldrh	w0, [x0, x4, lsl 1]
-	cbz	w0, .L3165
-	mov	w2, 1972
-	adrp	x1, .LANCHOR208
+	cbz	w0, .L3188
+	mov	w2, 2209
+	adrp	x1, .LANCHOR211
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR208
+	add	x1, x1, :lo12:.LANCHOR211
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3165
-.L3163:
+	b	.L3188
+.L3186:
 	mov	w0, 2
-	b	.L3254
-.L3158:
-	strb	wzr, [x19, #:lo12:.LANCHOR138]
-	b	.L3231
-.L3129:
+	b	.L3292
+.L3126:
 	bl	gc_scan_src_blk
 	cmn	w0, #1
-	bne	.L3166
+	bne	.L3189
 	mov	w0, 3
-	b	.L3254
-.L3166:
-	adrp	x20, .LANCHOR63
+	b	.L3292
+.L3189:
+	adrp	x20, .LANCHOR65
 	mov	w2, 65535
-	add	x1, x20, :lo12:.LANCHOR63
-	ldrh	w0, [x20, #:lo12:.LANCHOR63]
-	cmp	w0, w2
-	beq	.L3138
-	ldrh	w2, [x1, 24]
-	cbz	w2, .L3167
-	mov	w0, 4
-	strh	wzr, [x1, 26]
-	strb	w0, [x19, #:lo12:.LANCHOR138]
-	b	.L3231
-.L3167:
-	mov	w1, 1
-	strb	w1, [x19, #:lo12:.LANCHOR138]
-	adrp	x19, .LANCHOR4
-	ubfiz	x0, x0, 1, 16
-	ldr	x1, [x19, #:lo12:.LANCHOR4]
-	ldrh	w0, [x1, x0]
-	cbz	w0, .L3168
-	adrp	x1, .LANCHOR208
+	add	x0, x20, :lo12:.LANCHOR65
+	ldrh	w1, [x20, #:lo12:.LANCHOR65]
+	cmp	w1, w2
+	beq	.L3140
+	ldrh	w2, [x0, 24]
+	cbz	w2, .L3190
+	mov	w1, 4
+	strh	wzr, [x0, 26]
+	strb	w1, [x19, #:lo12:.LANCHOR144]
+	b	.L3226
+.L3190:
+	mov	w0, 1
+	strb	w0, [x19, #:lo12:.LANCHOR144]
+	adrp	x0, .LANCHOR5
+	ubfiz	x1, x1, 1, 16
+	mov	x19, x0
+	ldr	x2, [x0, #:lo12:.LANCHOR5]
+	ldrh	w1, [x2, x1]
+	cbz	w1, .L3191
+	adrp	x1, .LANCHOR211
 	adrp	x0, .LC0
-	mov	w2, 2000
-	add	x1, x1, :lo12:.LANCHOR208
+	mov	w2, 2237
+	add	x1, x1, :lo12:.LANCHOR211
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3168:
-	ldrh	w0, [x20, #:lo12:.LANCHOR63]
-	add	x21, x20, :lo12:.LANCHOR63
-	ldr	x2, [x19, #:lo12:.LANCHOR4]
-	ubfiz	x1, x0, 1, 16
-	ldrh	w1, [x2, x1]
-	cbnz	w1, .L3165
+.L3191:
+	ldrh	w0, [x20, #:lo12:.LANCHOR65]
+	add	x21, x20, :lo12:.LANCHOR65
 	bl	ftl_free_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR4]
-	ldrh	w1, [x20, #:lo12:.LANCHOR63]
+	ldr	x0, [x19, #:lo12:.LANCHOR5]
+	ldrh	w1, [x20, #:lo12:.LANCHOR65]
 	strh	wzr, [x0, x1, lsl 1]
 	ldrh	w0, [x21, 30]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w0, 8
-	bhi	.L3170
+	bhi	.L3192
 	strh	w0, [x21, 30]
-	b	.L3165
-.L3170:
+	b	.L3188
+.L3192:
 	strh	wzr, [x21, 30]
 	bl	ftl_flush
 	bl	pm_flush
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L3165
-.L3130:
-	adrp	x22, .LANCHOR63
-	adrp	x23, .LANCHOR80
-	add	x21, x22, :lo12:.LANCHOR63
-	add	x23, x23, :lo12:.LANCHOR80
-.L3232:
+	b	.L3188
+.L3127:
+	adrp	x20, .LANCHOR65
+	adrp	x23, .LANCHOR83
+	add	x22, x20, :lo12:.LANCHOR65
+	add	x23, x23, :lo12:.LANCHOR83
+.L3261:
 	bl	gc_scan_src_blk_one_page
-	ldrh	w1, [x21, 2]
+	ldrh	w1, [x22, 2]
 	ldrh	w0, [x23]
 	cmp	w1, w0
-	bcs	.L3171
-	cmp	w20, 7
-	bls	.L3232
-	b	.L3231
-.L3171:
-	ldrh	w3, [x21, 24]
-	adrp	x0, .LANCHOR7
-	cbz	w3, .L3172
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	bcs	.L3194
+	cmp	w21, 7
+	bls	.L3261
+	b	.L3226
+.L3194:
+	ldrh	w3, [x22, 24]
+	adrp	x0, .LANCHOR9
+	cbz	w3, .L3195
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
 	mov	w1, 4
-	strh	wzr, [x21, 26]
-	strb	w1, [x19, #:lo12:.LANCHOR138]
-	adrp	x19, .LANCHOR4
-	tbz	x0, 8, .L3173
-	ldrh	w1, [x21]
-	ldr	x2, [x19, #:lo12:.LANCHOR4]
+	strh	wzr, [x22, 26]
+	strb	w1, [x19, #:lo12:.LANCHOR144]
+	adrp	x19, .LANCHOR5
+	tbz	x0, 8, .L3196
+	ldrh	w1, [x22]
+	ldr	x2, [x19, #:lo12:.LANCHOR5]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC216
-	add	x0, x0, :lo12:.LC216
+	adrp	x0, .LC212
+	add	x0, x0, :lo12:.LC212
 	bl	printf
-.L3173:
-	ldrh	w2, [x22, #:lo12:.LANCHOR63]
-	add	x0, x22, :lo12:.LANCHOR63
-	ldr	x1, [x19, #:lo12:.LANCHOR4]
+.L3196:
+	ldrh	w2, [x20, #:lo12:.LANCHOR65]
+	add	x0, x20, :lo12:.LANCHOR65
+	ldr	x1, [x19, #:lo12:.LANCHOR5]
 	ldrh	w0, [x0, 24]
 	ldrh	w1, [x1, x2, lsl 1]
 	cmp	w1, w0
-	beq	.L3174
-	adrp	x1, .LANCHOR208
+	beq	.L3197
+	adrp	x1, .LANCHOR211
 	adrp	x0, .LC0
-	mov	w2, 2034
-	add	x1, x1, :lo12:.LANCHOR208
+	mov	w2, 2271
+	add	x1, x1, :lo12:.LANCHOR211
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3174:
-	add	x0, x22, :lo12:.LANCHOR63
-	ldrh	w1, [x22, #:lo12:.LANCHOR63]
+.L3197:
+	add	x0, x20, :lo12:.LANCHOR65
+	ldrh	w1, [x20, #:lo12:.LANCHOR65]
 	ldrh	w2, [x0, 24]
-	ldr	x0, [x19, #:lo12:.LANCHOR4]
+	ldr	x0, [x19, #:lo12:.LANCHOR5]
 	strh	w2, [x0, x1, lsl 1]
-	b	.L3231
-.L3172:
+	b	.L3226
+.L3195:
 	adrp	x2, .LANCHOR3
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	ldrh	w1, [x21]
-	ldr	x20, [x2, #:lo12:.LANCHOR3]
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	ldrh	w1, [x22]
+	ldr	x21, [x2, #:lo12:.LANCHOR3]
 	mov	w2, 1
-	strb	w2, [x19, #:lo12:.LANCHOR138]
-	add	x20, x20, x1, uxth 2
-	tbz	x0, 8, .L3175
-	ldrb	w2, [x20, 2]
-	adrp	x0, .LC217
-	add	x0, x0, :lo12:.LC217
+	strb	w2, [x19, #:lo12:.LANCHOR144]
+	add	x21, x21, x1, uxth 2
+	tbz	x0, 8, .L3198
+	ldrb	w2, [x21, 2]
+	adrp	x0, .LC213
+	add	x0, x0, :lo12:.LC213
 	ubfx	x2, x2, 5, 3
 	bl	printf
-.L3175:
-	ldrb	w0, [x20, 2]
+.L3198:
+	ldrb	w0, [x21, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L3176
+	beq	.L3199
 	tst	w0, 192
-	bne	.L3177
-.L3176:
-	adrp	x1, .LANCHOR208
+	bne	.L3200
+.L3199:
+	adrp	x1, .LANCHOR211
 	adrp	x0, .LC0
-	mov	w2, 2044
-	add	x1, x1, :lo12:.LANCHOR208
+	mov	w2, 2281
+	add	x1, x1, :lo12:.LANCHOR211
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3177:
-	ldrh	w0, [x22, #:lo12:.LANCHOR63]
-	add	x19, x22, :lo12:.LANCHOR63
+.L3200:
+	ldrh	w0, [x20, #:lo12:.LANCHOR65]
+	add	x19, x20, :lo12:.LANCHOR65
 	bl	ftl_free_sblk
 	mov	w0, -1
-	strh	w0, [x22, #:lo12:.LANCHOR63]
+	strh	w0, [x20, #:lo12:.LANCHOR65]
 	ldrh	w0, [x19, 30]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w0, 8
-	bhi	.L3178
+	bhi	.L3201
 	strh	w0, [x19, 30]
-	b	.L3231
-.L3178:
+	b	.L3226
+.L3201:
 	strh	wzr, [x19, 30]
-.L3255:
+.L3290:
 	bl	flt_sys_flush
-	b	.L3231
-.L3131:
-	ldrh	w1, [x23, 80]
+	b	.L3226
+.L3128:
+	ldrh	w1, [x24, 80]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L3179
-	adrp	x0, .LANCHOR70
-	ldrb	w0, [x0, #:lo12:.LANCHOR70]
-	cmp	w0, 1
-	bne	.L3179
+	bne	.L3202
+	adrp	x0, .LANCHOR74
+	ldrb	w22, [x0, #:lo12:.LANCHOR74]
+	cmp	w22, 1
+	bne	.L3202
 	bl	ftl_flush
-	ldrh	w0, [x25, #:lo12:.LANCHOR93]
-	cbz	w0, .L3180
-.L3253:
-	lsr	w0, w0, 1
+	adrp	x0, .LANCHOR65
+	add	x1, x0, :lo12:.LANCHOR65
+	mov	x20, x0
+	ldrh	w1, [x1, 318]
+	cbz	w1, .L3203
+	mov	w0, w22
 	mov	w1, 5
-	bl	zftl_get_free_sblk
-	and	w21, w0, 65535
-	mov	w19, w21
+.L3287:
+	bl	zftl_gc_get_free_sblk
+	and	w19, w0, 65535
 	mov	w0, 65535
-	cmp	w21, w0
-	beq	.L3182
+	cmp	w19, w0
+	beq	.L3205
 	adrp	x0, .LANCHOR3
-	ldr	x20, [x0, #:lo12:.LANCHOR3]
-	add	x20, x20, x21, uxth 2
-	ldrb	w0, [x20, 2]
+	ldr	x21, [x0, #:lo12:.LANCHOR3]
+	add	x21, x21, x19, uxth 2
+	ldrb	w0, [x21, 2]
 	tst	w0, 224
-	beq	.L3183
-	adrp	x1, .LANCHOR208
+	beq	.L3206
+	adrp	x1, .LANCHOR211
 	adrp	x0, .LC0
-	mov	w2, 2069
-	add	x1, x1, :lo12:.LANCHOR208
+	mov	w2, 2310
+	add	x1, x1, :lo12:.LANCHOR211
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3183:
-	ldrb	w0, [x20, 2]
+.L3206:
+	ldrb	w0, [x21, 2]
 	mov	w1, 5
 	bfi	w0, w1, 5, 3
 	orr	w0, w0, 16
-	strb	w0, [x20, 2]
-.L3202:
+	strb	w0, [x21, 2]
+.L3225:
 	mov	w1, 1
 	mov	w0, w19
 	bl	ftl_erase_sblk
-	adrp	x22, .LANCHOR71
+	adrp	x22, .LANCHOR75
 	mov	w0, 5
-	strb	w0, [x23, 84]
-	add	x1, x23, 96
+	strb	w0, [x24, 84]
+	add	x1, x24, 96
 	mov	w0, w19
 	bl	ftl_get_blk_list_in_sblk
 	and	w0, w0, 255
-	adrp	x1, .LANCHOR80
-	adrp	x20, .LANCHOR72
-	strb	w0, [x23, 89]
-	ldrh	w1, [x1, #:lo12:.LANCHOR80]
-	ldrh	w2, [x22, #:lo12:.LANCHOR71]
-	strh	w19, [x23, 80]
-	strh	wzr, [x23, 82]
+	adrp	x1, .LANCHOR83
+	adrp	x21, .LANCHOR76
+	strb	w0, [x24, 89]
+	ldrh	w1, [x1, #:lo12:.LANCHOR83]
+	ldrh	w2, [x22, #:lo12:.LANCHOR75]
+	strh	w19, [x24, 80]
+	strh	wzr, [x24, 82]
 	mul	w0, w0, w1
-	strb	wzr, [x23, 85]
-	strh	w0, [x23, 86]
+	strb	wzr, [x24, 85]
+	strh	w0, [x24, 86]
 	mov	w1, 255
-	ldrb	w0, [x20, #:lo12:.LANCHOR72]
-	strh	wzr, [x23, 90]
+	ldrb	w0, [x21, #:lo12:.LANCHOR76]
+	strh	wzr, [x24, 90]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR139
-	ldr	x0, [x0, #:lo12:.LANCHOR139]
+	adrp	x0, .LANCHOR146
+	ldr	x0, [x0, #:lo12:.LANCHOR146]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	ldrb	w0, [x20, #:lo12:.LANCHOR72]
+	ldrb	w0, [x21, #:lo12:.LANCHOR76]
 	mov	w1, 255
-	ldrh	w2, [x22, #:lo12:.LANCHOR71]
+	ldrh	w2, [x22, #:lo12:.LANCHOR75]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR140
-	ldr	x0, [x0, #:lo12:.LANCHOR140]
+	adrp	x0, .LANCHOR147
+	ldr	x0, [x0, #:lo12:.LANCHOR147]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	ldrb	w0, [x20, #:lo12:.LANCHOR72]
+	ldrb	w0, [x21, #:lo12:.LANCHOR76]
 	mov	w1, 255
-	ldrh	w2, [x22, #:lo12:.LANCHOR71]
+	ldrh	w2, [x22, #:lo12:.LANCHOR75]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR68
-	ldr	x0, [x0, #:lo12:.LANCHOR68]
+	adrp	x0, .LANCHOR72
+	ldr	x0, [x0, #:lo12:.LANCHOR72]
 	bl	ftl_memset
-	ldr	x0, [x24, #:lo12:.LANCHOR5]
+	ldr	x0, [x23, #:lo12:.LANCHOR6]
 	mov	w1, -1
-	str	w21, [x0, 132]
+	str	w19, [x0, 132]
 	strh	w1, [x0, 128]
 	strh	w1, [x0, 130]
 	bl	pm_flush
 	bl	ftl_ext_info_flush
-	adrp	x0, .LANCHOR97
+	adrp	x0, .LANCHOR100
 	mov	w1, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR97]
+	ldr	x0, [x0, #:lo12:.LANCHOR100]
 	strh	w19, [x0, 126]
-	adrp	x0, .LANCHOR63
-	add	x0, x0, :lo12:.LANCHOR63
-	str	w1, [x0, 320]
+	add	x0, x20, :lo12:.LANCHOR65
+	str	w1, [x0, 324]
 	strh	wzr, [x0, 314]
 	strh	wzr, [x0, 56]
 	strh	wzr, [x0, 316]
-	strh	wzr, [x0, 318]
+	strh	wzr, [x0, 320]
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L3231
-.L3180:
-	adrp	x0, .LANCHOR91
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
-	b	.L3253
-.L3179:
-	cmp	w22, 1
+	b	.L3226
+.L3203:
+	mov	w1, 5
+	mov	w0, 0
+	b	.L3287
+.L3202:
+	cmp	w26, 1
 	mov	w22, 4
 	csinc	w22, w22, wzr, eq
-	cmp	w20, 15
+	cmp	w21, 15
 	mov	w0, w22
 	add	w22, w22, 4
-	adrp	x25, .LANCHOR70
-	adrp	x21, .LANCHOR63
+	adrp	x25, .LANCHOR74
+	adrp	x21, .LANCHOR65
 	csel	w22, w22, w0, ls
-	add	x25, x25, :lo12:.LANCHOR70
-	add	x20, x21, :lo12:.LANCHOR63
-	add	x26, x23, 80
-.L3186:
+	add	x25, x25, :lo12:.LANCHOR74
+	add	x20, x21, :lo12:.LANCHOR65
+	add	x26, x24, 80
+.L3209:
 	sub	w22, w22, #1
 	and	w22, w22, 255
 	cmp	w22, 255
-	beq	.L3231
+	beq	.L3226
 	bl	gc_do_copy_back
 	ldrb	w0, [x25]
-	cbnz	w0, .L3187
-	adrp	x0, .LANCHOR48
-	ldrb	w0, [x0, #:lo12:.LANCHOR48]
+	cbnz	w0, .L3210
+	adrp	x0, .LANCHOR50
+	ldrb	w0, [x0, #:lo12:.LANCHOR50]
 	cmp	w0, 3
-	bhi	.L3188
+	bhi	.L3211
 	bl	ftl_write_commit
-.L3188:
+.L3211:
 	ldrh	w1, [x20, 26]
 	ldrh	w0, [x20, 24]
 	cmp	w1, w0
-	bcc	.L3186
+	bcc	.L3209
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR138]
+	strb	w0, [x19, #:lo12:.LANCHOR144]
 	bl	ftl_write_commit
 	bl	ftl_flush
-	adrp	x0, .LANCHOR4
+	adrp	x0, .LANCHOR5
 	ldrh	w2, [x20]
-	mov	x20, x0
-	ldr	x1, [x0, #:lo12:.LANCHOR4]
+	mov	x19, x0
+	ldr	x1, [x0, #:lo12:.LANCHOR5]
 	ldrh	w1, [x1, x2, lsl 1]
-	cbz	w1, .L3190
-	adrp	x1, .LANCHOR208
+	cbz	w1, .L3213
+	adrp	x1, .LANCHOR211
 	adrp	x0, .LC0
-	mov	w2, 2144
-	add	x1, x1, :lo12:.LANCHOR208
+	mov	w2, 2385
+	add	x1, x1, :lo12:.LANCHOR211
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3190:
-	ldrh	w1, [x21, #:lo12:.LANCHOR63]
-	add	x19, x21, :lo12:.LANCHOR63
-	ldr	x2, [x20, #:lo12:.LANCHOR4]
-	ubfiz	x0, x1, 1, 16
-	ldrh	w2, [x2, x0]
-	cbnz	w2, .L3191
-	mov	w0, w1
+.L3213:
+	ldrh	w0, [x21, #:lo12:.LANCHOR65]
+	ldr	x2, [x19, #:lo12:.LANCHOR5]
+	ubfiz	x1, x0, 1, 16
+	ldrh	w1, [x2, x1]
+	cbnz	w1, .L3214
 	bl	ftl_free_sblk
-	b	.L3165
-.L3191:
-	ldrh	w3, [x19, 24]
-	adrp	x22, .LANCHOR64
-	adrp	x0, .LC218
-	add	x0, x0, :lo12:.LC218
-	bl	printf
-	ldr	x1, [x22, #:lo12:.LANCHOR64]
-	mov	w2, 4
-	ldrh	w3, [x19, 24]
-	adrp	x0, .LC219
-	add	x0, x0, :lo12:.LC219
-	add	w3, w3, 1
-	bl	rknand_print_hex
-	ldrh	w1, [x21, #:lo12:.LANCHOR63]
-	ldr	x2, [x20, #:lo12:.LANCHOR4]
-	ldrh	w5, [x19, 28]
-	ubfiz	x0, x1, 1, 16
-	ldrh	w4, [x19, 26]
-	ldrh	w3, [x19, 24]
-	ldrh	w2, [x2, x0]
-	adrp	x0, .LC220
-	add	x0, x0, :lo12:.LC220
-	bl	printf
-	ldrh	w0, [x21, #:lo12:.LANCHOR63]
-	mov	x1, 0
-	bl	ftl_sblk_dump
-	bl	gc_scan_src_blk
-	ldrh	w1, [x21, #:lo12:.LANCHOR63]
-	ldr	x2, [x20, #:lo12:.LANCHOR4]
-	ldrh	w3, [x19, 24]
-	ubfiz	x0, x1, 1, 16
-	ldrh	w2, [x2, x0]
-	adrp	x0, .LC221
-	add	x0, x0, :lo12:.LC221
-	bl	printf
-	ldrh	w3, [x19, 24]
-	mov	w2, 4
-	ldr	x1, [x22, #:lo12:.LANCHOR64]
-	adrp	x0, .LC222
-	add	x0, x0, :lo12:.LC222
-	bl	rknand_print_hex
-	b	.L3165
-.L3187:
-	ldrh	w0, [x20, 318]
-	cbz	w0, .L3192
-	ldr	w0, [x20, 320]
-	strh	wzr, [x20, 318]
+	b	.L3188
+.L3214:
+	mov	w2, 1
+	mov	w1, 0
+	bl	gc_add_sblk
+	b	.L3188
+.L3210:
+	ldrh	w0, [x20, 320]
+	cbz	w0, .L3215
+	ldr	w0, [x20, 324]
+	strh	wzr, [x20, 320]
 	cmn	w0, #1
-	beq	.L3193
+	beq	.L3216
 	bl	ftl_mask_bad_block
-.L3193:
-	ldr	x0, [x24, #:lo12:.LANCHOR5]
-	add	x20, x21, :lo12:.LANCHOR63
+.L3216:
+	ldr	x0, [x23, #:lo12:.LANCHOR6]
+	add	x20, x21, :lo12:.LANCHOR65
 	strh	wzr, [x20, 56]
 	ldrh	w0, [x0, 80]
-	str	wzr, [x20, 320]
+	str	wzr, [x20, 324]
 	bl	ftl_free_sblk
-	adrp	x2, .LANCHOR97
-	ldr	x1, [x24, #:lo12:.LANCHOR5]
+	adrp	x2, .LANCHOR100
+	ldr	x1, [x23, #:lo12:.LANCHOR6]
 	mov	w0, -1
-	ldr	x2, [x2, #:lo12:.LANCHOR97]
+	ldr	x2, [x2, #:lo12:.LANCHOR100]
 	strh	w0, [x1, 80]
 	strh	w0, [x2, 126]
 	strh	w0, [x1, 130]
 	ldr	x0, [x20, 8]
-	cbz	x0, .L3194
+	cbz	x0, .L3217
 	bl	buf_free
-.L3194:
-	add	x21, x21, :lo12:.LANCHOR63
+.L3217:
+	add	x21, x21, :lo12:.LANCHOR65
 	str	xzr, [x21, 8]
 	bl	flt_sys_flush
-	mov	w2, 2177
-	strb	wzr, [x19, #:lo12:.LANCHOR138]
-	adrp	x1, .LANCHOR208
+	mov	w2, 2421
+	strb	wzr, [x19, #:lo12:.LANCHOR144]
+	adrp	x1, .LANCHOR211
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR208
+	add	x1, x1, :lo12:.LANCHOR211
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3231
-.L3192:
+	b	.L3226
+.L3215:
 	ldrh	w0, [x26, 6]
 	ldrh	w1, [x20, 26]
 	cmp	w0, 1
 	ldrh	w0, [x20, 24]
-	bls	.L3195
+	bls	.L3218
 	cmp	w1, w0
-	bcc	.L3186
+	bcc	.L3209
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR138]
+	strb	w0, [x19, #:lo12:.LANCHOR144]
 	ldrh	w0, [x20, 56]
 	add	w1, w0, 1
 	strh	w1, [x20, 56]
@@ -20581,12 +20551,12 @@ zftl_do_gc:
 	strh	w1, [x0, 58]
 	mov	w0, -1
 	strh	w0, [x20]
-	b	.L3231
-.L3195:
+	b	.L3226
+.L3218:
 	mov	w2, 5
-	strb	w2, [x19, #:lo12:.LANCHOR138]
+	strb	w2, [x19, #:lo12:.LANCHOR144]
 	cmp	w1, w0
-	bcc	.L3196
+	bcc	.L3219
 	ldrh	w0, [x20, 56]
 	add	w1, w0, 1
 	strh	w1, [x20, 56]
@@ -20595,78 +20565,78 @@ zftl_do_gc:
 	strh	w1, [x0, 58]
 	mov	w0, -1
 	strh	w0, [x20]
-.L3196:
+.L3219:
 	bl	ftl_flush
 	bl	sblk_wait_write_queue_completed
 	bl	gc_write_completed
-	ldr	x0, [x24, #:lo12:.LANCHOR5]
-	ldrh	w1, [x23, 80]
+	ldr	x0, [x23, #:lo12:.LANCHOR6]
+	ldrh	w1, [x24, 80]
 	strh	w1, [x0, 128]
 	bl	pm_flush
 	bl	ftl_ext_info_flush
-	add	x0, x21, :lo12:.LANCHOR63
-	adrp	x1, .LANCHOR80
-	adrp	x2, .LANCHOR67
-	ldrh	w1, [x1, #:lo12:.LANCHOR80]
-	ldrb	w2, [x2, #:lo12:.LANCHOR67]
+	add	x0, x21, :lo12:.LANCHOR65
+	adrp	x1, .LANCHOR83
+	adrp	x2, .LANCHOR71
+	ldrh	w1, [x1, #:lo12:.LANCHOR83]
+	ldrb	w2, [x2, #:lo12:.LANCHOR71]
 	strh	wzr, [x0, 16]
 	strh	w1, [x0, 18]
 	cmp	w2, 2
 	strh	w2, [x0, 20]
-	bne	.L3197
+	bne	.L3220
 	ubfiz	w1, w1, 1, 15
 	strh	w1, [x0, 18]
 	mov	w1, 1
 	strh	w1, [x0, 20]
-.L3197:
-	add	x21, x21, :lo12:.LANCHOR63
+.L3220:
+	add	x21, x21, :lo12:.LANCHOR65
 	strh	wzr, [x21, 22]
-	b	.L3231
-.L3199:
-	ldrh	w1, [x25, 16]
-	ldrh	w0, [x25, 18]
+	b	.L3226
+.L3222:
+	ldrh	w1, [x24, 16]
+	ldrh	w0, [x24, 18]
 	cmp	w1, w0
-	bcc	.L3200
+	bcc	.L3223
 	mov	w0, 6
-	strb	w0, [x19, #:lo12:.LANCHOR138]
-	ldr	x0, [x25, 8]
+	strb	w0, [x19, #:lo12:.LANCHOR144]
+	ldr	x0, [x24, 8]
 	bl	buf_free
-	str	xzr, [x25, 8]
-	b	.L3231
-.L3200:
-	cmp	w20, 7
-	bls	.L3134
-	cmp	w22, 1
-	bne	.L3231
-	add	w23, w23, 1
-	and	w23, w23, 255
-	cmp	w23, 4
-	bls	.L3134
-	b	.L3231
-.L3133:
+	str	xzr, [x24, 8]
+	b	.L3226
+.L3223:
+	cmp	w21, 15
+	bls	.L3131
+	cmp	w26, 1
+	bne	.L3226
+	add	w22, w22, 1
+	and	w22, w22, 255
+	cmp	w22, 4
+	bls	.L3131
+	b	.L3226
+.L3130:
 	bl	gc_update_l2p_map_new
 	mov	w20, -1
 	bl	gc_free_src_blk
 	bl	ftl_flush
 	bl	pm_flush
-	strh	w20, [x23, 80]
+	strh	w20, [x24, 80]
 	bl	ftl_ext_info_flush
-	adrp	x0, .LANCHOR97
-	ldr	x0, [x0, #:lo12:.LANCHOR97]
+	adrp	x0, .LANCHOR100
+	ldr	x0, [x0, #:lo12:.LANCHOR100]
 	strh	w20, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-	strb	wzr, [x19, #:lo12:.LANCHOR138]
-	bl	print_ftl_debug_info
-	b	.L3231
-.L3182:
-	mov	w2, 2075
-	adrp	x1, .LANCHOR208
+.L3291:
+	strb	wzr, [x19, #:lo12:.LANCHOR144]
+	b	.L3226
+.L3205:
+	mov	w2, 2316
+	adrp	x1, .LANCHOR211
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR208
+	add	x1, x1, :lo12:.LANCHOR211
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3202
+	b	.L3225
 	.size	zftl_do_gc, .-zftl_do_gc
 	.section	.text.zftl_write,"ax",@progbits
 	.align	2
@@ -20677,38 +20647,38 @@ zftl_write:
 	add	x29, sp, 0
 	stp	x27, x28, [sp, 80]
 	mov	w27, w0
-	adrp	x0, .LANCHOR7
+	adrp	x0, .LANCHOR9
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	mov	w19, w1
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
 	mov	w20, w2
 	stp	x21, x22, [sp, 32]
 	mov	x24, x3
 	stp	x25, x26, [sp, 64]
-	tbz	x0, 12, .L3259
+	tbz	x0, 12, .L3294
 	mov	w3, w2
-	adrp	x0, .LC223
+	adrp	x0, .LC214
 	mov	w2, w1
-	add	x0, x0, :lo12:.LC223
+	add	x0, x0, :lo12:.LC214
 	mov	w1, w27
 	bl	printf
-.L3259:
-	cbnz	w27, .L3260
-	adrp	x0, .LANCHOR59
+.L3294:
+	cbnz	w27, .L3295
+	adrp	x0, .LANCHOR61
 	mov	w27, 24576
-	ldr	w0, [x0, #:lo12:.LANCHOR59]
-.L3261:
+	ldr	w0, [x0, #:lo12:.LANCHOR61]
+.L3296:
 	add	w1, w19, w20
 	cmp	w0, w1
-	bcc	.L3275
-	adrp	x23, .LANCHOR117
+	bcc	.L3310
+	adrp	x23, .LANCHOR123
 	add	w27, w27, w19
 	sub	w19, w20, #1
-	adrp	x25, .LANCHOR97
-	ldrb	w0, [x23, #:lo12:.LANCHOR117]
+	adrp	x25, .LANCHOR100
+	ldrb	w0, [x23, #:lo12:.LANCHOR123]
 	add	w19, w19, w27
-	add	x23, x23, :lo12:.LANCHOR117
+	add	x23, x23, :lo12:.LANCHOR123
 	udiv	w22, w27, w0
 	udiv	w19, w19, w0
 	add	w0, w27, w20
@@ -20716,25 +20686,25 @@ zftl_write:
 	mov	w26, w22
 	sub	w21, w19, w22
 	add	w21, w21, 1
-.L3263:
-	cbnz	w21, .L3271
-	adrp	x20, .LANCHOR89
-	adrp	x19, .LANCHOR93
-	add	x20, x20, :lo12:.LANCHOR89
-	add	x19, x19, :lo12:.LANCHOR93
+.L3298:
+	cbnz	w21, .L3306
+	adrp	x20, .LANCHOR93
+	adrp	x19, .LANCHOR97
+	add	x20, x20, :lo12:.LANCHOR93
+	add	x19, x19, :lo12:.LANCHOR97
 	bl	ftl_write_commit
 	bl	ftl_flush
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
-.L3272:
+.L3307:
 	ldrh	w0, [x20]
 	ldrh	w1, [x19]
 	add	w0, w0, w1
 	cmp	w0, 7
-	ble	.L3273
+	ble	.L3308
 	mov	w0, 0
-.L3258:
+.L3293:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -20742,28 +20712,28 @@ zftl_write:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L3260:
+.L3295:
 	cmp	w27, 3
-	bhi	.L3275
+	bhi	.L3310
 	lsl	w27, w27, 13
 	mov	w0, 8192
-	b	.L3261
-.L3271:
+	b	.L3296
+.L3306:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbnz	x0, .L3264
+	cbnz	x0, .L3299
 	bl	ftl_write_commit
-	b	.L3263
-.L3264:
+	b	.L3298
+.L3299:
 	ldrb	w3, [x23]
 	cmp	w26, w22
 	strb	wzr, [x0, 57]
 	ccmp	w26, w19, 4, ne
 	strb	w3, [x0, 56]
-	bne	.L3267
+	bne	.L3302
 	cmp	w26, w22
-	bne	.L3268
+	bne	.L3303
 	udiv	w0, w27, w3
 	msub	w0, w0, w3, w27
 	and	w0, w0, 255
@@ -20772,9 +20742,9 @@ zftl_write:
 	and	w3, w3, 255
 	cmp	w20, w3
 	csel	w3, w20, w3, cc
-.L3280:
+.L3315:
 	strb	w3, [x28, 56]
-.L3267:
+.L3302:
 	ldr	x3, [x28, 8]
 	mov	x1, x24
 	ldrb	w0, [x28, 57]
@@ -20784,7 +20754,7 @@ zftl_write:
 	lsl	w2, w2, 9
 	add	x0, x3, x0
 	bl	ftl_memcpy
-	ldr	x1, [x25, #:lo12:.LANCHOR97]
+	ldr	x1, [x25, #:lo12:.LANCHOR100]
 	ldr	w0, [x1, 8]
 	str	w26, [x28, 36]
 	add	w26, w26, 1
@@ -20796,19 +20766,19 @@ zftl_write:
 	ldrb	w0, [x28, 56]
 	ubfiz	x0, x0, 9, 8
 	add	x24, x24, x0
-	b	.L3263
-.L3268:
+	b	.L3298
+.L3303:
 	ldr	w0, [x29, 108]
 	msub	w3, w3, w26, w0
-	b	.L3280
-.L3273:
+	b	.L3315
+.L3308:
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
-	b	.L3272
-.L3275:
+	b	.L3307
+.L3310:
 	mov	w0, -1
-	b	.L3258
+	b	.L3293
 	.size	zftl_write, .-zftl_write
 	.section	.text.zftl_vendor_write,"ax",@progbits
 	.align	2
@@ -20867,12 +20837,12 @@ ftl_write:
 	mov	x20, x3
 	mov	w22, w1
 	ands	w21, w0, 255
-	bne	.L3286
+	bne	.L3321
 	mov	w3, w2
 	mov	w0, 0
 	mov	x2, x20
 	bl	idb_write_data
-.L3286:
+.L3321:
 	mov	x3, x20
 	mov	w2, w19
 	mov	w1, w22
@@ -20882,6 +20852,248 @@ ftl_write:
 	ldp	x29, x30, [sp], 48
 	b	zftl_write
 	.size	ftl_write, .-ftl_write
+	.section	.text.zftl_discard,"ax",@progbits
+	.align	2
+	.global	zftl_discard
+	.type	zftl_discard, %function
+zftl_discard:
+	stp	x29, x30, [sp, -128]!
+	adrp	x2, .LANCHOR61
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w19, w1
+	ldr	w2, [x2, #:lo12:.LANCHOR61]
+	add	w1, w0, w1
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	cmp	w2, w1
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	bcc	.L3344
+	adrp	x24, .LANCHOR212
+	add	w22, w0, 24576
+	adrp	x0, .LANCHOR9
+	str	x0, [x29, 104]
+	ldr	w1, [x24, #:lo12:.LANCHOR212]
+	ldr	w2, [x0, #:lo12:.LANCHOR9]
+	add	w1, w19, w1
+	str	w1, [x24, #:lo12:.LANCHOR212]
+	tbz	x2, 12, .L3325
+	adrp	x0, .LC215
+	mov	w4, 0
+	mov	w3, w19
+	mov	w2, w22
+	add	x0, x0, :lo12:.LC215
+	bl	printf
+.L3325:
+	adrp	x23, .LANCHOR100
+	adrp	x26, .LANCHOR123
+	ldr	x0, [x23, #:lo12:.LANCHOR100]
+	ldr	w27, [x0, 8]
+	add	w1, w27, 1
+	str	w1, [x0, 8]
+	bl	ftl_write_commit
+	bl	ftl_flush
+	ldrb	w21, [x26, #:lo12:.LANCHOR123]
+	udiv	w20, w22, w21
+	msub	w25, w20, w21, w22
+	cbz	w25, .L3326
+	sub	w21, w21, w25
+	mov	w0, w20
+	cmp	w21, w19
+	csel	w21, w21, w19, ls
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 120]
+	cmn	w0, #1
+	bne	.L3327
+	mov	w2, 0
+	add	x1, x29, 120
+	mov	w0, w20
+	bl	pm_log2phys
+.L3327:
+	ldr	w0, [x29, 120]
+	and	w28, w21, 65535
+	cmn	w0, #1
+	beq	.L3329
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x3, x0
+	cbz	x0, .L3329
+	strb	w25, [x0, 57]
+	ubfiz	x25, x25, 9, 25
+	strb	w21, [x0, 56]
+	mov	w1, 0
+	ldr	x0, [x0, 8]
+	lsl	w2, w28, 9
+	stp	w27, w20, [x3, 32]
+	str	x3, [x29, 96]
+	add	x0, x0, x25
+	bl	ftl_memset
+	ldr	x3, [x29, 96]
+	mov	x0, x3
+	bl	ftl_write_buf
+	bl	ftl_write_commit
+	ldr	x1, [x23, #:lo12:.LANCHOR100]
+	ldr	w0, [x1, 76]
+	add	w0, w0, 1
+	str	w0, [x1, 76]
+.L3329:
+	add	w20, w20, 1
+	sub	w19, w19, w28
+.L3326:
+	cbz	w19, .L3331
+	bl	ftl_flush
+.L3331:
+	adrp	x25, .LANCHOR102
+	add	x21, x26, :lo12:.LANCHOR123
+	add	x25, x25, :lo12:.LANCHOR102
+	mov	w0, -1
+	str	w0, [x29, 124]
+.L3332:
+	ldrb	w0, [x21]
+	cmp	w19, w0
+	bcs	.L3337
+	cbz	w19, .L3339
+	mov	w0, w20
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 120]
+	cmn	w0, #1
+	bne	.L3340
+	mov	w2, 0
+	add	x1, x29, 120
+	mov	w0, w20
+	bl	pm_log2phys
+.L3340:
+	ldr	w0, [x29, 120]
+	cmn	w0, #1
+	beq	.L3339
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x21, x0
+	cbz	x0, .L3339
+	strb	wzr, [x0, 57]
+	strb	w19, [x0, 56]
+	stp	w27, w20, [x21, 32]
+	ldrb	w0, [x26, #:lo12:.LANCHOR123]
+	cmp	w19, w0
+	bcc	.L3342
+	adrp	x1, .LANCHOR213
+	adrp	x0, .LC0
+	mov	w2, 1195
+	add	x1, x1, :lo12:.LANCHOR213
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L3342:
+	ldr	x0, [x21, 8]
+	lsl	w2, w19, 9
+	mov	w1, 0
+	bl	ftl_memset
+	mov	x0, x21
+	bl	ftl_write_buf
+	bl	ftl_write_commit
+	ldr	x1, [x23, #:lo12:.LANCHOR100]
+	ldr	w0, [x1, 76]
+	add	w0, w0, 1
+	str	w0, [x1, 76]
+.L3339:
+	ldr	w1, [x24, #:lo12:.LANCHOR212]
+	cmp	w1, 8192
+	bls	.L3345
+	ldr	x0, [x29, 104]
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L3343
+	adrp	x0, .LC215
+	mov	w4, 0
+	mov	w3, w19
+	mov	w2, w22
+	add	x0, x0, :lo12:.LC215
+	bl	printf
+.L3343:
+	str	wzr, [x24, #:lo12:.LANCHOR212]
+	bl	flt_sys_flush
+	adrp	x0, .LANCHOR119
+	mov	w1, 1
+	str	w1, [x0, #:lo12:.LANCHOR119]
+.L3345:
+	mov	w0, 0
+	b	.L3323
+.L3337:
+	mov	w0, w20
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 120]
+	cmn	w0, #1
+	beq	.L3333
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x28, x0
+	cbz	x0, .L3335
+	ldrb	w2, [x21]
+	mov	w1, 0
+	strb	w2, [x0, 56]
+	strb	wzr, [x0, 57]
+	ldr	x0, [x0, 8]
+	lsl	w2, w2, 9
+	stp	w27, w20, [x28, 32]
+	bl	ftl_memset
+	mov	x0, x28
+	bl	ftl_write_buf
+	bl	ftl_write_commit
+.L3371:
+	ldr	x1, [x23, #:lo12:.LANCHOR100]
+	ldr	w0, [x1, 76]
+	add	w0, w0, 1
+	str	w0, [x1, 76]
+.L3335:
+	ldrb	w0, [x21]
+	add	w20, w20, 1
+	sub	w19, w19, w0
+	b	.L3332
+.L3333:
+	mov	w2, 0
+	add	x1, x29, 120
+	mov	w0, w20
+	bl	pm_log2phys
+	ldr	w0, [x29, 120]
+	cmn	w0, #1
+	beq	.L3335
+	add	x1, x29, 124
+	mov	w2, 1
+	mov	w0, w20
+	bl	pm_log2phys
+	ldrh	w3, [x25]
+	mov	w0, 21
+	ldr	w1, [x29, 120]
+	sub	w2, w0, w3
+	mov	w0, 1
+	lsr	w1, w1, w3
+	lsl	w0, w0, w2
+	sub	w0, w0, #1
+	and	w0, w0, w1
+	adrp	x1, .LANCHOR101
+	ldrb	w1, [x1, #:lo12:.LANCHOR101]
+	udiv	w0, w0, w1
+	bl	ftl_vpn_decrement
+	b	.L3371
+.L3344:
+	mov	w0, -1
+.L3323:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+	.size	zftl_discard, .-zftl_discard
+	.section	.text.ftl_discard,"ax",@progbits
+	.align	2
+	.global	ftl_discard
+	.type	ftl_discard, %function
+ftl_discard:
+	mov	w0, w1
+	mov	w1, w2
+	b	zftl_discard
+	.size	ftl_discard, .-ftl_discard
 	.global	g_pm_spare
 	.global	pm_first_write
 	.global	pm_gc_enable
@@ -20905,11 +21117,14 @@ ftl_write:
 	.global	gp_free_xlc_head
 	.global	gp_free_slc_head
 	.global	gp_sblk_list_tbl
+	.global	zftl_print_list_count
 	.global	ftl_ext_info_first_write
 	.global	ftl_sys_info_first_write
 	.global	ftl_low_format_cur_blk
 	.global	ftl_power_lost_flag
 	.global	ftl_vpn_update_count
+	.global	ftl_sblk_update_list_offset
+	.global	ftl_sblk_update_list
 	.global	ftl_sblk_vpn_update_id
 	.global	ftl_sblk_lpa_tbl
 	.global	ftl_sblk_vpn
@@ -20929,6 +21144,7 @@ ftl_write:
 	.global	gc_pre_ppa_tbl
 	.global	gc_lpa_tbl
 	.global	g_gc_info
+	.global	gc_xlc_search_index
 	.global	gc_xlc_data_index
 	.global	gc_slc_cache_index
 	.global	gc_slc_data_index
@@ -20939,7 +21155,6 @@ ftl_write:
 	.global	gc_tlc_mode_slc_vpn_th
 	.global	gc_state
 	.global	gc_mode
-	.global	check_vpc_tbl
 	.global	p_read_ahead_ext_buf
 	.global	discard_sector_count
 	.global	read_ahead_lpa
@@ -20950,6 +21165,7 @@ ftl_write:
 	.global	ftl_flush_jiffies
 	.global	lpa_hash
 	.global	lpa_hash_index
+	.global	_c_slc_to_xlc_ec_ratio
 	.global	_c_mix_max_xlc_ec_count
 	.global	_c_mix_max_slc_ec_count
 	.global	_c_swl_xlc_gc_th
@@ -21032,7 +21248,7 @@ ftl_write:
 	.global	g_flash_page_buffer
 	.section	.bss.IDByte,"aw",@nobits
 	.align	2
-	.set	.LANCHOR38,. + 0
+	.set	.LANCHOR40,. + 0
 	.type	IDByte, %object
 	.size	IDByte, 32
 IDByte:
@@ -21046,21 +21262,21 @@ _c_ftl_blk_pre_plane:
 	.zero	2
 	.section	.bss._c_ftl_block_addr_log2,"aw",@nobits
 	.align	1
-	.set	.LANCHOR96,. + 0
+	.set	.LANCHOR102,. + 0
 	.type	_c_ftl_block_addr_log2, %object
 	.size	_c_ftl_block_addr_log2, 2
 _c_ftl_block_addr_log2:
 	.zero	2
 	.section	.bss._c_ftl_block_align_addr,"aw",@nobits
 	.align	1
-	.set	.LANCHOR103,. + 0
+	.set	.LANCHOR108,. + 0
 	.type	_c_ftl_block_align_addr, %object
 	.size	_c_ftl_block_align_addr, 2
 _c_ftl_block_align_addr:
 	.zero	2
 	.section	.bss._c_ftl_byte_pre_page,"aw",@nobits
 	.align	1
-	.set	.LANCHOR188,. + 0
+	.set	.LANCHOR195,. + 0
 	.type	_c_ftl_byte_pre_page, %object
 	.size	_c_ftl_byte_pre_page, 2
 _c_ftl_byte_pre_page:
@@ -21072,122 +21288,129 @@ _c_ftl_byte_pre_page:
 _c_ftl_nand_blks_per_die:
 	.zero	2
 	.section	.bss._c_ftl_nand_die_num,"aw",@nobits
-	.set	.LANCHOR104,. + 0
+	.set	.LANCHOR109,. + 0
 	.type	_c_ftl_nand_die_num, %object
 	.size	_c_ftl_nand_die_num, 1
 _c_ftl_nand_die_num:
 	.zero	1
 	.section	.bss._c_ftl_nand_planes_num,"aw",@nobits
-	.set	.LANCHOR72,. + 0
+	.set	.LANCHOR76,. + 0
 	.type	_c_ftl_nand_planes_num, %object
 	.size	_c_ftl_nand_planes_num, 1
 _c_ftl_nand_planes_num:
 	.zero	1
 	.section	.bss._c_ftl_nand_type,"aw",@nobits
-	.set	.LANCHOR67,. + 0
+	.set	.LANCHOR71,. + 0
 	.type	_c_ftl_nand_type, %object
 	.size	_c_ftl_nand_type, 1
 _c_ftl_nand_type:
 	.zero	1
 	.section	.bss._c_ftl_page_pre_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR71,. + 0
+	.set	.LANCHOR75,. + 0
 	.type	_c_ftl_page_pre_blk, %object
 	.size	_c_ftl_page_pre_blk, 2
 _c_ftl_page_pre_blk:
 	.zero	2
 	.section	.bss._c_ftl_page_pre_slc_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR80,. + 0
+	.set	.LANCHOR83,. + 0
 	.type	_c_ftl_page_pre_slc_blk, %object
 	.size	_c_ftl_page_pre_slc_blk, 2
 _c_ftl_page_pre_slc_blk:
 	.zero	2
 	.section	.bss._c_ftl_planes_per_die,"aw",@nobits
-	.set	.LANCHOR95,. + 0
+	.set	.LANCHOR101,. + 0
 	.type	_c_ftl_planes_per_die, %object
 	.size	_c_ftl_planes_per_die, 1
 _c_ftl_planes_per_die:
 	.zero	1
 	.section	.bss._c_ftl_pm_page_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR175,. + 0
+	.set	.LANCHOR182,. + 0
 	.type	_c_ftl_pm_page_num, %object
 	.size	_c_ftl_pm_page_num, 2
 _c_ftl_pm_page_num:
 	.zero	2
 	.section	.bss._c_ftl_sec_per_page,"aw",@nobits
-	.set	.LANCHOR117,. + 0
+	.set	.LANCHOR123,. + 0
 	.type	_c_ftl_sec_per_page, %object
 	.size	_c_ftl_sec_per_page, 1
 _c_ftl_sec_per_page:
 	.zero	1
 	.section	.bss._c_max_pm_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR134,. + 0
+	.set	.LANCHOR140,. + 0
 	.type	_c_max_pm_sblk, %object
 	.size	_c_max_pm_sblk, 2
 _c_max_pm_sblk:
 	.zero	2
 	.section	.bss._c_mix_max_slc_ec_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR98,. + 0
+	.set	.LANCHOR105,. + 0
 	.type	_c_mix_max_slc_ec_count, %object
 	.size	_c_mix_max_slc_ec_count, 2
 _c_mix_max_slc_ec_count:
 	.zero	2
 	.section	.bss._c_mix_max_xlc_ec_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR99,. + 0
+	.set	.LANCHOR103,. + 0
 	.type	_c_mix_max_xlc_ec_count, %object
 	.size	_c_mix_max_xlc_ec_count, 2
 _c_mix_max_xlc_ec_count:
+	.zero	2
+	.section	.bss._c_slc_to_xlc_ec_ratio,"aw",@nobits
+	.align	1
+	.set	.LANCHOR4,. + 0
+	.type	_c_slc_to_xlc_ec_ratio, %object
+	.size	_c_slc_to_xlc_ec_ratio, 2
+_c_slc_to_xlc_ec_ratio:
 	.zero	2
 	.section	.bss._c_swl_slc_gc_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR133,. + 0
+	.set	.LANCHOR139,. + 0
 	.type	_c_swl_slc_gc_th, %object
 	.size	_c_swl_slc_gc_th, 2
 _c_swl_slc_gc_th:
 	.zero	2
 	.section	.bss._c_swl_xlc_gc_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR132,. + 0
+	.set	.LANCHOR138,. + 0
 	.type	_c_swl_xlc_gc_th, %object
 	.size	_c_swl_xlc_gc_th, 2
 _c_swl_xlc_gc_th:
 	.zero	2
 	.section	.bss._c_totle_data_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR193,. + 0
+	.set	.LANCHOR200,. + 0
 	.type	_c_totle_data_density, %object
 	.size	_c_totle_data_density, 4
 _c_totle_data_density:
 	.zero	4
 	.section	.bss._c_totle_log_page,"aw",@nobits
 	.align	2
-	.set	.LANCHOR54,. + 0
+	.set	.LANCHOR56,. + 0
 	.type	_c_totle_log_page, %object
 	.size	_c_totle_log_page, 4
 _c_totle_log_page:
 	.zero	4
 	.section	.bss._c_totle_phy_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR192,. + 0
+	.set	.LANCHOR199,. + 0
 	.type	_c_totle_phy_density, %object
 	.size	_c_totle_phy_density, 4
 _c_totle_phy_density:
 	.zero	4
 	.section	.bss._c_user_data_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR59,. + 0
+	.set	.LANCHOR61,. + 0
 	.type	_c_user_data_density, %object
 	.size	_c_user_data_density, 4
 _c_user_data_density:
 	.zero	4
 	.section	.bss._gc_after_discard_en,"aw",@nobits
 	.align	2
-	.set	.LANCHOR207,. + 0
+	.set	.LANCHOR119,. + 0
 	.type	_gc_after_discard_en, %object
 	.size	_gc_after_discard_en, 4
 _gc_after_discard_en:
@@ -21206,75 +21429,69 @@ _last_write_time:
 	.zero	4
 	.section	.bss._max_slc_super_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR100,. + 0
+	.set	.LANCHOR104,. + 0
 	.type	_max_slc_super_block, %object
 	.size	_max_slc_super_block, 2
 _max_slc_super_block:
 	.zero	2
 	.section	.bss._max_xlc_super_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR87,. + 0
+	.set	.LANCHOR91,. + 0
 	.type	_max_xlc_super_block, %object
 	.size	_max_xlc_super_block, 2
 _max_xlc_super_block:
 	.zero	2
 	.section	.bss._min_slc_super_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR83,. + 0
+	.set	.LANCHOR87,. + 0
 	.type	_min_slc_super_block, %object
 	.size	_min_slc_super_block, 2
 _min_slc_super_block:
 	.zero	2
-	.section	.bss.check_vpc_tbl,"aw",@nobits
-	.align	3
-	.type	check_vpc_tbl, %object
-	.size	check_vpc_tbl, 4608
-check_vpc_tbl:
-	.zero	4608
 	.section	.bss.discard_sector_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR205,. + 0
+	.set	.LANCHOR212,. + 0
 	.type	discard_sector_count, %object
 	.size	discard_sector_count, 4
 discard_sector_count:
 	.zero	4
 	.section	.bss.fill_spare_size,"aw",@nobits
 	.align	1
-	.set	.LANCHOR44,. + 0
+	.set	.LANCHOR46,. + 0
 	.type	fill_spare_size, %object
 	.size	fill_spare_size, 2
 fill_spare_size:
 	.zero	2
 	.section	.bss.flash_read_retry,"aw",@nobits
 	.align	3
-	.set	.LANCHOR148,. + 0
+	.set	.LANCHOR155,. + 0
 	.type	flash_read_retry, %object
 	.size	flash_read_retry, 8
 flash_read_retry:
 	.zero	8
 	.section	.bss.free_buf_count,"aw",@nobits
-	.set	.LANCHOR48,. + 0
+	.set	.LANCHOR50,. + 0
 	.type	free_buf_count, %object
 	.size	free_buf_count, 1
 free_buf_count:
 	.zero	1
 	.section	.bss.free_mix_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR93,. + 0
+	.set	.LANCHOR97,. + 0
 	.type	free_mix_sblk, %object
 	.size	free_mix_sblk, 2
 free_mix_sblk:
 	.zero	2
 	.section	.bss.free_slc_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR89,. + 0
+	.set	.LANCHOR93,. + 0
 	.type	free_slc_sblk, %object
 	.size	free_slc_sblk, 2
 free_slc_sblk:
 	.zero	2
 	.section	.bss.free_xlc_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR91,. + 0
+	.set	.LANCHOR95,. + 0
 	.type	free_xlc_sblk, %object
 	.size	free_xlc_sblk, 2
 free_xlc_sblk:
@@ -21286,14 +21503,14 @@ free_xlc_sblk:
 ftl_ext_info_data_buffer:
 	.zero	16384
 	.section	.bss.ftl_ext_info_first_write,"aw",@nobits
-	.set	.LANCHOR171,. + 0
+	.set	.LANCHOR178,. + 0
 	.type	ftl_ext_info_first_write, %object
 	.size	ftl_ext_info_first_write, 1
 ftl_ext_info_first_write:
 	.zero	1
 	.section	.bss.ftl_flush_jiffies,"aw",@nobits
 	.align	2
-	.set	.LANCHOR202,. + 0
+	.set	.LANCHOR208,. + 0
 	.type	ftl_flush_jiffies, %object
 	.size	ftl_flush_jiffies, 4
 ftl_flush_jiffies:
@@ -21306,47 +21523,61 @@ ftl_info_data_buffer:
 	.zero	16384
 	.section	.bss.ftl_info_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR166,. + 0
+	.set	.LANCHOR173,. + 0
 	.type	ftl_info_spare, %object
 	.size	ftl_info_spare, 256
 ftl_info_spare:
 	.zero	256
 	.section	.bss.ftl_low_format_cur_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR60,. + 0
+	.set	.LANCHOR62,. + 0
 	.type	ftl_low_format_cur_blk, %object
 	.size	ftl_low_format_cur_blk, 2
 ftl_low_format_cur_blk:
 	.zero	2
 	.section	.bss.ftl_power_lost_flag,"aw",@nobits
-	.set	.LANCHOR170,. + 0
+	.set	.LANCHOR177,. + 0
 	.type	ftl_power_lost_flag, %object
 	.size	ftl_power_lost_flag, 1
 ftl_power_lost_flag:
 	.zero	1
 	.section	.bss.ftl_sblk_lpa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR109,. + 0
+	.set	.LANCHOR114,. + 0
 	.type	ftl_sblk_lpa_tbl, %object
 	.size	ftl_sblk_lpa_tbl, 8
 ftl_sblk_lpa_tbl:
 	.zero	8
+	.section	.bss.ftl_sblk_update_list,"aw",@nobits
+	.align	3
+	.set	.LANCHOR67,. + 0
+	.type	ftl_sblk_update_list, %object
+	.size	ftl_sblk_update_list, 16
+ftl_sblk_update_list:
+	.zero	16
+	.section	.bss.ftl_sblk_update_list_offset,"aw",@nobits
+	.align	1
+	.set	.LANCHOR120,. + 0
+	.type	ftl_sblk_update_list_offset, %object
+	.size	ftl_sblk_update_list_offset, 2
+ftl_sblk_update_list_offset:
+	.zero	2
 	.section	.bss.ftl_sblk_vpn,"aw",@nobits
 	.align	3
-	.set	.LANCHOR4,. + 0
+	.set	.LANCHOR5,. + 0
 	.type	ftl_sblk_vpn, %object
 	.size	ftl_sblk_vpn, 8
 ftl_sblk_vpn:
 	.zero	8
 	.section	.bss.ftl_sblk_vpn_update_id,"aw",@nobits
 	.align	1
-	.set	.LANCHOR114,. + 0
+	.set	.LANCHOR66,. + 0
 	.type	ftl_sblk_vpn_update_id, %object
 	.size	ftl_sblk_vpn_update_id, 2
 ftl_sblk_vpn_update_id:
 	.zero	2
 	.section	.bss.ftl_sys_info_first_write,"aw",@nobits
-	.set	.LANCHOR169,. + 0
+	.set	.LANCHOR176,. + 0
 	.type	ftl_sys_info_first_write, %object
 	.size	ftl_sys_info_first_write, 1
 ftl_sys_info_first_write:
@@ -21359,248 +21590,248 @@ ftl_tmp_buffer:
 	.zero	16384
 	.section	.bss.ftl_tmp_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR155,. + 0
+	.set	.LANCHOR171,. + 0
 	.type	ftl_tmp_spare, %object
 	.size	ftl_tmp_spare, 256
 ftl_tmp_spare:
 	.zero	256
 	.section	.bss.ftl_vpn_update_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR113,. + 0
+	.set	.LANCHOR118,. + 0
 	.type	ftl_vpn_update_count, %object
 	.size	ftl_vpn_update_count, 2
 ftl_vpn_update_count:
 	.zero	2
 	.section	.bss.g_block_align_addr,"aw",@nobits
 	.align	1
-	.set	.LANCHOR26,. + 0
+	.set	.LANCHOR28,. + 0
 	.type	g_block_align_addr, %object
 	.size	g_block_align_addr, 2
 g_block_align_addr:
 	.zero	2
 	.section	.bss.g_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR46,. + 0
+	.set	.LANCHOR48,. + 0
 	.type	g_buf, %object
 	.size	g_buf, 2048
 g_buf:
 	.zero	2048
 	.section	.bss.g_die_addr,"aw",@nobits
 	.align	2
-	.set	.LANCHOR129,. + 0
+	.set	.LANCHOR135,. + 0
 	.type	g_die_addr, %object
 	.size	g_die_addr, 32
 g_die_addr:
 	.zero	32
 	.section	.bss.g_die_cs_idx,"aw",@nobits
 	.align	2
-	.set	.LANCHOR24,. + 0
+	.set	.LANCHOR26,. + 0
 	.type	g_die_cs_idx, %object
 	.size	g_die_cs_idx, 8
 g_die_cs_idx:
 	.zero	8
 	.section	.bss.g_flash_3d_mlc_flag,"aw",@nobits
-	.set	.LANCHOR102,. + 0
+	.set	.LANCHOR107,. + 0
 	.type	g_flash_3d_mlc_flag, %object
 	.size	g_flash_3d_mlc_flag, 1
 g_flash_3d_mlc_flag:
 	.zero	1
 	.section	.bss.g_flash_3d_tlc_flag,"aw",@nobits
-	.set	.LANCHOR69,. + 0
+	.set	.LANCHOR73,. + 0
 	.type	g_flash_3d_tlc_flag, %object
 	.size	g_flash_3d_tlc_flag, 1
 g_flash_3d_tlc_flag:
 	.zero	1
 	.section	.bss.g_flash_blk_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR151,. + 0
+	.set	.LANCHOR158,. + 0
 	.type	g_flash_blk_info, %object
 	.size	g_flash_blk_info, 4
 g_flash_blk_info:
 	.zero	4
 	.section	.bss.g_flash_cur_mode,"aw",@nobits
 	.align	3
-	.set	.LANCHOR33,. + 0
+	.set	.LANCHOR35,. + 0
 	.type	g_flash_cur_mode, %object
 	.size	g_flash_cur_mode, 4
 g_flash_cur_mode:
 	.zero	4
 	.section	.bss.g_flash_interface_mode,"aw",@nobits
-	.set	.LANCHOR39,. + 0
+	.set	.LANCHOR41,. + 0
 	.type	g_flash_interface_mode, %object
 	.size	g_flash_interface_mode, 1
 g_flash_interface_mode:
 	.zero	1
 	.section	.bss.g_flash_multi_page_prog_en,"aw",@nobits
-	.set	.LANCHOR36,. + 0
+	.set	.LANCHOR38,. + 0
 	.type	g_flash_multi_page_prog_en, %object
 	.size	g_flash_multi_page_prog_en, 1
 g_flash_multi_page_prog_en:
 	.zero	1
 	.section	.bss.g_flash_multi_page_read_en,"aw",@nobits
-	.set	.LANCHOR185,. + 0
+	.set	.LANCHOR192,. + 0
 	.type	g_flash_multi_page_read_en, %object
 	.size	g_flash_multi_page_read_en, 1
 g_flash_multi_page_read_en:
 	.zero	1
 	.section	.bss.g_flash_page_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR153,. + 0
+	.set	.LANCHOR160,. + 0
 	.type	g_flash_page_buffer, %object
 	.size	g_flash_page_buffer, 8
 g_flash_page_buffer:
 	.zero	8
 	.section	.bss.g_flash_reversd_blks,"aw",@nobits
-	.set	.LANCHOR157,. + 0
+	.set	.LANCHOR163,. + 0
 	.type	g_flash_reversd_blks, %object
 	.size	g_flash_reversd_blks, 1
 g_flash_reversd_blks:
 	.zero	1
 	.section	.bss.g_flash_slc_mode,"aw",@nobits
-	.set	.LANCHOR11,. + 0
+	.set	.LANCHOR13,. + 0
 	.type	g_flash_slc_mode, %object
 	.size	g_flash_slc_mode, 1
 g_flash_slc_mode:
 	.zero	1
 	.section	.bss.g_flash_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR152,. + 0
+	.set	.LANCHOR159,. + 0
 	.type	g_flash_spare_buffer, %object
 	.size	g_flash_spare_buffer, 8
 g_flash_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_sys_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR150,. + 0
+	.set	.LANCHOR157,. + 0
 	.type	g_flash_sys_spare_buffer, %object
 	.size	g_flash_sys_spare_buffer, 8
 g_flash_sys_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_tmp_page_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR143,. + 0
+	.set	.LANCHOR150,. + 0
 	.type	g_flash_tmp_page_buffer, %object
 	.size	g_flash_tmp_page_buffer, 8
 g_flash_tmp_page_buffer:
 	.zero	8
 	.section	.bss.g_flash_tmp_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR145,. + 0
+	.set	.LANCHOR152,. + 0
 	.type	g_flash_tmp_spare_buffer, %object
 	.size	g_flash_tmp_spare_buffer, 8
 g_flash_tmp_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_toggle_mode_en,"aw",@nobits
-	.set	.LANCHOR14,. + 0
+	.set	.LANCHOR16,. + 0
 	.type	g_flash_toggle_mode_en, %object
 	.size	g_flash_toggle_mode_en, 1
 g_flash_toggle_mode_en:
 	.zero	1
 	.section	.bss.g_ftl_info_blk,"aw",@nobits
 	.align	6
-	.set	.LANCHOR167,. + 0
+	.set	.LANCHOR174,. + 0
 	.type	g_ftl_info_blk, %object
 	.size	g_ftl_info_blk, 4
 g_ftl_info_blk:
 	.zero	4
 	.section	.bss.g_gc_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR63,. + 0
+	.set	.LANCHOR65,. + 0
 	.type	g_gc_info, %object
 	.size	g_gc_info, 328
 g_gc_info:
 	.zero	328
 	.section	.bss.g_idb_ecc_bits,"aw",@nobits
-	.set	.LANCHOR10,. + 0
+	.set	.LANCHOR12,. + 0
 	.type	g_idb_ecc_bits, %object
 	.size	g_idb_ecc_bits, 1
 g_idb_ecc_bits:
 	.zero	1
 	.section	.bss.g_idb_slc_mode_enable,"aw",@nobits
-	.set	.LANCHOR158,. + 0
+	.set	.LANCHOR164,. + 0
 	.type	g_idb_slc_mode_enable, %object
 	.size	g_idb_slc_mode_enable, 1
 g_idb_slc_mode_enable:
 	.zero	1
 	.section	.bss.g_lsb_page_tbl,"aw",@nobits
 	.align	2
-	.set	.LANCHOR27,. + 0
+	.set	.LANCHOR29,. + 0
 	.type	g_lsb_page_tbl, %object
 	.size	g_lsb_page_tbl, 512
 g_lsb_page_tbl:
 	.zero	512
 	.section	.bss.g_maxRegNum,"aw",@nobits
-	.set	.LANCHOR19,. + 0
+	.set	.LANCHOR21,. + 0
 	.type	g_maxRegNum, %object
 	.size	g_maxRegNum, 1
 g_maxRegNum:
 	.zero	1
 	.section	.bss.g_maxRetryCount,"aw",@nobits
-	.set	.LANCHOR146,. + 0
+	.set	.LANCHOR153,. + 0
 	.type	g_maxRetryCount, %object
 	.size	g_maxRetryCount, 1
 g_maxRetryCount:
 	.zero	1
 	.section	.bss.g_msb_page_tbl,"aw",@nobits
 	.align	2
-	.set	.LANCHOR126,. + 0
+	.set	.LANCHOR132,. + 0
 	.type	g_msb_page_tbl, %object
 	.size	g_msb_page_tbl, 1024
 g_msb_page_tbl:
 	.zero	1024
 	.section	.bss.g_nand_max_die,"aw",@nobits
-	.set	.LANCHOR12,. + 0
+	.set	.LANCHOR14,. + 0
 	.type	g_nand_max_die, %object
 	.size	g_nand_max_die, 1
 g_nand_max_die:
 	.zero	1
 	.section	.bss.g_nand_opt_para,"aw",@nobits
 	.align	3
-	.set	.LANCHOR13,. + 0
+	.set	.LANCHOR15,. + 0
 	.type	g_nand_opt_para, %object
 	.size	g_nand_opt_para, 32
 g_nand_opt_para:
 	.zero	32
 	.section	.bss.g_nandc_ecc_bits,"aw",@nobits
-	.set	.LANCHOR40,. + 0
+	.set	.LANCHOR42,. + 0
 	.type	g_nandc_ecc_bits, %object
 	.size	g_nandc_ecc_bits, 1
 g_nandc_ecc_bits:
 	.zero	1
 	.section	.bss.g_nandc_tran_timeout,"aw",@nobits
-	.set	.LANCHOR144,. + 0
+	.set	.LANCHOR151,. + 0
 	.type	g_nandc_tran_timeout, %object
 	.size	g_nandc_tran_timeout, 1
 g_nandc_tran_timeout:
 	.zero	1
 	.section	.bss.g_nandc_v6_master_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR43,. + 0
+	.set	.LANCHOR45,. + 0
 	.type	g_nandc_v6_master_info, %object
 	.size	g_nandc_v6_master_info, 40
 g_nandc_v6_master_info:
 	.zero	40
 	.section	.bss.g_nandc_ver,"aw",@nobits
-	.set	.LANCHOR22,. + 0
+	.set	.LANCHOR24,. + 0
 	.type	g_nandc_ver, %object
 	.size	g_nandc_ver, 1
 g_nandc_ver:
 	.zero	1
 	.section	.bss.g_pm_spare,"aw",@nobits
 	.align	3
-	.set	.LANCHOR179,. + 0
+	.set	.LANCHOR186,. + 0
 	.type	g_pm_spare, %object
 	.size	g_pm_spare, 8
 g_pm_spare:
 	.zero	8
 	.section	.bss.g_retryMode,"aw",@nobits
-	.set	.LANCHOR17,. + 0
+	.set	.LANCHOR19,. + 0
 	.type	g_retryMode, %object
 	.size	g_retryMode, 1
 g_retryMode:
 	.zero	1
 	.section	.bss.g_slc_mode_addr2,"aw",@nobits
-	.set	.LANCHOR25,. + 0
+	.set	.LANCHOR27,. + 0
 	.type	g_slc_mode_addr2, %object
 	.size	g_slc_mode_addr2, 1
 g_slc_mode_addr2:
@@ -21612,120 +21843,134 @@ g_slc_mode_enable:
 	.zero	1
 	.section	.bss.g_slc_page_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR128,. + 0
+	.set	.LANCHOR134,. + 0
 	.type	g_slc_page_num, %object
 	.size	g_slc_page_num, 2
 g_slc_page_num:
 	.zero	2
 	.section	.bss.g_totle_phy_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR130,. + 0
+	.set	.LANCHOR136,. + 0
 	.type	g_totle_phy_block, %object
 	.size	g_totle_phy_block, 2
 g_totle_phy_block:
 	.zero	2
 	.section	.bss.gc_des_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR141,. + 0
+	.set	.LANCHOR148,. + 0
 	.type	gc_des_ppa_tbl, %object
 	.size	gc_des_ppa_tbl, 8
 gc_des_ppa_tbl:
 	.zero	8
 	.section	.bss.gc_free_slc_sblk_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR73,. + 0
+	.set	.LANCHOR77,. + 0
 	.type	gc_free_slc_sblk_th, %object
 	.size	gc_free_slc_sblk_th, 2
 gc_free_slc_sblk_th:
 	.zero	2
 	.section	.bss.gc_lpa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR139,. + 0
+	.set	.LANCHOR146,. + 0
 	.type	gc_lpa_tbl, %object
 	.size	gc_lpa_tbl, 8
 gc_lpa_tbl:
 	.zero	8
 	.section	.bss.gc_mode,"aw",@nobits
-	.set	.LANCHOR70,. + 0
+	.set	.LANCHOR74,. + 0
 	.type	gc_mode, %object
 	.size	gc_mode, 1
 gc_mode:
 	.zero	1
 	.section	.bss.gc_page_buf_id,"aw",@nobits
 	.align	3
-	.set	.LANCHOR68,. + 0
+	.set	.LANCHOR72,. + 0
 	.type	gc_page_buf_id, %object
 	.size	gc_page_buf_id, 8
 gc_page_buf_id:
 	.zero	8
 	.section	.bss.gc_pre_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR140,. + 0
+	.set	.LANCHOR147,. + 0
 	.type	gc_pre_ppa_tbl, %object
 	.size	gc_pre_ppa_tbl, 8
 gc_pre_ppa_tbl:
 	.zero	8
+	.section	.bss.gc_search_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR145,. + 0
+	.type	gc_search_count, %object
+	.size	gc_search_count, 4
+gc_search_count:
+	.zero	4
 	.section	.bss.gc_slc_cache_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR77,. + 0
+	.set	.LANCHOR80,. + 0
 	.type	gc_slc_cache_index, %object
 	.size	gc_slc_cache_index, 2
 gc_slc_cache_index:
 	.zero	2
 	.section	.bss.gc_slc_data_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR81,. + 0
+	.set	.LANCHOR84,. + 0
 	.type	gc_slc_data_index, %object
 	.size	gc_slc_data_index, 2
 gc_slc_data_index:
 	.zero	2
 	.section	.bss.gc_slc_mode_tlc_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR79,. + 0
+	.set	.LANCHOR82,. + 0
 	.type	gc_slc_mode_tlc_vpn_th, %object
 	.size	gc_slc_mode_tlc_vpn_th, 2
 gc_slc_mode_tlc_vpn_th:
 	.zero	2
 	.section	.bss.gc_slc_mode_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR62,. + 0
+	.set	.LANCHOR64,. + 0
 	.type	gc_slc_mode_vpn_th, %object
 	.size	gc_slc_mode_vpn_th, 2
 gc_slc_mode_vpn_th:
 	.zero	2
 	.section	.bss.gc_state,"aw",@nobits
-	.set	.LANCHOR138,. + 0
+	.set	.LANCHOR144,. + 0
 	.type	gc_state, %object
 	.size	gc_state, 1
 gc_state:
 	.zero	1
 	.section	.bss.gc_tlc_mode_slc_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR88,. + 0
+	.set	.LANCHOR92,. + 0
 	.type	gc_tlc_mode_slc_vpn_th, %object
 	.size	gc_tlc_mode_slc_vpn_th, 2
 gc_tlc_mode_slc_vpn_th:
 	.zero	2
 	.section	.bss.gc_tlc_mode_tlc_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR85,. + 0
+	.set	.LANCHOR89,. + 0
 	.type	gc_tlc_mode_tlc_vpn_th, %object
 	.size	gc_tlc_mode_tlc_vpn_th, 2
 gc_tlc_mode_tlc_vpn_th:
 	.zero	2
 	.section	.bss.gc_valid_page_ppa,"aw",@nobits
 	.align	3
-	.set	.LANCHOR64,. + 0
+	.set	.LANCHOR68,. + 0
 	.type	gc_valid_page_ppa, %object
 	.size	gc_valid_page_ppa, 8
 gc_valid_page_ppa:
 	.zero	8
 	.section	.bss.gc_xlc_data_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR78,. + 0
+	.set	.LANCHOR81,. + 0
 	.type	gc_xlc_data_index, %object
 	.size	gc_xlc_data_index, 2
 gc_xlc_data_index:
+	.zero	2
+	.section	.bss.gc_xlc_search_index,"aw",@nobits
+	.align	1
+	.set	.LANCHOR85,. + 0
+	.type	gc_xlc_search_index, %object
+	.size	gc_xlc_search_index, 2
+gc_xlc_search_index:
 	.zero	2
 	.section	.bss.gp_blk_info,"aw",@nobits
 	.align	3
@@ -21736,21 +21981,21 @@ gp_blk_info:
 	.zero	8
 	.section	.bss.gp_data_slc_cache_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR76,. + 0
+	.set	.LANCHOR79,. + 0
 	.type	gp_data_slc_cache_head, %object
 	.size	gp_data_slc_cache_head, 8
 gp_data_slc_cache_head:
 	.zero	8
 	.section	.bss.gp_data_slc_data_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR75,. + 0
+	.set	.LANCHOR8,. + 0
 	.type	gp_data_slc_data_head, %object
 	.size	gp_data_slc_data_head, 8
 gp_data_slc_data_head:
 	.zero	8
 	.section	.bss.gp_data_xlc_data_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR74,. + 0
+	.set	.LANCHOR78,. + 0
 	.type	gp_data_xlc_data_head, %object
 	.size	gp_data_xlc_data_head, 8
 gp_data_xlc_data_head:
@@ -21763,56 +22008,56 @@ gp_flash_check_buf:
 	.zero	262144
 	.section	.bss.gp_flash_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR20,. + 0
+	.set	.LANCHOR22,. + 0
 	.type	gp_flash_info, %object
 	.size	gp_flash_info, 8
 gp_flash_info:
 	.zero	8
 	.section	.bss.gp_free_mix_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR94,. + 0
+	.set	.LANCHOR98,. + 0
 	.type	gp_free_mix_head, %object
 	.size	gp_free_mix_head, 8
 gp_free_mix_head:
 	.zero	8
 	.section	.bss.gp_free_slc_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR90,. + 0
+	.set	.LANCHOR94,. + 0
 	.type	gp_free_slc_head, %object
 	.size	gp_free_slc_head, 8
 gp_free_slc_head:
 	.zero	8
 	.section	.bss.gp_free_xlc_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR92,. + 0
+	.set	.LANCHOR96,. + 0
 	.type	gp_free_xlc_head, %object
 	.size	gp_free_xlc_head, 8
 gp_free_xlc_head:
 	.zero	8
 	.section	.bss.gp_ftl_ext_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR5,. + 0
+	.set	.LANCHOR6,. + 0
 	.type	gp_ftl_ext_info, %object
 	.size	gp_ftl_ext_info, 8
 gp_ftl_ext_info:
 	.zero	8
 	.section	.bss.gp_ftl_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR97,. + 0
+	.set	.LANCHOR100,. + 0
 	.type	gp_ftl_info, %object
 	.size	gp_ftl_info, 8
 gp_ftl_info:
 	.zero	8
 	.section	.bss.gp_nand_para_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR9,. + 0
+	.set	.LANCHOR11,. + 0
 	.type	gp_nand_para_info, %object
 	.size	gp_nand_para_info, 8
 gp_nand_para_info:
 	.zero	8
 	.section	.bss.gp_nandc,"aw",@nobits
 	.align	3
-	.set	.LANCHOR21,. + 0
+	.set	.LANCHOR23,. + 0
 	.type	gp_nandc, %object
 	.size	gp_nandc, 8
 gp_nandc:
@@ -21832,21 +22077,21 @@ idb_buf:
 	.zero	262144
 	.section	.bss.idb_need_write_back,"aw",@nobits
 	.align	2
-	.set	.LANCHOR159,. + 0
+	.set	.LANCHOR165,. + 0
 	.type	idb_need_write_back, %object
 	.size	idb_need_write_back, 4
 idb_need_write_back:
 	.zero	4
 	.section	.bss.lpa_hash,"aw",@nobits
 	.align	3
-	.set	.LANCHOR108,. + 0
+	.set	.LANCHOR113,. + 0
 	.type	lpa_hash, %object
 	.size	lpa_hash, 512
 lpa_hash:
 	.zero	512
 	.section	.bss.lpa_hash_index,"aw",@nobits
 	.align	3
-	.set	.LANCHOR110,. + 0
+	.set	.LANCHOR115,. + 0
 	.type	lpa_hash_index, %object
 	.size	lpa_hash_index, 8
 lpa_hash_index:
@@ -21858,141 +22103,148 @@ lpa_hash_index:
 nandc_ecc_sts:
 	.zero	16
 	.section	.bss.nandc_hw_seed,"aw",@nobits
-	.set	.LANCHOR41,. + 0
+	.set	.LANCHOR43,. + 0
 	.type	nandc_hw_seed, %object
 	.size	nandc_hw_seed, 1
 nandc_hw_seed:
 	.zero	1
 	.section	.bss.nandc_randomizer_en,"aw",@nobits
-	.set	.LANCHOR42,. + 0
+	.set	.LANCHOR44,. + 0
 	.type	nandc_randomizer_en, %object
 	.size	nandc_randomizer_en, 1
 nandc_randomizer_en:
 	.zero	1
 	.section	.bss.p_free_buf_head,"aw",@nobits
-	.set	.LANCHOR47,. + 0
+	.set	.LANCHOR49,. + 0
 	.type	p_free_buf_head, %object
 	.size	p_free_buf_head, 1
 p_free_buf_head:
 	.zero	1
 	.section	.bss.p_read_ahead_ext_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR57,. + 0
+	.set	.LANCHOR59,. + 0
 	.type	p_read_ahead_ext_buf, %object
 	.size	p_read_ahead_ext_buf, 8
 p_read_ahead_ext_buf:
 	.zero	8
 	.section	.bss.pm_first_write,"aw",@nobits
-	.set	.LANCHOR180,. + 0
+	.set	.LANCHOR187,. + 0
 	.type	pm_first_write, %object
 	.size	pm_first_write, 1
 pm_first_write:
 	.zero	1
 	.section	.bss.pm_gc_enable,"aw",@nobits
 	.align	2
-	.set	.LANCHOR121,. + 0
+	.set	.LANCHOR127,. + 0
 	.type	pm_gc_enable, %object
 	.size	pm_gc_enable, 4
 pm_gc_enable:
 	.zero	4
 	.section	.bss.pm_last_load_ram_id,"aw",@nobits
-	.set	.LANCHOR190,. + 0
+	.set	.LANCHOR197,. + 0
 	.type	pm_last_load_ram_id, %object
 	.size	pm_last_load_ram_id, 1
 pm_last_load_ram_id:
 	.zero	1
 	.section	.bss.pm_last_update_ram_id,"aw",@nobits
-	.set	.LANCHOR124,. + 0
+	.set	.LANCHOR130,. + 0
 	.type	pm_last_update_ram_id, %object
 	.size	pm_last_update_ram_id, 1
 pm_last_update_ram_id:
 	.zero	1
 	.section	.bss.pm_ram_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR123,. + 0
+	.set	.LANCHOR129,. + 0
 	.type	pm_ram_info, %object
 	.size	pm_ram_info, 512
 pm_ram_info:
 	.zero	512
 	.section	.bss.read_ahead_lpa,"aw",@nobits
 	.align	2
-	.set	.LANCHOR56,. + 0
+	.set	.LANCHOR58,. + 0
 	.type	read_ahead_lpa, %object
 	.size	read_ahead_lpa, 4
 read_ahead_lpa:
 	.zero	4
 	.section	.bss.sblk_gc_write_completed_queue_head,"aw",@nobits
-	.set	.LANCHOR65,. + 0
+	.set	.LANCHOR69,. + 0
 	.type	sblk_gc_write_completed_queue_head, %object
 	.size	sblk_gc_write_completed_queue_head, 1
 sblk_gc_write_completed_queue_head:
 	.zero	1
 	.section	.bss.sblk_queue_head,"aw",@nobits
-	.set	.LANCHOR120,. + 0
+	.set	.LANCHOR126,. + 0
 	.type	sblk_queue_head, %object
 	.size	sblk_queue_head, 1
 sblk_queue_head:
 	.zero	1
 	.section	.bss.sblk_read_completed_queue_head,"aw",@nobits
-	.set	.LANCHOR58,. + 0
+	.set	.LANCHOR60,. + 0
 	.type	sblk_read_completed_queue_head, %object
 	.size	sblk_read_completed_queue_head, 1
 sblk_read_completed_queue_head:
 	.zero	1
 	.section	.bss.sblk_write_completed_queue_head,"aw",@nobits
-	.set	.LANCHOR118,. + 0
+	.set	.LANCHOR124,. + 0
 	.type	sblk_write_completed_queue_head, %object
 	.size	sblk_write_completed_queue_head, 1
 sblk_write_completed_queue_head:
 	.zero	1
 	.section	.bss.slc_cache_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR82,. + 0
+	.set	.LANCHOR86,. + 0
 	.type	slc_cache_sblk, %object
 	.size	slc_cache_sblk, 2
 slc_cache_sblk:
 	.zero	2
 	.section	.bss.slc_data_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR84,. + 0
+	.set	.LANCHOR88,. + 0
 	.type	slc_data_sblk, %object
 	.size	slc_data_sblk, 2
 slc_data_sblk:
 	.zero	2
 	.section	.bss.write_buf_count,"aw",@nobits
-	.set	.LANCHOR53,. + 0
+	.set	.LANCHOR55,. + 0
 	.type	write_buf_count, %object
 	.size	write_buf_count, 1
 write_buf_count:
 	.zero	1
 	.section	.bss.write_buf_head,"aw",@nobits
-	.set	.LANCHOR52,. + 0
+	.set	.LANCHOR54,. + 0
 	.type	write_buf_head, %object
 	.size	write_buf_head, 1
 write_buf_head:
 	.zero	1
 	.section	.bss.write_commit_count,"aw",@nobits
-	.set	.LANCHOR115,. + 0
+	.set	.LANCHOR121,. + 0
 	.type	write_commit_count, %object
 	.size	write_commit_count, 1
 write_commit_count:
 	.zero	1
 	.section	.bss.write_commit_head,"aw",@nobits
-	.set	.LANCHOR163,. + 0
+	.set	.LANCHOR169,. + 0
 	.type	write_commit_head, %object
 	.size	write_commit_head, 1
 write_commit_head:
 	.zero	1
 	.section	.bss.xlc_data_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR86,. + 0
+	.set	.LANCHOR90,. + 0
 	.type	xlc_data_sblk, %object
 	.size	xlc_data_sblk, 2
 xlc_data_sblk:
+	.zero	2
+	.section	.bss.zftl_print_list_count,"aw",@nobits
+	.align	1
+	.set	.LANCHOR99,. + 0
+	.type	zftl_print_list_count, %object
+	.size	zftl_print_list_count, 2
+zftl_print_list_count:
 	.zero	2
 	.section	.data.g_nand_para_info,"aw",@progbits
 	.align	3
-	.set	.LANCHOR32,. + 0
+	.set	.LANCHOR34,. + 0
 	.type	g_nand_para_info, %object
 	.size	g_nand_para_info, 32
 g_nand_para_info:
@@ -22026,7 +22278,7 @@ g_nand_para_info:
 	.byte	0
 	.section	.data.hy_f26_ref_value,"aw",@progbits
 	.align	3
-	.set	.LANCHOR142,. + 0
+	.set	.LANCHOR149,. + 0
 	.type	hy_f26_ref_value, %object
 	.size	hy_f26_ref_value, 28
 hy_f26_ref_value:
@@ -22060,7 +22312,7 @@ hy_f26_ref_value:
 	.byte	-37
 	.section	.data.nand_opt_para,"aw",@progbits
 	.align	3
-	.set	.LANCHOR184,. + 0
+	.set	.LANCHOR191,. + 0
 	.type	nand_opt_para, %object
 	.size	nand_opt_para, 128
 nand_opt_para:
@@ -22142,7 +22394,7 @@ nand_opt_para:
 	.zero	14
 	.section	.data.sd15_slc_rr,"aw",@progbits
 	.align	3
-	.set	.LANCHOR31,. + 0
+	.set	.LANCHOR33,. + 0
 	.type	sd15_slc_rr, %object
 	.size	sd15_slc_rr, 25
 sd15_slc_rr:
@@ -22173,7 +22425,7 @@ sd15_slc_rr:
 	.byte	112
 	.section	.data.sd15_tlc_rr,"aw",@progbits
 	.align	3
-	.set	.LANCHOR30,. + 0
+	.set	.LANCHOR32,. + 0
 	.type	sd15_tlc_rr, %object
 	.size	sd15_tlc_rr, 329
 sd15_tlc_rr:
@@ -22508,7 +22760,7 @@ sd15_tlc_rr:
 	.byte	0
 	.section	.data.tlc_prog_order,"aw",@progbits
 	.align	3
-	.set	.LANCHOR204,. + 0
+	.set	.LANCHOR210,. + 0
 	.type	tlc_prog_order, %object
 	.size	tlc_prog_order, 768
 tlc_prog_order:
@@ -22898,14 +23150,14 @@ tlc_prog_order:
 	.hword	1019
 	.section	.data.zftl_debug,"aw",@progbits
 	.align	2
-	.set	.LANCHOR7,. + 0
+	.set	.LANCHOR9,. + 0
 	.type	zftl_debug, %object
 	.size	zftl_debug, 4
 zftl_debug:
 	.word	17476
 	.section	.data.zftl_nand_flash_para_tbl,"aw",@progbits
 	.align	3
-	.set	.LANCHOR183,. + 0
+	.set	.LANCHOR190,. + 0
 	.type	zftl_nand_flash_para_tbl, %object
 	.size	zftl_nand_flash_para_tbl, 960
 zftl_nand_flash_para_tbl:
@@ -23565,8 +23817,8 @@ zftl_nand_flash_para_tbl:
 	.byte	32
 	.hword	512
 	.byte	2
-	.byte	2
-	.hword	1096
+	.byte	1
+	.hword	2184
 	.hword	9695
 	.byte	5
 	.byte	19
@@ -23593,8 +23845,8 @@ zftl_nand_flash_para_tbl:
 	.byte	32
 	.hword	512
 	.byte	2
-	.byte	2
-	.hword	1096
+	.byte	1
+	.hword	2184
 	.hword	9695
 	.byte	5
 	.byte	19
@@ -23749,473 +24001,466 @@ zftl_nand_flash_para_tbl:
 	.byte	-65
 	.byte	-66
 	.byte	0
-	.section	.rodata.__func__.10035,"a",@progbits
+	.section	.rodata.__func__.10025,"a",@progbits
 	.align	3
 	.set	.LANCHOR1,. + 0
-	.type	__func__.10035, %object
-	.size	__func__.10035, 18
-__func__.10035:
+	.type	__func__.10025, %object
+	.size	__func__.10025, 18
+__func__.10025:
 	.string	"_list_remove_node"
-	.section	.rodata.__func__.10060,"a",@progbits
+	.section	.rodata.__func__.10050,"a",@progbits
 	.align	3
-	.set	.LANCHOR6,. + 0
-	.type	__func__.10060, %object
-	.size	__func__.10060, 23
-__func__.10060:
+	.set	.LANCHOR7,. + 0
+	.type	__func__.10050, %object
+	.size	__func__.10050, 23
+__func__.10050:
 	.string	"_list_update_data_list"
-	.section	.rodata.__func__.10159,"a",@progbits
+	.section	.rodata.__func__.10158,"a",@progbits
 	.align	3
-	.set	.LANCHOR168,. + 0
-	.type	__func__.10159, %object
-	.size	__func__.10159, 15
-__func__.10159:
+	.set	.LANCHOR175,. + 0
+	.type	__func__.10158, %object
+	.size	__func__.10158, 15
+__func__.10158:
 	.string	"ftl_info_flush"
-	.section	.rodata.__func__.10191,"a",@progbits
+	.section	.rodata.__func__.10190,"a",@progbits
 	.align	3
-	.set	.LANCHOR119,. + 0
-	.type	__func__.10191, %object
-	.size	__func__.10191, 15
-__func__.10191:
+	.set	.LANCHOR125,. + 0
+	.type	__func__.10190, %object
+	.size	__func__.10190, 15
+__func__.10190:
 	.string	"ftl_alloc_sblk"
-	.section	.rodata.__func__.10233,"a",@progbits
+	.section	.rodata.__func__.10231,"a",@progbits
 	.align	3
-	.set	.LANCHOR105,. + 0
-	.type	__func__.10233, %object
-	.size	__func__.10233, 18
-__func__.10233:
+	.set	.LANCHOR110,. + 0
+	.type	__func__.10231, %object
+	.size	__func__.10231, 18
+__func__.10231:
 	.string	"ftl_alloc_sys_blk"
-	.section	.rodata.__func__.10243,"a",@progbits
+	.section	.rodata.__func__.10241,"a",@progbits
 	.align	3
-	.set	.LANCHOR106,. + 0
-	.type	__func__.10243, %object
-	.size	__func__.10243, 17
-__func__.10243:
+	.set	.LANCHOR111,. + 0
+	.type	__func__.10241, %object
+	.size	__func__.10241, 17
+__func__.10241:
 	.string	"ftl_free_sys_blk"
-	.section	.rodata.__func__.10278,"a",@progbits
+	.section	.rodata.__func__.10276,"a",@progbits
 	.align	3
-	.set	.LANCHOR196,. + 0
-	.type	__func__.10278, %object
-	.size	__func__.10278, 14
-__func__.10278:
+	.set	.LANCHOR204,. + 0
+	.type	__func__.10276, %object
+	.size	__func__.10276, 14
+__func__.10276:
 	.string	"ftl_sblk_dump"
-	.section	.rodata.__func__.10302,"a",@progbits
+	.section	.rodata.__func__.10300,"a",@progbits
 	.align	3
-	.set	.LANCHOR186,. + 0
-	.type	__func__.10302, %object
-	.size	__func__.10302, 16
-__func__.10302:
+	.set	.LANCHOR193,. + 0
+	.type	__func__.10300, %object
+	.size	__func__.10300, 16
+__func__.10300:
 	.string	"ftl_sysblk_dump"
-	.section	.rodata.__func__.10321,"a",@progbits
+	.section	.rodata.__func__.10319,"a",@progbits
 	.align	3
-	.set	.LANCHOR177,. + 0
-	.type	__func__.10321, %object
-	.size	__func__.10321, 23
-__func__.10321:
+	.set	.LANCHOR184,. + 0
+	.type	__func__.10319, %object
+	.size	__func__.10319, 23
+__func__.10319:
 	.string	"ftl_open_sblk_recovery"
-	.section	.rodata.__func__.10347,"a",@progbits
+	.section	.rodata.__func__.10345,"a",@progbits
 	.align	3
-	.set	.LANCHOR107,. + 0
-	.type	__func__.10347, %object
-	.size	__func__.10347, 23
-__func__.10347:
+	.set	.LANCHOR112,. + 0
+	.type	__func__.10345, %object
+	.size	__func__.10345, 23
+__func__.10345:
 	.string	"ftl_get_ppa_from_index"
-	.section	.rodata.__func__.10368,"a",@progbits
+	.section	.rodata.__func__.10366,"a",@progbits
 	.align	3
-	.set	.LANCHOR200,. + 0
-	.type	__func__.10368, %object
-	.size	__func__.10368, 19
-__func__.10368:
+	.set	.LANCHOR206,. + 0
+	.type	__func__.10366, %object
+	.size	__func__.10366, 19
+__func__.10366:
 	.string	"ftl_update_l2p_map"
-	.section	.rodata.__func__.10386,"a",@progbits
+	.section	.rodata.__func__.10384,"a",@progbits
 	.align	3
-	.set	.LANCHOR111,. + 0
-	.type	__func__.10386, %object
-	.size	__func__.10386, 22
-__func__.10386:
+	.set	.LANCHOR116,. + 0
+	.type	__func__.10384, %object
+	.size	__func__.10384, 22
+__func__.10384:
 	.string	"ftl_get_new_free_page"
-	.section	.rodata.__func__.10397,"a",@progbits
+	.section	.rodata.__func__.10395,"a",@progbits
 	.align	3
-	.set	.LANCHOR112,. + 0
-	.type	__func__.10397, %object
-	.size	__func__.10397, 22
-__func__.10397:
+	.set	.LANCHOR117,. + 0
+	.type	__func__.10395, %object
+	.size	__func__.10395, 22
+__func__.10395:
 	.string	"ftl_ext_alloc_new_blk"
-	.section	.rodata.__func__.10422,"a",@progbits
+	.section	.rodata.__func__.10420,"a",@progbits
 	.align	3
-	.set	.LANCHOR172,. + 0
-	.type	__func__.10422, %object
-	.size	__func__.10422, 19
-__func__.10422:
+	.set	.LANCHOR179,. + 0
+	.type	__func__.10420, %object
+	.size	__func__.10420, 19
+__func__.10420:
 	.string	"ftl_ext_info_flush"
-	.section	.rodata.__func__.10434,"a",@progbits
+	.section	.rodata.__func__.10432,"a",@progbits
 	.align	3
-	.set	.LANCHOR173,. + 0
-	.type	__func__.10434, %object
-	.size	__func__.10434, 18
-__func__.10434:
+	.set	.LANCHOR180,. + 0
+	.type	__func__.10432, %object
+	.size	__func__.10432, 18
+__func__.10432:
 	.string	"ftl_ext_info_init"
-	.section	.rodata.__func__.10480,"a",@progbits
+	.section	.rodata.__func__.10469,"a",@progbits
 	.align	3
-	.set	.LANCHOR174,. + 0
-	.type	__func__.10480, %object
-	.size	__func__.10480, 15
-__func__.10480:
-	.string	"ftl_low_format"
-	.section	.rodata.__func__.10524,"a",@progbits
+	.set	.LANCHOR181,. + 0
+	.type	__func__.10469, %object
+	.size	__func__.10469, 25
+__func__.10469:
+	.string	"ftl_low_format_data_init"
+	.section	.rodata.__func__.10484,"a",@progbits
 	.align	3
-	.set	.LANCHOR176,. + 0
-	.type	__func__.10524, %object
-	.size	__func__.10524, 23
-__func__.10524:
-	.string	"ftl_re_low_format_test"
-	.section	.rodata.__func__.10534,"a",@progbits
+	.set	.LANCHOR183,. + 0
+	.type	__func__.10484, %object
+	.size	__func__.10484, 15
+__func__.10484:
+	.string	"ftl_low_format"
+	.section	.rodata.__func__.10532,"a",@progbits
 	.align	3
-	.set	.LANCHOR165,. + 0
-	.type	__func__.10534, %object
-	.size	__func__.10534, 14
-__func__.10534:
+	.set	.LANCHOR172,. + 0
+	.type	__func__.10532, %object
+	.size	__func__.10532, 14
+__func__.10532:
 	.string	"ftl_prog_page"
-	.section	.rodata.__func__.10709,"a",@progbits
+	.section	.rodata.__func__.10692,"a",@progbits
 	.align	3
-	.set	.LANCHOR162,. + 0
-	.type	__func__.10709, %object
-	.size	__func__.10709, 15
-__func__.10709:
+	.set	.LANCHOR168,. + 0
+	.type	__func__.10692, %object
+	.size	__func__.10692, 15
+__func__.10692:
 	.string	"sblk_prog_page"
-	.section	.rodata.__func__.10769,"a",@progbits
+	.section	.rodata.__func__.10752,"a",@progbits
 	.align	3
-	.set	.LANCHOR187,. + 0
-	.type	__func__.10769, %object
-	.size	__func__.10769, 16
-__func__.10769:
+	.set	.LANCHOR194,. + 0
+	.type	__func__.10752, %object
+	.size	__func__.10752, 16
+__func__.10752:
 	.string	"load_l2p_region"
-	.section	.rodata.__func__.10783,"a",@progbits
+	.section	.rodata.__func__.10766,"a",@progbits
 	.align	3
-	.set	.LANCHOR135,. + 0
-	.type	__func__.10783, %object
-	.size	__func__.10783, 13
-__func__.10783:
+	.set	.LANCHOR141,. + 0
+	.type	__func__.10766, %object
+	.size	__func__.10766, 13
+__func__.10766:
 	.string	"pm_free_sblk"
-	.section	.rodata.__func__.10803,"a",@progbits
+	.section	.rodata.__func__.10786,"a",@progbits
 	.align	3
-	.set	.LANCHOR189,. + 0
-	.type	__func__.10803, %object
-	.size	__func__.10803, 6
-__func__.10803:
+	.set	.LANCHOR196,. + 0
+	.type	__func__.10786, %object
+	.size	__func__.10786, 6
+__func__.10786:
 	.string	"pm_gc"
-	.section	.rodata.__func__.10819,"a",@progbits
+	.section	.rodata.__func__.10802,"a",@progbits
 	.align	3
-	.set	.LANCHOR122,. + 0
-	.type	__func__.10819, %object
-	.size	__func__.10819, 17
-__func__.10819:
+	.set	.LANCHOR128,. + 0
+	.type	__func__.10802, %object
+	.size	__func__.10802, 17
+__func__.10802:
 	.string	"pm_alloc_new_blk"
-	.section	.rodata.__func__.10829,"a",@progbits
+	.section	.rodata.__func__.10812,"a",@progbits
 	.align	3
-	.set	.LANCHOR178,. + 0
-	.type	__func__.10829, %object
-	.size	__func__.10829, 14
-__func__.10829:
+	.set	.LANCHOR185,. + 0
+	.type	__func__.10812, %object
+	.size	__func__.10812, 14
+__func__.10812:
 	.string	"pm_write_page"
-	.section	.rodata.__func__.10847,"a",@progbits
+	.section	.rodata.__func__.10830,"a",@progbits
 	.align	3
-	.set	.LANCHOR125,. + 0
-	.type	__func__.10847, %object
-	.size	__func__.10847, 21
-__func__.10847:
+	.set	.LANCHOR131,. + 0
+	.type	__func__.10830, %object
+	.size	__func__.10830, 21
+__func__.10830:
 	.string	"pm_select_ram_region"
-	.section	.rodata.__func__.8490,"a",@progbits
+	.section	.rodata.__func__.8509,"a",@progbits
 	.align	3
-	.set	.LANCHOR147,. + 0
-	.type	__func__.8490, %object
-	.size	__func__.8490, 19
-__func__.8490:
+	.set	.LANCHOR154,. + 0
+	.type	__func__.8509, %object
+	.size	__func__.8509, 19
+__func__.8509:
 	.string	"flash_read_page_en"
-	.section	.rodata.__func__.8519,"a",@progbits
+	.section	.rodata.__func__.8538,"a",@progbits
 	.align	3
-	.set	.LANCHOR164,. + 0
-	.type	__func__.8519, %object
-	.size	__func__.8519, 19
-__func__.8519:
+	.set	.LANCHOR170,. + 0
+	.type	__func__.8538, %object
+	.size	__func__.8538, 19
+__func__.8538:
 	.string	"flash_prog_page_en"
-	.section	.rodata.__func__.8534,"a",@progbits
+	.section	.rodata.__func__.8553,"a",@progbits
 	.align	3
-	.set	.LANCHOR35,. + 0
-	.type	__func__.8534, %object
-	.size	__func__.8534, 26
-__func__.8534:
+	.set	.LANCHOR37,. + 0
+	.type	__func__.8553, %object
+	.size	__func__.8553, 26
+__func__.8553:
 	.string	"flash_erase_duplane_block"
-	.section	.rodata.__func__.8545,"a",@progbits
+	.section	.rodata.__func__.8564,"a",@progbits
 	.align	3
-	.set	.LANCHOR37,. + 0
-	.type	__func__.8545, %object
-	.size	__func__.8545, 21
-__func__.8545:
+	.set	.LANCHOR39,. + 0
+	.type	__func__.8564, %object
+	.size	__func__.8564, 21
+__func__.8564:
 	.string	"flash_erase_block_en"
-	.section	.rodata.__func__.8559,"a",@progbits
+	.section	.rodata.__func__.8578,"a",@progbits
 	.align	3
-	.set	.LANCHOR23,. + 0
-	.type	__func__.8559, %object
-	.size	__func__.8559, 28
-__func__.8559:
+	.set	.LANCHOR25,. + 0
+	.type	__func__.8578, %object
+	.size	__func__.8578, 28
+__func__.8578:
 	.string	"flash_wait_device_ready_raw"
-	.section	.rodata.__func__.8583,"a",@progbits
+	.section	.rodata.__func__.8602,"a",@progbits
 	.align	3
-	.set	.LANCHOR160,. + 0
-	.type	__func__.8583, %object
-	.size	__func__.8583, 26
-__func__.8583:
+	.set	.LANCHOR166,. + 0
+	.type	__func__.8602, %object
+	.size	__func__.8602, 26
+__func__.8602:
 	.string	"flash_start_tlc_page_prog"
-	.section	.rodata.__func__.8596,"a",@progbits
+	.section	.rodata.__func__.8615,"a",@progbits
 	.align	3
-	.set	.LANCHOR161,. + 0
-	.type	__func__.8596, %object
-	.size	__func__.8596, 22
-__func__.8596:
+	.set	.LANCHOR167,. + 0
+	.type	__func__.8615, %object
+	.size	__func__.8615, 22
+__func__.8615:
 	.string	"flash_start_page_prog"
-	.section	.rodata.__func__.8609,"a",@progbits
+	.section	.rodata.__func__.8628,"a",@progbits
 	.align	3
-	.set	.LANCHOR34,. + 0
-	.type	__func__.8609, %object
-	.size	__func__.8609, 22
-__func__.8609:
+	.set	.LANCHOR36,. + 0
+	.type	__func__.8628, %object
+	.size	__func__.8628, 22
+__func__.8628:
 	.string	"flash_start_page_read"
-	.section	.rodata.__func__.8624,"a",@progbits
+	.section	.rodata.__func__.8643,"a",@progbits
 	.align	3
-	.set	.LANCHOR154,. + 0
-	.type	__func__.8624, %object
-	.size	__func__.8624, 25
-__func__.8624:
+	.set	.LANCHOR161,. + 0
+	.type	__func__.8643, %object
+	.size	__func__.8643, 25
+__func__.8643:
 	.string	"flash_complete_page_read"
-	.section	.rodata.__func__.8937,"a",@progbits
+	.section	.rodata.__func__.8956,"a",@progbits
 	.align	3
-	.set	.LANCHOR127,. + 0
-	.type	__func__.8937, %object
-	.size	__func__.8937, 20
-__func__.8937:
+	.set	.LANCHOR133,. + 0
+	.type	__func__.8956, %object
+	.size	__func__.8956, 20
+__func__.8956:
 	.string	"flash_die_info_init"
-	.section	.rodata.__func__.8947,"a",@progbits
+	.section	.rodata.__func__.8966,"a",@progbits
 	.align	3
-	.set	.LANCHOR8,. + 0
-	.type	__func__.8947, %object
-	.size	__func__.8947, 22
-__func__.8947:
+	.set	.LANCHOR10,. + 0
+	.type	__func__.8966, %object
+	.size	__func__.8966, 22
+__func__.8966:
 	.string	"nand_flash_print_info"
-	.section	.rodata.__func__.8991,"a",@progbits
+	.section	.rodata.__func__.9010,"a",@progbits
 	.align	3
-	.set	.LANCHOR182,. + 0
-	.type	__func__.8991, %object
-	.size	__func__.8991, 16
-__func__.8991:
+	.set	.LANCHOR189,. + 0
+	.type	__func__.9010, %object
+	.size	__func__.9010, 16
+__func__.9010:
 	.string	"nand_flash_init"
-	.section	.rodata.__func__.9011,"a",@progbits
+	.section	.rodata.__func__.9030,"a",@progbits
 	.align	3
-	.set	.LANCHOR137,. + 0
-	.type	__func__.9011, %object
-	.size	__func__.9011, 11
-__func__.9011:
+	.set	.LANCHOR143,. + 0
+	.type	__func__.9030, %object
+	.size	__func__.9030, 11
+__func__.9030:
 	.string	"nandc_init"
-	.section	.rodata.__func__.9171,"a",@progbits
+	.section	.rodata.__func__.9190,"a",@progbits
 	.align	3
-	.set	.LANCHOR49,. + 0
-	.type	__func__.9171, %object
-	.size	__func__.9171, 13
-__func__.9171:
+	.set	.LANCHOR51,. + 0
+	.type	__func__.9190, %object
+	.size	__func__.9190, 13
+__func__.9190:
 	.string	"buf_add_tail"
-	.section	.rodata.__func__.9184,"a",@progbits
+	.section	.rodata.__func__.9203,"a",@progbits
 	.align	3
-	.set	.LANCHOR50,. + 0
-	.type	__func__.9184, %object
-	.size	__func__.9184, 10
-__func__.9184:
+	.set	.LANCHOR52,. + 0
+	.type	__func__.9203, %object
+	.size	__func__.9203, 10
+__func__.9203:
 	.string	"buf_alloc"
-	.section	.rodata.__func__.9198,"a",@progbits
+	.section	.rodata.__func__.9217,"a",@progbits
 	.align	3
-	.set	.LANCHOR51,. + 0
-	.type	__func__.9198, %object
-	.size	__func__.9198, 16
-__func__.9198:
+	.set	.LANCHOR53,. + 0
+	.type	__func__.9217, %object
+	.size	__func__.9217, 16
+__func__.9217:
 	.string	"buf_remove_free"
-	.section	.rodata.__func__.9210,"a",@progbits
+	.section	.rodata.__func__.9229,"a",@progbits
 	.align	3
-	.set	.LANCHOR149,. + 0
-	.type	__func__.9210, %object
-	.size	__func__.9210, 20
-__func__.9210:
+	.set	.LANCHOR156,. + 0
+	.type	__func__.9229, %object
+	.size	__func__.9229, 20
+__func__.9229:
 	.string	"flash_info_blk_init"
-	.section	.rodata.__func__.9221,"a",@progbits
+	.section	.rodata.__func__.9240,"a",@progbits
 	.align	3
-	.set	.LANCHOR136,. + 0
-	.type	__func__.9221, %object
-	.size	__func__.9221, 21
-__func__.9221:
+	.set	.LANCHOR142,. + 0
+	.type	__func__.9240, %object
+	.size	__func__.9240, 21
+__func__.9240:
 	.string	"flash_into_data_init"
-	.section	.rodata.__func__.9243,"a",@progbits
+	.section	.rodata.__func__.9262,"a",@progbits
 	.align	3
-	.set	.LANCHOR181,. + 0
-	.type	__func__.9243, %object
-	.size	__func__.9243, 17
-__func__.9243:
+	.set	.LANCHOR188,. + 0
+	.type	__func__.9262, %object
+	.size	__func__.9262, 17
+__func__.9262:
 	.string	"flash_info_flush"
-	.section	.rodata.__func__.9316,"a",@progbits
+	.section	.rodata.__func__.9336,"a",@progbits
 	.align	3
-	.set	.LANCHOR131,. + 0
-	.type	__func__.9316, %object
-	.size	__func__.9316, 17
-__func__.9316:
+	.set	.LANCHOR137,. + 0
+	.type	__func__.9336, %object
+	.size	__func__.9336, 17
+__func__.9336:
 	.string	"lpa_rebuild_hash"
-	.section	.rodata.__func__.9368,"a",@progbits
+	.section	.rodata.__func__.9383,"a",@progbits
 	.align	3
-	.set	.LANCHOR201,. + 0
-	.type	__func__.9368, %object
-	.size	__func__.9368, 17
-__func__.9368:
+	.set	.LANCHOR207,. + 0
+	.type	__func__.9383, %object
+	.size	__func__.9383, 17
+__func__.9383:
 	.string	"ftl_write_commit"
-	.section	.rodata.__func__.9379,"a",@progbits
+	.section	.rodata.__func__.9401,"a",@progbits
 	.align	3
-	.set	.LANCHOR116,. + 0
-	.type	__func__.9379, %object
-	.size	__func__.9379, 14
-__func__.9379:
+	.set	.LANCHOR122,. + 0
+	.type	__func__.9401, %object
+	.size	__func__.9401, 14
+__func__.9401:
 	.string	"ftl_write_buf"
-	.section	.rodata.__func__.9430,"a",@progbits
+	.section	.rodata.__func__.9452,"a",@progbits
 	.align	3
-	.set	.LANCHOR191,. + 0
-	.type	__func__.9430, %object
-	.size	__func__.9430, 15
-__func__.9430:
+	.set	.LANCHOR198,. + 0
+	.type	__func__.9452, %object
+	.size	__func__.9452, 15
+__func__.9452:
 	.string	"ftl_read_ahead"
-	.section	.rodata.__func__.9438,"a",@progbits
+	.section	.rodata.__func__.9460,"a",@progbits
 	.align	3
-	.set	.LANCHOR55,. + 0
-	.type	__func__.9438, %object
-	.size	__func__.9438, 13
-__func__.9438:
+	.set	.LANCHOR57,. + 0
+	.type	__func__.9460, %object
+	.size	__func__.9460, 13
+__func__.9460:
 	.string	"ftl_read_buf"
-	.section	.rodata.__func__.9476,"a",@progbits
+	.section	.rodata.__func__.9498,"a",@progbits
 	.align	3
-	.set	.LANCHOR197,. + 0
-	.type	__func__.9476, %object
-	.size	__func__.9476, 10
-__func__.9476:
+	.set	.LANCHOR205,. + 0
+	.type	__func__.9498, %object
+	.size	__func__.9498, 10
+__func__.9498:
 	.string	"zftl_read"
-	.section	.rodata.__func__.9502,"a",@progbits
+	.section	.rodata.__func__.9524,"a",@progbits
 	.align	3
-	.set	.LANCHOR206,. + 0
-	.type	__func__.9502, %object
-	.size	__func__.9502, 13
-__func__.9502:
+	.set	.LANCHOR213,. + 0
+	.type	__func__.9524, %object
+	.size	__func__.9524, 13
+__func__.9524:
 	.string	"_ftl_discard"
-	.section	.rodata.__func__.9543,"a",@progbits
-	.align	3
-	.set	.LANCHOR198,. + 0
-	.type	__func__.9543, %object
-	.size	__func__.9543, 10
-__func__.9543:
-	.string	"vpn_check"
-	.section	.rodata.__func__.9665,"a",@progbits
+	.section	.rodata.__func__.9643,"a",@progbits
 	.align	3
-	.set	.LANCHOR61,. + 0
-	.type	__func__.9665, %object
-	.size	__func__.9665, 12
-__func__.9665:
+	.set	.LANCHOR63,. + 0
+	.type	__func__.9643, %object
+	.size	__func__.9643, 12
+__func__.9643:
 	.string	"gc_add_sblk"
-	.section	.rodata.__func__.9683,"a",@progbits
+	.section	.rodata.__func__.9664,"a",@progbits
 	.align	3
-	.set	.LANCHOR156,. + 0
-	.type	__func__.9683, %object
-	.size	__func__.9683, 21
-__func__.9683:
+	.set	.LANCHOR162,. + 0
+	.type	__func__.9664, %object
+	.size	__func__.9664, 21
+__func__.9664:
 	.string	"gc_check_data_one_wl"
-	.section	.rodata.__func__.9717,"a",@progbits
+	.section	.rodata.__func__.9698,"a",@progbits
 	.align	3
-	.set	.LANCHOR194,. + 0
-	.type	__func__.9717, %object
-	.size	__func__.9717, 22
-__func__.9717:
+	.set	.LANCHOR201,. + 0
+	.type	__func__.9698, %object
+	.size	__func__.9698, 22
+__func__.9698:
 	.string	"gc_update_l2p_map_new"
-	.section	.rodata.__func__.9730,"a",@progbits
+	.section	.rodata.__func__.9711,"a",@progbits
 	.align	3
-	.set	.LANCHOR66,. + 0
-	.type	__func__.9730, %object
-	.size	__func__.9730, 19
-__func__.9730:
+	.set	.LANCHOR70,. + 0
+	.type	__func__.9711, %object
+	.size	__func__.9711, 19
+__func__.9711:
 	.string	"gc_write_completed"
-	.section	.rodata.__func__.9759,"a",@progbits
+	.section	.rodata.__func__.9740,"a",@progbits
 	.align	3
-	.set	.LANCHOR203,. + 0
-	.type	__func__.9759, %object
-	.size	__func__.9759, 16
-__func__.9759:
+	.set	.LANCHOR209,. + 0
+	.type	__func__.9740, %object
+	.size	__func__.9740, 16
+__func__.9740:
 	.string	"gc_do_copy_back"
-	.section	.rodata.__func__.9781,"a",@progbits
+	.section	.rodata.__func__.9762,"a",@progbits
 	.align	3
-	.set	.LANCHOR101,. + 0
-	.type	__func__.9781, %object
-	.size	__func__.9781, 16
-__func__.9781:
+	.set	.LANCHOR106,. + 0
+	.type	__func__.9762, %object
+	.size	__func__.9762, 16
+__func__.9762:
 	.string	"gc_free_src_blk"
-	.section	.rodata.__func__.9826,"a",@progbits
+	.section	.rodata.__func__.9807,"a",@progbits
 	.align	3
-	.set	.LANCHOR199,. + 0
-	.type	__func__.9826, %object
-	.size	__func__.9826, 16
-__func__.9826:
+	.set	.LANCHOR202,. + 0
+	.type	__func__.9807, %object
+	.size	__func__.9807, 16
+__func__.9807:
 	.string	"gc_scan_src_blk"
-	.section	.rodata.__func__.9885,"a",@progbits
+	.section	.rodata.__func__.9865,"a",@progbits
 	.align	3
-	.set	.LANCHOR195,. + 0
-	.type	__func__.9885, %object
-	.size	__func__.9885, 20
-__func__.9885:
+	.set	.LANCHOR203,. + 0
+	.type	__func__.9865, %object
+	.size	__func__.9865, 20
+__func__.9865:
 	.string	"gc_scan_static_data"
-	.section	.rodata.__func__.9946,"a",@progbits
+	.section	.rodata.__func__.9932,"a",@progbits
 	.align	3
-	.set	.LANCHOR208,. + 0
-	.type	__func__.9946, %object
-	.size	__func__.9946, 11
-__func__.9946:
+	.set	.LANCHOR211,. + 0
+	.type	__func__.9932, %object
+	.size	__func__.9932, 11
+__func__.9932:
 	.string	"zftl_do_gc"
 	.section	.rodata._list_remove_node.str1.1,"aMS",@progbits,1
 .LC0:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
 	.section	.rodata.dump_ftl_info.str1.1,"aMS",@progbits,1
-.LC137:
+.LC149:
 	.string	"free_buf_count: %d\n"
-.LC138:
+.LC150:
 	.string	"g_ftl_info_blk blk:0x%x, index:0x%x, page:0x%x\n"
-.LC139:
+.LC151:
 	.string	"ftl_ext_info_blk blk:0x%x, page:0x%x\n"
-.LC140:
+.LC152:
 	.string	"ac_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC141:
+.LC153:
 	.string	"tmp_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC142:
+.LC154:
 	.string	"gc_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC143:
+.LC155:
 	.string	"lpa:"
-.LC144:
+.LC156:
 	.string	"vpn:"
-.LC145:
+.LC157:
 	.string	"sblk:"
-.LC146:
+.LC158:
 	.string	"lpa_hash:"
-.LC147:
+.LC159:
 	.string	"lpa_hash_index:"
 	.section	.rodata.dump_sblk_queue.str1.1,"aMS",@progbits,1
-.LC62:
+.LC68:
 	.string	"dump_sblk_queue: %d\n"
-.LC63:
+.LC69:
 	.string	"buf id= %d state = %d ppa = %x\n"
 	.section	.rodata.flash_complete_page_read.str1.1,"aMS",@progbits,1
-.LC106:
+.LC117:
 	.string	"flash_complete_page_read %x %x error_ecc %d %d\n"
-	.section	.rodata.flash_ddr_tunning_read.str1.1,"aMS",@progbits,1
-.LC98:
-	.string	"%d flash_ddr_tunning_read %x ecc=%d\n"
-.LC99:
+	.section	.rodata.flash_ddr_tuning_read.str1.1,"aMS",@progbits,1
+.LC109:
+	.string	"%d flash_ddr_tuning_read %x ecc=%d\n"
+.LC110:
 	.string	"sync para %d\n"
-.LC100:
+.LC111:
 	.string	"DDR mode Read error %x %x\n"
 	.section	.rodata.flash_erase_all.str1.1,"aMS",@progbits,1
 .LC35:
@@ -24231,50 +24476,50 @@ __func__.9946:
 .LC32:
 	.string	"flash_erase_duplane_block pageadd = %x status = %x\n"
 	.section	.rodata.flash_get_last_written_page.str1.1,"aMS",@progbits,1
-.LC103:
+.LC114:
 	.string	"flash_get_last_written_page: %x %x %x\n"
 	.section	.rodata.flash_info_blk_init.str1.1,"aMS",@progbits,1
-.LC104:
+.LC115:
 	.string	"...%d @ %s %d %p\n"
-.LC105:
+.LC116:
 	.string	"no sys info %x\n"
 	.section	.rodata.flash_info_flush.str1.1,"aMS",@progbits,1
-.LC133:
+.LC144:
 	.string	"finfo:"
-.LC134:
+.LC145:
 	.string	"flash_info_flush id = %x, page = %x\n"
-.LC135:
+.LC146:
 	.string	"sys_info_flush error:%x\n"
 	.section	.rodata.flash_into_data_init.str1.1,"aMS",@progbits,1
-.LC73:
+.LC84:
 	.string	"...%d @ %s\n"
 	.section	.rodata.flash_mask_bad_block.str1.1,"aMS",@progbits,1
 .LC40:
 	.string	"flash_mask_bad_block %d %d\n"
 	.section	.rodata.flash_prog_page.str1.1,"aMS",@progbits,1
-.LC109:
+.LC120:
 	.string	"flash_prog_page %x %x %x\n"
-.LC110:
+.LC121:
 	.string	"flash_prog_page page_addr = %x status = %x\n"
 	.section	.rodata.flash_prog_page_en.str1.1,"aMS",@progbits,1
-.LC115:
+.LC126:
 	.string	"flash_prog_page_en:%x %x\n"
-.LC116:
+.LC127:
 	.string	"spare"
-.LC117:
+.LC128:
 	.string	"data"
-.LC118:
+.LC129:
 	.string	"write error: %x\n"
 	.section	.rodata.flash_read_id.str1.1,"aMS",@progbits,1
 .LC38:
 	.string	"No.%d FLASH ID:%x %x %x %x %x %x\n"
 	.section	.rodata.flash_read_page.str1.1,"aMS",@progbits,1
-.LC91:
+.LC102:
 	.string	"flash_read_page %x %x %x\n"
 	.section	.rodata.flash_read_page_en.str1.1,"aMS",@progbits,1
-.LC101:
+.LC112:
 	.string	"flash_read_page_en %x %x\n"
-.LC102:
+.LC113:
 	.string	"flash_read_page_en %x %x error_ecc %d %d\n"
 	.section	.rodata.flash_set_interface_mode.str1.1,"aMS",@progbits,1
 .LC36:
@@ -24282,193 +24527,197 @@ __func__.9946:
 .LC37:
 	.string	"nand ddr mode %x\n"
 	.section	.rodata.ftl_alloc_sblk.str1.1,"aMS",@progbits,1
-.LC61:
+.LC67:
 	.string	"alloc sblk %x %d\n"
+	.section	.rodata.ftl_free_sblk.str1.1,"aMS",@progbits,1
+.LC55:
+	.string	"swl_tlc_free_mini_ec_blk sblk %x\n"
+.LC56:
+	.string	"swl_slc_free_mini_ec_blk sblk %x\n"
 	.section	.rodata.ftl_info_blk_init.str1.1,"aMS",@progbits,1
-.LC121:
+.LC132:
 	.string	"%d %x @%d %x\n"
-.LC122:
+.LC133:
 	.string	"ftl_info_blk_init %d %d %x\n"
 	.section	.rodata.ftl_info_flush.str1.1,"aMS",@progbits,1
-.LC120:
+.LC131:
 	.string	"g_ftl_info_blk blk = %x, page = %x version = %d\n"
 	.section	.rodata.ftl_low_format.str1.1,"aMS",@progbits,1
-.LC123:
+.LC134:
+	.string	"ftl_low_format %d\n"
+.LC135:
 	.string	"low format %d %d %d %d\n"
 	.section	.rodata.ftl_mask_bad_block.str1.1,"aMS",@progbits,1
-.LC54:
+.LC60:
 	.string	"mask bad block:cs %x block: %x\n"
 	.section	.rodata.ftl_open_sblk_recovery.str1.1,"aMS",@progbits,1
-.LC125:
+.LC137:
 	.string	"saved_active_page  = %x\n"
-.LC126:
+.LC138:
 	.string	"saved_active_plane = %x\n"
-.LC127:
+.LC139:
 	.string	"sblk = %x\n"
-.LC128:
+.LC140:
 	.string	"phy_blk = %x %x\n"
-.LC129:
-	.string	"blk= %x, page=%x, ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
-.LC130:
+.LC141:
 	.string	"sblk = %x, vpn0 = %d, vpn1 = %d\n"
-.LC131:
+.LC142:
 	.string	"dump write = %x\n"
-	.section	.rodata.ftl_re_low_format_test.str1.1,"aMS",@progbits,1
-.LC124:
+	.section	.rodata.ftl_re_low_format.str1.1,"aMS",@progbits,1
+.LC136:
 	.string	"re low format %d\n"
 	.section	.rodata.ftl_read_ahead.str1.1,"aMS",@progbits,1
-.LC158:
+.LC170:
 	.string	"ftl_read_ahead refresh =%x, lpa = %x, ppa= %x\n"
-.LC159:
+.LC171:
 	.string	"id=%d, lpa = %x, ppa = %x spare = %x %x %x %x\n"
 	.section	.rodata.ftl_sblk_dump.str1.1,"aMS",@progbits,1
-.LC182:
+.LC194:
+	.string	"ftl_sblk_dump = %x %d %d %d %d\n"
+.LC195:
 	.string	"ftl_sblk_dump = %x %x %x %x\n"
-.LC183:
+.LC196:
 	.string	"page_addr = %x, lpa=%x vpn = %d\n"
-.LC184:
+.LC197:
 	.string	"index= %x, lpa=%x\n"
-.LC185:
-	.string	"block = %x, vpn=%x check vpn = %d\n"
-	.section	.rodata.ftl_scan_all_data.str1.1,"aMS",@progbits,1
 .LC198:
-	.string	"ftl_scan_all_data = %x\n"
-.LC199:
-	.string	"scan lpa = %x ppa= %x\n"
-.LC200:
-	.string	"lba = %x,addr= %x, ststus = %x, spare= %x %x %x %x data=%x %x\n"
-.LC201:
-	.string	"lba = %x, id= %x, index = %x hash ppa = %x\n"
-.LC202:
-	.string	"0pm:"
-.LC203:
-	.string	"1pm:"
+	.string	"block = %x, vpn=%x check vpn = %d\n"
 	.section	.rodata.ftl_sysblk_dump.str1.1,"aMS",@progbits,1
-.LC136:
+.LC147:
+	.string	"blk= %x, page=%x, ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
+.LC148:
 	.string	"l2p:"
 	.section	.rodata.ftl_test_block.str1.1,"aMS",@progbits,1
-.LC119:
+.LC130:
 	.string	"low format %d\n"
 	.section	.rodata.ftl_update_l2p_map.str1.1,"aMS",@progbits,1
-.LC204:
+.LC201:
 	.string	"ftl_update_l2p_map: %x %x %x\n"
-.LC205:
+.LC202:
 	.string	"ftl_update_l2p_map"
-.LC206:
+.LC203:
 	.string	"lpa_tbl:"
-.LC207:
+.LC204:
 	.string	"sblk %x vpn: %d %d\n"
 	.section	.rodata.ftl_vpn_decrement.str1.1,"aMS",@progbits,1
-.LC53:
+.LC59:
 	.string	"ftl_vpn_decrement %x = %d\n"
 	.section	.rodata.ftl_write_commit.str1.1,"aMS",@progbits,1
-.LC208:
+.LC205:
 	.string	"%d read error: ppa:%x, lpa:%x, status:%x\n"
 	.section	.rodata.ftl_write_completed.str1.1,"aMS",@progbits,1
-.LC60:
+.LC66:
 	.string	"ftl prog error =%x, lpa = %x, ppa= %x\n"
 	.section	.rodata.gc_add_sblk.str1.1,"aMS",@progbits,1
 .LC41:
 	.string	"gc_add_sblk = %d, %d, %d, %d, %d, %d\n"
+.LC42:
+	.string	"gc_add_sblk = %d, %d, %d,last update:%d, %d\n"
 	.section	.rodata.gc_check_data_one_wl.str1.1,"aMS",@progbits,1
-.LC108:
+.LC119:
 	.string	"1ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
 	.section	.rodata.gc_do_copy_back.str1.1,"aMS",@progbits,1
-.LC209:
+.LC206:
 	.string	"gc page in buf: lpa %x ppa = %x pageindex= %x\n"
-.LC210:
+.LC207:
 	.string	"gc_do_copy_back: lpa %x des_ppa = %x %x gc_ppa= %x page_index= %d\n"
-.LC211:
+.LC208:
 	.string	"gc_do_copy_back: %x %x %x %x gc_ppa:%x %x\n"
-.LC212:
+.LC209:
 	.string	"%d prog_step: %x %x buf id= %x ppa = %x hash=%x id = %x plane = %x lpa=%x\n"
 	.section	.rodata.gc_free_src_blk.str1.1,"aMS",@progbits,1
-.LC51:
+.LC57:
 	.string	"gc_free_src_blk = %x, vpn = %d\n"
-.LC52:
+.LC58:
 	.string	"gc_free_src_blk %x, %d\n"
 	.section	.rodata.gc_free_temp_buf.str1.1,"aMS",@progbits,1
-.LC44:
+.LC45:
 	.string	"%d gc_free_temp_buf buf id= %x\n"
 	.section	.rodata.gc_recovery.str1.1,"aMS",@progbits,1
-.LC160:
+.LC172:
 	.string	"ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
-.LC161:
+.LC173:
 	.string	"ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
-.LC162:
-	.string	"gc_recovery"
-.LC163:
+.LC174:
 	.string	"gc_recovery: %x vpn = %x\n"
 	.section	.rodata.gc_scan_src_blk.str1.1,"aMS",@progbits,1
-.LC196:
+.LC192:
 	.string	"gc_scan_src_blk = %x, vpn = %d\n"
-.LC197:
+.LC193:
 	.string	"gc_scan_src_blk = %x, s vpn0 = %d, c vpn1 = %d\n"
 	.section	.rodata.gc_search_src_blk.str1.1,"aMS",@progbits,1
-.LC46:
-	.string	"zftl_get_gc_node cache = %x index = %d vpn = %x\n"
 .LC47:
+	.string	"zftl_get_gc_node cache = %x index = %d vpn = %x\n"
+.LC48:
 	.string	"gc_search_src_blk mode = %x, src mode = %x, count= %d %d\n"
 	.section	.rodata.gc_static_wearleveling.str1.1,"aMS",@progbits,1
-.LC67:
-	.string	"gc_static_wearleveling: slc blk: %d, tlc blk: %d avg slc ec: %d, avg tlc ec: %d \n"
-.LC68:
-	.string	"gc_static_wearleveling: min slc ec: %d, min tlc ec: %d max slc ec: %d, max tlc ec: %d; %d %d\n"
-.LC69:
-	.string	"swl add tlc gc = %d, %d, %d, %d, %d, %d\n"
-.LC70:
-	.string	"swl add slc gc  = %d, %d, %d, %d, %d, %d\n"
+.LC73:
+	.string	"gc_static_wearleveling: min blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
+.LC74:
+	.string	"gc_static_wearleveling: min slc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
+.LC75:
+	.string	"gc_static_wearleveling: min tlc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
+.LC76:
+	.string	"gc_static_wearleveling: max slc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
+.LC77:
+	.string	"gc_static_wearleveling: max xlc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
+.LC78:
+	.string	"gc_static_wearleveling: slc blk: %x, tlc blk: %d avg slc ec: %d, avg tlc ec: %d \n"
+.LC79:
+	.string	"gc_static_wearleveling: min slc ec: %x, min tlc ec: %d max slc ec: %d, max tlc ec: %d; %d %d\n"
+.LC80:
+	.string	"swl add tlc gc = %x, %d, %d, %d, %d, %d\n"
+.LC81:
+	.string	"swl add slc gc  = %x, %d, %d, %d, %d, %d\n"
 	.section	.rodata.gc_update_l2p_map_new.str1.1,"aMS",@progbits,1
-.LC177:
+.LC188:
 	.string	"gc_update_l2p_map_new sblk %x\n"
-.LC178:
+.LC189:
 	.string	"gc_update_l2p_map_new: %x %x %x\n"
-.LC179:
-	.string	"0lpa: %x %x %x\n"
-.LC180:
+.LC190:
 	.string	"lpa: %x %x %x\n"
-.LC181:
+.LC191:
 	.string	"gc_update_l2p_map_new: %x vpn = %x vpn1 = %x done\n"
 	.section	.rodata.gc_write_completed.str1.1,"aMS",@progbits,1
-.LC42:
-	.string	"status: %x, ppa: %x\n"
 .LC43:
+	.string	"status: %x, ppa: %x\n"
+.LC44:
 	.string	"gc_write_completed: %x  %x  %x %x\n"
 	.section	.rodata.hynix_get_read_retry_default.str1.1,"aMS",@progbits,1
-.LC81:
+.LC92:
 	.string	"otp error! %d"
-.LC82:
+.LC93:
 	.string	"rr"
 	.section	.rodata.hynix_read_retrial.str1.1,"aMS",@progbits,1
-.LC97:
+.LC108:
 	.string	"hynix RR %d row=%x, count %d, status=%d\n"
 	.section	.rodata.idb_write_data.str1.1,"aMS",@progbits,1
-.LC111:
+.LC122:
 	.string	"1 write_idblock fix data %x %x %x\n"
-.LC112:
+.LC123:
 	.string	"write_idblock check fail! %x\n"
-.LC113:
+.LC124:
 	.string	"write_idblock fail! %x\n"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",@progbits,1
-.LC149:
+.LC161:
 	.string	"region_id = %d, pm_max_region = %d\n"
-.LC150:
+.LC162:
 	.string	"load_l2p_region no ppa = %x , %x, all setting 0xff....\n"
-.LC151:
+.LC163:
 	.string	"load_l2p_region = %x,%x,%x, %x\n"
-.LC152:
+.LC164:
 	.string	"pm_ppa:"
-.LC153:
+.LC165:
 	.string	"data:"
-.LC154:
+.LC166:
 	.string	"spare:"
 	.section	.rodata.lpa_rebuild_hash.str1.1,"aMS",@progbits,1
-.LC66:
+.LC72:
 	.string	"%s %d %d\n"
 	.section	.rodata.micron_read_retrial.str1.1,"aMS",@progbits,1
-.LC92:
+.LC103:
 	.string	"micron %d row=%x,count %d,status=%d\n"
-.LC93:
+.LC104:
 	.string	"micron RR %d row=%x,count %d,status=%d\n"
 	.section	.rodata.nand_flash_print_info.str1.1,"aMS",@progbits,1
 .LC1:
@@ -24532,77 +24781,77 @@ __func__.9946:
 .LC30:
 	.string	"g_flash_toggle_mode_en: %x\n"
 	.section	.rodata.nandc_init.str1.1,"aMS",@progbits,1
-.LC74:
+.LC85:
 	.string	"...%s enter... %p\n"
-.LC75:
+.LC86:
 	.string	"0:%x %x %x %x %x\n"
-.LC76:
+.LC87:
 	.string	"g_nandc_ver...%d\n"
 	.section	.rodata.nandc_xfer.str1.1,"aMS",@progbits,1
-.LC88:
+.LC99:
 	.string	"dqs data abort %x\n"
-.LC89:
+.LC100:
 	.string	"dqs data timeout %x\n"
-.LC90:
+.LC101:
 	.string	"xfer error %x\n"
 	.section	.rodata.nandc_xfer_done.str1.1,"aMS",@progbits,1
-.LC83:
+.LC94:
 	.string	"flash_abort_clear = %d\n"
-.LC84:
+.LC95:
 	.string	"%d mtrans_cnt = %d page_num = %d\n"
-.LC85:
+.LC96:
 	.string	"nandc:"
-.LC86:
+.LC97:
 	.string	"%d flReg.d32=%x %x\n"
-.LC87:
+.LC98:
 	.string	"nandc_xfer_done read error %x\n"
 	.section	.rodata.pm_alloc_new_blk.str1.1,"aMS",@progbits,1
-.LC64:
+.LC70:
 	.string	"blk %x is bad block\n"
-.LC65:
+.LC71:
 	.string	"pm_alloc_new_blk: %x %x %x %x\n"
 	.section	.rodata.pm_free_sblk.str1.1,"aMS",@progbits,1
-.LC72:
+.LC83:
 	.string	"ftl_free_no_use_map_blk %x %x %x %d\n"
 	.section	.rodata.pm_init.str1.1,"aMS",@progbits,1
-.LC155:
+.LC167:
 	.string	"pm_init posr %x %x %x\n"
-.LC156:
+.LC168:
 	.string	"pm_init recovery %x %x %x\n"
 	.section	.rodata.pm_log2phys.str1.1,"aMS",@progbits,1
-.LC157:
+.LC169:
 	.string	"pm_log2phys  lpn = %d, max lpn = %d\n"
 	.section	.rodata.pm_ppa_update_check.str1.1,"aMS",@progbits,1
-.LC148:
+.LC160:
 	.string	"%s w error lpn = %x, max ppa = %d\n"
 	.section	.rodata.pm_write_page.str1.1,"aMS",@progbits,1
-.LC132:
+.LC143:
 	.string	"pm_write_page write error: %x\n"
 	.section	.rodata.print_ftl_debug_info.str1.1,"aMS",@progbits,1
-.LC55:
+.LC61:
 	.string	"free blk: s:%x,t:%x,m:%x, data blk:s:%x,%x,t%x vpn: s:%x t:%x, max_vpn: %x\n"
-.LC56:
+.LC62:
 	.string	"totle w: %d MB,r: %d MB %d dv:0x%X,poc:%d\n"
-.LC57:
+.LC63:
 	.string	"gc xlc page: %d,gc slc page: %d, tmp w: %d MB\n"
-.LC58:
+.LC64:
 	.string	"slc ec: %d,%d,%d,%d,%d,tlc ec: %d,%d,%d,%d,%d\n"
-.LC59:
+.LC65:
 	.string	"gc th: tlc_tlc: %d tlc_slc: %d slc_slc: %d slc_tlc:%d free_th: %d\n"
 	.section	.rodata.print_gc_debug_info.str1.1,"aMS",@progbits,1
-.LC45:
+.LC46:
 	.string	"gc: b:%x,p:%x,i:%x; free buf=%d %d free slc th: %d\n"
 	.section	.rodata.print_list_info.str1.1,"aMS",@progbits,1
-.LC49:
+.LC53:
 	.string	"list count:%p %d\n"
-.LC50:
+.LC54:
 	.string	"%d: node:%x %x %x %x, %d %d %d %d %d\n"
 	.section	.rodata.queue_wait_first_req_completed.str1.1,"aMS",@progbits,1
-.LC107:
+.LC118:
 	.string	"set buf %d,status = %x, ppa = %x lun state = %d\n"
 	.section	.rodata.random_seed,"a",@progbits
 	.align	3
-	.set	.LANCHOR45,. + 0
+	.set	.LANCHOR47,. + 0
 	.type	random_seed, %object
 	.size	random_seed, 256
 random_seed:
@@ -24735,26 +24984,26 @@ random_seed:
 	.hword	17598
 	.hword	28087
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",@progbits,1
-.LC176:
+.LC187:
 	.string	"zftl_init %x\n"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
-.LC77:
+.LC88:
 	.string	"%s 0x%x:"
-.LC78:
+.LC89:
 	.string	"%x "
-.LC79:
+.LC90:
 	.string	""
-.LC80:
+.LC91:
 	.string	"%s\n"
 	.section	.rodata.sandisk_prog_test_bad_block.str1.1,"aMS",@progbits,1
 .LC39:
 	.string	"bad block test:%x %x\n"
 	.section	.rodata.sblk_prog_page.str1.1,"aMS",@progbits,1
-.LC114:
+.LC125:
 	.string	"sblk_prog_page ppa = %x, count = %d\n"
 	.section	.rodata.toshiba_15ref_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR15,. + 0
+	.set	.LANCHOR17,. + 0
 	.type	toshiba_15ref_value, %object
 	.size	toshiba_15ref_value, 95
 toshiba_15ref_value:
@@ -24855,7 +25104,7 @@ toshiba_15ref_value:
 	.byte	0
 	.section	.rodata.toshiba_3D_slc_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR29,. + 0
+	.set	.LANCHOR31,. + 0
 	.type	toshiba_3D_slc_value, %object
 	.size	toshiba_3D_slc_value, 11
 toshiba_3D_slc_value:
@@ -24872,7 +25121,7 @@ toshiba_3D_slc_value:
 	.byte	56
 	.section	.rodata.toshiba_3D_tlc_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR28,. + 0
+	.set	.LANCHOR30,. + 0
 	.type	toshiba_3D_tlc_value, %object
 	.size	toshiba_3D_tlc_value, 399
 toshiba_3D_tlc_value:
@@ -25276,15 +25525,15 @@ toshiba_3D_tlc_value:
 	.byte	12
 	.byte	14
 	.section	.rodata.toshiba_3d_read_retrial.str1.1,"aMS",@progbits,1
-.LC94:
+.LC105:
 	.string	"toshiba SRR %d row=%x, status=%d\n"
-.LC95:
+.LC106:
 	.string	"toshiba TRR %d row=%x, status=%d\n"
-.LC96:
+.LC107:
 	.string	"toshiba RR %d row=%x,count %d,status=%d\n"
 	.section	.rodata.toshiba_A19ref_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR16,. + 0
+	.set	.LANCHOR18,. + 0
 	.type	toshiba_A19ref_value, %object
 	.size	toshiba_A19ref_value, 45
 toshiba_A19ref_value:
@@ -25335,7 +25584,7 @@ toshiba_A19ref_value:
 	.byte	0
 	.section	.rodata.toshiba_ref_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR18,. + 0
+	.set	.LANCHOR20,. + 0
 	.type	toshiba_ref_value, %object
 	.size	toshiba_ref_value, 8
 toshiba_ref_value:
@@ -25347,82 +25596,62 @@ toshiba_ref_value:
 	.byte	8
 	.byte	12
 	.byte	112
-	.section	.rodata.vpn_check.str1.1,"aMS",@progbits,1
-.LC188:
-	.string	"acblk = %x, tempblk = %x, gc_des = %x\n"
-.LC189:
-	.string	"acblk = %x, free page = %x, vpn = %x %x\n"
-.LC190:
-	.string	"tmp_blk = %x, free page = %x, vpn = %x %x\n"
-.LC191:
-	.string	"vpn_check lpa = %x, ppa = %x, blk = %x\n"
-.LC192:
-	.string	"l2p"
-.LC193:
-	.string	"vpn_check %x = c %x  s %x function: %x\n"
-.LC194:
-	.string	"vpn_check blk = %x fix vpc\n"
-.LC195:
-	.string	"...%s exit...%d\n"
 	.section	.rodata.zftl_discard.str1.1,"aMS",@progbits,1
-.LC213:
+.LC215:
 	.string	"ftl_discard:(%x, %x, %x, %x)\n"
 	.section	.rodata.zftl_do_gc.str1.1,"aMS",@progbits,1
-.LC214:
+.LC210:
 	.string	"gc %d: %d %d %d %d %d %d %d\n"
-.LC215:
+.LC211:
 	.string	"gc %d: %d %d %d %d %d %d\n"
-.LC216:
+.LC212:
 	.string	"GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\n"
-.LC217:
+.LC213:
 	.string	"gc free %x, %d\n"
-.LC218:
-	.string	"error gc slc free sblk = %x, vpn = %d %d\n"
-.LC219:
-	.string	"vpage0:"
-.LC220:
-	.string	"block %x, vpn = %d %d %d %d\n"
-.LC221:
-	.string	"block %x, vpn = %d %d\n"
-.LC222:
-	.string	"vpage1:"
-	.section	.rodata.zftl_get_free_sblk.str1.1,"aMS",@progbits,1
-.LC48:
+	.section	.rodata.zftl_gc_get_free_sblk.str1.1,"aMS",@progbits,1
+.LC49:
+	.string	"swl_tlc_free_mini_ec_blk alloc sblk %x\n"
+.LC50:
 	.string	"zftl_get_free_sblk %x %d, %p %d %d\n"
+.LC51:
+	.string	"zftl_gc_get_free_sblk %x %x %x, %d %d %d\n"
+	.section	.rodata.zftl_get_free_sblk.str1.1,"aMS",@progbits,1
+.LC52:
+	.string	"swl_slc_free_mini_ec_blk alloc sblk %x\n"
 	.section	.rodata.zftl_init.str1.1,"aMS",@progbits,1
-.LC164:
-	.string	"FTL version: 6.0.7 20180411"
-.LC165:
+.LC175:
+	.string	"FTL version: 6.0.8 20180511"
+.LC176:
 	.string	"_c_user_data_density := %d\n"
-.LC166:
+.LC177:
 	.string	"_c_totle_phy_density := %d\n"
-.LC167:
+.LC178:
 	.string	"_c_totle_log_page := %d\n"
-.LC168:
+.LC179:
 	.string	"_c_totle_data_density := %d\n"
-.LC169:
+.LC180:
 	.string	"_c_ftl_pm_page_num := %d\n"
-.LC170:
+.LC181:
 	.string	"_c_ftl_byte_pre_page := %d\n"
-.LC171:
+.LC182:
 	.string	"_c_max_pm_sblk := %d\n"
-.LC172:
+.LC183:
 	.string	"_min_slc_super_block := %d\n"
-.LC173:
+.LC184:
 	.string	"_max_xlc_super_block := %d\n"
-.LC174:
+.LC185:
 	.string	"gp_ftl_ext_info %p %p %p\n"
-.LC175:
+.LC186:
 	.string	"flash info size: %d %d %d\n"
 	.section	.rodata.zftl_read.str1.1,"aMS",@progbits,1
-.LC186:
+.LC199:
 	.string	"ftl_read %x %x %x\n"
-.LC187:
+.LC200:
 	.string	"ftl_read refresh =%x, lpa = %x, ppa= %x\n"
 	.section	.rodata.zftl_sblk_list_init.str1.1,"aMS",@progbits,1
-.LC71:
+.LC82:
 	.string	"free blk vpn error: %x %x\n"
 	.section	.rodata.zftl_write.str1.1,"aMS",@progbits,1
-.LC223:
+.LC214:
 	.string	"ftlwrite %x %x %x\n"
 	.hidden	free

commit e8290547d257ba53a99c161efc0652b23092353e
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu May 24 16:13:23 2018 +0800

    rockchip: dts: rk3399: disable pmic/vop in pre-reloc
    
    We do not enable pmic and vop in pre-reloc, so we don't use
    then in SPL and pre-reloc stage in U-Boot with kernel dtb enabled.
    
    Change-Id: I3389069c117996864d2d030bfc5443e91f02314e
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts
index 0a81691bcb..38d2a458ef 100644
--- a/arch/arm/dts/rk3399-evb.dts
+++ b/arch/arm/dts/rk3399-evb.dts
@@ -168,6 +168,7 @@
 };
 
 &uart2 {
+	u-boot,dm-pre-reloc;
 	status = "okay";
 };
 
@@ -202,7 +203,6 @@
 	clock-frequency = <400000>;
 	i2c-scl-falling-time-ns = <50>;
 	i2c-scl-rising-time-ns = <100>;
-	u-boot,dm-pre-reloc;
 
 	rk808: pmic@1b {
 		compatible = "rockchip,rk808";
@@ -214,7 +214,6 @@
 		reg = <0x1b>;
 		rockchip,system-power-controller;
 		#clock-cells = <1>;
-		u-boot,dm-pre-reloc;
 		status = "okay";
 
 		vcc12-supply = <&vcc3v3_sys>;
diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
index 5d9a8b9157..584f0a58f5 100644
--- a/arch/arm/dts/rk3399.dtsi
+++ b/arch/arm/dts/rk3399.dtsi
@@ -1404,7 +1404,6 @@
 	};
 
 	vopl: vop@ff8f0000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3399-vop-lit";
 		reg = <0x0 0xff8f0000 0x0 0x3efc>;
 		interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
@@ -1429,7 +1428,6 @@
 	};
 
 	vopb: vop@ff900000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3399-vop-big";
 		reg = <0x0 0xff900000 0x0 0x3efc>;
 		interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>;

commit 2f9723332468633b6a232499ccabf9d819d8cf4d
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu May 24 16:11:52 2018 +0800

    rockchip: sdhci: phy init convert to use live dt
    
    Change-Id: Iac6f2b6151d977b9ec121828790a1ba75e8c418f
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index 22fe200863..8de9865ebd 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -15,6 +15,9 @@
 #include <mapmem.h>
 #include <sdhci.h>
 #include <clk.h>
+#include <syscon.h>
+#include <dm/ofnode.h>
+#include <asm/arch/clock.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 /* 400KHz is max freq for card ID etc. Use that as min */
@@ -148,25 +151,21 @@ static int arasan_get_phy(struct udevice *dev)
 #if CONFIG_IS_ENABLED(OF_PLATDATA)
 	priv->phy = (struct rockchip_emmc_phy *)0xff77f780;
 #else
-	int phy_node, grf_node;
-	fdt_addr_t grf_base, grf_phy_offset;
+	ofnode phy_node;
+	void *grf_base;
+	u32 grf_phy_offset, phandle;
 
-	phy_node = fdtdec_lookup_phandle(gd->fdt_blob,
-					 dev_of_offset(dev), "phys");
-	if (phy_node <= 0) {
+	phandle = dev_read_u32_default(dev, "phys", 0);
+	phy_node = ofnode_get_by_phandle(phandle);
+	if (!ofnode_valid(phy_node)) {
 		debug("Not found emmc phy device\n");
 		return -ENODEV;
 	}
 
-	grf_node = fdt_parent_offset(gd->fdt_blob, phy_node);
-	if (grf_node <= 0) {
-		debug("Not found usb phy device\n");
-		return -ENODEV;
-	}
-
-	grf_base = fdtdec_get_addr(gd->fdt_blob, grf_node, "reg");
-	grf_phy_offset = fdtdec_get_addr_size_auto_parent(gd->fdt_blob,
-				grf_node, phy_node, "reg", 0, NULL, false);
+	grf_base = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	if (grf_base < 0)
+		printf("%s Get syscon grf failed", __func__);
+	grf_phy_offset = ofnode_read_u32_default(phy_node, "reg", 0);
 
 	priv->phy = (struct rockchip_emmc_phy *)(grf_base + grf_phy_offset);
 #endif

commit 27b7c22892d1dec8c110b46dd9b891c4b1f7ff48
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu May 24 16:37:14 2018 +0800

    pwm-regulator: do not fail if no regulator-init-microvolt found
    
    There are many boards in kernel do not have a regulator-init-microvolt
    in pwm regulator, let's make it available.
    
    Change-Id: Ib8235af4082f3428eb04684617a52bb68a4b2e7a
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/power/regulator/pwm_regulator.c b/drivers/power/regulator/pwm_regulator.c
index 29bceb5858..ffa26a1c6c 100644
--- a/drivers/power/regulator/pwm_regulator.c
+++ b/drivers/power/regulator/pwm_regulator.c
@@ -106,7 +106,6 @@ static int pwm_regulator_ofdata_to_platdata(struct udevice *dev)
 	priv->init_voltage = dev_read_u32_default(dev, "regulator-init-microvolt", -1);
 	if (priv->init_voltage < 0) {
 		printf("Cannot find regulator pwm init_voltage\n");
-		return -EINVAL;
 	}
 
 	ret = uclass_get_device_by_ofnode(UCLASS_PWM, args.node, &priv->pwm);

commit fc4a6bd40d2ca8f434370cab46361d22d5ea6470
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Fri May 25 10:24:34 2018 +0800

    clk: rockchip: rk3308: Move pll rate into clk private data
    
    Change-Id: I424259266a4c76031192bf07d52c29cd3e48ec0a
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
index e3fb750a39..bf5bf57c8c 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
@@ -45,7 +45,10 @@ struct pll_div {
 /* Private data for the clock driver - used by rockchip_get_cru() */
 struct rk3308_clk_priv {
 	struct rk3308_cru *cru;
-	ulong rate;
+	ulong apll_hz;
+	ulong dpll_hz;
+	ulong vpll0_hz;
+	ulong vpll1_hz;
 };
 
 struct rk3308_cru {
diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index cf725596c8..3e39cfba91 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -44,8 +44,6 @@ static u32 pll_mode_mask[PLL_COUNT] = {
 	VPLL1_MODE_MASK
 };
 
-static ulong apll_hz, dpll_hz, vpll0_hz, vpll1_hz;
-
 /*
  * How to calculate the PLL:
  * Formulas also embedded within the Fractional PLL Verilog model:
@@ -143,8 +141,11 @@ static uint32_t rkclk_pll_get_rate(struct rk3308_cru *cru,
 	}
 }
 
-static void rkclk_init(struct rk3308_cru *cru)
+static void rkclk_init(struct udevice *dev)
 {
+	struct rk3308_clk_priv *priv = dev_get_priv(dev);
+	struct rk3308_cru *cru = priv->cru;
+
 	u32 aclk_div, hclk_div, pclk_div;
 
 	/* init pll */
@@ -155,9 +156,9 @@ static void rkclk_init(struct rk3308_cru *cru)
 	 * set up dependent divisors for PCLK and ACLK clocks.
 	 * core hz : apll = 1:1
 	 */
-	apll_hz = rkclk_pll_get_rate(cru, APLL);
-	aclk_div = apll_hz / CORE_ACLK_HZ - 1;
-	pclk_div = apll_hz / CORE_DBG_HZ - 1;
+	priv->apll_hz = rkclk_pll_get_rate(cru, APLL);
+	aclk_div = priv->apll_hz / CORE_ACLK_HZ - 1;
+	pclk_div = priv->apll_hz / CORE_DBG_HZ - 1;
 	rk_clrsetreg(&cru->clksel_con[0],
 		     CORE_ACLK_DIV_MASK | CORE_DBG_DIV_MASK |
 		     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK,
@@ -170,10 +171,10 @@ static void rkclk_init(struct rk3308_cru *cru)
 	 * select dpll as pd_bus bus clock source and
 	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
 	 */
-	dpll_hz = rkclk_pll_get_rate(cru, DPLL);
-	aclk_div = dpll_hz / BUS_ACLK_HZ - 1;
-	hclk_div = dpll_hz / BUS_HCLK_HZ - 1;
-	pclk_div = dpll_hz / BUS_PCLK_HZ - 1;
+	priv->dpll_hz = rkclk_pll_get_rate(cru, DPLL);
+	aclk_div = priv->dpll_hz / BUS_ACLK_HZ - 1;
+	hclk_div = priv->dpll_hz / BUS_HCLK_HZ - 1;
+	pclk_div = priv->dpll_hz / BUS_PCLK_HZ - 1;
 	rk_clrsetreg(&cru->clksel_con[5],
 		     BUS_PLL_SEL_MASK | BUS_ACLK_DIV_MASK,
 		     BUS_PLL_SEL_DPLL << BUS_PLL_SEL_SHIFT |
@@ -187,9 +188,9 @@ static void rkclk_init(struct rk3308_cru *cru)
 	 * select dpll as pd_peri bus clock source and
 	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
 	 */
-	aclk_div = dpll_hz / PERI_ACLK_HZ - 1;
-	hclk_div = dpll_hz / PERI_HCLK_HZ - 1;
-	pclk_div = dpll_hz / PERI_PCLK_HZ - 1;
+	aclk_div = priv->dpll_hz / PERI_ACLK_HZ - 1;
+	hclk_div = priv->dpll_hz / PERI_HCLK_HZ - 1;
+	pclk_div = priv->dpll_hz / PERI_PCLK_HZ - 1;
 	rk_clrsetreg(&cru->clksel_con[36],
 		     PERI_PLL_SEL_MASK | PERI_ACLK_DIV_MASK,
 		     BUS_PLL_SEL_DPLL << PERI_PLL_SEL_SHIFT |
@@ -199,15 +200,17 @@ static void rkclk_init(struct rk3308_cru *cru)
 		     pclk_div << PERI_PCLK_DIV_SHIFT |
 		     hclk_div << PERI_HCLK_DIV_SHIFT);
 
-	vpll0_hz = rkclk_pll_get_rate(cru, VPLL0);
-	vpll1_hz = rkclk_pll_get_rate(cru, VPLL1);
+	priv->vpll0_hz = rkclk_pll_get_rate(cru, VPLL0);
+	priv->vpll1_hz = rkclk_pll_get_rate(cru, VPLL1);
 }
 
-static ulong rk3308_i2c_get_clk(struct rk3308_cru *cru, ulong clk_id)
+static ulong rk3308_i2c_get_clk(struct clk *clk)
 {
+	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3308_cru *cru = priv->cru;
 	u32 div, con, con_id;
 
-	switch (clk_id) {
+	switch (clk->id) {
 	case SCLK_I2C0:
 		con_id = 25;
 		break;
@@ -228,17 +231,19 @@ static ulong rk3308_i2c_get_clk(struct rk3308_cru *cru, ulong clk_id)
 	con = readl(&cru->clksel_con[con_id]);
 	div = con >> CLK_I2C_DIV_CON_SHIFT & CLK_I2C_DIV_CON_MASK;
 
-	return DIV_TO_RATE(dpll_hz, div);
+	return DIV_TO_RATE(priv->dpll_hz, div);
 }
 
-static ulong rk3308_i2c_set_clk(struct rk3308_cru *cru, ulong clk_id, uint hz)
+static ulong rk3308_i2c_set_clk(struct clk *clk, uint hz)
 {
+	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3308_cru *cru = priv->cru;
 	u32 src_clk_div, con_id;
 
-	src_clk_div = dpll_hz / hz;
+	src_clk_div = priv->dpll_hz / hz;
 	assert(src_clk_div - 1 < 127);
 
-	switch (clk_id) {
+	switch (clk->id) {
 	case SCLK_I2C0:
 		con_id = 25;
 		break;
@@ -260,14 +265,16 @@ static ulong rk3308_i2c_set_clk(struct rk3308_cru *cru, ulong clk_id, uint hz)
 		     CLK_I2C_PLL_SEL_DPLL << CLK_I2C_PLL_SEL_SHIFT |
 		     (src_clk_div - 1) << CLK_I2C_DIV_CON_SHIFT);
 
-	return rk3308_i2c_get_clk(cru, clk_id);
+	return rk3308_i2c_get_clk(clk);
 }
 
-static ulong rk3308_mmc_get_clk(struct rk3308_cru *cru, uint clk_id)
+static ulong rk3308_mmc_get_clk(struct clk *clk)
 {
+	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3308_cru *cru = priv->cru;
 	u32 div, con, con_id;
 
-	switch (clk_id) {
+	switch (clk->id) {
 	case HCLK_SDMMC:
 	case SCLK_SDMMC:
 		con_id = 39;
@@ -288,18 +295,19 @@ static ulong rk3308_mmc_get_clk(struct rk3308_cru *cru, uint clk_id)
 	    == EMMC_SEL_24M)
 		return DIV_TO_RATE(OSC_HZ, div) / 2;
 	else
-		return DIV_TO_RATE(vpll0_hz, div) / 2;
+		return DIV_TO_RATE(priv->vpll0_hz, div) / 2;
 }
 
-static ulong rk3308_mmc_set_clk(struct rk3308_cru *cru,
-				ulong clk_id, ulong set_rate)
+static ulong rk3308_mmc_set_clk(struct clk *clk, ulong set_rate)
 {
+	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3308_cru *cru = priv->cru;
 	int src_clk_div;
 	u32 con_id;
 
-	debug("%s %ld %ld\n", __func__, clk_id, set_rate);
+	debug("%s %ld %ld\n", __func__, clk->id, set_rate);
 
-	switch (clk_id) {
+	switch (clk->id) {
 	case HCLK_SDMMC:
 	case SCLK_SDMMC:
 		con_id = 39;
@@ -313,7 +321,7 @@ static ulong rk3308_mmc_set_clk(struct rk3308_cru *cru,
 	}
 	/* Select clk_sdmmc/emmc source from VPLL0 by default */
 	/* mmc clock defaulg div 2 internal, need provide double in cru */
-	src_clk_div = DIV_ROUND_UP(vpll0_hz / 2, set_rate);
+	src_clk_div = DIV_ROUND_UP(priv->vpll0_hz / 2, set_rate);
 
 	if (src_clk_div > 127) {
 		/* use 24MHz source for 400KHz clock */
@@ -331,11 +339,13 @@ static ulong rk3308_mmc_set_clk(struct rk3308_cru *cru,
 			     (src_clk_div - 1) << EMMC_DIV_SHIFT);
 	}
 
-	return rk3308_mmc_get_clk(cru, clk_id);
+	return rk3308_mmc_get_clk(clk);
 }
 
-static ulong rk3308_saradc_get_clk(struct rk3308_cru *cru)
+static ulong rk3308_saradc_get_clk(struct clk *clk)
 {
+	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3308_cru *cru = priv->cru;
 	u32 div, con;
 
 	con = readl(&cru->clksel_con[34]);
@@ -344,8 +354,10 @@ static ulong rk3308_saradc_get_clk(struct rk3308_cru *cru)
 	return DIV_TO_RATE(OSC_HZ, div);
 }
 
-static ulong rk3308_saradc_set_clk(struct rk3308_cru *cru, uint hz)
+static ulong rk3308_saradc_set_clk(struct clk *clk, uint hz)
 {
+	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3308_cru *cru = priv->cru;
 	int src_clk_div;
 
 	src_clk_div = OSC_HZ / hz;
@@ -355,14 +367,16 @@ static ulong rk3308_saradc_set_clk(struct rk3308_cru *cru, uint hz)
 		     CLK_SARADC_DIV_CON_MASK,
 		     (src_clk_div - 1) << CLK_SARADC_DIV_CON_SHIFT);
 
-	return rk3308_saradc_get_clk(cru);
+	return rk3308_saradc_get_clk(clk);
 }
 
-static ulong rk3308_spi_get_clk(struct rk3308_cru *cru, ulong clk_id)
+static ulong rk3308_spi_get_clk(struct clk *clk)
 {
+	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3308_cru *cru = priv->cru;
 	u32 div, con, con_id;
 
-	switch (clk_id) {
+	switch (clk->id) {
 	case SCLK_SPI0:
 		con_id = 30;
 		break;
@@ -380,17 +394,19 @@ static ulong rk3308_spi_get_clk(struct rk3308_cru *cru, ulong clk_id)
 	con = readl(&cru->clksel_con[con_id]);
 	div = con >> CLK_SPI_DIV_CON_SHIFT & CLK_SPI_DIV_CON_MASK;
 
-	return DIV_TO_RATE(dpll_hz, div);
+	return DIV_TO_RATE(priv->dpll_hz, div);
 }
 
-static ulong rk3308_spi_set_clk(struct rk3308_cru *cru, ulong clk_id, uint hz)
+static ulong rk3308_spi_set_clk(struct clk *clk, uint hz)
 {
+	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3308_cru *cru = priv->cru;
 	u32 src_clk_div, con_id;
 
-	src_clk_div = dpll_hz / hz;
+	src_clk_div = priv->dpll_hz / hz;
 	assert(src_clk_div - 1 < 127);
 
-	switch (clk_id) {
+	switch (clk->id) {
 	case SCLK_SPI0:
 		con_id = 30;
 		break;
@@ -410,24 +426,28 @@ static ulong rk3308_spi_set_clk(struct rk3308_cru *cru, ulong clk_id, uint hz)
 		     CLK_SPI_PLL_SEL_DPLL << CLK_SPI_PLL_SEL_SHIFT |
 		     (src_clk_div - 1) << CLK_SPI_DIV_CON_SHIFT);
 
-	return rk3308_spi_get_clk(cru, clk_id);
+	return rk3308_spi_get_clk(clk);
 }
 
-static ulong rk3308_pwm_get_clk(struct rk3308_cru *cru)
+static ulong rk3308_pwm_get_clk(struct clk *clk)
 {
+	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3308_cru *cru = priv->cru;
 	u32 div, con;
 
 	con = readl(&cru->clksel_con[29]);
 	div = con >> CLK_PWM_DIV_CON_SHIFT & CLK_PWM_DIV_CON_MASK;
 
-	return DIV_TO_RATE(dpll_hz, div);
+	return DIV_TO_RATE(priv->dpll_hz, div);
 }
 
-static ulong rk3308_pwm_set_clk(struct rk3308_cru *cru, uint hz)
+static ulong rk3308_pwm_set_clk(struct clk *clk, uint hz)
 {
+	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3308_cru *cru = priv->cru;
 	int src_clk_div;
 
-	src_clk_div = dpll_hz / hz;
+	src_clk_div = priv->dpll_hz / hz;
 	assert(src_clk_div - 1 < 127);
 
 	rk_clrsetreg(&cru->clksel_con[29],
@@ -435,11 +455,13 @@ static ulong rk3308_pwm_set_clk(struct rk3308_cru *cru, uint hz)
 		     CLK_PWM_PLL_SEL_DPLL << CLK_PWM_PLL_SEL_SHIFT |
 		     (src_clk_div - 1) << CLK_PWM_DIV_CON_SHIFT);
 
-	return rk3308_pwm_get_clk(cru);
+	return rk3308_pwm_get_clk(clk);
 }
 
-static ulong rk3308_vop_get_clk(struct rk3308_cru *cru)
+static ulong rk3308_vop_get_clk(struct clk *clk)
 {
+	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3308_cru *cru = priv->cru;
 	u32 div, pll_sel, vol_sel, con, parent;
 
 	con = readl(&cru->clksel_con[8]);
@@ -472,21 +494,23 @@ static ulong rk3308_vop_get_clk(struct rk3308_cru *cru)
 	return DIV_TO_RATE(parent, div);
 }
 
-static ulong rk3308_vop_set_clk(struct rk3308_cru *cru, ulong hz)
+static ulong rk3308_vop_set_clk(struct clk *clk, ulong hz)
 {
+	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3308_cru *cru = priv->cru;
 	ulong pll_rate, now, best_rate = 0;
 	u32 i, div, best_div = 0, best_sel = 0;
 
 	for (i = 0; i <= DCLK_VOP_PLL_SEL_VPLL1; i++) {
 		switch (i) {
 		case DCLK_VOP_PLL_SEL_DPLL:
-			pll_rate = dpll_hz;
+			pll_rate = priv->dpll_hz;
 			break;
 		case DCLK_VOP_PLL_SEL_VPLL0:
-			pll_rate = vpll0_hz;
+			pll_rate = priv->vpll0_hz;
 			break;
 		case DCLK_VOP_PLL_SEL_VPLL1:
-			pll_rate = vpll1_hz;
+			pll_rate = priv->vpll1_hz;
 			break;
 		default:
 			printf("do not support this vop pll sel\n");
@@ -522,12 +546,11 @@ static ulong rk3308_vop_set_clk(struct rk3308_cru *cru, ulong hz)
 		return -EINVAL;
 	}
 
-	return rk3308_vop_get_clk(cru);
+	return rk3308_vop_get_clk(clk);
 }
 
 static ulong rk3308_clk_get_rate(struct clk *clk)
 {
-	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
 	ulong rate = 0;
 
 	debug("%s id:%ld\n", __func__, clk->id);
@@ -540,26 +563,26 @@ static ulong rk3308_clk_get_rate(struct clk *clk)
 	case SCLK_SDMMC:
 	case SCLK_EMMC:
 	case SCLK_EMMC_SAMPLE:
-		rate = rk3308_mmc_get_clk(priv->cru, clk->id);
+		rate = rk3308_mmc_get_clk(clk);
 		break;
 	case SCLK_I2C0:
 	case SCLK_I2C1:
 	case SCLK_I2C2:
 	case SCLK_I2C3:
-		rate = rk3308_i2c_get_clk(priv->cru, clk->id);
+		rate = rk3308_i2c_get_clk(clk);
 		break;
 	case SCLK_SARADC:
-		rate = rk3308_saradc_get_clk(priv->cru);
+		rate = rk3308_saradc_get_clk(clk);
 		break;
 	case SCLK_SPI0:
 	case SCLK_SPI1:
-		rate = rk3308_spi_get_clk(priv->cru, clk->id);
+		rate = rk3308_spi_get_clk(clk);
 		break;
 	case SCLK_PWM:
-		rate = rk3308_pwm_get_clk(priv->cru);
+		rate = rk3308_pwm_get_clk(clk);
 		break;
 	case DCLK_VOP:
-		rate = rk3308_vop_get_clk(priv->cru);
+		rate = rk3308_vop_get_clk(clk);
 		break;
 	default:
 		return -ENOENT;
@@ -570,7 +593,6 @@ static ulong rk3308_clk_get_rate(struct clk *clk)
 
 static ulong rk3308_clk_set_rate(struct clk *clk, ulong rate)
 {
-	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
 	ulong ret = 0;
 
 	debug("%s %ld %ld\n", __func__, clk->id, rate);
@@ -581,26 +603,26 @@ static ulong rk3308_clk_set_rate(struct clk *clk, ulong rate)
 	case HCLK_EMMC:
 	case SCLK_SDMMC:
 	case SCLK_EMMC:
-		ret = rk3308_mmc_set_clk(priv->cru, clk->id, rate);
+		ret = rk3308_mmc_set_clk(clk, rate);
 		break;
 	case SCLK_I2C0:
 	case SCLK_I2C1:
 	case SCLK_I2C2:
 	case SCLK_I2C3:
-		ret = rk3308_i2c_set_clk(priv->cru, clk->id, rate);
+		ret = rk3308_i2c_set_clk(clk, rate);
 		break;
 	case SCLK_SARADC:
-		ret = rk3308_saradc_set_clk(priv->cru, rate);
+		ret = rk3308_saradc_set_clk(clk, rate);
 		break;
 	case SCLK_SPI0:
 	case SCLK_SPI1:
-		ret = rk3308_spi_set_clk(priv->cru, clk->id, rate);
+		ret = rk3308_spi_set_clk(clk, rate);
 		break;
 	case SCLK_PWM:
-		ret = rk3308_pwm_set_clk(priv->cru, rate);
+		ret = rk3308_pwm_set_clk(clk, rate);
 		break;
 	case DCLK_VOP:
-		ret = rk3308_vop_set_clk(priv->cru, rate);
+		ret = rk3308_vop_set_clk(clk, rate);
 		break;
 	default:
 		return -ENOENT;
@@ -741,9 +763,7 @@ static struct clk_ops rk3308_clk_ops = {
 
 static int rk3308_clk_probe(struct udevice *dev)
 {
-	struct rk3308_clk_priv *priv = dev_get_priv(dev);
-
-	rkclk_init(priv->cru);
+	rkclk_init(dev);
 
 	return 0;
 }

commit df8f8a42aad07a4e0ce72cceba3bc5e6966bd542
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Wed Mar 21 17:42:14 2018 +0800

    clk: rockchip: px30: Add support to set rate for bus and peri clks
    
    Change-Id: Iaef91432628395e9f955d2d08455a53e6034c669
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 64446d3eb2..17effb0239 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -233,8 +233,6 @@ static int pll_para_config(u32 freq_hz, struct pll_div *div)
 static void rkclk_init(struct px30_cru *cru)
 {
 	u32 aclk_div;
-	u32 hclk_div;
-	u32 pclk_div;
 
 	/* init pll */
 	rkclk_set_pll(cru, APLL, apll_cfgs[APLL_816_MHZ]);
@@ -252,38 +250,6 @@ static void rkclk_init(struct px30_cru *cru)
 		     aclk_div << CORE_ACLK_DIV_SHIFT |
 		     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
 		     0 << CORE_DIV_CON_SHIFT);
-
-	/*
-	 * select gpll as pd_bus bus clock source and
-	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
-	 */
-	aclk_div = GPLL_HZ / BUS_ACLK_HZ - 1;
-	hclk_div = GPLL_HZ / BUS_HCLK_HZ - 1;
-	pclk_div = BUS_ACLK_HZ / BUS_PCLK_HZ - 1;
-
-	rk_clrsetreg(&cru->clksel_con[23],
-		     BUS_PLL_SEL_MASK | BUS_ACLK_DIV_MASK,
-		     BUS_PLL_SEL_GPLL << BUS_PLL_SEL_SHIFT |
-		     aclk_div << BUS_ACLK_DIV_SHIFT);
-
-	rk_clrsetreg(&cru->clksel_con[24],
-		     BUS_PCLK_DIV_MASK | BUS_HCLK_DIV_MASK,
-		     pclk_div << BUS_PCLK_DIV_SHIFT |
-		     hclk_div << BUS_HCLK_DIV_SHIFT);
-
-	/*
-	 * select gpll as pd_peri bus clock source and
-	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
-	 */
-	aclk_div = GPLL_HZ / PERI_ACLK_HZ - 1;
-	hclk_div = GPLL_HZ / PERI_HCLK_HZ - 1;
-
-	rk_clrsetreg(&cru->clksel_con[14],
-		     PERI_PLL_SEL_MASK |
-		     PERI_HCLK_DIV_MASK | PERI_ACLK_DIV_MASK,
-		     PERI_PLL_GPLL << PERI_PLL_SEL_SHIFT |
-		     hclk_div << PERI_HCLK_DIV_SHIFT |
-		     aclk_div << PERI_ACLK_DIV_SHIFT);
 }
 
 static ulong px30_i2c_get_clk(struct px30_cru *cru, ulong clk_id)
@@ -617,6 +583,127 @@ static ulong px30_vop_set_clk(struct px30_cru *cru, ulong clk_id, uint hz)
 	return hz;
 }
 
+static ulong px30_bus_get_clk(struct px30_cru *cru, ulong clk_id)
+{
+	u32 div, con, parent;
+
+	switch (clk_id) {
+	case ACLK_BUS_PRE:
+		con = readl(&cru->clksel_con[23]);
+		div = (con & BUS_ACLK_DIV_MASK) >> BUS_ACLK_DIV_SHIFT;
+		parent = GPLL_HZ;
+		break;
+	case HCLK_BUS_PRE:
+		con = readl(&cru->clksel_con[24]);
+		div = (con & BUS_HCLK_DIV_MASK) >> BUS_HCLK_DIV_SHIFT;
+		parent = GPLL_HZ;
+		break;
+	case PCLK_BUS_PRE:
+		parent = px30_bus_get_clk(cru, ACLK_BUS_PRE);
+		con = readl(&cru->clksel_con[24]);
+		div = (con & BUS_PCLK_DIV_MASK) >> BUS_PCLK_DIV_SHIFT;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong px30_bus_set_clk(struct px30_cru *cru, ulong clk_id, ulong hz)
+{
+	int src_clk_div;
+
+	/*
+	 * select gpll as pd_bus bus clock source and
+	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
+	 */
+	switch (clk_id) {
+	case ACLK_BUS_PRE:
+		src_clk_div = GPLL_HZ / hz;
+		assert(src_clk_div - 1 < 31);
+		rk_clrsetreg(&cru->clksel_con[23],
+			     BUS_PLL_SEL_MASK | BUS_ACLK_DIV_MASK,
+			     BUS_PLL_SEL_GPLL << BUS_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << BUS_ACLK_DIV_SHIFT);
+		break;
+	case HCLK_BUS_PRE:
+		src_clk_div = GPLL_HZ / hz;
+		assert(src_clk_div - 1 < 31);
+		rk_clrsetreg(&cru->clksel_con[24],
+			     BUS_PLL_SEL_MASK | BUS_HCLK_DIV_MASK,
+			     BUS_PLL_SEL_GPLL << BUS_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << BUS_HCLK_DIV_SHIFT);
+		break;
+	case PCLK_BUS_PRE:
+		src_clk_div = px30_bus_get_clk(cru, ACLK_BUS_PRE) / hz;
+		assert(src_clk_div - 1 < 3);
+		rk_clrsetreg(&cru->clksel_con[24],
+			     BUS_PCLK_DIV_MASK,
+			     (src_clk_div - 1) << BUS_PCLK_DIV_SHIFT);
+		break;
+	default:
+		printf("do not support this bus freq\n");
+		return -EINVAL;
+	}
+
+	return px30_bus_get_clk(cru, clk_id);
+}
+
+static ulong px30_peri_get_clk(struct px30_cru *cru, ulong clk_id)
+{
+	u32 div, con, parent;
+
+	switch (clk_id) {
+	case ACLK_PERI_PRE:
+		con = readl(&cru->clksel_con[14]);
+		div = (con & PERI_ACLK_DIV_MASK) >> PERI_ACLK_DIV_SHIFT;
+		parent = GPLL_HZ;
+		break;
+	case HCLK_PERI_PRE:
+		con = readl(&cru->clksel_con[14]);
+		div = (con & PERI_HCLK_DIV_MASK) >> PERI_HCLK_DIV_SHIFT;
+		parent = GPLL_HZ;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong px30_peri_set_clk(struct px30_cru *cru, ulong clk_id, ulong hz)
+{
+	int src_clk_div;
+
+	src_clk_div = GPLL_HZ / hz;
+	assert(src_clk_div - 1 < 31);
+
+	/*
+	 * select gpll as pd_peri bus clock source and
+	 * set up dependent divisors for HCLK and ACLK clocks.
+	 */
+	switch (clk_id) {
+	case ACLK_PERI_PRE:
+		rk_clrsetreg(&cru->clksel_con[14],
+			     PERI_PLL_SEL_MASK | PERI_ACLK_DIV_MASK,
+			     PERI_PLL_GPLL << PERI_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << PERI_ACLK_DIV_SHIFT);
+		break;
+	case HCLK_PERI_PRE:
+		rk_clrsetreg(&cru->clksel_con[14],
+			     PERI_PLL_SEL_MASK | PERI_HCLK_DIV_MASK,
+			     PERI_PLL_GPLL << PERI_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << PERI_HCLK_DIV_SHIFT);
+		break;
+	default:
+		printf("do not support this peri freq\n");
+		return -EINVAL;
+	}
+
+	return px30_peri_get_clk(cru, clk_id);
+}
+
 static ulong px30_clk_get_rate(struct clk *clk)
 {
 	struct px30_clk_priv *priv = dev_get_priv(clk->dev);
@@ -653,6 +740,15 @@ static ulong px30_clk_get_rate(struct clk *clk)
 	case DCLK_VOPB:
 		rate = px30_vop_get_clk(priv->cru, clk->id);
 		break;
+	case ACLK_BUS_PRE:
+	case HCLK_BUS_PRE:
+	case PCLK_BUS_PRE:
+		rate = px30_bus_get_clk(priv->cru, clk->id);
+		break;
+	case ACLK_PERI_PRE:
+	case HCLK_PERI_PRE:
+		rate = px30_peri_get_clk(priv->cru, clk->id);
+		break;
 	default:
 		return -ENOENT;
 	}
@@ -696,6 +792,15 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate)
 	case DCLK_VOPB:
 		ret = px30_vop_set_clk(priv->cru, clk->id, rate);
 		break;
+	case ACLK_BUS_PRE:
+	case HCLK_BUS_PRE:
+	case PCLK_BUS_PRE:
+		ret = px30_bus_set_clk(priv->cru, clk->id, rate);
+		break;
+	case ACLK_PERI_PRE:
+	case HCLK_PERI_PRE:
+		ret = px30_peri_set_clk(priv->cru, clk->id, rate);
+		break;
 	default:
 		return -ENOENT;
 	}

commit 9f8e13d3a0def2dc3298163126cf103d2735551c
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Wed Mar 21 15:00:31 2018 +0800

    rockchip: board: probe clks after load kernel dtb
    
    pmucru isn't referenced on some platforms, so pmucru driver can't
    probe that the "assigned-clocks" is unused.
    
    Change-Id: I390b302c9101f87dcd9264fda39e1f2e0e66d2b3
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index b9e4f6d6bf..3c7a41f14f 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -164,6 +164,11 @@ int board_init(void)
 #ifdef CONFIG_USING_KERNEL_DTB
 	init_kernel_dtb();
 #endif
+	/*
+	 * pmucru isn't referenced on some platforms, so pmucru driver can't
+	 * probe that the "assigned-clocks" is unused.
+	 */
+	clks_probe();
 #ifdef CONFIG_DM_REGULATOR
 	ret = regulators_enable_boot_on(false);
 	if (ret)
diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index 46c690ee79..4b1a177dcc 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -11,6 +11,7 @@
 #include <clk.h>
 #include <clk-uclass.h>
 #include <dm.h>
+#include <dm/device-internal.h>
 #include <dm/read.h>
 #include <dt-structs.h>
 #include <errno.h>
@@ -368,6 +369,25 @@ int clk_disable(struct clk *clk)
 	return ops->disable(clk);
 }
 
+int clks_probe(void)
+{
+	struct udevice *dev;
+	struct uclass *uc;
+	int ret;
+
+	ret = uclass_get(UCLASS_CLK, &uc);
+	if (ret)
+		return ret;
+
+	uclass_foreach_dev(dev, uc) {
+		ret = device_probe(dev);
+		if (ret)
+			printf("%s - probe failed: %d\n", dev->name, ret);
+	}
+
+	return 0;
+}
+
 UCLASS_DRIVER(clk) = {
 	.id		= UCLASS_CLK,
 	.name		= "clk",
diff --git a/include/clk.h b/include/clk.h
index f0598d8f2e..44ca263bc1 100644
--- a/include/clk.h
+++ b/include/clk.h
@@ -245,4 +245,6 @@ int clk_disable(struct clk *clk);
 
 int soc_clk_dump(void);
 
+int clks_probe(void);
+
 #endif

commit 2b1aad10d29d2ca577fd61026505e09ebb05e300
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Wed May 23 20:10:36 2018 +0800

    drivers: rknand: fix rk_ftl_arm_v7 nandc drivers error
    
    1. nandc version change
    2. nandc drivers dcache flush strategy
    
    Change-Id: Ic9d325da6404da3b3c2f6445c315d0d8cf45d0be
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rknand/rk_ftl_arm_v7.S b/drivers/rknand/rk_ftl_arm_v7.S
index 284102b3f5..0c63064f76 100644
--- a/drivers/rknand/rk_ftl_arm_v7.S
+++ b/drivers/rknand/rk_ftl_arm_v7.S
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016-2017, Fuzhou Rockchip Electronics Co., Ltd
+ * Copyright (c) 2016-2018, Fuzhou Rockchip Electronics Co., Ltd
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -17,21 +17,31 @@
 	.eabi_attribute 30, 4
 	.eabi_attribute 34, 0
 	.eabi_attribute 18, 2
-	.file	"rk_ftl_arm_v7.S"
-	.section	.text.ftl_set_blk_mode.part.9,"ax",%progbits
+	.file	"rk_ftl_arm_v7.c"
+	.text
+.Ltext0:
+	.cfi_sections	.debug_frame
+	.section	.text.ftl_set_blk_mode.part.10,"ax",%progbits
 	.align	1
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_set_blk_mode.part.9, %function
-ftl_set_blk_mode.part.9:
+	.type	ftl_set_blk_mode.part.10, %function
+ftl_set_blk_mode.part.10:
+.LFB507:
+	.file 1 "drivers/rknand/rkftl/FtlSysBlk.c"
+	.loc 1 1501 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL0:
+	.loc 1 1504 0
 	ldr	r3, .L2
 	lsrs	r1, r0, #5
 	and	r0, r0, #31
+.LVL1:
 	ldr	r2, [r3]
 	movs	r3, #1
 	lsl	r0, r3, r0
@@ -43,7 +53,9 @@ ftl_set_blk_mode.part.9:
 	.align	2
 .L2:
 	.word	.LANCHOR0
-	.size	ftl_set_blk_mode.part.9, .-ftl_set_blk_mode.part.9
+	.cfi_endproc
+.LFE507:
+	.size	ftl_set_blk_mode.part.10, .-ftl_set_blk_mode.part.10
 	.section	.text.FlashMemCmp8,"ax",%progbits
 	.align	1
 	.global	FlashMemCmp8
@@ -53,35 +65,61 @@ ftl_set_blk_mode.part.9:
 	.fpu softvfp
 	.type	FlashMemCmp8, %function
 FlashMemCmp8:
+.LFB203:
+	.file 2 "drivers/rknand/rkftl/flash.c"
+	.loc 2 205 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL2:
+	.loc 2 208 0
 	ldr	r3, .L12
+	.loc 2 205 0
 	push	{r4, r5, lr}
+	.cfi_def_cfa_offset 12
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 2 208 0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cbz	r3, .L7
+	.loc 2 209 0
 	ldrb	r4, [r0, #1]	@ zero_extendqisi2
 	ldrb	r3, [r1, #1]	@ zero_extendqisi2
 	cmp	r4, r3
 	beq	.L11
 	movs	r3, #0
 .L7:
+.LVL3:
+	.loc 2 212 0 discriminator 1
 	cmp	r3, r2
 	bne	.L9
+.LVL4:
 .L11:
+	.loc 2 210 0
 	movs	r0, #0
+.LVL5:
+	.loc 2 217 0
 	pop	{r4, r5, pc}
+.LVL6:
 .L9:
+	.loc 2 213 0
 	ldrb	r5, [r0, r3]	@ zero_extendqisi2
 	ldrb	r4, [r1, r3]	@ zero_extendqisi2
 	adds	r3, r3, #1
+.LVL7:
 	cmp	r5, r4
 	beq	.L7
+	.loc 2 214 0
 	mov	r0, r3
+.LVL8:
 	pop	{r4, r5, pc}
 .L13:
 	.align	2
 .L12:
 	.word	.LANCHOR1
+	.cfi_endproc
+.LFE203:
 	.size	FlashMemCmp8, .-FlashMemCmp8
 	.section	.text.FlashRsvdBlkChk,"ax",%progbits
 	.align	1
@@ -92,9 +130,14 @@ FlashMemCmp8:
 	.fpu softvfp
 	.type	FlashRsvdBlkChk, %function
 FlashRsvdBlkChk:
+.LFB204:
+	.loc 2 239 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL9:
+	.loc 2 240 0
 	ldr	r3, .L17
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	ldr	r3, .L17+4
@@ -102,18 +145,25 @@ FlashRsvdBlkChk:
 	muls	r3, r2, r3
 	cmp	r3, r1
 	bls	.L16
+	.loc 2 240 0 is_stmt 0 discriminator 1
 	adds	r0, r0, #0
+.LVL10:
 	it	ne
 	movne	r0, #1
 	bx	lr
+.LVL11:
 .L16:
 	movs	r0, #1
+.LVL12:
+	.loc 2 244 0 is_stmt 1
 	bx	lr
 .L18:
 	.align	2
 .L17:
 	.word	.LANCHOR2
 	.word	.LANCHOR3
+	.cfi_endproc
+.LFE204:
 	.size	FlashRsvdBlkChk, .-FlashRsvdBlkChk
 	.section	.text.FlashGetRandomizer,"ax",%progbits
 	.align	1
@@ -124,26 +174,46 @@ FlashRsvdBlkChk:
 	.fpu softvfp
 	.type	FlashGetRandomizer, %function
 FlashGetRandomizer:
+.LFB205:
+	.loc 2 247 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL13:
+	.loc 2 250 0
 	ldr	r3, .L27
 	and	r2, r1, #127
+	.loc 2 247 0
 	push	{r4, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 4, -8
+	.cfi_offset 14, -4
+	.loc 2 250 0
 	ldrh	r4, [r3, r2, lsl #1]
+.LVL14:
+	.loc 2 251 0
 	ldr	r3, .L27+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cbz	r3, .L19
+	.loc 2 251 0 is_stmt 0 discriminator 1
 	bl	FlashRsvdBlkChk
+.LVL15:
 	cbz	r0, .L19
+	.loc 2 252 0 is_stmt 1
 	orr	r4, r4, #-1073741824
+.LVL16:
 .L19:
+	.loc 2 254 0
 	mov	r0, r4
 	pop	{r4, pc}
+.LVL17:
 .L28:
 	.align	2
 .L27:
 	.word	.LANCHOR4
 	.word	.LANCHOR5
+	.cfi_endproc
+.LFE205:
 	.size	FlashGetRandomizer, .-FlashGetRandomizer
 	.section	.text.FlashSetRandomizer,"ax",%progbits
 	.align	1
@@ -154,30 +224,60 @@ FlashGetRandomizer:
 	.fpu softvfp
 	.type	FlashSetRandomizer, %function
 FlashSetRandomizer:
+.LFB206:
+	.loc 2 257 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL18:
 	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 2 260 0
 	and	r2, r1, #127
 	ldr	r3, .L37
+	.loc 2 257 0
 	mov	r5, r0
+	.loc 2 260 0
 	ldrh	r4, [r3, r2, lsl #1]
+.LVL19:
+	.loc 2 261 0
 	ldr	r3, .L37+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cbz	r3, .L30
+	.loc 2 261 0 is_stmt 0 discriminator 1
 	bl	FlashRsvdBlkChk
+.LVL20:
 	cbz	r0, .L30
+	.loc 2 262 0 is_stmt 1
 	orr	r4, r4, #-1073741824
+.LVL21:
 .L30:
+.LBB134:
+.LBB135:
+	.file 3 "drivers/rknand/rkftl/nandc.c"
+	.loc 3 343 0
 	ldr	r3, .L37+8
 	ldr	r3, [r3, r5, lsl #3]
+.LVL22:
+	.loc 3 344 0
 	str	r4, [r3, #336]
+.LVL23:
 	pop	{r3, r4, r5, pc}
+.LVL24:
 .L38:
 	.align	2
 .L37:
 	.word	.LANCHOR4
 	.word	.LANCHOR5
 	.word	.LANCHOR6
+.LBE135:
+.LBE134:
+	.cfi_endproc
+.LFE206:
 	.size	FlashSetRandomizer, .-FlashSetRandomizer
 	.section	.text.FlashReadCmd,"ax",%progbits
 	.align	1
@@ -188,33 +288,64 @@ FlashSetRandomizer:
 	.fpu softvfp
 	.type	FlashReadCmd, %function
 FlashReadCmd:
+.LFB211:
+	.loc 2 322 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL25:
 	push	{r4, r5}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 4, -8
+	.cfi_offset 5, -4
+	.loc 2 330 0
 	lsrs	r2, r1, #16
+.LBB136:
+.LBB137:
+	.loc 3 123 0
 	ldr	r4, .L40
 	ldr	r3, [r4, r0, lsl #3]
+.LVL26:
+	.loc 3 124 0
 	add	r4, r4, r0, lsl #3
 	ldrb	r4, [r4, #4]	@ zero_extendqisi2
+.LVL27:
+.LBE137:
+.LBE136:
+	.loc 2 325 0
 	add	r3, r3, r4, lsl #8
 	movs	r4, #0
 	str	r4, [r3, #2056]
+	.loc 2 326 0
 	str	r4, [r3, #2052]
+	.loc 2 327 0
 	str	r4, [r3, #2052]
+	.loc 2 328 0
 	uxtb	r4, r1
 	str	r4, [r3, #2052]
+	.loc 2 329 0
 	lsrs	r4, r1, #8
 	str	r4, [r3, #2052]
+	.loc 2 330 0
 	str	r2, [r3, #2052]
+	.loc 2 331 0
 	movs	r2, #48
 	str	r2, [r3, #2056]
+	.loc 2 333 0
 	pop	{r4, r5}
+	.cfi_restore 5
+	.cfi_restore 4
+	.cfi_def_cfa_offset 0
+	.loc 2 332 0
 	b	FlashSetRandomizer
+.LVL28:
 .L41:
 	.align	2
 .L40:
 	.word	.LANCHOR6
+	.cfi_endproc
+.LFE211:
 	.size	FlashReadCmd, .-FlashReadCmd
 	.section	.text.FlashReadDpDataOutCmd,"ax",%progbits
 	.align	1
@@ -225,47 +356,98 @@ FlashReadCmd:
 	.fpu softvfp
 	.type	FlashReadDpDataOutCmd, %function
 FlashReadDpDataOutCmd:
+.LFB212:
+	.loc 2 336 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL29:
+.LBB138:
+.LBB139:
+	.loc 3 123 0
 	ldr	r2, .L46
+.LBE139:
+.LBE138:
+	.loc 2 336 0
 	push	{r4, r5, r6}
+	.cfi_def_cfa_offset 12
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 6, -4
 	uxtb	r6, r1
+	.loc 2 340 0
 	ldr	r4, .L46+4
 	lsrs	r5, r1, #8
+.LBB141:
+.LBB140:
+	.loc 3 123 0
 	ldr	r3, [r2, r0, lsl #3]
+.LVL30:
+	.loc 3 124 0
 	add	r2, r2, r0, lsl #3
+.LBE140:
+.LBE141:
+	.loc 2 340 0
 	ldrb	r4, [r4, #16]	@ zero_extendqisi2
 	ldrb	r2, [r2, #4]	@ zero_extendqisi2
+.LVL31:
 	cmp	r4, #1
 	lsr	r4, r1, #16
 	lsl	r2, r2, #8
+	.loc 2 341 0
 	add	r3, r3, r2
+	.loc 2 340 0
 	bne	.L43
+	.loc 2 341 0
 	movs	r2, #6
 	str	r2, [r3, #2056]
+	.loc 2 342 0
 	movs	r2, #0
 	str	r2, [r3, #2052]
+	.loc 2 343 0
 	str	r2, [r3, #2052]
+	.loc 2 344 0
 	str	r6, [r3, #2052]
+	.loc 2 345 0
 	str	r5, [r3, #2052]
+	.loc 2 346 0
 	str	r4, [r3, #2052]
 .L45:
+	.loc 2 358 0
 	movs	r2, #224
 	str	r2, [r3, #2056]
+	.loc 2 361 0
 	pop	{r4, r5, r6}
+	.cfi_remember_state
+	.cfi_restore 6
+	.cfi_restore 5
+	.cfi_restore 4
+	.cfi_def_cfa_offset 0
+	.loc 2 360 0
 	b	FlashSetRandomizer
+.LVL32:
 .L43:
+	.cfi_restore_state
+	.loc 2 349 0
 	movs	r2, #0
 	str	r2, [r3, #2056]
+	.loc 2 350 0
 	str	r2, [r3, #2052]
+	.loc 2 351 0
 	str	r2, [r3, #2052]
+	.loc 2 352 0
 	str	r6, [r3, #2052]
+	.loc 2 353 0
 	str	r5, [r3, #2052]
+	.loc 2 354 0
 	str	r4, [r3, #2052]
+	.loc 2 355 0
 	movs	r4, #5
 	str	r4, [r3, #2056]
+	.loc 2 356 0
 	str	r2, [r3, #2052]
+	.loc 2 357 0
 	str	r2, [r3, #2052]
 	b	.L45
 .L47:
@@ -273,6 +455,8 @@ FlashReadDpDataOutCmd:
 .L46:
 	.word	.LANCHOR6
 	.word	.LANCHOR7
+	.cfi_endproc
+.LFE212:
 	.size	FlashReadDpDataOutCmd, .-FlashReadDpDataOutCmd
 	.section	.text.flash_enter_slc_mode,"ax",%progbits
 	.align	1
@@ -283,19 +467,38 @@ FlashReadDpDataOutCmd:
 	.fpu softvfp
 	.type	flash_enter_slc_mode, %function
 flash_enter_slc_mode:
+.LFB214:
+	.loc 2 399 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL33:
+	.loc 2 401 0
 	ldr	r3, .L53
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cbz	r3, .L48
+.LVL34:
+.LBB146:
+.LBB147:
+.LBB148:
+.LBB149:
+	.loc 3 123 0
 	ldr	r3, .L53+4
 	ldr	r2, [r3, r0, lsl #3]
+.LVL35:
+	.loc 3 124 0
 	add	r3, r3, r0, lsl #3
+	.loc 3 126 0
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+.LVL36:
+.LBE149:
+.LBE148:
+	.loc 2 403 0
 	add	r3, r2, r3, lsl #8
 	movs	r2, #218
 	str	r2, [r3, #2056]
+.LVL37:
 .L48:
 	bx	lr
 .L54:
@@ -303,6 +506,10 @@ flash_enter_slc_mode:
 .L53:
 	.word	.LANCHOR8
 	.word	.LANCHOR6
+.LBE147:
+.LBE146:
+	.cfi_endproc
+.LFE214:
 	.size	flash_enter_slc_mode, .-flash_enter_slc_mode
 	.section	.text.flash_exit_slc_mode,"ax",%progbits
 	.align	1
@@ -313,19 +520,38 @@ flash_enter_slc_mode:
 	.fpu softvfp
 	.type	flash_exit_slc_mode, %function
 flash_exit_slc_mode:
+.LFB215:
+	.loc 2 408 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL38:
+	.loc 2 410 0
 	ldr	r3, .L60
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cbz	r3, .L55
+.LVL39:
+.LBB154:
+.LBB155:
+.LBB156:
+.LBB157:
+	.loc 3 123 0
 	ldr	r3, .L60+4
 	ldr	r2, [r3, r0, lsl #3]
+.LVL40:
+	.loc 3 124 0
 	add	r3, r3, r0, lsl #3
+	.loc 3 126 0
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+.LVL41:
+.LBE157:
+.LBE156:
+	.loc 2 412 0
 	add	r3, r2, r3, lsl #8
 	movs	r2, #223
 	str	r2, [r3, #2056]
+.LVL42:
 .L55:
 	bx	lr
 .L61:
@@ -333,6 +559,10 @@ flash_exit_slc_mode:
 .L60:
 	.word	.LANCHOR8
 	.word	.LANCHOR6
+.LBE155:
+.LBE154:
+	.cfi_endproc
+.LFE215:
 	.size	flash_exit_slc_mode, .-flash_exit_slc_mode
 	.section	.text.FlashProgFirstCmd,"ax",%progbits
 	.align	1
@@ -343,32 +573,62 @@ flash_exit_slc_mode:
 	.fpu softvfp
 	.type	FlashProgFirstCmd, %function
 FlashProgFirstCmd:
+.LFB216:
+	.loc 2 417 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL43:
 	push	{r4, r5}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 4, -8
+	.cfi_offset 5, -4
+	.loc 2 426 0
 	lsrs	r2, r1, #16
+.LBB158:
+.LBB159:
+	.loc 3 123 0
 	ldr	r4, .L63
 	ldr	r3, [r4, r0, lsl #3]
+.LVL44:
+	.loc 3 124 0
 	add	r4, r4, r0, lsl #3
 	ldrb	r4, [r4, #4]	@ zero_extendqisi2
+.LVL45:
+.LBE159:
+.LBE158:
+	.loc 2 421 0
 	add	r3, r3, r4, lsl #8
 	movs	r4, #128
 	str	r4, [r3, #2056]
+	.loc 2 422 0
 	movs	r4, #0
 	str	r4, [r3, #2052]
+	.loc 2 423 0
 	str	r4, [r3, #2052]
+	.loc 2 424 0
 	uxtb	r4, r1
 	str	r4, [r3, #2052]
+	.loc 2 425 0
 	lsrs	r4, r1, #8
 	str	r4, [r3, #2052]
+	.loc 2 426 0
 	str	r2, [r3, #2052]
+	.loc 2 428 0
 	pop	{r4, r5}
+	.cfi_restore 5
+	.cfi_restore 4
+	.cfi_def_cfa_offset 0
+	.loc 2 427 0
 	b	FlashSetRandomizer
+.LVL46:
 .L64:
 	.align	2
 .L63:
 	.word	.LANCHOR6
+	.cfi_endproc
+.LFE216:
 	.size	FlashProgFirstCmd, .-FlashProgFirstCmd
 	.section	.text.FlashEraseCmd,"ax",%progbits
 	.align	1
@@ -379,38 +639,70 @@ FlashProgFirstCmd:
 	.fpu softvfp
 	.type	FlashEraseCmd, %function
 FlashEraseCmd:
+.LFB217:
+	.loc 2 431 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL47:
 	push	{r4, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 4, -8
+	.cfi_offset 14, -4
+.LBB160:
+.LBB161:
+	.loc 3 123 0
 	ldr	r4, .L70
 	ldr	r3, [r4, r0, lsl #3]
+.LVL48:
+	.loc 3 124 0
 	add	r4, r4, r0, lsl #3
 	ldrb	r0, [r4, #4]	@ zero_extendqisi2
+.LVL49:
 	lsls	r0, r0, #8
+.LBE161:
+.LBE160:
+	.loc 2 435 0
 	cbz	r2, .L66
+	.loc 2 436 0
 	adds	r2, r3, r0
+.LVL50:
 	movs	r4, #96
 	str	r4, [r2, #2056]
+	.loc 2 437 0
 	uxtb	r4, r1
 	str	r4, [r2, #2052]
+	.loc 2 438 0
 	lsrs	r4, r1, #8
 	str	r4, [r2, #2052]
+	.loc 2 439 0
 	lsrs	r4, r1, #16
 	str	r4, [r2, #2052]
+	.loc 2 440 0
 	ldr	r2, .L70+4
 	ldr	r2, [r2]
 	add	r1, r1, r2
+.LVL51:
 .L66:
+	.loc 2 442 0
 	add	r3, r3, r0
 	movs	r2, #96
 	str	r2, [r3, #2056]
+	.loc 2 443 0
 	uxtb	r2, r1
 	str	r2, [r3, #2052]
+	.loc 2 444 0
 	lsrs	r2, r1, #8
+	.loc 2 445 0
 	lsrs	r1, r1, #16
+.LVL52:
+	.loc 2 444 0
 	str	r2, [r3, #2052]
+	.loc 2 446 0
 	movs	r2, #208
+	.loc 2 445 0
 	str	r1, [r3, #2052]
+	.loc 2 446 0
 	str	r2, [r3, #2056]
 	pop	{r4, pc}
 .L71:
@@ -418,6 +710,8 @@ FlashEraseCmd:
 .L70:
 	.word	.LANCHOR6
 	.word	.LANCHOR3
+	.cfi_endproc
+.LFE217:
 	.size	FlashEraseCmd, .-FlashEraseCmd
 	.section	.text.FlashProgDpSecondCmd,"ax",%progbits
 	.align	1
@@ -428,34 +722,64 @@ FlashEraseCmd:
 	.fpu softvfp
 	.type	FlashProgDpSecondCmd, %function
 FlashProgDpSecondCmd:
+.LFB218:
+	.loc 2 450 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL53:
 	push	{r4, r5}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 4, -8
+	.cfi_offset 5, -4
+	.loc 2 459 0
 	lsrs	r2, r1, #16
+.LBB162:
+.LBB163:
+	.loc 3 123 0
 	ldr	r4, .L73
 	ldr	r3, [r4, r0, lsl #3]
+.LVL54:
+	.loc 3 124 0
 	add	r4, r4, r0, lsl #3
 	ldrb	r5, [r4, #4]	@ zero_extendqisi2
+.LVL55:
+.LBE163:
+.LBE162:
+	.loc 2 454 0
 	ldr	r4, .L73+4
 	ldrb	r4, [r4, #11]	@ zero_extendqisi2
 	add	r3, r3, r5, lsl #8
 	str	r4, [r3, #2056]
+	.loc 2 455 0
 	movs	r4, #0
 	str	r4, [r3, #2052]
+	.loc 2 456 0
 	str	r4, [r3, #2052]
+	.loc 2 457 0
 	uxtb	r4, r1
 	str	r4, [r3, #2052]
+	.loc 2 458 0
 	lsrs	r4, r1, #8
 	str	r4, [r3, #2052]
+	.loc 2 459 0
 	str	r2, [r3, #2052]
+	.loc 2 461 0
 	pop	{r4, r5}
+	.cfi_restore 5
+	.cfi_restore 4
+	.cfi_def_cfa_offset 0
+	.loc 2 460 0
 	b	FlashSetRandomizer
+.LVL56:
 .L74:
 	.align	2
 .L73:
 	.word	.LANCHOR6
 	.word	.LANCHOR7
+	.cfi_endproc
+.LFE218:
 	.size	FlashProgDpSecondCmd, .-FlashProgDpSecondCmd
 	.section	.text.FlashProgSecondCmd,"ax",%progbits
 	.align	1
@@ -466,13 +790,27 @@ FlashProgDpSecondCmd:
 	.fpu softvfp
 	.type	FlashProgSecondCmd, %function
 FlashProgSecondCmd:
+.LFB219:
+	.loc 2 464 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL57:
+.LBB164:
+.LBB165:
+	.loc 3 123 0
 	ldr	r3, .L76
 	ldr	r2, [r3, r0, lsl #3]
+.LVL58:
+	.loc 3 124 0
 	add	r3, r3, r0, lsl #3
+	.loc 3 126 0
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+.LVL59:
+.LBE165:
+.LBE164:
+	.loc 2 468 0
 	add	r3, r2, r3, lsl #8
 	movs	r2, #16
 	str	r2, [r3, #2056]
@@ -481,6 +819,8 @@ FlashProgSecondCmd:
 	.align	2
 .L76:
 	.word	.LANCHOR6
+	.cfi_endproc
+.LFE219:
 	.size	FlashProgSecondCmd, .-FlashProgSecondCmd
 	.section	.text.FlashProgDpFirstCmd,"ax",%progbits
 	.align	1
@@ -491,15 +831,41 @@ FlashProgSecondCmd:
 	.fpu softvfp
 	.type	FlashProgDpFirstCmd, %function
 FlashProgDpFirstCmd:
+.LFB220:
+	.loc 2 472 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL60:
+.LBB166:
+.LBB167:
+	.loc 3 123 0
 	ldr	r3, .L79
+.LBE167:
+.LBE166:
+	.loc 2 476 0
 	ldr	r1, .L79+4
+.LVL61:
+.LBB170:
+.LBB168:
+	.loc 3 123 0
 	ldr	r2, [r3, r0, lsl #3]
+.LVL62:
+	.loc 3 124 0
 	add	r3, r3, r0, lsl #3
+.LBE168:
+.LBE170:
+	.loc 2 476 0
 	ldrb	r1, [r1, #10]	@ zero_extendqisi2
+.LBB171:
+.LBB169:
+	.loc 3 126 0
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+.LVL63:
+.LBE169:
+.LBE171:
+	.loc 2 476 0
 	add	r3, r2, r3, lsl #8
 	str	r1, [r3, #2056]
 	bx	lr
@@ -508,6 +874,8 @@ FlashProgDpFirstCmd:
 .L79:
 	.word	.LANCHOR6
 	.word	.LANCHOR7
+	.cfi_endproc
+.LFE220:
 	.size	FlashProgDpFirstCmd, .-FlashProgDpFirstCmd
 	.section	.text.FlashReadStatus,"ax",%progbits
 	.align	1
@@ -518,26 +886,69 @@ FlashProgDpFirstCmd:
 	.fpu softvfp
 	.type	FlashReadStatus, %function
 FlashReadStatus:
+.LFB221:
+	.loc 2 480 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL64:
 	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 2 484 0
 	movs	r2, #112
+.LBB172:
+.LBB173:
+	.loc 3 123 0
 	ldr	r3, .L82
 	ldr	r5, [r3, r0, lsl #3]
+.LVL65:
+	.loc 3 124 0
 	add	r3, r3, r0, lsl #3
+.LBE173:
+.LBE172:
+.LBB175:
+.LBB176:
+	.loc 3 306 0
 	movs	r0, #80
+.LVL66:
+.LBE176:
+.LBE175:
+.LBB178:
+.LBB174:
+	.loc 3 126 0
 	ldrb	r4, [r3, #4]	@ zero_extendqisi2
+.LVL67:
+.LBE174:
+.LBE178:
+	.loc 2 484 0
 	add	r3, r5, r4, lsl #8
+	.loc 2 487 0
 	adds	r4, r4, #8
 	lsls	r4, r4, #8
+	.loc 2 484 0
 	str	r2, [r3, #2056]
+.LVL68:
+.LBB179:
+.LBB177:
+	.loc 3 306 0
 	bl	udelay
+.LVL69:
+.LBE177:
+.LBE179:
+	.loc 2 487 0
 	ldr	r0, [r5, r4]
+	.loc 2 488 0
 	pop	{r3, r4, r5, pc}
 .L83:
 	.align	2
 .L82:
 	.word	.LANCHOR6
+	.cfi_endproc
+.LFE221:
 	.size	FlashReadStatus, .-FlashReadStatus
 	.section	.text.JSHash,"ax",%progbits
 	.align	1
@@ -548,27 +959,47 @@ FlashReadStatus:
 	.fpu softvfp
 	.type	JSHash, %function
 JSHash:
+.LFB229:
+	.loc 2 800 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL70:
+	.loc 2 801 0
 	ldr	r3, .L87
 	add	r1, r1, r0
+.LVL71:
+	.loc 2 800 0
 	push	{r4, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 4, -8
+	.cfi_offset 14, -4
+.LVL72:
 .L85:
+	.loc 2 804 0 discriminator 1
 	cmp	r0, r1
 	bne	.L86
+	.loc 2 807 0
 	mov	r0, r3
+.LVL73:
 	pop	{r4, pc}
+.LVL74:
 .L86:
+	.loc 2 805 0 discriminator 3
 	lsrs	r2, r3, #2
 	ldrb	r4, [r0], #1	@ zero_extendqisi2
+.LVL75:
 	add	r2, r2, r3, lsl #5
 	add	r2, r2, r4
 	eors	r3, r3, r2
+.LVL76:
 	b	.L85
 .L88:
 	.align	2
 .L87:
 	.word	1204201446
+	.cfi_endproc
+.LFE229:
 	.size	JSHash, .-JSHash
 	.section	.text.FlashLoadIdbInfo,"ax",%progbits
 	.align	1
@@ -579,11 +1010,17 @@ JSHash:
 	.fpu softvfp
 	.type	FlashLoadIdbInfo, %function
 FlashLoadIdbInfo:
+.LFB232:
+	.loc 2 925 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+	.loc 2 927 0
 	movs	r0, #0
 	bx	lr
+	.cfi_endproc
+.LFE232:
 	.size	FlashLoadIdbInfo, .-FlashLoadIdbInfo
 	.section	.text.FlashPrintInfo,"ax",%progbits
 	.align	1
@@ -594,10 +1031,14 @@ FlashLoadIdbInfo:
 	.fpu softvfp
 	.type	FlashPrintInfo, %function
 FlashPrintInfo:
+.LFB538:
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	bx	lr
+	.cfi_endproc
+.LFE538:
 	.size	FlashPrintInfo, .-FlashPrintInfo
 	.section	.text.ToshibaSetRRPara,"ax",%progbits
 	.align	1
@@ -608,47 +1049,93 @@ FlashPrintInfo:
 	.fpu softvfp
 	.type	ToshibaSetRRPara, %function
 ToshibaSetRRPara:
+.LFB239:
+	.loc 2 1723 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL77:
+	.loc 2 1723 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 3, -32
+	.cfi_offset 4, -28
+	.cfi_offset 5, -24
+	.cfi_offset 6, -20
+	.cfi_offset 7, -16
+	.cfi_offset 8, -12
+	.cfi_offset 10, -8
+	.cfi_offset 14, -4
 	add	r7, r1, r1, lsl #2
+	.loc 2 1726 0
 	ldr	r10, .L99+12
+	.loc 2 1723 0
 	mov	r5, r0
 	mov	r6, r1
+	.loc 2 1726 0
 	movs	r4, #0
+	.loc 2 1728 0
 	ldr	r8, .L99+16
+.LVL78:
 .L92:
+	.loc 2 1726 0 discriminator 1
 	ldrb	r3, [r10]	@ zero_extendqisi2
 	cmp	r4, r3
 	bcc	.L96
+	.loc 2 1738 0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.LVL79:
 .L96:
+	.loc 2 1727 0
 	movs	r3, #85
+.LBB180:
+.LBB181:
+	.loc 3 306 0
 	movs	r0, #200
+.LBE181:
+.LBE180:
+	.loc 2 1727 0
 	str	r3, [r5, #8]
+	.loc 2 1728 0
 	ldrsb	r3, [r4, r8]
 	str	r3, [r5, #4]
+.LVL80:
+.LBB183:
+.LBB182:
+	.loc 3 306 0
 	bl	udelay
+.LVL81:
+.LBE182:
+.LBE183:
+	.loc 2 1730 0
 	ldr	r3, .L99
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #34
 	bne	.L93
+	.loc 2 1731 0
 	adds	r3, r4, r7
 	add	r3, r3, r8
 .L98:
+	.loc 2 1733 0
 	ldrsb	r3, [r3, #5]
 .L97:
+	.loc 2 1735 0
 	str	r3, [r5]
+	.loc 2 1726 0
 	adds	r4, r4, #1
+.LVL82:
 	b	.L92
 .L93:
+	.loc 2 1732 0
 	cmp	r3, #35
 	bne	.L95
+	.loc 2 1733 0
 	ldr	r3, .L99+4
 	adds	r2, r4, r7
 	add	r3, r3, r2
 	b	.L98
 .L95:
+	.loc 2 1735 0
 	ldr	r3, .L99+8
 	ldrsb	r3, [r3, r6]
 	b	.L97
@@ -660,6 +1147,8 @@ ToshibaSetRRPara:
 	.word	.LANCHOR12
 	.word	.LANCHOR13
 	.word	.LANCHOR9
+	.cfi_endproc
+.LFE239:
 	.size	ToshibaSetRRPara, .-ToshibaSetRRPara
 	.section	.text.SamsungSetRRPara,"ax",%progbits
 	.align	1
@@ -670,38 +1159,82 @@ ToshibaSetRRPara:
 	.fpu softvfp
 	.type	SamsungSetRRPara, %function
 SamsungSetRRPara:
+.LFB241:
+	.loc 2 1807 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL83:
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 3, -32
+	.cfi_offset 4, -28
+	.cfi_offset 5, -24
+	.cfi_offset 6, -20
+	.cfi_offset 7, -16
+	.cfi_offset 8, -12
+	.cfi_offset 10, -8
+	.cfi_offset 14, -4
+	.loc 2 1807 0
 	mov	r6, r0
 	ldr	r7, .L104
+	.loc 2 1810 0
 	movs	r4, #0
+	.loc 2 1811 0
 	mov	r10, #161
+	.loc 2 1810 0
 	ldr	r8, .L104+4
 	add	r1, r7, r1, lsl #2
+.LVL84:
 	adds	r5, r1, #3
+.LVL85:
 .L102:
+	.loc 2 1810 0 is_stmt 0 discriminator 1
 	ldrb	r3, [r8]	@ zero_extendqisi2
 	cmp	r4, r3
 	bcc	.L103
+	.loc 2 1817 0 is_stmt 1
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.LVL86:
 .L103:
+	.loc 2 1812 0 discriminator 3
 	movs	r3, #0
+	.loc 2 1811 0 discriminator 3
 	str	r10, [r6, #8]
+	.loc 2 1812 0 discriminator 3
 	str	r3, [r6]
+.LBB184:
+.LBB185:
+	.loc 3 306 0 discriminator 3
 	mov	r0, #300
+.LBE185:
+.LBE184:
+	.loc 2 1813 0 discriminator 3
 	ldrsb	r3, [r7, r4]
+	.loc 2 1810 0 discriminator 3
 	adds	r4, r4, #1
+.LVL87:
+	.loc 2 1813 0 discriminator 3
 	str	r3, [r6]
+	.loc 2 1814 0 discriminator 3
 	ldrsb	r3, [r5, #1]!
 	str	r3, [r6]
+.LVL88:
+.LBB187:
+.LBB186:
+	.loc 3 306 0 discriminator 3
 	bl	udelay
+.LVL89:
 	b	.L102
 .L105:
 	.align	2
 .L104:
 	.word	.LANCHOR14
 	.word	.LANCHOR13
+.LBE186:
+.LBE187:
+	.cfi_endproc
+.LFE241:
 	.size	SamsungSetRRPara, .-SamsungSetRRPara
 	.global	__aeabi_uidiv
 	.global	__aeabi_uidivmod
@@ -714,59 +1247,114 @@ SamsungSetRRPara:
 	.fpu softvfp
 	.type	LogAddr2PhyAddr, %function
 LogAddr2PhyAddr:
+.LFB254:
+	.loc 2 2669 0
+	.cfi_startproc
 	@ args = 4, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL90:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 2669 0
 	mov	r6, r3
+	.loc 2 2671 0
 	ldr	r3, .L111
+.LVL91:
+	.loc 2 2669 0
 	mov	r8, r1
 	mov	r7, r2
 	mov	r5, r0
+	.loc 2 2671 0
 	ldrh	r4, [r3, #14]
 	ldrh	r3, [r3, #12]
 	smulbb	r4, r4, r3
+	.loc 2 2675 0
 	ldr	r3, .L111+4
 	ldrh	fp, [r3]
+	.loc 2 2671 0
 	uxth	r4, r4
+.LVL92:
+	.loc 2 2677 0
 	ldr	r3, .L111+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #1
+	.loc 2 2680 0
 	ldr	r3, [r0, #4]
+	.loc 2 2678 0
 	it	eq
 	lsleq	r1, fp, #1
+.LVL93:
+	.loc 2 2681 0
 	ubfx	r2, r3, #10, #16
+.LVL94:
+	.loc 2 2678 0
 	it	eq
 	uxtheq	fp, r1
+.LVL95:
+	.loc 2 2682 0
 	mov	r0, r2
+.LVL96:
+	.loc 2 2681 0
 	str	r3, [sp, #4]
+.LVL97:
+	.loc 2 2682 0
 	mov	r1, r4
 	str	r2, [sp]
 	bl	__aeabi_uidiv
+.LVL98:
 	ldr	r2, [sp]
 	uxth	r10, r0
+.LVL99:
 	mov	r1, r4
 	mov	r0, r2
 	bl	__aeabi_uidivmod
+.LVL100:
+	.loc 2 2684 0
 	ldr	r3, [sp, #4]
+	.loc 2 2685 0
 	cmp	r8, #1
 	uxth	r1, r1
+.LVL101:
+	.loc 2 2684 0
 	ubfx	r3, r3, #0, #10
+.LVL102:
+	.loc 2 2685 0
 	bne	.L108
+	.loc 2 2685 0 is_stmt 0 discriminator 1
 	ldr	r2, .L111+12
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cbnz	r2, .L108
+	.loc 2 2686 0 is_stmt 1
 	ldr	r2, .L111+16
 	ldrh	r3, [r2, r3, lsl #1]
+.LVL103:
 .L108:
+	.loc 2 2687 0
 	ldr	r2, .L111+20
 	ldr	r2, [r2, r10, lsl #2]
 	mla	r1, fp, r1, r2
+.LVL104:
 	add	r1, r1, r3
+	.loc 2 2691 0
 	ldrb	r3, [sp, #40]	@ zero_extendqisi2
+.LVL105:
+	.loc 2 2687 0
 	str	r1, [r7]
+	.loc 2 2688 0
 	str	r10, [r6]
+.LVL106:
+	.loc 2 2691 0
 	cmp	r3, #1
 	bls	.L110
+	.loc 2 2692 0
 	ldr	r0, [r5, #4]
 	ldr	r3, [r5, #40]
 	add	r0, r0, #1024
@@ -774,10 +1362,17 @@ LogAddr2PhyAddr:
 	rsbs	r0, r3, #0
 	adcs	r0, r0, r3
 .L109:
+.LVL107:
+	.loc 2 2696 0
 	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+.LVL108:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL109:
 .L110:
+	.cfi_restore_state
 	movs	r0, #0
 	b	.L109
 .L112:
@@ -789,6 +1384,8 @@ LogAddr2PhyAddr:
 	.word	.LANCHOR8
 	.word	.LANCHOR16
 	.word	.LANCHOR17
+	.cfi_endproc
+.LFE254:
 	.size	LogAddr2PhyAddr, .-LogAddr2PhyAddr
 	.section	.text.FlashReadStatusEN,"ax",%progbits
 	.align	1
@@ -799,13 +1396,38 @@ LogAddr2PhyAddr:
 	.fpu softvfp
 	.type	FlashReadStatusEN, %function
 FlashReadStatusEN:
+.LFB255:
+	.loc 2 2699 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL110:
+.LBB188:
+.LBB189:
+	.loc 3 123 0
 	ldr	r3, .L125
+.LBE189:
+.LBE188:
+	.loc 2 2699 0
 	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+.LBB191:
+.LBB190:
+	.loc 3 123 0
 	ldr	r5, [r3, r0, lsl #3]
+.LVL111:
+	.loc 3 124 0
 	add	r3, r3, r0, lsl #3
+	.loc 3 126 0
 	ldrb	r4, [r3, #4]	@ zero_extendqisi2
+.LVL112:
+.LBE190:
+.LBE191:
+	.loc 2 2703 0
 	ldr	r3, .L125+4
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #8]	@ zero_extendqisi2
@@ -814,38 +1436,74 @@ FlashReadStatusEN:
 	add	r4, r4, #8
 	bne	.L114
 	ldr	r0, .L125+8
+.LVL113:
+	.loc 2 2704 0
 	cbnz	r2, .L115
+	.loc 2 2705 0
 	ldrb	r2, [r0, #13]	@ zero_extendqisi2
+.LVL114:
 .L124:
+	.loc 2 2707 0
 	add	r3, r3, r5
 	str	r2, [r3, #2056]
+	.loc 2 2709 0
 	ldrb	r0, [r0, #15]	@ zero_extendqisi2
 	cbz	r0, .L119
+.LBB192:
+	.loc 2 2712 0 discriminator 1
 	add	r6, r5, r4, lsl #8
+.LBE192:
 	movs	r2, #0
 .L118:
+.LVL115:
+.LBB193:
+	.loc 2 2711 0 discriminator 1
 	cmp	r2, r0
 	bcc	.L120
+.LVL116:
 .L119:
+.LBE193:
+	.loc 2 2719 0
 	lsls	r4, r4, #8
+.LBB194:
+.LBB195:
+	.loc 3 306 0
 	movs	r0, #80
 	bl	udelay
+.LVL117:
+.LBE195:
+.LBE194:
+	.loc 2 2719 0
 	ldr	r0, [r5, r4]
+	.loc 2 2720 0
 	uxtb	r0, r0
 	pop	{r4, r5, r6, pc}
+.LVL118:
 .L115:
+	.loc 2 2707 0
 	ldrb	r2, [r0, #14]	@ zero_extendqisi2
+.LVL119:
 	b	.L124
+.LVL120:
 .L120:
+.LBB196:
+	.loc 2 2712 0 discriminator 3
 	lsls	r3, r2, #3
+	.loc 2 2711 0 discriminator 3
 	adds	r2, r2, #1
+.LVL121:
+	.loc 2 2712 0 discriminator 3
 	lsr	r3, r1, r3
 	uxtb	r3, r3
 	str	r3, [r6, #4]
 	b	.L118
+.LVL122:
 .L114:
+.LBE196:
+	.loc 2 2716 0
 	add	r3, r3, r5
 	movs	r2, #112
+.LVL123:
 	str	r2, [r3, #2056]
 	b	.L119
 .L126:
@@ -854,6 +1512,8 @@ FlashReadStatusEN:
 	.word	.LANCHOR6
 	.word	.LANCHOR18
 	.word	.LANCHOR7
+	.cfi_endproc
+.LFE255:
 	.size	FlashReadStatusEN, .-FlashReadStatusEN
 	.section	.text.FlashWaitReadyEN,"ax",%progbits
 	.align	1
@@ -864,23 +1524,43 @@ FlashReadStatusEN:
 	.fpu softvfp
 	.type	FlashWaitReadyEN, %function
 FlashWaitReadyEN:
+.LFB256:
+	.loc 2 2723 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL124:
 	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
 	mov	r4, r0
 	mov	r5, r1
 	mov	r6, r2
+.LVL125:
 .L131:
+	.loc 2 2727 0
 	mov	r2, r6
 	mov	r1, r5
 	mov	r0, r4
 	bl	FlashReadStatusEN
+.LVL126:
+	.loc 2 2728 0
 	cmp	r0, #255
+	.loc 2 2727 0
 	mov	r3, r0
+.LVL127:
+	.loc 2 2728 0
 	beq	.L131
+	.loc 2 2730 0
 	lsls	r3, r3, #25
 	bpl	.L131
+	.loc 2 2734 0
 	pop	{r4, r5, r6, pc}
+	.cfi_endproc
+.LFE256:
 	.size	FlashWaitReadyEN, .-FlashWaitReadyEN
 	.section	.text.NandcReadDontCaseBusyEn,"ax",%progbits
 	.align	1
@@ -891,10 +1571,16 @@ FlashWaitReadyEN:
 	.fpu softvfp
 	.type	NandcReadDontCaseBusyEn, %function
 NandcReadDontCaseBusyEn:
+.LFB268:
+	.loc 3 111 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL128:
 	bx	lr
+	.cfi_endproc
+.LFE268:
 	.size	NandcReadDontCaseBusyEn, .-NandcReadDontCaseBusyEn
 	.section	.text.NandcGetChipIf,"ax",%progbits
 	.align	1
@@ -905,20 +1591,31 @@ NandcReadDontCaseBusyEn:
 	.fpu softvfp
 	.type	NandcGetChipIf, %function
 NandcGetChipIf:
+.LFB269:
+	.loc 3 120 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL129:
+	.loc 3 123 0
 	ldr	r2, .L136
+	.loc 3 124 0
 	add	r3, r2, r0, lsl #3
+	.loc 3 126 0
 	ldr	r0, [r2, r0, lsl #3]
+.LVL130:
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
 	adds	r3, r3, #8
+	.loc 3 128 0
 	add	r0, r0, r3, lsl #8
 	bx	lr
 .L137:
 	.align	2
 .L136:
 	.word	.LANCHOR6
+	.cfi_endproc
+.LFE269:
 	.size	NandcGetChipIf, .-NandcGetChipIf
 	.section	.text.NandcSetDdrPara,"ax",%progbits
 	.align	1
@@ -929,13 +1626,19 @@ NandcGetChipIf:
 	.fpu softvfp
 	.type	NandcSetDdrPara, %function
 NandcSetDdrPara:
+.LFB270:
+	.loc 3 131 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL131:
+	.loc 3 133 0
 	ldr	r3, .L139
 	ldr	r2, [r3]
 	lsls	r3, r0, #8
 	orr	r0, r3, r0, lsl #16
+.LVL132:
 	orr	r0, r0, #1
 	str	r0, [r2, #304]
 	bx	lr
@@ -943,6 +1646,8 @@ NandcSetDdrPara:
 	.align	2
 .L139:
 	.word	.LANCHOR19
+	.cfi_endproc
+.LFE270:
 	.size	NandcSetDdrPara, .-NandcSetDdrPara
 	.section	.text.NandcSetDdrDiv,"ax",%progbits
 	.align	1
@@ -953,11 +1658,17 @@ NandcSetDdrPara:
 	.fpu softvfp
 	.type	NandcSetDdrDiv, %function
 NandcSetDdrDiv:
+.LFB271:
+	.loc 3 143 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL133:
+	.loc 3 144 0
 	ldr	r3, .L142
 	orr	r0, r0, #16640
+.LVL134:
 	ldr	r3, [r3]
 	str	r0, [r3, #344]
 	bx	lr
@@ -965,6 +1676,8 @@ NandcSetDdrDiv:
 	.align	2
 .L142:
 	.word	.LANCHOR19
+	.cfi_endproc
+.LFE271:
 	.size	NandcSetDdrDiv, .-NandcSetDdrDiv
 	.section	.text.NandcSetDdrMode,"ax",%progbits
 	.align	1
@@ -975,24 +1688,37 @@ NandcSetDdrDiv:
 	.fpu softvfp
 	.type	NandcSetDdrMode, %function
 NandcSetDdrMode:
+.LFB272:
+	.loc 3 148 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL135:
+	.loc 3 150 0
 	ldr	r3, .L147
 	ldr	r2, [r3]
 	ldr	r3, [r2]
+.LVL136:
+	.loc 3 152 0
 	cbnz	r0, .L145
+	.loc 3 151 0
 	bfi	r3, r0, #13, #1
 .L146:
+	.loc 3 160 0
 	str	r3, [r2]
 	bx	lr
 .L145:
+	.loc 3 158 0
 	orr	r3, r3, #253952
+.LVL137:
 	b	.L146
 .L148:
 	.align	2
 .L147:
 	.word	.LANCHOR19
+	.cfi_endproc
+.LFE272:
 	.size	NandcSetDdrMode, .-NandcSetDdrMode
 	.section	.text.NandcSetMode,"ax",%progbits
 	.align	1
@@ -1003,33 +1729,62 @@ NandcSetDdrMode:
 	.fpu softvfp
 	.type	NandcSetMode, %function
 NandcSetMode:
+.LFB273:
+	.loc 3 170 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL138:
+	.loc 3 174 0
 	ldr	r3, .L156
+	.loc 3 175 0
 	ands	r1, r0, #6
+	.loc 3 174 0
 	ldr	r2, [r3]
 	ldr	r3, [r2]
+.LVL139:
+	.loc 3 175 0
 	beq	.L150
+	.loc 3 182 0
 	lsls	r1, r0, #29
+	.loc 3 228 0
 	movw	r1, #16641
 	str	r1, [r2, #344]
+	.loc 3 178 0
 	orr	r3, r3, #24576
+.LVL140:
+	.loc 3 229 0
 	ldr	r1, .L156+4
+	.loc 3 179 0
 	bfc	r3, #15, #1
+.LVL141:
+	.loc 3 181 0
 	orr	r3, r3, #196608
+.LVL142:
+	.loc 3 184 0
 	it	mi
 	orrmi	r3, r3, #32768
+.LVL143:
+	.loc 3 229 0
 	str	r1, [r2, #304]
+	.loc 3 231 0
 	movs	r1, #38
 	str	r1, [r2, #308]
+	.loc 3 232 0
 	movs	r1, #39
 	str	r1, [r2, #308]
+.LVL144:
 .L152:
+	.loc 3 264 0
 	str	r3, [r2]
+	.loc 3 272 0
 	movs	r0, #0
+.LVL145:
 	bx	lr
+.LVL146:
 .L150:
+	.loc 3 262 0
 	bfi	r3, r1, #13, #1
 	b	.L152
 .L157:
@@ -1037,6 +1792,8 @@ NandcSetMode:
 .L156:
 	.word	.LANCHOR19
 	.word	1710595
+	.cfi_endproc
+.LFE273:
 	.size	NandcSetMode, .-NandcSetMode
 	.section	.text.NandcFlashCs,"ax",%progbits
 	.align	1
@@ -1047,23 +1804,41 @@ NandcSetMode:
 	.fpu softvfp
 	.type	NandcFlashCs, %function
 NandcFlashCs:
+.LFB274:
+	.loc 3 275 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL147:
+	.loc 3 278 0
 	ldr	r3, .L159
+	.loc 3 283 0
 	movs	r2, #1
+	.loc 3 278 0
 	ldr	r1, [r3, r0, lsl #3]
+.LVL148:
+	.loc 3 279 0
 	add	r0, r3, r0, lsl #3
+.LVL149:
+	.loc 3 283 0
 	ldrb	r0, [r0, #4]	@ zero_extendqisi2
+.LVL150:
+	.loc 3 282 0
 	ldr	r3, [r1]
+	.loc 3 283 0
 	lsls	r2, r2, r0
 	bfi	r3, r2, #0, #8
+.LVL151:
+	.loc 3 286 0
 	str	r3, [r1]
 	bx	lr
 .L160:
 	.align	2
 .L159:
 	.word	.LANCHOR6
+	.cfi_endproc
+.LFE274:
 	.size	NandcFlashCs, .-NandcFlashCs
 	.section	.text.NandcFlashDeCs,"ax",%progbits
 	.align	1
@@ -1074,20 +1849,34 @@ NandcFlashCs:
 	.fpu softvfp
 	.type	NandcFlashDeCs, %function
 NandcFlashDeCs:
+.LFB275:
+	.loc 3 290 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL152:
+	.loc 3 293 0
 	ldr	r3, .L162
 	ldr	r2, [r3, r0, lsl #3]
+.LVL153:
+	.loc 3 296 0
 	ldr	r3, [r2]
+	.loc 3 297 0
 	bfc	r3, #0, #8
+.LVL154:
+	.loc 3 298 0
 	bfc	r3, #17, #1
+	.loc 3 301 0
 	str	r3, [r2]
+.LVL155:
 	bx	lr
 .L163:
 	.align	2
 .L162:
 	.word	.LANCHOR6
+	.cfi_endproc
+.LFE275:
 	.size	NandcFlashDeCs, .-NandcFlashDeCs
 	.section	.text.HynixSetRRPara,"ax",%progbits
 	.align	1
@@ -1098,76 +1887,154 @@ NandcFlashDeCs:
 	.fpu softvfp
 	.type	HynixSetRRPara, %function
 HynixSetRRPara:
+.LFB244:
+	.loc 2 1901 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL156:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 1901 0
 	mov	r7, r3
+	.loc 2 1906 0
 	ldr	r3, .L171
+.LVL157:
+	.loc 2 1901 0
 	mov	r5, r0
 	mov	r6, r1
 	mov	r10, r2
 	ldr	r4, .L171+4
+	.loc 2 1906 0
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	cmp	r3, #6
 	bne	.L165
+	.loc 2 1908 0
 	movs	r3, #20
 	add	r3, r3, r0, lsl #6
 	add	r3, r3, r7, lsl #2
+.LVL158:
 .L170:
+	.loc 2 1911 0
 	add	r4, r4, r3
+.LVL159:
 .L166:
+.LBB197:
+.LBB198:
+	.loc 3 123 0
 	ldr	r3, .L171+8
+.LBE198:
+.LBE197:
+	.loc 2 1916 0
 	mov	r0, r5
+.LVL160:
 	subs	r6, r6, #1
 	subs	r4, r4, #1
+.LVL161:
 	add	r6, r6, r10
+.LBB200:
+.LBB199:
+	.loc 3 123 0
 	ldr	r8, [r3, r5, lsl #3]
+.LVL162:
+	.loc 3 124 0
 	add	r3, r3, r5, lsl #3
 	ldrb	fp, [r3, #4]	@ zero_extendqisi2
+.LVL163:
+.LBE199:
+.LBE200:
+	.loc 2 1916 0
 	bl	NandcFlashCs
+.LVL164:
+	.loc 2 1917 0
 	movs	r3, #54
 	lsl	fp, fp, #8
 	add	r0, r8, fp
 	str	r3, [r0, #2056]
+.LVL165:
 	add	r3, r10, #-1
 	mov	r10, r0
+.LVL166:
 .L168:
+	.loc 2 1918 0 discriminator 1
 	cmp	r3, r6
 	bne	.L169
+	.loc 2 1923 0
 	movs	r3, #22
+.LVL167:
 	add	r8, r8, fp
 	str	r3, [r8, #2056]
+	.loc 2 1924 0
 	mov	r0, r5
 	bl	NandcFlashDeCs
+.LVL168:
+	.loc 2 1925 0
 	ldr	r3, .L171+12
 	strb	r7, [r3, r5]
+	.loc 2 1926 0
 	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL169:
 .L165:
+	.cfi_restore_state
+	.loc 2 1909 0
 	cmp	r3, #7
 	bne	.L167
+	.loc 2 1911 0
 	movs	r3, #160
 	movs	r2, #28
+.LVL170:
 	smlabb	r2, r3, r0, r2
 	movs	r3, #10
 	smlabb	r3, r3, r7, r2
 	b	.L170
+.LVL171:
 .L167:
+	.loc 2 1913 0
 	adds	r3, r7, #2
 	add	r3, r3, r0, lsl #3
 	add	r4, r4, r3, lsl #3
 	adds	r4, r4, #4
+.LVL172:
 	b	.L166
+.LVL173:
 .L169:
+	.loc 2 1919 0 discriminator 3
 	ldrb	r2, [r3, #1]!	@ zero_extendqisi2
+.LVL174:
+.LBB201:
+.LBB202:
+	.loc 3 306 0 discriminator 3
 	movs	r0, #200
+.LBE202:
+.LBE201:
+	.loc 2 1919 0 discriminator 3
 	str	r2, [r10, #2052]
+.LVL175:
 	str	r3, [sp, #4]
+.LBB204:
+.LBB203:
+	.loc 3 306 0 discriminator 3
 	bl	udelay
+.LVL176:
+.LBE203:
+.LBE204:
+	.loc 2 1921 0 discriminator 3
 	ldrsb	r2, [r4, #1]!
 	ldr	r3, [sp, #4]
+.LVL177:
 	str	r2, [r10, #2048]
 	b	.L168
 .L172:
@@ -1177,6 +2044,8 @@ HynixSetRRPara:
 	.word	.LANCHOR20
 	.word	.LANCHOR6
 	.word	.LANCHOR21
+	.cfi_endproc
+.LFE244:
 	.size	HynixSetRRPara, .-HynixSetRRPara
 	.section	.text.FlashSetReadRetryDefault,"ax",%progbits
 	.align	1
@@ -1187,30 +2056,57 @@ HynixSetRRPara:
 	.fpu softvfp
 	.type	FlashSetReadRetryDefault, %function
 FlashSetReadRetryDefault:
+.LFB246:
+	.loc 2 1970 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL178:
+	.loc 2 1972 0
 	ldr	r3, .L179
+	.loc 2 1970 0
 	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 2 1972 0
 	ldr	r3, [r3]
+	.loc 2 1974 0
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	cmp	r3, #6
 	bhi	.L173
+.LBB207:
+.LBB208:
+	.loc 2 1977 0
 	ldr	r5, .L179+4
+.LBE208:
+.LBE207:
 	movs	r4, #0
+.LBB210:
+.LBB209:
 	adds	r6, r5, #4
+.LVL179:
 .L176:
+	.loc 2 1976 0
 	ldr	r3, .L179+8
 	uxtb	r0, r4
+.LVL180:
 	ldrb	r3, [r3, r4, lsl #3]	@ zero_extendqisi2
 	cmp	r3, #173
 	bne	.L175
+	.loc 2 1977 0
 	movs	r3, #0
 	mov	r2, r6
 	ldrb	r1, [r5, #1]	@ zero_extendqisi2
 	bl	HynixSetRRPara
+.LVL181:
 .L175:
 	adds	r4, r4, #1
+.LVL182:
+	.loc 2 1975 0
 	cmp	r4, #4
 	bne	.L176
 .L173:
@@ -1221,6 +2117,10 @@ FlashSetReadRetryDefault:
 	.word	.LANCHOR18
 	.word	.LANCHOR20
 	.word	.LANCHOR22
+.LBE209:
+.LBE210:
+	.cfi_endproc
+.LFE246:
 	.size	FlashSetReadRetryDefault, .-FlashSetReadRetryDefault
 	.section	.text.FlashWaitCmdDone,"ax",%progbits
 	.align	1
@@ -1231,18 +2131,36 @@ FlashSetReadRetryDefault:
 	.fpu softvfp
 	.type	FlashWaitCmdDone, %function
 FlashWaitCmdDone:
+.LFB257:
+	.loc 2 2737 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL183:
+	.loc 2 2742 0
 	ldr	r2, .L188
 	lsls	r3, r0, #4
+	.loc 2 2737 0
 	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 2 2737 0
 	mov	r6, r0
+	.loc 2 2742 0
 	adds	r4, r2, r3
 	ldr	r1, [r4, #8]
 	cbz	r1, .L183
+	.loc 2 2739 0
 	ldrb	r5, [r2, r3]	@ zero_extendqisi2
+	.loc 2 2743 0
 	mov	r0, r5
+.LVL184:
 	bl	NandcFlashCs
+.LVL185:
+	.loc 2 2744 0
 	ldr	r3, .L188+4
 	mov	r0, r5
 	ldr	r1, [r4, #4]
@@ -1251,26 +2169,46 @@ FlashWaitCmdDone:
 	it	ne
 	movne	r2, #1
 	bl	FlashWaitReadyEN
+.LVL186:
 	mov	r1, r0
+.LVL187:
+	.loc 2 2745 0
 	mov	r0, r5
+.LVL188:
 	bl	NandcFlashDeCs
+.LVL189:
+	.loc 2 2749 0
 	ldr	r3, [r4, #8]
+	.loc 2 2747 0
 	sbfx	r1, r1, #0, #1
-	ldr	r2, [r4, #12]
+.LVL190:
+	.loc 2 2749 0
 	str	r1, [r3]
+	.loc 2 2750 0
 	movs	r3, #0
+	.loc 2 2751 0
+	ldr	r2, [r4, #12]
+	.loc 2 2750 0
 	str	r3, [r4, #8]
+	.loc 2 2751 0
 	cbz	r2, .L183
+	.loc 2 2752 0
 	str	r1, [r2]
+	.loc 2 2753 0
 	str	r3, [r4, #12]
+.LVL191:
 .L183:
+	.loc 2 2757 0
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
+.LVL192:
 .L189:
 	.align	2
 .L188:
 	.word	.LANCHOR23
 	.word	.LANCHOR17
+	.cfi_endproc
+.LFE257:
 	.size	FlashWaitCmdDone, .-FlashWaitCmdDone
 	.section	.text.NandcDelayns,"ax",%progbits
 	.align	1
@@ -1281,12 +2219,24 @@ FlashWaitCmdDone:
 	.fpu softvfp
 	.type	NandcDelayns, %function
 NandcDelayns:
+.LFB276:
+	.loc 3 305 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL193:
 	push	{r3, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 3, -8
+	.cfi_offset 14, -4
+	.loc 3 306 0
 	bl	udelay
+.LVL194:
+	.loc 3 308 0
 	movs	r0, #0
 	pop	{r3, pc}
+	.cfi_endproc
+.LFE276:
 	.size	NandcDelayns, .-NandcDelayns
 	.section	.text.NandcWaitFlashReady,"ax",%progbits
 	.align	1
@@ -1297,35 +2247,69 @@ NandcDelayns:
 	.fpu softvfp
 	.type	NandcWaitFlashReady, %function
 NandcWaitFlashReady:
+.LFB277:
+	.loc 3 311 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL195:
+	.loc 3 316 0
 	ldr	r3, .L196
+	.loc 3 311 0
 	push	{r0, r1, r2, r4, r5, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 3 316 0
 	ldr	r4, .L196+4
 	ldr	r5, [r3, r0, lsl #3]
+.LVL196:
 .L193:
+.LBB211:
+.LBB212:
+	.loc 3 306 0
 	movs	r0, #100
 	bl	udelay
+.LVL197:
+.LBE212:
+.LBE211:
+	.loc 3 322 0
 	ldr	r3, [r5]
 	str	r3, [sp, #4]
+	.loc 3 323 0
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #22
 	bmi	.L194
+.LVL198:
+	.loc 3 319 0 discriminator 2
 	subs	r4, r4, #1
+.LVL199:
 	bne	.L193
+	.loc 3 333 0
 	mov	r0, #-1
+.LVL200:
 .L191:
+	.loc 3 336 0
 	add	sp, sp, #12
+	.cfi_remember_state
+	.cfi_def_cfa_offset 12
 	@ sp needed
 	pop	{r4, r5, pc}
+.LVL201:
 .L194:
+	.cfi_restore_state
+	.loc 3 318 0
 	movs	r0, #0
+	.loc 3 335 0
 	b	.L191
 .L197:
 	.align	2
 .L196:
 	.word	.LANCHOR6
 	.word	100000
+	.cfi_endproc
+.LFE277:
 	.size	NandcWaitFlashReady, .-NandcWaitFlashReady
 	.section	.text.FlashReset,"ax",%progbits
 	.align	1
@@ -1336,27 +2320,70 @@ NandcWaitFlashReady:
 	.fpu softvfp
 	.type	FlashReset, %function
 FlashReset:
+.LFB207:
+	.loc 2 267 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL202:
+.LBB213:
+.LBB214:
+	.loc 3 123 0
 	ldr	r3, .L199
+.LBE214:
+.LBE213:
+	.loc 2 267 0
 	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 2 267 0
 	mov	r4, r0
+.LBB216:
+.LBB215:
+	.loc 3 123 0
 	ldr	r5, [r3, r0, lsl #3]
+.LVL203:
+	.loc 3 124 0
 	add	r3, r3, r0, lsl #3
+	.loc 3 126 0
 	ldrb	r6, [r3, #4]	@ zero_extendqisi2
+.LVL204:
+.LBE215:
+.LBE216:
+	.loc 2 271 0
 	bl	NandcFlashCs
+.LVL205:
+	.loc 2 272 0
 	movs	r3, #255
+	.loc 2 273 0
 	mov	r0, r4
+	.loc 2 272 0
 	add	r5, r5, r6, lsl #8
 	str	r3, [r5, #2056]
+	.loc 2 273 0
 	bl	NandcWaitFlashReady
+.LVL206:
+	.loc 2 274 0
 	mov	r0, r4
+	.loc 2 275 0
 	pop	{r4, r5, r6, lr}
+	.cfi_restore 14
+	.cfi_restore 6
+	.cfi_restore 5
+	.cfi_restore 4
+	.cfi_def_cfa_offset 0
+	.loc 2 274 0
 	b	NandcFlashDeCs
+.LVL207:
 .L200:
 	.align	2
 .L199:
 	.word	.LANCHOR6
+	.cfi_endproc
+.LFE207:
 	.size	FlashReset, .-FlashReset
 	.section	.text.FlashEraseBlock,"ax",%progbits
 	.align	1
@@ -1367,29 +2394,57 @@ FlashReset:
 	.fpu softvfp
 	.type	FlashEraseBlock, %function
 FlashEraseBlock:
+.LFB225:
+	.loc 2 589 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL208:
 	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 2 589 0
 	mov	r4, r0
 	mov	r5, r1
 	mov	r6, r2
+	.loc 2 593 0
 	bl	NandcWaitFlashReady
+.LVL209:
+	.loc 2 594 0
 	mov	r0, r4
 	bl	NandcFlashCs
+.LVL210:
+	.loc 2 595 0
 	mov	r2, r6
 	mov	r1, r5
 	mov	r0, r4
 	bl	FlashEraseCmd
+.LVL211:
+	.loc 2 596 0
 	mov	r0, r4
 	bl	NandcWaitFlashReady
+.LVL212:
+	.loc 2 597 0
 	mov	r1, r5
 	mov	r0, r4
 	bl	FlashReadStatus
+.LVL213:
 	mov	r1, r0
+.LVL214:
+	.loc 2 598 0
 	mov	r0, r4
+.LVL215:
 	bl	NandcFlashDeCs
+.LVL216:
+	.loc 2 603 0
 	and	r0, r1, #1
+.LVL217:
 	pop	{r4, r5, r6, pc}
+	.cfi_endproc
+.LFE225:
 	.size	FlashEraseBlock, .-FlashEraseBlock
 	.section	.text.FlashSetInterfaceMode,"ax",%progbits
 	.align	1
@@ -1400,94 +2455,175 @@ FlashEraseBlock:
 	.fpu softvfp
 	.type	FlashSetInterfaceMode, %function
 FlashSetInterfaceMode:
+.LFB226:
+	.loc 2 606 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL218:
+	.loc 2 636 0
 	ldr	r3, .L230
+	.loc 2 645 0
 	mov	ip, #128
+	.loc 2 606 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 636 0
 	movs	r5, #0
+	.loc 2 637 0
 	movs	r7, #239
+	.loc 2 642 0
 	mov	lr, #1
+	.loc 2 643 0
 	mov	r8, #35
+	.loc 2 640 0
 	mov	r10, #32
+	.loc 2 636 0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	and	r2, r3, #4
 	and	r3, r3, #1
 	str	r2, [sp]
+	.loc 2 648 0
 	mov	r2, r5
 	str	r3, [sp, #4]
+.LVL219:
 .L212:
+	.loc 2 613 0
 	ldr	r3, .L230+4
 	ldrb	r4, [r5, r3]	@ zero_extendqisi2
+.LVL220:
+	.loc 2 614 0
 	cmp	r4, #152
 	beq	.L203
+	.loc 2 614 0 is_stmt 0 discriminator 1
 	cmp	r4, #69
 	beq	.L203
+	.loc 2 614 0 discriminator 2
 	cmp	r4, #173
 	beq	.L203
+	.loc 2 614 0 discriminator 3
 	cmp	r4, #44
 	bne	.L204
 .L203:
+.LBB217:
+.LBB218:
+	.loc 3 123 0 is_stmt 1
 	ldr	r3, .L230+8
+.LBE218:
+.LBE217:
+	.loc 2 615 0
 	cmp	r0, #1
+.LBB220:
+.LBB219:
+	.loc 3 123 0
 	ldr	r1, [r5, r3]
+	.loc 3 124 0
 	add	r3, r3, r5
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+.LBE219:
+.LBE220:
+	.loc 2 615 0
 	bne	.L205
+	.loc 2 616 0
 	ldr	r6, [sp, #4]
 	cbz	r6, .L204
+	.loc 2 620 0
 	lsls	r3, r3, #8
+	.loc 2 621 0
 	cmp	r4, #173
+	.loc 2 620 0
 	add	fp, r1, r3
 	str	r7, [fp, #2056]
+	.loc 2 621 0
 	bne	.L206
+	.loc 2 622 0
 	str	r0, [fp, #2052]
 .L229:
+	.loc 2 646 0
 	str	r2, [fp, #2048]
 	b	.L210
 .L206:
+	.loc 2 624 0
 	cmp	r4, #44
+	.loc 2 626 0
 	ittet	eq
 	moveq	r4, #5
+.LVL221:
+	.loc 2 625 0
 	streq	r0, [fp, #2052]
+	.loc 2 628 0
 	strne	ip, [fp, #2052]
+	.loc 2 626 0
 	streq	r4, [fp, #2048]
+	.loc 2 629 0
 	it	ne
 	strne	r0, [fp, #2048]
+.LVL222:
 .L210:
 	add	r3, r3, r1
+	.loc 2 648 0
 	str	r2, [r3, #2048]
+	.loc 2 649 0
 	str	r2, [r3, #2048]
+	.loc 2 650 0
 	str	r2, [r3, #2048]
 .L204:
 	adds	r5, r5, #8
+	.loc 2 611 0 discriminator 2
 	cmp	r5, #32
 	bne	.L212
+	.loc 2 680 0
 	movs	r0, #0
+.LVL223:
 	bl	NandcWaitFlashReady
+.LVL224:
+	.loc 2 682 0
 	movs	r0, #0
 	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL225:
 .L205:
+	.cfi_restore_state
+	.loc 2 636 0
 	ldr	r6, [sp]
 	cmp	r6, #0
 	beq	.L204
+	.loc 2 637 0
 	lsls	r3, r3, #8
+	.loc 2 638 0
 	cmp	r4, #173
+	.loc 2 637 0
 	add	fp, r1, r3
 	str	r7, [fp, #2056]
+	.loc 2 638 0
 	bne	.L209
+	.loc 2 639 0
 	str	lr, [fp, #2052]
+	.loc 2 640 0
 	str	r10, [fp, #2048]
 	b	.L210
 .L209:
+	.loc 2 641 0
 	cmp	r4, #44
 	bne	.L211
+	.loc 2 642 0
 	str	lr, [fp, #2052]
+	.loc 2 643 0
 	str	r8, [fp, #2048]
 	b	.L210
 .L211:
+	.loc 2 645 0
 	str	ip, [fp, #2052]
 	b	.L229
 .L231:
@@ -1496,6 +2632,8 @@ FlashSetInterfaceMode:
 	.word	.LANCHOR24
 	.word	.LANCHOR22
 	.word	.LANCHOR6
+	.cfi_endproc
+.LFE226:
 	.size	FlashSetInterfaceMode, .-FlashSetInterfaceMode
 	.section	.text.SandiskSetRRPara,"ax",%progbits
 	.align	1
@@ -1506,48 +2644,99 @@ FlashSetInterfaceMode:
 	.fpu softvfp
 	.type	SandiskSetRRPara, %function
 SandiskSetRRPara:
+.LFB238:
+	.loc 2 1706 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL226:
 	push	{r3, r4, r5, r6, r7, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 3, -24
+	.cfi_offset 4, -20
+	.cfi_offset 5, -16
+	.cfi_offset 6, -12
+	.cfi_offset 7, -8
+	.cfi_offset 14, -4
+	.loc 2 1709 0
 	movs	r3, #239
 	str	r3, [r0, #8]
+	.loc 2 1710 0
 	movs	r3, #17
+	.loc 2 1706 0
 	mov	r5, r0
 	mov	r4, r1
+	.loc 2 1710 0
 	str	r3, [r0, #4]
+.LVL227:
+.LBB221:
+.LBB222:
+	.loc 3 306 0
 	movs	r0, #200
+.LVL228:
 	bl	udelay
-	ldr	r3, .L238
+.LVL229:
+.LBE222:
+.LBE221:
+	.loc 2 1716 0
+	ldr	r6, .L238
 	add	r4, r4, r4, lsl #2
-	ldr	r6, .L238+4
+	.loc 2 1712 0
+	ldr	r1, .L238+4
 	movs	r2, #0
-	ldr	r7, .L238+8
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	ldr	r3, .L238+12
-	ldrb	r0, [r3]	@ zero_extendqisi2
+	.loc 2 1713 0
+	ldr	r0, .L238+8
+	.loc 2 1714 0
+	ldr	r7, .L238+12
+.LVL230:
 .L233:
-	cmp	r2, r1
+	.loc 2 1712 0 discriminator 1
+	ldrb	r3, [r1]	@ zero_extendqisi2
+	cmp	r2, r3
 	bcc	.L236
+	.loc 2 1718 0
 	movs	r0, #0
+	.loc 2 1720 0
 	pop	{r3, r4, r5, r6, r7, lr}
+	.cfi_remember_state
+	.cfi_restore 14
+	.cfi_restore 7
+	.cfi_restore 6
+	.cfi_restore 5
+	.cfi_restore 4
+	.cfi_restore 3
+	.cfi_def_cfa_offset 0
+.LVL231:
+	.loc 2 1718 0
 	b	NandcWaitFlashReady
+.LVL232:
 .L236:
-	adds	r3, r2, r4
-	cmp	r0, #67
+	.cfi_restore_state
+	.loc 2 1713 0
+	ldrb	r3, [r0]	@ zero_extendqisi2
+	cmp	r3, #67
+	add	r3, r2, r4
+	.loc 2 1714 0
 	ite	eq
 	addeq	r3, r3, r7
+	.loc 2 1716 0
 	addne	r3, r3, r6
 	ldrsb	r3, [r3, #5]
+	.loc 2 1712 0
 	adds	r2, r2, #1
+.LVL233:
+	.loc 2 1716 0
 	str	r3, [r5]
 	b	.L233
 .L239:
 	.align	2
 .L238:
-	.word	.LANCHOR13
 	.word	.LANCHOR11
-	.word	.LANCHOR9
+	.word	.LANCHOR13
 	.word	.LANCHOR10
+	.word	.LANCHOR9
+	.cfi_endproc
+.LFE238:
 	.size	SandiskSetRRPara, .-SandiskSetRRPara
 	.section	.text.FlashEraseSLc2KBlocks,"ax",%progbits
 	.align	1
@@ -1558,23 +2747,48 @@ SandiskSetRRPara:
 	.fpu softvfp
 	.type	FlashEraseSLc2KBlocks, %function
 FlashEraseSLc2KBlocks:
+.LFB260:
+	.loc 2 2901 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL234:
 	push	{r4, r5, r6, r7, r8, r10, lr}
+	.cfi_def_cfa_offset 28
+	.cfi_offset 4, -28
+	.cfi_offset 5, -24
+	.cfi_offset 6, -20
+	.cfi_offset 7, -16
+	.cfi_offset 8, -12
+	.cfi_offset 10, -8
+	.cfi_offset 14, -4
 	mov	r7, r1
+	.loc 2 2911 0
 	ldr	r8, .L250+12
+	.loc 2 2901 0
 	sub	sp, sp, #20
+	.cfi_def_cfa_offset 48
 	mov	r5, r0
+	.loc 2 2909 0
 	movs	r6, #0
+	.loc 2 2915 0
 	ldr	r10, .L250+16
+.LVL235:
 .L241:
+	.loc 2 2909 0 discriminator 1
 	cmp	r6, r7
 	bne	.L246
+	.loc 2 2938 0
 	movs	r0, #0
 	add	sp, sp, #20
+	.cfi_remember_state
+	.cfi_def_cfa_offset 28
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
+.LVL236:
 .L246:
+	.cfi_restore_state
+	.loc 2 2910 0
 	subs	r3, r7, r6
 	add	r2, sp, #8
 	uxtb	r3, r3
@@ -1583,61 +2797,99 @@ FlashEraseSLc2KBlocks:
 	str	r3, [sp]
 	add	r3, sp, #12
 	bl	LogAddr2PhyAddr
+.LVL237:
+	.loc 2 2911 0
 	ldr	r3, [sp, #12]
 	ldrb	r2, [r8]	@ zero_extendqisi2
 	cmp	r2, r3
 	bhi	.L242
+	.loc 2 2912 0
 	mov	r3, #-1
 	str	r3, [r5]
 .L243:
+	.loc 2 2909 0 discriminator 2
 	adds	r6, r6, #1
+.LVL238:
 	adds	r5, r5, #36
 	b	.L241
 .L242:
+	.loc 2 2915 0
 	ldrb	r4, [r10, r3]	@ zero_extendqisi2
+.LVL239:
+	.loc 2 2916 0
 	lsls	r3, r3, #4
 	ldr	r2, .L250
+	.loc 2 2917 0
 	mov	r0, r4
+	.loc 2 2916 0
 	strb	r4, [r2, r3]
+	.loc 2 2917 0
 	bl	NandcWaitFlashReady
+.LVL240:
+	.loc 2 2918 0
 	mov	r0, r4
 	bl	NandcFlashCs
+.LVL241:
+	.loc 2 2919 0
 	movs	r2, #0
 	ldr	r1, [sp, #8]
 	mov	r0, r4
 	bl	FlashEraseCmd
+.LVL242:
+	.loc 2 2920 0
 	mov	r0, r4
 	bl	NandcWaitFlashReady
+.LVL243:
+	.loc 2 2921 0
 	ldr	r1, [sp, #8]
 	mov	r0, r4
 	bl	FlashReadStatus
+.LVL244:
+	.loc 2 2927 0
 	ldr	r3, .L250+4
+	.loc 2 2923 0
 	sbfx	r0, r0, #0, #1
+.LVL245:
+	.loc 2 2925 0
 	str	r0, [r5]
+	.loc 2 2927 0
 	movs	r2, #0
 	ldr	r1, [sp, #8]
 	mov	r0, r4
 	ldr	r3, [r3]
 	add	r1, r1, r3
 	bl	FlashEraseCmd
+.LVL246:
+	.loc 2 2928 0
 	mov	r0, r4
 	bl	NandcWaitFlashReady
+.LVL247:
+	.loc 2 2929 0
 	ldr	r1, [sp, #8]
 	mov	r0, r4
 	bl	FlashReadStatus
+.LVL248:
+	.loc 2 2931 0
 	lsls	r3, r0, #31
+	.loc 2 2932 0
 	itt	mi
 	movmi	r3, #-1
 	strmi	r3, [r5]
+	.loc 2 2933 0
 	ldr	r3, [r5]
 	adds	r3, r3, #1
 	bne	.L245
+	.loc 2 2934 0
 	ldr	r1, [sp, #8]
 	ldr	r0, .L250+8
+.LVL249:
 	bl	printf
+.LVL250:
 .L245:
+	.loc 2 2935 0
 	mov	r0, r4
 	bl	NandcFlashDeCs
+.LVL251:
 	b	.L243
 .L251:
 	.align	2
@@ -1647,6 +2899,8 @@ FlashEraseSLc2KBlocks:
 	.word	.LC1
 	.word	.LANCHOR25
 	.word	.LANCHOR26
+	.cfi_endproc
+.LFE260:
 	.size	FlashEraseSLc2KBlocks, .-FlashEraseSLc2KBlocks
 	.section	.text.FlashEraseBlocks,"ax",%progbits
 	.align	1
@@ -1657,38 +2911,82 @@ FlashEraseSLc2KBlocks:
 	.fpu softvfp
 	.type	FlashEraseBlocks, %function
 FlashEraseBlocks:
+.LFB263:
+	.loc 2 3223 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L279
+.LVL252:
+	.loc 2 3233 0
+	ldr	r3, .L283
+	.loc 2 3223 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
 	mov	r8, r0
 	sub	sp, sp, #24
+	.cfi_def_cfa_offset 56
+	.loc 2 3223 0
 	mov	fp, r1
 	mov	r7, r2
+	.loc 2 3233 0
 	ldrb	r4, [r3]	@ zero_extendqisi2
 	cbnz	r4, .L253
-	ldr	r10, .L279+8
+	.loc 2 3244 0 discriminator 1
+	ldr	r10, .L283+8
+.LVL253:
 .L254:
+	.loc 2 3236 0 discriminator 1
 	cmp	r4, r7
 	bcc	.L263
-	ldr	r5, .L279+4
+	.loc 2 3273 0 discriminator 1
+	ldr	r5, .L283+4
 	movs	r4, #0
-	ldr	r6, .L279+8
+.LVL254:
+	.loc 2 3274 0 discriminator 1
+	ldr	r6, .L283+8
 .L264:
-	ldr	r3, .L279+12
+.LVL255:
+	.loc 2 3271 0 discriminator 1
+	ldr	r3, .L283+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r4, r3
 	bcc	.L266
+	.loc 2 3278 0
+	ldr	r3, .L283+16
+	ldr	r3, [r3]
+	cmp	r3, #0
+	bne	.L267
+.LVL256:
+.L268:
+	.loc 2 3283 0
 	movs	r0, #0
 	b	.L252
+.LVL257:
 .L253:
+	.loc 2 3234 0
 	mov	r1, r2
+.LVL258:
 	bl	FlashEraseSLc2KBlocks
+.LVL259:
 .L252:
+	.loc 2 3284 0
 	add	sp, sp, #24
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL260:
 .L263:
+	.cfi_restore_state
+	.loc 2 3237 0
 	movs	r5, #36
 	add	r2, sp, #16
 	muls	r5, r4, r5
@@ -1701,99 +2999,180 @@ FlashEraseBlocks:
 	str	r3, [sp]
 	add	r3, sp, #20
 	bl	LogAddr2PhyAddr
-	ldr	r3, .L279+12
+.LVL261:
+	.loc 2 3238 0
+	ldr	r3, .L283+12
+	.loc 2 3237 0
 	mov	r6, r0
+.LVL262:
+	.loc 2 3238 0
 	ldr	r0, [sp, #20]
+.LVL263:
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r0
 	bhi	.L256
+	.loc 2 3239 0
 	mov	r3, #-1
 	str	r3, [r8, r5]
 .L257:
+	.loc 2 3236 0 discriminator 2
 	adds	r4, r4, #1
+.LVL264:
 	b	.L254
 .L256:
-	ldr	r3, .L279+16
+	.loc 2 3242 0
+	ldr	r3, .L283+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
+	.loc 2 3243 0
 	cmp	r3, #0
+	.loc 2 3244 0
 	add	r3, r10, r0, lsl #4
+	.loc 2 3243 0
 	it	eq
 	moveq	r6, #0
+.LVL265:
+	.loc 2 3244 0
 	ldr	r3, [r3, #8]
 	cbz	r3, .L259
+	.loc 2 3245 0
 	uxtb	r0, r0
 	bl	FlashWaitCmdDone
+.LVL266:
 .L259:
+	.loc 2 3246 0
 	ldr	r1, [sp, #20]
 	ldr	r0, [sp, #12]
 	lsls	r2, r1, #4
 	add	r3, r10, r2
 	str	r0, [r3, #8]
+	.loc 2 3247 0
 	movs	r0, #0
 	str	r0, [r3, #12]
+	.loc 2 3248 0
 	ldr	r0, [sp, #16]
 	str	r0, [r3, #4]
+	.loc 2 3249 0
 	cbz	r6, .L260
+	.loc 2 3250 0
 	adds	r5, r5, #36
 	add	r5, r5, r8
 	str	r5, [r3, #12]
 .L260:
-	ldr	r3, .L279+20
+	.loc 2 3252 0
+	ldr	r3, .L283+24
 	ldrb	r5, [r3, r1]	@ zero_extendqisi2
+.LVL267:
+	.loc 2 3254 0
 	mov	r0, r5
+	.loc 2 3253 0
 	strb	r5, [r10, r2]
+	.loc 2 3254 0
 	bl	NandcFlashCs
+.LVL268:
+	.loc 2 3255 0
 	cmp	fp, #1
+	.loc 2 3256 0
 	mov	r0, r5
+	.loc 2 3255 0
 	bne	.L261
-	ldr	r3, .L279+4
+	.loc 2 3255 0 is_stmt 0 discriminator 1
+	ldr	r3, .L283+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cbz	r3, .L261
+	.loc 2 3256 0 is_stmt 1
 	bl	flash_enter_slc_mode
+.LVL269:
 .L262:
-	ldr	r3, .L279+24
+	.loc 2 3260 0
+	ldr	r3, .L283+28
 	mov	r0, r5
 	ldr	r2, [sp, #20]
+	.loc 2 3263 0
 	add	r4, r4, r6
+.LVL270:
+	.loc 2 3260 0
 	ldr	r1, [sp, #16]
 	ldr	r2, [r3, r2, lsl #2]
 	adds	r2, r2, #0
 	it	ne
 	movne	r2, #1
 	bl	FlashWaitReadyEN
+.LVL271:
+	.loc 2 3261 0
 	mov	r2, r6
 	ldr	r1, [sp, #16]
 	mov	r0, r5
 	bl	FlashEraseCmd
+.LVL272:
+	.loc 2 3262 0
 	mov	r0, r5
 	bl	NandcFlashDeCs
+.LVL273:
 	b	.L257
 .L261:
+	.loc 2 3258 0
 	bl	flash_exit_slc_mode
+.LVL274:
 	b	.L262
+.LVL275:
 .L266:
+	.loc 2 3272 0
 	uxtb	r0, r4
 	bl	FlashWaitCmdDone
+.LVL276:
+	.loc 2 3273 0
 	cmp	fp, #1
 	bne	.L265
+	.loc 2 3273 0 is_stmt 0 discriminator 1
 	ldrb	r3, [r5]	@ zero_extendqisi2
 	cbz	r3, .L265
+	.loc 2 3274 0 is_stmt 1
 	lsls	r3, r4, #4
 	ldrb	r0, [r6, r3]	@ zero_extendqisi2
 	bl	flash_exit_slc_mode
+.LVL277:
 .L265:
+	.loc 2 3271 0 discriminator 2
 	adds	r4, r4, #1
+.LVL278:
 	b	.L264
-.L280:
+.L267:
+	.loc 2 3278 0 discriminator 1
+	ldr	r3, .L283+32
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #69
+	bne	.L268
+	movs	r3, #0
+	.loc 2 3280 0 discriminator 1
+	movs	r2, #36
+	mov	r1, r3
+.LVL279:
+.L269:
+	.loc 2 3279 0 discriminator 1
+	cmp	r3, r7
+	beq	.L268
+	.loc 2 3280 0 discriminator 3
+	mul	r0, r2, r3
+	.loc 2 3279 0 discriminator 3
+	adds	r3, r3, #1
+.LVL280:
+	.loc 2 3280 0 discriminator 3
+	str	r1, [r8, r0]
+	b	.L269
+.L284:
 	.align	2
-.L279:
+.L283:
 	.word	.LANCHOR1
 	.word	.LANCHOR8
 	.word	.LANCHOR23
 	.word	.LANCHOR25
+	.word	.LANCHOR28
 	.word	.LANCHOR27
 	.word	.LANCHOR26
 	.word	.LANCHOR17
+	.word	.LANCHOR22
+	.cfi_endproc
+.LFE263:
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
 	.section	.text.FlashReadDpCmd,"ax",%progbits
 	.align	1
@@ -1804,63 +3183,140 @@ FlashEraseBlocks:
 	.fpu softvfp
 	.type	FlashReadDpCmd, %function
 FlashReadDpCmd:
+.LFB213:
+	.loc 2 364 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL281:
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 3, -32
+	.cfi_offset 4, -28
+	.cfi_offset 5, -24
+	.cfi_offset 6, -20
+	.cfi_offset 7, -16
+	.cfi_offset 8, -12
+	.cfi_offset 10, -8
+	.cfi_offset 14, -4
+	.loc 2 364 0
 	mov	r5, r2
-	ldr	r3, .L285
+.LBB223:
+.LBB224:
+	.loc 3 123 0
+	ldr	r3, .L289
+.LBE224:
+.LBE223:
+	.loc 2 364 0
 	mov	r6, r1
 	uxtb	lr, r1
 	mov	r7, r0
 	lsrs	r1, r1, #8
+.LVL282:
 	uxtb	r8, r5
+.LBB226:
+.LBB225:
+	.loc 3 123 0
 	ldr	r10, [r3, r0, lsl #3]
+.LVL283:
+	.loc 3 124 0
 	add	r3, r3, r0, lsl #3
 	ldrb	r4, [r3, #4]	@ zero_extendqisi2
-	ldr	r3, .L285+4
+.LVL284:
+.LBE225:
+.LBE226:
+	.loc 2 368 0
+	ldr	r3, .L289+4
 	ldrb	r2, [r3, #16]	@ zero_extendqisi2
+.LVL285:
 	lsls	r4, r4, #8
 	ldrb	ip, [r3, #8]	@ zero_extendqisi2
+	.loc 2 369 0
 	add	r4, r4, r10
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
+	.loc 2 368 0
 	cmp	r2, #1
 	lsr	r2, r6, #16
+	.loc 2 369 0
 	str	ip, [r4, #2056]
-	bne	.L282
+	.loc 2 368 0
+	bne	.L286
+	.loc 2 370 0
 	mov	r10, #0
 	str	r10, [r4, #2052]
+	.loc 2 371 0
 	str	r10, [r4, #2052]
+	.loc 2 372 0
 	str	lr, [r4, #2052]
+	.loc 2 373 0
 	str	r1, [r4, #2052]
+	.loc 2 374 0
 	str	r2, [r4, #2052]
+	.loc 2 375 0
 	str	r3, [r4, #2056]
+	.loc 2 376 0
 	bl	NandcWaitFlashReady
+.LVL286:
+	.loc 2 377 0
 	str	r10, [r4, #2056]
+	.loc 2 378 0
 	str	r10, [r4, #2052]
+	.loc 2 379 0
 	str	r10, [r4, #2052]
-.L284:
+.L288:
+	.loc 2 391 0
 	lsrs	r3, r5, #8
+	.loc 2 392 0
 	lsrs	r5, r5, #16
+.LVL287:
+	.loc 2 390 0
 	str	r8, [r4, #2052]
+	.loc 2 391 0
 	str	r3, [r4, #2052]
+	.loc 2 393 0
 	movs	r3, #48
+	.loc 2 392 0
 	str	r5, [r4, #2052]
+	.loc 2 395 0
 	mov	r1, r6
+	.loc 2 393 0
 	str	r3, [r4, #2056]
+	.loc 2 395 0
 	mov	r0, r7
+	.loc 2 396 0
 	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
+	.cfi_remember_state
+	.cfi_restore 14
+	.cfi_restore 10
+	.cfi_restore 8
+	.cfi_restore 7
+	.cfi_restore 6
+	.cfi_restore 5
+	.cfi_restore 4
+	.cfi_restore 3
+	.cfi_def_cfa_offset 0
+.LVL288:
+	.loc 2 395 0
 	b	FlashSetRandomizer
-.L282:
+.LVL289:
+.L286:
+	.cfi_restore_state
+	.loc 2 386 0
 	str	lr, [r4, #2052]
+	.loc 2 387 0
 	str	r1, [r4, #2052]
+	.loc 2 388 0
 	str	r2, [r4, #2052]
+	.loc 2 389 0
 	str	r3, [r4, #2056]
-	b	.L284
-.L286:
+	b	.L288
+.L290:
 	.align	2
-.L285:
+.L289:
 	.word	.LANCHOR6
 	.word	.LANCHOR7
+	.cfi_endproc
+.LFE213:
 	.size	FlashReadDpCmd, .-FlashReadDpCmd
 	.section	.text.FlashDeInit,"ax",%progbits
 	.align	1
@@ -1871,37 +3327,70 @@ FlashReadDpCmd:
 	.fpu softvfp
 	.type	FlashDeInit, %function
 FlashDeInit:
+.LFB253:
+	.loc 2 2656 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 4, -8
+	.cfi_offset 14, -4
+	.loc 2 2657 0
 	movs	r0, #0
-	ldr	r4, .L295
+	.loc 2 2659 0
+	ldr	r4, .L299
+	.loc 2 2657 0
 	bl	NandcWaitFlashReady
+.LVL290:
+	.loc 2 2658 0
 	bl	FlashSetReadRetryDefault
+.LVL291:
+	.loc 2 2659 0
 	ldrb	r3, [r4]	@ zero_extendqisi2
-	cbz	r3, .L288
-	ldr	r3, .L295+4
+	cbz	r3, .L292
+	.loc 2 2659 0 is_stmt 0 discriminator 1
+	ldr	r3, .L299+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	lsls	r3, r3, #31
-	bpl	.L288
+	bpl	.L292
+	.loc 2 2660 0 is_stmt 1
 	movs	r0, #1
 	bl	FlashSetInterfaceMode
+.LVL292:
+	.loc 2 2661 0
 	movs	r0, #1
 	bl	NandcSetMode
+.LVL293:
+	.loc 2 2662 0
 	movs	r3, #0
 	strb	r3, [r4]
-.L288:
-	ldr	r3, .L295+8
+.L292:
+.LVL294:
+.LBB227:
+.LBB228:
+	.loc 3 343 0
+	ldr	r3, .L299+8
+	.loc 3 344 0
 	movs	r0, #0
+	.loc 3 343 0
 	ldr	r3, [r3]
+.LVL295:
+	.loc 3 344 0
 	str	r0, [r3, #336]
+.LVL296:
+.LBE228:
+.LBE227:
+	.loc 2 2666 0
 	pop	{r4, pc}
-.L296:
+.L300:
 	.align	2
-.L295:
-	.word	.LANCHOR28
+.L299:
+	.word	.LANCHOR29
 	.word	.LANCHOR24
 	.word	.LANCHOR6
+	.cfi_endproc
+.LFE253:
 	.size	FlashDeInit, .-FlashDeInit
 	.section	.text.NandcRandmzSel,"ax",%progbits
 	.align	1
@@ -1912,17 +3401,28 @@ FlashDeInit:
 	.fpu softvfp
 	.type	NandcRandmzSel, %function
 NandcRandmzSel:
+.LFB278:
+	.loc 3 339 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L298
+.LVL297:
+.LBB229:
+	.loc 3 343 0
+	ldr	r3, .L302
 	ldr	r3, [r3, r0, lsl #3]
+.LVL298:
+	.loc 3 344 0
 	str	r1, [r3, #336]
 	bx	lr
-.L299:
+.L303:
 	.align	2
-.L298:
+.L302:
 	.word	.LANCHOR6
+.LBE229:
+	.cfi_endproc
+.LFE278:
 	.size	NandcRandmzSel, .-NandcRandmzSel
 	.section	.text.NandcTimeCfg,"ax",%progbits
 	.align	1
@@ -1933,27 +3433,46 @@ NandcRandmzSel:
 	.fpu softvfp
 	.type	NandcTimeCfg, %function
 NandcTimeCfg:
+.LFB279:
+	.loc 3 349 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L305
+.LVL299:
+	ldr	r3, .L309
+	.loc 3 369 0
 	cmp	r0, #35
+	.loc 3 371 0
 	ldr	r3, [r3]
-	bhi	.L301
+	.loc 3 369 0
+	bhi	.L305
+	.loc 3 371 0
 	movw	r2, #4193
-.L304:
+.L308:
+.LBB232:
+.LBB233:
+	.loc 3 379 0
 	str	r2, [r3, #4]
 	bx	lr
-.L301:
+.L305:
+.LVL300:
+	.loc 3 373 0
 	cmp	r0, #99
+	.loc 3 375 0
 	ite	hi
 	movwhi	r2, #8322
+	.loc 3 379 0
 	movwls	r2, #4225
-	b	.L304
-.L306:
+	b	.L308
+.L310:
 	.align	2
-.L305:
+.L309:
 	.word	.LANCHOR19
+.LBE233:
+.LBE232:
+	.cfi_endproc
+.LFE279:
 	.size	NandcTimeCfg, .-NandcTimeCfg
 	.section	.text.FlashTimingCfg,"ax",%progbits
 	.align	1
@@ -1964,16 +3483,25 @@ NandcTimeCfg:
 	.fpu softvfp
 	.type	FlashTimingCfg, %function
 FlashTimingCfg:
+.LFB210:
+	.loc 2 308 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L308
+.LVL301:
+	.loc 2 318 0
+	ldr	r3, .L312
 	ldrb	r0, [r3, #21]	@ zero_extendqisi2
+.LVL302:
 	b	NandcTimeCfg
-.L309:
+.LVL303:
+.L313:
 	.align	2
-.L308:
-	.word	.LANCHOR29
+.L312:
+	.word	.LANCHOR30
+	.cfi_endproc
+.LFE210:
 	.size	FlashTimingCfg, .-FlashTimingCfg
 	.section	.text.NandcBchSel,"ax",%progbits
 	.align	1
@@ -1984,44 +3512,83 @@ FlashTimingCfg:
 	.fpu softvfp
 	.type	NandcBchSel, %function
 NandcBchSel:
+.LFB280:
+	.loc 3 400 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L318
+.LVL304:
+	.loc 3 405 0
+	ldr	r3, .L322
+	.loc 3 404 0
 	movs	r1, #0
+.LVL305:
+	.loc 3 400 0
 	push	{r4, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 4, -8
+	.cfi_offset 14, -4
+	.loc 3 408 0
 	movs	r4, #16
+	.loc 3 411 0
 	cmp	r0, r4
+	.loc 3 405 0
 	ldr	r2, [r3]
 	mov	r3, #1
+.LVL306:
 	str	r3, [r2, #8]
-	ldr	r3, .L318+4
+	.loc 3 406 0
+	ldr	r3, .L322+4
+.LVL307:
 	str	r0, [r3]
+.LVL308:
+	.loc 3 407 0
 	mov	r3, r1
+.LVL309:
+	.loc 3 408 0
 	bfi	r3, r4, #8, #8
+.LVL310:
+	.loc 3 410 0
 	bfi	r3, r1, #18, #1
-	bne	.L311
-.L314:
+	.loc 3 411 0
+	bne	.L315
+.L318:
+	.loc 3 412 0
 	bfc	r3, #4, #1
-.L312:
+.L316:
+	.loc 3 422 0
 	orr	r3, r3, #1
+.LVL311:
+	.loc 3 424 0
 	str	r3, [r2, #12]
 	pop	{r4, pc}
-.L311:
+.L315:
+	.loc 3 413 0
 	cmp	r0, #24
-	bne	.L313
+	bne	.L317
+	.loc 3 414 0
 	orr	r3, r3, #16
-	b	.L312
-.L313:
+.LVL312:
+	b	.L316
+.LVL313:
+.L317:
+	.loc 3 419 0
 	cmp	r0, #40
+	.loc 3 418 0
 	orr	r3, r3, #262144
+.LVL314:
 	orr	r3, r3, #16
-	bne	.L312
-	b	.L314
-.L319:
+.LVL315:
+	.loc 3 419 0
+	bne	.L316
+	b	.L318
+.L323:
 	.align	2
-.L318:
+.L322:
 	.word	.LANCHOR19
-	.word	.LANCHOR30
+	.word	.LANCHOR31
+	.cfi_endproc
+.LFE280:
 	.size	NandcBchSel, .-NandcBchSel
 	.section	.text.FlashBchSel,"ax",%progbits
 	.align	1
@@ -2032,16 +3599,25 @@ NandcBchSel:
 	.fpu softvfp
 	.type	FlashBchSel, %function
 FlashBchSel:
+.LFB209:
+	.loc 2 302 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L321
+.LVL316:
+	.loc 2 303 0
+	ldr	r3, .L325
 	strb	r0, [r3]
+	.loc 2 304 0
 	b	NandcBchSel
-.L322:
+.LVL317:
+.L326:
 	.align	2
-.L321:
-	.word	.LANCHOR31
+.L325:
+	.word	.LANCHOR32
+	.cfi_endproc
+.LFE209:
 	.size	FlashBchSel, .-FlashBchSel
 	.section	.text.NandCIrqEnable,"ax",%progbits
 	.align	1
@@ -2052,10 +3628,14 @@ FlashBchSel:
 	.fpu softvfp
 	.type	NandCIrqEnable, %function
 NandCIrqEnable:
+.LFB546:
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	bx	lr
+	.cfi_endproc
+.LFE546:
 	.size	NandCIrqEnable, .-NandCIrqEnable
 	.section	.text.NandCIrqDisable,"ax",%progbits
 	.align	1
@@ -2066,10 +3646,16 @@ NandCIrqEnable:
 	.fpu softvfp
 	.type	NandCIrqDisable, %function
 NandCIrqDisable:
+.LFB282:
+	.loc 3 444 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL318:
 	bx	lr
+	.cfi_endproc
+.LFE282:
 	.size	NandCIrqDisable, .-NandCIrqDisable
 	.section	.text.rk_nandc_get_irq_status,"ax",%progbits
 	.align	1
@@ -2080,11 +3666,20 @@ NandCIrqDisable:
 	.fpu softvfp
 	.type	rk_nandc_get_irq_status, %function
 rk_nandc_get_irq_status:
+.LFB283:
+	.loc 3 452 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL319:
+	.loc 3 454 0
 	ldr	r0, [r0, #372]
+.LVL320:
+	.loc 3 455 0
 	bx	lr
+	.cfi_endproc
+.LFE283:
 	.size	rk_nandc_get_irq_status, .-rk_nandc_get_irq_status
 	.section	.text.rk_nandc_flash_ready,"ax",%progbits
 	.align	1
@@ -2095,10 +3690,14 @@ rk_nandc_get_irq_status:
 	.fpu softvfp
 	.type	rk_nandc_flash_ready, %function
 rk_nandc_flash_ready:
+.LFB542:
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	bx	lr
+	.cfi_endproc
+.LFE542:
 	.size	rk_nandc_flash_ready, .-rk_nandc_flash_ready
 	.section	.text.NandcIqrWaitFlashReady,"ax",%progbits
 	.align	1
@@ -2109,10 +3708,14 @@ rk_nandc_flash_ready:
 	.fpu softvfp
 	.type	NandcIqrWaitFlashReady, %function
 NandcIqrWaitFlashReady:
+.LFB540:
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	bx	lr
+	.cfi_endproc
+.LFE540:
 	.size	NandcIqrWaitFlashReady, .-NandcIqrWaitFlashReady
 	.section	.text.rk_nandc_flash_xfer_completed,"ax",%progbits
 	.align	1
@@ -2123,10 +3726,16 @@ NandcIqrWaitFlashReady:
 	.fpu softvfp
 	.type	rk_nandc_flash_xfer_completed, %function
 rk_nandc_flash_xfer_completed:
+.LFB286:
+	.loc 3 482 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL321:
 	bx	lr
+	.cfi_endproc
+.LFE286:
 	.size	rk_nandc_flash_xfer_completed, .-rk_nandc_flash_xfer_completed
 	.section	.text.NandcSendDumpDataStart,"ax",%progbits
 	.align	1
@@ -2137,28 +3746,51 @@ rk_nandc_flash_xfer_completed:
 	.fpu softvfp
 	.type	NandcSendDumpDataStart, %function
 NandcSendDumpDataStart:
+.LFB287:
+	.loc 3 490 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL322:
+	.loc 3 503 0
 	ldr	r2, [r0, #16]
+	.loc 3 490 0
 	sub	sp, sp, #8
-	ldr	r3, .L330
+	.cfi_def_cfa_offset 8
+	.loc 3 501 0
+	ldr	r3, .L334
+.LVL323:
+	.loc 3 503 0
 	str	r2, [sp, #4]
+	.loc 3 504 0
 	ldr	r2, [sp, #4]
+.LVL324:
 	bfc	r2, #2, #1
 	str	r2, [sp, #4]
+	.loc 3 505 0
 	ldr	r2, [sp, #4]
+.LVL325:
 	str	r2, [r0, #16]
+.LVL326:
+	.loc 3 507 0
 	str	r3, [r0, #8]
+	.loc 3 508 0
 	orr	r3, r3, #4
+.LVL327:
+	.loc 3 509 0
 	str	r3, [r0, #8]
+	.loc 3 510 0
 	add	sp, sp, #8
+	.cfi_def_cfa_offset 0
 	@ sp needed
 	bx	lr
-.L331:
+.L335:
 	.align	2
-.L330:
+.L334:
 	.word	538969130
+	.cfi_endproc
+.LFE287:
 	.size	NandcSendDumpDataStart, .-NandcSendDumpDataStart
 	.section	.text.NandcSendDumpDataDone,"ax",%progbits
 	.align	1
@@ -2169,19 +3801,30 @@ NandcSendDumpDataStart:
 	.fpu softvfp
 	.type	NandcSendDumpDataDone, %function
 NandcSendDumpDataDone:
+.LFB288:
+	.loc 3 513 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL328:
 	sub	sp, sp, #8
-.L333:
+	.cfi_def_cfa_offset 8
+.L337:
+	.loc 3 517 0 discriminator 1
 	ldr	r3, [r0, #8]
 	str	r3, [sp, #4]
+	.loc 3 518 0 discriminator 1
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #11
-	bpl	.L333
+	bpl	.L337
+	.loc 3 519 0
 	add	sp, sp, #8
+	.cfi_def_cfa_offset 0
 	@ sp needed
 	bx	lr
+	.cfi_endproc
+.LFE288:
 	.size	NandcSendDumpDataDone, .-NandcSendDumpDataDone
 	.section	.text.NandcXferStart,"ax",%progbits
 	.align	1
@@ -2192,166 +3835,304 @@ NandcSendDumpDataDone:
 	.fpu softvfp
 	.type	NandcXferStart, %function
 NandcXferStart:
+.LFB289:
+	.loc 3 521 0
+	.cfi_startproc
 	@ args = 8, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL329:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
 	sub	sp, sp, #24
-	mov	r7, r1
+	.cfi_def_cfa_offset 56
+	.loc 3 521 0
+	mov	r6, r1
+	.loc 3 524 0
 	ldr	r1, [sp, #60]
+.LVL330:
+	.loc 3 521 0
 	str	r2, [sp, #4]
-	ldr	fp, [sp, #56]
+	ldr	r8, [sp, #56]
+	.loc 3 524 0
 	cmp	r1, #0
-	bne	.L350
-	adds	r5, fp, #0
+	bne	.L354
+	.loc 3 524 0 is_stmt 0 discriminator 2
+	adds	ip, r8, #0
 	it	ne
-	movne	r5, #1
-.L337:
-	ldr	r1, .L355
+	movne	ip, #1
+.L341:
+.LVL331:
+	.loc 3 528 0 is_stmt 1 discriminator 6
+	ldr	r1, .L359
+	.loc 3 531 0 discriminator 6
 	movs	r4, #0
-	ldr	r6, [r1, r0, lsl #3]
+.LVL332:
+	.loc 3 528 0 discriminator 6
+	ldr	r5, [r1, r0, lsl #3]
+.LVL333:
+	.loc 3 529 0 discriminator 6
 	add	r1, r1, r0, lsl #3
+	.loc 3 534 0 discriminator 6
 	movs	r0, #16
-	ldr	r8, [r6, #12]
+.LVL334:
+	.loc 3 532 0 discriminator 6
+	ldr	r7, [r5, #12]
+.LVL335:
+	.loc 3 529 0 discriminator 6
 	ldrb	r1, [r1, #4]	@ zero_extendqisi2
-	bfi	r8, r0, #8, #8
-	bfi	r8, r4, #3, #1
-	bfi	r4, r7, #1, #1
-	bfi	r8, r1, #5, #3
+.LVL336:
+	.loc 3 534 0 discriminator 6
+	bfi	r7, r0, #8, #8
+.LVL337:
+	.loc 3 536 0 discriminator 6
+	bfi	r7, r4, #3, #1
+	.loc 3 541 0 discriminator 6
+	bfi	r4, r6, #1, #1
+	.loc 3 538 0 discriminator 6
+	bfi	r7, r1, #5, #3
+	.loc 3 543 0 discriminator 6
 	orr	r4, r4, #8
+.LVL338:
+	.loc 3 544 0 discriminator 6
 	movs	r1, #1
+.LVL339:
 	bfi	r4, r1, #5, #2
+.LVL340:
+	.loc 3 547 0 discriminator 6
 	lsrs	r3, r3, r1
+.LVL341:
+	.loc 3 546 0 discriminator 6
 	orr	r4, r4, #536870912
+.LVL342:
 	orr	r4, r4, #1024
+.LVL343:
+	.loc 3 547 0 discriminator 6
 	bfi	r4, r3, #4, #1
-	ldr	r3, .L355+4
+.LVL344:
+	.loc 3 549 0 discriminator 6
+	ldr	r3, .L359+4
 	ldr	r3, [r3]
 	cmp	r3, #3
-	bls	.L338
-	ldr	r3, [r6, #16]
+	bls	.L342
+.LVL345:
+.LBB234:
+	.loc 3 555 0
+	ldr	r3, [r5, #16]
 	str	r3, [sp, #20]
+	.loc 3 556 0
 	ldr	r3, [sp, #20]
 	bfc	r3, #2, #1
 	str	r3, [sp, #20]
-	cmp	r5, #0
-	beq	.L339
-	ldr	r5, .L355+8
-	cmp	r7, #0
-	bne	.L340
-.L348:
+	.loc 3 558 0
+	cmp	ip, #0
+	beq	.L343
+	.loc 3 560 0
+	cmp	r6, #0
+	bne	.L344
+.LVL346:
+.L352:
+	.loc 3 583 0
 	ldr	r2, [sp, #4]
+	ldr	r10, .L359+12
 	adds	r2, r2, #1
 	asrs	r2, r2, #1
 	bfi	r4, r2, #22, #6
-	cmp	fp, #0
-	beq	.L341
-	mov	r0, fp
-.L342:
-	ldr	r3, [r5, #4]
-	ubfx	r10, r4, #22, #5
-	add	r1, r0, r10, lsl #10
-	str	r0, [r5, #8]
-	str	r0, [r5, #16]
-	clz	r7, r7
-	str	r3, [r5, #12]
-	lsrs	r7, r7, #5
-	str	r3, [r5, #20]
+	.loc 3 584 0
+	cmp	r8, #0
+	beq	.L345
+	mov	r0, r8
+.L346:
+	.loc 3 585 0 discriminator 4
+	ldr	r3, [r10, #4]
+	.loc 3 608 0 discriminator 4
+	add	r1, r0, #63
+	ubfx	fp, r4, #22, #5
+	bic	r1, r1, #63
+	.loc 3 584 0 discriminator 4
+	str	r0, [r10, #8]
+	.loc 3 608 0 discriminator 4
+	add	r1, r1, fp, lsl #10
+	.loc 3 604 0 discriminator 4
+	str	r0, [r10, #16]
+	.loc 3 608 0 discriminator 4
+	bic	r0, r0, #63
+	.loc 3 585 0 discriminator 4
+	str	r3, [r10, #12]
+	.loc 3 623 0 discriminator 4
+	clz	r6, r6
+	.loc 3 605 0 discriminator 4
+	str	r3, [r10, #20]
+	.loc 3 623 0 discriminator 4
+	lsrs	r6, r6, #5
+	.loc 3 608 0 discriminator 4
 	bl	flush_dcache_range
-	ldr	r0, [r5, #12]
-	add	r1, r0, r10, lsl #7
+.LVL347:
+	.loc 3 609 0 discriminator 4
+	ldr	r0, [r10, #20]
+.LVL348:
+	.loc 3 610 0 discriminator 4
+	add	r1, r0, #63
+	bic	r0, r0, #63
+.LVL349:
+	bic	r1, r1, #63
+	add	r1, r1, fp, lsl #7
 	bl	flush_dcache_range
+.LVL350:
+	.loc 3 614 0 discriminator 4
 	movs	r3, #1
+	.loc 3 618 0 discriminator 4
 	movs	r2, #16
+	.loc 3 614 0 discriminator 4
+	str	r3, [r10, #24]
+	.loc 3 620 0 discriminator 4
+	tst	r8, #3
+	.loc 3 615 0 discriminator 4
+	ldr	r3, [r10, #16]
+	str	r3, [r5, #20]
+	.loc 3 616 0 discriminator 4
+	ldr	r3, [r10, #20]
 	str	r3, [r5, #24]
-	tst	fp, #3
-	ldr	r3, [r5, #16]
-	str	r3, [r6, #20]
-	ldr	r3, [r5, #20]
-	str	r3, [r6, #24]
+	.loc 3 617 0 discriminator 4
 	mov	r3, #0
 	str	r3, [sp, #20]
+	.loc 3 618 0 discriminator 4
 	ldr	r3, [sp, #20]
 	bfi	r3, r2, #9, #5
+	.loc 3 621 0 discriminator 4
 	it	eq
 	moveq	r2, #2
+	.loc 3 618 0 discriminator 4
 	str	r3, [sp, #20]
+	.loc 3 619 0 discriminator 4
 	ldr	r3, [sp, #20]
 	orr	r3, r3, #448
 	str	r3, [sp, #20]
+	.loc 3 621 0 discriminator 4
 	ittt	eq
 	ldreq	r3, [sp, #20]
 	bfieq	r3, r2, #3, #3
 	streq	r3, [sp, #20]
+	.loc 3 622 0 discriminator 4
 	ldr	r3, [sp, #20]
 	orr	r3, r3, #4
 	str	r3, [sp, #20]
+	.loc 3 623 0 discriminator 4
 	ldr	r3, [sp, #20]
-	bfi	r3, r7, #1, #1
+	bfi	r3, r6, #1, #1
 	str	r3, [sp, #20]
+	.loc 3 624 0 discriminator 4
 	ldr	r3, [sp, #20]
 	orr	r3, r3, #1
 	str	r3, [sp, #20]
-.L339:
+.L343:
+	.loc 3 627 0
 	ldr	r3, [sp, #20]
-	str	r3, [r6, #16]
-.L338:
-	str	r8, [r6, #12]
-	str	r4, [r6, #8]
+	str	r3, [r5, #16]
+.L342:
+.LBE234:
+	.loc 3 629 0
+	str	r7, [r5, #12]
+	.loc 3 630 0
+	str	r4, [r5, #8]
+	.loc 3 631 0
 	orr	r4, r4, #4
-	str	r4, [r6, #8]
+.LVL351:
+	.loc 3 632 0
+	str	r4, [r5, #8]
+	.loc 3 633 0
 	add	sp, sp, #24
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L350:
-	movs	r5, #1
-	b	.L337
-.L340:
-	ldr	r3, .L355+12
-	movs	r1, #0
-	ldr	lr, [r5, #4]
-	mov	r0, r1
+.LVL352:
+.L354:
+	.cfi_restore_state
+	mov	ip, #1
+	b	.L341
+.LVL353:
+.L344:
+.LBB236:
+.LBB235:
+	.loc 3 562 0
+	ldr	r3, .L359+8
+	.loc 3 563 0
+	ldr	r0, [sp, #60]
+	ldr	r10, .L359+12
+	.loc 3 562 0
 	ldr	r3, [r3]
 	cmp	r3, #25
 	ite	cc
 	movcc	r3, #64
 	movcs	r3, #128
 	str	r3, [sp, #8]
+.LVL354:
+	.loc 3 563 0
 	ldr	r3, [sp, #4]
+.LVL355:
 	lsrs	r3, r3, #1
 	str	r3, [sp, #12]
-	ldr	r3, [sp, #60]
-.L344:
+	movs	r3, #0
+	mov	ip, r3
+.LVL356:
+.L348:
+	.loc 3 563 0 is_stmt 0 discriminator 1
 	ldr	r2, [sp, #12]
-	cmp	r0, r2
-	bcs	.L348
-	ldr	r2, [sp, #60]
-	bic	r10, r1, #3
-	cbz	r2, .L345
-	ldrh	ip, [r3]
-	adds	r3, r3, #4
-	ldrh	r2, [r3, #-2]
-	orr	ip, ip, r2, lsl #16
-	str	ip, [lr, r10]
-.L346:
+	cmp	ip, r2
+	bcs	.L352
+	.loc 3 565 0 is_stmt 1
+	ldr	r1, [sp, #60]
+	cbz	r1, .L349
+	.loc 3 567 0
+	ldrh	fp, [r0]
+	.loc 3 568 0
+	adds	r0, r0, #4
+.LVL357:
+	.loc 3 567 0
+	ldrh	r1, [r0, #-2]
+.LVL358:
+	bic	lr, r3, #3
+	ldr	r2, [r10, #4]
+	orr	r1, fp, r1, lsl #16
+	str	r1, [r2, lr]
+.L350:
 	ldr	r2, [sp, #8]
-	adds	r0, r0, #1
-	add	r1, r1, r2
-	b	.L344
-.L345:
+	.loc 3 563 0 discriminator 2
+	add	ip, ip, #1
+.LVL359:
+	add	r3, r3, r2
+	b	.L348
+.L349:
+	.loc 3 571 0
+	ldr	r1, [r10, #4]
+	bic	lr, r3, #3
 	mov	r2, #-1
-	str	r2, [lr, r10]
+	str	r2, [r1, lr]
+	b	.L350
+.LVL360:
+.L345:
+.LBE235:
+	.loc 3 584 0 discriminator 1
+	ldr	r0, [r10]
 	b	.L346
-.L341:
-	ldr	r3, .L355+8
-	ldr	r0, [r3]
-	b	.L342
-.L356:
+.L360:
 	.align	2
-.L355:
+.L359:
 	.word	.LANCHOR6
-	.word	.LANCHOR32
 	.word	.LANCHOR33
-	.word	.LANCHOR30
+	.word	.LANCHOR31
+	.word	.LANCHOR34
+.LBE236:
+	.cfi_endproc
+.LFE289:
 	.size	NandcXferStart, .-NandcXferStart
 	.section	.text.NandcXferComp,"ax",%progbits
 	.align	1
@@ -2362,95 +4143,130 @@ NandcXferStart:
 	.fpu softvfp
 	.type	NandcXferComp, %function
 NandcXferComp:
+.LFB290:
+	.loc 3 636 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L387
+.LVL361:
+	.loc 3 645 0
+	ldr	r3, .L389
+	.loc 3 636 0
 	push	{r0, r1, r4, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -8
+	.cfi_offset 14, -4
+	.loc 3 645 0
 	ldr	r1, [r3, r0, lsl #3]
-	ldr	r3, .L387+4
+.LVL362:
+	.loc 3 648 0
+	ldr	r3, .L389+4
 	ldr	r0, [r3]
+.LVL363:
 	cmp	r0, #3
-	bls	.L380
+	bls	.L382
+	.loc 3 648 0 is_stmt 0 discriminator 1
 	ldr	r3, [r1, #16]
 	lsls	r2, r3, #29
-	bpl	.L380
+	bpl	.L382
+.LVL364:
+.LBB237:
+	.loc 3 655 0 is_stmt 1
 	ldr	r3, [r1, #16]
 	tst	r3, #2
+	.loc 3 657 0
 	ldr	r3, [r1, #8]
 	str	r3, [sp]
-	beq	.L367
-.L361:
+	.loc 3 655 0
+	beq	.L369
+.L365:
+	.loc 3 658 0
 	ldr	r2, [r1, #28]
 	ldr	r3, [sp]
 	ubfx	r2, r2, #16, #5
 	ubfx	r3, r3, #22, #6
 	cmp	r2, r3
-	bge	.L365
+	bge	.L366
+	.loc 3 660 0
 	cmp	r0, #5
-	bls	.L361
+	bls	.L365
+.LBB238:
+	.loc 3 663 0
 	ldr	r3, [r1]
 	str	r3, [sp, #4]
+	.loc 3 664 0
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #18
-	bpl	.L361
+	bpl	.L365
+	.loc 3 664 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #4]
 	lsls	r4, r3, #14
-	bpl	.L361
-.L365:
-	ldr	r4, .L387+8
-	ldr	r3, [r4, #24]
-	cbz	r3, .L366
-	ldr	r0, [r4, #16]
-	ldr	r1, [sp]
-	ubfx	r1, r1, #22, #5
-	add	r1, r0, r1, lsl #10
-	bl	invalidate_dcache_range
-	ldr	r0, [r4, #20]
-	ldr	r1, [sp]
-	ubfx	r1, r1, #22, #5
-	add	r1, r0, r1, lsl #7
-	bl	invalidate_dcache_range
+	bpl	.L365
 .L366:
-	ldr	r3, .L387+8
+.LBE238:
+	.loc 3 735 0 is_stmt 1
+	ldr	r3, .L389+8
 	movs	r2, #0
 	str	r2, [r3, #24]
-.L357:
+.LVL365:
+.L361:
+.LBE237:
+	.loc 3 745 0
 	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 8
 	@ sp needed
 	pop	{r4, pc}
-.L368:
+.LVL366:
+.L370:
+	.cfi_restore_state
+.LBB239:
+	.loc 3 705 0
 	ldr	r3, [r1, #8]
 	str	r3, [sp]
-.L367:
+.L369:
+	.loc 3 703 0
 	ldr	r3, [sp]
 	lsls	r2, r3, #11
-	bpl	.L368
-	ldr	r4, .L387+12
+	bpl	.L370
+	.loc 3 715 0
+	ldr	r4, .L389+12
 	ldr	r2, [r4]
-	cbz	r2, .L369
+	cbz	r2, .L371
+	.loc 3 716 0
 	mov	r0, r1
 	bl	NandcSendDumpDataStart
-.L369:
+.LVL367:
+.L371:
+	.loc 3 732 0
 	ldr	r3, [r4]
 	cmp	r3, #0
 	beq	.L366
+	.loc 3 733 0
 	mov	r0, r1
 	bl	NandcSendDumpDataDone
+.LVL368:
 	b	.L366
-.L380:
+.LVL369:
+.L382:
+.LBE239:
+	.loc 3 742 0 discriminator 1
 	ldr	r3, [r1, #8]
 	str	r3, [sp]
+	.loc 3 743 0 discriminator 1
 	ldr	r3, [sp]
 	lsls	r3, r3, #11
-	bpl	.L380
-	b	.L357
-.L388:
+	bpl	.L382
+	b	.L361
+.L390:
 	.align	2
-.L387:
+.L389:
 	.word	.LANCHOR6
-	.word	.LANCHOR32
 	.word	.LANCHOR33
 	.word	.LANCHOR34
+	.word	.LANCHOR35
+	.cfi_endproc
+.LFE290:
 	.size	NandcXferComp, .-NandcXferComp
 	.section	.text.Ftl_log2,"ax",%progbits
 	.align	1
@@ -2461,22 +4277,41 @@ NandcXferComp:
 	.fpu softvfp
 	.type	Ftl_log2, %function
 Ftl_log2:
+.LFB293:
+	.file 4 "drivers/rknand/rkftl/FtlPlat.c"
+	.loc 4 144 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL370:
+	.loc 4 148 0
 	movs	r1, #0
+	.loc 4 146 0
 	movs	r2, #1
-.L390:
+.LVL371:
+.L392:
+	.loc 4 148 0 discriminator 1
 	cmp	r2, r0
 	uxth	r3, r1
+.LVL372:
 	add	r1, r1, #1
-	bls	.L391
+	bls	.L393
+.LVL373:
+	.loc 4 150 0
 	subs	r0, r3, #1
+.LVL374:
+	.loc 4 152 0
 	uxth	r0, r0
 	bx	lr
-.L391:
+.LVL375:
+.L393:
+	.loc 4 149 0 discriminator 3
 	lsls	r2, r2, #1
-	b	.L390
+.LVL376:
+	b	.L392
+	.cfi_endproc
+.LFE293:
 	.size	Ftl_log2, .-Ftl_log2
 	.section	.text.FtlPrintInfo,"ax",%progbits
 	.align	1
@@ -2487,10 +4322,16 @@ Ftl_log2:
 	.fpu softvfp
 	.type	FtlPrintInfo, %function
 FtlPrintInfo:
+.LFB294:
+	.loc 4 176 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL377:
 	bx	lr
+	.cfi_endproc
+.LFE294:
 	.size	FtlPrintInfo, .-FtlPrintInfo
 	.section	.text.FtlSysBlkNumInit,"ax",%progbits
 	.align	1
@@ -2501,41 +4342,57 @@ FtlPrintInfo:
 	.fpu softvfp
 	.type	FtlSysBlkNumInit, %function
 FtlSysBlkNumInit:
+.LFB295:
+	.loc 4 182 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L394
+.LVL378:
+	.loc 4 185 0
+	ldr	r3, .L396
 	cmp	r0, #24
 	it	cc
 	movcc	r0, #24
-	ldr	r2, .L394+4
+.LVL379:
+	.loc 4 186 0
+	ldr	r2, .L396+4
+	.loc 4 185 0
 	str	r0, [r3]
-	ldr	r3, .L394+8
+	.loc 4 186 0
+	ldr	r3, .L396+8
 	ldrh	r3, [r3]
 	muls	r3, r0, r3
 	str	r3, [r2]
-	ldr	r2, .L394+12
+	.loc 4 187 0
+	ldr	r2, .L396+12
 	ldrh	r2, [r2]
 	subs	r0, r2, r0
-	ldr	r2, .L394+16
+.LVL380:
+	ldr	r2, .L396+16
 	strh	r0, [r2]	@ movhi
+	.loc 4 191 0
 	movs	r0, #0
-	ldr	r2, .L394+20
+	.loc 4 188 0
+	ldr	r2, .L396+20
 	ldr	r2, [r2]
 	subs	r3, r2, r3
-	ldr	r2, .L394+24
+	ldr	r2, .L396+24
 	str	r3, [r2]
+	.loc 4 191 0
 	bx	lr
-.L395:
+.L397:
 	.align	2
-.L394:
-	.word	.LANCHOR35
-	.word	.LANCHOR37
+.L396:
 	.word	.LANCHOR36
-	.word	.LANCHOR39
 	.word	.LANCHOR38
-	.word	.LANCHOR41
+	.word	.LANCHOR37
 	.word	.LANCHOR40
+	.word	.LANCHOR39
+	.word	.LANCHOR42
+	.word	.LANCHOR41
+	.cfi_endproc
+.LFE295:
 	.size	FtlSysBlkNumInit, .-FtlSysBlkNumInit
 	.global	__aeabi_idiv
 	.section	.text.FtlConstantsInit,"ax",%progbits
@@ -2547,36 +4404,73 @@ FtlSysBlkNumInit:
 	.fpu softvfp
 	.type	FtlConstantsInit, %function
 FtlConstantsInit:
+.LFB296:
+	.loc 4 200 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL381:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
 	mov	r10, r0
+	.loc 4 204 0
 	ldrh	r7, [r0, #8]
+	.loc 4 200 0
 	sub	sp, sp, #24
-	ldr	r3, .L424
-	ldr	r1, .L424+4
+	.cfi_def_cfa_offset 56
+	.loc 4 204 0
+	ldr	r3, .L425
+	.loc 4 207 0
+	ldr	r1, .L425+4
 	ldrh	r6, [r10, #14]
-	ldr	r2, .L424+8
+	.loc 4 206 0
+	ldr	r2, .L425+8
+	.loc 4 204 0
 	strh	r7, [r3]	@ movhi
+	.loc 4 205 0
 	ldrh	r3, [r0, #10]
+	.loc 4 206 0
 	ldrh	r0, [r0, #12]
+.LVL382:
+	.loc 4 207 0
 	strh	r6, [r1]	@ movhi
+.LVL383:
 	str	r1, [sp, #20]
-	ldr	r1, .L424+12
-	ldr	r4, .L424+16
+	.loc 4 210 0
+	ldr	r1, .L425+12
+	.loc 4 205 0
+	ldr	r4, .L425+16
+	.loc 4 206 0
 	strh	r0, [r2]	@ movhi
+	.loc 4 209 0
 	movs	r2, #0
+	.loc 4 205 0
 	strh	r3, [r4]	@ movhi
 	str	r4, [sp, #8]
-.L397:
+.LVL384:
+.L399:
+	.loc 4 210 0 discriminator 3
 	strb	r2, [r2, r1]
+	.loc 4 209 0 discriminator 3
 	adds	r2, r2, #1
+.LVL385:
 	cmp	r2, #32
-	bne	.L397
+	bne	.L399
+	.loc 4 211 0
 	ldrh	r1, [r10, #14]
 	ldrh	r2, [r10, #20]
+.LVL386:
 	cmp	r2, r1, lsr #8
-	bcs	.L398
+	bcs	.L400
+	.loc 4 215 0
 	uxtb	r8, r0
 	lsl	r2, r8, #1
 	uxtb	r2, r2
@@ -2584,179 +4478,288 @@ FtlConstantsInit:
 	subs	r2, r3, #1
 	muls	r2, r0, r2
 	str	r2, [sp, #12]
+	.loc 4 213 0
 	movs	r2, #0
-.L399:
+.L401:
+.LVL387:
+	.loc 4 213 0 is_stmt 0 discriminator 1
 	cmp	r2, r0
-	bcs	.L401
+	bcs	.L403
 	ldr	r4, [sp, #12]
+	.loc 4 215 0 is_stmt 1
 	sub	fp, r2, r0
 	uxtb	r1, r2
 	adds	r5, r2, r4
-	ldr	r4, .L424+12
+	ldr	r4, .L425+12
 	add	r4, r4, r5
+	.loc 4 213 0
 	movs	r5, #0
 	mov	lr, r4
-	ldr	r4, .L424+12
+	.loc 4 215 0
+	ldr	r4, .L425+12
+	.loc 4 213 0
 	mov	ip, r5
+	.loc 4 215 0
 	add	fp, fp, r4
-	b	.L402
-.L400:
+	b	.L404
+.LVL388:
+.L402:
+	.loc 4 216 0 discriminator 3
 	add	r4, r8, r1
+	.loc 4 215 0 discriminator 3
 	strb	r1, [fp, r5]
+	.loc 4 216 0 discriminator 3
 	str	r4, [sp, #16]
+	.loc 4 214 0 discriminator 3
 	add	ip, ip, #1
+.LVL389:
+	.loc 4 216 0 discriminator 3
 	ldrb	r4, [sp, #16]	@ zero_extendqisi2
 	strb	r4, [lr, r5]
 	ldr	r4, [sp, #4]
 	add	r1, r1, r4
 	uxtb	r1, r1
-.L402:
+.LVL390:
+.L404:
+	.loc 4 214 0 discriminator 1
 	cmp	ip, r3
 	add	r5, r5, r0
-	bcc	.L400
+	bcc	.L402
+	.loc 4 213 0 discriminator 2
 	adds	r2, r2, #1
-	b	.L399
-.L401:
+.LVL391:
+	b	.L401
+.LVL392:
+.L403:
+	.loc 4 219 0
 	ldr	r2, [sp, #8]
+.LVL393:
 	lsls	r3, r3, #1
+	.loc 4 220 0
 	lsrs	r6, r6, #1
+	.loc 4 219 0
 	strh	r3, [r2]	@ movhi
-	ldr	r3, .L424+4
+	.loc 4 220 0
+	ldr	r3, .L425+4
 	strh	r6, [r3]	@ movhi
-.L398:
-	ldr	r3, .L424+20
+.L400:
+	.loc 4 225 0
+	ldr	r3, .L425+20
 	movs	r2, #5
+	.loc 4 227 0
 	cmp	r7, #1
+	.loc 4 226 0
 	mov	r1, #0
+	.loc 4 225 0
 	strh	r2, [r3]	@ movhi
-	ldr	r2, .L424+24
+	.loc 4 226 0
+	ldr	r2, .L425+24
+	.loc 4 228 0
 	it	eq
 	strheq	r7, [r3]	@ movhi
-	ldr	r3, .L424+28
+	.loc 4 229 0
+	ldr	r3, .L425+28
+	.loc 4 226 0
 	strh	r1, [r2]	@ movhi
+	.loc 4 229 0
 	mov	r1, #4352
 	strh	r1, [r3]	@ movhi
-	ldr	r1, .L424+32
+	.loc 4 230 0
+	ldr	r1, .L425+32
 	ldrb	r1, [r1]	@ zero_extendqisi2
 	str	r1, [sp, #4]
-	cbz	r1, .L404
+	cbz	r1, .L406
+	.loc 4 231 0
 	mov	r1, #384
 	strh	r1, [r3]	@ movhi
-.L404:
+.L406:
+	.loc 4 233 0
 	ldr	r3, [sp, #8]
 	str	r2, [sp, #16]
-	ldr	fp, .L424+120
+	.loc 4 236 0
+	ldr	fp, .L425+120
+	.loc 4 233 0
 	ldrh	r5, [r3]
-	ldr	r3, .L424+36
-	ldr	r8, .L424+124
+	ldr	r3, .L425+36
+	.loc 4 239 0
+	ldr	r8, .L425+124
+	.loc 4 233 0
 	smulbb	r5, r5, r0
 	uxth	r5, r5
 	strh	r5, [r3]	@ movhi
+	.loc 4 234 0
 	ldr	r3, [sp, #20]
 	ldrh	r4, [r3]
-	ldr	r3, .L424+40
+	ldr	r3, .L425+40
 	smulbb	r0, r0, r4
 	uxth	r0, r0
 	strh	r0, [r3]	@ movhi
+	.loc 4 235 0
 	bl	Ftl_log2
-	ldr	r3, .L424+44
+.LVL394:
+	ldr	r3, .L425+44
+	.loc 4 236 0
 	ldrh	r6, [r10, #16]
+	.loc 4 237 0
 	ldrh	r1, [r10, #18]
+	.loc 4 235 0
 	strh	r0, [r3]	@ movhi
-	ldr	r3, .L424+48
+	.loc 4 237 0
+	ldr	r3, .L425+48
+	.loc 4 238 0
 	smulbb	r0, r5, r6
+	.loc 4 236 0
 	strh	r6, [fp]	@ movhi
+	.loc 4 237 0
 	str	r1, [sp, #12]
 	strh	r1, [r3]	@ movhi
-	ldr	r3, .L424+52
+	.loc 4 238 0
+	ldr	r3, .L425+52
 	strh	r0, [r3]	@ movhi
+	.loc 4 239 0
 	ldrh	r3, [r10, #20]
+	.loc 4 240 0
 	mov	r0, r3
+	.loc 4 239 0
 	strh	r3, [r8]	@ movhi
+	.loc 4 240 0
 	str	r3, [sp, #8]
 	bl	Ftl_log2
+.LVL395:
+	.loc 4 245 0
 	ldr	r3, [sp, #8]
+	.loc 4 240 0
 	mov	r7, r0
-	ldr	ip, .L424+128
+	ldr	ip, .L425+128
+	.loc 4 257 0
 	cmp	r4, #1024
-	ldr	lr, .L424+132
+	.loc 4 245 0
+	ldr	lr, .L425+132
+	.loc 4 257 0
 	ldr	r2, [sp, #16]
+	.loc 4 240 0
 	strh	r0, [ip]	@ movhi
+	.loc 4 245 0
 	lsl	r0, r3, #9
+	.loc 4 257 0
 	ldr	r1, [sp, #12]
+	.loc 4 245 0
 	uxth	r0, r0
 	strh	r0, [lr]	@ movhi
+	.loc 4 246 0
 	lsr	r0, r0, #8
-	ldr	lr, .L424+136
+	ldr	lr, .L425+136
+	.loc 4 267 0
 	mul	r1, r3, r1
+	.loc 4 246 0
 	strh	r0, [lr]	@ movhi
+	.loc 4 247 0
 	ldrh	lr, [r10, #26]
 	mov	r10, ip
-	ldr	r0, .L424+56
+.LVL396:
+	ldr	r0, .L425+56
 	strh	lr, [r0]	@ movhi
+	.loc 4 249 0
 	mul	lr, r4, r5
-	ldr	r0, .L424+60
+	ldr	r0, .L425+60
 	str	lr, [r0]
+	.loc 4 258 0
 	itt	hi
 	uxtbhi	r0, r4
 	strhhi	r0, [r2]	@ movhi
+	.loc 4 265 0
 	ldrh	r2, [r2]
 	subs	r2, r4, r2
 	muls	r2, r5, r2
 	muls	r2, r3, r2
 	muls	r6, r2, r6
-	ldr	r2, .L424+64
+	ldr	r2, .L425+64
 	asrs	r6, r6, #11
 	str	r6, [r2]
-	ldr	r6, .L424+28
+	.loc 4 267 0
+	ldr	r6, .L425+28
 	ldrh	r0, [r6]
 	lsls	r0, r0, #3
 	bl	__aeabi_idiv
+.LVL397:
 	uxth	r0, r0
 	mov	r3, r6
-	ldr	r6, .L424+68
+	ldr	r6, .L425+68
+	.loc 4 268 0
 	cmp	r0, #4
+	.loc 4 269 0
 	itt	ls
 	movls	r2, #4
 	strhls	r2, [r6]	@ movhi
+	.loc 4 271 0
 	ldr	r2, [sp, #4]
+	.loc 4 267 0
 	it	hi
 	strhhi	r0, [r6]	@ movhi
-	cbz	r2, .L408
+	.loc 4 271 0
+	cbz	r2, .L410
+	.loc 4 272 0
 	mov	r2, #640
 	strh	r2, [r3]	@ movhi
-.L408:
+.L410:
+	.loc 4 273 0
 	ldrh	r3, [r3]
+	.loc 4 275 0
 	lsls	r4, r4, #6
-	ldr	r2, .L424+72
+	.loc 4 273 0
+	ldr	r2, .L425+72
+	.loc 4 281 0
 	mov	r1, r5
 	ldrh	r0, [r6]
+	.loc 4 273 0
 	asrs	r3, r3, r7
+	.loc 4 275 0
 	adds	r7, r7, #9
 	asrs	r4, r4, r7
-	ldr	r7, .L424+76
+	.loc 4 279 0
+	ldr	r7, .L425+76
+	.loc 4 273 0
 	adds	r3, r3, #2
 	strh	r3, [r2]	@ movhi
-	ldr	r3, .L424+80
+	.loc 4 275 0
+	ldr	r3, .L425+80
 	strh	r4, [r3]	@ movhi
 	uxth	r4, r4
+	.loc 4 279 0
 	mul	r3, r4, r5
+	.loc 4 281 0
 	adds	r4, r4, #8
+	.loc 4 279 0
 	str	r3, [r7]
+	.loc 4 281 0
 	bl	__aeabi_uidiv
+.LVL398:
 	uxtah	r0, r4, r0
-	ldr	r4, .L424+84
+	ldr	r4, .L425+84
+	.loc 4 282 0
 	cmp	r5, #1
+	.loc 4 300 0
+	ldr	r5, .L425+88
+	.loc 4 283 0
 	it	eq
 	addeq	r0, r0, #4
 	str	r0, [r4]
+	.loc 4 286 0
 	ldrh	r0, [r4]
 	bl	FtlSysBlkNumInit
+.LVL399:
+	.loc 4 287 0
 	ldr	r2, [r4]
+	.loc 4 294 0
 	movs	r0, #24
-	ldr	r3, .L424+88
+	.loc 4 287 0
+	ldr	r3, .L425+92
+	.loc 4 300 0
+	ldrb	r5, [r5]	@ zero_extendqisi2
+	.loc 4 287 0
 	str	r2, [r3]
-	ldr	r3, .L424+92
+	.loc 4 289 0
+	ldr	r3, .L425+96
 	ldr	r2, [r3]
 	ldrh	r3, [fp]
 	lsls	r2, r2, #2
@@ -2764,85 +4767,117 @@ FtlConstantsInit:
 	ldrh	r2, [r10]
 	adds	r2, r2, #9
 	lsrs	r3, r3, r2
-	ldr	r2, .L424+96
+	ldr	r2, .L425+100
 	adds	r3, r3, #2
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L424+100
+	.loc 4 294 0
+	ldr	r2, .L425+104
 	strh	r0, [r2]	@ movhi
+	.loc 4 296 0
 	movs	r0, #0
-	ldr	r2, .L424+104
+	ldr	r2, .L425+108
 	str	r0, [r2]
+	.loc 4 298 0
 	ldrh	r0, [r6]
 	adds	r2, r0, #3
 	strh	r2, [r6]	@ movhi
+	.loc 4 299 0
 	ldr	r2, [r7]
 	adds	r4, r2, #3
 	str	r4, [r7]
-	ldr	r4, .L424+108
-	ldrb	r4, [r4]	@ zero_extendqisi2
-	cbz	r4, .L411
-	adds	r0, r0, #4
+	.loc 4 300 0
+	cbz	r5, .L413
+	.loc 4 302 0
 	adds	r2, r2, #5
+	.loc 4 301 0
+	adds	r0, r0, #4
 	strh	r0, [r6]	@ movhi
+.L424:
+	.loc 4 304 0
 	str	r2, [r7]
-.L411:
-	ldr	r1, .L424+112
+.L414:
+	.loc 4 307 0
+	ldr	r1, .L425+112
 	movs	r2, #0
 	strh	r2, [r1]	@ movhi
-	ldr	r2, .L424+116
+	.loc 4 308 0
+	ldr	r2, .L425+116
 	ldrh	r0, [r2]
+.LVL400:
+	.loc 4 309 0
 	lsrs	r2, r0, #3
+	.loc 4 308 0
 	add	r2, r2, r0, lsl #1
+	.loc 4 339 0
 	movs	r0, #0
+.LVL401:
+	.loc 4 308 0
 	adds	r2, r2, #52
 	add	r3, r2, r3, lsl #2
+.LVL402:
+	.loc 4 310 0
 	ldrh	r2, [r8]
 	cmp	r3, r2, lsl #9
+	.loc 4 311 0
 	itt	cc
 	movcc	r3, #1
 	strhcc	r3, [r1]	@ movhi
+	.loc 4 339 0
 	add	sp, sp, #24
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L425:
+.LVL403:
+.L413:
+	.cfi_restore_state
+	.loc 4 303 0
+	cmp	r4, #7
+	bhi	.L414
+	.loc 4 304 0
+	movs	r2, #8
+	b	.L424
+.L426:
 	.align	2
-.L424:
-	.word	.LANCHOR42
-	.word	.LANCHOR39
-	.word	.LANCHOR44
-	.word	.LANCHOR45
+.L425:
 	.word	.LANCHOR43
+	.word	.LANCHOR40
+	.word	.LANCHOR45
 	.word	.LANCHOR46
+	.word	.LANCHOR44
 	.word	.LANCHOR47
 	.word	.LANCHOR48
-	.word	.LANCHOR1
-	.word	.LANCHOR36
 	.word	.LANCHOR49
+	.word	.LANCHOR1
+	.word	.LANCHOR37
 	.word	.LANCHOR50
-	.word	.LANCHOR52
+	.word	.LANCHOR51
 	.word	.LANCHOR53
-	.word	.LANCHOR58
-	.word	.LANCHOR41
+	.word	.LANCHOR54
 	.word	.LANCHOR59
+	.word	.LANCHOR42
 	.word	.LANCHOR60
 	.word	.LANCHOR61
-	.word	.LANCHOR63
 	.word	.LANCHOR62
-	.word	.LANCHOR35
 	.word	.LANCHOR64
-	.word	.LANCHOR40
+	.word	.LANCHOR63
+	.word	.LANCHOR36
+	.word	.LANCHOR8
 	.word	.LANCHOR65
+	.word	.LANCHOR41
 	.word	.LANCHOR66
 	.word	.LANCHOR67
-	.word	.LANCHOR8
 	.word	.LANCHOR68
-	.word	.LANCHOR38
-	.word	.LANCHOR51
-	.word	.LANCHOR54
+	.word	.LANCHOR69
+	.word	.LANCHOR39
+	.word	.LANCHOR52
 	.word	.LANCHOR55
 	.word	.LANCHOR56
 	.word	.LANCHOR57
+	.word	.LANCHOR58
+	.cfi_endproc
+.LFE296:
 	.size	FtlConstantsInit, .-FtlConstantsInit
 	.section	.text.IsBlkInVendorPart,"ax",%progbits
 	.align	1
@@ -2853,35 +4888,61 @@ FtlConstantsInit:
 	.fpu softvfp
 	.type	IsBlkInVendorPart, %function
 IsBlkInVendorPart:
+.LFB299:
+	.loc 4 640 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L433
+.LVL404:
+	.loc 4 643 0
+	ldr	r3, .L434
 	ldrh	r3, [r3]
-	cbz	r3, .L432
-	ldr	r3, .L433+4
-	ldr	r2, .L433+8
+	cbz	r3, .L433
+.LBB242:
+.LBB243:
+	.loc 4 645 0
+	ldr	r3, .L434+4
+	.loc 4 644 0
+	ldr	r2, .L434+8
+	.loc 4 645 0
 	ldr	r3, [r3]
 	ldrh	r2, [r2]
 	add	r2, r3, r2, lsl #1
-.L428:
+.L429:
+	.loc 4 644 0
 	cmp	r3, r2
-	bne	.L429
-.L432:
+	bne	.L430
+.L433:
+.LBE243:
+.LBE242:
+	.loc 4 650 0
 	movs	r0, #0
+.LVL405:
 	bx	lr
-.L429:
+.LVL406:
+.L430:
+.LBB245:
+.LBB244:
+	.loc 4 645 0
 	ldrh	r1, [r3], #2
 	cmp	r0, r1
-	bne	.L428
+	bne	.L429
+	.loc 4 646 0
 	movs	r0, #1
+.LVL407:
+.LBE244:
+.LBE245:
+	.loc 4 651 0
 	bx	lr
-.L434:
+.L435:
 	.align	2
-.L433:
-	.word	.LANCHOR69
+.L434:
 	.word	.LANCHOR70
-	.word	.LANCHOR60
+	.word	.LANCHOR71
+	.word	.LANCHOR61
+	.cfi_endproc
+.LFE299:
 	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
 	.section	.text.FtlGetCap,"ax",%progbits
 	.align	1
@@ -2892,16 +4953,20 @@ IsBlkInVendorPart:
 	.fpu softvfp
 	.type	FtlGetCap, %function
 FtlGetCap:
+.LFB534:
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L436
+	ldr	r3, .L437
 	ldr	r0, [r3]
 	bx	lr
-.L437:
+.L438:
 	.align	2
-.L436:
-	.word	.LANCHOR67
+.L437:
+	.word	.LANCHOR68
+	.cfi_endproc
+.LFE534:
 	.size	FtlGetCap, .-FtlGetCap
 	.section	.text.FtlGetCapacity,"ax",%progbits
 	.align	1
@@ -2912,16 +4977,20 @@ FtlGetCap:
 	.fpu softvfp
 	.type	FtlGetCapacity, %function
 FtlGetCapacity:
+.LFB532:
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L439
+	ldr	r3, .L440
 	ldr	r0, [r3]
 	bx	lr
-.L440:
+.L441:
 	.align	2
-.L439:
-	.word	.LANCHOR67
+.L440:
+	.word	.LANCHOR68
+	.cfi_endproc
+.LFE532:
 	.size	FtlGetCapacity, .-FtlGetCapacity
 	.section	.text.ftl_get_density,"ax",%progbits
 	.align	1
@@ -2932,16 +5001,24 @@ FtlGetCapacity:
 	.fpu softvfp
 	.type	ftl_get_density, %function
 ftl_get_density:
+.LFB312:
+	.loc 4 1835 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L442
+.LVL408:
+	.loc 4 1837 0
+	ldr	r3, .L443
 	ldr	r0, [r3]
+.LVL409:
 	bx	lr
-.L443:
+.L444:
 	.align	2
-.L442:
-	.word	.LANCHOR67
+.L443:
+	.word	.LANCHOR68
+	.cfi_endproc
+.LFE312:
 	.size	ftl_get_density, .-ftl_get_density
 	.section	.text.FtlGetLpn,"ax",%progbits
 	.align	1
@@ -2952,16 +5029,22 @@ ftl_get_density:
 	.fpu softvfp
 	.type	FtlGetLpn, %function
 FtlGetLpn:
+.LFB313:
+	.loc 4 1840 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L445
+	.loc 4 1842 0
+	ldr	r3, .L446
 	ldr	r0, [r3]
 	bx	lr
-.L446:
+.L447:
 	.align	2
-.L445:
-	.word	.LANCHOR71
+.L446:
+	.word	.LANCHOR72
+	.cfi_endproc
+.LFE313:
 	.size	FtlGetLpn, .-FtlGetLpn
 	.section	.text.FtlGetCurEraseBlock,"ax",%progbits
 	.align	1
@@ -2972,20 +5055,27 @@ FtlGetLpn:
 	.fpu softvfp
 	.type	FtlGetCurEraseBlock, %function
 FtlGetCurEraseBlock:
+.LFB314:
+	.loc 4 1845 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L448
-	ldr	r3, .L448+4
+	.loc 4 1846 0
+	ldr	r2, .L449
+	ldr	r3, .L449+4
 	ldr	r0, [r2]
 	ldrh	r3, [r3]
+	.loc 4 1847 0
 	muls	r0, r3, r0
 	bx	lr
-.L449:
+.L450:
 	.align	2
-.L448:
-	.word	.LANCHOR72
-	.word	.LANCHOR36
+.L449:
+	.word	.LANCHOR73
+	.word	.LANCHOR37
+	.cfi_endproc
+.LFE314:
 	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
 	.section	.text.FtlGetAllBlockNum,"ax",%progbits
 	.align	1
@@ -2996,20 +5086,27 @@ FtlGetCurEraseBlock:
 	.fpu softvfp
 	.type	FtlGetAllBlockNum, %function
 FtlGetAllBlockNum:
+.LFB315:
+	.loc 4 1850 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L451
-	ldr	r3, .L451+4
+	.loc 4 1851 0
+	ldr	r2, .L452
+	ldr	r3, .L452+4
 	ldrh	r0, [r2]
 	ldrh	r3, [r3]
+	.loc 4 1852 0
 	muls	r0, r3, r0
 	bx	lr
-.L452:
+.L453:
 	.align	2
-.L451:
-	.word	.LANCHOR36
-	.word	.LANCHOR39
+.L452:
+	.word	.LANCHOR37
+	.word	.LANCHOR40
+	.cfi_endproc
+.LFE315:
 	.size	FtlGetAllBlockNum, .-FtlGetAllBlockNum
 	.section	.text.FtlBbmMapBadBlock,"ax",%progbits
 	.align	1
@@ -3020,21 +5117,44 @@ FtlGetAllBlockNum:
 	.fpu softvfp
 	.type	FtlBbmMapBadBlock, %function
 FtlBbmMapBadBlock:
+.LFB316:
+	.file 5 "drivers/rknand/rkftl/FtlBbm.c"
+	.loc 5 5 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L454
+.LVL410:
+	.loc 5 12 0
+	ldr	r3, .L455
+	.loc 5 5 0
 	push	{r0, r1, r2, r4, r5, r6, r7, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -20
+	.cfi_offset 5, -16
+	.cfi_offset 6, -12
+	.cfi_offset 7, -8
+	.cfi_offset 14, -4
+	.loc 5 5 0
 	mov	r5, r0
+	.loc 5 12 0
 	ldrh	r4, [r3]
 	mov	r1, r4
 	bl	__aeabi_uidiv
+.LVL411:
 	mov	r1, r4
-	ldr	r4, .L454+4
+	.loc 5 15 0
+	ldr	r4, .L455+4
+	.loc 5 12 0
 	uxth	r6, r0
+.LVL412:
 	mov	r0, r5
 	bl	__aeabi_uidivmod
+.LVL413:
+	.loc 5 15 0
 	add	r2, r4, r6, lsl #2
 	uxth	r3, r1
+.LVL414:
+	.loc 5 17 0
 	ldr	r2, [r2, #28]
 	lsrs	r1, r3, #5
 	and	r7, r3, #31
@@ -3043,24 +5163,35 @@ FtlBbmMapBadBlock:
 	ldr	r7, [r2, r1, lsl #2]
 	orrs	r0, r0, r7
 	str	r0, [r2, r1, lsl #2]
+.LVL415:
+	.loc 5 18 0
 	mov	r2, r6
 	str	r0, [sp]
 	mov	r1, r5
-	ldr	r0, .L454+8
+	ldr	r0, .L455+8
 	bl	printf
+.LVL416:
+	.loc 5 19 0
 	ldrh	r3, [r4, #6]
+	.loc 5 21 0
 	movs	r0, #0
+	.loc 5 19 0
 	adds	r3, r3, #1
 	strh	r3, [r4, #6]	@ movhi
+	.loc 5 21 0
 	add	sp, sp, #12
+	.cfi_def_cfa_offset 20
 	@ sp needed
 	pop	{r4, r5, r6, r7, pc}
-.L455:
+.LVL417:
+.L456:
 	.align	2
-.L454:
-	.word	.LANCHOR49
-	.word	.LANCHOR73
+.L455:
+	.word	.LANCHOR50
+	.word	.LANCHOR74
 	.word	.LC2
+	.cfi_endproc
+.LFE316:
 	.size	FtlBbmMapBadBlock, .-FtlBbmMapBadBlock
 	.section	.text.FtlBbmIsBadBlock,"ax",%progbits
 	.align	1
@@ -3071,33 +5202,64 @@ FtlBbmMapBadBlock:
 	.fpu softvfp
 	.type	FtlBbmIsBadBlock, %function
 FtlBbmIsBadBlock:
+.LFB317:
+	.loc 5 26 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L457
+.LVL418:
+	.loc 5 34 0
+	ldr	r3, .L458
+	.loc 5 26 0
 	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 5 26 0
 	mov	r6, r0
+	.loc 5 34 0
 	ldrh	r5, [r3]
+.LVL419:
+	.loc 5 35 0
 	mov	r1, r5
 	bl	__aeabi_uidivmod
+.LVL420:
+	.loc 5 34 0
 	mov	r0, r6
+	.loc 5 35 0
 	uxth	r4, r1
+.LVL421:
+	.loc 5 34 0
 	mov	r1, r5
 	bl	__aeabi_uidiv
-	ldr	r3, .L457+4
+.LVL422:
+	.loc 5 37 0
+	ldr	r3, .L458+4
+	.loc 5 34 0
 	uxth	r0, r0
+	.loc 5 38 0
 	lsrs	r2, r4, #5
 	and	r4, r4, #31
+.LVL423:
+	.loc 5 37 0
 	add	r0, r3, r0, lsl #2
+	.loc 5 38 0
 	ldr	r3, [r0, #28]
 	ldr	r0, [r3, r2, lsl #2]
 	lsrs	r0, r0, r4
+	.loc 5 42 0
 	and	r0, r0, #1
 	pop	{r4, r5, r6, pc}
-.L458:
+.LVL424:
+.L459:
 	.align	2
-.L457:
-	.word	.LANCHOR49
-	.word	.LANCHOR73
+.L458:
+	.word	.LANCHOR50
+	.word	.LANCHOR74
+	.cfi_endproc
+.LFE317:
 	.size	FtlBbmIsBadBlock, .-FtlBbmIsBadBlock
 	.section	.text.FtlBbtInfoPrint,"ax",%progbits
 	.align	1
@@ -3108,10 +5270,14 @@ FtlBbmIsBadBlock:
 	.fpu softvfp
 	.type	FtlBbtInfoPrint, %function
 FtlBbtInfoPrint:
+.LFB536:
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	bx	lr
+	.cfi_endproc
+.LFE536:
 	.size	FtlBbtInfoPrint, .-FtlBbtInfoPrint
 	.section	.text.V2P_block,"ax",%progbits
 	.align	1
@@ -3122,31 +5288,54 @@ FtlBbtInfoPrint:
 	.fpu softvfp
 	.type	V2P_block, %function
 V2P_block:
+.LFB325:
+	.loc 1 5 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL425:
+	.loc 1 5 0
 	push	{r3, r4, r5, r6, r7, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 3, -24
+	.cfi_offset 4, -20
+	.cfi_offset 5, -16
+	.cfi_offset 6, -12
+	.cfi_offset 7, -8
+	.cfi_offset 14, -4
+	.loc 1 5 0
 	mov	r5, r1
-	ldr	r3, .L461
+	.loc 1 8 0
+	ldr	r3, .L462
+	.loc 1 5 0
 	mov	r7, r0
+	.loc 1 8 0
 	ldrh	r6, [r3]
+.LVL426:
 	mov	r1, r6
+.LVL427:
 	bl	__aeabi_uidiv
-	ldr	r3, .L461+4
+.LVL428:
+	ldr	r3, .L462+4
 	smulbb	r5, r6, r5
 	mov	r1, r6
 	ldrh	r4, [r3]
 	smulbb	r4, r4, r0
 	mov	r0, r7
 	bl	__aeabi_uidivmod
+.LVL429:
 	adds	r0, r5, r1
 	add	r0, r0, r4
+	.loc 1 10 0
 	uxth	r0, r0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L462:
+.L463:
 	.align	2
-.L461:
-	.word	.LANCHOR44
-	.word	.LANCHOR49
+.L462:
+	.word	.LANCHOR45
+	.word	.LANCHOR50
+	.cfi_endproc
+.LFE325:
 	.size	V2P_block, .-V2P_block
 	.section	.text.P2V_plane,"ax",%progbits
 	.align	1
@@ -3157,27 +5346,46 @@ V2P_block:
 	.fpu softvfp
 	.type	P2V_plane, %function
 P2V_plane:
+.LFB326:
+	.loc 1 13 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L464
+.LVL430:
+	.loc 1 16 0
+	ldr	r3, .L465
+	.loc 1 13 0
 	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 1 13 0
 	mov	r6, r0
+	.loc 1 16 0
 	ldrh	r5, [r3]
-	ldr	r3, .L464+4
+.LVL431:
+	ldr	r3, .L465+4
 	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
+.LVL432:
 	smulbb	r4, r0, r5
 	mov	r1, r5
 	mov	r0, r6
 	bl	__aeabi_uidivmod
+.LVL433:
 	add	r1, r1, r4
+	.loc 1 18 0
 	uxth	r0, r1
 	pop	{r4, r5, r6, pc}
-.L465:
+.L466:
 	.align	2
-.L464:
-	.word	.LANCHOR44
-	.word	.LANCHOR49
+.L465:
+	.word	.LANCHOR45
+	.word	.LANCHOR50
+	.cfi_endproc
+.LFE326:
 	.size	P2V_plane, .-P2V_plane
 	.section	.text.P2V_block_in_plane,"ax",%progbits
 	.align	1
@@ -3188,23 +5396,40 @@ P2V_plane:
 	.fpu softvfp
 	.type	P2V_block_in_plane, %function
 P2V_block_in_plane:
+.LFB327:
+	.loc 1 21 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL434:
 	push	{r3, lr}
-	ldr	r3, .L467
+	.cfi_def_cfa_offset 8
+	.cfi_offset 3, -8
+	.cfi_offset 14, -4
+	.loc 1 24 0
+	ldr	r3, .L468
 	ldrh	r1, [r3]
 	bl	__aeabi_uidivmod
-	ldr	r3, .L467+4
+.LVL435:
+	.loc 1 25 0
+	ldr	r3, .L468+4
+	.loc 1 24 0
 	uxth	r0, r1
+.LVL436:
+	.loc 1 25 0
 	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
+.LVL437:
+	.loc 1 27 0
 	uxth	r0, r0
 	pop	{r3, pc}
-.L468:
+.L469:
 	.align	2
-.L467:
-	.word	.LANCHOR49
-	.word	.LANCHOR44
+.L468:
+	.word	.LANCHOR50
+	.word	.LANCHOR45
+	.cfi_endproc
+.LFE327:
 	.size	P2V_block_in_plane, .-P2V_block_in_plane
 	.section	.text.ftl_cmp_data_ver,"ax",%progbits
 	.align	1
@@ -3215,24 +5440,38 @@ P2V_block_in_plane:
 	.fpu softvfp
 	.type	ftl_cmp_data_ver, %function
 ftl_cmp_data_ver:
+.LFB328:
+	.loc 1 31 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL438:
+	.loc 1 34 0
 	cmp	r0, r1
-	bls	.L470
+	bls	.L471
+	.loc 1 36 0
 	subs	r0, r0, r1
+.LVL439:
 	cmp	r0, #-2147483648
 	ite	hi
 	movhi	r0, #0
 	movls	r0, #1
 	bx	lr
-.L470:
+.LVL440:
+.L471:
+	.loc 1 40 0
 	subs	r0, r1, r0
+.LVL441:
 	cmp	r0, #-2147483648
 	ite	ls
 	movls	r0, #0
 	movhi	r0, #1
+.LVL442:
+	.loc 1 44 0
 	bx	lr
+	.cfi_endproc
+.LFE328:
 	.size	ftl_cmp_data_ver, .-ftl_cmp_data_ver
 	.section	.text.FtlFreeSysBlkQueueEmpty,"ax",%progbits
 	.align	1
@@ -3243,18 +5482,25 @@ ftl_cmp_data_ver:
 	.fpu softvfp
 	.type	FtlFreeSysBlkQueueEmpty, %function
 FtlFreeSysBlkQueueEmpty:
+.LFB331:
+	.loc 1 88 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L473
+	.loc 1 89 0
+	ldr	r3, .L474
 	ldrh	r0, [r3, #6]
+	.loc 1 90 0
 	clz	r0, r0
 	lsrs	r0, r0, #5
 	bx	lr
-.L474:
+.L475:
 	.align	2
-.L473:
-	.word	.LANCHOR74
+.L474:
+	.word	.LANCHOR75
+	.cfi_endproc
+.LFE331:
 	.size	FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty
 	.section	.text.FtlFreeSysBlkQueueFull,"ax",%progbits
 	.align	1
@@ -3265,19 +5511,26 @@ FtlFreeSysBlkQueueEmpty:
 	.fpu softvfp
 	.type	FtlFreeSysBlkQueueFull, %function
 FtlFreeSysBlkQueueFull:
+.LFB332:
+	.loc 1 93 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L476
+	.loc 1 94 0
+	ldr	r3, .L477
 	ldrh	r0, [r3, #6]
+	.loc 1 95 0
 	sub	r3, r0, #1024
 	rsbs	r0, r3, #0
 	adcs	r0, r0, r3
 	bx	lr
-.L477:
+.L478:
 	.align	2
-.L476:
-	.word	.LANCHOR74
+.L477:
+	.word	.LANCHOR75
+	.cfi_endproc
+.LFE332:
 	.size	FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull
 	.section	.text.FtlFreeSysBlkQueueIn,"ax",%progbits
 	.align	1
@@ -3288,56 +5541,99 @@ FtlFreeSysBlkQueueFull:
 	.fpu softvfp
 	.type	FtlFreeSysBlkQueueIn, %function
 FtlFreeSysBlkQueueIn:
+.LFB333:
+	.loc 1 98 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL443:
 	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 1 98 0
 	mov	r5, r0
-	ldr	r4, .L487
+.LBB246:
+.LBB247:
+	.loc 1 94 0
+	ldr	r4, .L488
+.LBE247:
+.LBE246:
+	.loc 1 101 0
 	ldrh	r3, [r4, #6]
 	cmp	r3, #1024
-	beq	.L478
-	cbz	r1, .L480
-	ldr	r3, .L487+4
+	beq	.L479
+.LVL444:
+.LBB248:
+	.loc 1 103 0
+	cbz	r1, .L481
+	.loc 1 103 0 is_stmt 0 discriminator 1
+	ldr	r3, .L488+4
 	ldr	r3, [r3]
-	cbnz	r3, .L480
+	cbnz	r3, .L481
+.LBB249:
+	.loc 1 104 0 is_stmt 1
 	bl	P2V_block_in_plane
-	ldr	r3, .L487+8
+.LVL445:
+	.loc 1 105 0
+	ldr	r3, .L488+8
+	.loc 1 104 0
 	mov	r6, r0
+.LVL446:
+	.loc 1 106 0
 	movs	r2, #1
 	mov	r1, r2
+	.loc 1 105 0
 	ldr	r0, [r3]
 	lsls	r3, r5, #10
 	str	r3, [r0, #4]
+	.loc 1 106 0
 	bl	FlashEraseBlocks
-	ldr	r3, .L487+12
+.LVL447:
+	.loc 1 107 0
+	ldr	r3, .L488+12
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r6, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r6, lsl #1]	@ movhi
-	ldr	r2, .L487+16
+	.loc 1 108 0
+	ldr	r2, .L488+16
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
-.L480:
+.LVL448:
+.L481:
+.LBE249:
+	.loc 1 110 0
 	ldrh	r3, [r4, #6]
 	adds	r3, r3, #1
 	strh	r3, [r4, #6]	@ movhi
+	.loc 1 111 0
 	ldrh	r3, [r4, #4]
 	adds	r2, r3, #4
+	.loc 1 112 0
 	adds	r3, r3, #1
 	ubfx	r3, r3, #0, #10
+	.loc 1 111 0
 	strh	r5, [r4, r2, lsl #1]	@ movhi
+	.loc 1 112 0
 	strh	r3, [r4, #4]	@ movhi
-.L478:
+.LVL449:
+.L479:
 	pop	{r4, r5, r6, pc}
-.L488:
+.L489:
 	.align	2
-.L487:
-	.word	.LANCHOR74
+.L488:
 	.word	.LANCHOR75
 	.word	.LANCHOR76
 	.word	.LANCHOR77
 	.word	.LANCHOR78
+	.word	.LANCHOR79
+.LBE248:
+	.cfi_endproc
+.LFE333:
 	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
 	.section	.text.FtlFreeSysBLkSort,"ax",%progbits
 	.align	1
@@ -3348,79 +5644,74 @@ FtlFreeSysBlkQueueIn:
 	.fpu softvfp
 	.type	FtlFreeSysBLkSort, %function
 FtlFreeSysBLkSort:
-	@ args = 0, pretend = 0, frame = 8
+.LFB334:
+	.loc 1 118 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r4, .L498
-	ldr	r3, .L498+4
-	ldrh	r7, [r4, #2]
-	ldrh	r6, [r4, #6]
-	ldr	r5, [r3]
-	ldr	r3, .L498+8
-	add	r8, r4, r7, lsl #1
-	mov	r10, r5
-	ldr	r3, [r3]
-	add	fp, r5, r6, lsl #2
-	add	r8, r8, #6
+	.loc 1 119 0
+	ldr	r3, .L497
+	.loc 1 123 0
+	movs	r0, #0
+	.loc 1 118 0
+	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 1 123 0
+	mov	r6, r0
+	.loc 1 119 0
+	ldrh	r5, [r3, #28]
+	ldr	r3, .L497+4
+	and	r5, r5, #31
+.LVL450:
+	ldrh	r1, [r3, #2]
+	ldrh	r2, [r3, #4]
+.LVL451:
+.L491:
+	.loc 1 123 0 discriminator 1
+	uxth	r4, r0
+	adds	r0, r0, #1
+.LVL452:
+	cmp	r5, r4
+	bgt	.L492
+	cbz	r6, .L490
+	strh	r1, [r3, #2]	@ movhi
+	strh	r2, [r3, #4]	@ movhi
 .L490:
-	cmp	r10, fp
-	bne	.L491
-	movs	r3, #0
-	add	lr, r6, #-1
+	pop	{r4, r5, r6, pc}
+.LVL453:
 .L492:
-	cmp	r3, lr
-	blt	.L497
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L491:
-	ldrh	r0, [r8, #2]!
-	str	r3, [sp, #4]
-	bl	P2V_block_in_plane
-	ldr	r3, [sp, #4]
-	ldrh	r2, [r3, r0, lsl #1]
-	str	r2, [r10], #4
-	b	.L490
-.L497:
-	add	ip, r3, #1
-	mov	r2, r3
-	uxth	ip, ip
-	mov	r8, ip
-.L493:
-	cmp	r8, r6
-	bcc	.L495
-	cmp	r3, r2
-	beq	.L496
-	ldr	r0, [r5, r2, lsl #2]
-	ldr	r1, [r5, r3, lsl #2]
-	str	r1, [r5, r2, lsl #2]
-	add	r2, r2, r7
-	str	r0, [r5, r3, lsl #2]
-	add	r3, r3, r7
-	adds	r2, r2, #4
-	adds	r3, r3, #4
-	ldrh	r1, [r4, r2, lsl #1]
-	ldrh	r0, [r4, r3, lsl #1]
-	strh	r0, [r4, r2, lsl #1]	@ movhi
-	strh	r1, [r4, r3, lsl #1]	@ movhi
-.L496:
-	mov	r3, ip
-	b	.L492
-.L495:
-	ldr	r1, [r5, r8, lsl #2]
-	ldr	r0, [r5, r2, lsl #2]
-	cmp	r0, r1
-	it	hi
-	movhi	r2, r8
-	add	r8, r8, #1
-	uxth	r8, r8
-	b	.L493
-.L499:
-	.align	2
+	.loc 1 124 0 discriminator 3
+	adds	r4, r1, #4
+.LVL454:
+	.loc 1 125 0 discriminator 3
+	adds	r1, r1, #1
+	.loc 1 124 0 discriminator 3
+	ldrh	r6, [r3, r4, lsl #1]
+.LVL455:
+	.loc 1 126 0 discriminator 3
+	adds	r4, r2, #4
+	.loc 1 125 0 discriminator 3
+	ubfx	r1, r1, #0, #10
+	.loc 1 126 0 discriminator 3
+	strh	r6, [r3, r4, lsl #1]	@ movhi
+.LVL456:
+	movs	r6, #1
+.LVL457:
+	.loc 1 127 0 discriminator 3
+	add	r2, r2, r6
+	ubfx	r2, r2, #0, #10
+	b	.L491
 .L498:
-	.word	.LANCHOR74
-	.word	.LANCHOR79
-	.word	.LANCHOR77
+	.align	2
+.L497:
+	.word	.LANCHOR80
+	.word	.LANCHOR75
+	.cfi_endproc
+.LFE334:
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
 	.section	.text.remove_from_free_sys_Queue,"ax",%progbits
 	.align	1
@@ -3431,53 +5722,99 @@ FtlFreeSysBLkSort:
 	.fpu softvfp
 	.type	remove_from_free_sys_Queue, %function
 remove_from_free_sys_Queue:
+.LFB335:
+	.loc 1 161 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL458:
 	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 1 161 0
 	mov	r1, r0
-	ldr	r5, .L507
+.LBB250:
+.LBB251:
+	.loc 1 89 0
+	ldr	r5, .L506
 	ldrh	r3, [r5, #6]
-	cbz	r3, .L506
+.LBE251:
+.LBE250:
+	.loc 1 166 0
+	cbz	r3, .L505
+	.loc 1 168 0
 	ldrh	r0, [r5, #2]
+.LVL459:
 	movs	r4, #0
-.L502:
+.L501:
+.LVL460:
+	.loc 1 167 0 discriminator 1
 	cmp	r4, r3
-	bcc	.L504
-.L506:
+	bcc	.L503
+.LVL461:
+.L505:
+	.loc 1 162 0
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L504:
+.LVL462:
+.L503:
+	.loc 1 168 0
 	adds	r2, r4, r0
 	ubfx	r2, r2, #0, #10
 	adds	r2, r2, #4
 	ldrh	r2, [r5, r2, lsl #1]
 	cmp	r2, r1
-	bne	.L503
-	ldr	r0, .L507+4
+	bne	.L502
+.LVL463:
+	.loc 1 170 0
+	ldr	r0, .L506+4
 	bl	printf
+.LVL464:
+	.loc 1 171 0
 	ldrh	r3, [r5, #2]
+	.loc 1 169 0
 	movs	r0, #1
+	.loc 1 171 0
 	adds	r2, r3, #4
 	add	r4, r4, r3
+.LVL465:
+	.loc 1 172 0
 	adds	r3, r3, #1
+	.loc 1 171 0
 	ldrh	r2, [r5, r2, lsl #1]
+	.loc 1 172 0
 	ubfx	r3, r3, #0, #10
+	.loc 1 171 0
 	ubfx	r4, r4, #0, #10
+	.loc 1 172 0
 	strh	r3, [r5, #2]	@ movhi
+	.loc 1 171 0
 	adds	r4, r4, #4
+	.loc 1 173 0
 	ldrh	r3, [r5, #6]
+	.loc 1 171 0
 	strh	r2, [r5, r4, lsl #1]	@ movhi
+	.loc 1 173 0
 	subs	r3, r3, #1
 	strh	r3, [r5, #6]	@ movhi
+	.loc 1 174 0
 	pop	{r3, r4, r5, pc}
-.L503:
+.LVL466:
+.L502:
+	.loc 1 167 0 discriminator 2
 	adds	r4, r4, #1
-	b	.L502
-.L508:
-	.align	2
+.LVL467:
+	b	.L501
 .L507:
-	.word	.LANCHOR74
+	.align	2
+.L506:
+	.word	.LANCHOR75
 	.word	.LC3
+	.cfi_endproc
+.LFE335:
 	.size	remove_from_free_sys_Queue, .-remove_from_free_sys_Queue
 	.section	.text.FtlFreeSysBlkQueueOut,"ax",%progbits
 	.align	1
@@ -3488,65 +5825,135 @@ remove_from_free_sys_Queue:
 	.fpu softvfp
 	.type	FtlFreeSysBlkQueueOut, %function
 FtlFreeSysBlkQueueOut:
+.LFB336:
+	.loc 1 182 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L516
-	push	{r3, r4, r5, r6, r7, lr}
-	ldrh	r1, [r2, #6]
-	cbz	r1, .L512
-	ldrh	r3, [r2, #2]
+.LVL468:
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 3, -32
+	.cfi_offset 4, -28
+	.cfi_offset 5, -24
+	.cfi_offset 6, -20
+	.cfi_offset 7, -16
+	.cfi_offset 8, -12
+	.cfi_offset 10, -8
+	.cfi_offset 14, -4
+.LBB252:
+.LBB253:
+	.loc 1 89 0
+	ldr	r4, .L518
+	mov	r6, r4
+.LVL469:
+.L509:
+	ldrh	r1, [r4, #6]
+.LBE253:
+.LBE252:
+	.loc 1 187 0
+	cmp	r1, #0
+	beq	.L510
+	.loc 1 188 0
+	ldrh	r3, [r4, #2]
+	.loc 1 189 0
 	subs	r1, r1, #1
-	strh	r1, [r2, #6]	@ movhi
-	adds	r0, r3, #4
+	strh	r1, [r4, #6]	@ movhi
+	.loc 1 188 0
+	adds	r2, r3, #4
+	.loc 1 190 0
 	adds	r3, r3, #1
 	ubfx	r3, r3, #0, #10
-	ldrh	r4, [r2, r0, lsl #1]
-	strh	r3, [r2, #2]	@ movhi
-	ldr	r3, .L516+4
-	ldr	r7, [r3]
-	cbnz	r7, .L510
-	ldr	r5, .L516+8
-	mov	r0, r4
+	.loc 1 188 0
+	ldrh	r5, [r4, r2, lsl #1]
+.LVL470:
+	.loc 1 190 0
+	strh	r3, [r4, #2]	@ movhi
+	.loc 1 191 0
+	ldr	r3, .L518+4
+	ldr	r10, [r3]
+	cmp	r10, #0
+	bne	.L511
+.LBB254:
+	.loc 1 193 0
+	ldr	r8, .L518+28
+	.loc 1 192 0
+	mov	r0, r5
 	bl	P2V_block_in_plane
-	mov	r6, r0
-	lsls	r2, r4, #10
-	ldr	r0, [r5]
-	str	r2, [r0, #4]
-	ldr	r2, .L516+12
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbz	r2, .L511
+.LVL471:
+	mov	r7, r0
+.LVL472:
+	.loc 1 193 0
+	lsls	r3, r5, #10
+	ldr	r0, [r8]
+	str	r3, [r0, #4]
+	.loc 1 194 0
+	ldr	r3, .L518+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L512
+	.loc 1 195 0
 	movs	r2, #1
-	mov	r1, r7
+	mov	r1, r10
 	bl	FlashEraseBlocks
-.L511:
+.LVL473:
+.L512:
+	.loc 1 196 0
 	movs	r2, #1
-	ldr	r0, [r5]
+	ldr	r0, [r8]
 	mov	r1, r2
 	bl	FlashEraseBlocks
-	ldr	r3, .L516+16
+.LVL474:
+	.loc 1 197 0
+	ldr	r3, .L518+12
 	ldr	r2, [r3]
-	ldrh	r3, [r2, r6, lsl #1]
+	ldrh	r3, [r2, r7, lsl #1]
 	adds	r3, r3, #1
-	strh	r3, [r2, r6, lsl #1]	@ movhi
-	ldr	r2, .L516+20
+	strh	r3, [r2, r7, lsl #1]	@ movhi
+	.loc 1 198 0
+	ldr	r2, .L518+16
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
+.LVL475:
+.L511:
+.LBE254:
+	.loc 1 205 0
+	cbnz	r5, .L514
+	.loc 1 206 0
+	ldrh	r2, [r6, #6]
+	mov	r1, r5
+	ldr	r0, .L518+20
+	bl	printf
+.LVL476:
+	.loc 1 208 0
+	b	.L509
+.LVL477:
 .L510:
-	mov	r0, r4
-	pop	{r3, r4, r5, r6, r7, pc}
-.L512:
-	movw	r4, #65535
-	b	.L510
-.L517:
+	.loc 1 202 0
+	ldr	r0, .L518+24
+	bl	printf
+.LVL478:
+.L513:
+	b	.L513
+.LVL479:
+.L514:
+	.loc 1 211 0
+	mov	r0, r5
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.LVL480:
+.L519:
 	.align	2
-.L516:
-	.word	.LANCHOR74
+.L518:
 	.word	.LANCHOR75
 	.word	.LANCHOR76
 	.word	.LANCHOR8
-	.word	.LANCHOR77
 	.word	.LANCHOR78
+	.word	.LANCHOR79
+	.word	.LC5
+	.word	.LC4
+	.word	.LANCHOR77
+	.cfi_endproc
+.LFE336:
 	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
 	.section	.text.insert_data_list,"ax",%progbits
 	.align	1
@@ -3557,126 +5964,243 @@ FtlFreeSysBlkQueueOut:
 	.fpu softvfp
 	.type	insert_data_list, %function
 insert_data_list:
+.LFB339:
+	.loc 1 256 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL481:
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L534
-	ldrh	lr, [r3]
-	cmp	lr, r0
-	bls	.L520
-	ldr	r3, .L534+4
-	movs	r5, #6
-	ldr	r4, [r3]
-	mul	r3, r5, r0
-	str	r3, [sp, #4]
-	adds	r1, r4, r3
-	ldr	r2, [sp, #4]
+	.cfi_def_cfa_offset 48
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 1 267 0
+	ldr	r5, .L537
+	ldrh	r3, [r5]
+	cmp	r3, r0
+	bls	.L522
+.LVL482:
+.LBB257:
+.LBB258:
+	.loc 1 272 0
+	ldr	r6, .L537+4
+	movs	r4, #6
+	muls	r4, r0, r4
+	.loc 1 275 0
+	ldr	r2, .L537+8
+	.loc 1 273 0
 	movw	r3, #65535
+	.loc 1 272 0
+	ldr	ip, [r6]
+	mov	r8, r6
+	add	r1, ip, r4
+.LVL483:
+	.loc 1 273 0
 	strh	r3, [r1, #2]	@ movhi
-	strh	r3, [r4, r2]	@ movhi
-	ldr	r3, .L534+8
-	ldr	ip, [r3]
-	cmp	ip, #0
-	bne	.L521
+	strh	r3, [ip, r4]	@ movhi
+	.loc 1 275 0
+	ldr	r3, [r2]
+	cbnz	r3, .L523
+.L536:
+	.loc 1 324 0
+	str	r1, [r2]
+	b	.L522
+.L523:
+	.loc 1 280 0
+	ldr	r2, .L537+12
+	lsls	r7, r0, #1
+	.loc 1 281 0
+	ldrh	r6, [r1, #4]
+	.loc 1 280 0
+	ldr	lr, [r2]
+	ldrh	r2, [lr, r0, lsl #1]
+.LVL484:
+	.loc 1 282 0
+	cmp	r6, #0
+	beq	.L533
+	.loc 1 281 0
+	muls	r2, r6, r2
+.LVL485:
+.L535:
+	.loc 1 286 0
+	ldr	fp, [r8]
+	.loc 1 289 0
+	ldrh	r5, [r5]
+	.loc 1 283 0
+	str	r2, [sp, #4]
+.LVL486:
+	.loc 1 286 0
+	sub	r2, r3, fp
+.LVL487:
+	asr	r8, r2, #1
+	ldr	r2, .L537+16
+	.loc 1 289 0
+	str	r5, [sp, #8]
+	.loc 1 301 0
+	ldr	r5, .L537+20
+	.loc 1 286 0
+	mul	r2, r2, r8
+	.loc 1 301 0
+	ldr	r8, [r5]
+	.loc 1 286 0
+	uxth	r2, r2
+.LVL488:
+	.loc 1 301 0
+	add	r5, r8, r7
+	str	r5, [sp, #12]
+	.loc 1 263 0
+	movs	r5, #0
+.LVL489:
+.L531:
+	.loc 1 288 0
+	adds	r5, r5, #1
+.LVL490:
+	.loc 1 289 0
+	ldr	r7, [sp, #8]
+	.loc 1 288 0
+	uxth	r5, r5
+.LVL491:
+	.loc 1 289 0
+	cmp	r5, r7
+	bhi	.L522
+	.loc 1 292 0
+	cmp	r0, r2
+	beq	.L522
+	.loc 1 295 0
+	ldrh	r7, [lr, r2, lsl #1]
+	lsl	r10, r2, #1
+	mov	r6, r7
+.LVL492:
+	.loc 1 296 0
+	ldrh	r7, [r3, #4]
+.LVL493:
+	.loc 1 297 0
+	cbz	r7, .L534
+	.loc 1 296 0
+	muls	r7, r6, r7
+.LVL494:
+.L526:
+	.loc 1 300 0
+	ldr	r6, [sp, #4]
+.LVL495:
+	cmp	r6, r7
+	bne	.L527
+	.loc 1 301 0
+	ldr	r6, [sp, #12]
+	ldrh	r10, [r8, r10]
+	ldrh	r7, [r6]
+.LVL496:
+	cmp	r10, r7
+	bcc	.L529
+.L528:
+	.loc 1 319 0
+	strh	r2, [ip, r4]	@ movhi
+.LVL497:
+	.loc 1 320 0
+	ldrh	r2, [r3, #2]
+.LVL498:
+	strh	r2, [r1, #2]	@ movhi
+.LVL499:
+	.loc 1 322 0
+	ldr	r2, .L537+8
+	ldr	r4, [r2]
+	cmp	r3, r4
+	bne	.L532
+	.loc 1 323 0
+	strh	r0, [r3, #2]	@ movhi
+	b	.L536
+.LVL500:
 .L533:
+	.loc 1 283 0
+	mov	r2, #-1
+.LVL501:
+	b	.L535
+.LVL502:
+.L534:
+	.loc 1 298 0
+	mov	r7, #-1
+.LVL503:
+	b	.L526
+.LVL504:
+.L527:
+	.loc 1 305 0
+	bcc	.L528
+.LVL505:
+.L529:
+	.loc 1 308 0
+	ldrh	r7, [r3]
+	movw	r6, #65535
+	cmp	r7, r6
+	bne	.L530
+	.loc 1 309 0
+	strh	r2, [r1, #2]	@ movhi
+.LVL506:
+	.loc 1 310 0
+	strh	r0, [r3]	@ movhi
+	.loc 1 311 0
+	ldr	r3, .L537+24
+.LVL507:
 	str	r1, [r3]
-.L520:
+.LVL508:
+.L522:
+.LBE258:
+.LBE257:
+	.loc 1 330 0
 	movs	r0, #0
+.LVL509:
 	add	sp, sp, #16
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L521:
-	ldr	r3, .L534+12
-	lsls	r2, r0, #1
-	ldr	r3, [r3]
-	str	r3, [sp, #8]
-	ldrh	r6, [r3, r0, lsl #1]
-	ldrh	r3, [r1, #4]
-	cbz	r3, .L531
-	mul	fp, r3, r6
-.L522:
-	sub	r3, ip, r4
-	asrs	r6, r3, #1
-	ldr	r3, .L534+16
-	muls	r3, r6, r3
-	ldr	r6, .L534+20
-	ldr	r8, [r6]
-	movs	r6, #0
-	uxth	r3, r3
-	add	r2, r8, r2
-	str	r2, [sp, #12]
-	mov	r2, ip
-.L529:
-	adds	r6, r6, #1
-	uxth	r6, r6
-	cmp	lr, r6
-	bcc	.L520
-	cmp	r3, r0
-	beq	.L520
-	ldr	r7, [sp, #8]
-	lsl	r10, r3, #1
-	ldrh	r7, [r7, r3, lsl #1]
-	mov	r5, r7
-	ldrh	r7, [r2, #4]
-	cbz	r7, .L532
-	muls	r7, r5, r7
-.L524:
-	cmp	fp, r7
-	bne	.L525
-	ldr	r5, [sp, #12]
-	ldrh	r10, [r8, r10]
-	ldrh	r7, [r5]
-	cmp	r10, r7
-	bcc	.L527
-.L526:
-	ldr	r5, [sp, #4]
-	cmp	r2, ip
-	strh	r3, [r4, r5]	@ movhi
-	ldrh	r3, [r2, #2]
-	strh	r3, [r1, #2]	@ movhi
-	bne	.L530
-	strh	r0, [r2, #2]	@ movhi
-	ldr	r3, .L534+8
-	b	.L533
-.L531:
-	mov	fp, #-1
-	b	.L522
-.L532:
-	mov	r7, #-1
-	b	.L524
-.L525:
-	bcc	.L526
-.L527:
-	ldrh	r7, [r2]
-	movw	r5, #65535
-	cmp	r7, r5
-	bne	.L528
-	strh	r3, [r1, #2]	@ movhi
-	strh	r0, [r2]	@ movhi
-	ldr	r3, .L534+24
-	b	.L533
-.L528:
-	movs	r3, #6
-	mla	r2, r3, r7, r4
-	mov	r3, r7
-	b	.L529
+.LVL510:
 .L530:
-	ldrh	r1, [r2, #2]
+	.cfi_restore_state
+.LBB260:
+.LBB259:
+	.loc 1 316 0
 	movs	r3, #6
-	muls	r3, r1, r3
-	strh	r0, [r4, r3]	@ movhi
-	strh	r0, [r2, #2]	@ movhi
-	b	.L520
-.L535:
+.LVL511:
+	mov	r2, r7
+.LVL512:
+	mla	r3, r3, r7, fp
+.LVL513:
+	b	.L531
+.LVL514:
+.L532:
+	.loc 1 326 0
+	ldrh	r4, [r3, #2]
+	ldr	r2, .L537+4
+	ldr	r1, [r2]
+.LVL515:
+	movs	r2, #6
+.LVL516:
+	muls	r2, r4, r2
+.LVL517:
+	strh	r0, [r1, r2]	@ movhi
+	.loc 1 327 0
+	strh	r0, [r3, #2]	@ movhi
+	b	.L522
+.L538:
 	.align	2
-.L534:
-	.word	.LANCHOR38
-	.word	.LANCHOR80
+.L537:
+	.word	.LANCHOR39
 	.word	.LANCHOR81
 	.word	.LANCHOR82
-	.word	-1431655765
-	.word	.LANCHOR77
 	.word	.LANCHOR83
+	.word	-1431655765
+	.word	.LANCHOR78
+	.word	.LANCHOR84
+.LBE259:
+.LBE260:
+	.cfi_endproc
+.LFE339:
 	.size	insert_data_list, .-insert_data_list
 	.section	.text.INSERT_DATA_LIST,"ax",%progbits
 	.align	1
@@ -3687,38 +6211,69 @@ insert_data_list:
 	.fpu softvfp
 	.type	INSERT_DATA_LIST, %function
 INSERT_DATA_LIST:
+.LFB338:
+	.loc 1 225 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL518:
 	push	{r3, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 3, -8
+	.cfi_offset 14, -4
+	.loc 1 226 0
 	bl	insert_data_list
-	ldr	r2, .L538
+.LVL519:
+	.loc 1 227 0
+	ldr	r2, .L541
 	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L538+4
+	.loc 1 228 0
+	ldr	r2, .L541+4
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bcs	.L536
-	ldr	r1, .L538+8
-	movs	r2, #205
-	ldr	r0, .L538+12
+	bcs	.L539
+.LVL520:
+.LBB263:
+.LBB264:
+	ldr	r1, .L541+8
+	movs	r2, #228
+	ldr	r0, .L541+12
 	bl	printf
-	ldr	r1, .L538+16
-	ldr	r0, .L538+20
+.LVL521:
+	ldr	r1, .L541+16
+	ldr	r0, .L541+20
+.LBE264:
+.LBE263:
+	.loc 1 229 0
 	pop	{r3, lr}
+	.cfi_remember_state
+	.cfi_restore 14
+	.cfi_restore 3
+	.cfi_def_cfa_offset 0
+.LBB266:
+.LBB265:
+	.loc 1 228 0
 	b	printf
-.L536:
-	pop	{r3, pc}
+.LVL522:
 .L539:
+	.cfi_restore_state
+	pop	{r3, pc}
+.L542:
 	.align	2
-.L538:
-	.word	.LANCHOR84
-	.word	.LANCHOR38
+.L541:
 	.word	.LANCHOR85
-	.word	.LC4
-	.word	.LC5
+	.word	.LANCHOR39
+	.word	.LANCHOR86
 	.word	.LC6
+	.word	.LC7
+	.word	.LC8
+.LBE265:
+.LBE266:
+	.cfi_endproc
+.LFE338:
 	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
 	.section	.text.insert_free_list,"ax",%progbits
 	.align	1
@@ -3729,75 +6284,146 @@ INSERT_DATA_LIST:
 	.fpu softvfp
 	.type	insert_free_list, %function
 insert_free_list:
-	@ args = 0, pretend = 0, frame = 0
+.LFB340:
+	.loc 1 333 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL523:
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 1 339 0
 	movw	r1, #65535
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	cmp	r0, r1
-	beq	.L541
-	ldr	r3, .L547
+	beq	.L544
+	.loc 1 342 0
+	ldr	r4, .L550
 	mov	r10, #6
-	mul	r7, r10, r0
-	ldr	r4, [r3]
-	ldr	r3, .L547+4
-	adds	r5, r4, r7
-	ldr	r6, [r3]
-	mov	lr, r3
+	mul	r6, r10, r0
+	.loc 1 345 0
+	ldr	r2, .L550+4
+	.loc 1 342 0
+	ldr	r7, [r4]
+	str	r4, [sp]
+	mov	ip, r2
+	adds	r5, r7, r6
+.LVL524:
+	.loc 1 343 0
 	strh	r1, [r5, #2]	@ movhi
-	strh	r1, [r4, r7]	@ movhi
-	cbnz	r6, .L542
-	str	r5, [r3]
-.L541:
+	strh	r1, [r7, r6]	@ movhi
+	.loc 1 345 0
+	ldr	r3, [r2]
+	cbnz	r3, .L545
+	.loc 1 346 0
+	str	r5, [r2]
+.LVL525:
+.L544:
+	.loc 1 379 0
 	movs	r0, #0
+.LVL526:
+	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L542:
-	ldr	r3, .L547+8
-	subs	r2, r6, r4
+.LVL527:
+.L545:
+	.cfi_restore_state
+	.loc 1 350 0
+	ldr	r2, .L550+8
+	ldr	r8, [r2]
+	ldrh	r2, [r8, r0, lsl #1]
+	str	r2, [sp, #4]
+.LVL528:
+	.loc 1 352 0
+	ldr	r2, [sp]
+	ldr	lr, [r2]
+	ldr	r2, .L550+12
+	sub	fp, r3, lr
+	asr	fp, fp, #1
+	mul	r2, r2, fp
+	.loc 1 359 0
 	mov	fp, r1
-	ldr	ip, [r3]
-	asrs	r3, r2, #1
-	ldr	r2, .L547+12
-	ldrh	r8, [ip, r0, lsl #1]
-	muls	r2, r3, r2
-	mov	r3, r6
+	.loc 1 352 0
 	uxth	r2, r2
-.L545:
-	ldrh	r1, [ip, r2, lsl #1]
-	cmp	r1, r8
-	bcs	.L543
-	ldrh	r1, [r3]
+.LVL529:
+.L548:
+	.loc 1 356 0
+	ldrh	r1, [r8, r2, lsl #1]
+	mov	r4, r1
+	ldr	r1, [sp, #4]
+	cmp	r4, r1
+	bcs	.L546
+	.loc 1 359 0
+	ldrh	r1, [r3]
 	cmp	r1, fp
-	bne	.L544
+	bne	.L547
+	.loc 1 360 0
 	strh	r2, [r5, #2]	@ movhi
+.LVL530:
+	.loc 1 361 0
 	strh	r0, [r3]	@ movhi
-	b	.L541
-.L544:
-	mla	r3, r10, r1, r4
+	.loc 1 362 0
+	b	.L544
+.LVL531:
+.L547:
+	.loc 1 365 0
+	mla	r3, r10, r1, lr
+.LVL532:
+	.loc 1 355 0
 	mov	r2, r1
-	b	.L545
-.L543:
+.LVL533:
+	b	.L548
+.LVL534:
+.L546:
+	.loc 1 368 0
 	ldrh	r1, [r3, #2]
-	cmp	r3, r6
 	strh	r1, [r5, #2]	@ movhi
-	it	ne
-	ldrhne	r1, [r3, #2]
-	strh	r2, [r4, r7]	@ movhi
-	iteet	ne
-	movne	r2, #6
-	strheq	r0, [r3, #2]	@ movhi
-	streq	r5, [lr]
-	mulne	r2, r2, r1
-	itt	ne
-	strhne	r0, [r4, r2]	@ movhi
-	strhne	r0, [r3, #2]	@ movhi
-	b	.L541
-.L548:
+.LVL535:
+	.loc 1 369 0
+	strh	r2, [r7, r6]	@ movhi
+	.loc 1 371 0
+	ldr	r2, [ip]
+.LVL536:
+	cmp	r3, r2
+	bne	.L549
+	.loc 1 372 0
+	strh	r0, [r3, #2]	@ movhi
+.LVL537:
+	.loc 1 373 0
+	str	r5, [ip]
+	b	.L544
+.LVL538:
+.L549:
+	.loc 1 375 0
+	ldrh	r5, [r3, #2]
+.LVL539:
+	ldr	r2, [sp]
+	ldr	r1, [r2]
+	movs	r2, #6
+	muls	r2, r5, r2
+	strh	r0, [r1, r2]	@ movhi
+.LVL540:
+	.loc 1 376 0
+	strh	r0, [r3, #2]	@ movhi
+	b	.L544
+.L551:
 	.align	2
-.L547:
-	.word	.LANCHOR80
-	.word	.LANCHOR86
-	.word	.LANCHOR77
+.L550:
+	.word	.LANCHOR81
+	.word	.LANCHOR87
+	.word	.LANCHOR78
 	.word	-1431655765
+	.cfi_endproc
+.LFE340:
 	.size	insert_free_list, .-insert_free_list
 	.section	.text.INSERT_FREE_LIST,"ax",%progbits
 	.align	1
@@ -3808,38 +6434,69 @@ insert_free_list:
 	.fpu softvfp
 	.type	INSERT_FREE_LIST, %function
 INSERT_FREE_LIST:
+.LFB337:
+	.loc 1 214 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL541:
 	push	{r3, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 3, -8
+	.cfi_offset 14, -4
+	.loc 1 215 0
 	bl	insert_free_list
-	ldr	r2, .L551
+.LVL542:
+	.loc 1 216 0
+	ldr	r2, .L554
 	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L551+4
+	.loc 1 221 0
+	ldr	r2, .L554+4
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bcs	.L549
-	ldr	r1, .L551+8
-	movs	r2, #198
-	ldr	r0, .L551+12
+	bcs	.L552
+.LVL543:
+.LBB269:
+.LBB270:
+	ldr	r1, .L554+8
+	movs	r2, #221
+	ldr	r0, .L554+12
 	bl	printf
-	ldr	r1, .L551+16
-	ldr	r0, .L551+20
+.LVL544:
+	ldr	r1, .L554+16
+	ldr	r0, .L554+20
+.LBE270:
+.LBE269:
+	.loc 1 222 0
 	pop	{r3, lr}
+	.cfi_remember_state
+	.cfi_restore 14
+	.cfi_restore 3
+	.cfi_def_cfa_offset 0
+.LBB272:
+.LBB271:
+	.loc 1 221 0
 	b	printf
-.L549:
-	pop	{r3, pc}
+.LVL545:
 .L552:
+	.cfi_restore_state
+	pop	{r3, pc}
+.L555:
 	.align	2
-.L551:
-	.word	.LANCHOR87
-	.word	.LANCHOR38
+.L554:
 	.word	.LANCHOR88
-	.word	.LC4
-	.word	.LC5
+	.word	.LANCHOR39
+	.word	.LANCHOR89
 	.word	.LC6
+	.word	.LC7
+	.word	.LC8
+.LBE271:
+.LBE272:
+	.cfi_endproc
+.LFE337:
 	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
 	.section	.text.List_remove_node,"ax",%progbits
 	.align	1
@@ -3850,79 +6507,130 @@ INSERT_FREE_LIST:
 	.fpu softvfp
 	.type	List_remove_node, %function
 List_remove_node:
+.LFB341:
+	.loc 1 382 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL546:
 	push	{r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
+	.cfi_offset 14, -4
+	.loc 1 385 0
 	movs	r6, #6
-	ldr	r5, .L559
+	ldr	r4, .L562
 	muls	r6, r1, r6
+	.loc 1 386 0
 	movw	r3, #65535
+	.loc 1 382 0
 	mov	r8, r0
-	ldr	r7, [r5]
-	adds	r4, r7, r6
-	ldrh	r2, [r4, #2]
+	.loc 1 385 0
+	ldr	r7, [r4]
+	adds	r5, r7, r6
+.LVL547:
+	.loc 1 386 0
+	ldrh	r2, [r5, #2]
 	cmp	r2, r3
-	bne	.L554
+	bne	.L557
+	.loc 1 386 0 is_stmt 0 discriminator 1
 	ldr	r3, [r0]
-	cmp	r4, r3
-	beq	.L554
-	ldr	r1, .L559+4
-	movw	r2, #363
-	ldr	r0, .L559+8
+	cmp	r5, r3
+	beq	.L557
+	.loc 1 386 0 discriminator 2
+	ldr	r1, .L562+4
+.LVL548:
+	mov	r2, #386
+	ldr	r0, .L562+8
+.LVL549:
 	bl	printf
-	ldr	r1, .L559+12
-	ldr	r0, .L559+16
+.LVL550:
+	ldr	r1, .L562+12
+	ldr	r0, .L562+16
 	bl	printf
-.L554:
+.LVL551:
+.L557:
+	.loc 1 388 0 is_stmt 1
 	ldr	r3, [r8]
 	movw	r1, #65535
-	cmp	r4, r3
+	cmp	r5, r3
 	ldrh	r3, [r7, r6]
-	bne	.L555
+	bne	.L558
+	.loc 1 389 0
 	cmp	r3, r1
+	.loc 1 392 0
 	ittee	ne
-	ldrne	r0, [r5]
+	ldrne	r0, [r4]
 	movne	r2, #6
+	.loc 1 390 0
 	moveq	r3, #0
 	streq	r3, [r8]
+	.loc 1 392 0
 	ittt	ne
 	mlane	r3, r2, r3, r0
 	strne	r3, [r8]
+	.loc 1 393 0
 	strhne	r1, [r3, #2]	@ movhi
-.L557:
+.L560:
+	.loc 1 406 0
 	movw	r3, #65535
+	.loc 1 408 0
 	movs	r0, #0
+	.loc 1 406 0
 	strh	r3, [r7, r6]	@ movhi
-	strh	r3, [r4, #2]	@ movhi
+	strh	r3, [r5, #2]	@ movhi
+	.loc 1 408 0
 	pop	{r4, r5, r6, r7, r8, pc}
-.L555:
+.LVL552:
+.L558:
+	.loc 1 395 0
 	cmp	r3, r1
-	ldrh	r1, [r4, #2]
-	bne	.L558
+	ldrh	r1, [r5, #2]
+	bne	.L561
+	.loc 1 396 0
 	cmp	r1, r3
-	beq	.L557
+	beq	.L560
+.LVL553:
+	.loc 1 398 0
 	movs	r2, #6
-	ldr	r0, [r5]
+	ldr	r0, [r4]
 	muls	r1, r2, r1
+.LVL554:
 	strh	r3, [r0, r1]	@ movhi
-	b	.L557
-.L558:
-	ldr	r0, [r5]
+.LVL555:
+	b	.L560
+.L561:
+.LVL556:
+	.loc 1 402 0
+	ldr	r0, [r4]
 	movs	r2, #6
-	mla	r5, r2, r3, r0
-	strh	r1, [r5, #2]	@ movhi
-	ldrh	r1, [r4, #2]
-	muls	r2, r1, r2
-	strh	r3, [r0, r2]	@ movhi
-	b	.L557
-.L560:
+	mla	r3, r2, r3, r0
+.LVL557:
+	strh	r1, [r3, #2]	@ movhi
+.LVL558:
+	.loc 1 403 0
+	ldrh	r0, [r5, #2]
+	.loc 1 404 0
+	ldrh	r1, [r7, r6]
+	ldr	r3, [r4]
+	muls	r2, r0, r2
+	strh	r1, [r3, r2]	@ movhi
+.LVL559:
+	b	.L560
+.L563:
 	.align	2
-.L559:
-	.word	.LANCHOR80
-	.word	.LANCHOR89
-	.word	.LC4
-	.word	.LC5
+.L562:
+	.word	.LANCHOR81
+	.word	.LANCHOR90
 	.word	.LC6
+	.word	.LC7
+	.word	.LC8
+	.cfi_endproc
+.LFE341:
 	.size	List_remove_node, .-List_remove_node
 	.section	.text.List_pop_index_node,"ax",%progbits
 	.align	1
@@ -3933,42 +6641,79 @@ List_remove_node:
 	.fpu softvfp
 	.type	List_pop_index_node, %function
 List_pop_index_node:
+.LFB342:
+	.loc 1 411 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, [r0]
+.LVL560:
 	push	{r4, r5, r6, lr}
-	cbz	r3, .L567
-	ldr	r2, .L568
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 1 416 0
+	ldr	r3, [r0]
+	cbz	r3, .L570
+	.loc 1 431 0
+	ldr	r2, .L571
+.LVL561:
+	.loc 1 430 0
 	movw	r5, #65535
+	.loc 1 431 0
 	movs	r6, #6
 	ldr	r2, [r2]
-.L563:
-	cbnz	r1, .L564
+.LVL562:
 .L566:
-	ldr	r4, .L568+4
+	.loc 1 430 0
+	cbnz	r1, .L567
+.L569:
+	.loc 1 446 0
+	ldr	r4, .L571+4
 	subs	r3, r3, r2
+.LVL563:
 	asrs	r3, r3, #1
 	muls	r4, r3, r4
+.LVL564:
+	.loc 1 447 0
 	uxth	r1, r4
+.LVL565:
 	bl	List_remove_node
+.LVL566:
 	uxth	r0, r4
+	.loc 1 453 0
 	pop	{r4, r5, r6, pc}
-.L564:
+.LVL567:
+.L567:
+	.loc 1 430 0 discriminator 1
 	ldrh	r4, [r3]
 	cmp	r4, r5
-	beq	.L566
+	beq	.L569
+	.loc 1 432 0
 	subs	r1, r1, #1
+.LVL568:
+	.loc 1 431 0
 	mla	r3, r6, r4, r2
+.LVL569:
+	.loc 1 432 0
 	uxth	r1, r1
-	b	.L563
-.L567:
+.LVL570:
+	b	.L566
+.LVL571:
+.L570:
+	.loc 1 417 0
 	movw	r0, #65535
+.LVL572:
+	.loc 1 454 0
 	pop	{r4, r5, r6, pc}
-.L569:
+.L572:
 	.align	2
-.L568:
-	.word	.LANCHOR80
+.L571:
+	.word	.LANCHOR81
 	.word	-1431655765
+	.cfi_endproc
+.LFE342:
 	.size	List_pop_index_node, .-List_pop_index_node
 	.section	.text.List_get_gc_head_node,"ax",%progbits
 	.align	1
@@ -3979,42 +6724,73 @@ List_pop_index_node:
 	.fpu softvfp
 	.type	List_get_gc_head_node, %function
 List_get_gc_head_node:
+.LFB343:
+	.loc 1 462 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L576
+.LVL573:
+	.loc 1 466 0
+	ldr	r3, .L579
+	.loc 1 462 0
 	push	{r4, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 4, -8
+	.cfi_offset 14, -4
+	.loc 1 466 0
 	ldr	r3, [r3]
-	cbz	r3, .L575
-	ldr	r2, .L576+4
+	cbz	r3, .L578
+	.loc 1 471 0
+	ldr	r2, .L579+4
 	movs	r4, #6
 	ldr	r1, [r2]
+	.loc 1 470 0
 	movw	r2, #65535
-.L572:
-	cbz	r0, .L573
+.L575:
+.LVL574:
+	cbz	r0, .L576
+	.loc 1 470 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r3]
+.LVL575:
 	cmp	r3, r2
-	bne	.L574
-.L575:
+	bne	.L577
+.L578:
+	.loc 1 467 0 is_stmt 1
 	movw	r0, #65535
+.LVL576:
 	pop	{r4, pc}
-.L574:
+.LVL577:
+.L577:
+	.loc 1 472 0
 	subs	r0, r0, #1
+.LVL578:
+	.loc 1 471 0
 	mla	r3, r4, r3, r1
+.LVL579:
+	.loc 1 472 0
 	uxth	r0, r0
-	b	.L572
-.L573:
-	ldr	r0, .L576+8
+.LVL580:
+	b	.L575
+.L576:
+.LVL581:
+	.loc 1 476 0
+	ldr	r0, .L579+8
+.LVL582:
 	subs	r3, r3, r1
+.LVL583:
 	asrs	r3, r3, #1
 	muls	r3, r0, r3
 	uxth	r0, r3
+	.loc 1 479 0
 	pop	{r4, pc}
-.L577:
+.L580:
 	.align	2
-.L576:
+.L579:
+	.word	.LANCHOR82
 	.word	.LANCHOR81
-	.word	.LANCHOR80
 	.word	-1431655765
+	.cfi_endproc
+.LFE343:
 	.size	List_get_gc_head_node, .-List_get_gc_head_node
 	.section	.text.List_update_data_list,"ax",%progbits
 	.align	1
@@ -4025,114 +6801,200 @@ List_get_gc_head_node:
 	.fpu softvfp
 	.type	List_update_data_list, %function
 List_update_data_list:
+.LFB344:
+	.loc 1 482 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L587
+.LVL584:
+	.loc 1 491 0
+	ldr	r3, .L592
+	.loc 1 482 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 1 482 0
 	mov	r4, r0
+	.loc 1 491 0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L580
-	ldr	r3, .L587+4
+	beq	.L583
+	.loc 1 491 0 is_stmt 0 discriminator 1
+	ldr	r3, .L592+4
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L580
-	ldr	r3, .L587+8
+	beq	.L583
+	.loc 1 491 0 discriminator 2
+	ldr	r3, .L592+8
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L580
-	ldr	r7, .L587+12
+	beq	.L583
+.LVL585:
+.LBB275:
+.LBB276:
+	.loc 1 494 0 is_stmt 1
+	ldr	r7, .L592+12
 	movs	r6, #6
-	ldr	r3, .L587+16
+	.loc 1 496 0
+	ldr	r3, .L592+16
+	.loc 1 494 0
 	muls	r6, r0, r6
 	ldr	fp, [r7]
+	.loc 1 496 0
 	ldr	r3, [r3]
+	.loc 1 494 0
 	add	r10, fp, r6
+.LVL586:
+	.loc 1 496 0
 	cmp	r10, r3
-	beq	.L580
-	ldr	r2, .L587+20
+	beq	.L583
+	.loc 1 499 0
+	ldr	r3, .L592+20
+	.loc 1 500 0
 	ldrh	r5, [r10, #4]
-	ldr	r3, [r2]
-	mov	r8, r2
-	movw	r2, #65535
-	ldrh	r3, [r3, r0, lsl #1]
-	muls	r5, r3, r5
+	.loc 1 499 0
+	ldr	r2, [r3]
+	mov	r8, r3
+	ldrh	r2, [r2, r0, lsl #1]
+.LVL587:
+	.loc 1 501 0
+	cmp	r5, #0
+	beq	.L590
+	.loc 1 500 0
+	muls	r5, r2, r5
+.LVL588:
+.L585:
+	.loc 1 504 0
 	ldrh	r3, [r10, #2]
-	it	eq
-	moveq	r5, #-1
+	movw	r2, #65535
+.LVL589:
 	cmp	r3, r2
-	bne	.L583
+	bne	.L586
 	ldrh	r2, [fp, r6]
 	cmp	r2, r3
-	bne	.L583
-	ldr	r1, .L587+24
-	movw	r2, #481
-	ldr	r0, .L587+28
+	bne	.L586
+	ldr	r1, .L592+24
+	mov	r2, #504
+	ldr	r0, .L592+28
+.LVL590:
 	bl	printf
-	ldr	r1, .L587+32
-	ldr	r0, .L587+36
+.LVL591:
+	ldr	r1, .L592+32
+	ldr	r0, .L592+36
 	bl	printf
-.L583:
+.LVL592:
+.L586:
+	.loc 1 505 0
 	ldrh	r3, [r10, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L584
+	bne	.L587
 	ldrh	r2, [fp, r6]
 	cmp	r2, r3
-	beq	.L580
-.L584:
+	beq	.L583
+.L587:
+	.loc 1 507 0
 	movs	r2, #6
 	muls	r2, r3, r2
-	ldr	r3, .L587+40
+.LVL593:
+	.loc 1 508 0
+	ldr	r3, .L592+40
 	asrs	r1, r2, #1
 	muls	r3, r1, r3
+	.loc 1 509 0
 	ldr	r1, [r8]
 	ldrh	r0, [r1, r3, lsl #1]
+.LVL594:
+	.loc 1 510 0
 	ldr	r1, [r7]
 	add	r2, r2, r1
+.LVL595:
 	ldrh	r3, [r2, #4]
+.LVL596:
+	.loc 1 511 0
+	cbz	r3, .L591
+	.loc 1 510 0
 	muls	r3, r0, r3
-	it	eq
-	moveq	r3, #-1
+.LVL597:
+.L588:
+	.loc 1 514 0
 	cmp	r5, r3
-	bcs	.L580
-	ldr	r5, .L587+44
+	bcs	.L583
+	.loc 1 515 0
+	ldr	r5, .L592+44
+.LVL598:
 	mov	r1, r4
-	ldr	r0, .L587+16
+	ldr	r0, .L592+16
+.LVL599:
 	bl	List_remove_node
+.LVL600:
 	ldrh	r3, [r5]
-	cbnz	r3, .L586
-	ldr	r1, .L587+24
-	mov	r2, #492
-	ldr	r0, .L587+28
+	cbnz	r3, .L589
+	ldr	r1, .L592+24
+	movw	r2, #515
+	ldr	r0, .L592+28
 	bl	printf
-	ldr	r1, .L587+32
-	ldr	r0, .L587+36
+.LVL601:
+	ldr	r1, .L592+32
+	ldr	r0, .L592+36
 	bl	printf
-.L586:
+.LVL602:
+.L589:
 	ldrh	r3, [r5]
+	.loc 1 516 0
 	mov	r0, r4
+	.loc 1 515 0
 	subs	r3, r3, #1
 	strh	r3, [r5]	@ movhi
+	.loc 1 516 0
 	bl	INSERT_DATA_LIST
-.L580:
+.LVL603:
+.L583:
+.LBE276:
+.LBE275:
+	.loc 1 519 0
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L588:
+.LVL604:
+.L590:
+.LBB278:
+.LBB277:
+	.loc 1 502 0
+	mov	r5, #-1
+.LVL605:
+	b	.L585
+.LVL606:
+.L591:
+	.loc 1 512 0
+	mov	r3, #-1
+.LVL607:
+	b	.L588
+.L593:
 	.align	2
-.L587:
-	.word	.LANCHOR90
+.L592:
 	.word	.LANCHOR91
 	.word	.LANCHOR92
-	.word	.LANCHOR80
+	.word	.LANCHOR93
 	.word	.LANCHOR81
 	.word	.LANCHOR82
-	.word	.LANCHOR93
-	.word	.LC4
-	.word	.LC5
+	.word	.LANCHOR83
+	.word	.LANCHOR94
 	.word	.LC6
+	.word	.LC7
+	.word	.LC8
 	.word	-1431655765
-	.word	.LANCHOR84
+	.word	.LANCHOR85
+.LBE277:
+.LBE278:
+	.cfi_endproc
+.LFE344:
 	.size	List_update_data_list, .-List_update_data_list
 	.section	.text.ftl_map_blk_alloc_new_blk,"ax",%progbits
 	.align	1
@@ -4143,58 +7005,110 @@ List_update_data_list:
 	.fpu softvfp
 	.type	ftl_map_blk_alloc_new_blk, %function
 ftl_map_blk_alloc_new_blk:
+.LFB347:
+	.loc 1 601 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldrh	r1, [r0, #10]
-	ldr	r2, [r0, #12]
+.LVL608:
 	push	{r3, r4, r5, r6, r7, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 3, -24
+	.cfi_offset 4, -20
+	.cfi_offset 5, -16
+	.cfi_offset 6, -12
+	.cfi_offset 7, -8
+	.cfi_offset 14, -4
+	.loc 1 601 0
 	mov	r4, r0
+	.loc 1 605 0
+	ldrh	r1, [r0, #10]
 	movs	r3, #0
-.L590:
+	ldr	r2, [r0, #12]
+.LVL609:
+.L595:
 	uxth	r5, r3
+.LVL610:
+	.loc 1 605 0 is_stmt 0 discriminator 1
 	cmp	r5, r1
-	bcc	.L592
-.L593:
-	movw	r2, #594
-	ldr	r1, .L599
-	ldr	r0, .L599+4
-	bl	printf
-	ldr	r1, .L599+8
-	ldr	r0, .L599+12
-	bl	printf
-	b	.L594
-.L592:
+	bcs	.L598
+	.loc 1 606 0 is_stmt 1
 	mov	r7, r2
 	adds	r3, r3, #1
 	ldrh	r6, [r7]
 	adds	r2, r2, #2
 	cmp	r6, #0
-	bne	.L590
+	bne	.L595
+	.loc 1 607 0
 	bl	FtlFreeSysBlkQueueOut
+.LVL611:
+	.loc 1 608 0
+	subs	r3, r0, #1
+	movw	r2, #65533
+	uxth	r3, r3
+	.loc 1 607 0
+	mov	r1, r0
 	strh	r0, [r7]	@ movhi
-	cbz	r0, .L591
+	.loc 1 608 0
+	cmp	r3, r2
+	bls	.L596
+	.loc 1 609 0
+	ldr	r3, .L602
+	ldr	r0, .L602+4
+	ldrh	r2, [r3, #6]
+	bl	printf
+.LVL612:
+.L597:
+	b	.L597
+.L596:
+	.loc 1 622 0
 	ldr	r3, [r4, #28]
+	.loc 1 620 0
 	strh	r6, [r4, #2]	@ movhi
+	.loc 1 621 0
 	strh	r5, [r4]	@ movhi
+	.loc 1 622 0
 	adds	r3, r3, #1
 	str	r3, [r4, #28]
+	.loc 1 623 0
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-.L591:
+.L598:
+	.loc 1 627 0
 	ldrh	r3, [r4, #10]
 	cmp	r3, r5
-	bls	.L593
-.L594:
+	bhi	.L600
+.LVL613:
+.LBB281:
+.LBB282:
+	ldr	r1, .L602+8
+	movw	r2, #627
+	ldr	r0, .L602+12
+	bl	printf
+.LVL614:
+	ldr	r1, .L602+16
+	ldr	r0, .L602+20
+	bl	printf
+.LVL615:
+.L600:
+.LBE282:
+.LBE281:
+	.loc 1 629 0
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L600:
+.LVL616:
+.L603:
 	.align	2
-.L599:
-	.word	.LANCHOR94
-	.word	.LC4
-	.word	.LC5
+.L602:
+	.word	.LANCHOR75
+	.word	.LC9
+	.word	.LANCHOR95
 	.word	.LC6
+	.word	.LC7
+	.word	.LC8
+	.cfi_endproc
+.LFE347:
 	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
 	.section	.text.select_l2p_ram_region,"ax",%progbits
 	.align	1
@@ -4205,93 +7119,144 @@ ftl_map_blk_alloc_new_blk:
 	.fpu softvfp
 	.type	select_l2p_ram_region, %function
 select_l2p_ram_region:
+.LFB352:
+	.loc 1 824 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL617:
 	push	{r3, r4, r5, r6, r7, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 3, -24
+	.cfi_offset 4, -20
+	.cfi_offset 5, -16
+	.cfi_offset 6, -12
+	.cfi_offset 7, -8
+	.cfi_offset 14, -4
+	.loc 1 829 0
 	movs	r1, #0
-	ldr	r3, .L611
+	ldr	r3, .L614
+	.loc 1 830 0
 	movs	r0, #12
 	movw	r5, #65535
+	.loc 1 829 0
 	ldrh	r2, [r3]
-	ldr	r3, .L611+4
+	.loc 1 830 0
+	ldr	r3, .L614+4
 	ldr	r3, [r3]
-.L602:
+.LVL618:
+.L605:
 	uxth	r4, r1
+.LVL619:
+	.loc 1 829 0 discriminator 1
 	cmp	r4, r2
-	bcc	.L604
+	bcc	.L607
 	mov	r4, r2
+.LVL620:
 	movs	r1, #0
+.LVL621:
 	mov	r6, #-2147483648
+	.loc 1 840 0
 	movs	r7, #12
-.L605:
+.L608:
 	uxth	r5, r1
+.LVL622:
+	.loc 1 839 0 discriminator 1
 	cmp	r5, r2
-	bcc	.L607
+	bcc	.L610
+	.loc 1 848 0
 	cmp	r4, r2
-	bcc	.L603
-	ldr	r1, .L611+8
+	bcc	.L606
+	.loc 1 854 0
+	ldr	r1, .L614+8
 	mov	r4, r2
 	mov	r0, #-1
 	ldrh	r7, [r1]
 	movs	r1, #0
-.L608:
+.LVL623:
+.L611:
 	uxth	r5, r1
+.LVL624:
+	.loc 1 853 0 discriminator 1
 	cmp	r5, r2
-	bcc	.L610
+	bcc	.L613
+	.loc 1 859 0
 	cmp	r4, r2
-	bcc	.L603
-	movw	r2, #826
-	ldr	r1, .L611+12
-	ldr	r0, .L611+16
+	bcc	.L606
+	.loc 1 859 0 is_stmt 0 discriminator 1
+	movw	r2, #859
+	ldr	r1, .L614+12
+	ldr	r0, .L614+16
+.LVL625:
 	bl	printf
-	ldr	r1, .L611+20
-	ldr	r0, .L611+24
+.LVL626:
+	ldr	r1, .L614+20
+	ldr	r0, .L614+24
 	bl	printf
-	b	.L603
-.L604:
+.LVL627:
+	b	.L606
+.LVL628:
+.L607:
 	adds	r1, r1, #1
+	.loc 1 830 0 is_stmt 1
 	mla	r6, r0, r1, r3
 	ldrh	r6, [r6, #-12]
 	cmp	r6, r5
-	bne	.L602
-.L603:
+	bne	.L605
+.LVL629:
+.L606:
+	.loc 1 861 0
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, pc}
-.L607:
+.LVL630:
+.L610:
+	.loc 1 840 0
 	mla	r0, r7, r1, r3
 	ldr	r0, [r0, #4]
 	cmp	r0, #0
-	blt	.L606
+	blt	.L609
+	.loc 1 841 0
 	cmp	r6, r0
 	itt	hi
 	movhi	r6, r0
+.LVL631:
 	movhi	r4, r5
-.L606:
+.L609:
+.LVL632:
 	adds	r1, r1, #1
-	b	.L605
-.L610:
+.LVL633:
+	b	.L608
+.LVL634:
+.L613:
+	.loc 1 854 0
 	ldr	r6, [r3, #4]
 	cmp	r0, r6
-	bls	.L609
+	bls	.L612
+	.loc 1 854 0 is_stmt 0 discriminator 1
 	ldrh	ip, [r3]
 	cmp	ip, r7
 	itt	ne
 	movne	r0, r6
+.LVL635:
 	movne	r4, r5
-.L609:
+.LVL636:
+.L612:
 	adds	r1, r1, #1
+.LVL637:
 	adds	r3, r3, #12
-	b	.L608
-.L612:
+	b	.L611
+.L615:
 	.align	2
-.L611:
-	.word	.LANCHOR66
-	.word	.LANCHOR95
+.L614:
+	.word	.LANCHOR67
 	.word	.LANCHOR96
 	.word	.LANCHOR97
-	.word	.LC4
-	.word	.LC5
+	.word	.LANCHOR98
 	.word	.LC6
+	.word	.LC7
+	.word	.LC8
+	.cfi_endproc
+.LFE352:
 	.size	select_l2p_ram_region, .-select_l2p_ram_region
 	.section	.text.FtlUpdateVaildLpn,"ax",%progbits
 	.align	1
@@ -4302,51 +7267,83 @@ select_l2p_ram_region:
 	.fpu softvfp
 	.type	FtlUpdateVaildLpn, %function
 FtlUpdateVaildLpn:
+.LFB358:
+	.loc 1 1010 0 is_stmt 1
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L623
-	push	{r4, r5, r6, lr}
+.LVL638:
+	.loc 1 1013 0
+	ldr	r2, .L622
+	.loc 1 1010 0
+	push	{r4, r5, lr}
+	.cfi_def_cfa_offset 12
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
 	mov	r1, r2
+	.loc 1 1013 0
 	ldrh	r3, [r2]
 	cmp	r3, #4
-	bhi	.L614
-	cbnz	r0, .L614
+	bhi	.L617
+	.loc 1 1013 0 is_stmt 0 discriminator 1
+	cbnz	r0, .L617
+	.loc 1 1013 0
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
-	pop	{r4, r5, r6, pc}
-.L614:
-	movs	r3, #0
-	ldr	r0, .L623+4
-	strh	r3, [r1]	@ movhi
-	movw	r6, #65535
-	ldr	r1, .L623+8
-	ldrh	r4, [r0]
-	mov	r0, r3
-	ldr	r2, .L623+12
-	ldr	r1, [r1]
-	str	r3, [r2]
-	add	r4, r1, r4, lsl #1
-.L615:
-	cmp	r1, r4
-	bne	.L617
-	cbz	r3, .L613
-	str	r0, [r2]
-.L613:
-	pop	{r4, r5, r6, pc}
+	.loc 1 1022 0 is_stmt 1
+	pop	{r4, r5, pc}
 .L617:
-	ldrh	r5, [r1], #2
-	cmp	r5, r6
-	itt	ne
-	addne	r0, r0, r5
-	movne	r3, #1
-	b	.L615
-.L624:
-	.align	2
+	.loc 1 1015 0
+	ldr	r3, .L622+4
+	.loc 1 1014 0
+	movs	r2, #0
+	strh	r2, [r1]	@ movhi
+.LBB285:
+.LBB286:
+	.loc 1 1018 0
+	movw	r5, #65535
+	.loc 1 1016 0
+	ldr	r1, .L622+8
+.LBE286:
+.LBE285:
+	.loc 1 1015 0
+	str	r2, [r3]
+.LVL639:
+.LBB288:
+.LBB287:
+	.loc 1 1018 0
+	ldr	r2, .L622+12
+	ldrh	r1, [r1]
+	ldr	r2, [r2]
+	add	r1, r2, r1, lsl #1
+.LVL640:
+.L618:
+	.loc 1 1016 0
+	cmp	r2, r1
+	bne	.L620
+	pop	{r4, r5, pc}
+.L620:
+	.loc 1 1018 0
+	ldrh	r4, [r2], #2
+	cmp	r4, r5
+	.loc 1 1019 0
+	ittt	ne
+	ldrne	r0, [r3]
+	addne	r0, r0, r4
+	strne	r0, [r3]
+	b	.L618
 .L623:
-	.word	.LANCHOR98
-	.word	.LANCHOR38
-	.word	.LANCHOR82
+	.align	2
+.L622:
 	.word	.LANCHOR99
+	.word	.LANCHOR100
+	.word	.LANCHOR39
+	.word	.LANCHOR83
+.LBE287:
+.LBE288:
+	.cfi_endproc
+.LFE358:
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
 	.section	.text.ftl_set_blk_mode,"ax",%progbits
 	.align	1
@@ -4357,27 +7354,39 @@ FtlUpdateVaildLpn:
 	.fpu softvfp
 	.type	ftl_set_blk_mode, %function
 ftl_set_blk_mode:
+.LFB363:
+	.loc 1 1502 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL641:
+	.loc 1 1502 0
 	mov	r3, r0
-	cbz	r1, .L626
-	b	ftl_set_blk_mode.part.9
-.L626:
-	ldr	r2, .L627
+	.loc 1 1503 0
+	cbz	r1, .L625
+	b	ftl_set_blk_mode.part.10
+.LVL642:
+.L625:
+	.loc 1 1506 0
+	ldr	r2, .L626
 	lsrs	r0, r0, #5
+.LVL643:
 	and	r3, r3, #31
 	ldr	r1, [r2]
+.LVL644:
 	movs	r2, #1
 	lsl	r3, r2, r3
 	ldr	r2, [r1, r0, lsl #2]
 	bic	r2, r2, r3
 	str	r2, [r1, r0, lsl #2]
 	bx	lr
-.L628:
-	.align	2
 .L627:
+	.align	2
+.L626:
 	.word	.LANCHOR0
+	.cfi_endproc
+.LFE363:
 	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
 	.section	.text.ftl_get_blk_mode,"ax",%progbits
 	.align	1
@@ -4388,21 +7397,30 @@ ftl_set_blk_mode:
 	.fpu softvfp
 	.type	ftl_get_blk_mode, %function
 ftl_get_blk_mode:
+.LFB364:
+	.loc 1 1510 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L630
+.LVL645:
+	.loc 1 1511 0
+	ldr	r3, .L629
 	lsrs	r2, r0, #5
 	and	r0, r0, #31
+.LVL646:
 	ldr	r3, [r3]
 	ldr	r3, [r3, r2, lsl #2]
 	lsr	r0, r3, r0
+	.loc 1 1512 0
 	and	r0, r0, #1
 	bx	lr
-.L631:
-	.align	2
 .L630:
+	.align	2
+.L629:
 	.word	.LANCHOR0
+	.cfi_endproc
+.LFE364:
 	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
 	.section	.text.ftl_sb_update_avl_pages,"ax",%progbits
 	.align	1
@@ -4413,59 +7431,96 @@ ftl_get_blk_mode:
 	.fpu softvfp
 	.type	ftl_sb_update_avl_pages, %function
 ftl_sb_update_avl_pages:
+.LFB370:
+	.loc 1 1831 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL647:
+	.loc 1 1833 0
 	movs	r3, #0
+	.loc 1 1831 0
 	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 1 1833 0
 	strh	r3, [r0, #4]	@ movhi
+.LVL648:
+	.loc 1 1836 0
 	movw	r6, #65535
-	ldr	r3, .L639
+	.loc 1 1834 0
+	ldr	r3, .L638
 	ldrh	r4, [r3]
 	add	r3, r0, r2, lsl #1
 	adds	r3, r3, #14
-.L633:
+.LVL649:
+.L632:
+	.loc 1 1834 0 is_stmt 0 discriminator 1
 	cmp	r2, r4
-	bcc	.L635
-	ldr	r3, .L639+4
+	bcc	.L634
+	.loc 1 1845 0 is_stmt 1
+	ldr	r3, .L638+4
 	add	r5, r0, #16
+	.loc 1 1843 0
 	movw	r6, #65535
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	subs	r1, r3, r1
+.LVL650:
+	.loc 1 1845 0
 	movs	r3, #0
 	uxth	r1, r1
-.L636:
+.LVL651:
+.L635:
+	.loc 1 1841 0 discriminator 1
 	uxth	r2, r3
 	cmp	r4, r2
-	bhi	.L638
+	bhi	.L637
+	.loc 1 1848 0
 	pop	{r4, r5, r6, pc}
-.L635:
+.LVL652:
+.L634:
+	.loc 1 1836 0
 	ldrh	r5, [r3, #2]!
+	.loc 1 1834 0
 	adds	r2, r2, #1
+.LVL653:
 	uxth	r2, r2
+.LVL654:
+	.loc 1 1836 0
 	cmp	r5, r6
+	.loc 1 1838 0
 	ittt	ne
 	ldrhne	r5, [r0, #4]
 	addne	r5, r5, #1
 	strhne	r5, [r0, #4]	@ movhi
-	b	.L633
-.L638:
+	b	.L632
+.LVL655:
+.L637:
+	.loc 1 1843 0
 	ldrh	r2, [r5], #2
 	adds	r3, r3, #1
+.LVL656:
 	cmp	r2, r6
+	.loc 1 1845 0
 	ittt	ne
 	ldrhne	r2, [r0, #4]
 	addne	r2, r2, r1
 	strhne	r2, [r0, #4]	@ movhi
-	b	.L636
-.L640:
-	.align	2
+	b	.L635
 .L639:
-	.word	.LANCHOR36
-	.word	.LANCHOR51
-	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
-	.section	.text.make_superblock,"ax",%progbits
-	.align	1
+	.align	2
+.L638:
+	.word	.LANCHOR37
+	.word	.LANCHOR52
+	.cfi_endproc
+.LFE370:
+	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
+	.section	.text.make_superblock,"ax",%progbits
+	.align	1
 	.global	make_superblock
 	.syntax unified
 	.thumb
@@ -4473,92 +7528,144 @@ ftl_sb_update_avl_pages:
 	.fpu softvfp
 	.type	make_superblock, %function
 make_superblock:
+.LFB375:
+	.loc 1 2332 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L654
-	ldrh	r2, [r0]
+.LVL657:
+	.loc 1 2335 0
+	ldr	r3, .L653
+	.loc 1 2332 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 1 2332 0
 	mov	r4, r0
+	.loc 1 2335 0
+	ldrh	r2, [r0]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L642
-	ldr	r1, .L654+4
-	movw	r2, #2298
-	ldr	r0, .L654+8
+	bcc	.L641
+	.loc 1 2335 0 is_stmt 0 discriminator 1
+	ldr	r1, .L653+4
+	movw	r2, #2335
+	ldr	r0, .L653+8
+.LVL658:
 	bl	printf
-	ldr	r1, .L654+12
-	ldr	r0, .L654+16
+.LVL659:
+	ldr	r1, .L653+12
+	ldr	r0, .L653+16
 	bl	printf
-.L642:
-	ldr	r3, .L654+20
+.LVL660:
+.L641:
+	.loc 1 2338 0 is_stmt 1
+	ldr	r3, .L653+20
 	add	r6, r4, #16
-	ldr	r10, .L654+40
+	.loc 1 2339 0
+	ldr	r10, .L653+40
+	.loc 1 2340 0
 	movw	r7, #65535
+	.loc 1 2336 0
 	movs	r5, #0
+	.loc 1 2338 0
 	ldrh	r8, [r3]
+	.loc 1 2336 0
 	strh	r5, [r4, #4]	@ movhi
+	.loc 1 2337 0
 	strb	r5, [r4, #7]
-.L643:
+.LVL661:
+.L642:
+	.loc 1 2338 0 discriminator 1
 	uxth	r3, r5
 	cmp	r8, r3
-	bhi	.L645
-	ldr	r2, .L654+24
+	bhi	.L644
+	.loc 1 2348 0
+	ldr	r2, .L653+24
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r2]
 	smulbb	r3, r3, r2
 	strh	r3, [r4, #4]	@ movhi
+	.loc 1 2349 0
 	movs	r3, #0
 	strb	r3, [r4, #9]
-	ldr	r3, .L654+28
+	.loc 1 2350 0
+	ldr	r3, .L653+28
 	ldr	r3, [r3]
-	cbz	r3, .L646
-	ldr	r3, .L654+32
+	cbz	r3, .L645
+	.loc 1 2350 0 is_stmt 0 discriminator 1
+	ldr	r3, .L653+32
 	ldrh	r2, [r4]
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r2, lsl #1]
 	cmp	r3, #59
+	.loc 1 2351 0 is_stmt 1 discriminator 1
 	itt	ls
 	movls	r3, #1
 	strbls	r3, [r4, #9]
-.L646:
-	ldr	r3, .L654+36
+.L645:
+	.loc 1 2354 0
+	ldr	r3, .L653+36
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L647
+	cbz	r3, .L646
+	.loc 1 2355 0
 	movs	r3, #1
 	strb	r3, [r4, #9]
-.L647:
+.L646:
+	.loc 1 2357 0
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L645:
+.LVL662:
+.L644:
+	.loc 1 2339 0
 	ldrh	r1, [r4]
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
+.LVL663:
+	.loc 1 2340 0
 	strh	r7, [r6]	@ movhi
+	.loc 1 2339 0
 	mov	fp, r0
+.LVL664:
+	.loc 1 2341 0
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L644
+.LVL665:
+	cbnz	r0, .L643
+	.loc 1 2342 0
 	strh	fp, [r6]	@ movhi
+	.loc 1 2343 0
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	strb	r3, [r4, #7]
-.L644:
+.L643:
+.LVL666:
 	adds	r5, r5, #1
+.LVL667:
 	adds	r6, r6, #2
-	b	.L643
-.L655:
-	.align	2
+	b	.L642
 .L654:
-	.word	.LANCHOR38
-	.word	.LANCHOR100
-	.word	.LC4
-	.word	.LC5
-	.word	.LC6
-	.word	.LANCHOR36
-	.word	.LANCHOR51
+	.align	2
+.L653:
+	.word	.LANCHOR39
 	.word	.LANCHOR101
-	.word	.LANCHOR77
+	.word	.LC6
+	.word	.LC7
+	.word	.LC8
+	.word	.LANCHOR37
+	.word	.LANCHOR52
+	.word	.LANCHOR28
+	.word	.LANCHOR78
 	.word	.LANCHOR1
-	.word	.LANCHOR45
+	.word	.LANCHOR46
+	.cfi_endproc
+.LFE375:
 	.size	make_superblock, .-make_superblock
 	.section	.text.update_multiplier_value,"ax",%progbits
 	.align	1
@@ -4569,54 +7676,93 @@ make_superblock:
 	.fpu softvfp
 	.type	update_multiplier_value, %function
 update_multiplier_value:
+.LFB382:
+	.loc 1 2710 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL668:
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 3, -32
+	.cfi_offset 4, -28
+	.cfi_offset 5, -24
+	.cfi_offset 6, -20
+	.cfi_offset 7, -16
+	.cfi_offset 8, -12
+	.cfi_offset 10, -8
+	.cfi_offset 14, -4
+	.loc 1 2714 0
 	movs	r5, #0
-	ldr	r3, .L662
+	ldr	r3, .L661
+	.loc 1 2710 0
 	mov	r6, r0
+	.loc 1 2712 0
 	mov	r4, r5
-	ldr	r10, .L662+12
+	.loc 1 2715 0
+	ldr	r10, .L661+12
+	.loc 1 2714 0
 	ldrh	r7, [r3]
-	ldr	r3, .L662+4
+	.loc 1 2717 0
+	ldr	r3, .L661+4
 	ldrh	r8, [r3]
-.L657:
+.LVL669:
+.L656:
+	.loc 1 2714 0 discriminator 1
 	uxth	r3, r5
 	cmp	r7, r3
-	bhi	.L659
-	cbz	r4, .L661
+	bhi	.L658
+	.loc 1 2719 0
+	cbz	r4, .L660
+	.loc 1 2720 0
 	mov	r1, r4
 	mov	r0, #32768
 	bl	__aeabi_idiv
-.L660:
-	ldr	r3, .L662+8
+.LVL670:
+.L659:
+	.loc 1 2721 0
+	ldr	r3, .L661+8
 	movs	r2, #6
 	ldr	r3, [r3]
 	mla	r6, r2, r6, r3
 	strh	r0, [r6, #4]	@ movhi
+	.loc 1 2723 0
 	movs	r0, #0
+.LVL671:
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L659:
+.LVL672:
+.L658:
+	.loc 1 2715 0
 	mov	r1, r6
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
+.LVL673:
+	.loc 1 2716 0
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L658
+.LVL674:
+	cbnz	r0, .L657
+	.loc 1 2717 0
 	add	r4, r4, r8
+.LVL675:
 	uxth	r4, r4
-.L658:
+.LVL676:
+.L657:
 	adds	r5, r5, #1
-	b	.L657
-.L661:
+.LVL677:
+	b	.L656
+.LVL678:
+.L660:
 	mov	r0, r4
-	b	.L660
-.L663:
-	.align	2
+	b	.L659
 .L662:
-	.word	.LANCHOR36
-	.word	.LANCHOR51
-	.word	.LANCHOR80
-	.word	.LANCHOR45
+	.align	2
+.L661:
+	.word	.LANCHOR37
+	.word	.LANCHOR52
+	.word	.LANCHOR81
+	.word	.LANCHOR46
+	.cfi_endproc
+.LFE382:
 	.size	update_multiplier_value, .-update_multiplier_value
 	.section	.text.GetFreeBlockMinEraseCount,"ax",%progbits
 	.align	1
@@ -4627,31 +7773,41 @@ update_multiplier_value:
 	.fpu softvfp
 	.type	GetFreeBlockMinEraseCount, %function
 GetFreeBlockMinEraseCount:
+.LFB383:
+	.loc 1 2726 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L667
+.LVL679:
+	.loc 1 2729 0
+	ldr	r3, .L666
 	ldr	r0, [r3]
-	cbz	r0, .L665
-	ldr	r3, .L667+4
+	cbz	r0, .L664
+	.loc 1 2730 0
+	ldr	r3, .L666+4
 	ldr	r3, [r3]
 	subs	r0, r0, r3
-	ldr	r3, .L667+8
+	ldr	r3, .L666+8
 	asrs	r0, r0, #1
 	muls	r0, r3, r0
-	ldr	r3, .L667+12
+	ldr	r3, .L666+12
 	ldr	r3, [r3]
 	uxth	r0, r0
 	ldrh	r0, [r3, r0, lsl #1]
-.L665:
+.LVL680:
+.L664:
+	.loc 1 2732 0
 	bx	lr
-.L668:
-	.align	2
 .L667:
-	.word	.LANCHOR86
-	.word	.LANCHOR80
+	.align	2
+.L666:
+	.word	.LANCHOR87
+	.word	.LANCHOR81
 	.word	-1431655765
-	.word	.LANCHOR77
+	.word	.LANCHOR78
+	.cfi_endproc
+.LFE383:
 	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
 	.section	.text.GetFreeBlockMaxEraseCount,"ax",%progbits
 	.align	1
@@ -4662,57 +7818,90 @@ GetFreeBlockMinEraseCount:
 	.fpu softvfp
 	.type	GetFreeBlockMaxEraseCount, %function
 GetFreeBlockMaxEraseCount:
+.LFB384:
+	.loc 1 2735 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L677
+.LVL681:
+	.loc 1 2740 0
+	ldr	r3, .L676
+	.loc 1 2735 0
 	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 1 2740 0
 	ldr	r3, [r3]
-	cbz	r3, .L675
-	ldr	r2, .L677+4
+	cbz	r3, .L674
+	.loc 1 2741 0
+	ldr	r2, .L676+4
+	.loc 1 2745 0
 	movs	r5, #6
 	movw	r6, #65535
+	.loc 1 2741 0
 	ldrh	r2, [r2]
 	rsb	r2, r2, r2, lsl #3
 	asrs	r2, r2, #3
 	cmp	r0, r2
+	.loc 1 2742 0
 	it	gt
 	uxthgt	r0, r2
-	ldr	r2, .L677+8
+.LVL682:
+	.loc 1 2743 0
+	ldr	r2, .L676+8
 	ldr	r1, [r2]
-	ldr	r2, .L677+12
+	ldr	r2, .L676+12
 	subs	r3, r3, r1
 	asrs	r3, r3, #1
 	muls	r3, r2, r3
+	.loc 1 2744 0
 	movs	r2, #0
+	.loc 1 2743 0
 	uxth	r3, r3
-.L672:
+.LVL683:
+.L671:
+	.loc 1 2744 0 discriminator 1
 	uxth	r4, r2
 	cmp	r0, r4
-	bls	.L674
+	bls	.L673
+	.loc 1 2745 0
 	mul	r4, r5, r3
 	adds	r2, r2, #1
+.LVL684:
 	ldrh	r4, [r1, r4]
 	cmp	r4, r6
-	bne	.L676
-.L674:
-	ldr	r2, .L677+16
+	bne	.L675
+.L673:
+	.loc 1 2749 0
+	ldr	r2, .L676+16
 	ldr	r2, [r2]
 	ldrh	r0, [r2, r3, lsl #1]
+.LVL685:
 	pop	{r4, r5, r6, pc}
-.L676:
-	mov	r3, r4
-	b	.L672
+.LVL686:
 .L675:
+	mov	r3, r4
+.LVL687:
+	b	.L671
+.L674:
+	.loc 1 2736 0
 	mov	r0, r3
+.LVL688:
+	.loc 1 2752 0
 	pop	{r4, r5, r6, pc}
-.L678:
-	.align	2
 .L677:
-	.word	.LANCHOR86
+	.align	2
+.L676:
 	.word	.LANCHOR87
-	.word	.LANCHOR80
+	.word	.LANCHOR88
+	.word	.LANCHOR81
 	.word	-1431655765
-	.word	.LANCHOR77
+	.word	.LANCHOR78
+	.cfi_endproc
+.LFE384:
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
 	.section	.text.free_data_superblock,"ax",%progbits
 	.align	1
@@ -4723,24 +7912,45 @@ GetFreeBlockMaxEraseCount:
 	.fpu softvfp
 	.type	free_data_superblock, %function
 free_data_superblock:
+.LFB385:
+	.loc 1 2843 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL689:
+	.loc 1 2844 0
 	movw	r2, #65535
+	.loc 1 2843 0
 	push	{r3, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 3, -8
+	.cfi_offset 14, -4
+	.loc 1 2844 0
 	cmp	r0, r2
-	beq	.L680
-	ldr	r2, .L681
+	beq	.L679
+.LVL690:
+.LBB291:
+.LBB292:
+	.loc 1 2846 0
+	ldr	r2, .L680
 	movs	r1, #0
 	ldr	r2, [r2]
 	strh	r1, [r2, r0, lsl #1]	@ movhi
+	.loc 1 2847 0
 	bl	INSERT_FREE_LIST
-.L680:
+.LVL691:
+.L679:
+.LBE292:
+.LBE291:
+	.loc 1 2849 0
 	movs	r0, #0
 	pop	{r3, pc}
-.L682:
-	.align	2
 .L681:
-	.word	.LANCHOR82
+	.align	2
+.L680:
+	.word	.LANCHOR83
+	.cfi_endproc
+.LFE385:
 	.size	free_data_superblock, .-free_data_superblock
 	.section	.text.FtlGcBufInit,"ax",%progbits
 	.align	1
@@ -4751,100 +7961,154 @@ free_data_superblock:
 	.fpu softvfp
 	.type	FtlGcBufInit, %function
 FtlGcBufInit:
-	@ args = 0, pretend = 0, frame = 8
+.LFB391:
+	.file 6 "drivers/rknand/rkftl/FtlGc.c"
+	.loc 6 21 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 6 26 0
+	movs	r5, #12
+	ldr	r0, .L687
+	.loc 6 24 0
 	movs	r3, #0
-	ldr	r1, .L688
-	mov	fp, #1
-	ldr	r2, .L688+4
-	ldr	r5, [r1]
-	ldr	r1, .L688+8
+	.loc 6 27 0
+	ldr	r6, .L687+4
+	ldr	r7, .L687+8
+	.loc 6 28 0
+	ldr	ip, .L687+28
+	.loc 6 29 0
+	ldr	r8, .L687+32
+	.loc 6 24 0
+	ldr	r2, .L687+12
 	str	r3, [r2]
-	ldr	r2, .L688+12
-	mov	r0, r5
-	ldr	r1, [r1]
+.LVL692:
+.L683:
+	.loc 6 25 0 discriminator 1
+	ldr	r2, .L687+16
+	uxth	r1, r3
+	add	lr, r3, #1
 	ldrh	r2, [r2]
-	str	r1, [sp, #4]
-	ldr	r1, .L688+16
-	ldrh	r1, [r1]
-	str	r1, [sp]
-	ldr	r1, .L688+20
-	ldr	r10, [r1]
-	ldr	r1, .L688+24
-	ldrh	r7, [r1]
-	ldr	r1, .L688+28
-	ldr	r4, [r1]
-	movs	r1, #12
-	mla	r1, r2, r1, r1
-	adds	r4, r4, #8
-	add	r8, r5, r1
-	mov	r1, r3
+	cmp	r1, r2
+	bcc	.L684
+	.loc 6 33 0 discriminator 1
+	ldr	r0, .L687+20
+	.loc 6 34 0 discriminator 1
+	movs	r4, #12
+	ldr	r1, .L687
+	movs	r5, #0
+	.loc 6 35 0 discriminator 1
+	ldr	r6, .L687+4
+	ldr	r7, .L687+8
+	.loc 6 36 0 discriminator 1
+	ldr	ip, .L687+28
+	ldr	lr, .L687+24
+.LVL693:
+.L685:
+	.loc 6 33 0 discriminator 1
+	ldr	r3, [r0]
+	cmp	r2, r3
+	bcc	.L686
+	.loc 6 38 0
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL694:
 .L684:
-	adds	r0, r0, #12
-	ldr	r6, [sp]
-	cmp	r0, r8
-	add	ip, r3, r7
-	add	r4, r4, #36
-	add	lr, r1, r6
-	bne	.L685
-	ldr	r3, .L688+32
-	mov	lr, #12
-	mov	r8, #0
-	ldr	r0, [r3]
-	ldr	r3, .L688+8
-	ldr	r4, [r3]
-	ldr	r3, .L688+20
-	ldr	ip, [r3]
+	uxth	r3, r3
+	.loc 6 26 0 discriminator 3
+	ldr	r10, [r0]
+	movs	r4, #1
+	mul	r2, r5, r3
+	add	r1, r10, r2
+	str	r4, [r1, #8]
+	.loc 6 27 0 discriminator 3
+	ldrh	r4, [r7]
+	ldr	r1, [r6]
+	muls	r4, r3, r4
+	bic	r4, r4, #3
+	add	r1, r1, r4
+	str	r1, [r10, r2]
+	.loc 6 28 0 discriminator 3
+	ldr	r1, .L687+24
+	ldr	r10, [r0]
+	ldrh	fp, [r1]
+	ldr	r1, [ip]
+	add	r4, r10, r2
+	mul	fp, r3, fp
+	bic	fp, fp, #3
+	add	r1, r1, fp
+	.loc 6 29 0 discriminator 3
+	mov	fp, #36
+	.loc 6 28 0 discriminator 3
+	str	r1, [r4, #4]
+	.loc 6 29 0 discriminator 3
+	ldr	r1, [r8]
+	ldr	r2, [r10, r2]
+	mla	r3, fp, r3, r1
+.LVL695:
+	str	r2, [r3, #8]
+	.loc 6 30 0 discriminator 3
+	ldr	r2, [r4, #4]
+	str	r2, [r3, #12]
+.LVL696:
+	mov	r3, lr
+	b	.L683
+.LVL697:
 .L686:
-	cmp	r2, r0
-	bcc	.L687
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L685:
-	bic	r1, r1, #3
-	bic	r3, r3, #3
-	mov	r6, r1
-	ldr	r1, [sp, #4]
+	.loc 6 35 0 discriminator 3
+	ldrh	r10, [r7]
+	.loc 6 34 0 discriminator 3
+	mul	r8, r4, r2
+	ldr	fp, [r1]
+	.loc 6 35 0 discriminator 3
+	mul	r10, r2, r10
+	.loc 6 34 0 discriminator 3
+	add	r3, fp, r8
+	str	r5, [r3, #8]
+	.loc 6 35 0 discriminator 3
+	ldr	r3, [r6]
+	bic	r10, r10, #3
 	add	r3, r3, r10
-	str	fp, [r0, #-4]
-	str	r3, [r0, #-8]
-	add	r6, r6, r1
-	mov	r1, lr
-	str	r6, [r0, #-12]
-	str	r3, [r4, #-32]
-	mov	r3, ip
-	str	r6, [r4, #-36]
-	b	.L684
-.L687:
-	ldr	r3, [sp]
-	mul	r10, lr, r2
-	muls	r3, r2, r3
-	add	r1, r5, r10
-	str	r8, [r1, #8]
-	bic	r3, r3, #3
-	add	r3, r3, r4
-	str	r3, [r5, r10]
-	mul	r3, r2, r7
+	str	r3, [fp, r8]
+	.loc 6 36 0 discriminator 3
+	ldrh	r10, [lr]
+	ldr	r3, [r1]
+	mul	r10, r2, r10
+	add	r8, r8, r3
+	ldr	r3, [ip]
+	.loc 6 33 0 discriminator 3
 	adds	r2, r2, #1
+.LVL698:
 	uxth	r2, r2
-	bic	r3, r3, #3
-	add	r3, r3, ip
-	str	r3, [r1, #4]
-	b	.L686
-.L689:
-	.align	2
+.LVL699:
+	.loc 6 36 0 discriminator 3
+	bic	r10, r10, #3
+	add	r3, r3, r10
+	str	r3, [r8, #4]
+	b	.L685
 .L688:
+	.align	2
+.L687:
 	.word	.LANCHOR103
-	.word	.LANCHOR102
 	.word	.LANCHOR104
-	.word	.LANCHOR36
-	.word	.LANCHOR56
-	.word	.LANCHOR105
 	.word	.LANCHOR57
-	.word	.LANCHOR106
+	.word	.LANCHOR102
+	.word	.LANCHOR37
 	.word	.LANCHOR107
+	.word	.LANCHOR58
+	.word	.LANCHOR105
+	.word	.LANCHOR106
+	.cfi_endproc
+.LFE391:
 	.size	FtlGcBufInit, .-FtlGcBufInit
 	.section	.text.FtlGcBufFree,"ax",%progbits
 	.align	1
@@ -4855,45 +8119,80 @@ FtlGcBufInit:
 	.fpu softvfp
 	.type	FtlGcBufFree, %function
 FtlGcBufFree:
+.LFB392:
+	.loc 6 41 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L697
+.LVL700:
+	.loc 6 46 0
+	ldr	r3, .L696
+	.loc 6 47 0
 	mov	ip, #12
+	.loc 6 41 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 6 45 0
 	movs	r4, #0
+	.loc 6 47 0
 	mov	fp, #36
+	.loc 6 48 0
 	mov	lr, r4
+	.loc 6 46 0
 	ldr	r7, [r3]
-	ldr	r3, .L697+4
+	.loc 6 47 0
+	ldr	r3, .L696+4
 	ldr	r5, [r3]
-.L691:
+.LVL701:
+.L690:
 	uxth	r3, r4
+	.loc 6 45 0 discriminator 1
 	cmp	r1, r3
-	bls	.L690
+	bls	.L689
+	.loc 6 47 0
 	mla	r8, fp, r3, r0
 	movs	r2, #0
-.L692:
+.L691:
+.LVL702:
 	uxth	r3, r2
+	.loc 6 46 0 discriminator 1
 	cmp	r7, r3
-	bls	.L693
+	bls	.L692
+	.loc 6 47 0
 	mul	r3, ip, r3
 	ldr	r6, [r8, #8]
 	adds	r2, r2, #1
+.LVL703:
 	add	r10, r5, r3
 	ldr	r3, [r5, r3]
 	cmp	r3, r6
-	bne	.L692
+	bne	.L691
+	.loc 6 48 0
 	str	lr, [r10, #8]
-.L693:
+.L692:
+.LVL704:
 	adds	r4, r4, #1
-	b	.L691
-.L690:
+.LVL705:
+	b	.L690
+.LVL706:
+.L689:
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L698:
-	.align	2
+.LVL707:
 .L697:
+	.align	2
+.L696:
 	.word	.LANCHOR107
 	.word	.LANCHOR103
+	.cfi_endproc
+.LFE392:
 	.size	FtlGcBufFree, .-FtlGcBufFree
 	.section	.text.FtlGcBufAlloc,"ax",%progbits
 	.align	1
@@ -4904,47 +8203,82 @@ FtlGcBufFree:
 	.fpu softvfp
 	.type	FtlGcBufAlloc, %function
 FtlGcBufAlloc:
+.LFB393:
+	.loc 6 56 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L706
+.LVL708:
+	.loc 6 61 0
+	ldr	r3, .L705
+	.loc 6 60 0
 	movs	r2, #0
+	.loc 6 56 0
 	push	{r4, r5, r6, r7, r8, r10, lr}
+	.cfi_def_cfa_offset 28
+	.cfi_offset 4, -28
+	.cfi_offset 5, -24
+	.cfi_offset 6, -20
+	.cfi_offset 7, -16
+	.cfi_offset 8, -12
+	.cfi_offset 10, -8
+	.cfi_offset 14, -4
+	.loc 6 62 0
 	mov	ip, #12
+	.loc 6 63 0
 	movs	r7, #1
+	.loc 6 64 0
 	mov	lr, #36
+	.loc 6 61 0
 	ldr	r4, [r3]
-	ldr	r3, .L706+4
+	.loc 6 62 0
+	ldr	r3, .L705+4
 	ldr	r5, [r3]
-.L700:
+.LVL709:
+.L699:
 	uxth	r8, r2
+	.loc 6 60 0 discriminator 1
 	cmp	r1, r8
-	bhi	.L704
+	bhi	.L703
+	.loc 6 70 0
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L704:
+.L703:
 	mov	r10, #0
-.L701:
+.L700:
+.LVL710:
 	uxth	r3, r10
+	.loc 6 61 0 discriminator 1
 	cmp	r4, r3
-	bls	.L702
+	bls	.L701
+	.loc 6 62 0
 	mla	r3, ip, r3, r5
 	add	r10, r10, #1
+.LVL711:
 	ldr	r6, [r3, #8]
 	cmp	r6, #0
-	bne	.L701
+	bne	.L700
+	.loc 6 64 0
 	mla	r8, lr, r8, r0
-	str	r7, [r3, #8]
 	ldr	r6, [r3]
-	ldr	r3, [r3, #4]
+	.loc 6 63 0
+	str	r7, [r3, #8]
+	.loc 6 64 0
 	str	r6, [r8, #8]
+	.loc 6 65 0
+	ldr	r3, [r3, #4]
 	str	r3, [r8, #12]
-.L702:
+.L701:
+.LVL712:
 	adds	r2, r2, #1
-	b	.L700
-.L707:
-	.align	2
+.LVL713:
+	b	.L699
 .L706:
+	.align	2
+.L705:
 	.word	.LANCHOR107
 	.word	.LANCHOR103
+	.cfi_endproc
+.LFE393:
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
 	.section	.text.IsBlkInGcList,"ax",%progbits
 	.align	1
@@ -4955,30 +8289,48 @@ FtlGcBufAlloc:
 	.fpu softvfp
 	.type	IsBlkInGcList, %function
 IsBlkInGcList:
+.LFB394:
+	.loc 6 73 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L713
-	ldr	r2, .L713+4
+.LVL714:
+	.loc 6 77 0
+	ldr	r3, .L712
+	.loc 6 76 0
+	ldr	r2, .L712+4
+	.loc 6 77 0
 	ldr	r3, [r3]
 	ldrh	r2, [r2]
 	add	r2, r3, r2, lsl #1
-.L709:
+.LVL715:
+.L708:
+	.loc 6 76 0 discriminator 1
 	cmp	r3, r2
-	bne	.L711
+	bne	.L710
+	.loc 6 80 0
 	movs	r0, #0
+.LVL716:
 	bx	lr
-.L711:
+.LVL717:
+.L710:
+	.loc 6 77 0
 	ldrh	r1, [r3], #2
 	cmp	r1, r0
-	bne	.L709
+	bne	.L708
+	.loc 6 78 0
 	movs	r0, #1
+.LVL718:
+	.loc 6 81 0
 	bx	lr
-.L714:
-	.align	2
 .L713:
+	.align	2
+.L712:
 	.word	.LANCHOR108
 	.word	.LANCHOR109
+	.cfi_endproc
+.LFE394:
 	.size	IsBlkInGcList, .-IsBlkInGcList
 	.section	.text.FtlGcUpdatePage,"ax",%progbits
 	.align	1
@@ -4989,56 +8341,95 @@ IsBlkInGcList:
 	.fpu softvfp
 	.type	FtlGcUpdatePage, %function
 FtlGcUpdatePage:
+.LFB395:
+	.loc 6 84 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL719:
 	push	{r3, r4, r5, r6, r7, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 3, -24
+	.cfi_offset 4, -20
+	.cfi_offset 5, -16
+	.cfi_offset 6, -12
+	.cfi_offset 7, -8
+	.cfi_offset 14, -4
+	.loc 6 84 0
 	mov	r5, r0
-	ldr	r4, .L719
+	.loc 6 90 0
+	ldr	r4, .L718
+	.loc 6 87 0
 	ubfx	r0, r0, #10, #16
+.LVL720:
+	.loc 6 84 0
 	mov	r6, r1
 	mov	r7, r2
+	.loc 6 87 0
 	bl	P2V_block_in_plane
-	ldr	r3, .L719+4
+.LVL721:
+	.loc 6 91 0
+	ldr	r3, .L718+4
+	.loc 6 90 0
 	ldrh	r1, [r4]
+	.loc 6 91 0
 	ldr	r2, [r3]
+	.loc 6 90 0
 	movs	r3, #0
-.L716:
+.LVL722:
+.L715:
 	uxth	ip, r3
+.LVL723:
+	.loc 6 90 0 is_stmt 0 discriminator 1
 	cmp	ip, r1
-	bcc	.L718
-	bne	.L717
+	bcc	.L717
+	.loc 6 95 0 is_stmt 1
+	bne	.L716
+	.loc 6 96 0
 	strh	r0, [r2, ip, lsl #1]	@ movhi
+	.loc 6 97 0
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	b	.L717
-.L718:
+	b	.L716
+.L717:
 	adds	r3, r3, #1
+	.loc 6 91 0
 	add	ip, r2, r3, lsl #1
+.LVL724:
 	ldrh	ip, [ip, #-2]
 	cmp	ip, r0
-	bne	.L716
-.L717:
-	ldr	r2, .L719+8
-	movs	r0, #12
-	ldr	r1, .L719+12
-	ldrh	r3, [r2]
-	ldr	r1, [r1]
-	muls	r0, r3, r0
+	bne	.L715
+.L716:
+	.loc 6 100 0
+	ldr	r0, .L718+8
+.LVL725:
+	movs	r3, #12
+	ldrh	r2, [r0]
+	muls	r3, r2, r3
+	ldr	r2, .L718+12
+	ldr	r2, [r2]
+	adds	r1, r2, r3
+	str	r6, [r1, #4]
+	.loc 6 101 0
+	str	r7, [r1, #8]
+	.loc 6 102 0
+	str	r5, [r2, r3]
+	.loc 6 106 0
+	ldrh	r3, [r0]
 	adds	r3, r3, #1
-	adds	r4, r1, r0
-	str	r6, [r4, #4]
-	str	r7, [r4, #8]
-	str	r5, [r1, r0]
-	strh	r3, [r2]	@ movhi
+	strh	r3, [r0]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.L720:
-	.align	2
+.LVL726:
 .L719:
+	.align	2
+.L718:
 	.word	.LANCHOR109
 	.word	.LANCHOR108
-	.word	.LANCHOR110
 	.word	.LANCHOR111
+	.word	.LANCHOR110
+	.cfi_endproc
+.LFE395:
 	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
 	.section	.text.FtlGcRefreshBlock,"ax",%progbits
 	.align	1
@@ -5049,34 +8440,53 @@ FtlGcUpdatePage:
 	.fpu softvfp
 	.type	FtlGcRefreshBlock, %function
 FtlGcRefreshBlock:
+.LFB403:
+	.loc 6 380 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL727:
 	push	{r4, r5, lr}
-	ldr	r4, .L724
+	.cfi_def_cfa_offset 12
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 6 384 0
+	ldr	r4, .L723
 	ldrh	r5, [r4]
 	cmp	r5, r0
-	beq	.L722
-	ldr	r3, .L724+4
+	beq	.L721
+	.loc 6 384 0 is_stmt 0 discriminator 1
+	ldr	r3, .L723+4
 	ldrh	r1, [r3]
 	cmp	r0, r1
-	beq	.L722
+	beq	.L721
+	.loc 6 386 0 is_stmt 1
 	movw	r2, #65535
 	cmp	r5, r2
-	bne	.L723
+	bne	.L722
+	.loc 6 387 0
 	strh	r0, [r4]	@ movhi
-.L722:
+.L721:
+	.loc 6 400 0
 	movs	r0, #0
+.LVL728:
 	pop	{r4, r5, pc}
-.L723:
+.LVL729:
+.L722:
+	.loc 6 388 0
 	cmp	r1, r2
+	.loc 6 389 0
 	it	eq
 	strheq	r0, [r3]	@ movhi
-	b	.L722
-.L725:
-	.align	2
+	b	.L721
 .L724:
+	.align	2
+.L723:
 	.word	.LANCHOR112
 	.word	.LANCHOR113
+	.cfi_endproc
+.LFE403:
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
 	.section	.text.FtlGcRefreshOpenBlock,"ax",%progbits
 	.align	1
@@ -5087,10 +8497,14 @@ FtlGcRefreshBlock:
 	.fpu softvfp
 	.type	FtlGcRefreshOpenBlock, %function
 FtlGcRefreshOpenBlock:
+.LFB544:
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	b	FtlGcRefreshBlock
+	.cfi_endproc
+.LFE544:
 	.size	FtlGcRefreshOpenBlock, .-FtlGcRefreshOpenBlock
 	.section	.text.FtlGcMarkBadPhyBlk,"ax",%progbits
 	.align	1
@@ -5101,55 +8515,91 @@ FtlGcRefreshOpenBlock:
 	.fpu softvfp
 	.type	FtlGcMarkBadPhyBlk, %function
 FtlGcMarkBadPhyBlk:
+.LFB404:
+	.loc 6 403 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL730:
+	.loc 6 403 0
 	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 6 403 0
 	mov	r4, r0
+	.loc 6 405 0
 	bl	P2V_block_in_plane
+.LVL731:
 	mov	r5, r0
+.LVL732:
+	.loc 6 410 0
 	bl	FtlGcRefreshBlock
-	ldr	r3, .L735
+.LVL733:
+	.loc 6 411 0
+	ldr	r3, .L734
 	ldr	r3, [r3]
-	cbz	r3, .L728
-	ldr	r3, .L735+4
+	cbz	r3, .L727
+	.loc 6 412 0
+	ldr	r3, .L734+4
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r5, lsl #1]
 	cmp	r3, #29
+	.loc 6 413 0
 	itt	hi
 	subhi	r3, r3, #30
 	strhhi	r3, [r2, r5, lsl #1]	@ movhi
-.L728:
-	ldr	r2, .L735+8
+.L727:
+.LVL734:
+	.loc 6 416 0
+	ldr	r2, .L734+8
 	movs	r1, #0
-	ldr	r5, .L735+12
+	.loc 6 417 0
+	ldr	r5, .L734+12
+.LVL735:
+	.loc 6 416 0
 	ldrh	r3, [r2]
-.L729:
+.LVL736:
+.L728:
+	.loc 6 416 0 is_stmt 0 discriminator 1
 	uxth	r0, r1
 	cmp	r3, r0
-	bhi	.L731
+	bhi	.L730
+	.loc 6 420 0 is_stmt 1
 	cmp	r3, #15
+	.loc 6 421 0
 	itttt	ls
 	addls	r1, r3, #1
+.LVL737:
 	strhls	r1, [r2]	@ movhi
-	ldrls	r2, .L735+12
+	ldrls	r2, .L734+12
 	strhls	r4, [r2, r3, lsl #1]	@ movhi
-	b	.L730
-.L731:
+	b	.L729
+.LVL738:
+.L730:
 	adds	r1, r1, #1
+.LVL739:
+	.loc 6 417 0
 	add	r0, r5, r1, lsl #1
+.LVL740:
 	ldrh	r0, [r0, #-2]
 	cmp	r0, r4
-	bne	.L729
-.L730:
+	bne	.L728
+.L729:
+	.loc 6 423 0
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L736:
-	.align	2
 .L735:
-	.word	.LANCHOR101
-	.word	.LANCHOR77
+	.align	2
+.L734:
+	.word	.LANCHOR28
+	.word	.LANCHOR78
 	.word	.LANCHOR114
 	.word	.LANCHOR115
+	.cfi_endproc
+.LFE404:
 	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
 	.section	.text.FtlGcReFreshBadBlk,"ax",%progbits
 	.align	1
@@ -5160,41 +8610,64 @@ FtlGcMarkBadPhyBlk:
 	.fpu softvfp
 	.type	FtlGcReFreshBadBlk, %function
 FtlGcReFreshBadBlk:
+.LFB405:
+	.loc 6 427 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L743
+	.loc 6 428 0
+	ldr	r3, .L742
+	.loc 6 427 0
 	push	{r4, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 4, -8
+	.cfi_offset 14, -4
+	.loc 6 428 0
 	ldrh	r3, [r3]
-	cbz	r3, .L738
-	ldr	r2, .L743+4
+	cbz	r3, .L737
+	.loc 6 428 0 is_stmt 0 discriminator 1
+	ldr	r2, .L742+4
 	ldrh	r1, [r2]
 	movw	r2, #65535
 	cmp	r1, r2
-	bne	.L738
-	ldr	r4, .L743+8
+	bne	.L737
+	.loc 6 429 0 is_stmt 1
+	ldr	r4, .L742+8
 	ldrh	r2, [r4]
 	cmp	r2, r3
+	.loc 6 430 0
 	itt	cs
 	movcs	r3, #0
 	strhcs	r3, [r4]	@ movhi
-	ldr	r3, .L743+12
+.LBB295:
+.LBB296:
+	.loc 6 431 0
+	ldr	r3, .L742+12
 	ldrh	r2, [r4]
 	ldrh	r0, [r3, r2, lsl #1]
 	bl	P2V_block_in_plane
+.LVL741:
 	bl	FtlGcRefreshBlock
+.LVL742:
+	.loc 6 432 0
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-.L738:
+.L737:
+.LBE296:
+.LBE295:
+	.loc 6 435 0
 	movs	r0, #0
 	pop	{r4, pc}
-.L744:
-	.align	2
 .L743:
+	.align	2
+.L742:
 	.word	.LANCHOR114
 	.word	.LANCHOR112
 	.word	.LANCHOR116
 	.word	.LANCHOR115
+	.cfi_endproc
+.LFE405:
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
 	.section	.text.ftl_memset,"ax",%progbits
 	.align	1
@@ -5205,10 +8678,19 @@ FtlGcReFreshBadBlk:
 	.fpu softvfp
 	.type	ftl_memset, %function
 ftl_memset:
+.LFB480:
+	.file 7 "drivers/rknand/rkftl/FTL_OSDepend_3.10.c"
+	.loc 7 27 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL743:
+	.loc 7 28 0
 	b	memset
+.LVL744:
+	.cfi_endproc
+.LFE480:
 	.size	ftl_memset, .-ftl_memset
 	.section	.text.BuildFlashLsbPageTable,"ax",%progbits
 	.align	1
@@ -5219,172 +8701,273 @@ ftl_memset:
 	.fpu softvfp
 	.type	BuildFlashLsbPageTable, %function
 BuildFlashLsbPageTable:
+.LFB233:
+	.loc 2 930 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL745:
 	push	{r4, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 4, -8
+	.cfi_offset 14, -4
+	.loc 2 930 0
 	mov	r4, r1
-	cbnz	r0, .L747
-	ldr	r3, .L784
-.L748:
+	.loc 2 933 0
+	cbnz	r0, .L746
+	.loc 2 935 0 discriminator 3
+	ldr	r3, .L783
+.LVL746:
+.L747:
 	strh	r0, [r3, r0, lsl #1]	@ movhi
+.LVL747:
 	adds	r0, r0, #1
+.LVL748:
+	.loc 2 934 0 discriminator 3
 	cmp	r0, #256
-	bne	.L748
-.L754:
+	bne	.L747
+.LVL749:
+.L753:
+	.loc 2 966 0
 	movs	r1, #255
 	mov	r2, #1024
-	ldr	r0, .L784+4
+	ldr	r0, .L783+4
+	.loc 2 967 0
 	uxth	r4, r4
+.LVL750:
+	.loc 2 966 0
 	bl	ftl_memset
-	ldr	r1, .L784
+.LVL751:
+	.loc 2 969 0
+	ldr	r1, .L783
+	.loc 2 968 0
 	movs	r3, #0
-	ldr	r0, .L784+4
-.L749:
+	.loc 2 969 0
+	ldr	r0, .L783+4
+.LVL752:
+.L748:
+	.loc 2 968 0 discriminator 1
 	uxth	r2, r3
 	cmp	r4, r2
-	bhi	.L771
+	bhi	.L770
+	.loc 2 974 0
 	pop	{r4, pc}
-.L747:
+.LVL753:
+.L746:
+	.loc 2 936 0
 	cmp	r0, #1
-	bne	.L750
-	ldr	r1, .L784
+	bne	.L749
+	.loc 2 939 0
+	ldr	r1, .L783
+.LVL754:
 	movs	r3, #0
-.L753:
+.LVL755:
+.L752:
 	cmp	r3, #3
 	uxth	r2, r3
-	bls	.L751
+.LVL756:
+	bls	.L750
+	.loc 2 939 0 is_stmt 0 discriminator 1
 	tst	r2, #1
 	ite	ne
 	movne	r0, #3
 	moveq	r0, #2
 	rsb	r2, r0, r2, lsl #1
+.LVL757:
 	uxth	r2, r2
-.L751:
+.L750:
+	.loc 2 939 0 discriminator 8
 	strh	r2, [r1, r3, lsl #1]	@ movhi
+.LVL758:
 	adds	r3, r3, #1
+.LVL759:
+	.loc 2 938 0 is_stmt 1 discriminator 8
 	cmp	r3, #256
-	bne	.L753
-	b	.L754
-.L750:
+	bne	.L752
+	b	.L753
+.LVL760:
+.L749:
+	.loc 2 940 0
 	cmp	r0, #2
-	bne	.L755
-	ldr	r1, .L784
+	bne	.L754
+	.loc 2 943 0
+	ldr	r1, .L783
+.LVL761:
 	movs	r2, #0
-.L757:
+.L756:
 	uxth	r3, r2
+.LVL762:
 	cmp	r2, #1
 	ittt	hi
 	lslhi	r3, r3, #1
+.LVL763:
 	addhi	r3, r3, #-1
 	uxthhi	r3, r3
 	strh	r3, [r1, r2, lsl #1]	@ movhi
+.LVL764:
 	adds	r2, r2, #1
+.LVL765:
+	.loc 2 942 0
 	cmp	r2, #256
-	bne	.L757
-	b	.L754
-.L755:
+	bne	.L756
+	b	.L753
+.LVL766:
+.L754:
+	.loc 2 944 0
 	cmp	r0, #3
-	bne	.L758
-	ldr	r1, .L784
+	bne	.L757
+	.loc 2 947 0
+	ldr	r1, .L783
+.LVL767:
 	movs	r3, #0
-.L761:
+.LVL768:
+.L760:
 	cmp	r3, #5
 	uxth	r2, r3
-	bls	.L759
+.LVL769:
+	bls	.L758
+	.loc 2 947 0 is_stmt 0 discriminator 1
 	tst	r2, #1
 	ite	ne
 	movne	r0, #5
 	moveq	r0, #4
 	rsb	r2, r0, r2, lsl #1
+.LVL770:
 	uxth	r2, r2
-.L759:
+.L758:
+	.loc 2 947 0 discriminator 8
 	strh	r2, [r1, r3, lsl #1]	@ movhi
+.LVL771:
 	adds	r3, r3, #1
+.LVL772:
+	.loc 2 946 0 is_stmt 1 discriminator 8
 	cmp	r3, #256
-	bne	.L761
-	b	.L754
-.L758:
+	bne	.L760
+	b	.L753
+.LVL773:
+.L757:
+	.loc 2 948 0
 	cmp	r0, #4
 	mov	r3, #0
-	bne	.L762
-	ldr	r2, .L784
+	bne	.L761
+.LVL774:
+	.loc 2 951 0 discriminator 2
+	ldr	r2, .L783
 	strh	r3, [r2]	@ movhi
+.LVL775:
 	movs	r3, #1
 	strh	r3, [r2, #2]	@ movhi
+.LVL776:
 	movs	r3, #2
 	strh	r3, [r2, #4]	@ movhi
+.LVL777:
 	movs	r3, #3
 	strh	r3, [r2, #6]	@ movhi
+.LVL778:
 	movs	r3, #5
 	strh	r3, [r2, #10]	@ movhi
 	movs	r3, #7
 	strh	r3, [r2, #12]	@ movhi
 	movs	r3, #8
 	strh	r0, [r2, #8]	@ movhi
+.LVL779:
 	strh	r3, [r2, #14]!	@ movhi
-.L764:
+.LVL780:
+.L763:
+	.loc 2 953 0
 	tst	r3, #1
 	ite	ne
 	movne	r1, #7
 	moveq	r1, #6
 	rsb	r1, r1, r3, lsl #1
+	.loc 2 952 0
 	adds	r3, r3, #1
+.LVL781:
 	uxth	r3, r3
+.LVL782:
+	.loc 2 953 0
 	strh	r1, [r2, #2]!	@ movhi
+	.loc 2 952 0
 	cmp	r3, #256
-	bne	.L764
-	b	.L754
-.L762:
+	bne	.L763
+	b	.L753
+.LVL783:
+.L761:
+	.loc 2 954 0
 	cmp	r0, #5
-	bne	.L765
-	ldr	r2, .L784
-.L766:
+	bne	.L764
+	.loc 2 957 0 discriminator 3
+	ldr	r2, .L783
+.L765:
+.LVL784:
 	strh	r3, [r2, r3, lsl #1]	@ movhi
+.LVL785:
 	adds	r3, r3, #1
+.LVL786:
+	.loc 2 956 0 discriminator 3
 	cmp	r3, #16
-	bne	.L766
-	ldr	r2, .L784+8
-.L767:
+	bne	.L765
+	ldr	r2, .L783+8
+.LVL787:
+.L766:
+	.loc 2 959 0 discriminator 2
 	strh	r3, [r2, #2]!	@ movhi
 	adds	r3, r3, #2
 	uxth	r3, r3
+	.loc 2 958 0 discriminator 2
 	cmp	r3, #496
-	bne	.L767
-	b	.L754
-.L765:
+	bne	.L766
+	b	.L753
+.L764:
+	.loc 2 960 0
 	cmp	r0, #6
-	bne	.L754
-	ldr	r0, .L784
+	bne	.L753
+	.loc 2 963 0
+	ldr	r0, .L783
+.LVL788:
 	mov	r1, r3
-.L770:
+.LVL789:
+.L769:
 	cmp	r1, #5
 	uxth	r2, r1
-	bls	.L768
+.LVL790:
+	bls	.L767
+	.loc 2 963 0 is_stmt 0 discriminator 1
 	tst	r2, #1
 	ite	ne
 	movne	r2, #12
+.LVL791:
 	moveq	r2, #10
 	subs	r2, r3, r2
 	uxth	r2, r2
-.L768:
+.L767:
+	.loc 2 963 0 discriminator 8
 	strh	r2, [r0, r1, lsl #1]	@ movhi
+.LVL792:
 	adds	r1, r1, #1
+.LVL793:
+	.loc 2 962 0 is_stmt 1 discriminator 8
 	cmp	r1, #256
 	add	r3, r3, #3
 	uxth	r3, r3
-	bne	.L770
-	b	.L754
-.L771:
+	bne	.L769
+	b	.L753
+.LVL794:
+.L770:
+	.loc 2 969 0 discriminator 3
 	ldrh	r2, [r1, r3, lsl #1]
 	adds	r3, r3, #1
+.LVL795:
 	strh	r2, [r0, r2, lsl #1]	@ movhi
-	b	.L749
-.L785:
-	.align	2
+	b	.L748
 .L784:
+	.align	2
+.L783:
 	.word	.LANCHOR16
 	.word	.LANCHOR117
 	.word	.LANCHOR16+30
+	.cfi_endproc
+.LFE233:
 	.size	BuildFlashLsbPageTable, .-BuildFlashLsbPageTable
 	.section	.text.FlashDieInfoInit,"ax",%progbits
 	.align	1
@@ -5395,129 +8978,191 @@ BuildFlashLsbPageTable:
 	.fpu softvfp
 	.type	FlashDieInfoInit, %function
 FlashDieInfoInit:
+.LFB248:
+	.loc 2 2048 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 2051 0
 	movs	r3, #0
-	ldr	r2, .L804
-	ldr	r4, .L804+4
+	.loc 2 2052 0
+	ldr	r2, .L803
+	.loc 2 2051 0
+	ldr	r5, .L803+4
+	.loc 2 2052 0
 	strb	r3, [r2]
-	str	r2, [sp]
-	strb	r3, [r4]
-	ldr	r3, .L804+8
-	ldr	r7, .L804+12
+	mov	fp, r2
+	ldr	r7, .L803+8
+	.loc 2 2051 0
+	strb	r3, [r5]
+	.loc 2 2053 0
+	ldr	r3, .L803+12
 	ldrh	r3, [r3, #10]
+	.loc 2 2054 0
 	cmp	r3, #256
-	bls	.L787
+	bls	.L786
+	.loc 2 2055 0
 	mov	r3, #512
-.L803:
+.L802:
+	.loc 2 2059 0
 	movs	r2, #8
 	movs	r1, #0
-	ldr	r0, .L804+16
+	ldr	r0, .L803+16
+	.loc 2 2066 0
 	movs	r6, #0
+	.loc 2 2057 0
 	str	r3, [r7]
+	.loc 2 2059 0
 	bl	ftl_memset
+.LVL796:
+	.loc 2 2060 0
 	movs	r2, #32
 	movs	r1, #0
-	ldr	r0, .L804+20
+	ldr	r0, .L803+20
 	bl	ftl_memset
+.LVL797:
+	.loc 2 2061 0
 	movs	r2, #128
 	movs	r1, #0
-	ldr	r0, .L804+24
+	ldr	r0, .L803+24
 	bl	ftl_memset
-	ldr	r3, .L804+28
-	ldr	fp, .L804+36
-	ldr	r5, [r3]
-	ldr	r3, .L804+16
-	ldrb	r10, [r5]	@ zero_extendqisi2
-	add	r8, r5, #1
-.L791:
-	mov	r2, r10
-	add	r1, fp, r6, lsl #3
+.LVL798:
+	.loc 2 2067 0
+	ldr	r3, .L803+28
+	ldr	r10, .L803+36
+	ldr	r4, [r3]
+	.loc 2 2069 0
+	ldr	r3, .L803+16
+	.loc 2 2067 0
+	add	r8, r4, #1
+.LVL799:
+.L790:
+	ldrb	r2, [r4]	@ zero_extendqisi2
+	add	r1, r10, r6, lsl #3
 	mov	r0, r8
 	str	r3, [sp, #4]
+.LVL800:
 	bl	FlashMemCmp8
+.LVL801:
 	ldr	r3, [sp, #4]
-	cbnz	r0, .L790
-	ldrb	r2, [r4]	@ zero_extendqisi2
-	ldr	r1, .L804+20
+	cbnz	r0, .L789
+	.loc 2 2068 0
+	ldrb	r2, [r5]	@ zero_extendqisi2
+	ldr	r1, .L803+20
+	.loc 2 2069 0
 	strb	r6, [r3, r2]
+	.loc 2 2068 0
 	str	r0, [r1, r2, lsl #2]
+	.loc 2 2069 0
 	adds	r1, r2, #1
-	strb	r1, [r4]
-.L790:
+	strb	r1, [r5]
+.L789:
+	.loc 2 2066 0 discriminator 2
 	adds	r6, r6, #1
+.LVL802:
 	cmp	r6, #4
-	bne	.L791
-	ldrb	r3, [r4]	@ zero_extendqisi2
-	ldr	r2, [sp]
-	strb	r3, [r2]
-	ldrb	r3, [r5, #8]	@ zero_extendqisi2
+	bne	.L790
+	.loc 2 2076 0
+	ldrb	r3, [r5]	@ zero_extendqisi2
+	strb	r3, [fp]
+	.loc 2 2077 0
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #2
-	beq	.L792
-.L796:
-	ldrh	r2, [r5, #14]
-	ldrb	r3, [r4]	@ zero_extendqisi2
+	beq	.L791
+.L795:
+	.loc 2 2087 0
+	ldrh	r2, [r4, #14]
+	ldrb	r3, [r5]	@ zero_extendqisi2
 	smulbb	r3, r3, r2
-	ldrb	r2, [r5, #13]	@ zero_extendqisi2
+	ldrb	r2, [r4, #13]	@ zero_extendqisi2
 	smulbb	r3, r3, r2
-	ldr	r2, .L804+32
+	ldr	r2, .L803+32
 	strh	r3, [r2]	@ movhi
+	.loc 2 2088 0
 	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L787:
+.LVL803:
+.L786:
+	.cfi_restore_state
+	.loc 2 2056 0
 	cmp	r3, #128
+	.loc 2 2057 0
 	it	hi
 	movhi	r3, #256
-	b	.L803
-.L792:
-	ldr	fp, [r7]
+	b	.L802
+.LVL804:
+.L791:
+	.loc 2 2080 0
+	ldr	r10, [r7]
 	movs	r6, #0
-	ldr	r7, .L804+20
-	ldr	r3, .L804+16
-.L795:
-	str	r3, [sp]
-	mov	r2, r10
-	ldr	r3, .L804+36
+.LVL805:
+	ldr	r7, .L803+20
+	.loc 2 2083 0
+	ldr	fp, .L803+16
+.L794:
+.LVL806:
+	.loc 2 2079 0
+	ldr	r3, .L803+36
 	mov	r0, r8
+	ldrb	r2, [r4]	@ zero_extendqisi2
 	add	r1, r3, r6, lsl #3
 	bl	FlashMemCmp8
-	ldr	r3, [sp]
-	cbnz	r0, .L793
-	ldrh	r2, [r5, #14]
-	ldrb	r1, [r4]	@ zero_extendqisi2
-	and	r0, r2, #65280
-	ldrb	r2, [r5, #13]	@ zero_extendqisi2
-	mul	r2, fp, r2
-	muls	r2, r0, r2
-	str	r2, [r7, r1, lsl #2]
-	ldrb	r0, [r5, #23]	@ zero_extendqisi2
-	cbz	r0, .L794
-	lsls	r2, r2, #1
-	str	r2, [r7, r1, lsl #2]
-.L794:
-	adds	r2, r1, #1
-	strb	r6, [r3, r1]
-	strb	r2, [r4]
+.LVL807:
+	cbnz	r0, .L792
+	.loc 2 2080 0
+	ldrh	r3, [r4, #14]
+	ldrb	r2, [r5]	@ zero_extendqisi2
+	and	r1, r3, #65280
+	ldrb	r3, [r4, #13]	@ zero_extendqisi2
+	mul	r3, r10, r3
+	muls	r3, r1, r3
+	str	r3, [r7, r2, lsl #2]
+	.loc 2 2081 0
+	ldrb	r1, [r4, #23]	@ zero_extendqisi2
+	cbz	r1, .L793
+	.loc 2 2082 0
+	lsls	r3, r3, #1
+	str	r3, [r7, r2, lsl #2]
 .L793:
+	.loc 2 2083 0
+	adds	r3, r2, #1
+	strb	r6, [fp, r2]
+	strb	r3, [r5]
+.L792:
+	.loc 2 2078 0 discriminator 2
 	adds	r6, r6, #1
+.LVL808:
 	cmp	r6, #4
-	bne	.L795
-	b	.L796
-.L805:
-	.align	2
+	bne	.L794
+	b	.L795
 .L804:
+	.align	2
+.L803:
 	.word	.LANCHOR118
 	.word	.LANCHOR25
-	.word	.LANCHOR29
 	.word	.LANCHOR3
+	.word	.LANCHOR30
 	.word	.LANCHOR26
 	.word	.LANCHOR17
 	.word	.LANCHOR23
 	.word	.LANCHOR18
 	.word	.LANCHOR119
 	.word	.LANCHOR22
+	.cfi_endproc
+.LFE248:
 	.size	FlashDieInfoInit, .-FlashDieInfoInit
 	.section	.text.ReadFlashInfo,"ax",%progbits
 	.align	1
@@ -5528,69 +9173,111 @@ FlashDieInfoInit:
 	.fpu softvfp
 	.type	ReadFlashInfo, %function
 ReadFlashInfo:
+.LFB266:
+	.loc 2 3343 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL809:
 	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 2 3346 0
 	movs	r2, #11
 	movs	r1, #0
+	.loc 2 3343 0
 	mov	r4, r0
+.LVL810:
+	.loc 2 3360 0
+	movs	r5, #1
+	.loc 2 3346 0
 	bl	ftl_memset
-	ldr	r3, .L809
+.LVL811:
+	.loc 2 3348 0
+	ldr	r1, .L808
+	ldr	r2, .L808+4
+	ldr	r3, [r1]
+	ldr	r2, [r2]
+	ldrb	r3, [r3, #9]	@ zero_extendqisi2
+	smulbb	r3, r3, r2
 	movs	r2, #0
-	ldr	r1, [r3]
-	ldr	r3, .L809+4
-	ldrb	r0, [r1, #9]	@ zero_extendqisi2
-	ldr	r3, [r3]
-	smulbb	r3, r3, r0
 	uxth	r3, r3
 	strb	r3, [r4, #4]
 	lsrs	r3, r3, #8
 	strb	r3, [r4, #5]
-	ldr	r3, .L809+8
+	.loc 2 3349 0
+	ldr	r3, .L808+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	strb	r3, [r4, #7]
-	ldr	r3, .L809+12
-	ldrb	r5, [r3]	@ zero_extendqisi2
-	strb	r5, [r4]
-	ldrb	r5, [r3, #1]	@ zero_extendqisi2
-	strb	r5, [r4, #1]
-	ldrb	r5, [r3, #2]	@ zero_extendqisi2
-	ldrb	r3, [r3, #3]	@ zero_extendqisi2
-	strb	r0, [r4, #6]
-	strb	r5, [r4, #2]
-	movs	r5, #1
+.LBB297:
+.LBB298:
+	.loc 4 1826 0
+	ldr	r3, .L808+12
+	ldr	r3, [r3]
+.LBE298:
+.LBE297:
+	.loc 2 3351 0
+	ubfx	r0, r3, #8, #8
+	strb	r3, [r4]
+	strb	r0, [r4, #1]
+	ubfx	r0, r3, #16, #8
+	lsrs	r3, r3, #24
+	strb	r0, [r4, #2]
+	.loc 2 3360 0
+	ldr	r0, .L808+16
+	.loc 2 3351 0
 	strb	r3, [r4, #3]
-	movs	r3, #32
-	strb	r3, [r4, #8]
-	ldrb	r3, [r1, #7]	@ zero_extendqisi2
-	ldr	r0, .L809+16
+	.loc 2 3355 0
+	ldr	r3, [r1]
+	ldrb	r1, [r3, #9]	@ zero_extendqisi2
+	strb	r1, [r4, #6]
+	.loc 2 3356 0
+	movs	r1, #32
+	strb	r1, [r4, #8]
+	.loc 2 3357 0
+	ldrb	r3, [r3, #7]	@ zero_extendqisi2
+	.loc 2 3358 0
 	strb	r2, [r4, #10]
+.LVL812:
+	.loc 2 3357 0
 	strb	r3, [r4, #9]
-	ldr	r3, .L809+20
+	.loc 2 3359 0
+	ldr	r3, .L808+20
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	mov	r3, r2
-.L807:
+.LVL813:
+.L806:
+	.loc 2 3359 0 is_stmt 0 discriminator 1
 	uxtb	r2, r3
 	cmp	r1, r2
-	bhi	.L808
+	bhi	.L807
+	.loc 2 3361 0 is_stmt 1
 	pop	{r4, r5, r6, pc}
-.L808:
+.LVL814:
+.L807:
+	.loc 2 3360 0 discriminator 3
 	ldrb	r2, [r3, r0]	@ zero_extendqisi2
 	adds	r3, r3, #1
+.LVL815:
 	ldrb	r6, [r4, #10]	@ zero_extendqisi2
 	lsl	r2, r5, r2
 	orrs	r2, r2, r6
 	strb	r2, [r4, #10]
-	b	.L807
-.L810:
-	.align	2
+	b	.L806
 .L809:
+	.align	2
+.L808:
 	.word	.LANCHOR18
 	.word	.LANCHOR3
-	.word	.LANCHOR31
-	.word	.LANCHOR67
+	.word	.LANCHOR32
+	.word	.LANCHOR68
 	.word	.LANCHOR26
 	.word	.LANCHOR25
+	.cfi_endproc
+.LFE266:
 	.size	ReadFlashInfo, .-ReadFlashInfo
 	.section	.text.FtlBbt2Bitmap,"ax",%progbits
 	.align	1
@@ -5601,58 +9288,92 @@ ReadFlashInfo:
 	.fpu softvfp
 	.type	FtlBbt2Bitmap, %function
 FtlBbt2Bitmap:
+.LFB319:
+	.loc 5 72 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L817
+.LVL816:
+	.loc 5 74 0
+	ldr	r3, .L816
+	.loc 5 72 0
 	push	{r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
+	.cfi_offset 14, -4
+	.loc 5 72 0
 	mov	r5, r0
-	ldr	r7, .L817+4
+	.loc 5 79 0
+	ldr	r7, .L816+4
+	.loc 5 72 0
 	mov	r6, r1
 	subs	r4, r5, #2
 	addw	r5, r5, #1022
+	.loc 5 74 0
 	ldrh	r2, [r3]
 	movs	r1, #0
-	ldr	r8, .L817+20
+.LVL817:
+	.loc 5 79 0
+	ldr	r8, .L816+20
+	.loc 5 74 0
 	mov	r0, r6
+.LVL818:
 	lsls	r2, r2, #2
 	bl	ftl_memset
-.L814:
+.LVL819:
+.L813:
+	.loc 5 77 0
 	ldrh	r3, [r4, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L811
+	beq	.L810
+	.loc 5 79 0
 	ldrh	r2, [r7]
 	cmp	r2, r3
-	bhi	.L813
+	bhi	.L812
+	.loc 5 79 0 is_stmt 0 discriminator 1
 	mov	r1, r8
 	movs	r2, #79
-	ldr	r0, .L817+8
+	ldr	r0, .L816+8
 	bl	printf
-	ldr	r1, .L817+12
-	ldr	r0, .L817+16
+.LVL820:
+	ldr	r1, .L816+12
+	ldr	r0, .L816+16
 	bl	printf
-.L813:
+.LVL821:
+.L812:
+	.loc 5 80 0 is_stmt 1 discriminator 2
 	ldrh	r3, [r4, #2]!
 	movs	r2, #1
+	.loc 5 75 0 discriminator 2
 	cmp	r5, r4
+	.loc 5 80 0 discriminator 2
 	lsr	r1, r3, #5
 	and	r3, r3, #31
 	lsl	r3, r2, r3
 	ldr	r2, [r6, r1, lsl #2]
 	orr	r2, r2, r3
 	str	r2, [r6, r1, lsl #2]
-	bne	.L814
-.L811:
+	.loc 5 75 0 discriminator 2
+	bne	.L813
+.L810:
 	pop	{r4, r5, r6, r7, r8, pc}
-.L818:
-	.align	2
+.LVL822:
 .L817:
+	.align	2
+.L816:
 	.word	.LANCHOR120
-	.word	.LANCHOR49
-	.word	.LC4
-	.word	.LC5
+	.word	.LANCHOR50
 	.word	.LC6
+	.word	.LC7
+	.word	.LC8
 	.word	.LANCHOR121
+	.cfi_endproc
+.LFE319:
 	.size	FtlBbt2Bitmap, .-FtlBbt2Bitmap
 	.section	.text.FtlBbtMemInit,"ax",%progbits
 	.align	1
@@ -5663,22 +9384,33 @@ FtlBbt2Bitmap:
 	.fpu softvfp
 	.type	FtlBbtMemInit, %function
 FtlBbtMemInit:
+.LFB322:
+	.loc 5 225 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r0, .L820
+	.loc 5 226 0
+	ldr	r0, .L819
 	movw	r3, #65535
+	.loc 5 228 0
 	movs	r2, #16
 	movs	r1, #255
+	.loc 5 226 0
 	strh	r3, [r0]	@ movhi
+	.loc 5 227 0
 	movs	r3, #0
 	strh	r3, [r0, #6]	@ movhi
+	.loc 5 228 0
 	adds	r0, r0, #12
 	b	ftl_memset
-.L821:
-	.align	2
+.LVL823:
 .L820:
-	.word	.LANCHOR73
+	.align	2
+.L819:
+	.word	.LANCHOR74
+	.cfi_endproc
+.LFE322:
 	.size	FtlBbtMemInit, .-FtlBbtMemInit
 	.section	.text.FtlFreeSysBlkQueueInit,"ax",%progbits
 	.align	1
@@ -5689,25 +9421,47 @@ FtlBbtMemInit:
 	.fpu softvfp
 	.type	FtlFreeSysBlkQueueInit, %function
 FtlFreeSysBlkQueueInit:
+.LFB330:
+	.loc 1 76 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L823
+.LVL824:
+	.loc 1 79 0
+	ldr	r3, .L822
+	.loc 1 83 0
 	mov	r2, #2048
+	.loc 1 76 0
 	push	{r4, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 4, -8
+	.cfi_offset 14, -4
+	.loc 1 79 0
 	movs	r4, #0
+	.loc 1 83 0
 	mov	r1, r4
+	.loc 1 79 0
 	strh	r4, [r3, #2]	@ movhi
+	.loc 1 80 0
 	strh	r4, [r3, #4]	@ movhi
+	.loc 1 81 0
 	strh	r4, [r3, #6]	@ movhi
+	.loc 1 82 0
 	strh	r0, [r3], #8	@ movhi
+	.loc 1 83 0
 	mov	r0, r3
+.LVL825:
 	bl	ftl_memset
+.LVL826:
+	.loc 1 85 0
 	mov	r0, r4
 	pop	{r4, pc}
-.L824:
-	.align	2
 .L823:
-	.word	.LANCHOR74
+	.align	2
+.L822:
+	.word	.LANCHOR75
+	.cfi_endproc
+.LFE330:
 	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
 	.section	.text.ftl_free_no_use_map_blk,"ax",%progbits
 	.align	1
@@ -5718,96 +9472,166 @@ FtlFreeSysBlkQueueInit:
 	.fpu softvfp
 	.type	ftl_free_no_use_map_blk, %function
 ftl_free_no_use_map_blk:
+.LFB346:
+	.loc 1 561 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldrh	r2, [r0, #10]
+.LVL827:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 1 561 0
 	mov	r4, r0
-	ldr	r5, [r0, #20]
+	.loc 1 570 0
+	ldrh	r2, [r0, #10]
 	movs	r1, #0
+	.loc 1 564 0
+	ldr	r5, [r0, #20]
+	.loc 1 562 0
 	ldr	r10, [r0, #12]
-	lsls	r2, r2, #1
+.LVL828:
+	.loc 1 563 0
 	ldr	r6, [r0, #24]
+.LVL829:
+	.loc 1 570 0
+	lsls	r2, r2, #1
 	mov	r0, r5
+.LVL830:
 	bl	ftl_memset
+.LVL831:
+	.loc 1 571 0
 	movs	r3, #0
-.L826:
+.LVL832:
+.L825:
+	.loc 1 571 0 is_stmt 0 discriminator 1
 	ldrh	r1, [r4, #6]
 	uxth	r2, r3
 	cmp	r1, r2
-	bhi	.L830
+	bhi	.L829
+	.loc 1 579 0 is_stmt 1
 	ldrh	r3, [r5]
+.LVL833:
+	.loc 1 582 0
 	movs	r6, #0
-	ldr	r2, .L839
+.LVL834:
+	.loc 1 583 0
+	ldr	r2, .L838
+.LVL835:
+	.loc 1 580 0
 	mov	fp, r6
-.L831:
+.LVL836:
+.L830:
+	.loc 1 582 0 discriminator 1
 	ldrh	r0, [r4, #10]
 	uxth	r1, r6
+.LVL837:
 	cmp	r0, r1
-	bhi	.L835
+	bhi	.L834
+	.loc 1 598 0
 	mov	r0, fp
 	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L830:
+.LVL838:
+.L829:
+	.cfi_restore_state
+	.loc 1 572 0
 	uxth	r2, r3
 	ldr	r1, [r6, r2, lsl #2]
+	.loc 1 573 0
 	movs	r2, #0
+	.loc 1 572 0
 	ubfx	r1, r1, #10, #16
-.L827:
+.LVL839:
+.L826:
+	.loc 1 573 0 discriminator 1
 	ldrh	r7, [r4, #10]
 	uxth	r0, r2
 	cmp	r7, r0
-	bhi	.L829
+	bhi	.L828
+.LVL840:
 	adds	r3, r3, #1
-	b	.L826
-.L829:
+.LVL841:
+	b	.L825
+.LVL842:
+.L828:
+	.loc 1 574 0
 	uxth	r0, r2
 	adds	r2, r2, #1
+.LVL843:
 	ldrh	r7, [r10, r0, lsl #1]
 	cmp	r7, r1
+	.loc 1 575 0
 	ittt	eq
 	ldrheq	r7, [r5, r0, lsl #1]
 	addeq	r7, r7, #1
 	strheq	r7, [r5, r0, lsl #1]	@ movhi
-	b	.L827
-.L835:
+.LVL844:
+	b	.L826
+.LVL845:
+.L834:
+	.loc 1 583 0
 	ldrh	r0, [r4]
 	uxth	r7, r6
 	cmp	r0, r1
-	bne	.L832
+	bne	.L831
+	.loc 1 583 0 is_stmt 0 discriminator 1
 	ldrh	r0, [r2]
 	ldrh	ip, [r4, #2]
 	cmp	ip, r0
+	.loc 1 584 0 is_stmt 1 discriminator 1
 	it	cc
 	strhcc	r0, [r5, r7, lsl #1]	@ movhi
-.L832:
+.L831:
+	.loc 1 585 0
 	ldrh	r8, [r5, r7, lsl #1]
 	cmp	r3, r8
 	itt	hi
 	movhi	fp, r1
 	movhi	r3, r8
+.LVL846:
+	.loc 1 589 0
 	cmp	r8, #0
-	bne	.L834
+	bne	.L833
+	.loc 1 589 0 is_stmt 0 discriminator 1
 	ldrh	r0, [r10, r7, lsl #1]
-	cbz	r0, .L834
+	cbz	r0, .L833
+	.loc 1 591 0 is_stmt 1
 	movs	r1, #1
+.LVL847:
 	str	r2, [sp, #4]
 	str	r3, [sp]
 	bl	FtlFreeSysBlkQueueIn
+.LVL848:
+	.loc 1 592 0
 	strh	r8, [r10, r7, lsl #1]	@ movhi
+	.loc 1 593 0
 	ldr	r2, [sp, #4]
 	ldrh	r1, [r4, #8]
 	ldr	r3, [sp]
 	subs	r1, r1, #1
 	strh	r1, [r4, #8]	@ movhi
-.L834:
+.LVL849:
+.L833:
 	adds	r6, r6, #1
-	b	.L831
-.L840:
-	.align	2
+.LVL850:
+	b	.L830
 .L839:
-	.word	.LANCHOR52
+	.align	2
+.L838:
+	.word	.LANCHOR53
+	.cfi_endproc
+.LFE346:
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.section	.text.FtlL2PDataInit,"ax",%progbits
 	.align	1
@@ -5818,90 +9642,152 @@ ftl_free_no_use_map_blk:
 	.fpu softvfp
 	.type	FtlL2PDataInit, %function
 FtlL2PDataInit:
-	@ args = 0, pretend = 0, frame = 0
+.LFB368:
+	.loc 1 1796 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, lr}
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 1 1798 0
 	movs	r1, #0
-	ldr	r5, .L844
-	ldr	r4, .L844+4
-	ldr	r2, [r5]
-	ldr	r7, .L844+8
-	ldr	r6, .L844+12
-	ldr	r0, [r4]
+	ldr	r8, .L843+40
+	.loc 1 1802 0
+	mov	r10, #12
+	.loc 1 1798 0
+	ldr	r7, .L843
+	ldr	r2, [r8]
+	.loc 1 1799 0
+	ldr	r5, .L843+4
+	ldr	r4, .L843+8
+	.loc 1 1798 0
+	ldr	r0, [r7]
 	lsls	r2, r2, #1
-	ldr	r8, .L844+44
+	.loc 1 1799 0
+	ldr	r6, .L843+12
+	.loc 1 1798 0
 	bl	ftl_memset
-	ldrh	r3, [r7]
+.LVL851:
+	.loc 1 1799 0
+	ldrh	r3, [r5]
 	movs	r1, #255
-	ldrh	r2, [r6]
-	ldr	r0, [r8]
+	ldrh	r2, [r4]
+	ldr	r0, [r6]
 	muls	r2, r3, r2
 	bl	ftl_memset
-	ldr	r3, .L844+16
-	movw	r0, #65535
-	ldrh	r1, [r6]
-	ldr	ip, [r8]
-	ldr	r2, [r3]
-	movs	r3, #12
-	ldrh	r7, [r7]
-	mla	r3, r1, r3, r3
-	adds	r1, r2, r3
+.LVL852:
+	.loc 1 1802 0
+	ldr	ip, .L843+44
+	.loc 1 1800 0
 	movs	r3, #0
-	mov	lr, r3
-.L842:
-	adds	r2, r2, #12
-	adds	r6, r3, r7
-	cmp	r2, r1
-	bne	.L843
-	ldr	r3, .L844+20
-	ldr	r2, [r5]
-	strh	r0, [r3, #2]	@ movhi
+	movw	r1, #65535
+	str	r7, [sp, #4]
+.LVL853:
+.L841:
+	.loc 1 1800 0 is_stmt 0 discriminator 1
+	ldrh	r7, [r4]
+	uxth	r2, r3
+	add	lr, r3, #1
+	cmp	r7, r2
+	bhi	.L842
+	.loc 1 1806 0 is_stmt 1
+	ldr	r3, .L843+16
+.LVL854:
+	.loc 1 1808 0
+	ldr	r2, [r8]
+.LVL855:
+	.loc 1 1806 0
+	strh	r1, [r3, #2]	@ movhi
+	.loc 1 1808 0
 	strh	r2, [r3, #10]	@ movhi
+	.loc 1 1809 0
 	movw	r2, #61634
 	strh	r2, [r3, #4]	@ movhi
-	ldr	r2, .L844+24
-	strh	r0, [r3]	@ movhi
-	strh	r0, [r3, #40]	@ movhi
+	.loc 1 1810 0
+	ldr	r2, .L843+20
+	.loc 1 1807 0
+	strh	r1, [r3]	@ movhi
+	.loc 1 1816 0
+	strh	r1, [r3, #40]	@ movhi
+	.loc 1 1810 0
 	ldrh	r2, [r2]
 	strh	r2, [r3, #8]	@ movhi
-	ldr	r2, .L844+28
+	.loc 1 1811 0
+	ldr	r2, .L843+24
 	ldrh	r2, [r2]
 	strh	r2, [r3, #6]	@ movhi
-	ldr	r2, .L844+32
+	.loc 1 1812 0
+	ldr	r2, .L843+28
 	ldr	r2, [r2]
 	str	r2, [r3, #12]
-	ldr	r2, .L844+36
+	.loc 1 1813 0
+	ldr	r2, .L843+32
 	ldr	r2, [r2]
 	str	r2, [r3, #16]
-	ldr	r2, [r4]
+	.loc 1 1814 0
+	ldr	r2, [sp, #4]
+	ldr	r2, [r2]
 	str	r2, [r3, #20]
-	ldr	r2, .L844+40
+	.loc 1 1815 0
+	ldr	r2, .L843+36
 	ldr	r2, [r2]
 	str	r2, [r3, #24]
-	pop	{r4, r5, r6, r7, r8, pc}
-.L843:
+	.loc 1 1817 0
+	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL856:
+.L842:
+	.cfi_restore_state
+	.loc 1 1802 0 discriminator 3
+	uxth	r3, r3
+	ldr	r7, [ip]
+	movs	r0, #0
+	mul	r2, r10, r3
+	add	fp, r7, r2
+	str	r0, [fp, #4]
+	.loc 1 1803 0 discriminator 3
+	strh	r1, [r7, r2]	@ movhi
+	.loc 1 1804 0 discriminator 3
+	ldr	r7, [ip]
+	add	r2, r2, r7
+	ldrh	r7, [r5]
+	muls	r3, r7, r3
+.LVL857:
+	ldr	r7, [r6]
 	bic	r3, r3, #3
-	str	lr, [r2, #-8]
-	add	r3, r3, ip
-	strh	r0, [r2, #-12]	@ movhi
-	str	r3, [r2, #-4]
-	mov	r3, r6
-	b	.L842
-.L845:
-	.align	2
+	add	r3, r3, r7
+	str	r3, [r2, #8]
+.LVL858:
+	mov	r3, lr
+	b	.L841
 .L844:
-	.word	.LANCHOR63
+	.align	2
+.L843:
 	.word	.LANCHOR122
-	.word	.LANCHOR56
-	.word	.LANCHOR66
-	.word	.LANCHOR95
+	.word	.LANCHOR57
+	.word	.LANCHOR67
+	.word	.LANCHOR123
 	.word	.LANCHOR124
 	.word	.LANCHOR125
-	.word	.LANCHOR65
+	.word	.LANCHOR66
 	.word	.LANCHOR126
 	.word	.LANCHOR127
 	.word	.LANCHOR128
-	.word	.LANCHOR123
+	.word	.LANCHOR64
+	.word	.LANCHOR96
+	.cfi_endproc
+.LFE368:
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
 	.section	.text.FtlVariablesInit,"ax",%progbits
 	.align	1
@@ -5912,75 +9798,112 @@ FtlL2PDataInit:
 	.fpu softvfp
 	.type	FtlVariablesInit, %function
 FtlVariablesInit:
+.LFB298:
+	.loc 4 614 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 4 617 0
 	movs	r4, #0
-	ldr	r3, .L847
+	ldr	r3, .L846
+	.loc 4 618 0
 	movw	r2, #65535
+	.loc 4 628 0
 	mov	r1, r4
-	ldr	r5, .L847+4
+	.loc 4 629 0
+	ldr	r5, .L846+4
+	.loc 4 617 0
 	str	r4, [r3]
-	ldr	r3, .L847+8
+	.loc 4 618 0
+	ldr	r3, .L846+8
 	strh	r2, [r3]	@ movhi
+	.loc 4 621 0
 	mov	r2, #-1
-	ldr	r3, .L847+12
+	.loc 4 619 0
+	ldr	r3, .L846+12
 	str	r4, [r3]
-	ldr	r3, .L847+16
+	.loc 4 620 0
+	ldr	r3, .L846+16
 	str	r4, [r3]
-	ldr	r3, .L847+20
+	.loc 4 621 0
+	ldr	r3, .L846+20
 	str	r2, [r3]
-	ldr	r3, .L847+24
+	.loc 4 625 0
+	ldr	r3, .L846+24
 	str	r4, [r3]
-	ldr	r3, .L847+28
+	.loc 4 627 0
+	ldr	r3, .L846+28
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L847+32
+	.loc 4 628 0
+	ldr	r3, .L846+32
 	ldrh	r2, [r3]
-	ldr	r3, .L847+36
+	ldr	r3, .L846+36
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
+.LVL859:
+	.loc 4 629 0
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L847+40
+	ldr	r3, .L846+40
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
+.LVL860:
+	.loc 4 630 0
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L847+44
+	ldr	r3, .L846+44
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
+.LVL861:
+	.loc 4 631 0
 	mov	r1, r4
 	movs	r2, #48
-	ldr	r0, .L847+48
+	ldr	r0, .L846+48
 	bl	ftl_memset
+.LVL862:
+	.loc 4 632 0
 	mov	r2, #512
 	mov	r1, r4
-	ldr	r0, .L847+52
+	ldr	r0, .L846+52
 	bl	ftl_memset
+.LVL863:
+	.loc 4 633 0
 	bl	FtlGcBufInit
+.LVL864:
+	.loc 4 634 0
 	bl	FtlL2PDataInit
+.LVL865:
+	.loc 4 636 0
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L848:
-	.align	2
 .L847:
+	.align	2
+.L846:
 	.word	.LANCHOR129
-	.word	.LANCHOR39
+	.word	.LANCHOR40
 	.word	.LANCHOR130
 	.word	.LANCHOR131
 	.word	.LANCHOR132
 	.word	.LANCHOR133
-	.word	.LANCHOR101
-	.word	.LANCHOR69
-	.word	.LANCHOR60
+	.word	.LANCHOR28
 	.word	.LANCHOR70
-	.word	.LANCHOR77
+	.word	.LANCHOR61
+	.word	.LANCHOR71
+	.word	.LANCHOR78
 	.word	.LANCHOR134
+	.word	.LANCHOR80
 	.word	.LANCHOR135
-	.word	.LANCHOR136
+	.cfi_endproc
+.LFE298:
 	.size	FtlVariablesInit, .-FtlVariablesInit
 	.section	.text.SupperBlkListInit,"ax",%progbits
 	.align	1
@@ -5991,161 +9914,258 @@ FtlVariablesInit:
 	.fpu softvfp
 	.type	SupperBlkListInit, %function
 SupperBlkListInit:
+.LFB376:
+	.loc 1 2360 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L860
+	.loc 1 2364 0
+	ldr	r3, .L859
 	movs	r2, #6
+	.loc 1 2360 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 1 2364 0
 	movs	r1, #0
-	ldr	r6, .L860+4
+	ldr	r6, .L859+4
+	.loc 1 2360 0
 	sub	sp, sp, #24
+	.cfi_def_cfa_offset 56
+	.loc 1 2365 0
 	movs	r4, #0
+	.loc 1 2364 0
 	ldrh	r3, [r3]
+	.loc 1 2371 0
 	mov	r8, r4
+	.loc 1 2364 0
 	ldr	r0, [r6]
+	.loc 1 2371 0
 	mov	r5, r4
 	mov	r10, r6
+	.loc 1 2364 0
 	muls	r2, r3, r2
 	bl	ftl_memset
-	ldr	r3, .L860+8
-	ldr	r2, .L860+12
-	ldr	r1, .L860+16
+.LVL866:
+	.loc 1 2365 0
+	ldr	r3, .L859+8
+	.loc 1 2368 0
+	ldr	r2, .L859+12
+	.loc 1 2370 0
+	ldr	r1, .L859+16
+	.loc 1 2365 0
 	str	r4, [r3]
-	ldr	r3, .L860+20
+	.loc 1 2366 0
+	ldr	r3, .L859+20
+	.loc 1 2368 0
 	strh	r4, [r2]	@ movhi
+	.loc 1 2370 0
 	strh	r4, [r1]	@ movhi
+.LVL867:
+	.loc 1 2366 0
 	str	r4, [r3]
-	ldr	r3, .L860+24
+	.loc 1 2367 0
+	ldr	r3, .L859+24
 	str	r2, [sp, #8]
 	str	r4, [r3]
-	ldr	r3, .L860+28
+	.loc 1 2369 0
+	ldr	r3, .L859+28
 	mov	fp, r3
 	strh	r4, [r3]	@ movhi
-.L850:
-	ldr	r3, .L860+32
+.LVL868:
+.L849:
+	.loc 1 2373 0 discriminator 1
+	ldr	r3, .L859+32
 	sxth	r7, r4
+.LVL869:
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	bge	.L857
-	ldr	r3, .L860+36
+	bge	.L856
+	.loc 1 2375 0
+	ldr	r3, .L859+36
+	.loc 1 2376 0
 	uxth	r1, r4
 	str	r1, [sp, #12]
+	.loc 1 2375 0
 	ldrh	r2, [r3]
-	ldr	r3, .L860+40
+	.loc 1 2378 0
+	ldr	r3, .L859+40
 	ldrh	r3, [r3]
 	str	r3, [sp, #4]
 	movs	r3, #0
 	mov	r6, r3
-	b	.L858
-.L852:
+	b	.L857
+.LVL870:
+.L851:
 	str	r3, [sp, #20]
-	ldr	r3, .L860+44
+	.loc 1 2376 0
+	ldr	r3, .L859+44
+.LVL871:
 	ldr	r1, [sp, #12]
 	str	r2, [sp, #16]
 	ldrb	r0, [r3, r0]	@ zero_extendqisi2
+.LVL872:
 	bl	V2P_block
+.LVL873:
+	.loc 1 2377 0
 	bl	FtlBbmIsBadBlock
+.LVL874:
 	ldr	r2, [sp, #16]
 	ldr	r3, [sp, #20]
-	cbnz	r0, .L851
+	cbnz	r0, .L850
+	.loc 1 2378 0
 	ldr	r1, [sp, #4]
 	add	r6, r6, r1
+.LVL875:
 	sxth	r6, r6
-.L851:
+.LVL876:
+.L850:
 	adds	r3, r3, #1
-.L858:
+.LVL877:
+.L857:
+	.loc 1 2375 0 discriminator 1
 	sxth	r0, r3
 	cmp	r0, r2
-	blt	.L852
+	blt	.L851
 	lsls	r3, r7, #1
-	cbz	r6, .L853
+.LVL878:
+	.loc 1 2380 0
+	cbz	r6, .L852
+	.loc 1 2381 0
 	mov	r1, r6
 	str	r3, [sp, #4]
 	mov	r0, #32768
+.LVL879:
 	bl	__aeabi_idiv
+.LVL880:
 	ldr	r3, [sp, #4]
 	sxth	r6, r0
-.L854:
+.LVL881:
+.L853:
+	.loc 1 2385 0
 	ldr	r2, [r10]
 	add	r3, r3, r7
 	add	r2, r2, r3, lsl #1
-	ldr	r3, .L860+48
+	.loc 1 2387 0
+	ldr	r3, .L859+48
+	.loc 1 2385 0
 	strh	r6, [r2, #4]	@ movhi
+	.loc 1 2387 0
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	beq	.L855
-	ldr	r3, .L860+52
+	beq	.L854
+	.loc 1 2388 0 discriminator 1
+	ldr	r3, .L859+52
 	ldrh	r3, [r3]
+	.loc 1 2387 0 discriminator 1
 	cmp	r7, r3
-	beq	.L855
-	ldr	r3, .L860+56
+	beq	.L854
+	.loc 1 2389 0
+	ldr	r3, .L859+56
 	ldrh	r3, [r3]
+	.loc 1 2388 0
 	cmp	r7, r3
-	beq	.L855
-	ldr	r3, .L860+60
+	beq	.L854
+	.loc 1 2391 0
+	ldr	r3, .L859+60
 	uxth	r0, r4
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r7, lsl #1]
-	cbnz	r3, .L856
+	cbnz	r3, .L855
+	.loc 1 2392 0
 	add	r8, r8, #1
+.LVL882:
 	uxth	r8, r8
+.LVL883:
+	.loc 1 2393 0
 	bl	INSERT_FREE_LIST
-.L855:
+.LVL884:
+.L854:
 	adds	r4, r4, #1
-	b	.L850
-.L853:
-	ldr	r2, .L860+60
+.LVL885:
+	b	.L849
+.LVL886:
+.L852:
+	.loc 1 2383 0
+	ldr	r2, .L859+60
 	movw	r1, #65535
 	ldr	r2, [r2]
 	strh	r1, [r2, r7, lsl #1]	@ movhi
-	b	.L854
-.L856:
+	b	.L853
+.LVL887:
+.L855:
+	.loc 1 2395 0
 	adds	r5, r5, #1
+.LVL888:
 	uxth	r5, r5
+.LVL889:
+	.loc 1 2396 0
 	bl	INSERT_DATA_LIST
-	b	.L855
-.L857:
+.LVL890:
+	b	.L854
+.LVL891:
+.L856:
+	.loc 1 2400 0
 	ldr	r2, [sp, #8]
+	.loc 1 2401 0
 	strh	r8, [fp]	@ movhi
+	.loc 1 2400 0
 	strh	r5, [r2]	@ movhi
+	.loc 1 2405 0
 	add	r5, r5, r8
+.LVL892:
 	cmp	r3, r5
-	bge	.L859
-	ldr	r1, .L860+64
-	mov	r2, #2368
-	ldr	r0, .L860+68
+	bge	.L858
+	.loc 1 2405 0 is_stmt 0 discriminator 1
+	ldr	r1, .L859+64
+	movw	r2, #2405
+	ldr	r0, .L859+68
 	bl	printf
-	ldr	r1, .L860+72
-	ldr	r0, .L860+76
+.LVL893:
+	ldr	r1, .L859+72
+	ldr	r0, .L859+76
 	bl	printf
-.L859:
+.LVL894:
+.L858:
+	.loc 1 2407 0 is_stmt 1
 	movs	r0, #0
 	add	sp, sp, #24
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L861:
-	.align	2
+.LVL895:
 .L860:
-	.word	.LANCHOR39
-	.word	.LANCHOR80
-	.word	.LANCHOR86
-	.word	.LANCHOR84
-	.word	.LANCHOR137
+	.align	2
+.L859:
+	.word	.LANCHOR40
 	.word	.LANCHOR81
-	.word	.LANCHOR83
 	.word	.LANCHOR87
-	.word	.LANCHOR38
-	.word	.LANCHOR36
-	.word	.LANCHOR51
-	.word	.LANCHOR45
-	.word	.LANCHOR90
-	.word	.LANCHOR91
-	.word	.LANCHOR92
+	.word	.LANCHOR85
+	.word	.LANCHOR136
 	.word	.LANCHOR82
-	.word	.LANCHOR138
-	.word	.LC4
-	.word	.LC5
+	.word	.LANCHOR84
+	.word	.LANCHOR88
+	.word	.LANCHOR39
+	.word	.LANCHOR37
+	.word	.LANCHOR52
+	.word	.LANCHOR46
+	.word	.LANCHOR91
+	.word	.LANCHOR92
+	.word	.LANCHOR93
+	.word	.LANCHOR83
+	.word	.LANCHOR137
 	.word	.LC6
+	.word	.LC7
+	.word	.LC8
+	.cfi_endproc
+.LFE376:
 	.size	SupperBlkListInit, .-SupperBlkListInit
 	.section	.text.FtlGcPageVarInit,"ax",%progbits
 	.align	1
@@ -6156,38 +10176,61 @@ SupperBlkListInit:
 	.fpu softvfp
 	.type	FtlGcPageVarInit, %function
 FtlGcPageVarInit:
+.LFB397:
+	.loc 6 218 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L863
+	.loc 6 219 0
+	ldr	r2, .L862
 	movs	r3, #0
+	.loc 6 218 0
 	push	{r4, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 4, -8
+	.cfi_offset 14, -4
+	.loc 6 221 0
 	movs	r1, #255
-	ldr	r4, .L863+4
+	ldr	r4, .L862+4
+	.loc 6 219 0
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L863+8
+	.loc 6 220 0
+	ldr	r2, .L862+8
 	strh	r3, [r2]	@ movhi
+	.loc 6 221 0
 	ldrh	r2, [r4]
-	ldr	r3, .L863+12
+	ldr	r3, .L862+12
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
+.LVL896:
+	.loc 6 222 0
 	ldrh	r3, [r4]
 	movs	r2, #12
 	movs	r1, #255
 	muls	r2, r3, r2
-	ldr	r3, .L863+16
+	ldr	r3, .L862+16
 	ldr	r0, [r3]
 	bl	ftl_memset
+.LVL897:
+	.loc 6 224 0
 	pop	{r4, lr}
+	.cfi_restore 14
+	.cfi_restore 4
+	.cfi_def_cfa_offset 0
+	.loc 6 223 0
 	b	FtlGcBufInit
-.L864:
-	.align	2
+.LVL898:
 .L863:
+	.align	2
+.L862:
 	.word	.LANCHOR109
-	.word	.LANCHOR53
-	.word	.LANCHOR110
-	.word	.LANCHOR108
+	.word	.LANCHOR54
 	.word	.LANCHOR111
+	.word	.LANCHOR108
+	.word	.LANCHOR110
+	.cfi_endproc
+.LFE397:
 	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
 	.section	.text.ftl_memcpy,"ax",%progbits
 	.align	1
@@ -6198,10 +10241,18 @@ FtlGcPageVarInit:
 	.fpu softvfp
 	.type	ftl_memcpy, %function
 ftl_memcpy:
+.LFB481:
+	.loc 7 32 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL899:
+	.loc 7 33 0
 	b	memcpy
+.LVL900:
+	.cfi_endproc
+.LFE481:
 	.size	ftl_memcpy, .-ftl_memcpy
 	.section	.text.FlashReadIdbData,"ax",%progbits
 	.align	1
@@ -6212,18 +10263,30 @@ ftl_memcpy:
 	.fpu softvfp
 	.type	FlashReadIdbData, %function
 FlashReadIdbData:
+.LFB250:
+	.loc 2 2139 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL901:
 	push	{r3, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 3, -8
+	.cfi_offset 14, -4
+	.loc 2 2140 0
 	mov	r2, #2048
-	ldr	r1, .L867
+	ldr	r1, .L866
 	bl	ftl_memcpy
+.LVL902:
+	.loc 2 2142 0
 	movs	r0, #0
 	pop	{r3, pc}
-.L868:
-	.align	2
 .L867:
-	.word	.LANCHOR139
+	.align	2
+.L866:
+	.word	.LANCHOR138
+	.cfi_endproc
+.LFE250:
 	.size	FlashReadIdbData, .-FlashReadIdbData
 	.section	.text.FlashLoadPhyInfoInRam,"ax",%progbits
 	.align	1
@@ -6234,62 +10297,98 @@ FlashReadIdbData:
 	.fpu softvfp
 	.type	FlashLoadPhyInfoInRam, %function
 FlashLoadPhyInfoInRam:
+.LFB251:
+	.loc 2 2145 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL903:
 	push	{r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
+	.cfi_offset 14, -4
+	.loc 2 2149 0
 	movs	r6, #0
-	ldr	r7, .L877
-	ldr	r5, .L877+4
-.L872:
+	ldr	r7, .L876
+	.loc 2 2150 0
+	ldr	r5, .L876+4
+.LVL904:
+.L871:
 	ldrb	r2, [r7, #-1]	@ zero_extendqisi2
 	mov	r1, r5
 	mov	r0, r7
 	lsl	r8, r6, #5
 	bl	FlashMemCmp8
+.LVL905:
 	mov	r4, r0
-	cbnz	r0, .L870
-	ldr	r5, .L877+8
+	cbnz	r0, .L869
+	.loc 2 2151 0
+	ldr	r5, .L876+8
+	.loc 2 2159 0
 	mov	r3, r4
-	ldr	r2, .L877+12
+	ldr	r2, .L876+12
+	.loc 2 2151 0
 	add	r5, r5, r8
+.LVL906:
+	.loc 2 2159 0
 	ldrb	r0, [r5, #22]	@ zero_extendqisi2
 	mov	r1, r2
-.L871:
+.LVL907:
+.L870:
 	lsls	r6, r3, #5
 	ldrb	r6, [r6, r2]	@ zero_extendqisi2
 	cmp	r6, r0
-	beq	.L874
+	beq	.L873
+	.loc 2 2158 0 discriminator 2
 	adds	r3, r3, #1
+.LVL908:
 	cmp	r3, #4
-	bne	.L871
-.L874:
+	bne	.L870
+.L873:
+	.loc 2 2162 0
 	add	r1, r1, r3, lsl #5
 	movs	r2, #32
-	ldr	r0, .L877+16
+	ldr	r0, .L876+16
 	bl	ftl_memcpy
+.LVL909:
+	.loc 2 2163 0
 	movs	r2, #32
 	mov	r1, r5
-	ldr	r0, .L877+20
+	ldr	r0, .L876+20
 	bl	ftl_memcpy
-	b	.L869
-.L870:
+.LVL910:
+	.loc 2 2164 0
+	b	.L868
+.LVL911:
+.L869:
+	.loc 2 2149 0 discriminator 2
 	adds	r6, r6, #1
+.LVL912:
 	adds	r7, r7, #32
-	cmp	r6, #73
-	bne	.L872
+	cmp	r6, #74
+	bne	.L871
+	.loc 2 2157 0
 	mov	r4, #-1
-.L869:
+.LVL913:
+.L868:
+	.loc 2 2165 0
 	mov	r0, r4
 	pop	{r4, r5, r6, r7, r8, pc}
-.L878:
-	.align	2
 .L877:
-	.word	.LANCHOR140+1
+	.align	2
+.L876:
+	.word	.LANCHOR139+1
 	.word	.LANCHOR22
+	.word	.LANCHOR139
 	.word	.LANCHOR140
-	.word	.LANCHOR141
 	.word	.LANCHOR7
-	.word	.LANCHOR29
+	.word	.LANCHOR30
+	.cfi_endproc
+.LFE251:
 	.size	FlashLoadPhyInfoInRam, .-FlashLoadPhyInfoInRam
 	.section	.text.ftl_memcpy32,"ax",%progbits
 	.align	1
@@ -6300,19 +10399,36 @@ FlashLoadPhyInfoInRam:
 	.fpu softvfp
 	.type	ftl_memcpy32, %function
 ftl_memcpy32:
+.LFB482:
+	.loc 7 37 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL914:
+	.loc 7 40 0
 	movs	r3, #0
+	.loc 7 37 0
 	push	{r4, lr}
-.L880:
+	.cfi_def_cfa_offset 8
+	.cfi_offset 4, -8
+	.cfi_offset 14, -4
+.LVL915:
+.L879:
+	.loc 7 40 0 discriminator 1
 	cmp	r3, r2
-	bne	.L881
+	bne	.L880
+	.loc 7 43 0
 	pop	{r4, pc}
-.L881:
+.L880:
+	.loc 7 41 0 discriminator 3
 	ldr	r4, [r1, r3, lsl #2]
 	str	r4, [r0, r3, lsl #2]
+	.loc 7 40 0 discriminator 3
 	adds	r3, r3, #1
-	b	.L880
+.LVL916:
+	b	.L879
+	.cfi_endproc
+.LFE482:
 	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.NandcCopy1KB,"ax",%progbits
 	.align	1
@@ -6323,70 +10439,134 @@ ftl_memcpy32:
 	.fpu softvfp
 	.type	NandcCopy1KB, %function
 NandcCopy1KB:
+.LFB291:
+	.loc 3 748 0
+	.cfi_startproc
 	@ args = 4, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL917:
+	.loc 3 759 0
 	cmp	r1, #1
+	.loc 3 748 0
 	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 3 748 0
 	mov	r4, r2
+.LVL918:
+	.loc 3 754 0
 	add	r2, r0, #4096
+.LVL919:
+	.loc 3 755 0
 	add	r6, r0, #512
+.LVL920:
+	.loc 3 757 0
 	add	r0, r2, r4, lsl #9
+.LVL921:
+	.loc 3 748 0
 	ldr	r5, [sp, #16]
-	bne	.L883
-	cbz	r3, .L884
+	.loc 3 759 0
+	bne	.L882
+	.loc 3 761 0
+	cbz	r3, .L883
+	.loc 3 762 0
 	lsls	r1, r3, #30
-	bne	.L885
+.LVL922:
+	bne	.L884
+	.loc 3 763 0
 	mov	r2, #256
 	mov	r1, r3
 	bl	ftl_memcpy32
-.L884:
-	cbz	r5, .L882
+.LVL923:
+.L883:
+	.loc 3 767 0
+	cbz	r5, .L881
+	.loc 3 769 0
 	ldrb	r2, [r5, #1]	@ zero_extendqisi2
+	.loc 3 771 0
 	lsrs	r4, r4, #1
+.LVL924:
+	.loc 3 769 0
 	ldrb	r3, [r5]	@ zero_extendqisi2
+	.loc 3 771 0
 	add	r4, r4, r4, lsl #1
 	lsls	r4, r4, #4
+	.loc 3 769 0
 	orr	r3, r3, r2, lsl #8
 	ldrb	r2, [r5, #2]	@ zero_extendqisi2
 	orr	r3, r3, r2, lsl #16
 	ldrb	r2, [r5, #3]	@ zero_extendqisi2
 	orr	r3, r3, r2, lsl #24
+.LVL925:
+	.loc 3 771 0
 	str	r3, [r6, r4]
+.LVL926:
 	pop	{r4, r5, r6, pc}
-.L885:
+.LVL927:
+.L884:
+	.loc 3 765 0
 	mov	r2, #1024
 	mov	r1, r3
 	bl	ftl_memcpy
-	b	.L884
-.L883:
-	cbz	r3, .L888
+.LVL928:
+	b	.L883
+.LVL929:
+.L882:
+	.loc 3 776 0
+	cbz	r3, .L887
+	.loc 3 777 0
 	lsls	r2, r3, #30
-	bne	.L889
+	bne	.L888
+	.loc 3 778 0
 	mov	r1, r0
+.LVL930:
 	mov	r2, #256
 	mov	r0, r3
+.LVL931:
 	bl	ftl_memcpy32
-.L888:
-	cbz	r5, .L882
+.LVL932:
+.L887:
+	.loc 3 782 0
+	cbz	r5, .L881
+	.loc 3 784 0
 	lsrs	r4, r4, #1
+.LVL933:
 	add	r4, r4, r4, lsl #1
 	lsls	r4, r4, #4
 	ldr	r3, [r6, r4]
+.LVL934:
+	.loc 3 785 0
 	strb	r3, [r5]
+	.loc 3 786 0
 	lsrs	r2, r3, #8
 	strb	r2, [r5, #1]
+	.loc 3 787 0
 	lsrs	r2, r3, #16
+	.loc 3 788 0
 	lsrs	r3, r3, #24
+.LVL935:
+	.loc 3 787 0
 	strb	r2, [r5, #2]
+	.loc 3 788 0
 	strb	r3, [r5, #3]
-.L882:
+.L881:
 	pop	{r4, r5, r6, pc}
-.L889:
+.LVL936:
+.L888:
+	.loc 3 780 0
 	mov	r1, r0
+.LVL937:
 	mov	r2, #1024
 	mov	r0, r3
+.LVL938:
 	bl	ftl_memcpy
-	b	.L888
+.LVL939:
+	b	.L887
+	.cfi_endproc
+.LFE291:
 	.size	NandcCopy1KB, .-NandcCopy1KB
 	.section	.text.NandcXferData,"ax",%progbits
 	.align	1
@@ -6397,26 +10577,60 @@ NandcCopy1KB:
 	.fpu softvfp
 	.type	NandcXferData, %function
 NandcXferData:
+.LFB292:
+	.loc 3 794 0
+	.cfi_startproc
 	@ args = 4, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL940:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
 	mov	r7, r3
-	ldr	r3, .L936
+.LVL941:
+	.loc 3 801 0
+	ldr	r3, .L935
+.LVL942:
+	.loc 3 794 0
 	sub	sp, sp, #96
+	.cfi_def_cfa_offset 128
+	.loc 3 794 0
 	mov	r6, r0
 	mov	r10, r2
 	str	r1, [sp, #12]
+	.loc 3 801 0
 	ldr	r5, [r3, r0, lsl #3]
+.LVL943:
+	.loc 3 804 0
 	lsls	r3, r7, #26
+	.loc 3 794 0
 	ldr	r4, [sp, #128]
-	bne	.L901
-	cbnz	r4, .L902
+	.loc 3 804 0
+	bne	.L900
+	.loc 3 806 0
+	cbnz	r4, .L901
+.LVL944:
+	.loc 3 808 0
 	add	r4, sp, #32
+.LVL945:
+	.loc 3 809 0
 	movs	r2, #64
+.LVL946:
 	movs	r1, #255
+.LVL947:
 	add	r0, sp, #32
+.LVL948:
 	bl	ftl_memset
-.L902:
+.LVL949:
+.L901:
+	.loc 3 811 0
 	movs	r3, #0
 	mov	r2, r10
 	ldr	r1, [sp, #12]
@@ -6424,85 +10638,160 @@ NandcXferData:
 	str	r4, [sp, #4]
 	str	r7, [sp]
 	bl	NandcXferStart
+.LVL950:
+	.loc 3 812 0
 	mov	r0, r6
 	bl	NandcXferComp
+.LVL951:
+	.loc 3 813 0
 	ldr	r3, [sp, #12]
 	cmp	r3, #0
-	bne	.L926
-	ldr	r2, .L936+4
+	bne	.L925
+.LBB299:
+	.loc 3 817 0
+	ldr	r2, .L935+4
+	.loc 3 820 0
 	lsr	r0, r10, #1
-	ldr	ip, .L936+12
+	.loc 3 822 0
+	ldr	ip, .L935+12
+	.loc 3 817 0
 	ldr	r3, [r2]
 	cmp	r3, #25
+	.loc 3 820 0
 	ldr	r3, [sp, #12]
+	.loc 3 817 0
 	ite	cc
 	movcc	r7, #64
+.LVL952:
 	movcs	r7, #128
+.LVL953:
+	.loc 3 820 0
 	mov	r1, r3
-.L905:
+.LVL954:
+.L904:
+	.loc 3 820 0 is_stmt 0 discriminator 1
 	cmp	r1, r0
 	add	r4, r4, #4
+.LVL955:
 	add	r6, r7, r3
-	bcc	.L906
-	ldr	r3, .L936+8
+	bcc	.L905
+.LBE299:
+.LBB300:
+	.loc 3 838 0 is_stmt 1
+	ldr	r3, .L935+8
+.LBE300:
+	.loc 3 829 0
 	lsr	r4, r10, #2
+.LVL956:
 	ldr	r0, [r2]
+.LBB301:
+	.loc 3 838 0
 	movs	r2, #0
 	mov	r8, r2
 	ldr	r1, [r3]
-.L907:
+.LVL957:
+.L906:
+.LBE301:
+	.loc 3 829 0 discriminator 1
 	cmp	r2, r4
-	bcs	.L903
-	cbnz	r0, .L913
-.L903:
+	bcs	.L902
+	.loc 3 829 0 is_stmt 0 discriminator 3
+	cbnz	r0, .L912
+.LVL958:
+.L902:
+	.loc 3 851 0 is_stmt 1
 	movs	r3, #0
 	str	r3, [r5, #16]
-.L914:
-	ldr	r3, .L936+8
+.LVL959:
+.L913:
+	.loc 3 901 0
+	ldr	r3, .L935+8
 	ldr	r3, [r3]
 	cmp	r3, #5
-	bls	.L900
+	bls	.L899
+	.loc 3 901 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #12]
-	cbnz	r3, .L900
+	cbnz	r3, .L899
+.LBB302:
+	.loc 3 904 0 is_stmt 1
 	ldr	r3, [r5]
+	.loc 3 905 0
 	and	r2, r3, #139264
 	cmp	r2, #139264
+.LVL960:
+	.loc 3 908 0
 	ittt	eq
 	moveq	r8, #-1
+	.loc 3 909 0
 	orreq	r3, r3, #131072
+.LVL961:
+	.loc 3 910 0
 	streq	r3, [r5]
-.L900:
+.LVL962:
+.L899:
+.LBE302:
+	.loc 3 923 0
 	mov	r0, r8
 	add	sp, sp, #96
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L906:
+.LVL963:
+.L905:
+	.cfi_restore_state
+.LBB303:
+	.loc 3 822 0 discriminator 3
 	bic	lr, r3, #3
 	ldr	r3, [ip, #4]
+	.loc 3 820 0 discriminator 3
 	adds	r1, r1, #1
+.LVL964:
+	.loc 3 822 0 discriminator 3
 	ldr	r3, [r3, lr]
+.LVL965:
+	.loc 3 823 0 discriminator 3
 	strb	r3, [r4, #-4]
+.LVL966:
+	.loc 3 824 0 discriminator 3
 	lsr	lr, r3, #8
 	strb	lr, [r4, #-3]
+.LVL967:
+	.loc 3 825 0 discriminator 3
 	lsr	lr, r3, #16
+	.loc 3 826 0 discriminator 3
 	lsrs	r3, r3, #24
+.LVL968:
+	.loc 3 825 0 discriminator 3
 	strb	lr, [r4, #-2]
+.LVL969:
+	.loc 3 826 0 discriminator 3
 	strb	r3, [r4, #-1]
+	.loc 3 820 0 discriminator 3
 	mov	r3, r6
-	b	.L905
-.L913:
+	b	.L904
+.LVL970:
+.L912:
+.LBE303:
+	.loc 3 831 0
 	add	r3, r2, #8
 	ldr	r3, [r5, r3, lsl #2]
 	str	r3, [sp, #28]
+	.loc 3 833 0
 	ldr	r3, [sp, #28]
 	lsls	r6, r3, #29
-	bmi	.L929
+	bmi	.L928
+	.loc 3 833 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #28]
 	ubfx	r3, r3, #15, #1
 	cmp	r3, #0
-	bne	.L929
+	bne	.L928
+.LVL971:
+.LBB304:
+	.loc 3 838 0 is_stmt 1
 	cmp	r1, #5
-	bls	.L909
+	bls	.L908
+	.loc 3 840 0
 	ldr	r6, [sp, #28]
 	ldr	r3, [sp, #28]
 	ubfx	r6, r6, #3, #5
@@ -6523,18 +10812,29 @@ NandcXferData:
 	ite	hi
 	ubfxhi	r6, r6, #27, #1
 	ubfxls	r6, r6, #29, #1
-.L935:
+.L934:
+	.loc 3 844 0 discriminator 2
 	orr	r3, r3, r6, lsl #5
-.L911:
+.L910:
+.LVL972:
+	.loc 3 846 0
 	cmp	r8, r3
 	it	cc
 	movcc	r8, r3
-.L908:
+.LVL973:
+.L907:
+.LBE304:
+	.loc 3 829 0 discriminator 2
 	adds	r2, r2, #1
-	b	.L907
-.L909:
+.LVL974:
+	b	.L906
+.LVL975:
+.L908:
+.LBB305:
+	.loc 3 842 0
 	cmp	r1, #3
-	bls	.L911
+	bls	.L910
+	.loc 3 844 0
 	ldr	r6, [sp, #28]
 	ldr	r3, [sp, #28]
 	ubfx	r6, r6, #3, #5
@@ -6555,38 +10855,55 @@ NandcXferData:
 	ite	hi
 	ubfxhi	r6, r6, #28, #1
 	ubfxls	r6, r6, #30, #1
-	b	.L935
-.L929:
+	b	.L934
+.LVL976:
+.L928:
+.LBE305:
+	.loc 3 834 0
 	mov	r8, #-1
-	b	.L908
-.L926:
+.LVL977:
+	b	.L907
+.LVL978:
+.L925:
+	.loc 3 795 0
 	mov	r8, #0
-	b	.L903
-.L901:
+	b	.L902
+.LVL979:
+.L900:
+	.loc 3 856 0
 	ldr	r3, [sp, #12]
 	cmp	r3, #1
-	bne	.L915
+	bne	.L914
 	cmp	r4, #0
 	mov	r8, #0
 	ite	ne
 	movne	r3, #4
 	moveq	r3, #0
 	str	r3, [sp, #16]
-.L916:
+.LVL980:
+.L915:
+	.loc 3 858 0 discriminator 2
 	cmp	r8, r10
-	bcc	.L918
+	bcc	.L917
+	.loc 3 795 0
 	mov	r8, #0
-	b	.L914
-.L918:
+.LVL981:
+	b	.L913
+.LVL982:
+.L917:
+	.loc 3 860 0
 	and	fp, r8, #3
-	cbz	r7, .L931
+	cbz	r7, .L930
 	add	r3, r7, r8, lsl #9
-.L917:
+.L916:
+	.loc 3 860 0 is_stmt 0 discriminator 4
 	str	r4, [sp]
 	mov	r2, fp
 	movs	r1, #1
 	mov	r0, r5
 	bl	NandcCopy1KB
+.LVL983:
+	.loc 3 861 0 is_stmt 1 discriminator 4
 	movs	r3, #0
 	movs	r2, #2
 	str	r3, [sp, #4]
@@ -6594,24 +10911,36 @@ NandcXferData:
 	str	r3, [sp]
 	mov	r0, r6
 	mov	r3, fp
+	.loc 3 858 0 discriminator 4
 	add	r8, r8, #2
+.LVL984:
+	.loc 3 861 0 discriminator 4
 	bl	NandcXferStart
+.LVL985:
+	.loc 3 862 0 discriminator 4
 	mov	r0, r6
 	bl	NandcXferComp
+.LVL986:
 	ldr	r3, [sp, #16]
 	add	r4, r4, r3
-	b	.L916
-.L931:
+	b	.L915
+.L930:
 	mov	r3, r7
-	b	.L917
-.L915:
+	b	.L916
+.LVL987:
+.L914:
+	.loc 3 867 0
 	mov	r8, #0
 	movs	r2, #2
+.LVL988:
 	mov	r3, r8
 	str	r8, [sp, #4]
 	str	r8, [sp]
 	mov	r1, r8
+.LVL989:
 	bl	NandcXferStart
+.LVL990:
+	.loc 3 868 0
 	mov	fp, r7
 	cmp	r4, r8
 	str	r4, [sp, #16]
@@ -6620,16 +10949,28 @@ NandcXferData:
 	movne	r3, #4
 	moveq	r3, r8
 	str	r3, [sp, #20]
-.L919:
+.LVL991:
+.L918:
+	.loc 3 868 0 is_stmt 0 discriminator 2
 	cmp	r4, r10
-	bcs	.L914
+	bcs	.L913
+	.loc 3 871 0 is_stmt 1
 	mov	r0, r6
+	.loc 3 873 0
 	adds	r4, r4, #2
+.LVL992:
+	.loc 3 871 0
 	bl	NandcXferComp
+.LVL993:
+	.loc 3 872 0
 	ldr	r3, [r5, #32]
+	.loc 3 873 0
 	cmp	r10, r4
+	.loc 3 872 0
 	str	r3, [sp, #28]
-	bls	.L920
+	.loc 3 873 0
+	bls	.L919
+	.loc 3 874 0
 	movs	r3, #0
 	movs	r2, #2
 	str	r3, [sp, #4]
@@ -6638,19 +10979,28 @@ NandcXferData:
 	mov	r0, r6
 	and	r3, r4, #3
 	bl	NandcXferStart
-.L920:
+.LVL994:
+.L919:
+	.loc 3 876 0
 	ldr	r3, [sp, #28]
 	lsls	r3, r3, #29
-	bmi	.L932
+	bmi	.L931
+.LBB306:
+	.loc 3 885 0
 	ldr	r3, [sp, #28]
 	ldr	r2, [sp, #28]
 	ubfx	r3, r3, #3, #5
 	ubfx	r2, r2, #27, #1
+.LVL995:
 	orr	r3, r3, r2, lsl #5
+	.loc 3 887 0
 	cmp	r8, r3
 	it	cc
 	movcc	r8, r3
-.L921:
+.LVL996:
+.L920:
+.LBE306:
+	.loc 3 896 0
 	ldr	r3, [sp, #16]
 	cmp	r7, #0
 	sub	r2, r4, #2
@@ -6663,21 +11013,27 @@ NandcXferData:
 	moveq	r3, #0
 	add	fp, fp, #1024
 	bl	NandcCopy1KB
+.LVL997:
 	ldr	r3, [sp, #16]
 	ldr	r2, [sp, #20]
 	add	r3, r3, r2
 	str	r3, [sp, #16]
-	b	.L919
-.L932:
+	b	.L918
+.LVL998:
+.L931:
+	.loc 3 878 0
 	mov	r8, #-1
-	b	.L921
-.L937:
-	.align	2
+.LVL999:
+	b	.L920
 .L936:
+	.align	2
+.L935:
 	.word	.LANCHOR6
-	.word	.LANCHOR30
-	.word	.LANCHOR32
+	.word	.LANCHOR31
 	.word	.LANCHOR33
+	.word	.LANCHOR34
+	.cfi_endproc
+.LFE292:
 	.size	NandcXferData, .-NandcXferData
 	.section	.text.FlashReadRawPage,"ax",%progbits
 	.align	1
@@ -6688,53 +11044,96 @@ NandcXferData:
 	.fpu softvfp
 	.type	FlashReadRawPage, %function
 FlashReadRawPage:
+.LFB222:
+	.loc 2 491 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1000:
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
+	.cfi_offset 14, -4
+	.loc 2 491 0
 	mov	r8, r3
-	ldr	r3, .L940
+	.loc 2 494 0
+	ldr	r3, .L939
+.LVL1001:
+	.loc 2 491 0
 	mov	r6, r1
 	mov	r7, r2
+	.loc 2 497 0
 	mov	r4, r0
+	.loc 2 494 0
 	ldrb	r5, [r3, #9]	@ zero_extendqisi2
-	cbnz	r0, .L939
-	ldr	r3, .L940+4
-	ldr	r2, .L940+8
+.LVL1002:
+	.loc 2 497 0
+	cbnz	r0, .L938
+	.loc 2 497 0 is_stmt 0 discriminator 1
+	ldr	r3, .L939+4
+	ldr	r2, .L939+8
+.LVL1003:
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	ldr	r0, [r2]
+.LVL1004:
 	muls	r0, r3, r0
+	.loc 2 498 0 is_stmt 1 discriminator 1
 	cmp	r0, r1
 	it	hi
 	movhi	r5, #4
-.L939:
+.LVL1005:
+.L938:
+	.loc 2 499 0
 	mov	r0, r4
 	bl	NandcWaitFlashReady
+.LVL1006:
+	.loc 2 500 0
 	mov	r0, r4
 	bl	NandcFlashCs
+.LVL1007:
+	.loc 2 501 0
 	mov	r1, r6
 	mov	r0, r4
 	bl	FlashReadCmd
+.LVL1008:
+	.loc 2 502 0
 	mov	r0, r4
 	bl	NandcWaitFlashReady
+.LVL1009:
+	.loc 2 503 0
 	mov	r3, r7
 	mov	r2, r5
 	str	r8, [sp]
 	movs	r1, #0
 	mov	r0, r4
 	bl	NandcXferData
+.LVL1010:
 	mov	r1, r0
+.LVL1011:
+	.loc 2 513 0
 	mov	r0, r4
+.LVL1012:
 	bl	NandcFlashDeCs
+.LVL1013:
+	.loc 2 515 0
 	mov	r0, r1
 	add	sp, sp, #8
+	.cfi_def_cfa_offset 24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L941:
-	.align	2
+.LVL1014:
 .L940:
-	.word	.LANCHOR29
+	.align	2
+.L939:
+	.word	.LANCHOR30
 	.word	.LANCHOR2
 	.word	.LANCHOR3
+	.cfi_endproc
+.LFE222:
 	.size	FlashReadRawPage, .-FlashReadRawPage
 	.section	.text.FlashDdrTunningRead,"ax",%progbits
 	.align	1
@@ -6745,158 +11144,274 @@ FlashReadRawPage:
 	.fpu softvfp
 	.type	FlashDdrTunningRead, %function
 FlashDdrTunningRead:
+.LFB227:
+	.loc 2 685 0
+	.cfi_startproc
 	@ args = 4, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1015:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
 	mov	r7, r3
-	ldr	r3, .L967
+	.loc 2 695 0
+	ldr	r3, .L966
+.LVL1016:
+	.loc 2 685 0
 	sub	sp, sp, #24
+	.cfi_def_cfa_offset 56
+	.loc 2 685 0
 	str	r0, [sp, #8]
+	.loc 2 695 0
 	ldr	r3, [r3]
+	.loc 2 685 0
 	str	r1, [sp, #12]
 	str	r2, [sp, #4]
+	.loc 2 695 0
 	ldr	r3, [r3, #304]
 	str	r3, [sp, #20]
-	ldr	r3, .L967+4
+.LVL1017:
+	.loc 2 696 0
+	ldr	r3, .L966+4
+.LVL1018:
 	ldr	r3, [r3]
+	.loc 2 697 0
 	cmp	r3, #8
+	.loc 2 698 0
 	ldr	r3, [sp, #56]
+	.loc 2 697 0
 	ite	cc
 	movcc	fp, #6
 	movcs	fp, #12
+.LVL1019:
+	.loc 2 698 0
 	cmp	r3, #0
-	beq	.L956
+	beq	.L955
+	.loc 2 699 0
 	movs	r0, #1
-	ldr	r4, .L967+8
+.LVL1020:
+	.loc 2 703 0
+	ldr	r4, .L966+8
+	.loc 2 699 0
 	bl	FlashSetInterfaceMode
+.LVL1021:
+	.loc 2 700 0
 	movs	r0, #1
 	bl	NandcSetMode
+.LVL1022:
+	.loc 2 701 0
 	ldr	r0, [sp, #8]
 	bl	FlashReset
+.LVL1023:
+	.loc 2 702 0
 	mov	r3, r7
 	ldr	r2, [sp, #4]
 	ldr	r1, [sp, #12]
 	ldr	r0, [sp, #8]
 	bl	FlashReadRawPage
+.LVL1024:
 	mov	r6, r0
+.LVL1025:
+	.loc 2 703 0
 	ldrb	r0, [r4]	@ zero_extendqisi2
+.LVL1026:
 	bl	FlashSetInterfaceMode
+.LVL1027:
+	.loc 2 704 0
 	ldrb	r0, [r4]	@ zero_extendqisi2
 	bl	NandcSetMode
+.LVL1028:
+	.loc 2 705 0
 	adds	r3, r6, #1
-	bne	.L945
-.L954:
+	bne	.L944
+.LVL1029:
+.L953:
+	.loc 2 759 0
 	mov	r6, #-1
-.L942:
+.L941:
+	.loc 2 778 0
 	mov	r0, r6
 	add	sp, sp, #24
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L945:
+.LVL1030:
+.L944:
+	.cfi_restore_state
+	.loc 2 708 0
 	mov	r2, r6
 	ldr	r1, [sp, #12]
-	ldr	r0, .L967+12
+	ldr	r0, .L966+12
 	bl	printf
-	ldr	r2, .L967+16
+.LVL1031:
+	.loc 2 722 0
+	ldr	r2, .L966+16
 	ldr	r3, [r2]
 	adds	r3, r3, #1
+	.loc 2 723 0
 	cmp	r3, #2048
-	bcs	.L947
+	bcs	.L946
+	.loc 2 722 0
 	str	r3, [r2]
-	b	.L942
-.L947:
+	b	.L941
+.L946:
+	.loc 2 726 0
 	movs	r7, #0
 	str	r7, [r2]
+.LVL1032:
+	.loc 2 709 0
 	str	r7, [sp, #4]
-.L944:
+.LVL1033:
+.L943:
 	mov	r10, #0
 	mov	r8, #-1
 	mov	r5, r10
 	mov	r4, r10
 	str	r10, [sp, #16]
-.L952:
+.LVL1034:
+.L951:
+	.loc 2 731 0
 	uxtb	r0, fp
 	bl	NandcSetDdrPara
+.LVL1035:
+	.loc 2 732 0
 	mov	r3, r7
 	ldr	r2, [sp, #4]
 	ldr	r1, [sp, #12]
 	ldr	r0, [sp, #8]
 	bl	FlashReadRawPage
+.LVL1036:
+	.loc 2 734 0
 	adds	r3, r6, #1
 	cmp	r0, r3
-	bhi	.L948
+	bhi	.L947
+.LVL1037:
+	.loc 2 740 0
 	cmp	r0, #2
-	bhi	.L958
+	bhi	.L957
+	.loc 2 741 0
 	adds	r4, r4, #1
+.LVL1038:
+	.loc 2 742 0
 	cmp	r4, #9
-	bls	.L958
+	bls	.L957
+.LVL1039:
+	.loc 2 744 0
 	mov	r3, r5
+	.loc 2 732 0
 	mov	r6, r0
+	.loc 2 743 0
 	sub	r5, fp, r4
+.LVL1040:
+	.loc 2 737 0
 	mov	r8, #0
-.L950:
+.LVL1041:
+.L949:
+	.loc 2 759 0
 	ldr	r2, [sp, #16]
 	cmp	r4, r2
 	it	ls
 	movls	r5, r3
-.L951:
-	cbz	r5, .L953
+.LVL1042:
+.L950:
+	.loc 2 762 0
+	cbz	r5, .L952
+	.loc 2 763 0
 	mov	r1, r5
-	ldr	r0, .L967+20
+	ldr	r0, .L966+20
+.LVL1043:
 	bl	printf
+.LVL1044:
+	.loc 2 764 0
 	uxtb	r0, r5
 	bl	NandcSetDdrPara
-.L953:
+.LVL1045:
+.L952:
+	.loc 2 767 0
 	cmp	r8, #0
-	beq	.L942
+	beq	.L941
+	.loc 2 768 0
 	ldr	r2, [sp, #12]
 	ldr	r1, [sp, #8]
-	ldr	r0, .L967+24
+	ldr	r0, .L966+24
 	bl	printf
+.LVL1046:
+	.loc 2 769 0
 	ldr	r3, [sp, #56]
 	cmp	r3, #0
-	beq	.L954
+	beq	.L953
+	.loc 2 771 0
 	ldr	r3, [sp, #20]
 	ubfx	r0, r3, #8, #8
 	bl	NandcSetDdrPara
-	b	.L942
-.L956:
+.LVL1047:
+	b	.L941
+.LVL1048:
+.L955:
+	.loc 2 688 0
 	mov	r6, #1024
-	b	.L944
-.L948:
+	b	.L943
+.LVL1049:
+.L947:
+	.loc 2 748 0
 	ldr	r3, [sp, #16]
 	cmp	r4, r3
-	bls	.L959
+	bls	.L958
+.LVL1050:
+	.loc 2 751 0
 	cmp	r4, #7
+	.loc 2 750 0
 	sub	r5, r10, r4
-	bhi	.L951
+.LVL1051:
+	.loc 2 751 0
+	bhi	.L950
 	str	r4, [sp, #16]
-.L959:
-	movs	r4, #0
-	b	.L949
+.LVL1052:
 .L958:
+	.loc 2 754 0
+	movs	r4, #0
+.LVL1053:
+	b	.L948
+.LVL1054:
+.L957:
+	.loc 2 737 0
 	mov	r8, #0
 	mov	r10, fp
 	mov	r6, r0
+	.loc 2 736 0
 	mov	r7, r8
+	.loc 2 735 0
 	str	r8, [sp, #4]
-.L949:
+.LVL1055:
+.L948:
+	.loc 2 730 0 discriminator 2
 	add	fp, fp, #2
+.LVL1056:
 	cmp	fp, #69
-	bls	.L952
+	bls	.L951
 	mov	r3, r5
 	mov	r5, r10
-	b	.L950
-.L968:
-	.align	2
+	b	.L949
 .L967:
+	.align	2
+.L966:
 	.word	.LANCHOR19
-	.word	.LANCHOR32
+	.word	.LANCHOR33
 	.word	.LANCHOR24
-	.word	.LC7
-	.word	.LANCHOR142
-	.word	.LC8
-	.word	.LC9
+	.word	.LC10
+	.word	.LANCHOR141
+	.word	.LC11
+	.word	.LC12
+	.cfi_endproc
+.LFE227:
 	.size	FlashDdrTunningRead, .-FlashDdrTunningRead
 	.section	.text.FlashReadPage,"ax",%progbits
 	.align	1
@@ -6907,107 +11422,189 @@ FlashDdrTunningRead:
 	.fpu softvfp
 	.type	FlashReadPage, %function
 FlashReadPage:
+.LFB223:
+	.loc 2 518 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1057:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 518 0
 	mov	r7, r2
 	mov	r5, r0
 	mov	r6, r1
 	mov	r8, r3
+	.loc 2 519 0
 	bl	FlashReadRawPage
+.LVL1058:
+	.loc 2 522 0
 	adds	r2, r0, #1
+	.loc 2 519 0
 	mov	r4, r0
-	bne	.L970
-	ldr	r10, .L988+20
+.LVL1059:
+	.loc 2 522 0
+	bne	.L969
+	.loc 2 522 0 is_stmt 0 discriminator 1
+	ldr	r10, .L987+20
 	ldrb	fp, [r10]	@ zero_extendqisi2
 	cmp	fp, #0
-	bne	.L971
-.L973:
-	ldr	r3, .L988
+	bne	.L970
+.L972:
+.LVL1060:
+	.loc 2 529 0 is_stmt 1
+	ldr	r3, .L987
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L970
-	ldr	r3, .L988+4
+	cbz	r3, .L969
+.LBB307:
+	.loc 2 530 0
+	ldr	r3, .L987+4
+	.loc 2 531 0
 	mov	r1, r6
 	mov	r2, r7
 	mov	r0, r5
+	.loc 2 530 0
 	ldr	r3, [r3]
 	ldr	r10, [r3, #304]
+.LVL1061:
+	.loc 2 531 0
 	movs	r3, #1
 	str	r3, [sp]
 	mov	r3, r8
 	bl	FlashDdrTunningRead
+.LVL1062:
+	.loc 2 532 0
 	adds	r1, r0, #1
+	.loc 2 531 0
 	mov	r4, r0
-	beq	.L974
-	ldr	r3, .L988+8
+.LVL1063:
+	.loc 2 532 0
+	beq	.L973
+	.loc 2 532 0 is_stmt 0 discriminator 1
+	ldr	r3, .L987+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r0, r3, lsr #1
-	bls	.L970
-.L974:
+	bls	.L969
+.L973:
+	.loc 2 533 0 is_stmt 1
 	ubfx	r0, r10, #8, #8
+.LVL1064:
 	bl	NandcSetDdrPara
-	b	.L970
-.L971:
+.LVL1065:
+	b	.L969
+.LVL1066:
+.L970:
+.LBE307:
+.LBB308:
+	.loc 2 524 0
 	movs	r3, #0
+	.loc 2 525 0
 	mov	r2, r7
+	.loc 2 524 0
 	strb	r3, [r10]
+	.loc 2 525 0
 	mov	r1, r6
 	mov	r3, r8
 	mov	r0, r5
+.LVL1067:
 	bl	FlashReadRawPage
+.LVL1068:
+.LBE308:
+	.loc 2 529 0
 	adds	r3, r0, #1
+.LBB309:
+	.loc 2 526 0
 	strb	fp, [r10]
-	beq	.L973
+.LBE309:
+	.loc 2 529 0
+	beq	.L972
+.LBB310:
 	mov	r4, r0
-.L970:
-	ldr	r10, .L988+24
+.LVL1069:
+.L969:
+.LBE310:
+	.loc 2 536 0
+	ldr	r10, .L987+24
 	ldr	fp, [r10]
 	cmp	fp, #0
-	beq	.L969
+	beq	.L968
+	.loc 2 536 0 is_stmt 0 discriminator 1
 	adds	r2, r4, #1
-	bne	.L969
+	bne	.L968
+	.loc 2 537 0 is_stmt 1
 	mov	r3, r8
 	mov	r2, r7
 	mov	r1, r6
 	mov	r0, r5
 	blx	fp
+.LVL1070:
+	.loc 2 538 0
 	mov	r3, r6
+	.loc 2 537 0
 	mov	r4, r0
+.LVL1071:
+	.loc 2 538 0
 	mov	r1, r0
 	mov	r2, r5
-	ldr	r0, .L988+12
+	ldr	r0, .L987+12
+.LVL1072:
 	bl	printf
+.LVL1073:
+	.loc 2 539 0
 	adds	r3, r4, #1
-	bne	.L969
-	ldr	r3, .L988+16
+	bne	.L968
+	.loc 2 539 0 is_stmt 0 discriminator 1
+	ldr	r3, .L987+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L969
+	cbz	r3, .L968
+	.loc 2 540 0 is_stmt 1
 	mov	r0, r5
 	bl	flash_enter_slc_mode
+.LVL1074:
+	.loc 2 541 0
 	ldr	r4, [r10]
+.LVL1075:
 	mov	r3, r8
 	mov	r2, r7
 	mov	r1, r6
 	mov	r0, r5
 	blx	r4
+.LVL1076:
 	mov	r4, r0
+.LVL1077:
+	.loc 2 542 0
 	mov	r0, r5
+.LVL1078:
 	bl	flash_exit_slc_mode
-.L969:
+.LVL1079:
+.L968:
+	.loc 2 547 0
 	mov	r0, r4
 	add	sp, sp, #8
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L989:
-	.align	2
+.LVL1080:
 .L988:
-	.word	.LANCHOR28
+	.align	2
+.L987:
+	.word	.LANCHOR29
 	.word	.LANCHOR19
-	.word	.LANCHOR31
-	.word	.LC10
+	.word	.LANCHOR32
+	.word	.LC13
 	.word	.LANCHOR8
 	.word	.LANCHOR5
-	.word	.LANCHOR143
+	.word	.LANCHOR142
+	.cfi_endproc
+.LFE223:
 	.size	FlashReadPage, .-FlashReadPage
 	.section	.text.FlashDdrParaScan,"ax",%progbits
 	.align	1
@@ -7018,57 +11615,110 @@ FlashReadPage:
 	.fpu softvfp
 	.type	FlashDdrParaScan, %function
 FlashDdrParaScan:
+.LFB228:
+	.loc 2 781 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1081:
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
+	.cfi_offset 14, -4
+	.loc 2 781 0
 	mov	r6, r0
-	ldr	r4, .L1001
+.LVL1082:
+	.loc 2 784 0
+	ldr	r4, .L1000
+	.loc 2 786 0
 	movs	r5, #0
+	.loc 2 781 0
 	mov	r7, r1
+	.loc 2 784 0
 	ldrb	r0, [r4]	@ zero_extendqisi2
+.LVL1083:
 	bl	FlashSetInterfaceMode
+.LVL1084:
+	.loc 2 785 0
 	ldrb	r0, [r4]	@ zero_extendqisi2
 	bl	NandcSetMode
+.LVL1085:
+	.loc 2 786 0
 	mov	r3, r5
 	mov	r2, r5
 	str	r5, [sp]
 	mov	r1, r7
 	mov	r0, r6
 	bl	FlashDdrTunningRead
+.LVL1086:
+	.loc 2 787 0
 	mov	r3, r5
 	mov	r2, r5
+	.loc 2 786 0
 	mov	r8, r0
+.LVL1087:
+	.loc 2 787 0
 	mov	r1, r7
 	mov	r0, r6
-	ldr	r5, .L1001+4
+.LVL1088:
+	ldr	r5, .L1000+4
 	bl	FlashReadRawPage
+.LVL1089:
 	adds	r0, r0, #1
-	beq	.L991
+	beq	.L990
+	.loc 2 789 0
 	cmp	r8, #-1
-	bne	.L992
-.L991:
+	bne	.L991
+.L990:
+.LVL1090:
+	.loc 2 789 0 is_stmt 0 discriminator 1
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	lsls	r3, r3, #31
-	bpl	.L992
+	bpl	.L991
+.LVL1091:
+.LBB313:
+.LBB314:
+	.loc 2 790 0 is_stmt 1
 	movs	r0, #1
 	bl	FlashSetInterfaceMode
+.LVL1092:
+	.loc 2 791 0
 	movs	r0, #1
 	bl	NandcSetMode
+.LVL1093:
+	.loc 2 792 0
 	movs	r3, #0
-.L1000:
+.LVL1094:
+.L999:
+.LBE314:
+.LBE313:
+	.loc 2 797 0
 	movs	r0, #0
+	.loc 2 794 0
 	strb	r3, [r5]
+	.loc 2 797 0
 	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L992:
+.LVL1095:
+.L991:
+	.cfi_restore_state
+	.loc 2 794 0
 	movs	r3, #1
-	b	.L1000
-.L1002:
-	.align	2
+	b	.L999
 .L1001:
+	.align	2
+.L1000:
 	.word	.LANCHOR24
-	.word	.LANCHOR28
+	.word	.LANCHOR29
+	.cfi_endproc
+.LFE228:
 	.size	FlashDdrParaScan, .-FlashDdrParaScan
 	.section	.text.FlashLoadPhyInfo,"ax",%progbits
 	.align	1
@@ -7079,146 +11729,244 @@ FlashDdrParaScan:
 	.fpu softvfp
 	.type	FlashLoadPhyInfo, %function
 FlashLoadPhyInfo:
+.LFB230:
+	.loc 2 810 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1096:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 817 0
 	movs	r3, #60
+	.loc 2 810 0
 	sub	sp, sp, #24
-	ldr	fp, .L1018+8
+	.cfi_def_cfa_offset 56
+	.loc 2 824 0
+	ldr	fp, .L1017+8
+	.loc 2 827 0
 	movs	r4, #0
+	.loc 2 829 0
 	movs	r7, #4
+	.loc 2 817 0
 	strb	r3, [sp, #20]
 	movs	r3, #40
 	strb	r3, [sp, #21]
 	movs	r3, #24
 	strb	r3, [sp, #22]
 	movs	r3, #16
-	ldr	r1, .L1018
+	.loc 2 826 0
+	ldr	r1, .L1017
+	.loc 2 829 0
 	mov	r0, r4
+	.loc 2 817 0
 	strb	r3, [sp, #23]
+	.loc 2 813 0
 	mov	r6, #-1
+	.loc 2 824 0
 	ldrh	r3, [fp, #10]
-	ldr	r8, .L1018+36
-	ldr	r5, .L1018+4
+	.loc 2 827 0
+	ldr	r8, .L1017+36
+	.loc 2 826 0
+	ldr	r5, .L1017+4
+	.loc 2 824 0
 	str	r3, [sp, #4]
+.LVL1097:
+	.loc 2 826 0
 	ldr	r3, [r1]
+.LVL1098:
+	.loc 2 827 0
 	str	r4, [r8]
+	.loc 2 826 0
 	str	r3, [r5]
+	.loc 2 829 0
 	bl	flash_enter_slc_mode
+.LVL1099:
+	.loc 2 833 0
 	mov	r10, r1
 	str	r8, [sp, #12]
-.L1004:
+.LVL1100:
+.L1003:
+	.loc 2 810 0
 	mov	r8, #0
 	adds	r3, r4, #1
 	str	r3, [sp, #8]
-.L1006:
+.LVL1101:
+.L1005:
+	.loc 2 832 0
 	add	r3, sp, #20
 	ldrb	r0, [r3, r8]	@ zero_extendqisi2
 	bl	FlashBchSel
+.LVL1102:
+	.loc 2 833 0
 	movs	r3, #0
 	ldr	r2, [r10]
 	mov	r1, r4
 	mov	r0, r3
 	bl	FlashReadRawPage
+.LVL1103:
+	.loc 2 834 0
 	adds	r0, r0, #1
-	bne	.L1005
+.LVL1104:
+	bne	.L1004
+	.loc 2 835 0
 	movs	r3, #0
 	ldr	r2, [r10]
 	ldr	r1, [sp, #8]
 	mov	r0, r3
+.LVL1105:
 	bl	FlashReadRawPage
+.LVL1106:
+	.loc 2 836 0
 	adds	r0, r0, #1
-	bne	.L1005
+.LVL1107:
+	bne	.L1004
+	.loc 2 831 0
 	add	r8, r8, #1
+.LVL1108:
 	cmp	r8, #4
-	bne	.L1006
-.L1007:
+	bne	.L1005
+.LVL1109:
+.L1006:
 	ldr	r3, [sp, #4]
+	.loc 2 830 0 discriminator 2
 	subs	r7, r7, #1
+.LVL1110:
 	add	r4, r4, r3
-	bne	.L1004
+	bne	.L1003
+	.loc 2 865 0
 	mov	r0, r7
-	b	.L1017
-.L1008:
+	b	.L1016
+.L1007:
+	.loc 2 850 0
 	movw	r1, #2036
 	add	r0, r8, #12
 	bl	JSHash
+.LVL1111:
 	ldr	r3, [r8, #8]
 	cmp	r3, r0
-	bne	.L1014
+	bne	.L1013
+	.loc 2 851 0
 	movs	r2, #32
 	add	r1, r8, #160
-	ldr	r0, .L1018+8
+	ldr	r0, .L1017+8
 	bl	ftl_memcpy
+.LVL1112:
+	.loc 2 852 0
 	ldr	r1, [r5]
 	movs	r2, #32
-	ldr	r0, .L1018+12
+	ldr	r0, .L1017+12
 	adds	r1, r1, #192
 	bl	ftl_memcpy
+.LVL1113:
+	.loc 2 853 0
 	ldr	r1, [r5]
 	mov	r2, #852
-	ldr	r0, .L1018+16
+	ldr	r0, .L1017+16
 	adds	r1, r1, #224
 	bl	ftl_memcpy
+.LVL1114:
+	.loc 2 854 0
 	ldr	r6, [r5]
+.LVL1115:
+	.loc 2 857 0
 	mov	r0, r4
-	ldr	r3, .L1018+20
+	.loc 2 854 0
+	ldr	r3, .L1017+20
+	.loc 2 857 0
 	ldrh	r1, [fp, #10]
+	.loc 2 854 0
 	ldr	r2, [r6, #1076]
 	strb	r2, [r3]
+	.loc 2 856 0
 	ldr	r3, [sp, #12]
 	str	r4, [r3]
+	.loc 2 857 0
 	bl	__aeabi_uidiv
-	ldr	r3, .L1018+24
+.LVL1116:
+	ldr	r3, .L1017+24
+	.loc 2 858 0
 	adds	r2, r0, #1
-	cbz	r0, .L1010
-.L1016:
+	cbz	r0, .L1009
+.L1015:
+	.loc 2 859 0
 	str	r2, [r3]
+	.loc 2 860 0
 	ldrh	r2, [r6, #14]
+	.loc 2 861 0
 	movs	r6, #0
-	ldr	r3, .L1018+28
+	.loc 2 860 0
+	ldr	r3, .L1017+28
 	strb	r2, [r3]
-	b	.L1007
-.L1010:
+.LVL1117:
+	b	.L1006
+.LVL1118:
+.L1009:
+	.loc 2 859 0
 	movs	r2, #2
-	b	.L1016
-.L1014:
+	b	.L1015
+.LVL1119:
+.L1013:
 	mov	r6, #-1
-	b	.L1007
-.L1005:
+.LVL1120:
+	b	.L1006
+.LVL1121:
+.L1004:
+	.loc 2 844 0
 	ldr	r8, [r5]
-	ldr	r2, .L1018+32
+.LVL1122:
+	ldr	r2, .L1017+32
 	ldr	r3, [r8]
 	cmp	r3, r2
-	bne	.L1007
+	bne	.L1006
+	.loc 2 845 0
 	cmp	r6, #0
-	bne	.L1008
+	bne	.L1007
+	.loc 2 846 0
 	ldrh	r1, [fp, #10]
 	mov	r0, r4
 	bl	__aeabi_uidiv
-	ldr	r3, .L1018+24
+.LVL1123:
+	ldr	r3, .L1017+24
 	adds	r0, r0, #1
 	str	r0, [r3]
+	.loc 2 847 0
 	mov	r0, r6
-.L1017:
+.LVL1124:
+.L1016:
+	.loc 2 865 0
 	bl	flash_exit_slc_mode
+.LVL1125:
+	.loc 2 867 0
 	mov	r0, r6
 	add	sp, sp, #24
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1019:
-	.align	2
+.LVL1126:
 .L1018:
-	.word	.LANCHOR145
+	.align	2
+.L1017:
 	.word	.LANCHOR144
-	.word	.LANCHOR29
+	.word	.LANCHOR143
+	.word	.LANCHOR30
 	.word	.LANCHOR7
 	.word	.LANCHOR20
-	.word	.LANCHOR28
+	.word	.LANCHOR29
+	.word	.LANCHOR146
 	.word	.LANCHOR147
-	.word	.LANCHOR148
 	.word	1312902724
-	.word	.LANCHOR146
+	.word	.LANCHOR145
+	.cfi_endproc
+.LFE230:
 	.size	FlashLoadPhyInfo, .-FlashLoadPhyInfo
 	.section	.text.ToshibaReadRetrial,"ax",%progbits
 	.align	1
@@ -7229,168 +11977,288 @@ FlashLoadPhyInfo:
 	.fpu softvfp
 	.type	ToshibaReadRetrial, %function
 ToshibaReadRetrial:
+.LFB240:
+	.loc 2 1741 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1127:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
 	sub	sp, sp, #24
+	.cfi_def_cfa_offset 56
+	.loc 2 1741 0
 	mov	r6, r0
 	str	r2, [sp, #12]
 	mov	fp, r3
 	str	r1, [sp, #20]
+	.loc 2 1748 0
 	bl	NandcWaitFlashReady
-	ldr	r3, .L1047
-	ldr	r2, .L1047+4
+.LVL1128:
+.LBB315:
+.LBB316:
+	.loc 3 123 0
+	ldr	r3, .L1046
+.LBE316:
+.LBE315:
+	.loc 2 1751 0
+	ldr	r2, .L1046+4
+.LBB320:
+.LBB317:
+	.loc 3 123 0
 	ldr	r4, [r3, r6, lsl #3]
+.LVL1129:
+	.loc 3 124 0
 	add	r3, r3, r6, lsl #3
 	str	r2, [sp, #16]
 	ldrb	r7, [r3, #4]	@ zero_extendqisi2
+.LBE317:
+.LBE320:
+	.loc 2 1751 0
 	ldrb	r3, [r2]	@ zero_extendqisi2
+.LBB321:
+.LBB318:
+	.loc 3 126 0
 	add	r5, r7, #8
+.LBE318:
+.LBE321:
+	.loc 2 1751 0
 	subs	r3, r3, #67
+.LBB322:
+.LBB319:
+	.loc 3 126 0
 	add	r5, r4, r5, lsl #8
+.LVL1130:
+.LBE319:
+.LBE322:
+	.loc 2 1751 0
 	cmp	r3, #1
-	bls	.L1037
-	ldr	r3, .L1047+8
+	bls	.L1036
+	.loc 2 1753 0
+	ldr	r3, .L1046+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1038
+	cbz	r3, .L1037
+.LVL1131:
+	.loc 2 1755 0
 	movs	r0, #0
 	bl	NandcSetDdrMode
+.LVL1132:
+	.loc 2 1754 0
 	movs	r3, #1
-.L1038:
+.LVL1133:
+.L1037:
+	.loc 2 1744 0
 	str	r3, [sp, #8]
+.LVL1134:
+	.loc 2 1757 0
 	add	r3, r4, r7, lsl #8
+.LVL1135:
 	movs	r2, #92
 	str	r2, [r3, #2056]
+	.loc 2 1758 0
 	movs	r2, #197
 	str	r2, [r3, #2056]
-.L1021:
+.LVL1136:
+.L1020:
+	.loc 2 1760 0
 	mov	r8, #1
+	.loc 2 1743 0
 	mov	r3, #-1
 	str	r3, [sp, #4]
-.L1023:
-	ldr	r3, .L1047+12
+.LVL1137:
+.L1022:
+	.loc 2 1760 0 discriminator 1
+	ldr	r3, .L1046+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	cmp	r8, r3
-	bcc	.L1032
+	bcc	.L1031
 	ldr	r10, [sp, #4]
-.L1031:
+.LVL1138:
+.L1030:
+	.loc 2 1791 0
 	ldr	r3, [sp, #16]
+	.loc 2 1792 0
 	movs	r1, #0
 	mov	r0, r5
+	.loc 2 1791 0
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	subs	r2, r2, #67
 	cmp	r2, #1
-	bhi	.L1033
+	bhi	.L1032
+	.loc 2 1792 0
 	bl	SandiskSetRRPara
-.L1034:
+.LVL1139:
+.L1033:
+	.loc 2 1795 0
 	add	r4, r4, r7, lsl #8
 	movs	r2, #255
 	str	r2, [r4, #2056]
-	ldr	r2, .L1047+16
+	.loc 2 1798 0
+	ldr	r2, .L1046+16
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	add	r2, r2, r2, lsl #1
 	cmp	r10, r2, asr #2
-	bcc	.L1035
+	bcc	.L1034
+	.loc 2 1799 0 discriminator 1
 	cmp	r10, #-1
 	it	ne
 	movne	r10, #256
-.L1035:
+.LVL1140:
+.L1034:
+	.loc 2 1800 0
 	mov	r0, r6
 	bl	NandcWaitFlashReady
+.LVL1141:
+	.loc 2 1801 0
 	ldr	r3, [sp, #8]
-	cbz	r3, .L1020
+	cbz	r3, .L1019
+	.loc 2 1802 0
 	movs	r0, #4
 	bl	NandcSetDdrMode
-.L1020:
+.LVL1142:
+.L1019:
+	.loc 2 1804 0
 	mov	r0, r10
 	add	sp, sp, #24
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1037:
+.LVL1143:
+.L1036:
+	.cfi_restore_state
+	.loc 2 1744 0
 	movs	r3, #0
 	str	r3, [sp, #8]
-	b	.L1021
-.L1032:
+	b	.L1020
+.LVL1144:
+.L1031:
+	.loc 2 1761 0
 	ldr	r3, [sp, #16]
+	.loc 2 1762 0
 	mov	r0, r5
 	uxtb	r1, r8
+	.loc 2 1761 0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	subs	r3, r3, #67
 	cmp	r3, #1
-	bhi	.L1024
+	bhi	.L1023
+	.loc 2 1762 0
 	bl	SandiskSetRRPara
-.L1025:
+.LVL1145:
+.L1024:
+	.loc 2 1765 0
 	ldr	r3, [sp, #16]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #34
-	bne	.L1026
-	ldr	r3, .L1047+12
+	bne	.L1025
+	.loc 2 1765 0 is_stmt 0 discriminator 1
+	ldr	r3, .L1046+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	subs	r3, r3, #3
 	cmp	r8, r3
+	.loc 2 1766 0 is_stmt 1 discriminator 1
 	ittt	eq
 	addeq	r3, r4, r7, lsl #8
 	moveq	r2, #179
 	streq	r2, [r3, #2056]
-.L1026:
+.L1025:
+	.loc 2 1768 0
 	add	r3, r4, r7, lsl #8
 	movs	r2, #38
 	str	r2, [r3, #2056]
+	.loc 2 1769 0
 	movs	r2, #93
 	str	r2, [r3, #2056]
+	.loc 2 1771 0
 	ldr	r3, [sp, #8]
-	cbz	r3, .L1027
+	cbz	r3, .L1026
+	.loc 2 1772 0
 	movs	r0, #4
 	bl	NandcSetDdrMode
+.LVL1146:
+	.loc 2 1773 0
 	mov	r3, fp
 	ldr	r2, [sp, #12]
 	ldr	r1, [sp, #20]
 	mov	r0, r6
 	bl	FlashReadRawPage
+.LVL1147:
 	mov	r10, r0
+.LVL1148:
+	.loc 2 1774 0
 	movs	r0, #0
+.LVL1149:
 	bl	NandcSetDdrMode
-.L1028:
+.LVL1150:
+.L1027:
+	.loc 2 1780 0
 	cmp	r10, #-1
-	beq	.L1029
-	ldr	r2, .L1047+16
+	beq	.L1028
+	.loc 2 1785 0
+	ldr	r2, .L1046+16
 	ldr	r3, [sp, #4]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r3, #-1
 	it	eq
 	moveq	r3, r10
 	str	r3, [sp, #4]
+.LVL1151:
 	add	r2, r2, r2, lsl #1
 	cmp	r10, r2, asr #2
-	bcc	.L1031
+	bcc	.L1030
+	.loc 2 1784 0
 	mov	fp, #0
+	.loc 2 1783 0
 	str	fp, [sp, #12]
-.L1029:
+.LVL1152:
+.L1028:
+	.loc 2 1760 0 discriminator 2
 	add	r8, r8, #1
-	b	.L1023
-.L1024:
+.LVL1153:
+	b	.L1022
+.LVL1154:
+.L1023:
+	.loc 2 1764 0
 	bl	ToshibaSetRRPara
-	b	.L1025
-.L1027:
+.LVL1155:
+	b	.L1024
+.L1026:
+	.loc 2 1776 0
 	mov	r3, fp
 	ldr	r2, [sp, #12]
 	ldr	r1, [sp, #20]
 	mov	r0, r6
 	bl	FlashReadRawPage
+.LVL1156:
 	mov	r10, r0
-	b	.L1028
-.L1033:
+.LVL1157:
+	b	.L1027
+.LVL1158:
+.L1032:
+	.loc 2 1794 0
 	bl	ToshibaSetRRPara
-	b	.L1034
-.L1048:
-	.align	2
+.LVL1159:
+	b	.L1033
 .L1047:
+	.align	2
+.L1046:
 	.word	.LANCHOR6
 	.word	.LANCHOR10
-	.word	.LANCHOR28
-	.word	.LANCHOR149
-	.word	.LANCHOR31
+	.word	.LANCHOR29
+	.word	.LANCHOR148
+	.word	.LANCHOR32
+	.cfi_endproc
+.LFE240:
 	.size	ToshibaReadRetrial, .-ToshibaReadRetrial
 	.section	.text.SamsungReadRetrial,"ax",%progbits
 	.align	1
@@ -7401,76 +12269,132 @@ ToshibaReadRetrial:
 	.fpu softvfp
 	.type	SamsungReadRetrial, %function
 SamsungReadRetrial:
+.LFB242:
+	.loc 2 1820 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1160:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 1820 0
 	mov	r7, r0
 	mov	r10, r2
 	mov	r8, r3
 	mov	fp, r1
+	.loc 2 1828 0
 	movs	r6, #1
+	.loc 2 1826 0
 	bl	NandcWaitFlashReady
-	ldr	r2, .L1062
+.LVL1161:
+.LBB323:
+.LBB324:
+	.loc 3 123 0
+	ldr	r2, .L1061
+.LBE324:
+.LBE323:
+	.loc 2 1822 0
 	mov	r4, #-1
+.LBB326:
+.LBB325:
+	.loc 3 124 0
 	add	r3, r2, r7, lsl #3
+	.loc 3 126 0
 	ldrb	r5, [r3, #4]	@ zero_extendqisi2
 	add	r3, r5, #8
 	ldr	r5, [r2, r7, lsl #3]
 	add	r5, r5, r3, lsl #8
-.L1050:
-	ldr	r3, .L1062+4
+.LVL1162:
+.L1049:
+.LBE325:
+.LBE326:
+	.loc 2 1828 0 discriminator 1
+	ldr	r3, .L1061+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	cmp	r6, r3
-	bcc	.L1054
-.L1053:
+	bcc	.L1053
+.LVL1163:
+.L1052:
+	.loc 2 1843 0
 	movs	r1, #0
 	mov	r0, r5
 	bl	SamsungSetRRPara
-	ldr	r3, .L1062+8
+.LVL1164:
+	.loc 2 1844 0
+	ldr	r3, .L1061+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, asr #2
-	bcc	.L1049
+	bcc	.L1048
+	.loc 2 1845 0 discriminator 1
 	adds	r3, r4, #1
 	it	ne
 	movne	r4, #256
-.L1049:
+.LVL1165:
+.L1048:
+	.loc 2 1848 0
 	mov	r0, r4
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1054:
+.LVL1166:
+.L1053:
+	.loc 2 1829 0
 	uxtb	r1, r6
 	mov	r0, r5
 	bl	SamsungSetRRPara
+.LVL1167:
+	.loc 2 1830 0
 	mov	r2, r10
 	mov	r3, r8
 	mov	r1, fp
 	mov	r0, r7
 	bl	FlashReadRawPage
+.LVL1168:
+	.loc 2 1832 0
 	adds	r2, r0, #1
-	beq	.L1051
-	ldr	r3, .L1062+8
+	beq	.L1050
+	.loc 2 1837 0
+	ldr	r3, .L1061+8
 	cmp	r4, #-1
 	it	eq
 	moveq	r4, r0
+.LVL1169:
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r0, r3, asr #2
-	bcc	.L1057
+	bcc	.L1056
+	.loc 2 1836 0
 	mov	r8, #0
+	.loc 2 1835 0
 	mov	r10, r8
-.L1051:
+.LVL1170:
+.L1050:
+	.loc 2 1828 0 discriminator 2
 	adds	r6, r6, #1
-	b	.L1050
-.L1057:
+.LVL1171:
+	b	.L1049
+.LVL1172:
+.L1056:
+	.loc 2 1830 0
 	mov	r4, r0
-	b	.L1053
-.L1063:
-	.align	2
+.LVL1173:
+	b	.L1052
 .L1062:
+	.align	2
+.L1061:
 	.word	.LANCHOR6
-	.word	.LANCHOR149
-	.word	.LANCHOR31
+	.word	.LANCHOR148
+	.word	.LANCHOR32
+	.cfi_endproc
+.LFE242:
 	.size	SamsungReadRetrial, .-SamsungReadRetrial
 	.section	.text.MicronReadRetrial,"ax",%progbits
 	.align	1
@@ -7481,125 +12405,251 @@ SamsungReadRetrial:
 	.fpu softvfp
 	.type	MicronReadRetrial, %function
 MicronReadRetrial:
+.LFB243:
+	.loc 2 1851 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1174:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
 	mov	r10, r3
-	ldr	r3, .L1079
+	.loc 2 1856 0
+	ldr	r3, .L1078
+.LVL1175:
+	.loc 2 1851 0
 	sub	sp, sp, #32
+	.cfi_def_cfa_offset 64
+	.loc 2 1851 0
 	mov	r7, r0
 	mov	fp, r2
 	str	r1, [sp, #16]
+	.loc 2 1856 0
 	ldrb	r4, [r3]	@ zero_extendqisi2
-	ldr	r3, .L1079+4
+.LVL1176:
+	.loc 2 1858 0
+	ldr	r3, .L1078+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1065
+	bne	.L1064
+	.loc 2 1856 0
 	add	r4, r4, r4, lsl #1
+.LVL1177:
 	asrs	r4, r4, #2
-.L1066:
+.LVL1178:
+.L1065:
+	.loc 2 1861 0
 	mov	r0, r7
+.LVL1179:
 	bl	NandcWaitFlashReady
-	ldr	r3, .L1079+8
+.LVL1180:
+.LBB327:
+.LBB328:
+	.loc 3 123 0
+	ldr	r3, .L1078+8
+.LBE328:
+.LBE327:
+	.loc 2 1863 0
 	movs	r6, #0
+	.loc 2 1853 0
 	mov	r5, #-1
+.LBB330:
+.LBB329:
+	.loc 3 123 0
 	ldr	r2, [r3, r7, lsl #3]
+	.loc 3 124 0
 	add	r3, r3, r7, lsl #3
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+	.loc 3 123 0
 	str	r2, [sp, #8]
+.LVL1181:
 	str	r3, [sp, #12]
+.LVL1182:
+.LBE329:
+.LBE330:
+	.loc 2 1864 0
 	lsls	r3, r3, #8
 	str	r3, [sp, #24]
-.L1067:
-	ldr	r3, .L1079+12
+.LVL1183:
+.L1066:
+	.loc 2 1863 0 discriminator 1
+	ldr	r3, .L1078+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r6, r3
-	bcc	.L1071
-.L1070:
+	bcc	.L1070
+.LVL1184:
+.L1069:
+	.loc 2 1884 0
 	ldr	r3, [sp, #8]
+.LBB331:
+.LBB332:
+	.loc 3 306 0
 	movs	r0, #200
+.LBE332:
+.LBE331:
+	.loc 2 1884 0
 	ldr	r2, [sp, #12]
 	add	r7, r3, r2, lsl #8
 	movs	r3, #239
 	str	r3, [r7, #2056]
+	.loc 2 1885 0
 	movs	r3, #137
 	str	r3, [r7, #2052]
+.LVL1185:
+.LBB334:
+.LBB333:
+	.loc 3 306 0
 	bl	udelay
+.LVL1186:
+.LBE333:
+.LBE334:
+	.loc 2 1891 0
 	cmp	r5, r4
+	.loc 2 1887 0
 	mov	r3, #0
 	str	r3, [r7, #2048]
+	.loc 2 1888 0
 	str	r3, [r7, #2048]
+	.loc 2 1889 0
 	str	r3, [r7, #2048]
+	.loc 2 1890 0
 	str	r3, [r7, #2048]
-	bcc	.L1064
+	.loc 2 1891 0
+	bcc	.L1063
+	.loc 2 1892 0 discriminator 1
 	adds	r3, r5, #1
+	.loc 2 1895 0 discriminator 1
 	ldr	r2, [sp, #16]
+	.loc 2 1892 0 discriminator 1
 	it	ne
 	movne	r5, #256
+.LVL1187:
+	.loc 2 1895 0 discriminator 1
 	mov	r3, r6
+.LVL1188:
 	str	r5, [sp]
 	mov	r1, r6
-	ldr	r0, .L1079+16
+	ldr	r0, .L1078+16
 	bl	printf
-.L1064:
+.LVL1189:
+.L1063:
+	.loc 2 1898 0
 	mov	r0, r5
 	add	sp, sp, #32
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1065:
-	ldr	r3, .L1079+20
+.LVL1190:
+.L1064:
+	.cfi_restore_state
+	.loc 2 1859 0
+	ldr	r3, .L1078+20
 	smull	r4, r5, r4, r3
+.LVL1191:
 	mov	r4, r5
-	b	.L1066
-.L1071:
+.LVL1192:
+	b	.L1065
+.LVL1193:
+.L1070:
+	.loc 2 1864 0
 	ldr	r2, [sp, #24]
+.LBB335:
+.LBB336:
+	.loc 3 306 0
 	movs	r0, #200
+.LBE336:
+.LBE335:
+	.loc 2 1864 0
 	ldr	r3, [sp, #8]
+	.loc 2 1868 0
 	mov	r8, #0
+	.loc 2 1864 0
 	add	r3, r3, r2
 	movs	r2, #239
 	str	r2, [r3, #2056]
+	.loc 2 1865 0
 	movs	r2, #137
 	str	r2, [r3, #2052]
 	str	r3, [sp, #28]
+.LVL1194:
+.LBB338:
+.LBB337:
+	.loc 3 306 0
 	bl	udelay
+.LVL1195:
+.LBE337:
+.LBE338:
+	.loc 2 1867 0
 	adds	r3, r6, #1
+	.loc 2 1871 0
 	ldr	r1, [sp, #16]
+	.loc 2 1867 0
 	mov	r2, r3
 	str	r3, [sp, #20]
 	ldr	r3, [sp, #28]
+	.loc 2 1871 0
 	mov	r0, r7
+	.loc 2 1867 0
 	str	r2, [r3, #2048]
+	.loc 2 1871 0
 	mov	r2, fp
+	.loc 2 1868 0
 	str	r8, [r3, #2048]
+	.loc 2 1869 0
 	str	r8, [r3, #2048]
+	.loc 2 1870 0
 	str	r8, [r3, #2048]
+	.loc 2 1871 0
 	mov	r3, r10
 	bl	FlashReadRawPage
+.LVL1196:
+	.loc 2 1873 0
 	adds	r2, r0, #1
-	beq	.L1068
+	beq	.L1067
+	.loc 2 1874 0
 	cmp	r5, #-1
 	it	eq
 	moveq	r5, r0
+.LVL1197:
+	.loc 2 1878 0
 	cmp	r0, r4
-	bcc	.L1074
+	bcc	.L1073
+	.loc 2 1877 0
 	mov	r10, r8
+	.loc 2 1876 0
 	mov	fp, r8
-.L1068:
+.LVL1198:
+.L1067:
+	.loc 2 1876 0 is_stmt 0 discriminator 1
 	ldr	r6, [sp, #20]
-	b	.L1067
-.L1074:
+.LVL1199:
+	b	.L1066
+.LVL1200:
+.L1073:
+	.loc 2 1871 0 is_stmt 1
 	mov	r5, r0
-	b	.L1070
-.L1080:
-	.align	2
+.LVL1201:
+	b	.L1069
 .L1079:
-	.word	.LANCHOR31
+	.align	2
+.L1078:
+	.word	.LANCHOR32
 	.word	.LANCHOR8
 	.word	.LANCHOR6
-	.word	.LANCHOR149
-	.word	.LC11
+	.word	.LANCHOR148
+	.word	.LC14
 	.word	1431655766
+	.cfi_endproc
+.LFE243:
 	.size	MicronReadRetrial, .-MicronReadRetrial
 	.section	.text.HynixReadRetrial,"ax",%progbits
 	.align	1
@@ -7610,95 +12660,168 @@ MicronReadRetrial:
 	.fpu softvfp
 	.type	HynixReadRetrial, %function
 HynixReadRetrial:
+.LFB245:
+	.loc 2 1929 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1202:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 1929 0
 	mov	fp, r2
-	ldr	r4, .L1098
+	.loc 2 1933 0
+	ldr	r4, .L1097
+	.loc 2 1940 0
 	mov	r8, #0
+	.loc 2 1931 0
 	mov	r6, #-1
+	.loc 2 1929 0
 	mov	r10, r3
 	mov	r7, r0
 	str	r1, [sp, #4]
+	.loc 2 1934 0
 	ldrb	r2, [r4, #2]	@ zero_extendqisi2
+.LVL1203:
+	.loc 2 1933 0
 	adds	r3, r4, r0
+.LVL1204:
 	ldrb	r5, [r3, #12]	@ zero_extendqisi2
+.LVL1205:
+	.loc 2 1934 0
 	str	r2, [sp]
-	ldr	r2, .L1098+4
+.LVL1206:
+	.loc 2 1936 0
+	ldr	r2, .L1097+4
 	ldr	r2, [r2]
 	ldrb	r2, [r2, #19]	@ zero_extendqisi2
 	cmp	r2, #7
+	.loc 2 1937 0
 	it	eq
 	ldrbeq	r5, [r3, #20]	@ zero_extendqisi2
+.LVL1207:
+	.loc 2 1939 0
 	bl	NandcWaitFlashReady
-.L1083:
+.LVL1208:
+.L1082:
+	.loc 2 1940 0 discriminator 1
 	ldr	r3, [sp]
 	cmp	r8, r3
-	bcc	.L1088
-.L1087:
-	ldr	r3, .L1098+4
+	bcc	.L1087
+.LVL1209:
+.L1086:
+	.loc 2 1958 0
+	ldr	r3, .L1097+4
+	.loc 2 1959 0
 	add	r4, r4, r7
+	.loc 2 1958 0
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	cmp	r3, #7
-	ldr	r3, .L1098+8
+	.loc 2 1962 0
+	ldr	r3, .L1097+8
+	.loc 2 1959 0
 	ite	eq
 	strbeq	r5, [r4, #20]
+	.loc 2 1961 0
 	strbne	r5, [r4, #12]
+	.loc 2 1962 0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r6, r3, asr #2
-	bcc	.L1081
+	bcc	.L1080
+	.loc 2 1963 0 discriminator 1
 	adds	r3, r6, #1
 	it	ne
 	movne	r6, #256
-.L1081:
+.LVL1210:
+.L1080:
+	.loc 2 1967 0
 	mov	r0, r6
 	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+.LVL1211:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1088:
+.LVL1212:
+.L1087:
+	.cfi_restore_state
+	.loc 2 1943 0
 	ldr	r3, [sp]
+	.loc 2 1941 0
 	adds	r5, r5, #1
+.LVL1213:
 	uxtb	r5, r5
-	ldr	r2, .L1098+12
+.LVL1214:
+	.loc 2 1944 0
+	ldr	r2, .L1097+12
 	ldrb	r1, [r4, #1]	@ zero_extendqisi2
 	mov	r0, r7
+	.loc 2 1943 0
 	cmp	r3, r5
 	it	ls
 	movls	r5, #0
+.LVL1215:
+	.loc 2 1944 0
 	mov	r3, r5
 	bl	HynixSetRRPara
+.LVL1216:
+	.loc 2 1945 0
 	mov	r2, fp
 	mov	r3, r10
 	ldr	r1, [sp, #4]
 	mov	r0, r7
 	bl	FlashReadRawPage
+.LVL1217:
+	.loc 2 1947 0
 	adds	r2, r0, #1
-	beq	.L1085
-	ldr	r3, .L1098+8
+	beq	.L1084
+	.loc 2 1952 0
+	ldr	r3, .L1097+8
+	.loc 2 1948 0
 	cmp	r6, #-1
 	it	eq
 	moveq	r6, r0
+.LVL1218:
+	.loc 2 1952 0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r0, r3, asr #2
-	bcc	.L1092
+	bcc	.L1091
+	.loc 2 1951 0
 	mov	r10, #0
+	.loc 2 1950 0
 	mov	fp, r10
-.L1085:
+.LVL1219:
+.L1084:
+	.loc 2 1940 0 discriminator 2
 	add	r8, r8, #1
-	b	.L1083
-.L1092:
+.LVL1220:
+	b	.L1082
+.LVL1221:
+.L1091:
+	.loc 2 1945 0
 	mov	r6, r0
-	b	.L1087
-.L1099:
-	.align	2
+.LVL1222:
+	b	.L1086
 .L1098:
+	.align	2
+.L1097:
 	.word	.LANCHOR20
 	.word	.LANCHOR18
-	.word	.LANCHOR31
+	.word	.LANCHOR32
 	.word	.LANCHOR20+4
+	.cfi_endproc
+.LFE245:
 	.size	HynixReadRetrial, .-HynixReadRetrial
 	.section	.text.FlashProgPage,"ax",%progbits
 	.align	1
@@ -7709,66 +12832,120 @@ HynixReadRetrial:
 	.fpu softvfp
 	.type	FlashProgPage, %function
 FlashProgPage:
+.LFB224:
+	.loc 2 562 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1223:
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
+	.cfi_offset 14, -4
+	.loc 2 562 0
 	mov	r8, r3
-	ldr	r3, .L1103
+	.loc 2 566 0
+	ldr	r3, .L1102
+.LVL1224:
+	.loc 2 562 0
 	mov	r5, r1
 	mov	r7, r2
+	.loc 2 568 0
 	mov	r4, r0
+	.loc 2 566 0
 	ldrb	r6, [r3, #9]	@ zero_extendqisi2
-	cbnz	r0, .L1101
-	ldr	r3, .L1103+4
-	ldr	r2, .L1103+8
+.LVL1225:
+	.loc 2 568 0
+	cbnz	r0, .L1100
+	.loc 2 568 0 is_stmt 0 discriminator 1
+	ldr	r3, .L1102+4
+	ldr	r2, .L1102+8
+.LVL1226:
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	ldr	r1, [r2]
+.LVL1227:
 	muls	r1, r3, r1
 	cmp	r1, r5
-	bls	.L1101
-	ldr	r3, .L1103+12
+	bls	.L1100
+	.loc 2 569 0 is_stmt 1
+	ldr	r3, .L1102+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L1102
+	cbnz	r3, .L1101
+	.loc 2 572 0
 	subs	r6, r6, #2
-.L1101:
+.LVL1228:
+.L1100:
+	.loc 2 574 0
 	mov	r0, r4
+.LVL1229:
 	bl	NandcWaitFlashReady
+.LVL1230:
+	.loc 2 575 0
 	mov	r0, r4
 	bl	NandcFlashCs
+.LVL1231:
+	.loc 2 576 0
 	mov	r1, r5
 	mov	r0, r4
 	bl	FlashProgFirstCmd
+.LVL1232:
+	.loc 2 577 0
 	mov	r3, r7
 	uxtb	r2, r6
 	str	r8, [sp]
 	movs	r1, #1
 	mov	r0, r4
 	bl	NandcXferData
+.LVL1233:
+	.loc 2 578 0
 	mov	r1, r5
 	mov	r0, r4
 	bl	FlashProgSecondCmd
+.LVL1234:
+	.loc 2 579 0
 	mov	r0, r4
 	bl	NandcWaitFlashReady
+.LVL1235:
+	.loc 2 580 0
 	mov	r1, r5
 	mov	r0, r4
 	bl	FlashReadStatus
+.LVL1236:
 	mov	r1, r0
+.LVL1237:
+	.loc 2 581 0
 	mov	r0, r4
+.LVL1238:
 	bl	NandcFlashDeCs
+.LVL1239:
+	.loc 2 586 0
 	and	r0, r1, #1
+.LVL1240:
 	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1102:
+.LVL1241:
+.L1101:
+	.cfi_restore_state
+	.loc 2 570 0
 	movs	r6, #4
-	b	.L1101
-.L1104:
-	.align	2
+.LVL1242:
+	b	.L1100
 .L1103:
-	.word	.LANCHOR29
+	.align	2
+.L1102:
+	.word	.LANCHOR30
 	.word	.LANCHOR2
 	.word	.LANCHOR3
 	.word	.LANCHOR1
+	.cfi_endproc
+.LFE224:
 	.size	FlashProgPage, .-FlashProgPage
 	.section	.text.FlashSavePhyInfo,"ax",%progbits
 	.align	1
@@ -7779,89 +12956,149 @@ FlashProgPage:
 	.fpu softvfp
 	.type	FlashSavePhyInfo, %function
 FlashSavePhyInfo:
+.LFB231:
+	.loc 2 870 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1243:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r7, .L1114
-	ldr	r4, .L1114+4
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 873 0
+	ldr	r7, .L1113
+	ldr	r4, .L1113+4
 	ldr	r3, [r7]
-	ldr	r10, .L1114+60
-	ldr	r8, .L1114+64
+	.loc 2 886 0
+	ldr	r10, .L1113+60
+	.loc 2 903 0
+	ldr	r8, .L1113+64
+	.loc 2 873 0
 	str	r3, [r4]
-	ldr	r3, .L1114+8
+	.loc 2 877 0
+	ldr	r3, .L1113+8
 	ldrb	r0, [r3]	@ zero_extendqisi2
 	bl	FlashBchSel
+.LVL1244:
+	.loc 2 885 0
 	mov	r2, #2048
 	movs	r1, #0
 	ldr	r0, [r7]
 	bl	ftl_memset
-	ldr	r0, [r4]
+.LVL1245:
+	.loc 2 886 0
+	ldr	r3, [r4]
+	.loc 2 891 0
 	movs	r2, #32
-	ldr	r3, .L1114+12
-	ldr	r1, .L1114+16
-	str	r10, [r0]
-	adds	r0, r0, #16
+	ldr	r1, .L1113+12
+	.loc 2 886 0
+	str	r10, [r3]
+	.loc 2 887 0
+	ldr	r3, .L1113+16
+	ldr	r0, [r4]
 	ldrb	r3, [r3]	@ zero_extendqisi2
+	.loc 2 891 0
+	adds	r0, r0, #16
+	.loc 2 887 0
 	strh	r3, [r0, #-4]	@ movhi
-	ldr	r3, .L1114+20
+	.loc 2 888 0
+	ldr	r3, .L1113+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	strh	r3, [r0, #-2]	@ movhi
-	ldr	r3, .L1114+24
+	.loc 2 889 0
+	ldr	r3, .L1113+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r3, [r0, #1060]
+	.loc 2 891 0
 	bl	ftl_memcpy
+.LVL1246:
+	.loc 2 892 0
 	ldr	r0, [r4]
 	movs	r2, #8
-	ldr	r1, .L1114+28
+	ldr	r1, .L1113+28
 	adds	r0, r0, #80
 	bl	ftl_memcpy
+.LVL1247:
+	.loc 2 893 0
 	ldr	r0, [r4]
 	movs	r2, #32
-	ldr	r1, .L1114+32
+	ldr	r1, .L1113+32
 	adds	r0, r0, #96
 	bl	ftl_memcpy
+.LVL1248:
+	.loc 2 895 0
 	ldr	r0, [r4]
 	movs	r2, #32
-	ldr	r1, .L1114+36
+	ldr	r1, .L1113+36
 	adds	r0, r0, #160
 	bl	ftl_memcpy
+.LVL1249:
+	.loc 2 896 0
 	ldr	r0, [r4]
 	movs	r2, #32
-	ldr	r1, .L1114+40
+	ldr	r1, .L1113+40
 	adds	r0, r0, #192
 	bl	ftl_memcpy
+.LVL1250:
+	.loc 2 897 0
 	ldr	r0, [r4]
 	mov	r2, #852
-	ldr	r1, .L1114+44
+	ldr	r1, .L1113+44
 	adds	r0, r0, #224
 	bl	ftl_memcpy
+.LVL1251:
+	.loc 2 898 0
 	ldr	r5, [r4]
 	movw	r1, #2036
 	add	r0, r5, #12
 	bl	JSHash
-	ldr	r1, .L1114+48
+.LVL1252:
+	.loc 2 900 0
+	ldr	r1, .L1113+48
+	.loc 2 899 0
 	mov	r3, #1592
 	str	r3, [r5, #4]
+	.loc 2 898 0
 	str	r0, [r5, #8]
+	.loc 2 901 0
 	movs	r0, #0
+	.loc 2 900 0
 	ldr	r3, [r1]
+	.loc 2 872 0
 	movs	r5, #0
+	.loc 2 902 0
 	mov	r6, r5
+	.loc 2 900 0
 	str	r3, [r4]
+	.loc 2 901 0
 	bl	flash_enter_slc_mode
+.LVL1253:
 	mov	fp, r1
-.L1108:
+.LVL1254:
+.L1107:
+	.loc 2 903 0
 	ldr	r1, [r8]
 	movs	r2, #0
 	mov	r0, r2
 	muls	r1, r6, r1
 	bl	FlashEraseBlock
+.LVL1255:
+	.loc 2 904 0
 	ldr	r1, [r8]
 	movs	r3, #0
 	ldr	r2, [r7]
 	mov	r0, r3
 	muls	r1, r6, r1
 	bl	FlashProgPage
+.LVL1256:
+	.loc 2 905 0
 	ldr	r1, [r8]
 	movs	r3, #0
 	ldr	r2, [r7]
@@ -7869,74 +13106,104 @@ FlashSavePhyInfo:
 	muls	r1, r6, r1
 	adds	r1, r1, #1
 	bl	FlashProgPage
+.LVL1257:
+	.loc 2 906 0
 	ldr	r1, [r8]
 	movs	r3, #0
 	ldr	r2, [fp]
 	mov	r0, r3
 	muls	r1, r6, r1
 	bl	FlashReadRawPage
+.LVL1258:
 	adds	r0, r0, #1
 	add	r2, r6, #1
-	beq	.L1106
+	beq	.L1105
+	.loc 2 907 0
 	ldr	r3, [r4]
 	ldr	r1, [r3]
 	cmp	r1, r10
-	bne	.L1106
+	bne	.L1105
+	.loc 2 908 0 discriminator 1
 	add	r0, r3, #12
 	movw	r1, #2036
 	str	r2, [sp, #4]
 	str	r3, [sp]
 	bl	JSHash
+.LVL1259:
+	.loc 2 907 0 discriminator 1
 	ldr	r3, [sp]
 	ldr	r2, [sp, #4]
 	ldr	r3, [r3, #8]
 	cmp	r3, r0
-	bne	.L1106
-	ldr	r3, .L1114+52
+	bne	.L1105
+	.loc 2 909 0
+	ldr	r3, .L1113+52
+	.loc 2 914 0
 	cmp	r5, #1
+	.loc 2 909 0
 	str	r2, [r3]
+	.loc 2 910 0
 	ldr	r3, [r8]
 	mul	r6, r6, r3
-	ldr	r3, .L1114+56
+.LVL1260:
+	ldr	r3, .L1113+56
 	str	r6, [r3]
-	beq	.L1109
+.LVL1261:
+	.loc 2 914 0
+	beq	.L1108
 	movs	r5, #1
-.L1106:
+.LVL1262:
+.L1105:
+	.loc 2 902 0 discriminator 2
 	cmp	r2, #4
 	mov	r6, r2
-	bne	.L1108
-.L1107:
+.LVL1263:
+	bne	.L1107
+.LVL1264:
+.L1106:
+	.loc 2 917 0
 	movs	r0, #0
 	bl	flash_exit_slc_mode
+.LVL1265:
+	.loc 2 918 0
 	clz	r0, r5
 	lsrs	r0, r0, #5
+	.loc 2 922 0
 	negs	r0, r0
 	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1109:
+.LVL1266:
+.L1108:
+	.cfi_restore_state
+	.loc 2 911 0
 	movs	r5, #2
-	b	.L1107
-.L1115:
-	.align	2
+.LVL1267:
+	b	.L1106
 .L1114:
-	.word	.LANCHOR145
+	.align	2
+.L1113:
 	.word	.LANCHOR144
-	.word	.LANCHOR150
-	.word	.LANCHOR25
+	.word	.LANCHOR143
+	.word	.LANCHOR149
 	.word	.LANCHOR22
+	.word	.LANCHOR25
 	.word	.LANCHOR2
-	.word	.LANCHOR28
+	.word	.LANCHOR29
 	.word	.LANCHOR26
 	.word	.LANCHOR17
-	.word	.LANCHOR29
+	.word	.LANCHOR30
 	.word	.LANCHOR7
 	.word	.LANCHOR20
-	.word	.LANCHOR151
-	.word	.LANCHOR147
+	.word	.LANCHOR150
 	.word	.LANCHOR146
+	.word	.LANCHOR145
 	.word	1312902724
 	.word	.LANCHOR3
+	.cfi_endproc
+.LFE231:
 	.size	FlashSavePhyInfo, .-FlashSavePhyInfo
 	.section	.text.FlashReadIdbDataRaw,"ax",%progbits
 	.align	1
@@ -7947,13 +13214,32 @@ FlashSavePhyInfo:
 	.fpu softvfp
 	.type	FlashReadIdbDataRaw, %function
 FlashReadIdbDataRaw:
+.LFB249:
+	.loc 2 2091 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1268:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 2095 0
 	movs	r3, #60
+	.loc 2 2091 0
 	sub	sp, sp, #24
-	ldr	r2, .L1128
+	.cfi_def_cfa_offset 56
+	.loc 2 2105 0
+	ldr	r2, .L1127
+	.loc 2 2091 0
 	mov	r10, r0
+	.loc 2 2095 0
 	strb	r3, [sp, #20]
 	movs	r3, #40
 	strb	r3, [sp, #21]
@@ -7961,107 +13247,160 @@ FlashReadIdbDataRaw:
 	strb	r3, [sp, #22]
 	movs	r3, #16
 	strb	r3, [sp, #23]
-	ldr	r3, .L1128+4
+.LVL1269:
+	.loc 2 2103 0
+	ldr	r3, .L1127+4
+	.loc 2 2105 0
 	ldr	r1, [r2]
 	str	r2, [sp, #8]
+	.loc 2 2103 0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r3, [sp, #4]
-	ldr	r3, .L1128+8
+.LVL1270:
+	.loc 2 2105 0
+	ldr	r3, .L1127+8
 	cmp	r1, r3
 	str	r3, [sp, #12]
-	bne	.L1117
+	bne	.L1116
+	.loc 2 2106 0
 	movs	r0, #0
+.LVL1271:
 	bl	flash_enter_slc_mode
-.L1117:
+.LVL1272:
+.L1116:
+	.loc 2 2102 0
 	mov	r7, #-1
+	.loc 2 2108 0
 	movs	r4, #2
+	.loc 2 2107 0
 	mov	r2, #2048
 	movs	r1, #0
 	mov	r0, r10
 	bl	ftl_memset
-.L1118:
-	ldr	r3, .L1128+12
+.LVL1273:
+.L1117:
+	.loc 2 2108 0 discriminator 1
+	ldr	r3, .L1127+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r4, r3
-	bcc	.L1123
-.L1122:
+	bcc	.L1122
+.L1121:
+.LVL1274:
+	.loc 2 2132 0
 	ldr	r0, [sp, #4]
 	bl	FlashBchSel
+.LVL1275:
+	.loc 2 2133 0
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #12]
 	ldr	r3, [r3]
 	cmp	r3, r2
-	bne	.L1116
+	bne	.L1115
+	.loc 2 2134 0
 	movs	r0, #0
 	bl	flash_exit_slc_mode
-.L1116:
+.LVL1276:
+.L1115:
+	.loc 2 2136 0
 	mov	r0, r7
 	add	sp, sp, #24
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1123:
-	ldr	r5, .L1128+16
+.LVL1277:
+.L1122:
+	.cfi_restore_state
+	.loc 2 2111 0
+	ldr	r5, .L1127+16
 	movs	r6, #0
-	ldr	fp, .L1128+32
-.L1120:
+	ldr	fp, .L1127+32
+.L1119:
+.LVL1278:
+	.loc 2 2110 0
 	add	r3, sp, #20
 	ldrb	r8, [r6, r3]	@ zero_extendqisi2
 	mov	r0, r8
 	bl	FlashBchSel
+.LVL1279:
+	.loc 2 2111 0
 	ldr	r1, [fp]
 	movs	r3, #0
 	ldr	r2, [r5]
 	mov	r0, r3
 	muls	r1, r4, r1
 	bl	FlashReadRawPage
+.LVL1280:
 	adds	r0, r0, #1
-	bne	.L1119
+	bne	.L1118
+	.loc 2 2109 0 discriminator 2
 	adds	r6, r6, #1
+.LVL1281:
 	cmp	r6, #4
-	bne	.L1120
-.L1121:
+	bne	.L1119
+.L1120:
+	.loc 2 2108 0 discriminator 2
 	adds	r4, r4, #1
-	b	.L1118
-.L1126:
+.LVL1282:
+	b	.L1117
+.LVL1283:
+.L1125:
+	.loc 2 2123 0
 	movs	r7, #0
-	b	.L1122
-.L1119:
+	b	.L1121
+.LVL1284:
+.L1118:
+	.loc 2 2117 0
 	ldr	r3, [r5]
 	ldr	r2, [r3]
-	ldr	r3, .L1128+20
+	ldr	r3, .L1127+20
 	cmp	r2, r3
-	bne	.L1121
+	bne	.L1120
+	.loc 2 2119 0
 	mov	r1, r8
-	ldr	r0, .L1128+24
+	ldr	r0, .L1127+24
 	bl	printf
+.LVL1285:
+	.loc 2 2121 0
 	mov	r2, #2048
 	ldr	r1, [r5]
 	mov	r0, r10
 	bl	ftl_memcpy
+.LVL1286:
+	.loc 2 2122 0
 	ldr	r3, [r5]
-	ldr	r2, .L1128+12
+	ldr	r2, .L1127+12
 	ldr	r3, [r3, #512]
 	strb	r3, [r2]
-	ldr	r3, .L1128+28
+.LVL1287:
+	.loc 2 2124 0
+	ldr	r3, .L1127+28
 	ldr	r2, [r3]
 	cmp	r4, r2
-	bcs	.L1126
+	bcs	.L1125
+	.loc 2 2125 0
 	str	r4, [r3]
+	.loc 2 2123 0
 	movs	r7, #0
+	.loc 2 2126 0
 	bl	FlashSavePhyInfo
-	b	.L1121
-.L1129:
-	.align	2
+.LVL1288:
+	.loc 2 2127 0
+	b	.L1120
 .L1128:
-	.word	.LANCHOR152
-	.word	.LANCHOR31
+	.align	2
+.L1127:
+	.word	.LANCHOR151
+	.word	.LANCHOR32
 	.word	1446522928
 	.word	.LANCHOR2
-	.word	.LANCHOR145
+	.word	.LANCHOR144
 	.word	-52655045
-	.word	.LC12
-	.word	.LANCHOR147
+	.word	.LC15
+	.word	.LANCHOR146
 	.word	.LANCHOR3
+	.cfi_endproc
+.LFE249:
 	.size	FlashReadIdbDataRaw, .-FlashReadIdbDataRaw
 	.section	.text.FlashPageProgMsbFFData,"ax",%progbits
 	.align	1
@@ -8072,74 +13411,116 @@ FlashReadIdbDataRaw:
 	.fpu softvfp
 	.type	FlashPageProgMsbFFData, %function
 FlashPageProgMsbFFData:
+.LFB247:
+	.loc 2 1984 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1289:
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 3, -32
+	.cfi_offset 4, -28
+	.cfi_offset 5, -24
+	.cfi_offset 6, -20
+	.cfi_offset 7, -16
+	.cfi_offset 8, -12
+	.cfi_offset 10, -8
+	.cfi_offset 14, -4
+	.loc 2 1984 0
 	mov	r4, r2
-	ldr	r5, .L1140
+	.loc 2 1985 0
+	ldr	r5, .L1139
+	.loc 2 1984 0
 	mov	r6, r0
 	mov	r7, r1
+	.loc 2 1985 0
 	ldr	r3, [r5]
 	ldrb	r2, [r3, #19]	@ zero_extendqisi2
-	ldr	r3, .L1140+4
+.LVL1290:
+	.loc 2 1987 0
+	ldr	r3, .L1139+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1131
-	ldr	r3, .L1140+8
+	cbz	r3, .L1130
+	.loc 2 1987 0 is_stmt 0 discriminator 1
+	ldr	r3, .L1139+8
 	ldr	r1, [r3]
-	ldr	r3, .L1140+12
+.LVL1291:
+	ldr	r3, .L1139+12
 	cmp	r1, r3
-	beq	.L1130
-.L1131:
+	beq	.L1129
+.L1130:
+	.loc 2 1989 0 is_stmt 1
 	subs	r3, r2, #5
 	uxtb	r3, r3
 	cmp	r3, #30
-	bhi	.L1132
-	ldr	r2, .L1140+16
+	bhi	.L1131
+	ldr	r2, .L1139+16
+.LVL1292:
 	lsr	r3, r2, r3
 	lsls	r3, r3, #31
-	bmi	.L1134
+	bmi	.L1133
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L1135:
+.LVL1293:
+.L1134:
+	.loc 2 1993 0
 	ldrh	r2, [r10, r4, lsl #1]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1130
+	bne	.L1129
+	.loc 2 1994 0
 	mov	r2, #32768
 	movs	r1, #255
 	ldr	r0, [r8]
 	bl	ftl_memset
+.LVL1294:
+	.loc 2 2038 0
 	adds	r1, r4, r7
+	.loc 2 1991 0
 	adds	r4, r4, #1
+.LVL1295:
 	uxth	r4, r4
+	.loc 2 2038 0
 	movs	r3, #0
 	ldr	r2, [r8]
 	mov	r0, r6
 	bl	FlashProgPage
-.L1136:
+.LVL1296:
+.L1135:
+	.loc 2 1991 0 discriminator 1
 	ldr	r3, [r5]
 	ldrh	r3, [r3, #10]
 	cmp	r3, r4
-	bhi	.L1135
+	bhi	.L1134
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L1132:
+.LVL1297:
+.L1131:
+	.loc 2 1989 0
 	cmp	r2, #68
-	bne	.L1130
-.L1134:
-	ldr	r10, .L1140+20
-	ldr	r8, .L1140+24
-	b	.L1136
-.L1130:
+	bne	.L1129
+.LVL1298:
+.L1133:
+	.loc 2 1993 0 discriminator 1
+	ldr	r10, .L1139+20
+	.loc 2 1994 0 discriminator 1
+	ldr	r8, .L1139+24
+	b	.L1135
+.LVL1299:
+.L1129:
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L1141:
-	.align	2
+.LVL1300:
 .L1140:
+	.align	2
+.L1139:
 	.word	.LANCHOR18
 	.word	.LANCHOR8
-	.word	.LANCHOR152
+	.word	.LANCHOR151
 	.word	1446522928
 	.word	1073758215
 	.word	.LANCHOR117
-	.word	.LANCHOR151
+	.word	.LANCHOR150
+	.cfi_endproc
+.LFE247:
 	.size	FlashPageProgMsbFFData, .-FlashPageProgMsbFFData
 	.section	.text.ftl_memcmp,"ax",%progbits
 	.align	1
@@ -8150,10 +13531,18 @@ FlashPageProgMsbFFData:
 	.fpu softvfp
 	.type	ftl_memcmp, %function
 ftl_memcmp:
+.LFB483:
+	.loc 7 47 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL1301:
+	.loc 7 48 0
 	b	memcmp
+.LVL1302:
+	.cfi_endproc
+.LFE483:
 	.size	ftl_memcmp, .-ftl_memcmp
 	.section	.text.rknand_get_clk_rate,"ax",%progbits
 	.align	1
@@ -8164,15 +13553,23 @@ ftl_memcmp:
 	.fpu softvfp
 	.type	rknand_get_clk_rate, %function
 rknand_get_clk_rate:
+.LFB484:
+	.loc 7 52 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r0, .L1144
+.LVL1303:
+	.loc 7 54 0
+	ldr	r0, .L1143
+.LVL1304:
 	bx	lr
-.L1145:
-	.align	2
 .L1144:
+	.align	2
+.L1143:
 	.word	148000000
+	.cfi_endproc
+.LFE484:
 	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
 	.section	.text.ftl_malloc,"ax",%progbits
 	.align	1
@@ -8183,11 +13580,19 @@ rknand_get_clk_rate:
 	.fpu softvfp
 	.type	ftl_malloc, %function
 ftl_malloc:
+.LFB485:
+	.loc 7 57 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL1305:
+	.loc 7 58 0
 	movs	r1, #0
 	b	kmalloc
+.LVL1306:
+	.cfi_endproc
+.LFE485:
 	.size	ftl_malloc, .-ftl_malloc
 	.section	.text.NandcInit,"ax",%progbits
 	.align	1
@@ -8198,69 +13603,148 @@ ftl_malloc:
 	.fpu softvfp
 	.type	NandcInit, %function
 NandcInit:
+.LFB267:
+	.loc 3 16 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1148
+.LVL1307:
+	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 3 41 0
 	movs	r2, #1
-	push	{r4, lr}
-	movs	r4, #0
+	ldr	r3, .L1148
+	movs	r1, #0
+	.loc 3 62 0
+	ldr	r4, .L1148+4
+	.loc 3 41 0
 	str	r2, [r3, #12]
 	movs	r2, #2
 	str	r2, [r3, #20]
 	movs	r2, #3
-	stm	r3, {r0, r4}
+	str	r2, [r3, #28]
+	.loc 3 45 0
+	ldr	r2, .L1148+8
+	.loc 3 42 0
+	stm	r3, {r0, r1}
+.LVL1308:
 	str	r0, [r3, #8]
+.LVL1309:
+	.loc 3 45 0
+	str	r0, [r2]
+	.loc 3 42 0
 	str	r0, [r3, #16]
-	str	r2, [r3, #28]
+.LVL1310:
 	str	r0, [r3, #24]
-	ldr	r3, .L1148+4
-	ldr	r2, .L1148+8
-	str	r0, [r3]
+.LVL1311:
+	.loc 3 53 0
 	ldr	r3, [r0]
 	and	r3, r3, #253952
-	ubfx	r1, r3, #13, #1
-	and	r3, r3, #245760
-	str	r1, [r2]
+.LVL1312:
+	.loc 3 62 0
+	ubfx	r5, r3, #13, #1
+	.loc 3 63 0
+	bfi	r3, r1, #13, #1
+	.loc 3 66 0
+	ldr	r1, [r0, #352]
+	.loc 3 65 0
 	orr	r3, r3, #256
-	ldr	r2, [r0, #352]
-	ldr	r1, .L1148+12
-	ubfx	r2, r2, #16, #4
-	str	r2, [r1]
+.LVL1313:
+	.loc 3 62 0
+	str	r5, [r4]
+	.loc 3 66 0
+	ldr	r4, .L1148+12
+	ubfx	r1, r1, #16, #4
+	.loc 3 67 0
+	ldr	r5, .L1148+16
+	.loc 3 66 0
+	str	r1, [r4]
+	.loc 3 67 0
 	ldr	r1, [r0, #352]
-	ldr	r2, .L1148+16
-	str	r1, [r2]
+	str	r1, [r5]
+	.loc 3 68 0
+	movw	r5, #2049
+	cmp	r1, r5
+	.loc 3 69 0
+	itt	eq
+	moveq	r1, #8
+	streq	r1, [r4]
+	.loc 3 71 0
+	movs	r4, #0
+.LVL1314:
+	.loc 3 70 0
 	str	r3, [r0]
-	movw	r3, #4225
-	str	r4, [r0, #336]
-	str	r3, [r0, #4]
-	movw	r3, #8322
-	str	r3, [r0, #344]
-	ldr	r3, .L1148+20
-	str	r3, [r0, #304]
+	.loc 3 101 0
 	mov	r0, #36864
+.LVL1315:
+	.loc 3 71 0
+	ldr	r3, [r2]
+.LVL1316:
+.LBB343:
+.LBB344:
+.LBB345:
+.LBB346:
+	.loc 3 379 0
+	movw	r2, #4225
+.LBE346:
+.LBE345:
+.LBE344:
+.LBE343:
+	.loc 3 71 0
+	str	r4, [r3, #336]
+.LVL1317:
+.LBB350:
+.LBB349:
+.LBB348:
+.LBB347:
+	.loc 3 379 0
+	str	r2, [r3, #4]
+.LVL1318:
+.LBE347:
+.LBE348:
+.LBE349:
+.LBE350:
+	.loc 3 74 0
+	movw	r2, #8322
+	str	r2, [r3, #344]
+	.loc 3 83 0
+	ldr	r2, .L1148+20
+	str	r2, [r3, #304]
+	.loc 3 101 0
 	bl	ftl_malloc
+.LVL1319:
 	ldr	r3, .L1148+24
 	str	r0, [r3]
+	.loc 3 102 0
 	ldr	r3, .L1148+28
 	str	r0, [r3]
+	.loc 3 103 0
 	add	r0, r0, #32768
 	str	r0, [r3, #4]
+	.loc 3 104 0
 	str	r4, [r3, #24]
+	.loc 3 106 0
 	ldr	r3, .L1148+32
 	str	r4, [r3]
-	pop	{r4, pc}
+	pop	{r3, r4, r5, pc}
 .L1149:
 	.align	2
 .L1148:
 	.word	.LANCHOR6
-	.word	.LANCHOR19
-	.word	.LANCHOR153
-	.word	.LANCHOR32
 	.word	.LANCHOR152
-	.word	1710593
-	.word	.LANCHOR154
+	.word	.LANCHOR19
 	.word	.LANCHOR33
+	.word	.LANCHOR151
+	.word	1710593
+	.word	.LANCHOR153
 	.word	.LANCHOR34
+	.word	.LANCHOR35
+	.cfi_endproc
+.LFE267:
 	.size	NandcInit, .-NandcInit
 	.section	.text.FtlMemInit,"ax",%progbits
 	.align	1
@@ -8271,295 +13755,502 @@ NandcInit:
 	.fpu softvfp
 	.type	FtlMemInit, %function
 FtlMemInit:
+.LFB297:
+	.loc 4 355 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+	.loc 4 359 0
 	ldr	r3, .L1155
+	.loc 4 355 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 4 359 0
 	movs	r4, #0
+	.loc 4 377 0
 	ldr	r2, .L1155+4
+	.loc 4 399 0
 	movs	r6, #12
+	.loc 4 359 0
 	strh	r4, [r3]	@ movhi
+	.loc 4 360 0
 	ldr	r3, .L1155+8
+	.loc 4 398 0
 	ldr	r5, .L1155+12
+	.loc 4 400 0
 	ldr	r10, .L1155+296
+	.loc 4 360 0
 	str	r4, [r3]
+	.loc 4 361 0
 	ldr	r3, .L1155+16
+	.loc 4 398 0
 	ldrh	r0, [r5]
+	.loc 4 411 0
 	ldr	r8, .L1155+300
+	.loc 4 361 0
 	str	r4, [r3]
+	.loc 4 362 0
 	ldr	r3, .L1155+20
+	.loc 4 398 0
 	lsls	r0, r0, #1
+	.loc 4 423 0
 	ldr	fp, .L1155+304
+	.loc 4 362 0
 	str	r4, [r3]
+	.loc 4 363 0
 	ldr	r3, .L1155+24
 	str	r4, [r3]
+	.loc 4 364 0
 	ldr	r3, .L1155+28
 	str	r4, [r3]
+	.loc 4 365 0
 	ldr	r3, .L1155+32
 	str	r4, [r3]
+	.loc 4 366 0
 	ldr	r3, .L1155+36
 	str	r4, [r3]
+	.loc 4 367 0
 	ldr	r3, .L1155+40
 	str	r4, [r3]
+	.loc 4 368 0
 	ldr	r3, .L1155+44
 	str	r4, [r3]
+	.loc 4 369 0
 	ldr	r3, .L1155+48
 	str	r4, [r3]
+	.loc 4 370 0
 	ldr	r3, .L1155+52
 	str	r4, [r3]
+	.loc 4 371 0
 	ldr	r3, .L1155+56
 	str	r4, [r3]
+	.loc 4 372 0
 	ldr	r3, .L1155+60
 	str	r4, [r3]
+	.loc 4 373 0
 	ldr	r3, .L1155+64
 	str	r4, [r3]
+	.loc 4 374 0
 	ldr	r3, .L1155+68
 	str	r4, [r3]
+	.loc 4 375 0
 	ldr	r3, .L1155+72
 	str	r4, [r3]
+	.loc 4 376 0
 	ldr	r3, .L1155+76
 	str	r4, [r3]
+	.loc 4 377 0
 	movw	r3, #65535
 	str	r3, [r2]
+	.loc 4 378 0
 	ldr	r2, .L1155+80
 	str	r4, [r2]
+	.loc 4 379 0
 	ldr	r2, .L1155+84
 	str	r4, [r2]
+	.loc 4 380 0
 	ldr	r2, .L1155+88
 	str	r4, [r2]
+	.loc 4 381 0
 	ldr	r2, .L1155+92
 	strh	r3, [r2]	@ movhi
+	.loc 4 382 0
 	ldr	r2, .L1155+96
 	strh	r3, [r2]	@ movhi
+	.loc 4 383 0
 	movs	r2, #32
 	ldr	r3, .L1155+100
 	strh	r2, [r3]	@ movhi
+	.loc 4 384 0
 	movs	r2, #128
 	ldr	r3, .L1155+104
 	strh	r2, [r3]	@ movhi
+	.loc 4 385 0
 	ldr	r3, .L1155+108
 	strh	r4, [r3]	@ movhi
+	.loc 4 386 0
 	ldr	r3, .L1155+112
 	strh	r4, [r3]	@ movhi
+	.loc 4 387 0
 	ldr	r3, .L1155+116
 	strh	r4, [r3]	@ movhi
+	.loc 4 388 0
 	ldr	r3, .L1155+120
 	strh	r4, [r3]	@ movhi
+	.loc 4 398 0
 	bl	ftl_malloc
+.LVL1320:
 	ldr	r3, .L1155+124
 	str	r0, [r3]
+	.loc 4 399 0
 	ldrh	r0, [r5]
+	.loc 4 400 0
 	movs	r5, #36
+	.loc 4 399 0
 	muls	r0, r6, r0
 	bl	ftl_malloc
+.LVL1321:
 	ldr	r3, .L1155+128
 	str	r0, [r3]
+	.loc 4 400 0
 	ldrh	r3, [r10]
 	muls	r5, r3, r5
+.LVL1322:
+	.loc 4 401 0
 	lsls	r7, r5, #2
 	mov	r0, r7
 	bl	ftl_malloc
+.LVL1323:
 	ldr	r3, .L1155+132
 	str	r0, [r3]
+	.loc 4 402 0
 	mov	r0, r5
 	bl	ftl_malloc
+.LVL1324:
 	ldr	r3, .L1155+136
 	str	r0, [r3]
+	.loc 4 403 0
 	mov	r0, r7
 	bl	ftl_malloc
+.LVL1325:
 	ldr	r3, .L1155+140
+	.loc 4 410 0
 	ldr	r7, .L1155+144
+	.loc 4 403 0
 	str	r0, [r3]
+	.loc 4 404 0
 	mov	r0, r5
 	bl	ftl_malloc
+.LVL1326:
 	ldr	r3, .L1155+148
 	str	r0, [r3]
+	.loc 4 405 0
 	mov	r0, r5
 	bl	ftl_malloc
+.LVL1327:
 	ldr	r3, .L1155+152
+	.loc 4 410 0
 	ldrh	r5, [r7]
+.LVL1328:
+	.loc 4 405 0
 	str	r0, [r3]
+	.loc 4 411 0
 	ldrh	r3, [r10]
+	.loc 4 412 0
 	mov	r0, r5
+	.loc 4 411 0
 	lsls	r3, r3, #1
 	adds	r3, r3, #1
 	str	r3, [r8]
+	.loc 4 412 0
 	bl	ftl_malloc
+.LVL1329:
 	ldr	r3, .L1155+156
 	str	r0, [r3]
+	.loc 4 413 0
 	mov	r0, r5
 	bl	ftl_malloc
+.LVL1330:
 	ldr	r3, .L1155+160
 	str	r0, [r3]
+	.loc 4 414 0
 	mov	r0, r5
 	bl	ftl_malloc
+.LVL1331:
 	ldr	r3, .L1155+164
 	str	r0, [r3]
+	.loc 4 415 0
 	ldr	r0, [r8]
 	muls	r0, r5, r0
 	bl	ftl_malloc
+.LVL1332:
 	ldr	r3, .L1155+168
 	str	r0, [r3]
+	.loc 4 419 0
 	mov	r0, r5
 	bl	ftl_malloc
+.LVL1333:
 	ldr	r3, .L1155+172
 	str	r0, [r3]
+	.loc 4 420 0
 	mov	r0, r5
 	bl	ftl_malloc
+.LVL1334:
 	ldr	r3, .L1155+176
 	str	r0, [r3]
+	.loc 4 421 0
 	ldr	r0, [r8]
 	muls	r0, r6, r0
 	bl	ftl_malloc
+.LVL1335:
 	ldr	r3, .L1155+180
+	.loc 4 423 0
 	ldrh	r5, [r10]
+.LVL1336:
+	.loc 4 447 0
 	ldr	r10, .L1155+308
+	.loc 4 421 0
 	str	r0, [r3]
+	.loc 4 423 0
 	ldrh	r3, [fp]
 	muls	r5, r3, r5
+.LVL1337:
+	.loc 4 424 0
 	mov	r0, r5
 	bl	ftl_malloc
+.LVL1338:
 	ldr	r3, .L1155+184
 	str	r0, [r3]
+	.loc 4 425 0
 	lsls	r0, r5, #2
+	.loc 4 432 0
 	ldr	r5, .L1155+188
+.LVL1339:
+	.loc 4 425 0
 	bl	ftl_malloc
+.LVL1340:
 	ldr	r3, .L1155+192
 	str	r0, [r3]
+	.loc 4 426 0
 	ldrh	r3, [fp]
 	ldr	r0, [r8]
+	.loc 4 432 0
 	ldr	r8, .L1155+312
+	.loc 4 426 0
 	muls	r0, r3, r0
 	bl	ftl_malloc
+.LVL1341:
 	ldr	r3, .L1155+196
 	str	r0, [r3]
+	.loc 4 432 0
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	uxth	r0, r0
 	strh	r0, [r8]	@ movhi
+	.loc 4 433 0
 	bl	ftl_malloc
+.LVL1342:
 	ldr	r3, .L1155+200
 	str	r0, [r3]
+	.loc 4 434 0
 	ldrh	r3, [r8]
+	.loc 4 435 0
 	ldr	r0, .L1155+204
+	.loc 4 434 0
 	addw	r3, r3, #547
 	lsrs	r3, r3, #9
+	.loc 4 435 0
 	and	r0, r0, r3, lsl #9
+	.loc 4 434 0
 	strh	r3, [r8]	@ movhi
+	.loc 4 435 0
 	bl	ftl_malloc
+.LVL1343:
 	ldr	r3, .L1155+208
 	str	r0, [r3]
+	.loc 4 436 0
 	adds	r0, r0, #32
 	ldr	r3, .L1155+212
 	str	r0, [r3]
+.LVL1344:
+	.loc 4 442 0
 	ldrh	r0, [r5]
+	.loc 4 446 0
 	lsls	r0, r0, #1
+.LVL1345:
 	bl	ftl_malloc
+.LVL1346:
 	ldr	r3, .L1155+216
 	str	r0, [r3]
+.LVL1347:
+	.loc 4 447 0
 	ldr	r3, [r10]
 	lsl	r8, r3, #1
+.LVL1348:
+	.loc 4 448 0
 	mov	r0, r8
 	bl	ftl_malloc
+.LVL1349:
 	ldr	r3, .L1155+220
 	str	r0, [r3]
+	.loc 4 449 0
 	mov	r0, r8
 	bl	ftl_malloc
+.LVL1350:
 	ldr	r3, .L1155+224
+	.loc 4 451 0
 	ldr	r8, .L1155+316
+.LVL1351:
+	.loc 4 449 0
 	str	r0, [r3]
+	.loc 4 450 0
 	ldrh	r0, [r5]
 	lsrs	r0, r0, #3
 	adds	r0, r0, #4
 	bl	ftl_malloc
+.LVL1352:
 	ldr	r3, .L1155+228
 	str	r0, [r3]
+	.loc 4 451 0
 	ldrh	r0, [r8]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
+.LVL1353:
 	ldr	r3, .L1155+232
 	str	r0, [r3]
+	.loc 4 452 0
 	ldrh	r0, [r8]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
+.LVL1354:
 	ldr	r3, .L1155+236
 	str	r0, [r3]
+	.loc 4 453 0
 	ldrh	r0, [r8]
+	.loc 4 454 0
 	ldr	r8, .L1155+320
+	.loc 4 453 0
 	lsls	r0, r0, #2
 	bl	ftl_malloc
+.LVL1355:
 	ldr	r3, .L1155+240
 	str	r0, [r3]
+	.loc 4 454 0
 	ldrh	r0, [r8]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
+.LVL1356:
+	.loc 4 455 0
 	ldrh	r2, [r8]
 	mov	r1, r4
+	.loc 4 454 0
 	ldr	r3, .L1155+244
+	.loc 4 455 0
 	lsls	r2, r2, #2
+	.loc 4 454 0
 	str	r0, [r3]
+	.loc 4 455 0
 	bl	ftl_memset
+.LVL1357:
+	.loc 4 457 0
 	ldr	r3, .L1155+248
 	ldrh	r4, [r3]
 	lsls	r4, r4, #2
+.LVL1358:
+	.loc 4 458 0
 	mov	r0, r4
 	bl	ftl_malloc
+.LVL1359:
 	ldr	r3, .L1155+252
 	str	r0, [r3]
+	.loc 4 459 0
 	mov	r0, r4
 	bl	ftl_malloc
+.LVL1360:
 	ldr	r3, .L1155+256
+	.loc 4 462 0
 	ldr	r4, .L1155+260
+.LVL1361:
+	.loc 4 459 0
 	str	r0, [r3]
+.LVL1362:
+	.loc 4 460 0
 	ldr	r0, [r10]
+	.loc 4 461 0
 	lsls	r0, r0, #2
+.LVL1363:
 	bl	ftl_malloc
+.LVL1364:
 	ldr	r3, .L1155+264
 	str	r0, [r3]
+.LVL1365:
+	.loc 4 462 0
 	ldrh	r0, [r4]
+	.loc 4 463 0
 	muls	r0, r6, r0
+.LVL1366:
+	.loc 4 469 0
 	ldr	r6, .L1155+268
+	.loc 4 463 0
 	bl	ftl_malloc
+.LVL1367:
 	ldr	r3, .L1155+272
 	str	r0, [r3]
+.LVL1368:
+	.loc 4 464 0
 	ldrh	r3, [r4]
 	ldrh	r0, [r7]
+	.loc 4 465 0
 	muls	r0, r3, r0
+.LVL1369:
 	bl	ftl_malloc
+.LVL1370:
 	ldr	r3, .L1155+276
 	str	r0, [r3]
+.LVL1371:
+	.loc 4 467 0
 	movs	r0, #6
+	.loc 4 466 0
 	ldrh	r3, [r5]
+	.loc 4 468 0
 	ldr	r5, .L1155+280
+	.loc 4 467 0
 	muls	r0, r3, r0
+.LVL1372:
 	bl	ftl_malloc
+.LVL1373:
 	ldr	r3, .L1155+284
 	str	r0, [r3]
+	.loc 4 468 0
 	ldr	r3, .L1155+288
 	ldrh	r0, [r3]
+	.loc 4 469 0
 	ldrh	r3, [r6]
+	.loc 4 468 0
 	adds	r0, r0, #31
 	asrs	r0, r0, #5
 	strh	r0, [r5]	@ movhi
+.LVL1374:
+	.loc 4 469 0
 	muls	r0, r3, r0
+.LVL1375:
+	.loc 4 470 0
 	lsls	r0, r0, #2
+.LVL1376:
 	bl	ftl_malloc
+.LVL1377:
+	.loc 4 473 0
 	ldrh	r1, [r5]
+	.loc 4 471 0
 	movs	r2, #1
+	.loc 4 470 0
 	ldr	r3, .L1155+292
+	.loc 4 471 0
 	ldrh	r6, [r6]
 	lsls	r1, r1, #2
+	.loc 4 470 0
 	mov	r4, r3
 	str	r0, [r4, #28]!
+.LVL1378:
+	.loc 4 471 0
 	mov	r0, r1
 	b	.L1156
 .L1157:
 	.align	2
 .L1155:
-	.word	.LANCHOR137
-	.word	.LANCHOR171
+	.word	.LANCHOR136
+	.word	.LANCHOR170
+	.word	.LANCHOR154
+	.word	.LANCHOR54
 	.word	.LANCHOR155
-	.word	.LANCHOR53
 	.word	.LANCHOR156
 	.word	.LANCHOR157
 	.word	.LANCHOR158
@@ -8570,32 +14261,31 @@ FtlMemInit:
 	.word	.LANCHOR163
 	.word	.LANCHOR164
 	.word	.LANCHOR165
+	.word	.LANCHOR79
 	.word	.LANCHOR166
-	.word	.LANCHOR78
 	.word	.LANCHOR167
 	.word	.LANCHOR168
 	.word	.LANCHOR169
-	.word	.LANCHOR170
+	.word	.LANCHOR171
 	.word	.LANCHOR172
-	.word	.LANCHOR173
-	.word	.LANCHOR72
+	.word	.LANCHOR73
 	.word	.LANCHOR112
 	.word	.LANCHOR113
+	.word	.LANCHOR173
 	.word	.LANCHOR174
 	.word	.LANCHOR175
-	.word	.LANCHOR176
 	.word	.LANCHOR114
-	.word	.LANCHOR177
+	.word	.LANCHOR176
 	.word	.LANCHOR116
 	.word	.LANCHOR108
-	.word	.LANCHOR111
+	.word	.LANCHOR110
+	.word	.LANCHOR177
 	.word	.LANCHOR178
 	.word	.LANCHOR179
-	.word	.LANCHOR180
-	.word	.LANCHOR56
-	.word	.LANCHOR76
+	.word	.LANCHOR57
+	.word	.LANCHOR77
 	.word	.LANCHOR106
-	.word	.LANCHOR79
+	.word	.LANCHOR180
 	.word	.LANCHOR181
 	.word	.LANCHOR182
 	.word	.LANCHOR104
@@ -8603,67 +14293,82 @@ FtlMemInit:
 	.word	.LANCHOR184
 	.word	.LANCHOR103
 	.word	.LANCHOR185
-	.word	.LANCHOR39
+	.word	.LANCHOR40
 	.word	.LANCHOR186
 	.word	.LANCHOR105
 	.word	.LANCHOR134
 	.word	33553920
 	.word	.LANCHOR188
-	.word	.LANCHOR77
-	.word	.LANCHOR82
+	.word	.LANCHOR78
+	.word	.LANCHOR83
 	.word	.LANCHOR126
 	.word	.LANCHOR122
 	.word	.LANCHOR0
-	.word	.LANCHOR70
+	.word	.LANCHOR71
 	.word	.LANCHOR189
 	.word	.LANCHOR190
 	.word	.LANCHOR191
-	.word	.LANCHOR65
+	.word	.LANCHOR66
 	.word	.LANCHOR128
 	.word	.LANCHOR192
-	.word	.LANCHOR66
+	.word	.LANCHOR67
 	.word	.LANCHOR127
-	.word	.LANCHOR43
-	.word	.LANCHOR95
+	.word	.LANCHOR44
+	.word	.LANCHOR96
 	.word	.LANCHOR123
 	.word	.LANCHOR120
-	.word	.LANCHOR80
-	.word	.LANCHOR49
-	.word	.LANCHOR73
-	.word	.LANCHOR36
+	.word	.LANCHOR81
+	.word	.LANCHOR50
+	.word	.LANCHOR74
+	.word	.LANCHOR37
 	.word	.LANCHOR107
-	.word	.LANCHOR57
-	.word	.LANCHOR63
+	.word	.LANCHOR58
+	.word	.LANCHOR64
 	.word	.LANCHOR187
-	.word	.LANCHOR60
 	.word	.LANCHOR61
+	.word	.LANCHOR62
 .L1156:
+.LVL1379:
 .L1151:
+	.loc 4 471 0 is_stmt 0 discriminator 1
 	cmp	r2, r6
 	bcc	.L1152
 	add	r3, r3, r2, lsl #2
 	ldr	r2, .L1158
+.LVL1380:
+	.loc 4 478 0 is_stmt 1
 	movs	r1, #0
 	adds	r3, r3, #24
 .L1153:
+	.loc 4 476 0 discriminator 1
 	cmp	r3, r2
 	bne	.L1154
+	.loc 4 605 0
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1381:
 .L1152:
+	.loc 4 473 0 discriminator 3
 	ldr	r5, [r3, #28]
+	.loc 4 471 0 discriminator 3
 	adds	r2, r2, #1
+.LVL1382:
+	.loc 4 473 0 discriminator 3
 	add	r5, r5, r0
 	add	r0, r0, r1
 	str	r5, [r4, #4]!
 	b	.L1151
+.LVL1383:
 .L1154:
+	.loc 4 478 0 discriminator 2
 	str	r1, [r3, #4]!
 	b	.L1153
 .L1159:
 	.align	2
 .L1158:
-	.word	.LANCHOR73+56
+	.word	.LANCHOR74+56
+	.cfi_endproc
+.LFE297:
 	.size	FtlMemInit, .-FtlMemInit
 	.section	.text.ftl_free,"ax",%progbits
 	.align	1
@@ -8674,10 +14379,23 @@ FtlMemInit:
 	.fpu softvfp
 	.type	ftl_free, %function
 ftl_free:
+.LFB486:
+	.loc 7 62 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL1384:
+.LBB351:
+.LBB352:
+	.file 8 "include/linux/compat.h"
+	.loc 8 80 0
 	b	free
+.LVL1385:
+.LBE352:
+.LBE351:
+	.cfi_endproc
+.LFE486:
 	.size	ftl_free, .-ftl_free
 	.section	.text.StorageSysDataLoad,"ax",%progbits
 	.align	1
@@ -8688,21 +14406,47 @@ ftl_free:
 	.fpu softvfp
 	.type	StorageSysDataLoad, %function
 StorageSysDataLoad:
+.LFB487:
+	.loc 7 67 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1386:
 	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 7 67 0
 	mov	r4, r1
 	mov	r5, r0
+	.loc 7 70 0
 	mov	r2, #512
 	movs	r1, #0
+.LVL1387:
 	mov	r0, r4
+.LVL1388:
 	bl	memset
+.LVL1389:
+	.loc 7 71 0
 	mov	r3, r4
 	add	r1, r5, #256
 	movs	r2, #1
 	movs	r0, #16
+	.loc 7 73 0
 	pop	{r4, r5, r6, lr}
+	.cfi_restore 14
+	.cfi_restore 6
+	.cfi_restore 5
+	.cfi_restore 4
+	.cfi_def_cfa_offset 0
+.LVL1390:
+	.loc 7 71 0
 	b	FtlRead
+.LVL1391:
+	.cfi_endproc
+.LFE487:
 	.size	StorageSysDataLoad, .-StorageSysDataLoad
 	.section	.text.StorageSysDataStore,"ax",%progbits
 	.align	1
@@ -8713,15 +14457,83 @@ StorageSysDataLoad:
 	.fpu softvfp
 	.type	StorageSysDataStore, %function
 StorageSysDataStore:
+.LFB488:
+	.loc 7 76 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL1392:
+	.loc 7 79 0
 	mov	r3, r1
 	movs	r2, #1
 	add	r1, r0, #256
+.LVL1393:
 	movs	r0, #16
+.LVL1394:
 	b	FtlWrite
+.LVL1395:
+	.cfi_endproc
+.LFE488:
 	.size	StorageSysDataStore, .-StorageSysDataStore
+	.section	.text.FlashBootVendorRead,"ax",%progbits
+	.align	1
+	.global	FlashBootVendorRead
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashBootVendorRead, %function
+FlashBootVendorRead:
+.LFB489:
+	.loc 7 84 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL1396:
+	.loc 7 87 0
+	mov	r3, r2
+	mov	r1, r0
+.LVL1397:
+	movs	r2, #1
+.LVL1398:
+	movs	r0, #16
+.LVL1399:
+	b	FtlRead
+.LVL1400:
+	.cfi_endproc
+.LFE489:
+	.size	FlashBootVendorRead, .-FlashBootVendorRead
+	.section	.text.FlashBootVendorWrite,"ax",%progbits
+	.align	1
+	.global	FlashBootVendorWrite
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashBootVendorWrite, %function
+FlashBootVendorWrite:
+.LFB490:
+	.loc 7 92 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL1401:
+	.loc 7 95 0
+	mov	r3, r2
+	mov	r1, r0
+.LVL1402:
+	movs	r2, #1
+.LVL1403:
+	movs	r0, #16
+.LVL1404:
+	b	FtlWrite
+.LVL1405:
+	.cfi_endproc
+.LFE490:
+	.size	FlashBootVendorWrite, .-FlashBootVendorWrite
 	.section	.text.FlashCs123Init,"ax",%progbits
 	.align	1
 	.global	FlashCs123Init
@@ -8731,10 +14543,15 @@ StorageSysDataStore:
 	.fpu softvfp
 	.type	FlashCs123Init, %function
 FlashCs123Init:
+.LFB491:
+	.loc 7 101 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	bx	lr
+	.cfi_endproc
+.LFE491:
 	.size	FlashCs123Init, .-FlashCs123Init
 	.section	.text.rk_nand_de_init,"ax",%progbits
 	.align	1
@@ -8745,10 +14562,17 @@ FlashCs123Init:
 	.fpu softvfp
 	.type	rk_nand_de_init, %function
 rk_nand_de_init:
+.LFB493:
+	.loc 7 116 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+	.loc 7 117 0
 	b	FlashDeInit
+.LVL1406:
+	.cfi_endproc
+.LFE493:
 	.size	rk_nand_de_init, .-rk_nand_de_init
 	.section	.text.rk_ftl_get_capacity,"ax",%progbits
 	.align	1
@@ -8759,16 +14583,22 @@ rk_nand_de_init:
 	.fpu softvfp
 	.type	rk_ftl_get_capacity, %function
 rk_ftl_get_capacity:
+.LFB495:
+	.loc 7 128 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L1166
+	.loc 7 130 0
+	ldr	r3, .L1168
 	ldr	r0, [r3]
 	bx	lr
-.L1167:
+.L1169:
 	.align	2
-.L1166:
-	.word	.LANCHOR67
+.L1168:
+	.word	.LANCHOR68
+	.cfi_endproc
+.LFE495:
 	.size	rk_ftl_get_capacity, .-rk_ftl_get_capacity
 	.section	.text.rknand_print_hex,"ax",%progbits
 	.align	1
@@ -8779,59 +14609,116 @@ rk_ftl_get_capacity:
 	.fpu softvfp
 	.type	rknand_print_hex, %function
 rknand_print_hex:
+.LFB496:
+	.loc 7 133 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1407:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 7 141 0
 	movs	r5, #0
-	ldr	r7, .L1177
+	.loc 7 154 0
+	ldr	r7, .L1179
+	.loc 7 133 0
 	mov	fp, r0
 	mov	r6, r1
 	mov	r8, r2
 	mov	r10, r3
+	.loc 7 142 0
 	mov	r4, r5
-.L1169:
+.LVL1408:
+.L1171:
+	.loc 7 142 0 is_stmt 0 discriminator 1
 	cmp	r4, r10
-	bne	.L1175
-	ldr	r1, .L1177+4
-	ldr	r0, .L1177+8
+	bne	.L1177
+	.loc 7 162 0 is_stmt 1
+	ldr	r1, .L1179+4
+	ldr	r0, .L1179+8
+	.loc 7 164 0
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_remember_state
+	.cfi_restore 14
+	.cfi_restore 11
+	.cfi_restore 10
+	.cfi_restore 8
+	.cfi_restore 7
+	.cfi_restore 6
+	.cfi_restore 5
+	.cfi_restore 4
+	.cfi_def_cfa_offset 0
+.LVL1409:
+	.loc 7 162 0
 	b	printf
-.L1175:
-	cbnz	r5, .L1170
+.LVL1410:
+.L1177:
+	.cfi_restore_state
+	.loc 7 144 0
+	cbnz	r5, .L1172
+	.loc 7 146 0
 	mov	r2, r4
 	mov	r1, fp
-	ldr	r0, .L1177+12
+	ldr	r0, .L1179+12
 	bl	printf
-.L1170:
+.LVL1411:
+.L1172:
+	.loc 7 149 0
 	cmp	r8, #4
-	bne	.L1171
+	bne	.L1173
+	.loc 7 150 0
 	ldr	r1, [r6, r4, lsl #2]
-.L1176:
+.L1178:
+	.loc 7 154 0
 	mov	r0, r7
+	.loc 7 156 0
 	adds	r5, r5, #1
+.LVL1412:
+	.loc 7 154 0
 	bl	printf
+.LVL1413:
+	.loc 7 156 0
 	cmp	r5, #15
-	bls	.L1174
+	bls	.L1176
+.LVL1414:
+	.loc 7 158 0
 	movs	r5, #0
-	ldr	r1, .L1177+4
-	ldr	r0, .L1177+8
+	.loc 7 159 0
+	ldr	r1, .L1179+4
+	ldr	r0, .L1179+8
 	bl	printf
-.L1174:
+.LVL1415:
+.L1176:
+	.loc 7 142 0 discriminator 2
 	adds	r4, r4, #1
-	b	.L1169
-.L1171:
+.LVL1416:
+	b	.L1171
+.L1173:
+	.loc 7 151 0
 	cmp	r8, #2
+	.loc 7 152 0
 	ite	eq
 	ldrsheq	r1, [r6, r4, lsl #1]
+	.loc 7 154 0
 	ldrbne	r1, [r6, r4]	@ zero_extendqisi2
-	b	.L1176
-.L1178:
+	b	.L1178
+.L1180:
 	.align	2
-.L1177:
-	.word	.LC14
-	.word	.LC15
-	.word	.LC6
-	.word	.LC13
+.L1179:
+	.word	.LC17
+	.word	.LC18
+	.word	.LC8
+	.word	.LC16
+	.cfi_endproc
+.LFE496:
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.HynixGetReadRetryDefault,"ax",%progbits
 	.align	1
@@ -8842,355 +14729,642 @@ rknand_print_hex:
 	.fpu softvfp
 	.type	HynixGetReadRetryDefault, %function
 HynixGetReadRetryDefault:
-	@ args = 0, pretend = 0, frame = 56
+.LFB236:
+	.loc 2 1362 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 64
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1417:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 1377 0
 	movs	r3, #172
+	.loc 2 1375 0
 	ldr	r5, .L1278
+	.loc 2 1379 0
 	cmp	r0, #2
+	.loc 2 1377 0
 	mov	r1, #173
 	mov	r2, #174
-	sub	sp, sp, #56
+	.loc 2 1362 0
+	sub	sp, sp, #64
+	.cfi_def_cfa_offset 96
+	.loc 2 1362 0
 	mov	r4, r0
+	.loc 2 1377 0
 	strb	r3, [r5, #4]
 	mov	r3, #175
+	.loc 2 1375 0
 	strb	r0, [r5]
+.LVL1418:
+	.loc 2 1377 0
 	strb	r1, [r5, #5]
+.LVL1419:
 	strb	r2, [r5, #6]
+.LVL1420:
 	strb	r3, [r5, #7]
-	bne	.L1180
+.LVL1421:
+	.loc 2 1379 0
+	bne	.L1182
+	.loc 2 1380 0
 	movs	r3, #167
+	.loc 2 1381 0
 	movs	r2, #247
+	.loc 2 1380 0
 	strb	r3, [r5, #4]
+	.loc 2 1381 0
 	ldr	r3, .L1278+4
 	strb	r2, [r3, #17]
-.L1236:
+.L1238:
+	.loc 2 1368 0
 	mov	r10, #7
-	b	.L1272
-.L1180:
+	b	.L1273
+.L1182:
+	.loc 2 1382 0
 	cmp	r0, #3
-	bne	.L1182
+	bne	.L1184
+.LVL1422:
+	.loc 2 1388 0 discriminator 1
 	movs	r3, #176
 	strb	r3, [r5, #4]
+.LVL1423:
 	movs	r3, #177
 	strb	r3, [r5, #5]
+.LVL1424:
 	movs	r3, #178
 	strb	r3, [r5, #6]
+.LVL1425:
 	movs	r3, #179
 	strb	r3, [r5, #7]
+.LVL1426:
 	movs	r3, #180
 	strb	r3, [r5, #8]
+.LVL1427:
 	movs	r3, #181
 	strb	r3, [r5, #9]
+.LVL1428:
 	movs	r3, #182
 	strb	r3, [r5, #10]
+.LVL1429:
 	movs	r3, #183
-.L1273:
+.LVL1430:
+.L1274:
+	.loc 2 1392 0
 	mov	r10, #8
+	.loc 2 1400 0
 	strb	r3, [r5, #11]
+	.loc 2 1391 0
 	mov	fp, r10
-.L1181:
+.L1183:
+.LVL1431:
+	.loc 2 1426 0
 	subs	r3, r4, #1
 	cmp	r3, #1
-	bhi	.L1186
+	bhi	.L1188
 	mov	r8, #0
-.L1187:
+.LVL1432:
+.L1189:
+	.loc 2 1427 0 discriminator 1
 	ldr	r3, .L1278+8
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	uxtb	r3, r8
 	cmp	r2, r3
-	bhi	.L1193
-.L1194:
+	bhi	.L1195
+.LVL1433:
+.L1196:
+	.loc 2 1600 0
 	ldr	r3, .L1278
 	strb	fp, [r3, #1]
+	.loc 2 1601 0
 	strb	r10, [r3, #2]
-	add	sp, sp, #56
+	.loc 2 1602 0
+	add	sp, sp, #64
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1182:
+.LVL1434:
+.L1184:
+	.cfi_restore_state
+	.loc 2 1389 0
 	cmp	r0, #4
-	bne	.L1183
+	bne	.L1185
+.LVL1435:
+	.loc 2 1393 0
 	movs	r0, #204
+.LVL1436:
+	.loc 2 1398 0
 	strb	r1, [r5, #9]
+	.loc 2 1393 0
 	strb	r0, [r5, #4]
+	.loc 2 1394 0
 	movs	r0, #191
 	strb	r0, [r5, #5]
+	.loc 2 1395 0
 	movs	r0, #170
 	strb	r0, [r5, #6]
+	.loc 2 1396 0
 	movs	r0, #171
 	strb	r0, [r5, #7]
+	.loc 2 1397 0
 	movs	r0, #205
 	strb	r0, [r5, #8]
+	.loc 2 1399 0
 	strb	r2, [r5, #10]
-	b	.L1273
-.L1183:
+	b	.L1274
+.LVL1437:
+.L1185:
+	.loc 2 1401 0
 	cmp	r0, #5
-	bne	.L1184
+	bne	.L1186
+.LVL1438:
+	.loc 2 1405 0
 	movs	r3, #56
+	.loc 2 1404 0
 	mov	r10, #8
+	.loc 2 1405 0
 	strb	r3, [r5, #4]
+	.loc 2 1406 0
 	movs	r3, #57
 	strb	r3, [r5, #5]
+	.loc 2 1407 0
 	movs	r3, #58
 	strb	r3, [r5, #6]
+	.loc 2 1408 0
 	movs	r3, #59
 	strb	r3, [r5, #7]
-.L1272:
+.LVL1439:
+.L1273:
+	.loc 2 1367 0
 	mov	fp, #4
-	b	.L1181
-.L1184:
+	b	.L1183
+.LVL1440:
+.L1186:
+	.loc 2 1409 0
 	cmp	r0, #6
-	bne	.L1185
+	bne	.L1187
+.LVL1441:
+	.loc 2 1413 0
 	movs	r3, #14
+	.loc 2 1412 0
 	mov	r10, #12
+	.loc 2 1413 0
 	strb	r3, [r5, #4]
+	.loc 2 1414 0
 	movs	r3, #15
 	strb	r3, [r5, #5]
+	.loc 2 1415 0
 	movs	r3, #16
 	strb	r3, [r5, #6]
+	.loc 2 1416 0
 	movs	r3, #17
 	strb	r3, [r5, #7]
-	b	.L1272
-.L1185:
+	b	.L1273
+.LVL1442:
+.L1187:
+	.loc 2 1417 0
 	cmp	r0, #7
-	bne	.L1236
+	bne	.L1238
+.LVL1443:
+	.loc 2 1421 0 discriminator 1
 	movs	r3, #176
+	.loc 2 1419 0 discriminator 1
 	mov	r10, #12
+	.loc 2 1421 0 discriminator 1
 	strb	r3, [r5, #4]
+.LVL1444:
 	movs	r3, #177
 	strb	r3, [r5, #5]
+.LVL1445:
 	movs	r3, #178
 	strb	r3, [r5, #6]
+.LVL1446:
 	movs	r3, #179
 	strb	r3, [r5, #7]
+.LVL1447:
 	movs	r3, #180
 	strb	r3, [r5, #8]
+.LVL1448:
 	movs	r3, #181
 	strb	r3, [r5, #9]
+.LVL1449:
 	movs	r3, #182
 	strb	r3, [r5, #10]
+.LVL1450:
 	movs	r3, #183
 	strb	r3, [r5, #11]
+.LVL1451:
+	.loc 2 1422 0 discriminator 1
 	movs	r3, #212
 	strb	r3, [r5, #12]
+	.loc 2 1423 0 discriminator 1
 	movs	r3, #213
 	strb	r3, [r5, #13]
+	.loc 2 1418 0 discriminator 1
 	mov	fp, #10
-	b	.L1181
-.L1193:
+	b	.L1183
+.LVL1452:
+.L1195:
+.LBB353:
+	.loc 2 1429 0
 	ldr	r2, .L1278+12
+.LBB354:
+.LBB355:
+	.loc 3 126 0
 	movs	r6, #0
+.LBE355:
+.LBE354:
+	.loc 2 1429 0
 	ldrb	r2, [r2, r3]	@ zero_extendqisi2
+.LVL1453:
+.LBB359:
+.LBB356:
+	.loc 3 123 0
 	ldr	r3, .L1278+16
 	ldr	r7, [r3, r2, lsl #3]
+.LBE356:
+.LBE359:
+	.loc 2 1430 0
 	add	r4, r5, r2, lsl #6
+.LBB360:
+.LBB357:
+	.loc 3 124 0
 	add	r3, r3, r2, lsl #3
+.LBE357:
+.LBE360:
+	.loc 2 1434 0
 	movs	r2, #55
+.LVL1454:
+	.loc 2 1430 0
 	adds	r4, r4, #20
+.LVL1455:
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+.LVL1456:
+	.loc 2 1434 0
 	add	r7, r7, r3, lsl #8
 	addw	r3, r7, #2056
-.L1188:
+.LVL1457:
+.L1190:
+	.loc 2 1435 0 discriminator 3
 	adds	r1, r5, r6
+	.loc 2 1434 0 discriminator 3
 	str	r2, [r3]
+	.loc 2 1435 0 discriminator 3
 	ldrb	r1, [r1, #4]	@ zero_extendqisi2
+.LBB361:
+.LBB362:
+	.loc 3 306 0 discriminator 3
 	movs	r0, #80
-	str	r2, [sp, #8]
-	str	r3, [sp, #4]
+.LBE362:
+.LBE361:
+	.loc 2 1434 0 discriminator 3
+	str	r2, [sp, #4]
+	str	r3, [sp]
+	.loc 2 1435 0 discriminator 3
 	str	r1, [r7, #2052]
+.LVL1458:
+.LBB364:
+.LBB363:
+	.loc 3 306 0 discriminator 3
 	bl	udelay
+.LVL1459:
+.LBE363:
+.LBE364:
+	.loc 2 1437 0 discriminator 3
 	ldr	r1, [r7, #2048]
-	ldr	r3, [sp, #4]
-	ldr	r2, [sp, #8]
+	.loc 2 1433 0 discriminator 3
+	ldr	r3, [sp]
+	ldr	r2, [sp, #4]
+	.loc 2 1437 0 discriminator 3
 	strb	r1, [r4, r6]
+.LVL1460:
 	adds	r6, r6, #1
+.LVL1461:
+	.loc 2 1433 0 discriminator 3
 	uxtb	r1, r6
 	cmp	fp, r1
-	bhi	.L1188
+	bhi	.L1190
+	.loc 2 1442 0
 	ldr	r7, .L1278+4
 	mov	r1, r4
+	.loc 2 1433 0
 	movs	r2, #0
-.L1191:
+.L1193:
+.LVL1462:
+.LBB365:
+.LBB358:
+	.loc 3 126 0
 	movs	r3, #1
+.LBE358:
+.LBE365:
+	.loc 2 1442 0
 	adds	r6, r7, r2
-.L1190:
+.LVL1463:
+.L1192:
+	.loc 2 1442 0 is_stmt 0 discriminator 3
 	ldrb	r0, [r6, r3, lsl #2]	@ zero_extendqisi2
 	ldrb	ip, [r1]	@ zero_extendqisi2
 	add	r0, r0, ip
 	strb	r0, [r1, r3, lsl #3]
+	.loc 2 1441 0 is_stmt 1 discriminator 3
 	adds	r3, r3, #1
+.LVL1464:
 	cmp	r3, #7
-	bne	.L1190
+	bne	.L1192
+.LVL1465:
 	adds	r2, r2, #1
+.LVL1466:
 	adds	r1, r1, #1
+	.loc 2 1440 0 discriminator 2
 	cmp	r2, #4
-	bne	.L1191
+	bne	.L1193
+	.loc 2 1445 0 discriminator 2
 	movs	r3, #0
+.LVL1467:
 	add	r8, r8, #1
+.LVL1468:
 	strb	r3, [r4, #16]
+	.loc 2 1446 0 discriminator 2
 	strb	r3, [r4, #24]
+	.loc 2 1447 0 discriminator 2
 	strb	r3, [r4, #32]
+	.loc 2 1448 0 discriminator 2
 	strb	r3, [r4, #40]
+	.loc 2 1449 0 discriminator 2
 	strb	r3, [r4, #48]
+	.loc 2 1451 0 discriminator 2
 	strb	r3, [r4, #41]
+	.loc 2 1452 0 discriminator 2
 	strb	r3, [r4, #49]
-	b	.L1187
-.L1186:
+	b	.L1189
+.LVL1469:
+.L1188:
+.LBE353:
+	.loc 2 1454 0
 	subs	r3, r4, #3
 	cmp	r3, #4
-	bhi	.L1194
+	bhi	.L1196
+.LBB366:
+.LBB367:
+	.loc 2 1534 0 discriminator 1
 	smulbb	r3, r10, fp
+	.loc 2 1506 0 discriminator 1
+	ldr	r8, .L1278+24
+	.loc 2 1534 0 discriminator 1
 	asrs	r2, r3, #2
+	.loc 2 1536 0 discriminator 1
 	lsls	r3, r3, #4
-	str	r3, [sp, #52]
+	str	r3, [sp, #56]
 	lsls	r3, r2, #3
-	str	r2, [sp, #12]
+	.loc 2 1534 0 discriminator 1
+	str	r2, [sp, #8]
 	str	r3, [sp, #48]
 	lsls	r3, r2, #2
-	str	r3, [sp, #32]
+	str	r3, [sp, #24]
+	.loc 2 1536 0 discriminator 1
 	movs	r3, #0
-.L1277:
-	str	r3, [sp, #28]
-	ldrb	r3, [sp, #28]	@ zero_extendqisi2
-	str	r3, [sp, #16]
+	str	r3, [sp, #20]
+.L1197:
+	ldrb	r3, [sp, #20]	@ zero_extendqisi2
+	str	r3, [sp, #12]
+.LVL1470:
+.LBE367:
+	.loc 2 1457 0 discriminator 1
 	ldr	r3, .L1278+8
-	ldr	r2, [sp, #16]
+	ldr	r2, [sp, #12]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r2
-	bls	.L1194
-	ldr	r2, [sp, #16]
+	bls	.L1196
+.LBB377:
+	.loc 2 1460 0
+	ldr	r2, [sp, #12]
 	ldr	r3, .L1278+12
-	ldrb	r8, [r3, r2]	@ zero_extendqisi2
+	ldrb	r7, [r3, r2]	@ zero_extendqisi2
+.LVL1471:
+.LBB368:
+.LBB369:
+	.loc 3 123 0
 	ldr	r3, .L1278+16
-	mov	r0, r8
-	ldr	r2, [r3, r8, lsl #3]
-	add	r3, r3, r8, lsl #3
+.LBE369:
+.LBE368:
+	.loc 2 1464 0
+	mov	r0, r7
+.LBB371:
+.LBB370:
+	.loc 3 123 0
+	ldr	r2, [r3, r7, lsl #3]
+	.loc 3 124 0
+	add	r3, r3, r7, lsl #3
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-	str	r2, [sp, #4]
-	str	r3, [sp, #8]
+	.loc 3 123 0
+	str	r2, [sp]
+.LVL1472:
+	str	r3, [sp, #4]
+.LVL1473:
+.LBE370:
+.LBE371:
+	.loc 2 1463 0
 	mov	r3, r2
-	ldr	r2, [sp, #8]
+	ldr	r2, [sp, #4]
 	add	r3, r3, r2, lsl #8
 	movs	r2, #255
 	str	r2, [r3, #2056]
+	.loc 2 1464 0
 	bl	NandcWaitFlashReady
+.LVL1474:
 	ldr	r1, .L1278
+	.loc 2 1465 0
 	cmp	r4, #7
+	.loc 2 1466 0
 	it	eq
 	moveq	r3, #160
-	ldr	r2, [sp, #8]
+	.loc 2 1468 0
+	ldr	r2, [sp, #4]
+	.loc 2 1466 0
 	itete	eq
-	mlaeq	r1, r3, r8, r1
-	addne	r1, r1, r8, lsl #6
+	mlaeq	r1, r3, r7, r1
+	.loc 2 1461 0
+	addne	r1, r1, r7, lsl #6
+	.loc 2 1466 0
 	addeq	r3, r1, #28
+	.loc 2 1461 0
 	addne	r3, r1, #20
-	str	r3, [sp, #36]
+	.loc 2 1466 0
+	str	r3, [sp, #28]
+.LVL1475:
+	.loc 2 1469 0
 	cmp	r4, #4
-	ldr	r3, [sp, #4]
+	.loc 2 1468 0
+	ldr	r3, [sp]
+.LVL1476:
 	add	r3, r3, r2, lsl #8
 	mov	r2, #54
 	str	r2, [r3, #2056]
-	bne	.L1198
+	.loc 2 1469 0
+	bne	.L1200
+	.loc 2 1470 0
 	movs	r2, #255
 	str	r2, [r3, #2052]
+	.loc 2 1471 0
 	movs	r2, #64
 	str	r2, [r3, #2048]
+	.loc 2 1472 0
 	movs	r2, #204
-.L1275:
+.L1276:
+	.loc 2 1480 0
 	str	r2, [r3, #2052]
+.LVL1477:
+	.loc 2 1481 0
 	movs	r2, #77
-	b	.L1276
-.L1198:
+	b	.L1277
+.LVL1478:
+.L1200:
+	.loc 2 1474 0
 	subs	r2, r4, #5
 	cmp	r2, #1
-	bhi	.L1200
+	bhi	.L1202
+	.loc 2 1475 0
 	ldr	r2, .L1278
 	ldrb	r2, [r2, #4]	@ zero_extendqisi2
 	str	r2, [r3, #2052]
+	.loc 2 1476 0
 	movs	r2, #82
-.L1276:
+.LVL1479:
+.L1277:
+	.loc 2 1481 0
 	str	r2, [r3, #2048]
+	.loc 2 1490 0
 	cmp	r4, #6
-	ldr	r3, [sp, #4]
-	mov	r0, r8
-	ldr	r2, [sp, #8]
+	.loc 2 1483 0
+	ldr	r3, [sp]
+	.loc 2 1497 0
+	mov	r0, r7
+	.loc 2 1483 0
+	ldr	r2, [sp, #4]
 	add	r5, r3, r2, lsl #8
 	mov	r3, #22
-	ldr	r2, [sp, #8]
 	str	r3, [r5, #2056]
+	.loc 2 1484 0
 	mov	r3, #23
 	str	r3, [r5, #2056]
+	.loc 2 1485 0
 	mov	r3, #4
 	str	r3, [r5, #2056]
+	.loc 2 1486 0
 	mov	r3, #25
 	str	r3, [r5, #2056]
+	.loc 2 1487 0
 	mov	r3, #0
 	str	r3, [r5, #2056]
+	.loc 2 1488 0
 	str	r3, [r5, #2052]
+	.loc 2 1489 0
 	str	r3, [r5, #2052]
+	.loc 2 1491 0
 	it	eq
 	moveq	r3, #31
+	.loc 2 1493 0
 	str	r3, [r5, #2052]
+	.loc 2 1494 0
 	movs	r3, #2
 	str	r3, [r5, #2052]
+	.loc 2 1495 0
 	movs	r3, #0
 	str	r3, [r5, #2052]
-	ldr	r3, [sp, #4]
+	.loc 2 1496 0
+	ldr	r2, [sp, #4]
+	ldr	r3, [sp]
 	add	r3, r3, r2, lsl #8
 	movs	r2, #48
 	str	r2, [r3, #2056]
+	.loc 2 1497 0
 	bl	NandcWaitFlashReady
+.LVL1480:
+	.loc 2 1501 0
 	subs	r3, r4, #5
 	cmp	r3, #1
-	str	r3, [sp, #40]
-	bls	.L1237
+	str	r3, [sp, #32]
+	bls	.L1239
+	.loc 2 1500 0
 	cmp	r4, #7
 	ite	eq
 	moveq	r2, #32
 	movne	r2, #2
-.L1203:
-	ldr	r3, .L1278+20
+.L1205:
+.LVL1481:
+	.loc 2 1506 0
+	ldr	r3, [r8]
+.LVL1482:
 	subs	r2, r2, #1
-	ldr	r3, [r3]
+.LVL1483:
 	subs	r1, r3, #1
 	uxtab	r2, r3, r2
 	mov	r0, r1
-.L1204:
+.LVL1484:
+.L1206:
+	.loc 2 1508 0 discriminator 3
 	ldr	r6, [r5, #2048]
 	strb	r6, [r0, #1]!
-	cmp	r2, r0
-	bne	.L1204
+.LVL1485:
+	.loc 2 1507 0 discriminator 3
+	cmp	r0, r2
+	bne	.L1206
+	.loc 2 1511 0
 	cmp	r4, #7
-	bne	.L1205
+	bne	.L1207
 	movs	r2, #0
-.L1207:
+.LVL1486:
+.L1209:
+	.loc 2 1513 0
 	ldrb	r0, [r3, r2, lsl #2]	@ zero_extendqisi2
 	uxtb	r1, r2
+.LVL1487:
 	cmp	r0, #12
-	beq	.L1206
+	beq	.L1208
+	.loc 2 1515 0
 	add	r0, r3, r2, lsl #2
 	ldrb	r0, [r0, #1]	@ zero_extendqisi2
 	cmp	r0, #10
-	beq	.L1206
+	beq	.L1208
+.LVL1488:
 	adds	r2, r2, #1
+.LVL1489:
+	.loc 2 1512 0 discriminator 2
 	cmp	r2, #8
-	bne	.L1207
-.L1208:
+	bne	.L1209
+.LVL1490:
+.L1210:
+	.loc 2 1519 0
 	movs	r1, #0
-	ldr	r0, .L1278+24
+	ldr	r0, .L1278+20
 	bl	printf
-.L1210:
-	b	.L1210
-.L1200:
+.LVL1491:
+.L1212:
+	b	.L1212
+.LVL1492:
+.L1202:
+	.loc 2 1478 0
 	movs	r2, #174
 	str	r2, [r3, #2052]
+	.loc 2 1479 0
 	movs	r2, #0
 	str	r2, [r3, #2048]
+	.loc 2 1480 0
 	movs	r2, #176
-	b	.L1275
-.L1237:
+	b	.L1276
+.LVL1493:
+.L1239:
+	.loc 2 1502 0
 	movs	r2, #16
-	b	.L1203
+	b	.L1205
 .L1279:
 	.align	2
 .L1278:
@@ -9199,194 +15373,333 @@ HynixGetReadRetryDefault:
 	.word	.LANCHOR25
 	.word	.LANCHOR26
 	.word	.LANCHOR6
-	.word	.LANCHOR145
-	.word	.LC16
-.L1206:
+	.word	.LC19
+	.word	.LANCHOR144
+.LVL1494:
+.L1208:
+	.loc 2 1518 0
 	cmp	r1, #6
-	bhi	.L1208
-.L1209:
-	ldr	r3, .L1280
-	ldr	lr, [r3]
+	bhi	.L1210
+.LVL1495:
+.L1211:
+	.loc 2 1535 0
+	ldr	lr, [r8]
+.LVL1496:
+	.loc 2 1536 0
 	mov	r3, lr
-.L1214:
-	ldr	r1, [sp, #52]
+.LVL1497:
+.L1216:
+	.loc 2 1536 0 is_stmt 0 discriminator 1
+	ldr	r1, [sp, #56]
 	sub	r2, r3, lr
-	cmp	r1, r2
-	bgt	.L1215
-	ldr	r3, .L1280
-	ldr	r1, [r3]
-	ldr	r3, [sp, #32]
-	adds	r0, r1, r3
+.LVL1498:
+	cmp	r2, r1
+	blt	.L1217
+.LVL1499:
+	ldr	r3, [r8]
+	ldr	r2, [sp, #24]
+	adds	r1, r3, r2
+	.loc 2 1539 0 is_stmt 1
 	movs	r3, #8
-.L1217:
-	mov	r7, r0
-	movs	r6, #0
-.L1216:
-	ldr	r2, [r7]
-	adds	r6, r6, #1
+.LVL1500:
+.L1219:
+	mov	r6, r1
+.LBB372:
+	.loc 2 1542 0
+	movs	r0, #0
+.LVL1501:
+.L1218:
+	.loc 2 1543 0 discriminator 3
+	ldr	r2, [r6]
+	.loc 2 1542 0 discriminator 3
+	adds	r0, r0, #1
+.LVL1502:
+	.loc 2 1543 0 discriminator 3
 	mvns	r2, r2
-	str	r2, [r7], #4
-	ldr	r2, [sp, #12]
-	cmp	r2, r6
-	bgt	.L1216
+	str	r2, [r6], #4
+	.loc 2 1542 0 discriminator 3
+	ldr	r2, [sp, #8]
+	cmp	r2, r0
+	bgt	.L1218
+.LVL1503:
 	ldr	r2, [sp, #48]
+.LBE372:
+	.loc 2 1540 0 discriminator 2
 	subs	r3, r3, #1
-	add	r0, r0, r2
-	bne	.L1217
-	str	r1, [sp, #20]
-	str	r3, [sp, #24]
-.L1223:
+.LVL1504:
+	add	r1, r1, r2
+	bne	.L1219
+.LVL1505:
+.L1225:
+	lsls	r2, r3, #2
+	lsls	r1, r3, #2
+	str	r2, [sp, #60]
+	ldr	r2, [r8]
+	str	r2, [sp, #44]
+	add	r2, r2, r1
+.LBB373:
+.LBB374:
+	.loc 2 1555 0
+	movs	r1, #0
+	str	r2, [sp, #52]
+	mov	r2, r1
+.LVL1506:
+.L1224:
+	.loc 2 1553 0
+	movs	r0, #1
+	ldr	ip, [sp, #52]
+	lsls	r0, r0, r2
+	str	r0, [sp, #36]
+.LVL1507:
+	movs	r0, #16
+.LVL1508:
+	str	r0, [sp, #40]
+	.loc 2 1552 0
 	movs	r0, #0
-	mov	r2, r0
+	str	r0, [sp, #16]
+.LVL1509:
 .L1222:
-	movs	r3, #1
-	mov	ip, #0
-	lsl	r7, r3, r2
-	movs	r3, #16
-	str	r3, [sp, #44]
-	mov	r6, r7
-	ldr	r7, [sp, #20]
-.L1220:
-	ldr	r3, [r7]
-	bics	r3, r6, r3
-	ldr	r3, [sp, #32]
+	.loc 2 1555 0
+	ldr	r6, [sp, #36]
+	mov	r0, r6
+	ldr	r6, [ip]
+	bics	r0, r0, r6
+	ldr	r6, [sp, #24]
+	.loc 2 1556 0
 	it	eq
-	addeq	ip, ip, #1
-	add	r7, r7, r3
-	ldr	r3, [sp, #44]
-	subs	r3, r3, #1
-	str	r3, [sp, #44]
-	bne	.L1220
-	cmp	ip, #8
-	add	r2, r2, #1
+	ldreq	r0, [sp, #16]
+	add	ip, ip, r6
+	itt	eq
+	addeq	r0, r0, #1
+	streq	r0, [sp, #16]
+.LVL1510:
+	.loc 2 1554 0
+	ldr	r0, [sp, #40]
+	subs	r0, r0, #1
+	str	r0, [sp, #40]
+.LVL1511:
+	bne	.L1222
+	.loc 2 1558 0
+	ldr	r0, [sp, #16]
+.LVL1512:
+.LBE374:
+	.loc 2 1551 0
+	adds	r2, r2, #1
+.LVL1513:
+.LBB375:
+	.loc 2 1558 0
+	cmp	r0, #8
+	.loc 2 1559 0
 	itt	hi
-	movhi	r3, r6
-	orrhi	r0, r0, r3
+	ldrhi	r0, [sp, #36]
+	orrhi	r1, r1, r0
+.LVL1514:
+.LBE375:
+	.loc 2 1551 0
 	cmp	r2, #32
-	bne	.L1222
-	ldr	r3, [sp, #20]
-	str	r0, [r3], #4
-	str	r3, [sp, #20]
-	ldr	r3, [sp, #24]
+	bne	.L1224
+	.loc 2 1561 0 discriminator 2
+	ldr	r2, [sp, #44]
+.LVL1515:
+.LBE373:
+	.loc 2 1546 0 discriminator 2
 	adds	r3, r3, #1
-	str	r3, [sp, #24]
-	ldr	r2, [sp, #24]
-	ldr	r3, [sp, #12]
-	cmp	r3, r2
-	bgt	.L1223
+.LVL1516:
+.LBB376:
+	.loc 2 1561 0 discriminator 2
+	ldr	r0, [sp, #60]
+	str	r1, [r2, r0]
+.LBE376:
+	.loc 2 1546 0 discriminator 2
+	ldr	r2, [sp, #8]
+	cmp	r2, r3
+	bgt	.L1225
+	.loc 2 1566 0
+	ldr	r1, [r8]
+.LVL1517:
+	movs	r3, #0
+.LVL1518:
 	subs	r2, r1, #4
 	add	r0, r1, #28
-	movs	r3, #0
-.L1226:
+.LVL1519:
+.L1228:
 	ldr	r6, [r2, #4]!
-	cbnz	r6, .L1225
+	cbnz	r6, .L1227
+	.loc 2 1567 0
 	adds	r3, r3, #1
-.L1225:
+.LVL1520:
+.L1227:
+	.loc 2 1565 0 discriminator 2
 	cmp	r0, r2
-	bne	.L1226
+	bne	.L1228
+	.loc 2 1569 0
 	cmp	r3, #7
-	ble	.L1227
-	ldr	r0, .L1280+4
+	ble	.L1229
+	.loc 2 1570 0
+	ldr	r0, .L1280
 	mov	r3, #1024
+.LVL1521:
 	movs	r2, #1
 	bl	rknand_print_hex
+.LVL1522:
+	.loc 2 1571 0
 	movs	r1, #0
-	ldr	r0, .L1280+8
+	ldr	r0, .L1280+4
 	bl	printf
-.L1228:
-	b	.L1228
-.L1205:
+.LVL1523:
+.L1230:
+	b	.L1230
+.LVL1524:
+.L1207:
+	.loc 2 1522 0
 	cmp	r4, #6
-	bne	.L1209
+	bne	.L1211
 	adds	r3, r3, #7
-.L1211:
+.LVL1525:
+.L1213:
+	.loc 2 1524 0
 	ldrb	r2, [r1, #1]!	@ zero_extendqisi2
+.LVL1526:
 	cmp	r2, #12
-	beq	.L1209
+	beq	.L1211
+	.loc 2 1526 0
 	ldrb	r2, [r1, #8]	@ zero_extendqisi2
 	cmp	r2, #4
-	beq	.L1209
-	cmp	r3, r1
-	bne	.L1211
+	beq	.L1211
+.LVL1527:
+	.loc 2 1523 0 discriminator 2
+	cmp	r1, r3
+	bne	.L1213
+	.loc 2 1530 0
 	movs	r1, #0
-	ldr	r0, .L1280+8
+.LVL1528:
+	ldr	r0, .L1280+4
 	bl	printf
-.L1213:
-	b	.L1213
+.LVL1529:
 .L1215:
+	b	.L1215
+.LVL1530:
+.L1217:
+	.loc 2 1537 0 discriminator 3
 	ldr	r2, [r5, #2048]
 	strb	r2, [r3], #1
-	b	.L1214
-.L1227:
+	b	.L1216
+.LVL1531:
+.L1229:
+	.loc 2 1576 0
 	cmp	r4, #6
-	beq	.L1239
+	beq	.L1241
+	.loc 2 1575 0
 	cmp	r4, #7
 	ite	eq
 	moveq	ip, #10
 	movne	ip, #8
-.L1229:
+.L1231:
+.LVL1532:
 	add	r3, fp, #-1
-	ldr	r1, [sp, #36]
+.LVL1533:
+	ldr	r1, [sp, #28]
 	uxtb	r3, r3
+	.loc 2 1580 0
 	movs	r0, #0
 	adds	r3, r3, #1
-.L1230:
-	mov	r7, r1
+	str	r3, [sp, #16]
+.LVL1534:
+.L1232:
+	.loc 2 1579 0
+	mov	r3, r1
 	mov	r2, lr
-.L1231:
+.LVL1535:
+.L1233:
+	.loc 2 1582 0 discriminator 3
 	ldrb	r6, [r2], #1	@ zero_extendqisi2
-	strb	r6, [r7], #1
+.LVL1536:
+	strb	r6, [r3], #1
+.LVL1537:
+	.loc 2 1581 0 discriminator 3
 	sub	r6, r2, lr
 	uxtb	r6, r6
 	cmp	fp, r6
-	bhi	.L1231
+	bhi	.L1233
+	ldr	r3, [sp, #16]
+	.loc 2 1580 0 discriminator 2
 	adds	r0, r0, #1
-	add	lr, lr, r3
+.LVL1538:
 	cmp	r10, r0
 	add	r1, r1, ip
-	bgt	.L1230
-	ldr	r3, [sp, #4]
-	mov	r0, r8
-	ldr	r2, [sp, #8]
+	add	lr, lr, r3
+.LVL1539:
+	bgt	.L1232
+	.loc 2 1586 0
+	ldr	r3, [sp]
+	.loc 2 1587 0
+	mov	r0, r7
+.LVL1540:
+	.loc 2 1586 0
+	ldr	r2, [sp, #4]
 	add	r6, r3, r2, lsl #8
 	movs	r3, #255
 	str	r3, [r6, #2056]
+	.loc 2 1587 0
 	bl	NandcWaitFlashReady
-	ldr	r3, [sp, #40]
+.LVL1541:
+	.loc 2 1588 0
+	ldr	r3, [sp, #32]
 	cmp	r3, #1
-	bhi	.L1233
+	bhi	.L1235
+	.loc 2 1589 0
 	movs	r3, #54
+	.loc 2 1593 0
 	mov	r1, #-1
+	.loc 2 1589 0
 	str	r3, [r6, #2056]
-	ldr	r3, .L1280+12
-	ldr	r0, [sp, #16]
+	.loc 2 1590 0
+	ldr	r3, .L1280+8
+	.loc 2 1593 0
+	ldr	r0, [sp, #12]
+	.loc 2 1590 0
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
 	str	r3, [r5, #2052]
+	.loc 2 1591 0
 	movs	r3, #0
 	str	r3, [r5, #2048]
+	.loc 2 1592 0
 	movs	r3, #22
 	str	r3, [r6, #2056]
+	.loc 2 1593 0
 	bl	FlashReadCmd
-.L1234:
-	mov	r0, r8
+.LVL1542:
+.L1236:
+	.loc 2 1597 0 discriminator 2
+	mov	r0, r7
 	bl	NandcWaitFlashReady
-	ldr	r3, [sp, #28]
+.LVL1543:
+	ldr	r3, [sp, #20]
 	adds	r3, r3, #1
-	b	.L1277
-.L1239:
+	str	r3, [sp, #20]
+.LVL1544:
+	b	.L1197
+.LVL1545:
+.L1241:
+	.loc 2 1577 0
 	mov	ip, #4
-	b	.L1229
-.L1233:
+	b	.L1231
+.LVL1546:
+.L1235:
+	.loc 2 1595 0
 	movs	r3, #56
 	str	r3, [r6, #2056]
-	b	.L1234
+	b	.L1236
 .L1281:
 	.align	2
 .L1280:
-	.word	.LANCHOR145
-	.word	.LC17
-	.word	.LC16
+	.word	.LC20
+	.word	.LC19
 	.word	.LANCHOR20
+.LBE377:
+.LBE366:
+	.cfi_endproc
+.LFE236:
 	.size	HynixGetReadRetryDefault, .-HynixGetReadRetryDefault
 	.section	.text.FlashGetReadRetryDefault,"ax",%progbits
 	.align	1
@@ -9397,71 +15710,120 @@ HynixGetReadRetryDefault:
 	.fpu softvfp
 	.type	FlashGetReadRetryDefault, %function
 FlashGetReadRetryDefault:
+.LFB237:
+	.loc 2 1674 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL1547:
+	.loc 2 1675 0
 	mov	r3, r0
 	cbz	r0, .L1282
+	.loc 2 1677 0
 	subs	r2, r0, #1
 	cmp	r2, #6
 	bhi	.L1284
+	.loc 2 1678 0
 	b	HynixGetReadRetryDefault
+.LVL1548:
 .L1284:
+	.loc 2 1679 0
 	cmp	r0, #49
 	bne	.L1285
+	.loc 2 1680 0
 	ldr	r0, .L1305
+.LVL1549:
+	.loc 2 1683 0
 	movs	r2, #64
 	ldr	r1, .L1305+4
+	.loc 2 1680 0
 	strb	r3, [r0]
+	.loc 2 1681 0
 	movs	r3, #4
+.LVL1550:
 	strb	r3, [r0, #1]
+	.loc 2 1682 0
 	movs	r3, #15
 	strb	r3, [r0, #2]
 .L1303:
+.LBB380:
+.LBB381:
+	.loc 2 1701 0
 	adds	r0, r0, #4
 	b	ftl_memcpy
+.LVL1551:
 .L1285:
+.LBE381:
+.LBE380:
+	.loc 2 1684 0
 	cmp	r0, #33
 	beq	.L1286
+	.loc 2 1684 0 is_stmt 0 discriminator 1
 	sub	r2, r0, #65
 	cmp	r2, #1
 	bhi	.L1287
 .L1286:
+	.loc 2 1686 0 is_stmt 1
 	ldr	r0, .L1305
+.LVL1552:
 	strb	r3, [r0]
+	.loc 2 1687 0
 	movs	r3, #4
+.LVL1553:
 .L1304:
+.LBB383:
+.LBB382:
+	.loc 2 1693 0
 	strb	r3, [r0, #1]
+	.loc 2 1694 0
 	movs	r3, #7
 	strb	r3, [r0, #2]
+	.loc 2 1695 0
 	movs	r2, #45
 	ldr	r1, .L1305+8
 	b	.L1303
+.LVL1554:
 .L1287:
+	.loc 2 1690 0
 	cmp	r0, #34
 	beq	.L1288
 	cmp	r0, #67
 	bne	.L1289
 .L1288:
+	.loc 2 1692 0
 	ldr	r0, .L1305
+.LVL1555:
 	strb	r3, [r0]
+	.loc 2 1693 0
 	movs	r3, #5
+.LVL1556:
 	b	.L1304
+.LVL1557:
 .L1289:
+	.loc 2 1696 0
 	cmp	r0, #35
 	beq	.L1290
 	cmp	r0, #68
 	bne	.L1282
 .L1290:
+	.loc 2 1698 0
 	ldr	r0, .L1305
+.LVL1558:
+	.loc 2 1701 0
 	movs	r2, #95
 	ldr	r1, .L1305+12
+	.loc 2 1698 0
 	strb	r3, [r0]
+	.loc 2 1699 0
 	movs	r3, #5
+.LVL1559:
 	strb	r3, [r0, #1]
+	.loc 2 1700 0
 	movs	r3, #17
 	strb	r3, [r0, #2]
 	b	.L1303
+.LVL1560:
 .L1282:
 	bx	lr
 .L1306:
@@ -9471,6 +15833,10 @@ FlashGetReadRetryDefault:
 	.word	.LANCHOR14
 	.word	.LANCHOR9
 	.word	.LANCHOR11
+.LBE382:
+.LBE383:
+	.cfi_endproc
+.LFE237:
 	.size	FlashGetReadRetryDefault, .-FlashGetReadRetryDefault
 	.section	.text.FlashInit,"ax",%progbits
 	.align	1
@@ -9481,100 +15847,208 @@ FlashGetReadRetryDefault:
 	.fpu softvfp
 	.type	FlashInit, %function
 FlashInit:
+.LFB252:
+	.loc 2 2193 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1561:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
 	mov	r4, r0
 	sub	sp, sp, #32
+	.cfi_def_cfa_offset 64
+	.loc 2 2199 0
 	mov	r0, #32768
+.LVL1562:
+	.loc 2 2207 0
 	movs	r5, #0
+	.loc 2 2199 0
 	bl	ftl_malloc
+.LVL1563:
 	ldr	r3, .L1399
+	.loc 2 2205 0
 	ldr	r10, .L1399+132
+	.loc 2 2211 0
 	ldr	r8, .L1399+136
+	.loc 2 2199 0
 	str	r0, [r3]
+	.loc 2 2200 0
 	mov	r0, #32768
 	bl	ftl_malloc
+.LVL1564:
 	ldr	r3, .L1399+4
+	.loc 2 2213 0
 	ldr	r6, .L1399+8
+	.loc 2 2209 0
 	ldr	r7, .L1399+12
+	.loc 2 2200 0
 	str	r0, [r3]
+	.loc 2 2201 0
 	mov	r0, #4096
 	bl	ftl_malloc
+.LVL1565:
 	ldr	r3, .L1399+16
 	str	r0, [r3]
+	.loc 2 2202 0
 	mov	r0, #32768
 	bl	ftl_malloc
+.LVL1566:
 	ldr	r3, .L1399+20
 	str	r0, [r3]
+	.loc 2 2203 0
 	mov	r0, #4096
 	bl	ftl_malloc
+.LVL1567:
 	ldr	r3, .L1399+24
+	.loc 2 2206 0
 	ldr	r2, .L1399+28
+	.loc 2 2211 0
 	strb	r5, [r8]
+	.loc 2 2203 0
 	str	r0, [r3]
+	.loc 2 2205 0
 	movs	r3, #50
 	strb	r3, [r10]
+	.loc 2 2215 0
 	mov	r0, r4
+	.loc 2 2206 0
 	strb	r3, [r2]
+	.loc 2 2208 0
 	movs	r2, #128
+	.loc 2 2207 0
 	ldr	r3, .L1399+32
 	ldr	r4, .L1399+36
+.LVL1568:
+	.loc 2 2209 0
 	strb	r5, [r7]
+	.loc 2 2207 0
 	str	r5, [r3]
+	.loc 2 2208 0
 	ldr	r3, .L1399+40
 	str	r2, [r3]
+	.loc 2 2210 0
 	ldr	r3, .L1399+44
 	str	r5, [r3]
+	.loc 2 2213 0
 	movs	r3, #60
 	strb	r3, [r6]
+	.loc 2 2215 0
 	bl	NandcInit
+.LVL1569:
 	str	r10, [sp, #20]
+.LBB392:
+.LBB393:
+.LBB394:
+.LBB395:
+	.loc 3 123 0
 	ldr	r10, .L1399+140
 	str	r8, [sp, #16]
 	mov	r8, r6
 	mov	r6, r4
+.LVL1570:
 .L1312:
+.LBE395:
+.LBE394:
+.LBE393:
+.LBE392:
+	.loc 2 2217 0
 	uxtb	fp, r5
+.LVL1571:
+.LBB405:
+.LBB404:
+	.loc 2 282 0
 	mov	r0, fp
 	bl	FlashReset
+.LVL1572:
+.LBB398:
+.LBB396:
+	.loc 3 124 0
 	add	r1, r10, r5, lsl #3
+	.loc 3 123 0
 	ldr	r3, [r10, r5, lsl #3]
+.LBE396:
+.LBE398:
+	.loc 2 284 0
 	mov	r0, fp
 	ldrb	r1, [r1, #4]	@ zero_extendqisi2
+.LBB399:
+.LBB397:
+	.loc 3 123 0
 	str	r3, [sp, #28]
+.LVL1573:
 	str	r1, [sp, #24]
+.LVL1574:
+.LBE397:
+.LBE399:
+	.loc 2 284 0
 	bl	NandcFlashCs
+.LVL1575:
+	.loc 2 285 0
 	ldr	r1, [sp, #24]
+.LBB400:
+.LBB401:
+	.loc 3 306 0
 	movs	r0, #200
+.LBE401:
+.LBE400:
+	.loc 2 285 0
 	ldr	r3, [sp, #28]
 	add	r3, r3, r1, lsl #8
 	movs	r1, #144
 	str	r1, [r3, #2056]
+	.loc 2 286 0
 	movs	r1, #0
 	str	r1, [r3, #2052]
 	str	r3, [sp, #24]
+.LVL1576:
+.LBB403:
+.LBB402:
+	.loc 3 306 0
 	bl	udelay
+.LVL1577:
+.LBE402:
+.LBE403:
+	.loc 2 288 0
 	ldr	r3, [sp, #24]
+	.loc 2 296 0
 	mov	r0, fp
+	.loc 2 288 0
 	ldr	r1, [r3, #2048]
 	strb	r1, [r4]
+	.loc 2 289 0
 	ldr	r1, [r3, #2048]
 	strb	r1, [r4, #1]
+	.loc 2 290 0
 	ldr	r1, [r3, #2048]
 	strb	r1, [r4, #2]
+	.loc 2 291 0
 	ldr	r1, [r3, #2048]
 	strb	r1, [r4, #3]
+	.loc 2 292 0
 	ldr	r1, [r3, #2048]
 	strb	r1, [r4, #4]
+	.loc 2 293 0
 	ldr	r3, [r3, #2048]
 	strb	r3, [r4, #5]
+	.loc 2 296 0
 	bl	NandcFlashDeCs
+.LVL1578:
+	.loc 2 297 0
 	ldrb	r2, [r4]	@ zero_extendqisi2
 	subs	r3, r2, #1
 	uxtb	r3, r3
 	cmp	r3, #253
 	bhi	.L1308
+	.loc 2 298 0
 	ldrb	r1, [r4, #5]	@ zero_extendqisi2
 	ldrb	r3, [r4, #1]	@ zero_extendqisi2
 	ldr	r0, .L1399+48
@@ -9587,137 +16061,213 @@ FlashInit:
 	str	r1, [sp]
 	adds	r1, r5, #1
 	bl	printf
+.LVL1579:
 .L1308:
+.LBE404:
+.LBE405:
+	.loc 2 2218 0
 	cbnz	r5, .L1309
+	.loc 2 2219 0
 	ldrb	r3, [r6]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, #253
 	bhi	.L1352
+	.loc 2 2219 0 is_stmt 0 discriminator 1
 	ldrb	r3, [r6, #1]	@ zero_extendqisi2
 	cmp	r3, #255
 	beq	.L1352
 .L1309:
+	.loc 2 2223 0 is_stmt 1
 	ldrb	r3, [r4]	@ zero_extendqisi2
+	.loc 2 2216 0
 	adds	r5, r5, #1
+.LVL1580:
 	adds	r4, r4, #8
+.LVL1581:
+	.loc 2 2223 0
 	cmp	r3, #181
+	.loc 2 2224 0
 	itt	eq
 	moveq	r3, #44
 	strbeq	r3, [r4, #-8]
+	.loc 2 2216 0
 	cmp	r5, #4
 	bne	.L1312
+	.loc 2 2234 0
 	ldrb	r3, [r6]	@ zero_extendqisi2
 	cmp	r3, #173
 	beq	.L1313
+	.loc 2 2235 0
 	ldr	r3, .L1399+52
 	ldr	r0, [r3]
 	bl	NandcSetDdrMode
+.LVL1582:
 .L1313:
+	.loc 2 2242 0
 	mov	r2, #852
 	movs	r1, #0
 	ldr	r0, .L1399+56
 	bl	ftl_memset
+.LVL1583:
+	.loc 2 2243 0
 	ldr	r4, .L1399+60
+.LVL1584:
 	ldr	r3, .L1399+64
+	.loc 2 2244 0
 	ldr	r5, .L1399+68
+.LVL1585:
+	.loc 2 2243 0
 	str	r3, [r4]
+	.loc 2 2244 0
 	movs	r3, #0
 	strb	r3, [r5]
+	.loc 2 2246 0
 	ldrb	r3, [r6, #1]	@ zero_extendqisi2
 	cmp	r3, #161
 	beq	.L1314
+	.loc 2 2246 0 is_stmt 0 discriminator 2
 	cmp	r3, #218
 	beq	.L1314
+	.loc 2 2246 0 discriminator 3
 	and	r2, r3, #223
 	cmp	r2, #209
 	beq	.L1314
+	.loc 2 2247 0 is_stmt 1
 	cmp	r3, #220
 	bne	.L1315
+	.loc 2 2247 0 is_stmt 0 discriminator 1
 	ldrb	r2, [r6, #3]	@ zero_extendqisi2
 	cmp	r2, #149
 	bne	.L1315
 .L1314:
+	.loc 2 2248 0 is_stmt 1
 	ldr	r1, [sp, #16]
 	movs	r2, #1
 	strb	r2, [r1]
+	.loc 2 2249 0
 	movs	r2, #16
 	ldr	r1, [sp, #20]
+	.loc 2 2250 0
 	strb	r2, [r8]
+	.loc 2 2249 0
 	strb	r2, [r1]
+	.loc 2 2251 0
 	ldrb	r1, [r6]	@ zero_extendqisi2
 	ldr	r2, .L1399+72
+	.loc 2 2253 0
 	cmp	r1, #152
+	.loc 2 2251 0
 	strb	r1, [r2, #1]
+	.loc 2 2252 0
 	strb	r3, [r2, #2]
+	.loc 2 2253 0
 	bne	.L1316
+	.loc 2 2253 0 is_stmt 0 discriminator 1
 	ldrsb	r1, [r6, #4]
 	cmp	r1, #0
+	.loc 2 2254 0 is_stmt 1 discriminator 1
 	itt	ge
 	movge	r1, #24
 	strbge	r1, [r8]
 .L1316:
+	.loc 2 2255 0
 	ldr	r1, .L1399+76
 	ldr	r0, [r1]
 	ldr	r1, .L1399+80
 	cmp	r0, r1
+	.loc 2 2256 0
 	itt	eq
 	moveq	r1, #16
 	strbeq	r1, [r8]
+	.loc 2 2257 0
 	cmp	r3, #218
 	bne	.L1318
+	.loc 2 2258 0
 	mov	r1, #2048
 .L1395:
+	.loc 2 2261 0
 	strh	r1, [r2, #14]	@ movhi
+	.loc 2 2262 0
 	strb	r3, [r2, #2]
 .L1319:
+	.loc 2 2264 0
 	movs	r2, #32
 	ldr	r1, .L1399+84
 	ldr	r0, .L1399+88
 	bl	ftl_memcpy
+.LVL1586:
+	.loc 2 2265 0
 	movs	r2, #32
 	ldr	r1, .L1399+72
 	ldr	r0, .L1399+64
 	bl	ftl_memcpy
+.LVL1587:
 .L1315:
+	.loc 2 2268 0
 	ldr	r3, [sp, #16]
 	ldr	r8, .L1399+144
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
 	bne	.L1321
+	.loc 2 2269 0
 	bl	FlashLoadPhyInfoInRam
+.LVL1588:
 	cbnz	r0, .L1323
+	.loc 2 2270 0
 	ldr	r3, [r4]
 	ldr	r10, .L1399+100
 	ldrh	r3, [r3, #16]
 	lsrs	r3, r3, #8
+	.loc 2 2271 0
 	lsls	r1, r3, #31
+	.loc 2 2270 0
 	and	r0, r3, #7
 	strb	r0, [r10]
+	.loc 2 2271 0
 	bmi	.L1323
+	.loc 2 2272 0
 	movs	r3, #1
 	strb	r3, [r7]
+	.loc 2 2273 0
 	bl	FlashSetInterfaceMode
+.LVL1589:
+	.loc 2 2274 0
 	ldrb	r0, [r10]	@ zero_extendqisi2
 	bl	NandcSetMode
+.LVL1590:
 .L1323:
+	.loc 2 2277 0
 	ldr	r3, [r4]
 	ldrb	r3, [r3, #26]	@ zero_extendqisi2
 	strb	r3, [r8]
+	.loc 2 2282 0
 	bl	FlashLoadPhyInfo
+.LVL1591:
+	.loc 2 2299 0
 	cmp	r0, #0
 	beq	.L1321
+	.loc 2 2300 0
 	ldr	r3, [r4]
 	ldr	r0, .L1399+92
+.LVL1592:
 	ldrh	r1, [r3, #14]
 	bl	printf
+.LVL1593:
+	.loc 2 2301 0
 	bl	FlashLoadPhyInfoInRam
+.LVL1594:
 	adds	r2, r0, #1
 	beq	.L1307
+	.loc 2 2303 0
 	bl	FlashDieInfoInit
+.LVL1595:
+	.loc 2 2304 0
 	ldr	r3, [r4]
 	ldrb	r0, [r3, #19]	@ zero_extendqisi2
 	bl	FlashGetReadRetryDefault
+.LVL1596:
+	.loc 2 2306 0
 	ldr	r3, [r4]
 	ldr	r2, .L1399+96
 	ldrb	r1, [r3, #9]	@ zero_extendqisi2
@@ -9725,106 +16275,145 @@ FlashInit:
 	addw	r2, r2, #4095
 	cmp	r1, r2, asr #12
 	blt	.L1326
+	.loc 2 2307 0 discriminator 1
 	ldrh	r2, [r3, #14]
 	adds	r2, r2, #255
+	.loc 2 2306 0 discriminator 1
 	cmp	r1, r2, asr #8
 	bge	.L1327
 .L1326:
+	.loc 2 2309 0
 	ldrh	r2, [r3, #14]
 	bic	r2, r2, #255
 	strh	r2, [r3, #14]	@ movhi
 .L1327:
+	.loc 2 2316 0
 	ldr	r3, .L1399+100
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	tst	r3, #6
 	beq	.L1328
+	.loc 2 2321 0
 	bl	FlashSavePhyInfo
+.LVL1597:
+	.loc 2 2322 0
 	ldr	r3, .L1399+104
 	movs	r0, #0
 	ldr	r1, [r3]
 	bl	FlashDdrParaScan
+.LVL1598:
 .L1328:
+	.loc 2 2329 0
 	bl	FlashSavePhyInfo
+.LVL1599:
 .L1321:
+	.loc 2 2333 0
 	ldr	fp, [r4]
+	.loc 2 2337 0
 	ldr	r10, .L1399+100
+	.loc 2 2333 0
 	ldrb	r3, [fp, #26]	@ zero_extendqisi2
+	.loc 2 2349 0
 	ldrh	r0, [fp, #10]
+	.loc 2 2333 0
 	strb	r3, [r8]
+	.loc 2 2334 0
 	ldrh	r3, [fp, #16]
 	ubfx	r2, r3, #7, #1
+	.loc 2 2335 0
 	ubfx	r1, r3, #3, #1
+	.loc 2 2334 0
 	strb	r2, [r5]
+	.loc 2 2335 0
 	ldr	r2, .L1399+108
+	.loc 2 2338 0
 	ldr	r5, .L1399+112
+	.loc 2 2335 0
 	strb	r1, [r2]
+	.loc 2 2336 0
 	ubfx	r1, r3, #4, #1
 	ldr	r2, .L1399+116
+	.loc 2 2337 0
 	ubfx	r3, r3, #8, #3
 	strb	r3, [r10]
+	.loc 2 2338 0
 	movs	r3, #0
 	str	r3, [r5]
+	.loc 2 2336 0
 	strb	r1, [r2]
+	.loc 2 2349 0
 	ldrb	r1, [fp, #12]	@ zero_extendqisi2
 	bl	__aeabi_idiv
+.LVL1600:
 	mov	r1, r0
 	ldrb	r0, [fp, #18]	@ zero_extendqisi2
 	bl	BuildFlashLsbPageTable
+.LVL1601:
+	.loc 2 2350 0
 	bl	FlashDieInfoInit
+.LVL1602:
+	.loc 2 2351 0
 	ldr	r3, [r4]
 	mov	ip, r5
 	ldrh	r2, [r3, #16]
 	tst	r2, #64
 	beq	.L1330
+	.loc 2 2352 0
 	ldrb	r0, [r3, #19]	@ zero_extendqisi2
 	ldr	r3, .L1399+120
+	.loc 2 2353 0
 	ldr	r2, .L1399+124
+	.loc 2 2352 0
 	strb	r0, [r3]
+	.loc 2 2353 0
 	ldr	r3, .L1399+56
 	ldrb	r1, [r3, #1]	@ zero_extendqisi2
+	.loc 2 2354 0
 	ldrb	lr, [r3, #2]	@ zero_extendqisi2
+	.loc 2 2353 0
 	strb	r1, [r2]
+	.loc 2 2354 0
 	ldr	r1, .L1399+128
 	strb	lr, [r1]
+	.loc 2 2356 0
 	add	lr, r0, #-1
 	cmp	lr, #6
 	b	.L1400
 .L1401:
 	.align	2
 .L1399:
-	.word	.LANCHOR145
-	.word	.LANCHOR151
+	.word	.LANCHOR144
 	.word	.LANCHOR150
-	.word	.LANCHOR28
+	.word	.LANCHOR149
+	.word	.LANCHOR29
 	.word	.LANCHOR194
 	.word	.LANCHOR195
 	.word	.LANCHOR196
-	.word	.LANCHOR148
 	.word	.LANCHOR147
+	.word	.LANCHOR146
 	.word	.LANCHOR22
 	.word	.LANCHOR3
-	.word	.LANCHOR142
-	.word	.LC18
-	.word	.LANCHOR153
+	.word	.LANCHOR141
+	.word	.LC21
+	.word	.LANCHOR152
 	.word	.LANCHOR20
 	.word	.LANCHOR18
-	.word	.LANCHOR29
+	.word	.LANCHOR30
 	.word	.LANCHOR5
 	.word	.LANCHOR197
-	.word	.LANCHOR152
+	.word	.LANCHOR151
 	.word	1446522928
-	.word	.LANCHOR141+32
+	.word	.LANCHOR140+32
 	.word	.LANCHOR7
-	.word	.LC19
+	.word	.LC22
 	.word	.LANCHOR119
 	.word	.LANCHOR24
-	.word	.LANCHOR146
+	.word	.LANCHOR145
 	.word	.LANCHOR198
-	.word	.LANCHOR143
+	.word	.LANCHOR142
 	.word	.LANCHOR27
 	.word	.LANCHOR10
 	.word	.LANCHOR13
-	.word	.LANCHOR149
+	.word	.LANCHOR148
 	.word	.LANCHOR2
 	.word	.LANCHOR1
 	.word	.LANCHOR6
@@ -9832,217 +16421,352 @@ FlashInit:
 .L1400:
 	mov	lr, r1
 	bhi	.L1331
+.LBB406:
+	.loc 2 2359 0
 	ldr	r2, .L1402
 	str	r2, [r5]
+	.loc 2 2360 0
 	subs	r2, r0, #5
 	cmp	r2, #1
 	bhi	.L1332
+	.loc 2 2361 0
 	ldr	r2, .L1402+4
+	.loc 2 2363 0
 	adds	r3, r3, #20
+	.loc 2 2361 0
 	movs	r1, #1
 	str	r1, [r2]
+.LVL1603:
 .L1333:
 	subs	r1, r3, #1
+	.loc 2 2366 0
 	movs	r2, #0
 	adds	r3, r3, #31
+.LVL1604:
 .L1335:
+	.loc 2 2368 0
 	ldrsb	r5, [r1, #1]!
 	cbnz	r5, .L1334
+	.loc 2 2369 0
 	adds	r2, r2, #1
+.LVL1605:
 .L1334:
+	.loc 2 2367 0 discriminator 2
 	cmp	r3, r1
 	bne	.L1335
+	.loc 2 2372 0
 	cmp	r2, #27
 	bls	.L1330
+	.loc 2 2373 0
 	bl	FlashGetReadRetryDefault
+.LVL1606:
+	.loc 2 2374 0
 	bl	FlashSavePhyInfo
+.LVL1607:
 .L1330:
+.LBE406:
+	.loc 2 2399 0
 	ldr	r3, .L1402+8
 	ldr	r2, [r3]
 	ldr	r3, .L1402+12
 	cmp	r2, r3
 	bne	.L1346
+	.loc 2 2399 0 is_stmt 0 discriminator 1
 	ldrb	r3, [r8]	@ zero_extendqisi2
 	cbz	r3, .L1346
+	.loc 2 2400 0 is_stmt 1
 	ldr	r3, [r4]
 	movs	r2, #0
 	strb	r2, [r3, #18]
 .L1346:
+	.loc 2 2406 0
 	ldrb	r3, [r6]	@ zero_extendqisi2
 	cmp	r3, #44
 	bne	.L1347
+	.loc 2 2406 0 is_stmt 0 discriminator 1
 	ldrb	r3, [r7]	@ zero_extendqisi2
 	cbz	r3, .L1347
+	.loc 2 2409 0 is_stmt 1
 	movs	r3, #0
+	.loc 2 2410 0
 	movs	r0, #1
+	.loc 2 2409 0
 	strb	r3, [r7]
+	.loc 2 2410 0
 	bl	FlashSetInterfaceMode
+.LVL1608:
+	.loc 2 2411 0
 	movs	r0, #1
 	bl	NandcSetMode
+.LVL1609:
 .L1347:
+	.loc 2 2428 0
 	movs	r0, #0
 	bl	flash_enter_slc_mode
+.LVL1610:
+	.loc 2 2429 0
 	ldrb	r3, [r10]	@ zero_extendqisi2
 	tst	r3, #6
 	beq	.L1348
+	.loc 2 2430 0
 	ldrb	r2, [r7]	@ zero_extendqisi2
 	cbnz	r2, .L1349
+	.loc 2 2430 0 is_stmt 0 discriminator 1
 	lsls	r3, r3, #31
 	bmi	.L1348
 .L1349:
+	.loc 2 2431 0 is_stmt 1
 	ldr	r3, .L1402+16
 	movs	r0, #0
 	ldr	r1, [r3]
 	bl	FlashDdrParaScan
+.LVL1611:
 .L1348:
+	.loc 2 2438 0
 	movs	r0, #0
+	.loc 2 2544 0
 	movs	r7, #16
+	.loc 2 2438 0
 	bl	flash_exit_slc_mode
+.LVL1612:
+	.loc 2 2531 0
 	ldr	r3, [r4]
 	ldrb	r0, [r3, #20]	@ zero_extendqisi2
 	bl	FlashBchSel
+.LVL1613:
+	.loc 2 2532 0
 	ldr	r0, .L1402+20
 	bl	FlashReadIdbDataRaw
-	ldr	r8, [r4]
+.LVL1614:
+.LBB407:
+	.loc 2 2551 0
+	ldr	r5, [r4]
+.LBE407:
+	.loc 2 2544 0
 	ldr	r3, [sp, #20]
+.LBB408:
+	.loc 2 2551 0
 	ldr	r4, .L1402+24
-	ldrb	r1, [r8, #12]	@ zero_extendqisi2
+.LBE408:
+	.loc 2 2544 0
 	strb	r7, [r3]
-	ldrh	r5, [r8, #10]
-	strh	r1, [r4, #8]	@ movhi
-	ldrb	r3, [r8, #7]	@ zero_extendqisi2
-	mov	r0, r5
+.LVL1615:
+.LBB409:
+	.loc 2 2551 0
+	ldrb	r3, [r5, #12]	@ zero_extendqisi2
+	strh	r3, [r4, #8]	@ movhi
+	.loc 2 2552 0
+	ldrb	r3, [r5, #7]	@ zero_extendqisi2
 	str	r3, [r4, #4]
+	.loc 2 2553 0
 	ldr	r3, [r6]
-	ldrh	r6, [r8, #14]
+	.loc 2 2556 0
+	ldrh	r6, [r5, #14]
+	.loc 2 2553 0
 	str	r3, [r4]
+	.loc 2 2554 0
 	ldr	r3, .L1402+28
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	strh	r3, [r4, #10]	@ movhi
-	ldrb	r3, [r8, #13]	@ zero_extendqisi2
-	strh	r5, [r4, #16]	@ movhi
+	.loc 2 2555 0
+	ldrb	r3, [r5, #13]	@ zero_extendqisi2
+	.loc 2 2556 0
 	strh	r6, [r4, #14]	@ movhi
+	.loc 2 2555 0
 	strh	r3, [r4, #12]	@ movhi
+	.loc 2 2557 0
+	ldrh	r3, [r5, #10]
+	strh	r3, [r4, #16]	@ movhi
+	.loc 2 2558 0
+	ldrb	r1, [r5, #12]	@ zero_extendqisi2
+	ldrh	r0, [r5, #10]
 	bl	__aeabi_idiv
-	mov	r2, #512
+.LVL1616:
 	strh	r0, [r4, #18]	@ movhi
-	ldrb	r3, [r8, #9]	@ zero_extendqisi2
-	strh	r2, [r4, #24]	@ movhi
-	ldr	r2, [sp, #16]
-	strh	r3, [r4, #20]	@ movhi
-	smulbb	r5, r5, r3
+	.loc 2 2559 0
+	ldrb	r2, [r5, #9]	@ zero_extendqisi2
+	strh	r2, [r4, #20]	@ movhi
+	.loc 2 2560 0
+	ldrh	r1, [r5, #10]
+	ldrb	r3, [r5, #9]	@ zero_extendqisi2
+	.loc 2 2562 0
 	strh	r7, [r4, #26]	@ movhi
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	uxth	r5, r5
-	cmp	r2, #1
-	strh	r5, [r4, #22]	@ movhi
+	.loc 2 2560 0
+	smulbb	r3, r3, r1
+	.loc 2 2561 0
+	mov	r1, #512
+	strh	r1, [r4, #24]	@ movhi
+	.loc 2 2563 0
+	ldr	r1, [sp, #16]
+	.loc 2 2560 0
+	uxth	r3, r3
+	.loc 2 2563 0
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	.loc 2 2560 0
+	strh	r3, [r4, #22]	@ movhi
+	.loc 2 2563 0
+	cmp	r1, #1
 	bne	.L1350
+	.loc 2 2568 0
 	lsls	r3, r3, #1
-	lsrs	r2, r6, #1
-	lsls	r5, r5, #1
-	strh	r3, [r4, #20]	@ movhi
+	.loc 2 2566 0
+	lsrs	r1, r6, #1
+	.loc 2 2567 0
+	lsls	r2, r2, #1
+	.loc 2 2568 0
+	strh	r3, [r4, #22]	@ movhi
+	.loc 2 2569 0
 	movs	r3, #8
-	strh	r2, [r4, #14]	@ movhi
-	strh	r5, [r4, #22]	@ movhi
+	.loc 2 2566 0
+	strh	r1, [r4, #14]	@ movhi
+	.loc 2 2567 0
+	strh	r2, [r4, #20]	@ movhi
+	.loc 2 2569 0
 	strh	r3, [r4, #26]	@ movhi
 .L1350:
-	ldrb	r0, [r8, #20]	@ zero_extendqisi2
+.LBE409:
+	.loc 2 2588 0
+	ldrb	r0, [r5, #20]	@ zero_extendqisi2
 	bl	FlashBchSel
+.LVL1617:
+	.loc 2 2592 0
 	movs	r0, #0
+.LVL1618:
 .L1307:
+	.loc 2 2593 0
 	add	sp, sp, #32
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
 .L1318:
+	.cfi_restore_state
+	.loc 2 2260 0
 	cmp	r3, #220
 	bne	.L1319
+	.loc 2 2261 0
 	mov	r1, #4096
 	b	.L1395
 .L1332:
+.LVL1619:
+.LBB410:
+	.loc 2 2363 0
 	add	r2, r3, #28
 	adds	r3, r3, #20
 	cmp	r0, #7
 	it	eq
 	moveq	r3, r2
 	b	.L1333
+.LVL1620:
 .L1331:
+.LBE410:
+	.loc 2 2376 0
 	sub	r3, r0, #17
 	cmp	r3, #2
 	bhi	.L1337
+	.loc 2 2377 0
 	ldr	r3, .L1402+32
+	.loc 2 2379 0
 	cmp	r0, #19
+	.loc 2 2377 0
 	str	r3, [r5]
+	.loc 2 2378 0
 	ite	ne
 	movne	r3, #7
+	.loc 2 2380 0
 	moveq	r3, #15
 	strb	r3, [r1]
 	b	.L1330
 .L1337:
+	.loc 2 2381 0
 	cmp	r0, #33
 	beq	.L1339
+	.loc 2 2381 0 is_stmt 0 discriminator 1
 	sub	r3, r0, #65
 	cmp	r3, #1
 	bhi	.L1340
 .L1339:
+	.loc 2 2382 0 is_stmt 1
 	ldr	r3, .L1402+36
 	str	r3, [ip]
+	.loc 2 2383 0
 	movs	r3, #4
 	strb	r3, [r2]
+	.loc 2 2384 0
 	movs	r3, #7
 	strb	r3, [lr]
 	b	.L1330
 .L1340:
+	.loc 2 2385 0
 	sub	r3, r0, #67
 	uxtb	r3, r3
 	cmp	r3, #1
 	bls	.L1341
+	.loc 2 2385 0 is_stmt 0 discriminator 1
 	sub	r1, r0, #34
 	cmp	r1, #1
 	bhi	.L1342
 .L1341:
+	.loc 2 2386 0 is_stmt 1
 	ldr	r1, .L1402+36
+	.loc 2 2388 0
 	cmp	r0, #35
+	.loc 2 2386 0
 	str	r1, [ip]
 	ldr	r1, .L1402+40
+	.loc 2 2388 0
 	beq	.L1343
+	.loc 2 2388 0 is_stmt 0 discriminator 1
 	cmp	r0, #68
 	beq	.L1343
+	.loc 2 2387 0 is_stmt 1
 	movs	r0, #7
 .L1396:
+	.loc 2 2390 0
 	cmp	r3, #1
+	.loc 2 2389 0
 	strb	r0, [r1]
+	.loc 2 2391 0
 	ite	ls
 	movls	r3, #4
+	.loc 2 2393 0
 	movhi	r3, #5
 	strb	r3, [r2]
 	b	.L1330
 .L1343:
+	.loc 2 2389 0
 	movs	r0, #17
 	b	.L1396
 .L1342:
+	.loc 2 2394 0
 	cmp	r0, #49
+	.loc 2 2395 0
 	itt	eq
 	ldreq	r3, .L1402+44
 	streq	r3, [r5]
 	b	.L1330
+.LVL1621:
 .L1352:
+	.loc 2 2220 0
 	mvn	r0, #1
 	b	.L1307
 .L1403:
 	.align	2
 .L1402:
 	.word	HynixReadRetrial
-	.word	.LANCHOR34
-	.word	.LANCHOR152
+	.word	.LANCHOR35
+	.word	.LANCHOR151
 	.word	1446522928
-	.word	.LANCHOR146
-	.word	.LANCHOR139
+	.word	.LANCHOR145
+	.word	.LANCHOR138
 	.word	.LANCHOR15
 	.word	.LANCHOR25
 	.word	MicronReadRetrial
 	.word	ToshibaReadRetrial
-	.word	.LANCHOR149
+	.word	.LANCHOR148
 	.word	SamsungReadRetrial
+	.cfi_endproc
+.LFE252:
 	.size	FlashInit, .-FlashInit
 	.section	.text.FlashReadSlc2KPages,"ax",%progbits
 	.align	1
@@ -10053,54 +16777,102 @@ FlashInit:
 	.fpu softvfp
 	.type	FlashReadSlc2KPages, %function
 FlashReadSlc2KPages:
-	@ args = 0, pretend = 0, frame = 8
+.LFB258:
+	.loc 2 2761 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r8, r1
+.LVL1622:
+	.loc 2 2767 0
 	ldr	r3, .L1433
-	mov	fp, r2
+	.loc 2 2761 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	mov	r8, r1
+	.loc 2 2794 0
+	ldr	fp, .L1433+28
 	mov	r4, r0
+	.loc 2 2771 0
 	movs	r7, #0
+	.loc 2 2761 0
+	sub	sp, sp, #24
+	.cfi_def_cfa_offset 56
+	.loc 2 2767 0
 	ldrb	r10, [r3, #9]	@ zero_extendqisi2
+.LVL1623:
+	.loc 2 2761 0
+	str	r2, [sp, #12]
+.LVL1624:
 .L1405:
+	.loc 2 2771 0 discriminator 1
 	cmp	r7, r8
 	bne	.L1418
+	.loc 2 2815 0
 	movs	r0, #0
-	add	sp, sp, #16
+	add	sp, sp, #24
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1625:
 .L1418:
+	.cfi_restore_state
+	.loc 2 2772 0
 	sub	r3, r8, r7
-	add	r2, sp, #12
+	add	r2, sp, #20
 	uxtb	r3, r3
-	mov	r1, fp
+	ldr	r1, [sp, #12]
 	mov	r0, r4
 	str	r3, [sp]
-	add	r3, sp, #8
+	add	r3, sp, #16
 	bl	LogAddr2PhyAddr
+.LVL1626:
+	.loc 2 2773 0
 	ldr	r2, .L1433+4
-	ldr	r3, [sp, #8]
+	ldr	r3, [sp, #16]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, r3
 	bhi	.L1406
+	.loc 2 2774 0
 	mov	r3, #-1
 	str	r3, [r4]
 .L1407:
+	.loc 2 2771 0 discriminator 2
 	adds	r7, r7, #1
+.LVL1627:
 	adds	r4, r4, #36
 	b	.L1405
 .L1406:
+	.loc 2 2777 0
 	ldr	r2, .L1433+8
 	ldrb	r5, [r2, r3]	@ zero_extendqisi2
+.LVL1628:
+	.loc 2 2778 0
 	mov	r0, r5
 	bl	NandcWaitFlashReady
+.LVL1629:
+	.loc 2 2779 0
 	mov	r0, r5
 	bl	NandcFlashCs
-	ldr	r1, [sp, #12]
+.LVL1630:
+	.loc 2 2780 0
+	ldr	r1, [sp, #20]
 	mov	r0, r5
 	bl	FlashReadCmd
+.LVL1631:
+	.loc 2 2781 0
 	mov	r0, r5
 	bl	NandcWaitFlashReady
+.LVL1632:
+	.loc 2 2782 0
 	ldr	r3, [r4, #12]
 	mov	r2, r10
 	movs	r1, #0
@@ -10108,88 +16880,129 @@ FlashReadSlc2KPages:
 	str	r3, [sp]
 	ldr	r3, [r4, #8]
 	bl	NandcXferData
+.LVL1633:
+	.loc 2 2785 0
 	ldr	r3, .L1433+12
+	.loc 2 2782 0
 	mov	r6, r0
-	ldr	r1, [sp, #12]
+.LVL1634:
+	.loc 2 2785 0
+	ldr	r1, [sp, #20]
 	mov	r0, r5
+.LVL1635:
 	ldr	r3, [r3]
 	add	r1, r1, r3
 	bl	FlashReadCmd
+.LVL1636:
+	.loc 2 2787 0
 	ldr	r3, [r4, #8]
+	.loc 2 2786 0
 	cbz	r3, .L1408
+	.loc 2 2786 0 is_stmt 0 discriminator 1
 	add	r3, r3, #2048
 .L1408:
+	.loc 2 2788 0 is_stmt 1 discriminator 4
 	ldr	r2, [r4, #12]
+	.loc 2 2786 0 discriminator 4
 	cbz	r2, .L1409
+	.loc 2 2786 0 is_stmt 0 discriminator 5
 	adds	r2, r2, #8
 .L1409:
+	.loc 2 2786 0 discriminator 8
 	str	r2, [sp]
 	movs	r1, #0
 	mov	r2, r10
 	mov	r0, r5
 	bl	NandcXferData
+.LVL1637:
 	mov	r1, r0
+.LVL1638:
+	.loc 2 2789 0 is_stmt 1 discriminator 8
 	mov	r0, r5
+.LVL1639:
 	bl	NandcFlashDeCs
-	ldr	r3, .L1433+16
+.LVL1640:
+	.loc 2 2794 0 discriminator 8
+	ldrb	r3, [fp]	@ zero_extendqisi2
 	cmp	r6, r1
 	it	cc
 	movcc	r6, r1
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	add	r3, r2, r2, lsl #1
+.LVL1641:
+	add	r3, r3, r3, lsl #1
 	cmp	r6, r3, asr #2
 	bls	.L1410
-	adds	r5, r6, #1
+	.loc 2 2795 0 discriminator 1
+	adds	r0, r6, #1
 	it	ne
 	movne	r6, #256
+	.loc 2 2798 0 discriminator 1
 	str	r6, [r4]
 .L1413:
+	.loc 2 2801 0
 	ldr	r3, [r4, #12]
 	cbz	r3, .L1414
-	ldr	r1, [r3, #8]
-	adds	r0, r1, #1
+	.loc 2 2802 0
+	ldr	r2, [r3, #8]
+	adds	r1, r2, #1
+.LVL1642:
 	bne	.L1414
+	.loc 2 2802 0 is_stmt 0 discriminator 1
 	ldr	r3, [r3]
 	adds	r3, r3, #1
+	.loc 2 2803 0 is_stmt 1 discriminator 1
 	it	ne
-	strne	r1, [r4]
+	strne	r2, [r4]
 .L1414:
+	.loc 2 2806 0
 	ldr	r3, [r4]
-	adds	r1, r3, #1
+	adds	r2, r3, #1
 	bne	.L1407
+	.loc 2 2807 0
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1433+20
+	ldrb	r2, [fp]	@ zero_extendqisi2
+	ldr	r0, .L1433+16
 	bl	printf
+.LVL1643:
+	.loc 2 2808 0
 	ldr	r1, [r4, #8]
 	cbz	r1, .L1416
+	.loc 2 2809 0
 	movs	r3, #8
 	movs	r2, #4
-	ldr	r0, .L1433+24
+	ldr	r0, .L1433+20
 	bl	rknand_print_hex
+.LVL1644:
 .L1416:
+	.loc 2 2810 0
 	ldr	r1, [r4, #12]
 	cmp	r1, #0
 	beq	.L1407
+	.loc 2 2811 0
 	movs	r3, #4
-	ldr	r0, .L1433+28
+	ldr	r0, .L1433+24
 	mov	r2, r3
 	bl	rknand_print_hex
+.LVL1645:
 	b	.L1407
+.LVL1646:
 .L1410:
+	.loc 2 2800 0
 	movs	r3, #0
 	str	r3, [r4]
 	b	.L1413
 .L1434:
 	.align	2
 .L1433:
-	.word	.LANCHOR29
+	.word	.LANCHOR30
 	.word	.LANCHOR25
 	.word	.LANCHOR26
 	.word	.LANCHOR3
-	.word	.LANCHOR31
-	.word	.LC20
-	.word	.LC21
-	.word	.LC22
+	.word	.LC23
+	.word	.LC24
+	.word	.LC25
+	.word	.LANCHOR32
+	.cfi_endproc
+.LFE258:
 	.size	FlashReadSlc2KPages, .-FlashReadSlc2KPages
 	.section	.text.FlashReadPages,"ax",%progbits
 	.align	1
@@ -10200,132 +17013,230 @@ FlashReadSlc2KPages:
 	.fpu softvfp
 	.type	FlashReadPages, %function
 FlashReadPages:
+.LFB261:
+	.loc 2 2941 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1647:
+	.loc 2 2956 0
 	ldr	r3, .L1526
+	.loc 2 2941 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
 	sub	sp, sp, #40
+	.cfi_def_cfa_offset 72
+	.loc 2 2941 0
 	mov	r10, r0
 	str	r1, [sp, #24]
+	.loc 2 2956 0
 	ldrb	r3, [r3]	@ zero_extendqisi2
+	.loc 2 2941 0
 	str	r2, [sp, #12]
+	.loc 2 2956 0
 	cbnz	r3, .L1436
+	.loc 2 2948 0
 	ldr	r2, .L1526+4
+.LVL1648:
+	.loc 2 2949 0
 	mov	r8, r3
 	str	r3, [sp, #8]
+	.loc 2 2948 0
 	ldrb	r2, [r2, #9]	@ zero_extendqisi2
 	str	r2, [sp, #20]
+	.loc 2 2949 0
 	ldr	r2, .L1526+8
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	str	r2, [sp, #28]
+.LVL1649:
 .L1437:
+	.loc 2 2962 0 discriminator 1
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #24]
 	cmp	r3, r2
 	bcc	.L1475
+	.loc 2 3081 0
 	movs	r0, #0
 	b	.L1435
+.LVL1650:
 .L1436:
+	.loc 2 2957 0
 	bl	FlashReadSlc2KPages
+.LVL1651:
 .L1435:
+	.loc 2 3082 0
 	add	sp, sp, #40
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1652:
 .L1475:
+	.cfi_restore_state
+	.loc 2 2963 0
 	ldr	r2, [sp, #8]
 	movs	r3, #36
+.LVL1653:
+	.loc 2 2964 0
 	ldr	r1, [sp, #12]
+	.loc 2 2963 0
 	mul	fp, r3, r2
 	add	r7, r10, fp
 	ldr	r3, [r7, #4]
+	.loc 2 2964 0
 	mov	r0, r7
+	.loc 2 2963 0
 	str	r3, [sp, #16]
+.LVL1654:
+	.loc 2 2964 0
 	ldr	r3, [sp, #24]
+.LVL1655:
 	subs	r3, r3, r2
 	add	r2, sp, #36
 	uxtb	r3, r3
 	str	r3, [sp]
+.LVL1656:
 	add	r3, sp, #32
 	bl	LogAddr2PhyAddr
+.LVL1657:
+	.loc 2 2965 0
 	ldr	r2, .L1526+12
+	.loc 2 2964 0
 	mov	r5, r0
+.LVL1658:
+	.loc 2 2965 0
 	ldr	r3, [sp, #32]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, r3
 	bhi	.L1439
+	.loc 2 2966 0
 	mov	r3, #-1
 	str	r3, [r10, fp]
+.LVL1659:
 .L1440:
+	.loc 2 2962 0 discriminator 2
 	ldr	r3, [sp, #8]
 	adds	r3, r3, #1
 	str	r3, [sp, #8]
+.LVL1660:
 	b	.L1437
+.LVL1661:
 .L1439:
+	.loc 2 2969 0
 	ldr	r2, .L1526+16
 	ldrb	r4, [r2, r3]	@ zero_extendqisi2
+.LVL1662:
+	.loc 2 2970 0
 	ldr	r3, .L1526+20
+	.loc 2 2973 0
 	mov	r0, r4
+.LVL1663:
+	.loc 2 2970 0
 	ldrb	r3, [r3]	@ zero_extendqisi2
+	.loc 2 2971 0
 	cmp	r3, #0
 	it	eq
 	moveq	r5, #0
+.LVL1664:
+	.loc 2 2973 0
 	bl	NandcWaitFlashReady
+.LVL1665:
+	.loc 2 2974 0
 	ldr	r3, .L1526+24
 	ldr	r3, [r3]
 	ldrb	r1, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r1, #1
 	cmp	r3, #6
 	bhi	.L1442
+.LBB411:
+	.loc 2 2975 0
 	ldr	r3, .L1526+28
+	.loc 2 2976 0
 	cmp	r1, #7
+	.loc 2 2975 0
 	add	r2, r3, r4
 	ldrb	r3, [r2, #12]	@ zero_extendqisi2
+.LVL1666:
+	.loc 2 2977 0
 	it	eq
 	ldrbeq	r3, [r2, #20]	@ zero_extendqisi2
+.LVL1667:
+	.loc 2 2978 0
 	ldr	r2, .L1526+32
 	ldrb	r2, [r2, r4]	@ zero_extendqisi2
 	cmp	r2, r3
 	beq	.L1442
+	.loc 2 2979 0
 	ldr	r2, .L1526+36
 	mov	r0, r4
 	ldrb	r1, [r2, #-3]	@ zero_extendqisi2
 	bl	HynixSetRRPara
+.LVL1668:
 .L1442:
+.LBE411:
+	.loc 2 2982 0
 	mov	r0, r4
 	bl	NandcFlashCs
+.LVL1669:
+	.loc 2 2984 0
 	ldr	r3, [sp, #12]
 	cmp	r3, #1
 	beq	.L1444
+	.loc 2 2984 0 is_stmt 0 discriminator 2
 	ldr	r3, [sp, #16]
 	cmp	r3, #0
 	bge	.L1445
 .L1444:
+	.loc 2 2984 0 discriminator 3
 	ldr	r3, .L1526+40
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cbz	r3, .L1445
+	.loc 2 2985 0 is_stmt 1
 	mov	r0, r4
 	bl	flash_enter_slc_mode
+.LVL1670:
 .L1452:
+	.loc 2 2989 0
 	ldr	r1, [sp, #36]
 	adds	r6, r1, #1
 	bne	.L1447
+	.loc 2 2989 0 is_stmt 0 discriminator 1
 	cmp	r4, #255
 	beq	.L1477
 .L1447:
+.LVL1671:
+	.loc 2 2991 0 is_stmt 1
 	cbz	r5, .L1449
+	.loc 2 2992 0
 	ldr	r3, .L1526+44
 	mov	r0, r4
 	ldr	r2, [r3]
 	add	r2, r2, r1
 	bl	FlashReadDpCmd
+.LVL1672:
 .L1450:
+	.loc 2 3001 0
 	mov	r0, r4
 	bl	NandcWaitFlashReady
+.LVL1673:
+	.loc 2 3002 0
 	cbz	r5, .L1448
+.LVL1674:
+	.loc 2 3003 0
 	ldr	r1, [sp, #36]
 	mov	r0, r4
 	bl	FlashReadDpDataOutCmd
+.LVL1675:
 .L1448:
+	.loc 2 3004 0
 	ldr	r3, [r7, #12]
 	movs	r1, #0
 	ldr	r2, [sp, #20]
@@ -10333,112 +17244,182 @@ FlashReadPages:
 	str	r3, [sp]
 	ldr	r3, [r7, #8]
 	bl	NandcXferData
+.LVL1676:
+	.loc 2 3008 0
 	ldr	r3, .L1526+8
+	.loc 2 3004 0
 	mov	r6, r0
+.LVL1677:
+	.loc 2 3008 0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cbz	r3, .L1451
+	.loc 2 3008 0 is_stmt 0 discriminator 1
 	adds	r0, r0, #1
+.LVL1678:
 	bne	.L1451
+	.loc 2 3009 0 is_stmt 1
 	ldr	r3, .L1526+8
 	movs	r5, #0
 	strb	r5, [r3]
+.LVL1679:
+	.loc 2 3011 0
 	b	.L1452
+.LVL1680:
 .L1445:
+	.loc 2 2987 0
 	mov	r0, r4
 	bl	flash_exit_slc_mode
+.LVL1681:
 	b	.L1452
+.LVL1682:
 .L1449:
+	.loc 2 2994 0
 	mov	r0, r4
 	bl	FlashReadCmd
+.LVL1683:
 	b	.L1450
+.LVL1684:
 .L1477:
+	.loc 2 2997 0
 	movs	r5, #0
+.LVL1685:
 	b	.L1448
+.LVL1686:
 .L1451:
+	.loc 2 3013 0
 	cbz	r5, .L1453
+	.loc 2 3014 0
 	ldr	r3, .L1526+44
 	mov	r0, r4
 	ldr	r1, [sp, #36]
 	ldr	r3, [r3]
 	add	r1, r1, r3
 	bl	FlashReadDpDataOutCmd
+.LVL1687:
+	.loc 2 3016 0
 	add	r3, fp, #36
+	.loc 2 3015 0
 	movs	r1, #0
+	.loc 2 3016 0
 	add	r3, r3, r10
+	.loc 2 3015 0
 	mov	r0, r4
 	ldr	r2, [r3, #12]
 	str	r2, [sp]
 	ldr	r2, [sp, #20]
 	ldr	r3, [r3, #8]
 	bl	NandcXferData
+.LVL1688:
+	.loc 2 3019 0
 	cmp	r0, #-1
+	.loc 2 3015 0
 	mov	r8, r0
+.LVL1689:
+	.loc 2 3019 0
 	it	eq
 	moveq	r5, #0
+.LVL1690:
 .L1453:
+	.loc 2 3021 0
 	mov	r0, r4
 	bl	NandcFlashDeCs
+.LVL1691:
+	.loc 2 3022 0
 	ldr	r3, .L1526+8
+	.loc 2 3023 0
 	adds	r1, r6, #1
+	.loc 2 3022 0
 	ldrb	r2, [sp, #28]	@ zero_extendqisi2
 	strb	r2, [r3]
+	.loc 2 3023 0
 	bne	.L1454
+	.loc 2 3023 0 is_stmt 0 discriminator 1
 	ldr	r3, .L1526+48
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cbnz	r3, .L1455
+.LVL1692:
 .L1459:
+	.loc 2 3032 0 is_stmt 1
 	ldr	r3, .L1526+52
 	ldr	r5, [r3]
 	cmp	r5, #0
 	bne	.L1456
+	.loc 2 3049 0
 	ldr	r3, [r7, #12]
 	mov	r0, r4
 	ldr	r2, [r7, #8]
 	ldr	r1, [sp, #36]
 	bl	FlashReadRawPage
+.LVL1693:
 	b	.L1525
+.LVL1694:
 .L1455:
+.LBB412:
+	.loc 2 3024 0
 	ldr	r3, .L1526+56
+	.loc 2 3026 0
 	mov	r0, r4
 	ldr	r1, [sp, #36]
+	.loc 2 3024 0
 	ldr	r3, [r3]
 	ldr	r5, [r3, #304]
+.LVL1695:
+	.loc 2 3026 0
 	movs	r3, #1
 	str	r3, [sp]
 	ldr	r2, [r7, #8]
 	ldr	r3, [r7, #12]
 	bl	FlashDdrTunningRead
+.LVL1696:
+	.loc 2 3027 0
 	adds	r2, r0, #1
+	.loc 2 3026 0
 	mov	r6, r0
+.LVL1697:
+	.loc 2 3027 0
 	beq	.L1458
+	.loc 2 3027 0 is_stmt 0 discriminator 1
 	ldr	r3, .L1526+60
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r0, r3, lsr #1
 	bls	.L1478
 .L1458:
+	.loc 2 3028 0 is_stmt 1
 	ubfx	r0, r5, #8, #8
+.LVL1698:
 	bl	NandcSetDdrPara
+.LVL1699:
+.LBE412:
+	.loc 2 3030 0
 	adds	r3, r6, #1
 	beq	.L1459
 .L1478:
+.LBB413:
+	.loc 2 3025 0
 	movs	r5, #0
+.LVL1700:
 .L1454:
+.LBE413:
+	.loc 2 3051 0
 	ldr	r3, .L1526+60
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r6, r3, asr #2
 	bls	.L1467
+	.loc 2 3051 0 is_stmt 0 discriminator 1
 	ldr	r3, .L1526+52
 	ldr	r3, [r3]
 	cmp	r3, #0
 	bne	.L1467
+	.loc 2 3052 0 is_stmt 1
 	mov	r6, #256
+.LVL1701:
 	b	.L1462
 .L1527:
 	.align	2
 .L1526:
 	.word	.LANCHOR1
-	.word	.LANCHOR29
+	.word	.LANCHOR30
 	.word	.LANCHOR5
 	.word	.LANCHOR25
 	.word	.LANCHOR26
@@ -10449,58 +17430,86 @@ FlashReadPages:
 	.word	.LANCHOR20+4
 	.word	.LANCHOR8
 	.word	.LANCHOR3
-	.word	.LANCHOR28
-	.word	.LANCHOR143
+	.word	.LANCHOR29
+	.word	.LANCHOR142
 	.word	.LANCHOR19
-	.word	.LANCHOR31
+	.word	.LANCHOR32
+.LVL1702:
 .L1456:
+	.loc 2 3034 0
 	ldr	r3, [r7, #12]
 	mov	r0, r4
 	ldr	r2, [r7, #8]
 	ldr	r1, [sp, #36]
 	blx	r5
+.LVL1703:
+	.loc 2 3035 0
 	adds	r5, r0, #1
+	.loc 2 3034 0
 	mov	r6, r0
+.LVL1704:
+	.loc 2 3035 0
 	bne	.L1460
+	.loc 2 3036 0
 	ldr	r3, .L1528
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	cmp	r3, #6
 	bhi	.L1461
+	.loc 2 3037 0
 	ldr	r2, .L1528+4
 	movs	r3, #0
 	mov	r0, r4
+.LVL1705:
 	ldrb	r1, [r2, #-3]	@ zero_extendqisi2
 	bl	HynixSetRRPara
+.LVL1706:
 .L1461:
+	.loc 2 3038 0
 	ldr	r3, [r7, #12]
 	mov	r0, r4
 	ldr	r2, [r7, #8]
 	ldr	r1, [sp, #36]
 	bl	FlashReadRawPage
+.LVL1707:
+	.loc 2 3039 0
 	ldr	r2, .L1528+8
+	.loc 2 3038 0
 	mov	r6, r0
+.LVL1708:
+	.loc 2 3039 0
 	mov	r3, r0
 	ldr	r1, [r7, #4]
 	ldr	r0, .L1528+12
+.LVL1709:
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	bl	printf
+.LVL1710:
+	.loc 2 3040 0
 	adds	r0, r6, #1
 	bne	.L1460
+	.loc 2 3040 0 is_stmt 0 discriminator 1
 	ldr	r3, .L1528+16
 	ldrb	r5, [r3]	@ zero_extendqisi2
 	cbz	r5, .L1462
+	.loc 2 3041 0 is_stmt 1
 	ldr	r3, [sp, #12]
+	.loc 2 3042 0
 	mov	r0, r4
+	.loc 2 3041 0
 	cmp	r3, #1
 	beq	.L1463
+	.loc 2 3041 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #16]
 	cmp	r3, #0
 	bge	.L1464
 .L1463:
+	.loc 2 3042 0 is_stmt 1
 	bl	flash_enter_slc_mode
+.LVL1711:
 .L1465:
+	.loc 2 3045 0
 	ldr	r3, .L1528+20
 	mov	r0, r4
 	ldr	r2, [r7, #8]
@@ -10508,75 +17517,113 @@ FlashReadPages:
 	ldr	r5, [r3]
 	ldr	r3, [r7, #12]
 	blx	r5
+.LVL1712:
 .L1525:
+	.loc 2 3059 0
 	adds	r1, r0, #1
+	.loc 2 3049 0
 	mov	r6, r0
+.LVL1713:
 	mov	r5, #0
+	.loc 2 3059 0
 	bne	.L1467
+.LVL1714:
 .L1462:
+	.loc 2 3058 0
 	str	r6, [r10, fp]
 .L1468:
+	.loc 2 3062 0
 	ldr	r3, [r10, fp]
 	adds	r2, r3, #1
 	bne	.L1470
+	.loc 2 3063 0
 	ldr	r2, .L1528+8
 	ldr	r1, [r7, #4]
 	ldr	r0, .L1528+24
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	bl	printf
+.LVL1715:
+	.loc 2 3066 0
 	ldr	r1, [r7, #12]
 	cbz	r1, .L1470
+	.loc 2 3067 0
 	movs	r3, #4
 	ldr	r0, .L1528+28
 	mov	r2, r3
 	bl	rknand_print_hex
+.LVL1716:
 .L1470:
+	.loc 2 3069 0
 	cbz	r5, .L1472
+	.loc 2 3070 0
 	ldr	r3, .L1528+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r8, r3, asr #2
 	bls	.L1473
+	.loc 2 3070 0 is_stmt 0 discriminator 1
 	ldr	r3, .L1528+20
 	ldr	r3, [r3]
+	.loc 2 3071 0 is_stmt 1 discriminator 1
 	cmp	r3, #0
 	it	eq
 	moveq	r8, #256
+.LVL1717:
 .L1473:
+	.loc 2 3074 0
 	cmp	r8, #-1
+	.loc 2 3073 0
 	add	r3, fp, #36
 	str	r8, [r10, r3]
+	.loc 2 3074 0
 	beq	.L1472
+	.loc 2 3074 0 is_stmt 0 discriminator 1
 	cmp	r8, #256
+	.loc 2 3075 0 is_stmt 1 discriminator 1
 	itt	ne
 	movne	r2, #0
 	strne	r2, [r10, r3]
 .L1472:
+	.loc 2 3077 0
 	ldr	r3, [sp, #8]
 	add	r3, r3, r5
 	str	r3, [sp, #8]
+.LVL1718:
+	.loc 2 3078 0
 	ldr	r3, [sp, #12]
+.LVL1719:
 	cmp	r3, #1
 	beq	.L1474
+	.loc 2 3078 0 is_stmt 0 discriminator 2
 	ldr	r3, [sp, #16]
 	cmp	r3, #0
 	bge	.L1440
 .L1474:
+	.loc 2 3078 0 discriminator 3
 	ldr	r3, .L1528+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
 	beq	.L1440
+	.loc 2 3079 0 is_stmt 1
 	mov	r0, r4
 	bl	flash_exit_slc_mode
+.LVL1720:
 	b	.L1440
+.LVL1721:
 .L1464:
+	.loc 2 3044 0
 	bl	flash_exit_slc_mode
+.LVL1722:
 	b	.L1465
 .L1460:
+	.loc 2 3031 0
 	movs	r5, #0
+.LVL1723:
 .L1467:
+	.loc 2 3059 0 discriminator 1
 	cmp	r6, #256
 	beq	.L1462
+	.loc 2 3060 0
 	movs	r3, #0
 	str	r3, [r10, fp]
 	b	.L1468
@@ -10585,12 +17632,14 @@ FlashReadPages:
 .L1528:
 	.word	.LANCHOR18
 	.word	.LANCHOR20+4
-	.word	.LANCHOR31
-	.word	.LC23
+	.word	.LANCHOR32
+	.word	.LC26
 	.word	.LANCHOR8
-	.word	.LANCHOR143
-	.word	.LC20
-	.word	.LC22
+	.word	.LANCHOR142
+	.word	.LC23
+	.word	.LC25
+	.cfi_endproc
+.LFE261:
 	.size	FlashReadPages, .-FlashReadPages
 	.section	.text.FlashProgSlc2KPages,"ax",%progbits
 	.align	1
@@ -10601,207 +17650,338 @@ FlashReadPages:
 	.fpu softvfp
 	.type	FlashProgSlc2KPages, %function
 FlashProgSlc2KPages:
+.LFB259:
+	.loc 2 2818 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1724:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
 	sub	sp, sp, #64
+	.cfi_def_cfa_offset 96
+	.loc 2 2818 0
 	str	r3, [sp, #12]
-	mov	r8, r1
+	mov	r10, r1
+	mov	r8, r2
 	mov	r4, r0
-	mov	r6, r0
+	.loc 2 2825 0
 	ldr	r3, .L1559
-	movs	r7, #0
+.LVL1725:
+	.loc 2 2827 0
+	mov	r6, r0
+	.loc 2 2852 0
 	ldr	fp, .L1559+28
-	str	r2, [sp, #8]
-	ldrb	r10, [r3, #9]	@ zero_extendqisi2
+	.loc 2 2827 0
+	movs	r7, #0
+	.loc 2 2825 0
+	ldrb	r3, [r3, #9]	@ zero_extendqisi2
+	str	r3, [sp, #8]
+.LVL1726:
 .L1531:
-	cmp	r7, r8
+	.loc 2 2827 0 discriminator 1
+	cmp	r7, r10
 	bne	.L1537
+	.loc 2 2866 0
 	ldr	r3, [sp, #12]
 	cmp	r3, #0
 	bne	.L1548
+.LVL1727:
 .L1558:
+	.loc 2 2899 0
 	movs	r0, #0
 	add	sp, sp, #64
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1728:
 .L1537:
-	sub	r3, r8, r7
+	.cfi_restore_state
+	.loc 2 2832 0
+	sub	r3, r10, r7
 	add	r2, sp, #20
 	uxtb	r3, r3
-	ldr	r1, [sp, #8]
+	mov	r1, r8
 	mov	r0, r6
 	str	r3, [sp]
 	add	r3, sp, #24
 	bl	LogAddr2PhyAddr
+.LVL1729:
+	.loc 2 2834 0
 	ldr	r2, .L1559+4
 	ldr	r3, [sp, #24]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, r3
 	bhi	.L1532
+	.loc 2 2835 0
 	mov	r3, #-1
 	str	r3, [r6]
 .L1533:
+	.loc 2 2827 0 discriminator 2
 	adds	r7, r7, #1
+.LVL1730:
 	adds	r6, r6, #36
 	b	.L1531
 .L1532:
+	.loc 2 2838 0
 	ldr	r2, .L1559+8
 	ldrb	r5, [r2, r3]	@ zero_extendqisi2
+.LVL1731:
+	.loc 2 2839 0
 	mov	r0, r5
 	bl	NandcWaitFlashReady
+.LVL1732:
+	.loc 2 2840 0
 	mov	r0, r5
 	bl	NandcFlashCs
+.LVL1733:
+	.loc 2 2841 0
 	ldr	r1, [sp, #20]
 	mov	r0, r5
 	bl	FlashProgFirstCmd
+.LVL1734:
+	.loc 2 2842 0
 	ldr	r3, [r6, #12]
-	mov	r2, r10
 	movs	r1, #1
+	ldr	r2, [sp, #8]
 	mov	r0, r5
 	str	r3, [sp]
 	ldr	r3, [r6, #8]
 	bl	NandcXferData
+.LVL1735:
+	.loc 2 2843 0
 	ldr	r1, [sp, #20]
 	mov	r0, r5
 	bl	FlashProgSecondCmd
+.LVL1736:
+	.loc 2 2844 0
 	mov	r0, r5
 	bl	NandcWaitFlashReady
+.LVL1737:
+	.loc 2 2845 0
 	ldr	r1, [sp, #20]
 	mov	r0, r5
 	bl	FlashReadStatus
+.LVL1738:
+	.loc 2 2847 0
 	sbfx	r0, r0, #0, #1
+.LVL1739:
+	.loc 2 2852 0
 	ldr	r1, [sp, #20]
+	.loc 2 2850 0
 	str	r0, [r6]
+	.loc 2 2852 0
 	mov	r0, r5
 	ldr	r3, [fp]
 	add	r1, r1, r3
 	bl	FlashProgFirstCmd
+.LVL1740:
+	.loc 2 2854 0
 	ldr	r3, [r6, #8]
+	.loc 2 2853 0
 	cbz	r3, .L1534
+	.loc 2 2853 0 is_stmt 0 discriminator 1
 	add	r3, r3, #2048
 .L1534:
+	.loc 2 2855 0 is_stmt 1 discriminator 4
 	ldr	r2, [r6, #12]
+	.loc 2 2853 0 discriminator 4
 	cbz	r2, .L1535
+	.loc 2 2853 0 is_stmt 0 discriminator 5
 	adds	r2, r2, #8
 .L1535:
+	.loc 2 2853 0 discriminator 8
 	str	r2, [sp]
 	movs	r1, #1
-	mov	r2, r10
+	ldr	r2, [sp, #8]
 	mov	r0, r5
 	bl	NandcXferData
+.LVL1741:
+	.loc 2 2856 0 is_stmt 1 discriminator 8
 	ldr	r3, [fp]
 	mov	r0, r5
 	ldr	r1, [sp, #20]
 	add	r1, r1, r3
 	bl	FlashProgSecondCmd
+.LVL1742:
+	.loc 2 2857 0 discriminator 8
 	mov	r0, r5
 	bl	NandcWaitFlashReady
+.LVL1743:
+	.loc 2 2858 0 discriminator 8
 	ldr	r1, [sp, #20]
 	mov	r0, r5
 	bl	FlashReadStatus
+.LVL1744:
+	.loc 2 2860 0 discriminator 8
 	lsls	r2, r0, #31
+	.loc 2 2863 0 discriminator 8
 	mov	r0, r5
+.LVL1745:
+	.loc 2 2861 0 discriminator 8
 	itt	mi
 	movmi	r3, #-1
 	strmi	r3, [r6]
+	.loc 2 2863 0 discriminator 8
 	bl	NandcFlashDeCs
+.LVL1746:
 	b	.L1533
+.LVL1747:
 .L1544:
+.LBB414:
+	.loc 2 2869 0
 	ldr	r3, [r4]
 	adds	r3, r3, #1
 	bne	.L1539
+	.loc 2 2870 0
 	ldr	r1, [r4, #4]
 	ldr	r0, .L1559+12
 	bl	printf
+.LVL1748:
 .L1540:
-	add	r8, r8, #1
+.LBE414:
+	.loc 2 2867 0 discriminator 2
+	adds	r6, r6, #1
+.LVL1749:
 	adds	r4, r4, #36
+.LVL1750:
 .L1538:
-	cmp	r7, r8
+	.loc 2 2867 0 is_stmt 0 discriminator 1
+	cmp	r7, r6
 	bne	.L1544
 	b	.L1558
 .L1539:
-	sub	r3, r7, r8
-	ldr	fp, .L1559+32
-	uxtb	r3, r3
+.LBB415:
+	.loc 2 2873 0 is_stmt 1
+	subs	r3, r7, r6
 	add	r2, sp, #20
-	ldr	r1, [sp, #8]
+	uxtb	r3, r3
+	mov	r1, r8
 	mov	r0, r4
+	.loc 2 2875 0
+	ldr	fp, .L1559+32
+	.loc 2 2873 0
 	str	r3, [sp]
 	add	r3, sp, #24
 	bl	LogAddr2PhyAddr
-	ldr	lr, [r10]
+.LVL1751:
+	.loc 2 2874 0
+	ldr	r2, [r10]
 	movs	r3, #0
-	ldr	ip, [fp]
-	mov	r6, r4
+	.loc 2 2876 0
+	mov	ip, r4
 	add	r5, sp, #28
-	str	r3, [lr]
-	str	r3, [ip]
-	ldmia	r6!, {r0, r1, r2, r3}
+	.loc 2 2874 0
+	str	r3, [r2]
+	.loc 2 2875 0
+	ldr	r2, [fp]
+	str	r3, [r2]
+	.loc 2 2876 0
+	ldmia	ip!, {r0, r1, r2, r3}
 	stmia	r5!, {r0, r1, r2, r3}
-	str	lr, [sp, #36]
-	ldmia	r6!, {r0, r1, r2, r3}
-	str	ip, [sp, #40]
+	ldmia	ip!, {r0, r1, r2, r3}
 	stmia	r5!, {r0, r1, r2, r3}
+	.loc 2 2879 0
+	mov	r2, r8
+	.loc 2 2876 0
+	ldr	r3, [ip]
+	.loc 2 2879 0
 	movs	r1, #1
-	ldr	r3, [r6]
 	add	r0, sp, #28
-	ldr	r2, [sp, #8]
+	.loc 2 2876 0
 	str	r3, [r5]
+	.loc 2 2877 0
+	ldr	r3, [r10]
+	str	r3, [sp, #36]
+	.loc 2 2878 0
+	ldr	r3, [fp]
+	str	r3, [sp, #40]
+	.loc 2 2879 0
 	bl	FlashReadPages
+.LVL1752:
+	.loc 2 2880 0
 	ldr	r5, [sp, #28]
 	adds	r3, r5, #1
 	bne	.L1541
+	.loc 2 2881 0
 	ldr	r1, [r4, #4]
 	ldr	r0, .L1559+16
 	bl	printf
+.LVL1753:
+	.loc 2 2882 0
 	str	r5, [r4]
 .L1541:
+	.loc 2 2884 0
 	ldr	r3, [r4, #12]
 	cbz	r3, .L1542
+	.loc 2 2885 0
 	ldr	r2, [r3]
 	ldr	r3, [fp]
 	ldr	r3, [r3]
 	cmp	r2, r3
 	beq	.L1542
+	.loc 2 2886 0
 	ldr	r1, [r4, #4]
 	ldr	r0, .L1559+20
 	bl	printf
+.LVL1754:
+	.loc 2 2887 0
 	mov	r3, #-1
 	str	r3, [r4]
 .L1542:
+	.loc 2 2890 0
 	ldr	r3, [r4, #8]
 	cmp	r3, #0
 	beq	.L1540
+	.loc 2 2891 0
 	ldr	r2, [r3]
 	ldr	r3, [r10]
 	ldr	r3, [r3]
 	cmp	r2, r3
 	beq	.L1540
+	.loc 2 2892 0
 	ldr	r1, [r4, #4]
 	ldr	r0, .L1559+24
 	bl	printf
+.LVL1755:
+	.loc 2 2893 0
 	mov	r3, #-1
 	str	r3, [r4]
 	b	.L1540
+.LVL1756:
 .L1548:
-	mov	r8, #0
+.LBE415:
+	movs	r6, #0
+.LBB416:
+	.loc 2 2874 0
 	ldr	r10, .L1559+36
+.LVL1757:
 	b	.L1538
 .L1560:
 	.align	2
 .L1559:
-	.word	.LANCHOR29
+	.word	.LANCHOR30
 	.word	.LANCHOR25
 	.word	.LANCHOR26
-	.word	.LC24
-	.word	.LC25
-	.word	.LC26
 	.word	.LC27
+	.word	.LC28
+	.word	.LC29
+	.word	.LC30
 	.word	.LANCHOR3
 	.word	.LANCHOR196
 	.word	.LANCHOR195
+.LBE416:
+	.cfi_endproc
+.LFE259:
 	.size	FlashProgSlc2KPages, .-FlashProgSlc2KPages
 	.section	.text.FlashProgPages,"ax",%progbits
 	.align	1
@@ -10812,48 +17992,90 @@ FlashProgSlc2KPages:
 	.fpu softvfp
 	.type	FlashProgPages, %function
 FlashProgPages:
+.LFB262:
+	.loc 2 3108 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 64
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1758:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
 	sub	sp, sp, #72
+	.cfi_def_cfa_offset 104
+	.loc 2 3115 0
 	ldr	r5, .L1613
+	.loc 2 3108 0
 	mov	r4, r0
 	mov	r8, r2
 	str	r1, [sp, #8]
+	.loc 2 3115 0
 	ldr	r5, [r5]
+	.loc 2 3108 0
 	str	r3, [sp, #20]
+	.loc 2 3115 0
 	ldrb	r5, [r5, #19]	@ zero_extendqisi2
 	str	r5, [sp, #16]
+.LVL1759:
+	.loc 2 3120 0
 	ldr	r5, .L1613+4
+.LVL1760:
 	ldrb	r7, [r5]	@ zero_extendqisi2
 	cbnz	r7, .L1562
+	.loc 2 3116 0
 	ldr	r3, .L1613+8
+.LVL1761:
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
 	str	r3, [sp, #12]
+.LVL1762:
 .L1563:
+	.loc 2 3123 0 discriminator 1
 	ldr	r3, [sp, #8]
 	cmp	r7, r3
 	bcc	.L1576
+	.loc 2 3180 0 discriminator 1
 	ldr	r6, .L1613+12
 	movs	r5, #0
+	.loc 2 3182 0 discriminator 1
 	ldr	r7, .L1613+16
+.LVL1763:
 .L1577:
+	.loc 2 3180 0 discriminator 1
 	ldrb	r3, [r6]	@ zero_extendqisi2
 	cmp	r5, r3
 	bcc	.L1579
+	.loc 2 3186 0
 	ldr	r3, [sp, #20]
 	cmp	r3, #0
 	bne	.L1580
+.LVL1764:
 .L1588:
+	.loc 2 3218 0
 	movs	r0, #0
 	b	.L1561
+.LVL1765:
 .L1562:
+	.loc 2 3121 0
 	bl	FlashProgSlc2KPages
+.LVL1766:
 .L1561:
+	.loc 2 3219 0
 	add	sp, sp, #72
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1767:
 .L1576:
+	.cfi_restore_state
+	.loc 2 3124 0
 	ldr	r3, [sp, #8]
 	movs	r6, #36
 	muls	r6, r7, r6
@@ -10866,84 +18088,133 @@ FlashProgPages:
 	mov	r0, fp
 	add	r3, sp, #32
 	bl	LogAddr2PhyAddr
+.LVL1768:
+	.loc 2 3125 0
 	ldr	r3, .L1613+12
+	.loc 2 3124 0
 	mov	r10, r0
+.LVL1769:
+	.loc 2 3125 0
 	ldr	r0, [sp, #32]
+.LVL1770:
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r0
 	bhi	.L1565
+	.loc 2 3126 0
 	mov	r3, #-1
 	str	r3, [r4, r6]
 .L1566:
+	.loc 2 3123 0 discriminator 2
 	adds	r7, r7, #1
+.LVL1771:
 	b	.L1563
 .L1565:
+	.loc 2 3129 0
 	ldr	r3, .L1613+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
+	.loc 2 3130 0
 	cmp	r3, #0
+	.loc 2 3131 0
 	ldr	r3, .L1613+24
+	.loc 2 3130 0
 	it	eq
 	moveq	r10, #0
+.LVL1772:
+	.loc 2 3131 0
 	add	r3, r3, r0, lsl #4
 	ldr	r3, [r3, #8]
 	cbz	r3, .L1568
+	.loc 2 3134 0
 	uxtb	r0, r0
 	bl	FlashWaitCmdDone
+.LVL1773:
 .L1568:
+	.loc 2 3136 0
 	ldr	r3, [sp, #32]
+	.loc 2 3137 0
 	movs	r1, #0
+	.loc 2 3136 0
 	ldr	r2, .L1613+24
 	add	r2, r2, r3, lsl #4
+	.loc 2 3137 0
 	str	r1, [r2, #12]
+	.loc 2 3138 0
 	ldr	r1, [sp, #28]
+	.loc 2 3136 0
 	str	fp, [r2, #8]
+	.loc 2 3138 0
 	str	r1, [r2, #4]
+	.loc 2 3141 0
 	cmp	r10, #0
 	beq	.L1569
+	.loc 2 3142 0
 	add	r1, r6, #36
 	add	r1, r1, r4
 	str	r1, [r2, #12]
 .L1569:
+	.loc 2 3143 0
 	ldr	r2, .L1613+28
 	ldrb	r5, [r2, r3]	@ zero_extendqisi2
+.LVL1774:
+	.loc 2 3144 0
 	lsls	r3, r3, #4
 	ldr	r2, .L1613+24
+	.loc 2 3146 0
 	mov	r0, r5
+	.loc 2 3144 0
 	strb	r5, [r2, r3]
+	.loc 2 3145 0
 	ldr	r3, .L1613+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #1
 	bne	.L1570
+	.loc 2 3146 0
 	bl	NandcWaitFlashReady
+.LVL1775:
 .L1571:
+	.loc 2 3152 0
 	ldr	r3, [sp, #16]
 	subs	r3, r3, #1
 	cmp	r3, #6
 	bhi	.L1572
+	.loc 2 3153 0
 	ldr	r3, .L1613+32
 	ldrb	r3, [r3, r5]	@ zero_extendqisi2
 	cbz	r3, .L1572
+	.loc 2 3154 0
 	ldr	r1, .L1613+36
 	movs	r3, #0
 	mov	r0, r5
 	adds	r2, r1, #4
 	ldrb	r1, [r1, #1]	@ zero_extendqisi2
 	bl	HynixSetRRPara
+.LVL1776:
 .L1572:
+	.loc 2 3156 0
 	mov	r0, r5
 	bl	NandcFlashCs
+.LVL1777:
+	.loc 2 3157 0
 	cmp	r8, #1
+	.loc 2 3158 0
 	mov	r0, r5
+	.loc 2 3157 0
 	bne	.L1573
+	.loc 2 3157 0 is_stmt 0 discriminator 1
 	ldr	r3, .L1613+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
 	beq	.L1573
+	.loc 2 3158 0 is_stmt 1
 	bl	flash_enter_slc_mode
+.LVL1778:
 .L1574:
+	.loc 2 3161 0
 	ldr	r1, [sp, #28]
 	mov	r0, r5
 	bl	FlashProgFirstCmd
+.LVL1779:
+	.loc 2 3162 0
 	ldr	r3, [fp, #12]
 	movs	r1, #1
 	ldr	r2, [sp, #12]
@@ -10951,28 +18222,41 @@ FlashProgPages:
 	str	r3, [sp]
 	ldr	r3, [fp, #8]
 	bl	NandcXferData
+.LVL1780:
+	.loc 2 3163 0
 	cmp	r10, #0
 	beq	.L1575
+	.loc 2 3164 0
 	ldr	r1, [sp, #28]
 	mov	r0, r5
 	bl	FlashProgDpFirstCmd
+.LVL1781:
+	.loc 2 3165 0
 	ldr	r3, .L1613+40
 	mov	r0, r5
 	ldr	r2, [sp, #32]
+	.loc 2 3167 0
 	adds	r6, r6, #36
+	.loc 2 3165 0
 	ldr	r1, [sp, #28]
+	.loc 2 3167 0
 	add	r6, r6, r4
+	.loc 2 3165 0
 	ldr	r2, [r3, r2, lsl #2]
 	adds	r2, r2, #0
 	it	ne
 	movne	r2, #1
 	bl	FlashWaitReadyEN
+.LVL1782:
+	.loc 2 3166 0
 	ldr	r3, .L1613+44
 	mov	r0, r5
 	ldr	r1, [sp, #28]
 	ldr	r3, [r3]
 	add	r1, r1, r3
 	bl	FlashProgDpSecondCmd
+.LVL1783:
+	.loc 2 3167 0
 	ldr	r3, [r6, #12]
 	movs	r1, #1
 	ldr	r2, [sp, #12]
@@ -10980,16 +18264,27 @@ FlashProgPages:
 	str	r3, [sp]
 	ldr	r3, [r6, #8]
 	bl	NandcXferData
+.LVL1784:
 .L1575:
+	.loc 2 3169 0
 	ldr	r1, [sp, #28]
 	mov	r0, r5
 	bl	FlashProgSecondCmd
+.LVL1785:
+	.loc 2 3170 0
 	mov	r0, r5
+	.loc 2 3171 0
 	add	r7, r7, r10
+.LVL1786:
+	.loc 2 3170 0
 	bl	NandcFlashDeCs
+.LVL1787:
 	b	.L1566
 .L1570:
+	.loc 2 3148 0
 	bl	NandcFlashCs
+.LVL1788:
+	.loc 2 3149 0
 	ldr	r2, [sp, #32]
 	mov	r0, r5
 	ldr	r3, .L1613+40
@@ -10999,105 +18294,167 @@ FlashProgPages:
 	it	ne
 	movne	r2, #1
 	bl	FlashWaitReadyEN
+.LVL1789:
+	.loc 2 3150 0
 	mov	r0, r5
 	bl	NandcFlashDeCs
+.LVL1790:
 	b	.L1571
 .L1573:
+	.loc 2 3160 0
 	bl	flash_exit_slc_mode
+.LVL1791:
 	b	.L1574
+.LVL1792:
 .L1579:
+	.loc 2 3181 0
 	uxtb	r0, r5
 	bl	FlashWaitCmdDone
+.LVL1793:
+	.loc 2 3182 0
 	cmp	r8, #1
 	bne	.L1578
+	.loc 2 3182 0 is_stmt 0 discriminator 1
 	ldrb	r3, [r7]	@ zero_extendqisi2
 	cbz	r3, .L1578
+	.loc 2 3183 0 is_stmt 1
 	ldr	r2, .L1613+24
 	lsls	r3, r5, #4
 	ldrb	r0, [r2, r3]	@ zero_extendqisi2
 	bl	flash_exit_slc_mode
+.LVL1794:
 .L1578:
+	.loc 2 3180 0 discriminator 2
 	adds	r5, r5, #1
+.LVL1795:
 	b	.L1577
 .L1580:
-	ldr	r10, .L1613+64
-	movs	r7, #0
+.LBB417:
+	.loc 2 3194 0
+	ldr	r7, .L1613+48
+.LBE417:
+	.loc 2 3186 0
+	movs	r6, #0
+.LVL1796:
 .L1581:
+	.loc 2 3187 0 discriminator 1
 	ldr	r3, [sp, #8]
-	cmp	r7, r3
+	cmp	r6, r3
 	beq	.L1588
+.LBB418:
+	.loc 2 3189 0
 	ldr	r3, [r4]
 	adds	r3, r3, #1
 	bne	.L1582
+	.loc 2 3190 0
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1613+48
+	ldr	r0, .L1613+52
 	bl	printf
+.LVL1797:
 .L1583:
-	adds	r7, r7, #1
+.LBE418:
+	.loc 2 3187 0 discriminator 2
+	adds	r6, r6, #1
+.LVL1798:
 	adds	r4, r4, #36
 	b	.L1581
 .L1582:
+.LBB419:
+	.loc 2 3193 0
 	ldr	r3, [sp, #8]
 	add	r2, sp, #28
-	ldr	fp, .L1613+68
 	mov	r1, r8
 	mov	r0, r4
-	mov	r6, r4
-	subs	r3, r3, r7
+	.loc 2 3195 0
+	ldr	r10, .L1613+68
+	.loc 2 3196 0
 	add	r5, sp, #36
+	.loc 2 3193 0
+	subs	r3, r3, r6
 	uxtb	r3, r3
 	str	r3, [sp]
 	add	r3, sp, #32
 	bl	LogAddr2PhyAddr
-	ldr	lr, [r10]
+.LVL1799:
+	.loc 2 3194 0
+	ldr	r2, [r7]
 	movs	r3, #0
-	ldr	ip, [fp]
-	str	r3, [lr]
-	str	r3, [ip]
-	ldmia	r6!, {r0, r1, r2, r3}
+	.loc 2 3196 0
+	mov	ip, r4
+	.loc 2 3194 0
+	str	r3, [r2]
+	.loc 2 3195 0
+	ldr	r2, [r10]
+	str	r3, [r2]
+	.loc 2 3196 0
+	ldmia	ip!, {r0, r1, r2, r3}
 	stmia	r5!, {r0, r1, r2, r3}
-	str	lr, [sp, #44]
-	ldmia	r6!, {r0, r1, r2, r3}
-	str	ip, [sp, #48]
+	ldmia	ip!, {r0, r1, r2, r3}
 	stmia	r5!, {r0, r1, r2, r3}
+	.loc 2 3199 0
 	mov	r2, r8
-	ldr	r3, [r6]
+	.loc 2 3196 0
+	ldr	r3, [ip]
+	.loc 2 3199 0
 	movs	r1, #1
 	add	r0, sp, #36
+	.loc 2 3196 0
 	str	r3, [r5]
+	.loc 2 3197 0
+	ldr	r3, [r7]
+	str	r3, [sp, #44]
+	.loc 2 3198 0
+	ldr	r3, [r10]
+	str	r3, [sp, #48]
+	.loc 2 3199 0
 	bl	FlashReadPages
+.LVL1800:
+	.loc 2 3200 0
 	ldr	r5, [sp, #36]
 	adds	r3, r5, #1
 	bne	.L1584
+	.loc 2 3201 0
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1613+52
+	ldr	r0, .L1613+56
 	bl	printf
+.LVL1801:
+	.loc 2 3202 0
 	str	r5, [r4]
 .L1584:
+	.loc 2 3204 0
 	ldr	r3, [r4, #12]
 	cbz	r3, .L1585
+	.loc 2 3205 0
 	ldr	r2, [r3]
-	ldr	r3, [fp]
+	ldr	r3, [r10]
 	ldr	r3, [r3]
 	cmp	r2, r3
 	beq	.L1585
+	.loc 2 3206 0
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1613+56
+	ldr	r0, .L1613+60
 	bl	printf
+.LVL1802:
+	.loc 2 3207 0
 	mov	r3, #-1
 	str	r3, [r4]
 .L1585:
+	.loc 2 3210 0
 	ldr	r3, [r4, #8]
 	cmp	r3, #0
 	beq	.L1583
+	.loc 2 3211 0
 	ldr	r2, [r3]
-	ldr	r3, [r10]
+	ldr	r3, [r7]
 	ldr	r3, [r3]
 	cmp	r2, r3
 	beq	.L1583
+	.loc 2 3212 0
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1613+60
+	ldr	r0, .L1613+64
 	bl	printf
+.LVL1803:
+	.loc 2 3213 0
 	mov	r3, #-1
 	str	r3, [r4]
 	b	.L1583
@@ -11106,7 +18463,7 @@ FlashProgPages:
 .L1613:
 	.word	.LANCHOR18
 	.word	.LANCHOR1
-	.word	.LANCHOR29
+	.word	.LANCHOR30
 	.word	.LANCHOR25
 	.word	.LANCHOR8
 	.word	.LANCHOR27
@@ -11116,12 +18473,15 @@ FlashProgPages:
 	.word	.LANCHOR20
 	.word	.LANCHOR17
 	.word	.LANCHOR3
-	.word	.LC24
-	.word	.LC25
-	.word	.LC26
-	.word	.LC27
 	.word	.LANCHOR195
+	.word	.LC27
+	.word	.LC28
+	.word	.LC29
+	.word	.LC30
 	.word	.LANCHOR196
+.LBE419:
+	.cfi_endproc
+.LFE262:
 	.size	FlashProgPages, .-FlashProgPages
 	.section	.text.FlashTestBlk,"ax",%progbits
 	.align	1
@@ -11132,60 +18492,110 @@ FlashProgPages:
 	.fpu softvfp
 	.type	FlashTestBlk, %function
 FlashTestBlk:
+.LFB235:
+	.loc 2 1053 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1804:
+	.loc 2 1058 0
 	ldr	r3, .L1618
+	.loc 2 1053 0
 	push	{r4, r5, lr}
+	.cfi_def_cfa_offset 12
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
 	mov	r4, r0
 	sub	sp, sp, #108
+	.cfi_def_cfa_offset 120
+	.loc 2 1058 0
 	ldr	r3, [r3]
 	cmp	r0, r3
 	bcc	.L1617
+.LVL1805:
+.LBB422:
+.LBB423:
+	.loc 2 1061 0
 	ldr	r5, .L1618+4
+	.loc 2 1062 0
 	add	r0, sp, #40
+.LVL1806:
+	.loc 2 1063 0
 	movs	r2, #32
 	movs	r1, #165
+	.loc 2 1062 0
 	str	r0, [sp, #16]
+	.loc 2 1065 0
 	lsls	r4, r4, #10
+.LVL1807:
+	.loc 2 1061 0
 	ldr	r3, [r5]
 	str	r3, [sp, #12]
+	.loc 2 1063 0
 	bl	ftl_memset
+.LVL1808:
+	.loc 2 1064 0
 	movs	r2, #8
 	movs	r1, #90
 	ldr	r0, [r5]
 	bl	ftl_memset
+.LVL1809:
+	.loc 2 1066 0
 	movs	r2, #1
 	add	r0, sp, #4
 	mov	r1, r2
+	.loc 2 1065 0
 	str	r4, [sp, #8]
+	.loc 2 1066 0
 	bl	FlashEraseBlocks
+.LVL1810:
+	.loc 2 1067 0
 	movs	r3, #1
 	add	r0, sp, #4
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
+.LVL1811:
+	.loc 2 1068 0
 	ldr	r4, [sp, #4]
+	.loc 2 1074 0
 	movs	r2, #1
 	movs	r1, #0
 	add	r0, sp, #4
+	.loc 2 1068 0
 	adds	r4, r4, #0
 	it	ne
 	movne	r4, #1
 	negs	r4, r4
+.LDL1:
+.LVL1812:
+	.loc 2 1074 0
 	bl	FlashEraseBlocks
+.LVL1813:
 .L1615:
+.LBE423:
+.LBE422:
+	.loc 2 1076 0
 	mov	r0, r4
 	add	sp, sp, #108
+	.cfi_remember_state
+	.cfi_def_cfa_offset 12
 	@ sp needed
 	pop	{r4, r5, pc}
+.LVL1814:
 .L1617:
+	.cfi_restore_state
+	.loc 2 1059 0
 	movs	r4, #0
 	b	.L1615
 .L1619:
 	.align	2
 .L1618:
-	.word	.LANCHOR147
-	.word	.LANCHOR151
+	.word	.LANCHOR146
+	.word	.LANCHOR150
+	.cfi_endproc
+.LFE235:
 	.size	FlashTestBlk, .-FlashTestBlk
 	.section	.text.FtlLowFormatEraseBlock,"ax",%progbits
 	.align	1
@@ -11196,279 +18606,467 @@ FlashTestBlk:
 	.fpu softvfp
 	.type	FtlLowFormatEraseBlock, %function
 FtlLowFormatEraseBlock:
-	@ args = 0, pretend = 0, frame = 32
+.LFB300:
+	.loc 4 654 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1815:
+	.loc 4 663 0
 	ldr	r3, .L1665
+	.loc 4 654 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #32
-	str	r0, [sp, #4]
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	sub	sp, sp, #24
+	.cfi_def_cfa_offset 56
+	.loc 4 654 0
+	str	r0, [sp, #8]
+	.loc 4 663 0
 	ldr	r3, [r3]
-	str	r1, [sp]
+	.loc 4 654 0
+	str	r1, [sp, #4]
+	.loc 4 663 0
 	cmp	r3, #0
 	bne	.L1647
-	ldr	r2, .L1665+4
-	mov	fp, r3
-	ldr	r7, .L1665+8
+	.loc 4 661 0
+	ldr	r1, .L1665+4
+.LVL1816:
+	.loc 4 672 0
+	mov	r10, r3
+	.loc 4 671 0
+	ldr	r4, [sp, #8]
+	.loc 4 666 0
 	mov	r5, r3
-	mov	r4, r3
-	mov	r10, #36
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	ldr	r8, [r7]
-	str	r2, [sp, #8]
-	ldr	r2, .L1665+12
-	str	r0, [r2]
-	ldr	r2, .L1665+16
-	ldrh	r2, [r2]
+	.loc 4 673 0
+	ldr	r7, .L1665+8
+	mov	r8, #36
+	.loc 4 661 0
+	ldrb	r2, [r1]	@ zero_extendqisi2
+	mov	fp, r1
 	str	r2, [sp, #20]
-	ldr	r2, .L1665+20
-	ldr	r2, [r2]
-	str	r2, [sp, #12]
-	ldr	r2, .L1665+24
-	ldrh	r2, [r2]
+.LVL1817:
+	.loc 4 668 0
+	ldr	r2, .L1665+12
+	ldrb	r0, [r2]	@ zero_extendqisi2
+.LVL1818:
 	str	r2, [sp, #16]
+	str	r0, [sp, #12]
+.LVL1819:
+	.loc 4 671 0
+	ldr	r0, .L1665+16
+	str	r4, [r0]
+.LVL1820:
+	.loc 4 667 0
+	mov	r4, r3
+.LVL1821:
 .L1622:
-	ldr	r3, [sp, #20]
-	uxth	r2, fp
-	cmp	r3, r2
+	.loc 4 672 0 discriminator 1
+	ldr	r3, .L1665+20
+	uxth	r2, r10
+	ldrh	r1, [r3]
+	cmp	r1, r2
 	bhi	.L1626
+	.loc 4 692 0
 	cmp	r5, #0
 	beq	.L1620
-	ldr	r3, [sp, #8]
-	mov	r0, r8
-	mov	r10, #36
-	mov	r8, #0
+	.loc 4 668 0
+	ldr	r3, [sp, #12]
+	.loc 4 696 0
+	movs	r7, #0
+	.loc 4 697 0
+	ldr	r8, .L1665+8
 	mov	r2, r5
+	.loc 4 696 0
+	strb	r7, [fp]
+	.loc 4 701 0
+	mov	r10, #36
+.LVL1822:
+	.loc 4 668 0
 	adds	r6, r3, #0
 	it	ne
 	movne	r6, #1
+	.loc 4 697 0
+	ldr	r0, [r8]
 	mov	r1, r6
 	bl	FlashEraseBlocks
+.LVL1823:
+	.loc 4 698 0
+	ldrb	r3, [sp, #20]	@ zero_extendqisi2
+	strb	r3, [fp]
+.LVL1824:
 .L1628:
-	uxth	r3, r8
+	.loc 4 700 0 discriminator 1
+	uxth	r3, r7
 	cmp	r5, r3
 	bhi	.L1630
-	ldr	r3, [sp]
+	.loc 4 708 0
+	ldr	r3, [sp, #4]
 	cmp	r3, #0
 	bne	.L1631
+	.loc 4 660 0
 	uxth	r6, r6
-	mov	r10, #6
+	.loc 4 659 0
+	movs	r3, #6
+	str	r3, [sp, #16]
+	.loc 4 657 0
 	movs	r3, #1
-	str	r3, [sp, #8]
+	str	r3, [sp, #12]
+.LVL1825:
 .L1632:
-	movs	r7, #0
+	.loc 4 720 0
+	ldr	r8, .L1665+8
+	mov	r10, #0
+.LVL1826:
 .L1641:
-	ldr	r3, .L1665+16
-	mov	r8, #0
-	mov	r5, r8
-	ldrh	r3, [r3]
-	str	r3, [sp, #28]
-	ldr	r3, .L1665+8
-	ldr	fp, [r3]
-	ldr	r3, .L1665+28
-	ldr	r3, [r3]
-	str	r3, [sp, #16]
-	ldr	r3, .L1665+32
-	ldr	r3, [r3]
-	str	r3, [sp, #20]
-	ldr	r3, .L1665+24
-	ldrh	r3, [r3]
-	str	r3, [sp, #24]
+	.loc 4 719 0
+	mov	fp, #0
+	.loc 4 718 0
+	mov	r5, fp
+.LVL1827:
 .L1633:
-	ldr	r3, [sp, #28]
-	uxth	r2, r8
-	cmp	r3, r2
+	.loc 4 719 0 discriminator 1
+	ldr	r3, .L1665+20
+	uxth	r2, fp
+	ldrh	r1, [r3]
+	cmp	r1, r2
 	bhi	.L1636
+	.loc 4 734 0
 	cbz	r5, .L1620
-	mov	r0, fp
-	ldr	fp, .L1665+8
+	.loc 4 737 0
+	ldr	fp, .L1665+4
+.LVL1828:
+	.loc 4 738 0
 	movs	r3, #1
+	.loc 4 737 0
+	movs	r7, #0
+	.loc 4 738 0
 	mov	r2, r6
+.LVL1829:
 	mov	r1, r5
-	mov	r8, #0
+	ldr	r0, [r8]
+	.loc 4 737 0
+	strb	r7, [fp]
+	.loc 4 738 0
 	bl	FlashProgPages
-	movs	r3, #36
+.LVL1830:
+	.loc 4 739 0
+	ldrb	r3, [sp, #20]	@ zero_extendqisi2
+	strb	r3, [fp]
+.LVL1831:
+	.loc 4 742 0
+	mov	fp, #36
+.LVL1832:
 .L1638:
-	uxth	r2, r8
-	cmp	r5, r2
+	.loc 4 741 0 discriminator 1
+	uxth	r3, r7
+	cmp	r5, r3
 	bhi	.L1640
-	add	r7, r7, r10
-	ldr	r3, [sp, #8]
-	uxth	r7, r7
-	cmp	r7, r3
-	bcc	.L1641
-	ldr	r8, .L1665+8
+	.loc 4 748 0
+	ldr	r3, [sp, #16]
+	add	r10, r10, r3
+.LVL1833:
+	.loc 4 749 0
+	ldr	r3, [sp, #12]
+	.loc 4 748 0
+	uxth	r10, r10
+.LVL1834:
+	.loc 4 749 0
+	cmp	r3, r10
+	bhi	.L1641
 	movs	r7, #0
+.LVL1835:
+	.loc 4 755 0 discriminator 1
 	mov	r10, #36
+.LVL1836:
 .L1642:
+	.loc 4 754 0 discriminator 1
 	uxth	r3, r7
 	cmp	r5, r3
 	bhi	.L1644
-	ldr	r3, [sp, #4]
+	.loc 4 759 0
+	ldr	r3, [sp, #8]
 	cmp	r3, #63
 	bls	.L1645
-	ldr	r3, [sp]
+	.loc 4 759 0 is_stmt 0 discriminator 1
+	ldr	r3, [sp, #4]
 	cbz	r3, .L1620
 .L1645:
-	ldr	r3, .L1665+8
+	.loc 4 760 0 is_stmt 1
 	mov	r2, r5
 	mov	r1, r6
-	ldr	r0, [r3]
+	ldr	r0, [r8]
 	bl	FlashEraseBlocks
+.LVL1837:
 .L1620:
+	.loc 4 763 0
 	mov	r0, r4
-	add	sp, sp, #32
+	add	sp, sp, #24
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1838:
 .L1626:
-	mul	r2, r10, fp
+	.cfi_restore_state
+	.loc 4 673 0
+	uxth	r2, r10
+	ldr	r0, [r7]
 	movs	r3, #0
-	ldr	r1, [sp, #4]
-	str	r3, [r8, r2]
-	ldr	r3, .L1665+36
-	ldrb	r0, [r3, fp]	@ zero_extendqisi2
+	mul	r1, r8, r2
+	str	r3, [r0, r1]
+	.loc 4 674 0
+	ldr	r3, .L1665+24
+	ldr	r1, [sp, #8]
+	ldrb	r0, [r3, r2]	@ zero_extendqisi2
 	bl	V2P_block
-	ldr	r3, [sp]
+.LVL1839:
+	.loc 4 676 0
+	ldr	r3, [sp, #4]
+	.loc 4 674 0
 	mov	r6, r0
+.LVL1840:
+	.loc 4 676 0
 	cbz	r3, .L1623
+	.loc 4 677 0
 	bl	IsBlkInVendorPart
+.LVL1841:
 	cbnz	r0, .L1624
 .L1623:
+	.loc 4 681 0
 	mov	r0, r6
 	bl	FtlBbmIsBadBlock
+.LVL1842:
 	cbnz	r0, .L1625
-	ldr	r3, [sp, #16]
-	mla	r1, r10, r5, r8
+	.loc 4 684 0
+	ldr	r3, .L1665+28
+	.loc 4 682 0
 	lsls	r6, r6, #10
-	mul	r2, r3, r5
-	ldr	r3, [sp, #12]
+	ldr	r2, [r7]
+	.loc 4 684 0
+	ldrh	r1, [r3]
+	ldr	r3, .L1665+32
+	.loc 4 682 0
+	mla	r2, r8, r5, r2
+	.loc 4 684 0
+	muls	r1, r5, r1
+	.loc 4 685 0
 	adds	r5, r5, #1
-	str	r6, [r1, #4]
+.LVL1843:
 	uxth	r5, r5
-	str	r0, [r1, #8]
-	bic	r2, r2, #3
-	add	r2, r2, r3
-	str	r2, [r1, #12]
+.LVL1844:
+	.loc 4 683 0
+	str	r0, [r2, #8]
+	.loc 4 684 0
+	ldr	r0, [r3]
+	bic	r1, r1, #3
+	.loc 4 682 0
+	str	r6, [r2, #4]
+	.loc 4 684 0
+	add	r1, r1, r0
+	str	r1, [r2, #12]
 .L1624:
-	add	fp, fp, #1
+.LVL1845:
+	add	r10, r10, #1
+.LVL1846:
 	b	.L1622
+.LVL1847:
 .L1625:
+	.loc 4 687 0
 	adds	r4, r4, #1
+.LVL1848:
 	uxth	r4, r4
+.LVL1849:
 	b	.L1624
+.LVL1850:
 .L1630:
-	mul	r3, r10, r8
-	ldr	r2, [r7]
+	.loc 4 701 0
+	mul	r3, r10, r7
+	ldr	r2, [r8]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
 	adds	r3, r3, #1
 	bne	.L1629
+	.loc 4 703 0
 	ldr	r0, [r1, #4]
+	.loc 4 702 0
 	adds	r4, r4, #1
+.LVL1851:
 	uxth	r4, r4
+.LVL1852:
+	.loc 4 703 0
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
+.LVL1853:
 .L1629:
-	add	r8, r8, #1
+	adds	r7, r7, #1
+.LVL1854:
 	b	.L1628
+.LVL1855:
 .L1631:
-	ldr	r3, .L1665+40
+	.loc 4 710 0
+	ldr	r3, .L1665+36
 	ldrh	r3, [r3]
-	str	r3, [sp, #8]
-	ldr	r3, .L1665+4
+	str	r3, [sp, #12]
+.LVL1856:
+	.loc 4 712 0
+	ldr	r3, [sp, #16]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cbnz	r3, .L1648
-	ldr	r3, [sp, #8]
+	.loc 4 711 0
+	ldr	r3, [sp, #12]
+	.loc 4 709 0
 	movs	r6, #1
-	lsr	r10, r3, #2
+	.loc 4 711 0
+	lsrs	r3, r3, #2
+	str	r3, [sp, #16]
 	b	.L1632
 .L1648:
+	.loc 4 709 0
 	movs	r6, #1
-	mov	r10, r6
+	.loc 4 713 0
+	str	r6, [sp, #16]
 	b	.L1632
+.LVL1857:
 .L1636:
+	.loc 4 720 0
+	uxth	r2, fp
 	movs	r3, #36
-	ldr	r1, [sp, #4]
-	mul	r2, r3, r8
-	movs	r3, #0
-	str	r3, [fp, r2]
-	ldr	r3, .L1665+36
-	ldrb	r0, [r3, r8]	@ zero_extendqisi2
+	ldr	r0, [r8]
+	movs	r7, #0
+	mul	r1, r3, r2
+	.loc 4 721 0
+	ldr	r3, .L1665+24
+	.loc 4 720 0
+	str	r7, [r0, r1]
+	.loc 4 721 0
+	ldr	r1, [sp, #8]
+	ldrb	r0, [r3, r2]	@ zero_extendqisi2
 	bl	V2P_block
-	ldr	r3, [sp]
-	str	r0, [sp, #12]
+.LVL1858:
+	.loc 4 722 0
+	ldr	r3, [sp, #4]
+	.loc 4 721 0
+	mov	r7, r0
+.LVL1859:
+	.loc 4 722 0
 	cbz	r3, .L1634
+	.loc 4 723 0
 	bl	IsBlkInVendorPart
+.LVL1860:
 	cbnz	r0, .L1635
 .L1634:
-	ldr	r0, [sp, #12]
+	.loc 4 726 0
+	mov	r0, r7
 	bl	FtlBbmIsBadBlock
+.LVL1861:
 	cbnz	r0, .L1635
+	.loc 4 727 0
+	ldr	r2, [r8]
 	movs	r3, #36
-	mla	r1, r3, r5, fp
-	ldr	r3, [sp, #12]
-	add	r2, r7, r3, lsl #10
-	ldr	r3, [sp, #16]
-	str	r2, [r1, #4]
-	str	r3, [r1, #8]
-	ldr	r3, [sp, #24]
-	mul	r2, r3, r5
-	ldr	r3, [sp, #20]
+	add	r7, r10, r7, lsl #10
+	mla	r2, r3, r5, r2
+	.loc 4 728 0
+	ldr	r3, .L1665+40
+	ldr	r1, [r3]
+	.loc 4 729 0
+	ldr	r3, .L1665+28
+	.loc 4 727 0
+	str	r7, [r2, #4]
+	.loc 4 728 0
+	str	r1, [r2, #8]
+	.loc 4 729 0
+	ldrh	r1, [r3]
+	ldr	r3, .L1665+44
+	muls	r1, r5, r1
+	ldr	r0, [r3]
+	.loc 4 730 0
 	adds	r5, r5, #1
+.LVL1862:
 	uxth	r5, r5
-	bic	r2, r2, #3
-	add	r2, r2, r3
-	str	r2, [r1, #12]
+.LVL1863:
+	.loc 4 729 0
+	bic	r1, r1, #3
+	add	r1, r1, r0
+	str	r1, [r2, #12]
 .L1635:
-	add	r8, r8, #1
+.LVL1864:
+	add	fp, fp, #1
+.LVL1865:
 	b	.L1633
+.LVL1866:
 .L1640:
-	mul	r2, r3, r8
-	ldr	r1, [fp]
-	add	ip, r1, r2
-	ldr	r2, [r1, r2]
-	cbz	r2, .L1639
-	ldr	r0, [ip, #4]
+	.loc 4 742 0
+	mul	r3, fp, r7
+	ldr	r2, [r8]
+	adds	r1, r2, r3
+	ldr	r3, [r2, r3]
+	cbz	r3, .L1639
+	.loc 4 744 0
+	ldr	r0, [r1, #4]
+	.loc 4 743 0
 	adds	r4, r4, #1
-	str	r3, [sp, #12]
+.LVL1867:
 	uxth	r4, r4
+.LVL1868:
+	.loc 4 744 0
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-	ldr	r3, [sp, #12]
+.LVL1869:
 .L1639:
-	add	r8, r8, #1
+	adds	r7, r7, #1
+.LVL1870:
 	b	.L1638
+.LVL1871:
 .L1644:
-	ldr	r3, [sp]
+	.loc 4 755 0
+	ldr	r3, [sp, #4]
 	cbz	r3, .L1643
+	.loc 4 755 0 is_stmt 0 discriminator 1
 	mul	r3, r10, r7
 	ldr	r2, [r8]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
 	cbnz	r3, .L1643
+	.loc 4 756 0 is_stmt 1
 	ldr	r0, [r1, #4]
 	movs	r1, #1
 	ubfx	r0, r0, #10, #16
 	bl	FtlFreeSysBlkQueueIn
+.LVL1872:
 .L1643:
 	adds	r7, r7, #1
+.LVL1873:
 	b	.L1642
+.LVL1874:
 .L1647:
+	.loc 4 664 0
 	movs	r4, #0
 	b	.L1620
 .L1666:
 	.align	2
 .L1665:
-	.word	.LANCHOR75
-	.word	.LANCHOR8
 	.word	.LANCHOR76
-	.word	.LANCHOR72
-	.word	.LANCHOR36
+	.word	.LANCHOR27
+	.word	.LANCHOR77
+	.word	.LANCHOR8
+	.word	.LANCHOR73
+	.word	.LANCHOR37
+	.word	.LANCHOR46
+	.word	.LANCHOR58
 	.word	.LANCHOR186
-	.word	.LANCHOR57
+	.word	.LANCHOR53
 	.word	.LANCHOR183
 	.word	.LANCHOR184
-	.word	.LANCHOR45
-	.word	.LANCHOR52
+	.cfi_endproc
+.LFE300:
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
 	.section	.text.FtlBbmTblFlush,"ax",%progbits
 	.align	1
@@ -11479,167 +19077,283 @@ FtlLowFormatEraseBlock:
 	.fpu softvfp
 	.type	FtlBbmTblFlush, %function
 FtlBbmTblFlush:
+.LFB320:
+	.loc 5 104 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1875:
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 48
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 5 111 0
 	ldr	r3, .L1678
 	ldr	r4, [r3]
 	str	r3, [sp, #12]
 	cmp	r4, #0
 	bne	.L1669
+.LBB426:
+.LBB427:
+	.loc 5 114 0
 	ldr	r3, .L1678+4
+	.loc 5 115 0
 	mov	r1, r4
+	.loc 5 113 0
 	ldr	r7, .L1678+8
 	ldr	r5, .L1678+12
+	.loc 5 114 0
 	ldr	r3, [r3]
+	.loc 5 113 0
 	ldr	r0, [r7]
 	mov	r8, r7
 	ldr	r6, .L1678+16
+	.loc 5 114 0
 	str	r3, [r5, #12]
+	.loc 5 117 0
 	ldr	r7, .L1678+20
+	.loc 5 115 0
 	ldr	r3, .L1678+24
+	.loc 5 118 0
 	ldr	r10, .L1678+56
+	.loc 5 113 0
 	str	r0, [r5, #8]
+	.loc 5 115 0
 	ldrh	r2, [r3]
 	bl	ftl_memset
+.LVL1876:
 .L1670:
+	.loc 5 117 0
 	ldrh	r3, [r7]
 	cmp	r4, r3
 	blt	.L1671
+	.loc 5 120 0
 	ldr	r6, [r5, #12]
+.LVL1877:
+	.loc 5 121 0
 	movs	r2, #16
+	.loc 5 124 0
 	ldr	r4, .L1678+28
+.LVL1878:
+	.loc 5 121 0
 	movs	r1, #255
+	.loc 5 108 0
 	movs	r7, #0
+	.loc 5 121 0
 	mov	r0, r6
 	bl	ftl_memset
+.LVL1879:
+	.loc 5 123 0
 	movw	r3, #61649
 	mov	r10, r4
 	strh	r3, [r6]	@ movhi
+	.loc 5 124 0
 	ldr	r3, [r4, #8]
+	.loc 5 106 0
 	str	r7, [sp, #8]
+	.loc 5 124 0
 	str	r3, [r6, #4]
+	.loc 5 125 0
 	ldrh	r3, [r4]
 	strh	r3, [r6, #2]	@ movhi
+	.loc 5 126 0
 	ldrh	r3, [r4, #4]
 	strh	r3, [r6, #8]	@ movhi
+	.loc 5 127 0
 	ldrh	r3, [r4, #6]
 	strh	r3, [r6, #10]	@ movhi
+	.loc 5 128 0
 	ldr	r3, .L1678+32
 	ldr	r3, [r3]
 	strh	r3, [r6, #12]	@ movhi
 .L1672:
+.LVL1880:
+	.loc 5 130 0
 	ldr	r3, [r8]
+	.loc 5 132 0
 	mov	fp, #0
+	.loc 5 133 0
 	ldrh	r1, [r4]
 	ldrh	r2, [r4, #2]
+	.loc 5 130 0
 	str	r3, [r5, #8]
+	.loc 5 131 0
 	ldr	r3, .L1678+4
-	ldrh	r0, [r6, #10]
+	.loc 5 132 0
 	str	fp, [r5]
+	.loc 5 131 0
 	ldr	r3, [r3]
 	str	r3, [r5, #12]
+	.loc 5 133 0
 	orr	r3, r2, r1, lsl #10
+	.loc 5 134 0
+	ldrh	r0, [r6, #10]
+	.loc 5 133 0
 	str	r3, [r5, #4]
+	.loc 5 134 0
 	ldrh	r3, [r4, #4]
 	str	r0, [sp]
 	ldr	r0, .L1678+36
 	bl	printf
+.LVL1881:
+	.loc 5 135 0
 	movs	r3, #1
 	ldr	r0, .L1678+12
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
+.LVL1882:
+	.loc 5 136 0
 	ldr	r3, .L1678+40
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r2, r3
 	blt	.L1673
+	.loc 5 139 0
 	ldr	r3, [r4, #8]
+	.loc 5 141 0
 	ldrh	r2, [r4]
+	.loc 5 143 0
 	strh	fp, [r4, #2]	@ movhi
+	.loc 5 139 0
 	adds	r3, r3, #1
 	str	r3, [r4, #8]
+	.loc 5 140 0
 	str	r3, [r6, #4]
+	.loc 5 141 0
 	strh	r2, [r6, #8]	@ movhi
+	.loc 5 142 0
 	ldrh	r3, [r4, #4]
+	.loc 5 144 0
 	strh	r2, [r4, #4]	@ movhi
+	.loc 5 147 0
 	ldr	r2, .L1678+44
+	.loc 5 142 0
 	strh	r3, [r4]	@ movhi
+	.loc 5 145 0
 	lsls	r3, r3, #10
+	.loc 5 147 0
 	ldr	r0, [r2]
+	.loc 5 148 0
 	movs	r2, #1
+	.loc 5 145 0
 	str	r3, [r5, #4]
+	.loc 5 148 0
 	mov	r1, r2
+	.loc 5 147 0
 	str	r3, [r0, #4]
+	.loc 5 148 0
 	bl	FlashEraseBlocks
+.LVL1883:
+	.loc 5 149 0
 	movs	r3, #1
 	ldr	r0, .L1678+12
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
+.LVL1884:
 .L1673:
+	.loc 5 157 0
 	ldrh	r3, [r10, #2]
 	adds	r3, r3, #1
 	strh	r3, [r10, #2]	@ movhi
+	.loc 5 158 0
 	ldr	r3, [r5]
 	adds	r3, r3, #1
 	bne	.L1674
+	.loc 5 161 0
 	adds	r7, r7, #1
+.LVL1885:
+	.loc 5 160 0
 	ldr	r1, [r5, #4]
+	.loc 5 161 0
 	uxth	r7, r7
+	.loc 5 160 0
 	ldr	r0, .L1678+48
 	bl	printf
+.LVL1886:
+	.loc 5 162 0
 	cmp	r7, #3
 	bls	.L1672
+	.loc 5 163 0
 	mov	r2, r7
 	ldr	r1, [r5, #4]
 	ldr	r0, .L1678+52
 	bl	printf
+.LVL1887:
+	.loc 5 165 0
 	ldr	r2, [sp, #12]
 	movs	r3, #1
 	str	r3, [r2]
+.LVL1888:
 .L1669:
+.LBE427:
+.LBE426:
+	.loc 5 179 0
 	movs	r0, #0
 	add	sp, sp, #16
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1889:
 .L1671:
+	.cfi_restore_state
+.LBB429:
+.LBB428:
+	.loc 5 118 0
 	ldrh	r2, [r10]
 	ldr	r3, [r5, #8]
 	ldr	r1, [r6, #4]!
 	mul	r0, r4, r2
 	lsls	r2, r2, #2
+	.loc 5 117 0
 	adds	r4, r4, #1
+.LVL1890:
+	.loc 5 118 0
 	add	r0, r3, r0, lsl #2
 	bl	ftl_memcpy
+.LVL1891:
 	b	.L1670
+.LVL1892:
 .L1674:
+	.loc 5 172 0
 	ldr	r3, [sp, #8]
 	cmp	r3, #0
 	bne	.L1669
 	movs	r3, #1
 	str	r3, [sp, #8]
+.LVL1893:
 	b	.L1672
 .L1679:
 	.align	2
 .L1678:
-	.word	.LANCHOR75
+	.word	.LANCHOR76
 	.word	.LANCHOR185
-	.word	.LANCHOR79
+	.word	.LANCHOR180
 	.word	.LANCHOR199
-	.word	.LANCHOR73+24
-	.word	.LANCHOR43
-	.word	.LANCHOR56
-	.word	.LANCHOR73
-	.word	.LANCHOR35
-	.word	.LC28
-	.word	.LANCHOR52
-	.word	.LANCHOR76
-	.word	.LC29
-	.word	.LC30
+	.word	.LANCHOR74+24
+	.word	.LANCHOR44
+	.word	.LANCHOR57
+	.word	.LANCHOR74
+	.word	.LANCHOR36
+	.word	.LC31
+	.word	.LANCHOR53
+	.word	.LANCHOR77
+	.word	.LC32
+	.word	.LC33
 	.word	.LANCHOR120
+.LBE428:
+.LBE429:
+	.cfi_endproc
+.LFE320:
 	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
 	.section	.text.allocate_data_superblock,"ax",%progbits
 	.align	1
@@ -11650,16 +19364,37 @@ FtlBbmTblFlush:
 	.fpu softvfp
 	.type	allocate_data_superblock, %function
 allocate_data_superblock:
-	@ args = 0, pretend = 0, frame = 16
+.LFB386:
+	.loc 1 2852 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r4, r0
+.LVL1894:
+	.loc 1 2858 0
 	ldr	r3, .L1743
+	.loc 1 2852 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 1 2852 0
+	mov	r4, r0
+	.loc 1 2858 0
 	ldr	r3, [r3]
 	cmp	r3, #0
 	bne	.L1682
 	ldr	r7, .L1743+4
+.LVL1895:
 .L1681:
+.LBB434:
+.LBB435:
+	.loc 1 2861 0
 	ldr	r3, .L1743+4
 	ldr	r6, .L1743+8
 	ldrh	r3, [r3]
@@ -11670,17 +19405,21 @@ allocate_data_superblock:
 	cmp	r3, r2
 	ble	.L1683
 	ldr	r1, .L1743+16
-	movw	r2, #2822
+	movw	r2, #2861
 	ldr	r0, .L1743+20
 	bl	printf
+.LVL1896:
 	ldr	r1, .L1743+24
 	ldr	r0, .L1743+28
 	bl	printf
+.LVL1897:
 .L1683:
+	.loc 1 2863 0
 	ldr	r3, .L1743+32
 	ldrb	r2, [r4, #8]	@ zero_extendqisi2
 	cmp	r4, r3
 	bne	.L1684
+	.loc 1 2864 0
 	ldr	r3, .L1743+36
 	ldrh	r5, [r7]
 	ldr	r3, [r3]
@@ -11688,8 +19427,12 @@ allocate_data_superblock:
 	mul	ip, r3, r5
 	adds	r1, r0, #1
 	add	r1, r1, ip, lsr #2
+	.loc 1 2865 0
 	ldr	ip, .L1743+48
+	.loc 1 2864 0
 	uxth	r1, r1
+.LVL1898:
+	.loc 1 2865 0
 	ldr	ip, [ip]
 	cmp	ip, #0
 	beq	.L1685
@@ -11697,6 +19440,7 @@ allocate_data_superblock:
 	ldr	ip, [ip]
 	cmp	ip, #29
 	bhi	.L1685
+	.loc 1 2866 0
 	cmp	ip, #2
 	bls	.L1718
 	lsls	r5, r5, #31
@@ -11704,9 +19448,13 @@ allocate_data_superblock:
 	cmp	r3, #0
 	beq	.L1718
 .L1714:
+	.loc 1 2869 0
 	mov	r1, r0
+.LVL1899:
 	b	.L1685
+.LVL1900:
 .L1684:
+	.loc 1 2873 0
 	cmp	r2, #1
 	bne	.L1718
 	ldr	r3, .L1743+40
@@ -11717,49 +19465,74 @@ allocate_data_superblock:
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
 	bne	.L1718
+	.loc 1 2875 0
 	ldr	r0, .L1743+48
+	.loc 1 2874 0
 	ldrh	r3, [r7]
+	.loc 1 2875 0
 	ldr	r0, [r0]
+	.loc 1 2874 0
 	lsrs	r1, r3, #3
+.LVL1901:
+	.loc 1 2875 0
 	cbz	r0, .L1685
 	ldr	r0, .L1743+52
 	ldr	r0, [r0]
 	cmp	r0, #1
 	bhi	.L1685
+	.loc 1 2876 0
 	rsb	r3, r3, r3, lsl #3
 	ubfx	r1, r3, #3, #16
+.LVL1902:
 .L1685:
+	.loc 1 2879 0
 	cbz	r1, .L1686
+	.loc 1 2880 0
 	subs	r1, r1, #1
+.LVL1903:
 	uxth	r1, r1
+.LVL1904:
 .L1686:
+	.loc 1 2881 0
 	ldr	r0, .L1743+56
 	bl	List_pop_index_node
+.LVL1905:
 	ldrh	r3, [r7]
 	mov	r5, r0
 	uxth	r8, r0
+.LVL1906:
 	cbnz	r3, .L1687
 	ldr	r1, .L1743+16
-	movw	r2, #2842
+	movw	r2, #2881
 	ldr	r0, .L1743+20
 	bl	printf
+.LVL1907:
 	ldr	r1, .L1743+24
 	ldr	r0, .L1743+28
 	bl	printf
+.LVL1908:
 .L1687:
 	ldrh	r3, [r7]
+	.loc 1 2886 0
 	mov	r0, r4
+	.loc 1 2881 0
 	subs	r3, r3, #1
 	strh	r3, [r7]	@ movhi
+	.loc 1 2885 0
 	strh	r8, [r4]	@ movhi
+	.loc 1 2886 0
 	bl	make_superblock
+.LVL1909:
+	.loc 1 2887 0
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	cbnz	r3, .L1688
+	.loc 1 2891 0
 	ldr	r3, .L1743+60
 	uxth	r5, r5
 	movw	r2, #65535
 	ldr	r3, [r3]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
+	.loc 1 2893 0
 	ldrh	r2, [r6]
 	ldrh	r3, [r7]
 	add	r3, r3, r2
@@ -11767,18 +19540,24 @@ allocate_data_superblock:
 	ldrh	r2, [r2]
 	cmp	r3, r2
 	ble	.L1681
-	movw	r2, #2854
+	movw	r2, #2893
 	ldr	r1, .L1743+16
 	ldr	r0, .L1743+20
 	bl	printf
+.LVL1910:
 	ldr	r1, .L1743+24
 	ldr	r0, .L1743+28
 	bl	printf
+.LVL1911:
 	b	.L1681
+.LVL1912:
 .L1718:
+	.loc 1 2873 0
 	movs	r1, #0
 	b	.L1686
+.LVL1913:
 .L1688:
+	.loc 1 2896 0
 	ldrh	r2, [r6]
 	ldrh	r3, [r7]
 	add	r3, r3, r2
@@ -11787,155 +19566,210 @@ allocate_data_superblock:
 	cmp	r3, r2
 	ble	.L1690
 	ldr	r1, .L1743+16
-	movw	r2, #2857
+	mov	r2, #2896
 	ldr	r0, .L1743+20
 	bl	printf
+.LVL1914:
 	ldr	r1, .L1743+24
 	ldr	r0, .L1743+28
 	bl	printf
+.LVL1915:
 .L1690:
+	.loc 1 2899 0
 	ldr	r2, .L1743+64
+	.loc 1 2900 0
 	movs	r6, #0
-	ldr	fp, .L1743+100
+	ldr	r10, .L1743+104
 	add	ip, r4, #16
 	mov	lr, r6
-	movw	r10, #65535
 	ldrh	r1, [r2]
 	movs	r2, #36
-	ldr	r0, [fp]
-	str	r2, [sp, #4]
+	ldr	r0, [r10]
 	mov	r3, r0
 	mla	r1, r2, r1, r0
 	str	r1, [sp]
 .L1691:
-	ldr	r2, [sp]
-	cmp	r2, r3
+.LVL1916:
+	.loc 1 2899 0
+	ldr	r1, [sp]
+	cmp	r1, r3
 	bne	.L1693
+	.loc 1 2908 0
 	cbnz	r6, .L1694
 	ldr	r1, .L1743+16
-	movw	r2, #2869
+	movw	r2, #2908
 	ldr	r0, .L1743+20
 	bl	printf
+.LVL1917:
 	ldr	r1, .L1743+24
 	ldr	r0, .L1743+28
 	bl	printf
+.LVL1918:
 .L1694:
+	.loc 1 2910 0
 	ldr	r3, .L1743+48
 	uxth	r5, r5
-	ldr	r10, .L1743+104
+	ldr	fp, .L1743+108
 	ldr	r3, [r3]
 	cbz	r3, .L1695
 	ldr	r3, .L1743+68
 	cmp	r4, r3
 	bne	.L1695
-	ldr	r3, [r10]
+	.loc 1 2911 0
+	ldr	r3, [fp]
 	ldrh	r3, [r3, r5, lsl #1]
 	cmp	r3, #30
+	.loc 1 2912 0
 	itt	hi
 	movhi	r3, #0
 	strbhi	r3, [r4, #8]
 .L1695:
+	.loc 1 2915 0
 	ldr	r3, .L1743+72
 	ldrh	r3, [r3]
 	cmp	r3, r8
 	bne	.L1696
 	ldr	r1, .L1743+16
-	movw	r2, #2876
+	movw	r2, #2915
 	ldr	r0, .L1743+20
 	bl	printf
+.LVL1919:
 	ldr	r1, .L1743+24
 	ldr	r0, .L1743+28
 	bl	printf
+.LVL1920:
 .L1696:
+	.loc 1 2916 0
 	ldrb	r1, [r4, #8]	@ zero_extendqisi2
 	ldr	r2, .L1743+76
 	ldr	r3, .L1743+80
 	cmp	r1, #0
 	bne	.L1697
-	ldr	r0, [r10]
+	.loc 1 2917 0
+	ldr	r0, [fp]
 	ldrh	lr, [r0, r5, lsl #1]
 	cmp	lr, #0
 	beq	.L1698
+	.loc 1 2918 0
 	ldr	r1, .L1743+84
 	ldrh	ip, [r1]
 	add	r1, lr, ip
 .L1741:
+	.loc 1 2920 0
 	strh	r1, [r0, r5, lsl #1]	@ movhi
+	.loc 1 2922 0
 	mov	r0, r8
+	.loc 1 2921 0
 	ldr	r1, [r2]
 	str	r3, [sp, #4]
 	str	r2, [sp]
 	adds	r1, r1, #1
 	str	r1, [r2]
+	.loc 1 2922 0
 	movs	r1, #0
 	bl	ftl_set_blk_mode
+.LVL1921:
 	ldm	sp, {r2, r3}
 .L1700:
-	lsls	r1, r5, #1
+	.loc 1 2929 0
+	ldr	r1, [fp]
+	.loc 1 2932 0
 	ldr	r3, [r3]
 	ldr	r2, [r2]
-	str	r1, [sp]
-	ldr	r1, [r10]
+	.loc 1 2929 0
 	ldrh	ip, [r1, r5, lsl #1]
 	ldr	r1, .L1743+88
 	ldr	r0, [r1]
 	cmp	ip, r0
+	.loc 1 2930 0
 	it	hi
 	strhi	ip, [r1]
+	.loc 1 2932 0
 	ldr	r1, .L1743+84
 	ldrh	r0, [r1]
 	ldr	r1, .L1743+12
 	mla	r0, r2, r0, r3
 	ldrh	r1, [r1]
 	bl	__aeabi_uidiv
+.LVL1922:
 	ldr	r3, .L1743+92
-	ldr	ip, .L1743+108
 	str	r0, [r3]
+	.loc 1 2933 0
 	ldr	r3, .L1743+96
-	ldr	r0, [fp]
+	.loc 1 2936 0
+	ldr	r0, .L1743+100
+	.loc 1 2933 0
 	ldr	r2, [r3]
-	adds	r1, r0, #4
 	ldr	r3, [r2, #16]
 	adds	r3, r3, #1
 	str	r3, [r2, #16]
+.LVL1923:
 	movs	r3, #36
-	mla	r3, r3, r6, r0
+	.loc 1 2936 0
+	ldr	r2, [r10]
+	adds	r1, r2, #4
+	mla	r3, r3, r6, r2
 	adds	r3, r3, #40
+.LVL1924:
 .L1702:
 	adds	r1, r1, #36
+	.loc 1 2935 0
 	cmp	r3, r1
 	bne	.L1703
+	.loc 1 2937 0
 	ldr	r3, .L1743+44
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cbz	r3, .L1704
+	.loc 1 2938 0
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	.loc 1 2939 0
 	mov	r2, r6
+	.loc 1 2941 0
+	ldr	r0, [r10]
+	.loc 1 2938 0
 	cmp	r3, #1
+	.loc 1 2939 0
 	ite	eq
 	moveq	r1, #0
+	.loc 1 2941 0
 	movne	r1, #1
 	bl	FlashEraseBlocks
+.LVL1925:
 .L1704:
-	ldrb	r1, [r4, #8]	@ zero_extendqisi2
+	.loc 1 2943 0
 	mov	r2, r6
-	ldr	r0, [fp]
+	ldr	r0, [r10]
+	ldrb	r1, [r4, #8]	@ zero_extendqisi2
 	mov	r10, #0
 	bl	FlashEraseBlocks
-	mov	r3, r10
-	movs	r1, #36
+.LVL1926:
+	.loc 1 2944 0
+	mov	fp, r10
+	.loc 1 2946 0
+	movs	r2, #36
+.LVL1927:
 .L1706:
-	uxth	r2, r10
-	cmp	r6, r2
+	.loc 1 2945 0
+	uxth	r3, r10
+	cmp	r6, r3
 	bhi	.L1708
-	cbz	r3, .L1709
+	.loc 1 2956 0
+	cmp	fp, #0
+	beq	.L1709
+	.loc 1 2957 0
 	mov	r0, r8
 	bl	update_multiplier_value
+.LVL1928:
+	.loc 1 2958 0
 	bl	FtlBbmTblFlush
+.LVL1929:
 .L1709:
+	.loc 1 2961 0
 	ldrb	r2, [r4, #7]	@ zero_extendqisi2
 	ldr	r1, .L1743+60
 	cmp	r2, #0
 	bne	.L1710
+	.loc 1 2963 0
 	ldr	r3, [r1]
 	movw	r2, #65535
 	strh	r2, [r3, r5, lsl #1]	@ movhi
@@ -11943,143 +19777,205 @@ allocate_data_superblock:
 .L1744:
 	.align	2
 .L1743:
-	.word	.LANCHOR75
-	.word	.LANCHOR87
-	.word	.LANCHOR84
-	.word	.LANCHOR38
+	.word	.LANCHOR76
+	.word	.LANCHOR88
+	.word	.LANCHOR85
+	.word	.LANCHOR39
 	.word	.LANCHOR200
-	.word	.LC4
-	.word	.LC5
 	.word	.LC6
-	.word	.LANCHOR92
-	.word	.LANCHOR170
-	.word	.LANCHOR42
+	.word	.LC7
+	.word	.LC8
+	.word	.LANCHOR93
+	.word	.LANCHOR169
+	.word	.LANCHOR43
 	.word	.LANCHOR8
-	.word	.LANCHOR101
-	.word	.LANCHOR168
-	.word	.LANCHOR86
-	.word	.LANCHOR82
-	.word	.LANCHOR36
-	.word	.LANCHOR90
+	.word	.LANCHOR28
+	.word	.LANCHOR167
+	.word	.LANCHOR87
+	.word	.LANCHOR83
+	.word	.LANCHOR37
+	.word	.LANCHOR91
 	.word	.LANCHOR201
+	.word	.LANCHOR164
 	.word	.LANCHOR165
+	.word	.LANCHOR47
 	.word	.LANCHOR166
-	.word	.LANCHOR46
-	.word	.LANCHOR167
 	.word	.LANCHOR202
 	.word	.LANCHOR188
-	.word	.LANCHOR76
-	.word	.LANCHOR77
 	.word	-1024
+	.word	.LANCHOR77
+	.word	.LANCHOR78
+.LVL1930:
 .L1693:
-	ldrh	r1, [ip], #2
+	.loc 1 2900 0
 	str	lr, [r3, #8]
+	.loc 1 2903 0
+	movw	fp, #65535
+	.loc 1 2901 0
 	str	lr, [r3, #12]
-	cmp	r1, r10
+	.loc 1 2903 0
+	ldrh	r1, [ip], #2
+	cmp	r1, fp
 	beq	.L1692
-	ldr	r2, [sp, #4]
-	lsls	r1, r1, #10
-	mla	r2, r2, r6, r0
+	.loc 1 2904 0
+	mla	fp, r2, r6, r0
+	.loc 1 2905 0
 	adds	r6, r6, #1
+.LVL1931:
+	.loc 1 2904 0
+	lsls	r1, r1, #10
+	.loc 1 2905 0
 	uxth	r6, r6
-	str	r1, [r2, #4]
+.LVL1932:
+	.loc 1 2904 0
+	str	r1, [fp, #4]
 .L1692:
 	adds	r3, r3, #36
 	b	.L1691
 .L1698:
+	.loc 1 2920 0
 	movs	r1, #2
 	b	.L1741
 .L1697:
-	ldr	r0, [r10]
+	.loc 1 2924 0
+	ldr	r0, [fp]
 	str	r2, [sp, #4]
+	.loc 1 2925 0
 	str	r3, [sp]
+.LVL1933:
+	.loc 1 2924 0
 	ldrh	r1, [r0, r5, lsl #1]
 	adds	r1, r1, #1
 	strh	r1, [r0, r5, lsl #1]	@ movhi
+.LBB436:
+.LBB437:
 	mov	r0, r8
+.LBE437:
+.LBE436:
+	.loc 1 2925 0
 	ldr	r1, [r3]
 	adds	r1, r1, #1
 	str	r1, [r3]
-	bl	ftl_set_blk_mode.part.9
+.LBB439:
+.LBB438:
+	bl	ftl_set_blk_mode.part.10
+.LVL1934:
 	ldr	r2, [sp, #4]
 	ldr	r3, [sp]
 	b	.L1700
+.LVL1935:
 .L1703:
+.LBE438:
+.LBE439:
+	.loc 1 2936 0
 	ldr	r2, [r1, #-36]
-	and	r2, r2, ip
+	ands	r2, r2, r0
 	str	r2, [r1, #-36]
 	b	.L1702
+.LVL1936:
 .L1708:
-	ldr	r0, .L1745
-	mul	r2, r1, r10
-	ldr	r0, [r0]
-	add	ip, r0, r2
-	ldr	r2, [r0, r2]
-	adds	r0, r2, #1
+	.loc 1 2946 0
+	ldr	r1, .L1745
+	mul	r3, r2, r10
+	ldr	r1, [r1]
+	adds	r0, r1, r3
+	ldr	r3, [r1, r3]
+	adds	r1, r3, #1
 	bne	.L1707
-	ldr	r0, [ip, #4]
-	adds	r3, r3, #1
-	str	r1, [sp, #12]
-	str	r2, [sp, #8]
+	.loc 1 2948 0
+	ldr	r0, [r0, #4]
+	.loc 1 2947 0
+	add	fp, fp, #1
+.LVL1937:
+	str	r2, [sp, #4]
+	str	r3, [sp]
+	.loc 1 2949 0
 	ubfx	r0, r0, #10, #16
-	str	r3, [sp, #4]
 	bl	FtlBbmMapBadBlock
-	ldr	r2, [sp, #8]
-	add	r0, r4, r10, lsl #1
-	ldr	r1, [sp, #12]
-	ldr	r3, [sp, #4]
-	strh	r2, [r0, #16]	@ movhi
-	ldrb	r2, [r4, #7]	@ zero_extendqisi2
-	subs	r2, r2, #1
-	strb	r2, [r4, #7]
+.LVL1938:
+	.loc 1 2950 0
+	ldr	r3, [sp]
+	add	r1, r4, r10, lsl #1
+	.loc 1 2951 0
+	ldr	r2, [sp, #4]
+	.loc 1 2950 0
+	strh	r3, [r1, #16]	@ movhi
+	.loc 1 2951 0
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	subs	r3, r3, #1
+	strb	r3, [r4, #7]
 .L1707:
+.LVL1939:
 	add	r10, r10, #1
+.LVL1940:
 	b	.L1706
+.LVL1941:
 .L1710:
+	.loc 1 2968 0
 	ldr	r3, .L1745+4
+	.loc 1 2972 0
 	ldr	r0, .L1745+8
+	.loc 1 2968 0
 	ldrh	r3, [r3]
+	.loc 1 2969 0
 	strh	r8, [r4]	@ movhi
+	.loc 1 2968 0
 	smulbb	r3, r3, r2
+	.loc 1 2970 0
 	movs	r2, #0
 	strh	r2, [r4, #2]	@ movhi
+	.loc 1 2971 0
 	strb	r2, [r4, #6]
+	.loc 1 2972 0
 	ldr	r2, [r0]
+	.loc 1 2968 0
 	uxth	r3, r3
 	strh	r3, [r4, #4]	@ movhi
+	.loc 1 2972 0
 	str	r2, [r4, #12]
 	adds	r2, r2, #1
 	str	r2, [r0]
+	.loc 1 2973 0
 	ldr	r2, [r1]
-	ldr	r1, [sp]
-	strh	r3, [r2, r1]	@ movhi
+	ldrh	r0, [r4]
+	strh	r3, [r2, r0, lsl #1]	@ movhi
+	.loc 1 2974 0
 	ldrh	r3, [r4, #4]
 	cbz	r3, .L1711
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	cbnz	r3, .L1682
 .L1711:
 	ldr	r1, .L1745+12
-	movw	r2, #2935
+	movw	r2, #2974
 	ldr	r0, .L1745+16
 	bl	printf
+.LVL1942:
 	ldr	r1, .L1745+20
 	ldr	r0, .L1745+24
 	bl	printf
+.LVL1943:
 .L1682:
+.LBE435:
+.LBE434:
+	.loc 1 2976 0
 	movs	r0, #0
-	add	sp, sp, #16
+	add	sp, sp, #8
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1944:
 .L1746:
 	.align	2
 .L1745:
-	.word	.LANCHOR76
-	.word	.LANCHOR51
-	.word	.LANCHOR157
+	.word	.LANCHOR77
+	.word	.LANCHOR52
+	.word	.LANCHOR156
 	.word	.LANCHOR200
-	.word	.LC4
-	.word	.LC5
 	.word	.LC6
+	.word	.LC7
+	.word	.LC8
+	.cfi_endproc
+.LFE386:
 	.size	allocate_data_superblock, .-allocate_data_superblock
 	.section	.text.FtlGcFreeBadSuperBlk,"ax",%progbits
 	.align	1
@@ -12090,75 +19986,138 @@ allocate_data_superblock:
 	.fpu softvfp
 	.type	FtlGcFreeBadSuperBlk, %function
 FtlGcFreeBadSuperBlk:
+.LFB406:
+	.loc 6 438 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1945:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 6 438 0
 	mov	r10, r0
+	.loc 6 443 0
 	ldr	r4, .L1759
 	ldrh	r3, [r4]
 	cbz	r3, .L1748
+.LBB442:
+.LBB443:
+	.loc 6 447 0
 	ldr	r8, .L1759+12
+.LBE443:
+.LBE442:
 	movs	r7, #0
+.LVL1946:
 .L1749:
+.LBB446:
+.LBB444:
+	.loc 6 444 0
 	ldr	r3, .L1759+4
 	ldrh	r2, [r3]
 	uxth	r3, r7
 	cmp	r2, r3
 	bhi	.L1755
+	.loc 6 460 0
 	bl	FtlGcReFreshBadBlk
+.LVL1947:
 .L1748:
+.LBE444:
+.LBE446:
+	.loc 6 477 0
 	movs	r0, #0
 	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1948:
 .L1755:
+	.cfi_restore_state
+.LBB447:
+.LBB445:
+	.loc 6 445 0
 	ldr	r2, .L1759+8
 	uxth	r3, r7
 	mov	r1, r10
 	mov	fp, #0
 	ldrb	r0, [r2, r3]	@ zero_extendqisi2
 	bl	V2P_block
+.LVL1949:
 	mov	r1, r0
+.LVL1950:
 .L1750:
+	.loc 6 446 0
 	ldrh	r3, [r4]
 	uxth	r5, fp
+.LVL1951:
 	cmp	r3, r5
 	bhi	.L1754
+.LVL1952:
 	adds	r7, r7, #1
+.LVL1953:
 	b	.L1749
+.LVL1954:
 .L1754:
+	.loc 6 447 0
 	uxth	r6, fp
 	ldrh	r3, [r8, r6, lsl #1]
 	cmp	r3, r1
 	bne	.L1751
+	.loc 6 451 0
 	mov	r0, r1
 	str	r1, [sp, #4]
 	bl	FtlBbmMapBadBlock
+.LVL1955:
+	.loc 6 452 0
 	bl	FtlBbmTblFlush
+.LVL1956:
+	.loc 6 453 0
 	ldrh	r2, [r4]
 	add	r3, r8, r6, lsl #1
 	ldr	r1, [sp, #4]
+.LVL1957:
 .L1752:
 	cmp	r5, r2
 	bcc	.L1753
+	.loc 6 455 0
 	subs	r2, r2, #1
 	strh	r2, [r4]	@ movhi
+.LVL1958:
 .L1751:
 	add	fp, fp, #1
+.LVL1959:
 	b	.L1750
+.LVL1960:
 .L1753:
+	.loc 6 454 0
 	ldrh	r0, [r3, #2]!
+	.loc 6 453 0
 	adds	r5, r5, #1
+.LVL1961:
 	uxth	r5, r5
+.LVL1962:
+	.loc 6 454 0
 	strh	r0, [r3, #-2]	@ movhi
 	b	.L1752
 .L1760:
 	.align	2
 .L1759:
 	.word	.LANCHOR114
-	.word	.LANCHOR36
-	.word	.LANCHOR45
+	.word	.LANCHOR37
+	.word	.LANCHOR46
 	.word	.LANCHOR115
+.LBE445:
+.LBE447:
+	.cfi_endproc
+.LFE406:
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
 	.section	.text.update_vpc_list,"ax",%progbits
 	.align	1
@@ -12169,43 +20128,71 @@ FtlGcFreeBadSuperBlk:
 	.fpu softvfp
 	.type	update_vpc_list, %function
 update_vpc_list:
+.LFB389:
+	.loc 1 3076 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1963:
 	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 1 3076 0
 	mov	r4, r0
+	.loc 1 3077 0
 	ldr	r3, .L1771
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
 	bne	.L1762
+	.loc 1 3078 0
 	ldr	r2, .L1771+4
 	ldrh	r1, [r2]
 	cmp	r1, r0
 	bne	.L1763
+	.loc 1 3080 0
 	movw	r3, #65535
 	strh	r3, [r2]	@ movhi
 .L1764:
+.LVL1964:
+.LBB450:
+.LBB451:
+	.loc 1 3085 0
 	ldr	r5, .L1771+8
 	mov	r1, r4
 	ldr	r0, .L1771+12
+.LVL1965:
 	bl	List_remove_node
+.LVL1966:
 	ldrh	r3, [r5]
 	cbnz	r3, .L1766
 	ldr	r1, .L1771+16
-	movw	r2, #3046
+	movw	r2, #3085
 	ldr	r0, .L1771+20
 	bl	printf
+.LVL1967:
 	ldr	r1, .L1771+24
 	ldr	r0, .L1771+28
 	bl	printf
+.LVL1968:
 .L1766:
 	ldrh	r3, [r5]
+	.loc 1 3086 0
 	mov	r0, r4
+	.loc 1 3085 0
 	subs	r3, r3, #1
 	strh	r3, [r5]	@ movhi
+	.loc 1 3086 0
 	bl	free_data_superblock
+.LVL1969:
+	.loc 1 3087 0
 	mov	r0, r4
 	bl	FtlGcFreeBadSuperBlk
+.LVL1970:
+	.loc 1 3088 0
 	ldr	r3, .L1771+32
 	ldrh	r2, [r5]
 	ldrh	r3, [r3]
@@ -12215,51 +20202,67 @@ update_vpc_list:
 	cmp	r3, r2
 	ble	.L1770
 	ldr	r1, .L1771+16
-	movw	r2, #3049
+	mov	r2, #3088
 	ldr	r0, .L1771+20
 	bl	printf
+.LVL1971:
 	ldr	r1, .L1771+24
 	ldr	r0, .L1771+28
 	bl	printf
+.LVL1972:
 .L1770:
 	movs	r3, #1
 	b	.L1761
+.LVL1973:
 .L1763:
+.LBE451:
+.LBE450:
+	.loc 1 3081 0
 	ldr	r2, .L1771+40
 	ldrh	r2, [r2]
 	cmp	r2, r0
 	beq	.L1761
+	.loc 1 3081 0 is_stmt 0 discriminator 1
 	ldr	r2, .L1771+44
 	ldrh	r2, [r2]
 	cmp	r2, r0
 	beq	.L1761
+	.loc 1 3081 0 discriminator 2
 	ldr	r2, .L1771+48
 	ldrh	r2, [r2]
 	cmp	r2, r0
 	bne	.L1764
+.LVL1974:
 .L1761:
+	.loc 1 3094 0 is_stmt 1
 	mov	r0, r3
 	pop	{r3, r4, r5, pc}
+.LVL1975:
 .L1762:
+	.loc 1 3091 0
 	bl	List_update_data_list
+.LVL1976:
+	.loc 1 3093 0
 	movs	r3, #0
 	b	.L1761
 .L1772:
 	.align	2
 .L1771:
-	.word	.LANCHOR82
+	.word	.LANCHOR83
 	.word	.LANCHOR201
-	.word	.LANCHOR84
-	.word	.LANCHOR81
+	.word	.LANCHOR85
+	.word	.LANCHOR82
 	.word	.LANCHOR203
-	.word	.LC4
-	.word	.LC5
 	.word	.LC6
-	.word	.LANCHOR87
-	.word	.LANCHOR38
-	.word	.LANCHOR90
+	.word	.LC7
+	.word	.LC8
+	.word	.LANCHOR88
+	.word	.LANCHOR39
 	.word	.LANCHOR91
 	.word	.LANCHOR92
+	.word	.LANCHOR93
+	.cfi_endproc
+.LFE389:
 	.size	update_vpc_list, .-update_vpc_list
 	.section	.text.decrement_vpc_count,"ax",%progbits
 	.align	1
@@ -12270,59 +20273,102 @@ update_vpc_list:
 	.fpu softvfp
 	.type	decrement_vpc_count, %function
 decrement_vpc_count:
+.LFB390:
+	.loc 1 3097 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1977:
+	.loc 1 3100 0
 	movw	r3, #65535
+	.loc 1 3097 0
 	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 1 3100 0
 	cmp	r0, r3
+	.loc 1 3097 0
 	mov	r4, r0
+	.loc 1 3100 0
 	beq	.L1774
+	.loc 1 3101 0
 	ldr	r5, .L1782
 	ldr	r3, [r5]
 	ldrh	r2, [r3, r0, lsl #1]
 	cbnz	r2, .L1775
+	.loc 1 3102 0
 	mov	r1, r0
 	ldr	r0, .L1782+4
+.LVL1978:
 	bl	printf
+.LVL1979:
+	.loc 1 3103 0
 	ldr	r3, [r5]
 	ldrh	r5, [r3, r4, lsl #1]
 	cbz	r5, .L1776
 .L1780:
+	.loc 1 3118 0
 	movs	r5, #0
+.LVL1980:
 .L1773:
+	.loc 1 3128 0
 	mov	r0, r5
 	pop	{r4, r5, r6, pc}
+.LVL1981:
 .L1776:
-	movw	r2, #3064
+	.loc 1 3103 0 discriminator 1
+	movw	r2, #3103
+.LVL1982:
 .L1781:
+	.loc 1 3125 0 discriminator 2
 	ldr	r1, .L1782+8
 	ldr	r0, .L1782+12
 	bl	printf
+.LVL1983:
 	ldr	r1, .L1782+16
 	ldr	r0, .L1782+20
 	bl	printf
+.LVL1984:
 	b	.L1773
+.LVL1985:
 .L1775:
+	.loc 1 3112 0
 	subs	r2, r2, #1
 	strh	r2, [r3, r0, lsl #1]	@ movhi
 .L1774:
+	.loc 1 3116 0
 	ldr	r6, .L1782+24
 	movw	r3, #65535
 	ldrh	r0, [r6]
+.LVL1986:
 	cmp	r0, r3
 	bne	.L1778
+	.loc 1 3117 0
 	strh	r4, [r6]	@ movhi
 	b	.L1780
 .L1778:
+	.loc 1 3119 0
 	cmp	r4, r0
 	beq	.L1780
+	.loc 1 3122 0
 	bl	update_vpc_list
+.LVL1987:
+	.loc 1 3125 0
 	ldr	r3, .L1782+28
+	.loc 1 3122 0
 	adds	r5, r0, #0
+	.loc 1 3125 0
 	ldr	r2, .L1782+32
+	.loc 1 3122 0
 	it	ne
 	movne	r5, #1
+.LVL1988:
+	.loc 1 3124 0
 	strh	r4, [r6]	@ movhi
+	.loc 1 3125 0
 	ldr	r3, [r3]
 	ldr	r2, [r2]
 	subs	r3, r3, r2
@@ -12335,23 +20381,27 @@ decrement_vpc_count:
 	ldrh	r2, [r2, r1, lsl #1]
 	cmp	r2, #0
 	bne	.L1773
+	.loc 1 3125 0 is_stmt 0 discriminator 1
 	cmp	r4, r1
 	beq	.L1773
-	movw	r2, #3086
+	.loc 1 3125 0 discriminator 2
+	movw	r2, #3125
 	b	.L1781
 .L1783:
 	.align	2
 .L1782:
-	.word	.LANCHOR82
-	.word	.LC31
+	.word	.LANCHOR83
+	.word	.LC34
 	.word	.LANCHOR204
-	.word	.LC4
-	.word	.LC5
 	.word	.LC6
+	.word	.LC7
+	.word	.LC8
 	.word	.LANCHOR130
+	.word	.LANCHOR82
 	.word	.LANCHOR81
-	.word	.LANCHOR80
 	.word	-1431655765
+	.cfi_endproc
+.LFE390:
 	.size	decrement_vpc_count, .-decrement_vpc_count
 	.section	.text.FtlSlcSuperblockCheck,"ax",%progbits
 	.align	1
@@ -12362,76 +20412,125 @@ decrement_vpc_count:
 	.fpu softvfp
 	.type	FtlSlcSuperblockCheck, %function
 FtlSlcSuperblockCheck:
+.LFB373:
+	.loc 1 2278 0 is_stmt 1
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldrh	r3, [r0, #4]
+.LVL1989:
 	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 1 2278 0
 	mov	r4, r0
+	.loc 1 2281 0
+	ldrh	r3, [r0, #4]
 	cmp	r3, #0
 	beq	.L1784
+	.loc 1 2283 0
 	ldrh	r2, [r0]
 	movw	r3, #65535
 	cmp	r2, r3
 	beq	.L1784
+.LVL1990:
+.LBB454:
+.LBB455:
+	.loc 1 2285 0
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	ldr	r5, .L1795
+	.loc 1 2297 0
 	ldr	r6, .L1795+4
+	.loc 1 2285 0
 	adds	r3, r3, #8
 	ldrh	r3, [r0, r3, lsl #1]
+.LVL1991:
 .L1788:
+	.loc 1 2286 0
 	movw	r2, #65535
 	cmp	r3, r2
 	beq	.L1790
+	.loc 1 2296 0
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+.LVL1992:
 	cmp	r3, #1
 	bne	.L1791
 	ldrb	r1, [r5]	@ zero_extendqisi2
 	cbnz	r1, .L1791
+	.loc 1 2297 0
 	ldrh	r1, [r4, #2]
+	.loc 1 2296 0
 	ldrh	r1, [r6, r1, lsl #1]
 	cmp	r1, r2
 	bne	.L1791
+	.loc 1 2298 0
 	ldrh	r3, [r4, #4]
+	.loc 1 2299 0
 	ldrh	r0, [r4]
+	.loc 1 2298 0
 	subs	r3, r3, #1
 	strh	r3, [r4, #4]	@ movhi
+	.loc 1 2299 0
 	bl	decrement_vpc_count
+.LVL1993:
+	.loc 1 2300 0
 	ldrh	r2, [r4, #4]
 	cbnz	r2, .L1790
+	.loc 1 2301 0
 	ldrh	r3, [r4, #2]
+	.loc 1 2302 0
 	strb	r2, [r4, #6]
+	.loc 1 2301 0
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	pop	{r4, r5, r6, pc}
+.LVL1994:
 .L1790:
+.LDL2:
+	.loc 1 2288 0
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	.loc 1 2289 0
 	ldr	r2, .L1795+8
+	.loc 1 2288 0
 	adds	r3, r3, #1
+	.loc 1 2289 0
 	ldrh	r2, [r2]
+	.loc 1 2288 0
 	uxtb	r3, r3
 	strb	r3, [r4, #6]
+	.loc 1 2289 0
 	cmp	r2, r3
 	bne	.L1789
+	.loc 1 2290 0
 	ldrh	r3, [r4, #2]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
+	.loc 1 2291 0
 	movs	r3, #0
 	strb	r3, [r4, #6]
 .L1789:
+	.loc 1 2293 0
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r3, [r4, r3, lsl #1]
+.LVL1995:
 	b	.L1788
+.LVL1996:
 .L1791:
+	.loc 1 2308 0
 	ldrb	r2, [r5]	@ zero_extendqisi2
 	cbz	r2, .L1784
 	cmp	r3, #1
 	bne	.L1784
+	.loc 1 2309 0
 	ldr	r3, .L1795+12
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
 	bcc	.L1784
+	.loc 1 2310 0
 	ldr	r3, .L1795+16
 	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
@@ -12439,23 +20538,34 @@ FtlSlcSuperblockCheck:
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
+	.loc 1 2311 0
 	movs	r3, #0
+	.loc 1 2312 0
 	ldr	r2, .L1795+20
+	.loc 1 2311 0
 	strh	r3, [r4, #4]	@ movhi
+	.loc 1 2313 0
 	strb	r3, [r4, #6]
+	.loc 1 2312 0
 	ldrh	r2, [r2]
 	strh	r2, [r4, #2]	@ movhi
+.LVL1997:
 .L1784:
 	pop	{r4, r5, r6, pc}
+.LVL1998:
 .L1796:
 	.align	2
 .L1795:
 	.word	.LANCHOR8
 	.word	.LANCHOR117
-	.word	.LANCHOR36
+	.word	.LANCHOR37
+	.word	.LANCHOR53
+	.word	.LANCHOR83
 	.word	.LANCHOR52
-	.word	.LANCHOR82
-	.word	.LANCHOR51
+.LBE455:
+.LBE454:
+	.cfi_endproc
+.LFE373:
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
 	.section	.text.get_new_active_ppa,"ax",%progbits
 	.align	1
@@ -12466,135 +20576,209 @@ FtlSlcSuperblockCheck:
 	.fpu softvfp
 	.type	get_new_active_ppa, %function
 get_new_active_ppa:
+.LFB388:
+	.loc 1 3021 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldrh	r2, [r0]
-	movw	r3, #65535
+.LVL1999:
 	push	{r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
+	.cfi_offset 14, -4
+	.loc 1 3025 0
+	movw	r3, #65535
+	ldrh	r2, [r0]
+	.loc 1 3021 0
 	mov	r4, r0
+	.loc 1 3025 0
 	cmp	r2, r3
 	bne	.L1798
+	.loc 1 3025 0 is_stmt 0 discriminator 1
 	ldr	r1, .L1819
-	movw	r2, #2986
+	movw	r2, #3025
 	ldr	r0, .L1819+4
+.LVL2000:
 	bl	printf
+.LVL2001:
 	ldr	r1, .L1819+8
 	ldr	r0, .L1819+12
 	bl	printf
+.LVL2002:
 .L1798:
+	.loc 1 3026 0 is_stmt 1
 	ldr	r5, .L1819+16
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5]
 	cmp	r2, r3
 	bne	.L1799
+	.loc 1 3026 0 is_stmt 0 discriminator 1
 	ldr	r1, .L1819
-	movw	r2, #2987
+	movw	r2, #3026
 	ldr	r0, .L1819+4
 	bl	printf
+.LVL2003:
 	ldr	r1, .L1819+8
 	ldr	r0, .L1819+12
 	bl	printf
+.LVL2004:
 .L1799:
+	.loc 1 3027 0 is_stmt 1
 	ldrh	r3, [r4, #4]
 	cbnz	r3, .L1800
+	.loc 1 3027 0 is_stmt 0 discriminator 1
 	ldr	r1, .L1819
-	movw	r2, #2988
+	movw	r2, #3027
 	ldr	r0, .L1819+4
 	bl	printf
+.LVL2005:
 	ldr	r1, .L1819+8
 	ldr	r0, .L1819+12
 	bl	printf
+.LVL2006:
 .L1800:
+	.loc 1 3028 0 is_stmt 1
 	movs	r3, #0
 	ldr	r7, .L1819+20
 	strb	r3, [r4, #10]
+	.loc 1 3029 0
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	.loc 1 3039 0
 	ldr	r6, .L1819+24
+	.loc 1 3029 0
 	adds	r3, r3, #8
 	ldrh	r2, [r4, r3, lsl #1]
+.LVL2007:
 .L1801:
+	.loc 1 3030 0
 	movw	r0, #65535
 	cmp	r2, r0
 	beq	.L1802
+	.loc 1 3039 0
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	ldrh	r1, [r4, #2]
 	cmp	r3, #1
 	ldrh	r3, [r4, #4]
 	bne	.L1804
+	.loc 1 3039 0 is_stmt 0 discriminator 1
 	ldrb	ip, [r6]	@ zero_extendqisi2
 	cmp	ip, #0
 	bne	.L1804
+	.loc 1 3039 0 discriminator 2
 	ldr	ip, .L1819+28
 	ldrh	ip, [ip, r1, lsl #1]
 	cmp	ip, r0
 	bne	.L1804
+	.loc 1 3040 0 is_stmt 1
 	subs	r3, r3, #1
+	.loc 1 3041 0
 	ldrh	r0, [r4]
+	.loc 1 3040 0
 	strh	r3, [r4, #4]	@ movhi
+	.loc 1 3041 0
 	bl	decrement_vpc_count
+.LVL2008:
 .L1802:
+	.loc 1 3032 0
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	.loc 1 3033 0
 	ldrh	r2, [r7]
+	.loc 1 3032 0
 	adds	r3, r3, #1
 	uxtb	r3, r3
+	.loc 1 3033 0
 	cmp	r2, r3
+	.loc 1 3032 0
 	strb	r3, [r4, #6]
+	.loc 1 3033 0
 	bne	.L1803
+	.loc 1 3034 0
 	ldrh	r3, [r4, #2]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
+	.loc 1 3035 0
 	movs	r3, #0
 	strb	r3, [r4, #6]
 .L1803:
+	.loc 1 3037 0
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r2, [r4, r3, lsl #1]
+.LVL2009:
 	b	.L1801
 .L1804:
+	.loc 1 3055 0
 	ldr	r8, .L1819+24
+	.loc 1 3044 0
 	orr	r6, r1, r2, lsl #10
+.LVL2010:
+	.loc 1 3045 0
 	subs	r3, r3, #1
 	strh	r3, [r4, #4]	@ movhi
+.LVL2011:
 .L1805:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	.loc 1 3053 0
 	movw	r2, #65535
+	.loc 1 3049 0
 	ldrh	r0, [r7]
 .L1807:
+	.loc 1 3048 0
 	adds	r3, r3, #1
 	uxtb	r3, r3
+	.loc 1 3049 0
 	cmp	r3, r0
+	.loc 1 3050 0
 	itttt	eq
 	ldrheq	r3, [r4, #2]
 	addeq	r3, r3, #1
 	strheq	r3, [r4, #2]	@ movhi
+	.loc 1 3051 0
 	moveq	r3, #0
+	.loc 1 3053 0
 	add	r1, r3, #8
 	ldrh	r1, [r4, r1, lsl #1]
 	cmp	r1, r2
 	beq	.L1807
 	strb	r3, [r4, #6]
+	.loc 1 3055 0
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #1
 	bne	.L1808
+	.loc 1 3055 0 is_stmt 0 discriminator 1
 	ldrb	r1, [r8]	@ zero_extendqisi2
 	ldrh	r3, [r4, #2]
 	cbnz	r1, .L1809
+	.loc 1 3055 0 discriminator 2
 	ldr	r1, .L1819+28
 	ldrh	r3, [r1, r3, lsl #1]
 	cmp	r3, r2
 	bne	.L1808
+	.loc 1 3055 0 discriminator 3
 	ldrh	r3, [r4, #4]
 	cbz	r3, .L1808
+	.loc 1 3057 0 is_stmt 1
 	subs	r3, r3, #1
+	.loc 1 3058 0
 	ldrh	r0, [r4]
+	.loc 1 3057 0
 	strh	r3, [r4, #4]	@ movhi
+	.loc 1 3058 0
 	bl	decrement_vpc_count
+.LVL2012:
+	.loc 1 3059 0
 	b	.L1805
 .L1809:
+	.loc 1 3063 0
 	ldr	r2, .L1819+32
 	ldrh	r2, [r2]
 	cmp	r3, r2
 	bcc	.L1808
+	.loc 1 3064 0
 	ldr	r3, .L1819+36
 	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
@@ -12602,41 +20786,55 @@ get_new_active_ppa:
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
+	.loc 1 3065 0
 	movs	r3, #0
+	.loc 1 3066 0
 	ldrh	r2, [r5]
+	.loc 1 3065 0
 	strh	r3, [r4, #4]	@ movhi
+	.loc 1 3067 0
 	strb	r3, [r4, #6]
+	.loc 1 3066 0
 	strh	r2, [r4, #2]	@ movhi
 .L1808:
+	.loc 1 3071 0
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5]
 	cmp	r2, r3
 	bne	.L1797
+	.loc 1 3071 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r4, #4]
 	cbz	r3, .L1797
+	.loc 1 3071 0 discriminator 2
 	ldr	r1, .L1819
-	movw	r2, #3032
+	movw	r2, #3071
 	ldr	r0, .L1819+4
 	bl	printf
+.LVL2013:
 	ldr	r1, .L1819+8
 	ldr	r0, .L1819+12
 	bl	printf
+.LVL2014:
 .L1797:
+	.loc 1 3073 0 is_stmt 1
 	mov	r0, r6
 	pop	{r4, r5, r6, r7, r8, pc}
+.LVL2015:
 .L1820:
 	.align	2
 .L1819:
 	.word	.LANCHOR205
-	.word	.LC4
-	.word	.LC5
 	.word	.LC6
-	.word	.LANCHOR51
-	.word	.LANCHOR36
+	.word	.LC7
+	.word	.LC8
+	.word	.LANCHOR52
+	.word	.LANCHOR37
 	.word	.LANCHOR8
 	.word	.LANCHOR117
-	.word	.LANCHOR52
-	.word	.LANCHOR82
+	.word	.LANCHOR53
+	.word	.LANCHOR83
+	.cfi_endproc
+.LFE388:
 	.size	get_new_active_ppa, .-get_new_active_ppa
 	.section	.text.FtlVpcTblFlush,"ax",%progbits
 	.align	1
@@ -12647,94 +20845,172 @@ get_new_active_ppa:
 	.fpu softvfp
 	.type	FtlVpcTblFlush, %function
 FtlVpcTblFlush:
+.LFB360:
+	.loc 1 1135 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL2016:
+	.loc 1 1140 0
 	ldr	r3, .L1841
+	.loc 1 1135 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r1, [r3]
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 1 1140 0
+	ldr	r2, [r3]
 	str	r3, [sp]
-	cmp	r1, #0
+	cmp	r2, #0
 	bne	.L1823
-	ldr	r3, .L1841+4
+.LBB459:
+.LBB460:
+	.loc 1 1143 0
+	ldr	r8, .L1841+108
+	ldr	r4, .L1841+4
+	.loc 1 1144 0
 	ldr	r7, .L1841+8
-	ldr	r8, .L1841+104
-	ldr	r4, .L1841+12
+	.loc 1 1143 0
+	ldr	r3, [r8]
+	.loc 1 1152 0
+	ldr	r5, .L1841+12
+	.loc 1 1144 0
 	ldr	r6, [r7]
-	ldr	r0, [r8]
-	ldrh	r2, [r3]
+	.loc 1 1143 0
+	str	r3, [r4, #8]
+	.loc 1 1146 0
+	ldr	r3, .L1841+16
+	.loc 1 1144 0
 	str	r6, [r4, #12]
-	str	r0, [r4, #8]
-	strh	r2, [r6, #2]	@ movhi
-	movw	r2, #61604
-	ldr	r5, .L1841+16
-	strh	r2, [r6]	@ movhi
-	ldr	r2, [r3, #8]
+.LVL2017:
+	.loc 1 1153 0
+	ldr	r0, .L1841+20
+	.loc 1 1146 0
+	ldrh	r1, [r3]
+	.loc 1 1150 0
+	str	r2, [r6, #12]
+	.loc 1 1146 0
+	strh	r1, [r6, #2]	@ movhi
+	.loc 1 1147 0
+	movw	r1, #61604
+	strh	r1, [r6]	@ movhi
+	.loc 1 1148 0
+	ldr	r1, [r3, #8]
+	.loc 1 1149 0
+	str	r2, [r6, #8]
+	.loc 1 1153 0
+	ldr	r2, .L1841+24
+	.loc 1 1148 0
+	str	r1, [r6, #4]
+	.loc 1 1154 0
 	ldrh	r3, [r3, #6]
-	str	r1, [r6, #8]
-	str	r2, [r6, #4]
+	.loc 1 1153 0
+	stm	r5, {r0, r2}
+	.loc 1 1154 0
 	strh	r3, [r5, #8]	@ movhi
-	ldr	r3, .L1841+20
-	ldr	ip, .L1841+108
-	ldr	r2, .L1841+24
+	.loc 1 1155 0
+	ldr	r3, .L1841+28
 	ldrh	r3, [r3]
-	str	r1, [r6, #12]
-	stm	r5, {r2, ip}
 	strb	r3, [r5, #10]
-	ldr	r3, .L1841+28
+	.loc 1 1157 0
+	ldr	r3, .L1841+32
 	ldrh	r2, [r3]
+	.loc 1 1158 0
 	ldrh	r1, [r3, #2]
+	.loc 1 1157 0
 	strh	r2, [r5, #14]	@ movhi
+	.loc 1 1158 0
 	ldrb	r2, [r3, #6]	@ zero_extendqisi2
+	.loc 1 1159 0
 	ldrb	r3, [r3, #8]	@ zero_extendqisi2
 	strb	r3, [r5, #11]
+	.loc 1 1158 0
 	orr	r2, r2, r1, lsl #6
-	ldr	r3, .L1841+32
+	.loc 1 1161 0
+	ldr	r3, .L1841+36
+	.loc 1 1158 0
 	strh	r2, [r5, #16]	@ movhi
+	.loc 1 1161 0
 	ldrh	r2, [r3]
+	.loc 1 1162 0
 	ldrh	r1, [r3, #2]
+	.loc 1 1161 0
 	strh	r2, [r5, #18]	@ movhi
+	.loc 1 1162 0
 	ldrb	r2, [r3, #6]	@ zero_extendqisi2
+	.loc 1 1163 0
 	ldrb	r3, [r3, #8]	@ zero_extendqisi2
 	strb	r3, [r5, #12]
+	.loc 1 1162 0
 	orr	r2, r2, r1, lsl #6
-	ldr	r3, .L1841+36
+	.loc 1 1165 0
+	ldr	r3, .L1841+40
+	.loc 1 1162 0
 	strh	r2, [r5, #20]	@ movhi
+	.loc 1 1165 0
 	ldrh	r2, [r3]
 	strh	r2, [r5, #22]	@ movhi
+	.loc 1 1166 0
 	ldrh	r1, [r3, #2]
 	ldrb	r2, [r3, #6]	@ zero_extendqisi2
+	.loc 1 1167 0
 	ldrb	r3, [r3, #8]	@ zero_extendqisi2
+	.loc 1 1180 0
+	ldr	r0, [r4, #8]
+	.loc 1 1167 0
 	strb	r3, [r5, #13]
+	.loc 1 1166 0
 	orr	r2, r2, r1, lsl #6
-	ldr	r3, .L1841+40
+	.loc 1 1169 0
+	ldr	r3, .L1841+44
+	.loc 1 1180 0
 	movs	r1, #255
+	.loc 1 1166 0
 	strh	r2, [r5, #24]	@ movhi
+	.loc 1 1169 0
 	ldr	r3, [r3]
 	str	r3, [r5, #32]
-	ldr	r3, .L1841+44
+	.loc 1 1174 0
+	ldr	r3, .L1841+48
 	ldr	r3, [r3]
 	str	r3, [r5, #40]
-	ldr	r3, .L1841+48
+	.loc 1 1175 0
+	ldr	r3, .L1841+52
 	ldr	r3, [r3]
 	str	r3, [r5, #36]
-	ldr	r3, .L1841+52
+	.loc 1 1180 0
+	ldr	r3, .L1841+56
 	ldrh	r2, [r3]
 	bl	ftl_memset
+.LVL2018:
+	.loc 1 1181 0
 	mov	r1, r5
-	ldr	r5, .L1841+56
+	.loc 1 1182 0
+	ldr	r5, .L1841+60
+	.loc 1 1181 0
 	movs	r2, #48
 	ldr	r0, [r4, #8]
 	bl	ftl_memcpy
+.LVL2019:
+	.loc 1 1182 0
 	ldrh	r2, [r5]
-	ldr	r3, .L1841+60
+	ldr	r3, .L1841+64
 	ldr	r0, [r4, #8]
 	ldr	r1, [r3]
 	lsls	r2, r2, #1
 	adds	r0, r0, #48
 	bl	ftl_memcpy
+.LVL2020:
+	.loc 1 1183 0
 	ldrh	r0, [r5]
 	ldr	r3, [r4, #8]
-	ldr	r1, .L1841+64
+	ldr	r1, .L1841+68
 	lsrs	r2, r0, #3
 	adds	r0, r0, #24
 	lsls	r0, r0, #1
@@ -12743,156 +21019,239 @@ FtlVpcTblFlush:
 	bic	r0, r0, #3
 	add	r0, r0, r3
 	bl	ftl_memcpy
-	ldr	r3, .L1841+68
+.LVL2021:
+	.loc 1 1184 0
+	ldr	r3, .L1841+72
 	str	r7, [sp, #4]
 	ldrh	r3, [r3]
 	cbz	r3, .L1824
+.LBB461:
+	.loc 1 1185 0
 	ldrh	r0, [r5]
-	ldr	r3, .L1841+72
-	ldr	r1, .L1841+76
+.LVL2022:
+	.loc 1 1186 0
+	ldr	r3, .L1841+76
+	ldr	r1, .L1841+80
 	ldrh	r2, [r3]
+	.loc 1 1185 0
 	lsrs	r3, r0, #3
+	.loc 1 1186 0
 	ldr	r1, [r1]
+	.loc 1 1185 0
 	add	r3, r3, r0, lsl #1
+	.loc 1 1186 0
 	ldr	r0, [r4, #8]
+.LVL2023:
+	.loc 1 1185 0
 	adds	r3, r3, #52
+	.loc 1 1186 0
 	lsls	r2, r2, #2
 	ubfx	r3, r3, #2, #14
 	add	r0, r0, r3, lsl #2
 	bl	ftl_memcpy
+.LVL2024:
 .L1824:
-	ldr	r5, .L1841+4
+.LBE461:
+	.loc 1 1193 0
+	ldr	r5, .L1841+16
+	.loc 1 1138 0
 	movs	r7, #0
+	.loc 1 1136 0
 	movw	fp, #65535
+	.loc 1 1189 0
 	movs	r0, #0
 	bl	FtlUpdateVaildLpn
+.LVL2025:
 	mov	r10, r5
 .L1825:
+.LVL2026:
+	.loc 1 1191 0
 	ldr	r3, [r8]
+	.loc 1 1193 0
 	ldrh	r2, [r5]
-	ldr	r0, .L1841+12
+	.loc 1 1194 0
+	ldr	r0, .L1841+4
+	.loc 1 1191 0
 	str	r3, [r4, #8]
+	.loc 1 1192 0
 	ldr	r3, [sp, #4]
 	ldr	r3, [r3]
 	str	r3, [r4, #12]
+	.loc 1 1193 0
 	ldrh	r3, [r5, #2]
 	orr	r3, r3, r2, lsl #10
 	str	r3, [r4, #4]
+	.loc 1 1194 0
 	movs	r3, #1
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-	ldr	r3, .L1841+80
+.LVL2027:
+	.loc 1 1195 0
+	ldr	r3, .L1841+84
 	ldrh	r2, [r5, #2]
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r2, r3
 	blt	.L1826
+	.loc 1 1197 0
 	ldrh	r3, [r5]
+	.loc 1 1196 0
 	ldrh	fp, [r5, #4]
+.LVL2028:
+	.loc 1 1197 0
 	strh	r3, [r5, #4]	@ movhi
+	.loc 1 1198 0
 	movs	r3, #0
 	strh	r3, [r5, #2]	@ movhi
+	.loc 1 1199 0
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r2, .L1841+44
+.LVL2029:
+	.loc 1 1204 0
+	ldr	r2, .L1841+48
+	.loc 1 1199 0
 	strh	r0, [r5]	@ movhi
+	.loc 1 1204 0
 	ldr	r3, [r2]
 	adds	r1, r3, #1
 	str	r3, [r5, #8]
 	str	r1, [r2]
+	.loc 1 1205 0
 	lsls	r2, r0, #10
 	str	r2, [r4, #4]
+	.loc 1 1206 0
 	str	r3, [r6, #4]
+	.loc 1 1208 0
 	movs	r3, #1
+	.loc 1 1207 0
 	strh	r0, [r6, #2]	@ movhi
+	.loc 1 1208 0
 	mov	r2, r3
 	mov	r1, r3
-	ldr	r0, .L1841+12
+	ldr	r0, .L1841+4
 	bl	FlashProgPages
+.LVL2030:
 .L1826:
+	.loc 1 1210 0
 	ldrh	r3, [r10, #2]
+	.loc 1 1211 0
 	ldr	r2, [r4]
+	.loc 1 1210 0
 	adds	r3, r3, #1
 	uxth	r3, r3
+	.loc 1 1211 0
 	adds	r1, r2, #1
+	.loc 1 1210 0
 	strh	r3, [r10, #2]	@ movhi
+	.loc 1 1211 0
 	bne	.L1827
+	.loc 1 1213 0
 	cmp	r3, #1
 	bne	.L1828
-	ldr	r1, .L1841+84
-	movw	r2, #1180
-	ldr	r0, .L1841+88
+	ldr	r1, .L1841+88
+	movw	r2, #1213
+	ldr	r0, .L1841+92
 	bl	printf
-	ldr	r1, .L1841+92
-	ldr	r0, .L1841+96
+.LVL2031:
+	ldr	r1, .L1841+96
+	ldr	r0, .L1841+100
 	bl	printf
+.LVL2032:
 .L1828:
+	.loc 1 1214 0
 	ldrh	r3, [r10, #2]
+	.loc 1 1216 0
 	adds	r7, r7, #1
+.LVL2033:
 	uxth	r7, r7
+.LVL2034:
+	.loc 1 1214 0
 	cmp	r3, #1
+	.loc 1 1215 0
 	itttt	eq
-	ldreq	r3, .L1841+80
+	ldreq	r3, .L1841+84
 	ldrheq	r3, [r3]
 	addeq	r3, r3, #-1
 	strheq	r3, [r10, #2]	@ movhi
+	.loc 1 1217 0
 	cmp	r7, #3
 	bls	.L1825
+	.loc 1 1218 0
 	mov	r2, r7
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1841+100
+	ldr	r0, .L1841+104
 	bl	printf
+.LVL2035:
+	.loc 1 1220 0
 	ldr	r2, [sp]
 	movs	r3, #1
 	str	r3, [r2]
+.LVL2036:
 .L1823:
+.LBE460:
+.LBE459:
+	.loc 1 1232 0
 	movs	r0, #0
 	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL2037:
 .L1827:
+	.cfi_restore_state
+.LBB463:
+.LBB462:
+	.loc 1 1226 0
 	cmp	r3, #1
 	beq	.L1825
 	cmp	r2, #256
 	beq	.L1825
+	.loc 1 1229 0
 	movw	r3, #65535
 	cmp	fp, r3
 	beq	.L1823
+	.loc 1 1230 0
 	movs	r1, #1
 	mov	r0, fp
 	bl	FtlFreeSysBlkQueueIn
+.LVL2038:
 	b	.L1823
 .L1842:
 	.align	2
 .L1841:
-	.word	.LANCHOR75
-	.word	.LANCHOR206
-	.word	.LANCHOR185
+	.word	.LANCHOR76
 	.word	.LANCHOR199
-	.word	.LANCHOR135
-	.word	.LANCHOR43
+	.word	.LANCHOR185
+	.word	.LANCHOR80
+	.word	.LANCHOR206
 	.word	1179929683
-	.word	.LANCHOR90
+	.word	1342177352
+	.word	.LANCHOR44
 	.word	.LANCHOR91
 	.word	.LANCHOR92
-	.word	.LANCHOR165
+	.word	.LANCHOR93
+	.word	.LANCHOR164
+	.word	.LANCHOR156
 	.word	.LANCHOR157
-	.word	.LANCHOR158
-	.word	.LANCHOR56
-	.word	.LANCHOR38
-	.word	.LANCHOR82
+	.word	.LANCHOR57
+	.word	.LANCHOR39
+	.word	.LANCHOR83
 	.word	.LANCHOR0
-	.word	.LANCHOR68
-	.word	.LANCHOR65
+	.word	.LANCHOR69
+	.word	.LANCHOR66
 	.word	.LANCHOR128
-	.word	.LANCHOR52
+	.word	.LANCHOR53
 	.word	.LANCHOR207
-	.word	.LC4
-	.word	.LC5
 	.word	.LC6
-	.word	.LC32
-	.word	.LANCHOR79
-	.word	1342177351
+	.word	.LC7
+	.word	.LC8
+	.word	.LC35
+	.word	.LANCHOR180
+.LBE462:
+.LBE463:
+	.cfi_endproc
+.LFE360:
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
 	.section	.text.FtlSuperblockPowerLostFix,"ax",%progbits
 	.align	1
@@ -12903,27 +21262,55 @@ FtlVpcTblFlush:
 	.fpu softvfp
 	.type	FtlSuperblockPowerLostFix, %function
 FtlSuperblockPowerLostFix:
+.LFB380:
+	.loc 1 2531 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL2039:
+	.loc 1 2537 0
 	ldr	r3, .L1858
+	.loc 1 2531 0
 	push	{r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
+	.cfi_offset 14, -4
 	mov	r4, r0
 	sub	sp, sp, #40
+	.cfi_def_cfa_offset 64
+	.loc 1 2537 0
 	ldrb	r5, [r3]	@ zero_extendqisi2
 	cbz	r5, .L1857
+	.loc 1 2537 0 is_stmt 0 discriminator 1
 	ldrb	r5, [r0, #8]	@ zero_extendqisi2
 	cmp	r5, #1
 	bne	.L1852
+.LVL2040:
+	.loc 1 2540 0 is_stmt 1
 	ldrh	r6, [r0, #4]
+.LVL2041:
 .L1844:
+	.loc 1 2550 0
 	ldr	r7, .L1858+4
+	.loc 1 2551 0
 	ldr	r8, .L1858+20
+.LVL2042:
 .L1845:
+	.loc 1 2543 0
 	adds	r6, r6, #-1
+.LVL2043:
 	bcc	.L1847
+.LVL2044:
+	.loc 1 2544 0
 	ldrh	r3, [r4, #4]
 	cbnz	r3, .L1846
+.LVL2045:
 .L1847:
+	.loc 1 2564 0
 	ldr	r3, .L1858+8
 	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
@@ -12931,62 +21318,99 @@ FtlSuperblockPowerLostFix:
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
+	.loc 1 2565 0
 	ldr	r3, .L1858+12
 	ldrh	r3, [r3]
 	strh	r3, [r4, #2]	@ movhi
+	.loc 1 2566 0
 	movs	r3, #0
 	strb	r3, [r4, #6]
+	.loc 1 2567 0
 	strh	r3, [r4, #4]	@ movhi
+	.loc 1 2569 0
 	add	sp, sp, #40
+	.cfi_remember_state
+	.cfi_def_cfa_offset 24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
+.LVL2046:
 .L1852:
+	.cfi_restore_state
+	.loc 1 2535 0
 	movs	r5, #0
 .L1857:
+	.loc 1 2534 0
 	movs	r6, #12
 	b	.L1844
+.LVL2047:
 .L1846:
+	.loc 1 2546 0
 	mov	r0, r4
 	bl	get_new_active_ppa
+.LVL2048:
 	str	r0, [sp, #8]
+	.loc 1 2547 0
 	adds	r0, r0, #1
 	beq	.L1847
+	.loc 1 2551 0
 	ldr	r1, [r8]
+	.loc 1 2549 0
 	mov	r3, #-1
+	.loc 1 2550 0
 	ldr	r2, [r7]
-	ldr	r0, .L1858+16
+	.loc 1 2549 0
 	str	r3, [sp, #20]
+	.loc 1 2551 0
 	str	r1, [sp, #16]
+.LVL2049:
+	.loc 1 2550 0
 	str	r2, [sp, #12]
+	.loc 1 2555 0
 	str	r3, [r1, #12]
-	ldr	r2, [r0]
+	.loc 1 2554 0
 	str	r3, [r1, #8]
+	.loc 1 2556 0
 	ldrh	r3, [r4]
-	str	r2, [r1, #4]
-	adds	r2, r2, #1
+	.loc 1 2559 0
+	ldr	r0, .L1858+16
+	.loc 1 2556 0
 	strh	r3, [r1, #2]	@ movhi
+	.loc 1 2557 0
 	movs	r3, #0
 	strh	r3, [r1]	@ movhi
+	.loc 1 2559 0
+	ldr	r2, [r0]
+	str	r2, [r1, #4]
+	adds	r2, r2, #1
 	adds	r1, r2, #1
+.LVL2050:
+	.loc 1 2560 0
+	mov	r1, #1
+	.loc 1 2559 0
 	it	eq
 	moveq	r2, r3
-	movs	r1, #1
 	str	r2, [r0]
+	.loc 1 2560 0
 	mov	r2, r5
 	add	r0, sp, #4
 	bl	FlashProgPages
+.LVL2051:
+	.loc 1 2561 0
 	ldrh	r0, [r4]
 	bl	decrement_vpc_count
+.LVL2052:
 	b	.L1845
 .L1859:
 	.align	2
 .L1858:
 	.word	.LANCHOR8
-	.word	.LANCHOR79
-	.word	.LANCHOR82
-	.word	.LANCHOR51
-	.word	.LANCHOR158
+	.word	.LANCHOR180
+	.word	.LANCHOR83
+	.word	.LANCHOR52
+	.word	.LANCHOR157
 	.word	.LANCHOR185
+	.cfi_endproc
+.LFE380:
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
 	.section	.text.FtlLoadFactoryBbt,"ax",%progbits
 	.align	1
@@ -12997,69 +21421,118 @@ FtlSuperblockPowerLostFix:
 	.fpu softvfp
 	.type	FtlLoadFactoryBbt, %function
 FtlLoadFactoryBbt:
+.LFB321:
+	.loc 5 182 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+	.loc 5 188 0
 	ldr	r3, .L1870
+	.loc 5 182 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 5 191 0
 	movs	r6, #0
+	.loc 5 188 0
 	ldr	r5, .L1870+4
 	ldr	r3, [r3]
 	ldr	r7, .L1870+8
+	.loc 5 195 0
 	ldr	r10, .L1870+20
+	.loc 5 188 0
 	str	r3, [r5, #8]
+	.loc 5 189 0
 	ldr	r3, .L1870+12
 	ldr	r8, [r3]
 	str	r8, [r5, #12]
+.LVL2053:
 .L1861:
+	.loc 5 191 0 discriminator 1
 	ldr	r3, .L1870+16
 	ldrh	r3, [r3]
 	cmp	r6, r3
 	bcc	.L1866
+	.loc 5 222 0
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL2054:
 .L1866:
+	.loc 5 195 0
 	ldrh	r4, [r10]
+	.loc 5 194 0
 	movw	r3, #65535
+	.loc 5 199 0
 	ldr	fp, .L1870+4
+	.loc 5 194 0
 	strh	r3, [r7, #2]!	@ movhi
+	.loc 5 195 0
 	subs	r4, r4, #1
 	uxth	r4, r4
+.LVL2055:
 .L1862:
+	.loc 5 195 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r10]
 	sub	r2, r3, #15
 	cmp	r2, r4
 	bgt	.L1864
+.LVL2056:
+	.loc 5 197 0 is_stmt 1
 	mla	r3, r6, r3, r4
+.LVL2057:
+	.loc 5 199 0
 	movs	r2, #1
+.LVL2058:
 	mov	r1, r2
 	mov	r0, fp
+	.loc 5 197 0
 	lsls	r3, r3, #10
+	.loc 5 198 0
 	str	r3, [r5, #4]
+	.loc 5 199 0
 	bl	FlashReadPages
+.LVL2059:
+	.loc 5 200 0
 	ldr	r3, [r5]
 	adds	r3, r3, #1
 	beq	.L1863
+	.loc 5 208 0
 	ldrh	r2, [r8]
 	movw	r3, #61664
 	cmp	r2, r3
 	bne	.L1863
+	.loc 5 210 0
 	strh	r4, [r7]	@ movhi
 .L1864:
+	.loc 5 191 0 discriminator 2
 	adds	r6, r6, #1
+.LVL2060:
 	b	.L1861
 .L1863:
+	.loc 5 195 0 discriminator 2
 	subs	r4, r4, #1
+.LVL2061:
 	uxth	r4, r4
+.LVL2062:
 	b	.L1862
 .L1871:
 	.align	2
 .L1870:
-	.word	.LANCHOR79
+	.word	.LANCHOR180
 	.word	.LANCHOR199
-	.word	.LANCHOR73+10
+	.word	.LANCHOR74+10
 	.word	.LANCHOR185
-	.word	.LANCHOR43
-	.word	.LANCHOR49
+	.word	.LANCHOR44
+	.word	.LANCHOR50
+	.cfi_endproc
+.LFE321:
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
 	.section	.text.FtlGetLastWrittenPage,"ax",%progbits
 	.align	1
@@ -13070,73 +21543,138 @@ FtlLoadFactoryBbt:
 	.fpu softvfp
 	.type	FtlGetLastWrittenPage, %function
 FtlGetLastWrittenPage:
+.LFB329:
+	.loc 1 47 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL2063:
+	.loc 1 51 0
 	cmp	r1, #1
+	.loc 1 47 0
 	push	{r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
+	.cfi_offset 14, -4
+	.loc 1 51 0
 	it	eq
 	ldreq	r3, .L1884
+	.loc 1 47 0
 	sub	sp, sp, #104
+	.cfi_def_cfa_offset 128
+	.loc 1 57 0
 	lsl	r7, r0, #10
+	.loc 1 58 0
 	mov	r2, r1
+	.loc 1 51 0
 	it	ne
 	ldrne	r3, .L1884+4
+	.loc 1 47 0
 	mov	r8, r1
+	.loc 1 53 0
 	movs	r6, #0
+	.loc 1 58 0
 	movs	r1, #1
+.LVL2064:
 	add	r0, sp, #4
+.LVL2065:
+	.loc 1 51 0
 	ldrh	r5, [r3]
+.LVL2066:
+	.loc 1 54 0
 	add	r3, sp, #40
 	str	r3, [sp, #16]
+.LVL2067:
+	.loc 1 53 0
 	str	r6, [sp, #12]
+	.loc 1 56 0
 	subs	r5, r5, #1
+.LVL2068:
 	sxth	r5, r5
+.LVL2069:
+	.loc 1 57 0
 	orr	r3, r5, r7
 	str	r3, [sp, #8]
+	.loc 1 58 0
 	bl	FlashReadPages
+.LVL2070:
+	.loc 1 59 0
 	ldr	r3, [sp, #40]
 	adds	r3, r3, #1
 	bne	.L1875
+.LVL2071:
 .L1876:
+	.loc 1 60 0
 	cmp	r6, r5
 	ble	.L1879
+.LVL2072:
 .L1875:
+	.loc 1 73 0
 	mov	r0, r5
 	add	sp, sp, #104
+	.cfi_remember_state
+	.cfi_def_cfa_offset 24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
+.LVL2073:
 .L1879:
+	.cfi_restore_state
+	.loc 1 61 0
 	adds	r3, r6, r5
+	.loc 1 63 0
 	mov	r2, r8
+	.loc 1 61 0
 	add	r3, r3, r3, lsr #31
+	.loc 1 63 0
 	movs	r1, #1
 	add	r0, sp, #4
+	.loc 1 61 0
 	asrs	r4, r3, #1
+.LVL2074:
+	.loc 1 62 0
 	sxth	r3, r4
 	orrs	r3, r3, r7
 	str	r3, [sp, #8]
+	.loc 1 63 0
 	bl	FlashReadPages
+.LVL2075:
+	.loc 1 65 0
 	ldr	r3, [sp, #40]
 	adds	r3, r3, #1
 	bne	.L1877
+	.loc 1 65 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #44]
 	adds	r3, r3, #1
 	bne	.L1877
+	.loc 1 65 0 discriminator 2
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
 	beq	.L1877
+	.loc 1 66 0 is_stmt 1
 	subs	r4, r4, #1
+.LVL2076:
 	sxth	r5, r4
+.LVL2077:
 	b	.L1876
+.LVL2078:
 .L1877:
+	.loc 1 68 0
 	adds	r4, r4, #1
+.LVL2079:
 	sxth	r6, r4
+.LVL2080:
 	b	.L1876
 .L1885:
 	.align	2
 .L1884:
+	.word	.LANCHOR53
 	.word	.LANCHOR52
-	.word	.LANCHOR51
+	.cfi_endproc
+.LFE329:
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
 	.section	.text.FtlLoadBbt,"ax",%progbits
 	.align	1
@@ -13147,190 +21685,299 @@ FtlGetLastWrittenPage:
 	.fpu softvfp
 	.type	FtlLoadBbt, %function
 FtlLoadBbt:
+.LFB323:
+	.loc 5 249 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	movs	r3, #0
+	.cfi_def_cfa_offset 32
+	.cfi_offset 3, -32
+	.cfi_offset 4, -28
+	.cfi_offset 5, -24
+	.cfi_offset 6, -20
+	.cfi_offset 7, -16
+	.cfi_offset 8, -12
+	.cfi_offset 10, -8
+	.cfi_offset 14, -4
+	.loc 5 257 0
+	ldr	r8, .L1915+48
 	ldr	r4, .L1915
+	ldr	r3, [r8]
+	.loc 5 261 0
 	ldr	r7, .L1915+4
+	.loc 5 264 0
+	mov	r10, r4
+	.loc 5 257 0
 	str	r3, [r4, #8]
-	mov	r8, r4
+	.loc 5 258 0
 	ldr	r3, .L1915+8
 	ldr	r6, [r3]
 	str	r6, [r4, #12]
+.LVL2081:
+	.loc 5 260 0
 	bl	FtlBbtMemInit
+.LVL2082:
+	.loc 5 261 0
 	ldrh	r5, [r7]
 	subs	r5, r5, #1
 	uxth	r5, r5
+.LVL2083:
 .L1887:
+	.loc 5 261 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r7]
 	subs	r3, r3, #47
 	cmp	r3, r5
 	bgt	.L1890
+	.loc 5 263 0 is_stmt 1
 	lsls	r3, r5, #10
+	.loc 5 264 0
 	movs	r2, #1
 	mov	r1, r2
-	mov	r0, r8
+	mov	r0, r10
+	.loc 5 263 0
 	str	r3, [r4, #4]
+	.loc 5 264 0
 	bl	FlashReadPages
+.LVL2084:
+	.loc 5 265 0
 	ldr	r3, [r4]
 	adds	r3, r3, #1
 	bne	.L1888
+	.loc 5 267 0
 	ldr	r3, [r4, #4]
+	.loc 5 268 0
 	movs	r2, #1
 	mov	r1, r2
-	mov	r0, r8
+	mov	r0, r10
+	.loc 5 267 0
 	adds	r3, r3, #1
 	str	r3, [r4, #4]
+	.loc 5 268 0
 	bl	FlashReadPages
+.LVL2085:
 .L1888:
+	.loc 5 270 0
 	ldr	r3, [r4]
 	adds	r3, r3, #1
 	beq	.L1889
+	.loc 5 278 0
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
 	bne	.L1889
+	.loc 5 280 0
 	ldr	r3, .L1915+12
+	.loc 5 281 0
 	ldr	r2, [r6, #4]
+	.loc 5 280 0
 	strh	r5, [r3]	@ movhi
+	.loc 5 281 0
 	str	r2, [r3, #8]
+	.loc 5 282 0
 	ldrh	r2, [r6, #8]
 	strh	r2, [r3, #4]	@ movhi
 .L1890:
+	.loc 5 298 0
 	ldr	r5, .L1915+12
+.LVL2086:
 	movw	r2, #65535
 	ldrh	r3, [r5]
 	cmp	r3, r2
 	beq	.L1904
+	.loc 5 304 0
 	ldrh	r3, [r5, #4]
 	cmp	r3, r2
 	beq	.L1894
+	.loc 5 306 0
 	lsls	r3, r3, #10
+	.loc 5 307 0
 	movs	r2, #1
 	mov	r1, r2
 	ldr	r0, .L1915
+	.loc 5 306 0
 	str	r3, [r4, #4]
+	.loc 5 307 0
 	bl	FlashReadPages
+.LVL2087:
+	.loc 5 308 0
 	ldr	r3, [r4]
 	adds	r3, r3, #1
 	beq	.L1894
+	.loc 5 311 0
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
 	bne	.L1894
+	.loc 5 311 0 is_stmt 0 discriminator 1
 	ldr	r3, [r6, #4]
 	ldr	r2, [r5, #8]
 	cmp	r3, r2
 	bls	.L1894
+	.loc 5 313 0 is_stmt 1
 	ldrh	r2, [r5, #4]
+	.loc 5 314 0
 	str	r3, [r5, #8]
+	.loc 5 315 0
 	ldrh	r3, [r6, #8]
+	.loc 5 313 0
 	strh	r2, [r5]	@ movhi
+	.loc 5 315 0
 	strh	r3, [r5, #4]	@ movhi
 .L1894:
-	ldr	r8, .L1915+48
-	movs	r1, #1
+	.loc 5 327 0
 	ldr	r10, .L1915
+	.loc 5 320 0
+	movs	r1, #1
 	ldrh	r0, [r5]
 	bl	FtlGetLastWrittenPage
+.LVL2088:
 	sxth	r7, r0
+.LVL2089:
+	.loc 5 321 0
 	adds	r0, r0, #1
 	strh	r0, [r5, #2]	@ movhi
 .L1896:
+	.loc 5 323 0
 	cmp	r7, #0
 	bge	.L1899
+	.loc 5 336 0
 	ldr	r1, .L1915+16
-	movw	r2, #335
+	mov	r2, #336
 	ldr	r0, .L1915+20
 	bl	printf
+.LVL2090:
 	ldr	r1, .L1915+24
 	ldr	r0, .L1915+28
 	bl	printf
+.LVL2091:
 .L1898:
+	.loc 5 337 0
 	ldrh	r3, [r6, #10]
+	.loc 5 339 0
 	ldrh	r0, [r6, #12]
+	.loc 5 337 0
 	strh	r3, [r5, #6]	@ movhi
+	.loc 5 339 0
 	movw	r3, #65535
 	cmp	r0, r3
 	beq	.L1901
+	.loc 5 341 0
 	ldr	r3, .L1915+32
 	ldr	r2, [r3]
 	cmp	r0, r2
 	beq	.L1901
+	.loc 5 341 0 is_stmt 0 discriminator 1
 	ldr	r3, .L1915+36
 	ldrh	r3, [r3]
 	lsrs	r3, r3, #2
 	cmp	r2, r3
 	bcs	.L1901
+	.loc 5 343 0 is_stmt 1
 	cmp	r0, r3
 	bcs	.L1901
+	.loc 5 345 0
 	bl	FtlSysBlkNumInit
+.LVL2092:
 .L1901:
 	ldr	r6, .L1915+40
+.LVL2093:
+	.loc 5 249 0 discriminator 1
 	movs	r5, #0
+	.loc 5 350 0 discriminator 1
 	ldr	r7, .L1915+44
+.LVL2094:
+	.loc 5 351 0 discriminator 1
 	ldr	r8, .L1915+52
 .L1902:
+.LVL2095:
+	.loc 5 350 0 discriminator 1
 	ldrh	r3, [r7]
 	cmp	r5, r3
 	bcc	.L1903
+	.loc 5 357 0
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.LVL2096:
 .L1889:
+	.loc 5 261 0 discriminator 2
 	subs	r5, r5, #1
+.LVL2097:
 	uxth	r5, r5
+.LVL2098:
 	b	.L1887
+.LVL2099:
 .L1899:
+	.loc 5 325 0
 	ldrh	r3, [r5]
+	.loc 5 327 0
 	movs	r2, #1
 	mov	r1, r2
 	mov	r0, r10
+	.loc 5 325 0
 	orr	r3, r7, r3, lsl #10
 	str	r3, [r4, #4]
+	.loc 5 326 0
 	ldr	r3, [r8]
 	str	r3, [r4, #8]
+	.loc 5 327 0
 	bl	FlashReadPages
+.LVL2100:
+	.loc 5 329 0
 	ldr	r3, [r4]
 	adds	r3, r3, #1
 	beq	.L1897
+	.loc 5 329 0 is_stmt 0 discriminator 1
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
 	beq	.L1898
 .L1897:
 	subs	r7, r7, #1
+.LVL2101:
 	sxth	r7, r7
+.LVL2102:
 	b	.L1896
+.LVL2103:
 .L1903:
+	.loc 5 351 0 is_stmt 1 discriminator 3
 	ldrh	r2, [r8]
 	ldr	r1, [r4, #8]
 	ldr	r0, [r6, #4]!
 	lsls	r2, r2, #2
 	mla	r1, r5, r2, r1
+	.loc 5 350 0 discriminator 3
 	adds	r5, r5, #1
+.LVL2104:
+	.loc 5 351 0 discriminator 3
 	bl	ftl_memcpy
+.LVL2105:
 	b	.L1902
+.LVL2106:
 .L1904:
+	.loc 5 300 0
 	mov	r0, #-1
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.LVL2107:
 .L1916:
 	.align	2
 .L1915:
 	.word	.LANCHOR199
-	.word	.LANCHOR49
+	.word	.LANCHOR50
 	.word	.LANCHOR185
-	.word	.LANCHOR73
+	.word	.LANCHOR74
 	.word	.LANCHOR208
-	.word	.LC4
-	.word	.LC5
 	.word	.LC6
-	.word	.LANCHOR35
-	.word	.LANCHOR39
-	.word	.LANCHOR73+24
-	.word	.LANCHOR43
-	.word	.LANCHOR79
+	.word	.LC7
+	.word	.LC8
+	.word	.LANCHOR36
+	.word	.LANCHOR40
+	.word	.LANCHOR74+24
+	.word	.LANCHOR44
+	.word	.LANCHOR180
 	.word	.LANCHOR120
+	.cfi_endproc
+.LFE323:
 	.size	FtlLoadBbt, .-FtlLoadBbt
 	.section	.text.ftl_map_blk_gc,"ax",%progbits
 	.align	1
@@ -13341,14 +21988,34 @@ FtlLoadBbt:
 	.fpu softvfp
 	.type	ftl_map_blk_gc, %function
 ftl_map_blk_gc:
+.LFB348:
+	.loc 1 632 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, [r0, #24]
+.LVL2108:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 1 632 0
 	mov	r4, r0
+	.loc 1 637 0
 	ldr	r5, [r0, #12]
-	str	r3, [sp]
+.LVL2109:
+	.loc 1 638 0
+	ldr	fp, [r0, #24]
+.LVL2110:
+	.loc 1 641 0
 	bl	ftl_free_no_use_map_blk
+.LVL2111:
+	.loc 1 643 0
 	ldrh	ip, [r4, #10]
 	ldrh	r2, [r4, #8]
 	ldrh	r1, [r4, #40]
@@ -13356,155 +22023,236 @@ ftl_map_blk_gc:
 	ldr	r6, .L1937
 	cmp	r2, r3
 	bge	.L1918
+	.loc 1 644 0
 	movw	r3, #65535
 	cmp	r1, r3
 	beq	.L1920
+	.loc 1 644 0 is_stmt 0 discriminator 1
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r6]
 	cmp	r2, r3
 	bcc	.L1921
 .L1918:
+	.loc 1 645 0 is_stmt 1
 	movw	r3, #65535
+	.loc 1 641 0
 	uxth	r0, r0
+	.loc 1 645 0
 	cmp	r1, r3
 	beq	.L1922
+	.loc 1 645 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r4, #2]
 	ldrh	r2, [r6]
 	cmp	r2, r3
 	bls	.L1923
+.LVL2112:
 .L1922:
-	ldrh	r8, [r5, r0, lsl #1]
+	.loc 1 655 0 is_stmt 1
+	ldrh	r10, [r5, r0, lsl #1]
+.LVL2113:
 	lsls	r2, r0, #1
-	cmp	r8, #0
+	.loc 1 656 0
+	cmp	r10, #0
 	beq	.L1920
+	.loc 1 656 0 is_stmt 0 discriminator 1
 	ldr	r3, [r4, #32]
 	cbnz	r3, .L1920
+	.loc 1 657 0 is_stmt 1
 	movs	r1, #1
 	str	r1, [r4, #32]
+	.loc 1 658 0
 	strh	r3, [r5, r2]	@ movhi
+	.loc 1 659 0
 	ldrh	r3, [r4, #8]
+	.loc 1 660 0
 	ldrh	r2, [r4, #2]
+	.loc 1 659 0
 	subs	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
+	.loc 1 660 0
 	ldrh	r3, [r6]
 	cmp	r2, r3
 	bcc	.L1928
+	.loc 1 661 0
 	mov	r0, r4
+.LVL2114:
 	bl	ftl_map_blk_alloc_new_blk
+.LVL2115:
 .L1928:
+	.loc 1 665 0 discriminator 1
 	ldr	r5, .L1937+4
+.LVL2116:
+	.loc 1 653 0 discriminator 1
 	movs	r7, #0
 .L1929:
+	.loc 1 663 0 discriminator 1
 	ldrh	r2, [r4, #6]
 	uxth	r3, r7
+.LVL2117:
 	cmp	r2, r3
 	bhi	.L1933
+	.loc 1 681 0
 	movs	r1, #1
-	mov	r0, r8
+	mov	r0, r10
 	bl	FtlFreeSysBlkQueueIn
+.LVL2118:
+	.loc 1 682 0
 	movs	r3, #0
 	str	r3, [r4, #32]
+.LVL2119:
 .L1920:
+	.loc 1 686 0
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r6]
 	cmp	r2, r3
 	bcc	.L1921
+	.loc 1 687 0
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
+.LVL2120:
 .L1921:
+	.loc 1 689 0
 	movs	r0, #0
 	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL2121:
 .L1926:
+	.cfi_restore_state
+	.loc 1 647 0
 	ldrh	r8, [r5, r2, lsl #1]
 	add	lr, r2, #1
 	cmp	r8, r1
 	beq	.L1924
 	mov	r2, lr
+.LVL2122:
 .L1925:
 	uxth	r7, r2
+.LVL2123:
+	.loc 1 646 0 discriminator 1
 	cmp	r7, ip
 	bcc	.L1926
+	.loc 1 641 0
 	mov	r7, r0
+.LVL2124:
 .L1924:
+	.loc 1 652 0
 	uxth	r2, r2
 	ldr	r0, .L1937+8
 	ldrh	r2, [r5, r2, lsl #1]
+.LVL2125:
 	bl	printf
+.LVL2126:
+	.loc 1 653 0
 	movw	r3, #65535
 	mov	r0, r7
 	strh	r3, [r4, #40]	@ movhi
 	b	.L1922
+.LVL2127:
 .L1923:
 	movs	r2, #0
 	b	.L1925
+.LVL2128:
 .L1933:
-	ldr	r2, [sp]
-	uxth	r10, r7
-	ldr	r2, [r2, r10, lsl #2]
-	cmp	r8, r2, lsr #10
+	uxth	r8, r7
+	.loc 1 664 0
+	ldr	r2, [fp, r8, lsl #2]
+	cmp	r10, r2, lsr #10
 	bne	.L1930
 	str	r3, [sp, #4]
+	.loc 1 665 0
 	ldr	r3, .L1937+12
+.LVL2129:
+	.loc 1 669 0
+	ldr	r0, .L1937+4
+	.loc 1 665 0
+	ldr	r2, [r3]
+	str	r2, [r5, #8]
+	.loc 1 666 0
+	ldr	r2, .L1937+16
+	ldr	r3, [r2]
+	str	r3, [r5, #12]
+	.loc 1 667 0
+	ldr	r2, [fp, r8, lsl #2]
+	.loc 1 666 0
+	str	r3, [sp]
+	.loc 1 667 0
 	str	r2, [r5, #4]
+.LVL2130:
+	.loc 1 669 0
 	movs	r2, #1
-	ldr	r0, .L1937+4
-	ldr	r1, [r3]
-	str	r1, [r5, #8]
-	ldr	r1, .L1937+16
-	ldr	fp, [r1]
 	mov	r1, r2
-	str	fp, [r5, #12]
 	bl	FlashReadPages
-	ldrh	r2, [fp, #8]
+.LVL2131:
+	.loc 1 671 0
+	ldr	r3, [sp]
+	ldrh	r2, [r3, #8]
 	ldr	r3, [sp, #4]
 	cmp	r2, r3
 	beq	.L1931
+	.loc 1 671 0 is_stmt 0 discriminator 1
 	ldr	r1, .L1937+20
-	movw	r2, #638
+	movw	r2, #671
 	ldr	r0, .L1937+24
 	bl	printf
+.LVL2132:
 	ldr	r1, .L1937+28
 	ldr	r0, .L1937+32
 	bl	printf
+.LVL2133:
 .L1931:
+	.loc 1 672 0 is_stmt 1
 	ldr	r3, [r5]
 	adds	r3, r3, #1
 	bne	.L1932
-	ldr	r2, [sp]
+	.loc 1 673 0
 	movs	r3, #0
+	.loc 1 674 0
 	ldr	r0, .L1937+36
-	str	r3, [r2, r10, lsl #2]
-	ldrh	r2, [fp, #8]
+	.loc 1 673 0
+	str	r3, [fp, r8, lsl #2]
+	.loc 1 674 0
+	ldr	r3, [sp]
 	ldr	r1, [r5, #4]
+	ldrh	r2, [r3, #8]
 	bl	printf
+.LVL2134:
+	.loc 1 675 0
 	ldr	r3, .L1937+40
 	movs	r2, #1
 	str	r2, [r3]
+.LVL2135:
 .L1930:
 	adds	r7, r7, #1
+.LVL2136:
 	b	.L1929
+.LVL2137:
 .L1932:
+	.loc 1 677 0
 	ldr	r2, [r5, #8]
-	mov	r1, r10
+	mov	r1, r8
 	mov	r0, r4
 	bl	FtlMapWritePage
+.LVL2138:
 	b	.L1930
 .L1938:
 	.align	2
 .L1937:
-	.word	.LANCHOR52
+	.word	.LANCHOR53
 	.word	.LANCHOR199
-	.word	.LC33
+	.word	.LC36
 	.word	.LANCHOR181
 	.word	.LANCHOR185
 	.word	.LANCHOR209
-	.word	.LC4
-	.word	.LC5
 	.word	.LC6
-	.word	.LC34
-	.word	.LANCHOR75
+	.word	.LC7
+	.word	.LC8
+	.word	.LC37
+	.word	.LANCHOR76
+	.cfi_endproc
+.LFE348:
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
 	.section	.text.Ftl_write_map_blk_to_last_page,"ax",%progbits
 	.align	1
@@ -13515,111 +22263,193 @@ ftl_map_blk_gc:
 	.fpu softvfp
 	.type	Ftl_write_map_blk_to_last_page, %function
 Ftl_write_map_blk_to_last_page:
+.LFB349:
+	.loc 1 692 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL2139:
+	.loc 1 700 0
 	ldr	r3, .L1949
+	.loc 1 692 0
 	push	{r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
+	.cfi_offset 14, -4
+	.loc 1 692 0
 	mov	r4, r0
+	.loc 1 700 0
 	ldr	r5, [r3]
 	cbnz	r5, .L1940
+	.loc 1 702 0
 	ldrh	r3, [r0]
 	movw	r2, #65535
+	.loc 1 695 0
 	ldr	r6, [r0, #12]
+	.loc 1 702 0
 	cmp	r3, r2
 	bne	.L1941
+	.loc 1 703 0
 	ldrh	r3, [r0, #8]
 	cbz	r3, .L1942
+	.loc 1 703 0 is_stmt 0 discriminator 1
 	ldr	r1, .L1949+4
-	movw	r2, #670
+	movw	r2, #703
 	ldr	r0, .L1949+8
+.LVL2140:
 	bl	printf
+.LVL2141:
 	ldr	r1, .L1949+12
 	ldr	r0, .L1949+16
 	bl	printf
+.LVL2142:
 .L1942:
+	.loc 1 704 0 is_stmt 1
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
+	.loc 1 705 0
 	bl	FtlFreeSysBlkQueueOut
+.LVL2143:
+	.loc 1 706 0
 	movs	r3, #0
+	.loc 1 705 0
 	strh	r0, [r6]	@ movhi
+	.loc 1 706 0
 	strh	r3, [r4, #2]	@ movhi
+	.loc 1 707 0
 	strh	r3, [r4]	@ movhi
+	.loc 1 708 0
 	ldr	r3, [r4, #28]
 	adds	r3, r3, #1
 	str	r3, [r4, #28]
 .L1940:
+	.loc 1 739 0
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, pc}
+.LVL2144:
 .L1941:
-	ldrh	r6, [r6, r3, lsl #1]
+	.loc 1 712 0
+	ldrh	r7, [r6, r3, lsl #1]
+	.loc 1 723 0
 	movs	r1, #255
+	.loc 1 713 0
 	ldrh	r3, [r0, #2]
 	ldr	r2, .L1949+20
-	ldr	r8, .L1949+32
-	ldr	r7, [r0, #24]
-	orr	r3, r3, r6, lsl #10
-	ldr	r0, [r8]
+	.loc 1 714 0
+	ldr	r6, .L1949+24
+	.loc 1 696 0
+	ldr	r8, [r0, #24]
+	.loc 1 713 0
+	orr	r3, r3, r7, lsl #10
 	str	r3, [r2, #4]
-	ldr	r3, .L1949+24
-	str	r0, [r2, #8]
+	.loc 1 714 0
+	ldr	r3, [r6]
+	str	r3, [r2, #8]
+	.loc 1 715 0
+	ldr	r3, .L1949+28
 	ldr	r3, [r3]
 	str	r3, [r2, #12]
-	ldr	r2, [r4, #28]
+.LVL2145:
+	.loc 1 718 0
+	ldr	r2, [r0, #28]
 	str	r2, [r3, #4]
+.LVL2146:
+	.loc 1 719 0
 	movw	r2, #64245
 	strh	r2, [r3, #8]	@ movhi
-	ldrh	r2, [r4, #4]
-	strh	r6, [r3, #2]	@ movhi
+	.loc 1 720 0
+	ldrh	r2, [r0, #4]
+	.loc 1 721 0
+	strh	r7, [r3, #2]	@ movhi
+	.loc 1 720 0
 	strh	r2, [r3]	@ movhi
-	ldr	r3, .L1949+28
+	.loc 1 723 0
+	ldr	r3, .L1949+32
+.LVL2147:
+	ldr	r0, [r6]
+.LVL2148:
 	ldrh	r2, [r3]
 	lsls	r2, r2, #3
 	bl	ftl_memset
-	ldrh	ip, [r4, #6]
-	mov	r3, r5
-	ldr	r1, [r8]
+.LVL2149:
+	.loc 1 725 0
 	mov	r2, r5
+	.loc 1 724 0
+	mov	r3, r5
+.LVL2150:
 .L1943:
-	uxth	r0, r3
-	cmp	ip, r0
+	.loc 1 725 0 discriminator 1
+	ldrh	r0, [r4, #6]
+	uxth	r1, r2
+	cmp	r0, r1
 	bhi	.L1945
+	.loc 1 732 0
 	movs	r2, #1
+.LVL2151:
 	movs	r3, #0
+.LVL2152:
 	mov	r1, r2
+.LVL2153:
 	ldr	r0, .L1949+20
 	bl	FlashProgPages
+.LVL2154:
+	.loc 1 733 0
 	ldrh	r3, [r4, #2]
+	.loc 1 737 0
 	mov	r0, r4
+	.loc 1 733 0
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
+	.loc 1 737 0
 	bl	ftl_map_blk_gc
+.LVL2155:
+	.loc 1 738 0
 	b	.L1940
+.LVL2156:
 .L1945:
-	ldr	r0, [r7, r3, lsl #2]
-	cmp	r6, r0, lsr #10
+	uxth	r1, r2
+	.loc 1 726 0
+	ldr	r0, [r8, r1, lsl #2]
+	cmp	r7, r0, lsr #10
 	bne	.L1944
-	adds	r2, r2, #1
-	uxth	r2, r2
-	str	r3, [r1, r2, lsl #3]
-	add	r5, r1, r2, lsl #3
-	ldr	r0, [r7, r3, lsl #2]
-	str	r0, [r5, #4]
-.L1944:
+	.loc 1 728 0
+	ldr	r0, [r6]
+	.loc 1 727 0
 	adds	r3, r3, #1
+.LVL2157:
+	uxth	r3, r3
+.LVL2158:
+	.loc 1 728 0
+	str	r1, [r0, r3, lsl #3]
+	.loc 1 729 0
+	ldr	r0, [r8, r1, lsl #2]
+	ldr	r1, [r6]
+	add	r1, r1, r3, lsl #3
+	str	r0, [r1, #4]
+.L1944:
+.LVL2159:
+	adds	r2, r2, #1
+.LVL2160:
 	b	.L1943
 .L1950:
 	.align	2
 .L1949:
-	.word	.LANCHOR75
+	.word	.LANCHOR76
 	.word	.LANCHOR210
-	.word	.LC4
-	.word	.LC5
 	.word	.LC6
+	.word	.LC7
+	.word	.LC8
 	.word	.LANCHOR199
+	.word	.LANCHOR180
 	.word	.LANCHOR185
-	.word	.LANCHOR52
-	.word	.LANCHOR79
+	.word	.LANCHOR53
+	.cfi_endproc
+.LFE349:
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
 	.section	.text.FtlMapWritePage,"ax",%progbits
 	.align	1
@@ -13630,23 +22460,46 @@ Ftl_write_map_blk_to_last_page:
 	.fpu softvfp
 	.type	FtlMapWritePage, %function
 FtlMapWritePage:
+.LFB350:
+	.loc 1 742 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL2161:
+	.loc 1 747 0
 	ldr	r3, .L1974
+	.loc 1 742 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 1 742 0
 	mov	r4, r0
 	mov	r8, r1
 	str	r2, [sp]
+	.loc 1 747 0
 	ldr	r5, [r3]
 	str	r3, [sp, #4]
 	cmp	r5, #0
 	bne	.L1969
+.LBB466:
+.LBB467:
+	.loc 1 752 0
 	ldr	r10, .L1974+36
+.LVL2162:
 .L1953:
+	.loc 1 751 0
 	ldr	r2, .L1974+4
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
+	.loc 1 752 0
 	ldrh	r3, [r10]
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
@@ -13657,123 +22510,191 @@ FtlMapWritePage:
 	cmp	r2, r3
 	bne	.L1955
 .L1954:
+	.loc 1 753 0
 	mov	r0, r4
 	bl	Ftl_write_map_blk_to_last_page
+.LVL2163:
 .L1955:
+	.loc 1 764 0
 	ldrh	r2, [r4]
 	ldr	r3, [r4, #12]
 	ldrh	r3, [r3, r2, lsl #1]
 	cbnz	r3, .L1956
 	ldr	r1, .L1974+8
-	movw	r2, #731
+	mov	r2, #764
 	ldr	r0, .L1974+12
 	bl	printf
+.LVL2164:
 	ldr	r1, .L1974+16
 	ldr	r0, .L1974+20
 	bl	printf
+.LVL2165:
 .L1956:
+	.loc 1 765 0
 	ldrh	r2, [r4]
 	ldrh	r3, [r4, #10]
 	cmp	r2, r3
 	bcc	.L1957
 	ldr	r1, .L1974+8
-	mov	r2, #732
+	movw	r2, #765
 	ldr	r0, .L1974+12
 	bl	printf
+.LVL2166:
 	ldr	r1, .L1974+16
 	ldr	r0, .L1974+20
 	bl	printf
+.LVL2167:
 .L1957:
+	.loc 1 766 0
 	ldrh	r2, [r4]
+	.loc 1 772 0
 	movs	r1, #0
+	.loc 1 766 0
 	ldr	r3, [r4, #12]
+	.loc 1 768 0
 	ldr	r6, .L1974+24
+	.loc 1 766 0
 	ldrh	r7, [r3, r2, lsl #1]
+.LVL2168:
+	.loc 1 772 0
 	movs	r2, #16
+	.loc 1 768 0
 	ldrh	r3, [r4, #2]
 	mov	fp, r6
 	orr	r3, r3, r7, lsl #10
 	str	r3, [r6, #4]
+	.loc 1 769 0
 	ldr	r3, [sp]
 	str	r3, [r6, #8]
+	.loc 1 770 0
 	ldr	r3, .L1974+28
 	ldr	r0, [r3]
 	str	r0, [r6, #12]
+	.loc 1 772 0
 	bl	ftl_memset
+.LVL2169:
+	.loc 1 773 0
 	ldr	r3, [r6, #12]
+.LVL2170:
+	.loc 1 778 0
 	mov	r0, r6
+	.loc 1 774 0
 	ldr	r2, [r4, #28]
+	.loc 1 775 0
 	strh	r8, [r3, #8]	@ movhi
+	.loc 1 774 0
 	str	r2, [r3, #4]
+	.loc 1 776 0
 	ldrh	r2, [r4, #4]
+	.loc 1 777 0
 	strh	r7, [r3, #2]	@ movhi
+	.loc 1 776 0
 	strh	r2, [r3]	@ movhi
+	.loc 1 778 0
 	movs	r3, #1
+.LVL2171:
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
+.LVL2172:
+	.loc 1 779 0
 	ldrh	r2, [r4, #2]
-	ldr	r1, [r6]
 	adds	r2, r2, #1
 	uxth	r2, r2
-	adds	r3, r1, #1
 	strh	r2, [r4, #2]	@ movhi
+	.loc 1 781 0
+	ldr	r1, [r6]
+	adds	r3, r1, #1
 	bne	.L1958
+	.loc 1 782 0
 	ldr	r1, [r6, #4]
+	.loc 1 783 0
 	adds	r5, r5, #1
+.LVL2173:
+	.loc 1 782 0
 	ldr	r0, .L1974+32
+	.loc 1 783 0
 	uxth	r5, r5
+	.loc 1 782 0
 	bl	printf
+.LVL2174:
+	.loc 1 784 0
 	ldrh	r2, [r4, #2]
 	cmp	r2, #2
+	.loc 1 785 0
 	itttt	ls
 	ldrls	r3, .L1974+36
 	ldrhls	r2, [r3]
 	addls	r2, r2, #-1
 	strhls	r2, [r4, #2]	@ movhi
+	.loc 1 787 0
 	cmp	r5, #3
 	bls	.L1953
+	.loc 1 788 0
 	mov	r2, r5
 	ldr	r1, [r6, #4]
 	ldr	r0, .L1974+40
 	bl	printf
+.LVL2175:
+	.loc 1 790 0
 	ldr	r2, [sp, #4]
 	movs	r3, #1
 	str	r3, [r2]
+.LVL2176:
 .L1969:
+.LBE467:
+.LBE466:
+	.loc 1 811 0
 	movs	r0, #0
 	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+.LVL2177:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL2178:
 .L1958:
+	.cfi_restore_state
+.LBB469:
+.LBB468:
+	.loc 1 803 0
 	cbz	r1, .L1961
+	.loc 1 806 0
 	cmp	r2, #1
+	.loc 1 804 0
 	strh	r7, [r4, #40]	@ movhi
+	.loc 1 806 0
 	beq	.L1953
 	cmp	r1, #256
 .L1973:
 	beq	.L1953
+	.loc 1 809 0
 	ldr	r2, [fp, #4]
 	ldr	r3, [r4, #24]
 	str	r2, [r3, r8, lsl #2]
 	b	.L1969
 .L1961:
+	.loc 1 806 0
 	cmp	r2, #1
 	b	.L1973
 .L1975:
 	.align	2
 .L1974:
-	.word	.LANCHOR75
-	.word	.LANCHOR163
+	.word	.LANCHOR76
+	.word	.LANCHOR162
 	.word	.LANCHOR211
-	.word	.LC4
-	.word	.LC5
 	.word	.LC6
+	.word	.LC7
+	.word	.LC8
 	.word	.LANCHOR199
 	.word	.LANCHOR185
-	.word	.LC35
-	.word	.LANCHOR52
-	.word	.LC36
+	.word	.LC38
+	.word	.LANCHOR53
+	.word	.LC39
+.LBE468:
+.LBE469:
+	.cfi_endproc
+.LFE350:
 	.size	FtlMapWritePage, .-FtlMapWritePage
 	.section	.text.flush_l2p_region,"ax",%progbits
 	.align	1
@@ -13784,30 +22705,53 @@ FtlMapWritePage:
 	.fpu softvfp
 	.type	flush_l2p_region, %function
 flush_l2p_region:
+.LFB351:
+	.loc 1 814 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL2179:
 	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 1 817 0
 	movs	r4, #12
 	ldr	r5, .L1977
 	muls	r4, r0, r4
+	.loc 1 818 0
 	ldr	r0, .L1977+4
+.LVL2180:
+	.loc 1 817 0
 	ldr	r3, [r5]
 	adds	r2, r3, r4
+.LVL2181:
+	.loc 1 818 0
 	ldrh	r1, [r3, r4]
+.LVL2182:
 	ldr	r2, [r2, #8]
 	bl	FtlMapWritePage
+.LVL2183:
+	.loc 1 819 0
 	ldr	r3, [r5]
+	.loc 1 821 0
 	movs	r0, #0
+	.loc 1 819 0
 	add	r4, r4, r3
 	ldr	r3, [r4, #4]
 	bic	r3, r3, #-2147483648
 	str	r3, [r4, #4]
+	.loc 1 821 0
 	pop	{r3, r4, r5, pc}
 .L1978:
 	.align	2
 .L1977:
-	.word	.LANCHOR95
+	.word	.LANCHOR96
 	.word	.LANCHOR124
+	.cfi_endproc
+.LFE351:
 	.size	flush_l2p_region, .-flush_l2p_region
 	.section	.text.l2p_flush,"ax",%progbits
 	.align	1
@@ -13818,20 +22762,38 @@ flush_l2p_region:
 	.fpu softvfp
 	.type	l2p_flush, %function
 l2p_flush:
+.LFB353:
+	.loc 1 864 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL2184:
 	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 1 871 0
 	movs	r4, #0
 	ldr	r5, .L1983
+	.loc 1 872 0
 	ldr	r6, .L1983+4
+.LVL2185:
 .L1980:
+	.loc 1 871 0 discriminator 1
 	ldrh	r3, [r5]
 	uxth	r0, r4
+.LVL2186:
 	cmp	r3, r0
 	bhi	.L1982
+	.loc 1 875 0
 	movs	r0, #0
+.LVL2187:
 	pop	{r4, r5, r6, pc}
+.LVL2188:
 .L1982:
+	.loc 1 872 0
 	ldr	r2, [r6]
 	uxth	r3, r4
 	movs	r1, #12
@@ -13839,336 +22801,515 @@ l2p_flush:
 	ldr	r3, [r3, #4]
 	cmp	r3, #0
 	bge	.L1981
+	.loc 1 873 0
 	bl	flush_l2p_region
+.LVL2189:
 .L1981:
 	adds	r4, r4, #1
+.LVL2190:
 	b	.L1980
 .L1984:
 	.align	2
 .L1983:
-	.word	.LANCHOR66
-	.word	.LANCHOR95
+	.word	.LANCHOR67
+	.word	.LANCHOR96
+	.cfi_endproc
+.LFE353:
 	.size	l2p_flush, .-l2p_flush
-	.section	.text.load_l2p_region,"ax",%progbits
+	.section	.text.log2phys,"ax",%progbits
 	.align	1
-	.global	load_l2p_region
+	.global	log2phys
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	load_l2p_region, %function
-load_l2p_region:
-	@ args = 0, pretend = 0, frame = 0
+	.type	log2phys, %function
+log2phys:
+.LFB354:
+	.loc 1 878 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	mov	r7, r0
-	ldr	r3, .L1991
-	mov	r10, r1
-	ldrh	r3, [r3]
-	cmp	r3, r0
-	bcs	.L1986
-	ldr	r1, .L1991+4
-	movw	r2, #503
-	ldr	r0, .L1991+8
+.LVL2191:
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 48
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 1 881 0
+	ldr	r3, .L2003
+	.loc 1 878 0
+	str	r1, [sp, #4]
+	.loc 1 881 0
+	ldrh	r6, [r3]
+	.loc 1 878 0
+	str	r2, [sp, #12]
+	.loc 1 881 0
+	adds	r3, r6, #7
+	.loc 1 882 0
+	movs	r6, #1
+	.loc 1 881 0
+	lsr	fp, r0, r3
+	.loc 1 882 0
+	lsls	r6, r6, r3
+	.loc 1 884 0
+	ldr	r3, .L2003+4
+	.loc 1 882 0
+	subs	r6, r6, #1
+	.loc 1 881 0
+	uxth	r8, fp
+.LVL2192:
+	.loc 1 882 0
+	ands	r6, r6, r0
+	.loc 1 884 0
+	ldr	r3, [r3]
+	.loc 1 882 0
+	uxth	r6, r6
+.LVL2193:
+	.loc 1 884 0
+	cmp	r0, r3
+	bcc	.L1986
+	.loc 1 884 0 is_stmt 0 discriminator 1
+	ldr	r1, .L2003+8
+.LVL2194:
+	mov	r2, #884
+.LVL2195:
+	ldr	r0, .L2003+12
+.LVL2196:
 	bl	printf
-	ldr	r1, .L1991+12
-	ldr	r0, .L1991+16
+.LVL2197:
+	ldr	r1, .L2003+16
+	ldr	r0, .L2003+20
 	bl	printf
+.LVL2198:
 .L1986:
-	ldr	r3, .L1991+20
+	.loc 1 887 0 is_stmt 1
+	ldr	r5, .L2003+24
 	movs	r4, #12
-	ldr	r8, .L1991+44
+	.loc 1 886 0
+	ldr	r3, .L2003+28
+	.loc 1 887 0
+	ldr	r1, [r5]
+	.loc 1 886 0
+	ldrh	r2, [r3]
+	movs	r3, #0
+.LVL2199:
+.L1987:
+	uxth	r10, r3
+.LVL2200:
+	.loc 1 886 0 is_stmt 0 discriminator 1
+	cmp	r10, r2
+	bcc	.L1992
+	.loc 1 901 0 is_stmt 1
+	bl	select_l2p_ram_region
+.LVL2201:
+	.loc 1 902 0
+	muls	r4, r0, r4
+	ldr	r3, [r5]
+	.loc 1 901 0
+	mov	r10, r0
+.LVL2202:
+	.loc 1 902 0
+	ldrh	r1, [r3, r4]
+	adds	r2, r3, r4
+	movw	r3, #65535
+	cmp	r1, r3
+	beq	.L1993
+	.loc 1 902 0 is_stmt 0 discriminator 1
+	ldr	r3, [r2, #4]
+	cmp	r3, #0
+	bge	.L1993
+	.loc 1 903 0 is_stmt 1
+	bl	flush_l2p_region
+.LVL2203:
+.L1993:
+.LBB472:
+.LBB473:
+	.loc 1 526 0
+	ldr	r3, .L2003+32
+	ldrh	r3, [r3]
+	cmp	r3, r8
+	bcs	.L1994
+	ldr	r1, .L2003+36
+	movw	r2, #526
+	ldr	r0, .L2003+12
+	bl	printf
+.LVL2204:
+	ldr	r1, .L2003+16
+	ldr	r0, .L2003+20
+	bl	printf
+.LVL2205:
+.L1994:
+	.loc 1 527 0
+	ldr	r3, .L2003+40
+	uxth	fp, fp
 	ldr	r3, [r3]
-	ldr	r5, [r3, r7, lsl #2]
-	cbnz	r5, .L1987
-	mul	r4, r4, r10
-	ldr	r3, [r8]
-	ldr	r2, .L1991+24
+	ldr	r7, [r3, fp, lsl #2]
+.LVL2206:
+	.loc 1 529 0
+	cmp	r7, #0
+	bne	.L1995
+	.loc 1 530 0
+	ldr	r3, [r5]
 	movs	r1, #255
+	ldr	r2, .L2003+44
 	add	r3, r3, r4
-	ldrh	r2, [r2]
 	ldr	r0, [r3, #8]
+	ldrh	r2, [r2]
 	bl	ftl_memset
-	ldr	r3, [r8]
-	adds	r2, r3, r4
-	strh	r7, [r3, r4]	@ movhi
-	str	r5, [r2, #4]
+.LVL2207:
+	.loc 1 531 0
+	ldr	r3, [r5]
+	strh	r8, [r3, r4]	@ movhi
+	.loc 1 532 0
+	ldr	r3, [r5]
+	add	r4, r4, r3
+	str	r7, [r4, #4]
+	b	.L1988
+.LVL2208:
+.L1992:
+	adds	r3, r3, #1
+.LBE473:
+.LBE472:
+	.loc 1 887 0
+	mla	r0, r4, r3, r1
+	ldrh	r0, [r0, #-12]
+	cmp	r0, r8
+	bne	.L1987
+.LVL2209:
 .L1988:
+	.loc 1 889 0
+	ldr	r2, [sp, #12]
+	movs	r3, #12
+	ldr	r1, .L2003+24
+	cbnz	r2, .L1989
+	.loc 1 890 0
+	ldr	r2, [r1]
+	mla	r3, r3, r10, r2
+	ldr	r2, [sp, #4]
+	ldr	r3, [r3, #8]
+	ldr	r3, [r3, r6, lsl #2]
+	str	r3, [r2]
+.L1990:
+	.loc 1 896 0
+	ldr	r2, [r1]
+	movs	r3, #12
+	mla	r10, r3, r10, r2
+.LVL2210:
+	ldr	r3, [r10, #4]
+	adds	r2, r3, #1
+	beq	.L2000
+	.loc 1 897 0
+	adds	r3, r3, #1
+	str	r3, [r10, #4]
+.L2000:
+	.loc 1 908 0
 	movs	r0, #0
-	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L1987:
-	mul	r4, r4, r10
-	ldr	r3, [r8]
-	ldr	r6, .L1991+28
+	add	sp, sp, #16
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL2211:
+.L1989:
+	.cfi_restore_state
+	.loc 1 892 0
+	ldr	r2, [sp, #4]
+	mul	r3, r3, r10
+	ldr	r0, [r2]
+	ldr	r2, [r5]
+	add	r2, r2, r3
+	ldr	r2, [r2, #8]
+	str	r0, [r2, r6, lsl #2]
+	.loc 1 893 0
+	ldr	r2, [r5]
+	add	r3, r3, r2
+	ldr	r2, [r3, #4]
+	orr	r2, r2, #-2147483648
+	str	r2, [r3, #4]
+	.loc 1 894 0
+	ldr	r3, .L2003+48
+	strh	r8, [r3]	@ movhi
+	b	.L1990
+.LVL2212:
+.L1995:
+.LBB475:
+.LBB474:
+	.loc 1 536 0
+	ldr	r2, [r5]
+	.loc 1 535 0
+	ldr	r3, .L2003+52
+	.loc 1 536 0
+	add	r2, r2, r4
+	ldr	r2, [r2, #8]
+	.loc 1 538 0
+	mov	r0, r3
+	.loc 1 535 0
+	str	r7, [r3, #4]
+	.loc 1 538 0
+	str	r3, [sp, #8]
+	.loc 1 536 0
+	str	r2, [r3, #8]
+	.loc 1 537 0
+	ldr	r2, .L2003+56
+	ldr	r2, [r2]
+	str	r2, [r3, #12]
+	.loc 1 538 0
 	movs	r2, #1
 	mov	r1, r2
-	add	r3, r3, r4
-	mov	r0, r6
-	ldr	r3, [r3, #8]
-	str	r5, [r6, #4]
-	str	r3, [r6, #8]
-	ldr	r3, .L1991+32
-	ldr	r3, [r3]
-	str	r3, [r6, #12]
 	bl	FlashReadPages
-	ldr	r3, [r6]
-	ldr	r10, [r6, #12]
+.LVL2213:
+	.loc 1 539 0
+	ldr	r3, [sp, #8]
+	ldr	r2, [r3, #12]
+	.loc 1 540 0
+	ldr	r3, [r3]
+	.loc 1 539 0
+	str	r2, [sp, #8]
+.LVL2214:
+	.loc 1 540 0
 	cmp	r3, #256
-	bne	.L1989
-	mov	r2, r5
-	mov	r1, r7
-	ldr	r0, .L1991+36
-	lsrs	r5, r5, #10
+	bne	.L1996
+	.loc 1 541 0
+	mov	r2, r7
+.LVL2215:
+	mov	r1, fp
+	ldr	r0, .L2003+60
+	.loc 1 542 0
+	lsrs	r7, r7, #10
+.LVL2216:
+	.loc 1 541 0
 	bl	printf
-	ldr	r3, [r8]
-	mov	r1, r7
-	ldr	r0, .L1991+40
+.LVL2217:
+	.loc 1 543 0
+	ldr	r3, [r5]
+	mov	r1, fp
+	.loc 1 542 0
+	ldr	r0, .L2003+64
+	.loc 1 543 0
 	add	r3, r3, r4
+	.loc 1 542 0
+	strh	r7, [r0, #40]	@ movhi
+	.loc 1 543 0
 	ldr	r2, [r3, #8]
-	strh	r5, [r0, #40]	@ movhi
 	bl	FtlMapWritePage
-.L1989:
-	ldrh	r3, [r10, #8]
-	cmp	r3, r7
-	beq	.L1990
-	ldr	r1, .L1991+4
-	movw	r2, #529
-	ldr	r0, .L1991+8
+.LVL2218:
+.L1996:
+	.loc 1 552 0
+	ldr	r3, [sp, #8]
+	ldrh	r3, [r3, #8]
+	cmp	r3, r8
+	beq	.L1997
+	ldr	r1, .L2003+36
+	mov	r2, #552
+	ldr	r0, .L2003+12
 	bl	printf
-	ldr	r1, .L1991+12
-	ldr	r0, .L1991+16
+.LVL2219:
+	ldr	r1, .L2003+16
+	ldr	r0, .L2003+20
 	bl	printf
-.L1990:
-	ldr	r3, [r8]
+.LVL2220:
+.L1997:
+	.loc 1 555 0
+	ldr	r3, .L2003+24
 	movs	r1, #0
+	ldr	r3, [r3]
 	adds	r2, r3, r4
 	str	r1, [r2, #4]
-	strh	r7, [r3, r4]	@ movhi
+	.loc 1 556 0
+	strh	r8, [r3, r4]	@ movhi
 	b	.L1988
-.L1992:
+.L2004:
 	.align	2
-.L1991:
-	.word	.LANCHOR65
+.L2003:
+	.word	.LANCHOR56
+	.word	.LANCHOR72
 	.word	.LANCHOR212
-	.word	.LC4
-	.word	.LC5
 	.word	.LC6
+	.word	.LC7
+	.word	.LC8
+	.word	.LANCHOR96
+	.word	.LANCHOR67
+	.word	.LANCHOR66
+	.word	.LANCHOR213
 	.word	.LANCHOR128
-	.word	.LANCHOR56
+	.word	.LANCHOR57
+	.word	.LANCHOR97
 	.word	.LANCHOR199
 	.word	.LANCHOR185
-	.word	.LC37
+	.word	.LC40
 	.word	.LANCHOR124
-	.word	.LANCHOR95
-	.size	load_l2p_region, .-load_l2p_region
-	.section	.text.log2phys,"ax",%progbits
+.LBE474:
+.LBE475:
+	.cfi_endproc
+.LFE354:
+	.size	log2phys, .-log2phys
+	.section	.text.FtlReUsePrevPpa,"ax",%progbits
 	.align	1
-	.global	log2phys
+	.global	FtlReUsePrevPpa
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	log2phys, %function
-log2phys:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2007
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r7, r1
-	mov	r10, r2
-	ldrh	r4, [r3]
-	adds	r3, r4, #7
-	movs	r4, #1
-	lsr	r8, r0, r3
-	lsls	r4, r4, r3
-	ldr	r3, .L2007+4
-	subs	r4, r4, #1
-	uxth	r8, r8
-	ands	r4, r4, r0
-	ldr	r3, [r3]
-	uxth	r4, r4
-	cmp	r0, r3
-	bcc	.L1994
-	ldr	r1, .L2007+8
-	movw	r2, #851
-	ldr	r0, .L2007+12
-	bl	printf
-	ldr	r1, .L2007+16
-	ldr	r0, .L2007+20
-	bl	printf
-.L1994:
-	ldr	r6, .L2007+24
-	mov	fp, #12
-	ldr	r3, .L2007+28
-	ldr	r1, [r6]
-	ldrh	r2, [r3]
-	movs	r3, #0
-.L1995:
-	uxth	r5, r3
-	cmp	r5, r2
-	bcc	.L2000
-	bl	select_l2p_ram_region
-	mul	fp, fp, r0
-	ldr	r3, [r6]
-	mov	r5, r0
-	ldrh	r1, [r3, fp]
-	add	r2, r3, fp
-	movw	r3, #65535
-	cmp	r1, r3
-	beq	.L2001
-	ldr	r3, [r2, #4]
-	cmp	r3, #0
-	bge	.L2001
-	bl	flush_l2p_region
-.L2001:
-	mov	r1, r5
-	mov	r0, r8
-	bl	load_l2p_region
-	b	.L1996
-.L2000:
-	adds	r3, r3, #1
-	mla	r0, fp, r3, r1
-	ldrh	r0, [r0, #-12]
-	cmp	r0, r8
-	bne	.L1995
-.L1996:
-	ldr	r2, [r6]
-	movs	r3, #12
-	mla	r3, r3, r5, r2
-	cmp	r10, #0
-	bne	.L1997
-	ldr	r3, [r3, #8]
-	ldr	r3, [r3, r4, lsl #2]
-	str	r3, [r7]
-.L1998:
-	ldr	r2, [r6]
-	movs	r3, #12
-	mla	r5, r3, r5, r2
-	ldr	r3, [r5, #4]
-	adds	r2, r3, #1
-	beq	.L2004
-	adds	r3, r3, #1
-	str	r3, [r5, #4]
-.L2004:
-	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1997:
-	ldr	r1, [r7]
-	ldr	r2, [r3, #8]
-	str	r1, [r2, r4, lsl #2]
-	ldr	r2, [r3, #4]
-	orr	r2, r2, #-2147483648
-	str	r2, [r3, #4]
-	ldr	r3, .L2007+32
-	strh	r8, [r3]	@ movhi
-	b	.L1998
-.L2008:
-	.align	2
-.L2007:
-	.word	.LANCHOR55
-	.word	.LANCHOR71
-	.word	.LANCHOR213
-	.word	.LC4
-	.word	.LC5
-	.word	.LC6
-	.word	.LANCHOR95
-	.word	.LANCHOR66
-	.word	.LANCHOR96
-	.size	log2phys, .-log2phys
-	.section	.text.FtlReUsePrevPpa,"ax",%progbits
-	.align	1
-	.global	FtlReUsePrevPpa
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlReUsePrevPpa, %function
-FtlReUsePrevPpa:
-	@ args = 0, pretend = 0, frame = 8
+	.type	FtlReUsePrevPpa, %function
+FtlReUsePrevPpa:
+.LFB371:
+	.loc 1 1851 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL2221:
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
+	.cfi_offset 14, -4
+	.loc 1 1851 0
 	mov	r6, r0
-	ldr	r5, .L2019
+	.loc 1 1854 0
+	ldr	r5, .L2015
+	.loc 1 1852 0
 	ubfx	r0, r1, #10, #16
+.LVL2222:
+	.loc 1 1851 0
 	str	r1, [sp, #4]
+	.loc 1 1852 0
 	bl	P2V_block_in_plane
+.LVL2223:
+	.loc 1 1854 0
 	ldr	r2, [r5]
+	.loc 1 1852 0
 	mov	r7, r0
+.LVL2224:
+	.loc 1 1854 0
 	ldrh	r3, [r2, r0, lsl #1]
 	cmp	r3, #0
-	bne	.L2010
-	ldr	r2, .L2019+4
+	bne	.L2006
+	.loc 1 1855 0
+	ldr	r2, .L2015+4
 	ldr	r4, [r2]
 	cmp	r4, #0
-	beq	.L2011
-	ldr	r2, .L2019+8
+	beq	.L2007
+.LBB476:
+	.loc 1 1859 0
+	ldr	r2, .L2015+8
+	.loc 1 1867 0
 	movw	lr, #65535
-	ldr	ip, .L2019+32
-	ldr	r0, .L2019+12
+	.loc 1 1859 0
+	ldr	ip, .L2015+32
+	.loc 1 1858 0
+	ldr	r0, .L2015+12
+.LVL2225:
+	.loc 1 1859 0
 	ldr	r2, [r2]
+	.loc 1 1858 0
 	ldrh	r1, [r0]
+.LVL2226:
 	mov	r8, r0
+	.loc 1 1859 0
 	subs	r4, r4, r2
 	asrs	r4, r4, #1
 	mul	r4, ip, r4
+	.loc 1 1867 0
 	mov	ip, #6
+	.loc 1 1859 0
 	uxth	r4, r4
-.L2012:
+.LVL2227:
+.L2008:
+	.loc 1 1860 0 discriminator 1
 	uxth	r0, r3
 	cmp	r1, r0
-	bls	.L2011
+	bls	.L2007
+	.loc 1 1861 0
 	cmp	r4, r7
-	bne	.L2013
+	bne	.L2009
+	.loc 1 1862 0
 	mov	r1, r4
-	ldr	r0, .L2019+4
+.LVL2228:
+	ldr	r0, .L2015+4
 	bl	List_remove_node
+.LVL2229:
 	ldrh	r3, [r8]
-	cbnz	r3, .L2014
-	ldr	r1, .L2019+16
-	movw	r2, #1825
-	ldr	r0, .L2019+20
+	cbnz	r3, .L2010
+	.loc 1 1862 0 is_stmt 0 discriminator 1
+	ldr	r1, .L2015+16
+	movw	r2, #1862
+	ldr	r0, .L2015+20
 	bl	printf
-	ldr	r1, .L2019+24
-	ldr	r0, .L2019+28
+.LVL2230:
+	ldr	r1, .L2015+24
+	ldr	r0, .L2015+28
 	bl	printf
-.L2014:
+.LVL2231:
+.L2010:
+	.loc 1 1862 0 discriminator 3
 	ldrh	r3, [r8]
+	.loc 1 1863 0 is_stmt 1 discriminator 3
 	mov	r0, r4
+	.loc 1 1862 0 discriminator 3
 	subs	r3, r3, #1
 	strh	r3, [r8]	@ movhi
+	.loc 1 1863 0 discriminator 3
 	bl	INSERT_DATA_LIST
+.LVL2232:
+	.loc 1 1864 0 discriminator 3
 	ldr	r2, [r5]
 	ldrh	r3, [r2, r7, lsl #1]
-.L2010:
+.LVL2233:
+.L2006:
+.LBE476:
+	.loc 1 1873 0
 	adds	r3, r3, #1
 	strh	r3, [r2, r7, lsl #1]	@ movhi
-	b	.L2011
-.L2013:
+	b	.L2007
+.LVL2234:
+.L2009:
+.LBB477:
+	.loc 1 1867 0
 	mul	r4, ip, r4
+.LVL2235:
 	adds	r3, r3, #1
+.LVL2236:
 	ldrh	r4, [r2, r4]
 	cmp	r4, lr
-	bne	.L2012
-.L2011:
+	bne	.L2008
+.LVL2237:
+.L2007:
+.LBE477:
+	.loc 1 1875 0
 	movs	r2, #1
 	add	r1, sp, #4
 	mov	r0, r6
 	bl	log2phys
+.LVL2238:
+	.loc 1 1876 0
 	add	sp, sp, #8
+	.cfi_def_cfa_offset 24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L2020:
+.LVL2239:
+.L2016:
 	.align	2
-.L2019:
-	.word	.LANCHOR82
-	.word	.LANCHOR86
-	.word	.LANCHOR80
+.L2015:
+	.word	.LANCHOR83
 	.word	.LANCHOR87
+	.word	.LANCHOR81
+	.word	.LANCHOR88
 	.word	.LANCHOR214
-	.word	.LC4
-	.word	.LC5
 	.word	.LC6
+	.word	.LC7
+	.word	.LC8
 	.word	-1431655765
+	.cfi_endproc
+.LFE371:
 	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
 	.section	.text.FtlVendorPartWrite,"ax",%progbits
 	.align	1
@@ -14179,107 +23320,191 @@ FtlReUsePrevPpa:
 	.fpu softvfp
 	.type	FtlVendorPartWrite, %function
 FtlVendorPartWrite:
+.LFB355:
+	.loc 1 911 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2033
+.LVL2240:
+	.loc 1 918 0
+	ldr	r3, .L2029
+	.loc 1 911 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
 	sub	sp, sp, #56
+	.cfi_def_cfa_offset 88
+	.loc 1 911 0
 	str	r2, [sp]
+	.loc 1 918 0
 	adds	r2, r0, r1
+.LVL2241:
+	.loc 1 911 0
 	mov	r7, r0
 	mov	r5, r1
+	.loc 1 918 0
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L2029
-	ldr	r3, .L2033+4
+	bhi	.L2025
+	.loc 1 916 0
+	ldr	r3, .L2029+4
 	mov	r8, #0
 	ldrh	r6, [r3]
 	lsr	r6, r0, r6
 	lsl	fp, r6, #2
-.L2023:
-	cbnz	r5, .L2028
-.L2021:
+.LVL2242:
+.L2019:
+	.loc 1 921 0
+	cbnz	r5, .L2024
+.LVL2243:
+.L2017:
+	.loc 1 944 0
 	mov	r0, r8
 	add	sp, sp, #56
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+.LVL2244:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2028:
-	ldr	r3, .L2033+8
+.LVL2245:
+.L2024:
+	.cfi_restore_state
+	.loc 1 922 0
+	ldr	r3, .L2029+8
+	.loc 1 923 0
 	mov	r0, r7
-	ldr	r10, .L2033+24
+	ldr	r10, .L2029+24
+	.loc 1 922 0
 	ldr	r3, [r3]
 	ldr	r2, [r3, fp]
-	ldr	r3, .L2033+12
+	.loc 1 923 0
+	ldr	r3, .L2029+12
+	.loc 1 922 0
 	str	r2, [sp, #12]
+.LVL2246:
+	.loc 1 923 0
 	ldrh	r3, [r3]
 	mov	r1, r3
 	str	r3, [sp, #8]
 	bl	__aeabi_uidivmod
+.LVL2247:
+	.loc 1 924 0
 	ldr	r3, [sp, #8]
+	.loc 1 925 0
 	ldr	r2, [sp, #12]
+	.loc 1 923 0
 	str	r1, [sp, #4]
+.LVL2248:
+	.loc 1 924 0
 	subs	r4, r3, r1
 	uxth	r4, r4
+.LVL2249:
+	.loc 1 925 0
 	cmp	r5, r4
+	.loc 1 926 0
 	it	cc
 	uxthcc	r4, r5
-	cbz	r2, .L2025
+.LVL2250:
+	.loc 1 927 0
+	cbz	r2, .L2021
+	.loc 1 927 0 is_stmt 0 discriminator 1
 	cmp	r4, r3
-	beq	.L2025
+	beq	.L2021
+	.loc 1 929 0 is_stmt 1
 	ldr	r3, [r10]
+	.loc 1 931 0
 	add	r0, sp, #20
+	.loc 1 928 0
 	str	r2, [sp, #24]
+	.loc 1 931 0
 	movs	r2, #1
 	mov	r1, r2
+	.loc 1 929 0
 	str	r3, [sp, #28]
+	.loc 1 930 0
 	movs	r3, #0
 	str	r3, [sp, #32]
+	.loc 1 931 0
 	bl	FlashReadPages
-.L2026:
+.LVL2251:
+.L2022:
+	.loc 1 935 0
 	lsls	r3, r4, #9
 	ldr	r0, [r10]
+	.loc 1 939 0
 	subs	r5, r5, r4
+.LVL2252:
+	.loc 1 935 0
 	mov	r2, r3
 	str	r3, [sp, #8]
 	ldm	sp, {r1, r3}
+	.loc 1 940 0
 	add	r7, r7, r4
+.LVL2253:
 	add	fp, fp, #4
+	.loc 1 935 0
 	add	r0, r0, r3, lsl #9
 	bl	ftl_memcpy
+.LVL2254:
+	.loc 1 936 0
 	ldr	r2, [r10]
 	mov	r1, r6
-	ldr	r0, .L2033+16
+	ldr	r0, .L2029+16
+	.loc 1 938 0
 	adds	r6, r6, #1
+.LVL2255:
+	.loc 1 936 0
 	bl	FtlMapWritePage
+.LVL2256:
+	.loc 1 941 0
 	ldr	r3, [sp]
+	.loc 1 937 0
 	adds	r0, r0, #1
 	it	eq
 	moveq	r8, #-1
+.LVL2257:
+	.loc 1 941 0
 	mov	r2, r3
 	ldr	r3, [sp, #8]
 	add	r2, r2, r3
 	str	r2, [sp]
-	b	.L2023
-.L2025:
-	ldr	r3, .L2033+20
+.LVL2258:
+	b	.L2019
+.LVL2259:
+.L2021:
+	.loc 1 933 0
+	ldr	r3, .L2029+20
 	movs	r1, #0
 	ldr	r0, [r10]
 	ldrh	r2, [r3]
+.LVL2260:
 	bl	ftl_memset
-	b	.L2026
-.L2029:
+.LVL2261:
+	b	.L2022
+.LVL2262:
+.L2025:
+	.loc 1 919 0
 	mov	r8, #-1
-	b	.L2021
-.L2034:
+	b	.L2017
+.L2030:
 	.align	2
-.L2033:
-	.word	.LANCHOR48
-	.word	.LANCHOR55
+.L2029:
+	.word	.LANCHOR49
+	.word	.LANCHOR56
 	.word	.LANCHOR191
-	.word	.LANCHOR54
+	.word	.LANCHOR55
 	.word	.LANCHOR215
-	.word	.LANCHOR56
+	.word	.LANCHOR57
 	.word	.LANCHOR182
+	.cfi_endproc
+.LFE355:
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.section	.text.Ftl_save_ext_data,"ax",%progbits
 	.align	1
@@ -14290,83 +23515,112 @@ FtlVendorPartWrite:
 	.fpu softvfp
 	.type	Ftl_save_ext_data, %function
 Ftl_save_ext_data:
+.LFB377:
+	.loc 1 2410 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L2037
-	ldr	r3, .L2037+4
+	.loc 1 2411 0
+	ldr	r2, .L2033
+	ldr	r3, .L2033+4
 	ldr	r1, [r2]
 	cmp	r1, r3
-	bne	.L2035
-	ldr	r3, .L2037+8
+	bne	.L2031
+.LBB480:
+.LBB481:
+	.loc 1 2412 0
+	ldr	r3, .L2033+8
+	.loc 1 2427 0
 	movs	r1, #1
 	movs	r0, #0
+	.loc 1 2412 0
 	str	r3, [r2, #4]
-	ldr	r3, .L2037+12
+	.loc 1 2413 0
+	ldr	r3, .L2033+12
 	ldr	r3, [r3]
 	str	r3, [r2, #88]
-	ldr	r3, .L2037+16
+	.loc 1 2414 0
+	ldr	r3, .L2033+16
 	ldr	r3, [r3]
 	str	r3, [r2, #92]
-	ldr	r3, .L2037+20
+	.loc 1 2415 0
+	ldr	r3, .L2033+20
 	ldr	r3, [r3]
 	str	r3, [r2, #8]
-	ldr	r3, .L2037+24
+	.loc 1 2416 0
+	ldr	r3, .L2033+24
 	ldr	r3, [r3]
 	str	r3, [r2, #12]
-	ldr	r3, .L2037+28
+	.loc 1 2417 0
+	ldr	r3, .L2033+28
 	ldr	r3, [r3]
 	str	r3, [r2, #16]
-	ldr	r3, .L2037+32
+	.loc 1 2418 0
+	ldr	r3, .L2033+32
 	ldr	r3, [r3]
 	str	r3, [r2, #20]
-	ldr	r3, .L2037+36
+	.loc 1 2419 0
+	ldr	r3, .L2033+36
 	ldr	r3, [r3]
 	str	r3, [r2, #28]
-	ldr	r3, .L2037+40
+	.loc 1 2420 0
+	ldr	r3, .L2033+40
 	ldr	r3, [r3]
 	str	r3, [r2, #32]
-	ldr	r3, .L2037+44
+	.loc 1 2421 0
+	ldr	r3, .L2033+44
 	ldr	r3, [r3]
 	str	r3, [r2, #36]
-	ldr	r3, .L2037+48
+	.loc 1 2422 0
+	ldr	r3, .L2033+48
 	ldr	r3, [r3]
 	str	r3, [r2, #40]
-	ldr	r3, .L2037+52
+	.loc 1 2423 0
+	ldr	r3, .L2033+52
 	ldr	r3, [r3]
 	str	r3, [r2, #44]
-	ldr	r3, .L2037+56
+	.loc 1 2424 0
+	ldr	r3, .L2033+56
 	ldr	r3, [r3]
 	str	r3, [r2, #48]
-	ldr	r3, .L2037+60
+	.loc 1 2425 0
+	ldr	r3, .L2033+60
 	ldr	r3, [r3]
 	str	r3, [r2, #60]
-	ldr	r3, .L2037+64
+	.loc 1 2426 0
+	ldr	r3, .L2033+64
 	ldr	r3, [r3]
 	str	r3, [r2, #64]
+	.loc 1 2427 0
 	b	FtlVendorPartWrite
-.L2035:
+.LVL2263:
+.L2031:
 	bx	lr
-.L2038:
+.L2034:
 	.align	2
-.L2037:
-	.word	.LANCHOR136
+.L2033:
+	.word	.LANCHOR135
 	.word	1179929683
-	.word	1342177351
+	.word	1342177352
 	.word	.LANCHOR216
 	.word	.LANCHOR217
+	.word	.LANCHOR158
 	.word	.LANCHOR159
-	.word	.LANCHOR160
-	.word	.LANCHOR164
 	.word	.LANCHOR163
-	.word	.LANCHOR166
-	.word	.LANCHOR78
-	.word	.LANCHOR161
 	.word	.LANCHOR162
+	.word	.LANCHOR165
+	.word	.LANCHOR79
+	.word	.LANCHOR160
+	.word	.LANCHOR161
+	.word	.LANCHOR166
 	.word	.LANCHOR167
-	.word	.LANCHOR168
-	.word	.LANCHOR156
 	.word	.LANCHOR155
+	.word	.LANCHOR154
+.LBE481:
+.LBE480:
+	.cfi_endproc
+.LFE377:
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
 	.section	.text.FtlEctTblFlush,"ax",%progbits
 	.align	1
@@ -14377,68 +23631,106 @@ Ftl_save_ext_data:
 	.fpu softvfp
 	.type	FtlEctTblFlush, %function
 FtlEctTblFlush:
+.LFB357:
+	.loc 1 988 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL2264:
 	push	{r3, lr}
-	ldr	r3, .L2046
+	.cfi_def_cfa_offset 8
+	.cfi_offset 3, -8
+	.cfi_offset 14, -4
+	.loc 1 990 0
+	ldr	r3, .L2042
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L2044
-	ldr	r3, .L2046+4
+	beq	.L2040
+	.loc 1 990 0 is_stmt 0 discriminator 1
+	ldr	r3, .L2042+4
 	ldr	r3, [r3]
 	cmp	r3, #29
+	.loc 1 991 0 is_stmt 1 discriminator 1
 	ite	hi
 	movhi	r3, #32
 	movls	r3, #4
-.L2040:
-	ldr	r1, .L2046+8
+.L2036:
+.LVL2265:
+	.loc 1 992 0
+	ldr	r1, .L2042+8
 	ldrh	r2, [r1]
 	cmp	r2, #31
+	.loc 1 993 0
 	ittt	ls
 	addls	r2, r2, #1
+	.loc 1 994 0
 	movls	r3, #1
+.LVL2266:
+	.loc 1 993 0
 	strhls	r2, [r1]	@ movhi
-	ldr	r2, .L2046+12
-	cbnz	r0, .L2042
+.LVL2267:
+	ldr	r2, .L2042+12
+	.loc 1 996 0
+	cbnz	r0, .L2038
+	.loc 1 996 0 is_stmt 0 discriminator 1
 	ldr	r1, [r2]
 	ldr	r0, [r1, #20]
+.LVL2268:
 	ldr	r1, [r1, #16]
 	add	r3, r3, r0
+.LVL2269:
 	cmp	r1, r3
-	bcc	.L2043
-.L2042:
-	ldr	r2, [r2]
+	bcc	.L2039
+.L2038:
+	.loc 1 998 0 is_stmt 1
+	ldr	r3, [r2]
+	.loc 1 1003 0
 	movs	r0, #64
-	ldr	r3, [r2, #16]
-	str	r3, [r2, #20]
-	ldr	r3, .L2046+16
-	str	r3, [r2]
-	ldr	r3, .L2046+20
+	.loc 1 998 0
+	ldr	r1, [r3, #16]
+	str	r1, [r3, #20]
+	.loc 1 999 0
+	ldr	r1, .L2042+16
+	str	r1, [r3]
+	.loc 1 1000 0
+	ldr	r3, .L2042+20
+	ldr	r2, [r2]
 	ldrh	r1, [r3]
 	lsls	r3, r1, #9
 	str	r3, [r2, #12]
+	.loc 1 1001 0
 	ldr	r3, [r2, #8]
 	adds	r3, r3, #1
 	str	r3, [r2, #8]
+	.loc 1 1002 0
 	movs	r3, #0
 	str	r3, [r2, #4]
+	.loc 1 1003 0
 	bl	FtlVendorPartWrite
+.LVL2270:
+	.loc 1 1004 0
 	bl	Ftl_save_ext_data
-.L2043:
+.LVL2271:
+.L2039:
+	.loc 1 1006 0
 	movs	r0, #0
 	pop	{r3, pc}
-.L2044:
+.LVL2272:
+.L2040:
+	.loc 1 989 0
 	movs	r3, #32
-	b	.L2040
-.L2047:
+	b	.L2036
+.L2043:
 	.align	2
-.L2046:
-	.word	.LANCHOR101
-	.word	.LANCHOR168
+.L2042:
+	.word	.LANCHOR28
+	.word	.LANCHOR167
 	.word	.LANCHOR218
 	.word	.LANCHOR188
 	.word	1112818501
 	.word	.LANCHOR187
+	.cfi_endproc
+.LFE357:
 	.size	FtlEctTblFlush, .-FtlEctTblFlush
 	.section	.text.allocate_new_data_superblock,"ax",%progbits
 	.align	1
@@ -14449,125 +23741,183 @@ FtlEctTblFlush:
 	.fpu softvfp
 	.type	allocate_new_data_superblock, %function
 allocate_new_data_superblock:
+.LFB387:
+	.loc 1 2979 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2075
+.LVL2273:
+	.loc 1 2982 0
+	ldr	r3, .L2071
+	.loc 1 2979 0
 	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 1 2979 0
 	mov	r4, r0
+	.loc 1 2980 0
 	ldrh	r5, [r0]
+.LVL2274:
+	.loc 1 2982 0
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	bcs	.L2049
-	ldr	r1, .L2075+4
-	movw	r2, #2943
-	ldr	r0, .L2075+8
+	bcs	.L2045
+	.loc 1 2982 0 is_stmt 0 discriminator 1
+	ldr	r1, .L2071+4
+	movw	r2, #2982
+	ldr	r0, .L2071+8
+.LVL2275:
 	bl	printf
-	ldr	r1, .L2075+12
-	ldr	r0, .L2075+16
+.LVL2276:
+	ldr	r1, .L2071+12
+	ldr	r0, .L2071+16
 	bl	printf
-.L2049:
-	ldr	r3, .L2075+20
+.LVL2277:
+.L2045:
+	.loc 1 2983 0 is_stmt 1
+	ldr	r3, .L2071+20
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L2050
+	bne	.L2046
+	.loc 1 2985 0
 	movw	r3, #65535
 	cmp	r5, r3
-	beq	.L2051
-	ldr	r3, .L2075+24
+	beq	.L2047
+	.loc 1 2986 0
+	ldr	r3, .L2071+24
+	.loc 1 2987 0
 	mov	r0, r5
+	.loc 1 2986 0
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r5, lsl #1]
-	cbz	r3, .L2052
+	cbz	r3, .L2048
+	.loc 1 2987 0
 	bl	INSERT_DATA_LIST
-.L2051:
+.LVL2278:
+.L2047:
+	.loc 1 2991 0
 	movs	r3, #0
 	strb	r3, [r4, #8]
-	ldr	r3, .L2075+28
+	.loc 1 2993 0
+	ldr	r3, .L2071+28
 	cmp	r4, r3
-	beq	.L2053
-	ldr	r3, .L2075+32
+	beq	.L2049
+	.loc 1 2993 0 is_stmt 0 discriminator 1
+	ldr	r3, .L2071+32
 	ldrh	r2, [r3]
 	cmp	r2, #1
-	beq	.L2053
-	ldr	r3, .L2075+36
+	beq	.L2049
+	.loc 1 2993 0 discriminator 2
+	ldr	r3, .L2071+36
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2054
-.L2053:
+	cbz	r3, .L2050
+.L2049:
+	.loc 1 2994 0 is_stmt 1
 	movs	r3, #1
 	strb	r3, [r4, #8]
-.L2055:
-	ldr	r6, .L2075+40
+.L2051:
+	.loc 1 3005 0
+	ldr	r6, .L2071+40
 	movw	r2, #65535
 	ldrh	r0, [r6]
 	cmp	r0, r2
-	beq	.L2060
+	beq	.L2056
+	.loc 1 3009 0
 	cmp	r5, r0
-	bne	.L2061
-	ldr	r3, .L2075+24
+	bne	.L2057
+	.loc 1 3009 0 is_stmt 0 discriminator 1
+	ldr	r3, .L2071+24
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L2062
-.L2061:
+	cbz	r3, .L2058
+.L2057:
+	.loc 1 3010 0 is_stmt 1
 	bl	update_vpc_list
-.L2062:
+.LVL2279:
+.L2058:
+	.loc 1 3011 0
 	movw	r3, #65535
 	strh	r3, [r6]	@ movhi
-.L2060:
+.L2056:
+	.loc 1 3013 0
 	mov	r0, r4
 	bl	allocate_data_superblock
+.LVL2280:
+	.loc 1 3014 0
 	bl	l2p_flush
+.LVL2281:
+	.loc 1 3015 0
 	movs	r0, #0
 	bl	FtlEctTblFlush
+.LVL2282:
+	.loc 1 3016 0
 	bl	FtlVpcTblFlush
-.L2050:
+.LVL2283:
+.L2046:
+	.loc 1 3018 0
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L2052:
+.LVL2284:
+.L2048:
+	.loc 1 2989 0
 	bl	INSERT_FREE_LIST
-	b	.L2051
-.L2054:
-	ldr	r3, .L2075+44
+.LVL2285:
+	b	.L2047
+.L2050:
+	.loc 1 2995 0
+	ldr	r3, .L2071+44
 	cmp	r4, r3
-	bne	.L2055
+	bne	.L2051
+	.loc 1 2996 0
 	cmp	r2, #3
-	beq	.L2057
-	ldr	r2, .L2075+48
+	beq	.L2053
+	.loc 1 2996 0 is_stmt 0 discriminator 1
+	ldr	r2, .L2071+48
 	ldr	r2, [r2]
 	cmp	r2, #1
-	bne	.L2058
-.L2057:
+	bne	.L2054
+.L2053:
+	.loc 1 2997 0 is_stmt 1
 	movs	r2, #1
 	strb	r2, [r3, #8]
-.L2058:
-	ldr	r2, .L2075+52
+.L2054:
+	.loc 1 2998 0
+	ldr	r2, .L2071+52
 	ldr	r2, [r2]
 	cmp	r2, #0
-	beq	.L2055
-	ldr	r2, .L2075+56
+	beq	.L2051
+	.loc 1 2998 0 is_stmt 0 discriminator 1
+	ldr	r2, .L2071+56
 	ldr	r2, [r2]
 	cmp	r2, #29
+	.loc 1 2999 0 is_stmt 1 discriminator 1
 	itt	ls
 	movls	r2, #1
 	strbls	r2, [r3, #8]
-	b	.L2055
-.L2076:
+	b	.L2051
+.L2072:
 	.align	2
-.L2075:
-	.word	.LANCHOR38
+.L2071:
+	.word	.LANCHOR39
 	.word	.LANCHOR219
-	.word	.LC4
-	.word	.LC5
 	.word	.LC6
-	.word	.LANCHOR75
-	.word	.LANCHOR82
-	.word	.LANCHOR91
-	.word	.LANCHOR42
+	.word	.LC7
+	.word	.LC8
+	.word	.LANCHOR76
+	.word	.LANCHOR83
+	.word	.LANCHOR92
+	.word	.LANCHOR43
 	.word	.LANCHOR8
 	.word	.LANCHOR130
-	.word	.LANCHOR90
-	.word	.LANCHOR156
-	.word	.LANCHOR101
-	.word	.LANCHOR168
+	.word	.LANCHOR91
+	.word	.LANCHOR155
+	.word	.LANCHOR28
+	.word	.LANCHOR167
+	.cfi_endproc
+.LFE387:
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
 	.section	.text.FtlProgPages,"ax",%progbits
 	.align	1
@@ -14578,151 +23928,239 @@ allocate_new_data_superblock:
 	.fpu softvfp
 	.type	FtlProgPages, %function
 FtlProgPages:
+.LFB306:
+	.loc 4 1531 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL2286:
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 48
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 4 1531 0
 	mov	r4, r3
-	ldr	r3, .L2096
+	.loc 4 1539 0
+	ldr	r3, .L2092
+.LVL2287:
+	.loc 4 1531 0
 	mov	r5, r0
 	mov	r8, r1
+	.loc 4 1539 0
 	ldrb	r6, [r3]	@ zero_extendqisi2
-	cbz	r6, .L2078
+	cbz	r6, .L2074
+	.loc 4 1539 0 is_stmt 0 discriminator 1
 	ldrb	r6, [r4, #8]	@ zero_extendqisi2
 	subs	r3, r6, #1
 	rsbs	r6, r3, #0
 	adcs	r6, r6, r3
-.L2078:
-	ldr	r10, .L2096+32
+.L2074:
+.LVL2288:
+	.loc 4 1548 0 is_stmt 1 discriminator 6
+	ldr	r10, .L2092+32
+	.loc 4 1544 0 discriminator 6
 	movs	r7, #0
+	.loc 4 1542 0 discriminator 6
 	ldrb	r3, [r4, #9]	@ zero_extendqisi2
 	mov	r2, r6
+.LVL2289:
 	mov	r1, r8
+.LVL2290:
 	mov	r0, r5
+.LVL2291:
 	bl	FlashProgPages
-.L2079:
+.LVL2292:
+.L2075:
+	.loc 4 1544 0 discriminator 1
 	cmp	r7, r8
-	beq	.L2088
-	ldr	fp, .L2096+36
-	b	.L2089
-.L2082:
+	beq	.L2084
+	.loc 4 1549 0
+	ldr	fp, .L2092+36
+	b	.L2085
+.L2078:
+	.loc 4 1546 0
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
+.LVL2293:
+	.loc 4 1547 0
 	ldrh	r3, [r4]
 	cmp	r3, r0
-	bne	.L2080
+	bne	.L2076
+	.loc 4 1548 0
 	ldr	r1, [r10]
 	ldrh	r0, [r4, #4]
+.LVL2294:
 	ldrh	r2, [r1, r3, lsl #1]
 	subs	r2, r2, r0
 	strh	r2, [r1, r3, lsl #1]	@ movhi
+	.loc 4 1549 0
 	ldrh	r3, [fp]
 	strh	r3, [r4, #2]	@ movhi
+	.loc 4 1550 0
 	movs	r3, #0
 	strb	r3, [r4, #6]
+	.loc 4 1551 0
 	strh	r3, [r4, #4]	@ movhi
-.L2080:
+.L2076:
+	.loc 4 1553 0
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L2081
+	cbnz	r3, .L2077
+	.loc 4 1554 0
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-.L2081:
-	ldr	r2, .L2096+4
+.LVL2295:
+.L2077:
+	.loc 4 1557 0
+	ldr	r2, .L2092+4
 	ldr	r3, [r2, #96]
 	adds	r3, r3, #1
 	str	r3, [r2, #96]
+	.loc 4 1558 0
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	FtlGcMarkBadPhyBlk
+.LVL2296:
+	.loc 4 1559 0
 	mov	r0, r4
 	bl	get_new_active_ppa
+.LVL2297:
+	.loc 4 1561 0
 	mov	r2, r6
+	.loc 4 1560 0
 	str	r0, [r5, #4]
+	.loc 4 1559 0
 	str	r0, [sp, #12]
+	.loc 4 1561 0
 	movs	r1, #1
 	ldrb	r3, [r4, #9]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	FlashProgPages
-.L2089:
+.LVL2298:
+.L2085:
+	.loc 4 1545 0
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L2082
-	ldr	r3, .L2096+8
+	beq	.L2078
+	.loc 4 1564 0
+	ldr	r3, .L2092+8
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L2083
-	ldr	r1, .L2096+12
-	mov	r2, #1552
-	ldr	r0, .L2096+16
+	bcc	.L2079
+	.loc 4 1564 0 is_stmt 0 discriminator 1
+	ldr	r1, .L2092+12
+	movw	r2, #1564
+	ldr	r0, .L2092+16
 	bl	printf
-	ldr	r1, .L2096+20
-	ldr	r0, .L2096+24
+.LVL2299:
+	ldr	r1, .L2092+20
+	ldr	r0, .L2092+24
 	bl	printf
-.L2083:
+.LVL2300:
+.L2079:
+	.loc 4 1565 0 is_stmt 1
 	ldr	r3, [r5, #4]
-	cbnz	r6, .L2084
-.L2095:
+	.loc 4 1566 0
+	cbnz	r6, .L2080
+.L2091:
+	.loc 4 1568 0
 	movs	r2, #1
 	add	r1, sp, #12
 	ldr	r0, [r5, #16]
+	.loc 4 1567 0
 	str	r3, [sp, #12]
+	.loc 4 1568 0
 	bl	log2phys
+.LVL2301:
+	.loc 4 1570 0
 	ldr	r3, [r5, #12]
 	ldr	r3, [r3, #12]
+.LVL2302:
+	.loc 4 1572 0
 	ubfx	r0, r3, #10, #16
 	str	r3, [sp, #4]
 	bl	P2V_block_in_plane
+.LVL2303:
+	.loc 4 1573 0
 	ldr	r3, [sp, #4]
+	.loc 4 1572 0
 	mov	fp, r0
+.LVL2304:
+	.loc 4 1573 0
 	adds	r3, r3, #1
-	beq	.L2086
+	beq	.L2082
+	.loc 4 1575 0
 	ldr	r3, [r10]
 	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L2087
+	cbnz	r2, .L2083
+	.loc 4 1576 0
 	mov	r1, r0
-	ldr	r0, .L2096+28
+	ldr	r0, .L2092+28
+.LVL2305:
 	bl	printf
-.L2087:
+.LVL2306:
+.L2083:
+	.loc 4 1577 0
 	mov	r0, fp
 	bl	decrement_vpc_count
-.L2086:
+.LVL2307:
+.L2082:
+	.loc 4 1544 0 discriminator 2
 	adds	r7, r7, #1
+.LVL2308:
 	adds	r5, r5, #36
-	b	.L2079
-.L2084:
+	b	.L2075
+.LVL2309:
+.L2080:
+	.loc 4 1567 0
 	orr	r3, r3, #-2147483648
-	b	.L2095
-.L2088:
-	ldr	r3, .L2096+8
+	b	.L2091
+.L2084:
+	.loc 4 1581 0
+	ldr	r3, .L2092+8
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L2077
-	ldr	r1, .L2096+12
-	movw	r2, #1569
-	ldr	r0, .L2096+16
+	bcc	.L2073
+	.loc 4 1581 0 is_stmt 0 discriminator 1
+	ldr	r1, .L2092+12
+	movw	r2, #1581
+	ldr	r0, .L2092+16
 	bl	printf
-	ldr	r1, .L2096+20
-	ldr	r0, .L2096+24
+.LVL2310:
+	ldr	r1, .L2092+20
+	ldr	r0, .L2092+24
 	bl	printf
-.L2077:
+.LVL2311:
+.L2073:
+	.loc 4 1582 0 is_stmt 1
 	add	sp, sp, #16
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2097:
+.LVL2312:
+.L2093:
 	.align	2
-.L2096:
+.L2092:
 	.word	.LANCHOR8
-	.word	.LANCHOR136
-	.word	.LANCHOR36
+	.word	.LANCHOR135
+	.word	.LANCHOR37
 	.word	.LANCHOR220
-	.word	.LC4
-	.word	.LC5
 	.word	.LC6
-	.word	.LC38
-	.word	.LANCHOR82
-	.word	.LANCHOR51
+	.word	.LC7
+	.word	.LC8
+	.word	.LC41
+	.word	.LANCHOR83
+	.word	.LANCHOR52
+	.cfi_endproc
+.LFE306:
 	.size	FtlProgPages, .-FtlProgPages
 	.section	.text.FtlCacheWriteBack,"ax",%progbits
 	.align	1
@@ -14733,27 +24171,40 @@ FtlProgPages:
 	.fpu softvfp
 	.type	FtlCacheWriteBack, %function
 FtlCacheWriteBack:
+.LFB307:
+	.loc 4 1585 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
-	ldr	r4, .L2103
+	.cfi_def_cfa_offset 8
+	.cfi_offset 4, -8
+	.cfi_offset 14, -4
+	.loc 4 1586 0
+	ldr	r4, .L2099
 	ldr	r0, [r4]
-	cbz	r0, .L2099
-	ldr	r3, .L2103+4
+	cbz	r0, .L2095
+	.loc 4 1587 0
+	ldr	r3, .L2099+4
 	movs	r2, #0
 	movs	r1, #1
 	ldr	r3, [r3]
 	bl	FtlProgPages
+.LVL2313:
+	.loc 4 1588 0
 	movs	r3, #0
 	str	r3, [r4]
-.L2099:
+.L2095:
+	.loc 4 1591 0
 	movs	r0, #0
 	pop	{r4, pc}
-.L2104:
+.L2100:
 	.align	2
-.L2103:
+.L2099:
 	.word	.LANCHOR129
 	.word	.LANCHOR221
+	.cfi_endproc
+.LFE307:
 	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
 	.section	.text.ftl_discard,"ax",%progbits
 	.align	1
@@ -14764,98 +24215,179 @@ FtlCacheWriteBack:
 	.fpu softvfp
 	.type	ftl_discard, %function
 ftl_discard:
+.LFB309:
+	.loc 4 1779 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2120
+.LVL2314:
+	.loc 4 1786 0
+	ldr	r3, .L2116
+	.loc 4 1779 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
+	.cfi_offset 14, -4
+	.loc 4 1779 0
 	mov	r5, r2
+	.loc 4 1786 0
 	adds	r2, r1, r2
+.LVL2315:
+	.loc 4 1779 0
 	mov	r6, r1
+	.loc 4 1786 0
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L2113
+	bhi	.L2109
+	.loc 4 1789 0
 	cmp	r5, #31
-	bhi	.L2107
-.L2112:
+	bhi	.L2103
+.LVL2316:
+.L2108:
+	.loc 4 1790 0
 	movs	r0, #0
-.L2105:
+.L2101:
+	.loc 4 1823 0
 	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L2107:
-	ldr	r8, .L2120+12
+.LVL2317:
+.L2103:
+	.cfi_restore_state
+	.loc 4 1794 0
+	ldr	r8, .L2116+12
+	.loc 4 1792 0
 	bl	FtlCacheWriteBack
+.LVL2318:
+	.loc 4 1794 0
 	mov	r0, r6
 	ldrh	r4, [r8]
 	mov	r1, r4
 	bl	__aeabi_uidiv
+.LVL2319:
+	.loc 4 1795 0
 	smulbb	r3, r0, r4
+	.loc 4 1794 0
 	mov	r7, r0
+.LVL2320:
+	.loc 4 1795 0
 	subs	r6, r6, r3
+.LVL2321:
 	uxth	r6, r6
-	cbz	r6, .L2108
+.LVL2322:
+	.loc 4 1796 0
+	cbz	r6, .L2104
+.LVL2323:
+	.loc 4 1797 0
 	subs	r4, r4, r6
+.LVL2324:
+	.loc 4 1798 0
 	adds	r7, r7, #1
+.LVL2325:
+	.loc 4 1797 0
 	cmp	r4, r5
 	it	cs
 	movcs	r4, r5
 	uxth	r4, r4
+	.loc 4 1799 0
 	subs	r5, r5, r4
-.L2108:
-	ldr	r4, .L2120+4
+.LVL2326:
+.L2104:
+	.loc 4 1806 0
+	ldr	r4, .L2116+4
+	.loc 4 1802 0
 	mov	r3, #-1
-	ldr	r6, .L2120+8
+	.loc 4 1807 0
+	ldr	r6, .L2116+8
+.LVL2327:
+	.loc 4 1802 0
 	str	r3, [sp, #4]
-.L2109:
+.L2105:
+	.loc 4 1803 0
 	ldrh	r3, [r8]
 	cmp	r5, r3
-	bcs	.L2111
-	ldr	r3, .L2120+4
+	bcs	.L2107
+	.loc 4 1816 0
+	ldr	r3, .L2116+4
 	ldr	r2, [r3]
 	cmp	r2, #32
-	bls	.L2112
+	bls	.L2108
+	.loc 4 1818 0
 	movs	r4, #0
 	str	r4, [r3]
+	.loc 4 1819 0
 	bl	l2p_flush
+.LVL2328:
+	.loc 4 1820 0
 	bl	FtlVpcTblFlush
-	b	.L2112
-.L2111:
+.LVL2329:
+	b	.L2108
+.L2107:
+	.loc 4 1804 0
 	movs	r2, #0
 	mov	r1, sp
 	mov	r0, r7
 	bl	log2phys
+.LVL2330:
+	.loc 4 1805 0
 	ldr	r3, [sp]
 	adds	r3, r3, #1
-	beq	.L2110
+	beq	.L2106
+	.loc 4 1806 0
 	ldr	r3, [r4]
+	.loc 4 1808 0
 	movs	r2, #1
 	add	r1, sp, #4
 	mov	r0, r7
+	.loc 4 1806 0
 	adds	r3, r3, #1
 	str	r3, [r4]
+	.loc 4 1807 0
 	ldr	r3, [r6]
 	adds	r3, r3, #1
 	str	r3, [r6]
+	.loc 4 1808 0
 	bl	log2phys
+.LVL2331:
+	.loc 4 1809 0
 	ldr	r0, [sp]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
+.LVL2332:
+	.loc 4 1810 0
 	bl	decrement_vpc_count
-.L2110:
+.LVL2333:
+.L2106:
+	.loc 4 1813 0
 	ldrh	r3, [r8]
+	.loc 4 1812 0
 	adds	r7, r7, #1
+.LVL2334:
+	.loc 4 1813 0
 	subs	r5, r5, r3
-	b	.L2109
-.L2113:
-	mov	r0, #-1
+.LVL2335:
 	b	.L2105
-.L2121:
+.LVL2336:
+.L2109:
+	.loc 4 1787 0
+	mov	r0, #-1
+.LVL2337:
+	b	.L2101
+.L2117:
 	.align	2
-.L2120:
-	.word	.LANCHOR67
+.L2116:
+	.word	.LANCHOR68
 	.word	.LANCHOR222
-	.word	.LANCHOR161
-	.word	.LANCHOR54
+	.word	.LANCHOR160
+	.word	.LANCHOR55
+	.cfi_endproc
+.LFE309:
 	.size	ftl_discard, .-ftl_discard
 	.section	.text.FtlSysFlush,"ax",%progbits
 	.align	1
@@ -14866,24 +24398,46 @@ ftl_discard:
 	.fpu softvfp
 	.type	FtlSysFlush, %function
 FtlSysFlush:
+.LFB303:
+	.loc 4 1003 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L2124
+	.cfi_def_cfa_offset 8
+	.cfi_offset 3, -8
+	.cfi_offset 14, -4
+	.loc 4 1004 0
+	ldr	r3, .L2120
 	ldr	r3, [r3]
-	cbnz	r3, .L2123
+	cbnz	r3, .L2119
+.LBB484:
+.LBB485:
+	.loc 4 1007 0
 	bl	FtlCacheWriteBack
+.LVL2338:
+	.loc 4 1008 0
 	bl	l2p_flush
+.LVL2339:
+	.loc 4 1009 0
 	movs	r0, #1
 	bl	FtlEctTblFlush
+.LVL2340:
+	.loc 4 1010 0
 	bl	FtlVpcTblFlush
-.L2123:
+.LVL2341:
+.L2119:
+.LBE485:
+.LBE484:
+	.loc 4 1012 0
 	movs	r0, #0
 	pop	{r3, pc}
-.L2125:
+.L2121:
 	.align	2
-.L2124:
-	.word	.LANCHOR75
+.L2120:
+	.word	.LANCHOR76
+	.cfi_endproc
+.LFE303:
 	.size	FtlSysFlush, .-FtlSysFlush
 	.section	.text.FtlDeInit,"ax",%progbits
 	.align	1
@@ -14894,21 +24448,33 @@ FtlSysFlush:
 	.fpu softvfp
 	.type	FtlDeInit, %function
 FtlDeInit:
+.LFB304:
+	.loc 4 1015 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L2128
+	.cfi_def_cfa_offset 8
+	.cfi_offset 3, -8
+	.cfi_offset 14, -4
+	.loc 4 1016 0
+	ldr	r3, .L2124
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L2127
+	bne	.L2123
+	.loc 4 1017 0
 	bl	FtlSysFlush
-.L2127:
+.LVL2342:
+.L2123:
+	.loc 4 1019 0
 	movs	r0, #0
 	pop	{r3, pc}
-.L2129:
+.L2125:
 	.align	2
-.L2128:
+.L2124:
 	.word	.LANCHOR223
+	.cfi_endproc
+.LFE304:
 	.size	FtlDeInit, .-FtlDeInit
 	.section	.text.rk_ftl_de_init,"ax",%progbits
 	.align	1
@@ -14919,13 +24485,39 @@ FtlDeInit:
 	.fpu softvfp
 	.type	rk_ftl_de_init, %function
 rk_ftl_de_init:
+.LFB494:
+	.loc 7 121 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 3, -8
+	.cfi_offset 14, -4
+.LBB486:
+.LBB487:
+	.loc 7 117 0
 	bl	FlashDeInit
+.LVL2343:
+.LBE487:
+.LBE486:
+	.loc 7 123 0
 	bl	FtlDeInit
+.LVL2344:
+	.loc 7 125 0
 	pop	{r3, lr}
+	.cfi_restore 14
+	.cfi_restore 3
+	.cfi_def_cfa_offset 0
+.LBB488:
+.LBB489:
+	.loc 7 117 0
 	b	FlashDeInit
+.LVL2345:
+.LBE489:
+.LBE488:
+	.cfi_endproc
+.LFE494:
 	.size	rk_ftl_de_init, .-rk_ftl_de_init
 	.section	.text.FtlVendorPartRead,"ax",%progbits
 	.align	1
@@ -14936,118 +24528,204 @@ rk_ftl_de_init:
 	.fpu softvfp
 	.type	FtlVendorPartRead, %function
 FtlVendorPartRead:
+.LFB356:
+	.loc 1 947 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2141
+.LVL2346:
+	.loc 1 955 0
+	ldr	r3, .L2137
+	.loc 1 947 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
 	mov	r10, r2
+	.loc 1 955 0
 	adds	r2, r0, r1
+.LVL2347:
+	.loc 1 947 0
 	sub	sp, sp, #56
+	.cfi_def_cfa_offset 88
+	.loc 1 947 0
 	mov	r7, r0
 	mov	r6, r1
+	.loc 1 955 0
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L2140
-	ldr	r3, .L2141+4
+	bhi	.L2136
+	.loc 1 952 0
+	ldr	r3, .L2137+4
 	mov	r8, #0
-	ldr	fp, .L2141+28
+	.loc 1 965 0
+	ldr	fp, .L2137+28
+	.loc 1 952 0
 	ldrh	r5, [r3]
 	lsr	r5, r0, r5
 	lsls	r3, r5, #2
 	str	r3, [sp]
-.L2133:
-	cbnz	r6, .L2139
-.L2131:
+.LVL2348:
+.L2129:
+	.loc 1 957 0
+	cbnz	r6, .L2135
+.LVL2349:
+.L2127:
+	.loc 1 984 0
 	mov	r0, r8
 	add	sp, sp, #56
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2139:
-	ldr	r3, .L2141+8
+.LVL2350:
+.L2135:
+	.cfi_restore_state
+	.loc 1 958 0
+	ldr	r3, .L2137+8
+	.loc 1 959 0
 	mov	r0, r7
+	.loc 1 958 0
 	ldr	r2, [sp]
 	ldr	r3, [r3]
 	ldr	r3, [r3, r2]
-	ldr	r2, .L2141+12
+	.loc 1 959 0
+	ldr	r2, .L2137+12
+	.loc 1 958 0
 	str	r3, [sp, #8]
+.LVL2351:
+	.loc 1 959 0
 	ldrh	r4, [r2]
 	mov	r1, r4
 	bl	__aeabi_uidivmod
+.LVL2352:
+	.loc 1 960 0
 	subs	r4, r4, r1
+	.loc 1 961 0
 	ldr	r3, [sp, #8]
+	.loc 1 960 0
 	uxth	r4, r4
+	.loc 1 959 0
 	str	r1, [sp, #4]
+.LVL2353:
+	.loc 1 961 0
 	cmp	r6, r4
+	.loc 1 962 0
 	it	cc
 	uxthcc	r4, r6
+.LVL2354:
 	lsls	r2, r4, #9
 	str	r2, [sp, #8]
+.LVL2355:
+	.loc 1 963 0
 	cmp	r3, #0
-	beq	.L2135
+	beq	.L2131
+	.loc 1 965 0
 	ldr	r2, [fp]
+	.loc 1 967 0
 	add	r0, sp, #20
+	.loc 1 964 0
 	str	r3, [sp, #24]
 	str	r3, [sp, #12]
+	.loc 1 965 0
 	str	r2, [sp, #28]
+	.loc 1 966 0
 	movs	r2, #0
 	str	r2, [sp, #32]
+	.loc 1 967 0
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
+.LVL2356:
+	.loc 1 968 0
 	ldr	r2, [sp, #20]
+	.loc 1 970 0
 	ldr	r3, [sp, #12]
+	.loc 1 969 0
 	adds	r2, r2, #1
-	ldr	r2, .L2141+16
+	.loc 1 970 0
+	ldr	r2, .L2137+16
+	.loc 1 969 0
 	it	eq
 	moveq	r8, #-1
+.LVL2357:
+	.loc 1 970 0
 	ldr	r2, [r2]
 	cmp	r2, #256
-	bne	.L2137
+	bne	.L2133
+	.loc 1 971 0
 	mov	r2, r3
 	mov	r1, r5
-	ldr	r0, .L2141+20
+	ldr	r0, .L2137+20
 	bl	printf
+.LVL2358:
+	.loc 1 972 0
 	ldr	r2, [fp]
 	mov	r1, r5
-	ldr	r0, .L2141+24
+	ldr	r0, .L2137+24
 	bl	FtlMapWritePage
-.L2137:
+.LVL2359:
+.L2133:
+	.loc 1 974 0
 	ldr	r1, [fp]
 	lsls	r2, r4, #9
 	ldr	r3, [sp, #4]
 	mov	r0, r10
 	add	r1, r1, r3, lsl #9
 	bl	ftl_memcpy
-.L2138:
+.LVL2360:
+.L2134:
+	.loc 1 981 0
 	ldr	r3, [sp, #8]
+	.loc 1 978 0
 	adds	r5, r5, #1
+.LVL2361:
+	.loc 1 979 0
 	subs	r6, r6, r4
+.LVL2362:
+	.loc 1 980 0
 	add	r7, r7, r4
+.LVL2363:
+	.loc 1 981 0
 	add	r10, r10, r3
+.LVL2364:
 	ldr	r3, [sp]
 	adds	r3, r3, #4
 	str	r3, [sp]
-	b	.L2133
-.L2135:
+	b	.L2129
+.LVL2365:
+.L2131:
+	.loc 1 976 0
 	lsls	r2, r4, #9
 	mov	r1, r3
 	mov	r0, r10
 	bl	ftl_memset
-	b	.L2138
-.L2140:
+.LVL2366:
+	b	.L2134
+.LVL2367:
+.L2136:
+	.loc 1 956 0
 	mov	r8, #-1
-	b	.L2131
-.L2142:
+	b	.L2127
+.L2138:
 	.align	2
-.L2141:
-	.word	.LANCHOR48
-	.word	.LANCHOR55
+.L2137:
+	.word	.LANCHOR49
+	.word	.LANCHOR56
 	.word	.LANCHOR191
-	.word	.LANCHOR54
+	.word	.LANCHOR55
 	.word	.LANCHOR199
-	.word	.LC39
+	.word	.LC42
 	.word	.LANCHOR215
 	.word	.LANCHOR182
+	.cfi_endproc
+.LFE356:
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
 	.section	.text.FtlLoadEctTbl,"ax",%progbits
 	.align	1
@@ -15058,39 +24736,61 @@ FtlVendorPartRead:
 	.fpu softvfp
 	.type	FtlLoadEctTbl, %function
 FtlLoadEctTbl:
+.LFB362:
+	.loc 1 1489 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 1 1490 0
 	movs	r0, #64
-	ldr	r4, .L2145
-	ldr	r5, .L2145+4
+	ldr	r4, .L2141
+	ldr	r5, .L2141+4
 	ldr	r2, [r4]
 	ldrh	r1, [r5]
 	bl	FtlVendorPartRead
+.LVL2368:
+	.loc 1 1491 0
 	ldr	r3, [r4]
 	ldr	r2, [r3]
-	ldr	r3, .L2145+8
+	ldr	r3, .L2141+8
 	cmp	r2, r3
-	beq	.L2144
-	ldr	r1, .L2145+12
-	ldr	r0, .L2145+16
+	beq	.L2140
+.LBB492:
+.LBB493:
+	.loc 1 1493 0
+	ldr	r1, .L2141+12
+	ldr	r0, .L2141+16
 	bl	printf
+.LVL2369:
+	.loc 1 1494 0
 	ldrh	r2, [r5]
 	movs	r1, #0
 	ldr	r0, [r4]
 	lsls	r2, r2, #9
 	bl	ftl_memset
-.L2144:
+.LVL2370:
+.L2140:
+.LBE493:
+.LBE492:
+	.loc 1 1499 0
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L2146:
+.L2142:
 	.align	2
-.L2145:
+.L2141:
 	.word	.LANCHOR188
 	.word	.LANCHOR187
 	.word	1112818501
-	.word	.LC40
-	.word	.LC6
+	.word	.LC43
+	.word	.LC8
+	.cfi_endproc
+.LFE362:
 	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
 	.section	.text.Ftl_load_ext_data,"ax",%progbits
 	.align	1
@@ -15101,120 +24801,163 @@ FtlLoadEctTbl:
 	.fpu softvfp
 	.type	Ftl_load_ext_data, %function
 Ftl_load_ext_data:
+.LFB378:
+	.loc 1 2432 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 1 2433 0
 	movs	r1, #1
-	ldr	r4, .L2151
+	ldr	r4, .L2147
 	movs	r0, #0
-	ldr	r5, .L2151+4
+	.loc 1 2434 0
+	ldr	r5, .L2147+4
+	.loc 1 2433 0
 	mov	r2, r4
 	bl	FtlVendorPartRead
+.LVL2371:
+	.loc 1 2434 0
 	ldr	r3, [r4]
 	cmp	r3, r5
-	beq	.L2148
+	beq	.L2144
+	.loc 1 2435 0
 	mov	r2, #512
 	movs	r1, #0
 	mov	r0, r4
 	bl	ftl_memset
+.LVL2372:
+	.loc 1 2436 0
 	str	r5, [r4]
-.L2148:
+.L2144:
+	.loc 1 2439 0
 	ldr	r3, [r4]
 	cmp	r3, r5
-	ldr	r5, .L2151+8
-	bne	.L2149
+	ldr	r5, .L2147+8
+	bne	.L2145
+	.loc 1 2440 0
 	ldr	r2, [r4, #88]
-	ldr	r3, .L2151+12
+	ldr	r3, .L2147+12
 	str	r2, [r3]
+	.loc 1 2441 0
 	ldr	r2, [r4, #92]
-	ldr	r3, .L2151+16
+	ldr	r3, .L2147+16
 	str	r2, [r3]
+	.loc 1 2442 0
 	ldr	r2, [r4, #8]
-	ldr	r3, .L2151+20
+	ldr	r3, .L2147+20
 	str	r2, [r3]
+	.loc 1 2443 0
 	ldr	r2, [r4, #12]
-	ldr	r3, .L2151+24
+	ldr	r3, .L2147+24
 	str	r2, [r3]
+	.loc 1 2444 0
 	ldr	r2, [r4, #16]
-	ldr	r3, .L2151+28
+	ldr	r3, .L2147+28
 	str	r2, [r3]
+	.loc 1 2445 0
 	ldr	r2, [r4, #20]
-	ldr	r3, .L2151+32
+	ldr	r3, .L2147+32
 	str	r2, [r3]
+	.loc 1 2446 0
 	ldr	r3, [r4, #28]
+	.loc 1 2447 0
 	ldr	r2, [r4, #32]
+	.loc 1 2446 0
 	str	r3, [r5]
-	ldr	r3, .L2151+36
+	.loc 1 2447 0
+	ldr	r3, .L2147+36
 	str	r2, [r3]
+	.loc 1 2448 0
 	ldr	r2, [r4, #36]
-	ldr	r3, .L2151+40
+	ldr	r3, .L2147+40
 	str	r2, [r3]
+	.loc 1 2449 0
 	ldr	r2, [r4, #40]
-	ldr	r3, .L2151+44
+	ldr	r3, .L2147+44
 	str	r2, [r3]
+	.loc 1 2450 0
 	ldr	r2, [r4, #44]
-	ldr	r3, .L2151+48
+	ldr	r3, .L2147+48
 	str	r2, [r3]
+	.loc 1 2451 0
 	ldr	r2, [r4, #48]
-	ldr	r3, .L2151+52
+	ldr	r3, .L2147+52
 	str	r2, [r3]
+	.loc 1 2452 0
 	ldr	r2, [r4, #60]
-	ldr	r3, .L2151+56
+	ldr	r3, .L2147+56
 	str	r2, [r3]
-.L2149:
-	ldr	r3, .L2151+60
+.L2145:
+	.loc 1 2462 0
+	ldr	r3, .L2147+60
 	movs	r2, #0
 	str	r2, [r3]
+	.loc 1 2472 0
 	ldr	r2, [r4, #68]
-	ldr	r3, .L2151+64
+	ldr	r3, .L2147+64
 	cmp	r2, r3
-	bne	.L2150
-	ldr	r3, .L2151+68
+	bne	.L2146
+	.loc 1 2473 0
+	ldr	r3, .L2147+68
 	movs	r2, #1
-	ldr	r1, .L2151+72
-	ldr	r0, .L2151+76
+	.loc 1 2474 0
+	ldr	r1, .L2147+72
+	ldr	r0, .L2147+76
+	.loc 1 2473 0
 	str	r2, [r3]
+	.loc 1 2474 0
 	bl	printf
-.L2150:
-	ldr	r3, .L2151+80
-	ldr	r1, .L2151+84
+.LVL2373:
+.L2146:
+	.loc 1 2479 0
+	ldr	r3, .L2147+80
+	ldr	r1, .L2147+84
 	ldrh	r2, [r3]
-	ldr	r3, .L2151+88
+	ldr	r3, .L2147+88
 	ldrh	r1, [r1]
 	ldr	r0, [r3]
 	ldr	r3, [r5]
 	mla	r0, r0, r2, r3
 	bl	__aeabi_uidiv
-	ldr	r3, .L2151+92
+.LVL2374:
+	ldr	r3, .L2147+92
 	str	r0, [r3]
 	pop	{r3, r4, r5, pc}
-.L2152:
+.L2148:
 	.align	2
-.L2151:
-	.word	.LANCHOR136
+.L2147:
+	.word	.LANCHOR135
 	.word	1179929683
-	.word	.LANCHOR166
+	.word	.LANCHOR165
 	.word	.LANCHOR216
 	.word	.LANCHOR217
+	.word	.LANCHOR158
 	.word	.LANCHOR159
-	.word	.LANCHOR160
-	.word	.LANCHOR164
 	.word	.LANCHOR163
-	.word	.LANCHOR78
-	.word	.LANCHOR161
 	.word	.LANCHOR162
+	.word	.LANCHOR79
+	.word	.LANCHOR160
+	.word	.LANCHOR161
+	.word	.LANCHOR166
 	.word	.LANCHOR167
-	.word	.LANCHOR168
-	.word	.LANCHOR156
 	.word	.LANCHOR155
+	.word	.LANCHOR154
 	.word	305432421
-	.word	.LANCHOR101
-	.word	.LC41
-	.word	.LC6
-	.word	.LANCHOR46
-	.word	.LANCHOR38
-	.word	.LANCHOR165
+	.word	.LANCHOR28
+	.word	.LC44
+	.word	.LC8
+	.word	.LANCHOR47
+	.word	.LANCHOR39
+	.word	.LANCHOR164
 	.word	.LANCHOR202
+	.cfi_endproc
+.LFE378:
 	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
 	.section	.text.FtlMapBlkWriteDumpData,"ax",%progbits
 	.align	1
@@ -15225,95 +24968,172 @@ Ftl_load_ext_data:
 	.fpu softvfp
 	.type	FtlMapBlkWriteDumpData, %function
 FtlMapBlkWriteDumpData:
+.LFB359:
+	.loc 1 1025 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL2375:
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 3, -32
+	.cfi_offset 4, -28
+	.cfi_offset 5, -24
+	.cfi_offset 6, -20
+	.cfi_offset 7, -16
+	.cfi_offset 8, -12
+	.cfi_offset 10, -8
+	.cfi_offset 14, -4
+	.loc 1 1025 0
 	mov	r4, r0
+	.loc 1 1031 0
 	ldr	r3, [r0, #36]
 	cmp	r3, #0
-	beq	.L2153
+	beq	.L2149
+	.loc 1 1033 0
 	movs	r3, #0
+	.loc 1 1027 0
 	ldrh	r6, [r0, #6]
+	.loc 1 1033 0
 	str	r3, [r0, #36]
-	ldr	r3, .L2167
+	.loc 1 1034 0
+	ldr	r3, .L2163
+	.loc 1 1028 0
 	ldr	r10, [r0, #24]
+	.loc 1 1034 0
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L2153
-	ldr	r3, .L2167+4
-	ldr	r5, .L2167+8
+	bne	.L2149
+	.loc 1 1036 0
+	ldr	r3, .L2163+4
+	ldr	r5, .L2163+8
 	ldr	r3, [r3]
 	mov	r7, r5
 	str	r3, [r5, #8]
-	ldr	r3, .L2167+12
+.LVL2376:
+	.loc 1 1037 0
+	ldr	r3, .L2163+12
 	ldr	r8, [r3]
-	ldrh	r3, [r0, #2]
 	str	r8, [r5, #12]
-	cbz	r3, .L2157
-	ldr	r2, .L2167+16
+	.loc 1 1040 0
+	ldrh	r3, [r0, #2]
+	cbz	r3, .L2153
+	.loc 1 1040 0 is_stmt 0 discriminator 1
+	ldr	r2, .L2163+16
 	ldrh	r2, [r2]
 	subs	r2, r2, #1
 	cmp	r3, r2
-	bge	.L2157
+	bge	.L2153
+	.loc 1 1040 0 discriminator 2
 	ldrh	r2, [r0]
 	movw	r1, #65535
 	cmp	r2, r1
-	beq	.L2157
+	beq	.L2153
+.LVL2377:
+.LBB494:
+	.loc 1 1044 0 is_stmt 1
 	ldr	r1, [r0, #12]
+	.loc 1 1046 0
 	subs	r3, r3, #1
+	.loc 1 1048 0
 	mov	r0, r5
+.LVL2378:
+	.loc 1 1044 0
 	ldrh	r2, [r1, r2, lsl #1]
+.LVL2379:
+	.loc 1 1046 0
 	orr	r3, r3, r2, lsl #10
+	.loc 1 1048 0
 	movs	r2, #1
 	mov	r1, r2
+	.loc 1 1046 0
 	str	r3, [r5, #4]
+.LVL2380:
+	.loc 1 1048 0
 	bl	FlashReadPages
+.LVL2381:
+	.loc 1 1050 0
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L2157
+	beq	.L2153
+	.loc 1 1050 0 is_stmt 0 discriminator 1
 	ldr	r3, [r4, #24]
 	ldrh	r1, [r8, #8]
 	ldr	r2, [r3, r1, lsl #2]
 	ldr	r3, [r5, #4]
 	cmp	r2, r3
-	bne	.L2157
+	bne	.L2153
+	.loc 1 1053 0 is_stmt 1
 	ldr	r2, [r5, #8]
-.L2166:
+.LVL2382:
+.L2162:
+.LBE494:
+	.loc 1 1070 0
 	mov	r0, r4
+	.loc 1 1072 0
 	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
+	.cfi_remember_state
+	.cfi_restore 14
+	.cfi_restore 10
+	.cfi_restore 8
+	.cfi_restore 7
+	.cfi_restore 6
+	.cfi_restore 5
+	.cfi_restore 4
+	.cfi_restore 3
+	.cfi_def_cfa_offset 0
+.LVL2383:
+	.loc 1 1070 0
 	b	FtlMapWritePage
-.L2157:
+.LVL2384:
+.L2153:
+	.cfi_restore_state
+	.loc 1 1027 0
 	subs	r6, r6, #1
+	.loc 1 1059 0
 	uxth	r6, r6
 	ldr	r3, [r10, r6, lsl #2]
+.LVL2385:
+	.loc 1 1060 0
 	str	r3, [r7, #4]
-	cbz	r3, .L2158
+	.loc 1 1061 0
+	cbz	r3, .L2154
+	.loc 1 1063 0
 	movs	r2, #1
-	ldr	r0, .L2167+8
+	ldr	r0, .L2163+8
 	mov	r1, r2
 	bl	FlashReadPages
-.L2159:
+.LVL2386:
+.L2155:
+	.loc 1 1070 0
 	ldr	r2, [r7, #8]
 	mov	r1, r6
-	b	.L2166
-.L2158:
-	ldr	r3, .L2167+20
+	b	.L2162
+.LVL2387:
+.L2154:
+	.loc 1 1067 0
+	ldr	r3, .L2163+20
+.LVL2388:
 	movs	r1, #255
 	ldr	r0, [r7, #8]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-	b	.L2159
-.L2153:
+.LVL2389:
+	b	.L2155
+.LVL2390:
+.L2149:
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L2168:
+.L2164:
 	.align	2
-.L2167:
-	.word	.LANCHOR75
+.L2163:
+	.word	.LANCHOR76
 	.word	.LANCHOR181
 	.word	.LANCHOR199
 	.word	.LANCHOR185
-	.word	.LANCHOR52
-	.word	.LANCHOR56
+	.word	.LANCHOR53
+	.word	.LANCHOR57
+	.cfi_endproc
+.LFE359:
 	.size	FtlMapBlkWriteDumpData, .-FtlMapBlkWriteDumpData
 	.section	.text.FtlScanSysBlk,"ax",%progbits
 	.align	1
@@ -15324,544 +25144,793 @@ FtlMapBlkWriteDumpData:
 	.fpu softvfp
 	.type	FtlScanSysBlk, %function
 FtlScanSysBlk:
-	@ args = 0, pretend = 0, frame = 32
+.LFB361:
+	.loc 1 1235 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 1 1241 0
 	movs	r4, #0
-	ldr	r5, .L2251
-	sub	sp, sp, #32
+	.loc 1 1243 0
+	ldr	r5, .L2248
+	.loc 1 1235 0
+	sub	sp, sp, #24
+	.cfi_def_cfa_offset 56
+	.loc 1 1243 0
 	mov	r1, r4
-	ldr	r3, .L2251+4
+	ldr	r3, .L2248+4
 	ldr	r2, [r5]
-	ldr	r6, .L2251+8
-	strh	r4, [r3]	@ movhi
-	ldr	r3, .L2251+12
+	.loc 1 1242 0
+	ldr	r7, .L2248+8
+	.loc 1 1241 0
+	ldr	r6, .L2248+12
+	.loc 1 1243 0
+	ldr	r0, [r3]
 	lsls	r2, r2, #2
+	.loc 1 1242 0
+	strh	r4, [r7]	@ movhi
+	.loc 1 1241 0
 	strh	r4, [r6]	@ movhi
-	ldr	r7, .L2251+16
-	ldr	r0, [r3]
+	.loc 1 1243 0
 	bl	ftl_memset
+.LVL2391:
+	.loc 1 1244 0
 	ldr	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L2251+20
+	ldr	r5, .L2248+16
+	.loc 1 1245 0
+	ldr	r8, .L2248+88
+	.loc 1 1244 0
 	lsls	r2, r2, #1
-	ldr	r0, [r3]
+	ldr	r0, [r5]
 	bl	ftl_memset
-	ldrh	r2, [r7]
+.LVL2392:
+	.loc 1 1245 0
+	ldrh	r2, [r8]
 	mov	r1, r4
-	ldr	r3, .L2251+24
+	ldr	r3, .L2248+20
 	lsls	r2, r2, #2
 	ldr	r0, [r3]
 	bl	ftl_memset
-	ldrh	r2, [r7]
+.LVL2393:
+	.loc 1 1246 0
+	ldrh	r2, [r8]
 	mov	r1, r4
-	ldr	r3, .L2251+28
+	ldr	r3, .L2248+24
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
+.LVL2394:
+	.loc 1 1247 0
 	movs	r2, #12
 	movs	r1, #255
-	ldr	r0, .L2251+32
+	ldr	r0, .L2248+28
 	bl	ftl_memset
-	ldr	r3, .L2251+36
-	str	r6, [sp, #12]
-	str	r5, [sp, #16]
+.LVL2395:
+	.loc 1 1249 0
+	ldr	r3, .L2248+32
+	str	r7, [sp, #12]
+	str	r5, [sp, #8]
 	ldrh	r3, [r3]
-	str	r3, [sp, #4]
-.L2170:
-	ldr	r3, .L2251+40
-	ldr	r2, [sp, #4]
+	str	r3, [sp]
+.LVL2396:
+.L2166:
+	.loc 1 1249 0 is_stmt 0 discriminator 1
+	ldr	r3, .L2248+36
+	ldr	r2, [sp]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bls	.L2212
-	ldr	r3, .L2251+44
-	movs	r5, #0
-	ldr	r1, .L2251+48
-	mov	fp, r5
-	movs	r7, #36
-	ldrh	r8, [r3]
-	ldr	r3, .L2251+52
+	bls	.L2208
+	.loc 1 1253 0 is_stmt 1 discriminator 1
+	ldr	r3, .L2248+40
+	.loc 1 1260 0 discriminator 1
+	movs	r4, #0
+	ldr	r1, .L2248+44
+	mov	r7, r4
+	.loc 1 1258 0 discriminator 1
+	mov	r8, #36
+	.loc 1 1253 0 discriminator 1
+	ldrh	fp, [r3]
+	.loc 1 1258 0 discriminator 1
+	ldr	r3, .L2248+48
+	.loc 1 1260 0 discriminator 1
 	ldr	r2, [r1]
-	ldr	r1, .L2251+56
-	ldr	r6, [r3]
-	ldr	r3, .L2251+60
-	str	r2, [sp, #8]
+	ldr	r1, .L2248+52
+	.loc 1 1258 0 discriminator 1
+	ldr	r5, [r3]
+	.loc 1 1259 0 discriminator 1
+	ldr	r3, .L2248+56
+	.loc 1 1260 0 discriminator 1
 	ldrh	r10, [r1]
+	.loc 1 1259 0 discriminator 1
 	ldr	r3, [r3]
-	ldr	r2, .L2251+64
-	b	.L2213
-.L2172:
-	ldrb	r0, [r2, r5]	@ zero_extendqisi2
-	ldr	r1, [sp, #4]
-	str	r3, [sp, #28]
-	str	r2, [sp, #24]
+	b	.L2209
+.LVL2397:
+.L2168:
+	str	r3, [sp, #16]
+	.loc 1 1255 0
+	ldr	r3, .L2248+60
+	ldr	r1, [sp]
+	str	r2, [sp, #20]
+	ldrb	r0, [r3, r4]	@ zero_extendqisi2
 	bl	V2P_block
-	str	r0, [sp, #20]
+.LVL2398:
+	str	r0, [sp, #4]
+.LVL2399:
+	.loc 1 1256 0
 	bl	FtlBbmIsBadBlock
-	ldr	r2, [sp, #24]
-	ldr	r3, [sp, #28]
-	cbnz	r0, .L2171
-	ldr	r1, [sp, #20]
-	mla	r0, r7, fp, r6
-	ldr	r4, [sp, #8]
+.LVL2400:
+	ldr	r3, [sp, #16]
+	ldr	r2, [sp, #20]
+	cbnz	r0, .L2167
+	.loc 1 1258 0
+	ldr	r1, [sp, #4]
+	mla	r0, r8, r7, r5
 	lsls	r1, r1, #10
+	.loc 1 1259 0
 	str	r3, [r0, #8]
+	.loc 1 1258 0
 	str	r1, [r0, #4]
-	mul	r1, r10, fp
+	.loc 1 1260 0
+	mul	r1, r10, r7
+	.loc 1 1261 0
+	adds	r7, r7, #1
+.LVL2401:
+	uxth	r7, r7
+.LVL2402:
+	.loc 1 1260 0
 	bic	r1, r1, #3
-	add	r1, r1, r4
+	add	r1, r1, r2
 	str	r1, [r0, #12]
-	add	r1, fp, #1
-	uxth	fp, r1
-.L2171:
-	adds	r5, r5, #1
-.L2213:
-	uxth	r1, r5
-	cmp	r8, r1
-	bhi	.L2172
-	cmp	fp, #0
-	bne	.L2173
-.L2211:
-	ldr	r3, [sp, #4]
+.L2167:
+.LVL2403:
+	adds	r4, r4, #1
+.LVL2404:
+.L2209:
+	.loc 1 1253 0 discriminator 1
+	uxth	r1, r4
+	cmp	fp, r1
+	bhi	.L2168
+	.loc 1 1264 0
+	cbnz	r7, .L2169
+.LVL2405:
+.L2207:
+	.loc 1 1249 0
+	ldr	r3, [sp]
 	adds	r3, r3, #1
 	uxth	r3, r3
-	str	r3, [sp, #4]
-	b	.L2170
-.L2173:
-	movs	r7, #0
+	str	r3, [sp]
+.LVL2406:
+	b	.L2166
+.LVL2407:
+.L2169:
+	.loc 1 1267 0
 	movs	r2, #1
-	mov	r1, fp
-	mov	r0, r6
+	mov	r1, r7
+	mov	r0, r5
 	bl	FlashReadPages
-.L2174:
-	uxth	r3, r7
-	cmp	fp, r3
-	bls	.L2211
-	ldr	r3, .L2251+52
+.LVL2408:
+	.loc 1 1268 0
+	movs	r3, #0
+.LVL2409:
+.L2246:
+	str	r3, [sp, #4]
+.LVL2410:
+	.loc 1 1268 0 is_stmt 0 discriminator 2
+	ldrh	r3, [sp, #4]
+	cmp	r7, r3
+	bls	.L2207
+	ldr	r3, [sp, #4]
 	mov	r8, #36
-	mul	r8, r8, r7
-	ldr	r3, [r3]
+	.loc 1 1269 0 is_stmt 1
+	ldr	fp, .L2248+48
+	mul	r8, r8, r3
+	ldr	r3, [fp]
 	add	r2, r3, r8
+	.loc 1 1272 0
 	ldr	r3, [r3, r8]
-	ldr	r5, [r2, #4]
-	ldr	r6, [r2, #12]
+	.loc 1 1269 0
+	ldr	r4, [r2, #4]
+	.loc 1 1270 0
+	ldr	r5, [r2, #12]
+	.loc 1 1272 0
 	adds	r3, r3, #1
-	ubfx	r5, r5, #10, #16
-	bne	.L2177
+	.loc 1 1269 0
+	ubfx	r4, r4, #10, #16
+.LVL2411:
+	.loc 1 1272 0
+	bne	.L2173
 	mov	r10, #16
-.L2179:
-	ldr	r3, .L2251+52
-	movs	r2, #1
-	mov	r1, r2
+	.loc 1 1274 0
+	mov	r3, fp
+.L2175:
+.LVL2412:
 	ldr	r0, [r3]
+	str	r3, [sp, #16]
 	add	r0, r0, r8
-	ldr	r3, [r0, #4]
-	adds	r3, r3, #1
-	str	r3, [r0, #4]
+	ldr	r2, [r0, #4]
+	adds	r2, r2, #1
+	str	r2, [r0, #4]
+	.loc 1 1275 0
+	movs	r2, #1
+	mov	r1, r2
 	bl	FlashReadPages
-	ldrh	r2, [r6]
-	movw	r3, #65535
-	cmp	r2, r3
-	ldr	r3, .L2251+52
-	ldr	r3, [r3]
-	bne	.L2176
+.LVL2413:
+	.loc 1 1276 0
+	ldrh	r1, [r5]
+	movw	r2, #65535
+	ldr	r3, [sp, #16]
+	cmp	r1, r2
+	bne	.L2172
+	.loc 1 1277 0
+	ldr	r3, [fp]
 	mov	r2, #-1
 	str	r2, [r3, r8]
-	ldr	r3, .L2251+52
-	ldr	r3, [r3]
+	.loc 1 1285 0
+	ldr	r3, [fp]
 	ldr	r3, [r3, r8]
 	cmp	r3, r2
-	beq	.L2178
-.L2177:
-	ldr	r3, .L2251+68
+	beq	.L2174
+.LVL2414:
+.L2173:
+	.loc 1 1287 0
+	ldr	r3, .L2248+64
 	ldr	r2, [r3]
-	ldr	r3, [r6, #4]
+	ldr	r3, [r5, #4]
 	adds	r1, r2, #1
-	beq	.L2180
+	beq	.L2176
+	.loc 1 1287 0 is_stmt 0 discriminator 1
 	cmp	r2, r3
-	bhi	.L2181
-.L2180:
+	bhi	.L2177
+.L2176:
+	.loc 1 1289 0 is_stmt 1
 	adds	r2, r3, #1
+	.loc 1 1292 0
 	ittt	ne
-	ldrne	r1, .L2251+68
+	ldrne	r1, .L2248+64
 	addne	r2, r3, #1
 	strne	r2, [r1]
-.L2181:
-	ldrh	r2, [r6]
+.L2177:
+	.loc 1 1297 0
+	ldrh	r2, [r5]
 	movw	r1, #61604
 	cmp	r2, r1
-	beq	.L2183
-	bhi	.L2184
+	beq	.L2179
+	bhi	.L2180
 	movw	r3, #61574
 	cmp	r2, r3
-	beq	.L2185
-.L2182:
-	adds	r7, r7, #1
-	b	.L2174
-.L2176:
-	ldr	r3, [r3, r8]
+	beq	.L2181
+.LVL2415:
+.L2178:
+	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
-	bne	.L2177
+	b	.L2246
+.LVL2416:
+.L2172:
+	.loc 1 1279 0
+	ldr	r2, [r3]
+	ldr	r2, [r2, r8]
+	adds	r2, r2, #1
+	bne	.L2173
+.LVL2417:
 	add	r10, r10, #-1
+.LVL2418:
 	uxth	r10, r10
+	.loc 1 1273 0 discriminator 2
 	cmp	r10, #0
-	bne	.L2179
-.L2178:
-	ldr	r3, .L2251+72
+	bne	.L2175
+.L2174:
+	.loc 1 1439 0
+	ldr	r3, .L2248+68
 	ldrb	r1, [r3]	@ zero_extendqisi2
-	cbnz	r1, .L2250
-.L2209:
-	mov	r0, r5
+	cbnz	r1, .L2247
+.L2205:
+	.loc 1 1442 0
+	mov	r0, r4
 	bl	FtlFreeSysBlkQueueIn
-	b	.L2182
-.L2184:
+.LVL2419:
+	b	.L2178
+.L2180:
+	.loc 1 1297 0
 	movw	r3, #61634
 	cmp	r2, r3
-	beq	.L2186
+	beq	.L2182
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L2182
-.L2250:
+	bne	.L2178
+.L2247:
+	.loc 1 1440 0
 	movs	r1, #0
-	b	.L2209
-.L2186:
-	ldr	r3, .L2251+8
-	ldrh	r2, [r3]
-	ldr	r3, .L2251
-	ldr	r3, [r3]
+	b	.L2205
+.L2182:
+	.loc 1 1302 0
+	ldr	r8, .L2248
+	ldrh	r2, [r6]
+	ldr	r3, [r8]
 	cmp	r2, r3
-	bls	.L2188
-	ldr	r1, .L2251+76
-	movw	r2, #1269
-	ldr	r0, .L2251+80
+	bls	.L2184
+	.loc 1 1302 0 is_stmt 0 discriminator 1
+	ldr	r1, .L2248+72
+	movw	r2, #1302
+	ldr	r0, .L2248+76
 	bl	printf
-	ldr	r1, .L2251+84
-	ldr	r0, .L2251+88
+.LVL2420:
+	ldr	r1, .L2248+80
+	ldr	r0, .L2248+84
 	bl	printf
-.L2188:
-	ldr	r3, [sp, #16]
-	ldr	r2, [sp, #12]
-	ldr	r1, [r3]
-	ldrh	r0, [r2]
-	ldr	r2, .L2251+12
-	uxth	r10, r1
-	ldr	ip, [r2]
-	add	r3, r10, #-1
-	sub	r10, r10, r0
-	add	r10, r10, #-1
+.LVL2421:
+.L2184:
+	.loc 1 1303 0 is_stmt 1
+	ldr	r1, [r8]
+	ldrh	r0, [r6]
+	.loc 1 1305 0
+	ldr	r2, .L2248+4
+	.loc 1 1303 0
+	uxth	ip, r1
+	.loc 1 1305 0
+	ldr	r10, [r2]
+	.loc 1 1303 0
+	add	r3, ip, #-1
+	sub	ip, ip, r0
+	add	ip, ip, #-1
 	sxth	r3, r3
-	sxth	r10, r10
-.L2189:
-	cmp	r3, r10
-	bgt	.L2195
+.LVL2422:
+	sxth	ip, ip
+.L2185:
+	.loc 1 1303 0 is_stmt 0 discriminator 1
+	cmp	r3, ip
+	bgt	.L2191
+	.loc 1 1329 0 is_stmt 1
 	cmp	r3, #0
-	bge	.L2228
-	b	.L2182
-.L2195:
-	ldr	r2, [ip, r3, lsl #2]
-	add	r8, ip, r3, lsl #2
-	ldr	r4, [r6, #4]
-	cmp	r4, r2
-	bls	.L2190
-	ldr	r2, [ip]
-	cbnz	r2, .L2191
+	bge	.L2224
+	b	.L2178
+.L2191:
+	.loc 1 1305 0
+	ldr	r2, [r5, #4]
+	lsl	r8, r3, #2
+	mov	lr, r2
+	ldr	r2, [r10, r3, lsl #2]
+	cmp	lr, r2
+	bls	.L2186
+	.loc 1 1307 0
+	ldr	r2, [r10]
+	cbnz	r2, .L2187
+	.loc 1 1307 0 is_stmt 0 discriminator 1
 	cmp	r1, r0
-	ittt	ne
-	ldrne	r2, .L2251+8
+	.loc 1 1315 0 is_stmt 1 discriminator 1
+	itt	ne
 	addne	r0, r0, #1
-	strhne	r0, [r2]	@ movhi
-.L2191:
-	ldr	r2, .L2251+20
+	strhne	r0, [r6]	@ movhi
+.L2187:
+	ldr	ip, .L2248+4
+	.loc 1 1318 0 discriminator 1
 	uxth	r10, r3
-	ldr	r0, [r2]
+	ldr	r0, .L2248+16
 	movs	r2, #0
-.L2192:
+.L2188:
 	uxth	lr, r2
 	sxth	r1, r2
+.LVL2423:
 	cmp	r10, lr
-	bhi	.L2193
-	ldr	r2, [r6, #4]
+	bhi	.L2189
+	.loc 1 1323 0
+	ldr	r2, [r5, #4]
+	.loc 1 1329 0
 	cmp	r3, #0
-	str	r2, [r8]
-	strh	r5, [r0, r3, lsl #1]	@ movhi
-	blt	.L2182
-	ldr	r2, .L2251+8
-	ldrh	r0, [r2]
-	ldr	r2, .L2251
+	.loc 1 1323 0
+	ldr	r1, [ip]
+.LVL2424:
+	str	r2, [r1, r8]
+	.loc 1 1324 0
+	ldr	r2, [r0]
+	strh	r4, [r2, r3, lsl #1]	@ movhi
+	.loc 1 1329 0
+	blt	.L2178
+	.loc 1 1339 0
+	ldr	r2, .L2248
+	ldrh	r0, [r6]
 	ldr	r2, [r2]
 	subs	r2, r2, r0
 	subs	r2, r2, #1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L2182
-.L2228:
-	ldr	r2, .L2251+8
+	bgt	.L2178
+.LVL2425:
+.L2224:
+	.loc 1 1342 0
+	ldr	r2, .L2248+4
+	.loc 1 1341 0
 	adds	r0, r0, #1
-	strh	r0, [r2]	@ movhi
-	ldr	r2, [r6, #4]
-	str	r2, [ip, r3, lsl #2]
-	ldr	r2, .L2251+20
-.L2248:
+	.loc 1 1342 0
+	ldr	r1, [r5, #4]
+	.loc 1 1341 0
+	strh	r0, [r6]	@ movhi
+	.loc 1 1342 0
 	ldr	r2, [r2]
-	strh	r5, [r2, r3, lsl #1]	@ movhi
-	b	.L2182
-.L2193:
-	add	lr, ip, r1, lsl #2
+	str	r1, [r2, r3, lsl #2]
+	.loc 1 1343 0
+	ldr	r2, .L2248+16
+.L2244:
+	.loc 1 1393 0
+	ldr	r2, [r2]
+	strh	r4, [r2, r3, lsl #1]	@ movhi
+.LVL2426:
+	b	.L2178
+.LVL2427:
+.L2189:
+	.loc 1 1320 0 discriminator 3
+	ldr	lr, [ip]
 	adds	r2, r2, #1
-	ldr	r4, [lr, #4]
-	add	lr, r0, r1, lsl #1
-	ldrh	lr, [lr, #2]
-	str	r4, [ip, r1, lsl #2]
-	strh	lr, [r0, r1, lsl #1]	@ movhi
-	b	.L2192
-.L2190:
+	add	fp, lr, r1, lsl #2
+	ldr	fp, [fp, #4]
+	str	fp, [lr, r1, lsl #2]
+	.loc 1 1321 0 discriminator 3
+	ldr	lr, [r0]
+	add	fp, lr, r1, lsl #1
+	ldrh	fp, [fp, #2]
+	strh	fp, [lr, r1, lsl #1]	@ movhi
+.LVL2428:
+	b	.L2188
+.L2186:
 	subs	r3, r3, #1
+.LVL2429:
 	sxth	r3, r3
-	b	.L2189
-.L2252:
+.LVL2430:
+	b	.L2185
+.L2249:
 	.align	2
-.L2251:
-	.word	.LANCHOR63
-	.word	.LANCHOR69
-	.word	.LANCHOR125
+.L2248:
+	.word	.LANCHOR64
 	.word	.LANCHOR127
-	.word	.LANCHOR60
+	.word	.LANCHOR70
+	.word	.LANCHOR125
 	.word	.LANCHOR126
 	.word	.LANCHOR190
-	.word	.LANCHOR70
+	.word	.LANCHOR71
 	.word	.LANCHOR206
-	.word	.LANCHOR38
 	.word	.LANCHOR39
-	.word	.LANCHOR36
+	.word	.LANCHOR40
+	.word	.LANCHOR37
 	.word	.LANCHOR105
-	.word	.LANCHOR178
-	.word	.LANCHOR57
+	.word	.LANCHOR177
+	.word	.LANCHOR58
 	.word	.LANCHOR104
-	.word	.LANCHOR45
-	.word	.LANCHOR157
+	.word	.LANCHOR46
+	.word	.LANCHOR156
 	.word	.LANCHOR8
 	.word	.LANCHOR224
-	.word	.LC4
-	.word	.LC5
 	.word	.LC6
-.L2185:
-	ldr	r8, .L2253+20
-	ldr	r10, .L2253+28
-	ldrh	r2, [r8]
-	ldrh	r3, [r10]
+	.word	.LC7
+	.word	.LC8
+	.word	.LANCHOR61
+.LVL2431:
+.L2181:
+	.loc 1 1349 0
+	ldr	r3, [sp, #12]
+	ldr	r8, .L2250+28
+	ldrh	r2, [r3]
+	ldrh	r3, [r8]
 	cmp	r2, r3
-	bls	.L2198
-	ldr	r1, .L2253
-	movw	r2, #1316
-	ldr	r0, .L2253+4
+	bls	.L2194
+	.loc 1 1349 0 is_stmt 0 discriminator 1
+	ldr	r1, .L2250
+	movw	r2, #1349
+	ldr	r0, .L2250+4
 	bl	printf
-	ldr	r1, .L2253+8
-	ldr	r0, .L2253+12
+.LVL2432:
+	ldr	r1, .L2250+8
+	ldr	r0, .L2250+12
 	bl	printf
-.L2198:
-	ldr	r2, .L2253+16
-	ldrh	lr, [r10]
-	ldrh	ip, [r8]
-	ldr	r0, [r2]
-	add	r10, lr, #-1
-	sxth	r3, r10
-	sub	r10, r10, ip
-.L2199:
-	cmp	r3, r10
-	ble	.L2204
-	ldr	r1, [r6, #4]
-	add	r8, r0, r3, lsl #2
-	ldr	r2, [r0, r3, lsl #2]
-	cmp	r1, r2
-	bls	.L2200
-	ldr	r2, [r0]
-	cbnz	r2, .L2201
-	cmp	lr, ip
+.LVL2433:
+.L2194:
+	.loc 1 1350 0 is_stmt 1
+	ldr	r2, .L2250+16
+	ldrh	lr, [r8]
+	ldrh	r0, [r2]
+	.loc 1 1352 0
+	ldr	r2, .L2250+20
+	.loc 1 1350 0
+	add	ip, lr, #-1
+	sxth	r3, ip
+.LVL2434:
+	sub	ip, ip, r0
+	.loc 1 1352 0
+	ldr	r10, [r2]
+.L2195:
+	.loc 1 1350 0 discriminator 1
+	cmp	r3, ip
+	ble	.L2200
+	.loc 1 1352 0
+	ldr	r2, [r5, #4]
+	lsl	r8, r3, #2
+	ldr	r1, [r10, r3, lsl #2]
+	cmp	r2, r1
+	bls	.L2196
+	.loc 1 1354 0
+	ldr	r2, [r10]
+	cbnz	r2, .L2197
+	.loc 1 1354 0 is_stmt 0 discriminator 1
+	cmp	lr, r0
+	.loc 1 1365 0 is_stmt 1 discriminator 1
 	ittt	ne
-	ldrne	r2, .L2253+20
-	addne	ip, ip, #1
-	strhne	ip, [r2]	@ movhi
-.L2201:
-	ldr	r2, .L2253+24
+	ldrne	r2, .L2250+16
+	addne	r0, r0, #1
+	strhne	r0, [r2]	@ movhi
+.L2197:
+	ldr	ip, .L2250+20
+	.loc 1 1367 0 discriminator 1
 	uxth	r10, r3
-	ldr	ip, [r2]
+	ldr	r0, .L2250+24
 	movs	r2, #0
-.L2202:
+.L2198:
 	uxth	lr, r2
 	sxth	r1, r2
+.LVL2435:
 	cmp	r10, lr
-	bhi	.L2203
-	ldr	r2, [r6, #4]
-	str	r2, [r8]
-	strh	r5, [ip, r3, lsl #1]	@ movhi
-.L2204:
+	bhi	.L2199
+	.loc 1 1372 0
+	ldr	r2, [r5, #4]
+	ldr	r1, [ip]
+.LVL2436:
+	str	r2, [r1, r8]
+	.loc 1 1373 0
+	ldr	r2, [r0]
+	strh	r4, [r2, r3, lsl #1]	@ movhi
+.LVL2437:
+.L2200:
+	.loc 1 1378 0
 	cmp	r3, #0
-	blt	.L2182
-	ldr	r2, .L2253+28
-	ldr	ip, .L2253+20
+	blt	.L2178
+	.loc 1 1389 0
+	ldr	r2, .L2250+28
+	ldr	r0, .L2250+16
 	ldrh	r2, [r2]
-	ldrh	r1, [ip]
+	ldrh	r1, [r0]
 	subs	r2, r2, #1
 	subs	r2, r2, r1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L2182
-	ldr	r2, [r6, #4]
+	bgt	.L2178
+	.loc 1 1392 0
+	ldr	r2, .L2250+20
+	.loc 1 1391 0
 	adds	r1, r1, #1
-	strh	r1, [ip]	@ movhi
-	str	r2, [r0, r3, lsl #2]
-	ldr	r2, .L2253+24
-	b	.L2248
-.L2203:
-	add	lr, r0, r1, lsl #2
+	strh	r1, [r0]	@ movhi
+	.loc 1 1392 0
+	ldr	r1, [r5, #4]
+	ldr	r2, [r2]
+	str	r1, [r2, r3, lsl #2]
+	.loc 1 1393 0
+	ldr	r2, .L2250+24
+	b	.L2244
+.LVL2438:
+.L2199:
+	.loc 1 1369 0 discriminator 3
+	ldr	lr, [ip]
 	adds	r2, r2, #1
-	ldr	r4, [lr, #4]
-	add	lr, ip, r1, lsl #1
-	ldrh	lr, [lr, #2]
-	str	r4, [r0, r1, lsl #2]
-	strh	lr, [ip, r1, lsl #1]	@ movhi
-	b	.L2202
-.L2200:
+	add	fp, lr, r1, lsl #2
+	ldr	fp, [fp, #4]
+	str	fp, [lr, r1, lsl #2]
+	.loc 1 1370 0 discriminator 3
+	ldr	lr, [r0]
+	add	fp, lr, r1, lsl #1
+	ldrh	fp, [fp, #2]
+	strh	fp, [lr, r1, lsl #1]	@ movhi
+.LVL2439:
+	b	.L2198
+.L2196:
 	subs	r3, r3, #1
+.LVL2440:
 	sxth	r3, r3
-	b	.L2199
-.L2183:
-	ldr	r8, .L2253+48
+.LVL2441:
+	b	.L2195
+.LVL2442:
+.L2179:
+	.loc 1 1400 0
+	ldr	r8, .L2250+44
 	movw	r2, #65535
 	ldrh	r1, [r8]
 	cmp	r1, r2
-	bne	.L2206
-.L2249:
-	strh	r5, [r8]	@ movhi
+	bne	.L2202
+	.loc 1 1402 0
+	strh	r4, [r8]	@ movhi
+.L2245:
+	.loc 1 1413 0
 	str	r3, [r8, #8]
-	b	.L2182
-.L2206:
+	b	.L2178
+.L2202:
+	.loc 1 1407 0
 	ldrh	r0, [r8, #4]
 	cmp	r0, r2
-	beq	.L2207
+	beq	.L2203
+	.loc 1 1408 0
 	movs	r1, #1
 	bl	FtlFreeSysBlkQueueIn
-.L2207:
-	ldr	r3, [r6, #4]
+.LVL2443:
+.L2203:
+	.loc 1 1409 0
 	ldr	r2, [r8, #8]
+	ldr	r3, [r5, #4]
 	cmp	r2, r3
-	bcs	.L2208
-	ldrh	r2, [r8]
-	strh	r2, [r8, #4]	@ movhi
-	b	.L2249
+	bcs	.L2204
+	.loc 1 1411 0
+	ldrh	r3, [r8]
+	.loc 1 1412 0
+	strh	r4, [r8]	@ movhi
+	.loc 1 1411 0
+	strh	r3, [r8, #4]	@ movhi
+	.loc 1 1413 0
+	ldr	r3, [r5, #4]
+	b	.L2245
+.L2204:
+	.loc 1 1417 0
+	strh	r4, [r8, #4]	@ movhi
+	b	.L2178
+.LVL2444:
 .L2208:
-	strh	r5, [r8, #4]	@ movhi
-	b	.L2182
-.L2212:
-	ldr	r3, .L2253+32
+	.loc 1 1447 0
+	ldr	r3, .L2250+32
 	ldr	r2, [r3]
 	ldrh	r3, [r2]
-	cbz	r3, .L2214
-.L2217:
-	ldr	r3, .L2253+24
-	ldr	r4, [r3]
-	ldrh	r2, [r4]
+	cbz	r3, .L2210
+.L2213:
+	.loc 1 1465 0
+	ldr	r1, .L2250+24
+	ldr	r0, [r1]
+	ldrh	r2, [r0]
 	cmp	r2, #0
-	beq	.L2215
-.L2216:
-	ldr	r3, .L2253+36
-	ldrh	r2, [r3]
-	ldr	r3, .L2253+40
+	beq	.L2211
+.L2212:
+	.loc 1 1483 0
+	ldr	r3, .L2250+36
+	ldrh	r2, [r6]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bls	.L2247
-	ldr	r1, .L2253
-	movw	r2, #1450
-	ldr	r0, .L2253+4
+	bls	.L2243
+	.loc 1 1483 0 is_stmt 0 discriminator 1
+	ldr	r1, .L2250
+	movw	r2, #1483
+	ldr	r0, .L2250+4
 	bl	printf
-	ldr	r1, .L2253+8
-	ldr	r0, .L2253+12
+.LVL2445:
+	ldr	r1, .L2250+8
+	ldr	r0, .L2250+12
 	bl	printf
-.L2247:
+.LVL2446:
+.L2243:
+	.loc 1 1485 0 is_stmt 1
 	movs	r0, #0
-	add	sp, sp, #32
+	add	sp, sp, #24
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+.LVL2447:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2214:
-	ldr	r1, .L2253+36
-	ldrh	r1, [r1]
+.LVL2448:
+.L2210:
+	.cfi_restore_state
+	.loc 1 1447 0 discriminator 1
+	ldrh	r1, [r6]
 	cmp	r1, #0
-	beq	.L2217
-	ldr	r5, .L2253+40
+	beq	.L2213
+	.loc 1 1449 0 discriminator 1
+	ldr	r5, .L2250+36
 	ldr	r0, [r5]
-.L2218:
-	sxth	r1, r3
-	cmp	r1, r0
-	bcs	.L2217
-	ldrh	r4, [r2, r1, lsl #1]
+.L2214:
+	sxth	r4, r3
+.LVL2449:
+	cmp	r4, r0
+	bcs	.L2213
+	.loc 1 1451 0
+	ldrh	r1, [r2, r4, lsl #1]
 	adds	r3, r3, #1
-	cmp	r4, #0
-	beq	.L2218
-	ldr	r3, .L2253+44
-	movs	r6, #0
-	ldr	r0, [r3]
-	mov	r3, r1
-.L2219:
-	ldr	r4, [r5]
-	cmp	r3, r4
-	bcs	.L2217
-	ldrh	r7, [r2, r3, lsl #1]
-	subs	r4, r3, r1
-	strh	r7, [r2, r4, lsl #1]	@ movhi
-	ldr	r7, [r0, r3, lsl #2]
-	str	r7, [r0, r4, lsl #2]
-	strh	r6, [r2, r3, lsl #1]	@ movhi
+	cmp	r1, #0
+	beq	.L2214
+	.loc 1 1456 0 discriminator 1
+	ldr	r7, .L2250+40
+	mov	r3, r4
+	.loc 1 1457 0 discriminator 1
+	mov	ip, #0
+.L2215:
+.LVL2450:
+	.loc 1 1453 0 discriminator 1
+	ldr	r2, [r5]
+	cmp	r3, r2
+	bcs	.L2213
+	.loc 1 1455 0 discriminator 3
+	ldr	r2, [sp, #8]
+	subs	r1, r3, r4
+	ldr	r2, [r2]
+	ldrh	r0, [r2, r3, lsl #1]
+	strh	r0, [r2, r1, lsl #1]	@ movhi
+	.loc 1 1456 0 discriminator 3
+	ldr	r2, [r7]
+	ldr	r0, [r2, r3, lsl #2]
+	str	r0, [r2, r1, lsl #2]
+	.loc 1 1457 0 discriminator 3
+	ldr	r2, [sp, #8]
+	ldr	r2, [r2]
+	strh	ip, [r2, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
+.LVL2451:
 	sxth	r3, r3
-	b	.L2219
-.L2215:
-	ldr	r3, .L2253+20
+.LVL2452:
+	b	.L2215
+.LVL2453:
+.L2211:
+	.loc 1 1465 0 discriminator 1
+	ldr	r3, .L2250+16
 	ldrh	r3, [r3]
 	cmp	r3, #0
-	beq	.L2216
-	ldr	r5, .L2253+28
-	ldrh	r1, [r5]
-.L2224:
+	beq	.L2212
+	.loc 1 1467 0 discriminator 1
+	ldr	r4, .L2250+28
+	ldrh	r5, [r4]
+.L2220:
 	sxth	r3, r2
-	cmp	r3, r1
-	mov	r6, r3
-	bge	.L2216
-	ldrh	r0, [r4, r3, lsl #1]
+.LVL2454:
+	cmp	r3, r5
+	mov	r7, r3
+	bge	.L2212
+	.loc 1 1469 0
+	ldrh	ip, [r0, r3, lsl #1]
 	adds	r2, r2, #1
-	cmp	r0, #0
-	beq	.L2224
-	ldr	r2, .L2253+16
-	movs	r0, #0
-	ldr	r2, [r2]
-.L2225:
-	ldrh	r1, [r5]
-	cmp	r3, r1
-	bge	.L2216
-	ldrh	r7, [r4, r3, lsl #1]
-	subs	r1, r3, r6
-	strh	r7, [r4, r1, lsl #1]	@ movhi
-	ldr	r7, [r2, r3, lsl #2]
-	str	r7, [r2, r1, lsl #2]
-	adds	r1, r3, #1
-	strh	r0, [r4, r3, lsl #1]	@ movhi
-	sxth	r3, r1
-	b	.L2225
-.L2254:
+	cmp	ip, #0
+	beq	.L2220
+	.loc 1 1474 0 discriminator 1
+	ldr	ip, .L2250+20
+	.loc 1 1475 0 discriminator 1
+	mov	lr, #0
+.LVL2455:
+.L2221:
+	.loc 1 1471 0 discriminator 1
+	ldrh	r2, [r4]
+	cmp	r3, r2
+	bge	.L2212
+	.loc 1 1473 0 discriminator 3
+	ldr	r2, [r1]
+	subs	r0, r3, r7
+	ldrh	r5, [r2, r3, lsl #1]
+	strh	r5, [r2, r0, lsl #1]	@ movhi
+	.loc 1 1474 0 discriminator 3
+	ldr	r2, [ip]
+	ldr	r5, [r2, r3, lsl #2]
+	str	r5, [r2, r0, lsl #2]
+	.loc 1 1475 0 discriminator 3
+	ldr	r2, [r1]
+	strh	lr, [r2, r3, lsl #1]	@ movhi
+	adds	r3, r3, #1
+.LVL2456:
+	sxth	r3, r3
+.LVL2457:
+	b	.L2221
+.L2251:
 	.align	2
-.L2253:
+.L2250:
 	.word	.LANCHOR224
-	.word	.LC4
-	.word	.LC5
 	.word	.LC6
-	.word	.LANCHOR190
-	.word	.LANCHOR69
+	.word	.LC7
+	.word	.LC8
 	.word	.LANCHOR70
-	.word	.LANCHOR60
+	.word	.LANCHOR190
+	.word	.LANCHOR71
+	.word	.LANCHOR61
 	.word	.LANCHOR126
-	.word	.LANCHOR125
-	.word	.LANCHOR63
+	.word	.LANCHOR64
 	.word	.LANCHOR127
 	.word	.LANCHOR206
+	.cfi_endproc
+.LFE361:
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
 	.section	.text.FtlLoadSysInfo,"ax",%progbits
 	.align	1
@@ -15872,76 +25941,127 @@ FtlScanSysBlk:
 	.fpu softvfp
 	.type	FtlLoadSysInfo, %function
 FtlLoadSysInfo:
+.LFB365:
+	.loc 1 1515 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 1 1520 0
 	movs	r1, #0
-	ldr	r6, .L2280
-	ldr	r10, .L2280+156
+	.loc 1 1523 0
+	ldr	r6, .L2277
+	.loc 1 1521 0
+	ldr	r10, .L2277+156
+	.loc 1 1523 0
 	ldrh	r2, [r6]
-	ldr	r7, .L2280+4
+	ldr	r7, .L2277+4
+	.loc 1 1521 0
 	ldr	r3, [r10]
-	ldr	r4, .L2280+8
-	ldr	r5, .L2280+12
+	.loc 1 1520 0
+	ldr	r4, .L2277+8
+	.loc 1 1524 0
+	ldr	r5, .L2277+12
+	.loc 1 1523 0
 	lsls	r2, r2, #1
 	ldr	r0, [r7]
 	mov	r8, r7
+	.loc 1 1521 0
 	str	r3, [r4, #12]
+	.loc 1 1520 0
 	str	r1, [r4, #8]
+	.loc 1 1523 0
 	bl	ftl_memset
+.LVL2458:
+	.loc 1 1524 0
 	ldrh	r0, [r5]
 	movw	r3, #65535
 	cmp	r0, r3
-	bne	.L2256
-.L2265:
+	bne	.L2253
+.L2262:
+	.loc 1 1525 0
 	mov	r0, #-1
-.L2255:
+.L2252:
+	.loc 1 1623 0
 	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2256:
+.L2253:
+	.cfi_restore_state
+	.loc 1 1527 0
 	movs	r1, #1
-	ldr	fp, .L2280+160
+	.loc 1 1532 0
+	ldr	fp, .L2277+160
+	.loc 1 1527 0
 	bl	FtlGetLastWrittenPage
-	ldr	r3, .L2280+16
+.LVL2459:
+	.loc 1 1536 0
+	ldr	r3, .L2277+16
+	.loc 1 1527 0
 	sxth	r7, r0
+.LVL2460:
+	.loc 1 1528 0
 	adds	r0, r0, #1
 	strh	r0, [r5, #2]	@ movhi
-.L2258:
+.L2255:
+	.loc 1 1530 0
 	cmp	r7, #0
-	bge	.L2261
-	ldr	r1, .L2280+20
-	movw	r2, #1510
-	ldr	r0, .L2280+24
+	bge	.L2258
+	.loc 1 1543 0
+	ldr	r1, .L2277+20
+	movw	r2, #1543
+	ldr	r0, .L2277+24
 	bl	printf
-	ldr	r1, .L2280+28
-	ldr	r0, .L2280+32
+.LVL2461:
+	ldr	r1, .L2277+28
+	ldr	r0, .L2277+32
 	bl	printf
-.L2260:
-	ldr	r2, .L2280+36
+.LVL2462:
+.L2257:
+	.loc 1 1545 0
+	ldr	r2, .L2277+36
 	ldrh	r3, [r6]
 	ldrh	r2, [r2]
 	adds	r3, r3, #24
 	cmp	r2, r3, lsl #1
-	bcs	.L2263
-	ldr	r1, .L2280+20
-	mov	r2, #1512
-	ldr	r0, .L2280+24
+	bcs	.L2260
+	.loc 1 1545 0 is_stmt 0 discriminator 1
+	ldr	r1, .L2277+20
+	movw	r2, #1545
+	ldr	r0, .L2277+24
 	bl	printf
-	ldr	r1, .L2280+28
-	ldr	r0, .L2280+32
+.LVL2463:
+	ldr	r1, .L2277+28
+	ldr	r0, .L2277+32
 	bl	printf
-.L2263:
+.LVL2464:
+.L2260:
+	.loc 1 1547 0 is_stmt 1
 	movs	r2, #48
 	ldr	r1, [r4, #8]
-	ldr	r0, .L2280+40
+	ldr	r0, .L2277+40
 	bl	ftl_memcpy
+.LVL2465:
+	.loc 1 1548 0
 	ldrh	r2, [r6]
 	ldr	r1, [r4, #8]
 	ldr	r0, [r8]
 	lsls	r2, r2, #1
 	adds	r1, r1, #48
 	bl	ftl_memcpy
+.LVL2466:
+	.loc 1 1549 0
 	ldrh	r1, [r6]
 	ldr	r3, [r4, #8]
 	lsrs	r2, r1, #3
@@ -15950,240 +26070,347 @@ FtlLoadSysInfo:
 	adds	r2, r2, #4
 	bic	r1, r1, #3
 	add	r1, r1, r3
-	ldr	r3, .L2280+44
+	ldr	r3, .L2277+44
 	ldr	r0, [r3]
 	bl	ftl_memcpy
-	ldr	r3, .L2280+48
+.LVL2467:
+	.loc 1 1550 0
+	ldr	r3, .L2277+48
 	ldrh	r3, [r3]
-	cbz	r3, .L2264
+	cbz	r3, .L2261
+.LBB495:
+	.loc 1 1551 0
 	ldrh	r1, [r6]
-	ldr	r3, .L2280+52
+.LVL2468:
+	.loc 1 1552 0
+	ldr	r3, .L2277+52
 	ldrh	r2, [r3]
+	.loc 1 1551 0
 	lsrs	r3, r1, #3
 	add	r3, r3, r1, lsl #1
+	.loc 1 1552 0
 	ldr	r1, [r4, #8]
+.LVL2469:
+	.loc 1 1551 0
 	adds	r3, r3, #52
+	.loc 1 1552 0
 	lsls	r2, r2, #2
 	ubfx	r3, r3, #2, #14
 	add	r1, r1, r3, lsl #2
-	ldr	r3, .L2280+56
+	ldr	r3, .L2277+56
 	ldr	r0, [r3]
 	bl	ftl_memcpy
-.L2264:
-	ldr	r4, .L2280+40
-	ldr	r3, .L2280+16
+.LVL2470:
+.L2261:
+.LBE495:
+	.loc 1 1556 0
+	ldr	r4, .L2277+40
+	ldr	r3, .L2277+16
 	ldr	r2, [r4]
 	cmp	r2, r3
-	bne	.L2265
-	ldr	r3, .L2280+60
+	bne	.L2262
+	.loc 1 1560 0
+	ldr	r3, .L2277+60
 	ldrb	r2, [r4, #10]	@ zero_extendqisi2
+	.loc 1 1559 0
 	ldrh	r6, [r4, #8]
+	.loc 1 1560 0
 	ldrh	r3, [r3]
+	.loc 1 1559 0
 	strh	r6, [r5, #6]	@ movhi
+	.loc 1 1560 0
 	cmp	r2, r3
-	bne	.L2265
-	ldr	r3, .L2280+64
-	ldr	r2, .L2280+68
+	bne	.L2262
+	.loc 1 1563 0
+	ldr	r3, .L2277+64
+	.loc 1 1564 0
+	ldr	r2, .L2277+68
+	.loc 1 1563 0
 	str	r6, [r3]
-	ldr	r3, .L2280+72
+	.loc 1 1564 0
+	ldr	r3, .L2277+72
 	ldrh	r3, [r3]
 	muls	r3, r6, r3
 	str	r3, [r2]
-	ldr	r2, .L2280+76
+	.loc 1 1565 0
+	ldr	r2, .L2277+76
 	ldrh	r2, [r2]
 	muls	r3, r2, r3
-	ldr	r2, .L2280+80
+	ldr	r2, .L2277+80
 	str	r3, [r2]
-	ldr	r3, .L2280+84
+	.loc 1 1566 0
+	ldr	r3, .L2277+84
 	ldr	r5, [r3]
-	ldr	r3, .L2280+88
+	ldr	r3, .L2277+88
 	ldrh	r0, [r3, #6]
-	ldr	r3, .L2280+92
+	ldr	r3, .L2277+92
 	subs	r0, r5, r0
 	ldrh	r1, [r3]
 	subs	r0, r0, r6
 	bl	__aeabi_uidiv
-	ldr	r3, .L2280+96
+.LVL2471:
+	ldr	r3, .L2277+96
+	.loc 1 1572 0
 	cmp	r6, r5
+	.loc 1 1566 0
 	strh	r0, [r3]	@ movhi
-	bls	.L2266
-	ldr	r1, .L2280+20
-	movw	r2, #1539
-	ldr	r0, .L2280+24
+	.loc 1 1572 0
+	bls	.L2263
+	.loc 1 1572 0 is_stmt 0 discriminator 1
+	ldr	r1, .L2277+20
+	movw	r2, #1572
+	ldr	r0, .L2277+24
 	bl	printf
-	ldr	r1, .L2280+28
-	ldr	r0, .L2280+32
+.LVL2472:
+	ldr	r1, .L2277+28
+	ldr	r0, .L2277+32
 	bl	printf
-.L2266:
+.LVL2473:
+.L2263:
+	.loc 1 1575 0 is_stmt 1
 	ldrh	r2, [r4, #16]
-	ldr	r3, .L2280+100
+	.loc 1 1574 0
+	ldr	r3, .L2277+100
 	ldrh	ip, [r4, #14]
-	ldr	r7, .L2280+104
+	.loc 1 1579 0
+	ldr	r7, .L2277+104
+.LVL2474:
+	.loc 1 1575 0
 	lsrs	r1, r2, #6
+	.loc 1 1576 0
 	and	r2, r2, #63
 	strb	r2, [r3, #6]
+	.loc 1 1577 0
 	ldrb	r2, [r4, #11]	@ zero_extendqisi2
+	.loc 1 1575 0
 	strh	r1, [r3, #2]	@ movhi
-	ldr	r1, .L2280+108
+	.loc 1 1584 0
+	ldr	r1, .L2277+108
+	.loc 1 1577 0
 	strb	r2, [r3, #8]
+	.loc 1 1584 0
 	ldrh	r2, [r4, #18]
+	.loc 1 1574 0
 	strh	ip, [r3]	@ movhi
+	.loc 1 1579 0
 	movw	r3, #65535
 	strh	r3, [r7]	@ movhi
+	.loc 1 1580 0
 	movs	r3, #0
+	.loc 1 1584 0
 	strh	r2, [r1]	@ movhi
+	.loc 1 1585 0
 	ldrh	r2, [r4, #20]
+	.loc 1 1580 0
 	strh	r3, [r7, #2]	@ movhi
+	.loc 1 1581 0
 	strb	r3, [r7, #6]
+	.loc 1 1582 0
 	strb	r3, [r7, #8]
+	.loc 1 1585 0
 	lsrs	r5, r2, #6
+	.loc 1 1586 0
 	and	r2, r2, #63
 	strb	r2, [r1, #6]
+	.loc 1 1587 0
 	ldrb	r2, [r4, #12]	@ zero_extendqisi2
+	.loc 1 1585 0
 	strh	r5, [r1, #2]	@ movhi
+	.loc 1 1589 0
 	ldrh	r5, [r4, #22]
+	.loc 1 1587 0
 	strb	r2, [r1, #8]
-	ldr	r2, .L2280+112
+	.loc 1 1589 0
+	ldr	r2, .L2277+112
 	strh	r5, [r2]	@ movhi
+	.loc 1 1590 0
 	ldrh	r5, [r4, #24]
 	lsrs	r6, r5, #6
+	.loc 1 1591 0
 	and	r5, r5, #63
 	strb	r5, [r2, #6]
+	.loc 1 1592 0
 	ldrb	r5, [r4, #13]	@ zero_extendqisi2
+	.loc 1 1590 0
 	strh	r6, [r2, #2]	@ movhi
+	.loc 1 1599 0
 	ldr	r6, [r4, #32]
+	.loc 1 1592 0
 	strb	r5, [r2, #8]
-	ldr	r5, .L2280+116
+	.loc 1 1594 0
+	ldr	r5, .L2277+116
 	str	r3, [r5]
-	ldr	r5, .L2280+120
+	.loc 1 1595 0
+	ldr	r5, .L2277+120
 	str	r3, [r5]
-	ldr	r5, .L2280+124
+	.loc 1 1596 0
+	ldr	r5, .L2277+124
 	str	r3, [r5]
-	ldr	r5, .L2280+128
+	.loc 1 1597 0
+	ldr	r5, .L2277+128
 	str	r3, [r5]
-	ldr	r5, .L2280+132
+	.loc 1 1599 0
+	ldr	r5, .L2277+132
 	str	r6, [r5]
 	mov	r6, r1
-	ldr	r5, .L2280+136
+	.loc 1 1600 0
+	ldr	r5, .L2277+136
 	str	r3, [r5]
-	ldr	r5, .L2280+140
+	.loc 1 1601 0
+	ldr	r5, .L2277+140
 	str	r3, [r5]
-	ldr	r5, .L2280+144
+	.loc 1 1602 0
+	ldr	r5, .L2277+144
+	.loc 1 1604 0
 	ldr	lr, [r4, #40]
+	.loc 1 1602 0
 	str	r3, [r5]
-	ldr	r3, .L2280+148
+	.loc 1 1604 0
+	ldr	r3, .L2277+148
 	ldr	r5, [r3]
 	cmp	lr, r5
 	mov	r5, r2
+	.loc 1 1605 0
 	it	hi
 	strhi	lr, [r3]
-	ldr	r3, .L2280+152
+	.loc 1 1607 0
+	ldr	r3, .L2277+152
 	ldr	r2, [r4, #36]
 	ldr	r1, [r3]
 	cmp	r2, r1
+	.loc 1 1608 0
 	it	hi
 	strhi	r2, [r3]
+	.loc 1 1610 0
 	movw	r3, #65535
 	cmp	ip, r3
-	beq	.L2269
-	ldr	r0, .L2280+100
+	beq	.L2266
+	.loc 1 1611 0
+	ldr	r0, .L2277+100
 	bl	make_superblock
-.L2269:
+.LVL2475:
+.L2266:
+	.loc 1 1613 0
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2270
-	ldr	r0, .L2280+108
+	beq	.L2267
+	.loc 1 1614 0
+	ldr	r0, .L2277+108
 	bl	make_superblock
-.L2270:
+.LVL2476:
+.L2267:
+	.loc 1 1616 0
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2271
-	ldr	r0, .L2280+112
+	beq	.L2268
+	.loc 1 1617 0
+	ldr	r0, .L2277+112
 	bl	make_superblock
-.L2271:
+.LVL2477:
+.L2268:
+	.loc 1 1619 0
 	ldrh	r2, [r7]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2272
-	ldr	r0, .L2280+104
+	beq	.L2269
+	.loc 1 1620 0
+	ldr	r0, .L2277+104
 	bl	make_superblock
-.L2272:
+.LVL2478:
+.L2269:
+	.loc 1 1622 0
 	movs	r0, #0
-	b	.L2255
-.L2261:
+	b	.L2252
+.LVL2479:
+.L2258:
+	.loc 1 1531 0
 	ldrh	r2, [r5]
-	ldr	r0, .L2280+8
+	.loc 1 1533 0
+	ldr	r0, .L2277+8
 	str	r3, [sp, #4]
+	.loc 1 1531 0
 	orr	r2, r7, r2, lsl #10
 	str	r2, [r4, #4]
+	.loc 1 1532 0
 	ldr	r2, [fp]
 	str	r2, [r4, #8]
+	.loc 1 1533 0
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
+.LVL2480:
+	.loc 1 1536 0
 	ldr	r2, [r4]
 	ldr	r3, [sp, #4]
 	adds	r2, r2, #1
-	beq	.L2259
+	beq	.L2256
+	.loc 1 1537 0 discriminator 1
 	ldr	r2, [fp]
+	.loc 1 1536 0 discriminator 1
 	ldr	r2, [r2]
 	cmp	r2, r3
-	bne	.L2259
+	bne	.L2256
+	.loc 1 1538 0
 	ldr	r2, [r10]
 	ldrh	r1, [r2]
+	.loc 1 1537 0
 	movw	r2, #61604
 	cmp	r1, r2
-	beq	.L2260
-.L2259:
+	beq	.L2257
+.L2256:
 	subs	r7, r7, #1
+.LVL2481:
 	sxth	r7, r7
-	b	.L2258
-.L2281:
+.LVL2482:
+	b	.L2255
+.L2278:
 	.align	2
-.L2280:
-	.word	.LANCHOR38
-	.word	.LANCHOR82
+.L2277:
+	.word	.LANCHOR39
+	.word	.LANCHOR83
 	.word	.LANCHOR199
 	.word	.LANCHOR206
 	.word	1179929683
 	.word	.LANCHOR225
-	.word	.LC4
-	.word	.LC5
 	.word	.LC6
-	.word	.LANCHOR56
-	.word	.LANCHOR135
+	.word	.LC7
+	.word	.LC8
+	.word	.LANCHOR57
+	.word	.LANCHOR80
 	.word	.LANCHOR0
-	.word	.LANCHOR68
-	.word	.LANCHOR65
+	.word	.LANCHOR69
+	.word	.LANCHOR66
 	.word	.LANCHOR192
-	.word	.LANCHOR43
+	.word	.LANCHOR44
 	.word	.LANCHOR226
-	.word	.LANCHOR71
-	.word	.LANCHOR51
-	.word	.LANCHOR54
-	.word	.LANCHOR67
-	.word	.LANCHOR40
-	.word	.LANCHOR73
-	.word	.LANCHOR36
+	.word	.LANCHOR72
+	.word	.LANCHOR52
+	.word	.LANCHOR55
+	.word	.LANCHOR68
+	.word	.LANCHOR41
+	.word	.LANCHOR74
+	.word	.LANCHOR37
 	.word	.LANCHOR227
-	.word	.LANCHOR90
-	.word	.LANCHOR201
 	.word	.LANCHOR91
+	.word	.LANCHOR201
 	.word	.LANCHOR92
+	.word	.LANCHOR93
+	.word	.LANCHOR158
 	.word	.LANCHOR159
-	.word	.LANCHOR160
-	.word	.LANCHOR164
 	.word	.LANCHOR163
+	.word	.LANCHOR162
+	.word	.LANCHOR164
 	.word	.LANCHOR165
 	.word	.LANCHOR166
-	.word	.LANCHOR167
-	.word	.LANCHOR162
+	.word	.LANCHOR161
+	.word	.LANCHOR156
 	.word	.LANCHOR157
-	.word	.LANCHOR158
 	.word	.LANCHOR185
-	.word	.LANCHOR79
+	.word	.LANCHOR180
+	.cfi_endproc
+.LFE365:
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
 	.section	.text.FtlMapTblRecovery,"ax",%progbits
 	.align	1
@@ -16194,322 +26421,541 @@ FtlLoadSysInfo:
 	.fpu softvfp
 	.type	FtlMapTblRecovery, %function
 FtlMapTblRecovery:
-	@ args = 0, pretend = 0, frame = 24
+.LFB366:
+	.loc 1 1626 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, [r0, #24]
-	movs	r1, #0
+.LVL2483:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #32
-	ldrh	r7, [r0, #6]
-	mov	fp, r0
-	movs	r4, #0
-	str	r3, [sp, #12]
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	sub	sp, sp, #40
+	.cfi_def_cfa_offset 72
+	.loc 1 1630 0
+	ldr	r3, [r0, #24]
+	.loc 1 1626 0
+	mov	r4, r0
+	.loc 1 1637 0
+	movs	r1, #0
+	.loc 1 1643 0
+	movs	r5, #0
+	.loc 1 1633 0
+	ldrh	fp, [r0, #6]
+	.loc 1 1630 0
+	str	r3, [sp, #20]
+.LVL2484:
+	.loc 1 1631 0
 	ldr	r3, [r0, #12]
-	lsls	r2, r7, #2
-	str	r3, [sp, #8]
+.LVL2485:
+	.loc 1 1637 0
+	lsl	r2, fp, #2
+	.loc 1 1631 0
+	str	r3, [sp, #12]
+.LVL2486:
+	.loc 1 1632 0
 	ldr	r3, [r0, #16]
-	str	r3, [sp, #20]
+.LVL2487:
+	str	r3, [sp, #28]
+.LVL2488:
+	.loc 1 1634 0
 	ldrh	r3, [r0, #8]
-	ldr	r0, [sp, #12]
-	str	r3, [sp, #16]
+.LVL2489:
+	.loc 1 1637 0
+	ldr	r0, [sp, #20]
+.LVL2490:
+	.loc 1 1634 0
+	str	r3, [sp, #24]
+.LVL2491:
+	.loc 1 1637 0
 	bl	ftl_memset
-	ldr	r2, .L2322
-	ldr	r3, .L2322+4
-	str	r4, [fp, #32]
+.LVL2492:
+	.loc 1 1638 0
+	ldr	r2, .L2321
+	ldr	r3, .L2321+4
+	.loc 1 1643 0
+	str	r5, [r4, #32]
+	.loc 1 1638 0
 	ldr	r1, [r2]
-	mov	r10, r2
-	mov	r8, r3
-	str	r4, [fp, #28]
+	.loc 1 1644 0
+	str	r5, [r4, #28]
+	str	r3, [sp, #16]
+	.loc 1 1638 0
 	str	r1, [r3, #8]
-	ldr	r1, .L2322+8
-	ldr	r5, [r1]
+	.loc 1 1639 0
+	ldr	r1, .L2321+8
+	str	r2, [sp, #36]
+	ldr	r6, [r1]
+	.loc 1 1641 0
 	movw	r1, #65535
-	str	r5, [r3, #12]
-	strh	r1, [fp]	@ movhi
-	strh	r1, [fp, #2]	@ movhi
+	.loc 1 1639 0
+	str	r6, [r3, #12]
+.LVL2493:
+	.loc 1 1641 0
+	strh	r1, [r4]	@ movhi
+	.loc 1 1642 0
+	strh	r1, [r4, #2]	@ movhi
+	.loc 1 1645 0
 	movs	r1, #1
-	str	r1, [fp, #36]
-.L2283:
-	ldr	r2, [sp, #16]
-	sxth	r3, r4
-	cmp	r3, r2
-	bge	.L2301
-	ldr	r2, [sp, #16]
-	lsls	r6, r3, #1
-	subs	r2, r2, #1
-	cmp	r3, r2
-	bne	.L2284
-	ldr	r2, [sp, #8]
+	str	r1, [r4, #36]
+.LVL2494:
+.L2280:
+	.loc 1 1646 0 discriminator 1
+	ldr	r3, [sp, #24]
+	sxth	r10, r5
+.LVL2495:
+	cmp	r10, r3
+	bge	.L2298
+	.loc 1 1648 0
+	ldr	r3, [sp, #24]
+	lsl	r7, r10, #1
+	subs	r3, r3, #1
+	cmp	r10, r3
+	bne	.L2281
+	.loc 1 1650 0
+	ldr	r3, [sp, #12]
 	movs	r1, #1
-	str	r3, [sp, #16]
-	ldr	r10, .L2322+4
-	ldrh	r0, [r2, r3, lsl #1]
-	add	r6, r6, r2
+	ldrh	r0, [r3, r10, lsl #1]
+	add	r7, r7, r3
 	bl	FtlGetLastWrittenPage
-	ldr	r3, [sp, #20]
+.LVL2496:
+	.loc 1 1653 0
+	ldr	r3, [sp, #28]
+	.loc 1 1650 0
 	sxth	r8, r0
-	strh	r4, [fp]	@ movhi
-	movs	r4, #0
+.LVL2497:
+	.loc 1 1651 0
 	adds	r0, r0, #1
-	mov	r2, r3
-	ldr	r3, [sp, #16]
-	strh	r0, [fp, #2]	@ movhi
-	ldr	r3, [r2, r3, lsl #2]
-	str	r3, [fp, #28]
-.L2285:
-	sxth	r3, r4
+	.loc 1 1652 0
+	strh	r5, [r4]	@ movhi
+	.loc 1 1651 0
+	strh	r0, [r4, #2]	@ movhi
+	.loc 1 1655 0
+	movs	r5, #0
+	.loc 1 1653 0
+	ldr	r3, [r3, r10, lsl #2]
+	.loc 1 1657 0
+	ldr	r10, .L2321+4
+.LVL2498:
+	.loc 1 1653 0
+	str	r3, [r4, #28]
+.LVL2499:
+.L2282:
+	sxth	r3, r5
+.LVL2500:
+	.loc 1 1655 0 discriminator 1
 	cmp	r3, r8
-	ble	.L2288
-.L2301:
-	ldr	r3, .L2322+12
-	cmp	fp, r3
-	str	r3, [sp, #12]
-	bne	.L2290
-	ldr	r3, .L2322+16
+	ble	.L2285
+.LVL2501:
+.L2298:
+	.loc 1 1712 0
+	ldr	r7, .L2321+12
+	cmp	r4, r7
+	bne	.L2287
+	.loc 1 1712 0 is_stmt 0 discriminator 1
+	ldr	r3, .L2321+16
 	ldrh	r3, [r3]
-	cbz	r3, .L2290
-	movs	r5, #0
-.L2304:
-	ldr	r3, .L2322+20
+	cbz	r3, .L2287
+.LBB496:
+.LBB497:
+	.loc 1 1746 0 is_stmt 1 discriminator 1
+	ldr	r8, .L2321+40
+.LBE497:
+.LBE496:
+	movs	r6, #0
+.LVL2502:
+.L2301:
+.LBB500:
+	.loc 1 1717 0 discriminator 1
+	ldr	r3, .L2321+20
 	ldrh	r3, [r3]
-	cmp	r5, r3
-	bcc	.L2310
-.L2290:
-	mov	r0, fp
+	cmp	r6, r3
+	bcc	.L2309
+.LVL2503:
+.L2287:
+.LBE500:
+	.loc 1 1766 0
+	mov	r0, r4
 	bl	ftl_free_no_use_map_blk
-	ldr	r3, .L2322+24
-	ldrh	r2, [fp, #2]
+.LVL2504:
+	.loc 1 1767 0
+	ldr	r3, .L2321+24
+	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L2303
-	mov	r0, fp
+	bne	.L2300
+	.loc 1 1769 0
+	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L2303:
-	mov	r0, fp
+.LVL2505:
+.L2300:
+	.loc 1 1772 0
+	mov	r0, r4
 	bl	ftl_map_blk_gc
-	mov	r0, fp
+.LVL2506:
+	.loc 1 1774 0
+	mov	r0, r4
 	bl	ftl_map_blk_gc
+.LVL2507:
+	.loc 1 1776 0
 	movs	r0, #0
-	add	sp, sp, #32
+	add	sp, sp, #40
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2288:
-	ldrh	r2, [r6]
-	ldr	r0, .L2322+4
+.LVL2508:
+.L2285:
+	.cfi_restore_state
+	.loc 1 1657 0
+	ldrh	r2, [r7]
+	.loc 1 1658 0
+	ldr	r0, .L2321+4
+	.loc 1 1657 0
 	orr	r3, r3, r2, lsl #10
+.LVL2509:
+	.loc 1 1658 0
 	movs	r2, #1
 	mov	r1, r2
+	.loc 1 1657 0
 	str	r3, [r10, #4]
+	.loc 1 1658 0
 	bl	FlashReadPages
+.LVL2510:
+	.loc 1 1661 0
 	ldr	r3, [r10]
 	adds	r3, r3, #1
-	beq	.L2286
-	ldrh	r3, [r5, #8]
-	cmp	r7, r3
-	bls	.L2287
-	ldrh	r1, [r5]
-	ldrh	r2, [fp, #4]
+	beq	.L2283
+	.loc 1 1663 0
+	ldrh	r3, [r6, #8]
+	cmp	fp, r3
+	bls	.L2284
+	.loc 1 1663 0 is_stmt 0 discriminator 1
+	ldrh	r1, [r6]
+	ldrh	r2, [r4, #4]
 	cmp	r1, r2
-	bne	.L2287
+	bne	.L2284
+	.loc 1 1665 0 is_stmt 1
 	ldr	r2, [r10, #4]
-	ldr	r1, [sp, #12]
+	ldr	r1, [sp, #20]
 	str	r2, [r1, r3, lsl #2]
-.L2287:
-	adds	r4, r4, #1
-	b	.L2285
-.L2286:
-	ldrh	r3, [r6]
-	strh	r3, [fp, #40]	@ movhi
-	b	.L2287
 .L2284:
-	ldr	r2, [r10]
-	ldr	r0, .L2322+4
-	str	r2, [r8, #8]
-	ldr	r2, [sp, #8]
-	add	r2, r2, r6
-	ldr	r6, .L2322+24
-	str	r2, [sp, #24]
-	ldr	r2, [sp, #8]
-	ldrh	r2, [r2, r3, lsl #1]
-	ldrh	r3, [r6]
+.LVL2511:
+	adds	r5, r5, #1
+.LVL2512:
+	b	.L2282
+.LVL2513:
+.L2283:
+	.loc 1 1668 0
+	ldrh	r3, [r7]
+	strh	r3, [r4, #40]	@ movhi
+	b	.L2284
+.LVL2514:
+.L2281:
+	.loc 1 1674 0
+	ldr	r3, .L2321
+	ldr	r8, .L2321+4
+	ldr	r3, [r3]
+	.loc 1 1676 0
+	mov	r0, r8
+	.loc 1 1674 0
+	str	r3, [r8, #8]
+	.loc 1 1675 0
+	ldr	r3, [sp, #12]
+	add	r3, r3, r7
+	ldr	r7, .L2321+24
+	str	r3, [sp, #32]
+	ldr	r3, [sp, #12]
+	ldrh	r2, [r3, r10, lsl #1]
+	ldrh	r3, [r7]
 	subs	r3, r3, #1
 	orr	r3, r3, r2, lsl #10
+	.loc 1 1676 0
 	movs	r2, #1
 	mov	r1, r2
+	.loc 1 1675 0
 	str	r3, [r8, #4]
+	.loc 1 1676 0
 	bl	FlashReadPages
+.LVL2515:
+	.loc 1 1679 0
 	ldr	r3, [r8]
 	adds	r3, r3, #1
-	beq	.L2312
-	ldrh	r2, [r5]
-	ldrh	r3, [fp, #4]
+	beq	.L2311
+	.loc 1 1679 0 is_stmt 0 discriminator 1
+	ldrh	r2, [r6]
+	ldrh	r3, [r4, #4]
 	cmp	r2, r3
-	bne	.L2312
-	ldrh	r2, [r5, #8]
+	bne	.L2311
+	.loc 1 1679 0 discriminator 2
+	ldrh	r2, [r6, #8]
 	movw	r3, #64245
 	cmp	r2, r3
-	beq	.L2292
-.L2312:
-	ldr	r3, .L2322+24
-	movs	r6, #0
-.L2293:
-	ldrh	r1, [r3]
-	sxth	r2, r6
-	cmp	r2, r1
-	bge	.L2299
-	str	r3, [sp, #28]
-	ldr	r3, [sp, #24]
-	ldr	r0, .L2322+4
-	ldrh	r1, [r3]
-	orr	r2, r2, r1, lsl #10
-	str	r2, [r8, #4]
+	beq	.L2289
+.L2311:
+	.loc 1 1695 0 is_stmt 1
+	ldr	r10, .L2321+24
+.LVL2516:
+	movs	r7, #0
+	.loc 1 1697 0
+	ldr	r8, .L2321+4
+.L2290:
+.LVL2517:
+	.loc 1 1695 0 discriminator 1
+	ldrh	r2, [r10]
+	sxth	r3, r7
+	cmp	r3, r2
+	bge	.L2296
+	.loc 1 1697 0
+	ldr	r2, [sp, #32]
+	.loc 1 1698 0
+	ldr	r0, .L2321+4
+	.loc 1 1697 0
+	ldrh	r2, [r2]
+	orr	r3, r3, r2, lsl #10
+	.loc 1 1698 0
 	movs	r2, #1
 	mov	r1, r2
+	.loc 1 1697 0
+	str	r3, [r8, #4]
+	.loc 1 1698 0
 	bl	FlashReadPages
-	ldr	r2, [r8]
-	ldr	r3, [sp, #28]
-	adds	r2, r2, #1
-	beq	.L2297
-	ldrh	r2, [r5, #8]
-	cmp	r7, r2
-	bls	.L2297
-	ldrh	r0, [r5]
-	ldrh	r1, [fp, #4]
-	cmp	r0, r1
+.LVL2518:
+	.loc 1 1701 0
+	ldr	r3, [r8]
+	adds	r3, r3, #1
+	beq	.L2294
+	.loc 1 1703 0
+	ldrh	r3, [r6, #8]
+	cmp	fp, r3
+	bls	.L2294
+	.loc 1 1703 0 is_stmt 0 discriminator 1
+	ldrh	r1, [r6]
+	ldrh	r2, [r4, #4]
+	cmp	r1, r2
+	.loc 1 1705 0 is_stmt 1 discriminator 1
 	ittt	eq
-	ldreq	r1, [r8, #4]
-	ldreq	r0, [sp, #12]
-	streq	r1, [r0, r2, lsl #2]
-.L2297:
-	adds	r6, r6, #1
-	b	.L2293
-.L2292:
-	ldrh	r2, [r6]
-	movs	r1, #0
-	ldr	r6, [r10]
-	subs	r2, r2, #1
+	ldreq	r2, [r8, #4]
+	ldreq	r1, [sp, #20]
+	streq	r2, [r1, r3, lsl #2]
 .L2294:
+.LVL2519:
+	adds	r7, r7, #1
+.LVL2520:
+	b	.L2290
+.LVL2521:
+.L2289:
+	movs	r1, #0
+.L2291:
+	.loc 1 1682 0 discriminator 1
+	ldrh	r2, [r7]
 	sxth	r3, r1
+.LVL2522:
+	subs	r2, r2, #1
 	cmp	r3, r2
-	blt	.L2296
-.L2299:
-	adds	r4, r4, #1
-	b	.L2283
+	blt	.L2293
+.LVL2523:
 .L2296:
+	adds	r5, r5, #1
+.LVL2524:
+	b	.L2280
+.LVL2525:
+.L2293:
+	.loc 1 1684 0
+	ldr	r2, .L2321
 	lsls	r0, r3, #3
-	ldr	r3, [r6, r3, lsl #3]
-	adds	r1, r1, #1
+	ldr	r2, [r2]
+	ldr	r3, [r2, r3, lsl #3]
+.LVL2526:
+	.loc 1 1685 0
 	uxth	ip, r3
-	cmp	r7, ip
-	itttt	hi
-	addhi	r0, r0, r6
-	ldrhi	r3, [sp, #12]
-	ldrhi	r0, [r0, #4]
-	strhi	r0, [r3, ip, lsl #2]
-	b	.L2294
-.L2310:
-	ldr	r10, .L2322+44
-	lsls	r6, r5, #2
-	ldr	r3, [r10]
-	ldr	r3, [r3, r5, lsl #2]
-	subs	r2, r3, #1
-	adds	r2, r2, #3
-	bhi	.L2306
-	ldr	r7, .L2322+28
-	ldr	r2, [r7]
-	ldr	r2, [r2, r5, lsl #2]
-	cmp	r3, r2
-	beq	.L2306
-	ldr	r2, .L2322
-	ldr	r4, .L2322+4
+	cmp	fp, ip
+	bls	.L2292
+	.loc 1 1687 0
+	add	r2, r2, r0
+	ldr	r0, [sp, #20]
+	ldr	r2, [r2, #4]
+	str	r2, [r0, ip, lsl #2]
+.L2292:
+.LVL2527:
+	adds	r1, r1, #1
+.LVL2528:
+	b	.L2291
+.LVL2529:
+.L2309:
+.LBB501:
+	.loc 1 1718 0
+	ldr	r3, .L2321+28
+	lsls	r5, r6, #2
+	ldr	r3, [r3]
+	ldr	r2, [r3, r6, lsl #2]
+	subs	r1, r2, #1
+	adds	r1, r1, #3
+	bhi	.L2303
+	.loc 1 1719 0 discriminator 1
+	ldr	fp, .L2321+44
+	ldr	r1, [fp]
+	.loc 1 1718 0 discriminator 1
+	ldr	r1, [r1, r6, lsl #2]
+	cmp	r2, r1
+	beq	.L2303
+	.loc 1 1721 0
+	ldr	r2, [sp, #36]
+	ldr	r1, [sp, #16]
+	.loc 1 1725 0
+	ldr	r0, .L2321+4
+	.loc 1 1721 0
 	ldr	r2, [r2]
-	mov	r0, r4
-	str	r3, [r4, #4]
-	str	r2, [r4, #8]
-	ldr	r2, .L2322+8
-	ldr	r8, [r2]
+	str	r2, [r1, #8]
+	.loc 1 1722 0
+	ldr	r2, .L2321+8
+	ldr	r10, [r2]
+	.loc 1 1725 0
 	movs	r2, #1
+	.loc 1 1722 0
+	str	r10, [r1, #12]
+.LVL2530:
+	.loc 1 1724 0
+	ldr	r3, [r3, r5]
+	str	r3, [r1, #4]
+	.loc 1 1725 0
 	mov	r1, r2
-	str	r8, [r4, #12]
 	bl	FlashReadPages
-	ldr	r3, [r4]
+.LVL2531:
+	.loc 1 1727 0
+	ldr	r3, [sp, #16]
+	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L2306
-	ldr	r3, [sp, #12]
-	ldrh	r2, [r8]
-	ldrh	r3, [r3, #4]
+	beq	.L2303
+	.loc 1 1727 0 is_stmt 0 discriminator 1
+	ldrh	r2, [r10]
+	ldrh	r3, [r7, #4]
 	cmp	r2, r3
-	bne	.L2306
-	ldr	r2, [r7]
-	mov	r0, r4
-	ldr	r3, [r8, #4]
-	ldr	r2, [r2, r6]
-	str	r3, [sp, #16]
-	str	r2, [r4, #4]
-	movs	r2, #1
-	mov	r1, r2
-	bl	FlashReadPages
-	ldr	r2, [r8, #4]
-	ldr	r3, [sp, #16]
+	bne	.L2303
+	.loc 1 1733 0 is_stmt 1
+	ldr	r2, [fp]
+	ldr	r0, [sp, #16]
+	.loc 1 1728 0
+	ldr	r3, [r10, #4]
+.LVL2532:
+	.loc 1 1733 0
+	ldr	r1, [r2, r5]
+	str	r1, [r0, #4]
+	.loc 1 1734 0
+	ldr	r2, [r2, r5]
+	cbnz	r2, .L2305
+	.loc 1 1735 0
+	str	r2, [r10, #4]
+.LVL2533:
+.L2306:
+	.loc 1 1740 0
+	ldr	r2, [r10, #4]
 	cmp	r3, r2
-	bls	.L2306
-	ldr	r0, [r7]
+	bls	.L2303
+.LBB498:
+	.loc 1 1742 0
+	ldr	r10, .L2321+28
+.LVL2534:
+	ldr	fp, .L2321+44
 	ldr	r1, [r10]
+	ldr	r0, [fp]
 	str	r2, [sp]
-	ldr	r2, [r0, r6]
-	ldr	r1, [r1, r6]
-	ldr	r0, .L2322+32
+	ldr	r1, [r1, r5]
+	ldr	r2, [r0, r5]
+	ldr	r0, .L2321+32
 	bl	printf
+.LVL2535:
+	.loc 1 1744 0
 	ldr	r3, [r10]
-	ldr	r2, [r7]
-	ldr	r1, [r3, r6]
-	str	r1, [r2, r6]
+	ldr	r2, [r3, r5]
+	ldr	r3, [fp]
+	str	r2, [r3, r5]
+	.loc 1 1746 0
 	movs	r2, #0
-	ldr	r0, [r3, r6]
-	ldr	r3, .L2322+36
+	.loc 1 1745 0
+	ldr	r3, [r10]
+	ldr	r0, [r3, r5]
+	.loc 1 1746 0
+	ldrh	r3, [r8]
+	.loc 1 1745 0
 	ubfx	r0, r0, #10, #16
-	ldrh	r3, [r3]
-.L2308:
+.LVL2536:
+.L2307:
 	sxth	r1, r2
+.LVL2537:
+	.loc 1 1746 0 discriminator 1
 	cmp	r1, r3
-	blt	.L2309
-	ldr	r2, .L2322+40
+	blt	.L2308
+	.loc 1 1751 0 discriminator 1
+	ldr	r2, .L2321+36
 	ldr	r2, [r2]
 	cmp	r3, r2
-	bcs	.L2306
-	ldr	r2, [sp, #8]
+	bcs	.L2303
+	.loc 1 1752 0
+	ldr	r2, [sp, #12]
 	strh	r0, [r2, r3, lsl #1]	@ movhi
-	ldr	r3, .L2322+36
-	ldr	r2, .L2322+36
-	ldrh	r3, [r3]
+	.loc 1 1753 0
+	ldrh	r3, [r8]
 	adds	r3, r3, #1
-	strh	r3, [r2]	@ movhi
+	strh	r3, [r8]	@ movhi
+	.loc 1 1755 0
 	bl	remove_from_free_sys_Queue
+.LVL2538:
+	b	.L2303
+.LVL2539:
+.L2305:
+.LBE498:
+	.loc 1 1737 0
+	movs	r2, #1
+	ldr	r0, .L2321+4
+	mov	r1, r2
+	str	r3, [sp, #20]
+	bl	FlashReadPages
+.LVL2540:
+	ldr	r3, [sp, #20]
 	b	.L2306
-.L2309:
-	ldr	r4, [sp, #8]
+.LVL2541:
+.L2308:
+.LBB499:
+	.loc 1 1747 0
+	ldr	r5, [sp, #12]
 	adds	r2, r2, #1
-	ldrh	r1, [r4, r1, lsl #1]
+	ldrh	r1, [r5, r1, lsl #1]
+.LVL2542:
 	cmp	r1, r0
-	bne	.L2308
-.L2306:
-	adds	r5, r5, #1
-	b	.L2304
-.L2323:
-	.align	2
+	bne	.L2307
+.LVL2543:
+.L2303:
+.LBE499:
+	.loc 1 1717 0 discriminator 2
+	adds	r6, r6, #1
+.LVL2544:
+	b	.L2301
 .L2322:
-	.word	.LANCHOR79
+	.align	2
+.L2321:
+	.word	.LANCHOR180
 	.word	.LANCHOR199
 	.word	.LANCHOR185
 	.word	.LANCHOR124
-	.word	.LANCHOR68
-	.word	.LANCHOR65
-	.word	.LANCHOR52
-	.word	.LANCHOR128
-	.word	.LC42
-	.word	.LANCHOR125
-	.word	.LANCHOR63
+	.word	.LANCHOR69
+	.word	.LANCHOR66
+	.word	.LANCHOR53
 	.word	.LANCHOR192
+	.word	.LC45
+	.word	.LANCHOR64
+	.word	.LANCHOR125
+	.word	.LANCHOR128
+.LBE501:
+	.cfi_endproc
+.LFE366:
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
 	.section	.text.FtlLoadVonderInfo,"ax",%progbits
 	.align	1
@@ -16520,49 +26966,69 @@ FtlMapTblRecovery:
 	.fpu softvfp
 	.type	FtlLoadVonderInfo, %function
 FtlLoadVonderInfo:
+.LFB367:
+	.loc 1 1779 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L2325
-	ldr	r0, .L2325+4
+	.cfi_def_cfa_offset 8
+	.cfi_offset 3, -8
+	.cfi_offset 14, -4
+	.loc 1 1780 0
+	ldr	r3, .L2324
+	ldr	r0, .L2324+4
 	ldrh	r3, [r3]
 	strh	r3, [r0, #10]	@ movhi
+	.loc 1 1781 0
 	movw	r3, #61574
 	strh	r3, [r0, #4]	@ movhi
-	ldr	r3, .L2325+8
+	.loc 1 1782 0
+	ldr	r3, .L2324+8
 	ldrh	r3, [r3]
 	strh	r3, [r0, #8]	@ movhi
-	ldr	r3, .L2325+12
+	.loc 1 1783 0
+	ldr	r3, .L2324+12
 	ldrh	r3, [r3]
 	strh	r3, [r0, #6]	@ movhi
-	ldr	r3, .L2325+16
+	.loc 1 1784 0
+	ldr	r3, .L2324+16
 	ldr	r3, [r3]
 	str	r3, [r0, #12]
-	ldr	r3, .L2325+20
+	.loc 1 1785 0
+	ldr	r3, .L2324+20
 	ldr	r3, [r3]
 	str	r3, [r0, #16]
-	ldr	r3, .L2325+24
+	.loc 1 1786 0
+	ldr	r3, .L2324+24
 	ldr	r3, [r3]
 	str	r3, [r0, #20]
-	ldr	r3, .L2325+28
+	.loc 1 1787 0
+	ldr	r3, .L2324+28
 	ldr	r3, [r3]
 	str	r3, [r0, #24]
+	.loc 1 1788 0
 	movw	r3, #65535
 	strh	r3, [r0, #40]	@ movhi
+	.loc 1 1790 0
 	bl	FtlMapTblRecovery
+.LVL2545:
+	.loc 1 1793 0
 	movs	r0, #0
 	pop	{r3, pc}
-.L2326:
-	.align	2
 .L2325:
-	.word	.LANCHOR60
-	.word	.LANCHOR215
-	.word	.LANCHOR69
+	.align	2
+.L2324:
 	.word	.LANCHOR61
+	.word	.LANCHOR215
 	.word	.LANCHOR70
+	.word	.LANCHOR62
+	.word	.LANCHOR71
 	.word	.LANCHOR190
 	.word	.LANCHOR189
 	.word	.LANCHOR191
+	.cfi_endproc
+.LFE367:
 	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
 	.section	.text.FtlLoadMapInfo,"ax",%progbits
 	.align	1
@@ -16573,18 +27039,31 @@ FtlLoadVonderInfo:
 	.fpu softvfp
 	.type	FtlLoadMapInfo, %function
 FtlLoadMapInfo:
+.LFB369:
+	.loc 1 1820 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 3, -8
+	.cfi_offset 14, -4
+	.loc 1 1821 0
 	bl	FtlL2PDataInit
-	ldr	r0, .L2328
+.LVL2546:
+	.loc 1 1823 0
+	ldr	r0, .L2327
 	bl	FtlMapTblRecovery
+.LVL2547:
+	.loc 1 1828 0
 	movs	r0, #0
 	pop	{r3, pc}
-.L2329:
-	.align	2
 .L2328:
+	.align	2
+.L2327:
 	.word	.LANCHOR124
+	.cfi_endproc
+.LFE369:
 	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
 	.section	.text.FtlRecoverySuperblock,"ax",%progbits
 	.align	1
@@ -16595,836 +27074,1320 @@ FtlLoadMapInfo:
 	.fpu softvfp
 	.type	FtlRecoverySuperblock, %function
 FtlRecoverySuperblock:
+.LFB372:
+	.loc 1 1879 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldrh	r3, [r0]
-	movw	r2, #65535
+.LVL2548:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r10, r0
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 1 1893 0
+	movw	r2, #65535
+	ldrh	r3, [r0]
+	.loc 1 1879 0
 	sub	sp, sp, #56
+	.cfi_def_cfa_offset 88
+	.loc 1 1879 0
+	mov	r8, r0
+	.loc 1 1893 0
 	cmp	r3, r2
-	beq	.L2491
+	beq	.L2484
+	.loc 1 1898 0
 	ldrh	r3, [r0, #2]
-	str	r3, [sp, #12]
+	str	r3, [sp, #8]
+.LVL2549:
+	.loc 1 1899 0
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
-	ldr	r1, [sp, #12]
-	str	r3, [sp, #28]
-	ldr	r3, .L2500
+	.loc 1 1904 0
+	ldr	r1, [sp, #8]
+	.loc 1 1899 0
+	str	r3, [sp, #24]
+.LVL2550:
+	.loc 1 1904 0
+	ldr	r3, .L2493
 	ldrh	r3, [r3]
 	cmp	r3, r1
 	mov	r3, #0
-	bne	.L2333
+	bne	.L2332
+	.loc 1 1905 0
 	strh	r3, [r0, #4]	@ movhi
-.L2498:
-	strb	r3, [r10, #6]
+.LVL2551:
 .L2491:
+	.loc 1 2254 0
+	strb	r3, [r8, #6]
+.LVL2552:
+.L2484:
+	.loc 1 2275 0
 	movs	r0, #0
 	add	sp, sp, #56
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2333:
+.LVL2553:
+.L2332:
+	.cfi_restore_state
+	.loc 1 1912 0
 	ldrh	r0, [r0, #16]
-.L2334:
+.LVL2554:
+.L2333:
+	.loc 1 1913 0
 	cmp	r0, r2
 	uxth	r5, r3
+.LVL2555:
 	add	r3, r3, #1
-	beq	.L2335
-	ldrb	r1, [r10, #8]	@ zero_extendqisi2
+	beq	.L2334
+	.loc 1 1919 0
+	ldrb	r1, [r8, #8]	@ zero_extendqisi2
 	cmp	r1, #1
-	bne	.L2336
+	bne	.L2335
+	.loc 1 1920 0
 	bl	FtlGetLastWrittenPage
+.LVL2556:
+	.loc 1 1922 0
 	adds	r6, r0, #1
+	.loc 1 1920 0
 	mov	r4, r0
-	beq	.L2337
-	ldr	r3, .L2500+4
+.LVL2557:
+	.loc 1 1922 0
+	beq	.L2336
+	.loc 1 1922 0 is_stmt 0 discriminator 1
+	ldr	r3, .L2493+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L2415
-	ldr	r3, .L2500+8
-	ldrh	r6, [r3, r0, lsl #1]
-.L2338:
-	ldr	r3, .L2500+12
-	movw	lr, #65535
-	mov	r8, #36
-	ldrh	fp, [r3]
-	ldr	r3, .L2500+16
+	bne	.L2413
+	.loc 1 1923 0 is_stmt 1
+	ldr	r3, .L2493+8
+	ldrh	r5, [r3, r0, lsl #1]
+.LVL2558:
+.L2337:
+	.loc 1 1944 0 discriminator 1
+	ldr	r3, .L2493+12
+	.loc 1 1946 0 discriminator 1
+	movw	fp, #65535
+	.loc 1 1947 0 discriminator 1
+	mov	r10, #36
+	.loc 1 1944 0 discriminator 1
+	ldrh	ip, [r3]
+	.loc 1 1947 0 discriminator 1
+	ldr	r3, .L2493+16
 	ldr	r0, [r3]
-	ldr	r3, .L2500+20
+	.loc 1 1949 0 discriminator 1
+	ldr	r3, .L2493+20
 	ldr	r3, [r3]
-	str	r3, [sp, #8]
-	ldr	r3, .L2500+24
-	ldrh	ip, [r3]
-	add	r3, r10, #16
-	str	r3, [sp, #20]
 	str	r3, [sp, #4]
+	ldr	r3, .L2493+24
+	ldrh	lr, [r3]
+	add	r3, r8, #16
+	str	r3, [sp, #20]
+	str	r3, [sp]
 	movs	r3, #0
-	mov	r7, r3
-.L2339:
+	mov	r6, r3
+.L2338:
+.LVL2559:
+	.loc 1 1944 0 discriminator 1
 	uxth	r2, r3
-	cmp	fp, r2
-	bhi	.L2343
-	ldrb	r3, [r10, #8]	@ zero_extendqisi2
+	cmp	ip, r2
+	bhi	.L2342
+	.loc 1 1953 0
+	ldrb	r3, [r8, #8]	@ zero_extendqisi2
+.LVL2560:
 	cmp	r3, #1
-	bne	.L2416
-	ldr	r3, .L2500+4
+	bne	.L2414
+	.loc 1 1953 0 is_stmt 0 discriminator 1
+	ldr	r3, .L2493+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	adds	r3, r3, #0
 	it	ne
 	movne	r3, #1
-.L2492:
-	str	r3, [sp, #36]
-	mov	r1, r7
-	ldr	r2, [sp, #36]
-	movs	r5, #0
+.L2485:
+	str	r3, [sp, #32]
+.LVL2561:
+	.loc 1 1956 0 is_stmt 1
+	mov	r1, r6
+	ldr	r2, [sp, #32]
+.LVL2562:
+	.loc 1 1958 0
+	movs	r7, #0
+	.loc 1 1956 0
 	bl	FlashReadPages
-	ldr	r3, .L2500+28
-	movw	fp, #65535
-	ldr	r8, .L2500+16
+.LVL2563:
+	.loc 1 1957 0
+	ldr	r3, .L2493+28
+	.loc 1 1889 0
+	movw	r10, #65535
+	ldr	fp, .L2493+16
+	.loc 1 1957 0
 	ldr	r3, [r3]
 	subs	r3, r3, #1
-	str	r3, [sp, #4]
-.L2345:
-	uxth	r3, r5
-	cmp	r7, r3
-	bhi	.L2350
-	bne	.L2348
+	str	r3, [sp]
+.LVL2564:
+.L2344:
+	uxth	r3, r7
+.LVL2565:
+	.loc 1 1958 0 discriminator 1
+	cmp	r6, r3
+	bhi	.L2349
+	.loc 1 1975 0
+	bne	.L2347
+	.loc 1 1977 0
 	adds	r4, r4, #1
+.LVL2566:
 	uxth	r3, r4
-	str	r3, [sp, #8]
-	ldr	r3, [r8]
+.LVL2567:
+	str	r3, [sp, #4]
+.LVL2568:
+	.loc 1 1979 0
+	ldr	r3, [fp]
 	ldr	r0, [r3, #4]
-.L2493:
+.LVL2569:
+.L2486:
+	.loc 1 1983 0
 	ubfx	r0, r0, #10, #16
 	bl	P2V_plane
-	ldrb	r3, [r10, #8]	@ zero_extendqisi2
-	str	r0, [sp, #16]
+.LVL2570:
+	.loc 1 1986 0
+	ldrb	r3, [r8, #8]	@ zero_extendqisi2
+	.loc 1 1983 0
+	str	r0, [sp, #12]
+.LVL2571:
+	.loc 1 1986 0
 	cmp	r3, #1
-	bne	.L2352
-	ldr	r2, .L2500+4
+	bne	.L2351
+	.loc 1 1986 0 is_stmt 0 discriminator 1
+	ldr	r2, .L2493+4
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbnz	r2, .L2352
-	ldr	r1, [sp, #8]
-	ldr	r2, .L2500+8
+	cbnz	r2, .L2351
+	.loc 1 1987 0 is_stmt 1
+	ldr	r1, [sp, #4]
+	ldr	r2, .L2493+8
 	ldrh	r2, [r2, r1, lsl #1]
-	str	r2, [sp, #8]
-.L2352:
-	ldr	r2, .L2500
-	ldr	r1, [sp, #8]
+	str	r2, [sp, #4]
+.LVL2572:
+.L2351:
+	.loc 1 1990 0
+	ldr	r2, .L2493
+	ldr	r1, [sp, #4]
 	ldrh	r2, [r2]
 	cmp	r2, r1
-	bne	.L2353
-	ldrh	r2, [sp, #8]
-	strh	r2, [r10, #2]	@ movhi
+	bne	.L2352
+	.loc 1 1991 0
+	ldrh	r2, [sp, #4]
+	strh	r2, [r8, #2]	@ movhi
+	.loc 1 1992 0
 	movs	r2, #0
-	strb	r2, [r10, #6]
-	strh	r2, [r10, #4]	@ movhi
-.L2353:
-	ldr	r2, [sp, #8]
-	ldr	r1, [sp, #12]
+	strb	r2, [r8, #6]
+	.loc 1 1993 0
+	strh	r2, [r8, #4]	@ movhi
+.L2352:
+	.loc 1 1996 0
+	ldr	r2, [sp, #4]
+	ldr	r1, [sp, #8]
 	cmp	r2, r1
-	bne	.L2354
-	ldr	r2, [sp, #16]
-	ldr	r1, [sp, #28]
+	bne	.L2353
+	.loc 1 1996 0 is_stmt 0 discriminator 1
+	ldr	r2, [sp, #12]
+	ldr	r1, [sp, #24]
 	cmp	r2, r1
-	bne	.L2354
-.L2499:
-	ldr	r1, [sp, #8]
-	mov	r0, r10
+	bne	.L2353
+.LVL2573:
+.L2492:
+	.loc 1 2269 0 is_stmt 1
+	ldr	r1, [sp, #4]
+	mov	r0, r8
 	bl	ftl_sb_update_avl_pages
-	b	.L2491
-.L2335:
+.LVL2574:
+	b	.L2484
+.LVL2575:
+.L2334:
+	.loc 1 1915 0
 	uxth	r1, r3
 	adds	r1, r1, #8
-	ldrh	r0, [r10, r1, lsl #1]
-	b	.L2334
-.L2336:
+	ldrh	r0, [r8, r1, lsl #1]
+.LVL2576:
+	b	.L2333
+.LVL2577:
+.L2335:
+	.loc 1 1927 0
 	movs	r1, #0
 	bl	FtlGetLastWrittenPage
+.LVL2578:
 	mov	r4, r0
+.LVL2579:
+	.loc 1 1932 0
 	adds	r0, r0, #1
-	beq	.L2337
-.L2415:
-	mov	r6, r4
-	b	.L2338
-.L2337:
-	ldr	r3, [sp, #12]
-	cbz	r3, .L2340
-	ldr	r1, .L2500+32
-	mov	r2, #1896
-	ldr	r0, .L2500+36
+.LVL2580:
+	beq	.L2336
+.L2413:
+	mov	r5, r4
+.LVL2581:
+	b	.L2337
+.LVL2582:
+.L2336:
+	.loc 1 1933 0
+	ldr	r3, [sp, #8]
+	cbz	r3, .L2339
+	.loc 1 1933 0 is_stmt 0 discriminator 1
+	ldr	r1, .L2493+32
+	movw	r2, #1933
+	ldr	r0, .L2493+36
 	bl	printf
-	ldr	r1, .L2500+40
-	ldr	r0, .L2500+44
+.LVL2583:
+	ldr	r1, .L2493+40
+	ldr	r0, .L2493+44
 	bl	printf
-.L2340:
-	ldr	r3, [sp, #28]
-	cbz	r3, .L2341
+.LVL2584:
+.L2339:
+	.loc 1 1934 0 is_stmt 1
+	ldr	r3, [sp, #24]
+	cbz	r3, .L2340
+	.loc 1 1934 0 is_stmt 0 discriminator 1
 	cmp	r5, r3
-	beq	.L2341
-	ldr	r1, .L2500+32
-	movw	r2, #1897
-	ldr	r0, .L2500+36
+	beq	.L2340
+	.loc 1 1934 0 discriminator 2
+	ldr	r1, .L2493+32
+	movw	r2, #1934
+	ldr	r0, .L2493+36
 	bl	printf
-	ldr	r1, .L2500+40
-	ldr	r0, .L2500+44
+.LVL2585:
+	ldr	r1, .L2493+40
+	ldr	r0, .L2493+44
 	bl	printf
-.L2341:
+.LVL2586:
+.L2340:
+	.loc 1 1935 0 is_stmt 1
 	movs	r3, #0
-	strh	r3, [r10, #2]	@ movhi
-	b	.L2498
-.L2343:
-	ldr	r1, [sp, #4]
+	strh	r3, [r8, #2]	@ movhi
+	b	.L2491
+.LVL2587:
+.L2342:
+	.loc 1 1945 0
+	ldr	r1, [sp]
 	ldrh	r2, [r1], #2
-	cmp	r2, lr
-	str	r1, [sp, #4]
-	beq	.L2342
-	mla	r1, r8, r7, r0
-	orr	r2, r6, r2, lsl #10
+	.loc 1 1946 0
+	cmp	r2, fp
+	.loc 1 1945 0
+	str	r1, [sp]
+.LVL2588:
+	.loc 1 1946 0
+	beq	.L2341
+	.loc 1 1947 0
+	mla	r1, r10, r6, r0
+	orr	r2, r5, r2, lsl #10
+.LVL2589:
 	str	r2, [r1, #4]
+.LVL2590:
+	.loc 1 1948 0
 	movs	r2, #0
 	str	r2, [r1, #8]
-	mul	r2, ip, r7
-	adds	r7, r7, #1
-	uxth	r7, r7
+	.loc 1 1949 0
+	mul	r2, lr, r6
+	.loc 1 1950 0
+	adds	r6, r6, #1
+.LVL2591:
+	uxth	r6, r6
+.LVL2592:
+	.loc 1 1949 0
 	bic	r2, r2, #3
-	mov	r5, r2
-	ldr	r2, [sp, #8]
-	add	r5, r5, r2
-	str	r5, [r1, #12]
-.L2342:
+	mov	r7, r2
+	ldr	r2, [sp, #4]
+	add	r7, r7, r2
+	str	r7, [r1, #12]
+.L2341:
+.LVL2593:
 	adds	r3, r3, #1
-	b	.L2339
-.L2416:
+.LVL2594:
+	b	.L2338
+.LVL2595:
+.L2414:
 	movs	r3, #0
-	b	.L2492
-.L2350:
+	b	.L2485
+.LVL2596:
+.L2349:
+	.loc 1 1959 0
 	movs	r3, #36
-	ldr	r1, [r8]
-	muls	r3, r5, r3
+.LVL2597:
+	ldr	r1, [fp]
+	muls	r3, r7, r3
 	adds	r2, r1, r3
 	ldr	r3, [r1, r3]
-	cbnz	r3, .L2346
+	cbnz	r3, .L2345
+	.loc 1 1960 0
 	ldr	r2, [r2, #12]
+.LVL2598:
+	.loc 1 1961 0
 	ldr	r3, [r2, #4]
 	adds	r1, r3, #1
-	beq	.L2347
-	ldr	r1, .L2500+28
+	beq	.L2346
+	.loc 1 1962 0
+	ldr	r1, .L2493+28
 	mov	r0, r3
 	ldr	r1, [r1]
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L2347
-	ldr	r1, .L2500+28
+.LVL2599:
+	cbz	r0, .L2346
+	.loc 1 1964 0
+	ldr	r1, .L2493+28
 	adds	r3, r3, #1
 	str	r3, [r1]
-.L2347:
+.L2346:
+	.loc 1 1967 0
 	ldr	r3, [r2]
 	adds	r3, r3, #1
-	bne	.L2349
-.L2348:
+	bne	.L2348
+.LVL2600:
+.L2347:
+	.loc 1 1982 0
 	uxth	r3, r4
-	uxth	r5, r5
-	str	r3, [sp, #8]
+	.loc 1 1983 0
+	uxth	r7, r7
+	.loc 1 1982 0
+	str	r3, [sp, #4]
+.LVL2601:
+	.loc 1 1983 0
 	movs	r2, #36
-	ldr	r3, [r8]
-	mla	r5, r2, r5, r3
-	ldr	r0, [r5, #4]
-	b	.L2493
-.L2346:
+	ldr	r3, [fp]
+	mla	r7, r2, r7, r3
+.LVL2602:
+	ldr	r0, [r7, #4]
+	b	.L2486
+.LVL2603:
+.L2345:
+	.loc 1 1970 0
 	ldr	r1, [r2, #4]
-	uxth	fp, r6
-	ldr	r0, .L2500+48
+	.loc 1 1971 0
+	uxth	r10, r5
+	.loc 1 1970 0
+	ldr	r0, .L2493+48
 	bl	printf
-	ldrh	r2, [r10]
-	ldr	r3, .L2500+52
+.LVL2604:
+	.loc 1 1972 0
+	ldrh	r2, [r8]
+	ldr	r3, .L2493+52
 	strh	r2, [r3]	@ movhi
-.L2349:
-	adds	r5, r5, #1
-	b	.L2345
-.L2354:
+.LVL2605:
+.L2348:
+	adds	r7, r7, #1
+.LVL2606:
+	b	.L2344
+.LVL2607:
+.L2353:
+	.loc 1 2002 0
 	movw	r2, #65535
-	cmp	fp, r2
-	bne	.L2355
+	cmp	r10, r2
+	bne	.L2354
+	.loc 1 2002 0 is_stmt 0 discriminator 1
 	cmp	r3, #0
-	bne	.L2356
-.L2355:
-	ldr	r3, .L2500+56
-	uxth	fp, r6
-	uxth	r6, r6
+	bne	.L2355
+.L2354:
+.LVL2608:
+.LBB502:
+	.loc 1 2008 0 is_stmt 1
+	ldr	r3, .L2493+56
+	.loc 1 2007 0
+	uxth	r10, r5
+.LVL2609:
+	.loc 1 2012 0
+	uxth	r5, r5
+.LVL2610:
+	.loc 1 2030 0
+	ldr	fp, .L2493+56
+	.loc 1 2034 0
 	mov	r7, #-1
+	.loc 1 2008 0
 	ldr	r2, [r3]
+	.loc 1 2034 0
+	mov	r6, r7
+.LVL2611:
+	.loc 1 2008 0
 	adds	r2, r2, #1
+	.loc 1 2009 0
 	itt	eq
-	ldreq	r2, [sp, #4]
+	ldreq	r2, [sp]
 	streq	r2, [r3]
+	.loc 1 2010 0
 	ldr	r3, [r3]
-	str	r3, [sp, #24]
-	ldr	r3, [sp, #12]
+	str	r3, [sp, #28]
+.LVL2612:
+	.loc 1 2012 0
+	ldr	r3, [sp, #8]
+.LVL2613:
 	adds	r3, r3, #7
-	cmp	r6, r3
-	mov	r6, r7
+	cmp	r5, r3
+	.loc 1 2013 0
 	itet	gt
-	subgt	r4, fp, #7
-	ldrle	r4, [sp, #12]
+	subgt	r4, r10, #7
+	ldrle	r4, [sp, #8]
 	uxthgt	r4, r4
-.L2359:
-	cmp	r4, fp
-	bhi	.L2374
-	ldr	r3, .L2500+12
+.LVL2614:
+.L2358:
+	.loc 1 2014 0 discriminator 1
+	cmp	r4, r10
+	bhi	.L2371
+	.loc 1 2016 0
+	ldr	r3, .L2493+12
+	.loc 1 2018 0
 	movw	lr, #65535
+	.loc 1 2019 0
 	mov	ip, #36
-	ldrh	r8, [r3]
-	ldr	r3, .L2500+16
+	.loc 1 2016 0
+	ldrh	r3, [r3]
+	str	r3, [sp, #36]
+	.loc 1 2019 0
+	ldr	r3, .L2493+16
 	ldr	r0, [r3]
 	ldr	r3, [sp, #20]
-	str	r3, [sp, #32]
+	str	r3, [sp, #16]
 	movs	r3, #0
 	mov	r5, r3
-	b	.L2375
-.L2361:
-	ldr	r1, [sp, #32]
+	b	.L2372
+.LVL2615:
+.L2360:
+	.loc 1 2017 0
+	ldr	r1, [sp, #16]
 	ldrh	r2, [r1], #2
+	.loc 1 2018 0
 	cmp	r2, lr
-	str	r1, [sp, #32]
-	beq	.L2360
+	.loc 1 2017 0
+	str	r1, [sp, #16]
+.LVL2616:
+	.loc 1 2018 0
+	beq	.L2359
+	.loc 1 2019 0
 	mla	r1, ip, r5, r0
+	.loc 1 2020 0
 	adds	r5, r5, #1
+.LVL2617:
+	.loc 1 2019 0
 	orr	r2, r4, r2, lsl #10
+.LVL2618:
+	.loc 1 2020 0
 	uxth	r5, r5
+.LVL2619:
+	.loc 1 2019 0
 	str	r2, [r1, #4]
-.L2360:
+.LVL2620:
+.L2359:
 	adds	r3, r3, #1
-.L2375:
+.LVL2621:
+.L2372:
+	.loc 1 2016 0 discriminator 1
+	ldr	r1, [sp, #36]
 	uxth	r2, r3
-	cmp	r8, r2
-	bhi	.L2361
+	cmp	r2, r1
+	bcc	.L2360
+	.loc 1 2023 0
 	mov	r1, r5
-	ldr	r2, [sp, #36]
+	ldr	r2, [sp, #32]
 	bl	FlashReadPages
-	ldr	r2, .L2500+4
-	movs	r1, #36
-	ldr	r3, .L2500+56
-	movs	r0, #0
-	movw	ip, #65535
-	ldrb	lr, [r2]	@ zero_extendqisi2
-	ldr	r2, .L2500+16
+.LVL2622:
+	.loc 1 2033 0
+	ldr	r3, .L2493+4
+	movs	r2, #36
+	ldr	ip, .L2493+60
+	.loc 1 2027 0
+	movw	r1, #65535
+	.loc 1 2033 0
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	ldr	r3, .L2493+16
 	ldr	r3, [r3]
-	ldr	r2, [r2]
-	mla	r5, r1, r5, r2
-.L2362:
-	cmp	r2, r5
-	bne	.L2372
-	cbz	r0, .L2373
-	ldr	r2, .L2500+56
-	str	r3, [r2]
-.L2373:
+	mla	r5, r2, r5, r3
+.LVL2623:
+.L2361:
+	.loc 1 2024 0 discriminator 1
+	cmp	r5, r3
+	bne	.L2370
+	.loc 1 2014 0
 	adds	r4, r4, #1
+.LVL2624:
 	uxth	r4, r4
-	b	.L2359
-.L2501:
+.LVL2625:
+	b	.L2358
+.L2494:
 	.align	2
-.L2500:
-	.word	.LANCHOR51
+.L2493:
+	.word	.LANCHOR52
 	.word	.LANCHOR8
 	.word	.LANCHOR16
-	.word	.LANCHOR36
-	.word	.LANCHOR178
+	.word	.LANCHOR37
+	.word	.LANCHOR177
 	.word	.LANCHOR105
-	.word	.LANCHOR57
-	.word	.LANCHOR158
+	.word	.LANCHOR58
+	.word	.LANCHOR157
 	.word	.LANCHOR228
-	.word	.LC4
-	.word	.LC5
 	.word	.LC6
-	.word	.LC43
+	.word	.LC7
+	.word	.LC8
+	.word	.LC46
 	.word	.LANCHOR229
 	.word	.LANCHOR133
-.L2372:
-	ldr	r1, [r2]
-	cbnz	r1, .L2363
-	ldr	r1, [r2, #12]
-	ldrh	r8, [r1]
-	cmp	r8, ip
-	beq	.L2419
-	ldr	r1, [r1, #4]
-	cmp	r1, #-1
-	beq	.L2419
-	adds	r0, r7, #1
-	bne	.L2421
-	ldr	r0, .L2502
-	ldrh	r0, [r0, r4, lsl #1]
-	cmp	r0, ip
-	bne	.L2365
-	cmp	lr, #0
-	beq	.L2421
-.L2365:
-	ldr	r0, [sp, #4]
-	cmp	r0, r3
+	.word	.LANCHOR117
+.L2370:
+	.loc 1 2025 0
+	ldr	r2, [r3]
+	cbnz	r2, .L2362
+	.loc 1 2026 0
+	ldr	r2, [r3, #12]
+.LVL2626:
+	.loc 1 2027 0
+	ldrh	lr, [r2]
+	cmp	lr, r1
+	beq	.L2363
+	.loc 1 2029 0
+	ldr	r2, [r2, #4]
+.LVL2627:
+	cmp	r2, #-1
+	beq	.L2363
+	.loc 1 2030 0
+	ldr	r6, [fp]
+.LVL2628:
+	.loc 1 2031 0
+	str	r2, [fp]
+.LVL2629:
+	.loc 1 2032 0
+	adds	r2, r7, #1
+	bne	.L2363
+	.loc 1 2032 0 is_stmt 0 discriminator 1
+	ldrh	r2, [ip, r4, lsl #1]
+	cmp	r2, r1
+	bne	.L2364
+	.loc 1 2033 0 is_stmt 1
+	cbz	r0, .L2363
+.L2364:
+	.loc 1 2034 0
+	ldr	r2, [sp]
+	cmp	r2, r6
 	it	ne
-	movne	r7, r3
-.L2421:
-	movs	r0, #1
-	b	.L2364
+	movne	r7, r6
+.LVL2630:
 .L2363:
-	cbz	r0, .L2366
-	ldr	r2, .L2502+4
-	str	r3, [r2]
-.L2366:
-	ldr	r3, .L2502+8
-	ldrh	r2, [r10]
+	adds	r3, r3, #36
+	b	.L2361
+.L2362:
+	.loc 1 2040 0
+	ldr	r3, .L2495
+	ldrh	r2, [r8]
 	strh	r2, [r3]	@ movhi
-	ldrb	r3, [r10, #8]	@ zero_extendqisi2
-	cbnz	r3, .L2356
-	ldr	r3, .L2502
+	.loc 1 2041 0
+	ldrb	r3, [r8, #8]	@ zero_extendqisi2
+	cbnz	r3, .L2355
+	.loc 1 2043 0
+	ldr	r3, .L2495+4
 	ldrh	r2, [r3, r4, lsl #1]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L2368
-	adds	r1, r7, #1
-	ldr	r3, .L2502+4
-	beq	.L2369
+	bne	.L2366
+	.loc 1 2045 0
+	adds	r2, r7, #1
+	ldr	r3, .L2495+8
+	beq	.L2367
+	.loc 1 2046 0
 	str	r7, [r3]
-.L2356:
-	ldr	r3, .L2502+12
+.LVL2631:
+.L2355:
+.LBE502:
+	.loc 1 2069 0
+	ldr	r3, .L2495+12
 	movs	r2, #1
-	ldr	r0, .L2502+16
-	ldr	r6, .L2502+20
+	.loc 1 2070 0
+	ldr	r0, .L2495+16
+	.loc 1 2079 0
+	ldr	r10, .L2495+64
+	.loc 1 2069 0
 	strh	r2, [r3]	@ movhi
+	.loc 1 2070 0
 	bl	FtlMapBlkWriteDumpData
-	ldr	fp, [sp, #12]
-.L2376:
-	ldr	r3, .L2502+24
-	movw	ip, #65535
-	ldr	r0, [r6]
-	mov	lr, #36
+.LVL2632:
+	ldr	fp, [sp, #8]
+.LVL2633:
+.L2373:
+	.loc 1 2076 0
+	ldr	r3, .L2495+20
+	.loc 1 2078 0
+	movw	r7, #65535
+	.loc 1 2079 0
+	ldr	r0, [r10]
+	mov	ip, #36
+	.loc 1 2076 0
 	ldr	r1, [sp, #20]
 	movs	r2, #0
 	ldrh	r5, [r3]
-	ldr	r3, .L2502+28
-	str	r2, [sp, #24]
-	ldrb	r7, [r3]	@ zero_extendqisi2
-.L2377:
+	.loc 1 2080 0
+	ldr	r3, .L2495+24
+	.loc 1 2075 0
+	str	r2, [sp, #16]
+	.loc 1 2080 0
+	ldrb	r6, [r3]	@ zero_extendqisi2
+.LVL2634:
+.L2374:
+	.loc 1 2076 0 discriminator 1
 	uxth	r3, r2
-	cmp	r3, r5
-	bcc	.L2380
-	ldr	r2, [sp, #36]
-	ldr	r1, [sp, #24]
+	cmp	r5, r3
+	bhi	.L2377
+	.loc 1 2085 0
+	ldr	r2, [sp, #32]
+.LVL2635:
+	ldr	r1, [sp, #16]
 	bl	FlashReadPages
+.LVL2636:
+	.loc 1 2086 0
 	movs	r3, #0
-.L2497:
-	str	r3, [sp, #32]
-	ldr	r2, [sp, #24]
-	ldrh	r3, [sp, #32]
+.LVL2637:
+.L2490:
+	str	r3, [sp, #28]
+.LVL2638:
+	.loc 1 2086 0 is_stmt 0 discriminator 2
+	ldr	r2, [sp, #16]
+	ldrh	r3, [sp, #28]
 	cmp	r2, r3
-	bhi	.L2409
-	ldrb	r3, [r10, #8]	@ zero_extendqisi2
+	bhi	.L2407
+	.loc 1 2243 0 is_stmt 1
+	ldrb	r3, [r8, #8]	@ zero_extendqisi2
+	.loc 1 2242 0
 	add	fp, fp, #1
+.LVL2639:
 	uxth	fp, fp
+.LVL2640:
+	.loc 1 2243 0
 	cmp	r3, #1
-	bne	.L2410
-	ldr	r3, .L2502+28
+	bne	.L2408
+	.loc 1 2243 0 is_stmt 0 discriminator 1
+	ldr	r3, .L2495+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2410
-	ldr	r3, .L2502+32
+	cbz	r3, .L2408
+	.loc 1 2244 0 is_stmt 1
+	ldr	r3, .L2495+28
 	ldrh	r3, [r3]
 	cmp	r3, fp
-	bne	.L2410
-	ldr	r3, [sp, #8]
+	bne	.L2408
+	.loc 1 2244 0 is_stmt 0 discriminator 1
+	ldr	r3, [sp, #4]
 	cmp	r3, fp
-	beq	.L2385
-.L2410:
-	ldr	r3, .L2502+36
+	beq	.L2382
+.L2408:
+	.loc 1 2248 0 is_stmt 1
+	ldr	r3, .L2495+32
 	ldrh	r3, [r3]
 	cmp	r3, fp
-	bne	.L2376
-	ldr	r2, .L2502+24
+	bne	.L2373
+	.loc 1 2251 0
+	ldr	r2, .L2495+20
+	.loc 1 2253 0
 	movw	r0, #65535
+	.loc 1 2250 0
 	movs	r3, #0
-	strh	fp, [r10, #2]	@ movhi
-	strh	r3, [r10, #4]	@ movhi
+	.loc 1 2249 0
+	strh	fp, [r8, #2]	@ movhi
+	.loc 1 2250 0
+	strh	r3, [r8, #4]	@ movhi
+.LVL2641:
+	.loc 1 2251 0
 	ldrh	r2, [r2]
-.L2411:
+.LVL2642:
+.L2409:
+	.loc 1 2251 0 is_stmt 0 discriminator 1
 	uxth	r1, r3
 	cmp	r1, r2
-	bcs	.L2491
+	bcs	.L2484
+	.loc 1 2252 0 is_stmt 1
 	ldr	r1, [sp, #20]
 	ldrh	r4, [r1], #2
+	.loc 1 2253 0
 	cmp	r4, r0
+	.loc 1 2252 0
 	str	r1, [sp, #20]
+.LVL2643:
 	add	r1, r3, #1
-	bne	.L2498
+	.loc 1 2253 0
+	bne	.L2491
 	mov	r3, r1
-	b	.L2411
-.L2369:
-	ldr	r2, [sp, #4]
-	ldr	r1, [sp, #24]
+.LVL2644:
+	b	.L2409
+.LVL2645:
+.L2367:
+.LBB503:
+	.loc 1 2047 0
+	ldr	r2, [sp]
+	ldr	r1, [sp, #28]
 	cmp	r2, r1
+	.loc 1 2050 0
 	itet	eq
 	ldreq	r2, [r3]
+	.loc 1 2048 0
 	movne	r2, r1
+	.loc 1 2050 0
 	addeq	r2, r2, #-1
-.L2494:
+.L2487:
+	.loc 1 2064 0
 	str	r2, [r3]
-	b	.L2356
-.L2368:
-	ldr	r3, [sp, #4]
+	b	.L2355
+.L2366:
+	.loc 1 2052 0
+	ldr	r3, [sp]
 	cmp	r6, r3
-	beq	.L2371
-	adds	r2, r6, #1
-	beq	.L2356
-	ldr	r3, .L2502+4
+	beq	.L2369
+	.loc 1 2053 0
+	adds	r3, r6, #1
+	beq	.L2355
+	.loc 1 2054 0
+	ldr	r3, .L2495+8
 	str	r6, [r3]
-	b	.L2356
-.L2371:
-	ldr	r2, .L2502+4
-	ldr	r1, [sp, #4]
+	b	.L2355
+.L2369:
+	.loc 1 2055 0
+	ldr	r2, .L2495+8
+	ldr	r1, [sp]
 	ldr	r3, [r2]
 	cmp	r1, r3
-	beq	.L2356
+	beq	.L2355
+	.loc 1 2056 0
 	subs	r3, r3, #1
 	str	r3, [r2]
-	b	.L2356
-.L2419:
-	mov	r1, r3
-	mov	r3, r6
-.L2364:
-	mov	r6, r3
-	adds	r2, r2, #36
-	mov	r3, r1
-	b	.L2362
-.L2374:
+	b	.L2355
+.L2371:
+	.loc 1 2064 0
 	mov	r2, #-1
-	ldr	r3, .L2502+4
-	b	.L2494
-.L2380:
+	ldr	r3, .L2495+8
+	b	.L2487
+.LVL2646:
+.L2377:
+.LBE503:
+	.loc 1 2077 0
 	ldrh	r3, [r1], #2
-	cmp	r3, ip
-	beq	.L2378
-	ldr	r4, [sp, #24]
+.LVL2647:
+	.loc 1 2078 0
+	cmp	r3, r7
+	beq	.L2375
+	.loc 1 2079 0
+	ldr	r4, [sp, #16]
 	orr	r3, fp, r3, lsl #10
-	mla	r4, lr, r4, r0
+.LVL2648:
+	mla	r4, ip, r4, r0
 	str	r3, [r4, #4]
-	ldrb	r8, [r10, #8]	@ zero_extendqisi2
-	cmp	r8, #1
-	bne	.L2379
-	cbz	r7, .L2379
+.LVL2649:
+	.loc 1 2080 0
+	ldrb	lr, [r8, #8]	@ zero_extendqisi2
+	cmp	lr, #1
+	bne	.L2376
+	.loc 1 2080 0 is_stmt 0 discriminator 1
+	cbz	r6, .L2376
+	.loc 1 2081 0 is_stmt 1
 	orr	r3, r3, #-2147483648
 	str	r3, [r4, #4]
-.L2379:
-	ldr	r3, [sp, #24]
+.L2376:
+	.loc 1 2082 0
+	ldr	r3, [sp, #16]
 	adds	r3, r3, #1
 	uxth	r3, r3
-	str	r3, [sp, #24]
-.L2378:
+	str	r3, [sp, #16]
+.LVL2650:
+.L2375:
 	adds	r2, r2, #1
-	b	.L2377
-.L2409:
-	ldr	r3, [sp, #32]
+.LVL2651:
+	b	.L2374
+.LVL2652:
+.L2407:
+	ldr	r3, [sp, #28]
 	movs	r5, #36
-	ldr	r8, [r6]
+	.loc 1 2087 0
+	ldr	r7, [r10]
 	muls	r5, r3, r5
-	add	r7, r8, r5
-	ldr	r4, [r7, #4]
+	adds	r6, r7, r5
+	ldr	r4, [r6, #4]
+	.loc 1 2088 0
 	ubfx	r0, r4, #10, #16
+	.loc 1 2087 0
 	str	r4, [sp, #52]
+	.loc 1 2088 0
 	bl	P2V_plane
-	ldr	r3, [sp, #12]
+.LVL2653:
+	.loc 1 2090 0
+	ldr	r3, [sp, #8]
 	cmp	fp, r3
-	bcc	.L2382
-	bne	.L2383
-	ldr	r3, [sp, #28]
+	bcc	.L2379
+	.loc 1 2090 0 is_stmt 0 discriminator 1
+	bne	.L2380
+	.loc 1 2091 0 is_stmt 1
+	ldr	r3, [sp, #24]
 	cmp	r3, r0
-	bhi	.L2382
-.L2383:
-	ldr	r3, [sp, #8]
+	bhi	.L2379
+.L2380:
+	.loc 1 2094 0
+	ldr	r3, [sp, #4]
 	cmp	fp, r3
-	bne	.L2384
-	ldr	r3, [sp, #16]
+	bne	.L2381
+	.loc 1 2094 0 is_stmt 0 discriminator 1
+	ldr	r3, [sp, #12]
 	cmp	r3, r0
-	beq	.L2385
-.L2384:
-	ldr	r3, [r8, r5]
+	beq	.L2382
+.L2381:
+.LVL2654:
+	.loc 1 2098 0 is_stmt 1
+	ldr	r3, [r7, r5]
 	adds	r3, r3, #1
-	beq	.L2386
-	ldr	r3, [r7, #12]
-	movw	r2, #61589
-	ldrh	r1, [r3]
-	cmp	r1, r2
-	beq	.L2387
-.L2393:
-	ldrh	r0, [r10]
-.L2496:
+	beq	.L2383
+	.loc 1 2101 0
+	ldr	r6, [r6, #12]
+.LVL2655:
+	.loc 1 2102 0
+	movw	r3, #61589
+	ldrh	r2, [r6]
+	cmp	r2, r3
+	beq	.L2384
+.LVL2656:
+.L2391:
+.LBB504:
+	.loc 1 2135 0
+	ldrh	r0, [r8]
+.LVL2657:
+.L2489:
+.LBE504:
+	.loc 1 2219 0
 	bl	decrement_vpc_count
-.L2382:
-	ldr	r3, [sp, #32]
+.LVL2658:
+.L2379:
+	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
-	b	.L2497
-.L2387:
-	ldr	r2, [r3, #4]
-	str	r2, [sp, #4]
-	adds	r2, r2, #1
-	beq	.L2388
-	ldr	r2, .L2502+40
-	ldr	r0, [sp, #4]
-	ldr	r1, [r2]
+	b	.L2490
+.LVL2659:
+.L2384:
+	.loc 1 2108 0
+	ldr	r3, [r6, #4]
+	str	r3, [sp]
+.LVL2660:
+	.loc 1 2109 0
+	adds	r3, r3, #1
+.LVL2661:
+	beq	.L2385
+	.loc 1 2110 0 discriminator 1
+	ldr	r3, .L2495+36
+	ldr	r0, [sp]
+.LVL2662:
+	ldr	r1, [r3]
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L2388
-	ldr	r1, [sp, #4]
-	adds	r1, r1, #1
-	str	r1, [r2]
-.L2388:
-	ldr	r4, [r3, #8]
+.LVL2663:
+	.loc 1 2109 0 discriminator 1
+	cbz	r0, .L2385
+	.loc 1 2112 0
+	ldr	r2, [sp]
+	adds	r2, r2, #1
+	str	r2, [r3]
+.L2385:
+	.loc 1 2115 0
+	ldrh	r2, [r6]
+	movw	r3, #61589
+	cmp	r2, r3
+	beq	.L2386
+	.loc 1 2115 0 is_stmt 0 discriminator 1
+	ldr	r1, .L2495+40
+	movw	r2, #2115
+	ldr	r0, .L2495+44
+	bl	printf
+.LVL2664:
+	ldr	r1, .L2495+48
+	ldr	r0, .L2495+52
+	bl	printf
+.LVL2665:
+.L2386:
+	.loc 1 2116 0 is_stmt 1
+	ldr	r4, [r6, #8]
+.LVL2666:
+	.loc 1 2118 0
 	add	r1, sp, #48
-	ldr	r3, [r3, #12]
+	.loc 1 2117 0
+	ldr	r3, [r6, #12]
+	.loc 1 2118 0
 	movs	r2, #0
 	mov	r0, r4
+	.loc 1 2117 0
 	str	r3, [sp, #44]
+	.loc 1 2118 0
 	bl	log2phys
-	ldr	r3, .L2502+4
+.LVL2667:
+	.loc 1 2119 0
+	ldr	r3, .L2495+8
 	ldr	r1, [r3]
-	adds	r3, r1, #1
-	beq	.L2389
-	ldr	r0, [sp, #4]
+	adds	r7, r1, #1
+	beq	.L2387
+	.loc 1 2120 0 discriminator 1
+	ldr	r0, [sp]
 	bl	ftl_cmp_data_ver
+.LVL2668:
+	.loc 1 2119 0 discriminator 1
 	cmp	r0, #0
-	beq	.L2389
+	beq	.L2387
+.LBB505:
+	.loc 1 2124 0
 	ldr	r3, [sp, #44]
-	adds	r7, r3, #1
-	beq	.L2390
-	ldr	r0, [r6]
+	adds	r6, r3, #1
+.LVL2669:
+	beq	.L2388
+	.loc 1 2125 0
+	ldr	r0, [r10]
+	.loc 1 2127 0
 	movs	r2, #0
 	movs	r1, #1
+	.loc 1 2125 0
 	add	r0, r0, r5
+	.loc 1 2126 0
 	str	r3, [r0, #4]
-	ldr	r7, [r0, #12]
+	.loc 1 2125 0
+	ldr	r6, [r0, #12]
+.LVL2670:
+	.loc 1 2127 0
 	bl	FlashReadPages
-	ldr	r2, [r6]
+.LVL2671:
+	.loc 1 2140 0
+	ldr	r2, [r10]
 	ldr	r1, [r2, r5]
 	adds	r3, r2, r5
 	adds	r1, r1, #1
-	bne	.L2391
-.L2392:
+	bne	.L2389
+.LVL2672:
+.L2390:
+	.loc 1 2172 0
 	mov	r3, #-1
-	ldrh	r0, [r10]
+	.loc 1 2173 0
+	ldrh	r0, [r8]
+	.loc 1 2172 0
 	str	r3, [sp, #44]
+	.loc 1 2173 0
 	bl	decrement_vpc_count
-.L2400:
-	ldr	r7, [sp, #44]
-	adds	r0, r7, #1
-	beq	.L2382
-.L2414:
-	ubfx	r0, r7, #10, #16
+.LVL2673:
+.L2398:
+.LBE505:
+	.loc 1 2213 0
+	ldr	r6, [sp, #44]
+	adds	r0, r6, #1
+	beq	.L2379
+.L2412:
+	.loc 1 2215 0
+	ubfx	r0, r6, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L2502+44
+.LVL2674:
+	.loc 1 2216 0
+	ldr	r3, .L2495+56
+	.loc 1 2215 0
 	mov	r4, r0
+.LVL2675:
+	.loc 1 2216 0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bhi	.L2405
-	ldr	r1, .L2502+48
-	movw	r2, #2179
-	ldr	r0, .L2502+52
+	bhi	.L2403
+	.loc 1 2216 0 is_stmt 0 discriminator 1
+	ldr	r1, .L2495+40
+	movw	r2, #2216
+	ldr	r0, .L2495+44
+.LVL2676:
 	bl	printf
-	ldr	r1, .L2502+56
-	ldr	r0, .L2502+60
+.LVL2677:
+	ldr	r1, .L2495+48
+	ldr	r0, .L2495+52
 	bl	printf
-.L2405:
-	ldr	r3, .L2502+64
+.LVL2678:
+.L2403:
+	.loc 1 2217 0 is_stmt 1
+	ldr	r3, .L2495+60
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
 	cmp	r3, #0
-	beq	.L2406
+	beq	.L2404
+	.loc 1 2219 0
 	mov	r0, r4
-	b	.L2496
-.L2390:
+	b	.L2489
+.LVL2679:
+.L2388:
+.LBB506:
+	.loc 1 2131 0
 	ldr	r3, [sp, #52]
 	ldr	r2, [sp, #48]
 	cmp	r2, r3
-	bne	.L2393
+	bne	.L2391
+	.loc 1 2132 0
 	movs	r2, #1
 	add	r1, sp, #44
 	mov	r0, r4
 	bl	log2phys
-	b	.L2393
-.L2503:
-	.align	2
-.L2502:
-	.word	.LANCHOR117
-	.word	.LANCHOR133
-	.word	.LANCHOR229
-	.word	.LANCHOR230
-	.word	.LANCHOR124
-	.word	.LANCHOR178
-	.word	.LANCHOR36
-	.word	.LANCHOR8
-	.word	.LANCHOR52
-	.word	.LANCHOR51
-	.word	.LANCHOR158
-	.word	.LANCHOR38
-	.word	.LANCHOR228
-	.word	.LC4
-	.word	.LC5
-	.word	.LC6
-	.word	.LANCHOR82
-.L2391:
-	ldr	r1, [r7, #8]
+.LVL2680:
+	b	.L2391
+.LVL2681:
+.L2389:
+	.loc 1 2140 0 discriminator 1
+	ldr	r1, [r6, #8]
 	cmp	r4, r1
-	bne	.L2392
-	ldr	r8, [r7, #4]
-	ldr	r0, .L2504
-	mov	r1, r8
+	bne	.L2390
+	.loc 1 2128 0 discriminator 2
+	ldr	r7, [r6, #4]
+	.loc 1 2141 0 discriminator 2
+	ldr	r0, .L2495+8
+	mov	r1, r7
 	ldr	r0, [r0]
 	bl	ftl_cmp_data_ver
+.LVL2682:
+	.loc 1 2140 0 discriminator 2
 	cmp	r0, #0
-	beq	.L2392
+	beq	.L2390
+	.loc 1 2142 0
 	ldr	r1, [sp, #48]
 	ldr	r0, [sp, #52]
 	cmp	r1, r0
-	bne	.L2395
-.L2398:
+	bne	.L2393
+.L2396:
+	.loc 1 2168 0
 	ldr	r1, [sp, #44]
 	mov	r0, r4
 	bl	FtlReUsePrevPpa
-	b	.L2392
-.L2395:
+.LVL2683:
+	b	.L2390
+.L2496:
+	.align	2
+.L2495:
+	.word	.LANCHOR229
+	.word	.LANCHOR117
+	.word	.LANCHOR133
+	.word	.LANCHOR230
+	.word	.LANCHOR124
+	.word	.LANCHOR37
+	.word	.LANCHOR8
+	.word	.LANCHOR53
+	.word	.LANCHOR52
+	.word	.LANCHOR157
+	.word	.LANCHOR228
+	.word	.LC6
+	.word	.LC7
+	.word	.LC8
+	.word	.LANCHOR39
+	.word	.LANCHOR83
+	.word	.LANCHOR177
+.L2393:
+	.loc 1 2145 0
 	ldr	r0, [sp, #44]
 	cmp	r1, r0
-	beq	.L2392
+	beq	.L2390
+	.loc 1 2146 0
 	adds	r0, r1, #1
-	beq	.L2396
+	beq	.L2394
+	.loc 1 2148 0
 	str	r1, [r3, #4]
+	.loc 1 2149 0
 	movs	r2, #0
 	movs	r1, #1
 	mov	r0, r3
-	ldr	r7, [r3, #12]
+	.loc 1 2147 0
+	ldr	r6, [r3, #12]
+.LVL2684:
+	.loc 1 2149 0
 	bl	FlashReadPages
-.L2397:
-	ldr	r3, [r6]
+.LVL2685:
+.L2395:
+	.loc 1 2154 0
+	ldr	r3, [r10]
 	ldr	r3, [r3, r5]
 	adds	r3, r3, #1
-	beq	.L2398
-	ldr	r3, [r7, #4]
-	ldr	r2, .L2504
+	beq	.L2396
+	.loc 1 2155 0
+	ldr	r3, [r6, #4]
+.LVL2686:
+	.loc 1 2156 0
+	ldr	r2, .L2497
 	mov	r1, r3
 	ldr	r0, [r2]
 	bl	ftl_cmp_data_ver
+.LVL2687:
 	cmp	r0, #0
-	beq	.L2398
+	beq	.L2396
+	.loc 1 2157 0
 	mov	r1, r3
-	mov	r0, r8
+	mov	r0, r7
 	bl	ftl_cmp_data_ver
+.LVL2688:
 	cmp	r0, #0
-	beq	.L2392
-	b	.L2398
-.L2396:
+	beq	.L2390
+.LVL2689:
+	b	.L2396
+.LVL2690:
+.L2394:
+	.loc 1 2151 0
 	str	r1, [r2, r5]
-	b	.L2397
-.L2389:
+	b	.L2395
+.L2387:
+.LBE506:
+	.loc 1 2174 0
 	ldr	r3, [sp, #52]
 	ldr	r2, [sp, #48]
 	cmp	r2, r3
-	beq	.L2400
+	beq	.L2398
+	.loc 1 2176 0
 	movs	r2, #1
 	add	r1, sp, #52
 	mov	r0, r4
 	bl	log2phys
-	ldr	r7, [sp, #48]
-	adds	r5, r7, #1
-	beq	.L2400
+.LVL2691:
+	.loc 1 2177 0
+	ldr	r6, [sp, #48]
+.LVL2692:
+	adds	r5, r6, #1
+	beq	.L2398
+	.loc 1 2177 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #44]
-	cmp	r7, r3
-	beq	.L2414
-	ubfx	r0, r7, #10, #16
+	cmp	r6, r3
+	beq	.L2412
+	.loc 1 2178 0 is_stmt 1
+	ubfx	r0, r6, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L2504+4
+.LVL2693:
+	.loc 1 2180 0
+	ldr	r3, .L2497+4
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L2404
-	ldr	r3, .L2504+8
+	beq	.L2402
+	.loc 1 2181 0 discriminator 1
+	ldr	r3, .L2497+8
+	.loc 1 2180 0 discriminator 1
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L2404
-	ldr	r3, .L2504+12
+	beq	.L2402
+	.loc 1 2182 0
+	ldr	r3, .L2497+12
+	.loc 1 2181 0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L2400
-.L2404:
-	ldr	r0, [r6]
+	bne	.L2398
+.L2402:
+.LVL2694:
+.LBB507:
+	.loc 1 2186 0
+	ldr	r0, [r10]
+.LVL2695:
+	.loc 1 2189 0
 	movs	r2, #0
 	movs	r1, #1
-	str	r7, [r0, #4]
+	.loc 1 2188 0
+	str	r6, [r0, #4]
+	.loc 1 2186 0
 	ldr	r5, [r0, #12]
+.LVL2696:
+	.loc 1 2189 0
 	bl	FlashReadPages
-	ldr	r3, [r6]
+.LVL2697:
+	.loc 1 2192 0
+	ldr	r3, [r10]
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L2400
+	beq	.L2398
+	.loc 1 2193 0
 	ldr	r1, [r5, #4]
-	ldr	r0, [sp, #4]
+	ldr	r0, [sp]
 	bl	ftl_cmp_data_ver
+.LVL2698:
 	cmp	r0, #0
-	bne	.L2400
+	bne	.L2398
+	.loc 1 2200 0
 	movs	r2, #1
 	add	r1, sp, #48
+.LVL2699:
 	mov	r0, r4
 	bl	log2phys
-	b	.L2400
-.L2406:
+.LVL2700:
+	b	.L2398
+.LVL2701:
+.L2404:
+.LBE507:
+	.loc 1 2221 0
 	mov	r1, r4
-	ldr	r0, .L2504+16
+	ldr	r0, .L2497+16
 	bl	printf
-	b	.L2382
-.L2386:
-	ldrh	r3, [r10]
+.LVL2702:
+	b	.L2379
+.LVL2703:
+.L2383:
+	.loc 1 2227 0
+	ldrh	r3, [r8]
+	.loc 1 2228 0
 	mov	r1, r4
-	ldr	r2, .L2504+20
-	ldr	r0, .L2504+24
+	.loc 1 2227 0
+	ldr	r2, .L2497+20
+	.loc 1 2228 0
+	ldr	r0, .L2497+24
+.LVL2704:
+	.loc 1 2227 0
 	strh	r3, [r2]	@ movhi
-	ldr	r2, [sp, #4]
+	.loc 1 2228 0
+	ldr	r2, [sp]
 	bl	printf
-	ldr	r2, .L2504+28
+.LVL2705:
+	.loc 1 2229 0
+	ldr	r2, .L2497+28
 	ldr	r3, [r2]
 	cmp	r3, #31
-	bhi	.L2407
+	bhi	.L2405
+	.loc 1 2230 0
 	ldr	r0, [sp, #52]
-	ldr	r1, .L2504+32
+	ldr	r1, .L2497+32
 	str	r0, [r1, r3, lsl #2]
+	.loc 1 2231 0
 	adds	r3, r3, #1
 	str	r3, [r2]
-.L2407:
-	ldrh	r0, [r10]
+.L2405:
+	.loc 1 2233 0
+	ldrh	r0, [r8]
 	bl	decrement_vpc_count
-	ldr	r3, .L2504
+.LVL2706:
+	.loc 1 2235 0
+	ldr	r3, .L2497
 	ldr	r2, [r3]
 	adds	r1, r2, #1
-	bne	.L2408
-	ldr	r2, [sp, #4]
-.L2495:
+	bne	.L2406
+	.loc 1 2236 0
+	ldr	r2, [sp]
+.L2488:
+	.loc 1 2238 0
 	str	r2, [r3]
-	b	.L2382
-.L2408:
-	ldr	r1, [sp, #4]
+	b	.L2379
+.L2406:
+	.loc 1 2237 0
+	ldr	r1, [sp]
 	cmp	r1, r2
-	bcs	.L2382
+	bcs	.L2379
+	.loc 1 2238 0
 	mov	r2, r1
-	b	.L2495
-.L2385:
-	ldrb	r3, [sp, #16]	@ zero_extendqisi2
-	ldr	r2, [sp, #16]
-	strb	r3, [r10, #6]
-	ldrh	r3, [sp, #8]
-	strh	r3, [r10, #2]	@ movhi
-	b	.L2499
-.L2505:
+	b	.L2488
+.LVL2707:
+.L2382:
+.LDL3:
+	.loc 1 2267 0
+	ldrb	r3, [sp, #12]	@ zero_extendqisi2
+	.loc 1 2269 0
+	ldr	r2, [sp, #12]
+	.loc 1 2267 0
+	strb	r3, [r8, #6]
+	.loc 1 2268 0
+	ldrh	r3, [sp, #4]
+	strh	r3, [r8, #2]	@ movhi
+	b	.L2492
+.L2498:
 	.align	2
-.L2504:
+.L2497:
 	.word	.LANCHOR133
-	.word	.LANCHOR90
 	.word	.LANCHOR91
 	.word	.LANCHOR92
-	.word	.LC44
+	.word	.LANCHOR93
+	.word	.LC47
 	.word	.LANCHOR229
-	.word	.LC45
+	.word	.LC48
 	.word	.LANCHOR231
 	.word	.LANCHOR232
+	.cfi_endproc
+.LFE372:
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
 	.section	.text.FtlGcScanTempBlk,"ax",%progbits
 	.align	1
@@ -17435,194 +28398,320 @@ FtlRecoverySuperblock:
 	.fpu softvfp
 	.type	FtlGcScanTempBlk, %function
 FtlGcScanTempBlk:
+.LFB398:
+	.loc 6 227 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2533
+.LVL2708:
+	.loc 6 236 0
+	ldr	r3, .L2526
+	.loc 6 237 0
 	movw	r2, #65535
+	.loc 6 227 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
 	sub	sp, sp, #24
+	.cfi_def_cfa_offset 56
+	.loc 6 227 0
 	mov	r5, r0
+	.loc 6 236 0
 	ldrh	r4, [r3]
+.LVL2709:
 	str	r3, [sp, #16]
+	.loc 6 237 0
 	cmp	r4, r2
-	beq	.L2524
-	cbnz	r4, .L2507
-.L2508:
+	beq	.L2517
+	.loc 6 239 0
+	cbnz	r4, .L2500
+.L2501:
+	.loc 6 240 0
 	bl	FtlGcPageVarInit
-	b	.L2509
-.L2524:
+.LVL2710:
+	b	.L2502
+.LVL2711:
+.L2517:
+	.loc 6 238 0
 	movs	r4, #0
-.L2507:
-	ldr	r3, .L2533+4
+.LVL2712:
+.L2500:
+	.loc 6 239 0 discriminator 1
+	ldr	r3, .L2526+4
 	ldrh	r3, [r3]
 	cmp	r3, r1
-	beq	.L2508
-.L2509:
-	ldr	fp, .L2533+44
+	beq	.L2501
+.LVL2713:
+.L2502:
+	.loc 6 250 0
+	ldr	fp, .L2526+44
+	.loc 6 238 0
 	mov	r3, #-1
 	str	r3, [sp, #8]
-.L2521:
+.LVL2714:
+.L2514:
+	.loc 6 244 0
 	ldrh	r2, [r5]
 	movw	r3, #65535
+	.loc 6 242 0
 	movs	r0, #0
 	strb	r0, [r5, #8]
+.LVL2715:
+	.loc 6 244 0
 	cmp	r2, r3
-	beq	.L2510
-.L2523:
-	ldr	r3, .L2533+8
+	beq	.L2503
+.L2516:
+.LVL2716:
+	.loc 6 247 0
+	ldr	r3, .L2526+8
+	.loc 6 249 0
 	movw	ip, #65535
+	.loc 6 250 0
 	ldr	r0, [fp]
 	mov	lr, #36
+	.loc 6 247 0
 	ldrh	r8, [r3]
-	ldr	r3, .L2533+12
+	.loc 6 252 0
+	ldr	r3, .L2526+12
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L2533+16
+	ldr	r3, .L2526+16
 	ldrh	r10, [r3]
 	add	r3, r5, #16
 	str	r3, [sp, #4]
+	.loc 6 247 0
 	movs	r3, #0
+	.loc 6 246 0
 	mov	r6, r3
-.L2511:
+.LVL2717:
+.L2504:
+	.loc 6 247 0 discriminator 1
 	uxth	r2, r3
 	cmp	r8, r2
-	bhi	.L2513
+	bhi	.L2506
+	.loc 6 257 0
 	movs	r7, #0
 	mov	r10, #36
+	.loc 6 256 0
 	movs	r2, #0
 	mov	r1, r6
 	bl	FlashReadPages
-.L2514:
+.LVL2718:
+.L2507:
+	.loc 6 257 0 discriminator 1
 	uxth	r3, r7
 	cmp	r6, r3
-	bhi	.L2522
-	ldr	r3, .L2533+4
+	bhi	.L2515
+	.loc 6 292 0
+	ldr	r3, .L2526+4
+	.loc 6 282 0
 	adds	r4, r4, #1
+.LVL2719:
 	uxth	r4, r4
+.LVL2720:
+	.loc 6 292 0
 	ldrh	r3, [r3]
 	cmp	r3, r4
-	bhi	.L2523
+	bhi	.L2516
+	.loc 6 283 0
 	movs	r0, #0
-	b	.L2510
-.L2513:
+	b	.L2503
+.LVL2721:
+.L2506:
+	.loc 6 248 0
 	ldr	r1, [sp, #4]
 	ldrh	r2, [r1], #2
+	.loc 6 249 0
 	cmp	r2, ip
+	.loc 6 248 0
 	str	r1, [sp, #4]
-	beq	.L2512
+.LVL2722:
+	.loc 6 249 0
+	beq	.L2505
+	.loc 6 250 0
 	mla	r1, lr, r6, r0
 	orr	r2, r4, r2, lsl #10
+.LVL2723:
 	str	r2, [r1, #4]
+.LVL2724:
+	.loc 6 251 0
 	movs	r2, #0
 	str	r2, [r1, #8]
+	.loc 6 252 0
 	mul	r2, r10, r6
+	.loc 6 253 0
 	adds	r6, r6, #1
+.LVL2725:
 	uxth	r6, r6
+.LVL2726:
+	.loc 6 252 0
 	bic	r2, r2, #3
 	mov	r7, r2
 	ldr	r2, [sp, #12]
 	add	r7, r7, r2
 	str	r7, [r1, #12]
-.L2512:
+.L2505:
+.LVL2727:
 	adds	r3, r3, #1
-	b	.L2511
-.L2522:
+.LVL2728:
+	b	.L2504
+.LVL2729:
+.L2515:
 	mul	r8, r10, r7
+	.loc 6 258 0
 	ldr	r2, [fp]
 	str	r2, [sp, #20]
 	add	r3, r2, r8
 	ldr	r1, [r3, #4]
 	str	r3, [sp, #12]
+.LVL2730:
+	.loc 6 259 0
 	ubfx	r0, r1, #10, #16
 	str	r1, [sp, #4]
 	bl	P2V_plane
+.LVL2731:
+	.loc 6 261 0
 	ldr	r2, [sp, #20]
 	ldr	r1, [sp, #4]
 	ldr	r2, [r2, r8]
-	cbnz	r2, .L2515
+	cbnz	r2, .L2508
+	.loc 6 263 0
 	ldr	r3, [sp, #12]
+	.loc 6 264 0
 	movw	ip, #65535
 	adds	r7, r7, #1
+.LVL2732:
+	.loc 6 263 0
 	ldr	r3, [r3, #12]
+.LVL2733:
+	.loc 6 264 0
 	ldrh	r2, [r3]
 	cmp	r2, ip
-	bne	.L2516
-	ldr	r3, .L2533+20
+	bne	.L2509
+	.loc 6 265 0
+	ldr	r3, .L2526+20
+.LVL2734:
 	movs	r2, #1
 	str	r2, [r3]
-.L2510:
+.LVL2735:
+.L2503:
+	.loc 6 299 0
 	ldr	r2, [sp, #16]
 	movw	r3, #65535
+	.loc 6 301 0
 	strb	r0, [r5, #6]
+	.loc 6 302 0
 	mov	r1, r4
+	.loc 6 300 0
 	strh	r4, [r5, #2]	@ movhi
+	.loc 6 299 0
 	strh	r3, [r2]	@ movhi
+	.loc 6 302 0
 	mov	r2, r0
 	mov	r0, r5
+.LVL2736:
 	bl	ftl_sb_update_avl_pages
+.LVL2737:
+	.loc 6 304 0
 	ldr	r0, [sp, #8]
 	add	sp, sp, #24
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2516:
+.LVL2738:
+.L2509:
+	.cfi_restore_state
+	.loc 6 268 0
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
+.LVL2739:
 	bl	FtlGcUpdatePage
-	b	.L2514
-.L2515:
+.LVL2740:
+	b	.L2507
+.LVL2741:
+.L2508:
+	.loc 6 271 0
 	mov	r2, r1
-	ldr	r0, .L2533+24
+	ldr	r0, .L2526+24
+.LVL2742:
 	ldrh	r1, [r5]
+.LVL2743:
 	bl	printf
-	ldr	r3, .L2533+28
+.LVL2744:
+	.loc 6 272 0
+	ldr	r3, .L2526+28
 	ldrh	r2, [r5]
 	ldr	r3, [r3]
-	cbnz	r3, .L2517
-	ldr	r3, .L2533+32
+	cbnz	r3, .L2510
+	.loc 6 272 0 is_stmt 0 discriminator 2
+	ldr	r3, .L2526+32
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2518
-.L2517:
-	ldr	r3, .L2533+36
+	cbz	r3, .L2511
+.L2510:
+	.loc 6 272 0 discriminator 3
+	ldr	r3, .L2526+36
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r2, lsl #1]
 	cmp	r3, #119
-	bls	.L2519
-.L2518:
+	bls	.L2512
+.L2511:
+	.loc 6 272 0 discriminator 5
 	ldr	r3, [fp]
 	ldr	r3, [r3, r8]
 	adds	r3, r3, #1
-	bne	.L2520
-.L2519:
+	bne	.L2513
+.L2512:
+	.loc 6 273 0 is_stmt 1
 	ldr	r3, [fp]
 	add	r3, r3, r8
 	ldr	r3, [r3, #4]
 	str	r3, [sp, #8]
-.L2520:
-	ldr	r3, .L2533+40
+.LVL2745:
+.L2513:
+	.loc 6 274 0
+	ldr	r3, .L2526+40
 	movs	r4, #0
+.LVL2746:
 	ldr	r3, [r3]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
+	.loc 6 275 0
 	ldrh	r0, [r5]
 	bl	INSERT_FREE_LIST
+.LVL2747:
+	.loc 6 276 0
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
+.LVL2748:
+	.loc 6 278 0
 	bl	FtlGcPageVarInit
-	b	.L2521
-.L2534:
+.LVL2749:
+	.loc 6 279 0
+	b	.L2514
+.L2527:
 	.align	2
-.L2533:
+.L2526:
 	.word	.LANCHOR233
-	.word	.LANCHOR51
-	.word	.LANCHOR36
+	.word	.LANCHOR52
+	.word	.LANCHOR37
 	.word	.LANCHOR105
-	.word	.LANCHOR57
+	.word	.LANCHOR58
 	.word	.LANCHOR132
-	.word	.LC46
-	.word	.LANCHOR101
+	.word	.LC49
+	.word	.LANCHOR28
 	.word	.LANCHOR8
-	.word	.LANCHOR77
-	.word	.LANCHOR82
-	.word	.LANCHOR178
+	.word	.LANCHOR78
+	.word	.LANCHOR83
+	.word	.LANCHOR177
+	.cfi_endproc
+.LFE398:
 	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
 	.section	.text.FtlGcFreeTempBlock,"ax",%progbits
 	.align	1
@@ -17633,214 +28722,336 @@ FtlGcScanTempBlk:
 	.fpu softvfp
 	.type	FtlGcFreeTempBlock, %function
 FtlGcFreeTempBlock:
+.LFB396:
+	.loc 6 111 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL2750:
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L2558
+	.cfi_def_cfa_offset 48
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 6 118 0
+	ldr	r3, .L2551
 	ldr	r3, [r3]
-	cbz	r3, .L2536
-.L2541:
+	cbz	r3, .L2529
+.LVL2751:
+.L2534:
+	.loc 6 119 0
 	movs	r0, #0
-.L2535:
+.L2528:
+	.loc 6 215 0
 	add	sp, sp, #16
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2536:
-	ldr	r0, .L2558+4
+.LVL2752:
+.L2529:
+	.cfi_restore_state
+	.loc 6 120 0
+	ldr	r0, .L2551+4
+.LVL2753:
 	movw	r3, #65535
-	ldr	r5, .L2558+8
+	ldr	r5, .L2551+8
 	ldrh	r6, [r0]
 	mov	r4, r0
 	cmp	r6, r3
-	beq	.L2538
-	ldr	r3, .L2558+12
+	beq	.L2531
+.LVL2754:
+	.loc 6 132 0
+	ldr	r3, .L2551+12
 	ldrh	r1, [r3]
 	bl	FtlGcScanTempBlk
+.LVL2755:
 	str	r0, [sp, #12]
+	.loc 6 133 0
 	adds	r0, r0, #1
-	beq	.L2538
-	ldr	r3, .L2558+16
+	beq	.L2531
+	.loc 6 136 0
+	ldr	r3, .L2551+16
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r6, lsl #1]
 	cmp	r3, #4
-	bls	.L2539
+	bls	.L2532
+	.loc 6 137 0
 	subs	r3, r3, #5
+	.loc 6 138 0
 	movs	r0, #1
+	.loc 6 137 0
 	strh	r3, [r2, r6, lsl #1]	@ movhi
+	.loc 6 138 0
 	bl	FtlEctTblFlush
-.L2539:
+.LVL2756:
+.L2532:
+	.loc 6 140 0
 	ldr	r3, [r5]
-	cbnz	r3, .L2540
-	ldr	r2, .L2558+20
+	cbnz	r3, .L2533
+	.loc 6 141 0
+	ldr	r2, .L2551+20
+	.loc 6 142 0
 	ldr	r0, [sp, #12]
+	.loc 6 141 0
 	ldr	r3, [r2, #96]
+	.loc 6 142 0
 	ubfx	r0, r0, #10, #16
+	.loc 6 141 0
 	adds	r3, r3, #1
 	str	r3, [r2, #96]
+	.loc 6 142 0
 	bl	FtlBbmMapBadBlock
+.LVL2757:
+	.loc 6 143 0
 	bl	FtlBbmTblFlush
-.L2540:
+.LVL2758:
+.L2533:
+	.loc 6 145 0
 	movs	r3, #0
+	.loc 6 146 0
 	movs	r0, #1
+	.loc 6 145 0
 	str	r3, [r5]
-	b	.L2535
-.L2538:
+	.loc 6 146 0
+	b	.L2528
+.LVL2759:
+.L2531:
+	.loc 6 154 0
 	ldrh	r2, [r4]
+	.loc 6 153 0
 	movs	r3, #0
 	str	r3, [r5]
+	.loc 6 154 0
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2541
-	ldr	r6, .L2558+12
+	beq	.L2534
+.LVL2760:
+	.loc 6 163 0
+	ldr	r6, .L2551+12
+	.loc 6 161 0
 	bl	FtlCacheWriteBack
+.LVL2761:
+	.loc 6 163 0
 	ldrb	r0, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r6]
-	ldr	r5, .L2558+24
+	ldr	r5, .L2551+24
 	muls	r2, r0, r2
 	ldrh	r1, [r5]
 	cmp	r1, r2
-	beq	.L2542
-	ldr	r1, .L2558+28
+	beq	.L2535
+	.loc 6 163 0 is_stmt 0 discriminator 1
+	ldr	r1, .L2551+28
 	movs	r2, #163
-	ldr	r0, .L2558+32
+	ldr	r0, .L2551+32
 	bl	printf
-	ldr	r1, .L2558+36
-	ldr	r0, .L2558+40
+.LVL2762:
+	ldr	r1, .L2551+36
+	ldr	r0, .L2551+40
 	bl	printf
-.L2542:
+.LVL2763:
+.L2535:
+	.loc 6 164 0 is_stmt 1
 	ldrh	r6, [r6]
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	ldr	r2, .L2558+44
+	ldr	r2, .L2551+44
 	ldrh	r0, [r4]
-	ldr	fp, .L2558+84
+	.loc 6 168 0
+	ldr	fp, .L2551+84
+	.loc 6 164 0
 	smulbb	r3, r3, r6
 	ldr	r1, [r2]
+	.loc 6 166 0
 	movs	r6, #0
 	str	r2, [sp, #4]
+	.loc 6 164 0
 	strh	r3, [r1, r0, lsl #1]	@ movhi
-	ldr	r1, .L2558+48
+	.loc 6 165 0
+	ldr	r1, .L2551+48
 	ldrh	r3, [r5]
 	ldr	r0, [r1]
 	add	r3, r3, r0
 	str	r3, [r1]
-.L2543:
+.LVL2764:
+.L2536:
+	.loc 6 166 0 discriminator 1
 	ldrh	r2, [r5]
 	uxth	r3, r6
 	cmp	r2, r3
-	bhi	.L2547
+	bhi	.L2540
+	.loc 6 181 0
 	movw	r0, #65535
 	bl	decrement_vpc_count
-	ldr	r3, .L2558+52
+.LVL2765:
+	.loc 6 182 0
+	ldr	r3, .L2551+52
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2548
+	cbz	r3, .L2541
+	.loc 6 183 0
 	ldrh	r1, [r4]
-	ldr	r0, .L2558+56
+	ldr	r0, .L2551+56
 	bl	printf
-.L2548:
+.LVL2766:
+.L2541:
+	.loc 6 184 0
 	ldr	r3, [sp, #4]
 	ldrh	r0, [r4]
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	beq	.L2549
+	beq	.L2542
+	.loc 6 185 0
 	bl	INSERT_DATA_LIST
-.L2550:
-	ldr	r3, .L2558+60
+.LVL2767:
+.L2543:
+	.loc 6 190 0
+	ldr	r3, .L2551+60
+	.loc 6 188 0
 	movw	r6, #65535
+.LVL2768:
 	strh	r6, [r4]	@ movhi
+	.loc 6 189 0
 	movs	r4, #0
 	strh	r4, [r5]	@ movhi
+	.loc 6 190 0
 	strh	r4, [r3]	@ movhi
+	.loc 6 191 0
 	bl	l2p_flush
+.LVL2769:
+	.loc 6 192 0
 	bl	FtlVpcTblFlush
-	ldr	r3, .L2558+64
+.LVL2770:
+	.loc 6 206 0
+	ldr	r3, .L2551+64
 	ldrh	r2, [r3]
-	ldr	r3, .L2558+68
+	ldr	r3, .L2551+68
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, asr #2
-	ble	.L2541
-	ldr	r3, .L2558+72
+	ble	.L2534
+	.loc 6 207 0
+	ldr	r3, .L2551+72
+	.loc 6 208 0
 	movs	r2, #20
+	.loc 6 214 0
 	mov	r0, r4
+	.loc 6 207 0
 	strh	r6, [r3]	@ movhi
-	ldr	r3, .L2558+76
+	.loc 6 208 0
+	ldr	r3, .L2551+76
 	strh	r2, [r3]	@ movhi
-	b	.L2535
-.L2547:
+	b	.L2528
+.LVL2771:
+.L2540:
+	.loc 6 167 0
 	uxth	r3, r6
 	movs	r7, #12
+	.loc 6 168 0
 	ldr	r2, [fp]
+	.loc 6 167 0
 	muls	r7, r3, r7
-	ldr	r3, .L2558+80
+	ldr	r3, .L2551+80
 	ldr	r8, [r3]
 	add	r10, r8, r7
+.LVL2772:
+	.loc 6 168 0
 	ldr	r1, [r10, #8]
 	cmp	r1, r2
-	bcc	.L2544
-	ldr	r1, .L2558+28
+	bcc	.L2537
+	.loc 6 168 0 is_stmt 0 discriminator 1
+	ldr	r1, .L2551+28
 	movs	r2, #168
-	ldr	r0, .L2558+32
+	ldr	r0, .L2551+32
 	bl	printf
-	ldr	r1, .L2558+36
-	ldr	r0, .L2558+40
+.LVL2773:
+	ldr	r1, .L2551+36
+	ldr	r0, .L2551+40
 	bl	printf
-.L2544:
+.LVL2774:
+.L2537:
+	.loc 6 169 0 is_stmt 1
 	movs	r2, #0
 	add	r1, sp, #12
 	ldr	r0, [r10, #8]
 	bl	log2phys
+.LVL2775:
+	.loc 6 170 0
 	ldr	r2, [sp, #12]
 	ldr	r0, [r8, r7]
 	cmp	r0, r2
-	bne	.L2545
+	bne	.L2538
+	.loc 6 171 0
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
+.LVL2776:
+	.loc 6 172 0
 	movs	r2, #1
+	.loc 6 171 0
 	mov	r7, r0
+.LVL2777:
+	.loc 6 172 0
 	add	r1, r10, #4
 	ldr	r0, [r10, #8]
 	bl	log2phys
+.LVL2778:
+	.loc 6 173 0
 	mov	r0, r7
-.L2557:
+.LVL2779:
+.L2550:
+	.loc 6 177 0
 	bl	decrement_vpc_count
-.L2546:
+.LVL2780:
+.L2539:
 	adds	r6, r6, #1
-	b	.L2543
-.L2545:
+.LVL2781:
+	b	.L2536
+.LVL2782:
+.L2538:
+	.loc 6 175 0
 	ldr	r3, [r10, #4]
 	cmp	r2, r3
-	beq	.L2546
+	beq	.L2539
+	.loc 6 177 0
 	ldrh	r0, [r4]
-	b	.L2557
-.L2549:
-	bl	INSERT_FREE_LIST
 	b	.L2550
-.L2559:
+.LVL2783:
+.L2542:
+	.loc 6 187 0
+	bl	INSERT_FREE_LIST
+.LVL2784:
+	b	.L2543
+.L2552:
 	.align	2
-.L2558:
-	.word	.LANCHOR75
-	.word	.LANCHOR92
+.L2551:
+	.word	.LANCHOR76
+	.word	.LANCHOR93
 	.word	.LANCHOR132
-	.word	.LANCHOR51
-	.word	.LANCHOR77
-	.word	.LANCHOR136
-	.word	.LANCHOR110
+	.word	.LANCHOR52
+	.word	.LANCHOR78
+	.word	.LANCHOR135
+	.word	.LANCHOR111
 	.word	.LANCHOR234
-	.word	.LC4
-	.word	.LC5
 	.word	.LC6
-	.word	.LANCHOR82
-	.word	.LANCHOR159
+	.word	.LC7
+	.word	.LC8
+	.word	.LANCHOR83
+	.word	.LANCHOR158
 	.word	.LANCHOR8
-	.word	.LC47
+	.word	.LC50
 	.word	.LANCHOR109
-	.word	.LANCHOR87
+	.word	.LANCHOR88
 	.word	.LANCHOR227
 	.word	.LANCHOR201
-	.word	.LANCHOR174
-	.word	.LANCHOR111
-	.word	.LANCHOR71
+	.word	.LANCHOR173
+	.word	.LANCHOR110
+	.word	.LANCHOR72
+	.cfi_endproc
+.LFE396:
 	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
 	.section	.text.Ftl_get_new_temp_ppa,"ax",%progbits
 	.align	1
@@ -17851,42 +29062,81 @@ FtlGcFreeTempBlock:
 	.fpu softvfp
 	.type	Ftl_get_new_temp_ppa, %function
 Ftl_get_new_temp_ppa:
+.LFB400:
+	.loc 6 318 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 6 319 0
 	movw	r3, #65535
-	ldr	r4, .L2563
+	ldr	r4, .L2556
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	beq	.L2561
+	beq	.L2554
+	.loc 6 319 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L2562
-.L2561:
+	cbnz	r3, .L2555
+.L2554:
+	.loc 6 320 0 is_stmt 1
 	bl	FtlCacheWriteBack
+.LVL2785:
+	.loc 6 321 0
 	movs	r0, #0
+	.loc 6 322 0
 	movs	r5, #0
+	.loc 6 321 0
 	bl	FtlGcFreeTempBlock
-	ldr	r0, .L2563
+.LVL2786:
+	.loc 6 323 0
+	ldr	r0, .L2556
+	.loc 6 322 0
 	strb	r5, [r4, #8]
+	.loc 6 323 0
 	bl	allocate_data_superblock
-	ldr	r3, .L2563+4
+.LVL2787:
+	.loc 6 324 0
+	ldr	r3, .L2556+4
 	strh	r5, [r3]	@ movhi
-	ldr	r3, .L2563+8
+	.loc 6 325 0
+	ldr	r3, .L2556+8
 	strh	r5, [r3]	@ movhi
+	.loc 6 326 0
 	bl	l2p_flush
+.LVL2788:
+	.loc 6 327 0
 	mov	r0, r5
 	bl	FtlEctTblFlush
+.LVL2789:
+	.loc 6 328 0
 	bl	FtlVpcTblFlush
-.L2562:
-	ldr	r0, .L2563
+.LVL2790:
+.L2555:
+	.loc 6 330 0
+	ldr	r0, .L2556
+	.loc 6 331 0
 	pop	{r3, r4, r5, lr}
+	.cfi_restore 14
+	.cfi_restore 5
+	.cfi_restore 4
+	.cfi_restore 3
+	.cfi_def_cfa_offset 0
+	.loc 6 330 0
 	b	get_new_active_ppa
-.L2564:
+.LVL2791:
+.L2557:
 	.align	2
-.L2563:
-	.word	.LANCHOR92
+.L2556:
+	.word	.LANCHOR93
 	.word	.LANCHOR109
-	.word	.LANCHOR110
+	.word	.LANCHOR111
+	.cfi_endproc
+.LFE400:
 	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
 	.section	.text.Ftl_gc_temp_data_write_back,"ax",%progbits
 	.align	1
@@ -17897,90 +29147,149 @@ Ftl_get_new_temp_ppa:
 	.fpu softvfp
 	.type	Ftl_gc_temp_data_write_back, %function
 Ftl_gc_temp_data_write_back:
+.LFB401:
+	.loc 6 334 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
-	ldr	r3, .L2582
-	ldr	r5, .L2582+4
+	.cfi_def_cfa_offset 24
+	.cfi_offset 3, -24
+	.cfi_offset 4, -20
+	.cfi_offset 5, -16
+	.cfi_offset 6, -12
+	.cfi_offset 7, -8
+	.cfi_offset 14, -4
+	.loc 6 338 0
+	ldr	r3, .L2575
+	ldr	r5, .L2575+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2566
+	cbz	r3, .L2559
+	.loc 6 338 0 is_stmt 0 discriminator 1
 	ldr	r3, [r5]
-	lsls	r2, r3, #31
-	bpl	.L2566
-	ldr	r3, .L2582+8
+	lsls	r1, r3, #31
+	bpl	.L2559
+	.loc 6 338 0 discriminator 2
+	ldr	r3, .L2575+8
 	ldrh	r3, [r3, #4]
-	cbz	r3, .L2566
-.L2571:
+	cbz	r3, .L2559
+.L2564:
+	.loc 6 339 0 is_stmt 1
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L2566:
-	ldr	r4, .L2582+12
+.L2559:
+	.loc 6 341 0
+	ldr	r4, .L2575+12
 	movs	r3, #0
 	movs	r6, #0
+.LBB510:
+.LBB511:
+	.loc 6 343 0
 	movs	r7, #36
+.LBE511:
+.LBE510:
+	.loc 6 341 0
 	mov	r2, r3
 	ldr	r1, [r5]
 	ldr	r0, [r4]
 	bl	FlashProgPages
-.L2568:
+.LVL2792:
+.L2561:
+.LBB514:
+.LBB512:
+	.loc 6 342 0
 	ldr	r1, [r5]
 	uxth	r3, r6
 	cmp	r3, r1
-	bcc	.L2570
+	bcc	.L2563
+	.loc 6 356 0
 	ldr	r0, [r4]
 	bl	FtlGcBufFree
+.LVL2793:
+	.loc 6 357 0
 	movs	r3, #0
 	str	r3, [r5]
-	ldr	r3, .L2582+8
+	.loc 6 358 0
+	ldr	r3, .L2575+8
 	ldrh	r3, [r3, #4]
 	cmp	r3, #0
-	bne	.L2571
+	bne	.L2564
+	.loc 6 359 0
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
-	b	.L2581
-.L2570:
+.LVL2794:
+	b	.L2574
+.L2563:
+	.loc 6 343 0
 	muls	r3, r7, r3
 	ldr	r2, [r4]
 	adds	r6, r6, #1
+.LVL2795:
+	ldr	r0, [r2, r3]
 	adds	r1, r2, r3
-	ldr	r2, [r2, r3]
-	adds	r3, r2, #1
-	bne	.L2569
-	ldr	r3, .L2582+8
-	movs	r5, #0
-	ldr	r0, .L2582+16
-	ldrh	r4, [r3]
-	ldr	r0, [r0]
-	strh	r5, [r0, r4, lsl #1]	@ movhi
-	strh	r2, [r3]	@ movhi
-	ldr	r2, .L2582+20
-	ldr	r0, [r1, #4]
-	ldr	r3, [r2, #96]
+	adds	r2, r0, #1
+	bne	.L2562
+	.loc 6 344 0
+	ldr	r2, .L2575+8
+	movs	r6, #0
+	ldr	r1, .L2575+16
+	ldrh	r5, [r2]
+	ldr	r1, [r1]
+	strh	r6, [r1, r5, lsl #1]	@ movhi
+	.loc 6 346 0
+	ldr	r1, .L2575+20
+	.loc 6 345 0
+	strh	r0, [r2]	@ movhi
+	.loc 6 346 0
+	ldr	r2, [r1, #96]
+	adds	r2, r2, #1
+	str	r2, [r1, #96]
+	.loc 6 347 0
+	ldr	r2, [r4]
+	add	r3, r3, r2
+	ldr	r0, [r3, #4]
 	ubfx	r0, r0, #10, #16
-	adds	r3, r3, #1
-	str	r3, [r2, #96]
 	bl	FtlBbmMapBadBlock
+.LVL2796:
+	.loc 6 348 0
 	bl	FtlBbmTblFlush
+.LVL2797:
+	.loc 6 349 0
 	bl	FtlGcPageVarInit
-.L2581:
+.LVL2798:
+.L2574:
+	.loc 6 360 0
 	movs	r0, #1
+.LBE512:
+.LBE514:
+	.loc 6 363 0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L2569:
+.L2562:
+.LBB515:
+.LBB513:
+	.loc 6 352 0
 	ldr	r3, [r1, #12]
+.LVL2799:
+	.loc 6 353 0
 	ldr	r1, [r1, #4]
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
 	bl	FtlGcUpdatePage
-	b	.L2568
-.L2583:
+.LVL2800:
+	b	.L2561
+.L2576:
 	.align	2
-.L2582:
+.L2575:
 	.word	.LANCHOR8
 	.word	.LANCHOR102
-	.word	.LANCHOR92
-	.word	.LANCHOR179
-	.word	.LANCHOR82
-	.word	.LANCHOR136
+	.word	.LANCHOR93
+	.word	.LANCHOR178
+	.word	.LANCHOR83
+	.word	.LANCHOR135
+.LBE513:
+.LBE515:
+	.cfi_endproc
+.LFE401:
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
 	.section	.text.FtlGcPageRecovery,"ax",%progbits
 	.align	1
@@ -17991,34 +29300,56 @@ Ftl_gc_temp_data_write_back:
 	.fpu softvfp
 	.type	FtlGcPageRecovery, %function
 FtlGcPageRecovery:
+.LFB399:
+	.loc 6 307 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	ldr	r4, .L2586
-	ldr	r5, .L2586+4
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 6 308 0
+	ldr	r4, .L2579
+	ldr	r5, .L2579+4
 	ldrh	r1, [r4]
 	mov	r0, r5
 	bl	FtlGcScanTempBlk
+.LVL2801:
+	.loc 6 309 0
 	ldrh	r2, [r5, #2]
 	ldrh	r3, [r4]
 	cmp	r2, r3
-	bcc	.L2584
-	ldr	r0, .L2586+8
+	bcc	.L2577
+.LBB518:
+.LBB519:
+	.loc 6 311 0
+	ldr	r0, .L2579+8
 	bl	FtlMapBlkWriteDumpData
+.LVL2802:
+	.loc 6 312 0
 	movs	r0, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r3, .L2586+12
+.LVL2803:
+	.loc 6 313 0
+	ldr	r3, .L2579+12
 	movs	r2, #0
 	str	r2, [r3]
-.L2584:
+.L2577:
 	pop	{r3, r4, r5, pc}
-.L2587:
+.L2580:
 	.align	2
-.L2586:
-	.word	.LANCHOR51
-	.word	.LANCHOR92
+.L2579:
+	.word	.LANCHOR52
+	.word	.LANCHOR93
 	.word	.LANCHOR124
 	.word	.LANCHOR132
+.LBE519:
+.LBE518:
+	.cfi_endproc
+.LFE399:
 	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
 	.section	.text.FtlPowerLostRecovery,"ax",%progbits
 	.align	1
@@ -18029,33 +29360,63 @@ FtlGcPageRecovery:
 	.fpu softvfp
 	.type	FtlPowerLostRecovery, %function
 FtlPowerLostRecovery:
+.LFB374:
+	.loc 1 2319 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 1 2320 0
 	movs	r4, #0
-	ldr	r5, .L2589
-	ldr	r3, .L2589+4
+	.loc 1 2322 0
+	ldr	r5, .L2582
+	.loc 1 2320 0
+	ldr	r3, .L2582+4
+	.loc 1 2322 0
 	mov	r0, r5
+	.loc 1 2320 0
 	str	r4, [r3]
+	.loc 1 2322 0
 	bl	FtlRecoverySuperblock
+.LVL2804:
+	.loc 1 2323 0
 	mov	r0, r5
-	ldr	r5, .L2589+8
+	.loc 1 2324 0
+	ldr	r5, .L2582+8
+	.loc 1 2323 0
 	bl	FtlSlcSuperblockCheck
+.LVL2805:
+	.loc 1 2324 0
 	mov	r0, r5
 	bl	FtlRecoverySuperblock
+.LVL2806:
+	.loc 1 2325 0
 	mov	r0, r5
 	bl	FtlSlcSuperblockCheck
+.LVL2807:
+	.loc 1 2326 0
 	bl	FtlGcPageRecovery
+.LVL2808:
+	.loc 1 2327 0
 	movw	r0, #65535
 	bl	decrement_vpc_count
+.LVL2809:
+	.loc 1 2329 0
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L2590:
+.L2583:
 	.align	2
-.L2589:
-	.word	.LANCHOR90
-	.word	.LANCHOR231
+.L2582:
 	.word	.LANCHOR91
+	.word	.LANCHOR231
+	.word	.LANCHOR92
+	.cfi_endproc
+.LFE374:
 	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
 	.section	.text.FtlSysBlkInit,"ax",%progbits
 	.align	1
@@ -18066,118 +29427,210 @@ FtlPowerLostRecovery:
 	.fpu softvfp
 	.type	FtlSysBlkInit, %function
 FtlSysBlkInit:
+.LFB381:
+	.loc 1 2603 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 3, -24
+	.cfi_offset 4, -20
+	.cfi_offset 5, -16
+	.cfi_offset 6, -12
+	.cfi_offset 7, -8
+	.cfi_offset 14, -4
+	.loc 1 2607 0
 	movs	r3, #0
-	ldr	r4, .L2601
+	ldr	r4, .L2594
+	.loc 1 2608 0
 	movw	r5, #65535
+	.loc 1 2607 0
 	strh	r3, [r4]	@ movhi
-	ldr	r3, .L2601+4
+	.loc 1 2608 0
+	ldr	r3, .L2594+4
 	strh	r5, [r3]	@ movhi
-	ldr	r3, .L2601+8
+	.loc 1 2610 0
+	ldr	r3, .L2594+8
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
+.LVL2810:
+	.loc 1 2611 0
 	bl	FtlScanSysBlk
-	ldr	r3, .L2601+12
+.LVL2811:
+	.loc 1 2612 0
+	ldr	r3, .L2594+12
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	bne	.L2592
-.L2594:
+	bne	.L2585
+.L2587:
+	.loc 1 2613 0
 	mov	r6, #-1
-.L2591:
+.L2584:
+	.loc 1 2707 0
 	mov	r0, r6
 	pop	{r3, r4, r5, r6, r7, pc}
-.L2592:
+.L2585:
+	.loc 1 2615 0
 	bl	FtlLoadSysInfo
+.LVL2812:
 	mov	r6, r0
 	cmp	r0, #0
-	bne	.L2594
+	bne	.L2587
+	.loc 1 2618 0
 	bl	FtlLoadMapInfo
+.LVL2813:
+	.loc 1 2619 0
 	bl	FtlLoadVonderInfo
+.LVL2814:
+	.loc 1 2620 0
 	bl	Ftl_load_ext_data
+.LVL2815:
+	.loc 1 2622 0
 	bl	FtlLoadEctTbl
+.LVL2816:
+	.loc 1 2623 0
 	bl	FtlFreeSysBLkSort
+.LVL2817:
+	.loc 1 2625 0
 	bl	SupperBlkListInit
+.LVL2818:
+	.loc 1 2626 0
 	bl	FtlPowerLostRecovery
+.LVL2819:
+	.loc 1 2628 0
 	movs	r0, #1
 	bl	FtlUpdateVaildLpn
-	ldr	r3, .L2601+16
+.LVL2820:
+.LBB523:
+.LBB524:
+	.loc 1 2630 0
+	ldr	r3, .L2594+16
+	.loc 1 2631 0
 	movs	r0, #12
+	.loc 1 2630 0
 	ldrh	r2, [r3]
-	ldr	r3, .L2601+20
+	.loc 1 2631 0
+	ldr	r3, .L2594+20
 	ldr	r1, [r3]
+	.loc 1 2630 0
 	mov	r3, r6
-.L2595:
+.L2588:
+.LVL2821:
 	cmp	r3, r2
-	blt	.L2597
+	blt	.L2590
+	.loc 1 2636 0
 	ldrh	r3, [r4]
+.LVL2822:
 	cmp	r3, #0
-	beq	.L2591
-.L2596:
-	ldr	r5, .L2601+24
-	ldr	r4, .L2601+28
+	beq	.L2584
+.L2589:
+	.loc 1 2637 0
+	ldr	r5, .L2594+24
+	.loc 1 2638 0
+	ldr	r4, .L2594+28
+	.loc 1 2637 0
 	mov	r0, r5
 	bl	FtlSuperblockPowerLostFix
+.LVL2823:
+	.loc 1 2638 0
 	mov	r0, r4
 	bl	FtlSuperblockPowerLostFix
-	ldr	r3, .L2601+32
-	ldrh	r1, [r5]
-	ldrh	r0, [r5, #4]
-	ldr	r2, [r3]
-	ldrh	r3, [r2, r1, lsl #1]
-	subs	r3, r3, r0
-	ldr	r0, .L2601+36
-	strh	r3, [r2, r1, lsl #1]	@ movhi
+.LVL2824:
+.LBB525:
+	.loc 1 2643 0
+	ldr	r2, .L2594+32
+	ldrh	r0, [r5]
+	ldrh	r7, [r5, #4]
+	ldr	r1, [r2]
+	ldrh	r3, [r1, r0, lsl #1]
+	subs	r3, r3, r7
+	strh	r3, [r1, r0, lsl #1]	@ movhi
+	.loc 1 2644 0
+	ldr	r1, .L2594+36
+	.loc 1 2649 0
+	ldr	r0, [r2]
 	ldrh	r7, [r4, #4]
-	ldrh	r3, [r0]
+	.loc 1 2644 0
+	ldrh	r3, [r1]
 	strh	r3, [r5, #2]	@ movhi
+	.loc 1 2645 0
 	movs	r3, #0
 	strb	r3, [r5, #6]
+	.loc 1 2646 0
 	strh	r3, [r5, #4]	@ movhi
+.LVL2825:
+	.loc 1 2649 0
 	ldrh	r5, [r4]
-	ldrh	r1, [r2, r5, lsl #1]
-	subs	r1, r1, r7
-	strh	r1, [r2, r5, lsl #1]	@ movhi
-	ldrh	r2, [r0]
-	ldr	r0, .L2601+40
+	ldrh	r2, [r0, r5, lsl #1]
+	subs	r2, r2, r7
+	strh	r2, [r0, r5, lsl #1]	@ movhi
+	.loc 1 2650 0
+	ldrh	r2, [r1]
+.LBE525:
+	.loc 1 2662 0
+	ldr	r0, .L2594+40
+.LBB526:
+	.loc 1 2651 0
 	strb	r3, [r4, #6]
+	.loc 1 2650 0
 	strh	r2, [r4, #2]	@ movhi
+	.loc 1 2652 0
 	strh	r3, [r4, #4]	@ movhi
+.LBE526:
+	.loc 1 2662 0
 	bl	FtlMapBlkWriteDumpData
-	ldr	r0, .L2601+44
+.LVL2826:
+	.loc 1 2663 0
+	ldr	r0, .L2594+44
 	bl	FtlMapBlkWriteDumpData
-	ldr	r2, .L2601+48
+.LVL2827:
+	.loc 1 2675 0
+	ldr	r2, .L2594+48
 	ldrh	r3, [r2, #30]
 	adds	r3, r3, #1
 	strh	r3, [r2, #30]	@ movhi
+	.loc 1 2676 0
 	bl	l2p_flush
+.LVL2828:
+	.loc 1 2677 0
 	bl	FtlVpcTblFlush
+.LVL2829:
+	.loc 1 2678 0
 	bl	FtlVpcTblFlush
-	b	.L2591
-.L2597:
+.LVL2830:
+	b	.L2584
+.LVL2831:
+.L2590:
+	.loc 1 2631 0
 	mla	r5, r0, r3, r1
 	ldr	r5, [r5, #4]
 	cmp	r5, #0
-	blt	.L2596
+	blt	.L2589
+	.loc 1 2630 0
 	adds	r3, r3, #1
-	b	.L2595
-.L2602:
+.LVL2832:
+	b	.L2588
+.L2595:
 	.align	2
-.L2601:
+.L2594:
 	.word	.LANCHOR230
 	.word	.LANCHOR229
-	.word	.LANCHOR37
+	.word	.LANCHOR38
 	.word	.LANCHOR206
-	.word	.LANCHOR66
-	.word	.LANCHOR95
-	.word	.LANCHOR90
+	.word	.LANCHOR67
+	.word	.LANCHOR96
 	.word	.LANCHOR91
-	.word	.LANCHOR82
-	.word	.LANCHOR51
+	.word	.LANCHOR92
+	.word	.LANCHOR83
+	.word	.LANCHOR52
 	.word	.LANCHOR124
 	.word	.LANCHOR215
-	.word	.LANCHOR135
+	.word	.LANCHOR80
+.LBE524:
+.LBE523:
+	.cfi_endproc
+.LFE381:
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.section	.text.rk_ftl_garbage_collect,"ax",%progbits
 	.align	1
@@ -18188,605 +29641,887 @@ FtlSysBlkInit:
 	.fpu softvfp
 	.type	rk_ftl_garbage_collect, %function
 rk_ftl_garbage_collect:
-	@ args = 0, pretend = 0, frame = 32
+.LFB407:
+	.loc 6 533 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2693
+.LVL2833:
+	.loc 6 541 0
+	ldr	r3, .L2686
+	.loc 6 533 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #32
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	sub	sp, sp, #40
+	.cfi_def_cfa_offset 72
+	.loc 6 541 0
 	ldr	r2, [r3]
 	cmp	r2, #0
-	bne	.L2655
-	ldr	r3, .L2693+4
+	bne	.L2648
+	.loc 6 544 0
+	ldr	r3, .L2686+4
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L2655
-	ldr	r2, .L2693+8
+	bne	.L2648
+	.loc 6 547 0
+	ldr	r2, .L2686+8
 	ldrh	r2, [r2]
 	cmp	r2, #47
-	bls	.L2657
-	ldr	r3, .L2693+12
+	bls	.L2650
+.LVL2834:
+.LBB529:
+.LBB530:
+	.loc 6 555 0
+	ldr	r3, .L2686+12
 	movw	r5, #65535
 	ldrh	r4, [r3]
 	cmp	r4, r5
-	beq	.L2605
-	ldr	r1, .L2693+16
+	beq	.L2598
+	ldr	r1, .L2686+16
+.LVL2835:
 	ldrh	r2, [r1]
 	cmp	r2, r5
+	.loc 6 556 0
 	itt	eq
 	strheq	r4, [r1]	@ movhi
+	.loc 6 557 0
 	strheq	r2, [r3]	@ movhi
-.L2605:
+.L2598:
+	.loc 6 676 0
 	cmp	r0, #0
-	bne	.L2658
-	ldr	r3, .L2693+20
+	bne	.L2651
+	.loc 6 677 0
+	ldr	r3, .L2686+20
 	ldrh	r3, [r3]
 	cmp	r3, #24
-	bhi	.L2659
-	ldr	r2, .L2693+24
+	bhi	.L2652
+	ldr	r2, .L2686+24
+	.loc 6 679 0
 	cmp	r3, #16
+	.loc 6 680 0
 	ldrh	r4, [r2]
-	bls	.L2608
+	.loc 6 679 0
+	bls	.L2601
+	.loc 6 680 0
 	lsrs	r4, r4, #5
-.L2607:
-	ldr	r2, .L2693+28
+.LVL2836:
+.L2600:
+	.loc 6 688 0
+	ldr	r2, .L2686+28
 	ldrh	r1, [r2]
 	cmp	r1, r3
 	mov	r1, r2
-	bcs	.L2611
-	ldr	r3, .L2693+32
+	bcs	.L2604
+	.loc 6 689 0
+	ldr	r3, .L2686+32
 	movw	r0, #65535
+.LVL2837:
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L2612
-	ldr	r0, .L2693+16
+	bne	.L2605
+	ldr	r0, .L2686+16
 	ldrh	r0, [r0]
 	cmp	r0, r3
-	bne	.L2612
-	ldr	r3, .L2693+36
+	bne	.L2605
+	.loc 6 691 0
+	ldr	r3, .L2686+36
 	ldrh	r0, [r3]
-	cbnz	r0, .L2613
-	ldr	r3, .L2693+40
-	ldr	r4, .L2693+44
+	cbnz	r0, .L2606
+	ldr	r3, .L2686+40
+	ldr	r4, .L2686+44
+.LVL2838:
 	ldr	r3, [r3]
 	ldr	r4, [r4]
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, lsr #2
-	bcs	.L2614
-.L2613:
-	ldr	r3, .L2693+48
+	bcs	.L2607
+.L2606:
+	.loc 6 692 0
+	ldr	r3, .L2686+48
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r1]	@ movhi
-.L2615:
-	ldr	r3, .L2693+52
+.L2608:
+	.loc 6 695 0
+	ldr	r3, .L2686+52
 	movs	r2, #0
 	str	r2, [r3]
-.L2603:
-	add	sp, sp, #32
+.LVL2839:
+.L2596:
+.LBE530:
+.LBE529:
+	.loc 6 934 0
+	add	sp, sp, #40
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2608:
+.LVL2840:
+.L2601:
+	.cfi_restore_state
+.LBB532:
+.LBB531:
+	.loc 6 681 0
 	cmp	r3, #12
-	bls	.L2609
+	bls	.L2602
+	.loc 6 682 0
 	lsrs	r4, r4, #4
-	b	.L2607
-.L2609:
+.LVL2841:
+	b	.L2600
+.LVL2842:
+.L2602:
+	.loc 6 683 0
 	cmp	r3, #8
-	bls	.L2607
+	bls	.L2600
+	.loc 6 684 0
 	lsrs	r4, r4, #2
-	b	.L2607
-.L2659:
+.LVL2843:
+	b	.L2600
+.LVL2844:
+.L2652:
+	.loc 6 678 0
 	movs	r4, #1
-	b	.L2607
-.L2614:
+	b	.L2600
+.LVL2845:
+.L2607:
+	.loc 6 694 0
 	movs	r3, #18
 	strh	r3, [r2]	@ movhi
-	b	.L2615
-.L2612:
-	ldr	r3, .L2693+48
+	b	.L2608
+.LVL2846:
+.L2605:
+	.loc 6 698 0
+	ldr	r3, .L2686+48
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r1]	@ movhi
-.L2611:
-	ldr	r3, .L2693+56
+.L2604:
+	.loc 6 704 0
+	ldr	r3, .L2686+56
 	ldrh	r3, [r3]
-	cbz	r3, .L2606
+	cbz	r3, .L2599
+	.loc 6 705 0
 	adds	r4, r4, #32
+.LVL2847:
 	uxth	r4, r4
-.L2606:
-	ldr	r5, .L2693+60
+.LVL2848:
+.L2599:
+	.loc 6 753 0
+	ldr	r5, .L2686+60
 	movw	r3, #65535
 	ldrh	r2, [r5]
 	cmp	r2, r3
-	bne	.L2618
-	ldr	r3, .L2693+16
+	bne	.L2611
+	.loc 6 756 0
+	ldr	r3, .L2686+16
 	ldrh	r1, [r3]
 	cmp	r1, r2
-	beq	.L2619
-	ldr	r0, .L2693+64
+	beq	.L2612
+	.loc 6 760 0
+	ldr	r0, .L2686+64
 	ldr	r0, [r0]
 	ldrh	r1, [r0, r1, lsl #1]
-	cbnz	r1, .L2620
+	cbnz	r1, .L2613
+	.loc 6 761 0
 	strh	r2, [r3]	@ movhi
-.L2620:
+.L2613:
+	.loc 6 762 0
 	ldrh	r2, [r3]
 	strh	r2, [r5]	@ movhi
+	.loc 6 763 0
 	movw	r2, #65535
 	strh	r2, [r3]	@ movhi
-.L2619:
+.L2612:
+	.loc 6 767 0
 	ldrh	r0, [r5]
 	movw	r6, #65535
+	.loc 6 766 0
 	movs	r3, #0
 	strb	r3, [r5, #8]
+	.loc 6 767 0
 	cmp	r0, r6
-	beq	.L2618
+	beq	.L2611
+	.loc 6 768 0
 	bl	IsBlkInGcList
-	cbz	r0, .L2622
+.LVL2849:
+	cbz	r0, .L2615
+	.loc 6 769 0
 	strh	r6, [r5]	@ movhi
-.L2622:
-	ldr	r3, .L2693+68
+.L2615:
+	.loc 6 771 0
+	ldr	r3, .L2686+68
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2623
+	cbz	r3, .L2616
+	.loc 6 772 0
 	ldrh	r0, [r5]
 	bl	ftl_get_blk_mode
+.LVL2850:
 	strb	r0, [r5, #8]
-.L2623:
+.L2616:
+	.loc 6 775 0
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2618
-	ldr	r0, .L2693+60
+	beq	.L2611
+	.loc 6 776 0
+	ldr	r0, .L2686+60
 	bl	make_superblock
-	ldr	r2, .L2693+72
+.LVL2851:
+	.loc 6 779 0
+	ldr	r2, .L2686+72
+	.loc 6 777 0
 	movs	r3, #0
 	strh	r3, [r5, #2]	@ movhi
+	.loc 6 778 0
 	strb	r3, [r5, #6]
+	.loc 6 779 0
 	strh	r3, [r2]	@ movhi
-	ldr	r3, .L2693+64
+	.loc 6 780 0
+	ldr	r3, .L2686+64
 	ldrh	r2, [r5]
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r2, lsl #1]
-	ldr	r3, .L2693+76
+	ldr	r3, .L2686+76
 	strh	r2, [r3]	@ movhi
-.L2618:
-	ldr	r2, .L2693+80
+.L2611:
+	.loc 6 785 0
+	ldr	r2, .L2686+80
 	ldrh	r3, [r5]
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L2624
-	ldr	r2, .L2693+84
+	beq	.L2617
+	ldr	r2, .L2686+84
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L2624
-	ldr	r6, .L2693+60
+	beq	.L2617
+	.loc 6 791 0
+	ldr	r6, .L2686+60
 	mov	r5, r6
-.L2625:
+.L2618:
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L2626
-	ldr	r10, .L2693+92
+	bne	.L2619
+	.loc 6 795 0
+	ldr	r10, .L2686+92
+	.loc 6 792 0
 	movs	r2, #0
-	ldr	r3, .L2693+52
+	ldr	r3, .L2686+52
 	mov	r7, r10
 	str	r2, [r3]
-.L2627:
+.L2620:
+	.loc 6 795 0
 	ldrh	r8, [r10]
 	mov	r0, r8
 	bl	List_get_gc_head_node
+.LVL2852:
 	uxth	fp, r0
+	.loc 6 796 0
 	movw	r3, #65535
 	cmp	fp, r3
+	.loc 6 795 0
 	strh	fp, [r5]	@ movhi
-	bne	.L2628
+	.loc 6 796 0
+	bne	.L2621
+	.loc 6 797 0
 	movs	r3, #0
+	.loc 6 798 0
 	movs	r0, #8
+	.loc 6 797 0
 	strh	r3, [r10]	@ movhi
-	b	.L2603
-.L2658:
+	b	.L2596
+.LVL2853:
+.L2651:
+	.loc 6 534 0
 	movs	r4, #1
-	b	.L2606
-.L2624:
+	b	.L2599
+.LVL2854:
+.L2617:
+	.loc 6 786 0
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.L2691:
-	ldr	r3, .L2693+36
+.LVL2855:
+.L2684:
+	.loc 6 822 0
+	ldr	r3, .L2686+36
 	ldrh	r0, [r3]
-	b	.L2603
-.L2628:
-	str	r0, [sp]
+	b	.L2596
+.LVL2856:
+.L2621:
+	str	r0, [sp, #4]
+	.loc 6 800 0
 	mov	r0, fp
 	bl	IsBlkInGcList
+.LVL2857:
 	add	r3, r8, #1
-	ldr	r2, [sp]
-	cbz	r0, .L2629
+	ldr	r2, [sp, #4]
+	cbz	r0, .L2622
+	.loc 6 801 0
 	strh	r3, [r10]	@ movhi
-	b	.L2627
-.L2629:
-	ldr	r1, .L2693+24
+	b	.L2620
+.L2622:
+	.loc 6 814 0
+	ldr	r1, .L2686+24
+	.loc 6 804 0
 	uxth	r3, r3
-	ldr	lr, .L2693+96
+	.loc 6 814 0
+	ldr	lr, .L2686+96
 	uxth	r2, r2
-	ldr	r8, .L2693+64
+	ldr	r8, .L2686+64
 	ldrh	r1, [r1]
 	ldrh	lr, [lr]
 	ldr	r0, [r8]
+	.loc 6 804 0
 	strh	r3, [r10]	@ movhi
+	.loc 6 814 0
 	mul	r1, lr, r1
 	ldrh	ip, [r0, r2, lsl #1]
 	cmp	ip, r1, asr #1
-	bgt	.L2631
+	bgt	.L2624
+	.loc 6 815 0
 	cmp	r3, #48
-	bls	.L2632
+	bls	.L2625
 	cmp	ip, #8
-	bls	.L2632
-	ldr	r3, .L2693+88
+	bls	.L2625
+	ldr	r3, .L2686+88
 	ldrh	r3, [r3]
 	cmp	r3, #35
-	bhi	.L2632
-.L2631:
+	bhi	.L2625
+.L2624:
+	.loc 6 816 0
 	movs	r3, #0
 	strh	r3, [r7]	@ movhi
-.L2632:
+.L2625:
+	.loc 6 819 0
 	ldrh	r3, [r0, r2, lsl #1]
 	cmp	r1, r3
-	bgt	.L2633
+	bgt	.L2626
+	.loc 6 820 0
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
+	.loc 6 821 0
 	movs	r3, #0
 	strh	r3, [r7]	@ movhi
-	b	.L2691
-.L2633:
-	cbnz	r3, .L2634
+	b	.L2684
+.L2626:
+	.loc 6 825 0
+	cbnz	r3, .L2627
+	.loc 6 826 0
 	movw	r0, #65535
 	bl	decrement_vpc_count
+.LVL2858:
+	.loc 6 827 0
 	ldrh	r3, [r7]
 	adds	r3, r3, #1
 	strh	r3, [r7]	@ movhi
-	b	.L2627
-.L2694:
+	b	.L2620
+.L2687:
 	.align	2
-.L2693:
-	.word	.LANCHOR75
-	.word	.LANCHOR169
-	.word	.LANCHOR84
+.L2686:
+	.word	.LANCHOR76
+	.word	.LANCHOR168
+	.word	.LANCHOR85
 	.word	.LANCHOR113
 	.word	.LANCHOR112
-	.word	.LANCHOR87
-	.word	.LANCHOR51
-	.word	.LANCHOR174
-	.word	.LANCHOR92
+	.word	.LANCHOR88
+	.word	.LANCHOR52
+	.word	.LANCHOR173
+	.word	.LANCHOR93
 	.word	.LANCHOR235
-	.word	.LANCHOR71
-	.word	.LANCHOR99
+	.word	.LANCHOR72
+	.word	.LANCHOR100
 	.word	.LANCHOR227
-	.word	.LANCHOR170
+	.word	.LANCHOR169
 	.word	.LANCHOR114
 	.word	.LANCHOR201
-	.word	.LANCHOR82
+	.word	.LANCHOR83
 	.word	.LANCHOR8
 	.word	.LANCHOR236
 	.word	.LANCHOR237
-	.word	.LANCHOR90
 	.word	.LANCHOR91
+	.word	.LANCHOR92
 	.word	.LANCHOR109
-	.word	.LANCHOR176
-	.word	.LANCHOR36
-.L2634:
+	.word	.LANCHOR175
+	.word	.LANCHOR37
+.L2627:
+	.loc 6 830 0
 	movs	r3, #0
 	strb	r3, [r5, #8]
-	ldr	r3, .L2695
+	.loc 6 831 0
+	ldr	r3, .L2688
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2635
+	cbz	r3, .L2628
+	.loc 6 832 0
 	mov	r0, fp
 	bl	ftl_get_blk_mode
+.LVL2859:
 	strb	r0, [r5, #8]
-.L2635:
-	ldr	r3, .L2695+4
+.L2628:
+	.loc 6 835 0
+	ldr	r3, .L2688+4
 	ldrh	r3, [r3]
 	cmp	r3, fp
-	bne	.L2636
-	ldr	r1, .L2695+8
+	bne	.L2629
+	ldr	r1, .L2688+8
 	movw	r2, #835
-	ldr	r0, .L2695+12
+	ldr	r0, .L2688+12
 	bl	printf
-	ldr	r1, .L2695+16
-	ldr	r0, .L2695+20
+.LVL2860:
+	ldr	r1, .L2688+16
+	ldr	r0, .L2688+20
 	bl	printf
-.L2636:
-	ldr	r3, .L2695+24
+.LVL2861:
+.L2629:
+	.loc 6 836 0
+	ldr	r3, .L2688+24
 	ldrh	r2, [r5]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L2637
-	ldr	r1, .L2695+8
+	bne	.L2630
+	ldr	r1, .L2688+8
 	mov	r2, #836
-	ldr	r0, .L2695+12
+	ldr	r0, .L2688+12
 	bl	printf
-	ldr	r1, .L2695+16
-	ldr	r0, .L2695+20
+.LVL2862:
+	ldr	r1, .L2688+16
+	ldr	r0, .L2688+20
 	bl	printf
-.L2637:
-	ldr	r3, .L2695+28
+.LVL2863:
+.L2630:
+	.loc 6 837 0
+	ldr	r3, .L2688+28
 	ldrh	r2, [r5]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L2638
-	ldr	r1, .L2695+8
+	bne	.L2631
+	ldr	r1, .L2688+8
 	movw	r2, #837
-	ldr	r0, .L2695+12
+	ldr	r0, .L2688+12
 	bl	printf
-	ldr	r1, .L2695+16
-	ldr	r0, .L2695+20
+.LVL2864:
+	ldr	r1, .L2688+16
+	ldr	r0, .L2688+20
 	bl	printf
-.L2638:
+.LVL2865:
+.L2631:
+	.loc 6 838 0
 	mov	r0, r6
 	bl	make_superblock
-	ldr	r2, .L2695+32
+.LVL2866:
+	.loc 6 839 0
+	ldr	r2, .L2688+32
 	movs	r3, #0
+	.loc 6 840 0
 	ldrh	r1, [r5]
+	.loc 6 839 0
 	strh	r3, [r2]	@ movhi
+	.loc 6 840 0
 	ldr	r2, [r8]
 	ldrh	r1, [r2, r1, lsl #1]
-	ldr	r2, .L2695+36
+	ldr	r2, .L2688+36
+	.loc 6 841 0
 	strh	r3, [r5, #2]	@ movhi
+	.loc 6 842 0
 	strb	r3, [r5, #6]
+	.loc 6 840 0
 	strh	r1, [r2]	@ movhi
-.L2626:
-	ldr	r3, .L2695+40
+.L2619:
+	.loc 6 852 0
+	ldr	r3, .L2688+40
 	movs	r2, #1
 	str	r2, [r3]
-	ldr	r3, .L2695+44
+	.loc 6 853 0
+	ldr	r3, .L2688+44
 	ldrh	r3, [r3]
-	str	r3, [sp, #4]
-	ldr	r3, .L2695
+	str	r3, [sp, #12]
+.LVL2867:
+	.loc 6 854 0
+	ldr	r3, .L2688
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2639
+	cbz	r3, .L2632
 	ldrb	r3, [r5, #8]	@ zero_extendqisi2
 	cmp	r3, r2
+	.loc 6 855 0
 	ittt	eq
-	ldreq	r3, .L2695+48
+	ldreq	r3, .L2688+48
 	ldrheq	r3, [r3]
-	streq	r3, [sp, #4]
-.L2639:
+	streq	r3, [sp, #12]
+.LVL2868:
+.L2632:
+	.loc 6 856 0
 	ldrh	r3, [r5, #2]
-	ldr	r1, [sp, #4]
-	ldr	fp, .L2695+80
+	ldr	r1, [sp, #12]
+	.loc 6 864 0
+	ldr	fp, .L2688+80
+	.loc 6 856 0
 	adds	r2, r3, r4
 	cmp	r2, r1
+	.loc 6 857 0
 	itt	gt
 	movgt	r2, r1
 	subgt	r4, r2, r3
+.LVL2869:
+	.loc 6 869 0
 	mov	r3, #0
+	.loc 6 857 0
 	it	gt
 	uxthgt	r4, r4
-	str	r3, [sp, #12]
-.L2641:
-	ldrh	r3, [sp, #12]
+.LVL2870:
+	.loc 6 869 0
+	str	r3, [sp, #8]
+.LVL2871:
+.L2634:
+	.loc 6 859 0
+	ldrh	r3, [sp, #8]
 	cmp	r4, r3
-	bls	.L2649
-	ldr	r3, .L2695+52
+	bls	.L2642
+	.loc 6 861 0
+	ldr	r3, .L2688+52
+	.loc 6 863 0
 	movw	r8, #65535
+	.loc 6 864 0
 	ldrh	lr, [r6, #2]
 	mov	r10, #36
 	ldr	r0, [fp]
+	.loc 6 861 0
 	ldrh	r7, [r3]
-	ldr	r3, [sp, #12]
+	.loc 6 864 0
+	ldr	r3, [sp, #8]
 	add	lr, lr, r3
-	ldr	r3, .L2695+56
-	str	r3, [sp, #8]
+	ldr	r3, .L2688+56
+	str	r3, [sp, #16]
 	movs	r3, #0
-	str	r3, [sp]
-	b	.L2650
-.L2643:
-	ldr	r1, [sp, #8]
+	str	r3, [sp, #4]
+	b	.L2643
+.LVL2872:
+.L2636:
+	.loc 6 862 0
+	ldr	r1, [sp, #16]
 	ldrh	r2, [r1, #2]!
+	.loc 6 863 0
 	cmp	r2, r8
-	str	r1, [sp, #8]
-	beq	.L2642
-	ldr	r1, [sp]
+	.loc 6 862 0
+	str	r1, [sp, #16]
+.LVL2873:
+	.loc 6 863 0
+	beq	.L2635
+	.loc 6 864 0
+	ldr	r1, [sp, #4]
 	orr	r2, lr, r2, lsl #10
+.LVL2874:
 	mla	ip, r10, r1, r0
 	str	r2, [ip, #4]
+.LVL2875:
+	.loc 6 865 0
 	mov	r2, r1
 	adds	r2, r2, #1
 	uxth	r2, r2
-	str	r2, [sp]
-.L2642:
+	str	r2, [sp, #4]
+.LVL2876:
+.L2635:
 	adds	r3, r3, #1
-.L2650:
+.LVL2877:
+.L2643:
+	.loc 6 861 0
 	uxth	r2, r3
-	cmp	r2, r7
-	bcc	.L2643
+	cmp	r7, r2
+	bhi	.L2636
+	.loc 6 869 0
 	ldrb	r2, [r6, #8]	@ zero_extendqisi2
-	ldr	r1, [sp]
+	ldr	r1, [sp, #4]
 	bl	FlashReadPages
+.LVL2878:
 	movs	r3, #0
-.L2690:
-	str	r3, [sp, #8]
-	ldr	r2, [sp]
-	ldrh	r3, [sp, #8]
+.LVL2879:
+.L2683:
+	str	r3, [sp, #16]
+.LVL2880:
+	.loc 6 871 0
+	ldr	r2, [sp, #4]
+	ldrh	r3, [sp, #16]
 	cmp	r2, r3
-	bhi	.L2648
-	ldr	r3, [sp, #12]
-	adds	r3, r3, #1
-	str	r3, [sp, #12]
-	b	.L2641
-.L2648:
+	bhi	.L2641
+.LVL2881:
 	ldr	r3, [sp, #8]
+	adds	r3, r3, #1
+	str	r3, [sp, #8]
+.LVL2882:
+	b	.L2634
+.LVL2883:
+.L2641:
+	ldr	r3, [sp, #16]
 	movs	r7, #36
 	muls	r7, r3, r7
+	.loc 6 872 0
 	ldr	r3, [fp]
 	adds	r2, r3, r7
+.LVL2884:
+	.loc 6 873 0
 	ldr	r3, [r3, r7]
 	adds	r3, r3, #1
-	beq	.L2645
-	ldr	r8, [r2, #12]
+	beq	.L2638
+	.loc 6 872 0
+	ldr	r10, [r2, #12]
+	.loc 6 873 0
 	movw	r3, #61589
-	ldrh	r2, [r8]
+	ldrh	r2, [r10]
+.LVL2885:
 	cmp	r2, r3
-	bne	.L2645
-	ldr	r10, [r8, #8]
-	cmp	r10, #-1
-	bne	.L2646
-	ldr	r1, .L2695+8
+	bne	.L2638
+	.loc 6 875 0
+	ldr	r8, [r10, #8]
+.LVL2886:
+	.loc 6 876 0
+	cmp	r8, #-1
+	bne	.L2639
+	ldr	r1, .L2688+8
 	mov	r2, #876
-	ldr	r0, .L2695+12
+	ldr	r0, .L2688+12
 	bl	printf
-	ldr	r1, .L2695+16
-	ldr	r0, .L2695+20
+.LVL2887:
+	ldr	r1, .L2688+16
+	ldr	r0, .L2688+20
 	bl	printf
-.L2646:
+.LVL2888:
+.L2639:
+	.loc 6 877 0
 	movs	r2, #0
-	add	r1, sp, #28
-	mov	r0, r10
+	add	r1, sp, #36
+	mov	r0, r8
 	bl	log2phys
+.LVL2889:
+	.loc 6 878 0
 	ldr	r0, [fp]
-	ldr	r3, [sp, #28]
+	ldr	r3, [sp, #36]
 	add	r0, r0, r7
 	ldr	r2, [r0, #4]
 	bic	r3, r3, #-2147483648
 	cmp	r3, r2
-	bne	.L2645
-	ldr	r2, .L2695+32
-	ldr	r1, .L2695+60
-	ldr	r10, .L2695+68
+	bne	.L2638
+	.loc 6 880 0
+	ldr	r2, .L2688+32
+	.loc 6 881 0
+	ldr	r8, .L2688+68
+.LVL2890:
+	ldr	r1, .L2688+60
+	.loc 6 880 0
 	ldrh	r3, [r2]
-	str	r1, [sp, #20]
+	.loc 6 881 0
+	ldr	r0, [r0, #16]
+	str	r1, [sp, #28]
+	.loc 6 880 0
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
-	ldr	r2, [r1]
-	movs	r1, #36
-	ldr	r3, [r10]
-	mla	r3, r1, r3, r2
-	ldr	r2, [r0, #16]
-	str	r2, [r3, #16]
-	str	r3, [sp, #16]
-	bl	Ftl_get_new_temp_ppa
-	ldr	r3, [sp, #16]
+	.loc 6 881 0
+	movs	r2, #36
+	ldr	r3, [r8]
+	str	r2, [sp, #24]
+	str	r3, [sp, #20]
+	ldr	r3, [r1]
 	ldr	r1, [sp, #20]
+	mla	r3, r2, r1, r3
+	str	r0, [r3, #16]
+	str	r3, [sp, #20]
+	.loc 6 882 0
+	bl	Ftl_get_new_temp_ppa
+.LVL2891:
+	ldr	r3, [sp, #20]
+	.loc 6 883 0
+	ldr	r1, [sp, #28]
+	ldr	r2, [sp, #24]
+	.loc 6 882 0
 	str	r0, [r3, #4]
-	ldr	r2, [r1]
-	movs	r1, #36
-	ldr	r3, [r10]
-	ldr	r0, [fp]
-	mla	r2, r1, r3, r2
-	add	r0, r0, r7
-	ldr	r7, .L2695+28
-	ldr	r1, [r0, #8]
-	adds	r3, r3, #1
-	str	r1, [r2, #8]
-	ldr	r1, [r0, #12]
-	str	r1, [r2, #12]
+	.loc 6 883 0
+	ldr	r1, [r1]
+	ldr	r3, [r8]
+	mla	r1, r2, r3, r1
+	ldr	r3, [fp]
+	add	r3, r3, r7
+	ldr	r2, [r3, #8]
+	str	r2, [r1, #8]
+	.loc 6 884 0
+	ldr	r3, [r3, #12]
+	str	r3, [r1, #12]
+	.loc 6 892 0
 	movs	r1, #1
-	ldr	r2, [sp, #28]
-	str	r2, [r8, #12]
-	ldrh	r2, [r7]
-	strh	r2, [r8, #2]	@ movhi
-	ldr	r2, .L2695+64
-	str	r3, [r10]
+	.loc 6 885 0
+	ldr	r3, [sp, #36]
+	str	r3, [r10, #12]
+	.loc 6 886 0
+	ldr	r3, .L2688+28
+	ldrh	r2, [r3]
+	str	r3, [sp, #20]
+	strh	r2, [r10, #2]	@ movhi
+	.loc 6 889 0
+	ldr	r2, .L2688+64
+	.loc 6 892 0
+	ldr	r0, [fp]
+	.loc 6 889 0
 	ldr	r2, [r2]
-	str	r2, [r8, #4]
+	.loc 6 892 0
+	add	r0, r0, r7
+	.loc 6 889 0
+	str	r2, [r10, #4]
+	.loc 6 891 0
+	ldr	r2, [r8]
+	adds	r2, r2, #1
+	str	r2, [r8]
+	.loc 6 892 0
 	bl	FtlGcBufAlloc
-	ldr	r3, .L2695
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L2647
-	ldrb	r2, [r7, #7]	@ zero_extendqisi2
-	ldr	r3, [r10]
-	cmp	r2, r3
-	beq	.L2647
-	ldrh	r3, [r7, #4]
-	cbnz	r3, .L2645
-.L2647:
+.LVL2892:
+	.loc 6 893 0
+	ldr	r2, .L2688
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbnz	r2, .L2640
+	ldr	r3, [sp, #20]
+	ldr	r2, [r8]
+	ldrb	r1, [r3, #7]	@ zero_extendqisi2
+	cmp	r1, r2
+	beq	.L2640
+	ldrh	r3, [r3, #4]
+	cbnz	r3, .L2638
+.L2640:
+	.loc 6 894 0
 	bl	Ftl_gc_temp_data_write_back
-	cbz	r0, .L2645
-.L2692:
-	ldr	r3, .L2695+40
+.LVL2893:
+	cbz	r0, .L2638
+.LVL2894:
+.L2685:
+	.loc 6 909 0
+	ldr	r3, .L2688+40
 	movs	r2, #0
 	str	r2, [r3]
-	b	.L2691
-.L2645:
-	ldr	r3, [sp, #8]
+	b	.L2684
+.LVL2895:
+.L2638:
+	ldr	r3, [sp, #16]
 	adds	r3, r3, #1
-	b	.L2690
-.L2649:
+	b	.L2683
+.LVL2896:
+.L2642:
+	.loc 6 903 0
 	ldrh	r3, [r6, #2]
 	add	r4, r4, r3
-	ldr	r3, [sp, #4]
+.LVL2897:
+	.loc 6 905 0
+	ldr	r3, [sp, #12]
+	.loc 6 903 0
 	uxth	r4, r4
+	.loc 6 905 0
 	cmp	r3, r4
+	.loc 6 903 0
 	strh	r4, [r6, #2]	@ movhi
-	bhi	.L2651
-	ldr	r3, .L2695+68
+	.loc 6 905 0
+	bhi	.L2644
+	.loc 6 907 0
+	ldr	r3, .L2688+68
 	ldr	r3, [r3]
-	cbz	r3, .L2652
+	cbz	r3, .L2645
+	.loc 6 908 0
 	bl	Ftl_gc_temp_data_write_back
+.LVL2898:
 	cmp	r0, #0
-	bne	.L2692
-.L2652:
-	ldr	r3, .L2695+32
+	bne	.L2685
+.L2645:
+	.loc 6 913 0
+	ldr	r3, .L2688+32
 	ldrh	r1, [r3]
-	cbnz	r1, .L2653
-	ldr	r3, .L2695+72
+	cbnz	r1, .L2646
+	ldr	r3, .L2688+72
 	ldrh	r2, [r6]
 	ldr	r3, [r3]
 	ldrh	r0, [r3, r2, lsl #1]
-	cbz	r0, .L2653
+	cbz	r0, .L2646
+	.loc 6 915 0
 	strh	r1, [r3, r2, lsl #1]	@ movhi
+	.loc 6 916 0
 	ldrh	r0, [r6]
 	bl	update_vpc_list
+.LVL2899:
+	.loc 6 917 0
 	bl	FtlCacheWriteBack
+.LVL2900:
+	.loc 6 918 0
 	bl	l2p_flush
+.LVL2901:
+	.loc 6 919 0
 	bl	FtlVpcTblFlush
-.L2653:
+.LVL2902:
+.L2646:
+	.loc 6 921 0
 	movw	r3, #65535
 	strh	r3, [r6]	@ movhi
-.L2651:
-	ldr	r3, .L2695+76
+.L2644:
+	.loc 6 923 0
+	ldr	r3, .L2688+76
 	ldrh	r0, [r3]
 	cmp	r0, #2
-	bhi	.L2654
-	ldr	r3, .L2695+44
+	bhi	.L2647
+	.loc 6 925 0
+	ldr	r3, .L2688+44
 	ldrh	r4, [r3]
-	b	.L2625
-.L2654:
-	ldr	r3, .L2695+40
+.LVL2903:
+	b	.L2618
+.LVL2904:
+.L2647:
+	.loc 6 928 0
+	ldr	r3, .L2688+40
 	movs	r2, #0
+	.loc 6 933 0
 	adds	r0, r0, #1
+.LVL2905:
+	.loc 6 928 0
 	str	r2, [r3]
-	b	.L2603
-.L2655:
+	b	.L2596
+.LVL2906:
+.L2648:
+.LBE531:
+.LBE532:
+	.loc 6 542 0
 	movs	r0, #0
-	b	.L2603
-.L2657:
-	mov	r0, r3
-	b	.L2603
-.L2696:
+.LVL2907:
+	b	.L2596
+.L2689:
 	.align	2
-.L2695:
+.L2688:
 	.word	.LANCHOR8
-	.word	.LANCHOR90
+	.word	.LANCHOR91
 	.word	.LANCHOR238
-	.word	.LC4
-	.word	.LC5
 	.word	.LC6
-	.word	.LANCHOR91
+	.word	.LC7
+	.word	.LC8
 	.word	.LANCHOR92
+	.word	.LANCHOR93
 	.word	.LANCHOR236
 	.word	.LANCHOR237
-	.word	.LANCHOR169
-	.word	.LANCHOR51
+	.word	.LANCHOR168
 	.word	.LANCHOR52
-	.word	.LANCHOR36
+	.word	.LANCHOR53
+	.word	.LANCHOR37
 	.word	.LANCHOR201+14
-	.word	.LANCHOR179
-	.word	.LANCHOR158
+	.word	.LANCHOR178
+	.word	.LANCHOR157
 	.word	.LANCHOR102
-	.word	.LANCHOR82
-	.word	.LANCHOR87
+	.word	.LANCHOR83
+	.word	.LANCHOR88
 	.word	.LANCHOR106
+.LVL2908:
+.L2650:
+	mov	r0, r3
+.LVL2909:
+	b	.L2596
+	.cfi_endproc
+.LFE407:
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
 	.section	.text.FtlInit,"ax",%progbits
 	.align	1
@@ -18797,73 +30532,130 @@ rk_ftl_garbage_collect:
 	.fpu softvfp
 	.type	FtlInit, %function
 FtlInit:
+.LFB302:
+	.loc 4 915 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL2910:
 	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 4 916 0
 	mov	r3, #-1
-	ldr	r4, .L2706
+	ldr	r4, .L2699
+	.loc 4 915 0
 	mov	r5, r0
-	ldr	r2, .L2706+4
+	.loc 4 917 0
+	ldr	r2, .L2699+4
+	.loc 4 916 0
 	str	r3, [r4]
+	.loc 4 917 0
 	movs	r3, #0
-	ldr	r1, .L2706+8
+	.loc 4 928 0
+	ldr	r1, .L2699+8
+	.loc 4 917 0
 	str	r3, [r2]
-	ldr	r2, .L2706+12
-	ldr	r0, .L2706+16
+	.loc 4 918 0
+	ldr	r2, .L2699+12
+	.loc 4 928 0
+	ldr	r0, .L2699+16
+.LVL2911:
+	.loc 4 918 0
 	str	r3, [r2]
+	.loc 4 928 0
 	bl	printf
+.LVL2912:
+	.loc 4 930 0
 	mov	r0, r5
 	bl	FtlConstantsInit
+.LVL2913:
+	.loc 4 931 0
 	bl	FtlMemInit
+.LVL2914:
+	.loc 4 932 0
 	bl	FtlVariablesInit
-	ldr	r3, .L2706+20
+.LVL2915:
+	.loc 4 933 0
+	ldr	r3, .L2699+20
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
+.LVL2916:
+	.loc 4 948 0
 	bl	FtlLoadBbt
-	cbz	r0, .L2698
-	ldr	r1, .L2706+24
-	ldr	r0, .L2706+28
-.L2705:
+.LVL2917:
+	cbz	r0, .L2691
+	.loc 4 949 0
+	ldr	r1, .L2699+24
+	ldr	r0, .L2699+28
+.L2698:
+	.loc 4 956 0
 	bl	printf
-.L2699:
+.LVL2918:
+.L2692:
+	.loc 4 1000 0
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L2698:
+.LVL2919:
+.L2691:
+	.loc 4 954 0
 	bl	FtlSysBlkInit
-	cbz	r0, .L2700
-	ldr	r1, .L2706+24
-	ldr	r0, .L2706+32
-	b	.L2705
-.L2700:
+.LVL2920:
+	cbz	r0, .L2693
+	.loc 4 956 0
+	ldr	r1, .L2699+24
+	ldr	r0, .L2699+32
+	b	.L2698
+.L2693:
+	.loc 4 961 0
 	movs	r1, #1
 	str	r1, [r4]
+	.loc 4 965 0
 	bl	rk_ftl_garbage_collect
-	ldr	r3, .L2706+36
+.LVL2921:
+	.loc 4 967 0
+	ldr	r3, .L2699+36
 	ldrh	r3, [r3]
 	cmp	r3, #15
-	bhi	.L2699
+	bhi	.L2692
 	mov	r4, #1024
-.L2702:
+.L2695:
+.LVL2922:
+.LBB537:
+.LBB538:
+.LBB539:
+	.loc 4 987 0
 	movs	r1, #1
 	mov	r0, r1
 	bl	rk_ftl_garbage_collect
+.LVL2923:
+	.loc 4 986 0
 	subs	r4, r4, #1
-	bne	.L2702
-	b	.L2699
-.L2707:
+.LVL2924:
+	bne	.L2695
+	b	.L2692
+.L2700:
 	.align	2
-.L2706:
+.L2699:
 	.word	.LANCHOR223
 	.word	.LANCHOR239
-	.word	.LC48
-	.word	.LANCHOR75
-	.word	.LC6
-	.word	.LANCHOR37
+	.word	.LC51
+	.word	.LANCHOR76
+	.word	.LC8
+	.word	.LANCHOR38
 	.word	.LANCHOR240
-	.word	.LC49
-	.word	.LC50
-	.word	.LANCHOR87
-	.size	FtlInit, .-FtlInit
+	.word	.LC52
+	.word	.LC53
+	.word	.LANCHOR88
+.LBE539:
+.LBE538:
+.LBE537:
+	.cfi_endproc
+.LFE302:
+	.size	FtlInit, .-FtlInit
 	.section	.text.rk_ftl_init,"ax",%progbits
 	.align	1
 	.global	rk_ftl_init
@@ -18873,25 +30665,44 @@ FtlInit:
 	.fpu softvfp
 	.type	rk_ftl_init, %function
 rk_ftl_init:
+.LFB492:
+	.loc 7 105 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL2925:
 	push	{r4, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 4, -8
+	.cfi_offset 14, -4
+	.loc 7 108 0
 	bl	FlashInit
+.LVL2926:
+	.loc 7 109 0
 	mov	r4, r0
-	cbnz	r0, .L2709
-	ldr	r0, .L2710
+	cbnz	r0, .L2702
+	.loc 7 110 0
+	ldr	r0, .L2703
+.LVL2927:
 	bl	FtlInit
-.L2709:
+.LVL2928:
+.L2702:
+	.loc 7 111 0
 	mov	r1, r4
-	ldr	r0, .L2710+4
+	ldr	r0, .L2703+4
 	bl	printf
+.LVL2929:
+	.loc 7 113 0
 	mov	r0, r4
 	pop	{r4, pc}
-.L2711:
+.LVL2930:
+.L2704:
 	.align	2
-.L2710:
+.L2703:
 	.word	.LANCHOR15
-	.word	.LC51
+	.word	.LC54
+	.cfi_endproc
+.LFE492:
 	.size	rk_ftl_init, .-rk_ftl_init
 	.section	.text.ftl_fix_nand_power_lost_error,"ax",%progbits
 	.align	1
@@ -18902,117 +30713,219 @@ rk_ftl_init:
 	.fpu softvfp
 	.type	ftl_fix_nand_power_lost_error, %function
 ftl_fix_nand_power_lost_error:
+.LFB379:
+	.loc 1 2483 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2726
+	.loc 1 2484 0
+	ldr	r3, .L2719
+	.loc 1 2483 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
 	sub	sp, sp, #56
+	.cfi_def_cfa_offset 88
+	.loc 1 2484 0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L2712
-	ldr	r7, .L2726+4
-	ldr	r6, .L2726+8
-	ldr	r10, .L2726+32
+	beq	.L2705
+.LVL2931:
+.LBB540:
+	.loc 1 2486 0
+	ldr	r7, .L2719+4
+	.loc 1 2488 0
+	ldr	r6, .L2719+8
+	.loc 1 2491 0
+	ldr	r10, .L2719+32
+	.loc 1 2486 0
 	ldrh	r5, [r7]
+.LVL2932:
+	.loc 1 2488 0
 	ldr	r3, [r6]
-	ldr	r4, .L2726+12
+	.loc 1 2492 0
+	ldr	r4, .L2719+12
+	.loc 1 2488 0
 	mov	r1, r5
-	ldr	r0, .L2726+16
+	ldr	r0, .L2719+16
 	ldrh	r2, [r3, r5, lsl #1]
 	lsl	r8, r5, #1
 	bl	printf
+.LVL2933:
+	.loc 1 2491 0
 	ldrh	r0, [r10]
 	bl	FtlGcRefreshBlock
+.LVL2934:
+	.loc 1 2492 0
 	ldrh	r0, [r4]
 	bl	FtlGcRefreshBlock
+.LVL2935:
+	.loc 1 2493 0
 	mov	r0, r10
 	bl	allocate_new_data_superblock
+.LVL2936:
+	.loc 1 2494 0
 	mov	r0, r4
+	.loc 1 2496 0
 	movw	r4, #4097
+	.loc 1 2494 0
 	bl	allocate_new_data_superblock
+.LVL2937:
 	str	r7, [sp, #4]
-.L2714:
+.LVL2938:
+.L2707:
+	.loc 1 2496 0
 	subs	r4, r4, #1
-	beq	.L2718
+.LVL2939:
+	beq	.L2711
+.LVL2940:
+	.loc 1 2497 0
 	movs	r1, #1
 	mov	r0, r1
 	bl	rk_ftl_garbage_collect
+.LVL2941:
+	.loc 1 2498 0
 	ldr	r3, [r6]
 	ldrh	r3, [r3, r8]
 	cmp	r3, #0
-	bne	.L2714
-.L2718:
+	bne	.L2707
+.LVL2942:
+.L2711:
+	.loc 1 2501 0
 	ldr	r3, [r6]
 	mov	r1, r5
-	ldr	r0, .L2726+16
+	ldr	r0, .L2719+16
 	ldrh	r2, [r3, r5, lsl #1]
 	bl	printf
+.LVL2943:
+	.loc 1 2502 0
 	ldr	r3, [r6]
 	ldrh	r4, [r3, r5, lsl #1]
-	cbnz	r4, .L2716
+	cbnz	r4, .L2709
+.LVL2944:
+.LBB541:
+	.loc 1 2509 0
 	add	r0, sp, #56
-	ldr	r7, .L2726+20
+	.loc 1 2516 0
+	ldr	r7, .L2719+20
+	.loc 1 2509 0
 	strh	r5, [r0, #-48]!	@ movhi
+	.loc 1 2515 0
 	movw	r10, #65535
+	.loc 1 2510 0
 	bl	make_superblock
-	ldr	r3, .L2726+24
+.LVL2945:
+	.loc 1 2513 0
+	ldr	r3, .L2719+24
 	add	r0, sp, #22
+	.loc 1 2516 0
 	ldr	r8, [r7]
+	.loc 1 2513 0
 	mov	r2, r4
+	.loc 1 2516 0
 	mov	fp, #36
+	.loc 1 2517 0
 	mov	ip, r4
+	.loc 1 2513 0
 	ldrh	lr, [r3]
-.L2719:
+.LVL2946:
+.L2712:
+	.loc 1 2513 0 is_stmt 0 discriminator 1
 	uxth	r3, r2
 	cmp	lr, r3
-	bhi	.L2721
+	bhi	.L2714
+	.loc 1 2522 0 is_stmt 1
 	ldr	r3, [r6]
 	mov	r1, r5
-	ldr	r0, .L2726+28
+	ldr	r0, .L2719+28
 	ldrh	r2, [r3, r5, lsl #1]
+.LVL2947:
 	bl	printf
+.LVL2948:
+	.loc 1 2523 0
 	mov	r2, r4
 	movs	r1, #0
 	ldr	r0, [r7]
 	bl	FlashEraseBlocks
+.LVL2949:
+	.loc 1 2524 0
 	mov	r2, r4
 	movs	r1, #1
 	ldr	r0, [r7]
 	bl	FlashEraseBlocks
-.L2716:
+.LVL2950:
+.L2709:
+.LBE541:
+	.loc 1 2526 0
 	ldr	r2, [sp, #4]
 	movw	r3, #65535
 	strh	r3, [r2]	@ movhi
-.L2712:
+.LVL2951:
+.L2705:
+.LBE540:
+	.loc 1 2528 0
 	add	sp, sp, #56
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2721:
+.LVL2952:
+.L2714:
+	.cfi_restore_state
+.LBB543:
+.LBB542:
+	.loc 1 2514 0
 	ldrh	r3, [r0, #2]!
+.LVL2953:
+	.loc 1 2515 0
 	cmp	r3, r10
-	beq	.L2720
+	beq	.L2713
+	.loc 1 2516 0
 	mla	r1, fp, r4, r8
+	.loc 1 2519 0
 	adds	r4, r4, #1
+.LVL2954:
+	.loc 1 2516 0
 	lsls	r3, r3, #10
+.LVL2955:
+	.loc 1 2519 0
 	uxth	r4, r4
+.LVL2956:
+	.loc 1 2516 0
 	str	r3, [r1, #4]
+.LVL2957:
+	.loc 1 2517 0
 	str	ip, [r1, #8]
+	.loc 1 2518 0
 	str	ip, [r1, #12]
-.L2720:
+.L2713:
+.LVL2958:
 	adds	r2, r2, #1
-	b	.L2719
-.L2727:
+.LVL2959:
+	b	.L2712
+.L2720:
 	.align	2
-.L2726:
+.L2719:
 	.word	.LANCHOR8
 	.word	.LANCHOR229
-	.word	.LANCHOR82
+	.word	.LANCHOR83
+	.word	.LANCHOR92
+	.word	.LC55
+	.word	.LANCHOR77
+	.word	.LANCHOR37
+	.word	.LC56
 	.word	.LANCHOR91
-	.word	.LC52
-	.word	.LANCHOR76
-	.word	.LANCHOR36
-	.word	.LC53
-	.word	.LANCHOR90
+.LBE542:
+.LBE543:
+	.cfi_endproc
+.LFE379:
 	.size	ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error
 	.section	.text.ftl_read,"ax",%progbits
 	.align	1
@@ -19023,297 +30936,477 @@ ftl_fix_nand_power_lost_error:
 	.fpu softvfp
 	.type	ftl_read, %function
 ftl_read:
+.LFB305:
+	.loc 4 1430 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 64
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL2960:
+	.loc 4 1440 0
 	cmp	r0, #16
+	.loc 4 1430 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
 	sub	sp, sp, #64
+	.cfi_def_cfa_offset 96
+	.loc 4 1430 0
 	mov	r6, r1
 	mov	r7, r3
 	str	r2, [sp, #28]
-	bne	.L2729
+	.loc 4 1440 0
+	bne	.L2722
+	.loc 4 1441 0
 	mov	r2, r3
+.LVL2961:
 	ldr	r1, [sp, #28]
+.LVL2962:
 	add	r0, r6, #256
+.LVL2963:
 	bl	FtlVendorPartRead
+.LVL2964:
 	str	r0, [sp, #8]
-.L2728:
+.LVL2965:
+.L2721:
+	.loc 4 1529 0
 	ldr	r0, [sp, #8]
 	add	sp, sp, #64
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2729:
+.LVL2966:
+.L2722:
+	.cfi_restore_state
+	.loc 4 1446 0
 	ldr	r3, [sp, #28]
+.LVL2967:
 	adds	r3, r1, r3
 	str	r3, [sp, #12]
-	ldr	r3, .L2766
+	ldr	r3, .L2759
 	ldr	r2, [sp, #12]
+.LVL2968:
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L2751
-	ldr	r3, .L2766+4
+	bhi	.L2744
+	.loc 4 1446 0 is_stmt 0 discriminator 1
+	ldr	r3, .L2759+4
 	ldr	r3, [r3]
-	adds	r4, r3, #1
-	beq	.L2752
+	adds	r0, r3, #1
+.LVL2969:
+	beq	.L2745
+	.loc 4 1449 0 is_stmt 1
 	bl	FtlCacheWriteBack
-	ldr	r3, .L2766+8
+.LVL2970:
+	.loc 4 1451 0
+	ldr	r3, .L2759+8
 	mov	r0, r6
-	ldr	r8, .L2766+48
 	ldrh	r4, [r3]
 	mov	r1, r4
 	bl	__aeabi_uidiv
+.LVL2971:
+	.loc 4 1452 0
 	ldr	r3, [sp, #12]
 	mov	r1, r4
+	.loc 4 1451 0
 	str	r0, [sp, #16]
+.LVL2972:
+	.loc 4 1452 0
 	subs	r0, r3, #1
+.LVL2973:
 	bl	__aeabi_uidiv
+.LVL2974:
+	.loc 4 1453 0
 	ldr	r3, [sp, #16]
-	ldr	r2, .L2766+12
+	.loc 4 1457 0
+	ldr	r2, .L2759+12
+	.loc 4 1451 0
 	ldr	r4, [sp, #16]
+	.loc 4 1453 0
 	rsb	r3, r3, #1
+	.loc 4 1452 0
 	str	r0, [sp, #20]
+.LVL2975:
+	.loc 4 1453 0
 	add	r3, r3, r0
 	str	r3, [sp, #4]
+.LVL2976:
+	.loc 4 1457 0
 	ldr	r1, [sp, #4]
 	ldr	r3, [r2]
+.LVL2977:
 	add	r3, r3, r1
 	str	r3, [r2]
+	.loc 4 1444 0
 	movs	r3, #0
+	.loc 4 1456 0
 	mov	r5, r3
+	.loc 4 1444 0
 	str	r3, [sp]
 	str	r3, [sp, #24]
+	.loc 4 1431 0
 	str	r3, [sp, #8]
-.L2731:
+.LVL2978:
+.L2724:
+	.loc 4 1458 0
 	ldr	r3, [sp, #4]
-	cbnz	r3, .L2750
-	ldr	r3, .L2766+16
+	cbnz	r3, .L2743
+	.loc 4 1526 0
+	ldr	r3, .L2759+16
 	ldrh	r3, [r3]
 	cmp	r3, #0
-	beq	.L2728
+	beq	.L2721
+	.loc 4 1527 0
 	movs	r1, #1
 	ldr	r0, [sp, #4]
 	bl	rk_ftl_garbage_collect
-	b	.L2728
-.L2750:
-	movs	r2, #0
+.LVL2979:
+	b	.L2721
+.LVL2980:
+.L2743:
+	.loc 4 1459 0
 	add	r1, sp, #60
+	movs	r2, #0
 	mov	r0, r4
 	bl	log2phys
+.LVL2981:
+	.loc 4 1460 0
 	ldr	r3, [sp, #60]
-	adds	r0, r3, #1
-	bne	.L2732
-	ldr	fp, .L2766+8
-	mov	r10, #0
-.L2733:
-	ldrh	r0, [fp]
-	cmp	r10, r0
-	bcc	.L2735
-.L2736:
+	adds	r1, r3, #1
+	bne	.L2725
+	.loc 4 1461 0 discriminator 1
+	ldr	r10, .L2759+8
+	mov	r8, #0
+.L2726:
+.LVL2982:
+	ldrh	r0, [r10]
+	cmp	r8, r0
+	bcc	.L2728
+.LVL2983:
+.L2729:
+	.loc 4 1490 0
 	ldr	r3, [sp, #4]
+	.loc 4 1488 0
 	adds	r4, r4, #1
+.LVL2984:
+	.loc 4 1490 0
 	subs	r3, r3, #1
+.LVL2985:
 	str	r3, [sp, #4]
-	beq	.L2740
-	ldr	r3, .L2766+20
+	beq	.L2733
+	.loc 4 1490 0 is_stmt 0 discriminator 1
+	ldr	r3, .L2759+20
+.LVL2986:
 	ldrh	r3, [r3]
 	cmp	r5, r3, lsl #2
-	bne	.L2731
-.L2740:
+	bne	.L2724
+.L2733:
+	.loc 4 1491 0 is_stmt 1
 	cmp	r5, #0
-	beq	.L2731
+	beq	.L2724
+	.loc 4 1492 0
+	ldr	r3, .L2759+24
 	movs	r2, #0
 	mov	r1, r5
-	ldr	r0, [r8]
-	mov	r10, #0
+	.loc 4 1498 0
+	ldr	r10, .L2759+48
+	.loc 4 1493 0
+	mov	r8, #0
+	.loc 4 1492 0
+	ldr	r0, [r3]
 	bl	FlashReadPages
+.LVL2987:
+	.loc 4 1499 0
 	ldr	r3, [sp]
 	lsls	r3, r3, #9
 	str	r3, [sp, #44]
+	.loc 4 1496 0
 	ldr	r3, [sp, #32]
 	lsls	r3, r3, #9
 	str	r3, [sp, #36]
 	ldr	r3, [sp, #24]
 	lsls	r3, r3, #9
 	str	r3, [sp, #40]
-.L2749:
+.LVL2988:
+.L2742:
+	.loc 4 1494 0
+	ldr	r3, .L2759+24
 	mov	fp, #36
-	ldr	r3, [r8]
-	mul	fp, fp, r10
+	mul	fp, fp, r8
 	ldr	r1, [sp, #16]
+	ldr	r3, [r3]
 	add	r3, r3, fp
 	ldr	r2, [r3, #16]
 	cmp	r1, r2
-	bne	.L2742
+	bne	.L2735
+	.loc 4 1495 0
 	ldr	r1, [r3, #8]
-	ldr	r3, .L2766+24
+	ldr	r3, .L2759+28
 	ldr	r3, [r3]
 	cmp	r1, r3
-	bne	.L2743
+	bne	.L2736
+	.loc 4 1496 0
 	ldr	r3, [sp, #36]
 	mov	r0, r7
 	ldr	r2, [sp, #40]
 	add	r1, r1, r3
-.L2765:
+.L2758:
+	.loc 4 1499 0
 	bl	ftl_memcpy
-.L2743:
-	ldr	r3, [r8]
-	add	r2, r3, fp
-	ldr	r3, [r3, fp]
-	adds	r1, r3, #1
-	bne	.L2744
-	ldr	r1, .L2766+28
-	str	r3, [sp, #8]
-	ldr	r2, [r1, #72]
+.LVL2989:
+.L2736:
+	.loc 4 1501 0
+	ldr	r3, .L2759+24
+	ldr	r3, [r3]
+	ldr	r1, [r3, fp]
+	add	ip, r3, fp
+	adds	r2, r1, #1
+	bne	.L2737
+	.loc 4 1502 0
+	ldr	r0, .L2759+32
+	.loc 4 1503 0
+	str	r1, [sp, #8]
+	.loc 4 1502 0
+	ldr	r2, [r0, #72]
 	adds	r2, r2, #1
-	str	r2, [r1, #72]
-.L2745:
-	add	r10, r10, #1
-	cmp	r5, r10
-	bne	.L2749
+	str	r2, [r0, #72]
+.LVL2990:
+.L2737:
+	.loc 4 1505 0
+	ldr	r3, [r3, fp]
+	cmp	r3, #256
+	bne	.L2738
+.LBB544:
+	.loc 4 1507 0
+	ldr	r0, [ip, #4]
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+.LVL2991:
+	mov	fp, r0
+.LVL2992:
+	.loc 4 1508 0
+	bl	FtlGcRefreshBlock
+.LVL2993:
+	.loc 4 1517 0
+	ldr	r2, .L2759+36
+	.loc 4 1508 0
+	movw	r3, #2049
+.LVL2994:
+.L2740:
+	.loc 4 1514 0
+	subs	r3, r3, #1
+.LVL2995:
+	bne	.L2739
+.LVL2996:
+.L2741:
+	.loc 4 1518 0
+	bl	FtlSysFlush
+.LVL2997:
+.L2738:
+.LBE544:
+	.loc 4 1493 0 discriminator 2
+	add	r8, r8, #1
+.LVL2998:
+	cmp	r5, r8
+	bne	.L2742
+	.loc 4 1522 0
 	movs	r5, #0
-	b	.L2731
-.L2735:
-	mla	r0, r0, r4, r10
+.LVL2999:
+	b	.L2724
+.LVL3000:
+.L2728:
+	.loc 4 1462 0
+	mla	r0, r0, r4, r8
+.LVL3001:
+	.loc 4 1463 0
 	cmp	r6, r0
-	bhi	.L2734
+	bhi	.L2727
+	.loc 4 1463 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #12]
 	cmp	r3, r0
-	bls	.L2734
+	bls	.L2727
+	.loc 4 1464 0 is_stmt 1
 	subs	r0, r0, r6
+.LVL3002:
 	mov	r2, #512
 	movs	r1, #0
 	add	r0, r7, r0, lsl #9
 	bl	ftl_memset
-.L2734:
-	add	r10, r10, #1
-	b	.L2733
-.L2732:
-	ldr	r2, [r8]
-	mov	r10, #36
-	mla	r10, r10, r5, r2
-	str	r3, [r10, #4]
+.LVL3003:
+.L2727:
+	.loc 4 1461 0 discriminator 2
+	add	r8, r8, #1
+.LVL3004:
+	b	.L2726
+.LVL3005:
+.L2725:
+	.loc 4 1467 0
+	ldr	r2, .L2759+24
+	mov	r8, #36
+	ldr	r2, [r2]
+	mla	r8, r8, r5, r2
+	str	r3, [r8, #4]
+	.loc 4 1468 0
 	ldr	r3, [sp, #16]
 	cmp	r4, r3
-	ldr	r3, .L2766+8
-	bne	.L2737
-	ldr	r2, .L2766+24
+	ldr	r3, .L2759+8
+	bne	.L2730
+	.loc 4 1469 0
+	ldr	r2, .L2759+28
+	.loc 4 1470 0
 	mov	r0, r6
-	ldrh	fp, [r3]
+	ldrh	r10, [r3]
+	.loc 4 1469 0
 	ldr	r2, [r2]
-	mov	r1, fp
-	str	r2, [r10, #8]
+	.loc 4 1470 0
+	mov	r1, r10
+	.loc 4 1469 0
+	str	r2, [r8, #8]
+	.loc 4 1470 0
 	bl	__aeabi_uidivmod
+.LVL3006:
 	ldr	r2, [sp, #28]
-	sub	r3, fp, r1
+	.loc 4 1471 0
+	sub	r3, r10, r1
+	.loc 4 1470 0
 	str	r1, [sp, #32]
+.LVL3007:
 	cmp	r3, r2
 	it	cs
 	movcs	r3, r2
-	cmp	fp, r3
+.LVL3008:
+	.loc 4 1473 0
+	cmp	r3, r10
 	str	r3, [sp, #24]
-	bne	.L2738
-	str	r7, [r10, #8]
-.L2738:
-	ldr	r3, .L2766+32
-	ldr	r2, .L2766+36
-	str	r4, [r10, #16]
+.LVL3009:
+	bne	.L2731
+	.loc 4 1474 0
+	str	r7, [r8, #8]
+.LVL3010:
+.L2731:
+	.loc 4 1483 0
+	ldr	r3, .L2759+40
+	ldr	r2, .L2759+44
+	.loc 4 1484 0
+	str	r4, [r8, #16]
+	.loc 4 1483 0
 	ldrh	r3, [r3]
 	ldr	r2, [r2]
 	muls	r3, r5, r3
+	.loc 4 1485 0
 	adds	r5, r5, #1
+.LVL3011:
+	.loc 4 1483 0
 	bic	r3, r3, #3
 	add	r3, r3, r2
-	str	r3, [r10, #12]
-	b	.L2736
-.L2737:
+	str	r3, [r8, #12]
+	b	.L2729
+.L2730:
+	.loc 4 1475 0
 	ldr	r2, [sp, #20]
 	cmp	r4, r2
-	bne	.L2739
-	ldr	r2, .L2766+40
+	bne	.L2732
+	.loc 4 1476 0
+	ldr	r2, .L2759+48
+	.loc 4 1477 0
 	ldr	r1, [sp, #12]
+	.loc 4 1476 0
 	ldr	r2, [r2]
-	str	r2, [r10, #8]
+	str	r2, [r8, #8]
+	.loc 4 1477 0
 	ldrh	r2, [r3]
 	mul	r3, r2, r4
 	subs	r1, r1, r3
+	.loc 4 1478 0
 	cmp	r2, r1
+	.loc 4 1477 0
 	str	r1, [sp]
-	bne	.L2738
-.L2764:
+.LVL3012:
+	.loc 4 1478 0
+	bne	.L2731
+.LVL3013:
+.L2757:
+	.loc 4 1481 0
 	subs	r3, r3, r6
 	add	r3, r7, r3, lsl #9
-	str	r3, [r10, #8]
-	b	.L2738
-.L2739:
+	str	r3, [r8, #8]
+	b	.L2731
+.L2732:
 	ldrh	r3, [r3]
 	muls	r3, r4, r3
-	b	.L2764
-.L2742:
+	b	.L2757
+.LVL3014:
+.L2735:
+	.loc 4 1497 0
 	ldr	r1, [sp, #20]
 	cmp	r1, r2
-	bne	.L2743
+	bne	.L2736
+	.loc 4 1498 0
 	ldr	r1, [r3, #8]
-	ldr	r3, .L2766+40
-	ldr	r3, [r3]
+	ldr	r3, [r10]
 	cmp	r1, r3
-	bne	.L2743
-	ldr	r3, .L2766+8
+	bne	.L2736
+	.loc 4 1499 0
+	ldr	r3, .L2759+8
 	ldr	r2, [sp, #44]
 	ldrh	r0, [r3]
 	ldr	r3, [sp, #20]
 	muls	r0, r3, r0
 	subs	r0, r0, r6
 	add	r0, r7, r0, lsl #9
-	b	.L2765
-.L2744:
-	cmp	r3, #256
-	bne	.L2745
-	ldr	r0, [r2, #4]
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-	mov	fp, r0
-	bl	FtlGcRefreshBlock
-	ldr	r2, .L2766+44
-	movw	r3, #2049
-.L2747:
-	subs	r3, r3, #1
-	bne	.L2746
-.L2748:
-	bl	FtlSysFlush
-	b	.L2745
-.L2746:
+	b	.L2758
+.LVL3015:
+.L2739:
+.LBB545:
+	.loc 4 1516 0
 	movs	r1, #1
 	str	r2, [sp, #52]
 	mov	r0, r1
 	str	r3, [sp, #48]
+.LVL3016:
 	bl	rk_ftl_garbage_collect
+.LVL3017:
+	.loc 4 1517 0
 	ldr	r2, [sp, #52]
 	ldr	r3, [sp, #48]
 	ldrh	r1, [r2]
 	cmp	r1, fp
-	beq	.L2747
-	b	.L2748
-.L2751:
+	beq	.L2740
+	b	.L2741
+.LVL3018:
+.L2744:
+.LBE545:
+	.loc 4 1447 0
 	mov	r3, #-1
-.L2752:
+.LVL3019:
+.L2745:
 	str	r3, [sp, #8]
-	b	.L2728
-.L2767:
+	b	.L2721
+.L2760:
 	.align	2
-.L2766:
-	.word	.LANCHOR67
+.L2759:
+	.word	.LANCHOR68
 	.word	.LANCHOR223
-	.word	.LANCHOR54
-	.word	.LANCHOR164
+	.word	.LANCHOR55
+	.word	.LANCHOR163
 	.word	.LANCHOR114
-	.word	.LANCHOR36
+	.word	.LANCHOR37
+	.word	.LANCHOR177
 	.word	.LANCHOR183
-	.word	.LANCHOR136
-	.word	.LANCHOR57
+	.word	.LANCHOR135
+	.word	.LANCHOR201
+	.word	.LANCHOR58
 	.word	.LANCHOR186
 	.word	.LANCHOR184
-	.word	.LANCHOR201
-	.word	.LANCHOR178
+	.cfi_endproc
+.LFE305:
 	.size	ftl_read, .-ftl_read
 	.section	.text.ftl_write,"ax",%progbits
 	.align	1
@@ -19324,91 +31417,163 @@ ftl_read:
 	.fpu softvfp
 	.type	ftl_write, %function
 ftl_write:
+.LFB308:
+	.loc 4 1594 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 80
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL3020:
+	.loc 4 1602 0
 	cmp	r0, #16
+	.loc 4 1594 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
 	sub	sp, sp, #80
+	.cfi_def_cfa_offset 112
+	.loc 4 1594 0
 	mov	r7, r1
 	str	r2, [sp, #12]
 	str	r3, [sp, #4]
-	bne	.L2769
+	.loc 4 1602 0
+	bne	.L2762
+	.loc 4 1603 0
 	mov	r2, r3
+.LVL3021:
 	ldr	r1, [sp, #12]
+.LVL3022:
 	add	r0, r7, #256
+.LVL3023:
 	bl	FtlVendorPartWrite
-.L2768:
+.LVL3024:
+.L2761:
+	.loc 4 1775 0
 	add	sp, sp, #80
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2769:
+.LVL3025:
+.L2762:
+	.cfi_restore_state
+	.loc 4 1606 0
 	ldr	r3, [sp, #12]
+.LVL3026:
 	adds	r5, r1, r3
-	ldr	r3, .L2823
+	ldr	r3, .L2816
 	ldr	r3, [r3]
 	cmp	r5, r3
-	bhi	.L2803
-	ldr	r3, .L2823+4
+	bhi	.L2796
+	.loc 4 1606 0 is_stmt 0 discriminator 1
+	ldr	r3, .L2816+4
 	ldr	r0, [r3]
+.LVL3027:
 	adds	r4, r0, #1
-	beq	.L2768
-	ldr	r3, .L2823+8
+	beq	.L2761
+	.loc 4 1609 0 is_stmt 1
+	ldr	r3, .L2816+8
 	mov	r2, #2048
+.LVL3028:
+	.loc 4 1610 0
 	mov	r0, r7
+	.loc 4 1609 0
 	str	r2, [r3]
-	ldr	r3, .L2823+12
+	.loc 4 1610 0
+	ldr	r3, .L2816+12
 	ldrh	r4, [r3]
 	mov	r1, r4
+.LVL3029:
 	bl	__aeabi_uidiv
+.LVL3030:
+	.loc 4 1611 0
 	mov	r1, r4
+	.loc 4 1610 0
 	mov	r10, r0
+.LVL3031:
+	.loc 4 1611 0
 	subs	r0, r5, #1
+.LVL3032:
 	bl	__aeabi_uidiv
-	ldr	r2, .L2823+16
+.LVL3033:
+	.loc 4 1614 0
+	ldr	r2, .L2816+16
+	.loc 4 1612 0
 	sub	r5, r0, r10
 	adds	r3, r5, #1
+	.loc 4 1614 0
 	adds	r1, r5, #1
+	.loc 4 1612 0
 	str	r3, [sp, #8]
+	.loc 4 1614 0
 	ldr	r3, [r2]
+	.loc 4 1611 0
 	str	r0, [sp, #20]
+.LVL3034:
+	.loc 4 1614 0
 	add	r3, r3, r1
 	str	r3, [r2]
-	ldr	r3, .L2823+20
+	.loc 4 1615 0
+	ldr	r3, .L2816+20
 	ldr	r8, [r3]
 	cmp	r8, #0
-	beq	.L2771
+	beq	.L2764
+	.loc 4 1616 0
 	ldr	r3, [r8, #16]
 	cmp	r10, r3
-	beq	.L2772
+	beq	.L2765
+	.loc 4 1617 0
 	bl	FtlCacheWriteBack
-.L2771:
-	ldr	r5, .L2823+24
+.LVL3035:
+.L2764:
+	.loc 4 1644 0
+	ldr	r5, .L2816+24
+	.loc 4 1643 0
 	mov	r4, r10
-.L2773:
+.LVL3036:
+.L2766:
 	ldr	r3, [sp, #8]
 	cmp	r3, #0
-	beq	.L2802
-	ldr	r6, .L2823+28
+	beq	.L2795
+	.loc 4 1644 0
+	ldr	r6, .L2816+28
 	ldrb	r2, [r5, #6]	@ zero_extendqisi2
 	ldrh	r3, [r6]
 	cmp	r2, r3
-	bcc	.L2774
-	ldr	r1, .L2823+32
-	mov	r2, #1632
-	ldr	r0, .L2823+36
+	bcc	.L2767
+	.loc 4 1644 0 is_stmt 0 discriminator 1
+	ldr	r1, .L2816+32
+	movw	r2, #1644
+	ldr	r0, .L2816+36
 	bl	printf
-	ldr	r1, .L2823+40
-	ldr	r0, .L2823+44
+.LVL3037:
+	ldr	r1, .L2816+40
+	ldr	r0, .L2816+44
 	bl	printf
-.L2774:
+.LVL3038:
+.L2767:
+	.loc 4 1645 0 is_stmt 1
 	ldrh	r3, [r5, #4]
-	cbnz	r3, .L2775
+	cbnz	r3, .L2768
+	.loc 4 1646 0
 	bl	FtlCacheWriteBack
+.LVL3039:
+	.loc 4 1668 0
 	mov	r0, r5
 	bl	allocate_new_data_superblock
-.L2775:
+.LVL3040:
+.L2768:
+	.loc 4 1673 0
 	ldrb	r3, [r5, #7]	@ zero_extendqisi2
+	.loc 4 1675 0
 	ldrh	r2, [r5, #4]
+	.loc 4 1673 0
 	lsls	r3, r3, #2
 	cmp	r3, r2
 	it	cs
@@ -19417,113 +31582,188 @@ ftl_write:
 	cmp	r3, r2
 	it	cs
 	movcs	r3, r2
+	.loc 4 1677 0
 	ldrb	r2, [r5, #6]	@ zero_extendqisi2
 	str	r3, [sp, #36]
+.LVL3041:
 	ldrh	r3, [r6]
+.LVL3042:
 	cmp	r2, r3
-	bcc	.L2776
-	ldr	r1, .L2823+32
-	movw	r2, #1665
-	ldr	r0, .L2823+36
+	bcc	.L2769
+	.loc 4 1677 0 is_stmt 0 discriminator 1
+	ldr	r1, .L2816+32
+	movw	r2, #1677
+	ldr	r0, .L2816+36
 	bl	printf
-	ldr	r1, .L2823+40
-	ldr	r0, .L2823+44
+.LVL3043:
+	ldr	r1, .L2816+40
+	ldr	r0, .L2816+44
 	bl	printf
-.L2776:
+.LVL3044:
+.L2769:
+	.loc 4 1700 0 is_stmt 1 discriminator 1
 	mov	r8, #0
-.L2777:
+.LVL3045:
+.L2770:
+	.loc 4 1678 0 discriminator 1
 	ldr	r3, [sp, #36]
 	cmp	r8, r3
-	bne	.L2798
-.L2778:
-	ldr	r3, .L2823+20
+	bne	.L2791
+.L2771:
+.LVL3046:
+	.loc 4 1759 0
+	ldr	r3, .L2816+20
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L2799
+	beq	.L2792
+.LVL3047:
+	.loc 4 1761 0
 	ldr	r3, [sp, #8]
+	.loc 4 1762 0
 	subs	r8, r8, #1
+.LVL3048:
+	.loc 4 1761 0
 	add	r3, r3, #-1
 	str	r3, [sp, #8]
-	bne	.L2799
-.L2802:
+.LVL3049:
+	.loc 4 1762 0
+	bne	.L2792
+.LVL3050:
+.L2795:
+	.loc 4 1769 0
 	ldr	r3, [sp, #20]
+.LVL3051:
 	movs	r0, #0
 	sub	r1, r3, r10
 	bl	rk_ftl_garbage_collect
+.LVL3052:
+	.loc 4 1774 0
 	movs	r0, #0
-	b	.L2768
-.L2772:
-	ldr	r2, .L2823+48
+	b	.L2761
+.LVL3053:
+.L2765:
+	.loc 4 1619 0
+	ldr	r2, .L2816+48
+	.loc 4 1620 0
 	mov	r1, r4
+.LVL3054:
 	mov	r0, r7
+.LVL3055:
+	.loc 4 1619 0
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
+	.loc 4 1620 0
 	bl	__aeabi_uidivmod
+.LVL3056:
 	ldr	r2, [sp, #12]
+	.loc 4 1621 0
 	subs	r4, r4, r1
+	.loc 4 1624 0
 	ldr	r0, [r8, #8]
+	.loc 4 1620 0
 	mov	r3, r1
+.LVL3057:
+	.loc 4 1624 0
 	ldr	r1, [sp, #4]
+.LVL3058:
 	cmp	r4, r2
 	it	cs
 	movcs	r4, r2
+.LVL3059:
 	lsls	r6, r4, #9
 	add	r0, r0, r3, lsl #9
 	mov	r2, r6
 	bl	ftl_memcpy
+.LVL3060:
+	.loc 4 1626 0
 	cmp	r5, #0
-	beq	.L2805
+	beq	.L2798
+	.loc 4 1628 0
 	ldr	r3, [sp, #12]
+	.loc 4 1629 0
 	add	r7, r7, r4
+.LVL3061:
+	.loc 4 1631 0
 	add	r10, r10, #1
+.LVL3062:
+	.loc 4 1628 0
 	subs	r3, r3, r4
 	str	r3, [sp, #12]
+.LVL3063:
+	.loc 4 1630 0
 	ldr	r3, [sp, #4]
+.LVL3064:
 	add	r3, r3, r6
 	str	r3, [sp, #4]
+.LVL3065:
+	.loc 4 1632 0
 	bl	FtlCacheWriteBack
+.LVL3066:
 	str	r5, [sp, #8]
-	b	.L2771
-.L2798:
+	b	.L2764
+.LVL3067:
+.L2791:
+	.loc 4 1679 0
 	ldrh	r3, [r5, #4]
 	cmp	r3, #0
-	beq	.L2778
+	beq	.L2771
+	.loc 4 1683 0
 	movs	r2, #0
 	add	r1, sp, #40
 	mov	r0, r4
 	movs	r6, #36
 	bl	log2phys
+.LVL3068:
+	.loc 4 1684 0
 	mov	r0, r5
 	mul	r6, r6, r8
 	bl	get_new_active_ppa
-	ldr	r3, .L2823+52
-	ldr	r2, .L2823+56
+.LVL3069:
+	.loc 4 1686 0
+	ldr	r3, .L2816+52
+	.loc 4 1687 0
+	ldr	r2, .L2816+56
+	.loc 4 1686 0
 	ldr	r1, [r3]
+	.loc 4 1687 0
 	ldrh	r2, [r2]
+	.loc 4 1686 0
 	str	r3, [sp, #16]
 	add	r1, r1, r6
 	str	r0, [r1, #4]
+	.loc 4 1687 0
 	mul	r0, r2, r8
+.LVL3070:
+	.loc 4 1688 0
 	str	r4, [r1, #16]
+	.loc 4 1687 0
 	bic	r3, r0, #3
-	ldr	r0, .L2823+60
+	ldr	r0, .L2816+60
 	str	r3, [sp, #28]
 	ldr	r3, [r0]
 	ldr	r0, [sp, #28]
 	str	r3, [sp, #32]
 	add	fp, r3, r0
+.LVL3071:
 	str	fp, [r1, #12]
+	.loc 4 1691 0
 	mov	r0, fp
 	movs	r1, #0
+.LVL3072:
 	bl	ftl_memset
+.LVL3073:
+	.loc 4 1693 0
 	cmp	r4, r10
-	ldr	r1, .L2823+12
-	beq	.L2779
+	ldr	r1, .L2816+12
+	beq	.L2772
+	.loc 4 1693 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #20]
 	cmp	r4, r3
 	ldr	r3, [sp, #16]
-	bne	.L2818
+	bne	.L2811
+.LVL3074:
+	.loc 4 1701 0 is_stmt 1
 	ldr	r3, [sp, #12]
 	adds	r2, r7, r3
 	ldrh	r3, [r1]
@@ -19531,68 +31771,107 @@ ftl_write:
 	subs	r2, r2, r3
 	uxth	r3, r2
 	str	r3, [sp, #16]
+.LVL3075:
+	.loc 4 1700 0
 	movs	r3, #0
+.LVL3076:
 	str	r3, [sp, #24]
-	b	.L2782
-.L2779:
+	b	.L2775
+.LVL3077:
+.L2772:
+	.loc 4 1695 0
 	ldrh	r2, [r1]
 	mov	r0, r7
 	mov	r1, r2
 	str	r2, [sp, #16]
 	bl	__aeabi_uidivmod
+.LVL3078:
+	.loc 4 1696 0
 	ldr	r2, [sp, #16]
+	.loc 4 1695 0
 	str	r1, [sp, #24]
+.LVL3079:
+	.loc 4 1696 0
 	subs	r2, r2, r1
+.LVL3080:
 	ldr	r1, [sp, #12]
+.LVL3081:
 	mov	r3, r2
 	cmp	r2, r1
 	it	cs
 	movcs	r3, r1
 	str	r3, [sp, #16]
-.L2782:
-	ldr	r3, .L2823+12
+.LVL3082:
+.L2775:
+	.loc 4 1704 0
+	ldr	r3, .L2816+12
 	ldr	r2, [sp, #16]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	ldr	r3, .L2823+52
+	ldr	r3, .L2816+52
+	.loc 4 1706 0
 	ldr	r3, [r3]
-	bne	.L2783
+	.loc 4 1704 0
+	bne	.L2776
+	.loc 4 1705 0
 	cmp	r4, r10
+	.loc 4 1706 0
 	add	r6, r6, r3
-	bne	.L2784
+	.loc 4 1705 0
+	bne	.L2777
+	.loc 4 1706 0
 	ldr	r3, [sp, #4]
-.L2821:
+.LVL3083:
+.L2814:
+	.loc 4 1749 0
 	str	r3, [r6, #8]
-	b	.L2785
-.L2784:
+	b	.L2778
+.LVL3084:
+.L2777:
+	.loc 4 1708 0
 	ldr	r2, [sp, #16]
+.LVL3085:
 	ldr	r3, [sp, #4]
 	muls	r2, r4, r2
 	subs	r2, r2, r7
 	add	r2, r3, r2, lsl #9
 	str	r2, [r6, #8]
-.L2785:
-	ldr	r3, .L2823+28
+.LVL3086:
+.L2778:
+	.loc 4 1751 0
+	ldr	r3, .L2816+28
 	ldrb	r2, [r5, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L2795
-	ldr	r1, .L2823+32
-	movw	r2, #1739
-	ldr	r0, .L2823+36
+	bcc	.L2788
+	.loc 4 1751 0 is_stmt 0 discriminator 1
+	ldr	r1, .L2816+32
+	movw	r2, #1751
+	ldr	r0, .L2816+36
 	bl	printf
-	ldr	r1, .L2823+40
-	ldr	r0, .L2823+44
+.LVL3087:
+	ldr	r1, .L2816+40
+	ldr	r0, .L2816+44
 	bl	printf
-.L2795:
+.LVL3088:
+.L2788:
+	.loc 4 1752 0 is_stmt 1
 	ldr	r2, [sp, #32]
 	movw	r3, #61589
 	ldr	r1, [sp, #28]
+	.loc 4 1678 0
 	add	r8, r8, #1
+.LVL3089:
+	.loc 4 1752 0
 	strh	r3, [r2, r1]	@ movhi
-	ldr	r2, .L2823+64
+	.loc 4 1753 0
+	ldr	r2, .L2816+64
+	.loc 4 1754 0
 	str	r4, [fp, #8]
+	.loc 4 1757 0
 	adds	r4, r4, #1
+.LVL3090:
+	.loc 4 1753 0
 	ldr	r3, [r2]
 	str	r3, [fp, #4]
 	adds	r3, r3, #1
@@ -19600,68 +31879,95 @@ ftl_write:
 	it	eq
 	moveq	r3, #0
 	str	r3, [r2]
+	.loc 4 1755 0
 	ldr	r3, [sp, #40]
 	str	r3, [fp, #12]
+	.loc 4 1756 0
 	ldrh	r3, [r5]
 	strh	r3, [fp, #2]	@ movhi
-	b	.L2777
-.L2824:
+	b	.L2770
+.L2817:
 	.align	2
-.L2823:
-	.word	.LANCHOR67
+.L2816:
+	.word	.LANCHOR68
 	.word	.LANCHOR223
 	.word	.LANCHOR241
-	.word	.LANCHOR54
-	.word	.LANCHOR160
+	.word	.LANCHOR55
+	.word	.LANCHOR159
 	.word	.LANCHOR129
-	.word	.LANCHOR90
-	.word	.LANCHOR36
+	.word	.LANCHOR91
+	.word	.LANCHOR37
 	.word	.LANCHOR242
-	.word	.LC4
-	.word	.LC5
 	.word	.LC6
-	.word	.LANCHOR162
-	.word	.LANCHOR180
-	.word	.LANCHOR57
+	.word	.LC7
+	.word	.LC8
+	.word	.LANCHOR161
+	.word	.LANCHOR179
+	.word	.LANCHOR58
 	.word	.LANCHOR186
-	.word	.LANCHOR158
-.L2783:
+	.word	.LANCHOR157
+.LVL3091:
+.L2776:
+	.loc 4 1711 0
 	cmp	r4, r10
+	.loc 4 1712 0
 	add	r3, r3, r6
 	ite	eq
-	ldreq	r2, .L2825
-	ldrne	r2, .L2825+4
+	ldreq	r2, .L2818
+.LVL3092:
+	.loc 4 1714 0
+	ldrne	r2, .L2818+4
 	ldr	r2, [r2]
 	str	r2, [r3, #8]
+.LVL3093:
+	.loc 4 1716 0
 	ldr	r2, [sp, #40]
-	ldr	r3, .L2825+8
+	ldr	r3, .L2818+8
 	adds	r0, r2, #1
-	beq	.L2788
+	beq	.L2781
+.LBB546:
+	.loc 4 1720 0
 	ldr	r3, [r3]
+	.loc 4 1722 0
 	movs	r1, #1
-	str	r2, [sp, #48]
-	add	r0, sp, #44
+	.loc 4 1719 0
 	str	r4, [sp, #60]
+	.loc 4 1722 0
+	add	r0, sp, #44
+	.loc 4 1718 0
+	str	r2, [sp, #48]
+	.loc 4 1720 0
 	add	r3, r3, r6
 	ldr	r2, [r3, #8]
+	.loc 4 1721 0
 	ldr	r3, [r3, #12]
+	.loc 4 1720 0
 	str	r2, [sp, #52]
+	.loc 4 1722 0
 	movs	r2, #0
+	.loc 4 1721 0
 	str	r3, [sp, #56]
+	.loc 4 1722 0
 	bl	FlashReadPages
+.LVL3094:
+	.loc 4 1723 0
 	ldr	r3, [sp, #44]
 	adds	r3, r3, #1
-	bne	.L2789
-	ldr	r2, .L2825+12
+	bne	.L2782
+	.loc 4 1724 0
+	ldr	r2, .L2818+12
 	ldr	r3, [r2, #72]
 	adds	r3, r3, #1
 	str	r3, [r2, #72]
-.L2792:
+.L2785:
 	ldr	r2, [sp, #16]
+.LBE546:
+	.loc 4 1736 0
 	cmp	r4, r10
-	ldr	r3, .L2825+8
+	ldr	r3, .L2818+8
 	lsl	r2, r2, #9
-	bne	.L2793
+	bne	.L2786
+	.loc 4 1737 0
 	ldr	r1, [r3]
 	str	r3, [sp, #16]
 	ldr	r3, [sp, #24]
@@ -19669,56 +31975,80 @@ ftl_write:
 	ldr	r0, [r1, #8]
 	ldr	r1, [sp, #4]
 	add	r0, r0, r3, lsl #9
-.L2820:
+.L2813:
+	.loc 4 1739 0
 	bl	ftl_memcpy
+.LVL3095:
+	.loc 4 1741 0
 	ldr	r2, [sp, #20]
+	.loc 4 1739 0
 	ldr	r3, [sp, #16]
+	.loc 4 1741 0
 	cmp	r4, r2
-	bne	.L2785
+	bne	.L2778
+	.loc 4 1742 0
 	ldrh	r2, [r5, #4]
 	cmp	r2, #0
-	beq	.L2785
+	beq	.L2778
+	.loc 4 1743 0
 	ldr	r3, [r3]
 	add	r6, r6, r3
-	ldr	r3, .L2825+16
+	ldr	r3, .L2818+16
 	str	r6, [r3]
-	ldr	r3, .L2825+20
+	.loc 4 1744 0
+	ldr	r3, .L2818+20
 	str	r5, [r3]
-	b	.L2785
-.L2789:
-	ldr	r1, [fp, #8]
-	cmp	r4, r1
-	beq	.L2791
-	ldr	r2, .L2825+12
-	ldr	r0, .L2825+24
+	b	.L2778
+.L2782:
+.LBB547:
+	.loc 4 1726 0
+	ldr	r3, [fp, #8]
+	cmp	r4, r3
+	beq	.L2784
+	.loc 4 1727 0
+	ldr	r2, .L2818+12
+	.loc 4 1728 0
+	ldr	r0, .L2818+24
+	.loc 4 1727 0
 	ldr	r3, [r2, #72]
 	adds	r3, r3, #1
 	str	r3, [r2, #72]
+	.loc 4 1728 0
 	mov	r2, r4
+	ldr	r1, [fp, #8]
 	bl	printf
-.L2791:
+.LVL3096:
+.L2784:
+	.loc 4 1730 0
 	ldr	r3, [fp, #8]
 	cmp	r4, r3
-	beq	.L2792
-	movw	r2, #1718
-	ldr	r1, .L2825+28
-	ldr	r0, .L2825+32
+	beq	.L2785
+	.loc 4 1730 0 is_stmt 0 discriminator 1
+	movw	r2, #1730
+	ldr	r1, .L2818+28
+	ldr	r0, .L2818+32
 	bl	printf
-	ldr	r1, .L2825+36
-	ldr	r0, .L2825+40
+.LVL3097:
+	ldr	r1, .L2818+36
+	ldr	r0, .L2818+40
 	bl	printf
-	b	.L2792
-.L2788:
+.LVL3098:
+	b	.L2785
+.L2781:
+.LBE547:
+	.loc 4 1733 0 is_stmt 1
 	ldr	r3, [r3]
 	movs	r1, #0
-	ldr	r2, .L2825+44
+	ldr	r2, .L2818+44
 	add	r3, r3, r6
 	ldrh	r2, [r2]
 	ldr	r0, [r3, #8]
 	bl	ftl_memset
-	b	.L2792
-.L2793:
-	ldr	r1, .L2825+48
+.LVL3099:
+	b	.L2785
+.L2786:
+	.loc 4 1739 0
+	ldr	r1, .L2818+48
 	ldr	r0, [r3]
 	str	r3, [sp, #16]
 	ldrh	r1, [r1]
@@ -19728,8 +32058,9 @@ ftl_write:
 	muls	r1, r4, r1
 	subs	r1, r1, r7
 	add	r1, r3, r1, lsl #9
-	b	.L2820
-.L2818:
+	b	.L2813
+.L2811:
+	.loc 4 1749 0
 	ldr	r3, [r3]
 	ldr	r2, [sp, #4]
 	add	r6, r6, r3
@@ -19737,51 +32068,67 @@ ftl_write:
 	muls	r3, r4, r3
 	subs	r3, r3, r7
 	add	r3, r2, r3, lsl #9
-	b	.L2821
-.L2799:
-	ldr	r0, .L2825+8
+	b	.L2814
+.LVL3100:
+.L2792:
+	.loc 4 1765 0
+	ldr	r0, .L2818+8
 	mov	r3, r5
 	movs	r2, #0
 	mov	r1, r8
 	ldr	r0, [r0]
 	bl	FtlProgPages
+.LVL3101:
+	.loc 4 1766 0
 	ldr	r3, [sp, #8]
 	cmp	r3, r8
-	bcs	.L2800
-	ldr	r1, .L2825+28
-	movw	r2, #1754
-	ldr	r0, .L2825+32
+	bcs	.L2793
+	.loc 4 1766 0 is_stmt 0 discriminator 1
+	ldr	r1, .L2818+28
+	movw	r2, #1766
+	ldr	r0, .L2818+32
 	bl	printf
-	ldr	r1, .L2825+36
-	ldr	r0, .L2825+40
+.LVL3102:
+	ldr	r1, .L2818+36
+	ldr	r0, .L2818+40
 	bl	printf
-.L2800:
+.LVL3103:
+.L2793:
+	.loc 4 1767 0 is_stmt 1
 	ldr	r3, [sp, #8]
 	sub	r3, r3, r8
 	str	r3, [sp, #8]
-	b	.L2773
-.L2803:
+.LVL3104:
+	b	.L2766
+.LVL3105:
+.L2796:
+	.loc 4 1607 0
 	mov	r0, #-1
-	b	.L2768
-.L2805:
+.LVL3106:
+	b	.L2761
+.LVL3107:
+.L2798:
+	.loc 4 1627 0
 	mov	r0, r5
-	b	.L2768
-.L2826:
+	b	.L2761
+.L2819:
 	.align	2
-.L2825:
+.L2818:
 	.word	.LANCHOR183
 	.word	.LANCHOR184
-	.word	.LANCHOR180
-	.word	.LANCHOR136
+	.word	.LANCHOR179
+	.word	.LANCHOR135
 	.word	.LANCHOR129
 	.word	.LANCHOR221
-	.word	.LC54
+	.word	.LC57
 	.word	.LANCHOR242
-	.word	.LC4
-	.word	.LC5
 	.word	.LC6
-	.word	.LANCHOR56
-	.word	.LANCHOR54
+	.word	.LC7
+	.word	.LC8
+	.word	.LANCHOR57
+	.word	.LANCHOR55
+	.cfi_endproc
+.LFE308:
 	.size	ftl_write, .-ftl_write
 	.section	.text.FlashReadFacBbtData,"ax",%progbits
 	.align	1
@@ -19792,101 +32139,186 @@ ftl_write:
 	.fpu softvfp
 	.type	FlashReadFacBbtData, %function
 FlashReadFacBbtData:
+.LFB264:
+	.loc 2 3288 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 48
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL3108:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
 	mov	fp, r2
-	ldr	r2, .L2840
+	.loc 2 3293 0
+	ldr	r2, .L2832
+.LVL3109:
+	.loc 2 3288 0
 	sub	sp, sp, #48
+	.cfi_def_cfa_offset 80
+	.loc 2 3288 0
 	mov	r6, r1
 	mov	r4, r0
-	ldr	r7, .L2840+4
+	.loc 2 3295 0
+	ldr	r7, .L2832+4
+	.loc 2 3293 0
 	ldrh	r3, [r2, #14]
 	ldrh	r2, [r2, #12]
 	smulbb	r3, r3, r2
+	.loc 2 3295 0
 	ldr	r2, [r7]
+	.loc 2 3293 0
 	uxth	r3, r3
+.LVL3110:
+	.loc 2 3295 0
 	str	r2, [sp, #20]
-	ldr	r2, .L2840+8
+	.loc 2 3296 0
+	ldr	r2, .L2832+8
+	.loc 2 3297 0
 	subs	r5, r3, #1
+	.loc 2 3298 0
 	mul	r10, r6, r3
+	.loc 2 3297 0
 	uxth	r5, r5
+.LVL3111:
 	subs	r3, r3, #15
+.LVL3112:
+	.loc 2 3296 0
 	ldr	r1, [r2]
+.LVL3113:
 	mov	r8, r2
 	str	r1, [sp, #24]
-.L2828:
+.LVL3114:
+.L2821:
+	.loc 2 3297 0 discriminator 1
 	cmp	r3, r5
-	ble	.L2835
+	ble	.L2827
+	.loc 2 3289 0
 	mov	r0, #-1
-	b	.L2827
-.L2835:
+	b	.L2820
+.L2827:
+	.loc 2 3298 0
 	add	r2, r5, r10
+	.loc 2 3300 0
 	add	r0, sp, #12
+	.loc 2 3298 0
 	lsls	r2, r2, #10
 	str	r3, [sp, #4]
+.LVL3115:
+	.loc 2 3299 0
 	str	r2, [sp, #16]
+	.loc 2 3300 0
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
+.LVL3116:
+	.loc 2 3301 0
 	ldr	r2, [sp, #12]
 	ldr	r3, [sp, #4]
 	adds	r2, r2, #1
-	beq	.L2829
+	beq	.L2822
+	.loc 2 3302 0
 	ldr	r2, [r8]
 	ldrh	r1, [r2]
 	movw	r2, #61664
 	cmp	r1, r2
-	bne	.L2829
-	cbz	r4, .L2836
-	cbz	r6, .L2831
-.L2834:
+	bne	.L2822
+.LVL3117:
+	.loc 2 3304 0
+	cbz	r4, .L2828
+.LVL3118:
+.LBB550:
+.LBB551:
+	.loc 2 3305 0
+	cbnz	r6, .L2824
+	.loc 2 3306 0
+	ldr	r0, .L2832+12
+	.loc 2 3307 0
+	movs	r5, #1
+.LVL3119:
+.L2825:
+	.loc 2 3306 0
+	ldr	r1, [r0]
+	uxth	r3, r6
+.LVL3120:
+	adds	r6, r6, #1
+	cmp	r3, r1
+	bcc	.L2826
+.LVL3121:
+.L2824:
+	.loc 2 3309 0
 	mov	r2, fp
 	ldr	r1, [r7]
 	mov	r0, r4
 	bl	ftl_memcpy
+.LVL3122:
+	.loc 2 3310 0
 	movs	r3, #4
-	ldr	r0, .L2840+12
+	ldr	r0, .L2832+16
 	mov	r2, r3
 	mov	r1, r4
 	bl	rknand_print_hex
+.LVL3123:
 	movs	r0, #0
-.L2827:
+.LVL3124:
+.L2820:
+.LBE551:
+.LBE550:
+	.loc 2 3317 0
 	add	sp, sp, #48
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2831:
+.LVL3125:
+.L2826:
+	.cfi_restore_state
+.LBB553:
+.LBB552:
+	.loc 2 3307 0
 	ldr	r1, [r7]
-	mov	ip, #1
-	ldr	r5, .L2840+16
-.L2832:
-	ldr	r0, [r5]
-	uxth	r3, r6
-	adds	r6, r6, #1
-	cmp	r3, r0
-	bcs	.L2834
-	lsrs	r0, r3, #5
+	lsr	ip, r3, #5
 	and	r3, r3, #31
-	lsl	r3, ip, r3
-	ldr	r2, [r1, r0, lsl #2]
+.LVL3126:
+	lsl	r3, r5, r3
+	ldr	r2, [r1, ip, lsl #2]
 	orrs	r3, r3, r2
-	str	r3, [r1, r0, lsl #2]
-	b	.L2832
-.L2829:
+	str	r3, [r1, ip, lsl #2]
+.LVL3127:
+	b	.L2825
+.LVL3128:
+.L2822:
+.LBE552:
+.LBE553:
+	.loc 2 3297 0 discriminator 2
 	subs	r5, r5, #1
+.LVL3129:
 	uxth	r5, r5
-	b	.L2828
-.L2836:
+.LVL3130:
+	b	.L2821
+.LVL3131:
+.L2828:
+	.loc 2 3303 0
 	mov	r0, r4
-	b	.L2827
-.L2841:
+.LVL3132:
+	.loc 2 3316 0
+	b	.L2820
+.L2833:
 	.align	2
-.L2840:
+.L2832:
 	.word	.LANCHOR15
-	.word	.LANCHOR145
+	.word	.LANCHOR144
 	.word	.LANCHOR194
-	.word	.LC55
-	.word	.LANCHOR147
+	.word	.LANCHOR146
+	.word	.LC58
+	.cfi_endproc
+.LFE264:
 	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
 	.section	.text.FlashGetBadBlockList,"ax",%progbits
 	.align	1
@@ -19897,59 +32329,104 @@ FlashReadFacBbtData:
 	.fpu softvfp
 	.type	FlashGetBadBlockList, %function
 FlashGetBadBlockList:
+.LFB265:
+	.loc 2 3320 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
+.LVL3133:
+	.loc 2 3323 0
+	ldr	r3, .L2844
+	.loc 2 3320 0
+	push	{r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
+	.cfi_offset 14, -4
+	.loc 2 3320 0
 	mov	r5, r0
-	ldr	r3, .L2852
-	ldr	r6, .L2852+4
+	.loc 2 3326 0
+	ldr	r6, .L2844+4
+	.loc 2 3323 0
 	ldr	r3, [r3]
+	.loc 2 3326 0
 	ldr	r0, [r6]
+.LVL3134:
+	.loc 2 3323 0
 	ldrb	r4, [r3, #13]	@ zero_extendqisi2
 	ldrh	r3, [r3, #14]
 	smulbb	r4, r4, r3
 	uxth	r4, r4
+	.loc 2 3326 0
 	adds	r2, r4, #7
 	asrs	r2, r2, #3
 	bl	FlashReadFacBbtData
+.LVL3135:
+	.loc 2 3327 0
 	adds	r0, r0, #1
-	bne	.L2843
-.L2847:
+.LVL3136:
+	mov	ip, r6
+	bne	.L2835
+.LVL3137:
+.L2839:
+	.loc 2 3321 0
 	movs	r3, #0
-.L2844:
+.L2836:
+.LVL3138:
+	.loc 2 3338 0
 	movw	r2, #65535
+	.loc 2 3340 0
 	movs	r0, #0
+	.loc 2 3338 0
 	strh	r2, [r5, r3, lsl #1]	@ movhi
-	pop	{r3, r4, r5, r6, r7, pc}
-.L2843:
-	ldr	r7, [r6]
+	.loc 2 3340 0
+	pop	{r4, r5, r6, r7, r8, pc}
+.LVL3139:
+.L2835:
+	.loc 2 3332 0
 	movs	r2, #0
-	lsr	ip, r4, #4
+	lsr	lr, r4, #4
 	mov	r3, r2
+	.loc 2 3328 0
 	subs	r4, r4, #1
-	mov	lr, #1
-.L2845:
+	.loc 2 3329 0
+	mov	r8, #1
+.LVL3140:
+.L2837:
 	uxth	r1, r2
+.LVL3141:
+	.loc 2 3328 0 discriminator 1
 	cmp	r1, r4
-	bge	.L2844
-	lsrs	r6, r1, #5
+	bge	.L2836
+	.loc 2 3329 0
+	ldr	r6, [ip]
+	lsrs	r7, r1, #5
 	and	r0, r1, #31
-	lsl	r0, lr, r0
+	lsl	r0, r8, r0
 	adds	r2, r2, #1
-	ldr	r6, [r7, r6, lsl #2]
+	ldr	r6, [r6, r7, lsl #2]
 	tst	r0, r6
+	.loc 2 3330 0
 	ittt	ne
 	addne	r0, r3, #1
+.LVL3142:
 	strhne	r1, [r5, r3, lsl #1]	@ movhi
 	uxthne	r3, r0
-	cmp	r3, ip
-	bcc	.L2845
-	b	.L2847
-.L2853:
+.LVL3143:
+	.loc 2 3332 0
+	cmp	r3, lr
+	bcc	.L2837
+	b	.L2839
+.L2845:
 	.align	2
-.L2852:
+.L2844:
 	.word	.LANCHOR18
-	.word	.LANCHOR151
+	.word	.LANCHOR150
+	.cfi_endproc
+.LFE265:
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
 	.section	.text.FtlMakeBbt,"ax",%progbits
 	.align	1
@@ -19960,77 +32437,135 @@ FlashGetBadBlockList:
 	.fpu softvfp
 	.type	FtlMakeBbt, %function
 FtlMakeBbt:
+.LFB324:
+	.loc 5 361 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2874
+	.loc 5 369 0
+	ldr	r3, .L2866
+	.loc 5 361 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 5 369 0
 	ldr	r7, [r3]
 	cmp	r7, #0
-	bne	.L2855
-	ldr	r8, .L2874+40
-	ldr	r4, .L2874+4
+	bne	.L2847
+	ldr	r8, .L2866+40
+.LBB556:
+.LBB557:
+	.loc 5 375 0
+	ldr	r4, .L2866+4
+	.loc 5 371 0
 	bl	FtlBbtMemInit
+.LVL3144:
 	sub	r10, r8, #18
+	.loc 5 372 0
 	bl	FtlLoadFactoryBbt
-.L2856:
-	ldr	r3, .L2874+8
+.LVL3145:
+.L2848:
+	.loc 5 373 0
+	ldr	r3, .L2866+8
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	bcc	.L2862
-	ldr	r5, .L2874+12
+	bcc	.L2854
+	.loc 5 427 0
+	ldr	r5, .L2866+12
+	.loc 5 373 0
 	movs	r4, #0
-.L2863:
+.L2855:
+	.loc 5 427 0
 	ldrh	r3, [r5]
 	uxth	r0, r4
+.LVL3146:
 	adds	r4, r4, #1
 	cmp	r3, r0
-	bhi	.L2864
-	ldr	r4, .L2874+16
+	bhi	.L2856
+	.loc 5 433 0
+	ldr	r4, .L2866+16
+	.loc 5 442 0
 	movw	r6, #65535
+	.loc 5 433 0
 	ldrh	r5, [r4, #12]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L2865:
+.LVL3147:
+.L2857:
 	ldrh	r3, [r4, #12]
 	subs	r3, r3, #47
 	cmp	r3, r5
-	bgt	.L2869
+	bgt	.L2861
+	.loc 5 435 0
 	mov	r0, r5
 	bl	FtlBbmIsBadBlock
+.LVL3148:
 	cmp	r0, #1
-	beq	.L2866
+	beq	.L2858
+	.loc 5 437 0
 	mov	r0, r5
 	bl	FlashTestBlk
+.LVL3149:
 	cmp	r0, #0
-	beq	.L2867
+	beq	.L2859
+	.loc 5 439 0
 	mov	r0, r5
 	bl	FtlBbmMapBadBlock
-.L2866:
+.LVL3150:
+.L2858:
+	.loc 5 433 0
 	subs	r5, r5, #1
+.LVL3151:
 	uxth	r5, r5
-	b	.L2865
-.L2862:
-	ldr	r3, .L2874+20
+.LVL3152:
+	b	.L2857
+.LVL3153:
+.L2854:
+	.loc 5 375 0
+	ldr	r3, .L2866+20
+	.loc 5 378 0
 	movw	r1, #65535
 	ldrh	r2, [r10, #2]!
+	.loc 5 375 0
 	ldr	r0, [r3]
-	ldr	r3, .L2874+24
+	.loc 5 376 0
+	ldr	r3, .L2866+24
+	.loc 5 378 0
 	cmp	r2, r1
+	.loc 5 375 0
 	str	r0, [r4, #8]
+	.loc 5 376 0
 	ldr	fp, [r3]
 	str	r3, [sp, #4]
-	ldr	r3, .L2874+28
+	ldr	r3, .L2866+28
 	str	fp, [r4, #12]
-	beq	.L2857
+.LVL3154:
+	.loc 5 378 0
+	beq	.L2849
+	.loc 5 380 0
 	ldrh	r6, [r3]
+	.loc 5 382 0
 	mov	r0, r4
+	.loc 5 380 0
 	str	r3, [sp]
 	mla	r6, r7, r6, r2
+.LVL3155:
+	.loc 5 381 0
 	lsls	r2, r6, #10
 	str	r2, [r4, #4]
+	.loc 5 382 0
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
+.LVL3156:
+	.loc 5 383 0
 	ldr	r3, [sp]
 	ldr	r1, [r4, #8]
 	ldr	r0, [r8]
@@ -20038,129 +32573,206 @@ FtlMakeBbt:
 	adds	r2, r2, #7
 	asrs	r2, r2, #3
 	bl	ftl_memcpy
-.L2858:
+.LVL3157:
+.L2850:
+	.loc 5 422 0
 	uxth	r0, r6
+	.loc 5 373 0
 	adds	r7, r7, #1
+.LVL3158:
 	add	r8, r8, #4
+	.loc 5 422 0
 	bl	FtlBbmMapBadBlock
-	b	.L2856
-.L2857:
+.LVL3159:
+	b	.L2848
+.LVL3160:
+.L2849:
+	.loc 5 387 0
 	mov	r1, r7
 	str	r3, [sp]
 	bl	FlashGetBadBlockList
+.LVL3161:
+	.loc 5 388 0
 	ldr	r1, [r8]
 	ldr	r0, [r4, #8]
 	bl	FtlBbt2Bitmap
+.LVL3162:
+	.loc 5 390 0
 	ldr	r3, [sp]
 	ldrh	r5, [r3]
-.L2860:
+.L2852:
+	.loc 5 394 0
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L2859:
+.LVL3163:
+.L2851:
+	.loc 5 392 0
 	ldr	r3, [sp]
 	ldrh	r0, [r3]
 	smlabb	r0, r0, r7, r5
 	uxth	r0, r0
 	bl	FtlBbmIsBadBlock
+.LVL3164:
 	cmp	r0, #1
-	beq	.L2860
+	beq	.L2852
+	.loc 5 397 0
 	ldr	r3, [sp, #4]
 	movs	r2, #16
 	movs	r1, #0
+	.loc 5 396 0
 	strh	r5, [r10]	@ movhi
+	.loc 5 397 0
 	ldr	r0, [r3]
 	bl	ftl_memset
-	ldr	r2, [sp]
+.LVL3165:
+	.loc 5 398 0
 	movw	r3, #61664
 	strh	r3, [fp]	@ movhi
+	.loc 5 399 0
 	movs	r3, #0
 	str	r3, [fp, #4]
-	ldrh	r6, [r2]
+	.loc 5 400 0
 	ldrh	r3, [r10]
+	strh	r3, [fp, #2]	@ movhi
+	.loc 5 401 0
+	ldr	r3, [sp]
+	.loc 5 403 0
 	ldr	r1, [r8]
 	ldr	r0, [r4, #8]
-	strh	r3, [fp, #2]	@ movhi
+	.loc 5 401 0
+	ldrh	r6, [r3]
+	ldrh	r3, [r10]
 	mla	r6, r7, r6, r3
+.LVL3166:
+	.loc 5 402 0
 	lsls	r3, r6, #10
 	str	r3, [r4, #4]
-	ldr	r3, .L2874+32
+	.loc 5 403 0
+	ldr	r3, .L2866+32
 	ldrh	r2, [r3]
 	lsls	r2, r2, #2
 	bl	ftl_memcpy
+.LVL3167:
+	.loc 5 404 0
 	movs	r2, #1
 	mov	r0, r4
 	mov	r1, r2
 	bl	FlashEraseBlocks
+.LVL3168:
+	.loc 5 405 0
 	movs	r3, #1
 	mov	r0, r4
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
+.LVL3169:
+	.loc 5 406 0
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	bne	.L2858
+	bne	.L2850
+	.loc 5 408 0
 	uxth	r0, r6
 	bl	FtlBbmMapBadBlock
-	b	.L2859
-.L2864:
+.LVL3170:
+	b	.L2851
+.LVL3171:
+.L2856:
+	.loc 5 429 0
 	bl	FtlBbmMapBadBlock
-	b	.L2863
-.L2867:
+.LVL3172:
+	b	.L2855
+.LVL3173:
+.L2859:
+	.loc 5 442 0
 	ldrh	r3, [r4]
 	cmp	r3, r6
-	bne	.L2868
+	bne	.L2860
+	.loc 5 444 0
 	strh	r5, [r4]	@ movhi
-	b	.L2866
-.L2868:
+	b	.L2858
+.L2860:
+	.loc 5 448 0
 	strh	r5, [r4, #4]	@ movhi
-.L2869:
-	ldr	r3, .L2874+36
+.L2861:
+	.loc 5 460 0
+	ldr	r3, .L2866+36
+	.loc 5 457 0
 	movs	r5, #0
+.LVL3174:
+	.loc 5 459 0
 	str	r5, [r4, #8]
+	.loc 5 462 0
 	movs	r2, #2
 	movs	r1, #1
+	.loc 5 457 0
 	strh	r5, [r4, #2]	@ movhi
+	.loc 5 460 0
 	ldr	r0, [r3]
 	ldrh	r3, [r4]
 	lsls	r3, r3, #10
 	str	r3, [r0, #4]
+	.loc 5 461 0
 	ldrh	r3, [r4, #4]
 	lsls	r3, r3, #10
 	str	r3, [r0, #40]
+	.loc 5 462 0
 	bl	FlashEraseBlocks
+.LVL3175:
+	.loc 5 464 0
 	ldrh	r0, [r4]
 	bl	FtlBbmMapBadBlock
+.LVL3176:
+	.loc 5 465 0
 	ldrh	r0, [r4, #4]
 	bl	FtlBbmMapBadBlock
+.LVL3177:
+	.loc 5 467 0
 	bl	FtlBbmTblFlush
+.LVL3178:
+	.loc 5 468 0
 	ldr	r3, [r4, #8]
+	.loc 5 471 0
 	ldrh	r2, [r4, #4]
+	.loc 5 472 0
 	strh	r5, [r4, #2]	@ movhi
+	.loc 5 468 0
 	adds	r3, r3, #1
 	str	r3, [r4, #8]
+	.loc 5 470 0
 	ldrh	r3, [r4]
+.LVL3179:
+	.loc 5 471 0
 	strh	r2, [r4]	@ movhi
+	.loc 5 473 0
 	strh	r3, [r4, #4]	@ movhi
+	.loc 5 475 0
 	bl	FtlBbmTblFlush
-.L2855:
+.LVL3180:
+.L2847:
+.LBE557:
+.LBE556:
+	.loc 5 478 0
 	movs	r0, #0
 	add	sp, sp, #8
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2875:
+.L2867:
 	.align	2
-.L2874:
-	.word	.LANCHOR75
+.L2866:
+	.word	.LANCHOR76
 	.word	.LANCHOR199
-	.word	.LANCHOR43
-	.word	.LANCHOR58
-	.word	.LANCHOR73
-	.word	.LANCHOR79
+	.word	.LANCHOR44
+	.word	.LANCHOR59
+	.word	.LANCHOR74
+	.word	.LANCHOR180
 	.word	.LANCHOR185
-	.word	.LANCHOR49
+	.word	.LANCHOR50
 	.word	.LANCHOR120
-	.word	.LANCHOR76
-	.word	.LANCHOR73+28
+	.word	.LANCHOR77
+	.word	.LANCHOR74+28
+	.cfi_endproc
+.LFE324:
 	.size	FtlMakeBbt, .-FtlMakeBbt
 	.section	.text.FtlLowFormat,"ax",%progbits
 	.align	1
@@ -20171,359 +32783,559 @@ FtlMakeBbt:
 	.fpu softvfp
 	.type	FtlLowFormat, %function
 FtlLowFormat:
-	@ args = 0, pretend = 0, frame = 24
+.LFB301:
+	.loc 4 767 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2907
-	movs	r1, #0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #24
-	ldrh	r2, [r3]
-	ldr	r3, .L2907+4
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 48
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 4 774 0
+	ldr	r3, .L2899
+	ldr	r4, [r3]
+	cmp	r4, #0
+	bne	.L2870
+	.loc 4 776 0
+	ldr	r5, .L2899+4
+	mov	r1, r4
+	ldr	r3, .L2899+8
+	.loc 4 780 0
+	ldr	r6, .L2899+12
+	.loc 4 776 0
+	ldrh	r2, [r5]
+	ldr	r0, [r3]
+	lsls	r2, r2, #2
+	bl	ftl_memset
+.LVL3181:
+	.loc 4 777 0
+	ldrh	r2, [r5]
+	mov	r1, r4
+	ldr	r3, .L2899+16
+	.loc 4 778 0
+	ldr	r5, .L2899+20
+	.loc 4 777 0
 	lsls	r2, r2, #2
 	ldr	r0, [r3]
 	bl	ftl_memset
-	ldr	r3, .L2907+8
-	ldr	r3, [r3]
-	cmp	r3, #0
-	bne	.L2878
-	ldr	r6, .L2907+12
-	ldr	r2, .L2907+16
-	ldr	r5, .L2907+20
+.LVL3182:
+	.loc 4 779 0
+	ldr	r3, .L2899+24
+	.loc 4 780 0
 	ldrh	r0, [r6]
-	str	r3, [r2]
-	str	r3, [r5]
+	.loc 4 778 0
+	str	r4, [r5]
+	.loc 4 779 0
+	str	r4, [r3]
+	.loc 4 780 0
 	bl	FtlFreeSysBlkQueueInit
+.LVL3183:
+	.loc 4 781 0
 	bl	FtlLoadBbt
-	cbz	r0, .L2879
+.LVL3184:
+	cbz	r0, .L2871
+	.loc 4 782 0
 	bl	FtlMakeBbt
-.L2879:
-	ldr	r3, .L2907+24
-	ldr	r2, .L2907+28
-	ldr	ip, .L2907+108
-	ldrh	r1, [r3]
-	ldr	r4, [r2]
-	ldr	r2, .L2907+32
-	str	r3, [sp, #12]
-	lsls	r1, r1, #7
-	ldr	r7, [r2]
+.LVL3185:
+.L2871:
+	.loc 4 784 0 discriminator 1
+	ldr	ip, .L2899+80
+	.loc 4 767 0 discriminator 1
 	movs	r2, #0
-.L2880:
+	.loc 4 785 0 discriminator 1
+	ldr	r7, .L2899+28
+	.loc 4 786 0 discriminator 1
+	ldr	r4, .L2899+32
+	ldr	lr, .L2899+112
+.L2872:
+.LVL3186:
+	.loc 4 784 0 discriminator 1
+	ldrh	r1, [ip]
 	uxth	r3, r2
 	adds	r2, r2, #1
-	cmp	r3, r1
-	blt	.L2881
-	ldr	r3, .L2907+36
+.LVL3187:
+	cmp	r3, r1, lsl #7
+	blt	.L2873
+.LVL3188:
+	.loc 4 791 0
+	ldr	r3, .L2899+36
+.LVL3189:
+	.loc 4 790 0
 	movs	r7, #0
-	ldr	fp, .L2907+112
+	.loc 4 791 0
+	ldr	fp, .L2899+116
 	ldrh	r4, [r3]
+.LVL3190:
 	mov	r8, r3
 	mov	r10, fp
-.L2882:
+.LVL3191:
+.L2874:
+	.loc 4 791 0 is_stmt 0 discriminator 1
 	ldrh	r3, [fp]
 	cmp	r3, r4
-	bhi	.L2883
-	ldr	r4, .L2907+40
+	bhi	.L2875
+	.loc 4 794 0 is_stmt 1
+	ldr	r4, .L2899+40
+.LVL3192:
 	subs	r3, r7, #2
 	ldrh	r1, [r4]
 	cmp	r3, r1, lsl #1
-	bgt	.L2884
-.L2888:
+	bgt	.L2876
+.LVL3193:
+.L2880:
+	.loc 4 790 0
 	movs	r7, #0
 	mov	r6, r7
-.L2885:
+.L2877:
+	.loc 4 805 0 discriminator 1
 	ldrh	r3, [r8]
 	uxth	r0, r7
+.LVL3194:
 	adds	r7, r7, #1
 	cmp	r3, r0
-	bhi	.L2889
+	bhi	.L2881
+	.loc 4 807 0
 	ldrh	r2, [r10]
-	ldr	r3, .L2907+44
+	ldr	r3, .L2899+44
+	.loc 4 810 0
 	ldrh	r4, [r4]
-	ldr	r7, .L2907+48
+	ldr	r7, .L2899+48
+	.loc 4 807 0
 	str	r2, [r3]
-	ldr	r3, .L2907+52
+	.loc 4 810 0
+	ldr	r3, .L2899+52
 	mov	r1, r4
 	ldr	r3, [r3]
 	mov	r0, r3
-	str	r3, [sp, #16]
+.LVL3195:
+	str	r3, [sp, #8]
 	bl	__aeabi_uidiv
-	ldr	r1, .L2907+56
+.LVL3196:
+	.loc 4 811 0
+	ldr	r1, .L2899+56
 	ubfx	r3, r0, #5, #16
 	add	r2, r3, #36
+	.loc 4 810 0
 	mov	fp, r0
 	str	r0, [r7]
+	.loc 4 811 0
 	strh	r2, [r1]	@ movhi
+	.loc 4 812 0
 	movs	r2, #24
 	muls	r2, r4, r2
-	str	r3, [sp, #4]
-	str	r1, [sp, #8]
+	.loc 4 811 0
+	str	r3, [sp]
+	str	r1, [sp, #4]
+	.loc 4 812 0
 	cmp	r6, r2
-	ble	.L2890
-	ldr	r3, [sp, #16]
+	ble	.L2882
+	.loc 4 813 0
+	ldr	r3, [sp, #8]
 	mov	r1, r4
 	subs	r0, r3, r6
 	bl	__aeabi_uidiv
-	ldr	r3, [sp, #8]
+.LVL3197:
+	.loc 4 814 0
+	ldr	r3, [sp, #4]
+	.loc 4 813 0
 	str	r0, [r7]
+	.loc 4 814 0
 	lsrs	r0, r0, #5
 	adds	r0, r0, #24
 	strh	r0, [r3]	@ movhi
-.L2890:
-	ldr	r3, .L2907+60
+.L2882:
+	.loc 4 817 0
+	ldr	r3, .L2899+60
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L2891
-	ldr	r2, .L2907+56
+	bne	.L2883
+	.loc 4 818 0
+	ldr	r2, .L2899+56
 	mov	r1, r4
 	mov	r0, r6
 	ldrh	r3, [r2]
-	str	r2, [sp, #20]
-	str	r3, [sp, #16]
+	str	r2, [sp, #12]
+	str	r3, [sp, #8]
 	bl	__aeabi_uidiv
-	ldr	r3, [sp, #16]
-	ldr	r2, [sp, #20]
+.LVL3198:
+	ldr	r3, [sp, #8]
+	ldr	r2, [sp, #12]
 	uxtah	r0, r3, r0
 	add	r3, r3, r0, asr #2
 	strh	r3, [r2]	@ movhi
-.L2891:
-	ldr	r3, .L2907+64
+.L2883:
+	.loc 4 820 0
+	ldr	r3, .L2899+64
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2892
-	ldr	r2, .L2907+56
+	cbz	r3, .L2884
+	.loc 4 821 0
+	ldr	r2, .L2899+56
 	mov	r1, r4
 	mov	r0, r6
 	ldrh	r3, [r2]
-	str	r2, [sp, #20]
-	str	r3, [sp, #16]
+	str	r2, [sp, #12]
+	str	r3, [sp, #8]
 	bl	__aeabi_uidiv
-	ldr	r3, [sp, #16]
-	ldr	r2, [sp, #20]
+.LVL3199:
+	ldr	r3, [sp, #8]
+	ldr	r2, [sp, #12]
 	uxtah	r0, r3, r0
 	add	r3, r3, r0, asr #2
 	strh	r3, [r2]	@ movhi
-.L2892:
-	ldr	r3, .L2907+68
+.L2884:
+	.loc 4 823 0
+	ldr	r3, .L2899+68
 	ldrh	r3, [r3]
-	cbz	r3, .L2894
-	ldr	r2, .L2907+56
+	cbz	r3, .L2886
+	.loc 4 824 0
+	ldr	r2, .L2899+56
 	ldrh	r1, [r2]
 	add	r1, r1, r3, lsr #1
 	strh	r1, [r2]	@ movhi
+	.loc 4 825 0
 	mul	r1, r4, r3
 	cmp	r6, r1
-	bge	.L2894
-	ldr	r1, [sp, #4]
+	bge	.L2886
+	.loc 4 827 0
+	ldr	r1, [sp]
 	adds	r3, r3, #32
+	.loc 4 826 0
 	str	fp, [r7]
+	.loc 4 827 0
 	add	r1, r1, r3
 	strh	r1, [r2]	@ movhi
-.L2894:
-	ldr	r3, [sp, #8]
-	ldr	r6, .L2907+72
+.L2886:
+	.loc 4 836 0
+	ldr	r3, [sp, #4]
+	ldr	r6, .L2899+72
+.LVL3200:
 	ldrh	r2, [r3]
 	ldr	r3, [r7]
 	subs	r3, r3, r2
 	muls	r4, r3, r4
-	ldr	r3, .L2907+76
+	.loc 4 837 0
+	ldr	r3, .L2899+76
 	ldrh	r3, [r3]
+	.loc 4 836 0
 	str	r4, [r6]
+	.loc 4 837 0
 	muls	r4, r3, r4
-	ldr	r3, [sp, #12]
+	.loc 4 838 0
+	ldr	r3, .L2899+80
 	ldrh	r3, [r3]
+	.loc 4 837 0
 	str	r4, [r7]
-	ldr	r7, .L2907+80
+	.loc 4 857 0
+	ldr	r7, .L2899+84
+	.loc 4 838 0
 	muls	r4, r3, r4
-	ldr	r3, .L2907+84
+	ldr	r3, .L2899+88
 	str	r4, [r3]
+	.loc 4 852 0
 	movw	r4, #65535
+	.loc 4 843 0
 	bl	FtlBbmTblFlush
+.LVL3201:
+	.loc 4 850 0
 	ldrh	r2, [r10]
 	movs	r1, #0
-	ldr	r10, .L2907+116
+	ldr	r10, .L2899+120
 	lsls	r2, r2, #1
 	ldr	r0, [r10]
 	bl	ftl_memset
-	ldr	r2, .L2907+88
+.LVL3202:
+	.loc 4 851 0
+	ldr	r2, .L2899+92
 	movs	r3, #0
+	.loc 4 857 0
 	strh	r3, [r7, #2]	@ movhi
+	.loc 4 861 0
 	movs	r1, #255
+	.loc 4 858 0
 	strb	r3, [r7, #6]
+	.loc 4 851 0
 	str	r3, [r2]
-	ldr	r2, .L2907+92
+	.loc 4 852 0
+	ldr	r2, .L2899+96
+	.loc 4 859 0
 	strh	r3, [r7]	@ movhi
+	.loc 4 853 0
 	strh	r3, [r2, #2]	@ movhi
+	.loc 4 854 0
 	strb	r3, [r2, #6]
+	.loc 4 855 0
 	strb	r3, [r2, #8]
+	.loc 4 860 0
 	movs	r3, #1
+	.loc 4 852 0
 	strh	r4, [r2]	@ movhi
+	.loc 4 861 0
 	ldrh	r2, [r8]
 	mov	r8, r10
+	.loc 4 860 0
 	strb	r3, [r7, #8]
+	.loc 4 870 0
 	mov	r10, r7
-	ldr	r3, .L2907+96
+	.loc 4 861 0
+	ldr	r3, .L2899+100
 	lsrs	r2, r2, #3
 	ldr	r0, [r3]
 	bl	ftl_memset
-.L2896:
+.LVL3203:
+.L2888:
+	.loc 4 870 0
 	mov	r0, r10
 	bl	make_superblock
+.LVL3204:
+	.loc 4 871 0
 	ldrb	r3, [r7, #7]	@ zero_extendqisi2
 	ldrh	r2, [r7]
 	cmp	r3, #0
-	bne	.L2897
+	bne	.L2889
+	.loc 4 874 0
 	ldr	r3, [r8]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
+	.loc 4 875 0
 	ldrh	r3, [r7]
 	adds	r3, r3, #1
 	strh	r3, [r7]	@ movhi
-	b	.L2896
-.L2881:
-	mvns	r0, r3
-	orr	r0, r3, r0, lsl #16
-	str	r0, [r4, r3, lsl #2]
-	str	ip, [r7, r3, lsl #2]
-	b	.L2880
-.L2883:
+	.loc 4 876 0
+	b	.L2888
+.LVL3205:
+.L2873:
+	.loc 4 785 0 discriminator 3
+	ldr	r0, [r7]
+	mvns	r1, r3
+	orr	r1, r3, r1, lsl #16
+	str	r1, [r0, r3, lsl #2]
+	.loc 4 786 0 discriminator 3
+	ldr	r1, [r4]
+	str	lr, [r1, r3, lsl #2]
+.LVL3206:
+	b	.L2872
+.LVL3207:
+.L2875:
+	.loc 4 792 0 discriminator 3
 	mov	r0, r4
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
+.LVL3208:
+	.loc 4 791 0 discriminator 3
 	adds	r4, r4, #1
+.LVL3209:
+	.loc 4 792 0 discriminator 3
 	add	r7, r7, r0
+.LVL3210:
 	uxth	r7, r7
+.LVL3211:
+	.loc 4 791 0 discriminator 3
 	uxth	r4, r4
-	b	.L2882
-.L2884:
+.LVL3212:
+	b	.L2874
+.LVL3213:
+.L2876:
+	.loc 4 796 0
 	mov	r0, r7
 	bl	__aeabi_uidiv
-	ldr	r3, .L2907+100
+.LVL3214:
+	ldr	r3, .L2899+104
 	ldr	r3, [r3]
 	add	r0, r0, r3
 	uxth	r0, r0
 	bl	FtlSysBlkNumInit
+.LVL3215:
+	.loc 4 797 0
 	ldrh	r0, [r6]
 	bl	FtlFreeSysBlkQueueInit
+.LVL3216:
+	.loc 4 799 0
 	ldrh	r6, [r8]
-.L2886:
+.LVL3217:
+.L2878:
+	.loc 4 799 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r10]
 	cmp	r3, r6
-	bls	.L2888
+	bls	.L2880
+	.loc 4 800 0 is_stmt 1 discriminator 3
 	mov	r0, r6
 	movs	r1, #1
+	.loc 4 799 0 discriminator 3
 	adds	r6, r6, #1
+.LVL3218:
+	.loc 4 800 0 discriminator 3
 	bl	FtlLowFormatEraseBlock
+.LVL3219:
+	.loc 4 799 0 discriminator 3
 	uxth	r6, r6
-	b	.L2886
-.L2889:
+.LVL3220:
+	b	.L2878
+.LVL3221:
+.L2881:
+	.loc 4 806 0 discriminator 3
 	movs	r1, #0
 	bl	FtlLowFormatEraseBlock
+.LVL3222:
 	add	r6, r6, r0
+.LVL3223:
 	uxth	r6, r6
-	b	.L2885
-.L2897:
+.LVL3224:
+	b	.L2877
+.LVL3225:
+.L2889:
+	.loc 4 878 0
 	ldr	r3, [r5]
+	.loc 4 879 0
 	ldrh	r1, [r7, #4]
-	ldr	r4, .L2907+104
+	.loc 4 881 0
+	ldr	r4, .L2899+108
+	.loc 4 878 0
 	str	r3, [r7, #12]
 	adds	r3, r3, #1
 	str	r3, [r5]
+	.loc 4 879 0
 	ldr	r3, [r8]
+	.loc 4 886 0
 	mov	r10, r4
+	.loc 4 879 0
 	strh	r1, [r3, r2, lsl #1]	@ movhi
+	.loc 4 881 0
 	movs	r3, #0
 	strh	r3, [r4, #2]	@ movhi
+	.loc 4 882 0
 	strb	r3, [r4, #6]
+	.loc 4 883 0
 	ldrh	r3, [r7]
+	.loc 4 890 0
 	movw	r7, #65535
+	.loc 4 883 0
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
+	.loc 4 884 0
 	movs	r3, #1
 	strb	r3, [r4, #8]
-.L2898:
+.L2890:
+	.loc 4 886 0
 	mov	r0, r10
 	bl	make_superblock
+.LVL3226:
+	.loc 4 887 0
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r4]
 	cmp	r3, #0
-	bne	.L2899
+	bne	.L2891
+	.loc 4 890 0
 	ldr	r3, [r8]
 	strh	r7, [r3, r2, lsl #1]	@ movhi
+	.loc 4 891 0
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	b	.L2898
-.L2908:
+	.loc 4 892 0
+	b	.L2890
+.L2900:
 	.align	2
-.L2907:
-	.word	.LANCHOR65
+.L2899:
+	.word	.LANCHOR76
+	.word	.LANCHOR66
 	.word	.LANCHOR192
-	.word	.LANCHOR75
-	.word	.LANCHOR37
-	.word	.LANCHOR158
+	.word	.LANCHOR38
+	.word	.LANCHOR128
+	.word	.LANCHOR156
 	.word	.LANCHOR157
-	.word	.LANCHOR54
 	.word	.LANCHOR183
 	.word	.LANCHOR184
-	.word	.LANCHOR38
-	.word	.LANCHOR36
+	.word	.LANCHOR39
+	.word	.LANCHOR37
+	.word	.LANCHOR73
 	.word	.LANCHOR72
-	.word	.LANCHOR71
-	.word	.LANCHOR40
+	.word	.LANCHOR41
 	.word	.LANCHOR227
-	.word	.LANCHOR101
+	.word	.LANCHOR28
 	.word	.LANCHOR8
-	.word	.LANCHOR47
+	.word	.LANCHOR48
 	.word	.LANCHOR226
-	.word	.LANCHOR51
-	.word	.LANCHOR90
-	.word	.LANCHOR67
-	.word	.LANCHOR99
+	.word	.LANCHOR52
+	.word	.LANCHOR55
+	.word	.LANCHOR91
+	.word	.LANCHOR68
+	.word	.LANCHOR100
 	.word	.LANCHOR201
 	.word	.LANCHOR0
-	.word	.LANCHOR64
-	.word	.LANCHOR91
+	.word	.LANCHOR65
+	.word	.LANCHOR92
 	.word	168778952
-	.word	.LANCHOR39
-	.word	.LANCHOR82
-.L2899:
+	.word	.LANCHOR40
+	.word	.LANCHOR83
+.L2891:
+	.loc 4 894 0
 	ldr	r3, [r5]
+	.loc 4 895 0
 	ldrh	r1, [r4, #4]
+	.loc 4 894 0
 	str	r3, [r4, #12]
 	adds	r3, r3, #1
 	str	r3, [r5]
+	.loc 4 896 0
 	movw	r4, #65535
+	.loc 4 895 0
 	ldr	r3, [r8]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L2909
+	.loc 4 896 0
+	ldr	r3, .L2901
 	strh	r4, [r3]	@ movhi
+	.loc 4 899 0
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L2909+4
+.LVL3227:
+	ldr	r3, .L2901+4
+	.loc 4 900 0
 	movs	r2, #0
 	strh	r2, [r3, #2]	@ movhi
+	.loc 4 902 0
 	ldr	r2, [r6]
+	.loc 4 899 0
 	strh	r0, [r3]	@ movhi
+	.loc 4 901 0
 	strh	r4, [r3, #4]	@ movhi
+	.loc 4 902 0
 	strh	r2, [r3, #6]	@ movhi
+	.loc 4 903 0
 	ldr	r2, [r5]
 	str	r2, [r3, #8]
 	adds	r2, r2, #1
 	str	r2, [r5]
+	.loc 4 904 0
 	bl	FtlVpcTblFlush
+.LVL3228:
+	.loc 4 905 0
 	bl	FtlSysBlkInit
-	cbnz	r0, .L2878
-	ldr	r3, .L2909+8
+.LVL3229:
+	cbnz	r0, .L2870
+	.loc 4 906 0
+	ldr	r3, .L2901+8
 	movs	r2, #1
 	str	r2, [r3]
-.L2878:
+.L2870:
+	.loc 4 908 0
 	movs	r0, #0
-	add	sp, sp, #24
+	add	sp, sp, #16
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2910:
+.L2902:
 	.align	2
-.L2909:
-	.word	.LANCHOR92
+.L2901:
+	.word	.LANCHOR93
 	.word	.LANCHOR206
 	.word	.LANCHOR223
+	.cfi_endproc
+.LFE301:
 	.size	FtlLowFormat, .-FtlLowFormat
 	.global	FtlMallocOffset
 	.global	FtlMallocBuffer
@@ -20542,7 +33354,6 @@ FtlLowFormat:
 	.global	random_seed
 	.global	gSlcNandParaInfo
 	.global	gNandParaInfo
-	.global	NandFlashParaTbl
 	.global	g_page_map_check_enable
 	.global	g_power_lost_ecc_error_blk
 	.global	g_power_lost_recovery_flag
@@ -20749,7 +33560,7 @@ FtlLowFormat:
 	.global	read_retry_cur_offset
 	.section	.bss.DeviceCapacity,"aw",%nobits
 	.align	2
-	.set	.LANCHOR59,. + 0
+	.set	.LANCHOR60,. + 0
 	.type	DeviceCapacity, %object
 	.size	DeviceCapacity, 4
 DeviceCapacity:
@@ -20770,7 +33581,7 @@ DieCsIndex:
 	.space	8
 	.section	.bss.FlashDdrTunningReadCount,"aw",%nobits
 	.align	2
-	.set	.LANCHOR142,. + 0
+	.set	.LANCHOR141,. + 0
 	.type	FlashDdrTunningReadCount, %object
 	.size	FlashDdrTunningReadCount, 4
 FlashDdrTunningReadCount:
@@ -20789,7 +33600,7 @@ FtlMallocBuffer:
 	.space	1310720
 	.section	.bss.FtlUpdateVaildLpnCount,"aw",%nobits
 	.align	1
-	.set	.LANCHOR98,. + 0
+	.set	.LANCHOR99,. + 0
 	.type	FtlUpdateVaildLpnCount, %object
 	.size	FtlUpdateVaildLpnCount, 2
 FtlUpdateVaildLpnCount:
@@ -20810,42 +33621,42 @@ c_ftl_nand_bbm_buf_size:
 	.space	2
 	.section	.bss.c_ftl_nand_blk_pre_plane,"aw",%nobits
 	.align	1
-	.set	.LANCHOR39,. + 0
+	.set	.LANCHOR40,. + 0
 	.type	c_ftl_nand_blk_pre_plane, %object
 	.size	c_ftl_nand_blk_pre_plane, 2
 c_ftl_nand_blk_pre_plane:
 	.space	2
 	.section	.bss.c_ftl_nand_blks_per_die,"aw",%nobits
 	.align	1
-	.set	.LANCHOR49,. + 0
+	.set	.LANCHOR50,. + 0
 	.type	c_ftl_nand_blks_per_die, %object
 	.size	c_ftl_nand_blks_per_die, 2
 c_ftl_nand_blks_per_die:
 	.space	2
 	.section	.bss.c_ftl_nand_blks_per_die_shift,"aw",%nobits
 	.align	1
-	.set	.LANCHOR50,. + 0
+	.set	.LANCHOR51,. + 0
 	.type	c_ftl_nand_blks_per_die_shift, %object
 	.size	c_ftl_nand_blks_per_die_shift, 2
 c_ftl_nand_blks_per_die_shift:
 	.space	2
 	.section	.bss.c_ftl_nand_byte_pre_oob,"aw",%nobits
 	.align	1
-	.set	.LANCHOR57,. + 0
+	.set	.LANCHOR58,. + 0
 	.type	c_ftl_nand_byte_pre_oob, %object
 	.size	c_ftl_nand_byte_pre_oob, 2
 c_ftl_nand_byte_pre_oob:
 	.space	2
 	.section	.bss.c_ftl_nand_byte_pre_page,"aw",%nobits
 	.align	1
-	.set	.LANCHOR56,. + 0
+	.set	.LANCHOR57,. + 0
 	.type	c_ftl_nand_byte_pre_page, %object
 	.size	c_ftl_nand_byte_pre_page, 2
 c_ftl_nand_byte_pre_page:
 	.space	2
 	.section	.bss.c_ftl_nand_data_blks_per_plane,"aw",%nobits
 	.align	1
-	.set	.LANCHOR38,. + 0
+	.set	.LANCHOR39,. + 0
 	.type	c_ftl_nand_data_blks_per_plane, %object
 	.size	c_ftl_nand_data_blks_per_plane, 2
 c_ftl_nand_data_blks_per_plane:
@@ -20859,161 +33670,161 @@ c_ftl_nand_data_op_blks_per_plane:
 	.space	2
 	.section	.bss.c_ftl_nand_die_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR43,. + 0
+	.set	.LANCHOR44,. + 0
 	.type	c_ftl_nand_die_num, %object
 	.size	c_ftl_nand_die_num, 2
 c_ftl_nand_die_num:
 	.space	2
 	.section	.bss.c_ftl_nand_ext_blk_pre_plane,"aw",%nobits
 	.align	1
-	.set	.LANCHOR47,. + 0
+	.set	.LANCHOR48,. + 0
 	.type	c_ftl_nand_ext_blk_pre_plane, %object
 	.size	c_ftl_nand_ext_blk_pre_plane, 2
 c_ftl_nand_ext_blk_pre_plane:
 	.space	2
 	.section	.bss.c_ftl_nand_init_sys_blks_per_plane,"aw",%nobits
 	.align	2
-	.set	.LANCHOR64,. + 0
+	.set	.LANCHOR65,. + 0
 	.type	c_ftl_nand_init_sys_blks_per_plane, %object
 	.size	c_ftl_nand_init_sys_blks_per_plane, 4
 c_ftl_nand_init_sys_blks_per_plane:
 	.space	4
 	.section	.bss.c_ftl_nand_l2pmap_ram_region_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR66,. + 0
+	.set	.LANCHOR67,. + 0
 	.type	c_ftl_nand_l2pmap_ram_region_num, %object
 	.size	c_ftl_nand_l2pmap_ram_region_num, 2
 c_ftl_nand_l2pmap_ram_region_num:
 	.space	2
 	.section	.bss.c_ftl_nand_map_blks_per_plane,"aw",%nobits
 	.align	1
-	.set	.LANCHOR62,. + 0
+	.set	.LANCHOR63,. + 0
 	.type	c_ftl_nand_map_blks_per_plane, %object
 	.size	c_ftl_nand_map_blks_per_plane, 2
 c_ftl_nand_map_blks_per_plane:
 	.space	2
 	.section	.bss.c_ftl_nand_map_region_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR65,. + 0
+	.set	.LANCHOR66,. + 0
 	.type	c_ftl_nand_map_region_num, %object
 	.size	c_ftl_nand_map_region_num, 2
 c_ftl_nand_map_region_num:
 	.space	2
 	.section	.bss.c_ftl_nand_max_data_blks,"aw",%nobits
 	.align	2
-	.set	.LANCHOR40,. + 0
+	.set	.LANCHOR41,. + 0
 	.type	c_ftl_nand_max_data_blks, %object
 	.size	c_ftl_nand_max_data_blks, 4
 c_ftl_nand_max_data_blks:
 	.space	4
 	.section	.bss.c_ftl_nand_max_map_blks,"aw",%nobits
 	.align	2
-	.set	.LANCHOR63,. + 0
+	.set	.LANCHOR64,. + 0
 	.type	c_ftl_nand_max_map_blks, %object
 	.size	c_ftl_nand_max_map_blks, 4
 c_ftl_nand_max_map_blks:
 	.space	4
 	.section	.bss.c_ftl_nand_max_sys_blks,"aw",%nobits
 	.align	2
-	.set	.LANCHOR37,. + 0
+	.set	.LANCHOR38,. + 0
 	.type	c_ftl_nand_max_sys_blks, %object
 	.size	c_ftl_nand_max_sys_blks, 4
 c_ftl_nand_max_sys_blks:
 	.space	4
 	.section	.bss.c_ftl_nand_max_vendor_blks,"aw",%nobits
 	.align	1
-	.set	.LANCHOR60,. + 0
+	.set	.LANCHOR61,. + 0
 	.type	c_ftl_nand_max_vendor_blks, %object
 	.size	c_ftl_nand_max_vendor_blks, 2
 c_ftl_nand_max_vendor_blks:
 	.space	2
 	.section	.bss.c_ftl_nand_page_pre_blk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR51,. + 0
+	.set	.LANCHOR52,. + 0
 	.type	c_ftl_nand_page_pre_blk, %object
 	.size	c_ftl_nand_page_pre_blk, 2
 c_ftl_nand_page_pre_blk:
 	.space	2
 	.section	.bss.c_ftl_nand_page_pre_slc_blk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR52,. + 0
+	.set	.LANCHOR53,. + 0
 	.type	c_ftl_nand_page_pre_slc_blk, %object
 	.size	c_ftl_nand_page_pre_slc_blk, 2
 c_ftl_nand_page_pre_slc_blk:
 	.space	2
 	.section	.bss.c_ftl_nand_page_pre_super_blk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR53,. + 0
+	.set	.LANCHOR54,. + 0
 	.type	c_ftl_nand_page_pre_super_blk, %object
 	.size	c_ftl_nand_page_pre_super_blk, 2
 c_ftl_nand_page_pre_super_blk:
 	.space	2
 	.section	.bss.c_ftl_nand_planes_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR36,. + 0
+	.set	.LANCHOR37,. + 0
 	.type	c_ftl_nand_planes_num, %object
 	.size	c_ftl_nand_planes_num, 2
 c_ftl_nand_planes_num:
 	.space	2
 	.section	.bss.c_ftl_nand_planes_per_die,"aw",%nobits
 	.align	1
-	.set	.LANCHOR44,. + 0
+	.set	.LANCHOR45,. + 0
 	.type	c_ftl_nand_planes_per_die, %object
 	.size	c_ftl_nand_planes_per_die, 2
 c_ftl_nand_planes_per_die:
 	.space	2
 	.section	.bss.c_ftl_nand_reserved_blks,"aw",%nobits
 	.align	1
-	.set	.LANCHOR58,. + 0
+	.set	.LANCHOR59,. + 0
 	.type	c_ftl_nand_reserved_blks, %object
 	.size	c_ftl_nand_reserved_blks, 2
 c_ftl_nand_reserved_blks:
 	.space	2
 	.section	.bss.c_ftl_nand_sec_pre_page,"aw",%nobits
 	.align	1
-	.set	.LANCHOR54,. + 0
+	.set	.LANCHOR55,. + 0
 	.type	c_ftl_nand_sec_pre_page, %object
 	.size	c_ftl_nand_sec_pre_page, 2
 c_ftl_nand_sec_pre_page:
 	.space	2
 	.section	.bss.c_ftl_nand_sec_pre_page_shift,"aw",%nobits
 	.align	1
-	.set	.LANCHOR55,. + 0
+	.set	.LANCHOR56,. + 0
 	.type	c_ftl_nand_sec_pre_page_shift, %object
 	.size	c_ftl_nand_sec_pre_page_shift, 2
 c_ftl_nand_sec_pre_page_shift:
 	.space	2
 	.section	.bss.c_ftl_nand_sys_blks_per_plane,"aw",%nobits
 	.align	2
-	.set	.LANCHOR35,. + 0
+	.set	.LANCHOR36,. + 0
 	.type	c_ftl_nand_sys_blks_per_plane, %object
 	.size	c_ftl_nand_sys_blks_per_plane, 4
 c_ftl_nand_sys_blks_per_plane:
 	.space	4
 	.section	.bss.c_ftl_nand_totle_phy_blks,"aw",%nobits
 	.align	2
-	.set	.LANCHOR41,. + 0
+	.set	.LANCHOR42,. + 0
 	.type	c_ftl_nand_totle_phy_blks, %object
 	.size	c_ftl_nand_totle_phy_blks, 4
 c_ftl_nand_totle_phy_blks:
 	.space	4
 	.section	.bss.c_ftl_nand_type,"aw",%nobits
 	.align	1
-	.set	.LANCHOR42,. + 0
+	.set	.LANCHOR43,. + 0
 	.type	c_ftl_nand_type, %object
 	.size	c_ftl_nand_type, 2
 c_ftl_nand_type:
 	.space	2
 	.section	.bss.c_ftl_nand_vendor_region_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR61,. + 0
+	.set	.LANCHOR62,. + 0
 	.type	c_ftl_nand_vendor_region_num, %object
 	.size	c_ftl_nand_vendor_region_num, 2
 c_ftl_nand_vendor_region_num:
 	.space	2
 	.section	.bss.c_ftl_vendor_part_size,"aw",%nobits
 	.align	1
-	.set	.LANCHOR48,. + 0
+	.set	.LANCHOR49,. + 0
 	.type	c_ftl_vendor_part_size, %object
 	.size	c_ftl_vendor_part_size, 2
 c_ftl_vendor_part_size:
@@ -21027,7 +33838,7 @@ c_gc_page_buf_num:
 	.space	4
 	.section	.bss.c_mlc_erase_count_value,"aw",%nobits
 	.align	1
-	.set	.LANCHOR46,. + 0
+	.set	.LANCHOR47,. + 0
 	.type	c_mlc_erase_count_value, %object
 	.size	c_mlc_erase_count_value, 2
 c_mlc_erase_count_value:
@@ -21041,7 +33852,7 @@ ftl_gc_temp_power_lost_recovery_flag:
 	.space	4
 	.section	.bss.gBbtInfo,"aw",%nobits
 	.align	2
-	.set	.LANCHOR73,. + 0
+	.set	.LANCHOR74,. + 0
 	.type	gBbtInfo, %object
 	.size	gBbtInfo, 60
 gBbtInfo:
@@ -21055,7 +33866,7 @@ gBlockPageAlignSize:
 	.space	4
 	.section	.bss.gBootDdrMode,"aw",%nobits
 	.align	2
-	.set	.LANCHOR153,. + 0
+	.set	.LANCHOR152,. + 0
 	.type	gBootDdrMode, %object
 	.size	gBootDdrMode, 4
 gBootDdrMode:
@@ -21080,14 +33891,14 @@ gFlashOnfiModeEn:
 	.space	1
 	.section	.bss.gFlashPageBuffer0,"aw",%nobits
 	.align	2
-	.set	.LANCHOR145,. + 0
+	.set	.LANCHOR144,. + 0
 	.type	gFlashPageBuffer0, %object
 	.size	gFlashPageBuffer0, 4
 gFlashPageBuffer0:
 	.space	4
 	.section	.bss.gFlashPageBuffer1,"aw",%nobits
 	.align	2
-	.set	.LANCHOR151,. + 0
+	.set	.LANCHOR150,. + 0
 	.type	gFlashPageBuffer1, %object
 	.size	gFlashPageBuffer1, 4
 gFlashPageBuffer1:
@@ -21125,7 +33936,7 @@ gFlashSlcMode:
 gFlashSpareBuffer:
 	.space	4
 	.section	.bss.gFlashToggleModeEn,"aw",%nobits
-	.set	.LANCHOR28,. + 0
+	.set	.LANCHOR29,. + 0
 	.type	gFlashToggleModeEn, %object
 	.size	gFlashToggleModeEn, 1
 gFlashToggleModeEn:
@@ -21139,14 +33950,14 @@ gL2pMapInfo:
 	.space	44
 	.section	.bss.gMasterInfo,"aw",%nobits
 	.align	2
-	.set	.LANCHOR33,. + 0
+	.set	.LANCHOR34,. + 0
 	.type	gMasterInfo, %object
 	.size	gMasterInfo, 32
 gMasterInfo:
 	.space	32
 	.section	.bss.gMasterTempBuf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR154,. + 0
+	.set	.LANCHOR153,. + 0
 	.type	gMasterTempBuf, %object
 	.size	gMasterTempBuf, 4
 gMasterTempBuf:
@@ -21171,27 +33982,27 @@ gMultiPageReadEn:
 gNandChipMap:
 	.space	32
 	.section	.bss.gNandFlashEccBits,"aw",%nobits
-	.set	.LANCHOR31,. + 0
+	.set	.LANCHOR32,. + 0
 	.type	gNandFlashEccBits, %object
 	.size	gNandFlashEccBits, 1
 gNandFlashEccBits:
 	.space	1
 	.section	.bss.gNandFlashIDBEccBits,"aw",%nobits
-	.set	.LANCHOR150,. + 0
+	.set	.LANCHOR149,. + 0
 	.type	gNandFlashIDBEccBits, %object
 	.size	gNandFlashIDBEccBits, 1
 gNandFlashIDBEccBits:
 	.space	1
 	.section	.bss.gNandFlashIdbBlockAddr,"aw",%nobits
 	.align	2
-	.set	.LANCHOR147,. + 0
+	.set	.LANCHOR146,. + 0
 	.type	gNandFlashIdbBlockAddr, %object
 	.size	gNandFlashIdbBlockAddr, 4
 gNandFlashIdbBlockAddr:
 	.space	4
 	.section	.bss.gNandFlashInfoBlockAddr,"aw",%nobits
 	.align	2
-	.set	.LANCHOR146,. + 0
+	.set	.LANCHOR145,. + 0
 	.type	gNandFlashInfoBlockAddr, %object
 	.size	gNandFlashInfoBlockAddr, 4
 gNandFlashInfoBlockAddr:
@@ -21214,14 +34025,14 @@ gNandFlashResEndPageAddr:
 gNandIDBResBlkNum:
 	.space	1
 	.section	.bss.gNandIDBResBlkNumSaveInFlash,"aw",%nobits
-	.set	.LANCHOR148,. + 0
+	.set	.LANCHOR147,. + 0
 	.type	gNandIDBResBlkNumSaveInFlash, %object
 	.size	gNandIDBResBlkNumSaveInFlash, 1
 gNandIDBResBlkNumSaveInFlash:
 	.space	1
 	.section	.bss.gNandIDataBuf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR139,. + 0
+	.set	.LANCHOR138,. + 0
 	.type	gNandIDataBuf, %object
 	.size	gNandIDataBuf, 2048
 gNandIDataBuf:
@@ -21259,21 +34070,21 @@ gNandRandomizer:
 	.space	1
 	.section	.bss.gNandcDumpWriteEn,"aw",%nobits
 	.align	2
-	.set	.LANCHOR34,. + 0
+	.set	.LANCHOR35,. + 0
 	.type	gNandcDumpWriteEn, %object
 	.size	gNandcDumpWriteEn, 4
 gNandcDumpWriteEn:
 	.space	4
 	.section	.bss.gNandcEccBits,"aw",%nobits
 	.align	2
-	.set	.LANCHOR30,. + 0
+	.set	.LANCHOR31,. + 0
 	.type	gNandcEccBits, %object
 	.size	gNandcEccBits, 4
 gNandcEccBits:
 	.space	4
 	.section	.bss.gNandcVer,"aw",%nobits
 	.align	2
-	.set	.LANCHOR32,. + 0
+	.set	.LANCHOR33,. + 0
 	.type	gNandcVer, %object
 	.size	gNandcVer, 4
 gNandcVer:
@@ -21286,7 +34097,7 @@ gReadRetryInfo:
 	.space	852
 	.section	.bss.gSysFreeQueue,"aw",%nobits
 	.align	1
-	.set	.LANCHOR74,. + 0
+	.set	.LANCHOR75,. + 0
 	.type	gSysFreeQueue, %object
 	.size	gSysFreeQueue, 2056
 gSysFreeQueue:
@@ -21320,14 +34131,14 @@ gVendorBlkInfo:
 	.space	44
 	.section	.bss.g_GlobalDataVersion,"aw",%nobits
 	.align	2
-	.set	.LANCHOR158,. + 0
+	.set	.LANCHOR157,. + 0
 	.type	g_GlobalDataVersion, %object
 	.size	g_GlobalDataVersion, 4
 g_GlobalDataVersion:
 	.space	4
 	.section	.bss.g_GlobalSysVersion,"aw",%nobits
 	.align	2
-	.set	.LANCHOR157,. + 0
+	.set	.LANCHOR156,. + 0
 	.type	g_GlobalSysVersion, %object
 	.size	g_GlobalSysVersion, 4
 g_GlobalSysVersion:
@@ -21341,7 +34152,7 @@ g_LowFormat:
 	.space	4
 	.section	.bss.g_MaxLbaSector,"aw",%nobits
 	.align	2
-	.set	.LANCHOR67,. + 0
+	.set	.LANCHOR68,. + 0
 	.type	g_MaxLbaSector, %object
 	.size	g_MaxLbaSector, 4
 g_MaxLbaSector:
@@ -21355,49 +34166,49 @@ g_MaxLbn:
 	.space	4
 	.section	.bss.g_MaxLpn,"aw",%nobits
 	.align	2
-	.set	.LANCHOR71,. + 0
+	.set	.LANCHOR72,. + 0
 	.type	g_MaxLpn, %object
 	.size	g_MaxLpn, 4
 g_MaxLpn:
 	.space	4
 	.section	.bss.g_SlcPartLbaEndSector,"aw",%nobits
 	.align	2
-	.set	.LANCHOR155,. + 0
+	.set	.LANCHOR154,. + 0
 	.type	g_SlcPartLbaEndSector, %object
 	.size	g_SlcPartLbaEndSector, 4
 g_SlcPartLbaEndSector:
 	.space	4
 	.section	.bss.g_VaildLpn,"aw",%nobits
 	.align	2
-	.set	.LANCHOR99,. + 0
+	.set	.LANCHOR100,. + 0
 	.type	g_VaildLpn, %object
 	.size	g_VaildLpn, 4
 g_VaildLpn:
 	.space	4
 	.section	.bss.g_active_superblock,"aw",%nobits
 	.align	2
-	.set	.LANCHOR90,. + 0
+	.set	.LANCHOR91,. + 0
 	.type	g_active_superblock, %object
 	.size	g_active_superblock, 48
 g_active_superblock:
 	.space	48
 	.section	.bss.g_all_blk_used_slc_mode,"aw",%nobits
 	.align	2
-	.set	.LANCHOR156,. + 0
+	.set	.LANCHOR155,. + 0
 	.type	g_all_blk_used_slc_mode, %object
 	.size	g_all_blk_used_slc_mode, 4
 g_all_blk_used_slc_mode:
 	.space	4
 	.section	.bss.g_buffer_superblock,"aw",%nobits
 	.align	2
-	.set	.LANCHOR91,. + 0
+	.set	.LANCHOR92,. + 0
 	.type	g_buffer_superblock, %object
 	.size	g_buffer_superblock, 48
 g_buffer_superblock:
 	.space	48
 	.section	.bss.g_cur_erase_blk,"aw",%nobits
 	.align	2
-	.set	.LANCHOR72,. + 0
+	.set	.LANCHOR73,. + 0
 	.type	g_cur_erase_blk, %object
 	.size	g_cur_erase_blk, 4
 g_cur_erase_blk:
@@ -21418,14 +34229,14 @@ g_ect_tbl_power_up_flush:
 	.space	2
 	.section	.bss.g_flash_read_only_en,"aw",%nobits
 	.align	2
-	.set	.LANCHOR75,. + 0
+	.set	.LANCHOR76,. + 0
 	.type	g_flash_read_only_en, %object
 	.size	g_flash_read_only_en, 4
 g_flash_read_only_en:
 	.space	4
 	.section	.bss.g_free_slc_blk_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR137,. + 0
+	.set	.LANCHOR136,. + 0
 	.type	g_free_slc_blk_num, %object
 	.size	g_free_slc_blk_num, 2
 g_free_slc_blk_num:
@@ -21460,7 +34271,7 @@ g_gc_bad_block_temp_tbl:
 	.space	34
 	.section	.bss.g_gc_blk_index,"aw",%nobits
 	.align	1
-	.set	.LANCHOR176,. + 0
+	.set	.LANCHOR175,. + 0
 	.type	g_gc_blk_index, %object
 	.size	g_gc_blk_index, 2
 g_gc_blk_index:
@@ -21488,28 +34299,28 @@ g_gc_cur_blk_valid_pages:
 	.space	2
 	.section	.bss.g_gc_free_blk_threshold,"aw",%nobits
 	.align	1
-	.set	.LANCHOR174,. + 0
+	.set	.LANCHOR173,. + 0
 	.type	g_gc_free_blk_threshold, %object
 	.size	g_gc_free_blk_threshold, 2
 g_gc_free_blk_threshold:
 	.space	2
 	.section	.bss.g_gc_head_data_block,"aw",%nobits
 	.align	2
-	.set	.LANCHOR171,. + 0
+	.set	.LANCHOR170,. + 0
 	.type	g_gc_head_data_block, %object
 	.size	g_gc_head_data_block, 4
 g_gc_head_data_block:
 	.space	4
 	.section	.bss.g_gc_head_data_block_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR172,. + 0
+	.set	.LANCHOR171,. + 0
 	.type	g_gc_head_data_block_count, %object
 	.size	g_gc_head_data_block_count, 4
 g_gc_head_data_block_count:
 	.space	4
 	.section	.bss.g_gc_merge_free_blk_threshold,"aw",%nobits
 	.align	1
-	.set	.LANCHOR175,. + 0
+	.set	.LANCHOR174,. + 0
 	.type	g_gc_merge_free_blk_threshold, %object
 	.size	g_gc_merge_free_blk_threshold, 2
 g_gc_merge_free_blk_threshold:
@@ -21537,14 +34348,14 @@ g_gc_num_req:
 	.space	4
 	.section	.bss.g_gc_page_offset,"aw",%nobits
 	.align	1
-	.set	.LANCHOR110,. + 0
+	.set	.LANCHOR111,. + 0
 	.type	g_gc_page_offset, %object
 	.size	g_gc_page_offset, 2
 g_gc_page_offset:
 	.space	2
 	.section	.bss.g_gc_refresh_block_temp_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR177,. + 0
+	.set	.LANCHOR176,. + 0
 	.type	g_gc_refresh_block_temp_num, %object
 	.size	g_gc_refresh_block_temp_num, 2
 g_gc_refresh_block_temp_num:
@@ -21557,7 +34368,7 @@ g_gc_refresh_block_temp_tbl:
 	.space	34
 	.section	.bss.g_gc_skip_write_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR173,. + 0
+	.set	.LANCHOR172,. + 0
 	.type	g_gc_skip_write_count, %object
 	.size	g_gc_skip_write_count, 4
 g_gc_skip_write_count:
@@ -21571,35 +34382,35 @@ g_gc_superblock:
 	.space	48
 	.section	.bss.g_gc_temp_superblock,"aw",%nobits
 	.align	2
-	.set	.LANCHOR92,. + 0
+	.set	.LANCHOR93,. + 0
 	.type	g_gc_temp_superblock, %object
 	.size	g_gc_temp_superblock, 48
 g_gc_temp_superblock:
 	.space	48
 	.section	.bss.g_in_gc_progress,"aw",%nobits
 	.align	2
-	.set	.LANCHOR169,. + 0
+	.set	.LANCHOR168,. + 0
 	.type	g_in_gc_progress, %object
 	.size	g_in_gc_progress, 4
 g_in_gc_progress:
 	.space	4
 	.section	.bss.g_in_swl_replace,"aw",%nobits
 	.align	2
-	.set	.LANCHOR170,. + 0
+	.set	.LANCHOR169,. + 0
 	.type	g_in_swl_replace, %object
 	.size	g_in_swl_replace, 4
 g_in_swl_replace:
 	.space	4
 	.section	.bss.g_inkDie_check_enable,"aw",%nobits
 	.align	2
-	.set	.LANCHOR101,. + 0
+	.set	.LANCHOR28,. + 0
 	.type	g_inkDie_check_enable, %object
 	.size	g_inkDie_check_enable, 4
 g_inkDie_check_enable:
 	.space	4
 	.section	.bss.g_l2p_last_update_region_id,"aw",%nobits
 	.align	1
-	.set	.LANCHOR96,. + 0
+	.set	.LANCHOR97,. + 0
 	.type	g_l2p_last_update_region_id, %object
 	.size	g_l2p_last_update_region_id, 2
 g_l2p_last_update_region_id:
@@ -21611,49 +34422,49 @@ g_l2p_last_update_region_id:
 g_maxRegNum:
 	.space	1
 	.section	.bss.g_maxRetryCount,"aw",%nobits
-	.set	.LANCHOR149,. + 0
+	.set	.LANCHOR148,. + 0
 	.type	g_maxRetryCount, %object
 	.size	g_maxRetryCount, 1
 g_maxRetryCount:
 	.space	1
 	.section	.bss.g_max_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR167,. + 0
+	.set	.LANCHOR166,. + 0
 	.type	g_max_erase_count, %object
 	.size	g_max_erase_count, 4
 g_max_erase_count:
 	.space	4
 	.section	.bss.g_min_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR168,. + 0
+	.set	.LANCHOR167,. + 0
 	.type	g_min_erase_count, %object
 	.size	g_min_erase_count, 4
 g_min_erase_count:
 	.space	4
 	.section	.bss.g_nandc_version_data,"aw",%nobits
 	.align	2
-	.set	.LANCHOR152,. + 0
+	.set	.LANCHOR151,. + 0
 	.type	g_nandc_version_data, %object
 	.size	g_nandc_version_data, 4
 g_nandc_version_data:
 	.space	4
 	.section	.bss.g_num_data_superblocks,"aw",%nobits
 	.align	1
-	.set	.LANCHOR84,. + 0
+	.set	.LANCHOR85,. + 0
 	.type	g_num_data_superblocks, %object
 	.size	g_num_data_superblocks, 2
 g_num_data_superblocks:
 	.space	2
 	.section	.bss.g_num_free_superblocks,"aw",%nobits
 	.align	1
-	.set	.LANCHOR87,. + 0
+	.set	.LANCHOR88,. + 0
 	.type	g_num_free_superblocks, %object
 	.size	g_num_free_superblocks, 2
 g_num_free_superblocks:
 	.space	2
 	.section	.bss.g_page_map_check_enable,"aw",%nobits
 	.align	1
-	.set	.LANCHOR68,. + 0
+	.set	.LANCHOR69,. + 0
 	.type	g_page_map_check_enable, %object
 	.size	g_page_map_check_enable, 2
 g_page_map_check_enable:
@@ -21714,14 +34525,14 @@ g_slc2KBNand:
 	.space	1
 	.section	.bss.g_sys_ext_data,"aw",%nobits
 	.align	2
-	.set	.LANCHOR136,. + 0
+	.set	.LANCHOR135,. + 0
 	.type	g_sys_ext_data, %object
 	.size	g_sys_ext_data, 512
 g_sys_ext_data:
 	.space	512
 	.section	.bss.g_sys_save_data,"aw",%nobits
 	.align	2
-	.set	.LANCHOR135,. + 0
+	.set	.LANCHOR80,. + 0
 	.type	g_sys_save_data, %object
 	.size	g_sys_save_data, 48
 g_sys_save_data:
@@ -21742,28 +34553,28 @@ g_totle_avg_erase_count:
 	.space	4
 	.section	.bss.g_totle_cache_write_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR162,. + 0
+	.set	.LANCHOR161,. + 0
 	.type	g_totle_cache_write_count, %object
 	.size	g_totle_cache_write_count, 4
 g_totle_cache_write_count:
 	.space	4
 	.section	.bss.g_totle_discard_page_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR161,. + 0
+	.set	.LANCHOR160,. + 0
 	.type	g_totle_discard_page_count, %object
 	.size	g_totle_discard_page_count, 4
 g_totle_discard_page_count:
 	.space	4
 	.section	.bss.g_totle_gc_page_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR159,. + 0
+	.set	.LANCHOR158,. + 0
 	.type	g_totle_gc_page_count, %object
 	.size	g_totle_gc_page_count, 4
 g_totle_gc_page_count:
 	.space	4
 	.section	.bss.g_totle_l2p_write_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR163,. + 0
+	.set	.LANCHOR162,. + 0
 	.type	g_totle_l2p_write_count, %object
 	.size	g_totle_l2p_write_count, 4
 g_totle_l2p_write_count:
@@ -21777,14 +34588,14 @@ g_totle_map_block:
 	.space	2
 	.section	.bss.g_totle_mlc_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR165,. + 0
+	.set	.LANCHOR164,. + 0
 	.type	g_totle_mlc_erase_count, %object
 	.size	g_totle_mlc_erase_count, 4
 g_totle_mlc_erase_count:
 	.space	4
 	.section	.bss.g_totle_read_page_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR164,. + 0
+	.set	.LANCHOR163,. + 0
 	.type	g_totle_read_page_count, %object
 	.size	g_totle_read_page_count, 4
 g_totle_read_page_count:
@@ -21798,7 +34609,7 @@ g_totle_read_sector:
 	.space	4
 	.section	.bss.g_totle_slc_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR166,. + 0
+	.set	.LANCHOR165,. + 0
 	.type	g_totle_slc_erase_count, %object
 	.size	g_totle_slc_erase_count, 4
 g_totle_slc_erase_count:
@@ -21812,21 +34623,21 @@ g_totle_swl_count:
 	.space	4
 	.section	.bss.g_totle_sys_slc_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR78,. + 0
+	.set	.LANCHOR79,. + 0
 	.type	g_totle_sys_slc_erase_count, %object
 	.size	g_totle_sys_slc_erase_count, 4
 g_totle_sys_slc_erase_count:
 	.space	4
 	.section	.bss.g_totle_vendor_block,"aw",%nobits
 	.align	1
-	.set	.LANCHOR69,. + 0
+	.set	.LANCHOR70,. + 0
 	.type	g_totle_vendor_block, %object
 	.size	g_totle_vendor_block, 2
 g_totle_vendor_block:
 	.space	2
 	.section	.bss.g_totle_write_page_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR160,. + 0
+	.set	.LANCHOR159,. + 0
 	.type	g_totle_write_page_count, %object
 	.size	g_totle_write_page_count, 4
 g_totle_write_page_count:
@@ -21854,7 +34665,7 @@ gc_ink_free_return_value:
 	.space	2
 	.section	.bss.gpFlashSaveInfo,"aw",%nobits
 	.align	2
-	.set	.LANCHOR144,. + 0
+	.set	.LANCHOR143,. + 0
 	.type	gpFlashSaveInfo, %object
 	.size	gpFlashSaveInfo, 4
 gpFlashSaveInfo:
@@ -21881,7 +34692,7 @@ gpNandc1:
 	.space	4
 	.section	.bss.gpReadRetrial,"aw",%nobits
 	.align	2
-	.set	.LANCHOR143,. + 0
+	.set	.LANCHOR142,. + 0
 	.type	gpReadRetrial, %object
 	.size	gpReadRetrial, 4
 gpReadRetrial:
@@ -21923,35 +34734,35 @@ p_blk_mode_table:
 	.space	4
 	.section	.bss.p_data_block_list_head,"aw",%nobits
 	.align	2
-	.set	.LANCHOR81,. + 0
+	.set	.LANCHOR82,. + 0
 	.type	p_data_block_list_head, %object
 	.size	p_data_block_list_head, 4
 p_data_block_list_head:
 	.space	4
 	.section	.bss.p_data_block_list_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR80,. + 0
+	.set	.LANCHOR81,. + 0
 	.type	p_data_block_list_table, %object
 	.size	p_data_block_list_table, 4
 p_data_block_list_table:
 	.space	4
 	.section	.bss.p_data_block_list_tail,"aw",%nobits
 	.align	2
-	.set	.LANCHOR83,. + 0
+	.set	.LANCHOR84,. + 0
 	.type	p_data_block_list_tail, %object
 	.size	p_data_block_list_tail, 4
 p_data_block_list_tail:
 	.space	4
 	.section	.bss.p_erase_count_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR77,. + 0
+	.set	.LANCHOR78,. + 0
 	.type	p_erase_count_table, %object
 	.size	p_erase_count_table, 4
 p_erase_count_table:
 	.space	4
 	.section	.bss.p_free_data_block_list_head,"aw",%nobits
 	.align	2
-	.set	.LANCHOR86,. + 0
+	.set	.LANCHOR87,. + 0
 	.type	p_free_data_block_list_head, %object
 	.size	p_free_data_block_list_head, 4
 p_free_data_block_list_head:
@@ -21972,7 +34783,7 @@ p_gc_data_buf:
 	.space	4
 	.section	.bss.p_gc_page_info,"aw",%nobits
 	.align	2
-	.set	.LANCHOR111,. + 0
+	.set	.LANCHOR110,. + 0
 	.type	p_gc_page_info, %object
 	.size	p_gc_page_info, 4
 p_gc_page_info:
@@ -22014,7 +34825,7 @@ p_l2p_map_buf:
 	.space	4
 	.section	.bss.p_l2p_ram_map,"aw",%nobits
 	.align	2
-	.set	.LANCHOR95,. + 0
+	.set	.LANCHOR96,. + 0
 	.type	p_l2p_ram_map, %object
 	.size	p_l2p_ram_map, 4
 p_l2p_ram_map:
@@ -22055,7 +34866,7 @@ p_map_region_ppn_check_table:
 p_map_region_ppn_table:
 	.space	4
 	.section	.bss.p_plane_order_table,"aw",%nobits
-	.set	.LANCHOR45,. + 0
+	.set	.LANCHOR46,. + 0
 	.type	p_plane_order_table, %object
 	.size	p_plane_order_table, 32
 p_plane_order_table:
@@ -22069,7 +34880,7 @@ p_swl_mul_table:
 	.space	4
 	.section	.bss.p_sys_data_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR79,. + 0
+	.set	.LANCHOR180,. + 0
 	.type	p_sys_data_buf, %object
 	.size	p_sys_data_buf, 4
 p_sys_data_buf:
@@ -22096,14 +34907,14 @@ p_valid_page_count_check_table:
 	.space	4
 	.section	.bss.p_valid_page_count_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR82,. + 0
+	.set	.LANCHOR83,. + 0
 	.type	p_valid_page_count_table, %object
 	.size	p_valid_page_count_table, 4
 p_valid_page_count_table:
 	.space	4
 	.section	.bss.p_vendor_block_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR70,. + 0
+	.set	.LANCHOR71,. + 0
 	.type	p_vendor_block_table, %object
 	.size	p_vendor_block_table, 4
 p_vendor_block_table:
@@ -22144,7 +34955,7 @@ read_retry_cur_offset:
 	.space	4
 	.section	.bss.req_erase,"aw",%nobits
 	.align	2
-	.set	.LANCHOR76,. + 0
+	.set	.LANCHOR77,. + 0
 	.type	req_erase, %object
 	.size	req_erase, 4
 req_erase:
@@ -22158,21 +34969,21 @@ req_gc:
 	.space	4
 	.section	.bss.req_gc_dst,"aw",%nobits
 	.align	2
-	.set	.LANCHOR179,. + 0
+	.set	.LANCHOR178,. + 0
 	.type	req_gc_dst, %object
 	.size	req_gc_dst, 4
 req_gc_dst:
 	.space	4
 	.section	.bss.req_prgm,"aw",%nobits
 	.align	2
-	.set	.LANCHOR180,. + 0
+	.set	.LANCHOR179,. + 0
 	.type	req_prgm, %object
 	.size	req_prgm, 4
 req_prgm:
 	.space	4
 	.section	.bss.req_read,"aw",%nobits
 	.align	2
-	.set	.LANCHOR178,. + 0
+	.set	.LANCHOR177,. + 0
 	.type	req_read, %object
 	.size	req_read, 4
 req_read:
@@ -22199,9 +35010,9 @@ FtlMallocOffset:
 	.word	64
 	.section	.data.NandFlashParaTbl,"aw",%progbits
 	.align	1
-	.set	.LANCHOR140,. + 0
+	.set	.LANCHOR139,. + 0
 	.type	NandFlashParaTbl, %object
-	.size	NandFlashParaTbl, 2336
+	.size	NandFlashParaTbl, 2368
 NandFlashParaTbl:
 	.byte	6
 	.byte	44
@@ -22699,6 +35510,32 @@ NandFlashParaTbl:
 	.space	4
 	.byte	5
 	.byte	44
+	.byte	-124
+	.byte	68
+	.byte	50
+	.byte	-86
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	32
+	.short	512
+	.byte	2
+	.byte	2
+	.short	1096
+	.short	1503
+	.byte	5
+	.byte	19
+	.byte	60
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.space	4
+	.byte	5
+	.byte	44
 	.byte	100
 	.byte	68
 	.byte	50
@@ -24102,7 +36939,7 @@ NandFlashParaTbl:
 	.byte	0
 	.space	4
 	.section	.data.NandOptPara,"aw",%progbits
-	.set	.LANCHOR141,. + 0
+	.set	.LANCHOR140,. + 0
 	.type	NandOptPara, %object
 	.size	NandOptPara, 128
 NandOptPara:
@@ -24430,7 +37267,7 @@ gFtlInitStatus:
 	.word	-1
 	.section	.data.gNandParaInfo,"aw",%progbits
 	.align	1
-	.set	.LANCHOR29,. + 0
+	.set	.LANCHOR30,. + 0
 	.type	gNandParaInfo, %object
 	.size	gNandParaInfo, 32
 gNandParaInfo:
@@ -24662,328 +37499,56714 @@ refValueDefault:
 	.byte	-32
 	.byte	-37
 	.section	.rodata.FlashDdrTunningRead.str1.1,"aMS",%progbits,1
-.LC7:
+.LC10:
 	.ascii	"sdr read ok %x ecc=%d\012\000"
-.LC8:
+.LC11:
 	.ascii	"sync para %d\012\000"
-.LC9:
+.LC12:
 	.ascii	"TOG mode Read error %x %x\012\000"
 	.section	.rodata.FlashEraseSLc2KBlocks.str1.1,"aMS",%progbits,1
 .LC1:
 	.ascii	"FlashEraseBlocks pageAddr error %x\012\000"
 	.section	.rodata.FlashInit.str1.1,"aMS",%progbits,1
-.LC18:
+.LC21:
 	.ascii	"No.%d FLASH ID:%x %x %x %x %x %x\012\000"
-.LC19:
+.LC22:
 	.ascii	"FlashLoadPhyInfo fail %x!!\012\000"
 	.section	.rodata.FlashProgSlc2KPages.str1.1,"aMS",%progbits,1
-.LC24:
+.LC27:
 	.ascii	"prog error: = %x\012\000"
-.LC25:
+.LC28:
 	.ascii	"prog read error: = %x\012\000"
-.LC26:
+.LC29:
 	.ascii	"prog read s error: = %x %x %x\012\000"
-.LC27:
+.LC30:
 	.ascii	"prog read d error: = %x %x %x\012\000"
 	.section	.rodata.FlashReadFacBbtData.str1.1,"aMS",%progbits,1
-.LC55:
+.LC58:
 	.ascii	"BBT:\000"
 	.section	.rodata.FlashReadIdbDataRaw.str1.1,"aMS",%progbits,1
-.LC12:
+.LC15:
 	.ascii	"ECC:%d\012\000"
 	.section	.rodata.FlashReadPage.str1.1,"aMS",%progbits,1
-.LC10:
+.LC13:
 	.ascii	"read retry status %x %x %x\012\000"
 	.section	.rodata.FlashReadPages.str1.1,"aMS",%progbits,1
-.LC23:
+.LC26:
 	.ascii	"ReadRetry pageadd=%x ecc=%x err=%x\012\000"
 	.section	.rodata.FlashReadSlc2KPages.str1.1,"aMS",%progbits,1
-.LC20:
+.LC23:
 	.ascii	"Read pageadd=%x  ecc=%x err=%x\012\000"
-.LC21:
+.LC24:
 	.ascii	"data:\000"
-.LC22:
+.LC25:
 	.ascii	"spare:\000"
 	.section	.rodata.FtlBbmMapBadBlock.str1.1,"aMS",%progbits,1
 .LC2:
 	.ascii	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\012"
 	.ascii	"\000"
 	.section	.rodata.FtlBbmTblFlush.str1.1,"aMS",%progbits,1
-.LC28:
+.LC31:
 	.ascii	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\012\000"
-.LC29:
+.LC32:
 	.ascii	"FtlBbmTblFlush error:%x\012\000"
-.LC30:
+.LC33:
 	.ascii	"FtlBbmTblFlush error = %x error count = %d\012\000"
+	.section	.rodata.FtlFreeSysBlkQueueOut.str1.1,"aMS",%progbits,1
+.LC4:
+	.ascii	"FtlFreeSysBlkQueueOut free count = %d\012\000"
+.LC5:
+	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\012"
+	.ascii	"\000"
 	.section	.rodata.FtlGcFreeTempBlock.str1.1,"aMS",%progbits,1
-.LC47:
+.LC50:
 	.ascii	"GC des block %x done\012\000"
 	.section	.rodata.FtlGcScanTempBlk.str1.1,"aMS",%progbits,1
-.LC46:
+.LC49:
 	.ascii	"FtlGcScanTempBlkError ID %x %x!!!!!!!\012\000"
 	.section	.rodata.FtlInit.str1.1,"aMS",%progbits,1
-.LC48:
-	.ascii	"FTL version: 5.0.47 20180208\000"
-.LC49:
+.LC51:
+	.ascii	"FTL version: 5.0.48 20180408\000"
+.LC52:
 	.ascii	"...%s: no bad block mapping table, format device\012"
 	.ascii	"\000"
-.LC50:
+.LC53:
 	.ascii	"...%s FtlSysBlkInit error ,format device!\012\000"
 	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",%progbits,1
-.LC40:
+.LC43:
 	.ascii	"no ect\000"
 	.section	.rodata.FtlMapTblRecovery.str1.1,"aMS",%progbits,1
-.LC42:
+.LC45:
 	.ascii	"page map lost %x %x %x %x\012\000"
 	.section	.rodata.FtlMapWritePage.str1.1,"aMS",%progbits,1
-.LC35:
+.LC38:
 	.ascii	"FtlMapWritePage error = %x\012\000"
-.LC36:
+.LC39:
 	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
 	.section	.rodata.FtlProgPages.str1.1,"aMS",%progbits,1
-.LC38:
+.LC41:
 	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
 	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",%progbits,1
-.LC43:
+.LC46:
 	.ascii	"RSB refresh addr %x\012\000"
-.LC44:
+.LC47:
 	.ascii	"spuer block %x vpn is 0\012 \000"
-.LC45:
+.LC48:
 	.ascii	"g_recovery_ppa %x ver %x\012 \000"
 	.section	.rodata.FtlVendorPartRead.str1.1,"aMS",%progbits,1
-.LC39:
+.LC42:
 	.ascii	"FtlVendorPartRead refresh = %x phyAddr = %x\012\000"
 	.section	.rodata.FtlVpcTblFlush.str1.1,"aMS",%progbits,1
-.LC32:
+.LC35:
 	.ascii	"FtlVpcTblFlush error = %x error count = %d\012\000"
 	.section	.rodata.Ftl_load_ext_data.str1.1,"aMS",%progbits,1
-.LC41:
+.LC44:
 	.ascii	"slc mode\000"
 	.section	.rodata.HynixGetReadRetryDefault.str1.1,"aMS",%progbits,1
-.LC16:
+.LC19:
 	.ascii	"otp error! %d\000"
-.LC17:
+.LC20:
 	.ascii	"rr\000"
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",%progbits,1
-.LC4:
+.LC6:
 	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
-.LC5:
+.LC7:
 	.ascii	"!!!!! FTL sys Error !!!!!\000"
-.LC6:
+.LC8:
 	.ascii	"%s\012\000"
 	.section	.rodata.MicronReadRetrial.str1.1,"aMS",%progbits,1
-.LC11:
+.LC14:
 	.ascii	"micron RR %d row=%x,count %d,status=%d\012\000"
-	.section	.rodata.__func__.10401,"a",%progbits
+	.section	.rodata.__func__.10397,"a",%progbits
 	.set	.LANCHOR240,. + 0
-	.type	__func__.10401, %object
-	.size	__func__.10401, 8
-__func__.10401:
+	.type	__func__.10397, %object
+	.size	__func__.10397, 8
+__func__.10397:
 	.ascii	"FtlInit\000"
-	.section	.rodata.__func__.10461,"a",%progbits
+	.section	.rodata.__func__.10457,"a",%progbits
 	.set	.LANCHOR220,. + 0
-	.type	__func__.10461, %object
-	.size	__func__.10461, 13
-__func__.10461:
+	.type	__func__.10457, %object
+	.size	__func__.10457, 13
+__func__.10457:
 	.ascii	"FtlProgPages\000"
-	.section	.rodata.__func__.10487,"a",%progbits
+	.section	.rodata.__func__.10483,"a",%progbits
 	.set	.LANCHOR242,. + 0
-	.type	__func__.10487, %object
-	.size	__func__.10487, 10
-__func__.10487:
+	.type	__func__.10483, %object
+	.size	__func__.10483, 10
+__func__.10483:
 	.ascii	"ftl_write\000"
-	.section	.rodata.__func__.10550,"a",%progbits
+	.section	.rodata.__func__.10546,"a",%progbits
 	.set	.LANCHOR121,. + 0
-	.type	__func__.10550, %object
-	.size	__func__.10550, 14
-__func__.10550:
+	.type	__func__.10546, %object
+	.size	__func__.10546, 14
+__func__.10546:
 	.ascii	"FtlBbt2Bitmap\000"
-	.section	.rodata.__func__.10596,"a",%progbits
+	.section	.rodata.__func__.10592,"a",%progbits
 	.set	.LANCHOR208,. + 0
-	.type	__func__.10596, %object
-	.size	__func__.10596, 11
-__func__.10596:
+	.type	__func__.10592, %object
+	.size	__func__.10592, 11
+__func__.10592:
 	.ascii	"FtlLoadBbt\000"
-	.section	.rodata.__func__.10705,"a",%progbits
-	.set	.LANCHOR88,. + 0
-	.type	__func__.10705, %object
-	.size	__func__.10705, 17
-__func__.10705:
+	.section	.rodata.__func__.10694,"a",%progbits
+	.set	.LANCHOR89,. + 0
+	.type	__func__.10694, %object
+	.size	__func__.10694, 17
+__func__.10694:
 	.ascii	"INSERT_FREE_LIST\000"
-	.section	.rodata.__func__.10709,"a",%progbits
-	.set	.LANCHOR85,. + 0
-	.type	__func__.10709, %object
-	.size	__func__.10709, 17
-__func__.10709:
+	.section	.rodata.__func__.10698,"a",%progbits
+	.set	.LANCHOR86,. + 0
+	.type	__func__.10698, %object
+	.size	__func__.10698, 17
+__func__.10698:
 	.ascii	"INSERT_DATA_LIST\000"
-	.section	.rodata.__func__.10739,"a",%progbits
-	.set	.LANCHOR89,. + 0
-	.type	__func__.10739, %object
-	.size	__func__.10739, 17
-__func__.10739:
+	.section	.rodata.__func__.10728,"a",%progbits
+	.set	.LANCHOR90,. + 0
+	.type	__func__.10728, %object
+	.size	__func__.10728, 17
+__func__.10728:
 	.ascii	"List_remove_node\000"
-	.section	.rodata.__func__.10769,"a",%progbits
-	.set	.LANCHOR93,. + 0
-	.type	__func__.10769, %object
-	.size	__func__.10769, 22
-__func__.10769:
-	.ascii	"List_update_data_list\000"
-	.section	.rodata.__func__.10776,"a",%progbits
-	.set	.LANCHOR212,. + 0
-	.type	__func__.10776, %object
-	.size	__func__.10776, 16
-__func__.10776:
-	.ascii	"load_l2p_region\000"
-	.section	.rodata.__func__.10806,"a",%progbits
+	.section	.rodata.__func__.10758,"a",%progbits
 	.set	.LANCHOR94,. + 0
-	.type	__func__.10806, %object
-	.size	__func__.10806, 26
-__func__.10806:
+	.type	__func__.10758, %object
+	.size	__func__.10758, 22
+__func__.10758:
+	.ascii	"List_update_data_list\000"
+	.section	.rodata.__func__.10765,"a",%progbits
+	.set	.LANCHOR213,. + 0
+	.type	__func__.10765, %object
+	.size	__func__.10765, 20
+__func__.10765:
+	.ascii	"ftl_load_l2p_region\000"
+	.section	.rodata.__func__.10796,"a",%progbits
+	.set	.LANCHOR95,. + 0
+	.type	__func__.10796, %object
+	.size	__func__.10796, 26
+__func__.10796:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.section	.rodata.__func__.10820,"a",%progbits
+	.section	.rodata.__func__.10810,"a",%progbits
 	.set	.LANCHOR209,. + 0
-	.type	__func__.10820, %object
-	.size	__func__.10820, 15
-__func__.10820:
+	.type	__func__.10810, %object
+	.size	__func__.10810, 15
+__func__.10810:
 	.ascii	"ftl_map_blk_gc\000"
-	.section	.rodata.__func__.10833,"a",%progbits
+	.section	.rodata.__func__.10823,"a",%progbits
 	.set	.LANCHOR210,. + 0
-	.type	__func__.10833, %object
-	.size	__func__.10833, 31
-__func__.10833:
+	.type	__func__.10823, %object
+	.size	__func__.10823, 31
+__func__.10823:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.section	.rodata.__func__.10846,"a",%progbits
+	.section	.rodata.__func__.10836,"a",%progbits
 	.set	.LANCHOR211,. + 0
-	.type	__func__.10846, %object
-	.size	__func__.10846, 16
-__func__.10846:
+	.type	__func__.10836, %object
+	.size	__func__.10836, 16
+__func__.10836:
 	.ascii	"FtlMapWritePage\000"
-	.section	.rodata.__func__.10866,"a",%progbits
-	.set	.LANCHOR97,. + 0
-	.type	__func__.10866, %object
-	.size	__func__.10866, 22
-__func__.10866:
+	.section	.rodata.__func__.10856,"a",%progbits
+	.set	.LANCHOR98,. + 0
+	.type	__func__.10856, %object
+	.size	__func__.10856, 22
+__func__.10856:
 	.ascii	"select_l2p_ram_region\000"
-	.section	.rodata.__func__.10882,"a",%progbits
-	.set	.LANCHOR213,. + 0
-	.type	__func__.10882, %object
-	.size	__func__.10882, 9
-__func__.10882:
+	.section	.rodata.__func__.10872,"a",%progbits
+	.set	.LANCHOR212,. + 0
+	.type	__func__.10872, %object
+	.size	__func__.10872, 9
+__func__.10872:
 	.ascii	"log2phys\000"
-	.section	.rodata.__func__.10944,"a",%progbits
+	.section	.rodata.__func__.10934,"a",%progbits
 	.set	.LANCHOR207,. + 0
-	.type	__func__.10944, %object
-	.size	__func__.10944, 15
-__func__.10944:
+	.type	__func__.10934, %object
+	.size	__func__.10934, 15
+__func__.10934:
 	.ascii	"FtlVpcTblFlush\000"
-	.section	.rodata.__func__.10963,"a",%progbits
+	.section	.rodata.__func__.10953,"a",%progbits
 	.set	.LANCHOR224,. + 0
-	.type	__func__.10963, %object
-	.size	__func__.10963, 14
-__func__.10963:
+	.type	__func__.10953, %object
+	.size	__func__.10953, 14
+__func__.10953:
 	.ascii	"FtlScanSysBlk\000"
-	.section	.rodata.__func__.11017,"a",%progbits
+	.section	.rodata.__func__.11007,"a",%progbits
 	.set	.LANCHOR225,. + 0
-	.type	__func__.11017, %object
-	.size	__func__.11017, 15
-__func__.11017:
+	.type	__func__.11007, %object
+	.size	__func__.11007, 15
+__func__.11007:
 	.ascii	"FtlLoadSysInfo\000"
-	.section	.rodata.__func__.11087,"a",%progbits
+	.section	.rodata.__func__.11077,"a",%progbits
 	.set	.LANCHOR214,. + 0
-	.type	__func__.11087, %object
-	.size	__func__.11087, 16
-__func__.11087:
+	.type	__func__.11077, %object
+	.size	__func__.11077, 16
+__func__.11077:
 	.ascii	"FtlReUsePrevPpa\000"
-	.section	.rodata.__func__.11120,"a",%progbits
+	.section	.rodata.__func__.11110,"a",%progbits
 	.set	.LANCHOR228,. + 0
-	.type	__func__.11120, %object
-	.size	__func__.11120, 22
-__func__.11120:
+	.type	__func__.11110, %object
+	.size	__func__.11110, 22
+__func__.11110:
 	.ascii	"FtlRecoverySuperblock\000"
-	.section	.rodata.__func__.11174,"a",%progbits
-	.set	.LANCHOR100,. + 0
-	.type	__func__.11174, %object
-	.size	__func__.11174, 16
-__func__.11174:
+	.section	.rodata.__func__.11164,"a",%progbits
+	.set	.LANCHOR101,. + 0
+	.type	__func__.11164, %object
+	.size	__func__.11164, 16
+__func__.11164:
 	.ascii	"make_superblock\000"
-	.section	.rodata.__func__.11194,"a",%progbits
-	.set	.LANCHOR138,. + 0
-	.type	__func__.11194, %object
-	.size	__func__.11194, 18
-__func__.11194:
+	.section	.rodata.__func__.11184,"a",%progbits
+	.set	.LANCHOR137,. + 0
+	.type	__func__.11184, %object
+	.size	__func__.11184, 18
+__func__.11184:
 	.ascii	"SupperBlkListInit\000"
-	.section	.rodata.__func__.11271,"a",%progbits
+	.section	.rodata.__func__.11261,"a",%progbits
 	.set	.LANCHOR200,. + 0
-	.type	__func__.11271, %object
-	.size	__func__.11271, 25
-__func__.11271:
+	.type	__func__.11261, %object
+	.size	__func__.11261, 25
+__func__.11261:
 	.ascii	"allocate_data_superblock\000"
-	.section	.rodata.__func__.11285,"a",%progbits
+	.section	.rodata.__func__.11275,"a",%progbits
 	.set	.LANCHOR219,. + 0
-	.type	__func__.11285, %object
-	.size	__func__.11285, 29
-__func__.11285:
+	.type	__func__.11275, %object
+	.size	__func__.11275, 29
+__func__.11275:
 	.ascii	"allocate_new_data_superblock\000"
-	.section	.rodata.__func__.11291,"a",%progbits
+	.section	.rodata.__func__.11281,"a",%progbits
 	.set	.LANCHOR205,. + 0
-	.type	__func__.11291, %object
-	.size	__func__.11291, 19
-__func__.11291:
+	.type	__func__.11281, %object
+	.size	__func__.11281, 19
+__func__.11281:
 	.ascii	"get_new_active_ppa\000"
-	.section	.rodata.__func__.11302,"a",%progbits
+	.section	.rodata.__func__.11292,"a",%progbits
 	.set	.LANCHOR203,. + 0
-	.type	__func__.11302, %object
-	.size	__func__.11302, 16
-__func__.11302:
+	.type	__func__.11292, %object
+	.size	__func__.11292, 16
+__func__.11292:
 	.ascii	"update_vpc_list\000"
-	.section	.rodata.__func__.11307,"a",%progbits
+	.section	.rodata.__func__.11297,"a",%progbits
 	.set	.LANCHOR204,. + 0
-	.type	__func__.11307, %object
-	.size	__func__.11307, 20
-__func__.11307:
+	.type	__func__.11297, %object
+	.size	__func__.11297, 20
+__func__.11297:
 	.ascii	"decrement_vpc_count\000"
-	.section	.rodata.__func__.11375,"a",%progbits
+	.section	.rodata.__func__.11365,"a",%progbits
 	.set	.LANCHOR234,. + 0
-	.type	__func__.11375, %object
-	.size	__func__.11375, 19
-__func__.11375:
+	.type	__func__.11365, %object
+	.size	__func__.11365, 19
+__func__.11365:
 	.ascii	"FtlGcFreeTempBlock\000"
-	.section	.rodata.__func__.11469,"a",%progbits
+	.section	.rodata.__func__.11459,"a",%progbits
 	.set	.LANCHOR238,. + 0
-	.type	__func__.11469, %object
-	.size	__func__.11469, 23
-__func__.11469:
+	.type	__func__.11459, %object
+	.size	__func__.11459, 23
+__func__.11459:
 	.ascii	"rk_ftl_garbage_collect\000"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",%progbits,1
-.LC31:
+.LC34:
 	.ascii	"decrement_vpc_count %x = %d\012\000"
 	.section	.rodata.ftl_fix_nand_power_lost_error.str1.1,"aMS",%progbits,1
-.LC52:
+.LC55:
 	.ascii	"fix power lost blk = %x vpc=%x\012\000"
-.LC53:
+.LC56:
 	.ascii	"erase power lost blk = %x vpc=%x\012\000"
+	.section	.rodata.ftl_map_blk_alloc_new_blk.str1.1,"aMS",%progbits,1
+.LC9:
+	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d\012\000"
 	.section	.rodata.ftl_map_blk_gc.str1.1,"aMS",%progbits,1
-.LC33:
+.LC36:
 	.ascii	"ftl_map_blk_gc blk info: %x %x %x\012\000"
-.LC34:
+.LC37:
 	.ascii	"page map lost: %x %x\012\000"
 	.section	.rodata.ftl_write.str1.1,"aMS",%progbits,1
-.LC54:
+.LC57:
 	.ascii	"FtlWrite: lpa error:%x %x\012\000"
-	.section	.rodata.load_l2p_region.str1.1,"aMS",%progbits,1
-.LC37:
+	.section	.rodata.log2phys.str1.1,"aMS",%progbits,1
+.LC40:
 	.ascii	"load_l2p_region refresh = %x phyAddr = %x\012\000"
 	.section	.rodata.remove_from_free_sys_Queue.str1.1,"aMS",%progbits,1
 .LC3:
 	.ascii	"remove_from_free_sys_Queue %x\012\000"
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",%progbits,1
-.LC51:
+.LC54:
 	.ascii	"FtlInit %x\012\000"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",%progbits,1
-.LC13:
+.LC16:
 	.ascii	"%s 0x%x:\000"
-.LC14:
+.LC17:
 	.ascii	"%x \000"
-.LC15:
+.LC18:
 	.ascii	"\000"
+	.text
+.Letext0:
+	.file 9 "drivers/rknand/rkftl/ftl_typedef.h"
+	.file 10 "drivers/rknand/rkftl/flash_com.h"
+	.file 11 "drivers/rknand/rkftl/flash.h"
+	.file 12 "drivers/rknand/rkftl/nandc.h"
+	.file 13 "include/common.h"
+	.file 14 "include/errno.h"
+	.file 15 "./arch/arm/include/asm/types.h"
+	.file 16 "./arch/arm/include/asm/posix_types.h"
+	.file 17 "include/linux/types.h"
+	.file 18 "include/linux/string.h"
+	.file 19 "include/efi.h"
+	.file 20 "include/ide.h"
+	.file 21 "include/linux/list.h"
+	.file 22 "include/part.h"
+	.file 23 "include/flash.h"
+	.file 24 "include/lmb.h"
+	.file 25 "include/asm-generic/u-boot.h"
+	.file 26 "./arch/arm/include/asm/u-boot-arm.h"
+	.file 27 "include/../scripts/dtc/libfdt/fdt.h"
+	.file 28 "include/libfdt_env.h"
+	.file 29 "include/image.h"
+	.file 30 "include/dm/uclass-id.h"
+	.file 31 "include/net.h"
+	.file 32 "drivers/rknand/rkftl/FtlStruct.h"
+	.file 33 "drivers/rknand/rkftl/FtlGlobal.h"
+	.file 34 "drivers/rknand/rkftl/FtlInc.h"
+	.file 35 "include/malloc.h"
+	.file 36 "include/linux/rbtree.h"
+	.file 37 "include/mtd/mtd-abi.h"
+	.file 38 "include/linux/mtd/mtd.h"
+	.file 39 "include/../drivers/mtd/ubi/ubi-media.h"
+	.file 40 "include/../drivers/mtd/ubi/ubi.h"
+	.file 41 "include/ubi_uboot.h"
+	.file 42 "include/stdio.h"
+	.file 43 "include/linux/delay.h"
+	.file 44 "include/log.h"
+	.section	.debug_info,"",%progbits
+.Ldebug_info0:
+	.4byte	0x10478
+	.2byte	0x4
+	.4byte	.Ldebug_abbrev0
+	.byte	0x4
+	.uleb128 0x1
+	.4byte	.LASF1579
+	.byte	0xc
+	.4byte	.LASF1580
+	.4byte	.LASF1581
+	.4byte	.Ldebug_ranges0+0x6b8
+	.4byte	0
+	.4byte	.Ldebug_line0
+	.uleb128 0x2
+	.byte	0x2
+	.byte	0x7
+	.4byte	.LASF0
+	.uleb128 0x2
+	.byte	0x4
+	.byte	0x7
+	.4byte	.LASF1
+	.uleb128 0x2
+	.byte	0x1
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+	.4byte	.LASF2
+	.uleb128 0x3
+	.4byte	.LASF3
+	.byte	0x9
+	.byte	0x29
+	.4byte	0x33
+	.uleb128 0x3
+	.4byte	.LASF4
+	.byte	0x9
+	.byte	0x2a
+	.4byte	0x50
+	.uleb128 0x2
+	.byte	0x1
+	.byte	0x6
+	.4byte	.LASF5
+	.uleb128 0x3
+	.4byte	.LASF6
+	.byte	0x9
+	.byte	0x2b
+	.4byte	0x25
+	.uleb128 0x3
+	.4byte	.LASF7
+	.byte	0x9
+	.byte	0x2c
+	.4byte	0x6d
+	.uleb128 0x2
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+	.4byte	.LASF8
+	.uleb128 0x3
+	.4byte	.LASF9
+	.byte	0x9
+	.byte	0x2d
+	.4byte	0x2c
+	.uleb128 0x4
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+	.uleb128 0x3
+	.4byte	.LASF10
+	.byte	0x9
+	.byte	0x2e
+	.4byte	0x8f
+	.uleb128 0x5
+	.byte	0x4
+	.byte	0x5
+	.ascii	"int\000"
+	.uleb128 0x2
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+	.byte	0x7
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+	.uleb128 0x2
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+	.4byte	0xaf
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+	.uleb128 0x8
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+	.4byte	0xa4
+	.uleb128 0x8
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+	.byte	0xa
+	.byte	0x17
+	.4byte	0xa4
+	.uleb128 0x9
+	.4byte	.LASF23
+	.byte	0x24
+	.byte	0xa
+	.byte	0x1a
+	.4byte	0x13e
+	.uleb128 0xa
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+	.byte	0xa
+	.byte	0x1c
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+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF16
+	.byte	0xa
+	.byte	0x1d
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+	.byte	0x4
+	.uleb128 0xa
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+	.byte	0xa
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+	.uleb128 0xa
+	.4byte	.LASF18
+	.byte	0xa
+	.byte	0x1f
+	.4byte	0x13e
+	.byte	0xc
+	.uleb128 0xb
+	.ascii	"lpa\000"
+	.byte	0xa
+	.byte	0x20
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+	.uleb128 0xa
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+	.uleb128 0xa
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+	.uleb128 0x4
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+	.byte	0x7
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x3a
+	.4byte	0x4be
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0xff
+	.byte	0
+	.uleb128 0xe
+	.2byte	0x29c
+	.byte	0xb
+	.byte	0xb2
+	.4byte	0x51c
+	.uleb128 0xa
+	.4byte	.LASF75
+	.byte	0xb
+	.byte	0xb4
+	.4byte	0x3a
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF76
+	.byte	0xb
+	.byte	0xb5
+	.4byte	0x3a
+	.byte	0x1
+	.uleb128 0xa
+	.4byte	.LASF77
+	.byte	0xb
+	.byte	0xb6
+	.4byte	0x3a
+	.byte	0x2
+	.uleb128 0xa
+	.4byte	.LASF40
+	.byte	0xb
+	.byte	0xb7
+	.4byte	0x3a
+	.byte	0x3
+	.uleb128 0xa
+	.4byte	.LASF78
+	.byte	0xb
+	.byte	0xb9
+	.4byte	0x51c
+	.byte	0x4
+	.uleb128 0xa
+	.4byte	.LASF79
+	.byte	0xb
+	.byte	0xba
+	.4byte	0x46c
+	.byte	0x14
+	.uleb128 0xa
+	.4byte	.LASF80
+	.byte	0xb
+	.byte	0xbc
+	.4byte	0x52c
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x3a
+	.4byte	0x52c
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0xf
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x45
+	.4byte	0x542
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x3
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x9f
+	.byte	0
+	.uleb128 0x10
+	.byte	0x84
+	.byte	0xb
+	.byte	0xbf
+	.4byte	0x587
+	.uleb128 0xa
+	.4byte	.LASF75
+	.byte	0xb
+	.byte	0xc1
+	.4byte	0x3a
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF76
+	.byte	0xb
+	.byte	0xc2
+	.4byte	0x3a
+	.byte	0x1
+	.uleb128 0xa
+	.4byte	.LASF77
+	.byte	0xb
+	.byte	0xc3
+	.4byte	0x3a
+	.byte	0x2
+	.uleb128 0xa
+	.4byte	.LASF40
+	.byte	0xb
+	.byte	0xc4
+	.4byte	0x3a
+	.byte	0x3
+	.uleb128 0xa
+	.4byte	.LASF80
+	.byte	0xb
+	.byte	0xc6
+	.4byte	0x587
+	.byte	0x4
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x45
+	.4byte	0x597
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x7f
+	.byte	0
+	.uleb128 0x10
+	.byte	0x84
+	.byte	0xb
+	.byte	0xc9
+	.4byte	0x5dc
+	.uleb128 0xa
+	.4byte	.LASF75
+	.byte	0xb
+	.byte	0xcb
+	.4byte	0x3a
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF76
+	.byte	0xb
+	.byte	0xcc
+	.4byte	0x3a
+	.byte	0x1
+	.uleb128 0xa
+	.4byte	.LASF77
+	.byte	0xb
+	.byte	0xcd
+	.4byte	0x3a
+	.byte	0x2
+	.uleb128 0xa
+	.4byte	.LASF40
+	.byte	0xb
+	.byte	0xce
+	.4byte	0x3a
+	.byte	0x3
+	.uleb128 0xa
+	.4byte	.LASF80
+	.byte	0xb
+	.byte	0xcf
+	.4byte	0x587
+	.byte	0x4
+	.byte	0
+	.uleb128 0x11
+	.4byte	.LASF173
+	.2byte	0x354
+	.byte	0xb
+	.byte	0xa0
+	.4byte	0x616
+	.uleb128 0x12
+	.4byte	.LASF82
+	.byte	0xb
+	.byte	0xb0
+	.4byte	0x3f4
+	.uleb128 0x12
+	.4byte	.LASF83
+	.byte	0xb
+	.byte	0xbd
+	.4byte	0x4be
+	.uleb128 0x12
+	.4byte	.LASF84
+	.byte	0xb
+	.byte	0xc7
+	.4byte	0x542
+	.uleb128 0x12
+	.4byte	.LASF85
+	.byte	0xb
+	.byte	0xd0
+	.4byte	0x597
+	.byte	0
+	.uleb128 0x3
+	.4byte	.LASF86
+	.byte	0xb
+	.byte	0xd1
+	.4byte	0x5dc
+	.uleb128 0x9
+	.4byte	.LASF87
+	.byte	0x10
+	.byte	0xb
+	.byte	0xd3
+	.4byte	0x676
+	.uleb128 0xa
+	.4byte	.LASF88
+	.byte	0xb
+	.byte	0xd5
+	.4byte	0x3a
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF89
+	.byte	0xb
+	.byte	0xd6
+	.4byte	0x3a
+	.byte	0x1
+	.uleb128 0xa
+	.4byte	.LASF90
+	.byte	0xb
+	.byte	0xd7
+	.4byte	0x57
+	.byte	0x2
+	.uleb128 0xa
+	.4byte	.LASF16
+	.byte	0xb
+	.byte	0xd8
+	.4byte	0x74
+	.byte	0x4
+	.uleb128 0xa
+	.4byte	.LASF91
+	.byte	0xb
+	.byte	0xd9
+	.4byte	0x676
+	.byte	0x8
+	.uleb128 0xa
+	.4byte	.LASF92
+	.byte	0xb
+	.byte	0xda
+	.4byte	0x676
+	.byte	0xc
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0xc5
+	.uleb128 0x13
+	.4byte	.LASF93
+	.2byte	0x638
+	.byte	0xb
+	.byte	0xdd
+	.4byte	0x728
+	.uleb128 0xb
+	.ascii	"tag\000"
+	.byte	0xb
+	.byte	0xdf
+	.4byte	0x74
+	.byte	0
+	.uleb128 0xb
+	.ascii	"len\000"
+	.byte	0xb
+	.byte	0xe0
+	.4byte	0x74
+	.byte	0x4
+	.uleb128 0xa
+	.4byte	.LASF94
+	.byte	0xb
+	.byte	0xe1
+	.4byte	0x74
+	.byte	0x8
+	.uleb128 0xa
+	.4byte	.LASF95
+	.byte	0xb
+	.byte	0xe2
+	.4byte	0x57
+	.byte	0xc
+	.uleb128 0xa
+	.4byte	.LASF96
+	.byte	0xb
+	.byte	0xe3
+	.4byte	0x57
+	.byte	0xe
+	.uleb128 0xa
+	.4byte	.LASF97
+	.byte	0xb
+	.byte	0xe4
+	.4byte	0x728
+	.byte	0x10
+	.uleb128 0xa
+	.4byte	.LASF98
+	.byte	0xb
+	.byte	0xe5
+	.4byte	0x51c
+	.byte	0x50
+	.uleb128 0xa
+	.4byte	.LASF99
+	.byte	0xb
+	.byte	0xe6
+	.4byte	0x73e
+	.byte	0x60
+	.uleb128 0xa
+	.4byte	.LASF100
+	.byte	0xb
+	.byte	0xe8
+	.4byte	0x3e9
+	.byte	0xa0
+	.uleb128 0xa
+	.4byte	.LASF101
+	.byte	0xb
+	.byte	0xe9
+	.4byte	0x2c1
+	.byte	0xc0
+	.uleb128 0xa
+	.4byte	.LASF102
+	.byte	0xb
+	.byte	0xea
+	.4byte	0x616
+	.byte	0xe0
+	.uleb128 0xf
+	.4byte	.LASF103
+	.byte	0xb
+	.byte	0xec
+	.4byte	0x74
+	.2byte	0x434
+	.uleb128 0xf
+	.4byte	.LASF40
+	.byte	0xb
+	.byte	0xed
+	.4byte	0x74e
+	.2byte	0x438
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x3a
+	.4byte	0x73e
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x7
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x7
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x74
+	.4byte	0x74e
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0xf
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x3a
+	.4byte	0x75f
+	.uleb128 0x14
+	.4byte	0x2aa
+	.2byte	0x1ff
+	.byte	0
+	.uleb128 0x3
+	.4byte	.LASF104
+	.byte	0xb
+	.byte	0xee
+	.4byte	0x67c
+	.uleb128 0x9
+	.4byte	.LASF105
+	.byte	0xb
+	.byte	0xb
+	.byte	0xf0
+	.4byte	0x7cb
+	.uleb128 0xa
+	.4byte	.LASF106
+	.byte	0xb
+	.byte	0xf2
+	.4byte	0x74
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF107
+	.byte	0xb
+	.byte	0xf3
+	.4byte	0x57
+	.byte	0x4
+	.uleb128 0xa
+	.4byte	.LASF108
+	.byte	0xb
+	.byte	0xf4
+	.4byte	0x3a
+	.byte	0x6
+	.uleb128 0xa
+	.4byte	.LASF109
+	.byte	0xb
+	.byte	0xf5
+	.4byte	0x3a
+	.byte	0x7
+	.uleb128 0xa
+	.4byte	.LASF110
+	.byte	0xb
+	.byte	0xf6
+	.4byte	0x3a
+	.byte	0x8
+	.uleb128 0xa
+	.4byte	.LASF111
+	.byte	0xb
+	.byte	0xf7
+	.4byte	0x3a
+	.byte	0x9
+	.uleb128 0xa
+	.4byte	.LASF112
+	.byte	0xb
+	.byte	0xf8
+	.4byte	0x3a
+	.byte	0xa
+	.byte	0
+	.uleb128 0x3
+	.4byte	.LASF113
+	.byte	0xb
+	.byte	0xf9
+	.4byte	0x7d6
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x76a
+	.uleb128 0x6
+	.4byte	0x3a
+	.4byte	0x7ec
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x3
+	.byte	0
+	.uleb128 0x15
+	.4byte	.LASF114
+	.byte	0xb
+	.2byte	0x107
+	.4byte	0x7dc
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	read_retry_cur_offset
+	.uleb128 0x6
+	.4byte	0x3a
+	.4byte	0x814
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x3
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x7
+	.byte	0
+	.uleb128 0x15
+	.4byte	.LASF97
+	.byte	0xb
+	.2byte	0x108
+	.4byte	0x7fe
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	IDByte
+	.uleb128 0x15
+	.4byte	.LASF98
+	.byte	0xb
+	.2byte	0x109
+	.4byte	0x46c
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	DieCsIndex
+	.uleb128 0x6
+	.4byte	0x621
+	.4byte	0x848
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x7
+	.byte	0
+	.uleb128 0x15
+	.4byte	.LASF115
+	.byte	0xb
+	.2byte	0x10a
+	.4byte	0x838
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gDieOp
+	.uleb128 0x6
+	.4byte	0x74
+	.4byte	0x86a
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x7
+	.byte	0
+	.uleb128 0x15
+	.4byte	.LASF99
+	.byte	0xb
+	.2byte	0x10b
+	.4byte	0x85a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	DieAddrs
+	.uleb128 0x16
+	.4byte	0xba
+	.byte	0xb
+	.2byte	0x10c
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	slcPageToMlcPageTbl
+	.uleb128 0x16
+	.4byte	0xaf
+	.byte	0xb
+	.2byte	0x10d
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	mlcPageToSlcPageTbl
+	.uleb128 0x17
+	.4byte	0x74
+	.4byte	0x8b6
+	.uleb128 0x18
+	.4byte	0x3a
+	.uleb128 0x18
+	.4byte	0x74
+	.uleb128 0x18
+	.4byte	0x8b6
+	.uleb128 0x18
+	.4byte	0x8b6
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x3a
+	.uleb128 0x15
+	.4byte	.LASF116
+	.byte	0xb
+	.2byte	0x10e
+	.4byte	0x8ce
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gpReadRetrial
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x898
+	.uleb128 0x15
+	.4byte	.LASF117
+	.byte	0xb
+	.2byte	0x10f
+	.4byte	0x3a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gMultiPageReadEn
+	.uleb128 0x15
+	.4byte	.LASF118
+	.byte	0xb
+	.2byte	0x110
+	.4byte	0x3a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gMultiPageProgEn
+	.uleb128 0x15
+	.4byte	.LASF119
+	.byte	0xb
+	.2byte	0x111
+	.4byte	0x3a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gFlashSdrModeEn
+	.uleb128 0x15
+	.4byte	.LASF120
+	.byte	0xb
+	.2byte	0x112
+	.4byte	0x3a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gFlashToggleModeEn
+	.uleb128 0x15
+	.4byte	.LASF121
+	.byte	0xb
+	.2byte	0x113
+	.4byte	0x3a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gFlashOnfiModeEn
+	.uleb128 0x15
+	.4byte	.LASF122
+	.byte	0xb
+	.2byte	0x115
+	.4byte	0x3a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gFlashSlcMode
+	.uleb128 0x15
+	.4byte	.LASF123
+	.byte	0xb
+	.2byte	0x116
+	.4byte	0x3a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gFlashInterfaceMode
+	.uleb128 0x15
+	.4byte	.LASF124
+	.byte	0xb
+	.2byte	0x117
+	.4byte	0x3a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gNandMaxDie
+	.uleb128 0x15
+	.4byte	.LASF125
+	.byte	0xb
+	.2byte	0x118
+	.4byte	0x3a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gNandMaxChip
+	.uleb128 0x15
+	.4byte	.LASF126
+	.byte	0xb
+	.2byte	0x119
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gTotleBlock
+	.uleb128 0x15
+	.4byte	.LASF127
+	.byte	0xb
+	.2byte	0x11a
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gBlockPageAlignSize
+	.uleb128 0x15
+	.4byte	.LASF128
+	.byte	0xb
+	.2byte	0x11b
+	.4byte	0x3a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gNandRandomizer
+	.uleb128 0x15
+	.4byte	.LASF129
+	.byte	0xb
+	.2byte	0x11c
+	.4byte	0x3a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gNandFlashEccBits
+	.uleb128 0x15
+	.4byte	.LASF130
+	.byte	0xb
+	.2byte	0x11d
+	.4byte	0x3a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gNandFlashIDBEccBits
+	.uleb128 0x15
+	.4byte	.LASF131
+	.byte	0xb
+	.2byte	0x11e
+	.4byte	0x3a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gNandFlashInfoBlockEcc
+	.uleb128 0x15
+	.4byte	.LASF132
+	.byte	0xb
+	.2byte	0x11f
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gNandFlashIdbBlockAddr
+	.uleb128 0x15
+	.4byte	.LASF133
+	.byte	0xb
+	.2byte	0x120
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gNandFlashInfoBlockAddr
+	.uleb128 0x15
+	.4byte	.LASF134
+	.byte	0xb
+	.2byte	0x121
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gNandFlashResEndPageAddr
+	.uleb128 0x15
+	.4byte	.LASF135
+	.byte	0xb
+	.2byte	0x122
+	.4byte	0x3a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gNandIDBResBlkNum
+	.uleb128 0x15
+	.4byte	.LASF136
+	.byte	0xb
+	.2byte	0x123
+	.4byte	0x3a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gNandIDBResBlkNumSaveInFlash
+	.uleb128 0x15
+	.4byte	.LASF137
+	.byte	0xb
+	.2byte	0x124
+	.4byte	0x3a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_retryMode
+	.uleb128 0x15
+	.4byte	.LASF138
+	.byte	0xb
+	.2byte	0x125
+	.4byte	0x3a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_maxRegNum
+	.uleb128 0x15
+	.4byte	.LASF139
+	.byte	0xb
+	.2byte	0x126
+	.4byte	0x3a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_maxRetryCount
+	.uleb128 0x16
+	.4byte	0x1e6
+	.byte	0xb
+	.2byte	0x127
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_slc2KBNand
+	.uleb128 0x19
+	.4byte	.LASF140
+	.byte	0xb
+	.2byte	0x128
+	.4byte	0x3e9
+	.uleb128 0x15
+	.4byte	.LASF141
+	.byte	0xb
+	.2byte	0x129
+	.4byte	0x2c1
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gNandOptPara
+	.uleb128 0x15
+	.4byte	.LASF142
+	.byte	0xb
+	.2byte	0x12a
+	.4byte	0xab0
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gpNandParaInfo
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x3e9
+	.uleb128 0x15
+	.4byte	.LASF143
+	.byte	0xb
+	.2byte	0x12c
+	.4byte	0x616
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gReadRetryInfo
+	.uleb128 0x15
+	.4byte	.LASF144
+	.byte	0xb
+	.2byte	0x12d
+	.4byte	0xada
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gpFlashSaveInfo
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x75f
+	.uleb128 0x15
+	.4byte	.LASF145
+	.byte	0xb
+	.2byte	0x131
+	.4byte	0x13e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gFlashPageBuffer0
+	.uleb128 0x15
+	.4byte	.LASF146
+	.byte	0xb
+	.2byte	0x132
+	.4byte	0x13e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gFlashPageBuffer1
+	.uleb128 0x15
+	.4byte	.LASF147
+	.byte	0xb
+	.2byte	0x133
+	.4byte	0x13e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gFlashSpareBuffer
+	.uleb128 0x15
+	.4byte	.LASF148
+	.byte	0xb
+	.2byte	0x134
+	.4byte	0x13e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gFlashProgCheckBuffer
+	.uleb128 0x15
+	.4byte	.LASF149
+	.byte	0xb
+	.2byte	0x135
+	.4byte	0x13e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gFlashProgCheckSpareBuffer
+	.uleb128 0x15
+	.4byte	.LASF150
+	.byte	0xb
+	.2byte	0x137
+	.4byte	0x144
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gNandPhyInfo
+	.uleb128 0x15
+	.4byte	.LASF151
+	.byte	0xb
+	.2byte	0x138
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	FlashWaitBusyScheduleEn
+	.uleb128 0x15
+	.4byte	.LASF152
+	.byte	0xb
+	.2byte	0x139
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	FlashDdrTunningReadCount
+	.uleb128 0x6
+	.4byte	0x74
+	.4byte	0xb81
+	.uleb128 0x14
+	.4byte	0x2aa
+	.2byte	0x1ff
+	.byte	0
+	.uleb128 0x15
+	.4byte	.LASF153
+	.byte	0xb
+	.2byte	0x13b
+	.4byte	0xb70
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gNandIDataBuf
+	.uleb128 0x1a
+	.4byte	.LASF441
+	.byte	0x4
+	.4byte	0x2c
+	.byte	0xc
+	.byte	0x15
+	.4byte	0xbc2
+	.uleb128 0x1b
+	.4byte	.LASF154
+	.byte	0
+	.uleb128 0x1b
+	.4byte	.LASF155
+	.byte	0x1
+	.uleb128 0x1b
+	.4byte	.LASF156
+	.byte	0x2
+	.uleb128 0x1b
+	.4byte	.LASF157
+	.byte	0x3
+	.uleb128 0x1b
+	.4byte	.LASF158
+	.byte	0x4
+	.byte	0
+	.uleb128 0x3
+	.4byte	.LASF159
+	.byte	0xc
+	.byte	0x1c
+	.4byte	0xb93
+	.uleb128 0x10
+	.byte	0x4
+	.byte	0xc
+	.byte	0x24
+	.4byte	0xc69
+	.uleb128 0x1c
+	.ascii	"cs\000"
+	.byte	0xc
+	.byte	0x26
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x8
+	.byte	0x18
+	.byte	0
+	.uleb128 0x1c
+	.ascii	"wp\000"
+	.byte	0xc
+	.byte	0x27
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x17
+	.byte	0
+	.uleb128 0x1c
+	.ascii	"rdy\000"
+	.byte	0xc
+	.byte	0x28
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x16
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF160
+	.byte	0xc
+	.byte	0x29
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x15
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF161
+	.byte	0xc
+	.byte	0x2a
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x14
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF162
+	.byte	0xc
+	.byte	0x2b
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x13
+	.byte	0
+	.uleb128 0x1c
+	.ascii	"tm\000"
+	.byte	0xc
+	.byte	0x2c
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x12
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF163
+	.byte	0xc
+	.byte	0x2d
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x11
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF164
+	.byte	0xc
+	.byte	0x2e
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x10
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF165
+	.byte	0xc
+	.byte	0x2f
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x10
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x10
+	.byte	0x4
+	.byte	0xc
+	.byte	0x31
+	.4byte	0xd41
+	.uleb128 0x1c
+	.ascii	"cs\000"
+	.byte	0xc
+	.byte	0x33
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x8
+	.byte	0x18
+	.byte	0
+	.uleb128 0x1c
+	.ascii	"wp\000"
+	.byte	0xc
+	.byte	0x34
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x17
+	.byte	0
+	.uleb128 0x1c
+	.ascii	"rdy\000"
+	.byte	0xc
+	.byte	0x35
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x16
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF166
+	.byte	0xc
+	.byte	0x36
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x15
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF167
+	.byte	0xc
+	.byte	0x37
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x14
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF162
+	.byte	0xc
+	.byte	0x38
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x13
+	.byte	0
+	.uleb128 0x1c
+	.ascii	"tm\000"
+	.byte	0xc
+	.byte	0x39
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x12
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF163
+	.byte	0xc
+	.byte	0x3a
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x11
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF164
+	.byte	0xc
+	.byte	0x3b
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x10
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF168
+	.byte	0xc
+	.byte	0x3c
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0xf
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF169
+	.byte	0xc
+	.byte	0x3d
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0xe
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF170
+	.byte	0xc
+	.byte	0x3e
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x6
+	.byte	0x8
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF171
+	.byte	0xc
+	.byte	0x3f
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x3
+	.byte	0x5
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF172
+	.byte	0xc
+	.byte	0x40
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x5
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x1e
+	.4byte	.LASF174
+	.byte	0x4
+	.byte	0xc
+	.byte	0x21
+	.4byte	0xd6d
+	.uleb128 0x1f
+	.ascii	"d32\000"
+	.byte	0xc
+	.byte	0x23
+	.4byte	0x74
+	.uleb128 0x1f
+	.ascii	"V4\000"
+	.byte	0xc
+	.byte	0x30
+	.4byte	0xbcd
+	.uleb128 0x1f
+	.ascii	"V6\000"
+	.byte	0xc
+	.byte	0x41
+	.4byte	0xc69
+	.byte	0
+	.uleb128 0x3
+	.4byte	.LASF175
+	.byte	0xc
+	.byte	0x42
+	.4byte	0xd41
+	.uleb128 0x20
+	.4byte	0xd6d
+	.uleb128 0x10
+	.byte	0x4
+	.byte	0xc
+	.byte	0x57
+	.4byte	0xe85
+	.uleb128 0x1c
+	.ascii	"rst\000"
+	.byte	0xc
+	.byte	0x59
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x1c
+	.ascii	"rdn\000"
+	.byte	0xc
+	.byte	0x5a
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1e
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF176
+	.byte	0xc
+	.byte	0x5b
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1d
+	.byte	0
+	.uleb128 0x1c
+	.ascii	"dma\000"
+	.byte	0xc
+	.byte	0x5c
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF177
+	.byte	0xc
+	.byte	0x5d
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1b
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF178
+	.byte	0xc
+	.byte	0x5e
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x2
+	.byte	0x19
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF179
+	.byte	0xc
+	.byte	0x5f
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x18
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF180
+	.byte	0xc
+	.byte	0x60
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x17
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF181
+	.byte	0xc
+	.byte	0x61
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x16
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF182
+	.byte	0xc
+	.byte	0x62
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x15
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF183
+	.byte	0xc
+	.byte	0x63
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x14
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF184
+	.byte	0xc
+	.byte	0x64
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x6
+	.byte	0xe
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF185
+	.byte	0xc
+	.byte	0x65
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x2
+	.byte	0xc
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF186
+	.byte	0xc
+	.byte	0x66
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0xb
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF187
+	.byte	0xc
+	.byte	0x67
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0xa
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF188
+	.byte	0xc
+	.byte	0x68
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x5
+	.byte	0x5
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF172
+	.byte	0xc
+	.byte	0x69
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x5
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x10
+	.byte	0x4
+	.byte	0xc
+	.byte	0x6b
+	.4byte	0xf9c
+	.uleb128 0x1c
+	.ascii	"rst\000"
+	.byte	0xc
+	.byte	0x6d
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x1c
+	.ascii	"rdn\000"
+	.byte	0xc
+	.byte	0x6e
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1e
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF176
+	.byte	0xc
+	.byte	0x6f
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1d
+	.byte	0
+	.uleb128 0x1c
+	.ascii	"dma\000"
+	.byte	0xc
+	.byte	0x70
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF177
+	.byte	0xc
+	.byte	0x71
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1b
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF178
+	.byte	0xc
+	.byte	0x72
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x2
+	.byte	0x19
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF179
+	.byte	0xc
+	.byte	0x73
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x18
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF189
+	.byte	0xc
+	.byte	0x76
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x2
+	.byte	0x16
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF182
+	.byte	0xc
+	.byte	0x77
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x15
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF183
+	.byte	0xc
+	.byte	0x78
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x14
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF184
+	.byte	0xc
+	.byte	0x79
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x7
+	.byte	0xd
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF190
+	.byte	0xc
+	.byte	0x7a
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0xc
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF186
+	.byte	0xc
+	.byte	0x7b
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0xb
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF187
+	.byte	0xc
+	.byte	0x7c
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0xa
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF188
+	.byte	0xc
+	.byte	0x7d
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x6
+	.byte	0x4
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF191
+	.byte	0xc
+	.byte	0x7e
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x3
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF192
+	.byte	0xc
+	.byte	0x7f
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x2
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF193
+	.byte	0xc
+	.byte	0x80
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x2
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x1e
+	.4byte	.LASF194
+	.byte	0x4
+	.byte	0xc
+	.byte	0x54
+	.4byte	0xfc8
+	.uleb128 0x1f
+	.ascii	"d32\000"
+	.byte	0xc
+	.byte	0x56
+	.4byte	0x74
+	.uleb128 0x1f
+	.ascii	"V4\000"
+	.byte	0xc
+	.byte	0x6a
+	.4byte	0xd7d
+	.uleb128 0x1f
+	.ascii	"V6\000"
+	.byte	0xc
+	.byte	0x81
+	.4byte	0xe85
+	.byte	0
+	.uleb128 0x3
+	.4byte	.LASF195
+	.byte	0xc
+	.byte	0x82
+	.4byte	0xf9c
+	.uleb128 0x20
+	.4byte	0xfc8
+	.uleb128 0x10
+	.byte	0x4
+	.byte	0xc
+	.byte	0x87
+	.4byte	0x1086
+	.uleb128 0x1c
+	.ascii	"rst\000"
+	.byte	0xc
+	.byte	0x89
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF196
+	.byte	0xc
+	.byte	0x8a
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1e
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF197
+	.byte	0xc
+	.byte	0x8b
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1d
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF198
+	.byte	0xc
+	.byte	0x8c
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF199
+	.byte	0xc
+	.byte	0x8d
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1b
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF200
+	.byte	0xc
+	.byte	0x8e
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x3
+	.byte	0x18
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF201
+	.byte	0xc
+	.byte	0x8f
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x8
+	.byte	0x10
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF202
+	.byte	0xc
+	.byte	0x90
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0xf
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF203
+	.byte	0xc
+	.byte	0x91
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0xe
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF204
+	.byte	0xc
+	.byte	0x92
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0xd
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF205
+	.byte	0xc
+	.byte	0x93
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0xd
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x10
+	.byte	0x4
+	.byte	0xc
+	.byte	0x95
+	.4byte	0x1143
+	.uleb128 0x1c
+	.ascii	"rst\000"
+	.byte	0xc
+	.byte	0x97
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF196
+	.byte	0xc
+	.byte	0x98
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1e
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF197
+	.byte	0xc
+	.byte	0x99
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1d
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF198
+	.byte	0xc
+	.byte	0x9a
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF199
+	.byte	0xc
+	.byte	0x9b
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1b
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF200
+	.byte	0xc
+	.byte	0x9c
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x3
+	.byte	0x18
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF201
+	.byte	0xc
+	.byte	0x9d
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x8
+	.byte	0x10
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF202
+	.byte	0xc
+	.byte	0x9e
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0xf
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF203
+	.byte	0xc
+	.byte	0x9f
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0xe
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF204
+	.byte	0xc
+	.byte	0xa0
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0xd
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF206
+	.byte	0xc
+	.byte	0xa1
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x8
+	.byte	0x5
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF172
+	.byte	0xc
+	.byte	0xa2
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x5
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x1e
+	.4byte	.LASF207
+	.byte	0x4
+	.byte	0xc
+	.byte	0x84
+	.4byte	0x116f
+	.uleb128 0x1f
+	.ascii	"d32\000"
+	.byte	0xc
+	.byte	0x86
+	.4byte	0x74
+	.uleb128 0x1f
+	.ascii	"V4\000"
+	.byte	0xc
+	.byte	0x94
+	.4byte	0xfd8
+	.uleb128 0x1f
+	.ascii	"V6\000"
+	.byte	0xc
+	.byte	0xa3
+	.4byte	0x1086
+	.byte	0
+	.uleb128 0x3
+	.4byte	.LASF208
+	.byte	0xc
+	.byte	0xa4
+	.4byte	0x1143
+	.uleb128 0x10
+	.byte	0x4
+	.byte	0xc
+	.byte	0xa9
+	.4byte	0x1273
+	.uleb128 0x1d
+	.4byte	.LASF209
+	.byte	0xc
+	.byte	0xab
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF210
+	.byte	0xc
+	.byte	0xac
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1e
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF211
+	.byte	0xc
+	.byte	0xad
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1d
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF212
+	.byte	0xc
+	.byte	0xae
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x5
+	.byte	0x18
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF213
+	.byte	0xc
+	.byte	0xaf
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x5
+	.byte	0x13
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF214
+	.byte	0xc
+	.byte	0xb0
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x12
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF215
+	.byte	0xc
+	.byte	0xb1
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x11
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF216
+	.byte	0xc
+	.byte	0xb2
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x10
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF217
+	.byte	0xc
+	.byte	0xb3
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x5
+	.byte	0xb
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF218
+	.byte	0xc
+	.byte	0xb4
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x5
+	.byte	0x6
+	.byte	0
+	.uleb128 0x1c
+	.ascii	"rdy\000"
+	.byte	0xc
+	.byte	0xb5
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x5
+	.byte	0
+	.uleb128 0x1c
+	.ascii	"cnt\000"
+	.byte	0xc
+	.byte	0xb6
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x4
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF219
+	.byte	0xc
+	.byte	0xb7
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x3
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF220
+	.byte	0xc
+	.byte	0xb8
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x2
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF221
+	.byte	0xc
+	.byte	0xb9
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF222
+	.byte	0xc
+	.byte	0xba
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x10
+	.byte	0x4
+	.byte	0xc
+	.byte	0xbc
+	.4byte	0x136c
+	.uleb128 0x1d
+	.4byte	.LASF209
+	.byte	0xc
+	.byte	0xbe
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF210
+	.byte	0xc
+	.byte	0xbf
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1e
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF211
+	.byte	0xc
+	.byte	0xc0
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1d
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF212
+	.byte	0xc
+	.byte	0xc1
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x5
+	.byte	0x18
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF213
+	.byte	0xc
+	.byte	0xc2
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x5
+	.byte	0x13
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF214
+	.byte	0xc
+	.byte	0xc3
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x12
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF215
+	.byte	0xc
+	.byte	0xc4
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x11
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF216
+	.byte	0xc
+	.byte	0xc5
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x10
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF217
+	.byte	0xc
+	.byte	0xc6
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x5
+	.byte	0xb
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF218
+	.byte	0xc
+	.byte	0xc7
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x5
+	.byte	0x6
+	.byte	0
+	.uleb128 0x1c
+	.ascii	"rdy\000"
+	.byte	0xc
+	.byte	0xc8
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x5
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF219
+	.byte	0xc
+	.byte	0xca
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x4
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF220
+	.byte	0xc
+	.byte	0xcb
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x3
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF221
+	.byte	0xc
+	.byte	0xcc
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x2
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF222
+	.byte	0xc
+	.byte	0xcd
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF223
+	.byte	0xc
+	.byte	0xce
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x1e
+	.4byte	.LASF224
+	.byte	0x4
+	.byte	0xc
+	.byte	0xa6
+	.4byte	0x1398
+	.uleb128 0x1f
+	.ascii	"d32\000"
+	.byte	0xc
+	.byte	0xa8
+	.4byte	0x74
+	.uleb128 0x1f
+	.ascii	"V4\000"
+	.byte	0xc
+	.byte	0xbb
+	.4byte	0x117a
+	.uleb128 0x1f
+	.ascii	"V6\000"
+	.byte	0xc
+	.byte	0xcf
+	.4byte	0x1273
+	.byte	0
+	.uleb128 0x20
+	.4byte	0x136c
+	.uleb128 0x3
+	.4byte	.LASF225
+	.byte	0xc
+	.byte	0xd0
+	.4byte	0x1398
+	.uleb128 0x10
+	.byte	0x4
+	.byte	0xc
+	.byte	0xd5
+	.4byte	0x1429
+	.uleb128 0x1d
+	.4byte	.LASF226
+	.byte	0xc
+	.byte	0xd7
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF227
+	.byte	0xc
+	.byte	0xd8
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1e
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF228
+	.byte	0xc
+	.byte	0xd9
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1d
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF229
+	.byte	0xc
+	.byte	0xda
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x3
+	.byte	0x1a
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF230
+	.byte	0xc
+	.byte	0xdb
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x3
+	.byte	0x17
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF231
+	.byte	0xc
+	.byte	0xdc
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x5
+	.byte	0x12
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF232
+	.byte	0xc
+	.byte	0xdd
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x11
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF233
+	.byte	0xc
+	.byte	0xde
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x11
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x10
+	.byte	0x4
+	.byte	0xc
+	.byte	0xe0
+	.4byte	0x14b9
+	.uleb128 0x1d
+	.4byte	.LASF226
+	.byte	0xc
+	.byte	0xe2
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF227
+	.byte	0xc
+	.byte	0xe3
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1e
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF228
+	.byte	0xc
+	.byte	0xe4
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1d
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF229
+	.byte	0xc
+	.byte	0xe5
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x3
+	.byte	0x1a
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF230
+	.byte	0xc
+	.byte	0xe6
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x3
+	.byte	0x17
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF231
+	.byte	0xc
+	.byte	0xe7
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x5
+	.byte	0x12
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF232
+	.byte	0xc
+	.byte	0xe8
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x11
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF234
+	.byte	0xc
+	.byte	0xe9
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x10
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF165
+	.byte	0xc
+	.byte	0xea
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x10
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x1e
+	.4byte	.LASF235
+	.byte	0x4
+	.byte	0xc
+	.byte	0xd2
+	.4byte	0x14e5
+	.uleb128 0x1f
+	.ascii	"d32\000"
+	.byte	0xc
+	.byte	0xd4
+	.4byte	0x74
+	.uleb128 0x1f
+	.ascii	"V4\000"
+	.byte	0xc
+	.byte	0xdf
+	.4byte	0x13a8
+	.uleb128 0x1f
+	.ascii	"V6\000"
+	.byte	0xc
+	.byte	0xeb
+	.4byte	0x1429
+	.byte	0
+	.uleb128 0x20
+	.4byte	0x14b9
+	.uleb128 0x3
+	.4byte	.LASF236
+	.byte	0xc
+	.byte	0xec
+	.4byte	0x14e5
+	.uleb128 0x10
+	.byte	0x4
+	.byte	0xc
+	.byte	0xf1
+	.4byte	0x152b
+	.uleb128 0x1d
+	.4byte	.LASF237
+	.byte	0xc
+	.byte	0xf3
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x10
+	.byte	0x10
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF238
+	.byte	0xc
+	.byte	0xf4
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x5
+	.byte	0xb
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF239
+	.byte	0xc
+	.byte	0xf5
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0xb
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x1e
+	.4byte	.LASF240
+	.byte	0x4
+	.byte	0xc
+	.byte	0xee
+	.4byte	0x154d
+	.uleb128 0x1f
+	.ascii	"d32\000"
+	.byte	0xc
+	.byte	0xf0
+	.4byte	0x74
+	.uleb128 0x1f
+	.ascii	"V6\000"
+	.byte	0xc
+	.byte	0xf6
+	.4byte	0x14f5
+	.byte	0
+	.uleb128 0x20
+	.4byte	0x152b
+	.uleb128 0x3
+	.4byte	.LASF241
+	.byte	0xc
+	.byte	0xf7
+	.4byte	0x154d
+	.uleb128 0x13
+	.4byte	.LASF242
+	.2byte	0x100
+	.byte	0xc
+	.byte	0xfa
+	.4byte	0x159b
+	.uleb128 0xa
+	.4byte	.LASF243
+	.byte	0xc
+	.byte	0xfc
+	.4byte	0x74
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF201
+	.byte	0xc
+	.byte	0xfd
+	.4byte	0x74
+	.byte	0x4
+	.uleb128 0xb
+	.ascii	"cmd\000"
+	.byte	0xc
+	.byte	0xfe
+	.4byte	0x74
+	.byte	0x8
+	.uleb128 0xa
+	.4byte	.LASF244
+	.byte	0xc
+	.byte	0xff
+	.4byte	0x15a0
+	.byte	0xc
+	.byte	0
+	.uleb128 0x20
+	.4byte	0x155d
+	.uleb128 0x6
+	.4byte	0x74
+	.4byte	0x15b0
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x3c
+	.byte	0
+	.uleb128 0x21
+	.4byte	.LASF245
+	.byte	0xc
+	.2byte	0x100
+	.4byte	0x159b
+	.uleb128 0x21
+	.4byte	.LASF246
+	.byte	0xc
+	.2byte	0x100
+	.4byte	0x15c8
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x159b
+	.uleb128 0x22
+	.2byte	0x1800
+	.byte	0xc
+	.2byte	0x105
+	.4byte	0x1781
+	.uleb128 0x23
+	.4byte	.LASF247
+	.byte	0xc
+	.2byte	0x107
+	.4byte	0x74
+	.byte	0
+	.uleb128 0x23
+	.4byte	.LASF248
+	.byte	0xc
+	.2byte	0x108
+	.4byte	0x74
+	.byte	0x4
+	.uleb128 0x23
+	.4byte	.LASF249
+	.byte	0xc
+	.2byte	0x109
+	.4byte	0x74
+	.byte	0x8
+	.uleb128 0x23
+	.4byte	.LASF250
+	.byte	0xc
+	.2byte	0x10a
+	.4byte	0x74
+	.byte	0xc
+	.uleb128 0x23
+	.4byte	.LASF236
+	.byte	0xc
+	.2byte	0x10b
+	.4byte	0x74
+	.byte	0x10
+	.uleb128 0x23
+	.4byte	.LASF251
+	.byte	0xc
+	.2byte	0x10c
+	.4byte	0x74
+	.byte	0x14
+	.uleb128 0x23
+	.4byte	.LASF252
+	.byte	0xc
+	.2byte	0x10d
+	.4byte	0x74
+	.byte	0x18
+	.uleb128 0x23
+	.4byte	.LASF241
+	.byte	0xc
+	.2byte	0x10e
+	.4byte	0x74
+	.byte	0x1c
+	.uleb128 0x23
+	.4byte	.LASF253
+	.byte	0xc
+	.2byte	0x110
+	.4byte	0x85a
+	.byte	0x20
+	.uleb128 0x23
+	.4byte	.LASF254
+	.byte	0xc
+	.2byte	0x111
+	.4byte	0x1786
+	.byte	0x40
+	.uleb128 0x24
+	.4byte	.LASF255
+	.byte	0xc
+	.2byte	0x112
+	.4byte	0x74
+	.2byte	0x130
+	.uleb128 0x24
+	.4byte	.LASF256
+	.byte	0xc
+	.2byte	0x113
+	.4byte	0x74
+	.2byte	0x134
+	.uleb128 0x24
+	.4byte	.LASF257
+	.byte	0xc
+	.2byte	0x114
+	.4byte	0x74
+	.2byte	0x138
+	.uleb128 0x24
+	.4byte	.LASF258
+	.byte	0xc
+	.2byte	0x115
+	.4byte	0x1796
+	.2byte	0x13c
+	.uleb128 0x24
+	.4byte	.LASF259
+	.byte	0xc
+	.2byte	0x117
+	.4byte	0x74
+	.2byte	0x150
+	.uleb128 0x24
+	.4byte	.LASF260
+	.byte	0xc
+	.2byte	0x118
+	.4byte	0x74
+	.2byte	0x154
+	.uleb128 0x24
+	.4byte	.LASF261
+	.byte	0xc
+	.2byte	0x119
+	.4byte	0x74
+	.2byte	0x158
+	.uleb128 0x24
+	.4byte	.LASF244
+	.byte	0xc
+	.2byte	0x11a
+	.4byte	0x74
+	.2byte	0x15c
+	.uleb128 0x24
+	.4byte	.LASF262
+	.byte	0xc
+	.2byte	0x11b
+	.4byte	0x74
+	.2byte	0x160
+	.uleb128 0x24
+	.4byte	.LASF263
+	.byte	0xc
+	.2byte	0x11d
+	.4byte	0x74
+	.2byte	0x164
+	.uleb128 0x24
+	.4byte	.LASF264
+	.byte	0xc
+	.2byte	0x11e
+	.4byte	0x74
+	.2byte	0x168
+	.uleb128 0x24
+	.4byte	.LASF265
+	.byte	0xc
+	.2byte	0x11f
+	.4byte	0x74
+	.2byte	0x16c
+	.uleb128 0x24
+	.4byte	.LASF266
+	.byte	0xc
+	.2byte	0x120
+	.4byte	0x74
+	.2byte	0x170
+	.uleb128 0x24
+	.4byte	.LASF267
+	.byte	0xc
+	.2byte	0x121
+	.4byte	0x74
+	.2byte	0x174
+	.uleb128 0x24
+	.4byte	.LASF268
+	.byte	0xc
+	.2byte	0x122
+	.4byte	0x17a6
+	.2byte	0x178
+	.uleb128 0x24
+	.4byte	.LASF269
+	.byte	0xc
+	.2byte	0x123
+	.4byte	0x73e
+	.2byte	0x180
+	.uleb128 0x24
+	.4byte	.LASF270
+	.byte	0xc
+	.2byte	0x124
+	.4byte	0x73e
+	.2byte	0x1c0
+	.uleb128 0x24
+	.4byte	.LASF271
+	.byte	0xc
+	.2byte	0x125
+	.4byte	0x17b6
+	.2byte	0x200
+	.uleb128 0x24
+	.4byte	.LASF272
+	.byte	0xc
+	.2byte	0x126
+	.4byte	0x17c6
+	.2byte	0x400
+	.uleb128 0x24
+	.4byte	.LASF273
+	.byte	0xc
+	.2byte	0x127
+	.4byte	0x17e6
+	.2byte	0x800
+	.uleb128 0x25
+	.ascii	"buf\000"
+	.byte	0xc
+	.2byte	0x128
+	.4byte	0xb70
+	.2byte	0x1000
+	.byte	0
+	.uleb128 0x20
+	.4byte	0x15ce
+	.uleb128 0x6
+	.4byte	0x74
+	.4byte	0x1796
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x3b
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x74
+	.4byte	0x17a6
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x4
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x74
+	.4byte	0x17b6
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x1
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x74
+	.4byte	0x17c6
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x7f
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x74
+	.4byte	0x17d6
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0xff
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x15b0
+	.4byte	0x17e6
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x7
+	.byte	0
+	.uleb128 0x20
+	.4byte	0x17d6
+	.uleb128 0x26
+	.4byte	.LASF274
+	.2byte	0x1800
+	.byte	0xc
+	.2byte	0x103
+	.4byte	0x1805
+	.uleb128 0x27
+	.ascii	"V6\000"
+	.byte	0xc
+	.2byte	0x129
+	.4byte	0x1781
+	.byte	0
+	.uleb128 0x20
+	.4byte	0x17eb
+	.uleb128 0x21
+	.4byte	.LASF275
+	.byte	0xc
+	.2byte	0x12a
+	.4byte	0x1816
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x1805
+	.uleb128 0x28
+	.4byte	.LASF276
+	.byte	0x20
+	.byte	0xc
+	.2byte	0x12c
+	.4byte	0x1892
+	.uleb128 0x23
+	.4byte	.LASF277
+	.byte	0xc
+	.2byte	0x12e
+	.4byte	0x13e
+	.byte	0
+	.uleb128 0x23
+	.4byte	.LASF278
+	.byte	0xc
+	.2byte	0x12f
+	.4byte	0x13e
+	.byte	0x4
+	.uleb128 0x23
+	.4byte	.LASF279
+	.byte	0xc
+	.2byte	0x130
+	.4byte	0x13e
+	.byte	0x8
+	.uleb128 0x23
+	.4byte	.LASF280
+	.byte	0xc
+	.2byte	0x131
+	.4byte	0x13e
+	.byte	0xc
+	.uleb128 0x23
+	.4byte	.LASF281
+	.byte	0xc
+	.2byte	0x132
+	.4byte	0x74
+	.byte	0x10
+	.uleb128 0x23
+	.4byte	.LASF282
+	.byte	0xc
+	.2byte	0x133
+	.4byte	0x74
+	.byte	0x14
+	.uleb128 0x23
+	.4byte	.LASF283
+	.byte	0xc
+	.2byte	0x134
+	.4byte	0x74
+	.byte	0x18
+	.uleb128 0x29
+	.ascii	"cnt\000"
+	.byte	0xc
+	.2byte	0x135
+	.4byte	0x74
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x21
+	.4byte	.LASF284
+	.byte	0xc
+	.2byte	0x136
+	.4byte	0x181c
+	.uleb128 0x28
+	.4byte	.LASF285
+	.byte	0x8
+	.byte	0xc
+	.2byte	0x138
+	.4byte	0x18c6
+	.uleb128 0x23
+	.4byte	.LASF286
+	.byte	0xc
+	.2byte	0x13a
+	.4byte	0x13e
+	.byte	0
+	.uleb128 0x23
+	.4byte	.LASF287
+	.byte	0xc
+	.2byte	0x13b
+	.4byte	0x74
+	.byte	0x4
+	.byte	0
+	.uleb128 0x21
+	.4byte	.LASF288
+	.byte	0xc
+	.2byte	0x13c
+	.4byte	0x189e
+	.uleb128 0x6
+	.4byte	0x18c6
+	.4byte	0x18e2
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x3
+	.byte	0
+	.uleb128 0x15
+	.4byte	.LASF289
+	.byte	0xc
+	.2byte	0x14a
+	.4byte	0x18d2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gNandChipMap
+	.uleb128 0x15
+	.4byte	.LASF290
+	.byte	0xc
+	.2byte	0x14c
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gNandcVer
+	.uleb128 0x15
+	.4byte	.LASF291
+	.byte	0xc
+	.2byte	0x14d
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_nandc_version_data
+	.uleb128 0x15
+	.4byte	.LASF292
+	.byte	0xc
+	.2byte	0x14e
+	.4byte	0x180a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gpNandc
+	.uleb128 0x15
+	.4byte	.LASF293
+	.byte	0xc
+	.2byte	0x14f
+	.4byte	0x180a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gpNandc1
+	.uleb128 0x15
+	.4byte	.LASF294
+	.byte	0xc
+	.2byte	0x150
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gNandcEccBits
+	.uleb128 0x15
+	.4byte	.LASF295
+	.byte	0xc
+	.2byte	0x151
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gBootDdrMode
+	.uleb128 0x15
+	.4byte	.LASF296
+	.byte	0xc
+	.2byte	0x152
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gToggleModeClkDiv
+	.uleb128 0x15
+	.4byte	.LASF297
+	.byte	0xc
+	.2byte	0x153
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gNandcDumpWriteEn
+	.uleb128 0x15
+	.4byte	.LASF298
+	.byte	0xc
+	.2byte	0x155
+	.4byte	0x1892
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gMasterInfo
+	.uleb128 0x15
+	.4byte	.LASF299
+	.byte	0xc
+	.2byte	0x156
+	.4byte	0x13e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gMasterTempBuf
+	.uleb128 0x3
+	.4byte	.LASF300
+	.byte	0xd
+	.byte	0xd
+	.4byte	0x33
+	.uleb128 0x2
+	.byte	0x4
+	.byte	0x7
+	.4byte	.LASF301
+	.uleb128 0x8
+	.4byte	.LASF302
+	.byte	0xe
+	.byte	0xc
+	.4byte	0x8f
+	.uleb128 0x3
+	.4byte	.LASF303
+	.byte	0xf
+	.byte	0xc
+	.4byte	0x33
+	.uleb128 0x3
+	.4byte	.LASF304
+	.byte	0xf
+	.byte	0xf
+	.4byte	0x25
+	.uleb128 0x3
+	.4byte	.LASF305
+	.byte	0xf
+	.byte	0x12
+	.4byte	0x2c
+	.uleb128 0x3
+	.4byte	.LASF306
+	.byte	0xf
+	.byte	0x16
+	.4byte	0x96
+	.uleb128 0x2a
+	.ascii	"u8\000"
+	.byte	0xf
+	.byte	0x1f
+	.4byte	0x33
+	.uleb128 0x4
+	.4byte	0x19f1
+	.uleb128 0x2a
+	.ascii	"u32\000"
+	.byte	0xf
+	.byte	0x25
+	.4byte	0x2c
+	.uleb128 0x3
+	.4byte	.LASF307
+	.byte	0xf
+	.byte	0x35
+	.4byte	0x19b3
+	.uleb128 0x3
+	.4byte	.LASF308
+	.byte	0xf
+	.byte	0x36
+	.4byte	0x19b3
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x1a2e
+	.uleb128 0x2
+	.byte	0x1
+	.byte	0x8
+	.4byte	.LASF309
+	.uleb128 0x4
+	.4byte	0x1a27
+	.uleb128 0x3
+	.4byte	.LASF310
+	.byte	0x10
+	.byte	0x16
+	.4byte	0x25
+	.uleb128 0x2
+	.byte	0x4
+	.byte	0x5
+	.4byte	.LASF311
+	.uleb128 0x3
+	.4byte	.LASF312
+	.byte	0x10
+	.byte	0x25
+	.4byte	0x2c
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x1a27
+	.uleb128 0x3
+	.4byte	.LASF313
+	.byte	0x10
+	.byte	0x38
+	.4byte	0x9d
+	.uleb128 0x3
+	.4byte	.LASF314
+	.byte	0x11
+	.byte	0xb
+	.4byte	0x1a33
+	.uleb128 0x3
+	.4byte	.LASF315
+	.byte	0x11
+	.byte	0x2c
+	.4byte	0x1a56
+	.uleb128 0x3
+	.4byte	.LASF316
+	.byte	0x11
+	.byte	0x35
+	.4byte	0x1a45
+	.uleb128 0x3
+	.4byte	.LASF317
+	.byte	0x11
+	.byte	0x52
+	.4byte	0x33
+	.uleb128 0x4
+	.4byte	0x1a82
+	.uleb128 0x3
+	.4byte	.LASF318
+	.byte	0x11
+	.byte	0x55
+	.4byte	0x19b3
+	.uleb128 0x3
+	.4byte	.LASF319
+	.byte	0x11
+	.byte	0x59
+	.4byte	0x25
+	.uleb128 0x3
+	.4byte	.LASF320
+	.byte	0x11
+	.byte	0x5b
+	.4byte	0x19b3
+	.uleb128 0x3
+	.4byte	.LASF321
+	.byte	0x11
+	.byte	0x69
+	.4byte	0x19c5
+	.uleb128 0x3
+	.4byte	.LASF322
+	.byte	0x11
+	.byte	0x6b
+	.4byte	0x19db
+	.uleb128 0x3
+	.4byte	.LASF323
+	.byte	0x11
+	.byte	0x6f
+	.4byte	0x19e6
+	.uleb128 0x3
+	.4byte	.LASF324
+	.byte	0x11
+	.byte	0x95
+	.4byte	0x19d0
+	.uleb128 0x3
+	.4byte	.LASF325
+	.byte	0x11
+	.byte	0x97
+	.4byte	0x19db
+	.uleb128 0x2b
+	.byte	0x4
+	.uleb128 0x8
+	.4byte	.LASF326
+	.byte	0x12
+	.byte	0xb
+	.4byte	0x1a50
+	.uleb128 0x2
+	.byte	0x1
+	.byte	0x2
+	.4byte	.LASF327
+	.uleb128 0x6
+	.4byte	0x1a27
+	.4byte	0x1b09
+	.uleb128 0x7
+	.byte	0
+	.uleb128 0x19
+	.4byte	.LASF328
+	.byte	0x13
+	.2byte	0x140
+	.4byte	0x1afe
+	.uleb128 0x19
+	.4byte	.LASF329
+	.byte	0x13
+	.2byte	0x143
+	.4byte	0x1afe
+	.uleb128 0x19
+	.4byte	.LASF330
+	.byte	0x13
+	.2byte	0x143
+	.4byte	0x1afe
+	.uleb128 0x6
+	.4byte	0x1a27
+	.4byte	0x1b3d
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x8
+	.byte	0
+	.uleb128 0x2c
+	.4byte	.LASF851
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x1b3d
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x1b4e
+	.uleb128 0x2d
+	.uleb128 0x6
+	.4byte	0x1aa8
+	.4byte	0x1b5a
+	.uleb128 0x7
+	.byte	0
+	.uleb128 0x8
+	.4byte	.LASF331
+	.byte	0x14
+	.byte	0x10
+	.4byte	0x1b4f
+	.uleb128 0x6
+	.4byte	0x33
+	.4byte	0x1b75
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x5
+	.byte	0
+	.uleb128 0x9
+	.4byte	.LASF332
+	.byte	0x8
+	.byte	0x15
+	.byte	0x16
+	.4byte	0x1b9a
+	.uleb128 0xa
+	.4byte	.LASF333
+	.byte	0x15
+	.byte	0x17
+	.4byte	0x1b9a
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF334
+	.byte	0x15
+	.byte	0x17
+	.4byte	0x1b9a
+	.byte	0x4
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x1b75
+	.uleb128 0x9
+	.4byte	.LASF335
+	.byte	0x8
+	.byte	0x16
+	.byte	0xf
+	.4byte	0x1bc5
+	.uleb128 0xa
+	.4byte	.LASF336
+	.byte	0x16
+	.byte	0x10
+	.4byte	0x1a50
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF337
+	.byte	0x16
+	.byte	0x11
+	.4byte	0x1bde
+	.byte	0x4
+	.byte	0
+	.uleb128 0x4
+	.4byte	0x1ba0
+	.uleb128 0x17
+	.4byte	0x8f
+	.4byte	0x1bde
+	.uleb128 0x18
+	.4byte	0x8f
+	.uleb128 0x18
+	.4byte	0x8f
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x1bca
+	.uleb128 0x6
+	.4byte	0x1bc5
+	.4byte	0x1bef
+	.uleb128 0x7
+	.byte	0
+	.uleb128 0x4
+	.4byte	0x1be4
+	.uleb128 0x8
+	.4byte	.LASF335
+	.byte	0x16
+	.byte	0xcd
+	.4byte	0x1bef
+	.uleb128 0xe
+	.2byte	0xa0c
+	.byte	0x17
+	.byte	0x13
+	.4byte	0x1c46
+	.uleb128 0xa
+	.4byte	.LASF338
+	.byte	0x17
+	.byte	0x14
+	.4byte	0x1aa8
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF339
+	.byte	0x17
+	.byte	0x15
+	.4byte	0x1a9d
+	.byte	0x4
+	.uleb128 0xa
+	.4byte	.LASF340
+	.byte	0x17
+	.byte	0x16
+	.4byte	0x1aa8
+	.byte	0x8
+	.uleb128 0xa
+	.4byte	.LASF176
+	.byte	0x17
+	.byte	0x17
+	.4byte	0x1c46
+	.byte	0xc
+	.uleb128 0xf
+	.4byte	.LASF341
+	.byte	0x17
+	.byte	0x18
+	.4byte	0x1c57
+	.2byte	0x80c
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1aa8
+	.4byte	0x1c57
+	.uleb128 0x14
+	.4byte	0x2aa
+	.2byte	0x1ff
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x19a8
+	.4byte	0x1c68
+	.uleb128 0x14
+	.4byte	0x2aa
+	.2byte	0x1ff
+	.byte	0
+	.uleb128 0x3
+	.4byte	.LASF342
+	.byte	0x17
+	.byte	0x32
+	.4byte	0x1bff
+	.uleb128 0x6
+	.4byte	0x1c68
+	.4byte	0x1c7e
+	.uleb128 0x7
+	.byte	0
+	.uleb128 0x8
+	.4byte	.LASF343
+	.byte	0x17
+	.byte	0x34
+	.4byte	0x1c73
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x4
+	.4byte	.LASF344
+	.uleb128 0x9
+	.4byte	.LASF345
+	.byte	0x8
+	.byte	0x18
+	.byte	0x10
+	.4byte	0x1cb5
+	.uleb128 0xa
+	.4byte	.LASF346
+	.byte	0x18
+	.byte	0x11
+	.4byte	0x1a0b
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF338
+	.byte	0x18
+	.byte	0x12
+	.4byte	0x1a16
+	.byte	0x4
+	.byte	0
+	.uleb128 0x9
+	.4byte	.LASF347
+	.byte	0x50
+	.byte	0x18
+	.byte	0x15
+	.4byte	0x1ce6
+	.uleb128 0xb
+	.ascii	"cnt\000"
+	.byte	0x18
+	.byte	0x16
+	.4byte	0x19b3
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF338
+	.byte	0x18
+	.byte	0x17
+	.4byte	0x1a16
+	.byte	0x4
+	.uleb128 0xa
+	.4byte	.LASF200
+	.byte	0x18
+	.byte	0x18
+	.4byte	0x1ce6
+	.byte	0x8
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1c90
+	.4byte	0x1cf6
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x8
+	.byte	0
+	.uleb128 0x2e
+	.ascii	"lmb\000"
+	.byte	0xa0
+	.byte	0x18
+	.byte	0x1b
+	.4byte	0x1d1b
+	.uleb128 0xa
+	.4byte	.LASF348
+	.byte	0x18
+	.byte	0x1c
+	.4byte	0x1cb5
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF196
+	.byte	0x18
+	.byte	0x1d
+	.4byte	0x1cb5
+	.byte	0x50
+	.byte	0
+	.uleb128 0x2f
+	.ascii	"lmb\000"
+	.byte	0x18
+	.byte	0x20
+	.4byte	0x1cf6
+	.uleb128 0x10
+	.byte	0x8
+	.byte	0x19
+	.byte	0x5a
+	.4byte	0x1d47
+	.uleb128 0xa
+	.4byte	.LASF176
+	.byte	0x19
+	.byte	0x5b
+	.4byte	0x1a0b
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF338
+	.byte	0x19
+	.byte	0x5c
+	.4byte	0x1a16
+	.byte	0x4
+	.byte	0
+	.uleb128 0x9
+	.4byte	.LASF349
+	.byte	0x58
+	.byte	0x19
+	.byte	0x1b
+	.4byte	0x1e38
+	.uleb128 0xa
+	.4byte	.LASF350
+	.byte	0x19
+	.byte	0x1c
+	.4byte	0x19b3
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF351
+	.byte	0x19
+	.byte	0x1d
+	.4byte	0x1a16
+	.byte	0x4
+	.uleb128 0xa
+	.4byte	.LASF352
+	.byte	0x19
+	.byte	0x1e
+	.4byte	0x19b3
+	.byte	0x8
+	.uleb128 0xa
+	.4byte	.LASF353
+	.byte	0x19
+	.byte	0x1f
+	.4byte	0x19b3
+	.byte	0xc
+	.uleb128 0xa
+	.4byte	.LASF354
+	.byte	0x19
+	.byte	0x20
+	.4byte	0x19b3
+	.byte	0x10
+	.uleb128 0xa
+	.4byte	.LASF355
+	.byte	0x19
+	.byte	0x21
+	.4byte	0x19b3
+	.byte	0x14
+	.uleb128 0xa
+	.4byte	.LASF356
+	.byte	0x19
+	.byte	0x22
+	.4byte	0x19b3
+	.byte	0x18
+	.uleb128 0xa
+	.4byte	.LASF357
+	.byte	0x19
+	.byte	0x24
+	.4byte	0x19b3
+	.byte	0x1c
+	.uleb128 0xa
+	.4byte	.LASF358
+	.byte	0x19
+	.byte	0x25
+	.4byte	0x19b3
+	.byte	0x20
+	.uleb128 0xa
+	.4byte	.LASF359
+	.byte	0x19
+	.byte	0x26
+	.4byte	0x19b3
+	.byte	0x24
+	.uleb128 0xa
+	.4byte	.LASF360
+	.byte	0x19
+	.byte	0x31
+	.4byte	0x19b3
+	.byte	0x28
+	.uleb128 0xa
+	.4byte	.LASF361
+	.byte	0x19
+	.byte	0x32
+	.4byte	0x19b3
+	.byte	0x2c
+	.uleb128 0xa
+	.4byte	.LASF362
+	.byte	0x19
+	.byte	0x33
+	.4byte	0x1b65
+	.byte	0x30
+	.uleb128 0xa
+	.4byte	.LASF363
+	.byte	0x19
+	.byte	0x34
+	.4byte	0x25
+	.byte	0x36
+	.uleb128 0xa
+	.4byte	.LASF364
+	.byte	0x19
+	.byte	0x35
+	.4byte	0x19b3
+	.byte	0x38
+	.uleb128 0xa
+	.4byte	.LASF365
+	.byte	0x19
+	.byte	0x36
+	.4byte	0x19b3
+	.byte	0x3c
+	.uleb128 0xa
+	.4byte	.LASF366
+	.byte	0x19
+	.byte	0x57
+	.4byte	0x1aa8
+	.byte	0x40
+	.uleb128 0xa
+	.4byte	.LASF367
+	.byte	0x19
+	.byte	0x58
+	.4byte	0x1aa8
+	.byte	0x44
+	.uleb128 0xa
+	.4byte	.LASF368
+	.byte	0x19
+	.byte	0x5d
+	.4byte	0x1e38
+	.byte	0x48
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1d26
+	.4byte	0x1e48
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x1
+	.byte	0
+	.uleb128 0x3
+	.4byte	.LASF369
+	.byte	0x19
+	.byte	0x5f
+	.4byte	0x1d47
+	.uleb128 0x8
+	.4byte	.LASF370
+	.byte	0x1a
+	.byte	0x13
+	.4byte	0x1aa8
+	.uleb128 0x8
+	.4byte	.LASF371
+	.byte	0x1a
+	.byte	0x14
+	.4byte	0x1aa8
+	.uleb128 0x8
+	.4byte	.LASF372
+	.byte	0x1a
+	.byte	0x15
+	.4byte	0x1aa8
+	.uleb128 0x8
+	.4byte	.LASF373
+	.byte	0x1a
+	.byte	0x16
+	.4byte	0x1aa8
+	.uleb128 0x8
+	.4byte	.LASF374
+	.byte	0x1a
+	.byte	0x17
+	.4byte	0x1aa8
+	.uleb128 0x8
+	.4byte	.LASF375
+	.byte	0x1a
+	.byte	0x18
+	.4byte	0x1aa8
+	.uleb128 0x8
+	.4byte	.LASF376
+	.byte	0x1a
+	.byte	0x19
+	.4byte	0x1aa8
+	.uleb128 0x9
+	.4byte	.LASF377
+	.byte	0x28
+	.byte	0x1b
+	.byte	0x39
+	.4byte	0x1f25
+	.uleb128 0xa
+	.4byte	.LASF378
+	.byte	0x1b
+	.byte	0x3a
+	.4byte	0x1f36
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF379
+	.byte	0x1b
+	.byte	0x3b
+	.4byte	0x1f36
+	.byte	0x4
+	.uleb128 0xa
+	.4byte	.LASF380
+	.byte	0x1b
+	.byte	0x3c
+	.4byte	0x1f36
+	.byte	0x8
+	.uleb128 0xa
+	.4byte	.LASF381
+	.byte	0x1b
+	.byte	0x3d
+	.4byte	0x1f36
+	.byte	0xc
+	.uleb128 0xa
+	.4byte	.LASF382
+	.byte	0x1b
+	.byte	0x3e
+	.4byte	0x1f36
+	.byte	0x10
+	.uleb128 0xa
+	.4byte	.LASF383
+	.byte	0x1b
+	.byte	0x3f
+	.4byte	0x1f36
+	.byte	0x14
+	.uleb128 0xa
+	.4byte	.LASF384
+	.byte	0x1b
+	.byte	0x40
+	.4byte	0x1f36
+	.byte	0x18
+	.uleb128 0xa
+	.4byte	.LASF385
+	.byte	0x1b
+	.byte	0x43
+	.4byte	0x1f36
+	.byte	0x1c
+	.uleb128 0xa
+	.4byte	.LASF386
+	.byte	0x1b
+	.byte	0x46
+	.4byte	0x1f36
+	.byte	0x20
+	.uleb128 0xa
+	.4byte	.LASF387
+	.byte	0x1b
+	.byte	0x49
+	.4byte	0x1f36
+	.byte	0x24
+	.byte	0
+	.uleb128 0x8
+	.4byte	.LASF388
+	.byte	0x1c
+	.byte	0xf
+	.4byte	0x1f30
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x1ea0
+	.uleb128 0x3
+	.4byte	.LASF389
+	.byte	0x1c
+	.byte	0x12
+	.4byte	0x1adf
+	.uleb128 0x28
+	.4byte	.LASF390
+	.byte	0x40
+	.byte	0x1d
+	.2byte	0x133
+	.4byte	0x1feb
+	.uleb128 0x23
+	.4byte	.LASF391
+	.byte	0x1d
+	.2byte	0x134
+	.4byte	0x1adf
+	.byte	0
+	.uleb128 0x23
+	.4byte	.LASF392
+	.byte	0x1d
+	.2byte	0x135
+	.4byte	0x1adf
+	.byte	0x4
+	.uleb128 0x23
+	.4byte	.LASF393
+	.byte	0x1d
+	.2byte	0x136
+	.4byte	0x1adf
+	.byte	0x8
+	.uleb128 0x23
+	.4byte	.LASF394
+	.byte	0x1d
+	.2byte	0x137
+	.4byte	0x1adf
+	.byte	0xc
+	.uleb128 0x23
+	.4byte	.LASF395
+	.byte	0x1d
+	.2byte	0x138
+	.4byte	0x1adf
+	.byte	0x10
+	.uleb128 0x23
+	.4byte	.LASF396
+	.byte	0x1d
+	.2byte	0x139
+	.4byte	0x1adf
+	.byte	0x14
+	.uleb128 0x23
+	.4byte	.LASF397
+	.byte	0x1d
+	.2byte	0x13a
+	.4byte	0x1adf
+	.byte	0x18
+	.uleb128 0x23
+	.4byte	.LASF398
+	.byte	0x1d
+	.2byte	0x13b
+	.4byte	0x1ab3
+	.byte	0x1c
+	.uleb128 0x23
+	.4byte	.LASF399
+	.byte	0x1d
+	.2byte	0x13c
+	.4byte	0x1ab3
+	.byte	0x1d
+	.uleb128 0x23
+	.4byte	.LASF400
+	.byte	0x1d
+	.2byte	0x13d
+	.4byte	0x1ab3
+	.byte	0x1e
+	.uleb128 0x23
+	.4byte	.LASF401
+	.byte	0x1d
+	.2byte	0x13e
+	.4byte	0x1ab3
+	.byte	0x1f
+	.uleb128 0x23
+	.4byte	.LASF402
+	.byte	0x1d
+	.2byte	0x13f
+	.4byte	0x1feb
+	.byte	0x20
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1ab3
+	.4byte	0x1ffb
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x21
+	.4byte	.LASF403
+	.byte	0x1d
+	.2byte	0x140
+	.4byte	0x1f41
+	.uleb128 0x28
+	.4byte	.LASF404
+	.byte	0x18
+	.byte	0x1d
+	.2byte	0x142
+	.4byte	0x2089
+	.uleb128 0x23
+	.4byte	.LASF176
+	.byte	0x1d
+	.2byte	0x143
+	.4byte	0x1aa8
+	.byte	0
+	.uleb128 0x29
+	.ascii	"end\000"
+	.byte	0x1d
+	.2byte	0x143
+	.4byte	0x1aa8
+	.byte	0x4
+	.uleb128 0x23
+	.4byte	.LASF405
+	.byte	0x1d
+	.2byte	0x144
+	.4byte	0x1aa8
+	.byte	0x8
+	.uleb128 0x23
+	.4byte	.LASF406
+	.byte	0x1d
+	.2byte	0x144
+	.4byte	0x1aa8
+	.byte	0xc
+	.uleb128 0x23
+	.4byte	.LASF407
+	.byte	0x1d
+	.2byte	0x145
+	.4byte	0x1aa8
+	.byte	0x10
+	.uleb128 0x23
+	.4byte	.LASF408
+	.byte	0x1d
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+	.4byte	0x1ab3
+	.byte	0x14
+	.uleb128 0x23
+	.4byte	.LASF409
+	.byte	0x1d
+	.2byte	0x146
+	.4byte	0x1ab3
+	.byte	0x15
+	.uleb128 0x29
+	.ascii	"os\000"
+	.byte	0x1d
+	.2byte	0x146
+	.4byte	0x1ab3
+	.byte	0x16
+	.uleb128 0x23
+	.4byte	.LASF410
+	.byte	0x1d
+	.2byte	0x147
+	.4byte	0x1ab3
+	.byte	0x17
+	.byte	0
+	.uleb128 0x21
+	.4byte	.LASF411
+	.byte	0x1d
+	.2byte	0x148
+	.4byte	0x2007
+	.uleb128 0x30
+	.4byte	.LASF412
+	.2byte	0x164
+	.byte	0x1d
+	.2byte	0x14e
+	.4byte	0x2228
+	.uleb128 0x23
+	.4byte	.LASF413
+	.byte	0x1d
+	.2byte	0x154
+	.4byte	0x2228
+	.byte	0
+	.uleb128 0x23
+	.4byte	.LASF414
+	.byte	0x1d
+	.2byte	0x155
+	.4byte	0x1ffb
+	.byte	0x4
+	.uleb128 0x23
+	.4byte	.LASF415
+	.byte	0x1d
+	.2byte	0x156
+	.4byte	0x1aa8
+	.byte	0x44
+	.uleb128 0x23
+	.4byte	.LASF416
+	.byte	0x1d
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+	.4byte	0x1a21
+	.byte	0x48
+	.uleb128 0x23
+	.4byte	.LASF417
+	.byte	0x1d
+	.2byte	0x15b
+	.4byte	0x1aea
+	.byte	0x4c
+	.uleb128 0x23
+	.4byte	.LASF418
+	.byte	0x1d
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+	.4byte	0x1a21
+	.byte	0x50
+	.uleb128 0x23
+	.4byte	.LASF419
+	.byte	0x1d
+	.2byte	0x15d
+	.4byte	0x8f
+	.byte	0x54
+	.uleb128 0x23
+	.4byte	.LASF420
+	.byte	0x1d
+	.2byte	0x15f
+	.4byte	0x1aea
+	.byte	0x58
+	.uleb128 0x23
+	.4byte	.LASF421
+	.byte	0x1d
+	.2byte	0x160
+	.4byte	0x1a21
+	.byte	0x5c
+	.uleb128 0x23
+	.4byte	.LASF422
+	.byte	0x1d
+	.2byte	0x161
+	.4byte	0x8f
+	.byte	0x60
+	.uleb128 0x23
+	.4byte	.LASF423
+	.byte	0x1d
+	.2byte	0x163
+	.4byte	0x1aea
+	.byte	0x64
+	.uleb128 0x23
+	.4byte	.LASF424
+	.byte	0x1d
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+	.4byte	0x1a21
+	.byte	0x68
+	.uleb128 0x23
+	.4byte	.LASF425
+	.byte	0x1d
+	.2byte	0x165
+	.4byte	0x8f
+	.byte	0x6c
+	.uleb128 0x23
+	.4byte	.LASF426
+	.byte	0x1d
+	.2byte	0x167
+	.4byte	0x1aea
+	.byte	0x70
+	.uleb128 0x23
+	.4byte	.LASF427
+	.byte	0x1d
+	.2byte	0x168
+	.4byte	0x1a21
+	.byte	0x74
+	.uleb128 0x23
+	.4byte	.LASF428
+	.byte	0x1d
+	.2byte	0x169
+	.4byte	0x8f
+	.byte	0x78
+	.uleb128 0x29
+	.ascii	"os\000"
+	.byte	0x1d
+	.2byte	0x16d
+	.4byte	0x2089
+	.byte	0x7c
+	.uleb128 0x29
+	.ascii	"ep\000"
+	.byte	0x1d
+	.2byte	0x16e
+	.4byte	0x1aa8
+	.byte	0x94
+	.uleb128 0x23
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+	.4byte	0x1aa8
+	.byte	0x98
+	.uleb128 0x23
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+	.4byte	0x1aa8
+	.byte	0x9c
+	.uleb128 0x23
+	.4byte	.LASF431
+	.byte	0x1d
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+	.4byte	0x1a50
+	.byte	0xa0
+	.uleb128 0x23
+	.4byte	.LASF432
+	.byte	0x1d
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+	.byte	0xa4
+	.uleb128 0x23
+	.4byte	.LASF433
+	.byte	0x1d
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+	.4byte	0x1aa8
+	.byte	0xa8
+	.uleb128 0x23
+	.4byte	.LASF434
+	.byte	0x1d
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+	.byte	0xac
+	.uleb128 0x23
+	.4byte	.LASF435
+	.byte	0x1d
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+	.4byte	0x1aa8
+	.byte	0xb0
+	.uleb128 0x23
+	.4byte	.LASF436
+	.byte	0x1d
+	.2byte	0x178
+	.4byte	0x1aa8
+	.byte	0xb4
+	.uleb128 0x29
+	.ascii	"kbd\000"
+	.byte	0x1d
+	.2byte	0x179
+	.4byte	0x222e
+	.byte	0xb8
+	.uleb128 0x23
+	.4byte	.LASF437
+	.byte	0x1d
+	.2byte	0x17c
+	.4byte	0x8f
+	.byte	0xbc
+	.uleb128 0x23
+	.4byte	.LASF438
+	.byte	0x1d
+	.2byte	0x189
+	.4byte	0x8f
+	.byte	0xc0
+	.uleb128 0x29
+	.ascii	"lmb\000"
+	.byte	0x1d
+	.2byte	0x18c
+	.4byte	0x1cf6
+	.byte	0xc4
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x1ffb
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x1e48
+	.uleb128 0x21
+	.4byte	.LASF439
+	.byte	0x1d
+	.2byte	0x18e
+	.4byte	0x2095
+	.uleb128 0x19
+	.4byte	.LASF440
+	.byte	0x1d
+	.2byte	0x190
+	.4byte	0x2234
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x1ab3
+	.uleb128 0x1a
+	.4byte	.LASF442
+	.byte	0x4
+	.4byte	0x8f
+	.byte	0x1e
+	.byte	0xe
+	.4byte	0x244f
+	.uleb128 0x1b
+	.4byte	.LASF443
+	.byte	0
+	.uleb128 0x1b
+	.4byte	.LASF444
+	.byte	0x1
+	.uleb128 0x1b
+	.4byte	.LASF445
+	.byte	0x2
+	.uleb128 0x1b
+	.4byte	.LASF446
+	.byte	0x3
+	.uleb128 0x1b
+	.4byte	.LASF447
+	.byte	0x4
+	.uleb128 0x1b
+	.4byte	.LASF448
+	.byte	0x5
+	.uleb128 0x1b
+	.4byte	.LASF449
+	.byte	0x6
+	.uleb128 0x1b
+	.4byte	.LASF450
+	.byte	0x7
+	.uleb128 0x1b
+	.4byte	.LASF451
+	.byte	0x8
+	.uleb128 0x1b
+	.4byte	.LASF452
+	.byte	0x9
+	.uleb128 0x1b
+	.4byte	.LASF453
+	.byte	0xa
+	.uleb128 0x1b
+	.4byte	.LASF454
+	.byte	0xb
+	.uleb128 0x1b
+	.4byte	.LASF455
+	.byte	0xc
+	.uleb128 0x1b
+	.4byte	.LASF456
+	.byte	0xd
+	.uleb128 0x1b
+	.4byte	.LASF457
+	.byte	0xe
+	.uleb128 0x1b
+	.4byte	.LASF458
+	.byte	0xf
+	.uleb128 0x1b
+	.4byte	.LASF459
+	.byte	0x10
+	.uleb128 0x1b
+	.4byte	.LASF460
+	.byte	0x11
+	.uleb128 0x1b
+	.4byte	.LASF461
+	.byte	0x12
+	.uleb128 0x1b
+	.4byte	.LASF462
+	.byte	0x13
+	.uleb128 0x1b
+	.4byte	.LASF463
+	.byte	0x14
+	.uleb128 0x1b
+	.4byte	.LASF464
+	.byte	0x15
+	.uleb128 0x1b
+	.4byte	.LASF465
+	.byte	0x16
+	.uleb128 0x1b
+	.4byte	.LASF466
+	.byte	0x17
+	.uleb128 0x1b
+	.4byte	.LASF467
+	.byte	0x18
+	.uleb128 0x1b
+	.4byte	.LASF468
+	.byte	0x19
+	.uleb128 0x1b
+	.4byte	.LASF469
+	.byte	0x1a
+	.uleb128 0x1b
+	.4byte	.LASF470
+	.byte	0x1b
+	.uleb128 0x1b
+	.4byte	.LASF471
+	.byte	0x1c
+	.uleb128 0x1b
+	.4byte	.LASF472
+	.byte	0x1d
+	.uleb128 0x1b
+	.4byte	.LASF473
+	.byte	0x1e
+	.uleb128 0x1b
+	.4byte	.LASF474
+	.byte	0x1f
+	.uleb128 0x1b
+	.4byte	.LASF475
+	.byte	0x20
+	.uleb128 0x1b
+	.4byte	.LASF476
+	.byte	0x21
+	.uleb128 0x1b
+	.4byte	.LASF477
+	.byte	0x22
+	.uleb128 0x1b
+	.4byte	.LASF478
+	.byte	0x23
+	.uleb128 0x1b
+	.4byte	.LASF479
+	.byte	0x24
+	.uleb128 0x1b
+	.4byte	.LASF480
+	.byte	0x25
+	.uleb128 0x1b
+	.4byte	.LASF481
+	.byte	0x26
+	.uleb128 0x1b
+	.4byte	.LASF482
+	.byte	0x27
+	.uleb128 0x1b
+	.4byte	.LASF483
+	.byte	0x28
+	.uleb128 0x1b
+	.4byte	.LASF484
+	.byte	0x29
+	.uleb128 0x1b
+	.4byte	.LASF485
+	.byte	0x2a
+	.uleb128 0x1b
+	.4byte	.LASF486
+	.byte	0x2b
+	.uleb128 0x1b
+	.4byte	.LASF487
+	.byte	0x2c
+	.uleb128 0x1b
+	.4byte	.LASF488
+	.byte	0x2d
+	.uleb128 0x1b
+	.4byte	.LASF489
+	.byte	0x2e
+	.uleb128 0x1b
+	.4byte	.LASF490
+	.byte	0x2f
+	.uleb128 0x1b
+	.4byte	.LASF491
+	.byte	0x30
+	.uleb128 0x1b
+	.4byte	.LASF492
+	.byte	0x31
+	.uleb128 0x1b
+	.4byte	.LASF493
+	.byte	0x32
+	.uleb128 0x1b
+	.4byte	.LASF494
+	.byte	0x33
+	.uleb128 0x1b
+	.4byte	.LASF495
+	.byte	0x34
+	.uleb128 0x1b
+	.4byte	.LASF496
+	.byte	0x35
+	.uleb128 0x1b
+	.4byte	.LASF497
+	.byte	0x36
+	.uleb128 0x1b
+	.4byte	.LASF498
+	.byte	0x37
+	.uleb128 0x1b
+	.4byte	.LASF499
+	.byte	0x38
+	.uleb128 0x1b
+	.4byte	.LASF500
+	.byte	0x39
+	.uleb128 0x1b
+	.4byte	.LASF501
+	.byte	0x3a
+	.uleb128 0x1b
+	.4byte	.LASF502
+	.byte	0x3b
+	.uleb128 0x1b
+	.4byte	.LASF503
+	.byte	0x3c
+	.uleb128 0x1b
+	.4byte	.LASF504
+	.byte	0x3d
+	.uleb128 0x1b
+	.4byte	.LASF505
+	.byte	0x3e
+	.uleb128 0x1b
+	.4byte	.LASF506
+	.byte	0x3f
+	.uleb128 0x1b
+	.4byte	.LASF507
+	.byte	0x40
+	.uleb128 0x1b
+	.4byte	.LASF508
+	.byte	0x41
+	.uleb128 0x1b
+	.4byte	.LASF509
+	.byte	0x42
+	.uleb128 0x1b
+	.4byte	.LASF510
+	.byte	0x43
+	.uleb128 0x1b
+	.4byte	.LASF511
+	.byte	0x44
+	.uleb128 0x1b
+	.4byte	.LASF512
+	.byte	0x45
+	.uleb128 0x1b
+	.4byte	.LASF513
+	.byte	0x46
+	.uleb128 0x1b
+	.4byte	.LASF514
+	.byte	0x47
+	.uleb128 0x1b
+	.4byte	.LASF515
+	.byte	0x48
+	.uleb128 0x1b
+	.4byte	.LASF516
+	.byte	0x49
+	.uleb128 0x1b
+	.4byte	.LASF517
+	.byte	0x4a
+	.uleb128 0x1b
+	.4byte	.LASF518
+	.byte	0x4b
+	.uleb128 0x1b
+	.4byte	.LASF519
+	.byte	0x4c
+	.uleb128 0x1b
+	.4byte	.LASF520
+	.byte	0x4d
+	.uleb128 0x1b
+	.4byte	.LASF521
+	.byte	0x4e
+	.uleb128 0x1b
+	.4byte	.LASF522
+	.byte	0x4f
+	.uleb128 0x1b
+	.4byte	.LASF523
+	.byte	0x50
+	.uleb128 0x31
+	.4byte	.LASF524
+	.sleb128 -1
+	.byte	0
+	.uleb128 0x32
+	.byte	0x4
+	.4byte	0x2c
+	.byte	0x2c
+	.byte	0xe0
+	.4byte	0x2462
+	.uleb128 0x1b
+	.4byte	.LASF525
+	.byte	0x5
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1a27
+	.4byte	0x2472
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x8
+	.4byte	.LASF526
+	.byte	0xd
+	.byte	0xa6
+	.4byte	0x1aa8
+	.uleb128 0x6
+	.4byte	0x19f1
+	.4byte	0x2488
+	.uleb128 0x7
+	.byte	0
+	.uleb128 0x8
+	.4byte	.LASF527
+	.byte	0xd
+	.byte	0xa8
+	.4byte	0x247d
+	.uleb128 0x8
+	.4byte	.LASF528
+	.byte	0xd
+	.byte	0xa9
+	.4byte	0x247d
+	.uleb128 0x8
+	.4byte	.LASF529
+	.byte	0xd
+	.byte	0xf7
+	.4byte	0x1aa8
+	.uleb128 0x8
+	.4byte	.LASF530
+	.byte	0xd
+	.byte	0xf8
+	.4byte	0x1aa8
+	.uleb128 0x8
+	.4byte	.LASF531
+	.byte	0xd
+	.byte	0xf9
+	.4byte	0x1aa8
+	.uleb128 0x9
+	.4byte	.LASF532
+	.byte	0x4
+	.byte	0x1f
+	.byte	0x2e
+	.4byte	0x24d8
+	.uleb128 0xa
+	.4byte	.LASF533
+	.byte	0x1f
+	.byte	0x2f
+	.4byte	0x1adf
+	.byte	0
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x19a8
+	.uleb128 0x9
+	.4byte	.LASF534
+	.byte	0x40
+	.byte	0x1f
+	.byte	0xa6
+	.4byte	0x257b
+	.uleb128 0xa
+	.4byte	.LASF336
+	.byte	0x1f
+	.byte	0xa8
+	.4byte	0x257b
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF535
+	.byte	0x1f
+	.byte	0xa9
+	.4byte	0x1b65
+	.byte	0x10
+	.uleb128 0xa
+	.4byte	.LASF536
+	.byte	0x1f
+	.byte	0xaa
+	.4byte	0x1a0b
+	.byte	0x18
+	.uleb128 0xa
+	.4byte	.LASF438
+	.byte	0x1f
+	.byte	0xab
+	.4byte	0x8f
+	.byte	0x1c
+	.uleb128 0xa
+	.4byte	.LASF537
+	.byte	0x1f
+	.byte	0xad
+	.4byte	0x25a5
+	.byte	0x20
+	.uleb128 0xa
+	.4byte	.LASF538
+	.byte	0x1f
+	.byte	0xae
+	.4byte	0x25c4
+	.byte	0x24
+	.uleb128 0xa
+	.4byte	.LASF539
+	.byte	0x1f
+	.byte	0xaf
+	.4byte	0x25d9
+	.byte	0x28
+	.uleb128 0xa
+	.4byte	.LASF540
+	.byte	0x1f
+	.byte	0xb0
+	.4byte	0x25ea
+	.byte	0x2c
+	.uleb128 0xa
+	.4byte	.LASF541
+	.byte	0x1f
+	.byte	0xb4
+	.4byte	0x25d9
+	.byte	0x30
+	.uleb128 0xa
+	.4byte	.LASF333
+	.byte	0x1f
+	.byte	0xb5
+	.4byte	0x259f
+	.byte	0x34
+	.uleb128 0xa
+	.4byte	.LASF542
+	.byte	0x1f
+	.byte	0xb6
+	.4byte	0x8f
+	.byte	0x38
+	.uleb128 0xa
+	.4byte	.LASF543
+	.byte	0x1f
+	.byte	0xb7
+	.4byte	0x1aea
+	.byte	0x3c
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1a27
+	.4byte	0x258b
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0xf
+	.byte	0
+	.uleb128 0x17
+	.4byte	0x8f
+	.4byte	0x259f
+	.uleb128 0x18
+	.4byte	0x259f
+	.uleb128 0x18
+	.4byte	0x222e
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x24de
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x258b
+	.uleb128 0x17
+	.4byte	0x8f
+	.4byte	0x25c4
+	.uleb128 0x18
+	.4byte	0x259f
+	.uleb128 0x18
+	.4byte	0x1aea
+	.uleb128 0x18
+	.4byte	0x8f
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x25ab
+	.uleb128 0x17
+	.4byte	0x8f
+	.4byte	0x25d9
+	.uleb128 0x18
+	.4byte	0x259f
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x25ca
+	.uleb128 0x33
+	.4byte	0x25ea
+	.uleb128 0x18
+	.4byte	0x259f
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x25df
+	.uleb128 0x8
+	.4byte	.LASF544
+	.byte	0x1f
+	.byte	0xbd
+	.4byte	0x259f
+	.uleb128 0x33
+	.4byte	0x260b
+	.uleb128 0x18
+	.4byte	0x1aea
+	.uleb128 0x18
+	.4byte	0x8f
+	.byte	0
+	.uleb128 0x19
+	.4byte	.LASF545
+	.byte	0x1f
+	.2byte	0x11e
+	.4byte	0x2617
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x25fb
+	.uleb128 0x6
+	.4byte	0x19f1
+	.4byte	0x262d
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x5
+	.byte	0
+	.uleb128 0x19
+	.4byte	.LASF546
+	.byte	0x1f
+	.2byte	0x1fd
+	.4byte	0x24bf
+	.uleb128 0x19
+	.4byte	.LASF547
+	.byte	0x1f
+	.2byte	0x1fe
+	.4byte	0x24bf
+	.uleb128 0x19
+	.4byte	.LASF548
+	.byte	0x1f
+	.2byte	0x200
+	.4byte	0x24bf
+	.uleb128 0x19
+	.4byte	.LASF549
+	.byte	0x1f
+	.2byte	0x205
+	.4byte	0x2462
+	.uleb128 0x19
+	.4byte	.LASF550
+	.byte	0x1f
+	.2byte	0x206
+	.4byte	0x2462
+	.uleb128 0x6
+	.4byte	0x1a27
+	.4byte	0x2679
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x3f
+	.byte	0
+	.uleb128 0x19
+	.4byte	.LASF551
+	.byte	0x1f
+	.2byte	0x207
+	.4byte	0x2669
+	.uleb128 0x19
+	.4byte	.LASF552
+	.byte	0x1f
+	.2byte	0x209
+	.4byte	0x261d
+	.uleb128 0x19
+	.4byte	.LASF553
+	.byte	0x1f
+	.2byte	0x20a
+	.4byte	0x261d
+	.uleb128 0x19
+	.4byte	.LASF554
+	.byte	0x1f
+	.2byte	0x20b
+	.4byte	0x24bf
+	.uleb128 0x19
+	.4byte	.LASF555
+	.byte	0x1f
+	.2byte	0x20c
+	.4byte	0x24bf
+	.uleb128 0x19
+	.4byte	.LASF556
+	.byte	0x1f
+	.2byte	0x20d
+	.4byte	0x24d8
+	.uleb128 0x6
+	.4byte	0x24d8
+	.4byte	0x26d1
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x3
+	.byte	0
+	.uleb128 0x19
+	.4byte	.LASF557
+	.byte	0x1f
+	.2byte	0x20e
+	.4byte	0x26c1
+	.uleb128 0x19
+	.4byte	.LASF558
+	.byte	0x1f
+	.2byte	0x20f
+	.4byte	0x24d8
+	.uleb128 0x19
+	.4byte	.LASF559
+	.byte	0x1f
+	.2byte	0x210
+	.4byte	0x8f
+	.uleb128 0x6
+	.4byte	0x19fb
+	.4byte	0x2705
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x5
+	.byte	0
+	.uleb128 0x4
+	.4byte	0x26f5
+	.uleb128 0x19
+	.4byte	.LASF560
+	.byte	0x1f
+	.2byte	0x211
+	.4byte	0x2705
+	.uleb128 0x19
+	.4byte	.LASF561
+	.byte	0x1f
+	.2byte	0x212
+	.4byte	0x2705
+	.uleb128 0x19
+	.4byte	.LASF562
+	.byte	0x1f
+	.2byte	0x216
+	.4byte	0x1a9d
+	.uleb128 0x19
+	.4byte	.LASF563
+	.byte	0x1f
+	.2byte	0x217
+	.4byte	0x1a9d
+	.uleb128 0x19
+	.4byte	.LASF564
+	.byte	0x1f
+	.2byte	0x219
+	.4byte	0x8f
+	.uleb128 0x6
+	.4byte	0x1a27
+	.4byte	0x2757
+	.uleb128 0x14
+	.4byte	0x2aa
+	.2byte	0x3ff
+	.byte	0
+	.uleb128 0x19
+	.4byte	.LASF565
+	.byte	0x1f
+	.2byte	0x220
+	.4byte	0x2746
+	.uleb128 0x19
+	.4byte	.LASF566
+	.byte	0x1f
+	.2byte	0x222
+	.4byte	0x1a00
+	.uleb128 0x19
+	.4byte	.LASF567
+	.byte	0x1f
+	.2byte	0x224
+	.4byte	0x1a00
+	.uleb128 0x19
+	.4byte	.LASF568
+	.byte	0x1f
+	.2byte	0x230
+	.4byte	0x24bf
+	.uleb128 0x34
+	.4byte	.LASF569
+	.byte	0x4
+	.4byte	0x2c
+	.byte	0x1f
+	.2byte	0x286
+	.4byte	0x27b1
+	.uleb128 0x1b
+	.4byte	.LASF570
+	.byte	0
+	.uleb128 0x1b
+	.4byte	.LASF571
+	.byte	0x1
+	.uleb128 0x1b
+	.4byte	.LASF572
+	.byte	0x2
+	.uleb128 0x1b
+	.4byte	.LASF573
+	.byte	0x3
+	.byte	0
+	.uleb128 0x19
+	.4byte	.LASF574
+	.byte	0x1f
+	.2byte	0x28c
+	.4byte	0x2787
+	.uleb128 0x9
+	.4byte	.LASF575
+	.byte	0x3c
+	.byte	0x20
+	.byte	0x2b
+	.4byte	0x281d
+	.uleb128 0xb
+	.ascii	"id\000"
+	.byte	0x20
+	.byte	0x2d
+	.4byte	0x57
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF576
+	.byte	0x20
+	.byte	0x2e
+	.4byte	0x57
+	.byte	0x2
+	.uleb128 0xa
+	.4byte	.LASF577
+	.byte	0x20
+	.byte	0x2f
+	.4byte	0x57
+	.byte	0x4
+	.uleb128 0xb
+	.ascii	"cnt\000"
+	.byte	0x20
+	.byte	0x30
+	.4byte	0x57
+	.byte	0x6
+	.uleb128 0xa
+	.4byte	.LASF383
+	.byte	0x20
+	.byte	0x31
+	.4byte	0x74
+	.byte	0x8
+	.uleb128 0xa
+	.4byte	.LASF578
+	.byte	0x20
+	.byte	0x32
+	.4byte	0x281d
+	.byte	0xc
+	.uleb128 0xa
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+	.byte	0x20
+	.byte	0x33
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+	.byte	0x1c
+	.byte	0
+	.uleb128 0x6
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+	.uleb128 0xd
+	.4byte	0x2aa
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+	.uleb128 0x6
+	.4byte	0x13e
+	.4byte	0x283d
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x7
+	.byte	0
+	.uleb128 0x9
+	.4byte	.LASF580
+	.byte	0xc
+	.byte	0x20
+	.byte	0x3f
+	.4byte	0x2885
+	.uleb128 0xb
+	.ascii	"id\000"
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+	.byte	0x41
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+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF576
+	.byte	0x20
+	.byte	0x42
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+	.byte	0x2
+	.uleb128 0xa
+	.4byte	.LASF577
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+	.byte	0x43
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+	.byte	0x4
+	.uleb128 0xa
+	.4byte	.LASF581
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+	.byte	0x6
+	.uleb128 0xa
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+	.byte	0
+	.uleb128 0x9
+	.4byte	.LASF582
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+	.byte	0x48
+	.4byte	0x293a
+	.uleb128 0xa
+	.4byte	.LASF542
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+	.uleb128 0xa
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+	.uleb128 0xa
+	.4byte	.LASF583
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+	.byte	0x4d
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+	.uleb128 0xa
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+	.byte	0x20
+	.byte	0x4e
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+	.byte	0x6
+	.uleb128 0xa
+	.4byte	.LASF585
+	.byte	0x20
+	.byte	0x50
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+	.byte	0x8
+	.uleb128 0xa
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+	.uleb128 0xa
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+	.uleb128 0xa
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+	.uleb128 0xa
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+	.byte	0x55
+	.4byte	0x293a
+	.byte	0x14
+	.uleb128 0xa
+	.4byte	.LASF590
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+	.byte	0x56
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+	.byte	0x18
+	.uleb128 0xa
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+	.byte	0x58
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+	.byte	0x1c
+	.uleb128 0xa
+	.4byte	.LASF591
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+	.byte	0x59
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+	.byte	0x20
+	.uleb128 0xa
+	.4byte	.LASF592
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+	.byte	0x5a
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+	.byte	0x24
+	.uleb128 0xa
+	.4byte	.LASF593
+	.byte	0x20
+	.byte	0x5b
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+	.byte	0x28
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+	.uleb128 0x9
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+	.byte	0x5e
+	.4byte	0x297d
+	.uleb128 0xa
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+	.byte	0
+	.uleb128 0xa
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+	.byte	0x61
+	.4byte	0x57
+	.byte	0x2
+	.uleb128 0xb
+	.ascii	"hit\000"
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+	.byte	0x62
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+	.uleb128 0xa
+	.4byte	.LASF596
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+	.byte	0x63
+	.4byte	0x13e
+	.byte	0x8
+	.byte	0
+	.uleb128 0x9
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+	.byte	0x20
+	.byte	0x66
+	.4byte	0x29ea
+	.uleb128 0xa
+	.4byte	.LASF583
+	.byte	0x20
+	.byte	0x68
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+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF94
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+	.byte	0x69
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+	.uleb128 0xa
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+	.byte	0x6a
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+	.byte	0x8
+	.uleb128 0xb
+	.ascii	"len\000"
+	.byte	0x20
+	.byte	0x6b
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+	.uleb128 0xa
+	.4byte	.LASF598
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+	.byte	0x6c
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+	.byte	0x10
+	.uleb128 0xa
+	.4byte	.LASF599
+	.byte	0x20
+	.byte	0x6d
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+	.byte	0x14
+	.uleb128 0xa
+	.4byte	.LASF600
+	.byte	0x20
+	.byte	0x6e
+	.4byte	0x17a6
+	.byte	0x18
+	.uleb128 0xb
+	.ascii	"tbl\000"
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+	.byte	0x6f
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+	.byte	0
+	.uleb128 0x6
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+	.4byte	0x29fa
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x1
+	.byte	0
+	.uleb128 0x9
+	.4byte	.LASF601
+	.byte	0x10
+	.byte	0x20
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+	.uleb128 0xa
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+	.uleb128 0xb
+	.ascii	"id\000"
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+	.uleb128 0xa
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+	.uleb128 0xa
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+	.uleb128 0xa
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+	.uleb128 0xa
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+	.byte	0x7b
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+	.byte	0
+	.uleb128 0x9
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+	.uleb128 0xa
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+	.uleb128 0xb
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+	.uleb128 0xa
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+	.byte	0x82
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+	.uleb128 0xb
+	.ascii	"lpa\000"
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+	.uleb128 0xa
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+	.uleb128 0x9
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+	.uleb128 0xb
+	.ascii	"id\000"
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+	.uleb128 0xa
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+	.uleb128 0x9
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+	.uleb128 0xa
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+	.uleb128 0x9
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+	.uleb128 0xb
+	.ascii	"ver\000"
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+	.uleb128 0xa
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+	.uleb128 0xa
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+	.uleb128 0xa
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+	.uleb128 0xa
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+	.uleb128 0xa
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+	.uleb128 0xa
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+	.uleb128 0xa
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+	.uleb128 0xa
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+	.uleb128 0xa
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+	.uleb128 0xa
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+	.uleb128 0xa
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+	.byte	0xba
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+	.uleb128 0xa
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+	.uleb128 0xb
+	.ascii	"ver\000"
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+	.uleb128 0xa
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+	.uleb128 0xa
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+	.uleb128 0xa
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+	.uleb128 0xa
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+	.uleb128 0xa
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+	.uleb128 0xa
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+	.uleb128 0xa
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+	.uleb128 0xa
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+	.uleb128 0xa
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+	.uleb128 0xa
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+	.uleb128 0xa
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+	.uleb128 0xa
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+	.uleb128 0xa
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+	.byte	0xdb
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+	.uleb128 0xa
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+	.uleb128 0xa
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+	.uleb128 0xa
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+	.uleb128 0xa
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+	.byte	0xe1
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+	.uleb128 0xd
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+	.uleb128 0x9
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+	.uleb128 0xa
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+	.uleb128 0xa
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+	.byte	0xe9
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+	.uleb128 0x13
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+	.uleb128 0xb
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+	.uleb128 0xa
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+	.byte	0xef
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+	.uleb128 0xa
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+	.byte	0xf0
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+	.uleb128 0xa
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+	.byte	0xf1
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+	.uleb128 0xb
+	.ascii	"arr\000"
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+	.2byte	0x3ff
+	.byte	0
+	.uleb128 0x9
+	.4byte	.LASF655
+	.byte	0x30
+	.byte	0x20
+	.byte	0xf6
+	.4byte	0x2ea4
+	.uleb128 0xb
+	.ascii	"id\000"
+	.byte	0x20
+	.byte	0xf8
+	.4byte	0x57
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF656
+	.byte	0x20
+	.byte	0xf9
+	.4byte	0x57
+	.byte	0x2
+	.uleb128 0xa
+	.4byte	.LASF657
+	.byte	0x20
+	.byte	0xfa
+	.4byte	0x57
+	.byte	0x4
+	.uleb128 0xa
+	.4byte	.LASF658
+	.byte	0x20
+	.byte	0xfb
+	.4byte	0x3a
+	.byte	0x6
+	.uleb128 0xa
+	.4byte	.LASF659
+	.byte	0x20
+	.byte	0xfc
+	.4byte	0x3a
+	.byte	0x7
+	.uleb128 0xa
+	.4byte	.LASF660
+	.byte	0x20
+	.byte	0xfd
+	.4byte	0x3a
+	.byte	0x8
+	.uleb128 0xa
+	.4byte	.LASF661
+	.byte	0x20
+	.byte	0xfe
+	.4byte	0x3a
+	.byte	0x9
+	.uleb128 0xa
+	.4byte	.LASF662
+	.byte	0x20
+	.byte	0xff
+	.4byte	0x3a
+	.byte	0xa
+	.uleb128 0x23
+	.4byte	.LASF663
+	.byte	0x20
+	.2byte	0x100
+	.4byte	0x3a
+	.byte	0xb
+	.uleb128 0x23
+	.4byte	.LASF383
+	.byte	0x20
+	.2byte	0x101
+	.4byte	0x74
+	.byte	0xc
+	.uleb128 0x23
+	.4byte	.LASF664
+	.byte	0x20
+	.2byte	0x102
+	.4byte	0x2ea4
+	.byte	0x10
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x57
+	.4byte	0x2eb4
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0xf
+	.byte	0
+	.uleb128 0x28
+	.4byte	.LASF665
+	.byte	0xc
+	.byte	0x20
+	.2byte	0x106
+	.4byte	0x2ee9
+	.uleb128 0x23
+	.4byte	.LASF666
+	.byte	0x20
+	.2byte	0x108
+	.4byte	0x74
+	.byte	0
+	.uleb128 0x23
+	.4byte	.LASF667
+	.byte	0x20
+	.2byte	0x109
+	.4byte	0x74
+	.byte	0x4
+	.uleb128 0x29
+	.ascii	"lpa\000"
+	.byte	0x20
+	.2byte	0x10a
+	.4byte	0x74
+	.byte	0x8
+	.byte	0
+	.uleb128 0x28
+	.4byte	.LASF668
+	.byte	0xc
+	.byte	0x20
+	.2byte	0x10d
+	.4byte	0x2f1e
+	.uleb128 0x23
+	.4byte	.LASF17
+	.byte	0x20
+	.2byte	0x10f
+	.4byte	0x13e
+	.byte	0
+	.uleb128 0x23
+	.4byte	.LASF18
+	.byte	0x20
+	.2byte	0x110
+	.4byte	0x13e
+	.byte	0x4
+	.uleb128 0x23
+	.4byte	.LASF669
+	.byte	0x20
+	.2byte	0x111
+	.4byte	0x74
+	.byte	0x8
+	.byte	0
+	.uleb128 0x35
+	.4byte	.LASF670
+	.byte	0x21
+	.byte	0x12
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_type
+	.uleb128 0x35
+	.4byte	.LASF671
+	.byte	0x21
+	.byte	0x13
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_die_num
+	.uleb128 0x35
+	.4byte	.LASF672
+	.byte	0x21
+	.byte	0x14
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_planes_per_die
+	.uleb128 0x35
+	.4byte	.LASF673
+	.byte	0x21
+	.byte	0x15
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_blks_per_die
+	.uleb128 0x35
+	.4byte	.LASF674
+	.byte	0x21
+	.byte	0x16
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_blks_per_die_shift
+	.uleb128 0x35
+	.4byte	.LASF675
+	.byte	0x21
+	.byte	0x17
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_planes_num
+	.uleb128 0x35
+	.4byte	.LASF676
+	.byte	0x21
+	.byte	0x18
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_blk_pre_plane
+	.uleb128 0x35
+	.4byte	.LASF677
+	.byte	0x21
+	.byte	0x19
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_ext_blk_pre_plane
+	.uleb128 0x35
+	.4byte	.LASF678
+	.byte	0x21
+	.byte	0x1a
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_bbm_buf_size
+	.uleb128 0x35
+	.4byte	.LASF679
+	.byte	0x21
+	.byte	0x1c
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_page_pre_blk
+	.uleb128 0x35
+	.4byte	.LASF680
+	.byte	0x21
+	.byte	0x1d
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_page_pre_slc_blk
+	.uleb128 0x35
+	.4byte	.LASF681
+	.byte	0x21
+	.byte	0x1e
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_page_pre_super_blk
+	.uleb128 0x35
+	.4byte	.LASF682
+	.byte	0x21
+	.byte	0x1f
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_sec_pre_page
+	.uleb128 0x35
+	.4byte	.LASF683
+	.byte	0x21
+	.byte	0x20
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_sec_pre_page_shift
+	.uleb128 0x35
+	.4byte	.LASF684
+	.byte	0x21
+	.byte	0x26
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_byte_pre_page
+	.uleb128 0x35
+	.4byte	.LASF685
+	.byte	0x21
+	.byte	0x27
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_byte_pre_oob
+	.uleb128 0x35
+	.4byte	.LASF686
+	.byte	0x21
+	.byte	0x28
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_reserved_blks
+	.uleb128 0x35
+	.4byte	.LASF687
+	.byte	0x21
+	.byte	0x29
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_totle_phy_blks
+	.uleb128 0x35
+	.4byte	.LASF688
+	.byte	0x21
+	.byte	0x2b
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_map_region_num
+	.uleb128 0x35
+	.4byte	.LASF689
+	.byte	0x21
+	.byte	0x2c
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_l2pmap_ram_region_num
+	.uleb128 0x35
+	.4byte	.LASF690
+	.byte	0x21
+	.byte	0x2e
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_vendor_region_num
+	.uleb128 0x35
+	.4byte	.LASF691
+	.byte	0x21
+	.byte	0x30
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_map_blks_per_plane
+	.uleb128 0x35
+	.4byte	.LASF692
+	.byte	0x21
+	.byte	0x31
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_max_map_blks
+	.uleb128 0x35
+	.4byte	.LASF693
+	.byte	0x21
+	.byte	0x32
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_max_vendor_blks
+	.uleb128 0x35
+	.4byte	.LASF694
+	.byte	0x21
+	.byte	0x33
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_vendor_part_size
+	.uleb128 0x35
+	.4byte	.LASF695
+	.byte	0x21
+	.byte	0x34
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_sys_blks_per_plane
+	.uleb128 0x35
+	.4byte	.LASF696
+	.byte	0x21
+	.byte	0x35
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_init_sys_blks_per_plane
+	.uleb128 0x35
+	.4byte	.LASF697
+	.byte	0x21
+	.byte	0x36
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_max_sys_blks
+	.uleb128 0x35
+	.4byte	.LASF698
+	.byte	0x21
+	.byte	0x37
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_data_blks_per_plane
+	.uleb128 0x35
+	.4byte	.LASF699
+	.byte	0x21
+	.byte	0x38
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_data_op_blks_per_plane
+	.uleb128 0x35
+	.4byte	.LASF700
+	.byte	0x21
+	.byte	0x39
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_max_data_blks
+	.uleb128 0x35
+	.4byte	.LASF701
+	.byte	0x21
+	.byte	0x3a
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	ftl_gc_temp_power_lost_recovery_flag
+	.uleb128 0x35
+	.4byte	.LASF702
+	.byte	0x21
+	.byte	0x3c
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_GlobalSysVersion
+	.uleb128 0x35
+	.4byte	.LASF703
+	.byte	0x21
+	.byte	0x3d
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_GlobalDataVersion
+	.uleb128 0x35
+	.4byte	.LASF704
+	.byte	0x21
+	.byte	0x3e
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_MaxLbaSector
+	.uleb128 0x35
+	.4byte	.LASF705
+	.byte	0x21
+	.byte	0x3f
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_MaxLpn
+	.uleb128 0x35
+	.4byte	.LASF706
+	.byte	0x21
+	.byte	0x40
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_VaildLpn
+	.uleb128 0x35
+	.4byte	.LASF707
+	.byte	0x21
+	.byte	0x41
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_MaxLbn
+	.uleb128 0x35
+	.4byte	.LASF708
+	.byte	0x21
+	.byte	0x42
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_SlcPartLbaEndSector
+	.uleb128 0x35
+	.4byte	.LASF709
+	.byte	0x21
+	.byte	0x43
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_inkDie_check_enable
+	.uleb128 0x35
+	.4byte	.LASF710
+	.byte	0x21
+	.byte	0x44
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_flash_read_only_en
+	.uleb128 0x35
+	.4byte	.LASF711
+	.byte	0x21
+	.byte	0x46
+	.4byte	0x27bd
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gBbtInfo
+	.uleb128 0x35
+	.4byte	.LASF712
+	.byte	0x21
+	.byte	0x47
+	.4byte	0x283d
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gSysInfo
+	.uleb128 0x35
+	.4byte	.LASF713
+	.byte	0x21
+	.byte	0x48
+	.4byte	0x2db6
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gSysFreeQueue
+	.uleb128 0x35
+	.4byte	.LASF714
+	.byte	0x21
+	.byte	0x49
+	.4byte	0x2885
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gL2pMapInfo
+	.uleb128 0x35
+	.4byte	.LASF715
+	.byte	0x21
+	.byte	0x4a
+	.4byte	0x2885
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gVendorBlkInfo
+	.uleb128 0x35
+	.4byte	.LASF716
+	.byte	0x21
+	.byte	0x4b
+	.4byte	0xc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	req_sys
+	.uleb128 0x35
+	.4byte	.LASF717
+	.byte	0x21
+	.byte	0x4c
+	.4byte	0x676
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	req_read
+	.uleb128 0x35
+	.4byte	.LASF718
+	.byte	0x21
+	.byte	0x4d
+	.4byte	0x676
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	req_prgm
+	.uleb128 0x35
+	.4byte	.LASF719
+	.byte	0x21
+	.byte	0x4e
+	.4byte	0x676
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	req_erase
+	.uleb128 0x35
+	.4byte	.LASF720
+	.byte	0x21
+	.byte	0x4f
+	.4byte	0x676
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	req_gc
+	.uleb128 0x35
+	.4byte	.LASF721
+	.byte	0x21
+	.byte	0x50
+	.4byte	0x676
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	req_gc_dst
+	.uleb128 0x35
+	.4byte	.LASF722
+	.byte	0x21
+	.byte	0x52
+	.4byte	0x676
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_req_cache
+	.uleb128 0x6
+	.4byte	0x3a
+	.4byte	0x32b3
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x35
+	.4byte	.LASF723
+	.byte	0x21
+	.byte	0x54
+	.4byte	0x32a3
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_plane_order_table
+	.uleb128 0x35
+	.4byte	.LASF724
+	.byte	0x21
+	.byte	0x5e
+	.4byte	0x13e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_sys_data_buf
+	.uleb128 0x35
+	.4byte	.LASF725
+	.byte	0x21
+	.byte	0x5f
+	.4byte	0x13e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_sys_data_buf_1
+	.uleb128 0x35
+	.4byte	.LASF726
+	.byte	0x21
+	.byte	0x60
+	.4byte	0x13e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_vendor_data_buf
+	.uleb128 0x35
+	.4byte	.LASF727
+	.byte	0x21
+	.byte	0x61
+	.4byte	0x13e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_sys_spare_buf
+	.uleb128 0x35
+	.4byte	.LASF728
+	.byte	0x21
+	.byte	0x62
+	.4byte	0x13e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_io_data_buf_0
+	.uleb128 0x35
+	.4byte	.LASF729
+	.byte	0x21
+	.byte	0x63
+	.4byte	0x13e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_io_data_buf_1
+	.uleb128 0x35
+	.4byte	.LASF730
+	.byte	0x21
+	.byte	0x64
+	.4byte	0x13e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_io_spare_buf
+	.uleb128 0x35
+	.4byte	.LASF731
+	.byte	0x21
+	.byte	0x65
+	.4byte	0x13e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_gc_spare_buf
+	.uleb128 0x35
+	.4byte	.LASF732
+	.byte	0x21
+	.byte	0x66
+	.4byte	0x13e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_gc_data_buf
+	.uleb128 0x35
+	.4byte	.LASF733
+	.byte	0x21
+	.byte	0x67
+	.4byte	0x336e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gp_gc_page_buf_info
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x2ee9
+	.uleb128 0x35
+	.4byte	.LASF734
+	.byte	0x21
+	.byte	0x68
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_gc_page_buf_num
+	.uleb128 0x35
+	.4byte	.LASF735
+	.byte	0x21
+	.byte	0x69
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_num_req
+	.uleb128 0x35
+	.4byte	.LASF736
+	.byte	0x21
+	.byte	0x6b
+	.4byte	0x33a7
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gp_ect_tbl_info
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x297d
+	.uleb128 0x35
+	.4byte	.LASF737
+	.byte	0x21
+	.byte	0x6c
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_ect_tbl_info_size
+	.uleb128 0x35
+	.4byte	.LASF738
+	.byte	0x21
+	.byte	0x70
+	.4byte	0x293a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_erase_count_table
+	.uleb128 0x35
+	.4byte	.LASF739
+	.byte	0x21
+	.byte	0x72
+	.4byte	0x293a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_swl_mul_table
+	.uleb128 0x35
+	.4byte	.LASF740
+	.byte	0x21
+	.byte	0x73
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_swl_count
+	.uleb128 0x35
+	.4byte	.LASF741
+	.byte	0x21
+	.byte	0x74
+	.4byte	0x293a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_valid_page_count_table
+	.uleb128 0x35
+	.4byte	.LASF742
+	.byte	0x21
+	.byte	0x75
+	.4byte	0x293a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_valid_page_count_check_table
+	.uleb128 0x35
+	.4byte	.LASF743
+	.byte	0x21
+	.byte	0x76
+	.4byte	0x13e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_blk_mode_table
+	.uleb128 0x35
+	.4byte	.LASF744
+	.byte	0x21
+	.byte	0x78
+	.4byte	0x293a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_map_block_table
+	.uleb128 0x35
+	.4byte	.LASF745
+	.byte	0x21
+	.byte	0x79
+	.4byte	0x293a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_map_block_valid_page_count
+	.uleb128 0x35
+	.4byte	.LASF746
+	.byte	0x21
+	.byte	0x7a
+	.4byte	0x13e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_map_block_ver_table
+	.uleb128 0x35
+	.4byte	.LASF747
+	.byte	0x21
+	.byte	0x7b
+	.4byte	0x13e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_map_region_ppn_table
+	.uleb128 0x35
+	.4byte	.LASF748
+	.byte	0x21
+	.byte	0x7c
+	.4byte	0x13e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_map_region_ppn_check_table
+	.uleb128 0x35
+	.4byte	.LASF749
+	.byte	0x21
+	.byte	0x7d
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_map_block
+	.uleb128 0x35
+	.4byte	.LASF750
+	.byte	0x21
+	.byte	0x7f
+	.4byte	0x293a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_vendor_block_table
+	.uleb128 0x35
+	.4byte	.LASF751
+	.byte	0x21
+	.byte	0x80
+	.4byte	0x293a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_vendor_block_valid_page_count
+	.uleb128 0x35
+	.4byte	.LASF752
+	.byte	0x21
+	.byte	0x81
+	.4byte	0x13e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_vendor_block_ver_table
+	.uleb128 0x35
+	.4byte	.LASF753
+	.byte	0x21
+	.byte	0x82
+	.4byte	0x13e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_vendor_region_ppn_table
+	.uleb128 0x35
+	.4byte	.LASF754
+	.byte	0x21
+	.byte	0x83
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_vendor_block
+	.uleb128 0x35
+	.4byte	.LASF755
+	.byte	0x21
+	.byte	0x85
+	.4byte	0x34f0
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_l2p_ram_map
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x2940
+	.uleb128 0x35
+	.4byte	.LASF756
+	.byte	0x21
+	.byte	0x86
+	.4byte	0x13e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_l2p_map_buf
+	.uleb128 0x35
+	.4byte	.LASF757
+	.byte	0x21
+	.byte	0x87
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_l2p_last_update_region_id
+	.uleb128 0x35
+	.4byte	.LASF758
+	.byte	0x21
+	.byte	0x8e
+	.4byte	0x3529
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_data_block_list_table
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x2d85
+	.uleb128 0x35
+	.4byte	.LASF759
+	.byte	0x21
+	.byte	0x8f
+	.4byte	0x3529
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_free_data_block_list_head
+	.uleb128 0x35
+	.4byte	.LASF760
+	.byte	0x21
+	.byte	0x91
+	.4byte	0x3529
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_data_block_list_head
+	.uleb128 0x35
+	.4byte	.LASF761
+	.byte	0x21
+	.byte	0x92
+	.4byte	0x3529
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_data_block_list_tail
+	.uleb128 0x35
+	.4byte	.LASF762
+	.byte	0x21
+	.byte	0x93
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_num_free_superblocks
+	.uleb128 0x35
+	.4byte	.LASF763
+	.byte	0x21
+	.byte	0x94
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_num_data_superblocks
+	.uleb128 0x35
+	.4byte	.LASF764
+	.byte	0x21
+	.byte	0x95
+	.4byte	0x2e11
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_active_superblock
+	.uleb128 0x35
+	.4byte	.LASF765
+	.byte	0x21
+	.byte	0x96
+	.4byte	0x2e11
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_buffer_superblock
+	.uleb128 0x35
+	.4byte	.LASF766
+	.byte	0x21
+	.byte	0x97
+	.4byte	0x2e11
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_temp_superblock
+	.uleb128 0x35
+	.4byte	.LASF767
+	.byte	0x21
+	.byte	0x98
+	.4byte	0x2e11
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_superblock
+	.uleb128 0x35
+	.4byte	.LASF768
+	.byte	0x21
+	.byte	0x99
+	.4byte	0x35d9
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gp_last_act_superblock
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x2e11
+	.uleb128 0x35
+	.4byte	.LASF769
+	.byte	0x21
+	.byte	0x9a
+	.4byte	0x2b32
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_sys_save_data
+	.uleb128 0x35
+	.4byte	.LASF770
+	.byte	0x21
+	.byte	0x9b
+	.4byte	0x2c2f
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_sys_ext_data
+	.uleb128 0x35
+	.4byte	.LASF771
+	.byte	0x21
+	.byte	0x9d
+	.4byte	0x3612
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_gc_page_info
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x2eb4
+	.uleb128 0x35
+	.4byte	.LASF772
+	.byte	0x21
+	.byte	0x9e
+	.4byte	0x293a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_gc_blk_tbl
+	.uleb128 0x35
+	.4byte	.LASF773
+	.byte	0x21
+	.byte	0x9f
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_blk_num
+	.uleb128 0x35
+	.4byte	.LASF774
+	.byte	0x21
+	.byte	0xa0
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_page_offset
+	.uleb128 0x35
+	.4byte	.LASF775
+	.byte	0x21
+	.byte	0xa1
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_cur_blk_valid_pages
+	.uleb128 0x35
+	.4byte	.LASF776
+	.byte	0x21
+	.byte	0xa2
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_cur_blk_max_valid_pages
+	.uleb128 0x35
+	.4byte	.LASF777
+	.byte	0x21
+	.byte	0xa3
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_next_blk
+	.uleb128 0x35
+	.4byte	.LASF778
+	.byte	0x21
+	.byte	0xa4
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_next_blk_1
+	.uleb128 0x35
+	.4byte	.LASF779
+	.byte	0x21
+	.byte	0xa5
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_bad_block_temp_num
+	.uleb128 0x35
+	.4byte	.LASF780
+	.byte	0x21
+	.byte	0xa6
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_bad_block_gc_index
+	.uleb128 0x6
+	.4byte	0x57
+	.4byte	0x36c1
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x10
+	.byte	0
+	.uleb128 0x35
+	.4byte	.LASF781
+	.byte	0x21
+	.byte	0xa7
+	.4byte	0x36b1
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_bad_block_temp_tbl
+	.uleb128 0x35
+	.4byte	.LASF782
+	.byte	0x21
+	.byte	0xa8
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_refresh_block_temp_num
+	.uleb128 0x35
+	.4byte	.LASF783
+	.byte	0x21
+	.byte	0xa9
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_free_slc_blk_num
+	.uleb128 0x35
+	.4byte	.LASF784
+	.byte	0x21
+	.byte	0xaa
+	.4byte	0x36b1
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_refresh_block_temp_tbl
+	.uleb128 0x35
+	.4byte	.LASF785
+	.byte	0x21
+	.byte	0xac
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_free_blk_threshold
+	.uleb128 0x35
+	.4byte	.LASF786
+	.byte	0x21
+	.byte	0xad
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_merge_free_blk_threshold
+	.uleb128 0x35
+	.4byte	.LASF787
+	.byte	0x21
+	.byte	0xae
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_blk_index
+	.uleb128 0x35
+	.4byte	.LASF788
+	.byte	0x21
+	.byte	0xb0
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_gc_page_count
+	.uleb128 0x35
+	.4byte	.LASF789
+	.byte	0x21
+	.byte	0xb1
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_write_page_count
+	.uleb128 0x35
+	.4byte	.LASF790
+	.byte	0x21
+	.byte	0xb2
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_write_sector
+	.uleb128 0x35
+	.4byte	.LASF791
+	.byte	0x21
+	.byte	0xb3
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_read_sector
+	.uleb128 0x35
+	.4byte	.LASF792
+	.byte	0x21
+	.byte	0xb5
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_discard_page_count
+	.uleb128 0x35
+	.4byte	.LASF793
+	.byte	0x21
+	.byte	0xb6
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_read_page_count
+	.uleb128 0x35
+	.4byte	.LASF794
+	.byte	0x21
+	.byte	0xb7
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_tmp_data_superblock_id
+	.uleb128 0x35
+	.4byte	.LASF795
+	.byte	0x21
+	.byte	0xb8
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_cache_write_count
+	.uleb128 0x35
+	.4byte	.LASF796
+	.byte	0x21
+	.byte	0xb9
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_l2p_write_count
+	.uleb128 0x35
+	.4byte	.LASF797
+	.byte	0x21
+	.byte	0xbb
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_mlc_erase_count
+	.uleb128 0x35
+	.4byte	.LASF798
+	.byte	0x21
+	.byte	0xbc
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_avg_erase_count
+	.uleb128 0x35
+	.4byte	.LASF799
+	.byte	0x21
+	.byte	0xbd
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_min_erase_count
+	.uleb128 0x35
+	.4byte	.LASF800
+	.byte	0x21
+	.byte	0xbe
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_slc_erase_count
+	.uleb128 0x35
+	.4byte	.LASF801
+	.byte	0x21
+	.byte	0xbf
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_sys_slc_erase_count
+	.uleb128 0x35
+	.4byte	.LASF802
+	.byte	0x21
+	.byte	0xc0
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_max_erase_count
+	.uleb128 0x35
+	.4byte	.LASF803
+	.byte	0x21
+	.byte	0xc1
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_all_blk_used_slc_mode
+	.uleb128 0x35
+	.4byte	.LASF804
+	.byte	0x21
+	.byte	0xc3
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_in_gc_progress
+	.uleb128 0x35
+	.4byte	.LASF805
+	.byte	0x21
+	.byte	0xc4
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_in_swl_replace
+	.uleb128 0x35
+	.4byte	.LASF806
+	.byte	0x21
+	.byte	0xc5
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_ftl_nand_free_count
+	.uleb128 0x35
+	.4byte	.LASF807
+	.byte	0x21
+	.byte	0xc6
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_head_data_block
+	.uleb128 0x35
+	.4byte	.LASF808
+	.byte	0x21
+	.byte	0xc7
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_head_data_block_count
+	.uleb128 0x35
+	.4byte	.LASF809
+	.byte	0x21
+	.byte	0xc8
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_skip_write_count
+	.uleb128 0x35
+	.4byte	.LASF810
+	.byte	0x21
+	.byte	0xc9
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_cur_erase_blk
+	.uleb128 0x35
+	.4byte	.LASF811
+	.byte	0x21
+	.byte	0xcb
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_recovery_page_num
+	.uleb128 0x35
+	.4byte	.LASF812
+	.byte	0x21
+	.byte	0xcc
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_recovery_page_min_ver
+	.uleb128 0x6
+	.4byte	0x74
+	.4byte	0x38f1
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x35
+	.4byte	.LASF813
+	.byte	0x21
+	.byte	0xcd
+	.4byte	0x38e1
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_recovery_ppa_tbl
+	.uleb128 0x35
+	.4byte	.LASF814
+	.byte	0x21
+	.byte	0xce
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_mlc_erase_count_value
+	.uleb128 0x35
+	.4byte	.LASF815
+	.byte	0x21
+	.byte	0xcf
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_power_lost_recovery_flag
+	.uleb128 0x35
+	.4byte	.LASF816
+	.byte	0x21
+	.byte	0xd0
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_power_lost_ecc_error_blk
+	.uleb128 0x35
+	.4byte	.LASF817
+	.byte	0x21
+	.byte	0xd1
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_page_map_check_enable
+	.uleb128 0x8
+	.4byte	.LASF818
+	.byte	0x22
+	.byte	0xe
+	.4byte	0x74
+	.uleb128 0x6
+	.4byte	0x2c1
+	.4byte	0x3961
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x3
+	.byte	0
+	.uleb128 0x36
+	.4byte	.LASF101
+	.byte	0x2
+	.byte	0x10
+	.4byte	0x3951
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	NandOptPara
+	.uleb128 0x6
+	.4byte	0x3e9
+	.4byte	0x3982
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x49
+	.byte	0
+	.uleb128 0x36
+	.4byte	.LASF819
+	.byte	0x2
+	.byte	0x5f
+	.4byte	0x3972
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	NandFlashParaTbl
+	.uleb128 0x37
+	.4byte	0xa80
+	.byte	0x2
+	.byte	0xca
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gNandParaInfo
+	.uleb128 0x35
+	.4byte	.LASF820
+	.byte	0x2
+	.byte	0xcb
+	.4byte	0x3e9
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gSlcNandParaInfo
+	.uleb128 0x6
+	.4byte	0x57
+	.4byte	0x39c1
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x7f
+	.byte	0
+	.uleb128 0x35
+	.4byte	.LASF821
+	.byte	0x2
+	.byte	0xdb
+	.4byte	0x39b1
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	random_seed
+	.uleb128 0x6
+	.4byte	0x45
+	.4byte	0x39e8
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x6
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x3
+	.byte	0
+	.uleb128 0x15
+	.4byte	.LASF822
+	.byte	0x2
+	.2byte	0x547
+	.4byte	0x39d2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	refValueDefault
+	.uleb128 0x6
+	.4byte	0x45
+	.4byte	0x3a10
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0xf
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x3
+	.byte	0
+	.uleb128 0x15
+	.4byte	.LASF823
+	.byte	0x2
+	.2byte	0x644
+	.4byte	0x39fa
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	SamsungRefValue
+	.uleb128 0x6
+	.4byte	0x45
+	.4byte	0x3a38
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x8
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x4
+	.byte	0
+	.uleb128 0x15
+	.4byte	.LASF824
+	.byte	0x2
+	.2byte	0x65a
+	.4byte	0x3a22
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	ToshibaA19RefValue
+	.uleb128 0x6
+	.4byte	0x45
+	.4byte	0x3a60
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x12
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x4
+	.byte	0
+	.uleb128 0x15
+	.4byte	.LASF825
+	.byte	0x2
+	.2byte	0x670
+	.4byte	0x3a4a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	Toshiba15RefValue
+	.uleb128 0x6
+	.4byte	0x45
+	.4byte	0x3a82
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x7
+	.byte	0
+	.uleb128 0x15
+	.4byte	.LASF826
+	.byte	0x2
+	.2byte	0x688
+	.4byte	0x3a72
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	ToshibaRefValue
+	.uleb128 0x35
+	.4byte	.LASF827
+	.byte	0x4
+	.byte	0x6
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	DeviceCapacity
+	.uleb128 0x35
+	.4byte	.LASF828
+	.byte	0x4
+	.byte	0x7
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gFtlInitStatus
+	.uleb128 0x16
+	.4byte	0x3946
+	.byte	0x4
+	.2byte	0x38f
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_LowFormat
+	.uleb128 0x15
+	.4byte	.LASF829
+	.byte	0x4
+	.2byte	0x638
+	.4byte	0x8f
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	power_up_flag
+	.uleb128 0x38
+	.4byte	.LASF830
+	.byte	0x4
+	.2byte	0x6f1
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gc_discard_updated
+	.uleb128 0x15
+	.4byte	.LASF831
+	.byte	0x1
+	.2byte	0x3da
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_ect_tbl_power_up_flush
+	.uleb128 0x15
+	.4byte	.LASF832
+	.byte	0x1
+	.2byte	0x3f0
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	FtlUpdateVaildLpnCount
+	.uleb128 0x36
+	.4byte	.LASF833
+	.byte	0x6
+	.byte	0x6c
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	ftl_gc_temp_block_bops_scan_page_addr
+	.uleb128 0x15
+	.4byte	.LASF834
+	.byte	0x6
+	.2byte	0x213
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gc_ink_free_return_value
+	.uleb128 0x19
+	.4byte	.LASF835
+	.byte	0x23
+	.2byte	0x3ba
+	.4byte	0x1aa8
+	.uleb128 0x19
+	.4byte	.LASF836
+	.byte	0x23
+	.2byte	0x3bb
+	.4byte	0x1aa8
+	.uleb128 0x19
+	.4byte	.LASF837
+	.byte	0x23
+	.2byte	0x3bc
+	.4byte	0x1aa8
+	.uleb128 0x39
+	.4byte	.LASF1582
+	.byte	0
+	.byte	0x8
+	.byte	0x9
+	.uleb128 0x3
+	.4byte	.LASF838
+	.byte	0x8
+	.byte	0xa
+	.4byte	0x3b53
+	.uleb128 0x9
+	.4byte	.LASF839
+	.byte	0x4
+	.byte	0x8
+	.byte	0xc
+	.4byte	0x3b7f
+	.uleb128 0xb
+	.ascii	"pid\000"
+	.byte	0x8
+	.byte	0xd
+	.4byte	0x8f
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.4byte	.LASF840
+	.byte	0x8
+	.byte	0x10
+	.4byte	0x3b8a
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x3b66
+	.uleb128 0x9
+	.4byte	.LASF841
+	.byte	0x4
+	.byte	0x8
+	.byte	0x57
+	.4byte	0x3ba8
+	.uleb128 0xb
+	.ascii	"sz\000"
+	.byte	0x8
+	.byte	0x57
+	.4byte	0x8f
+	.byte	0
+	.byte	0
+	.uleb128 0x3
+	.4byte	.LASF842
+	.byte	0x8
+	.byte	0xd8
+	.4byte	0x3b5b
+	.uleb128 0x9
+	.4byte	.LASF843
+	.byte	0x4
+	.byte	0x8
+	.byte	0xfa
+	.4byte	0x3bca
+	.uleb128 0xb
+	.ascii	"i\000"
+	.byte	0x8
+	.byte	0xfa
+	.4byte	0x8f
+	.byte	0
+	.byte	0
+	.uleb128 0x9
+	.4byte	.LASF844
+	.byte	0x18
+	.byte	0x8
+	.byte	0xff
+	.4byte	0x3c25
+	.uleb128 0x23
+	.4byte	.LASF845
+	.byte	0x8
+	.2byte	0x100
+	.4byte	0x3c25
+	.byte	0
+	.uleb128 0x23
+	.4byte	.LASF846
+	.byte	0x8
+	.2byte	0x101
+	.4byte	0x3c30
+	.byte	0x4
+	.uleb128 0x23
+	.4byte	.LASF847
+	.byte	0x8
+	.2byte	0x102
+	.4byte	0x1a61
+	.byte	0x8
+	.uleb128 0x23
+	.4byte	.LASF848
+	.byte	0x8
+	.2byte	0x103
+	.4byte	0x3c41
+	.byte	0xc
+	.uleb128 0x23
+	.4byte	.LASF849
+	.byte	0x8
+	.2byte	0x105
+	.4byte	0x1aea
+	.byte	0x10
+	.uleb128 0x23
+	.4byte	.LASF850
+	.byte	0x8
+	.2byte	0x106
+	.4byte	0x1aea
+	.byte	0x14
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x3bca
+	.uleb128 0x2c
+	.4byte	.LASF846
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x3c2b
+	.uleb128 0x33
+	.4byte	0x3c41
+	.uleb128 0x18
+	.4byte	0x3c25
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x3c36
+	.uleb128 0x28
+	.4byte	.LASF852
+	.byte	0x4
+	.byte	0x8
+	.2byte	0x108
+	.4byte	0x3c60
+	.uleb128 0x29
+	.ascii	"i\000"
+	.byte	0x8
+	.2byte	0x108
+	.4byte	0x8f
+	.byte	0
+	.byte	0
+	.uleb128 0x28
+	.4byte	.LASF853
+	.byte	0x8
+	.byte	0x8
+	.2byte	0x10b
+	.4byte	0x3c88
+	.uleb128 0x23
+	.4byte	.LASF854
+	.byte	0x8
+	.2byte	0x10c
+	.4byte	0x8f
+	.byte	0
+	.uleb128 0x29
+	.ascii	"dev\000"
+	.byte	0x8
+	.2byte	0x10d
+	.4byte	0x1a61
+	.byte	0x4
+	.byte	0
+	.uleb128 0x9
+	.4byte	.LASF855
+	.byte	0xc
+	.byte	0x24
+	.byte	0x19
+	.4byte	0x3cb9
+	.uleb128 0xa
+	.4byte	.LASF856
+	.byte	0x24
+	.byte	0x1a
+	.4byte	0x19b3
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF857
+	.byte	0x24
+	.byte	0x1b
+	.4byte	0x3cb9
+	.byte	0x4
+	.uleb128 0xa
+	.4byte	.LASF858
+	.byte	0x24
+	.byte	0x1c
+	.4byte	0x3cb9
+	.byte	0x8
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x3c88
+	.uleb128 0x9
+	.4byte	.LASF859
+	.byte	0x4
+	.byte	0x24
+	.byte	0x20
+	.4byte	0x3cd8
+	.uleb128 0xa
+	.4byte	.LASF855
+	.byte	0x24
+	.byte	0x21
+	.4byte	0x3cb9
+	.byte	0
+	.byte	0
+	.uleb128 0x9
+	.4byte	.LASF860
+	.byte	0xc
+	.byte	0x25
+	.byte	0x87
+	.4byte	0x3d09
+	.uleb128 0xa
+	.4byte	.LASF176
+	.byte	0x25
+	.byte	0x88
+	.4byte	0x19db
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF861
+	.byte	0x25
+	.byte	0x89
+	.4byte	0x19db
+	.byte	0x4
+	.uleb128 0xa
+	.4byte	.LASF862
+	.byte	0x25
+	.byte	0x8a
+	.4byte	0x19db
+	.byte	0x8
+	.byte	0
+	.uleb128 0x9
+	.4byte	.LASF863
+	.byte	0x8
+	.byte	0x25
+	.byte	0xd1
+	.4byte	0x3d2e
+	.uleb128 0xa
+	.4byte	.LASF864
+	.byte	0x25
+	.byte	0xd2
+	.4byte	0x19db
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF861
+	.byte	0x25
+	.byte	0xd3
+	.4byte	0x19db
+	.byte	0x4
+	.byte	0
+	.uleb128 0x9
+	.4byte	.LASF865
+	.byte	0x10
+	.byte	0x25
+	.byte	0xef
+	.4byte	0x3d6b
+	.uleb128 0xa
+	.4byte	.LASF866
+	.byte	0x25
+	.byte	0xf0
+	.4byte	0x19db
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF867
+	.byte	0x25
+	.byte	0xf1
+	.4byte	0x19db
+	.byte	0x4
+	.uleb128 0xa
+	.4byte	.LASF868
+	.byte	0x25
+	.byte	0xf2
+	.4byte	0x19db
+	.byte	0x8
+	.uleb128 0xa
+	.4byte	.LASF869
+	.byte	0x25
+	.byte	0xf3
+	.4byte	0x19db
+	.byte	0xc
+	.byte	0
+	.uleb128 0x9
+	.4byte	.LASF870
+	.byte	0x48
+	.byte	0x26
+	.byte	0x2a
+	.4byte	0x3e14
+	.uleb128 0xb
+	.ascii	"mtd\000"
+	.byte	0x26
+	.byte	0x2b
+	.4byte	0x4067
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF201
+	.byte	0x26
+	.byte	0x2c
+	.4byte	0x1ac9
+	.byte	0x8
+	.uleb128 0xb
+	.ascii	"len\000"
+	.byte	0x26
+	.byte	0x2d
+	.4byte	0x1ac9
+	.byte	0x10
+	.uleb128 0xa
+	.4byte	.LASF871
+	.byte	0x26
+	.byte	0x2e
+	.4byte	0x1ac9
+	.byte	0x18
+	.uleb128 0xa
+	.4byte	.LASF872
+	.byte	0x26
+	.byte	0x2f
+	.4byte	0x1a92
+	.byte	0x20
+	.uleb128 0xa
+	.4byte	.LASF873
+	.byte	0x26
+	.byte	0x30
+	.4byte	0x1a92
+	.byte	0x24
+	.uleb128 0xb
+	.ascii	"dev\000"
+	.byte	0x26
+	.byte	0x31
+	.4byte	0x2c
+	.byte	0x28
+	.uleb128 0xa
+	.4byte	.LASF874
+	.byte	0x26
+	.byte	0x32
+	.4byte	0x2c
+	.byte	0x2c
+	.uleb128 0xa
+	.4byte	.LASF875
+	.byte	0x26
+	.byte	0x33
+	.4byte	0x407e
+	.byte	0x30
+	.uleb128 0xa
+	.4byte	.LASF543
+	.byte	0x26
+	.byte	0x34
+	.4byte	0x1a92
+	.byte	0x34
+	.uleb128 0xa
+	.4byte	.LASF438
+	.byte	0x26
+	.byte	0x35
+	.4byte	0x1a82
+	.byte	0x38
+	.uleb128 0xa
+	.4byte	.LASF333
+	.byte	0x26
+	.byte	0x36
+	.4byte	0x4078
+	.byte	0x3c
+	.uleb128 0xa
+	.4byte	.LASF876
+	.byte	0x26
+	.byte	0x37
+	.4byte	0x8f
+	.byte	0x40
+	.byte	0
+	.uleb128 0x9
+	.4byte	.LASF877
+	.byte	0xd0
+	.byte	0x26
+	.byte	0x7a
+	.4byte	0x4067
+	.uleb128 0xa
+	.4byte	.LASF409
+	.byte	0x26
+	.byte	0x7b
+	.4byte	0x1a82
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF878
+	.byte	0x26
+	.byte	0x7c
+	.4byte	0x1abe
+	.byte	0x4
+	.uleb128 0xa
+	.4byte	.LASF338
+	.byte	0x26
+	.byte	0x7d
+	.4byte	0x1ac9
+	.byte	0x8
+	.uleb128 0xa
+	.4byte	.LASF879
+	.byte	0x26
+	.byte	0x83
+	.4byte	0x1abe
+	.byte	0x10
+	.uleb128 0xa
+	.4byte	.LASF880
+	.byte	0x26
+	.byte	0x8b
+	.4byte	0x1abe
+	.byte	0x14
+	.uleb128 0xa
+	.4byte	.LASF881
+	.byte	0x26
+	.byte	0x96
+	.4byte	0x1abe
+	.byte	0x18
+	.uleb128 0xa
+	.4byte	.LASF882
+	.byte	0x26
+	.byte	0x98
+	.4byte	0x1abe
+	.byte	0x1c
+	.uleb128 0xa
+	.4byte	.LASF883
+	.byte	0x26
+	.byte	0x99
+	.4byte	0x1abe
+	.byte	0x20
+	.uleb128 0xa
+	.4byte	.LASF884
+	.byte	0x26
+	.byte	0x9f
+	.4byte	0x2c
+	.byte	0x24
+	.uleb128 0xa
+	.4byte	.LASF885
+	.byte	0x26
+	.byte	0xa0
+	.4byte	0x2c
+	.byte	0x28
+	.uleb128 0xa
+	.4byte	.LASF886
+	.byte	0x26
+	.byte	0xa2
+	.4byte	0x2c
+	.byte	0x2c
+	.uleb128 0xa
+	.4byte	.LASF887
+	.byte	0x26
+	.byte	0xa3
+	.4byte	0x2c
+	.byte	0x30
+	.uleb128 0xa
+	.4byte	.LASF888
+	.byte	0x26
+	.byte	0xac
+	.4byte	0x2c
+	.byte	0x34
+	.uleb128 0xa
+	.4byte	.LASF336
+	.byte	0x26
+	.byte	0xb2
+	.4byte	0x1a50
+	.byte	0x38
+	.uleb128 0xa
+	.4byte	.LASF542
+	.byte	0x26
+	.byte	0xb4
+	.4byte	0x8f
+	.byte	0x3c
+	.uleb128 0xa
+	.4byte	.LASF889
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+	.byte	0xb7
+	.4byte	0x4195
+	.byte	0x40
+	.uleb128 0xa
+	.4byte	.LASF890
+	.byte	0x26
+	.byte	0xba
+	.4byte	0x2c
+	.byte	0x44
+	.uleb128 0xa
+	.4byte	.LASF891
+	.byte	0x26
+	.byte	0xbd
+	.4byte	0x2c
+	.byte	0x48
+	.uleb128 0xa
+	.4byte	.LASF892
+	.byte	0x26
+	.byte	0xc2
+	.4byte	0x8f
+	.byte	0x4c
+	.uleb128 0xa
+	.4byte	.LASF893
+	.byte	0x26
+	.byte	0xc3
+	.4byte	0x419b
+	.byte	0x50
+	.uleb128 0xa
+	.4byte	.LASF894
+	.byte	0x26
+	.byte	0xc9
+	.4byte	0x41b5
+	.byte	0x54
+	.uleb128 0xa
+	.4byte	.LASF895
+	.byte	0x26
+	.byte	0xcf
+	.4byte	0x41d9
+	.byte	0x58
+	.uleb128 0xa
+	.4byte	.LASF896
+	.byte	0x26
+	.byte	0xd3
+	.4byte	0x420e
+	.byte	0x5c
+	.uleb128 0xa
+	.4byte	.LASF897
+	.byte	0x26
+	.byte	0xd5
+	.4byte	0x423d
+	.byte	0x60
+	.uleb128 0xa
+	.4byte	.LASF898
+	.byte	0x26
+	.byte	0xd7
+	.4byte	0x423d
+	.byte	0x64
+	.uleb128 0xa
+	.4byte	.LASF899
+	.byte	0x26
+	.byte	0xd9
+	.4byte	0x4262
+	.byte	0x68
+	.uleb128 0xa
+	.4byte	.LASF900
+	.byte	0x26
+	.byte	0xdb
+	.4byte	0x4262
+	.byte	0x6c
+	.uleb128 0xa
+	.4byte	.LASF901
+	.byte	0x26
+	.byte	0xdd
+	.4byte	0x428c
+	.byte	0x70
+	.uleb128 0xa
+	.4byte	.LASF902
+	.byte	0x26
+	.byte	0xdf
+	.4byte	0x420e
+	.byte	0x74
+	.uleb128 0xa
+	.4byte	.LASF903
+	.byte	0x26
+	.byte	0xe1
+	.4byte	0x428c
+	.byte	0x78
+	.uleb128 0xa
+	.4byte	.LASF904
+	.byte	0x26
+	.byte	0xe3
+	.4byte	0x420e
+	.byte	0x7c
+	.uleb128 0xa
+	.4byte	.LASF905
+	.byte	0x26
+	.byte	0xe5
+	.4byte	0x420e
+	.byte	0x80
+	.uleb128 0xa
+	.4byte	.LASF906
+	.byte	0x26
+	.byte	0xe7
+	.4byte	0x42ab
+	.byte	0x84
+	.uleb128 0xa
+	.4byte	.LASF907
+	.byte	0x26
+	.byte	0xed
+	.4byte	0x42bc
+	.byte	0x88
+	.uleb128 0xa
+	.4byte	.LASF908
+	.byte	0x26
+	.byte	0xee
+	.4byte	0x42db
+	.byte	0x8c
+	.uleb128 0xa
+	.4byte	.LASF909
+	.byte	0x26
+	.byte	0xef
+	.4byte	0x42db
+	.byte	0x90
+	.uleb128 0xa
+	.4byte	.LASF910
+	.byte	0x26
+	.byte	0xf0
+	.4byte	0x42db
+	.byte	0x94
+	.uleb128 0xa
+	.4byte	.LASF911
+	.byte	0x26
+	.byte	0xf1
+	.4byte	0x42f5
+	.byte	0x98
+	.uleb128 0xa
+	.4byte	.LASF912
+	.byte	0x26
+	.byte	0xf2
+	.4byte	0x42f5
+	.byte	0x9c
+	.uleb128 0xa
+	.4byte	.LASF913
+	.byte	0x26
+	.byte	0xf3
+	.4byte	0x42f5
+	.byte	0xa0
+	.uleb128 0xa
+	.4byte	.LASF914
+	.byte	0x26
+	.byte	0xfd
+	.4byte	0x430a
+	.byte	0xa4
+	.uleb128 0xa
+	.4byte	.LASF915
+	.byte	0x26
+	.byte	0xfe
+	.4byte	0x42bc
+	.byte	0xa8
+	.uleb128 0x23
+	.4byte	.LASF916
+	.byte	0x26
+	.2byte	0x10a
+	.4byte	0x3d2e
+	.byte	0xac
+	.uleb128 0x23
+	.4byte	.LASF917
+	.byte	0x26
+	.2byte	0x10c
+	.4byte	0x8f
+	.byte	0xbc
+	.uleb128 0x23
+	.4byte	.LASF543
+	.byte	0x26
+	.2byte	0x10e
+	.4byte	0x1aea
+	.byte	0xc0
+	.uleb128 0x23
+	.4byte	.LASF854
+	.byte	0x26
+	.2byte	0x110
+	.4byte	0x4315
+	.byte	0xc4
+	.uleb128 0x29
+	.ascii	"dev\000"
+	.byte	0x26
+	.2byte	0x114
+	.4byte	0x1b42
+	.byte	0xc8
+	.uleb128 0x23
+	.4byte	.LASF918
+	.byte	0x26
+	.2byte	0x116
+	.4byte	0x8f
+	.byte	0xcc
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x3e14
+	.uleb128 0x33
+	.4byte	0x4078
+	.uleb128 0x18
+	.4byte	0x4078
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x3d6b
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x406d
+	.uleb128 0x9
+	.4byte	.LASF919
+	.byte	0x18
+	.byte	0x26
+	.byte	0x3a
+	.4byte	0x40c1
+	.uleb128 0xa
+	.4byte	.LASF864
+	.byte	0x26
+	.byte	0x3b
+	.4byte	0x1ac9
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF879
+	.byte	0x26
+	.byte	0x3c
+	.4byte	0x1abe
+	.byte	0x8
+	.uleb128 0xa
+	.4byte	.LASF920
+	.byte	0x26
+	.byte	0x3d
+	.4byte	0x1abe
+	.byte	0xc
+	.uleb128 0xa
+	.4byte	.LASF921
+	.byte	0x26
+	.byte	0x3e
+	.4byte	0x40c1
+	.byte	0x10
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x19b3
+	.uleb128 0x9
+	.4byte	.LASF922
+	.byte	0x20
+	.byte	0x26
+	.byte	0x54
+	.4byte	0x4134
+	.uleb128 0xa
+	.4byte	.LASF923
+	.byte	0x26
+	.byte	0x55
+	.4byte	0x2c
+	.byte	0
+	.uleb128 0xb
+	.ascii	"len\000"
+	.byte	0x26
+	.byte	0x56
+	.4byte	0x1a77
+	.byte	0x4
+	.uleb128 0xa
+	.4byte	.LASF924
+	.byte	0x26
+	.byte	0x57
+	.4byte	0x1a77
+	.byte	0x8
+	.uleb128 0xa
+	.4byte	.LASF925
+	.byte	0x26
+	.byte	0x58
+	.4byte	0x1a77
+	.byte	0xc
+	.uleb128 0xa
+	.4byte	.LASF926
+	.byte	0x26
+	.byte	0x59
+	.4byte	0x1a77
+	.byte	0x10
+	.uleb128 0xa
+	.4byte	.LASF927
+	.byte	0x26
+	.byte	0x5a
+	.4byte	0x1abe
+	.byte	0x14
+	.uleb128 0xa
+	.4byte	.LASF928
+	.byte	0x26
+	.byte	0x5b
+	.4byte	0x224c
+	.byte	0x18
+	.uleb128 0xa
+	.4byte	.LASF929
+	.byte	0x26
+	.byte	0x5c
+	.4byte	0x224c
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x13
+	.4byte	.LASF930
+	.2byte	0xba8
+	.byte	0x26
+	.byte	0x71
+	.4byte	0x4174
+	.uleb128 0xa
+	.4byte	.LASF931
+	.byte	0x26
+	.byte	0x72
+	.4byte	0x19db
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF932
+	.byte	0x26
+	.byte	0x73
+	.4byte	0x4174
+	.byte	0x4
+	.uleb128 0xf
+	.4byte	.LASF883
+	.byte	0x26
+	.byte	0x74
+	.4byte	0x19db
+	.2byte	0xaa4
+	.uleb128 0xf
+	.4byte	.LASF933
+	.byte	0x26
+	.byte	0x75
+	.4byte	0x4185
+	.2byte	0xaa8
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x19db
+	.4byte	0x4185
+	.uleb128 0x14
+	.4byte	0x2aa
+	.2byte	0x2a7
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x3d09
+	.4byte	0x4195
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x1f
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x4134
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x4084
+	.uleb128 0x17
+	.4byte	0x8f
+	.4byte	0x41b5
+	.uleb128 0x18
+	.4byte	0x4067
+	.uleb128 0x18
+	.4byte	0x4078
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x41a1
+	.uleb128 0x17
+	.4byte	0x19b3
+	.4byte	0x41d9
+	.uleb128 0x18
+	.4byte	0x4067
+	.uleb128 0x18
+	.4byte	0x19b3
+	.uleb128 0x18
+	.4byte	0x19b3
+	.uleb128 0x18
+	.4byte	0x19b3
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x41bb
+	.uleb128 0x17
+	.4byte	0x8f
+	.4byte	0x4202
+	.uleb128 0x18
+	.4byte	0x4067
+	.uleb128 0x18
+	.4byte	0x1a6c
+	.uleb128 0x18
+	.4byte	0x1a77
+	.uleb128 0x18
+	.4byte	0x4202
+	.uleb128 0x18
+	.4byte	0x4208
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x1a77
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x1a82
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x41df
+	.uleb128 0x17
+	.4byte	0x8f
+	.4byte	0x4237
+	.uleb128 0x18
+	.4byte	0x4067
+	.uleb128 0x18
+	.4byte	0x1a6c
+	.uleb128 0x18
+	.4byte	0x1a77
+	.uleb128 0x18
+	.4byte	0x4202
+	.uleb128 0x18
+	.4byte	0x4237
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x1a8d
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x4214
+	.uleb128 0x17
+	.4byte	0x8f
+	.4byte	0x425c
+	.uleb128 0x18
+	.4byte	0x4067
+	.uleb128 0x18
+	.4byte	0x1a6c
+	.uleb128 0x18
+	.4byte	0x425c
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x40c7
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x4243
+	.uleb128 0x17
+	.4byte	0x8f
+	.4byte	0x4286
+	.uleb128 0x18
+	.4byte	0x4067
+	.uleb128 0x18
+	.4byte	0x1a77
+	.uleb128 0x18
+	.4byte	0x4202
+	.uleb128 0x18
+	.4byte	0x4286
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x3cd8
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x4268
+	.uleb128 0x17
+	.4byte	0x8f
+	.4byte	0x42ab
+	.uleb128 0x18
+	.4byte	0x4067
+	.uleb128 0x18
+	.4byte	0x1a6c
+	.uleb128 0x18
+	.4byte	0x1a77
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x4292
+	.uleb128 0x33
+	.4byte	0x42bc
+	.uleb128 0x18
+	.4byte	0x4067
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x42b1
+	.uleb128 0x17
+	.4byte	0x8f
+	.4byte	0x42db
+	.uleb128 0x18
+	.4byte	0x4067
+	.uleb128 0x18
+	.4byte	0x1a6c
+	.uleb128 0x18
+	.4byte	0x1ac9
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x42c2
+	.uleb128 0x17
+	.4byte	0x8f
+	.4byte	0x42f5
+	.uleb128 0x18
+	.4byte	0x4067
+	.uleb128 0x18
+	.4byte	0x1a6c
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x42e1
+	.uleb128 0x17
+	.4byte	0x8f
+	.4byte	0x430a
+	.uleb128 0x18
+	.4byte	0x4067
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x42fb
+	.uleb128 0x2c
+	.4byte	.LASF934
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x4310
+	.uleb128 0x28
+	.4byte	.LASF935
+	.byte	0xac
+	.byte	0x27
+	.2byte	0x161
+	.4byte	0x43ab
+	.uleb128 0x23
+	.4byte	.LASF936
+	.byte	0x27
+	.2byte	0x162
+	.4byte	0x1adf
+	.byte	0
+	.uleb128 0x23
+	.4byte	.LASF937
+	.byte	0x27
+	.2byte	0x163
+	.4byte	0x1adf
+	.byte	0x4
+	.uleb128 0x23
+	.4byte	.LASF938
+	.byte	0x27
+	.2byte	0x164
+	.4byte	0x1adf
+	.byte	0x8
+	.uleb128 0x23
+	.4byte	.LASF939
+	.byte	0x27
+	.2byte	0x165
+	.4byte	0x19c5
+	.byte	0xc
+	.uleb128 0x23
+	.4byte	.LASF940
+	.byte	0x27
+	.2byte	0x166
+	.4byte	0x19c5
+	.byte	0xd
+	.uleb128 0x23
+	.4byte	.LASF941
+	.byte	0x27
+	.2byte	0x167
+	.4byte	0x1ad4
+	.byte	0xe
+	.uleb128 0x23
+	.4byte	.LASF336
+	.byte	0x27
+	.2byte	0x16b
+	.4byte	0x43ab
+	.byte	0x10
+	.uleb128 0x23
+	.4byte	.LASF878
+	.byte	0x27
+	.2byte	0x16d
+	.4byte	0x19c5
+	.byte	0x90
+	.uleb128 0x23
+	.4byte	.LASF600
+	.byte	0x27
+	.2byte	0x16e
+	.4byte	0x43bb
+	.byte	0x91
+	.uleb128 0x29
+	.ascii	"crc\000"
+	.byte	0x27
+	.2byte	0x16f
+	.4byte	0x1adf
+	.byte	0xa8
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1a27
+	.4byte	0x43bb
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x7f
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x19c5
+	.4byte	0x43cb
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x16
+	.byte	0
+	.uleb128 0x3a
+	.byte	0xc
+	.byte	0x28
+	.byte	0xae
+	.4byte	0x43e9
+	.uleb128 0x1f
+	.ascii	"rb\000"
+	.byte	0x28
+	.byte	0xaf
+	.4byte	0x3c88
+	.uleb128 0x12
+	.4byte	.LASF942
+	.byte	0x28
+	.byte	0xb0
+	.4byte	0x1b75
+	.byte	0
+	.uleb128 0x9
+	.4byte	.LASF943
+	.byte	0x14
+	.byte	0x28
+	.byte	0xad
+	.4byte	0x4417
+	.uleb128 0xb
+	.ascii	"u\000"
+	.byte	0x28
+	.byte	0xb1
+	.4byte	0x43cb
+	.byte	0
+	.uleb128 0xb
+	.ascii	"ec\000"
+	.byte	0x28
+	.byte	0xb2
+	.4byte	0x8f
+	.byte	0xc
+	.uleb128 0xa
+	.4byte	.LASF944
+	.byte	0x28
+	.byte	0xb3
+	.4byte	0x8f
+	.byte	0x10
+	.byte	0
+	.uleb128 0x13
+	.4byte	.LASF945
+	.2byte	0x10c
+	.byte	0x28
+	.byte	0xeb
+	.4byte	0x4462
+	.uleb128 0xb
+	.ascii	"e\000"
+	.byte	0x28
+	.byte	0xec
+	.4byte	0x4462
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF946
+	.byte	0x28
+	.byte	0xed
+	.4byte	0x4478
+	.byte	0x80
+	.uleb128 0xf
+	.4byte	.LASF947
+	.byte	0x28
+	.byte	0xee
+	.4byte	0x8f
+	.2byte	0x100
+	.uleb128 0xf
+	.4byte	.LASF948
+	.byte	0x28
+	.byte	0xef
+	.4byte	0x8f
+	.2byte	0x104
+	.uleb128 0xf
+	.4byte	.LASF949
+	.byte	0x28
+	.byte	0xf0
+	.4byte	0x8f
+	.2byte	0x108
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x4472
+	.4byte	0x4472
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x1f
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x43e9
+	.uleb128 0x6
+	.4byte	0x8f
+	.4byte	0x4488
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x13
+	.4byte	.LASF950
+	.2byte	0x40c
+	.byte	0x28
+	.byte	0xff
+	.4byte	0x44cd
+	.uleb128 0x23
+	.4byte	.LASF951
+	.byte	0x28
+	.2byte	0x100
+	.4byte	0x44cd
+	.byte	0
+	.uleb128 0x24
+	.4byte	.LASF952
+	.byte	0x28
+	.2byte	0x101
+	.4byte	0x8f
+	.2byte	0x400
+	.uleb128 0x24
+	.4byte	.LASF338
+	.byte	0x28
+	.2byte	0x102
+	.4byte	0x8f
+	.2byte	0x404
+	.uleb128 0x24
+	.4byte	.LASF953
+	.byte	0x28
+	.2byte	0x103
+	.4byte	0x8f
+	.2byte	0x408
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x8f
+	.4byte	0x44dd
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0xff
+	.byte	0
+	.uleb128 0x30
+	.4byte	.LASF954
+	.2byte	0x110
+	.byte	0x28
+	.2byte	0x138
+	.4byte	0x4699
+	.uleb128 0x29
+	.ascii	"dev\000"
+	.byte	0x28
+	.2byte	0x139
+	.4byte	0x3bca
+	.byte	0
+	.uleb128 0x23
+	.4byte	.LASF853
+	.byte	0x28
+	.2byte	0x13a
+	.4byte	0x3c60
+	.byte	0x18
+	.uleb128 0x29
+	.ascii	"ubi\000"
+	.byte	0x28
+	.2byte	0x13b
+	.4byte	0x4b06
+	.byte	0x20
+	.uleb128 0x23
+	.4byte	.LASF955
+	.byte	0x28
+	.2byte	0x13c
+	.4byte	0x8f
+	.byte	0x24
+	.uleb128 0x23
+	.4byte	.LASF956
+	.byte	0x28
+	.2byte	0x13d
+	.4byte	0x8f
+	.byte	0x28
+	.uleb128 0x23
+	.4byte	.LASF957
+	.byte	0x28
+	.2byte	0x13e
+	.4byte	0x8f
+	.byte	0x2c
+	.uleb128 0x23
+	.4byte	.LASF958
+	.byte	0x28
+	.2byte	0x13f
+	.4byte	0x8f
+	.byte	0x30
+	.uleb128 0x23
+	.4byte	.LASF959
+	.byte	0x28
+	.2byte	0x140
+	.4byte	0x8f
+	.byte	0x34
+	.uleb128 0x23
+	.4byte	.LASF960
+	.byte	0x28
+	.2byte	0x141
+	.4byte	0x8f
+	.byte	0x38
+	.uleb128 0x23
+	.4byte	.LASF936
+	.byte	0x28
+	.2byte	0x143
+	.4byte	0x8f
+	.byte	0x3c
+	.uleb128 0x23
+	.4byte	.LASF939
+	.byte	0x28
+	.2byte	0x144
+	.4byte	0x8f
+	.byte	0x40
+	.uleb128 0x23
+	.4byte	.LASF961
+	.byte	0x28
+	.2byte	0x145
+	.4byte	0x8f
+	.byte	0x44
+	.uleb128 0x23
+	.4byte	.LASF962
+	.byte	0x28
+	.2byte	0x146
+	.4byte	0x8f
+	.byte	0x48
+	.uleb128 0x23
+	.4byte	.LASF963
+	.byte	0x28
+	.2byte	0x14a
+	.4byte	0x1a00
+	.byte	0x4c
+	.uleb128 0x23
+	.4byte	.LASF964
+	.byte	0x28
+	.2byte	0x14c
+	.4byte	0x9d
+	.byte	0x50
+	.uleb128 0x23
+	.4byte	.LASF937
+	.byte	0x28
+	.2byte	0x14d
+	.4byte	0x8f
+	.byte	0x58
+	.uleb128 0x23
+	.4byte	.LASF938
+	.byte	0x28
+	.2byte	0x14e
+	.4byte	0x8f
+	.byte	0x5c
+	.uleb128 0x23
+	.4byte	.LASF941
+	.byte	0x28
+	.2byte	0x14f
+	.4byte	0x8f
+	.byte	0x60
+	.uleb128 0x23
+	.4byte	.LASF336
+	.byte	0x28
+	.2byte	0x150
+	.4byte	0x43ab
+	.byte	0x64
+	.uleb128 0x23
+	.4byte	.LASF965
+	.byte	0x28
+	.2byte	0x152
+	.4byte	0x8f
+	.byte	0xe4
+	.uleb128 0x23
+	.4byte	.LASF966
+	.byte	0x28
+	.2byte	0x153
+	.4byte	0x8f
+	.byte	0xe8
+	.uleb128 0x23
+	.4byte	.LASF967
+	.byte	0x28
+	.2byte	0x154
+	.4byte	0x9d
+	.byte	0xf0
+	.uleb128 0x23
+	.4byte	.LASF968
+	.byte	0x28
+	.2byte	0x155
+	.4byte	0x9d
+	.byte	0xf8
+	.uleb128 0x24
+	.4byte	.LASF969
+	.byte	0x28
+	.2byte	0x156
+	.4byte	0x1aea
+	.2byte	0x100
+	.uleb128 0x24
+	.4byte	.LASF970
+	.byte	0x28
+	.2byte	0x158
+	.4byte	0x4b0c
+	.2byte	0x104
+	.uleb128 0x3b
+	.4byte	.LASF971
+	.byte	0x28
+	.2byte	0x159
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1f
+	.2byte	0x108
+	.uleb128 0x3b
+	.4byte	.LASF972
+	.byte	0x28
+	.2byte	0x15a
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1e
+	.2byte	0x108
+	.uleb128 0x3b
+	.4byte	.LASF940
+	.byte	0x28
+	.2byte	0x15b
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1d
+	.2byte	0x108
+	.uleb128 0x3b
+	.4byte	.LASF973
+	.byte	0x28
+	.2byte	0x15c
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1c
+	.2byte	0x108
+	.uleb128 0x3b
+	.4byte	.LASF974
+	.byte	0x28
+	.2byte	0x15d
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1b
+	.2byte	0x108
+	.uleb128 0x3b
+	.4byte	.LASF975
+	.byte	0x28
+	.2byte	0x15e
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1a
+	.2byte	0x108
+	.byte	0
+	.uleb128 0x30
+	.4byte	.LASF976
+	.2byte	0xc08
+	.byte	0x28
+	.2byte	0x212
+	.4byte	0x4b06
+	.uleb128 0x23
+	.4byte	.LASF853
+	.byte	0x28
+	.2byte	0x213
+	.4byte	0x3c60
+	.byte	0
+	.uleb128 0x29
+	.ascii	"dev\000"
+	.byte	0x28
+	.2byte	0x214
+	.4byte	0x3bca
+	.byte	0x8
+	.uleb128 0x23
+	.4byte	.LASF977
+	.byte	0x28
+	.2byte	0x215
+	.4byte	0x8f
+	.byte	0x20
+	.uleb128 0x23
+	.4byte	.LASF978
+	.byte	0x28
+	.2byte	0x216
+	.4byte	0x1b2d
+	.byte	0x24
+	.uleb128 0x23
+	.4byte	.LASF979
+	.byte	0x28
+	.2byte	0x217
+	.4byte	0x8f
+	.byte	0x30
+	.uleb128 0x23
+	.4byte	.LASF980
+	.byte	0x28
+	.2byte	0x218
+	.4byte	0x4c67
+	.byte	0x34
+	.uleb128 0x24
+	.4byte	.LASF981
+	.byte	0x28
+	.2byte	0x219
+	.4byte	0x3ba8
+	.2byte	0x238
+	.uleb128 0x24
+	.4byte	.LASF956
+	.byte	0x28
+	.2byte	0x21a
+	.4byte	0x8f
+	.2byte	0x238
+	.uleb128 0x24
+	.4byte	.LASF982
+	.byte	0x28
+	.2byte	0x21b
+	.4byte	0x8f
+	.2byte	0x23c
+	.uleb128 0x24
+	.4byte	.LASF983
+	.byte	0x28
+	.2byte	0x21d
+	.4byte	0x8f
+	.2byte	0x240
+	.uleb128 0x24
+	.4byte	.LASF984
+	.byte	0x28
+	.2byte	0x21e
+	.4byte	0x8f
+	.2byte	0x244
+	.uleb128 0x24
+	.4byte	.LASF985
+	.byte	0x28
+	.2byte	0x21f
+	.4byte	0x8f
+	.2byte	0x248
+	.uleb128 0x24
+	.4byte	.LASF986
+	.byte	0x28
+	.2byte	0x220
+	.4byte	0x8f
+	.2byte	0x24c
+	.uleb128 0x24
+	.4byte	.LASF987
+	.byte	0x28
+	.2byte	0x221
+	.4byte	0x8f
+	.2byte	0x250
+	.uleb128 0x24
+	.4byte	.LASF988
+	.byte	0x28
+	.2byte	0x223
+	.4byte	0x8f
+	.2byte	0x254
+	.uleb128 0x24
+	.4byte	.LASF989
+	.byte	0x28
+	.2byte	0x224
+	.4byte	0x8f
+	.2byte	0x258
+	.uleb128 0x24
+	.4byte	.LASF990
+	.byte	0x28
+	.2byte	0x225
+	.4byte	0x8f
+	.2byte	0x25c
+	.uleb128 0x24
+	.4byte	.LASF991
+	.byte	0x28
+	.2byte	0x226
+	.4byte	0x4c77
+	.2byte	0x260
+	.uleb128 0x24
+	.4byte	.LASF992
+	.byte	0x28
+	.2byte	0x227
+	.4byte	0x3c47
+	.2byte	0x264
+	.uleb128 0x24
+	.4byte	.LASF993
+	.byte	0x28
+	.2byte	0x229
+	.4byte	0x8f
+	.2byte	0x268
+	.uleb128 0x24
+	.4byte	.LASF994
+	.byte	0x28
+	.2byte	0x22b
+	.4byte	0x8f
+	.2byte	0x26c
+	.uleb128 0x24
+	.4byte	.LASF995
+	.byte	0x28
+	.2byte	0x22e
+	.4byte	0x96
+	.2byte	0x270
+	.uleb128 0x24
+	.4byte	.LASF996
+	.byte	0x28
+	.2byte	0x22f
+	.4byte	0x3ba8
+	.2byte	0x278
+	.uleb128 0x24
+	.4byte	.LASF997
+	.byte	0x28
+	.2byte	0x230
+	.4byte	0x3cbf
+	.2byte	0x278
+	.uleb128 0x24
+	.4byte	.LASF998
+	.byte	0x28
+	.2byte	0x231
+	.4byte	0x3c47
+	.2byte	0x27c
+	.uleb128 0x24
+	.4byte	.LASF999
+	.byte	0x28
+	.2byte	0x234
+	.4byte	0x8f
+	.2byte	0x280
+	.uleb128 0x25
+	.ascii	"fm\000"
+	.byte	0x28
+	.2byte	0x235
+	.4byte	0x4c7d
+	.2byte	0x284
+	.uleb128 0x24
+	.4byte	.LASF1000
+	.byte	0x28
+	.2byte	0x236
+	.4byte	0x4488
+	.2byte	0x288
+	.uleb128 0x24
+	.4byte	.LASF1001
+	.byte	0x28
+	.2byte	0x237
+	.4byte	0x4488
+	.2byte	0x694
+	.uleb128 0x24
+	.4byte	.LASF1002
+	.byte	0x28
+	.2byte	0x238
+	.4byte	0x3bb3
+	.2byte	0xaa0
+	.uleb128 0x24
+	.4byte	.LASF1003
+	.byte	0x28
+	.2byte	0x239
+	.4byte	0x3bb3
+	.2byte	0xaa4
+	.uleb128 0x24
+	.4byte	.LASF1004
+	.byte	0x28
+	.2byte	0x23a
+	.4byte	0x1aea
+	.2byte	0xaa8
+	.uleb128 0x24
+	.4byte	.LASF1005
+	.byte	0x28
+	.2byte	0x23b
+	.4byte	0x1a77
+	.2byte	0xaac
+	.uleb128 0x24
+	.4byte	.LASF1006
+	.byte	0x28
+	.2byte	0x23f
+	.4byte	0x8f
+	.2byte	0xab0
+	.uleb128 0x24
+	.4byte	.LASF952
+	.byte	0x28
+	.2byte	0x242
+	.4byte	0x3cbf
+	.2byte	0xab4
+	.uleb128 0x24
+	.4byte	.LASF1007
+	.byte	0x28
+	.2byte	0x243
+	.4byte	0x3cbf
+	.2byte	0xab8
+	.uleb128 0x24
+	.4byte	.LASF1008
+	.byte	0x28
+	.2byte	0x244
+	.4byte	0x3cbf
+	.2byte	0xabc
+	.uleb128 0x24
+	.4byte	.LASF1009
+	.byte	0x28
+	.2byte	0x245
+	.4byte	0x8f
+	.2byte	0xac0
+	.uleb128 0x24
+	.4byte	.LASF876
+	.byte	0x28
+	.2byte	0x246
+	.4byte	0x3cbf
+	.2byte	0xac4
+	.uleb128 0x25
+	.ascii	"pq\000"
+	.byte	0x28
+	.2byte	0x247
+	.4byte	0x4c83
+	.2byte	0xac8
+	.uleb128 0x24
+	.4byte	.LASF1010
+	.byte	0x28
+	.2byte	0x248
+	.4byte	0x8f
+	.2byte	0xb18
+	.uleb128 0x24
+	.4byte	.LASF1011
+	.byte	0x28
+	.2byte	0x249
+	.4byte	0x3ba8
+	.2byte	0xb1c
+	.uleb128 0x24
+	.4byte	.LASF1012
+	.byte	0x28
+	.2byte	0x24a
+	.4byte	0x3c47
+	.2byte	0xb1c
+	.uleb128 0x24
+	.4byte	.LASF1013
+	.byte	0x28
+	.2byte	0x24b
+	.4byte	0x3bb3
+	.2byte	0xb20
+	.uleb128 0x24
+	.4byte	.LASF1014
+	.byte	0x28
+	.2byte	0x24c
+	.4byte	0x8f
+	.2byte	0xb24
+	.uleb128 0x24
+	.4byte	.LASF1015
+	.byte	0x28
+	.2byte	0x24d
+	.4byte	0x4c93
+	.2byte	0xb28
+	.uleb128 0x24
+	.4byte	.LASF1016
+	.byte	0x28
+	.2byte	0x24e
+	.4byte	0x4472
+	.2byte	0xb2c
+	.uleb128 0x24
+	.4byte	.LASF1017
+	.byte	0x28
+	.2byte	0x24f
+	.4byte	0x4472
+	.2byte	0xb30
+	.uleb128 0x24
+	.4byte	.LASF1018
+	.byte	0x28
+	.2byte	0x250
+	.4byte	0x8f
+	.2byte	0xb34
+	.uleb128 0x24
+	.4byte	.LASF1019
+	.byte	0x28
+	.2byte	0x251
+	.4byte	0x1b75
+	.2byte	0xb38
+	.uleb128 0x24
+	.4byte	.LASF1020
+	.byte	0x28
+	.2byte	0x252
+	.4byte	0x8f
+	.2byte	0xb40
+	.uleb128 0x24
+	.4byte	.LASF1021
+	.byte	0x28
+	.2byte	0x253
+	.4byte	0x4c9e
+	.2byte	0xb44
+	.uleb128 0x24
+	.4byte	.LASF1022
+	.byte	0x28
+	.2byte	0x254
+	.4byte	0x8f
+	.2byte	0xb48
+	.uleb128 0x24
+	.4byte	.LASF1023
+	.byte	0x28
+	.2byte	0x255
+	.4byte	0x4ca4
+	.2byte	0xb4c
+	.uleb128 0x24
+	.4byte	.LASF1024
+	.byte	0x28
+	.2byte	0x258
+	.4byte	0x9d
+	.2byte	0xb60
+	.uleb128 0x24
+	.4byte	.LASF1025
+	.byte	0x28
+	.2byte	0x259
+	.4byte	0x8f
+	.2byte	0xb68
+	.uleb128 0x24
+	.4byte	.LASF1026
+	.byte	0x28
+	.2byte	0x25a
+	.4byte	0x8f
+	.2byte	0xb6c
+	.uleb128 0x24
+	.4byte	.LASF1027
+	.byte	0x28
+	.2byte	0x25b
+	.4byte	0x8f
+	.2byte	0xb70
+	.uleb128 0x24
+	.4byte	.LASF1028
+	.byte	0x28
+	.2byte	0x25c
+	.4byte	0x8f
+	.2byte	0xb74
+	.uleb128 0x24
+	.4byte	.LASF1029
+	.byte	0x28
+	.2byte	0x25d
+	.4byte	0x8f
+	.2byte	0xb78
+	.uleb128 0x24
+	.4byte	.LASF1030
+	.byte	0x28
+	.2byte	0x25e
+	.4byte	0x8f
+	.2byte	0xb7c
+	.uleb128 0x24
+	.4byte	.LASF1031
+	.byte	0x28
+	.2byte	0x25f
+	.4byte	0x8f
+	.2byte	0xb80
+	.uleb128 0x24
+	.4byte	.LASF1032
+	.byte	0x28
+	.2byte	0x260
+	.4byte	0x8f
+	.2byte	0xb84
+	.uleb128 0x24
+	.4byte	.LASF1033
+	.byte	0x28
+	.2byte	0x261
+	.4byte	0x8f
+	.2byte	0xb88
+	.uleb128 0x24
+	.4byte	.LASF1034
+	.byte	0x28
+	.2byte	0x262
+	.4byte	0x8f
+	.2byte	0xb8c
+	.uleb128 0x24
+	.4byte	.LASF1035
+	.byte	0x28
+	.2byte	0x263
+	.4byte	0x8f
+	.2byte	0xb90
+	.uleb128 0x24
+	.4byte	.LASF1036
+	.byte	0x28
+	.2byte	0x264
+	.4byte	0x8f
+	.2byte	0xb94
+	.uleb128 0x24
+	.4byte	.LASF1037
+	.byte	0x28
+	.2byte	0x265
+	.4byte	0x8f
+	.2byte	0xb98
+	.uleb128 0x24
+	.4byte	.LASF1038
+	.byte	0x28
+	.2byte	0x266
+	.4byte	0x8f
+	.2byte	0xb9c
+	.uleb128 0x24
+	.4byte	.LASF1039
+	.byte	0x28
+	.2byte	0x267
+	.4byte	0x8f
+	.2byte	0xba0
+	.uleb128 0x24
+	.4byte	.LASF1040
+	.byte	0x28
+	.2byte	0x268
+	.4byte	0x8f
+	.2byte	0xba4
+	.uleb128 0x24
+	.4byte	.LASF1041
+	.byte	0x28
+	.2byte	0x269
+	.4byte	0x8f
+	.2byte	0xba8
+	.uleb128 0x3b
+	.4byte	.LASF1042
+	.byte	0x28
+	.2byte	0x26a
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1f
+	.2byte	0xbac
+	.uleb128 0x3b
+	.4byte	.LASF1043
+	.byte	0x28
+	.2byte	0x26b
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1e
+	.2byte	0xbac
+	.uleb128 0x24
+	.4byte	.LASF1044
+	.byte	0x28
+	.2byte	0x26c
+	.4byte	0x8f
+	.2byte	0xbb0
+	.uleb128 0x25
+	.ascii	"mtd\000"
+	.byte	0x28
+	.2byte	0x26d
+	.4byte	0x4067
+	.2byte	0xbb4
+	.uleb128 0x24
+	.4byte	.LASF1045
+	.byte	0x28
+	.2byte	0x26f
+	.4byte	0x1aea
+	.2byte	0xbb8
+	.uleb128 0x24
+	.4byte	.LASF1046
+	.byte	0x28
+	.2byte	0x270
+	.4byte	0x3c47
+	.2byte	0xbbc
+	.uleb128 0x24
+	.4byte	.LASF1047
+	.byte	0x28
+	.2byte	0x271
+	.4byte	0x3c47
+	.2byte	0xbc0
+	.uleb128 0x25
+	.ascii	"dbg\000"
+	.byte	0x28
+	.2byte	0x273
+	.4byte	0x4b18
+	.2byte	0xbc4
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x4699
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x8f
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x44dd
+	.uleb128 0x28
+	.4byte	.LASF1048
+	.byte	0x40
+	.byte	0x28
+	.2byte	0x187
+	.4byte	0x4c4c
+	.uleb128 0x3c
+	.4byte	.LASF1049
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+	.2byte	0x188
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x3c
+	.4byte	.LASF1050
+	.byte	0x28
+	.2byte	0x189
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1e
+	.byte	0
+	.uleb128 0x3c
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+	.2byte	0x18a
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1d
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+	.uleb128 0x3c
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+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1c
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+	.uleb128 0x3c
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+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1b
+	.byte	0
+	.uleb128 0x3c
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+	.2byte	0x18d
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1a
+	.byte	0
+	.uleb128 0x3c
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+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x2
+	.byte	0x18
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+	.uleb128 0x23
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+	.2byte	0x18f
+	.4byte	0x2c
+	.byte	0x4
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+	.byte	0x28
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+	.4byte	0x2c
+	.byte	0x8
+	.uleb128 0x23
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+	.2byte	0x191
+	.4byte	0x2c
+	.byte	0xc
+	.uleb128 0x23
+	.4byte	.LASF1059
+	.byte	0x28
+	.2byte	0x192
+	.4byte	0x4c4c
+	.byte	0x10
+	.uleb128 0x23
+	.4byte	.LASF1060
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+	.2byte	0x193
+	.4byte	0x4c61
+	.byte	0x18
+	.uleb128 0x23
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+	.4byte	0x4c61
+	.byte	0x1c
+	.uleb128 0x23
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+	.4byte	0x4c61
+	.byte	0x20
+	.uleb128 0x23
+	.4byte	.LASF1063
+	.byte	0x28
+	.2byte	0x196
+	.4byte	0x4c61
+	.byte	0x24
+	.uleb128 0x23
+	.4byte	.LASF1064
+	.byte	0x28
+	.2byte	0x197
+	.4byte	0x4c61
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+	.uleb128 0x23
+	.4byte	.LASF1065
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+	.4byte	0x4c61
+	.byte	0x30
+	.uleb128 0x23
+	.4byte	.LASF1067
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+	.2byte	0x19a
+	.4byte	0x4c61
+	.byte	0x34
+	.uleb128 0x23
+	.4byte	.LASF1068
+	.byte	0x28
+	.2byte	0x19b
+	.4byte	0x4c61
+	.byte	0x38
+	.uleb128 0x23
+	.4byte	.LASF1069
+	.byte	0x28
+	.2byte	0x19c
+	.4byte	0x4c61
+	.byte	0x3c
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1a27
+	.4byte	0x4c5c
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x6
+	.byte	0
+	.uleb128 0x2c
+	.4byte	.LASF1070
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x4c5c
+	.uleb128 0x6
+	.4byte	0x4b12
+	.4byte	0x4c77
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x80
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x431b
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x4417
+	.uleb128 0x6
+	.4byte	0x1b75
+	.4byte	0x4c93
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x9
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x4472
+	.uleb128 0x2c
+	.4byte	.LASF1071
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x4c99
+	.uleb128 0x6
+	.4byte	0x1a27
+	.4byte	0x4cb4
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0xc
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x3b90
+	.uleb128 0x19
+	.4byte	.LASF1072
+	.byte	0x28
+	.2byte	0x309
+	.4byte	0x4cb4
+	.uleb128 0x2c
+	.4byte	.LASF1073
+	.uleb128 0x4
+	.4byte	0x4cc6
+	.uleb128 0x19
+	.4byte	.LASF1074
+	.byte	0x28
+	.2byte	0x30a
+	.4byte	0x4ccb
+	.uleb128 0x19
+	.4byte	.LASF1075
+	.byte	0x28
+	.2byte	0x30b
+	.4byte	0x4ccb
+	.uleb128 0x19
+	.4byte	.LASF1076
+	.byte	0x28
+	.2byte	0x30c
+	.4byte	0x4ccb
+	.uleb128 0x19
+	.4byte	.LASF1077
+	.byte	0x28
+	.2byte	0x30d
+	.4byte	0x3c2b
+	.uleb128 0x19
+	.4byte	.LASF1078
+	.byte	0x28
+	.2byte	0x30e
+	.4byte	0x3c47
+	.uleb128 0x2c
+	.4byte	.LASF1079
+	.uleb128 0x19
+	.4byte	.LASF1080
+	.byte	0x28
+	.2byte	0x30f
+	.4byte	0x4d0c
+	.uleb128 0x6
+	.4byte	0x4b06
+	.4byte	0x4d28
+	.uleb128 0x7
+	.byte	0
+	.uleb128 0x8
+	.4byte	.LASF1081
+	.byte	0x29
+	.byte	0x4d
+	.4byte	0x4d1d
+	.uleb128 0x6
+	.4byte	0x3a
+	.4byte	0x4d46
+	.uleb128 0x3d
+	.4byte	0x2aa
+	.4byte	0x13ffff
+	.byte	0
+	.uleb128 0x35
+	.4byte	.LASF1082
+	.byte	0x7
+	.byte	0x17
+	.4byte	0x4d33
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	FtlMallocBuffer
+	.uleb128 0x35
+	.4byte	.LASF1083
+	.byte	0x7
+	.byte	0x18
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	FtlMallocOffset
+	.uleb128 0x3e
+	.4byte	.LASF1085
+	.byte	0x7
+	.byte	0x84
+	.4byte	.LFB496
+	.4byte	.LFE496-.LFB496
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4e71
+	.uleb128 0x3f
+	.ascii	"s\000"
+	.byte	0x7
+	.byte	0x84
+	.4byte	0x1a50
+	.4byte	.LLST443
+	.uleb128 0x3f
+	.ascii	"buf\000"
+	.byte	0x7
+	.byte	0x84
+	.4byte	0x1aea
+	.4byte	.LLST444
+	.uleb128 0x40
+	.4byte	.LASF1084
+	.byte	0x7
+	.byte	0x84
+	.4byte	0x74
+	.4byte	.LLST445
+	.uleb128 0x3f
+	.ascii	"len\000"
+	.byte	0x7
+	.byte	0x84
+	.4byte	0x74
+	.4byte	.LLST446
+	.uleb128 0x41
+	.ascii	"i\000"
+	.byte	0x7
+	.byte	0x89
+	.4byte	0x74
+	.4byte	.LLST447
+	.uleb128 0x41
+	.ascii	"j\000"
+	.byte	0x7
+	.byte	0x89
+	.4byte	0x74
+	.4byte	.LLST448
+	.uleb128 0x41
+	.ascii	"p8\000"
+	.byte	0x7
+	.byte	0x8a
+	.4byte	0x1a50
+	.4byte	.LLST449
+	.uleb128 0x41
+	.ascii	"p16\000"
+	.byte	0x7
+	.byte	0x8b
+	.4byte	0x4e71
+	.4byte	.LLST450
+	.uleb128 0x41
+	.ascii	"p32\000"
+	.byte	0x7
+	.byte	0x8c
+	.4byte	0x13e
+	.4byte	.LLST451
+	.uleb128 0x42
+	.4byte	.LVL1410
+	.4byte	0x103ff
+	.4byte	0x4e1d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC18
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1411
+	.4byte	0x103ff
+	.4byte	0x4e40
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC16
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1413
+	.4byte	0x103ff
+	.4byte	0x4e54
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1415
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC18
+	.byte	0
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x6d
+	.uleb128 0x46
+	.4byte	.LASF1124
+	.byte	0x7
+	.byte	0x7f
+	.4byte	0x2c
+	.byte	0x1
+	.uleb128 0x3e
+	.4byte	.LASF1086
+	.byte	0x7
+	.byte	0x78
+	.4byte	.LFB494
+	.4byte	.LFE494-.LFB494
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4edc
+	.uleb128 0x47
+	.4byte	0x4edc
+	.4byte	.LBB486
+	.4byte	.LBE486-.LBB486
+	.byte	0x7
+	.byte	0x7a
+	.4byte	0x4eb5
+	.uleb128 0x48
+	.4byte	.LVL2343
+	.4byte	0xbed1
+	.byte	0
+	.uleb128 0x47
+	.4byte	0x4edc
+	.4byte	.LBB488
+	.4byte	.LBE488-.LBB488
+	.byte	0x7
+	.byte	0x7c
+	.4byte	0x4ed2
+	.uleb128 0x49
+	.4byte	.LVL2345
+	.4byte	0xbed1
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2344
+	.4byte	0x9884
+	.byte	0
+	.uleb128 0x4a
+	.4byte	.LASF1088
+	.byte	0x7
+	.byte	0x73
+	.byte	0x1
+	.uleb128 0x4b
+	.4byte	.LASF1090
+	.byte	0x7
+	.byte	0x68
+	.4byte	0x84
+	.4byte	.LFB492
+	.4byte	.LFE492-.LFB492
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4f61
+	.uleb128 0x40
+	.4byte	.LASF1087
+	.byte	0x7
+	.byte	0x68
+	.4byte	0x13e
+	.4byte	.LLST738
+	.uleb128 0x41
+	.ascii	"ret\000"
+	.byte	0x7
+	.byte	0x6a
+	.4byte	0x84
+	.4byte	.LLST739
+	.uleb128 0x44
+	.4byte	.LVL2926
+	.4byte	0xbf65
+	.4byte	0x4f30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2928
+	.4byte	0x98b5
+	.4byte	0x4f47
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR15
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2929
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC54
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x4a
+	.4byte	.LASF1089
+	.byte	0x7
+	.byte	0x64
+	.byte	0x1
+	.uleb128 0x4b
+	.4byte	.LASF1091
+	.byte	0x7
+	.byte	0x5b
+	.4byte	0x74
+	.4byte	.LFB490
+	.4byte	.LFE490-.LFB490
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4fde
+	.uleb128 0x40
+	.4byte	.LASF542
+	.byte	0x7
+	.byte	0x5b
+	.4byte	0x74
+	.4byte	.LLST440
+	.uleb128 0x40
+	.4byte	.LASF1092
+	.byte	0x7
+	.byte	0x5b
+	.4byte	0x74
+	.4byte	.LLST441
+	.uleb128 0x3f
+	.ascii	"buf\000"
+	.byte	0x7
+	.byte	0x5b
+	.4byte	0x1aea
+	.4byte	.LLST442
+	.uleb128 0x4c
+	.ascii	"ret\000"
+	.byte	0x7
+	.byte	0x5d
+	.4byte	0x74
+	.sleb128 -1
+	.uleb128 0x4d
+	.4byte	.LVL1405
+	.4byte	0x1040b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x40
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0
+	.byte	0
+	.uleb128 0x4b
+	.4byte	.LASF1093
+	.byte	0x7
+	.byte	0x53
+	.4byte	0x74
+	.4byte	.LFB489
+	.4byte	.LFE489-.LFB489
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5053
+	.uleb128 0x40
+	.4byte	.LASF542
+	.byte	0x7
+	.byte	0x53
+	.4byte	0x74
+	.4byte	.LLST437
+	.uleb128 0x40
+	.4byte	.LASF1092
+	.byte	0x7
+	.byte	0x53
+	.4byte	0x74
+	.4byte	.LLST438
+	.uleb128 0x3f
+	.ascii	"buf\000"
+	.byte	0x7
+	.byte	0x53
+	.4byte	0x1aea
+	.4byte	.LLST439
+	.uleb128 0x4c
+	.ascii	"ret\000"
+	.byte	0x7
+	.byte	0x55
+	.4byte	0x74
+	.sleb128 -1
+	.uleb128 0x4d
+	.4byte	.LVL1400
+	.4byte	0x10417
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x40
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0
+	.byte	0
+	.uleb128 0x4b
+	.4byte	.LASF1094
+	.byte	0x7
+	.byte	0x4b
+	.4byte	0x74
+	.4byte	.LFB488
+	.4byte	.LFE488-.LFB488
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x50bc
+	.uleb128 0x40
+	.4byte	.LASF1095
+	.byte	0x7
+	.byte	0x4b
+	.4byte	0x74
+	.4byte	.LLST435
+	.uleb128 0x3f
+	.ascii	"Buf\000"
+	.byte	0x7
+	.byte	0x4b
+	.4byte	0x1aea
+	.4byte	.LLST436
+	.uleb128 0x4c
+	.ascii	"ret\000"
+	.byte	0x7
+	.byte	0x4d
+	.4byte	0x74
+	.sleb128 -1
+	.uleb128 0x4d
+	.4byte	.LVL1395
+	.4byte	0x1040b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x40
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x6
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x23
+	.uleb128 0x100
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0
+	.byte	0
+	.uleb128 0x4b
+	.4byte	.LASF1096
+	.byte	0x7
+	.byte	0x42
+	.4byte	0x74
+	.4byte	.LFB487
+	.4byte	.LFE487-.LFB487
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5145
+	.uleb128 0x40
+	.4byte	.LASF1095
+	.byte	0x7
+	.byte	0x42
+	.4byte	0x74
+	.4byte	.LLST433
+	.uleb128 0x3f
+	.ascii	"Buf\000"
+	.byte	0x7
+	.byte	0x42
+	.4byte	0x1aea
+	.4byte	.LLST434
+	.uleb128 0x4c
+	.ascii	"ret\000"
+	.byte	0x7
+	.byte	0x44
+	.4byte	0x74
+	.sleb128 -1
+	.uleb128 0x44
+	.4byte	.LVL1389
+	.4byte	0x10423
+	.4byte	0x511f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x200
+	.byte	0
+	.uleb128 0x4d
+	.4byte	.LVL1391
+	.4byte	0x10417
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x40
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x6
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x23
+	.uleb128 0x100
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0
+	.byte	0
+	.uleb128 0x3e
+	.4byte	.LASF1097
+	.byte	0x7
+	.byte	0x3d
+	.4byte	.LFB486
+	.4byte	.LFE486-.LFB486
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5194
+	.uleb128 0x3f
+	.ascii	"buf\000"
+	.byte	0x7
+	.byte	0x3d
+	.4byte	0x1aea
+	.4byte	.LLST431
+	.uleb128 0x4e
+	.4byte	0x536b
+	.4byte	.LBB351
+	.4byte	.LBE351-.LBB351
+	.byte	0x7
+	.byte	0x3f
+	.uleb128 0x4f
+	.4byte	0x5377
+	.4byte	.LLST432
+	.uleb128 0x4d
+	.4byte	.LVL1385
+	.4byte	0x10430
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x4b
+	.4byte	.LASF1098
+	.byte	0x7
+	.byte	0x38
+	.4byte	0x1aea
+	.4byte	.LFB485
+	.4byte	.LFE485-.LFB485
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x51d3
+	.uleb128 0x40
+	.4byte	.LASF338
+	.byte	0x7
+	.byte	0x38
+	.4byte	0x8f
+	.4byte	.LLST423
+	.uleb128 0x4d
+	.4byte	.LVL1306
+	.4byte	0x1043d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x50
+	.4byte	.LASF1109
+	.byte	0x7
+	.byte	0x33
+	.4byte	0x8f
+	.byte	0x1
+	.4byte	0x51ef
+	.uleb128 0x51
+	.4byte	.LASF1107
+	.byte	0x7
+	.byte	0x33
+	.4byte	0x8f
+	.byte	0
+	.uleb128 0x4b
+	.4byte	.LASF1099
+	.byte	0x7
+	.byte	0x2e
+	.4byte	0x8f
+	.4byte	.LFB483
+	.4byte	.LFE483-.LFB483
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5255
+	.uleb128 0x40
+	.4byte	.LASF1100
+	.byte	0x7
+	.byte	0x2e
+	.4byte	0x1aea
+	.4byte	.LLST419
+	.uleb128 0x40
+	.4byte	.LASF1101
+	.byte	0x7
+	.byte	0x2e
+	.4byte	0x1aea
+	.4byte	.LLST420
+	.uleb128 0x40
+	.4byte	.LASF602
+	.byte	0x7
+	.byte	0x2e
+	.4byte	0x2c
+	.4byte	.LLST421
+	.uleb128 0x4d
+	.4byte	.LVL1302
+	.4byte	0x10449
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0
+	.byte	0
+	.uleb128 0x3e
+	.4byte	.LASF1102
+	.byte	0x7
+	.byte	0x24
+	.4byte	.LFB482
+	.4byte	.LFE482-.LFB482
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x529f
+	.uleb128 0x52
+	.4byte	.LASF1103
+	.byte	0x7
+	.byte	0x24
+	.4byte	0x13e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x52
+	.4byte	.LASF1104
+	.byte	0x7
+	.byte	0x24
+	.4byte	0x529f
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x52
+	.4byte	.LASF338
+	.byte	0x7
+	.byte	0x24
+	.4byte	0x2c
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x41
+	.ascii	"i\000"
+	.byte	0x7
+	.byte	0x26
+	.4byte	0x74
+	.4byte	.LLST310
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x7f
+	.uleb128 0x4b
+	.4byte	.LASF1105
+	.byte	0x7
+	.byte	0x1f
+	.4byte	0x1aea
+	.4byte	.LFB481
+	.4byte	.LFE481-.LFB481
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x530b
+	.uleb128 0x40
+	.4byte	.LASF1103
+	.byte	0x7
+	.byte	0x1f
+	.4byte	0x1aea
+	.4byte	.LLST304
+	.uleb128 0x40
+	.4byte	.LASF1104
+	.byte	0x7
+	.byte	0x1f
+	.4byte	0x1b48
+	.4byte	.LLST305
+	.uleb128 0x40
+	.4byte	.LASF338
+	.byte	0x7
+	.byte	0x1f
+	.4byte	0x2c
+	.4byte	.LLST306
+	.uleb128 0x4d
+	.4byte	.LVL900
+	.4byte	0x10455
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0
+	.byte	0
+	.uleb128 0x4b
+	.4byte	.LASF1106
+	.byte	0x7
+	.byte	0x1a
+	.4byte	0x1aea
+	.4byte	.LFB480
+	.4byte	.LFE480-.LFB480
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x536b
+	.uleb128 0x3f
+	.ascii	"s\000"
+	.byte	0x7
+	.byte	0x1a
+	.4byte	0x1aea
+	.4byte	.LLST276
+	.uleb128 0x3f
+	.ascii	"c\000"
+	.byte	0x7
+	.byte	0x1a
+	.4byte	0x8f
+	.4byte	.LLST277
+	.uleb128 0x3f
+	.ascii	"n\000"
+	.byte	0x7
+	.byte	0x1a
+	.4byte	0x2c
+	.4byte	.LLST278
+	.uleb128 0x4d
+	.4byte	.LVL744
+	.4byte	0x10423
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0
+	.byte	0
+	.uleb128 0x53
+	.4byte	.LASF1562
+	.byte	0x8
+	.byte	0x4e
+	.byte	0x3
+	.4byte	0x5383
+	.uleb128 0x51
+	.4byte	.LASF1108
+	.byte	0x8
+	.byte	0x4e
+	.4byte	0x1b48
+	.byte	0
+	.uleb128 0x54
+	.4byte	.LASF1110
+	.byte	0x6
+	.2byte	0x214
+	.4byte	0x8f
+	.byte	0x1
+	.4byte	0x5442
+	.uleb128 0x55
+	.4byte	.LASF923
+	.byte	0x6
+	.2byte	0x214
+	.4byte	0x74
+	.uleb128 0x55
+	.4byte	.LASF1111
+	.byte	0x6
+	.2byte	0x214
+	.4byte	0x74
+	.uleb128 0x56
+	.4byte	.LASF1112
+	.byte	0x6
+	.2byte	0x216
+	.4byte	0x57
+	.uleb128 0x57
+	.ascii	"lpa\000"
+	.byte	0x6
+	.2byte	0x217
+	.4byte	0x74
+	.uleb128 0x57
+	.ascii	"ppa\000"
+	.byte	0x6
+	.2byte	0x217
+	.4byte	0x74
+	.uleb128 0x56
+	.4byte	.LASF1113
+	.byte	0x6
+	.2byte	0x218
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF576
+	.byte	0x6
+	.2byte	0x219
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1114
+	.byte	0x6
+	.2byte	0x219
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1115
+	.byte	0x6
+	.2byte	0x219
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1116
+	.byte	0x6
+	.2byte	0x219
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1117
+	.byte	0x6
+	.2byte	0x21a
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1118
+	.byte	0x6
+	.2byte	0x21b
+	.4byte	0x5442
+	.uleb128 0x58
+	.4byte	.LASF1119
+	.byte	0x6
+	.2byte	0x316
+	.uleb128 0x58
+	.4byte	.LASF1120
+	.byte	0x6
+	.2byte	0x319
+	.uleb128 0x59
+	.4byte	.LASF1121
+	.4byte	0x5458
+	.4byte	.LASF1110
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x2a5a
+	.uleb128 0x6
+	.4byte	0x1a2e
+	.4byte	0x5458
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x16
+	.byte	0
+	.uleb128 0x4
+	.4byte	0x5448
+	.uleb128 0x54
+	.4byte	.LASF1122
+	.byte	0x6
+	.2byte	0x1b5
+	.4byte	0x8f
+	.byte	0x1
+	.4byte	0x54a7
+	.uleb128 0x55
+	.4byte	.LASF1123
+	.byte	0x6
+	.2byte	0x1b5
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1114
+	.byte	0x6
+	.2byte	0x1b7
+	.4byte	0x57
+	.uleb128 0x57
+	.ascii	"i\000"
+	.byte	0x6
+	.2byte	0x1b8
+	.4byte	0x57
+	.uleb128 0x57
+	.ascii	"j\000"
+	.byte	0x6
+	.2byte	0x1b8
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF664
+	.byte	0x6
+	.2byte	0x1b9
+	.4byte	0x57
+	.byte	0
+	.uleb128 0x5a
+	.4byte	.LASF1125
+	.byte	0x6
+	.2byte	0x1aa
+	.4byte	0x8f
+	.byte	0x1
+	.uleb128 0x5b
+	.4byte	.LASF1126
+	.byte	0x6
+	.2byte	0x192
+	.4byte	0x8f
+	.4byte	.LFB404
+	.4byte	.LFE404-.LFB404
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5521
+	.uleb128 0x5c
+	.4byte	.LASF664
+	.byte	0x6
+	.2byte	0x192
+	.4byte	0x57
+	.4byte	.LLST273
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x6
+	.2byte	0x194
+	.4byte	0x57
+	.4byte	.LLST274
+	.uleb128 0x5e
+	.4byte	.LASF1127
+	.byte	0x6
+	.2byte	0x195
+	.4byte	0x57
+	.4byte	.LLST275
+	.uleb128 0x44
+	.4byte	.LVL731
+	.4byte	0x8958
+	.4byte	0x5510
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL733
+	.4byte	0x5521
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1128
+	.byte	0x6
+	.2byte	0x17b
+	.4byte	0x8f
+	.4byte	.LFB403
+	.4byte	.LFE403-.LFB403
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x554c
+	.uleb128 0x5c
+	.4byte	.LASF1108
+	.byte	0x6
+	.2byte	0x17b
+	.4byte	0x57
+	.4byte	.LLST272
+	.byte	0
+	.uleb128 0x5f
+	.4byte	.LASF1193
+	.byte	0x6
+	.2byte	0x16d
+	.4byte	0x8f
+	.4byte	0x5569
+	.uleb128 0x55
+	.4byte	.LASF1108
+	.byte	0x6
+	.2byte	0x16d
+	.4byte	0x57
+	.byte	0
+	.uleb128 0x54
+	.4byte	.LASF1129
+	.byte	0x6
+	.2byte	0x14d
+	.4byte	0x74
+	.byte	0x1
+	.4byte	0x5591
+	.uleb128 0x57
+	.ascii	"i\000"
+	.byte	0x6
+	.2byte	0x14f
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1118
+	.byte	0x6
+	.2byte	0x150
+	.4byte	0x5442
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1130
+	.byte	0x6
+	.2byte	0x13d
+	.4byte	0x74
+	.4byte	.LFB400
+	.4byte	.LFE400-.LFB400
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5616
+	.uleb128 0x48
+	.4byte	.LVL2785
+	.4byte	0x93da
+	.uleb128 0x44
+	.4byte	.LVL2786
+	.4byte	0x57df
+	.4byte	0x55c8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2787
+	.4byte	0x5ef1
+	.4byte	0x55dc
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2788
+	.4byte	0x7c46
+	.uleb128 0x44
+	.4byte	.LVL2789
+	.4byte	0x7759
+	.4byte	0x55f9
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2790
+	.4byte	0x75f4
+	.uleb128 0x4d
+	.4byte	.LVL2791
+	.4byte	0x5c52
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR93
+	.byte	0
+	.byte	0
+	.uleb128 0x60
+	.4byte	.LASF1131
+	.byte	0x6
+	.2byte	0x132
+	.byte	0x1
+	.uleb128 0x4b
+	.4byte	.LASF1132
+	.byte	0x6
+	.byte	0xe2
+	.4byte	0x74
+	.4byte	.LFB398
+	.4byte	.LFE398-.LFB398
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5798
+	.uleb128 0x40
+	.4byte	.LASF1133
+	.byte	0x6
+	.byte	0xe2
+	.4byte	0x35d9
+	.4byte	.LLST706
+	.uleb128 0x40
+	.4byte	.LASF1134
+	.byte	0x6
+	.byte	0xe2
+	.4byte	0x74
+	.4byte	.LLST707
+	.uleb128 0x61
+	.4byte	.LASF1116
+	.byte	0x6
+	.byte	0xe4
+	.4byte	0x57
+	.4byte	.LLST708
+	.uleb128 0x61
+	.4byte	.LASF1135
+	.byte	0x6
+	.byte	0xe5
+	.4byte	0x57
+	.4byte	.LLST709
+	.uleb128 0x41
+	.ascii	"req\000"
+	.byte	0x6
+	.byte	0xe5
+	.4byte	0x57
+	.4byte	.LLST710
+	.uleb128 0x61
+	.4byte	.LASF1114
+	.byte	0x6
+	.byte	0xe6
+	.4byte	0x57
+	.4byte	.LLST711
+	.uleb128 0x61
+	.4byte	.LASF658
+	.byte	0x6
+	.byte	0xe6
+	.4byte	0x57
+	.4byte	.LLST712
+	.uleb128 0x61
+	.4byte	.LASF656
+	.byte	0x6
+	.byte	0xe6
+	.4byte	0x57
+	.4byte	.LLST713
+	.uleb128 0x61
+	.4byte	.LASF1136
+	.byte	0x6
+	.byte	0xe7
+	.4byte	0x74
+	.4byte	.LLST714
+	.uleb128 0x61
+	.4byte	.LASF1137
+	.byte	0x6
+	.byte	0xe8
+	.4byte	0x74
+	.4byte	.LLST715
+	.uleb128 0x61
+	.4byte	.LASF1138
+	.byte	0x6
+	.byte	0xe9
+	.4byte	0x74
+	.4byte	.LLST716
+	.uleb128 0x61
+	.4byte	.LASF1118
+	.byte	0x6
+	.byte	0xea
+	.4byte	0x5442
+	.4byte	.LLST717
+	.uleb128 0x62
+	.4byte	.LASF1139
+	.byte	0x6
+	.byte	0xf1
+	.uleb128 0x62
+	.4byte	.LASF1140
+	.byte	0x6
+	.byte	0xf5
+	.uleb128 0x63
+	.4byte	.LASF1162
+	.byte	0x6
+	.2byte	0x129
+	.4byte	.L2503
+	.uleb128 0x48
+	.4byte	.LVL2710
+	.4byte	0x5798
+	.uleb128 0x44
+	.4byte	.LVL2718
+	.4byte	0xb17b
+	.4byte	0x5729
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2731
+	.4byte	0x8990
+	.4byte	0x5744
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x91
+	.sleb128 -52
+	.byte	0x6
+	.byte	0x9
+	.byte	0xea
+	.byte	0x24
+	.byte	0x9
+	.byte	0xf4
+	.byte	0x25
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2737
+	.4byte	0x6dbf
+	.4byte	0x575e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2740
+	.4byte	0x59e7
+	.uleb128 0x44
+	.4byte	.LVL2744
+	.4byte	0x103ff
+	.4byte	0x5785
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC49
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -52
+	.byte	0x6
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2747
+	.4byte	0x8565
+	.uleb128 0x48
+	.4byte	.LVL2749
+	.4byte	0x5798
+	.byte	0
+	.uleb128 0x3e
+	.4byte	.LASF1141
+	.byte	0x6
+	.byte	0xd9
+	.4byte	.LFB397
+	.4byte	.LFE397-.LFB397
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x57df
+	.uleb128 0x44
+	.4byte	.LVL896
+	.4byte	0x530b
+	.4byte	0x57c1
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL897
+	.4byte	0x530b
+	.4byte	0x57d5
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.uleb128 0x49
+	.4byte	.LVL898
+	.4byte	0x5b2a
+	.byte	0
+	.uleb128 0x4b
+	.4byte	.LASF1142
+	.byte	0x6
+	.byte	0x6e
+	.4byte	0x8f
+	.4byte	.LFB396
+	.4byte	.LFE396-.LFB396
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x59d2
+	.uleb128 0x40
+	.4byte	.LASF1143
+	.byte	0x6
+	.byte	0x6e
+	.4byte	0x8f
+	.4byte	.LLST718
+	.uleb128 0x41
+	.ascii	"i\000"
+	.byte	0x6
+	.byte	0x70
+	.4byte	0x57
+	.4byte	.LLST719
+	.uleb128 0x61
+	.4byte	.LASF1144
+	.byte	0x6
+	.byte	0x70
+	.4byte	0x57
+	.4byte	.LLST720
+	.uleb128 0x36
+	.4byte	.LASF1145
+	.byte	0x6
+	.byte	0x71
+	.4byte	0x74
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x61
+	.4byte	.LASF1146
+	.byte	0x6
+	.byte	0x72
+	.4byte	0x74
+	.4byte	.LLST721
+	.uleb128 0x36
+	.4byte	.LASF1133
+	.byte	0x6
+	.byte	0x73
+	.4byte	0x35d9
+	.uleb128 0x6
+	.byte	0x3
+	.4byte	g_gc_temp_superblock
+	.byte	0x9f
+	.uleb128 0x61
+	.4byte	.LASF1147
+	.byte	0x6
+	.byte	0x74
+	.4byte	0x3612
+	.4byte	.LLST722
+	.uleb128 0x64
+	.4byte	.LASF1121
+	.4byte	0x59e2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.11365
+	.uleb128 0x44
+	.4byte	.LVL2755
+	.4byte	0x561f
+	.4byte	0x5884
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2756
+	.4byte	0x7759
+	.4byte	0x5897
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2757
+	.4byte	0x8dc2
+	.uleb128 0x48
+	.4byte	.LVL2758
+	.4byte	0x8c64
+	.uleb128 0x48
+	.4byte	.LVL2761
+	.4byte	0x93da
+	.uleb128 0x44
+	.4byte	.LVL2762
+	.4byte	0x103ff
+	.4byte	0x58d8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR234
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xa3
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2763
+	.4byte	0x103ff
+	.4byte	0x58f8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2765
+	.4byte	0x5b4d
+	.4byte	0x590c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x9
+	.byte	0xff
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2766
+	.4byte	0x103ff
+	.4byte	0x5923
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC50
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2767
+	.4byte	0x8540
+	.uleb128 0x48
+	.4byte	.LVL2769
+	.4byte	0x7c46
+	.uleb128 0x48
+	.4byte	.LVL2770
+	.4byte	0x75f4
+	.uleb128 0x44
+	.4byte	.LVL2773
+	.4byte	0x103ff
+	.4byte	0x5964
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR234
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xa8
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2774
+	.4byte	0x103ff
+	.4byte	0x5984
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2775
+	.4byte	0x7a04
+	.4byte	0x599d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2776
+	.4byte	0x8958
+	.uleb128 0x44
+	.4byte	.LVL2778
+	.4byte	0x7a04
+	.4byte	0x59bf
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 4
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2780
+	.4byte	0x5b4d
+	.uleb128 0x48
+	.4byte	.LVL2784
+	.4byte	0x8565
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1a2e
+	.4byte	0x59e2
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x12
+	.byte	0
+	.uleb128 0x4
+	.4byte	0x59d2
+	.uleb128 0x3e
+	.4byte	.LASF1148
+	.byte	0x6
+	.byte	0x53
+	.4byte	.LFB395
+	.4byte	.LFE395-.LFB395
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5a5c
+	.uleb128 0x40
+	.4byte	.LASF1149
+	.byte	0x6
+	.byte	0x53
+	.4byte	0x74
+	.4byte	.LLST267
+	.uleb128 0x40
+	.4byte	.LASF667
+	.byte	0x6
+	.byte	0x53
+	.4byte	0x74
+	.4byte	.LLST268
+	.uleb128 0x3f
+	.ascii	"lpa\000"
+	.byte	0x6
+	.byte	0x53
+	.4byte	0x74
+	.4byte	.LLST269
+	.uleb128 0x61
+	.4byte	.LASF1150
+	.byte	0x6
+	.byte	0x55
+	.4byte	0x57
+	.4byte	.LLST270
+	.uleb128 0x41
+	.ascii	"i\000"
+	.byte	0x6
+	.byte	0x56
+	.4byte	0x57
+	.4byte	.LLST271
+	.uleb128 0x45
+	.4byte	.LVL721
+	.4byte	0x8958
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x8
+	.byte	0x75
+	.sleb128 0
+	.byte	0x9
+	.byte	0xea
+	.byte	0x24
+	.byte	0x9
+	.byte	0xf4
+	.byte	0x25
+	.byte	0
+	.byte	0
+	.uleb128 0x4b
+	.4byte	.LASF1151
+	.byte	0x6
+	.byte	0x48
+	.4byte	0x74
+	.4byte	.LFB394
+	.4byte	.LFE394-.LFB394
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5a92
+	.uleb128 0x3f
+	.ascii	"blk\000"
+	.byte	0x6
+	.byte	0x48
+	.4byte	0x57
+	.4byte	.LLST265
+	.uleb128 0x41
+	.ascii	"i\000"
+	.byte	0x6
+	.byte	0x4a
+	.4byte	0x57
+	.4byte	.LLST266
+	.byte	0
+	.uleb128 0x3e
+	.4byte	.LASF1152
+	.byte	0x6
+	.byte	0x37
+	.4byte	.LFB393
+	.4byte	.LFE393-.LFB393
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5ade
+	.uleb128 0x65
+	.ascii	"req\000"
+	.byte	0x6
+	.byte	0x37
+	.4byte	0x676
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x52
+	.4byte	.LASF1153
+	.byte	0x6
+	.byte	0x37
+	.4byte	0x74
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x41
+	.ascii	"i\000"
+	.byte	0x6
+	.byte	0x39
+	.4byte	0x57
+	.4byte	.LLST263
+	.uleb128 0x61
+	.4byte	.LASF1154
+	.byte	0x6
+	.byte	0x3a
+	.4byte	0x57
+	.4byte	.LLST264
+	.byte	0
+	.uleb128 0x3e
+	.4byte	.LASF1155
+	.byte	0x6
+	.byte	0x28
+	.4byte	.LFB392
+	.4byte	.LFE392-.LFB392
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5b2a
+	.uleb128 0x65
+	.ascii	"req\000"
+	.byte	0x6
+	.byte	0x28
+	.4byte	0x676
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x52
+	.4byte	.LASF1153
+	.byte	0x6
+	.byte	0x28
+	.4byte	0x74
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x41
+	.ascii	"i\000"
+	.byte	0x6
+	.byte	0x2a
+	.4byte	0x57
+	.4byte	.LLST261
+	.uleb128 0x61
+	.4byte	.LASF1154
+	.byte	0x6
+	.byte	0x2b
+	.4byte	0x57
+	.4byte	.LLST262
+	.byte	0
+	.uleb128 0x3e
+	.4byte	.LASF1156
+	.byte	0x6
+	.byte	0x14
+	.4byte	.LFB391
+	.4byte	.LFE391-.LFB391
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5b4d
+	.uleb128 0x41
+	.ascii	"i\000"
+	.byte	0x6
+	.byte	0x16
+	.4byte	0x57
+	.4byte	.LLST260
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1157
+	.byte	0x1
+	.2byte	0xc18
+	.4byte	0x8f
+	.4byte	.LFB390
+	.4byte	.LFE390-.LFB390
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5bfd
+	.uleb128 0x5c
+	.4byte	.LASF1144
+	.byte	0x1
+	.2byte	0xc18
+	.4byte	0x57
+	.4byte	.LLST554
+	.uleb128 0x5d
+	.ascii	"ret\000"
+	.byte	0x1
+	.2byte	0xc1a
+	.4byte	0x8f
+	.4byte	.LLST555
+	.uleb128 0x64
+	.4byte	.LASF1121
+	.4byte	0x5c0d
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.11297
+	.uleb128 0x44
+	.4byte	.LVL1979
+	.4byte	0x103ff
+	.4byte	0x5bb3
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC34
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1983
+	.4byte	0x103ff
+	.4byte	0x5bd3
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR204
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1984
+	.4byte	0x103ff
+	.4byte	0x5bf3
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1987
+	.4byte	0x5c12
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1a2e
+	.4byte	0x5c0d
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x13
+	.byte	0
+	.uleb128 0x4
+	.4byte	0x5bfd
+	.uleb128 0x54
+	.4byte	.LASF1158
+	.byte	0x1
+	.2byte	0xc03
+	.4byte	0x8f
+	.byte	0x1
+	.4byte	0x5c3d
+	.uleb128 0x55
+	.4byte	.LASF1144
+	.byte	0x1
+	.2byte	0xc03
+	.4byte	0x57
+	.uleb128 0x59
+	.4byte	.LASF1121
+	.4byte	0x5c4d
+	.4byte	.LASF1158
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1a2e
+	.4byte	0x5c4d
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0xf
+	.byte	0
+	.uleb128 0x4
+	.4byte	0x5c3d
+	.uleb128 0x5b
+	.4byte	.LASF1159
+	.byte	0x1
+	.2byte	0xbcc
+	.4byte	0x74
+	.4byte	.LFB388
+	.4byte	.LFE388-.LFB388
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5dee
+	.uleb128 0x5c
+	.4byte	.LASF1160
+	.byte	0x1
+	.2byte	0xbcc
+	.4byte	0x35d9
+	.4byte	.LLST559
+	.uleb128 0x5e
+	.4byte	.LASF1116
+	.byte	0x1
+	.2byte	0xbce
+	.4byte	0x57
+	.4byte	.LLST560
+	.uleb128 0x5e
+	.4byte	.LASF1161
+	.byte	0x1
+	.2byte	0xbcf
+	.4byte	0x74
+	.4byte	.LLST561
+	.uleb128 0x64
+	.4byte	.LASF1121
+	.4byte	0x59e2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.11281
+	.uleb128 0x63
+	.4byte	.LASF1163
+	.byte	0x1
+	.2byte	0xbd7
+	.4byte	.L1802
+	.uleb128 0x63
+	.4byte	.LASF1164
+	.byte	0x1
+	.2byte	0xbe6
+	.4byte	.L1805
+	.uleb128 0x44
+	.4byte	.LVL2001
+	.4byte	0x103ff
+	.4byte	0x5cea
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR205
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xbd1
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2002
+	.4byte	0x103ff
+	.4byte	0x5d0a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2003
+	.4byte	0x103ff
+	.4byte	0x5d31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR205
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xbd2
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2004
+	.4byte	0x103ff
+	.4byte	0x5d51
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2005
+	.4byte	0x103ff
+	.4byte	0x5d78
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR205
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xbd3
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2006
+	.4byte	0x103ff
+	.4byte	0x5d98
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2008
+	.4byte	0x5b4d
+	.uleb128 0x48
+	.4byte	.LVL2012
+	.4byte	0x5b4d
+	.uleb128 0x44
+	.4byte	.LVL2013
+	.4byte	0x103ff
+	.4byte	0x5dd1
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR205
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xbff
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2014
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1165
+	.byte	0x1
+	.2byte	0xba2
+	.4byte	0x8f
+	.4byte	.LFB387
+	.4byte	.LFE387-.LFB387
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5edc
+	.uleb128 0x5c
+	.4byte	.LASF1160
+	.byte	0x1
+	.2byte	0xba2
+	.4byte	0x35d9
+	.4byte	.LLST624
+	.uleb128 0x38
+	.4byte	.LASF1144
+	.byte	0x1
+	.2byte	0xba4
+	.4byte	0x57
+	.uleb128 0x1
+	.byte	0x55
+	.uleb128 0x64
+	.4byte	.LASF1121
+	.4byte	0x5eec
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.11275
+	.uleb128 0x44
+	.4byte	.LVL2276
+	.4byte	0x103ff
+	.4byte	0x5e5c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR219
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xba6
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2277
+	.4byte	0x103ff
+	.4byte	0x5e7c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2278
+	.4byte	0x8540
+	.4byte	0x5e90
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2279
+	.4byte	0x5c12
+	.uleb128 0x44
+	.4byte	.LVL2280
+	.4byte	0x5ef1
+	.4byte	0x5ead
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2281
+	.4byte	0x7c46
+	.uleb128 0x44
+	.4byte	.LVL2282
+	.4byte	0x7759
+	.4byte	0x5ec9
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2283
+	.4byte	0x75f4
+	.uleb128 0x48
+	.4byte	.LVL2285
+	.4byte	0x8565
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1a2e
+	.4byte	0x5eec
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x4
+	.4byte	0x5edc
+	.uleb128 0x54
+	.4byte	.LASF1166
+	.byte	0x1
+	.2byte	0xb23
+	.4byte	0x8f
+	.byte	0x1
+	.4byte	0x5f74
+	.uleb128 0x66
+	.ascii	"p\000"
+	.byte	0x1
+	.2byte	0xb23
+	.4byte	0x35d9
+	.uleb128 0x56
+	.4byte	.LASF1167
+	.byte	0x1
+	.2byte	0xb25
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1114
+	.byte	0x1
+	.2byte	0xb26
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1135
+	.byte	0x1
+	.2byte	0xb26
+	.4byte	0x57
+	.uleb128 0x57
+	.ascii	"n\000"
+	.byte	0x1
+	.2byte	0xb26
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1116
+	.byte	0x1
+	.2byte	0xb26
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1168
+	.byte	0x1
+	.2byte	0xb27
+	.4byte	0x8f
+	.uleb128 0x56
+	.4byte	.LASF1169
+	.byte	0x1
+	.2byte	0xb28
+	.4byte	0x57
+	.uleb128 0x58
+	.4byte	.LASF1170
+	.byte	0x1
+	.2byte	0xb2c
+	.uleb128 0x59
+	.4byte	.LASF1121
+	.4byte	0x5f84
+	.4byte	.LASF1166
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1a2e
+	.4byte	0x5f84
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x18
+	.byte	0
+	.uleb128 0x4
+	.4byte	0x5f74
+	.uleb128 0x54
+	.4byte	.LASF1171
+	.byte	0x1
+	.2byte	0xb1a
+	.4byte	0x8f
+	.byte	0x1
+	.4byte	0x5fa7
+	.uleb128 0x55
+	.4byte	.LASF1144
+	.byte	0x1
+	.2byte	0xb1a
+	.4byte	0x57
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1172
+	.byte	0x1
+	.2byte	0xaae
+	.4byte	0x57
+	.4byte	.LFB384
+	.4byte	.LFE384-.LFB384
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6000
+	.uleb128 0x5c
+	.4byte	.LASF542
+	.byte	0x1
+	.2byte	0xaae
+	.4byte	0x57
+	.4byte	.LLST254
+	.uleb128 0x5e
+	.4byte	.LASF993
+	.byte	0x1
+	.2byte	0xab0
+	.4byte	0x57
+	.4byte	.LLST255
+	.uleb128 0x5e
+	.4byte	.LASF1108
+	.byte	0x1
+	.2byte	0xab1
+	.4byte	0x57
+	.4byte	.LLST256
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x1
+	.2byte	0xab2
+	.4byte	0x57
+	.4byte	.LLST257
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1173
+	.byte	0x1
+	.2byte	0xaa5
+	.4byte	0x57
+	.4byte	.LFB383
+	.4byte	.LFE383-.LFB383
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x602b
+	.uleb128 0x5e
+	.4byte	.LASF1174
+	.byte	0x1
+	.2byte	0xaa7
+	.4byte	0x57
+	.4byte	.LLST253
+	.byte	0
+	.uleb128 0x67
+	.4byte	.LASF1175
+	.byte	0x1
+	.2byte	0xa95
+	.4byte	0x8f
+	.4byte	.LFB382
+	.4byte	.LFE382-.LFB382
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x60a3
+	.uleb128 0x5c
+	.4byte	.LASF1144
+	.byte	0x1
+	.2byte	0xa95
+	.4byte	0x57
+	.4byte	.LLST249
+	.uleb128 0x5e
+	.4byte	.LASF1114
+	.byte	0x1
+	.2byte	0xa97
+	.4byte	0x57
+	.4byte	.LLST250
+	.uleb128 0x5e
+	.4byte	.LASF1116
+	.byte	0x1
+	.2byte	0xa97
+	.4byte	0x57
+	.4byte	.LLST251
+	.uleb128 0x5e
+	.4byte	.LASF651
+	.byte	0x1
+	.2byte	0xa98
+	.4byte	0x57
+	.4byte	.LLST252
+	.uleb128 0x44
+	.4byte	.LVL673
+	.4byte	0x89c8
+	.4byte	0x6099
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL674
+	.4byte	0x8d5f
+	.byte	0
+	.uleb128 0x54
+	.4byte	.LASF1176
+	.byte	0x1
+	.2byte	0xa2a
+	.4byte	0x8f
+	.byte	0x1
+	.4byte	0x60cd
+	.uleb128 0x57
+	.ascii	"i\000"
+	.byte	0x1
+	.2byte	0xa2c
+	.4byte	0x8f
+	.uleb128 0x68
+	.uleb128 0x56
+	.4byte	.LASF1133
+	.byte	0x1
+	.2byte	0xa51
+	.4byte	0x35d9
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1177
+	.byte	0x1
+	.2byte	0x9e2
+	.4byte	.LFB380
+	.4byte	.LFE380-.LFB380
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6174
+	.uleb128 0x5c
+	.4byte	.LASF1133
+	.byte	0x1
+	.2byte	0x9e2
+	.4byte	0x35d9
+	.4byte	.LLST564
+	.uleb128 0x38
+	.4byte	.LASF1178
+	.byte	0x1
+	.2byte	0x9e4
+	.4byte	0xc5
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -60
+	.uleb128 0x5e
+	.4byte	.LASF1118
+	.byte	0x1
+	.2byte	0x9e5
+	.4byte	0x5442
+	.4byte	.LLST565
+	.uleb128 0x5e
+	.4byte	.LASF1179
+	.byte	0x1
+	.2byte	0x9e6
+	.4byte	0x8f
+	.4byte	.LLST566
+	.uleb128 0x5e
+	.4byte	.LASF660
+	.byte	0x1
+	.2byte	0x9e7
+	.4byte	0x74
+	.4byte	.LLST567
+	.uleb128 0x44
+	.4byte	.LVL2048
+	.4byte	0x5c52
+	.4byte	0x6146
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2051
+	.4byte	0xae0d
+	.4byte	0x616a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -60
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2052
+	.4byte	0x5b4d
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1180
+	.byte	0x1
+	.2byte	0x9b2
+	.4byte	.LFB379
+	.4byte	.LFE379-.LFB379
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x62f6
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x640
+	.uleb128 0x5e
+	.4byte	.LASF1181
+	.byte	0x1
+	.2byte	0x9b5
+	.4byte	0x74
+	.4byte	.LLST740
+	.uleb128 0x5e
+	.4byte	.LASF1182
+	.byte	0x1
+	.2byte	0x9b6
+	.4byte	0x57
+	.4byte	.LLST741
+	.uleb128 0x6b
+	.4byte	.Ldebug_ranges0+0x658
+	.4byte	0x6269
+	.uleb128 0x38
+	.4byte	.LASF1183
+	.byte	0x1
+	.2byte	0x9c7
+	.4byte	0x2e11
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -80
+	.uleb128 0x5e
+	.4byte	.LASF1184
+	.byte	0x1
+	.2byte	0x9c8
+	.4byte	0x35d9
+	.4byte	.LLST742
+	.uleb128 0x5e
+	.4byte	.LASF1114
+	.byte	0x1
+	.2byte	0x9c9
+	.4byte	0x57
+	.4byte	.LLST743
+	.uleb128 0x5e
+	.4byte	.LASF1116
+	.byte	0x1
+	.2byte	0x9ca
+	.4byte	0x57
+	.4byte	.LLST744
+	.uleb128 0x5e
+	.4byte	.LASF1135
+	.byte	0x1
+	.2byte	0x9cb
+	.4byte	0x57
+	.4byte	.LLST745
+	.uleb128 0x44
+	.4byte	.LVL2945
+	.4byte	0x64a2
+	.4byte	0x621d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -80
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2948
+	.4byte	0x103ff
+	.4byte	0x623a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC56
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2949
+	.4byte	0xac82
+	.4byte	0x6253
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2950
+	.4byte	0xac82
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2933
+	.4byte	0x103ff
+	.4byte	0x6286
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC55
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2934
+	.4byte	0x5521
+	.uleb128 0x48
+	.4byte	.LVL2935
+	.4byte	0x5521
+	.uleb128 0x44
+	.4byte	.LVL2936
+	.4byte	0x5dee
+	.4byte	0x62ac
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2937
+	.4byte	0x5dee
+	.4byte	0x62c3
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR92
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2941
+	.4byte	0x5383
+	.4byte	0x62db
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2943
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC55
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x6c
+	.4byte	.LASF1185
+	.byte	0x1
+	.2byte	0x97f
+	.4byte	.LFB378
+	.4byte	.LFE378-.LFB378
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6367
+	.uleb128 0x44
+	.4byte	.LVL2371
+	.4byte	0x77b1
+	.4byte	0x632a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2372
+	.4byte	0x530b
+	.4byte	0x634a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x200
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2373
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC44
+	.byte	0
+	.byte	0
+	.uleb128 0x60
+	.4byte	.LASF1186
+	.byte	0x1
+	.2byte	0x969
+	.byte	0x1
+	.uleb128 0x67
+	.4byte	.LASF1187
+	.byte	0x1
+	.2byte	0x937
+	.4byte	0x8f
+	.4byte	.LFB376
+	.4byte	.LFE376-.LFB376
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x648d
+	.uleb128 0x5e
+	.4byte	.LASF1188
+	.byte	0x1
+	.2byte	0x939
+	.4byte	0x62
+	.4byte	.LLST298
+	.uleb128 0x5e
+	.4byte	.LASF1114
+	.byte	0x1
+	.2byte	0x939
+	.4byte	0x62
+	.4byte	.LLST299
+	.uleb128 0x5e
+	.4byte	.LASF1116
+	.byte	0x1
+	.2byte	0x939
+	.4byte	0x62
+	.4byte	.LLST300
+	.uleb128 0x5e
+	.4byte	.LASF651
+	.byte	0x1
+	.2byte	0x939
+	.4byte	0x62
+	.4byte	.LLST301
+	.uleb128 0x5e
+	.4byte	.LASF1189
+	.byte	0x1
+	.2byte	0x93a
+	.4byte	0x57
+	.4byte	.LLST302
+	.uleb128 0x5e
+	.4byte	.LASF1190
+	.byte	0x1
+	.2byte	0x93a
+	.4byte	0x57
+	.4byte	.LLST303
+	.uleb128 0x64
+	.4byte	.LASF1121
+	.4byte	0x649d
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.11184
+	.uleb128 0x44
+	.4byte	.LVL866
+	.4byte	0x530b
+	.4byte	0x640d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL873
+	.4byte	0x89c8
+	.4byte	0x6423
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -44
+	.byte	0x94
+	.byte	0x2
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL874
+	.4byte	0x8d5f
+	.uleb128 0x44
+	.4byte	.LVL884
+	.4byte	0x8565
+	.4byte	0x6440
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL890
+	.4byte	0x8540
+	.uleb128 0x44
+	.4byte	.LVL893
+	.4byte	0x103ff
+	.4byte	0x6470
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR137
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x965
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL894
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1a2e
+	.4byte	0x649d
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x11
+	.byte	0
+	.uleb128 0x4
+	.4byte	0x648d
+	.uleb128 0x5b
+	.4byte	.LASF1191
+	.byte	0x1
+	.2byte	0x91b
+	.4byte	0x8f
+	.4byte	.LFB375
+	.4byte	.LFE375-.LFB375
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6558
+	.uleb128 0x6d
+	.ascii	"p\000"
+	.byte	0x1
+	.2byte	0x91b
+	.4byte	0x35d9
+	.4byte	.LLST247
+	.uleb128 0x5e
+	.4byte	.LASF1114
+	.byte	0x1
+	.2byte	0x91d
+	.4byte	0x57
+	.4byte	.LLST248
+	.uleb128 0x38
+	.4byte	.LASF1116
+	.byte	0x1
+	.2byte	0x91d
+	.4byte	0x57
+	.uleb128 0x1
+	.byte	0x5b
+	.uleb128 0x64
+	.4byte	.LASF1121
+	.4byte	0x5c4d
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.11164
+	.uleb128 0x44
+	.4byte	.LVL659
+	.4byte	0x103ff
+	.4byte	0x651e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR101
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x91f
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL660
+	.4byte	0x103ff
+	.4byte	0x653e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL663
+	.4byte	0x89c8
+	.uleb128 0x45
+	.4byte	.LVL665
+	.4byte	0x8d5f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1192
+	.byte	0x1
+	.2byte	0x90e
+	.4byte	0x8f
+	.4byte	.LFB374
+	.4byte	.LFE374-.LFB374
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x65df
+	.uleb128 0x44
+	.4byte	.LVL2804
+	.4byte	0x660d
+	.4byte	0x6586
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2805
+	.4byte	0x65df
+	.4byte	0x659d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR91
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2806
+	.4byte	0x660d
+	.4byte	0x65b1
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2807
+	.4byte	0x65df
+	.4byte	0x65c5
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2808
+	.4byte	0x5616
+	.uleb128 0x45
+	.4byte	.LVL2809
+	.4byte	0x5b4d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x9
+	.byte	0xff
+	.byte	0
+	.byte	0
+	.uleb128 0x6e
+	.4byte	.LASF1194
+	.byte	0x1
+	.2byte	0x8e5
+	.byte	0x1
+	.4byte	0x660d
+	.uleb128 0x55
+	.4byte	.LASF1160
+	.byte	0x1
+	.2byte	0x8e5
+	.4byte	0x35d9
+	.uleb128 0x56
+	.4byte	.LASF1116
+	.byte	0x1
+	.2byte	0x8e7
+	.4byte	0x57
+	.uleb128 0x58
+	.4byte	.LASF1163
+	.byte	0x1
+	.2byte	0x8ef
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1195
+	.byte	0x1
+	.2byte	0x756
+	.4byte	0x8f
+	.4byte	.LFB372
+	.4byte	.LFE372-.LFB372
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6c72
+	.uleb128 0x5c
+	.4byte	.LASF1133
+	.byte	0x1
+	.2byte	0x756
+	.4byte	0x35d9
+	.4byte	.LLST678
+	.uleb128 0x5e
+	.4byte	.LASF1196
+	.byte	0x1
+	.2byte	0x758
+	.4byte	0x57
+	.4byte	.LLST679
+	.uleb128 0x5e
+	.4byte	.LASF1197
+	.byte	0x1
+	.2byte	0x758
+	.4byte	0x57
+	.4byte	.LLST680
+	.uleb128 0x5e
+	.4byte	.LASF1114
+	.byte	0x1
+	.2byte	0x759
+	.4byte	0x57
+	.4byte	.LLST681
+	.uleb128 0x5e
+	.4byte	.LASF658
+	.byte	0x1
+	.2byte	0x759
+	.4byte	0x57
+	.4byte	.LLST682
+	.uleb128 0x5e
+	.4byte	.LASF656
+	.byte	0x1
+	.2byte	0x759
+	.4byte	0x57
+	.4byte	.LLST683
+	.uleb128 0x5e
+	.4byte	.LASF1198
+	.byte	0x1
+	.2byte	0x75a
+	.4byte	0x57
+	.4byte	.LLST684
+	.uleb128 0x5e
+	.4byte	.LASF1199
+	.byte	0x1
+	.2byte	0x75a
+	.4byte	0x57
+	.4byte	.LLST685
+	.uleb128 0x5e
+	.4byte	.LASF1116
+	.byte	0x1
+	.2byte	0x75b
+	.4byte	0x57
+	.4byte	.LLST686
+	.uleb128 0x5e
+	.4byte	.LASF1200
+	.byte	0x1
+	.2byte	0x75c
+	.4byte	0x8f
+	.4byte	.LLST687
+	.uleb128 0x5e
+	.4byte	.LASF1201
+	.byte	0x1
+	.2byte	0x75c
+	.4byte	0x8f
+	.4byte	.LLST688
+	.uleb128 0x5e
+	.4byte	.LASF1135
+	.byte	0x1
+	.2byte	0x75d
+	.4byte	0x57
+	.4byte	.LLST689
+	.uleb128 0x5d
+	.ascii	"n\000"
+	.byte	0x1
+	.2byte	0x75d
+	.4byte	0x57
+	.4byte	.LLST690
+	.uleb128 0x5d
+	.ascii	"req\000"
+	.byte	0x1
+	.2byte	0x75d
+	.4byte	0x57
+	.4byte	.LLST691
+	.uleb128 0x5d
+	.ascii	"lpa\000"
+	.byte	0x1
+	.2byte	0x75e
+	.4byte	0x74
+	.4byte	.LLST692
+	.uleb128 0x38
+	.4byte	.LASF1202
+	.byte	0x1
+	.2byte	0x75e
+	.4byte	0x74
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -44
+	.uleb128 0x38
+	.4byte	.LASF1145
+	.byte	0x1
+	.2byte	0x75e
+	.4byte	0x74
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -40
+	.uleb128 0x38
+	.4byte	.LASF1136
+	.byte	0x1
+	.2byte	0x75e
+	.4byte	0x74
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x5e
+	.4byte	.LASF1150
+	.byte	0x1
+	.2byte	0x75f
+	.4byte	0x57
+	.4byte	.LLST693
+	.uleb128 0x5e
+	.4byte	.LASF1203
+	.byte	0x1
+	.2byte	0x75f
+	.4byte	0x57
+	.4byte	.LLST694
+	.uleb128 0x5e
+	.4byte	.LASF1204
+	.byte	0x1
+	.2byte	0x760
+	.4byte	0x74
+	.4byte	.LLST695
+	.uleb128 0x5e
+	.4byte	.LASF1205
+	.byte	0x1
+	.2byte	0x761
+	.4byte	0x57
+	.4byte	.LLST696
+	.uleb128 0x5e
+	.4byte	.LASF1118
+	.byte	0x1
+	.2byte	0x762
+	.4byte	0x5442
+	.4byte	.LLST697
+	.uleb128 0x5e
+	.4byte	.LASF1206
+	.byte	0x1
+	.2byte	0x763
+	.4byte	0x74
+	.4byte	.LLST698
+	.uleb128 0x64
+	.4byte	.LASF1121
+	.4byte	0x6c82
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.11110
+	.uleb128 0x63
+	.4byte	.LASF1207
+	.byte	0x1
+	.2byte	0x812
+	.4byte	.L2355
+	.uleb128 0x63
+	.4byte	.LASF1140
+	.byte	0x1
+	.2byte	0x81a
+	.4byte	.L2373
+	.uleb128 0x63
+	.4byte	.LASF1208
+	.byte	0x1
+	.2byte	0x8d7
+	.4byte	.LDL3
+	.uleb128 0x58
+	.4byte	.LASF1209
+	.byte	0x1
+	.2byte	0x8e1
+	.uleb128 0x6b
+	.4byte	.Ldebug_ranges0+0x5b8
+	.4byte	0x682e
+	.uleb128 0x5e
+	.4byte	.LASF1210
+	.byte	0x1
+	.2byte	0x7d3
+	.4byte	0x74
+	.4byte	.LLST699
+	.uleb128 0x5e
+	.4byte	.LASF1211
+	.byte	0x1
+	.2byte	0x7d4
+	.4byte	0x74
+	.4byte	.LLST700
+	.uleb128 0x5e
+	.4byte	.LASF1212
+	.byte	0x1
+	.2byte	0x7d5
+	.4byte	0x74
+	.4byte	.LLST701
+	.uleb128 0x45
+	.4byte	.LVL2622
+	.4byte	0xb17b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -56
+	.byte	0x6
+	.byte	0
+	.byte	0
+	.uleb128 0x6b
+	.4byte	.Ldebug_ranges0+0x5d0
+	.4byte	0x6902
+	.uleb128 0x5e
+	.4byte	.LASF1213
+	.byte	0x1
+	.2byte	0x849
+	.4byte	0x74
+	.4byte	.LLST702
+	.uleb128 0x5e
+	.4byte	.LASF1214
+	.byte	0x1
+	.2byte	0x84a
+	.4byte	0x74
+	.4byte	.LLST703
+	.uleb128 0x44
+	.4byte	.LVL2671
+	.4byte	0xb17b
+	.4byte	0x686f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2673
+	.4byte	0x5b4d
+	.uleb128 0x44
+	.4byte	.LVL2680
+	.4byte	0x7a04
+	.4byte	0x6897
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -44
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2682
+	.4byte	0x8913
+	.4byte	0x68ab
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2683
+	.4byte	0x6c87
+	.4byte	0x68bf
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2685
+	.4byte	0xb17b
+	.4byte	0x68d7
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2687
+	.4byte	0x8913
+	.4byte	0x68eb
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x73
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2688
+	.4byte	0x8913
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x6f
+	.4byte	.LBB507
+	.4byte	.LBE507-.LBB507
+	.4byte	0x697e
+	.uleb128 0x5e
+	.4byte	.LASF1215
+	.byte	0x1
+	.2byte	0x888
+	.4byte	0x74
+	.4byte	.LLST704
+	.uleb128 0x5e
+	.4byte	.LASF1214
+	.byte	0x1
+	.2byte	0x889
+	.4byte	0x74
+	.4byte	.LLST705
+	.uleb128 0x44
+	.4byte	.LVL2697
+	.4byte	0xb17b
+	.4byte	0x6947
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2698
+	.4byte	0x8913
+	.4byte	0x6962
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x7d
+	.sleb128 0
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2700
+	.4byte	0x7a04
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -40
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2556
+	.4byte	0x8847
+	.uleb128 0x44
+	.4byte	.LVL2563
+	.4byte	0xb17b
+	.4byte	0x69a2
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -56
+	.byte	0x6
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2570
+	.4byte	0x8990
+	.uleb128 0x44
+	.4byte	.LVL2574
+	.4byte	0x6dbf
+	.4byte	0x69c8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x91
+	.sleb128 -84
+	.byte	0x94
+	.byte	0x2
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2578
+	.4byte	0x8847
+	.4byte	0x69db
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2583
+	.4byte	0x103ff
+	.4byte	0x6a02
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR228
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x78d
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2584
+	.4byte	0x103ff
+	.4byte	0x6a22
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2585
+	.4byte	0x103ff
+	.4byte	0x6a49
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR228
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x78e
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2586
+	.4byte	0x103ff
+	.4byte	0x6a69
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2599
+	.4byte	0x8913
+	.4byte	0x6a83
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x73
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2604
+	.4byte	0x103ff
+	.4byte	0x6a9a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC46
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2632
+	.4byte	0x7653
+	.4byte	0x6ab1
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR124
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2636
+	.4byte	0xb17b
+	.4byte	0x6ace
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -72
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -56
+	.byte	0x6
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2653
+	.4byte	0x8990
+	.4byte	0x6ae8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x8
+	.byte	0x74
+	.sleb128 0
+	.byte	0x9
+	.byte	0xea
+	.byte	0x24
+	.byte	0x9
+	.byte	0xf4
+	.byte	0x25
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2658
+	.4byte	0x5b4d
+	.uleb128 0x44
+	.4byte	.LVL2663
+	.4byte	0x8913
+	.4byte	0x6b0c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x7d
+	.sleb128 0
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2664
+	.4byte	0x103ff
+	.4byte	0x6b33
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR228
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x843
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2665
+	.4byte	0x103ff
+	.4byte	0x6b53
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2667
+	.4byte	0x7a04
+	.4byte	0x6b72
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -40
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2668
+	.4byte	0x8913
+	.4byte	0x6b8d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x7d
+	.sleb128 0
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2674
+	.4byte	0x8958
+	.4byte	0x6ba7
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x8
+	.byte	0x76
+	.sleb128 0
+	.byte	0x9
+	.byte	0xea
+	.byte	0x24
+	.byte	0x9
+	.byte	0xf4
+	.byte	0x25
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2677
+	.4byte	0x103ff
+	.4byte	0x6bce
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR228
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x8a8
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2678
+	.4byte	0x103ff
+	.4byte	0x6bee
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2691
+	.4byte	0x7a04
+	.4byte	0x6c0d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2693
+	.4byte	0x8958
+	.4byte	0x6c27
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x8
+	.byte	0x76
+	.sleb128 0
+	.byte	0x9
+	.byte	0xea
+	.byte	0x24
+	.byte	0x9
+	.byte	0xf4
+	.byte	0x25
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2702
+	.4byte	0x103ff
+	.4byte	0x6c44
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC47
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2705
+	.4byte	0x103ff
+	.4byte	0x6c68
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC48
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0x7d
+	.sleb128 0
+	.byte	0x6
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2706
+	.4byte	0x5b4d
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1a2e
+	.4byte	0x6c82
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x15
+	.byte	0
+	.uleb128 0x4
+	.4byte	0x6c72
+	.uleb128 0x69
+	.4byte	.LASF1216
+	.byte	0x1
+	.2byte	0x73a
+	.4byte	.LFB371
+	.4byte	.LFE371-.LFB371
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6dbf
+	.uleb128 0x6d
+	.ascii	"lpa\000"
+	.byte	0x1
+	.2byte	0x73a
+	.4byte	0x74
+	.4byte	.LLST608
+	.uleb128 0x5c
+	.4byte	.LASF1202
+	.byte	0x1
+	.2byte	0x73a
+	.4byte	0x74
+	.4byte	.LLST609
+	.uleb128 0x5e
+	.4byte	.LASF1150
+	.byte	0x1
+	.2byte	0x73c
+	.4byte	0x57
+	.4byte	.LLST610
+	.uleb128 0x64
+	.4byte	.LASF1121
+	.4byte	0x5c4d
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.11077
+	.uleb128 0x6b
+	.4byte	.Ldebug_ranges0+0x560
+	.4byte	0x6d88
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x1
+	.2byte	0x740
+	.4byte	0x57
+	.4byte	.LLST611
+	.uleb128 0x5e
+	.4byte	.LASF1108
+	.byte	0x1
+	.2byte	0x741
+	.4byte	0x57
+	.4byte	.LLST612
+	.uleb128 0x5e
+	.4byte	.LASF542
+	.byte	0x1
+	.2byte	0x742
+	.4byte	0x57
+	.4byte	.LLST613
+	.uleb128 0x44
+	.4byte	.LVL2229
+	.4byte	0x838c
+	.4byte	0x6d30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR87
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2230
+	.4byte	0x103ff
+	.4byte	0x6d57
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR214
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x746
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2231
+	.4byte	0x103ff
+	.4byte	0x6d77
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2232
+	.4byte	0x8540
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2223
+	.4byte	0x8958
+	.4byte	0x6da3
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9
+	.byte	0xea
+	.byte	0x24
+	.byte	0x9
+	.byte	0xf4
+	.byte	0x25
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2238
+	.4byte	0x7a04
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -28
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1217
+	.byte	0x1
+	.2byte	0x726
+	.4byte	.LFB370
+	.4byte	.LFE370-.LFB370
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6e14
+	.uleb128 0x70
+	.4byte	.LASF1133
+	.byte	0x1
+	.2byte	0x726
+	.4byte	0x35d9
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5c
+	.4byte	.LASF656
+	.byte	0x1
+	.2byte	0x726
+	.4byte	0x57
+	.4byte	.LLST244
+	.uleb128 0x5c
+	.4byte	.LASF658
+	.byte	0x1
+	.2byte	0x726
+	.4byte	0x57
+	.4byte	.LLST245
+	.uleb128 0x5e
+	.4byte	.LASF1114
+	.byte	0x1
+	.2byte	0x728
+	.4byte	0x57
+	.4byte	.LLST246
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1218
+	.byte	0x1
+	.2byte	0x71b
+	.4byte	0x8f
+	.4byte	.LFB369
+	.4byte	.LFE369-.LFB369
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6e4b
+	.uleb128 0x48
+	.4byte	.LVL2546
+	.4byte	0x6e4b
+	.uleb128 0x45
+	.4byte	.LVL2547
+	.4byte	0x6ec3
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR124
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1219
+	.byte	0x1
+	.2byte	0x703
+	.4byte	.LFB368
+	.4byte	.LFE368-.LFB368
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6e95
+	.uleb128 0x5e
+	.4byte	.LASF607
+	.byte	0x1
+	.2byte	0x705
+	.4byte	0x57
+	.4byte	.LLST297
+	.uleb128 0x44
+	.4byte	.LVL851
+	.4byte	0x530b
+	.4byte	0x6e84
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL852
+	.4byte	0x530b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1220
+	.byte	0x1
+	.2byte	0x6f2
+	.4byte	0x8f
+	.4byte	.LFB367
+	.4byte	.LFE367-.LFB367
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6ec3
+	.uleb128 0x45
+	.4byte	.LVL2545
+	.4byte	0x6ec3
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR215
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1221
+	.byte	0x1
+	.2byte	0x659
+	.4byte	0x8f
+	.4byte	.LFB366
+	.4byte	.LFE366-.LFB366
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7105
+	.uleb128 0x5c
+	.4byte	.LASF1222
+	.byte	0x1
+	.2byte	0x659
+	.4byte	0x7105
+	.4byte	.LLST665
+	.uleb128 0x5e
+	.4byte	.LASF1223
+	.byte	0x1
+	.2byte	0x65b
+	.4byte	0x62
+	.4byte	.LLST666
+	.uleb128 0x5e
+	.4byte	.LASF576
+	.byte	0x1
+	.2byte	0x65b
+	.4byte	0x62
+	.4byte	.LLST667
+	.uleb128 0x5e
+	.4byte	.LASF1224
+	.byte	0x1
+	.2byte	0x65c
+	.4byte	0x62
+	.4byte	.LLST668
+	.uleb128 0x5e
+	.4byte	.LASF607
+	.byte	0x1
+	.2byte	0x65d
+	.4byte	0x57
+	.4byte	.LLST669
+	.uleb128 0x5e
+	.4byte	.LASF1225
+	.byte	0x1
+	.2byte	0x65e
+	.4byte	0x13e
+	.4byte	.LLST670
+	.uleb128 0x5e
+	.4byte	.LASF587
+	.byte	0x1
+	.2byte	0x65f
+	.4byte	0x293a
+	.4byte	.LLST671
+	.uleb128 0x5e
+	.4byte	.LASF588
+	.byte	0x1
+	.2byte	0x660
+	.4byte	0x13e
+	.4byte	.LLST672
+	.uleb128 0x5e
+	.4byte	.LASF584
+	.byte	0x1
+	.2byte	0x661
+	.4byte	0x57
+	.4byte	.LLST673
+	.uleb128 0x38
+	.4byte	.LASF1226
+	.byte	0x1
+	.2byte	0x662
+	.4byte	0x57
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -48
+	.uleb128 0x5e
+	.4byte	.LASF1227
+	.byte	0x1
+	.2byte	0x663
+	.4byte	0x710b
+	.4byte	.LLST674
+	.uleb128 0x6b
+	.4byte	.Ldebug_ranges0+0x578
+	.4byte	0x7028
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x1
+	.2byte	0x6b1
+	.4byte	0x74
+	.4byte	.LLST675
+	.uleb128 0x5e
+	.4byte	.LASF383
+	.byte	0x1
+	.2byte	0x6b1
+	.4byte	0x74
+	.4byte	.LLST676
+	.uleb128 0x6b
+	.4byte	.Ldebug_ranges0+0x598
+	.4byte	0x6fed
+	.uleb128 0x5e
+	.4byte	.LASF1228
+	.byte	0x1
+	.2byte	0x6cd
+	.4byte	0x57
+	.4byte	.LLST677
+	.uleb128 0x44
+	.4byte	.LVL2535
+	.4byte	0x103ff
+	.4byte	0x6fe3
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC45
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2538
+	.4byte	0x8671
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2531
+	.4byte	0xb17b
+	.4byte	0x700c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -56
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2540
+	.4byte	0xb17b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -56
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2492
+	.4byte	0x530b
+	.4byte	0x704b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -52
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x4
+	.byte	0x7b
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2496
+	.4byte	0x8847
+	.4byte	0x705e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2504
+	.4byte	0x8113
+	.4byte	0x7072
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2505
+	.4byte	0x80bb
+	.4byte	0x7086
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2506
+	.4byte	0x7f15
+	.4byte	0x709a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2507
+	.4byte	0x7f15
+	.4byte	0x70ae
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2510
+	.4byte	0xb17b
+	.4byte	0x70cc
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2515
+	.4byte	0xb17b
+	.4byte	0x70ea
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2518
+	.4byte	0xb17b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x2885
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x2aa2
+	.uleb128 0x67
+	.4byte	.LASF1229
+	.byte	0x1
+	.2byte	0x5ea
+	.4byte	0x8f
+	.4byte	.LFB365
+	.4byte	.LFE365-.LFB365
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7309
+	.uleb128 0x5e
+	.4byte	.LASF1224
+	.byte	0x1
+	.2byte	0x5ec
+	.4byte	0x62
+	.4byte	.LLST663
+	.uleb128 0x64
+	.4byte	.LASF1121
+	.4byte	0x7319
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.11007
+	.uleb128 0x6f
+	.4byte	.LBB495
+	.4byte	.LBE495-.LBB495
+	.4byte	0x7171
+	.uleb128 0x5e
+	.4byte	.LASF864
+	.byte	0x1
+	.2byte	0x60f
+	.4byte	0x57
+	.4byte	.LLST664
+	.uleb128 0x48
+	.4byte	.LVL2470
+	.4byte	0x52a5
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2458
+	.4byte	0x530b
+	.4byte	0x7184
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2459
+	.4byte	0x8847
+	.4byte	0x7197
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2461
+	.4byte	0x103ff
+	.4byte	0x71be
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR225
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x607
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2462
+	.4byte	0x103ff
+	.4byte	0x71de
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2463
+	.4byte	0x103ff
+	.4byte	0x7205
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR225
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x609
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2464
+	.4byte	0x103ff
+	.4byte	0x7225
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2465
+	.4byte	0x52a5
+	.4byte	0x7242
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR80
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x30
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2466
+	.4byte	0x52a5
+	.uleb128 0x48
+	.4byte	.LVL2467
+	.4byte	0x52a5
+	.uleb128 0x44
+	.4byte	.LVL2472
+	.4byte	0x103ff
+	.4byte	0x727b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR225
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x624
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2473
+	.4byte	0x103ff
+	.4byte	0x729b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2475
+	.4byte	0x64a2
+	.4byte	0x72b2
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR91
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2476
+	.4byte	0x64a2
+	.4byte	0x72c6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2477
+	.4byte	0x64a2
+	.4byte	0x72da
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2478
+	.4byte	0x64a2
+	.4byte	0x72ee
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2480
+	.4byte	0xb17b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1a2e
+	.4byte	0x7319
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0xe
+	.byte	0
+	.uleb128 0x4
+	.4byte	0x7309
+	.uleb128 0x5b
+	.4byte	.LASF1230
+	.byte	0x1
+	.2byte	0x5e5
+	.4byte	0x8f
+	.4byte	.LFB364
+	.4byte	.LFE364-.LFB364
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7349
+	.uleb128 0x5c
+	.4byte	.LASF1231
+	.byte	0x1
+	.2byte	0x5e5
+	.4byte	0x57
+	.4byte	.LLST243
+	.byte	0
+	.uleb128 0x6e
+	.4byte	.LASF1232
+	.byte	0x1
+	.2byte	0x5dd
+	.byte	0x1
+	.4byte	0x736f
+	.uleb128 0x55
+	.4byte	.LASF1231
+	.byte	0x1
+	.2byte	0x5dd
+	.4byte	0x57
+	.uleb128 0x55
+	.4byte	.LASF923
+	.byte	0x1
+	.2byte	0x5dd
+	.4byte	0x8f
+	.byte	0
+	.uleb128 0x5a
+	.4byte	.LASF1233
+	.byte	0x1
+	.2byte	0x5d0
+	.4byte	0x8f
+	.byte	0x1
+	.uleb128 0x5b
+	.4byte	.LASF1234
+	.byte	0x1
+	.2byte	0x4d2
+	.4byte	0x8f
+	.4byte	.LFB361
+	.4byte	.LFE361-.LFB361
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x75df
+	.uleb128 0x5e
+	.4byte	.LASF1114
+	.byte	0x1
+	.2byte	0x4d4
+	.4byte	0x57
+	.4byte	.LLST656
+	.uleb128 0x5e
+	.4byte	.LASF1235
+	.byte	0x1
+	.2byte	0x4d4
+	.4byte	0x57
+	.4byte	.LLST657
+	.uleb128 0x5e
+	.4byte	.LASF664
+	.byte	0x1
+	.2byte	0x4d5
+	.4byte	0x57
+	.4byte	.LLST658
+	.uleb128 0x5e
+	.4byte	.LASF1135
+	.byte	0x1
+	.2byte	0x4d5
+	.4byte	0x57
+	.4byte	.LLST659
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x1
+	.2byte	0x4d6
+	.4byte	0x62
+	.4byte	.LLST660
+	.uleb128 0x5d
+	.ascii	"j\000"
+	.byte	0x1
+	.2byte	0x4d6
+	.4byte	0x62
+	.4byte	.LLST661
+	.uleb128 0x5e
+	.4byte	.LASF1236
+	.byte	0x1
+	.2byte	0x4d7
+	.4byte	0x710b
+	.4byte	.LLST662
+	.uleb128 0x64
+	.4byte	.LASF1121
+	.4byte	0x75ef
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.10953
+	.uleb128 0x44
+	.4byte	.LVL2391
+	.4byte	0x530b
+	.4byte	0x7425
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2392
+	.4byte	0x530b
+	.4byte	0x7439
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2393
+	.4byte	0x530b
+	.4byte	0x744d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2394
+	.4byte	0x530b
+	.4byte	0x7461
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2395
+	.4byte	0x530b
+	.4byte	0x7483
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR206
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x3c
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2398
+	.4byte	0x89c8
+	.4byte	0x7499
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x7d
+	.sleb128 0
+	.byte	0x94
+	.byte	0x2
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2400
+	.4byte	0x8d5f
+	.4byte	0x74af
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -52
+	.byte	0x94
+	.byte	0x2
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2408
+	.4byte	0xb17b
+	.4byte	0x74ce
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2413
+	.4byte	0xb17b
+	.4byte	0x74e6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2419
+	.4byte	0x8737
+	.4byte	0x74fa
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2420
+	.4byte	0x103ff
+	.4byte	0x7521
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR224
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x516
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2421
+	.4byte	0x103ff
+	.4byte	0x7541
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2432
+	.4byte	0x103ff
+	.4byte	0x7568
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR224
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x545
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2433
+	.4byte	0x103ff
+	.4byte	0x7588
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2443
+	.4byte	0x8737
+	.4byte	0x759b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2445
+	.4byte	0x103ff
+	.4byte	0x75c2
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR224
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x5cb
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2446
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1a2e
+	.4byte	0x75ef
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0xd
+	.byte	0
+	.uleb128 0x4
+	.4byte	0x75df
+	.uleb128 0x54
+	.4byte	.LASF1237
+	.byte	0x1
+	.2byte	0x46e
+	.4byte	0x8f
+	.byte	0x1
+	.4byte	0x764d
+	.uleb128 0x56
+	.4byte	.LASF577
+	.byte	0x1
+	.2byte	0x470
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1238
+	.byte	0x1
+	.2byte	0x471
+	.4byte	0x764d
+	.uleb128 0x56
+	.4byte	.LASF1239
+	.byte	0x1
+	.2byte	0x472
+	.4byte	0x57
+	.uleb128 0x58
+	.4byte	.LASF1240
+	.byte	0x1
+	.2byte	0x4a6
+	.uleb128 0x59
+	.4byte	.LASF1121
+	.4byte	0x7319
+	.4byte	.LASF1237
+	.uleb128 0x68
+	.uleb128 0x56
+	.4byte	.LASF864
+	.byte	0x1
+	.2byte	0x4a1
+	.4byte	0x57
+	.byte	0
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x2aea
+	.uleb128 0x69
+	.4byte	.LASF1241
+	.byte	0x1
+	.2byte	0x400
+	.4byte	.LFB359
+	.4byte	.LFE359-.LFB359
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7735
+	.uleb128 0x5c
+	.4byte	.LASF1222
+	.byte	0x1
+	.2byte	0x400
+	.4byte	0x7105
+	.4byte	.LLST650
+	.uleb128 0x5d
+	.ascii	"ppa\000"
+	.byte	0x1
+	.2byte	0x402
+	.4byte	0x74
+	.4byte	.LLST651
+	.uleb128 0x5e
+	.4byte	.LASF595
+	.byte	0x1
+	.2byte	0x403
+	.4byte	0x57
+	.4byte	.LLST652
+	.uleb128 0x5e
+	.4byte	.LASF1225
+	.byte	0x1
+	.2byte	0x404
+	.4byte	0x13e
+	.4byte	.LLST653
+	.uleb128 0x6f
+	.4byte	.LBB494
+	.4byte	.LBE494-.LBB494
+	.4byte	0x76f1
+	.uleb128 0x5e
+	.4byte	.LASF664
+	.byte	0x1
+	.2byte	0x412
+	.4byte	0x74
+	.4byte	.LLST654
+	.uleb128 0x5e
+	.4byte	.LASF1227
+	.byte	0x1
+	.2byte	0x413
+	.4byte	0x710b
+	.4byte	.LLST655
+	.uleb128 0x45
+	.4byte	.LVL2381
+	.4byte	0xb17b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x42
+	.4byte	.LVL2384
+	.4byte	0x7d61
+	.4byte	0x7706
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2386
+	.4byte	0xb17b
+	.4byte	0x7724
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2389
+	.4byte	0x530b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.byte	0
+	.uleb128 0x6e
+	.4byte	.LASF1242
+	.byte	0x1
+	.2byte	0x3f1
+	.byte	0x1
+	.4byte	0x7759
+	.uleb128 0x55
+	.4byte	.LASF669
+	.byte	0x1
+	.2byte	0x3f1
+	.4byte	0x74
+	.uleb128 0x57
+	.ascii	"i\000"
+	.byte	0x1
+	.2byte	0x3f3
+	.4byte	0x57
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1243
+	.byte	0x1
+	.2byte	0x3db
+	.4byte	0x8f
+	.4byte	.LFB357
+	.4byte	.LFE357-.LFB357
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x77b1
+	.uleb128 0x5c
+	.4byte	.LASF1244
+	.byte	0x1
+	.2byte	0x3db
+	.4byte	0x74
+	.4byte	.LLST622
+	.uleb128 0x5e
+	.4byte	.LASF1245
+	.byte	0x1
+	.2byte	0x3dd
+	.4byte	0x74
+	.4byte	.LLST623
+	.uleb128 0x44
+	.4byte	.LVL2270
+	.4byte	0x78f1
+	.4byte	0x77a7
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x40
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2271
+	.4byte	0x6367
+	.byte	0
+	.uleb128 0x67
+	.4byte	.LASF1246
+	.byte	0x1
+	.2byte	0x3b2
+	.4byte	0x74
+	.4byte	.LFB356
+	.4byte	.LFE356-.LFB356
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x78f1
+	.uleb128 0x5c
+	.4byte	.LASF1095
+	.byte	0x1
+	.2byte	0x3b2
+	.4byte	0x74
+	.4byte	.LLST642
+	.uleb128 0x5c
+	.4byte	.LASF1247
+	.byte	0x1
+	.2byte	0x3b2
+	.4byte	0x74
+	.4byte	.LLST643
+	.uleb128 0x5c
+	.4byte	.LASF1248
+	.byte	0x1
+	.2byte	0x3b2
+	.4byte	0x8b6
+	.4byte	.LLST644
+	.uleb128 0x5d
+	.ascii	"len\000"
+	.byte	0x1
+	.2byte	0x3b4
+	.4byte	0x57
+	.4byte	.LLST645
+	.uleb128 0x5e
+	.4byte	.LASF864
+	.byte	0x1
+	.2byte	0x3b4
+	.4byte	0x57
+	.4byte	.LLST646
+	.uleb128 0x5d
+	.ascii	"ppn\000"
+	.byte	0x1
+	.2byte	0x3b5
+	.4byte	0x74
+	.4byte	.LLST647
+	.uleb128 0x5e
+	.4byte	.LASF1249
+	.byte	0x1
+	.2byte	0x3b6
+	.4byte	0x74
+	.4byte	.LLST648
+	.uleb128 0x71
+	.ascii	"req\000"
+	.byte	0x1
+	.2byte	0x3b7
+	.4byte	0xc5
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -68
+	.uleb128 0x5e
+	.4byte	.LASF1250
+	.byte	0x1
+	.2byte	0x3b8
+	.4byte	0x74
+	.4byte	.LLST649
+	.uleb128 0x44
+	.4byte	.LVL2356
+	.4byte	0xb17b
+	.4byte	0x787a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -68
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2358
+	.4byte	0x103ff
+	.4byte	0x789f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC42
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -76
+	.byte	0x6
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2359
+	.4byte	0x7d61
+	.4byte	0x78bc
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR215
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2360
+	.4byte	0x52a5
+	.4byte	0x78d8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x4
+	.byte	0x74
+	.sleb128 0
+	.byte	0x39
+	.byte	0x24
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2366
+	.4byte	0x530b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x4
+	.byte	0x74
+	.sleb128 0
+	.byte	0x39
+	.byte	0x24
+	.byte	0
+	.byte	0
+	.uleb128 0x67
+	.4byte	.LASF1251
+	.byte	0x1
+	.2byte	0x38e
+	.4byte	0x74
+	.4byte	.LFB355
+	.4byte	.LFE355-.LFB355
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7a04
+	.uleb128 0x5c
+	.4byte	.LASF1095
+	.byte	0x1
+	.2byte	0x38e
+	.4byte	0x74
+	.4byte	.LLST614
+	.uleb128 0x5c
+	.4byte	.LASF1247
+	.byte	0x1
+	.2byte	0x38e
+	.4byte	0x74
+	.4byte	.LLST615
+	.uleb128 0x5c
+	.4byte	.LASF1248
+	.byte	0x1
+	.2byte	0x38e
+	.4byte	0x8b6
+	.4byte	.LLST616
+	.uleb128 0x5d
+	.ascii	"len\000"
+	.byte	0x1
+	.2byte	0x390
+	.4byte	0x57
+	.4byte	.LLST617
+	.uleb128 0x5e
+	.4byte	.LASF864
+	.byte	0x1
+	.2byte	0x390
+	.4byte	0x57
+	.4byte	.LLST618
+	.uleb128 0x5d
+	.ascii	"ppn\000"
+	.byte	0x1
+	.2byte	0x391
+	.4byte	0x74
+	.4byte	.LLST619
+	.uleb128 0x5e
+	.4byte	.LASF1249
+	.byte	0x1
+	.2byte	0x392
+	.4byte	0x74
+	.4byte	.LLST620
+	.uleb128 0x71
+	.ascii	"req\000"
+	.byte	0x1
+	.2byte	0x393
+	.4byte	0xc5
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -68
+	.uleb128 0x5e
+	.4byte	.LASF1250
+	.byte	0x1
+	.2byte	0x394
+	.4byte	0x74
+	.4byte	.LLST621
+	.uleb128 0x44
+	.4byte	.LVL2251
+	.4byte	0xb17b
+	.4byte	0x79ba
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -68
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2254
+	.4byte	0x52a5
+	.4byte	0x79d7
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x7d
+	.sleb128 0
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -80
+	.byte	0x6
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2256
+	.4byte	0x7d61
+	.4byte	0x79f4
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR215
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 -1
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2261
+	.4byte	0x530b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1252
+	.byte	0x1
+	.2byte	0x36d
+	.4byte	0x8f
+	.4byte	.LFB354
+	.4byte	.LFE354-.LFB354
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7c31
+	.uleb128 0x6d
+	.ascii	"lpn\000"
+	.byte	0x1
+	.2byte	0x36d
+	.4byte	0x74
+	.4byte	.LLST600
+	.uleb128 0x6d
+	.ascii	"ppn\000"
+	.byte	0x1
+	.2byte	0x36d
+	.4byte	0x13e
+	.4byte	.LLST601
+	.uleb128 0x5c
+	.4byte	.LASF1253
+	.byte	0x1
+	.2byte	0x36d
+	.4byte	0x8f
+	.4byte	.LLST602
+	.uleb128 0x5e
+	.4byte	.LASF1254
+	.byte	0x1
+	.2byte	0x36f
+	.4byte	0x57
+	.4byte	.LLST603
+	.uleb128 0x38
+	.4byte	.LASF1255
+	.byte	0x1
+	.2byte	0x36f
+	.4byte	0x57
+	.uleb128 0x1
+	.byte	0x58
+	.uleb128 0x38
+	.4byte	.LASF1256
+	.byte	0x1
+	.2byte	0x36f
+	.4byte	0x57
+	.uleb128 0x1
+	.byte	0x56
+	.uleb128 0x64
+	.4byte	.LASF1121
+	.4byte	0x7c41
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.10872
+	.uleb128 0x63
+	.4byte	.LASF1257
+	.byte	0x1
+	.2byte	0x378
+	.4byte	.L1988
+	.uleb128 0x72
+	.4byte	0x81e2
+	.4byte	.LBB472
+	.4byte	.Ldebug_ranges0+0x548
+	.byte	0x1
+	.2byte	0x38a
+	.4byte	0x7bd0
+	.uleb128 0x4f
+	.4byte	0x81ff
+	.4byte	.LLST604
+	.uleb128 0x4f
+	.4byte	0x81f3
+	.4byte	.LLST605
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x548
+	.uleb128 0x73
+	.4byte	0x820b
+	.4byte	.LLST606
+	.uleb128 0x73
+	.4byte	0x8217
+	.4byte	.LLST607
+	.uleb128 0x74
+	.4byte	0x8223
+	.uleb128 0x44
+	.4byte	.LVL2204
+	.4byte	0x103ff
+	.4byte	0x7afe
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR213
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x20e
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2205
+	.4byte	0x103ff
+	.4byte	0x7b1e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2207
+	.4byte	0x530b
+	.4byte	0x7b32
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2213
+	.4byte	0xb17b
+	.4byte	0x7b51
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -40
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2217
+	.4byte	0x103ff
+	.4byte	0x7b6e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC40
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2218
+	.4byte	0x7d61
+	.4byte	0x7b8b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR124
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2219
+	.4byte	0x103ff
+	.4byte	0x7bb2
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR213
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x228
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2220
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2197
+	.4byte	0x103ff
+	.4byte	0x7bf7
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR212
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x374
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2198
+	.4byte	0x103ff
+	.4byte	0x7c17
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2201
+	.4byte	0x7c78
+	.uleb128 0x45
+	.4byte	.LVL2203
+	.4byte	0x7d13
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1a2e
+	.4byte	0x7c41
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x8
+	.byte	0
+	.uleb128 0x4
+	.4byte	0x7c31
+	.uleb128 0x5b
+	.4byte	.LASF1258
+	.byte	0x1
+	.2byte	0x35f
+	.4byte	0x8f
+	.4byte	.LFB353
+	.4byte	.LFE353-.LFB353
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7c78
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x1
+	.2byte	0x361
+	.4byte	0x57
+	.4byte	.LLST599
+	.uleb128 0x48
+	.4byte	.LVL2189
+	.4byte	0x7d13
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1259
+	.byte	0x1
+	.2byte	0x337
+	.4byte	0x57
+	.4byte	.LFB352
+	.4byte	.LFE352-.LFB352
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7d13
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x1
+	.2byte	0x339
+	.4byte	0x57
+	.4byte	.LLST236
+	.uleb128 0x5e
+	.4byte	.LASF1260
+	.byte	0x1
+	.2byte	0x33a
+	.4byte	0x57
+	.4byte	.LLST237
+	.uleb128 0x5e
+	.4byte	.LASF1261
+	.byte	0x1
+	.2byte	0x33b
+	.4byte	0x74
+	.4byte	.LLST238
+	.uleb128 0x64
+	.4byte	.LASF1121
+	.4byte	0x6c82
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.10856
+	.uleb128 0x44
+	.4byte	.LVL626
+	.4byte	0x103ff
+	.4byte	0x7cf6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR98
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x35b
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL627
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1262
+	.byte	0x1
+	.2byte	0x32d
+	.4byte	0x8f
+	.4byte	.LFB351
+	.4byte	.LFE351-.LFB351
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7d61
+	.uleb128 0x5c
+	.4byte	.LASF1254
+	.byte	0x1
+	.2byte	0x32d
+	.4byte	0x57
+	.4byte	.LLST597
+	.uleb128 0x5e
+	.4byte	.LASF595
+	.byte	0x1
+	.2byte	0x32f
+	.4byte	0x74
+	.4byte	.LLST598
+	.uleb128 0x45
+	.4byte	.LVL2183
+	.4byte	0x7d61
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR124
+	.byte	0
+	.byte	0
+	.uleb128 0x54
+	.4byte	.LASF1263
+	.byte	0x1
+	.2byte	0x2e5
+	.4byte	0x8f
+	.byte	0x1
+	.4byte	0x7dd0
+	.uleb128 0x55
+	.4byte	.LASF1222
+	.byte	0x1
+	.2byte	0x2e5
+	.4byte	0x7105
+	.uleb128 0x55
+	.4byte	.LASF595
+	.byte	0x1
+	.2byte	0x2e5
+	.4byte	0x74
+	.uleb128 0x55
+	.4byte	.LASF1248
+	.byte	0x1
+	.2byte	0x2e5
+	.4byte	0x13e
+	.uleb128 0x56
+	.4byte	.LASF664
+	.byte	0x1
+	.2byte	0x2e7
+	.4byte	0x74
+	.uleb128 0x56
+	.4byte	.LASF1227
+	.byte	0x1
+	.2byte	0x2e8
+	.4byte	0x710b
+	.uleb128 0x56
+	.4byte	.LASF1239
+	.byte	0x1
+	.2byte	0x2e9
+	.4byte	0x57
+	.uleb128 0x58
+	.4byte	.LASF1264
+	.byte	0x1
+	.2byte	0x2ee
+	.uleb128 0x59
+	.4byte	.LASF1121
+	.4byte	0x5c4d
+	.4byte	.LASF1263
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1265
+	.byte	0x1
+	.2byte	0x2b3
+	.4byte	0x8f
+	.4byte	.LFB349
+	.4byte	.LFE349-.LFB349
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7f00
+	.uleb128 0x5c
+	.4byte	.LASF1222
+	.byte	0x1
+	.2byte	0x2b3
+	.4byte	0x7105
+	.4byte	.LLST586
+	.uleb128 0x56
+	.4byte	.LASF664
+	.byte	0x1
+	.2byte	0x2b5
+	.4byte	0x57
+	.uleb128 0x5e
+	.4byte	.LASF607
+	.byte	0x1
+	.2byte	0x2b5
+	.4byte	0x57
+	.4byte	.LLST587
+	.uleb128 0x5e
+	.4byte	.LASF1266
+	.byte	0x1
+	.2byte	0x2b6
+	.4byte	0x57
+	.4byte	.LLST588
+	.uleb128 0x5e
+	.4byte	.LASF1267
+	.byte	0x1
+	.2byte	0x2b7
+	.4byte	0x293a
+	.4byte	.LLST589
+	.uleb128 0x5e
+	.4byte	.LASF1225
+	.byte	0x1
+	.2byte	0x2b8
+	.4byte	0x13e
+	.4byte	.LLST590
+	.uleb128 0x5e
+	.4byte	.LASF1227
+	.byte	0x1
+	.2byte	0x2b9
+	.4byte	0x710b
+	.4byte	.LLST591
+	.uleb128 0x64
+	.4byte	.LASF1121
+	.4byte	0x7f10
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.10823
+	.uleb128 0x44
+	.4byte	.LVL2141
+	.4byte	0x103ff
+	.4byte	0x7e8c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR210
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x2bf
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2142
+	.4byte	0x103ff
+	.4byte	0x7eac
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2143
+	.4byte	0x858a
+	.uleb128 0x44
+	.4byte	.LVL2149
+	.4byte	0x530b
+	.4byte	0x7ec9
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2154
+	.4byte	0xae0d
+	.4byte	0x7eef
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR199
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2155
+	.4byte	0x7f15
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1a2e
+	.4byte	0x7f10
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x1e
+	.byte	0
+	.uleb128 0x4
+	.4byte	0x7f00
+	.uleb128 0x5b
+	.4byte	.LASF1268
+	.byte	0x1
+	.2byte	0x277
+	.4byte	0x8f
+	.4byte	.LFB348
+	.4byte	.LFE348-.LFB348
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x80bb
+	.uleb128 0x5c
+	.4byte	.LASF1222
+	.byte	0x1
+	.2byte	0x277
+	.4byte	0x7105
+	.4byte	.LLST579
+	.uleb128 0x5e
+	.4byte	.LASF1269
+	.byte	0x1
+	.2byte	0x279
+	.4byte	0x57
+	.4byte	.LLST580
+	.uleb128 0x5e
+	.4byte	.LASF1270
+	.byte	0x1
+	.2byte	0x27a
+	.4byte	0x57
+	.4byte	.LLST581
+	.uleb128 0x5e
+	.4byte	.LASF607
+	.byte	0x1
+	.2byte	0x27b
+	.4byte	0x57
+	.4byte	.LLST582
+	.uleb128 0x5e
+	.4byte	.LASF1271
+	.byte	0x1
+	.2byte	0x27c
+	.4byte	0x57
+	.4byte	.LLST583
+	.uleb128 0x5e
+	.4byte	.LASF1267
+	.byte	0x1
+	.2byte	0x27d
+	.4byte	0x293a
+	.4byte	.LLST584
+	.uleb128 0x38
+	.4byte	.LASF1225
+	.byte	0x1
+	.2byte	0x27e
+	.4byte	0x13e
+	.uleb128 0x1
+	.byte	0x5b
+	.uleb128 0x5e
+	.4byte	.LASF1227
+	.byte	0x1
+	.2byte	0x27f
+	.4byte	0x710b
+	.4byte	.LLST585
+	.uleb128 0x64
+	.4byte	.LASF1121
+	.4byte	0x7319
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.10810
+	.uleb128 0x44
+	.4byte	.LVL2111
+	.4byte	0x8113
+	.4byte	0x7fd0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2115
+	.4byte	0x80bb
+	.4byte	0x7fe4
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2118
+	.4byte	0x8737
+	.4byte	0x7ffd
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2120
+	.4byte	0x80bb
+	.4byte	0x8011
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2126
+	.4byte	0x103ff
+	.4byte	0x8028
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC36
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2131
+	.4byte	0xb17b
+	.4byte	0x8046
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2132
+	.4byte	0x103ff
+	.4byte	0x806d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR209
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x29f
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2133
+	.4byte	0x103ff
+	.4byte	0x808d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2134
+	.4byte	0x103ff
+	.4byte	0x80a4
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC37
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2138
+	.4byte	0x7d61
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x54
+	.4byte	.LASF1272
+	.byte	0x1
+	.2byte	0x258
+	.4byte	0x8f
+	.byte	0x1
+	.4byte	0x80fe
+	.uleb128 0x55
+	.4byte	.LASF1222
+	.byte	0x1
+	.2byte	0x258
+	.4byte	0x7105
+	.uleb128 0x56
+	.4byte	.LASF1271
+	.byte	0x1
+	.2byte	0x25a
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1267
+	.byte	0x1
+	.2byte	0x25b
+	.4byte	0x293a
+	.uleb128 0x59
+	.4byte	.LASF1121
+	.4byte	0x810e
+	.4byte	.LASF1272
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1a2e
+	.4byte	0x810e
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x19
+	.byte	0
+	.uleb128 0x4
+	.4byte	0x80fe
+	.uleb128 0x5b
+	.4byte	.LASF1273
+	.byte	0x1
+	.2byte	0x230
+	.4byte	0x8f
+	.4byte	.LFB346
+	.4byte	.LFE346-.LFB346
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x81e2
+	.uleb128 0x5c
+	.4byte	.LASF1222
+	.byte	0x1
+	.2byte	0x230
+	.4byte	0x7105
+	.4byte	.LLST290
+	.uleb128 0x38
+	.4byte	.LASF1267
+	.byte	0x1
+	.2byte	0x232
+	.4byte	0x293a
+	.uleb128 0x1
+	.byte	0x5a
+	.uleb128 0x5e
+	.4byte	.LASF1225
+	.byte	0x1
+	.2byte	0x233
+	.4byte	0x13e
+	.4byte	.LLST291
+	.uleb128 0x38
+	.4byte	.LASF1274
+	.byte	0x1
+	.2byte	0x234
+	.4byte	0x293a
+	.uleb128 0x1
+	.byte	0x55
+	.uleb128 0x5e
+	.4byte	.LASF664
+	.byte	0x1
+	.2byte	0x235
+	.4byte	0x57
+	.4byte	.LLST292
+	.uleb128 0x5e
+	.4byte	.LASF607
+	.byte	0x1
+	.2byte	0x235
+	.4byte	0x57
+	.4byte	.LLST293
+	.uleb128 0x5e
+	.4byte	.LASF1271
+	.byte	0x1
+	.2byte	0x236
+	.4byte	0x57
+	.4byte	.LLST294
+	.uleb128 0x5e
+	.4byte	.LASF1275
+	.byte	0x1
+	.2byte	0x237
+	.4byte	0x57
+	.4byte	.LLST295
+	.uleb128 0x5e
+	.4byte	.LASF1270
+	.byte	0x1
+	.2byte	0x238
+	.4byte	0x57
+	.4byte	.LLST296
+	.uleb128 0x44
+	.4byte	.LVL831
+	.4byte	0x530b
+	.4byte	0x81d2
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL848
+	.4byte	0x8737
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x75
+	.4byte	.LASF1276
+	.byte	0x1
+	.2byte	0x209
+	.4byte	0x8f
+	.byte	0x1
+	.4byte	0x8231
+	.uleb128 0x55
+	.4byte	.LASF595
+	.byte	0x1
+	.2byte	0x209
+	.4byte	0x57
+	.uleb128 0x55
+	.4byte	.LASF1254
+	.byte	0x1
+	.2byte	0x209
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1227
+	.byte	0x1
+	.2byte	0x20b
+	.4byte	0x710b
+	.uleb128 0x56
+	.4byte	.LASF21
+	.byte	0x1
+	.2byte	0x20c
+	.4byte	0x74
+	.uleb128 0x59
+	.4byte	.LASF1121
+	.4byte	0x5c0d
+	.4byte	.LASF1276
+	.byte	0
+	.uleb128 0x54
+	.4byte	.LASF1277
+	.byte	0x1
+	.2byte	0x1e1
+	.4byte	0x8f
+	.byte	0x1
+	.4byte	0x82b0
+	.uleb128 0x55
+	.4byte	.LASF1188
+	.byte	0x1
+	.2byte	0x1e1
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1278
+	.byte	0x1
+	.2byte	0x1e3
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1279
+	.byte	0x1
+	.2byte	0x1e4
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1280
+	.byte	0x1
+	.2byte	0x1e5
+	.4byte	0x74
+	.uleb128 0x56
+	.4byte	.LASF1281
+	.byte	0x1
+	.2byte	0x1e7
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1282
+	.byte	0x1
+	.2byte	0x1e8
+	.4byte	0x74
+	.uleb128 0x56
+	.4byte	.LASF1283
+	.byte	0x1
+	.2byte	0x1e9
+	.4byte	0x3529
+	.uleb128 0x56
+	.4byte	.LASF1284
+	.byte	0x1
+	.2byte	0x1e9
+	.4byte	0x3529
+	.uleb128 0x59
+	.4byte	.LASF1121
+	.4byte	0x6c82
+	.4byte	.LASF1277
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1285
+	.byte	0x1
+	.2byte	0x1cd
+	.4byte	0x8f
+	.4byte	.LFB343
+	.4byte	.LFE343-.LFB343
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x82fb
+	.uleb128 0x5c
+	.4byte	.LASF542
+	.byte	0x1
+	.2byte	0x1cd
+	.4byte	0x57
+	.4byte	.LLST220
+	.uleb128 0x5e
+	.4byte	.LASF1188
+	.byte	0x1
+	.2byte	0x1cf
+	.4byte	0x57
+	.4byte	.LLST221
+	.uleb128 0x5e
+	.4byte	.LASF1283
+	.byte	0x1
+	.2byte	0x1d0
+	.4byte	0x3529
+	.4byte	.LLST222
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1286
+	.byte	0x1
+	.2byte	0x19a
+	.4byte	0x8f
+	.4byte	.LFB342
+	.4byte	.LFE342-.LFB342
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8386
+	.uleb128 0x5c
+	.4byte	.LASF1287
+	.byte	0x1
+	.2byte	0x19a
+	.4byte	0x8386
+	.4byte	.LLST214
+	.uleb128 0x5c
+	.4byte	.LASF542
+	.byte	0x1
+	.2byte	0x19a
+	.4byte	0x57
+	.4byte	.LLST215
+	.uleb128 0x5c
+	.4byte	.LASF660
+	.byte	0x1
+	.2byte	0x19a
+	.4byte	0x57
+	.4byte	.LLST216
+	.uleb128 0x5e
+	.4byte	.LASF1188
+	.byte	0x1
+	.2byte	0x19c
+	.4byte	0x57
+	.4byte	.LLST217
+	.uleb128 0x5e
+	.4byte	.LASF1283
+	.byte	0x1
+	.2byte	0x19d
+	.4byte	0x3529
+	.4byte	.LLST218
+	.uleb128 0x5e
+	.4byte	.LASF1288
+	.byte	0x1
+	.2byte	0x19e
+	.4byte	0x74
+	.4byte	.LLST219
+	.uleb128 0x45
+	.4byte	.LVL566
+	.4byte	0x838c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x3529
+	.uleb128 0x5b
+	.4byte	.LASF1289
+	.byte	0x1
+	.2byte	0x17d
+	.4byte	0x8f
+	.4byte	.LFB341
+	.4byte	.LFE341-.LFB341
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8437
+	.uleb128 0x5c
+	.4byte	.LASF1287
+	.byte	0x1
+	.2byte	0x17d
+	.4byte	0x8386
+	.4byte	.LLST211
+	.uleb128 0x5c
+	.4byte	.LASF1188
+	.byte	0x1
+	.2byte	0x17d
+	.4byte	0x57
+	.4byte	.LLST212
+	.uleb128 0x38
+	.4byte	.LASF1283
+	.byte	0x1
+	.2byte	0x17f
+	.4byte	0x3529
+	.uleb128 0x1
+	.byte	0x55
+	.uleb128 0x5e
+	.4byte	.LASF1290
+	.byte	0x1
+	.2byte	0x17f
+	.4byte	0x3529
+	.4byte	.LLST213
+	.uleb128 0x64
+	.4byte	.LASF1121
+	.4byte	0x8447
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.10728
+	.uleb128 0x44
+	.4byte	.LVL550
+	.4byte	0x103ff
+	.4byte	0x841a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR90
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x182
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL551
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1a2e
+	.4byte	0x8447
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x10
+	.byte	0
+	.uleb128 0x4
+	.4byte	0x8437
+	.uleb128 0x5b
+	.4byte	.LASF1291
+	.byte	0x1
+	.2byte	0x14c
+	.4byte	0x8f
+	.4byte	.LFB340
+	.4byte	.LFE340-.LFB340
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x84c4
+	.uleb128 0x5c
+	.4byte	.LASF1188
+	.byte	0x1
+	.2byte	0x14c
+	.4byte	0x57
+	.4byte	.LLST206
+	.uleb128 0x5e
+	.4byte	.LASF1283
+	.byte	0x1
+	.2byte	0x14e
+	.4byte	0x3529
+	.4byte	.LLST207
+	.uleb128 0x38
+	.4byte	.LASF1290
+	.byte	0x1
+	.2byte	0x14e
+	.4byte	0x3529
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x38
+	.4byte	.LASF1292
+	.byte	0x1
+	.2byte	0x14f
+	.4byte	0x57
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x5e
+	.4byte	.LASF1293
+	.byte	0x1
+	.2byte	0x150
+	.4byte	0x57
+	.4byte	.LLST208
+	.uleb128 0x5e
+	.4byte	.LASF1294
+	.byte	0x1
+	.2byte	0x151
+	.4byte	0x57
+	.4byte	.LLST209
+	.byte	0
+	.uleb128 0x50
+	.4byte	.LASF1295
+	.byte	0x1
+	.byte	0xff
+	.4byte	0x8f
+	.byte	0x1
+	.4byte	0x8540
+	.uleb128 0x51
+	.4byte	.LASF1188
+	.byte	0x1
+	.byte	0xff
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1283
+	.byte	0x1
+	.2byte	0x101
+	.4byte	0x3529
+	.uleb128 0x56
+	.4byte	.LASF1290
+	.byte	0x1
+	.2byte	0x101
+	.4byte	0x3529
+	.uleb128 0x56
+	.4byte	.LASF1296
+	.byte	0x1
+	.2byte	0x102
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1297
+	.byte	0x1
+	.2byte	0x103
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1280
+	.byte	0x1
+	.2byte	0x104
+	.4byte	0x74
+	.uleb128 0x56
+	.4byte	.LASF1298
+	.byte	0x1
+	.2byte	0x105
+	.4byte	0x74
+	.uleb128 0x56
+	.4byte	.LASF1294
+	.byte	0x1
+	.2byte	0x106
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF602
+	.byte	0x1
+	.2byte	0x107
+	.4byte	0x57
+	.byte	0
+	.uleb128 0x76
+	.4byte	.LASF1299
+	.byte	0x1
+	.byte	0xe0
+	.byte	0x1
+	.4byte	0x8565
+	.uleb128 0x51
+	.4byte	.LASF1188
+	.byte	0x1
+	.byte	0xe0
+	.4byte	0x57
+	.uleb128 0x59
+	.4byte	.LASF1121
+	.4byte	0x8447
+	.4byte	.LASF1299
+	.byte	0
+	.uleb128 0x76
+	.4byte	.LASF1300
+	.byte	0x1
+	.byte	0xd5
+	.byte	0x1
+	.4byte	0x858a
+	.uleb128 0x51
+	.4byte	.LASF1188
+	.byte	0x1
+	.byte	0xd5
+	.4byte	0x57
+	.uleb128 0x59
+	.4byte	.LASF1121
+	.4byte	0x8447
+	.4byte	.LASF1300
+	.byte	0
+	.uleb128 0x4b
+	.4byte	.LASF1301
+	.byte	0x1
+	.byte	0xb5
+	.4byte	0x57
+	.4byte	.LFB336
+	.4byte	.LFE336-.LFB336
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x866b
+	.uleb128 0x41
+	.ascii	"tmp\000"
+	.byte	0x1
+	.byte	0xb7
+	.4byte	0x57
+	.4byte	.LLST194
+	.uleb128 0x77
+	.ascii	"Q\000"
+	.byte	0x1
+	.byte	0xb8
+	.4byte	0x866b
+	.uleb128 0x6
+	.byte	0x3
+	.4byte	gSysFreeQueue
+	.byte	0x9f
+	.uleb128 0x78
+	.4byte	.LASF1302
+	.byte	0x1
+	.byte	0xba
+	.4byte	.L509
+	.uleb128 0x6f
+	.4byte	.LBB254
+	.4byte	.LBE254-.LBB254
+	.4byte	0x862b
+	.uleb128 0x61
+	.4byte	.LASF1303
+	.byte	0x1
+	.byte	0xc0
+	.4byte	0x57
+	.4byte	.LLST195
+	.uleb128 0x44
+	.4byte	.LVL471
+	.4byte	0x8958
+	.4byte	0x85fd
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL473
+	.4byte	0xac82
+	.4byte	0x8616
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL474
+	.4byte	0xac82
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x79
+	.4byte	0x87e2
+	.4byte	.LBB252
+	.4byte	.LBE252-.LBB252
+	.byte	0x1
+	.byte	0xbb
+	.uleb128 0x44
+	.4byte	.LVL476
+	.4byte	0x103ff
+	.4byte	0x8657
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC5
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL478
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC4
+	.byte	0
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x2db6
+	.uleb128 0x4b
+	.4byte	.LASF1304
+	.byte	0x1
+	.byte	0xa0
+	.4byte	0x8f
+	.4byte	.LFB335
+	.4byte	.LFE335-.LFB335
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x86e8
+	.uleb128 0x3f
+	.ascii	"blk\000"
+	.byte	0x1
+	.byte	0xa0
+	.4byte	0x57
+	.4byte	.LLST191
+	.uleb128 0x41
+	.ascii	"ret\000"
+	.byte	0x1
+	.byte	0xa2
+	.4byte	0x8f
+	.4byte	.LLST192
+	.uleb128 0x41
+	.ascii	"i\000"
+	.byte	0x1
+	.byte	0xa3
+	.4byte	0x74
+	.4byte	.LLST193
+	.uleb128 0x77
+	.ascii	"Q\000"
+	.byte	0x1
+	.byte	0xa4
+	.4byte	0x866b
+	.uleb128 0x6
+	.byte	0x3
+	.4byte	gSysFreeQueue
+	.byte	0x9f
+	.uleb128 0x79
+	.4byte	0x87e2
+	.4byte	.LBB250
+	.4byte	.LBE250-.LBB250
+	.byte	0x1
+	.byte	0xa6
+	.uleb128 0x45
+	.4byte	.LVL464
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC3
+	.byte	0
+	.byte	0
+	.uleb128 0x3e
+	.4byte	.LASF1305
+	.byte	0x1
+	.byte	0x75
+	.4byte	.LFB334
+	.4byte	.LFE334-.LFB334
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8737
+	.uleb128 0x36
+	.4byte	.LASF602
+	.byte	0x1
+	.byte	0x77
+	.4byte	0x84
+	.uleb128 0x1
+	.byte	0x55
+	.uleb128 0x41
+	.ascii	"i\000"
+	.byte	0x1
+	.byte	0x78
+	.4byte	0x57
+	.4byte	.LLST189
+	.uleb128 0x41
+	.ascii	"blk\000"
+	.byte	0x1
+	.byte	0x78
+	.4byte	0x57
+	.4byte	.LLST190
+	.uleb128 0x77
+	.ascii	"Q\000"
+	.byte	0x1
+	.byte	0x79
+	.4byte	0x866b
+	.uleb128 0x6
+	.byte	0x3
+	.4byte	gSysFreeQueue
+	.byte	0x9f
+	.byte	0
+	.uleb128 0x3e
+	.4byte	.LASF1306
+	.byte	0x1
+	.byte	0x61
+	.4byte	.LFB333
+	.4byte	.LFE333-.LFB333
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x87d6
+	.uleb128 0x3f
+	.ascii	"blk\000"
+	.byte	0x1
+	.byte	0x61
+	.4byte	0x57
+	.4byte	.LLST185
+	.uleb128 0x40
+	.4byte	.LASF1307
+	.byte	0x1
+	.byte	0x61
+	.4byte	0x57
+	.4byte	.LLST186
+	.uleb128 0x6f
+	.4byte	.LBB248
+	.4byte	.LBE248-.LBB248
+	.4byte	0x87c6
+	.uleb128 0x41
+	.ascii	"Q\000"
+	.byte	0x1
+	.byte	0x66
+	.4byte	0x866b
+	.4byte	.LLST187
+	.uleb128 0x7a
+	.4byte	.LBB249
+	.4byte	.LBE249-.LBB249
+	.uleb128 0x61
+	.4byte	.LASF1303
+	.byte	0x1
+	.byte	0x68
+	.4byte	0x57
+	.4byte	.LLST188
+	.uleb128 0x44
+	.4byte	.LVL445
+	.4byte	0x8958
+	.4byte	0x87b0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL447
+	.4byte	0xac82
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x79
+	.4byte	0x87d6
+	.4byte	.LBB246
+	.4byte	.LBE246-.LBB246
+	.byte	0x1
+	.byte	0x65
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF1308
+	.byte	0x1
+	.byte	0x5c
+	.4byte	0x57
+	.byte	0x1
+	.uleb128 0x46
+	.4byte	.LASF1309
+	.byte	0x1
+	.byte	0x57
+	.4byte	0x57
+	.byte	0x1
+	.uleb128 0x4b
+	.4byte	.LASF1310
+	.byte	0x1
+	.byte	0x4b
+	.4byte	0x57
+	.4byte	.LFB330
+	.4byte	.LFE330-.LFB330
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8847
+	.uleb128 0x3f
+	.ascii	"max\000"
+	.byte	0x1
+	.byte	0x4b
+	.4byte	0x57
+	.4byte	.LLST289
+	.uleb128 0x77
+	.ascii	"Q\000"
+	.byte	0x1
+	.byte	0x4d
+	.4byte	0x866b
+	.uleb128 0x6
+	.byte	0x3
+	.4byte	gSysFreeQueue
+	.byte	0x9f
+	.uleb128 0x45
+	.4byte	.LVL826
+	.4byte	0x530b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR75+8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x800
+	.byte	0
+	.byte	0
+	.uleb128 0x4b
+	.4byte	.LASF1311
+	.byte	0x1
+	.byte	0x2e
+	.4byte	0x8f
+	.4byte	.LFB329
+	.4byte	.LFE329-.LFB329
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8913
+	.uleb128 0x40
+	.4byte	.LASF664
+	.byte	0x1
+	.byte	0x2e
+	.4byte	0x74
+	.4byte	.LLST570
+	.uleb128 0x40
+	.4byte	.LASF1312
+	.byte	0x1
+	.byte	0x2e
+	.4byte	0x8f
+	.4byte	.LLST571
+	.uleb128 0x77
+	.ascii	"req\000"
+	.byte	0x1
+	.byte	0x30
+	.4byte	0xc5
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -124
+	.uleb128 0x41
+	.ascii	"low\000"
+	.byte	0x1
+	.byte	0x31
+	.4byte	0x62
+	.4byte	.LLST572
+	.uleb128 0x36
+	.4byte	.LASF1313
+	.byte	0x1
+	.byte	0x31
+	.4byte	0x62
+	.uleb128 0x1
+	.byte	0x55
+	.uleb128 0x41
+	.ascii	"mid\000"
+	.byte	0x1
+	.byte	0x31
+	.4byte	0x62
+	.4byte	.LLST573
+	.uleb128 0x36
+	.4byte	.LASF278
+	.byte	0x1
+	.byte	0x32
+	.4byte	0x73e
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -88
+	.uleb128 0x61
+	.4byte	.LASF1314
+	.byte	0x1
+	.byte	0x33
+	.4byte	0x57
+	.4byte	.LLST574
+	.uleb128 0x44
+	.4byte	.LVL2070
+	.4byte	0xb17b
+	.4byte	0x88f6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -124
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2075
+	.4byte	0xb17b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -124
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x4b
+	.4byte	.LASF1315
+	.byte	0x1
+	.byte	0x1e
+	.4byte	0x74
+	.4byte	.LFB328
+	.4byte	.LFE328-.LFB328
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8958
+	.uleb128 0x40
+	.4byte	.LASF1316
+	.byte	0x1
+	.byte	0x1e
+	.4byte	0x74
+	.4byte	.LLST183
+	.uleb128 0x52
+	.4byte	.LASF1317
+	.byte	0x1
+	.byte	0x1e
+	.4byte	0x74
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x41
+	.ascii	"ret\000"
+	.byte	0x1
+	.byte	0x20
+	.4byte	0x74
+	.4byte	.LLST184
+	.byte	0
+	.uleb128 0x7b
+	.4byte	.LASF1318
+	.byte	0x1
+	.byte	0x14
+	.4byte	0x57
+	.4byte	.LFB327
+	.4byte	.LFE327-.LFB327
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8990
+	.uleb128 0x40
+	.4byte	.LASF1116
+	.byte	0x1
+	.byte	0x14
+	.4byte	0x57
+	.4byte	.LLST181
+	.uleb128 0x61
+	.4byte	.LASF1235
+	.byte	0x1
+	.byte	0x16
+	.4byte	0x57
+	.4byte	.LLST182
+	.byte	0
+	.uleb128 0x7b
+	.4byte	.LASF1319
+	.byte	0x1
+	.byte	0xc
+	.4byte	0x57
+	.4byte	.LFB326
+	.4byte	.LFE326-.LFB326
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x89c8
+	.uleb128 0x40
+	.4byte	.LASF1116
+	.byte	0x1
+	.byte	0xc
+	.4byte	0x57
+	.4byte	.LLST179
+	.uleb128 0x61
+	.4byte	.LASF1114
+	.byte	0x1
+	.byte	0xe
+	.4byte	0x57
+	.4byte	.LLST180
+	.byte	0
+	.uleb128 0x7b
+	.4byte	.LASF1320
+	.byte	0x1
+	.byte	0x4
+	.4byte	0x57
+	.4byte	.LFB325
+	.4byte	.LFE325-.LFB325
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8a0f
+	.uleb128 0x40
+	.4byte	.LASF1114
+	.byte	0x1
+	.byte	0x4
+	.4byte	0x57
+	.4byte	.LLST176
+	.uleb128 0x40
+	.4byte	.LASF1235
+	.byte	0x1
+	.byte	0x4
+	.4byte	0x57
+	.4byte	.LLST177
+	.uleb128 0x61
+	.4byte	.LASF1108
+	.byte	0x1
+	.byte	0x6
+	.4byte	0x57
+	.4byte	.LLST178
+	.byte	0
+	.uleb128 0x54
+	.4byte	.LASF1321
+	.byte	0x5
+	.2byte	0x168
+	.4byte	0x84
+	.byte	0x1
+	.4byte	0x8a59
+	.uleb128 0x57
+	.ascii	"die\000"
+	.byte	0x5
+	.2byte	0x16a
+	.4byte	0x74
+	.uleb128 0x57
+	.ascii	"blk\000"
+	.byte	0x5
+	.2byte	0x16b
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1322
+	.byte	0x5
+	.2byte	0x16c
+	.4byte	0x74
+	.uleb128 0x56
+	.4byte	.LASF1323
+	.byte	0x5
+	.2byte	0x16e
+	.4byte	0x8a59
+	.uleb128 0x58
+	.4byte	.LASF1324
+	.byte	0x5
+	.2byte	0x187
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x29fa
+	.uleb128 0x4b
+	.4byte	.LASF1325
+	.byte	0x5
+	.byte	0xf8
+	.4byte	0x8f
+	.4byte	.LFB323
+	.4byte	.LFE323-.LFB323
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8baf
+	.uleb128 0x41
+	.ascii	"i\000"
+	.byte	0x5
+	.byte	0xfa
+	.4byte	0x74
+	.4byte	.LLST575
+	.uleb128 0x41
+	.ascii	"blk\000"
+	.byte	0x5
+	.byte	0xfb
+	.4byte	0x57
+	.4byte	.LLST576
+	.uleb128 0x61
+	.4byte	.LASF1224
+	.byte	0x5
+	.byte	0xfd
+	.4byte	0x62
+	.4byte	.LLST577
+	.uleb128 0x61
+	.4byte	.LASF1323
+	.byte	0x5
+	.byte	0xfe
+	.4byte	0x8a59
+	.4byte	.LLST578
+	.uleb128 0x64
+	.4byte	.LASF1121
+	.4byte	0x8bbf
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.10592
+	.uleb128 0x48
+	.4byte	.LVL2082
+	.4byte	0x8bc4
+	.uleb128 0x44
+	.4byte	.LVL2084
+	.4byte	0xb17b
+	.4byte	0x8ae8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2085
+	.4byte	0xb17b
+	.4byte	0x8b06
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2087
+	.4byte	0xb17b
+	.4byte	0x8b24
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2088
+	.4byte	0x8847
+	.4byte	0x8b37
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2090
+	.4byte	0x103ff
+	.4byte	0x8b5e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR208
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x150
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2091
+	.4byte	0x103ff
+	.4byte	0x8b7e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2092
+	.4byte	0x9fb4
+	.uleb128 0x44
+	.4byte	.LVL2100
+	.4byte	0xb17b
+	.4byte	0x8ba5
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2105
+	.4byte	0x52a5
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1a2e
+	.4byte	0x8bbf
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0xa
+	.byte	0
+	.uleb128 0x4
+	.4byte	0x8baf
+	.uleb128 0x3e
+	.4byte	.LASF1326
+	.byte	0x5
+	.byte	0xe0
+	.4byte	.LFB322
+	.4byte	.LFE322-.LFB322
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8bf8
+	.uleb128 0x4d
+	.4byte	.LVL823
+	.4byte	0x530b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR74+12
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x40
+	.byte	0
+	.byte	0
+	.uleb128 0x4b
+	.4byte	.LASF1327
+	.byte	0x5
+	.byte	0xb5
+	.4byte	0x8f
+	.4byte	.LFB321
+	.4byte	.LFE321-.LFB321
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8c64
+	.uleb128 0x77
+	.ascii	"die\000"
+	.byte	0x5
+	.byte	0xb7
+	.4byte	0x74
+	.uleb128 0x1
+	.byte	0x56
+	.uleb128 0x41
+	.ascii	"blk\000"
+	.byte	0x5
+	.byte	0xb8
+	.4byte	0x57
+	.4byte	.LLST568
+	.uleb128 0x61
+	.4byte	.LASF1328
+	.byte	0x5
+	.byte	0xb9
+	.4byte	0x74
+	.4byte	.LLST569
+	.uleb128 0x36
+	.4byte	.LASF1323
+	.byte	0x5
+	.byte	0xba
+	.4byte	0x8a59
+	.uleb128 0x1
+	.byte	0x58
+	.uleb128 0x45
+	.4byte	.LVL2059
+	.4byte	0xb17b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x50
+	.4byte	.LASF1329
+	.byte	0x5
+	.byte	0x67
+	.4byte	0x8f
+	.byte	0x1
+	.4byte	0x8cb3
+	.uleb128 0x7c
+	.ascii	"i\000"
+	.byte	0x5
+	.byte	0x69
+	.4byte	0x8f
+	.uleb128 0x7d
+	.4byte	.LASF1330
+	.byte	0x5
+	.byte	0x6a
+	.4byte	0x8f
+	.uleb128 0x7d
+	.4byte	.LASF1323
+	.byte	0x5
+	.byte	0x6b
+	.4byte	0x8a59
+	.uleb128 0x7d
+	.4byte	.LASF1239
+	.byte	0x5
+	.byte	0x6c
+	.4byte	0x57
+	.uleb128 0x62
+	.4byte	.LASF1331
+	.byte	0x5
+	.byte	0x81
+	.uleb128 0x59
+	.4byte	.LASF1121
+	.4byte	0x7319
+	.4byte	.LASF1329
+	.byte	0
+	.uleb128 0x3e
+	.4byte	.LASF1332
+	.byte	0x5
+	.byte	0x47
+	.4byte	.LFB319
+	.4byte	.LFE319-.LFB319
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8d57
+	.uleb128 0x40
+	.4byte	.LASF1267
+	.byte	0x5
+	.byte	0x47
+	.4byte	0x293a
+	.4byte	.LLST287
+	.uleb128 0x40
+	.4byte	.LASF1333
+	.byte	0x5
+	.byte	0x47
+	.4byte	0x13e
+	.4byte	.LLST288
+	.uleb128 0x7c
+	.ascii	"i\000"
+	.byte	0x5
+	.byte	0x49
+	.4byte	0x74
+	.uleb128 0x64
+	.4byte	.LASF1121
+	.4byte	0x75ef
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.10546
+	.uleb128 0x44
+	.4byte	.LVL819
+	.4byte	0x530b
+	.4byte	0x8d17
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL820
+	.4byte	0x103ff
+	.4byte	0x8d3a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x4f
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL821
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.byte	0
+	.uleb128 0x4a
+	.4byte	.LASF1334
+	.byte	0x5
+	.byte	0x2c
+	.byte	0x1
+	.uleb128 0x7b
+	.4byte	.LASF1335
+	.byte	0x5
+	.byte	0x19
+	.4byte	0x8f
+	.4byte	.LFB317
+	.4byte	.LFE317-.LFB317
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8dc2
+	.uleb128 0x40
+	.4byte	.LASF664
+	.byte	0x5
+	.byte	0x19
+	.4byte	0x57
+	.4byte	.LLST171
+	.uleb128 0x41
+	.ascii	"die\000"
+	.byte	0x5
+	.byte	0x1b
+	.4byte	0x74
+	.4byte	.LLST172
+	.uleb128 0x41
+	.ascii	"i\000"
+	.byte	0x5
+	.byte	0x1c
+	.4byte	0x74
+	.4byte	.LLST173
+	.uleb128 0x61
+	.4byte	.LASF1333
+	.byte	0x5
+	.byte	0x1d
+	.4byte	0x13e
+	.4byte	.LLST174
+	.uleb128 0x61
+	.4byte	.LASF1336
+	.byte	0x5
+	.byte	0x1e
+	.4byte	0x57
+	.4byte	.LLST175
+	.byte	0
+	.uleb128 0x7b
+	.4byte	.LASF1337
+	.byte	0x5
+	.byte	0x4
+	.4byte	0x8f
+	.4byte	.LFB316
+	.4byte	.LFE316-.LFB316
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8e37
+	.uleb128 0x40
+	.4byte	.LASF664
+	.byte	0x5
+	.byte	0x4
+	.4byte	0x57
+	.4byte	.LLST167
+	.uleb128 0x41
+	.ascii	"die\000"
+	.byte	0x5
+	.byte	0x6
+	.4byte	0x74
+	.4byte	.LLST168
+	.uleb128 0x61
+	.4byte	.LASF1333
+	.byte	0x5
+	.byte	0x7
+	.4byte	0x13e
+	.4byte	.LLST169
+	.uleb128 0x61
+	.4byte	.LASF1336
+	.byte	0x5
+	.byte	0x8
+	.4byte	0x57
+	.4byte	.LLST170
+	.uleb128 0x45
+	.4byte	.LVL416
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC2
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x7e
+	.4byte	.LASF1338
+	.byte	0x4
+	.2byte	0x739
+	.4byte	0x74
+	.4byte	.LFB315
+	.4byte	.LFE315-.LFB315
+	.uleb128 0x1
+	.byte	0x9c
+	.uleb128 0x7e
+	.4byte	.LASF1339
+	.byte	0x4
+	.2byte	0x734
+	.4byte	0x74
+	.4byte	.LFB314
+	.4byte	.LFE314-.LFB314
+	.uleb128 0x1
+	.byte	0x9c
+	.uleb128 0x7e
+	.4byte	.LASF1340
+	.byte	0x4
+	.2byte	0x72f
+	.4byte	0x74
+	.4byte	.LFB313
+	.4byte	.LFE313-.LFB313
+	.uleb128 0x1
+	.byte	0x9c
+	.uleb128 0x54
+	.4byte	.LASF1341
+	.byte	0x4
+	.2byte	0x72a
+	.4byte	0x74
+	.byte	0x1
+	.4byte	0x8e97
+	.uleb128 0x66
+	.ascii	"lun\000"
+	.byte	0x4
+	.2byte	0x72a
+	.4byte	0x3a
+	.byte	0
+	.uleb128 0x54
+	.4byte	.LASF1342
+	.byte	0x4
+	.2byte	0x725
+	.4byte	0x74
+	.byte	0x1
+	.4byte	0x8eb5
+	.uleb128 0x66
+	.ascii	"LUN\000"
+	.byte	0x4
+	.2byte	0x725
+	.4byte	0x3a
+	.byte	0
+	.uleb128 0x5a
+	.4byte	.LASF1343
+	.byte	0x4
+	.2byte	0x720
+	.4byte	0x74
+	.byte	0x1
+	.uleb128 0x67
+	.4byte	.LASF1344
+	.byte	0x4
+	.2byte	0x6f2
+	.4byte	0x8f
+	.4byte	.LFB309
+	.4byte	.LFE309-.LFB309
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8fd6
+	.uleb128 0x6d
+	.ascii	"lun\000"
+	.byte	0x4
+	.2byte	0x6f2
+	.4byte	0x19f1
+	.4byte	.LLST635
+	.uleb128 0x5c
+	.4byte	.LASF176
+	.byte	0x4
+	.2byte	0x6f2
+	.4byte	0x1a00
+	.4byte	.LLST636
+	.uleb128 0x5c
+	.4byte	.LASF1345
+	.byte	0x4
+	.2byte	0x6f2
+	.4byte	0x1a00
+	.4byte	.LLST637
+	.uleb128 0x5e
+	.4byte	.LASF864
+	.byte	0x4
+	.2byte	0x6f4
+	.4byte	0x57
+	.4byte	.LLST638
+	.uleb128 0x5d
+	.ascii	"tmp\000"
+	.byte	0x4
+	.2byte	0x6f5
+	.4byte	0x57
+	.4byte	.LLST639
+	.uleb128 0x5d
+	.ascii	"lpa\000"
+	.byte	0x4
+	.2byte	0x6f6
+	.4byte	0x74
+	.4byte	.LLST640
+	.uleb128 0x38
+	.4byte	.LASF1202
+	.byte	0x4
+	.2byte	0x6f7
+	.4byte	0x74
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -32
+	.uleb128 0x38
+	.4byte	.LASF1161
+	.byte	0x4
+	.2byte	0x6f7
+	.4byte	0x74
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -28
+	.uleb128 0x5e
+	.4byte	.LASF1150
+	.byte	0x4
+	.2byte	0x6f8
+	.4byte	0x57
+	.4byte	.LLST641
+	.uleb128 0x48
+	.4byte	.LVL2318
+	.4byte	0x93da
+	.uleb128 0x48
+	.4byte	.LVL2328
+	.4byte	0x7c46
+	.uleb128 0x48
+	.4byte	.LVL2329
+	.4byte	0x75f4
+	.uleb128 0x44
+	.4byte	.LVL2330
+	.4byte	0x7a04
+	.4byte	0x8fa4
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2331
+	.4byte	0x7a04
+	.4byte	0x8fc3
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -28
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2332
+	.4byte	0x8958
+	.uleb128 0x48
+	.4byte	.LVL2333
+	.4byte	0x5b4d
+	.byte	0
+	.uleb128 0x67
+	.4byte	.LASF1346
+	.byte	0x4
+	.2byte	0x639
+	.4byte	0x8f
+	.4byte	.LFB308
+	.4byte	.LFE308-.LFB308
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x93c5
+	.uleb128 0x6d
+	.ascii	"LUN\000"
+	.byte	0x4
+	.2byte	0x639
+	.4byte	0x3a
+	.4byte	.LLST764
+	.uleb128 0x5c
+	.4byte	.LASF1095
+	.byte	0x4
+	.2byte	0x639
+	.4byte	0x74
+	.4byte	.LLST765
+	.uleb128 0x5c
+	.4byte	.LASF1247
+	.byte	0x4
+	.2byte	0x639
+	.4byte	0x74
+	.4byte	.LLST766
+	.uleb128 0x5c
+	.4byte	.LASF1248
+	.byte	0x4
+	.2byte	0x639
+	.4byte	0x8b6
+	.4byte	.LLST767
+	.uleb128 0x5e
+	.4byte	.LASF1118
+	.byte	0x4
+	.2byte	0x63b
+	.4byte	0x5442
+	.4byte	.LLST768
+	.uleb128 0x5d
+	.ascii	"lpa\000"
+	.byte	0x4
+	.2byte	0x63c
+	.4byte	0x74
+	.4byte	.LLST769
+	.uleb128 0x5e
+	.4byte	.LASF1347
+	.byte	0x4
+	.2byte	0x63c
+	.4byte	0x74
+	.4byte	.LLST770
+	.uleb128 0x5e
+	.4byte	.LASF1348
+	.byte	0x4
+	.2byte	0x63c
+	.4byte	0x74
+	.4byte	.LLST771
+	.uleb128 0x38
+	.4byte	.LASF1202
+	.byte	0x4
+	.2byte	0x63d
+	.4byte	0x74
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -72
+	.uleb128 0x5d
+	.ascii	"ppa\000"
+	.byte	0x4
+	.2byte	0x63d
+	.4byte	0x74
+	.4byte	.LLST772
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x4
+	.2byte	0x63e
+	.4byte	0x74
+	.4byte	.LLST773
+	.uleb128 0x5e
+	.4byte	.LASF1349
+	.byte	0x4
+	.2byte	0x63e
+	.4byte	0x74
+	.4byte	.LLST774
+	.uleb128 0x5e
+	.4byte	.LASF1115
+	.byte	0x4
+	.2byte	0x63e
+	.4byte	0x74
+	.4byte	.LLST775
+	.uleb128 0x5e
+	.4byte	.LASF1350
+	.byte	0x4
+	.2byte	0x63f
+	.4byte	0x74
+	.4byte	.LLST776
+	.uleb128 0x5e
+	.4byte	.LASF1351
+	.byte	0x4
+	.2byte	0x63f
+	.4byte	0x74
+	.4byte	.LLST777
+	.uleb128 0x5e
+	.4byte	.LASF1160
+	.byte	0x4
+	.2byte	0x640
+	.4byte	0x35d9
+	.4byte	.LLST778
+	.uleb128 0x64
+	.4byte	.LASF1121
+	.4byte	0x93d5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.10483
+	.uleb128 0x6b
+	.4byte	.Ldebug_ranges0+0x688
+	.4byte	0x9196
+	.uleb128 0x38
+	.4byte	.LASF1352
+	.byte	0x4
+	.2byte	0x6b5
+	.4byte	0xc5
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -68
+	.uleb128 0x44
+	.4byte	.LVL3094
+	.4byte	0xb17b
+	.4byte	0x9135
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -68
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3096
+	.4byte	0x103ff
+	.4byte	0x9152
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC57
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3097
+	.4byte	0x103ff
+	.4byte	0x9179
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR242
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x6c2
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL3098
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3024
+	.4byte	0x78f1
+	.4byte	0x91bb
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x77
+	.sleb128 256
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -100
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -108
+	.byte	0x6
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL3035
+	.4byte	0x93da
+	.uleb128 0x44
+	.4byte	.LVL3037
+	.4byte	0x103ff
+	.4byte	0x91eb
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR242
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x66c
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3038
+	.4byte	0x103ff
+	.4byte	0x920b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL3039
+	.4byte	0x93da
+	.uleb128 0x44
+	.4byte	.LVL3040
+	.4byte	0x5dee
+	.4byte	0x9228
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3043
+	.4byte	0x103ff
+	.4byte	0x924f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR242
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x68d
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3044
+	.4byte	0x103ff
+	.4byte	0x926f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3052
+	.4byte	0x5383
+	.4byte	0x928d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x7
+	.byte	0x91
+	.sleb128 -92
+	.byte	0x6
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3060
+	.4byte	0x52a5
+	.4byte	0x92a9
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -108
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL3066
+	.4byte	0x93da
+	.uleb128 0x44
+	.4byte	.LVL3068
+	.4byte	0x7a04
+	.4byte	0x92d2
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -72
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3069
+	.4byte	0x5c52
+	.4byte	0x92e6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3073
+	.4byte	0x530b
+	.4byte	0x92ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3087
+	.4byte	0x103ff
+	.4byte	0x9326
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR242
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x6d7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3088
+	.4byte	0x103ff
+	.4byte	0x9346
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL3095
+	.4byte	0x52a5
+	.uleb128 0x44
+	.4byte	.LVL3099
+	.4byte	0x530b
+	.4byte	0x9362
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3101
+	.4byte	0x9409
+	.4byte	0x9381
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3102
+	.4byte	0x103ff
+	.4byte	0x93a8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR242
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x6e6
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL3103
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1a2e
+	.4byte	0x93d5
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x9
+	.byte	0
+	.uleb128 0x4
+	.4byte	0x93c5
+	.uleb128 0x5b
+	.4byte	.LASF1353
+	.byte	0x4
+	.2byte	0x630
+	.4byte	0x8f
+	.4byte	.LFB307
+	.4byte	.LFE307-.LFB307
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x9409
+	.uleb128 0x45
+	.4byte	.LVL2313
+	.4byte	0x9409
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1354
+	.byte	0x4
+	.2byte	0x5fa
+	.4byte	.LFB306
+	.4byte	.LFE306-.LFB306
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x9644
+	.uleb128 0x6d
+	.ascii	"req\000"
+	.byte	0x4
+	.2byte	0x5fa
+	.4byte	0x676
+	.4byte	.LLST625
+	.uleb128 0x5c
+	.4byte	.LASF1115
+	.byte	0x4
+	.2byte	0x5fa
+	.4byte	0x74
+	.4byte	.LLST626
+	.uleb128 0x5c
+	.4byte	.LASF1355
+	.byte	0x4
+	.2byte	0x5fa
+	.4byte	0x74
+	.4byte	.LLST627
+	.uleb128 0x5c
+	.4byte	.LASF1160
+	.byte	0x4
+	.2byte	0x5fa
+	.4byte	0x35d9
+	.4byte	.LLST628
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x4
+	.2byte	0x5fc
+	.4byte	0x74
+	.4byte	.LLST629
+	.uleb128 0x71
+	.ascii	"ppa\000"
+	.byte	0x4
+	.2byte	0x5fd
+	.4byte	0x74
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x5e
+	.4byte	.LASF1202
+	.byte	0x4
+	.2byte	0x5fd
+	.4byte	0x74
+	.4byte	.LLST630
+	.uleb128 0x5e
+	.4byte	.LASF1144
+	.byte	0x4
+	.2byte	0x5fe
+	.4byte	0x57
+	.4byte	.LLST631
+	.uleb128 0x5e
+	.4byte	.LASF72
+	.byte	0x4
+	.2byte	0x5ff
+	.4byte	0x57
+	.4byte	.LLST632
+	.uleb128 0x5e
+	.4byte	.LASF1118
+	.byte	0x4
+	.2byte	0x600
+	.4byte	0x5442
+	.4byte	.LLST633
+	.uleb128 0x5e
+	.4byte	.LASF1206
+	.byte	0x4
+	.2byte	0x601
+	.4byte	0x74
+	.4byte	.LLST634
+	.uleb128 0x64
+	.4byte	.LASF1121
+	.4byte	0x9654
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.10457
+	.uleb128 0x44
+	.4byte	.LVL2292
+	.4byte	0xae0d
+	.4byte	0x94fb
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2293
+	.4byte	0x8958
+	.uleb128 0x44
+	.4byte	.LVL2295
+	.4byte	0x5dee
+	.4byte	0x9518
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2296
+	.4byte	0x54b4
+	.uleb128 0x44
+	.4byte	.LVL2297
+	.4byte	0x5c52
+	.4byte	0x9535
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2298
+	.4byte	0xae0d
+	.4byte	0x9554
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2299
+	.4byte	0x103ff
+	.4byte	0x957b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR220
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x61c
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2300
+	.4byte	0x103ff
+	.4byte	0x959b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2301
+	.4byte	0x7a04
+	.4byte	0x95b4
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2303
+	.4byte	0x8958
+	.4byte	0x95cf
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x91
+	.sleb128 -44
+	.byte	0x6
+	.byte	0x9
+	.byte	0xea
+	.byte	0x24
+	.byte	0x9
+	.byte	0xf4
+	.byte	0x25
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2306
+	.4byte	0x103ff
+	.4byte	0x95ec
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC41
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2307
+	.4byte	0x5b4d
+	.4byte	0x9600
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2310
+	.4byte	0x103ff
+	.4byte	0x9627
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR220
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x62d
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2311
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1a2e
+	.4byte	0x9654
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0xc
+	.byte	0
+	.uleb128 0x4
+	.4byte	0x9644
+	.uleb128 0x67
+	.4byte	.LASF1356
+	.byte	0x4
+	.2byte	0x595
+	.4byte	0x8f
+	.4byte	.LFB305
+	.4byte	.LFE305-.LFB305
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x9884
+	.uleb128 0x6d
+	.ascii	"LUN\000"
+	.byte	0x4
+	.2byte	0x595
+	.4byte	0x3a
+	.4byte	.LLST746
+	.uleb128 0x5c
+	.4byte	.LASF1095
+	.byte	0x4
+	.2byte	0x595
+	.4byte	0x74
+	.4byte	.LLST747
+	.uleb128 0x5c
+	.4byte	.LASF1247
+	.byte	0x4
+	.2byte	0x595
+	.4byte	0x74
+	.4byte	.LLST748
+	.uleb128 0x5c
+	.4byte	.LASF1248
+	.byte	0x4
+	.2byte	0x595
+	.4byte	0x8b6
+	.4byte	.LLST749
+	.uleb128 0x5d
+	.ascii	"ret\000"
+	.byte	0x4
+	.2byte	0x597
+	.4byte	0x8f
+	.4byte	.LLST750
+	.uleb128 0x5e
+	.4byte	.LASF1347
+	.byte	0x4
+	.2byte	0x598
+	.4byte	0x74
+	.4byte	.LLST751
+	.uleb128 0x5e
+	.4byte	.LASF1348
+	.byte	0x4
+	.2byte	0x598
+	.4byte	0x74
+	.4byte	.LLST752
+	.uleb128 0x5e
+	.4byte	.LASF1357
+	.byte	0x4
+	.2byte	0x598
+	.4byte	0x74
+	.4byte	.LLST753
+	.uleb128 0x5d
+	.ascii	"lpa\000"
+	.byte	0x4
+	.2byte	0x599
+	.4byte	0x74
+	.4byte	.LLST754
+	.uleb128 0x71
+	.ascii	"ppa\000"
+	.byte	0x4
+	.2byte	0x599
+	.4byte	0x74
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x5d
+	.ascii	"n\000"
+	.byte	0x4
+	.2byte	0x59b
+	.4byte	0x74
+	.4byte	.LLST755
+	.uleb128 0x5e
+	.4byte	.LASF1115
+	.byte	0x4
+	.2byte	0x59b
+	.4byte	0x74
+	.4byte	.LLST756
+	.uleb128 0x5e
+	.4byte	.LASF1349
+	.byte	0x4
+	.2byte	0x59b
+	.4byte	0x74
+	.4byte	.LLST757
+	.uleb128 0x5e
+	.4byte	.LASF1358
+	.byte	0x4
+	.2byte	0x59c
+	.4byte	0x74
+	.4byte	.LLST758
+	.uleb128 0x5e
+	.4byte	.LASF1359
+	.byte	0x4
+	.2byte	0x59c
+	.4byte	0x74
+	.4byte	.LLST759
+	.uleb128 0x5e
+	.4byte	.LASF1360
+	.byte	0x4
+	.2byte	0x59d
+	.4byte	0x74
+	.4byte	.LLST760
+	.uleb128 0x5e
+	.4byte	.LASF1361
+	.byte	0x4
+	.2byte	0x59e
+	.4byte	0x74
+	.4byte	.LLST761
+	.uleb128 0x6b
+	.4byte	.Ldebug_ranges0+0x670
+	.4byte	0x97e4
+	.uleb128 0x5e
+	.4byte	.LASF1181
+	.byte	0x4
+	.2byte	0x5e2
+	.4byte	0x74
+	.4byte	.LLST762
+	.uleb128 0x5e
+	.4byte	.LASF1108
+	.byte	0x4
+	.2byte	0x5e3
+	.4byte	0x57
+	.4byte	.LLST763
+	.uleb128 0x48
+	.4byte	.LVL2991
+	.4byte	0x8958
+	.uleb128 0x44
+	.4byte	.LVL2993
+	.4byte	0x5521
+	.4byte	0x97c6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2997
+	.4byte	0x98a8
+	.uleb128 0x45
+	.4byte	.LVL3017
+	.4byte	0x5383
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2964
+	.4byte	0x77b1
+	.4byte	0x9807
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x76
+	.sleb128 256
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -68
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2970
+	.4byte	0x93da
+	.uleb128 0x44
+	.4byte	.LVL2979
+	.4byte	0x5383
+	.4byte	0x982b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -92
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2981
+	.4byte	0x7a04
+	.4byte	0x984a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2987
+	.4byte	0xb17b
+	.4byte	0x9864
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2989
+	.4byte	0x52a5
+	.uleb128 0x45
+	.4byte	.LVL3003
+	.4byte	0x530b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x200
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1362
+	.byte	0x4
+	.2byte	0x3f6
+	.4byte	0x8f
+	.4byte	.LFB304
+	.4byte	.LFE304-.LFB304
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x98a8
+	.uleb128 0x48
+	.4byte	.LVL2342
+	.4byte	0x98a8
+	.byte	0
+	.uleb128 0x5a
+	.4byte	.LASF1363
+	.byte	0x4
+	.2byte	0x3ea
+	.4byte	0x8f
+	.byte	0x1
+	.uleb128 0x54
+	.4byte	.LASF1364
+	.byte	0x4
+	.2byte	0x392
+	.4byte	0x8f
+	.byte	0x1
+	.4byte	0x98ec
+	.uleb128 0x55
+	.4byte	.LASF1365
+	.byte	0x4
+	.2byte	0x392
+	.4byte	0x98ec
+	.uleb128 0x59
+	.4byte	.LASF1121
+	.4byte	0x9902
+	.4byte	.LASF1364
+	.uleb128 0x68
+	.uleb128 0x57
+	.ascii	"i\000"
+	.byte	0x4
+	.2byte	0x3c8
+	.4byte	0x74
+	.byte	0
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x1e1
+	.uleb128 0x6
+	.4byte	0x1a2e
+	.4byte	0x9902
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x7
+	.byte	0
+	.uleb128 0x4
+	.4byte	0x98f2
+	.uleb128 0x67
+	.4byte	.LASF1366
+	.byte	0x4
+	.2byte	0x2fe
+	.4byte	0x8f
+	.4byte	.LFB301
+	.4byte	.LFE301-.LFB301
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x9a85
+	.uleb128 0x5e
+	.4byte	.LASF1235
+	.byte	0x4
+	.2byte	0x300
+	.4byte	0x57
+	.4byte	.LLST798
+	.uleb128 0x5e
+	.4byte	.LASF1367
+	.byte	0x4
+	.2byte	0x300
+	.4byte	0x57
+	.4byte	.LLST799
+	.uleb128 0x5e
+	.4byte	.LASF1368
+	.byte	0x4
+	.2byte	0x301
+	.4byte	0x57
+	.4byte	.LLST800
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x4
+	.2byte	0x302
+	.4byte	0x57
+	.4byte	.LLST801
+	.uleb128 0x63
+	.4byte	.LASF1369
+	.byte	0x4
+	.2byte	0x365
+	.4byte	.L2888
+	.uleb128 0x63
+	.4byte	.LASF1370
+	.byte	0x4
+	.2byte	0x375
+	.4byte	.L2890
+	.uleb128 0x44
+	.4byte	.LVL3181
+	.4byte	0x530b
+	.4byte	0x998b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3182
+	.4byte	0x530b
+	.4byte	0x999f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL3183
+	.4byte	0x87ee
+	.uleb128 0x48
+	.4byte	.LVL3184
+	.4byte	0x8a5f
+	.uleb128 0x48
+	.4byte	.LVL3185
+	.4byte	0x8a0f
+	.uleb128 0x48
+	.4byte	.LVL3201
+	.4byte	0x8c64
+	.uleb128 0x44
+	.4byte	.LVL3202
+	.4byte	0x530b
+	.4byte	0x99d6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3203
+	.4byte	0x530b
+	.4byte	0x99ea
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3204
+	.4byte	0x64a2
+	.4byte	0x99fe
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3208
+	.4byte	0x9a85
+	.4byte	0x9a17
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL3215
+	.4byte	0x9fb4
+	.uleb128 0x48
+	.4byte	.LVL3216
+	.4byte	0x87ee
+	.uleb128 0x44
+	.4byte	.LVL3219
+	.4byte	0x9a85
+	.4byte	0x9a42
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 -1
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3222
+	.4byte	0x9a85
+	.4byte	0x9a55
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3226
+	.4byte	0x64a2
+	.4byte	0x9a69
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL3227
+	.4byte	0x858a
+	.uleb128 0x48
+	.4byte	.LVL3228
+	.4byte	0x75f4
+	.uleb128 0x48
+	.4byte	.LVL3229
+	.4byte	0x60a3
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1371
+	.byte	0x4
+	.2byte	0x28d
+	.4byte	0x8f
+	.4byte	.LFB300
+	.4byte	.LFE300-.LFB300
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x9c4c
+	.uleb128 0x5c
+	.4byte	.LASF1235
+	.byte	0x4
+	.2byte	0x28d
+	.4byte	0x57
+	.4byte	.LLST528
+	.uleb128 0x5c
+	.4byte	.LASF1372
+	.byte	0x4
+	.2byte	0x28d
+	.4byte	0x3a
+	.4byte	.LLST529
+	.uleb128 0x5e
+	.4byte	.LASF1367
+	.byte	0x4
+	.2byte	0x28f
+	.4byte	0x57
+	.4byte	.LLST530
+	.uleb128 0x5e
+	.4byte	.LASF1135
+	.byte	0x4
+	.2byte	0x28f
+	.4byte	0x57
+	.4byte	.LLST531
+	.uleb128 0x5e
+	.4byte	.LASF1114
+	.byte	0x4
+	.2byte	0x290
+	.4byte	0x57
+	.4byte	.LLST532
+	.uleb128 0x5e
+	.4byte	.LASF664
+	.byte	0x4
+	.2byte	0x290
+	.4byte	0x57
+	.4byte	.LLST533
+	.uleb128 0x5e
+	.4byte	.LASF1373
+	.byte	0x4
+	.2byte	0x291
+	.4byte	0x57
+	.4byte	.LLST534
+	.uleb128 0x5e
+	.4byte	.LASF1374
+	.byte	0x4
+	.2byte	0x292
+	.4byte	0x57
+	.4byte	.LLST535
+	.uleb128 0x5e
+	.4byte	.LASF1375
+	.byte	0x4
+	.2byte	0x293
+	.4byte	0x57
+	.4byte	.LLST536
+	.uleb128 0x5e
+	.4byte	.LASF1376
+	.byte	0x4
+	.2byte	0x294
+	.4byte	0x57
+	.4byte	.LLST537
+	.uleb128 0x5e
+	.4byte	.LASF1377
+	.byte	0x4
+	.2byte	0x295
+	.4byte	0x3a
+	.4byte	.LLST538
+	.uleb128 0x63
+	.4byte	.LASF1378
+	.byte	0x4
+	.2byte	0x2cd
+	.4byte	.L1632
+	.uleb128 0x44
+	.4byte	.LVL1823
+	.4byte	0xac82
+	.4byte	0x9b75
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1830
+	.4byte	0xae0d
+	.4byte	0x9b94
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1837
+	.4byte	0xac82
+	.4byte	0x9bae
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1839
+	.4byte	0x89c8
+	.4byte	0x9bc4
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -48
+	.byte	0x94
+	.byte	0x2
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1841
+	.4byte	0x9c4c
+	.4byte	0x9bd8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1842
+	.4byte	0x8d5f
+	.4byte	0x9bec
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1853
+	.4byte	0x8dc2
+	.uleb128 0x44
+	.4byte	.LVL1858
+	.4byte	0x89c8
+	.4byte	0x9c0b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -48
+	.byte	0x94
+	.byte	0x2
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1860
+	.4byte	0x9c4c
+	.4byte	0x9c1f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1861
+	.4byte	0x8d5f
+	.4byte	0x9c33
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1869
+	.4byte	0x8dc2
+	.uleb128 0x45
+	.4byte	.LVL1872
+	.4byte	0x8737
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x54
+	.4byte	.LASF1379
+	.byte	0x4
+	.2byte	0x27f
+	.4byte	0x8f
+	.byte	0x1
+	.4byte	0x9c76
+	.uleb128 0x55
+	.4byte	.LASF664
+	.byte	0x4
+	.2byte	0x27f
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1380
+	.byte	0x4
+	.2byte	0x281
+	.4byte	0x57
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1381
+	.byte	0x4
+	.2byte	0x265
+	.4byte	0x8f
+	.4byte	.LFB298
+	.4byte	.LFE298-.LFB298
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x9d26
+	.uleb128 0x44
+	.4byte	.LVL859
+	.4byte	0x530b
+	.4byte	0x9ca4
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL860
+	.4byte	0x530b
+	.4byte	0x9cb8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL861
+	.4byte	0x530b
+	.4byte	0x9ccc
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL862
+	.4byte	0x530b
+	.4byte	0x9cef
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR80
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL863
+	.4byte	0x530b
+	.4byte	0x9d13
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR135
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x200
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL864
+	.4byte	0x5b2a
+	.uleb128 0x48
+	.4byte	.LVL865
+	.4byte	0x6e4b
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1382
+	.byte	0x4
+	.2byte	0x162
+	.4byte	0x8f
+	.4byte	.LFB297
+	.4byte	.LFE297-.LFB297
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x9f4a
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x4
+	.2byte	0x164
+	.4byte	0x74
+	.4byte	.LLST429
+	.uleb128 0x5e
+	.4byte	.LASF1383
+	.byte	0x4
+	.2byte	0x165
+	.4byte	0x74
+	.4byte	.LLST430
+	.uleb128 0x48
+	.4byte	.LVL1320
+	.4byte	0x5194
+	.uleb128 0x48
+	.4byte	.LVL1321
+	.4byte	0x5194
+	.uleb128 0x44
+	.4byte	.LVL1323
+	.4byte	0x5194
+	.4byte	0x9d84
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1324
+	.4byte	0x5194
+	.4byte	0x9d98
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1325
+	.4byte	0x5194
+	.4byte	0x9dac
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1326
+	.4byte	0x5194
+	.4byte	0x9dc0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1327
+	.4byte	0x5194
+	.4byte	0x9dd4
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1329
+	.4byte	0x5194
+	.4byte	0x9de8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1330
+	.4byte	0x5194
+	.4byte	0x9dfc
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1331
+	.4byte	0x5194
+	.4byte	0x9e10
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1332
+	.4byte	0x5194
+	.uleb128 0x44
+	.4byte	.LVL1333
+	.4byte	0x5194
+	.4byte	0x9e2d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1334
+	.4byte	0x5194
+	.4byte	0x9e41
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1335
+	.4byte	0x5194
+	.uleb128 0x44
+	.4byte	.LVL1338
+	.4byte	0x5194
+	.4byte	0x9e5e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1340
+	.4byte	0x5194
+	.uleb128 0x48
+	.4byte	.LVL1341
+	.4byte	0x5194
+	.uleb128 0x48
+	.4byte	.LVL1342
+	.4byte	0x5194
+	.uleb128 0x48
+	.4byte	.LVL1343
+	.4byte	0x5194
+	.uleb128 0x48
+	.4byte	.LVL1346
+	.4byte	0x5194
+	.uleb128 0x44
+	.4byte	.LVL1349
+	.4byte	0x5194
+	.4byte	0x9e9f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1350
+	.4byte	0x5194
+	.4byte	0x9eb3
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1352
+	.4byte	0x5194
+	.uleb128 0x48
+	.4byte	.LVL1353
+	.4byte	0x5194
+	.uleb128 0x48
+	.4byte	.LVL1354
+	.4byte	0x5194
+	.uleb128 0x48
+	.4byte	.LVL1355
+	.4byte	0x5194
+	.uleb128 0x48
+	.4byte	.LVL1356
+	.4byte	0x5194
+	.uleb128 0x44
+	.4byte	.LVL1357
+	.4byte	0x530b
+	.4byte	0x9ef4
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1359
+	.4byte	0x5194
+	.4byte	0x9f08
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1360
+	.4byte	0x5194
+	.4byte	0x9f1c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1364
+	.4byte	0x5194
+	.uleb128 0x48
+	.4byte	.LVL1367
+	.4byte	0x5194
+	.uleb128 0x48
+	.4byte	.LVL1370
+	.4byte	0x5194
+	.uleb128 0x48
+	.4byte	.LVL1373
+	.4byte	0x5194
+	.uleb128 0x48
+	.4byte	.LVL1377
+	.4byte	0x5194
+	.byte	0
+	.uleb128 0x7b
+	.4byte	.LASF1384
+	.byte	0x4
+	.byte	0xc7
+	.4byte	0x8f
+	.4byte	.LFB296
+	.4byte	.LFE296-.LFB296
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x9fb4
+	.uleb128 0x40
+	.4byte	.LASF1365
+	.byte	0x4
+	.byte	0xc7
+	.4byte	0x98ec
+	.4byte	.LLST162
+	.uleb128 0x41
+	.ascii	"i\000"
+	.byte	0x4
+	.byte	0xc9
+	.4byte	0x74
+	.4byte	.LLST163
+	.uleb128 0x41
+	.ascii	"j\000"
+	.byte	0x4
+	.byte	0xc9
+	.4byte	0x74
+	.4byte	.LLST164
+	.uleb128 0x48
+	.4byte	.LVL394
+	.4byte	0xa000
+	.uleb128 0x44
+	.4byte	.LVL395
+	.4byte	0xa000
+	.4byte	0x9faa
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -48
+	.byte	0x6
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL399
+	.4byte	0x9fb4
+	.byte	0
+	.uleb128 0x4b
+	.4byte	.LASF1385
+	.byte	0x4
+	.byte	0xb5
+	.4byte	0x8f
+	.4byte	.LFB295
+	.4byte	.LFE295-.LFB295
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x9fdd
+	.uleb128 0x40
+	.4byte	.LASF1386
+	.byte	0x4
+	.byte	0xb5
+	.4byte	0x57
+	.4byte	.LLST161
+	.byte	0
+	.uleb128 0x3e
+	.4byte	.LASF1387
+	.byte	0x4
+	.byte	0xaf
+	.4byte	.LFB294
+	.4byte	.LFE294-.LFB294
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xa000
+	.uleb128 0x52
+	.4byte	.LASF1388
+	.byte	0x4
+	.byte	0xaf
+	.4byte	0x74
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0
+	.uleb128 0x4b
+	.4byte	.LASF1389
+	.byte	0x4
+	.byte	0x8f
+	.4byte	0x57
+	.4byte	.LFB293
+	.4byte	.LFE293-.LFB293
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xa045
+	.uleb128 0x3f
+	.ascii	"num\000"
+	.byte	0x4
+	.byte	0x8f
+	.4byte	0x74
+	.4byte	.LLST158
+	.uleb128 0x41
+	.ascii	"i\000"
+	.byte	0x4
+	.byte	0x91
+	.4byte	0x57
+	.4byte	.LLST159
+	.uleb128 0x61
+	.4byte	.LASF1390
+	.byte	0x4
+	.byte	0x92
+	.4byte	0x74
+	.4byte	.LLST160
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1391
+	.byte	0x3
+	.2byte	0x319
+	.4byte	0x74
+	.4byte	.LFB292
+	.4byte	.LFE292-.LFB292
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xa335
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x3
+	.2byte	0x319
+	.4byte	0x3a
+	.4byte	.LLST319
+	.uleb128 0x6d
+	.ascii	"dir\000"
+	.byte	0x3
+	.2byte	0x319
+	.4byte	0x3a
+	.4byte	.LLST320
+	.uleb128 0x5c
+	.4byte	.LASF1393
+	.byte	0x3
+	.2byte	0x319
+	.4byte	0x3a
+	.4byte	.LLST321
+	.uleb128 0x5c
+	.4byte	.LASF17
+	.byte	0x3
+	.2byte	0x319
+	.4byte	0x8b6
+	.4byte	.LLST322
+	.uleb128 0x5c
+	.4byte	.LASF18
+	.byte	0x3
+	.2byte	0x319
+	.4byte	0x8b6
+	.4byte	.LLST323
+	.uleb128 0x5e
+	.4byte	.LASF15
+	.byte	0x3
+	.2byte	0x31b
+	.4byte	0x74
+	.4byte	.LLST324
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x3
+	.2byte	0x31c
+	.4byte	0x74
+	.4byte	.LLST325
+	.uleb128 0x38
+	.4byte	.LASF271
+	.byte	0x3
+	.2byte	0x31d
+	.4byte	0x73e
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -96
+	.uleb128 0x38
+	.4byte	.LASF1394
+	.byte	0x3
+	.2byte	0x31e
+	.4byte	0x139d
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -100
+	.uleb128 0x5e
+	.4byte	.LASF1395
+	.byte	0x3
+	.2byte	0x31f
+	.4byte	0x74
+	.4byte	.LLST326
+	.uleb128 0x38
+	.4byte	.LASF20
+	.byte	0x3
+	.2byte	0x320
+	.4byte	0x180a
+	.uleb128 0x1
+	.byte	0x55
+	.uleb128 0x6b
+	.4byte	.Ldebug_ranges0+0x220
+	.4byte	0xa145
+	.uleb128 0x5e
+	.4byte	.LASF1396
+	.byte	0x3
+	.2byte	0x331
+	.4byte	0x74
+	.4byte	.LLST327
+	.uleb128 0x5e
+	.4byte	.LASF1397
+	.byte	0x3
+	.2byte	0x332
+	.4byte	0x74
+	.4byte	.LLST328
+	.uleb128 0x5e
+	.4byte	.LASF1398
+	.byte	0x3
+	.2byte	0x333
+	.4byte	0x8b6
+	.4byte	.LLST329
+	.byte	0
+	.uleb128 0x6b
+	.4byte	.Ldebug_ranges0+0x238
+	.4byte	0xa15f
+	.uleb128 0x5d
+	.ascii	"tmp\000"
+	.byte	0x3
+	.2byte	0x345
+	.4byte	0x74
+	.4byte	.LLST330
+	.byte	0
+	.uleb128 0x6f
+	.4byte	.LBB306
+	.4byte	.LBE306-.LBB306
+	.4byte	0xa179
+	.uleb128 0x57
+	.ascii	"tmp\000"
+	.byte	0x3
+	.2byte	0x372
+	.4byte	0x74
+	.byte	0
+	.uleb128 0x6f
+	.4byte	.LBB302
+	.4byte	.LBE302-.LBB302
+	.4byte	0xa197
+	.uleb128 0x5e
+	.4byte	.LASF1399
+	.byte	0x3
+	.2byte	0x387
+	.4byte	0xd6d
+	.4byte	.LLST331
+	.byte	0
+	.uleb128 0x7f
+	.4byte	0xa1a9
+	.uleb128 0x56
+	.4byte	.LASF1400
+	.byte	0x3
+	.2byte	0x395
+	.4byte	0x116f
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL949
+	.4byte	0x530b
+	.4byte	0xa1c9
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x40
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL950
+	.4byte	0xa514
+	.4byte	0xa1ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x91
+	.sleb128 -116
+	.byte	0x94
+	.byte	0x1
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 4
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL951
+	.4byte	0xa45d
+	.4byte	0xa213
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL983
+	.4byte	0xa335
+	.4byte	0xa239
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL985
+	.4byte	0xa514
+	.4byte	0xa269
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x32
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 4
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL986
+	.4byte	0xa45d
+	.4byte	0xa27d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL990
+	.4byte	0xa514
+	.4byte	0xa2aa
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x32
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 4
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL993
+	.4byte	0xa45d
+	.4byte	0xa2be
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL994
+	.4byte	0xa514
+	.4byte	0xa2f0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x32
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x4
+	.byte	0x74
+	.sleb128 0
+	.byte	0x33
+	.byte	0x1a
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 4
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL997
+	.4byte	0xa335
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x4
+	.byte	0x74
+	.sleb128 -2
+	.byte	0x33
+	.byte	0x1a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1a
+	.byte	0x30
+	.byte	0x7b
+	.sleb128 -1024
+	.byte	0x91
+	.sleb128 -112
+	.byte	0x6
+	.byte	0x77
+	.sleb128 0
+	.byte	0x30
+	.byte	0x2e
+	.byte	0x28
+	.2byte	0x1
+	.byte	0x16
+	.byte	0x13
+	.byte	0x77
+	.sleb128 0
+	.byte	0x30
+	.byte	0x29
+	.byte	0x28
+	.2byte	0x1
+	.byte	0x16
+	.byte	0x13
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -112
+	.byte	0x6
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1401
+	.byte	0x3
+	.2byte	0x2eb
+	.4byte	.LFB291
+	.4byte	.LFE291-.LFB291
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xa45d
+	.uleb128 0x5c
+	.4byte	.LASF20
+	.byte	0x3
+	.2byte	0x2eb
+	.4byte	0x180a
+	.4byte	.LLST311
+	.uleb128 0x6d
+	.ascii	"dir\000"
+	.byte	0x3
+	.2byte	0x2eb
+	.4byte	0x3a
+	.4byte	.LLST312
+	.uleb128 0x5c
+	.4byte	.LASF1402
+	.byte	0x3
+	.2byte	0x2eb
+	.4byte	0x3a
+	.4byte	.LLST313
+	.uleb128 0x5c
+	.4byte	.LASF17
+	.byte	0x3
+	.2byte	0x2eb
+	.4byte	0x8b6
+	.4byte	.LLST314
+	.uleb128 0x5c
+	.4byte	.LASF18
+	.byte	0x3
+	.2byte	0x2eb
+	.4byte	0x8b6
+	.4byte	.LLST315
+	.uleb128 0x5e
+	.4byte	.LASF1403
+	.byte	0x3
+	.2byte	0x2ed
+	.4byte	0x13e
+	.4byte	.LLST316
+	.uleb128 0x38
+	.4byte	.LASF1404
+	.byte	0x3
+	.2byte	0x2ee
+	.4byte	0x13e
+	.uleb128 0x1
+	.byte	0x56
+	.uleb128 0x5d
+	.ascii	"tmp\000"
+	.byte	0x3
+	.2byte	0x2ef
+	.4byte	0x74
+	.4byte	.LLST317
+	.uleb128 0x5e
+	.4byte	.LASF1290
+	.byte	0x3
+	.2byte	0x2f0
+	.4byte	0x8b6
+	.4byte	.LLST318
+	.uleb128 0x44
+	.4byte	.LVL923
+	.4byte	0x5255
+	.4byte	0xa3f9
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x72
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL928
+	.4byte	0x52a5
+	.4byte	0xa415
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x400
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL932
+	.4byte	0x5255
+	.4byte	0xa435
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x72
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL939
+	.4byte	0x52a5
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0xb
+	.byte	0x74
+	.sleb128 0
+	.byte	0x39
+	.byte	0x24
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x1000
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x400
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1405
+	.byte	0x3
+	.2byte	0x27b
+	.4byte	.LFB290
+	.4byte	.LFE290-.LFB290
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xa508
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x3
+	.2byte	0x27b
+	.4byte	0x3a
+	.4byte	.LLST156
+	.uleb128 0x38
+	.4byte	.LASF1406
+	.byte	0x3
+	.2byte	0x27d
+	.4byte	0xfd3
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -16
+	.uleb128 0x38
+	.4byte	.LASF20
+	.byte	0x3
+	.2byte	0x27e
+	.4byte	0x180a
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x38
+	.4byte	.LASF1407
+	.byte	0x3
+	.2byte	0x280
+	.4byte	0xa508
+	.uleb128 0x3
+	.byte	0x71
+	.sleb128 16
+	.byte	0x9f
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x178
+	.uleb128 0x5e
+	.4byte	.LASF1408
+	.byte	0x3
+	.2byte	0x28a
+	.4byte	0xa50e
+	.4byte	.LLST157
+	.uleb128 0x6f
+	.4byte	.LBB238
+	.4byte	.LBE238-.LBB238
+	.4byte	0xa4e2
+	.uleb128 0x38
+	.4byte	.LASF1399
+	.byte	0x3
+	.2byte	0x296
+	.4byte	0xd78
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -12
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL367
+	.4byte	0xa672
+	.4byte	0xa4f6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL368
+	.4byte	0xa63e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x14ea
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x1552
+	.uleb128 0x69
+	.4byte	.LASF1409
+	.byte	0x3
+	.2byte	0x208
+	.4byte	.LFB289
+	.4byte	.LFE289-.LFB289
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xa63e
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x3
+	.2byte	0x208
+	.4byte	0x3a
+	.4byte	.LLST142
+	.uleb128 0x6d
+	.ascii	"dir\000"
+	.byte	0x3
+	.2byte	0x208
+	.4byte	0x3a
+	.4byte	.LLST143
+	.uleb128 0x5c
+	.4byte	.LASF1393
+	.byte	0x3
+	.2byte	0x208
+	.4byte	0x3a
+	.4byte	.LLST144
+	.uleb128 0x5c
+	.4byte	.LASF1402
+	.byte	0x3
+	.2byte	0x208
+	.4byte	0x3a
+	.4byte	.LLST145
+	.uleb128 0x5c
+	.4byte	.LASF17
+	.byte	0x3
+	.2byte	0x208
+	.4byte	0x8b6
+	.4byte	.LLST146
+	.uleb128 0x5c
+	.4byte	.LASF18
+	.byte	0x3
+	.2byte	0x208
+	.4byte	0x8b6
+	.4byte	.LLST147
+	.uleb128 0x5e
+	.4byte	.LASF1400
+	.byte	0x3
+	.2byte	0x20a
+	.4byte	0x116f
+	.4byte	.LLST148
+	.uleb128 0x5e
+	.4byte	.LASF1406
+	.byte	0x3
+	.2byte	0x20b
+	.4byte	0xfc8
+	.4byte	.LLST149
+	.uleb128 0x5e
+	.4byte	.LASF1410
+	.byte	0x3
+	.2byte	0x20c
+	.4byte	0x3a
+	.4byte	.LLST150
+	.uleb128 0x5e
+	.4byte	.LASF20
+	.byte	0x3
+	.2byte	0x20d
+	.4byte	0x180a
+	.4byte	.LLST151
+	.uleb128 0x5e
+	.4byte	.LASF1411
+	.byte	0x3
+	.2byte	0x20e
+	.4byte	0x19b3
+	.4byte	.LLST152
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x160
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x3
+	.2byte	0x227
+	.4byte	0x74
+	.4byte	.LLST153
+	.uleb128 0x38
+	.4byte	.LASF1407
+	.byte	0x3
+	.2byte	0x228
+	.4byte	0x14ea
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x5e
+	.4byte	.LASF1412
+	.byte	0x3
+	.2byte	0x229
+	.4byte	0x293a
+	.4byte	.LLST154
+	.uleb128 0x6f
+	.4byte	.LBB235
+	.4byte	.LBE235-.LBB235
+	.4byte	0xa62a
+	.uleb128 0x5e
+	.4byte	.LASF1396
+	.byte	0x3
+	.2byte	0x232
+	.4byte	0x74
+	.4byte	.LLST155
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL347
+	.4byte	0x10462
+	.uleb128 0x48
+	.4byte	.LVL350
+	.4byte	0x10462
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1413
+	.byte	0x3
+	.2byte	0x200
+	.4byte	.LFB288
+	.4byte	.LFE288-.LFB288
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xa672
+	.uleb128 0x70
+	.4byte	.LASF20
+	.byte	0x3
+	.2byte	0x200
+	.4byte	0x180a
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x38
+	.4byte	.LASF1406
+	.byte	0x3
+	.2byte	0x202
+	.4byte	0xfd3
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -4
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1414
+	.byte	0x3
+	.2byte	0x1e9
+	.4byte	.LFB287
+	.4byte	.LFE287-.LFB287
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xa6b6
+	.uleb128 0x70
+	.4byte	.LASF20
+	.byte	0x3
+	.2byte	0x1e9
+	.4byte	0x180a
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5e
+	.4byte	.LASF1406
+	.byte	0x3
+	.2byte	0x1eb
+	.4byte	0xfc8
+	.4byte	.LLST141
+	.uleb128 0x38
+	.4byte	.LASF1407
+	.byte	0x3
+	.2byte	0x1ec
+	.4byte	0x14ea
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -4
+	.byte	0
+	.uleb128 0x6e
+	.4byte	.LASF1415
+	.byte	0x3
+	.2byte	0x1e1
+	.byte	0x1
+	.4byte	0xa6d0
+	.uleb128 0x55
+	.4byte	.LASF1416
+	.byte	0x3
+	.2byte	0x1e1
+	.4byte	0x1aea
+	.byte	0
+	.uleb128 0x6e
+	.4byte	.LASF1417
+	.byte	0x3
+	.2byte	0x1cf
+	.byte	0x1
+	.4byte	0xa6ea
+	.uleb128 0x55
+	.4byte	.LASF20
+	.byte	0x3
+	.2byte	0x1cf
+	.4byte	0x180a
+	.byte	0
+	.uleb128 0x80
+	.4byte	.LASF1421
+	.byte	0x3
+	.2byte	0x1c9
+	.4byte	0xa710
+	.uleb128 0x55
+	.4byte	.LASF1416
+	.byte	0x3
+	.2byte	0x1c9
+	.4byte	0x1aea
+	.uleb128 0x56
+	.4byte	.LASF20
+	.byte	0x3
+	.2byte	0x1cb
+	.4byte	0x180a
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1418
+	.byte	0x3
+	.2byte	0x1c3
+	.4byte	0x74
+	.4byte	.LFB283
+	.4byte	.LFE283-.LFB283
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xa74b
+	.uleb128 0x5c
+	.4byte	.LASF1416
+	.byte	0x3
+	.2byte	0x1c3
+	.4byte	0x1aea
+	.4byte	.LLST139
+	.uleb128 0x5e
+	.4byte	.LASF20
+	.byte	0x3
+	.2byte	0x1c5
+	.4byte	0x180a
+	.4byte	.LLST140
+	.byte	0
+	.uleb128 0x6e
+	.4byte	.LASF1419
+	.byte	0x3
+	.2byte	0x1bb
+	.byte	0x1
+	.4byte	0xa771
+	.uleb128 0x55
+	.4byte	.LASF20
+	.byte	0x3
+	.2byte	0x1bb
+	.4byte	0x180a
+	.uleb128 0x55
+	.4byte	.LASF1420
+	.byte	0x3
+	.2byte	0x1bb
+	.4byte	0xbc2
+	.byte	0
+	.uleb128 0x80
+	.4byte	.LASF1422
+	.byte	0x3
+	.2byte	0x1b3
+	.4byte	0xa797
+	.uleb128 0x55
+	.4byte	.LASF20
+	.byte	0x3
+	.2byte	0x1b3
+	.4byte	0x180a
+	.uleb128 0x55
+	.4byte	.LASF1420
+	.byte	0x3
+	.2byte	0x1b3
+	.4byte	0xbc2
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1423
+	.byte	0x3
+	.2byte	0x18f
+	.4byte	.LFB280
+	.4byte	.LFE280-.LFB280
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xa7dc
+	.uleb128 0x70
+	.4byte	.LASF1424
+	.byte	0x3
+	.2byte	0x18f
+	.4byte	0x3a
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5d
+	.ascii	"tmp\000"
+	.byte	0x3
+	.2byte	0x191
+	.4byte	0x116f
+	.4byte	.LLST137
+	.uleb128 0x5e
+	.4byte	.LASF1406
+	.byte	0x3
+	.2byte	0x192
+	.4byte	0xfc8
+	.4byte	.LLST138
+	.byte	0
+	.uleb128 0x6e
+	.4byte	.LASF1425
+	.byte	0x3
+	.2byte	0x15c
+	.byte	0x1
+	.4byte	0xa801
+	.uleb128 0x66
+	.ascii	"ns\000"
+	.byte	0x3
+	.2byte	0x15c
+	.4byte	0x74
+	.uleb128 0x56
+	.4byte	.LASF1426
+	.byte	0x3
+	.2byte	0x15e
+	.4byte	0x8f
+	.byte	0
+	.uleb128 0x6e
+	.4byte	.LASF1427
+	.byte	0x3
+	.2byte	0x152
+	.byte	0x1
+	.4byte	0xa835
+	.uleb128 0x55
+	.4byte	.LASF1392
+	.byte	0x3
+	.2byte	0x152
+	.4byte	0x3a
+	.uleb128 0x55
+	.4byte	.LASF1428
+	.byte	0x3
+	.2byte	0x152
+	.4byte	0x74
+	.uleb128 0x68
+	.uleb128 0x56
+	.4byte	.LASF20
+	.byte	0x3
+	.2byte	0x156
+	.4byte	0x180a
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1429
+	.byte	0x3
+	.2byte	0x136
+	.4byte	0x74
+	.4byte	.LFB277
+	.4byte	.LFE277-.LFB277
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xa8c4
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x3
+	.2byte	0x136
+	.4byte	0x3a
+	.4byte	.LLST101
+	.uleb128 0x71
+	.ascii	"tmp\000"
+	.byte	0x3
+	.2byte	0x138
+	.4byte	0xd78
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -20
+	.uleb128 0x81
+	.4byte	.LASF15
+	.byte	0x3
+	.2byte	0x139
+	.4byte	0x74
+	.byte	0
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x3
+	.2byte	0x13a
+	.4byte	0x74
+	.4byte	.LLST102
+	.uleb128 0x38
+	.4byte	.LASF20
+	.byte	0x3
+	.2byte	0x13b
+	.4byte	0x180a
+	.uleb128 0x1
+	.byte	0x55
+	.uleb128 0x82
+	.4byte	0xa8c4
+	.4byte	.LBB211
+	.4byte	.LBE211-.LBB211
+	.byte	0x3
+	.2byte	0x141
+	.uleb128 0x4f
+	.4byte	0xa8d5
+	.4byte	.LLST103
+	.uleb128 0x45
+	.4byte	.LVL197
+	.4byte	0x1046f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x64
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x54
+	.4byte	.LASF1430
+	.byte	0x3
+	.2byte	0x130
+	.4byte	0x74
+	.byte	0x1
+	.4byte	0xa8e2
+	.uleb128 0x55
+	.4byte	.LASF602
+	.byte	0x3
+	.2byte	0x130
+	.4byte	0x74
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1431
+	.byte	0x3
+	.2byte	0x121
+	.4byte	.LFB275
+	.4byte	.LFE275-.LFB275
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xa925
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x3
+	.2byte	0x121
+	.4byte	0x3a
+	.4byte	.LLST85
+	.uleb128 0x71
+	.ascii	"tmp\000"
+	.byte	0x3
+	.2byte	0x123
+	.4byte	0xd6d
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x38
+	.4byte	.LASF20
+	.byte	0x3
+	.2byte	0x124
+	.4byte	0x180a
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1432
+	.byte	0x3
+	.2byte	0x112
+	.4byte	.LFB274
+	.4byte	.LFE274-.LFB274
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xa968
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x3
+	.2byte	0x112
+	.4byte	0x3a
+	.4byte	.LLST84
+	.uleb128 0x71
+	.ascii	"tmp\000"
+	.byte	0x3
+	.2byte	0x114
+	.4byte	0xd6d
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x38
+	.4byte	.LASF20
+	.byte	0x3
+	.2byte	0x115
+	.4byte	0x180a
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0
+	.uleb128 0x4b
+	.4byte	.LASF1433
+	.byte	0x3
+	.byte	0xa9
+	.4byte	0x8f
+	.4byte	.LFB273
+	.4byte	.LFE273-.LFB273
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xa9ad
+	.uleb128 0x40
+	.4byte	.LASF923
+	.byte	0x3
+	.byte	0xa9
+	.4byte	0x3a
+	.4byte	.LLST82
+	.uleb128 0x83
+	.4byte	.LASF1434
+	.byte	0x3
+	.byte	0xac
+	.4byte	0x8f
+	.byte	0
+	.uleb128 0x41
+	.ascii	"tmp\000"
+	.byte	0x3
+	.byte	0xad
+	.4byte	0xd6d
+	.4byte	.LLST83
+	.byte	0
+	.uleb128 0x3e
+	.4byte	.LASF1435
+	.byte	0x3
+	.byte	0x93
+	.4byte	.LFB272
+	.4byte	.LFE272-.LFB272
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xa9df
+	.uleb128 0x52
+	.4byte	.LASF1436
+	.byte	0x3
+	.byte	0x93
+	.4byte	0x8f
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x41
+	.ascii	"tmp\000"
+	.byte	0x3
+	.byte	0x95
+	.4byte	0xd6d
+	.4byte	.LLST81
+	.byte	0
+	.uleb128 0x3e
+	.4byte	.LASF1437
+	.byte	0x3
+	.byte	0x8e
+	.4byte	.LFB271
+	.4byte	.LFE271-.LFB271
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xaa04
+	.uleb128 0x3f
+	.ascii	"div\000"
+	.byte	0x3
+	.byte	0x8e
+	.4byte	0x3a
+	.4byte	.LLST80
+	.byte	0
+	.uleb128 0x3e
+	.4byte	.LASF1438
+	.byte	0x3
+	.byte	0x82
+	.4byte	.LFB270
+	.4byte	.LFE270-.LFB270
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xaa29
+	.uleb128 0x40
+	.4byte	.LASF1439
+	.byte	0x3
+	.byte	0x82
+	.4byte	0x3a
+	.4byte	.LLST79
+	.byte	0
+	.uleb128 0x50
+	.4byte	.LASF1440
+	.byte	0x3
+	.byte	0x77
+	.4byte	0x15bc
+	.byte	0x1
+	.4byte	0xaa5b
+	.uleb128 0x51
+	.4byte	.LASF1392
+	.byte	0x3
+	.byte	0x77
+	.4byte	0x3a
+	.uleb128 0x7c
+	.ascii	"tmp\000"
+	.byte	0x3
+	.byte	0x79
+	.4byte	0x15bc
+	.uleb128 0x7d
+	.4byte	.LASF20
+	.byte	0x3
+	.byte	0x7a
+	.4byte	0x180a
+	.byte	0
+	.uleb128 0x76
+	.4byte	.LASF1441
+	.byte	0x3
+	.byte	0x6e
+	.byte	0x1
+	.4byte	0xaa73
+	.uleb128 0x84
+	.ascii	"en\000"
+	.byte	0x3
+	.byte	0x6e
+	.4byte	0x3a
+	.byte	0
+	.uleb128 0x3e
+	.4byte	.LASF1442
+	.byte	0x3
+	.byte	0xf
+	.4byte	.LFB267
+	.4byte	.LFE267-.LFB267
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xab08
+	.uleb128 0x40
+	.4byte	.LASF1443
+	.byte	0x3
+	.byte	0xf
+	.4byte	0x13e
+	.4byte	.LLST424
+	.uleb128 0x41
+	.ascii	"i\000"
+	.byte	0x3
+	.byte	0x11
+	.4byte	0x74
+	.4byte	.LLST425
+	.uleb128 0x61
+	.4byte	.LASF1444
+	.byte	0x3
+	.byte	0x12
+	.4byte	0xd6d
+	.4byte	.LLST426
+	.uleb128 0x85
+	.4byte	0xa7dc
+	.4byte	.LBB343
+	.4byte	.Ldebug_ranges0+0x318
+	.byte	0x3
+	.byte	0x48
+	.4byte	0xaaf6
+	.uleb128 0x4f
+	.4byte	0xa7e9
+	.4byte	.LLST427
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x318
+	.uleb128 0x74
+	.4byte	0xe852
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x318
+	.uleb128 0x4f
+	.4byte	0xa7e9
+	.4byte	.LLST427
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x318
+	.uleb128 0x74
+	.4byte	0xe852
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1319
+	.4byte	0x5194
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x9000
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1445
+	.byte	0x2
+	.2byte	0xd0e
+	.4byte	.LFB266
+	.4byte	.LFE266-.LFB266
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xab78
+	.uleb128 0x6d
+	.ascii	"buf\000"
+	.byte	0x2
+	.2byte	0xd0e
+	.4byte	0x1aea
+	.4byte	.LLST284
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0xd10
+	.4byte	0x3a
+	.4byte	.LLST285
+	.uleb128 0x5e
+	.4byte	.LASF1446
+	.byte	0x2
+	.2byte	0xd11
+	.4byte	0x7cb
+	.4byte	.LLST286
+	.uleb128 0x86
+	.4byte	0x8eb5
+	.4byte	.LBB297
+	.4byte	.LBE297-.LBB297
+	.byte	0x2
+	.2byte	0xd17
+	.uleb128 0x45
+	.4byte	.LVL811
+	.4byte	0x530b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x3b
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1447
+	.byte	0x2
+	.2byte	0xcf7
+	.4byte	0x84
+	.4byte	.LFB265
+	.4byte	.LFE265-.LFB265
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xac06
+	.uleb128 0x5c
+	.4byte	.LASF1448
+	.byte	0x2
+	.2byte	0xcf7
+	.4byte	0x293a
+	.4byte	.LLST790
+	.uleb128 0x6d
+	.ascii	"die\000"
+	.byte	0x2
+	.2byte	0xcf7
+	.4byte	0x74
+	.4byte	.LLST791
+	.uleb128 0x5e
+	.4byte	.LASF1449
+	.byte	0x2
+	.2byte	0xcf9
+	.4byte	0x57
+	.4byte	.LLST792
+	.uleb128 0x71
+	.ascii	"blk\000"
+	.byte	0x2
+	.2byte	0xcfa
+	.4byte	0x57
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x56
+	.4byte	.LASF1450
+	.byte	0x2
+	.2byte	0xcfb
+	.4byte	0x57
+	.uleb128 0x5e
+	.4byte	.LASF15
+	.byte	0x2
+	.2byte	0xcfc
+	.4byte	0x84
+	.4byte	.LLST793
+	.uleb128 0x45
+	.4byte	.LVL3135
+	.4byte	0xac06
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x4
+	.byte	0x74
+	.sleb128 7
+	.byte	0x33
+	.byte	0x26
+	.byte	0
+	.byte	0
+	.uleb128 0x54
+	.4byte	.LASF1451
+	.byte	0x2
+	.2byte	0xcd7
+	.4byte	0x84
+	.byte	0x1
+	.4byte	0xac82
+	.uleb128 0x55
+	.4byte	.LASF1452
+	.byte	0x2
+	.2byte	0xcd7
+	.4byte	0x8b6
+	.uleb128 0x66
+	.ascii	"die\000"
+	.byte	0x2
+	.2byte	0xcd7
+	.4byte	0x74
+	.uleb128 0x66
+	.ascii	"len\000"
+	.byte	0x2
+	.2byte	0xcd7
+	.4byte	0x74
+	.uleb128 0x56
+	.4byte	.LASF15
+	.byte	0x2
+	.2byte	0xcd9
+	.4byte	0x84
+	.uleb128 0x56
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0xcda
+	.4byte	0x74
+	.uleb128 0x57
+	.ascii	"blk\000"
+	.byte	0x2
+	.2byte	0xcdb
+	.4byte	0x57
+	.uleb128 0x57
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0xcdb
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1178
+	.byte	0x2
+	.2byte	0xcdc
+	.4byte	0xc5
+	.uleb128 0x56
+	.4byte	.LASF1450
+	.byte	0x2
+	.2byte	0xcdd
+	.4byte	0x57
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1453
+	.byte	0x2
+	.2byte	0xc96
+	.4byte	0x84
+	.4byte	.LFB263
+	.4byte	.LFE263-.LFB263
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xae0d
+	.uleb128 0x6d
+	.ascii	"req\000"
+	.byte	0x2
+	.2byte	0xc96
+	.4byte	0x1aea
+	.4byte	.LLST122
+	.uleb128 0x5c
+	.4byte	.LASF1355
+	.byte	0x2
+	.2byte	0xc96
+	.4byte	0x74
+	.4byte	.LLST123
+	.uleb128 0x5c
+	.4byte	.LASF1153
+	.byte	0x2
+	.2byte	0xc96
+	.4byte	0x74
+	.4byte	.LLST124
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0xc98
+	.4byte	0x74
+	.4byte	.LLST125
+	.uleb128 0x38
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0xc99
+	.4byte	0x74
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -40
+	.uleb128 0x5e
+	.4byte	.LASF1454
+	.byte	0x2
+	.2byte	0xc9a
+	.4byte	0x676
+	.4byte	.LLST122
+	.uleb128 0x38
+	.4byte	.LASF1455
+	.byte	0x2
+	.2byte	0xc9b
+	.4byte	0x74
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x5e
+	.4byte	.LASF923
+	.byte	0x2
+	.2byte	0xc9c
+	.4byte	0x74
+	.4byte	.LLST127
+	.uleb128 0x5e
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0xc9d
+	.4byte	0x3a
+	.4byte	.LLST128
+	.uleb128 0x44
+	.4byte	.LVL259
+	.4byte	0xb575
+	.4byte	0xad3c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL261
+	.4byte	0xbdec
+	.4byte	0xad6c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -44
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -40
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x5
+	.byte	0x77
+	.sleb128 0
+	.byte	0x74
+	.sleb128 0
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL266
+	.4byte	0xbc12
+	.uleb128 0x44
+	.4byte	.LVL268
+	.4byte	0xa925
+	.4byte	0xad89
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL269
+	.4byte	0xe19b
+	.4byte	0xad9d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL271
+	.4byte	0xbcab
+	.4byte	0xadb1
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL272
+	.4byte	0xe067
+	.4byte	0xadcb
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL273
+	.4byte	0xa8e2
+	.4byte	0xaddf
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL274
+	.4byte	0xe175
+	.uleb128 0x44
+	.4byte	.LVL276
+	.4byte	0xbc12
+	.4byte	0xadfc
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL277
+	.4byte	0xe175
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1456
+	.byte	0x2
+	.2byte	0xc23
+	.4byte	0x84
+	.4byte	.LFB262
+	.4byte	.LFE262-.LFB262
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xb17b
+	.uleb128 0x6d
+	.ascii	"req\000"
+	.byte	0x2
+	.2byte	0xc23
+	.4byte	0x1aea
+	.4byte	.LLST516
+	.uleb128 0x5c
+	.4byte	.LASF1153
+	.byte	0x2
+	.2byte	0xc23
+	.4byte	0x74
+	.4byte	.LLST517
+	.uleb128 0x5c
+	.4byte	.LASF1355
+	.byte	0x2
+	.2byte	0xc23
+	.4byte	0x74
+	.4byte	.LLST518
+	.uleb128 0x5c
+	.4byte	.LASF1457
+	.byte	0x2
+	.2byte	0xc23
+	.4byte	0x74
+	.4byte	.LLST519
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0xc25
+	.4byte	0x74
+	.4byte	.LLST520
+	.uleb128 0x38
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0xc26
+	.4byte	0x74
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -76
+	.uleb128 0x5e
+	.4byte	.LASF1454
+	.byte	0x2
+	.2byte	0xc27
+	.4byte	0x676
+	.4byte	.LLST521
+	.uleb128 0x38
+	.4byte	.LASF1455
+	.byte	0x2
+	.2byte	0xc28
+	.4byte	0x74
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -72
+	.uleb128 0x5e
+	.4byte	.LASF923
+	.byte	0x2
+	.2byte	0xc29
+	.4byte	0x74
+	.4byte	.LLST522
+	.uleb128 0x5e
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0xc2a
+	.4byte	0x3a
+	.4byte	.LLST523
+	.uleb128 0x5e
+	.4byte	.LASF65
+	.byte	0x2
+	.2byte	0xc2b
+	.4byte	0x74
+	.4byte	.LLST524
+	.uleb128 0x5e
+	.4byte	.LASF58
+	.byte	0x2
+	.2byte	0xc2c
+	.4byte	0x74
+	.4byte	.LLST525
+	.uleb128 0x6b
+	.4byte	.Ldebug_ranges0+0x4a8
+	.4byte	0xafaa
+	.uleb128 0x38
+	.4byte	.LASF1458
+	.byte	0x2
+	.2byte	0xc74
+	.4byte	0xc5
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -68
+	.uleb128 0x44
+	.4byte	.LVL1797
+	.4byte	0x103ff
+	.4byte	0xaf15
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC27
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1799
+	.4byte	0xbdec
+	.4byte	0xaf49
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -76
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -72
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x7
+	.byte	0x91
+	.sleb128 -96
+	.byte	0x6
+	.byte	0x76
+	.sleb128 0
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1800
+	.4byte	0xb17b
+	.4byte	0xaf68
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 -32
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1801
+	.4byte	0x103ff
+	.4byte	0xaf7f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC28
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1802
+	.4byte	0x103ff
+	.4byte	0xaf96
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC29
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1803
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC30
+	.byte	0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1766
+	.4byte	0xb70a
+	.uleb128 0x44
+	.4byte	.LVL1768
+	.4byte	0xbdec
+	.4byte	0xafe7
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -76
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -72
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x7
+	.byte	0x91
+	.sleb128 -96
+	.byte	0x6
+	.byte	0x77
+	.sleb128 0
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1773
+	.4byte	0xbc12
+	.uleb128 0x44
+	.4byte	.LVL1775
+	.4byte	0xa835
+	.4byte	0xb004
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1776
+	.4byte	0xc7c8
+	.4byte	0xb026
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR20+4
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1777
+	.4byte	0xa925
+	.4byte	0xb03a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1778
+	.4byte	0xe19b
+	.4byte	0xb04e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1779
+	.4byte	0xe0ed
+	.4byte	0xb068
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1780
+	.4byte	0xa045
+	.4byte	0xb08a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x5
+	.byte	0x91
+	.sleb128 -92
+	.byte	0x94
+	.byte	0x1
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1781
+	.4byte	0xdefd
+	.4byte	0xb09e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1782
+	.4byte	0xbcab
+	.4byte	0xb0b2
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1783
+	.4byte	0xdfdf
+	.4byte	0xb0cc
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1784
+	.4byte	0xa045
+	.4byte	0xb0ee
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x5
+	.byte	0x91
+	.sleb128 -92
+	.byte	0x94
+	.byte	0x1
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1785
+	.4byte	0xdf6d
+	.4byte	0xb108
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1787
+	.4byte	0xa8e2
+	.4byte	0xb11c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1788
+	.4byte	0xa925
+	.uleb128 0x44
+	.4byte	.LVL1789
+	.4byte	0xbcab
+	.4byte	0xb139
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1790
+	.4byte	0xa8e2
+	.4byte	0xb14d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1791
+	.4byte	0xe175
+	.uleb128 0x44
+	.4byte	.LVL1793
+	.4byte	0xbc12
+	.4byte	0xb16a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1794
+	.4byte	0xe175
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1459
+	.byte	0x2
+	.2byte	0xb7c
+	.4byte	0x84
+	.4byte	.LFB261
+	.4byte	.LFE261-.LFB261
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xb575
+	.uleb128 0x6d
+	.ascii	"req\000"
+	.byte	0x2
+	.2byte	0xb7c
+	.4byte	0x1aea
+	.4byte	.LLST493
+	.uleb128 0x5c
+	.4byte	.LASF1153
+	.byte	0x2
+	.2byte	0xb7c
+	.4byte	0x74
+	.4byte	.LLST494
+	.uleb128 0x5c
+	.4byte	.LASF1355
+	.byte	0x2
+	.2byte	0xb7c
+	.4byte	0x74
+	.4byte	.LLST495
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0xb7e
+	.4byte	0x74
+	.4byte	.LLST496
+	.uleb128 0x5e
+	.4byte	.LASF1454
+	.byte	0x2
+	.2byte	0xb7f
+	.4byte	0x676
+	.4byte	.LLST493
+	.uleb128 0x38
+	.4byte	.LASF1455
+	.byte	0x2
+	.2byte	0xb80
+	.4byte	0x74
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -40
+	.uleb128 0x38
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0xb81
+	.4byte	0x74
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x56
+	.4byte	.LASF1460
+	.byte	0x2
+	.2byte	0xb81
+	.4byte	0x74
+	.uleb128 0x5e
+	.4byte	.LASF923
+	.byte	0x2
+	.2byte	0xb82
+	.4byte	0x74
+	.4byte	.LLST498
+	.uleb128 0x81
+	.4byte	.LASF1461
+	.byte	0x2
+	.2byte	0xb82
+	.4byte	0x74
+	.byte	0
+	.uleb128 0x38
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0xb83
+	.4byte	0x3a
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x5e
+	.4byte	.LASF1462
+	.byte	0x2
+	.2byte	0xb83
+	.4byte	0x3a
+	.4byte	.LLST499
+	.uleb128 0x5e
+	.4byte	.LASF58
+	.byte	0x2
+	.2byte	0xb84
+	.4byte	0x74
+	.4byte	.LLST500
+	.uleb128 0x5e
+	.4byte	.LASF1463
+	.byte	0x2
+	.2byte	0xb85
+	.4byte	0x3a
+	.4byte	.LLST501
+	.uleb128 0x5e
+	.4byte	.LASF1464
+	.byte	0x2
+	.2byte	0xb86
+	.4byte	0x74
+	.4byte	.LLST502
+	.uleb128 0x5e
+	.4byte	.LASF1465
+	.byte	0x2
+	.2byte	0xb87
+	.4byte	0x74
+	.4byte	.LLST503
+	.uleb128 0x5e
+	.4byte	.LASF1466
+	.byte	0x2
+	.2byte	0xb88
+	.4byte	0x74
+	.4byte	.LLST504
+	.uleb128 0x5e
+	.4byte	.LASF72
+	.byte	0x2
+	.2byte	0xb89
+	.4byte	0x74
+	.4byte	.LLST505
+	.uleb128 0x58
+	.4byte	.LASF1467
+	.byte	0x2
+	.2byte	0xbac
+	.uleb128 0x6f
+	.4byte	.LBB411
+	.4byte	.LBE411-.LBB411
+	.4byte	0xb2e8
+	.uleb128 0x5e
+	.4byte	.LASF79
+	.byte	0x2
+	.2byte	0xb9f
+	.4byte	0x3a
+	.4byte	.LLST506
+	.uleb128 0x45
+	.4byte	.LVL1668
+	.4byte	0xc7c8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR20+4
+	.byte	0
+	.byte	0
+	.uleb128 0x6b
+	.4byte	.Ldebug_ranges0+0x470
+	.4byte	0xb332
+	.uleb128 0x5e
+	.4byte	.LASF1468
+	.byte	0x2
+	.2byte	0xbd0
+	.4byte	0x74
+	.4byte	.LLST507
+	.uleb128 0x44
+	.4byte	.LVL1696
+	.4byte	0xd687
+	.4byte	0xb31b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1699
+	.4byte	0xaa04
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x8
+	.byte	0x75
+	.sleb128 0
+	.byte	0x9
+	.byte	0xf4
+	.byte	0x24
+	.byte	0x9
+	.byte	0xfc
+	.byte	0x25
+	.byte	0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1651
+	.4byte	0xba02
+	.uleb128 0x44
+	.4byte	.LVL1657
+	.4byte	0xbdec
+	.4byte	0xb36e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -60
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -40
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x7
+	.byte	0x91
+	.sleb128 -48
+	.byte	0x6
+	.byte	0x91
+	.sleb128 -64
+	.byte	0x6
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1665
+	.4byte	0xa835
+	.4byte	0xb382
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1669
+	.4byte	0xa925
+	.4byte	0xb396
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1670
+	.4byte	0xe19b
+	.4byte	0xb3aa
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1672
+	.4byte	0xe1c1
+	.4byte	0xb3c4
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 -1
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1673
+	.4byte	0xa835
+	.4byte	0xb3d8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1675
+	.4byte	0xe266
+	.4byte	0xb3f2
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1676
+	.4byte	0xa045
+	.4byte	0xb413
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -52
+	.byte	0x94
+	.byte	0x1
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1681
+	.4byte	0xe175
+	.4byte	0xb427
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1683
+	.4byte	0xe2e2
+	.4byte	0xb43b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1687
+	.4byte	0xe266
+	.4byte	0xb455
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1688
+	.4byte	0xa045
+	.4byte	0xb476
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -52
+	.byte	0x94
+	.byte	0x1
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1691
+	.4byte	0xa8e2
+	.4byte	0xb48a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1693
+	.4byte	0xdd4c
+	.4byte	0xb49e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x87
+	.4byte	.LVL1703
+	.4byte	0xb4af
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1706
+	.4byte	0xc7c8
+	.4byte	0xb4d1
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR20+4
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1707
+	.4byte	0xdd4c
+	.4byte	0xb4e5
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1710
+	.4byte	0x103ff
+	.4byte	0xb502
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC26
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1711
+	.4byte	0xe19b
+	.uleb128 0x88
+	.4byte	.LVL1712
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.4byte	0xb51f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1715
+	.4byte	0x103ff
+	.4byte	0xb536
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC23
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1716
+	.4byte	0x4d68
+	.4byte	0xb557
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC25
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x34
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x34
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1720
+	.4byte	0xe175
+	.4byte	0xb56b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1722
+	.4byte	0xe175
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1469
+	.byte	0x2
+	.2byte	0xb54
+	.4byte	0x84
+	.4byte	.LFB260
+	.4byte	.LFE260-.LFB260
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xb70a
+	.uleb128 0x6d
+	.ascii	"req\000"
+	.byte	0x2
+	.2byte	0xb54
+	.4byte	0x1aea
+	.4byte	.LLST117
+	.uleb128 0x5c
+	.4byte	.LASF1153
+	.byte	0x2
+	.2byte	0xb54
+	.4byte	0x74
+	.4byte	.LLST118
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0xb56
+	.4byte	0x74
+	.4byte	.LLST119
+	.uleb128 0x38
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0xb57
+	.4byte	0x74
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -40
+	.uleb128 0x5e
+	.4byte	.LASF1454
+	.byte	0x2
+	.2byte	0xb58
+	.4byte	0x676
+	.4byte	.LLST120
+	.uleb128 0x38
+	.4byte	.LASF1455
+	.byte	0x2
+	.2byte	0xb59
+	.4byte	0x74
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x38
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0xb5a
+	.4byte	0x3a
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x5e
+	.4byte	.LASF15
+	.byte	0x2
+	.2byte	0xb5b
+	.4byte	0x74
+	.4byte	.LLST121
+	.uleb128 0x44
+	.4byte	.LVL237
+	.4byte	0xbdec
+	.4byte	0xb638
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -40
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x5
+	.byte	0x77
+	.sleb128 0
+	.byte	0x76
+	.sleb128 0
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL240
+	.4byte	0xa835
+	.4byte	0xb64c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL241
+	.4byte	0xa925
+	.4byte	0xb660
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL242
+	.4byte	0xe067
+	.4byte	0xb679
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL243
+	.4byte	0xa835
+	.4byte	0xb68d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL244
+	.4byte	0xde59
+	.4byte	0xb6a1
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL246
+	.4byte	0xe067
+	.4byte	0xb6ba
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL247
+	.4byte	0xa835
+	.4byte	0xb6ce
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL248
+	.4byte	0xde59
+	.4byte	0xb6e2
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL250
+	.4byte	0x103ff
+	.4byte	0xb6f9
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL251
+	.4byte	0xa8e2
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1470
+	.byte	0x2
+	.2byte	0xb01
+	.4byte	0x84
+	.4byte	.LFB259
+	.4byte	.LFE259-.LFB259
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xba02
+	.uleb128 0x6d
+	.ascii	"req\000"
+	.byte	0x2
+	.2byte	0xb01
+	.4byte	0x1aea
+	.4byte	.LLST508
+	.uleb128 0x5c
+	.4byte	.LASF1153
+	.byte	0x2
+	.2byte	0xb01
+	.4byte	0x74
+	.4byte	.LLST509
+	.uleb128 0x5c
+	.4byte	.LASF1355
+	.byte	0x2
+	.2byte	0xb01
+	.4byte	0x74
+	.4byte	.LLST510
+	.uleb128 0x5c
+	.4byte	.LASF1457
+	.byte	0x2
+	.2byte	0xb01
+	.4byte	0x74
+	.4byte	.LLST511
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0xb03
+	.4byte	0x74
+	.4byte	.LLST512
+	.uleb128 0x5e
+	.4byte	.LASF15
+	.byte	0x2
+	.2byte	0xb04
+	.4byte	0x74
+	.4byte	.LLST513
+	.uleb128 0x38
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0xb05
+	.4byte	0x74
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -76
+	.uleb128 0x5e
+	.4byte	.LASF1454
+	.byte	0x2
+	.2byte	0xb06
+	.4byte	0x676
+	.4byte	.LLST514
+	.uleb128 0x38
+	.4byte	.LASF1455
+	.byte	0x2
+	.2byte	0xb07
+	.4byte	0x74
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -72
+	.uleb128 0x5e
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0xb08
+	.4byte	0x3a
+	.4byte	.LLST515
+	.uleb128 0x38
+	.4byte	.LASF58
+	.byte	0x2
+	.2byte	0xb09
+	.4byte	0x74
+	.uleb128 0x9
+	.byte	0x91
+	.sleb128 -88
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.uleb128 0x6b
+	.4byte	.Ldebug_ranges0+0x488
+	.4byte	0xb89b
+	.uleb128 0x38
+	.4byte	.LASF1458
+	.byte	0x2
+	.2byte	0xb34
+	.4byte	0xc5
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -68
+	.uleb128 0x44
+	.4byte	.LVL1748
+	.4byte	0x103ff
+	.4byte	0xb808
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC27
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1751
+	.4byte	0xbdec
+	.4byte	0xb83a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -76
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -72
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x5
+	.byte	0x77
+	.sleb128 0
+	.byte	0x76
+	.sleb128 0
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1752
+	.4byte	0xb17b
+	.4byte	0xb859
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 -32
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1753
+	.4byte	0x103ff
+	.4byte	0xb870
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC28
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1754
+	.4byte	0x103ff
+	.4byte	0xb887
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC29
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1755
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC30
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1729
+	.4byte	0xbdec
+	.4byte	0xb8cd
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -76
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -72
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x5
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x77
+	.sleb128 0
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1732
+	.4byte	0xa835
+	.4byte	0xb8e1
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1733
+	.4byte	0xa925
+	.4byte	0xb8f5
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1734
+	.4byte	0xe0ed
+	.4byte	0xb90f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1735
+	.4byte	0xa045
+	.4byte	0xb931
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x5
+	.byte	0x91
+	.sleb128 -88
+	.byte	0x94
+	.byte	0x1
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1736
+	.4byte	0xdf6d
+	.4byte	0xb94b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1737
+	.4byte	0xa835
+	.4byte	0xb95f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1738
+	.4byte	0xde59
+	.4byte	0xb973
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1740
+	.4byte	0xe0ed
+	.4byte	0xb98d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1741
+	.4byte	0xa045
+	.4byte	0xb9af
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x5
+	.byte	0x91
+	.sleb128 -88
+	.byte	0x94
+	.byte	0x1
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1742
+	.4byte	0xdf6d
+	.4byte	0xb9c9
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1743
+	.4byte	0xa835
+	.4byte	0xb9dd
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1744
+	.4byte	0xde59
+	.4byte	0xb9f1
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1746
+	.4byte	0xa8e2
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1471
+	.byte	0x2
+	.2byte	0xac8
+	.4byte	0x84
+	.4byte	.LFB258
+	.4byte	.LFE258-.LFB258
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xbc12
+	.uleb128 0x6d
+	.ascii	"req\000"
+	.byte	0x2
+	.2byte	0xac8
+	.4byte	0x1aea
+	.4byte	.LLST486
+	.uleb128 0x5c
+	.4byte	.LASF1153
+	.byte	0x2
+	.2byte	0xac8
+	.4byte	0x74
+	.4byte	.LLST487
+	.uleb128 0x5c
+	.4byte	.LASF1355
+	.byte	0x2
+	.2byte	0xac8
+	.4byte	0x74
+	.4byte	.LLST488
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0xaca
+	.4byte	0x74
+	.4byte	.LLST489
+	.uleb128 0x5e
+	.4byte	.LASF1454
+	.byte	0x2
+	.2byte	0xacb
+	.4byte	0x676
+	.4byte	.LLST490
+	.uleb128 0x38
+	.4byte	.LASF1455
+	.byte	0x2
+	.2byte	0xacc
+	.4byte	0x74
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -40
+	.uleb128 0x38
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0xacd
+	.4byte	0x74
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x38
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0xace
+	.4byte	0x3a
+	.uleb128 0x1
+	.byte	0x55
+	.uleb128 0x38
+	.4byte	.LASF58
+	.byte	0x2
+	.2byte	0xacf
+	.4byte	0x74
+	.uleb128 0x6
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.uleb128 0x5e
+	.4byte	.LASF1465
+	.byte	0x2
+	.2byte	0xad0
+	.4byte	0x74
+	.4byte	.LLST491
+	.uleb128 0x5e
+	.4byte	.LASF1466
+	.byte	0x2
+	.2byte	0xad1
+	.4byte	0x74
+	.4byte	.LLST492
+	.uleb128 0x44
+	.4byte	.LVL1626
+	.4byte	0xbdec
+	.4byte	0xbafa
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -44
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -40
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x5
+	.byte	0x78
+	.sleb128 0
+	.byte	0x77
+	.sleb128 0
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1629
+	.4byte	0xa835
+	.4byte	0xbb0e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1630
+	.4byte	0xa925
+	.4byte	0xbb22
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1631
+	.4byte	0xe2e2
+	.4byte	0xbb3c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1632
+	.4byte	0xa835
+	.4byte	0xbb50
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1633
+	.4byte	0xa045
+	.4byte	0xbb6f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1636
+	.4byte	0xe2e2
+	.4byte	0xbb89
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1637
+	.4byte	0xa045
+	.4byte	0xbba8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1640
+	.4byte	0xa8e2
+	.4byte	0xbbbc
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1643
+	.4byte	0x103ff
+	.4byte	0xbbd3
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC23
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1644
+	.4byte	0x4d68
+	.4byte	0xbbf4
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC24
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x34
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x38
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1645
+	.4byte	0x4d68
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC25
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x34
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x34
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1472
+	.byte	0x2
+	.2byte	0xab0
+	.4byte	0x74
+	.4byte	.LFB257
+	.4byte	.LFE257-.LFB257
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xbca5
+	.uleb128 0x5c
+	.4byte	.LASF1455
+	.byte	0x2
+	.2byte	0xab0
+	.4byte	0x3a
+	.4byte	.LLST96
+	.uleb128 0x5e
+	.4byte	.LASF1473
+	.byte	0x2
+	.2byte	0xab2
+	.4byte	0xbca5
+	.4byte	.LLST97
+	.uleb128 0x5e
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0xab3
+	.4byte	0x3a
+	.4byte	.LLST98
+	.uleb128 0x5e
+	.4byte	.LASF15
+	.byte	0x2
+	.2byte	0xab4
+	.4byte	0x74
+	.4byte	.LLST99
+	.uleb128 0x44
+	.4byte	.LVL185
+	.4byte	0xa925
+	.4byte	0xbc80
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL186
+	.4byte	0xbcab
+	.4byte	0xbc94
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL189
+	.4byte	0xa8e2
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x621
+	.uleb128 0x5b
+	.4byte	.LASF1474
+	.byte	0x2
+	.2byte	0xaa2
+	.4byte	0x74
+	.4byte	.LFB256
+	.4byte	.LFE256-.LFB256
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xbd20
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0xaa2
+	.4byte	0x3a
+	.4byte	.LLST73
+	.uleb128 0x5c
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0xaa2
+	.4byte	0x74
+	.4byte	.LLST74
+	.uleb128 0x5c
+	.4byte	.LASF1475
+	.byte	0x2
+	.2byte	0xaa2
+	.4byte	0x3a
+	.4byte	.LLST75
+	.uleb128 0x38
+	.4byte	.LASF15
+	.byte	0x2
+	.2byte	0xaa4
+	.4byte	0x74
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x45
+	.4byte	.LVL126
+	.4byte	0xbd20
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1476
+	.byte	0x2
+	.2byte	0xa8a
+	.4byte	0x74
+	.4byte	.LFB255
+	.4byte	.LFE255-.LFB255
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xbdec
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0xa8a
+	.4byte	0x3a
+	.4byte	.LLST66
+	.uleb128 0x5c
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0xa8a
+	.4byte	0x74
+	.4byte	.LLST67
+	.uleb128 0x5c
+	.4byte	.LASF1475
+	.byte	0x2
+	.2byte	0xa8a
+	.4byte	0x3a
+	.4byte	.LLST68
+	.uleb128 0x56
+	.4byte	.LASF273
+	.byte	0x2
+	.2byte	0xa8c
+	.4byte	0x15bc
+	.uleb128 0x6b
+	.4byte	.Ldebug_ranges0+0xb0
+	.4byte	0xbd8e
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0xa96
+	.4byte	0x74
+	.4byte	.LLST71
+	.byte	0
+	.uleb128 0x72
+	.4byte	0xaa29
+	.4byte	.LBB188
+	.4byte	.Ldebug_ranges0+0x98
+	.byte	0x2
+	.2byte	0xa8d
+	.4byte	0xbdc0
+	.uleb128 0x4f
+	.4byte	0xaa39
+	.4byte	.LLST69
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x98
+	.uleb128 0x74
+	.4byte	0xaa44
+	.uleb128 0x73
+	.4byte	0xaa4f
+	.4byte	.LLST70
+	.byte	0
+	.byte	0
+	.uleb128 0x82
+	.4byte	0xa8c4
+	.4byte	.LBB194
+	.4byte	.LBE194-.LBB194
+	.byte	0x2
+	.2byte	0xa9e
+	.uleb128 0x4f
+	.4byte	0xa8d5
+	.4byte	.LLST72
+	.uleb128 0x45
+	.4byte	.LVL117
+	.4byte	0x1046f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x50
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x67
+	.4byte	.LASF1477
+	.byte	0x2
+	.2byte	0xa6c
+	.4byte	0x74
+	.4byte	.LFB254
+	.4byte	.LFE254-.LFB254
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xbed1
+	.uleb128 0x5c
+	.4byte	.LASF1454
+	.byte	0x2
+	.2byte	0xa6c
+	.4byte	0x676
+	.4byte	.LLST56
+	.uleb128 0x5c
+	.4byte	.LASF1355
+	.byte	0x2
+	.2byte	0xa6c
+	.4byte	0x74
+	.4byte	.LLST57
+	.uleb128 0x5c
+	.4byte	.LASF1478
+	.byte	0x2
+	.2byte	0xa6c
+	.4byte	0x13e
+	.4byte	.LLST58
+	.uleb128 0x5c
+	.4byte	.LASF1479
+	.byte	0x2
+	.2byte	0xa6c
+	.4byte	0x13e
+	.4byte	.LLST59
+	.uleb128 0x5c
+	.4byte	.LASF1135
+	.byte	0x2
+	.2byte	0xa6c
+	.4byte	0x3a
+	.4byte	.LLST60
+	.uleb128 0x5e
+	.4byte	.LASF1480
+	.byte	0x2
+	.2byte	0xa6e
+	.4byte	0x57
+	.4byte	.LLST61
+	.uleb128 0x5e
+	.4byte	.LASF1481
+	.byte	0x2
+	.2byte	0xa6e
+	.4byte	0x57
+	.4byte	.LLST62
+	.uleb128 0x5e
+	.4byte	.LASF1482
+	.byte	0x2
+	.2byte	0xa6e
+	.4byte	0x57
+	.4byte	.LLST63
+	.uleb128 0x38
+	.4byte	.LASF1483
+	.byte	0x2
+	.2byte	0xa6f
+	.4byte	0x57
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x38
+	.4byte	.LASF1455
+	.byte	0x2
+	.2byte	0xa70
+	.4byte	0x74
+	.uleb128 0x1
+	.byte	0x5a
+	.uleb128 0x5e
+	.4byte	.LASF923
+	.byte	0x2
+	.2byte	0xa71
+	.4byte	0x74
+	.4byte	.LLST64
+	.uleb128 0x5e
+	.4byte	.LASF1484
+	.byte	0x2
+	.2byte	0xa72
+	.4byte	0x74
+	.4byte	.LLST65
+	.uleb128 0x38
+	.4byte	.LASF1314
+	.byte	0x2
+	.2byte	0xa73
+	.4byte	0x57
+	.uleb128 0x1
+	.byte	0x5b
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1485
+	.byte	0x2
+	.2byte	0xa5f
+	.4byte	0x74
+	.4byte	.LFB253
+	.4byte	.LFE253-.LFB253
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xbf65
+	.uleb128 0x89
+	.4byte	0xa801
+	.4byte	.LBB227
+	.4byte	.LBE227-.LBB227
+	.byte	0x2
+	.2byte	0xa68
+	.4byte	0xbf26
+	.uleb128 0x4f
+	.4byte	0xa81a
+	.4byte	.LLST133
+	.uleb128 0x4f
+	.4byte	0xa80e
+	.4byte	.LLST133
+	.uleb128 0x7a
+	.4byte	.LBB228
+	.4byte	.LBE228-.LBB228
+	.uleb128 0x73
+	.4byte	0xa827
+	.4byte	.LLST135
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL290
+	.4byte	0xa835
+	.4byte	0xbf39
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL291
+	.4byte	0xc6a1
+	.uleb128 0x44
+	.4byte	.LVL292
+	.4byte	0xd8d7
+	.4byte	0xbf55
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL293
+	.4byte	0xa968
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x67
+	.4byte	.LASF1486
+	.byte	0x2
+	.2byte	0x890
+	.4byte	0x74
+	.4byte	.LFB252
+	.4byte	.LFE252-.LFB252
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xc328
+	.uleb128 0x5c
+	.4byte	.LASF286
+	.byte	0x2
+	.2byte	0x890
+	.4byte	0x13e
+	.4byte	.LLST474
+	.uleb128 0x5e
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x892
+	.4byte	0x74
+	.4byte	.LLST475
+	.uleb128 0x5d
+	.ascii	"ret\000"
+	.byte	0x2
+	.2byte	0x893
+	.4byte	0x74
+	.4byte	.LLST476
+	.uleb128 0x6b
+	.4byte	.Ldebug_ranges0+0x438
+	.4byte	0xbff7
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x935
+	.4byte	0x74
+	.4byte	.LLST482
+	.uleb128 0x5d
+	.ascii	"j\000"
+	.byte	0x2
+	.2byte	0x935
+	.4byte	0x74
+	.4byte	.LLST483
+	.uleb128 0x5e
+	.4byte	.LASF80
+	.byte	0x2
+	.2byte	0x936
+	.4byte	0xc328
+	.4byte	.LLST484
+	.uleb128 0x48
+	.4byte	.LVL1606
+	.4byte	0xced6
+	.uleb128 0x48
+	.4byte	.LVL1607
+	.4byte	0xd2cb
+	.byte	0
+	.uleb128 0x6b
+	.4byte	.Ldebug_ranges0+0x450
+	.4byte	0xc011
+	.uleb128 0x5e
+	.4byte	.LASF1487
+	.byte	0x2
+	.2byte	0x9f6
+	.4byte	0xc32e
+	.4byte	.LLST485
+	.byte	0
+	.uleb128 0x72
+	.4byte	0xe3cf
+	.4byte	.LBB392
+	.4byte	.Ldebug_ranges0+0x3e8
+	.byte	0x2
+	.2byte	0x8a9
+	.4byte	0xc0fd
+	.uleb128 0x4f
+	.4byte	0xe3e9
+	.4byte	.LLST477
+	.uleb128 0x4f
+	.4byte	0xe3dd
+	.4byte	.LLST478
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x3e8
+	.uleb128 0x73
+	.4byte	0xe3f5
+	.4byte	.LLST479
+	.uleb128 0x74
+	.4byte	0xe401
+	.uleb128 0x72
+	.4byte	0xaa29
+	.4byte	.LBB394
+	.4byte	.Ldebug_ranges0+0x400
+	.byte	0x2
+	.2byte	0x11b
+	.4byte	0xc078
+	.uleb128 0x4f
+	.4byte	0xaa39
+	.4byte	.LLST480
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x400
+	.uleb128 0x74
+	.4byte	0xe76b
+	.uleb128 0x74
+	.4byte	0xe774
+	.byte	0
+	.byte	0
+	.uleb128 0x72
+	.4byte	0xa8c4
+	.4byte	.LBB400
+	.4byte	.Ldebug_ranges0+0x420
+	.byte	0x2
+	.2byte	0x11f
+	.4byte	0xc0a6
+	.uleb128 0x4f
+	.4byte	0xa8d5
+	.4byte	.LLST481
+	.uleb128 0x45
+	.4byte	.LVL1577
+	.4byte	0x1046f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xc8
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1572
+	.4byte	0xe40e
+	.4byte	0xc0ba
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1575
+	.4byte	0xa925
+	.4byte	0xc0ce
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1578
+	.4byte	0xa8e2
+	.4byte	0xc0e2
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1579
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC21
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 1
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1563
+	.4byte	0x5194
+	.4byte	0xc112
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x8000
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1564
+	.4byte	0x5194
+	.4byte	0xc127
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x8000
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1565
+	.4byte	0x5194
+	.4byte	0xc13c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x1000
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1566
+	.4byte	0x5194
+	.4byte	0xc151
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x8000
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1567
+	.4byte	0x5194
+	.4byte	0xc166
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x1000
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1569
+	.4byte	0xaa73
+	.4byte	0xc17b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1582
+	.4byte	0xa9ad
+	.4byte	0xc18f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1583
+	.4byte	0x530b
+	.4byte	0xc1b2
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR20
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x354
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1586
+	.4byte	0x52a5
+	.4byte	0xc1d8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR7
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR140+32
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1587
+	.4byte	0x52a5
+	.4byte	0xc1fe
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR197
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1588
+	.4byte	0xc334
+	.uleb128 0x48
+	.4byte	.LVL1589
+	.4byte	0xd8d7
+	.uleb128 0x48
+	.4byte	.LVL1590
+	.4byte	0xa968
+	.uleb128 0x48
+	.4byte	.LVL1591
+	.4byte	0xd49d
+	.uleb128 0x44
+	.4byte	.LVL1593
+	.4byte	0x103ff
+	.4byte	0xc239
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC22
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1594
+	.4byte	0xc334
+	.uleb128 0x48
+	.4byte	.LVL1595
+	.4byte	0xc54f
+	.uleb128 0x48
+	.4byte	.LVL1596
+	.4byte	0xced6
+	.uleb128 0x48
+	.4byte	.LVL1597
+	.4byte	0xd2cb
+	.uleb128 0x44
+	.4byte	.LVL1598
+	.4byte	0xd651
+	.4byte	0xc270
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1599
+	.4byte	0xd2cb
+	.uleb128 0x48
+	.4byte	.LVL1601
+	.4byte	0xd242
+	.uleb128 0x48
+	.4byte	.LVL1602
+	.4byte	0xc54f
+	.uleb128 0x44
+	.4byte	.LVL1608
+	.4byte	0xd8d7
+	.4byte	0xc29e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1609
+	.4byte	0xa968
+	.4byte	0xc2b1
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1610
+	.4byte	0xe19b
+	.4byte	0xc2c5
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1611
+	.4byte	0xd651
+	.4byte	0xc2d8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1612
+	.4byte	0xe175
+	.4byte	0xc2ec
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1613
+	.4byte	0xe3a1
+	.4byte	0xc300
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1614
+	.4byte	0xc415
+	.4byte	0xc317
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR138
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1617
+	.4byte	0xe3a1
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x45
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x144
+	.uleb128 0x5b
+	.4byte	.LASF1488
+	.byte	0x2
+	.2byte	0x860
+	.4byte	0x74
+	.4byte	.LFB251
+	.4byte	.LFE251-.LFB251
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xc3c9
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x862
+	.4byte	0x74
+	.4byte	.LLST308
+	.uleb128 0x5e
+	.4byte	.LASF1489
+	.byte	0x2
+	.2byte	0x863
+	.4byte	0xab0
+	.4byte	.LLST309
+	.uleb128 0x44
+	.4byte	.LVL905
+	.4byte	0xe5c8
+	.4byte	0xc38c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x72
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL909
+	.4byte	0x52a5
+	.4byte	0xc3a9
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR7
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL910
+	.4byte	0x52a5
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1490
+	.byte	0x2
+	.2byte	0x85a
+	.4byte	0x74
+	.4byte	.LFB250
+	.4byte	.LFE250-.LFB250
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xc415
+	.uleb128 0x5c
+	.4byte	.LASF1491
+	.byte	0x2
+	.2byte	0x85a
+	.4byte	0x8b6
+	.4byte	.LLST307
+	.uleb128 0x45
+	.4byte	.LVL902
+	.4byte	0x52a5
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR138
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x800
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1492
+	.byte	0x2
+	.2byte	0x82a
+	.4byte	0x74
+	.4byte	.LFB249
+	.4byte	.LFE249-.LFB249
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xc54f
+	.uleb128 0x5c
+	.4byte	.LASF1491
+	.byte	0x2
+	.2byte	0x82a
+	.4byte	0x8b6
+	.4byte	.LLST413
+	.uleb128 0x71
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x82c
+	.4byte	0x74
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x71
+	.ascii	"j\000"
+	.byte	0x2
+	.2byte	0x82c
+	.4byte	0x74
+	.uleb128 0x1
+	.byte	0x56
+	.uleb128 0x38
+	.4byte	.LASF1493
+	.byte	0x2
+	.2byte	0x82f
+	.4byte	0x7dc
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x5e
+	.4byte	.LASF1249
+	.byte	0x2
+	.2byte	0x836
+	.4byte	0x74
+	.4byte	.LLST414
+	.uleb128 0x38
+	.4byte	.LASF1494
+	.byte	0x2
+	.2byte	0x837
+	.4byte	0x3a
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -52
+	.uleb128 0x44
+	.4byte	.LVL1272
+	.4byte	0xe19b
+	.4byte	0xc499
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1273
+	.4byte	0x530b
+	.4byte	0xc4b9
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x800
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1275
+	.4byte	0xe3a1
+	.4byte	0xc4cd
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1276
+	.4byte	0xe175
+	.4byte	0xc4e1
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1279
+	.4byte	0xe3a1
+	.4byte	0xc4f5
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1280
+	.4byte	0xdd4c
+	.4byte	0xc50d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1285
+	.4byte	0x103ff
+	.4byte	0xc52a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC15
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1286
+	.4byte	0x52a5
+	.4byte	0xc545
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x800
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1288
+	.4byte	0xd2cb
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1495
+	.byte	0x2
+	.2byte	0x7ff
+	.4byte	.LFB248
+	.4byte	.LFE248-.LFB248
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xc61a
+	.uleb128 0x5e
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x801
+	.4byte	0x74
+	.4byte	.LLST283
+	.uleb128 0x44
+	.4byte	.LVL796
+	.4byte	0x530b
+	.4byte	0xc597
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR26
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x38
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL797
+	.4byte	0x530b
+	.4byte	0xc5ba
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR17
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL798
+	.4byte	0x530b
+	.4byte	0xc5dd
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR23
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x80
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL801
+	.4byte	0xe5c8
+	.4byte	0xc5fd
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x72
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL807
+	.4byte	0xe5c8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x72
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1496
+	.byte	0x2
+	.2byte	0x7bf
+	.4byte	.LFB247
+	.4byte	.LFE247-.LFB247
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xc6a1
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x7bf
+	.4byte	0x3a
+	.4byte	.LLST415
+	.uleb128 0x5c
+	.4byte	.LASF1497
+	.byte	0x2
+	.2byte	0x7bf
+	.4byte	0x74
+	.4byte	.LLST416
+	.uleb128 0x5c
+	.4byte	.LASF1498
+	.byte	0x2
+	.2byte	0x7bf
+	.4byte	0x57
+	.4byte	.LLST417
+	.uleb128 0x5e
+	.4byte	.LASF923
+	.byte	0x2
+	.2byte	0x7c1
+	.4byte	0x3a
+	.4byte	.LLST418
+	.uleb128 0x44
+	.4byte	.LVL1294
+	.4byte	0x530b
+	.4byte	0xc68b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x8000
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1296
+	.4byte	0xda49
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x6e
+	.4byte	.LASF1499
+	.byte	0x2
+	.2byte	0x7b1
+	.byte	0x1
+	.4byte	0xc6c7
+	.uleb128 0x56
+	.4byte	.LASF22
+	.byte	0x2
+	.2byte	0x7b3
+	.4byte	0x3a
+	.uleb128 0x56
+	.4byte	.LASF923
+	.byte	0x2
+	.2byte	0x7b4
+	.4byte	0x3a
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1500
+	.byte	0x2
+	.2byte	0x788
+	.4byte	0x74
+	.4byte	.LFB245
+	.4byte	.LFE245-.LFB245
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xc7c8
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x788
+	.4byte	0x3a
+	.4byte	.LLST397
+	.uleb128 0x5c
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0x788
+	.4byte	0x74
+	.4byte	.LLST398
+	.uleb128 0x5c
+	.4byte	.LASF17
+	.byte	0x2
+	.2byte	0x788
+	.4byte	0x8b6
+	.4byte	.LLST399
+	.uleb128 0x5c
+	.4byte	.LASF18
+	.byte	0x2
+	.2byte	0x788
+	.4byte	0x8b6
+	.4byte	.LLST400
+	.uleb128 0x5e
+	.4byte	.LASF15
+	.byte	0x2
+	.2byte	0x78a
+	.4byte	0x74
+	.4byte	.LLST401
+	.uleb128 0x5e
+	.4byte	.LASF1501
+	.byte	0x2
+	.2byte	0x78b
+	.4byte	0x74
+	.4byte	.LLST402
+	.uleb128 0x71
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x78c
+	.4byte	0x74
+	.uleb128 0x1
+	.byte	0x58
+	.uleb128 0x5e
+	.4byte	.LASF79
+	.byte	0x2
+	.2byte	0x78d
+	.4byte	0x3a
+	.4byte	.LLST403
+	.uleb128 0x5e
+	.4byte	.LASF77
+	.byte	0x2
+	.2byte	0x78e
+	.4byte	0x3a
+	.4byte	.LLST404
+	.uleb128 0x44
+	.4byte	.LVL1208
+	.4byte	0xa835
+	.4byte	0xc781
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1216
+	.4byte	0xc7c8
+	.4byte	0xc7a4
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR20+4
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1217
+	.4byte	0xdd4c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -36
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1502
+	.byte	0x2
+	.2byte	0x76c
+	.4byte	.LFB244
+	.4byte	.LFE244-.LFB244
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xc8cb
+	.uleb128 0x5c
+	.4byte	.LASF22
+	.byte	0x2
+	.2byte	0x76c
+	.4byte	0x3a
+	.4byte	.LLST86
+	.uleb128 0x5c
+	.4byte	.LASF76
+	.byte	0x2
+	.2byte	0x76c
+	.4byte	0x3a
+	.4byte	.LLST87
+	.uleb128 0x5c
+	.4byte	.LASF78
+	.byte	0x2
+	.2byte	0x76c
+	.4byte	0x8b6
+	.4byte	.LLST88
+	.uleb128 0x5c
+	.4byte	.LASF864
+	.byte	0x2
+	.2byte	0x76c
+	.4byte	0x3a
+	.4byte	.LLST89
+	.uleb128 0x56
+	.4byte	.LASF273
+	.byte	0x2
+	.2byte	0x76e
+	.4byte	0x15bc
+	.uleb128 0x5d
+	.ascii	"reg\000"
+	.byte	0x2
+	.2byte	0x76f
+	.4byte	0x3a
+	.4byte	.LLST90
+	.uleb128 0x5e
+	.4byte	.LASF80
+	.byte	0x2
+	.2byte	0x770
+	.4byte	0xc328
+	.4byte	.LLST91
+	.uleb128 0x72
+	.4byte	0xaa29
+	.4byte	.LBB197
+	.4byte	.Ldebug_ranges0+0xd0
+	.byte	0x2
+	.2byte	0x77b
+	.4byte	0xc878
+	.uleb128 0x4f
+	.4byte	0xaa39
+	.4byte	.LLST92
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0xd0
+	.uleb128 0x74
+	.4byte	0xe76b
+	.uleb128 0x74
+	.4byte	0xe774
+	.byte	0
+	.byte	0
+	.uleb128 0x72
+	.4byte	0xa8c4
+	.4byte	.LBB201
+	.4byte	.Ldebug_ranges0+0xe8
+	.byte	0x2
+	.2byte	0x780
+	.4byte	0xc8a6
+	.uleb128 0x4f
+	.4byte	0xa8d5
+	.4byte	.LLST93
+	.uleb128 0x45
+	.4byte	.LVL176
+	.4byte	0x1046f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xc8
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL164
+	.4byte	0xa925
+	.4byte	0xc8ba
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL168
+	.4byte	0xa8e2
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1503
+	.byte	0x2
+	.2byte	0x73a
+	.4byte	0x74
+	.4byte	.LFB243
+	.4byte	.LFE243-.LFB243
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xca62
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x73a
+	.4byte	0x3a
+	.4byte	.LLST386
+	.uleb128 0x5c
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0x73a
+	.4byte	0x74
+	.4byte	.LLST387
+	.uleb128 0x5c
+	.4byte	.LASF17
+	.byte	0x2
+	.2byte	0x73a
+	.4byte	0x8b6
+	.4byte	.LLST388
+	.uleb128 0x5c
+	.4byte	.LASF18
+	.byte	0x2
+	.2byte	0x73a
+	.4byte	0x8b6
+	.4byte	.LLST389
+	.uleb128 0x5e
+	.4byte	.LASF15
+	.byte	0x2
+	.2byte	0x73c
+	.4byte	0x74
+	.4byte	.LLST390
+	.uleb128 0x5e
+	.4byte	.LASF1501
+	.byte	0x2
+	.2byte	0x73d
+	.4byte	0x74
+	.4byte	.LLST391
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x73e
+	.4byte	0x74
+	.4byte	.LLST392
+	.uleb128 0x56
+	.4byte	.LASF273
+	.byte	0x2
+	.2byte	0x73f
+	.4byte	0x15bc
+	.uleb128 0x5e
+	.4byte	.LASF1504
+	.byte	0x2
+	.2byte	0x740
+	.4byte	0x3a
+	.4byte	.LLST393
+	.uleb128 0x72
+	.4byte	0xaa29
+	.4byte	.LBB327
+	.4byte	.Ldebug_ranges0+0x2d0
+	.byte	0x2
+	.2byte	0x746
+	.4byte	0xc99d
+	.uleb128 0x4f
+	.4byte	0xaa39
+	.4byte	.LLST394
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x2d0
+	.uleb128 0x74
+	.4byte	0xe76b
+	.uleb128 0x74
+	.4byte	0xe774
+	.byte	0
+	.byte	0
+	.uleb128 0x72
+	.4byte	0xa8c4
+	.4byte	.LBB331
+	.4byte	.Ldebug_ranges0+0x2e8
+	.byte	0x2
+	.2byte	0x75e
+	.4byte	0xc9cb
+	.uleb128 0x4f
+	.4byte	0xa8d5
+	.4byte	.LLST395
+	.uleb128 0x45
+	.4byte	.LVL1186
+	.4byte	0x1046f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xc8
+	.byte	0
+	.byte	0
+	.uleb128 0x72
+	.4byte	0xa8c4
+	.4byte	.LBB335
+	.4byte	.Ldebug_ranges0+0x300
+	.byte	0x2
+	.2byte	0x74a
+	.4byte	0xc9f9
+	.uleb128 0x4f
+	.4byte	0xa8d5
+	.4byte	.LLST396
+	.uleb128 0x45
+	.4byte	.LVL1195
+	.4byte	0x1046f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xc8
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1180
+	.4byte	0xa835
+	.4byte	0xca0d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1189
+	.4byte	0x103ff
+	.4byte	0xca3e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC14
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -48
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1196
+	.4byte	0xdd4c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -48
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1505
+	.byte	0x2
+	.2byte	0x71b
+	.4byte	0x74
+	.4byte	.LFB242
+	.4byte	.LFE242-.LFB242
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xcb8c
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x71b
+	.4byte	0x3a
+	.4byte	.LLST379
+	.uleb128 0x5c
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0x71b
+	.4byte	0x74
+	.4byte	.LLST380
+	.uleb128 0x5c
+	.4byte	.LASF17
+	.byte	0x2
+	.2byte	0x71b
+	.4byte	0x8b6
+	.4byte	.LLST381
+	.uleb128 0x5c
+	.4byte	.LASF18
+	.byte	0x2
+	.2byte	0x71b
+	.4byte	0x8b6
+	.4byte	.LLST382
+	.uleb128 0x5e
+	.4byte	.LASF15
+	.byte	0x2
+	.2byte	0x71d
+	.4byte	0x74
+	.4byte	.LLST383
+	.uleb128 0x5e
+	.4byte	.LASF1501
+	.byte	0x2
+	.2byte	0x71e
+	.4byte	0x74
+	.4byte	.LLST384
+	.uleb128 0x71
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x71f
+	.4byte	0x74
+	.uleb128 0x1
+	.byte	0x56
+	.uleb128 0x56
+	.4byte	.LASF273
+	.byte	0x2
+	.2byte	0x720
+	.4byte	0x15bc
+	.uleb128 0x72
+	.4byte	0xaa29
+	.4byte	.LBB323
+	.4byte	.Ldebug_ranges0+0x2b8
+	.byte	0x2
+	.2byte	0x723
+	.4byte	0xcb22
+	.uleb128 0x4f
+	.4byte	0xaa39
+	.4byte	.LLST385
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x2b8
+	.uleb128 0x74
+	.4byte	0xe76b
+	.uleb128 0x74
+	.4byte	0xe774
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1161
+	.4byte	0xa835
+	.4byte	0xcb36
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1164
+	.4byte	0xcb8c
+	.4byte	0xcb4f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1167
+	.4byte	0xcb8c
+	.4byte	0xcb69
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1168
+	.4byte	0xdd4c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1506
+	.byte	0x2
+	.2byte	0x70e
+	.4byte	.LFB241
+	.4byte	.LFE241-.LFB241
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xcbff
+	.uleb128 0x5c
+	.4byte	.LASF273
+	.byte	0x2
+	.2byte	0x70e
+	.4byte	0x15bc
+	.4byte	.LLST52
+	.uleb128 0x5c
+	.4byte	.LASF864
+	.byte	0x2
+	.2byte	0x70e
+	.4byte	0x3a
+	.4byte	.LLST53
+	.uleb128 0x5d
+	.ascii	"reg\000"
+	.byte	0x2
+	.2byte	0x710
+	.4byte	0x74
+	.4byte	.LLST54
+	.uleb128 0x8a
+	.4byte	0xa8c4
+	.4byte	.LBB184
+	.4byte	.Ldebug_ranges0+0x80
+	.byte	0x2
+	.2byte	0x717
+	.uleb128 0x4f
+	.4byte	0xa8d5
+	.4byte	.LLST55
+	.uleb128 0x45
+	.4byte	.LVL89
+	.4byte	0x1046f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x12c
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1507
+	.byte	0x2
+	.2byte	0x6cc
+	.4byte	0x74
+	.4byte	.LFB240
+	.4byte	.LFE240-.LFB240
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xcddf
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x6cc
+	.4byte	0x3a
+	.4byte	.LLST370
+	.uleb128 0x5c
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0x6cc
+	.4byte	0x74
+	.4byte	.LLST371
+	.uleb128 0x5c
+	.4byte	.LASF17
+	.byte	0x2
+	.2byte	0x6cc
+	.4byte	0x8b6
+	.4byte	.LLST372
+	.uleb128 0x5c
+	.4byte	.LASF18
+	.byte	0x2
+	.2byte	0x6cc
+	.4byte	0x8b6
+	.4byte	.LLST373
+	.uleb128 0x5e
+	.4byte	.LASF15
+	.byte	0x2
+	.2byte	0x6ce
+	.4byte	0x74
+	.4byte	.LLST374
+	.uleb128 0x5e
+	.4byte	.LASF1501
+	.byte	0x2
+	.2byte	0x6cf
+	.4byte	0x74
+	.4byte	.LLST375
+	.uleb128 0x5e
+	.4byte	.LASF1508
+	.byte	0x2
+	.2byte	0x6d0
+	.4byte	0x74
+	.4byte	.LLST376
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x6d1
+	.4byte	0x74
+	.4byte	.LLST377
+	.uleb128 0x56
+	.4byte	.LASF273
+	.byte	0x2
+	.2byte	0x6d2
+	.4byte	0x15bc
+	.uleb128 0x72
+	.4byte	0xaa29
+	.4byte	.LBB315
+	.4byte	.Ldebug_ranges0+0x290
+	.byte	0x2
+	.2byte	0x6d5
+	.4byte	0xccd1
+	.uleb128 0x4f
+	.4byte	0xaa39
+	.4byte	.LLST378
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x290
+	.uleb128 0x74
+	.4byte	0xe76b
+	.uleb128 0x74
+	.4byte	0xe774
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1128
+	.4byte	0xa835
+	.4byte	0xcce5
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1132
+	.4byte	0xa9ad
+	.4byte	0xccf9
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1139
+	.4byte	0xce51
+	.4byte	0xcd12
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1141
+	.4byte	0xa835
+	.4byte	0xcd26
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1142
+	.4byte	0xa9ad
+	.4byte	0xcd3a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1145
+	.4byte	0xce51
+	.4byte	0xcd54
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1146
+	.4byte	0xa9ad
+	.4byte	0xcd68
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1147
+	.4byte	0xdd4c
+	.4byte	0xcd90
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -36
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -44
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1150
+	.4byte	0xa9ad
+	.4byte	0xcda4
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1155
+	.4byte	0xcddf
+	.uleb128 0x44
+	.4byte	.LVL1156
+	.4byte	0xdd4c
+	.4byte	0xcdd5
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -36
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -44
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1159
+	.4byte	0xcddf
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1509
+	.byte	0x2
+	.2byte	0x6ba
+	.4byte	.LFB239
+	.4byte	.LFE239-.LFB239
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xce51
+	.uleb128 0x5c
+	.4byte	.LASF273
+	.byte	0x2
+	.2byte	0x6ba
+	.4byte	0x15bc
+	.4byte	.LLST48
+	.uleb128 0x5c
+	.4byte	.LASF864
+	.byte	0x2
+	.2byte	0x6ba
+	.4byte	0x3a
+	.4byte	.LLST49
+	.uleb128 0x5d
+	.ascii	"reg\000"
+	.byte	0x2
+	.2byte	0x6bc
+	.4byte	0x74
+	.4byte	.LLST50
+	.uleb128 0x8a
+	.4byte	0xa8c4
+	.4byte	.LBB180
+	.4byte	.Ldebug_ranges0+0x68
+	.byte	0x2
+	.2byte	0x6c1
+	.uleb128 0x4f
+	.4byte	0xa8d5
+	.4byte	.LLST51
+	.uleb128 0x45
+	.4byte	.LVL81
+	.4byte	0x1046f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xc8
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1510
+	.byte	0x2
+	.2byte	0x6a9
+	.4byte	.LFB238
+	.4byte	.LFE238-.LFB238
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xced6
+	.uleb128 0x5c
+	.4byte	.LASF273
+	.byte	0x2
+	.2byte	0x6a9
+	.4byte	0x15bc
+	.4byte	.LLST113
+	.uleb128 0x5c
+	.4byte	.LASF864
+	.byte	0x2
+	.2byte	0x6a9
+	.4byte	0x3a
+	.4byte	.LLST114
+	.uleb128 0x5d
+	.ascii	"reg\000"
+	.byte	0x2
+	.2byte	0x6ab
+	.4byte	0x74
+	.4byte	.LLST115
+	.uleb128 0x89
+	.4byte	0xa8c4
+	.4byte	.LBB221
+	.4byte	.LBE221-.LBB221
+	.byte	0x2
+	.2byte	0x6af
+	.4byte	0xcec6
+	.uleb128 0x4f
+	.4byte	0xa8d5
+	.4byte	.LLST116
+	.uleb128 0x45
+	.4byte	.LVL229
+	.4byte	0x1046f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xc8
+	.byte	0
+	.byte	0
+	.uleb128 0x4d
+	.4byte	.LVL232
+	.4byte	0xa835
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x6e
+	.4byte	.LASF1511
+	.byte	0x2
+	.2byte	0x689
+	.byte	0x1
+	.4byte	0xcef0
+	.uleb128 0x55
+	.4byte	.LASF923
+	.byte	0x2
+	.2byte	0x689
+	.4byte	0x8f
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1512
+	.byte	0x2
+	.2byte	0x551
+	.4byte	.LFB236
+	.4byte	.LFE236-.LFB236
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xd1ee
+	.uleb128 0x5c
+	.4byte	.LASF923
+	.byte	0x2
+	.2byte	0x551
+	.4byte	0x8f
+	.4byte	.LLST452
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x553
+	.4byte	0x84
+	.4byte	.LLST453
+	.uleb128 0x5d
+	.ascii	"j\000"
+	.byte	0x2
+	.2byte	0x553
+	.4byte	0x84
+	.4byte	.LLST454
+	.uleb128 0x5d
+	.ascii	"reg\000"
+	.byte	0x2
+	.2byte	0x554
+	.4byte	0x3a
+	.4byte	.LLST455
+	.uleb128 0x5e
+	.4byte	.LASF22
+	.byte	0x2
+	.2byte	0x555
+	.4byte	0x3a
+	.4byte	.LLST456
+	.uleb128 0x5e
+	.4byte	.LASF1455
+	.byte	0x2
+	.2byte	0x556
+	.4byte	0x3a
+	.4byte	.LLST457
+	.uleb128 0x5e
+	.4byte	.LASF76
+	.byte	0x2
+	.2byte	0x557
+	.4byte	0x3a
+	.4byte	.LLST458
+	.uleb128 0x5e
+	.4byte	.LASF77
+	.byte	0x2
+	.2byte	0x558
+	.4byte	0x3a
+	.4byte	.LLST459
+	.uleb128 0x38
+	.4byte	.LASF78
+	.byte	0x2
+	.2byte	0x559
+	.4byte	0x8b6
+	.uleb128 0x6
+	.byte	0x3
+	.4byte	gReadRetryInfo+4
+	.byte	0x9f
+	.uleb128 0x56
+	.4byte	.LASF273
+	.byte	0x2
+	.2byte	0x55a
+	.4byte	0x15bc
+	.uleb128 0x5e
+	.4byte	.LASF1513
+	.byte	0x2
+	.2byte	0x55b
+	.4byte	0x8b6
+	.4byte	.LLST460
+	.uleb128 0x5e
+	.4byte	.LASF1514
+	.byte	0x2
+	.2byte	0x55c
+	.4byte	0x13e
+	.4byte	.LLST461
+	.uleb128 0x5e
+	.4byte	.LASF1515
+	.byte	0x2
+	.2byte	0x55d
+	.4byte	0x8f
+	.4byte	.LLST462
+	.uleb128 0x6f
+	.4byte	.LBB353
+	.4byte	.LBE353-.LBB353
+	.4byte	0xd045
+	.uleb128 0x5e
+	.4byte	.LASF80
+	.byte	0x2
+	.2byte	0x594
+	.4byte	0xc328
+	.4byte	.LLST463
+	.uleb128 0x72
+	.4byte	0xaa29
+	.4byte	.LBB354
+	.4byte	.Ldebug_ranges0+0x330
+	.byte	0x2
+	.2byte	0x597
+	.4byte	0xd019
+	.uleb128 0x8b
+	.4byte	0xaa39
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x330
+	.uleb128 0x74
+	.4byte	0xe76b
+	.uleb128 0x74
+	.4byte	0xe774
+	.byte	0
+	.byte	0
+	.uleb128 0x8a
+	.4byte	0xa8c4
+	.4byte	.LBB361
+	.4byte	.Ldebug_ranges0+0x358
+	.byte	0x2
+	.2byte	0x59c
+	.uleb128 0x4f
+	.4byte	0xa8d5
+	.4byte	.LLST464
+	.uleb128 0x45
+	.4byte	.LVL1459
+	.4byte	0x1046f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x50
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x7a
+	.4byte	.LBB366
+	.4byte	.LBE366-.LBB366
+	.uleb128 0x5e
+	.4byte	.LASF1516
+	.byte	0x2
+	.2byte	0x5af
+	.4byte	0x3a
+	.4byte	.LLST465
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x370
+	.uleb128 0x5e
+	.4byte	.LASF80
+	.byte	0x2
+	.2byte	0x5b2
+	.4byte	0xc328
+	.4byte	.LLST466
+	.uleb128 0x6f
+	.4byte	.LBB372
+	.4byte	.LBE372-.LBB372
+	.4byte	0xd08d
+	.uleb128 0x56
+	.4byte	.LASF864
+	.byte	0x2
+	.2byte	0x605
+	.4byte	0x8f
+	.byte	0
+	.uleb128 0x6b
+	.4byte	.Ldebug_ranges0+0x3a0
+	.4byte	0xd0dd
+	.uleb128 0x5e
+	.4byte	.LASF1517
+	.byte	0x2
+	.2byte	0x60b
+	.4byte	0x8f
+	.4byte	.LLST468
+	.uleb128 0x5d
+	.ascii	"mod\000"
+	.byte	0x2
+	.2byte	0x60c
+	.4byte	0x74
+	.4byte	.LLST469
+	.uleb128 0x5e
+	.4byte	.LASF243
+	.byte	0x2
+	.2byte	0x60d
+	.4byte	0x74
+	.4byte	.LLST470
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x3b8
+	.uleb128 0x5e
+	.4byte	.LASF1518
+	.byte	0x2
+	.2byte	0x610
+	.4byte	0x74
+	.4byte	.LLST471
+	.byte	0
+	.byte	0
+	.uleb128 0x72
+	.4byte	0xaa29
+	.4byte	.LBB368
+	.4byte	.Ldebug_ranges0+0x388
+	.byte	0x2
+	.2byte	0x5b6
+	.4byte	0xd10b
+	.uleb128 0x4f
+	.4byte	0xaa39
+	.4byte	.LLST467
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x388
+	.uleb128 0x74
+	.4byte	0xe76b
+	.uleb128 0x74
+	.4byte	0xe774
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1474
+	.4byte	0xa835
+	.4byte	0xd11f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1480
+	.4byte	0xa835
+	.4byte	0xd133
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1491
+	.4byte	0x103ff
+	.4byte	0xd14f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC19
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1522
+	.4byte	0x4d68
+	.4byte	0xd172
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC20
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x400
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1523
+	.4byte	0x103ff
+	.4byte	0xd18e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC19
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1529
+	.4byte	0x103ff
+	.4byte	0xd1aa
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC19
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1541
+	.4byte	0xa835
+	.4byte	0xd1be
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1542
+	.4byte	0xe2e2
+	.4byte	0xd1db
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x91
+	.sleb128 -84
+	.byte	0x94
+	.byte	0x1
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1543
+	.4byte	0xa835
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x54
+	.4byte	.LASF1519
+	.byte	0x2
+	.2byte	0x41c
+	.4byte	0x84
+	.byte	0x1
+	.4byte	0xd239
+	.uleb128 0x55
+	.4byte	.LASF1322
+	.byte	0x2
+	.2byte	0x41c
+	.4byte	0x57
+	.uleb128 0x57
+	.ascii	"sts\000"
+	.byte	0x2
+	.2byte	0x41e
+	.4byte	0x84
+	.uleb128 0x56
+	.4byte	.LASF271
+	.byte	0x2
+	.2byte	0x41f
+	.4byte	0x73e
+	.uleb128 0x57
+	.ascii	"req\000"
+	.byte	0x2
+	.2byte	0x420
+	.4byte	0xc5
+	.uleb128 0x8c
+	.ascii	"out\000"
+	.byte	0x2
+	.2byte	0x431
+	.byte	0
+	.uleb128 0x60
+	.4byte	.LASF1520
+	.byte	0x2
+	.2byte	0x3d0
+	.byte	0x1
+	.uleb128 0x69
+	.4byte	.LASF1521
+	.byte	0x2
+	.2byte	0x3a1
+	.4byte	.LFB233
+	.4byte	.LFE233-.LFB233
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xd2b5
+	.uleb128 0x5c
+	.4byte	.LASF923
+	.byte	0x2
+	.2byte	0x3a1
+	.4byte	0x74
+	.4byte	.LLST279
+	.uleb128 0x5c
+	.4byte	.LASF1522
+	.byte	0x2
+	.2byte	0x3a1
+	.4byte	0x74
+	.4byte	.LLST280
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x3a3
+	.4byte	0x57
+	.4byte	.LLST281
+	.uleb128 0x5d
+	.ascii	"j\000"
+	.byte	0x2
+	.2byte	0x3a3
+	.4byte	0x57
+	.4byte	.LLST282
+	.uleb128 0x45
+	.4byte	.LVL751
+	.4byte	0x530b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR117
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x400
+	.byte	0
+	.byte	0
+	.uleb128 0x7e
+	.4byte	.LASF1523
+	.byte	0x2
+	.2byte	0x39c
+	.4byte	0x74
+	.4byte	.LFB232
+	.4byte	.LFE232-.LFB232
+	.uleb128 0x1
+	.byte	0x9c
+	.uleb128 0x5b
+	.4byte	.LASF1524
+	.byte	0x2
+	.2byte	0x365
+	.4byte	0x74
+	.4byte	.LFB231
+	.4byte	.LFE231-.LFB231
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xd49d
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x367
+	.4byte	0x74
+	.4byte	.LLST411
+	.uleb128 0x5e
+	.4byte	.LASF1525
+	.byte	0x2
+	.2byte	0x368
+	.4byte	0x74
+	.4byte	.LLST412
+	.uleb128 0x44
+	.4byte	.LVL1244
+	.4byte	0xe3a1
+	.4byte	0xd317
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1245
+	.4byte	0x530b
+	.4byte	0xd331
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x800
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1246
+	.4byte	0x52a5
+	.4byte	0xd34e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR22
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1247
+	.4byte	0x52a5
+	.4byte	0xd36a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR26
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x38
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1248
+	.4byte	0x52a5
+	.4byte	0xd387
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR17
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1249
+	.4byte	0x52a5
+	.4byte	0xd3a4
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1250
+	.4byte	0x52a5
+	.4byte	0xd3c1
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR7
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1251
+	.4byte	0x52a5
+	.4byte	0xd3df
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR20
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x354
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1252
+	.4byte	0xd5f8
+	.4byte	0xd3fa
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 12
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x7f4
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1253
+	.4byte	0xe19b
+	.4byte	0xd40e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1255
+	.4byte	0xd968
+	.4byte	0xd426
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1256
+	.4byte	0xda49
+	.4byte	0xd43e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1257
+	.4byte	0xda49
+	.4byte	0xd456
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1258
+	.4byte	0xdd4c
+	.4byte	0xd46e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1259
+	.4byte	0xd5f8
+	.4byte	0xd48c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x7d
+	.sleb128 0
+	.byte	0x6
+	.byte	0x23
+	.uleb128 0xc
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x7f4
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1265
+	.4byte	0xe175
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x67
+	.4byte	.LASF1526
+	.byte	0x2
+	.2byte	0x329
+	.4byte	0x74
+	.4byte	.LFB230
+	.4byte	.LFE230-.LFB230
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xd5f8
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x32b
+	.4byte	0x74
+	.4byte	.LLST365
+	.uleb128 0x5d
+	.ascii	"j\000"
+	.byte	0x2
+	.2byte	0x32c
+	.4byte	0x74
+	.4byte	.LLST366
+	.uleb128 0x5e
+	.4byte	.LASF15
+	.byte	0x2
+	.2byte	0x32d
+	.4byte	0x74
+	.4byte	.LLST367
+	.uleb128 0x5e
+	.4byte	.LASF1527
+	.byte	0x2
+	.2byte	0x32e
+	.4byte	0x74
+	.4byte	.LLST368
+	.uleb128 0x38
+	.4byte	.LASF1493
+	.byte	0x2
+	.2byte	0x331
+	.4byte	0x7dc
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x5e
+	.4byte	.LASF1528
+	.byte	0x2
+	.2byte	0x338
+	.4byte	0x74
+	.4byte	.LLST369
+	.uleb128 0x44
+	.4byte	.LVL1099
+	.4byte	0xe19b
+	.4byte	0xd526
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1102
+	.4byte	0xe3a1
+	.4byte	0xd53a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1103
+	.4byte	0xdd4c
+	.4byte	0xd558
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1106
+	.4byte	0xdd4c
+	.4byte	0xd577
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -48
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1111
+	.4byte	0xd5f8
+	.4byte	0xd592
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 12
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x7f4
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1112
+	.4byte	0x52a5
+	.4byte	0xd5b3
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x78
+	.sleb128 160
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1113
+	.4byte	0x52a5
+	.4byte	0xd5d0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR7
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1114
+	.4byte	0x52a5
+	.4byte	0xd5ee
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR20
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x354
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1125
+	.4byte	0xe175
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1529
+	.byte	0x2
+	.2byte	0x31f
+	.4byte	0x74
+	.4byte	.LFB229
+	.4byte	.LFE229-.LFB229
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xd651
+	.uleb128 0x6d
+	.ascii	"buf\000"
+	.byte	0x2
+	.2byte	0x31f
+	.4byte	0x8b6
+	.4byte	.LLST44
+	.uleb128 0x6d
+	.ascii	"len\000"
+	.byte	0x2
+	.2byte	0x31f
+	.4byte	0x74
+	.4byte	.LLST45
+	.uleb128 0x5e
+	.4byte	.LASF94
+	.byte	0x2
+	.2byte	0x321
+	.4byte	0x74
+	.4byte	.LLST46
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x322
+	.4byte	0x74
+	.4byte	.LLST47
+	.byte	0
+	.uleb128 0x54
+	.4byte	.LASF1530
+	.byte	0x2
+	.2byte	0x30c
+	.4byte	0x74
+	.byte	0x1
+	.4byte	0xd687
+	.uleb128 0x55
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x30c
+	.4byte	0x3a
+	.uleb128 0x55
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0x30c
+	.4byte	0x74
+	.uleb128 0x56
+	.4byte	.LASF15
+	.byte	0x2
+	.2byte	0x30e
+	.4byte	0x74
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1531
+	.byte	0x2
+	.2byte	0x2ac
+	.4byte	0x74
+	.4byte	.LFB227
+	.4byte	.LFE227-.LFB227
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xd8d7
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x2ac
+	.4byte	0x3a
+	.4byte	.LLST338
+	.uleb128 0x5c
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0x2ac
+	.4byte	0x74
+	.4byte	.LLST339
+	.uleb128 0x5c
+	.4byte	.LASF17
+	.byte	0x2
+	.2byte	0x2ac
+	.4byte	0x8b6
+	.4byte	.LLST340
+	.uleb128 0x5c
+	.4byte	.LASF18
+	.byte	0x2
+	.2byte	0x2ac
+	.4byte	0x8b6
+	.4byte	.LLST341
+	.uleb128 0x5c
+	.4byte	.LASF923
+	.byte	0x2
+	.2byte	0x2ac
+	.4byte	0x74
+	.4byte	.LLST342
+	.uleb128 0x5e
+	.4byte	.LASF15
+	.byte	0x2
+	.2byte	0x2ae
+	.4byte	0x74
+	.4byte	.LLST343
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x2af
+	.4byte	0x74
+	.4byte	.LLST344
+	.uleb128 0x5e
+	.4byte	.LASF1532
+	.byte	0x2
+	.2byte	0x2b0
+	.4byte	0x74
+	.4byte	.LLST345
+	.uleb128 0x5e
+	.4byte	.LASF1533
+	.byte	0x2
+	.2byte	0x2b1
+	.4byte	0x74
+	.4byte	.LLST346
+	.uleb128 0x5e
+	.4byte	.LASF1534
+	.byte	0x2
+	.2byte	0x2b2
+	.4byte	0x74
+	.4byte	.LLST347
+	.uleb128 0x5e
+	.4byte	.LASF1535
+	.byte	0x2
+	.2byte	0x2b3
+	.4byte	0x74
+	.4byte	.LLST348
+	.uleb128 0x5e
+	.4byte	.LASF1536
+	.byte	0x2
+	.2byte	0x2b4
+	.4byte	0x74
+	.4byte	.LLST349
+	.uleb128 0x5e
+	.4byte	.LASF1537
+	.byte	0x2
+	.2byte	0x2b5
+	.4byte	0x74
+	.4byte	.LLST350
+	.uleb128 0x5e
+	.4byte	.LASF1538
+	.byte	0x2
+	.2byte	0x2b6
+	.4byte	0x74
+	.4byte	.LLST351
+	.uleb128 0x5e
+	.4byte	.LASF1468
+	.byte	0x2
+	.2byte	0x2b7
+	.4byte	0x74
+	.4byte	.LLST352
+	.uleb128 0x44
+	.4byte	.LVL1021
+	.4byte	0xd8d7
+	.4byte	0xd7a2
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1022
+	.4byte	0xa968
+	.4byte	0xd7b5
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1023
+	.4byte	0xe40e
+	.4byte	0xd7cb
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -48
+	.byte	0x94
+	.byte	0x1
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1024
+	.4byte	0xdd4c
+	.4byte	0xd7f5
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -48
+	.byte	0x94
+	.byte	0x1
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -44
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -52
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1027
+	.4byte	0xd8d7
+	.uleb128 0x48
+	.4byte	.LVL1028
+	.4byte	0xa968
+	.uleb128 0x44
+	.4byte	.LVL1031
+	.4byte	0x103ff
+	.4byte	0xd82b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC10
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -44
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1035
+	.4byte	0xaa04
+	.4byte	0xd83f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1036
+	.4byte	0xdd4c
+	.4byte	0xd869
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -48
+	.byte	0x94
+	.byte	0x1
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -44
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -52
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1044
+	.4byte	0x103ff
+	.4byte	0xd886
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC11
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1045
+	.4byte	0xaa04
+	.4byte	0xd89a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1046
+	.4byte	0x103ff
+	.4byte	0xd8bf
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC12
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -48
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -44
+	.byte	0x6
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1047
+	.4byte	0xaa04
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x91
+	.sleb128 -36
+	.byte	0x6
+	.byte	0x9
+	.byte	0xf4
+	.byte	0x24
+	.byte	0x9
+	.byte	0xfc
+	.byte	0x25
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1539
+	.byte	0x2
+	.2byte	0x25d
+	.4byte	0x74
+	.4byte	.LFB226
+	.4byte	.LFE226-.LFB226
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xd968
+	.uleb128 0x5c
+	.4byte	.LASF923
+	.byte	0x2
+	.2byte	0x25d
+	.4byte	0x74
+	.4byte	.LLST110
+	.uleb128 0x5e
+	.4byte	.LASF22
+	.byte	0x2
+	.2byte	0x25f
+	.4byte	0x3a
+	.4byte	.LLST111
+	.uleb128 0x56
+	.4byte	.LASF273
+	.byte	0x2
+	.2byte	0x260
+	.4byte	0x15bc
+	.uleb128 0x5e
+	.4byte	.LASF1540
+	.byte	0x2
+	.2byte	0x261
+	.4byte	0x3a
+	.4byte	.LLST112
+	.uleb128 0x72
+	.4byte	0xaa29
+	.4byte	.LBB217
+	.4byte	.Ldebug_ranges0+0x130
+	.byte	0x2
+	.2byte	0x264
+	.4byte	0xd958
+	.uleb128 0x8b
+	.4byte	0xaa39
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x130
+	.uleb128 0x74
+	.4byte	0xe76b
+	.uleb128 0x74
+	.4byte	0xe774
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL224
+	.4byte	0xa835
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1541
+	.byte	0x2
+	.2byte	0x24c
+	.4byte	0x74
+	.4byte	.LFB225
+	.4byte	.LFE225-.LFB225
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xda49
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x24c
+	.4byte	0x3a
+	.4byte	.LLST106
+	.uleb128 0x5c
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0x24c
+	.4byte	0x74
+	.4byte	.LLST107
+	.uleb128 0x5c
+	.4byte	.LASF923
+	.byte	0x2
+	.2byte	0x24c
+	.4byte	0x74
+	.4byte	.LLST108
+	.uleb128 0x5e
+	.4byte	.LASF15
+	.byte	0x2
+	.2byte	0x250
+	.4byte	0x74
+	.4byte	.LLST109
+	.uleb128 0x44
+	.4byte	.LVL209
+	.4byte	0xa835
+	.4byte	0xd9d6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL210
+	.4byte	0xa925
+	.4byte	0xd9ea
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL211
+	.4byte	0xe067
+	.4byte	0xda0a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL212
+	.4byte	0xa835
+	.4byte	0xda1e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL213
+	.4byte	0xde59
+	.4byte	0xda38
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL216
+	.4byte	0xa8e2
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1542
+	.byte	0x2
+	.2byte	0x231
+	.4byte	0x74
+	.4byte	.LFB224
+	.4byte	.LFE224-.LFB224
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xdb8a
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x231
+	.4byte	0x3a
+	.4byte	.LLST405
+	.uleb128 0x5c
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0x231
+	.4byte	0x74
+	.4byte	.LLST406
+	.uleb128 0x5c
+	.4byte	.LASF17
+	.byte	0x2
+	.2byte	0x231
+	.4byte	0x8b6
+	.4byte	.LLST407
+	.uleb128 0x5c
+	.4byte	.LASF18
+	.byte	0x2
+	.2byte	0x231
+	.4byte	0x8b6
+	.4byte	.LLST408
+	.uleb128 0x5e
+	.4byte	.LASF15
+	.byte	0x2
+	.2byte	0x235
+	.4byte	0x74
+	.4byte	.LLST409
+	.uleb128 0x5e
+	.4byte	.LASF58
+	.byte	0x2
+	.2byte	0x236
+	.4byte	0x74
+	.4byte	.LLST410
+	.uleb128 0x44
+	.4byte	.LVL1230
+	.4byte	0xa835
+	.4byte	0xdad7
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1231
+	.4byte	0xa925
+	.4byte	0xdaeb
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1232
+	.4byte	0xe0ed
+	.4byte	0xdb05
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1233
+	.4byte	0xa045
+	.4byte	0xdb31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1234
+	.4byte	0xdf6d
+	.4byte	0xdb4b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1235
+	.4byte	0xa835
+	.4byte	0xdb5f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1236
+	.4byte	0xde59
+	.4byte	0xdb79
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1239
+	.4byte	0xa8e2
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1543
+	.byte	0x2
+	.2byte	0x205
+	.4byte	0x74
+	.4byte	.LFB223
+	.4byte	.LFE223-.LFB223
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xdd4c
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x205
+	.4byte	0x3a
+	.4byte	.LLST353
+	.uleb128 0x5c
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0x205
+	.4byte	0x74
+	.4byte	.LLST354
+	.uleb128 0x5c
+	.4byte	.LASF17
+	.byte	0x2
+	.2byte	0x205
+	.4byte	0x8b6
+	.4byte	.LLST355
+	.uleb128 0x5c
+	.4byte	.LASF18
+	.byte	0x2
+	.2byte	0x205
+	.4byte	0x8b6
+	.4byte	.LLST356
+	.uleb128 0x5e
+	.4byte	.LASF15
+	.byte	0x2
+	.2byte	0x207
+	.4byte	0x74
+	.4byte	.LLST357
+	.uleb128 0x6b
+	.4byte	.Ldebug_ranges0+0x278
+	.4byte	0xdc30
+	.uleb128 0x5e
+	.4byte	.LASF1463
+	.byte	0x2
+	.2byte	0x20b
+	.4byte	0x3a
+	.4byte	.LLST359
+	.uleb128 0x45
+	.4byte	.LVL1068
+	.4byte	0xdd4c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x6b
+	.4byte	.Ldebug_ranges0+0x260
+	.4byte	0xdc8c
+	.uleb128 0x5e
+	.4byte	.LASF1468
+	.byte	0x2
+	.2byte	0x212
+	.4byte	0x74
+	.4byte	.LLST358
+	.uleb128 0x44
+	.4byte	.LVL1062
+	.4byte	0xd687
+	.4byte	0xdc75
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1065
+	.4byte	0xaa04
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x8
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x9
+	.byte	0xf4
+	.byte	0x24
+	.byte	0x9
+	.byte	0xfc
+	.byte	0x25
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1058
+	.4byte	0xdd4c
+	.4byte	0xdcb2
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.uleb128 0x88
+	.4byte	.LVL1070
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.4byte	0xdcd8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1073
+	.4byte	0x103ff
+	.4byte	0xdd01
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC13
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1074
+	.4byte	0xe19b
+	.4byte	0xdd15
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x88
+	.4byte	.LVL1076
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.4byte	0xdd3b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1079
+	.4byte	0xe175
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1544
+	.byte	0x2
+	.2byte	0x1ea
+	.4byte	0x74
+	.4byte	.LFB222
+	.4byte	.LFE222-.LFB222
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xde59
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x1ea
+	.4byte	0x3a
+	.4byte	.LLST332
+	.uleb128 0x5c
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0x1ea
+	.4byte	0x74
+	.4byte	.LLST333
+	.uleb128 0x5c
+	.4byte	.LASF17
+	.byte	0x2
+	.2byte	0x1ea
+	.4byte	0x8b6
+	.4byte	.LLST334
+	.uleb128 0x5c
+	.4byte	.LASF18
+	.byte	0x2
+	.2byte	0x1ea
+	.4byte	0x8b6
+	.4byte	.LLST335
+	.uleb128 0x5e
+	.4byte	.LASF1545
+	.byte	0x2
+	.2byte	0x1ed
+	.4byte	0x74
+	.4byte	.LLST336
+	.uleb128 0x5e
+	.4byte	.LASF58
+	.byte	0x2
+	.2byte	0x1ee
+	.4byte	0x74
+	.4byte	.LLST337
+	.uleb128 0x44
+	.4byte	.LVL1006
+	.4byte	0xa835
+	.4byte	0xddda
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1007
+	.4byte	0xa925
+	.4byte	0xddee
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1008
+	.4byte	0xe2e2
+	.4byte	0xde08
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1009
+	.4byte	0xa835
+	.4byte	0xde1c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1010
+	.4byte	0xa045
+	.4byte	0xde48
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1013
+	.4byte	0xa8e2
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1546
+	.byte	0x2
+	.2byte	0x1df
+	.4byte	0x74
+	.4byte	.LFB221
+	.4byte	.LFE221-.LFB221
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xdefd
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x1df
+	.4byte	0x3a
+	.4byte	.LLST39
+	.uleb128 0x5c
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0x1df
+	.4byte	0x74
+	.4byte	.LLST40
+	.uleb128 0x56
+	.4byte	.LASF273
+	.byte	0x2
+	.2byte	0x1e1
+	.4byte	0x15bc
+	.uleb128 0x72
+	.4byte	0xaa29
+	.4byte	.LBB172
+	.4byte	.Ldebug_ranges0+0x38
+	.byte	0x2
+	.2byte	0x1e3
+	.4byte	0xded1
+	.uleb128 0x4f
+	.4byte	0xaa39
+	.4byte	.LLST41
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x38
+	.uleb128 0x74
+	.4byte	0xaa44
+	.uleb128 0x73
+	.4byte	0xaa4f
+	.4byte	.LLST42
+	.byte	0
+	.byte	0
+	.uleb128 0x8a
+	.4byte	0xa8c4
+	.4byte	.LBB175
+	.4byte	.Ldebug_ranges0+0x50
+	.byte	0x2
+	.2byte	0x1e5
+	.uleb128 0x4f
+	.4byte	0xa8d5
+	.4byte	.LLST43
+	.uleb128 0x45
+	.4byte	.LVL69
+	.4byte	0x1046f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x50
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1547
+	.byte	0x2
+	.2byte	0x1d7
+	.4byte	.LFB220
+	.4byte	.LFE220-.LFB220
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xdf6d
+	.uleb128 0x70
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x1d7
+	.4byte	0x3a
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5c
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0x1d7
+	.4byte	0x74
+	.4byte	.LLST36
+	.uleb128 0x56
+	.4byte	.LASF273
+	.byte	0x2
+	.2byte	0x1d9
+	.4byte	0x15bc
+	.uleb128 0x8a
+	.4byte	0xaa29
+	.4byte	.LBB166
+	.4byte	.Ldebug_ranges0+0x18
+	.byte	0x2
+	.2byte	0x1db
+	.uleb128 0x4f
+	.4byte	0xaa39
+	.4byte	.LLST37
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x18
+	.uleb128 0x74
+	.4byte	0xaa44
+	.uleb128 0x73
+	.4byte	0xaa4f
+	.4byte	.LLST38
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1548
+	.byte	0x2
+	.2byte	0x1cf
+	.4byte	.LFB219
+	.4byte	.LFE219-.LFB219
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xdfdf
+	.uleb128 0x70
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x1cf
+	.4byte	0x3a
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x70
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0x1cf
+	.4byte	0x74
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x56
+	.4byte	.LASF273
+	.byte	0x2
+	.2byte	0x1d1
+	.4byte	0x15bc
+	.uleb128 0x82
+	.4byte	0xaa29
+	.4byte	.LBB164
+	.4byte	.LBE164-.LBB164
+	.byte	0x2
+	.2byte	0x1d3
+	.uleb128 0x4f
+	.4byte	0xaa39
+	.4byte	.LLST34
+	.uleb128 0x7a
+	.4byte	.LBB165
+	.4byte	.LBE165-.LBB165
+	.uleb128 0x74
+	.4byte	0xaa44
+	.uleb128 0x73
+	.4byte	0xaa4f
+	.4byte	.LLST35
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1549
+	.byte	0x2
+	.2byte	0x1c1
+	.4byte	.LFB218
+	.4byte	.LFE218-.LFB218
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xe067
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x1c1
+	.4byte	0x3a
+	.4byte	.LLST31
+	.uleb128 0x70
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0x1c1
+	.4byte	0x74
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x56
+	.4byte	.LASF273
+	.byte	0x2
+	.2byte	0x1c3
+	.4byte	0x15bc
+	.uleb128 0x89
+	.4byte	0xaa29
+	.4byte	.LBB162
+	.4byte	.LBE162-.LBB162
+	.byte	0x2
+	.2byte	0x1c5
+	.4byte	0xe056
+	.uleb128 0x4f
+	.4byte	0xaa39
+	.4byte	.LLST32
+	.uleb128 0x7a
+	.4byte	.LBB163
+	.4byte	.LBE163-.LBB163
+	.uleb128 0x74
+	.4byte	0xaa44
+	.uleb128 0x73
+	.4byte	0xaa4f
+	.4byte	.LLST33
+	.byte	0
+	.byte	0
+	.uleb128 0x4d
+	.4byte	.LVL56
+	.4byte	0xe4a7
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1550
+	.byte	0x2
+	.2byte	0x1ae
+	.4byte	.LFB217
+	.4byte	.LFE217-.LFB217
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xe0ed
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x1ae
+	.4byte	0x3a
+	.4byte	.LLST26
+	.uleb128 0x5c
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0x1ae
+	.4byte	0x74
+	.4byte	.LLST27
+	.uleb128 0x5c
+	.4byte	.LASF923
+	.byte	0x2
+	.2byte	0x1ae
+	.4byte	0x74
+	.4byte	.LLST28
+	.uleb128 0x56
+	.4byte	.LASF273
+	.byte	0x2
+	.2byte	0x1b0
+	.4byte	0x15bc
+	.uleb128 0x82
+	.4byte	0xaa29
+	.4byte	.LBB160
+	.4byte	.LBE160-.LBB160
+	.byte	0x2
+	.2byte	0x1b2
+	.uleb128 0x4f
+	.4byte	0xaa39
+	.4byte	.LLST29
+	.uleb128 0x7a
+	.4byte	.LBB161
+	.4byte	.LBE161-.LBB161
+	.uleb128 0x74
+	.4byte	0xaa44
+	.uleb128 0x73
+	.4byte	0xaa4f
+	.4byte	.LLST30
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1551
+	.byte	0x2
+	.2byte	0x1a0
+	.4byte	.LFB216
+	.4byte	.LFE216-.LFB216
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xe175
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x1a0
+	.4byte	0x3a
+	.4byte	.LLST23
+	.uleb128 0x70
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0x1a0
+	.4byte	0x74
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x56
+	.4byte	.LASF273
+	.byte	0x2
+	.2byte	0x1a2
+	.4byte	0x15bc
+	.uleb128 0x89
+	.4byte	0xaa29
+	.4byte	.LBB158
+	.4byte	.LBE158-.LBB158
+	.byte	0x2
+	.2byte	0x1a4
+	.4byte	0xe164
+	.uleb128 0x4f
+	.4byte	0xaa39
+	.4byte	.LLST24
+	.uleb128 0x7a
+	.4byte	.LBB159
+	.4byte	.LBE159-.LBB159
+	.uleb128 0x74
+	.4byte	0xaa44
+	.uleb128 0x73
+	.4byte	0xaa4f
+	.4byte	.LLST25
+	.byte	0
+	.byte	0
+	.uleb128 0x4d
+	.4byte	.LVL46
+	.4byte	0xe4a7
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x6e
+	.4byte	.LASF1552
+	.byte	0x2
+	.2byte	0x197
+	.byte	0x1
+	.4byte	0xe19b
+	.uleb128 0x55
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x197
+	.4byte	0x3a
+	.uleb128 0x56
+	.4byte	.LASF273
+	.byte	0x2
+	.2byte	0x199
+	.4byte	0x15bc
+	.byte	0
+	.uleb128 0x6e
+	.4byte	.LASF1553
+	.byte	0x2
+	.2byte	0x18e
+	.byte	0x1
+	.4byte	0xe1c1
+	.uleb128 0x55
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x18e
+	.4byte	0x3a
+	.uleb128 0x56
+	.4byte	.LASF273
+	.byte	0x2
+	.2byte	0x190
+	.4byte	0x15bc
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1554
+	.byte	0x2
+	.2byte	0x16b
+	.4byte	.LFB213
+	.4byte	.LFE213-.LFB213
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xe266
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x16b
+	.4byte	0x3a
+	.4byte	.LLST129
+	.uleb128 0x5c
+	.4byte	.LASF1555
+	.byte	0x2
+	.2byte	0x16b
+	.4byte	0x74
+	.4byte	.LLST130
+	.uleb128 0x5c
+	.4byte	.LASF1556
+	.byte	0x2
+	.2byte	0x16b
+	.4byte	0x74
+	.4byte	.LLST131
+	.uleb128 0x56
+	.4byte	.LASF273
+	.byte	0x2
+	.2byte	0x16d
+	.4byte	0x15bc
+	.uleb128 0x72
+	.4byte	0xaa29
+	.4byte	.LBB223
+	.4byte	.Ldebug_ranges0+0x148
+	.byte	0x2
+	.2byte	0x16e
+	.4byte	0xe241
+	.uleb128 0x4f
+	.4byte	0xaa39
+	.4byte	.LLST132
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x148
+	.uleb128 0x74
+	.4byte	0xe76b
+	.uleb128 0x74
+	.4byte	0xe774
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL286
+	.4byte	0xa835
+	.4byte	0xe255
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x4d
+	.4byte	.LVL289
+	.4byte	0xe4a7
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1557
+	.byte	0x2
+	.2byte	0x14f
+	.4byte	.LFB212
+	.4byte	.LFE212-.LFB212
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xe2e2
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x14f
+	.4byte	0x3a
+	.4byte	.LLST14
+	.uleb128 0x70
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0x14f
+	.4byte	0x74
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x56
+	.4byte	.LASF273
+	.byte	0x2
+	.2byte	0x151
+	.4byte	0x15bc
+	.uleb128 0x72
+	.4byte	0xaa29
+	.4byte	.LBB138
+	.4byte	.Ldebug_ranges0+0
+	.byte	0x2
+	.2byte	0x153
+	.4byte	0xe2d8
+	.uleb128 0x4f
+	.4byte	0xaa39
+	.4byte	.LLST15
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0
+	.uleb128 0x74
+	.4byte	0xaa44
+	.uleb128 0x73
+	.4byte	0xaa4f
+	.4byte	.LLST16
+	.byte	0
+	.byte	0
+	.uleb128 0x49
+	.4byte	.LVL32
+	.4byte	0xe4a7
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1558
+	.byte	0x2
+	.2byte	0x141
+	.4byte	.LFB211
+	.4byte	.LFE211-.LFB211
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xe36a
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x141
+	.4byte	0x3a
+	.4byte	.LLST11
+	.uleb128 0x70
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0x141
+	.4byte	0x74
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x56
+	.4byte	.LASF273
+	.byte	0x2
+	.2byte	0x143
+	.4byte	0x15bc
+	.uleb128 0x89
+	.4byte	0xaa29
+	.4byte	.LBB136
+	.4byte	.LBE136-.LBB136
+	.byte	0x2
+	.2byte	0x144
+	.4byte	0xe359
+	.uleb128 0x4f
+	.4byte	0xaa39
+	.4byte	.LLST12
+	.uleb128 0x7a
+	.4byte	.LBB137
+	.4byte	.LBE137-.LBB137
+	.uleb128 0x74
+	.4byte	0xaa44
+	.uleb128 0x73
+	.4byte	0xaa4f
+	.4byte	.LLST13
+	.byte	0
+	.byte	0
+	.uleb128 0x4d
+	.4byte	.LVL28
+	.4byte	0xe4a7
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1559
+	.byte	0x2
+	.2byte	0x133
+	.4byte	.LFB210
+	.4byte	.LFE210-.LFB210
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xe3a1
+	.uleb128 0x5c
+	.4byte	.LASF1560
+	.byte	0x2
+	.2byte	0x133
+	.4byte	0x74
+	.4byte	.LLST136
+	.uleb128 0x4d
+	.4byte	.LVL303
+	.4byte	0xa7dc
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1561
+	.byte	0x2
+	.2byte	0x12d
+	.4byte	.LFB209
+	.4byte	.LFE209-.LFB209
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xe3cf
+	.uleb128 0x70
+	.4byte	.LASF1424
+	.byte	0x2
+	.2byte	0x12d
+	.4byte	0x3a
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x49
+	.4byte	.LVL317
+	.4byte	0xa797
+	.byte	0
+	.uleb128 0x8d
+	.4byte	.LASF1563
+	.byte	0x2
+	.2byte	0x115
+	.byte	0x1
+	.4byte	0xe40e
+	.uleb128 0x55
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x115
+	.4byte	0x3a
+	.uleb128 0x66
+	.ascii	"buf\000"
+	.byte	0x2
+	.2byte	0x115
+	.4byte	0x8b6
+	.uleb128 0x57
+	.ascii	"ptr\000"
+	.byte	0x2
+	.2byte	0x117
+	.4byte	0x8b6
+	.uleb128 0x56
+	.4byte	.LASF273
+	.byte	0x2
+	.2byte	0x118
+	.4byte	0x15bc
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1564
+	.byte	0x2
+	.2byte	0x10a
+	.4byte	.LFB207
+	.4byte	.LFE207-.LFB207
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xe4a7
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x10a
+	.4byte	0x3a
+	.4byte	.LLST104
+	.uleb128 0x56
+	.4byte	.LASF273
+	.byte	0x2
+	.2byte	0x10c
+	.4byte	0x15bc
+	.uleb128 0x72
+	.4byte	0xaa29
+	.4byte	.LBB213
+	.4byte	.Ldebug_ranges0+0x118
+	.byte	0x2
+	.2byte	0x10e
+	.4byte	0xe46e
+	.uleb128 0x4f
+	.4byte	0xaa39
+	.4byte	.LLST105
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x118
+	.uleb128 0x74
+	.4byte	0xe76b
+	.uleb128 0x74
+	.4byte	0xe774
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL205
+	.4byte	0xa925
+	.4byte	0xe482
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL206
+	.4byte	0xa835
+	.4byte	0xe496
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x4d
+	.4byte	.LVL207
+	.4byte	0xa8e2
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1565
+	.byte	0x2
+	.2byte	0x100
+	.4byte	.LFB206
+	.4byte	.LFE206-.LFB206
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xe53d
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x100
+	.4byte	0x3a
+	.4byte	.LLST6
+	.uleb128 0x70
+	.4byte	.LASF1566
+	.byte	0x2
+	.2byte	0x100
+	.4byte	0x74
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5e
+	.4byte	.LASF1428
+	.byte	0x2
+	.2byte	0x102
+	.4byte	0x74
+	.4byte	.LLST7
+	.uleb128 0x89
+	.4byte	0xa801
+	.4byte	.LBB134
+	.4byte	.LBE134-.LBB134
+	.byte	0x2
+	.2byte	0x107
+	.4byte	0xe526
+	.uleb128 0x4f
+	.4byte	0xa81a
+	.4byte	.LLST8
+	.uleb128 0x4f
+	.4byte	0xa80e
+	.4byte	.LLST9
+	.uleb128 0x7a
+	.4byte	.LBB135
+	.4byte	.LBE135-.LBB135
+	.uleb128 0x73
+	.4byte	0xa827
+	.4byte	.LLST10
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL20
+	.4byte	0xe592
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x4b
+	.4byte	.LASF1567
+	.byte	0x2
+	.byte	0xf6
+	.4byte	0x74
+	.4byte	.LFB205
+	.4byte	.LFE205-.LFB205
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xe592
+	.uleb128 0x40
+	.4byte	.LASF1392
+	.byte	0x2
+	.byte	0xf6
+	.4byte	0x3a
+	.4byte	.LLST4
+	.uleb128 0x52
+	.4byte	.LASF1566
+	.byte	0x2
+	.byte	0xf6
+	.4byte	0x74
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x61
+	.4byte	.LASF1428
+	.byte	0x2
+	.byte	0xf8
+	.4byte	0x74
+	.4byte	.LLST5
+	.uleb128 0x45
+	.4byte	.LVL15
+	.4byte	0xe592
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x4b
+	.4byte	.LASF1568
+	.byte	0x2
+	.byte	0xee
+	.4byte	0x74
+	.4byte	.LFB204
+	.4byte	.LFE204-.LFB204
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xe5c8
+	.uleb128 0x40
+	.4byte	.LASF1392
+	.byte	0x2
+	.byte	0xee
+	.4byte	0x3a
+	.4byte	.LLST3
+	.uleb128 0x52
+	.4byte	.LASF1566
+	.byte	0x2
+	.byte	0xee
+	.4byte	0x74
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0
+	.uleb128 0x4b
+	.4byte	.LASF1569
+	.byte	0x2
+	.byte	0xcc
+	.4byte	0x74
+	.4byte	.LFB203
+	.4byte	.LFE203-.LFB203
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xe618
+	.uleb128 0x40
+	.4byte	.LASF1100
+	.byte	0x2
+	.byte	0xcc
+	.4byte	0x8b6
+	.4byte	.LLST1
+	.uleb128 0x52
+	.4byte	.LASF1101
+	.byte	0x2
+	.byte	0xcc
+	.4byte	0x8b6
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x65
+	.ascii	"len\000"
+	.byte	0x2
+	.byte	0xcc
+	.4byte	0x74
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x41
+	.ascii	"i\000"
+	.byte	0x2
+	.byte	0xce
+	.4byte	0x74
+	.4byte	.LLST2
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0x7349
+	.4byte	.LFB507
+	.4byte	.LFE507-.LFB507
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xe643
+	.uleb128 0x4f
+	.4byte	0x7356
+	.4byte	.LLST0
+	.uleb128 0x8f
+	.4byte	0x7362
+	.uleb128 0x6
+	.byte	0xfa
+	.4byte	0x7362
+	.byte	0x9f
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0xe19b
+	.4byte	.LFB214
+	.4byte	.LFE214-.LFB214
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xe6ba
+	.uleb128 0x8f
+	.4byte	0xe1a8
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x74
+	.4byte	0xe1b4
+	.uleb128 0x7a
+	.4byte	.LBB146
+	.4byte	.LBE146-.LBB146
+	.uleb128 0x4f
+	.4byte	0xe1a8
+	.4byte	.LLST17
+	.uleb128 0x7a
+	.4byte	.LBB147
+	.4byte	.LBE147-.LBB147
+	.uleb128 0x74
+	.4byte	0xe65f
+	.uleb128 0x82
+	.4byte	0xaa29
+	.4byte	.LBB148
+	.4byte	.LBE148-.LBB148
+	.byte	0x2
+	.2byte	0x192
+	.uleb128 0x4f
+	.4byte	0xaa39
+	.4byte	.LLST18
+	.uleb128 0x7a
+	.4byte	.LBB149
+	.4byte	.LBE149-.LBB149
+	.uleb128 0x74
+	.4byte	0xaa44
+	.uleb128 0x73
+	.4byte	0xaa4f
+	.4byte	.LLST19
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0xe175
+	.4byte	.LFB215
+	.4byte	.LFE215-.LFB215
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xe731
+	.uleb128 0x8f
+	.4byte	0xe182
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x74
+	.4byte	0xe18e
+	.uleb128 0x7a
+	.4byte	.LBB154
+	.4byte	.LBE154-.LBB154
+	.uleb128 0x4f
+	.4byte	0xe182
+	.4byte	.LLST20
+	.uleb128 0x7a
+	.4byte	.LBB155
+	.4byte	.LBE155-.LBB155
+	.uleb128 0x74
+	.4byte	0xe6d6
+	.uleb128 0x82
+	.4byte	0xaa29
+	.4byte	.LBB156
+	.4byte	.LBE156-.LBB156
+	.byte	0x2
+	.2byte	0x19b
+	.uleb128 0x4f
+	.4byte	0xaa39
+	.4byte	.LLST21
+	.uleb128 0x7a
+	.4byte	.LBB157
+	.4byte	.LBE157-.LBB157
+	.uleb128 0x74
+	.4byte	0xaa44
+	.uleb128 0x73
+	.4byte	0xaa4f
+	.4byte	.LLST22
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0xaa5b
+	.4byte	.LFB268
+	.4byte	.LFE268-.LFB268
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xe74e
+	.uleb128 0x8f
+	.4byte	0xaa67
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0xaa29
+	.4byte	.LFB269
+	.4byte	.LFE269-.LFB269
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xe77e
+	.uleb128 0x4f
+	.4byte	0xaa39
+	.4byte	.LLST76
+	.uleb128 0x73
+	.4byte	0xaa44
+	.4byte	.LLST77
+	.uleb128 0x73
+	.4byte	0xaa4f
+	.4byte	.LLST78
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0xc6a1
+	.4byte	.LFB246
+	.4byte	.LFE246-.LFB246
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xe7d0
+	.uleb128 0x74
+	.4byte	0xc6ae
+	.uleb128 0x73
+	.4byte	0xc6ba
+	.4byte	.LLST94
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x100
+	.uleb128 0x73
+	.4byte	0xe792
+	.4byte	.LLST95
+	.uleb128 0x74
+	.4byte	0xe797
+	.uleb128 0x45
+	.4byte	.LVL181
+	.4byte	0xc7c8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0xa8c4
+	.4byte	.LFB276
+	.4byte	.LFE276-.LFB276
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xe7ff
+	.uleb128 0x4f
+	.4byte	0xa8d5
+	.4byte	.LLST100
+	.uleb128 0x45
+	.4byte	.LVL194
+	.4byte	0x1046f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0xa801
+	.4byte	.LFB278
+	.4byte	.LFE278-.LFB278
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xe836
+	.uleb128 0x8f
+	.4byte	0xa80e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x8f
+	.4byte	0xa81a
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x7a
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+	.4byte	.LBE229-.LBB229
+	.uleb128 0x90
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+	.uleb128 0x1
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+	.byte	0
+	.byte	0
+	.uleb128 0x8e
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+	.4byte	.LFE279-.LFB279
+	.uleb128 0x1
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+	.4byte	0xe87b
+	.uleb128 0x8f
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+	.uleb128 0x1
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+	.byte	0x94
+	.uleb128 0x7a
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+	.4byte	.LBE232-.LBB232
+	.uleb128 0x8f
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+	.uleb128 0x1
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+	.uleb128 0x7a
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+	.4byte	.LBE233-.LBB233
+	.uleb128 0x74
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+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x8e
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+	.4byte	.LFE282-.LFB282
+	.uleb128 0x1
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+	.uleb128 0x1
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+	.uleb128 0x1
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+	.uleb128 0x8e
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+	.uleb128 0x1
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+	.uleb128 0x1
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+	.byte	0
+	.uleb128 0x8e
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+	.byte	0
+	.byte	0
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+	.uleb128 0x92
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+	.uleb128 0x6a
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+	.byte	0
+	.byte	0
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+	.4byte	.LFE338-.LFB338
+	.uleb128 0x1
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+	.uleb128 0x4f
+	.4byte	0x854c
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+	.uleb128 0x74
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+	.uleb128 0x74
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+	.uleb128 0x44
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+	.4byte	0x103ff
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+	.uleb128 0x43
+	.uleb128 0x1
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+	.uleb128 0x43
+	.uleb128 0x1
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+	.4byte	.LANCHOR86
+	.uleb128 0x43
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.uleb128 0x4d
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+	.4byte	0x103ff
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+	.uleb128 0x1
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+	.uleb128 0x43
+	.uleb128 0x1
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+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL519
+	.4byte	0x84c4
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+	.uleb128 0x8e
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+	.4byte	.LFE337-.LFB337
+	.uleb128 0x1
+	.byte	0x9c
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+	.uleb128 0x4f
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+	.uleb128 0x74
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+	.4byte	.Ldebug_ranges0+0x1d8
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+	.4byte	0x103ff
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+	.uleb128 0x1
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+	.uleb128 0x43
+	.uleb128 0x1
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+	.uleb128 0x1
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+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xdd
+	.byte	0
+	.uleb128 0x4d
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+	.4byte	0x103ff
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+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
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+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
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+	.4byte	.LC7
+	.byte	0
+	.byte	0
+	.byte	0
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+	.4byte	0x844c
+	.byte	0
+	.uleb128 0x8e
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+	.4byte	.LFE344-.LFB344
+	.uleb128 0x1
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+	.4byte	0xec42
+	.uleb128 0x4f
+	.4byte	0x8242
+	.4byte	.LLST223
+	.uleb128 0x74
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+	.4byte	0x828a
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+	.4byte	0x82a2
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x1f0
+	.uleb128 0x4f
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+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x1f0
+	.uleb128 0x73
+	.4byte	0xeb05
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+	.uleb128 0x73
+	.4byte	0xeb0a
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+	.uleb128 0x73
+	.4byte	0xeb0f
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+	.uleb128 0x73
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+	.uleb128 0x73
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+	.uleb128 0x73
+	.4byte	0xeb1e
+	.4byte	.LLST230
+	.uleb128 0x73
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+	.4byte	.LLST231
+	.uleb128 0x74
+	.4byte	0xeb28
+	.uleb128 0x44
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+	.4byte	0x103ff
+	.4byte	0xebab
+	.uleb128 0x43
+	.uleb128 0x1
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+	.uleb128 0x5
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+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR94
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x1f8
+	.byte	0
+	.uleb128 0x44
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+	.4byte	0x103ff
+	.4byte	0xebcb
+	.uleb128 0x43
+	.uleb128 0x1
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+	.uleb128 0x43
+	.uleb128 0x1
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+	.uleb128 0x5
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+	.4byte	.LC7
+	.byte	0
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+	.uleb128 0x43
+	.uleb128 0x1
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+	.uleb128 0x5
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+	.4byte	.LANCHOR82
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
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+	.sleb128 0
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+	.uleb128 0x44
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+	.4byte	0xec0f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
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+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR94
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x203
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL602
+	.4byte	0x103ff
+	.4byte	0xec2f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL603
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+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
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+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x8e
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+	.4byte	.LFE347-.LFB347
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xed06
+	.uleb128 0x4f
+	.4byte	0x80cc
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+	.uleb128 0x73
+	.4byte	0x80d8
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+	.uleb128 0x73
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+	.4byte	0x80f0
+	.uleb128 0x6f
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+	.4byte	.LBE281-.LBB281
+	.4byte	0xece9
+	.uleb128 0x4f
+	.4byte	0x80cc
+	.4byte	.LLST235
+	.uleb128 0x7a
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+	.4byte	.LBE282-.LBB282
+	.uleb128 0x74
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+	.uleb128 0x74
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+	.uleb128 0x74
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+	.uleb128 0x1
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+	.uleb128 0x43
+	.uleb128 0x1
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+	.uleb128 0x5
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+	.4byte	.LANCHOR95
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+	.uleb128 0x1
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+	.uleb128 0x3
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+	.uleb128 0x1
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+	.uleb128 0x1
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+	.uleb128 0x5
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+	.4byte	.LC7
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+	.uleb128 0x1
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+	.uleb128 0x5
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+	.byte	0
+	.byte	0
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+	.uleb128 0x1
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+	.uleb128 0x4f
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+	.uleb128 0x3
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+	.uleb128 0x1
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+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1089
+	.4byte	0xdd4c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0x51d3
+	.4byte	.LFB484
+	.4byte	.LFE484-.LFB484
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xeedf
+	.uleb128 0x4f
+	.4byte	0x51e3
+	.4byte	.LLST422
+	.byte	0
+	.uleb128 0x92
+	.4byte	0x4f61
+	.4byte	.LFB491
+	.4byte	.LFE491-.LFB491
+	.uleb128 0x1
+	.byte	0x9c
+	.uleb128 0x8e
+	.4byte	0x4edc
+	.4byte	.LFB493
+	.4byte	.LFE493-.LFB493
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xef0d
+	.uleb128 0x49
+	.4byte	.LVL1406
+	.4byte	0xbed1
+	.byte	0
+	.uleb128 0x92
+	.4byte	0x4e77
+	.4byte	.LFB495
+	.4byte	.LFE495-.LFB495
+	.uleb128 0x1
+	.byte	0x9c
+	.uleb128 0x8e
+	.4byte	0xced6
+	.4byte	.LFB237
+	.4byte	.LFE237-.LFB237
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xef72
+	.uleb128 0x4f
+	.4byte	0xcee3
+	.4byte	.LLST472
+	.uleb128 0x6b
+	.4byte	.Ldebug_ranges0+0x3d0
+	.4byte	0xef60
+	.uleb128 0x4f
+	.4byte	0xcee3
+	.4byte	.LLST473
+	.uleb128 0x4d
+	.4byte	.LVL1551
+	.4byte	0x52a5
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR20+4
+	.byte	0
+	.byte	0
+	.uleb128 0x4d
+	.4byte	.LVL1548
+	.4byte	0xcef0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0xd1ee
+	.4byte	.LFB235
+	.4byte	.LFE235-.LFB235
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xf079
+	.uleb128 0x4f
+	.4byte	0xd1ff
+	.4byte	.LLST526
+	.uleb128 0x91
+	.4byte	0xd20b
+	.byte	0
+	.uleb128 0x74
+	.4byte	0xd217
+	.uleb128 0x74
+	.4byte	0xd223
+	.uleb128 0x7a
+	.4byte	.LBB422
+	.4byte	.LBE422-.LBB422
+	.uleb128 0x4f
+	.4byte	0xd1ff
+	.4byte	.LLST527
+	.uleb128 0x7a
+	.4byte	.LBB423
+	.4byte	.LBE423-.LBB423
+	.uleb128 0x74
+	.4byte	0xef8f
+	.uleb128 0x90
+	.4byte	0xef96
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -80
+	.uleb128 0x90
+	.4byte	0xef9b
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -116
+	.uleb128 0x94
+	.4byte	0xd22f
+	.4byte	.LDL1
+	.uleb128 0x44
+	.4byte	.LVL1808
+	.4byte	0x530b
+	.4byte	0xefff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -80
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xa5
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1809
+	.4byte	0x530b
+	.4byte	0xf018
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x5a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x38
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1810
+	.4byte	0xac82
+	.4byte	0xf037
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -116
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1811
+	.4byte	0xae0d
+	.4byte	0xf05b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -116
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1813
+	.4byte	0xac82
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -116
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0x8c64
+	.4byte	.LFB320
+	.4byte	.LFE320-.LFB320
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xf1bd
+	.uleb128 0x74
+	.4byte	0x8c74
+	.uleb128 0x91
+	.4byte	0x8c7d
+	.byte	0
+	.uleb128 0x74
+	.4byte	0x8c88
+	.uleb128 0x91
+	.4byte	0x8c93
+	.byte	0
+	.uleb128 0x74
+	.4byte	0x8ca5
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x4c8
+	.uleb128 0x73
+	.4byte	0xf08d
+	.4byte	.LLST539
+	.uleb128 0x74
+	.4byte	0xf092
+	.uleb128 0x73
+	.4byte	0xf099
+	.4byte	.LLST540
+	.uleb128 0x74
+	.4byte	0xf09e
+	.uleb128 0x95
+	.4byte	0x8c9e
+	.uleb128 0x74
+	.4byte	0xf0a5
+	.uleb128 0x44
+	.4byte	.LVL1876
+	.4byte	0x530b
+	.4byte	0xf0ea
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1879
+	.4byte	0x530b
+	.4byte	0xf109
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x40
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1881
+	.4byte	0x103ff
+	.4byte	0xf120
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1882
+	.4byte	0xae0d
+	.4byte	0xf143
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1883
+	.4byte	0xac82
+	.4byte	0xf15b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1884
+	.4byte	0xae0d
+	.4byte	0xf17e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
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+	.uleb128 0x1
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+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1886
+	.4byte	0x103ff
+	.4byte	0xf195
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC32
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1887
+	.4byte	0x103ff
+	.4byte	0xf1b2
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC33
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1891
+	.4byte	0x52a5
+	.byte	0
+	.byte	0
+	.uleb128 0x96
+	.4byte	0x5ef1
+	.4byte	.LFB386
+	.4byte	.LFE386-.LFB386
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xf51b
+	.uleb128 0x4f
+	.4byte	0x5f02
+	.4byte	.LLST541
+	.uleb128 0x74
+	.4byte	0x5f0c
+	.uleb128 0x74
+	.4byte	0x5f18
+	.uleb128 0x74
+	.4byte	0x5f24
+	.uleb128 0x74
+	.4byte	0x5f30
+	.uleb128 0x74
+	.4byte	0x5f3a
+	.uleb128 0x74
+	.4byte	0x5f46
+	.uleb128 0x91
+	.4byte	0x5f52
+	.byte	0
+	.uleb128 0x74
+	.4byte	0x5f66
+	.uleb128 0x7a
+	.4byte	.LBB434
+	.4byte	.LBE434-.LBB434
+	.uleb128 0x8b
+	.4byte	0x5f02
+	.uleb128 0x7a
+	.4byte	.LBB435
+	.4byte	.LBE435-.LBB435
+	.uleb128 0x73
+	.4byte	0xf1da
+	.4byte	.LLST542
+	.uleb128 0x74
+	.4byte	0xf1df
+	.uleb128 0x73
+	.4byte	0xf1e4
+	.4byte	.LLST543
+	.uleb128 0x73
+	.4byte	0xf1e9
+	.4byte	.LLST544
+	.uleb128 0x74
+	.4byte	0xf1ee
+	.uleb128 0x73
+	.4byte	0xf1f3
+	.4byte	.LLST545
+	.uleb128 0x74
+	.4byte	0xf1f8
+	.uleb128 0x95
+	.4byte	0x5f5e
+	.uleb128 0x74
+	.4byte	0xf1ff
+	.uleb128 0x72
+	.4byte	0x7349
+	.4byte	.LBB436
+	.4byte	.Ldebug_ranges0+0x4e0
+	.byte	0x1
+	.2byte	0xb6e
+	.4byte	0xf299
+	.uleb128 0x4f
+	.4byte	0x7362
+	.4byte	.LLST546
+	.uleb128 0x4f
+	.4byte	0x7356
+	.4byte	.LLST547
+	.uleb128 0x45
+	.4byte	.LVL1934
+	.4byte	0xe618
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x93
+	.4byte	0x7362
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1896
+	.4byte	0x103ff
+	.4byte	0xf2c0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR200
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xb2d
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1897
+	.4byte	0x103ff
+	.4byte	0xf2e0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1905
+	.4byte	0x82fb
+	.4byte	0xf2f7
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR87
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1907
+	.4byte	0x103ff
+	.4byte	0xf31e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR200
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xb41
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1908
+	.4byte	0x103ff
+	.4byte	0xf33e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1909
+	.4byte	0x64a2
+	.4byte	0xf352
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1910
+	.4byte	0x103ff
+	.4byte	0xf379
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR200
+	.uleb128 0x43
+	.uleb128 0x1
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+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xb4d
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1911
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+	.uleb128 0x43
+	.uleb128 0x1
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+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1914
+	.4byte	0x103ff
+	.4byte	0xf3c0
+	.uleb128 0x43
+	.uleb128 0x1
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+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
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+	.uleb128 0x1
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+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xb50
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1915
+	.4byte	0x103ff
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+	.uleb128 0x43
+	.uleb128 0x1
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+	.uleb128 0x5
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+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
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+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1917
+	.4byte	0x103ff
+	.4byte	0xf407
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR200
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xb5c
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1918
+	.4byte	0x103ff
+	.4byte	0xf427
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1919
+	.4byte	0x103ff
+	.4byte	0xf44e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR200
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xb63
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1920
+	.4byte	0x103ff
+	.4byte	0xf46e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1921
+	.4byte	0x7349
+	.4byte	0xf487
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1925
+	.4byte	0xac82
+	.4byte	0xf49b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1926
+	.4byte	0xac82
+	.4byte	0xf4af
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1928
+	.4byte	0x602b
+	.4byte	0xf4c3
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1929
+	.4byte	0x8c64
+	.uleb128 0x48
+	.4byte	.LVL1938
+	.4byte	0x8dc2
+	.uleb128 0x44
+	.4byte	.LVL1942
+	.4byte	0x103ff
+	.4byte	0xf4fc
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR200
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xb9e
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1943
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0x545d
+	.4byte	.LFB406
+	.4byte	.LFE406-.LFB406
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xf5bb
+	.uleb128 0x4f
+	.4byte	0x546e
+	.4byte	.LLST548
+	.uleb128 0x74
+	.4byte	0x547a
+	.uleb128 0x74
+	.4byte	0x5486
+	.uleb128 0x74
+	.4byte	0x5490
+	.uleb128 0x74
+	.4byte	0x549a
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x4f8
+	.uleb128 0x8b
+	.4byte	0x546e
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x4f8
+	.uleb128 0x73
+	.4byte	0xf538
+	.4byte	.LLST549
+	.uleb128 0x73
+	.4byte	0xf53d
+	.4byte	.LLST550
+	.uleb128 0x73
+	.4byte	0xf542
+	.4byte	.LLST551
+	.uleb128 0x74
+	.4byte	0xf547
+	.uleb128 0x48
+	.4byte	.LVL1947
+	.4byte	0x54a7
+	.uleb128 0x44
+	.4byte	.LVL1949
+	.4byte	0x89c8
+	.4byte	0xf599
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1955
+	.4byte	0x8dc2
+	.4byte	0xf5af
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -36
+	.byte	0x94
+	.byte	0x2
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1956
+	.4byte	0x8c64
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0x5c12
+	.4byte	.LFB389
+	.4byte	.LFE389-.LFB389
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xf6dc
+	.uleb128 0x4f
+	.4byte	0x5c23
+	.4byte	.LLST552
+	.uleb128 0x74
+	.4byte	0x5c2f
+	.uleb128 0x6f
+	.4byte	.LBB450
+	.4byte	.LBE450-.LBB450
+	.4byte	0xf6d2
+	.uleb128 0x4f
+	.4byte	0x5c23
+	.4byte	.LLST553
+	.uleb128 0x7a
+	.4byte	.LBB451
+	.4byte	.LBE451-.LBB451
+	.uleb128 0x74
+	.4byte	0xf5d8
+	.uleb128 0x44
+	.4byte	.LVL1966
+	.4byte	0x838c
+	.4byte	0xf61e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR82
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1967
+	.4byte	0x103ff
+	.4byte	0xf645
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR203
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xc0d
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1968
+	.4byte	0x103ff
+	.4byte	0xf665
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1969
+	.4byte	0x5f89
+	.4byte	0xf679
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1970
+	.4byte	0x545d
+	.4byte	0xf68d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1971
+	.4byte	0x103ff
+	.4byte	0xf6b4
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR203
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xc10
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1972
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1976
+	.4byte	0x8231
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0x65df
+	.4byte	.LFB373
+	.4byte	.LFE373-.LFB373
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xf738
+	.uleb128 0x4f
+	.4byte	0x65ec
+	.4byte	.LLST556
+	.uleb128 0x74
+	.4byte	0x65f8
+	.uleb128 0x7a
+	.4byte	.LBB454
+	.4byte	.LBE454-.LBB454
+	.uleb128 0x4f
+	.4byte	0x65ec
+	.4byte	.LLST557
+	.uleb128 0x7a
+	.4byte	.LBB455
+	.4byte	.LBE455-.LBB455
+	.uleb128 0x73
+	.4byte	0xf6f9
+	.4byte	.LLST558
+	.uleb128 0x94
+	.4byte	0x6604
+	.4byte	.LDL2
+	.uleb128 0x48
+	.4byte	.LVL1993
+	.4byte	0x5b4d
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0x75f4
+	.4byte	.LFB360
+	.4byte	.LFE360-.LFB360
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xf8c8
+	.uleb128 0x97
+	.4byte	0x7605
+	.sleb128 -1
+	.uleb128 0x74
+	.4byte	0x7611
+	.uleb128 0x91
+	.4byte	0x761d
+	.byte	0
+	.uleb128 0x74
+	.4byte	0x7631
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x518
+	.uleb128 0x74
+	.4byte	0xf74c
+	.uleb128 0x73
+	.4byte	0xf753
+	.4byte	.LLST562
+	.uleb128 0x74
+	.4byte	0xf758
+	.uleb128 0x95
+	.4byte	0x7629
+	.uleb128 0x74
+	.4byte	0xf75f
+	.uleb128 0x6f
+	.4byte	.LBB461
+	.4byte	.LBE461-.LBB461
+	.4byte	0xf7a7
+	.uleb128 0x73
+	.4byte	0x763f
+	.4byte	.LLST563
+	.uleb128 0x48
+	.4byte	.LVL2024
+	.4byte	0x52a5
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2018
+	.4byte	0x530b
+	.4byte	0xf7bb
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2019
+	.4byte	0x52a5
+	.4byte	0xf7d8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR80
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x30
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2020
+	.4byte	0x52a5
+	.uleb128 0x48
+	.4byte	.LVL2021
+	.4byte	0x52a5
+	.uleb128 0x44
+	.4byte	.LVL2025
+	.4byte	0x7735
+	.4byte	0xf7fe
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2027
+	.4byte	0xae0d
+	.4byte	0xf821
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
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+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
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+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2029
+	.4byte	0x858a
+	.uleb128 0x44
+	.4byte	.LVL2030
+	.4byte	0xae0d
+	.4byte	0xf84d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
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+	.uleb128 0x43
+	.uleb128 0x1
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+	.uleb128 0x1
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+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
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+	.uleb128 0x44
+	.4byte	.LVL2031
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+	.uleb128 0x43
+	.uleb128 0x1
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+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR207
+	.uleb128 0x43
+	.uleb128 0x1
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+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x4bd
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+	.uleb128 0x44
+	.4byte	.LVL2032
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+	.uleb128 0x43
+	.uleb128 0x1
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+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2035
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+	.uleb128 0x43
+	.uleb128 0x1
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+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC35
+	.uleb128 0x43
+	.uleb128 0x1
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+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
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+	.4byte	.LVL2038
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+	.uleb128 0x43
+	.uleb128 0x1
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+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
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+	.uleb128 0x1
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+	.uleb128 0x1
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+	.byte	0
+	.byte	0
+	.uleb128 0x8e
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+	.uleb128 0x1
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+	.4byte	0xfa5b
+	.uleb128 0x4f
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+	.uleb128 0x4f
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+	.4byte	.LLST593
+	.uleb128 0x4f
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+	.4byte	.LLST594
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+	.uleb128 0x74
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+	.byte	0
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+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x530
+	.uleb128 0x8b
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+	.uleb128 0x8b
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+	.uleb128 0x8b
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+	.uleb128 0x6a
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+	.uleb128 0x73
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+	.uleb128 0x73
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+	.uleb128 0x74
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+	.4byte	.LVL2163
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+	.uleb128 0x1
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+	.uleb128 0x2
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+	.uleb128 0x1
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+	.uleb128 0x1
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+	.uleb128 0x3
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+	.uleb128 0x43
+	.uleb128 0x1
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+	.uleb128 0x5
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+	.uleb128 0x43
+	.uleb128 0x1
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+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2166
+	.4byte	0x103ff
+	.4byte	0xf9cd
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR211
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x2fd
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2167
+	.4byte	0x103ff
+	.4byte	0xf9ed
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2169
+	.4byte	0x530b
+	.4byte	0xfa05
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x40
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2172
+	.4byte	0xae0d
+	.4byte	0xfa28
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2174
+	.4byte	0x103ff
+	.4byte	0xfa3f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC38
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2175
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC39
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0x6367
+	.4byte	.LFB377
+	.4byte	.LFE377-.LFB377
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xfa8d
+	.uleb128 0x4d
+	.4byte	.LVL2263
+	.4byte	0x78f1
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR135
+	.byte	0
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0x98a8
+	.4byte	.LFB303
+	.4byte	.LFE303-.LFB303
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xfad0
+	.uleb128 0x48
+	.4byte	.LVL2338
+	.4byte	0x93da
+	.uleb128 0x48
+	.4byte	.LVL2339
+	.4byte	0x7c46
+	.uleb128 0x44
+	.4byte	.LVL2340
+	.4byte	0x7759
+	.4byte	0xfac6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2341
+	.4byte	0x75f4
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0x736f
+	.4byte	.LFB362
+	.4byte	.LFE362-.LFB362
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xfb28
+	.uleb128 0x44
+	.4byte	.LVL2368
+	.4byte	0x77b1
+	.4byte	0xfaf8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x40
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2369
+	.4byte	0x103ff
+	.4byte	0xfb18
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC43
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2370
+	.4byte	0x530b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0x5569
+	.4byte	.LFB401
+	.4byte	.LFE401-.LFB401
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xfbc8
+	.uleb128 0x91
+	.4byte	0x557a
+	.byte	0
+	.uleb128 0x74
+	.4byte	0x5584
+	.uleb128 0x6b
+	.4byte	.Ldebug_ranges0+0x5f0
+	.4byte	0xfbb1
+	.uleb128 0x74
+	.4byte	0xfb3c
+	.uleb128 0x73
+	.4byte	0xfb43
+	.4byte	.LLST723
+	.uleb128 0x44
+	.4byte	.LVL2793
+	.4byte	0x5ade
+	.4byte	0xfb79
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2794
+	.4byte	0x57df
+	.4byte	0xfb8c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2796
+	.4byte	0x8dc2
+	.uleb128 0x48
+	.4byte	.LVL2797
+	.4byte	0x8c64
+	.uleb128 0x48
+	.4byte	.LVL2798
+	.4byte	0x5798
+	.uleb128 0x48
+	.4byte	.LVL2800
+	.4byte	0x59e7
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2792
+	.4byte	0xae0d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0x5616
+	.4byte	.LFB399
+	.4byte	.LFE399-.LFB399
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xfc17
+	.uleb128 0x44
+	.4byte	.LVL2801
+	.4byte	0x561f
+	.4byte	0xfbf0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2802
+	.4byte	0x7653
+	.4byte	0xfc07
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR124
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2803
+	.4byte	0x57df
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0x60a3
+	.4byte	.LFB381
+	.4byte	.LFE381-.LFB381
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xfd33
+	.uleb128 0x91
+	.4byte	0x60b4
+	.byte	0
+	.uleb128 0x6f
+	.4byte	.LBB524
+	.4byte	.LBE524-.LBB524
+	.4byte	0xfcc9
+	.uleb128 0x74
+	.4byte	0xfc2b
+	.uleb128 0x6b
+	.4byte	.Ldebug_ranges0+0x610
+	.4byte	0xfc57
+	.uleb128 0x73
+	.4byte	0x60bf
+	.4byte	.LLST724
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2823
+	.4byte	0x60cd
+	.4byte	0xfc6b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2824
+	.4byte	0x60cd
+	.4byte	0xfc7f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2826
+	.4byte	0x7653
+	.4byte	0xfc96
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR124
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2827
+	.4byte	0x7653
+	.4byte	0xfcad
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR215
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2828
+	.4byte	0x7c46
+	.uleb128 0x48
+	.4byte	.LVL2829
+	.4byte	0x75f4
+	.uleb128 0x48
+	.4byte	.LVL2830
+	.4byte	0x75f4
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2810
+	.4byte	0x87ee
+	.uleb128 0x48
+	.4byte	.LVL2811
+	.4byte	0x737c
+	.uleb128 0x48
+	.4byte	.LVL2812
+	.4byte	0x7111
+	.uleb128 0x48
+	.4byte	.LVL2813
+	.4byte	0x6e14
+	.uleb128 0x48
+	.4byte	.LVL2814
+	.4byte	0x6e95
+	.uleb128 0x48
+	.4byte	.LVL2815
+	.4byte	0x62f6
+	.uleb128 0x48
+	.4byte	.LVL2816
+	.4byte	0x736f
+	.uleb128 0x48
+	.4byte	.LVL2817
+	.4byte	0x86e8
+	.uleb128 0x48
+	.4byte	.LVL2818
+	.4byte	0x6370
+	.uleb128 0x48
+	.4byte	.LVL2819
+	.4byte	0x6558
+	.uleb128 0x45
+	.4byte	.LVL2820
+	.4byte	0x7735
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0x5383
+	.4byte	.LFB407
+	.4byte	.LFE407-.LFB407
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x1004a
+	.uleb128 0x4f
+	.4byte	0x5394
+	.4byte	.LLST725
+	.uleb128 0x4f
+	.4byte	0x53a0
+	.4byte	.LLST726
+	.uleb128 0x91
+	.4byte	0x53ac
+	.byte	0x1
+	.uleb128 0x74
+	.4byte	0x53b8
+	.uleb128 0x74
+	.4byte	0x53c4
+	.uleb128 0x97
+	.4byte	0x53d0
+	.sleb128 -1
+	.uleb128 0x74
+	.4byte	0x53dc
+	.uleb128 0x74
+	.4byte	0x53e8
+	.uleb128 0x74
+	.4byte	0x53f4
+	.uleb128 0x74
+	.4byte	0x5400
+	.uleb128 0x74
+	.4byte	0x540c
+	.uleb128 0x74
+	.4byte	0x5418
+	.uleb128 0x74
+	.4byte	0x5434
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x628
+	.uleb128 0x4f
+	.4byte	0x53a0
+	.4byte	.LLST727
+	.uleb128 0x4f
+	.4byte	0x5394
+	.4byte	.LLST728
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x628
+	.uleb128 0x74
+	.4byte	0xfd59
+	.uleb128 0x73
+	.4byte	0xfd60
+	.4byte	.LLST729
+	.uleb128 0x90
+	.4byte	0xfd65
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x74
+	.4byte	0xfd6a
+	.uleb128 0x73
+	.4byte	0xfd71
+	.4byte	.LLST730
+	.uleb128 0x73
+	.4byte	0xfd76
+	.4byte	.LLST731
+	.uleb128 0x73
+	.4byte	0xfd7b
+	.4byte	.LLST732
+	.uleb128 0x73
+	.4byte	0xfd80
+	.4byte	.LLST733
+	.uleb128 0x73
+	.4byte	0xfd85
+	.4byte	.LLST734
+	.uleb128 0x73
+	.4byte	0xfd8a
+	.4byte	.LLST735
+	.uleb128 0x95
+	.4byte	0x5424
+	.uleb128 0x95
+	.4byte	0x542c
+	.uleb128 0x74
+	.4byte	0xfd8f
+	.uleb128 0x48
+	.4byte	.LVL2849
+	.4byte	0x5a5c
+	.uleb128 0x48
+	.4byte	.LVL2850
+	.4byte	0x731e
+	.uleb128 0x44
+	.4byte	.LVL2851
+	.4byte	0x64a2
+	.4byte	0xfe39
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2852
+	.4byte	0x82b0
+	.4byte	0xfe4d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2857
+	.4byte	0x5a5c
+	.4byte	0xfe61
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2858
+	.4byte	0x5b4d
+	.4byte	0xfe75
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x9
+	.byte	0xff
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2859
+	.4byte	0x731e
+	.4byte	0xfe89
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2860
+	.4byte	0x103ff
+	.4byte	0xfeb0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR238
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x343
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2861
+	.4byte	0x103ff
+	.4byte	0xfed0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2862
+	.4byte	0x103ff
+	.4byte	0xfef7
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR238
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x344
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2863
+	.4byte	0x103ff
+	.4byte	0xff17
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2864
+	.4byte	0x103ff
+	.4byte	0xff3e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR238
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x345
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2865
+	.4byte	0x103ff
+	.4byte	0xff5e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2866
+	.4byte	0x64a2
+	.4byte	0xff72
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2878
+	.4byte	0xb17b
+	.4byte	0xff88
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -68
+	.byte	0x6
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2887
+	.4byte	0x103ff
+	.4byte	0xffaf
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR238
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x36c
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2888
+	.4byte	0x103ff
+	.4byte	0xffcf
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2889
+	.4byte	0x7a04
+	.4byte	0xffee
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2891
+	.4byte	0x5591
+	.uleb128 0x44
+	.4byte	.LVL2892
+	.4byte	0x5a92
+	.4byte	0x10011
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2893
+	.4byte	0x5569
+	.uleb128 0x48
+	.4byte	.LVL2898
+	.4byte	0x5569
+	.uleb128 0x48
+	.4byte	.LVL2899
+	.4byte	0x5c12
+	.uleb128 0x48
+	.4byte	.LVL2900
+	.4byte	0x93da
+	.uleb128 0x48
+	.4byte	.LVL2901
+	.4byte	0x7c46
+	.uleb128 0x48
+	.4byte	.LVL2902
+	.4byte	0x75f4
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0x98b5
+	.4byte	.LFB302
+	.4byte	.LFE302-.LFB302
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x10130
+	.uleb128 0x4f
+	.4byte	0x98c6
+	.4byte	.LLST736
+	.uleb128 0x74
+	.4byte	0x98d2
+	.uleb128 0x6f
+	.4byte	.LBB537
+	.4byte	.LBE537-.LBB537
+	.4byte	0x100b6
+	.uleb128 0x8b
+	.4byte	0x98c6
+	.uleb128 0x7a
+	.4byte	.LBB538
+	.4byte	.LBE538-.LBB538
+	.uleb128 0x74
+	.4byte	0x10067
+	.uleb128 0x7a
+	.4byte	.LBB539
+	.4byte	.LBE539-.LBB539
+	.uleb128 0x73
+	.4byte	0x98e0
+	.4byte	.LLST737
+	.uleb128 0x45
+	.4byte	.LVL2923
+	.4byte	0x5383
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2912
+	.4byte	0x103ff
+	.4byte	0x100d6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC51
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2913
+	.4byte	0x9f4a
+	.4byte	0x100ea
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2914
+	.4byte	0x9d26
+	.uleb128 0x48
+	.4byte	.LVL2915
+	.4byte	0x9c76
+	.uleb128 0x48
+	.4byte	.LVL2916
+	.4byte	0x87ee
+	.uleb128 0x48
+	.4byte	.LVL2917
+	.4byte	0x8a5f
+	.uleb128 0x48
+	.4byte	.LVL2918
+	.4byte	0x103ff
+	.uleb128 0x48
+	.4byte	.LVL2920
+	.4byte	0x60a3
+	.uleb128 0x45
+	.4byte	.LVL2921
+	.4byte	0x5383
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0xac06
+	.4byte	.LFB264
+	.4byte	.LFE264-.LFB264
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x10238
+	.uleb128 0x4f
+	.4byte	0xac17
+	.4byte	.LLST779
+	.uleb128 0x4f
+	.4byte	0xac23
+	.4byte	.LLST780
+	.uleb128 0x4f
+	.4byte	0xac2f
+	.4byte	.LLST781
+	.uleb128 0x73
+	.4byte	0xac3b
+	.4byte	.LLST782
+	.uleb128 0x73
+	.4byte	0xac47
+	.4byte	.LLST783
+	.uleb128 0x73
+	.4byte	0xac53
+	.4byte	.LLST784
+	.uleb128 0x74
+	.4byte	0xac5f
+	.uleb128 0x90
+	.4byte	0xac69
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -68
+	.uleb128 0x73
+	.4byte	0xac75
+	.4byte	.LLST785
+	.uleb128 0x6b
+	.4byte	.Ldebug_ranges0+0x6a0
+	.4byte	0x1021c
+	.uleb128 0x4f
+	.4byte	0xac2f
+	.4byte	.LLST786
+	.uleb128 0x4f
+	.4byte	0xac23
+	.4byte	.LLST787
+	.uleb128 0x4f
+	.4byte	0xac17
+	.4byte	.LLST788
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x6a0
+	.uleb128 0x74
+	.4byte	0x1015f
+	.uleb128 0x74
+	.4byte	0x10168
+	.uleb128 0x74
+	.4byte	0x10171
+	.uleb128 0x73
+	.4byte	0x1017a
+	.4byte	.LLST789
+	.uleb128 0x74
+	.4byte	0x1017f
+	.uleb128 0x74
+	.4byte	0x10189
+	.uleb128 0x44
+	.4byte	.LVL3122
+	.4byte	0x52a5
+	.4byte	0x101f7
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL3123
+	.4byte	0x4d68
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC58
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x34
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x34
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL3116
+	.4byte	0xb17b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -68
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0x8a0f
+	.4byte	.LFB324
+	.4byte	.LFE324-.LFB324
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x103ff
+	.uleb128 0x74
+	.4byte	0x8a20
+	.uleb128 0x74
+	.4byte	0x8a2c
+	.uleb128 0x74
+	.4byte	0x8a38
+	.uleb128 0x74
+	.4byte	0x8a44
+	.uleb128 0x7a
+	.4byte	.LBB557
+	.4byte	.LBE557-.LBB557
+	.uleb128 0x73
+	.4byte	0x1024c
+	.4byte	.LLST794
+	.uleb128 0x73
+	.4byte	0x10251
+	.4byte	.LLST795
+	.uleb128 0x73
+	.4byte	0x10256
+	.4byte	.LLST796
+	.uleb128 0x73
+	.4byte	0x1025b
+	.4byte	.LLST797
+	.uleb128 0x95
+	.4byte	0x8a50
+	.uleb128 0x48
+	.4byte	.LVL3144
+	.4byte	0x8bc4
+	.uleb128 0x48
+	.4byte	.LVL3145
+	.4byte	0x8bf8
+	.uleb128 0x44
+	.4byte	.LVL3148
+	.4byte	0x8d5f
+	.4byte	0x102b9
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3149
+	.4byte	0xd1ee
+	.4byte	0x102cd
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3150
+	.4byte	0x8dc2
+	.4byte	0x102e1
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3156
+	.4byte	0xb17b
+	.4byte	0x102ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL3157
+	.4byte	0x52a5
+	.uleb128 0x44
+	.4byte	.LVL3159
+	.4byte	0x8dc2
+	.4byte	0x1031c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3161
+	.4byte	0xab78
+	.4byte	0x10330
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL3162
+	.4byte	0x8cb3
+	.uleb128 0x48
+	.4byte	.LVL3164
+	.4byte	0x8d5f
+	.uleb128 0x44
+	.4byte	.LVL3165
+	.4byte	0x530b
+	.4byte	0x1035a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x40
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL3167
+	.4byte	0x52a5
+	.uleb128 0x44
+	.4byte	.LVL3168
+	.4byte	0xac82
+	.4byte	0x10381
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3169
+	.4byte	0xae0d
+	.4byte	0x103a4
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3170
+	.4byte	0x8dc2
+	.4byte	0x103b8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL3172
+	.4byte	0x8dc2
+	.uleb128 0x44
+	.4byte	.LVL3175
+	.4byte	0xac82
+	.4byte	0x103d9
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x32
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL3176
+	.4byte	0x8dc2
+	.uleb128 0x48
+	.4byte	.LVL3177
+	.4byte	0x8dc2
+	.uleb128 0x48
+	.4byte	.LVL3178
+	.4byte	0x8c64
+	.uleb128 0x48
+	.4byte	.LVL3180
+	.4byte	0x8c64
+	.byte	0
+	.byte	0
+	.uleb128 0x98
+	.4byte	.LASF1570
+	.4byte	.LASF1570
+	.byte	0x2a
+	.byte	0x12
+	.uleb128 0x98
+	.4byte	.LASF1571
+	.4byte	.LASF1571
+	.byte	0x21
+	.byte	0xfe
+	.uleb128 0x98
+	.4byte	.LASF1572
+	.4byte	.LASF1572
+	.byte	0x21
+	.byte	0xff
+	.uleb128 0x99
+	.4byte	.LASF1573
+	.4byte	.LASF1573
+	.byte	0x23
+	.2byte	0x16c
+	.uleb128 0x99
+	.4byte	.LASF1008
+	.4byte	.LASF1008
+	.byte	0x23
+	.2byte	0x399
+	.uleb128 0x98
+	.4byte	.LASF1574
+	.4byte	.LASF1574
+	.byte	0x8
+	.byte	0x35
+	.uleb128 0x98
+	.4byte	.LASF1575
+	.4byte	.LASF1575
+	.byte	0x12
+	.byte	0x72
+	.uleb128 0x99
+	.4byte	.LASF1576
+	.4byte	.LASF1576
+	.byte	0x23
+	.2byte	0x16d
+	.uleb128 0x99
+	.4byte	.LASF1577
+	.4byte	.LASF1577
+	.byte	0xd
+	.2byte	0x244
+	.uleb128 0x98
+	.4byte	.LASF1578
+	.4byte	.LASF1578
+	.byte	0x2b
+	.byte	0xb
+	.byte	0
+	.section	.debug_abbrev,"",%progbits
+.Ldebug_abbrev0:
+	.uleb128 0x1
+	.uleb128 0x11
+	.byte	0x1
+	.uleb128 0x25
+	.uleb128 0xe
+	.uleb128 0x13
+	.uleb128 0xb
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x1b
+	.uleb128 0xe
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x10
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x2
+	.uleb128 0x24
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3e
+	.uleb128 0xb
+	.uleb128 0x3
+	.uleb128 0xe
+	.byte	0
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x16
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x4
+	.uleb128 0x26
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x5
+	.uleb128 0x24
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3e
+	.uleb128 0xb
+	.uleb128 0x3
+	.uleb128 0x8
+	.byte	0
+	.byte	0
+	.uleb128 0x6
+	.uleb128 0x1
+	.byte	0x1
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x7
+	.uleb128 0x21
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.byte	0
+	.byte	0
+	.uleb128 0x9
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0xa
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
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+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x78
+	.uleb128 0xa
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x11
+	.uleb128 0x1
+	.byte	0
+	.byte	0
+	.uleb128 0x79
+	.uleb128 0x1d
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x6
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x7a
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x6
+	.byte	0
+	.byte	0
+	.uleb128 0x7b
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x6
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2116
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x7c
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x7d
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x7e
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x6
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.byte	0
+	.byte	0
+	.uleb128 0x7f
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x80
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x81
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x1c
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x82
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x6
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x83
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x1c
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x84
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x85
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x52
+	.uleb128 0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x86
+	.uleb128 0x1d
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x6
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x87
+	.uleb128 0x4109
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x88
+	.uleb128 0x4109
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x2113
+	.uleb128 0x18
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x89
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x6
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0x5
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x8a
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x52
+	.uleb128 0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x8b
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x8c
+	.uleb128 0xa
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x8d
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x20
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x8e
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x6
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x8f
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x90
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x91
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x1c
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x92
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x6
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.byte	0
+	.byte	0
+	.uleb128 0x93
+	.uleb128 0x410a
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2111
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x94
+	.uleb128 0xa
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.byte	0
+	.byte	0
+	.uleb128 0x95
+	.uleb128 0xa
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x96
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x6
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2116
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x97
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x1c
+	.uleb128 0xd
+	.byte	0
+	.byte	0
+	.uleb128 0x98
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x99
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.byte	0
+	.section	.debug_loc,"",%progbits
+.Ldebug_loc0:
+.LLST443:
+	.4byte	.LVL1407
+	.4byte	.LVL1408
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1408
+	.4byte	.LVL1409
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1409
+	.4byte	.LVL1410
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1410
+	.4byte	.LFE496
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST444:
+	.4byte	.LVL1407
+	.4byte	.LVL1408
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1408
+	.4byte	.LVL1409
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1409
+	.4byte	.LVL1410
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL1410
+	.4byte	.LFE496
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST445:
+	.4byte	.LVL1407
+	.4byte	.LVL1408
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1408
+	.4byte	.LVL1409
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1409
+	.4byte	.LVL1410
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	.LVL1410
+	.4byte	.LFE496
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST446:
+	.4byte	.LVL1407
+	.4byte	.LVL1408
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1408
+	.4byte	.LVL1409
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1409
+	.4byte	.LVL1410
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.4byte	.LVL1410
+	.4byte	.LFE496
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST447:
+	.4byte	.LVL1407
+	.4byte	.LVL1408
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1408
+	.4byte	.LVL1409
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1410
+	.4byte	.LFE496
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST448:
+	.4byte	.LVL1407
+	.4byte	.LVL1408
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1408
+	.4byte	.LVL1409
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1410
+	.4byte	.LVL1412
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1412
+	.4byte	.LVL1413
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL1413
+	.4byte	.LVL1414
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1414
+	.4byte	.LVL1415
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1415
+	.4byte	.LFE496
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST449:
+	.4byte	.LVL1407
+	.4byte	.LVL1408
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1408
+	.4byte	.LVL1409
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1409
+	.4byte	.LVL1410
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL1410
+	.4byte	.LFE496
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST450:
+	.4byte	.LVL1407
+	.4byte	.LVL1408
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1408
+	.4byte	.LVL1409
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1409
+	.4byte	.LVL1410
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL1410
+	.4byte	.LFE496
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST451:
+	.4byte	.LVL1407
+	.4byte	.LVL1408
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1408
+	.4byte	.LVL1409
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1409
+	.4byte	.LVL1410
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL1410
+	.4byte	.LFE496
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST738:
+	.4byte	.LVL2925
+	.4byte	.LVL2926-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2926-1
+	.4byte	.LFE492
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST739:
+	.4byte	.LVL2926
+	.4byte	.LVL2927
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2927
+	.4byte	.LVL2930
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2930
+	.4byte	.LFE492
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST440:
+	.4byte	.LVL1401
+	.4byte	.LVL1404
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1404
+	.4byte	.LVL1405-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1405-1
+	.4byte	.LFE490
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST441:
+	.4byte	.LVL1401
+	.4byte	.LVL1402
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1402
+	.4byte	.LFE490
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST442:
+	.4byte	.LVL1401
+	.4byte	.LVL1403
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1403
+	.4byte	.LVL1405-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1405-1
+	.4byte	.LFE490
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST437:
+	.4byte	.LVL1396
+	.4byte	.LVL1399
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1399
+	.4byte	.LVL1400-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1400-1
+	.4byte	.LFE489
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST438:
+	.4byte	.LVL1396
+	.4byte	.LVL1397
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1397
+	.4byte	.LFE489
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST439:
+	.4byte	.LVL1396
+	.4byte	.LVL1398
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1398
+	.4byte	.LVL1400-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1400-1
+	.4byte	.LFE489
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST435:
+	.4byte	.LVL1392
+	.4byte	.LVL1394
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1394
+	.4byte	.LVL1395-1
+	.2byte	0x4
+	.byte	0x71
+	.sleb128 -256
+	.byte	0x9f
+	.4byte	.LVL1395-1
+	.4byte	.LFE488
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST436:
+	.4byte	.LVL1392
+	.4byte	.LVL1393
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1393
+	.4byte	.LVL1395-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1395-1
+	.4byte	.LFE488
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST433:
+	.4byte	.LVL1386
+	.4byte	.LVL1388
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1388
+	.4byte	.LVL1390
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1390
+	.4byte	.LVL1391-1
+	.2byte	0x4
+	.byte	0x71
+	.sleb128 -256
+	.byte	0x9f
+	.4byte	.LVL1391-1
+	.4byte	.LFE487
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST434:
+	.4byte	.LVL1386
+	.4byte	.LVL1387
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1387
+	.4byte	.LVL1390
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1390
+	.4byte	.LVL1391-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1391-1
+	.4byte	.LFE487
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST431:
+	.4byte	.LVL1384
+	.4byte	.LVL1385-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1385-1
+	.4byte	.LFE486
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST432:
+	.4byte	.LVL1384
+	.4byte	.LVL1385-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1385-1
+	.4byte	.LFE486
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST423:
+	.4byte	.LVL1305
+	.4byte	.LVL1306-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1306-1
+	.4byte	.LFE485
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST419:
+	.4byte	.LVL1301
+	.4byte	.LVL1302-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1302-1
+	.4byte	.LFE483
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST420:
+	.4byte	.LVL1301
+	.4byte	.LVL1302-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1302-1
+	.4byte	.LFE483
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST421:
+	.4byte	.LVL1301
+	.4byte	.LVL1302-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1302-1
+	.4byte	.LFE483
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST310:
+	.4byte	.LVL914
+	.4byte	.LVL915
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL915
+	.4byte	.LFE482
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST304:
+	.4byte	.LVL899
+	.4byte	.LVL900-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL900-1
+	.4byte	.LFE481
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST305:
+	.4byte	.LVL899
+	.4byte	.LVL900-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL900-1
+	.4byte	.LFE481
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST306:
+	.4byte	.LVL899
+	.4byte	.LVL900-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL900-1
+	.4byte	.LFE481
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST276:
+	.4byte	.LVL743
+	.4byte	.LVL744-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL744-1
+	.4byte	.LFE480
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST277:
+	.4byte	.LVL743
+	.4byte	.LVL744-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL744-1
+	.4byte	.LFE480
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST278:
+	.4byte	.LVL743
+	.4byte	.LVL744-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL744-1
+	.4byte	.LFE480
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST273:
+	.4byte	.LVL730
+	.4byte	.LVL731-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL731-1
+	.4byte	.LFE404
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST274:
+	.4byte	.LVL734
+	.4byte	.LVL736
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL736
+	.4byte	.LVL737
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL737
+	.4byte	.LVL738
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL738
+	.4byte	.LVL739
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL739
+	.4byte	.LVL740
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST275:
+	.4byte	.LVL732
+	.4byte	.LVL735
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST272:
+	.4byte	.LVL727
+	.4byte	.LVL728
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL728
+	.4byte	.LVL729
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL729
+	.4byte	.LFE403
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST706:
+	.4byte	.LVL2708
+	.4byte	.LVL2710-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2710-1
+	.4byte	.LVL2711
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL2711
+	.4byte	.LVL2713
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2713
+	.4byte	.LFE398
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST707:
+	.4byte	.LVL2708
+	.4byte	.LVL2710-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2710-1
+	.4byte	.LVL2711
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL2711
+	.4byte	.LVL2713
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2713
+	.4byte	.LFE398
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST708:
+	.4byte	.LVL2722
+	.4byte	.LVL2723
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2723
+	.4byte	.LVL2724
+	.2byte	0x5
+	.byte	0x91
+	.sleb128 -52
+	.byte	0x6
+	.byte	0x32
+	.byte	0x1c
+	.4byte	0
+	.4byte	0
+.LLST709:
+	.4byte	.LVL2716
+	.4byte	.LVL2717
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2717
+	.4byte	.LVL2725
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2726
+	.4byte	.LVL2735
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2738
+	.4byte	.LFE398
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST710:
+	.4byte	.LVL2718
+	.4byte	.LVL2721
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2729
+	.4byte	.LVL2732
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2740
+	.4byte	.LFE398
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST711:
+	.4byte	.LVL2716
+	.4byte	.LVL2717
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2717
+	.4byte	.LVL2718-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2721
+	.4byte	.LVL2727
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2727
+	.4byte	.LVL2728
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST712:
+	.4byte	.LVL2715
+	.4byte	.LVL2718
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2720
+	.4byte	.LVL2729
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2731
+	.4byte	.LVL2736
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2738
+	.4byte	.LVL2739
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2741
+	.4byte	.LVL2742
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST713:
+	.4byte	.LVL2709
+	.4byte	.LVL2719
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2720
+	.4byte	.LVL2746
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2748
+	.4byte	.LFE398
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST714:
+	.4byte	.LVL2730
+	.4byte	.LVL2731-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2731-1
+	.4byte	.LVL2735
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	.LVL2738
+	.4byte	.LVL2740-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2740-1
+	.4byte	.LVL2741
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	.LVL2741
+	.4byte	.LVL2743
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2743
+	.4byte	.LFE398
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	0
+	.4byte	0
+.LLST715:
+	.4byte	.LVL2708
+	.4byte	.LVL2714
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST716:
+	.4byte	.LVL2708
+	.4byte	.LVL2714
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST717:
+	.4byte	.LVL2733
+	.4byte	.LVL2734
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2734
+	.4byte	.LVL2735
+	.2byte	0x5
+	.byte	0x91
+	.sleb128 -44
+	.byte	0x6
+	.byte	0x23
+	.uleb128 0xc
+	.4byte	.LVL2738
+	.4byte	.LVL2740-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST718:
+	.4byte	.LVL2750
+	.4byte	.LVL2751
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2751
+	.4byte	.LVL2752
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL2752
+	.4byte	.LVL2753
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2753
+	.4byte	.LFE396
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST719:
+	.4byte	.LVL2760
+	.4byte	.LVL2764
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2764
+	.4byte	.LVL2768
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2771
+	.4byte	.LVL2780
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2780
+	.4byte	.LVL2781
+	.2byte	0x3
+	.byte	0x76
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL2782
+	.4byte	.LFE396
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST720:
+	.4byte	.LVL2754
+	.4byte	.LVL2759
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2777
+	.4byte	.LVL2779
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST721:
+	.4byte	.LVL2750
+	.4byte	.LVL2751
+	.2byte	0xc
+	.byte	0x3
+	.4byte	c_ftl_nand_page_pre_blk
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL2752
+	.4byte	.LVL2755-1
+	.2byte	0xc
+	.byte	0x3
+	.4byte	c_ftl_nand_page_pre_blk
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST722:
+	.4byte	.LVL2772
+	.4byte	.LVL2783
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST267:
+	.4byte	.LVL719
+	.4byte	.LVL720
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL720
+	.4byte	.LVL726
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL726
+	.4byte	.LFE395
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST268:
+	.4byte	.LVL719
+	.4byte	.LVL721-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL721-1
+	.4byte	.LVL726
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL726
+	.4byte	.LFE395
+	.2byte	0x2
+	.byte	0x71
+	.sleb128 4
+	.4byte	0
+	.4byte	0
+.LLST269:
+	.4byte	.LVL719
+	.4byte	.LVL721-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL721-1
+	.4byte	.LVL726
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL726
+	.4byte	.LFE395
+	.2byte	0x2
+	.byte	0x71
+	.sleb128 8
+	.4byte	0
+	.4byte	0
+.LLST270:
+	.4byte	.LVL721
+	.4byte	.LVL725
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST271:
+	.4byte	.LVL721
+	.4byte	.LVL722
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL723
+	.4byte	.LVL724
+	.2byte	0x1
+	.byte	0x5c
+	.4byte	0
+	.4byte	0
+.LLST265:
+	.4byte	.LVL714
+	.4byte	.LVL716
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL716
+	.4byte	.LVL717
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL717
+	.4byte	.LVL718
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL718
+	.4byte	.LFE394
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST266:
+	.4byte	.LVL714
+	.4byte	.LVL715
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST263:
+	.4byte	.LVL710
+	.4byte	.LVL711
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST264:
+	.4byte	.LVL708
+	.4byte	.LVL709
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL709
+	.4byte	.LVL712
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL712
+	.4byte	.LVL713
+	.2byte	0x3
+	.byte	0x72
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST261:
+	.4byte	.LVL702
+	.4byte	.LVL703
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST262:
+	.4byte	.LVL700
+	.4byte	.LVL701
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL701
+	.4byte	.LVL704
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL704
+	.4byte	.LVL705
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL706
+	.4byte	.LVL707
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL707
+	.4byte	.LFE392
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST260:
+	.4byte	.LVL692
+	.4byte	.LVL693
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL693
+	.4byte	.LVL694
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL694
+	.4byte	.LVL695
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL696
+	.4byte	.LVL697
+	.2byte	0x1
+	.byte	0x5e
+	.4byte	.LVL697
+	.4byte	.LVL698
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL699
+	.4byte	.LFE391
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST554:
+	.4byte	.LVL1977
+	.4byte	.LVL1978
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1978
+	.4byte	.LVL1985
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1985
+	.4byte	.LVL1986
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1986
+	.4byte	.LFE390
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST555:
+	.4byte	.LVL1977
+	.4byte	.LVL1980
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1981
+	.4byte	.LVL1982
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1985
+	.4byte	.LVL1988
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1988
+	.4byte	.LFE390
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST559:
+	.4byte	.LVL1999
+	.4byte	.LVL2000
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2000
+	.4byte	.LVL2015
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2015
+	.4byte	.LFE388
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST560:
+	.4byte	.LVL2007
+	.4byte	.LVL2008-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2009
+	.4byte	.LVL2011
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST561:
+	.4byte	.LVL1999
+	.4byte	.LVL2010
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL2010
+	.4byte	.LVL2015
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2015
+	.4byte	.LFE388
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST624:
+	.4byte	.LVL2273
+	.4byte	.LVL2275
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2275
+	.4byte	.LFE387
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST254:
+	.4byte	.LVL681
+	.4byte	.LVL682
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL682
+	.4byte	.LVL685
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL686
+	.4byte	.LVL688
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL688
+	.4byte	.LFE384
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST255:
+	.4byte	.LVL681
+	.4byte	.LVL685
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL685
+	.4byte	.LVL686
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL686
+	.4byte	.LVL688
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL688
+	.4byte	.LFE384
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST256:
+	.4byte	.LVL683
+	.4byte	.LVL687
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST257:
+	.4byte	.LVL683
+	.4byte	.LVL684
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST253:
+	.4byte	.LVL679
+	.4byte	.LVL680
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL680
+	.4byte	.LFE383
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST249:
+	.4byte	.LVL668
+	.4byte	.LVL669
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL669
+	.4byte	.LFE382
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST250:
+	.4byte	.LVL668
+	.4byte	.LVL669
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL669
+	.4byte	.LVL676
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL676
+	.4byte	.LVL677
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL678
+	.4byte	.LFE382
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST251:
+	.4byte	.LVL673
+	.4byte	.LVL674-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST252:
+	.4byte	.LVL668
+	.4byte	.LVL669
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL669
+	.4byte	.LVL670
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL670
+	.4byte	.LVL671
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL671
+	.4byte	.LVL672
+	.2byte	0x2
+	.byte	0x76
+	.sleb128 4
+	.4byte	.LVL672
+	.4byte	.LVL675
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL676
+	.4byte	.LFE382
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST564:
+	.4byte	.LVL2039
+	.4byte	.LVL2042
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2042
+	.4byte	.LVL2046
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2046
+	.4byte	.LVL2047
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2047
+	.4byte	.LFE380
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST565:
+	.4byte	.LVL2049
+	.4byte	.LVL2050
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST566:
+	.4byte	.LVL2039
+	.4byte	.LVL2041
+	.2byte	0x2
+	.byte	0x3c
+	.byte	0x9f
+	.4byte	.LVL2042
+	.4byte	.LVL2043
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2043
+	.4byte	.LVL2044
+	.2byte	0x3
+	.byte	0x76
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL2044
+	.4byte	.LVL2045
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2046
+	.4byte	.LVL2047
+	.2byte	0x2
+	.byte	0x3c
+	.byte	0x9f
+	.4byte	.LVL2047
+	.4byte	.LFE380
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST567:
+	.4byte	.LVL2039
+	.4byte	.LVL2040
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2040
+	.4byte	.LVL2041
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL2046
+	.4byte	.LVL2047
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST740:
+	.4byte	.LVL2931
+	.4byte	.LVL2938
+	.2byte	0x4
+	.byte	0xa
+	.2byte	0x1000
+	.byte	0x9f
+	.4byte	.LVL2938
+	.4byte	.LVL2939
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 -2
+	.byte	0x9f
+	.4byte	.LVL2939
+	.4byte	.LVL2940
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL2940
+	.4byte	.LVL2942
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 -2
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST741:
+	.4byte	.LVL2932
+	.4byte	.LVL2951
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL2952
+	.4byte	.LFE379
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST742:
+	.4byte	.LVL2944
+	.4byte	.LVL2950
+	.2byte	0x4
+	.byte	0x91
+	.sleb128 -80
+	.byte	0x9f
+	.4byte	.LVL2952
+	.4byte	.LFE379
+	.2byte	0x4
+	.byte	0x91
+	.sleb128 -80
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST743:
+	.4byte	.LVL2945
+	.4byte	.LVL2946
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2946
+	.4byte	.LVL2947
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2952
+	.4byte	.LVL2958
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2958
+	.4byte	.LVL2959
+	.2byte	0x3
+	.byte	0x72
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST744:
+	.4byte	.LVL2953
+	.4byte	.LVL2955
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2955
+	.4byte	.LVL2957
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST745:
+	.4byte	.LVL2945
+	.4byte	.LVL2946
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2946
+	.4byte	.LVL2950
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2952
+	.4byte	.LVL2954
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2956
+	.4byte	.LFE379
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST298:
+	.4byte	.LVL867
+	.4byte	.LVL868
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL869
+	.4byte	.LVL884
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL884
+	.4byte	.LVL885
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL885
+	.4byte	.LVL886
+	.2byte	0x7
+	.byte	0x91
+	.sleb128 -44
+	.byte	0x94
+	.byte	0x2
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x9f
+	.4byte	.LVL886
+	.4byte	.LVL895
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST299:
+	.4byte	.LVL870
+	.4byte	.LVL871
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL871
+	.4byte	.LVL872
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL876
+	.4byte	.LVL877
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL877
+	.4byte	.LVL878
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL878
+	.4byte	.LVL879
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL886
+	.4byte	.LVL887
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST300:
+	.4byte	.LVL873
+	.4byte	.LVL874-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST301:
+	.4byte	.LVL870
+	.4byte	.LVL875
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL876
+	.4byte	.LVL891
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST302:
+	.4byte	.LVL867
+	.4byte	.LVL868
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL869
+	.4byte	.LVL888
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL889
+	.4byte	.LVL892
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL892
+	.4byte	.LVL893-1
+	.2byte	0x5
+	.byte	0x3
+	.4byte	g_num_data_superblocks
+	.4byte	0
+	.4byte	0
+.LLST303:
+	.4byte	.LVL867
+	.4byte	.LVL868
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL869
+	.4byte	.LVL882
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL883
+	.4byte	.LVL895
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST247:
+	.4byte	.LVL657
+	.4byte	.LVL658
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL658
+	.4byte	.LFE375
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST248:
+	.4byte	.LVL661
+	.4byte	.LVL666
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL666
+	.4byte	.LVL667
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST678:
+	.4byte	.LVL2548
+	.4byte	.LVL2551
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2551
+	.4byte	.LVL2553
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL2553
+	.4byte	.LVL2554
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2554
+	.4byte	.LFE372
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST679:
+	.4byte	.LVL2549
+	.4byte	.LVL2552
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -80
+	.4byte	.LVL2553
+	.4byte	.LFE372
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -80
+	.4byte	0
+	.4byte	0
+.LLST680:
+	.4byte	.LVL2550
+	.4byte	.LVL2552
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -64
+	.4byte	.LVL2553
+	.4byte	.LFE372
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -64
+	.4byte	0
+	.4byte	0
+.LLST681:
+	.4byte	.LVL2553
+	.4byte	.LVL2554
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2555
+	.4byte	.LVL2558
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL2559
+	.4byte	.LVL2560
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2560
+	.4byte	.LVL2562
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2575
+	.4byte	.LVL2577
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2577
+	.4byte	.LVL2581
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL2582
+	.4byte	.LVL2587
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL2587
+	.4byte	.LVL2593
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2593
+	.4byte	.LVL2594
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL2595
+	.4byte	.LVL2596
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2615
+	.4byte	.LVL2620
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2620
+	.4byte	.LVL2621
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL2621
+	.4byte	.LVL2622-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2633
+	.4byte	.LVL2634
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2634
+	.4byte	.LVL2635
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2635
+	.4byte	.LVL2636-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2641
+	.4byte	.LVL2642
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2642
+	.4byte	.LVL2644
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2646
+	.4byte	.LVL2650
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2650
+	.4byte	.LVL2651
+	.2byte	0x3
+	.byte	0x72
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST682:
+	.4byte	.LVL2632
+	.4byte	.LVL2633
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -64
+	.4byte	.LVL2653
+	.4byte	.LVL2656
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2659
+	.4byte	.LVL2662
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2703
+	.4byte	.LVL2704
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST683:
+	.4byte	.LVL2612
+	.4byte	.LVL2614
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -80
+	.4byte	.LVL2614
+	.4byte	.LVL2624
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2625
+	.4byte	.LVL2631
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2632
+	.4byte	.LVL2633
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -80
+	.4byte	.LVL2633
+	.4byte	.LVL2639
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL2640
+	.4byte	.LVL2645
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL2645
+	.4byte	.LVL2646
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2646
+	.4byte	.LFE372
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST684:
+	.4byte	.LVL2571
+	.4byte	.LVL2575
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -76
+	.4byte	.LVL2607
+	.4byte	.LFE372
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -76
+	.4byte	0
+	.4byte	0
+.LLST685:
+	.4byte	.LVL2568
+	.4byte	.LVL2575
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -84
+	.4byte	.LVL2601
+	.4byte	.LVL2603
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -84
+	.4byte	.LVL2607
+	.4byte	.LFE372
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -84
+	.4byte	0
+	.4byte	0
+.LLST686:
+	.4byte	.LVL2554
+	.4byte	.LVL2556-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2575
+	.4byte	.LVL2578-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2588
+	.4byte	.LVL2589
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2589
+	.4byte	.LVL2590
+	.2byte	0x5
+	.byte	0x7d
+	.sleb128 0
+	.byte	0x6
+	.byte	0x32
+	.byte	0x1c
+	.4byte	.LVL2616
+	.4byte	.LVL2618
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2618
+	.4byte	.LVL2620
+	.2byte	0x6
+	.byte	0x91
+	.sleb128 -72
+	.byte	0x6
+	.byte	0x32
+	.byte	0x1c
+	.4byte	.LVL2643
+	.4byte	.LVL2645
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2647
+	.4byte	.LVL2648
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2648
+	.4byte	.LVL2649
+	.2byte	0x2
+	.byte	0x71
+	.sleb128 -2
+	.4byte	0
+	.4byte	0
+.LLST687:
+	.4byte	.LVL2557
+	.4byte	.LVL2558
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2558
+	.4byte	.LVL2566
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2566
+	.4byte	.LVL2569
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL2579
+	.4byte	.LVL2580
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2580
+	.4byte	.LVL2582
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2587
+	.4byte	.LVL2607
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST688:
+	.4byte	.LVL2557
+	.4byte	.LVL2558
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2558
+	.4byte	.LVL2573
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL2579
+	.4byte	.LVL2580
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2580
+	.4byte	.LVL2582
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2587
+	.4byte	.LVL2610
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST689:
+	.4byte	.LVL2559
+	.4byte	.LVL2573
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2587
+	.4byte	.LVL2591
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2592
+	.4byte	.LVL2611
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2615
+	.4byte	.LVL2617
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL2619
+	.4byte	.LVL2623
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL2633
+	.4byte	.LVL2634
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2634
+	.4byte	.LVL2645
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -72
+	.4byte	.LVL2646
+	.4byte	.LFE372
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -72
+	.4byte	0
+	.4byte	0
+.LLST690:
+	.4byte	.LVL2565
+	.4byte	.LVL2567
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2567
+	.4byte	.LVL2569
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2596
+	.4byte	.LVL2597
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2597
+	.4byte	.LVL2602
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2603
+	.4byte	.LVL2605
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2605
+	.4byte	.LVL2606
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST691:
+	.4byte	.LVL2622
+	.4byte	.LVL2623
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2636
+	.4byte	.LVL2637
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2638
+	.4byte	.LVL2645
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -60
+	.4byte	.LVL2652
+	.4byte	.LVL2658
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -60
+	.4byte	.LVL2658
+	.4byte	.LVL2659
+	.2byte	0x7
+	.byte	0x91
+	.sleb128 -60
+	.byte	0x94
+	.byte	0x2
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x9f
+	.4byte	.LVL2659
+	.4byte	.LFE372
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -60
+	.4byte	0
+	.4byte	0
+.LLST692:
+	.4byte	.LVL2666
+	.4byte	.LVL2675
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2679
+	.4byte	.LVL2701
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST693:
+	.4byte	.LVL2654
+	.4byte	.LVL2657
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL2659
+	.4byte	.LVL2675
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL2675
+	.4byte	.LVL2676
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2679
+	.4byte	.LVL2701
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL2703
+	.4byte	.LVL2707
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST694:
+	.4byte	.LVL2654
+	.4byte	.LVL2657
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL2659
+	.4byte	.LVL2673
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL2679
+	.4byte	.LVL2693
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL2693
+	.4byte	.LVL2695
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2703
+	.4byte	.LVL2707
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST695:
+	.4byte	.LVL2564
+	.4byte	.LVL2575
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL2596
+	.4byte	.LVL2660
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL2660
+	.4byte	.LVL2661
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2661
+	.4byte	.LFE372
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST696:
+	.4byte	.LVL2548
+	.4byte	.LVL2551
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL2553
+	.4byte	.LVL2564
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL2575
+	.4byte	.LVL2596
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL2604
+	.4byte	.LVL2605
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL2609
+	.4byte	.LVL2631
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL2645
+	.4byte	.LVL2646
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST697:
+	.4byte	.LVL2598
+	.4byte	.LVL2600
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2626
+	.4byte	.LVL2627
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2627
+	.4byte	.LVL2629
+	.2byte	0x2
+	.byte	0x73
+	.sleb128 12
+	.4byte	.LVL2655
+	.4byte	.LVL2656
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2659
+	.4byte	.LVL2669
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2670
+	.4byte	.LVL2673
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2681
+	.4byte	.LVL2692
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2696
+	.4byte	.LVL2701
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST698:
+	.4byte	.LVL2548
+	.4byte	.LVL2551
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2553
+	.4byte	.LVL2561
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2561
+	.4byte	.LVL2563-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2563-1
+	.4byte	.LVL2575
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -56
+	.4byte	.LVL2575
+	.4byte	.LVL2596
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2596
+	.4byte	.LFE372
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -56
+	.4byte	0
+	.4byte	0
+.LLST699:
+	.4byte	.LVL2608
+	.4byte	.LVL2614
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL2628
+	.4byte	.LVL2630
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST700:
+	.4byte	.LVL2608
+	.4byte	.LVL2614
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL2614
+	.4byte	.LVL2631
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2645
+	.4byte	.LVL2646
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST701:
+	.4byte	.LVL2612
+	.4byte	.LVL2613
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2613
+	.4byte	.LVL2614
+	.2byte	0x5
+	.byte	0x3
+	.4byte	g_recovery_page_min_ver
+	.4byte	.LVL2614
+	.4byte	.LVL2631
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -60
+	.4byte	.LVL2645
+	.4byte	.LVL2646
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -60
+	.4byte	0
+	.4byte	0
+.LLST702:
+	.4byte	.LVL2671
+	.4byte	.LVL2672
+	.2byte	0x2
+	.byte	0x76
+	.sleb128 4
+	.4byte	.LVL2681
+	.4byte	.LVL2682-1
+	.2byte	0x2
+	.byte	0x76
+	.sleb128 4
+	.4byte	0
+	.4byte	0
+.LLST703:
+	.4byte	.LVL2686
+	.4byte	.LVL2689
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2689
+	.4byte	.LVL2690
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST704:
+	.4byte	.LVL2694
+	.4byte	.LVL2701
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST705:
+	.4byte	.LVL2697
+	.4byte	.LVL2698-1
+	.2byte	0x2
+	.byte	0x75
+	.sleb128 4
+	.4byte	.LVL2698-1
+	.4byte	.LVL2699
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST608:
+	.4byte	.LVL2221
+	.4byte	.LVL2222
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2222
+	.4byte	.LVL2239
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2239
+	.4byte	.LFE371
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST609:
+	.4byte	.LVL2221
+	.4byte	.LVL2223-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST610:
+	.4byte	.LVL2224
+	.4byte	.LVL2225
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST611:
+	.4byte	.LVL2227
+	.4byte	.LVL2229-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2234
+	.4byte	.LVL2236
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2236
+	.4byte	.LVL2237
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST612:
+	.4byte	.LVL2227
+	.4byte	.LVL2233
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2234
+	.4byte	.LVL2235
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST613:
+	.4byte	.LVL2226
+	.4byte	.LVL2228
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2228
+	.4byte	.LVL2229-1
+	.2byte	0x5
+	.byte	0x3
+	.4byte	g_num_free_superblocks
+	.4byte	.LVL2234
+	.4byte	.LVL2237
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST244:
+	.4byte	.LVL647
+	.4byte	.LVL650
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL650
+	.4byte	.LVL652
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL652
+	.4byte	.LVL655
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL655
+	.4byte	.LFE370
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST245:
+	.4byte	.LVL647
+	.4byte	.LVL649
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL649
+	.4byte	.LFE370
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST246:
+	.4byte	.LVL648
+	.4byte	.LVL651
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL651
+	.4byte	.LVL652
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL652
+	.4byte	.LVL653
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL654
+	.4byte	.LVL655
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL655
+	.4byte	.LVL656
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST297:
+	.4byte	.LVL852
+	.4byte	.LVL853
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL853
+	.4byte	.LVL854
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL854
+	.4byte	.LVL855
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL856
+	.4byte	.LVL857
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL858
+	.4byte	.LFE368
+	.2byte	0x1
+	.byte	0x5e
+	.4byte	0
+	.4byte	0
+.LLST665:
+	.4byte	.LVL2483
+	.4byte	.LVL2490
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2490
+	.4byte	.LFE366
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST666:
+	.4byte	.LVL2495
+	.4byte	.LVL2498
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL2498
+	.4byte	.LVL2499
+	.2byte	0x2
+	.byte	0x74
+	.sleb128 0
+	.4byte	.LVL2514
+	.4byte	.LVL2516
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL2516
+	.4byte	.LVL2521
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL2521
+	.4byte	.LVL2523
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL2523
+	.4byte	.LVL2524
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL2525
+	.4byte	.LVL2529
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL2537
+	.4byte	.LVL2538-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2541
+	.4byte	.LVL2542
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST667:
+	.4byte	.LVL2500
+	.4byte	.LVL2501
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2508
+	.4byte	.LVL2509
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2509
+	.4byte	.LVL2511
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL2511
+	.4byte	.LVL2512
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL2513
+	.4byte	.LVL2514
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL2517
+	.4byte	.LVL2519
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2519
+	.4byte	.LVL2520
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL2522
+	.4byte	.LVL2523
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2525
+	.4byte	.LVL2526
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2526
+	.4byte	.LVL2527
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2527
+	.4byte	.LVL2528
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST668:
+	.4byte	.LVL2497
+	.4byte	.LVL2501
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL2508
+	.4byte	.LVL2514
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST669:
+	.4byte	.LVL2526
+	.4byte	.LVL2529
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST670:
+	.4byte	.LVL2484
+	.4byte	.LVL2485
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2485
+	.4byte	.LVL2490
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 24
+	.4byte	.LVL2490
+	.4byte	.LVL2492-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2492-1
+	.4byte	.LVL2502
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	.LVL2508
+	.4byte	.LVL2529
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	0
+	.4byte	0
+.LLST671:
+	.4byte	.LVL2486
+	.4byte	.LVL2487
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2487
+	.4byte	.LVL2490
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 12
+	.4byte	.LVL2490
+	.4byte	.LVL2492-1
+	.2byte	0x2
+	.byte	0x74
+	.sleb128 12
+	.4byte	.LVL2492-1
+	.4byte	.LFE366
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -60
+	.4byte	0
+	.4byte	0
+.LLST672:
+	.4byte	.LVL2488
+	.4byte	.LVL2489
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2489
+	.4byte	.LVL2490
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 16
+	.4byte	.LVL2490
+	.4byte	.LVL2492-1
+	.2byte	0x2
+	.byte	0x74
+	.sleb128 16
+	.4byte	.LVL2492-1
+	.4byte	.LFE366
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -44
+	.4byte	0
+	.4byte	0
+.LLST673:
+	.4byte	.LVL2488
+	.4byte	.LVL2502
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL2508
+	.4byte	.LVL2529
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST674:
+	.4byte	.LVL2493
+	.4byte	.LVL2502
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2508
+	.4byte	.LVL2529
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2530
+	.4byte	.LVL2534
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL2539
+	.4byte	.LVL2541
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST675:
+	.4byte	.LVL2502
+	.4byte	.LVL2503
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2529
+	.4byte	.LFE366
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST676:
+	.4byte	.LVL2531
+	.4byte	.LVL2532
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2532
+	.4byte	.LVL2533
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2539
+	.4byte	.LVL2540-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2540-1
+	.4byte	.LVL2541
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	0
+	.4byte	0
+.LLST677:
+	.4byte	.LVL2536
+	.4byte	.LVL2538-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2541
+	.4byte	.LVL2543
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST663:
+	.4byte	.LVL2460
+	.4byte	.LVL2474
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2479
+	.4byte	.LVL2481
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2482
+	.4byte	.LFE365
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST664:
+	.4byte	.LVL2468
+	.4byte	.LVL2469
+	.2byte	0x12
+	.byte	0x71
+	.sleb128 0
+	.byte	0x33
+	.byte	0x25
+	.byte	0x71
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x23
+	.uleb128 0x18
+	.byte	0x31
+	.byte	0x24
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x4
+	.byte	0x9f
+	.4byte	.LVL2469
+	.4byte	.LVL2470-1
+	.2byte	0x1c
+	.byte	0x3
+	.4byte	c_ftl_nand_data_blks_per_plane
+	.byte	0x94
+	.byte	0x2
+	.byte	0x33
+	.byte	0x25
+	.byte	0x3
+	.4byte	c_ftl_nand_data_blks_per_plane
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x23
+	.uleb128 0x18
+	.byte	0x31
+	.byte	0x24
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x4
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST243:
+	.4byte	.LVL645
+	.4byte	.LVL646
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL646
+	.4byte	.LFE364
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST656:
+	.4byte	.LVL2397
+	.4byte	.LVL2403
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2403
+	.4byte	.LVL2404
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL2404
+	.4byte	.LVL2405
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2407
+	.4byte	.LVL2408
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2408
+	.4byte	.LVL2409
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2410
+	.4byte	.LVL2415
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	.LVL2415
+	.4byte	.LVL2416
+	.2byte	0x7
+	.byte	0x91
+	.sleb128 -52
+	.byte	0x94
+	.byte	0x2
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x9f
+	.4byte	.LVL2416
+	.4byte	.LVL2426
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	.LVL2427
+	.4byte	.LVL2444
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	0
+	.4byte	0
+.LLST657:
+	.4byte	.LVL2396
+	.4byte	.LVL2405
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL2406
+	.4byte	.LVL2409
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL2444
+	.4byte	.LVL2447
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL2447
+	.4byte	.LVL2448
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -56
+	.4byte	.LVL2448
+	.4byte	.LFE361
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST658:
+	.4byte	.LVL2399
+	.4byte	.LVL2404
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	.LVL2411
+	.4byte	.LVL2444
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST659:
+	.4byte	.LVL2397
+	.4byte	.LVL2401
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2402
+	.4byte	.LVL2444
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST660:
+	.4byte	.LVL2423
+	.4byte	.LVL2424
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2424
+	.4byte	.LVL2425
+	.2byte	0x1
+	.byte	0x5e
+	.4byte	.LVL2427
+	.4byte	.LVL2428
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2435
+	.4byte	.LVL2436
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2436
+	.4byte	.LVL2437
+	.2byte	0x1
+	.byte	0x5e
+	.4byte	.LVL2438
+	.4byte	.LVL2439
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2449
+	.4byte	.LVL2453
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2454
+	.4byte	.LVL2455
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2455
+	.4byte	.LFE361
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST661:
+	.4byte	.LVL2412
+	.4byte	.LVL2414
+	.2byte	0x5
+	.byte	0x40
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL2416
+	.4byte	.LVL2417
+	.2byte	0x5
+	.byte	0x40
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL2417
+	.4byte	.LVL2418
+	.2byte	0x5
+	.byte	0x41
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL2422
+	.4byte	.LVL2429
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2430
+	.4byte	.LVL2431
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2434
+	.4byte	.LVL2440
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2441
+	.4byte	.LVL2442
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2450
+	.4byte	.LVL2451
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2452
+	.4byte	.LVL2453
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2455
+	.4byte	.LVL2456
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2457
+	.4byte	.LFE361
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST662:
+	.4byte	.LVL2411
+	.4byte	.LVL2444
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST650:
+	.4byte	.LVL2375
+	.4byte	.LVL2378
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2378
+	.4byte	.LVL2383
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2383
+	.4byte	.LVL2384-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2384-1
+	.4byte	.LVL2384
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL2384
+	.4byte	.LVL2390
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2390
+	.4byte	.LFE359
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST651:
+	.4byte	.LVL2385
+	.4byte	.LVL2386-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2387
+	.4byte	.LVL2388
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2388
+	.4byte	.LVL2389-1
+	.2byte	0x5
+	.byte	0x3
+	.4byte	req_sys+4
+	.4byte	0
+	.4byte	0
+.LLST652:
+	.4byte	.LVL2375
+	.4byte	.LVL2376
+	.2byte	0x7
+	.byte	0x70
+	.sleb128 6
+	.byte	0x94
+	.byte	0x2
+	.byte	0x31
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL2390
+	.4byte	.LFE359
+	.2byte	0x7
+	.byte	0x70
+	.sleb128 6
+	.byte	0x94
+	.byte	0x2
+	.byte	0x31
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST653:
+	.4byte	.LVL2375
+	.4byte	.LVL2378
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 24
+	.4byte	.LVL2378
+	.4byte	.LVL2381-1
+	.2byte	0x2
+	.byte	0x74
+	.sleb128 24
+	.4byte	.LVL2390
+	.4byte	.LFE359
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 24
+	.4byte	0
+	.4byte	0
+.LLST654:
+	.4byte	.LVL2377
+	.4byte	.LVL2378
+	.2byte	0x13
+	.byte	0x72
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x31
+	.byte	0x24
+	.byte	0x70
+	.sleb128 12
+	.byte	0x6
+	.byte	0x22
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL2378
+	.4byte	.LVL2379
+	.2byte	0x13
+	.byte	0x72
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x31
+	.byte	0x24
+	.byte	0x74
+	.sleb128 12
+	.byte	0x6
+	.byte	0x22
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL2379
+	.4byte	.LVL2380
+	.2byte	0x15
+	.byte	0x74
+	.sleb128 0
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x31
+	.byte	0x24
+	.byte	0x74
+	.sleb128 12
+	.byte	0x6
+	.byte	0x22
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST655:
+	.4byte	.LVL2380
+	.4byte	.LVL2382
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST622:
+	.4byte	.LVL2264
+	.4byte	.LVL2268
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2268
+	.4byte	.LVL2272
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL2272
+	.4byte	.LFE357
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST623:
+	.4byte	.LVL2264
+	.4byte	.LVL2265
+	.2byte	0x3
+	.byte	0x8
+	.byte	0x20
+	.byte	0x9f
+	.4byte	.LVL2265
+	.4byte	.LVL2266
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2267
+	.4byte	.LVL2269
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2272
+	.4byte	.LFE357
+	.2byte	0x3
+	.byte	0x8
+	.byte	0x20
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST642:
+	.4byte	.LVL2346
+	.4byte	.LVL2348
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2348
+	.4byte	.LVL2367
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2367
+	.4byte	.LFE356
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST643:
+	.4byte	.LVL2346
+	.4byte	.LVL2348
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2348
+	.4byte	.LVL2367
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2367
+	.4byte	.LFE356
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST644:
+	.4byte	.LVL2346
+	.4byte	.LVL2347
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2347
+	.4byte	.LFE356
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST645:
+	.4byte	.LVL2353
+	.4byte	.LVL2367
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST646:
+	.4byte	.LVL2353
+	.4byte	.LVL2367
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -84
+	.4byte	0
+	.4byte	0
+.LLST647:
+	.4byte	.LVL2351
+	.4byte	.LVL2352-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2352-1
+	.4byte	.LVL2355
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -80
+	.4byte	.LVL2355
+	.4byte	.LVL2356-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2356-1
+	.4byte	.LVL2360
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -76
+	.4byte	.LVL2365
+	.4byte	.LVL2366-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST648:
+	.4byte	.LVL2346
+	.4byte	.LVL2348
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2348
+	.4byte	.LVL2349
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL2350
+	.4byte	.LVL2367
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL2367
+	.4byte	.LFE356
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST649:
+	.4byte	.LVL2346
+	.4byte	.LVL2348
+	.2byte	0xf
+	.byte	0x70
+	.sleb128 0
+	.byte	0x3
+	.4byte	c_ftl_nand_sec_pre_page_shift
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x25
+	.byte	0x9f
+	.4byte	.LVL2348
+	.4byte	.LVL2349
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL2350
+	.4byte	.LVL2367
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL2367
+	.4byte	.LFE356
+	.2byte	0xf
+	.byte	0x70
+	.sleb128 0
+	.byte	0x3
+	.4byte	c_ftl_nand_sec_pre_page_shift
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x25
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST614:
+	.4byte	.LVL2240
+	.4byte	.LVL2242
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2242
+	.4byte	.LVL2253
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2257
+	.4byte	.LVL2262
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2262
+	.4byte	.LFE355
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST615:
+	.4byte	.LVL2240
+	.4byte	.LVL2242
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2242
+	.4byte	.LVL2252
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL2257
+	.4byte	.LVL2262
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL2262
+	.4byte	.LFE355
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST616:
+	.4byte	.LVL2240
+	.4byte	.LVL2241
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2241
+	.4byte	.LVL2244
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL2244
+	.4byte	.LVL2245
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -88
+	.4byte	.LVL2245
+	.4byte	.LVL2258
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL2258
+	.4byte	.LVL2259
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2259
+	.4byte	.LFE355
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST617:
+	.4byte	.LVL2249
+	.4byte	.LVL2262
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST618:
+	.4byte	.LVL2248
+	.4byte	.LVL2262
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -84
+	.4byte	0
+	.4byte	0
+.LLST619:
+	.4byte	.LVL2246
+	.4byte	.LVL2247-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2247-1
+	.4byte	.LVL2259
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -76
+	.4byte	.LVL2259
+	.4byte	.LVL2260
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2260
+	.4byte	.LVL2262
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -76
+	.4byte	0
+	.4byte	0
+.LLST620:
+	.4byte	.LVL2240
+	.4byte	.LVL2242
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2242
+	.4byte	.LVL2243
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL2245
+	.4byte	.LVL2262
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL2262
+	.4byte	.LFE355
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST621:
+	.4byte	.LVL2240
+	.4byte	.LVL2242
+	.2byte	0xf
+	.byte	0x70
+	.sleb128 0
+	.byte	0x3
+	.4byte	c_ftl_nand_sec_pre_page_shift
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x25
+	.byte	0x9f
+	.4byte	.LVL2242
+	.4byte	.LVL2243
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2245
+	.4byte	.LVL2255
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2255
+	.4byte	.LVL2256-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2256-1
+	.4byte	.LVL2257
+	.2byte	0x3
+	.byte	0x76
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL2257
+	.4byte	.LVL2262
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2262
+	.4byte	.LFE355
+	.2byte	0xf
+	.byte	0x70
+	.sleb128 0
+	.byte	0x3
+	.4byte	c_ftl_nand_sec_pre_page_shift
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x25
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST600:
+	.4byte	.LVL2191
+	.4byte	.LVL2196
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2196
+	.4byte	.LFE354
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST601:
+	.4byte	.LVL2191
+	.4byte	.LVL2194
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2194
+	.4byte	.LFE354
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -44
+	.4byte	0
+	.4byte	0
+.LLST602:
+	.4byte	.LVL2191
+	.4byte	.LVL2195
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2195
+	.4byte	.LFE354
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -36
+	.4byte	0
+	.4byte	0
+.LLST603:
+	.4byte	.LVL2198
+	.4byte	.LVL2199
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2200
+	.4byte	.LVL2202
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL2202
+	.4byte	.LVL2203-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2208
+	.4byte	.LVL2210
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL2211
+	.4byte	.LVL2212
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST604:
+	.4byte	.LVL2203
+	.4byte	.LVL2208
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL2212
+	.4byte	.LFE354
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST605:
+	.4byte	.LVL2203
+	.4byte	.LVL2208
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL2212
+	.4byte	.LFE354
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST606:
+	.4byte	.LVL2214
+	.4byte	.LVL2215
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2215
+	.4byte	.LFE354
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -40
+	.4byte	0
+	.4byte	0
+.LLST607:
+	.4byte	.LVL2206
+	.4byte	.LVL2208
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2212
+	.4byte	.LVL2216
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2216
+	.4byte	.LVL2217-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST599:
+	.4byte	.LVL2184
+	.4byte	.LVL2185
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2186
+	.4byte	.LVL2187
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2187
+	.4byte	.LVL2188
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2188
+	.4byte	.LVL2189-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2189-1
+	.4byte	.LVL2189
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2189
+	.4byte	.LVL2190
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST236:
+	.4byte	.LVL617
+	.4byte	.LVL618
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL619
+	.4byte	.LVL620
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL620
+	.4byte	.LVL621
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL622
+	.4byte	.LVL623
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL624
+	.4byte	.LVL628
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL628
+	.4byte	.LVL629
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL630
+	.4byte	.LVL632
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL632
+	.4byte	.LVL633
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL633
+	.4byte	.LVL634
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL634
+	.4byte	.LVL636
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL636
+	.4byte	.LVL637
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL637
+	.4byte	.LFE352
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST237:
+	.4byte	.LVL624
+	.4byte	.LVL628
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL634
+	.4byte	.LFE352
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST238:
+	.4byte	.LVL622
+	.4byte	.LVL623
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL624
+	.4byte	.LVL625
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL630
+	.4byte	.LVL631
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL632
+	.4byte	.LVL634
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL634
+	.4byte	.LVL635
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL636
+	.4byte	.LFE352
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST597:
+	.4byte	.LVL2179
+	.4byte	.LVL2180
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2180
+	.4byte	.LFE351
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST598:
+	.4byte	.LVL2181
+	.4byte	.LVL2182
+	.2byte	0x9
+	.byte	0x72
+	.sleb128 0
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL2182
+	.4byte	.LVL2183-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST586:
+	.4byte	.LVL2139
+	.4byte	.LVL2140
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2140
+	.4byte	.LVL2144
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2144
+	.4byte	.LVL2148
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2148
+	.4byte	.LFE349
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST587:
+	.4byte	.LVL2149
+	.4byte	.LVL2150
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2150
+	.4byte	.LVL2151
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2151
+	.4byte	.LVL2153
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2156
+	.4byte	.LVL2159
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2159
+	.4byte	.LVL2160
+	.2byte	0x3
+	.byte	0x72
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST588:
+	.4byte	.LVL2149
+	.4byte	.LVL2150
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2150
+	.4byte	.LVL2152
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2156
+	.4byte	.LVL2157
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2158
+	.4byte	.LFE349
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST589:
+	.4byte	.LVL2139
+	.4byte	.LVL2140
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 12
+	.4byte	.LVL2140
+	.4byte	.LVL2141-1
+	.2byte	0x2
+	.byte	0x74
+	.sleb128 12
+	.4byte	.LVL2144
+	.4byte	.LVL2145
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 12
+	.4byte	0
+	.4byte	0
+.LLST590:
+	.4byte	.LVL2139
+	.4byte	.LVL2140
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 24
+	.4byte	.LVL2140
+	.4byte	.LVL2141-1
+	.2byte	0x2
+	.byte	0x74
+	.sleb128 24
+	.4byte	.LVL2144
+	.4byte	.LVL2146
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 24
+	.4byte	0
+	.4byte	0
+.LLST591:
+	.4byte	.LVL2145
+	.4byte	.LVL2147
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST579:
+	.4byte	.LVL2108
+	.4byte	.LVL2111-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2111-1
+	.4byte	.LFE348
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST580:
+	.4byte	.LVL2113
+	.4byte	.LVL2119
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL2128
+	.4byte	.LFE348
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST581:
+	.4byte	.LVL2111
+	.4byte	.LVL2114
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2121
+	.4byte	.LVL2124
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2124
+	.4byte	.LVL2127
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2127
+	.4byte	.LVL2128
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST582:
+	.4byte	.LVL2117
+	.4byte	.LVL2118-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2118-1
+	.4byte	.LVL2119
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2128
+	.4byte	.LVL2129
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2129
+	.4byte	.LVL2135
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -36
+	.4byte	.LVL2135
+	.4byte	.LVL2136
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL2136
+	.4byte	.LVL2137
+	.2byte	0x3
+	.byte	0x78
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL2137
+	.4byte	.LFE348
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -36
+	.4byte	0
+	.4byte	0
+.LLST583:
+	.4byte	.LVL2121
+	.4byte	.LVL2122
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2123
+	.4byte	.LVL2124
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2124
+	.4byte	.LVL2125
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST584:
+	.4byte	.LVL2109
+	.4byte	.LVL2116
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL2121
+	.4byte	.LVL2128
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST585:
+	.4byte	.LVL2130
+	.4byte	.LVL2131-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2131-1
+	.4byte	.LVL2135
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL2137
+	.4byte	.LFE348
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST290:
+	.4byte	.LVL827
+	.4byte	.LVL830
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL830
+	.4byte	.LFE346
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST291:
+	.4byte	.LVL829
+	.4byte	.LVL834
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL838
+	.4byte	.LVL845
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST292:
+	.4byte	.LVL839
+	.4byte	.LVL845
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST293:
+	.4byte	.LVL831
+	.4byte	.LVL832
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL832
+	.4byte	.LVL833
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL833
+	.4byte	.LVL835
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL838
+	.4byte	.LVL840
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL840
+	.4byte	.LVL841
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL842
+	.4byte	.LVL845
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST294:
+	.4byte	.LVL833
+	.4byte	.LVL836
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL837
+	.4byte	.LVL838
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL839
+	.4byte	.LVL843
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL843
+	.4byte	.LVL844
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL845
+	.4byte	.LVL847
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL847
+	.4byte	.LVL849
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL849
+	.4byte	.LVL850
+	.2byte	0x3
+	.byte	0x76
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL850
+	.4byte	.LFE346
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST295:
+	.4byte	.LVL833
+	.4byte	.LVL836
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL837
+	.4byte	.LVL838
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL845
+	.4byte	.LVL848-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL848-1
+	.4byte	.LVL849
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST296:
+	.4byte	.LVL833
+	.4byte	.LVL836
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST220:
+	.4byte	.LVL573
+	.4byte	.LVL576
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL577
+	.4byte	.LVL578
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL580
+	.4byte	.LVL582
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST221:
+	.4byte	.LVL573
+	.4byte	.LVL581
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL581
+	.4byte	.LVL583
+	.2byte	0x8
+	.byte	0x73
+	.sleb128 0
+	.byte	0x71
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x36
+	.byte	0x1b
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST222:
+	.4byte	.LVL574
+	.4byte	.LVL575
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL579
+	.4byte	.LVL583
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST214:
+	.4byte	.LVL560
+	.4byte	.LVL566-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL566-1
+	.4byte	.LVL567
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL567
+	.4byte	.LVL572
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL572
+	.4byte	.LFE342
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST215:
+	.4byte	.LVL560
+	.4byte	.LVL565
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL567
+	.4byte	.LVL568
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL570
+	.4byte	.LFE342
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST216:
+	.4byte	.LVL560
+	.4byte	.LVL561
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL561
+	.4byte	.LVL571
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	.LVL571
+	.4byte	.LFE342
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST217:
+	.4byte	.LVL560
+	.4byte	.LVL564
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL564
+	.4byte	.LVL567
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL567
+	.4byte	.LFE342
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST218:
+	.4byte	.LVL562
+	.4byte	.LVL563
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL567
+	.4byte	.LVL571
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST219:
+	.4byte	.LVL560
+	.4byte	.LVL562
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL571
+	.4byte	.LFE342
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST211:
+	.4byte	.LVL546
+	.4byte	.LVL549
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL549
+	.4byte	.LFE341
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST212:
+	.4byte	.LVL546
+	.4byte	.LVL548
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL548
+	.4byte	.LFE341
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST213:
+	.4byte	.LVL553
+	.4byte	.LVL554
+	.2byte	0x10
+	.byte	0x71
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x3
+	.4byte	p_data_block_list_table
+	.byte	0x6
+	.byte	0x22
+	.byte	0x9f
+	.4byte	.LVL554
+	.4byte	.LVL555
+	.2byte	0x12
+	.byte	0x75
+	.sleb128 2
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x3
+	.4byte	p_data_block_list_table
+	.byte	0x6
+	.byte	0x22
+	.byte	0x9f
+	.4byte	.LVL556
+	.4byte	.LVL557
+	.2byte	0x10
+	.byte	0x73
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x3
+	.4byte	p_data_block_list_table
+	.byte	0x6
+	.byte	0x22
+	.byte	0x9f
+	.4byte	.LVL558
+	.4byte	.LVL559
+	.2byte	0x12
+	.byte	0x75
+	.sleb128 2
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x3
+	.4byte	p_data_block_list_table
+	.byte	0x6
+	.byte	0x22
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST206:
+	.4byte	.LVL523
+	.4byte	.LVL526
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL526
+	.4byte	.LVL527
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL527
+	.4byte	.LFE340
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST207:
+	.4byte	.LVL524
+	.4byte	.LVL525
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL527
+	.4byte	.LVL539
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL539
+	.4byte	.LFE340
+	.2byte	0x6
+	.byte	0x77
+	.sleb128 0
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST208:
+	.4byte	.LVL529
+	.4byte	.LVL530
+	.2byte	0xb
+	.byte	0x72
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x31
+	.byte	0x24
+	.byte	0x78
+	.sleb128 0
+	.byte	0x22
+	.4byte	.LVL531
+	.4byte	.LVL533
+	.2byte	0xb
+	.byte	0x72
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x31
+	.byte	0x24
+	.byte	0x78
+	.sleb128 0
+	.byte	0x22
+	.4byte	.LVL534
+	.4byte	.LVL535
+	.2byte	0xb
+	.byte	0x72
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x31
+	.byte	0x24
+	.byte	0x78
+	.sleb128 0
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST209:
+	.4byte	.LVL529
+	.4byte	.LVL531
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL531
+	.4byte	.LVL534
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL534
+	.4byte	.LVL536
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL536
+	.4byte	.LVL537
+	.2byte	0x5
+	.byte	0x77
+	.sleb128 0
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.4byte	.LVL538
+	.4byte	.LVL540
+	.2byte	0x5
+	.byte	0x77
+	.sleb128 0
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST194:
+	.4byte	.LVL468
+	.4byte	.LVL469
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL470
+	.4byte	.LVL477
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL479
+	.4byte	.LVL480
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL480
+	.4byte	.LFE336
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST195:
+	.4byte	.LVL472
+	.4byte	.LVL475
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST191:
+	.4byte	.LVL458
+	.4byte	.LVL459
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL459
+	.4byte	.LFE335
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST192:
+	.4byte	.LVL458
+	.4byte	.LVL463
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL463
+	.4byte	.LVL466
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL466
+	.4byte	.LFE335
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST193:
+	.4byte	.LVL460
+	.4byte	.LVL461
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL462
+	.4byte	.LVL465
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL466
+	.4byte	.LFE335
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST189:
+	.4byte	.LVL450
+	.4byte	.LVL451
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL451
+	.4byte	.LVL452
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL452
+	.4byte	.LVL454
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL456
+	.4byte	.LFE334
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST190:
+	.4byte	.LVL455
+	.4byte	.LVL457
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL457
+	.4byte	.LFE334
+	.2byte	0x7
+	.byte	0x74
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x73
+	.sleb128 0
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST185:
+	.4byte	.LVL443
+	.4byte	.LVL445-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL445-1
+	.4byte	.LFE333
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST186:
+	.4byte	.LVL443
+	.4byte	.LVL445-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL445-1
+	.4byte	.LFE333
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST187:
+	.4byte	.LVL444
+	.4byte	.LVL449
+	.2byte	0x6
+	.byte	0x3
+	.4byte	gSysFreeQueue
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST188:
+	.4byte	.LVL446
+	.4byte	.LVL448
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST289:
+	.4byte	.LVL824
+	.4byte	.LVL825
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL825
+	.4byte	.LVL826-1
+	.2byte	0x5
+	.byte	0x3
+	.4byte	gSysFreeQueue
+	.4byte	.LVL826-1
+	.4byte	.LFE330
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST570:
+	.4byte	.LVL2063
+	.4byte	.LVL2065
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2065
+	.4byte	.LFE329
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST571:
+	.4byte	.LVL2063
+	.4byte	.LVL2064
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2064
+	.4byte	.LVL2070-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2070-1
+	.4byte	.LFE329
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST572:
+	.4byte	.LVL2067
+	.4byte	.LVL2071
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2071
+	.4byte	.LVL2072
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2073
+	.4byte	.LFE329
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST573:
+	.4byte	.LVL2074
+	.4byte	.LVL2076
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2076
+	.4byte	.LVL2078
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL2078
+	.4byte	.LVL2079
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2079
+	.4byte	.LFE329
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST574:
+	.4byte	.LVL2066
+	.4byte	.LVL2068
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL2068
+	.4byte	.LVL2069
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST183:
+	.4byte	.LVL438
+	.4byte	.LVL439
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL439
+	.4byte	.LVL440
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL440
+	.4byte	.LVL441
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL441
+	.4byte	.LFE328
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST184:
+	.4byte	.LVL438
+	.4byte	.LVL440
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL440
+	.4byte	.LVL442
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL442
+	.4byte	.LFE328
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST181:
+	.4byte	.LVL434
+	.4byte	.LVL435-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL435-1
+	.4byte	.LFE327
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST182:
+	.4byte	.LVL436
+	.4byte	.LVL437-1
+	.2byte	0x11
+	.byte	0x70
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x3
+	.4byte	c_ftl_nand_planes_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST179:
+	.4byte	.LVL430
+	.4byte	.LVL432-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL432-1
+	.4byte	.LFE326
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST180:
+	.4byte	.LVL431
+	.4byte	.LVL432-1
+	.2byte	0x1a
+	.byte	0x76
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x3
+	.4byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0x75
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x76
+	.sleb128 0
+	.byte	0x75
+	.sleb128 0
+	.byte	0x1d
+	.byte	0x22
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST176:
+	.4byte	.LVL425
+	.4byte	.LVL428-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL428-1
+	.4byte	.LFE325
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST177:
+	.4byte	.LVL425
+	.4byte	.LVL427
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL427
+	.4byte	.LFE325
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST178:
+	.4byte	.LVL426
+	.4byte	.LVL428-1
+	.2byte	0x20
+	.byte	0x77
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x76
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0x3
+	.4byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0x1e
+	.byte	0x76
+	.sleb128 0
+	.byte	0x75
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x77
+	.sleb128 0
+	.byte	0x76
+	.sleb128 0
+	.byte	0x1d
+	.byte	0x22
+	.byte	0x22
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST575:
+	.4byte	.LVL2095
+	.4byte	.LVL2096
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL2103
+	.4byte	.LVL2104
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL2104
+	.4byte	.LVL2105
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL2105
+	.4byte	.LVL2106
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST576:
+	.4byte	.LVL2083
+	.4byte	.LVL2086
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL2096
+	.4byte	.LVL2097
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL2098
+	.4byte	.LVL2099
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST577:
+	.4byte	.LVL2089
+	.4byte	.LVL2094
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2099
+	.4byte	.LVL2101
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2102
+	.4byte	.LVL2103
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST578:
+	.4byte	.LVL2081
+	.4byte	.LVL2093
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2096
+	.4byte	.LVL2103
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2106
+	.4byte	.LVL2107
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST568:
+	.4byte	.LVL2055
+	.4byte	.LVL2061
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2062
+	.4byte	.LFE321
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST569:
+	.4byte	.LVL2056
+	.4byte	.LVL2057
+	.2byte	0x13
+	.byte	0x73
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x76
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x74
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x3a
+	.byte	0x24
+	.byte	0x9f
+	.4byte	.LVL2057
+	.4byte	.LVL2058
+	.2byte	0x13
+	.byte	0x72
+	.sleb128 15
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x76
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x74
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x3a
+	.byte	0x24
+	.byte	0x9f
+	.4byte	.LVL2058
+	.4byte	.LVL2059-1
+	.2byte	0x18
+	.byte	0x3
+	.4byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x76
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x74
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x3a
+	.byte	0x24
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST287:
+	.4byte	.LVL816
+	.4byte	.LVL818
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL818
+	.4byte	.LVL822
+	.2byte	0x4
+	.byte	0x75
+	.sleb128 -1022
+	.byte	0x9f
+	.4byte	.LVL822
+	.4byte	.LFE319
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST288:
+	.4byte	.LVL816
+	.4byte	.LVL817
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL817
+	.4byte	.LVL822
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL822
+	.4byte	.LFE319
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST171:
+	.4byte	.LVL418
+	.4byte	.LVL420-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL420-1
+	.4byte	.LFE317
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST172:
+	.4byte	.LVL419
+	.4byte	.LVL424
+	.2byte	0x10
+	.byte	0x76
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x75
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST173:
+	.4byte	.LVL421
+	.4byte	.LVL422-1
+	.2byte	0x32
+	.byte	0x74
+	.sleb128 0
+	.byte	0x35
+	.byte	0x25
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x32
+	.byte	0x24
+	.byte	0x76
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x75
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x23
+	.uleb128 0x6
+	.byte	0x32
+	.byte	0x24
+	.byte	0x3
+	.4byte	gBbtInfo+4
+	.byte	0x22
+	.byte	0x6
+	.byte	0x22
+	.byte	0x6
+	.byte	0x74
+	.sleb128 0
+	.byte	0x4f
+	.byte	0x1a
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x25
+	.byte	0x31
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST174:
+	.4byte	.LVL421
+	.4byte	.LVL422-1
+	.2byte	0x19
+	.byte	0x76
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x75
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x23
+	.uleb128 0x6
+	.byte	0x32
+	.byte	0x24
+	.byte	0x3
+	.4byte	gBbtInfo+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST175:
+	.4byte	.LVL421
+	.4byte	.LVL423
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST167:
+	.4byte	.LVL410
+	.4byte	.LVL411-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL411-1
+	.4byte	.LFE316
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST168:
+	.4byte	.LVL412
+	.4byte	.LVL417
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST169:
+	.4byte	.LVL414
+	.4byte	.LVL415
+	.2byte	0xa
+	.byte	0x76
+	.sleb128 6
+	.byte	0x32
+	.byte	0x24
+	.byte	0x3
+	.4byte	gBbtInfo+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST170:
+	.4byte	.LVL414
+	.4byte	.LVL416-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST635:
+	.4byte	.LVL2314
+	.4byte	.LVL2316
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2316
+	.4byte	.LVL2317
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL2317
+	.4byte	.LVL2318-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2318-1
+	.4byte	.LVL2336
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL2336
+	.4byte	.LVL2337
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2337
+	.4byte	.LFE309
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST636:
+	.4byte	.LVL2314
+	.4byte	.LVL2316
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2316
+	.4byte	.LVL2317
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL2317
+	.4byte	.LVL2318-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2318-1
+	.4byte	.LVL2321
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2321
+	.4byte	.LVL2336
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL2336
+	.4byte	.LFE309
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST637:
+	.4byte	.LVL2314
+	.4byte	.LVL2315
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2315
+	.4byte	.LFE309
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST638:
+	.4byte	.LVL2322
+	.4byte	.LVL2327
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST639:
+	.4byte	.LVL2323
+	.4byte	.LVL2324
+	.2byte	0x21
+	.byte	0x74
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x76
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1c
+	.byte	0x12
+	.byte	0x40
+	.byte	0x4b
+	.byte	0x24
+	.byte	0x22
+	.byte	0x75
+	.sleb128 0
+	.byte	0x16
+	.byte	0x14
+	.byte	0x40
+	.byte	0x4b
+	.byte	0x24
+	.byte	0x22
+	.byte	0x2d
+	.byte	0x28
+	.2byte	0x1
+	.byte	0x16
+	.byte	0x13
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST640:
+	.4byte	.LVL2320
+	.4byte	.LVL2325
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2325
+	.4byte	.LVL2336
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST641:
+	.4byte	.LVL2332
+	.4byte	.LVL2333-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST764:
+	.4byte	.LVL3020
+	.4byte	.LVL3023
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL3023
+	.4byte	.LVL3025
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL3025
+	.4byte	.LVL3027
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL3027
+	.4byte	.LVL3105
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL3105
+	.4byte	.LVL3106
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL3106
+	.4byte	.LFE308
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST765:
+	.4byte	.LVL3020
+	.4byte	.LVL3022
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL3022
+	.4byte	.LVL3025
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL3025
+	.4byte	.LVL3029
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL3029
+	.4byte	.LVL3061
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL3061
+	.4byte	.LVL3063
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL3063
+	.4byte	.LVL3105
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL3105
+	.4byte	.LVL3107
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL3107
+	.4byte	.LFE308
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST766:
+	.4byte	.LVL3020
+	.4byte	.LVL3021
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL3021
+	.4byte	.LVL3024
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -100
+	.4byte	.LVL3025
+	.4byte	.LVL3028
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL3028
+	.4byte	.LVL3036
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -100
+	.4byte	.LVL3053
+	.4byte	.LVL3063
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -100
+	.4byte	.LVL3063
+	.4byte	.LVL3064
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL3064
+	.4byte	.LVL3067
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -100
+	.4byte	.LVL3105
+	.4byte	.LVL3107
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL3107
+	.4byte	.LFE308
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -100
+	.4byte	0
+	.4byte	0
+.LLST767:
+	.4byte	.LVL3020
+	.4byte	.LVL3024-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL3024-1
+	.4byte	.LVL3024
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -108
+	.4byte	.LVL3025
+	.4byte	.LVL3026
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL3026
+	.4byte	.LVL3036
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -108
+	.4byte	.LVL3053
+	.4byte	.LVL3065
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -108
+	.4byte	.LVL3065
+	.4byte	.LVL3066-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL3066-1
+	.4byte	.LVL3067
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -108
+	.4byte	.LVL3105
+	.4byte	.LFE308
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -108
+	.4byte	0
+	.4byte	0
+.LLST768:
+	.4byte	.LVL3071
+	.4byte	.LVL3100
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST769:
+	.4byte	.LVL3035
+	.4byte	.LVL3036
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL3036
+	.4byte	.LVL3053
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL3067
+	.4byte	.LVL3105
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST770:
+	.4byte	.LVL3031
+	.4byte	.LVL3032
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL3032
+	.4byte	.LVL3062
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL3062
+	.4byte	.LVL3065
+	.2byte	0x3
+	.byte	0x7a
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL3065
+	.4byte	.LVL3105
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL3107
+	.4byte	.LFE308
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST771:
+	.4byte	.LVL3034
+	.4byte	.LVL3035-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL3035-1
+	.4byte	.LVL3036
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -92
+	.4byte	.LVL3053
+	.4byte	.LVL3055
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL3055
+	.4byte	.LVL3067
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -92
+	.4byte	.LVL3107
+	.4byte	.LFE308
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -92
+	.4byte	0
+	.4byte	0
+.LLST772:
+	.4byte	.LVL3069
+	.4byte	.LVL3070
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL3070
+	.4byte	.LVL3072
+	.2byte	0x2
+	.byte	0x71
+	.sleb128 4
+	.4byte	.LVL3072
+	.4byte	.LVL3073-1
+	.2byte	0xb
+	.byte	0x3
+	.4byte	req_prgm
+	.byte	0x6
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x4
+	.4byte	0
+	.4byte	0
+.LLST773:
+	.4byte	.LVL3045
+	.4byte	.LVL3048
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL3048
+	.4byte	.LVL3050
+	.2byte	0x3
+	.byte	0x78
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL3067
+	.4byte	.LVL3089
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL3089
+	.4byte	.LVL3090
+	.2byte	0x3
+	.byte	0x78
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL3090
+	.4byte	.LVL3100
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST774:
+	.4byte	.LVL3034
+	.4byte	.LVL3035-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL3035-1
+	.4byte	.LVL3045
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -104
+	.4byte	.LVL3049
+	.4byte	.LVL3051
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL3051
+	.4byte	.LVL3053
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -104
+	.4byte	.LVL3053
+	.4byte	.LVL3054
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL3054
+	.4byte	.LVL3060
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -104
+	.4byte	.LVL3060
+	.4byte	.LVL3067
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL3100
+	.4byte	.LVL3104
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -104
+	.4byte	.LVL3104
+	.4byte	.LVL3105
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL3107
+	.4byte	.LFE308
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST775:
+	.4byte	.LVL3040
+	.4byte	.LVL3041
+	.2byte	0x22
+	.byte	0x3
+	.4byte	g_active_superblock+7
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x32
+	.byte	0x24
+	.byte	0x12
+	.byte	0x40
+	.byte	0x4b
+	.byte	0x24
+	.byte	0x22
+	.byte	0x91
+	.sleb128 -104
+	.byte	0x6
+	.byte	0x16
+	.byte	0x14
+	.byte	0x40
+	.byte	0x4b
+	.byte	0x24
+	.byte	0x22
+	.byte	0x2d
+	.byte	0x28
+	.2byte	0x1
+	.byte	0x16
+	.byte	0x13
+	.byte	0x9f
+	.4byte	.LVL3041
+	.4byte	.LVL3042
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL3042
+	.4byte	.LVL3045
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -76
+	.4byte	.LVL3046
+	.4byte	.LVL3047
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL3047
+	.4byte	.LVL3048
+	.2byte	0x3
+	.byte	0x78
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL3048
+	.4byte	.LVL3050
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL3100
+	.4byte	.LVL3105
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST776:
+	.4byte	.LVL3035
+	.4byte	.LVL3036
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL3057
+	.4byte	.LVL3058
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL3058
+	.4byte	.LVL3060-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL3074
+	.4byte	.LVL3077
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL3079
+	.4byte	.LVL3081
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL3081
+	.4byte	.LVL3083
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -88
+	.4byte	.LVL3084
+	.4byte	.LVL3086
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -88
+	.4byte	.LVL3091
+	.4byte	.LVL3093
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -88
+	.4byte	0
+	.4byte	0
+.LLST777:
+	.4byte	.LVL3035
+	.4byte	.LVL3036
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL3057
+	.4byte	.LVL3067
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL3075
+	.4byte	.LVL3076
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL3076
+	.4byte	.LVL3077
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -96
+	.4byte	.LVL3079
+	.4byte	.LVL3080
+	.2byte	0x6
+	.byte	0x72
+	.sleb128 0
+	.byte	0x71
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL3080
+	.4byte	.LVL3082
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL3082
+	.4byte	.LVL3083
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -96
+	.4byte	.LVL3084
+	.4byte	.LVL3085
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL3085
+	.4byte	.LVL3086
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -96
+	.4byte	.LVL3091
+	.4byte	.LVL3092
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL3092
+	.4byte	.LVL3093
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -96
+	.4byte	.LVL3107
+	.4byte	.LFE308
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST778:
+	.4byte	.LVL3035
+	.4byte	.LVL3053
+	.2byte	0x6
+	.byte	0x3
+	.4byte	g_active_superblock
+	.byte	0x9f
+	.4byte	.LVL3067
+	.4byte	.LVL3105
+	.2byte	0x6
+	.byte	0x3
+	.4byte	g_active_superblock
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST625:
+	.4byte	.LVL2286
+	.4byte	.LVL2291
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2291
+	.4byte	.LVL2292
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL2292
+	.4byte	.LFE306
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST626:
+	.4byte	.LVL2286
+	.4byte	.LVL2290
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2290
+	.4byte	.LVL2312
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL2312
+	.4byte	.LFE306
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST627:
+	.4byte	.LVL2286
+	.4byte	.LVL2289
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2289
+	.4byte	.LFE306
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST628:
+	.4byte	.LVL2286
+	.4byte	.LVL2287
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2287
+	.4byte	.LVL2312
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2312
+	.4byte	.LFE306
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST629:
+	.4byte	.LVL2292
+	.4byte	.LVL2312
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST630:
+	.4byte	.LVL2302
+	.4byte	.LVL2303-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2303-1
+	.4byte	.LVL2309
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -44
+	.4byte	0
+	.4byte	0
+.LLST631:
+	.4byte	.LVL2293
+	.4byte	.LVL2294
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2304
+	.4byte	.LVL2305
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST632:
+	.4byte	.LVL2288
+	.4byte	.LVL2312
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST633:
+	.4byte	.LVL2301
+	.4byte	.LVL2303-1
+	.2byte	0x2
+	.byte	0x75
+	.sleb128 12
+	.4byte	0
+	.4byte	0
+.LLST634:
+	.4byte	.LVL2286
+	.4byte	.LVL2288
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2288
+	.4byte	.LVL2312
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST746:
+	.4byte	.LVL2960
+	.4byte	.LVL2963
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2963
+	.4byte	.LVL2966
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL2966
+	.4byte	.LVL2969
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2969
+	.4byte	.LVL3018
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL3018
+	.4byte	.LVL3019
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL3019
+	.4byte	.LFE305
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST747:
+	.4byte	.LVL2960
+	.4byte	.LVL2962
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2962
+	.4byte	.LVL2966
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2966
+	.4byte	.LVL2970-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2970-1
+	.4byte	.LVL3018
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL3018
+	.4byte	.LFE305
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST748:
+	.4byte	.LVL2960
+	.4byte	.LVL2961
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2961
+	.4byte	.LVL2966
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -68
+	.4byte	.LVL2966
+	.4byte	.LVL2968
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2968
+	.4byte	.LFE305
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -68
+	.4byte	0
+	.4byte	0
+.LLST749:
+	.4byte	.LVL2960
+	.4byte	.LVL2964-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2964-1
+	.4byte	.LVL2966
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2966
+	.4byte	.LVL2967
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2967
+	.4byte	.LFE305
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST750:
+	.4byte	.LVL2960
+	.4byte	.LVL2965
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2966
+	.4byte	.LVL2978
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL3018
+	.4byte	.LFE305
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST751:
+	.4byte	.LVL2972
+	.4byte	.LVL2973
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2973
+	.4byte	.LVL3018
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -80
+	.4byte	0
+	.4byte	0
+.LLST752:
+	.4byte	.LVL2975
+	.4byte	.LVL2978
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2978
+	.4byte	.LVL3018
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -76
+	.4byte	0
+	.4byte	0
+.LLST753:
+	.4byte	.LVL3001
+	.4byte	.LVL3002
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL3002
+	.4byte	.LVL3003-1
+	.2byte	0x12
+	.byte	0x3
+	.4byte	c_ftl_nand_sec_pre_page
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x74
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x78
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST754:
+	.4byte	.LVL2976
+	.4byte	.LVL2978
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -80
+	.4byte	.LVL2978
+	.4byte	.LVL3018
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST755:
+	.4byte	.LVL2987
+	.4byte	.LVL2988
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2988
+	.4byte	.LVL3000
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL3014
+	.4byte	.LVL3018
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST756:
+	.4byte	.LVL2976
+	.4byte	.LVL2978
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2978
+	.4byte	.LVL2999
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL3000
+	.4byte	.LVL3018
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST757:
+	.4byte	.LVL2976
+	.4byte	.LVL2977
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2977
+	.4byte	.LVL2978
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2978
+	.4byte	.LVL2980
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -92
+	.4byte	.LVL2980
+	.4byte	.LVL2981-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2981-1
+	.4byte	.LVL2984
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -92
+	.4byte	.LVL2984
+	.4byte	.LVL2985
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL2985
+	.4byte	.LVL2986
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2986
+	.4byte	.LVL3018
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -92
+	.4byte	0
+	.4byte	0
+.LLST758:
+	.4byte	.LVL2978
+	.4byte	.LVL3007
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -64
+	.4byte	.LVL3007
+	.4byte	.LVL3010
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL3010
+	.4byte	.LVL3018
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -64
+	.4byte	0
+	.4byte	0
+.LLST759:
+	.4byte	.LVL2966
+	.4byte	.LVL2978
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2978
+	.4byte	.LVL3007
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -72
+	.4byte	.LVL3007
+	.4byte	.LVL3008
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL3008
+	.4byte	.LVL3009
+	.2byte	0x6
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x71
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL3009
+	.4byte	.LVL3010
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL3010
+	.4byte	.LVL3018
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -72
+	.4byte	.LVL3018
+	.4byte	.LFE305
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST760:
+	.4byte	.LVL2966
+	.4byte	.LVL2978
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2978
+	.4byte	.LVL3012
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL3012
+	.4byte	.LVL3013
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL3013
+	.4byte	.LVL3018
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL3018
+	.4byte	.LFE305
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST761:
+	.4byte	.LVL2982
+	.4byte	.LVL2983
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL3000
+	.4byte	.LVL3005
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST762:
+	.4byte	.LVL2993
+	.4byte	.LVL2994
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2994
+	.4byte	.LVL2995
+	.2byte	0x7
+	.byte	0xa
+	.2byte	0x802
+	.byte	0x73
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL2995
+	.4byte	.LVL2996
+	.2byte	0x7
+	.byte	0xa
+	.2byte	0x801
+	.byte	0x73
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL3015
+	.4byte	.LVL3016
+	.2byte	0x7
+	.byte	0xa
+	.2byte	0x801
+	.byte	0x73
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL3016
+	.4byte	.LVL3018
+	.2byte	0x8
+	.byte	0xa
+	.2byte	0x802
+	.byte	0x91
+	.sleb128 -48
+	.byte	0x6
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST763:
+	.4byte	.LVL2992
+	.4byte	.LVL2997
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL3015
+	.4byte	.LVL3018
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST798:
+	.4byte	.LVL3190
+	.4byte	.LVL3192
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL3194
+	.4byte	.LVL3195
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL3207
+	.4byte	.LVL3209
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL3212
+	.4byte	.LVL3213
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL3217
+	.4byte	.LVL3218
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL3220
+	.4byte	.LVL3221
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL3221
+	.4byte	.LVL3222-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL3224
+	.4byte	.LVL3225
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST799:
+	.4byte	.LVL3194
+	.4byte	.LVL3200
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL3221
+	.4byte	.LVL3223
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL3224
+	.4byte	.LVL3225
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST800:
+	.4byte	.LVL3188
+	.4byte	.LVL3191
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL3191
+	.4byte	.LVL3193
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL3207
+	.4byte	.LVL3210
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL3211
+	.4byte	.LVL3216
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL3216
+	.4byte	.LVL3217
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST801:
+	.4byte	.LVL3186
+	.4byte	.LVL3187
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL3187
+	.4byte	.LVL3189
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL3205
+	.4byte	.LVL3206
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL3206
+	.4byte	.LVL3207
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST528:
+	.4byte	.LVL1815
+	.4byte	.LVL1818
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1818
+	.4byte	.LVL1874
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1874
+	.4byte	.LFE300
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST529:
+	.4byte	.LVL1815
+	.4byte	.LVL1816
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1816
+	.4byte	.LVL1874
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL1874
+	.4byte	.LFE300
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST530:
+	.4byte	.LVL1817
+	.4byte	.LVL1821
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1821
+	.4byte	.LVL1837
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1838
+	.4byte	.LVL1848
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1849
+	.4byte	.LVL1851
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1852
+	.4byte	.LVL1867
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1868
+	.4byte	.LVL1874
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST531:
+	.4byte	.LVL1817
+	.4byte	.LVL1821
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1821
+	.4byte	.LVL1826
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1826
+	.4byte	.LVL1827
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1827
+	.4byte	.LVL1837
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1838
+	.4byte	.LVL1843
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1844
+	.4byte	.LVL1862
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1863
+	.4byte	.LVL1874
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST532:
+	.4byte	.LVL1820
+	.4byte	.LVL1821
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1821
+	.4byte	.LVL1822
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1824
+	.4byte	.LVL1826
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1826
+	.4byte	.LVL1827
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1827
+	.4byte	.LVL1828
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1828
+	.4byte	.LVL1829
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1831
+	.4byte	.LVL1832
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1832
+	.4byte	.LVL1835
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1836
+	.4byte	.LVL1837
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1838
+	.4byte	.LVL1845
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1845
+	.4byte	.LVL1846
+	.2byte	0x3
+	.byte	0x7a
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1847
+	.4byte	.LVL1850
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1850
+	.4byte	.LVL1853
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1853
+	.4byte	.LVL1854
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1855
+	.4byte	.LVL1857
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1857
+	.4byte	.LVL1864
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1864
+	.4byte	.LVL1865
+	.2byte	0x3
+	.byte	0x7b
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1866
+	.4byte	.LVL1869
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1869
+	.4byte	.LVL1870
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1871
+	.4byte	.LVL1872
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1872
+	.4byte	.LVL1873
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST533:
+	.4byte	.LVL1840
+	.4byte	.LVL1841-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1859
+	.4byte	.LVL1860-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST534:
+	.4byte	.LVL1815
+	.4byte	.LVL1825
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL1838
+	.4byte	.LVL1856
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL1856
+	.4byte	.LVL1857
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -44
+	.4byte	.LVL1874
+	.4byte	.LFE300
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST535:
+	.4byte	.LVL1815
+	.4byte	.LVL1826
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1826
+	.4byte	.LVL1833
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1834
+	.4byte	.LVL1836
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1838
+	.4byte	.LVL1857
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1857
+	.4byte	.LVL1871
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1874
+	.4byte	.LFE300
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST536:
+	.4byte	.LVL1815
+	.4byte	.LVL1825
+	.2byte	0x2
+	.byte	0x36
+	.byte	0x9f
+	.4byte	.LVL1838
+	.4byte	.LVL1856
+	.2byte	0x2
+	.byte	0x36
+	.byte	0x9f
+	.4byte	.LVL1856
+	.4byte	.LVL1857
+	.2byte	0x7
+	.byte	0x91
+	.sleb128 -44
+	.byte	0x94
+	.byte	0x2
+	.byte	0x32
+	.byte	0x25
+	.byte	0x9f
+	.4byte	.LVL1874
+	.4byte	.LFE300
+	.2byte	0x2
+	.byte	0x36
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST537:
+	.4byte	.LVL1815
+	.4byte	.LVL1819
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1819
+	.4byte	.LVL1825
+	.2byte	0xa
+	.byte	0x91
+	.sleb128 -44
+	.byte	0x94
+	.byte	0x1
+	.byte	0x30
+	.byte	0x2e
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL1838
+	.4byte	.LVL1855
+	.2byte	0xa
+	.byte	0x91
+	.sleb128 -44
+	.byte	0x94
+	.byte	0x1
+	.byte	0x30
+	.byte	0x2e
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL1855
+	.4byte	.LVL1857
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL1874
+	.4byte	.LFE300
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST538:
+	.4byte	.LVL1815
+	.4byte	.LVL1821
+	.2byte	0x5
+	.byte	0x3
+	.4byte	gMultiPageProgEn
+	.4byte	.LVL1821
+	.4byte	.LVL1837
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -36
+	.4byte	.LVL1838
+	.4byte	.LVL1874
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -36
+	.4byte	.LVL1874
+	.4byte	.LFE300
+	.2byte	0x5
+	.byte	0x3
+	.4byte	gMultiPageProgEn
+	.4byte	0
+	.4byte	0
+.LLST429:
+	.4byte	.LVL1378
+	.4byte	.LVL1379
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL1379
+	.4byte	.LVL1380
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1381
+	.4byte	.LVL1383
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST430:
+	.4byte	.LVL1322
+	.4byte	.LVL1328
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1328
+	.4byte	.LVL1336
+	.2byte	0x7
+	.byte	0x75
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL1337
+	.4byte	.LVL1339
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1344
+	.4byte	.LVL1345
+	.2byte	0xe
+	.byte	0x3
+	.4byte	c_ftl_nand_blk_pre_plane
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x31
+	.byte	0x24
+	.byte	0x9f
+	.4byte	.LVL1345
+	.4byte	.LVL1346-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1347
+	.4byte	.LVL1348
+	.2byte	0x9
+	.byte	0x3
+	.4byte	c_ftl_nand_max_map_blks
+	.byte	0x6
+	.byte	0x31
+	.byte	0x24
+	.byte	0x9f
+	.4byte	.LVL1348
+	.4byte	.LVL1351
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1357
+	.4byte	.LVL1358
+	.2byte	0xe
+	.byte	0x3
+	.4byte	c_ftl_nand_map_region_num
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x32
+	.byte	0x24
+	.byte	0x9f
+	.4byte	.LVL1358
+	.4byte	.LVL1361
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1362
+	.4byte	.LVL1363
+	.2byte	0x9
+	.byte	0x3
+	.4byte	c_ftl_nand_max_map_blks
+	.byte	0x6
+	.byte	0x32
+	.byte	0x24
+	.byte	0x9f
+	.4byte	.LVL1363
+	.4byte	.LVL1364-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1365
+	.4byte	.LVL1366
+	.2byte	0xe
+	.byte	0x3
+	.4byte	c_ftl_nand_l2pmap_ram_region_num
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x3c
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL1366
+	.4byte	.LVL1367-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1368
+	.4byte	.LVL1369
+	.2byte	0x18
+	.byte	0x3
+	.4byte	c_ftl_nand_l2pmap_ram_region_num
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x3
+	.4byte	c_ftl_nand_byte_pre_page
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL1369
+	.4byte	.LVL1370-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1371
+	.4byte	.LVL1372
+	.2byte	0xe
+	.byte	0x3
+	.4byte	c_ftl_nand_blk_pre_plane
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL1372
+	.4byte	.LVL1373-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1374
+	.4byte	.LVL1375
+	.2byte	0x11
+	.byte	0x3
+	.4byte	c_ftl_nand_die_num
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x70
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x32
+	.byte	0x24
+	.byte	0x9f
+	.4byte	.LVL1375
+	.4byte	.LVL1376
+	.2byte	0x1e
+	.byte	0x3
+	.4byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x23
+	.uleb128 0x1f
+	.byte	0x35
+	.byte	0x26
+	.byte	0x3
+	.4byte	c_ftl_nand_die_num
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x32
+	.byte	0x24
+	.byte	0x9f
+	.4byte	.LVL1376
+	.4byte	.LVL1377-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST162:
+	.4byte	.LVL381
+	.4byte	.LVL382
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL382
+	.4byte	.LVL396
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL396
+	.4byte	.LFE296
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST163:
+	.4byte	.LVL383
+	.4byte	.LVL384
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL384
+	.4byte	.LVL386
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL387
+	.4byte	.LVL393
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL400
+	.4byte	.LVL401
+	.2byte	0x1f
+	.byte	0x70
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x23
+	.uleb128 0x18
+	.byte	0x31
+	.byte	0x24
+	.byte	0x73
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x32
+	.byte	0x24
+	.byte	0x22
+	.byte	0x70
+	.sleb128 0
+	.byte	0x33
+	.byte	0x25
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x4
+	.byte	0x9f
+	.4byte	.LVL401
+	.4byte	.LVL402
+	.2byte	0x29
+	.byte	0x3
+	.4byte	c_ftl_nand_data_blks_per_plane
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x23
+	.uleb128 0x18
+	.byte	0x31
+	.byte	0x24
+	.byte	0x73
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x32
+	.byte	0x24
+	.byte	0x22
+	.byte	0x3
+	.4byte	c_ftl_nand_data_blks_per_plane
+	.byte	0x94
+	.byte	0x2
+	.byte	0x33
+	.byte	0x25
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x4
+	.byte	0x9f
+	.4byte	.LVL402
+	.4byte	.LVL403
+	.2byte	0x2e
+	.byte	0x3
+	.4byte	c_ftl_nand_data_blks_per_plane
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x23
+	.uleb128 0x18
+	.byte	0x31
+	.byte	0x24
+	.byte	0x3
+	.4byte	c_ftl_nand_map_region_num
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x32
+	.byte	0x24
+	.byte	0x22
+	.byte	0x3
+	.4byte	c_ftl_nand_data_blks_per_plane
+	.byte	0x94
+	.byte	0x2
+	.byte	0x33
+	.byte	0x25
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x4
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST164:
+	.4byte	.LVL388
+	.4byte	.LVL392
+	.2byte	0x1
+	.byte	0x5c
+	.4byte	0
+	.4byte	0
+.LLST161:
+	.4byte	.LVL378
+	.4byte	.LVL379
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL379
+	.4byte	.LVL380
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL380
+	.4byte	.LFE295
+	.2byte	0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_sys_blks_per_plane
+	.4byte	0
+	.4byte	0
+.LLST158:
+	.4byte	.LVL370
+	.4byte	.LVL374
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL374
+	.4byte	.LVL375
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL375
+	.4byte	.LFE293
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST159:
+	.4byte	.LVL370
+	.4byte	.LVL371
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL372
+	.4byte	.LVL373
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL373
+	.4byte	.LVL375
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL375
+	.4byte	.LVL376
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL376
+	.4byte	.LFE293
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST160:
+	.4byte	.LVL370
+	.4byte	.LVL371
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL372
+	.4byte	.LFE293
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST319:
+	.4byte	.LVL940
+	.4byte	.LVL948
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL948
+	.4byte	.LVL979
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL979
+	.4byte	.LVL980
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL980
+	.4byte	.LVL987
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL987
+	.4byte	.LVL990-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL990-1
+	.4byte	.LFE292
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST320:
+	.4byte	.LVL940
+	.4byte	.LVL947
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL947
+	.4byte	.LVL979
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL979
+	.4byte	.LVL980
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL980
+	.4byte	.LVL987
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL987
+	.4byte	.LVL989
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL989
+	.4byte	.LFE292
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST321:
+	.4byte	.LVL940
+	.4byte	.LVL946
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL946
+	.4byte	.LVL979
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	.LVL979
+	.4byte	.LVL980
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL980
+	.4byte	.LVL987
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	.LVL987
+	.4byte	.LVL988
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL988
+	.4byte	.LFE292
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST322:
+	.4byte	.LVL940
+	.4byte	.LVL942
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL942
+	.4byte	.LVL952
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL952
+	.4byte	.LVL978
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.4byte	.LVL978
+	.4byte	.LFE292
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST323:
+	.4byte	.LVL940
+	.4byte	.LVL944
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 0
+	.4byte	.LVL944
+	.4byte	.LVL945
+	.2byte	0x4
+	.byte	0x91
+	.sleb128 -96
+	.byte	0x9f
+	.4byte	.LVL945
+	.4byte	.LVL954
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL978
+	.4byte	.LVL979
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL979
+	.4byte	.LFE292
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST324:
+	.4byte	.LVL940
+	.4byte	.LVL957
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL957
+	.4byte	.LVL960
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL960
+	.4byte	.LVL962
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL963
+	.4byte	.LVL970
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL970
+	.4byte	.LVL977
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL978
+	.4byte	.LVL991
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL991
+	.4byte	.LVL999
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST325:
+	.4byte	.LVL953
+	.4byte	.LVL954
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL954
+	.4byte	.LVL957
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL957
+	.4byte	.LVL958
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL963
+	.4byte	.LVL964
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL964
+	.4byte	.LVL969
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL969
+	.4byte	.LVL970
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL970
+	.4byte	.LVL978
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL980
+	.4byte	.LVL981
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL982
+	.4byte	.LVL984
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL984
+	.4byte	.LVL986
+	.2byte	0x3
+	.byte	0x78
+	.sleb128 -2
+	.byte	0x9f
+	.4byte	.LVL986
+	.4byte	.LVL987
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL990
+	.4byte	.LVL991
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL991
+	.4byte	.LVL992
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL992
+	.4byte	.LVL997
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 -2
+	.byte	0x9f
+	.4byte	.LVL997
+	.4byte	.LVL998
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL998
+	.4byte	.LFE292
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 -2
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST326:
+	.4byte	.LVL941
+	.4byte	.LVL942
+	.2byte	0xb
+	.byte	0x73
+	.sleb128 0
+	.byte	0x8
+	.byte	0x3f
+	.byte	0x1a
+	.byte	0x30
+	.byte	0x29
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL942
+	.4byte	.LVL952
+	.2byte	0xb
+	.byte	0x77
+	.sleb128 0
+	.byte	0x8
+	.byte	0x3f
+	.byte	0x1a
+	.byte	0x30
+	.byte	0x29
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL952
+	.4byte	.LVL978
+	.2byte	0xc
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x8
+	.byte	0x3f
+	.byte	0x1a
+	.byte	0x30
+	.byte	0x29
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL978
+	.4byte	.LFE292
+	.2byte	0xb
+	.byte	0x77
+	.sleb128 0
+	.byte	0x8
+	.byte	0x3f
+	.byte	0x1a
+	.byte	0x30
+	.byte	0x29
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST327:
+	.4byte	.LVL953
+	.4byte	.LVL957
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL963
+	.4byte	.LVL970
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST328:
+	.4byte	.LVL965
+	.4byte	.LVL968
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST329:
+	.4byte	.LVL953
+	.4byte	.LVL955
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL955
+	.4byte	.LVL956
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 -4
+	.byte	0x9f
+	.4byte	.LVL963
+	.4byte	.LVL965
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 -4
+	.byte	0x9f
+	.4byte	.LVL965
+	.4byte	.LVL966
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 -3
+	.byte	0x9f
+	.4byte	.LVL966
+	.4byte	.LVL967
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 -2
+	.byte	0x9f
+	.4byte	.LVL967
+	.4byte	.LVL969
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL969
+	.4byte	.LVL970
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST330:
+	.4byte	.LVL971
+	.4byte	.LVL972
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL972
+	.4byte	.LVL973
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL975
+	.4byte	.LVL976
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST331:
+	.4byte	.LVL961
+	.4byte	.LVL963
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST311:
+	.4byte	.LVL917
+	.4byte	.LVL921
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL921
+	.4byte	.LVL927
+	.2byte	0x4
+	.byte	0x76
+	.sleb128 -512
+	.byte	0x9f
+	.4byte	.LVL927
+	.4byte	.LFE291
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST312:
+	.4byte	.LVL917
+	.4byte	.LVL922
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL922
+	.4byte	.LVL929
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL929
+	.4byte	.LVL930
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL930
+	.4byte	.LVL936
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL936
+	.4byte	.LVL937
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL937
+	.4byte	.LFE291
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST313:
+	.4byte	.LVL917
+	.4byte	.LVL919
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL919
+	.4byte	.LFE291
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST314:
+	.4byte	.LVL917
+	.4byte	.LVL923-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL923-1
+	.4byte	.LVL923
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL923
+	.4byte	.LVL927
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.4byte	.LVL927
+	.4byte	.LVL928-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL928-1
+	.4byte	.LVL929
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.4byte	.LVL929
+	.4byte	.LVL932-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL932-1
+	.4byte	.LVL932
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL932
+	.4byte	.LVL936
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.4byte	.LVL936
+	.4byte	.LVL939-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL939-1
+	.4byte	.LFE291
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST315:
+	.4byte	.LVL917
+	.4byte	.LVL927
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 0
+	.4byte	.LVL927
+	.4byte	.LFE291
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST316:
+	.4byte	.LVL919
+	.4byte	.LVL921
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL921
+	.4byte	.LVL923
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL923
+	.4byte	.LVL924
+	.2byte	0xb
+	.byte	0x74
+	.sleb128 0
+	.byte	0x39
+	.byte	0x24
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0xe00
+	.byte	0x9f
+	.4byte	.LVL927
+	.4byte	.LVL928-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL928-1
+	.4byte	.LVL929
+	.2byte	0xc
+	.byte	0x74
+	.sleb128 0
+	.byte	0x39
+	.byte	0x24
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x1000
+	.byte	0x9f
+	.4byte	.LVL929
+	.4byte	.LVL931
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL931
+	.4byte	.LVL932
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL932
+	.4byte	.LVL933
+	.2byte	0xc
+	.byte	0x74
+	.sleb128 0
+	.byte	0x39
+	.byte	0x24
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x1000
+	.byte	0x9f
+	.4byte	.LVL936
+	.4byte	.LVL938
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL938
+	.4byte	.LVL939-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL939-1
+	.4byte	.LFE291
+	.2byte	0xc
+	.byte	0x74
+	.sleb128 0
+	.byte	0x39
+	.byte	0x24
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x1000
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST317:
+	.4byte	.LVL925
+	.4byte	.LVL926
+	.2byte	0x30
+	.byte	0x91
+	.sleb128 0
+	.byte	0x6
+	.byte	0x23
+	.uleb128 0x2
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x40
+	.byte	0x24
+	.byte	0x91
+	.sleb128 0
+	.byte	0x6
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x38
+	.byte	0x24
+	.byte	0x21
+	.byte	0x91
+	.sleb128 0
+	.byte	0x6
+	.byte	0x23
+	.uleb128 0x3
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x48
+	.byte	0x24
+	.byte	0x21
+	.byte	0x91
+	.sleb128 0
+	.byte	0x6
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x21
+	.byte	0x9f
+	.4byte	.LVL934
+	.4byte	.LVL935
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST318:
+	.4byte	.LVL918
+	.4byte	.LVL927
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 0
+	.4byte	.LVL927
+	.4byte	.LFE291
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST156:
+	.4byte	.LVL361
+	.4byte	.LVL363
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL363
+	.4byte	.LFE290
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST157:
+	.4byte	.LVL364
+	.4byte	.LVL365
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 28
+	.byte	0x9f
+	.4byte	.LVL366
+	.4byte	.LVL369
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 28
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST142:
+	.4byte	.LVL329
+	.4byte	.LVL334
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL334
+	.4byte	.LVL336
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL336
+	.4byte	.LVL339
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL352
+	.4byte	.LVL353
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST143:
+	.4byte	.LVL329
+	.4byte	.LVL330
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL330
+	.4byte	.LFE289
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST144:
+	.4byte	.LVL329
+	.4byte	.LVL346
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL346
+	.4byte	.LVL352
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	.LVL352
+	.4byte	.LVL356
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL356
+	.4byte	.LFE289
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST145:
+	.4byte	.LVL329
+	.4byte	.LVL341
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL341
+	.4byte	.LVL352
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.4byte	.LVL352
+	.4byte	.LVL353
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL353
+	.4byte	.LFE289
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST146:
+	.4byte	.LVL329
+	.4byte	.LVL352
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 0
+	.4byte	.LVL352
+	.4byte	.LFE289
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST147:
+	.4byte	.LVL329
+	.4byte	.LVL352
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 4
+	.4byte	.LVL352
+	.4byte	.LFE289
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 4
+	.4byte	0
+	.4byte	0
+.LLST148:
+	.4byte	.LVL335
+	.4byte	.LVL352
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL353
+	.4byte	.LFE289
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST149:
+	.4byte	.LVL337
+	.4byte	.LVL338
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL340
+	.4byte	.LVL343
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL344
+	.4byte	.LVL352
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL353
+	.4byte	.LFE289
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST150:
+	.4byte	.LVL331
+	.4byte	.LVL346
+	.2byte	0x1
+	.byte	0x5c
+	.4byte	.LVL353
+	.4byte	.LVL356
+	.2byte	0x1
+	.byte	0x5c
+	.4byte	0
+	.4byte	0
+.LLST151:
+	.4byte	.LVL333
+	.4byte	.LVL352
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL353
+	.4byte	.LFE289
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST152:
+	.4byte	.LVL348
+	.4byte	.LVL349
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL349
+	.4byte	.LVL350-1
+	.2byte	0x5
+	.byte	0x3
+	.4byte	gMasterInfo+20
+	.4byte	0
+	.4byte	0
+.LLST153:
+	.4byte	.LVL354
+	.4byte	.LVL356
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL356
+	.4byte	.LVL360
+	.2byte	0x1
+	.byte	0x5c
+	.4byte	0
+	.4byte	0
+.LLST154:
+	.4byte	.LVL345
+	.4byte	.LVL346
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 4
+	.4byte	.LVL353
+	.4byte	.LVL356
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 4
+	.4byte	.LVL356
+	.4byte	.LVL357
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL357
+	.4byte	.LVL358
+	.2byte	0x3
+	.byte	0x70
+	.sleb128 -4
+	.byte	0x9f
+	.4byte	.LVL358
+	.4byte	.LVL360
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL354
+	.4byte	.LVL355
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL355
+	.4byte	.LVL360
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -48
+	.4byte	0
+	.4byte	0
+.LLST141:
+	.4byte	.LVL324
+	.4byte	.LVL325
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL326
+	.4byte	.LFE287
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST139:
+	.4byte	.LVL319
+	.4byte	.LVL320
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL320
+	.4byte	.LFE283
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL319
+	.4byte	.LVL320
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL320
+	.4byte	.LFE283
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL310
+	.4byte	.LVL312
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL313
+	.4byte	.LVL315
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL306
+	.4byte	.LVL307
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL308
+	.4byte	.LFE280
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL195
+	.4byte	.LVL196
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL196
+	.4byte	.LFE277
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST102:
+	.4byte	.LVL196
+	.4byte	.LVL198
+	.2byte	0x9
+	.byte	0xc
+	.4byte	0x186a0
+	.byte	0x74
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL198
+	.4byte	.LVL199
+	.2byte	0x9
+	.byte	0xc
+	.4byte	0x186a1
+	.byte	0x74
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL199
+	.4byte	.LVL200
+	.2byte	0x9
+	.byte	0xc
+	.4byte	0x186a0
+	.byte	0x74
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL201
+	.4byte	.LFE277
+	.2byte	0x9
+	.byte	0xc
+	.4byte	0x186a0
+	.byte	0x74
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL196
+	.4byte	.LVL197
+	.2byte	0x3
+	.byte	0x8
+	.byte	0x64
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL152
+	.4byte	.LVL153
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL153
+	.4byte	.LVL155
+	.2byte	0xd
+	.byte	0x70
+	.sleb128 0
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST84:
+	.4byte	.LVL147
+	.4byte	.LVL149
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL149
+	.4byte	.LVL150
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 4
+	.4byte	.LVL150
+	.4byte	.LFE274
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL138
+	.4byte	.LVL145
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL145
+	.4byte	.LVL146
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL146
+	.4byte	.LFE273
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST83:
+	.4byte	.LVL139
+	.4byte	.LVL140
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL141
+	.4byte	.LVL143
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL144
+	.4byte	.LFE273
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST81:
+	.4byte	.LVL136
+	.4byte	.LVL137
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST80:
+	.4byte	.LVL133
+	.4byte	.LVL134
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL134
+	.4byte	.LFE271
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST79:
+	.4byte	.LVL131
+	.4byte	.LVL132
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL132
+	.4byte	.LFE270
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST424:
+	.4byte	.LVL1307
+	.4byte	.LVL1315
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1315
+	.4byte	.LFE267
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL1307
+	.4byte	.LVL1308
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1308
+	.4byte	.LVL1309
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL1309
+	.4byte	.LVL1310
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.4byte	.LVL1310
+	.4byte	.LVL1311
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.4byte	.LVL1311
+	.4byte	.LFE267
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL1312
+	.4byte	.LVL1313
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1314
+	.4byte	.LVL1316
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST427:
+	.4byte	.LVL1317
+	.4byte	.LVL1318
+	.2byte	0x3
+	.byte	0x8
+	.byte	0x28
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL809
+	.4byte	.LVL811-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL811-1
+	.4byte	.LFE266
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL812
+	.4byte	.LVL813
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL813
+	.4byte	.LVL815
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL810
+	.4byte	.LVL811-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL811-1
+	.4byte	.LFE266
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST790:
+	.4byte	.LVL3133
+	.4byte	.LVL3134
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL3134
+	.4byte	.LFE265
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL3133
+	.4byte	.LVL3135-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL3135-1
+	.4byte	.LFE265
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST792:
+	.4byte	.LVL3133
+	.4byte	.LVL3137
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL3138
+	.4byte	.LVL3139
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL3139
+	.4byte	.LVL3140
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL3141
+	.4byte	.LVL3142
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL3142
+	.4byte	.LVL3143
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL3143
+	.4byte	.LFE265
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL3135
+	.4byte	.LVL3136
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL3136
+	.4byte	.LVL3137
+	.2byte	0x3
+	.byte	0x70
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL3139
+	.4byte	.LVL3140
+	.2byte	0x3
+	.byte	0x70
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST122:
+	.4byte	.LVL252
+	.4byte	.LVL253
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL253
+	.4byte	.LVL257
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL257
+	.4byte	.LVL259-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL259-1
+	.4byte	.LFE263
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL252
+	.4byte	.LVL253
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL253
+	.4byte	.LVL257
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL257
+	.4byte	.LVL258
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL258
+	.4byte	.LFE263
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST124:
+	.4byte	.LVL252
+	.4byte	.LVL253
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL253
+	.4byte	.LVL257
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL257
+	.4byte	.LVL259-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL259-1
+	.4byte	.LFE263
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST125:
+	.4byte	.LVL253
+	.4byte	.LVL254
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL255
+	.4byte	.LVL256
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL260
+	.4byte	.LVL270
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL273
+	.4byte	.LVL279
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL279
+	.4byte	.LFE263
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST127:
+	.4byte	.LVL262
+	.4byte	.LVL263
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL263
+	.4byte	.LVL275
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST128:
+	.4byte	.LVL267
+	.4byte	.LVL275
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST516:
+	.4byte	.LVL1758
+	.4byte	.LVL1762
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1762
+	.4byte	.LVL1764
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1764
+	.4byte	.LVL1765
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1765
+	.4byte	.LVL1766-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1766-1
+	.4byte	.LVL1766
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1766
+	.4byte	.LVL1767
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1767
+	.4byte	.LVL1796
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1796
+	.4byte	.LFE262
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL1758
+	.4byte	.LVL1762
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1762
+	.4byte	.LVL1765
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -96
+	.4byte	.LVL1765
+	.4byte	.LVL1766-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1766-1
+	.4byte	.LFE262
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -96
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL1758
+	.4byte	.LVL1762
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1762
+	.4byte	.LVL1765
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1765
+	.4byte	.LVL1766-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1766-1
+	.4byte	.LFE262
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL1758
+	.4byte	.LVL1761
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1761
+	.4byte	.LVL1765
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -84
+	.4byte	.LVL1765
+	.4byte	.LVL1766-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1766-1
+	.4byte	.LFE262
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -84
+	.4byte	0
+	.4byte	0
+.LLST520:
+	.4byte	.LVL1762
+	.4byte	.LVL1763
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1763
+	.4byte	.LVL1764
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1767
+	.4byte	.LVL1786
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1787
+	.4byte	.LVL1792
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1792
+	.4byte	.LVL1796
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1796
+	.4byte	.LFE262
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL1758
+	.4byte	.LVL1762
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1762
+	.4byte	.LVL1764
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1764
+	.4byte	.LVL1765
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1765
+	.4byte	.LVL1766-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1766-1
+	.4byte	.LVL1766
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1766
+	.4byte	.LVL1767
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1767
+	.4byte	.LVL1796
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1796
+	.4byte	.LFE262
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL1769
+	.4byte	.LVL1770
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1770
+	.4byte	.LVL1792
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL1774
+	.4byte	.LVL1792
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL1759
+	.4byte	.LVL1760
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1760
+	.4byte	.LFE262
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -88
+	.4byte	0
+	.4byte	0
+.LLST525:
+	.4byte	.LVL1759
+	.4byte	.LVL1762
+	.2byte	0xb
+	.byte	0x3
+	.4byte	gNandParaInfo+9
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL1762
+	.4byte	.LVL1765
+	.2byte	0x9
+	.byte	0x91
+	.sleb128 -92
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL1765
+	.4byte	.LVL1766-1
+	.2byte	0xb
+	.byte	0x3
+	.4byte	gNandParaInfo+9
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL1767
+	.4byte	.LFE262
+	.2byte	0x9
+	.byte	0x91
+	.sleb128 -92
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL1647
+	.4byte	.LVL1649
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1649
+	.4byte	.LVL1650
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1650
+	.4byte	.LVL1651-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1651-1
+	.4byte	.LFE261
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST494:
+	.4byte	.LVL1647
+	.4byte	.LVL1649
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1649
+	.4byte	.LVL1650
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -48
+	.4byte	.LVL1650
+	.4byte	.LVL1651-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1651-1
+	.4byte	.LFE261
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -48
+	.4byte	0
+	.4byte	0
+.LLST495:
+	.4byte	.LVL1647
+	.4byte	.LVL1648
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1648
+	.4byte	.LVL1650
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -60
+	.4byte	.LVL1650
+	.4byte	.LVL1651-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1651-1
+	.4byte	.LFE261
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -60
+	.4byte	0
+	.4byte	0
+.LLST496:
+	.4byte	.LVL1649
+	.4byte	.LVL1650
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -64
+	.4byte	.LVL1652
+	.4byte	.LVL1653
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1653
+	.4byte	.LVL1660
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -64
+	.4byte	.LVL1660
+	.4byte	.LVL1661
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1661
+	.4byte	.LVL1718
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -64
+	.4byte	.LVL1718
+	.4byte	.LVL1719
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1719
+	.4byte	.LFE261
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -64
+	.4byte	0
+	.4byte	0
+.LLST498:
+	.4byte	.LVL1647
+	.4byte	.LVL1649
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1650
+	.4byte	.LVL1651
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1658
+	.4byte	.LVL1659
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1661
+	.4byte	.LVL1663
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1663
+	.4byte	.LVL1674
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1679
+	.4byte	.LVL1680
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1680
+	.4byte	.LVL1685
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1690
+	.4byte	.LVL1692
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1692
+	.4byte	.LVL1694
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1694
+	.4byte	.LVL1695
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1695
+	.4byte	.LVL1700
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1700
+	.4byte	.LVL1702
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1702
+	.4byte	.LVL1714
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1721
+	.4byte	.LVL1723
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1723
+	.4byte	.LFE261
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST499:
+	.4byte	.LVL1649
+	.4byte	.LVL1650
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1652
+	.4byte	.LFE261
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST500:
+	.4byte	.LVL1647
+	.4byte	.LVL1649
+	.2byte	0xb
+	.byte	0x3
+	.4byte	gNandParaInfo+9
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL1649
+	.4byte	.LVL1650
+	.2byte	0x8
+	.byte	0x91
+	.sleb128 -52
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL1650
+	.4byte	.LVL1651-1
+	.2byte	0xb
+	.byte	0x3
+	.4byte	gNandParaInfo+9
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL1652
+	.4byte	.LFE261
+	.2byte	0x8
+	.byte	0x91
+	.sleb128 -52
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST501:
+	.4byte	.LVL1647
+	.4byte	.LVL1649
+	.2byte	0x5
+	.byte	0x3
+	.4byte	gNandRandomizer
+	.4byte	.LVL1649
+	.4byte	.LVL1650
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -44
+	.4byte	.LVL1650
+	.4byte	.LVL1651-1
+	.2byte	0x5
+	.byte	0x3
+	.4byte	gNandRandomizer
+	.4byte	.LVL1652
+	.4byte	.LFE261
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -44
+	.4byte	0
+	.4byte	0
+.LLST502:
+	.4byte	.LVL1671
+	.4byte	.LVL1675
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1682
+	.4byte	.LVL1684
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST503:
+	.4byte	.LVL1647
+	.4byte	.LVL1649
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1650
+	.4byte	.LVL1651
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1677
+	.4byte	.LVL1678
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1678
+	.4byte	.LVL1680
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1686
+	.4byte	.LVL1692
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1694
+	.4byte	.LVL1697
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1697
+	.4byte	.LVL1698
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1698
+	.4byte	.LVL1701
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1704
+	.4byte	.LVL1705
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1705
+	.4byte	.LVL1708
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1708
+	.4byte	.LVL1709
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1709
+	.4byte	.LVL1710-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1710-1
+	.4byte	.LVL1712
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1713
+	.4byte	.LVL1714
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1721
+	.4byte	.LFE261
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST504:
+	.4byte	.LVL1647
+	.4byte	.LVL1649
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1649
+	.4byte	.LVL1650
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1650
+	.4byte	.LVL1651
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1652
+	.4byte	.LVL1689
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1689
+	.4byte	.LVL1690
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1690
+	.4byte	.LFE261
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST505:
+	.4byte	.LVL1654
+	.4byte	.LVL1655
+	.2byte	0x8
+	.byte	0x73
+	.sleb128 0
+	.byte	0x40
+	.byte	0x4b
+	.byte	0x24
+	.byte	0x1f
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL1655
+	.4byte	.LVL1656
+	.2byte	0x9
+	.byte	0x70
+	.sleb128 4
+	.byte	0x6
+	.byte	0x40
+	.byte	0x4b
+	.byte	0x24
+	.byte	0x1f
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL1656
+	.4byte	.LFE261
+	.2byte	0x9
+	.byte	0x91
+	.sleb128 -56
+	.byte	0x6
+	.byte	0x40
+	.byte	0x4b
+	.byte	0x24
+	.byte	0x1f
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST506:
+	.4byte	.LVL1666
+	.4byte	.LVL1668-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST507:
+	.4byte	.LVL1695
+	.4byte	.LVL1700
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST117:
+	.4byte	.LVL234
+	.4byte	.LVL235
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL235
+	.4byte	.LFE260
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST118:
+	.4byte	.LVL234
+	.4byte	.LVL235
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL235
+	.4byte	.LFE260
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST119:
+	.4byte	.LVL234
+	.4byte	.LVL235
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL235
+	.4byte	.LFE260
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST120:
+	.4byte	.LVL234
+	.4byte	.LVL235
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL235
+	.4byte	.LFE260
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST121:
+	.4byte	.LVL244
+	.4byte	.LVL245
+	.2byte	0x6
+	.byte	0x70
+	.sleb128 0
+	.byte	0x31
+	.byte	0x1a
+	.byte	0x1f
+	.byte	0x9f
+	.4byte	.LVL248
+	.4byte	.LVL249
+	.2byte	0x5
+	.byte	0x70
+	.sleb128 0
+	.byte	0x31
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST508:
+	.4byte	.LVL1724
+	.4byte	.LVL1726
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1726
+	.4byte	.LVL1727
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1727
+	.4byte	.LVL1728
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1728
+	.4byte	.LVL1747
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1747
+	.4byte	.LVL1756
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1756
+	.4byte	.LFE259
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST509:
+	.4byte	.LVL1724
+	.4byte	.LVL1726
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1726
+	.4byte	.LVL1727
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1727
+	.4byte	.LVL1728
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL1728
+	.4byte	.LVL1747
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1747
+	.4byte	.LVL1756
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL1756
+	.4byte	.LVL1757
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1757
+	.4byte	.LFE259
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST510:
+	.4byte	.LVL1724
+	.4byte	.LVL1726
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1726
+	.4byte	.LFE259
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST511:
+	.4byte	.LVL1724
+	.4byte	.LVL1725
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1725
+	.4byte	.LFE259
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -84
+	.4byte	0
+	.4byte	0
+.LLST512:
+	.4byte	.LVL1726
+	.4byte	.LVL1727
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1728
+	.4byte	.LVL1747
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1747
+	.4byte	.LVL1756
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1756
+	.4byte	.LFE259
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST513:
+	.4byte	.LVL1738
+	.4byte	.LVL1739
+	.2byte	0x6
+	.byte	0x70
+	.sleb128 0
+	.byte	0x31
+	.byte	0x1a
+	.byte	0x1f
+	.byte	0x9f
+	.4byte	.LVL1744
+	.4byte	.LVL1745
+	.2byte	0x5
+	.byte	0x70
+	.sleb128 0
+	.byte	0x31
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST514:
+	.4byte	.LVL1724
+	.4byte	.LVL1726
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1726
+	.4byte	.LVL1727
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1727
+	.4byte	.LVL1728
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1728
+	.4byte	.LVL1747
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1747
+	.4byte	.LVL1756
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1756
+	.4byte	.LFE259
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST515:
+	.4byte	.LVL1731
+	.4byte	.LVL1747
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST486:
+	.4byte	.LVL1622
+	.4byte	.LVL1624
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1624
+	.4byte	.LFE258
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST487:
+	.4byte	.LVL1622
+	.4byte	.LVL1624
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1624
+	.4byte	.LFE258
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST488:
+	.4byte	.LVL1622
+	.4byte	.LVL1624
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1624
+	.4byte	.LFE258
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -44
+	.4byte	0
+	.4byte	0
+.LLST489:
+	.4byte	.LVL1623
+	.4byte	.LVL1624
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1624
+	.4byte	.LFE258
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST490:
+	.4byte	.LVL1622
+	.4byte	.LVL1624
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1624
+	.4byte	.LFE258
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST491:
+	.4byte	.LVL1623
+	.4byte	.LVL1624
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1634
+	.4byte	.LVL1635
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1635
+	.4byte	.LVL1641
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST492:
+	.4byte	.LVL1623
+	.4byte	.LVL1624
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1638
+	.4byte	.LVL1639
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1639
+	.4byte	.LVL1642
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1646
+	.4byte	.LFE258
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST96:
+	.4byte	.LVL183
+	.4byte	.LVL184
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL184
+	.4byte	.LFE257
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST97:
+	.4byte	.LVL183
+	.4byte	.LVL184
+	.2byte	0xb
+	.byte	0x70
+	.sleb128 0
+	.byte	0x34
+	.byte	0x24
+	.byte	0x3
+	.4byte	gDieOp
+	.byte	0x22
+	.byte	0x9f
+	.4byte	.LVL184
+	.4byte	.LVL192
+	.2byte	0xb
+	.byte	0x76
+	.sleb128 0
+	.byte	0x34
+	.byte	0x24
+	.byte	0x3
+	.4byte	gDieOp
+	.byte	0x22
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST98:
+	.4byte	.LVL183
+	.4byte	.LVL184
+	.2byte	0xa
+	.byte	0x70
+	.sleb128 0
+	.byte	0x34
+	.byte	0x24
+	.byte	0x3
+	.4byte	gDieOp
+	.byte	0x22
+	.4byte	.LVL184
+	.4byte	.LVL185-1
+	.2byte	0xa
+	.byte	0x76
+	.sleb128 0
+	.byte	0x34
+	.byte	0x24
+	.byte	0x3
+	.4byte	gDieOp
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST99:
+	.4byte	.LVL187
+	.4byte	.LVL188
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL188
+	.4byte	.LVL189
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL189
+	.4byte	.LVL190
+	.2byte	0x5
+	.byte	0x71
+	.sleb128 0
+	.byte	0x31
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL190
+	.4byte	.LVL191
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST73:
+	.4byte	.LVL124
+	.4byte	.LVL125
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL125
+	.4byte	.LFE256
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST74:
+	.4byte	.LVL124
+	.4byte	.LVL125
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL125
+	.4byte	.LFE256
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST75:
+	.4byte	.LVL124
+	.4byte	.LVL125
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL125
+	.4byte	.LFE256
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST66:
+	.4byte	.LVL110
+	.4byte	.LVL113
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL113
+	.4byte	.LVL122
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL122
+	.4byte	.LFE255
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST67:
+	.4byte	.LVL110
+	.4byte	.LVL117-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL117-1
+	.4byte	.LVL118
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL118
+	.4byte	.LFE255
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST68:
+	.4byte	.LVL110
+	.4byte	.LVL114
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL114
+	.4byte	.LVL118
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	.LVL118
+	.4byte	.LVL119
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL119
+	.4byte	.LVL122
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	.LVL122
+	.4byte	.LVL123
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL123
+	.4byte	.LFE255
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST71:
+	.4byte	.LVL115
+	.4byte	.LVL116
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL120
+	.4byte	.LVL122
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST69:
+	.4byte	.LVL110
+	.4byte	.LVL111
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL111
+	.4byte	.LVL112
+	.2byte	0xa
+	.byte	0x70
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST70:
+	.4byte	.LVL111
+	.4byte	.LVL112
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST72:
+	.4byte	.LVL116
+	.4byte	.LVL117
+	.2byte	0x3
+	.byte	0x8
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST56:
+	.4byte	.LVL90
+	.4byte	.LVL96
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL96
+	.4byte	.LFE254
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST57:
+	.4byte	.LVL90
+	.4byte	.LVL93
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL93
+	.4byte	.LFE254
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST58:
+	.4byte	.LVL90
+	.4byte	.LVL94
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL94
+	.4byte	.LFE254
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST59:
+	.4byte	.LVL90
+	.4byte	.LVL91
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL91
+	.4byte	.LFE254
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST60:
+	.4byte	.LVL90
+	.4byte	.LVL109
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 0
+	.4byte	.LVL109
+	.4byte	.LFE254
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST61:
+	.4byte	.LVL97
+	.4byte	.LVL98-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL98-1
+	.4byte	.LVL108
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL108
+	.4byte	.LVL109
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -40
+	.4byte	.LVL109
+	.4byte	.LFE254
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST62:
+	.4byte	.LVL102
+	.4byte	.LVL105
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST63:
+	.4byte	.LVL101
+	.4byte	.LVL104
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST64:
+	.4byte	.LVL106
+	.4byte	.LVL107
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL107
+	.4byte	.LVL109
+	.2byte	0x6
+	.byte	0x70
+	.sleb128 0
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL109
+	.4byte	.LFE254
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST65:
+	.4byte	.LVL95
+	.4byte	.LVL98-1
+	.2byte	0x9
+	.byte	0x73
+	.sleb128 0
+	.byte	0xc
+	.4byte	0x7fffffff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL98-1
+	.4byte	.LFE254
+	.2byte	0xa
+	.byte	0x91
+	.sleb128 -36
+	.byte	0x6
+	.byte	0xc
+	.4byte	0x7fffffff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST133:
+	.4byte	.LVL294
+	.4byte	.LVL296
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST135:
+	.4byte	.LVL295
+	.4byte	.LVL296
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST474:
+	.4byte	.LVL1561
+	.4byte	.LVL1562
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1562
+	.4byte	.LVL1568
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1568
+	.4byte	.LVL1569-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1569-1
+	.4byte	.LFE252
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST475:
+	.4byte	.LVL1569
+	.4byte	.LVL1570
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1570
+	.4byte	.LVL1585
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1621
+	.4byte	.LFE252
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST476:
+	.4byte	.LVL1591
+	.4byte	.LVL1592
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST482:
+	.4byte	.LVL1603
+	.4byte	.LVL1604
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST483:
+	.4byte	.LVL1603
+	.4byte	.LVL1604
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1604
+	.4byte	.LVL1606-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST484:
+	.4byte	.LVL1619
+	.4byte	.LVL1620
+	.2byte	0x6
+	.byte	0x3
+	.4byte	gReadRetryInfo+20
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST485:
+	.4byte	.LVL1615
+	.4byte	.LVL1618
+	.2byte	0x6
+	.byte	0x3
+	.4byte	gNandPhyInfo
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST477:
+	.4byte	.LVL1571
+	.4byte	.LVL1579
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST478:
+	.4byte	.LVL1571
+	.4byte	.LVL1579
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST479:
+	.4byte	.LVL1571
+	.4byte	.LVL1581
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1581
+	.4byte	.LVL1584
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 -8
+	.byte	0x9f
+	.4byte	.LVL1621
+	.4byte	.LFE252
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST480:
+	.4byte	.LVL1572
+	.4byte	.LVL1573
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1573
+	.4byte	.LVL1574
+	.2byte	0xa
+	.byte	0x75
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST481:
+	.4byte	.LVL1576
+	.4byte	.LVL1577
+	.2byte	0x3
+	.byte	0x8
+	.byte	0xc8
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST308:
+	.4byte	.LVL903
+	.4byte	.LVL904
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL904
+	.4byte	.LVL906
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL906
+	.4byte	.LVL907
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL907
+	.4byte	.LVL909-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL911
+	.4byte	.LVL913
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST309:
+	.4byte	.LVL903
+	.4byte	.LVL906
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL906
+	.4byte	.LVL911
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL911
+	.4byte	.LVL913
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST307:
+	.4byte	.LVL901
+	.4byte	.LVL902-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL902-1
+	.4byte	.LFE250
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST413:
+	.4byte	.LVL1268
+	.4byte	.LVL1271
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1271
+	.4byte	.LFE249
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST414:
+	.4byte	.LVL1269
+	.4byte	.LVL1273
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1274
+	.4byte	.LVL1277
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1283
+	.4byte	.LVL1284
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1287
+	.4byte	.LFE249
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST283:
+	.4byte	.LVL798
+	.4byte	.LVL799
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL800
+	.4byte	.LVL803
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL804
+	.4byte	.LVL805
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL806
+	.4byte	.LFE248
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST415:
+	.4byte	.LVL1289
+	.4byte	.LVL1293
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1293
+	.4byte	.LVL1297
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1297
+	.4byte	.LVL1299
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1299
+	.4byte	.LFE247
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST416:
+	.4byte	.LVL1289
+	.4byte	.LVL1291
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1291
+	.4byte	.LVL1300
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1300
+	.4byte	.LFE247
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST417:
+	.4byte	.LVL1289
+	.4byte	.LVL1290
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1290
+	.4byte	.LVL1293
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	.LVL1293
+	.4byte	.LVL1295
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1296
+	.4byte	.LVL1297
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1297
+	.4byte	.LVL1299
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST418:
+	.4byte	.LVL1290
+	.4byte	.LVL1292
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1292
+	.4byte	.LVL1293
+	.2byte	0x8
+	.byte	0x3
+	.4byte	gpNandParaInfo
+	.byte	0x6
+	.byte	0x23
+	.uleb128 0x13
+	.4byte	.LVL1297
+	.4byte	.LVL1298
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1298
+	.4byte	.LVL1299
+	.2byte	0x8
+	.byte	0x3
+	.4byte	gpNandParaInfo
+	.byte	0x6
+	.byte	0x23
+	.uleb128 0x13
+	.4byte	0
+	.4byte	0
+.LLST397:
+	.4byte	.LVL1202
+	.4byte	.LVL1208-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1208-1
+	.4byte	.LFE245
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST398:
+	.4byte	.LVL1202
+	.4byte	.LVL1208-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1208-1
+	.4byte	.LFE245
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -36
+	.4byte	0
+	.4byte	0
+.LLST399:
+	.4byte	.LVL1202
+	.4byte	.LVL1203
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1203
+	.4byte	.LVL1209
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1212
+	.4byte	.LVL1218
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1218
+	.4byte	.LVL1219
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1219
+	.4byte	.LVL1221
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1221
+	.4byte	.LFE245
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST400:
+	.4byte	.LVL1202
+	.4byte	.LVL1204
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1204
+	.4byte	.LVL1209
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1212
+	.4byte	.LVL1218
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1218
+	.4byte	.LVL1219
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1219
+	.4byte	.LVL1221
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1221
+	.4byte	.LFE245
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST401:
+	.4byte	.LVL1202
+	.4byte	.LVL1208
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1217
+	.4byte	.LFE245
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST402:
+	.4byte	.LVL1202
+	.4byte	.LVL1208
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1208
+	.4byte	.LVL1210
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1212
+	.4byte	.LVL1222
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST403:
+	.4byte	.LVL1205
+	.4byte	.LVL1213
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1214
+	.4byte	.LFE245
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST404:
+	.4byte	.LVL1206
+	.4byte	.LVL1211
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL1211
+	.4byte	.LVL1212
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -40
+	.4byte	.LVL1212
+	.4byte	.LFE245
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST86:
+	.4byte	.LVL156
+	.4byte	.LVL160
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL160
+	.4byte	.LVL169
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL169
+	.4byte	.LVL173
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL173
+	.4byte	.LFE244
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST87:
+	.4byte	.LVL156
+	.4byte	.LVL164-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL164-1
+	.4byte	.LVL169
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL169
+	.4byte	.LVL173
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL173
+	.4byte	.LFE244
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST88:
+	.4byte	.LVL156
+	.4byte	.LVL158
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL158
+	.4byte	.LVL166
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL166
+	.4byte	.LVL169
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	.LVL169
+	.4byte	.LVL170
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL170
+	.4byte	.LVL171
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL171
+	.4byte	.LVL173
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL173
+	.4byte	.LFE244
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST89:
+	.4byte	.LVL156
+	.4byte	.LVL157
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL157
+	.4byte	.LFE244
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST90:
+	.4byte	.LVL165
+	.4byte	.LVL166
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL166
+	.4byte	.LVL167
+	.2byte	0x9
+	.byte	0x73
+	.sleb128 0
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x31
+	.byte	0x1c
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL173
+	.4byte	.LVL174
+	.2byte	0x9
+	.byte	0x73
+	.sleb128 0
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x31
+	.byte	0x1c
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL177
+	.4byte	.LFE244
+	.2byte	0xb
+	.byte	0x91
+	.sleb128 -36
+	.byte	0x94
+	.byte	0x1
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x31
+	.byte	0x1c
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST91:
+	.4byte	.LVL159
+	.4byte	.LVL161
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL161
+	.4byte	.LVL166
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL172
+	.4byte	.LVL173
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST92:
+	.4byte	.LVL159
+	.4byte	.LVL162
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL162
+	.4byte	.LVL163
+	.2byte	0xa
+	.byte	0x70
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST93:
+	.4byte	.LVL175
+	.4byte	.LVL176
+	.2byte	0x3
+	.byte	0x8
+	.byte	0xc8
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST386:
+	.4byte	.LVL1174
+	.4byte	.LVL1179
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1179
+	.4byte	.LVL1190
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1190
+	.4byte	.LVL1193
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1193
+	.4byte	.LFE243
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST387:
+	.4byte	.LVL1174
+	.4byte	.LVL1180-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1180-1
+	.4byte	.LVL1190
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -48
+	.4byte	.LVL1190
+	.4byte	.LVL1193
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1193
+	.4byte	.LFE243
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -48
+	.4byte	0
+	.4byte	0
+.LLST388:
+	.4byte	.LVL1174
+	.4byte	.LVL1180-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1180-1
+	.4byte	.LVL1184
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1190
+	.4byte	.LVL1193
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1193
+	.4byte	.LVL1197
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1197
+	.4byte	.LVL1198
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1200
+	.4byte	.LFE243
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST389:
+	.4byte	.LVL1174
+	.4byte	.LVL1175
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1175
+	.4byte	.LVL1184
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1190
+	.4byte	.LVL1197
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1197
+	.4byte	.LVL1198
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1200
+	.4byte	.LFE243
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST390:
+	.4byte	.LVL1174
+	.4byte	.LVL1183
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1190
+	.4byte	.LVL1193
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1196
+	.4byte	.LFE243
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST391:
+	.4byte	.LVL1174
+	.4byte	.LVL1183
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1183
+	.4byte	.LVL1187
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1187
+	.4byte	.LVL1188
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL1190
+	.4byte	.LVL1193
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1193
+	.4byte	.LVL1201
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST392:
+	.4byte	.LVL1182
+	.4byte	.LVL1183
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1183
+	.4byte	.LVL1190
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1193
+	.4byte	.LVL1199
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1199
+	.4byte	.LVL1200
+	.2byte	0x6
+	.byte	0x91
+	.sleb128 -44
+	.byte	0x6
+	.byte	0x31
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL1200
+	.4byte	.LFE243
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST393:
+	.4byte	.LVL1176
+	.4byte	.LVL1177
+	.2byte	0x7
+	.byte	0x74
+	.sleb128 0
+	.byte	0x33
+	.byte	0x1e
+	.byte	0x32
+	.byte	0x26
+	.byte	0x9f
+	.4byte	.LVL1177
+	.4byte	.LVL1178
+	.2byte	0xf
+	.byte	0x3
+	.4byte	gNandFlashEccBits
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x33
+	.byte	0x1e
+	.byte	0x32
+	.byte	0x26
+	.byte	0x9f
+	.4byte	.LVL1178
+	.4byte	.LVL1190
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1190
+	.4byte	.LVL1191
+	.2byte	0x7
+	.byte	0x74
+	.sleb128 0
+	.byte	0x33
+	.byte	0x1e
+	.byte	0x32
+	.byte	0x26
+	.byte	0x9f
+	.4byte	.LVL1191
+	.4byte	.LVL1192
+	.2byte	0xf
+	.byte	0x3
+	.4byte	gNandFlashEccBits
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x33
+	.byte	0x1e
+	.byte	0x32
+	.byte	0x26
+	.byte	0x9f
+	.4byte	.LVL1192
+	.4byte	.LFE243
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST394:
+	.4byte	.LVL1180
+	.4byte	.LVL1181
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1181
+	.4byte	.LVL1182
+	.2byte	0xa
+	.byte	0x77
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST395:
+	.4byte	.LVL1185
+	.4byte	.LVL1186
+	.2byte	0x3
+	.byte	0x8
+	.byte	0xc8
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST396:
+	.4byte	.LVL1194
+	.4byte	.LVL1195
+	.2byte	0x3
+	.byte	0x8
+	.byte	0xc8
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST379:
+	.4byte	.LVL1160
+	.4byte	.LVL1161-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1161-1
+	.4byte	.LFE242
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST380:
+	.4byte	.LVL1160
+	.4byte	.LVL1161-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1161-1
+	.4byte	.LFE242
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST381:
+	.4byte	.LVL1160
+	.4byte	.LVL1161-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1161-1
+	.4byte	.LVL1163
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1166
+	.4byte	.LVL1169
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1169
+	.4byte	.LVL1170
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1170
+	.4byte	.LVL1172
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1172
+	.4byte	.LFE242
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST382:
+	.4byte	.LVL1160
+	.4byte	.LVL1161-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1161-1
+	.4byte	.LVL1163
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1166
+	.4byte	.LVL1169
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1169
+	.4byte	.LVL1170
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1170
+	.4byte	.LVL1172
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1172
+	.4byte	.LFE242
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST383:
+	.4byte	.LVL1160
+	.4byte	.LVL1162
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1168
+	.4byte	.LFE242
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST384:
+	.4byte	.LVL1160
+	.4byte	.LVL1162
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1162
+	.4byte	.LVL1165
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1166
+	.4byte	.LVL1173
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST385:
+	.4byte	.LVL1161
+	.4byte	.LVL1162
+	.2byte	0xa
+	.byte	0x77
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST52:
+	.4byte	.LVL83
+	.4byte	.LVL85
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL85
+	.4byte	.LFE241
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST53:
+	.4byte	.LVL83
+	.4byte	.LVL84
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL84
+	.4byte	.LFE241
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST54:
+	.4byte	.LVL83
+	.4byte	.LVL85
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL85
+	.4byte	.LVL87
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL87
+	.4byte	.LVL89
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL89
+	.4byte	.LFE241
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST55:
+	.4byte	.LVL88
+	.4byte	.LVL89
+	.2byte	0x4
+	.byte	0xa
+	.2byte	0x12c
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST370:
+	.4byte	.LVL1127
+	.4byte	.LVL1128-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1128-1
+	.4byte	.LFE240
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST371:
+	.4byte	.LVL1127
+	.4byte	.LVL1128-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1128-1
+	.4byte	.LFE240
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -36
+	.4byte	0
+	.4byte	0
+.LLST372:
+	.4byte	.LVL1127
+	.4byte	.LVL1128-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1128-1
+	.4byte	.LVL1138
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -44
+	.4byte	.LVL1143
+	.4byte	.LVL1151
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -44
+	.4byte	.LVL1151
+	.4byte	.LVL1152
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1152
+	.4byte	.LVL1158
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -44
+	.4byte	0
+	.4byte	0
+.LLST373:
+	.4byte	.LVL1127
+	.4byte	.LVL1128-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1128-1
+	.4byte	.LVL1138
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1143
+	.4byte	.LVL1151
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1151
+	.4byte	.LVL1152
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1152
+	.4byte	.LVL1158
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST374:
+	.4byte	.LVL1127
+	.4byte	.LVL1137
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1143
+	.4byte	.LVL1144
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1148
+	.4byte	.LVL1149
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1149
+	.4byte	.LVL1154
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1157
+	.4byte	.LVL1158
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST375:
+	.4byte	.LVL1127
+	.4byte	.LVL1137
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1137
+	.4byte	.LVL1138
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	.LVL1138
+	.4byte	.LVL1143
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1143
+	.4byte	.LVL1144
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1144
+	.4byte	.LVL1151
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	.LVL1151
+	.4byte	.LVL1152
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1152
+	.4byte	.LVL1158
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	.LVL1158
+	.4byte	.LFE240
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST376:
+	.4byte	.LVL1127
+	.4byte	.LVL1131
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1131
+	.4byte	.LVL1133
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL1134
+	.4byte	.LVL1135
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1135
+	.4byte	.LVL1143
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -48
+	.4byte	.LVL1143
+	.4byte	.LVL1144
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1144
+	.4byte	.LFE240
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -48
+	.4byte	0
+	.4byte	0
+.LLST377:
+	.4byte	.LVL1136
+	.4byte	.LVL1137
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL1137
+	.4byte	.LVL1143
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1144
+	.4byte	.LFE240
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST378:
+	.4byte	.LVL1128
+	.4byte	.LVL1129
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1129
+	.4byte	.LVL1130
+	.2byte	0xa
+	.byte	0x76
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST48:
+	.4byte	.LVL77
+	.4byte	.LVL78
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL78
+	.4byte	.LFE239
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST49:
+	.4byte	.LVL77
+	.4byte	.LVL78
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL78
+	.4byte	.LFE239
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST50:
+	.4byte	.LVL77
+	.4byte	.LVL78
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL78
+	.4byte	.LFE239
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST51:
+	.4byte	.LVL80
+	.4byte	.LVL81
+	.2byte	0x3
+	.byte	0x8
+	.byte	0xc8
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST113:
+	.4byte	.LVL226
+	.4byte	.LVL228
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL228
+	.4byte	.LVL231
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL231
+	.4byte	.LVL232
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL232
+	.4byte	.LFE238
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST114:
+	.4byte	.LVL226
+	.4byte	.LVL229-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL229-1
+	.4byte	.LFE238
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST115:
+	.4byte	.LVL229
+	.4byte	.LVL230
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL230
+	.4byte	.LVL232-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL232
+	.4byte	.LFE238
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST116:
+	.4byte	.LVL227
+	.4byte	.LVL229
+	.2byte	0x3
+	.byte	0x8
+	.byte	0xc8
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST452:
+	.4byte	.LVL1417
+	.4byte	.LVL1430
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1430
+	.4byte	.LVL1432
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1432
+	.4byte	.LVL1434
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1434
+	.4byte	.LVL1436
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1436
+	.4byte	.LVL1437
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1437
+	.4byte	.LVL1452
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1452
+	.4byte	.LVL1469
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1469
+	.4byte	.LFE236
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST453:
+	.4byte	.LVL1418
+	.4byte	.LVL1419
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL1419
+	.4byte	.LVL1420
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.4byte	.LVL1420
+	.4byte	.LVL1421
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.4byte	.LVL1421
+	.4byte	.LVL1422
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.4byte	.LVL1422
+	.4byte	.LVL1423
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1423
+	.4byte	.LVL1424
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL1424
+	.4byte	.LVL1425
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.4byte	.LVL1425
+	.4byte	.LVL1426
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.4byte	.LVL1426
+	.4byte	.LVL1427
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.4byte	.LVL1427
+	.4byte	.LVL1428
+	.2byte	0x2
+	.byte	0x35
+	.byte	0x9f
+	.4byte	.LVL1428
+	.4byte	.LVL1429
+	.2byte	0x2
+	.byte	0x36
+	.byte	0x9f
+	.4byte	.LVL1429
+	.4byte	.LVL1430
+	.2byte	0x2
+	.byte	0x37
+	.byte	0x9f
+	.4byte	.LVL1434
+	.4byte	.LVL1443
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.4byte	.LVL1443
+	.4byte	.LVL1444
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1444
+	.4byte	.LVL1445
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL1445
+	.4byte	.LVL1446
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.4byte	.LVL1446
+	.4byte	.LVL1447
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.4byte	.LVL1447
+	.4byte	.LVL1448
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.4byte	.LVL1448
+	.4byte	.LVL1449
+	.2byte	0x2
+	.byte	0x35
+	.byte	0x9f
+	.4byte	.LVL1449
+	.4byte	.LVL1450
+	.2byte	0x2
+	.byte	0x36
+	.byte	0x9f
+	.4byte	.LVL1450
+	.4byte	.LVL1451
+	.2byte	0x2
+	.byte	0x37
+	.byte	0x9f
+	.4byte	.LVL1451
+	.4byte	.LVL1452
+	.2byte	0x2
+	.byte	0x38
+	.byte	0x9f
+	.4byte	.LVL1462
+	.4byte	.LVL1463
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL1463
+	.4byte	.LVL1467
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1496
+	.4byte	.LVL1497
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1497
+	.4byte	.LVL1498
+	.2byte	0x6
+	.byte	0x73
+	.sleb128 0
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL1498
+	.4byte	.LVL1499
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1499
+	.4byte	.LVL1500
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1500
+	.4byte	.LVL1503
+	.2byte	0x5
+	.byte	0x38
+	.byte	0x73
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL1503
+	.4byte	.LVL1504
+	.2byte	0x5
+	.byte	0x39
+	.byte	0x73
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL1504
+	.4byte	.LVL1505
+	.2byte	0x5
+	.byte	0x38
+	.byte	0x73
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL1505
+	.4byte	.LVL1518
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1532
+	.4byte	.LVL1534
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1534
+	.4byte	.LVL1538
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1538
+	.4byte	.LVL1539
+	.2byte	0x3
+	.byte	0x70
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL1539
+	.4byte	.LVL1540
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST454:
+	.4byte	.LVL1500
+	.4byte	.LVL1501
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1501
+	.4byte	.LVL1505
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1507
+	.4byte	.LVL1509
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1509
+	.4byte	.LVL1510
+	.2byte	0x6
+	.byte	0x40
+	.byte	0x91
+	.sleb128 -56
+	.byte	0x6
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL1510
+	.4byte	.LVL1511
+	.2byte	0x6
+	.byte	0x41
+	.byte	0x91
+	.sleb128 -56
+	.byte	0x6
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL1511
+	.4byte	.LVL1512
+	.2byte	0x5
+	.byte	0x40
+	.byte	0x70
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL1512
+	.4byte	.LVL1519
+	.2byte	0x6
+	.byte	0x40
+	.byte	0x91
+	.sleb128 -56
+	.byte	0x6
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL1519
+	.4byte	.LVL1521
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1531
+	.4byte	.LVL1533
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1545
+	.4byte	.LVL1546
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST455:
+	.4byte	.LVL1456
+	.4byte	.LVL1457
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1457
+	.4byte	.LVL1460
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1460
+	.4byte	.LVL1461
+	.2byte	0x3
+	.byte	0x76
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1462
+	.4byte	.LVL1465
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1465
+	.4byte	.LVL1466
+	.2byte	0x3
+	.byte	0x72
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1482
+	.4byte	.LVL1484
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1484
+	.4byte	.LVL1486
+	.2byte	0x6
+	.byte	0x70
+	.sleb128 0
+	.byte	0x73
+	.sleb128 -1
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL1487
+	.4byte	.LVL1488
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1488
+	.4byte	.LVL1489
+	.2byte	0x3
+	.byte	0x72
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1489
+	.4byte	.LVL1490
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1494
+	.4byte	.LVL1495
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1524
+	.4byte	.LVL1525
+	.2byte	0x6
+	.byte	0x70
+	.sleb128 0
+	.byte	0x73
+	.sleb128 -1
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL1525
+	.4byte	.LVL1526
+	.2byte	0x6
+	.byte	0x71
+	.sleb128 0
+	.byte	0x73
+	.sleb128 -8
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL1527
+	.4byte	.LVL1528
+	.2byte	0x6
+	.byte	0x71
+	.sleb128 0
+	.byte	0x73
+	.sleb128 -8
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL1534
+	.4byte	.LVL1535
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1535
+	.4byte	.LVL1536
+	.2byte	0x6
+	.byte	0x72
+	.sleb128 0
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL1537
+	.4byte	.LVL1539
+	.2byte	0x6
+	.byte	0x72
+	.sleb128 0
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST456:
+	.4byte	.LVL1453
+	.4byte	.LVL1454
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1454
+	.4byte	.LVL1457
+	.2byte	0xb
+	.byte	0x78
+	.sleb128 0
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x3
+	.4byte	.LANCHOR26
+	.byte	0x22
+	.4byte	.LVL1471
+	.4byte	.LFE236
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST457:
+	.4byte	.LVL1432
+	.4byte	.LVL1433
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1452
+	.4byte	.LVL1468
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1470
+	.4byte	.LVL1477
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -84
+	.4byte	.LVL1478
+	.4byte	.LVL1479
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -84
+	.4byte	.LVL1492
+	.4byte	.LVL1493
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -84
+	.4byte	.LVL1543
+	.4byte	.LVL1544
+	.2byte	0x8
+	.byte	0x91
+	.sleb128 -76
+	.byte	0x94
+	.byte	0x1
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST458:
+	.4byte	.LVL1417
+	.4byte	.LVL1430
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.4byte	.LVL1431
+	.4byte	.LVL1434
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1434
+	.4byte	.LVL1435
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.4byte	.LVL1435
+	.4byte	.LVL1437
+	.2byte	0x2
+	.byte	0x38
+	.byte	0x9f
+	.4byte	.LVL1437
+	.4byte	.LVL1452
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.4byte	.LVL1452
+	.4byte	.LFE236
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST459:
+	.4byte	.LVL1417
+	.4byte	.LVL1430
+	.2byte	0x2
+	.byte	0x37
+	.byte	0x9f
+	.4byte	.LVL1431
+	.4byte	.LVL1434
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1434
+	.4byte	.LVL1435
+	.2byte	0x2
+	.byte	0x37
+	.byte	0x9f
+	.4byte	.LVL1435
+	.4byte	.LVL1437
+	.2byte	0x2
+	.byte	0x38
+	.byte	0x9f
+	.4byte	.LVL1437
+	.4byte	.LVL1438
+	.2byte	0x2
+	.byte	0x37
+	.byte	0x9f
+	.4byte	.LVL1438
+	.4byte	.LVL1439
+	.2byte	0x2
+	.byte	0x38
+	.byte	0x9f
+	.4byte	.LVL1440
+	.4byte	.LVL1441
+	.2byte	0x2
+	.byte	0x37
+	.byte	0x9f
+	.4byte	.LVL1441
+	.4byte	.LVL1442
+	.2byte	0x2
+	.byte	0x3c
+	.byte	0x9f
+	.4byte	.LVL1442
+	.4byte	.LVL1452
+	.2byte	0x2
+	.byte	0x37
+	.byte	0x9f
+	.4byte	.LVL1452
+	.4byte	.LFE236
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST460:
+	.4byte	.LVL1482
+	.4byte	.LVL1491-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1494
+	.4byte	.LVL1495
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1496
+	.4byte	.LVL1522-1
+	.2byte	0x1
+	.byte	0x5e
+	.4byte	.LVL1524
+	.4byte	.LVL1525
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1525
+	.4byte	.LVL1529-1
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 -7
+	.byte	0x9f
+	.4byte	.LVL1530
+	.4byte	.LVL1535
+	.2byte	0x1
+	.byte	0x5e
+	.4byte	.LVL1535
+	.4byte	.LVL1536
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1536
+	.4byte	.LVL1537
+	.2byte	0x3
+	.byte	0x72
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL1537
+	.4byte	.LVL1539
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1539
+	.4byte	.LVL1541-1
+	.2byte	0x1
+	.byte	0x5e
+	.4byte	.LVL1545
+	.4byte	.LVL1546
+	.2byte	0x1
+	.byte	0x5e
+	.4byte	0
+	.4byte	0
+.LLST461:
+	.4byte	.LVL1499
+	.4byte	.LVL1500
+	.2byte	0x5
+	.byte	0x3
+	.4byte	gFlashPageBuffer0
+	.4byte	0
+	.4byte	0
+.LLST462:
+	.4byte	.LVL1495
+	.4byte	.LVL1524
+	.2byte	0x10
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x40
+	.byte	0x24
+	.byte	0x40
+	.byte	0x26
+	.byte	0x7b
+	.sleb128 0
+	.byte	0x40
+	.byte	0x24
+	.byte	0x40
+	.byte	0x26
+	.byte	0x1e
+	.byte	0x32
+	.byte	0x26
+	.byte	0x9f
+	.4byte	.LVL1530
+	.4byte	.LVL1531
+	.2byte	0x10
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x40
+	.byte	0x24
+	.byte	0x40
+	.byte	0x26
+	.byte	0x7b
+	.sleb128 0
+	.byte	0x40
+	.byte	0x24
+	.byte	0x40
+	.byte	0x26
+	.byte	0x1e
+	.byte	0x32
+	.byte	0x26
+	.byte	0x9f
+	.4byte	.LVL1531
+	.4byte	.LVL1532
+	.2byte	0x2
+	.byte	0x38
+	.byte	0x9f
+	.4byte	.LVL1532
+	.4byte	.LVL1541-1
+	.2byte	0x1
+	.byte	0x5c
+	.4byte	.LVL1545
+	.4byte	.LVL1546
+	.2byte	0x2
+	.byte	0x38
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST463:
+	.4byte	.LVL1455
+	.4byte	.LVL1469
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST464:
+	.4byte	.LVL1458
+	.4byte	.LVL1459
+	.2byte	0x3
+	.byte	0x8
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST465:
+	.4byte	.LVL1480
+	.4byte	.LVL1481
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.4byte	.LVL1481
+	.4byte	.LVL1483
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1493
+	.4byte	.LVL1494
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST466:
+	.4byte	.LVL1471
+	.4byte	.LVL1475
+	.2byte	0xe
+	.byte	0x77
+	.sleb128 0
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x24
+	.byte	0x3
+	.4byte	gReadRetryInfo+20
+	.byte	0x22
+	.byte	0x9f
+	.4byte	.LVL1475
+	.4byte	.LVL1476
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1476
+	.4byte	.LVL1477
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -68
+	.4byte	.LVL1478
+	.4byte	.LVL1479
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -68
+	.4byte	.LVL1492
+	.4byte	.LVL1493
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -68
+	.4byte	0
+	.4byte	0
+.LLST468:
+	.4byte	.LVL1505
+	.4byte	.LVL1506
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1506
+	.4byte	.LVL1513
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1513
+	.4byte	.LVL1514
+	.2byte	0x3
+	.byte	0x72
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL1514
+	.4byte	.LVL1515
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST469:
+	.4byte	.LVL1507
+	.4byte	.LVL1508
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1508
+	.4byte	.LVL1524
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -60
+	.4byte	.LVL1531
+	.4byte	.LFE236
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -60
+	.4byte	0
+	.4byte	0
+.LLST470:
+	.4byte	.LVL1505
+	.4byte	.LVL1506
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1506
+	.4byte	.LVL1517
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1517
+	.4byte	.LVL1519
+	.2byte	0x6
+	.byte	0x91
+	.sleb128 -52
+	.byte	0x6
+	.byte	0x70
+	.sleb128 0
+	.byte	0x22
+	.4byte	.LVL1519
+	.4byte	.LVL1522-1
+	.2byte	0x7
+	.byte	0x91
+	.sleb128 -52
+	.byte	0x6
+	.byte	0x91
+	.sleb128 -36
+	.byte	0x6
+	.byte	0x22
+	.4byte	.LVL1531
+	.4byte	.LVL1534
+	.2byte	0x7
+	.byte	0x91
+	.sleb128 -52
+	.byte	0x6
+	.byte	0x91
+	.sleb128 -36
+	.byte	0x6
+	.byte	0x22
+	.4byte	.LVL1545
+	.4byte	.LVL1546
+	.2byte	0x7
+	.byte	0x91
+	.sleb128 -52
+	.byte	0x6
+	.byte	0x91
+	.sleb128 -36
+	.byte	0x6
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST471:
+	.4byte	.LVL1506
+	.4byte	.LVL1509
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1509
+	.4byte	.LVL1524
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -80
+	.4byte	.LVL1531
+	.4byte	.LVL1534
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -80
+	.4byte	.LVL1545
+	.4byte	.LVL1546
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -80
+	.4byte	0
+	.4byte	0
+.LLST467:
+	.4byte	.LVL1471
+	.4byte	.LVL1472
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1472
+	.4byte	.LVL1473
+	.2byte	0xa
+	.byte	0x70
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST279:
+	.4byte	.LVL745
+	.4byte	.LVL746
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL746
+	.4byte	.LVL753
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL753
+	.4byte	.LVL755
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL755
+	.4byte	.LVL760
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL760
+	.4byte	.LVL768
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL768
+	.4byte	.LVL773
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL773
+	.4byte	.LVL788
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL788
+	.4byte	.LFE233
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST280:
+	.4byte	.LVL745
+	.4byte	.LVL749
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL749
+	.4byte	.LVL750
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL750
+	.4byte	.LVL753
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL753
+	.4byte	.LVL754
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL754
+	.4byte	.LVL760
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL760
+	.4byte	.LVL761
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL761
+	.4byte	.LVL766
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL766
+	.4byte	.LVL767
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL767
+	.4byte	.LVL773
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL773
+	.4byte	.LVL780
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL780
+	.4byte	.LVL783
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL783
+	.4byte	.LVL789
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL789
+	.4byte	.LVL794
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL794
+	.4byte	.LFE233
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST281:
+	.4byte	.LVL746
+	.4byte	.LVL747
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL747
+	.4byte	.LVL748
+	.2byte	0x3
+	.byte	0x70
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL748
+	.4byte	.LVL749
+	.2byte	0xc
+	.byte	0x70
+	.sleb128 -1
+	.byte	0x31
+	.byte	0x24
+	.byte	0x73
+	.sleb128 0
+	.byte	0x22
+	.byte	0x94
+	.byte	0x2
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x9f
+	.4byte	.LVL751
+	.4byte	.LVL752
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL752
+	.4byte	.LVL753
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL756
+	.4byte	.LVL757
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL757
+	.4byte	.LVL758
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL758
+	.4byte	.LVL759
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL762
+	.4byte	.LVL763
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL763
+	.4byte	.LVL764
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL764
+	.4byte	.LVL765
+	.2byte	0x3
+	.byte	0x72
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL769
+	.4byte	.LVL770
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL770
+	.4byte	.LVL771
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL771
+	.4byte	.LVL772
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL774
+	.4byte	.LVL775
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL775
+	.4byte	.LVL776
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL776
+	.4byte	.LVL777
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.4byte	.LVL777
+	.4byte	.LVL778
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.4byte	.LVL778
+	.4byte	.LVL779
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.4byte	.LVL779
+	.4byte	.LVL780
+	.2byte	0x2
+	.byte	0x37
+	.byte	0x9f
+	.4byte	.LVL780
+	.4byte	.LVL781
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL782
+	.4byte	.LVL783
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL784
+	.4byte	.LVL785
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL785
+	.4byte	.LVL786
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL786
+	.4byte	.LVL787
+	.2byte	0xc
+	.byte	0x73
+	.sleb128 -1
+	.byte	0x31
+	.byte	0x24
+	.byte	0x72
+	.sleb128 0
+	.byte	0x22
+	.byte	0x94
+	.byte	0x2
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x9f
+	.4byte	.LVL790
+	.4byte	.LVL791
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL791
+	.4byte	.LVL792
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL792
+	.4byte	.LVL793
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL794
+	.4byte	.LVL795
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST282:
+	.4byte	.LVL751
+	.4byte	.LVL753
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL794
+	.4byte	.LFE233
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST411:
+	.4byte	.LVL1253
+	.4byte	.LVL1254
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1254
+	.4byte	.LVL1260
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1260
+	.4byte	.LVL1263
+	.2byte	0x3
+	.byte	0x72
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL1263
+	.4byte	.LVL1264
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1266
+	.4byte	.LFE231
+	.2byte	0x3
+	.byte	0x72
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST412:
+	.4byte	.LVL1243
+	.4byte	.LVL1254
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1254
+	.4byte	.LVL1261
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1261
+	.4byte	.LVL1262
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1262
+	.4byte	.LVL1266
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1266
+	.4byte	.LVL1267
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST365:
+	.4byte	.LVL1099
+	.4byte	.LVL1100
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1100
+	.4byte	.LVL1109
+	.2byte	0x5
+	.byte	0x34
+	.byte	0x77
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL1109
+	.4byte	.LVL1110
+	.2byte	0x5
+	.byte	0x35
+	.byte	0x77
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL1110
+	.4byte	.LVL1124
+	.2byte	0x5
+	.byte	0x34
+	.byte	0x77
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST366:
+	.4byte	.LVL1100
+	.4byte	.LVL1101
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1101
+	.4byte	.LVL1109
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1121
+	.4byte	.LVL1122
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST367:
+	.4byte	.LVL1096
+	.4byte	.LVL1100
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1100
+	.4byte	.LVL1115
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1117
+	.4byte	.LVL1118
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1119
+	.4byte	.LVL1120
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1121
+	.4byte	.LVL1126
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1126
+	.4byte	.LFE230
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST368:
+	.4byte	.LVL1096
+	.4byte	.LVL1100
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1103
+	.4byte	.LVL1104
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1104
+	.4byte	.LVL1105
+	.2byte	0x3
+	.byte	0x70
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL1106
+	.4byte	.LVL1107
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1107
+	.4byte	.LVL1109
+	.2byte	0x3
+	.byte	0x70
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST369:
+	.4byte	.LVL1097
+	.4byte	.LVL1098
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1098
+	.4byte	.LVL1126
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	.LVL1126
+	.4byte	.LFE230
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 -52
+	.4byte	0
+	.4byte	0
+.LLST44:
+	.4byte	.LVL70
+	.4byte	.LVL72
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL72
+	.4byte	.LFE229
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST45:
+	.4byte	.LVL70
+	.4byte	.LVL71
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL71
+	.4byte	.LFE229
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST46:
+	.4byte	.LVL70
+	.4byte	.LVL72
+	.2byte	0x6
+	.byte	0xc
+	.4byte	0x47c6a7e6
+	.byte	0x9f
+	.4byte	.LVL72
+	.4byte	.LFE229
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST47:
+	.4byte	.LVL70
+	.4byte	.LVL72
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL72
+	.4byte	.LVL73
+	.2byte	0x7
+	.byte	0x70
+	.sleb128 0
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL74
+	.4byte	.LVL75
+	.2byte	0x7
+	.byte	0x70
+	.sleb128 0
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL75
+	.4byte	.LVL76
+	.2byte	0x8
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x20
+	.byte	0x70
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.4byte	.LVL76
+	.4byte	.LFE229
+	.2byte	0x7
+	.byte	0x70
+	.sleb128 0
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST338:
+	.4byte	.LVL1015
+	.4byte	.LVL1020
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1020
+	.4byte	.LVL1048
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1048
+	.4byte	.LVL1049
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1049
+	.4byte	.LFE227
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST339:
+	.4byte	.LVL1015
+	.4byte	.LVL1021-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1021-1
+	.4byte	.LVL1048
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -44
+	.4byte	.LVL1048
+	.4byte	.LVL1049
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1049
+	.4byte	.LFE227
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -44
+	.4byte	0
+	.4byte	0
+.LLST340:
+	.4byte	.LVL1015
+	.4byte	.LVL1021-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1021-1
+	.4byte	.LVL1029
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	.LVL1030
+	.4byte	.LVL1031
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	.LVL1031
+	.4byte	.LVL1033
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1034
+	.4byte	.LVL1037
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	.LVL1037
+	.4byte	.LVL1041
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1048
+	.4byte	.LVL1049
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1049
+	.4byte	.LVL1054
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	.LVL1054
+	.4byte	.LVL1055
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1055
+	.4byte	.LFE227
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	0
+	.4byte	0
+.LLST341:
+	.4byte	.LVL1015
+	.4byte	.LVL1016
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1016
+	.4byte	.LVL1029
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1030
+	.4byte	.LVL1031
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1031
+	.4byte	.LVL1033
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1034
+	.4byte	.LVL1037
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1037
+	.4byte	.LVL1041
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1048
+	.4byte	.LVL1054
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1054
+	.4byte	.LVL1055
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1055
+	.4byte	.LFE227
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST342:
+	.4byte	.LVL1015
+	.4byte	.LVL1030
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 0
+	.4byte	.LVL1030
+	.4byte	.LFE227
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST343:
+	.4byte	.LVL1015
+	.4byte	.LVL1029
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1030
+	.4byte	.LVL1034
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1037
+	.4byte	.LVL1041
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1041
+	.4byte	.LVL1042
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1047
+	.4byte	.LVL1048
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1048
+	.4byte	.LVL1049
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1054
+	.4byte	.LVL1055
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST344:
+	.4byte	.LVL1034
+	.4byte	.LVL1048
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1049
+	.4byte	.LFE227
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST345:
+	.4byte	.LVL1015
+	.4byte	.LVL1029
+	.2byte	0x4
+	.byte	0xa
+	.2byte	0x400
+	.byte	0x9f
+	.4byte	.LVL1030
+	.4byte	.LVL1032
+	.2byte	0x4
+	.byte	0xa
+	.2byte	0x400
+	.byte	0x9f
+	.4byte	.LVL1032
+	.4byte	.LVL1033
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1034
+	.4byte	.LVL1037
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1037
+	.4byte	.LVL1041
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1041
+	.4byte	.LVL1048
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1048
+	.4byte	.LVL1049
+	.2byte	0x4
+	.byte	0xa
+	.2byte	0x400
+	.byte	0x9f
+	.4byte	.LVL1049
+	.4byte	.LVL1054
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1054
+	.4byte	.LVL1055
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1055
+	.4byte	.LFE227
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST346:
+	.4byte	.LVL1025
+	.4byte	.LVL1026
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1026
+	.4byte	.LVL1029
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1030
+	.4byte	.LVL1033
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1036
+	.4byte	.LVL1043
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1049
+	.4byte	.LFE227
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST347:
+	.4byte	.LVL1015
+	.4byte	.LVL1029
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1030
+	.4byte	.LVL1034
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1034
+	.4byte	.LVL1048
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1048
+	.4byte	.LVL1049
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1049
+	.4byte	.LVL1053
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1054
+	.4byte	.LFE227
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST348:
+	.4byte	.LVL1015
+	.4byte	.LVL1029
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1030
+	.4byte	.LVL1034
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1034
+	.4byte	.LVL1042
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -40
+	.4byte	.LVL1048
+	.4byte	.LVL1049
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1049
+	.4byte	.LVL1050
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -40
+	.4byte	.LVL1050
+	.4byte	.LVL1052
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1052
+	.4byte	.LFE227
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -40
+	.4byte	0
+	.4byte	0
+.LLST349:
+	.4byte	.LVL1015
+	.4byte	.LVL1029
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1030
+	.4byte	.LVL1034
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1041
+	.4byte	.LVL1042
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1048
+	.4byte	.LVL1049
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1051
+	.4byte	.LVL1052
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST350:
+	.4byte	.LVL1015
+	.4byte	.LVL1029
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1030
+	.4byte	.LVL1034
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1034
+	.4byte	.LVL1037
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1037
+	.4byte	.LVL1039
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1039
+	.4byte	.LVL1040
+	.2byte	0x6
+	.byte	0x7b
+	.sleb128 0
+	.byte	0x74
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL1040
+	.4byte	.LVL1048
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1048
+	.4byte	.LVL1049
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1049
+	.4byte	.LVL1054
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1054
+	.4byte	.LVL1055
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1055
+	.4byte	.LFE227
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST351:
+	.4byte	.LVL1015
+	.4byte	.LVL1019
+	.2byte	0x2
+	.byte	0x36
+	.byte	0x9f
+	.4byte	.LVL1019
+	.4byte	.LVL1029
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1030
+	.4byte	.LVL1034
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1048
+	.4byte	.LVL1049
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST352:
+	.4byte	.LVL1017
+	.4byte	.LVL1018
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1018
+	.4byte	.LFE227
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -36
+	.4byte	0
+	.4byte	0
+.LLST110:
+	.4byte	.LVL218
+	.4byte	.LVL223
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL223
+	.4byte	.LVL225
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL225
+	.4byte	.LFE226
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST111:
+	.4byte	.LVL218
+	.4byte	.LVL219
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST112:
+	.4byte	.LVL220
+	.4byte	.LVL221
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL221
+	.4byte	.LVL222
+	.2byte	0x8
+	.byte	0x75
+	.sleb128 0
+	.byte	0x3
+	.4byte	.LANCHOR22
+	.byte	0x22
+	.4byte	.LVL225
+	.4byte	.LFE226
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST106:
+	.4byte	.LVL208
+	.4byte	.LVL209-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL209-1
+	.4byte	.LFE225
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST107:
+	.4byte	.LVL208
+	.4byte	.LVL209-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL209-1
+	.4byte	.LFE225
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST108:
+	.4byte	.LVL208
+	.4byte	.LVL209-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL209-1
+	.4byte	.LFE225
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST109:
+	.4byte	.LVL214
+	.4byte	.LVL215
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL215
+	.4byte	.LVL216
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL216
+	.4byte	.LVL217
+	.2byte	0x5
+	.byte	0x71
+	.sleb128 0
+	.byte	0x31
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL217
+	.4byte	.LFE225
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST405:
+	.4byte	.LVL1223
+	.4byte	.LVL1229
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1229
+	.4byte	.LVL1241
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1241
+	.4byte	.LFE224
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST406:
+	.4byte	.LVL1223
+	.4byte	.LVL1227
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1227
+	.4byte	.LFE224
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST407:
+	.4byte	.LVL1223
+	.4byte	.LVL1226
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1226
+	.4byte	.LFE224
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST408:
+	.4byte	.LVL1223
+	.4byte	.LVL1224
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1224
+	.4byte	.LFE224
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST409:
+	.4byte	.LVL1237
+	.4byte	.LVL1238
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1238
+	.4byte	.LVL1239
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1239
+	.4byte	.LVL1240
+	.2byte	0x5
+	.byte	0x71
+	.sleb128 0
+	.byte	0x31
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL1240
+	.4byte	.LVL1241
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST410:
+	.4byte	.LVL1225
+	.4byte	.LVL1242
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1242
+	.4byte	.LFE224
+	.2byte	0xb
+	.byte	0x3
+	.4byte	gNandParaInfo+9
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST353:
+	.4byte	.LVL1057
+	.4byte	.LVL1058-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1058-1
+	.4byte	.LFE223
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST354:
+	.4byte	.LVL1057
+	.4byte	.LVL1058-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1058-1
+	.4byte	.LVL1080
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1080
+	.4byte	.LFE223
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST355:
+	.4byte	.LVL1057
+	.4byte	.LVL1058-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1058-1
+	.4byte	.LVL1080
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1080
+	.4byte	.LFE223
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST356:
+	.4byte	.LVL1057
+	.4byte	.LVL1058-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1058-1
+	.4byte	.LVL1080
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1080
+	.4byte	.LFE223
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST357:
+	.4byte	.LVL1059
+	.4byte	.LVL1060
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1063
+	.4byte	.LVL1064
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1064
+	.4byte	.LVL1066
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1066
+	.4byte	.LVL1067
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1067
+	.4byte	.LVL1068
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1068
+	.4byte	.LVL1069
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1069
+	.4byte	.LVL1071
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1071
+	.4byte	.LVL1072
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1072
+	.4byte	.LVL1073-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1073-1
+	.4byte	.LVL1075
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1077
+	.4byte	.LVL1078
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1078
+	.4byte	.LVL1080
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1080
+	.4byte	.LFE223
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST359:
+	.4byte	.LVL1066
+	.4byte	.LVL1069
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST358:
+	.4byte	.LVL1061
+	.4byte	.LVL1066
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST332:
+	.4byte	.LVL1000
+	.4byte	.LVL1004
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1004
+	.4byte	.LFE222
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST333:
+	.4byte	.LVL1000
+	.4byte	.LVL1006-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1006-1
+	.4byte	.LVL1014
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1014
+	.4byte	.LFE222
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST334:
+	.4byte	.LVL1000
+	.4byte	.LVL1003
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1003
+	.4byte	.LVL1014
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1014
+	.4byte	.LFE222
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST335:
+	.4byte	.LVL1000
+	.4byte	.LVL1001
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1001
+	.4byte	.LVL1014
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1014
+	.4byte	.LFE222
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST336:
+	.4byte	.LVL1011
+	.4byte	.LVL1012
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1012
+	.4byte	.LFE222
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST337:
+	.4byte	.LVL1002
+	.4byte	.LVL1014
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST39:
+	.4byte	.LVL64
+	.4byte	.LVL66
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL66
+	.4byte	.LFE221
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST40:
+	.4byte	.LVL64
+	.4byte	.LVL69-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL69-1
+	.4byte	.LFE221
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST41:
+	.4byte	.LVL64
+	.4byte	.LVL65
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL65
+	.4byte	.LVL66
+	.2byte	0xa
+	.byte	0x70
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST42:
+	.4byte	.LVL65
+	.4byte	.LVL67
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST43:
+	.4byte	.LVL68
+	.4byte	.LVL69
+	.2byte	0x3
+	.byte	0x8
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST36:
+	.4byte	.LVL60
+	.4byte	.LVL61
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL61
+	.4byte	.LFE220
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST37:
+	.4byte	.LVL60
+	.4byte	.LVL62
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL62
+	.4byte	.LVL63
+	.2byte	0xa
+	.byte	0x70
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST38:
+	.4byte	.LVL62
+	.4byte	.LVL63
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST34:
+	.4byte	.LVL57
+	.4byte	.LVL58
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL58
+	.4byte	.LVL59
+	.2byte	0xa
+	.byte	0x70
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST35:
+	.4byte	.LVL58
+	.4byte	.LVL59
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST31:
+	.4byte	.LVL53
+	.4byte	.LVL56-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL56-1
+	.4byte	.LFE218
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST32:
+	.4byte	.LVL53
+	.4byte	.LVL54
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL54
+	.4byte	.LVL55
+	.2byte	0xa
+	.byte	0x70
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST33:
+	.4byte	.LVL54
+	.4byte	.LVL55
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST26:
+	.4byte	.LVL47
+	.4byte	.LVL49
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL49
+	.4byte	.LFE217
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST27:
+	.4byte	.LVL47
+	.4byte	.LVL51
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL51
+	.4byte	.LVL52
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST28:
+	.4byte	.LVL47
+	.4byte	.LVL50
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL50
+	.4byte	.LFE217
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST29:
+	.4byte	.LVL47
+	.4byte	.LVL48
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL48
+	.4byte	.LVL49
+	.2byte	0xa
+	.byte	0x70
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST30:
+	.4byte	.LVL48
+	.4byte	.LVL49
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST23:
+	.4byte	.LVL43
+	.4byte	.LVL46-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL46-1
+	.4byte	.LFE216
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST24:
+	.4byte	.LVL43
+	.4byte	.LVL44
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL44
+	.4byte	.LVL45
+	.2byte	0xa
+	.byte	0x70
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST25:
+	.4byte	.LVL44
+	.4byte	.LVL45
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST129:
+	.4byte	.LVL281
+	.4byte	.LVL286-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL286-1
+	.4byte	.LVL289
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL289
+	.4byte	.LFE213
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST130:
+	.4byte	.LVL281
+	.4byte	.LVL282
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL282
+	.4byte	.LVL288
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL288
+	.4byte	.LVL289
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL289
+	.4byte	.LFE213
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST131:
+	.4byte	.LVL281
+	.4byte	.LVL285
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL285
+	.4byte	.LVL287
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL287
+	.4byte	.LVL289
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	.LVL289
+	.4byte	.LFE213
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST132:
+	.4byte	.LVL281
+	.4byte	.LVL283
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL283
+	.4byte	.LVL284
+	.2byte	0xa
+	.byte	0x70
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST14:
+	.4byte	.LVL29
+	.4byte	.LVL32-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL32-1
+	.4byte	.LVL32
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL32
+	.4byte	.LFE212
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST15:
+	.4byte	.LVL29
+	.4byte	.LVL30
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL30
+	.4byte	.LVL31
+	.2byte	0xa
+	.byte	0x70
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST16:
+	.4byte	.LVL30
+	.4byte	.LVL31
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST11:
+	.4byte	.LVL25
+	.4byte	.LVL28-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL28-1
+	.4byte	.LFE211
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST12:
+	.4byte	.LVL25
+	.4byte	.LVL26
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL26
+	.4byte	.LVL27
+	.2byte	0xa
+	.byte	0x70
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST13:
+	.4byte	.LVL26
+	.4byte	.LVL27
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST136:
+	.4byte	.LVL301
+	.4byte	.LVL302
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL302
+	.4byte	.LFE210
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST104:
+	.4byte	.LVL202
+	.4byte	.LVL205-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL205-1
+	.4byte	.LFE207
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST105:
+	.4byte	.LVL202
+	.4byte	.LVL203
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL203
+	.4byte	.LVL204
+	.2byte	0xa
+	.byte	0x70
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST6:
+	.4byte	.LVL18
+	.4byte	.LVL20-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL20-1
+	.4byte	.LFE206
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST7:
+	.4byte	.LVL19
+	.4byte	.LVL24
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST8:
+	.4byte	.LVL21
+	.4byte	.LVL23
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST9:
+	.4byte	.LVL21
+	.4byte	.LVL23
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST10:
+	.4byte	.LVL22
+	.4byte	.LVL23
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST4:
+	.4byte	.LVL13
+	.4byte	.LVL15-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL15-1
+	.4byte	.LFE205
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST5:
+	.4byte	.LVL14
+	.4byte	.LVL17
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL17
+	.4byte	.LFE205
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST3:
+	.4byte	.LVL9
+	.4byte	.LVL10
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL10
+	.4byte	.LVL11
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL11
+	.4byte	.LVL12
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL12
+	.4byte	.LFE204
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST1:
+	.4byte	.LVL2
+	.4byte	.LVL5
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL5
+	.4byte	.LVL6
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL6
+	.4byte	.LVL8
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL8
+	.4byte	.LFE203
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST2:
+	.4byte	.LVL3
+	.4byte	.LVL4
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL6
+	.4byte	.LVL7
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL7
+	.4byte	.LFE203
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST0:
+	.4byte	.LVL0
+	.4byte	.LVL1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1
+	.4byte	.LFE507
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST17:
+	.4byte	.LVL34
+	.4byte	.LVL37
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST18:
+	.4byte	.LVL34
+	.4byte	.LVL35
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL35
+	.4byte	.LVL36
+	.2byte	0xa
+	.byte	0x70
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST19:
+	.4byte	.LVL35
+	.4byte	.LVL36
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST20:
+	.4byte	.LVL39
+	.4byte	.LVL42
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST21:
+	.4byte	.LVL39
+	.4byte	.LVL40
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL40
+	.4byte	.LVL41
+	.2byte	0xa
+	.byte	0x70
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST22:
+	.4byte	.LVL40
+	.4byte	.LVL41
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST76:
+	.4byte	.LVL129
+	.4byte	.LVL129
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL129
+	.4byte	.LVL130
+	.2byte	0xa
+	.byte	0x70
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST77:
+	.4byte	.LVL129
+	.4byte	.LVL130
+	.2byte	0x1f
+	.byte	0x70
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap+4
+	.byte	0x22
+	.byte	0x6
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x23
+	.uleb128 0x8
+	.byte	0x38
+	.byte	0x24
+	.byte	0x70
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap
+	.byte	0x22
+	.byte	0x6
+	.byte	0x22
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST78:
+	.4byte	.LVL129
+	.4byte	.LVL130
+	.2byte	0xa
+	.byte	0x70
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST94:
+	.4byte	.LVL178
+	.4byte	.LVL179
+	.2byte	0x8
+	.byte	0x3
+	.4byte	gpNandParaInfo
+	.byte	0x6
+	.byte	0x23
+	.uleb128 0x13
+	.4byte	0
+	.4byte	0
+.LLST95:
+	.4byte	.LVL180
+	.4byte	.LVL181-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL181-1
+	.4byte	.LVL181
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL181
+	.4byte	.LVL182
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST100:
+	.4byte	.LVL193
+	.4byte	.LVL194-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL194-1
+	.4byte	.LFE276
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST165:
+	.4byte	.LVL404
+	.4byte	.LVL405
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL405
+	.4byte	.LVL406
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL406
+	.4byte	.LVL407
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL407
+	.4byte	.LFE299
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST166:
+	.4byte	.LVL408
+	.4byte	.LVL409
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL409
+	.4byte	.LFE312
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST196:
+	.4byte	.LVL481
+	.4byte	.LVL509
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL509
+	.4byte	.LVL510
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL510
+	.4byte	.LFE339
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST197:
+	.4byte	.LVL482
+	.4byte	.LVL508
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL510
+	.4byte	.LFE339
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST198:
+	.4byte	.LVL483
+	.4byte	.LVL508
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL510
+	.4byte	.LVL515
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL515
+	.4byte	.LVL516
+	.2byte	0x8
+	.byte	0x70
+	.sleb128 0
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x7c
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.4byte	.LVL516
+	.4byte	.LVL517
+	.2byte	0x9
+	.byte	0x72
+	.sleb128 0
+	.byte	0x70
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x7c
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.4byte	.LVL517
+	.4byte	.LFE339
+	.2byte	0x8
+	.byte	0x70
+	.sleb128 0
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x7c
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST199:
+	.4byte	.LVL486
+	.4byte	.LVL500
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL502
+	.4byte	.LVL507
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL510
+	.4byte	.LVL511
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL513
+	.4byte	.LFE339
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST200:
+	.4byte	.LVL484
+	.4byte	.LVL485
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL485
+	.4byte	.LVL497
+	.2byte	0x7
+	.byte	0x70
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x22
+	.4byte	.LVL500
+	.4byte	.LVL501
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL501
+	.4byte	.LVL506
+	.2byte	0x7
+	.byte	0x70
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x22
+	.4byte	.LVL510
+	.4byte	.LVL514
+	.2byte	0x7
+	.byte	0x70
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST201:
+	.4byte	.LVL492
+	.4byte	.LVL495
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL495
+	.4byte	.LVL497
+	.2byte	0x7
+	.byte	0x72
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x22
+	.4byte	.LVL502
+	.4byte	.LVL504
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL504
+	.4byte	.LVL506
+	.2byte	0x7
+	.byte	0x72
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x22
+	.4byte	.LVL510
+	.4byte	.LVL512
+	.2byte	0x7
+	.byte	0x72
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST202:
+	.4byte	.LVL484
+	.4byte	.LVL485
+	.2byte	0xe
+	.byte	0x72
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x76
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL485
+	.4byte	.LVL486
+	.2byte	0x15
+	.byte	0x70
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x22
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x76
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL486
+	.4byte	.LVL487
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL487
+	.4byte	.LVL500
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -44
+	.4byte	.LVL500
+	.4byte	.LVL501
+	.2byte	0xe
+	.byte	0x72
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x76
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL501
+	.4byte	.LVL502
+	.2byte	0x15
+	.byte	0x70
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x22
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x76
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL502
+	.4byte	.LVL508
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -44
+	.4byte	.LVL510
+	.4byte	.LFE339
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -44
+	.4byte	0
+	.4byte	0
+.LLST203:
+	.4byte	.LVL493
+	.4byte	.LVL494
+	.2byte	0xe
+	.byte	0x76
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x77
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL494
+	.4byte	.LVL496
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL502
+	.4byte	.LVL503
+	.2byte	0xe
+	.byte	0x76
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x77
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL503
+	.4byte	.LVL504
+	.2byte	0x10
+	.byte	0x76
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x73
+	.sleb128 4
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL504
+	.4byte	.LVL505
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST204:
+	.4byte	.LVL488
+	.4byte	.LVL498
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL498
+	.4byte	.LVL499
+	.2byte	0x5
+	.byte	0x7c
+	.sleb128 0
+	.byte	0x74
+	.sleb128 0
+	.byte	0x22
+	.4byte	.LVL502
+	.4byte	.LVL508
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL510
+	.4byte	.LVL514
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST205:
+	.4byte	.LVL518
+	.4byte	.LVL519-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL519-1
+	.4byte	.LFE338
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST210:
+	.4byte	.LVL541
+	.4byte	.LVL542-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL542-1
+	.4byte	.LFE337
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST223:
+	.4byte	.LVL584
+	.4byte	.LVL590
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL590
+	.4byte	.LVL604
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL604
+	.4byte	.LVL606
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL606
+	.4byte	.LFE344
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST224:
+	.4byte	.LVL585
+	.4byte	.LVL590
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL590
+	.4byte	.LVL603
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL604
+	.4byte	.LVL606
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL606
+	.4byte	.LFE344
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST225:
+	.4byte	.LVL593
+	.4byte	.LVL595
+	.2byte	0x5
+	.byte	0x72
+	.sleb128 0
+	.byte	0x36
+	.byte	0x1b
+	.byte	0x9f
+	.4byte	.LVL595
+	.4byte	.LVL600-1
+	.2byte	0xd
+	.byte	0x7a
+	.sleb128 2
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x36
+	.byte	0x1b
+	.byte	0x9f
+	.4byte	.LVL606
+	.4byte	.LFE344
+	.2byte	0xd
+	.byte	0x7a
+	.sleb128 2
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x36
+	.byte	0x1b
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST226:
+	.4byte	.LVL587
+	.4byte	.LVL589
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL589
+	.4byte	.LVL590
+	.2byte	0xb
+	.byte	0x70
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x3
+	.4byte	p_valid_page_count_table
+	.byte	0x6
+	.byte	0x22
+	.4byte	.LVL590
+	.4byte	.LVL591-1
+	.2byte	0xb
+	.byte	0x74
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x3
+	.4byte	p_valid_page_count_table
+	.byte	0x6
+	.byte	0x22
+	.4byte	.LVL604
+	.4byte	.LVL606
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST227:
+	.4byte	.LVL587
+	.4byte	.LVL588
+	.2byte	0xe
+	.byte	0x72
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x75
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL588
+	.4byte	.LVL598
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL604
+	.4byte	.LVL605
+	.2byte	0xe
+	.byte	0x72
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x75
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL605
+	.4byte	.LVL606
+	.2byte	0x10
+	.byte	0x72
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x7a
+	.sleb128 4
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL606
+	.4byte	.LFE344
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST228:
+	.4byte	.LVL594
+	.4byte	.LVL599
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL599
+	.4byte	.LVL600-1
+	.2byte	0x1c
+	.byte	0x7a
+	.sleb128 2
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x31
+	.byte	0x26
+	.byte	0x11
+	.sleb128 -1431655765
+	.byte	0x1e
+	.byte	0x31
+	.byte	0x24
+	.byte	0x3
+	.4byte	p_valid_page_count_table
+	.byte	0x6
+	.byte	0x22
+	.4byte	.LVL606
+	.4byte	.LFE344
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST229:
+	.4byte	.LVL596
+	.4byte	.LVL597
+	.2byte	0xe
+	.byte	0x70
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x73
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL597
+	.4byte	.LVL600-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL606
+	.4byte	.LVL607
+	.2byte	0xe
+	.byte	0x70
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x73
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL607
+	.4byte	.LFE344
+	.2byte	0x10
+	.byte	0x70
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x72
+	.sleb128 4
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST230:
+	.4byte	.LVL586
+	.4byte	.LVL603
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL604
+	.4byte	.LFE344
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST231:
+	.4byte	.LVL593
+	.4byte	.LVL595
+	.2byte	0xa
+	.byte	0x3
+	.4byte	p_data_block_list_table
+	.byte	0x6
+	.byte	0x72
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.4byte	.LVL595
+	.4byte	.LVL600-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL606
+	.4byte	.LFE344
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST232:
+	.4byte	.LVL608
+	.4byte	.LVL611-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL611-1
+	.4byte	.LVL616
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL616
+	.4byte	.LFE347
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST233:
+	.4byte	.LVL608
+	.4byte	.LVL609
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL610
+	.4byte	.LVL616
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST234:
+	.4byte	.LVL608
+	.4byte	.LVL611-1
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 12
+	.4byte	0
+	.4byte	0
+.LLST235:
+	.4byte	.LVL613
+	.4byte	.LVL615
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST239:
+	.4byte	.LVL638
+	.4byte	.LVL640
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL640
+	.4byte	.LFE358
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST240:
+	.4byte	.LVL639
+	.4byte	.LVL640
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL640
+	.4byte	.LFE358
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST241:
+	.4byte	.LVL641
+	.4byte	.LVL642-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL642-1
+	.4byte	.LVL642
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL642
+	.4byte	.LVL643
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL643
+	.4byte	.LFE363
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST242:
+	.4byte	.LVL641
+	.4byte	.LVL642-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL642-1
+	.4byte	.LVL642
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL642
+	.4byte	.LVL644
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL644
+	.4byte	.LFE363
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST258:
+	.4byte	.LVL689
+	.4byte	.LVL691-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL691-1
+	.4byte	.LFE385
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST259:
+	.4byte	.LVL690
+	.4byte	.LVL691-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL691-1
+	.4byte	.LVL691
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST360:
+	.4byte	.LVL1081
+	.4byte	.LVL1083
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1083
+	.4byte	.LFE228
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST361:
+	.4byte	.LVL1081
+	.4byte	.LVL1084-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1084-1
+	.4byte	.LFE228
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST362:
+	.4byte	.LVL1082
+	.4byte	.LVL1087
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1087
+	.4byte	.LVL1088
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1088
+	.4byte	.LVL1090
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST363:
+	.4byte	.LVL1091
+	.4byte	.LVL1094
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST364:
+	.4byte	.LVL1091
+	.4byte	.LVL1094
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST422:
+	.4byte	.LVL1303
+	.4byte	.LVL1304
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1304
+	.4byte	.LFE484
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST472:
+	.4byte	.LVL1547
+	.4byte	.LVL1548-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1548-1
+	.4byte	.LVL1548
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1548
+	.4byte	.LVL1549
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1549
+	.4byte	.LVL1550
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1550
+	.4byte	.LVL1551
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1551
+	.4byte	.LVL1552
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1552
+	.4byte	.LVL1553
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1553
+	.4byte	.LVL1554
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1554
+	.4byte	.LVL1555
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1555
+	.4byte	.LVL1556
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1556
+	.4byte	.LVL1557
+	.2byte	0x4
+	.byte	0x72
+	.sleb128 65
+	.byte	0x9f
+	.4byte	.LVL1557
+	.4byte	.LVL1558
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1558
+	.4byte	.LVL1559
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1559
+	.4byte	.LVL1560
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1560
+	.4byte	.LFE237
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST473:
+	.4byte	.LVL1554
+	.4byte	.LVL1555
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1555
+	.4byte	.LVL1556
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1556
+	.4byte	.LVL1557
+	.2byte	0x4
+	.byte	0x72
+	.sleb128 65
+	.byte	0x9f
+	.4byte	.LVL1557
+	.4byte	.LVL1558
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1558
+	.4byte	.LVL1559
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1559
+	.4byte	.LVL1560
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST526:
+	.4byte	.LVL1804
+	.4byte	.LVL1806
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1806
+	.4byte	.LVL1814
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1814
+	.4byte	.LFE235
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST527:
+	.4byte	.LVL1805
+	.4byte	.LVL1807
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST539:
+	.4byte	.LVL1876
+	.4byte	.LVL1878
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1889
+	.4byte	.LVL1890
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1890
+	.4byte	.LVL1891
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL1891
+	.4byte	.LVL1892
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST540:
+	.4byte	.LVL1877
+	.4byte	.LVL1888
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1892
+	.4byte	.LFE320
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST541:
+	.4byte	.LVL1894
+	.4byte	.LVL1895
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1895
+	.4byte	.LVL1944
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1944
+	.4byte	.LFE386
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST542:
+	.4byte	.LVL1906
+	.4byte	.LVL1912
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1913
+	.4byte	.LVL1943
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST543:
+	.4byte	.LVL1916
+	.4byte	.LVL1931
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1932
+	.4byte	.LVL1943
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST544:
+	.4byte	.LVL1923
+	.4byte	.LVL1924
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1926
+	.4byte	.LVL1927
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1927
+	.4byte	.LVL1930
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1936
+	.4byte	.LVL1939
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1939
+	.4byte	.LVL1940
+	.2byte	0x3
+	.byte	0x7a
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1941
+	.4byte	.LVL1943
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST545:
+	.4byte	.LVL1926
+	.4byte	.LVL1927
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1927
+	.4byte	.LVL1930
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1936
+	.4byte	.LVL1943
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST546:
+	.4byte	.LVL1933
+	.4byte	.LVL1935
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST547:
+	.4byte	.LVL1933
+	.4byte	.LVL1935
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST548:
+	.4byte	.LVL1945
+	.4byte	.LVL1946
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1946
+	.4byte	.LFE406
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST549:
+	.4byte	.LVL1946
+	.4byte	.LVL1947
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1948
+	.4byte	.LVL1952
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1952
+	.4byte	.LVL1953
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1954
+	.4byte	.LFE406
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST550:
+	.4byte	.LVL1951
+	.4byte	.LVL1957
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1957
+	.4byte	.LVL1958
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1958
+	.4byte	.LVL1959
+	.2byte	0x3
+	.byte	0x7b
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1959
+	.4byte	.LVL1960
+	.2byte	0x3
+	.byte	0x76
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1960
+	.4byte	.LFE406
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST551:
+	.4byte	.LVL1956
+	.4byte	.LVL1958
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1960
+	.4byte	.LVL1961
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1962
+	.4byte	.LFE406
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST552:
+	.4byte	.LVL1963
+	.4byte	.LVL1965
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1965
+	.4byte	.LVL1973
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1973
+	.4byte	.LVL1974
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1974
+	.4byte	.LVL1975
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1975
+	.4byte	.LVL1976-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1976-1
+	.4byte	.LFE389
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST553:
+	.4byte	.LVL1964
+	.4byte	.LVL1973
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST556:
+	.4byte	.LVL1989
+	.4byte	.LVL1991
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1991
+	.4byte	.LVL1998
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1998
+	.4byte	.LFE373
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST557:
+	.4byte	.LVL1990
+	.4byte	.LVL1991
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1991
+	.4byte	.LVL1997
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST558:
+	.4byte	.LVL1991
+	.4byte	.LVL1992
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1995
+	.4byte	.LVL1996
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST562:
+	.4byte	.LVL2017
+	.4byte	.LVL2036
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2037
+	.4byte	.LFE360
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST563:
+	.4byte	.LVL2022
+	.4byte	.LVL2023
+	.2byte	0x12
+	.byte	0x70
+	.sleb128 0
+	.byte	0x33
+	.byte	0x25
+	.byte	0x70
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x23
+	.uleb128 0x18
+	.byte	0x31
+	.byte	0x24
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x4
+	.byte	0x9f
+	.4byte	.LVL2023
+	.4byte	.LVL2024-1
+	.2byte	0x1c
+	.byte	0x3
+	.4byte	c_ftl_nand_data_blks_per_plane
+	.byte	0x94
+	.byte	0x2
+	.byte	0x33
+	.byte	0x25
+	.byte	0x3
+	.4byte	c_ftl_nand_data_blks_per_plane
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x23
+	.uleb128 0x18
+	.byte	0x31
+	.byte	0x24
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x4
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST592:
+	.4byte	.LVL2161
+	.4byte	.LVL2162
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2162
+	.4byte	.LFE350
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST593:
+	.4byte	.LVL2161
+	.4byte	.LVL2162
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2162
+	.4byte	.LFE350
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST594:
+	.4byte	.LVL2161
+	.4byte	.LVL2162
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2162
+	.4byte	.LVL2177
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL2177
+	.4byte	.LVL2178
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -40
+	.4byte	.LVL2178
+	.4byte	.LFE350
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST595:
+	.4byte	.LVL2168
+	.4byte	.LVL2176
+	.2byte	0x7
+	.byte	0x77
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL2178
+	.4byte	.LFE350
+	.2byte	0x7
+	.byte	0x77
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST596:
+	.4byte	.LVL2170
+	.4byte	.LVL2171
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST723:
+	.4byte	.LVL2799
+	.4byte	.LVL2800-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST724:
+	.4byte	.LVL2824
+	.4byte	.LVL2825
+	.2byte	0x6
+	.byte	0x3
+	.4byte	g_active_superblock
+	.byte	0x9f
+	.4byte	.LVL2825
+	.4byte	.LVL2831
+	.2byte	0x6
+	.byte	0x3
+	.4byte	g_buffer_superblock
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST725:
+	.4byte	.LVL2833
+	.4byte	.LVL2837
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2837
+	.4byte	.LVL2840
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL2840
+	.4byte	.LVL2845
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2845
+	.4byte	.LVL2853
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL2853
+	.4byte	.LVL2854
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2854
+	.4byte	.LVL2906
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL2906
+	.4byte	.LVL2907
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2907
+	.4byte	.LVL2908
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL2908
+	.4byte	.LVL2909
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2909
+	.4byte	.LFE407
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST726:
+	.4byte	.LVL2833
+	.4byte	.LVL2835
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2835
+	.4byte	.LVL2906
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL2906
+	.4byte	.LFE407
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST727:
+	.4byte	.LVL2834
+	.4byte	.LVL2835
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2835
+	.4byte	.LVL2839
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL2840
+	.4byte	.LVL2905
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST728:
+	.4byte	.LVL2834
+	.4byte	.LVL2837
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2837
+	.4byte	.LVL2839
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL2840
+	.4byte	.LVL2845
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2845
+	.4byte	.LVL2853
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL2853
+	.4byte	.LVL2854
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2854
+	.4byte	.LVL2905
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST729:
+	.4byte	.LVL2886
+	.4byte	.LVL2890
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST730:
+	.4byte	.LVL2870
+	.4byte	.LVL2871
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2871
+	.4byte	.LVL2881
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -64
+	.4byte	.LVL2881
+	.4byte	.LVL2882
+	.2byte	0x7
+	.byte	0x91
+	.sleb128 -64
+	.byte	0x94
+	.byte	0x2
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x9f
+	.4byte	.LVL2883
+	.4byte	.LVL2905
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -64
+	.4byte	0
+	.4byte	0
+.LLST731:
+	.4byte	.LVL2872
+	.4byte	.LVL2876
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2876
+	.4byte	.LVL2877
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL2877
+	.4byte	.LVL2878-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2878
+	.4byte	.LVL2879
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2880
+	.4byte	.LVL2894
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -56
+	.4byte	.LVL2895
+	.4byte	.LVL2896
+	.2byte	0x7
+	.byte	0x91
+	.sleb128 -56
+	.byte	0x94
+	.byte	0x2
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST732:
+	.4byte	.LVL2872
+	.4byte	.LVL2894
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -68
+	.4byte	.LVL2895
+	.4byte	.LVL2896
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -68
+	.4byte	0
+	.4byte	0
+.LLST733:
+	.4byte	.LVL2873
+	.4byte	.LVL2874
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2874
+	.4byte	.LVL2875
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -56
+	.byte	0x6
+	.4byte	0
+	.4byte	0
+.LLST734:
+	.4byte	.LVL2867
+	.4byte	.LVL2905
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -60
+	.4byte	0
+	.4byte	0
+.LLST735:
+	.4byte	.LVL2884
+	.4byte	.LVL2885
+	.2byte	0x2
+	.byte	0x72
+	.sleb128 12
+	.4byte	.LVL2885
+	.4byte	.LVL2894
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST736:
+	.4byte	.LVL2910
+	.4byte	.LVL2911
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2911
+	.4byte	.LFE302
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST737:
+	.4byte	.LVL2922
+	.4byte	.LVL2923
+	.2byte	0x7
+	.byte	0xa
+	.2byte	0x400
+	.byte	0x74
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL2923
+	.4byte	.LVL2924
+	.2byte	0x7
+	.byte	0xa
+	.2byte	0x401
+	.byte	0x74
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL2924
+	.4byte	.LFE302
+	.2byte	0x7
+	.byte	0xa
+	.2byte	0x400
+	.byte	0x74
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST779:
+	.4byte	.LVL3108
+	.4byte	.LVL3114
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL3114
+	.4byte	.LFE264
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST780:
+	.4byte	.LVL3108
+	.4byte	.LVL3113
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL3113
+	.4byte	.LVL3119
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL3119
+	.4byte	.LVL3128
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL3128
+	.4byte	.LFE264
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+	.ascii	"chk_fastmap\000"
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+	.ascii	"power_up_flag\000"
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+	.ascii	"net_boot_file_size\000"
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+	.ascii	"c_ftl_nand_map_region_num\000"
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+	.ascii	"pageBuf\000"
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+	.ascii	"NandParaInfo\000"
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+	.ascii	"pBlkVerTbl\000"
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+	.ascii	"CHIP_MAP_INFO\000"
+.LASF912:
+	.ascii	"_block_isbad\000"
 	.hidden	free

commit 45c78162f30b32e6dc9be5c59ea508e7a589b526
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Tue May 22 20:16:10 2018 +0800

    dm: regmap: use devfdt_get_addr_size_index get reg
    
    fdtdec_get_addr_size() hard-codes the number of cells used to represent
    an address or size in DT. This is incorrect in many cases depending on
    the DT binding for a particular node or property (e.g. it is incorrect
    for the "reg" property). In most cases, DT parsing code must use the
    properties #address-cells and #size-cells to parse addres properties.
    
    Change-Id: I736cf41f48eaac5d6b82510a037f447ff874a9e4
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c
index 0f1d30820c..1f9d8b4a3e 100644
--- a/drivers/core/regmap.c
+++ b/drivers/core/regmap.c
@@ -96,9 +96,7 @@ int regmap_init_mem(struct udevice *dev, struct regmap **mapp)
 			range->start = r.start;
 			range->size = r.end - r.start + 1;
 		} else {
-			range->start = fdtdec_get_addr_size_fixed(gd->fdt_blob,
-					dev_of_offset(dev), "reg", index,
-					addr_len, size_len, &sz, true);
+			range->start = devfdt_get_addr_size_index(dev, index, &sz);
 			range->size = sz;
 		}
 	}

commit 7a5fbf5e5eab41d9f711a20be418cea3268e6701
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Fri May 18 14:04:23 2018 +0800

    board: evb-rk3308: compatible different adc key channle on board
    
    The RK3308 EVB has two variants: V10 & V11, and V10 bind the
    Recovery key on adc channel 0, but V11 bind to channel 1.
    Fortunately, the two variants use adc channel 3 to identify
    one from another as board id information. So we identify
    the board id by adc channel 3, then get the Recovery key
    status according to it's corresponding adc channel.
    
    Change-Id: Ib04fb1aad08f69fcdb493258e25c748fb45468d4
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/board/rockchip/evb_rk3308/evb_rk3308.c b/board/rockchip/evb_rk3308/evb_rk3308.c
index 4bf86117df..fad6b81f37 100644
--- a/board/rockchip/evb_rk3308/evb_rk3308.c
+++ b/board/rockchip/evb_rk3308/evb_rk3308.c
@@ -5,7 +5,41 @@
  */
 
 #include <common.h>
-#include <dm.h>
-#include <asm/io.h>
+#include <adc.h>
 
 DECLARE_GLOBAL_DATA_PTR;
+
+#define KEY_DOWN_MIN_VAL        0
+#define KEY_DOWN_MAX_VAL        30
+
+/*
+ * Two board variants whith adc channel 3 is for board id
+ * v10: 1024, v11: 512
+ * v10: adc channel 0 for dnl key
+ * v11: adc channel 1 for dnl key
+ */
+int rockchip_dnl_key_pressed(void)
+{
+	unsigned int key_val, id_val;
+	int key_ch;
+
+	if (adc_channel_single_shot("saradc", 3, &id_val)) {
+		printf("%s read board id failed\n", __func__);
+		return false;
+	}
+
+	if (abs(id_val - 1024) <= 30)
+		key_ch = 0;
+	else
+		key_ch = 1;
+
+	if (adc_channel_single_shot("saradc", key_ch, &key_val)) {
+		printf("%s read adc key val failed\n", __func__);
+		return false;
+	}
+
+	if ((key_val >= KEY_DOWN_MIN_VAL) && (key_val <= KEY_DOWN_MAX_VAL))
+		return true;
+	else
+		return false;
+}

commit fd262f5b6d452a8d2a35ee4237a85e8a0d56617a
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri May 11 15:19:43 2018 +0800

    rockchip: rkimg: rksfc use the storagemedia type 'nand'
    
    The device node for rksfc and rknand are the same in kernel, so
    we can use the same storage media type.
    
    Change-Id: I3eb70bc1a502e516fbf538ac274ee856a98ba556
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 2f95d75ea2..1e33a5e335 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -173,7 +173,7 @@ int get_bootdev_type(void)
 		boot_media = "nand";
 	} else if (!strcmp(devtype, "rksfc")) {
 		type = IF_TYPE_RKSFC;
-		boot_media = "spi flash";
+		boot_media = "nand"; /* kernel treat sfc nand as nand device */
 	} else {
 		/* Add new to support */
 	}

commit 083c304ab823e3a777ec4abd92f5e32e5bdcada8
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu May 10 16:59:35 2018 +0800

    rockchip: rkimg: add 'sd' type for storagemedia
    
    mmc1 is sd card in U-Boot.
    
    Change-Id: I9f57d0029dcf0af043bc6b7c2e184e6e02482d89
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 9e421a2175..2f95d75ea2 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -148,11 +148,13 @@ err:
 int get_bootdev_type(void)
 {
 	int type = 0;
+	ulong devnum = 0;
 	char *boot_media = NULL, *devtype = NULL;
 	char boot_options[128] = {0};
 	static int appended;
 
 	devtype = env_get("devtype");
+	devnum = env_get_ulong("devnum", 10, 0);
 
 	/* For current use(Only EMMC support!) */
 	if (!devtype) {
@@ -162,7 +164,10 @@ int get_bootdev_type(void)
 
 	if (!strcmp(devtype, "mmc")) {
 		type = IF_TYPE_MMC;
-		boot_media = "emmc";
+		if (devnum == 1)
+			boot_media = "sd";
+		else
+			boot_media = "emmc";
 	} else if (!strcmp(devtype, "rknand")) {
 		type = IF_TYPE_RKNAND;
 		boot_media = "nand";

commit 65bd6b6a61a5742a0f2ebe56dbba7448714e4583
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed May 23 20:51:38 2018 +0800

    configs: evb-rk3399: use CONFIG_ENV_IS_NOWHERE
    
    Change-Id: I870b3d18508946301183f4de4127727c86a8c778
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index 5cd17d2754..ccd490fbb2 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -38,7 +38,6 @@ CONFIG_CMD_TIME=y
 CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
-CONFIG_ENV_IS_IN_MMC=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
@@ -99,3 +98,4 @@ CONFIG_VIDEO_ROCKCHIP_MAX_YRES=1200
 CONFIG_DISPLAY_ROCKCHIP_MIPI=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_ERRNO_STR=y
+CONFIG_ENV_IS_NOWHERE=y

commit 5e8d3e945eaebb365ac0facbdeee7297ff3f9cfc
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed May 23 21:26:19 2018 +0800

    rockchip: evb-rk3328: use RKIMG_BOOTCOMMAND
    
    Change-Id: If56d53ff6c7eba3a32a868d63cf5b754c5291790
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/configs/evb_rk3328.h b/include/configs/evb_rk3328.h
index 93b18b8c46..87f2c9e21a 100644
--- a/include/configs/evb_rk3328.h
+++ b/include/configs/evb_rk3328.h
@@ -15,4 +15,9 @@
 
 #define CONFIG_CONSOLE_SCROLL_LINES		10
 
+#ifndef CONFIG_SPL_BUILD
+#undef CONFIG_BOOTCOMMAND
+#define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
+#endif
+
 #endif

commit fb345bf21fda070b3963c64466382a4910dceef2
Author: Shunqian Zheng <zhengsq@rock-chips.com>
Date:   Fri May 11 14:17:45 2018 +0800

    rockchip: add px3se evb board
    
    Add px3se evb board defconfig and dts.
    
    Change-Id: Ibd28b8ff74facf14209b3c563e2ee437226bd525
    Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>

diff --git a/arch/arm/dts/px3se-evb.dts b/arch/arm/dts/px3se-evb.dts
new file mode 100644
index 0000000000..b434b922f7
--- /dev/null
+++ b/arch/arm/dts/px3se-evb.dts
@@ -0,0 +1,73 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include "rk3128.dtsi"
+#include "rk3128-u-boot.dtsi"
+
+/ {
+	model = "Rockchip PX3SE Evaluation board";
+	compatible = "rockchip,px3se-evb", "rockchip,px3se";
+
+	chosen {
+		stdout-path = &uart1;
+	};
+
+	vcc50_otg: vcc50-otg {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc50_otg";
+		gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&otg_drv>;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+	};
+};
+
+&emmc {
+	fifo-mode;
+	status = "okay";
+};
+
+&u2phy {
+	status = "okay";
+};
+
+&u2phy_otg {
+	status = "okay";
+};
+
+&u2phy_host {
+	status = "okay";
+};
+
+&uart1 {
+	clock-frequency = <24000000>;
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&usb_host_ehci {
+	status = "okay";
+};
+
+&usb_host_ohci {
+	status = "okay";
+};
+
+&usb_otg {
+	vbus-supply = <&vcc50_otg>;
+	status = "okay";
+};
+
+&pinctrl {
+	usb_otg {
+		otg_drv: otg-drv {
+			rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};
diff --git a/configs/evb-px3se_defconfig b/configs/evb-px3se_defconfig
new file mode 100644
index 0000000000..791a90b2cd
--- /dev/null
+++ b/configs/evb-px3se_defconfig
@@ -0,0 +1,51 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_ROCKCHIP_RK3128=y
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_DEFAULT_DEVICE_TREE="px3se-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+# CONFIG_DISPLAY_CPUINFO is not set
+# CONFIG_FASTBOOT is not set
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_RKPARM_PARTITION=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PINCTRL=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_DEBUG_UART_BASE=0x20064000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x310c
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_ERRNO_STR=y

commit 783d9bcb613d5cd59dea86f3531bb120cfc93f27
Author: Shunqian Zheng <zhengsq@rock-chips.com>
Date:   Fri May 11 14:02:03 2018 +0800

    rockchip: dts: rk312x: Enable uart2 in dts instead of dtsi
    
    In most of case, uart2 is the cpu debug port, but there are boards
    that use the other uart as debug port.
    
    Enable uart2 is the job of specify dts, so moving it from
    rk3128-u-boot.dtsi.
    
    Change-Id: I9c2d071bf9edc18eef4c5753e69f769a3bbc0d7f
    Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>

diff --git a/arch/arm/dts/rk3126-bnd-d708.dts b/arch/arm/dts/rk3126-bnd-d708.dts
index a49504b5f1..c940b8d219 100644
--- a/arch/arm/dts/rk3126-bnd-d708.dts
+++ b/arch/arm/dts/rk3126-bnd-d708.dts
@@ -361,6 +361,12 @@
 	status = "okay";
 };
 
+&uart2 {
+	clock-frequency = <24000000>;
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 &usb_host_ehci {
 	status = "okay";
 };
diff --git a/arch/arm/dts/rk3126-evb.dts b/arch/arm/dts/rk3126-evb.dts
index 4982b82c17..b2cd3b73ea 100644
--- a/arch/arm/dts/rk3126-evb.dts
+++ b/arch/arm/dts/rk3126-evb.dts
@@ -350,6 +350,12 @@
 	status = "okay";
 };
 
+&uart2 {
+	clock-frequency = <24000000>;
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 &usb_host_ehci {
 	status = "okay";
 };
diff --git a/arch/arm/dts/rk3128-evb.dts b/arch/arm/dts/rk3128-evb.dts
index 9546bdad03..b6cee9b105 100644
--- a/arch/arm/dts/rk3128-evb.dts
+++ b/arch/arm/dts/rk3128-evb.dts
@@ -63,6 +63,12 @@
 	status = "okay";
 };
 
+&uart2 {
+	clock-frequency = <24000000>;
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 &usb_host_ehci {
 	status = "okay";
 };
diff --git a/arch/arm/dts/rk3128-u-boot.dtsi b/arch/arm/dts/rk3128-u-boot.dtsi
index 039aeef456..3b225ad16f 100644
--- a/arch/arm/dts/rk3128-u-boot.dtsi
+++ b/arch/arm/dts/rk3128-u-boot.dtsi
@@ -9,12 +9,6 @@
 	u-boot,dm-pre-reloc;
 };
 
-&uart2 {
-	clock-frequency = <24000000>;
-	u-boot,dm-pre-reloc;
-	status = "okay";
-};
-
 &emmc {
 	u-boot,dm-pre-reloc;
 };

commit 80fb8d2c3522ed3c9f6440f7b70f00de09a83de0
Author: Shunqian Zheng <zhengsq@rock-chips.com>
Date:   Wed May 16 16:46:22 2018 +0800

    Revert "rockchip: add px3se evb board support"
    
    Another px3se evb dts/config will upload instead.
    
    This reverts commit a5c82e2bba8b66cfb14dc945c7f97dddec92542c.
    
    Change-Id: Iad3878b1cb1feb032c14252a90a59fc3070dafff
    Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 50ebeba724..087b721eea 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -57,8 +57,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
 	rk3399-puma-ddr1333.dtb \
 	rk3399-puma-ddr1600.dtb \
 	rk3399-puma-ddr1866.dtb \
-	rv1108-evb.dtb	\
-	px3se-evb.dtb
+	rv1108-evb.dtb
 dtb-$(CONFIG_ARCH_MESON) += \
 	meson-gxbb-odroidc2.dtb
 dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
diff --git a/arch/arm/dts/px3se-evb.dts b/arch/arm/dts/px3se-evb.dts
deleted file mode 100644
index 9546bdad03..0000000000
--- a/arch/arm/dts/px3se-evb.dts
+++ /dev/null
@@ -1,96 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-/dts-v1/;
-
-#include "rk3128.dtsi"
-#include "rk3128-u-boot.dtsi"
-
-/ {
-	model = "Rockchip RK3128 Evaluation board";
-	compatible = "rockchip,rk3128-evb", "rockchip,rk3128";
-
-	chosen {
-		stdout-path = &uart2;
-	};
-
-	vcc5v0_otg: vcc5v0-otg-drv {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc5v0_otg";
-		gpio = <&gpio0 26 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&otg_vbus_drv>;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-	};
-
-	vcc5v0_host: vcc5v0-host-drv {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc5v0_host";
-		gpio = <&gpio2 23 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&host_vbus_drv>;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		regulator-always-on;
-	};
-};
-
-&i2c1 {
-	status = "okay";
-
-        hym8563: hym8563@51 {
-		compatible = "haoyu,hym8563";
-		reg = <0x51>;
-		#clock-cells = <0>;
-		clock-frequency = <32768>;
-		clock-output-names = "xin32k";
-	};
-};
-
-&u2phy {
-	status = "okay";
-};
-
-&u2phy_otg {
-	status = "okay";
-};
-
-&u2phy_host {
-	status = "okay";
-};
-
-&usb_host_ehci {
-	status = "okay";
-};
-
-&usb_host_ohci {
-	status = "okay";
-};
-
-&usb_otg {
-	vbus-supply = <&vcc5v0_otg>;
-	status = "okay";
-};
-
-&emmc {
-	fifo-mode;
-	status = "okay";
-};
-
-&pinctrl {
-	usb_otg {
-		otg_vbus_drv: otg-vbus-drv {
-			rockchip,pins = <0 26 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	usb_host {
-		host_vbus_drv: host-vbus-drv {
-			rockchip,pins = <2 23 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-};
diff --git a/configs/evb-px3se_defconfig b/configs/evb-px3se_defconfig
deleted file mode 100644
index 7ddc4932cd..0000000000
--- a/configs/evb-px3se_defconfig
+++ /dev/null
@@ -1,55 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_ROCKCHIP=y
-CONFIG_ROCKCHIP_RK3128=y
-CONFIG_DEFAULT_DEVICE_TREE="px3se-evb"
-CONFIG_DEBUG_UART=y
-CONFIG_FIT=y
-# CONFIG_DISPLAY_CPUINFO is not set
-CONFIG_FASTBOOT=y
-CONFIG_USB_FUNCTION_FASTBOOT=y
-CONFIG_CMD_FASTBOOT=y
-CONFIG_FASTBOOT_BUF_ADDR=0x60800800
-CONFIG_FASTBOOT_BUF_SIZE=0x04000000
-CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=0
-# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_TIME=y
-CONFIG_REGMAP=y
-CONFIG_SYSCON=y
-CONFIG_CLK=y
-CONFIG_ROCKCHIP_GPIO=y
-CONFIG_SYS_I2C_ROCKCHIP=y
-CONFIG_MMC_DW=y
-CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_PHY=y
-CONFIG_PHY_ROCKCHIP_INNO_USB2=y
-CONFIG_PINCTRL=y
-CONFIG_REGULATOR_PWM=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_RAM=y
-CONFIG_DM_RESET=y
-CONFIG_DEBUG_UART_BASE=0x20068000
-CONFIG_DEBUG_UART_CLOCK=24000000
-CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_SYS_NS16550=y
-CONFIG_SYSRESET=y
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_GENERIC=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_OHCI_GENERIC=y
-CONFIG_USB_DWC2=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_DWC2_OTG=y
-CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x310c
-CONFIG_USE_TINY_PRINTF=y
-CONFIG_ERRNO_STR=y
diff --git a/make.sh b/make.sh
index 3551d27b93..62419d277a 100755
--- a/make.sh
+++ b/make.sh
@@ -2,9 +2,8 @@
 set -e
 BOARD=$1
 SUBCMD=$2
-RKTRUST_CHIP=${BOARD##*-}
-RKTRUST_CHIP=$(echo ${RKTRUST_CHIP} | tr '[a-z]' '[A-Z]')
-RKBOOT_CHIP=$RKTRUST_CHIP
+RKCHIP=${BOARD##*-}
+RKCHIP=$(echo ${RKCHIP} | tr '[a-z]' '[A-Z]')
 JOB=`sed -n "N;/processor/p" /proc/cpuinfo|wc -l`
 SUPPROT_LIST=`ls configs/*-r[v,k][0-9][0-9][0-9][0-9]_defconfig`
 
@@ -130,12 +129,8 @@ sub_commands()
 
 fixup_chip_name()
 {
-	if [ "$RKTRUST_CHIP" = 'RK3228' -o "$RKTRUST_CHIP" = 'RK3229' ]; then
-		RKBOOT_CHIP=RK322X
-		RKTRUST_CHIP=RK322X
-	elif [ "$RKTRUST_CHIP" = 'PX3SE' ]; then
-		RKBOOT_CHIP=PX3SE
-		RKTRUST_CHIP=RK3126
+	if [ "$RKCHIP" = 'RK3228' -o "$RKCHIP" = 'RK3229' ]; then
+		RKCHIP=RK322X
 	fi
 }
 
@@ -159,26 +154,26 @@ pack_uboot_image()
 
 pack_loader_image()
 {
-	if [ ! -f ${RKBIN}/RKBOOT/${RKBOOT_CHIP}MINIALL.ini ]; then
-		echo "pack loader failed! Can't find: ${RKBIN}/RKBOOT/${RKBOOT_CHIP}MINIALL.ini"
+	if [ ! -f ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini ]; then
+		echo "pack loader failed! Can't find: ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini"
 		return
 	fi
 
 	cd ${RKBIN}
-	${TOOLCHAIN_RKBIN}/boot_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKBOOT/${RKBOOT_CHIP}MINIALL.ini
+	${TOOLCHAIN_RKBIN}/boot_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini
 	cd -
 	mv ${RKBIN}/*_loader_*.bin ./
-	echo "pack loader okay! Input: ${RKBIN}/RKBOOT/${RKBOOT_CHIP}MINIALL.ini"
+	echo "pack loader okay! Input: ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini"
 }
 
 pack_mass_trust_image()
 {
 	local TOS0 TOS1 IMG0 IMG1 DARM_BASE TEE_LOAD_ADDR TEE_OFFSET=0x8400000
 
-	TOS0=`sed -n "/TOS0=/s/TOS0=//p" ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini|tr -d '\r'`
-	TOS1=`sed -n "/TOS1=/s/TOS1=//p" ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini|tr -d '\r'`
-	IMG0=`sed -n "/PATH0=/s/PATH0=//p" ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini|tr -d '\r'`
-	IMG1=`sed -n "/PATH1=/s/PATH1=//p" ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini|tr -d '\r'`
+	TOS0=`sed -n "/TOS0=/s/TOS0=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
+	TOS1=`sed -n "/TOS1=/s/TOS1=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
+	IMG0=`sed -n "/PATH0=/s/PATH0=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
+	IMG1=`sed -n "/PATH1=/s/PATH1=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
 
 # OP-TEE is 132M(0x8400000) offset from DRAM base.
 	DARM_BASE=`sed -n "/CONFIG_SYS_SDRAM_BASE=/s/CONFIG_SYS_SDRAM_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
@@ -188,10 +183,10 @@ pack_mass_trust_image()
 	TEE_LOAD_ADDR=$(echo "obase=16;${TEE_LOAD_ADDR}"|bc)
 
 # Parse orignal path
-	TOS0=`sed -n "/TOS0=/s/TOS0=//p" ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini|tr -d '\r'`
-	TOS1=`sed -n "/TOS1=/s/TOS1=//p" ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini|tr -d '\r'`
-	IMG0=`sed -n "/PATH0=/s/PATH0=//p" ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini|tr -d '\r'`
-	IMG1=`sed -n "/PATH1=/s/PATH1=//p" ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini|tr -d '\r'`
+	TOS0=`sed -n "/TOS0=/s/TOS0=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
+	TOS1=`sed -n "/TOS1=/s/TOS1=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
+	IMG0=`sed -n "/PATH0=/s/PATH0=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
+	IMG1=`sed -n "/PATH1=/s/PATH1=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
 
 # replace "./tools/rk_tools/" with "./" to compatible legacy ini content of rkdevelop branch
 	TOS0=$(echo ${TOS0} | sed "s/tools\/rk_tools\//\.\//g")
@@ -218,30 +213,30 @@ pack_trust_image()
 
 	# ARM64 uses trust_merger
 	if grep  -q '^CONFIG_ARM64=y' ${OUTDIR}/.config ; then
-		if [ ! -f ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TRUST.ini ]; then
-			echo "pack trust failed! Can't find: ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TRUST.ini"
+		if [ ! -f ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini ]; then
+			echo "pack trust failed! Can't find: ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini"
 			return
 		fi
 
 		cd ${RKBIN}
 
 		# RK3308/PX30/RK3326 use RSA-PKCS1 V2.1, it's pack magic is "3"
-		if [ $RKTRUST_CHIP = "PX30" -o $RKTRUST_CHIP = "RK3326" -o $RKTRUST_CHIP = "RK3308" ]; then
-			${TOOLCHAIN_RKBIN}/trust_merger --rsa 3 --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TRUST.ini
+		if [ $RKCHIP = "PX30" -o $RKCHIP = "RK3326" -o $RKCHIP = "RK3308" ]; then
+			${TOOLCHAIN_RKBIN}/trust_merger --rsa 3 --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini
 		# RK3368 use rk big endian SHA256, it's pack magic is "2"
-		elif [ $RKTRUST_CHIP = "RK3368" ]; then
-			${TOOLCHAIN_RKBIN}/trust_merger --sha 2 --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TRUST.ini
+		elif [ $RKCHIP = "RK3368" ]; then
+			${TOOLCHAIN_RKBIN}/trust_merger --sha 2 --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini
 		else
-			${TOOLCHAIN_RKBIN}/trust_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TRUST.ini
+			${TOOLCHAIN_RKBIN}/trust_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini
 		fi
 
 		cd -
 		mv ${RKBIN}/trust.img ./trust.img
-		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TRUST.ini"
+		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini"
 	# ARM uses loaderimage
 	else
-		if [ ! -f ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini ]; then
-			echo "pack trust failed! Can't find: ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini"
+		if [ ! -f ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini ]; then
+			echo "pack trust failed! Can't find: ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini"
 			return
 		fi
 
@@ -253,8 +248,8 @@ pack_trust_image()
 		TEE_LOAD_ADDR=$(echo "obase=16;${TEE_LOAD_ADDR}"|bc)
 
 		# Parse orignal path
-		TOS=`sed -n "/TOS=/s/TOS=//p" ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini|tr -d '\r'`
-		TOS_TA=`sed -n "/TOSTA=/s/TOSTA=//p" ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini|tr -d '\r'`
+		TOS=`sed -n "/TOS=/s/TOS=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
+		TOS_TA=`sed -n "/TOSTA=/s/TOSTA=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
 
 		# replace "./tools/rk_tools/" with "./" to compatible legacy ini content of rkdevelop branch
 		TOS=$(echo ${TOS} | sed "s/tools\/rk_tools\//\.\//g")
@@ -275,7 +270,7 @@ pack_trust_image()
 			pack_mass_trust_image
 		fi
 
-		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini"
+		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini"
 	fi
 }
 

commit 328b7e77a21a34b046eaf9a7cf41c7d7c1a82047
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Thu May 10 19:59:25 2018 +0800

    Makefile: clean generated bin file when run make clean
    
    We may generate loader bin file like rkxxx_loader_xxx.bin
    by make.sh. It's better to clean it when run make clean
    command.
    
    Change-Id: Ic5347f1fac74c2d38c2922c7e704d892da0dce1f
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/Makefile b/Makefile
index a1b28de1ef..f81ac1f9f9 100644
--- a/Makefile
+++ b/Makefile
@@ -1488,7 +1488,7 @@ CLEAN_DIRS  += $(MODVERDIR) \
 			$(filter-out include, $(shell ls -1 $d 2>/dev/null))))
 
 CLEAN_FILES += include/bmp_logo.h include/bmp_logo_data.h \
-	       boot* u-boot* MLO* SPL System.map fit-dtb.blob
+	       boot* u-boot* MLO* SPL System.map fit-dtb.blob *.bin
 
 # Directories & files removed with 'make mrproper'
 MRPROPER_DIRS  += include/config include/generated spl tpl \

commit 154ef777074cea23d58a095100750f6b3be0a3d0
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Thu May 17 14:30:01 2018 +0800

    video/drm: lvds: default bypass rgb data sync on px30
    
    Change-Id: Ic1a8590da16dcc68fe457a9bc011e40e64298c75
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index 3f73573525..4d221bdf5f 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -220,7 +220,7 @@ static void px30_output_ttl(struct display_state *state)
 	u32 val = 0;
 
 	/* enable lvds mode */
-	val = PX30_LVDS_PHY_MODE(0) | PX30_DPHY_FORCERXMODE(1);
+	val = PX30_RGB_SYNC_BYPASS(1) | PX30_DPHY_FORCERXMODE(1);
 	writel(val, lvds->grf + PX30_GRF_PD_VO_CON1);
 
 	/* enable lane */
diff --git a/drivers/video/drm/rockchip_lvds.h b/drivers/video/drm/rockchip_lvds.h
index 339a04dc3a..a77db720e7 100644
--- a/drivers/video/drm/rockchip_lvds.h
+++ b/drivers/video/drm/rockchip_lvds.h
@@ -118,6 +118,8 @@
 #define PX30_LVDS_PHY_MODE(x)		(BITS_MASK(x, 0x1, 12) | BITS_EN(0x1, 12))
 #define PX30_LVDS_MSBSEL(x)		(BITS_MASK(x, 0x1, 11) | BITS_EN(0x1, 11))
 #define PX30_DPHY_FORCERXMODE(x)	(BITS_MASK(x, 0x1,  6) | BITS_EN(0x1,  6))
+#define PX30_LCDC_DCLK_INV(x)		(BITS_MASK(x, 0x1,  4) | BITS_EN(0x1,  4))
+#define PX30_RGB_SYNC_BYPASS(x)		(BITS_MASK(x, 0x1,  3) | BITS_EN(0x1,  3))
 #define PX30_RGB_VOP_SEL(x)		(BITS_MASK(x, 0x1,  2) | BITS_EN(0x1,  2))
 #define PX30_LVDS_VOP_SEL(x)		(BITS_MASK(x, 0x1,  1) | BITS_EN(0x1,  1))
 

commit f3f5bcc0a3b0a968b769e215810a09960d4bb418
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Thu May 17 16:05:28 2018 +0800

    video/drm: lvds: set clock lane enable for ttl mode
    
    Change-Id: I8881fa649d6c3108cbd2a9aa75881adc8fd1eaf2
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index 4f3c0af80b..3f73573525 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -196,6 +196,9 @@ static int rk336x_lvds_pwr_on(struct display_state *state)
 		lvds_msk_reg(lvds, MIPIPHY_REGE3,
 			     m_MIPI_EN | m_LVDS_EN | m_TTL_EN,
 			     v_MIPI_EN(0) | v_LVDS_EN(0) | v_TTL_EN(1));
+
+		/* set clock lane enable */
+		lvds_ctrl_writel(lvds, 0xa0, 0x4);
 	}
 	/* delay for waitting pll lock on */
 	while (delay_times--) {

commit a5c82e2bba8b66cfb14dc945c7f97dddec92542c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed May 16 10:51:42 2018 +0800

    rockchip: add px3se evb board support
    
    Change-Id: If1ab2bc8f166833ea882a0d4d134eb5c05151462
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 087b721eea..50ebeba724 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -57,7 +57,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
 	rk3399-puma-ddr1333.dtb \
 	rk3399-puma-ddr1600.dtb \
 	rk3399-puma-ddr1866.dtb \
-	rv1108-evb.dtb
+	rv1108-evb.dtb	\
+	px3se-evb.dtb
 dtb-$(CONFIG_ARCH_MESON) += \
 	meson-gxbb-odroidc2.dtb
 dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
diff --git a/arch/arm/dts/px3se-evb.dts b/arch/arm/dts/px3se-evb.dts
new file mode 100644
index 0000000000..9546bdad03
--- /dev/null
+++ b/arch/arm/dts/px3se-evb.dts
@@ -0,0 +1,96 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include "rk3128.dtsi"
+#include "rk3128-u-boot.dtsi"
+
+/ {
+	model = "Rockchip RK3128 Evaluation board";
+	compatible = "rockchip,rk3128-evb", "rockchip,rk3128";
+
+	chosen {
+		stdout-path = &uart2;
+	};
+
+	vcc5v0_otg: vcc5v0-otg-drv {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc5v0_otg";
+		gpio = <&gpio0 26 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&otg_vbus_drv>;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+	};
+
+	vcc5v0_host: vcc5v0-host-drv {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc5v0_host";
+		gpio = <&gpio2 23 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&host_vbus_drv>;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+	};
+};
+
+&i2c1 {
+	status = "okay";
+
+        hym8563: hym8563@51 {
+		compatible = "haoyu,hym8563";
+		reg = <0x51>;
+		#clock-cells = <0>;
+		clock-frequency = <32768>;
+		clock-output-names = "xin32k";
+	};
+};
+
+&u2phy {
+	status = "okay";
+};
+
+&u2phy_otg {
+	status = "okay";
+};
+
+&u2phy_host {
+	status = "okay";
+};
+
+&usb_host_ehci {
+	status = "okay";
+};
+
+&usb_host_ohci {
+	status = "okay";
+};
+
+&usb_otg {
+	vbus-supply = <&vcc5v0_otg>;
+	status = "okay";
+};
+
+&emmc {
+	fifo-mode;
+	status = "okay";
+};
+
+&pinctrl {
+	usb_otg {
+		otg_vbus_drv: otg-vbus-drv {
+			rockchip,pins = <0 26 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	usb_host {
+		host_vbus_drv: host-vbus-drv {
+			rockchip,pins = <2 23 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};
diff --git a/configs/evb-px3se_defconfig b/configs/evb-px3se_defconfig
new file mode 100644
index 0000000000..7ddc4932cd
--- /dev/null
+++ b/configs/evb-px3se_defconfig
@@ -0,0 +1,55 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_ROCKCHIP_RK3128=y
+CONFIG_DEFAULT_DEVICE_TREE="px3se-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_FASTBOOT=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_CMD_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x60800800
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PINCTRL=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_DEBUG_UART_BASE=0x20068000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x310c
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_ERRNO_STR=y
diff --git a/make.sh b/make.sh
index 62419d277a..3551d27b93 100755
--- a/make.sh
+++ b/make.sh
@@ -2,8 +2,9 @@
 set -e
 BOARD=$1
 SUBCMD=$2
-RKCHIP=${BOARD##*-}
-RKCHIP=$(echo ${RKCHIP} | tr '[a-z]' '[A-Z]')
+RKTRUST_CHIP=${BOARD##*-}
+RKTRUST_CHIP=$(echo ${RKTRUST_CHIP} | tr '[a-z]' '[A-Z]')
+RKBOOT_CHIP=$RKTRUST_CHIP
 JOB=`sed -n "N;/processor/p" /proc/cpuinfo|wc -l`
 SUPPROT_LIST=`ls configs/*-r[v,k][0-9][0-9][0-9][0-9]_defconfig`
 
@@ -129,8 +130,12 @@ sub_commands()
 
 fixup_chip_name()
 {
-	if [ "$RKCHIP" = 'RK3228' -o "$RKCHIP" = 'RK3229' ]; then
-		RKCHIP=RK322X
+	if [ "$RKTRUST_CHIP" = 'RK3228' -o "$RKTRUST_CHIP" = 'RK3229' ]; then
+		RKBOOT_CHIP=RK322X
+		RKTRUST_CHIP=RK322X
+	elif [ "$RKTRUST_CHIP" = 'PX3SE' ]; then
+		RKBOOT_CHIP=PX3SE
+		RKTRUST_CHIP=RK3126
 	fi
 }
 
@@ -154,26 +159,26 @@ pack_uboot_image()
 
 pack_loader_image()
 {
-	if [ ! -f ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini ]; then
-		echo "pack loader failed! Can't find: ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini"
+	if [ ! -f ${RKBIN}/RKBOOT/${RKBOOT_CHIP}MINIALL.ini ]; then
+		echo "pack loader failed! Can't find: ${RKBIN}/RKBOOT/${RKBOOT_CHIP}MINIALL.ini"
 		return
 	fi
 
 	cd ${RKBIN}
-	${TOOLCHAIN_RKBIN}/boot_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini
+	${TOOLCHAIN_RKBIN}/boot_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKBOOT/${RKBOOT_CHIP}MINIALL.ini
 	cd -
 	mv ${RKBIN}/*_loader_*.bin ./
-	echo "pack loader okay! Input: ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini"
+	echo "pack loader okay! Input: ${RKBIN}/RKBOOT/${RKBOOT_CHIP}MINIALL.ini"
 }
 
 pack_mass_trust_image()
 {
 	local TOS0 TOS1 IMG0 IMG1 DARM_BASE TEE_LOAD_ADDR TEE_OFFSET=0x8400000
 
-	TOS0=`sed -n "/TOS0=/s/TOS0=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
-	TOS1=`sed -n "/TOS1=/s/TOS1=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
-	IMG0=`sed -n "/PATH0=/s/PATH0=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
-	IMG1=`sed -n "/PATH1=/s/PATH1=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
+	TOS0=`sed -n "/TOS0=/s/TOS0=//p" ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini|tr -d '\r'`
+	TOS1=`sed -n "/TOS1=/s/TOS1=//p" ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini|tr -d '\r'`
+	IMG0=`sed -n "/PATH0=/s/PATH0=//p" ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini|tr -d '\r'`
+	IMG1=`sed -n "/PATH1=/s/PATH1=//p" ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini|tr -d '\r'`
 
 # OP-TEE is 132M(0x8400000) offset from DRAM base.
 	DARM_BASE=`sed -n "/CONFIG_SYS_SDRAM_BASE=/s/CONFIG_SYS_SDRAM_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
@@ -183,10 +188,10 @@ pack_mass_trust_image()
 	TEE_LOAD_ADDR=$(echo "obase=16;${TEE_LOAD_ADDR}"|bc)
 
 # Parse orignal path
-	TOS0=`sed -n "/TOS0=/s/TOS0=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
-	TOS1=`sed -n "/TOS1=/s/TOS1=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
-	IMG0=`sed -n "/PATH0=/s/PATH0=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
-	IMG1=`sed -n "/PATH1=/s/PATH1=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
+	TOS0=`sed -n "/TOS0=/s/TOS0=//p" ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini|tr -d '\r'`
+	TOS1=`sed -n "/TOS1=/s/TOS1=//p" ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini|tr -d '\r'`
+	IMG0=`sed -n "/PATH0=/s/PATH0=//p" ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini|tr -d '\r'`
+	IMG1=`sed -n "/PATH1=/s/PATH1=//p" ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini|tr -d '\r'`
 
 # replace "./tools/rk_tools/" with "./" to compatible legacy ini content of rkdevelop branch
 	TOS0=$(echo ${TOS0} | sed "s/tools\/rk_tools\//\.\//g")
@@ -213,30 +218,30 @@ pack_trust_image()
 
 	# ARM64 uses trust_merger
 	if grep  -q '^CONFIG_ARM64=y' ${OUTDIR}/.config ; then
-		if [ ! -f ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini ]; then
-			echo "pack trust failed! Can't find: ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini"
+		if [ ! -f ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TRUST.ini ]; then
+			echo "pack trust failed! Can't find: ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TRUST.ini"
 			return
 		fi
 
 		cd ${RKBIN}
 
 		# RK3308/PX30/RK3326 use RSA-PKCS1 V2.1, it's pack magic is "3"
-		if [ $RKCHIP = "PX30" -o $RKCHIP = "RK3326" -o $RKCHIP = "RK3308" ]; then
-			${TOOLCHAIN_RKBIN}/trust_merger --rsa 3 --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini
+		if [ $RKTRUST_CHIP = "PX30" -o $RKTRUST_CHIP = "RK3326" -o $RKTRUST_CHIP = "RK3308" ]; then
+			${TOOLCHAIN_RKBIN}/trust_merger --rsa 3 --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TRUST.ini
 		# RK3368 use rk big endian SHA256, it's pack magic is "2"
-		elif [ $RKCHIP = "RK3368" ]; then
-			${TOOLCHAIN_RKBIN}/trust_merger --sha 2 --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini
+		elif [ $RKTRUST_CHIP = "RK3368" ]; then
+			${TOOLCHAIN_RKBIN}/trust_merger --sha 2 --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TRUST.ini
 		else
-			${TOOLCHAIN_RKBIN}/trust_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini
+			${TOOLCHAIN_RKBIN}/trust_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TRUST.ini
 		fi
 
 		cd -
 		mv ${RKBIN}/trust.img ./trust.img
-		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini"
+		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TRUST.ini"
 	# ARM uses loaderimage
 	else
-		if [ ! -f ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini ]; then
-			echo "pack trust failed! Can't find: ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini"
+		if [ ! -f ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini ]; then
+			echo "pack trust failed! Can't find: ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini"
 			return
 		fi
 
@@ -248,8 +253,8 @@ pack_trust_image()
 		TEE_LOAD_ADDR=$(echo "obase=16;${TEE_LOAD_ADDR}"|bc)
 
 		# Parse orignal path
-		TOS=`sed -n "/TOS=/s/TOS=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
-		TOS_TA=`sed -n "/TOSTA=/s/TOSTA=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
+		TOS=`sed -n "/TOS=/s/TOS=//p" ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini|tr -d '\r'`
+		TOS_TA=`sed -n "/TOSTA=/s/TOSTA=//p" ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini|tr -d '\r'`
 
 		# replace "./tools/rk_tools/" with "./" to compatible legacy ini content of rkdevelop branch
 		TOS=$(echo ${TOS} | sed "s/tools\/rk_tools\//\.\//g")
@@ -270,7 +275,7 @@ pack_trust_image()
 			pack_mass_trust_image
 		fi
 
-		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini"
+		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini"
 	fi
 }
 

commit b45ec7ccd833efcd005fe4a9630a532d0341cf65
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon May 14 17:28:03 2018 +0800

    make.sh: support rk312x trust.img pack
    
    generate both trust_nand.img and trust_emmc.img
    
    Change-Id: I736679f1544d1804487995d6eafbc876bec78bbe
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 53d993ecf9..62419d277a 100755
--- a/make.sh
+++ b/make.sh
@@ -166,6 +166,47 @@ pack_loader_image()
 	echo "pack loader okay! Input: ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini"
 }
 
+pack_mass_trust_image()
+{
+	local TOS0 TOS1 IMG0 IMG1 DARM_BASE TEE_LOAD_ADDR TEE_OFFSET=0x8400000
+
+	TOS0=`sed -n "/TOS0=/s/TOS0=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
+	TOS1=`sed -n "/TOS1=/s/TOS1=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
+	IMG0=`sed -n "/PATH0=/s/PATH0=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
+	IMG1=`sed -n "/PATH1=/s/PATH1=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
+
+# OP-TEE is 132M(0x8400000) offset from DRAM base.
+	DARM_BASE=`sed -n "/CONFIG_SYS_SDRAM_BASE=/s/CONFIG_SYS_SDRAM_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
+	TEE_LOAD_ADDR=$((DARM_BASE+TEE_OFFSET))
+
+# Convert Dec to Hex
+	TEE_LOAD_ADDR=$(echo "obase=16;${TEE_LOAD_ADDR}"|bc)
+
+# Parse orignal path
+	TOS0=`sed -n "/TOS0=/s/TOS0=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
+	TOS1=`sed -n "/TOS1=/s/TOS1=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
+	IMG0=`sed -n "/PATH0=/s/PATH0=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
+	IMG1=`sed -n "/PATH1=/s/PATH1=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
+
+# replace "./tools/rk_tools/" with "./" to compatible legacy ini content of rkdevelop branch
+	TOS0=$(echo ${TOS0} | sed "s/tools\/rk_tools\//\.\//g")
+	TOS1=$(echo ${TOS1} | sed "s/tools\/rk_tools\//\.\//g")
+
+	if [ "$TOS0" ]; then
+		${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS0} ./${IMG0} ${TEE_LOAD_ADDR}
+		echo "${IMG0} is ready"
+	fi
+
+	if [ "$TOS1" ]; then
+		${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS1} ./${IMG1} ${TEE_LOAD_ADDR}
+		echo "${IMG1} is ready"
+	fi
+
+	if [ -z "$TOS0" -a -z "$TOS1" ]; then
+		echo "pack trust failed! Can't find any tee bin"
+	fi
+}
+
 pack_trust_image()
 {
 	local TOS TOS_TA DARM_BASE TEE_LOAD_ADDR TEE_OFFSET=0x8400000
@@ -214,7 +255,7 @@ pack_trust_image()
 		TOS=$(echo ${TOS} | sed "s/tools\/rk_tools\//\.\//g")
 		TOS_TA=$(echo ${TOS_TA} | sed "s/tools\/rk_tools\//\.\//g")
 
-		if [ $TOS_TA -a $TOS ]; then
+		if [ "$TOS_TA" -a "$TOS" ]; then
 			${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS} ./trust.img ${TEE_LOAD_ADDR}
 			${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ./trust_with_ta.img ${TEE_LOAD_ADDR}
 			echo "Both trust.img and trust_with_ta.img are ready"
@@ -225,8 +266,8 @@ pack_trust_image()
 			${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ./trust.img ${TEE_LOAD_ADDR}
 			echo "trust.img with ta is ready"
 		else
-			echo "Can't find any tee bin"
-			exit 1
+			# Only RK312X need it to pack trust_emmc.img trust_nand.img
+			pack_mass_trust_image
 		fi
 
 		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini"

commit 3929c02703ced13f754fcb7e3576fd0892831c92
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 2 15:13:54 2018 +0800

    dm: pmic: add child node status verify
    
    Ignore disabled child node when bind driver
    
    Change-Id: Ib817bf643efa6c8511d4619993444dddaac7d6bd
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/pmic/pmic-uclass.c b/drivers/power/pmic/pmic-uclass.c
index 5fb1ef5e60..8ef0d8bc71 100644
--- a/drivers/power/pmic/pmic-uclass.c
+++ b/drivers/power/pmic/pmic-uclass.c
@@ -13,6 +13,7 @@
 #include <dm/lists.h>
 #include <dm/device-internal.h>
 #include <dm/uclass-internal.h>
+#include <dm/of_access.h>
 #include <power/pmic.h>
 #include <linux/ctype.h>
 
@@ -31,6 +32,7 @@ int pmic_bind_children(struct udevice *pmic, ofnode parent,
 	ofnode node;
 	int prefix_len;
 	int ret;
+	bool enable;
 
 	debug("%s for '%s' at node offset: %d\n", __func__, pmic->name,
 	      dev_of_offset(pmic));
@@ -40,6 +42,16 @@ int pmic_bind_children(struct udevice *pmic, ofnode parent,
 
 		debug("* Found child node: '%s'\n", node_name);
 
+		if (ofnode_is_np(node))
+			enable = of_device_is_available(ofnode_to_np(node));
+		else
+			enable = fdtdec_get_is_enabled(gd->fdt_blob,
+						       ofnode_to_offset(node));
+		if (!enable) {
+			debug("* But '%s' is disabled\n", node_name);
+			continue;
+		}
+
 		child = NULL;
 		for (info = child_info; info->prefix && info->driver; info++) {
 			debug("  - compatible prefix: '%s'\n", info->prefix);

commit ad3a6a15738d38c546791ef0d23db6e5156f1d92
Author: Caesar Wang <wxt@rock-chips.com>
Date:   Wed May 16 14:40:52 2018 +0800

    config: firefly-rk3399: support android boot image
    
    The boot.img will instead of the kernel.img and resource.img on linux
    platform.
    
    Change-Id: I392beb9b79b8c6c1a8974e70f7f0b3be43f42692
    Signed-off-by: Caesar Wang <wxt@rock-chips.com>

diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
index fd655a0f32..f0931266aa 100644
--- a/configs/firefly-rk3399_defconfig
+++ b/configs/firefly-rk3399_defconfig
@@ -9,11 +9,12 @@ CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3399-firefly"
 CONFIG_DEBUG_UART=y
-# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_FIT=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
 CONFIG_SPL_ATF=y
@@ -25,6 +26,8 @@ CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

commit 7f3c4f741c2880a831b4d7b6b0fcc5480158af1b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 11 11:05:13 2018 +0800

    make.sh: use rk big endian SHA256 for rk3368 trust.img pack
    
    rk big endian sha256 pack magic is "2", so use "--sha 2" subcmd
    
    Change-Id: I1a31712f808aaff7f9213ea6f1a7ca15fe3012c2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 51dfb3f4ff..53d993ecf9 100755
--- a/make.sh
+++ b/make.sh
@@ -182,6 +182,9 @@ pack_trust_image()
 		# RK3308/PX30/RK3326 use RSA-PKCS1 V2.1, it's pack magic is "3"
 		if [ $RKCHIP = "PX30" -o $RKCHIP = "RK3326" -o $RKCHIP = "RK3308" ]; then
 			${TOOLCHAIN_RKBIN}/trust_merger --rsa 3 --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini
+		# RK3368 use rk big endian SHA256, it's pack magic is "2"
+		elif [ $RKCHIP = "RK3368" ]; then
+			${TOOLCHAIN_RKBIN}/trust_merger --sha 2 --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini
 		else
 			${TOOLCHAIN_RKBIN}/trust_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini
 		fi

commit e5e978b341e471aa1cbedf1c00fcae9dd41e4ff6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu May 10 16:16:46 2018 +0800

    make.sh: use RSA PKCS1 V2.1 for RK3308/PX30/RK3326 trust.img pack
    
    RSA PKCS1 V2.1 pack magic is "3", so use "--rsa 3" subcmd
    
    Change-Id: Ic35445445121d765385f5cf9673473b061633a3a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 0366d4cbde..51dfb3f4ff 100755
--- a/make.sh
+++ b/make.sh
@@ -178,7 +178,14 @@ pack_trust_image()
 		fi
 
 		cd ${RKBIN}
-		${TOOLCHAIN_RKBIN}/trust_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini
+
+		# RK3308/PX30/RK3326 use RSA-PKCS1 V2.1, it's pack magic is "3"
+		if [ $RKCHIP = "PX30" -o $RKCHIP = "RK3326" -o $RKCHIP = "RK3308" ]; then
+			${TOOLCHAIN_RKBIN}/trust_merger --rsa 3 --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini
+		else
+			${TOOLCHAIN_RKBIN}/trust_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini
+		fi
+
 		cd -
 		mv ${RKBIN}/trust.img ./trust.img
 		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini"

commit 78b2d46dbc94ac6efa706a2e41b9966dfe734d40
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu May 3 20:07:45 2018 +0800

    rockchip: px30: enable all gpio in pre-reloc
    
    support muilt dtb dynamically loading by gpio value,
    set status disabled, we just want its property.
    
    Change-Id: Ic636c9f42e5e3bc134e29f06d124644b7e5a3349
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/px30-u-boot.dtsi b/arch/arm/dts/px30-u-boot.dtsi
index 1372da433c..0204cede7b 100644
--- a/arch/arm/dts/px30-u-boot.dtsi
+++ b/arch/arm/dts/px30-u-boot.dtsi
@@ -42,3 +42,23 @@
 	u-boot,dm-pre-reloc;
 	status = "okay";
 };
+
+&gpio0 {
+	u-boot,dm-pre-reloc;
+	status = "disabled";
+};
+
+&gpio1 {
+	u-boot,dm-pre-reloc;
+	status = "disabled";
+};
+
+&gpio2 {
+	u-boot,dm-pre-reloc;
+	status = "disabled";
+};
+
+&gpio3 {
+	u-boot,dm-pre-reloc;
+	status = "disabled";
+};

commit 73f99ea810566e73bfb31c7196ce303b098c8260
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu May 3 20:06:03 2018 +0800

    rockchip: dts: px30: enable saradc in pre-reloc
    
    support multi dtb dynamically loading by adc value.
    
    Change-Id: I12ec2a32e4055c2ccfc999d7ab3b3d209db12242
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/px30-u-boot.dtsi b/arch/arm/dts/px30-u-boot.dtsi
index 1a113cbff6..1372da433c 100644
--- a/arch/arm/dts/px30-u-boot.dtsi
+++ b/arch/arm/dts/px30-u-boot.dtsi
@@ -37,3 +37,8 @@
 &cru {
 	u-boot,dm-pre-reloc;
 };
+
+&saradc {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};

commit 740107bb19724c07d85af578139cd5aa9b00a2bd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu May 3 19:52:53 2018 +0800

    rockchip: support alternative kernel dtb depends on adc/gpio
    
    1. support adc value recognize;
    2. support gpio value recognize;
    
    Change-Id: I8bcbdd914405184d46029c4995c09b09e36c7ea3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/resource_img.h b/arch/arm/include/asm/arch-rockchip/resource_img.h
index 0e4ea83fe9..b90ae272de 100644
--- a/arch/arm/include/asm/arch-rockchip/resource_img.h
+++ b/arch/arm/include/asm/arch-rockchip/resource_img.h
@@ -18,4 +18,5 @@ int rockchip_read_resource_file(void *buf, const char *name,
 				int offset, int len);
 int rockchip_get_resource_file(void *buf, const char *name);
 
+int rockchip_read_dtb_file(void *fdt_addr);
 #endif
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index b1521e88b5..b9e4f6d6bf 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -103,7 +103,7 @@ int board_late_init(void)
 
 #ifdef CONFIG_USING_KERNEL_DTB
 #include <asm/arch/resource_img.h>
-#define DTB_FILE                        "rk-kernel.dtb"
+
 int init_kernel_dtb(void)
 {
 	int ret = 0;
@@ -137,7 +137,7 @@ init_dtb:
 		return -1;
 	}
 
-	ret = rockchip_read_resource_file((void *)fdt_addr, DTB_FILE, 0, 0);
+	ret = rockchip_read_dtb_file((void *)fdt_addr);
 	if (ret < 0) {
 		printf("%s dtb in resource read fail\n", __func__);
 		return 0;
diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 62db314389..0766f15bcc 100644
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -4,10 +4,13 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 #include <common.h>
+#include <adc.h>
+#include <asm/io.h>
 #include <malloc.h>
 #include <linux/list.h>
 #include <asm/arch/resource_img.h>
 #include <boot_rkimg.h>
+#include <dm/ofnode.h>
 #ifdef CONFIG_ANDROID_AB
 #include <android_avb/libavb_ab.h>
 #include <android_avb/rk_avb_ops_user.h>
@@ -17,6 +20,8 @@
 #include <android_image.h>
 #endif
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #define PART_RESOURCE			"resource"
 #define RESOURCE_MAGIC			"RSCE"
 #define RESOURCE_MAGIC_SIZE		4
@@ -330,3 +335,239 @@ int rockchip_read_resource_file(void *buf, const char *name,
 
 	return ret;
 }
+
+#define is_digit(c)		((c) >= '0' && (c) <= '9')
+#define is_abcd(c)		((c) >= 'a' && (c) <= 'd')
+#define is_equal(c)		((c) == '=')
+
+#define DTB_FILE		"rk-kernel.dtb"
+#define KEY_WORDS_ADC_CTRL	"#_"
+#define KEY_WORDS_ADC_CH	"_ch"
+#define KEY_WORDS_GPIO		"#gpio"
+#define GPIO_EXT_PORT		0x50
+#define MAX_ADC_CH_NR		10
+#define MAX_GPIO_NR		10
+
+/*
+ * How to make it works ?
+ *
+ * 1. pack dtb into rockchip resource.img, require:
+ *    (1) file name end with ".dtb";
+ *    (2) file name contains key words, like: ...#_[controller]_ch[channel]=[value]...dtb
+ *	  @controller: adc controller name in dts, eg. "saradc", ...;
+ *	  @channel: adc channel;
+ *	  @value: adc value;
+ *    eg: ...#_saradc_ch1=223#_saradc_ch2=650....dtb
+ *
+ * 2. U-Boot dtsi about adc controller node:
+ *    (1) enable "u-boot,dm-pre-reloc;";
+ *    (2) must set status "okay";
+ */
+static int rockchip_read_dtb_by_adc(const char *file_name)
+{
+	static int cached_v[MAX_ADC_CH_NR];
+	int offset_ctrl = strlen(KEY_WORDS_ADC_CTRL);
+	int offset_ch = strlen(KEY_WORDS_ADC_CH);
+	int ret, channel, len = 0, found = 0, margin = 30;
+	uint32_t raw_adc;
+	unsigned long dtb_adc;
+	char *stradc, *strch, *p;
+	char adc_v_string[10];
+	char dev_name[32];
+
+	debug("%s: %s\n", __func__, file_name);
+
+	/* Invalid format ? */
+	stradc = strstr(file_name, KEY_WORDS_ADC_CTRL);
+	while (stradc) {
+		debug("   - substr: %s\n", stradc);
+
+		/* Parse controller name */
+		strch = strstr(stradc, KEY_WORDS_ADC_CH);
+		len = strch - (stradc + offset_ctrl);
+		strlcpy(dev_name, stradc + offset_ctrl, len + 1);
+
+		/* Parse adc channel */
+		p = strch + offset_ch;
+		if (is_digit(*p) && is_equal(*(p + 1))) {
+			channel = *p - '0';
+		} else {
+			debug("   - invalid format: %s\n", stradc);
+			return -EINVAL;
+		}
+
+		/* Read raw adc value */
+		if (cached_v[channel] == 0) {
+			ret = adc_channel_single_shot(dev_name,
+						      channel, &raw_adc);
+			if (ret) {
+				debug("   - failed to read adc, ret=%d\n", ret);
+				return ret;
+			}
+			cached_v[channel] = raw_adc;
+		}
+
+		/* Parse dtb adc value */
+		p = strch + offset_ch + 2;	/* 2: channel and '=' */
+		while (*p && is_digit(*p)) {
+			len++;
+			p++;
+		}
+		strlcpy(adc_v_string, strch + offset_ch + 2, len + 1);
+		dtb_adc = simple_strtoul(adc_v_string, NULL, 10);
+
+		if (abs(dtb_adc - cached_v[channel]) <= margin) {
+			found = 1;
+			stradc = strstr(p, KEY_WORDS_ADC_CTRL);
+		} else {
+			found = 0;
+			break;
+		}
+
+		debug("   - parse: controller=%s, channel=%d, dtb_adc=%ld, read=%d %s\n",
+		      dev_name, channel, dtb_adc, cached_v[channel], found ? "(Y)" : "");
+	}
+
+	return found ? 0 : -ENOENT;
+}
+
+static int gpio_parse_base_address(fdt_addr_t *gpio_base_addr)
+{
+	static int initial;
+	ofnode parent, node;
+	int i = 0;
+
+	if (initial)
+		return 0;
+
+	parent = ofnode_path("/pinctrl");
+	if (!ofnode_valid(parent)) {
+		debug("   - Can't find pinctrl node\n");
+		return -EINVAL;
+	}
+
+	ofnode_for_each_subnode(node, parent) {
+		if (!ofnode_get_property(node, "gpio-controller", NULL)) {
+			debug("   - Can't find gpio-controller\n");
+			continue;
+		}
+
+		gpio_base_addr[i++] = ofnode_get_addr(node);
+		debug("   - gpio%d: 0x%x\n", i - 1, (uint32_t)gpio_base_addr[i - 1]);
+	}
+
+	if (i == 0) {
+		debug("   - parse gpio address failed\n");
+		return -EINVAL;
+	}
+
+	initial = 1;
+
+	return 0;
+}
+
+/*
+ * How to make it works ?
+ *
+ * 1. pack dtb into rockchip resource.img, require:
+ *    (1) file name end with ".dtb";
+ *    (2) file name contains key words, like: ...#gpio[pin]=[value]...dtb
+ *	  @pin: gpio name, eg. 0a2 means GPIO0A2;
+ *	  @value: gpio level, 0 or 1;
+ *    eg: ...#gpio0a6=1#gpio1c2=0....dtb
+ *
+ * 2. U-Boot dtsi about gpio node:
+ *    (1) enable "u-boot,dm-pre-reloc;" for all gpio node;
+ *    (2) set all gpio status "disabled"(Because we just want their property);
+ */
+static int rockchip_read_dtb_by_gpio(const char *file_name)
+{
+	static uint32_t cached_v[MAX_GPIO_NR];
+	fdt_addr_t gpio_base_addr[MAX_GPIO_NR];
+	int ret, found = 0, offset = strlen(KEY_WORDS_GPIO);
+	uint8_t port, pin, bank, lvl, val;
+	char *strgpio, *p;
+	uint32_t bit;
+
+	debug("%s\n", file_name);
+
+	strgpio = strstr(file_name, KEY_WORDS_GPIO);
+	while (strgpio) {
+		debug("   - substr: %s\n", strgpio);
+
+		p = strgpio + offset;
+
+		/* Invalid format ? */
+		if (!(is_digit(*(p + 0)) && is_abcd(*(p + 1)) &&
+		      is_digit(*(p + 2)) && is_equal(*(p + 3)) &&
+		      is_digit(*(p + 4)))) {
+			debug("   - invalid format: %s\n", strgpio);
+			return -EINVAL;
+		}
+
+		/* Parse gpio address */
+		ret = gpio_parse_base_address(gpio_base_addr);
+		if (ret) {
+			debug("   - Can't parse gpio base address: %d\n", ret);
+			return ret;
+		}
+
+		/* Read gpio value */
+		port = *(p + 0) - '0';
+		bank = *(p + 1) - 'a';
+		pin  = *(p + 2) - '0';
+		lvl  = *(p + 4) - '0';
+
+		if (cached_v[port] == 0)
+			cached_v[port] =
+				readl(gpio_base_addr[port] + GPIO_EXT_PORT);
+
+		/* Verify result */
+		bit = bank * 32 + pin;
+		val = cached_v[port] & (1 << bit) ? 1 : 0;
+
+		if (val == !!lvl) {
+			found = 1;
+			strgpio = strstr(p, KEY_WORDS_GPIO);
+		} else {
+			found = 0;
+			break;
+		}
+
+		debug("   - parse: gpio%d%c%d=%d, read=%d %s\n",
+		      port, bank + 'a', pin, lvl, val, found ? "(Y)" : "");
+	}
+
+	return found ? 0 : -ENOENT;
+}
+
+int rockchip_read_dtb_file(void *fdt_addr)
+{
+	struct resource_file *file;
+	struct list_head *node;
+	char *dtb_name = DTB_FILE;
+
+	if (list_empty(&entrys_head))
+		init_resource_list(NULL);
+
+	list_for_each(node, &entrys_head) {
+		file = list_entry(node, struct resource_file, link);
+		if (!strstr(file->name, ".dtb"))
+			continue;
+
+		if (strstr(file->name, KEY_WORDS_ADC_CTRL) &&
+		    strstr(file->name, KEY_WORDS_ADC_CH) &&
+		    !rockchip_read_dtb_by_adc(file->name)) {
+			dtb_name = file->name;
+			break;
+		} else if (strstr(file->name, KEY_WORDS_GPIO) &&
+			   !rockchip_read_dtb_by_gpio(file->name)) {
+			dtb_name = file->name;
+			break;
+		}
+	}
+
+	printf("DTB: %s\n", dtb_name);
+
+	return rockchip_read_resource_file((void *)fdt_addr, dtb_name, 0, 0);
+}
diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 2545ca90d4..9e421a2175 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -380,8 +380,7 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 	}
 
 	if (gd->fdt_blob != (void *)fdt_addr_r) {
-		fdt_size = rockchip_read_resource_file((void *)fdt_addr_r,
-						       DTB_FILE, 0, 0);
+		fdt_size = rockchip_read_dtb_file((void *)fdt_addr_r);
 		if (fdt_size < 0) {
 			printf("%s fdt read error\n", __func__);
 			ret = -EINVAL;

commit 7c19369d038571ed89e55b92f04ac4f937fc7def
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 23 16:18:54 2018 +0800

    make.sh: delete unused similar files and add support list show
    
    Change-Id: I24b1a05f6a321d2f409c25822b7dbbba5e1ae6d6
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 5c896931b3..0366d4cbde 100755
--- a/make.sh
+++ b/make.sh
@@ -5,6 +5,7 @@ SUBCMD=$2
 RKCHIP=${BOARD##*-}
 RKCHIP=$(echo ${RKCHIP} | tr '[a-z]' '[A-Z]')
 JOB=`sed -n "N;/processor/p" /proc/cpuinfo|wc -l`
+SUPPROT_LIST=`ls configs/*-r[v,k][0-9][0-9][0-9][0-9]_defconfig`
 
 # Declare global default output dir and cmd, update in prepare()
 OUTDIR=.
@@ -42,6 +43,11 @@ prepare()
 		exit 1
 	elif [ ! -f configs/${BOARD}_defconfig ]; then
 		echo "Can't find: configs/${BOARD}_defconfig"
+		echo
+		echo "*************** Support list ***************"
+		echo "$SUPPROT_LIST"
+		echo "********************************************"
+		echo
 		exit 1
 	fi
 
@@ -134,7 +140,15 @@ pack_uboot_image()
 
 	UBOOT_LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
 	${TOOLCHAIN_RKBIN}/loaderimage --pack --uboot ${OUTDIR}/u-boot.bin uboot.img ${UBOOT_LOAD_ADDR}
-	rm ${OUTDIR}/u-boot.img ${OUTDIR}/u-boot-dtb.img
+
+	if [ -f ${OUTDIR}/u-boot.img ]; then
+		rm ${OUTDIR}/u-boot.img
+	fi
+
+	if [ -f ${OUTDIR}/u-boot-dtb.img ]; then
+		rm ${OUTDIR}/u-boot-dtb.img
+	fi
+
 	echo "pack uboot okay! Input: ${OUTDIR}/u-boot.bin"
 }
 

commit 147a6b4de7233bd4252480f6977e316139961d61
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Thu Apr 26 15:01:13 2018 +0800

    arm: rockchip: rk3308: add sfc node for rk3308
    
    Change-Id: I66524230fd5a460aebafe1878154673770510b86
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/dts/rk3308.dtsi b/arch/arm/dts/rk3308.dtsi
index d4f016af16..1502276446 100644
--- a/arch/arm/dts/rk3308.dtsi
+++ b/arch/arm/dts/rk3308.dtsi
@@ -407,6 +407,16 @@
 		status = "disabled";
 	};
 
+
+	sfc: sfc@ff4c0000 {
+		compatible = "rockchip,rksfc";
+		reg = <0x0 0xff4c0000 0x0 0x4000>;
+		interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
+		clock-names = "clk_sfc", "hclk_sfc";
+		status = "disabled";
+	};
+
 	cru: clock-controller@ff500000 {
 		compatible = "rockchip,rk3308-cru";
 		reg = <0x0 0xff500000 0x0 0x1000>;

commit bc0b8cd41bbb4e84adbfd0b75d9df9b56bc8abbb
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Tue May 8 22:02:25 2018 +0800

    rockchip: config: add rksfc dev scan
    
    Change-Id: I68e4205db9000bd254f3cdcf1d69aef508fdc468
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index e285700747..4c8220e8bd 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -93,6 +93,8 @@
 		"setenv devtype mmc; setenv devnum 0;" \
 	"elif rknand dev 0; then " \
 		"setenv devtype rknand; setenv devnum 0;" \
+        "elif rksfc dev 0; then " \
+                "setenv devtype rksfc; setenv devnum 0;" \
 	"fi; \0"
 
 #define RKIMG_BOOTCOMMAND \

commit c2717d6fedadb58d1aec551ecbb9373f875a1e7e
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Thu Apr 26 14:45:09 2018 +0800

    common: boot_rkimg: add boot devtype rksfc
    
    Change-Id: I2ec14959aa1cc83ef7edf82944f8235f4db17690
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index cc92903e47..2545ca90d4 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -166,6 +166,9 @@ int get_bootdev_type(void)
 	} else if (!strcmp(devtype, "rknand")) {
 		type = IF_TYPE_RKNAND;
 		boot_media = "nand";
+	} else if (!strcmp(devtype, "rksfc")) {
+		type = IF_TYPE_RKSFC;
+		boot_media = "spi flash";
 	} else {
 		/* Add new to support */
 	}
@@ -177,7 +180,7 @@ int get_bootdev_type(void)
 		 * 2. rknand doesn't need "androidboot.mode=";
 		 */
 		if (env_exist("bootargs", "androidboot.mode=charger") ||
-		    (type == IF_TYPE_RKNAND))
+		    (type == IF_TYPE_RKNAND) || (type == IF_TYPE_RKSFC))
 			snprintf(boot_options, sizeof(boot_options),
 				 "storagemedia=%s", boot_media);
 		else

commit ae20a02c8e79fc892e3ba29b760a0625cbf6a1e8
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Thu Apr 26 14:41:42 2018 +0800

    disk: part: add rksfc description print
    
    Change-Id: I61fb8817fba3d4ddf799a17abb504c4e37c796d3
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/disk/part.c b/disk/part.c
index 49cda42e09..72d1146c94 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -151,6 +151,12 @@ void dev_print (struct blk_desc *dev_desc)
 			dev_desc->revision,
 			dev_desc->product);
 		break;
+	case IF_TYPE_RKSFC:
+		printf ("Vendor: %s Rev: %s Prod: %s\n",
+			dev_desc->vendor,
+			dev_desc->revision,
+			dev_desc->product);
+		break;
 	case IF_TYPE_DOC:
 		puts("device type DOC\n");
 		return;
@@ -285,6 +291,9 @@ static void print_part_header(const char *type, struct blk_desc *dev_desc)
 	case IF_TYPE_RKNAND:
 		puts("RKNAND");
 		break;
+	case IF_TYPE_RKSFC:
+		puts("RKSFC");
+		break;
 	default:
 		puts ("UNKNOWN");
 		break;

commit 2c3e7d2a8304f9743deb33c835601dc3432ea09c
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Thu Apr 26 14:40:18 2018 +0800

    drvers: block: blk-uclass: add rksfc block interface
    
    Change-Id: Ia9244aa6d5829b7a67fadab18f655fa7a7c5cfe1
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
index 58cf81703e..4e000b9e8a 100644
--- a/drivers/block/blk-uclass.c
+++ b/drivers/block/blk-uclass.c
@@ -25,6 +25,7 @@ static const char *if_typename_str[IF_TYPE_COUNT] = {
 	[IF_TYPE_SYSTEMACE]	= "ace",
 	[IF_TYPE_NVME]		= "nvme",
 	[IF_TYPE_RKNAND]	= "rknand",
+	[IF_TYPE_RKSFC]		= "rksfc",
 };
 
 static enum uclass_id if_type_uclass_id[IF_TYPE_COUNT] = {
@@ -39,6 +40,7 @@ static enum uclass_id if_type_uclass_id[IF_TYPE_COUNT] = {
 	[IF_TYPE_HOST]		= UCLASS_ROOT,
 	[IF_TYPE_NVME]		= UCLASS_NVME,
 	[IF_TYPE_RKNAND]	= UCLASS_RKNAND,
+	[IF_TYPE_RKSFC]		= UCLASS_SPI_FLASH,
 	[IF_TYPE_SYSTEMACE]	= UCLASS_INVALID,
 };
 
diff --git a/include/blk.h b/include/blk.h
index d8e3825454..f925832237 100644
--- a/include/blk.h
+++ b/include/blk.h
@@ -35,6 +35,7 @@ enum if_type {
 	IF_TYPE_SYSTEMACE,
 	IF_TYPE_NVME,
 	IF_TYPE_RKNAND,
+	IF_TYPE_RKSFC,
 	IF_TYPE_SPINAND,
 	IF_TYPE_SPINOR,
 

commit d5f538dc02e53c7267fcd4a914104071fca889b5
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Thu Apr 26 14:09:07 2018 +0800

    cmd: rksfc: add sfc u-boot command
    
    rksfc driver with block interface
    
    Change-Id: I395cf78e939ce9ddbd07a9afad794474f0482542
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 6afb4fd64f..f7f78c6361 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -898,6 +898,13 @@ config CMD_RKNAND
 	help
 	  Rockchip NAND FLASH device support
 
+config CMD_RKSFC
+	bool "rksfc"
+	depends on (RKSFC_NOR || RKSFC_NAND)
+	default y if (RKSFC_NOR || RKSFC_NAND)
+	help
+	  Rockchip SFC device support
+
 config CMD_SATA
 	bool "sata - Access SATA subsystem"
 	select SATA
diff --git a/cmd/Makefile b/cmd/Makefile
index 82817e2943..4f12f6fdbe 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -115,6 +115,7 @@ obj-$(CONFIG_CMD_SATA) += sata.o
 obj-$(CONFIG_CMD_NVME) += nvme.o
 obj-$(CONFIG_CMD_ROCKUSB) += rockusb.o
 obj-$(CONFIG_CMD_RKNAND) += rknand.o
+obj-$(CONFIG_CMD_RKSFC) += rksfc.o
 obj-$(CONFIG_CMD_SF) += sf.o
 obj-$(CONFIG_CMD_SCSI) += scsi.o disk.o
 obj-$(CONFIG_CMD_SHA1SUM) += sha1sum.o
diff --git a/cmd/rksfc.c b/cmd/rksfc.c
new file mode 100644
index 0000000000..f4b4a317d7
--- /dev/null
+++ b/cmd/rksfc.c
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+#include <common.h>
+#include <command.h>
+#include <dm.h>
+#include <rksfc.h>
+
+static int rksfc_curr_dev;
+static int do_rksfc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+	int ret;
+
+	if (argc == 2) {
+		if (strncmp(argv[1], "scan", 4) == 0) {
+			ret = rksfc_scan_namespace();
+			if (ret)
+				return CMD_RET_FAILURE;
+
+			return ret;
+		}
+	}
+
+	return blk_common_cmd(argc, argv, IF_TYPE_RKSFC, &rksfc_curr_dev);
+}
+
+U_BOOT_CMD(
+	rksfc, 8, 1, do_rksfc,
+	"rockchip sfc sub-system",
+	"scan - scan Sfc devices\n"
+	"rksfc info - show all available Sfc devices\n"
+	"rksfc device [dev] - show or set current Sfc device\n"
+	"rksfc part [dev] - print partition table of one or all Sfc devices\n"
+	"rksfc read addr blk# cnt - read `cnt' blocks starting at block\n"
+	"     `blk#' to memory address `addr'\n"
+	"rksfc write addr blk# cnt - write `cnt' blocks starting at block\n"
+	"     `blk#' from memory address `addr'"
+);
diff --git a/doc/README.rksfc b/doc/README.rksfc
new file mode 100644
index 0000000000..447c8a6174
--- /dev/null
+++ b/doc/README.rksfc
@@ -0,0 +1,29 @@
+rksfc (Rockchip SPI FLASH SFC drivers)
+=====================================================
+
+Overview
+--------
+
+The rksfc is used for Rockchip Soc sfc devices with
+block interface.
+
+Status
+------
+It supprot SFC SPI NOR.
+
+Usage in U-Boot
+---------------
+
+To list all of the rksfc hard disks, try:
+
+  => rksfc info
+  Device 0: Vendor: 0x0308 Rev: V1.00 Prod: rksfc
+	    Type: Hard Disk
+	    Capacity: 32.0 MB = 0.0 GB (65600 x 512)
+
+To find and initialize sfc devices, try:
+  => rksfc dev 0
+  Device 0: Vendor: 0x0308 Rev: V1.00 Prod: rksfc
+	    Type: Hard Disk
+	    Capacity: 32.0 MB = 0.0 GB (65600 x 512)
+... is now current device
diff --git a/include/rksfc.h b/include/rksfc.h
new file mode 100644
index 0000000000..03a457b8bb
--- /dev/null
+++ b/include/rksfc.h
@@ -0,0 +1,20 @@
+/*
+ * Copyright (C) 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __RKSFC_H__
+#define __RKSFC_H__
+/**
+ * rksfc_scan_namespace - scan all namespaces attached to RK SFC
+ * controllers
+ *
+ * This probes all registered RK SFC uclass device drivers in the
+ * system,and tries to find all namespaces attached to the RK SFC
+ * controllers.
+ *
+ * @return:	0 on success, -ve on error
+ */
+int rksfc_scan_namespace(void);
+#endif

commit ad309a883b81622573c8021d60b4eb676f57d5c2
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Tue May 8 21:32:34 2018 +0800

    rockchip: rkflash: add rk small capacity flash storage support with block interface
    
    Currently only support spi nor flash, but slc nand flash and spi nand flash will be
    supported in next step;
    The code includes block layer, ftl layer(nand flash), controller layer and flash layer.
    
    Change-Id: Iaa56294ee2a5a6dfec2d0172efc35de30c88365a
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/drivers/Kconfig b/drivers/Kconfig
index 11d7fb2ed0..a18ba97135 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -76,6 +76,8 @@ source "drivers/reset/Kconfig"
 
 source "drivers/rknand/Kconfig"
 
+source "drivers/rkflash/Kconfig"
+
 source "drivers/rtc/Kconfig"
 
 source "drivers/scsi/Kconfig"
diff --git a/drivers/Makefile b/drivers/Makefile
index b00a2ca1ae..e806aec2cf 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -77,6 +77,7 @@ obj-y += misc/
 obj-$(CONFIG_MMC) += mmc/
 obj-$(CONFIG_NVME) += nvme/
 obj-$(CONFIG_RKNAND) += rknand/
+obj-$(CONFIG_RKFLASH) += rkflash/
 obj-y += pcmcia/
 obj-y += dfu/
 obj-$(CONFIG_X86) += pch/
diff --git a/drivers/rkflash/Kconfig b/drivers/rkflash/Kconfig
new file mode 100644
index 0000000000..ab6fce36a0
--- /dev/null
+++ b/drivers/rkflash/Kconfig
@@ -0,0 +1,32 @@
+#
+# Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+#
+if ARCH_ROCKCHIP
+
+menuconfig RKFLASH
+	tristate "Rockchip Flash Devices Support"
+	default n
+	help
+	  Enable rockchip flash devices support.
+	  rkflash driver support 3-type flash devices: NANDC NAND, SFC_NOR
+	  and SFC_NAND.
+	  Say Y when you have a board with one of them.
+
+if RKFLASH
+
+comment "Rockchip Flash Devices"
+
+config RKSFC_NOR
+	bool "Rockchip SFC NOR flash support"
+	depends on BLK
+	help
+	  This option enables support for Rockchip SFC nor devices.
+	  It's block interface.
+	  512Kb/sector.
+	  Say y here to enable rockchip spi nor flash driver.
+
+endif # RKFLASH
+
+endif # ARCH_ROCKCHIP
diff --git a/drivers/rkflash/Makefile b/drivers/rkflash/Makefile
new file mode 100644
index 0000000000..164c7e9d7f
--- /dev/null
+++ b/drivers/rkflash/Makefile
@@ -0,0 +1,8 @@
+#
+# Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+#
+
+obj-y += rkflash_debug.o
+obj-$(CONFIG_RKSFC_NOR) += sfc.o sfc_nor.o rkflash_api.o rksfc_base.o rkflash_blk.o
\ No newline at end of file
diff --git a/drivers/rkflash/rkflash_api.c b/drivers/rkflash/rkflash_api.c
new file mode 100644
index 0000000000..bc7b4c839e
--- /dev/null
+++ b/drivers/rkflash/rkflash_api.c
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+#include <common.h>
+#include <dm.h>
+
+#include "rkflash_api.h"
+#include "rkflash_blk.h"
+
+#ifdef CONFIG_RKSFC_NOR
+int rk_snor_init(struct udevice *udev)
+{
+	struct rkflash_info *priv = dev_get_priv(udev);
+	struct SFNOR_DEV *p_dev = (struct SFNOR_DEV *)&priv->flash_dev_info;
+
+	return snor_init(p_dev);
+}
+
+u32 rk_snor_get_capacity(struct udevice *udev)
+{
+	struct rkflash_info *priv = dev_get_priv(udev);
+	struct SFNOR_DEV *p_dev = (struct SFNOR_DEV *)&priv->flash_dev_info;
+
+	return snor_get_capacity(p_dev);
+}
+
+int rk_snor_read(struct udevice *udev, u32 sec, u32 n_sec, void *p_data)
+{
+	struct rkflash_info *priv = dev_get_priv(udev);
+	struct SFNOR_DEV *p_dev = (struct SFNOR_DEV *)&priv->flash_dev_info;
+
+	return snor_read(p_dev, sec, n_sec, p_data);
+}
+
+int rk_snor_write(struct udevice *udev, u32 sec, u32 n_sec, const void *p_data)
+{
+	struct rkflash_info *priv = dev_get_priv(udev);
+	struct SFNOR_DEV *p_dev = (struct SFNOR_DEV *)&priv->flash_dev_info;
+
+	return snor_write(p_dev, sec, n_sec, p_data);
+}
+#endif
+
diff --git a/drivers/rkflash/rkflash_api.h b/drivers/rkflash/rkflash_api.h
new file mode 100644
index 0000000000..ece56c0944
--- /dev/null
+++ b/drivers/rkflash/rkflash_api.h
@@ -0,0 +1,20 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+#ifndef __RKFLASH_API_H
+#define __RKFLASH_API_H
+
+#ifdef CONFIG_RKSFC_NOR
+#include "sfc_nor.h"
+#include "sfc.h"
+
+int rk_snor_init(struct udevice *udev);
+u32 rk_snor_get_capacity(struct udevice *udev);
+int rk_snor_read(struct udevice *udev, u32 sec, u32 n_sec, void *p_data);
+int rk_snor_write(struct udevice *udev, u32 sec, u32 n_sec, const void *p_data);
+#endif
+
+#endif
diff --git a/drivers/rkflash/rkflash_blk.c b/drivers/rkflash/rkflash_blk.c
new file mode 100644
index 0000000000..702fc1aed1
--- /dev/null
+++ b/drivers/rkflash/rkflash_blk.c
@@ -0,0 +1,106 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/device-internal.h>
+#include <dm/lists.h>
+#include <dm/root.h>
+
+#include "rkflash_blk.h"
+#include "rkflash_debug.h"
+
+ulong rkflash_bread(struct udevice *udev, lbaint_t start,
+		    lbaint_t blkcnt, void *dst)
+{
+	struct blk_desc *block_dev = dev_get_uclass_platdata(udev);
+	struct rkflash_info *priv = dev_get_priv(udev->parent);
+
+	if (blkcnt == 0)
+		return 0;
+
+	if ((start + blkcnt) > block_dev->lba)
+		return 0;
+
+	if (!priv->read)
+		return 0;
+
+	return (ulong)priv->read(udev->parent, (u32)start, (u32)blkcnt, dst);
+}
+
+ulong rkflash_bwrite(struct udevice *udev, lbaint_t start,
+		     lbaint_t blkcnt, const void *src)
+{
+	struct blk_desc *block_dev = dev_get_uclass_platdata(udev);
+	struct rkflash_info *priv = dev_get_priv(udev->parent);
+
+	if (blkcnt == 0)
+		return 0;
+
+	if ((start + blkcnt) > block_dev->lba)
+		return 0;
+
+	if (!priv->write)
+		return 0;
+
+	return (ulong)priv->write(udev->parent, (u32)start, (u32)blkcnt, src);
+}
+
+ulong rkflash_berase(struct udevice *udev, lbaint_t start,
+		     lbaint_t blkcnt)
+{
+	struct blk_desc *block_dev = dev_get_uclass_platdata(udev);
+	struct rkflash_info *priv = dev_get_priv(udev->parent);
+
+	if (blkcnt == 0)
+		return 0;
+
+	if ((start + blkcnt) > block_dev->lba)
+		return 0;
+
+	if (!priv->erase)
+		return 0;
+
+	return (ulong)priv->erase(udev->parent, (u32)start, (u32)blkcnt);
+}
+
+static int rkflash_blk_probe(struct udevice *udev)
+{
+	struct rkflash_info *priv = dev_get_priv(udev->parent);
+	struct blk_desc *desc = dev_get_uclass_platdata(udev);
+
+	debug("%s %d %p ndev = %p %p\n", __func__, __LINE__,
+	      udev, priv, udev->parent);
+	priv->child_dev = udev;
+	if (priv->flash_con_type == FLASH_CON_TYPE_SFC)
+		desc->if_type = IF_TYPE_RKSFC;
+	desc->lba = priv->density;
+	desc->log2blksz = 9;
+	desc->blksz = 512;
+	desc->bdev = udev;
+	desc->devnum = 0;
+	sprintf(desc->vendor, "0x%.4x", 0x0308);
+	memcpy(desc->product, "rkflash", sizeof("rkflash"));
+	memcpy(desc->revision, "V1.00", sizeof("V1.00"));
+	part_init(desc);
+	rkflash_test(udev);
+
+	return 0;
+}
+
+static const struct blk_ops rkflash_blk_ops = {
+	.read	= rkflash_bread,
+	.write	= rkflash_bwrite,
+	.erase	= rkflash_berase,
+};
+
+U_BOOT_DRIVER(rkflash_blk) = {
+	.name		= "rkflash_blk",
+	.id		= UCLASS_BLK,
+	.ops		= &rkflash_blk_ops,
+	.probe		= rkflash_blk_probe,
+};
+
diff --git a/drivers/rkflash/rkflash_blk.h b/drivers/rkflash/rkflash_blk.h
new file mode 100644
index 0000000000..9384b0ac49
--- /dev/null
+++ b/drivers/rkflash/rkflash_blk.h
@@ -0,0 +1,90 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+#ifndef __RKFLASH_BLK_H__
+#define __RKFLASH_BLK_H__
+
+enum flash_con_type {
+	FLASH_CON_TYPE_NANDC = 0,
+	FLASH_CON_TYPE_SFC,
+	FLASH_CON_TYPE_MAX,
+};
+
+enum flash_type {
+	FLASH_TYPE_NANDC_NAND = 0,
+	FLASH_TYPE_SFC_NOR,
+	FLASH_TYPE_SFC_NAND,
+	FLASH_TYPE_MAX,
+};
+
+struct flash_operation {
+	int id;
+	int (*flash_init)(struct udevice *udev);
+	u32 (*flash_get_capacity)(struct udevice *udev);
+	int (*flash_read)(struct udevice *udev,
+			  u32 start,
+			  u32 blkcnt,
+			  void *buffer);
+	int (*flash_write)(struct udevice *udev,
+			   u32 start,
+			   u32 blkcnt,
+			   const void *buffer);
+};
+
+struct rkflash_dev {
+	u8 reserved[128];
+};
+
+struct rkflash_info {
+	void *ioaddr;
+	u32 flash_con_type;
+	u32 freq;
+	u32 density;
+	struct udevice *child_dev;
+	struct rkflash_dev flash_dev_info;
+	/*
+	 * read() - read from a block device
+	 *
+	 * @start:	Start block number to read (0=first)
+	 * @blkcnt:	Number of blocks to read
+	 * @buffer:	Destination buffer for data read
+	 * @return 0 is OK, -1 is error.
+	 */
+	int (*read)(struct udevice *udev,
+		    u32 start,
+		    u32 blkcnt,
+		    void *buffer);
+	/*
+	 * write() - write to a block device
+	 *
+	 * @dev:	Device to write to
+	 * @start:	Start block number to write (0=first)
+	 * @blkcnt:	Number of blocks to write
+	 * @buffer:	Source buffer for data to write
+	 * @return 0 is OK, -1 is error.
+	 */
+	int (*write)(struct udevice *udev,
+		     u32 start,
+		     u32 blkcnt,
+		     const void *buffer);
+	/*
+	 * erase() - erase a section of a block device
+	 *
+	 * @dev:	Device to (partially) erase
+	 * @start:	Start block number to erase (0=first)
+	 * @blkcnt:	Number of blocks to erase
+	 * @return 0 is OK, -1 is error.
+	 */
+	int (*erase)(struct udevice *udev,
+		     u32 start,
+		     u32 blkcnt);
+};
+
+struct rkflash_uclass_priv {
+	struct rkflash_info *ndev;
+};
+
+#endif /* __RKSFC_BLK_H__ */
diff --git a/drivers/rkflash/rkflash_debug.c b/drivers/rkflash/rkflash_debug.c
new file mode 100644
index 0000000000..8321522fec
--- /dev/null
+++ b/drivers/rkflash/rkflash_debug.c
@@ -0,0 +1,140 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+#include <blk.h>
+
+#include "rkflash_debug.h"
+#include "rkflash_blk.h"
+
+void rkflash_print_hex(char *s, void *buf, u32 width, u32 len)
+{
+	u32 i, j;
+	char *p8 = (char *)buf;
+	short *p16 = (short *)buf;
+	u32 *p32 = (u32 *)buf;
+
+	j = 0;
+	for (i = 0; i < len; i++) {
+		if (j == 0)
+			printf("%s 0x%x:", s, i * width);
+
+		if (width == 4)
+			printf("%x ", p32[i]);
+		else if (width == 2)
+			printf("%x ", p16[i]);
+		else
+			printf("%02x ", p8[i]);
+		if (++j >= 16) {
+			j = 0;
+			printf("\n");
+		}
+	}
+	printf("\n");
+}
+
+#if (BLK_STRESS_TEST_EN)
+#define max_test_sector 64
+u8 pwrite[max_test_sector * 512];
+u8 pread[max_test_sector * 512];
+u32 *pwrite32;
+void blk_stress_test(struct udevice *udev)
+{
+	struct blk_desc *block_dev = dev_get_uclass_platdata(udev);
+	struct rkflash_info *priv = dev_get_priv(udev->parent);
+	u16 i, j, loop = 0;
+	u32 test_end_lba;
+	u32 test_lba = 0;
+	u16 test_sec_count = 1;
+	u16 print_flag;
+
+	if (!priv || !block_dev) {
+		printf("device unknown\n");
+		return;
+	}
+
+	test_end_lba = priv->density;
+	pwrite32 = (u32 *)pwrite;
+	for (i = 0; i < (max_test_sector * 512); i++)
+		pwrite[i] = i;
+	for (loop = 0; loop < 10; loop++) {
+		printf("---------Test loop = %d---------\n", loop);
+		printf("---------Test ftl write---------\n");
+		test_sec_count = 1;
+		printf("test_end_lba = %x\n", test_end_lba);
+		printf("test_lba = %x\n", test_lba);
+		for (test_lba = 0;
+		     (test_lba + test_sec_count) < test_end_lba;) {
+			pwrite32[0] = test_lba;
+			blk_dwrite(block_dev, test_lba, test_sec_count, pwrite);
+			blk_dread(block_dev, test_lba, test_sec_count, pread);
+			for (j = 0; j < test_sec_count * 512; j++) {
+				if (pwrite[j] != pread[j]) {
+					rkflash_print_hex("w:",
+							  pwrite,
+							  4,
+							  test_sec_count * 128);
+					rkflash_print_hex("r:",
+							  pread,
+							  4,
+							  test_sec_count * 128);
+					printf("r=%x, n=%x, w=%x, r=%x\n",
+					       test_lba,
+					       j,
+					       pwrite[j],
+					       pread[j]);
+					while (1)
+						;
+					break;
+				}
+			}
+			print_flag = test_lba & 0x1FF;
+			if (print_flag < test_sec_count)
+				printf("test_lba = %x\n", test_lba);
+			test_lba += test_sec_count;
+			test_sec_count++;
+			if (test_sec_count > max_test_sector)
+				test_sec_count = 1;
+		}
+		printf("---------Test ftl check---------\n");
+
+		test_sec_count = 1;
+		for (test_lba = 0;
+		     (test_lba + test_sec_count) < test_end_lba;) {
+			pwrite32[0] = test_lba;
+			blk_dread(block_dev, test_lba, test_sec_count, pread);
+			print_flag = test_lba & 0x7FF;
+			if (print_flag < test_sec_count)
+				printf("test_lba = %x\n", test_lba);
+
+			for (j = 0; j < test_sec_count * 512; j++) {
+				if (pwrite[j] != pread[j]) {
+					printf("r=%x, n=%x, w=%x, r=%x\n",
+					       test_lba,
+					       j,
+					       pwrite[j],
+					       pread[j]);
+					/* while(1); */
+					break;
+				}
+			}
+			test_lba += test_sec_count;
+			test_sec_count++;
+			if (test_sec_count > max_test_sector)
+				test_sec_count = 1;
+		}
+	}
+	printf("---------Test end---------\n");
+	/* while(1); */
+}
+#endif
+
+void rkflash_test(struct udevice *udev)
+{
+#if (BLK_STRESS_TEST_EN)
+	blk_stress_test(udev);
+#endif
+}
+
diff --git a/drivers/rkflash/rkflash_debug.h b/drivers/rkflash/rkflash_debug.h
new file mode 100644
index 0000000000..d9a968ec4a
--- /dev/null
+++ b/drivers/rkflash/rkflash_debug.h
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+#ifndef _RKFLASH_DEBUG_H
+#define _RKFLASH_DEBUG_H
+
+#include <common.h>
+#include <dm.h>
+
+/*
+ * Print switch, set to 1 if needed
+ * I - info
+ * E - error
+ * HEX - multiline print
+ */
+
+#define	PRINT_SWI_SFC_I		0
+#define	PRINT_SWI_SFC_E		1
+#define PRINT_SWI_SFC_HEX	1
+
+/*
+ * Test switch
+ */
+#define BLK_STRESS_TEST_EN	0
+
+#if (RINT_SWI_SFC_I)
+#define PRINT_SFC_I(...) printf(__VA_ARGS__)
+#else
+#define PRINT_SFC_I(...)
+#endif
+
+#if (PRINT_SWI_SFC_E)
+#define PRINT_SFC_E(...) printf(__VA_ARGS__)
+#else
+#define PRINT_SFC_E(...)
+#endif
+
+#if (PRINT_SWI_SFC_HEX)
+#define PRINT_SFC_HEX(s, buf, width, len)\
+		rkflash_print_hex(s, buf, width, len)
+#else
+#define PRINT_SFC_HEX(s, buf, width, len)
+#endif
+
+void rkflash_print_hex(char *s, void *buf, u32 width, u32 len);
+void rkflash_test(struct udevice *p_dev);
+
+#endif
diff --git a/drivers/rkflash/rksfc_base.c b/drivers/rkflash/rksfc_base.c
new file mode 100644
index 0000000000..713b6b5b3b
--- /dev/null
+++ b/drivers/rkflash/rksfc_base.c
@@ -0,0 +1,116 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <dm/device-internal.h>
+#include <asm/arch/clock.h>
+
+#include "rkflash_blk.h"
+#include "rkflash_api.h"
+
+static struct flash_operation spi_flash_op = {
+#ifdef	CONFIG_RKSFC_NOR
+	FLASH_TYPE_SFC_NOR,
+	rk_snor_init,
+	rk_snor_get_capacity,
+	rk_snor_read,
+	rk_snor_write,
+#else
+	-1, NULL, NULL, NULL, NULL,
+#endif
+};
+
+int rksfc_scan_namespace(void)
+{
+	struct uclass *uc;
+	struct udevice *dev;
+	int ret;
+
+	ret = uclass_get(UCLASS_SPI_FLASH, &uc);
+	if (ret)
+		return ret;
+
+	uclass_foreach_dev(dev, uc) {
+		debug("%s %d %p\n", __func__, __LINE__, dev);
+		ret = device_probe(dev);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+static int rksfc_blk_bind(struct udevice *udev)
+{
+	struct udevice *bdev;
+	int ret;
+
+	ret = blk_create_devicef(udev, "rkflash_blk", "blk",
+				 IF_TYPE_RKSFC,
+				 0, 512, 0, &bdev);
+	if (ret) {
+		debug("Cannot create block device\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+static int rockchip_rksfc_ofdata_to_platdata(struct udevice *dev)
+{
+	struct rkflash_info *priv = dev_get_priv(dev);
+
+	priv->ioaddr = dev_read_addr_ptr(dev);
+
+	return 0;
+}
+
+static int rockchip_rksfc_probe(struct udevice *udev)
+{
+	int ret;
+	struct rkflash_info *priv = dev_get_priv(udev);
+
+	debug("%s %d %p ndev = %p\n", __func__, __LINE__, udev, priv);
+
+	sfc_init(priv->ioaddr);
+	if (spi_flash_op.id == -1) {
+		debug("%s no optional spi flash\n", __func__);
+		return 0;
+	}
+	ret = spi_flash_op.flash_init(udev);
+	if (!ret) {
+		priv->flash_con_type = FLASH_CON_TYPE_SFC;
+		priv->density = spi_flash_op.flash_get_capacity(udev);
+		priv->read = spi_flash_op.flash_read;
+		priv->write = spi_flash_op.flash_write;
+	}
+
+	return ret;
+}
+
+UCLASS_DRIVER(rksfc) = {
+	.id		= UCLASS_SPI_FLASH,
+	.name		= "rksfc",
+	.flags		= DM_UC_FLAG_SEQ_ALIAS,
+};
+
+static const struct udevice_id rockchip_sfc_ids[] = {
+	{ .compatible = "rockchip,rksfc" },
+	{ }
+};
+
+U_BOOT_DRIVER(rksfc) = {
+	.name		= "rksfc",
+	.id		= UCLASS_SPI_FLASH,
+	.of_match	= rockchip_sfc_ids,
+	.bind		= rksfc_blk_bind,
+	.probe		= rockchip_rksfc_probe,
+	.priv_auto_alloc_size = sizeof(struct rkflash_info),
+	.ofdata_to_platdata = rockchip_rksfc_ofdata_to_platdata,
+};
+
diff --git a/drivers/rkflash/sfc.c b/drivers/rkflash/sfc.c
new file mode 100644
index 0000000000..b0f50defb7
--- /dev/null
+++ b/drivers/rkflash/sfc.c
@@ -0,0 +1,195 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+#include <common.h>
+#include <linux/delay.h>
+#include <bouncebuf.h>
+#include <asm/io.h>
+
+#include "sfc.h"
+
+static void __iomem *g_sfc_reg;
+
+static void sfc_reset(void)
+{
+	int timeout = 10000;
+
+	writel(SFC_RESET, g_sfc_reg + SFC_RCVR);
+	while ((readl(g_sfc_reg + SFC_RCVR) == SFC_RESET) && (timeout > 0)) {
+		sfc_delay(1);
+		timeout--;
+	}
+	writel(0xFFFFFFFF, g_sfc_reg + SFC_ICLR);
+}
+
+u16 sfc_get_version(void)
+{
+	return  (u32)(readl(g_sfc_reg + SFC_VER) & 0xffff);
+}
+
+int sfc_init(void __iomem *reg_addr)
+{
+	g_sfc_reg = reg_addr;
+	sfc_reset();
+	writel(0, g_sfc_reg + SFC_CTRL);
+
+	return SFC_OK;
+}
+
+void sfc_clean_irq(void)
+{
+	writel(0xFFFFFFFF, g_sfc_reg + SFC_ICLR);
+	writel(0xFFFFFFFF, g_sfc_reg + SFC_IMR);
+}
+
+int sfc_request(u32 sfcmd, u32 sfctrl, u32 addr, void *data)
+{
+	int ret = SFC_OK;
+	union SFCCMD_DATA cmd;
+	int reg;
+	int timeout = 0;
+
+	reg = readl(g_sfc_reg + SFC_FSR);
+	if (!(reg & SFC_TXEMPTY) || !(reg & SFC_RXEMPTY) ||
+	    (readl(g_sfc_reg + SFC_SR) & SFC_BUSY))
+		sfc_reset();
+
+	cmd.d32 = sfcmd;
+	if (cmd.b.addrbits == SFC_ADDR_XBITS) {
+		union SFCCTRL_DATA ctrl;
+
+		ctrl.d32 = sfctrl;
+		if (!ctrl.b.addrbits)
+			return SFC_PARAM_ERR;
+		/* Controller plus 1 automatically */
+		writel(ctrl.b.addrbits - 1, g_sfc_reg + SFC_ABIT);
+	}
+	/* shift in the data at negedge sclk_out */
+	sfctrl |= 0x2;
+
+	writel(sfctrl, g_sfc_reg + SFC_CTRL);
+	writel(sfcmd, g_sfc_reg + SFC_CMD);
+	if (cmd.b.addrbits)
+		writel(addr, g_sfc_reg + SFC_ADDR);
+	if (!cmd.b.datasize)
+		goto exit_wait;
+	if (SFC_ENABLE_DMA & sfctrl) {
+		struct bounce_buffer bb;
+		unsigned int bb_flags;
+
+		if (cmd.b.rw == SFC_WRITE)
+			bb_flags = GEN_BB_READ;
+		else
+			bb_flags = GEN_BB_WRITE;
+
+		ret = bounce_buffer_start(&bb, data, cmd.b.datasize, bb_flags);
+		if (ret)
+			return ret;
+
+		writel(0xFFFFFFFF, g_sfc_reg + SFC_ICLR);
+		writel(~((u32)FINISH_INT), g_sfc_reg + SFC_IMR);
+		writel((u64)bb.bounce_buffer, g_sfc_reg + SFC_DMA_ADDR);
+		writel(SFC_DMA_START, g_sfc_reg + SFC_DMA_TRIGGER);
+
+		timeout = cmd.b.datasize * 10;
+		while ((readl(g_sfc_reg + SFC_SR) & SFC_BUSY) &&
+		       (timeout-- > 0))
+			sfc_delay(1);
+		writel(0xFFFFFFFF, g_sfc_reg + SFC_ICLR);
+		if (timeout <= 0)
+			ret = SFC_WAIT_TIMEOUT;
+		bounce_buffer_stop(&bb);
+	} else {
+		u32 i, words, count, bytes;
+		union SFCFSR_DATA    fifostat;
+		u32 *p_data = (u32 *)data;
+
+		if (cmd.b.rw == SFC_WRITE) {
+			words  = (cmd.b.datasize + 3) >> 2;
+			while (words) {
+				fifostat.d32 = readl(g_sfc_reg + SFC_FSR);
+				if (fifostat.b.txlevel > 0) {
+					count = words < fifostat.b.txlevel ?
+						words : fifostat.b.txlevel;
+					for (i = 0; i < count; i++) {
+						writel(*p_data++,
+						       g_sfc_reg + SFC_DATA);
+						words--;
+					}
+					if (words == 0)
+						break;
+					timeout = 0;
+				} else {
+					sfc_delay(1);
+					if (timeout++ > 10000) {
+						ret = SFC_TX_TIMEOUT;
+						break;
+					}
+				}
+			}
+		} else {
+			/* SFC_READ == cmd.b.rw */
+			bytes = cmd.b.datasize & 0x3;
+			words = cmd.b.datasize >> 2;
+			while (words) {
+				fifostat.d32 = readl(g_sfc_reg + SFC_FSR);
+				if (fifostat.b.rxlevel > 0) {
+					u32 count;
+
+					count = words < fifostat.b.rxlevel ?
+						words : fifostat.b.rxlevel;
+
+					for (i = 0; i < count; i++) {
+						*p_data++ = readl(g_sfc_reg +
+								  SFC_DATA);
+						words--;
+					}
+					if (words == 0)
+						break;
+					timeout = 0;
+				} else {
+					sfc_delay(1);
+					if (timeout++ > 10000) {
+						ret = SFC_RX_TIMEOUT;
+						break;
+					}
+				}
+			}
+
+			timeout = 0;
+			while (bytes) {
+				fifostat.d32 = readl(g_sfc_reg + SFC_FSR);
+				if (fifostat.b.rxlevel > 0) {
+					u8 *p_data1 = (u8 *)p_data;
+
+					words = readl(g_sfc_reg + SFC_DATA);
+					for (i = 0; i < bytes; i++)
+						p_data1[i] =
+						(u8)((words >> (i * 8)) & 0xFF);
+					break;
+				}
+
+				sfc_delay(1);
+				if (timeout++ > 10000) {
+					ret = SFC_RX_TIMEOUT;
+					break;
+				}
+			}
+		}
+	}
+
+exit_wait:
+	timeout = 0;    /* wait cmd or data send complete */
+	while (!(readl(g_sfc_reg + SFC_FSR) & SFC_TXEMPTY)) {
+		sfc_delay(1);
+		if (timeout++ > 100000) {         /* wait 100ms */
+			ret = SFC_TX_TIMEOUT;
+			break;
+		}
+	}
+	sfc_delay(1); /* CS# High Time (read/write) >100ns */
+	return ret;
+}
diff --git a/drivers/rkflash/sfc.h b/drivers/rkflash/sfc.h
new file mode 100644
index 0000000000..9a9095470a
--- /dev/null
+++ b/drivers/rkflash/sfc.h
@@ -0,0 +1,177 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+#ifndef _SFC_H
+#define _SFC_H
+
+#define SFC_VER_3		0x3 /* ver 3, else ver 1 */
+
+#define SFC_MAX_IOSIZE		(1024 * 8)    /* 8K byte */
+#define SFC_EN_INT		(0)         /* enable interrupt */
+#define SFC_EN_DMA		(1)         /* enable dma */
+#define SFC_FIFO_DEPTH		(0x10)      /* 16 words */
+
+/* FIFO watermark */
+#define SFC_RX_WMARK		(SFC_FIFO_DEPTH)	/* RX watermark level */
+#define SFC_TX_WMARK		(SFC_FIFO_DEPTH)	/* TX watermark level */
+#define SFC_RX_WMARK_SHIFT	(8)
+#define SFC_TX_WMARK_SHIFT	(0)
+
+/*return value*/
+#define SFC_OK                      (0)
+#define SFC_ERROR                   (-1)
+#define SFC_PARAM_ERR               (-2)
+#define SFC_TX_TIMEOUT              (-3)
+#define SFC_RX_TIMEOUT              (-4)
+#define SFC_WAIT_TIMEOUT            (-5)
+#define SFC_BUSY_TIMEOUT            (-6)
+#define SFC_ECC_FAIL                (-7)
+#define SFC_PROG_FAIL               (-8)
+#define SFC_ERASE_FAIL              (-9)
+
+/* SFC_CMD Register */
+#define SFC_ADDR_0BITS              (0)
+#define SFC_ADDR_24BITS             (1)
+#define SFC_ADDR_32BITS             (2)
+#define SFC_ADDR_XBITS              (3)
+
+#define SFC_WRITE                   (1)
+#define SFC_READ                    (0)
+
+/* SFC_CTRL Register */
+#define SFC_1BITS_LINE              (0)
+#define SFC_2BITS_LINE              (1)
+#define SFC_4BITS_LINE              (2)
+
+#define SFC_ENABLE_DMA              BIT(14)
+#define sfc_delay(us)	udelay(us)
+
+#define DMA_INT		BIT(7)      /* dma interrupt */
+#define NSPIERR_INT	BIT(6)      /* Nspi error interrupt */
+#define AHBERR_INT	BIT(5)      /* Ahb bus error interrupt */
+#define FINISH_INT	BIT(4)      /* Transfer finish interrupt */
+#define TXEMPTY_INT	BIT(3)      /* Tx fifo empty interrupt */
+#define TXOF_INT	BIT(2)      /* Tx fifo overflow interrupt */
+#define RXUF_INT	BIT(1)      /* Rx fifo underflow interrupt */
+#define RXFULL_INT	BIT(0)      /* Rx fifo full interrupt */
+
+/* SFC_FSR Register*/
+#define SFC_RXFULL	BIT(3)      /* rx fifo full */
+#define SFC_RXEMPTY	BIT(2)      /* rx fifo empty */
+#define SFC_TXEMPTY	BIT(1)      /* tx fifo empty */
+#define SFC_TXFULL	BIT(0)      /* tx fifo full */
+
+/* SFC_RCVR Register */
+#define SFC_RESET	BIT(0)     /* controller reset */
+
+/* SFC_SR Register */
+/* sfc busy flag. When busy, don't try to set the control register */
+#define SFC_BUSY	BIT(0)
+
+/* SFC_DMA_TRIGGER Register */
+/* Dma start trigger signal. Auto cleared after write */
+#define SFC_DMA_START	BIT(0)
+
+#define SFC_CTRL	0x00
+#define SFC_IMR		0x04
+#define SFC_ICLR	0x08
+#define SFC_FTLR	0x0C
+#define SFC_RCVR	0x10
+#define SFC_AX		0x14
+#define SFC_ABIT	0x18
+#define SFC_MASKISR	0x1C
+#define SFC_FSR		0x20
+#define SFC_SR		0x24
+#define SFC_RAWISR	0x28
+#define SFC_VER		0x2C
+#define SFC_QOP		0x30
+#define SFC_DMA_TRIGGER	0x80
+#define SFC_DMA_ADDR	0x84
+#define SFC_CMD		0x100
+#define SFC_ADDR	0x104
+#define SFC_DATA	0x108
+
+union SFCFSR_DATA {
+	u32 d32;
+	struct {
+		unsigned txempty : 1;
+		unsigned txfull :  1;
+		unsigned rxempty : 1;
+		unsigned rxfull :  1;
+		unsigned reserved7_4 : 4;
+		unsigned txlevel : 5;
+		unsigned reserved15_13 : 3;
+		unsigned rxlevel : 5;
+		unsigned reserved31_21 : 11;
+	} b;
+};
+
+/*------------------------------ Global Typedefs -----------------------------*/
+enum SFC_DATA_LINES {
+	DATA_LINES_X1 = 0,
+	DATA_LINES_X2,
+	DATA_LINES_X4
+};
+
+union SFCCTRL_DATA {
+	/* raw register data */
+	u32 d32;
+	/* register bits */
+	struct {
+		/* spi mode select */
+		unsigned mode : 1;
+		/*
+		 * Shift in phase selection
+		 * 0: shift in the flash data at posedge sclk_out
+		 * 1: shift in the flash data at negedge sclk_out
+		 */
+		unsigned sps : 1;
+		unsigned reserved3_2 : 2;
+		/* sclk_idle_level_cycles */
+		unsigned scic : 4;
+		/* Cmd bits number */
+		unsigned cmdlines : 2;
+		/* Address bits number */
+		unsigned addrlines : 2;
+		/* Data bits number */
+		unsigned datalines : 2;
+		/* this bit is not exit in regiseter, just use for code param */
+		unsigned enbledma : 1;
+		unsigned reserved15 : 1;
+		unsigned addrbits : 5;
+		unsigned reserved31_21 : 11;
+	} b;
+};
+
+union SFCCMD_DATA {
+	/* raw register data */
+	u32 d32;
+	/* register bits */
+	struct {
+		/* Command that will send to Serial Flash */
+		unsigned cmd : 8;
+		/* Dummy bits number */
+		unsigned dummybits : 4;
+		/* 0: read, 1: write */
+		unsigned rw : 1;
+		/* Continuous read mode */
+		unsigned readmode : 1;
+		/* Address bits number */
+		unsigned addrbits : 2;
+		/* Transferred bytes number */
+		unsigned datasize : 14;
+		/* Chip select */
+		unsigned cs : 2;
+	} b;
+};
+
+int sfc_init(void __iomem *reg_addr);
+int sfc_request(u32 sfcmd, u32 sfctrl, u32 addr, void *data);
+u16 sfc_get_version(void);
+void sfc_clean_irq(void);
+int rksfc_get_reg_addr(unsigned long *p_sfc_addr);
+
+#endif
diff --git a/drivers/rkflash/sfc_nor.c b/drivers/rkflash/sfc_nor.c
new file mode 100644
index 0000000000..bff5cdf8d3
--- /dev/null
+++ b/drivers/rkflash/sfc_nor.c
@@ -0,0 +1,612 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+#include <linux/delay.h>
+#include <linux/compat.h>
+#include <linux/string.h>
+
+#include "sfc_nor.h"
+#include "rkflash_debug.h"
+#include "rkflash_blk.h"
+
+static struct flash_info spi_flash_tbl[] = {
+	/* GD25Q32B */
+	{0xc84016, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 13, 9, 0},
+	/* GD25Q64B */
+	{0xc84017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 14, 9, 0},
+	/* GD25Q127C and GD25Q128C*/
+	{0xc84018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 9, 0},
+	/* GD25Q256B */
+	{0xc84019, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x1C, 16, 6, 0},
+	/* GD25Q512MC */
+	{0xc84020, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x1C, 17, 6, 0},
+	/* 25Q128FV */
+	{0xef4018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 9, 0},
+	/* 25Q256FV */
+	{0xef4019, 128, 8, 0x13, 0x02, 0x6C, 0x32, 0x20, 0xD8, 0x3C, 16, 9, 0},
+	/* XT25F128A */
+	{0x207018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x00, 15, 0, 0},
+	/* MX25L25635E/F */
+	{0xc22019, 128, 8, 0x03, 0x02, 0x6B, 0x38, 0x20, 0xD8, 0x30, 16, 6, 0},
+};
+
+static const u8 sfnor_dev_code[] = {
+	0x11,
+	0x12,
+	0x13,
+	0x14,
+	0x15,
+	0x16,
+	0x17,
+	0x18,
+	0x19
+};
+
+static const u32 sfnor_capacity[] = {
+	0x20000,        /* 128k-byte */
+	0x40000,        /* 256k-byte */
+	0x80000,        /* 512k-byte */
+	0x100000,       /* 1M-byte */
+	0x200000,       /* 2M-byte */
+	0x400000,       /* 4M-byte */
+	0x800000,       /* 8M-byte */
+	0x1000000,      /* 16M-byte */
+	0x2000000       /* 32M-byte */
+};
+
+static struct flash_info *g_spi_flash_info;
+
+static int snor_write_en(void)
+{
+	int ret;
+	union SFCCMD_DATA     sfcmd;
+
+	sfcmd.d32 = 0;
+	sfcmd.b.cmd = CMD_WRITE_EN;
+
+	ret = sfc_request(sfcmd.d32, 0, 0, NULL);
+
+	return ret;
+}
+
+static int snor_enter_4byte_mode(void)
+{
+	int ret;
+	union SFCCMD_DATA sfcmd;
+
+	sfcmd.d32 = 0;
+	sfcmd.b.cmd = CMD_ENTER_4BYTE_MODE;
+
+	ret = sfc_request(sfcmd.d32, 0, 0, NULL);
+	return ret;
+}
+
+static int snor_read_status(u32 reg_index, u8 *status)
+{
+	int ret;
+	union SFCCMD_DATA sfcmd;
+	u8 read_stat_cmd[] = {CMD_READ_STATUS,
+				CMD_READ_STATUS2, CMD_READ_STATUS3};
+	sfcmd.d32 = 0;
+	sfcmd.b.cmd = read_stat_cmd[reg_index];
+	sfcmd.b.datasize = 1;
+
+	ret = sfc_request(sfcmd.d32, 0, 0, status);
+
+	return ret;
+}
+
+static int snor_wait_busy(int timeout)
+{
+	int ret;
+	union SFCCMD_DATA sfcmd;
+	u32 i, status;
+
+	sfcmd.d32 = 0;
+	sfcmd.b.cmd = CMD_READ_STATUS;
+	sfcmd.b.datasize = 1;
+
+	for (i = 0; i < timeout; i++) {
+		ret = sfc_request(sfcmd.d32, 0, 0, &status);
+		if (ret != SFC_OK)
+			return ret;
+
+		if ((status & 0x01) == 0)
+			return SFC_OK;
+
+		sfc_delay(1);
+	}
+	PRINT_SFC_E("%s  error %x\n", __func__, timeout);
+
+	return SFC_BUSY_TIMEOUT;
+}
+
+static int snor_write_status2(u32 reg_index, u8 status)
+{
+	int ret;
+	union SFCCMD_DATA sfcmd;
+	u8 status2[2];
+	u8 read_index;
+
+	status2[reg_index] = status;
+	read_index = (reg_index == 0) ? 1 : 0;
+	ret = snor_read_status(read_index, &status2[read_index]);
+	if (ret != SFC_OK)
+		return ret;
+
+	snor_write_en();
+
+	sfcmd.d32 = 0;
+	sfcmd.b.cmd = CMD_WRITE_STATUS;
+	sfcmd.b.datasize = 2;
+	sfcmd.b.rw = SFC_WRITE;
+
+	ret = sfc_request(sfcmd.d32, 0, 0, &status2[0]);
+	if (ret != SFC_OK)
+		return ret;
+
+	ret = snor_wait_busy(10000);    /* 10ms */
+
+	return ret;
+}
+
+static int snor_write_status(u32 reg_index, u8 status)
+{
+	int ret;
+	union SFCCMD_DATA sfcmd;
+	u8 write_stat_cmd[] = {CMD_WRITE_STATUS,
+			       CMD_WRITE_STATUS2, CMD_WRITE_STATUS3};
+	snor_write_en();
+	sfcmd.d32 = 0;
+	sfcmd.b.cmd = write_stat_cmd[reg_index];
+	sfcmd.b.datasize = 1;
+	sfcmd.b.rw = SFC_WRITE;
+
+	ret = sfc_request(sfcmd.d32, 0, 0, &status);
+	if (ret != SFC_OK)
+		return ret;
+
+	ret = snor_wait_busy(10000);    /* 10ms */
+
+	return ret;
+}
+
+static int snor_erase(struct SFNOR_DEV *p_dev,
+		      u32 addr,
+		      enum NOR_ERASE_TYPE erase_type)
+{
+	int ret;
+	union SFCCMD_DATA sfcmd;
+	int timeout[] = {400, 2000, 40000};   /* ms */
+
+	if (erase_type > ERASE_CHIP)
+		return SFC_PARAM_ERR;
+
+	sfcmd.d32 = 0;
+	if (erase_type == ERASE_BLOCK64K)
+		sfcmd.b.cmd = p_dev->blk_erase_cmd;
+	else if (erase_type == ERASE_SECTOR)
+		sfcmd.b.cmd = p_dev->sec_erase_cmd;
+	else
+		sfcmd.b.cmd = CMD_CHIP_ERASE;
+
+	sfcmd.b.addrbits = (erase_type != ERASE_CHIP) ?
+				SFC_ADDR_24BITS : SFC_ADDR_0BITS;
+	if ((p_dev->addr_mode == ADDR_MODE_4BYTE) && (erase_type != ERASE_CHIP))
+		sfcmd.b.addrbits = SFC_ADDR_32BITS;
+
+	snor_write_en();
+
+	ret = sfc_request(sfcmd.d32, 0, addr, NULL);
+	if (ret != SFC_OK)
+		return ret;
+
+	ret = snor_wait_busy(timeout[erase_type] * 1000);
+	return ret;
+}
+
+static int snor_prog_page(struct SFNOR_DEV *p_dev,
+			  u32 addr,
+			  void *p_data,
+			  u32 size)
+{
+	int ret;
+	union SFCCMD_DATA sfcmd;
+	union SFCCTRL_DATA sfctrl;
+
+	sfcmd.d32 = 0;
+	sfcmd.b.cmd = p_dev->prog_cmd;
+	sfcmd.b.addrbits = SFC_ADDR_24BITS;
+	sfcmd.b.datasize = size;
+	sfcmd.b.rw = SFC_WRITE;
+
+	sfctrl.d32 = 0;
+	sfctrl.b.datalines = p_dev->prog_lines;
+	sfctrl.b.enbledma = 0;
+	if (p_dev->prog_cmd == CMD_PAGE_PROG_A4)
+		sfctrl.b.addrlines = SFC_4BITS_LINE;
+
+	if (p_dev->addr_mode == ADDR_MODE_4BYTE)
+		sfcmd.b.addrbits = SFC_ADDR_32BITS;
+
+	snor_write_en();
+
+	ret = sfc_request(sfcmd.d32, sfctrl.d32, addr, p_data);
+	if (ret != SFC_OK)
+		return ret;
+
+	ret = snor_wait_busy(10000);
+
+	return ret;
+}
+
+static int snor_prog(struct SFNOR_DEV *p_dev, u32 addr, void *p_data, u32 size)
+{
+	int ret = SFC_OK;
+	u32 page_size, len;
+	u8 *p_buf =  (u8 *)p_data;
+
+	page_size = NOR_PAGE_SIZE;
+	while (size) {
+		len = page_size < size ? page_size : size;
+		ret = snor_prog_page(p_dev, addr, p_buf, len);
+		if (ret != SFC_OK)
+			return ret;
+
+		size -= len;
+		addr += len;
+		p_buf += len;
+	}
+
+	return ret;
+}
+
+static int snor_enable_QE(struct SFNOR_DEV *p_dev)
+{
+	int ret = SFC_OK;
+	int reg_index;
+	int bit_offset;
+	u8 status;
+
+	if (p_dev->manufacturer == MID_GIGADEV ||
+	    p_dev->manufacturer == MID_WINBOND) {
+		reg_index = p_dev->QE_bits >> 3;
+		bit_offset = p_dev->QE_bits & 0x7;
+		ret = snor_read_status(reg_index, &status);
+		if (ret != SFC_OK)
+			return ret;
+
+		if (status & (1 << bit_offset))   /* is QE bit set */
+			return SFC_OK;
+
+		status |= (1 << bit_offset);
+		return p_dev->write_status(reg_index, status);
+	}
+
+	return ret;
+}
+
+#if (SNOR_4BIT_DATA_DETECT_EN)
+static int snor_set_dlines(struct SFNOR_DEV *p_dev, enum SFC_DATA_LINES lines)
+{
+	int ret;
+	u8 read_cmd[] = {CMD_FAST_READ_X1, CMD_FAST_READ_X2, CMD_FAST_READ_X4};
+
+	if (lines == DATA_LINES_X4) {
+		ret = snor_enable_QE(p_dev);
+		if (ret != SFC_OK)
+			return ret;
+	}
+
+	p_dev->read_lines = lines;
+	p_dev->read_cmd = read_cmd[lines];
+
+	if (p_dev->manufacturer == MID_GIGADEV ||
+	    p_dev->manufacturer == MID_WINBOND ||
+	    p_dev->manufacturer == MID_MACRONIX) {
+		p_dev->prog_lines = (lines != DATA_LINES_X2) ?
+				     lines : DATA_LINES_X1;
+		if (lines == DATA_LINES_X1) {
+			p_dev->prog_cmd = CMD_PAGE_PROG;
+		} else {
+			if (p_dev->manufacturer == MID_GIGADEV ||
+			    p_dev->manufacturer == MID_WINBOND)
+				p_dev->prog_cmd = CMD_PAGE_PROG_X4;
+			else
+				p_dev->prog_cmd = CMD_PAGE_PROG_A4;
+		}
+	}
+
+	return SFC_OK;
+}
+#endif
+
+static int snor_read_data(struct SFNOR_DEV *p_dev,
+			  u32 addr,
+			  void *p_data,
+			  u32 size)
+{
+	int ret;
+	union SFCCMD_DATA sfcmd;
+	union SFCCTRL_DATA sfctrl;
+
+	sfcmd.d32 = 0;
+	sfcmd.b.cmd = p_dev->read_cmd;
+	sfcmd.b.datasize = size;
+	sfcmd.b.addrbits = SFC_ADDR_24BITS;
+
+	sfctrl.d32 = 0;
+	sfctrl.b.datalines = p_dev->read_lines;
+	if (!(size & 0x3) && size >= 4)
+		sfctrl.b.enbledma = 0;
+
+	if (p_dev->read_cmd == CMD_FAST_READ_X1 ||
+	    p_dev->read_cmd == CMD_FAST_READ_X4 ||
+	    p_dev->read_cmd == CMD_FAST_READ_X2 ||
+	    p_dev->read_cmd == CMD_FAST_4READ_X4) {
+		sfcmd.b.dummybits = 8;
+	} else if (p_dev->read_cmd == CMD_FAST_READ_A4) {
+		sfcmd.b.addrbits = SFC_ADDR_32BITS;
+		addr = (addr << 8) | 0xFF;	/* Set M[7:0] = 0xFF */
+		sfcmd.b.dummybits = 4;
+		sfctrl.b.addrlines = SFC_4BITS_LINE;
+	}
+
+	if (p_dev->addr_mode == ADDR_MODE_4BYTE)
+		sfcmd.b.addrbits = SFC_ADDR_32BITS;
+
+	ret = sfc_request(sfcmd.d32, sfctrl.d32, addr, p_data);
+
+	return ret;
+}
+
+int snor_read(struct SFNOR_DEV *p_dev, u32 sec, u32 n_sec, void *p_data)
+{
+	int ret = SFC_OK;
+	u32 addr, size, len;
+	u8 *p_buf =  (u8 *)p_data;
+
+	if ((sec + n_sec) > p_dev->capacity)
+		return SFC_PARAM_ERR;
+
+	mutex_lock(&p_dev->lock);
+	addr = sec << 9;
+	size = n_sec << 9;
+	while (size) {
+		len = size < SFC_MAX_IOSIZE ? size : SFC_MAX_IOSIZE;
+		ret = snor_read_data(p_dev, addr, p_buf, len);
+		if (ret != SFC_OK) {
+			PRINT_SFC_E("snor_read_data %x ret= %x\n",
+				    addr >> 9, ret);
+			goto out;
+		}
+
+		size -= len;
+		addr += len;
+		p_buf += len;
+	}
+out:
+	mutex_unlock(&p_dev->lock);
+	if (!ret)
+		ret = n_sec;
+
+	return ret;
+}
+
+int snor_write(struct SFNOR_DEV *p_dev, u32 sec, u32 n_sec, const void *p_data)
+{
+	int ret = SFC_OK;
+	u32 len, blk_size, offset;
+	u8 *p_buf =  (u8 *)p_data;
+
+	if ((sec + n_sec) > p_dev->capacity)
+		return SFC_PARAM_ERR;
+
+	mutex_lock(&p_dev->lock);
+	while (n_sec) {
+		if (sec < 512 || sec >= p_dev->capacity  - 512)
+			blk_size = 8;
+		else
+			blk_size = p_dev->blk_size;
+
+		offset = (sec & (blk_size - 1));
+		if (!offset) {
+			ret = snor_erase(p_dev, sec << 9, (blk_size == 8) ?
+				ERASE_SECTOR : ERASE_BLOCK64K);
+			if (ret != SFC_OK) {
+				PRINT_SFC_E("snor_erase %x ret= %x\n",
+					    sec, ret);
+				goto out;
+			}
+		}
+		len = (blk_size - offset) < n_sec ?
+		      (blk_size - offset) : n_sec;
+		ret = snor_prog(p_dev, sec << 9, p_buf, len << 9);
+		if (ret != SFC_OK) {
+			PRINT_SFC_E("snor_prog %x ret= %x\n", sec, ret);
+			goto out;
+		}
+		n_sec -= len;
+		sec += len;
+		p_buf += len << 9;
+	}
+out:
+	mutex_unlock(&p_dev->lock);
+	if (!ret)
+		ret = n_sec;
+
+	return ret;
+}
+
+static int snor_read_id(u8 *data)
+{
+	int ret;
+	union SFCCMD_DATA     sfcmd;
+
+	sfcmd.d32 = 0;
+	sfcmd.b.cmd = CMD_READ_JEDECID;
+	sfcmd.b.datasize = 3;
+
+	ret = sfc_request(sfcmd.d32, 0, 0, data);
+
+	return ret;
+}
+
+static int snor_read_parameter(u32 addr, u8 *data)
+{
+	int ret;
+	union SFCCMD_DATA     sfcmd;
+
+	sfcmd.d32 = 0;
+	sfcmd.b.cmd = CMD_READ_PARAMETER;
+	sfcmd.b.datasize = 1;
+	sfcmd.b.addrbits = SFC_ADDR_24BITS;
+	sfcmd.b.dummybits = 8;
+
+	ret = sfc_request(sfcmd.d32, 0, addr, data);
+
+	return ret;
+}
+
+u32 snor_get_capacity(struct SFNOR_DEV *p_dev)
+{
+	return p_dev->capacity;
+}
+
+static void snor_print_spi_chip_info(struct SFNOR_DEV *p_dev)
+{
+	PRINT_SFC_I("addr_mode: %x\n", p_dev->addr_mode);
+	PRINT_SFC_I("read_lines: %x\n", p_dev->read_lines);
+	PRINT_SFC_I("prog_lines: %x\n", p_dev->prog_lines);
+	PRINT_SFC_I("read_cmd: %x\n", p_dev->read_cmd);
+	PRINT_SFC_I("prog_cmd: %x\n", p_dev->prog_cmd);
+	PRINT_SFC_I("blk_erase_cmd: %x\n", p_dev->blk_erase_cmd);
+	PRINT_SFC_I("sec_erase_cmd: %x\n", p_dev->sec_erase_cmd);
+}
+
+static struct flash_info *snor_get_flash_info(u8 *flash_id)
+{
+	u32 i;
+	u32 id = (flash_id[0] << 16) | (flash_id[1] << 8) | (flash_id[2] << 0);
+
+	for (i = 0;
+		i < (sizeof(spi_flash_tbl) / sizeof(struct flash_info));
+		i++) {
+		if (spi_flash_tbl[i].id == id)
+			return &spi_flash_tbl[i];
+	}
+	return NULL;
+}
+
+/* Adjust flash info in ram base on parameter */
+static void *snor_flash_info_adjust(struct flash_info *spi_flash_info)
+{
+	u32 addr;
+	u8 para_version;
+
+	if (spi_flash_info->id == 0xc84019) {
+		addr = 0x09;
+		snor_read_parameter(addr, &para_version);
+		if (para_version == 0x06) {
+			spi_flash_info->QE_bits = 9;
+			spi_flash_info->prog_cmd_4 = 0x34;
+		}
+	}
+	return 0;
+}
+
+int snor_init(struct SFNOR_DEV *p_dev)
+{
+	int i;
+	u8 id_byte[5];
+	int err;
+
+	memset(p_dev, 0, sizeof(struct SFNOR_DEV));
+	snor_read_id(id_byte);
+	PRINT_SFC_E("sfc nor id: %x %x %x\n",
+		    id_byte[0], id_byte[1], id_byte[2]);
+	if (0xFF == id_byte[0] || 0x00 == id_byte[0]) {
+		err = SFC_ERROR;
+		goto err_out;
+	}
+
+	p_dev->manufacturer = id_byte[0];
+	p_dev->mem_type = id_byte[1];
+
+	mutex_init(&p_dev->lock);
+	g_spi_flash_info = snor_get_flash_info(id_byte);
+	if (g_spi_flash_info) {
+		snor_flash_info_adjust(g_spi_flash_info);
+		p_dev->capacity = 1 << g_spi_flash_info->density;
+		p_dev->blk_size = g_spi_flash_info->block_size;
+		p_dev->page_size = NOR_SECS_PAGE;
+		p_dev->read_cmd = g_spi_flash_info->read_cmd;
+		p_dev->prog_cmd = g_spi_flash_info->prog_cmd;
+		p_dev->sec_erase_cmd = g_spi_flash_info->sector_erase_cmd;
+		p_dev->blk_erase_cmd = g_spi_flash_info->block_erase_cmd;
+		p_dev->prog_lines = DATA_LINES_X1;
+		p_dev->read_lines = DATA_LINES_X1;
+		p_dev->QE_bits = g_spi_flash_info->QE_bits;
+
+		i = g_spi_flash_info->feature & FEA_READ_STATUE_MASK;
+		if (i == 0)
+			p_dev->write_status = snor_write_status;
+		else
+			p_dev->write_status = snor_write_status2;
+		if (g_spi_flash_info->feature & FEA_4BIT_READ) {
+			if (snor_enable_QE(p_dev) == SFC_OK) {
+				p_dev->read_lines = DATA_LINES_X4;
+				p_dev->read_cmd = g_spi_flash_info->read_cmd_4;
+			}
+		}
+		if ((g_spi_flash_info->feature & FEA_4BIT_PROG) &&
+		    (p_dev->read_lines == DATA_LINES_X4)) {
+			p_dev->prog_lines = DATA_LINES_X4;
+			p_dev->prog_cmd = g_spi_flash_info->prog_cmd_4;
+		}
+
+		if (g_spi_flash_info->feature & FEA_4BYTE_ADDR)
+			p_dev->addr_mode = ADDR_MODE_4BYTE;
+
+		if ((g_spi_flash_info->feature & FEA_4BYTE_ADDR_MODE))
+			snor_enter_4byte_mode();
+
+		goto normal_out;
+	}
+
+	for (i = 0; i < sizeof(sfnor_dev_code); i++) {
+		if (id_byte[2] == sfnor_dev_code[i]) {
+			p_dev->capacity = sfnor_capacity[i] >> 9;
+			break;
+		}
+	}
+
+	if (i >= sizeof(sfnor_dev_code)) {
+		err = SFC_ERROR;
+		goto err_out;
+	}
+
+	p_dev->QE_bits = 9;
+	p_dev->blk_size = NOR_SECS_BLK;
+	p_dev->page_size = NOR_SECS_PAGE;
+	p_dev->read_cmd = CMD_READ_DATA;
+	p_dev->prog_cmd = CMD_PAGE_PROG;
+	p_dev->sec_erase_cmd = CMD_SECTOR_ERASE;
+	p_dev->blk_erase_cmd = CMD_BLOCK_ERASE;
+	p_dev->write_status = snor_write_status2;
+	#if (SNOR_4BIT_DATA_DETECT_EN)
+	snor_set_dlines(p_dev, DATA_LINES_X4);
+	#endif
+
+normal_out:
+	snor_print_spi_chip_info(p_dev);
+
+	return SFC_OK;
+
+err_out:
+	return err;
+}
+
diff --git a/drivers/rkflash/sfc_nor.h b/drivers/rkflash/sfc_nor.h
new file mode 100644
index 0000000000..6f36358898
--- /dev/null
+++ b/drivers/rkflash/sfc_nor.h
@@ -0,0 +1,154 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+#ifndef _SFNOR_H
+#define _SFNOR_H
+
+#include "sfc.h"
+
+/* Four line data transmission detection */
+#define SNOR_4BIT_DATA_DETECT_EN	0
+
+#define NOR_PAGE_SIZE		256
+#define NOR_BLOCK_SIZE		(64 * 1024)
+#define NOR_SECS_BLK		(NOR_BLOCK_SIZE / 512)
+#define NOR_SECS_PAGE		4
+
+#define FEA_READ_STATUE_MASK	(0x3 << 0)
+#define FEA_STATUE_MODE1	0
+#define FEA_STATUE_MODE2	1
+#define FEA_4BIT_READ		BIT(2)
+#define FEA_4BIT_PROG		BIT(3)
+#define FEA_4BYTE_ADDR		BIT(4)
+#define FEA_4BYTE_ADDR_MODE	BIT(5)
+
+/*Manufactory ID*/
+#define MID_WINBOND             0xEF
+#define MID_GIGADEV             0xC8
+#define MID_MICRON              0x2C
+#define MID_MACRONIX            0xC2
+#define MID_SPANSION            0x01
+#define MID_EON                 0x1C
+#define MID_ST                  0x20
+
+/*Command Set*/
+#define CMD_READ_JEDECID        (0x9F)
+#define CMD_READ_DATA           (0x03)
+#define CMD_READ_STATUS         (0x05)
+#define CMD_WRITE_STATUS        (0x01)
+#define CMD_PAGE_PROG           (0x02)
+#define CMD_SECTOR_ERASE        (0x20)
+#define CMD_BLK64K_ERASE        (0xD8)
+#define CMD_BLK32K_ERASE        (0x52)
+#define CMD_CHIP_ERASE          (0xC7)
+#define CMD_WRITE_EN            (0x06)
+#define CMD_WRITE_DIS           (0x04)
+#define CMD_PAGE_READ           (0x13)
+#define CMD_GET_FEATURE         (0x0F)
+#define CMD_SET_FEATURE         (0x1F)
+#define CMD_PROG_LOAD           (0x02)
+#define CMD_PROG_EXEC           (0x10)
+#define CMD_BLOCK_ERASE         (0xD8)
+#define CMD_READ_DATA_X2        (0x3B)
+#define CMD_READ_DATA_X4        (0x6B)
+#define CMD_PROG_LOAD_X4        (0x32)
+#define CMD_READ_STATUS2        (0x35)
+#define CMD_READ_STATUS3        (0x15)
+#define CMD_WRITE_STATUS2       (0x31)
+#define CMD_WRITE_STATUS3       (0x11)
+/* X1 cmd, X1 addr, X1 data */
+#define CMD_FAST_READ_X1        (0x0B)
+/* X1 cmd, X1 addr, X2 data */
+#define CMD_FAST_READ_X2        (0x3B)
+/* X1 cmd, X1 addr, X4 data SUPPORT GD MARCONIX WINBOND */
+#define CMD_FAST_READ_X4        (0x6B)
+/* X1 cmd, X1 addr, X4 data SUPPORT GD MARCONIX WINBOND */
+#define CMD_FAST_4READ_X4       (0x6C)
+/* X1 cmd, X4 addr, X4 data SUPPORT EON GD MARCONIX WINBOND */
+#define CMD_FAST_READ_A4        (0xEB)
+/* X1 cmd, X1 addr, X4 data, SUPPORT GD WINBOND */
+#define CMD_PAGE_PROG_X4        (0x32)
+/* X1 cmd, X4 addr, X4 data, SUPPORT MARCONIX */
+#define CMD_PAGE_PROG_A4        (0x38)
+#define CMD_RESET_NAND          (0xFF)
+#define CMD_ENTER_4BYTE_MODE    (0xB7)
+#define CMD_EXIT_4BYTE_MODE     (0xE9)
+#define CMD_ENABLE_RESER	(0x66)
+#define CMD_RESET_DEVICE	(0x99)
+#define CMD_READ_PARAMETER	(0x5A)
+
+enum NOR_ERASE_TYPE {
+	ERASE_SECTOR = 0,
+	ERASE_BLOCK64K,
+	ERASE_CHIP
+};
+
+enum SNOR_IO_MODE {
+	IO_MODE_SPI = 0,
+	IO_MODE_QPI
+};
+
+enum SNOR_READ_MODE {
+	READ_MODE_NOMAL = 0,
+	READ_MODE_FAST
+};
+
+enum SNOR_ADDR_MODE {
+	ADDR_MODE_3BYTE = 0,
+	ADDR_MODE_4BYTE
+};
+
+typedef int (*SNOR_WRITE_STATUS)(u32 reg_index, u8 status);
+
+struct SFNOR_DEV {
+	u32	capacity;
+	u8	manufacturer;
+	u8	mem_type;
+	u16	page_size;
+	u32	blk_size;
+
+	u8	read_cmd;
+	u8	prog_cmd;
+	u8	sec_erase_cmd;
+	u8	blk_erase_cmd;
+	u8	QE_bits;
+
+	enum SNOR_READ_MODE  read_mode;
+	enum SNOR_ADDR_MODE  addr_mode;
+	enum SNOR_IO_MODE    io_mode;
+
+	enum SFC_DATA_LINES read_lines;
+	enum SFC_DATA_LINES prog_lines;
+
+	SNOR_WRITE_STATUS write_status;
+	struct mutex	lock; /* to lock this object */
+};
+
+struct flash_info {
+	u32 id;
+
+	u8 block_size;
+	u8 sector_size;
+	u8 read_cmd;
+	u8 prog_cmd;
+
+	u8 read_cmd_4;
+	u8 prog_cmd_4;
+	u8 sector_erase_cmd;
+	u8 block_erase_cmd;
+
+	u8 feature;
+	u8 density;  /* (1 << density) sectors*/
+	u8 QE_bits;
+	u8 reserved2;
+};
+
+int snor_init(struct SFNOR_DEV *p_dev);
+u32 snor_get_capacity(struct SFNOR_DEV *p_dev);
+int snor_read(struct SFNOR_DEV *p_dev, u32 sec, u32 n_sec, void *p_data);
+int snor_write(struct SFNOR_DEV *p_dev, u32 sec, u32 n_sec, const void *p_data);
+
+#endif

commit 31c3ca322364af828f27d3bddf70a3e2d957d1d8
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed May 9 17:12:42 2018 +0800

    rockchip: config: add RKIMG_DET_BOOTDEV in soc headers
    
    Change-Id: Ibf535e9b40b019888bdf8af1a660f8453d19db7d
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h
index ca4a21cfce..9d1df8360d 100644
--- a/include/configs/rk3128_common.h
+++ b/include/configs/rk3128_common.h
@@ -62,6 +62,7 @@
 	ENV_MEM_LAYOUT_SETTINGS \
 	"partitions=" PARTS_DEFAULT \
 	ROCKCHIP_DEVICE_SETTINGS \
+	RKIMG_DET_BOOTDEV \
 	BOOTENV
 
 #endif
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index 4eb2c702b2..b0eed9b4eb 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -85,6 +85,7 @@
 	"partitions=" PARTS_DEFAULT \
 	ENV_MEM_LAYOUT_SETTINGS \
 	ROCKCHIP_DEVICE_SETTINGS \
+	RKIMG_DET_BOOTDEV \
 	BOOTENV
 #endif
 
diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h
index ae78a2a521..37e8128bf3 100644
--- a/include/configs/rk3308_common.h
+++ b/include/configs/rk3308_common.h
@@ -60,6 +60,7 @@
 	ENV_MEM_LAYOUT_SETTINGS \
 	"partitions=" PARTS_DEFAULT \
 	ROCKCHIP_DEVICE_SETTINGS \
+	RKIMG_DET_BOOTDEV \
 	BOOTENV
 
 #endif
diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index 05415be6d7..2f582a150a 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -68,6 +68,7 @@
 	ENV_MEM_LAYOUT_SETTINGS \
 	"partitions=" PARTS_DEFAULT \
 	ROCKCHIP_DEVICE_SETTINGS \
+	RKIMG_DET_BOOTDEV \
 	BOOTENV
 
 #endif

commit 8bce816a34a9c3d49d338cecd353bbf476382e3b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed May 9 17:03:26 2018 +0800

    rockchip: boot-mode: set default dev type/num if command fail
    
    The 'rkimg_bootdev' may fail or not defined, we need to set a
    default value for dev type/num in this case.
    
    Change-Id: Ied768bca0b1a555baa413d11ed0bee92897684dd
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index 223f823336..9aa425a31d 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -68,13 +68,20 @@ __weak int rockchip_dnl_key_pressed(void)
 void devtype_num_envset(void)
 {
 	static int done = 0;
+	int ret = 0;
 
 	if (done)
 		return;
 
 	const char *devtype_num_set = "run rkimg_bootdev";
 
-	run_command_list(devtype_num_set, -1, 0);
+	ret = run_command_list(devtype_num_set, -1, 0);
+	if (ret) {
+		/* Set default dev type/num if command not valid */
+		env_set("devtype", "mmc");
+		env_set("devnum", "0");
+	}
+
 	done = 1;
 }
 

commit a66fd6dcbc6344967fabd3e7a5f8ec6bb585d0e2
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue May 8 16:15:27 2018 +0800

    rockchip: px30: do not switch UART iomux in U-Boot proper
    
    pre-loader should already set the correct UART iomux, but not set the
    m0/m1 select;
    The UART2 and SD card share the IO in PX30, so we can not swith it in
    case the SD card is using it and pinctrl does not work properly at
    very beginning.
    
    Change-Id: I9c757b6e14dbe671c121b0068db0c21c1b670545
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c
index e23e456bd3..42c9d5f5e2 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -48,11 +48,14 @@ int arch_cpu_init(void)
 void board_debug_uart_init(void)
 {
 static struct px30_grf * const grf = (void *)GRF_BASE;
+#ifdef CONFIG_SPL_BUILD
+	/* Do not set the iomux in U-Boot proper because SD card may using it */
 	/* Enable early UART2 channel m0 on the px30 */
 	rk_clrsetreg(&grf->gpio1dl_iomux,
 		     GPIO1D3_MASK | GPIO1D2_MASK,
 		     GPIO1D3_UART2_RXM0 << GPIO1D3_SHIFT |
 		     GPIO1D2_UART2_TXM0 << GPIO1D2_SHIFT);
+#endif
 	/* Set channel C as UART2 input */
 	rk_clrsetreg(&grf->iofunc_con0,
 		     CON_IOMUX_UART2SEL_MASK,

commit 299df30d6dc56f85d1cf0b4702ed8f407b660928
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Apr 28 16:56:12 2018 +0800

    rockchip: boot_mode: get the bootdev detect command from env
    
    Define command list in header env instead of C source.
    
    Change-Id: I781d86588f4981347233f4e1b6c63b0dbef98e08
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index a0c4919611..223f823336 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -72,10 +72,7 @@ void devtype_num_envset(void)
 	if (done)
 		return;
 
-	const char *devtype_num_set =
-	"if mmc dev 0; then setenv devtype mmc; setenv devnum 0;"
-	"else if rknand dev 0; then setenv devtype rknand; setenv devnum 0; fi;"
-	"fi;";
+	const char *devtype_num_set = "run rkimg_bootdev";
 
 	run_command_list(devtype_num_set, -1, 0);
 	done = 1;
diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index f2bbef6371..9b93951315 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -60,6 +60,7 @@
 	ENV_MEM_LAYOUT_SETTINGS \
 	"partitions=" PARTS_DEFAULT \
 	ROCKCHIP_DEVICE_SETTINGS \
+	RKIMG_DET_BOOTDEV \
 	BOOTENV
 
 #endif
diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index 368a970162..e285700747 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -84,6 +84,17 @@
 	"name=security,size=2M,uuid=${uuid_gpt_security};" \
 	"name=userdata,size=-,uuid=${uuid_gpt_userdata};\0"
 
+#define RKIMG_DET_BOOTDEV \
+	"rkimg_bootdev=" \
+	"if mmc dev 1; then " \
+		"if rkimgtest mmc 1; then " \
+		"setenv devtype mmc; setenv devnum 1; echo Boot from SDcard; fi;" \
+	"elif mmc dev 0; then " \
+		"setenv devtype mmc; setenv devnum 0;" \
+	"elif rknand dev 0; then " \
+		"setenv devtype rknand; setenv devnum 0;" \
+	"fi; \0"
+
 #define RKIMG_BOOTCOMMAND \
 	"boot_android ${devtype} ${devnum};" \
 	"bootrkp;" \

commit 3671d25201a55d7f16b403083e70f056d8ea4f80
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue May 8 16:01:50 2018 +0800

    cmd: bootrkp: fix check blk_dread return value error
    
    Change-Id: Ib283c2eeb982479914f8c806f7b54bf081f4c9be
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/cmd/bootrkp.c b/cmd/bootrkp.c
index cf8d2f81a2..c97e44f4db 100644
--- a/cmd/bootrkp.c
+++ b/cmd/bootrkp.c
@@ -93,7 +93,7 @@ static int do_rkimg_test(cmd_tbl_t *cmdtp, int flag, int argc,
 	buffer = memalign(ARCH_DMA_MINALIGN, 1024);
 	/* Read one block from begining of IDB data */
 	ret = blk_dread(dev_desc, 64, 2, buffer);
-	if (ret != 1) {
+	if (ret != 2) {
 		printf("%s fail to read data from IDB\n", __func__);
 		free(buffer);
 		return CMD_RET_FAILURE;

commit c0ef3541fa9a294ba36809fd677529ed44baf867
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Wed Apr 4 09:25:00 2018 +0800

    arm: dts: rockchip: add display demo for rk3308 evb
    
    Change-Id: Ie1edd2bdc10a11fbce264b6508d69bcfe567cc44
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-evb.dts b/arch/arm/dts/rk3308-evb.dts
index b787ef8687..3ee81a23f4 100644
--- a/arch/arm/dts/rk3308-evb.dts
+++ b/arch/arm/dts/rk3308-evb.dts
@@ -7,6 +7,7 @@
 /dts-v1/;
 #include "rk3308.dtsi"
 #include <dt-bindings/input/input.h>
+#include <linux/media-bus-format.h>
 
 / {
 	model = "Rockchip RK3308 EVB";
@@ -68,6 +69,192 @@
 		};
 	};
 
+	backlight: backlight {
+		status = "disabled";
+		compatible = "pwm-backlight";
+		pwms = <&pwm1 0 25000 0>;
+		brightness-levels = <
+			  0   1   2   3   4   5   6   7
+			  8   9  10  11  12  13  14  15
+			 16  17  18  19  20  21  22  23
+			 24  25  26  27  28  29  30  31
+			 32  33  34  35  36  37  38  39
+			 40  41  42  43  44  45  46  47
+			 48  49  50  51  52  53  54  55
+			 56  57  58  59  60  61  62  63
+			 64  65  66  67  68  69  70  71
+			 72  73  74  75  76  77  78  79
+			 80  81  82  83  84  85  86  87
+			 88  89  90  91  92  93  94  95
+			 96  97  98  99 100 101 102 103
+			104 105 106 107 108 109 110 111
+			112 113 114 115 116 117 118 119
+			120 121 122 123 124 125 126 127
+			128 129 130 131 132 133 134 135
+			136 137 138 139 140 141 142 143
+			144 145 146 147 148 149 150 151
+			152 153 154 155 156 157 158 159
+			160 161 162 163 164 165 166 167
+			168 169 170 171 172 173 174 175
+			176 177 178 179 180 181 182 183
+			184 185 186 187 188 189 190 191
+			192 193 194 195 196 197 198 199
+			200 201 202 203 204 205 206 207
+			208 209 210 211 212 213 214 215
+			216 217 218 219 220 221 222 223
+			224 225 226 227 228 229 230 231
+			232 233 234 235 236 237 238 239
+			240 241 242 243 244 245 246 247
+			248 249 250 251 252 253 254 255>;
+		default-brightness-level = <200>;
+	};
+
+	panel: panel {
+		compatible = "simple-panel";
+		bus-format = <MEDIA_BUS_FMT_RGB666_1X18>;
+		backlight = <&backlight>;
+		/* enable-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>; */
+		enable-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
+		enable-delay-ms = <20>;
+		reset-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_LOW>;
+		reset-value = <0>;
+		reset-delay-ms = <10>;
+		prepare-delay-ms = <20>;
+		unprepare-delay-ms = <20>;
+		disable-delay-ms = <20>;
+		/* spi-sdo-gpios = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; */
+		spi-sdi-gpios = <&gpio1 RK_PC7 GPIO_ACTIVE_HIGH>;
+		spi-scl-gpios = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
+		spi-cs-gpios = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>;
+		width-mm = <217>;
+		height-mm = <136>;
+		rockchip,data-mapping = "vesa";
+		rockchip,data-width = <18>;
+		rockchip,output = "rgb";
+		status = "disabled";
+		pinctrl-names = "default";
+		pinctrl-0 = <&spi_init_cmd>;
+		rockchip,cmd-type = "spi";
+
+		/* type:0 is cmd, 1 is data */
+		panel-init-sequence = [
+			/* type delay num val1 val2 val3 */
+			  00   00  01  e0
+			  01   00  01  00
+			  01   00  01  07
+			  01   00  01  0f
+			  01   00  01  0d
+			  01   00  01  1b
+			  01   00  01  0a
+			  01   00  01  3c
+			  01   00  01  78
+			  01   00  01  4a
+			  01   00  01  07
+			  01   00  01  0e
+			  01   00  01  09
+			  01   00  01  1b
+			  01   00  01  1e
+			  01   00  01  0f
+			  00   00  01  e1
+			  01   00  01  00
+			  01   00  01  22
+			  01   00  01  24
+			  01   00  01  06
+			  01   00  01  12
+			  01   00  01  07
+			  01   00  01  36
+			  01   00  01  47
+			  01   00  01  47
+			  01   00  01  06
+			  01   00  01  0a
+			  01   00  01  07
+			  01   00  01  30
+			  01   00  01  37
+			  01   00  01  0f
+
+			  00   00  01  c0
+			  01   00  01  10
+			  01   00  01  10
+
+			  00   00  01  c1
+			  01   00  01  41
+
+			  00   00  01  c5
+			  01   00  01  00
+			  01   00  01  22
+			  01   00  01  80
+
+			  00   00  01  36
+			  01   00  01  48
+
+			  00   00  01  3a  /* interface mode control */
+			  01   00  01  66
+
+			  00   00  01  b0  /* interface mode control */
+			  01   00  01  00
+
+			  00   00  01  b1  /* frame rate 70hz */
+			  01   00  01  b0
+			  01   00  01  11
+			  00   00  01  b4
+			  01   00  01  02
+			  00   00  01  B6  /* RGB/MCU Interface Control */
+			  01   00  01  32  /* 02 mcu, 32 rgb */
+			  01   00  01  02
+
+			  00   00  01  b7
+			  01   00  01  c6
+
+			  00   00  01  be
+			  01   00  01  00
+			  01   00  01  04
+
+			  00   00  01  e9
+			  01   00  01  00
+
+			  00   00  01  f7
+			  01   00  01  a9
+			  01   00  01  51
+			  01   00  01  2c
+			  01   00  01  82
+
+			  00   78  01  11
+			  00   00  01  29
+		];
+
+		panel-exit-sequence = [
+			/* type delay num val1 val2 val3 */
+			00   0a  01  28
+			00   78  01  10
+		];
+
+		display-timings {
+			native-mode = <&kd050fwfba002_timing>;
+
+			kd050fwfba002_timing: timing0 {
+				clock-frequency = <11000000>;
+				hactive = <320>;
+				vactive = <480>;
+				hback-porch = <10>;
+				hfront-porch = <4>;
+				vback-porch = <10>;
+				vfront-porch = <4>;
+				hsync-len = <20>;
+				vsync-len = <20>;
+				hsync-active = <0>;
+				vsync-active = <0>;
+				de-active = <0>;
+				pixelclk-active = <0>;
+			};
+		};
+
+		port {
+			panel_in_rgb: endpoint {
+				remote-endpoint = <&rgb_out_panel>;
+			};
+		};
+	};
+
 	vdd_log: vdd_core: vdd-core {
 		compatible = "pwm-regulator";
 		pwms = <&pwm0 0 5000 1>;
@@ -122,3 +309,46 @@
 &usb20_otg {
 	status = "okay";
 };
+
+&rgb {
+	status = "disabled";
+};
+
+&route_rgb {
+	status = "disabled";
+};
+
+&vop {
+	status = "disabled";
+};
+
+&rgb {
+	status = "disabled";
+
+	ports {
+		rgb_out: port@1 {
+			reg = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			rgb_out_panel: endpoint@0 {
+				reg = <0>;
+				remote-endpoint = <&panel_in_rgb>;
+			};
+		};
+	};
+};
+
+&pinctrl {
+	spi_panel {
+		spi_init_cmd: spi-init-cmd {
+			rockchip,pins =
+				/* spi sdi */
+				<1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>,
+				/* spi scl */
+				<1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>,
+				/* spi cs */
+				<1 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};

commit d776bc4b9d68b96ea198f9ed88763b6c408de697
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri May 4 16:48:35 2018 +0800

    rockchip: update emmc/sd index
    
    We define emmc/sdcard index in dts alias, emmc is 0 and sdcard is 1.
    
    Change-Id: If0adb46298bf10f7a829a456ad147efd863792d0
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index 9503f65e8a..368a970162 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -19,11 +19,11 @@
 #ifndef CONFIG_SPL_BUILD
 #include <config_distro_defaults.h>
 
-/* First try to boot from SD (index 0), then eMMC (index 1) */
+/* First try to boot from SD (index 1), then eMMC (index 0) */
 #if CONFIG_IS_ENABLED(CMD_MMC)
 	#define BOOT_TARGET_MMC(func) \
-		func(MMC, mmc, 0) \
-		func(MMC, mmc, 1)
+		func(MMC, mmc, 1) \
+		func(MMC, mmc, 0)
 #else
 	#define BOOT_TARGET_MMC(func)
 #endif

commit f457a3ac95ee7460febc559b4783c04c4219eff2
Author: Caesar Wang <wxt@rock-chips.com>
Date:   Thu May 3 17:51:36 2018 +0800

    rockchip: fixes the kernel/ramdisk base address for rk3399
    
    For the arm64 SoCs, the kernel base address must aligh the 0x80000 with
    kernel bringing up when it run the boot android way.
    
    And increase the ramdisk base address for leaving enough space.
    
    Change-Id: Iaecf507cbe1906942be74e5b218ba20eaaf2b766
    Signed-off-by: Caesar Wang <wxt@rock-chips.com>

diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index 44b5af290d..05415be6d7 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -60,8 +60,8 @@
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x01f00000\0" \
-	"kernel_addr_r=0x02000000\0" \
-	"ramdisk_addr_r=0x04000000\0"
+	"kernel_addr_r=0x02080000\0" \
+	"ramdisk_addr_r=0x0a200000\\0"
 
 #include <config_distro_bootcmd.h>
 #define CONFIG_EXTRA_ENV_SETTINGS \

commit 8646e3269803a3b50c01ff7bf9016c4e77e7e605
Author: zain wang <wzz@rock-chips.com>
Date:   Mon May 7 17:33:22 2018 +0800

    evb-rk3308_defconfig: support android boot image
    
    Change-Id: I28d163bba0920110c7c85d59ba8ac86a84c77431
    Signed-off-by: zain wang <wzz@rock-chips.com>

diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index 30c4df0124..956d8385d7 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -9,14 +9,16 @@ CONFIG_TARGET_EVB_RK3308=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3308-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
-# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_ANDROID_BOOT_IMAGE=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
-# CONFIG_USB_FUNCTION_FASTBOOT is not set
+# CONFIG_FASTBOOT is not set
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
+CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 # CONFIG_CMD_SETEXPR is not set

commit 67191cb0fa32b4c8e6967a7169707b343ccf1161
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Wed May 2 15:32:04 2018 +0800

    make.sh: add prefix / for u-boot.img & u-boot-dtb.img
    
    We can set a special build output dir for ${OUTDIR}
    by argument -o, so the correct way to locate a output
    object is ${OUTDIR}/obj.
    
    Change-Id: I894b44d703afe2d21fcf7dddfbb82ae943835021
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/make.sh b/make.sh
index 10c1d8514c..5c896931b3 100755
--- a/make.sh
+++ b/make.sh
@@ -134,7 +134,7 @@ pack_uboot_image()
 
 	UBOOT_LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
 	${TOOLCHAIN_RKBIN}/loaderimage --pack --uboot ${OUTDIR}/u-boot.bin uboot.img ${UBOOT_LOAD_ADDR}
-	rm u-boot.img u-boot-dtb.img
+	rm ${OUTDIR}/u-boot.img ${OUTDIR}/u-boot-dtb.img
 	echo "pack uboot okay! Input: ${OUTDIR}/u-boot.bin"
 }
 

commit dc588d96b8e725340aeaddd3e0399a8b3f598391
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu May 3 11:36:49 2018 +0800

    common: boot_rkimg: make devnum alterable
    
    make devnum alterable when get blk_desc
    
    Change-Id: I0bd7387003c78cae058b85c93c3de266d90e9ee7
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 6b75046ad4..cc92903e47 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -152,7 +152,6 @@ int get_bootdev_type(void)
 	char boot_options[128] = {0};
 	static int appended;
 
-	devtype_num_envset();
 	devtype = env_get("devtype");
 
 	/* For current use(Only EMMC support!) */
@@ -195,9 +194,13 @@ struct blk_desc *rockchip_get_bootdev(void)
 {
 	struct blk_desc *dev_desc;
 	int dev_type;
+	int devnum;
 
+	devtype_num_envset();
 	dev_type = get_bootdev_type();
-	dev_desc = blk_get_devnum_by_type(dev_type, 0);
+	devnum = env_get_ulong("devnum", 10, 0);
+
+	dev_desc = blk_get_devnum_by_type(dev_type, devnum);
 
 	return dev_desc;
 }

commit 6caa0333659101835ed60c5102c81b3c71e7affe
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Apr 28 16:54:21 2018 +0800

    rockchip: add rkimgtest cmd to get boot dev
    
    We need to check if the storage(sdmmc) have IDB data so that
    we can use it as boot device.
    
    Change-Id: I7373b8f1a6c4c41c1d2cb1c94cd5d20c0780b5db
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/cmd/bootrkp.c b/cmd/bootrkp.c
index 1fe4fe3d3a..cf8d2f81a2 100644
--- a/cmd/bootrkp.c
+++ b/cmd/bootrkp.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <malloc.h>
 #include <android_bootloader.h>
 #include <attestation_key.h>
 #include <boot_rkimg.h>
@@ -79,3 +80,39 @@ U_BOOT_CMD(
 	"boot.img: ramdisk\n"
 	"resource.img: dtb, u-boot logo, kernel logo"
 );
+
+static int do_rkimg_test(cmd_tbl_t *cmdtp, int flag, int argc,
+		      char * const argv[])
+{
+	struct blk_desc *dev_desc;
+	u32* buffer;
+	int ret = 0;
+
+	dev_desc = blk_get_dev(argv[1], simple_strtoul(argv[2], NULL, 16));
+
+	buffer = memalign(ARCH_DMA_MINALIGN, 1024);
+	/* Read one block from begining of IDB data */
+	ret = blk_dread(dev_desc, 64, 2, buffer);
+	if (ret != 1) {
+		printf("%s fail to read data from IDB\n", __func__);
+		free(buffer);
+		return CMD_RET_FAILURE;
+	}
+
+	if (buffer[0] == 0xFCDC8C3B){
+		printf("%s found IDB in SDcard\n", __func__);
+		ret = CMD_RET_SUCCESS;
+		if (0 == buffer[128 + 104 / 4]) /* TAG in IDB */
+			env_update("bootargs", "sdfwupdate");
+	}
+
+	free(buffer);
+
+	return ret;
+}
+
+U_BOOT_CMD(
+	rkimgtest, 3, 0,    do_rkimg_test,
+	"Test if storage media have rockchip image",
+	""
+);

commit 3bea61eda065b2754cdb741ec504e7c3d7d3db0e
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon May 7 16:37:05 2018 +0800

    rockchip: resource: try resource part if no boot part found
    
    In some project, eg.Linux OS, RKIMG do not have a ramdisk, we don't
    need boot.img and boot partition in this case, so we need to get
    the resource from resource.img instead of error return.
    
    Change-Id: I88a1f8d7c532e9021f7dfa6c320049ed99f8f764
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index b9f8d15e47..62db314389 100644
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -200,7 +200,9 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 					 &part_info);
 	if (ret < 0) {
 		printf("fail to get %s part\n", boot_partname);
-		goto out;
+		/* RKIMG can support part table without 'boot' */
+		mode = 0;
+		goto next;
 	}
 	andr_hdr = (void *)hdr;
 	ret = blk_dread(dev_desc, part_info.start, 1, andr_hdr);
@@ -222,6 +224,7 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 		/* Set mode to 0 in for recovery is not valid AOSP img */
 		mode = 0;
 	}
+next:
 #endif
 	if (!mode) {
 		/* Read resource from Rockchip Resource partition */

commit d49682643c6f207bbc408ebcc6d13cd61306012f
Author: shengfei Xu <xsf@rock-chips.com>
Date:   Thu May 3 18:58:00 2018 +0800

    fuel gauge: improve the storage accuracy of dsoc
    
    The save dsoc accuracy is not enough to cause the display soc
    to be reduced by 1 when system reboot.
    
    Change-Id: I35dbb0d1b2d123f65f7cd6ef74216bc1a6384d34
    Signed-off-by: shengfei Xu <xsf@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk817.c b/drivers/power/fuel_gauge/fg_rk817.c
index 7c8ae372e4..e23d0034df 100644
--- a/drivers/power/fuel_gauge/fg_rk817.c
+++ b/drivers/power/fuel_gauge/fg_rk817.c
@@ -109,9 +109,9 @@ static int dbg_enable = 0;
 #define IOFFSET_H		0x0097
 #define IOFFSET_L		0x0098
 #define BAT_R0			0x0099
-#define BAT_R1			0x009a
-#define BAT_R2			0x009b
-#define BAT_R3			0x009c
+#define SOC_REG0		0x009a
+#define SOC_REG1		0x009b
+#define SOC_REG2		0x009c
 #define REMAIN_CAP_REG0		0x9d
 #define REMAIN_CAP_REG1		0x9e
 #define REMAIN_CAP_REG2		0x9f
@@ -134,7 +134,6 @@ static int dbg_enable = 0;
 #define CUR_ADC_K0		0x00b0
 #define BAT_DISCHRG		0x00ec
 #define BAT_CON			BIT(4)
-#define SOC_REG			0xa5
 
 #define USB_CTRL_REG		0x00E5
 #define PMIC_SYS_STS		0x00f0
@@ -551,22 +550,28 @@ static int rk817_bat_vol_to_cap(struct rk817_battery_device *battery,
 }
 
 static void rk817_bat_save_dsoc(struct rk817_battery_device *battery,
-				u8 save_soc)
+				int save_soc)
 {
 	static int last_soc = -1;
-	int value;
 
-	value = rk817_bat_read(battery, SOC_REG);
-	value &= 0x80;
 	if (last_soc != save_soc) {
-		rk817_bat_write(battery, SOC_REG, value | save_soc);
+		rk817_bat_write(battery, SOC_REG0, save_soc & 0xff);
+		rk817_bat_write(battery, SOC_REG1, (save_soc >> 8) & 0xff);
+		rk817_bat_write(battery, SOC_REG2, (save_soc >> 16) & 0xff);
+
 		last_soc = save_soc;
 	}
 }
 
 static int rk817_bat_get_prev_dsoc(struct rk817_battery_device *battery)
 {
-	return (rk817_bat_read(battery, SOC_REG) & 0x7f);
+	int value;
+
+	value = rk817_bat_read(battery, SOC_REG0);
+	value |= rk817_bat_read(battery, SOC_REG1) << 8;
+	value |= rk817_bat_read(battery, SOC_REG2) << 16;
+
+	return value;
 }
 
 static int rk817_bat_get_prev_cap(struct rk817_battery_device *battery)
@@ -729,7 +734,6 @@ static void rk817_bat_not_first_pwron(struct rk817_battery_device *battery)
 	battery->is_halt = is_rk817_bat_last_halt(battery);
 	battery->halt_cnt = rk817_bat_get_halt_cnt(battery);
 
-	pre_soc *= 1000;
 	if (battery->is_halt) {
 		DBG("system halt last time... cap: pre=%d, now=%d\n",
 		    pre_cap, now_cap);
@@ -769,7 +773,7 @@ static void rk817_bat_rsoc_init(struct rk817_battery_device *battery)
 	else
 		rk817_bat_not_first_pwron(battery);
 
-	 rk817_bat_save_dsoc(battery, battery->dsoc / 1000);
+	 rk817_bat_save_dsoc(battery, battery->dsoc);
 	 rk817_bat_save_cap(battery, battery->nac);
 }
 
@@ -1049,7 +1053,7 @@ static void rk817_bat_smooth_charge(struct rk817_battery_device *battery)
 	else if (battery->dsoc < 0)
 		battery->dsoc = 0;
 
-	rk817_bat_save_dsoc(battery, battery->dsoc / 1000);
+	rk817_bat_save_dsoc(battery, battery->dsoc);
 	rk817_bat_save_cap(battery, battery->remain_cap / 1000);
 out:
 	return;

commit a7de8a5ca7ff0b6d3a3a25fcba8d1e4becb88c4a
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed May 2 16:35:15 2018 +0800

    part: rkparm: fix issue when find the last part
    
    The 'next' will be NULL if next ',' is not found, and access to
    '*next' will end with "Synchronous Abort" in 64 bit system because
    the memory space is reserved for Trust area.
    
    Change-Id: Id8ee9d6f7815977d7c5996d67a3b72feb74d00cf
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/disk/part_rkparm.c b/disk/part_rkparm.c
index 57fd941a51..0398e4d5ab 100644
--- a/disk/part_rkparm.c
+++ b/disk/part_rkparm.c
@@ -33,7 +33,7 @@ static int rkparm_param_parse(char *param, struct list_head *parts_head,
 {
 	struct rkparm_part *part;
 	const char *cmdline = strstr(param, "CMDLINE:");
-	const char *blkdev_parts, *blkdev_def;
+	const char *blkdev_parts;
 	char *cmdline_end, *next, *pend;
 	int len, offset = 0;
 	unsigned long size, start;
@@ -44,8 +44,7 @@ static int rkparm_param_parse(char *param, struct list_head *parts_head,
 	}
 
 	blkdev_parts = strstr(cmdline, "mtdparts");
-	blkdev_def = strchr(blkdev_parts, ':') + 1;
-	next = (char *)blkdev_def;
+	next = strchr(blkdev_parts, ':');
 	cmdline_end = strstr(cmdline, "\n"); /* end by '\n' */
 	*cmdline_end = '\0';
 	/* skip "CMDLINE:" */
@@ -57,13 +56,16 @@ static int rkparm_param_parse(char *param, struct list_head *parts_head,
 	 */
 	env_delete("bootargs", "initrd=");
 
-	while (*next) {
+	while (next) {
+		/* Skip ':' and ',' */
+		next++;
 		if (*next == '-') {
 			size = (~0UL);
 			next++;
 		} else {
 			size = simple_strtoul(next, &next, 16);
 		}
+		/* Skip '@' */
 		next++;
 		start = simple_strtoul(next, &next, 16);
 		next++;
@@ -82,9 +84,8 @@ static int rkparm_param_parse(char *param, struct list_head *parts_head,
 		part->size = size;
 		strncpy(part->name, next, len);
 		part->name[len] = '\0';
-		next = strchr(next, ',');
-		next++;
 		list_add_tail(&part->node, parts_head);
+		next = strchr(next, ',');
 	}
 
 	return 0;

commit 0fa03761e78f811548f1ee5361a4b6d0e2025123
Author: Eddie Cai <eddie.cai.linux@gmail.com>
Date:   Wed May 2 09:29:37 2018 +0800

    evb-rk3399_defconfig: support android boot image
    
    Change-Id: Ie574b91b0dfa9d0cbfcd46699684f34f27323d53
    Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com>

diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index b8fca544c2..5cd17d2754 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -6,10 +6,11 @@ CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_ROCKCHIP_RK3399=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
 CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb"
 CONFIG_DEBUG_UART=y
-# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_ANDROID_BOOT_IMAGE=y
 CONFIG_FIT=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
@@ -25,6 +26,8 @@ CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

commit 877f3f47b5516ed8edd2ea49f29ceab635d87e54
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Apr 27 15:18:54 2018 +0800

    rockchip: part_rkparm: fix issue when parameter not valid
    
    If the param has no data, the cmdline is NULL, and system get abort:
    "Synchronous Abort" handler, esr 0x96000010
    
    Change-Id: Ia52594073287d55a7fd0b35b66d87ffe7f880fea
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/disk/part_rkparm.c b/disk/part_rkparm.c
index d8b8389a4b..57fd941a51 100644
--- a/disk/part_rkparm.c
+++ b/disk/part_rkparm.c
@@ -33,11 +33,8 @@ static int rkparm_param_parse(char *param, struct list_head *parts_head,
 {
 	struct rkparm_part *part;
 	const char *cmdline = strstr(param, "CMDLINE:");
-	char *cmdline_end = strstr(cmdline, "\n"); /* end by '\n' */
-	const char *blkdev_parts = strstr(cmdline, "mtdparts");
-	const char *blkdev_def = strchr(blkdev_parts, ':') + 1;
-	char *next = (char *)blkdev_def;
-	char *pend;
+	const char *blkdev_parts, *blkdev_def;
+	char *cmdline_end, *next, *pend;
 	int len, offset = 0;
 	unsigned long size, start;
 
@@ -46,6 +43,10 @@ static int rkparm_param_parse(char *param, struct list_head *parts_head,
 		return -EINVAL;
 	}
 
+	blkdev_parts = strstr(cmdline, "mtdparts");
+	blkdev_def = strchr(blkdev_parts, ':') + 1;
+	next = (char *)blkdev_def;
+	cmdline_end = strstr(cmdline, "\n"); /* end by '\n' */
 	*cmdline_end = '\0';
 	/* skip "CMDLINE:" */
 	env_update("bootargs", cmdline + strlen("CMDLINE:"));

commit 080fc76243d4b5410bc87afe8247c481df0f5ec4
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Apr 27 14:54:31 2018 +0800

    rockchip: px30: add sdmmc support
    
    Sync the sdmmc related dts node from kernel.
    
    Change-Id: I1fad10f9c38e566eb8276eca9777570c85e02063
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/px30-evb.dts b/arch/arm/dts/px30-evb.dts
index 10b39e2cb1..6a21a99012 100644
--- a/arch/arm/dts/px30-evb.dts
+++ b/arch/arm/dts/px30-evb.dts
@@ -265,7 +265,7 @@
 			vccio_sd: LDO_REG5 {
 				regulator-always-on;
 				regulator-boot-on;
-				regulator-min-microvolt = <3300000>;
+				regulator-min-microvolt = <1800000>;
 				regulator-max-microvolt = <3300000>;
 
 				regulator-name = "vccio_sd";
@@ -375,6 +375,23 @@
 	};
 };
 
+&sdmmc {
+	bus-width = <4>;
+	cap-mmc-highspeed;
+	cap-sd-highspeed;
+	supports-sd;
+	card-detect-delay = <800>;
+	ignore-pm-notify;
+	/*cd-gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>; [> CD GPIO <]*/
+	sd-uhs-sdr12;
+	sd-uhs-sdr25;
+	sd-uhs-sdr50;
+	sd-uhs-sdr104;
+	vqmmc-supply = <&vccio_sd>;
+	vmmc-supply = <&vcc_sd>;
+	status = "okay";
+};
+
 &emmc {
 	u-boot,dm-pre-reloc;
 	fifo-mode;
diff --git a/arch/arm/dts/px30-u-boot.dtsi b/arch/arm/dts/px30-u-boot.dtsi
index bcd74f8240..1a113cbff6 100644
--- a/arch/arm/dts/px30-u-boot.dtsi
+++ b/arch/arm/dts/px30-u-boot.dtsi
@@ -4,6 +4,12 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 
+/ {
+	aliases {
+		mmc0 = &emmc;
+		mmc1 = &sdmmc;
+	};
+};
 
 &uart2 {
 	clock-frequency = <24000000>;
@@ -16,6 +22,10 @@
 	status = "okay";
 };
 
+&sdmmc {
+	u-boot,dm-pre-reloc;
+};
+
 &emmc {
 	u-boot,dm-pre-reloc;
 };
diff --git a/arch/arm/dts/px30.dtsi b/arch/arm/dts/px30.dtsi
index 793d60d0cd..85c6460f60 100644
--- a/arch/arm/dts/px30.dtsi
+++ b/arch/arm/dts/px30.dtsi
@@ -798,10 +798,13 @@
 		compatible = "rockchip,px30-dw-mshc", "rockchip,rk3288-dw-mshc";
 		reg = <0x0 0xff370000 0x0 0x4000>;
 		max-frequency = <150000000>;
-		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>;
-		clock-names = "biu", "ciu";
+		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
+			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
+		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
 		fifo-depth = <0x100>;
-		interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+		interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_det &sdmmc_bus4>;
 		status = "disabled";
 	};
 
@@ -1780,31 +1783,36 @@
 			};
 		};
 
-		sdmmc0 {
-			sdmmc0_clk: sdmmc0-clk {
+		sdmmc {
+			sdmmc_clk: sdmmc-clk {
 				rockchip,pins =
-					<1 RK_PD6 RK_FUNC_1 &pcfg_pull_none_4ma>;
+					<1 RK_PD6 RK_FUNC_1 &pcfg_pull_none_8ma>;
 			};
 
-			sdmmc0_cmd: sdmmc0-cmd {
+			sdmmc_cmd: sdmmc-cmd {
 				rockchip,pins =
-					<1 RK_PD7 RK_FUNC_1 &pcfg_pull_up_4ma>;
+					<1 RK_PD7 RK_FUNC_1 &pcfg_pull_up_8ma>;
 			};
 
-			sdmmc0_bus1: sdmmc0-bus1 {
+			sdmmc_det: sdmmc-det {
 				rockchip,pins =
-					<1 RK_PD2 RK_FUNC_1 &pcfg_pull_up_4ma>;
+					<0 RK_PA3 RK_FUNC_1 &pcfg_pull_up_8ma>;
 			};
 
-			sdmmc0_bus4: sdmmc0-bus4 {
+			sdmmc_bus1: sdmmc-bus1 {
 				rockchip,pins =
-					<1 RK_PD2 RK_FUNC_1 &pcfg_pull_up_4ma>,
-					<1 RK_PD3 RK_FUNC_1 &pcfg_pull_up_4ma>,
-					<1 RK_PD4 RK_FUNC_1 &pcfg_pull_up_4ma>,
-					<1 RK_PD5 RK_FUNC_1 &pcfg_pull_up_4ma>;
+					<1 RK_PD2 RK_FUNC_1 &pcfg_pull_up_8ma>;
 			};
 
-			sdmmc0_gpio: sdmmc0-gpio {
+			sdmmc_bus4: sdmmc-bus4 {
+				rockchip,pins =
+					<1 RK_PD2 RK_FUNC_1 &pcfg_pull_up_8ma>,
+					<1 RK_PD3 RK_FUNC_1 &pcfg_pull_up_8ma>,
+					<1 RK_PD4 RK_FUNC_1 &pcfg_pull_up_8ma>,
+					<1 RK_PD5 RK_FUNC_1 &pcfg_pull_up_8ma>;
+			};
+
+			sdmmc_gpio: sdmmc-gpio {
 				rockchip,pins =
 					<1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
 					<1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
@@ -1815,38 +1823,33 @@
 			};
 		};
 
-		sdmmc1 {
-			sdmmc1_clk: sdmmc1-clk {
-				rockchip,pins =
-					<1 RK_PC5 RK_FUNC_1 &pcfg_pull_none_8ma>;
-			};
-
-			sdmmc1_cmd: sdmmc1-cmd {
+		sdio {
+			sdio_clk: sdio-clk {
 				rockchip,pins =
-					<1 RK_PC4 RK_FUNC_1 &pcfg_pull_up_8ma>;
+					<1 RK_PC5 RK_FUNC_1 &pcfg_pull_none>;
 			};
 
-			sdmmc1_bus1: sdmmc1-bus1 {
+			sdio_cmd: sdio-cmd {
 				rockchip,pins =
-					<1 RK_PC6 RK_FUNC_1 &pcfg_pull_up_8ma>;
+					<1 RK_PC4 RK_FUNC_1 &pcfg_pull_up>;
 			};
 
-			sdmmc1_bus4: sdmmc1-bus4 {
+			sdio_bus4: sdio-bus4 {
 				rockchip,pins =
-					<1 RK_PC6 RK_FUNC_1 &pcfg_pull_up_8ma>,
-					<1 RK_PC7 RK_FUNC_1 &pcfg_pull_up_8ma>,
-					<1 RK_PD0 RK_FUNC_1 &pcfg_pull_up_8ma>,
-					<1 RK_PD1 RK_FUNC_1 &pcfg_pull_up_8ma>;
+					<1 RK_PC6 RK_FUNC_1 &pcfg_pull_up>,
+					<1 RK_PC7 RK_FUNC_1 &pcfg_pull_up>,
+					<1 RK_PD0 RK_FUNC_1 &pcfg_pull_up>,
+					<1 RK_PD1 RK_FUNC_1 &pcfg_pull_up>;
 			};
 
-			sdmmc1_gpio: sdmmc1-gpio {
+			sdio_gpio: sdio-gpio {
 				rockchip,pins =
-					<1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
-					<1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
-					<1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
-					<1 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
-					<1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
-					<1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up_4ma>;
+					<1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>,
+					<1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>,
+					<1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>,
+					<1 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>,
+					<1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>,
+					<1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
 			};
 		};
 
diff --git a/arch/arm/dts/rk3326-evb.dts b/arch/arm/dts/rk3326-evb.dts
index eca91526e3..f9c7488ce6 100644
--- a/arch/arm/dts/rk3326-evb.dts
+++ b/arch/arm/dts/rk3326-evb.dts
@@ -265,7 +265,7 @@
 			vccio_sd: LDO_REG5 {
 				regulator-always-on;
 				regulator-boot-on;
-				regulator-min-microvolt = <3300000>;
+				regulator-min-microvolt = <1800000>;
 				regulator-max-microvolt = <3300000>;
 
 				regulator-name = "vccio_sd";
@@ -375,6 +375,23 @@
 	};
 };
 
+&sdmmc {
+	bus-width = <4>;
+	cap-mmc-highspeed;
+	cap-sd-highspeed;
+	supports-sd;
+	card-detect-delay = <800>;
+	ignore-pm-notify;
+	/*cd-gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>; [> CD GPIO <]*/
+	sd-uhs-sdr12;
+	sd-uhs-sdr25;
+	sd-uhs-sdr50;
+	sd-uhs-sdr104;
+	vqmmc-supply = <&vccio_sd>;
+	vmmc-supply = <&vcc_sd>;
+	status = "okay";
+};
+
 &emmc {
 	u-boot,dm-pre-reloc;
 	fifo-mode;

commit 9f2a90a85710de7e278ae815d77dcf0e3ce22949
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Apr 17 17:55:14 2018 +0800

    rockchip: rk3188: disable arch timer support
    
    RK3188 do not have a ARMv7 ARCH timer.
    
    Change-Id: If76fb126b16057160ece72df533c43d6b2b5bc0b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h
index d95ce978b1..d93f9adcf4 100644
--- a/include/configs/rk3188_common.h
+++ b/include/configs/rk3188_common.h
@@ -17,6 +17,8 @@
 #define CONFIG_SYS_CBSIZE		1024
 
 #define CONFIG_SYS_TIMER_COUNTS_DOWN
+/* RK3188 do not have a ARMv7 ARCH timer */
+#undef CONFIG_SYS_ARCH_TIMER
 
 #ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM
 /* Bootrom will load u-boot binary to 0x60000000 once return from SPL */

commit 48f99b37686b346c523bf75bb8f3162a91755627
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Apr 17 17:48:57 2018 +0800

    rockchip: rock-rk3188 enable rockchip DM timer
    
    Use DM rockchip timer for spl and U-Boot.
    
    Change-Id: I2d93106e3769ac51ab0acbcc3dd635e803a1ef6b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/rock_defconfig b/configs/rock_defconfig
index 781a53c200..d2f3d6ecb7 100644
--- a/configs/rock_defconfig
+++ b/configs/rock_defconfig
@@ -5,6 +5,9 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3188=y
+CONFIG_TIMER=y
+CONFIG_SPL_TIMER=y
+CONFIG_ROCKCHIP_TIMER=y
 CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_TARGET_ROCK=y

commit 040db82c36e62c76b0dffb11f2cc27b73cba0ceb
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Apr 17 17:51:53 2018 +0800

    rockchip: spl: init stimer only when generic timer available
    
    Some SoCs like rk3188 do not have a generic timer.
    
    Change-Id: Ief0e78d6939ac76eec0ffe08650e1a0d930f2f86
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index 27ab566d15..53ff85b00a 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -64,6 +64,7 @@ u32 spl_boot_mode(const u32 boot_device)
 
 __weak void rockchip_stimer_init(void)
 {
+#ifdef CONFIG_SYS_ARCH_TIMER
 #ifndef CONFIG_ARM64
 	asm volatile("mcr p15, 0, %0, c14, c0, 0"
 		     : : "r"(COUNTER_FREQUENCY));
@@ -72,6 +73,7 @@ __weak void rockchip_stimer_init(void)
 	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
 	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
 	writel(1, CONFIG_ROCKCHIP_STIMER_BASE + 0x10);
+#endif
 }
 
 __weak int arch_cpu_init(void)

commit b5f1eff77680b221cf298007b06b66950e8e2570
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Apr 17 17:43:12 2018 +0800

    rockchip: rk3188: add -u-boot.dtsi for rock-rk3188
    
    We should a -u-boot.dtsi for those config need by U-Boot only,
    and other part sync with kernel.
    
    Change-Id: I7c9f9c2824b759bcfd7e5c137ca0da207443d553
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3188-radxarock-u-boot.dtsi b/arch/arm/dts/rk3188-radxarock-u-boot.dtsi
new file mode 100644
index 0000000000..26f5707bb8
--- /dev/null
+++ b/arch/arm/dts/rk3188-radxarock-u-boot.dtsi
@@ -0,0 +1,24 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+&cru {
+	u-boot,dm-spl;
+};
+
+&pinctrl {
+	u-boot,dm-spl;
+};
+
+&uart2 {
+	status = "okay";
+	u-boot,dm-spl;
+};
+
+&timer3 {
+	compatible = "rockchip,rk3368-timer", "rockchip,rk3288-timer";
+	u-boot,dm-spl;
+	clock-frequency = <24000000>;
+};
diff --git a/arch/arm/dts/rk3188-radxarock.dts b/arch/arm/dts/rk3188-radxarock.dts
index 2930f81320..c796918167 100644
--- a/arch/arm/dts/rk3188-radxarock.dts
+++ b/arch/arm/dts/rk3188-radxarock.dts
@@ -7,6 +7,7 @@
 /dts-v1/;
 #include <dt-bindings/input/input.h>
 #include "rk3188.dtsi"
+#include "rk3188-radxarock-u-boot.dtsi"
 
 / {
 	model = "Radxa Rock";
@@ -360,11 +361,6 @@
 	status = "okay";
 };
 
-&uart2 {
-	status = "okay";
-	u-boot,dm-spl;
-};
-
 &uart3 {
 	status = "okay";
 };
diff --git a/arch/arm/dts/rk3188.dtsi b/arch/arm/dts/rk3188.dtsi
index ae65fd9717..4bc38c1621 100644
--- a/arch/arm/dts/rk3188.dtsi
+++ b/arch/arm/dts/rk3188.dtsi
@@ -105,7 +105,6 @@
 		compatible = "rockchip,rk3188-cru";
 		reg = <0x20000000 0x1000>;
 		rockchip,grf = <&grf>;
-		u-boot,dm-spl;
 
 		#clock-cells = <1>;
 		#reset-cells = <1>;
@@ -172,7 +171,6 @@
 		#address-cells = <1>;
 		#size-cells = <1>;
 		ranges;
-		u-boot,dm-spl;
 
 		gpio0: gpio0@2000a000 {
 			compatible = "rockchip,gpio-bank";

commit 1f0861773df7e836c0183525c0b0a8fafc604b55
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Apr 17 17:16:33 2018 +0800

    rockchip: rk3188: add timer3 node
    
    Add dts node for timer3.
    
    Change-Id: I0af3f4e2fea26ceda82566846db15ec2337da43e
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3188.dtsi b/arch/arm/dts/rk3188.dtsi
index 5178b3df85..ae65fd9717 100644
--- a/arch/arm/dts/rk3188.dtsi
+++ b/arch/arm/dts/rk3188.dtsi
@@ -134,6 +134,12 @@
 		status = "disabled";
 	};
 
+	timer3: timer@2000e000 {
+		compatible = "rockchip,rk3188-timer", "rockchip,rk3288-timer";
+		reg = <0x2000e000 0x20>;
+		interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
+	};
+
 	usbphy: phy {
 		compatible = "rockchip,rk3188-usb-phy", "rockchip,rk3288-usb-phy";
 		rockchip,grf = <&grf>;

commit d30aacafd1143a7d806c0f2e03319a3a7ce08380
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Fri Apr 27 10:31:09 2018 +0800

    lib: optee_client: updata keymaster TA
    
    compile form keymaster 8.1/develop-next commit:9d05fa8a
    Features:
            9d05fa8a keymaster: uboot write data delete old obj
            ff399cf0 ta keymaster: fix null point input panic
            186df0e4 keymaster & gatekeeper: rk3326 use partition storage
    
    Change-Id: Id15168f8782d4ab3680b9a424f8eee3843b6aa45
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta
index 66cda56bd1..53809c04ff 100644
Binary files a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta and b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta differ

commit 3a06149e72bece72a6fae0ffd48b1832bc05feb9
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Fri Apr 20 11:28:39 2018 +0800

    drm/rockchip: vop: add support dclk polarity invert config
    
    some platform like rk3288,rk3368 and px30, the rgb/lvds dclk
    polarity need to config grf config, other platform can config
    vop register to set dclk invert.
    
    Change-Id: Ica3b7b388d7650628c08007b327753caeeba3b0e
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 6980c137e3..d192193476 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -305,6 +305,8 @@ static int display_get_timing_from_dts(struct panel_state *panel_state,
 	flags |= val ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
 	FDT_GET_INT(val, "vsync-active");
 	flags |= val ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
+	FDT_GET_INT(val, "pixelclk-active");
+	flags |= val ? DRM_MODE_FLAG_PPIXDATA : 0;
 
 	mode->hdisplay = hactive;
 	mode->hsync_start = mode->hdisplay + hfront_porch;
diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index f8c0bd79b9..739595d782 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -19,6 +19,7 @@
 #include <linux/err.h>
 #include <dm/device.h>
 #include <dm/read.h>
+#include <syscon.h>
 
 #include "rockchip_display.h"
 #include "rockchip_crtc.h"
@@ -200,6 +201,7 @@ static int rockchip_vop_init(struct display_state *state)
 	int ret;
 	bool yuv_overlay = false, post_r2y_en = false, post_y2r_en = false;
 	u16 post_csc_mode;
+	bool dclk_inv;
 
 	vop = malloc(sizeof(*vop));
 	if (!vop)
@@ -212,6 +214,12 @@ static int rockchip_vop_init(struct display_state *state)
 	vop->win = vop_data->win;
 	vop->win_offset = vop_data->win_offset;
 	vop->ctrl = vop_data->ctrl;
+	vop->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	if (vop->grf <= 0)
+		printf("%s: Get syscon grf failed (ret=%p)\n",
+		      __func__, vop->grf);
+
+	vop->grf_ctrl = vop_data->grf_ctrl;
 	vop->line_flag = vop_data->line_flag;
 	vop->version = vop_data->version;
 	vop->max_output = vop_data->max_output;
@@ -250,6 +258,9 @@ static int rockchip_vop_init(struct display_state *state)
 	VOP_CTRL_SET(vop, win_channel[2], 0x56);
 	VOP_CTRL_SET(vop, dsp_blank, 0);
 
+	dclk_inv = (mode->flags & DRM_MODE_FLAG_PPIXDATA) ? 0 : 1;
+	VOP_CTRL_SET(vop, dclk_pol, dclk_inv);
+
 	val = 0x8;
 	val |= (mode->flags & DRM_MODE_FLAG_NHSYNC) ? 0 : 1;
 	val |= (mode->flags & DRM_MODE_FLAG_NVSYNC) ? 0 : (1 << 1);
@@ -259,23 +270,37 @@ static int rockchip_vop_init(struct display_state *state)
 	case DRM_MODE_CONNECTOR_LVDS:
 		VOP_CTRL_SET(vop, rgb_en, 1);
 		VOP_CTRL_SET(vop, rgb_pin_pol, val);
+		VOP_CTRL_SET(vop, rgb_dclk_pol, dclk_inv);
+		VOP_CTRL_SET(vop, lvds_en, 1);
+		VOP_CTRL_SET(vop, lvds_pin_pol, val);
+		VOP_CTRL_SET(vop, lvds_dclk_pol, dclk_inv);
+		if (!IS_ERR_OR_NULL(vop->grf))
+			VOP_GRF_SET(vop, grf_dclk_inv, !dclk_inv);
 		break;
 	case DRM_MODE_CONNECTOR_eDP:
 		VOP_CTRL_SET(vop, edp_en, 1);
 		VOP_CTRL_SET(vop, edp_pin_pol, val);
+		VOP_CTRL_SET(vop, edp_dclk_pol, dclk_inv);
 		break;
 	case DRM_MODE_CONNECTOR_HDMIA:
 		VOP_CTRL_SET(vop, hdmi_en, 1);
 		VOP_CTRL_SET(vop, hdmi_pin_pol, val);
+		VOP_CTRL_SET(vop, hdmi_dclk_pol, 1);
 		break;
 	case DRM_MODE_CONNECTOR_DSI:
 		VOP_CTRL_SET(vop, mipi_en, 1);
 		VOP_CTRL_SET(vop, mipi_pin_pol, val);
+		VOP_CTRL_SET(vop, mipi_dclk_pol, dclk_inv);
 		VOP_CTRL_SET(vop, mipi_dual_channel_en,
 			!!(conn_state->output_type & ROCKCHIP_OUTPUT_DSI_DUAL_CHANNEL));
 		VOP_CTRL_SET(vop, data01_swap,
 			!!(conn_state->output_type & ROCKCHIP_OUTPUT_DSI_DUAL_LINK));
 		break;
+	case DRM_MODE_CONNECTOR_DisplayPort:
+		VOP_CTRL_SET(vop, dp_dclk_pol, 0);
+		VOP_CTRL_SET(vop, dp_pin_pol, val);
+		VOP_CTRL_SET(vop, dp_en, 1);
+		break;
 	case DRM_MODE_CONNECTOR_TV:
 		if (vdisplay == CVBS_PAL_VDISPLAY)
 			VOP_CTRL_SET(vop, tve_sw_mode, 1);
diff --git a/drivers/video/drm/rockchip_vop.h b/drivers/video/drm/rockchip_vop.h
index 0ab9d52e8c..8662ed1400 100644
--- a/drivers/video/drm/rockchip_vop.h
+++ b/drivers/video/drm/rockchip_vop.h
@@ -64,6 +64,13 @@
 #define VOP_WIN_GET(x, name) \
 		vop_read_reg(x, vop->win->offset, &vop->win->name)
 
+#define VOP_GRF_SET(vop, name, v) \
+	do { \
+		if (vop->grf_ctrl) { \
+			vop_grf_writel(vop, vop->grf_ctrl->name, v); \
+		} \
+	} while (0)
+
 #define CVBS_PAL_VDISPLAY              288
 
 enum alpha_mode {
@@ -412,6 +419,10 @@ struct vop_line_flag {
 	struct vop_reg line_flag_num[2];
 };
 
+struct vop_grf_ctrl {
+	struct vop_reg grf_dclk_inv;
+};
+
 struct vop_rect {
 	int width;
 	int height;
@@ -424,6 +435,7 @@ struct vop_data {
 	const struct vop_ctrl *ctrl;
 	const struct vop_win *win;
 	const struct vop_line_flag *line_flag;
+	const struct vop_grf_ctrl *grf_ctrl;
 	int win_offset;
 	int reg_len;
 	u64 feature;
@@ -433,11 +445,13 @@ struct vop_data {
 struct vop {
 	u32 *regsbak;
 	void *regs;
+	void *grf;
 
 	uint32_t version;
 	const struct vop_ctrl *ctrl;
 	const struct vop_win *win;
 	const struct vop_line_flag *line_flag;
+	const struct vop_grf_ctrl *grf_ctrl;
 	int win_offset;
 	struct vop_rect max_output;
 };
@@ -483,6 +497,16 @@ static inline void vop_cfg_done(struct vop *vop)
 	VOP_CTRL_SET(vop, cfg_done, 1);
 }
 
+static inline void vop_grf_writel(struct vop *vop, struct vop_reg reg, u32 v)
+{
+	u32 val = 0;
+
+	if (VOP_REG_SUPPORT(vop, reg)) {
+		val = (v << reg.shift) | (reg.mask << (reg.shift + 16));
+		writel(val, vop->grf + reg.offset);
+	}
+}
+
 /**
  * drm_format_horz_chroma_subsampling - get the horizontal chroma subsampling factor
  * @format: pixel format (DRM_FORMAT_*)
diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index 31541cf2d7..9445fb5d8d 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -116,12 +116,23 @@ static const struct vop_ctrl rk3288_ctrl_data = {
 	.mipi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 15),
 	.mipi_dual_channel_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 3),
 	.data01_swap = VOP_REG_VER(RK3288_SYS_CTRL, 0x1, 17, 3, 5, -1),
+	.dclk_pol = VOP_REG_VER(RK3288_DSP_CTRL0, 0x1, 7, 3, 0, 1),
 	.pin_pol = VOP_REG_VER(RK3288_DSP_CTRL0, 0xf, 4, 3, 0, 1),
-	.dp_pin_pol = VOP_REG_VER(RK3368_DSP_CTRL1, 0xf, 16, 3, 2, -1),
-	.rgb_pin_pol = VOP_REG_VER(RK3368_DSP_CTRL1, 0xf, 16, 3, 2, -1),
-	.hdmi_pin_pol = VOP_REG_VER(RK3368_DSP_CTRL1, 0xf, 20, 3, 2, -1),
-	.edp_pin_pol = VOP_REG_VER(RK3368_DSP_CTRL1, 0xf, 24, 3, 2, -1),
-	.mipi_pin_pol = VOP_REG_VER(RK3368_DSP_CTRL1, 0xf, 28, 3, 2, -1),
+	.dp_dclk_pol = VOP_REG_VER(RK3399_DSP_CTRL1, 0x1, 19, 3, 5, -1),
+	.dp_pin_pol = VOP_REG_VER(RK3399_DSP_CTRL1, 0x7, 16, 3, 5, -1),
+	.rgb_dclk_pol = VOP_REG_VER(RK3368_DSP_CTRL1, 0x1, 19, 3, 2, -1),
+	.rgb_pin_pol = VOP_REG_VER(RK3368_DSP_CTRL1, 0x7, 16, 3, 2, -1),
+	.tve_dclk_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 24),
+	.tve_dclk_pol = VOP_REG(RK3288_SYS_CTRL, 0x1, 25),
+	.tve_sw_mode = VOP_REG(RK3288_SYS_CTRL, 0x1, 26),
+	.sw_uv_offset_en  = VOP_REG(RK3288_SYS_CTRL, 0x1, 27),
+	.sw_genlock   = VOP_REG(RK3288_SYS_CTRL, 0x1, 28),
+	.hdmi_dclk_pol = VOP_REG_VER(RK3368_DSP_CTRL1, 0x1, 23, 3, 2, -1),
+	.hdmi_pin_pol = VOP_REG_VER(RK3368_DSP_CTRL1, 0x7, 20, 3, 2, -1),
+	.edp_dclk_pol = VOP_REG_VER(RK3368_DSP_CTRL1, 0x1, 27, 3, 2, -1),
+	.edp_pin_pol = VOP_REG_VER(RK3368_DSP_CTRL1, 0x7, 24, 3, 2, -1),
+	.mipi_dclk_pol = VOP_REG_VER(RK3368_DSP_CTRL1, 0x1, 31, 3, 2, -1),
+	.mipi_pin_pol = VOP_REG_VER(RK3368_DSP_CTRL1, 0x7, 28, 3, 2, -1),
 
 	.dither_down = VOP_REG(RK3288_DSP_CTRL1, 0xf, 1),
 	.dither_up = VOP_REG(RK3288_DSP_CTRL1, 0x1, 6),
@@ -161,11 +172,20 @@ static const struct vop_line_flag rk3288_vop_line_flag = {
 	.line_flag_num[0] = VOP_REG(RK3288_INTR_CTRL0, 0x1fff, 12),
 };
 
+static const struct vop_grf_ctrl rk3288_vop_big_grf_ctrl = {
+	.grf_dclk_inv = VOP_REG(RK3288_GRF_SOC_CON15, 0x1, 12),
+};
+
+static const struct vop_grf_ctrl rk3288_vop_lit_grf_ctrl = {
+	.grf_dclk_inv = VOP_REG(RK3288_GRF_SOC_CON15, 0x1, 14),
+};
+
 const struct vop_data rk3288_vop_big = {
 	.version = VOP_VERSION(3, 1),
 	.max_output = {3840, 2160},
 	.feature = VOP_FEATURE_OUTPUT_10BIT,
 	.ctrl = &rk3288_ctrl_data,
+	.grf_ctrl = &rk3288_vop_big_grf_ctrl,
 	.win = &rk3288_win01_data,
 	.line_flag = &rk3288_vop_line_flag,
 	.reg_len = RK3288_DSP_VACT_ST_END_F1 * 4,
@@ -176,6 +196,7 @@ const struct vop_data rk3288_vop_lit = {
 	.max_output = {2560, 1600},
 	.feature = VOP_FEATURE_OUTPUT_10BIT,
 	.ctrl = &rk3288_ctrl_data,
+	.grf_ctrl = &rk3288_vop_lit_grf_ctrl,
 	.win = &rk3288_win01_data,
 	.line_flag = &rk3288_vop_line_flag,
 	.reg_len = RK3288_DSP_VACT_ST_END_F1 * 4,
@@ -186,10 +207,15 @@ static const struct vop_line_flag rk3368_vop_line_flag = {
 	.line_flag_num[1] = VOP_REG(RK3368_LINE_FLAG, 0xffff, 16),
 };
 
+static const struct vop_grf_ctrl rk3368_vop_grf_ctrl = {
+	.grf_dclk_inv = VOP_REG(RK3368_GRF_SOC_CON6, 0x1, 5),
+};
+
 const struct vop_data rk3368_vop = {
 	.version = VOP_VERSION(3, 2),
 	.max_output = {4096, 2160},
 	.ctrl = &rk3288_ctrl_data,
+	.grf_ctrl = &rk3368_vop_grf_ctrl,
 	.win = &rk3288_win01_data,
 	.line_flag = &rk3368_vop_line_flag,
 	.reg_len = RK3368_DSP_VACT_ST_END_F1 * 4,
@@ -356,6 +382,7 @@ static const struct vop_ctrl rk3036_ctrl_data = {
 	.standby = VOP_REG(RK3036_SYS_CTRL, 0x1, 30),
 	.out_mode = VOP_REG(RK3036_DSP_CTRL0, 0xf, 0),
 	.dsp_blank = VOP_REG(RK3036_DSP_CTRL1, 0x1, 24),
+	.dclk_pol = VOP_REG(RK3036_DSP_CTRL0, 0x1, 7),
 	.pin_pol = VOP_REG(RK3036_DSP_CTRL0, 0xf, 4),
 	.dsp_layer_sel = VOP_REG(RK3036_DSP_CTRL0, 0x1, 8),
 	.htotal_pw = VOP_REG(RK3036_DSP_HTOTAL_HS_END, 0x1fff1fff, 0),
@@ -485,10 +512,15 @@ static const struct vop_line_flag rk3366_vop_lite_line_flag = {
 	.line_flag_num[0] = VOP_REG(RK3366_LIT_LINE_FLAG, 0xfff, 0),
 };
 
+static const struct vop_grf_ctrl px30_grf_ctrl = {
+	.grf_dclk_inv = VOP_REG(PX30_GRF_PD_VO_CON1, 0x1, 4),
+};
+
 const struct vop_data px30_vop_lit = {
 	.version = VOP_VERSION(2, 5),
 	.max_output = {1920, 1080},
 	.ctrl = &px30_ctrl_data,
+	.grf_ctrl = &px30_grf_ctrl,
 	.win = &rk3366_win1_data,
 	.line_flag = &rk3366_vop_lite_line_flag,
 	.reg_len = RK3366_LIT_FRC_LOWER01_0 * 4,
@@ -498,6 +530,7 @@ const struct vop_data px30_vop_big = {
 	.version = VOP_VERSION(2, 6),
 	.max_output = {1920, 1080},
 	.ctrl = &px30_ctrl_data,
+	.grf_ctrl = &px30_grf_ctrl,
 	.win = &rk3366_win0_data,
 	.line_flag = &rk3366_vop_lite_line_flag,
 	.reg_len = RK3366_LIT_FRC_LOWER01_0 * 4,
diff --git a/drivers/video/drm/rockchip_vop_reg.h b/drivers/video/drm/rockchip_vop_reg.h
index 675616240e..f300e7be63 100644
--- a/drivers/video/drm/rockchip_vop_reg.h
+++ b/drivers/video/drm/rockchip_vop_reg.h
@@ -116,6 +116,7 @@
 #define RK3288_BCSH_COLOR_BAR			0x01b0
 #define RK3288_BCSH_BCS				0x01b4
 #define RK3288_BCSH_H				0x01b8
+#define RK3288_GRF_SOC_CON15			0x03a4
 /* register definition end */
 
 /* rk3368 register definition */
@@ -303,6 +304,7 @@
 #define RK3368_CABC_GAMMA_LUT_ADDR		0x1800
 #define RK3368_MCU_BYPASS_WPORT			0x2200
 #define RK3368_MCU_BYPASS_RPORT			0x2300
+#define RK3368_GRF_SOC_CON6			0x0418
 /* rk3368 register definition end */
 
 #define RK3366_REG_CFG_DONE			0x0000
@@ -955,5 +957,6 @@
 #define PX30_AFBCD0_PIC_SIZE			0x00248
 #define PX30_AFBCD0_PIC_OFFSET			0x0024c
 #define PX30_AFBCD0_AXI_CTRL			0x00250
+#define PX30_GRF_PD_VO_CON1			0x00438
 /* px30 register definition end */
 #endif /* _ROCKCHIP_VOP_REG_H */
diff --git a/include/drm_modes.h b/include/drm_modes.h
index 78cfcdc2b6..d71f562ddb 100644
--- a/include/drm_modes.h
+++ b/include/drm_modes.h
@@ -36,6 +36,7 @@
 #define DRM_MODE_FLAG_PIXMUX			(1 << 11)
 #define DRM_MODE_FLAG_DBLCLK			(1 << 12)
 #define DRM_MODE_FLAG_CLKDIV2			(1 << 13)
+#define DRM_MODE_FLAG_PPIXDATA			(1 << 31)
 
 #define DRM_MODE_CONNECTOR_Unknown	0
 #define DRM_MODE_CONNECTOR_VGA		1

commit 55a89bc67a8219df1210e52f877b9fe7bb424b62
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Apr 17 14:21:09 2018 +0800

    pinctrl: rockchip: Add DRV_TYPE_WRITABLE_32BIT and PULL_TYPE_WRITABLE_32BIT for rk3288 gpio0
    
    Change-Id: Ib17e1b1c3d0aafa437014cc2cb5fb18d13319753
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 13e55f7e5a..9f83c15723 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -50,6 +50,9 @@ struct rockchip_iomux {
 	int				offset;
 };
 
+#define DRV_TYPE_IO_MASK		GENMASK(31, 16)
+#define DRV_TYPE_WRITABLE_32BIT		BIT(31)
+
 /**
  * enum type index corresponding to rockchip_perpin_drv_list arrays index.
  */
@@ -62,6 +65,9 @@ enum rockchip_pin_drv_type {
 	DRV_TYPE_MAX
 };
 
+#define PULL_TYPE_IO_MASK		GENMASK(31, 16)
+#define PULL_TYPE_WRITABLE_32BIT	BIT(31)
+
 /**
  * enum type index corresponding to rockchip_pull_list arrays index.
  */
@@ -201,6 +207,32 @@ struct rockchip_pin_bank {
 		},							\
 	}
 
+#define PIN_BANK_IOMUX_DRV_PULL_FLAGS(id, pins, label, iom0, iom1,	\
+				      iom2, iom3, drv0, drv1, drv2,	\
+				      drv3, pull0, pull1, pull2,	\
+				      pull3)				\
+	{								\
+		.bank_num	= id,					\
+		.nr_pins	= pins,					\
+		.name		= label,				\
+		.iomux		= {					\
+			{ .type = iom0, .offset = -1 },			\
+			{ .type = iom1, .offset = -1 },			\
+			{ .type = iom2, .offset = -1 },			\
+			{ .type = iom3, .offset = -1 },			\
+		},							\
+		.drv		= {					\
+			{ .drv_type = drv0, .offset = -1 },		\
+			{ .drv_type = drv1, .offset = -1 },		\
+			{ .drv_type = drv2, .offset = -1 },		\
+			{ .drv_type = drv3, .offset = -1 },		\
+		},							\
+		.pull_type[0] = pull0,					\
+		.pull_type[1] = pull1,					\
+		.pull_type[2] = pull2,					\
+		.pull_type[3] = pull3,					\
+	}
+
 #define PIN_BANK_IOMUX_FLAGS_DRV_FLAGS_OFFSET_PULL_FLAGS(id, pins,	\
 					      label, iom0, iom1, iom2,  \
 					      iom3, drv0, drv1, drv2,   \
@@ -1665,7 +1697,7 @@ static int rockchip_set_drive_perpin(struct rockchip_pin_bank *bank,
 	int reg, ret, i;
 	u32 data, rmask_bits, temp;
 	u8 bit;
-	int drv_type = bank->drv[pin_num / 8].drv_type;
+	int drv_type = bank->drv[pin_num / 8].drv_type & DRV_TYPE_IO_MASK;
 
 	debug("setting drive of GPIO%d-%d to %d\n", bank->bank_num,
 	      pin_num, strength);
@@ -1737,10 +1769,15 @@ static int rockchip_set_drive_perpin(struct rockchip_pin_bank *bank,
 		return -EINVAL;
 	}
 
-	/* enable the write to the equivalent lower bits */
-	data = ((1 << rmask_bits) - 1) << (bit + 16);
-	data |= (ret << bit);
+	if (bank->drv[pin_num / 8].drv_type & DRV_TYPE_WRITABLE_32BIT) {
+		regmap_read(regmap, reg, &data);
+		data &= ~(((1 << rmask_bits) - 1) << bit);
+	} else {
+		/* enable the write to the equivalent lower bits */
+		data = ((1 << rmask_bits) - 1) << (bit + 16);
+	}
 
+	data |= (ret << bit);
 	ret = regmap_write(regmap, reg, data);
 	return ret;
 }
@@ -1794,7 +1831,7 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank,
 	case RK3308:
 	case RK3368:
 	case RK3399:
-		pull_type = bank->pull_type[pin_num / 8];
+		pull_type = bank->pull_type[pin_num / 8] & PULL_TYPE_IO_MASK;
 		ret = -EINVAL;
 		for (i = 0; i < ARRAY_SIZE(rockchip_pull_list[pull_type]);
 			i++) {
@@ -1809,10 +1846,15 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank,
 			return ret;
 		}
 
-		/* enable the write to the equivalent lower bits */
-		data = ((1 << RK3188_PULL_BITS_PER_PIN) - 1) << (bit + 16);
-		data |= (ret << bit);
+		if (bank->pull_type[pin_num / 8] & PULL_TYPE_WRITABLE_32BIT) {
+			regmap_read(regmap, reg, &data);
+			data &= ~(((1 << RK3188_PULL_BITS_PER_PIN) - 1) << bit);
+		} else {
+			/* enable the write to the equivalent lower bits */
+			data = ((1 << RK3188_PULL_BITS_PER_PIN) - 1) << (bit + 16);
+		}
 
+		data |= (ret << bit);
 		ret = regmap_write(regmap, reg, data);
 		break;
 	default:
@@ -2414,10 +2456,19 @@ static struct rockchip_pin_ctrl rk3228_pin_ctrl = {
 };
 
 static struct rockchip_pin_bank rk3288_pin_banks[] = {
-	PIN_BANK_IOMUX_FLAGS(0, 24, "gpio0", IOMUX_SOURCE_PMU | IOMUX_WRITABLE_32BIT,
-					     IOMUX_SOURCE_PMU | IOMUX_WRITABLE_32BIT,
-					     IOMUX_SOURCE_PMU | IOMUX_WRITABLE_32BIT,
-					     IOMUX_UNROUTED
+	PIN_BANK_IOMUX_DRV_PULL_FLAGS(0, 24, "gpio0",
+				      IOMUX_SOURCE_PMU | IOMUX_WRITABLE_32BIT,
+				      IOMUX_SOURCE_PMU | IOMUX_WRITABLE_32BIT,
+				      IOMUX_SOURCE_PMU | IOMUX_WRITABLE_32BIT,
+				      IOMUX_UNROUTED,
+				      DRV_TYPE_WRITABLE_32BIT,
+				      DRV_TYPE_WRITABLE_32BIT,
+				      DRV_TYPE_WRITABLE_32BIT,
+				      0,
+				      PULL_TYPE_WRITABLE_32BIT,
+				      PULL_TYPE_WRITABLE_32BIT,
+				      PULL_TYPE_WRITABLE_32BIT,
+				      0
 			    ),
 	PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1", IOMUX_UNROUTED,
 					     IOMUX_UNROUTED,

commit a43a18b23bdfe6b4d142f5529d5e1046aa79edb0
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 23 15:41:31 2018 +0800

    make.sh: add subcmd to pack trust and loader
    
    We don't want uboot.img compile everytime if we just want to
    pack trust or loader.
    
    Example:
            ./make.sh evb-rk3308 trust      ------ only pack trust
            ./make.sh evb-rk3308 loader     ------ only pack loader
    
    Change-Id: I9d940eefba99074c155c978cbc0ba838160f65d9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index bb8772258b..10c1d8514c 100755
--- a/make.sh
+++ b/make.sh
@@ -112,6 +112,12 @@ sub_commands()
 			${TOOLCHAIN_OBJDUMP} -${opt} ${OUTDIR}/u-boot | less
 			exit 0
 		fi
+	elif [ "$SUBCMD" = 'trust' ]; then
+		pack_trust_image
+		exit 0
+	elif [ "$SUBCMD" = 'loader' ]; then
+		pack_loader_image
+		exit 0
 	fi
 }
 
@@ -207,9 +213,9 @@ prepare
 echo "make for ${BOARD}_defconfig by -j${JOB}"
 make ${BOARD}_defconfig ${OUTOPT}
 select_toolchain
+fixup_chip_name
 sub_commands
 make CROSS_COMPILE=${TOOLCHAIN_GCC}  all --jobs=${JOB} ${OUTOPT}
-fixup_chip_name
 pack_uboot_image
 pack_loader_image
 pack_trust_image

commit d6cf38088b055736636320583a677bf5a107760a
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Mon Apr 23 10:19:51 2018 +0800

    drivers: rknand: add cache flush ops after data write
    
    The FTL cache the last page of the write data, it will lose
    after reboot. Here need to add a cache flush operation after
    write the data to resolve it.
    
    Change-Id: Ie197fad9f9e23ce5337be87f5d8380decad731b7
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/drivers/rknand/rk_zftl_arm_v8.S b/drivers/rknand/rk_zftl_arm_v8.S
index 602fa3ddbb..ec6c5a4cc2 100644
--- a/drivers/rknand/rk_zftl_arm_v8.S
+++ b/drivers/rknand/rk_zftl_arm_v8.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2018-04-11
+ * date: 2018-04-23
  */
 	.arch armv8-a
 	.file	"rk_zftl_arm_v8.S"
@@ -2825,7 +2825,7 @@ ftl_read_buf:
 	bhi	.L525
 	adrp	x1, .LANCHOR55
 	adrp	x0, .LC0
-	mov	w2, 887
+	mov	w2, 888
 	add	x1, x1, :lo12:.LANCHOR55
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -15687,7 +15687,7 @@ ftl_read_ahead:
 	cmn	w23, #1
 	bne	.L2504
 .L2503:
-	mov	w2, 874
+	mov	w2, 875
 	adrp	x1, .LANCHOR191
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR191
@@ -17522,7 +17522,7 @@ zftl_read:
 .L2772:
 	ldr	x1, [x29, 112]
 	adrp	x0, .LC0
-	mov	w2, 1030
+	mov	w2, 1031
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 .L2773:
@@ -17770,7 +17770,7 @@ vpn_check:
 	bhi	.L2798
 	adrp	x1, .LANCHOR198
 	adrp	x0, .LC0
-	mov	w2, 1266
+	mov	w2, 1267
 	add	x1, x1, :lo12:.LANCHOR198
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -17793,7 +17793,7 @@ vpn_check:
 	ldrh	w1, [x24, #:lo12:.LANCHOR2]
 	cmp	w1, w0, uxth
 	bhi	.L2796
-	mov	w2, 1256
+	mov	w2, 1257
 	adrp	x1, .LANCHOR198
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR198
@@ -17887,7 +17887,7 @@ vpn_check:
 	add	x0, x20, :lo12:check_vpc_tbl
 	ldrh	w0, [x0, x27, lsl 1]
 	cbz	w0, .L2808
-	mov	w2, 1298
+	mov	w2, 1299
 	mov	x1, x24
 	mov	x0, x25
 	bl	printf
@@ -19710,7 +19710,7 @@ zftl_discard:
 	bcc	.L3093
 	adrp	x1, .LANCHOR206
 	adrp	x0, .LC0
-	mov	w2, 1177
+	mov	w2, 1178
 	add	x1, x1, :lo12:.LANCHOR206
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -20723,6 +20723,7 @@ zftl_write:
 	add	x20, x20, :lo12:.LANCHOR89
 	add	x19, x19, :lo12:.LANCHOR93
 	bl	ftl_write_commit
+	bl	ftl_flush
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc

commit 4bafc2da2ded5e0dcfd8c097a501e301c8eeea9f
Author: David Wu <david.wu@rock-chips.com>
Date:   Mon Apr 16 11:22:21 2018 +0800

    pinctrl: rockchip: Change the flag's name from IOMUX_UNMASKED to IOMUX_WRITABLE_32BIT
    
    Using the name IOMUX_UNMASKED of flag is not so suitable, pickup the
    IOMUX_WRITABLE_32BIT name. And need to clean the value when set the
    iomux.
    
    Change-Id: I3e2d69702f4669770ff933ba2c40a641a924b55e
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 3fbd974f66..13e55f7e5a 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -37,7 +37,7 @@ enum rockchip_pinctrl_type {
 #define IOMUX_UNROUTED		BIT(3)
 #define IOMUX_WIDTH_3BIT	BIT(4)
 #define IOMUX_8WIDTH_2BIT	BIT(5)
-#define IOMUX_UNMASKED		BIT(6)
+#define IOMUX_WRITABLE_32BIT	BIT(6)
 
 /**
  * @type: iomux variant using IOMUX_* constants
@@ -1114,10 +1114,12 @@ static int rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
 		}
 	}
 
-	if (mux_type & IOMUX_UNMASKED)
+	if (mux_type & IOMUX_WRITABLE_32BIT) {
 		regmap_read(regmap, reg, &data);
-	else
+		data &= ~(mask << bit);
+	} else {
 		data = (mask << (bit + 16));
+	}
 
 	data |= (mux & mask) << bit;
 	ret = regmap_write(regmap, reg, data);
@@ -2412,9 +2414,9 @@ static struct rockchip_pin_ctrl rk3228_pin_ctrl = {
 };
 
 static struct rockchip_pin_bank rk3288_pin_banks[] = {
-	PIN_BANK_IOMUX_FLAGS(0, 24, "gpio0", IOMUX_SOURCE_PMU | IOMUX_UNMASKED,
-					     IOMUX_SOURCE_PMU | IOMUX_UNMASKED,
-					     IOMUX_SOURCE_PMU | IOMUX_UNMASKED,
+	PIN_BANK_IOMUX_FLAGS(0, 24, "gpio0", IOMUX_SOURCE_PMU | IOMUX_WRITABLE_32BIT,
+					     IOMUX_SOURCE_PMU | IOMUX_WRITABLE_32BIT,
+					     IOMUX_SOURCE_PMU | IOMUX_WRITABLE_32BIT,
 					     IOMUX_UNROUTED
 			    ),
 	PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1", IOMUX_UNROUTED,

commit 1d2570d36f237580300f6dce95f4d5315ab39977
Author: Caesar Wang <wxt@rock-chips.com>
Date:   Wed Apr 18 14:56:13 2018 +0800

    clk: rockchip/rk3399: fixes the correct clock init
    
    We will use the rkclk_init() for rk3399 without SPL/TPL way.
    
    Change-Id: I73a4d694ff2cb0e18f390c293971985f41d2b03d
    Signed-off-by: Caesar Wang <wxt@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 955112d6ff..c19912ab69 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -50,13 +50,11 @@ struct pll_div {
 	.fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ),\
 	.postdiv1 = _postdiv1, .postdiv2 = _postdiv2, .freq = hz};
 
-#if defined(CONFIG_SPL_BUILD)
 static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 2, 1);
 static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 1, 2, 2);
-#else
+#if !defined(CONFIG_SPL_BUILD)
 static const struct pll_div ppll_init_cfg = PLL_DIVISORS(PPLL_HZ, 2, 2, 1);
 #endif
-
 static const struct pll_div apll_1600_cfg = PLL_DIVISORS(1600*MHz, 3, 1, 1);
 static const struct pll_div apll_600_cfg = PLL_DIVISORS(600*MHz, 1, 2, 1);
 
@@ -1033,7 +1031,6 @@ static struct clk_ops rk3399_clk_ops = {
 	.enable = rk3399_clk_enable,
 };
 
-#ifdef CONFIG_SPL_BUILD
 static void rkclk_init(struct rk3399_cru *cru)
 {
 	u32 aclk_div;
@@ -1111,11 +1108,9 @@ static void rkclk_init(struct rk3399_cru *cru)
 		     hclk_div << HCLK_PERILP1_DIV_CON_SHIFT |
 		     HCLK_PERILP1_PLL_SEL_GPLL << HCLK_PERILP1_PLL_SEL_SHIFT);
 }
-#endif
 
 static int rk3399_clk_probe(struct udevice *dev)
 {
-#ifdef CONFIG_SPL_BUILD
 	struct rk3399_clk_priv *priv = dev_get_priv(dev);
 
 #if CONFIG_IS_ENABLED(OF_PLATDATA)
@@ -1124,7 +1119,6 @@ static int rk3399_clk_probe(struct udevice *dev)
 	priv->cru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);
 #endif
 	rkclk_init(priv->cru);
-#endif
 	return 0;
 }
 

commit 9b07af4c220da13a743a7384a84e8056427a4cd9
Author: shengfei Xu <xsf@rock-chips.com>
Date:   Wed Apr 11 17:33:14 2018 +0800

    fuel gauge: rk817: disable the bat discharge current limit function
    
    Change-Id: Iec99275fbbd3ff2d6ba76d8ef3327c4c3312ef76
    Signed-off-by: shengfei Xu <xsf@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk817.c b/drivers/power/fuel_gauge/fg_rk817.c
index fddc31a4e4..7c8ae372e4 100644
--- a/drivers/power/fuel_gauge/fg_rk817.c
+++ b/drivers/power/fuel_gauge/fg_rk817.c
@@ -132,6 +132,7 @@ static int dbg_enable = 0;
 #define CUR_ADC_K2		0x00ae
 #define CUR_ADC_K1		0x00af
 #define CUR_ADC_K0		0x00b0
+#define BAT_DISCHRG		0x00ec
 #define BAT_CON			BIT(4)
 #define SOC_REG			0xa5
 
@@ -167,6 +168,7 @@ static int dbg_enable = 0;
 #define CHRG_CT_EN		BIT(1)
 #define MIN_FCC			500
 #define CAP_INVALID		BIT(7)
+#define DIS_ILIM_EN		BIT(3)
 
 /* USB_CTRL_REG */
 #define INPUT_CUR_MSK		0x0f
@@ -1159,6 +1161,8 @@ static int rk817_fg_init(struct rk817_battery_device *battery)
 
 	value = rk817_bat_read(battery, GG_CON);
 	rk817_bat_write(battery, GG_CON, value | VOL_OUPUT_INSTANT_MODE);
+	value =  rk817_bat_read(battery, BAT_DISCHRG);
+	rk817_bat_write(battery, GG_CON, value & (~DIS_ILIM_EN));
 
 	rk817_bat_gas_gaugle_enable(battery);
 	rk817_bat_init_voltage_kb(battery);

commit 90b0cf64a77dd500dadfda79875338d905d40b95
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 16 20:38:01 2018 +0800

    make.sh: delete u-boot.img and u-boot-dtb.img
    
    this avoids users to be confused with uboot.img
    
    Change-Id: Ifdbb1c483825ef065708ca81da3496bde3358e21
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index cc3176f2ee..bb8772258b 100755
--- a/make.sh
+++ b/make.sh
@@ -128,6 +128,7 @@ pack_uboot_image()
 
 	UBOOT_LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
 	${TOOLCHAIN_RKBIN}/loaderimage --pack --uboot ${OUTDIR}/u-boot.bin uboot.img ${UBOOT_LOAD_ADDR}
+	rm u-boot.img u-boot-dtb.img
 	echo "pack uboot okay! Input: ${OUTDIR}/u-boot.bin"
 }
 

commit 02e4afbde621dbeac5ef3374207aadbd8b7046af
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 16 19:21:15 2018 +0800

    sysreset: Kconfig: default enable SYSRESET_PSCI for rockchip platforms
    
    Change-Id: I158416f90432faae0beb5b6e36712b43ed28882b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig
index a61a7d37c6..e272a9990f 100644
--- a/drivers/sysreset/Kconfig
+++ b/drivers/sysreset/Kconfig
@@ -36,6 +36,7 @@ if SYSRESET
 config SYSRESET_PSCI
 	bool "Enable support for PSCI System Reset"
 	depends on ARM_PSCI_FW
+	default y if ARCH_ROCKCHIP
 	help
 	  Enable PSCI SYSTEM_RESET function call.  To use this, PSCI firmware
 	  must be running on your system.

commit 6ba2d5cbca2d52a2a1a0a82eda47b1102848424b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 16 19:11:52 2018 +0800

    rockchip: Kconfig: enable ARM_SMCCC for most platforms
    
    including platforms:
      rk3036, rk322x, rk3288, rk3308, rk3328, rk3368, rk3399
    
    we enable ARM_SMCCC mainly for PSCI system reset since these
    platforms can provided PSCI implementation.
    
    Change-Id: If566b189fc58bec77bd045c5b2b99ff29dba578a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index bf418da8ab..d295c83750 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -33,6 +33,7 @@ config ROCKCHIP_RK3036
 	select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
 	select TPL_NEEDS_SEPARATE_STACK if TPL
 	select DEBUG_UART_BOARD_INIT
+	select ARM_SMCCC
 	help
 	  The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
 	  including NEON and GPU, Mali-400 graphics, several DDR3 options
@@ -114,6 +115,7 @@ config ROCKCHIP_RK322X
 	select TPL_LIBCOMMON_SUPPORT
 	select TPL_LIBGENERIC_SUPPORT
 	select GICV2
+	select ARM_SMCCC
 	help
 	  The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
 	  including NEON and GPU, Mali-400 graphics, several DDR3 options
@@ -127,6 +129,7 @@ config ROCKCHIP_RK3288
 	select SUPPORT_SPL
 	select SPL
 	select GICV2
+	select ARM_SMCCC
 	help
 	  The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
 	  including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
@@ -138,6 +141,7 @@ config ROCKCHIP_RK3308
 	bool "Support Rockchip RK3308"
 	select ARM64
 	select DEBUG_UART_BOARD_INIT
+	select ARM_SMCCC
 	help
 	  The Rockchip RK3308 is a ARM-based Soc which embeded with quad
 	  Cortex-A35 and highly integrated audio interfaces.
@@ -156,6 +160,7 @@ config ROCKCHIP_RK3328
 	imply TPL_SERIAL_SUPPORT
 	imply SPL_SEPARATE_BSS
 	select DEBUG_UART_BOARD_INIT
+	select ARM_SMCCC
 	help
 	  The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
 	  including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
@@ -191,6 +196,7 @@ config ROCKCHIP_RK3368
 	imply TPL_SERIAL_SUPPORT
 	select DEBUG_UART_BOARD_INIT
 	select GICV2
+	select ARM_SMCCC
 	help
 	  The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
 	  into a big and little cluster with 4 cores each) Cortex-A53 including
@@ -230,6 +236,7 @@ config ROCKCHIP_RK3399
 	select GICV3
 	select BOARD_LATE_INIT
 	select ROCKCHIP_BROM_HELPER
+	select ARM_SMCCC
 	help
 	  The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
 	  and quad-core Cortex-A53.

commit 7a484f5f253b345b708a1be408bf90c8aa56a0b3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 16 20:00:37 2018 +0800

    firmware: psci: use dev_read_prop() to parse "method"
    
    Change-Id: I77141c1d9763f4b6d4d5a1d51d27ea3a31c7f695
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/firmware/psci.c b/drivers/firmware/psci.c
index 451fbdebba..ab72b984fc 100644
--- a/drivers/firmware/psci.c
+++ b/drivers/firmware/psci.c
@@ -56,11 +56,9 @@ static int psci_bind(struct udevice *dev)
 
 static int psci_probe(struct udevice *dev)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	const char *method;
 
-	method = fdt_stringlist_get(gd->fdt_blob, dev_of_offset(dev), "method",
-				    0, NULL);
+	method = dev_read_prop(dev, "method", NULL);
 	if (!method) {
 		printf("missing \"method\" property\n");
 		return -ENXIO;

commit 33cde59d361c31559603e72f14ff0d74f4f5dab1
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Mon Apr 16 17:02:28 2018 +0800

    rockchip/rk3288: modify CONFIG_BOOTCOMMAND
    
    Support boot with resource.img kernel.img.
    
    Change-Id: Ifbf4180322bde0c55f312e05c0eaebaed71406e5
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/include/configs/evb_rk3288.h b/include/configs/evb_rk3288.h
index b031baa5ed..15a374cca7 100644
--- a/include/configs/evb_rk3288.h
+++ b/include/configs/evb_rk3288.h
@@ -7,11 +7,6 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#ifndef CONFIG_SPL_BUILD
-#undef CONFIG_BOOTCOMMAND
-#define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
-#endif
-
 #define ROCKCHIP_DEVICE_SETTINGS
 #include <configs/rk3288_common.h>
 
diff --git a/include/configs/fennec_rk3288.h b/include/configs/fennec_rk3288.h
index b031baa5ed..15a374cca7 100644
--- a/include/configs/fennec_rk3288.h
+++ b/include/configs/fennec_rk3288.h
@@ -7,11 +7,6 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#ifndef CONFIG_SPL_BUILD
-#undef CONFIG_BOOTCOMMAND
-#define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
-#endif
-
 #define ROCKCHIP_DEVICE_SETTINGS
 #include <configs/rk3288_common.h>
 
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index 6d5d0b5106..4eb2c702b2 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -10,6 +10,11 @@
 #include <asm/arch/hardware.h>
 #include "rockchip-common.h"
 
+#ifndef CONFIG_SPL_BUILD
+#undef CONFIG_BOOTCOMMAND
+#define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
+#endif
+
 #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
 #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		1024

commit 7add7997881eff69fb874c31fed023d8631414fe
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Thu Apr 12 15:20:42 2018 +0800

    rockchip/rk3288: update the config to support the RK bootloader
    
    Change-Id: Ic09cf541323d6a998061c0898d43ff2cded0f28e
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig
index 3caf2c1280..8d2809b6aa 100644
--- a/configs/firefly-rk3288_defconfig
+++ b/configs/firefly-rk3288_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3288=y
 CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_TARGET_FIREFLY_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-firefly"
@@ -12,12 +13,11 @@ CONFIG_SILENT_CONSOLE=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
-CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
@@ -66,7 +66,6 @@ CONFIG_DM_RESET=y
 CONFIG_DEBUG_UART_BASE=0xff690000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_DWC2=y
diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig
index f902ecf44b..7c4cbfc7e1 100644
--- a/configs/miqi-rk3288_defconfig
+++ b/configs/miqi-rk3288_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3288=y
 CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_TARGET_MIQI_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-miqi"
@@ -12,12 +13,11 @@ CONFIG_SILENT_CONSOLE=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
-CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
@@ -61,7 +61,6 @@ CONFIG_SPL_RAM=y
 CONFIG_DEBUG_UART_BASE=0xff690000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_DWC2=y
diff --git a/configs/phycore-rk3288_defconfig b/configs/phycore-rk3288_defconfig
index 4cc038b026..d0ecf3ad6e 100644
--- a/configs/phycore-rk3288_defconfig
+++ b/configs/phycore-rk3288_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3288=y
 CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_TARGET_PHYCORE_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-phycore-rdk"
@@ -15,12 +16,11 @@ CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_POWER_SUPPORT=y
-CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
@@ -65,7 +65,6 @@ CONFIG_SPL_RAM=y
 CONFIG_DEBUG_UART_BASE=0xff690000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/popmetal-rk3288_defconfig b/configs/popmetal-rk3288_defconfig
index 064d83df7f..c9f958b1f0 100644
--- a/configs/popmetal-rk3288_defconfig
+++ b/configs/popmetal-rk3288_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3288=y
 CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_TARGET_POPMETAL_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-popmetal"
@@ -13,12 +14,11 @@ CONFIG_CONSOLE_MUX=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
-CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
@@ -61,7 +61,6 @@ CONFIG_SPL_RAM=y
 CONFIG_DEBUG_UART_BASE=0xff690000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_DWC2=y
diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig
index 8db265b252..e44384e9dd 100644
--- a/configs/tinker-rk3288_defconfig
+++ b/configs/tinker-rk3288_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3288=y
 CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_TARGET_TINKER_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-tinker"
@@ -14,12 +15,11 @@ CONFIG_CONSOLE_MUX=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
@@ -64,7 +64,6 @@ CONFIG_SPL_RAM=y
 CONFIG_DEBUG_UART_BASE=0xff690000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_DWC2=y

commit 82a6f86b02d11e130bb04ce25c2aa7f5a7e2600e
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Mon Apr 16 16:30:58 2018 +0800

    rockchip/rk3288: delete unused CONFIG_RKPARM_PARTITION
    
    Change-Id: I8702d405c8d9d1f91294c6753a6f229706f44243
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig
index d88ca692fb..11c323dae5 100644
--- a/configs/evb-rk3288_defconfig
+++ b/configs/evb-rk3288_defconfig
@@ -30,7 +30,6 @@ CONFIG_CMD_REGULATOR=y
 # CONFIG_SPL_ISO_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_SPL_PARTITION_UUIDS=y
-CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_ENV_IS_IN_MMC=y
diff --git a/configs/fennec-rk3288_defconfig b/configs/fennec-rk3288_defconfig
index ad5cb4bfc6..64c4827879 100644
--- a/configs/fennec-rk3288_defconfig
+++ b/configs/fennec-rk3288_defconfig
@@ -32,7 +32,6 @@ CONFIG_CMD_REGULATOR=y
 # CONFIG_SPL_ISO_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_SPL_PARTITION_UUIDS=y
-CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_ENV_IS_IN_MMC=y

commit 7b6cb9267b0eb163aea1a1dce15a9c90b8055b79
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Apr 16 16:11:07 2018 +0800

    rockchip: px30: remove RKPAM partition
    
    The new SoC is not going to support legacy partition type.
    
    Change-Id: If606de1f55d84f3d57b5c7eceddcf64c5c2526e5
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 133c3a840d..421784c4ba 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -26,7 +26,6 @@ CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
-CONFIG_RKPARM_PARTITION=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_REGMAP=y

commit 164fdd0d48b22b43dfb6f2a781e8cc32141b035e
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Apr 16 16:58:55 2018 +0800

    configs: rockchip: rk3308: disable RKPARM_PARTITION
    
    We use GPT partition on rk3308 platform.
    
    Change-Id: Ic359016cd9181b574d45a2bc6953a09134a2497e
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index 65c45baf79..30c4df0124 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -20,7 +20,6 @@ CONFIG_CMD_GPT=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 # CONFIG_CMD_SETEXPR is not set
-CONFIG_RKPARM_PARTITION=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_REGMAP=y

commit 10f950baa82a3381b89b5319d0084a6fedbad793
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Mon Apr 16 14:40:13 2018 +0800

    rockchip: sdram: updata ddr config to v1.08
    
    1.Add more ddr rows support,such as 12 rows and 17 rows.
    2.Support different column for different cs.
    
    Change-Id: Iacb9b8545433c7172ff3f1090987f7d1d5699381
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h b/arch/arm/include/asm/arch-rockchip/sdram_common.h
index 55c6b81b2f..8be19c6ccb 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_common.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_common.h
@@ -14,19 +14,27 @@
  * [27]		rank_ch1
  * [26:25]	col_ch1
  * [24]		bk_ch1
- * [23:22]	cs0_row_ch1
- * [21:20]	cs1_row_ch1
+ * [23:22]	low bits of cs0_row_ch1
+ * [21:20]	low bits of cs1_row_ch1
  * [19:18]	bw_ch1
  * [17:16]	dbw_ch1;
  * [15:13]	ddrtype
  * [12]		channelnum
  * [11]		rank_ch0
- * [10:9]	col_ch0
+ * [10:9]	col_ch0,
  * [8]		bk_ch0
- * [7:6]	cs0_row_ch0
- * [5:4]	cs1_row_ch0
+ * [7:6]	low bits of cs0_row_ch0
+ * [5:4]	low bits of cs1_row_ch0
  * [3:2]	bw_ch0
  * [1:0]	dbw_ch0
+ *
+ * sys_reg1 bitfield struct
+ * [7]		high bit of cs0_row_ch1
+ * [6]		high bit of cs1_row_ch1
+ * [5]		high bit of cs0_row_ch0
+ * [4]		high bit of cs1_row_ch0
+ * [3:2]	cs1_col_ch1
+ * [1:0]	cs1_col_ch0
 */
 #define SYS_REG_DDRTYPE_SHIFT		13
 #define SYS_REG_DDRTYPE_MASK		7
@@ -50,6 +58,15 @@
 #define SYS_REG_DBW_SHIFT(ch)		((ch) * 16)
 #define SYS_REG_DBW_MASK		3
 
+#define SYS_REG1_VERSION_SHIFT			28
+#define SYS_REG1_VERSION_MASK			0xf
+#define SYS_REG1_EXTEND_CS0_ROW_SHIFT(ch)	(5 + (ch) * 2)
+#define SYS_REG1_EXTEND_CS0_ROW_MASK		1
+#define SYS_REG1_EXTEND_CS1_ROW_SHIFT(ch)	(4 + (ch) * 2)
+#define SYS_REG1_EXTEND_CS1_ROW_MASK		1
+#define SYS_REG1_CS1_COL_SHIFT(ch)		(0 + (ch) * 2)
+#define SYS_REG1_CS1_COL_MASK			3
+
 /* Get sdram size decode from reg */
 size_t rockchip_sdram_size(phys_addr_t reg);
 
diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
index f40edcce43..50828deff1 100644
--- a/arch/arm/mach-rockchip/sdram_common.c
+++ b/arch/arm/mach-rockchip/sdram_common.c
@@ -92,12 +92,14 @@ int dram_init_banksize(void)
 
 size_t rockchip_sdram_size(phys_addr_t reg)
 {
-	u32 rank, col, bk, cs0_row, cs1_row, bw, row_3_4;
+	u32 rank, cs0_col, bk, cs0_row, cs1_row, bw, row_3_4;
 	size_t chipsize_mb = 0;
 	size_t size_mb = 0;
 	u32 ch;
+	u32 cs1_col = 0;
 
 	u32 sys_reg = readl(reg);
+	u32 sys_reg1 = readl(reg + 4);
 	u32 ch_num = 1 + ((sys_reg >> SYS_REG_NUM_CH_SHIFT)
 		       & SYS_REG_NUM_CH_MASK);
 
@@ -105,26 +107,67 @@ size_t rockchip_sdram_size(phys_addr_t reg)
 	for (ch = 0; ch < ch_num; ch++) {
 		rank = 1 + (sys_reg >> SYS_REG_RANK_SHIFT(ch) &
 			SYS_REG_RANK_MASK);
-		col = 9 + (sys_reg >> SYS_REG_COL_SHIFT(ch) & SYS_REG_COL_MASK);
+		cs0_col = 9 + (sys_reg >> SYS_REG_COL_SHIFT(ch) & SYS_REG_COL_MASK);
+		cs1_col = cs0_col;
 		bk = 3 - ((sys_reg >> SYS_REG_BK_SHIFT(ch)) & SYS_REG_BK_MASK);
-		cs0_row = 13 + (sys_reg >> SYS_REG_CS0_ROW_SHIFT(ch) &
+		if ((sys_reg1 >> SYS_REG1_VERSION_SHIFT &
+		     SYS_REG1_VERSION_MASK) == 0x2) {
+			cs1_col = 9 + (sys_reg1 >> SYS_REG1_CS1_COL_SHIFT(ch) &
+				  SYS_REG1_CS1_COL_MASK);
+			if (((sys_reg1 >> SYS_REG1_EXTEND_CS0_ROW_SHIFT(ch) &
+			    SYS_REG1_EXTEND_CS0_ROW_MASK) << 2) + (sys_reg >>
+			    SYS_REG_CS0_ROW_SHIFT(ch) &
+			    SYS_REG_CS0_ROW_MASK) == 7)
+				cs0_row = 12;
+			else
+				cs0_row = 13 + (sys_reg >>
+					  SYS_REG_CS0_ROW_SHIFT(ch) &
+					  SYS_REG_CS0_ROW_MASK) +
+					  ((sys_reg1 >>
+					  SYS_REG1_EXTEND_CS0_ROW_SHIFT(ch) &
+					  SYS_REG1_EXTEND_CS0_ROW_MASK) << 2);
+			if (((sys_reg1 >> SYS_REG1_EXTEND_CS1_ROW_SHIFT(ch) &
+			    SYS_REG1_EXTEND_CS1_ROW_MASK) << 2) + (sys_reg >>
+			    SYS_REG_CS1_ROW_SHIFT(ch) &
+			    SYS_REG_CS1_ROW_MASK) == 7)
+				cs1_row = 12;
+			else
+				cs1_row = 13 + (sys_reg >>
+					  SYS_REG_CS1_ROW_SHIFT(ch) &
+					  SYS_REG_CS1_ROW_MASK) +
+					  ((sys_reg1 >>
+					  SYS_REG1_EXTEND_CS1_ROW_SHIFT(ch) &
+					  SYS_REG1_EXTEND_CS1_ROW_MASK) << 2);
+		}
+		else {
+			cs0_row = 13 + (sys_reg >> SYS_REG_CS0_ROW_SHIFT(ch) &
 				SYS_REG_CS0_ROW_MASK);
-		cs1_row = 13 + (sys_reg >> SYS_REG_CS1_ROW_SHIFT(ch) &
+			cs1_row = 13 + (sys_reg >> SYS_REG_CS1_ROW_SHIFT(ch) &
 				SYS_REG_CS1_ROW_MASK);
+		}
 		bw = (2 >> ((sys_reg >> SYS_REG_BW_SHIFT(ch)) &
 			SYS_REG_BW_MASK));
 		row_3_4 = sys_reg >> SYS_REG_ROW_3_4_SHIFT(ch) &
 			SYS_REG_ROW_3_4_MASK;
 
-		chipsize_mb = (1 << (cs0_row + col + bk + bw - 20));
+		chipsize_mb = (1 << (cs0_row + cs0_col + bk + bw - 20));
 
 		if (rank > 1)
-			chipsize_mb += chipsize_mb >> (cs0_row - cs1_row);
+			chipsize_mb += chipsize_mb >> ((cs0_row - cs1_row) +
+				       (cs0_col - cs1_col));
 		if (row_3_4)
 			chipsize_mb = chipsize_mb * 3 / 4;
 		size_mb += chipsize_mb;
-		debug("rank %d col %d bk %d cs0_row %d bw %d row_3_4 %d\n",
-		      rank, col, bk, cs0_row, bw, row_3_4);
+		if (rank > 1)
+			debug("rank %d cs0_col %d cs1_col %d bk %d cs0_row %d\
+			       cs1_row %d bw %d row_3_4 %d\n",
+			       rank, cs0_col, cs1_col, bk, cs0_row,
+			       cs1_row, bw, row_3_4);
+		else
+			debug("rank %d cs0_col %d bk %d cs0_row %d\
+                               bw %d row_3_4 %d\n",
+                               rank, cs0_col, bk, cs0_row,
+                               bw, row_3_4);
 	}
 
 	/* Handle 4GB size, or else size will be 0 after <<20 in 32bit system */

commit 65e3ea686583c60865e01c99f9af50953ca2e559
Author: Zhaoyifeng <zyf@rock-chips.com>
Date:   Mon Apr 9 10:07:46 2018 +0800

    drivers: rknand: update ftl for rk3308
    
    The NANDC version number definition is not compatible with the
    original. So the detect code need to update.
    
    Change-Id: I9a062158a1bd20b83050d17f02661cb429b55092
    Signed-off-by: Zhaoyifeng <zyf@rock-chips.com>

diff --git a/drivers/rknand/rk_ftl_arm_v8.S b/drivers/rknand/rk_ftl_arm_v8.S
index bb62e2bc66..51dcc9aa25 100644
--- a/drivers/rknand/rk_ftl_arm_v8.S
+++ b/drivers/rknand/rk_ftl_arm_v8.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2018-02-08
+ * date: 2018-04-08
  */
 	.arch armv8-a
 	.file	"rk_ftl_arm_v8.S"
@@ -1356,23 +1356,27 @@ FlashEraseBlocks:
 	stp	x25, x26, [sp, 64]
 	cbnz	w1, .L199
 	adrp	x25, .LANCHOR23
-	mov	x23, x0
+	mov	x19, x0
 	add	x26, x25, :lo12:.LANCHOR23
-	mov	w19, 0
+	mov	w20, 0
 .L200:
-	cmp	w19, w22
+	cmp	w20, w22
 	adrp	x13, .LANCHOR25
 	bcc	.L209
-	adrp	x20, .LANCHOR8
-	adrp	x21, .LANCHOR23
-	add	x22, x13, :lo12:.LANCHOR25
-	add	x20, x20, :lo12:.LANCHOR8
-	add	x21, x21, :lo12:.LANCHOR23
-	mov	x19, 0
+	adrp	x21, .LANCHOR8
+	adrp	x23, .LANCHOR23
+	add	x25, x13, :lo12:.LANCHOR25
+	add	x21, x21, :lo12:.LANCHOR8
+	add	x23, x23, :lo12:.LANCHOR23
+	mov	x20, 0
 .L210:
-	ldrb	w0, [x22]
-	cmp	w0, w19
+	ldrb	w0, [x25]
+	cmp	w0, w20
 	bhi	.L212
+	adrp	x0, .LANCHOR28
+	ldr	w0, [x0, #:lo12:.LANCHOR28]
+	cbnz	w0, .L213
+.L214:
 	mov	w0, 0
 	b	.L198
 .L199:
@@ -1388,22 +1392,22 @@ FlashEraseBlocks:
 .L209:
 	mov	w12, 56
 	mov	w1, 0
-	sub	w4, w22, w19
+	sub	w4, w22, w20
 	add	x3, x29, 92
-	umull	x12, w19, w12
+	umull	x12, w20, w12
 	add	x2, x29, 88
-	add	x20, x23, x12
-	mov	x0, x20
+	add	x21, x19, x12
+	mov	x0, x21
 	bl	LogAddr2PhyAddr
-	mov	w21, w0
+	mov	w23, w0
 	ldrb	w1, [x13, #:lo12:.LANCHOR25]
 	ldr	w0, [x29, 92]
 	cmp	w1, w0
 	bhi	.L202
 	mov	w0, -1
-	str	w0, [x23, x12]
+	str	w0, [x19, x12]
 .L203:
-	add	w19, w19, 1
+	add	w20, w20, 1
 	b	.L200
 .L202:
 	adrp	x1, .LANCHOR27
@@ -1412,7 +1416,7 @@ FlashEraseBlocks:
 	ldrb	w1, [x1, #:lo12:.LANCHOR27]
 	cmp	w1, 0
 	uxtw	x1, w0
-	csel	w21, w21, wzr, ne
+	csel	w23, w23, wzr, ne
 	madd	x1, x1, x3, x2
 	ldr	x1, [x1, 8]
 	cbz	x1, .L205
@@ -1422,64 +1426,76 @@ FlashEraseBlocks:
 	mov	x0, 24
 	madd	x0, x1, x0, x26
 	str	w2, [x0, 4]
-	stp	x20, xzr, [x0, 8]
-	cbz	w21, .L206
-	add	w2, w19, 1
+	stp	x21, xzr, [x0, 8]
+	cbz	w23, .L206
+	add	w2, w20, 1
 	mov	w3, 56
-	umaddl	x2, w2, w3, x23
+	umaddl	x2, w2, w3, x19
 	str	x2, [x0, 16]
 .L206:
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
-	ldrb	w20, [x0, x1]
+	ldrb	w21, [x0, x1]
 	mov	x0, 24
 	mul	x1, x1, x0
-	mov	w0, w20
-	strb	w20, [x26, x1]
+	mov	w0, w21
+	strb	w21, [x26, x1]
 	bl	NandcFlashCs
 	cmp	w24, 1
 	bne	.L207
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
 	cbz	w0, .L207
-	mov	w0, w20
+	mov	w0, w21
 	bl	flash_enter_slc_mode
 .L208:
 	ldr	w1, [x29, 92]
 	adrp	x0, .LANCHOR17
 	add	x0, x0, :lo12:.LANCHOR17
-	add	w19, w19, w21
+	add	w20, w20, w23
 	ldr	w0, [x0, x1, lsl 2]
 	ldr	w1, [x29, 88]
 	cmp	w0, 0
-	mov	w0, w20
+	mov	w0, w21
 	cset	w2, ne
 	bl	FlashWaitReadyEN
 	ldr	w1, [x29, 88]
-	mov	w2, w21
-	mov	w0, w20
+	mov	w2, w23
+	mov	w0, w21
 	bl	FlashEraseCmd
-	mov	w0, w20
+	mov	w0, w21
 	bl	NandcFlashDeCs
 	b	.L203
 .L207:
-	mov	w0, w20
+	mov	w0, w21
 	bl	flash_exit_slc_mode
 	b	.L208
 .L212:
-	mov	w0, w19
+	mov	w0, w20
 	bl	FlashWaitCmdDone
 	cmp	w24, 1
 	bne	.L211
-	ldrb	w0, [x20]
+	ldrb	w0, [x21]
 	cbz	w0, .L211
 	mov	x0, 24
-	mul	x0, x19, x0
-	ldrb	w0, [x0, x21]
+	mul	x0, x20, x0
+	ldrb	w0, [x0, x23]
 	bl	flash_exit_slc_mode
 .L211:
-	add	x19, x19, 1
+	add	x20, x20, 1
 	b	.L210
+.L213:
+	adrp	x0, .LANCHOR22
+	ldrb	w0, [x0, #:lo12:.LANCHOR22]
+	cmp	w0, 69
+	bne	.L214
+	mov	w0, 56
+	umaddl	x22, w22, w0, x19
+.L215:
+	cmp	x22, x19
+	beq	.L214
+	str	wzr, [x19], 56
+	b	.L215
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
 	.section	.text.FlashReadDpCmd,"ax",@progbits
 	.align	2
@@ -1513,7 +1529,7 @@ FlashReadDpCmd:
 	str	w5, [x19, 2056]
 	cmp	w1, 1
 	lsr	w1, w21, 16
-	bne	.L227
+	bne	.L231
 	str	wzr, [x19, 2052]
 	str	wzr, [x19, 2052]
 	str	w4, [x19, 2052]
@@ -1525,7 +1541,7 @@ FlashReadDpCmd:
 	str	wzr, [x19, 2056]
 	str	wzr, [x19, 2052]
 	str	wzr, [x19, 2052]
-.L230:
+.L234:
 	str	w24, [x19, 2052]
 	mov	w0, 48
 	str	w23, [x19, 2052]
@@ -1538,12 +1554,12 @@ FlashReadDpCmd:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	b	FlashSetRandomizer
-.L227:
+.L231:
 	str	w4, [x19, 2052]
 	str	w3, [x19, 2052]
 	str	w1, [x19, 2052]
 	str	w0, [x19, 2056]
-	b	.L230
+	b	.L234
 	.size	FlashReadDpCmd, .-FlashReadDpCmd
 	.section	.text.FlashDeInit,"ax",@progbits
 	.align	2
@@ -1555,19 +1571,19 @@ FlashDeInit:
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	bl	NandcWaitFlashReady
-	adrp	x19, .LANCHOR28
+	adrp	x19, .LANCHOR29
 	bl	FlashSetReadRetryDefault
-	ldrb	w0, [x19, #:lo12:.LANCHOR28]
-	cbz	w0, .L232
+	ldrb	w0, [x19, #:lo12:.LANCHOR29]
+	cbz	w0, .L236
 	adrp	x0, .LANCHOR24
 	ldrb	w0, [x0, #:lo12:.LANCHOR24]
-	tbz	x0, 0, .L232
+	tbz	x0, 0, .L236
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
 	bl	NandcSetMode
-	strb	wzr, [x19, #:lo12:.LANCHOR28]
-.L232:
+	strb	wzr, [x19, #:lo12:.LANCHOR29]
+.L236:
 	adrp	x0, .LANCHOR6
 	ldr	x0, [x0, #:lo12:.LANCHOR6]
 	str	wzr, [x0, 336]
@@ -1595,29 +1611,29 @@ NandcRandmzSel:
 NandcTimeCfg:
 	cmp	w0, 35
 	adrp	x1, .LANCHOR19
-	bhi	.L242
+	bhi	.L246
 	ldr	x0, [x1, #:lo12:.LANCHOR19]
 	mov	w1, 4193
-.L245:
+.L249:
 	str	w1, [x0, 4]
 	ret
-.L242:
+.L246:
 	cmp	w0, 99
 	ldr	x0, [x1, #:lo12:.LANCHOR19]
-	bls	.L244
+	bls	.L248
 	mov	w1, 8322
-	b	.L245
-.L244:
+	b	.L249
+.L248:
 	mov	w1, 4225
-	b	.L245
+	b	.L249
 	.size	NandcTimeCfg, .-NandcTimeCfg
 	.section	.text.FlashTimingCfg,"ax",@progbits
 	.align	2
 	.global	FlashTimingCfg
 	.type	FlashTimingCfg, %function
 FlashTimingCfg:
-	adrp	x0, .LANCHOR29+21
-	ldrb	w0, [x0, #:lo12:.LANCHOR29+21]
+	adrp	x0, .LANCHOR30+21
+	ldrb	w0, [x0, #:lo12:.LANCHOR30+21]
 	b	NandcTimeCfg
 	.size	FlashTimingCfg, .-FlashTimingCfg
 	.section	.text.NandcBchSel,"ax",@progbits
@@ -1631,36 +1647,36 @@ NandcBchSel:
 	ldr	x2, [x1, #:lo12:.LANCHOR19]
 	mov	w1, 1
 	str	w1, [x2, 8]
-	adrp	x1, .LANCHOR30
-	str	w0, [x1, #:lo12:.LANCHOR30]
+	adrp	x1, .LANCHOR31
+	str	w0, [x1, #:lo12:.LANCHOR31]
 	mov	w1, 4096
-	bne	.L248
-.L251:
+	bne	.L252
+.L255:
 	and	w1, w1, -17
-.L249:
+.L253:
 	orr	w1, w1, 1
 	str	w1, [x2, 12]
 	ret
-.L248:
+.L252:
 	cmp	w0, 24
-	bne	.L250
+	bne	.L254
 	orr	w1, w1, 16
-	b	.L249
-.L250:
+	b	.L253
+.L254:
 	orr	w1, w1, 262144
 	cmp	w0, 40
 	orr	w1, w1, 16
-	bne	.L249
-	b	.L251
+	bne	.L253
+	b	.L255
 	.size	NandcBchSel, .-NandcBchSel
 	.section	.text.FlashBchSel,"ax",@progbits
 	.align	2
 	.global	FlashBchSel
 	.type	FlashBchSel, %function
 FlashBchSel:
-	adrp	x1, .LANCHOR31
+	adrp	x1, .LANCHOR32
 	and	w0, w0, 255
-	strb	w0, [x1, #:lo12:.LANCHOR31]
+	strb	w0, [x1, #:lo12:.LANCHOR32]
 	b	NandcBchSel
 	.size	FlashBchSel, .-FlashBchSel
 	.section	.text.NandCIrqEnable,"ax",@progbits
@@ -1733,11 +1749,11 @@ NandcSendDumpDataStart:
 	.type	NandcSendDumpDataDone, %function
 NandcSendDumpDataDone:
 	sub	sp, sp, #16
-.L265:
+.L269:
 	ldr	w1, [x0, 8]
 	str	w1, [sp, 8]
 	ldr	w1, [sp, 8]
-	tbz	x1, 20, .L265
+	tbz	x1, 20, .L269
 	add	sp, sp, 16
 	ret
 	.size	NandcSendDumpDataDone, .-NandcSendDumpDataDone
@@ -1751,13 +1767,13 @@ NandcXferStart:
 	ubfx	x3, x3, 1, 7
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	and	w23, w1, 255
+	and	w24, w1, 255
 	adrp	x1, .LANCHOR6
 	add	x1, x1, :lo12:.LANCHOR6
 	add	x6, x1, x0
 	stp	x21, x22, [sp, 32]
 	stp	x19, x20, [sp, 16]
-	ubfiz	w19, w23, 1, 1
+	ubfiz	w19, w24, 1, 1
 	ldr	x21, [x1, x0]
 	mov	w1, 16
 	ldrb	w0, [x6, 8]
@@ -1769,13 +1785,13 @@ NandcXferStart:
 	bfi	w22, w0, 5, 3
 	mov	w0, 1
 	bfi	w19, w0, 5, 2
-	adrp	x0, .LANCHOR32
+	adrp	x0, .LANCHOR33
 	orr	w19, w19, 536870912
 	orr	w19, w19, 1024
-	ldr	w0, [x0, #:lo12:.LANCHOR32]
+	ldr	w0, [x0, #:lo12:.LANCHOR33]
 	bfi	w19, w3, 4, 1
 	cmp	w0, 3
-	bls	.L270
+	bls	.L274
 	ldr	w0, [x21, 16]
 	cmp	x5, 0
 	str	w0, [x29, 88]
@@ -1783,36 +1799,43 @@ NandcXferStart:
 	ldr	w0, [x29, 88]
 	and	w0, w0, -5
 	str	w0, [x29, 88]
-	beq	.L271
+	beq	.L275
 	and	w2, w2, 255
-	adrp	x20, .LANCHOR33
-	cbnz	w23, .L272
-.L280:
+	adrp	x20, .LANCHOR34
+	cbnz	w24, .L276
+.L284:
+	ldr	x0, [x20, #:lo12:.LANCHOR34]
 	add	w2, w2, 1
-	ldr	x0, [x20, #:lo12:.LANCHOR33]
-	asr	w2, w2, 1
-	add	x20, x20, :lo12:.LANCHOR33
 	cmp	x4, 0
-	mov	x24, x4
-	bfi	w19, w2, 22, 6
+	asr	w2, w2, 1
 	csel	x0, x4, x0, ne
+	add	x20, x20, :lo12:.LANCHOR34
+	bfi	w19, w2, 22, 6
+	and	x2, x0, 4294967295
+	add	x2, x2, 63
+	mov	x25, x4
+	and	x2, x2, -64
 	ldr	x1, [x20, 8]
-	ubfx	x25, x19, 22, 5
+	ubfx	x23, x19, 22, 5
 	stp	x0, x1, [x20, 16]
 	stp	w0, w1, [x20, 32]
-	add	w1, w0, w25, lsl 10
-	uxtw	x0, w0
+	ubfiz	x1, x23, 10, 5
+	add	x1, x2, x1
+	and	x0, x0, 4294967232
 	bl	flush_dcache_range
-	ldr	x0, [x20, 24]
-	add	w1, w0, w25, lsl 7
-	uxtw	x0, w0
+	ubfiz	x23, x23, 7, 5
+	ldr	w0, [x20, 36]
+	add	x1, x0, 63
+	and	x0, x0, 4294967232
+	and	x1, x1, -64
+	add	x1, x1, x23
 	bl	flush_dcache_range
 	mov	w0, 1
 	str	w0, [x20, 40]
 	ldr	w0, [x20, 32]
 	mov	w1, 16
 	str	w0, [x21, 20]
-	tst	x24, 3
+	tst	x25, 3
 	ldr	w0, [x20, 36]
 	str	w0, [x21, 24]
 	str	wzr, [x29, 88]
@@ -1822,14 +1845,14 @@ NandcXferStart:
 	ldr	w0, [x29, 88]
 	orr	w0, w0, 448
 	str	w0, [x29, 88]
-	bne	.L281
+	bne	.L285
 	ldr	w0, [x29, 88]
 	mov	w1, 2
 	bfi	w0, w1, 3, 3
 	str	w0, [x29, 88]
-.L281:
+.L285:
 	ldr	w0, [x29, 88]
-	cmp	w23, 0
+	cmp	w24, 0
 	cset	w1, eq
 	orr	w0, w0, 4
 	str	w0, [x29, 88]
@@ -1839,10 +1862,10 @@ NandcXferStart:
 	ldr	w0, [x29, 88]
 	orr	w0, w0, 1
 	str	w0, [x29, 88]
-.L271:
+.L275:
 	ldr	w0, [x29, 88]
 	str	w0, [x21, 16]
-.L270:
+.L274:
 	str	w22, [x21, 12]
 	str	w19, [x21, 8]
 	orr	w19, w19, 4
@@ -1853,38 +1876,38 @@ NandcXferStart:
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L272:
-	adrp	x0, .LANCHOR30
+.L276:
+	adrp	x0, .LANCHOR31
 	mov	w6, 64
 	lsr	w11, w2, 1
 	mov	x1, x5
-	ldr	w0, [x0, #:lo12:.LANCHOR30]
+	ldr	w0, [x0, #:lo12:.LANCHOR31]
 	mov	w7, 0
 	mov	w3, 0
 	mov	w12, -1
 	cmp	w0, 25
 	mov	w0, 128
 	csel	w6, w6, w0, cc
-	add	x0, x20, :lo12:.LANCHOR33
+	add	x0, x20, :lo12:.LANCHOR34
 	ldr	x10, [x0, 8]
-.L276:
+.L280:
 	cmp	w3, w11
-	bcs	.L280
+	bcs	.L284
 	lsr	w0, w7, 2
 	lsl	w0, w0, 2
-	cbz	x5, .L277
+	cbz	x5, .L281
 	ldrh	w13, [x1]
 	add	x1, x1, 4
 	ldrh	w8, [x1, -2]
 	orr	x8, x13, x8, lsl 16
 	str	w8, [x10, x0]
-.L278:
+.L282:
 	add	w3, w3, 1
 	add	w7, w7, w6
-	b	.L276
-.L277:
+	b	.L280
+.L281:
 	str	w12, [x10, x0]
-	b	.L278
+	b	.L282
 	.size	NandcXferStart, .-NandcXferStart
 	.section	.text.NandcXferComp,"ax",@progbits
 	.align	2
@@ -1894,82 +1917,63 @@ NandcXferComp:
 	ubfiz	x0, x0, 4, 8
 	adrp	x1, .LANCHOR6
 	add	x1, x1, :lo12:.LANCHOR6
-	stp	x29, x30, [sp, -48]!
+	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	ldr	x3, [x1, x0]
-	adrp	x0, .LANCHOR32
-	str	x19, [sp, 16]
-	ldr	w2, [x0, #:lo12:.LANCHOR32]
+	adrp	x0, .LANCHOR33
+	ldr	w2, [x0, #:lo12:.LANCHOR33]
 	cmp	w2, 3
-	bls	.L311
+	bls	.L313
 	ldr	w0, [x3, 16]
-	tbz	x0, 2, .L311
+	tbz	x0, 2, .L313
 	ldr	w0, [x3, 16]
-	tbz	x0, 1, .L299
+	tbz	x0, 1, .L301
 	ldr	w0, [x3, 8]
-	str	w0, [x29, 32]
-.L292:
+	str	w0, [x29, 16]
+.L296:
 	ldr	w1, [x3, 28]
-	ldr	w0, [x29, 32]
+	ldr	w0, [x29, 16]
 	ubfx	x1, x1, 16, 5
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0
-	bge	.L296
+	bge	.L297
 	cmp	w2, 5
-	bls	.L292
+	bls	.L296
 	ldr	w0, [x3]
-	str	w0, [x29, 40]
-	ldr	w0, [x29, 40]
-	tbz	x0, 13, .L292
-	ldr	w0, [x29, 40]
-	tbz	x0, 17, .L292
-.L296:
-	adrp	x19, .LANCHOR33
-	add	x19, x19, :lo12:.LANCHOR33
-	ldr	w0, [x19, 40]
-	cbz	w0, .L297
-	ldr	w1, [x29, 32]
-	ldr	w0, [x19, 32]
-	ubfx	x1, x1, 22, 5
-	add	w1, w0, w1, lsl 10
-	uxtw	x0, w0
-	bl	invalidate_dcache_range
-	ldr	w1, [x29, 32]
-	ldr	w0, [x19, 36]
-	ubfx	x1, x1, 22, 5
-	add	w1, w0, w1, lsl 7
-	uxtw	x0, w0
-	bl	invalidate_dcache_range
+	str	w0, [x29, 24]
+	ldr	w0, [x29, 24]
+	tbz	x0, 13, .L296
+	ldr	w0, [x29, 24]
+	tbz	x0, 17, .L296
 .L297:
-	adrp	x0, .LANCHOR33+40
-	str	wzr, [x0, #:lo12:.LANCHOR33+40]
-.L288:
-	ldr	x19, [sp, 16]
-	ldp	x29, x30, [sp], 48
+	adrp	x0, .LANCHOR34+40
+	str	wzr, [x0, #:lo12:.LANCHOR34+40]
+.L292:
+	ldp	x29, x30, [sp], 32
 	ret
-.L299:
+.L301:
 	ldr	w0, [x3, 8]
-	str	w0, [x29, 32]
-	ldr	w0, [x29, 32]
-	tbz	x0, 20, .L299
-	adrp	x0, .LANCHOR34
+	str	w0, [x29, 16]
+	ldr	w0, [x29, 16]
+	tbz	x0, 20, .L301
+	adrp	x0, .LANCHOR35
 	mov	x4, x0
-	ldr	w1, [x0, #:lo12:.LANCHOR34]
-	cbz	w1, .L300
+	ldr	w1, [x0, #:lo12:.LANCHOR35]
+	cbz	w1, .L302
 	mov	x0, x3
 	bl	NandcSendDumpDataStart
-.L300:
-	ldr	w0, [x4, #:lo12:.LANCHOR34]
+.L302:
+	ldr	w0, [x4, #:lo12:.LANCHOR35]
 	cbz	w0, .L297
 	mov	x0, x3
 	bl	NandcSendDumpDataDone
 	b	.L297
-.L311:
+.L313:
 	ldr	w0, [x3, 8]
-	str	w0, [x29, 32]
-	ldr	w0, [x29, 32]
-	tbz	x0, 20, .L311
-	b	.L288
+	str	w0, [x29, 16]
+	ldr	w0, [x29, 16]
+	tbz	x0, 20, .L313
+	b	.L292
 	.size	NandcXferComp, .-NandcXferComp
 	.section	.text.Ftl_log2,"ax",@progbits
 	.align	2
@@ -1978,16 +1982,16 @@ NandcXferComp:
 Ftl_log2:
 	mov	w2, 1
 	mov	w1, 0
-.L320:
+.L322:
 	cmp	w2, w0
-	bls	.L321
+	bls	.L323
 	sub	w0, w1, #1
 	ret
-.L321:
+.L323:
 	add	w1, w1, 1
 	lsl	w2, w2, 1
 	and	w1, w1, 65535
-	b	.L320
+	b	.L322
 	.size	Ftl_log2, .-Ftl_log2
 	.section	.text.FtlPrintInfo,"ax",@progbits
 	.align	2
@@ -2004,25 +2008,25 @@ FtlSysBlkNumInit:
 	and	w0, w0, 65535
 	mov	w1, 24
 	cmp	w0, 24
-	adrp	x2, .LANCHOR37
+	adrp	x2, .LANCHOR38
 	csel	w0, w0, w1, cs
-	adrp	x1, .LANCHOR35
-	and	w0, w0, 65535
-	str	w0, [x1, #:lo12:.LANCHOR35]
 	adrp	x1, .LANCHOR36
-	ldrh	w1, [x1, #:lo12:.LANCHOR36]
+	and	w0, w0, 65535
+	str	w0, [x1, #:lo12:.LANCHOR36]
+	adrp	x1, .LANCHOR37
+	ldrh	w1, [x1, #:lo12:.LANCHOR37]
 	mul	w1, w1, w0
-	str	w1, [x2, #:lo12:.LANCHOR37]
-	adrp	x2, .LANCHOR39
-	ldrh	w2, [x2, #:lo12:.LANCHOR39]
+	str	w1, [x2, #:lo12:.LANCHOR38]
+	adrp	x2, .LANCHOR40
+	ldrh	w2, [x2, #:lo12:.LANCHOR40]
 	sub	w0, w2, w0
-	adrp	x2, .LANCHOR38
-	strh	w0, [x2, #:lo12:.LANCHOR38]
-	adrp	x0, .LANCHOR41
-	ldr	w0, [x0, #:lo12:.LANCHOR41]
+	adrp	x2, .LANCHOR39
+	strh	w0, [x2, #:lo12:.LANCHOR39]
+	adrp	x0, .LANCHOR42
+	ldr	w0, [x0, #:lo12:.LANCHOR42]
 	sub	w1, w0, w1
-	adrp	x0, .LANCHOR40
-	str	w1, [x0, #:lo12:.LANCHOR40]
+	adrp	x0, .LANCHOR41
+	str	w1, [x0, #:lo12:.LANCHOR41]
 	mov	w0, 0
 	ret
 	.size	FtlSysBlkNumInit, .-FtlSysBlkNumInit
@@ -2033,45 +2037,45 @@ FtlSysBlkNumInit:
 FtlConstantsInit:
 	stp	x29, x30, [sp, -32]!
 	mov	x5, x0
-	adrp	x1, .LANCHOR44
-	adrp	x4, .LANCHOR43
+	adrp	x1, .LANCHOR45
+	adrp	x4, .LANCHOR44
 	add	x29, sp, 0
 	ldrh	w11, [x0, 8]
-	adrp	x0, .LANCHOR42
-	adrp	x6, .LANCHOR39
+	adrp	x0, .LANCHOR43
+	adrp	x6, .LANCHOR40
 	ldrh	w2, [x5, 10]
-	strh	w11, [x0, #:lo12:.LANCHOR42]
+	strh	w11, [x0, #:lo12:.LANCHOR43]
 	mov	x3, 0
 	ldrh	w0, [x5, 12]
 	ldrh	w8, [x5, 14]
-	strh	w0, [x1, #:lo12:.LANCHOR44]
-	adrp	x1, .LANCHOR45
-	add	x7, x1, :lo12:.LANCHOR45
-	strh	w2, [x4, #:lo12:.LANCHOR43]
-	strh	w8, [x6, #:lo12:.LANCHOR39]
+	strh	w0, [x1, #:lo12:.LANCHOR45]
+	adrp	x1, .LANCHOR46
+	add	x7, x1, :lo12:.LANCHOR46
+	strh	w2, [x4, #:lo12:.LANCHOR44]
+	strh	w8, [x6, #:lo12:.LANCHOR40]
 	str	x19, [sp, 16]
-.L325:
+.L327:
 	strb	w3, [x3, x7]
 	add	x3, x3, 1
 	cmp	x3, 32
-	bne	.L325
+	bne	.L327
 	ldrh	w7, [x5, 20]
 	ldrb	w3, [x5, 15]
 	cmp	w7, w3
-	bcs	.L326
+	bcs	.L328
 	and	w13, w0, 255
 	mul	w15, w0, w2
 	ubfiz	w14, w13, 1, 7
-	add	x1, x1, :lo12:.LANCHOR45
+	add	x1, x1, :lo12:.LANCHOR46
 	mov	w7, 0
-.L327:
+.L329:
 	cmp	w7, w0
-	bcs	.L329
+	bcs	.L331
 	and	w3, w7, 255
 	mov	w10, w7
 	mov	w12, 0
-	b	.L330
-.L328:
+	b	.L332
+.L330:
 	add	w16, w15, w10
 	strb	w3, [x1, w10, uxtw]
 	add	w17, w13, w3
@@ -2080,217 +2084,223 @@ FtlConstantsInit:
 	and	w3, w3, 255
 	add	w10, w10, w0
 	strb	w17, [x1, x16]
-.L330:
+.L332:
 	cmp	w12, w2
-	bcc	.L328
+	bcc	.L330
 	add	w7, w7, 1
-	b	.L327
-.L329:
+	b	.L329
+.L331:
 	ubfiz	w2, w2, 1, 15
 	lsr	w8, w8, 1
-	strh	w2, [x4, #:lo12:.LANCHOR43]
-	strh	w8, [x6, #:lo12:.LANCHOR39]
-.L326:
-	adrp	x1, .LANCHOR46
-	adrp	x13, .LANCHOR47
+	strh	w2, [x4, #:lo12:.LANCHOR44]
+	strh	w8, [x6, #:lo12:.LANCHOR40]
+.L328:
+	adrp	x1, .LANCHOR47
+	adrp	x13, .LANCHOR48
 	mov	w2, 5
 	cmp	w11, 1
-	strh	w2, [x1, #:lo12:.LANCHOR46]
-	strh	wzr, [x13, #:lo12:.LANCHOR47]
-	bne	.L331
-	strh	w11, [x1, #:lo12:.LANCHOR46]
-.L331:
-	adrp	x8, .LANCHOR48
+	strh	w2, [x1, #:lo12:.LANCHOR47]
+	strh	wzr, [x13, #:lo12:.LANCHOR48]
+	bne	.L333
+	strh	w11, [x1, #:lo12:.LANCHOR47]
+.L333:
+	adrp	x8, .LANCHOR49
 	mov	w1, 4352
-	strh	w1, [x8, #:lo12:.LANCHOR48]
+	strh	w1, [x8, #:lo12:.LANCHOR49]
 	adrp	x1, .LANCHOR1
 	ldrb	w11, [x1, #:lo12:.LANCHOR1]
-	cbz	w11, .L332
+	cbz	w11, .L334
 	mov	w1, 384
-	strh	w1, [x8, #:lo12:.LANCHOR48]
-.L332:
-	ldrh	w4, [x4, #:lo12:.LANCHOR43]
-	adrp	x1, .LANCHOR36
-	ldrh	w3, [x6, #:lo12:.LANCHOR39]
+	strh	w1, [x8, #:lo12:.LANCHOR49]
+.L334:
+	ldrh	w4, [x4, #:lo12:.LANCHOR44]
+	adrp	x1, .LANCHOR37
+	ldrh	w3, [x6, #:lo12:.LANCHOR40]
 	mul	w4, w0, w4
 	mul	w0, w0, w3
 	and	w4, w4, 65535
-	strh	w4, [x1, #:lo12:.LANCHOR36]
-	adrp	x1, .LANCHOR49
+	strh	w4, [x1, #:lo12:.LANCHOR37]
+	adrp	x1, .LANCHOR50
 	and	w0, w0, 65535
-	strh	w0, [x1, #:lo12:.LANCHOR49]
+	strh	w0, [x1, #:lo12:.LANCHOR50]
 	bl	Ftl_log2
 	ldrh	w19, [x5, 16]
-	adrp	x1, .LANCHOR50
+	adrp	x1, .LANCHOR51
 	ldrh	w10, [x5, 20]
-	adrp	x7, .LANCHOR51
-	strh	w0, [x1, #:lo12:.LANCHOR50]
-	adrp	x0, .LANCHOR52
+	adrp	x7, .LANCHOR52
+	strh	w0, [x1, #:lo12:.LANCHOR51]
+	adrp	x0, .LANCHOR53
 	ldrh	w14, [x5, 18]
-	adrp	x15, .LANCHOR54
+	adrp	x15, .LANCHOR55
 	mul	w1, w4, w19
-	strh	w14, [x0, #:lo12:.LANCHOR52]
-	adrp	x0, .LANCHOR53
-	strh	w19, [x7, #:lo12:.LANCHOR51]
-	strh	w10, [x15, #:lo12:.LANCHOR54]
-	strh	w1, [x0, #:lo12:.LANCHOR53]
+	strh	w14, [x0, #:lo12:.LANCHOR53]
+	adrp	x0, .LANCHOR54
+	strh	w19, [x7, #:lo12:.LANCHOR52]
+	strh	w10, [x15, #:lo12:.LANCHOR55]
+	strh	w1, [x0, #:lo12:.LANCHOR54]
 	mov	w0, w10
 	bl	Ftl_log2
 	and	w12, w0, 65535
-	adrp	x6, .LANCHOR55
+	adrp	x6, .LANCHOR56
 	ubfiz	w2, w10, 9, 7
 	ldrh	w1, [x5, 26]
 	cmp	w3, 1024
-	strh	w0, [x6, #:lo12:.LANCHOR55]
-	adrp	x0, .LANCHOR56
-	strh	w2, [x0, #:lo12:.LANCHOR56]
+	strh	w0, [x6, #:lo12:.LANCHOR56]
 	adrp	x0, .LANCHOR57
-	ubfx	w2, w2, 8, 8
 	strh	w2, [x0, #:lo12:.LANCHOR57]
 	adrp	x0, .LANCHOR58
-	strh	w1, [x0, #:lo12:.LANCHOR58]
-	adrp	x0, .LANCHOR41
+	ubfx	w2, w2, 8, 8
+	strh	w2, [x0, #:lo12:.LANCHOR58]
+	adrp	x0, .LANCHOR59
+	strh	w1, [x0, #:lo12:.LANCHOR59]
+	adrp	x0, .LANCHOR42
 	mul	w1, w4, w3
-	str	w1, [x0, #:lo12:.LANCHOR41]
-	bls	.L333
+	str	w1, [x0, #:lo12:.LANCHOR42]
+	bls	.L335
 	and	w0, w3, 255
-	strh	w0, [x13, #:lo12:.LANCHOR47]
-.L333:
-	ldrh	w0, [x13, #:lo12:.LANCHOR47]
-	adrp	x1, .LANCHOR59
+	strh	w0, [x13, #:lo12:.LANCHOR48]
+.L335:
+	ldrh	w0, [x13, #:lo12:.LANCHOR48]
+	adrp	x1, .LANCHOR60
 	sub	w0, w3, w0
 	mul	w0, w0, w4
 	mul	w0, w0, w10
 	mul	w0, w0, w19
 	asr	w0, w0, 11
-	str	w0, [x1, #:lo12:.LANCHOR59]
-	ldrh	w0, [x8, #:lo12:.LANCHOR48]
+	str	w0, [x1, #:lo12:.LANCHOR60]
+	ldrh	w0, [x8, #:lo12:.LANCHOR49]
 	mul	w1, w14, w10
-	adrp	x10, .LANCHOR60
+	adrp	x10, .LANCHOR61
 	lsl	w0, w0, 3
 	sdiv	w0, w0, w1
 	and	w0, w0, 65535
 	cmp	w0, 4
-	bls	.L334
+	bls	.L336
 .L352:
-	strh	w0, [x10, #:lo12:.LANCHOR60]
-	cbz	w11, .L336
+	strh	w0, [x10, #:lo12:.LANCHOR61]
+	cbz	w11, .L338
 	mov	w0, 640
-	strh	w0, [x8, #:lo12:.LANCHOR48]
-.L336:
-	ldrh	w0, [x8, #:lo12:.LANCHOR48]
-	adrp	x1, .LANCHOR61
+	strh	w0, [x8, #:lo12:.LANCHOR49]
+.L338:
+	ldrh	w0, [x8, #:lo12:.LANCHOR49]
+	adrp	x1, .LANCHOR62
 	lsl	w3, w3, 6
 	cmp	w4, 1
-	adrp	x8, .LANCHOR35
+	adrp	x8, .LANCHOR36
 	asr	w0, w0, w12
 	add	w0, w0, 2
-	strh	w0, [x1, #:lo12:.LANCHOR61]
+	strh	w0, [x1, #:lo12:.LANCHOR62]
 	add	w0, w12, 9
-	adrp	x1, .LANCHOR63
+	adrp	x1, .LANCHOR64
 	asr	w3, w3, w0
-	adrp	x0, .LANCHOR62
-	strh	w3, [x0, #:lo12:.LANCHOR62]
+	adrp	x0, .LANCHOR63
+	strh	w3, [x0, #:lo12:.LANCHOR63]
 	and	w3, w3, 65535
 	mul	w0, w4, w3
 	add	w3, w3, 8
-	str	w0, [x1, #:lo12:.LANCHOR63]
-	ldrh	w0, [x10, #:lo12:.LANCHOR60]
+	str	w0, [x1, #:lo12:.LANCHOR64]
+	ldrh	w0, [x10, #:lo12:.LANCHOR61]
 	udiv	w0, w0, w4
 	mov	x4, x1
 	add	w3, w0, w3
-	beq	.L337
+	beq	.L339
 .L353:
-	str	w3, [x8, #:lo12:.LANCHOR35]
-	ldrh	w0, [x8, #:lo12:.LANCHOR35]
+	str	w3, [x8, #:lo12:.LANCHOR36]
+	ldrh	w0, [x8, #:lo12:.LANCHOR36]
 	bl	FtlSysBlkNumInit
-	ldr	w1, [x8, #:lo12:.LANCHOR35]
-	adrp	x0, .LANCHOR64
+	ldr	w1, [x8, #:lo12:.LANCHOR36]
+	adrp	x0, .LANCHOR65
 	mov	w2, 24
-	str	w1, [x0, #:lo12:.LANCHOR64]
-	adrp	x0, .LANCHOR40
-	ldrh	w1, [x7, #:lo12:.LANCHOR51]
-	ldr	w0, [x0, #:lo12:.LANCHOR40]
+	str	w1, [x0, #:lo12:.LANCHOR65]
+	adrp	x0, .LANCHOR41
+	ldrh	w1, [x7, #:lo12:.LANCHOR52]
+	ldr	w0, [x0, #:lo12:.LANCHOR41]
 	lsl	w0, w0, 2
 	mul	w0, w0, w1
-	ldrh	w1, [x6, #:lo12:.LANCHOR55]
+	ldrh	w1, [x6, #:lo12:.LANCHOR56]
+	adrp	x6, .LANCHOR8
 	add	w1, w1, 9
+	ldrb	w6, [x6, #:lo12:.LANCHOR8]
 	lsr	w0, w0, w1
-	adrp	x1, .LANCHOR65
+	adrp	x1, .LANCHOR66
 	add	w0, w0, 2
 	and	w0, w0, 65535
-	strh	w0, [x1, #:lo12:.LANCHOR65]
-	adrp	x1, .LANCHOR66
-	strh	w2, [x1, #:lo12:.LANCHOR66]
+	strh	w0, [x1, #:lo12:.LANCHOR66]
 	adrp	x1, .LANCHOR67
-	ldrh	w2, [x10, #:lo12:.LANCHOR60]
-	str	wzr, [x1, #:lo12:.LANCHOR67]
+	strh	w2, [x1, #:lo12:.LANCHOR67]
+	adrp	x1, .LANCHOR68
+	ldrh	w2, [x10, #:lo12:.LANCHOR61]
+	str	wzr, [x1, #:lo12:.LANCHOR68]
 	add	w1, w2, 3
-	strh	w1, [x10, #:lo12:.LANCHOR60]
-	ldr	w1, [x4, #:lo12:.LANCHOR63]
+	strh	w1, [x10, #:lo12:.LANCHOR61]
+	ldr	w1, [x4, #:lo12:.LANCHOR64]
 	add	w3, w1, 3
-	str	w3, [x4, #:lo12:.LANCHOR63]
-	adrp	x3, .LANCHOR8
-	ldrb	w3, [x3, #:lo12:.LANCHOR8]
-	cbz	w3, .L339
-	add	w2, w2, 4
+	str	w3, [x4, #:lo12:.LANCHOR64]
+	cbz	w6, .L341
 	add	w1, w1, 5
-	strh	w2, [x10, #:lo12:.LANCHOR60]
-	str	w1, [x4, #:lo12:.LANCHOR63]
-.L339:
-	adrp	x1, .LANCHOR38
-	adrp	x3, .LANCHOR68
-	ldrh	w1, [x1, #:lo12:.LANCHOR38]
-	strh	wzr, [x3, #:lo12:.LANCHOR68]
+	add	w2, w2, 4
+	strh	w2, [x10, #:lo12:.LANCHOR61]
+.L354:
+	str	w1, [x4, #:lo12:.LANCHOR64]
+.L342:
+	adrp	x1, .LANCHOR39
+	adrp	x3, .LANCHOR69
+	ldrh	w1, [x1, #:lo12:.LANCHOR39]
+	strh	wzr, [x3, #:lo12:.LANCHOR69]
 	lsl	w2, w1, 1
 	lsr	w1, w1, 3
 	add	w2, w2, 48
 	add	w1, w1, 4
 	add	w0, w2, w0, lsl 2
 	add	w0, w0, w1
-	ldrh	w1, [x15, #:lo12:.LANCHOR54]
+	ldrh	w1, [x15, #:lo12:.LANCHOR55]
 	cmp	w0, w1, lsl 9
-	bcs	.L340
+	bcs	.L343
 	mov	w0, 1
-	strh	w0, [x3, #:lo12:.LANCHOR68]
-.L340:
+	strh	w0, [x3, #:lo12:.LANCHOR69]
+.L343:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L334:
+.L336:
 	mov	w0, 4
 	b	.L352
-.L337:
+.L339:
 	add	w3, w3, 4
 	b	.L353
+.L341:
+	cmp	w3, 7
+	bhi	.L342
+	mov	w1, 8
+	b	.L354
 	.size	FtlConstantsInit, .-FtlConstantsInit
 	.section	.text.IsBlkInVendorPart,"ax",@progbits
 	.align	2
 	.global	IsBlkInVendorPart
 	.type	IsBlkInVendorPart, %function
 IsBlkInVendorPart:
-	adrp	x1, .LANCHOR69
-	and	w0, w0, 65535
-	ldrh	w1, [x1, #:lo12:.LANCHOR69]
-	cbz	w1, .L358
-	adrp	x1, .LANCHOR60
-	ldrh	w2, [x1, #:lo12:.LANCHOR60]
 	adrp	x1, .LANCHOR70
-	ldr	x3, [x1, #:lo12:.LANCHOR70]
+	and	w0, w0, 65535
+	ldrh	w1, [x1, #:lo12:.LANCHOR70]
+	cbz	w1, .L359
+	adrp	x1, .LANCHOR61
+	ldrh	w2, [x1, #:lo12:.LANCHOR61]
+	adrp	x1, .LANCHOR71
+	ldr	x3, [x1, #:lo12:.LANCHOR71]
 	mov	x1, 0
-.L356:
+.L357:
 	cmp	w2, w1, uxth
-	bhi	.L357
-.L358:
+	bhi	.L358
+.L359:
 	mov	w0, 0
 	ret
-.L357:
+.L358:
 	add	x1, x1, 1
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w0
-	bne	.L356
+	bne	.L357
 	mov	w0, 1
 	ret
 	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
@@ -2299,8 +2309,8 @@ IsBlkInVendorPart:
 	.global	FtlGetCap
 	.type	FtlGetCap, %function
 FtlGetCap:
-	adrp	x0, .LANCHOR67
-	ldr	w0, [x0, #:lo12:.LANCHOR67]
+	adrp	x0, .LANCHOR68
+	ldr	w0, [x0, #:lo12:.LANCHOR68]
 	ret
 	.size	FtlGetCap, .-FtlGetCap
 	.section	.text.FtlGetCapacity,"ax",@progbits
@@ -2308,8 +2318,8 @@ FtlGetCap:
 	.global	FtlGetCapacity
 	.type	FtlGetCapacity, %function
 FtlGetCapacity:
-	adrp	x0, .LANCHOR67
-	ldr	w0, [x0, #:lo12:.LANCHOR67]
+	adrp	x0, .LANCHOR68
+	ldr	w0, [x0, #:lo12:.LANCHOR68]
 	ret
 	.size	FtlGetCapacity, .-FtlGetCapacity
 	.section	.text.ftl_get_density,"ax",@progbits
@@ -2317,8 +2327,8 @@ FtlGetCapacity:
 	.global	ftl_get_density
 	.type	ftl_get_density, %function
 ftl_get_density:
-	adrp	x0, .LANCHOR67
-	ldr	w0, [x0, #:lo12:.LANCHOR67]
+	adrp	x0, .LANCHOR68
+	ldr	w0, [x0, #:lo12:.LANCHOR68]
 	ret
 	.size	ftl_get_density, .-ftl_get_density
 	.section	.text.FtlGetLpn,"ax",@progbits
@@ -2326,8 +2336,8 @@ ftl_get_density:
 	.global	FtlGetLpn
 	.type	FtlGetLpn, %function
 FtlGetLpn:
-	adrp	x0, .LANCHOR71
-	ldr	w0, [x0, #:lo12:.LANCHOR71]
+	adrp	x0, .LANCHOR72
+	ldr	w0, [x0, #:lo12:.LANCHOR72]
 	ret
 	.size	FtlGetLpn, .-FtlGetLpn
 	.section	.text.FtlGetCurEraseBlock,"ax",@progbits
@@ -2335,10 +2345,10 @@ FtlGetLpn:
 	.global	FtlGetCurEraseBlock
 	.type	FtlGetCurEraseBlock, %function
 FtlGetCurEraseBlock:
-	adrp	x0, .LANCHOR36
-	ldrh	w1, [x0, #:lo12:.LANCHOR36]
-	adrp	x0, .LANCHOR72
-	ldr	w0, [x0, #:lo12:.LANCHOR72]
+	adrp	x0, .LANCHOR37
+	ldrh	w1, [x0, #:lo12:.LANCHOR37]
+	adrp	x0, .LANCHOR73
+	ldr	w0, [x0, #:lo12:.LANCHOR73]
 	mul	w0, w1, w0
 	ret
 	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
@@ -2347,10 +2357,10 @@ FtlGetCurEraseBlock:
 	.global	FtlGetAllBlockNum
 	.type	FtlGetAllBlockNum, %function
 FtlGetAllBlockNum:
-	adrp	x0, .LANCHOR39
-	ldrh	w1, [x0, #:lo12:.LANCHOR39]
-	adrp	x0, .LANCHOR36
-	ldrh	w0, [x0, #:lo12:.LANCHOR36]
+	adrp	x0, .LANCHOR40
+	ldrh	w1, [x0, #:lo12:.LANCHOR40]
+	adrp	x0, .LANCHOR37
+	ldrh	w0, [x0, #:lo12:.LANCHOR37]
 	mul	w0, w1, w0
 	ret
 	.size	FtlGetAllBlockNum, .-FtlGetAllBlockNum
@@ -2361,13 +2371,13 @@ FtlGetAllBlockNum:
 FtlBbmMapBadBlock:
 	stp	x29, x30, [sp, -32]!
 	and	w1, w0, 65535
-	adrp	x0, .LANCHOR49
+	adrp	x0, .LANCHOR50
 	mov	w4, 1
 	add	x29, sp, 0
-	ldrh	w0, [x0, #:lo12:.LANCHOR49]
+	ldrh	w0, [x0, #:lo12:.LANCHOR50]
 	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR73
-	add	x19, x19, :lo12:.LANCHOR73
+	adrp	x19, .LANCHOR74
+	add	x19, x19, :lo12:.LANCHOR74
 	udiv	w3, w1, w0
 	and	w2, w3, 65535
 	msub	w3, w3, w0, w1
@@ -2397,13 +2407,13 @@ FtlBbmMapBadBlock:
 	.global	FtlBbmIsBadBlock
 	.type	FtlBbmIsBadBlock, %function
 FtlBbmIsBadBlock:
-	adrp	x1, .LANCHOR49
+	adrp	x1, .LANCHOR50
 	and	w0, w0, 65535
-	ldrh	w1, [x1, #:lo12:.LANCHOR49]
+	ldrh	w1, [x1, #:lo12:.LANCHOR50]
 	udiv	w2, w0, w1
 	msub	w0, w2, w1, w0
-	adrp	x1, .LANCHOR73
-	add	x1, x1, :lo12:.LANCHOR73
+	adrp	x1, .LANCHOR74
+	add	x1, x1, :lo12:.LANCHOR74
 	add	x2, x1, x2, uxth 3
 	and	w0, w0, 65535
 	ubfx	x3, x0, 5, 11
@@ -2426,12 +2436,12 @@ FtlBbtInfoPrint:
 	.global	V2P_block
 	.type	V2P_block, %function
 V2P_block:
-	adrp	x2, .LANCHOR44
+	adrp	x2, .LANCHOR45
 	and	w0, w0, 65535
-	adrp	x4, .LANCHOR49
+	adrp	x4, .LANCHOR50
 	and	w1, w1, 65535
-	ldrh	w2, [x2, #:lo12:.LANCHOR44]
-	ldrh	w4, [x4, #:lo12:.LANCHOR49]
+	ldrh	w2, [x2, #:lo12:.LANCHOR45]
+	ldrh	w4, [x4, #:lo12:.LANCHOR50]
 	udiv	w3, w0, w2
 	msub	w0, w3, w2, w0
 	madd	w2, w2, w1, w0
@@ -2444,10 +2454,10 @@ V2P_block:
 	.type	P2V_plane, %function
 P2V_plane:
 	and	w3, w0, 65535
-	adrp	x0, .LANCHOR44
-	ldrh	w1, [x0, #:lo12:.LANCHOR44]
-	adrp	x0, .LANCHOR49
-	ldrh	w2, [x0, #:lo12:.LANCHOR49]
+	adrp	x0, .LANCHOR45
+	ldrh	w1, [x0, #:lo12:.LANCHOR45]
+	adrp	x0, .LANCHOR50
+	ldrh	w2, [x0, #:lo12:.LANCHOR50]
 	udiv	w0, w3, w1
 	udiv	w2, w3, w2
 	msub	w0, w0, w1, w3
@@ -2460,12 +2470,12 @@ P2V_plane:
 	.type	P2V_block_in_plane, %function
 P2V_block_in_plane:
 	and	w2, w0, 65535
-	adrp	x0, .LANCHOR49
-	ldrh	w1, [x0, #:lo12:.LANCHOR49]
+	adrp	x0, .LANCHOR50
+	ldrh	w1, [x0, #:lo12:.LANCHOR50]
 	udiv	w0, w2, w1
 	msub	w0, w0, w1, w2
-	adrp	x1, .LANCHOR44
-	ldrh	w1, [x1, #:lo12:.LANCHOR44]
+	adrp	x1, .LANCHOR45
+	ldrh	w1, [x1, #:lo12:.LANCHOR45]
 	and	w0, w0, 65535
 	udiv	w0, w0, w1
 	ret
@@ -2477,12 +2487,12 @@ P2V_block_in_plane:
 ftl_cmp_data_ver:
 	cmp	w0, w1
 	mov	w2, -2147483648
-	bls	.L374
+	bls	.L375
 	sub	w1, w0, w1
 	cmp	w1, w2
 	cset	w0, ls
 	ret
-.L374:
+.L375:
 	sub	w1, w1, w0
 	cmp	w1, w2
 	cset	w0, hi
@@ -2493,8 +2503,8 @@ ftl_cmp_data_ver:
 	.global	FtlFreeSysBlkQueueEmpty
 	.type	FtlFreeSysBlkQueueEmpty, %function
 FtlFreeSysBlkQueueEmpty:
-	adrp	x0, .LANCHOR74+6
-	ldrh	w0, [x0, #:lo12:.LANCHOR74+6]
+	adrp	x0, .LANCHOR75+6
+	ldrh	w0, [x0, #:lo12:.LANCHOR75+6]
 	cmp	w0, 0
 	cset	w0, eq
 	ret
@@ -2504,8 +2514,8 @@ FtlFreeSysBlkQueueEmpty:
 	.global	FtlFreeSysBlkQueueFull
 	.type	FtlFreeSysBlkQueueFull, %function
 FtlFreeSysBlkQueueFull:
-	adrp	x0, .LANCHOR74+6
-	ldrh	w0, [x0, #:lo12:.LANCHOR74+6]
+	adrp	x0, .LANCHOR75+6
+	ldrh	w0, [x0, #:lo12:.LANCHOR75+6]
 	cmp	w0, 1024
 	cset	w0, eq
 	ret
@@ -2519,40 +2529,40 @@ FtlFreeSysBlkQueueIn:
 	add	x29, sp, 0
 	str	x21, [sp, 32]
 	and	w21, w0, 65535
-	adrp	x0, .LANCHOR74
-	add	x2, x0, :lo12:.LANCHOR74
+	adrp	x0, .LANCHOR75
+	add	x2, x0, :lo12:.LANCHOR75
 	stp	x19, x20, [sp, 16]
 	ldrh	w2, [x2, 6]
 	cmp	w2, 1024
-	beq	.L378
+	beq	.L379
 	and	w1, w1, 65535
 	mov	x19, x0
-	cbz	w1, .L380
-	adrp	x0, .LANCHOR75
-	ldr	w0, [x0, #:lo12:.LANCHOR75]
-	cbnz	w0, .L380
+	cbz	w1, .L381
+	adrp	x0, .LANCHOR76
+	ldr	w0, [x0, #:lo12:.LANCHOR76]
+	cbnz	w0, .L381
 	mov	w0, w21
 	bl	P2V_block_in_plane
 	and	w20, w0, 65535
-	adrp	x0, .LANCHOR76
+	adrp	x0, .LANCHOR77
 	lsl	w1, w21, 10
 	mov	w2, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR76]
+	ldr	x0, [x0, #:lo12:.LANCHOR77]
 	str	w1, [x0, 4]
 	mov	w1, w2
 	bl	FlashEraseBlocks
-	adrp	x1, .LANCHOR77
+	adrp	x1, .LANCHOR78
 	ubfiz	x0, x20, 1, 16
-	ldr	x2, [x1, #:lo12:.LANCHOR77]
+	ldr	x2, [x1, #:lo12:.LANCHOR78]
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-	adrp	x1, .LANCHOR78
-	ldr	w0, [x1, #:lo12:.LANCHOR78]
+	adrp	x1, .LANCHOR79
+	ldr	w0, [x1, #:lo12:.LANCHOR79]
 	add	w0, w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR78]
-.L380:
-	add	x0, x19, :lo12:.LANCHOR74
+	str	w0, [x1, #:lo12:.LANCHOR79]
+.L381:
+	add	x0, x19, :lo12:.LANCHOR75
 	ldrh	w1, [x0, 6]
 	add	w1, w1, 1
 	strh	w1, [x0, 6]
@@ -2562,7 +2572,7 @@ FtlFreeSysBlkQueueIn:
 	and	w1, w1, 1023
 	strh	w1, [x0, 4]
 	strh	w21, [x2, 8]
-.L378:
+.L379:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -2573,77 +2583,37 @@ FtlFreeSysBlkQueueIn:
 	.global	FtlFreeSysBLkSort
 	.type	FtlFreeSysBLkSort, %function
 FtlFreeSysBLkSort:
-	stp	x29, x30, [sp, -16]!
-	adrp	x2, .LANCHOR74
-	adrp	x1, .LANCHOR79
-	add	x0, x2, :lo12:.LANCHOR74
-	add	x29, sp, 0
-	ldr	x3, [x1, #:lo12:.LANCHOR79]
-	adrp	x1, .LANCHOR77
-	ldrh	w8, [x0, 2]
-	mov	x4, x2
-	ldrh	w7, [x0, 6]
-	mov	x6, x0
-	ldr	x10, [x1, #:lo12:.LANCHOR77]
-	and	x11, x8, 65535
-	mov	x5, 0
+	adrp	x0, .LANCHOR80+28
+	mov	w6, 0
+	mov	w4, 0
+	ldrh	w5, [x0, #:lo12:.LANCHOR80+28]
+	adrp	x0, .LANCHOR75
+	add	x3, x0, :lo12:.LANCHOR75
+	and	w5, w5, 31
+	ldrh	w2, [x3, 2]
+	ldrh	w1, [x3, 4]
+.L390:
+	cmp	w5, w4
+	bgt	.L391
+	cbz	w6, .L389
+	add	x0, x0, :lo12:.LANCHOR75
+	strh	w2, [x0, 2]
+	strh	w1, [x0, 4]
 .L389:
-	cmp	w7, w5, uxth
-	bhi	.L390
-	sub	w10, w7, #1
-	add	x2, x4, :lo12:.LANCHOR74
-	mov	w0, 0
-.L391:
-	cmp	w0, w10
-	blt	.L396
-	ldp	x29, x30, [sp], 16
 	ret
-.L390:
-	add	x0, x11, x5
-	add	x0, x6, x0, lsl 1
-	ldrh	w0, [x0, 8]
-	bl	P2V_block_in_plane
-	ubfiz	x0, x0, 1, 16
-	ldrh	w0, [x10, x0]
-	str	w0, [x3, x5, lsl 2]
-	add	x5, x5, 1
-	b	.L389
-.L396:
-	add	w5, w0, 1
-	mov	w1, w0
-	and	w5, w5, 65535
-	mov	w4, w5
-.L392:
-	cmp	w4, w7
-	bcc	.L394
-	cmp	w0, w1
-	beq	.L395
-	ubfiz	x4, x0, 2, 16
-	ubfiz	x6, x1, 2, 32
-	add	w0, w8, w0
-	add	w1, w1, w8
-	add	x0, x2, x0, sxtw 1
-	add	x1, x2, x1, sxtw 1
-	ldr	w12, [x3, x4]
-	ldr	w11, [x3, x6]
-	str	w12, [x3, x6]
-	str	w11, [x3, x4]
-	ldrh	w6, [x0, 8]
-	ldrh	w4, [x1, 8]
-	strh	w6, [x1, 8]
-	strh	w4, [x0, 8]
-.L395:
-	mov	w0, w5
-	b	.L391
-.L394:
-	ubfiz	x6, x4, 2, 16
-	ldr	w11, [x3, w1, uxtw 2]
-	ldr	w6, [x3, x6]
-	cmp	w11, w6
-	csel	w1, w1, w4, ls
+.L391:
+	add	x6, x3, x2, sxtw 1
 	add	w4, w4, 1
+	add	w2, w2, 1
 	and	w4, w4, 65535
-	b	.L392
+	and	w2, w2, 1023
+	ldrh	w7, [x6, 8]
+	add	x6, x3, x1, sxtw 1
+	strh	w7, [x6, 8]
+	mov	w6, 1
+	add	w1, w1, w6
+	and	w1, w1, 1023
+	b	.L390
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
 	.section	.text.remove_from_free_sys_Queue,"ax",@progbits
 	.align	2
@@ -2653,26 +2623,26 @@ remove_from_free_sys_Queue:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR74
-	add	x19, x19, :lo12:.LANCHOR74
+	adrp	x19, .LANCHOR75
+	add	x19, x19, :lo12:.LANCHOR75
 	ldrh	w3, [x19, 6]
-	cbz	w3, .L403
+	cbz	w3, .L401
 	and	w1, w0, 65535
 	ldrh	w0, [x19, 2]
 	mov	w20, 0
-.L400:
+.L398:
 	cmp	w20, w3
-	bcc	.L402
-.L403:
+	bcc	.L400
+.L401:
 	mov	w0, 0
-	b	.L398
-.L402:
+	b	.L396
+.L400:
 	add	w2, w20, w0
 	ubfiz	x2, x2, 1, 10
 	add	x2, x19, x2
 	ldrh	w2, [x2, 8]
 	cmp	w2, w1
-	bne	.L401
+	bne	.L399
 	adrp	x0, .LC3
 	add	x0, x0, :lo12:.LC3
 	bl	printf
@@ -2690,45 +2660,49 @@ remove_from_free_sys_Queue:
 	strh	w1, [x20, 8]
 	strh	w0, [x19, 6]
 	mov	w0, 1
-.L398:
+.L396:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L401:
+.L399:
 	add	w20, w20, 1
-	b	.L400
+	b	.L398
 	.size	remove_from_free_sys_Queue, .-remove_from_free_sys_Queue
 	.section	.text.FtlFreeSysBlkQueueOut,"ax",@progbits
 	.align	2
 	.global	FtlFreeSysBlkQueueOut
 	.type	FtlFreeSysBlkQueueOut, %function
 FtlFreeSysBlkQueueOut:
-	adrp	x0, .LANCHOR74
-	add	x0, x0, :lo12:.LANCHOR74
-	stp	x29, x30, [sp, -48]!
+	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
-	ldrh	w2, [x0, 6]
 	stp	x19, x20, [sp, 16]
-	str	x21, [sp, 32]
-	cbz	w2, .L408
-	ldrh	w1, [x0, 2]
-	sub	w2, w2, #1
-	strh	w2, [x0, 6]
-	add	x3, x0, x1, sxtw 1
-	add	w1, w1, 1
-	and	w1, w1, 1023
-	strh	w1, [x0, 2]
-	adrp	x0, .LANCHOR75
-	ldrh	w19, [x3, 8]
-	ldr	w0, [x0, #:lo12:.LANCHOR75]
+	adrp	x19, .LANCHOR75
+	add	x19, x19, :lo12:.LANCHOR75
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	adrp	x22, .LANCHOR76
+	mov	x23, x19
+	add	x22, x22, :lo12:.LANCHOR76
+.L404:
+	ldrh	w1, [x19, 6]
+	cbz	w1, .L405
+	ldrh	w0, [x19, 2]
+	sub	w1, w1, #1
+	strh	w1, [x19, 6]
+	add	x2, x19, x0, sxtw 1
+	add	w0, w0, 1
+	and	w0, w0, 1023
+	strh	w0, [x19, 2]
+	ldr	w0, [x22]
+	ldrh	w20, [x2, 8]
 	cbnz	w0, .L406
-	mov	w0, w19
+	mov	w0, w20
 	bl	P2V_block_in_plane
-	adrp	x1, .LANCHOR76
-	and	w20, w0, 65535
-	lsl	w2, w19, 10
-	mov	x21, x1
-	ldr	x0, [x1, #:lo12:.LANCHOR76]
+	adrp	x1, .LANCHOR77
+	and	w21, w0, 65535
+	lsl	w2, w20, 10
+	mov	x24, x1
+	ldr	x0, [x1, #:lo12:.LANCHOR77]
 	str	w2, [x0, 4]
 	adrp	x2, .LANCHOR8
 	ldrb	w2, [x2, #:lo12:.LANCHOR8]
@@ -2737,63 +2711,76 @@ FtlFreeSysBlkQueueOut:
 	mov	w1, 0
 	bl	FlashEraseBlocks
 .L407:
-	ldr	x0, [x21, #:lo12:.LANCHOR76]
+	ldr	x0, [x24, #:lo12:.LANCHOR77]
 	mov	w2, 1
 	mov	w1, w2
 	bl	FlashEraseBlocks
-	adrp	x1, .LANCHOR77
-	ubfiz	x0, x20, 1, 16
-	ldr	x2, [x1, #:lo12:.LANCHOR77]
+	adrp	x1, .LANCHOR78
+	ubfiz	x0, x21, 1, 16
+	ldr	x2, [x1, #:lo12:.LANCHOR78]
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-	adrp	x1, .LANCHOR78
-	ldr	w0, [x1, #:lo12:.LANCHOR78]
+	adrp	x1, .LANCHOR79
+	ldr	w0, [x1, #:lo12:.LANCHOR79]
 	add	w0, w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR78]
+	str	w0, [x1, #:lo12:.LANCHOR79]
 .L406:
-	mov	w0, w19
-	ldr	x21, [sp, 32]
+	cbnz	w20, .L409
+	ldrh	w2, [x23, 6]
+	mov	w1, 0
+	adrp	x0, .LC5
+	add	x0, x0, :lo12:.LC5
+	bl	printf
+	b	.L404
+.L405:
+	adrp	x0, .LC4
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+.L408:
+	b	.L408
+.L409:
+	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
 	ret
-.L408:
-	mov	w19, 65535
-	b	.L406
 	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
 	.section	.text.insert_data_list,"ax",@progbits
 	.align	2
 	.global	insert_data_list
 	.type	insert_data_list, %function
 insert_data_list:
-	adrp	x1, .LANCHOR38
+	adrp	x1, .LANCHOR39
 	and	w0, w0, 65535
-	ldrh	w14, [x1, #:lo12:.LANCHOR38]
+	ldrh	w14, [x1, #:lo12:.LANCHOR39]
 	cmp	w14, w0
-	bls	.L429
-	adrp	x1, .LANCHOR80
+	bls	.L430
+	adrp	x1, .LANCHOR81
 	mov	w3, 6
-	ldr	x6, [x1, #:lo12:.LANCHOR80]
+	ldr	x6, [x1, #:lo12:.LANCHOR81]
 	umull	x13, w0, w3
 	mov	w1, -1
 	add	x5, x6, x13
 	strh	w1, [x5, 2]
 	strh	w1, [x6, x13]
-	adrp	x1, .LANCHOR81
+	adrp	x1, .LANCHOR82
 	mov	x15, x1
-	ldr	x12, [x1, #:lo12:.LANCHOR81]
-	cbnz	x12, .L416
-	str	x5, [x1, #:lo12:.LANCHOR81]
-.L429:
+	ldr	x12, [x1, #:lo12:.LANCHOR82]
+	cbnz	x12, .L417
+	str	x5, [x1, #:lo12:.LANCHOR82]
+.L430:
 	mov	w0, 0
 	ret
-.L416:
+.L417:
 	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LANCHOR82
+	adrp	x1, .LANCHOR83
 	ubfiz	x2, x0, 1, 16
 	mov	x4, -6148914691236517206
 	add	x29, sp, 0
-	ldr	x16, [x1, #:lo12:.LANCHOR82]
+	ldr	x16, [x1, #:lo12:.LANCHOR83]
 	movk	x4, 0xaaab, lsl 0
 	ldrh	w1, [x5, 4]
 	mov	w8, -1
@@ -2808,19 +2795,19 @@ insert_data_list:
 	csel	w7, w7, w8, ne
 	mov	w8, w3
 	mul	x1, x1, x4
-	adrp	x4, .LANCHOR77
-	ldr	x17, [x4, #:lo12:.LANCHOR77]
+	adrp	x4, .LANCHOR78
+	ldr	x17, [x4, #:lo12:.LANCHOR78]
 	and	w1, w1, 65535
 	mov	x4, x12
 	add	x10, x17, x2
 	mov	w2, 0
-.L424:
+.L425:
 	add	w2, w2, 1
 	and	w2, w2, 65535
 	cmp	w14, w2
-	bcc	.L415
+	bcc	.L416
 	cmp	w1, w0
-	beq	.L415
+	beq	.L416
 	ubfiz	x30, x1, 1, 16
 	ldrh	w19, [x4, 4]
 	cmp	w19, 0
@@ -2828,46 +2815,46 @@ insert_data_list:
 	mul	w3, w3, w19
 	csel	w3, w3, w11, ne
 	cmp	w7, w3
-	bne	.L420
+	bne	.L421
 	ldrh	w19, [x17, x30]
 	ldrh	w3, [x10]
 	cmp	w19, w3
-	bcc	.L422
-.L421:
+	bcc	.L423
+.L422:
 	strh	w1, [x6, x13]
 	cmp	x4, x12
 	ldrh	w1, [x4, 2]
 	strh	w1, [x5, 2]
-	bne	.L425
+	bne	.L426
 	strh	w0, [x4, 2]
-	str	x5, [x15, #:lo12:.LANCHOR81]
-	b	.L415
-.L420:
-	bcc	.L421
-.L422:
+	str	x5, [x15, #:lo12:.LANCHOR82]
+	b	.L416
+.L421:
+	bcc	.L422
+.L423:
 	ldrh	w3, [x4]
 	cmp	w3, w20
-	bne	.L423
+	bne	.L424
 	strh	w1, [x5, 2]
 	strh	w0, [x4]
-	adrp	x0, .LANCHOR83
-	str	x5, [x0, #:lo12:.LANCHOR83]
-.L415:
+	adrp	x0, .LANCHOR84
+	str	x5, [x0, #:lo12:.LANCHOR84]
+.L416:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L423:
+.L424:
 	umaddl	x4, w3, w8, x6
 	mov	w1, w3
-	b	.L424
-.L425:
+	b	.L425
+.L426:
 	ldrh	w1, [x4, 2]
 	mov	w2, 6
 	umull	x1, w1, w2
 	strh	w0, [x6, x1]
 	strh	w0, [x4, 2]
-	b	.L415
+	b	.L416
 	.size	insert_data_list, .-insert_data_list
 	.section	.text.INSERT_DATA_LIST,"ax",@progbits
 	.align	2
@@ -2877,28 +2864,28 @@ INSERT_DATA_LIST:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	insert_data_list
-	adrp	x1, .LANCHOR84
-	ldrh	w0, [x1, #:lo12:.LANCHOR84]
+	adrp	x1, .LANCHOR85
+	ldrh	w0, [x1, #:lo12:.LANCHOR85]
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	strh	w0, [x1, #:lo12:.LANCHOR84]
-	adrp	x1, .LANCHOR38
-	ldrh	w1, [x1, #:lo12:.LANCHOR38]
+	strh	w0, [x1, #:lo12:.LANCHOR85]
+	adrp	x1, .LANCHOR39
+	ldrh	w1, [x1, #:lo12:.LANCHOR39]
 	cmp	w1, w0
-	bcs	.L431
-	mov	w2, 205
-	adrp	x1, .LANCHOR85
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR85
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	ldp	x29, x30, [sp], 16
-	adrp	x1, .LC5
+	bcs	.L432
+	mov	w2, 228
+	adrp	x1, .LANCHOR86
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR86
 	add	x0, x0, :lo12:.LC6
+	bl	printf
+	ldp	x29, x30, [sp], 16
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
 	b	printf
-.L431:
+.L432:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
@@ -2910,28 +2897,28 @@ insert_free_list:
 	and	w0, w0, 65535
 	mov	w7, 65535
 	cmp	w0, w7
-	beq	.L435
-	adrp	x1, .LANCHOR80
+	beq	.L436
+	adrp	x1, .LANCHOR81
 	mov	w6, 6
-	ldr	x3, [x1, #:lo12:.LANCHOR80]
+	ldr	x3, [x1, #:lo12:.LANCHOR81]
 	umull	x8, w0, w6
 	mov	w1, -1
 	add	x4, x3, x8
 	strh	w1, [x4, 2]
 	strh	w1, [x3, x8]
-	adrp	x1, .LANCHOR86
+	adrp	x1, .LANCHOR87
 	mov	x12, x1
-	ldr	x5, [x1, #:lo12:.LANCHOR86]
-	cbnz	x5, .L436
-	str	x4, [x1, #:lo12:.LANCHOR86]
-.L435:
+	ldr	x5, [x1, #:lo12:.LANCHOR87]
+	cbnz	x5, .L437
+	str	x4, [x1, #:lo12:.LANCHOR87]
+.L436:
 	mov	w0, 0
 	ret
-.L436:
-	adrp	x1, .LANCHOR77
+.L437:
+	adrp	x1, .LANCHOR78
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
-	ldr	x11, [x1, #:lo12:.LANCHOR77]
+	ldr	x11, [x1, #:lo12:.LANCHOR78]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w13, [x11, x1]
 	sub	x1, x5, x3
@@ -2939,37 +2926,37 @@ insert_free_list:
 	mul	x1, x1, x2
 	mov	x2, x5
 	and	w1, w1, 65535
-.L439:
+.L440:
 	ubfiz	x10, x1, 1, 16
 	ldrh	w10, [x11, x10]
 	cmp	w10, w13
-	bcs	.L437
+	bcs	.L438
 	ldrh	w10, [x2]
 	cmp	w10, w7
-	bne	.L438
+	bne	.L439
 	strh	w1, [x4, 2]
 	strh	w0, [x2]
-	b	.L435
-.L438:
+	b	.L436
+.L439:
 	umaddl	x2, w10, w6, x3
 	mov	w1, w10
-	b	.L439
-.L437:
+	b	.L440
+.L438:
 	ldrh	w6, [x2, 2]
 	cmp	x2, x5
 	strh	w6, [x4, 2]
 	strh	w1, [x3, x8]
-	bne	.L440
+	bne	.L441
 	strh	w0, [x2, 2]
-	str	x4, [x12, #:lo12:.LANCHOR86]
-	b	.L435
-.L440:
+	str	x4, [x12, #:lo12:.LANCHOR87]
+	b	.L436
+.L441:
 	ldrh	w1, [x2, 2]
 	mov	w4, 6
 	umull	x1, w1, w4
 	strh	w0, [x3, x1]
 	strh	w0, [x2, 2]
-	b	.L435
+	b	.L436
 	.size	insert_free_list, .-insert_free_list
 	.section	.text.INSERT_FREE_LIST,"ax",@progbits
 	.align	2
@@ -2979,28 +2966,28 @@ INSERT_FREE_LIST:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	insert_free_list
-	adrp	x1, .LANCHOR87
-	ldrh	w0, [x1, #:lo12:.LANCHOR87]
+	adrp	x1, .LANCHOR88
+	ldrh	w0, [x1, #:lo12:.LANCHOR88]
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	strh	w0, [x1, #:lo12:.LANCHOR87]
-	adrp	x1, .LANCHOR38
-	ldrh	w1, [x1, #:lo12:.LANCHOR38]
+	strh	w0, [x1, #:lo12:.LANCHOR88]
+	adrp	x1, .LANCHOR39
+	ldrh	w1, [x1, #:lo12:.LANCHOR39]
 	cmp	w1, w0
-	bcs	.L441
-	mov	w2, 198
-	adrp	x1, .LANCHOR88
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR88
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	ldp	x29, x30, [sp], 16
-	adrp	x1, .LC5
+	bcs	.L442
+	mov	w2, 221
+	adrp	x1, .LANCHOR89
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR89
 	add	x0, x0, :lo12:.LC6
+	bl	printf
+	ldp	x29, x30, [sp], 16
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
 	b	printf
-.L441:
+.L442:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
@@ -3013,42 +3000,42 @@ List_remove_node:
 	and	w1, w1, 65535
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR80
+	adrp	x20, .LANCHOR81
 	stp	x21, x22, [sp, 32]
 	mov	x22, x0
 	mov	w0, 6
 	str	x23, [sp, 48]
-	ldr	x23, [x20, #:lo12:.LANCHOR80]
+	ldr	x23, [x20, #:lo12:.LANCHOR81]
 	umull	x21, w1, w0
 	mov	w0, 65535
 	add	x19, x23, x21
 	ldrh	w1, [x19, 2]
 	cmp	w1, w0
-	bne	.L445
+	bne	.L446
 	ldr	x0, [x22]
 	cmp	x19, x0
-	beq	.L445
-	mov	w2, 363
-	adrp	x1, .LANCHOR89
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR89
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
+	beq	.L446
+	mov	w2, 386
+	adrp	x1, .LANCHOR90
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR90
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L445:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L446:
 	ldr	x0, [x22]
 	mov	w1, 65535
 	cmp	x19, x0
 	ldrh	w0, [x23, x21]
-	bne	.L446
-	cmp	w0, w1
 	bne	.L447
+	cmp	w0, w1
+	bne	.L448
 	str	xzr, [x22]
-.L448:
+.L449:
 	mov	w0, -1
 	strh	w0, [x23, x21]
 	strh	w0, [x19, 2]
@@ -3058,35 +3045,35 @@ List_remove_node:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L447:
-	ldr	x1, [x20, #:lo12:.LANCHOR80]
+.L448:
+	ldr	x1, [x20, #:lo12:.LANCHOR81]
 	mov	w2, 6
 	umaddl	x0, w0, w2, x1
 	mov	w1, -1
 	str	x0, [x22]
 	strh	w1, [x0, 2]
-	b	.L448
-.L446:
+	b	.L449
+.L447:
 	cmp	w0, w1
 	ldrh	w1, [x19, 2]
-	bne	.L449
+	bne	.L450
 	cmp	w1, w0
-	beq	.L448
+	beq	.L449
 	mov	w0, 6
 	mov	w2, -1
 	umull	x1, w1, w0
-	ldr	x0, [x20, #:lo12:.LANCHOR80]
+	ldr	x0, [x20, #:lo12:.LANCHOR81]
 	strh	w2, [x0, x1]
-	b	.L448
-.L449:
-	ldr	x2, [x20, #:lo12:.LANCHOR80]
+	b	.L449
+.L450:
+	ldr	x2, [x20, #:lo12:.LANCHOR81]
 	mov	w3, 6
 	umaddl	x4, w0, w3, x2
 	strh	w1, [x4, 2]
 	ldrh	w1, [x19, 2]
 	umull	x1, w1, w3
 	strh	w0, [x2, x1]
-	b	.L448
+	b	.L449
 	.size	List_remove_node, .-List_remove_node
 	.section	.text.List_pop_index_node,"ax",@progbits
 	.align	2
@@ -3094,18 +3081,18 @@ List_remove_node:
 	.type	List_pop_index_node, %function
 List_pop_index_node:
 	ldr	x2, [x0]
-	cbz	x2, .L457
+	cbz	x2, .L458
 	stp	x29, x30, [sp, -32]!
-	adrp	x3, .LANCHOR80
+	adrp	x3, .LANCHOR81
 	and	w1, w1, 65535
 	mov	w4, 65535
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	mov	w5, 6
-	ldr	x19, [x3, #:lo12:.LANCHOR80]
-.L453:
-	cbnz	w1, .L454
-.L456:
+	ldr	x19, [x3, #:lo12:.LANCHOR81]
+.L454:
+	cbnz	w1, .L455
+.L457:
 	sub	x19, x2, x19
 	mov	x2, -6148914691236517206
 	asr	x19, x19, 1
@@ -3118,15 +3105,15 @@ List_pop_index_node:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L454:
+.L455:
 	ldrh	w3, [x2]
 	cmp	w3, w4
-	beq	.L456
+	beq	.L457
 	sub	w1, w1, #1
 	umaddl	x2, w3, w5, x19
 	and	w1, w1, 65535
-	b	.L453
-.L457:
+	b	.L454
+.L458:
 	mov	w0, 65535
 	ret
 	.size	List_pop_index_node, .-List_pop_index_node
@@ -3136,28 +3123,28 @@ List_pop_index_node:
 	.type	List_get_gc_head_node, %function
 List_get_gc_head_node:
 	and	w2, w0, 65535
+	adrp	x0, .LANCHOR82
+	ldr	x1, [x0, #:lo12:.LANCHOR82]
+	cbz	x1, .L468
 	adrp	x0, .LANCHOR81
-	ldr	x1, [x0, #:lo12:.LANCHOR81]
-	cbz	x1, .L467
-	adrp	x0, .LANCHOR80
 	mov	w4, 6
-	ldr	x3, [x0, #:lo12:.LANCHOR80]
+	ldr	x3, [x0, #:lo12:.LANCHOR81]
 	mov	w0, 65535
-.L464:
-	cbz	w2, .L465
+.L465:
+	cbz	w2, .L466
 	ldrh	w1, [x1]
 	cmp	w1, w0
-	bne	.L466
+	bne	.L467
 	ret
-.L466:
+.L467:
 	sub	w2, w2, #1
 	umaddl	x1, w1, w4, x3
 	and	w2, w2, 65535
-	b	.L464
-.L467:
+	b	.L465
+.L468:
 	mov	w0, 65535
 	ret
-.L465:
+.L466:
 	sub	x0, x1, x3
 	mov	x1, -6148914691236517206
 	asr	x0, x0, 1
@@ -3175,108 +3162,107 @@ List_update_data_list:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w19, w0, 65535
-	adrp	x0, .LANCHOR90
+	adrp	x0, .LANCHOR91
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	ldrh	w0, [x0, #:lo12:.LANCHOR90]
-	stp	x25, x26, [sp, 64]
-	cmp	w0, w19
-	beq	.L470
-	adrp	x0, .LANCHOR91
 	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	stp	x25, x26, [sp, 64]
 	cmp	w0, w19
-	beq	.L470
+	beq	.L471
 	adrp	x0, .LANCHOR92
 	ldrh	w0, [x0, #:lo12:.LANCHOR92]
 	cmp	w0, w19
-	beq	.L470
-	adrp	x1, .LANCHOR80
-	mov	w21, 6
+	beq	.L471
+	adrp	x0, .LANCHOR93
+	ldrh	w0, [x0, #:lo12:.LANCHOR93]
+	cmp	w0, w19
+	beq	.L471
 	adrp	x0, .LANCHOR81
-	mov	x26, x1
+	mov	w21, 6
+	adrp	x24, .LANCHOR82
+	mov	x26, x0
 	umull	x21, w19, w21
-	ldr	x23, [x1, #:lo12:.LANCHOR80]
-	ldr	x2, [x0, #:lo12:.LANCHOR81]
-	mov	x25, x0
+	ldr	x23, [x0, #:lo12:.LANCHOR81]
+	ldr	x1, [x24, #:lo12:.LANCHOR82]
 	add	x22, x23, x21
-	cmp	x22, x2
-	beq	.L470
-	adrp	x1, .LANCHOR82
+	cmp	x22, x1
+	beq	.L471
+	adrp	x1, .LANCHOR83
 	ubfiz	x0, x19, 1, 16
-	mov	x24, x1
-	ldr	x2, [x1, #:lo12:.LANCHOR82]
+	mov	x25, x1
+	ldr	x2, [x1, #:lo12:.LANCHOR83]
 	mov	w1, 65535
 	ldrh	w20, [x2, x0]
 	ldrh	w0, [x22, 4]
+	cmp	w0, 0
 	mul	w20, w20, w0
 	ldrh	w0, [x22, 2]
-	cmp	w20, 0
 	csinv	w20, w20, wzr, ne
 	cmp	w0, w1
-	bne	.L473
+	bne	.L474
 	ldrh	w1, [x23, x21]
 	cmp	w1, w0
-	bne	.L473
-	mov	w2, 481
-	adrp	x1, .LANCHOR93
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR93
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
+	bne	.L474
+	mov	w2, 504
+	adrp	x1, .LANCHOR94
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR94
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L473:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L474:
 	ldrh	w0, [x22, 2]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L474
+	bne	.L475
 	ldrh	w1, [x23, x21]
 	cmp	w1, w0
-	beq	.L470
-.L474:
+	beq	.L471
+.L475:
 	mov	w1, 6
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
-	umull	x1, w0, w1
-	asr	x0, x1, 1
-	mul	x0, x0, x2
-	ldr	x2, [x24, #:lo12:.LANCHOR82]
-	ldrh	w0, [x2, x0, lsl 1]
-	ldr	x2, [x26, #:lo12:.LANCHOR80]
-	add	x1, x2, x1
-	ldrh	w1, [x1, 4]
-	mul	w0, w0, w1
-	cmp	w0, 0
+	umull	x0, w0, w1
+	asr	x1, x0, 1
+	mul	x1, x1, x2
+	ldr	x2, [x25, #:lo12:.LANCHOR83]
+	ldrh	w1, [x2, x1, lsl 1]
+	ldr	x2, [x26, #:lo12:.LANCHOR81]
+	add	x0, x2, x0
+	ldrh	w2, [x0, 4]
+	cmp	w2, 0
+	mul	w0, w1, w2
 	csinv	w0, w0, wzr, ne
 	cmp	w20, w0
-	bcs	.L470
-	adrp	x20, .LANCHOR84
+	bcs	.L471
+	adrp	x20, .LANCHOR85
 	mov	w1, w19
-	add	x0, x25, :lo12:.LANCHOR81
+	add	x0, x24, :lo12:.LANCHOR82
 	bl	List_remove_node
-	ldrh	w0, [x20, #:lo12:.LANCHOR84]
-	cbnz	w0, .L476
-	mov	w2, 492
-	adrp	x1, .LANCHOR93
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR93
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
+	ldrh	w0, [x20, #:lo12:.LANCHOR85]
+	cbnz	w0, .L477
+	mov	w2, 515
+	adrp	x1, .LANCHOR94
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR94
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L476:
-	ldrh	w0, [x20, #:lo12:.LANCHOR84]
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L477:
+	ldrh	w0, [x20, #:lo12:.LANCHOR85]
 	sub	w0, w0, #1
-	strh	w0, [x20, #:lo12:.LANCHOR84]
+	strh	w0, [x20, #:lo12:.LANCHOR85]
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-.L470:
+.L471:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -3298,30 +3284,27 @@ ftl_map_blk_alloc_new_blk:
 	mov	w20, 0
 	ldr	x0, [x0, 16]
 	str	x21, [sp, 32]
-.L479:
-	cmp	w20, w1
-	bne	.L482
-.L483:
-	mov	w2, 594
-	adrp	x1, .LANCHOR94
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR94
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
-	add	x0, x0, :lo12:.LC6
-	bl	printf
-	b	.L484
 .L482:
+	cmp	w20, w1
+	beq	.L486
 	mov	x21, x0
 	ldrh	w2, [x0], 2
-	cbnz	w2, .L480
+	cbnz	w2, .L483
 	bl	FtlFreeSysBlkQueueOut
+	and	w1, w0, 65535
 	strh	w0, [x21]
-	tst	w0, 65535
-	beq	.L481
+	sub	w2, w1, #1
+	mov	w0, 65533
+	cmp	w0, w2, uxth
+	bcs	.L484
+	adrp	x0, .LANCHOR75+6
+	ldrh	w2, [x0, #:lo12:.LANCHOR75+6]
+	adrp	x0, .LC9
+	add	x0, x0, :lo12:.LC9
+	bl	printf
+.L485:
+	b	.L485
+.L484:
 	ldr	w0, [x19, 48]
 	strh	wzr, [x19, 2]
 	add	w0, w0, 1
@@ -3330,20 +3313,31 @@ ftl_map_blk_alloc_new_blk:
 	strh	w20, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
-.L481:
+.L486:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bls	.L483
-.L484:
+	bhi	.L488
+	mov	w2, 627
+	adrp	x1, .LANCHOR95
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LANCHOR95
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L488:
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L480:
+.L483:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L479
+	b	.L482
 	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
 	.section	.text.select_l2p_ram_region,"ax",@progbits
 	.align	2
@@ -3351,128 +3345,128 @@ ftl_map_blk_alloc_new_blk:
 	.type	select_l2p_ram_region, %function
 select_l2p_ram_region:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR66
+	adrp	x0, .LANCHOR67
 	mov	x1, 0
 	mov	w3, 65535
 	add	x29, sp, 0
-	ldrh	w2, [x0, #:lo12:.LANCHOR66]
-	adrp	x0, .LANCHOR95
+	ldrh	w2, [x0, #:lo12:.LANCHOR67]
+	adrp	x0, .LANCHOR96
 	str	x19, [sp, 16]
-	ldr	x0, [x0, #:lo12:.LANCHOR95]
-.L490:
+	ldr	x0, [x0, #:lo12:.LANCHOR96]
+.L491:
 	and	w19, w1, 65535
 	cmp	w19, w2
-	bcc	.L492
+	bcc	.L493
 	add	x3, x0, 4
 	mov	w19, w2
 	mov	w5, -2147483648
 	mov	w1, 0
-.L493:
+.L494:
 	cmp	w1, w2
-	bne	.L495
+	bne	.L496
 	cmp	w19, w2
-	bcc	.L491
-	adrp	x1, .LANCHOR96
+	bcc	.L492
+	adrp	x1, .LANCHOR97
 	mov	w19, w2
 	mov	w3, -1
-	ldrh	w4, [x1, #:lo12:.LANCHOR96]
+	ldrh	w4, [x1, #:lo12:.LANCHOR97]
 	mov	w1, 0
-.L496:
+.L497:
 	cmp	w1, w2
-	bne	.L498
+	bne	.L499
 	cmp	w19, w1
-	bcc	.L491
-	mov	w2, 826
-	adrp	x1, .LANCHOR97
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR97
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
+	bcc	.L492
+	mov	w2, 859
+	adrp	x1, .LANCHOR98
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR98
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-	b	.L491
-.L492:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+	b	.L492
+.L493:
 	add	x1, x1, 1
 	add	x4, x0, x1, lsl 4
 	ldrh	w4, [x4, -16]
 	cmp	w4, w3
-	bne	.L490
-.L491:
+	bne	.L491
+.L492:
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L495:
+.L496:
 	ldr	w4, [x3]
-	tbnz	w4, #31, .L494
+	tbnz	w4, #31, .L495
 	cmp	w5, w4
-	bls	.L494
+	bls	.L495
 	mov	w5, w4
 	mov	w19, w1
-.L494:
+.L495:
 	add	w1, w1, 1
 	add	x3, x3, 16
 	and	w1, w1, 65535
-	b	.L493
-.L498:
+	b	.L494
+.L499:
 	ldr	w6, [x0, 4]
 	cmp	w3, w6
-	bls	.L497
+	bls	.L498
 	ldrh	w5, [x0]
 	cmp	w5, w4
 	csel	w3, w3, w6, eq
 	csel	w19, w19, w1, eq
-.L497:
+.L498:
 	add	w1, w1, 1
 	add	x0, x0, 16
 	and	w1, w1, 65535
-	b	.L496
+	b	.L497
 	.size	select_l2p_ram_region, .-select_l2p_ram_region
 	.section	.text.FtlUpdateVaildLpn,"ax",@progbits
 	.align	2
 	.global	FtlUpdateVaildLpn
 	.type	FtlUpdateVaildLpn, %function
 FtlUpdateVaildLpn:
-	adrp	x2, .LANCHOR98
+	adrp	x2, .LANCHOR99
 	mov	x3, x2
-	ldrh	w1, [x2, #:lo12:.LANCHOR98]
+	ldrh	w1, [x2, #:lo12:.LANCHOR99]
 	cmp	w1, 4
-	bhi	.L501
-	cbnz	w0, .L501
+	bhi	.L502
+	cbnz	w0, .L502
 	add	w1, w1, 1
-	strh	w1, [x2, #:lo12:.LANCHOR98]
+	strh	w1, [x2, #:lo12:.LANCHOR99]
 	ret
-.L501:
-	adrp	x1, .LANCHOR38
-	adrp	x0, .LANCHOR99
-	strh	wzr, [x3, #:lo12:.LANCHOR98]
+.L502:
+	adrp	x1, .LANCHOR39
+	adrp	x0, .LANCHOR100
+	strh	wzr, [x3, #:lo12:.LANCHOR99]
 	mov	w2, 0
-	ldrh	w5, [x1, #:lo12:.LANCHOR38]
-	adrp	x1, .LANCHOR82
-	str	wzr, [x0, #:lo12:.LANCHOR99]
+	ldrh	w5, [x1, #:lo12:.LANCHOR39]
+	adrp	x1, .LANCHOR83
+	str	wzr, [x0, #:lo12:.LANCHOR100]
 	mov	w3, 0
-	ldr	x6, [x1, #:lo12:.LANCHOR82]
+	ldr	x6, [x1, #:lo12:.LANCHOR83]
 	mov	w7, 65535
 	mov	x1, 0
-.L502:
+.L503:
 	cmp	w5, w1, uxth
-	bhi	.L504
-	cbz	w3, .L500
-	str	w2, [x0, #:lo12:.LANCHOR99]
-.L500:
+	bhi	.L505
+	cbz	w3, .L501
+	str	w2, [x0, #:lo12:.LANCHOR100]
+.L501:
 	ret
-.L504:
+.L505:
 	ldrh	w4, [x6, x1, lsl 1]
 	cmp	w4, w7
-	beq	.L503
+	beq	.L504
 	add	w2, w2, w4
 	mov	w3, 1
-.L503:
+.L504:
 	add	x1, x1, 1
-	b	.L502
+	b	.L503
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
 	.section	.text.ftl_set_blk_mode,"ax",@progbits
 	.align	2
@@ -3480,9 +3474,9 @@ FtlUpdateVaildLpn:
 	.type	ftl_set_blk_mode, %function
 ftl_set_blk_mode:
 	and	w0, w0, 65535
-	cbz	w1, .L511
+	cbz	w1, .L512
 	b	ftl_set_blk_mode.part.9
-.L511:
+.L512:
 	adrp	x1, .LANCHOR0
 	ubfx	x2, x0, 5, 11
 	lsl	x2, x2, 2
@@ -3518,51 +3512,51 @@ ftl_sb_update_avl_pages:
 	and	w2, w2, 65535
 	and	w6, w1, 65535
 	ubfiz	x4, x2, 1, 16
-	adrp	x1, .LANCHOR36
+	adrp	x1, .LANCHOR37
 	add	x4, x4, 16
 	strh	wzr, [x0, 4]
 	add	x4, x0, x4
-	ldrh	w3, [x1, #:lo12:.LANCHOR36]
+	ldrh	w3, [x1, #:lo12:.LANCHOR37]
 	mov	w1, 65535
-.L514:
+.L515:
 	cmp	w2, w3
-	bcc	.L516
-	adrp	x1, .LANCHOR51
+	bcc	.L517
+	adrp	x1, .LANCHOR52
 	ubfiz	x3, x3, 1, 16
 	add	x3, x3, 16
 	add	x2, x0, 16
-	ldrh	w1, [x1, #:lo12:.LANCHOR51]
+	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	add	x3, x0, x3
 	mov	w5, 65535
 	sub	w1, w1, #1
 	and	w1, w1, 65535
 	sub	w1, w1, w6
-.L517:
+.L518:
 	cmp	x2, x3
-	bne	.L519
+	bne	.L520
 	ret
-.L516:
+.L517:
 	ldrh	w5, [x4]
 	cmp	w5, w1
-	beq	.L515
+	beq	.L516
 	ldrh	w5, [x0, 4]
 	add	w5, w5, 1
 	strh	w5, [x0, 4]
-.L515:
+.L516:
 	add	w2, w2, 1
 	add	x4, x4, 2
 	and	w2, w2, 65535
-	b	.L514
-.L519:
+	b	.L515
+.L520:
 	ldrh	w4, [x2]
 	cmp	w4, w5
-	beq	.L518
+	beq	.L519
 	ldrh	w4, [x0, 4]
 	add	w4, w1, w4
 	strh	w4, [x0, 4]
-.L518:
+.L519:
 	add	x2, x2, 2
-	b	.L517
+	b	.L518
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
 	.section	.text.make_superblock,"ax",@progbits
 	.align	2
@@ -3574,78 +3568,78 @@ make_superblock:
 	ldrh	w1, [x0]
 	str	x19, [sp, 16]
 	mov	x19, x0
-	adrp	x0, .LANCHOR38
-	ldrh	w0, [x0, #:lo12:.LANCHOR38]
+	adrp	x0, .LANCHOR39
+	ldrh	w0, [x0, #:lo12:.LANCHOR39]
 	cmp	w1, w0
-	bcc	.L521
-	mov	w2, 2298
-	adrp	x1, .LANCHOR100
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR100
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
+	bcc	.L522
+	mov	w2, 2335
+	adrp	x1, .LANCHOR101
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR101
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L521:
-	adrp	x0, .LANCHOR36
-	adrp	x7, .LANCHOR45
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L522:
+	adrp	x0, .LANCHOR37
+	adrp	x7, .LANCHOR46
 	add	x6, x19, 16
-	add	x7, x7, :lo12:.LANCHOR45
-	ldrh	w8, [x0, #:lo12:.LANCHOR36]
+	add	x7, x7, :lo12:.LANCHOR46
+	ldrh	w8, [x0, #:lo12:.LANCHOR37]
 	mov	x5, 0
 	strh	wzr, [x19, 4]
 	mov	w10, -1
 	strb	wzr, [x19, 7]
-.L522:
+.L523:
 	cmp	w8, w5, uxth
-	bhi	.L524
-	adrp	x1, .LANCHOR51
+	bhi	.L525
+	adrp	x1, .LANCHOR52
 	ldrb	w0, [x19, 7]
 	strb	wzr, [x19, 9]
-	ldrh	w1, [x1, #:lo12:.LANCHOR51]
+	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	mul	w0, w0, w1
 	strh	w0, [x19, 4]
-	adrp	x0, .LANCHOR101
-	ldr	w0, [x0, #:lo12:.LANCHOR101]
-	cbz	w0, .L525
-	adrp	x0, .LANCHOR77
+	adrp	x0, .LANCHOR28
+	ldr	w0, [x0, #:lo12:.LANCHOR28]
+	cbz	w0, .L526
+	adrp	x0, .LANCHOR78
 	ldrh	w1, [x19]
-	ldr	x0, [x0, #:lo12:.LANCHOR77]
+	ldr	x0, [x0, #:lo12:.LANCHOR78]
 	ldrh	w0, [x0, x1, lsl 1]
 	cmp	w0, 59
-	bhi	.L525
+	bhi	.L526
 	mov	w0, 1
 	strb	w0, [x19, 9]
-.L525:
+.L526:
 	adrp	x0, .LANCHOR1
 	ldrb	w0, [x0, #:lo12:.LANCHOR1]
-	cbz	w0, .L526
+	cbz	w0, .L527
 	mov	w0, 1
 	strb	w0, [x19, 9]
-.L526:
+.L527:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L524:
+.L525:
 	ldrh	w1, [x19]
 	ldrb	w0, [x7, x5]
 	bl	V2P_block
 	mov	w4, w0
 	strh	w10, [x6]
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L523
+	cbnz	w0, .L524
 	strh	w4, [x6]
 	ldrb	w0, [x19, 7]
 	add	w0, w0, 1
 	strb	w0, [x19, 7]
-.L523:
+.L524:
 	add	x5, x5, 1
 	add	x6, x6, 2
-	b	.L522
+	b	.L523
 	.size	make_superblock, .-make_superblock
 	.section	.text.update_multiplier_value,"ax",@progbits
 	.align	2
@@ -3653,55 +3647,55 @@ make_superblock:
 	.type	update_multiplier_value, %function
 update_multiplier_value:
 	and	w6, w0, 65535
-	adrp	x0, .LANCHOR36
+	adrp	x0, .LANCHOR37
 	mov	x7, 0
-	adrp	x8, .LANCHOR45
-	ldrh	w10, [x0, #:lo12:.LANCHOR36]
-	adrp	x0, .LANCHOR51
+	adrp	x8, .LANCHOR46
+	ldrh	w10, [x0, #:lo12:.LANCHOR37]
+	adrp	x0, .LANCHOR52
 	mov	w5, 0
-	add	x8, x8, :lo12:.LANCHOR45
-	ldrh	w11, [x0, #:lo12:.LANCHOR51]
+	add	x8, x8, :lo12:.LANCHOR46
+	ldrh	w11, [x0, #:lo12:.LANCHOR52]
 	cmp	w10, w7, uxth
-	bhi	.L546
-	cbz	w5, .L544
+	bhi	.L547
+	cbz	w5, .L545
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.L545:
-	adrp	x0, .LANCHOR80
+.L546:
+	adrp	x0, .LANCHOR81
 	mov	w1, 6
-	ldr	x0, [x0, #:lo12:.LANCHOR80]
+	ldr	x0, [x0, #:lo12:.LANCHOR81]
 	umaddl	x6, w6, w1, x0
 	mov	w0, 0
 	strh	w5, [x6, 4]
 	ret
-.L539:
+.L540:
 	mov	w5, 0
-	b	.L538
-.L544:
+	b	.L539
+.L545:
 	mov	w5, 0
-	b	.L545
-.L546:
+	b	.L546
+.L547:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
-.L537:
+.L538:
 	ldrb	w0, [x8, x7]
 	mov	w1, w6
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L536
+	cbnz	w0, .L537
 	add	w5, w5, w11
 	and	w5, w5, 65535
-.L536:
+.L537:
 	add	x7, x7, 1
 	cmp	w10, w7, uxth
-	bhi	.L537
-	cbz	w5, .L539
+	bhi	.L538
+	cbz	w5, .L540
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.L538:
-	adrp	x0, .LANCHOR80
+.L539:
+	adrp	x0, .LANCHOR81
 	mov	w1, 6
-	ldr	x0, [x0, #:lo12:.LANCHOR80]
+	ldr	x0, [x0, #:lo12:.LANCHOR81]
 	umaddl	x6, w6, w1, x0
 	mov	w0, 0
 	strh	w5, [x6, 4]
@@ -3713,22 +3707,22 @@ update_multiplier_value:
 	.global	GetFreeBlockMinEraseCount
 	.type	GetFreeBlockMinEraseCount, %function
 GetFreeBlockMinEraseCount:
-	adrp	x0, .LANCHOR86
-	ldr	x0, [x0, #:lo12:.LANCHOR86]
-	cbz	x0, .L549
-	adrp	x1, .LANCHOR80
-	ldr	x1, [x1, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR87
+	ldr	x0, [x0, #:lo12:.LANCHOR87]
+	cbz	x0, .L550
+	adrp	x1, .LANCHOR81
+	ldr	x1, [x1, #:lo12:.LANCHOR81]
 	sub	x0, x0, x1
 	mov	x1, -6148914691236517206
 	asr	x0, x0, 1
 	movk	x1, 0xaaab, lsl 0
 	mul	x0, x0, x1
-	adrp	x1, .LANCHOR77
-	ldr	x1, [x1, #:lo12:.LANCHOR77]
+	adrp	x1, .LANCHOR78
+	ldr	x1, [x1, #:lo12:.LANCHOR78]
 	and	x0, x0, 65535
 	ldrh	w0, [x1, x0, lsl 1]
 	ret
-.L549:
+.L550:
 	mov	w0, 0
 	ret
 	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
@@ -3737,21 +3731,21 @@ GetFreeBlockMinEraseCount:
 	.global	GetFreeBlockMaxEraseCount
 	.type	GetFreeBlockMaxEraseCount, %function
 GetFreeBlockMaxEraseCount:
-	adrp	x1, .LANCHOR86
+	adrp	x1, .LANCHOR87
 	and	w0, w0, 65535
-	ldr	x1, [x1, #:lo12:.LANCHOR86]
-	cbz	x1, .L557
-	adrp	x2, .LANCHOR87
+	ldr	x1, [x1, #:lo12:.LANCHOR87]
+	cbz	x1, .L558
+	adrp	x2, .LANCHOR88
 	mov	w3, 7
 	mov	w5, 6
 	mov	w6, 65535
-	ldrh	w2, [x2, #:lo12:.LANCHOR87]
+	ldrh	w2, [x2, #:lo12:.LANCHOR88]
 	mul	w2, w2, w3
 	asr	w2, w2, 3
 	cmp	w0, w2
 	csel	w0, w2, w0, gt
-	adrp	x2, .LANCHOR80
-	ldr	x3, [x2, #:lo12:.LANCHOR80]
+	adrp	x2, .LANCHOR81
+	ldr	x3, [x2, #:lo12:.LANCHOR81]
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
 	sub	x1, x1, x3
@@ -3759,25 +3753,25 @@ GetFreeBlockMaxEraseCount:
 	mul	x1, x1, x2
 	mov	w2, 0
 	and	w1, w1, 65535
-.L553:
+.L554:
 	cmp	w0, w2
-	beq	.L556
+	beq	.L557
 	umull	x4, w1, w5
 	ldrh	w4, [x3, x4]
 	cmp	w4, w6
-	bne	.L554
-.L556:
-	adrp	x0, .LANCHOR77
+	bne	.L555
+.L557:
+	adrp	x0, .LANCHOR78
 	ubfiz	x1, x1, 1, 16
-	ldr	x0, [x0, #:lo12:.LANCHOR77]
+	ldr	x0, [x0, #:lo12:.LANCHOR78]
 	ldrh	w0, [x0, x1]
 	ret
-.L554:
+.L555:
 	add	w2, w2, 1
 	mov	w1, w4
 	and	w2, w2, 65535
-	b	.L553
-.L557:
+	b	.L554
+.L558:
 	mov	w0, 0
 	ret
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
@@ -3789,18 +3783,18 @@ free_data_superblock:
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L561
+	beq	.L562
 	stp	x29, x30, [sp, -16]!
-	adrp	x2, .LANCHOR82
+	adrp	x2, .LANCHOR83
 	ubfiz	x1, x0, 1, 16
 	add	x29, sp, 0
-	ldr	x2, [x2, #:lo12:.LANCHOR82]
+	ldr	x2, [x2, #:lo12:.LANCHOR83]
 	strh	wzr, [x2, x1]
 	bl	INSERT_FREE_LIST
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L561:
+.L562:
 	mov	w0, 0
 	ret
 	.size	free_data_superblock, .-free_data_superblock
@@ -3814,14 +3808,14 @@ FtlGcBufInit:
 	adrp	x7, .LANCHOR104
 	adrp	x6, .LANCHOR105
 	ldr	x5, [x1, #:lo12:.LANCHOR103]
-	adrp	x1, .LANCHOR56
-	str	wzr, [x0, #:lo12:.LANCHOR102]
-	adrp	x0, .LANCHOR36
-	ldrh	w10, [x1, #:lo12:.LANCHOR56]
 	adrp	x1, .LANCHOR57
-	ldrh	w0, [x0, #:lo12:.LANCHOR36]
+	str	wzr, [x0, #:lo12:.LANCHOR102]
+	adrp	x0, .LANCHOR37
+	ldrh	w10, [x1, #:lo12:.LANCHOR57]
+	adrp	x1, .LANCHOR58
+	ldrh	w0, [x0, #:lo12:.LANCHOR37]
 	mov	w8, 24
-	ldrh	w11, [x1, #:lo12:.LANCHOR57]
+	ldrh	w11, [x1, #:lo12:.LANCHOR58]
 	adrp	x1, .LANCHOR106
 	ldr	x14, [x7, #:lo12:.LANCHOR104]
 	mov	x3, x5
@@ -3833,21 +3827,21 @@ FtlGcBufInit:
 	add	x4, x4, 8
 	mov	w1, 0
 	mov	w16, 1
-.L565:
+.L566:
 	add	w13, w2, w10
 	add	w12, w1, w11
 	cmp	x3, x8
-	bne	.L566
+	bne	.L567
 	adrp	x1, .LANCHOR107
 	ldr	x7, [x7, #:lo12:.LANCHOR104]
 	ldr	x6, [x6, #:lo12:.LANCHOR105]
 	mov	w8, 24
 	ldr	w4, [x1, #:lo12:.LANCHOR107]
-.L567:
+.L568:
 	cmp	w0, w4
-	bcc	.L568
+	bcc	.L569
 	ret
-.L566:
+.L567:
 	asr	w2, w2, 2
 	asr	w1, w1, 2
 	add	x2, x14, x2, sxtw 2
@@ -3859,8 +3853,8 @@ FtlGcBufInit:
 	add	x4, x4, 56
 	mov	w1, w12
 	mov	w2, w13
-	b	.L565
-.L568:
+	b	.L566
+.L569:
 	umull	x3, w0, w8
 	mul	w1, w10, w0
 	add	x2, x5, x3
@@ -3874,7 +3868,7 @@ FtlGcBufInit:
 	asr	w1, w1, 2
 	add	x1, x6, x1, sxtw 2
 	str	x1, [x2, 8]
-	b	.L567
+	b	.L568
 	.size	FtlGcBufInit, .-FtlGcBufInit
 	.section	.text.FtlGcBufFree,"ax",@progbits
 	.align	2
@@ -3888,30 +3882,30 @@ FtlGcBufFree:
 	ldr	w8, [x2, #:lo12:.LANCHOR107]
 	adrp	x2, .LANCHOR103
 	ldr	x4, [x2, #:lo12:.LANCHOR103]
-.L570:
+.L571:
 	cmp	w3, w1
-	bcs	.L569
+	bcs	.L570
 	umaddl	x6, w3, w7, x0
 	mov	w2, 0
-	b	.L575
-.L571:
+	b	.L576
+.L572:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-.L575:
+.L576:
 	cmp	w2, w8
-	bcs	.L572
+	bcs	.L573
 	umull	x5, w2, w10
 	add	x11, x4, x5
 	ldr	x12, [x4, x5]
 	ldr	x5, [x6, 8]
 	cmp	x12, x5
-	bne	.L571
+	bne	.L572
 	str	wzr, [x11, 16]
-.L572:
+.L573:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L570
-.L569:
+	b	.L571
+.L570:
 	ret
 	.size	FtlGcBufFree, .-FtlGcBufFree
 	.section	.text.FtlGcBufAlloc,"ax",@progbits
@@ -3927,30 +3921,30 @@ FtlGcBufAlloc:
 	adrp	x2, .LANCHOR103
 	mov	w10, 56
 	ldr	x6, [x2, #:lo12:.LANCHOR103]
-.L577:
+.L578:
 	cmp	w3, w1
-	bcs	.L576
+	bcs	.L577
 	mov	w2, 0
-	b	.L582
-.L578:
+	b	.L583
+.L579:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-.L582:
+.L583:
 	cmp	w2, w5
-	bcs	.L579
+	bcs	.L580
 	umaddl	x4, w2, w7, x6
 	ldr	w11, [x4, 16]
-	cbnz	w11, .L578
+	cbnz	w11, .L579
 	umaddl	x2, w3, w10, x0
 	ldr	x11, [x4]
 	str	w8, [x4, 16]
 	ldr	x4, [x4, 8]
 	stp	x11, x4, [x2, 8]
-.L579:
+.L580:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L577
-.L576:
+	b	.L578
+.L577:
 	ret
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
 	.section	.text.IsBlkInGcList,"ax",@progbits
@@ -3964,17 +3958,17 @@ IsBlkInGcList:
 	adrp	x1, .LANCHOR109
 	ldr	x3, [x1, #:lo12:.LANCHOR109]
 	mov	x1, 0
-.L584:
+.L585:
 	cmp	w2, w1, uxth
-	bhi	.L586
+	bhi	.L587
 	mov	w0, 0
 	ret
-.L586:
+.L587:
 	add	x1, x1, 1
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w0
-	bne	.L584
+	bne	.L585
 	mov	w0, 1
 	ret
 	.size	IsBlkInGcList, .-IsBlkInGcList
@@ -3996,24 +3990,24 @@ FtlGcUpdatePage:
 	mov	x3, 0
 	ldrh	w1, [x4, #:lo12:.LANCHOR108]
 	ldr	x5, [x2, #:lo12:.LANCHOR109]
-.L589:
+.L590:
 	and	w2, w3, 65535
 	cmp	w2, w1
-	bcc	.L591
-	bne	.L590
+	bcc	.L592
+	bne	.L591
 	and	x3, x3, 65535
 	strh	w0, [x5, x3, lsl 1]
 	ldrh	w0, [x4, #:lo12:.LANCHOR108]
 	add	w0, w0, 1
 	strh	w0, [x4, #:lo12:.LANCHOR108]
-	b	.L590
-.L591:
+	b	.L591
+.L592:
 	add	x3, x3, 1
 	add	x2, x5, x3, lsl 1
 	ldrh	w2, [x2, -2]
 	cmp	w2, w7
-	bne	.L589
-.L590:
+	bne	.L590
+.L591:
 	adrp	x4, .LANCHOR110
 	adrp	x1, .LANCHOR111
 	mov	w3, 12
@@ -4037,23 +4031,23 @@ FtlGcRefreshBlock:
 	and	w0, w0, 65535
 	ldrh	w5, [x4, #:lo12:.LANCHOR112]
 	cmp	w5, w0
-	beq	.L594
+	beq	.L595
 	adrp	x1, .LANCHOR113
 	ldrh	w3, [x1, #:lo12:.LANCHOR113]
 	cmp	w0, w3
-	beq	.L594
+	beq	.L595
 	mov	w2, 65535
 	cmp	w5, w2
-	bne	.L595
+	bne	.L596
 	strh	w0, [x4, #:lo12:.LANCHOR112]
-.L594:
+.L595:
 	mov	w0, 0
 	ret
-.L595:
+.L596:
 	cmp	w3, w2
-	bne	.L594
+	bne	.L595
 	strh	w0, [x1, #:lo12:.LANCHOR113]
-	b	.L594
+	b	.L595
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
 	.section	.text.FtlGcRefreshOpenBlock,"ax",@progbits
 	.align	2
@@ -4074,41 +4068,41 @@ FtlGcMarkBadPhyBlk:
 	bl	P2V_block_in_plane
 	and	w6, w0, 65535
 	bl	FtlGcRefreshBlock
-	adrp	x0, .LANCHOR101
-	ldr	w0, [x0, #:lo12:.LANCHOR101]
-	cbz	w0, .L598
-	adrp	x1, .LANCHOR77
+	adrp	x0, .LANCHOR28
+	ldr	w0, [x0, #:lo12:.LANCHOR28]
+	cbz	w0, .L599
+	adrp	x1, .LANCHOR78
 	ubfiz	x0, x6, 1, 16
-	ldr	x2, [x1, #:lo12:.LANCHOR77]
+	ldr	x2, [x1, #:lo12:.LANCHOR78]
 	ldrh	w1, [x2, x0]
 	cmp	w1, 29
-	bls	.L598
+	bls	.L599
 	sub	w1, w1, #30
 	strh	w1, [x2, x0]
-.L598:
+.L599:
 	adrp	x1, .LANCHOR114
 	adrp	x3, .LANCHOR115
 	add	x3, x3, :lo12:.LANCHOR115
 	mov	x2, 0
 	ldrh	w0, [x1, #:lo12:.LANCHOR114]
-.L599:
+.L600:
 	cmp	w0, w2, uxth
-	bhi	.L601
+	bhi	.L602
 	cmp	w0, 15
-	bhi	.L600
+	bhi	.L601
 	add	w2, w0, 1
 	strh	w2, [x1, #:lo12:.LANCHOR114]
 	adrp	x1, .LANCHOR115
 	add	x1, x1, :lo12:.LANCHOR115
 	strh	w7, [x1, w0, sxtw 1]
-	b	.L600
-.L601:
+	b	.L601
+.L602:
 	add	x2, x2, 1
 	add	x4, x3, x2, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w7
-	bne	.L599
-.L600:
+	bne	.L600
+.L601:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
@@ -4120,20 +4114,20 @@ FtlGcMarkBadPhyBlk:
 FtlGcReFreshBadBlk:
 	adrp	x0, .LANCHOR114
 	ldrh	w0, [x0, #:lo12:.LANCHOR114]
-	cbz	w0, .L613
+	cbz	w0, .L614
 	adrp	x1, .LANCHOR112
 	ldrh	w2, [x1, #:lo12:.LANCHOR112]
 	mov	w1, 65535
 	cmp	w2, w1
-	bne	.L613
+	bne	.L614
 	stp	x29, x30, [sp, -16]!
 	adrp	x6, .LANCHOR116
 	add	x29, sp, 0
 	ldrh	w1, [x6, #:lo12:.LANCHOR116]
 	cmp	w1, w0
-	bcc	.L608
+	bcc	.L609
 	strh	wzr, [x6, #:lo12:.LANCHOR116]
-.L608:
+.L609:
 	ldrh	w1, [x6, #:lo12:.LANCHOR116]
 	adrp	x0, .LANCHOR115
 	add	x0, x0, :lo12:.LANCHOR115
@@ -4146,7 +4140,7 @@ FtlGcReFreshBadBlk:
 	strh	w0, [x6, #:lo12:.LANCHOR116]
 	mov	w0, 0
 	ret
-.L613:
+.L614:
 	mov	w0, 0
 	ret
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
@@ -4167,16 +4161,16 @@ BuildFlashLsbPageTable:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w20, w1
-	cbnz	w0, .L618
+	cbnz	w0, .L619
 	adrp	x1, .LANCHOR16
 	add	x1, x1, :lo12:.LANCHOR16
 	mov	x0, 0
-.L619:
+.L620:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 256
-	bne	.L619
-.L625:
+	bne	.L620
+.L626:
 	adrp	x19, .LANCHOR117
 	add	x19, x19, :lo12:.LANCHOR117
 	mov	w1, 255
@@ -4187,41 +4181,41 @@ BuildFlashLsbPageTable:
 	and	w20, w20, 65535
 	add	x1, x1, :lo12:.LANCHOR16
 	mov	x0, 0
-.L620:
+.L621:
 	cmp	w20, w0, uxth
-	bhi	.L642
+	bhi	.L643
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L618:
+.L619:
 	cmp	w0, 1
-	bne	.L621
+	bne	.L622
 	adrp	x2, .LANCHOR16
 	add	x2, x2, :lo12:.LANCHOR16
 	mov	x1, 0
-.L624:
+.L625:
 	and	w0, w1, 65535
 	cmp	x1, 3
-	bls	.L622
+	bls	.L623
 	ubfiz	w3, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 2
 	sub	w0, w3, w0
 	and	w0, w0, 65535
-.L622:
+.L623:
 	strh	w0, [x2, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L624
-	b	.L625
-.L621:
+	bne	.L625
+	b	.L626
+.L622:
 	cmp	w0, 2
-	bne	.L626
+	bne	.L627
 	adrp	x2, .LANCHOR16
 	add	x2, x2, :lo12:.LANCHOR16
 	mov	w1, 65535
 	mov	x0, 0
-.L628:
+.L629:
 	cmp	x0, 2
 	and	w3, w0, 65535
 	csel	w3, w3, w1, cc
@@ -4230,32 +4224,32 @@ BuildFlashLsbPageTable:
 	add	x0, x0, 1
 	and	w1, w1, 65535
 	cmp	x0, 256
-	bne	.L628
-	b	.L625
-.L626:
-	cmp	w0, 3
 	bne	.L629
+	b	.L626
+.L627:
+	cmp	w0, 3
+	bne	.L630
 	adrp	x2, .LANCHOR16
 	add	x2, x2, :lo12:.LANCHOR16
 	mov	x1, 0
-.L632:
+.L633:
 	and	w0, w1, 65535
 	cmp	x1, 5
-	bls	.L630
+	bls	.L631
 	ubfiz	w3, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 4
 	sub	w0, w3, w0
 	and	w0, w0, 65535
-.L630:
+.L631:
 	strh	w0, [x2, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L632
-	b	.L625
-.L629:
-	cmp	w0, 4
 	bne	.L633
+	b	.L626
+.L630:
+	cmp	w0, 4
+	bne	.L634
 	adrp	x2, .LANCHOR16
 	add	x1, x2, :lo12:.LANCHOR16
 	add	x1, x1, 16
@@ -4274,7 +4268,7 @@ BuildFlashLsbPageTable:
 	strh	w2, [x1, -10]
 	strh	w0, [x1, -2]
 	mov	w0, 8
-.L635:
+.L636:
 	and	w3, w0, 1
 	ubfiz	w2, w0, 1, 15
 	add	w3, w3, 6
@@ -4283,57 +4277,57 @@ BuildFlashLsbPageTable:
 	strh	w2, [x1], 2
 	and	w0, w0, 65535
 	cmp	w0, 256
-	bne	.L635
-	b	.L625
-.L633:
-	cmp	w0, 5
 	bne	.L636
+	b	.L626
+.L634:
+	cmp	w0, 5
+	bne	.L637
 	adrp	x1, .LANCHOR16
 	add	x1, x1, :lo12:.LANCHOR16
 	mov	x0, 0
-.L637:
+.L638:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 16
-	bne	.L637
+	bne	.L638
 	add	x1, x1, 32
-.L638:
+.L639:
 	strh	w0, [x1], 2
 	add	w0, w0, 2
 	and	w0, w0, 65535
 	cmp	w0, 496
-	bne	.L638
-	b	.L625
-.L636:
+	bne	.L639
+	b	.L626
+.L637:
 	cmp	w0, 6
-	bne	.L625
+	bne	.L626
 	adrp	x3, .LANCHOR16
 	add	x3, x3, :lo12:.LANCHOR16
 	mov	w1, 0
 	mov	x2, 0
 	mov	w4, 12
 	mov	w5, 10
-.L641:
+.L642:
 	and	w0, w2, 65535
 	cmp	x2, 5
-	bls	.L639
+	bls	.L640
 	tst	x0, 1
 	csel	w0, w4, w5, ne
 	sub	w0, w1, w0
 	and	w0, w0, 65535
-.L639:
+.L640:
 	strh	w0, [x3, x2, lsl 1]
 	add	w1, w1, 3
 	and	w1, w1, 65535
 	add	x2, x2, 1
 	cmp	w1, 768
-	bne	.L641
-	b	.L625
-.L642:
+	bne	.L642
+	b	.L626
+.L643:
 	ldrh	w2, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	strh	w2, [x19, w2, sxtw 1]
-	b	.L620
+	b	.L621
 	.size	BuildFlashLsbPageTable, .-BuildFlashLsbPageTable
 	.section	.text.FlashDieInfoInit,"ax",@progbits
 	.align	2
@@ -4341,22 +4335,22 @@ BuildFlashLsbPageTable:
 	.type	FlashDieInfoInit, %function
 FlashDieInfoInit:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR29+10
+	adrp	x0, .LANCHOR30+10
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR25
 	adrp	x20, .LANCHOR118
 	stp	x23, x24, [sp, 48]
-	ldrh	w0, [x0, #:lo12:.LANCHOR29+10]
+	ldrh	w0, [x0, #:lo12:.LANCHOR30+10]
 	adrp	x23, .LANCHOR3
 	stp	x21, x22, [sp, 32]
 	strb	wzr, [x19, #:lo12:.LANCHOR25]
 	cmp	w0, 256
 	strb	wzr, [x20, #:lo12:.LANCHOR118]
 	str	x25, [sp, 64]
-	bls	.L658
+	bls	.L659
 	mov	w0, 512
-.L675:
+.L676:
 	adrp	x25, .LANCHOR26
 	add	x22, x25, :lo12:.LANCHOR26
 	str	w0, [x23, #:lo12:.LANCHOR3]
@@ -4383,27 +4377,27 @@ FlashDieInfoInit:
 	mov	x8, 0
 	add	x10, x7, 1
 	ldrb	w11, [x7]
-.L662:
+.L663:
 	mov	w2, w11
 	add	x1, x15, x8, lsl 3
 	mov	x0, x10
 	bl	FlashMemCmp8
-	cbnz	w0, .L661
+	cbnz	w0, .L662
 	ldrb	w1, [x14]
 	add	w0, w1, 1
 	strb	w0, [x14]
 	str	wzr, [x21, x1, lsl 2]
 	strb	w8, [x22, x1]
-.L661:
+.L662:
 	add	x8, x8, 1
 	cmp	x8, 4
-	bne	.L662
+	bne	.L663
 	ldrb	w0, [x19, #:lo12:.LANCHOR25]
 	strb	w0, [x20, #:lo12:.LANCHOR118]
 	ldrb	w0, [x7, 8]
 	cmp	w0, 2
-	beq	.L663
-.L667:
+	beq	.L664
+.L668:
 	ldrb	w0, [x19, #:lo12:.LANCHOR25]
 	ldrh	w1, [x7, 14]
 	ldp	x19, x20, [sp, 16]
@@ -4417,24 +4411,24 @@ FlashDieInfoInit:
 	ldp	x29, x30, [sp], 80
 	strh	w0, [x1, #:lo12:.LANCHOR119]
 	ret
-.L658:
+.L659:
 	cmp	w0, 128
-	bls	.L675
+	bls	.L676
 	mov	w0, 256
-	b	.L675
-.L663:
+	b	.L676
+.L664:
 	ldr	w20, [x23, #:lo12:.LANCHOR3]
 	add	x12, x12, :lo12:.LANCHOR22
 	add	x14, x19, :lo12:.LANCHOR25
 	add	x24, x24, :lo12:.LANCHOR17
 	add	x13, x25, :lo12:.LANCHOR26
 	mov	x15, 0
-.L666:
+.L667:
 	mov	w2, w11
 	add	x1, x12, x15, lsl 3
 	mov	x0, x10
 	bl	FlashMemCmp8
-	cbnz	w0, .L664
+	cbnz	w0, .L665
 	ldrb	w2, [x7, 13]
 	ldrh	w0, [x7, 14]
 	ldrb	w1, [x14]
@@ -4444,18 +4438,18 @@ FlashDieInfoInit:
 	sxtw	x2, w1
 	str	w0, [x24, x2, lsl 2]
 	ldrb	w3, [x7, 23]
-	cbz	w3, .L665
+	cbz	w3, .L666
 	lsl	w0, w0, 1
 	str	w0, [x24, x2, lsl 2]
-.L665:
+.L666:
 	add	w1, w1, 1
 	strb	w15, [x13, x2]
 	strb	w1, [x14]
-.L664:
+.L665:
 	add	x15, x15, 1
 	cmp	x15, 4
-	bne	.L666
-	b	.L667
+	bne	.L667
+	b	.L668
 	.size	FlashDieInfoInit, .-FlashDieInfoInit
 	.section	.text.ReadFlashInfo,"ax",@progbits
 	.align	2
@@ -4470,7 +4464,7 @@ ReadFlashInfo:
 	mov	x19, x0
 	bl	ftl_memset
 	adrp	x0, .LANCHOR18
-	adrp	x3, .LANCHOR67
+	adrp	x3, .LANCHOR68
 	mov	w4, 1
 	ldr	x1, [x0, #:lo12:.LANCHOR18]
 	adrp	x0, .LANCHOR3
@@ -4480,11 +4474,11 @@ ReadFlashInfo:
 	strb	w0, [x19, 4]
 	ubfx	x0, x0, 8, 8
 	strb	w0, [x19, 5]
-	adrp	x0, .LANCHOR31
-	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	adrp	x0, .LANCHOR32
+	ldrb	w0, [x0, #:lo12:.LANCHOR32]
 	strb	w0, [x19, 7]
-	add	x0, x3, :lo12:.LANCHOR67
-	ldrb	w3, [x3, #:lo12:.LANCHOR67]
+	add	x0, x3, :lo12:.LANCHOR68
+	ldrb	w3, [x3, #:lo12:.LANCHOR68]
 	strb	w3, [x19]
 	ldrb	w3, [x0, 1]
 	strb	w3, [x19, 1]
@@ -4503,20 +4497,20 @@ ReadFlashInfo:
 	adrp	x0, .LANCHOR25
 	strb	wzr, [x19, 10]
 	ldrb	w3, [x0, #:lo12:.LANCHOR25]
-.L677:
+.L678:
 	cmp	w3, w1, uxtb
-	bhi	.L678
+	bhi	.L679
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L678:
+.L679:
 	ldrb	w0, [x1, x2]
 	add	x1, x1, 1
 	ldrb	w5, [x19, 10]
 	lsl	w0, w4, w0
 	orr	w0, w0, w5
 	strb	w0, [x19, 10]
-	b	.L677
+	b	.L678
 	.size	ReadFlashInfo, .-ReadFlashInfo
 	.section	.text.FtlBbt2Bitmap,"ax",@progbits
 	.align	2
@@ -4529,10 +4523,10 @@ FtlBbt2Bitmap:
 	mov	x21, x0
 	adrp	x0, .LANCHOR120
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR49
+	adrp	x22, .LANCHOR50
 	adrp	x23, .LANCHOR121
 	ldrh	w2, [x0, #:lo12:.LANCHOR120]
-	add	x22, x22, :lo12:.LANCHOR49
+	add	x22, x22, :lo12:.LANCHOR50
 	add	x23, x23, :lo12:.LANCHOR121
 	stp	x19, x20, [sp, 16]
 	mov	w24, 65535
@@ -4542,24 +4536,24 @@ FtlBbt2Bitmap:
 	mov	w1, 0
 	mov	x0, x20
 	bl	ftl_memset
-.L683:
+.L684:
 	ldrh	w0, [x21, x19]
 	cmp	w0, w24
-	beq	.L680
+	beq	.L681
 	ldrh	w1, [x22]
 	cmp	w1, w0
-	bhi	.L682
+	bhi	.L683
 	mov	w2, 79
 	mov	x1, x23
-	adrp	x0, .LC4
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L682:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L683:
 	ldrh	w1, [x21, x19]
 	mov	w2, 1
 	add	x19, x19, 2
@@ -4571,8 +4565,8 @@ FtlBbt2Bitmap:
 	ldr	w1, [x20, x0]
 	orr	w1, w1, w2
 	str	w1, [x20, x0]
-	bne	.L683
-.L680:
+	bne	.L684
+.L681:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -4584,11 +4578,11 @@ FtlBbt2Bitmap:
 	.global	FtlBbtMemInit
 	.type	FtlBbtMemInit, %function
 FtlBbtMemInit:
-	adrp	x1, .LANCHOR73
-	add	x0, x1, :lo12:.LANCHOR73
+	adrp	x1, .LANCHOR74
+	add	x0, x1, :lo12:.LANCHOR74
 	mov	w2, -1
 	add	x0, x0, 12
-	strh	w2, [x1, #:lo12:.LANCHOR73]
+	strh	w2, [x1, #:lo12:.LANCHOR74]
 	mov	w2, 16
 	strh	wzr, [x0, -6]
 	mov	w1, 255
@@ -4600,11 +4594,11 @@ FtlBbtMemInit:
 	.type	FtlFreeSysBlkQueueInit, %function
 FtlFreeSysBlkQueueInit:
 	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR74
-	add	x3, x1, :lo12:.LANCHOR74
+	adrp	x1, .LANCHOR75
+	add	x3, x1, :lo12:.LANCHOR75
 	mov	w2, 2048
 	add	x29, sp, 0
-	strh	w0, [x1, #:lo12:.LANCHOR74]
+	strh	w0, [x1, #:lo12:.LANCHOR75]
 	mov	w1, 0
 	strh	wzr, [x3, 2]
 	add	x0, x3, 8
@@ -4635,19 +4629,19 @@ ftl_free_no_use_map_blk:
 	mov	x0, x21
 	bl	ftl_memset
 	mov	w0, 0
-.L691:
+.L692:
 	ldrh	w1, [x19, 6]
 	cmp	w1, w0
-	bhi	.L695
+	bhi	.L696
 	ldrh	w26, [x21]
-	adrp	x24, .LANCHOR52
-	add	x24, x24, :lo12:.LANCHOR52
+	adrp	x24, .LANCHOR53
+	add	x24, x24, :lo12:.LANCHOR53
 	mov	w25, 0
 	mov	w20, 0
-.L696:
+.L697:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L700
+	bhi	.L701
 	mov	w0, w25
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -4655,61 +4649,61 @@ ftl_free_no_use_map_blk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L695:
+.L696:
 	ubfiz	x1, x0, 2, 16
 	ldr	w2, [x20, x1]
 	mov	w1, 0
 	ubfx	x2, x2, 10, 16
-.L692:
+.L693:
 	ldrh	w3, [x19, 10]
 	cmp	w3, w1
-	bhi	.L694
+	bhi	.L695
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L691
-.L694:
+	b	.L692
+.L695:
 	ubfiz	x3, x1, 1, 16
 	ldrh	w4, [x23, x3]
 	cmp	w4, w2
-	bne	.L693
+	bne	.L694
 	ldrh	w4, [x21, x3]
 	add	w4, w4, 1
 	strh	w4, [x21, x3]
-.L693:
+.L694:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L692
-.L700:
+	b	.L693
+.L701:
 	ldrh	w0, [x19]
 	uxtw	x22, w20
 	cmp	w0, w20
-	bne	.L697
+	bne	.L698
 	ldrh	w0, [x24]
 	ldrh	w1, [x19, 2]
 	cmp	w1, w0
-	bcs	.L697
+	bcs	.L698
 	strh	w0, [x21, x22, lsl 1]
-.L697:
+.L698:
 	lsl	x22, x22, 1
 	ldrh	w0, [x21, x22]
 	cmp	w26, w0
-	bls	.L698
+	bls	.L699
 	mov	w25, w20
 	mov	w26, w0
-.L698:
-	cbnz	w0, .L699
+.L699:
+	cbnz	w0, .L700
 	ldrh	w0, [x23, x22]
-	cbz	w0, .L699
+	cbz	w0, .L700
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
 	strh	wzr, [x23, x22]
 	ldrh	w0, [x19, 8]
 	sub	w0, w0, #1
 	strh	w0, [x19, 8]
-.L699:
+.L700:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L696
+	b	.L697
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.section	.text.FtlL2PDataInit,"ax",@progbits
 	.align	2
@@ -4721,39 +4715,39 @@ FtlL2PDataInit:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR122
-	adrp	x20, .LANCHOR63
+	adrp	x20, .LANCHOR64
 	stp	x21, x22, [sp, 32]
 	ldr	x0, [x19, #:lo12:.LANCHOR122]
-	adrp	x22, .LANCHOR56
-	ldr	w2, [x20, #:lo12:.LANCHOR63]
-	adrp	x21, .LANCHOR66
+	adrp	x22, .LANCHOR57
+	ldr	w2, [x20, #:lo12:.LANCHOR64]
+	adrp	x21, .LANCHOR67
 	str	x23, [sp, 48]
 	adrp	x23, .LANCHOR123
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	ldrh	w0, [x21, #:lo12:.LANCHOR66]
+	ldrh	w0, [x21, #:lo12:.LANCHOR67]
 	mov	w1, 255
-	ldrh	w2, [x22, #:lo12:.LANCHOR56]
+	ldrh	w2, [x22, #:lo12:.LANCHOR57]
 	mul	w2, w2, w0
 	ldr	x0, [x23, #:lo12:.LANCHOR123]
 	bl	ftl_memset
-	adrp	x0, .LANCHOR95
-	ldrh	w3, [x21, #:lo12:.LANCHOR66]
+	adrp	x0, .LANCHOR96
+	ldrh	w3, [x21, #:lo12:.LANCHOR67]
 	ldr	x6, [x23, #:lo12:.LANCHOR123]
 	mov	x1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR95]
+	ldr	x0, [x0, #:lo12:.LANCHOR96]
 	mov	w2, -1
-	ldrh	w5, [x22, #:lo12:.LANCHOR56]
+	ldrh	w5, [x22, #:lo12:.LANCHOR57]
 	add	x3, x0, x3, lsl 4
-.L706:
+.L707:
 	add	x4, x1, x5
 	cmp	x0, x3
-	bne	.L707
+	bne	.L708
 	adrp	x1, .LANCHOR124
 	add	x0, x1, :lo12:.LANCHOR124
 	ldp	x21, x22, [sp, 32]
 	strh	w2, [x1, #:lo12:.LANCHOR124]
-	ldr	w1, [x20, #:lo12:.LANCHOR63]
+	ldr	w1, [x20, #:lo12:.LANCHOR64]
 	strh	w1, [x0, 10]
 	mov	w1, -3902
 	strh	w1, [x0, 4]
@@ -4762,9 +4756,9 @@ FtlL2PDataInit:
 	strh	w2, [x0, 2]
 	ldrh	w1, [x1, #:lo12:.LANCHOR125]
 	strh	w1, [x0, 8]
-	adrp	x1, .LANCHOR65
+	adrp	x1, .LANCHOR66
 	strh	w2, [x0, 60]
-	ldrh	w1, [x1, #:lo12:.LANCHOR65]
+	ldrh	w1, [x1, #:lo12:.LANCHOR66]
 	strh	w1, [x0, 6]
 	adrp	x1, .LANCHOR126
 	ldr	x1, [x1, #:lo12:.LANCHOR126]
@@ -4780,7 +4774,7 @@ FtlL2PDataInit:
 	str	x1, [x0, 40]
 	ldp	x29, x30, [sp], 64
 	ret
-.L707:
+.L708:
 	and	x1, x1, -4
 	strh	w2, [x0]
 	add	x1, x6, x1
@@ -4788,7 +4782,7 @@ FtlL2PDataInit:
 	str	x1, [x0, 8]
 	add	x0, x0, 16
 	mov	x1, x4
-	b	.L706
+	b	.L707
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
 	.section	.text.FtlVariablesInit,"ax",@progbits
 	.align	2
@@ -4802,7 +4796,7 @@ FtlVariablesInit:
 	str	xzr, [x0, #:lo12:.LANCHOR129]
 	adrp	x0, .LANCHOR130
 	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR39
+	adrp	x19, .LANCHOR40
 	strh	w1, [x0, #:lo12:.LANCHOR130]
 	adrp	x0, .LANCHOR131
 	mov	w1, -1
@@ -4811,38 +4805,38 @@ FtlVariablesInit:
 	str	wzr, [x0, #:lo12:.LANCHOR132]
 	adrp	x0, .LANCHOR133
 	str	w1, [x0, #:lo12:.LANCHOR133]
-	adrp	x0, .LANCHOR101
+	adrp	x0, .LANCHOR28
 	mov	w1, 0
-	str	wzr, [x0, #:lo12:.LANCHOR101]
-	adrp	x0, .LANCHOR69
-	strh	wzr, [x0, #:lo12:.LANCHOR69]
-	adrp	x0, .LANCHOR60
-	ldrh	w2, [x0, #:lo12:.LANCHOR60]
+	str	wzr, [x0, #:lo12:.LANCHOR28]
 	adrp	x0, .LANCHOR70
-	ldr	x0, [x0, #:lo12:.LANCHOR70]
+	strh	wzr, [x0, #:lo12:.LANCHOR70]
+	adrp	x0, .LANCHOR61
+	ldrh	w2, [x0, #:lo12:.LANCHOR61]
+	adrp	x0, .LANCHOR71
+	ldr	x0, [x0, #:lo12:.LANCHOR71]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	adrp	x0, .LANCHOR77
-	ldrh	w2, [x19, #:lo12:.LANCHOR39]
+	adrp	x0, .LANCHOR78
+	ldrh	w2, [x19, #:lo12:.LANCHOR40]
 	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR77]
+	ldr	x0, [x0, #:lo12:.LANCHOR78]
 	lsl	w2, w2, 1
 	bl	ftl_memset
 	adrp	x0, .LANCHOR134
-	ldrh	w2, [x19, #:lo12:.LANCHOR39]
+	ldrh	w2, [x19, #:lo12:.LANCHOR40]
 	mov	w1, 0
 	ldr	x0, [x0, #:lo12:.LANCHOR134]
 	lsl	w2, w2, 1
 	bl	ftl_memset
 	mov	w2, 48
 	mov	w1, 0
-	adrp	x0, .LANCHOR135
-	add	x0, x0, :lo12:.LANCHOR135
+	adrp	x0, .LANCHOR80
+	add	x0, x0, :lo12:.LANCHOR80
 	bl	ftl_memset
 	mov	w2, 512
 	mov	w1, 0
-	adrp	x0, .LANCHOR136
-	add	x0, x0, :lo12:.LANCHOR136
+	adrp	x0, .LANCHOR135
+	add	x0, x0, :lo12:.LANCHOR135
 	bl	ftl_memset
 	bl	FtlGcBufInit
 	bl	FtlL2PDataInit
@@ -4857,127 +4851,127 @@ FtlVariablesInit:
 	.type	SupperBlkListInit, %function
 SupperBlkListInit:
 	stp	x29, x30, [sp, -96]!
-	adrp	x0, .LANCHOR39
+	adrp	x0, .LANCHOR40
 	mov	w1, 0
 	add	x29, sp, 0
-	ldrh	w2, [x0, #:lo12:.LANCHOR39]
+	ldrh	w2, [x0, #:lo12:.LANCHOR40]
 	mov	w0, 6
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR80
+	adrp	x24, .LANCHOR81
 	stp	x19, x20, [sp, 16]
-	adrp	x23, .LANCHOR84
+	adrp	x23, .LANCHOR85
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR87
+	adrp	x22, .LANCHOR88
 	mul	w2, w2, w0
-	ldr	x0, [x24, #:lo12:.LANCHOR80]
+	ldr	x0, [x24, #:lo12:.LANCHOR81]
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR38
+	adrp	x25, .LANCHOR39
 	str	x27, [sp, 80]
-	adrp	x26, .LANCHOR45
-	add	x25, x25, :lo12:.LANCHOR38
-	add	x26, x26, :lo12:.LANCHOR45
+	adrp	x26, .LANCHOR46
+	add	x25, x25, :lo12:.LANCHOR39
+	add	x26, x26, :lo12:.LANCHOR46
 	bl	ftl_memset
 	mov	w21, 0
-	adrp	x0, .LANCHOR86
+	adrp	x0, .LANCHOR87
 	mov	w20, 0
 	mov	w19, 0
-	strh	wzr, [x23, #:lo12:.LANCHOR84]
-	str	xzr, [x0, #:lo12:.LANCHOR86]
-	adrp	x0, .LANCHOR81
-	strh	wzr, [x22, #:lo12:.LANCHOR87]
-	adrp	x27, .LANCHOR36
-	str	xzr, [x0, #:lo12:.LANCHOR81]
-	adrp	x0, .LANCHOR83
-	str	xzr, [x0, #:lo12:.LANCHOR83]
-	adrp	x0, .LANCHOR137
-	strh	wzr, [x0, #:lo12:.LANCHOR137]
-.L712:
+	strh	wzr, [x23, #:lo12:.LANCHOR85]
+	str	xzr, [x0, #:lo12:.LANCHOR87]
+	adrp	x0, .LANCHOR82
+	strh	wzr, [x22, #:lo12:.LANCHOR88]
+	adrp	x27, .LANCHOR37
+	str	xzr, [x0, #:lo12:.LANCHOR82]
+	adrp	x0, .LANCHOR84
+	str	xzr, [x0, #:lo12:.LANCHOR84]
+	adrp	x0, .LANCHOR136
+	strh	wzr, [x0, #:lo12:.LANCHOR136]
+.L713:
 	ldrh	w0, [x25]
 	cmp	w19, w0
-	bge	.L719
-	adrp	x0, .LANCHOR51
-	ldrh	w8, [x27, #:lo12:.LANCHOR36]
+	bge	.L720
+	adrp	x0, .LANCHOR52
+	ldrh	w8, [x27, #:lo12:.LANCHOR37]
 	mov	w5, 0
 	mov	w6, 0
-	ldrh	w7, [x0, #:lo12:.LANCHOR51]
-	b	.L720
-.L714:
+	ldrh	w7, [x0, #:lo12:.LANCHOR52]
+	b	.L721
+.L715:
 	ldrb	w0, [x26, w6, sxtw]
 	mov	w1, w19
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L713
+	cbnz	w0, .L714
 	add	w5, w7, w5
 	sxth	w5, w5
-.L713:
+.L714:
 	add	w6, w6, 1
 	sxth	w6, w6
-.L720:
+.L721:
 	cmp	w6, w8
-	blt	.L714
-	cbz	w5, .L715
+	blt	.L715
+	cbz	w5, .L716
 	mov	w0, 32768
 	sdiv	w5, w0, w5
 	sxth	w5, w5
-.L716:
-	ldr	x1, [x24, #:lo12:.LANCHOR80]
+.L717:
+	ldr	x1, [x24, #:lo12:.LANCHOR81]
 	mov	w0, 6
 	smaddl	x0, w19, w0, x1
 	strh	w5, [x0, 4]
-	adrp	x0, .LANCHOR90
-	ldrh	w0, [x0, #:lo12:.LANCHOR90]
-	cmp	w19, w0
-	beq	.L717
 	adrp	x0, .LANCHOR91
 	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	cmp	w19, w0
-	beq	.L717
+	beq	.L718
 	adrp	x0, .LANCHOR92
 	ldrh	w0, [x0, #:lo12:.LANCHOR92]
 	cmp	w19, w0
-	beq	.L717
-	adrp	x0, .LANCHOR82
-	ldr	x0, [x0, #:lo12:.LANCHOR82]
+	beq	.L718
+	adrp	x0, .LANCHOR93
+	ldrh	w0, [x0, #:lo12:.LANCHOR93]
+	cmp	w19, w0
+	beq	.L718
+	adrp	x0, .LANCHOR83
+	ldr	x0, [x0, #:lo12:.LANCHOR83]
 	ldrh	w0, [x0, w19, sxtw 1]
-	cbnz	w0, .L718
+	cbnz	w0, .L719
 	add	w21, w21, 1
 	mov	w0, w19
 	and	w21, w21, 65535
 	bl	INSERT_FREE_LIST
-.L717:
+.L718:
 	add	w19, w19, 1
 	sxth	w19, w19
-	b	.L712
-.L715:
-	adrp	x0, .LANCHOR82
+	b	.L713
+.L716:
+	adrp	x0, .LANCHOR83
 	mov	w1, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR82]
+	ldr	x0, [x0, #:lo12:.LANCHOR83]
 	strh	w1, [x0, w19, sxtw 1]
-	b	.L716
-.L718:
+	b	.L717
+.L719:
 	add	w20, w20, 1
 	mov	w0, w19
 	and	w20, w20, 65535
 	bl	INSERT_DATA_LIST
-	b	.L717
-.L719:
-	strh	w20, [x23, #:lo12:.LANCHOR84]
+	b	.L718
+.L720:
+	strh	w20, [x23, #:lo12:.LANCHOR85]
 	add	w20, w20, w21
-	strh	w21, [x22, #:lo12:.LANCHOR87]
+	strh	w21, [x22, #:lo12:.LANCHOR88]
 	cmp	w0, w20
-	bge	.L721
-	mov	w2, 2368
-	adrp	x1, .LANCHOR138
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR138
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
+	bge	.L722
+	mov	w2, 2405
+	adrp	x1, .LANCHOR137
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR137
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L721:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L722:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -4999,14 +4993,14 @@ FtlGcPageVarInit:
 	strh	wzr, [x0, #:lo12:.LANCHOR108]
 	adrp	x0, .LANCHOR110
 	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR53
+	adrp	x19, .LANCHOR54
 	strh	wzr, [x0, #:lo12:.LANCHOR110]
 	adrp	x0, .LANCHOR109
-	ldrh	w2, [x19, #:lo12:.LANCHOR53]
+	ldrh	w2, [x19, #:lo12:.LANCHOR54]
 	ldr	x0, [x0, #:lo12:.LANCHOR109]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	ldrh	w2, [x19, #:lo12:.LANCHOR53]
+	ldrh	w2, [x19, #:lo12:.LANCHOR54]
 	mov	w0, 12
 	mov	w1, 255
 	mul	w2, w2, w0
@@ -5032,8 +5026,8 @@ ftl_memcpy:
 FlashReadIdbData:
 	stp	x29, x30, [sp, -16]!
 	mov	w2, 2048
-	adrp	x1, .LANCHOR139
-	add	x1, x1, :lo12:.LANCHOR139
+	adrp	x1, .LANCHOR138
+	add	x1, x1, :lo12:.LANCHOR138
 	add	x29, sp, 0
 	bl	ftl_memcpy
 	mov	w0, 0
@@ -5046,8 +5040,8 @@ FlashReadIdbData:
 	.type	FlashLoadPhyInfoInRam, %function
 FlashLoadPhyInfoInRam:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR140
-	add	x8, x0, :lo12:.LANCHOR140
+	adrp	x0, .LANCHOR139
+	add	x8, x0, :lo12:.LANCHOR139
 	adrp	x11, .LANCHOR22
 	add	x29, sp, 0
 	add	x8, x8, 1
@@ -5055,7 +5049,7 @@ FlashLoadPhyInfoInRam:
 	add	x11, x11, :lo12:.LANCHOR22
 	stp	x19, x20, [sp, 16]
 	mov	x10, 0
-.L731:
+.L732:
 	ldrb	w2, [x8, -1]
 	mov	w12, w10
 	lsl	x20, x10, 5
@@ -5063,28 +5057,28 @@ FlashLoadPhyInfoInRam:
 	mov	x0, x8
 	bl	FlashMemCmp8
 	mov	w19, w0
-	cbnz	w0, .L729
-	add	x0, x7, :lo12:.LANCHOR140
+	cbnz	w0, .L730
+	add	x0, x7, :lo12:.LANCHOR139
 	ubfiz	x12, x12, 5, 32
 	add	x20, x0, x20
 	add	x0, x0, x12
-	adrp	x1, .LANCHOR141
-	add	x4, x1, :lo12:.LANCHOR141
+	adrp	x1, .LANCHOR140
+	add	x4, x1, :lo12:.LANCHOR140
 	ldrb	w3, [x0, 22]
 	mov	x0, 0
-.L730:
+.L731:
 	lsl	x5, x0, 5
 	mov	w2, w0
 	ldrb	w5, [x5, x4]
 	cmp	w5, w3
-	beq	.L733
+	beq	.L734
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L730
+	bne	.L731
 	mov	w2, w0
-.L733:
+.L734:
 	ubfiz	x0, x2, 5, 32
-	add	x1, x1, :lo12:.LANCHOR141
+	add	x1, x1, :lo12:.LANCHOR140
 	add	x1, x1, x0
 	mov	w2, 32
 	adrp	x0, .LANCHOR7
@@ -5092,17 +5086,17 @@ FlashLoadPhyInfoInRam:
 	bl	ftl_memcpy
 	mov	w2, 32
 	mov	x1, x20
-	adrp	x0, .LANCHOR29
-	add	x0, x0, :lo12:.LANCHOR29
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
 	bl	ftl_memcpy
-	b	.L728
-.L729:
+	b	.L729
+.L730:
 	add	x10, x10, 1
 	add	x8, x8, 32
-	cmp	x10, 73
-	bne	.L731
+	cmp	x10, 74
+	bne	.L732
 	mov	w19, -1
-.L728:
+.L729:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -5114,15 +5108,15 @@ FlashLoadPhyInfoInRam:
 	.type	ftl_memcpy32, %function
 ftl_memcpy32:
 	mov	x3, 0
-.L738:
+.L739:
 	cmp	w2, w3
-	bhi	.L739
+	bhi	.L740
 	ret
-.L739:
+.L740:
 	ldr	w4, [x1, x3, lsl 2]
 	str	w4, [x0, x3, lsl 2]
 	add	x3, x3, 1
-	b	.L738
+	b	.L739
 	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.NandcCopy1KB,"ax",@progbits
 	.align	2
@@ -5141,15 +5135,15 @@ NandcCopy1KB:
 	ubfiz	x0, x19, 9, 8
 	mov	x20, x4
 	add	x0, x2, x0
-	bne	.L741
-	cbz	x3, .L742
+	bne	.L742
+	cbz	x3, .L743
 	tst	x3, 3
-	bne	.L743
+	bne	.L744
 	mov	w2, 256
 	mov	x1, x3
 	bl	ftl_memcpy32
-.L742:
-	cbz	x20, .L740
+.L743:
+	cbz	x20, .L741
 	ldrb	w0, [x20]
 	lsr	w19, w19, 1
 	ldrb	w1, [x20, 1]
@@ -5161,26 +5155,26 @@ NandcCopy1KB:
 	mov	w1, 12
 	mul	w19, w19, w1
 	str	w0, [x21, w19, sxtw 2]
-.L740:
+.L741:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L743:
+.L744:
 	mov	w2, 1024
 	mov	x1, x3
 	bl	ftl_memcpy
-	b	.L742
-.L741:
-	cbz	x3, .L746
+	b	.L743
+.L742:
+	cbz	x3, .L747
 	tst	x3, 3
-	bne	.L747
+	bne	.L748
 	mov	x1, x0
 	mov	w2, 256
 	mov	x0, x3
 	bl	ftl_memcpy32
-.L746:
-	cbz	x20, .L740
+.L747:
+	cbz	x20, .L741
 	lsr	w19, w19, 1
 	mov	w0, 12
 	mul	w19, w19, w0
@@ -5192,13 +5186,13 @@ NandcCopy1KB:
 	lsr	w0, w0, 24
 	strb	w1, [x20, 2]
 	strb	w0, [x20, 3]
-	b	.L740
-.L747:
+	b	.L741
+.L748:
 	mov	x1, x0
 	mov	w2, 1024
 	mov	x0, x3
 	bl	ftl_memcpy
-	b	.L746
+	b	.L747
 	.size	NandcCopy1KB, .-NandcCopy1KB
 	.section	.text.NandcXferData,"ax",@progbits
 	.align	2
@@ -5222,14 +5216,14 @@ NandcXferData:
 	and	w24, w2, 255
 	mov	x21, x4
 	ldr	x19, [x0, x1]
-	bne	.L760
-	cbnz	x4, .L761
+	bne	.L761
+	cbnz	x4, .L762
 	add	x21, x29, 128
 	mov	w2, 64
 	mov	w1, 255
 	add	x0, x29, 128
 	bl	ftl_memset
-.L761:
+.L762:
 	mov	x5, x21
 	mov	x4, x26
 	mov	w2, w24
@@ -5239,12 +5233,12 @@ NandcXferData:
 	bl	NandcXferStart
 	mov	w0, w25
 	bl	NandcXferComp
-	cbnz	w20, .L785
-	adrp	x0, .LANCHOR30
-	adrp	x4, .LANCHOR33
+	cbnz	w20, .L786
+	adrp	x0, .LANCHOR31
+	adrp	x4, .LANCHOR34
 	mov	x1, x0
-	add	x4, x4, :lo12:.LANCHOR33
-	ldr	w2, [x0, #:lo12:.LANCHOR30]
+	add	x4, x4, :lo12:.LANCHOR34
+	ldr	w2, [x0, #:lo12:.LANCHOR31]
 	mov	w0, 128
 	mov	w3, 64
 	cmp	w2, 25
@@ -5252,38 +5246,38 @@ NandcXferData:
 	add	x2, x21, x2, lsl 2
 	csel	w3, w3, w0, cc
 	mov	w0, 0
-.L764:
+.L765:
 	add	w5, w3, w0
 	cmp	x21, x2
-	bne	.L765
-	adrp	x0, .LANCHOR32
-	ldr	w4, [x1, #:lo12:.LANCHOR30]
+	bne	.L766
+	adrp	x0, .LANCHOR33
+	ldr	w4, [x1, #:lo12:.LANCHOR31]
 	lsr	w24, w24, 2
 	mov	w2, 0
-	ldr	w3, [x0, #:lo12:.LANCHOR32]
+	ldr	w3, [x0, #:lo12:.LANCHOR33]
 	mov	w22, 0
-.L766:
+.L767:
 	cmp	w2, w24
-	bcs	.L762
-	cbnz	w4, .L772
-.L762:
+	bcs	.L763
+	cbnz	w4, .L773
+.L763:
 	str	wzr, [x19, 16]
-.L773:
-	adrp	x0, .LANCHOR32
-	ldr	w0, [x0, #:lo12:.LANCHOR32]
+.L774:
+	adrp	x0, .LANCHOR33
+	ldr	w0, [x0, #:lo12:.LANCHOR33]
 	cmp	w0, 5
-	bls	.L759
-	cbnz	w20, .L759
+	bls	.L760
+	cbnz	w20, .L760
 	ldr	w0, [x19]
 	mov	w1, 8192
 	movk	w1, 0x2, lsl 16
 	and	w1, w0, w1
 	cmp	w1, 139264
-	bne	.L759
+	bne	.L760
 	orr	w0, w0, 131072
 	mov	w22, -1
 	str	w0, [x19]
-.L759:
+.L760:
 	mov	w0, w22
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -5292,7 +5286,7 @@ NandcXferData:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L765:
+.L766:
 	ldr	x6, [x4, 8]
 	and	x0, x0, 4294967292
 	add	x21, x21, 4
@@ -5305,18 +5299,18 @@ NandcXferData:
 	lsr	w0, w0, 24
 	strb	w0, [x21, -1]
 	mov	w0, w5
-	b	.L764
-.L772:
+	b	.L765
+.L773:
 	uxtw	x0, w2
 	add	x0, x0, 8
 	ldr	w0, [x19, x0, lsl 2]
 	str	w0, [x29, 120]
 	ldr	w0, [x29, 120]
-	tbnz	x0, 2, .L788
+	tbnz	x0, 2, .L789
 	ldr	w0, [x29, 120]
-	tbnz	x0, 15, .L788
+	tbnz	x0, 15, .L789
 	cmp	w3, 5
-	bls	.L768
+	bls	.L769
 	ldr	w1, [x29, 120]
 	ubfx	x6, x1, 3, 5
 	ldr	w1, [x29, 120]
@@ -5329,26 +5323,26 @@ NandcXferData:
 	orr	w0, w5, w0, lsl 5
 	cmp	w1, w0
 	ldr	w0, [x29, 120]
-	bls	.L769
+	bls	.L770
 	ubfx	x1, x0, 3, 5
 	ldr	w0, [x29, 120]
 	ubfx	x0, x0, 27, 1
-.L794:
+.L795:
 	orr	w0, w1, w0, lsl 5
-.L770:
+.L771:
 	cmp	w22, w0
 	csel	w22, w22, w0, cs
-.L767:
+.L768:
 	add	w2, w2, 1
-	b	.L766
-.L769:
+	b	.L767
+.L770:
 	ubfx	x1, x0, 16, 5
 	ldr	w0, [x29, 120]
 	ubfx	x0, x0, 29, 1
-	b	.L794
-.L768:
+	b	.L795
+.L769:
 	cmp	w3, 3
-	bls	.L789
+	bls	.L790
 	ldr	w1, [x29, 120]
 	ubfx	x6, x1, 3, 5
 	ldr	w1, [x29, 120]
@@ -5361,45 +5355,45 @@ NandcXferData:
 	orr	w0, w5, w0, lsl 5
 	cmp	w1, w0
 	ldr	w0, [x29, 120]
-	bls	.L771
+	bls	.L772
 	ubfx	x1, x0, 3, 5
 	ldr	w0, [x29, 120]
 	ubfx	x0, x0, 28, 1
-	b	.L794
-.L771:
+	b	.L795
+.L772:
 	ubfx	x1, x0, 16, 5
 	ldr	w0, [x29, 120]
 	ubfx	x0, x0, 30, 1
-	b	.L794
-.L789:
+	b	.L795
+.L790:
 	mov	w0, 0
-	b	.L770
-.L788:
+	b	.L771
+.L789:
 	mov	w22, -1
-	b	.L767
-.L785:
+	b	.L768
+.L786:
 	mov	w22, 0
-	b	.L762
-.L760:
+	b	.L763
+.L761:
 	cmp	w20, 1
-	bne	.L774
+	bne	.L775
 	cmp	x4, 0
 	mov	w23, 2
 	csel	w23, w23, wzr, ne
 	mov	w27, 0
 	lsl	w23, w23, 1
 	mov	w22, 0
-.L775:
+.L776:
 	cmp	w22, w24
-	bcc	.L777
+	bcc	.L778
 	mov	w22, 0
-	b	.L773
-.L777:
+	b	.L774
+.L778:
 	and	w28, w22, 3
-	cbz	x26, .L790
+	cbz	x26, .L791
 	lsl	w3, w22, 9
 	add	x3, x26, x3
-.L776:
+.L777:
 	add	x4, x21, x27, uxtw
 	mov	w2, w28
 	mov	w1, 1
@@ -5416,11 +5410,11 @@ NandcXferData:
 	add	w27, w27, w23
 	mov	w0, w25
 	bl	NandcXferComp
-	b	.L775
-.L790:
-	mov	x3, 0
 	b	.L776
-.L774:
+.L791:
+	mov	x3, 0
+	b	.L777
+.L775:
 	mov	w0, w25
 	mov	x5, 0
 	mov	x4, 0
@@ -5436,16 +5430,16 @@ NandcXferData:
 	lsl	w0, w27, 1
 	mov	w22, 0
 	str	w0, [x29, 108]
-.L778:
+.L779:
 	cmp	w24, w23
-	bls	.L773
+	bls	.L774
 	mov	w0, w25
 	bl	NandcXferComp
 	ldr	w0, [x19, 32]
 	add	w27, w23, 2
 	str	w0, [x29, 120]
 	cmp	w24, w27
-	bls	.L779
+	bls	.L780
 	mov	x5, 0
 	mov	x4, 0
 	and	w3, w27, 3
@@ -5453,9 +5447,9 @@ NandcXferData:
 	mov	w1, 0
 	mov	w0, w25
 	bl	NandcXferStart
-.L779:
+.L780:
 	ldr	w0, [x29, 120]
-	tbnz	x0, 2, .L791
+	tbnz	x0, 2, .L792
 	ldr	w0, [x29, 120]
 	ubfx	x1, x0, 3, 5
 	ldr	w0, [x29, 120]
@@ -5463,12 +5457,12 @@ NandcXferData:
 	orr	w0, w1, w0, lsl 5
 	cmp	w22, w0
 	csel	w22, w22, w0, cs
-.L780:
+.L781:
 	and	w2, w23, 3
-	cbz	x26, .L792
+	cbz	x26, .L793
 	lsl	w3, w23, 9
 	add	x3, x26, x3
-.L781:
+.L782:
 	add	x4, x21, x28, uxtw
 	mov	x0, x19
 	mov	w1, 0
@@ -5476,13 +5470,13 @@ NandcXferData:
 	ldr	w0, [x29, 108]
 	mov	w23, w27
 	add	w28, w28, w0
-	b	.L778
-.L791:
-	mov	w22, -1
-	b	.L780
+	b	.L779
 .L792:
-	mov	x3, 0
+	mov	w22, -1
 	b	.L781
+.L793:
+	mov	x3, 0
+	b	.L782
 	.size	NandcXferData, .-NandcXferData
 	.section	.text.FlashReadRawPage,"ax",@progbits
 	.align	2
@@ -5496,11 +5490,11 @@ FlashReadRawPage:
 	stp	x21, x22, [sp, 32]
 	mov	w21, w1
 	str	x23, [sp, 48]
-	adrp	x1, .LANCHOR29+9
+	adrp	x1, .LANCHOR30+9
 	mov	x22, x2
 	mov	x23, x3
-	ldrb	w20, [x1, #:lo12:.LANCHOR29+9]
-	bne	.L796
+	ldrb	w20, [x1, #:lo12:.LANCHOR30+9]
+	bne	.L797
 	adrp	x0, .LANCHOR2
 	adrp	x1, .LANCHOR3
 	ldrb	w0, [x0, #:lo12:.LANCHOR2]
@@ -5509,7 +5503,7 @@ FlashReadRawPage:
 	cmp	w0, w21
 	mov	w0, 4
 	csel	w20, w20, w0, ls
-.L796:
+.L797:
 	mov	w0, w19
 	bl	NandcWaitFlashReady
 	mov	w0, w19
@@ -5557,12 +5551,12 @@ FlashDdrTunningRead:
 	mov	w26, w4
 	ldr	w0, [x0, 304]
 	str	w0, [x29, 108]
-	adrp	x0, .LANCHOR32
-	ldr	w0, [x0, #:lo12:.LANCHOR32]
+	adrp	x0, .LANCHOR33
+	ldr	w0, [x0, #:lo12:.LANCHOR33]
 	cmp	w0, 8
 	mov	w0, 12
 	csel	w22, w22, w0, cc
-	cbz	w4, .L812
+	cbz	w4, .L813
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
@@ -5581,10 +5575,10 @@ FlashDdrTunningRead:
 	ldrb	w0, [x19, #:lo12:.LANCHOR24]
 	bl	NandcSetMode
 	cmn	w21, #1
-	bne	.L801
-.L810:
+	bne	.L802
+.L811:
 	mov	w21, -1
-.L798:
+.L799:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -5593,30 +5587,30 @@ FlashDdrTunningRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L801:
+.L802:
 	mov	w1, w25
 	mov	w2, w21
-	adrp	x0, .LC7
-	add	x0, x0, :lo12:.LC7
+	adrp	x0, .LC10
+	add	x0, x0, :lo12:.LC10
 	bl	printf
-	adrp	x1, .LANCHOR142
-	ldr	w0, [x1, #:lo12:.LANCHOR142]
+	adrp	x1, .LANCHOR141
+	ldr	w0, [x1, #:lo12:.LANCHOR141]
 	add	w0, w0, 1
 	cmp	w0, 2047
-	bhi	.L803
-	str	w0, [x1, #:lo12:.LANCHOR142]
-	b	.L798
-.L803:
-	str	wzr, [x1, #:lo12:.LANCHOR142]
+	bhi	.L804
+	str	w0, [x1, #:lo12:.LANCHOR141]
+	b	.L799
+.L804:
+	str	wzr, [x1, #:lo12:.LANCHOR141]
 	mov	x28, 0
 	mov	x23, 0
-.L800:
+.L801:
 	mov	w5, 0
 	mov	w20, 0
 	mov	w6, 0
 	mov	w19, 0
 	mov	w27, -1
-.L808:
+.L809:
 	stp	w5, w6, [x29, 100]
 	mov	w0, w22
 	bl	NandcSetDdrPara
@@ -5628,65 +5622,65 @@ FlashDdrTunningRead:
 	add	w1, w21, 1
 	cmp	w0, w1
 	ldp	w5, w6, [x29, 100]
-	bhi	.L804
+	bhi	.L805
 	cmp	w0, 2
-	bhi	.L814
+	bhi	.L815
 	add	w19, w19, 1
 	cmp	w19, 9
-	bls	.L814
+	bls	.L815
 	mov	w1, w20
 	mov	w21, w0
 	sub	w20, w22, w19
 	mov	w27, 0
-.L806:
+.L807:
 	cmp	w19, w6
 	csel	w20, w20, w1, hi
-.L807:
-	cbz	w20, .L809
+.L808:
+	cbz	w20, .L810
 	mov	w1, w20
-	adrp	x0, .LC8
-	add	x0, x0, :lo12:.LC8
+	adrp	x0, .LC11
+	add	x0, x0, :lo12:.LC11
 	bl	printf
 	mov	w0, w20
 	bl	NandcSetDdrPara
-.L809:
-	cbz	w27, .L798
-	adrp	x0, .LC9
+.L810:
+	cbz	w27, .L799
+	adrp	x0, .LC12
 	mov	w2, w25
 	mov	w1, w24
-	add	x0, x0, :lo12:.LC9
+	add	x0, x0, :lo12:.LC12
 	bl	printf
-	cbz	w26, .L810
+	cbz	w26, .L811
 	ldr	w1, [x29, 108]
 	lsr	w0, w1, 8
 	bl	NandcSetDdrPara
-	b	.L798
-.L812:
+	b	.L799
+.L813:
 	mov	w21, 1024
-	b	.L800
-.L804:
+	b	.L801
+.L805:
 	cmp	w19, w6
-	bls	.L815
+	bls	.L816
 	sub	w20, w5, w19
 	cmp	w19, 7
-	bhi	.L807
+	bhi	.L808
 	mov	w6, w19
-.L815:
+.L816:
 	mov	w19, 0
-	b	.L805
-.L814:
+	b	.L806
+.L815:
 	mov	w5, w22
 	mov	w21, w0
 	mov	w27, 0
 	mov	x28, 0
 	mov	x23, 0
-.L805:
+.L806:
 	add	w22, w22, 2
 	cmp	w22, 69
-	bls	.L808
+	bls	.L809
 	mov	w1, w20
 	mov	w20, w5
-	b	.L806
+	b	.L807
 	.size	FlashDdrTunningRead, .-FlashDdrTunningRead
 	.section	.text.FlashReadPage,"ax",@progbits
 	.align	2
@@ -5707,14 +5701,14 @@ FlashReadPage:
 	bl	FlashReadRawPage
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L825
+	bne	.L826
 	adrp	x24, .LANCHOR5
 	ldrb	w25, [x24, #:lo12:.LANCHOR5]
-	cbnz	w25, .L826
-.L828:
-	adrp	x0, .LANCHOR28
-	ldrb	w0, [x0, #:lo12:.LANCHOR28]
-	cbz	w0, .L825
+	cbnz	w25, .L827
+.L829:
+	adrp	x0, .LANCHOR29
+	ldrb	w0, [x0, #:lo12:.LANCHOR29]
+	cbz	w0, .L826
 	adrp	x0, .LANCHOR19
 	mov	w4, 1
 	mov	x3, x23
@@ -5726,16 +5720,16 @@ FlashReadPage:
 	bl	FlashDdrTunningRead
 	mov	w19, w0
 	cmn	w0, #1
-	beq	.L829
-	adrp	x0, .LANCHOR31
-	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	beq	.L830
+	adrp	x0, .LANCHOR32
+	ldrb	w0, [x0, #:lo12:.LANCHOR32]
 	cmp	w19, w0, lsr 1
-	bls	.L825
-.L829:
+	bls	.L826
+.L830:
 	lsr	w0, w24, 8
 	bl	NandcSetDdrPara
-	b	.L825
-.L826:
+	b	.L826
+.L827:
 	strb	wzr, [x24, #:lo12:.LANCHOR5]
 	mov	x3, x23
 	mov	x2, x22
@@ -5744,14 +5738,14 @@ FlashReadPage:
 	bl	FlashReadRawPage
 	strb	w25, [x24, #:lo12:.LANCHOR5]
 	cmn	w0, #1
-	beq	.L828
+	beq	.L829
 	mov	w19, w0
-.L825:
-	adrp	x24, .LANCHOR143
-	ldr	x4, [x24, #:lo12:.LANCHOR143]
-	cbz	x4, .L824
+.L826:
+	adrp	x24, .LANCHOR142
+	ldr	x4, [x24, #:lo12:.LANCHOR142]
+	cbz	x4, .L825
 	cmn	w19, #1
-	bne	.L824
+	bne	.L825
 	mov	x3, x23
 	mov	x2, x22
 	mov	w1, w21
@@ -5761,17 +5755,17 @@ FlashReadPage:
 	mov	w1, w0
 	mov	w3, w21
 	mov	w2, w20
-	adrp	x0, .LC10
-	add	x0, x0, :lo12:.LC10
+	adrp	x0, .LC13
+	add	x0, x0, :lo12:.LC13
 	bl	printf
 	cmn	w19, #1
-	bne	.L824
+	bne	.L825
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L824
+	cbz	w0, .L825
 	mov	w0, w20
 	bl	flash_enter_slc_mode
-	ldr	x4, [x24, #:lo12:.LANCHOR143]
+	ldr	x4, [x24, #:lo12:.LANCHOR142]
 	mov	x3, x23
 	mov	x2, x22
 	mov	w1, w21
@@ -5780,7 +5774,7 @@ FlashReadPage:
 	mov	w19, w0
 	mov	w0, w20
 	bl	flash_exit_slc_mode
-.L824:
+.L825:
 	mov	w0, w19
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -5816,30 +5810,30 @@ FlashDdrParaScan:
 	mov	x2, 0
 	mov	w0, w20
 	mov	w1, w21
-	adrp	x20, .LANCHOR28
+	adrp	x20, .LANCHOR29
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	beq	.L845
+	beq	.L846
 	cmn	w22, #1
-	bne	.L846
-.L845:
+	bne	.L847
+.L846:
 	ldrb	w0, [x19, #:lo12:.LANCHOR24]
-	tbz	x0, 0, .L846
+	tbz	x0, 0, .L847
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
 	bl	NandcSetMode
-	strb	wzr, [x20, #:lo12:.LANCHOR28]
-.L847:
+	strb	wzr, [x20, #:lo12:.LANCHOR29]
+.L848:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L846:
+.L847:
 	mov	w0, 1
-	strb	w0, [x20, #:lo12:.LANCHOR28]
-	b	.L847
+	strb	w0, [x20, #:lo12:.LANCHOR29]
+	b	.L848
 	.size	FlashDdrParaScan, .-FlashDdrParaScan
 	.section	.text.FlashLoadPhyInfo,"ax",@progbits
 	.align	2
@@ -5850,9 +5844,9 @@ FlashLoadPhyInfo:
 	mov	w0, 60
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR29
+	adrp	x20, .LANCHOR30
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR145
+	adrp	x22, .LANCHOR144
 	strb	w0, [x29, 120]
 	mov	w0, 40
 	strb	w0, [x29, 121]
@@ -5860,116 +5854,116 @@ FlashLoadPhyInfo:
 	strb	w0, [x29, 122]
 	mov	w0, 16
 	strb	w0, [x29, 123]
-	add	x0, x20, :lo12:.LANCHOR29
+	add	x0, x20, :lo12:.LANCHOR30
 	stp	x23, x24, [sp, 48]
-	adrp	x21, .LANCHOR144
-	adrp	x24, .LANCHOR146
+	adrp	x21, .LANCHOR143
+	adrp	x24, .LANCHOR145
 	stp	x25, x26, [sp, 64]
 	ldrh	w0, [x0, 10]
 	adrp	x26, .LANCHOR7
 	str	w0, [x29, 108]
 	mov	w19, 0
-	ldr	x0, [x22, #:lo12:.LANCHOR145]
+	ldr	x0, [x22, #:lo12:.LANCHOR144]
 	mov	w25, 4
-	str	x0, [x21, #:lo12:.LANCHOR144]
+	str	x0, [x21, #:lo12:.LANCHOR143]
 	mov	w23, -1
 	stp	x27, x28, [sp, 80]
 	add	x26, x26, :lo12:.LANCHOR7
-	str	wzr, [x24, #:lo12:.LANCHOR146]
+	str	wzr, [x24, #:lo12:.LANCHOR145]
 	mov	w0, 0
 	bl	flash_enter_slc_mode
-.L856:
+.L857:
 	add	w28, w19, 1
 	mov	x27, 0
-.L858:
+.L859:
 	add	x0, x29, 120
 	ldrb	w0, [x0, x27]
 	bl	FlashBchSel
-	ldr	x2, [x22, #:lo12:.LANCHOR145]
+	ldr	x2, [x22, #:lo12:.LANCHOR144]
 	mov	x3, 0
 	mov	w1, w19
 	mov	w0, 0
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	bne	.L857
-	ldr	x2, [x22, #:lo12:.LANCHOR145]
+	bne	.L858
+	ldr	x2, [x22, #:lo12:.LANCHOR144]
 	mov	x3, 0
 	mov	w1, w28
 	mov	w0, 0
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	bne	.L857
+	bne	.L858
 	add	x27, x27, 1
 	cmp	x27, 4
-	bne	.L858
-.L859:
+	bne	.L859
+.L860:
 	ldr	w0, [x29, 108]
 	subs	w25, w25, #1
 	add	w19, w19, w0
-	bne	.L856
-	b	.L864
-.L860:
+	bne	.L857
+	b	.L865
+.L861:
 	mov	w1, 2036
 	add	x0, x6, 12
 	bl	JSHash
 	ldr	w1, [x6, 8]
 	cmp	w1, w0
-	bne	.L866
-	add	x23, x20, :lo12:.LANCHOR29
+	bne	.L867
+	add	x23, x20, :lo12:.LANCHOR30
 	add	x1, x6, 160
 	mov	w2, 32
 	mov	x0, x23
 	bl	ftl_memcpy
-	ldr	x1, [x21, #:lo12:.LANCHOR144]
+	ldr	x1, [x21, #:lo12:.LANCHOR143]
 	mov	w2, 32
 	mov	x0, x26
 	add	x1, x1, 192
 	bl	ftl_memcpy
-	ldr	x1, [x21, #:lo12:.LANCHOR144]
+	ldr	x1, [x21, #:lo12:.LANCHOR143]
 	mov	w2, 852
 	adrp	x0, .LANCHOR20
 	add	x0, x0, :lo12:.LANCHOR20
 	add	x1, x1, 224
 	bl	ftl_memcpy
-	ldr	x1, [x21, #:lo12:.LANCHOR144]
-	adrp	x0, .LANCHOR28
-	str	w19, [x24, #:lo12:.LANCHOR146]
+	ldr	x1, [x21, #:lo12:.LANCHOR143]
+	adrp	x0, .LANCHOR29
+	str	w19, [x24, #:lo12:.LANCHOR145]
 	ldr	w2, [x1, 1076]
-	strb	w2, [x0, #:lo12:.LANCHOR28]
+	strb	w2, [x0, #:lo12:.LANCHOR29]
 	ldrh	w0, [x23, 10]
-	adrp	x2, .LANCHOR147
+	adrp	x2, .LANCHOR146
 	udiv	w0, w19, w0
 	add	w3, w0, 1
-	cbz	w0, .L862
-	str	w3, [x2, #:lo12:.LANCHOR147]
-.L863:
-	adrp	x0, .LANCHOR148
+	cbz	w0, .L863
+	str	w3, [x2, #:lo12:.LANCHOR146]
+.L864:
+	adrp	x0, .LANCHOR147
 	ldrh	w1, [x1, 14]
 	mov	w23, 0
-	strb	w1, [x0, #:lo12:.LANCHOR148]
-	b	.L859
-.L862:
+	strb	w1, [x0, #:lo12:.LANCHOR147]
+	b	.L860
+.L863:
 	mov	w0, 2
-	str	w0, [x2, #:lo12:.LANCHOR147]
-	b	.L863
-.L866:
+	str	w0, [x2, #:lo12:.LANCHOR146]
+	b	.L864
+.L867:
 	mov	w23, -1
-	b	.L859
-.L857:
-	ldr	x6, [x21, #:lo12:.LANCHOR144]
+	b	.L860
+.L858:
+	ldr	x6, [x21, #:lo12:.LANCHOR143]
 	mov	w1, 20036
 	movk	w1, 0x4e41, lsl 16
 	ldr	w0, [x6]
 	cmp	w0, w1
-	bne	.L859
-	cbnz	w23, .L860
-	add	x20, x20, :lo12:.LANCHOR29
+	bne	.L860
+	cbnz	w23, .L861
+	add	x20, x20, :lo12:.LANCHOR30
 	ldrh	w0, [x20, 10]
 	udiv	w19, w19, w0
-	adrp	x0, .LANCHOR147
+	adrp	x0, .LANCHOR146
 	add	w19, w19, 1
-	str	w19, [x0, #:lo12:.LANCHOR147]
-.L864:
+	str	w19, [x0, #:lo12:.LANCHOR146]
+.L865:
 	mov	w0, 0
 	bl	flash_exit_slc_mode
 	mov	w0, w23
@@ -6014,34 +6008,34 @@ ToshibaReadRetrial:
 	and	w0, w0, 255
 	add	x19, x22, x19, lsl 8
 	cmp	w0, 1
-	bls	.L886
-	adrp	x0, .LANCHOR28
-	ldrb	w0, [x0, #:lo12:.LANCHOR28]
-	cbz	w0, .L887
+	bls	.L887
+	adrp	x0, .LANCHOR29
+	ldrb	w0, [x0, #:lo12:.LANCHOR29]
+	cbz	w0, .L888
 	mov	w23, 1
 	mov	w0, 0
 	bl	NandcSetDdrMode
-.L871:
+.L872:
 	add	x0, x22, x27, lsl 8
 	mov	w1, 92
 	str	w1, [x0, 2056]
 	mov	w1, 197
 	str	w1, [x0, 2056]
-.L870:
+.L871:
 	ldrsw	x0, [x29, 124]
 	mov	w20, 1
 	mov	w24, -1
 	add	x0, x0, 8
 	add	x0, x22, x0, lsl 8
 	str	x0, [x29, 104]
-.L872:
-	adrp	x0, .LANCHOR149
-	ldrb	w0, [x0, #:lo12:.LANCHOR149]
+.L873:
+	adrp	x0, .LANCHOR148
+	ldrb	w0, [x0, #:lo12:.LANCHOR148]
 	add	w0, w0, 1
 	cmp	w20, w0
-	bcc	.L881
+	bcc	.L882
 	mov	w28, w24
-.L880:
+.L881:
 	ldr	x0, [x29, 112]
 	mov	w1, 0
 	ldrb	w0, [x0, #:lo12:.LANCHOR11]
@@ -6049,29 +6043,29 @@ ToshibaReadRetrial:
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x19
-	bhi	.L882
+	bhi	.L883
 	bl	SandiskSetRRPara
-.L883:
+.L884:
 	ldrsw	x0, [x29, 124]
 	add	x0, x0, 8
 	add	x22, x22, x0, lsl 8
 	mov	w0, 255
 	str	w0, [x22, 8]
-	adrp	x0, .LANCHOR31
-	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	adrp	x0, .LANCHOR32
+	ldrb	w0, [x0, #:lo12:.LANCHOR32]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L884
+	bcc	.L885
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L884:
+.L885:
 	mov	w0, w21
 	bl	NandcWaitFlashReady
-	cbz	w23, .L869
+	cbz	w23, .L870
 	mov	w0, 4
 	bl	NandcSetDdrMode
-.L869:
+.L870:
 	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6080,13 +6074,13 @@ ToshibaReadRetrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
+.L888:
+	mov	w23, 0
+	b	.L872
 .L887:
 	mov	w23, 0
 	b	.L871
-.L886:
-	mov	w23, 0
-	b	.L870
-.L881:
+.L882:
 	ldr	x0, [x29, 112]
 	mov	w1, w20
 	ldrb	w0, [x0, #:lo12:.LANCHOR11]
@@ -6094,28 +6088,28 @@ ToshibaReadRetrial:
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x19
-	bhi	.L873
+	bhi	.L874
 	bl	SandiskSetRRPara
-.L874:
+.L875:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0, #:lo12:.LANCHOR11]
 	cmp	w0, 34
-	bne	.L875
-	adrp	x0, .LANCHOR149
-	ldrb	w0, [x0, #:lo12:.LANCHOR149]
+	bne	.L876
+	adrp	x0, .LANCHOR148
+	ldrb	w0, [x0, #:lo12:.LANCHOR148]
 	sub	w0, w0, #3
 	cmp	w20, w0
-	bne	.L875
+	bne	.L876
 	ldr	x1, [x29, 104]
 	mov	w0, 179
 	str	w0, [x1, 8]
-.L875:
+.L876:
 	add	x0, x22, x27, lsl 8
 	mov	w1, 38
 	str	w1, [x0, 2056]
 	mov	w1, 93
 	str	w1, [x0, 2056]
-	cbz	w23, .L876
+	cbz	w23, .L877
 	mov	w0, 4
 	bl	NandcSetDdrMode
 	ldr	w1, [x29, 120]
@@ -6126,35 +6120,35 @@ ToshibaReadRetrial:
 	mov	w28, w0
 	mov	w0, 0
 	bl	NandcSetDdrMode
-.L877:
+.L878:
 	cmn	w28, #1
-	beq	.L878
-	adrp	x0, .LANCHOR31
+	beq	.L879
+	adrp	x0, .LANCHOR32
 	cmn	w24, #1
 	csel	w24, w24, w28, ne
-	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	ldrb	w0, [x0, #:lo12:.LANCHOR32]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L880
+	bcc	.L881
 	mov	x26, 0
 	mov	x25, 0
-.L878:
+.L879:
 	add	w20, w20, 1
-	b	.L872
-.L873:
+	b	.L873
+.L874:
 	bl	ToshibaSetRRPara
-	b	.L874
-.L876:
+	b	.L875
+.L877:
 	ldr	w1, [x29, 120]
 	mov	x3, x26
 	mov	x2, x25
 	mov	w0, w21
 	bl	FlashReadRawPage
 	mov	w28, w0
-	b	.L877
-.L882:
+	b	.L878
+.L883:
 	bl	ToshibaSetRRPara
-	b	.L883
+	b	.L884
 	.size	ToshibaReadRetrial, .-ToshibaReadRetrial
 	.section	.text.SamsungReadRetrial,"ax",@progbits
 	.align	2
@@ -6174,38 +6168,38 @@ SamsungReadRetrial:
 	str	x27, [sp, 80]
 	mov	x25, x3
 	bl	NandcWaitFlashReady
-	adrp	x26, .LANCHOR149
+	adrp	x26, .LANCHOR148
 	sbfiz	x1, x22, 4, 32
 	adrp	x0, .LANCHOR6
 	add	x0, x0, :lo12:.LANCHOR6
-	adrp	x27, .LANCHOR31
+	adrp	x27, .LANCHOR32
 	add	x2, x0, x1
-	add	x26, x26, :lo12:.LANCHOR149
-	add	x27, x27, :lo12:.LANCHOR31
+	add	x26, x26, :lo12:.LANCHOR148
+	add	x27, x27, :lo12:.LANCHOR32
 	mov	w21, 1
 	ldr	x0, [x0, x1]
 	mov	w19, -1
 	ldrb	w20, [x2, 8]
 	add	x20, x20, 8
 	add	x20, x0, x20, lsl 8
-.L898:
+.L899:
 	ldrb	w0, [x26]
 	add	w0, w0, 1
 	cmp	w21, w0
-	bcc	.L902
-.L901:
+	bcc	.L903
+.L902:
 	mov	x0, x20
 	mov	w1, 0
 	bl	SamsungSetRRPara
-	adrp	x0, .LANCHOR31
-	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	adrp	x0, .LANCHOR32
+	ldrb	w0, [x0, #:lo12:.LANCHOR32]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L897
+	bcc	.L898
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L897:
+.L898:
 	mov	w0, w19
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -6214,7 +6208,7 @@ SamsungReadRetrial:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L902:
+.L903:
 	mov	w1, w21
 	mov	x0, x20
 	bl	SamsungSetRRPara
@@ -6224,21 +6218,21 @@ SamsungReadRetrial:
 	mov	w0, w22
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	beq	.L899
+	beq	.L900
 	ldrb	w1, [x27]
 	cmn	w19, #1
 	csel	w19, w19, w0, ne
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L904
+	bcc	.L905
 	mov	x25, 0
 	mov	x24, 0
-.L899:
+.L900:
 	add	w21, w21, 1
-	b	.L898
-.L904:
+	b	.L899
+.L905:
 	mov	w19, w0
-	b	.L901
+	b	.L902
 	.size	SamsungReadRetrial, .-SamsungReadRetrial
 	.section	.text.MicronReadRetrial,"ax",@progbits
 	.align	2
@@ -6249,29 +6243,29 @@ MicronReadRetrial:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	w23, w0, 255
-	adrp	x0, .LANCHOR31
+	adrp	x0, .LANCHOR32
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
 	mov	w24, w1
-	ldrb	w20, [x0, #:lo12:.LANCHOR31]
+	ldrb	w20, [x0, #:lo12:.LANCHOR32]
 	adrp	x0, .LANCHOR8
 	stp	x21, x22, [sp, 32]
 	mov	x25, x2
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
 	mov	x26, x3
 	stp	x27, x28, [sp, 80]
-	cbnz	w0, .L912
+	cbnz	w0, .L913
 	add	w20, w20, w20, lsl 1
 	asr	w20, w20, 2
-.L913:
+.L914:
 	mov	w0, w23
 	bl	NandcWaitFlashReady
 	sbfiz	x1, x23, 4, 32
 	adrp	x0, .LANCHOR6
 	add	x0, x0, :lo12:.LANCHOR6
-	adrp	x28, .LANCHOR149
+	adrp	x28, .LANCHOR148
 	add	x2, x0, x1
-	add	x28, x28, :lo12:.LANCHOR149
+	add	x28, x28, :lo12:.LANCHOR148
 	mov	w27, 0
 	mov	w19, -1
 	ldr	x4, [x0, x1]
@@ -6279,11 +6273,11 @@ MicronReadRetrial:
 	ldrb	w21, [x2, 8]
 	mov	w7, 137
 	add	x22, x4, x21, lsl 8
-.L914:
+.L915:
 	ldrb	w0, [x28]
 	cmp	w27, w0
-	bcc	.L918
-.L917:
+	bcc	.L919
+.L918:
 	add	x21, x4, x21, lsl 8
 	mov	w0, 239
 	str	w0, [x21, 2056]
@@ -6296,22 +6290,22 @@ MicronReadRetrial:
 	cmp	w19, w20
 	str	wzr, [x21, 2048]
 	str	wzr, [x21, 2048]
-	bcc	.L919
+	bcc	.L920
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L919:
+.L920:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L911
-	adrp	x0, .LC11
+	bne	.L912
+	adrp	x0, .LC14
 	mov	w4, w19
 	mov	w3, w27
 	mov	w2, w24
 	mov	w1, w27
-	add	x0, x0, :lo12:.LC11
+	add	x0, x0, :lo12:.LC14
 	bl	printf
-.L911:
+.L912:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6320,11 +6314,11 @@ MicronReadRetrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L912:
+.L913:
 	mov	w0, 3
 	sdiv	w20, w20, w0
-	b	.L913
-.L918:
+	b	.L914
+.L919:
 	str	w6, [x22, 2056]
 	mov	x0, 200
 	str	w7, [x22, 2052]
@@ -6346,19 +6340,19 @@ MicronReadRetrial:
 	ldp	w6, w7, [x29, 116]
 	ldr	w5, [x29, 124]
 	ldr	x4, [x29, 104]
-	beq	.L915
+	beq	.L916
 	cmn	w19, #1
 	csel	w19, w19, w0, ne
 	cmp	w0, w20
-	bcc	.L921
+	bcc	.L922
 	mov	x26, 0
 	mov	x25, 0
-.L915:
+.L916:
 	mov	w27, w5
-	b	.L914
-.L921:
+	b	.L915
+.L922:
 	mov	w19, w0
-	b	.L917
+	b	.L918
 	.size	MicronReadRetrial, .-MicronReadRetrial
 	.section	.text.HynixReadRetrial,"ax",@progbits
 	.align	2
@@ -6386,38 +6380,38 @@ HynixReadRetrial:
 	ldrb	w20, [x0, 12]
 	ldrb	w1, [x1, 19]
 	cmp	w1, 7
-	bne	.L932
+	bne	.L933
 	ldrb	w20, [x0, 20]
-.L932:
+.L933:
 	mov	w0, w23
 	bl	NandcWaitFlashReady
 	add	x6, x19, :lo12:.LANCHOR20
-	adrp	x5, .LANCHOR31
+	adrp	x5, .LANCHOR32
 	add	x7, x6, 4
-	add	x5, x5, :lo12:.LANCHOR31
+	add	x5, x5, :lo12:.LANCHOR32
 	mov	w4, 0
 	mov	w21, -1
-.L933:
+.L934:
 	cmp	w4, w24
-	bcc	.L938
-.L937:
+	bcc	.L939
+.L938:
 	ldr	x0, [x22, #:lo12:.LANCHOR18]
 	add	x19, x19, :lo12:.LANCHOR20
 	add	x19, x19, x28
 	ldrb	w0, [x0, 19]
 	cmp	w0, 7
-	bne	.L939
+	bne	.L940
 	strb	w20, [x19, 20]
-.L940:
-	adrp	x0, .LANCHOR31
-	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+.L941:
+	adrp	x0, .LANCHOR32
+	ldrb	w0, [x0, #:lo12:.LANCHOR32]
 	add	w0, w0, w0, lsl 1
 	cmp	w21, w0, lsr 2
-	bcc	.L931
+	bcc	.L932
 	cmn	w21, #1
 	mov	w0, 256
 	csel	w21, w21, w0, eq
-.L931:
+.L932:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6426,7 +6420,7 @@ HynixReadRetrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L938:
+.L939:
 	add	w20, w20, 1
 	ldrb	w1, [x6, 1]
 	and	w20, w20, 255
@@ -6448,24 +6442,24 @@ HynixReadRetrial:
 	ldr	w4, [x29, 108]
 	ldr	x5, [x29, 96]
 	ldp	x7, x6, [x29, 112]
-	beq	.L935
+	beq	.L936
 	ldrb	w1, [x5]
 	cmn	w21, #1
 	csel	w21, w21, w0, ne
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L942
+	bcc	.L943
 	mov	x27, 0
 	mov	x26, 0
-.L935:
+.L936:
 	add	w4, w4, 1
-	b	.L933
-.L942:
+	b	.L934
+.L943:
 	mov	w21, w0
-	b	.L937
-.L939:
+	b	.L938
+.L940:
 	strb	w20, [x19, 12]
-	b	.L940
+	b	.L941
 	.size	HynixReadRetrial, .-HynixReadRetrial
 	.section	.text.FlashProgPage,"ax",@progbits
 	.align	2
@@ -6477,25 +6471,25 @@ FlashProgPage:
 	stp	x19, x20, [sp, 16]
 	mov	w20, w1
 	stp	x21, x22, [sp, 32]
-	adrp	x1, .LANCHOR29+9
+	adrp	x1, .LANCHOR30+9
 	str	x23, [sp, 48]
 	mov	x22, x2
-	ldrb	w21, [x1, #:lo12:.LANCHOR29+9]
+	ldrb	w21, [x1, #:lo12:.LANCHOR30+9]
 	ands	w19, w0, 255
 	mov	x23, x3
-	bne	.L950
+	bne	.L951
 	adrp	x0, .LANCHOR2
 	adrp	x1, .LANCHOR3
 	ldrb	w0, [x0, #:lo12:.LANCHOR2]
 	ldr	w1, [x1, #:lo12:.LANCHOR3]
 	mul	w0, w0, w1
 	cmp	w0, w20
-	bls	.L950
+	bls	.L951
 	adrp	x0, .LANCHOR1
 	ldrb	w0, [x0, #:lo12:.LANCHOR1]
-	cbnz	w0, .L951
+	cbnz	w0, .L952
 	sub	w21, w21, #2
-.L950:
+.L951:
 	mov	w0, w19
 	bl	NandcWaitFlashReady
 	mov	w0, w19
@@ -6526,9 +6520,9 @@ FlashProgPage:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L951:
+.L952:
 	mov	w21, 4
-	b	.L950
+	b	.L951
 	.size	FlashProgPage, .-FlashProgPage
 	.section	.text.FlashSavePhyInfo,"ax",@progbits
 	.align	2
@@ -6538,30 +6532,30 @@ FlashSavePhyInfo:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR145
+	adrp	x22, .LANCHOR144
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR144
-	ldr	x0, [x22, #:lo12:.LANCHOR145]
+	adrp	x19, .LANCHOR143
+	ldr	x0, [x22, #:lo12:.LANCHOR144]
 	adrp	x21, .LANCHOR3
-	str	x0, [x19, #:lo12:.LANCHOR144]
+	str	x0, [x19, #:lo12:.LANCHOR143]
 	mov	w20, 0
-	adrp	x0, .LANCHOR150
+	adrp	x0, .LANCHOR149
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	mov	w25, 20036
-	ldrb	w0, [x0, #:lo12:.LANCHOR150]
+	ldrb	w0, [x0, #:lo12:.LANCHOR149]
 	movk	w25, 0x4e41, lsl 16
-	adrp	x24, .LANCHOR151
-	adrp	x26, .LANCHOR147
+	adrp	x24, .LANCHOR150
+	adrp	x26, .LANCHOR146
 	mov	w23, 0
 	add	x21, x21, :lo12:.LANCHOR3
-	add	x26, x26, :lo12:.LANCHOR147
+	add	x26, x26, :lo12:.LANCHOR146
 	bl	FlashBchSel
-	ldr	x0, [x22, #:lo12:.LANCHOR145]
+	ldr	x0, [x22, #:lo12:.LANCHOR144]
 	mov	w2, 2048
 	mov	w1, 0
 	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR144]
+	ldr	x0, [x19, #:lo12:.LANCHOR143]
 	adrp	x1, .LANCHOR25
 	mov	w2, 32
 	add	x0, x0, 16
@@ -6571,54 +6565,54 @@ FlashSavePhyInfo:
 	adrp	x1, .LANCHOR2
 	ldrb	w1, [x1, #:lo12:.LANCHOR2]
 	strh	w1, [x0, -2]
-	adrp	x1, .LANCHOR28
-	ldrb	w1, [x1, #:lo12:.LANCHOR28]
+	adrp	x1, .LANCHOR29
+	ldrb	w1, [x1, #:lo12:.LANCHOR29]
 	str	w1, [x0, 1060]
 	adrp	x1, .LANCHOR22
 	add	x1, x1, :lo12:.LANCHOR22
 	bl	ftl_memcpy
-	ldr	x0, [x19, #:lo12:.LANCHOR144]
+	ldr	x0, [x19, #:lo12:.LANCHOR143]
 	mov	w2, 8
 	adrp	x1, .LANCHOR26
 	add	x1, x1, :lo12:.LANCHOR26
 	add	x0, x0, 80
 	bl	ftl_memcpy
-	ldr	x0, [x19, #:lo12:.LANCHOR144]
+	ldr	x0, [x19, #:lo12:.LANCHOR143]
 	mov	w2, 32
 	adrp	x1, .LANCHOR17
 	add	x1, x1, :lo12:.LANCHOR17
 	add	x0, x0, 96
 	bl	ftl_memcpy
-	ldr	x0, [x19, #:lo12:.LANCHOR144]
+	ldr	x0, [x19, #:lo12:.LANCHOR143]
 	mov	w2, 32
-	adrp	x1, .LANCHOR29
-	add	x1, x1, :lo12:.LANCHOR29
+	adrp	x1, .LANCHOR30
+	add	x1, x1, :lo12:.LANCHOR30
 	add	x0, x0, 160
 	bl	ftl_memcpy
-	ldr	x0, [x19, #:lo12:.LANCHOR144]
+	ldr	x0, [x19, #:lo12:.LANCHOR143]
 	mov	w2, 32
 	adrp	x1, .LANCHOR7
 	add	x1, x1, :lo12:.LANCHOR7
 	add	x0, x0, 192
 	bl	ftl_memcpy
-	ldr	x0, [x19, #:lo12:.LANCHOR144]
+	ldr	x0, [x19, #:lo12:.LANCHOR143]
 	mov	w2, 852
 	adrp	x1, .LANCHOR20
 	add	x1, x1, :lo12:.LANCHOR20
 	add	x0, x0, 224
 	bl	ftl_memcpy
-	ldr	x6, [x19, #:lo12:.LANCHOR144]
+	ldr	x6, [x19, #:lo12:.LANCHOR143]
 	mov	w1, 2036
 	add	x0, x6, 12
 	bl	JSHash
 	str	w0, [x6, 8]
 	mov	w0, 1592
 	str	w0, [x6, 4]
-	ldr	x0, [x24, #:lo12:.LANCHOR151]
-	str	x0, [x19, #:lo12:.LANCHOR144]
+	ldr	x0, [x24, #:lo12:.LANCHOR150]
+	str	x0, [x19, #:lo12:.LANCHOR143]
 	mov	w0, 0
 	bl	flash_enter_slc_mode
-.L956:
+.L957:
 	ldr	w1, [x21]
 	mov	w2, 0
 	mov	w0, 0
@@ -6626,49 +6620,49 @@ FlashSavePhyInfo:
 	bl	FlashEraseBlock
 	ldr	w1, [x21]
 	mov	x3, 0
-	ldr	x2, [x22, #:lo12:.LANCHOR145]
+	ldr	x2, [x22, #:lo12:.LANCHOR144]
 	mov	w0, 0
 	mul	w1, w20, w1
 	bl	FlashProgPage
 	ldr	w1, [x21]
 	mov	x3, 0
-	ldr	x2, [x22, #:lo12:.LANCHOR145]
+	ldr	x2, [x22, #:lo12:.LANCHOR144]
 	mov	w0, 0
 	mul	w1, w20, w1
 	add	w1, w1, 1
 	bl	FlashProgPage
 	ldr	w1, [x21]
 	mov	x3, 0
-	ldr	x2, [x24, #:lo12:.LANCHOR151]
+	ldr	x2, [x24, #:lo12:.LANCHOR150]
 	mov	w0, 0
 	mul	w1, w20, w1
 	bl	FlashReadRawPage
 	cmn	w0, #1
 	add	w7, w20, 1
-	beq	.L954
-	ldr	x6, [x19, #:lo12:.LANCHOR144]
+	beq	.L955
+	ldr	x6, [x19, #:lo12:.LANCHOR143]
 	ldr	w0, [x6]
 	cmp	w0, w25
-	bne	.L954
+	bne	.L955
 	mov	w1, 2036
 	add	x0, x6, 12
 	bl	JSHash
 	ldr	w1, [x6, 8]
 	cmp	w1, w0
-	bne	.L954
+	bne	.L955
 	ldr	w0, [x21]
 	cmp	w23, 1
 	str	w7, [x26]
 	mul	w20, w0, w20
-	adrp	x0, .LANCHOR146
-	str	w20, [x0, #:lo12:.LANCHOR146]
-	beq	.L957
+	adrp	x0, .LANCHOR145
+	str	w20, [x0, #:lo12:.LANCHOR145]
+	beq	.L958
 	mov	w23, 1
-.L954:
+.L955:
 	mov	w20, w7
 	cmp	w7, 4
-	bne	.L956
-.L955:
+	bne	.L957
+.L956:
 	mov	w0, 0
 	bl	flash_exit_slc_mode
 	cmp	w23, 0
@@ -6679,9 +6673,9 @@ FlashSavePhyInfo:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L957:
+.L958:
 	mov	w23, 2
-	b	.L955
+	b	.L956
 	.size	FlashSavePhyInfo, .-FlashSavePhyInfo
 	.section	.text.FlashReadIdbDataRaw,"ax",@progbits
 	.align	2
@@ -6703,19 +6697,19 @@ FlashReadIdbDataRaw:
 	strb	w0, [x29, 138]
 	mov	w0, 16
 	strb	w0, [x29, 139]
-	adrp	x0, .LANCHOR31
+	adrp	x0, .LANCHOR32
 	stp	x19, x20, [sp, 16]
-	ldrb	w26, [x0, #:lo12:.LANCHOR31]
-	adrp	x0, .LANCHOR152
+	ldrb	w26, [x0, #:lo12:.LANCHOR32]
+	adrp	x0, .LANCHOR151
 	stp	x21, x22, [sp, 32]
-	ldr	w2, [x0, #:lo12:.LANCHOR152]
+	ldr	w2, [x0, #:lo12:.LANCHOR151]
 	stp	x27, x28, [sp, 80]
 	str	x0, [x29, 120]
 	cmp	w2, w1
-	bne	.L964
+	bne	.L965
 	mov	w0, 0
 	bl	flash_enter_slc_mode
-.L964:
+.L965:
 	adrp	x24, .LANCHOR2
 	adrp	x22, .LANCHOR3
 	add	x27, x29, 136
@@ -6727,22 +6721,22 @@ FlashReadIdbDataRaw:
 	mov	w1, 0
 	mov	x0, x23
 	bl	ftl_memset
-.L965:
+.L966:
 	ldrb	w0, [x24, #:lo12:.LANCHOR2]
 	cmp	w19, w0
-	bcc	.L970
-.L969:
+	bcc	.L971
+.L970:
 	mov	w0, w26
 	bl	FlashBchSel
 	ldr	x0, [x29, 120]
-	ldr	w1, [x0, #:lo12:.LANCHOR152]
+	ldr	w1, [x0, #:lo12:.LANCHOR151]
 	mov	w0, 12336
 	movk	w0, 0x5638, lsl 16
 	cmp	w1, w0
-	bne	.L963
+	bne	.L964
 	mov	w0, 0
 	bl	flash_exit_slc_mode
-.L963:
+.L964:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6751,45 +6745,45 @@ FlashReadIdbDataRaw:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L970:
+.L971:
 	mov	x4, 0
-	adrp	x25, .LANCHOR145
-.L967:
+	adrp	x25, .LANCHOR144
+.L968:
 	ldrb	w5, [x4, x27]
-	add	x21, x25, :lo12:.LANCHOR145
+	add	x21, x25, :lo12:.LANCHOR144
 	str	w5, [x29, 116]
 	mov	w0, w5
 	str	x4, [x29, 104]
 	bl	FlashBchSel
 	ldr	w1, [x22]
 	mov	x3, 0
-	ldr	x2, [x25, #:lo12:.LANCHOR145]
+	ldr	x2, [x25, #:lo12:.LANCHOR144]
 	mov	w0, 0
 	mul	w1, w19, w1
 	bl	FlashReadRawPage
 	cmn	w0, #1
 	ldr	w5, [x29, 116]
-	bne	.L966
+	bne	.L967
 	ldr	x4, [x29, 104]
 	add	x4, x4, 1
 	cmp	x4, 4
-	bne	.L967
-.L968:
+	bne	.L968
+.L969:
 	add	w19, w19, 1
-	b	.L965
-.L973:
+	b	.L966
+.L974:
 	mov	w20, 0
-	b	.L969
-.L966:
+	b	.L970
+.L967:
 	ldr	x0, [x21]
 	ldr	w1, [x0]
 	mov	w0, 35899
 	movk	w0, 0xfcdc, lsl 16
 	cmp	w1, w0
-	bne	.L968
+	bne	.L969
 	mov	w1, w5
-	adrp	x0, .LC12
-	add	x0, x0, :lo12:.LC12
+	adrp	x0, .LC15
+	add	x0, x0, :lo12:.LC15
 	bl	printf
 	ldr	x1, [x21]
 	mov	w2, 2048
@@ -6798,14 +6792,14 @@ FlashReadIdbDataRaw:
 	ldr	x0, [x21]
 	ldr	w0, [x0, 512]
 	strb	w0, [x28]
-	adrp	x0, .LANCHOR147
-	ldr	w1, [x0, #:lo12:.LANCHOR147]
+	adrp	x0, .LANCHOR146
+	ldr	w1, [x0, #:lo12:.LANCHOR146]
 	cmp	w19, w1
-	bcs	.L973
-	str	w19, [x0, #:lo12:.LANCHOR147]
+	bcs	.L974
+	str	w19, [x0, #:lo12:.LANCHOR146]
 	mov	w20, 0
 	bl	FlashSavePhyInfo
-	b	.L968
+	b	.L969
 	.size	FlashReadIdbDataRaw, .-FlashReadIdbDataRaw
 	.section	.text.FlashPageProgMsbFFData,"ax",@progbits
 	.align	2
@@ -6826,56 +6820,56 @@ FlashPageProgMsbFFData:
 	stp	x23, x24, [sp, 48]
 	str	x25, [sp, 64]
 	ldrb	w0, [x0, 19]
-	cbz	w3, .L977
-	adrp	x2, .LANCHOR152
-	ldr	w3, [x2, #:lo12:.LANCHOR152]
+	cbz	w3, .L978
+	adrp	x2, .LANCHOR151
+	ldr	w3, [x2, #:lo12:.LANCHOR151]
 	mov	w2, 12336
 	movk	w2, 0x5638, lsl 16
 	cmp	w3, w2
-	beq	.L976
-.L977:
+	beq	.L977
+.L978:
 	sub	w0, w0, #5
 	and	w0, w0, 255
 	cmp	w0, 63
-	bhi	.L976
+	bhi	.L977
 	mov	x2, 16391
 	movk	x2, 0x4000, lsl 16
 	movk	x2, 0x8000, lsl 48
 	lsr	x0, x2, x0
-	tbz	x0, 0, .L976
+	tbz	x0, 0, .L977
 	adrp	x20, .LANCHOR117
 	mov	w24, w1
 	add	x20, x20, :lo12:.LANCHOR117
 	mov	w23, 65535
-	adrp	x25, .LANCHOR151
-.L979:
+	adrp	x25, .LANCHOR150
+.L980:
 	ldr	x0, [x22, #:lo12:.LANCHOR18]
 	ldrh	w0, [x0, 10]
 	cmp	w0, w19
-	bhi	.L980
-.L976:
+	bhi	.L981
+.L977:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L980:
+.L981:
 	ldrh	w0, [x20, w19, sxtw 1]
 	cmp	w0, w23
-	bne	.L976
-	ldr	x0, [x25, #:lo12:.LANCHOR151]
+	bne	.L977
+	ldr	x0, [x25, #:lo12:.LANCHOR150]
 	mov	w2, 32768
 	mov	w1, 255
 	bl	ftl_memset
-	ldr	x2, [x25, #:lo12:.LANCHOR151]
+	ldr	x2, [x25, #:lo12:.LANCHOR150]
 	add	w1, w19, w24
 	add	w19, w19, 1
 	mov	x3, 0
 	mov	w0, w21
 	and	w19, w19, 65535
 	bl	FlashProgPage
-	b	.L979
+	b	.L980
 	.size	FlashPageProgMsbFFData, .-FlashPageProgMsbFFData
 	.section	.text.ftl_memcmp,"ax",@progbits
 	.align	2
@@ -6911,33 +6905,38 @@ NandcInit:
 	stp	x29, x30, [sp, -16]!
 	adrp	x2, .LANCHOR6
 	add	x1, x2, :lo12:.LANCHOR6
+	adrp	x4, .LANCHOR151
 	add	x29, sp, 0
 	str	x0, [x2, #:lo12:.LANCHOR6]
 	mov	w2, 1
 	str	w2, [x1, 24]
 	mov	w2, 2
-	str	x0, [x1, 16]
-	str	x0, [x1, 32]
-	str	x0, [x1, 48]
+	str	wzr, [x1, 8]
 	str	w2, [x1, 40]
 	mov	w2, 3
-	str	wzr, [x1, 8]
+	str	x0, [x1, 16]
 	str	w2, [x1, 56]
+	adrp	x2, .LANCHOR152
+	str	x0, [x1, 32]
+	str	x0, [x1, 48]
 	adrp	x1, .LANCHOR19
-	adrp	x2, .LANCHOR153
 	str	x0, [x1, #:lo12:.LANCHOR19]
 	ldr	w1, [x0]
 	ubfx	x3, x1, 13, 1
-	str	w3, [x2, #:lo12:.LANCHOR153]
+	str	w3, [x2, #:lo12:.LANCHOR152]
 	ldr	w2, [x0, 352]
-	adrp	x3, .LANCHOR32
+	adrp	x3, .LANCHOR33
 	and	w1, w1, 245760
 	orr	w1, w1, 256
 	ubfx	x2, x2, 16, 4
-	str	w2, [x3, #:lo12:.LANCHOR32]
-	adrp	x2, .LANCHOR152
-	ldr	w3, [x0, 352]
-	str	w3, [x2, #:lo12:.LANCHOR152]
+	str	w2, [x3, #:lo12:.LANCHOR33]
+	ldr	w2, [x0, 352]
+	str	w2, [x4, #:lo12:.LANCHOR151]
+	cmp	w2, 2049
+	bne	.L990
+	mov	w2, 8
+	str	w2, [x3, #:lo12:.LANCHOR33]
+.L990:
 	str	w1, [x0]
 	mov	w1, 4225
 	str	wzr, [x0, 336]
@@ -6949,17 +6948,17 @@ NandcInit:
 	str	w1, [x0, 304]
 	mov	w0, 36864
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR154
-	adrp	x2, .LANCHOR33
-	str	x0, [x1, #:lo12:.LANCHOR154]
-	add	x1, x2, :lo12:.LANCHOR33
-	str	x0, [x2, #:lo12:.LANCHOR33]
+	adrp	x1, .LANCHOR153
+	adrp	x2, .LANCHOR34
+	str	x0, [x1, #:lo12:.LANCHOR153]
+	add	x1, x2, :lo12:.LANCHOR34
+	str	x0, [x2, #:lo12:.LANCHOR34]
 	add	x0, x0, 32768
 	str	wzr, [x1, 40]
 	str	x0, [x1, 8]
-	adrp	x0, .LANCHOR34
+	adrp	x0, .LANCHOR35
 	ldp	x29, x30, [sp], 16
-	str	wzr, [x0, #:lo12:.LANCHOR34]
+	str	wzr, [x0, #:lo12:.LANCHOR35]
 	ret
 	.size	NandcInit, .-NandcInit
 	.section	.text.FtlMemInit,"ax",@progbits
@@ -6968,24 +6967,26 @@ NandcInit:
 	.type	FtlMemInit, %function
 FtlMemInit:
 	stp	x29, x30, [sp, -64]!
-	adrp	x0, .LANCHOR137
+	adrp	x0, .LANCHOR136
 	mov	w1, 65535
 	add	x29, sp, 0
-	strh	wzr, [x0, #:lo12:.LANCHOR137]
-	adrp	x0, .LANCHOR155
+	strh	wzr, [x0, #:lo12:.LANCHOR136]
+	adrp	x0, .LANCHOR154
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR53
+	adrp	x19, .LANCHOR54
+	str	wzr, [x0, #:lo12:.LANCHOR154]
+	adrp	x0, .LANCHOR155
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR37
 	str	wzr, [x0, #:lo12:.LANCHOR155]
 	adrp	x0, .LANCHOR156
-	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR36
+	str	x23, [sp, 48]
+	adrp	x21, .LANCHOR57
 	str	wzr, [x0, #:lo12:.LANCHOR156]
 	adrp	x0, .LANCHOR157
-	str	x23, [sp, 48]
-	adrp	x21, .LANCHOR56
+	adrp	x23, .LANCHOR58
 	str	wzr, [x0, #:lo12:.LANCHOR157]
 	adrp	x0, .LANCHOR158
-	adrp	x23, .LANCHOR57
 	str	wzr, [x0, #:lo12:.LANCHOR158]
 	adrp	x0, .LANCHOR159
 	str	wzr, [x0, #:lo12:.LANCHOR159]
@@ -7001,10 +7002,10 @@ FtlMemInit:
 	str	wzr, [x0, #:lo12:.LANCHOR164]
 	adrp	x0, .LANCHOR165
 	str	wzr, [x0, #:lo12:.LANCHOR165]
+	adrp	x0, .LANCHOR79
+	str	wzr, [x0, #:lo12:.LANCHOR79]
 	adrp	x0, .LANCHOR166
 	str	wzr, [x0, #:lo12:.LANCHOR166]
-	adrp	x0, .LANCHOR78
-	str	wzr, [x0, #:lo12:.LANCHOR78]
 	adrp	x0, .LANCHOR167
 	str	wzr, [x0, #:lo12:.LANCHOR167]
 	adrp	x0, .LANCHOR168
@@ -7012,44 +7013,42 @@ FtlMemInit:
 	adrp	x0, .LANCHOR169
 	str	wzr, [x0, #:lo12:.LANCHOR169]
 	adrp	x0, .LANCHOR170
-	str	wzr, [x0, #:lo12:.LANCHOR170]
+	str	w1, [x0, #:lo12:.LANCHOR170]
 	adrp	x0, .LANCHOR171
-	str	w1, [x0, #:lo12:.LANCHOR171]
-	adrp	x0, .LANCHOR172
 	adrp	x1, .LANCHOR112
+	str	wzr, [x0, #:lo12:.LANCHOR171]
+	adrp	x0, .LANCHOR172
 	str	wzr, [x0, #:lo12:.LANCHOR172]
-	adrp	x0, .LANCHOR173
-	str	wzr, [x0, #:lo12:.LANCHOR173]
-	adrp	x0, .LANCHOR72
-	str	wzr, [x0, #:lo12:.LANCHOR72]
+	adrp	x0, .LANCHOR73
+	str	wzr, [x0, #:lo12:.LANCHOR73]
 	mov	w0, -1
 	strh	w0, [x1, #:lo12:.LANCHOR112]
 	adrp	x1, .LANCHOR113
 	strh	w0, [x1, #:lo12:.LANCHOR113]
-	adrp	x0, .LANCHOR174
+	adrp	x0, .LANCHOR173
 	mov	w1, 32
+	strh	w1, [x0, #:lo12:.LANCHOR173]
+	adrp	x0, .LANCHOR174
+	mov	w1, 128
 	strh	w1, [x0, #:lo12:.LANCHOR174]
 	adrp	x0, .LANCHOR175
-	mov	w1, 128
-	strh	w1, [x0, #:lo12:.LANCHOR175]
-	adrp	x0, .LANCHOR176
-	strh	wzr, [x0, #:lo12:.LANCHOR176]
+	strh	wzr, [x0, #:lo12:.LANCHOR175]
 	adrp	x0, .LANCHOR114
 	strh	wzr, [x0, #:lo12:.LANCHOR114]
-	adrp	x0, .LANCHOR177
-	strh	wzr, [x0, #:lo12:.LANCHOR177]
+	adrp	x0, .LANCHOR176
+	strh	wzr, [x0, #:lo12:.LANCHOR176]
 	adrp	x0, .LANCHOR116
 	strh	wzr, [x0, #:lo12:.LANCHOR116]
-	ldrh	w0, [x19, #:lo12:.LANCHOR53]
+	ldrh	w0, [x19, #:lo12:.LANCHOR54]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR109
 	str	x0, [x1, #:lo12:.LANCHOR109]
 	mov	w0, 12
-	ldrh	w1, [x19, #:lo12:.LANCHOR53]
+	ldrh	w1, [x19, #:lo12:.LANCHOR54]
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	ldrh	w19, [x22, #:lo12:.LANCHOR36]
+	ldrh	w19, [x22, #:lo12:.LANCHOR37]
 	adrp	x1, .LANCHOR111
 	str	x0, [x1, #:lo12:.LANCHOR111]
 	mov	w0, 56
@@ -7057,34 +7056,34 @@ FtlMemInit:
 	lsl	w20, w19, 2
 	mov	w0, w20
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR178
-	str	x0, [x1, #:lo12:.LANCHOR178]
+	adrp	x1, .LANCHOR177
+	str	x0, [x1, #:lo12:.LANCHOR177]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR179
-	str	x0, [x1, #:lo12:.LANCHOR179]
+	adrp	x1, .LANCHOR178
+	str	x0, [x1, #:lo12:.LANCHOR178]
 	mov	w0, w20
 	bl	ftl_malloc
 	adrp	x20, .LANCHOR107
-	adrp	x1, .LANCHOR180
-	str	x0, [x1, #:lo12:.LANCHOR180]
+	adrp	x1, .LANCHOR179
+	str	x0, [x1, #:lo12:.LANCHOR179]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR76
-	str	x0, [x1, #:lo12:.LANCHOR76]
+	adrp	x1, .LANCHOR77
+	str	x0, [x1, #:lo12:.LANCHOR77]
 	mov	w0, w19
 	bl	ftl_malloc
-	ldrh	w19, [x21, #:lo12:.LANCHOR56]
+	ldrh	w19, [x21, #:lo12:.LANCHOR57]
 	adrp	x1, .LANCHOR106
 	str	x0, [x1, #:lo12:.LANCHOR106]
-	ldrh	w0, [x22, #:lo12:.LANCHOR36]
+	ldrh	w0, [x22, #:lo12:.LANCHOR37]
 	lsl	w0, w0, 1
 	add	w0, w0, 1
 	str	w0, [x20, #:lo12:.LANCHOR107]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR79
-	str	x0, [x1, #:lo12:.LANCHOR79]
+	adrp	x1, .LANCHOR180
+	str	x0, [x1, #:lo12:.LANCHOR180]
 	mov	w0, w19
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR181
@@ -7110,11 +7109,11 @@ FtlMemInit:
 	ldr	w1, [x20, #:lo12:.LANCHOR107]
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	ldrh	w19, [x23, #:lo12:.LANCHOR57]
+	ldrh	w19, [x23, #:lo12:.LANCHOR58]
 	adrp	x1, .LANCHOR103
 	str	x0, [x1, #:lo12:.LANCHOR103]
-	ldrh	w0, [x22, #:lo12:.LANCHOR36]
-	adrp	x22, .LANCHOR63
+	ldrh	w0, [x22, #:lo12:.LANCHOR37]
+	adrp	x22, .LANCHOR64
 	mul	w19, w19, w0
 	mov	w0, w19
 	bl	ftl_malloc
@@ -7122,17 +7121,17 @@ FtlMemInit:
 	str	x0, [x1, #:lo12:.LANCHOR185]
 	lsl	w0, w19, 2
 	bl	ftl_malloc
-	adrp	x19, .LANCHOR39
+	adrp	x19, .LANCHOR40
 	adrp	x1, .LANCHOR186
 	str	x0, [x1, #:lo12:.LANCHOR186]
-	ldrh	w1, [x23, #:lo12:.LANCHOR57]
+	ldrh	w1, [x23, #:lo12:.LANCHOR58]
 	ldr	w0, [x20, #:lo12:.LANCHOR107]
 	adrp	x20, .LANCHOR187
 	mul	w0, w1, w0
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR105
 	str	x0, [x1, #:lo12:.LANCHOR105]
-	ldrh	w0, [x19, #:lo12:.LANCHOR39]
+	ldrh	w0, [x19, #:lo12:.LANCHOR40]
 	ubfiz	w0, w0, 1, 15
 	strh	w0, [x20, #:lo12:.LANCHOR187]
 	and	w0, w0, 65534
@@ -7147,15 +7146,15 @@ FtlMemInit:
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR188
 	str	x0, [x1, #:lo12:.LANCHOR188]
-	adrp	x1, .LANCHOR77
+	adrp	x1, .LANCHOR78
 	add	x0, x0, 32
-	str	x0, [x1, #:lo12:.LANCHOR77]
-	ldrh	w0, [x19, #:lo12:.LANCHOR39]
+	str	x0, [x1, #:lo12:.LANCHOR78]
+	ldrh	w0, [x19, #:lo12:.LANCHOR40]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-	ldr	w20, [x22, #:lo12:.LANCHOR63]
-	adrp	x1, .LANCHOR82
-	str	x0, [x1, #:lo12:.LANCHOR82]
+	ldr	w20, [x22, #:lo12:.LANCHOR64]
+	adrp	x1, .LANCHOR83
+	str	x0, [x1, #:lo12:.LANCHOR83]
 	lsl	w20, w20, 1
 	mov	w0, w20
 	bl	ftl_malloc
@@ -7163,42 +7162,42 @@ FtlMemInit:
 	str	x0, [x1, #:lo12:.LANCHOR126]
 	mov	w0, w20
 	bl	ftl_malloc
-	adrp	x20, .LANCHOR60
+	adrp	x20, .LANCHOR61
 	adrp	x1, .LANCHOR122
 	str	x0, [x1, #:lo12:.LANCHOR122]
-	ldrh	w0, [x19, #:lo12:.LANCHOR39]
+	ldrh	w0, [x19, #:lo12:.LANCHOR40]
 	lsr	w0, w0, 3
 	add	w0, w0, 4
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR0
 	str	x0, [x1, #:lo12:.LANCHOR0]
-	ldrh	w0, [x20, #:lo12:.LANCHOR60]
+	ldrh	w0, [x20, #:lo12:.LANCHOR61]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR70
-	str	x0, [x1, #:lo12:.LANCHOR70]
-	ldrh	w0, [x20, #:lo12:.LANCHOR60]
+	adrp	x1, .LANCHOR71
+	str	x0, [x1, #:lo12:.LANCHOR71]
+	ldrh	w0, [x20, #:lo12:.LANCHOR61]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR189
 	str	x0, [x1, #:lo12:.LANCHOR189]
-	ldrh	w0, [x20, #:lo12:.LANCHOR60]
-	adrp	x20, .LANCHOR61
+	ldrh	w0, [x20, #:lo12:.LANCHOR61]
+	adrp	x20, .LANCHOR62
 	lsl	w0, w0, 2
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR190
 	str	x0, [x1, #:lo12:.LANCHOR190]
-	ldrh	w0, [x20, #:lo12:.LANCHOR61]
+	ldrh	w0, [x20, #:lo12:.LANCHOR62]
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	ldrh	w2, [x20, #:lo12:.LANCHOR61]
+	ldrh	w2, [x20, #:lo12:.LANCHOR62]
 	adrp	x1, .LANCHOR191
 	str	x0, [x1, #:lo12:.LANCHOR191]
 	mov	w1, 0
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	adrp	x0, .LANCHOR65
-	ldrh	w20, [x0, #:lo12:.LANCHOR65]
+	adrp	x0, .LANCHOR66
+	ldrh	w20, [x0, #:lo12:.LANCHOR66]
 	lsl	w20, w20, 2
 	mov	w0, w20
 	bl	ftl_malloc
@@ -7206,80 +7205,80 @@ FtlMemInit:
 	str	x0, [x1, #:lo12:.LANCHOR128]
 	mov	w0, w20
 	bl	ftl_malloc
-	adrp	x20, .LANCHOR66
+	adrp	x20, .LANCHOR67
 	adrp	x1, .LANCHOR192
 	str	x0, [x1, #:lo12:.LANCHOR192]
-	ldr	w0, [x22, #:lo12:.LANCHOR63]
+	ldr	w0, [x22, #:lo12:.LANCHOR64]
 	lsl	w0, w0, 2
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR127
 	str	x0, [x1, #:lo12:.LANCHOR127]
-	ldrh	w0, [x20, #:lo12:.LANCHOR66]
+	ldrh	w0, [x20, #:lo12:.LANCHOR67]
 	lsl	w0, w0, 4
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR95
-	str	x0, [x1, #:lo12:.LANCHOR95]
-	ldrh	w1, [x20, #:lo12:.LANCHOR66]
-	adrp	x20, .LANCHOR43
-	ldrh	w0, [x21, #:lo12:.LANCHOR56]
+	adrp	x1, .LANCHOR96
+	str	x0, [x1, #:lo12:.LANCHOR96]
+	ldrh	w1, [x20, #:lo12:.LANCHOR67]
+	adrp	x20, .LANCHOR44
+	ldrh	w0, [x21, #:lo12:.LANCHOR57]
 	mul	w0, w1, w0
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR123
 	str	x0, [x1, #:lo12:.LANCHOR123]
 	mov	w0, 6
-	ldrh	w1, [x19, #:lo12:.LANCHOR39]
+	ldrh	w1, [x19, #:lo12:.LANCHOR40]
 	adrp	x19, .LANCHOR120
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR80
-	str	x0, [x1, #:lo12:.LANCHOR80]
-	adrp	x0, .LANCHOR49
-	ldrh	w1, [x20, #:lo12:.LANCHOR43]
-	ldrh	w0, [x0, #:lo12:.LANCHOR49]
+	adrp	x1, .LANCHOR81
+	str	x0, [x1, #:lo12:.LANCHOR81]
+	adrp	x0, .LANCHOR50
+	ldrh	w1, [x20, #:lo12:.LANCHOR44]
+	ldrh	w0, [x0, #:lo12:.LANCHOR50]
 	add	w0, w0, 31
 	asr	w0, w0, 5
 	strh	w0, [x19, #:lo12:.LANCHOR120]
 	mul	w0, w1, w0
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR73
+	adrp	x1, .LANCHOR74
 	ldrh	w5, [x19, #:lo12:.LANCHOR120]
-	add	x2, x1, :lo12:.LANCHOR73
-	ldrh	w7, [x20, #:lo12:.LANCHOR43]
+	add	x2, x1, :lo12:.LANCHOR74
+	ldrh	w7, [x20, #:lo12:.LANCHOR44]
 	add	x6, x2, 40
 	mov	w3, w5
 	str	x0, [x2, 32]
 	mov	x0, 1
-.L991:
+.L993:
 	cmp	w0, w7
-	bcc	.L992
+	bcc	.L994
 	mov	w2, 8
 	sub	w2, w2, w0
 	add	x2, x2, 1
-	add	x1, x1, :lo12:.LANCHOR73
+	add	x1, x1, :lo12:.LANCHOR74
 	mov	x3, 0
-.L993:
+.L995:
 	add	x3, x3, 1
 	cmp	x2, x3
-	bne	.L994
+	bne	.L996
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L992:
+.L994:
 	ldr	x4, [x2, 32]
 	add	w0, w0, 1
 	add	x4, x4, x3, uxtw 2
 	add	w3, w3, w5
 	str	x4, [x6], 8
-	b	.L991
-.L994:
+	b	.L993
+.L996:
 	add	x4, x0, x3
 	add	x4, x1, x4, lsl 3
 	str	xzr, [x4, 24]
-	b	.L993
+	b	.L995
 	.size	FtlMemInit, .-FtlMemInit
 	.section	.text.ftl_free,"ax",@progbits
 	.align	2
@@ -7321,6 +7320,28 @@ StorageSysDataStore:
 	mov	w0, 16
 	b	FtlWrite
 	.size	StorageSysDataStore, .-StorageSysDataStore
+	.section	.text.FlashBootVendorRead,"ax",@progbits
+	.align	2
+	.global	FlashBootVendorRead
+	.type	FlashBootVendorRead, %function
+FlashBootVendorRead:
+	mov	x3, x2
+	mov	w1, w0
+	mov	w2, 1
+	mov	w0, 16
+	b	FtlRead
+	.size	FlashBootVendorRead, .-FlashBootVendorRead
+	.section	.text.FlashBootVendorWrite,"ax",@progbits
+	.align	2
+	.global	FlashBootVendorWrite
+	.type	FlashBootVendorWrite, %function
+FlashBootVendorWrite:
+	mov	x3, x2
+	mov	w1, w0
+	mov	w2, 1
+	mov	w0, 16
+	b	FtlWrite
+	.size	FlashBootVendorWrite, .-FlashBootVendorWrite
 	.section	.text.FlashCs123Init,"ax",@progbits
 	.align	2
 	.global	FlashCs123Init
@@ -7340,8 +7361,8 @@ rk_nand_de_init:
 	.global	rk_ftl_get_capacity
 	.type	rk_ftl_get_capacity, %function
 rk_ftl_get_capacity:
-	adrp	x0, .LANCHOR67
-	ldr	w0, [x0, #:lo12:.LANCHOR67]
+	adrp	x0, .LANCHOR68
+	ldr	w0, [x0, #:lo12:.LANCHOR68]
 	ret
 	.size	rk_ftl_get_capacity, .-rk_ftl_get_capacity
 	.section	.text.rknand_print_hex,"ax",@progbits
@@ -7352,67 +7373,67 @@ rknand_print_hex:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LC14
+	adrp	x21, .LC17
 	stp	x23, x24, [sp, 48]
 	mov	x22, x1
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LC13
+	adrp	x23, .LC16
 	mov	x26, x0
 	mov	w24, w2
 	uxtw	x25, w3
-	add	x23, x23, :lo12:.LC13
-	add	x21, x21, :lo12:.LC14
+	add	x23, x23, :lo12:.LC16
+	add	x21, x21, :lo12:.LC17
 	stp	x19, x20, [sp, 16]
 	str	x27, [sp, 80]
 	mov	x19, 0
 	mov	w20, 0
-	adrp	x27, .LC15
-.L1004:
+	adrp	x27, .LC18
+.L1008:
 	cmp	x25, x19
-	bne	.L1010
+	bne	.L1014
 	ldp	x19, x20, [sp, 16]
-	adrp	x1, .LC15
+	adrp	x1, .LC18
 	ldp	x21, x22, [sp, 32]
-	add	x1, x1, :lo12:.LC15
+	add	x1, x1, :lo12:.LC18
 	ldp	x23, x24, [sp, 48]
-	adrp	x0, .LC6
+	adrp	x0, .LC8
 	ldp	x25, x26, [sp, 64]
-	add	x0, x0, :lo12:.LC6
+	add	x0, x0, :lo12:.LC8
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	printf
-.L1010:
-	cbnz	w20, .L1005
+.L1014:
+	cbnz	w20, .L1009
 	mov	w2, w19
 	mov	x1, x26
 	mov	x0, x23
 	bl	printf
-.L1005:
+.L1009:
 	cmp	w24, 4
-	bne	.L1006
+	bne	.L1010
 	ldr	w1, [x22, x19, lsl 2]
-.L1012:
+.L1016:
 	mov	x0, x21
 	add	w20, w20, 1
 	bl	printf
 	cmp	w20, 15
-	bls	.L1009
+	bls	.L1013
 	mov	w20, 0
-	add	x1, x27, :lo12:.LC15
-	adrp	x0, .LC6
-	add	x0, x0, :lo12:.LC6
+	add	x1, x27, :lo12:.LC18
+	adrp	x0, .LC8
+	add	x0, x0, :lo12:.LC8
 	bl	printf
-.L1009:
+.L1013:
 	add	x19, x19, 1
-	b	.L1004
-.L1006:
+	b	.L1008
+.L1010:
 	cmp	w24, 2
-	bne	.L1008
+	bne	.L1012
 	ldrsh	w1, [x22, x19, lsl 1]
-	b	.L1012
-.L1008:
+	b	.L1016
+.L1012:
 	ldrb	w1, [x22, x19]
-	b	.L1012
+	b	.L1016
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.HynixGetReadRetryDefault,"ax",@progbits
 	.align	2
@@ -7439,18 +7460,18 @@ HynixGetReadRetryDefault:
 	strb	w4, [x0, 5]
 	strb	w3, [x0, 6]
 	strb	w1, [x0, 7]
-	bne	.L1014
+	bne	.L1018
 	mov	w1, -89
 	strb	w1, [x0, 4]
 	adrp	x0, .LANCHOR193+17
 	mov	w1, -9
 	strb	w1, [x0, #:lo12:.LANCHOR193+17]
-.L1070:
+.L1074:
 	mov	w27, 7
-	b	.L1105
-.L1014:
+	b	.L1109
+.L1018:
 	cmp	w26, 3
-	bne	.L1016
+	bne	.L1020
 	mov	w1, -80
 	strb	w1, [x0, 4]
 	mov	w1, -79
@@ -7466,14 +7487,14 @@ HynixGetReadRetryDefault:
 	mov	w1, -74
 	strb	w1, [x0, 10]
 	mov	w1, -73
-.L1106:
+.L1110:
 	mov	w27, 8
 	mov	w28, w27
 	strb	w1, [x0, 11]
-.L1015:
+.L1019:
 	sub	w0, w26, #1
 	cmp	w0, 1
-	bhi	.L1020
+	bhi	.L1024
 	adrp	x26, .LANCHOR25
 	adrp	x0, .LANCHOR26
 	adrp	x25, .LANCHOR6
@@ -7481,11 +7502,11 @@ HynixGetReadRetryDefault:
 	add	x4, x0, :lo12:.LANCHOR26
 	add	x25, x25, :lo12:.LANCHOR6
 	mov	w24, 0
-.L1021:
+.L1025:
 	ldrb	w0, [x26]
 	cmp	w0, w24
-	bhi	.L1027
-.L1028:
+	bhi	.L1031
+.L1032:
 	add	x20, x20, :lo12:.LANCHOR20
 	ldp	x21, x22, [sp, 32]
 	strb	w28, [x20, 1]
@@ -7496,9 +7517,9 @@ HynixGetReadRetryDefault:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1016:
+.L1020:
 	cmp	w26, 4
-	bne	.L1017
+	bne	.L1021
 	mov	w5, -52
 	strb	w5, [x0, 4]
 	mov	w5, -65
@@ -7511,10 +7532,10 @@ HynixGetReadRetryDefault:
 	mov	w5, -51
 	strb	w3, [x0, 10]
 	strb	w5, [x0, 8]
-	b	.L1106
-.L1017:
+	b	.L1110
+.L1021:
 	cmp	w26, 5
-	bne	.L1018
+	bne	.L1022
 	mov	w1, 56
 	strb	w1, [x0, 4]
 	mov	w1, 57
@@ -7524,12 +7545,12 @@ HynixGetReadRetryDefault:
 	strb	w1, [x0, 6]
 	mov	w1, 59
 	strb	w1, [x0, 7]
-.L1105:
+.L1109:
 	mov	w28, 4
-	b	.L1015
-.L1018:
+	b	.L1019
+.L1022:
 	cmp	w26, 6
-	bne	.L1019
+	bne	.L1023
 	mov	w1, 14
 	strb	w1, [x0, 4]
 	mov	w1, 15
@@ -7539,10 +7560,10 @@ HynixGetReadRetryDefault:
 	strb	w1, [x0, 6]
 	mov	w1, 17
 	strb	w1, [x0, 7]
-	b	.L1105
-.L1019:
+	b	.L1109
+.L1023:
 	cmp	w26, 7
-	bne	.L1070
+	bne	.L1074
 	mov	w1, -80
 	strb	w1, [x0, 4]
 	mov	w1, -79
@@ -7565,8 +7586,8 @@ HynixGetReadRetryDefault:
 	mov	w28, 10
 	mov	w1, -43
 	strb	w1, [x0, 13]
-	b	.L1015
-.L1027:
+	b	.L1019
+.L1031:
 	ldrb	w1, [x4, w24, sxtw]
 	add	x0, x20, :lo12:.LANCHOR20
 	mov	x21, x0
@@ -7580,7 +7601,7 @@ HynixGetReadRetryDefault:
 	ldrb	w23, [x2, 8]
 	add	x23, x1, x23, lsl 8
 	mov	w1, 55
-.L1022:
+.L1026:
 	add	x0, x21, x22
 	str	w1, [x23, 2056]
 	str	x4, [x29, 128]
@@ -7595,15 +7616,15 @@ HynixGetReadRetryDefault:
 	cmp	w28, w22, uxtb
 	ldr	w1, [x29, 140]
 	ldr	x4, [x29, 128]
-	bhi	.L1022
+	bhi	.L1026
 	adrp	x2, .LANCHOR193
 	add	x2, x2, :lo12:.LANCHOR193
 	mov	x0, 0
-.L1025:
+.L1029:
 	add	x7, x19, x0
 	add	x6, x2, x0
 	mov	x1, 1
-.L1024:
+.L1028:
 	lsl	x3, x1, 2
 	lsl	x8, x1, 3
 	ldrb	w10, [x19, x0]
@@ -7612,10 +7633,10 @@ HynixGetReadRetryDefault:
 	ldrb	w3, [x6, x3]
 	add	w3, w3, w10
 	strb	w3, [x7, x8]
-	bne	.L1024
+	bne	.L1028
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L1025
+	bne	.L1029
 	add	w24, w24, 1
 	strb	wzr, [x19, 16]
 	strb	wzr, [x19, 24]
@@ -7625,11 +7646,11 @@ HynixGetReadRetryDefault:
 	strb	wzr, [x19, 48]
 	strb	wzr, [x19, 41]
 	strb	wzr, [x19, 49]
-	b	.L1021
-.L1020:
+	b	.L1025
+.L1024:
 	sub	w0, w26, #3
 	cmp	w0, 4
-	bhi	.L1028
+	bhi	.L1032
 	mul	w24, w27, w28
 	adrp	x25, .LANCHOR25
 	sub	w22, w28, #1
@@ -7646,11 +7667,11 @@ HynixGetReadRetryDefault:
 	str	x0, [x29, 120]
 	add	x0, x22, 1
 	str	x0, [x29, 112]
-.L1029:
+.L1033:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, w21
-	bls	.L1028
+	bls	.L1032
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w22, [x0, w21, sxtw]
@@ -7667,37 +7688,37 @@ HynixGetReadRetryDefault:
 	bl	NandcWaitFlashReady
 	add	x1, x20, :lo12:.LANCHOR20
 	cmp	w26, 7
-	beq	.L1030
+	beq	.L1034
 	ubfiz	x0, x22, 6, 8
 	add	x0, x0, 20
-.L1107:
+.L1111:
 	add	x3, x1, x0
 	mov	w0, 54
 	str	w0, [x19, 2056]
 	cmp	w26, 4
-	bne	.L1032
+	bne	.L1036
 	mov	w0, 255
 	str	w0, [x19, 2052]
 	mov	w0, 64
 	str	w0, [x19, 2048]
 	mov	w0, 204
-.L1108:
+.L1112:
 	str	w0, [x19, 2052]
 	mov	w0, 77
-	b	.L1109
-.L1030:
+	b	.L1113
+.L1034:
 	mov	x3, 28
 	mov	w0, 160
 	umaddl	x0, w0, w22, x3
-	b	.L1107
-.L1032:
+	b	.L1111
+.L1036:
 	cmp	w25, 1
-	bhi	.L1034
+	bhi	.L1038
 	add	x0, x20, :lo12:.LANCHOR20
 	ldrb	w0, [x0, 4]
 	str	w0, [x19, 2052]
 	mov	w0, 82
-.L1109:
+.L1113:
 	str	w0, [x19, 2048]
 	mov	w0, 22
 	str	w0, [x19, 2056]
@@ -7711,10 +7732,10 @@ HynixGetReadRetryDefault:
 	str	wzr, [x19, 2056]
 	str	wzr, [x19, 2052]
 	str	wzr, [x19, 2052]
-	bne	.L1035
+	bne	.L1039
 	mov	w0, 31
 	str	w0, [x19, 2052]
-.L1036:
+.L1040:
 	mov	w7, 2
 	str	w7, [x19, 2052]
 	str	wzr, [x19, 2052]
@@ -7726,187 +7747,187 @@ HynixGetReadRetryDefault:
 	bl	NandcWaitFlashReady
 	cmp	w25, 1
 	ldr	x3, [x29, 104]
-	bls	.L1071
+	bls	.L1075
 	ldr	w7, [x29, 136]
 	cmp	w26, 7
 	mov	w1, 32
 	csel	w1, w1, w7, eq
-.L1037:
-	adrp	x8, .LANCHOR145
+.L1041:
+	adrp	x8, .LANCHOR144
 	mov	x7, 0
-	ldr	x0, [x8, #:lo12:.LANCHOR145]
-.L1038:
+	ldr	x0, [x8, #:lo12:.LANCHOR144]
+.L1042:
 	ldr	w10, [x19, 2048]
 	strb	w10, [x0, x7]
 	add	x7, x7, 1
 	cmp	w1, w7, uxtb
-	bhi	.L1038
+	bhi	.L1042
 	cmp	w26, 7
-	bne	.L1039
+	bne	.L1043
 	mov	w1, 0
-.L1041:
+.L1045:
 	ldrb	w7, [x0]
 	cmp	w7, 12
-	beq	.L1040
+	beq	.L1044
 	ldrb	w7, [x0, 1]
 	cmp	w7, 10
-	beq	.L1040
+	beq	.L1044
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 255
 	cmp	w1, 8
-	bne	.L1041
-.L1042:
-	adrp	x0, .LC16
+	bne	.L1045
+.L1046:
+	adrp	x0, .LC19
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC16
+	add	x0, x0, :lo12:.LC19
 	bl	printf
-.L1044:
-	b	.L1044
-.L1034:
+.L1048:
+	b	.L1048
+.L1038:
 	mov	w0, 174
 	str	w0, [x19, 2052]
 	str	wzr, [x19, 2048]
 	mov	w0, 176
-	b	.L1108
-.L1035:
+	b	.L1112
+.L1039:
 	str	wzr, [x19, 2052]
-	b	.L1036
-.L1071:
+	b	.L1040
+.L1075:
 	mov	w1, 16
-	b	.L1037
-.L1040:
+	b	.L1041
+.L1044:
 	cmp	w1, 6
-	bhi	.L1042
-.L1043:
-	ldr	x7, [x8, #:lo12:.LANCHOR145]
+	bhi	.L1046
+.L1047:
+	ldr	x7, [x8, #:lo12:.LANCHOR144]
 	mov	x0, 0
-.L1048:
+.L1052:
 	ldr	w1, [x29, 128]
 	cmp	w1, w0
-	bgt	.L1049
-	ldr	x1, [x8, #:lo12:.LANCHOR145]
+	bgt	.L1053
+	ldr	x1, [x8, #:lo12:.LANCHOR144]
 	mov	w10, 8
 	add	x8, x1, x24
-.L1051:
+.L1055:
 	mov	x0, 0
-.L1050:
+.L1054:
 	ldr	w11, [x8, x0, lsl 2]
 	mvn	w11, w11
 	str	w11, [x8, x0, lsl 2]
 	add	x0, x0, 1
 	cmp	w23, w0
-	bgt	.L1050
+	bgt	.L1054
 	ldr	w0, [x29, 140]
 	subs	w10, w10, #1
 	add	x8, x8, x0, uxtw 2
-	bne	.L1051
+	bne	.L1055
 	mov	x11, x1
 	mov	w12, 0
 	mov	w16, 1
-.L1057:
+.L1061:
 	mov	w8, 0
 	mov	w0, 0
-.L1056:
+.L1060:
 	mov	x15, x11
 	lsl	w10, w16, w0
 	mov	w14, 16
 	mov	w13, 0
-.L1054:
+.L1058:
 	ldr	w17, [x15]
 	add	x15, x15, x24
 	bics	wzr, w10, w17
 	cinc	w13, w13, eq
 	subs	w14, w14, #1
-	bne	.L1054
+	bne	.L1058
 	cmp	w13, 9
 	orr	w10, w8, w10
 	add	w0, w0, 1
 	csel	w8, w10, w8, cs
 	cmp	w0, 32
-	bne	.L1056
+	bne	.L1060
 	str	w8, [x11], 4
 	add	w12, w12, 1
 	cmp	w23, w12
-	bgt	.L1057
+	bgt	.L1061
 	mov	x0, 0
 	mov	w8, 0
-.L1060:
+.L1064:
 	ldr	w10, [x1, x0]
 	add	x0, x0, 4
 	cmp	w10, 0
 	cinc	w8, w8, eq
 	cmp	x0, 32
-	bne	.L1060
+	bne	.L1064
 	cmp	w8, 7
-	ble	.L1061
+	ble	.L1065
 	mov	w3, 1024
 	mov	w2, 1
-	adrp	x0, .LC17
-	add	x0, x0, :lo12:.LC17
+	adrp	x0, .LC20
+	add	x0, x0, :lo12:.LC20
 	bl	rknand_print_hex
-	adrp	x0, .LC16
+	adrp	x0, .LC19
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC16
+	add	x0, x0, :lo12:.LC19
 	bl	printf
-.L1062:
-	b	.L1062
-.L1039:
+.L1066:
+	b	.L1066
+.L1043:
 	cmp	w26, 6
-	bne	.L1043
+	bne	.L1047
 	mov	x1, 0
-.L1045:
+.L1049:
 	ldrb	w7, [x0, x1]
 	cmp	w7, 12
-	beq	.L1043
+	beq	.L1047
 	add	x7, x0, x1
 	ldrb	w7, [x7, 8]
 	cmp	w7, 4
-	beq	.L1043
+	beq	.L1047
 	add	x1, x1, 1
 	cmp	x1, 8
-	bne	.L1045
-	adrp	x0, .LC16
+	bne	.L1049
+	adrp	x0, .LC19
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC16
+	add	x0, x0, :lo12:.LC19
 	bl	printf
-.L1047:
-	b	.L1047
-.L1049:
+.L1051:
+	b	.L1051
+.L1053:
 	ldr	w1, [x19, 2048]
 	strb	w1, [x7, x0]
 	add	x0, x0, 1
-	b	.L1048
-.L1061:
+	b	.L1052
+.L1065:
 	cmp	w26, 6
-	beq	.L1073
+	beq	.L1077
 	cmp	w26, 7
 	mov	x1, 8
 	mov	x0, 10
 	csel	x0, x0, x1, eq
-.L1063:
+.L1067:
 	mov	x1, x3
 	mov	w8, 0
-.L1064:
+.L1068:
 	mov	x3, 0
-.L1065:
+.L1069:
 	ldrb	w10, [x7, x3]
 	strb	w10, [x1, x3]
 	add	x3, x3, 1
 	cmp	w28, w3, uxtb
-	bhi	.L1065
+	bhi	.L1069
 	ldr	x2, [x29, 112]
 	add	w8, w8, 1
 	add	x1, x1, x0
 	cmp	w27, w8
 	add	x7, x7, x2
-	bgt	.L1064
+	bgt	.L1068
 	mov	w0, 255
 	str	w0, [x19, 2056]
 	mov	w0, w22
 	bl	NandcWaitFlashReady
 	cmp	w25, 1
-	bhi	.L1067
+	bhi	.L1071
 	mov	w0, 54
 	str	w0, [x19, 2056]
 	adrp	x0, .LANCHOR20+4
@@ -7918,19 +7939,19 @@ HynixGetReadRetryDefault:
 	str	w0, [x19, 2056]
 	mov	w0, w21
 	bl	FlashReadCmd
-.L1068:
+.L1072:
 	add	w21, w21, 1
 	mov	w0, w22
 	and	w21, w21, 255
 	bl	NandcWaitFlashReady
-	b	.L1029
-.L1073:
+	b	.L1033
+.L1077:
 	mov	x0, 4
-	b	.L1063
-.L1067:
+	b	.L1067
+.L1071:
 	mov	w0, 56
 	str	w0, [x19, 2056]
-	b	.L1068
+	b	.L1072
 	.size	HynixGetReadRetryDefault, .-HynixGetReadRetryDefault
 	.section	.text.FlashGetReadRetryDefault,"ax",@progbits
 	.align	2
@@ -7938,14 +7959,14 @@ HynixGetReadRetryDefault:
 	.type	FlashGetReadRetryDefault, %function
 FlashGetReadRetryDefault:
 	mov	w1, w0
-	cbz	w0, .L1110
+	cbz	w0, .L1114
 	sub	w2, w0, #1
 	cmp	w2, 6
-	bhi	.L1112
+	bhi	.L1116
 	b	HynixGetReadRetryDefault
-.L1112:
+.L1116:
 	cmp	w0, 49
-	bne	.L1113
+	bne	.L1117
 	adrp	x2, .LANCHOR20
 	add	x0, x2, :lo12:.LANCHOR20
 	strb	w1, [x2, #:lo12:.LANCHOR20]
@@ -7956,41 +7977,41 @@ FlashGetReadRetryDefault:
 	adrp	x1, .LANCHOR14
 	add	x1, x1, :lo12:.LANCHOR14
 	mov	w2, 64
-.L1122:
+.L1126:
 	add	x0, x0, 4
 	b	ftl_memcpy
-.L1113:
+.L1117:
 	sub	w0, w0, #65
 	cmp	w1, 33
 	ccmp	w0, 1, 0, ne
-	bhi	.L1114
+	bhi	.L1118
 	adrp	x2, .LANCHOR20
 	add	x0, x2, :lo12:.LANCHOR20
 	strb	w1, [x2, #:lo12:.LANCHOR20]
 	mov	w1, 4
-.L1123:
+.L1127:
 	strb	w1, [x0, 1]
 	mov	w1, 7
 	mov	w2, 45
 	strb	w1, [x0, 2]
 	adrp	x1, .LANCHOR10
 	add	x1, x1, :lo12:.LANCHOR10
-	b	.L1122
-.L1114:
+	b	.L1126
+.L1118:
 	cmp	w1, 34
 	mov	w0, 67
 	ccmp	w1, w0, 4, ne
-	bne	.L1115
+	bne	.L1119
 	adrp	x2, .LANCHOR20
 	add	x0, x2, :lo12:.LANCHOR20
 	strb	w1, [x2, #:lo12:.LANCHOR20]
 	mov	w1, 5
-	b	.L1123
-.L1115:
+	b	.L1127
+.L1119:
 	cmp	w1, 35
 	mov	w0, 68
 	ccmp	w1, w0, 4, ne
-	bne	.L1110
+	bne	.L1114
 	adrp	x2, .LANCHOR20
 	add	x0, x2, :lo12:.LANCHOR20
 	strb	w1, [x2, #:lo12:.LANCHOR20]
@@ -8001,8 +8022,8 @@ FlashGetReadRetryDefault:
 	strb	w1, [x0, 2]
 	adrp	x1, .LANCHOR9
 	add	x1, x1, :lo12:.LANCHOR9
-	b	.L1122
-.L1110:
+	b	.L1126
+.L1114:
 	ret
 	.size	FlashGetReadRetryDefault, .-FlashGetReadRetryDefault
 	.section	.text.FlashInit,"ax",@progbits
@@ -8019,22 +8040,22 @@ FlashInit:
 	stp	x23, x24, [sp, 48]
 	adrp	x23, .LANCHOR2
 	stp	x25, x26, [sp, 64]
-	adrp	x24, .LANCHOR150
+	adrp	x24, .LANCHOR149
 	stp	x27, x28, [sp, 80]
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR145
-	adrp	x21, .LANCHOR28
+	adrp	x1, .LANCHOR144
+	adrp	x21, .LANCHOR29
 	adrp	x22, .LANCHOR1
 	adrp	x20, .LANCHOR22
-	str	x0, [x1, #:lo12:.LANCHOR145]
+	str	x0, [x1, #:lo12:.LANCHOR144]
 	mov	w0, 32768
 	bl	ftl_malloc
 	adrp	x25, .LANCHOR6
-	adrp	x1, .LANCHOR151
+	adrp	x1, .LANCHOR150
 	add	x25, x25, :lo12:.LANCHOR6
-	adrp	x26, .LC18
+	adrp	x26, .LC21
 	mov	w28, 0
-	str	x0, [x1, #:lo12:.LANCHOR151]
+	str	x0, [x1, #:lo12:.LANCHOR150]
 	mov	w0, 4096
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR194
@@ -8045,30 +8066,30 @@ FlashInit:
 	str	x0, [x1, #:lo12:.LANCHOR195]
 	mov	w0, 4096
 	bl	ftl_malloc
-	strb	wzr, [x21, #:lo12:.LANCHOR28]
+	strb	wzr, [x21, #:lo12:.LANCHOR29]
 	adrp	x1, .LANCHOR196
 	strb	wzr, [x22, #:lo12:.LANCHOR1]
 	str	x0, [x1, #:lo12:.LANCHOR196]
-	adrp	x1, .LANCHOR148
+	adrp	x1, .LANCHOR147
 	mov	w0, 50
 	strb	w0, [x23, #:lo12:.LANCHOR2]
-	strb	w0, [x1, #:lo12:.LANCHOR148]
-	adrp	x0, .LANCHOR147
+	strb	w0, [x1, #:lo12:.LANCHOR147]
+	adrp	x0, .LANCHOR146
 	mov	w1, 128
-	str	wzr, [x0, #:lo12:.LANCHOR147]
+	str	wzr, [x0, #:lo12:.LANCHOR146]
 	adrp	x0, .LANCHOR3
 	str	w1, [x0, #:lo12:.LANCHOR3]
-	adrp	x0, .LANCHOR142
-	str	wzr, [x0, #:lo12:.LANCHOR142]
+	adrp	x0, .LANCHOR141
+	str	wzr, [x0, #:lo12:.LANCHOR141]
 	mov	w0, 60
-	strb	w0, [x24, #:lo12:.LANCHOR150]
+	strb	w0, [x24, #:lo12:.LANCHOR149]
 	mov	x0, x19
 	add	x19, x20, :lo12:.LANCHOR22
 	bl	NandcInit
 	mov	x27, x19
-	add	x0, x26, :lo12:.LC18
+	add	x0, x26, :lo12:.LC21
 	str	x0, [x29, 104]
-.L1129:
+.L1133:
 	and	w26, w28, 255
 	mov	w0, w26
 	bl	FlashReset
@@ -8103,7 +8124,7 @@ FlashInit:
 	sub	w0, w2, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bhi	.L1125
+	bhi	.L1129
 	ldrb	w7, [x19, 5]
 	add	w1, w28, 1
 	ldrb	w6, [x19, 4]
@@ -8112,99 +8133,99 @@ FlashInit:
 	ldrb	w3, [x19, 1]
 	ldr	x0, [x29, 104]
 	bl	printf
-.L1125:
-	cbnz	w28, .L1126
+.L1129:
+	cbnz	w28, .L1130
 	ldrb	w0, [x27]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bhi	.L1167
+	bhi	.L1171
 	ldrb	w0, [x27, 1]
 	cmp	w0, 255
-	beq	.L1167
-.L1126:
+	beq	.L1171
+.L1130:
 	ldrb	w0, [x19]
 	cmp	w0, 181
-	bne	.L1128
+	bne	.L1132
 	mov	w0, 44
 	strb	w0, [x19]
-.L1128:
+.L1132:
 	add	w28, w28, 1
 	add	x25, x25, 16
 	add	x19, x19, 8
 	cmp	w28, 4
-	bne	.L1129
+	bne	.L1133
 	ldrb	w0, [x20, #:lo12:.LANCHOR22]
 	cmp	w0, 173
-	beq	.L1130
-	adrp	x0, .LANCHOR153
-	ldr	w0, [x0, #:lo12:.LANCHOR153]
+	beq	.L1134
+	adrp	x0, .LANCHOR152
+	ldr	w0, [x0, #:lo12:.LANCHOR152]
 	bl	NandcSetDdrMode
-.L1130:
+.L1134:
 	mov	w2, 852
 	adrp	x26, .LANCHOR20
 	mov	w1, 0
 	add	x0, x26, :lo12:.LANCHOR20
 	adrp	x19, .LANCHOR18
 	bl	ftl_memset
-	adrp	x28, .LANCHOR29
-	add	x0, x28, :lo12:.LANCHOR29
+	adrp	x28, .LANCHOR30
+	add	x0, x28, :lo12:.LANCHOR30
 	str	x0, [x19, #:lo12:.LANCHOR18]
 	add	x0, x20, :lo12:.LANCHOR22
 	adrp	x27, .LANCHOR5
 	ldrb	w2, [x0, 1]
 	strb	wzr, [x27, #:lo12:.LANCHOR5]
 	cmp	w2, 161
-	beq	.L1131
+	beq	.L1135
 	cmp	w2, 218
-	beq	.L1131
+	beq	.L1135
 	and	w1, w2, -33
 	cmp	w1, 209
-	beq	.L1131
+	beq	.L1135
 	cmp	w2, 220
-	bne	.L1132
+	bne	.L1136
 	ldrb	w0, [x0, 3]
 	cmp	w0, 149
-	bne	.L1132
-.L1131:
+	bne	.L1136
+.L1135:
 	mov	w0, 1
 	adrp	x25, .LANCHOR197
 	add	x1, x25, :lo12:.LANCHOR197
 	strb	w0, [x22, #:lo12:.LANCHOR1]
 	mov	w0, 16
 	strb	w0, [x23, #:lo12:.LANCHOR2]
-	strb	w0, [x24, #:lo12:.LANCHOR150]
+	strb	w0, [x24, #:lo12:.LANCHOR149]
 	add	x3, x20, :lo12:.LANCHOR22
 	ldrb	w0, [x20, #:lo12:.LANCHOR22]
 	strb	w0, [x1, 1]
 	strb	w2, [x1, 2]
 	cmp	w0, 152
-	bne	.L1133
+	bne	.L1137
 	ldrsb	w0, [x3, 4]
-	tbnz	w0, #31, .L1133
+	tbnz	w0, #31, .L1137
 	mov	w0, 24
-	strb	w0, [x24, #:lo12:.LANCHOR150]
-.L1133:
-	adrp	x0, .LANCHOR152
-	ldr	w1, [x0, #:lo12:.LANCHOR152]
+	strb	w0, [x24, #:lo12:.LANCHOR149]
+.L1137:
+	adrp	x0, .LANCHOR151
+	ldr	w1, [x0, #:lo12:.LANCHOR151]
 	mov	w0, 12336
 	movk	w0, 0x5638, lsl 16
 	cmp	w1, w0
-	bne	.L1134
+	bne	.L1138
 	mov	w0, 16
-	strb	w0, [x24, #:lo12:.LANCHOR150]
-.L1134:
+	strb	w0, [x24, #:lo12:.LANCHOR149]
+.L1138:
 	cmp	w2, 218
-	bne	.L1135
+	bne	.L1139
 	add	x0, x25, :lo12:.LANCHOR197
 	mov	w1, 2048
 	strh	w1, [x0, 14]
 	mov	w1, -38
-.L1202:
+.L1206:
 	strb	w1, [x0, 2]
-.L1136:
-	adrp	x1, .LANCHOR141
-	add	x1, x1, :lo12:.LANCHOR141
+.L1140:
+	adrp	x1, .LANCHOR140
+	add	x1, x1, :lo12:.LANCHOR140
 	mov	w2, 32
 	add	x1, x1, 32
 	adrp	x0, .LANCHOR7
@@ -8212,39 +8233,39 @@ FlashInit:
 	bl	ftl_memcpy
 	mov	w2, 32
 	add	x1, x25, :lo12:.LANCHOR197
-	add	x0, x28, :lo12:.LANCHOR29
+	add	x0, x28, :lo12:.LANCHOR30
 	bl	ftl_memcpy
-.L1132:
+.L1136:
 	ldrb	w0, [x22, #:lo12:.LANCHOR1]
 	adrp	x25, .LANCHOR8
-	cbnz	w0, .L1138
+	cbnz	w0, .L1142
 	bl	FlashLoadPhyInfoInRam
-	cbnz	w0, .L1140
+	cbnz	w0, .L1144
 	ldr	x0, [x19, #:lo12:.LANCHOR18]
 	adrp	x24, .LANCHOR24
 	ldrb	w1, [x0, 17]
 	and	w0, w1, 7
 	strb	w0, [x24, #:lo12:.LANCHOR24]
-	tbnz	x1, 0, .L1140
+	tbnz	x1, 0, .L1144
 	mov	w1, 1
-	strb	w1, [x21, #:lo12:.LANCHOR28]
+	strb	w1, [x21, #:lo12:.LANCHOR29]
 	bl	FlashSetInterfaceMode
 	ldrb	w0, [x24, #:lo12:.LANCHOR24]
 	bl	NandcSetMode
-.L1140:
+.L1144:
 	ldr	x0, [x19, #:lo12:.LANCHOR18]
 	ldrb	w0, [x0, 26]
 	strb	w0, [x25, #:lo12:.LANCHOR8]
 	bl	FlashLoadPhyInfo
-	cbz	w0, .L1138
+	cbz	w0, .L1142
 	ldr	x0, [x19, #:lo12:.LANCHOR18]
 	ldrh	w1, [x0, 14]
-	adrp	x0, .LC19
-	add	x0, x0, :lo12:.LC19
+	adrp	x0, .LC22
+	add	x0, x0, :lo12:.LC22
 	bl	printf
 	bl	FlashLoadPhyInfoInRam
 	cmn	w0, #1
-	beq	.L1124
+	beq	.L1128
 	bl	FlashDieInfoInit
 	ldr	x0, [x19, #:lo12:.LANCHOR18]
 	ldrb	w0, [x0, 19]
@@ -8255,28 +8276,28 @@ FlashInit:
 	ldrb	w2, [x0, 9]
 	add	w1, w1, 4095
 	cmp	w2, w1, lsr 12
-	blt	.L1143
+	blt	.L1147
 	ldrh	w1, [x0, 14]
 	add	w1, w1, 255
 	cmp	w2, w1, lsr 8
-	bge	.L1144
-.L1143:
+	bge	.L1148
+.L1147:
 	ldrh	w1, [x0, 14]
 	and	w1, w1, -256
 	strh	w1, [x0, 14]
-.L1144:
+.L1148:
 	adrp	x0, .LANCHOR24
 	ldrb	w0, [x0, #:lo12:.LANCHOR24]
 	tst	w0, 6
-	beq	.L1145
+	beq	.L1149
 	bl	FlashSavePhyInfo
-	adrp	x0, .LANCHOR146
-	ldr	w1, [x0, #:lo12:.LANCHOR146]
+	adrp	x0, .LANCHOR145
+	ldr	w1, [x0, #:lo12:.LANCHOR145]
 	mov	w0, 0
 	bl	FlashDdrParaScan
-.L1145:
+.L1149:
 	bl	FlashSavePhyInfo
-.L1138:
+.L1142:
 	ldr	x2, [x19, #:lo12:.LANCHOR18]
 	adrp	x24, .LANCHOR24
 	ldrb	w0, [x2, 26]
@@ -8286,7 +8307,7 @@ FlashInit:
 	strb	w1, [x27, #:lo12:.LANCHOR5]
 	adrp	x1, .LANCHOR198
 	ubfx	x3, x0, 3, 1
-	adrp	x27, .LANCHOR143
+	adrp	x27, .LANCHOR142
 	strb	w3, [x1, #:lo12:.LANCHOR198]
 	adrp	x1, .LANCHOR27
 	ubfx	x3, x0, 4, 1
@@ -8295,14 +8316,14 @@ FlashInit:
 	strb	w0, [x24, #:lo12:.LANCHOR24]
 	ldrh	w1, [x2, 10]
 	ldrb	w0, [x2, 12]
-	str	xzr, [x27, #:lo12:.LANCHOR143]
+	str	xzr, [x27, #:lo12:.LANCHOR142]
 	sdiv	w1, w1, w0
 	ldrb	w0, [x2, 18]
 	bl	BuildFlashLsbPageTable
 	bl	FlashDieInfoInit
 	ldr	x0, [x19, #:lo12:.LANCHOR18]
 	ldrh	w1, [x0, 16]
-	tbz	x1, 6, .L1147
+	tbz	x1, 6, .L1151
 	adrp	x1, .LANCHOR11
 	ldrb	w0, [x0, 19]
 	adrp	x3, .LANCHOR13
@@ -8310,83 +8331,83 @@ FlashInit:
 	add	x1, x26, :lo12:.LANCHOR20
 	ldrb	w2, [x1, 1]
 	strb	w2, [x3, #:lo12:.LANCHOR13]
-	adrp	x2, .LANCHOR149
+	adrp	x2, .LANCHOR148
 	ldrb	w4, [x1, 2]
-	strb	w4, [x2, #:lo12:.LANCHOR149]
+	strb	w4, [x2, #:lo12:.LANCHOR148]
 	sub	w4, w0, #1
 	and	w4, w4, 255
 	cmp	w4, 6
 	mov	x4, x3
-	bhi	.L1148
+	bhi	.L1152
 	adrp	x2, HynixReadRetrial
 	add	x2, x2, :lo12:HynixReadRetrial
-	str	x2, [x27, #:lo12:.LANCHOR143]
+	str	x2, [x27, #:lo12:.LANCHOR142]
 	sub	w2, w0, #5
 	and	w2, w2, 255
 	cmp	w2, 1
-	bhi	.L1149
-	adrp	x2, .LANCHOR34
+	bhi	.L1153
+	adrp	x2, .LANCHOR35
 	add	x1, x1, 20
 	mov	w3, 1
-	str	w3, [x2, #:lo12:.LANCHOR34]
-.L1150:
+	str	w3, [x2, #:lo12:.LANCHOR35]
+.L1154:
 	mov	x2, 0
 	mov	w3, 0
-.L1152:
+.L1156:
 	ldrsb	w4, [x1, x2]
 	add	x2, x2, 1
 	cmp	w4, 0
 	cinc	w3, w3, eq
 	cmp	x2, 32
-	bne	.L1152
+	bne	.L1156
 	cmp	w3, 27
-	bls	.L1147
+	bls	.L1151
 	bl	FlashGetReadRetryDefault
 	bl	FlashSavePhyInfo
-.L1147:
-	adrp	x0, .LANCHOR152
-	ldr	w1, [x0, #:lo12:.LANCHOR152]
+.L1151:
+	adrp	x0, .LANCHOR151
+	ldr	w1, [x0, #:lo12:.LANCHOR151]
 	mov	w0, 12336
 	movk	w0, 0x5638, lsl 16
 	cmp	w1, w0
-	bne	.L1161
+	bne	.L1165
 	ldrb	w0, [x25, #:lo12:.LANCHOR8]
-	cbz	w0, .L1161
+	cbz	w0, .L1165
 	ldr	x0, [x19, #:lo12:.LANCHOR18]
 	strb	wzr, [x0, 18]
-.L1161:
+.L1165:
 	ldrb	w0, [x20, #:lo12:.LANCHOR22]
 	cmp	w0, 44
-	bne	.L1162
-	ldrb	w0, [x21, #:lo12:.LANCHOR28]
-	cbz	w0, .L1162
-	strb	wzr, [x21, #:lo12:.LANCHOR28]
+	bne	.L1166
+	ldrb	w0, [x21, #:lo12:.LANCHOR29]
+	cbz	w0, .L1166
+	strb	wzr, [x21, #:lo12:.LANCHOR29]
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
 	bl	NandcSetMode
-.L1162:
+.L1166:
 	mov	w0, 0
 	bl	flash_enter_slc_mode
 	ldrb	w0, [x24, #:lo12:.LANCHOR24]
 	tst	w0, 6
-	beq	.L1163
-	ldrb	w1, [x21, #:lo12:.LANCHOR28]
-	cbnz	w1, .L1164
-	tbnz	x0, 0, .L1163
-.L1164:
-	adrp	x0, .LANCHOR146
-	ldr	w1, [x0, #:lo12:.LANCHOR146]
+	beq	.L1167
+	ldrb	w1, [x21, #:lo12:.LANCHOR29]
+	cbnz	w1, .L1168
+	tbnz	x0, 0, .L1167
+.L1168:
+	adrp	x0, .LANCHOR145
+	ldr	w1, [x0, #:lo12:.LANCHOR145]
 	mov	w0, 0
 	bl	FlashDdrParaScan
-.L1163:
+.L1167:
 	mov	w0, 0
 	bl	flash_exit_slc_mode
 	ldr	x0, [x19, #:lo12:.LANCHOR18]
 	ldrb	w0, [x0, 20]
 	bl	FlashBchSel
-	adrp	x0, .LANCHOR139
-	add	x0, x0, :lo12:.LANCHOR139
+	adrp	x0, .LANCHOR138
+	add	x0, x0, :lo12:.LANCHOR138
 	bl	FlashReadIdbDataRaw
 	ldr	x2, [x19, #:lo12:.LANCHOR18]
 	mov	w0, 16
@@ -8422,7 +8443,7 @@ FlashInit:
 	strh	w1, [x0, 22]
 	ldrb	w5, [x22, #:lo12:.LANCHOR1]
 	cmp	w5, 1
-	bne	.L1165
+	bne	.L1169
 	ubfiz	w1, w1, 1, 15
 	lsr	w4, w4, 1
 	ubfiz	w3, w3, 1, 15
@@ -8431,11 +8452,11 @@ FlashInit:
 	mov	w1, 8
 	strh	w3, [x0, 20]
 	strh	w1, [x0, 26]
-.L1165:
+.L1169:
 	ldrb	w0, [x2, 20]
 	bl	FlashBchSel
 	mov	w0, 0
-.L1124:
+.L1128:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -8443,90 +8464,90 @@ FlashInit:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1135:
+.L1139:
 	cmp	w2, 220
-	bne	.L1136
+	bne	.L1140
 	add	x0, x25, :lo12:.LANCHOR197
 	mov	w1, 4096
 	strh	w1, [x0, 14]
 	mov	w1, -36
-	b	.L1202
-.L1149:
+	b	.L1206
+.L1153:
 	add	x2, x1, 20
 	cmp	w0, 7
 	add	x1, x1, 28
 	csel	x1, x1, x2, eq
-	b	.L1150
-.L1148:
+	b	.L1154
+.L1152:
 	sub	w1, w0, #17
 	and	w1, w1, 255
 	cmp	w1, 2
-	bhi	.L1154
+	bhi	.L1158
 	adrp	x1, MicronReadRetrial
 	add	x1, x1, :lo12:MicronReadRetrial
-	str	x1, [x27, #:lo12:.LANCHOR143]
+	str	x1, [x27, #:lo12:.LANCHOR142]
 	cmp	w0, 19
-	beq	.L1155
-.L1206:
+	beq	.L1159
+.L1210:
 	mov	w0, 7
-	b	.L1204
-.L1155:
+	b	.L1208
+.L1159:
 	mov	w0, 15
-.L1204:
-	strb	w0, [x2, #:lo12:.LANCHOR149]
-	b	.L1147
-.L1154:
+.L1208:
+	strb	w0, [x2, #:lo12:.LANCHOR148]
+	b	.L1151
+.L1158:
 	sub	w1, w0, #65
 	cmp	w0, 33
 	and	w1, w1, 255
 	ccmp	w1, 1, 0, ne
-	bhi	.L1156
+	bhi	.L1160
 	adrp	x0, ToshibaReadRetrial
 	add	x0, x0, :lo12:ToshibaReadRetrial
-	str	x0, [x27, #:lo12:.LANCHOR143]
+	str	x0, [x27, #:lo12:.LANCHOR142]
 	mov	w0, 4
 	strb	w0, [x3, #:lo12:.LANCHOR13]
-	b	.L1206
-.L1156:
+	b	.L1210
+.L1160:
 	sub	w3, w0, #34
 	sub	w1, w0, #67
 	and	w3, w3, 255
 	and	w1, w1, 255
 	cmp	w3, 1
 	ccmp	w1, 1, 0, hi
-	bhi	.L1157
+	bhi	.L1161
 	adrp	x3, ToshibaReadRetrial
 	add	x3, x3, :lo12:ToshibaReadRetrial
-	str	x3, [x27, #:lo12:.LANCHOR143]
+	str	x3, [x27, #:lo12:.LANCHOR142]
 	cmp	w0, 35
 	mov	w3, 68
 	ccmp	w0, w3, 4, ne
-	beq	.L1158
+	beq	.L1162
 	mov	w0, 7
-.L1203:
-	strb	w0, [x2, #:lo12:.LANCHOR149]
+.L1207:
+	strb	w0, [x2, #:lo12:.LANCHOR148]
 	cmp	w1, 1
-	bhi	.L1160
+	bhi	.L1164
 	mov	w0, 4
-.L1205:
+.L1209:
 	strb	w0, [x4, #:lo12:.LANCHOR13]
-	b	.L1147
-.L1158:
+	b	.L1151
+.L1162:
 	mov	w0, 17
-	b	.L1203
-.L1160:
+	b	.L1207
+.L1164:
 	mov	w0, 5
-	b	.L1205
-.L1157:
+	b	.L1209
+.L1161:
 	cmp	w0, 49
-	bne	.L1147
+	bne	.L1151
 	adrp	x0, SamsungReadRetrial
 	add	x0, x0, :lo12:SamsungReadRetrial
-	str	x0, [x27, #:lo12:.LANCHOR143]
-	b	.L1147
-.L1167:
+	str	x0, [x27, #:lo12:.LANCHOR142]
+	b	.L1151
+.L1171:
 	mov	w0, -2
-	b	.L1124
+	b	.L1128
 	.size	FlashInit, .-FlashInit
 	.section	.text.FlashReadSlc2KPages,"ax",@progbits
 	.align	2
@@ -8539,21 +8560,21 @@ FlashReadSlc2KPages:
 	mov	w22, 56
 	stp	x25, x26, [sp, 64]
 	mov	w25, w2
-	adrp	x2, .LANCHOR29+9
+	adrp	x2, .LANCHOR30+9
 	stp	x23, x24, [sp, 48]
 	nop // between mem op and mult-accumulate
 	umaddl	x22, w1, w22, x0
 	stp	x19, x20, [sp, 16]
-	ldrb	w24, [x2, #:lo12:.LANCHOR29+9]
+	ldrb	w24, [x2, #:lo12:.LANCHOR30+9]
 	adrp	x23, .LANCHOR25
 	mov	x19, x0
 	and	w21, w1, 255
 	add	x23, x23, :lo12:.LANCHOR25
 	adrp	x26, .LANCHOR26
 	str	x27, [sp, 80]
-.L1208:
+.L1212:
 	cmp	x22, x19
-	bne	.L1220
+	bne	.L1224
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -8562,7 +8583,7 @@ FlashReadSlc2KPages:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1220:
+.L1224:
 	mov	w1, w25
 	mov	w4, w21
 	add	x3, x29, 104
@@ -8572,15 +8593,15 @@ FlashReadSlc2KPages:
 	ldrb	w1, [x23]
 	ldr	w0, [x29, 104]
 	cmp	w1, w0
-	bhi	.L1209
+	bhi	.L1213
 	mov	w0, -1
 	str	w0, [x19]
-.L1210:
+.L1214:
 	sub	w21, w21, #1
 	add	x19, x19, 56
 	and	w21, w21, 255
-	b	.L1208
-.L1209:
+	b	.L1212
+.L1213:
 	add	x1, x26, :lo12:.LANCHOR26
 	ldrb	w27, [x1, w0, uxtw]
 	mov	w0, w27
@@ -8620,53 +8641,53 @@ FlashReadSlc2KPages:
 	mov	w0, w27
 	bl	NandcFlashDeCs
 	cmp	w20, w2
-	adrp	x1, .LANCHOR31
+	adrp	x1, .LANCHOR32
 	csel	w0, w20, w2, cs
-	ldrb	w2, [x1, #:lo12:.LANCHOR31]
+	ldrb	w2, [x1, #:lo12:.LANCHOR32]
 	add	w1, w2, w2, lsl 1
 	cmp	w0, w1, lsr 2
-	bls	.L1213
+	bls	.L1217
 	cmn	w0, #1
 	mov	w1, 256
 	csel	w0, w0, w1, eq
-.L1213:
+.L1217:
 	cmp	w0, 256
 	ccmn	w0, #1, 4, ne
 	csel	w0, w0, wzr, eq
 	str	w0, [x19]
 	ldr	x0, [x19, 16]
-	cbz	x0, .L1216
+	cbz	x0, .L1220
 	ldr	w1, [x0, 8]
 	cmn	w1, #1
-	bne	.L1216
+	bne	.L1220
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L1216
+	beq	.L1220
 	str	w1, [x19]
-.L1216:
+.L1220:
 	ldr	w3, [x19]
 	cmn	w3, #1
-	bne	.L1210
+	bne	.L1214
 	ldr	w1, [x19, 4]
-	adrp	x0, .LC20
-	add	x0, x0, :lo12:.LC20
+	adrp	x0, .LC23
+	add	x0, x0, :lo12:.LC23
 	bl	printf
 	ldr	x1, [x19, 8]
-	cbz	x1, .L1218
-	adrp	x0, .LC21
+	cbz	x1, .L1222
+	adrp	x0, .LC24
 	mov	w3, 8
 	mov	w2, 4
-	add	x0, x0, :lo12:.LC21
+	add	x0, x0, :lo12:.LC24
 	bl	rknand_print_hex
-.L1218:
+.L1222:
 	ldr	x1, [x19, 16]
-	cbz	x1, .L1210
+	cbz	x1, .L1214
 	mov	w3, 4
-	adrp	x0, .LC22
+	adrp	x0, .LC25
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC22
+	add	x0, x0, :lo12:.LC25
 	bl	rknand_print_hex
-	b	.L1210
+	b	.L1214
 	.size	FlashReadSlc2KPages, .-FlashReadSlc2KPages
 	.section	.text.FlashReadPages,"ax",@progbits
 	.align	2
@@ -8683,12 +8704,12 @@ FlashReadPages:
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	stp	w2, w1, [x29, 148]
-	cbnz	w3, .L1239
+	cbnz	w3, .L1243
 	mov	x25, x0
-	adrp	x0, .LANCHOR29+9
+	adrp	x0, .LANCHOR30+9
 	adrp	x27, .LANCHOR20
 	mov	w23, 0
-	ldrb	w0, [x0, #:lo12:.LANCHOR29+9]
+	ldrb	w0, [x0, #:lo12:.LANCHOR30+9]
 	mov	w22, 0
 	str	w0, [x29, 156]
 	adrp	x0, .LANCHOR5
@@ -8699,15 +8720,15 @@ FlashReadPages:
 	str	x0, [x29, 104]
 	add	x0, x0, 4
 	str	x0, [x29, 96]
-.L1240:
+.L1244:
 	ldr	w0, [x29, 152]
 	cmp	w22, w0
-	bcc	.L1274
+	bcc	.L1278
 	mov	w0, 0
-	b	.L1238
-.L1239:
+	b	.L1242
+.L1243:
 	bl	FlashReadSlc2KPages
-.L1238:
+.L1242:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -8715,7 +8736,7 @@ FlashReadPages:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1274:
+.L1278:
 	mov	w26, 56
 	add	x3, x29, 168
 	ldp	w1, w0, [x29, 148]
@@ -8731,13 +8752,13 @@ FlashReadPages:
 	ldr	w1, [x29, 168]
 	ldrb	w0, [x0, #:lo12:.LANCHOR25]
 	cmp	w0, w1
-	bhi	.L1242
+	bhi	.L1246
 	mov	w0, -1
 	str	w0, [x25, x26]
-.L1243:
+.L1247:
 	add	w22, w22, 1
-	b	.L1240
-.L1242:
+	b	.L1244
+.L1246:
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w19, [x0, w1, uxtw]
@@ -8754,65 +8775,65 @@ FlashReadPages:
 	sub	w0, w2, #1
 	and	w0, w0, 255
 	cmp	w0, 6
-	bhi	.L1245
+	bhi	.L1249
 	add	x0, x27, :lo12:.LANCHOR20
 	sxtw	x1, w19
 	add	x0, x0, x1
 	cmp	w2, 7
 	ldrb	w3, [x0, 12]
-	bne	.L1246
+	bne	.L1250
 	ldrb	w3, [x0, 20]
-.L1246:
+.L1250:
 	adrp	x0, .LANCHOR21
 	add	x0, x0, :lo12:.LANCHOR21
 	ldrb	w0, [x0, x1]
 	cmp	w0, w3
-	beq	.L1245
+	beq	.L1249
 	ldp	x2, x0, [x29, 96]
 	ldrb	w1, [x0, 1]
 	mov	w0, w19
 	bl	HynixSetRRPara
-.L1245:
+.L1249:
 	mov	w0, w19
 	bl	NandcFlashCs
 	ldr	w0, [x29, 148]
 	cmp	w0, 1
 	cset	w0, eq
 	orr	w24, w0, w24, lsr 31
-	cbz	w24, .L1247
+	cbz	w24, .L1251
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L1247
+	cbz	w0, .L1251
 	mov	w0, w19
 	bl	flash_enter_slc_mode
-.L1248:
+.L1252:
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
 	str	x0, [x29, 112]
 	ldr	x0, [x29, 128]
 	add	x0, x0, :lo12:.LANCHOR5
 	str	x0, [x29, 136]
-.L1254:
+.L1258:
 	ldr	w1, [x29, 172]
 	cmn	w1, #1
-	bne	.L1249
+	bne	.L1253
 	cmp	w19, 255
-	beq	.L1276
-.L1249:
-	cbz	w20, .L1251
+	beq	.L1280
+.L1253:
+	cbz	w20, .L1255
 	ldr	x0, [x29, 112]
 	ldr	w2, [x0]
 	mov	w0, w19
 	add	w2, w1, w2
 	bl	FlashReadDpCmd
-.L1252:
+.L1256:
 	mov	w0, w19
 	bl	NandcWaitFlashReady
-	cbz	w20, .L1250
+	cbz	w20, .L1254
 	ldr	w1, [x29, 172]
 	mov	w0, w19
 	bl	FlashReadDpDataOutCmd
-.L1250:
+.L1254:
 	ldrb	w2, [x29, 156]
 	mov	w1, 0
 	ldp	x3, x4, [x21, 8]
@@ -8821,26 +8842,26 @@ FlashReadPages:
 	mov	w28, w0
 	ldr	x0, [x29, 136]
 	ldrb	w0, [x0]
-	cbz	w0, .L1253
+	cbz	w0, .L1257
 	cmn	w28, #1
-	bne	.L1253
+	bne	.L1257
 	ldr	x0, [x29, 136]
 	mov	w20, 0
 	strb	wzr, [x0]
-	b	.L1254
-.L1247:
+	b	.L1258
+.L1251:
 	mov	w0, w19
 	bl	flash_exit_slc_mode
-	b	.L1248
-.L1251:
+	b	.L1252
+.L1255:
 	mov	w0, w19
 	bl	FlashReadCmd
-	b	.L1252
-.L1276:
+	b	.L1256
+.L1280:
 	mov	w20, 0
-	b	.L1250
-.L1253:
-	cbz	w20, .L1255
+	b	.L1254
+.L1257:
+	cbz	w20, .L1259
 	adrp	x0, .LANCHOR3
 	ldr	w1, [x29, 172]
 	ldr	w0, [x0, #:lo12:.LANCHOR3]
@@ -8859,27 +8880,27 @@ FlashReadPages:
 	cmn	w0, #1
 	mov	w23, w0
 	csel	w20, w20, wzr, ne
-.L1255:
+.L1259:
 	mov	w0, w19
 	bl	NandcFlashDeCs
 	ldr	x0, [x29, 128]
 	cmn	w28, #1
 	ldrb	w1, [x29, 144]
 	strb	w1, [x0, #:lo12:.LANCHOR5]
-	bne	.L1256
-	adrp	x0, .LANCHOR28
-	ldrb	w0, [x0, #:lo12:.LANCHOR28]
-	cbnz	w0, .L1257
-.L1261:
-	adrp	x20, .LANCHOR143
-	ldr	x4, [x20, #:lo12:.LANCHOR143]
-	cbnz	x4, .L1258
+	bne	.L1260
+	adrp	x0, .LANCHOR29
+	ldrb	w0, [x0, #:lo12:.LANCHOR29]
+	cbnz	w0, .L1261
+.L1265:
+	adrp	x20, .LANCHOR142
+	ldr	x4, [x20, #:lo12:.LANCHOR142]
+	cbnz	x4, .L1262
 	ldr	w1, [x29, 172]
 	mov	w0, w19
 	ldp	x2, x3, [x21, 8]
 	bl	FlashReadRawPage
-	b	.L1313
-.L1257:
+	b	.L1317
+.L1261:
 	adrp	x0, .LANCHOR19
 	ldr	w1, [x29, 172]
 	ldp	x2, x3, [x21, 8]
@@ -8890,62 +8911,62 @@ FlashReadPages:
 	bl	FlashDdrTunningRead
 	mov	w28, w0
 	cmn	w0, #1
-	beq	.L1260
-	adrp	x0, .LANCHOR31
-	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	beq	.L1264
+	adrp	x0, .LANCHOR32
+	ldrb	w0, [x0, #:lo12:.LANCHOR32]
 	cmp	w28, w0, lsr 1
-	bls	.L1277
-.L1260:
+	bls	.L1281
+.L1264:
 	lsr	w0, w20, 8
 	bl	NandcSetDdrPara
 	cmn	w28, #1
-	beq	.L1261
-.L1277:
+	beq	.L1265
+.L1281:
 	mov	w20, 0
-.L1256:
-	adrp	x0, .LANCHOR31
-	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+.L1260:
+	adrp	x0, .LANCHOR32
+	ldrb	w0, [x0, #:lo12:.LANCHOR32]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bls	.L1262
-	adrp	x0, .LANCHOR143
-	ldr	x0, [x0, #:lo12:.LANCHOR143]
+	bls	.L1266
+	adrp	x0, .LANCHOR142
+	ldr	x0, [x0, #:lo12:.LANCHOR142]
 	cmp	x0, 0
 	mov	w0, 256
 	csel	w28, w28, w0, ne
-.L1262:
+.L1266:
 	cmp	w28, 256
 	ccmn	w28, #1, 4, ne
 	csel	w3, w28, wzr, eq
 	str	w3, [x25, x26]
 	cmn	w3, #1
-	bne	.L1269
-	adrp	x0, .LANCHOR31
+	bne	.L1273
+	adrp	x0, .LANCHOR32
 	ldr	w1, [x21, 4]
-	ldrb	w2, [x0, #:lo12:.LANCHOR31]
-	adrp	x0, .LC20
-	add	x0, x0, :lo12:.LC20
+	ldrb	w2, [x0, #:lo12:.LANCHOR32]
+	adrp	x0, .LC23
+	add	x0, x0, :lo12:.LC23
 	bl	printf
 	ldr	x1, [x21, 16]
-	cbz	x1, .L1269
+	cbz	x1, .L1273
 	mov	w3, 4
-	adrp	x0, .LC22
+	adrp	x0, .LC25
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC22
+	add	x0, x0, :lo12:.LC25
 	bl	rknand_print_hex
-.L1269:
-	cbz	w20, .L1271
-	adrp	x0, .LANCHOR31
-	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+.L1273:
+	cbz	w20, .L1275
+	adrp	x0, .LANCHOR32
+	ldrb	w0, [x0, #:lo12:.LANCHOR32]
 	add	w0, w0, w0, lsl 1
 	cmp	w23, w0, lsr 2
-	bls	.L1272
-	adrp	x0, .LANCHOR143
-	ldr	x0, [x0, #:lo12:.LANCHOR143]
+	bls	.L1276
+	adrp	x0, .LANCHOR142
+	ldr	x0, [x0, #:lo12:.LANCHOR142]
 	cmp	x0, 0
 	mov	w0, 256
 	csel	w23, w23, w0, ne
-.L1272:
+.L1276:
 	add	w0, w22, 1
 	mov	w1, 56
 	cmp	w23, 256
@@ -8953,71 +8974,71 @@ FlashReadPages:
 	umull	x0, w0, w1
 	csel	w1, w23, wzr, eq
 	str	w1, [x25, x0]
-.L1271:
+.L1275:
 	add	w22, w22, w20
-	cbz	w24, .L1243
+	cbz	w24, .L1247
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L1243
+	cbz	w0, .L1247
 	mov	w0, w19
 	bl	flash_exit_slc_mode
-	b	.L1243
-.L1258:
+	b	.L1247
+.L1262:
 	ldr	w1, [x29, 172]
 	mov	w0, w19
 	ldp	x2, x3, [x21, 8]
 	blr	x4
 	mov	w28, w0
 	cmn	w0, #1
-	bne	.L1280
+	bne	.L1284
 	ldr	x0, [x29, 120]
 	ldr	x0, [x0, #:lo12:.LANCHOR18]
 	ldrb	w0, [x0, 19]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 6
-	bhi	.L1263
+	bhi	.L1267
 	add	x0, x27, :lo12:.LANCHOR20
 	mov	w3, 0
 	add	x2, x0, 4
 	ldrb	w1, [x0, 1]
 	mov	w0, w19
 	bl	HynixSetRRPara
-.L1263:
+.L1267:
 	ldp	x2, x3, [x21, 8]
 	mov	w0, w19
 	ldr	w1, [x29, 172]
 	bl	FlashReadRawPage
 	mov	w28, w0
 	mov	w3, w0
-	adrp	x0, .LANCHOR31
+	adrp	x0, .LANCHOR32
 	ldr	w1, [x21, 4]
-	ldrb	w2, [x0, #:lo12:.LANCHOR31]
-	adrp	x0, .LC23
-	add	x0, x0, :lo12:.LC23
-	bl	printf
+	ldrb	w2, [x0, #:lo12:.LANCHOR32]
+	adrp	x0, .LC26
+	add	x0, x0, :lo12:.LC26
+	bl	printf
 	cmn	w28, #1
-	bne	.L1280
+	bne	.L1284
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L1280
+	cbz	w0, .L1284
 	mov	w0, w19
-	cbz	w24, .L1264
+	cbz	w24, .L1268
 	bl	flash_enter_slc_mode
-.L1265:
-	ldr	x4, [x20, #:lo12:.LANCHOR143]
+.L1269:
+	ldr	x4, [x20, #:lo12:.LANCHOR142]
 	mov	w0, w19
 	ldr	w1, [x29, 172]
 	ldp	x2, x3, [x21, 8]
 	blr	x4
-.L1313:
+.L1317:
 	mov	w28, w0
-.L1280:
+.L1284:
 	mov	w20, 0
-	b	.L1262
-.L1264:
+	b	.L1266
+.L1268:
 	bl	flash_exit_slc_mode
-	b	.L1265
+	b	.L1269
 	.size	FlashReadPages, .-FlashReadPages
 	.section	.text.FlashProgSlc2KPages,"ax",@progbits
 	.align	2
@@ -9029,13 +9050,13 @@ FlashProgSlc2KPages:
 	stp	x23, x24, [sp, 48]
 	mov	w24, w2
 	mov	w23, 56
-	adrp	x2, .LANCHOR29+9
+	adrp	x2, .LANCHOR30+9
 	stp	x21, x22, [sp, 32]
 	and	w21, w1, 255
 	stp	x25, x26, [sp, 64]
 	nop // between mem op and mult-accumulate
 	umaddl	x23, w1, w23, x0
-	ldrb	w25, [x2, #:lo12:.LANCHOR29+9]
+	ldrb	w25, [x2, #:lo12:.LANCHOR30+9]
 	adrp	x26, .LANCHOR3
 	stp	x27, x28, [sp, 80]
 	mov	w22, w21
@@ -9044,12 +9065,12 @@ FlashProgSlc2KPages:
 	mov	x20, x0
 	add	x28, x26, :lo12:.LANCHOR3
 	str	w3, [x29, 108]
-.L1315:
+.L1319:
 	cmp	x20, x23
-	bne	.L1321
+	bne	.L1325
 	ldr	w0, [x29, 108]
-	cbnz	w0, .L1322
-.L1341:
+	cbnz	w0, .L1326
+.L1345:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -9058,7 +9079,7 @@ FlashProgSlc2KPages:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1321:
+.L1325:
 	mov	w1, w24
 	mov	w4, w22
 	add	x3, x29, 116
@@ -9069,15 +9090,15 @@ FlashProgSlc2KPages:
 	ldr	w1, [x29, 116]
 	ldrb	w0, [x0, #:lo12:.LANCHOR25]
 	cmp	w0, w1
-	bhi	.L1316
+	bhi	.L1320
 	mov	w0, -1
 	str	w0, [x20]
-.L1317:
+.L1321:
 	sub	w22, w22, #1
 	add	x20, x20, 56
 	and	w22, w22, 255
-	b	.L1315
-.L1316:
+	b	.L1319
+.L1320:
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w19, [x0, w1, uxtw]
@@ -9130,30 +9151,30 @@ FlashProgSlc2KPages:
 	ldr	w1, [x29, 112]
 	mov	w0, w19
 	bl	FlashReadStatus
-	tbz	x0, 0, .L1320
+	tbz	x0, 0, .L1324
 	mov	w0, -1
 	str	w0, [x20]
-.L1320:
+.L1324:
 	mov	w0, w19
 	bl	NandcFlashDeCs
-	b	.L1317
-.L1328:
+	b	.L1321
+.L1332:
 	ldr	w0, [x27]
 	cmn	w0, #1
-	bne	.L1323
+	bne	.L1327
 	ldr	w1, [x27, 4]
-	adrp	x0, .LC24
-	add	x0, x0, :lo12:.LC24
+	adrp	x0, .LC27
+	add	x0, x0, :lo12:.LC27
 	bl	printf
-.L1324:
+.L1328:
 	sub	w21, w21, #1
 	add	x27, x27, 56
 	and	w21, w21, 255
-.L1342:
+.L1346:
 	cmp	x27, x20
-	bne	.L1328
-	b	.L1341
-.L1323:
+	bne	.L1332
+	b	.L1345
+.L1327:
 	adrp	x19, .LANCHOR196
 	mov	w4, w21
 	add	x3, x29, 116
@@ -9176,45 +9197,45 @@ FlashProgSlc2KPages:
 	bl	FlashReadPages
 	ldr	w25, [x29, 120]
 	cmn	w25, #1
-	bne	.L1325
+	bne	.L1329
 	ldr	w1, [x27, 4]
-	adrp	x0, .LC25
-	add	x0, x0, :lo12:.LC25
+	adrp	x0, .LC28
+	add	x0, x0, :lo12:.LC28
 	bl	printf
 	str	w25, [x27]
-.L1325:
+.L1329:
 	ldr	x0, [x27, 16]
-	cbz	x0, .L1326
+	cbz	x0, .L1330
 	ldr	w2, [x0]
 	ldr	x0, [x19, #:lo12:.LANCHOR196]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1326
+	beq	.L1330
 	ldr	w1, [x27, 4]
-	adrp	x0, .LC26
-	add	x0, x0, :lo12:.LC26
+	adrp	x0, .LC29
+	add	x0, x0, :lo12:.LC29
 	bl	printf
 	mov	w0, -1
 	str	w0, [x27]
-.L1326:
+.L1330:
 	ldr	x0, [x27, 8]
-	cbz	x0, .L1324
+	cbz	x0, .L1328
 	ldr	w2, [x0]
 	ldr	x0, [x23, #:lo12:.LANCHOR195]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1324
+	beq	.L1328
 	ldr	w1, [x27, 4]
-	adrp	x0, .LC27
-	add	x0, x0, :lo12:.LC27
+	adrp	x0, .LC30
+	add	x0, x0, :lo12:.LC30
 	bl	printf
 	mov	w0, -1
 	str	w0, [x27]
-	b	.L1324
-.L1322:
+	b	.L1328
+.L1326:
 	adrp	x22, .LANCHOR195
 	mov	x23, x22
-	b	.L1342
+	b	.L1346
 	.size	FlashProgSlc2KPages, .-FlashProgSlc2KPages
 	.section	.text.FlashProgPages,"ax",@progbits
 	.align	2
@@ -9234,38 +9255,38 @@ FlashProgPages:
 	stp	w3, w4, [x29, 100]
 	adrp	x4, .LANCHOR1
 	ldrb	w4, [x4, #:lo12:.LANCHOR1]
-	cbnz	w4, .L1345
+	cbnz	w4, .L1349
 	mov	x19, x0
-	adrp	x0, .LANCHOR29+9
+	adrp	x0, .LANCHOR30+9
 	adrp	x27, .LANCHOR23
 	mov	w24, w1
-	ldrb	w0, [x0, #:lo12:.LANCHOR29+9]
+	ldrb	w0, [x0, #:lo12:.LANCHOR30+9]
 	mov	w22, w2
 	add	x28, x27, :lo12:.LANCHOR23
 	mov	w21, 0
 	str	w0, [x29, 108]
-.L1346:
+.L1350:
 	cmp	w21, w24
 	adrp	x26, .LANCHOR25
-	bcc	.L1359
+	bcc	.L1363
 	adrp	x21, .LANCHOR8
 	adrp	x23, .LANCHOR23
 	add	x25, x26, :lo12:.LANCHOR25
 	add	x21, x21, :lo12:.LANCHOR8
 	add	x23, x23, :lo12:.LANCHOR23
 	mov	x20, 0
-.L1360:
+.L1364:
 	ldrb	w0, [x25]
 	cmp	w0, w20
-	bhi	.L1362
+	bhi	.L1366
 	ldr	w0, [x29, 100]
-	cbnz	w0, .L1363
-.L1371:
+	cbnz	w0, .L1367
+.L1375:
 	mov	w0, 0
-	b	.L1344
-.L1345:
+	b	.L1348
+.L1349:
 	bl	FlashProgSlc2KPages
-.L1344:
+.L1348:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9273,7 +9294,7 @@ FlashProgPages:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1359:
+.L1363:
 	mov	w12, 56
 	mov	w1, w22
 	sub	w4, w24, w21
@@ -9287,13 +9308,13 @@ FlashProgPages:
 	ldrb	w1, [x26, #:lo12:.LANCHOR25]
 	ldr	w0, [x29, 116]
 	cmp	w1, w0
-	bhi	.L1348
+	bhi	.L1352
 	mov	w0, -1
 	str	w0, [x19, x12]
-.L1349:
+.L1353:
 	add	w21, w21, 1
-	b	.L1346
-.L1348:
+	b	.L1350
+.L1352:
 	adrp	x1, .LANCHOR27
 	add	x2, x27, :lo12:.LANCHOR23
 	mov	x3, 24
@@ -9303,20 +9324,20 @@ FlashProgPages:
 	csel	w23, w23, wzr, ne
 	madd	x1, x1, x3, x2
 	ldr	x1, [x1, 8]
-	cbz	x1, .L1351
+	cbz	x1, .L1355
 	bl	FlashWaitCmdDone
-.L1351:
+.L1355:
 	ldp	w2, w1, [x29, 112]
 	mov	x0, 24
 	madd	x0, x1, x0, x28
 	str	w2, [x0, 4]
 	stp	x25, xzr, [x0, 8]
-	cbz	w23, .L1352
+	cbz	w23, .L1356
 	add	w2, w21, 1
 	mov	w3, 56
 	umaddl	x2, w2, w3, x19
 	str	x2, [x0, 16]
-.L1352:
+.L1356:
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w20, [x0, x1]
@@ -9326,17 +9347,17 @@ FlashProgPages:
 	cmp	w0, 1
 	mov	w0, w20
 	strb	w20, [x28, x1]
-	bne	.L1353
+	bne	.L1357
 	bl	NandcWaitFlashReady
-.L1354:
+.L1358:
 	ldr	w0, [x29, 104]
 	sub	w0, w0, #1
 	cmp	w0, 6
-	bhi	.L1355
+	bhi	.L1359
 	adrp	x0, .LANCHOR21
 	add	x0, x0, :lo12:.LANCHOR21
 	ldrb	w0, [x0, w20, sxtw]
-	cbz	w0, .L1355
+	cbz	w0, .L1359
 	adrp	x0, .LANCHOR20
 	add	x0, x0, :lo12:.LANCHOR20
 	add	x2, x0, 4
@@ -9344,17 +9365,17 @@ FlashProgPages:
 	ldrb	w1, [x0, 1]
 	mov	w0, w20
 	bl	HynixSetRRPara
-.L1355:
+.L1359:
 	mov	w0, w20
 	bl	NandcFlashCs
 	cmp	w22, 1
-	bne	.L1356
+	bne	.L1360
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L1356
+	cbz	w0, .L1360
 	mov	w0, w20
 	bl	flash_enter_slc_mode
-.L1357:
+.L1361:
 	ldr	w1, [x29, 112]
 	mov	w0, w20
 	bl	FlashProgFirstCmd
@@ -9363,7 +9384,7 @@ FlashProgPages:
 	ldp	x3, x4, [x25, 8]
 	mov	w0, w20
 	bl	NandcXferData
-	cbz	w23, .L1358
+	cbz	w23, .L1362
 	ldr	w1, [x29, 112]
 	mov	w0, w20
 	bl	FlashProgDpFirstCmd
@@ -9391,15 +9412,15 @@ FlashProgPages:
 	ldp	x3, x4, [x0, 8]
 	mov	w0, w20
 	bl	NandcXferData
-.L1358:
+.L1362:
 	ldr	w1, [x29, 112]
 	mov	w0, w20
 	add	w21, w21, w23
 	bl	FlashProgSecondCmd
 	mov	w0, w20
 	bl	NandcFlashDeCs
-	b	.L1349
-.L1353:
+	b	.L1353
+.L1357:
 	bl	NandcFlashCs
 	ldr	w1, [x29, 116]
 	adrp	x0, .LANCHOR17
@@ -9412,47 +9433,47 @@ FlashProgPages:
 	bl	FlashWaitReadyEN
 	mov	w0, w20
 	bl	NandcFlashDeCs
-	b	.L1354
-.L1356:
+	b	.L1358
+.L1360:
 	mov	w0, w20
 	bl	flash_exit_slc_mode
-	b	.L1357
-.L1362:
+	b	.L1361
+.L1366:
 	mov	w0, w20
 	bl	FlashWaitCmdDone
 	cmp	w22, 1
-	bne	.L1361
+	bne	.L1365
 	ldrb	w0, [x21]
-	cbz	w0, .L1361
+	cbz	w0, .L1365
 	mov	x0, 24
 	mul	x0, x20, x0
 	ldrb	w0, [x0, x23]
 	bl	flash_exit_slc_mode
-.L1361:
+.L1365:
 	add	x20, x20, 1
-	b	.L1360
-.L1363:
+	b	.L1364
+.L1367:
 	mov	w0, 56
 	and	w20, w24, 255
 	adrp	x23, .LANCHOR195
 	mov	x25, x23
 	umaddl	x24, w24, w0, x19
-.L1364:
+.L1368:
 	cmp	x24, x19
-	beq	.L1371
+	beq	.L1375
 	ldr	w0, [x19]
 	cmn	w0, #1
-	bne	.L1365
+	bne	.L1369
 	ldr	w1, [x19, 4]
-	adrp	x0, .LC24
-	add	x0, x0, :lo12:.LC24
+	adrp	x0, .LC27
+	add	x0, x0, :lo12:.LC27
 	bl	printf
-.L1366:
+.L1370:
 	sub	w20, w20, #1
 	add	x19, x19, 56
 	and	w20, w20, 255
-	b	.L1364
-.L1365:
+	b	.L1368
+.L1369:
 	adrp	x21, .LANCHOR196
 	mov	w4, w20
 	add	x3, x29, 116
@@ -9475,41 +9496,41 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	w26, [x29, 120]
 	cmn	w26, #1
-	bne	.L1367
+	bne	.L1371
 	ldr	w1, [x19, 4]
-	adrp	x0, .LC25
-	add	x0, x0, :lo12:.LC25
+	adrp	x0, .LC28
+	add	x0, x0, :lo12:.LC28
 	bl	printf
 	str	w26, [x19]
-.L1367:
+.L1371:
 	ldr	x0, [x19, 16]
-	cbz	x0, .L1368
+	cbz	x0, .L1372
 	ldr	w2, [x0]
 	ldr	x0, [x21, #:lo12:.LANCHOR196]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1368
+	beq	.L1372
 	ldr	w1, [x19, 4]
-	adrp	x0, .LC26
-	add	x0, x0, :lo12:.LC26
+	adrp	x0, .LC29
+	add	x0, x0, :lo12:.LC29
 	bl	printf
 	mov	w0, -1
 	str	w0, [x19]
-.L1368:
+.L1372:
 	ldr	x0, [x19, 8]
-	cbz	x0, .L1366
+	cbz	x0, .L1370
 	ldr	w2, [x0]
 	ldr	x0, [x25, #:lo12:.LANCHOR195]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1366
+	beq	.L1370
 	ldr	w1, [x19, 4]
-	adrp	x0, .LC27
-	add	x0, x0, :lo12:.LC27
+	adrp	x0, .LC30
+	add	x0, x0, :lo12:.LC30
 	bl	printf
 	mov	w0, -1
 	str	w0, [x19]
-	b	.L1366
+	b	.L1370
 	.size	FlashProgPages, .-FlashProgPages
 	.section	.text.FlashTestBlk,"ax",@progbits
 	.align	2
@@ -9520,20 +9541,20 @@ FlashTestBlk:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w19, w0, 65535
-	adrp	x0, .LANCHOR147
-	ldr	w0, [x0, #:lo12:.LANCHOR147]
+	adrp	x0, .LANCHOR146
+	ldr	w0, [x0, #:lo12:.LANCHOR146]
 	cmp	w19, w0
-	bcc	.L1399
-	adrp	x20, .LANCHOR151
+	bcc	.L1403
+	adrp	x20, .LANCHOR150
 	mov	w2, 32
 	mov	w1, 165
 	lsl	w19, w19, 10
-	ldr	x0, [x20, #:lo12:.LANCHOR151]
+	ldr	x0, [x20, #:lo12:.LANCHOR150]
 	str	x0, [x29, 48]
 	add	x0, x29, 96
 	str	x0, [x29, 56]
 	bl	ftl_memset
-	ldr	x0, [x20, #:lo12:.LANCHOR151]
+	ldr	x0, [x20, #:lo12:.LANCHOR150]
 	mov	w2, 8
 	mov	w1, 90
 	bl	ftl_memset
@@ -9554,227 +9575,239 @@ FlashTestBlk:
 	add	x0, x29, 40
 	csetm	w19, ne
 	bl	FlashEraseBlocks
-.L1397:
+.L1401:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 160
 	ret
-.L1399:
+.L1403:
 	mov	w19, 0
-	b	.L1397
+	b	.L1401
 	.size	FlashTestBlk, .-FlashTestBlk
 	.section	.text.FtlLowFormatEraseBlock,"ax",@progbits
 	.align	2
 	.global	FtlLowFormatEraseBlock
 	.type	FtlLowFormatEraseBlock, %function
 FtlLowFormatEraseBlock:
-	stp	x29, x30, [sp, -128]!
+	stp	x29, x30, [sp, -144]!
 	add	x29, sp, 0
 	stp	x25, x26, [sp, 64]
-	and	w25, w0, 65535
-	adrp	x0, .LANCHOR75
+	and	w26, w0, 65535
+	adrp	x0, .LANCHOR76
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	ldr	w0, [x0, #:lo12:.LANCHOR75]
+	ldr	w0, [x0, #:lo12:.LANCHOR76]
 	stp	x23, x24, [sp, 48]
 	stp	x27, x28, [sp, 80]
-	cbnz	w0, .L1424
-	adrp	x0, .LANCHOR72
-	and	w24, w1, 255
-	adrp	x23, .LANCHOR8
-	adrp	x1, .LANCHOR36
-	str	w25, [x0, #:lo12:.LANCHOR72]
+	cbnz	w0, .L1428
+	adrp	x23, .LANCHOR27
+	and	w25, w1, 255
+	adrp	x20, .LANCHOR8
+	adrp	x1, .LANCHOR37
+	ldrb	w0, [x23, #:lo12:.LANCHOR27]
+	adrp	x21, .LANCHOR77
+	str	w0, [x29, 136]
+	mov	x8, 56
+	adrp	x0, .LANCHOR73
+	ldrb	w10, [x20, #:lo12:.LANCHOR8]
+	ldrh	w11, [x1, #:lo12:.LANCHOR37]
+	adrp	x7, .LANCHOR46
+	str	w26, [x0, #:lo12:.LANCHOR73]
 	adrp	x0, .LANCHOR186
-	adrp	x21, .LANCHOR76
-	ldrb	w10, [x23, #:lo12:.LANCHOR8]
+	ldr	x6, [x21, #:lo12:.LANCHOR77]
+	add	x7, x7, :lo12:.LANCHOR46
 	ldr	x12, [x0, #:lo12:.LANCHOR186]
-	adrp	x0, .LANCHOR57
-	ldrh	w11, [x1, #:lo12:.LANCHOR36]
-	mov	x8, 56
-	ldr	x6, [x21, #:lo12:.LANCHOR76]
-	adrp	x7, .LANCHOR45
-	ldrh	w13, [x0, #:lo12:.LANCHOR57]
-	add	x7, x7, :lo12:.LANCHOR45
+	adrp	x0, .LANCHOR58
 	mov	w14, w8
 	mov	x5, 0
-	mov	w20, 0
+	ldrh	w13, [x0, #:lo12:.LANCHOR58]
+	mov	w24, 0
 	mov	w19, 0
-	stp	x0, x1, [x29, 112]
-.L1403:
+	str	x1, [x29, 128]
+	str	x0, [x29, 120]
+.L1407:
 	cmp	w11, w5, uxth
-	bhi	.L1407
-	cbz	w20, .L1401
+	bhi	.L1411
+	cbz	w24, .L1405
 	cmp	w10, 0
-	mov	w2, w20
+	mov	w2, w24
 	cset	w22, ne
-	mov	x0, x6
+	strb	wzr, [x23, #:lo12:.LANCHOR27]
 	mov	w1, w22
-	mov	x26, 0
+	mov	x0, x6
 	bl	FlashEraseBlocks
+	mov	x27, 0
+	ldrb	w0, [x29, 136]
+	strb	w0, [x23, #:lo12:.LANCHOR27]
 	mov	w0, 56
-	umull	x20, w20, w0
-.L1410:
-	ldr	x0, [x21, #:lo12:.LANCHOR76]
-	add	x1, x0, x26
-	ldr	w0, [x0, x26]
+	umull	x24, w24, w0
+.L1414:
+	ldr	x0, [x21, #:lo12:.LANCHOR77]
+	add	x1, x0, x27
+	ldr	w0, [x0, x27]
 	cmn	w0, #1
-	bne	.L1409
+	bne	.L1413
 	ldr	w0, [x1, 4]
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.L1409:
-	add	x26, x26, 56
-	cmp	x26, x20
-	bne	.L1410
-	cbnz	w24, .L1411
+.L1413:
+	add	x27, x27, 56
+	cmp	x27, x24
+	bne	.L1414
+	cbnz	w25, .L1415
 	and	w22, w22, 65535
-	mov	w27, 6
-	mov	w26, 1
-.L1412:
-	adrp	x28, .LANCHOR45
-	mov	w23, 0
-	add	x0, x28, :lo12:.LANCHOR45
-	str	x0, [x29, 104]
-.L1420:
-	ldr	x0, [x29, 120]
+	mov	w28, 6
+	mov	w27, 1
+.L1416:
+	adrp	x0, .LANCHOR46
+	mov	w24, 0
+	add	x0, x0, :lo12:.LANCHOR46
+	str	x0, [x29, 112]
+.L1424:
+	ldr	x0, [x29, 128]
 	mov	x5, 0
-	ldr	x6, [x21, #:lo12:.LANCHOR76]
+	ldr	x6, [x21, #:lo12:.LANCHOR77]
 	mov	w20, 0
 	mov	w12, 56
-	ldrh	w7, [x0, #:lo12:.LANCHOR36]
+	ldrh	w7, [x0, #:lo12:.LANCHOR37]
 	adrp	x0, .LANCHOR183
 	ldr	x8, [x0, #:lo12:.LANCHOR183]
 	adrp	x0, .LANCHOR184
 	ldr	x10, [x0, #:lo12:.LANCHOR184]
-	ldr	x0, [x29, 112]
-	ldrh	w11, [x0, #:lo12:.LANCHOR57]
-.L1413:
+	ldr	x0, [x29, 120]
+	ldrh	w11, [x0, #:lo12:.LANCHOR58]
+.L1417:
 	cmp	w7, w5, uxth
-	bhi	.L1416
-	cbz	w20, .L1401
+	bhi	.L1420
+	cbz	w20, .L1405
+	mov	w2, w22
 	mov	w1, w20
+	strb	wzr, [x23, #:lo12:.LANCHOR27]
 	mov	w3, 1
-	mov	w2, w22
 	mov	x0, x6
 	bl	FlashProgPages
-	mov	x28, 0
 	mov	w1, 56
+	ldrb	w0, [x29, 136]
+	strb	w0, [x23, #:lo12:.LANCHOR27]
+	mov	x2, 0
 	umull	x1, w20, w1
-.L1419:
-	ldr	x0, [x21, #:lo12:.LANCHOR76]
-	add	x3, x0, x28
-	ldr	w0, [x0, x28]
-	cbz	w0, .L1418
+.L1423:
+	ldr	x0, [x21, #:lo12:.LANCHOR77]
+	add	x3, x0, x2
+	ldr	w0, [x0, x2]
+	cbz	w0, .L1422
 	ldr	w0, [x3, 4]
 	add	w19, w19, 1
-	str	x1, [x29, 96]
+	stp	x2, x1, [x29, 96]
 	and	w19, w19, 65535
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-	ldr	x1, [x29, 96]
-.L1418:
-	add	x28, x28, 56
-	cmp	x1, x28
-	bne	.L1419
-	add	w23, w23, w27
-	and	w23, w23, 65535
-	cmp	w23, w26
-	bcc	.L1420
-	mov	x23, 0
+	ldp	x2, x1, [x29, 96]
 .L1422:
-	cbz	w24, .L1421
-	ldr	x0, [x21, #:lo12:.LANCHOR76]
+	add	x2, x2, 56
+	cmp	x1, x2
+	bne	.L1423
+	add	w24, w24, w28
+	and	w24, w24, 65535
+	cmp	w27, w24
+	bhi	.L1424
+	mov	x23, 0
+.L1426:
+	cbz	w25, .L1425
+	ldr	x0, [x21, #:lo12:.LANCHOR77]
 	add	x1, x0, x23
 	ldr	w0, [x0, x23]
-	cbnz	w0, .L1421
+	cbnz	w0, .L1425
 	ldr	w0, [x1, 4]
 	mov	w1, 1
+	str	x2, [x29, 136]
 	lsr	w0, w0, 10
 	bl	FtlFreeSysBlkQueueIn
-.L1421:
+	ldr	x2, [x29, 136]
+.L1425:
 	add	x23, x23, 56
-	cmp	x23, x28
-	bne	.L1422
-	cmp	w25, 63
-	ccmp	w24, 0, 0, hi
-	beq	.L1401
-	ldr	x0, [x21, #:lo12:.LANCHOR76]
+	cmp	x23, x2
+	bne	.L1426
+	cmp	w26, 63
+	ccmp	w25, 0, 0, hi
+	beq	.L1405
+	ldr	x0, [x21, #:lo12:.LANCHOR77]
 	mov	w2, w20
 	mov	w1, w22
 	bl	FlashEraseBlocks
-.L1401:
+.L1405:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 128
+	ldp	x29, x30, [sp], 144
 	ret
-.L1407:
+.L1411:
 	mul	x0, x5, x8
-	mov	w1, w25
+	mov	w1, w26
 	str	wzr, [x6, x0]
 	ldrb	w0, [x7, x5]
 	bl	V2P_block
 	and	w15, w0, 65535
 	mov	w22, w15
-	cbz	w24, .L1404
+	cbz	w25, .L1408
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L1405
-.L1404:
+	cbnz	w0, .L1409
+.L1408:
 	mov	w0, w22
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L1406
-	umaddl	x1, w20, w14, x6
+	cbnz	w0, .L1410
+	umaddl	x1, w24, w14, x6
 	lsl	w15, w15, 10
-	mul	w0, w20, w13
-	add	w20, w20, 1
-	and	w20, w20, 65535
+	mul	w0, w24, w13
+	add	w24, w24, 1
+	and	w24, w24, 65535
 	asr	w0, w0, 2
 	str	w15, [x1, 4]
 	add	x0, x12, x0, sxtw 2
 	stp	xzr, x0, [x1, 8]
-.L1405:
+.L1409:
 	add	x5, x5, 1
-	b	.L1403
-.L1406:
+	b	.L1407
+.L1410:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1405
-.L1411:
-	adrp	x0, .LANCHOR52
-	ldrh	w26, [x0, #:lo12:.LANCHOR52]
-	ldrb	w0, [x23, #:lo12:.LANCHOR8]
-	cbnz	w0, .L1425
-	lsr	w27, w26, 2
+	b	.L1409
+.L1415:
+	adrp	x0, .LANCHOR53
+	ldrh	w27, [x0, #:lo12:.LANCHOR53]
+	ldrb	w0, [x20, #:lo12:.LANCHOR8]
+	cbnz	w0, .L1429
+	lsr	w28, w27, 2
 	mov	w22, 1
-	b	.L1412
-.L1425:
+	b	.L1416
+.L1429:
 	mov	w22, 1
-	mov	w27, w22
-	b	.L1412
-.L1416:
+	mov	w28, w22
+	b	.L1416
+.L1420:
 	mov	x0, 56
-	mov	w1, w25
+	mov	w1, w26
 	mul	x0, x5, x0
 	str	wzr, [x6, x0]
-	ldr	x0, [x29, 104]
+	ldr	x0, [x29, 112]
 	ldrb	w0, [x0, x5]
 	bl	V2P_block
 	and	w13, w0, 65535
 	mov	w14, w13
-	cbz	w24, .L1414
+	cbz	w25, .L1418
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L1415
-.L1414:
+	cbnz	w0, .L1419
+.L1418:
 	mov	w0, w14
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L1415
+	cbnz	w0, .L1419
 	umaddl	x1, w20, w12, x6
-	add	w13, w23, w13, lsl 10
+	add	w13, w24, w13, lsl 10
 	mul	w0, w20, w11
 	add	w20, w20, 1
 	and	w20, w20, 65535
@@ -9782,12 +9815,12 @@ FtlLowFormatEraseBlock:
 	str	w13, [x1, 4]
 	add	x0, x10, x0, sxtw 2
 	stp	x8, x0, [x1, 8]
-.L1415:
+.L1419:
 	add	x5, x5, 1
-	b	.L1413
-.L1424:
+	b	.L1417
+.L1428:
 	mov	w19, 0
-	b	.L1401
+	b	.L1405
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
 	.section	.text.FtlBbmTblFlush,"ax",@progbits
 	.align	2
@@ -9797,45 +9830,45 @@ FtlBbmTblFlush:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR75
+	adrp	x22, .LANCHOR76
 	stp	x19, x20, [sp, 16]
-	ldr	w0, [x22, #:lo12:.LANCHOR75]
+	ldr	w0, [x22, #:lo12:.LANCHOR76]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w0, .L1448
+	cbnz	w0, .L1452
 	adrp	x24, .LANCHOR185
-	adrp	x23, .LANCHOR79
+	adrp	x23, .LANCHOR180
 	adrp	x19, .LANCHOR199
 	add	x20, x19, :lo12:.LANCHOR199
 	ldr	x1, [x24, #:lo12:.LANCHOR185]
-	adrp	x21, .LANCHOR73
-	ldr	x0, [x23, #:lo12:.LANCHOR79]
-	add	x26, x21, :lo12:.LANCHOR73
+	adrp	x21, .LANCHOR74
+	ldr	x0, [x23, #:lo12:.LANCHOR180]
+	add	x26, x21, :lo12:.LANCHOR74
 	stp	x0, x1, [x20, 8]
-	adrp	x1, .LANCHOR56
-	adrp	x27, .LANCHOR43
+	adrp	x1, .LANCHOR57
+	adrp	x27, .LANCHOR44
 	adrp	x28, .LANCHOR120
-	ldrh	w2, [x1, #:lo12:.LANCHOR56]
+	ldrh	w2, [x1, #:lo12:.LANCHOR57]
 	add	x26, x26, 32
 	mov	w25, 0
-	add	x27, x27, :lo12:.LANCHOR43
+	add	x27, x27, :lo12:.LANCHOR44
 	add	x28, x28, :lo12:.LANCHOR120
 	mov	w1, 0
 	bl	ftl_memset
-.L1449:
+.L1453:
 	ldrh	w0, [x27]
 	cmp	w25, w0
-	blt	.L1450
+	blt	.L1454
 	add	x19, x19, :lo12:.LANCHOR199
-	add	x20, x21, :lo12:.LANCHOR73
+	add	x20, x21, :lo12:.LANCHOR74
 	mov	w2, 16
 	mov	w1, 255
-	adrp	x25, .LC28
-	adrp	x27, .LANCHOR52
+	adrp	x25, .LC31
+	adrp	x27, .LANCHOR53
 	ldr	x28, [x19, 16]
-	add	x25, x25, :lo12:.LC28
-	add	x27, x27, :lo12:.LANCHOR52
+	add	x25, x25, :lo12:.LC31
+	add	x27, x27, :lo12:.LANCHOR53
 	mov	w26, 0
 	mov	x0, x28
 	bl	ftl_memset
@@ -9843,22 +9876,22 @@ FtlBbmTblFlush:
 	strh	w0, [x28]
 	ldr	w0, [x20, 8]
 	str	w0, [x28, 4]
-	ldrh	w0, [x21, #:lo12:.LANCHOR73]
+	ldrh	w0, [x21, #:lo12:.LANCHOR74]
 	mov	w21, 0
 	strh	w0, [x28, 2]
 	ldrh	w0, [x20, 4]
 	strh	w0, [x28, 8]
 	ldrh	w0, [x20, 6]
 	strh	w0, [x28, 10]
-	adrp	x0, .LANCHOR35
-	ldr	w0, [x0, #:lo12:.LANCHOR35]
+	adrp	x0, .LANCHOR36
+	ldr	w0, [x0, #:lo12:.LANCHOR36]
 	strh	w0, [x28, 12]
-.L1451:
+.L1455:
 	ldrh	w4, [x28, 10]
 	ldrh	w1, [x20]
 	ldrh	w2, [x20, 2]
 	ldrh	w3, [x20, 4]
-	ldr	x0, [x23, #:lo12:.LANCHOR79]
+	ldr	x0, [x23, #:lo12:.LANCHOR180]
 	str	x0, [x19, 8]
 	ldr	x0, [x24, #:lo12:.LANCHOR185]
 	str	x0, [x19, 16]
@@ -9876,7 +9909,7 @@ FtlBbmTblFlush:
 	ldrh	w1, [x20, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L1452
+	blt	.L1456
 	ldr	w0, [x20, 8]
 	mov	w2, 1
 	ldrh	w1, [x20, 4]
@@ -9886,10 +9919,10 @@ FtlBbmTblFlush:
 	ldrh	w0, [x20]
 	strh	w0, [x28, 8]
 	strh	w0, [x20, 4]
-	adrp	x0, .LANCHOR76
+	adrp	x0, .LANCHOR77
 	strh	w1, [x20]
 	lsl	w1, w1, 10
-	ldr	x0, [x0, #:lo12:.LANCHOR76]
+	ldr	x0, [x0, #:lo12:.LANCHOR77]
 	str	w1, [x19, 4]
 	strh	wzr, [x20, 2]
 	str	w1, [x0, 4]
@@ -9900,29 +9933,29 @@ FtlBbmTblFlush:
 	mov	w2, w3
 	mov	w1, w3
 	bl	FlashProgPages
-.L1452:
+.L1456:
 	ldrh	w0, [x20, 2]
 	add	w0, w0, 1
 	strh	w0, [x20, 2]
 	ldr	w0, [x19]
 	cmn	w0, #1
-	bne	.L1453
+	bne	.L1457
 	ldr	w1, [x19, 4]
 	add	w21, w21, 1
-	adrp	x0, .LC29
+	adrp	x0, .LC32
 	and	w21, w21, 65535
-	add	x0, x0, :lo12:.LC29
+	add	x0, x0, :lo12:.LC32
 	bl	printf
 	cmp	w21, 3
-	bls	.L1451
+	bls	.L1455
 	ldr	w1, [x19, 4]
 	mov	w2, w21
-	adrp	x0, .LC30
-	add	x0, x0, :lo12:.LC30
+	adrp	x0, .LC33
+	add	x0, x0, :lo12:.LC33
 	bl	printf
 	mov	w0, 1
-	str	w0, [x22, #:lo12:.LANCHOR75]
-.L1448:
+	str	w0, [x22, #:lo12:.LANCHOR76]
+.L1452:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9931,7 +9964,7 @@ FtlBbmTblFlush:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1450:
+.L1454:
 	ldrh	w2, [x28]
 	ldr	x1, [x26], 8
 	ldr	x0, [x20, 8]
@@ -9940,128 +9973,128 @@ FtlBbmTblFlush:
 	add	w25, w25, 1
 	add	x0, x0, x3, sxtw 2
 	bl	ftl_memcpy
-	b	.L1449
-.L1453:
-	cbnz	w26, .L1448
+	b	.L1453
+.L1457:
+	cbnz	w26, .L1452
 	mov	w26, 1
-	b	.L1451
+	b	.L1455
 	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
 	.section	.text.allocate_data_superblock,"ax",@progbits
 	.align	2
 	.global	allocate_data_superblock
 	.type	allocate_data_superblock, %function
 allocate_data_superblock:
-	adrp	x1, .LANCHOR75
-	ldr	w1, [x1, #:lo12:.LANCHOR75]
-	cbnz	w1, .L1521
+	adrp	x1, .LANCHOR76
+	ldr	w1, [x1, #:lo12:.LANCHOR76]
+	cbnz	w1, .L1525
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
 	stp	x27, x28, [sp, 80]
-	adrp	x27, .LANCHOR84
-	add	x0, x27, :lo12:.LANCHOR84
+	adrp	x27, .LANCHOR85
+	add	x0, x27, :lo12:.LANCHOR85
 	stp	x23, x24, [sp, 48]
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR87
-	add	x23, x0, :lo12:.LANCHOR87
+	adrp	x0, .LANCHOR88
+	add	x23, x0, :lo12:.LANCHOR88
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
-.L1512:
+.L1516:
 	ldr	x1, [x29, 120]
-	adrp	x0, .LANCHOR87
-	adrp	x25, .LANCHOR38
-	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	adrp	x0, .LANCHOR88
+	adrp	x25, .LANCHOR39
+	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	ldrh	w1, [x1]
 	add	w0, w0, w1
-	ldrh	w1, [x25, #:lo12:.LANCHOR38]
+	ldrh	w1, [x25, #:lo12:.LANCHOR39]
 	cmp	w0, w1
-	ble	.L1461
-	mov	w2, 2822
+	ble	.L1465
+	mov	w2, 2861
 	adrp	x1, .LANCHOR200
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR200
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR200
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1461:
-	adrp	x0, .LANCHOR92
-	add	x0, x0, :lo12:.LANCHOR92
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1465:
+	adrp	x0, .LANCHOR93
+	add	x0, x0, :lo12:.LANCHOR93
 	cmp	x19, x0
-	bne	.L1462
-	adrp	x1, .LANCHOR170
+	bne	.L1466
+	adrp	x1, .LANCHOR169
 	ldrh	w2, [x23]
-	ldr	w3, [x1, #:lo12:.LANCHOR170]
+	ldr	w3, [x1, #:lo12:.LANCHOR169]
 	lsr	w0, w2, 1
 	add	w4, w0, 1
 	mul	w1, w2, w3
 	add	w1, w4, w1, lsr 2
-	adrp	x4, .LANCHOR101
+	adrp	x4, .LANCHOR28
 	and	w1, w1, 65535
-	ldr	w4, [x4, #:lo12:.LANCHOR101]
-	cbz	w4, .L1463
-	adrp	x4, .LANCHOR168
-	ldr	w4, [x4, #:lo12:.LANCHOR168]
+	ldr	w4, [x4, #:lo12:.LANCHOR28]
+	cbz	w4, .L1467
+	adrp	x4, .LANCHOR167
+	ldr	w4, [x4, #:lo12:.LANCHOR167]
 	cmp	w4, 29
-	bhi	.L1463
+	bhi	.L1467
 	cmp	w4, 2
-	bls	.L1496
-	tbz	x2, 0, .L1492
-	cbz	w3, .L1496
-.L1492:
+	bls	.L1500
+	tbz	x2, 0, .L1496
+	cbz	w3, .L1500
+.L1496:
 	mov	w1, w0
-	b	.L1463
-.L1462:
+	b	.L1467
+.L1466:
 	ldrb	w0, [x19, 8]
 	cmp	w0, 1
-	bne	.L1496
-	adrp	x0, .LANCHOR42
-	ldrh	w0, [x0, #:lo12:.LANCHOR42]
+	bne	.L1500
+	adrp	x0, .LANCHOR43
+	ldrh	w0, [x0, #:lo12:.LANCHOR43]
 	cmp	w0, 1
-	beq	.L1496
+	beq	.L1500
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbnz	w0, .L1496
-	adrp	x2, .LANCHOR101
+	cbnz	w0, .L1500
+	adrp	x2, .LANCHOR28
 	ldrh	w0, [x23]
-	ldr	w2, [x2, #:lo12:.LANCHOR101]
+	ldr	w2, [x2, #:lo12:.LANCHOR28]
 	lsr	w1, w0, 3
-	cbz	w2, .L1463
-	adrp	x2, .LANCHOR168
-	ldr	w2, [x2, #:lo12:.LANCHOR168]
+	cbz	w2, .L1467
+	adrp	x2, .LANCHOR167
+	ldr	w2, [x2, #:lo12:.LANCHOR167]
 	cmp	w2, 1
-	bhi	.L1463
+	bhi	.L1467
 	mov	w1, 7
 	mul	w1, w0, w1
 	lsr	w1, w1, 3
-.L1463:
-	cbz	w1, .L1464
+.L1467:
+	cbz	w1, .L1468
 	sub	w1, w1, #1
 	and	w1, w1, 65535
-.L1464:
+.L1468:
 	ldrb	w2, [x19, 8]
-	adrp	x0, .LANCHOR86
-	add	x0, x0, :lo12:.LANCHOR86
+	adrp	x0, .LANCHOR87
+	add	x0, x0, :lo12:.LANCHOR87
 	bl	List_pop_index_node
 	and	w21, w0, 65535
 	ldrh	w0, [x23]
-	cbnz	w0, .L1465
-	mov	w2, 2842
+	cbnz	w0, .L1469
+	mov	w2, 2881
 	adrp	x1, .LANCHOR200
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR200
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR200
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1465:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1469:
 	ldrh	w0, [x23]
 	sub	w0, w0, #1
 	strh	w0, [x23]
@@ -10069,147 +10102,147 @@ allocate_data_superblock:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L1466
-	adrp	x0, .LANCHOR82
+	cbnz	w0, .L1470
+	adrp	x0, .LANCHOR83
 	ubfiz	x21, x21, 1, 16
 	mov	w1, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR82]
+	ldr	x0, [x0, #:lo12:.LANCHOR83]
 	strh	w1, [x0, x21]
-	ldrh	w1, [x27, #:lo12:.LANCHOR84]
+	ldrh	w1, [x27, #:lo12:.LANCHOR85]
 	ldrh	w0, [x23]
 	add	w0, w0, w1
-	ldrh	w1, [x25, #:lo12:.LANCHOR38]
+	ldrh	w1, [x25, #:lo12:.LANCHOR39]
 	cmp	w0, w1
-	ble	.L1512
-	mov	w2, 2854
+	ble	.L1516
+	mov	w2, 2893
 	adrp	x1, .LANCHOR200
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR200
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR200
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-	b	.L1512
-.L1496:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+	b	.L1516
+.L1500:
 	mov	w1, 0
-	b	.L1464
-.L1466:
-	ldrh	w1, [x27, #:lo12:.LANCHOR84]
+	b	.L1468
+.L1470:
+	ldrh	w1, [x27, #:lo12:.LANCHOR85]
 	ldrh	w0, [x23]
 	add	w0, w0, w1
-	ldrh	w1, [x25, #:lo12:.LANCHOR38]
+	ldrh	w1, [x25, #:lo12:.LANCHOR39]
 	cmp	w0, w1
-	ble	.L1468
-	mov	w2, 2857
+	ble	.L1472
+	mov	w2, 2896
 	adrp	x1, .LANCHOR200
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR200
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR200
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1468:
-	adrp	x1, .LANCHOR36
-	adrp	x24, .LANCHOR76
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1472:
+	adrp	x1, .LANCHOR37
+	adrp	x24, .LANCHOR77
 	mov	w2, 56
 	mov	x3, 8
-	ldrh	w1, [x1, #:lo12:.LANCHOR36]
+	ldrh	w1, [x1, #:lo12:.LANCHOR37]
 	add	x26, x19, 16
-	ldr	x4, [x24, #:lo12:.LANCHOR76]
+	ldr	x4, [x24, #:lo12:.LANCHOR77]
 	mov	x5, x26
 	mov	w20, 0
 	mov	w6, 65535
 	add	x0, x4, 8
 	umaddl	x1, w2, w1, x3
 	add	x1, x4, x1
-.L1469:
+.L1473:
 	cmp	x1, x0
-	bne	.L1471
-	cbnz	w20, .L1472
-	mov	w2, 2869
+	bne	.L1475
+	cbnz	w20, .L1476
+	mov	w2, 2908
 	adrp	x1, .LANCHOR200
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR200
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR200
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1472:
-	adrp	x0, .LANCHOR101
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1476:
+	adrp	x0, .LANCHOR28
 	uxtw	x22, w21
-	adrp	x28, .LANCHOR77
-	ldr	w0, [x0, #:lo12:.LANCHOR101]
-	cbz	w0, .L1473
-	adrp	x0, .LANCHOR90
-	add	x0, x0, :lo12:.LANCHOR90
+	adrp	x28, .LANCHOR78
+	ldr	w0, [x0, #:lo12:.LANCHOR28]
+	cbz	w0, .L1477
+	adrp	x0, .LANCHOR91
+	add	x0, x0, :lo12:.LANCHOR91
 	cmp	x19, x0
-	bne	.L1473
-	ldr	x0, [x28, #:lo12:.LANCHOR77]
+	bne	.L1477
+	ldr	x0, [x28, #:lo12:.LANCHOR78]
 	ldrh	w0, [x0, x22, lsl 1]
 	cmp	w0, 30
-	bls	.L1473
+	bls	.L1477
 	strb	wzr, [x19, 8]
-.L1473:
+.L1477:
 	adrp	x0, .LANCHOR201
 	ldrh	w0, [x0, #:lo12:.LANCHOR201]
 	cmp	w0, w21
-	bne	.L1474
-	mov	w2, 2876
+	bne	.L1478
+	mov	w2, 2915
 	adrp	x1, .LANCHOR200
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR200
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR200
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1474:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1478:
 	ldrb	w0, [x19, 8]
-	adrp	x6, .LANCHOR46
-	adrp	x5, .LANCHOR165
-	adrp	x4, .LANCHOR166
-	cbnz	w0, .L1475
-	ldr	x2, [x28, #:lo12:.LANCHOR77]
+	adrp	x6, .LANCHOR47
+	adrp	x5, .LANCHOR164
+	adrp	x4, .LANCHOR165
+	cbnz	w0, .L1479
+	ldr	x2, [x28, #:lo12:.LANCHOR78]
 	lsl	x1, x22, 1
 	ldrh	w0, [x2, x1]
-	cbz	w0, .L1476
-	ldrh	w7, [x6, #:lo12:.LANCHOR46]
+	cbz	w0, .L1480
+	ldrh	w7, [x6, #:lo12:.LANCHOR47]
 	add	w0, w0, w7
-.L1524:
+.L1528:
 	strh	w0, [x2, x1]
 	mov	w1, 0
-	ldr	w0, [x5, #:lo12:.LANCHOR165]
+	ldr	w0, [x5, #:lo12:.LANCHOR164]
 	add	w0, w0, 1
-	str	w0, [x5, #:lo12:.LANCHOR165]
+	str	w0, [x5, #:lo12:.LANCHOR164]
 	mov	w0, w21
 	bl	ftl_set_blk_mode
-.L1478:
-	ldr	x0, [x28, #:lo12:.LANCHOR77]
+.L1482:
+	ldr	x0, [x28, #:lo12:.LANCHOR78]
 	lsl	x22, x22, 1
 	ldrh	w1, [x0, x22]
-	adrp	x0, .LANCHOR167
-	ldr	w2, [x0, #:lo12:.LANCHOR167]
+	adrp	x0, .LANCHOR166
+	ldr	w2, [x0, #:lo12:.LANCHOR166]
 	cmp	w1, w2
-	bls	.L1479
-	str	w1, [x0, #:lo12:.LANCHOR167]
-.L1479:
-	ldr	w2, [x5, #:lo12:.LANCHOR165]
+	bls	.L1483
+	str	w1, [x0, #:lo12:.LANCHOR166]
+.L1483:
+	ldr	w2, [x5, #:lo12:.LANCHOR164]
 	mov	x3, 4
-	ldr	w1, [x4, #:lo12:.LANCHOR166]
-	ldrh	w0, [x6, #:lo12:.LANCHOR46]
+	ldr	w1, [x4, #:lo12:.LANCHOR165]
+	ldrh	w0, [x6, #:lo12:.LANCHOR47]
 	madd	w0, w0, w2, w1
-	ldrh	w1, [x25, #:lo12:.LANCHOR38]
+	ldrh	w1, [x25, #:lo12:.LANCHOR39]
 	udiv	w0, w0, w1
 	adrp	x1, .LANCHOR202
 	str	w0, [x1, #:lo12:.LANCHOR202]
@@ -10219,91 +10252,91 @@ allocate_data_superblock:
 	add	w0, w0, 1
 	str	w0, [x1, 16]
 	mov	w1, 56
-	ldr	x0, [x24, #:lo12:.LANCHOR76]
+	ldr	x0, [x24, #:lo12:.LANCHOR77]
 	nop // between mem op and mult-accumulate
 	umaddl	x1, w1, w20, x3
 	add	x2, x0, 4
 	add	x1, x0, x1
-.L1480:
+.L1484:
 	cmp	x1, x2
-	bne	.L1481
+	bne	.L1485
 	adrp	x1, .LANCHOR8
 	ldrb	w1, [x1, #:lo12:.LANCHOR8]
-	cbz	w1, .L1482
+	cbz	w1, .L1486
 	ldrb	w1, [x19, 8]
 	mov	w2, w20
 	cmp	w1, 1
-	bne	.L1483
+	bne	.L1487
 	mov	w1, 0
-.L1525:
+.L1529:
 	bl	FlashEraseBlocks
-.L1482:
+.L1486:
 	ldrb	w1, [x19, 8]
 	mov	w2, w20
-	ldr	x0, [x24, #:lo12:.LANCHOR76]
+	ldr	x0, [x24, #:lo12:.LANCHOR77]
 	mov	x25, 0
 	bl	FlashEraseBlocks
 	mov	w1, 0
 	mov	x3, 56
-.L1484:
+.L1488:
 	cmp	w20, w25, uxth
-	bhi	.L1486
-	cbz	w1, .L1487
+	bhi	.L1490
+	cbz	w1, .L1491
 	mov	w0, w21
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L1487:
+.L1491:
 	ldrb	w0, [x19, 7]
-	adrp	x2, .LANCHOR82
-	cbnz	w0, .L1488
-	ldr	x0, [x2, #:lo12:.LANCHOR82]
+	adrp	x2, .LANCHOR83
+	cbnz	w0, .L1492
+	ldr	x0, [x2, #:lo12:.LANCHOR83]
 	mov	w1, -1
 	strh	w1, [x0, x22]
-	b	.L1512
-.L1471:
+	b	.L1516
+.L1475:
 	ldrh	w3, [x5]
 	stp	xzr, xzr, [x0]
 	cmp	w3, w6
-	beq	.L1470
+	beq	.L1474
 	umaddl	x7, w20, w2, x4
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	lsl	w3, w3, 10
 	str	w3, [x7, 4]
-.L1470:
+.L1474:
 	add	x0, x0, 56
 	add	x5, x5, 2
-	b	.L1469
-.L1476:
+	b	.L1473
+.L1480:
 	mov	w0, 2
-	b	.L1524
-.L1475:
-	ldr	x2, [x28, #:lo12:.LANCHOR77]
+	b	.L1528
+.L1479:
+	ldr	x2, [x28, #:lo12:.LANCHOR78]
 	lsl	x0, x22, 1
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-	ldr	w0, [x4, #:lo12:.LANCHOR166]
+	ldr	w0, [x4, #:lo12:.LANCHOR165]
 	add	w0, w0, 1
-	str	w0, [x4, #:lo12:.LANCHOR166]
+	str	w0, [x4, #:lo12:.LANCHOR165]
 	mov	w0, w21
 	bl	ftl_set_blk_mode.part.9
-	b	.L1478
-.L1481:
+	b	.L1482
+.L1485:
 	ldr	w3, [x2]
 	and	w3, w3, -1024
 	str	w3, [x2], 56
-	b	.L1480
-.L1483:
+	b	.L1484
+.L1487:
 	mov	w1, 1
-	b	.L1525
-.L1486:
+	b	.L1529
+.L1490:
 	mul	x0, x25, x3
-	ldr	x2, [x24, #:lo12:.LANCHOR76]
+	ldr	x2, [x24, #:lo12:.LANCHOR77]
 	add	x4, x2, x0
 	ldr	w2, [x2, x0]
 	cmn	w2, #1
-	bne	.L1485
+	bne	.L1489
 	add	w1, w1, 1
 	ldr	w0, [x4, 4]
 	str	x3, [x29, 104]
@@ -10316,43 +10349,43 @@ allocate_data_superblock:
 	ldrb	w0, [x19, 7]
 	sub	w0, w0, #1
 	strb	w0, [x19, 7]
-.L1485:
+.L1489:
 	add	x25, x25, 1
 	add	x26, x26, 2
-	b	.L1484
-.L1488:
-	adrp	x1, .LANCHOR51
-	adrp	x3, .LANCHOR157
+	b	.L1488
+.L1492:
+	adrp	x1, .LANCHOR52
+	adrp	x3, .LANCHOR156
 	strb	wzr, [x19, 6]
-	ldrh	w1, [x1, #:lo12:.LANCHOR51]
+	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	strh	wzr, [x19, 2]
 	strh	w21, [x19]
 	mul	w0, w0, w1
-	ldr	w1, [x3, #:lo12:.LANCHOR157]
+	ldr	w1, [x3, #:lo12:.LANCHOR156]
 	str	w1, [x19, 12]
 	add	w1, w1, 1
-	str	w1, [x3, #:lo12:.LANCHOR157]
-	ldr	x1, [x2, #:lo12:.LANCHOR82]
+	str	w1, [x3, #:lo12:.LANCHOR156]
+	ldr	x1, [x2, #:lo12:.LANCHOR83]
 	and	w0, w0, 65535
 	strh	w0, [x19, 4]
 	strh	w0, [x1, x22]
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1489
+	cbz	w0, .L1493
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L1460
-.L1489:
-	mov	w2, 2935
+	cbnz	w0, .L1464
+.L1493:
+	mov	w2, 2974
 	adrp	x1, .LANCHOR200
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR200
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR200
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1460:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1464:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -10361,7 +10394,7 @@ allocate_data_superblock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1521:
+.L1525:
 	mov	w0, 0
 	ret
 	.size	allocate_data_superblock, .-allocate_data_superblock
@@ -10380,17 +10413,17 @@ FtlGcFreeBadSuperBlk:
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	str	x27, [sp, 80]
-	cbz	w0, .L1527
+	cbz	w0, .L1531
 	adrp	x23, .LANCHOR115
 	add	x24, x23, :lo12:.LANCHOR115
 	mov	w19, 0
-.L1528:
-	adrp	x0, .LANCHOR36
-	ldrh	w0, [x0, #:lo12:.LANCHOR36]
+.L1532:
+	adrp	x0, .LANCHOR37
+	ldrh	w0, [x0, #:lo12:.LANCHOR37]
 	cmp	w0, w19
-	bhi	.L1534
+	bhi	.L1538
 	bl	FtlGcReFreshBadBlk
-.L1527:
+.L1531:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -10399,28 +10432,28 @@ FtlGcFreeBadSuperBlk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1534:
-	adrp	x0, .LANCHOR45
-	add	x0, x0, :lo12:.LANCHOR45
+.L1538:
+	adrp	x0, .LANCHOR46
+	add	x0, x0, :lo12:.LANCHOR46
 	mov	w1, w25
 	add	x22, x21, :lo12:.LANCHOR114
 	mov	w20, 0
 	ldrb	w0, [x0, w19, sxtw]
 	bl	V2P_block
 	and	w26, w0, 65535
-.L1529:
+.L1533:
 	ldrh	w0, [x22]
 	cmp	w0, w20
-	bhi	.L1533
+	bhi	.L1537
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1528
-.L1533:
+	b	.L1532
+.L1537:
 	add	x0, x23, :lo12:.LANCHOR115
 	add	w27, w20, 1
 	ldrh	w0, [x0, w20, sxtw 1]
 	cmp	w0, w26
-	bne	.L1530
+	bne	.L1534
 	mov	w0, w26
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
@@ -10428,22 +10461,22 @@ FtlGcFreeBadSuperBlk:
 	sxtw	x3, w27
 	and	x4, x20, 65535
 	mov	x0, 0
-.L1531:
+.L1535:
 	add	w2, w20, w0
 	cmp	w1, w2, uxth
-	bhi	.L1532
+	bhi	.L1536
 	sub	w1, w1, #1
 	strh	w1, [x22]
-.L1530:
+.L1534:
 	and	w20, w27, 65535
-	b	.L1529
-.L1532:
+	b	.L1533
+.L1536:
 	add	x2, x3, x0
 	ldrh	w5, [x24, x2, lsl 1]
 	add	x2, x4, x0
 	add	x0, x0, 1
 	strh	w5, [x24, x2, lsl 1]
-	b	.L1531
+	b	.L1535
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
 	.section	.text.update_vpc_list,"ax",@progbits
 	.align	2
@@ -10451,92 +10484,92 @@ FtlGcFreeBadSuperBlk:
 	.type	update_vpc_list, %function
 update_vpc_list:
 	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LANCHOR82
+	adrp	x1, .LANCHOR83
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w19, w0, 65535
-	ldr	x1, [x1, #:lo12:.LANCHOR82]
+	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	ubfiz	x0, x19, 1, 16
 	ldrh	w0, [x1, x0]
-	cbnz	w0, .L1540
+	cbnz	w0, .L1544
 	adrp	x0, .LANCHOR201
 	ldrh	w1, [x0, #:lo12:.LANCHOR201]
 	cmp	w1, w19
-	bne	.L1541
+	bne	.L1545
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR201]
-.L1542:
-	adrp	x20, .LANCHOR84
+.L1546:
+	adrp	x20, .LANCHOR85
 	mov	w1, w19
-	adrp	x0, .LANCHOR81
-	add	x0, x0, :lo12:.LANCHOR81
+	adrp	x0, .LANCHOR82
+	add	x0, x0, :lo12:.LANCHOR82
 	bl	List_remove_node
-	ldrh	w0, [x20, #:lo12:.LANCHOR84]
-	cbnz	w0, .L1544
-	mov	w2, 3046
+	ldrh	w0, [x20, #:lo12:.LANCHOR85]
+	cbnz	w0, .L1548
+	mov	w2, 3085
 	adrp	x1, .LANCHOR203
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR203
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR203
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1544:
-	ldrh	w0, [x20, #:lo12:.LANCHOR84]
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1548:
+	ldrh	w0, [x20, #:lo12:.LANCHOR85]
 	sub	w0, w0, #1
-	strh	w0, [x20, #:lo12:.LANCHOR84]
+	strh	w0, [x20, #:lo12:.LANCHOR85]
 	mov	w0, w19
 	bl	free_data_superblock
 	mov	w0, w19
 	bl	FtlGcFreeBadSuperBlk
-	adrp	x0, .LANCHOR87
-	ldrh	w1, [x20, #:lo12:.LANCHOR84]
-	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	adrp	x0, .LANCHOR88
+	ldrh	w1, [x20, #:lo12:.LANCHOR85]
+	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	add	w0, w0, w1
-	adrp	x1, .LANCHOR38
-	ldrh	w1, [x1, #:lo12:.LANCHOR38]
+	adrp	x1, .LANCHOR39
+	ldrh	w1, [x1, #:lo12:.LANCHOR39]
 	cmp	w0, w1
-	ble	.L1548
-	mov	w2, 3049
+	ble	.L1552
+	mov	w2, 3088
 	adrp	x1, .LANCHOR203
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR203
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR203
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1548:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1552:
 	mov	w0, 1
-	b	.L1539
-.L1541:
-	adrp	x0, .LANCHOR90
-	ldrh	w0, [x0, #:lo12:.LANCHOR90]
-	cmp	w0, w19
-	beq	.L1547
+	b	.L1543
+.L1545:
 	adrp	x0, .LANCHOR91
 	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	cmp	w0, w19
-	beq	.L1547
+	beq	.L1551
 	adrp	x0, .LANCHOR92
 	ldrh	w0, [x0, #:lo12:.LANCHOR92]
 	cmp	w0, w19
-	bne	.L1542
-.L1547:
+	beq	.L1551
+	adrp	x0, .LANCHOR93
+	ldrh	w0, [x0, #:lo12:.LANCHOR93]
+	cmp	w0, w19
+	bne	.L1546
+.L1551:
 	mov	w0, 0
-.L1539:
+.L1543:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1540:
+.L1544:
 	mov	w0, w19
 	bl	List_update_data_list
-	b	.L1547
+	b	.L1551
 	.size	update_vpc_list, .-update_vpc_list
 	.section	.text.decrement_vpc_count,"ax",@progbits
 	.align	2
@@ -10550,87 +10583,87 @@ decrement_vpc_count:
 	str	x21, [sp, 32]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1551
-	adrp	x21, .LANCHOR82
+	beq	.L1555
+	adrp	x21, .LANCHOR83
 	ubfiz	x20, x19, 1, 16
-	ldr	x1, [x21, #:lo12:.LANCHOR82]
+	ldr	x1, [x21, #:lo12:.LANCHOR83]
 	ldrh	w0, [x1, x20]
-	cbnz	w0, .L1552
+	cbnz	w0, .L1556
 	mov	w2, 0
 	mov	w1, w19
-	adrp	x0, .LC31
-	add	x0, x0, :lo12:.LC31
+	adrp	x0, .LC34
+	add	x0, x0, :lo12:.LC34
 	bl	printf
-	ldr	x0, [x21, #:lo12:.LANCHOR82]
+	ldr	x0, [x21, #:lo12:.LANCHOR83]
 	ldrh	w0, [x0, x20]
-	cbz	w0, .L1553
-.L1558:
+	cbz	w0, .L1557
+.L1562:
 	mov	w20, 0
-.L1550:
+.L1554:
 	mov	w0, w20
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1553:
-	mov	w2, 3064
+.L1557:
+	mov	w2, 3103
 	adrp	x1, .LANCHOR204
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR204
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR204
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-	b	.L1558
-.L1552:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+	b	.L1562
+.L1556:
 	sub	w0, w0, #1
 	strh	w0, [x1, x20]
-.L1551:
+.L1555:
 	adrp	x21, .LANCHOR130
 	mov	w1, 65535
 	ldrh	w0, [x21, #:lo12:.LANCHOR130]
 	cmp	w0, w1
-	bne	.L1555
+	bne	.L1559
 	strh	w19, [x21, #:lo12:.LANCHOR130]
-	b	.L1558
-.L1555:
+	b	.L1562
+.L1559:
 	cmp	w19, w0
-	beq	.L1558
+	beq	.L1562
 	bl	update_vpc_list
 	cmp	w0, 0
-	adrp	x1, .LANCHOR80
-	adrp	x0, .LANCHOR81
+	adrp	x1, .LANCHOR81
+	adrp	x0, .LANCHOR82
 	strh	w19, [x21, #:lo12:.LANCHOR130]
 	cset	w20, ne
-	ldr	x1, [x1, #:lo12:.LANCHOR80]
-	ldr	x0, [x0, #:lo12:.LANCHOR81]
+	ldr	x1, [x1, #:lo12:.LANCHOR81]
+	ldr	x0, [x0, #:lo12:.LANCHOR82]
 	sub	x0, x0, x1
 	mov	x1, -6148914691236517206
 	asr	x0, x0, 1
 	movk	x1, 0xaaab, lsl 0
 	mul	x0, x0, x1
-	adrp	x1, .LANCHOR82
-	ldr	x1, [x1, #:lo12:.LANCHOR82]
+	adrp	x1, .LANCHOR83
+	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	and	x2, x0, 65535
 	ldrh	w1, [x1, x2, lsl 1]
-	cbnz	w1, .L1550
+	cbnz	w1, .L1554
 	cmp	w19, w0, uxth
-	beq	.L1550
-	mov	w2, 3086
+	beq	.L1554
+	mov	w2, 3125
 	adrp	x1, .LANCHOR204
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR204
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR204
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-	b	.L1550
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+	b	.L1554
 	.size	decrement_vpc_count, .-decrement_vpc_count
 	.section	.text.FtlSlcSuperblockCheck,"ax",@progbits
 	.align	2
@@ -10638,7 +10671,7 @@ decrement_vpc_count:
 	.type	FtlSlcSuperblockCheck, %function
 FtlSlcSuperblockCheck:
 	ldrh	w1, [x0, 4]
-	cbz	w1, .L1571
+	cbz	w1, .L1575
 	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
@@ -10647,7 +10680,7 @@ FtlSlcSuperblockCheck:
 	stp	x21, x22, [sp, 32]
 	str	x23, [sp, 48]
 	cmp	w1, w20
-	beq	.L1559
+	beq	.L1563
 	mov	x19, x0
 	ldrb	w0, [x0, 6]
 	adrp	x22, .LANCHOR8
@@ -10656,77 +10689,77 @@ FtlSlcSuperblockCheck:
 	add	x23, x22, :lo12:.LANCHOR8
 	add	x21, x21, :lo12:.LANCHOR117
 	ldrh	w0, [x19, x0, lsl 1]
-.L1563:
+.L1567:
 	cmp	w0, w20
-	beq	.L1565
+	beq	.L1569
 	ldrb	w0, [x19, 8]
 	cmp	w0, 1
-	bne	.L1566
+	bne	.L1570
 	ldrb	w1, [x23]
-	cbnz	w1, .L1566
+	cbnz	w1, .L1570
 	ldrh	w1, [x19, 2]
 	ldrh	w1, [x21, x1, lsl 1]
 	cmp	w1, w20
-	bne	.L1566
+	bne	.L1570
 	ldrh	w0, [x19, 4]
 	sub	w0, w0, #1
 	strh	w0, [x19, 4]
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1565
+	cbnz	w0, .L1569
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
-.L1574:
+.L1578:
 	strh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
-.L1559:
+.L1563:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1565:
+.L1569:
 	ldrb	w0, [x19, 6]
-	adrp	x1, .LANCHOR36
+	adrp	x1, .LANCHOR37
 	add	w0, w0, 1
-	ldrh	w1, [x1, #:lo12:.LANCHOR36]
+	ldrh	w1, [x1, #:lo12:.LANCHOR37]
 	and	w0, w0, 255
 	strb	w0, [x19, 6]
 	cmp	w1, w0
-	bne	.L1564
+	bne	.L1568
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L1564:
+.L1568:
 	ldrb	w0, [x19, 6]
 	add	x0, x0, 8
 	ldrh	w0, [x19, x0, lsl 1]
-	b	.L1563
-.L1566:
+	b	.L1567
+.L1570:
 	ldrb	w1, [x22, #:lo12:.LANCHOR8]
-	cbz	w1, .L1559
+	cbz	w1, .L1563
 	cmp	w0, 1
-	bne	.L1559
-	adrp	x0, .LANCHOR52
+	bne	.L1563
+	adrp	x0, .LANCHOR53
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x0, #:lo12:.LANCHOR52]
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bcc	.L1559
+	bcc	.L1563
 	ldrh	w0, [x19]
-	adrp	x1, .LANCHOR82
+	adrp	x1, .LANCHOR83
 	ldrh	w3, [x19, 4]
-	ldr	x2, [x1, #:lo12:.LANCHOR82]
+	ldr	x2, [x1, #:lo12:.LANCHOR83]
 	lsl	x0, x0, 1
 	ldrh	w1, [x2, x0]
 	sub	w1, w1, w3
 	strh	w1, [x2, x0]
-	adrp	x0, .LANCHOR51
+	adrp	x0, .LANCHOR52
 	strh	wzr, [x19, 4]
-	ldrh	w0, [x0, #:lo12:.LANCHOR51]
-	b	.L1574
-.L1571:
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
+	b	.L1578
+.L1575:
 	ret
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
 	.section	.text.get_new_active_ppa,"ax",@progbits
@@ -10744,96 +10777,96 @@ get_new_active_ppa:
 	stp	x23, x24, [sp, 48]
 	cmp	w1, w0
 	str	x25, [sp, 64]
-	bne	.L1576
-	mov	w2, 2986
+	bne	.L1580
+	mov	w2, 3025
 	adrp	x1, .LANCHOR205
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR205
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR205
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1576:
-	adrp	x20, .LANCHOR51
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1580:
+	adrp	x20, .LANCHOR52
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x20, #:lo12:.LANCHOR51]
+	ldrh	w0, [x20, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bne	.L1577
-	mov	w2, 2987
+	bne	.L1581
+	mov	w2, 3026
 	adrp	x1, .LANCHOR205
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR205
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR205
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1577:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1581:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1578
-	mov	w2, 2988
+	cbnz	w0, .L1582
+	mov	w2, 3027
 	adrp	x1, .LANCHOR205
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR205
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR205
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1578:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1582:
 	ldrb	w0, [x19, 6]
-	adrp	x21, .LANCHOR36
+	adrp	x21, .LANCHOR37
 	strb	wzr, [x19, 10]
 	adrp	x23, .LANCHOR8
 	add	x0, x0, 8
 	adrp	x24, .LANCHOR117
 	add	x23, x23, :lo12:.LANCHOR8
 	add	x24, x24, :lo12:.LANCHOR117
-	add	x25, x21, :lo12:.LANCHOR36
+	add	x25, x21, :lo12:.LANCHOR37
 	ldrh	w22, [x19, x0, lsl 1]
-.L1579:
+.L1583:
 	mov	w2, 65535
 	cmp	w22, w2
-	beq	.L1580
+	beq	.L1584
 	ldrb	w0, [x19, 8]
 	ldrh	w1, [x19, 4]
 	cmp	w0, 1
 	ldrh	w0, [x19, 2]
-	bne	.L1582
+	bne	.L1586
 	ldrb	w3, [x23]
-	cbnz	w3, .L1582
+	cbnz	w3, .L1586
 	ldrh	w3, [x24, w0, sxtw 1]
 	cmp	w3, w2
-	bne	.L1582
+	bne	.L1586
 	ldrh	w0, [x19]
 	sub	w1, w1, #1
 	strh	w1, [x19, 4]
 	bl	decrement_vpc_count
-.L1580:
+.L1584:
 	ldrb	w0, [x19, 6]
 	ldrh	w1, [x25]
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x19, 6]
 	cmp	w1, w0
-	bne	.L1581
+	bne	.L1585
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L1581:
+.L1585:
 	ldrb	w0, [x19, 6]
 	add	x0, x0, 8
 	ldrh	w22, [x19, x0, lsl 1]
-	b	.L1579
-.L1582:
+	b	.L1583
+.L1586:
 	adrp	x23, .LANCHOR8
 	adrp	x24, .LANCHOR117
 	orr	w22, w0, w22, lsl 10
@@ -10841,77 +10874,77 @@ get_new_active_ppa:
 	add	x24, x24, :lo12:.LANCHOR117
 	sub	w1, w1, #1
 	strh	w1, [x19, 4]
-.L1583:
+.L1587:
 	ldrb	w0, [x19, 6]
 	mov	w1, 65535
-	ldrh	w3, [x21, #:lo12:.LANCHOR36]
-.L1585:
+	ldrh	w3, [x21, #:lo12:.LANCHOR37]
+.L1589:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	cmp	w0, w3
-	bne	.L1584
+	bne	.L1588
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
 	mov	w0, 0
-.L1584:
+.L1588:
 	add	x2, x19, x0, sxtw 1
 	ldrh	w2, [x2, 16]
 	cmp	w2, w1
-	beq	.L1585
+	beq	.L1589
 	strb	w0, [x19, 6]
 	ldrb	w0, [x19, 8]
 	cmp	w0, 1
-	bne	.L1586
+	bne	.L1590
 	ldrb	w2, [x23]
 	ldrh	w0, [x19, 2]
-	cbnz	w2, .L1587
+	cbnz	w2, .L1591
 	ldrh	w0, [x24, w0, sxtw 1]
 	cmp	w0, w1
-	bne	.L1586
+	bne	.L1590
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1586
+	cbz	w0, .L1590
 	sub	w0, w0, #1
 	strh	w0, [x19, 4]
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-	b	.L1583
-.L1587:
-	adrp	x1, .LANCHOR52
-	ldrh	w1, [x1, #:lo12:.LANCHOR52]
+	b	.L1587
+.L1591:
+	adrp	x1, .LANCHOR53
+	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	cmp	w0, w1
-	bcc	.L1586
+	bcc	.L1590
 	ldrh	w0, [x19]
-	adrp	x1, .LANCHOR82
+	adrp	x1, .LANCHOR83
 	ldrh	w3, [x19, 4]
-	ldr	x2, [x1, #:lo12:.LANCHOR82]
+	ldr	x2, [x1, #:lo12:.LANCHOR83]
 	lsl	x0, x0, 1
 	ldrh	w1, [x2, x0]
 	sub	w1, w1, w3
 	strh	w1, [x2, x0]
 	strh	wzr, [x19, 4]
-	ldrh	w0, [x20, #:lo12:.LANCHOR51]
+	ldrh	w0, [x20, #:lo12:.LANCHOR52]
 	strh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
-.L1586:
+.L1590:
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x20, #:lo12:.LANCHOR51]
+	ldrh	w0, [x20, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bne	.L1575
+	bne	.L1579
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1575
-	mov	w2, 3032
+	cbz	w0, .L1579
+	mov	w2, 3071
 	adrp	x1, .LANCHOR205
-	adrp	x0, .LC4
+	adrp	x0, .LC6
 	add	x1, x1, :lo12:.LANCHOR205
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1575:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1579:
 	mov	w0, w22
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -10928,48 +10961,48 @@ FtlVpcTblFlush:
 	stp	x29, x30, [sp, -112]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR75
+	adrp	x23, .LANCHOR76
 	stp	x19, x20, [sp, 16]
-	ldr	w0, [x23, #:lo12:.LANCHOR75]
+	ldr	w0, [x23, #:lo12:.LANCHOR76]
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	str	x23, [x29, 104]
-	cbnz	w0, .L1600
+	cbnz	w0, .L1604
 	adrp	x25, .LANCHOR185
 	adrp	x28, .LANCHOR199
 	adrp	x27, .LANCHOR206
 	add	x21, x28, :lo12:.LANCHOR199
 	ldr	x20, [x25, #:lo12:.LANCHOR185]
-	adrp	x24, .LANCHOR79
+	adrp	x24, .LANCHOR180
 	ldrh	w2, [x27, #:lo12:.LANCHOR206]
 	add	x1, x27, :lo12:.LANCHOR206
-	ldr	x0, [x24, #:lo12:.LANCHOR79]
+	ldr	x0, [x24, #:lo12:.LANCHOR180]
 	mov	w3, 19539
 	stp	x0, x20, [x21, 8]
 	movk	w3, 0x4654, lsl 16
 	strh	w2, [x20, 2]
 	mov	w2, -3932
 	strh	w2, [x20]
-	adrp	x22, .LANCHOR157
+	adrp	x22, .LANCHOR156
 	ldr	w2, [x1, 8]
-	adrp	x26, .LANCHOR38
+	adrp	x26, .LANCHOR39
 	ldrh	w1, [x1, 6]
 	stp	w2, wzr, [x20, 4]
-	adrp	x2, .LANCHOR135
-	add	x19, x2, :lo12:.LANCHOR135
+	adrp	x2, .LANCHOR80
+	add	x19, x2, :lo12:.LANCHOR80
 	str	wzr, [x20, 12]
-	str	w3, [x2, #:lo12:.LANCHOR135]
-	mov	w2, 71
+	str	w3, [x2, #:lo12:.LANCHOR80]
+	mov	w2, 72
 	movk	w2, 0x5000, lsl 16
 	strh	w1, [x19, 8]
-	adrp	x1, .LANCHOR43
+	adrp	x1, .LANCHOR44
 	str	w2, [x19, 4]
-	adrp	x2, .LANCHOR90
-	ldrh	w1, [x1, #:lo12:.LANCHOR43]
+	adrp	x2, .LANCHOR91
+	ldrh	w1, [x1, #:lo12:.LANCHOR44]
 	strb	w1, [x19, 10]
-	add	x1, x2, :lo12:.LANCHOR90
-	ldrh	w2, [x2, #:lo12:.LANCHOR90]
+	add	x1, x2, :lo12:.LANCHOR91
+	ldrh	w2, [x2, #:lo12:.LANCHOR91]
 	strh	w2, [x19, 14]
 	ldrb	w3, [x1, 6]
 	ldrh	w2, [x1, 2]
@@ -10977,9 +11010,9 @@ FtlVpcTblFlush:
 	strb	w1, [x19, 11]
 	orr	w2, w3, w2, lsl 6
 	strh	w2, [x19, 16]
-	adrp	x2, .LANCHOR91
-	add	x1, x2, :lo12:.LANCHOR91
-	ldrh	w2, [x2, #:lo12:.LANCHOR91]
+	adrp	x2, .LANCHOR92
+	add	x1, x2, :lo12:.LANCHOR92
+	ldrh	w2, [x2, #:lo12:.LANCHOR92]
 	ldrb	w3, [x1, 6]
 	strh	w2, [x19, 18]
 	ldrh	w2, [x1, 2]
@@ -10987,26 +11020,26 @@ FtlVpcTblFlush:
 	strb	w1, [x19, 12]
 	orr	w2, w3, w2, lsl 6
 	strh	w2, [x19, 20]
-	adrp	x2, .LANCHOR92
-	add	x1, x2, :lo12:.LANCHOR92
-	ldrh	w2, [x2, #:lo12:.LANCHOR92]
+	adrp	x2, .LANCHOR93
+	add	x1, x2, :lo12:.LANCHOR93
+	ldrh	w2, [x2, #:lo12:.LANCHOR93]
 	strh	w2, [x19, 22]
 	ldrb	w3, [x1, 6]
 	ldrh	w2, [x1, 2]
 	ldrb	w1, [x1, 8]
 	strb	w1, [x19, 13]
-	adrp	x1, .LANCHOR165
+	adrp	x1, .LANCHOR164
 	orr	w2, w3, w2, lsl 6
 	strh	w2, [x19, 24]
-	ldr	w1, [x1, #:lo12:.LANCHOR165]
+	ldr	w1, [x1, #:lo12:.LANCHOR164]
 	str	w1, [x19, 32]
-	ldr	w1, [x22, #:lo12:.LANCHOR157]
+	ldr	w1, [x22, #:lo12:.LANCHOR156]
 	str	w1, [x19, 40]
-	adrp	x1, .LANCHOR158
-	ldr	w1, [x1, #:lo12:.LANCHOR158]
+	adrp	x1, .LANCHOR157
+	ldr	w1, [x1, #:lo12:.LANCHOR157]
 	str	w1, [x19, 36]
-	adrp	x1, .LANCHOR56
-	ldrh	w2, [x1, #:lo12:.LANCHOR56]
+	adrp	x1, .LANCHOR57
+	ldrh	w2, [x1, #:lo12:.LANCHOR57]
 	mov	w1, 255
 	bl	ftl_memset
 	ldr	x0, [x21, 8]
@@ -11014,14 +11047,14 @@ FtlVpcTblFlush:
 	mov	w2, 48
 	mov	x19, x28
 	bl	ftl_memcpy
-	adrp	x1, .LANCHOR82
-	ldrh	w2, [x26, #:lo12:.LANCHOR38]
+	adrp	x1, .LANCHOR83
+	ldrh	w2, [x26, #:lo12:.LANCHOR39]
 	ldr	x0, [x21, 8]
-	ldr	x1, [x1, #:lo12:.LANCHOR82]
+	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	lsl	w2, w2, 1
 	add	x0, x0, 48
 	bl	ftl_memcpy
-	ldrh	w0, [x26, #:lo12:.LANCHOR38]
+	ldrh	w0, [x26, #:lo12:.LANCHOR39]
 	adrp	x1, .LANCHOR0
 	ldr	x3, [x21, 8]
 	ldr	x1, [x1, #:lo12:.LANCHOR0]
@@ -11032,13 +11065,13 @@ FtlVpcTblFlush:
 	and	x0, x0, -4
 	add	x0, x3, x0
 	bl	ftl_memcpy
-	adrp	x0, .LANCHOR68
-	ldrh	w0, [x0, #:lo12:.LANCHOR68]
-	cbz	w0, .L1601
-	ldrh	w0, [x26, #:lo12:.LANCHOR38]
-	adrp	x1, .LANCHOR65
+	adrp	x0, .LANCHOR69
+	ldrh	w0, [x0, #:lo12:.LANCHOR69]
+	cbz	w0, .L1605
+	ldrh	w0, [x26, #:lo12:.LANCHOR39]
+	adrp	x1, .LANCHOR66
 	ldr	x3, [x21, 8]
-	ldrh	w2, [x1, #:lo12:.LANCHOR65]
+	ldrh	w2, [x1, #:lo12:.LANCHOR66]
 	lsr	w1, w0, 3
 	add	w0, w1, w0, lsl 1
 	adrp	x1, .LANCHOR128
@@ -11048,18 +11081,18 @@ FtlVpcTblFlush:
 	and	x0, x0, 65532
 	add	x0, x3, x0
 	bl	ftl_memcpy
-.L1601:
+.L1605:
 	mov	w0, 0
 	add	x28, x19, :lo12:.LANCHOR199
 	bl	FtlUpdateVaildLpn
 	add	x23, x27, :lo12:.LANCHOR206
 	mov	w21, 0
-	adrp	x27, .LANCHOR52
+	adrp	x27, .LANCHOR53
 	mov	w26, 65535
-	add	x0, x27, :lo12:.LANCHOR52
+	add	x0, x27, :lo12:.LANCHOR53
 	str	x0, [x29, 96]
-.L1602:
-	ldr	x0, [x24, #:lo12:.LANCHOR79]
+.L1606:
+	ldr	x0, [x24, #:lo12:.LANCHOR180]
 	mov	w3, 1
 	str	x0, [x28, 8]
 	mov	w2, w3
@@ -11072,22 +11105,22 @@ FtlVpcTblFlush:
 	str	w0, [x28, 4]
 	mov	x0, x28
 	bl	FlashProgPages
-	ldrh	w0, [x27, #:lo12:.LANCHOR52]
+	ldrh	w0, [x27, #:lo12:.LANCHOR53]
 	ldrh	w1, [x23, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L1603
+	blt	.L1607
 	ldrh	w0, [x23]
 	ldrh	w26, [x23, 4]
 	strh	wzr, [x23, 2]
 	strh	w0, [x23, 4]
 	bl	FtlFreeSysBlkQueueOut
 	strh	w0, [x23]
-	ldr	w1, [x22, #:lo12:.LANCHOR157]
+	ldr	w1, [x22, #:lo12:.LANCHOR156]
 	mov	w3, 1
 	str	w1, [x23, 8]
 	add	w2, w1, 1
-	str	w2, [x22, #:lo12:.LANCHOR157]
+	str	w2, [x22, #:lo12:.LANCHOR156]
 	ubfiz	w2, w0, 10, 16
 	str	w2, [x28, 4]
 	strh	w0, [x20, 2]
@@ -11096,50 +11129,50 @@ FtlVpcTblFlush:
 	mov	x0, x28
 	mov	w1, w3
 	bl	FlashProgPages
-.L1603:
+.L1607:
 	ldrh	w0, [x23, 2]
 	ldr	w1, [x28]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	strh	w0, [x23, 2]
 	cmn	w1, #1
-	bne	.L1604
+	bne	.L1608
 	cmp	w0, 1
-	bne	.L1605
-	mov	w2, 1180
+	bne	.L1609
+	mov	w2, 1213
 	adrp	x1, .LANCHOR207
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR207
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR207
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1605:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1609:
 	ldrh	w0, [x23, 2]
 	cmp	w0, 1
-	bne	.L1606
+	bne	.L1610
 	ldr	x0, [x29, 96]
 	ldrh	w0, [x0]
 	sub	w0, w0, #1
 	strh	w0, [x23, 2]
-.L1606:
+.L1610:
 	add	w21, w21, 1
 	and	w21, w21, 65535
 	cmp	w21, 3
-	bls	.L1602
+	bls	.L1606
 	add	x19, x19, :lo12:.LANCHOR199
 	mov	w2, w21
-	adrp	x0, .LC32
-	add	x0, x0, :lo12:.LC32
+	adrp	x0, .LC35
+	add	x0, x0, :lo12:.LC35
 	ldr	w1, [x19, 4]
 	bl	printf
 	ldr	x1, [x29, 104]
 	mov	w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR75]
-.L1600:
+	str	w0, [x1, #:lo12:.LANCHOR76]
+.L1604:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -11148,18 +11181,18 @@ FtlVpcTblFlush:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1604:
+.L1608:
 	cmp	w0, 1
-	beq	.L1602
+	beq	.L1606
 	cmp	w1, 256
-	beq	.L1602
+	beq	.L1606
 	mov	w0, 65535
 	cmp	w26, w0
-	beq	.L1600
+	beq	.L1604
 	mov	w1, 1
 	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-	b	.L1600
+	b	.L1604
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
 	.section	.text.FtlSuperblockPowerLostFix,"ax",@progbits
 	.align	2
@@ -11174,52 +11207,52 @@ FtlSuperblockPowerLostFix:
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L1628
+	cbz	w0, .L1632
 	ldrb	w20, [x19, 8]
 	cmp	w20, 1
-	bne	.L1628
+	bne	.L1632
 	ldrh	w21, [x19, 4]
-.L1620:
-	adrp	x22, .LANCHOR158
-	add	x22, x22, :lo12:.LANCHOR158
+.L1624:
+	adrp	x22, .LANCHOR157
+	add	x22, x22, :lo12:.LANCHOR157
 	mov	w24, -1
-	adrp	x23, .LANCHOR79
-.L1621:
+	adrp	x23, .LANCHOR180
+.L1625:
 	sub	w21, w21, #1
 	cmn	w21, #1
-	beq	.L1623
+	beq	.L1627
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1622
-.L1623:
+	cbnz	w0, .L1626
+.L1627:
 	ldrh	w0, [x19]
-	adrp	x1, .LANCHOR82
+	adrp	x1, .LANCHOR83
 	ldrh	w3, [x19, 4]
-	ldr	x2, [x1, #:lo12:.LANCHOR82]
+	ldr	x2, [x1, #:lo12:.LANCHOR83]
 	lsl	x0, x0, 1
 	ldrh	w1, [x2, x0]
 	sub	w1, w1, w3
 	strh	w1, [x2, x0]
-	adrp	x0, .LANCHOR51
+	adrp	x0, .LANCHOR52
 	strb	wzr, [x19, 6]
 	strh	wzr, [x19, 4]
-	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	strh	w0, [x19, 2]
 	ldp	x21, x22, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1628:
+.L1632:
 	mov	w20, 0
 	mov	w21, 12
-	b	.L1620
-.L1622:
+	b	.L1624
+.L1626:
 	mov	x0, x19
 	bl	get_new_active_ppa
 	str	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L1623
-	ldr	x0, [x23, #:lo12:.LANCHOR79]
+	beq	.L1627
+	ldr	x0, [x23, #:lo12:.LANCHOR180]
 	mov	w3, 0
 	str	x0, [x29, 80]
 	mov	w2, w20
@@ -11242,7 +11275,7 @@ FtlSuperblockPowerLostFix:
 	bl	FlashProgPages
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-	b	.L1621
+	b	.L1625
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
 	.section	.text.FtlLoadFactoryBbt,"ax",@progbits
 	.align	2
@@ -11250,34 +11283,34 @@ FtlSuperblockPowerLostFix:
 	.type	FtlLoadFactoryBbt, %function
 FtlLoadFactoryBbt:
 	stp	x29, x30, [sp, -112]!
-	adrp	x2, .LANCHOR79
+	adrp	x2, .LANCHOR180
 	adrp	x0, .LANCHOR199
 	add	x1, x0, :lo12:.LANCHOR199
 	add	x29, sp, 0
-	ldr	x2, [x2, #:lo12:.LANCHOR79]
+	ldr	x2, [x2, #:lo12:.LANCHOR180]
 	stp	x21, x22, [sp, 32]
 	mov	x22, x0
 	stp	x25, x26, [sp, 64]
-	adrp	x26, .LANCHOR49
+	adrp	x26, .LANCHOR50
 	stp	x27, x28, [sp, 80]
-	add	x28, x26, :lo12:.LANCHOR49
+	add	x28, x26, :lo12:.LANCHOR50
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR73
+	adrp	x20, .LANCHOR74
 	stp	x23, x24, [sp, 48]
-	add	x20, x20, :lo12:.LANCHOR73
+	add	x20, x20, :lo12:.LANCHOR74
 	str	x2, [x1, 8]
 	adrp	x2, .LANCHOR185
-	adrp	x23, .LANCHOR43
+	adrp	x23, .LANCHOR44
 	add	x20, x20, 12
 	ldr	x25, [x2, #:lo12:.LANCHOR185]
-	add	x23, x23, :lo12:.LANCHOR43
+	add	x23, x23, :lo12:.LANCHOR44
 	mov	w21, 0
 	mov	w27, -1
 	str	x25, [x1, 16]
-.L1635:
+.L1639:
 	ldrh	w0, [x23]
 	cmp	w21, w0
-	bcc	.L1640
+	bcc	.L1644
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -11286,18 +11319,18 @@ FtlLoadFactoryBbt:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1640:
-	ldrh	w19, [x26, #:lo12:.LANCHOR49]
+.L1644:
+	ldrh	w19, [x26, #:lo12:.LANCHOR50]
 	add	x24, x22, :lo12:.LANCHOR199
 	strh	w27, [x20]
 	mov	w3, 61664
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L1636:
+.L1640:
 	ldrh	w0, [x28]
 	sub	w1, w0, #15
 	cmp	w1, w19
-	bgt	.L1638
+	bgt	.L1642
 	madd	w0, w0, w21, w19
 	mov	w2, 1
 	str	w3, [x29, 108]
@@ -11309,19 +11342,19 @@ FtlLoadFactoryBbt:
 	ldr	w0, [x24]
 	ldr	w3, [x29, 108]
 	cmn	w0, #1
-	beq	.L1637
+	beq	.L1641
 	ldrh	w0, [x25]
 	cmp	w0, w3
-	bne	.L1637
+	bne	.L1641
 	strh	w19, [x20]
-.L1638:
+.L1642:
 	add	w21, w21, 1
 	add	x20, x20, 2
-	b	.L1635
-.L1637:
+	b	.L1639
+.L1641:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L1636
+	b	.L1640
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
 	.section	.text.FtlGetLastWrittenPage,"ax",@progbits
 	.align	2
@@ -11335,10 +11368,10 @@ FtlGetLastWrittenPage:
 	mov	w23, w1
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	bne	.L1646
-	adrp	x1, .LANCHOR52
-	ldrh	w19, [x1, #:lo12:.LANCHOR52]
-.L1647:
+	bne	.L1650
+	adrp	x1, .LANCHOR53
+	ldrh	w19, [x1, #:lo12:.LANCHOR53]
+.L1651:
 	sub	w19, w19, #1
 	lsl	w21, w0, 10
 	sxth	w19, w19
@@ -11352,24 +11385,24 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 128]
 	cmn	w0, #1
-	bne	.L1648
+	bne	.L1652
 	mov	w22, 0
 	mov	w24, 2
-.L1649:
+.L1653:
 	cmp	w22, w19
-	ble	.L1652
-.L1648:
+	ble	.L1656
+.L1652:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 192
 	ret
-.L1646:
-	adrp	x1, .LANCHOR51
-	ldrh	w19, [x1, #:lo12:.LANCHOR51]
-	b	.L1647
-.L1652:
+.L1650:
+	adrp	x1, .LANCHOR52
+	ldrh	w19, [x1, #:lo12:.LANCHOR52]
+	b	.L1651
+.L1656:
 	add	w20, w22, w19
 	mov	w2, w23
 	mov	w1, 1
@@ -11381,20 +11414,20 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 128]
 	cmn	w0, #1
-	bne	.L1650
+	bne	.L1654
 	ldr	w0, [x29, 132]
 	cmn	w0, #1
-	bne	.L1650
+	bne	.L1654
 	ldr	w0, [x29, 72]
 	cmn	w0, #1
-	beq	.L1650
+	beq	.L1654
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L1649
-.L1650:
+	b	.L1653
+.L1654:
 	add	w20, w20, 1
 	sxth	w22, w20
-	b	.L1649
+	b	.L1653
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
 	.section	.text.FtlLoadBbt,"ax",@progbits
 	.align	2
@@ -11402,28 +11435,31 @@ FtlGetLastWrittenPage:
 	.type	FtlLoadBbt, %function
 FtlLoadBbt:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR185
 	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR180
 	stp	x19, x20, [sp, 16]
+	adrp	x24, .LANCHOR50
 	stp	x21, x22, [sp, 32]
 	adrp	x22, .LANCHOR199
 	add	x20, x22, :lo12:.LANCHOR199
-	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR49
-	ldr	x21, [x0, #:lo12:.LANCHOR185]
+	ldr	x0, [x23, #:lo12:.LANCHOR180]
 	str	x25, [sp, 64]
-	mov	w24, 61649
-	stp	xzr, x21, [x20, 8]
+	mov	w25, 61649
+	str	x0, [x20, 8]
+	adrp	x0, .LANCHOR185
+	ldr	x21, [x0, #:lo12:.LANCHOR185]
+	str	x21, [x20, 16]
 	bl	FtlBbtMemInit
-	ldrh	w19, [x23, #:lo12:.LANCHOR49]
-	add	x23, x23, :lo12:.LANCHOR49
+	ldrh	w19, [x24, #:lo12:.LANCHOR50]
+	add	x24, x24, :lo12:.LANCHOR50
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L1658:
-	ldrh	w0, [x23]
+.L1662:
+	ldrh	w0, [x24]
 	sub	w0, w0, #47
 	cmp	w0, w19
-	bgt	.L1661
+	bgt	.L1665
 	lsl	w0, w19, 10
 	mov	w2, 1
 	str	w0, [x20, 4]
@@ -11432,7 +11468,7 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L1659
+	bne	.L1663
 	ldr	w0, [x20, 4]
 	mov	w2, 1
 	mov	w1, w2
@@ -11440,30 +11476,30 @@ FtlLoadBbt:
 	str	w0, [x20, 4]
 	mov	x0, x20
 	bl	FlashReadPages
-.L1659:
+.L1663:
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L1660
+	beq	.L1664
 	ldrh	w0, [x21]
-	cmp	w0, w24
-	bne	.L1660
-	adrp	x1, .LANCHOR73
-	add	x0, x1, :lo12:.LANCHOR73
-	strh	w19, [x1, #:lo12:.LANCHOR73]
+	cmp	w0, w25
+	bne	.L1664
+	adrp	x1, .LANCHOR74
+	add	x0, x1, :lo12:.LANCHOR74
+	strh	w19, [x1, #:lo12:.LANCHOR74]
 	ldr	w1, [x21, 4]
 	str	w1, [x0, 8]
 	ldrh	w1, [x21, 8]
 	strh	w1, [x0, 4]
-.L1661:
-	adrp	x19, .LANCHOR73
+.L1665:
+	adrp	x19, .LANCHOR74
 	mov	w0, 65535
-	add	x20, x19, :lo12:.LANCHOR73
-	ldrh	w1, [x19, #:lo12:.LANCHOR73]
+	add	x20, x19, :lo12:.LANCHOR74
+	ldrh	w1, [x19, #:lo12:.LANCHOR74]
 	cmp	w1, w0
-	beq	.L1675
+	beq	.L1679
 	ldrh	w1, [x20, 4]
 	cmp	w1, w0
-	beq	.L1665
+	beq	.L1669
 	add	x0, x22, :lo12:.LANCHOR199
 	lsl	w1, w1, 10
 	mov	w2, 1
@@ -11472,110 +11508,109 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x22, #:lo12:.LANCHOR199]
 	cmn	w0, #1
-	beq	.L1665
+	beq	.L1669
 	ldrh	w1, [x21]
 	mov	w0, 61649
 	cmp	w1, w0
-	bne	.L1665
+	bne	.L1669
 	ldr	w1, [x20, 8]
 	ldr	w0, [x21, 4]
 	cmp	w0, w1
-	bls	.L1665
+	bls	.L1669
 	ldrh	w1, [x20, 4]
 	str	w0, [x20, 8]
 	ldrh	w0, [x21, 8]
-	strh	w1, [x19, #:lo12:.LANCHOR73]
+	strh	w1, [x19, #:lo12:.LANCHOR74]
 	strh	w0, [x20, 4]
-.L1665:
-	ldrh	w0, [x19, #:lo12:.LANCHOR73]
-	add	x23, x19, :lo12:.LANCHOR73
+.L1669:
+	ldrh	w0, [x19, #:lo12:.LANCHOR74]
+	add	x24, x19, :lo12:.LANCHOR74
 	mov	w1, 1
-	adrp	x24, .LANCHOR79
 	mov	w25, 61649
 	bl	FtlGetLastWrittenPage
 	sxth	w20, w0
 	add	w0, w0, 1
-	strh	w0, [x23, 2]
-	add	x23, x22, :lo12:.LANCHOR199
-.L1667:
-	tbz	w20, #31, .L1670
-	mov	w2, 335
+	strh	w0, [x24, 2]
+	add	x24, x22, :lo12:.LANCHOR199
+.L1671:
+	tbz	w20, #31, .L1674
+	mov	w2, 336
 	adrp	x1, .LANCHOR208
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR208
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR208
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1669:
-	add	x0, x19, :lo12:.LANCHOR73
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1673:
+	add	x0, x19, :lo12:.LANCHOR74
 	ldrh	w1, [x21, 10]
 	strh	w1, [x0, 6]
 	mov	w1, 65535
 	ldrh	w0, [x21, 12]
 	cmp	w0, w1
-	beq	.L1672
-	adrp	x1, .LANCHOR35
-	ldr	w2, [x1, #:lo12:.LANCHOR35]
+	beq	.L1676
+	adrp	x1, .LANCHOR36
+	ldr	w2, [x1, #:lo12:.LANCHOR36]
 	cmp	w0, w2
-	beq	.L1672
-	adrp	x1, .LANCHOR39
-	ldrh	w1, [x1, #:lo12:.LANCHOR39]
+	beq	.L1676
+	adrp	x1, .LANCHOR40
+	ldrh	w1, [x1, #:lo12:.LANCHOR40]
 	lsr	w1, w1, 2
 	cmp	w2, w1
-	bcs	.L1672
+	bcs	.L1676
 	cmp	w0, w1
-	bcs	.L1672
+	bcs	.L1676
 	bl	FtlSysBlkNumInit
-.L1672:
-	add	x19, x19, :lo12:.LANCHOR73
-	adrp	x21, .LANCHOR43
+.L1676:
+	add	x19, x19, :lo12:.LANCHOR74
+	adrp	x21, .LANCHOR44
 	adrp	x23, .LANCHOR120
 	add	x19, x19, 32
-	add	x21, x21, :lo12:.LANCHOR43
+	add	x21, x21, :lo12:.LANCHOR44
 	add	x23, x23, :lo12:.LANCHOR120
 	add	x22, x22, :lo12:.LANCHOR199
 	mov	w20, 0
-.L1673:
+.L1677:
 	ldrh	w0, [x21]
 	cmp	w20, w0
-	bcc	.L1674
+	bcc	.L1678
 	mov	w0, 0
-.L1657:
+.L1661:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1660:
+.L1664:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L1658
-.L1670:
-	ldrh	w0, [x19, #:lo12:.LANCHOR73]
+	b	.L1662
+.L1674:
+	ldrh	w0, [x19, #:lo12:.LANCHOR74]
 	mov	w2, 1
 	mov	w1, w2
 	orr	w0, w20, w0, lsl 10
-	str	w0, [x23, 4]
-	ldr	x0, [x24, #:lo12:.LANCHOR79]
-	str	x0, [x23, 8]
-	mov	x0, x23
+	str	w0, [x24, 4]
+	ldr	x0, [x23, #:lo12:.LANCHOR180]
+	str	x0, [x24, 8]
+	mov	x0, x24
 	bl	FlashReadPages
-	ldr	w0, [x23]
+	ldr	w0, [x24]
 	cmn	w0, #1
-	beq	.L1668
+	beq	.L1672
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	beq	.L1669
-.L1668:
+	beq	.L1673
+.L1672:
 	sub	w20, w20, #1
 	sxth	w20, w20
-	b	.L1667
-.L1674:
+	b	.L1671
+.L1678:
 	ldrh	w2, [x23]
 	ldr	x0, [x22, 8]
 	mul	w1, w2, w20
@@ -11584,10 +11619,10 @@ FtlLoadBbt:
 	add	x1, x0, x1, lsl 2
 	ldr	x0, [x19], 8
 	bl	ftl_memcpy
-	b	.L1673
-.L1675:
+	b	.L1677
+.L1679:
 	mov	w0, -1
-	b	.L1657
+	b	.L1661
 	.size	FtlLoadBbt, .-FtlLoadBbt
 	.section	.text.ftl_map_blk_gc,"ax",@progbits
 	.align	2
@@ -11599,7 +11634,7 @@ ftl_map_blk_gc:
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR52
+	adrp	x21, .LANCHOR53
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
@@ -11611,29 +11646,29 @@ ftl_map_blk_gc:
 	sub	w1, w4, #4
 	cmp	w2, w1
 	ldrh	w1, [x19, 60]
-	bge	.L1688
+	bge	.L1692
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L1690
+	beq	.L1694
 	ldrh	w3, [x19, 2]
-	ldrh	w2, [x21, #:lo12:.LANCHOR52]
+	ldrh	w2, [x21, #:lo12:.LANCHOR53]
 	cmp	w3, w2
-	bcc	.L1691
-.L1688:
+	bcc	.L1695
+.L1692:
 	mov	w2, 65535
 	and	w0, w0, 65535
 	cmp	w1, w2
-	beq	.L1692
+	beq	.L1696
 	ldrh	w3, [x19, 2]
-	ldrh	w2, [x21, #:lo12:.LANCHOR52]
+	ldrh	w2, [x21, #:lo12:.LANCHOR53]
 	cmp	w2, w3
-	bls	.L1693
-.L1692:
+	bls	.L1697
+.L1696:
 	ubfiz	x0, x0, 1, 32
 	ldrh	w23, [x20, x0]
-	cbz	w23, .L1690
+	cbz	w23, .L1694
 	ldr	w1, [x19, 52]
-	cbnz	w1, .L1690
+	cbnz	w1, .L1694
 	mov	w1, 1
 	str	w1, [x19, 52]
 	strh	wzr, [x20, x0]
@@ -11641,33 +11676,33 @@ ftl_map_blk_gc:
 	ldrh	w1, [x19, 2]
 	sub	w0, w0, #1
 	strh	w0, [x19, 8]
-	ldrh	w0, [x21, #:lo12:.LANCHOR52]
+	ldrh	w0, [x21, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bcc	.L1698
+	bcc	.L1702
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L1698:
+.L1702:
 	adrp	x26, .LANCHOR199
-	adrp	x25, .LC34
+	adrp	x25, .LC37
 	add	x24, x26, :lo12:.LANCHOR199
-	add	x25, x25, :lo12:.LC34
+	add	x25, x25, :lo12:.LC37
 	mov	w20, 0
-.L1699:
+.L1703:
 	ldrh	w0, [x19, 6]
 	cmp	w0, w20
-	bhi	.L1703
+	bhi	.L1707
 	mov	w1, 1
 	mov	w0, w23
 	bl	FtlFreeSysBlkQueueIn
 	str	wzr, [x19, 52]
-.L1690:
+.L1694:
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x21, #:lo12:.LANCHOR52]
+	ldrh	w0, [x21, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bcc	.L1691
+	bcc	.L1695
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L1691:
+.L1695:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11676,35 +11711,35 @@ ftl_map_blk_gc:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1696:
+.L1700:
 	ldrh	w6, [x20, x2, lsl 1]
 	add	x5, x2, 1
 	cmp	w6, w1
-	beq	.L1694
+	beq	.L1698
 	mov	x2, x5
-.L1695:
+.L1699:
 	and	w23, w2, 65535
 	cmp	w23, w4
-	bcc	.L1696
+	bcc	.L1700
 	mov	w23, w0
-.L1694:
+.L1698:
 	and	x2, x2, 65535
-	adrp	x0, .LC33
-	add	x0, x0, :lo12:.LC33
+	adrp	x0, .LC36
+	add	x0, x0, :lo12:.LC36
 	ldrh	w2, [x20, x2, lsl 1]
 	bl	printf
 	mov	w0, -1
 	strh	w0, [x19, 60]
 	mov	w0, w23
-	b	.L1692
-.L1693:
+	b	.L1696
+.L1697:
 	mov	x2, 0
-	b	.L1695
-.L1703:
+	b	.L1699
+.L1707:
 	ubfiz	x27, x20, 2, 16
 	ldr	w1, [x22, x27]
 	cmp	w23, w1, lsr 10
-	bne	.L1700
+	bne	.L1704
 	adrp	x2, .LANCHOR181
 	add	x0, x26, :lo12:.LANCHOR199
 	ldr	x2, [x2, #:lo12:.LANCHOR181]
@@ -11718,49 +11753,49 @@ ftl_map_blk_gc:
 	bl	FlashReadPages
 	ldrh	w0, [x28, 8]
 	cmp	w0, w20
-	beq	.L1701
-	mov	w2, 638
+	beq	.L1705
+	mov	w2, 671
 	adrp	x1, .LANCHOR209
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR209
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR209
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1701:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1705:
 	ldr	w0, [x24]
 	cmn	w0, #1
-	bne	.L1702
+	bne	.L1706
 	str	wzr, [x22, x27]
 	mov	x0, x25
 	ldrh	w2, [x28, 8]
 	ldr	w1, [x24, 4]
 	bl	printf
-	adrp	x0, .LANCHOR75
+	adrp	x0, .LANCHOR76
 	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR75]
-.L1700:
+	str	w1, [x0, #:lo12:.LANCHOR76]
+.L1704:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L1699
-.L1702:
+	b	.L1703
+.L1706:
 	ldr	x2, [x24, 8]
 	mov	w1, w20
 	mov	x0, x19
 	bl	FtlMapWritePage
-	b	.L1700
+	b	.L1704
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
 	.section	.text.Ftl_write_map_blk_to_last_page,"ax",@progbits
 	.align	2
 	.global	Ftl_write_map_blk_to_last_page
 	.type	Ftl_write_map_blk_to_last_page, %function
 Ftl_write_map_blk_to_last_page:
-	adrp	x1, .LANCHOR75
-	ldr	w1, [x1, #:lo12:.LANCHOR75]
-	cbnz	w1, .L1719
+	adrp	x1, .LANCHOR76
+	ldr	w1, [x1, #:lo12:.LANCHOR76]
+	cbnz	w1, .L1723
 	stp	x29, x30, [sp, -64]!
 	mov	w1, 65535
 	add	x29, sp, 0
@@ -11771,21 +11806,21 @@ Ftl_write_map_blk_to_last_page:
 	ldr	x20, [x19, 16]
 	str	x23, [sp, 48]
 	cmp	w0, w1
-	bne	.L1710
+	bne	.L1714
 	ldrh	w0, [x19, 8]
-	cbz	w0, .L1711
-	mov	w2, 670
+	cbz	w0, .L1715
+	mov	w2, 703
 	adrp	x1, .LANCHOR210
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR210
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR210
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1711:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1715:
 	ldrh	w0, [x19, 8]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
@@ -11796,17 +11831,17 @@ Ftl_write_map_blk_to_last_page:
 	add	w0, w0, 1
 	strh	wzr, [x19]
 	str	w0, [x19, 48]
-.L1709:
+.L1713:
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1710:
+.L1714:
 	ubfiz	x0, x0, 1, 16
 	adrp	x1, .LANCHOR185
-	adrp	x23, .LANCHOR79
+	adrp	x23, .LANCHOR180
 	ldr	x22, [x19, 40]
 	ldr	x1, [x1, #:lo12:.LANCHOR185]
 	ldrh	w21, [x20, x0]
@@ -11815,7 +11850,7 @@ Ftl_write_map_blk_to_last_page:
 	add	x2, x20, :lo12:.LANCHOR199
 	orr	w0, w0, w21, lsl 10
 	str	w0, [x2, 4]
-	ldr	x0, [x23, #:lo12:.LANCHOR79]
+	ldr	x0, [x23, #:lo12:.LANCHOR180]
 	str	x1, [x2, 16]
 	str	x0, [x2, 8]
 	ldr	w2, [x19, 48]
@@ -11825,18 +11860,18 @@ Ftl_write_map_blk_to_last_page:
 	ldrh	w2, [x19, 4]
 	strh	w2, [x1]
 	strh	w21, [x1, 2]
-	adrp	x1, .LANCHOR52
-	ldrh	w2, [x1, #:lo12:.LANCHOR52]
+	adrp	x1, .LANCHOR53
+	ldrh	w2, [x1, #:lo12:.LANCHOR53]
 	mov	w1, 255
 	lsl	w2, w2, 3
 	bl	ftl_memset
 	ldrh	w4, [x19, 6]
 	mov	x1, 0
-	ldr	x3, [x23, #:lo12:.LANCHOR79]
+	ldr	x3, [x23, #:lo12:.LANCHOR180]
 	mov	w2, 0
-.L1712:
+.L1716:
 	cmp	w4, w1, uxth
-	bhi	.L1714
+	bhi	.L1718
 	mov	w2, 1
 	mov	w3, 0
 	mov	w1, w2
@@ -11847,11 +11882,11 @@ Ftl_write_map_blk_to_last_page:
 	strh	w0, [x19, 2]
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-	b	.L1709
-.L1714:
+	b	.L1713
+.L1718:
 	ldr	w0, [x22, x1, lsl 2]
 	cmp	w21, w0, lsr 10
-	bne	.L1713
+	bne	.L1717
 	add	w2, w2, 1
 	and	w2, w2, 65535
 	ubfiz	x0, x2, 1, 16
@@ -11859,10 +11894,10 @@ Ftl_write_map_blk_to_last_page:
 	add	x0, x0, 1
 	ldr	w5, [x22, x1, lsl 2]
 	str	w5, [x3, x0, lsl 2]
-.L1713:
+.L1717:
 	add	x1, x1, 1
-	b	.L1712
-.L1719:
+	b	.L1716
+.L1723:
 	mov	w0, 0
 	ret
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
@@ -11874,70 +11909,70 @@ FtlMapWritePage:
 	stp	x29, x30, [sp, -112]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR75
+	adrp	x24, .LANCHOR76
 	stp	x19, x20, [sp, 16]
-	ldr	w3, [x24, #:lo12:.LANCHOR75]
+	ldr	w3, [x24, #:lo12:.LANCHOR76]
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w3, .L1737
-	adrp	x23, .LANCHOR163
+	cbnz	w3, .L1741
+	adrp	x23, .LANCHOR162
 	adrp	x25, .LANCHOR211
 	mov	w22, w1
-	add	x23, x23, :lo12:.LANCHOR163
+	add	x23, x23, :lo12:.LANCHOR162
 	add	x25, x25, :lo12:.LANCHOR211
 	mov	x19, x0
-	adrp	x27, .LANCHOR52
+	adrp	x27, .LANCHOR53
 	mov	w21, 0
-	add	x0, x27, :lo12:.LANCHOR52
+	add	x0, x27, :lo12:.LANCHOR53
 	stp	x2, x0, [x29, 96]
-.L1724:
+.L1728:
 	ldr	w0, [x23]
 	ldrh	w1, [x19, 2]
 	add	w0, w0, 1
 	str	w0, [x23]
-	ldrh	w0, [x27, #:lo12:.LANCHOR52]
+	ldrh	w0, [x27, #:lo12:.LANCHOR53]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	bge	.L1725
+	bge	.L1729
 	ldrh	w1, [x19]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1726
-.L1725:
+	bne	.L1730
+.L1729:
 	mov	x0, x19
 	bl	Ftl_write_map_blk_to_last_page
-.L1726:
+.L1730:
 	ldrh	w1, [x19]
 	ldr	x0, [x19, 16]
 	ldrh	w0, [x0, x1, lsl 1]
-	cbnz	w0, .L1727
-	mov	w2, 731
+	cbnz	w0, .L1731
+	mov	w2, 764
 	mov	x1, x25
-	adrp	x0, .LC4
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1727:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1731:
 	ldrh	w1, [x19]
 	ldrh	w0, [x19, 10]
 	cmp	w1, w0
-	bcc	.L1728
-	mov	w2, 732
+	bcc	.L1732
+	mov	w2, 765
 	mov	x1, x25
-	adrp	x0, .LC4
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1728:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1732:
 	ldrh	w1, [x19]
 	adrp	x20, .LANCHOR199
 	ldr	x0, [x19, 16]
@@ -11972,32 +12007,32 @@ FtlMapWritePage:
 	and	w0, w0, 65535
 	strh	w0, [x19, 2]
 	cmn	w1, #1
-	bne	.L1729
+	bne	.L1733
 	ldr	w1, [x28, 4]
-	adrp	x0, .LC35
-	add	x0, x0, :lo12:.LC35
+	adrp	x0, .LC38
+	add	x0, x0, :lo12:.LC38
 	add	w21, w21, 1
 	and	w21, w21, 65535
 	bl	printf
 	ldrh	w0, [x19, 2]
 	cmp	w0, 2
-	bhi	.L1730
+	bhi	.L1734
 	ldr	x0, [x29, 104]
 	ldrh	w0, [x0]
 	sub	w0, w0, #1
 	strh	w0, [x19, 2]
-.L1730:
+.L1734:
 	cmp	w21, 3
-	bls	.L1724
+	bls	.L1728
 	add	x20, x20, :lo12:.LANCHOR199
 	mov	w2, w21
-	adrp	x0, .LC36
-	add	x0, x0, :lo12:.LC36
+	adrp	x0, .LC39
+	add	x0, x0, :lo12:.LC39
 	ldr	w1, [x20, 4]
 	bl	printf
 	mov	w0, 1
-	str	w0, [x24, #:lo12:.LANCHOR75]
-.L1737:
+	str	w0, [x24, #:lo12:.LANCHOR76]
+.L1741:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -12006,22 +12041,22 @@ FtlMapWritePage:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1729:
-	cbz	w1, .L1732
+.L1733:
+	cbz	w1, .L1736
 	strh	w26, [x19, 60]
 	cmp	w0, 1
-	beq	.L1724
+	beq	.L1728
 	cmp	w1, 256
-.L1745:
-	beq	.L1724
+.L1749:
+	beq	.L1728
 	add	x20, x20, :lo12:.LANCHOR199
 	ldr	x0, [x19, 40]
 	ldr	w1, [x20, 4]
 	str	w1, [x0, w22, uxtw 2]
-	b	.L1737
-.L1732:
+	b	.L1741
+.L1736:
 	cmp	w0, 1
-	b	.L1745
+	b	.L1749
 	.size	FtlMapWritePage, .-FtlMapWritePage
 	.section	.text.flush_l2p_region,"ax",@progbits
 	.align	2
@@ -12031,16 +12066,16 @@ flush_l2p_region:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR95
+	adrp	x20, .LANCHOR96
 	ubfiz	x19, x0, 4, 16
-	ldr	x0, [x20, #:lo12:.LANCHOR95]
+	ldr	x0, [x20, #:lo12:.LANCHOR96]
 	add	x1, x0, x19
 	ldr	x2, [x1, 8]
 	ldrh	w1, [x0, x19]
 	adrp	x0, .LANCHOR124
 	add	x0, x0, :lo12:.LANCHOR124
 	bl	FtlMapWritePage
-	ldr	x0, [x20, #:lo12:.LANCHOR95]
+	ldr	x0, [x20, #:lo12:.LANCHOR96]
 	add	x0, x0, x19
 	ldp	x19, x20, [sp, 16]
 	ldr	w1, [x0, 4]
@@ -12058,247 +12093,225 @@ l2p_flush:
 	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR66
-	add	x20, x20, :lo12:.LANCHOR66
+	adrp	x20, .LANCHOR67
+	add	x20, x20, :lo12:.LANCHOR67
 	str	x21, [sp, 32]
 	mov	w19, 0
-	adrp	x21, .LANCHOR95
-.L1749:
+	adrp	x21, .LANCHOR96
+.L1753:
 	ldrh	w0, [x20]
 	cmp	w0, w19
-	bhi	.L1751
+	bhi	.L1755
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1751:
-	ldr	x1, [x21, #:lo12:.LANCHOR95]
+.L1755:
+	ldr	x1, [x21, #:lo12:.LANCHOR96]
 	ubfiz	x0, x19, 4, 16
 	add	x0, x1, x0
 	ldr	w0, [x0, 4]
-	tbz	w0, #31, .L1750
+	tbz	w0, #31, .L1754
 	mov	w0, w19
 	bl	flush_l2p_region
-.L1750:
+.L1754:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1749
+	b	.L1753
 	.size	l2p_flush, .-l2p_flush
-	.section	.text.load_l2p_region,"ax",@progbits
+	.section	.text.log2phys,"ax",@progbits
 	.align	2
-	.global	load_l2p_region
-	.type	load_l2p_region, %function
-load_l2p_region:
-	stp	x29, x30, [sp, -64]!
+	.global	log2phys
+	.type	log2phys, %function
+log2phys:
+	stp	x29, x30, [sp, -112]!
 	add	x29, sp, 0
+	stp	x25, x26, [sp, 64]
+	mov	x25, x1
+	adrp	x1, .LANCHOR56
 	stp	x19, x20, [sp, 16]
-	and	w20, w0, 65535
-	adrp	x0, .LANCHOR65
-	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	and	x19, x1, 65535
-	ldrh	w0, [x0, #:lo12:.LANCHOR65]
-	cmp	w0, w20
-	bcs	.L1754
-	mov	w2, 503
+	mov	w26, w2
+	ldrh	w20, [x1, #:lo12:.LANCHOR56]
+	stp	x21, x22, [sp, 32]
+	add	w1, w20, 7
+	mov	x20, 1
+	stp	x27, x28, [sp, 80]
+	lsr	w24, w0, w1
+	and	w23, w24, 65535
+	lsl	x20, x20, x1
+	adrp	x1, .LANCHOR72
+	sub	w20, w20, #1
+	ldr	w1, [x1, #:lo12:.LANCHOR72]
+	and	w20, w20, w0
+	and	x20, x20, 65535
+	cmp	w0, w1
+	bcc	.L1758
+	mov	w2, 884
 	adrp	x1, .LANCHOR212
-	adrp	x0, .LC4
+	adrp	x0, .LC6
 	add	x1, x1, :lo12:.LANCHOR212
-	add	x0, x0, :lo12:.LC4
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
 	bl	printf
-	adrp	x1, .LC5
+.L1758:
+	adrp	x19, .LANCHOR96
+	adrp	x0, .LANCHOR67
+	ldr	x2, [x19, #:lo12:.LANCHOR96]
+	ldrh	w1, [x0, #:lo12:.LANCHOR67]
+	mov	x0, 0
+.L1759:
+	and	x21, x0, 65535
+	cmp	w21, w1
+	bcc	.L1764
+	bl	select_l2p_ram_region
+	and	x21, x0, 65535
+	ldr	x1, [x19, #:lo12:.LANCHOR96]
+	ubfiz	x22, x21, 4, 16
+	add	x2, x1, x22
+	ldrh	w3, [x1, x22]
+	mov	w1, 65535
+	cmp	w3, w1
+	beq	.L1765
+	ldr	w1, [x2, 4]
+	tbz	w1, #31, .L1765
+	bl	flush_l2p_region
+.L1765:
+	adrp	x0, .LANCHOR66
+	ldrh	w0, [x0, #:lo12:.LANCHOR66]
+	cmp	w0, w23
+	bcs	.L1766
+	mov	w2, 526
+	adrp	x1, .LANCHOR213
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR213
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1754:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1766:
 	adrp	x1, .LANCHOR128
-	ubfiz	x0, x20, 2, 16
-	adrp	x22, .LANCHOR95
+	ubfiz	x0, x23, 2, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR128]
-	ldr	w21, [x1, x0]
-	cbnz	w21, .L1755
-	ldr	x0, [x22, #:lo12:.LANCHOR95]
-	lsl	x19, x19, 4
-	adrp	x1, .LANCHOR56
-	add	x0, x0, x19
-	ldrh	w2, [x1, #:lo12:.LANCHOR56]
+	ldr	w27, [x1, x0]
+	cbnz	w27, .L1767
+	ldr	x0, [x19, #:lo12:.LANCHOR96]
+	adrp	x1, .LANCHOR57
+	add	x0, x0, x22
+	ldrh	w2, [x1, #:lo12:.LANCHOR57]
 	mov	w1, 255
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	ldr	x0, [x22, #:lo12:.LANCHOR95]
-	add	x1, x0, x19
-	strh	w20, [x0, x19]
+	ldr	x0, [x19, #:lo12:.LANCHOR96]
+	add	x1, x0, x22
+	strh	w23, [x0, x22]
 	str	wzr, [x1, 4]
-.L1756:
-	mov	w0, 0
+	b	.L1760
+.L1764:
+	add	x0, x0, 1
+	add	x3, x2, x0, lsl 4
+	ldrh	w3, [x3, -16]
+	cmp	w3, w23
+	bne	.L1759
+.L1760:
+	ldr	x0, [x19, #:lo12:.LANCHOR96]
+	add	x0, x0, x21, lsl 4
+	cbnz	w26, .L1761
+	ldr	x0, [x0, 8]
+	ldr	w0, [x0, x20, lsl 2]
+	str	w0, [x25]
+.L1762:
+	ldr	x0, [x19, #:lo12:.LANCHOR96]
+	add	x21, x0, x21, lsl 4
+	ldr	w0, [x21, 4]
+	cmn	w0, #1
+	beq	.L1771
+	add	w0, w0, 1
+	str	w0, [x21, 4]
+.L1771:
 	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 64
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
 	ret
-.L1755:
-	ldr	x0, [x22, #:lo12:.LANCHOR95]
-	lsl	x19, x19, 4
-	adrp	x24, .LANCHOR199
-	add	x23, x24, :lo12:.LANCHOR199
-	add	x0, x0, x19
+.L1761:
+	ldr	x1, [x0, 8]
+	ldr	w2, [x25]
+	str	w2, [x1, x20, lsl 2]
+	ldr	w1, [x0, 4]
+	orr	w1, w1, -2147483648
+	str	w1, [x0, 4]
+	adrp	x0, .LANCHOR97
+	strh	w23, [x0, #:lo12:.LANCHOR97]
+	b	.L1762
+.L1767:
+	ldr	x0, [x19, #:lo12:.LANCHOR96]
+	adrp	x3, .LANCHOR199
+	add	x28, x3, :lo12:.LANCHOR199
 	mov	w2, 1
+	add	x0, x0, x22
+	str	x3, [x29, 104]
 	mov	w1, w2
-	str	w21, [x23, 4]
+	str	w27, [x28, 4]
 	ldr	x0, [x0, 8]
-	str	x0, [x23, 8]
+	str	x0, [x28, 8]
 	adrp	x0, .LANCHOR185
 	ldr	x0, [x0, #:lo12:.LANCHOR185]
-	str	x0, [x23, 16]
-	mov	x0, x23
+	str	x0, [x28, 16]
+	mov	x0, x28
 	bl	FlashReadPages
-	ldr	x23, [x23, 16]
-	ldr	w0, [x24, #:lo12:.LANCHOR199]
+	ldr	x28, [x28, 16]
+	ldr	x3, [x29, 104]
+	ldr	w0, [x3, #:lo12:.LANCHOR199]
 	cmp	w0, 256
-	bne	.L1757
-	mov	w2, w21
-	mov	w1, w20
-	adrp	x0, .LC37
-	add	x0, x0, :lo12:.LC37
+	bne	.L1768
+	and	w24, w24, 65535
+	mov	w2, w27
+	mov	w1, w24
+	adrp	x0, .LC40
+	add	x0, x0, :lo12:.LC40
 	bl	printf
-	lsr	w21, w21, 10
-	ldr	x1, [x22, #:lo12:.LANCHOR95]
+	ldr	x1, [x19, #:lo12:.LANCHOR96]
 	adrp	x0, .LANCHOR124
 	add	x0, x0, :lo12:.LANCHOR124
-	add	x1, x1, x19
-	strh	w21, [x0, 60]
+	lsr	w27, w27, 10
+	add	x1, x1, x22
+	strh	w27, [x0, 60]
 	ldr	x2, [x1, 8]
-	mov	w1, w20
+	mov	w1, w24
 	bl	FtlMapWritePage
-.L1757:
-	ldrh	w0, [x23, 8]
-	cmp	w0, w20
-	beq	.L1758
-	mov	w2, 529
-	adrp	x1, .LANCHOR212
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR212
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
-	add	x0, x0, :lo12:.LC6
-	bl	printf
-.L1758:
-	ldr	x0, [x22, #:lo12:.LANCHOR95]
-	add	x1, x0, x19
-	str	wzr, [x1, 4]
-	strh	w20, [x0, x19]
-	b	.L1756
-	.size	load_l2p_region, .-load_l2p_region
-	.section	.text.log2phys,"ax",@progbits
-	.align	2
-	.global	log2phys
-	.type	log2phys, %function
-log2phys:
-	stp	x29, x30, [sp, -80]!
-	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	mov	x23, x1
-	adrp	x1, .LANCHOR55
-	stp	x19, x20, [sp, 16]
-	stp	x21, x22, [sp, 32]
-	mov	w24, w2
-	ldrh	w19, [x1, #:lo12:.LANCHOR55]
-	str	x25, [sp, 64]
-	add	w1, w19, 7
-	mov	x19, 1
-	lsr	w22, w0, w1
-	and	w22, w22, 65535
-	lsl	x19, x19, x1
-	adrp	x1, .LANCHOR71
-	sub	w19, w19, #1
-	ldr	w1, [x1, #:lo12:.LANCHOR71]
-	and	w19, w19, w0
-	and	x19, x19, 65535
-	cmp	w0, w1
-	bcc	.L1761
-	mov	w2, 851
+.L1768:
+	ldrh	w0, [x28, 8]
+	cmp	w0, w23
+	beq	.L1769
+	mov	w2, 552
 	adrp	x1, .LANCHOR213
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR213
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR213
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1761:
-	adrp	x21, .LANCHOR95
-	adrp	x0, .LANCHOR66
-	ldr	x2, [x21, #:lo12:.LANCHOR95]
-	ldrh	w1, [x0, #:lo12:.LANCHOR66]
-	mov	x0, 0
-.L1762:
-	and	x20, x0, 65535
-	cmp	w20, w1
-	bcc	.L1767
-	bl	select_l2p_ram_region
-	and	x20, x0, 65535
-	ldr	x2, [x21, #:lo12:.LANCHOR95]
-	ubfiz	x1, x20, 4, 16
-	mov	w25, w0
-	add	x3, x2, x1
-	ldrh	w2, [x2, x1]
-	mov	w1, 65535
-	cmp	w2, w1
-	beq	.L1768
-	ldr	w1, [x3, 4]
-	tbz	w1, #31, .L1768
-	bl	flush_l2p_region
-.L1768:
-	mov	w1, w25
-	mov	w0, w22
-	bl	load_l2p_region
-	b	.L1763
-.L1767:
-	add	x0, x0, 1
-	add	x3, x2, x0, lsl 4
-	ldrh	w3, [x3, -16]
-	cmp	w3, w22
-	bne	.L1762
-.L1763:
-	ldr	x0, [x21, #:lo12:.LANCHOR95]
-	add	x0, x0, x20, lsl 4
-	cbnz	w24, .L1764
-	ldr	x0, [x0, 8]
-	ldr	w0, [x0, x19, lsl 2]
-	str	w0, [x23]
-.L1765:
-	ldr	x0, [x21, #:lo12:.LANCHOR95]
-	add	x20, x0, x20, lsl 4
-	ldr	w0, [x20, 4]
-	cmn	w0, #1
-	beq	.L1770
-	add	w0, w0, 1
-	str	w0, [x20, 4]
-.L1770:
-	mov	w0, 0
-	ldr	x25, [sp, 64]
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 80
-	ret
-.L1764:
-	ldr	x1, [x0, 8]
-	ldr	w2, [x23]
-	str	w2, [x1, x19, lsl 2]
-	ldr	w1, [x0, 4]
-	orr	w1, w1, -2147483648
-	str	w1, [x0, 4]
-	adrp	x0, .LANCHOR96
-	strh	w22, [x0, #:lo12:.LANCHOR96]
-	b	.L1765
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1769:
+	ldr	x0, [x19, #:lo12:.LANCHOR96]
+	add	x1, x0, x22
+	str	wzr, [x1, 4]
+	strh	w23, [x0, x22]
+	b	.L1760
 	.size	log2phys, .-log2phys
 	.section	.text.FtlReUsePrevPpa,"ax",@progbits
 	.align	2
@@ -12308,65 +12321,65 @@ FtlReUsePrevPpa:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR82
+	adrp	x22, .LANCHOR83
 	stp	x19, x20, [sp, 16]
 	mov	w21, w0
 	str	w1, [x29, 76]
 	lsr	w0, w1, 10
 	str	x23, [sp, 48]
 	bl	P2V_block_in_plane
-	ldr	x2, [x22, #:lo12:.LANCHOR82]
+	ldr	x2, [x22, #:lo12:.LANCHOR83]
 	and	w3, w0, 65535
 	ubfiz	x20, x3, 1, 16
 	ldrh	w1, [x2, x20]
-	cbnz	w1, .L1776
-	adrp	x0, .LANCHOR86
-	ldr	x19, [x0, #:lo12:.LANCHOR86]
-	cbz	x19, .L1777
-	adrp	x2, .LANCHOR80
+	cbnz	w1, .L1777
+	adrp	x0, .LANCHOR87
+	ldr	x19, [x0, #:lo12:.LANCHOR87]
+	cbz	x19, .L1778
+	adrp	x2, .LANCHOR81
 	mov	x5, -6148914691236517206
 	movk	x5, 0xaaab, lsl 0
-	adrp	x23, .LANCHOR87
-	ldr	x2, [x2, #:lo12:.LANCHOR80]
+	adrp	x23, .LANCHOR88
+	ldr	x2, [x2, #:lo12:.LANCHOR81]
 	mov	w6, 65535
-	ldrh	w4, [x23, #:lo12:.LANCHOR87]
+	ldrh	w4, [x23, #:lo12:.LANCHOR88]
 	sub	x19, x19, x2
 	asr	x19, x19, 1
 	mul	x19, x19, x5
 	mov	w5, 6
 	and	w19, w19, 65535
-.L1778:
+.L1779:
 	cmp	w1, w4
-	beq	.L1777
+	beq	.L1778
 	cmp	w19, w3
-	bne	.L1779
+	bne	.L1780
 	mov	w1, w19
-	add	x0, x0, :lo12:.LANCHOR86
+	add	x0, x0, :lo12:.LANCHOR87
 	bl	List_remove_node
-	ldrh	w0, [x23, #:lo12:.LANCHOR87]
-	cbnz	w0, .L1780
-	mov	w2, 1825
+	ldrh	w0, [x23, #:lo12:.LANCHOR88]
+	cbnz	w0, .L1781
+	mov	w2, 1862
 	adrp	x1, .LANCHOR214
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR214
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR214
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1780:
-	ldrh	w0, [x23, #:lo12:.LANCHOR87]
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1781:
+	ldrh	w0, [x23, #:lo12:.LANCHOR88]
 	sub	w0, w0, #1
-	strh	w0, [x23, #:lo12:.LANCHOR87]
+	strh	w0, [x23, #:lo12:.LANCHOR88]
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-	ldr	x1, [x22, #:lo12:.LANCHOR82]
+	ldr	x1, [x22, #:lo12:.LANCHOR83]
 	ldrh	w0, [x1, x20]
 	add	w0, w0, 1
 	strh	w0, [x1, x20]
-.L1777:
+.L1778:
 	add	x1, x29, 76
 	mov	w2, 1
 	mov	w0, w21
@@ -12376,18 +12389,18 @@ FtlReUsePrevPpa:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1779:
+.L1780:
 	umull	x19, w19, w5
 	ldrh	w19, [x2, x19]
 	cmp	w19, w6
-	beq	.L1777
+	beq	.L1778
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L1778
-.L1776:
+	b	.L1779
+.L1777:
 	add	w1, w1, 1
 	strh	w1, [x2, x20]
-	b	.L1777
+	b	.L1778
 	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
 	.section	.text.FtlVendorPartWrite,"ax",@progbits
 	.align	2
@@ -12401,25 +12414,25 @@ FtlVendorPartWrite:
 	stp	x21, x22, [sp, 32]
 	add	w1, w0, w1
 	mov	w22, w0
-	adrp	x0, .LANCHOR48
+	adrp	x0, .LANCHOR49
 	stp	x23, x24, [sp, 48]
-	ldrh	w0, [x0, #:lo12:.LANCHOR48]
+	ldrh	w0, [x0, #:lo12:.LANCHOR49]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	cmp	w1, w0
-	bhi	.L1794
-	adrp	x0, .LANCHOR55
-	adrp	x26, .LANCHOR54
-	adrp	x27, .LANCHOR56
+	bhi	.L1795
+	adrp	x0, .LANCHOR56
+	adrp	x26, .LANCHOR55
+	adrp	x27, .LANCHOR57
 	mov	x25, x2
-	ldrh	w21, [x0, #:lo12:.LANCHOR55]
-	add	x26, x26, :lo12:.LANCHOR54
-	add	x27, x27, :lo12:.LANCHOR56
+	ldrh	w21, [x0, #:lo12:.LANCHOR56]
+	add	x26, x26, :lo12:.LANCHOR55
+	add	x27, x27, :lo12:.LANCHOR57
 	mov	w24, 0
 	lsr	w21, w22, w21
-.L1788:
-	cbnz	w20, .L1793
-.L1786:
+.L1789:
+	cbnz	w20, .L1794
+.L1787:
 	mov	w0, w24
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -12428,7 +12441,7 @@ FtlVendorPartWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1793:
+.L1794:
 	ldrh	w1, [x26]
 	adrp	x0, .LANCHOR191
 	adrp	x28, .LANCHOR182
@@ -12441,9 +12454,9 @@ FtlVendorPartWrite:
 	and	w19, w19, 65535
 	cmp	w20, w19
 	csel	w19, w0, w19, cc
-	cbz	w2, .L1790
+	cbz	w2, .L1791
 	cmp	w19, w1
-	beq	.L1790
+	beq	.L1791
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
 	str	w2, [x29, 124]
 	mov	w2, 1
@@ -12451,7 +12464,7 @@ FtlVendorPartWrite:
 	mov	w1, w2
 	add	x0, x29, 120
 	bl	FlashReadPages
-.L1791:
+.L1792:
 	lsl	w3, w19, 9
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
 	lsl	w23, w23, 7
@@ -12472,30 +12485,30 @@ FtlVendorPartWrite:
 	ldr	w3, [x29, 108]
 	csinv	w24, w24, wzr, ne
 	add	x25, x25, x3, sxtw
-	b	.L1788
-.L1790:
+	b	.L1789
+.L1791:
 	ldrh	w2, [x27]
 	mov	w1, 0
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
 	bl	ftl_memset
-	b	.L1791
-.L1794:
+	b	.L1792
+.L1795:
 	mov	w24, -1
-	b	.L1786
+	b	.L1787
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.section	.text.Ftl_save_ext_data,"ax",@progbits
 	.align	2
 	.global	Ftl_save_ext_data
 	.type	Ftl_save_ext_data, %function
 Ftl_save_ext_data:
-	adrp	x0, .LANCHOR136
-	add	x2, x0, :lo12:.LANCHOR136
-	ldr	w1, [x0, #:lo12:.LANCHOR136]
+	adrp	x0, .LANCHOR135
+	add	x2, x0, :lo12:.LANCHOR135
+	ldr	w1, [x0, #:lo12:.LANCHOR135]
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1799
-	mov	w0, 71
+	bne	.L1800
+	mov	w0, 72
 	mov	w1, 1
 	movk	w0, 0x5000, lsl 16
 	str	w0, [x2, 4]
@@ -12505,45 +12518,45 @@ Ftl_save_ext_data:
 	adrp	x0, .LANCHOR217
 	ldr	w0, [x0, #:lo12:.LANCHOR217]
 	str	w0, [x2, 92]
+	adrp	x0, .LANCHOR158
+	ldr	w0, [x0, #:lo12:.LANCHOR158]
+	str	w0, [x2, 8]
 	adrp	x0, .LANCHOR159
 	ldr	w0, [x0, #:lo12:.LANCHOR159]
-	str	w0, [x2, 8]
-	adrp	x0, .LANCHOR160
-	ldr	w0, [x0, #:lo12:.LANCHOR160]
 	str	w0, [x2, 12]
-	adrp	x0, .LANCHOR164
-	ldr	w0, [x0, #:lo12:.LANCHOR164]
-	str	w0, [x2, 16]
 	adrp	x0, .LANCHOR163
 	ldr	w0, [x0, #:lo12:.LANCHOR163]
+	str	w0, [x2, 16]
+	adrp	x0, .LANCHOR162
+	ldr	w0, [x0, #:lo12:.LANCHOR162]
 	str	w0, [x2, 20]
-	adrp	x0, .LANCHOR166
-	ldr	w0, [x0, #:lo12:.LANCHOR166]
+	adrp	x0, .LANCHOR165
+	ldr	w0, [x0, #:lo12:.LANCHOR165]
 	str	w0, [x2, 28]
-	adrp	x0, .LANCHOR78
-	ldr	w0, [x0, #:lo12:.LANCHOR78]
+	adrp	x0, .LANCHOR79
+	ldr	w0, [x0, #:lo12:.LANCHOR79]
 	str	w0, [x2, 32]
+	adrp	x0, .LANCHOR160
+	ldr	w0, [x0, #:lo12:.LANCHOR160]
+	str	w0, [x2, 36]
 	adrp	x0, .LANCHOR161
 	ldr	w0, [x0, #:lo12:.LANCHOR161]
-	str	w0, [x2, 36]
-	adrp	x0, .LANCHOR162
-	ldr	w0, [x0, #:lo12:.LANCHOR162]
 	str	w0, [x2, 40]
+	adrp	x0, .LANCHOR166
+	ldr	w0, [x0, #:lo12:.LANCHOR166]
+	str	w0, [x2, 44]
 	adrp	x0, .LANCHOR167
 	ldr	w0, [x0, #:lo12:.LANCHOR167]
-	str	w0, [x2, 44]
-	adrp	x0, .LANCHOR168
-	ldr	w0, [x0, #:lo12:.LANCHOR168]
 	str	w0, [x2, 48]
-	adrp	x0, .LANCHOR156
-	ldr	w0, [x0, #:lo12:.LANCHOR156]
-	str	w0, [x2, 60]
 	adrp	x0, .LANCHOR155
 	ldr	w0, [x0, #:lo12:.LANCHOR155]
+	str	w0, [x2, 60]
+	adrp	x0, .LANCHOR154
+	ldr	w0, [x0, #:lo12:.LANCHOR154]
 	str	w0, [x2, 64]
 	mov	w0, 0
 	b	FtlVendorPartWrite
-.L1799:
+.L1800:
 	ret
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
 	.section	.text.FtlEctTblFlush,"ax",@progbits
@@ -12551,33 +12564,33 @@ Ftl_save_ext_data:
 	.global	FtlEctTblFlush
 	.type	FtlEctTblFlush, %function
 FtlEctTblFlush:
-	adrp	x1, .LANCHOR101
-	ldr	w1, [x1, #:lo12:.LANCHOR101]
-	cbz	w1, .L1806
-	adrp	x1, .LANCHOR168
+	adrp	x1, .LANCHOR28
+	ldr	w1, [x1, #:lo12:.LANCHOR28]
+	cbz	w1, .L1807
+	adrp	x1, .LANCHOR167
 	mov	w2, 4
-	ldr	w1, [x1, #:lo12:.LANCHOR168]
+	ldr	w1, [x1, #:lo12:.LANCHOR167]
 	cmp	w1, 29
 	mov	w1, 32
 	csel	w1, w1, w2, hi
-.L1802:
+.L1803:
 	adrp	x3, .LANCHOR218
 	ldrh	w2, [x3, #:lo12:.LANCHOR218]
 	cmp	w2, 31
-	bhi	.L1803
+	bhi	.L1804
 	add	w2, w2, 1
 	mov	w1, 1
 	strh	w2, [x3, #:lo12:.LANCHOR218]
-.L1803:
+.L1804:
 	adrp	x2, .LANCHOR188
-	cbnz	w0, .L1804
+	cbnz	w0, .L1805
 	ldr	x0, [x2, #:lo12:.LANCHOR188]
 	ldr	w3, [x0, 20]
 	ldr	w0, [x0, 16]
 	add	w1, w1, w3
 	cmp	w0, w1
-	bcc	.L1809
-.L1804:
+	bcc	.L1810
+.L1805:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	ldr	x2, [x2, #:lo12:.LANCHOR188]
@@ -12600,10 +12613,10 @@ FtlEctTblFlush:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1806:
+.L1807:
 	mov	w1, 32
-	b	.L1802
-.L1809:
+	b	.L1803
+.L1810:
 	mov	w0, 0
 	ret
 	.size	FtlEctTblFlush, .-FtlEctTblFlush
@@ -12617,115 +12630,115 @@ allocate_new_data_superblock:
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
 	ldrh	w20, [x0]
-	adrp	x0, .LANCHOR38
+	adrp	x0, .LANCHOR39
 	str	x21, [sp, 32]
-	ldrh	w0, [x0, #:lo12:.LANCHOR38]
+	ldrh	w0, [x0, #:lo12:.LANCHOR39]
 	cmp	w0, w20
-	bcs	.L1812
-	mov	w2, 2943
+	bcs	.L1813
+	mov	w2, 2982
 	adrp	x1, .LANCHOR219
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR219
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR219
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1812:
-	adrp	x0, .LANCHOR75
-	ldr	w0, [x0, #:lo12:.LANCHOR75]
-	cbnz	w0, .L1813
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1813:
+	adrp	x0, .LANCHOR76
+	ldr	w0, [x0, #:lo12:.LANCHOR76]
+	cbnz	w0, .L1814
 	mov	w0, 65535
 	cmp	w20, w0
-	beq	.L1814
-	adrp	x1, .LANCHOR82
+	beq	.L1815
+	adrp	x1, .LANCHOR83
 	ubfiz	x0, x20, 1, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR82]
+	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1815
+	cbz	w0, .L1816
 	mov	w0, w20
 	bl	INSERT_DATA_LIST
-.L1814:
+.L1815:
 	strb	wzr, [x19, 8]
-	adrp	x0, .LANCHOR91
-	add	x0, x0, :lo12:.LANCHOR91
+	adrp	x0, .LANCHOR92
+	add	x0, x0, :lo12:.LANCHOR92
 	cmp	x19, x0
-	beq	.L1816
-	adrp	x0, .LANCHOR42
-	ldrh	w1, [x0, #:lo12:.LANCHOR42]
+	beq	.L1817
+	adrp	x0, .LANCHOR43
+	ldrh	w1, [x0, #:lo12:.LANCHOR43]
 	cmp	w1, 1
-	beq	.L1816
+	beq	.L1817
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L1817
-.L1816:
+	cbz	w0, .L1818
+.L1817:
 	mov	w0, 1
 	strb	w0, [x19, 8]
-.L1818:
+.L1819:
 	adrp	x1, .LANCHOR130
 	mov	w2, 65535
 	mov	x21, x1
 	ldrh	w0, [x1, #:lo12:.LANCHOR130]
 	cmp	w0, w2
-	beq	.L1823
+	beq	.L1824
 	cmp	w20, w0
-	bne	.L1824
-	adrp	x2, .LANCHOR82
+	bne	.L1825
+	adrp	x2, .LANCHOR83
 	ubfiz	x1, x0, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR82]
+	ldr	x2, [x2, #:lo12:.LANCHOR83]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1825
-.L1824:
-	bl	update_vpc_list
+	cbz	w1, .L1826
 .L1825:
+	bl	update_vpc_list
+.L1826:
 	mov	w0, -1
 	strh	w0, [x21, #:lo12:.LANCHOR130]
-.L1823:
+.L1824:
 	mov	x0, x19
 	bl	allocate_data_superblock
 	bl	l2p_flush
 	mov	w0, 0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1813:
+.L1814:
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1815:
+.L1816:
 	mov	w0, w20
 	bl	INSERT_FREE_LIST
-	b	.L1814
-.L1817:
-	adrp	x0, .LANCHOR90
-	add	x2, x0, :lo12:.LANCHOR90
+	b	.L1815
+.L1818:
+	adrp	x0, .LANCHOR91
+	add	x2, x0, :lo12:.LANCHOR91
 	cmp	x19, x2
-	bne	.L1818
+	bne	.L1819
 	cmp	w1, 3
-	beq	.L1820
-	adrp	x1, .LANCHOR156
-	ldr	w1, [x1, #:lo12:.LANCHOR156]
+	beq	.L1821
+	adrp	x1, .LANCHOR155
+	ldr	w1, [x1, #:lo12:.LANCHOR155]
 	cmp	w1, 1
-	bne	.L1821
-.L1820:
-	add	x1, x0, :lo12:.LANCHOR90
+	bne	.L1822
+.L1821:
+	add	x1, x0, :lo12:.LANCHOR91
 	mov	w2, 1
 	strb	w2, [x1, 8]
-.L1821:
-	adrp	x1, .LANCHOR101
-	ldr	w1, [x1, #:lo12:.LANCHOR101]
-	cbz	w1, .L1818
-	adrp	x1, .LANCHOR168
-	ldr	w1, [x1, #:lo12:.LANCHOR168]
+.L1822:
+	adrp	x1, .LANCHOR28
+	ldr	w1, [x1, #:lo12:.LANCHOR28]
+	cbz	w1, .L1819
+	adrp	x1, .LANCHOR167
+	ldr	w1, [x1, #:lo12:.LANCHOR167]
 	cmp	w1, 29
-	bhi	.L1818
-	add	x0, x0, :lo12:.LANCHOR90
+	bhi	.L1819
+	add	x0, x0, :lo12:.LANCHOR91
 	mov	w1, 1
 	strb	w1, [x0, 8]
-	b	.L1818
+	b	.L1819
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
 	.section	.text.FtlProgPages,"ax",@progbits
 	.align	2
@@ -12743,38 +12756,38 @@ FtlProgPages:
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
 	mov	x20, x3
 	str	x25, [sp, 64]
-	cbz	w0, .L1853
+	cbz	w0, .L1854
 	ldrb	w0, [x3, 8]
 	cmp	w0, 1
 	cset	w22, eq
-.L1840:
+.L1841:
 	ldrb	w3, [x20, 9]
 	mov	w1, w21
 	mov	w2, w22
 	mov	x0, x19
-	adrp	x24, .LANCHOR51
-	adrp	x23, .LANCHOR136
-	add	x24, x24, :lo12:.LANCHOR51
-	add	x23, x23, :lo12:.LANCHOR136
+	adrp	x24, .LANCHOR52
+	adrp	x23, .LANCHOR135
+	add	x24, x24, :lo12:.LANCHOR52
+	add	x23, x23, :lo12:.LANCHOR135
 	bl	FlashProgPages
 	mov	w0, 56
 	umaddl	x21, w21, w0, x19
-.L1841:
+.L1842:
 	cmp	x21, x19
-	beq	.L1850
-	adrp	x25, .LANCHOR82
-	b	.L1851
-.L1853:
+	beq	.L1851
+	adrp	x25, .LANCHOR83
+	b	.L1852
+.L1854:
 	mov	w22, 0
-	b	.L1840
-.L1844:
+	b	.L1841
+.L1845:
 	ldr	w0, [x19, 4]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	ldrh	w2, [x20]
 	cmp	w2, w0, uxth
-	bne	.L1842
-	ldr	x1, [x25, #:lo12:.LANCHOR82]
+	bne	.L1843
+	ldr	x1, [x25, #:lo12:.LANCHOR83]
 	ubfiz	x2, x2, 1, 16
 	ldrh	w3, [x20, 4]
 	ldrh	w0, [x1, x2]
@@ -12784,12 +12797,12 @@ FtlProgPages:
 	ldrh	w0, [x24]
 	strh	w0, [x20, 2]
 	strh	wzr, [x20, 4]
-.L1842:
+.L1843:
 	ldrh	w0, [x20, 4]
-	cbnz	w0, .L1843
+	cbnz	w0, .L1844
 	mov	x0, x20
 	bl	allocate_new_data_superblock
-.L1843:
+.L1844:
 	ldr	w0, [x23, 96]
 	add	w0, w0, 1
 	str	w0, [x23, 96]
@@ -12805,30 +12818,30 @@ FtlProgPages:
 	ldrb	w3, [x20, 9]
 	mov	x0, x19
 	bl	FlashProgPages
-.L1851:
+.L1852:
 	ldr	w0, [x19]
 	cmn	w0, #1
-	beq	.L1844
-	adrp	x0, .LANCHOR36
+	beq	.L1845
+	adrp	x0, .LANCHOR37
 	ldrb	w1, [x20, 6]
-	ldrh	w0, [x0, #:lo12:.LANCHOR36]
+	ldrh	w0, [x0, #:lo12:.LANCHOR37]
 	cmp	w1, w0
-	bcc	.L1845
-	mov	w2, 1552
+	bcc	.L1846
+	mov	w2, 1564
 	adrp	x1, .LANCHOR220
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR220
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1845:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1846:
 	ldr	w0, [x19, 4]
-	cbnz	w22, .L1846
-.L1858:
+	cbnz	w22, .L1847
+.L1859:
 	str	w0, [x29, 92]
 	add	x1, x29, 92
 	ldr	w0, [x19, 24]
@@ -12841,43 +12854,43 @@ FtlProgPages:
 	and	w1, w0, 65535
 	mov	w25, w1
 	cmn	w3, #1
-	beq	.L1848
-	adrp	x2, .LANCHOR82
+	beq	.L1849
+	adrp	x2, .LANCHOR83
 	ubfiz	x0, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR82]
+	ldr	x2, [x2, #:lo12:.LANCHOR83]
 	ldrh	w0, [x2, x0]
-	cbnz	w0, .L1849
-	adrp	x0, .LC38
+	cbnz	w0, .L1850
+	adrp	x0, .LC41
 	mov	w2, 0
-	add	x0, x0, :lo12:.LC38
+	add	x0, x0, :lo12:.LC41
 	bl	printf
-.L1849:
+.L1850:
 	mov	w0, w25
 	bl	decrement_vpc_count
-.L1848:
+.L1849:
 	add	x19, x19, 56
-	b	.L1841
-.L1846:
+	b	.L1842
+.L1847:
 	orr	w0, w0, -2147483648
-	b	.L1858
-.L1850:
-	adrp	x0, .LANCHOR36
+	b	.L1859
+.L1851:
+	adrp	x0, .LANCHOR37
 	ldrb	w1, [x20, 6]
-	ldrh	w0, [x0, #:lo12:.LANCHOR36]
+	ldrh	w0, [x0, #:lo12:.LANCHOR37]
 	cmp	w1, w0
-	bcc	.L1839
-	mov	w2, 1569
+	bcc	.L1840
+	mov	w2, 1581
 	adrp	x1, .LANCHOR220
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR220
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1839:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1840:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -12895,14 +12908,14 @@ FtlCacheWriteBack:
 	str	x19, [sp, 16]
 	adrp	x19, .LANCHOR129
 	ldr	x0, [x19, #:lo12:.LANCHOR129]
-	cbz	x0, .L1860
+	cbz	x0, .L1861
 	adrp	x1, .LANCHOR221
 	mov	w2, 0
 	ldr	x3, [x1, #:lo12:.LANCHOR221]
 	mov	w1, 1
 	bl	FtlProgPages
 	str	xzr, [x19, #:lo12:.LANCHOR129]
-.L1860:
+.L1861:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -12914,67 +12927,67 @@ FtlCacheWriteBack:
 	.type	ftl_discard, %function
 ftl_discard:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR67
+	adrp	x0, .LANCHOR68
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w20, w1
-	ldr	w0, [x0, #:lo12:.LANCHOR67]
+	ldr	w0, [x0, #:lo12:.LANCHOR68]
 	add	w1, w1, w2
 	stp	x21, x22, [sp, 32]
 	str	x23, [sp, 48]
 	cmp	w1, w0
-	bhi	.L1873
+	bhi	.L1874
 	mov	w19, w2
 	cmp	w2, 31
-	bhi	.L1867
-.L1881:
+	bhi	.L1868
+.L1882:
 	mov	w0, 0
-.L1865:
+.L1866:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1867:
-	adrp	x22, .LANCHOR54
+.L1868:
+	adrp	x22, .LANCHOR55
 	bl	FtlCacheWriteBack
-	ldrh	w0, [x22, #:lo12:.LANCHOR54]
+	ldrh	w0, [x22, #:lo12:.LANCHOR55]
 	udiv	w21, w20, w0
 	msub	w20, w0, w21, w20
 	ands	w20, w20, 65535
-	beq	.L1868
+	beq	.L1869
 	sub	w0, w0, w20
 	add	w21, w21, 1
 	cmp	w0, w19
 	csel	w0, w0, w19, ls
 	sub	w19, w19, w0, uxth
-.L1868:
+.L1869:
 	adrp	x20, .LANCHOR222
-	adrp	x23, .LANCHOR161
+	adrp	x23, .LANCHOR160
 	add	x20, x20, :lo12:.LANCHOR222
-	add	x23, x23, :lo12:.LANCHOR161
+	add	x23, x23, :lo12:.LANCHOR160
 	mov	w0, -1
 	str	w0, [x29, 76]
-.L1869:
-	ldrh	w0, [x22, #:lo12:.LANCHOR54]
+.L1870:
+	ldrh	w0, [x22, #:lo12:.LANCHOR55]
 	cmp	w19, w0
-	bcs	.L1871
+	bcs	.L1872
 	adrp	x0, .LANCHOR222
 	ldr	w1, [x0, #:lo12:.LANCHOR222]
 	cmp	w1, 32
-	bls	.L1881
+	bls	.L1882
 	str	wzr, [x0, #:lo12:.LANCHOR222]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L1881
-.L1871:
+	b	.L1882
+.L1872:
 	mov	w2, 0
 	add	x1, x29, 72
 	mov	w0, w21
 	bl	log2phys
 	ldr	w0, [x29, 72]
 	cmn	w0, #1
-	beq	.L1870
+	beq	.L1871
 	ldr	w0, [x20]
 	mov	w2, 1
 	add	x1, x29, 76
@@ -12989,23 +13002,23 @@ ftl_discard:
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L1870:
-	ldrh	w0, [x22, #:lo12:.LANCHOR54]
+.L1871:
+	ldrh	w0, [x22, #:lo12:.LANCHOR55]
 	add	w21, w21, 1
 	sub	w19, w19, w0
-	b	.L1869
-.L1873:
+	b	.L1870
+.L1874:
 	mov	w0, -1
-	b	.L1865
+	b	.L1866
 	.size	ftl_discard, .-ftl_discard
 	.section	.text.FtlSysFlush,"ax",@progbits
 	.align	2
 	.global	FtlSysFlush
 	.type	FtlSysFlush, %function
 FtlSysFlush:
-	adrp	x0, .LANCHOR75
-	ldr	w0, [x0, #:lo12:.LANCHOR75]
-	cbnz	w0, .L1885
+	adrp	x0, .LANCHOR76
+	ldr	w0, [x0, #:lo12:.LANCHOR76]
+	cbnz	w0, .L1886
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	FtlCacheWriteBack
@@ -13016,7 +13029,7 @@ FtlSysFlush:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1885:
+.L1886:
 	mov	w0, 0
 	ret
 	.size	FtlSysFlush, .-FtlSysFlush
@@ -13028,14 +13041,14 @@ FtlDeInit:
 	adrp	x0, .LANCHOR223
 	ldr	w0, [x0, #:lo12:.LANCHOR223]
 	cmp	w0, 1
-	bne	.L1891
+	bne	.L1892
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	FtlSysFlush
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1891:
+.L1892:
 	mov	w0, 0
 	ret
 	.size	FtlDeInit, .-FtlDeInit
@@ -13062,27 +13075,27 @@ FtlVendorPartRead:
 	mov	w22, w0
 	mov	w21, w1
 	add	w1, w0, w1
-	adrp	x0, .LANCHOR48
+	adrp	x0, .LANCHOR49
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
-	ldrh	w0, [x0, #:lo12:.LANCHOR48]
+	ldrh	w0, [x0, #:lo12:.LANCHOR49]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	cmp	w1, w0
-	bhi	.L1905
-	adrp	x0, .LANCHOR55
+	bhi	.L1906
+	adrp	x0, .LANCHOR56
 	adrp	x26, .LANCHOR182
 	mov	x25, x2
 	mov	x28, x26
-	ldrh	w20, [x0, #:lo12:.LANCHOR55]
+	ldrh	w20, [x0, #:lo12:.LANCHOR56]
 	mov	w24, 0
-	adrp	x0, .LANCHOR54
-	add	x0, x0, :lo12:.LANCHOR54
+	adrp	x0, .LANCHOR55
+	add	x0, x0, :lo12:.LANCHOR55
 	str	x0, [x29, 104]
 	lsr	w20, w22, w20
-.L1898:
-	cbnz	w21, .L1904
-.L1896:
+.L1899:
+	cbnz	w21, .L1905
+.L1897:
 	mov	w0, w24
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -13091,7 +13104,7 @@ FtlVendorPartRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1904:
+.L1905:
 	adrp	x0, .LANCHOR191
 	ldr	x0, [x0, #:lo12:.LANCHOR191]
 	ldr	w3, [x0, w20, uxtw 2]
@@ -13105,7 +13118,7 @@ FtlVendorPartRead:
 	cmp	w21, w19
 	csel	w19, w0, w19, cc
 	lsl	w27, w19, 9
-	cbz	w3, .L1900
+	cbz	w3, .L1901
 	ldr	x0, [x26, #:lo12:.LANCHOR182]
 	mov	w2, 1
 	str	w3, [x29, 100]
@@ -13121,39 +13134,39 @@ FtlVendorPartRead:
 	csinv	w24, w24, wzr, ne
 	ldr	w0, [x0, #:lo12:.LANCHOR199]
 	cmp	w0, 256
-	bne	.L1902
+	bne	.L1903
 	mov	w2, w3
 	mov	w1, w20
-	adrp	x0, .LC39
-	add	x0, x0, :lo12:.LC39
+	adrp	x0, .LC42
+	add	x0, x0, :lo12:.LC42
 	bl	printf
 	ldr	x2, [x26, #:lo12:.LANCHOR182]
 	adrp	x0, .LANCHOR215
 	mov	w1, w20
 	add	x0, x0, :lo12:.LANCHOR215
 	bl	FtlMapWritePage
-.L1902:
+.L1903:
 	ldr	x1, [x28, #:lo12:.LANCHOR182]
 	lsl	w23, w23, 7
 	mov	w2, w27
 	mov	x0, x25
 	add	x1, x1, x23, sxtw 2
 	bl	ftl_memcpy
-.L1903:
+.L1904:
 	add	w20, w20, 1
 	sub	w21, w21, w19
 	add	w22, w22, w19
 	add	x25, x25, x27, sxtw
-	b	.L1898
-.L1900:
+	b	.L1899
+.L1901:
 	mov	w2, w27
 	mov	w1, 0
 	mov	x0, x25
 	bl	ftl_memset
-	b	.L1903
-.L1905:
+	b	.L1904
+.L1906:
 	mov	w24, -1
-	b	.L1896
+	b	.L1897
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
 	.section	.text.FtlLoadEctTbl,"ax",@progbits
 	.align	2
@@ -13174,18 +13187,18 @@ FtlLoadEctTbl:
 	mov	w0, 17221
 	movk	w0, 0x4254, lsl 16
 	cmp	w1, w0
-	beq	.L1908
-	adrp	x1, .LC40
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC40
-	add	x0, x0, :lo12:.LC6
+	beq	.L1909
+	adrp	x1, .LC43
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC43
+	add	x0, x0, :lo12:.LC8
 	bl	printf
 	ldr	x0, [x19, #:lo12:.LANCHOR188]
 	mov	w1, 0
 	ldrh	w2, [x20, #:lo12:.LANCHOR187]
 	lsl	w2, w2, 9
 	bl	ftl_memset
-.L1908:
+.L1909:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -13201,93 +13214,93 @@ Ftl_load_ext_data:
 	mov	w0, 0
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR136
+	adrp	x19, .LANCHOR135
 	str	x21, [sp, 32]
-	add	x21, x19, :lo12:.LANCHOR136
+	add	x21, x19, :lo12:.LANCHOR135
 	mov	x2, x21
 	bl	FtlVendorPartRead
-	ldr	w0, [x19, #:lo12:.LANCHOR136]
+	ldr	w0, [x19, #:lo12:.LANCHOR135]
 	mov	w20, 19539
 	movk	w20, 0x4654, lsl 16
 	cmp	w0, w20
-	beq	.L1911
+	beq	.L1912
 	mov	w2, 512
 	mov	w1, 0
 	mov	x0, x21
 	bl	ftl_memset
-	str	w20, [x19, #:lo12:.LANCHOR136]
-.L1911:
-	ldr	w1, [x19, #:lo12:.LANCHOR136]
-	add	x0, x19, :lo12:.LANCHOR136
+	str	w20, [x19, #:lo12:.LANCHOR135]
+.L1912:
+	ldr	w1, [x19, #:lo12:.LANCHOR135]
+	add	x0, x19, :lo12:.LANCHOR135
 	cmp	w1, w20
-	adrp	x20, .LANCHOR166
-	bne	.L1912
+	adrp	x20, .LANCHOR165
+	bne	.L1913
 	adrp	x1, .LANCHOR216
 	ldr	w2, [x0, 88]
 	str	w2, [x1, #:lo12:.LANCHOR216]
 	adrp	x1, .LANCHOR217
 	ldr	w2, [x0, 92]
 	str	w2, [x1, #:lo12:.LANCHOR217]
-	adrp	x1, .LANCHOR159
+	adrp	x1, .LANCHOR158
 	ldr	w2, [x0, 8]
-	str	w2, [x1, #:lo12:.LANCHOR159]
-	adrp	x1, .LANCHOR160
+	str	w2, [x1, #:lo12:.LANCHOR158]
+	adrp	x1, .LANCHOR159
 	ldr	w2, [x0, 12]
-	str	w2, [x1, #:lo12:.LANCHOR160]
-	adrp	x1, .LANCHOR164
-	ldr	w2, [x0, 16]
-	str	w2, [x1, #:lo12:.LANCHOR164]
+	str	w2, [x1, #:lo12:.LANCHOR159]
 	adrp	x1, .LANCHOR163
-	ldr	w2, [x0, 20]
+	ldr	w2, [x0, 16]
 	str	w2, [x1, #:lo12:.LANCHOR163]
+	adrp	x1, .LANCHOR162
+	ldr	w2, [x0, 20]
+	str	w2, [x1, #:lo12:.LANCHOR162]
 	ldp	w1, w2, [x0, 28]
-	str	w1, [x20, #:lo12:.LANCHOR166]
-	adrp	x1, .LANCHOR78
-	str	w2, [x1, #:lo12:.LANCHOR78]
-	adrp	x1, .LANCHOR161
+	str	w1, [x20, #:lo12:.LANCHOR165]
+	adrp	x1, .LANCHOR79
+	str	w2, [x1, #:lo12:.LANCHOR79]
+	adrp	x1, .LANCHOR160
 	ldr	w2, [x0, 36]
-	str	w2, [x1, #:lo12:.LANCHOR161]
-	adrp	x1, .LANCHOR162
+	str	w2, [x1, #:lo12:.LANCHOR160]
+	adrp	x1, .LANCHOR161
 	ldr	w2, [x0, 40]
-	str	w2, [x1, #:lo12:.LANCHOR162]
-	adrp	x1, .LANCHOR167
+	str	w2, [x1, #:lo12:.LANCHOR161]
+	adrp	x1, .LANCHOR166
 	ldr	w2, [x0, 44]
-	str	w2, [x1, #:lo12:.LANCHOR167]
-	adrp	x1, .LANCHOR168
+	str	w2, [x1, #:lo12:.LANCHOR166]
+	adrp	x1, .LANCHOR167
 	ldr	w2, [x0, 48]
-	str	w2, [x1, #:lo12:.LANCHOR168]
+	str	w2, [x1, #:lo12:.LANCHOR167]
 	ldr	w1, [x0, 60]
-	adrp	x0, .LANCHOR156
-	str	w1, [x0, #:lo12:.LANCHOR156]
-.L1912:
-	add	x19, x19, :lo12:.LANCHOR136
 	adrp	x0, .LANCHOR155
-	str	wzr, [x0, #:lo12:.LANCHOR155]
+	str	w1, [x0, #:lo12:.LANCHOR155]
+.L1913:
+	add	x19, x19, :lo12:.LANCHOR135
+	adrp	x0, .LANCHOR154
+	str	wzr, [x0, #:lo12:.LANCHOR154]
 	mov	w0, 34661
 	ldr	w1, [x19, 68]
 	movk	w0, 0x1234, lsl 16
 	cmp	w1, w0
-	bne	.L1913
-	adrp	x0, .LANCHOR101
+	bne	.L1914
+	adrp	x0, .LANCHOR28
 	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR101]
-	adrp	x1, .LC41
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC41
-	add	x0, x0, :lo12:.LC6
+	str	w1, [x0, #:lo12:.LANCHOR28]
+	adrp	x1, .LC44
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC44
+	add	x0, x0, :lo12:.LC8
 	bl	printf
-.L1913:
-	adrp	x1, .LANCHOR165
-	adrp	x0, .LANCHOR46
+.L1914:
+	adrp	x1, .LANCHOR164
+	adrp	x0, .LANCHOR47
 	ldr	x21, [sp, 32]
-	ldr	w2, [x1, #:lo12:.LANCHOR165]
-	ldrh	w0, [x0, #:lo12:.LANCHOR46]
-	ldr	w1, [x20, #:lo12:.LANCHOR166]
+	ldr	w2, [x1, #:lo12:.LANCHOR164]
+	ldrh	w0, [x0, #:lo12:.LANCHOR47]
+	ldr	w1, [x20, #:lo12:.LANCHOR165]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	madd	w0, w0, w2, w1
-	adrp	x1, .LANCHOR38
-	ldrh	w1, [x1, #:lo12:.LANCHOR38]
+	adrp	x1, .LANCHOR39
+	ldrh	w1, [x1, #:lo12:.LANCHOR39]
 	udiv	w0, w0, w1
 	adrp	x1, .LANCHOR202
 	str	w0, [x1, #:lo12:.LANCHOR202]
@@ -13299,11 +13312,11 @@ Ftl_load_ext_data:
 	.type	FtlMapBlkWriteDumpData, %function
 FtlMapBlkWriteDumpData:
 	ldr	w1, [x0, 56]
-	cbz	w1, .L1929
+	cbz	w1, .L1930
 	stp	x29, x30, [sp, -80]!
-	adrp	x1, .LANCHOR75
+	adrp	x1, .LANCHOR76
 	add	x29, sp, 0
-	ldr	w1, [x1, #:lo12:.LANCHOR75]
+	ldr	w1, [x1, #:lo12:.LANCHOR76]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
@@ -13311,7 +13324,7 @@ FtlMapBlkWriteDumpData:
 	str	x25, [sp, 64]
 	str	wzr, [x0, 56]
 	ldr	x25, [x0, 40]
-	cbnz	w1, .L1915
+	cbnz	w1, .L1916
 	mov	x19, x0
 	adrp	x0, .LANCHOR181
 	adrp	x23, .LANCHOR199
@@ -13323,16 +13336,16 @@ FtlMapBlkWriteDumpData:
 	ldr	x24, [x0, #:lo12:.LANCHOR185]
 	ldrh	w0, [x19, 2]
 	str	x24, [x21, 16]
-	cbz	w0, .L1919
-	adrp	x1, .LANCHOR52
-	ldrh	w1, [x1, #:lo12:.LANCHOR52]
+	cbz	w0, .L1920
+	adrp	x1, .LANCHOR53
+	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	sub	w1, w1, #1
 	cmp	w0, w1
-	bge	.L1919
+	bge	.L1920
 	ldrh	w1, [x19]
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L1919
+	beq	.L1920
 	ldr	x2, [x19, 16]
 	ubfiz	x1, x1, 1, 16
 	sub	w0, w0, #1
@@ -13345,16 +13358,16 @@ FtlMapBlkWriteDumpData:
 	bl	FlashReadPages
 	ldr	w0, [x23, #:lo12:.LANCHOR199]
 	cmn	w0, #1
-	beq	.L1919
+	beq	.L1920
 	ldrh	w1, [x24, 8]
 	ldr	x2, [x19, 40]
 	ubfiz	x0, x1, 2, 16
 	ldr	w2, [x2, x0]
 	ldr	w0, [x21, 4]
 	cmp	w2, w0
-	bne	.L1919
+	bne	.L1920
 	ldr	x2, [x21, 8]
-.L1932:
+.L1933:
 	mov	x0, x19
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -13362,37 +13375,37 @@ FtlMapBlkWriteDumpData:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	b	FtlMapWritePage
-.L1919:
+.L1920:
 	sub	w20, w20, #1
 	and	w20, w20, 65535
 	ubfiz	x0, x20, 2, 16
 	ldr	w1, [x25, x0]
 	add	x0, x22, :lo12:.LANCHOR199
 	str	w1, [x0, 4]
-	cbz	w1, .L1920
+	cbz	w1, .L1921
 	mov	w2, 1
 	mov	w1, w2
 	bl	FlashReadPages
-.L1921:
+.L1922:
 	add	x22, x22, :lo12:.LANCHOR199
 	mov	w1, w20
 	ldr	x2, [x22, 8]
-	b	.L1932
-.L1920:
-	adrp	x1, .LANCHOR56
+	b	.L1933
+.L1921:
+	adrp	x1, .LANCHOR57
 	ldr	x0, [x0, 8]
-	ldrh	w2, [x1, #:lo12:.LANCHOR56]
+	ldrh	w2, [x1, #:lo12:.LANCHOR57]
 	mov	w1, 255
 	bl	ftl_memset
-	b	.L1921
-.L1915:
+	b	.L1922
+.L1916:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1929:
+.L1930:
 	ret
 	.size	FtlMapBlkWriteDumpData, .-FtlMapBlkWriteDumpData
 	.section	.text.FtlScanSysBlk,"ax",@progbits
@@ -13406,82 +13419,82 @@ FtlScanSysBlk:
 	stp	x25, x26, [sp, 64]
 	adrp	x25, .LANCHOR127
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR63
+	adrp	x21, .LANCHOR64
 	ldr	x0, [x25, #:lo12:.LANCHOR127]
 	adrp	x22, .LANCHOR190
-	ldr	w2, [x21, #:lo12:.LANCHOR63]
+	ldr	w2, [x21, #:lo12:.LANCHOR64]
 	stp	x19, x20, [sp, 16]
 	adrp	x20, .LANCHOR125
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR69
+	adrp	x23, .LANCHOR70
 	stp	x27, x28, [sp, 80]
 	adrp	x27, .LANCHOR126
 	lsl	w2, w2, 2
 	strh	wzr, [x20, #:lo12:.LANCHOR125]
-	strh	wzr, [x23, #:lo12:.LANCHOR69]
+	strh	wzr, [x23, #:lo12:.LANCHOR70]
 	bl	ftl_memset
 	ldr	x0, [x27, #:lo12:.LANCHOR126]
 	mov	w1, 0
-	ldr	w2, [x21, #:lo12:.LANCHOR63]
-	adrp	x19, .LANCHOR60
-	adrp	x28, .LANCHOR70
+	ldr	w2, [x21, #:lo12:.LANCHOR64]
+	adrp	x19, .LANCHOR61
+	adrp	x28, .LANCHOR71
 	adrp	x24, .LANCHOR206
 	lsl	w2, w2, 1
 	bl	ftl_memset
 	ldr	x0, [x22, #:lo12:.LANCHOR190]
 	mov	w1, 0
-	ldrh	w2, [x19, #:lo12:.LANCHOR60]
+	ldrh	w2, [x19, #:lo12:.LANCHOR61]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	ldr	x0, [x28, #:lo12:.LANCHOR70]
+	ldr	x0, [x28, #:lo12:.LANCHOR71]
 	mov	w1, 0
-	ldrh	w2, [x19, #:lo12:.LANCHOR60]
+	ldrh	w2, [x19, #:lo12:.LANCHOR61]
 	lsl	w2, w2, 1
 	bl	ftl_memset
 	mov	w2, 12
 	mov	w1, 255
 	add	x0, x24, :lo12:.LANCHOR206
 	bl	ftl_memset
-	adrp	x0, .LANCHOR38
+	adrp	x0, .LANCHOR39
 	stp	x22, x25, [x29, 144]
 	str	x27, [x29, 160]
-	ldrh	w0, [x0, #:lo12:.LANCHOR38]
+	ldrh	w0, [x0, #:lo12:.LANCHOR39]
 	str	w0, [x29, 172]
-	adrp	x0, .LANCHOR39
-	add	x0, x0, :lo12:.LANCHOR39
+	adrp	x0, .LANCHOR40
+	add	x0, x0, :lo12:.LANCHOR40
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR157
-	add	x0, x0, :lo12:.LANCHOR157
+	adrp	x0, .LANCHOR156
+	add	x0, x0, :lo12:.LANCHOR156
 	str	x0, [x29, 112]
-.L1934:
+.L1935:
 	ldr	x0, [x29, 120]
 	ldr	w1, [x29, 172]
 	ldrh	w0, [x0]
 	cmp	w0, w1
-	bls	.L1975
-	adrp	x0, .LANCHOR36
-	adrp	x25, .LANCHOR178
-	adrp	x6, .LANCHOR45
+	bls	.L1976
+	adrp	x0, .LANCHOR37
+	adrp	x25, .LANCHOR177
+	adrp	x6, .LANCHOR46
 	mov	x5, 0
-	ldrh	w13, [x0, #:lo12:.LANCHOR36]
+	ldrh	w13, [x0, #:lo12:.LANCHOR37]
 	adrp	x0, .LANCHOR104
-	ldr	x7, [x25, #:lo12:.LANCHOR178]
+	ldr	x7, [x25, #:lo12:.LANCHOR177]
 	mov	w22, 0
 	ldr	x12, [x0, #:lo12:.LANCHOR104]
 	adrp	x0, .LANCHOR105
-	add	x6, x6, :lo12:.LANCHOR45
+	add	x6, x6, :lo12:.LANCHOR46
 	mov	w8, 56
 	ldr	x11, [x0, #:lo12:.LANCHOR105]
-	adrp	x0, .LANCHOR57
-	ldrh	w10, [x0, #:lo12:.LANCHOR57]
-	b	.L1976
-.L1936:
+	adrp	x0, .LANCHOR58
+	ldrh	w10, [x0, #:lo12:.LANCHOR58]
+	b	.L1977
+.L1937:
 	ldrh	w1, [x29, 172]
 	ldrb	w0, [x6, x5]
 	bl	V2P_block
 	and	w4, w0, 65535
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L1935
+	cbnz	w0, .L1936
 	umaddl	x1, w22, w8, x7
 	lsl	w4, w4, 10
 	mul	w0, w22, w10
@@ -13491,19 +13504,19 @@ FtlScanSysBlk:
 	str	w4, [x1, 4]
 	add	x0, x11, x0, sxtw 2
 	stp	x12, x0, [x1, 8]
-.L1935:
+.L1936:
 	add	x5, x5, 1
-.L1976:
+.L1977:
 	cmp	w13, w5, uxth
-	bhi	.L1936
-	cbnz	w22, .L1937
-.L1974:
+	bhi	.L1937
+	cbnz	w22, .L1938
+.L1975:
 	ldr	w0, [x29, 172]
 	add	w26, w0, 1
 	and	w0, w26, 65535
 	str	w0, [x29, 172]
-	b	.L1934
-.L1937:
+	b	.L1935
+.L1938:
 	mov	w1, w22
 	mov	w2, 1
 	mov	x0, x7
@@ -13515,20 +13528,20 @@ FtlScanSysBlk:
 	adrp	x0, .LANCHOR224
 	add	x0, x0, :lo12:.LANCHOR224
 	str	x0, [x29, 136]
-.L1973:
-	ldr	x0, [x25, #:lo12:.LANCHOR178]
+.L1974:
+	ldr	x0, [x25, #:lo12:.LANCHOR177]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
 	ldr	w3, [x1, 4]
 	cmn	w0, #1
 	ldr	x27, [x1, 16]
 	ubfx	x26, x3, 10, 16
-	bne	.L1940
+	bne	.L1941
 	mov	w5, 16
 	mov	w7, 65535
-.L1942:
-	ldr	x0, [x25, #:lo12:.LANCHOR178]
-	add	x6, x25, :lo12:.LANCHOR178
+.L1943:
+	ldr	x0, [x25, #:lo12:.LANCHOR177]
+	add	x6, x25, :lo12:.LANCHOR177
 	mov	w2, 1
 	str	w7, [x29, 100]
 	add	x0, x0, x22
@@ -13544,81 +13557,81 @@ FtlScanSysBlk:
 	ldr	w5, [x29, 168]
 	cmp	w0, w7
 	ldr	x6, [x29, 104]
-	bne	.L1939
+	bne	.L1940
 	ldr	x0, [x6]
 	mov	w1, -1
 	str	w1, [x0, x22]
 	ldr	x0, [x6]
 	ldr	w0, [x0, x22]
 	cmp	w0, w1
-	beq	.L2012
-.L1940:
-	adrp	x0, .LANCHOR157
-	ldr	w1, [x0, #:lo12:.LANCHOR157]
+	beq	.L2013
+.L1941:
+	adrp	x0, .LANCHOR156
+	ldr	w1, [x0, #:lo12:.LANCHOR156]
 	ldr	w0, [x27, 4]
 	cmn	w1, #1
-	beq	.L1943
+	beq	.L1944
 	cmp	w1, w0
-	bhi	.L1944
-.L1943:
+	bhi	.L1945
+.L1944:
 	cmn	w0, #1
-	beq	.L1944
+	beq	.L1945
 	ldr	x2, [x29, 112]
 	add	w1, w0, 1
 	str	w1, [x2]
-.L1944:
+.L1945:
 	ldrh	w1, [x27]
 	mov	w2, 61604
 	cmp	w1, w2
-	beq	.L1946
-	bhi	.L1947
+	beq	.L1947
+	bhi	.L1948
 	mov	w0, 61574
 	cmp	w1, w0
-	beq	.L1948
-.L1945:
+	beq	.L1949
+.L1946:
 	ldr	x0, [x29, 128]
 	add	x22, x22, 56
 	cmp	x0, x22
-	bne	.L1973
-	b	.L1974
-.L1939:
-	ldr	x0, [x25, #:lo12:.LANCHOR178]
+	bne	.L1974
+	b	.L1975
+.L1940:
+	ldr	x0, [x25, #:lo12:.LANCHOR177]
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	bne	.L1940
+	bne	.L1941
 	sub	w5, w5, #1
 	ands	w5, w5, 65535
-	bne	.L1942
-.L2012:
+	bne	.L1943
+.L2013:
 	mov	w1, 0
 	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-	b	.L1945
-.L1947:
+	b	.L1946
+.L1948:
 	mov	w0, 61634
 	cmp	w1, w0
-	beq	.L1949
+	beq	.L1950
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L2012
-	b	.L1945
-.L1949:
+	beq	.L2013
+	b	.L1946
+.L1950:
 	ldrh	w1, [x20, #:lo12:.LANCHOR125]
-	ldr	w0, [x21, #:lo12:.LANCHOR63]
+	ldr	w0, [x21, #:lo12:.LANCHOR64]
 	cmp	w1, w0
-	bls	.L1951
+	bls	.L1952
 	ldr	x1, [x29, 136]
-	mov	w2, 1269
-	adrp	x0, .LC4
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
+	mov	w2, 1302
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1951:
-	ldr	w6, [x21, #:lo12:.LANCHOR63]
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1952:
+	ldr	w6, [x21, #:lo12:.LANCHOR64]
 	ldr	x3, [x29, 152]
 	ldrh	w1, [x20, #:lo12:.LANCHOR125]
 	and	w2, w6, 65535
@@ -13628,53 +13641,53 @@ FtlScanSysBlk:
 	sub	w2, w2, #1
 	ldr	x5, [x3, #:lo12:.LANCHOR127]
 	sxth	w2, w2
-.L1952:
+.L1953:
 	cmp	w0, w2
-	bgt	.L1958
-	tbz	w0, #31, .L1993
-	b	.L1945
-.L1958:
+	bgt	.L1959
+	tbz	w0, #31, .L1994
+	b	.L1946
+.L1959:
 	sxtw	x8, w0
 	ldr	w11, [x27, 4]
 	lsl	x7, x8, 2
 	add	x10, x5, x7
 	ldr	w7, [x5, x7]
 	cmp	w11, w7
-	bls	.L1953
+	bls	.L1954
 	ldr	w2, [x5]
-	cbnz	w2, .L1954
+	cbnz	w2, .L1955
 	cmp	w6, w1
-	beq	.L1954
+	beq	.L1955
 	add	w1, w1, 1
 	strh	w1, [x20, #:lo12:.LANCHOR125]
-.L1954:
+.L1955:
 	ldr	x1, [x29, 160]
 	ldr	x6, [x1, #:lo12:.LANCHOR126]
 	mov	w1, 0
-.L1955:
+.L1956:
 	cmp	w1, w0
-	bne	.L1956
+	bne	.L1957
 	ldr	w1, [x27, 4]
 	str	w1, [x10]
 	strh	w26, [x6, x8, lsl 1]
-	tbnz	w0, #31, .L1945
+	tbnz	w0, #31, .L1946
 	ldrh	w1, [x20, #:lo12:.LANCHOR125]
-	ldr	w2, [x21, #:lo12:.LANCHOR63]
+	ldr	w2, [x21, #:lo12:.LANCHOR64]
 	sub	w2, w2, w1
 	sub	w2, w2, #1
 	cmp	w0, w2, sxth
-	bgt	.L1945
-.L1993:
+	bgt	.L1946
+.L1994:
 	add	w1, w1, 1
 	strh	w1, [x20, #:lo12:.LANCHOR125]
 	ldr	w1, [x27, 4]
 	str	w1, [x5, x0, lsl 2]
 	ldr	x1, [x29, 160]
 	ldr	x1, [x1, #:lo12:.LANCHOR126]
-.L2011:
+.L2012:
 	strh	w26, [x1, x0, lsl 1]
-	b	.L1945
-.L1956:
+	b	.L1946
+.L1957:
 	sxtw	x2, w1
 	add	w1, w1, 1
 	lsl	x7, x2, 2
@@ -13686,74 +13699,74 @@ FtlScanSysBlk:
 	add	x7, x6, x2
 	ldrh	w7, [x7, 2]
 	strh	w7, [x6, x2]
-	b	.L1955
-.L1953:
+	b	.L1956
+.L1954:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L1952
-.L1948:
-	ldrh	w1, [x23, #:lo12:.LANCHOR69]
-	ldrh	w0, [x19, #:lo12:.LANCHOR60]
+	b	.L1953
+.L1949:
+	ldrh	w1, [x23, #:lo12:.LANCHOR70]
+	ldrh	w0, [x19, #:lo12:.LANCHOR61]
 	cmp	w1, w0
-	bls	.L1961
+	bls	.L1962
 	ldr	x1, [x29, 136]
-	mov	w2, 1316
-	adrp	x0, .LC4
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
+	mov	w2, 1349
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1961:
-	ldrh	w6, [x19, #:lo12:.LANCHOR60]
-	ldrh	w2, [x23, #:lo12:.LANCHOR69]
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1962:
+	ldrh	w6, [x19, #:lo12:.LANCHOR61]
+	ldrh	w2, [x23, #:lo12:.LANCHOR70]
 	sub	w1, w6, #1
 	sxth	x0, w1
 	sub	w5, w1, w2
 	ldr	x1, [x29, 144]
 	ldr	x1, [x1, #:lo12:.LANCHOR190]
-.L1962:
+.L1963:
 	cmp	w0, w5
-	ble	.L1967
+	ble	.L1968
 	sxtw	x7, w0
 	ldr	w11, [x27, 4]
 	lsl	x8, x7, 2
 	add	x10, x1, x8
 	ldr	w8, [x1, x8]
 	cmp	w11, w8
-	bls	.L1963
+	bls	.L1964
 	ldr	w5, [x1]
-	cbnz	w5, .L1964
+	cbnz	w5, .L1965
 	cmp	w6, w2
-	beq	.L1964
+	beq	.L1965
 	add	w2, w2, 1
-	strh	w2, [x23, #:lo12:.LANCHOR69]
-.L1964:
-	ldr	x6, [x28, #:lo12:.LANCHOR70]
-	mov	w2, 0
+	strh	w2, [x23, #:lo12:.LANCHOR70]
 .L1965:
+	ldr	x6, [x28, #:lo12:.LANCHOR71]
+	mov	w2, 0
+.L1966:
 	cmp	w2, w0
-	bne	.L1966
+	bne	.L1967
 	ldr	w2, [x27, 4]
 	str	w2, [x10]
 	strh	w26, [x6, x7, lsl 1]
-.L1967:
-	tbnz	w0, #31, .L1945
-	ldrh	w2, [x19, #:lo12:.LANCHOR60]
-	ldrh	w5, [x23, #:lo12:.LANCHOR69]
+.L1968:
+	tbnz	w0, #31, .L1946
+	ldrh	w2, [x19, #:lo12:.LANCHOR61]
+	ldrh	w5, [x23, #:lo12:.LANCHOR70]
 	sub	w2, w2, #1
 	sub	w2, w2, w5
 	cmp	w0, w2, sxth
-	bgt	.L1945
+	bgt	.L1946
 	add	w5, w5, 1
 	ldr	w2, [x27, 4]
-	strh	w5, [x23, #:lo12:.LANCHOR69]
+	strh	w5, [x23, #:lo12:.LANCHOR70]
 	str	w2, [x1, x0, lsl 2]
-	ldr	x1, [x28, #:lo12:.LANCHOR70]
-	b	.L2011
-.L1966:
+	ldr	x1, [x28, #:lo12:.LANCHOR71]
+	b	.L2012
+.L1967:
 	sxtw	x5, w2
 	add	w2, w2, 1
 	lsl	x8, x5, 2
@@ -13765,66 +13778,66 @@ FtlScanSysBlk:
 	add	x8, x6, x5
 	ldrh	w8, [x8, 2]
 	strh	w8, [x6, x5]
-	b	.L1965
-.L1963:
+	b	.L1966
+.L1964:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L1962
-.L1946:
+	b	.L1963
+.L1947:
 	ldrh	w5, [x24, #:lo12:.LANCHOR206]
 	mov	w1, 65535
 	add	x2, x24, :lo12:.LANCHOR206
 	cmp	w5, w1
-	bne	.L1969
+	bne	.L1970
 	strh	w26, [x24, #:lo12:.LANCHOR206]
 	str	w0, [x2, 8]
-	b	.L1945
-.L1969:
+	b	.L1946
+.L1970:
 	ldrh	w0, [x2, 4]
 	cmp	w0, w1
-	beq	.L1970
+	beq	.L1971
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.L1970:
+.L1971:
 	add	x0, x24, :lo12:.LANCHOR206
 	ldr	w1, [x27, 4]
 	ldr	w2, [x0, 8]
 	cmp	w2, w1
-	bcs	.L1971
+	bcs	.L1972
 	ldrh	w2, [x24, #:lo12:.LANCHOR206]
 	strh	w2, [x0, 4]
 	strh	w26, [x24, #:lo12:.LANCHOR206]
 	str	w1, [x0, 8]
-	b	.L1945
-.L1971:
+	b	.L1946
+.L1972:
 	strh	w26, [x0, 4]
-	b	.L1945
-.L1975:
+	b	.L1946
+.L1976:
 	ldr	x0, [x29, 160]
 	ldr	x2, [x0, #:lo12:.LANCHOR126]
 	ldrh	w0, [x2]
-	cbz	w0, .L1977
-.L1980:
-	ldr	x1, [x28, #:lo12:.LANCHOR70]
-	ldrh	w0, [x1]
 	cbz	w0, .L1978
-.L1979:
+.L1981:
+	ldr	x1, [x28, #:lo12:.LANCHOR71]
+	ldrh	w0, [x1]
+	cbz	w0, .L1979
+.L1980:
 	ldrh	w1, [x20, #:lo12:.LANCHOR125]
-	ldr	w0, [x21, #:lo12:.LANCHOR63]
+	ldr	w0, [x21, #:lo12:.LANCHOR64]
 	cmp	w1, w0
-	bls	.L2009
-	mov	w2, 1450
+	bls	.L2010
+	mov	w2, 1483
 	adrp	x1, .LANCHOR224
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR224
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR224
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L2009:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L2010:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -13833,24 +13846,24 @@ FtlScanSysBlk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1977:
+.L1978:
 	ldrh	w0, [x20, #:lo12:.LANCHOR125]
-	cbz	w0, .L1980
-	ldr	w1, [x21, #:lo12:.LANCHOR63]
+	cbz	w0, .L1981
+	ldr	w1, [x21, #:lo12:.LANCHOR64]
 	mov	w0, 0
-.L1981:
+.L1982:
 	cmp	w0, w1
-	bcs	.L1980
+	bcs	.L1981
 	ldrh	w3, [x2, w0, sxtw 1]
-	cbz	w3, .L1982
+	cbz	w3, .L1983
 	ldr	x1, [x29, 152]
-	add	x7, x21, :lo12:.LANCHOR63
+	add	x7, x21, :lo12:.LANCHOR64
 	ldr	x4, [x1, #:lo12:.LANCHOR127]
 	mov	w1, w0
-.L1983:
+.L1984:
 	ldr	w3, [x7]
 	cmp	w1, w3
-	bcs	.L1980
+	bcs	.L1981
 	sxtw	x6, w1
 	sub	w3, w1, w0
 	lsl	x5, x6, 1
@@ -13862,29 +13875,29 @@ FtlScanSysBlk:
 	strh	w8, [x2, x3, lsl 1]
 	str	w6, [x4, x3, lsl 2]
 	strh	wzr, [x2, x5]
-	b	.L1983
-.L1982:
+	b	.L1984
+.L1983:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L1981
-.L1978:
-	ldrh	w0, [x23, #:lo12:.LANCHOR69]
-	cbz	w0, .L1979
-	ldrh	w2, [x19, #:lo12:.LANCHOR60]
+	b	.L1982
+.L1979:
+	ldrh	w0, [x23, #:lo12:.LANCHOR70]
+	cbz	w0, .L1980
+	ldrh	w2, [x19, #:lo12:.LANCHOR61]
 	mov	w0, 0
-.L1988:
+.L1989:
 	mov	w6, w0
 	cmp	w0, w2
-	bge	.L1979
+	bge	.L1980
 	ldrh	w3, [x1, w0, sxtw 1]
-	cbz	w3, .L1989
+	cbz	w3, .L1990
 	ldr	x2, [x29, 144]
-	add	x19, x19, :lo12:.LANCHOR60
+	add	x19, x19, :lo12:.LANCHOR61
 	ldr	x3, [x2, #:lo12:.LANCHOR190]
-.L1990:
+.L1991:
 	ldrh	w2, [x19]
 	cmp	w0, w2
-	bge	.L1979
+	bge	.L1980
 	sxtw	x5, w0
 	sub	w2, w0, w6
 	lsl	x4, x5, 1
@@ -13896,11 +13909,11 @@ FtlScanSysBlk:
 	strh	w7, [x1, x2, lsl 1]
 	str	w5, [x3, x2, lsl 2]
 	strh	wzr, [x1, x4]
-	b	.L1990
-.L1989:
+	b	.L1991
+.L1990:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L1988
+	b	.L1989
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
 	.section	.text.FtlLoadSysInfo,"ax",@progbits
 	.align	2
@@ -13917,23 +13930,23 @@ FtlLoadSysInfo:
 	stp	x25, x26, [sp, 64]
 	add	x19, x23, :lo12:.LANCHOR199
 	adrp	x25, .LANCHOR185
-	adrp	x24, .LANCHOR82
+	adrp	x24, .LANCHOR83
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR38
+	adrp	x21, .LANCHOR39
 	ldr	x0, [x25, #:lo12:.LANCHOR185]
 	stp	x27, x28, [sp, 80]
 	stp	xzr, x0, [x19, 8]
-	ldr	x0, [x24, #:lo12:.LANCHOR82]
-	ldrh	w2, [x21, #:lo12:.LANCHOR38]
+	ldr	x0, [x24, #:lo12:.LANCHOR83]
+	ldrh	w2, [x21, #:lo12:.LANCHOR39]
 	lsl	w2, w2, 1
 	bl	ftl_memset
 	ldrh	w0, [x20, #:lo12:.LANCHOR206]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L2014
-.L2023:
+	bne	.L2015
+.L2024:
 	mov	w0, -1
-.L2013:
+.L2014:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -13941,7 +13954,7 @@ FtlLoadSysInfo:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2014:
+.L2015:
 	add	x26, x20, :lo12:.LANCHOR206
 	mov	w27, 19539
 	mov	w1, 1
@@ -13951,52 +13964,52 @@ FtlLoadSysInfo:
 	sxth	w22, w0
 	add	w0, w0, 1
 	strh	w0, [x26, 2]
-	adrp	x26, .LANCHOR79
-.L2016:
-	tbz	w22, #31, .L2019
-	mov	w2, 1510
+	adrp	x26, .LANCHOR180
+.L2017:
+	tbz	w22, #31, .L2020
+	mov	w2, 1543
 	adrp	x1, .LANCHOR225
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR225
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR225
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L2018:
-	adrp	x1, .LANCHOR56
-	ldrh	w0, [x21, #:lo12:.LANCHOR38]
-	ldrh	w1, [x1, #:lo12:.LANCHOR56]
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L2019:
+	adrp	x1, .LANCHOR57
+	ldrh	w0, [x21, #:lo12:.LANCHOR39]
+	ldrh	w1, [x1, #:lo12:.LANCHOR57]
 	add	x0, x0, 24
 	cmp	x1, x0, lsl 1
-	bcs	.L2021
-	mov	w2, 1512
+	bcs	.L2022
+	mov	w2, 1545
 	adrp	x1, .LANCHOR225
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR225
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR225
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L2021:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L2022:
 	add	x23, x23, :lo12:.LANCHOR199
 	mov	w2, 48
-	adrp	x19, .LANCHOR135
-	add	x0, x19, :lo12:.LANCHOR135
+	adrp	x19, .LANCHOR80
+	add	x0, x19, :lo12:.LANCHOR80
 	ldr	x1, [x23, 8]
 	bl	ftl_memcpy
-	ldr	x0, [x24, #:lo12:.LANCHOR82]
-	ldrh	w2, [x21, #:lo12:.LANCHOR38]
+	ldr	x0, [x24, #:lo12:.LANCHOR83]
+	ldrh	w2, [x21, #:lo12:.LANCHOR39]
 	ldr	x1, [x23, 8]
 	lsl	w2, w2, 1
 	add	x1, x1, 48
 	bl	ftl_memcpy
-	ldrh	w1, [x21, #:lo12:.LANCHOR38]
+	ldrh	w1, [x21, #:lo12:.LANCHOR39]
 	ldr	x0, [x23, 8]
 	lsr	w2, w1, 3
 	ubfiz	x1, x1, 1, 16
@@ -14007,12 +14020,12 @@ FtlLoadSysInfo:
 	adrp	x0, .LANCHOR0
 	ldr	x0, [x0, #:lo12:.LANCHOR0]
 	bl	ftl_memcpy
-	adrp	x0, .LANCHOR68
-	ldrh	w0, [x0, #:lo12:.LANCHOR68]
-	cbz	w0, .L2022
-	ldrh	w1, [x21, #:lo12:.LANCHOR38]
-	adrp	x0, .LANCHOR65
-	ldrh	w2, [x0, #:lo12:.LANCHOR65]
+	adrp	x0, .LANCHOR69
+	ldrh	w0, [x0, #:lo12:.LANCHOR69]
+	cbz	w0, .L2023
+	ldrh	w1, [x21, #:lo12:.LANCHOR39]
+	adrp	x0, .LANCHOR66
+	ldrh	w2, [x0, #:lo12:.LANCHOR66]
 	lsr	w0, w1, 3
 	add	w1, w0, w1, lsl 1
 	ldr	x0, [x23, 8]
@@ -14023,66 +14036,66 @@ FtlLoadSysInfo:
 	adrp	x0, .LANCHOR192
 	ldr	x0, [x0, #:lo12:.LANCHOR192]
 	bl	ftl_memcpy
-.L2022:
-	ldr	w2, [x19, #:lo12:.LANCHOR135]
+.L2023:
+	ldr	w2, [x19, #:lo12:.LANCHOR80]
 	mov	w1, 19539
 	movk	w1, 0x4654, lsl 16
-	add	x0, x19, :lo12:.LANCHOR135
+	add	x0, x19, :lo12:.LANCHOR80
 	cmp	w2, w1
-	bne	.L2023
+	bne	.L2024
 	add	x20, x20, :lo12:.LANCHOR206
 	ldrh	w1, [x0, 8]
 	ldrb	w2, [x0, 10]
-	adrp	x0, .LANCHOR43
+	adrp	x0, .LANCHOR44
 	strh	w1, [x20, 6]
-	ldrh	w0, [x0, #:lo12:.LANCHOR43]
+	ldrh	w0, [x0, #:lo12:.LANCHOR44]
 	cmp	w2, w0
-	bne	.L2023
+	bne	.L2024
 	adrp	x0, .LANCHOR226
-	adrp	x2, .LANCHOR71
-	adrp	x3, .LANCHOR36
+	adrp	x2, .LANCHOR72
+	adrp	x3, .LANCHOR37
 	str	w1, [x0, #:lo12:.LANCHOR226]
-	adrp	x0, .LANCHOR51
-	ldrh	w3, [x3, #:lo12:.LANCHOR36]
-	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+	adrp	x0, .LANCHOR52
+	ldrh	w3, [x3, #:lo12:.LANCHOR37]
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	mul	w0, w0, w1
-	str	w0, [x2, #:lo12:.LANCHOR71]
-	adrp	x2, .LANCHOR54
-	ldrh	w2, [x2, #:lo12:.LANCHOR54]
+	str	w0, [x2, #:lo12:.LANCHOR72]
+	adrp	x2, .LANCHOR55
+	ldrh	w2, [x2, #:lo12:.LANCHOR55]
 	mul	w0, w2, w0
-	adrp	x2, .LANCHOR67
-	str	w0, [x2, #:lo12:.LANCHOR67]
-	adrp	x0, .LANCHOR40
-	ldr	w2, [x0, #:lo12:.LANCHOR40]
-	adrp	x0, .LANCHOR73+6
-	ldrh	w0, [x0, #:lo12:.LANCHOR73+6]
+	adrp	x2, .LANCHOR68
+	str	w0, [x2, #:lo12:.LANCHOR68]
+	adrp	x0, .LANCHOR41
+	ldr	w2, [x0, #:lo12:.LANCHOR41]
+	adrp	x0, .LANCHOR74+6
+	ldrh	w0, [x0, #:lo12:.LANCHOR74+6]
 	cmp	w1, w2
 	sub	w0, w2, w0
 	sub	w0, w0, w1
 	udiv	w0, w0, w3
 	adrp	x3, .LANCHOR227
 	strh	w0, [x3, #:lo12:.LANCHOR227]
-	bls	.L2024
-	mov	w2, 1539
+	bls	.L2025
+	mov	w2, 1572
 	adrp	x1, .LANCHOR225
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR225
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR225
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L2024:
-	add	x1, x19, :lo12:.LANCHOR135
-	adrp	x0, .LANCHOR90
-	add	x3, x0, :lo12:.LANCHOR90
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L2025:
+	add	x1, x19, :lo12:.LANCHOR80
+	adrp	x0, .LANCHOR91
+	add	x3, x0, :lo12:.LANCHOR91
 	adrp	x5, .LANCHOR201
 	mov	x22, x5
 	ldrh	w2, [x1, 16]
 	ldrh	w7, [x1, 14]
-	strh	w7, [x0, #:lo12:.LANCHOR90]
+	strh	w7, [x0, #:lo12:.LANCHOR91]
 	lsr	w4, w2, 6
 	and	w2, w2, 63
 	strb	w2, [x3, 6]
@@ -14095,10 +14108,10 @@ FtlLoadSysInfo:
 	strh	wzr, [x2, 2]
 	strb	wzr, [x2, 6]
 	strb	wzr, [x2, 8]
-	adrp	x2, .LANCHOR91
+	adrp	x2, .LANCHOR92
 	ldrh	w3, [x1, 18]
-	add	x4, x2, :lo12:.LANCHOR91
-	strh	w3, [x2, #:lo12:.LANCHOR91]
+	add	x4, x2, :lo12:.LANCHOR92
+	strh	w3, [x2, #:lo12:.LANCHOR92]
 	mov	x20, x2
 	ldrh	w3, [x1, 20]
 	lsr	w6, w3, 6
@@ -14107,10 +14120,10 @@ FtlLoadSysInfo:
 	ldrb	w3, [x1, 12]
 	strh	w6, [x4, 2]
 	strb	w3, [x4, 8]
-	adrp	x4, .LANCHOR92
+	adrp	x4, .LANCHOR93
 	ldrh	w3, [x1, 22]
-	add	x6, x4, :lo12:.LANCHOR92
-	strh	w3, [x4, #:lo12:.LANCHOR92]
+	add	x6, x4, :lo12:.LANCHOR93
+	strh	w3, [x4, #:lo12:.LANCHOR93]
 	mov	x21, x4
 	ldrh	w3, [x1, 24]
 	lsr	w8, w3, 6
@@ -14118,93 +14131,93 @@ FtlLoadSysInfo:
 	strb	w3, [x6, 6]
 	ldrb	w3, [x1, 13]
 	strb	w3, [x6, 8]
-	adrp	x3, .LANCHOR159
+	adrp	x3, .LANCHOR158
 	strh	w8, [x6, 2]
 	ldr	w6, [x1, 32]
+	str	wzr, [x3, #:lo12:.LANCHOR158]
+	adrp	x3, .LANCHOR159
 	str	wzr, [x3, #:lo12:.LANCHOR159]
-	adrp	x3, .LANCHOR160
-	str	wzr, [x3, #:lo12:.LANCHOR160]
-	adrp	x3, .LANCHOR164
-	str	wzr, [x3, #:lo12:.LANCHOR164]
 	adrp	x3, .LANCHOR163
 	str	wzr, [x3, #:lo12:.LANCHOR163]
+	adrp	x3, .LANCHOR162
+	str	wzr, [x3, #:lo12:.LANCHOR162]
+	adrp	x3, .LANCHOR164
+	str	w6, [x3, #:lo12:.LANCHOR164]
 	adrp	x3, .LANCHOR165
-	str	w6, [x3, #:lo12:.LANCHOR165]
+	str	wzr, [x3, #:lo12:.LANCHOR165]
 	adrp	x3, .LANCHOR166
 	str	wzr, [x3, #:lo12:.LANCHOR166]
-	adrp	x3, .LANCHOR167
-	str	wzr, [x3, #:lo12:.LANCHOR167]
-	adrp	x3, .LANCHOR162
-	str	wzr, [x3, #:lo12:.LANCHOR162]
+	adrp	x3, .LANCHOR161
+	str	wzr, [x3, #:lo12:.LANCHOR161]
 	ldr	w3, [x1, 40]
-	adrp	x1, .LANCHOR157
-	ldr	w6, [x1, #:lo12:.LANCHOR157]
+	adrp	x1, .LANCHOR156
+	ldr	w6, [x1, #:lo12:.LANCHOR156]
 	cmp	w3, w6
-	bls	.L2025
-	str	w3, [x1, #:lo12:.LANCHOR157]
-.L2025:
-	add	x19, x19, :lo12:.LANCHOR135
-	adrp	x1, .LANCHOR158
-	ldr	w3, [x1, #:lo12:.LANCHOR158]
-	ldr	w2, [x19, 36]
-	cmp	w2, w3
 	bls	.L2026
-	str	w2, [x1, #:lo12:.LANCHOR158]
+	str	w3, [x1, #:lo12:.LANCHOR156]
 .L2026:
-	mov	w1, 65535
-	cmp	w7, w1
-	beq	.L2027
-	add	x0, x0, :lo12:.LANCHOR90
-	bl	make_superblock
+	add	x19, x19, :lo12:.LANCHOR80
+	adrp	x1, .LANCHOR157
+	ldr	w3, [x1, #:lo12:.LANCHOR157]
+	ldr	w2, [x19, 36]
+	cmp	w2, w3
+	bls	.L2027
+	str	w2, [x1, #:lo12:.LANCHOR157]
 .L2027:
-	ldrh	w2, [x20, #:lo12:.LANCHOR91]
 	mov	w1, 65535
-	add	x0, x20, :lo12:.LANCHOR91
-	cmp	w2, w1
+	cmp	w7, w1
 	beq	.L2028
+	add	x0, x0, :lo12:.LANCHOR91
 	bl	make_superblock
 .L2028:
-	ldrh	w2, [x21, #:lo12:.LANCHOR92]
+	ldrh	w2, [x20, #:lo12:.LANCHOR92]
 	mov	w1, 65535
-	add	x0, x21, :lo12:.LANCHOR92
+	add	x0, x20, :lo12:.LANCHOR92
 	cmp	w2, w1
 	beq	.L2029
 	bl	make_superblock
 .L2029:
-	ldrh	w2, [x22, #:lo12:.LANCHOR201]
+	ldrh	w2, [x21, #:lo12:.LANCHOR93]
 	mov	w1, 65535
-	add	x0, x22, :lo12:.LANCHOR201
+	add	x0, x21, :lo12:.LANCHOR93
 	cmp	w2, w1
 	beq	.L2030
 	bl	make_superblock
 .L2030:
+	ldrh	w2, [x22, #:lo12:.LANCHOR201]
+	mov	w1, 65535
+	add	x0, x22, :lo12:.LANCHOR201
+	cmp	w2, w1
+	beq	.L2031
+	bl	make_superblock
+.L2031:
 	mov	w0, 0
-	b	.L2013
-.L2019:
+	b	.L2014
+.L2020:
 	ldrh	w0, [x20, #:lo12:.LANCHOR206]
 	mov	w2, 1
 	mov	w1, w2
 	orr	w0, w22, w0, lsl 10
 	str	w0, [x19, 4]
-	ldr	x0, [x26, #:lo12:.LANCHOR79]
+	ldr	x0, [x26, #:lo12:.LANCHOR180]
 	str	x0, [x19, 8]
 	mov	x0, x19
 	bl	FlashReadPages
 	ldr	w0, [x19]
 	cmn	w0, #1
-	beq	.L2017
-	ldr	x0, [x26, #:lo12:.LANCHOR79]
+	beq	.L2018
+	ldr	x0, [x26, #:lo12:.LANCHOR180]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L2017
+	bne	.L2018
 	ldr	x0, [x25, #:lo12:.LANCHOR185]
 	ldrh	w0, [x0]
 	cmp	w0, w28
-	beq	.L2018
-.L2017:
+	beq	.L2019
+.L2018:
 	sub	w22, w22, #1
 	sxth	w22, w22
-	b	.L2016
+	b	.L2017
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
 	.section	.text.FtlMapTblRecovery,"ax",@progbits
 	.align	2
@@ -14217,7 +14230,7 @@ FtlMapTblRecovery:
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR79
+	adrp	x21, .LANCHOR180
 	stp	x23, x24, [sp, 48]
 	adrp	x20, .LANCHOR199
 	ldrh	w23, [x0, 6]
@@ -14229,7 +14242,7 @@ FtlMapTblRecovery:
 	str	x0, [x29, 136]
 	ldrh	w0, [x19, 8]
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR52
+	adrp	x25, .LANCHOR53
 	stp	x27, x28, [sp, 80]
 	mov	w26, 0
 	str	w0, [x29, 144]
@@ -14237,7 +14250,7 @@ FtlMapTblRecovery:
 	bl	ftl_memset
 	stp	wzr, wzr, [x19, 48]
 	add	x3, x20, :lo12:.LANCHOR199
-	ldr	x0, [x21, #:lo12:.LANCHOR79]
+	ldr	x0, [x21, #:lo12:.LANCHOR180]
 	mov	w1, -1
 	mov	x24, x3
 	str	x0, [x3, 8]
@@ -14251,17 +14264,17 @@ FtlMapTblRecovery:
 	strh	w1, [x19, 2]
 	mov	w1, 1
 	str	w0, [x29, 120]
-	add	x0, x25, :lo12:.LANCHOR52
+	add	x0, x25, :lo12:.LANCHOR53
 	str	w1, [x19, 56]
 	str	x0, [x29, 112]
-.L2040:
+.L2041:
 	ldr	w0, [x29, 144]
 	cmp	w26, w0
-	bge	.L2058
+	bge	.L2059
 	ldr	w0, [x29, 120]
 	sxtw	x28, w26
 	cmp	w26, w0
-	bne	.L2041
+	bne	.L2042
 	ldr	x2, [x29, 152]
 	lsl	x0, x28, 1
 	ldr	x1, [x29, 152]
@@ -14278,41 +14291,41 @@ FtlMapTblRecovery:
 	add	x26, x20, :lo12:.LANCHOR199
 	ldr	w0, [x0, x28, lsl 2]
 	str	w0, [x19, 48]
-.L2042:
+.L2043:
 	cmp	w25, w3
-	ble	.L2045
-.L2058:
+	ble	.L2046
+.L2059:
 	adrp	x23, .LANCHOR124
 	str	x23, [x29, 136]
 	add	x0, x23, :lo12:.LANCHOR124
 	cmp	x19, x0
-	bne	.L2047
-	adrp	x0, .LANCHOR68
-	ldrh	w0, [x0, #:lo12:.LANCHOR68]
-	cbz	w0, .L2047
-	adrp	x26, .LANCHOR125
-	add	x27, x26, :lo12:.LANCHOR125
-	adrp	x24, .LANCHOR65
+	bne	.L2048
+	adrp	x0, .LANCHOR69
+	ldrh	w0, [x0, #:lo12:.LANCHOR69]
+	cbz	w0, .L2048
+	adrp	x25, .LANCHOR125
+	add	x26, x25, :lo12:.LANCHOR125
+	adrp	x28, .LANCHOR66
 	mov	w22, 0
-	add	x0, x24, :lo12:.LANCHOR65
-	adrp	x25, .LANCHOR192
+	add	x0, x28, :lo12:.LANCHOR66
+	adrp	x24, .LANCHOR192
 	str	x0, [x29, 144]
-.L2061:
+.L2062:
 	ldr	x0, [x29, 144]
 	ldrh	w0, [x0]
 	cmp	w22, w0
-	bcc	.L2067
-.L2047:
+	bcc	.L2070
+.L2048:
 	mov	x0, x19
 	bl	ftl_free_no_use_map_blk
-	adrp	x0, .LANCHOR52
+	adrp	x0, .LANCHOR53
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x0, #:lo12:.LANCHOR52]
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L2060
+	bne	.L2061
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L2060:
+.L2061:
 	mov	x0, x19
 	bl	ftl_map_blk_gc
 	mov	x0, x19
@@ -14325,7 +14338,7 @@ FtlMapTblRecovery:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L2045:
+.L2046:
 	ldrh	w0, [x24]
 	mov	w2, 1
 	str	w3, [x29, 144]
@@ -14337,34 +14350,34 @@ FtlMapTblRecovery:
 	ldr	w0, [x26]
 	ldr	w3, [x29, 144]
 	cmn	w0, #1
-	beq	.L2043
+	beq	.L2044
 	ldrh	w0, [x27, 8]
 	cmp	w23, w0
-	bls	.L2044
+	bls	.L2045
 	ldrh	w2, [x27]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
-	bne	.L2044
+	bne	.L2045
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x26, 4]
 	str	w1, [x22, x0]
-.L2044:
+.L2045:
 	add	w25, w25, 1
 	sxth	w25, w25
-	b	.L2042
-.L2043:
+	b	.L2043
+.L2044:
 	ldrh	w0, [x24]
 	strh	w0, [x19, 60]
-	b	.L2044
-.L2041:
+	b	.L2045
+.L2042:
 	ldr	x1, [x29, 152]
 	mov	w2, 1
-	ldr	x0, [x21, #:lo12:.LANCHOR79]
+	ldr	x0, [x21, #:lo12:.LANCHOR180]
 	str	x0, [x24, 8]
 	lsl	x0, x28, 1
 	add	x28, x1, x0
 	ldrh	w0, [x1, x0]
-	ldrh	w1, [x25, #:lo12:.LANCHOR52]
+	ldrh	w1, [x25, #:lo12:.LANCHOR53]
 	sub	w1, w1, #1
 	orr	w0, w1, w0, lsl 10
 	mov	w1, w2
@@ -14373,22 +14386,22 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	w0, [x24]
 	cmn	w0, #1
-	beq	.L2069
+	beq	.L2072
 	ldrh	w1, [x27]
 	ldrh	w0, [x19, 4]
 	cmp	w1, w0
-	bne	.L2069
+	bne	.L2072
 	ldrh	w1, [x27, 8]
 	mov	w0, 64245
 	cmp	w1, w0
-	beq	.L2049
-.L2069:
+	beq	.L2050
+.L2072:
 	mov	w6, 0
-.L2050:
+.L2051:
 	ldr	x0, [x29, 112]
 	ldrh	w0, [x0]
 	cmp	w6, w0
-	bge	.L2056
+	bge	.L2057
 	ldrh	w0, [x28]
 	mov	w2, 1
 	str	w6, [x29, 108]
@@ -14400,62 +14413,64 @@ FtlMapTblRecovery:
 	ldr	w0, [x24]
 	ldr	w6, [x29, 108]
 	cmn	w0, #1
-	beq	.L2054
+	beq	.L2055
 	ldrh	w0, [x27, 8]
 	cmp	w23, w0
-	bls	.L2054
+	bls	.L2055
 	ldrh	w2, [x27]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
-	bne	.L2054
+	bne	.L2055
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x24, 4]
 	str	w1, [x22, x0]
-.L2054:
+.L2055:
 	add	w6, w6, 1
 	sxth	w6, w6
-	b	.L2050
-.L2049:
-	ldrh	w6, [x25, #:lo12:.LANCHOR52]
+	b	.L2051
+.L2050:
+	ldrh	w6, [x25, #:lo12:.LANCHOR53]
 	mov	w0, 0
-	ldr	x10, [x21, #:lo12:.LANCHOR79]
+	ldr	x10, [x21, #:lo12:.LANCHOR180]
 	sub	w6, w6, #1
-.L2051:
+.L2052:
 	cmp	w0, w6
-	blt	.L2053
-.L2056:
+	blt	.L2054
+.L2057:
 	add	w4, w26, 1
 	sxth	w26, w4
-	b	.L2040
-.L2053:
+	b	.L2041
+.L2054:
 	lsl	w2, w0, 1
 	sxtw	x2, w2
 	lsl	x1, x2, 2
 	ldrh	w1, [x10, x1]
 	cmp	w23, w1
-	bls	.L2052
+	bls	.L2053
 	add	x2, x2, 1
 	ubfiz	x1, x1, 2, 16
 	ldr	w2, [x10, x2, lsl 2]
 	str	w2, [x22, x1]
-.L2052:
+.L2053:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L2051
-.L2067:
-	ldr	x0, [x25, #:lo12:.LANCHOR192]
+	b	.L2052
+.L2070:
+	ldr	x0, [x24, #:lo12:.LANCHOR192]
 	ubfiz	x28, x22, 2, 32
 	ldr	w0, [x0, x28]
 	sub	w1, w0, #1
 	cmn	w1, #3
-	bhi	.L2063
-	adrp	x24, .LANCHOR128
-	ldr	x1, [x24, #:lo12:.LANCHOR128]
+	bhi	.L2064
+	adrp	x8, .LANCHOR128
+	str	x8, [x29, 112]
+	mov	x27, x8
+	ldr	x1, [x8, #:lo12:.LANCHOR128]
 	ldr	w1, [x1, x28]
 	cmp	w0, w1
-	beq	.L2063
+	beq	.L2064
 	add	x4, x20, :lo12:.LANCHOR199
-	ldr	x1, [x21, #:lo12:.LANCHOR79]
+	ldr	x1, [x21, #:lo12:.LANCHOR180]
 	mov	w2, 1
 	str	x4, [x29, 120]
 	str	x1, [x4, 8]
@@ -14468,67 +14483,73 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	w0, [x20, #:lo12:.LANCHOR199]
 	cmn	w0, #1
-	beq	.L2063
+	beq	.L2064
 	ldr	x0, [x29, 136]
 	ldrh	w1, [x23]
 	add	x0, x0, :lo12:.LANCHOR124
-	ldr	x4, [x29, 120]
+	ldp	x8, x4, [x29, 112]
 	ldrh	w0, [x0, 4]
 	cmp	w1, w0
-	bne	.L2063
-	ldr	x0, [x24, #:lo12:.LANCHOR128]
-	mov	w2, 1
+	bne	.L2064
+	ldr	x0, [x8, #:lo12:.LANCHOR128]
 	ldr	w3, [x23, 4]
-	mov	w1, w2
-	str	w3, [x29, 120]
+	ldr	w1, [x0, x28]
+	str	w1, [x4, 4]
 	ldr	w0, [x0, x28]
-	str	w0, [x4, 4]
-	mov	x0, x4
-	bl	FlashReadPages
+	cbnz	w0, .L2066
+	str	wzr, [x23, 4]
+.L2067:
 	ldr	w4, [x23, 4]
-	ldr	w3, [x29, 120]
 	cmp	w3, w4
-	bls	.L2063
-	ldr	x1, [x24, #:lo12:.LANCHOR128]
-	ldr	x0, [x25, #:lo12:.LANCHOR192]
+	bls	.L2064
+	ldr	x1, [x27, #:lo12:.LANCHOR128]
+	ldr	x0, [x24, #:lo12:.LANCHOR192]
 	ldr	w2, [x1, x28]
 	ldr	w1, [x0, x28]
-	adrp	x0, .LC42
-	add	x0, x0, :lo12:.LC42
+	adrp	x0, .LC45
+	add	x0, x0, :lo12:.LC45
 	bl	printf
-	ldr	x0, [x25, #:lo12:.LANCHOR192]
-	ldr	x1, [x24, #:lo12:.LANCHOR128]
+	ldr	x0, [x24, #:lo12:.LANCHOR192]
+	ldr	x1, [x27, #:lo12:.LANCHOR128]
 	ldr	w2, [x0, x28]
 	str	w2, [x1, x28]
 	mov	w1, 0
-	ldrh	w2, [x26, #:lo12:.LANCHOR125]
+	ldrh	w2, [x25, #:lo12:.LANCHOR125]
 	ldr	w0, [x0, x28]
 	ubfx	x0, x0, 10, 16
-.L2065:
+.L2068:
 	cmp	w1, w2
-	blt	.L2066
-	adrp	x1, .LANCHOR63
-	ldr	w1, [x1, #:lo12:.LANCHOR63]
+	blt	.L2069
+	adrp	x1, .LANCHOR64
+	ldr	w1, [x1, #:lo12:.LANCHOR64]
 	cmp	w2, w1
-	bcs	.L2063
+	bcs	.L2064
 	ldr	x1, [x29, 152]
 	ubfiz	x2, x2, 1, 16
 	strh	w0, [x1, x2]
-	ldrh	w1, [x27]
+	ldrh	w1, [x26]
 	add	w1, w1, 1
-	strh	w1, [x27]
+	strh	w1, [x26]
 	bl	remove_from_free_sys_Queue
-.L2063:
+.L2064:
 	add	w22, w22, 1
-	b	.L2061
+	b	.L2062
 .L2066:
+	mov	w2, 1
+	str	w3, [x29, 120]
+	mov	w1, w2
+	mov	x0, x4
+	bl	FlashReadPages
+	ldr	w3, [x29, 120]
+	b	.L2067
+.L2069:
 	ldr	x3, [x29, 152]
 	ldrh	w3, [x3, w1, sxtw 1]
 	cmp	w3, w0
-	beq	.L2063
+	beq	.L2064
 	add	w1, w1, 1
 	sxth	w1, w1
-	b	.L2065
+	b	.L2068
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
 	.section	.text.FtlLoadVonderInfo,"ax",@progbits
 	.align	2
@@ -14536,22 +14557,22 @@ FtlMapTblRecovery:
 	.type	FtlLoadVonderInfo, %function
 FtlLoadVonderInfo:
 	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR60
+	adrp	x1, .LANCHOR61
 	adrp	x0, .LANCHOR215
 	add	x0, x0, :lo12:.LANCHOR215
 	add	x29, sp, 0
-	ldrh	w1, [x1, #:lo12:.LANCHOR60]
+	ldrh	w1, [x1, #:lo12:.LANCHOR61]
 	strh	w1, [x0, 10]
 	mov	w1, -3962
 	strh	w1, [x0, 4]
-	adrp	x1, .LANCHOR69
-	ldrh	w1, [x1, #:lo12:.LANCHOR69]
+	adrp	x1, .LANCHOR70
+	ldrh	w1, [x1, #:lo12:.LANCHOR70]
 	strh	w1, [x0, 8]
-	adrp	x1, .LANCHOR61
-	ldrh	w1, [x1, #:lo12:.LANCHOR61]
+	adrp	x1, .LANCHOR62
+	ldrh	w1, [x1, #:lo12:.LANCHOR62]
 	strh	w1, [x0, 6]
-	adrp	x1, .LANCHOR70
-	ldr	x1, [x1, #:lo12:.LANCHOR70]
+	adrp	x1, .LANCHOR71
+	ldr	x1, [x1, #:lo12:.LANCHOR71]
 	str	x1, [x0, 16]
 	adrp	x1, .LANCHOR190
 	ldr	x1, [x1, #:lo12:.LANCHOR190]
@@ -14600,19 +14621,19 @@ FtlRecoverySuperblock:
 	stp	x25, x26, [sp, 64]
 	cmp	w0, w1
 	stp	x27, x28, [sp, 80]
-	beq	.L2243
+	beq	.L2246
 	ldrb	w0, [x19, 6]
 	str	w0, [x29, 180]
-	adrp	x0, .LANCHOR51
+	adrp	x0, .LANCHOR52
 	ldrh	w26, [x19, 2]
 	str	x0, [x29, 144]
-	ldrh	w2, [x0, #:lo12:.LANCHOR51]
+	ldrh	w2, [x0, #:lo12:.LANCHOR52]
 	cmp	w2, w26
-	bne	.L2087
+	bne	.L2090
 	strh	wzr, [x19, 4]
-.L2250:
+.L2253:
 	strb	wzr, [x19, 6]
-.L2243:
+.L2246:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -14621,163 +14642,163 @@ FtlRecoverySuperblock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 208
 	ret
-.L2087:
+.L2090:
 	ldrh	w0, [x19, 16]
 	mov	w21, 0
-.L2088:
+.L2091:
 	cmp	w0, w1
-	beq	.L2089
+	beq	.L2092
 	ldrb	w1, [x19, 8]
 	cmp	w1, 1
-	bne	.L2090
+	bne	.L2093
 	bl	FtlGetLastWrittenPage
 	mov	w20, w0
 	cmn	w0, #1
-	beq	.L2091
+	beq	.L2094
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbnz	w0, .L2168
+	cbnz	w0, .L2171
 	adrp	x0, .LANCHOR16
 	add	x0, x0, :lo12:.LANCHOR16
 	ldrh	w23, [x0, w20, sxtw 1]
-.L2092:
+.L2095:
 	adrp	x1, .LANCHOR105
-	adrp	x2, .LANCHOR36
-	adrp	x22, .LANCHOR178
+	adrp	x2, .LANCHOR37
+	adrp	x22, .LANCHOR177
 	add	x4, x19, 16
 	ldr	x6, [x1, #:lo12:.LANCHOR105]
-	adrp	x1, .LANCHOR57
-	ldr	x0, [x22, #:lo12:.LANCHOR178]
+	adrp	x1, .LANCHOR58
+	ldr	x0, [x22, #:lo12:.LANCHOR177]
 	mov	w27, 0
-	ldrh	w7, [x1, #:lo12:.LANCHOR57]
+	ldrh	w7, [x1, #:lo12:.LANCHOR58]
 	add	x1, x19, 16
 	str	x1, [x29, 184]
 	mov	w8, 65535
-	ldrh	w1, [x2, #:lo12:.LANCHOR36]
+	ldrh	w1, [x2, #:lo12:.LANCHOR37]
 	mov	w10, 56
 	str	x2, [x29, 160]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.L2093:
+.L2096:
 	cmp	x1, x4
-	bne	.L2097
+	bne	.L2100
 	ldrb	w1, [x19, 8]
 	cmp	w1, 1
-	bne	.L2169
+	bne	.L2172
 	adrp	x1, .LANCHOR8
 	ldrb	w1, [x1, #:lo12:.LANCHOR8]
 	cmp	w1, 0
 	cset	w1, ne
 	str	w1, [x29, 176]
-.L2098:
+.L2101:
 	ldr	w2, [x29, 176]
 	mov	w1, w27
-	adrp	x24, .LC43
+	adrp	x24, .LC46
 	adrp	x25, .LANCHOR229
-	add	x24, x24, :lo12:.LC43
+	add	x24, x24, :lo12:.LC46
 	add	x25, x25, :lo12:.LANCHOR229
 	mov	x28, 0
 	bl	FlashReadPages
-	adrp	x0, .LANCHOR158
+	adrp	x0, .LANCHOR157
 	mov	w5, 65535
 	str	x0, [x29, 168]
-	ldr	w21, [x0, #:lo12:.LANCHOR158]
+	ldr	w21, [x0, #:lo12:.LANCHOR157]
 	sub	w21, w21, #1
-.L2099:
+.L2102:
 	and	w0, w28, 65535
 	cmp	w27, w0
-	bhi	.L2104
-	bne	.L2102
-	ldr	x0, [x22, #:lo12:.LANCHOR178]
+	bhi	.L2107
+	bne	.L2105
+	ldr	x0, [x22, #:lo12:.LANCHOR177]
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	ldr	w0, [x0, 4]
-.L2245:
+.L2248:
 	lsr	w0, w0, 10
 	bl	P2V_plane
 	ldrb	w1, [x19, 8]
 	and	w27, w0, 65535
 	cmp	w1, 1
-	bne	.L2106
+	bne	.L2109
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbnz	w0, .L2106
+	cbnz	w0, .L2109
 	adrp	x0, .LANCHOR16
 	add	x0, x0, :lo12:.LANCHOR16
 	ldrh	w20, [x0, w20, sxtw 1]
-.L2106:
+.L2109:
 	ldr	x0, [x29, 144]
-	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w20
-	bne	.L2107
+	bne	.L2110
 	strh	w20, [x19, 2]
 	strb	wzr, [x19, 6]
 	strh	wzr, [x19, 4]
-.L2107:
+.L2110:
 	ldr	w0, [x29, 180]
 	cmp	w20, w26
 	cset	w2, eq
 	cmp	w27, w0
 	cset	w0, eq
 	tst	w2, w0
-	beq	.L2108
-.L2251:
+	beq	.L2111
+.L2254:
 	mov	w2, w27
 	mov	w1, w20
 	mov	x0, x19
 	bl	ftl_sb_update_avl_pages
-	b	.L2243
-.L2089:
+	b	.L2246
+.L2092:
 	add	w21, w21, 1
 	and	w21, w21, 65535
 	add	x0, x19, x21, sxtw 1
 	ldrh	w0, [x0, 16]
-	b	.L2088
-.L2090:
+	b	.L2091
+.L2093:
 	mov	w1, 0
 	bl	FtlGetLastWrittenPage
 	mov	w20, w0
 	cmn	w0, #1
-	beq	.L2091
-.L2168:
+	beq	.L2094
+.L2171:
 	mov	w23, w20
-	b	.L2092
-.L2091:
-	cbz	w26, .L2094
-	mov	w2, 1896
-	adrp	x1, .LANCHOR228
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR228
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
+	b	.L2095
+.L2094:
+	cbz	w26, .L2097
+	mov	w2, 1933
+	adrp	x1, .LANCHOR228
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR228
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L2094:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L2097:
 	ldr	w0, [x29, 180]
 	cmp	w0, 0
 	ccmp	w21, w0, 4, ne
-	beq	.L2095
-	mov	w2, 1897
+	beq	.L2098
+	mov	w2, 1934
 	adrp	x1, .LANCHOR228
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR228
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR228
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L2095:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L2098:
 	strh	wzr, [x19, 2]
-	b	.L2250
-.L2097:
+	b	.L2253
+.L2100:
 	ldrh	w2, [x4]
 	cmp	w2, w8
-	beq	.L2096
+	beq	.L2099
 	umaddl	x5, w27, w10, x0
 	orr	w2, w23, w2, lsl 10
 	add	w3, w27, 1
@@ -14788,107 +14809,107 @@ FtlRecoverySuperblock:
 	asr	w2, w2, 2
 	add	x2, x6, x2, sxtw 2
 	str	x2, [x5, 16]
-.L2096:
+.L2099:
 	add	x4, x4, 2
-	b	.L2093
-.L2169:
+	b	.L2096
+.L2172:
 	str	wzr, [x29, 176]
-	b	.L2098
-.L2104:
+	b	.L2101
+.L2107:
 	mov	x0, 56
-	ldr	x2, [x22, #:lo12:.LANCHOR178]
+	ldr	x2, [x22, #:lo12:.LANCHOR177]
 	mul	x0, x28, x0
 	add	x1, x2, x0
 	ldr	w0, [x2, x0]
-	cbnz	w0, .L2100
+	cbnz	w0, .L2103
 	ldr	x6, [x1, 16]
 	ldr	w4, [x6, 4]
 	cmn	w4, #1
-	beq	.L2101
+	beq	.L2104
 	ldr	x0, [x29, 168]
-	ldr	w1, [x0, #:lo12:.LANCHOR158]
+	ldr	w1, [x0, #:lo12:.LANCHOR157]
 	mov	w0, w4
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2101
+	cbz	w0, .L2104
 	ldr	x0, [x29, 168]
 	add	w4, w4, 1
-	str	w4, [x0, #:lo12:.LANCHOR158]
-.L2101:
+	str	w4, [x0, #:lo12:.LANCHOR157]
+.L2104:
 	ldr	w0, [x6]
 	cmn	w0, #1
-	bne	.L2103
-.L2102:
-	ldr	x0, [x22, #:lo12:.LANCHOR178]
+	bne	.L2106
+.L2105:
+	ldr	x0, [x22, #:lo12:.LANCHOR177]
 	and	x28, x28, 65535
 	mov	x1, 56
 	and	w20, w20, 65535
 	madd	x28, x28, x1, x0
 	ldr	w0, [x28, 4]
-	b	.L2245
-.L2100:
+	b	.L2248
+.L2103:
 	ldr	w1, [x1, 4]
 	mov	x0, x24
 	bl	printf
 	ldrh	w0, [x19]
 	and	w5, w23, 65535
 	strh	w0, [x25]
-.L2103:
+.L2106:
 	add	x28, x28, 1
-	b	.L2099
-.L2108:
+	b	.L2102
+.L2111:
 	mov	w0, 65535
 	cmp	w5, w0
-	bne	.L2109
-	cbnz	w1, .L2110
-.L2109:
+	bne	.L2112
+	cbnz	w1, .L2113
+.L2112:
 	adrp	x24, .LANCHOR133
 	and	w6, w23, 65535
 	ldr	w0, [x24, #:lo12:.LANCHOR133]
 	cmn	w0, #1
-	bne	.L2111
+	bne	.L2114
 	str	w21, [x24, #:lo12:.LANCHOR133]
-.L2111:
+.L2114:
 	add	w0, w26, 7
 	ldr	w7, [x24, #:lo12:.LANCHOR133]
 	cmp	w0, w23, uxth
-	bge	.L2170
+	bge	.L2173
 	sub	w23, w6, #7
 	and	w23, w23, 65535
-.L2112:
+.L2115:
 	mov	w3, -1
 	adrp	x5, .LANCHOR117
 	mov	w28, w3
 	add	x5, x5, :lo12:.LANCHOR117
 	mov	w4, 65535
-.L2113:
+.L2116:
 	cmp	w23, w6
-	bhi	.L2128
+	bhi	.L2131
 	ldr	x1, [x29, 160]
 	mov	w25, 0
-	ldr	x0, [x22, #:lo12:.LANCHOR178]
+	ldr	x0, [x22, #:lo12:.LANCHOR177]
 	mov	w10, 56
 	ldr	x2, [x29, 184]
-	ldrh	w1, [x1, #:lo12:.LANCHOR36]
+	ldrh	w1, [x1, #:lo12:.LANCHOR37]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-	b	.L2129
-.L2170:
+	b	.L2132
+.L2173:
 	mov	w23, w26
-	b	.L2112
-.L2115:
+	b	.L2115
+.L2118:
 	ldrh	w8, [x2]
 	cmp	w8, w4
-	beq	.L2114
+	beq	.L2117
 	umaddl	x11, w25, w10, x0
 	add	w25, w25, 1
 	and	w25, w25, 65535
 	orr	w8, w23, w8, lsl 10
 	str	w8, [x11, 4]
-.L2114:
+.L2117:
 	add	x2, x2, 2
-.L2129:
+.L2132:
 	cmp	x2, x1
-	bne	.L2115
+	bne	.L2118
 	ldr	w2, [x29, 176]
 	mov	w1, w25
 	str	x5, [x29, 112]
@@ -14903,7 +14924,7 @@ FtlRecoverySuperblock:
 	sxtw	x12, w23
 	ldrb	w10, [x1, #:lo12:.LANCHOR8]
 	mov	w11, 1
-	ldr	x1, [x22, #:lo12:.LANCHOR178]
+	ldr	x1, [x22, #:lo12:.LANCHOR177]
 	ldr	w4, [x29, 120]
 	ldr	w7, [x29, 128]
 	ldr	w6, [x29, 136]
@@ -14912,59 +14933,59 @@ FtlRecoverySuperblock:
 	umaddl	x25, w25, w2, x1
 	ldr	x5, [x29, 112]
 	mov	w2, 0
-.L2116:
+.L2119:
 	cmp	x25, x1
-	bne	.L2126
-	cbz	w2, .L2127
+	bne	.L2129
+	cbz	w2, .L2130
 	str	w0, [x24, #:lo12:.LANCHOR133]
-.L2127:
+.L2130:
 	add	w23, w23, 1
 	and	w23, w23, 65535
-	b	.L2113
-.L2126:
+	b	.L2116
+.L2129:
 	ldr	w8, [x1]
-	cbnz	w8, .L2117
+	cbnz	w8, .L2120
 	ldr	x8, [x1, 16]
 	ldrh	w13, [x8]
 	cmp	w13, w4
-	beq	.L2172
+	beq	.L2175
 	ldr	w8, [x8, 4]
 	cmn	w8, #1
-	beq	.L2172
+	beq	.L2175
 	cmn	w3, #1
-	bne	.L2174
+	bne	.L2177
 	ldrh	w2, [x5, x12, lsl 1]
 	cmp	w2, w4
-	bne	.L2119
-	cbz	w10, .L2174
-.L2119:
+	bne	.L2122
+	cbz	w10, .L2177
+.L2122:
 	cmp	w21, w0
 	mov	w2, w11
 	csel	w3, w3, w0, eq
-.L2118:
+.L2121:
 	mov	w28, w0
 	add	x1, x1, 56
 	mov	w0, w8
-	b	.L2116
-.L2117:
-	cbz	w2, .L2120
-	str	w0, [x24, #:lo12:.LANCHOR133]
+	b	.L2119
 .L2120:
+	cbz	w2, .L2123
+	str	w0, [x24, #:lo12:.LANCHOR133]
+.L2123:
 	adrp	x0, .LANCHOR229
 	ldrh	w1, [x19]
 	strh	w1, [x0, #:lo12:.LANCHOR229]
 	ldrb	w0, [x19, 8]
-	cbnz	w0, .L2110
+	cbnz	w0, .L2113
 	adrp	x0, .LANCHOR117
 	add	x0, x0, :lo12:.LANCHOR117
 	ldrh	w1, [x0, w23, sxtw 1]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2122
+	bne	.L2125
 	cmn	w3, #1
-	beq	.L2123
+	beq	.L2126
 	str	w3, [x24, #:lo12:.LANCHOR133]
-.L2110:
+.L2113:
 	mov	w1, 1
 	adrp	x0, .LANCHOR230
 	mov	w23, w26
@@ -14975,21 +14996,21 @@ FtlRecoverySuperblock:
 	bl	FtlMapBlkWriteDumpData
 	add	x0, x28, :lo12:.LANCHOR133
 	str	x0, [x29, 112]
-.L2130:
+.L2133:
 	ldr	x2, [x29, 160]
 	adrp	x1, .LANCHOR8
-	ldr	x0, [x22, #:lo12:.LANCHOR178]
+	ldr	x0, [x22, #:lo12:.LANCHOR177]
 	mov	w24, 0
 	ldrb	w5, [x1, #:lo12:.LANCHOR8]
 	mov	w6, 65535
 	ldr	x3, [x29, 184]
-	ldrh	w2, [x2, #:lo12:.LANCHOR36]
+	ldrh	w2, [x2, #:lo12:.LANCHOR37]
 	str	x1, [x29, 128]
 	add	x2, x2, 8
 	add	x2, x19, x2, lsl 1
-.L2131:
+.L2134:
 	cmp	x2, x3
-	bne	.L2134
+	bne	.L2137
 	ldr	w2, [x29, 176]
 	mov	w1, w24
 	mov	x25, 0
@@ -15000,101 +15021,101 @@ FtlRecoverySuperblock:
 	adrp	x0, .LANCHOR229
 	add	x0, x0, :lo12:.LANCHOR229
 	str	x0, [x29, 120]
-.L2135:
+.L2138:
 	ldr	x0, [x29, 136]
 	cmp	x25, x0
-	bne	.L2161
+	bne	.L2164
 	ldrb	w0, [x19, 8]
 	add	w23, w23, 1
 	and	w23, w23, 65535
 	cmp	w0, 1
-	bne	.L2162
+	bne	.L2165
 	ldr	x0, [x29, 128]
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L2162
-	adrp	x0, .LANCHOR52
-	ldrh	w0, [x0, #:lo12:.LANCHOR52]
+	cbz	w0, .L2165
+	adrp	x0, .LANCHOR53
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w23
-	bne	.L2162
+	bne	.L2165
 	cmp	w20, w23
-	beq	.L2137
-.L2162:
+	beq	.L2140
+.L2165:
 	ldr	x0, [x29, 144]
-	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w23
-	bne	.L2130
+	bne	.L2133
 	ldr	x0, [x29, 160]
 	mov	w2, 65535
 	strh	w23, [x19, 2]
 	strh	wzr, [x19, 4]
-	ldrh	w1, [x0, #:lo12:.LANCHOR36]
+	ldrh	w1, [x0, #:lo12:.LANCHOR37]
 	mov	w0, 0
-.L2163:
+.L2166:
 	cmp	w0, w1
-	beq	.L2243
+	beq	.L2246
 	ldr	x4, [x29, 184]
 	ldrh	w3, [x4], 2
 	str	x4, [x29, 184]
 	cmp	w3, w2
-	beq	.L2164
+	beq	.L2167
 	strb	w0, [x19, 6]
-	b	.L2243
-.L2123:
+	b	.L2246
+.L2126:
 	cmp	w21, w7
-	beq	.L2124
+	beq	.L2127
 	str	w7, [x24, #:lo12:.LANCHOR133]
-	b	.L2110
-.L2124:
+	b	.L2113
+.L2127:
 	ldr	w0, [x24, #:lo12:.LANCHOR133]
-.L2252:
+.L2255:
 	sub	w0, w0, #1
-.L2246:
+.L2249:
 	str	w0, [x24, #:lo12:.LANCHOR133]
-	b	.L2110
-.L2122:
+	b	.L2113
+.L2125:
 	cmp	w28, w21
-	beq	.L2125
+	beq	.L2128
 	cmn	w28, #1
-	beq	.L2110
+	beq	.L2113
 	str	w28, [x24, #:lo12:.LANCHOR133]
-	b	.L2110
-.L2125:
+	b	.L2113
+.L2128:
 	ldr	w0, [x24, #:lo12:.LANCHOR133]
 	cmp	w21, w0
-	bne	.L2252
-	b	.L2110
-.L2172:
+	bne	.L2255
+	b	.L2113
+.L2175:
 	mov	w8, w0
 	mov	w0, w28
-	b	.L2118
-.L2174:
+	b	.L2121
+.L2177:
 	mov	w2, 1
-	b	.L2118
-.L2128:
+	b	.L2121
+.L2131:
 	mov	w0, -1
-	b	.L2246
-.L2134:
+	b	.L2249
+.L2137:
 	ldrh	w1, [x3]
 	cmp	w1, w6
-	beq	.L2132
+	beq	.L2135
 	mov	w4, 56
 	orr	w1, w23, w1, lsl 10
 	umaddl	x4, w24, w4, x0
 	str	w1, [x4, 4]
 	ldrb	w7, [x19, 8]
 	cmp	w7, 1
-	bne	.L2133
-	cbz	w5, .L2133
+	bne	.L2136
+	cbz	w5, .L2136
 	orr	w1, w1, -2147483648
 	str	w1, [x4, 4]
-.L2133:
+.L2136:
 	add	w24, w24, 1
 	and	w24, w24, 65535
-.L2132:
+.L2135:
 	add	x3, x3, 2
-	b	.L2131
-.L2161:
-	ldr	x4, [x22, #:lo12:.LANCHOR178]
+	b	.L2134
+.L2164:
+	ldr	x4, [x22, #:lo12:.LANCHOR177]
 	add	x4, x4, x25
 	ldr	w5, [x4, 4]
 	str	w5, [x29, 204]
@@ -15102,41 +15123,41 @@ FtlRecoverySuperblock:
 	bl	P2V_plane
 	and	w0, w0, 65535
 	cmp	w23, w26
-	bcc	.L2136
+	bcc	.L2139
 	ldr	w1, [x29, 180]
 	ccmp	w1, w0, 0, eq
-	bhi	.L2136
+	bhi	.L2139
 	cmp	w23, w20
 	ccmp	w27, w0, 0, eq
-	beq	.L2137
+	beq	.L2140
 	ldr	w0, [x4]
 	cmn	w0, #1
-	beq	.L2138
+	beq	.L2141
 	ldr	x3, [x4, 16]
 	mov	w0, 61589
 	ldrh	w1, [x3]
 	cmp	w1, w0
-	beq	.L2139
-.L2145:
+	beq	.L2142
+.L2148:
 	ldrh	w0, [x19]
-.L2249:
+.L2252:
 	bl	decrement_vpc_count
-.L2136:
-	add	x25, x25, 56
-	b	.L2135
 .L2139:
+	add	x25, x25, 56
+	b	.L2138
+.L2142:
 	ldr	w21, [x3, 4]
 	cmn	w21, #1
-	beq	.L2140
+	beq	.L2143
 	ldr	x0, [x29, 168]
-	ldr	w1, [x0, #:lo12:.LANCHOR158]
+	ldr	w1, [x0, #:lo12:.LANCHOR157]
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2140
+	cbz	w0, .L2143
 	ldr	x1, [x29, 168]
 	add	w0, w21, 1
-	str	w0, [x1, #:lo12:.LANCHOR158]
-.L2140:
+	str	w0, [x1, #:lo12:.LANCHOR157]
+.L2143:
 	ldp	w24, w0, [x3, 8]
 	add	x1, x29, 200
 	str	w0, [x29, 196]
@@ -15145,14 +15166,14 @@ FtlRecoverySuperblock:
 	bl	log2phys
 	ldr	w1, [x28, #:lo12:.LANCHOR133]
 	cmn	w1, #1
-	beq	.L2141
+	beq	.L2144
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2141
+	cbz	w0, .L2144
 	ldr	w1, [x29, 196]
 	cmn	w1, #1
-	beq	.L2142
-	ldr	x0, [x22, #:lo12:.LANCHOR178]
+	beq	.L2145
+	ldr	x0, [x22, #:lo12:.LANCHOR177]
 	mov	w2, 0
 	add	x0, x0, x25
 	ldr	x3, [x0, 16]
@@ -15160,85 +15181,85 @@ FtlRecoverySuperblock:
 	mov	w1, 1
 	str	x3, [x29, 152]
 	bl	FlashReadPages
-	ldr	x0, [x22, #:lo12:.LANCHOR178]
+	ldr	x0, [x22, #:lo12:.LANCHOR177]
 	ldr	x3, [x29, 152]
 	add	x4, x0, x25
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	bne	.L2143
-.L2144:
+	bne	.L2146
+.L2147:
 	mov	w0, -1
 	str	w0, [x29, 196]
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-.L2152:
+.L2155:
 	ldr	w3, [x29, 196]
 	cmn	w3, #1
-	beq	.L2136
-.L2167:
+	beq	.L2139
+.L2170:
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
 	and	w24, w0, 65535
-	adrp	x0, .LANCHOR38
+	adrp	x0, .LANCHOR39
 	mov	w3, w24
-	ldrh	w0, [x0, #:lo12:.LANCHOR38]
+	ldrh	w0, [x0, #:lo12:.LANCHOR39]
 	cmp	w0, w24
-	bhi	.L2157
-	mov	w2, 2179
+	bhi	.L2160
+	mov	w2, 2216
 	adrp	x1, .LANCHOR228
-	adrp	x0, .LC4
+	adrp	x0, .LC6
 	add	x1, x1, :lo12:.LANCHOR228
-	add	x0, x0, :lo12:.LC4
+	add	x0, x0, :lo12:.LC6
 	str	w24, [x29, 152]
 	bl	printf
-	adrp	x1, .LC5
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
-	add	x0, x0, :lo12:.LC6
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
 	bl	printf
 	ldr	w3, [x29, 152]
-.L2157:
-	adrp	x1, .LANCHOR82
+.L2160:
+	adrp	x1, .LANCHOR83
 	ubfiz	x0, x24, 1, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR82]
+	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L2158
+	cbz	w0, .L2161
 	mov	w0, w3
-	b	.L2249
-.L2142:
+	b	.L2252
+.L2145:
 	ldp	w1, w0, [x29, 200]
 	cmp	w1, w0
-	bne	.L2145
+	bne	.L2148
 	mov	w2, 1
 	add	x1, x29, 196
 	mov	w0, w24
 	bl	log2phys
-	b	.L2145
-.L2143:
+	b	.L2148
+.L2146:
 	ldr	w0, [x3, 8]
 	cmp	w24, w0
-	bne	.L2144
+	bne	.L2147
 	ldr	w0, [x3, 4]
 	str	w0, [x29, 152]
 	str	x3, [x29, 104]
 	uxtw	x1, w0
 	ldr	w0, [x28, #:lo12:.LANCHOR133]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2144
+	cbz	w0, .L2147
 	ldp	w0, w1, [x29, 200]
 	ldr	x3, [x29, 104]
 	cmp	w0, w1
 	ldr	w1, [x29, 196]
-	bne	.L2147
-.L2247:
+	bne	.L2150
+.L2250:
 	mov	w0, w24
 	bl	FtlReUsePrevPpa
-	b	.L2144
-.L2147:
+	b	.L2147
+.L2150:
 	cmp	w0, w1
-	beq	.L2144
+	beq	.L2147
 	cmn	w0, #1
-	beq	.L2148
+	beq	.L2151
 	ldr	x3, [x4, 16]
 	mov	w2, 0
 	str	w0, [x4, 4]
@@ -15247,124 +15268,124 @@ FtlRecoverySuperblock:
 	mov	x0, x4
 	bl	FlashReadPages
 	ldr	x3, [x29, 104]
-.L2149:
-	ldr	x0, [x22, #:lo12:.LANCHOR178]
+.L2152:
+	ldr	x0, [x22, #:lo12:.LANCHOR177]
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	beq	.L2150
+	beq	.L2153
 	ldr	x0, [x29, 112]
 	ldr	w3, [x3, 4]
 	mov	w1, w3
 	ldr	w0, [x0]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2150
+	cbz	w0, .L2153
 	ldr	w0, [x29, 152]
 	mov	w1, w3
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2144
-.L2150:
+	cbz	w0, .L2147
+.L2153:
 	ldr	w1, [x29, 196]
-	b	.L2247
-.L2148:
+	b	.L2250
+.L2151:
 	str	w0, [x4]
-	b	.L2149
-.L2141:
+	b	.L2152
+.L2144:
 	ldp	w1, w0, [x29, 200]
 	cmp	w1, w0
-	beq	.L2152
+	beq	.L2155
 	mov	w2, 1
 	add	x1, x29, 204
 	mov	w0, w24
 	bl	log2phys
 	ldr	w3, [x29, 200]
 	cmn	w3, #1
-	beq	.L2152
+	beq	.L2155
 	ldr	w0, [x29, 196]
 	cmp	w3, w0
-	beq	.L2167
+	beq	.L2170
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
-	adrp	x1, .LANCHOR90
-	and	w0, w0, 65535
-	ldrh	w1, [x1, #:lo12:.LANCHOR90]
-	cmp	w1, w0
-	beq	.L2156
 	adrp	x1, .LANCHOR91
+	and	w0, w0, 65535
 	ldrh	w1, [x1, #:lo12:.LANCHOR91]
 	cmp	w1, w0
-	beq	.L2156
+	beq	.L2159
 	adrp	x1, .LANCHOR92
 	ldrh	w1, [x1, #:lo12:.LANCHOR92]
 	cmp	w1, w0
-	bne	.L2152
-.L2156:
-	ldr	x0, [x22, #:lo12:.LANCHOR178]
+	beq	.L2159
+	adrp	x1, .LANCHOR93
+	ldrh	w1, [x1, #:lo12:.LANCHOR93]
+	cmp	w1, w0
+	bne	.L2155
+.L2159:
+	ldr	x0, [x22, #:lo12:.LANCHOR177]
 	mov	w2, 0
 	mov	w1, 1
 	ldr	x4, [x0, 16]
 	str	w3, [x0, 4]
 	str	x4, [x29, 152]
 	bl	FlashReadPages
-	ldr	x0, [x22, #:lo12:.LANCHOR178]
+	ldr	x0, [x22, #:lo12:.LANCHOR177]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L2152
+	beq	.L2155
 	ldr	x4, [x29, 152]
 	mov	w0, w21
 	ldr	w1, [x4, 4]
 	bl	ftl_cmp_data_ver
-	cbnz	w0, .L2152
+	cbnz	w0, .L2155
 	mov	w2, 1
 	add	x1, x29, 200
 	mov	w0, w24
 	bl	log2phys
-	b	.L2152
-.L2158:
+	b	.L2155
+.L2161:
 	mov	w1, w24
-	adrp	x0, .LC44
-	add	x0, x0, :lo12:.LC44
+	adrp	x0, .LC47
+	add	x0, x0, :lo12:.LC47
 	bl	printf
-	b	.L2136
-.L2138:
+	b	.L2139
+.L2141:
 	ldr	x1, [x29, 120]
 	mov	w2, w21
 	ldrh	w0, [x19]
 	strh	w0, [x1]
 	mov	w1, w5
-	adrp	x0, .LC45
-	add	x0, x0, :lo12:.LC45
+	adrp	x0, .LC48
+	add	x0, x0, :lo12:.LC48
 	bl	printf
 	adrp	x2, .LANCHOR231
 	ldr	w0, [x2, #:lo12:.LANCHOR231]
 	cmp	w0, 31
-	bhi	.L2159
+	bhi	.L2162
 	adrp	x1, .LANCHOR232
 	add	x1, x1, :lo12:.LANCHOR232
 	ldr	w3, [x29, 204]
 	str	w3, [x1, w0, uxtw 2]
 	add	w0, w0, 1
 	str	w0, [x2, #:lo12:.LANCHOR231]
-.L2159:
+.L2162:
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
 	ldr	w0, [x28, #:lo12:.LANCHOR133]
 	cmn	w0, #1
-	bne	.L2160
-.L2248:
+	bne	.L2163
+.L2251:
 	str	w21, [x28, #:lo12:.LANCHOR133]
-	b	.L2136
-.L2160:
+	b	.L2139
+.L2163:
 	cmp	w21, w0
-	bcs	.L2136
-	b	.L2248
-.L2164:
+	bcs	.L2139
+	b	.L2251
+.L2167:
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L2163
-.L2137:
+	b	.L2166
+.L2140:
 	strb	w27, [x19, 6]
 	strh	w20, [x19, 2]
-	b	.L2251
+	b	.L2254
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
 	.section	.text.FtlGcScanTempBlk,"ax",@progbits
 	.align	2
@@ -15383,65 +15404,65 @@ FtlGcScanTempBlk:
 	stp	x25, x26, [sp, 64]
 	cmp	w19, w0
 	stp	x27, x28, [sp, 80]
-	beq	.L2271
-	cbnz	w19, .L2254
-.L2255:
+	beq	.L2274
+	cbnz	w19, .L2257
+.L2258:
 	bl	FtlGcPageVarInit
-	b	.L2256
-.L2271:
+	b	.L2259
+.L2274:
 	mov	w19, 0
-.L2254:
-	adrp	x0, .LANCHOR51
-	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+.L2257:
+	adrp	x0, .LANCHOR52
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w1
-	beq	.L2255
-.L2256:
-	adrp	x25, .LANCHOR57
-	add	x25, x25, :lo12:.LANCHOR57
+	beq	.L2258
+.L2259:
+	adrp	x25, .LANCHOR58
+	add	x25, x25, :lo12:.LANCHOR58
 	mov	w26, -1
 	mov	w24, 65535
-.L2268:
+.L2271:
 	ldrh	w0, [x20]
 	strb	wzr, [x20, 8]
 	cmp	w0, w24
-	beq	.L2272
+	beq	.L2275
 	mov	w27, 56
-.L2270:
+.L2273:
 	adrp	x1, .LANCHOR105
-	adrp	x22, .LANCHOR178
+	adrp	x22, .LANCHOR177
 	ldrh	w6, [x25]
 	add	x3, x20, 16
 	ldr	x5, [x1, #:lo12:.LANCHOR105]
-	adrp	x1, .LANCHOR36
-	ldr	x0, [x22, #:lo12:.LANCHOR178]
+	adrp	x1, .LANCHOR37
+	ldr	x0, [x22, #:lo12:.LANCHOR177]
 	mov	w21, 0
-	ldrh	w1, [x1, #:lo12:.LANCHOR36]
+	ldrh	w1, [x1, #:lo12:.LANCHOR37]
 	add	x1, x1, 8
 	add	x1, x20, x1, lsl 1
-.L2258:
+.L2261:
 	cmp	x3, x1
-	bne	.L2260
+	bne	.L2263
 	mov	w1, w21
 	umull	x21, w21, w27
 	mov	x28, 0
 	mov	w2, 0
 	bl	FlashReadPages
-.L2261:
+.L2264:
 	cmp	x28, x21
-	bne	.L2269
-	adrp	x0, .LANCHOR51
+	bne	.L2272
+	adrp	x0, .LANCHOR52
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
-	bhi	.L2270
-.L2272:
+	bhi	.L2273
+.L2275:
 	mov	w2, 0
-	b	.L2257
-.L2260:
+	b	.L2260
+.L2263:
 	ldrh	w2, [x3]
 	cmp	w2, w24
-	beq	.L2259
+	beq	.L2262
 	umaddl	x4, w21, w27, x0
 	orr	w2, w19, w2, lsl 10
 	str	w2, [x4, 4]
@@ -15452,27 +15473,27 @@ FtlGcScanTempBlk:
 	asr	w2, w2, 2
 	add	x2, x5, x2, sxtw 2
 	str	x2, [x4, 16]
-.L2259:
+.L2262:
 	add	x3, x3, 2
-	b	.L2258
-.L2269:
-	ldr	x6, [x22, #:lo12:.LANCHOR178]
+	b	.L2261
+.L2272:
+	ldr	x6, [x22, #:lo12:.LANCHOR177]
 	add	x5, x6, x28
 	ldr	w4, [x5, 4]
 	lsr	w0, w4, 10
 	bl	P2V_plane
 	and	w2, w0, 65535
 	ldr	w0, [x6, x28]
-	cbnz	w0, .L2262
+	cbnz	w0, .L2265
 	ldr	x0, [x5, 16]
 	add	x28, x28, 56
 	ldrh	w1, [x0]
 	cmp	w1, w24
-	bne	.L2263
+	bne	.L2266
 	adrp	x0, .LANCHOR132
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR132]
-.L2257:
+.L2260:
 	strb	w2, [x20, 6]
 	mov	w0, -1
 	strh	w19, [x20, 2]
@@ -15488,99 +15509,99 @@ FtlGcScanTempBlk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2263:
+.L2266:
 	ldp	w2, w0, [x0, 8]
 	mov	w1, w4
 	bl	FtlGcUpdatePage
-	b	.L2261
-.L2262:
+	b	.L2264
+.L2265:
 	ldrh	w1, [x20]
 	mov	w2, w4
-	adrp	x0, .LC46
-	add	x0, x0, :lo12:.LC46
+	adrp	x0, .LC49
+	add	x0, x0, :lo12:.LC49
 	bl	printf
-	adrp	x0, .LANCHOR101
-	ldr	w1, [x0, #:lo12:.LANCHOR101]
+	adrp	x0, .LANCHOR28
+	ldr	w1, [x0, #:lo12:.LANCHOR28]
 	ldrh	w0, [x20]
-	cbnz	w1, .L2264
+	cbnz	w1, .L2267
 	adrp	x1, .LANCHOR8
 	ldrb	w1, [x1, #:lo12:.LANCHOR8]
-	cbz	w1, .L2265
-.L2264:
-	adrp	x2, .LANCHOR77
+	cbz	w1, .L2268
+.L2267:
+	adrp	x2, .LANCHOR78
 	ubfiz	x1, x0, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR77]
+	ldr	x2, [x2, #:lo12:.LANCHOR78]
 	ldrh	w1, [x2, x1]
 	cmp	w1, 119
-	bls	.L2266
-.L2265:
-	ldr	x1, [x22, #:lo12:.LANCHOR178]
+	bls	.L2269
+.L2268:
+	ldr	x1, [x22, #:lo12:.LANCHOR177]
 	ldr	w1, [x1, x28]
 	cmn	w1, #1
-	bne	.L2267
-.L2266:
-	ldr	x1, [x22, #:lo12:.LANCHOR178]
+	bne	.L2270
+.L2269:
+	ldr	x1, [x22, #:lo12:.LANCHOR177]
 	add	x28, x1, x28
 	ldr	w26, [x28, 4]
-.L2267:
-	adrp	x1, .LANCHOR82
+.L2270:
+	adrp	x1, .LANCHOR83
 	ubfiz	x0, x0, 1, 16
 	mov	w19, 0
-	ldr	x1, [x1, #:lo12:.LANCHOR82]
+	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	strh	wzr, [x1, x0]
 	ldrh	w0, [x20]
 	bl	INSERT_FREE_LIST
 	mov	w0, -1
 	strh	w0, [x20]
 	bl	FtlGcPageVarInit
-	b	.L2268
+	b	.L2271
 	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
 	.section	.text.FtlGcFreeTempBlock,"ax",@progbits
 	.align	2
 	.global	FtlGcFreeTempBlock
 	.type	FtlGcFreeTempBlock, %function
 FtlGcFreeTempBlock:
-	adrp	x0, .LANCHOR75
-	ldr	w0, [x0, #:lo12:.LANCHOR75]
-	cbz	w0, .L2282
+	adrp	x0, .LANCHOR76
+	ldr	w0, [x0, #:lo12:.LANCHOR76]
+	cbz	w0, .L2285
 	mov	w0, 0
 	ret
-.L2282:
+.L2285:
 	stp	x29, x30, [sp, -112]!
 	mov	w1, 65535
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR92
+	adrp	x19, .LANCHOR93
 	stp	x21, x22, [sp, 32]
-	add	x0, x19, :lo12:.LANCHOR92
-	ldrh	w20, [x19, #:lo12:.LANCHOR92]
+	add	x0, x19, :lo12:.LANCHOR93
+	ldrh	w20, [x19, #:lo12:.LANCHOR93]
 	adrp	x21, .LANCHOR132
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w20, w1
 	str	x27, [sp, 80]
-	beq	.L2284
-	adrp	x1, .LANCHOR51
-	ldrh	w1, [x1, #:lo12:.LANCHOR51]
+	beq	.L2287
+	adrp	x1, .LANCHOR52
+	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	bl	FtlGcScanTempBlk
 	str	w0, [x29, 108]
 	cmn	w0, #1
-	beq	.L2284
-	adrp	x0, .LANCHOR77
+	beq	.L2287
+	adrp	x0, .LANCHOR78
 	ubfiz	x20, x20, 1, 16
-	ldr	x1, [x0, #:lo12:.LANCHOR77]
+	ldr	x1, [x0, #:lo12:.LANCHOR78]
 	ldrh	w0, [x1, x20]
 	cmp	w0, 4
-	bls	.L2285
+	bls	.L2288
 	sub	w0, w0, #5
 	strh	w0, [x1, x20]
 	mov	w0, 1
 	bl	FtlEctTblFlush
-.L2285:
+.L2288:
 	ldr	w0, [x21, #:lo12:.LANCHOR132]
-	cbnz	w0, .L2286
-	adrp	x0, .LANCHOR136
-	add	x0, x0, :lo12:.LANCHOR136
+	cbnz	w0, .L2289
+	adrp	x0, .LANCHOR135
+	add	x0, x0, :lo12:.LANCHOR135
 	ldr	w1, [x0, 96]
 	add	w1, w1, 1
 	str	w1, [x0, 96]
@@ -15588,10 +15609,10 @@ FtlGcFreeTempBlock:
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
-.L2286:
+.L2289:
 	str	wzr, [x21, #:lo12:.LANCHOR132]
 	mov	w0, 1
-.L2281:
+.L2284:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -15599,97 +15620,97 @@ FtlGcFreeTempBlock:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2284:
+.L2287:
 	str	wzr, [x21, #:lo12:.LANCHOR132]
 	mov	w0, 65535
-	ldrh	w1, [x19, #:lo12:.LANCHOR92]
-	add	x21, x19, :lo12:.LANCHOR92
+	ldrh	w1, [x19, #:lo12:.LANCHOR93]
+	add	x21, x19, :lo12:.LANCHOR93
 	cmp	w1, w0
-	beq	.L2307
+	beq	.L2310
 	bl	FtlCacheWriteBack
 	adrp	x20, .LANCHOR110
-	adrp	x0, .LANCHOR51
+	adrp	x0, .LANCHOR52
 	ldrb	w1, [x21, 7]
 	ldrh	w2, [x20, #:lo12:.LANCHOR110]
 	mov	x21, x0
-	ldrh	w3, [x0, #:lo12:.LANCHOR51]
+	ldrh	w3, [x0, #:lo12:.LANCHOR52]
 	mul	w1, w1, w3
 	cmp	w2, w1
-	beq	.L2288
+	beq	.L2291
 	mov	w2, 163
 	adrp	x1, .LANCHOR234
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR234
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR234
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L2288:
-	add	x0, x19, :lo12:.LANCHOR92
-	adrp	x23, .LANCHOR82
-	ldrh	w3, [x21, #:lo12:.LANCHOR51]
-	adrp	x25, .LANCHOR71
-	ldrh	w2, [x19, #:lo12:.LANCHOR92]
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L2291:
+	add	x0, x19, :lo12:.LANCHOR93
+	adrp	x23, .LANCHOR83
+	ldrh	w3, [x21, #:lo12:.LANCHOR52]
+	adrp	x25, .LANCHOR72
+	ldrh	w2, [x19, #:lo12:.LANCHOR93]
 	adrp	x26, .LANCHOR234
 	ldrb	w0, [x0, 7]
-	add	x25, x25, :lo12:.LANCHOR71
-	ldr	x1, [x23, #:lo12:.LANCHOR82]
+	add	x25, x25, :lo12:.LANCHOR72
+	ldr	x1, [x23, #:lo12:.LANCHOR83]
 	add	x26, x26, :lo12:.LANCHOR234
 	mov	w21, 0
 	mul	w0, w0, w3
 	strh	w0, [x1, x2, lsl 1]
-	adrp	x1, .LANCHOR159
+	adrp	x1, .LANCHOR158
 	ldrh	w0, [x20, #:lo12:.LANCHOR110]
-	ldr	w2, [x1, #:lo12:.LANCHOR159]
+	ldr	w2, [x1, #:lo12:.LANCHOR158]
 	add	w0, w0, w2
-	str	w0, [x1, #:lo12:.LANCHOR159]
-.L2289:
+	str	w0, [x1, #:lo12:.LANCHOR158]
+.L2292:
 	ldrh	w0, [x20, #:lo12:.LANCHOR110]
 	cmp	w0, w21
-	bhi	.L2293
+	bhi	.L2296
 	mov	w0, -1
 	bl	decrement_vpc_count
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L2294
-	ldrh	w1, [x19, #:lo12:.LANCHOR92]
-	adrp	x0, .LC47
-	add	x0, x0, :lo12:.LC47
+	cbz	w0, .L2297
+	ldrh	w1, [x19, #:lo12:.LANCHOR93]
+	adrp	x0, .LC50
+	add	x0, x0, :lo12:.LC50
 	bl	printf
-.L2294:
-	ldrh	w0, [x19, #:lo12:.LANCHOR92]
-	ldr	x2, [x23, #:lo12:.LANCHOR82]
+.L2297:
+	ldrh	w0, [x19, #:lo12:.LANCHOR93]
+	ldr	x2, [x23, #:lo12:.LANCHOR83]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L2295
+	cbz	w1, .L2298
 	bl	INSERT_DATA_LIST
-.L2296:
+.L2299:
 	adrp	x0, .LANCHOR108
 	mov	w21, -1
 	strh	wzr, [x20, #:lo12:.LANCHOR110]
-	strh	w21, [x19, #:lo12:.LANCHOR92]
+	strh	w21, [x19, #:lo12:.LANCHOR93]
 	strh	wzr, [x0, #:lo12:.LANCHOR108]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	adrp	x0, .LANCHOR87
-	ldrh	w1, [x0, #:lo12:.LANCHOR87]
+	adrp	x0, .LANCHOR88
+	ldrh	w1, [x0, #:lo12:.LANCHOR88]
 	adrp	x0, .LANCHOR227
 	ldrh	w0, [x0, #:lo12:.LANCHOR227]
 	add	w0, w0, w0, lsl 1
 	cmp	w1, w0, lsr 2
-	ble	.L2307
+	ble	.L2310
 	adrp	x0, .LANCHOR201
 	mov	w1, 20
 	strh	w21, [x0, #:lo12:.LANCHOR201]
-	adrp	x0, .LANCHOR174
-	strh	w1, [x0, #:lo12:.LANCHOR174]
-.L2307:
+	adrp	x0, .LANCHOR173
+	strh	w1, [x0, #:lo12:.LANCHOR173]
+.L2310:
 	mov	w0, 0
-	b	.L2281
-.L2293:
+	b	.L2284
+.L2296:
 	adrp	x0, .LANCHOR111
 	mov	w24, 12
 	ldr	x27, [x0, #:lo12:.LANCHOR111]
@@ -15698,18 +15719,18 @@ FtlGcFreeTempBlock:
 	add	x22, x27, x24
 	ldr	w1, [x22, 8]
 	cmp	w1, w0
-	bcc	.L2290
+	bcc	.L2293
 	mov	w2, 168
 	mov	x1, x26
-	adrp	x0, .LC4
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L2290:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L2293:
 	ldr	w0, [x22, 8]
 	add	x1, x29, 108
 	mov	w2, 0
@@ -15717,7 +15738,7 @@ FtlGcFreeTempBlock:
 	ldr	w0, [x27, x24]
 	ldr	w1, [x29, 108]
 	cmp	w0, w1
-	bne	.L2291
+	bne	.L2294
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	mov	w24, w0
@@ -15726,21 +15747,21 @@ FtlGcFreeTempBlock:
 	add	x1, x22, 4
 	bl	log2phys
 	mov	w0, w24
-.L2306:
+.L2309:
 	bl	decrement_vpc_count
-.L2292:
+.L2295:
 	add	w21, w21, 1
 	and	w21, w21, 65535
-	b	.L2289
-.L2291:
+	b	.L2292
+.L2294:
 	ldr	w0, [x22, 4]
 	cmp	w1, w0
-	beq	.L2292
-	ldrh	w0, [x19, #:lo12:.LANCHOR92]
-	b	.L2306
-.L2295:
+	beq	.L2295
+	ldrh	w0, [x19, #:lo12:.LANCHOR93]
+	b	.L2309
+.L2298:
 	bl	INSERT_FREE_LIST
-	b	.L2296
+	b	.L2299
 	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
 	.section	.text.Ftl_get_new_temp_ppa,"ax",@progbits
 	.align	2
@@ -15748,22 +15769,22 @@ FtlGcFreeTempBlock:
 	.type	Ftl_get_new_temp_ppa, %function
 Ftl_get_new_temp_ppa:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR92
+	adrp	x0, .LANCHOR93
 	mov	w2, 65535
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	mov	x19, x0
-	ldrh	w3, [x0, #:lo12:.LANCHOR92]
+	ldrh	w3, [x0, #:lo12:.LANCHOR93]
 	cmp	w3, w2
-	beq	.L2309
-	add	x1, x0, :lo12:.LANCHOR92
+	beq	.L2312
+	add	x1, x0, :lo12:.LANCHOR93
 	ldrh	w0, [x1, 4]
-	cbnz	w0, .L2310
-.L2309:
+	cbnz	w0, .L2313
+.L2312:
 	bl	FtlCacheWriteBack
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
-	add	x0, x19, :lo12:.LANCHOR92
+	add	x0, x19, :lo12:.LANCHOR93
 	strb	wzr, [x0, 8]
 	bl	allocate_data_superblock
 	adrp	x0, .LANCHOR108
@@ -15774,8 +15795,8 @@ Ftl_get_new_temp_ppa:
 	mov	w0, 0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L2310:
-	add	x0, x19, :lo12:.LANCHOR92
+.L2313:
+	add	x0, x19, :lo12:.LANCHOR93
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	get_new_active_ppa
@@ -15791,56 +15812,56 @@ Ftl_gc_temp_data_write_back:
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR102
-	cbz	w0, .L2313
+	cbz	w0, .L2316
 	ldr	w0, [x19, #:lo12:.LANCHOR102]
-	tbz	x0, 0, .L2313
-	adrp	x0, .LANCHOR92+4
-	ldrh	w0, [x0, #:lo12:.LANCHOR92+4]
-	cbz	w0, .L2313
-.L2318:
+	tbz	x0, 0, .L2316
+	adrp	x0, .LANCHOR93+4
+	ldrh	w0, [x0, #:lo12:.LANCHOR93+4]
+	cbz	w0, .L2316
+.L2321:
 	mov	w0, 0
-.L2312:
+.L2315:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2313:
-	adrp	x20, .LANCHOR179
+.L2316:
+	adrp	x20, .LANCHOR178
 	ldr	w1, [x19, #:lo12:.LANCHOR102]
 	mov	w3, 0
 	mov	w2, 0
-	ldr	x0, [x20, #:lo12:.LANCHOR179]
+	ldr	x0, [x20, #:lo12:.LANCHOR178]
 	add	x19, x19, :lo12:.LANCHOR102
 	bl	FlashProgPages
 	mov	w11, 0
 	mov	w12, 56
-.L2315:
+.L2318:
 	ldr	w1, [x19]
 	cmp	w11, w1
-	bcc	.L2317
-	ldr	x0, [x20, #:lo12:.LANCHOR179]
+	bcc	.L2320
+	ldr	x0, [x20, #:lo12:.LANCHOR178]
 	bl	FtlGcBufFree
 	str	wzr, [x19]
-	adrp	x0, .LANCHOR92+4
-	ldrh	w0, [x0, #:lo12:.LANCHOR92+4]
-	cbnz	w0, .L2318
+	adrp	x0, .LANCHOR93+4
+	ldrh	w0, [x0, #:lo12:.LANCHOR93+4]
+	cbnz	w0, .L2321
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
-	b	.L2329
-.L2317:
+	b	.L2332
+.L2320:
 	umull	x0, w11, w12
-	ldr	x2, [x20, #:lo12:.LANCHOR179]
+	ldr	x2, [x20, #:lo12:.LANCHOR178]
 	add	x1, x2, x0
 	ldr	w2, [x2, x0]
 	cmn	w2, #1
-	bne	.L2316
-	adrp	x0, .LANCHOR92
-	adrp	x3, .LANCHOR82
-	ldrh	w4, [x0, #:lo12:.LANCHOR92]
-	ldr	x3, [x3, #:lo12:.LANCHOR82]
+	bne	.L2319
+	adrp	x0, .LANCHOR93
+	adrp	x3, .LANCHOR83
+	ldrh	w4, [x0, #:lo12:.LANCHOR93]
+	ldr	x3, [x3, #:lo12:.LANCHOR83]
 	strh	wzr, [x3, x4, lsl 1]
-	strh	w2, [x0, #:lo12:.LANCHOR92]
-	adrp	x0, .LANCHOR136
-	add	x0, x0, :lo12:.LANCHOR136
+	strh	w2, [x0, #:lo12:.LANCHOR93]
+	adrp	x0, .LANCHOR135
+	add	x0, x0, :lo12:.LANCHOR135
 	ldr	w2, [x0, 96]
 	add	w2, w2, 1
 	str	w2, [x0, 96]
@@ -15849,17 +15870,17 @@ Ftl_gc_temp_data_write_back:
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
 	bl	FtlGcPageVarInit
-.L2329:
+.L2332:
 	mov	w0, 1
-	b	.L2312
-.L2316:
+	b	.L2315
+.L2319:
 	ldr	x0, [x1, 16]
 	ldr	w1, [x1, 4]
 	ldp	w2, w0, [x0, 8]
 	bl	FtlGcUpdatePage
 	add	w11, w11, 1
 	and	w11, w11, 65535
-	b	.L2315
+	b	.L2318
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
 	.section	.text.FtlGcPageRecovery,"ax",@progbits
 	.align	2
@@ -15869,16 +15890,16 @@ FtlGcPageRecovery:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR51
-	adrp	x19, .LANCHOR92
-	add	x19, x19, :lo12:.LANCHOR92
-	ldrh	w1, [x20, #:lo12:.LANCHOR51]
+	adrp	x20, .LANCHOR52
+	adrp	x19, .LANCHOR93
+	add	x19, x19, :lo12:.LANCHOR93
+	ldrh	w1, [x20, #:lo12:.LANCHOR52]
 	mov	x0, x19
 	bl	FtlGcScanTempBlk
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x20, #:lo12:.LANCHOR51]
+	ldrh	w0, [x20, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bcc	.L2330
+	bcc	.L2333
 	adrp	x0, .LANCHOR124
 	add	x0, x0, :lo12:.LANCHOR124
 	bl	FtlMapBlkWriteDumpData
@@ -15886,7 +15907,7 @@ FtlGcPageRecovery:
 	bl	FtlGcFreeTempBlock
 	adrp	x0, .LANCHOR132
 	str	wzr, [x0, #:lo12:.LANCHOR132]
-.L2330:
+.L2333:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -15900,15 +15921,15 @@ FtlPowerLostRecovery:
 	adrp	x0, .LANCHOR231
 	add	x29, sp, 0
 	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR90
-	add	x19, x19, :lo12:.LANCHOR90
+	adrp	x19, .LANCHOR91
+	add	x19, x19, :lo12:.LANCHOR91
 	str	wzr, [x0, #:lo12:.LANCHOR231]
 	mov	x0, x19
 	bl	FtlRecoverySuperblock
 	mov	x0, x19
-	adrp	x19, .LANCHOR91
+	adrp	x19, .LANCHOR92
 	bl	FtlSlcSuperblockCheck
-	add	x19, x19, :lo12:.LANCHOR91
+	add	x19, x19, :lo12:.LANCHOR92
 	mov	x0, x19
 	bl	FtlRecoverySuperblock
 	mov	x0, x19
@@ -15931,10 +15952,10 @@ FtlSysBlkInit:
 	mov	w1, -1
 	add	x29, sp, 0
 	strh	w1, [x0, #:lo12:.LANCHOR229]
-	adrp	x0, .LANCHOR37
+	adrp	x0, .LANCHOR38
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR230
-	ldrh	w0, [x0, #:lo12:.LANCHOR37]
+	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	stp	x21, x22, [sp, 32]
 	strh	wzr, [x19, #:lo12:.LANCHOR230]
 	str	x23, [sp, 48]
@@ -15944,20 +15965,20 @@ FtlSysBlkInit:
 	ldrh	w1, [x0, #:lo12:.LANCHOR206]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2336
-.L2338:
+	bne	.L2339
+.L2341:
 	mov	w23, -1
-.L2335:
+.L2338:
 	mov	w0, w23
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2336:
+.L2339:
 	bl	FtlLoadSysInfo
 	mov	w23, w0
-	cbnz	w0, .L2338
+	cbnz	w0, .L2341
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -15967,45 +15988,45 @@ FtlSysBlkInit:
 	bl	FtlPowerLostRecovery
 	mov	w0, 1
 	bl	FtlUpdateVaildLpn
-	adrp	x2, .LANCHOR66
-	adrp	x0, .LANCHOR95
+	adrp	x2, .LANCHOR67
+	adrp	x0, .LANCHOR96
 	mov	x3, 4
-	ldrh	w2, [x2, #:lo12:.LANCHOR66]
-	ldr	x0, [x0, #:lo12:.LANCHOR95]
+	ldrh	w2, [x2, #:lo12:.LANCHOR67]
+	ldr	x0, [x0, #:lo12:.LANCHOR96]
 	add	x2, x3, x2, uxtw 4
 	add	x1, x0, 4
 	add	x0, x0, x2
-.L2339:
+.L2342:
 	cmp	x1, x0
-	bne	.L2341
+	bne	.L2344
 	ldrh	w0, [x19, #:lo12:.LANCHOR230]
-	cbnz	w0, .L2340
-	b	.L2335
-.L2341:
+	cbnz	w0, .L2343
+	b	.L2338
+.L2344:
 	ldr	w2, [x1], 16
-	tbz	w2, #31, .L2339
-.L2340:
-	adrp	x22, .LANCHOR90
-	add	x20, x22, :lo12:.LANCHOR90
+	tbz	w2, #31, .L2342
+.L2343:
+	adrp	x22, .LANCHOR91
+	add	x20, x22, :lo12:.LANCHOR91
 	mov	x0, x20
-	adrp	x21, .LANCHOR91
+	adrp	x21, .LANCHOR92
 	bl	FtlSuperblockPowerLostFix
-	add	x19, x21, :lo12:.LANCHOR91
+	add	x19, x21, :lo12:.LANCHOR92
 	mov	x0, x19
 	bl	FtlSuperblockPowerLostFix
-	adrp	x0, .LANCHOR82
+	adrp	x0, .LANCHOR83
 	ldrh	w3, [x20, 4]
-	ldr	x1, [x0, #:lo12:.LANCHOR82]
-	ldrh	w0, [x22, #:lo12:.LANCHOR90]
+	ldr	x1, [x0, #:lo12:.LANCHOR83]
+	ldrh	w0, [x22, #:lo12:.LANCHOR91]
 	lsl	x0, x0, 1
 	ldrh	w2, [x1, x0]
 	sub	w2, w2, w3
-	adrp	x3, .LANCHOR51
+	adrp	x3, .LANCHOR52
 	strh	w2, [x1, x0]
 	strb	wzr, [x20, 6]
-	ldrh	w0, [x3, #:lo12:.LANCHOR51]
+	ldrh	w0, [x3, #:lo12:.LANCHOR52]
 	strh	w0, [x20, 2]
-	ldrh	w0, [x21, #:lo12:.LANCHOR91]
+	ldrh	w0, [x21, #:lo12:.LANCHOR92]
 	strh	wzr, [x20, 4]
 	ldrh	w4, [x19, 4]
 	lsl	x0, x0, 1
@@ -16013,7 +16034,7 @@ FtlSysBlkInit:
 	sub	w2, w2, w4
 	strh	w2, [x1, x0]
 	strb	wzr, [x19, 6]
-	ldrh	w0, [x3, #:lo12:.LANCHOR51]
+	ldrh	w0, [x3, #:lo12:.LANCHOR52]
 	strh	w0, [x19, 2]
 	strh	wzr, [x19, 4]
 	adrp	x0, .LANCHOR124
@@ -16022,96 +16043,96 @@ FtlSysBlkInit:
 	adrp	x0, .LANCHOR215
 	add	x0, x0, :lo12:.LANCHOR215
 	bl	FtlMapBlkWriteDumpData
-	adrp	x0, .LANCHOR135
-	add	x0, x0, :lo12:.LANCHOR135
+	adrp	x0, .LANCHOR80
+	add	x0, x0, :lo12:.LANCHOR80
 	ldrh	w1, [x0, 30]
 	add	w1, w1, 1
 	strh	w1, [x0, 30]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
 	bl	FtlVpcTblFlush
-	b	.L2335
+	b	.L2338
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.section	.text.rk_ftl_garbage_collect,"ax",@progbits
 	.align	2
 	.global	rk_ftl_garbage_collect
 	.type	rk_ftl_garbage_collect, %function
 rk_ftl_garbage_collect:
-	adrp	x1, .LANCHOR75
-	ldr	w1, [x1, #:lo12:.LANCHOR75]
-	cbnz	w1, .L2398
+	adrp	x1, .LANCHOR76
+	ldr	w1, [x1, #:lo12:.LANCHOR76]
+	cbnz	w1, .L2401
 	stp	x29, x30, [sp, -192]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR169
+	adrp	x21, .LANCHOR168
 	stp	x19, x20, [sp, 16]
-	ldr	w1, [x21, #:lo12:.LANCHOR169]
+	ldr	w1, [x21, #:lo12:.LANCHOR168]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w1, .L2400
-	adrp	x1, .LANCHOR84
-	ldrh	w1, [x1, #:lo12:.LANCHOR84]
+	cbnz	w1, .L2403
+	adrp	x1, .LANCHOR85
+	ldrh	w1, [x1, #:lo12:.LANCHOR85]
 	cmp	w1, 47
-	bls	.L2400
+	bls	.L2403
 	adrp	x1, .LANCHOR113
 	mov	w4, 65535
 	ldrh	w3, [x1, #:lo12:.LANCHOR113]
 	cmp	w3, w4
-	beq	.L2348
+	beq	.L2351
 	adrp	x2, .LANCHOR112
 	ldrh	w5, [x2, #:lo12:.LANCHOR112]
 	cmp	w5, w4
-	bne	.L2348
+	bne	.L2351
 	strh	w3, [x2, #:lo12:.LANCHOR112]
 	mov	w2, -1
 	strh	w2, [x1, #:lo12:.LANCHOR113]
-.L2348:
-	cbnz	w0, .L2401
-	adrp	x0, .LANCHOR87
-	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+.L2351:
+	cbnz	w0, .L2404
+	adrp	x0, .LANCHOR88
+	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w0, 24
-	bhi	.L2402
-	adrp	x1, .LANCHOR51
+	bhi	.L2405
+	adrp	x1, .LANCHOR52
 	cmp	w0, 16
-	ldrh	w20, [x1, #:lo12:.LANCHOR51]
-	bls	.L2351
+	ldrh	w20, [x1, #:lo12:.LANCHOR52]
+	bls	.L2354
 	lsr	w20, w20, 5
-.L2350:
-	adrp	x2, .LANCHOR174
+.L2353:
+	adrp	x2, .LANCHOR173
 	mov	x3, x2
-	ldrh	w1, [x2, #:lo12:.LANCHOR174]
+	ldrh	w1, [x2, #:lo12:.LANCHOR173]
 	cmp	w1, w0
-	bcs	.L2354
-	adrp	x0, .LANCHOR92
+	bcs	.L2357
+	adrp	x0, .LANCHOR93
 	mov	w1, 65535
-	ldrh	w0, [x0, #:lo12:.LANCHOR92]
+	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w0, w1
-	bne	.L2355
+	bne	.L2358
 	adrp	x1, .LANCHOR112
 	ldrh	w1, [x1, #:lo12:.LANCHOR112]
 	cmp	w1, w0
-	bne	.L2355
+	bne	.L2358
 	adrp	x0, .LANCHOR235
 	ldrh	w0, [x0, #:lo12:.LANCHOR235]
-	cbnz	w0, .L2356
-	adrp	x1, .LANCHOR71
-	adrp	x4, .LANCHOR99
-	ldr	w1, [x1, #:lo12:.LANCHOR71]
-	ldr	w4, [x4, #:lo12:.LANCHOR99]
+	cbnz	w0, .L2359
+	adrp	x1, .LANCHOR72
+	adrp	x4, .LANCHOR100
+	ldr	w1, [x1, #:lo12:.LANCHOR72]
+	ldr	w4, [x4, #:lo12:.LANCHOR100]
 	add	w1, w1, w1, lsl 1
 	cmp	w4, w1, lsr 2
-	bcs	.L2357
-.L2356:
+	bcs	.L2360
+.L2359:
 	adrp	x1, .LANCHOR227
 	ldrh	w1, [x1, #:lo12:.LANCHOR227]
 	add	w1, w1, w1, lsl 1
 	asr	w1, w1, 2
-	strh	w1, [x3, #:lo12:.LANCHOR174]
-.L2358:
-	adrp	x1, .LANCHOR170
-	str	wzr, [x1, #:lo12:.LANCHOR170]
-.L2346:
+	strh	w1, [x3, #:lo12:.LANCHOR173]
+.L2361:
+	adrp	x1, .LANCHOR169
+	str	wzr, [x1, #:lo12:.LANCHOR169]
+.L2349:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -16119,183 +16140,183 @@ rk_ftl_garbage_collect:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L2351:
+.L2354:
 	cmp	w0, 12
-	bls	.L2352
+	bls	.L2355
 	lsr	w20, w20, 4
-	b	.L2350
-.L2352:
+	b	.L2353
+.L2355:
 	cmp	w0, 8
-	bls	.L2350
+	bls	.L2353
 	lsr	w20, w20, 2
-	b	.L2350
-.L2402:
+	b	.L2353
+.L2405:
 	mov	w20, 1
-	b	.L2350
-.L2357:
+	b	.L2353
+.L2360:
 	mov	w1, 18
-	strh	w1, [x2, #:lo12:.LANCHOR174]
-	b	.L2358
-.L2355:
+	strh	w1, [x2, #:lo12:.LANCHOR173]
+	b	.L2361
+.L2358:
 	adrp	x0, .LANCHOR227
 	ldrh	w0, [x0, #:lo12:.LANCHOR227]
 	add	w0, w0, w0, lsl 1
 	asr	w0, w0, 2
-	strh	w0, [x3, #:lo12:.LANCHOR174]
-.L2354:
+	strh	w0, [x3, #:lo12:.LANCHOR173]
+.L2357:
 	adrp	x0, .LANCHOR114
 	ldrh	w0, [x0, #:lo12:.LANCHOR114]
-	cbz	w0, .L2349
+	cbz	w0, .L2352
 	add	w20, w20, 32
 	and	w20, w20, 65535
-.L2349:
+.L2352:
 	adrp	x19, .LANCHOR201
 	mov	w0, 65535
 	ldrh	w2, [x19, #:lo12:.LANCHOR201]
 	cmp	w2, w0
-	bne	.L2361
+	bne	.L2364
 	adrp	x0, .LANCHOR112
 	ldrh	w1, [x0, #:lo12:.LANCHOR112]
 	cmp	w1, w2
-	beq	.L2362
-	adrp	x2, .LANCHOR82
+	beq	.L2365
+	adrp	x2, .LANCHOR83
 	ubfiz	x1, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR82]
+	ldr	x2, [x2, #:lo12:.LANCHOR83]
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L2363
+	cbnz	w1, .L2366
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR112]
-.L2363:
+.L2366:
 	ldrh	w1, [x0, #:lo12:.LANCHOR112]
 	strh	w1, [x19, #:lo12:.LANCHOR201]
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR112]
-.L2362:
+.L2365:
 	add	x0, x19, :lo12:.LANCHOR201
 	mov	w1, 65535
 	strb	wzr, [x0, 8]
 	ldrh	w0, [x19, #:lo12:.LANCHOR201]
 	cmp	w0, w1
-	beq	.L2361
+	beq	.L2364
 	bl	IsBlkInGcList
-	cbz	w0, .L2365
+	cbz	w0, .L2368
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR201]
-.L2365:
+.L2368:
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L2366
+	cbz	w0, .L2369
 	ldrh	w0, [x19, #:lo12:.LANCHOR201]
 	add	x3, x19, :lo12:.LANCHOR201
 	bl	ftl_get_blk_mode
 	strb	w0, [x3, 8]
-.L2366:
+.L2369:
 	ldrh	w1, [x19, #:lo12:.LANCHOR201]
 	mov	w0, 65535
 	add	x22, x19, :lo12:.LANCHOR201
 	cmp	w1, w0
-	beq	.L2361
+	beq	.L2364
 	mov	x0, x22
 	bl	make_superblock
 	adrp	x0, .LANCHOR236
 	ldrh	w1, [x19, #:lo12:.LANCHOR201]
 	strh	wzr, [x22, 2]
 	strh	wzr, [x0, #:lo12:.LANCHOR236]
-	adrp	x0, .LANCHOR82
+	adrp	x0, .LANCHOR83
 	strb	wzr, [x22, 6]
-	ldr	x0, [x0, #:lo12:.LANCHOR82]
+	ldr	x0, [x0, #:lo12:.LANCHOR83]
 	ldrh	w1, [x0, x1, lsl 1]
 	adrp	x0, .LANCHOR237
 	strh	w1, [x0, #:lo12:.LANCHOR237]
-.L2361:
-	adrp	x0, .LANCHOR90
+.L2364:
+	adrp	x0, .LANCHOR91
 	ldrh	w1, [x19, #:lo12:.LANCHOR201]
 	str	x0, [x29, 144]
-	ldrh	w2, [x0, #:lo12:.LANCHOR90]
+	ldrh	w2, [x0, #:lo12:.LANCHOR91]
 	cmp	w2, w1
-	beq	.L2367
-	adrp	x0, .LANCHOR91
+	beq	.L2370
+	adrp	x0, .LANCHOR92
 	str	x0, [x29, 136]
-	ldrh	w2, [x0, #:lo12:.LANCHOR91]
+	ldrh	w2, [x0, #:lo12:.LANCHOR92]
 	cmp	w2, w1
-	beq	.L2367
-	adrp	x23, .LANCHOR176
-	add	x0, x23, :lo12:.LANCHOR176
+	beq	.L2370
+	adrp	x23, .LANCHOR175
+	add	x0, x23, :lo12:.LANCHOR175
 	str	x0, [x29, 168]
-.L2368:
+.L2371:
 	ldrh	w1, [x19, #:lo12:.LANCHOR201]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2369
-	adrp	x0, .LANCHOR170
-	adrp	x22, .LANCHOR51
-	add	x22, x22, :lo12:.LANCHOR51
-	str	wzr, [x0, #:lo12:.LANCHOR170]
-.L2370:
-	ldrh	w5, [x23, #:lo12:.LANCHOR176]
-	add	x7, x23, :lo12:.LANCHOR176
+	bne	.L2372
+	adrp	x0, .LANCHOR169
+	adrp	x22, .LANCHOR52
+	add	x22, x22, :lo12:.LANCHOR52
+	str	wzr, [x0, #:lo12:.LANCHOR169]
+.L2373:
+	ldrh	w5, [x23, #:lo12:.LANCHOR175]
+	add	x7, x23, :lo12:.LANCHOR175
 	mov	w0, w5
 	bl	List_get_gc_head_node
 	and	w6, w0, 65535
 	strh	w6, [x19, #:lo12:.LANCHOR201]
 	mov	w0, 65535
 	cmp	w6, w0
-	bne	.L2371
+	bne	.L2374
 	strh	wzr, [x7]
 	mov	w0, 8
-	b	.L2346
-.L2401:
-	mov	w20, 1
 	b	.L2349
-.L2367:
+.L2404:
+	mov	w20, 1
+	b	.L2352
+.L2370:
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR201]
-.L2437:
+.L2440:
 	adrp	x0, .LANCHOR235
 	ldrh	w0, [x0, #:lo12:.LANCHOR235]
-	b	.L2346
-.L2371:
+	b	.L2349
+.L2374:
 	mov	w0, w6
 	bl	IsBlkInGcList
 	add	w5, w5, 1
-	cbz	w0, .L2372
-	strh	w5, [x23, #:lo12:.LANCHOR176]
-	b	.L2370
-.L2372:
-	adrp	x24, .LANCHOR82
-	adrp	x4, .LANCHOR36
+	cbz	w0, .L2375
+	strh	w5, [x23, #:lo12:.LANCHOR175]
+	b	.L2373
+.L2375:
+	adrp	x24, .LANCHOR83
+	adrp	x4, .LANCHOR37
 	ldrh	w0, [x22]
 	ubfiz	x1, x6, 1, 16
-	ldr	x2, [x24, #:lo12:.LANCHOR82]
+	ldr	x2, [x24, #:lo12:.LANCHOR83]
 	and	w5, w5, 65535
-	ldrh	w4, [x4, #:lo12:.LANCHOR36]
-	strh	w5, [x23, #:lo12:.LANCHOR176]
+	ldrh	w4, [x4, #:lo12:.LANCHOR37]
+	strh	w5, [x23, #:lo12:.LANCHOR175]
 	ldrh	w3, [x2, x1]
 	mul	w0, w0, w4
 	cmp	w3, w0, asr 1
-	bgt	.L2374
+	bgt	.L2377
 	cmp	w5, 48
-	bls	.L2375
+	bls	.L2378
 	cmp	w3, 8
-	bls	.L2375
+	bls	.L2378
 	adrp	x3, .LANCHOR108
 	ldrh	w3, [x3, #:lo12:.LANCHOR108]
 	cmp	w3, 35
-	bhi	.L2375
-.L2374:
+	bhi	.L2378
+.L2377:
 	ldr	x3, [x29, 168]
 	strh	wzr, [x3]
-.L2375:
+.L2378:
 	ldrh	w1, [x2, x1]
 	cmp	w0, w1
-	bgt	.L2376
+	bgt	.L2379
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR201]
-	adrp	x0, .LANCHOR176
-	strh	wzr, [x0, #:lo12:.LANCHOR176]
-	b	.L2437
-.L2376:
-	cbnz	w1, .L2377
+	adrp	x0, .LANCHOR175
+	strh	wzr, [x0, #:lo12:.LANCHOR175]
+	b	.L2440
+.L2379:
+	cbnz	w1, .L2380
 	mov	w0, -1
 	bl	decrement_vpc_count
 	ldr	x0, [x29, 168]
@@ -16303,115 +16324,115 @@ rk_ftl_garbage_collect:
 	ldrh	w0, [x0]
 	add	w0, w0, 1
 	strh	w0, [x1]
-	b	.L2370
-.L2377:
+	b	.L2373
+.L2380:
 	adrp	x0, .LANCHOR8
 	add	x3, x19, :lo12:.LANCHOR201
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
 	strb	wzr, [x3, 8]
-	cbz	w0, .L2378
+	cbz	w0, .L2381
 	mov	w0, w6
 	bl	ftl_get_blk_mode
 	strb	w0, [x3, 8]
-.L2378:
+.L2381:
 	ldr	x0, [x29, 144]
-	ldrh	w0, [x0, #:lo12:.LANCHOR90]
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	cmp	w0, w6
-	bne	.L2379
+	bne	.L2382
 	mov	w2, 835
 	adrp	x1, .LANCHOR238
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR238
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR238
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L2379:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L2382:
 	ldr	x0, [x29, 136]
 	ldrh	w1, [x19, #:lo12:.LANCHOR201]
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	ldrh	w0, [x0, #:lo12:.LANCHOR92]
 	cmp	w1, w0
-	bne	.L2380
+	bne	.L2383
 	mov	w2, 836
 	adrp	x1, .LANCHOR238
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR238
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR238
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L2380:
-	adrp	x0, .LANCHOR92
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L2383:
+	adrp	x0, .LANCHOR93
 	ldrh	w1, [x19, #:lo12:.LANCHOR201]
-	ldrh	w0, [x0, #:lo12:.LANCHOR92]
+	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w1, w0
-	bne	.L2381
+	bne	.L2384
 	mov	w2, 837
 	adrp	x1, .LANCHOR238
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR238
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR238
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L2381:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L2384:
 	add	x22, x19, :lo12:.LANCHOR201
 	mov	x0, x22
 	bl	make_superblock
 	adrp	x0, .LANCHOR236
 	ldrh	w1, [x19, #:lo12:.LANCHOR201]
 	strh	wzr, [x0, #:lo12:.LANCHOR236]
-	ldr	x0, [x24, #:lo12:.LANCHOR82]
+	ldr	x0, [x24, #:lo12:.LANCHOR83]
 	ldrh	w1, [x0, x1, lsl 1]
 	adrp	x0, .LANCHOR237
 	strh	wzr, [x22, 2]
 	strh	w1, [x0, #:lo12:.LANCHOR237]
 	strb	wzr, [x22, 6]
-.L2369:
+.L2372:
 	mov	w0, 1
-	str	w0, [x21, #:lo12:.LANCHOR169]
+	str	w0, [x21, #:lo12:.LANCHOR168]
 	adrp	x0, .LANCHOR8
-	adrp	x1, .LANCHOR51
+	adrp	x1, .LANCHOR52
 	stp	x0, x1, [x29, 120]
 	ldrb	w2, [x0, #:lo12:.LANCHOR8]
-	ldrh	w26, [x1, #:lo12:.LANCHOR51]
-	cbz	w2, .L2382
+	ldrh	w26, [x1, #:lo12:.LANCHOR52]
+	cbz	w2, .L2385
 	add	x0, x19, :lo12:.LANCHOR201
 	ldrb	w0, [x0, 8]
 	cmp	w0, 1
-	bne	.L2382
-	adrp	x0, .LANCHOR52
-	ldrh	w26, [x0, #:lo12:.LANCHOR52]
-.L2382:
+	bne	.L2385
+	adrp	x0, .LANCHOR53
+	ldrh	w26, [x0, #:lo12:.LANCHOR53]
+.L2385:
 	add	x0, x19, :lo12:.LANCHOR201
 	ldrh	w0, [x0, 2]
 	add	w1, w0, w20
 	cmp	w1, w26
-	ble	.L2383
+	ble	.L2386
 	sub	w20, w26, w0
 	and	w20, w20, 65535
-.L2383:
+.L2386:
 	adrp	x0, .LANCHOR236
 	mov	w27, 0
 	add	x0, x0, :lo12:.LANCHOR236
 	str	x0, [x29, 160]
-.L2384:
+.L2387:
 	cmp	w20, w27, uxth
-	bls	.L2392
+	bls	.L2395
 	add	x1, x19, :lo12:.LANCHOR201
-	adrp	x0, .LANCHOR36
+	adrp	x0, .LANCHOR37
 	adrp	x24, .LANCHOR106
 	add	x1, x1, 16
-	ldrh	w7, [x0, #:lo12:.LANCHOR36]
+	ldrh	w7, [x0, #:lo12:.LANCHOR37]
 	mov	w22, 0
 	ldrh	w4, [x1, -14]
 	mov	w2, 0
@@ -16419,23 +16440,23 @@ rk_ftl_garbage_collect:
 	mov	w6, 65535
 	add	w4, w4, w27
 	mov	w5, 56
-	b	.L2393
-.L2386:
+	b	.L2396
+.L2389:
 	ldrh	w3, [x1]
 	cmp	w3, w6
-	beq	.L2385
+	beq	.L2388
 	umaddl	x8, w22, w5, x0
 	add	w22, w22, 1
 	and	w22, w22, 65535
 	orr	w3, w4, w3, lsl 10
 	str	w3, [x8, 4]
-.L2385:
+.L2388:
 	add	w2, w2, 1
 	add	x1, x1, 2
 	and	w2, w2, 65535
-.L2393:
+.L2396:
 	cmp	w2, w7
-	bne	.L2386
+	bne	.L2389
 	add	x1, x19, :lo12:.LANCHOR201
 	adrp	x25, .LANCHOR102
 	add	x25, x25, :lo12:.LANCHOR102
@@ -16446,40 +16467,40 @@ rk_ftl_garbage_collect:
 	umull	x0, w22, w0
 	mov	x22, 0
 	str	x0, [x29, 152]
-.L2387:
+.L2390:
 	ldr	x0, [x29, 152]
 	cmp	x22, x0
-	bne	.L2391
+	bne	.L2394
 	add	w27, w27, 1
-	b	.L2384
-.L2391:
+	b	.L2387
+.L2394:
 	ldr	x0, [x24, #:lo12:.LANCHOR106]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	beq	.L2388
+	beq	.L2391
 	ldr	x28, [x1, 16]
 	mov	w0, 61589
 	ldrh	w1, [x28]
 	cmp	w1, w0
-	bne	.L2388
+	bne	.L2391
 	ldr	w4, [x28, 8]
 	cmn	w4, #1
-	bne	.L2389
+	bne	.L2392
 	mov	w2, 876
 	str	w4, [x29, 112]
 	adrp	x1, .LANCHOR238
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR238
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR238
 	add	x0, x0, :lo12:.LC6
 	bl	printf
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
 	ldr	w4, [x29, 112]
-.L2389:
+.L2392:
 	mov	w2, 0
 	add	x1, x29, 188
 	mov	w0, w4
@@ -16490,11 +16511,11 @@ rk_ftl_garbage_collect:
 	and	w1, w1, 2147483647
 	ldr	w2, [x0, 4]
 	cmp	w1, w2
-	bne	.L2388
+	bne	.L2391
 	ldr	x1, [x29, 160]
-	adrp	x4, .LANCHOR179
+	adrp	x4, .LANCHOR178
 	ldr	x2, [x29, 160]
-	ldr	x5, [x4, #:lo12:.LANCHOR179]
+	ldr	x5, [x4, #:lo12:.LANCHOR178]
 	ldr	w0, [x0, 24]
 	ldrh	w1, [x1]
 	str	x4, [x29, 96]
@@ -16512,7 +16533,7 @@ rk_ftl_garbage_collect:
 	ldr	x2, [x29, 112]
 	ldr	w1, [x29, 108]
 	str	w0, [x2, 4]
-	ldr	x0, [x4, #:lo12:.LANCHOR179]
+	ldr	x0, [x4, #:lo12:.LANCHOR178]
 	ldr	w2, [x25]
 	umaddl	x1, w2, w1, x0
 	ldr	x0, [x24, #:lo12:.LANCHOR106]
@@ -16524,84 +16545,84 @@ rk_ftl_garbage_collect:
 	str	x4, [x1, 16]
 	ldr	w1, [x29, 188]
 	str	w1, [x28, 12]
-	adrp	x1, .LANCHOR92
-	add	x12, x1, :lo12:.LANCHOR92
-	ldrh	w1, [x1, #:lo12:.LANCHOR92]
+	adrp	x1, .LANCHOR93
+	add	x12, x1, :lo12:.LANCHOR93
+	ldrh	w1, [x1, #:lo12:.LANCHOR93]
 	strh	w1, [x28, 2]
-	adrp	x1, .LANCHOR158
+	adrp	x1, .LANCHOR157
 	str	w2, [x25]
-	ldr	w1, [x1, #:lo12:.LANCHOR158]
+	ldr	w1, [x1, #:lo12:.LANCHOR157]
 	str	w1, [x28, 4]
 	mov	w1, 1
 	bl	FtlGcBufAlloc
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbnz	w0, .L2390
+	cbnz	w0, .L2393
 	ldrb	w1, [x12, 7]
 	ldr	w0, [x25]
 	cmp	w1, w0
-	beq	.L2390
+	beq	.L2393
 	ldrh	w0, [x12, 4]
-	cbnz	w0, .L2388
-.L2390:
+	cbnz	w0, .L2391
+.L2393:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	w0, .L2388
-.L2438:
-	str	wzr, [x21, #:lo12:.LANCHOR169]
-	b	.L2437
-.L2388:
+	cbz	w0, .L2391
+.L2441:
+	str	wzr, [x21, #:lo12:.LANCHOR168]
+	b	.L2440
+.L2391:
 	add	x22, x22, 56
-	b	.L2387
-.L2392:
+	b	.L2390
+.L2395:
 	add	x1, x19, :lo12:.LANCHOR201
 	ldrh	w0, [x1, 2]
 	add	w20, w20, w0
 	and	w20, w20, 65535
 	strh	w20, [x1, 2]
 	cmp	w26, w20
-	bhi	.L2394
+	bhi	.L2397
 	adrp	x0, .LANCHOR102
 	ldr	w0, [x0, #:lo12:.LANCHOR102]
-	cbz	w0, .L2395
+	cbz	w0, .L2398
 	bl	Ftl_gc_temp_data_write_back
-	cbnz	w0, .L2438
-.L2395:
+	cbnz	w0, .L2441
+.L2398:
 	adrp	x0, .LANCHOR236
 	ldrh	w0, [x0, #:lo12:.LANCHOR236]
-	cbnz	w0, .L2396
+	cbnz	w0, .L2399
 	ldrh	w0, [x19, #:lo12:.LANCHOR201]
-	adrp	x1, .LANCHOR82
-	ldr	x1, [x1, #:lo12:.LANCHOR82]
+	adrp	x1, .LANCHOR83
+	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	lsl	x0, x0, 1
 	ldrh	w2, [x1, x0]
-	cbz	w2, .L2396
+	cbz	w2, .L2399
 	strh	wzr, [x1, x0]
 	ldrh	w0, [x19, #:lo12:.LANCHOR201]
 	bl	update_vpc_list
 	bl	FtlCacheWriteBack
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L2396:
+.L2399:
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR201]
-.L2394:
-	adrp	x0, .LANCHOR87
-	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+.L2397:
+	adrp	x0, .LANCHOR88
+	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w0, 2
-	bhi	.L2397
+	bhi	.L2400
 	ldr	x0, [x29, 128]
-	ldrh	w20, [x0, #:lo12:.LANCHOR51]
-	b	.L2368
-.L2397:
-	str	wzr, [x21, #:lo12:.LANCHOR169]
+	ldrh	w20, [x0, #:lo12:.LANCHOR52]
+	b	.L2371
+.L2400:
+	str	wzr, [x21, #:lo12:.LANCHOR168]
 	add	w0, w0, 1
-	b	.L2346
-.L2398:
+	b	.L2349
+.L2401:
 	mov	w0, 0
 	ret
-.L2400:
+.L2403:
 	mov	w0, 0
-	b	.L2346
+	b	.L2349
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
 	.section	.text.FtlInit,"ax",@progbits
 	.align	2
@@ -16609,8 +16630,8 @@ rk_ftl_garbage_collect:
 	.type	FtlInit, %function
 FtlInit:
 	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LC48
-	add	x1, x1, :lo12:.LC48
+	adrp	x1, .LC51
+	add	x1, x1, :lo12:.LC51
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR223
@@ -16619,55 +16640,55 @@ FtlInit:
 	str	w0, [x19, #:lo12:.LANCHOR223]
 	adrp	x0, .LANCHOR239
 	str	wzr, [x0, #:lo12:.LANCHOR239]
-	adrp	x0, .LANCHOR75
-	str	wzr, [x0, #:lo12:.LANCHOR75]
-	adrp	x0, .LC6
-	add	x0, x0, :lo12:.LC6
+	adrp	x0, .LANCHOR76
+	str	wzr, [x0, #:lo12:.LANCHOR76]
+	adrp	x0, .LC8
+	add	x0, x0, :lo12:.LC8
 	bl	printf
 	mov	x0, x20
 	bl	FtlConstantsInit
 	bl	FtlMemInit
 	bl	FtlVariablesInit
-	adrp	x0, .LANCHOR37
-	ldrh	w0, [x0, #:lo12:.LANCHOR37]
+	adrp	x0, .LANCHOR38
+	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	w0, .L2440
+	cbz	w0, .L2443
 	adrp	x1, .LANCHOR240
-	adrp	x0, .LC49
+	adrp	x0, .LC52
 	add	x1, x1, :lo12:.LANCHOR240
-	add	x0, x0, :lo12:.LC49
-.L2448:
+	add	x0, x0, :lo12:.LC52
+.L2451:
 	bl	printf
-.L2441:
+.L2444:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2440:
+.L2443:
 	bl	FtlSysBlkInit
-	cbz	w0, .L2442
+	cbz	w0, .L2445
 	adrp	x1, .LANCHOR240
-	adrp	x0, .LC50
+	adrp	x0, .LC53
 	add	x1, x1, :lo12:.LANCHOR240
-	add	x0, x0, :lo12:.LC50
-	b	.L2448
-.L2442:
+	add	x0, x0, :lo12:.LC53
+	b	.L2451
+.L2445:
 	mov	w1, 1
 	str	w1, [x19, #:lo12:.LANCHOR223]
 	bl	rk_ftl_garbage_collect
-	adrp	x0, .LANCHOR87
-	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	adrp	x0, .LANCHOR88
+	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w0, 15
-	bhi	.L2441
+	bhi	.L2444
 	mov	w19, 1024
-.L2444:
+.L2447:
 	mov	w1, 1
 	mov	w0, w1
 	bl	rk_ftl_garbage_collect
 	subs	w19, w19, #1
-	bne	.L2444
-	b	.L2441
+	bne	.L2447
+	b	.L2444
 	.size	FtlInit, .-FtlInit
 	.section	.text.rk_ftl_init,"ax",@progbits
 	.align	2
@@ -16679,14 +16700,14 @@ rk_ftl_init:
 	str	x19, [sp, 16]
 	bl	FlashInit
 	mov	w19, w0
-	cbnz	w0, .L2450
+	cbnz	w0, .L2453
 	adrp	x0, .LANCHOR15
 	add	x0, x0, :lo12:.LANCHOR15
 	bl	FtlInit
-.L2450:
+.L2453:
 	mov	w1, w19
-	adrp	x0, .LC51
-	add	x0, x0, :lo12:.LC51
+	adrp	x0, .LC54
+	add	x0, x0, :lo12:.LC54
 	bl	printf
 	mov	w0, w19
 	ldr	x19, [sp, 16]
@@ -16700,84 +16721,84 @@ rk_ftl_init:
 ftl_fix_nand_power_lost_error:
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L2467
+	cbz	w0, .L2470
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
 	str	x25, [sp, 64]
 	adrp	x25, .LANCHOR229
 	stp	x23, x24, [sp, 48]
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR82
+	adrp	x21, .LANCHOR83
 	ldrh	w23, [x25, #:lo12:.LANCHOR229]
-	ldr	x0, [x21, #:lo12:.LANCHOR82]
+	ldr	x0, [x21, #:lo12:.LANCHOR83]
 	mov	w1, w23
 	stp	x19, x20, [sp, 16]
 	ubfiz	x24, x23, 1, 16
-	adrp	x19, .LC52
+	adrp	x19, .LC55
 	ldrh	w2, [x0, x24]
-	add	x0, x19, :lo12:.LC52
+	add	x0, x19, :lo12:.LC55
 	bl	printf
-	adrp	x0, .LANCHOR90
-	add	x6, x0, :lo12:.LANCHOR90
-	ldrh	w0, [x0, #:lo12:.LANCHOR90]
-	bl	FtlGcRefreshBlock
 	adrp	x0, .LANCHOR91
-	add	x20, x0, :lo12:.LANCHOR91
+	add	x6, x0, :lo12:.LANCHOR91
 	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	bl	FtlGcRefreshBlock
+	adrp	x0, .LANCHOR92
+	add	x20, x0, :lo12:.LANCHOR92
+	ldrh	w0, [x0, #:lo12:.LANCHOR92]
+	bl	FtlGcRefreshBlock
 	mov	x0, x6
 	bl	allocate_new_data_superblock
 	mov	x0, x20
 	mov	w20, 4097
 	bl	allocate_new_data_superblock
-.L2454:
+.L2457:
 	subs	w20, w20, #1
-	beq	.L2458
+	beq	.L2461
 	mov	w1, 1
 	mov	w0, w1
 	bl	rk_ftl_garbage_collect
-	ldr	x0, [x21, #:lo12:.LANCHOR82]
+	ldr	x0, [x21, #:lo12:.LANCHOR83]
 	ldrh	w0, [x0, x24]
-	cbnz	w0, .L2454
-.L2458:
-	ldr	x0, [x21, #:lo12:.LANCHOR82]
+	cbnz	w0, .L2457
+.L2461:
+	ldr	x0, [x21, #:lo12:.LANCHOR83]
 	mov	w1, w23
 	ldrh	w2, [x0, x24]
-	add	x0, x19, :lo12:.LC52
+	add	x0, x19, :lo12:.LC55
 	bl	printf
-	ldr	x0, [x21, #:lo12:.LANCHOR82]
+	ldr	x0, [x21, #:lo12:.LANCHOR83]
 	ldrh	w19, [x0, x24]
-	cbnz	w19, .L2456
+	cbnz	w19, .L2459
 	add	x20, x29, 128
-	adrp	x22, .LANCHOR76
+	adrp	x22, .LANCHOR77
 	strh	w23, [x20, -48]!
 	mov	x0, x20
 	bl	make_superblock
-	adrp	x0, .LANCHOR36
-	ldr	x4, [x22, #:lo12:.LANCHOR76]
+	adrp	x0, .LANCHOR37
+	ldr	x4, [x22, #:lo12:.LANCHOR77]
 	add	x20, x20, 16
 	mov	w5, 65535
-	ldrh	w3, [x0, #:lo12:.LANCHOR36]
+	ldrh	w3, [x0, #:lo12:.LANCHOR37]
 	mov	w6, 56
 	mov	w0, 0
-.L2459:
+.L2462:
 	cmp	w0, w3
-	bne	.L2461
-	ldr	x0, [x21, #:lo12:.LANCHOR82]
+	bne	.L2464
+	ldr	x0, [x21, #:lo12:.LANCHOR83]
 	mov	w1, w23
 	ldrh	w2, [x0, x24]
-	adrp	x0, .LC53
-	add	x0, x0, :lo12:.LC53
+	adrp	x0, .LC56
+	add	x0, x0, :lo12:.LC56
 	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR76]
+	ldr	x0, [x22, #:lo12:.LANCHOR77]
 	mov	w2, w19
 	mov	w1, 0
 	bl	FlashEraseBlocks
-	ldr	x0, [x22, #:lo12:.LANCHOR76]
+	ldr	x0, [x22, #:lo12:.LANCHOR77]
 	mov	w2, w19
 	mov	w1, 1
 	bl	FlashEraseBlocks
-.L2456:
+.L2459:
 	mov	w0, -1
 	strh	w0, [x25, #:lo12:.LANCHOR229]
 	ldp	x19, x20, [sp, 16]
@@ -16786,22 +16807,22 @@ ftl_fix_nand_power_lost_error:
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2461:
+.L2464:
 	ldrh	w1, [x20]
 	cmp	w1, w5
-	beq	.L2460
+	beq	.L2463
 	umaddl	x2, w19, w6, x4
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	lsl	w1, w1, 10
 	stp	xzr, xzr, [x2, 8]
 	str	w1, [x2, 4]
-.L2460:
+.L2463:
 	add	w0, w0, 1
 	add	x20, x20, 2
 	and	w0, w0, 65535
-	b	.L2459
-.L2467:
+	b	.L2462
+.L2470:
 	ret
 	.size	ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error
 	.section	.text.ftl_read,"ax",@progbits
@@ -16821,13 +16842,13 @@ ftl_read:
 	mov	w26, w2
 	stp	x21, x22, [sp, 32]
 	stp	x27, x28, [sp, 80]
-	bne	.L2471
+	bne	.L2474
 	mov	x2, x3
 	mov	w1, w26
 	add	w0, w19, 256
 	bl	FtlVendorPartRead
 	mov	w21, w0
-.L2470:
+.L2473:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -16836,77 +16857,77 @@ ftl_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L2471:
+.L2474:
 	add	w0, w1, w2
 	str	w0, [x29, 136]
-	adrp	x0, .LANCHOR67
+	adrp	x0, .LANCHOR68
 	add	w1, w1, w2
-	ldr	w0, [x0, #:lo12:.LANCHOR67]
+	ldr	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w1, w0
-	bhi	.L2493
+	bhi	.L2496
 	adrp	x0, .LANCHOR223
 	ldr	w21, [x0, #:lo12:.LANCHOR223]
 	cmn	w21, #1
-	beq	.L2470
-	adrp	x22, .LANCHOR54
+	beq	.L2473
+	adrp	x22, .LANCHOR55
 	bl	FtlCacheWriteBack
 	mov	w25, 0
 	mov	w21, 0
-	ldrh	w0, [x22, #:lo12:.LANCHOR54]
-	adrp	x27, .LANCHOR178
+	ldrh	w0, [x22, #:lo12:.LANCHOR55]
+	adrp	x27, .LANCHOR177
 	stp	wzr, wzr, [x29, 144]
 	udiv	w1, w19, w0
 	str	w1, [x29, 152]
 	add	w1, w19, w26
 	sub	w24, w1, #1
-	adrp	x1, .LANCHOR164
+	adrp	x1, .LANCHOR163
 	ldr	w20, [x29, 152]
 	udiv	w24, w24, w0
 	ldr	w0, [x29, 152]
 	sub	w0, w24, w0
 	add	w0, w0, 1
 	str	w0, [x29, 156]
-	ldr	w0, [x1, #:lo12:.LANCHOR164]
+	ldr	w0, [x1, #:lo12:.LANCHOR163]
 	ldr	w2, [x29, 156]
 	add	w0, w0, w2
-	str	w0, [x1, #:lo12:.LANCHOR164]
-.L2473:
+	str	w0, [x1, #:lo12:.LANCHOR163]
+.L2476:
 	ldr	w0, [x29, 156]
-	cbnz	w0, .L2492
+	cbnz	w0, .L2495
 	adrp	x0, .LANCHOR114
 	ldrh	w0, [x0, #:lo12:.LANCHOR114]
-	cbz	w0, .L2470
+	cbz	w0, .L2473
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-	b	.L2470
-.L2492:
+	b	.L2473
+.L2495:
 	add	x1, x29, 172
 	mov	w2, 0
 	mov	w0, w20
 	bl	log2phys
 	ldr	w1, [x29, 172]
 	cmn	w1, #1
-	bne	.L2474
-	add	x3, x22, :lo12:.LANCHOR54
+	bne	.L2477
+	add	x3, x22, :lo12:.LANCHOR55
 	mov	w28, 0
-.L2475:
+.L2478:
 	ldrh	w0, [x3]
 	cmp	w28, w0
-	bcc	.L2477
-.L2478:
+	bcc	.L2480
+.L2481:
 	ldr	w0, [x29, 156]
 	add	w20, w20, 1
 	subs	w0, w0, #1
 	str	w0, [x29, 156]
-	beq	.L2482
-	adrp	x0, .LANCHOR36
-	ldrh	w0, [x0, #:lo12:.LANCHOR36]
+	beq	.L2485
+	adrp	x0, .LANCHOR37
+	ldrh	w0, [x0, #:lo12:.LANCHOR37]
 	cmp	w25, w0, lsl 2
-	bne	.L2473
-.L2482:
-	cbz	w25, .L2473
-	ldr	x0, [x27, #:lo12:.LANCHOR178]
+	bne	.L2476
+.L2485:
+	cbz	w25, .L2476
+	ldr	x0, [x27, #:lo12:.LANCHOR177]
 	mov	w1, w25
 	mov	w2, 0
 	bl	FlashReadPages
@@ -16923,50 +16944,50 @@ ftl_read:
 	umull	x0, w25, w0
 	mov	x25, 0
 	str	x0, [x29, 104]
-	adrp	x0, .LANCHOR136
-	add	x28, x0, :lo12:.LANCHOR136
-.L2491:
-	ldr	x0, [x27, #:lo12:.LANCHOR178]
+	adrp	x0, .LANCHOR135
+	add	x28, x0, :lo12:.LANCHOR135
+.L2494:
+	ldr	x0, [x27, #:lo12:.LANCHOR177]
 	ldr	w2, [x29, 152]
 	add	x0, x0, x25
 	ldr	w1, [x0, 24]
 	cmp	w2, w1
-	bne	.L2484
+	bne	.L2487
 	ldr	x1, [x0, 8]
 	adrp	x0, .LANCHOR183
 	ldr	x0, [x0, #:lo12:.LANCHOR183]
 	cmp	x1, x0
-	bne	.L2485
+	bne	.L2488
 	ldr	x0, [x29, 128]
 	ldr	w2, [x29, 124]
 	add	x1, x1, x0
 	mov	x0, x23
-.L2508:
+.L2511:
 	bl	ftl_memcpy
-.L2485:
-	ldr	x0, [x27, #:lo12:.LANCHOR178]
+.L2488:
+	ldr	x0, [x27, #:lo12:.LANCHOR177]
 	add	x1, x0, x25
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	bne	.L2486
+	bne	.L2489
 	ldr	w1, [x28, 72]
 	mov	w21, w0
 	add	w1, w1, 1
 	str	w1, [x28, 72]
-.L2487:
+.L2490:
 	ldr	x0, [x29, 104]
 	add	x25, x25, 56
 	cmp	x0, x25
-	bne	.L2491
+	bne	.L2494
 	mov	w25, 0
-	b	.L2473
-.L2477:
+	b	.L2476
+.L2480:
 	madd	w0, w20, w0, w28
 	cmp	w19, w0
-	bhi	.L2476
+	bhi	.L2479
 	ldr	w1, [x29, 136]
 	cmp	w1, w0
-	bls	.L2476
+	bls	.L2479
 	sub	w0, w0, w19
 	str	x3, [x29, 128]
 	lsl	w0, w0, 9
@@ -16975,21 +16996,21 @@ ftl_read:
 	add	x0, x23, x0
 	bl	ftl_memset
 	ldr	x3, [x29, 128]
-.L2476:
+.L2479:
 	add	w28, w28, 1
-	b	.L2475
-.L2474:
-	ldr	x0, [x27, #:lo12:.LANCHOR178]
+	b	.L2478
+.L2477:
+	ldr	x0, [x27, #:lo12:.LANCHOR177]
 	mov	w2, 56
 	umaddl	x0, w25, w2, x0
 	str	w1, [x0, 4]
 	ldr	w1, [x29, 152]
 	cmp	w20, w1
-	bne	.L2479
+	bne	.L2482
 	adrp	x1, .LANCHOR183
 	ldr	x1, [x1, #:lo12:.LANCHOR183]
 	str	x1, [x0, 8]
-	ldrh	w1, [x22, #:lo12:.LANCHOR54]
+	ldrh	w1, [x22, #:lo12:.LANCHOR55]
 	udiv	w2, w19, w1
 	msub	w2, w2, w1, w19
 	str	w2, [x29, 140]
@@ -16998,24 +17019,24 @@ ftl_read:
 	csel	w2, w26, w2, ls
 	str	w2, [x29, 148]
 	cmp	w1, w2
-	bne	.L2480
+	bne	.L2483
 	str	x23, [x0, 8]
-.L2480:
-	adrp	x1, .LANCHOR57
+.L2483:
+	adrp	x1, .LANCHOR58
 	adrp	x2, .LANCHOR186
 	str	w20, [x0, 24]
-	ldrh	w1, [x1, #:lo12:.LANCHOR57]
+	ldrh	w1, [x1, #:lo12:.LANCHOR58]
 	ldr	x2, [x2, #:lo12:.LANCHOR186]
 	mul	w1, w1, w25
 	add	w25, w25, 1
 	and	x1, x1, 4294967292
 	add	x1, x2, x1
 	str	x1, [x0, 16]
-	b	.L2478
-.L2479:
+	b	.L2481
+.L2482:
 	cmp	w20, w24
-	bne	.L2481
-	ldrh	w2, [x22, #:lo12:.LANCHOR54]
+	bne	.L2484
+	ldrh	w2, [x22, #:lo12:.LANCHOR55]
 	adrp	x1, .LANCHOR184
 	ldr	w3, [x29, 136]
 	ldr	x1, [x1, #:lo12:.LANCHOR184]
@@ -17024,35 +17045,35 @@ ftl_read:
 	sub	w3, w3, w1
 	str	w3, [x29, 144]
 	cmp	w2, w3
-	bne	.L2480
-.L2507:
+	bne	.L2483
+.L2510:
 	sub	w1, w1, w19
 	lsl	w1, w1, 9
 	add	x1, x23, x1
 	str	x1, [x0, 8]
-	b	.L2480
-.L2481:
-	ldrh	w1, [x22, #:lo12:.LANCHOR54]
-	mul	w1, w1, w20
-	b	.L2507
+	b	.L2483
 .L2484:
+	ldrh	w1, [x22, #:lo12:.LANCHOR55]
+	mul	w1, w1, w20
+	b	.L2510
+.L2487:
 	cmp	w24, w1
-	bne	.L2485
+	bne	.L2488
 	ldr	x1, [x0, 8]
 	adrp	x0, .LANCHOR184
 	ldr	x0, [x0, #:lo12:.LANCHOR184]
 	cmp	x1, x0
-	bne	.L2485
-	ldrh	w0, [x22, #:lo12:.LANCHOR54]
+	bne	.L2488
+	ldrh	w0, [x22, #:lo12:.LANCHOR55]
 	ldr	w2, [x29, 120]
 	mul	w0, w0, w24
 	sub	w0, w0, w19
 	lsl	w0, w0, 9
 	add	x0, x23, x0
-	b	.L2508
-.L2486:
+	b	.L2511
+.L2489:
 	cmp	w0, 256
-	bne	.L2487
+	bne	.L2490
 	ldr	w0, [x1, 4]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
@@ -17060,13 +17081,13 @@ ftl_read:
 	str	w1, [x29, 116]
 	bl	FtlGcRefreshBlock
 	mov	w2, 2049
-.L2489:
+.L2492:
 	subs	w2, w2, #1
-	bne	.L2488
-.L2490:
+	bne	.L2491
+.L2493:
 	bl	FtlSysFlush
-	b	.L2487
-.L2488:
+	b	.L2490
+.L2491:
 	mov	w1, 1
 	str	w2, [x29, 112]
 	mov	w0, w1
@@ -17075,11 +17096,11 @@ ftl_read:
 	ldp	w2, w1, [x29, 112]
 	ldrh	w0, [x0, #:lo12:.LANCHOR201]
 	cmp	w0, w1
-	beq	.L2489
-	b	.L2490
-.L2493:
+	beq	.L2492
+	b	.L2493
+.L2496:
 	mov	w21, -1
-	b	.L2470
+	b	.L2473
 	.size	ftl_read, .-ftl_read
 	.section	.text.ftl_write,"ax",@progbits
 	.align	2
@@ -17098,12 +17119,12 @@ ftl_write:
 	mov	w22, w1
 	stp	x23, x24, [sp, 48]
 	stp	x27, x28, [sp, 80]
-	bne	.L2510
+	bne	.L2513
 	mov	x2, x3
 	mov	w1, w25
 	add	w0, w22, 256
 	bl	FtlVendorPartWrite
-.L2509:
+.L2512:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -17111,72 +17132,72 @@ ftl_write:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 240
 	ret
-.L2510:
-	adrp	x0, .LANCHOR67
+.L2513:
+	adrp	x0, .LANCHOR68
 	add	w2, w1, w2
-	ldr	w0, [x0, #:lo12:.LANCHOR67]
+	ldr	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w2, w0
-	bhi	.L2544
+	bhi	.L2547
 	adrp	x0, .LANCHOR223
 	ldr	w0, [x0, #:lo12:.LANCHOR223]
 	cmn	w0, #1
-	beq	.L2509
+	beq	.L2512
 	adrp	x0, .LANCHOR241
-	adrp	x3, .LANCHOR54
+	adrp	x3, .LANCHOR55
 	mov	w1, 2048
 	sub	w2, w2, #1
 	str	w1, [x0, #:lo12:.LANCHOR241]
-	ldrh	w1, [x3, #:lo12:.LANCHOR54]
+	ldrh	w1, [x3, #:lo12:.LANCHOR55]
 	str	x3, [x29, 160]
 	udiv	w0, w2, w1
-	adrp	x2, .LANCHOR160
+	adrp	x2, .LANCHOR159
 	udiv	w21, w22, w1
 	str	w0, [x29, 152]
 	sub	w23, w0, w21
-	ldr	w0, [x2, #:lo12:.LANCHOR160]
+	ldr	w0, [x2, #:lo12:.LANCHOR159]
 	add	w24, w23, 1
 	add	w0, w0, w24
-	str	w0, [x2, #:lo12:.LANCHOR160]
+	str	w0, [x2, #:lo12:.LANCHOR159]
 	adrp	x0, .LANCHOR129
 	str	x0, [x29, 120]
 	ldr	x2, [x0, #:lo12:.LANCHOR129]
-	cbz	x2, .L2512
+	cbz	x2, .L2515
 	ldr	w0, [x2, 24]
 	cmp	w21, w0
-	beq	.L2513
+	beq	.L2516
 	bl	FtlCacheWriteBack
-.L2512:
-	adrp	x0, .LANCHOR90
+.L2515:
+	adrp	x0, .LANCHOR91
 	mov	w19, w21
-	add	x23, x0, :lo12:.LANCHOR90
-.L2514:
-	cbz	w24, .L2543
-	adrp	x0, .LANCHOR90
-	add	x0, x0, :lo12:.LANCHOR90
-	adrp	x1, .LANCHOR36
+	add	x23, x0, :lo12:.LANCHOR91
+.L2517:
+	cbz	w24, .L2546
+	adrp	x0, .LANCHOR91
+	add	x0, x0, :lo12:.LANCHOR91
+	adrp	x1, .LANCHOR37
 	str	x1, [x29, 112]
 	ldrb	w2, [x0, 6]
-	ldrh	w0, [x1, #:lo12:.LANCHOR36]
+	ldrh	w0, [x1, #:lo12:.LANCHOR37]
 	cmp	w2, w0
-	bcc	.L2515
-	mov	w2, 1632
+	bcc	.L2518
+	mov	w2, 1644
 	adrp	x1, .LANCHOR242
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR242
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR242
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L2515:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L2518:
 	ldrh	w0, [x23, 4]
-	cbnz	w0, .L2516
+	cbnz	w0, .L2519
 	bl	FtlCacheWriteBack
 	mov	x0, x23
 	bl	allocate_new_data_superblock
-.L2516:
+.L2519:
 	ldrb	w0, [x23, 7]
 	ldrh	w1, [x23, 4]
 	lsl	w0, w0, 2
@@ -17187,52 +17208,52 @@ ftl_write:
 	csel	w0, w0, w24, ls
 	str	w0, [x29, 144]
 	ldr	x0, [x29, 112]
-	ldrh	w0, [x0, #:lo12:.LANCHOR36]
+	ldrh	w0, [x0, #:lo12:.LANCHOR37]
 	cmp	w1, w0
-	bcc	.L2517
-	mov	w2, 1665
+	bcc	.L2520
+	mov	w2, 1677
 	adrp	x1, .LANCHOR242
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR242
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR242
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L2517:
-	adrp	x0, .LANCHOR57
-	adrp	x28, .LANCHOR180
-	add	x0, x0, :lo12:.LANCHOR57
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L2520:
+	adrp	x0, .LANCHOR58
+	adrp	x28, .LANCHOR179
+	add	x0, x0, :lo12:.LANCHOR58
 	str	xzr, [x29, 168]
 	str	x0, [x29, 104]
-.L2518:
+.L2521:
 	ldr	w1, [x29, 144]
 	ldr	w27, [x29, 168]
 	cmp	w27, w1
-	bcc	.L2539
+	bcc	.L2542
 	mov	x27, x1
-.L2519:
+.L2522:
 	ldr	x0, [x29, 120]
 	ldr	x0, [x0, #:lo12:.LANCHOR129]
-	cbz	x0, .L2540
+	cbz	x0, .L2543
 	sub	w24, w24, #1
 	subs	w27, w27, #1
-	bne	.L2540
-.L2543:
+	bne	.L2543
+.L2546:
 	ldr	w0, [x29, 152]
 	sub	w1, w0, w21
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-.L2546:
+.L2549:
 	mov	w0, 0
-	b	.L2509
-.L2513:
-	adrp	x3, .LANCHOR162
-	ldr	w0, [x3, #:lo12:.LANCHOR162]
+	b	.L2512
+.L2516:
+	adrp	x3, .LANCHOR161
+	ldr	w0, [x3, #:lo12:.LANCHOR161]
 	add	w0, w0, 1
-	str	w0, [x3, #:lo12:.LANCHOR162]
+	str	w0, [x3, #:lo12:.LANCHOR161]
 	msub	w0, w21, w1, w22
 	ldr	x3, [x2, 8]
 	sub	w1, w1, w0
@@ -17244,17 +17265,17 @@ ftl_write:
 	mov	x1, x26
 	mov	w2, w20
 	bl	ftl_memcpy
-	cbz	w23, .L2546
+	cbz	w23, .L2549
 	sub	w25, w25, w19
 	add	w22, w22, w19
 	add	x26, x26, x20
 	add	w21, w21, 1
 	bl	FtlCacheWriteBack
 	mov	w24, w23
-	b	.L2512
-.L2539:
+	b	.L2515
+.L2542:
 	ldrh	w0, [x23, 4]
-	cbz	w0, .L2519
+	cbz	w0, .L2522
 	add	x1, x29, 180
 	mov	w2, 0
 	mov	w0, w19
@@ -17264,8 +17285,8 @@ ftl_write:
 	bl	get_new_active_ppa
 	ldr	x1, [x29, 168]
 	mul	x20, x1, x20
-	adrp	x1, .LANCHOR180
-	ldr	x1, [x1, #:lo12:.LANCHOR180]
+	adrp	x1, .LANCHOR179
+	ldr	x1, [x1, #:lo12:.LANCHOR179]
 	add	x1, x1, x20
 	str	w0, [x1, 4]
 	ldr	x0, [x29, 104]
@@ -17286,11 +17307,11 @@ ftl_write:
 	ldr	w0, [x29, 152]
 	cmp	w19, w21
 	ccmp	w19, w0, 4, ne
-	bne	.L2520
+	bne	.L2523
 	cmp	w19, w21
-	bne	.L2521
+	bne	.L2524
 	ldr	x0, [x29, 160]
-	ldrh	w2, [x0, #:lo12:.LANCHOR54]
+	ldrh	w2, [x0, #:lo12:.LANCHOR55]
 	udiv	w0, w22, w2
 	msub	w0, w0, w2, w22
 	str	w0, [x29, 148]
@@ -17298,46 +17319,46 @@ ftl_write:
 	cmp	w2, w25
 	csel	w0, w2, w25, ls
 	str	w0, [x29, 156]
-.L2522:
+.L2525:
 	ldr	x0, [x29, 160]
 	ldr	w1, [x29, 156]
-	ldrh	w0, [x0, #:lo12:.LANCHOR54]
+	ldrh	w0, [x0, #:lo12:.LANCHOR55]
 	cmp	w1, w0
-	ldr	x0, [x28, #:lo12:.LANCHOR180]
-	bne	.L2523
+	ldr	x0, [x28, #:lo12:.LANCHOR179]
+	bne	.L2526
 	add	x20, x0, x20
 	cmp	w19, w21
-	bne	.L2524
+	bne	.L2527
 	str	x26, [x20, 8]
-.L2525:
+.L2528:
 	ldr	x0, [x29, 112]
 	ldrb	w1, [x23, 6]
-	ldrh	w0, [x0, #:lo12:.LANCHOR36]
+	ldrh	w0, [x0, #:lo12:.LANCHOR37]
 	cmp	w1, w0
-	bcc	.L2536
-	mov	w2, 1739
+	bcc	.L2539
+	mov	w2, 1751
 	adrp	x1, .LANCHOR242
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR242
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR242
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L2536:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L2539:
 	ldp	x1, x2, [x29, 128]
 	mov	w0, -3947
 	strh	w0, [x1, x2]
-	adrp	x1, .LANCHOR158
-	ldr	w0, [x1, #:lo12:.LANCHOR158]
+	adrp	x1, .LANCHOR157
+	ldr	w0, [x1, #:lo12:.LANCHOR157]
 	stp	w0, w19, [x27, 4]
 	add	w19, w19, 1
 	add	w0, w0, 1
 	cmn	w0, #1
 	csel	w0, w0, wzr, ne
-	str	w0, [x1, #:lo12:.LANCHOR158]
+	str	w0, [x1, #:lo12:.LANCHOR157]
 	ldr	w0, [x29, 180]
 	str	w0, [x27, 12]
 	ldrh	w0, [x23]
@@ -17345,39 +17366,39 @@ ftl_write:
 	ldr	x0, [x29, 168]
 	add	x0, x0, 1
 	str	x0, [x29, 168]
-	b	.L2518
-.L2521:
+	b	.L2521
+.L2524:
 	ldr	x0, [x29, 160]
 	add	w2, w22, w25
 	str	wzr, [x29, 148]
-	ldrh	w0, [x0, #:lo12:.LANCHOR54]
+	ldrh	w0, [x0, #:lo12:.LANCHOR55]
 	msub	w2, w19, w0, w2
 	and	w0, w2, 65535
 	str	w0, [x29, 156]
-	b	.L2522
-.L2524:
+	b	.L2525
+.L2527:
 	ldr	w0, [x29, 156]
-.L2561:
+.L2564:
 	mul	w0, w0, w19
 	sub	w0, w0, w22
 	lsl	w0, w0, 9
 	add	x0, x26, x0
 	str	x0, [x20, 8]
-	b	.L2525
-.L2523:
+	b	.L2528
+.L2526:
 	add	x0, x0, x20
 	cmp	w19, w21
-	bne	.L2526
+	bne	.L2529
 	adrp	x1, .LANCHOR183
 	ldr	x1, [x1, #:lo12:.LANCHOR183]
-.L2560:
+.L2563:
 	str	x1, [x0, 8]
 	ldr	w0, [x29, 180]
 	cmn	w0, #1
-	beq	.L2528
+	beq	.L2531
 	str	w0, [x29, 188]
 	mov	w2, 0
-	ldr	x0, [x28, #:lo12:.LANCHOR180]
+	ldr	x0, [x28, #:lo12:.LANCHOR179]
 	str	w19, [x29, 208]
 	add	x0, x0, x20
 	ldp	x1, x0, [x0, 8]
@@ -17387,18 +17408,18 @@ ftl_write:
 	bl	FlashReadPages
 	ldr	w0, [x29, 184]
 	cmn	w0, #1
-	bne	.L2529
-	adrp	x0, .LANCHOR136
-	add	x0, x0, :lo12:.LANCHOR136
+	bne	.L2532
+	adrp	x0, .LANCHOR135
+	add	x0, x0, :lo12:.LANCHOR135
 	ldr	w1, [x0, 72]
 	add	w1, w1, 1
 	str	w1, [x0, 72]
-.L2532:
+.L2535:
 	ldr	w0, [x29, 156]
 	cmp	w19, w21
 	lsl	w2, w0, 9
-	bne	.L2533
-	ldr	x1, [x28, #:lo12:.LANCHOR180]
+	bne	.L2536
+	ldr	x1, [x28, #:lo12:.LANCHOR179]
 	ldr	w0, [x29, 148]
 	add	x1, x1, x20
 	lsl	w0, w0, 9
@@ -17408,104 +17429,104 @@ ftl_write:
 	bl	ftl_memcpy
 	ldr	w0, [x29, 152]
 	cmp	w19, w0
-	bne	.L2525
-.L2534:
+	bne	.L2528
+.L2537:
 	ldrh	w0, [x23, 4]
-	cbz	w0, .L2525
-	ldr	x0, [x28, #:lo12:.LANCHOR180]
+	cbz	w0, .L2528
+	ldr	x0, [x28, #:lo12:.LANCHOR179]
 	add	x20, x0, x20
 	ldr	x0, [x29, 120]
 	str	x20, [x0, #:lo12:.LANCHOR129]
 	adrp	x0, .LANCHOR221
 	str	x23, [x0, #:lo12:.LANCHOR221]
-	b	.L2525
-.L2526:
+	b	.L2528
+.L2529:
 	adrp	x1, .LANCHOR184
 	ldr	x1, [x1, #:lo12:.LANCHOR184]
-	b	.L2560
-.L2529:
+	b	.L2563
+.L2532:
 	ldr	w1, [x27, 8]
 	cmp	w19, w1
-	beq	.L2531
-	adrp	x0, .LANCHOR136
-	add	x0, x0, :lo12:.LANCHOR136
+	beq	.L2534
+	adrp	x0, .LANCHOR135
+	add	x0, x0, :lo12:.LANCHOR135
 	ldr	w2, [x0, 72]
 	add	w2, w2, 1
 	str	w2, [x0, 72]
-	adrp	x0, .LC54
+	adrp	x0, .LC57
 	mov	w2, w19
-	add	x0, x0, :lo12:.LC54
+	add	x0, x0, :lo12:.LC57
 	bl	printf
-.L2531:
+.L2534:
 	ldr	w0, [x27, 8]
 	cmp	w19, w0
-	beq	.L2532
-	mov	w2, 1718
+	beq	.L2535
+	mov	w2, 1730
 	adrp	x1, .LANCHOR242
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR242
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR242
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-	b	.L2532
-.L2528:
-	ldr	x0, [x28, #:lo12:.LANCHOR180]
-	adrp	x1, .LANCHOR56
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+	b	.L2535
+.L2531:
+	ldr	x0, [x28, #:lo12:.LANCHOR179]
+	adrp	x1, .LANCHOR57
 	add	x0, x0, x20
-	ldrh	w2, [x1, #:lo12:.LANCHOR56]
+	ldrh	w2, [x1, #:lo12:.LANCHOR57]
 	mov	w1, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	b	.L2532
-.L2533:
+	b	.L2535
+.L2536:
 	ldr	x0, [x29, 160]
-	ldrh	w1, [x0, #:lo12:.LANCHOR54]
-	ldr	x0, [x28, #:lo12:.LANCHOR180]
+	ldrh	w1, [x0, #:lo12:.LANCHOR55]
+	ldr	x0, [x28, #:lo12:.LANCHOR179]
 	add	x0, x0, x20
 	mul	w1, w1, w19
 	ldr	x0, [x0, 8]
 	sub	w1, w1, w22
 	lsl	w1, w1, 9
-	add	x1, x26, x1
-	bl	ftl_memcpy
-	b	.L2534
-.L2520:
-	adrp	x0, .LANCHOR180
-	ldr	x0, [x0, #:lo12:.LANCHOR180]
+	add	x1, x26, x1
+	bl	ftl_memcpy
+	b	.L2537
+.L2523:
+	adrp	x0, .LANCHOR179
+	ldr	x0, [x0, #:lo12:.LANCHOR179]
 	add	x20, x0, x20
 	ldr	x0, [x29, 160]
-	ldrh	w0, [x0, #:lo12:.LANCHOR54]
-	b	.L2561
-.L2540:
-	adrp	x0, .LANCHOR180
+	ldrh	w0, [x0, #:lo12:.LANCHOR55]
+	b	.L2564
+.L2543:
+	adrp	x0, .LANCHOR179
 	mov	x3, x23
 	mov	w2, 0
 	mov	w1, w27
-	ldr	x0, [x0, #:lo12:.LANCHOR180]
+	ldr	x0, [x0, #:lo12:.LANCHOR179]
 	bl	FtlProgPages
 	cmp	w24, w27
-	bcs	.L2541
-	mov	w2, 1754
+	bcs	.L2544
+	mov	w2, 1766
 	adrp	x1, .LANCHOR242
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR242
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR242
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L2541:
-	sub	w24, w24, w27
-	b	.L2514
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
 .L2544:
+	sub	w24, w24, w27
+	b	.L2517
+.L2547:
 	mov	w0, -1
-	b	.L2509
+	b	.L2512
 	.size	ftl_write, .-ftl_write
 	.section	.text.FlashReadFacBbtData,"ax",@progbits
 	.align	2
@@ -17521,7 +17542,7 @@ FlashReadFacBbtData:
 	stp	x23, x24, [sp, 48]
 	mov	x23, x0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR145
+	adrp	x21, .LANCHOR144
 	ldrh	w0, [x1, 14]
 	mov	w24, w2
 	ldrh	w1, [x1, 12]
@@ -17529,7 +17550,7 @@ FlashReadFacBbtData:
 	str	x27, [sp, 80]
 	mov	w27, 61664
 	mul	w0, w0, w1
-	ldr	x1, [x21, #:lo12:.LANCHOR145]
+	ldr	x1, [x21, #:lo12:.LANCHOR144]
 	str	x1, [x29, 112]
 	and	w0, w0, 65535
 	adrp	x1, .LANCHOR194
@@ -17540,11 +17561,11 @@ FlashReadFacBbtData:
 	mul	w26, w0, w25
 	mov	x22, x1
 	str	x2, [x29, 120]
-.L2563:
+.L2566:
 	cmp	w19, w20
-	ble	.L2570
+	ble	.L2573
 	mov	w0, -1
-.L2562:
+.L2565:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -17552,7 +17573,7 @@ FlashReadFacBbtData:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L2570:
+.L2573:
 	add	w0, w20, w26
 	mov	w2, 1
 	lsl	w0, w0, 10
@@ -17562,37 +17583,37 @@ FlashReadFacBbtData:
 	bl	FlashReadPages
 	ldr	w0, [x29, 104]
 	cmn	w0, #1
-	beq	.L2564
+	beq	.L2567
 	ldr	x0, [x22, #:lo12:.LANCHOR194]
 	ldrh	w0, [x0]
 	cmp	w0, w27
-	bne	.L2564
-	cbz	x23, .L2571
-	cbz	w25, .L2566
-.L2569:
-	ldr	x1, [x21, #:lo12:.LANCHOR145]
+	bne	.L2567
+	cbz	x23, .L2574
+	cbz	w25, .L2569
+.L2572:
+	ldr	x1, [x21, #:lo12:.LANCHOR144]
 	mov	w2, w24
 	mov	x0, x23
 	bl	ftl_memcpy
 	mov	w3, 4
-	adrp	x0, .LC55
+	adrp	x0, .LC58
 	mov	w2, w3
 	mov	x1, x23
-	add	x0, x0, :lo12:.LC55
+	add	x0, x0, :lo12:.LC58
 	bl	rknand_print_hex
-.L2571:
+.L2574:
 	mov	w0, 0
-	b	.L2562
-.L2566:
-	ldr	x5, [x21, #:lo12:.LANCHOR145]
-	adrp	x2, .LANCHOR147
-	add	x2, x2, :lo12:.LANCHOR147
+	b	.L2565
+.L2569:
+	ldr	x5, [x21, #:lo12:.LANCHOR144]
+	adrp	x2, .LANCHOR146
+	add	x2, x2, :lo12:.LANCHOR146
 	mov	w0, 0
 	mov	w6, 1
-.L2567:
+.L2570:
 	ldr	w1, [x2]
 	cmp	w0, w1
-	bcs	.L2569
+	bcs	.L2572
 	ubfx	x1, x0, 5, 11
 	and	w3, w0, 31
 	lsl	x1, x1, 2
@@ -17602,11 +17623,11 @@ FlashReadFacBbtData:
 	ldr	w3, [x5, x1]
 	orr	w3, w3, w4
 	str	w3, [x5, x1]
-	b	.L2567
-.L2564:
+	b	.L2570
+.L2567:
 	sub	w20, w20, #1
 	and	w20, w20, 65535
-	b	.L2563
+	b	.L2566
 	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
 	.section	.text.FlashGetBadBlockList,"ax",@progbits
 	.align	2
@@ -17621,19 +17642,19 @@ FlashGetBadBlockList:
 	ldr	x0, [x0, #:lo12:.LANCHOR18]
 	ldrh	w19, [x0, 14]
 	str	x21, [sp, 32]
-	adrp	x21, .LANCHOR151
+	adrp	x21, .LANCHOR150
 	ldrb	w2, [x0, 13]
-	ldr	x0, [x21, #:lo12:.LANCHOR151]
+	ldr	x0, [x21, #:lo12:.LANCHOR150]
 	mul	w19, w19, w2
 	and	w19, w19, 65535
 	add	w2, w19, 7
 	lsr	w2, w2, 3
 	bl	FlashReadFacBbtData
 	cmn	w0, #1
-	bne	.L2577
-.L2581:
+	bne	.L2580
+.L2584:
 	mov	w0, 0
-.L2578:
+.L2581:
 	ubfiz	x0, x0, 1, 16
 	mov	w1, -1
 	ldr	x21, [sp, 32]
@@ -17642,32 +17663,32 @@ FlashGetBadBlockList:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L2577:
-	ldr	x4, [x21, #:lo12:.LANCHOR151]
+.L2580:
+	ldr	x4, [x21, #:lo12:.LANCHOR150]
 	lsr	w5, w19, 4
 	sub	w19, w19, #1
 	mov	w1, 0
 	mov	w0, 0
 	mov	w6, 1
-.L2579:
+.L2582:
 	cmp	w1, w19
-	bge	.L2578
+	bge	.L2581
 	ubfx	x3, x1, 5, 11
 	and	w2, w1, 31
 	lsl	w2, w6, w2
 	ldr	w3, [x4, x3, lsl 2]
 	tst	w2, w3
-	beq	.L2580
+	beq	.L2583
 	add	w2, w0, 1
 	ubfiz	x0, x0, 1, 16
 	strh	w1, [x20, x0]
 	and	w0, w2, 65535
-.L2580:
+.L2583:
 	cmp	w0, w5
-	bcs	.L2581
+	bcs	.L2584
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L2579
+	b	.L2582
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
 	.section	.text.FtlMakeBbt,"ax",@progbits
 	.align	2
@@ -17675,75 +17696,75 @@ FlashGetBadBlockList:
 	.type	FtlMakeBbt, %function
 FtlMakeBbt:
 	stp	x29, x30, [sp, -128]!
-	adrp	x0, .LANCHOR75
+	adrp	x0, .LANCHOR76
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	ldr	w21, [x0, #:lo12:.LANCHOR75]
+	ldr	w21, [x0, #:lo12:.LANCHOR76]
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w21, .L2588
+	cbnz	w21, .L2591
 	bl	FtlBbtMemInit
-	adrp	x20, .LANCHOR73
-	add	x22, x20, :lo12:.LANCHOR73
+	adrp	x20, .LANCHOR74
+	add	x22, x20, :lo12:.LANCHOR74
 	bl	FtlLoadFactoryBbt
 	add	x24, x22, 32
 	adrp	x28, .LANCHOR199
 	add	x22, x22, 12
 	add	x25, x28, :lo12:.LANCHOR199
-	adrp	x0, .LANCHOR43
-	add	x0, x0, :lo12:.LANCHOR43
+	adrp	x0, .LANCHOR44
+	add	x0, x0, :lo12:.LANCHOR44
 	str	x0, [x29, 120]
-.L2589:
+.L2592:
 	ldr	x0, [x29, 120]
 	ldrh	w0, [x0]
 	cmp	w21, w0
-	bcc	.L2595
-	adrp	x21, .LANCHOR58
-	add	x21, x21, :lo12:.LANCHOR58
+	bcc	.L2598
+	adrp	x21, .LANCHOR59
+	add	x21, x21, :lo12:.LANCHOR59
 	mov	w19, 0
-.L2596:
+.L2599:
 	ldrh	w0, [x21]
 	cmp	w0, w19
-	bhi	.L2597
-	add	x21, x20, :lo12:.LANCHOR73
+	bhi	.L2600
+	add	x21, x20, :lo12:.LANCHOR74
 	mov	w22, 65535
 	ldrh	w19, [x21, 12]
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L2598:
+.L2601:
 	ldrh	w0, [x21, 12]
 	sub	w0, w0, #47
 	cmp	w0, w19
-	bgt	.L2602
+	bgt	.L2605
 	mov	w0, w19
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L2599
+	beq	.L2602
 	mov	w0, w19
 	bl	FlashTestBlk
-	cbz	w0, .L2600
+	cbz	w0, .L2603
 	mov	w0, w19
 	bl	FtlBbmMapBadBlock
-.L2599:
+.L2602:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L2598
-.L2595:
+	b	.L2601
+.L2598:
 	adrp	x2, .LANCHOR185
-	adrp	x0, .LANCHOR79
+	adrp	x0, .LANCHOR180
 	add	x19, x28, :lo12:.LANCHOR199
 	ldrh	w1, [x22]
-	ldr	x0, [x0, #:lo12:.LANCHOR79]
+	ldr	x0, [x0, #:lo12:.LANCHOR180]
 	mov	w3, 65535
 	ldr	x26, [x2, #:lo12:.LANCHOR185]
 	cmp	w1, w3
 	stp	x0, x26, [x19, 8]
-	adrp	x23, .LANCHOR49
+	adrp	x23, .LANCHOR50
 	str	x2, [x29, 112]
-	beq	.L2590
-	ldrh	w4, [x23, #:lo12:.LANCHOR49]
+	beq	.L2593
+	ldrh	w4, [x23, #:lo12:.LANCHOR50]
 	mov	w2, 1
 	madd	w27, w4, w21, w1
 	mov	w1, w2
@@ -17753,36 +17774,36 @@ FtlMakeBbt:
 	bl	FlashReadPages
 	ldr	x1, [x19, 8]
 	ldr	x0, [x24]
-	ldrh	w2, [x23, #:lo12:.LANCHOR49]
+	ldrh	w2, [x23, #:lo12:.LANCHOR50]
 	add	w2, w2, 7
 	lsr	w2, w2, 3
 	bl	ftl_memcpy
-.L2591:
+.L2594:
 	mov	w0, w27
 	add	w21, w21, 1
 	bl	FtlBbmMapBadBlock
 	add	x24, x24, 8
 	add	x22, x22, 2
-	b	.L2589
-.L2590:
+	b	.L2592
+.L2593:
 	mov	w1, w21
 	bl	FlashGetBadBlockList
 	ldr	x0, [x19, 8]
 	adrp	x27, .LANCHOR120
 	ldr	x1, [x24]
 	bl	FtlBbt2Bitmap
-	ldrh	w19, [x23, #:lo12:.LANCHOR49]
-	add	x23, x23, :lo12:.LANCHOR49
+	ldrh	w19, [x23, #:lo12:.LANCHOR50]
+	add	x23, x23, :lo12:.LANCHOR50
 	add	x0, x27, :lo12:.LANCHOR120
 	sub	w19, w19, #1
 	str	x0, [x29, 104]
 	and	w19, w19, 65535
-.L2592:
+.L2595:
 	ldrh	w0, [x23]
 	madd	w0, w21, w0, w19
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L2593
+	beq	.L2596
 	ldr	x0, [x29, 112]
 	mov	w2, 16
 	strh	w19, [x22]
@@ -17815,34 +17836,34 @@ FtlMakeBbt:
 	bl	FlashProgPages
 	ldr	w0, [x25]
 	cmn	w0, #1
-	bne	.L2591
+	bne	.L2594
 	mov	w0, w27
 	bl	FtlBbmMapBadBlock
-	b	.L2592
-.L2593:
+	b	.L2595
+.L2596:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L2592
-.L2597:
+	b	.L2595
+.L2600:
 	mov	w0, w19
 	add	w19, w19, 1
 	bl	FtlBbmMapBadBlock
 	and	w19, w19, 65535
-	b	.L2596
-.L2600:
+	b	.L2599
+.L2603:
 	ldrh	w0, [x21]
 	cmp	w0, w22
-	bne	.L2601
+	bne	.L2604
 	strh	w19, [x21]
-	b	.L2599
-.L2601:
+	b	.L2602
+.L2604:
 	strh	w19, [x21, 4]
-.L2602:
-	adrp	x0, .LANCHOR76
-	add	x19, x20, :lo12:.LANCHOR73
-	ldrh	w1, [x20, #:lo12:.LANCHOR73]
+.L2605:
+	adrp	x0, .LANCHOR77
+	add	x19, x20, :lo12:.LANCHOR74
+	ldrh	w1, [x20, #:lo12:.LANCHOR74]
 	mov	w2, 2
-	ldr	x0, [x0, #:lo12:.LANCHOR76]
+	ldr	x0, [x0, #:lo12:.LANCHOR77]
 	str	wzr, [x19, 8]
 	lsl	w1, w1, 10
 	strh	wzr, [x19, 2]
@@ -17852,7 +17873,7 @@ FtlMakeBbt:
 	str	w1, [x0, 60]
 	mov	w1, 1
 	bl	FlashEraseBlocks
-	ldrh	w0, [x20, #:lo12:.LANCHOR73]
+	ldrh	w0, [x20, #:lo12:.LANCHOR74]
 	bl	FtlBbmMapBadBlock
 	ldrh	w0, [x19, 4]
 	bl	FtlBbmMapBadBlock
@@ -17862,11 +17883,11 @@ FtlMakeBbt:
 	ldrh	w1, [x19, 4]
 	add	w0, w0, 1
 	str	w0, [x19, 8]
-	ldrh	w0, [x20, #:lo12:.LANCHOR73]
+	ldrh	w0, [x20, #:lo12:.LANCHOR74]
 	strh	w0, [x19, 4]
-	strh	w1, [x20, #:lo12:.LANCHOR73]
+	strh	w1, [x20, #:lo12:.LANCHOR74]
 	bl	FtlBbmTblFlush
-.L2588:
+.L2591:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -17881,151 +17902,157 @@ FtlMakeBbt:
 	.global	FtlLowFormat
 	.type	FtlLowFormat, %function
 FtlLowFormat:
+	adrp	x0, .LANCHOR76
+	ldr	w0, [x0, #:lo12:.LANCHOR76]
+	cbnz	w0, .L2643
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR65
+	adrp	x0, .LANCHOR192
 	mov	w1, 0
 	add	x29, sp, 0
-	ldrh	w2, [x0, #:lo12:.LANCHOR65]
-	adrp	x0, .LANCHOR192
 	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR66
 	ldr	x0, [x0, #:lo12:.LANCHOR192]
+	adrp	x20, .LANCHOR156
+	ldrh	w2, [x19, #:lo12:.LANCHOR66]
+	stp	x25, x26, [sp, 64]
+	adrp	x25, .LANCHOR38
 	stp	x21, x22, [sp, 32]
-	lsl	w2, w2, 2
 	stp	x23, x24, [sp, 48]
-	stp	x25, x26, [sp, 64]
+	lsl	w2, w2, 2
 	bl	ftl_memset
-	adrp	x0, .LANCHOR75
-	ldr	w0, [x0, #:lo12:.LANCHOR75]
-	cbnz	w0, .L2610
-	adrp	x0, .LANCHOR158
-	adrp	x25, .LANCHOR37
-	adrp	x20, .LANCHOR157
-	str	wzr, [x0, #:lo12:.LANCHOR158]
-	ldrh	w0, [x25, #:lo12:.LANCHOR37]
-	str	wzr, [x20, #:lo12:.LANCHOR157]
+	adrp	x0, .LANCHOR128
+	ldrh	w2, [x19, #:lo12:.LANCHOR66]
+	mov	w1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR128]
+	lsl	w2, w2, 2
+	bl	ftl_memset
+	str	wzr, [x20, #:lo12:.LANCHOR156]
+	adrp	x0, .LANCHOR157
+	str	wzr, [x0, #:lo12:.LANCHOR157]
+	ldrh	w0, [x25, #:lo12:.LANCHOR38]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	w0, .L2611
+	cbz	w0, .L2614
 	bl	FtlMakeBbt
-.L2611:
-	adrp	x22, .LANCHOR54
+.L2614:
+	adrp	x22, .LANCHOR55
 	adrp	x0, .LANCHOR183
 	mov	w6, 23752
-	ldrh	w1, [x22, #:lo12:.LANCHOR54]
+	ldrh	w1, [x22, #:lo12:.LANCHOR55]
 	movk	w6, 0xa0f, lsl 16
 	ldr	x4, [x0, #:lo12:.LANCHOR183]
 	adrp	x0, .LANCHOR184
 	lsl	w1, w1, 7
 	ldr	x5, [x0, #:lo12:.LANCHOR184]
 	mov	w0, 0
-.L2612:
+.L2615:
 	cmp	w0, w1
-	blt	.L2613
-	adrp	x21, .LANCHOR38
-	adrp	x19, .LANCHOR39
-	add	x26, x19, :lo12:.LANCHOR39
+	blt	.L2616
+	adrp	x21, .LANCHOR39
+	adrp	x19, .LANCHOR40
+	add	x26, x19, :lo12:.LANCHOR40
 	mov	w23, 0
-	ldrh	w24, [x21, #:lo12:.LANCHOR38]
-.L2614:
+	ldrh	w24, [x21, #:lo12:.LANCHOR39]
+.L2617:
 	ldrh	w0, [x26]
 	cmp	w0, w24
-	bhi	.L2615
-	adrp	x24, .LANCHOR36
+	bhi	.L2618
+	adrp	x24, .LANCHOR37
 	sub	w1, w23, #2
-	ldrh	w0, [x24, #:lo12:.LANCHOR36]
+	ldrh	w0, [x24, #:lo12:.LANCHOR37]
 	cmp	w1, w0, lsl 1
-	bgt	.L2616
-.L2620:
-	add	x26, x21, :lo12:.LANCHOR38
+	bgt	.L2619
+.L2623:
+	add	x26, x21, :lo12:.LANCHOR39
 	mov	w23, 0
 	mov	w25, 0
-.L2617:
+.L2620:
 	ldrh	w0, [x26]
 	cmp	w0, w25
-	bhi	.L2621
-	adrp	x0, .LANCHOR72
-	ldrh	w1, [x19, #:lo12:.LANCHOR39]
-	ldrh	w3, [x24, #:lo12:.LANCHOR36]
-	str	w1, [x0, #:lo12:.LANCHOR72]
-	adrp	x0, .LANCHOR40
+	bhi	.L2624
+	adrp	x0, .LANCHOR73
+	ldrh	w1, [x19, #:lo12:.LANCHOR40]
+	ldrh	w3, [x24, #:lo12:.LANCHOR37]
+	str	w1, [x0, #:lo12:.LANCHOR73]
+	adrp	x0, .LANCHOR41
 	adrp	x1, .LANCHOR227
-	ldr	w2, [x0, #:lo12:.LANCHOR40]
-	adrp	x0, .LANCHOR71
+	ldr	w2, [x0, #:lo12:.LANCHOR41]
+	adrp	x0, .LANCHOR72
 	udiv	w6, w2, w3
 	ubfx	x5, x6, 5, 16
-	str	w6, [x0, #:lo12:.LANCHOR71]
+	str	w6, [x0, #:lo12:.LANCHOR72]
 	add	w4, w5, 36
 	strh	w4, [x1, #:lo12:.LANCHOR227]
 	mov	w4, 24
 	mul	w4, w3, w4
 	cmp	w23, w4
-	ble	.L2622
+	ble	.L2625
 	sub	w2, w2, w23
 	udiv	w2, w2, w3
-	str	w2, [x0, #:lo12:.LANCHOR71]
+	str	w2, [x0, #:lo12:.LANCHOR72]
 	lsr	w2, w2, 5
 	add	w2, w2, 24
 	strh	w2, [x1, #:lo12:.LANCHOR227]
-.L2622:
-	adrp	x2, .LANCHOR101
-	ldr	w2, [x2, #:lo12:.LANCHOR101]
+.L2625:
+	adrp	x2, .LANCHOR28
+	ldr	w2, [x2, #:lo12:.LANCHOR28]
 	cmp	w2, 1
-	bne	.L2623
+	bne	.L2626
 	udiv	w4, w23, w3
 	ldrh	w2, [x1, #:lo12:.LANCHOR227]
 	add	w4, w4, w2
 	add	w4, w2, w4, asr 2
 	strh	w4, [x1, #:lo12:.LANCHOR227]
-.L2623:
+.L2626:
 	adrp	x2, .LANCHOR8
 	ldrb	w2, [x2, #:lo12:.LANCHOR8]
-	cbz	w2, .L2624
+	cbz	w2, .L2627
 	udiv	w4, w23, w3
 	ldrh	w2, [x1, #:lo12:.LANCHOR227]
 	add	w4, w4, w2
 	add	w4, w2, w4, asr 2
 	strh	w4, [x1, #:lo12:.LANCHOR227]
-.L2624:
-	adrp	x2, .LANCHOR47
-	ldrh	w2, [x2, #:lo12:.LANCHOR47]
-	cbz	w2, .L2626
+.L2627:
+	adrp	x2, .LANCHOR48
+	ldrh	w2, [x2, #:lo12:.LANCHOR48]
+	cbz	w2, .L2629
 	ldrh	w4, [x1, #:lo12:.LANCHOR227]
 	add	w4, w4, w2, lsr 1
 	strh	w4, [x1, #:lo12:.LANCHOR227]
 	mul	w4, w2, w3
 	cmp	w23, w4
-	bge	.L2626
+	bge	.L2629
 	add	w2, w2, 32
-	str	w6, [x0, #:lo12:.LANCHOR71]
+	str	w6, [x0, #:lo12:.LANCHOR72]
 	add	w2, w5, w2
 	strh	w2, [x1, #:lo12:.LANCHOR227]
-.L2626:
+.L2629:
 	ldrh	w2, [x1, #:lo12:.LANCHOR227]
 	adrp	x25, .LANCHOR226
-	ldr	w1, [x0, #:lo12:.LANCHOR71]
-	adrp	x24, .LANCHOR82
+	ldr	w1, [x0, #:lo12:.LANCHOR72]
+	adrp	x24, .LANCHOR83
 	mov	w23, -1
 	sub	w1, w1, w2
 	mul	w3, w1, w3
-	adrp	x1, .LANCHOR51
+	adrp	x1, .LANCHOR52
 	str	w3, [x25, #:lo12:.LANCHOR226]
-	ldrh	w1, [x1, #:lo12:.LANCHOR51]
+	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	mul	w3, w1, w3
-	str	w3, [x0, #:lo12:.LANCHOR71]
-	ldrh	w0, [x22, #:lo12:.LANCHOR54]
+	str	w3, [x0, #:lo12:.LANCHOR72]
+	ldrh	w0, [x22, #:lo12:.LANCHOR55]
 	mul	w3, w0, w3
-	adrp	x0, .LANCHOR67
-	str	w3, [x0, #:lo12:.LANCHOR67]
+	adrp	x0, .LANCHOR68
+	str	w3, [x0, #:lo12:.LANCHOR68]
 	bl	FtlBbmTblFlush
-	ldr	x0, [x24, #:lo12:.LANCHOR82]
+	ldr	x0, [x24, #:lo12:.LANCHOR83]
 	mov	w1, 0
-	ldrh	w2, [x19, #:lo12:.LANCHOR39]
+	ldrh	w2, [x19, #:lo12:.LANCHOR40]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	adrp	x0, .LANCHOR99
+	adrp	x0, .LANCHOR100
 	adrp	x1, .LANCHOR201
-	ldrh	w2, [x21, #:lo12:.LANCHOR38]
-	str	wzr, [x0, #:lo12:.LANCHOR99]
+	ldrh	w2, [x21, #:lo12:.LANCHOR39]
+	str	wzr, [x0, #:lo12:.LANCHOR100]
 	add	x0, x1, :lo12:.LANCHOR201
 	strh	w23, [x1, #:lo12:.LANCHOR201]
 	mov	w1, 255
@@ -18033,9 +18060,9 @@ FtlLowFormat:
 	strh	wzr, [x0, 2]
 	strb	wzr, [x0, 6]
 	strb	wzr, [x0, 8]
-	adrp	x0, .LANCHOR90
-	add	x19, x0, :lo12:.LANCHOR90
-	strh	wzr, [x0, #:lo12:.LANCHOR90]
+	adrp	x0, .LANCHOR91
+	add	x19, x0, :lo12:.LANCHOR91
+	strh	wzr, [x0, #:lo12:.LANCHOR91]
 	mov	w0, 1
 	strb	w0, [x19, 8]
 	adrp	x0, .LANCHOR0
@@ -18043,20 +18070,20 @@ FtlLowFormat:
 	ldr	x0, [x0, #:lo12:.LANCHOR0]
 	strb	wzr, [x19, 6]
 	bl	ftl_memset
-.L2628:
+.L2631:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L2629
-	ldr	x1, [x24, #:lo12:.LANCHOR82]
+	cbnz	w1, .L2632
+	ldr	x1, [x24, #:lo12:.LANCHOR83]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L2628
-.L2613:
+	b	.L2631
+.L2616:
 	ubfiz	x3, x0, 2, 16
 	mvn	w2, w0
 	orr	w2, w0, w2, lsl 16
@@ -18064,8 +18091,8 @@ FtlLowFormat:
 	and	w0, w0, 65535
 	str	w2, [x4, x3]
 	str	w6, [x5, x3]
-	b	.L2612
-.L2615:
+	b	.L2615
+.L2618:
 	mov	w0, w24
 	mov	w1, 1
 	add	w24, w24, 1
@@ -18073,28 +18100,28 @@ FtlLowFormat:
 	add	w23, w23, w0
 	and	w24, w24, 65535
 	and	w23, w23, 65535
-	b	.L2614
-.L2616:
+	b	.L2617
+.L2619:
 	udiv	w0, w23, w0
-	adrp	x1, .LANCHOR64
-	ldr	w23, [x1, #:lo12:.LANCHOR64]
+	adrp	x1, .LANCHOR65
+	ldr	w23, [x1, #:lo12:.LANCHOR65]
 	add	w0, w0, w23
 	bl	FtlSysBlkNumInit
-	ldrh	w0, [x25, #:lo12:.LANCHOR37]
-	add	x25, x19, :lo12:.LANCHOR39
+	ldrh	w0, [x25, #:lo12:.LANCHOR38]
+	add	x25, x19, :lo12:.LANCHOR40
 	bl	FtlFreeSysBlkQueueInit
-	ldrh	w23, [x21, #:lo12:.LANCHOR38]
-.L2618:
+	ldrh	w23, [x21, #:lo12:.LANCHOR39]
+.L2621:
 	ldrh	w0, [x25]
 	cmp	w0, w23
-	bls	.L2620
+	bls	.L2623
 	mov	w0, w23
 	add	w23, w23, 1
 	mov	w1, 1
 	and	w23, w23, 65535
 	bl	FtlLowFormatEraseBlock
-	b	.L2618
-.L2621:
+	b	.L2621
+.L2624:
 	mov	w0, w25
 	mov	w1, 0
 	add	w25, w25, 1
@@ -18102,71 +18129,71 @@ FtlLowFormat:
 	add	w23, w23, w0
 	and	w25, w25, 65535
 	and	w23, w23, 65535
-	b	.L2617
-.L2629:
-	ldr	w1, [x20, #:lo12:.LANCHOR157]
+	b	.L2620
+.L2632:
+	ldr	w1, [x20, #:lo12:.LANCHOR156]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
 	mov	w23, -1
 	add	w1, w1, 1
-	str	w1, [x20, #:lo12:.LANCHOR157]
-	ldr	x1, [x24, #:lo12:.LANCHOR82]
+	str	w1, [x20, #:lo12:.LANCHOR156]
+	ldr	x1, [x24, #:lo12:.LANCHOR83]
 	ldrh	w2, [x19, 4]
 	strh	w2, [x1, x0]
-	adrp	x2, .LANCHOR91
-	add	x0, x2, :lo12:.LANCHOR91
+	adrp	x2, .LANCHOR92
+	add	x0, x2, :lo12:.LANCHOR92
 	ldrh	w1, [x19]
 	mov	x19, x0
 	add	w1, w1, 1
 	strh	wzr, [x0, 2]
-	strh	w1, [x2, #:lo12:.LANCHOR91]
+	strh	w1, [x2, #:lo12:.LANCHOR92]
 	mov	w1, 1
 	strb	wzr, [x0, 6]
 	strb	w1, [x0, 8]
-.L2630:
+.L2633:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L2631
-	ldr	x1, [x24, #:lo12:.LANCHOR82]
+	cbnz	w1, .L2634
+	ldr	x1, [x24, #:lo12:.LANCHOR83]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L2630
-.L2631:
-	ldr	w1, [x20, #:lo12:.LANCHOR157]
+	b	.L2633
+.L2634:
+	ldr	w1, [x20, #:lo12:.LANCHOR156]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
 	add	w1, w1, 1
-	str	w1, [x20, #:lo12:.LANCHOR157]
-	ldr	x1, [x24, #:lo12:.LANCHOR82]
+	str	w1, [x20, #:lo12:.LANCHOR156]
+	ldr	x1, [x24, #:lo12:.LANCHOR83]
 	ldrh	w2, [x19, 4]
 	mov	w19, -1
 	strh	w2, [x1, x0]
-	adrp	x0, .LANCHOR92
-	strh	w19, [x0, #:lo12:.LANCHOR92]
+	adrp	x0, .LANCHOR93
+	strh	w19, [x0, #:lo12:.LANCHOR93]
 	bl	FtlFreeSysBlkQueueOut
 	adrp	x2, .LANCHOR206
 	add	x1, x2, :lo12:.LANCHOR206
 	strh	w0, [x2, #:lo12:.LANCHOR206]
 	ldr	w0, [x25, #:lo12:.LANCHOR226]
 	strh	w0, [x1, 6]
-	ldr	w0, [x20, #:lo12:.LANCHOR157]
+	ldr	w0, [x20, #:lo12:.LANCHOR156]
 	str	w0, [x1, 8]
 	add	w0, w0, 1
 	strh	wzr, [x1, 2]
 	strh	w19, [x1, 4]
-	str	w0, [x20, #:lo12:.LANCHOR157]
+	str	w0, [x20, #:lo12:.LANCHOR156]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	w0, .L2610
+	cbnz	w0, .L2613
 	adrp	x0, .LANCHOR223
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR223]
-.L2610:
+.L2613:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -18174,6 +18201,9 @@ FtlLowFormat:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
+.L2643:
+	mov	w0, 0
+	ret
 	.size	FtlLowFormat, .-FtlLowFormat
 	.global	FtlMallocOffset
 	.global	FtlMallocBuffer
@@ -18192,7 +18222,6 @@ FtlLowFormat:
 	.global	random_seed
 	.global	gSlcNandParaInfo
 	.global	gNandParaInfo
-	.global	NandFlashParaTbl
 	.global	g_page_map_check_enable
 	.global	g_power_lost_ecc_error_blk
 	.global	g_power_lost_recovery_flag
@@ -18399,7 +18428,7 @@ FtlLowFormat:
 	.global	read_retry_cur_offset
 	.section	.bss.DeviceCapacity,"aw",@nobits
 	.align	2
-	.set	.LANCHOR59,. + 0
+	.set	.LANCHOR60,. + 0
 	.type	DeviceCapacity, %object
 	.size	DeviceCapacity, 4
 DeviceCapacity:
@@ -18420,7 +18449,7 @@ DieCsIndex:
 	.zero	8
 	.section	.bss.FlashDdrTunningReadCount,"aw",@nobits
 	.align	2
-	.set	.LANCHOR142,. + 0
+	.set	.LANCHOR141,. + 0
 	.type	FlashDdrTunningReadCount, %object
 	.size	FlashDdrTunningReadCount, 4
 FlashDdrTunningReadCount:
@@ -18439,7 +18468,7 @@ FtlMallocBuffer:
 	.zero	1310720
 	.section	.bss.FtlUpdateVaildLpnCount,"aw",@nobits
 	.align	1
-	.set	.LANCHOR98,. + 0
+	.set	.LANCHOR99,. + 0
 	.type	FtlUpdateVaildLpnCount, %object
 	.size	FtlUpdateVaildLpnCount, 2
 FtlUpdateVaildLpnCount:
@@ -18460,42 +18489,42 @@ c_ftl_nand_bbm_buf_size:
 	.zero	2
 	.section	.bss.c_ftl_nand_blk_pre_plane,"aw",@nobits
 	.align	1
-	.set	.LANCHOR39,. + 0
+	.set	.LANCHOR40,. + 0
 	.type	c_ftl_nand_blk_pre_plane, %object
 	.size	c_ftl_nand_blk_pre_plane, 2
 c_ftl_nand_blk_pre_plane:
 	.zero	2
 	.section	.bss.c_ftl_nand_blks_per_die,"aw",@nobits
 	.align	1
-	.set	.LANCHOR49,. + 0
+	.set	.LANCHOR50,. + 0
 	.type	c_ftl_nand_blks_per_die, %object
 	.size	c_ftl_nand_blks_per_die, 2
 c_ftl_nand_blks_per_die:
 	.zero	2
 	.section	.bss.c_ftl_nand_blks_per_die_shift,"aw",@nobits
 	.align	1
-	.set	.LANCHOR50,. + 0
+	.set	.LANCHOR51,. + 0
 	.type	c_ftl_nand_blks_per_die_shift, %object
 	.size	c_ftl_nand_blks_per_die_shift, 2
 c_ftl_nand_blks_per_die_shift:
 	.zero	2
 	.section	.bss.c_ftl_nand_byte_pre_oob,"aw",@nobits
 	.align	1
-	.set	.LANCHOR57,. + 0
+	.set	.LANCHOR58,. + 0
 	.type	c_ftl_nand_byte_pre_oob, %object
 	.size	c_ftl_nand_byte_pre_oob, 2
 c_ftl_nand_byte_pre_oob:
 	.zero	2
 	.section	.bss.c_ftl_nand_byte_pre_page,"aw",@nobits
 	.align	1
-	.set	.LANCHOR56,. + 0
+	.set	.LANCHOR57,. + 0
 	.type	c_ftl_nand_byte_pre_page, %object
 	.size	c_ftl_nand_byte_pre_page, 2
 c_ftl_nand_byte_pre_page:
 	.zero	2
 	.section	.bss.c_ftl_nand_data_blks_per_plane,"aw",@nobits
 	.align	1
-	.set	.LANCHOR38,. + 0
+	.set	.LANCHOR39,. + 0
 	.type	c_ftl_nand_data_blks_per_plane, %object
 	.size	c_ftl_nand_data_blks_per_plane, 2
 c_ftl_nand_data_blks_per_plane:
@@ -18509,161 +18538,161 @@ c_ftl_nand_data_op_blks_per_plane:
 	.zero	2
 	.section	.bss.c_ftl_nand_die_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR43,. + 0
+	.set	.LANCHOR44,. + 0
 	.type	c_ftl_nand_die_num, %object
 	.size	c_ftl_nand_die_num, 2
 c_ftl_nand_die_num:
 	.zero	2
 	.section	.bss.c_ftl_nand_ext_blk_pre_plane,"aw",@nobits
 	.align	1
-	.set	.LANCHOR47,. + 0
+	.set	.LANCHOR48,. + 0
 	.type	c_ftl_nand_ext_blk_pre_plane, %object
 	.size	c_ftl_nand_ext_blk_pre_plane, 2
 c_ftl_nand_ext_blk_pre_plane:
 	.zero	2
 	.section	.bss.c_ftl_nand_init_sys_blks_per_plane,"aw",@nobits
 	.align	2
-	.set	.LANCHOR64,. + 0
+	.set	.LANCHOR65,. + 0
 	.type	c_ftl_nand_init_sys_blks_per_plane, %object
 	.size	c_ftl_nand_init_sys_blks_per_plane, 4
 c_ftl_nand_init_sys_blks_per_plane:
 	.zero	4
 	.section	.bss.c_ftl_nand_l2pmap_ram_region_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR66,. + 0
+	.set	.LANCHOR67,. + 0
 	.type	c_ftl_nand_l2pmap_ram_region_num, %object
 	.size	c_ftl_nand_l2pmap_ram_region_num, 2
 c_ftl_nand_l2pmap_ram_region_num:
 	.zero	2
 	.section	.bss.c_ftl_nand_map_blks_per_plane,"aw",@nobits
 	.align	1
-	.set	.LANCHOR62,. + 0
+	.set	.LANCHOR63,. + 0
 	.type	c_ftl_nand_map_blks_per_plane, %object
 	.size	c_ftl_nand_map_blks_per_plane, 2
 c_ftl_nand_map_blks_per_plane:
 	.zero	2
 	.section	.bss.c_ftl_nand_map_region_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR65,. + 0
+	.set	.LANCHOR66,. + 0
 	.type	c_ftl_nand_map_region_num, %object
 	.size	c_ftl_nand_map_region_num, 2
 c_ftl_nand_map_region_num:
 	.zero	2
 	.section	.bss.c_ftl_nand_max_data_blks,"aw",@nobits
 	.align	2
-	.set	.LANCHOR40,. + 0
+	.set	.LANCHOR41,. + 0
 	.type	c_ftl_nand_max_data_blks, %object
 	.size	c_ftl_nand_max_data_blks, 4
 c_ftl_nand_max_data_blks:
 	.zero	4
 	.section	.bss.c_ftl_nand_max_map_blks,"aw",@nobits
 	.align	2
-	.set	.LANCHOR63,. + 0
+	.set	.LANCHOR64,. + 0
 	.type	c_ftl_nand_max_map_blks, %object
 	.size	c_ftl_nand_max_map_blks, 4
 c_ftl_nand_max_map_blks:
 	.zero	4
 	.section	.bss.c_ftl_nand_max_sys_blks,"aw",@nobits
 	.align	2
-	.set	.LANCHOR37,. + 0
+	.set	.LANCHOR38,. + 0
 	.type	c_ftl_nand_max_sys_blks, %object
 	.size	c_ftl_nand_max_sys_blks, 4
 c_ftl_nand_max_sys_blks:
 	.zero	4
 	.section	.bss.c_ftl_nand_max_vendor_blks,"aw",@nobits
 	.align	1
-	.set	.LANCHOR60,. + 0
+	.set	.LANCHOR61,. + 0
 	.type	c_ftl_nand_max_vendor_blks, %object
 	.size	c_ftl_nand_max_vendor_blks, 2
 c_ftl_nand_max_vendor_blks:
 	.zero	2
 	.section	.bss.c_ftl_nand_page_pre_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR51,. + 0
+	.set	.LANCHOR52,. + 0
 	.type	c_ftl_nand_page_pre_blk, %object
 	.size	c_ftl_nand_page_pre_blk, 2
 c_ftl_nand_page_pre_blk:
 	.zero	2
 	.section	.bss.c_ftl_nand_page_pre_slc_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR52,. + 0
+	.set	.LANCHOR53,. + 0
 	.type	c_ftl_nand_page_pre_slc_blk, %object
 	.size	c_ftl_nand_page_pre_slc_blk, 2
 c_ftl_nand_page_pre_slc_blk:
 	.zero	2
 	.section	.bss.c_ftl_nand_page_pre_super_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR53,. + 0
+	.set	.LANCHOR54,. + 0
 	.type	c_ftl_nand_page_pre_super_blk, %object
 	.size	c_ftl_nand_page_pre_super_blk, 2
 c_ftl_nand_page_pre_super_blk:
 	.zero	2
 	.section	.bss.c_ftl_nand_planes_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR36,. + 0
+	.set	.LANCHOR37,. + 0
 	.type	c_ftl_nand_planes_num, %object
 	.size	c_ftl_nand_planes_num, 2
 c_ftl_nand_planes_num:
 	.zero	2
 	.section	.bss.c_ftl_nand_planes_per_die,"aw",@nobits
 	.align	1
-	.set	.LANCHOR44,. + 0
+	.set	.LANCHOR45,. + 0
 	.type	c_ftl_nand_planes_per_die, %object
 	.size	c_ftl_nand_planes_per_die, 2
 c_ftl_nand_planes_per_die:
 	.zero	2
 	.section	.bss.c_ftl_nand_reserved_blks,"aw",@nobits
 	.align	1
-	.set	.LANCHOR58,. + 0
+	.set	.LANCHOR59,. + 0
 	.type	c_ftl_nand_reserved_blks, %object
 	.size	c_ftl_nand_reserved_blks, 2
 c_ftl_nand_reserved_blks:
 	.zero	2
 	.section	.bss.c_ftl_nand_sec_pre_page,"aw",@nobits
 	.align	1
-	.set	.LANCHOR54,. + 0
+	.set	.LANCHOR55,. + 0
 	.type	c_ftl_nand_sec_pre_page, %object
 	.size	c_ftl_nand_sec_pre_page, 2
 c_ftl_nand_sec_pre_page:
 	.zero	2
 	.section	.bss.c_ftl_nand_sec_pre_page_shift,"aw",@nobits
 	.align	1
-	.set	.LANCHOR55,. + 0
+	.set	.LANCHOR56,. + 0
 	.type	c_ftl_nand_sec_pre_page_shift, %object
 	.size	c_ftl_nand_sec_pre_page_shift, 2
 c_ftl_nand_sec_pre_page_shift:
 	.zero	2
 	.section	.bss.c_ftl_nand_sys_blks_per_plane,"aw",@nobits
 	.align	2
-	.set	.LANCHOR35,. + 0
+	.set	.LANCHOR36,. + 0
 	.type	c_ftl_nand_sys_blks_per_plane, %object
 	.size	c_ftl_nand_sys_blks_per_plane, 4
 c_ftl_nand_sys_blks_per_plane:
 	.zero	4
 	.section	.bss.c_ftl_nand_totle_phy_blks,"aw",@nobits
 	.align	2
-	.set	.LANCHOR41,. + 0
+	.set	.LANCHOR42,. + 0
 	.type	c_ftl_nand_totle_phy_blks, %object
 	.size	c_ftl_nand_totle_phy_blks, 4
 c_ftl_nand_totle_phy_blks:
 	.zero	4
 	.section	.bss.c_ftl_nand_type,"aw",@nobits
 	.align	1
-	.set	.LANCHOR42,. + 0
+	.set	.LANCHOR43,. + 0
 	.type	c_ftl_nand_type, %object
 	.size	c_ftl_nand_type, 2
 c_ftl_nand_type:
 	.zero	2
 	.section	.bss.c_ftl_nand_vendor_region_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR61,. + 0
+	.set	.LANCHOR62,. + 0
 	.type	c_ftl_nand_vendor_region_num, %object
 	.size	c_ftl_nand_vendor_region_num, 2
 c_ftl_nand_vendor_region_num:
 	.zero	2
 	.section	.bss.c_ftl_vendor_part_size,"aw",@nobits
 	.align	1
-	.set	.LANCHOR48,. + 0
+	.set	.LANCHOR49,. + 0
 	.type	c_ftl_vendor_part_size, %object
 	.size	c_ftl_vendor_part_size, 2
 c_ftl_vendor_part_size:
@@ -18677,7 +18706,7 @@ c_gc_page_buf_num:
 	.zero	4
 	.section	.bss.c_mlc_erase_count_value,"aw",@nobits
 	.align	1
-	.set	.LANCHOR46,. + 0
+	.set	.LANCHOR47,. + 0
 	.type	c_mlc_erase_count_value, %object
 	.size	c_mlc_erase_count_value, 2
 c_mlc_erase_count_value:
@@ -18691,7 +18720,7 @@ ftl_gc_temp_power_lost_recovery_flag:
 	.zero	4
 	.section	.bss.gBbtInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR73,. + 0
+	.set	.LANCHOR74,. + 0
 	.type	gBbtInfo, %object
 	.size	gBbtInfo, 96
 gBbtInfo:
@@ -18705,7 +18734,7 @@ gBlockPageAlignSize:
 	.zero	4
 	.section	.bss.gBootDdrMode,"aw",@nobits
 	.align	2
-	.set	.LANCHOR153,. + 0
+	.set	.LANCHOR152,. + 0
 	.type	gBootDdrMode, %object
 	.size	gBootDdrMode, 4
 gBootDdrMode:
@@ -18730,14 +18759,14 @@ gFlashOnfiModeEn:
 	.zero	1
 	.section	.bss.gFlashPageBuffer0,"aw",@nobits
 	.align	3
-	.set	.LANCHOR145,. + 0
+	.set	.LANCHOR144,. + 0
 	.type	gFlashPageBuffer0, %object
 	.size	gFlashPageBuffer0, 8
 gFlashPageBuffer0:
 	.zero	8
 	.section	.bss.gFlashPageBuffer1,"aw",@nobits
 	.align	3
-	.set	.LANCHOR151,. + 0
+	.set	.LANCHOR150,. + 0
 	.type	gFlashPageBuffer1, %object
 	.size	gFlashPageBuffer1, 8
 gFlashPageBuffer1:
@@ -18775,7 +18804,7 @@ gFlashSlcMode:
 gFlashSpareBuffer:
 	.zero	8
 	.section	.bss.gFlashToggleModeEn,"aw",@nobits
-	.set	.LANCHOR28,. + 0
+	.set	.LANCHOR29,. + 0
 	.type	gFlashToggleModeEn, %object
 	.size	gFlashToggleModeEn, 1
 gFlashToggleModeEn:
@@ -18789,14 +18818,14 @@ gL2pMapInfo:
 	.zero	64
 	.section	.bss.gMasterInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR33,. + 0
+	.set	.LANCHOR34,. + 0
 	.type	gMasterInfo, %object
 	.size	gMasterInfo, 48
 gMasterInfo:
 	.zero	48
 	.section	.bss.gMasterTempBuf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR154,. + 0
+	.set	.LANCHOR153,. + 0
 	.type	gMasterTempBuf, %object
 	.size	gMasterTempBuf, 8
 gMasterTempBuf:
@@ -18821,27 +18850,27 @@ gMultiPageReadEn:
 gNandChipMap:
 	.zero	64
 	.section	.bss.gNandFlashEccBits,"aw",@nobits
-	.set	.LANCHOR31,. + 0
+	.set	.LANCHOR32,. + 0
 	.type	gNandFlashEccBits, %object
 	.size	gNandFlashEccBits, 1
 gNandFlashEccBits:
 	.zero	1
 	.section	.bss.gNandFlashIDBEccBits,"aw",@nobits
-	.set	.LANCHOR150,. + 0
+	.set	.LANCHOR149,. + 0
 	.type	gNandFlashIDBEccBits, %object
 	.size	gNandFlashIDBEccBits, 1
 gNandFlashIDBEccBits:
 	.zero	1
 	.section	.bss.gNandFlashIdbBlockAddr,"aw",@nobits
 	.align	2
-	.set	.LANCHOR147,. + 0
+	.set	.LANCHOR146,. + 0
 	.type	gNandFlashIdbBlockAddr, %object
 	.size	gNandFlashIdbBlockAddr, 4
 gNandFlashIdbBlockAddr:
 	.zero	4
 	.section	.bss.gNandFlashInfoBlockAddr,"aw",@nobits
 	.align	2
-	.set	.LANCHOR146,. + 0
+	.set	.LANCHOR145,. + 0
 	.type	gNandFlashInfoBlockAddr, %object
 	.size	gNandFlashInfoBlockAddr, 4
 gNandFlashInfoBlockAddr:
@@ -18864,14 +18893,14 @@ gNandFlashResEndPageAddr:
 gNandIDBResBlkNum:
 	.zero	1
 	.section	.bss.gNandIDBResBlkNumSaveInFlash,"aw",@nobits
-	.set	.LANCHOR148,. + 0
+	.set	.LANCHOR147,. + 0
 	.type	gNandIDBResBlkNumSaveInFlash, %object
 	.size	gNandIDBResBlkNumSaveInFlash, 1
 gNandIDBResBlkNumSaveInFlash:
 	.zero	1
 	.section	.bss.gNandIDataBuf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR139,. + 0
+	.set	.LANCHOR138,. + 0
 	.type	gNandIDataBuf, %object
 	.size	gNandIDataBuf, 2048
 gNandIDataBuf:
@@ -18910,21 +18939,21 @@ gNandRandomizer:
 	.zero	1
 	.section	.bss.gNandcDumpWriteEn,"aw",@nobits
 	.align	2
-	.set	.LANCHOR34,. + 0
+	.set	.LANCHOR35,. + 0
 	.type	gNandcDumpWriteEn, %object
 	.size	gNandcDumpWriteEn, 4
 gNandcDumpWriteEn:
 	.zero	4
 	.section	.bss.gNandcEccBits,"aw",@nobits
 	.align	2
-	.set	.LANCHOR30,. + 0
+	.set	.LANCHOR31,. + 0
 	.type	gNandcEccBits, %object
 	.size	gNandcEccBits, 4
 gNandcEccBits:
 	.zero	4
 	.section	.bss.gNandcVer,"aw",@nobits
 	.align	2
-	.set	.LANCHOR32,. + 0
+	.set	.LANCHOR33,. + 0
 	.type	gNandcVer, %object
 	.size	gNandcVer, 4
 gNandcVer:
@@ -18938,7 +18967,7 @@ gReadRetryInfo:
 	.zero	852
 	.section	.bss.gSysFreeQueue,"aw",@nobits
 	.align	3
-	.set	.LANCHOR74,. + 0
+	.set	.LANCHOR75,. + 0
 	.type	gSysFreeQueue, %object
 	.size	gSysFreeQueue, 2056
 gSysFreeQueue:
@@ -18972,14 +19001,14 @@ gVendorBlkInfo:
 	.zero	64
 	.section	.bss.g_GlobalDataVersion,"aw",@nobits
 	.align	2
-	.set	.LANCHOR158,. + 0
+	.set	.LANCHOR157,. + 0
 	.type	g_GlobalDataVersion, %object
 	.size	g_GlobalDataVersion, 4
 g_GlobalDataVersion:
 	.zero	4
 	.section	.bss.g_GlobalSysVersion,"aw",@nobits
 	.align	2
-	.set	.LANCHOR157,. + 0
+	.set	.LANCHOR156,. + 0
 	.type	g_GlobalSysVersion, %object
 	.size	g_GlobalSysVersion, 4
 g_GlobalSysVersion:
@@ -18993,7 +19022,7 @@ g_LowFormat:
 	.zero	4
 	.section	.bss.g_MaxLbaSector,"aw",@nobits
 	.align	2
-	.set	.LANCHOR67,. + 0
+	.set	.LANCHOR68,. + 0
 	.type	g_MaxLbaSector, %object
 	.size	g_MaxLbaSector, 4
 g_MaxLbaSector:
@@ -19007,49 +19036,49 @@ g_MaxLbn:
 	.zero	4
 	.section	.bss.g_MaxLpn,"aw",@nobits
 	.align	2
-	.set	.LANCHOR71,. + 0
+	.set	.LANCHOR72,. + 0
 	.type	g_MaxLpn, %object
 	.size	g_MaxLpn, 4
 g_MaxLpn:
 	.zero	4
 	.section	.bss.g_SlcPartLbaEndSector,"aw",@nobits
 	.align	2
-	.set	.LANCHOR155,. + 0
+	.set	.LANCHOR154,. + 0
 	.type	g_SlcPartLbaEndSector, %object
 	.size	g_SlcPartLbaEndSector, 4
 g_SlcPartLbaEndSector:
 	.zero	4
 	.section	.bss.g_VaildLpn,"aw",@nobits
 	.align	2
-	.set	.LANCHOR99,. + 0
+	.set	.LANCHOR100,. + 0
 	.type	g_VaildLpn, %object
 	.size	g_VaildLpn, 4
 g_VaildLpn:
 	.zero	4
 	.section	.bss.g_active_superblock,"aw",@nobits
 	.align	3
-	.set	.LANCHOR90,. + 0
+	.set	.LANCHOR91,. + 0
 	.type	g_active_superblock, %object
 	.size	g_active_superblock, 48
 g_active_superblock:
 	.zero	48
 	.section	.bss.g_all_blk_used_slc_mode,"aw",@nobits
 	.align	2
-	.set	.LANCHOR156,. + 0
+	.set	.LANCHOR155,. + 0
 	.type	g_all_blk_used_slc_mode, %object
 	.size	g_all_blk_used_slc_mode, 4
 g_all_blk_used_slc_mode:
 	.zero	4
 	.section	.bss.g_buffer_superblock,"aw",@nobits
 	.align	3
-	.set	.LANCHOR91,. + 0
+	.set	.LANCHOR92,. + 0
 	.type	g_buffer_superblock, %object
 	.size	g_buffer_superblock, 48
 g_buffer_superblock:
 	.zero	48
 	.section	.bss.g_cur_erase_blk,"aw",@nobits
 	.align	2
-	.set	.LANCHOR72,. + 0
+	.set	.LANCHOR73,. + 0
 	.type	g_cur_erase_blk, %object
 	.size	g_cur_erase_blk, 4
 g_cur_erase_blk:
@@ -19070,14 +19099,14 @@ g_ect_tbl_power_up_flush:
 	.zero	2
 	.section	.bss.g_flash_read_only_en,"aw",@nobits
 	.align	2
-	.set	.LANCHOR75,. + 0
+	.set	.LANCHOR76,. + 0
 	.type	g_flash_read_only_en, %object
 	.size	g_flash_read_only_en, 4
 g_flash_read_only_en:
 	.zero	4
 	.section	.bss.g_free_slc_blk_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR137,. + 0
+	.set	.LANCHOR136,. + 0
 	.type	g_free_slc_blk_num, %object
 	.size	g_free_slc_blk_num, 2
 g_free_slc_blk_num:
@@ -19112,7 +19141,7 @@ g_gc_bad_block_temp_tbl:
 	.zero	34
 	.section	.bss.g_gc_blk_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR176,. + 0
+	.set	.LANCHOR175,. + 0
 	.type	g_gc_blk_index, %object
 	.size	g_gc_blk_index, 2
 g_gc_blk_index:
@@ -19140,28 +19169,28 @@ g_gc_cur_blk_valid_pages:
 	.zero	2
 	.section	.bss.g_gc_free_blk_threshold,"aw",@nobits
 	.align	1
-	.set	.LANCHOR174,. + 0
+	.set	.LANCHOR173,. + 0
 	.type	g_gc_free_blk_threshold, %object
 	.size	g_gc_free_blk_threshold, 2
 g_gc_free_blk_threshold:
 	.zero	2
 	.section	.bss.g_gc_head_data_block,"aw",@nobits
 	.align	2
-	.set	.LANCHOR171,. + 0
+	.set	.LANCHOR170,. + 0
 	.type	g_gc_head_data_block, %object
 	.size	g_gc_head_data_block, 4
 g_gc_head_data_block:
 	.zero	4
 	.section	.bss.g_gc_head_data_block_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR172,. + 0
+	.set	.LANCHOR171,. + 0
 	.type	g_gc_head_data_block_count, %object
 	.size	g_gc_head_data_block_count, 4
 g_gc_head_data_block_count:
 	.zero	4
 	.section	.bss.g_gc_merge_free_blk_threshold,"aw",@nobits
 	.align	1
-	.set	.LANCHOR175,. + 0
+	.set	.LANCHOR174,. + 0
 	.type	g_gc_merge_free_blk_threshold, %object
 	.size	g_gc_merge_free_blk_threshold, 2
 g_gc_merge_free_blk_threshold:
@@ -19196,7 +19225,7 @@ g_gc_page_offset:
 	.zero	2
 	.section	.bss.g_gc_refresh_block_temp_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR177,. + 0
+	.set	.LANCHOR176,. + 0
 	.type	g_gc_refresh_block_temp_num, %object
 	.size	g_gc_refresh_block_temp_num, 2
 g_gc_refresh_block_temp_num:
@@ -19209,7 +19238,7 @@ g_gc_refresh_block_temp_tbl:
 	.zero	34
 	.section	.bss.g_gc_skip_write_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR173,. + 0
+	.set	.LANCHOR172,. + 0
 	.type	g_gc_skip_write_count, %object
 	.size	g_gc_skip_write_count, 4
 g_gc_skip_write_count:
@@ -19223,35 +19252,35 @@ g_gc_superblock:
 	.zero	48
 	.section	.bss.g_gc_temp_superblock,"aw",@nobits
 	.align	3
-	.set	.LANCHOR92,. + 0
+	.set	.LANCHOR93,. + 0
 	.type	g_gc_temp_superblock, %object
 	.size	g_gc_temp_superblock, 48
 g_gc_temp_superblock:
 	.zero	48
 	.section	.bss.g_in_gc_progress,"aw",@nobits
 	.align	2
-	.set	.LANCHOR169,. + 0
+	.set	.LANCHOR168,. + 0
 	.type	g_in_gc_progress, %object
 	.size	g_in_gc_progress, 4
 g_in_gc_progress:
 	.zero	4
 	.section	.bss.g_in_swl_replace,"aw",@nobits
 	.align	2
-	.set	.LANCHOR170,. + 0
+	.set	.LANCHOR169,. + 0
 	.type	g_in_swl_replace, %object
 	.size	g_in_swl_replace, 4
 g_in_swl_replace:
 	.zero	4
 	.section	.bss.g_inkDie_check_enable,"aw",@nobits
 	.align	2
-	.set	.LANCHOR101,. + 0
+	.set	.LANCHOR28,. + 0
 	.type	g_inkDie_check_enable, %object
 	.size	g_inkDie_check_enable, 4
 g_inkDie_check_enable:
 	.zero	4
 	.section	.bss.g_l2p_last_update_region_id,"aw",@nobits
 	.align	1
-	.set	.LANCHOR96,. + 0
+	.set	.LANCHOR97,. + 0
 	.type	g_l2p_last_update_region_id, %object
 	.size	g_l2p_last_update_region_id, 2
 g_l2p_last_update_region_id:
@@ -19263,49 +19292,49 @@ g_l2p_last_update_region_id:
 g_maxRegNum:
 	.zero	1
 	.section	.bss.g_maxRetryCount,"aw",@nobits
-	.set	.LANCHOR149,. + 0
+	.set	.LANCHOR148,. + 0
 	.type	g_maxRetryCount, %object
 	.size	g_maxRetryCount, 1
 g_maxRetryCount:
 	.zero	1
 	.section	.bss.g_max_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR167,. + 0
+	.set	.LANCHOR166,. + 0
 	.type	g_max_erase_count, %object
 	.size	g_max_erase_count, 4
 g_max_erase_count:
 	.zero	4
 	.section	.bss.g_min_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR168,. + 0
+	.set	.LANCHOR167,. + 0
 	.type	g_min_erase_count, %object
 	.size	g_min_erase_count, 4
 g_min_erase_count:
 	.zero	4
 	.section	.bss.g_nandc_version_data,"aw",@nobits
 	.align	2
-	.set	.LANCHOR152,. + 0
+	.set	.LANCHOR151,. + 0
 	.type	g_nandc_version_data, %object
 	.size	g_nandc_version_data, 4
 g_nandc_version_data:
 	.zero	4
 	.section	.bss.g_num_data_superblocks,"aw",@nobits
 	.align	1
-	.set	.LANCHOR84,. + 0
+	.set	.LANCHOR85,. + 0
 	.type	g_num_data_superblocks, %object
 	.size	g_num_data_superblocks, 2
 g_num_data_superblocks:
 	.zero	2
 	.section	.bss.g_num_free_superblocks,"aw",@nobits
 	.align	1
-	.set	.LANCHOR87,. + 0
+	.set	.LANCHOR88,. + 0
 	.type	g_num_free_superblocks, %object
 	.size	g_num_free_superblocks, 2
 g_num_free_superblocks:
 	.zero	2
 	.section	.bss.g_page_map_check_enable,"aw",@nobits
 	.align	1
-	.set	.LANCHOR68,. + 0
+	.set	.LANCHOR69,. + 0
 	.type	g_page_map_check_enable, %object
 	.size	g_page_map_check_enable, 2
 g_page_map_check_enable:
@@ -19366,14 +19395,14 @@ g_slc2KBNand:
 	.zero	1
 	.section	.bss.g_sys_ext_data,"aw",@nobits
 	.align	3
-	.set	.LANCHOR136,. + 0
+	.set	.LANCHOR135,. + 0
 	.type	g_sys_ext_data, %object
 	.size	g_sys_ext_data, 512
 g_sys_ext_data:
 	.zero	512
 	.section	.bss.g_sys_save_data,"aw",@nobits
 	.align	3
-	.set	.LANCHOR135,. + 0
+	.set	.LANCHOR80,. + 0
 	.type	g_sys_save_data, %object
 	.size	g_sys_save_data, 48
 g_sys_save_data:
@@ -19394,28 +19423,28 @@ g_totle_avg_erase_count:
 	.zero	4
 	.section	.bss.g_totle_cache_write_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR162,. + 0
+	.set	.LANCHOR161,. + 0
 	.type	g_totle_cache_write_count, %object
 	.size	g_totle_cache_write_count, 4
 g_totle_cache_write_count:
 	.zero	4
 	.section	.bss.g_totle_discard_page_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR161,. + 0
+	.set	.LANCHOR160,. + 0
 	.type	g_totle_discard_page_count, %object
 	.size	g_totle_discard_page_count, 4
 g_totle_discard_page_count:
 	.zero	4
 	.section	.bss.g_totle_gc_page_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR159,. + 0
+	.set	.LANCHOR158,. + 0
 	.type	g_totle_gc_page_count, %object
 	.size	g_totle_gc_page_count, 4
 g_totle_gc_page_count:
 	.zero	4
 	.section	.bss.g_totle_l2p_write_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR163,. + 0
+	.set	.LANCHOR162,. + 0
 	.type	g_totle_l2p_write_count, %object
 	.size	g_totle_l2p_write_count, 4
 g_totle_l2p_write_count:
@@ -19429,14 +19458,14 @@ g_totle_map_block:
 	.zero	2
 	.section	.bss.g_totle_mlc_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR165,. + 0
+	.set	.LANCHOR164,. + 0
 	.type	g_totle_mlc_erase_count, %object
 	.size	g_totle_mlc_erase_count, 4
 g_totle_mlc_erase_count:
 	.zero	4
 	.section	.bss.g_totle_read_page_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR164,. + 0
+	.set	.LANCHOR163,. + 0
 	.type	g_totle_read_page_count, %object
 	.size	g_totle_read_page_count, 4
 g_totle_read_page_count:
@@ -19450,7 +19479,7 @@ g_totle_read_sector:
 	.zero	4
 	.section	.bss.g_totle_slc_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR166,. + 0
+	.set	.LANCHOR165,. + 0
 	.type	g_totle_slc_erase_count, %object
 	.size	g_totle_slc_erase_count, 4
 g_totle_slc_erase_count:
@@ -19464,21 +19493,21 @@ g_totle_swl_count:
 	.zero	4
 	.section	.bss.g_totle_sys_slc_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR78,. + 0
+	.set	.LANCHOR79,. + 0
 	.type	g_totle_sys_slc_erase_count, %object
 	.size	g_totle_sys_slc_erase_count, 4
 g_totle_sys_slc_erase_count:
 	.zero	4
 	.section	.bss.g_totle_vendor_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR69,. + 0
+	.set	.LANCHOR70,. + 0
 	.type	g_totle_vendor_block, %object
 	.size	g_totle_vendor_block, 2
 g_totle_vendor_block:
 	.zero	2
 	.section	.bss.g_totle_write_page_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR160,. + 0
+	.set	.LANCHOR159,. + 0
 	.type	g_totle_write_page_count, %object
 	.size	g_totle_write_page_count, 4
 g_totle_write_page_count:
@@ -19506,7 +19535,7 @@ gc_ink_free_return_value:
 	.zero	2
 	.section	.bss.gpFlashSaveInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR144,. + 0
+	.set	.LANCHOR143,. + 0
 	.type	gpFlashSaveInfo, %object
 	.size	gpFlashSaveInfo, 8
 gpFlashSaveInfo:
@@ -19533,7 +19562,7 @@ gpNandc1:
 	.zero	8
 	.section	.bss.gpReadRetrial,"aw",@nobits
 	.align	3
-	.set	.LANCHOR143,. + 0
+	.set	.LANCHOR142,. + 0
 	.type	gpReadRetrial, %object
 	.size	gpReadRetrial, 8
 gpReadRetrial:
@@ -19575,35 +19604,35 @@ p_blk_mode_table:
 	.zero	8
 	.section	.bss.p_data_block_list_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR81,. + 0
+	.set	.LANCHOR82,. + 0
 	.type	p_data_block_list_head, %object
 	.size	p_data_block_list_head, 8
 p_data_block_list_head:
 	.zero	8
 	.section	.bss.p_data_block_list_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR80,. + 0
+	.set	.LANCHOR81,. + 0
 	.type	p_data_block_list_table, %object
 	.size	p_data_block_list_table, 8
 p_data_block_list_table:
 	.zero	8
 	.section	.bss.p_data_block_list_tail,"aw",@nobits
 	.align	3
-	.set	.LANCHOR83,. + 0
+	.set	.LANCHOR84,. + 0
 	.type	p_data_block_list_tail, %object
 	.size	p_data_block_list_tail, 8
 p_data_block_list_tail:
 	.zero	8
 	.section	.bss.p_erase_count_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR77,. + 0
+	.set	.LANCHOR78,. + 0
 	.type	p_erase_count_table, %object
 	.size	p_erase_count_table, 8
 p_erase_count_table:
 	.zero	8
 	.section	.bss.p_free_data_block_list_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR86,. + 0
+	.set	.LANCHOR87,. + 0
 	.type	p_free_data_block_list_head, %object
 	.size	p_free_data_block_list_head, 8
 p_free_data_block_list_head:
@@ -19666,7 +19695,7 @@ p_l2p_map_buf:
 	.zero	8
 	.section	.bss.p_l2p_ram_map,"aw",@nobits
 	.align	3
-	.set	.LANCHOR95,. + 0
+	.set	.LANCHOR96,. + 0
 	.type	p_l2p_ram_map, %object
 	.size	p_l2p_ram_map, 8
 p_l2p_ram_map:
@@ -19708,7 +19737,7 @@ p_map_region_ppn_table:
 	.zero	8
 	.section	.bss.p_plane_order_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR45,. + 0
+	.set	.LANCHOR46,. + 0
 	.type	p_plane_order_table, %object
 	.size	p_plane_order_table, 32
 p_plane_order_table:
@@ -19722,7 +19751,7 @@ p_swl_mul_table:
 	.zero	8
 	.section	.bss.p_sys_data_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR79,. + 0
+	.set	.LANCHOR180,. + 0
 	.type	p_sys_data_buf, %object
 	.size	p_sys_data_buf, 8
 p_sys_data_buf:
@@ -19749,14 +19778,14 @@ p_valid_page_count_check_table:
 	.zero	8
 	.section	.bss.p_valid_page_count_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR82,. + 0
+	.set	.LANCHOR83,. + 0
 	.type	p_valid_page_count_table, %object
 	.size	p_valid_page_count_table, 8
 p_valid_page_count_table:
 	.zero	8
 	.section	.bss.p_vendor_block_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR70,. + 0
+	.set	.LANCHOR71,. + 0
 	.type	p_vendor_block_table, %object
 	.size	p_vendor_block_table, 8
 p_vendor_block_table:
@@ -19798,7 +19827,7 @@ read_retry_cur_offset:
 	.zero	4
 	.section	.bss.req_erase,"aw",@nobits
 	.align	3
-	.set	.LANCHOR76,. + 0
+	.set	.LANCHOR77,. + 0
 	.type	req_erase, %object
 	.size	req_erase, 8
 req_erase:
@@ -19812,21 +19841,21 @@ req_gc:
 	.zero	8
 	.section	.bss.req_gc_dst,"aw",@nobits
 	.align	3
-	.set	.LANCHOR179,. + 0
+	.set	.LANCHOR178,. + 0
 	.type	req_gc_dst, %object
 	.size	req_gc_dst, 8
 req_gc_dst:
 	.zero	8
 	.section	.bss.req_prgm,"aw",@nobits
 	.align	3
-	.set	.LANCHOR180,. + 0
+	.set	.LANCHOR179,. + 0
 	.type	req_prgm, %object
 	.size	req_prgm, 8
 req_prgm:
 	.zero	8
 	.section	.bss.req_read,"aw",@nobits
 	.align	3
-	.set	.LANCHOR178,. + 0
+	.set	.LANCHOR177,. + 0
 	.type	req_read, %object
 	.size	req_read, 8
 req_read:
@@ -19853,9 +19882,9 @@ FtlMallocOffset:
 	.word	64
 	.section	.data.NandFlashParaTbl,"aw",@progbits
 	.align	3
-	.set	.LANCHOR140,. + 0
+	.set	.LANCHOR139,. + 0
 	.type	NandFlashParaTbl, %object
-	.size	NandFlashParaTbl, 2336
+	.size	NandFlashParaTbl, 2368
 NandFlashParaTbl:
 	.byte	6
 	.byte	44
@@ -20353,6 +20382,32 @@ NandFlashParaTbl:
 	.zero	4
 	.byte	5
 	.byte	44
+	.byte	-124
+	.byte	68
+	.byte	50
+	.byte	-86
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	32
+	.hword	512
+	.byte	2
+	.byte	2
+	.hword	1096
+	.hword	1503
+	.byte	5
+	.byte	19
+	.byte	60
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.zero	4
+	.byte	5
+	.byte	44
 	.byte	100
 	.byte	68
 	.byte	50
@@ -21757,7 +21812,7 @@ NandFlashParaTbl:
 	.zero	4
 	.section	.data.NandOptPara,"aw",@progbits
 	.align	3
-	.set	.LANCHOR141,. + 0
+	.set	.LANCHOR140,. + 0
 	.type	NandOptPara, %object
 	.size	NandOptPara, 128
 NandOptPara:
@@ -22089,7 +22144,7 @@ gFtlInitStatus:
 	.word	-1
 	.section	.data.gNandParaInfo,"aw",@progbits
 	.align	3
-	.set	.LANCHOR29,. + 0
+	.set	.LANCHOR30,. + 0
 	.type	gNandParaInfo, %object
 	.size	gNandParaInfo, 32
 gNandParaInfo:
@@ -22322,358 +22377,364 @@ refValueDefault:
 	.byte	-32
 	.byte	-37
 	.section	.rodata.FlashDdrTunningRead.str1.1,"aMS",@progbits,1
-.LC7:
+.LC10:
 	.string	"sdr read ok %x ecc=%d\n"
-.LC8:
+.LC11:
 	.string	"sync para %d\n"
-.LC9:
+.LC12:
 	.string	"TOG mode Read error %x %x\n"
 	.section	.rodata.FlashEraseSLc2KBlocks.str1.1,"aMS",@progbits,1
 .LC1:
 	.string	"FlashEraseBlocks pageAddr error %x\n"
 	.section	.rodata.FlashInit.str1.1,"aMS",@progbits,1
-.LC18:
+.LC21:
 	.string	"No.%d FLASH ID:%x %x %x %x %x %x\n"
-.LC19:
+.LC22:
 	.string	"FlashLoadPhyInfo fail %x!!\n"
 	.section	.rodata.FlashProgSlc2KPages.str1.1,"aMS",@progbits,1
-.LC24:
+.LC27:
 	.string	"prog error: = %x\n"
-.LC25:
+.LC28:
 	.string	"prog read error: = %x\n"
-.LC26:
+.LC29:
 	.string	"prog read s error: = %x %x %x\n"
-.LC27:
+.LC30:
 	.string	"prog read d error: = %x %x %x\n"
 	.section	.rodata.FlashReadFacBbtData.str1.1,"aMS",@progbits,1
-.LC55:
+.LC58:
 	.string	"BBT:"
 	.section	.rodata.FlashReadIdbDataRaw.str1.1,"aMS",@progbits,1
-.LC12:
+.LC15:
 	.string	"ECC:%d\n"
 	.section	.rodata.FlashReadPage.str1.1,"aMS",@progbits,1
-.LC10:
+.LC13:
 	.string	"read retry status %x %x %x\n"
 	.section	.rodata.FlashReadPages.str1.1,"aMS",@progbits,1
-.LC23:
+.LC26:
 	.string	"ReadRetry pageadd=%x ecc=%x err=%x\n"
 	.section	.rodata.FlashReadSlc2KPages.str1.1,"aMS",@progbits,1
-.LC20:
+.LC23:
 	.string	"Read pageadd=%x  ecc=%x err=%x\n"
-.LC21:
+.LC24:
 	.string	"data:"
-.LC22:
+.LC25:
 	.string	"spare:"
 	.section	.rodata.FtlBbmMapBadBlock.str1.1,"aMS",@progbits,1
 .LC2:
 	.string	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\n"
 	.section	.rodata.FtlBbmTblFlush.str1.1,"aMS",@progbits,1
-.LC28:
+.LC31:
 	.string	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\n"
-.LC29:
+.LC32:
 	.string	"FtlBbmTblFlush error:%x\n"
-.LC30:
+.LC33:
 	.string	"FtlBbmTblFlush error = %x error count = %d\n"
+	.section	.rodata.FtlFreeSysBlkQueueOut.str1.1,"aMS",@progbits,1
+.LC4:
+	.string	"FtlFreeSysBlkQueueOut free count = %d\n"
+.LC5:
+	.string	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\n"
 	.section	.rodata.FtlGcFreeTempBlock.str1.1,"aMS",@progbits,1
-.LC47:
+.LC50:
 	.string	"GC des block %x done\n"
 	.section	.rodata.FtlGcScanTempBlk.str1.1,"aMS",@progbits,1
-.LC46:
+.LC49:
 	.string	"FtlGcScanTempBlkError ID %x %x!!!!!!!\n"
 	.section	.rodata.FtlInit.str1.1,"aMS",@progbits,1
-.LC48:
-	.string	"FTL version: 5.0.47 20180208"
-.LC49:
+.LC51:
+	.string	"FTL version: 5.0.48 20180408"
+.LC52:
 	.string	"...%s: no bad block mapping table, format device\n"
-.LC50:
+.LC53:
 	.string	"...%s FtlSysBlkInit error ,format device!\n"
 	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",@progbits,1
-.LC40:
+.LC43:
 	.string	"no ect"
 	.section	.rodata.FtlMapTblRecovery.str1.1,"aMS",@progbits,1
-.LC42:
+.LC45:
 	.string	"page map lost %x %x %x %x\n"
 	.section	.rodata.FtlMapWritePage.str1.1,"aMS",@progbits,1
-.LC35:
+.LC38:
 	.string	"FtlMapWritePage error = %x\n"
-.LC36:
+.LC39:
 	.string	"FtlMapWritePage error = %x error count = %d\n"
 	.section	.rodata.FtlProgPages.str1.1,"aMS",@progbits,1
-.LC38:
+.LC41:
 	.string	"Ftlwrite decrement_vpc_count %x = %d\n"
 	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",@progbits,1
-.LC43:
+.LC46:
 	.string	"RSB refresh addr %x\n"
-.LC44:
+.LC47:
 	.string	"spuer block %x vpn is 0\n "
-.LC45:
+.LC48:
 	.string	"g_recovery_ppa %x ver %x\n "
 	.section	.rodata.FtlVendorPartRead.str1.1,"aMS",@progbits,1
-.LC39:
+.LC42:
 	.string	"FtlVendorPartRead refresh = %x phyAddr = %x\n"
 	.section	.rodata.FtlVpcTblFlush.str1.1,"aMS",@progbits,1
-.LC32:
+.LC35:
 	.string	"FtlVpcTblFlush error = %x error count = %d\n"
 	.section	.rodata.Ftl_load_ext_data.str1.1,"aMS",@progbits,1
-.LC41:
+.LC44:
 	.string	"slc mode"
 	.section	.rodata.HynixGetReadRetryDefault.str1.1,"aMS",@progbits,1
-.LC16:
+.LC19:
 	.string	"otp error! %d"
-.LC17:
+.LC20:
 	.string	"rr"
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",@progbits,1
-.LC4:
+.LC6:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
-.LC5:
+.LC7:
 	.string	"!!!!! FTL sys Error !!!!!"
-.LC6:
+.LC8:
 	.string	"%s\n"
 	.section	.rodata.MicronReadRetrial.str1.1,"aMS",@progbits,1
-.LC11:
+.LC14:
 	.string	"micron RR %d row=%x,count %d,status=%d\n"
-	.section	.rodata.__func__.10004,"a",@progbits
+	.section	.rodata.__func__.10041,"a",@progbits
 	.align	3
 	.set	.LANCHOR214,. + 0
-	.type	__func__.10004, %object
-	.size	__func__.10004, 16
-__func__.10004:
+	.type	__func__.10041, %object
+	.size	__func__.10041, 16
+__func__.10041:
 	.string	"FtlReUsePrevPpa"
-	.section	.rodata.__func__.10037,"a",@progbits
+	.section	.rodata.__func__.10074,"a",@progbits
 	.align	3
 	.set	.LANCHOR228,. + 0
-	.type	__func__.10037, %object
-	.size	__func__.10037, 22
-__func__.10037:
+	.type	__func__.10074, %object
+	.size	__func__.10074, 22
+__func__.10074:
 	.string	"FtlRecoverySuperblock"
-	.section	.rodata.__func__.10091,"a",@progbits
+	.section	.rodata.__func__.10128,"a",@progbits
 	.align	3
-	.set	.LANCHOR100,. + 0
-	.type	__func__.10091, %object
-	.size	__func__.10091, 16
-__func__.10091:
+	.set	.LANCHOR101,. + 0
+	.type	__func__.10128, %object
+	.size	__func__.10128, 16
+__func__.10128:
 	.string	"make_superblock"
-	.section	.rodata.__func__.10111,"a",@progbits
+	.section	.rodata.__func__.10148,"a",@progbits
 	.align	3
-	.set	.LANCHOR138,. + 0
-	.type	__func__.10111, %object
-	.size	__func__.10111, 18
-__func__.10111:
+	.set	.LANCHOR137,. + 0
+	.type	__func__.10148, %object
+	.size	__func__.10148, 18
+__func__.10148:
 	.string	"SupperBlkListInit"
-	.section	.rodata.__func__.10188,"a",@progbits
+	.section	.rodata.__func__.10225,"a",@progbits
 	.align	3
 	.set	.LANCHOR200,. + 0
-	.type	__func__.10188, %object
-	.size	__func__.10188, 25
-__func__.10188:
+	.type	__func__.10225, %object
+	.size	__func__.10225, 25
+__func__.10225:
 	.string	"allocate_data_superblock"
-	.section	.rodata.__func__.10202,"a",@progbits
+	.section	.rodata.__func__.10239,"a",@progbits
 	.align	3
 	.set	.LANCHOR219,. + 0
-	.type	__func__.10202, %object
-	.size	__func__.10202, 29
-__func__.10202:
+	.type	__func__.10239, %object
+	.size	__func__.10239, 29
+__func__.10239:
 	.string	"allocate_new_data_superblock"
-	.section	.rodata.__func__.10208,"a",@progbits
+	.section	.rodata.__func__.10245,"a",@progbits
 	.align	3
 	.set	.LANCHOR205,. + 0
-	.type	__func__.10208, %object
-	.size	__func__.10208, 19
-__func__.10208:
+	.type	__func__.10245, %object
+	.size	__func__.10245, 19
+__func__.10245:
 	.string	"get_new_active_ppa"
-	.section	.rodata.__func__.10219,"a",@progbits
+	.section	.rodata.__func__.10256,"a",@progbits
 	.align	3
 	.set	.LANCHOR203,. + 0
-	.type	__func__.10219, %object
-	.size	__func__.10219, 16
-__func__.10219:
+	.type	__func__.10256, %object
+	.size	__func__.10256, 16
+__func__.10256:
 	.string	"update_vpc_list"
-	.section	.rodata.__func__.10224,"a",@progbits
+	.section	.rodata.__func__.10261,"a",@progbits
 	.align	3
 	.set	.LANCHOR204,. + 0
-	.type	__func__.10224, %object
-	.size	__func__.10224, 20
-__func__.10224:
+	.type	__func__.10261, %object
+	.size	__func__.10261, 20
+__func__.10261:
 	.string	"decrement_vpc_count"
-	.section	.rodata.__func__.10292,"a",@progbits
+	.section	.rodata.__func__.10329,"a",@progbits
 	.align	3
 	.set	.LANCHOR234,. + 0
-	.type	__func__.10292, %object
-	.size	__func__.10292, 19
-__func__.10292:
+	.type	__func__.10329, %object
+	.size	__func__.10329, 19
+__func__.10329:
 	.string	"FtlGcFreeTempBlock"
-	.section	.rodata.__func__.10386,"a",@progbits
+	.section	.rodata.__func__.10423,"a",@progbits
 	.align	3
 	.set	.LANCHOR238,. + 0
-	.type	__func__.10386, %object
-	.size	__func__.10386, 23
-__func__.10386:
+	.type	__func__.10423, %object
+	.size	__func__.10423, 23
+__func__.10423:
 	.string	"rk_ftl_garbage_collect"
-	.section	.rodata.__func__.9318,"a",@progbits
+	.section	.rodata.__func__.9361,"a",@progbits
 	.align	3
 	.set	.LANCHOR240,. + 0
-	.type	__func__.9318, %object
-	.size	__func__.9318, 8
-__func__.9318:
+	.type	__func__.9361, %object
+	.size	__func__.9361, 8
+__func__.9361:
 	.string	"FtlInit"
-	.section	.rodata.__func__.9378,"a",@progbits
+	.section	.rodata.__func__.9421,"a",@progbits
 	.align	3
 	.set	.LANCHOR220,. + 0
-	.type	__func__.9378, %object
-	.size	__func__.9378, 13
-__func__.9378:
+	.type	__func__.9421, %object
+	.size	__func__.9421, 13
+__func__.9421:
 	.string	"FtlProgPages"
-	.section	.rodata.__func__.9404,"a",@progbits
+	.section	.rodata.__func__.9447,"a",@progbits
 	.align	3
 	.set	.LANCHOR242,. + 0
-	.type	__func__.9404, %object
-	.size	__func__.9404, 10
-__func__.9404:
+	.type	__func__.9447, %object
+	.size	__func__.9447, 10
+__func__.9447:
 	.string	"ftl_write"
-	.section	.rodata.__func__.9467,"a",@progbits
+	.section	.rodata.__func__.9510,"a",@progbits
 	.align	3
 	.set	.LANCHOR121,. + 0
-	.type	__func__.9467, %object
-	.size	__func__.9467, 14
-__func__.9467:
+	.type	__func__.9510, %object
+	.size	__func__.9510, 14
+__func__.9510:
 	.string	"FtlBbt2Bitmap"
-	.section	.rodata.__func__.9513,"a",@progbits
+	.section	.rodata.__func__.9556,"a",@progbits
 	.align	3
 	.set	.LANCHOR208,. + 0
-	.type	__func__.9513, %object
-	.size	__func__.9513, 11
-__func__.9513:
+	.type	__func__.9556, %object
+	.size	__func__.9556, 11
+__func__.9556:
 	.string	"FtlLoadBbt"
-	.section	.rodata.__func__.9622,"a",@progbits
+	.section	.rodata.__func__.9658,"a",@progbits
 	.align	3
-	.set	.LANCHOR88,. + 0
-	.type	__func__.9622, %object
-	.size	__func__.9622, 17
-__func__.9622:
+	.set	.LANCHOR89,. + 0
+	.type	__func__.9658, %object
+	.size	__func__.9658, 17
+__func__.9658:
 	.string	"INSERT_FREE_LIST"
-	.section	.rodata.__func__.9626,"a",@progbits
+	.section	.rodata.__func__.9662,"a",@progbits
 	.align	3
-	.set	.LANCHOR85,. + 0
-	.type	__func__.9626, %object
-	.size	__func__.9626, 17
-__func__.9626:
+	.set	.LANCHOR86,. + 0
+	.type	__func__.9662, %object
+	.size	__func__.9662, 17
+__func__.9662:
 	.string	"INSERT_DATA_LIST"
-	.section	.rodata.__func__.9656,"a",@progbits
+	.section	.rodata.__func__.9692,"a",@progbits
 	.align	3
-	.set	.LANCHOR89,. + 0
-	.type	__func__.9656, %object
-	.size	__func__.9656, 17
-__func__.9656:
+	.set	.LANCHOR90,. + 0
+	.type	__func__.9692, %object
+	.size	__func__.9692, 17
+__func__.9692:
 	.string	"List_remove_node"
-	.section	.rodata.__func__.9686,"a",@progbits
+	.section	.rodata.__func__.9722,"a",@progbits
 	.align	3
-	.set	.LANCHOR93,. + 0
-	.type	__func__.9686, %object
-	.size	__func__.9686, 22
-__func__.9686:
+	.set	.LANCHOR94,. + 0
+	.type	__func__.9722, %object
+	.size	__func__.9722, 22
+__func__.9722:
 	.string	"List_update_data_list"
-	.section	.rodata.__func__.9693,"a",@progbits
+	.section	.rodata.__func__.9729,"a",@progbits
 	.align	3
-	.set	.LANCHOR212,. + 0
-	.type	__func__.9693, %object
-	.size	__func__.9693, 16
-__func__.9693:
-	.string	"load_l2p_region"
-	.section	.rodata.__func__.9723,"a",@progbits
+	.set	.LANCHOR213,. + 0
+	.type	__func__.9729, %object
+	.size	__func__.9729, 20
+__func__.9729:
+	.string	"ftl_load_l2p_region"
+	.section	.rodata.__func__.9760,"a",@progbits
 	.align	3
-	.set	.LANCHOR94,. + 0
-	.type	__func__.9723, %object
-	.size	__func__.9723, 26
-__func__.9723:
+	.set	.LANCHOR95,. + 0
+	.type	__func__.9760, %object
+	.size	__func__.9760, 26
+__func__.9760:
 	.string	"ftl_map_blk_alloc_new_blk"
-	.section	.rodata.__func__.9737,"a",@progbits
+	.section	.rodata.__func__.9774,"a",@progbits
 	.align	3
 	.set	.LANCHOR209,. + 0
-	.type	__func__.9737, %object
-	.size	__func__.9737, 15
-__func__.9737:
+	.type	__func__.9774, %object
+	.size	__func__.9774, 15
+__func__.9774:
 	.string	"ftl_map_blk_gc"
-	.section	.rodata.__func__.9750,"a",@progbits
+	.section	.rodata.__func__.9787,"a",@progbits
 	.align	3
 	.set	.LANCHOR210,. + 0
-	.type	__func__.9750, %object
-	.size	__func__.9750, 31
-__func__.9750:
+	.type	__func__.9787, %object
+	.size	__func__.9787, 31
+__func__.9787:
 	.string	"Ftl_write_map_blk_to_last_page"
-	.section	.rodata.__func__.9763,"a",@progbits
+	.section	.rodata.__func__.9800,"a",@progbits
 	.align	3
 	.set	.LANCHOR211,. + 0
-	.type	__func__.9763, %object
-	.size	__func__.9763, 16
-__func__.9763:
+	.type	__func__.9800, %object
+	.size	__func__.9800, 16
+__func__.9800:
 	.string	"FtlMapWritePage"
-	.section	.rodata.__func__.9783,"a",@progbits
+	.section	.rodata.__func__.9820,"a",@progbits
 	.align	3
-	.set	.LANCHOR97,. + 0
-	.type	__func__.9783, %object
-	.size	__func__.9783, 22
-__func__.9783:
+	.set	.LANCHOR98,. + 0
+	.type	__func__.9820, %object
+	.size	__func__.9820, 22
+__func__.9820:
 	.string	"select_l2p_ram_region"
-	.section	.rodata.__func__.9799,"a",@progbits
+	.section	.rodata.__func__.9836,"a",@progbits
 	.align	3
-	.set	.LANCHOR213,. + 0
-	.type	__func__.9799, %object
-	.size	__func__.9799, 9
-__func__.9799:
+	.set	.LANCHOR212,. + 0
+	.type	__func__.9836, %object
+	.size	__func__.9836, 9
+__func__.9836:
 	.string	"log2phys"
-	.section	.rodata.__func__.9861,"a",@progbits
+	.section	.rodata.__func__.9898,"a",@progbits
 	.align	3
 	.set	.LANCHOR207,. + 0
-	.type	__func__.9861, %object
-	.size	__func__.9861, 15
-__func__.9861:
+	.type	__func__.9898, %object
+	.size	__func__.9898, 15
+__func__.9898:
 	.string	"FtlVpcTblFlush"
-	.section	.rodata.__func__.9880,"a",@progbits
+	.section	.rodata.__func__.9917,"a",@progbits
 	.align	3
 	.set	.LANCHOR224,. + 0
-	.type	__func__.9880, %object
-	.size	__func__.9880, 14
-__func__.9880:
+	.type	__func__.9917, %object
+	.size	__func__.9917, 14
+__func__.9917:
 	.string	"FtlScanSysBlk"
-	.section	.rodata.__func__.9934,"a",@progbits
+	.section	.rodata.__func__.9971,"a",@progbits
 	.align	3
 	.set	.LANCHOR225,. + 0
-	.type	__func__.9934, %object
-	.size	__func__.9934, 15
-__func__.9934:
+	.type	__func__.9971, %object
+	.size	__func__.9971, 15
+__func__.9971:
 	.string	"FtlLoadSysInfo"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",@progbits,1
-.LC31:
+.LC34:
 	.string	"decrement_vpc_count %x = %d\n"
 	.section	.rodata.ftl_fix_nand_power_lost_error.str1.1,"aMS",@progbits,1
-.LC52:
+.LC55:
 	.string	"fix power lost blk = %x vpc=%x\n"
-.LC53:
+.LC56:
 	.string	"erase power lost blk = %x vpc=%x\n"
+	.section	.rodata.ftl_map_blk_alloc_new_blk.str1.1,"aMS",@progbits,1
+.LC9:
+	.string	"FtlFreeSysBlkQueueOut = %x, free count = %d\n"
 	.section	.rodata.ftl_map_blk_gc.str1.1,"aMS",@progbits,1
-.LC33:
+.LC36:
 	.string	"ftl_map_blk_gc blk info: %x %x %x\n"
-.LC34:
+.LC37:
 	.string	"page map lost: %x %x\n"
 	.section	.rodata.ftl_write.str1.1,"aMS",@progbits,1
-.LC54:
+.LC57:
 	.string	"FtlWrite: lpa error:%x %x\n"
-	.section	.rodata.load_l2p_region.str1.1,"aMS",@progbits,1
-.LC37:
+	.section	.rodata.log2phys.str1.1,"aMS",@progbits,1
+.LC40:
 	.string	"load_l2p_region refresh = %x phyAddr = %x\n"
 	.section	.rodata.remove_from_free_sys_Queue.str1.1,"aMS",@progbits,1
 .LC3:
 	.string	"remove_from_free_sys_Queue %x\n"
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",@progbits,1
-.LC51:
+.LC54:
 	.string	"FtlInit %x\n"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
-.LC13:
+.LC16:
 	.string	"%s 0x%x:"
-.LC14:
+.LC17:
 	.string	"%x "
-.LC15:
+.LC18:
 	.string	""
 	.hidden	free
-	.ident	"GCC: (Linaro GCC 6.3-2017.05) 6.3.1 20170404"
-	.section	.note.GNU-stack,"",@progbits

commit 390759ed402c30865ebbe76c9ed8c0b817dbc2f0
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Apr 13 10:46:07 2018 +0800

    rockchip: add distro boot for rockchip boot cmd
    
    The boot image scan sequence will be:
    - Android AOSP with rockchip extention(resource.img as second)
    - RKIMG(kernel.img, resource.img, boot.img)
    - Linux distro
    
    Change-Id: I534f7944b1927544b5571353894e724307b2d26f
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index f1b87ffbc4..9503f65e8a 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -86,7 +86,8 @@
 
 #define RKIMG_BOOTCOMMAND \
 	"boot_android ${devtype} ${devnum};" \
-	"bootrkp;"
+	"bootrkp;" \
+	"run distro_bootcmd;"
 
 #endif
 

commit 70878a45d374e24882704b9761cded184e09252d
Author: Meng Dongyang <daniel.meng@rock-chips.com>
Date:   Fri Mar 30 15:54:00 2018 +0800

    phy: phy-rockchip-inno-usb2: make CDP connect to PC
    
    The CDP is a charger type combine with USB host, so allow
    gadget work when detect CDP charger type.
    
    Change-Id: I9a6a39cd0b3c22139827c8cee15ba4b32526d5a2
    Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index f157c52f8a..ee06ae21eb 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -350,7 +350,12 @@ out:
 
 int rockchip_u2phy_vbus_detect(void)
 {
-	return (rockchip_chg_get_type() == POWER_SUPPLY_TYPE_USB) ? 1 : 0;
+	int chg_type;
+
+	chg_type = rockchip_chg_get_type();
+
+	return (chg_type == POWER_SUPPLY_TYPE_USB ||
+		chg_type == POWER_SUPPLY_TYPE_USB_CDP) ? 1 : 0;
 }
 
 void otg_phy_init(struct dwc2_udc *dev)

commit 33dccc23dbee237803db28d138708cd2a4916be0
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Thu Apr 12 09:35:41 2018 +0800

    drivers: rk_nand: improve the processing mechanism of nand flash read and write exception
    
    When NAND FLASH reads and writes with UECC, it may lose data.
    Add a additional reading process to restore the data.
    
    Change-Id: I3345d4889775547e342db41a0aa3457356b1c605
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/drivers/rknand/rk_zftl_arm_v8.S b/drivers/rknand/rk_zftl_arm_v8.S
index e85b4c2bc4..602fa3ddbb 100644
--- a/drivers/rknand/rk_zftl_arm_v8.S
+++ b/drivers/rknand/rk_zftl_arm_v8.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2018-04-02
+ * date: 2018-04-11
  */
 	.arch armv8-a
 	.file	"rk_zftl_arm_v8.S"
@@ -4298,26 +4298,85 @@ ftl_get_blk_list_in_sblk:
 	.global	ftl_free_sblk
 	.type	ftl_free_sblk, %function
 ftl_free_sblk:
-	stp	x29, x30, [sp, -32]!
+	stp	x29, x30, [sp, -48]!
+	adrp	x1, .LANCHOR3
 	add	x29, sp, 0
-	str	x19, [sp, 16]
-	and	x19, x0, 65535
-	mov	w0, w19
+	stp	x19, x20, [sp, 16]
+	and	x20, x0, 65535
+	ldr	x2, [x1, #:lo12:.LANCHOR3]
+	lsl	x19, x20, 2
+	stp	x21, x22, [sp, 32]
+	mov	x22, x20
+	add	x0, x2, x19
+	mov	x21, x1
+	ldrb	w3, [x0, 2]
+	tbz	x3, 3, .L780
+	adrp	x1, .LANCHOR97
+	ldr	x3, [x1, #:lo12:.LANCHOR97]
+	ldrh	w1, [x2, x19]
+	ldrh	w4, [x3, 74]
+	ubfx	x1, x1, 0, 11
+	add	w1, w1, w4
+	adrp	x4, .LANCHOR98
+	ldrh	w4, [x4, #:lo12:.LANCHOR98]
+	cmp	w4, w1, uxth
+	bcc	.L781
+	ldr	w1, [x2, x19]
+	ldrh	w2, [x3, 72]
+	ubfx	x1, x1, 11, 8
+	add	w1, w1, w2
+	adrp	x2, .LANCHOR99
+	ldrh	w2, [x2, #:lo12:.LANCHOR99]
+	cmp	w2, w1, uxth
+	bcs	.L780
+.L781:
+	adrp	x1, .LANCHOR86
+	adrp	x2, .LANCHOR91
+	ldrh	w1, [x1, #:lo12:.LANCHOR86]
+	ldrh	w2, [x2, #:lo12:.LANCHOR91]
+	add	w1, w1, w2
+	adrp	x2, .LANCHOR87
+	ldrh	w2, [x2, #:lo12:.LANCHOR87]
+	cmp	w1, w2
+	bge	.L782
+	ldrb	w1, [x0, 2]
+	mov	w2, 2
+	bfi	w1, w2, 3, 2
+.L787:
+	strb	w1, [x0, 2]
+.L780:
+	mov	w0, w22
 	bl	zftl_remove_data_node
-	mov	w0, w19
+	mov	w0, w22
 	bl	zftl_insert_free_list
-	adrp	x0, .LANCHOR3
-	ldr	x0, [x0, #:lo12:.LANCHOR3]
-	add	x0, x0, x19, lsl 2
+	ldr	x0, [x21, #:lo12:.LANCHOR3]
+	ldp	x21, x22, [sp, 32]
+	add	x0, x0, x19
 	ldrb	w1, [x0, 2]
 	and	w1, w1, 31
 	strb	w1, [x0, 2]
 	adrp	x0, .LANCHOR4
 	ldr	x0, [x0, #:lo12:.LANCHOR4]
-	strh	wzr, [x0, x19, lsl 1]
-	ldr	x19, [sp, 16]
-	ldp	x29, x30, [sp], 32
+	strh	wzr, [x0, x20, lsl 1]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
 	ret
+.L782:
+	adrp	x1, .LANCHOR84
+	adrp	x2, .LANCHOR89
+	ldrh	w1, [x1, #:lo12:.LANCHOR84]
+	ldrh	w2, [x2, #:lo12:.LANCHOR89]
+	add	w1, w1, w2
+	adrp	x2, .LANCHOR82
+	ldrh	w2, [x2, #:lo12:.LANCHOR82]
+	add	w1, w1, w2
+	adrp	x2, .LANCHOR100
+	ldrh	w2, [x2, #:lo12:.LANCHOR100]
+	cmp	w1, w2
+	bge	.L780
+	ldrb	w1, [x0, 2]
+	and	w1, w1, -25
+	b	.L787
 	.size	ftl_free_sblk, .-ftl_free_sblk
 	.section	.text.gc_free_src_blk,"ax",@progbits
 	.align	2
@@ -4337,10 +4396,10 @@ gc_free_src_blk:
 	stp	x19, x20, [sp, 16]
 	mov	w20, 0
 	stp	x25, x26, [sp, 64]
-.L782:
+.L789:
 	ldrh	w0, [x21, 56]
 	cmp	w0, w20
-	bhi	.L797
+	bhi	.L804
 	strh	wzr, [x21, 56]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -4348,121 +4407,121 @@ gc_free_src_blk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L797:
+.L804:
 	add	x0, x21, x20, sxtw 1
 	ldrh	w25, [x0, 58]
 	ldr	x0, [x23, #:lo12:.LANCHOR4]
 	mov	x19, x25
 	lsl	x26, x25, 1
 	ldrh	w2, [x0, x26]
-	cbz	w2, .L783
+	cbz	w2, .L790
 	mov	w1, w25
 	mov	x0, x22
 	bl	printf
-.L783:
+.L790:
 	ldr	x0, [x24, #:lo12:.LANCHOR4]
 	ldrh	w0, [x0, x26]
-	cbnz	w0, .L784
+	cbnz	w0, .L791
 	adrp	x0, .LANCHOR3
 	ldr	x0, [x0, #:lo12:.LANCHOR3]
 	add	x25, x0, x25, lsl 2
 	adrp	x0, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L785
+	tbz	x0, 8, .L792
 	ldrb	w2, [x25, 2]
 	adrp	x0, .LC52
 	mov	w1, w19
 	add	x0, x0, :lo12:.LC52
 	ubfx	x2, x2, 5, 3
 	bl	printf
-.L785:
+.L792:
 	ldrb	w0, [x25, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L786
+	beq	.L793
 	tst	w0, 192
-	bne	.L787
-.L786:
-	adrp	x1, .LANCHOR97
+	bne	.L794
+.L793:
+	adrp	x1, .LANCHOR101
 	adrp	x0, .LC0
 	mov	w2, 770
-	add	x1, x1, :lo12:.LANCHOR97
+	add	x1, x1, :lo12:.LANCHOR101
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L787:
+.L794:
 	mov	w0, w19
 	bl	ftl_free_sblk
 	adrp	x0, .LANCHOR5
 	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	ldrh	w2, [x0, 124]
-	cbz	w2, .L788
+	cbz	w2, .L795
 	add	x3, x0, 392
 	mov	w1, 0
-.L790:
+.L797:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L789
+	bne	.L796
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 392]
 	strh	w2, [x0, 124]
-.L788:
+.L795:
 	ldrh	w2, [x0, 120]
-	cbz	w2, .L791
+	cbz	w2, .L798
 	add	x3, x0, 136
 	mov	w1, 0
-.L793:
+.L800:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L792
+	bne	.L799
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 136]
 	strh	w2, [x0, 120]
-.L791:
+.L798:
 	ldrh	w2, [x0, 122]
-	cbz	w2, .L794
+	cbz	w2, .L801
 	add	x3, x0, 264
 	mov	w1, 0
-.L796:
+.L803:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L795
+	bne	.L802
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 264]
 	strh	w2, [x0, 122]
-.L794:
+.L801:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L782
-.L789:
+	b	.L789
+.L796:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L790
-	b	.L788
-.L792:
+	bne	.L797
+	b	.L795
+.L799:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L793
-	b	.L791
-.L795:
+	bne	.L800
+	b	.L798
+.L802:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L796
-	b	.L794
-.L784:
+	bne	.L803
+	b	.L801
+.L791:
 	mov	w2, 0
 	mov	w1, 1
 	mov	w0, w19
 	bl	gc_add_sblk
-	b	.L794
+	b	.L801
 	.size	gc_free_src_blk, .-gc_free_src_blk
 	.section	.text.ftl_erase_phy_blk,"ax",@progbits
 	.align	2
@@ -4477,7 +4536,7 @@ ftl_erase_phy_blk:
 	adrp	x1, .LANCHOR96
 	stp	x19, x20, [sp, 16]
 	mov	w19, 21
-	adrp	x22, .LANCHOR99
+	adrp	x22, .LANCHOR103
 	ldrh	w1, [x1, #:lo12:.LANCHOR96]
 	sub	w1, w19, w1
 	mov	w19, 1
@@ -4485,18 +4544,18 @@ ftl_erase_phy_blk:
 	sub	w19, w19, #1
 	and	w19, w19, w0
 	asr	w20, w0, w1
-	adrp	x0, .LANCHOR98
+	adrp	x0, .LANCHOR102
 	sxth	w19, w19
-	ldrb	w0, [x0, #:lo12:.LANCHOR98]
-	cbz	w0, .L821
-	ldrh	w2, [x22, #:lo12:.LANCHOR99]
+	ldrb	w0, [x0, #:lo12:.LANCHOR102]
+	cbz	w0, .L828
+	ldrh	w2, [x22, #:lo12:.LANCHOR103]
 	cmp	w21, 0
 	cset	w1, eq
 	mov	w0, w20
 	mul	w2, w2, w19
 	bl	flash_erase_block_en
-.L821:
-	ldrh	w2, [x22, #:lo12:.LANCHOR99]
+.L828:
+	ldrh	w2, [x22, #:lo12:.LANCHOR103]
 	mov	w1, w21
 	mov	w0, w20
 	ldp	x21, x22, [sp, 32]
@@ -4517,7 +4576,7 @@ ftl_erase_sblk:
 	stp	x25, x26, [sp, 64]
 	and	w26, w0, 65535
 	ldr	x0, [x23, #:lo12:.LANCHOR3]
-	adrp	x25, .LANCHOR100
+	adrp	x25, .LANCHOR104
 	stp	x21, x22, [sp, 32]
 	ubfiz	x22, x26, 2, 16
 	add	x0, x0, x22
@@ -4525,48 +4584,48 @@ ftl_erase_sblk:
 	stp	x19, x20, [sp, 16]
 	adrp	x24, .LANCHOR95
 	mov	w20, w1
-	add	x25, x25, :lo12:.LANCHOR100
+	add	x25, x25, :lo12:.LANCHOR104
 	ldrb	w28, [x0, 3]
 	add	x24, x24, :lo12:.LANCHOR95
 	add	x27, x29, 112
 	mov	w19, 0
-.L827:
+.L834:
 	ldrb	w0, [x25]
 	cmp	w19, w0
-	bge	.L838
+	bge	.L845
 	ldrb	w1, [x24]
-	adrp	x0, .LANCHOR99
+	adrp	x0, .LANCHOR103
 	mov	w21, 0
-	ldrh	w3, [x0, #:lo12:.LANCHOR99]
+	ldrh	w3, [x0, #:lo12:.LANCHOR103]
 	sub	w4, w1, #1
 	mov	w0, 0
 	mul	w6, w19, w1
 	mul	w5, w26, w1
-	b	.L839
-.L829:
+	b	.L846
+.L836:
 	add	w2, w0, w6
 	asr	w2, w28, w2
-	tbnz	x2, 0, .L828
+	tbnz	x2, 0, .L835
 	and	w2, w0, w4
 	add	w2, w2, w5
 	mul	w2, w2, w3
 	str	w2, [x27, w21, sxtw 2]
 	add	w21, w21, 1
-.L828:
+.L835:
 	add	w0, w0, 1
-.L839:
+.L846:
 	cmp	w0, w1
-	blt	.L829
+	blt	.L836
 	cmp	w1, 4
-	bne	.L830
+	bne	.L837
 	mov	x3, 0
-.L831:
+.L838:
 	cmp	w21, w3
-	bgt	.L832
-.L833:
+	bgt	.L839
+.L840:
 	add	w19, w19, 1
-	b	.L827
-.L832:
+	b	.L834
+.L839:
 	ldr	w2, [x27, x3, lsl 2]
 	mov	w1, w20
 	str	x3, [x29, 104]
@@ -4574,59 +4633,59 @@ ftl_erase_sblk:
 	bl	flash_erase_block_en
 	ldr	x3, [x29, 104]
 	add	x3, x3, 1
-	b	.L831
-.L830:
+	b	.L838
+.L837:
 	cmp	w21, 2
-	bne	.L834
-	adrp	x0, .LANCHOR98
-	ldrb	w0, [x0, #:lo12:.LANCHOR98]
-	cbz	w0, .L835
+	bne	.L841
+	adrp	x0, .LANCHOR102
+	ldrb	w0, [x0, #:lo12:.LANCHOR102]
+	cbz	w0, .L842
 	ldp	w2, w3, [x29, 112]
 	cmp	w20, 0
 	cset	w1, eq
 	mov	w0, w19
 	bl	flash_erase_duplane_block
-.L835:
+.L842:
 	ldp	w2, w3, [x29, 112]
 	mov	w1, w20
 	mov	w0, w19
 	bl	flash_erase_duplane_block
-	b	.L833
-.L834:
+	b	.L840
+.L841:
 	cmp	w21, 1
-	bne	.L833
-	adrp	x0, .LANCHOR98
-	ldrb	w0, [x0, #:lo12:.LANCHOR98]
-	cbz	w0, .L837
+	bne	.L840
+	adrp	x0, .LANCHOR102
+	ldrb	w0, [x0, #:lo12:.LANCHOR102]
+	cbz	w0, .L844
 	ldr	w2, [x29, 112]
 	cmp	w20, 0
 	cset	w1, eq
 	mov	w0, w19
 	bl	flash_erase_block_en
-.L837:
+.L844:
 	ldr	w2, [x29, 112]
 	mov	w1, w20
 	mov	w0, w19
 	bl	flash_erase_block_en
-	b	.L833
-.L838:
-	adrp	x2, .LANCHOR101
+	b	.L840
+.L845:
+	adrp	x2, .LANCHOR97
 	ldr	x3, [x23, #:lo12:.LANCHOR3]
-	cbnz	w20, .L840
+	cbnz	w20, .L847
 	ldrh	w1, [x3, x22]
 	add	w0, w1, 1
 	and	w0, w0, 2047
 	bfi	w1, w0, 0, 11
 	strh	w1, [x3, x22]
-	ldr	x1, [x2, #:lo12:.LANCHOR101]
+	ldr	x1, [x2, #:lo12:.LANCHOR97]
 	ldr	w2, [x1, 84]
 	add	w2, w2, 1
 	str	w2, [x1, 84]
 	ldrh	w2, [x1, 96]
 	cmp	w2, w0
-	bge	.L842
+	bge	.L849
 	strh	w0, [x1, 96]
-.L842:
+.L849:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -4635,7 +4694,7 @@ ftl_erase_sblk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L840:
+.L847:
 	ldr	w1, [x3, x22]
 	ubfx	x0, x1, 11, 8
 	add	w0, w0, 1
@@ -4643,15 +4702,15 @@ ftl_erase_sblk:
 	bfi	w1, w0, 11, 8
 	str	w1, [x3, x22]
 	and	w0, w0, 65535
-	ldr	x1, [x2, #:lo12:.LANCHOR101]
+	ldr	x1, [x2, #:lo12:.LANCHOR97]
 	ldr	w2, [x1, 80]
 	add	w2, w2, 1
 	str	w2, [x1, 80]
 	ldrh	w2, [x1, 98]
 	cmp	w2, w0
-	bcs	.L842
+	bcs	.L849
 	strh	w0, [x1, 98]
-	b	.L842
+	b	.L849
 	.size	ftl_erase_sblk, .-ftl_erase_sblk
 	.section	.text.ftl_alloc_sys_blk,"ax",@progbits
 	.align	2
@@ -4659,44 +4718,44 @@ ftl_erase_sblk:
 	.type	ftl_alloc_sys_blk, %function
 ftl_alloc_sys_blk:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR101
+	adrp	x0, .LANCHOR97
 	add	x29, sp, 0
-	ldr	x1, [x0, #:lo12:.LANCHOR101]
+	ldr	x1, [x0, #:lo12:.LANCHOR97]
 	ldrh	w2, [x1, 136]
 	str	x19, [sp, 16]
 	mov	x19, x0
 	cmp	w2, 63
-	bls	.L852
+	bls	.L859
 	strh	wzr, [x1, 136]
-.L852:
+.L859:
 	ldrh	w0, [x1, 112]
-	cbnz	w0, .L853
-	adrp	x1, .LANCHOR102
+	cbnz	w0, .L860
+	adrp	x1, .LANCHOR105
 	adrp	x0, .LC0
-	mov	w2, 994
-	add	x1, x1, :lo12:.LANCHOR102
+	mov	w2, 1012
+	add	x1, x1, :lo12:.LANCHOR105
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L853:
-	ldr	x1, [x19, #:lo12:.LANCHOR101]
+.L860:
+	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	mov	w5, 65535
-.L856:
+.L863:
 	ldrh	w2, [x1, 136]
-.L854:
+.L861:
 	mov	w3, w2
 	cmp	w2, 63
-	ble	.L855
+	ble	.L862
 	strh	wzr, [x1, 136]
-	b	.L856
-.L855:
+	b	.L863
+.L862:
 	add	x4, x2, 1
 	add	x0, x1, x4, lsl 1
 	ldrh	w0, [x0, 158]
 	cmp	w0, w5
-	bne	.L859
+	bne	.L866
 	mov	x2, x4
-	b	.L854
-.L859:
+	b	.L861
+.L866:
 	add	x3, x1, x3, sxtw 1
 	mov	w4, -1
 	ldr	x19, [sp, 16]
@@ -4717,40 +4776,40 @@ ftl_free_sys_blk:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 65535
-	adrp	x0, .LANCHOR101
+	adrp	x0, .LANCHOR97
 	mov	x19, x0
-	ldr	x1, [x0, #:lo12:.LANCHOR101]
+	ldr	x1, [x0, #:lo12:.LANCHOR97]
 	ldrh	w2, [x1, 138]
 	cmp	w2, 63
-	bls	.L862
+	bls	.L869
 	strh	wzr, [x1, 138]
-.L862:
+.L869:
 	ldrh	w0, [x1, 112]
 	cmp	w0, 63
-	bls	.L863
-	adrp	x1, .LANCHOR103
+	bls	.L870
+	adrp	x1, .LANCHOR106
 	adrp	x0, .LC0
-	mov	w2, 1018
-	add	x1, x1, :lo12:.LANCHOR103
+	mov	w2, 1036
+	add	x1, x1, :lo12:.LANCHOR106
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L863:
-	ldr	x0, [x19, #:lo12:.LANCHOR101]
+.L870:
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	w4, 65535
-.L866:
+.L873:
 	ldrh	w1, [x0, 138]
-.L864:
+.L871:
 	mov	w2, w1
 	cmp	w1, 63
-	ble	.L865
+	ble	.L872
 	strh	wzr, [x0, 138]
-	b	.L866
-.L865:
+	b	.L873
+.L872:
 	add	x3, x1, 1
 	add	x5, x0, x3, lsl 1
 	ldrh	w5, [x5, 158]
 	cmp	w5, w4
-	bne	.L867
+	bne	.L874
 	add	x2, x0, x2, sxtw 1
 	strh	w20, [x2, 160]
 	strh	w1, [x0, 138]
@@ -4760,9 +4819,9 @@ ftl_free_sys_blk:
 	strh	w1, [x0, 112]
 	ldp	x29, x30, [sp], 32
 	ret
-.L867:
+.L874:
 	mov	x1, x3
-	b	.L864
+	b	.L871
 	.size	ftl_free_sys_blk, .-ftl_free_sys_blk
 	.section	.text.ftl_info_data_recovery,"ax",@progbits
 	.align	2
@@ -4772,7 +4831,7 @@ ftl_info_data_recovery:
 	ldrh	w2, [x0]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L880
+	beq	.L887
 	stp	x29, x30, [sp, -48]!
 	adrp	x1, .LANCHOR3
 	add	x29, sp, 0
@@ -4783,25 +4842,25 @@ ftl_info_data_recovery:
 	add	x21, x20, x19
 	ldrb	w1, [x21, 2]
 	tst	w1, 224
-	bne	.L870
+	bne	.L877
 	ldrb	w0, [x0, 4]
 	bfi	w1, w0, 5, 3
 	strb	w1, [x21, 2]
 	mov	w0, w2
 	bl	zftl_remove_free_node
 	ldrb	w0, [x21, 2]
-	adrp	x1, .LANCHOR101
-	ldr	x3, [x1, #:lo12:.LANCHOR101]
-	tbz	x0, 3, .L874
+	adrp	x1, .LANCHOR97
+	ldr	x3, [x1, #:lo12:.LANCHOR97]
+	tbz	x0, 3, .L881
 	ldrh	w2, [x3, 116]
 	sub	w2, w2, #1
 	strh	w2, [x3, 116]
-.L875:
+.L882:
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L877
+	bne	.L884
 	ldr	w0, [x20, x19]
-	ldr	x1, [x1, #:lo12:.LANCHOR101]
+	ldr	x1, [x1, #:lo12:.LANCHOR97]
 	ubfx	x2, x0, 11, 8
 	add	w2, w2, 1
 	bfi	w0, w2, 11, 8
@@ -4809,44 +4868,44 @@ ftl_info_data_recovery:
 	ldrh	w0, [x1, 120]
 	sub	w0, w0, #1
 	strh	w0, [x1, 120]
-.L870:
+.L877:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L874:
+.L881:
 	tst	w0, 24
-	bne	.L876
+	bne	.L883
 	ldrh	w2, [x3, 114]
 	sub	w2, w2, #1
 	strh	w2, [x3, 114]
-	b	.L875
-.L876:
+	b	.L882
+.L883:
 	ldrh	w2, [x3, 118]
 	sub	w2, w2, #1
 	strh	w2, [x3, 118]
-	b	.L875
-.L877:
+	b	.L882
+.L884:
 	ldrh	w2, [x20, x19]
 	cmp	w0, 64
 	add	w3, w2, 1
 	bfi	w2, w3, 0, 11
 	strh	w2, [x20, x19]
-	bne	.L878
-	ldr	x1, [x1, #:lo12:.LANCHOR101]
+	bne	.L885
+	ldr	x1, [x1, #:lo12:.LANCHOR97]
 	ldrh	w0, [x1, 122]
 	sub	w0, w0, #1
 	strh	w0, [x1, 122]
-	b	.L870
-.L878:
+	b	.L877
+.L885:
 	cmp	w0, 96
-	bne	.L870
-	ldr	x1, [x1, #:lo12:.LANCHOR101]
+	bne	.L877
+	ldr	x1, [x1, #:lo12:.LANCHOR97]
 	ldrh	w0, [x1, 124]
 	sub	w0, w0, #1
 	strh	w0, [x1, 124]
-	b	.L870
-.L880:
+	b	.L877
+.L887:
 	ret
 	.size	ftl_info_data_recovery, .-ftl_info_data_recovery
 	.section	.text.ftl_get_ppa_from_index,"ax",@progbits
@@ -4866,9 +4925,9 @@ ftl_get_ppa_from_index:
 	stp	x19, x20, [sp, 16]
 	mul	w1, w1, w3
 	cmp	w0, w1
-	bge	.L884
+	bge	.L891
 	add	x2, x2, 16
-.L885:
+.L892:
 	ldrb	w1, [x2, 9]
 	sdiv	w19, w0, w1
 	msub	w0, w19, w1, w0
@@ -4876,25 +4935,25 @@ ftl_get_ppa_from_index:
 	ldrh	w20, [x0, 16]
 	mov	w0, 65535
 	cmp	w20, w0
-	bne	.L886
-	adrp	x1, .LANCHOR104
+	bne	.L893
+	adrp	x1, .LANCHOR107
 	adrp	x0, .LC0
-	mov	w2, 1403
-	add	x1, x1, :lo12:.LANCHOR104
+	mov	w2, 1421
+	add	x1, x1, :lo12:.LANCHOR107
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L886:
-	adrp	x0, .LANCHOR99
-	ldrh	w0, [x0, #:lo12:.LANCHOR99]
+.L893:
+	adrp	x0, .LANCHOR103
+	ldrh	w0, [x0, #:lo12:.LANCHOR103]
 	madd	w0, w0, w20, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L884:
+.L891:
 	sub	w0, w0, w1
 	add	x2, x2, 48
 	and	w0, w0, 65535
-	b	.L885
+	b	.L892
 	.size	ftl_get_ppa_from_index, .-ftl_get_ppa_from_index
 	.section	.text.lpa_hash_get_ppa,"ax",@progbits
 	.align	2
@@ -4902,29 +4961,29 @@ ftl_get_ppa_from_index:
 	.type	lpa_hash_get_ppa, %function
 lpa_hash_get_ppa:
 	and	x2, x0, 255
-	adrp	x1, .LANCHOR105
-	add	x1, x1, :lo12:.LANCHOR105
+	adrp	x1, .LANCHOR108
+	add	x1, x1, :lo12:.LANCHOR108
 	mov	w3, 65535
 	ldrh	w1, [x1, x2, lsl 1]
-	adrp	x2, .LANCHOR106
-	ldr	x4, [x2, #:lo12:.LANCHOR106]
-	adrp	x2, .LANCHOR107
-	ldr	x5, [x2, #:lo12:.LANCHOR107]
-.L889:
+	adrp	x2, .LANCHOR109
+	ldr	x4, [x2, #:lo12:.LANCHOR109]
+	adrp	x2, .LANCHOR110
+	ldr	x5, [x2, #:lo12:.LANCHOR110]
+.L896:
 	cmp	w1, w3
-	bne	.L891
+	bne	.L898
 	mov	w0, -1
 	ret
-.L891:
+.L898:
 	uxtw	x2, w1
 	ldr	w6, [x4, x2, lsl 2]
 	cmp	w0, w6
-	bne	.L890
+	bne	.L897
 	mov	w0, w1
 	b	ftl_get_ppa_from_index
-.L890:
+.L897:
 	ldrh	w1, [x5, x2, lsl 1]
-	b	.L889
+	b	.L896
 	.size	lpa_hash_get_ppa, .-lpa_hash_get_ppa
 	.section	.text.ftl_get_new_free_page,"ax",@progbits
 	.align	2
@@ -4938,50 +4997,50 @@ ftl_get_new_free_page:
 	mov	x19, x0
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L893
-	adrp	x1, .LANCHOR108
+	bne	.L900
+	adrp	x1, .LANCHOR111
 	adrp	x0, .LC0
-	mov	w2, 1518
-	add	x1, x1, :lo12:.LANCHOR108
+	mov	w2, 1536
+	add	x1, x1, :lo12:.LANCHOR111
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L893:
+.L900:
 	adrp	x0, .LANCHOR80
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w1, w0
-	bne	.L894
-	adrp	x1, .LANCHOR108
+	bne	.L901
+	adrp	x1, .LANCHOR111
 	adrp	x0, .LC0
-	mov	w2, 1519
-	add	x1, x1, :lo12:.LANCHOR108
+	mov	w2, 1537
+	add	x1, x1, :lo12:.LANCHOR111
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L894:
+.L901:
 	ldrh	w0, [x19, 6]
-	cbnz	w0, .L895
-	adrp	x1, .LANCHOR108
+	cbnz	w0, .L902
+	adrp	x1, .LANCHOR111
 	adrp	x0, .LC0
-	mov	w2, 1520
-	add	x1, x1, :lo12:.LANCHOR108
+	mov	w2, 1538
+	add	x1, x1, :lo12:.LANCHOR111
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L895:
+.L902:
 	ldrb	w0, [x19, 5]
 	mov	w2, 65535
 	add	x0, x0, 8
 	ldrh	w3, [x19, x0, lsl 1]
 	adrp	x0, .LANCHOR72
 	ldrb	w4, [x0, #:lo12:.LANCHOR72]
-.L896:
+.L903:
 	cmp	w3, w2
 	ldrb	w1, [x19, 5]
-	beq	.L898
-	adrp	x0, .LANCHOR99
+	beq	.L905
+	adrp	x0, .LANCHOR103
 	add	w1, w1, 1
 	and	w1, w1, 255
 	ldrh	w2, [x19, 2]
-	ldrh	w0, [x0, #:lo12:.LANCHOR99]
+	ldrh	w0, [x0, #:lo12:.LANCHOR103]
 	cmp	w4, w1
 	strb	w1, [x19, 5]
 	mul	w0, w0, w3
@@ -4992,29 +5051,29 @@ ftl_get_new_free_page:
 	orr	w0, w0, w2
 	add	w3, w3, 1
 	strh	w3, [x19, 10]
-	bne	.L892
+	bne	.L899
 	add	w2, w2, 1
 	strb	wzr, [x19, 5]
 	strh	w2, [x19, 2]
-.L892:
+.L899:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L898:
+.L905:
 	add	w1, w1, 1
 	and	w1, w1, 255
 	strb	w1, [x19, 5]
 	cmp	w1, w4
-	bne	.L897
+	bne	.L904
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 5]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L897:
+.L904:
 	ldrb	w0, [x19, 5]
 	add	x0, x0, 8
 	ldrh	w3, [x19, x0, lsl 1]
-	b	.L896
+	b	.L903
 	.size	ftl_get_new_free_page, .-ftl_get_new_free_page
 	.section	.text.ftl_ext_alloc_new_blk,"ax",@progbits
 	.align	2
@@ -5030,22 +5089,22 @@ ftl_ext_alloc_new_blk:
 	mov	w19, w0
 	sub	w0, w0, #1
 	cmp	w1, w0, uxth
-	bcs	.L902
-	adrp	x1, .LANCHOR109
+	bcs	.L909
+	adrp	x1, .LANCHOR112
 	adrp	x0, .LC0
-	mov	w2, 1551
-	add	x1, x1, :lo12:.LANCHOR109
+	mov	w2, 1569
+	add	x1, x1, :lo12:.LANCHOR112
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L902:
-	adrp	x20, .LANCHOR101
+.L909:
+	adrp	x20, .LANCHOR97
 	mov	w1, 0
 	mov	w0, w19
 	bl	ftl_erase_phy_blk
-	ldr	x0, [x20, #:lo12:.LANCHOR101]
+	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	ldrh	w0, [x0, 130]
 	bl	ftl_free_sys_blk
-	ldr	x0, [x20, #:lo12:.LANCHOR101]
+	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	strh	w19, [x0, 130]
 	strh	wzr, [x0, 140]
 	mov	w0, 0
@@ -5058,18 +5117,18 @@ ftl_ext_alloc_new_blk:
 	.global	ftl_total_vpn_update
 	.type	ftl_total_vpn_update, %function
 ftl_total_vpn_update:
-	adrp	x2, .LANCHOR110
+	adrp	x2, .LANCHOR113
 	mov	x3, x2
-	ldrh	w1, [x2, #:lo12:.LANCHOR110]
+	ldrh	w1, [x2, #:lo12:.LANCHOR113]
 	cmp	w1, 4
-	bhi	.L905
-	cbnz	w0, .L905
+	bhi	.L912
+	cbnz	w0, .L912
 	add	w1, w1, 1
-	strh	w1, [x2, #:lo12:.LANCHOR110]
+	strh	w1, [x2, #:lo12:.LANCHOR113]
 	ret
-.L905:
+.L912:
 	adrp	x0, .LANCHOR2
-	strh	wzr, [x3, #:lo12:.LANCHOR110]
+	strh	wzr, [x3, #:lo12:.LANCHOR113]
 	mov	x1, 0
 	mov	w2, 0
 	ldrh	w5, [x0, #:lo12:.LANCHOR2]
@@ -5079,37 +5138,37 @@ ftl_total_vpn_update:
 	adrp	x0, .LANCHOR3
 	ldr	x7, [x0, #:lo12:.LANCHOR3]
 	mov	w0, 0
-.L907:
+.L914:
 	cmp	w5, w1, uxth
-	bhi	.L910
+	bhi	.L917
 	adrp	x1, .LANCHOR5
 	ldr	x1, [x1, #:lo12:.LANCHOR5]
 	str	w2, [x1, 524]
-	adrp	x2, .LANCHOR101
+	adrp	x2, .LANCHOR97
 	str	w0, [x1, 528]
-	ldr	x2, [x2, #:lo12:.LANCHOR101]
+	ldr	x2, [x2, #:lo12:.LANCHOR97]
 	ldrh	w2, [x2, 120]
-	cbz	w2, .L904
+	cbz	w2, .L911
 	udiv	w0, w0, w2
 	str	w0, [x1, 532]
-.L904:
+.L911:
 	ret
-.L910:
+.L917:
 	ldrh	w3, [x6, x1, lsl 1]
 	cmp	w3, w8
-	beq	.L908
+	beq	.L915
 	add	x4, x7, x1, lsl 2
 	ldrb	w4, [x4, 2]
 	and	w4, w4, 224
 	cmp	w4, 160
-	bne	.L909
+	bne	.L916
 	add	w0, w0, w3
-.L908:
+.L915:
 	add	x1, x1, 1
-	b	.L907
-.L909:
+	b	.L914
+.L916:
 	add	w2, w2, w3
-	b	.L908
+	b	.L915
 	.size	ftl_total_vpn_update, .-ftl_total_vpn_update
 	.section	.text.ftl_debug_info_fill,"ax",@progbits
 	.align	2
@@ -5151,39 +5210,39 @@ ftl_vpn_decrement:
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L919
+	beq	.L926
 	adrp	x0, .LANCHOR4
 	ubfiz	x1, x19, 1, 16
 	ldr	x2, [x0, #:lo12:.LANCHOR4]
 	ldrh	w0, [x2, x1]
-	cbnz	w0, .L920
+	cbnz	w0, .L927
 	adrp	x0, .LC53
 	mov	w2, 0
 	mov	w1, w19
 	add	x0, x0, :lo12:.LC53
 	bl	printf
-.L923:
+.L930:
 	mov	w0, 0
-	b	.L918
-.L920:
+	b	.L925
+.L927:
 	sub	w0, w0, #1
 	strh	w0, [x2, x1]
-.L919:
-	adrp	x20, .LANCHOR111
-	ldrh	w0, [x20, #:lo12:.LANCHOR111]
+.L926:
+	adrp	x20, .LANCHOR114
+	ldrh	w0, [x20, #:lo12:.LANCHOR114]
 	cmp	w19, w0
-	beq	.L923
+	beq	.L930
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L922
-	strh	w19, [x20, #:lo12:.LANCHOR111]
-	b	.L923
-.L922:
+	bne	.L929
+	strh	w19, [x20, #:lo12:.LANCHOR114]
+	b	.L930
+.L929:
 	bl	ftl_vpn_update
 	cmp	w0, 0
 	cset	w0, ne
-	strh	w19, [x20, #:lo12:.LANCHOR111]
-.L918:
+	strh	w19, [x20, #:lo12:.LANCHOR114]
+.L925:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -5193,46 +5252,46 @@ ftl_vpn_decrement:
 	.global	lpa_hash_update_ppa
 	.type	lpa_hash_update_ppa, %function
 lpa_hash_update_ppa:
-	adrp	x3, .LANCHOR105
+	adrp	x3, .LANCHOR108
 	and	x5, x0, 255
-	add	x4, x3, :lo12:.LANCHOR105
+	add	x4, x3, :lo12:.LANCHOR108
 	mov	w7, 65535
 	and	w2, w2, 65535
 	mov	w12, w7
 	ldrh	w6, [x4, x5, lsl 1]
-	adrp	x4, .LANCHOR106
-	ldr	x8, [x4, #:lo12:.LANCHOR106]
-	adrp	x4, .LANCHOR107
-	ldr	x4, [x4, #:lo12:.LANCHOR107]
-.L926:
+	adrp	x4, .LANCHOR109
+	ldr	x8, [x4, #:lo12:.LANCHOR109]
+	adrp	x4, .LANCHOR110
+	ldr	x4, [x4, #:lo12:.LANCHOR110]
+.L933:
 	cmp	w6, w12
-	beq	.L930
+	beq	.L937
 	uxtw	x11, w6
 	lsl	x10, x11, 2
 	add	x13, x8, x10
 	ldr	w10, [x8, x10]
 	cmp	w0, w10
 	lsl	x10, x11, 1
-	bne	.L927
+	bne	.L934
 	mov	w6, -1
 	str	w6, [x13]
 	cmp	w7, w12
-	bne	.L928
-	add	x6, x3, :lo12:.LANCHOR105
+	bne	.L935
+	add	x6, x3, :lo12:.LANCHOR108
 	ldrh	w7, [x4, x10]
 	strh	w7, [x6, x5, lsl 1]
-.L929:
+.L936:
 	mov	w6, -1
 	strh	w6, [x4, x11, lsl 1]
-.L930:
+.L937:
 	uxtw	x6, w2
-	add	x3, x3, :lo12:.LANCHOR105
+	add	x3, x3, :lo12:.LANCHOR108
 	cmn	w1, #1
 	str	w0, [x8, x6, lsl 2]
 	ldrh	w0, [x3, x5, lsl 1]
 	strh	w2, [x3, x5, lsl 1]
 	strh	w0, [x4, x6, lsl 1]
-	beq	.L937
+	beq	.L944
 	stp	x29, x30, [sp, -16]!
 	adrp	x0, .LANCHOR96
 	add	x29, sp, 0
@@ -5251,15 +5310,15 @@ lpa_hash_update_ppa:
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
-.L928:
+.L935:
 	ldrh	w6, [x4, x10]
 	strh	w6, [x4, w7, uxtw 1]
-	b	.L929
-.L927:
+	b	.L936
+.L934:
 	mov	w7, w6
 	ldrh	w6, [x4, x10]
-	b	.L926
-.L937:
+	b	.L933
+.L944:
 	mov	w0, -1
 	ret
 	.size	lpa_hash_update_ppa, .-lpa_hash_update_ppa
@@ -5286,27 +5345,27 @@ ftl_mask_bad_block:
 	udiv	w2, w2, w0
 	adrp	x0, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	and	w19, w2, 255
-	tbz	x0, 14, .L941
+	and	w19, w2, 65535
+	tbz	x0, 14, .L948
 	adrp	x0, .LC54
 	mov	w2, w19
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC54
 	bl	printf
-.L941:
+.L948:
 	adrp	x0, .LANCHOR2
 	ldrh	w0, [x0, #:lo12:.LANCHOR2]
 	cmp	w0, w19
-	bls	.L940
+	bls	.L947
 	adrp	x0, .LANCHOR3
 	mov	w1, 1
 	lsl	w1, w1, w20
 	ldr	x0, [x0, #:lo12:.LANCHOR3]
-	add	x19, x0, x19, uxtb 2
+	add	x19, x0, x19, uxth 2
 	ldrb	w0, [x19, 3]
 	orr	w1, w1, w0
 	strb	w1, [x19, 3]
-.L940:
+.L947:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -5342,11 +5401,11 @@ print_ftl_debug_info:
 	ldrh	w1, [x1, #:lo12:.LANCHOR89]
 	add	x0, x0, :lo12:.LC55
 	str	x19, [sp, 48]
-	adrp	x19, .LANCHOR101
+	adrp	x19, .LANCHOR97
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR101]
-	adrp	x1, .LANCHOR112
-	ldrb	w3, [x1, #:lo12:.LANCHOR112]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	adrp	x1, .LANCHOR115
+	ldrb	w3, [x1, #:lo12:.LANCHOR115]
 	ldr	w4, [x0, 8]
 	ldr	w5, [x0, 64]
 	ldr	w1, [x0, 20]
@@ -5354,7 +5413,7 @@ print_ftl_debug_info:
 	adrp	x0, .LC56
 	add	x0, x0, :lo12:.LC56
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR101]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	ldr	w1, [x0, 52]
 	ldr	w2, [x0, 60]
 	ldr	w3, [x0, 16]
@@ -5362,7 +5421,7 @@ print_ftl_debug_info:
 	add	x0, x0, :lo12:.LC57
 	lsr	w3, w3, 11
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR101]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	ldrh	w2, [x0, 98]
 	ldrh	w6, [x0, 72]
 	ldrh	w5, [x0, 96]
@@ -5404,29 +5463,29 @@ ftl_write_buf:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	str	x21, [sp, 32]
-	cbnz	x0, .L950
-	adrp	x1, .LANCHOR113
-	add	x1, x1, :lo12:.LANCHOR113
+	cbnz	x0, .L957
+	adrp	x1, .LANCHOR116
+	add	x1, x1, :lo12:.LANCHOR116
 	mov	w2, 639
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	bl	print_ftl_debug_info
 	mov	w0, -1
-.L949:
+.L956:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L953:
+.L960:
 	mov	x1, x19
 	adrp	x0, .LANCHOR52
 	add	x0, x0, :lo12:.LANCHOR52
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR101
+	adrp	x1, .LANCHOR97
 	ldrb	w3, [x19, 56]
 	ldrb	w0, [x21, #:lo12:.LANCHOR53]
-	ldr	x1, [x1, #:lo12:.LANCHOR101]
+	ldr	x1, [x1, #:lo12:.LANCHOR97]
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x21, #:lo12:.LANCHOR53]
@@ -5436,33 +5495,33 @@ ftl_write_buf:
 	ldr	w2, [x1, 32]
 	add	w2, w2, 1
 	str	w2, [x1, 32]
-	b	.L949
-.L950:
+	b	.L956
+.L957:
 	mov	x19, x0
-	adrp	x0, .LANCHOR114
+	adrp	x0, .LANCHOR117
 	mov	x20, x0
-	ldrb	w1, [x0, #:lo12:.LANCHOR114]
+	ldrb	w1, [x0, #:lo12:.LANCHOR117]
 	ldrb	w2, [x19, 56]
 	cmp	w2, w1
-	bls	.L955
-	adrp	x1, .LANCHOR113
+	bls	.L962
+	adrp	x1, .LANCHOR116
 	adrp	x0, .LC0
 	mov	w2, 644
-	add	x1, x1, :lo12:.LANCHOR113
+	add	x1, x1, :lo12:.LANCHOR116
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L955:
+.L962:
 	ldrb	w0, [x19, 56]
 	adrp	x21, .LANCHOR53
-	cbz	w0, .L952
-	ldrb	w1, [x20, #:lo12:.LANCHOR114]
+	cbz	w0, .L959
+	ldrb	w1, [x20, #:lo12:.LANCHOR117]
 	cmp	w1, w0
-	bcs	.L953
-.L952:
+	bcs	.L960
+.L959:
 	mov	x0, x19
 	bl	buf_free
 	ldrb	w0, [x21, #:lo12:.LANCHOR53]
-	b	.L949
+	b	.L956
 	.size	ftl_write_buf, .-ftl_write_buf
 	.section	.text.ftl_write_completed,"ax",@progbits
 	.align	2
@@ -5472,26 +5531,26 @@ ftl_write_completed:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR115
+	adrp	x20, .LANCHOR118
 	stp	x21, x22, [sp, 32]
 	adrp	x19, .LANCHOR46
 	adrp	x22, .LANCHOR96
-	add	x20, x20, :lo12:.LANCHOR115
+	add	x20, x20, :lo12:.LANCHOR118
 	add	x19, x19, :lo12:.LANCHOR46
 	add	x22, x22, :lo12:.LANCHOR96
 	stp	x23, x24, [sp, 48]
 	str	x25, [sp, 64]
-.L961:
+.L968:
 	ldrb	w0, [x20]
 	cmp	w0, 255
-	bne	.L967
+	bne	.L974
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L967:
+.L974:
 	ubfiz	x21, x0, 6, 8
 	sbfiz	x0, x0, 6, 32
 	add	x23, x19, x0
@@ -5500,7 +5559,7 @@ ftl_write_completed:
 	strb	w0, [x20]
 	ldr	w0, [x23, 52]
 	cmn	w0, #1
-	bne	.L962
+	bne	.L969
 	ldp	w2, w3, [x23, 36]
 	mov	w1, 21
 	ldrh	w0, [x22]
@@ -5529,32 +5588,32 @@ ftl_write_completed:
 	str	w1, [x0, 556]
 	ldrh	w1, [x0, 16]
 	cmp	w1, w24
-	bne	.L963
+	bne	.L970
 	strh	wzr, [x0, 22]
-.L964:
+.L971:
 	mov	x0, x21
 	bl	ftl_write_buf
-	b	.L961
-.L963:
+	b	.L968
+.L970:
 	ldrh	w1, [x0, 48]
 	cmp	w1, w24
-	bne	.L964
+	bne	.L971
 	strh	wzr, [x0, 54]
-	b	.L964
-.L962:
+	b	.L971
+.L969:
 	ldrh	w2, [x23, 48]
 	ldr	w0, [x23, 36]
 	ldr	w1, [x23, 44]
 	bl	lpa_hash_update_ppa
 	ldrb	w0, [x23, 2]
-	tbz	x0, 2, .L966
+	tbz	x0, 2, .L973
 	and	w0, w0, -3
 	strb	w0, [x23, 2]
-	b	.L961
-.L966:
+	b	.L968
+.L973:
 	mov	x0, x21
 	bl	buf_free
-	b	.L961
+	b	.L968
 	.size	ftl_write_completed, .-ftl_write_completed
 	.section	.text.ftl_alloc_sblk,"ax",@progbits
 	.align	2
@@ -5576,35 +5635,35 @@ ftl_alloc_sblk:
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L971
+	beq	.L978
 	adrp	x0, .LANCHOR3
 	lsl	w22, w22, 1
 	ldr	x21, [x0, #:lo12:.LANCHOR3]
 	add	x21, x21, x19, uxth 2
 	ldrb	w0, [x21, 2]
 	tst	w0, 224
-	beq	.L972
-	adrp	x1, .LANCHOR116
+	beq	.L979
+	adrp	x1, .LANCHOR119
 	adrp	x0, .LC0
 	mov	w2, 757
-	add	x1, x1, :lo12:.LANCHOR116
+	add	x1, x1, :lo12:.LANCHOR119
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L972:
+.L979:
 	ldrb	w0, [x21, 2]
 	bfi	w0, w20, 5, 3
 	ubfx	x1, x0, 3, 2
 	orr	w22, w22, w1
 	bfi	w0, w22, 3, 2
 	strb	w0, [x21, 2]
-.L973:
+.L980:
 	mov	w0, w19
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L971:
+.L978:
 	bl	print_ftl_debug_info
 	adrp	x21, .LC61
 	mov	w2, w20
@@ -5622,23 +5681,23 @@ ftl_alloc_sblk:
 	bl	printf
 	bl	dump_all_list_info
 	mov	w2, 767
-	adrp	x1, .LANCHOR116
+	adrp	x1, .LANCHOR119
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR116
+	add	x1, x1, :lo12:.LANCHOR119
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L973
+	b	.L980
 	.size	ftl_alloc_sblk, .-ftl_alloc_sblk
 	.section	.text.sblk_init,"ax",@progbits
 	.align	2
 	.global	sblk_init
 	.type	sblk_init, %function
 sblk_init:
-	adrp	x1, .LANCHOR117
+	adrp	x1, .LANCHOR120
 	mov	w0, -1
-	strb	w0, [x1, #:lo12:.LANCHOR117]
-	adrp	x1, .LANCHOR115
-	strb	w0, [x1, #:lo12:.LANCHOR115]
+	strb	w0, [x1, #:lo12:.LANCHOR120]
+	adrp	x1, .LANCHOR118
+	strb	w0, [x1, #:lo12:.LANCHOR118]
 	adrp	x1, .LANCHOR58
 	strb	w0, [x1, #:lo12:.LANCHOR58]
 	adrp	x1, .LANCHOR65
@@ -5656,13 +5715,13 @@ dump_sblk_queue:
 	add	x0, x0, :lo12:.LC62
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR117
+	adrp	x19, .LANCHOR120
 	str	x21, [sp, 32]
-	ldrb	w1, [x19, #:lo12:.LANCHOR117]
+	ldrb	w1, [x19, #:lo12:.LANCHOR120]
 	bl	printf
-	ldrb	w19, [x19, #:lo12:.LANCHOR117]
+	ldrb	w19, [x19, #:lo12:.LANCHOR120]
 	cmp	w19, 255
-	beq	.L980
+	beq	.L987
 	adrp	x1, .LANCHOR46
 	ubfiz	x19, x19, 6, 8
 	add	x1, x1, :lo12:.LANCHOR46
@@ -5670,7 +5729,7 @@ dump_sblk_queue:
 	add	x19, x1, x19
 	add	x21, x21, :lo12:.LC63
 	mov	x20, x1
-.L982:
+.L989:
 	ldrb	w2, [x19, 58]
 	mov	x0, x21
 	ldrb	w1, [x19, 1]
@@ -5678,11 +5737,11 @@ dump_sblk_queue:
 	bl	printf
 	ldrb	w19, [x19]
 	cmp	w19, 255
-	beq	.L980
+	beq	.L987
 	ubfiz	x19, x19, 6, 8
 	add	x19, x20, x19
-	b	.L982
-.L980:
+	b	.L989
+.L987:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -5693,18 +5752,18 @@ dump_sblk_queue:
 	.global	queue_lun_state
 	.type	queue_lun_state, %function
 queue_lun_state:
-	adrp	x2, .LANCHOR117
-	ldrb	w2, [x2, #:lo12:.LANCHOR117]
+	adrp	x2, .LANCHOR120
+	ldrb	w2, [x2, #:lo12:.LANCHOR120]
 	cmp	w2, 255
-	beq	.L999
+	beq	.L1006
 	adrp	x3, .LANCHOR96
 	adrp	x7, .LANCHOR46
 	add	x7, x7, :lo12:.LANCHOR46
-	adrp	x10, .L995
+	adrp	x10, .L1002
 	ldrh	w8, [x3, #:lo12:.LANCHOR96]
 	mov	w3, 21
 	ubfx	x11, x0, 21, 3
-	add	x10, x10, :lo12:.L995
+	add	x10, x10, :lo12:.L1002
 	sub	w4, w3, w8
 	mov	w3, 1
 	mov	x12, x7
@@ -5718,61 +5777,61 @@ queue_lun_state:
 	and	w6, w6, 65535
 	and	w4, w4, w6
 	and	w4, w4, w3
-.L998:
+.L1005:
 	add	x0, x7, x2, lsl 6
 	ldr	w5, [x0, 40]
 	ubfx	x13, x5, 21, 3
 	cmp	w11, w13
-	bne	.L992
+	bne	.L999
 	lsr	w5, w5, w8
 	and	w5, w6, w5
 	and	w5, w3, w5
 	ldrb	w0, [x0, 58]
 	cmp	w4, w5
-	bne	.L993
+	bne	.L1000
 	cmp	w1, 1
-	bne	.L990
+	bne	.L997
 	cmp	w0, 6
 	ccmp	w0, 8, 4, ne
-	beq	.L992
+	beq	.L999
 	ret
-.L993:
+.L1000:
 	cmp	w1, 3
-	bhi	.L992
+	bhi	.L999
 	ldrb	w5, [x10,w1,uxtw]
-	adr	x13, .Lrtx995
+	adr	x13, .Lrtx1002
 	add	x5, x13, w5, sxtb #2
 	br	x5
-.Lrtx995:
+.Lrtx1002:
 	.section	.rodata.queue_lun_state,"a",@progbits
 	.align	0
 	.align	2
-.L995:
-	.byte	(.L994 - .Lrtx995) / 4
-	.byte	(.L996 - .Lrtx995) / 4
-	.byte	(.L997 - .Lrtx995) / 4
-	.byte	(.L990 - .Lrtx995) / 4
+.L1002:
+	.byte	(.L1001 - .Lrtx1002) / 4
+	.byte	(.L1003 - .Lrtx1002) / 4
+	.byte	(.L1004 - .Lrtx1002) / 4
+	.byte	(.L997 - .Lrtx1002) / 4
 	.section	.text.queue_lun_state
-.L994:
+.L1001:
 	cmp	w0, 2
-	beq	.L992
+	beq	.L999
 	ret
-.L996:
+.L1003:
 	cmp	w0, 6
 	ccmp	w0, 8, 4, ne
-	beq	.L992
+	beq	.L999
 	ret
-.L997:
+.L1004:
 	cmp	w0, 10
-	bne	.L990
-.L992:
+	bne	.L997
+.L999:
 	lsl	x2, x2, 6
 	ldrb	w2, [x12, x2]
 	cmp	w2, 255
-	bne	.L998
-.L999:
+	bne	.L1005
+.L1006:
 	mov	w0, 0
-.L990:
+.L997:
 	ret
 	.size	queue_lun_state, .-queue_lun_state
 	.section	.text.queue_remove_completed_req,"ax",@progbits
@@ -5780,10 +5839,10 @@ queue_lun_state:
 	.global	queue_remove_completed_req
 	.type	queue_remove_completed_req, %function
 queue_remove_completed_req:
-	adrp	x6, .LANCHOR117
-	ldrb	w2, [x6, #:lo12:.LANCHOR117]
+	adrp	x6, .LANCHOR120
+	ldrb	w2, [x6, #:lo12:.LANCHOR120]
 	cmp	w2, 255
-	beq	.L1001
+	beq	.L1008
 	adrp	x0, .LANCHOR46
 	lsl	x4, x2, 6
 	add	x5, x0, :lo12:.LANCHOR46
@@ -5793,55 +5852,55 @@ queue_remove_completed_req:
 	and	w1, w1, 255
 	cmp	w1, 1
 	mov	x1, x0
-	bhi	.L1001
+	bhi	.L1008
 	ldrb	w0, [x5, x4]
-	strb	w0, [x6, #:lo12:.LANCHOR117]
+	strb	w0, [x6, #:lo12:.LANCHOR120]
 	mov	w0, -1
 	strb	w0, [x5, x4]
 	ldrb	w0, [x3, 59]
 	cmp	w0, 1
-	bne	.L1003
+	bne	.L1010
 	ldrh	w0, [x3, 50]
-	cbnz	w0, .L1004
-	adrp	x0, .LANCHOR115
-	ldrb	w3, [x0, #:lo12:.LANCHOR115]
-	add	x0, x0, :lo12:.LANCHOR115
-.L1005:
+	cbnz	w0, .L1011
+	adrp	x0, .LANCHOR118
+	ldrb	w3, [x0, #:lo12:.LANCHOR118]
+	add	x0, x0, :lo12:.LANCHOR118
+.L1012:
 	cmp	w3, 255
-	bne	.L1009
+	bne	.L1016
 	add	x1, x1, :lo12:.LANCHOR46
 	add	x1, x1, x2, lsl 6
 	ldrb	w1, [x1, 1]
 	strb	w1, [x0]
 	ret
-.L1004:
+.L1011:
 	adrp	x0, .LANCHOR65
 	ldrb	w3, [x0, #:lo12:.LANCHOR65]
 	add	x0, x0, :lo12:.LANCHOR65
-	b	.L1005
-.L1003:
-	cbnz	w0, .L1001
+	b	.L1012
+.L1010:
+	cbnz	w0, .L1008
 	ldr	w0, [x3, 36]
 	cmn	w0, #1
-	beq	.L1001
+	beq	.L1008
 	adrp	x0, .LANCHOR58
 	ldrb	w3, [x0, #:lo12:.LANCHOR58]
 	add	x0, x0, :lo12:.LANCHOR58
-	b	.L1005
-.L1009:
-	add	x0, x1, :lo12:.LANCHOR46
+	b	.L1012
 .L1016:
+	add	x0, x1, :lo12:.LANCHOR46
+.L1023:
 	mov	w1, w3
 	sbfiz	x3, x3, 6, 32
 	ldrb	w3, [x0, x3]
 	cmp	w3, 255
-	bne	.L1016
+	bne	.L1023
 	add	x2, x0, x2, lsl 6
 	sbfiz	x1, x1, 6, 32
 	ldrb	w2, [x2, 1]
 	strb	w2, [x0, x1]
 	ret
-.L1001:
+.L1008:
 	ret
 	.size	queue_remove_completed_req, .-queue_remove_completed_req
 	.section	.text.pm_alloc_new_blk,"ax",@progbits
@@ -5853,9 +5912,9 @@ pm_alloc_new_blk:
 	adrp	x2, .LANCHOR72
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR101
+	adrp	x20, .LANCHOR97
 	stp	x21, x22, [sp, 32]
-	ldr	x1, [x20, #:lo12:.LANCHOR101]
+	ldr	x1, [x20, #:lo12:.LANCHOR97]
 	ldrb	w2, [x2, #:lo12:.LANCHOR72]
 	ldrh	w0, [x1, 690]
 	str	x23, [sp, 48]
@@ -5863,29 +5922,29 @@ pm_alloc_new_blk:
 	and	w0, w0, 65535
 	strh	w0, [x1, 690]
 	cmp	w2, w0
-	bls	.L1018
+	bls	.L1025
 	add	x0, x1, x0, sxtw 1
 	ldrh	w1, [x0, 672]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1019
-.L1018:
+	bne	.L1026
+.L1025:
 	adrp	x19, .LC64
 	add	x19, x19, :lo12:.LC64
 	adrp	x23, .LANCHOR3
-.L1031:
+.L1038:
 	mov	w0, 1
 	bl	ftl_alloc_sblk
 	mov	w1, 0
 	and	w21, w0, 65535
 	bl	ftl_erase_sblk
-	add	x14, x20, :lo12:.LANCHOR101
-	ldr	x1, [x20, #:lo12:.LANCHOR101]
+	add	x14, x20, :lo12:.LANCHOR97
+	ldr	x1, [x20, #:lo12:.LANCHOR97]
 	mov	w0, w21
 	add	x1, x1, 672
 	bl	ftl_get_blk_list_in_sblk
 	tst	w0, 65535
-	bne	.L1020
+	bne	.L1027
 	mov	w1, w21
 	mov	x0, x19
 	bl	printf
@@ -5894,56 +5953,56 @@ pm_alloc_new_blk:
 	ldrb	w0, [x1, 2]
 	orr	w0, w0, -32
 	strb	w0, [x1, 2]
-	b	.L1031
-.L1020:
+	b	.L1038
+.L1027:
 	ldr	x0, [x14]
-	adrp	x1, .LANCHOR118
+	adrp	x1, .LANCHOR121
 	mov	w2, 1
 	mov	w19, 0
 	add	x0, x0, 416
-	str	w2, [x1, #:lo12:.LANCHOR118]
+	str	w2, [x1, #:lo12:.LANCHOR121]
 	mov	w1, 65535
 	strh	wzr, [x0, 274]
-.L1022:
+.L1029:
 	ldrh	w2, [x0]
 	cmp	w2, w1
-	beq	.L1021
+	beq	.L1028
 	add	w19, w19, 1
 	add	x0, x0, 2
 	and	w19, w19, 65535
 	cmp	w19, 128
-	bne	.L1022
-	adrp	x1, .LANCHOR119
+	bne	.L1029
+	adrp	x1, .LANCHOR122
 	adrp	x0, .LC0
 	mov	w2, 192
-	add	x1, x1, :lo12:.LANCHOR119
+	add	x1, x1, :lo12:.LANCHOR122
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1021:
-	ldr	x0, [x20, #:lo12:.LANCHOR101]
+.L1028:
+	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	add	x19, x0, x19, sxtw 1
 	ldrh	w1, [x0, 688]
 	strh	w21, [x19, 416]
 	add	w1, w1, 1
 	strh	w1, [x0, 688]
-.L1019:
-	ldr	x1, [x20, #:lo12:.LANCHOR101]
+.L1026:
+	ldr	x1, [x20, #:lo12:.LANCHOR97]
 	ldrh	w0, [x1, 690]
 	add	x0, x0, 336
 	ldrh	w19, [x1, x0, lsl 1]
 	mov	w0, 65533
 	sub	w1, w19, #1
 	cmp	w0, w1, uxth
-	bcs	.L1024
-	adrp	x1, .LANCHOR119
+	bcs	.L1031
+	adrp	x1, .LANCHOR122
 	adrp	x0, .LC0
 	mov	w2, 197
-	add	x1, x1, :lo12:.LANCHOR119
+	add	x1, x1, :lo12:.LANCHOR122
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1024:
+.L1031:
 	adrp	x1, .LANCHOR96
-	ldr	x0, [x20, #:lo12:.LANCHOR101]
+	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	mov	w2, 21
 	ldrh	w1, [x1, #:lo12:.LANCHOR96]
 	sub	w2, w2, w1
@@ -5953,7 +6012,7 @@ pm_alloc_new_blk:
 	strh	w4, [x0, 694]
 	adrp	x0, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L1027
+	tbz	x0, 12, .L1034
 	mov	w0, 1
 	and	w4, w4, 65535
 	lsl	w2, w0, w2
@@ -5963,7 +6022,7 @@ pm_alloc_new_blk:
 	mov	w1, w19
 	add	x0, x0, :lo12:.LC65
 	bl	printf
-.L1027:
+.L1034:
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -5977,68 +6036,68 @@ pm_alloc_new_blk:
 	.type	pm_select_ram_region, %function
 pm_select_ram_region:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR120
-	add	x0, x0, :lo12:.LANCHOR120
+	adrp	x0, .LANCHOR123
+	add	x0, x0, :lo12:.LANCHOR123
 	mov	x1, 0
 	add	x29, sp, 0
 	mov	w2, 65535
 	str	x19, [sp, 16]
-.L1036:
+.L1043:
 	lsl	x3, x1, 4
 	and	w19, w1, 65535
 	ldrh	w3, [x3, x0]
 	cmp	w3, w2
-	beq	.L1035
+	beq	.L1042
 	add	x1, x1, 1
 	cmp	x1, 32
-	bne	.L1036
+	bne	.L1043
 	add	x0, x0, 2
 	mov	w19, w1
 	mov	x2, x0
 	mov	w4, 32768
 	mov	w1, 0
-.L1038:
+.L1045:
 	ldrh	w3, [x2]
-	tbnz	x3, 15, .L1037
+	tbnz	x3, 15, .L1044
 	cmp	w3, w4
-	bcs	.L1037
+	bcs	.L1044
 	mov	w4, w3
 	mov	w19, w1
-.L1037:
+.L1044:
 	add	w1, w1, 1
 	add	x2, x2, 16
 	and	w1, w1, 65535
 	cmp	w1, 32
-	bne	.L1038
+	bne	.L1045
 	cmp	w19, 32
-	bne	.L1035
-	adrp	x1, .LANCHOR121
+	bne	.L1042
+	adrp	x1, .LANCHOR124
 	mov	w2, -1
-	ldrb	w3, [x1, #:lo12:.LANCHOR121]
+	ldrb	w3, [x1, #:lo12:.LANCHOR124]
 	mov	w1, 0
-.L1040:
+.L1047:
 	ldrh	w5, [x0]
 	cmp	w5, w2
-	bcs	.L1039
+	bcs	.L1046
 	ldrh	w4, [x0, -2]
 	cmp	w4, w3
 	csel	w2, w2, w5, eq
 	csel	w19, w19, w1, eq
-.L1039:
+.L1046:
 	add	w1, w1, 1
 	add	x0, x0, 16
 	and	w1, w1, 65535
 	cmp	w1, 32
-	bne	.L1040
+	bne	.L1047
 	cmp	w19, 32
-	bne	.L1035
-	adrp	x1, .LANCHOR122
+	bne	.L1042
+	adrp	x1, .LANCHOR125
 	adrp	x0, .LC0
 	mov	w2, 295
-	add	x1, x1, :lo12:.LANCHOR122
+	add	x1, x1, :lo12:.LANCHOR125
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1035:
+.L1042:
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -6061,59 +6120,59 @@ flash_lsb_page_tbl_build:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR27
-	cbnz	w0, .L1047
+	cbnz	w0, .L1054
 	add	x1, x19, :lo12:.LANCHOR27
 	mov	x0, 0
-.L1048:
+.L1055:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 256
-	bne	.L1048
-.L1054:
-	adrp	x20, .LANCHOR123
-	add	x20, x20, :lo12:.LANCHOR123
+	bne	.L1055
+.L1061:
+	adrp	x20, .LANCHOR126
+	add	x20, x20, :lo12:.LANCHOR126
 	mov	w2, 1024
 	mov	w1, 255
 	mov	x0, x20
 	add	x19, x19, :lo12:.LANCHOR27
 	bl	ftl_memset
 	mov	x0, 0
-.L1049:
+.L1056:
 	ldrh	w1, [x0, x19]
 	add	x0, x0, 2
 	cmp	x0, 512
 	strh	w1, [x20, w1, sxtw 1]
-	bne	.L1049
+	bne	.L1056
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1047:
+.L1054:
 	cmp	w0, 1
-	bne	.L1050
+	bne	.L1057
 	add	x3, x19, :lo12:.LANCHOR27
 	mov	x1, 0
-.L1053:
+.L1060:
 	and	w0, w1, 65535
 	cmp	x1, 3
-	bls	.L1051
+	bls	.L1058
 	ubfiz	w2, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 2
 	sub	w0, w2, w0
 	and	w0, w0, 65535
-.L1051:
+.L1058:
 	strh	w0, [x3, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L1053
-	b	.L1054
-.L1050:
+	bne	.L1060
+	b	.L1061
+.L1057:
 	cmp	w0, 2
-	bne	.L1055
+	bne	.L1062
 	add	x3, x19, :lo12:.LANCHOR27
 	mov	w1, 65535
 	mov	x0, 0
-.L1057:
+.L1064:
 	cmp	x0, 2
 	and	w2, w0, 65535
 	csel	w2, w2, w1, cc
@@ -6122,31 +6181,31 @@ flash_lsb_page_tbl_build:
 	add	x0, x0, 1
 	and	w1, w1, 65535
 	cmp	x0, 256
-	bne	.L1057
-	b	.L1054
-.L1055:
+	bne	.L1064
+	b	.L1061
+.L1062:
 	cmp	w0, 3
-	bne	.L1058
+	bne	.L1065
 	add	x3, x19, :lo12:.LANCHOR27
 	mov	x1, 0
-.L1061:
+.L1068:
 	and	w0, w1, 65535
 	cmp	x1, 5
-	bls	.L1059
+	bls	.L1066
 	ubfiz	w2, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 4
 	sub	w0, w2, w0
 	and	w0, w0, 65535
-.L1059:
+.L1066:
 	strh	w0, [x3, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L1061
-	b	.L1054
-.L1058:
+	bne	.L1068
+	b	.L1061
+.L1065:
 	cmp	w0, 4
-	bne	.L1062
+	bne	.L1069
 	add	x1, x19, :lo12:.LANCHOR27
 	mov	w2, 1
 	add	x1, x1, 16
@@ -6164,7 +6223,7 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1, -10]
 	strh	w0, [x1, -2]
 	mov	w0, 8
-.L1064:
+.L1071:
 	and	w3, w0, 1
 	ubfiz	w2, w0, 1, 15
 	add	w3, w3, 6
@@ -6173,37 +6232,37 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1], 2
 	and	w0, w0, 65535
 	cmp	w0, 256
-	bne	.L1064
-	b	.L1054
-.L1062:
+	bne	.L1071
+	b	.L1061
+.L1069:
 	cmp	w0, 5
-	bne	.L1065
+	bne	.L1072
 	add	x1, x19, :lo12:.LANCHOR27
 	mov	x0, 0
-.L1066:
+.L1073:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 16
-	bne	.L1066
+	bne	.L1073
 	add	x1, x1, 32
-.L1067:
+.L1074:
 	strh	w0, [x1], 2
 	add	w0, w0, 2
 	and	w0, w0, 65535
 	cmp	w0, 496
-	bne	.L1067
-	b	.L1054
-.L1065:
+	bne	.L1074
+	b	.L1061
+.L1072:
 	cmp	w0, 8
-	bne	.L1054
+	bne	.L1061
 	add	x1, x19, :lo12:.LANCHOR27
 	mov	x0, 0
-.L1068:
+.L1075:
 	strh	w0, [x0, x1]
 	add	x0, x0, 2
 	cmp	x0, 512
-	bne	.L1068
-	b	.L1054
+	bne	.L1075
+	b	.L1061
 	.size	flash_lsb_page_tbl_build, .-flash_lsb_page_tbl_build
 	.section	.text.flash_die_info_init,"ax",@progbits
 	.align	2
@@ -6218,13 +6277,13 @@ flash_die_info_init:
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	tbz	x0, 12, .L1084
-	adrp	x1, .LANCHOR124
+	tbz	x0, 12, .L1091
+	adrp	x1, .LANCHOR127
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR124
+	add	x1, x1, :lo12:.LANCHOR127
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1084:
+.L1091:
 	adrp	x23, .LANCHOR32
 	add	x19, x23, :lo12:.LANCHOR32
 	adrp	x25, .LANCHOR26
@@ -6234,15 +6293,15 @@ flash_die_info_init:
 	ldrh	w0, [x19, 26]
 	mov	w2, 8
 	ldrb	w1, [x19, 12]
-	adrp	x24, .LANCHOR126
+	adrp	x24, .LANCHOR129
 	strh	w0, [x25, #:lo12:.LANCHOR26]
-	add	x20, x24, :lo12:.LANCHOR126
+	add	x20, x24, :lo12:.LANCHOR129
 	ldrh	w0, [x19, 10]
 	add	x19, x19, 1
 	strb	wzr, [x26, #:lo12:.LANCHOR12]
 	sdiv	w0, w0, w1
-	adrp	x1, .LANCHOR125
-	strh	w0, [x1, #:lo12:.LANCHOR125]
+	adrp	x1, .LANCHOR128
+	strh	w0, [x1, #:lo12:.LANCHOR128]
 	mov	w1, 0
 	mov	x0, x21
 	bl	ftl_memset
@@ -6256,26 +6315,26 @@ flash_die_info_init:
 	add	x11, x26, :lo12:.LANCHOR12
 	add	x23, x14, :lo12:.LANCHOR38
 	mov	x8, 0
-.L1086:
+.L1093:
 	mov	w2, w13
 	add	x1, x23, x8, lsl 3
 	mov	x0, x19
 	bl	flash_mem_cmp8
-	cbnz	w0, .L1085
+	cbnz	w0, .L1092
 	ldrb	w1, [x11]
 	add	w0, w1, 1
 	strb	w0, [x11]
 	str	wzr, [x20, x1, lsl 2]
 	strb	w8, [x21, x1]
-.L1085:
+.L1092:
 	add	x8, x8, 1
 	cmp	x8, 4
-	bne	.L1086
+	bne	.L1093
 	add	x0, x7, :lo12:.LANCHOR32
 	ldrb	w1, [x0, 8]
 	cmp	w1, 2
-	beq	.L1087
-.L1091:
+	beq	.L1094
+.L1098:
 	add	x7, x7, :lo12:.LANCHOR32
 	ldrb	w0, [x26, #:lo12:.LANCHOR12]
 	ldp	x19, x20, [sp, 16]
@@ -6287,17 +6346,17 @@ flash_die_info_init:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	mul	w0, w0, w1
-	adrp	x1, .LANCHOR127
-	strh	w0, [x1, #:lo12:.LANCHOR127]
+	adrp	x1, .LANCHOR130
+	strh	w0, [x1, #:lo12:.LANCHOR130]
 	ret
-.L1087:
+.L1094:
 	ldrh	w1, [x25, #:lo12:.LANCHOR26]
 	add	x14, x14, :lo12:.LANCHOR38
 	ldrb	w11, [x0, 13]
 	add	x8, x0, 1
 	ldrb	w20, [x0, 23]
 	add	x19, x26, :lo12:.LANCHOR12
-	add	x15, x24, :lo12:.LANCHOR126
+	add	x15, x24, :lo12:.LANCHOR129
 	add	x22, x22, :lo12:.LANCHOR24
 	mov	x12, 0
 	mul	w11, w11, w1
@@ -6305,12 +6364,12 @@ flash_die_info_init:
 	and	w1, w1, 65280
 	mul	w11, w11, w1
 	lsl	w21, w11, 1
-.L1090:
+.L1097:
 	mov	w2, w13
 	add	x1, x14, x12, lsl 3
 	mov	x0, x8
 	bl	flash_mem_cmp8
-	cbnz	w0, .L1088
+	cbnz	w0, .L1095
 	ldrb	w1, [x19]
 	cmp	w20, 0
 	csel	w2, w11, w21, eq
@@ -6318,11 +6377,11 @@ flash_die_info_init:
 	strb	w0, [x19]
 	str	w2, [x15, x1, lsl 2]
 	strb	w12, [x22, x1]
-.L1088:
+.L1095:
 	add	x12, x12, 1
 	cmp	x12, 4
-	bne	.L1090
-	b	.L1091
+	bne	.L1097
+	b	.L1098
 	.size	flash_die_info_init, .-flash_die_info_init
 	.section	.text.lpa_hash_init,"ax",@progbits
 	.align	2
@@ -6332,9 +6391,9 @@ lpa_hash_init:
 	stp	x29, x30, [sp, -16]!
 	mov	w2, 512
 	mov	w1, 255
-	adrp	x0, .LANCHOR105
+	adrp	x0, .LANCHOR108
 	add	x29, sp, 0
-	add	x0, x0, :lo12:.LANCHOR105
+	add	x0, x0, :lo12:.LANCHOR108
 	bl	ftl_memset
 	adrp	x0, .LANCHOR80
 	mov	w1, 255
@@ -6343,8 +6402,8 @@ lpa_hash_init:
 	adrp	x0, .LANCHOR72
 	ldrb	w0, [x0, #:lo12:.LANCHOR72]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR107
-	ldr	x0, [x0, #:lo12:.LANCHOR107]
+	adrp	x0, .LANCHOR110
+	ldr	x0, [x0, #:lo12:.LANCHOR110]
 	lsl	w2, w2, 2
 	b	ftl_memset
 	.size	lpa_hash_init, .-lpa_hash_init
@@ -6359,59 +6418,59 @@ lpa_rebuild_hash:
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	tbz	x0, 12, .L1104
-	adrp	x1, .LANCHOR128
+	tbz	x0, 12, .L1111
+	adrp	x1, .LANCHOR131
 	adrp	x0, .LC66
 	mov	w3, 0
 	mov	w2, 218
-	add	x1, x1, :lo12:.LANCHOR128
+	add	x1, x1, :lo12:.LANCHOR131
 	add	x0, x0, :lo12:.LC66
 	bl	printf
-.L1104:
+.L1111:
 	adrp	x20, .LANCHOR80
 	adrp	x22, .LANCHOR72
-	adrp	x19, .LANCHOR105
-	add	x19, x19, :lo12:.LANCHOR105
+	adrp	x19, .LANCHOR108
+	add	x19, x19, :lo12:.LANCHOR108
 	mov	w2, 512
 	mov	w1, 255
 	mov	x0, x19
 	bl	ftl_memset
 	ldrh	w2, [x20, #:lo12:.LANCHOR80]
-	adrp	x21, .LANCHOR107
+	adrp	x21, .LANCHOR110
 	ldrb	w0, [x22, #:lo12:.LANCHOR72]
 	mov	w1, 255
 	add	x20, x20, :lo12:.LANCHOR80
 	mul	w2, w2, w0
-	ldr	x0, [x21, #:lo12:.LANCHOR107]
+	ldr	x0, [x21, #:lo12:.LANCHOR110]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	adrp	x0, .LANCHOR106
+	adrp	x0, .LANCHOR109
 	ldrb	w3, [x22, #:lo12:.LANCHOR72]
-	ldr	x5, [x21, #:lo12:.LANCHOR107]
+	ldr	x5, [x21, #:lo12:.LANCHOR110]
 	mov	w1, 0
-	ldr	x4, [x0, #:lo12:.LANCHOR106]
-.L1105:
+	ldr	x4, [x0, #:lo12:.LANCHOR109]
+.L1112:
 	ldrh	w0, [x20]
 	mul	w0, w0, w3
 	cmp	w1, w0, lsl 1
-	blt	.L1107
+	blt	.L1114
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1107:
+.L1114:
 	uxtw	x2, w1
 	ldr	w0, [x4, x2, lsl 2]
 	cmn	w0, #1
-	beq	.L1106
+	beq	.L1113
 	and	x0, x0, 255
 	ldrh	w6, [x19, x0, lsl 1]
 	strh	w1, [x19, x0, lsl 1]
 	strh	w6, [x5, x2, lsl 1]
-.L1106:
+.L1113:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L1105
+	b	.L1112
 	.size	lpa_rebuild_hash, .-lpa_rebuild_hash
 	.section	.text.zftl_read_flash_info,"ax",@progbits
 	.align	2
@@ -6463,20 +6522,20 @@ zftl_read_flash_info:
 	strb	w0, [x19, 9]
 	adrp	x0, .LANCHOR12
 	ldrb	w3, [x0, #:lo12:.LANCHOR12]
-.L1116:
+.L1123:
 	cmp	w3, w1, uxtb
-	bhi	.L1117
+	bhi	.L1124
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1117:
+.L1124:
 	ldrb	w0, [x1, x2]
 	add	x1, x1, 1
 	ldrb	w5, [x19, 10]
 	lsl	w0, w4, w0
 	orr	w0, w0, w5
 	strb	w0, [x19, 10]
-	b	.L1116
+	b	.L1123
 	.size	zftl_read_flash_info, .-zftl_read_flash_info
 	.section	.text.gc_static_wearleveling,"ax",@progbits
 	.align	2
@@ -6487,20 +6546,20 @@ gc_static_wearleveling:
 	mov	w1, 10240
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR101
+	adrp	x22, .LANCHOR97
 	stp	x19, x20, [sp, 16]
-	ldr	x5, [x22, #:lo12:.LANCHOR101]
+	ldr	x5, [x22, #:lo12:.LANCHOR97]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	ldr	w0, [x5, 32]
 	cmp	w0, w1
-	bls	.L1120
+	bls	.L1127
 	ldr	w1, [x5, 36]
 	add	w1, w1, w0, lsr 10
 	and	w0, w0, 1023
 	stp	w0, w1, [x5, 32]
-.L1120:
+.L1127:
 	adrp	x25, .LANCHOR5
 	ldr	w3, [x5, 36]
 	ldr	x0, [x25, #:lo12:.LANCHOR5]
@@ -6509,12 +6568,12 @@ gc_static_wearleveling:
 	add	w1, w1, 860160
 	add	w1, w1, 3840
 	cmp	w2, w1
-	bhi	.L1121
+	bhi	.L1128
 	ldr	w1, [x0, 572]
 	add	w1, w1, 32
 	cmp	w3, w1
-	bls	.L1119
-.L1121:
+	bls	.L1126
+.L1128:
 	adrp	x21, .LANCHOR3
 	ldrh	w10, [x5, 134]
 	adrp	x23, .LANCHOR2
@@ -6532,46 +6591,46 @@ gc_static_wearleveling:
 	mov	w26, 0
 	mov	w3, 0
 	mov	w2, 0
-.L1123:
+.L1130:
 	cmp	w10, w11
-	bcc	.L1127
+	bcc	.L1134
 	ldrh	w0, [x5, 96]
 	cmp	w0, w20
-	bcs	.L1128
+	bcs	.L1135
 	strh	w20, [x5, 96]
-.L1128:
+.L1135:
 	ldrh	w0, [x5, 98]
 	cmp	w0, w26
-	bcs	.L1129
+	bcs	.L1136
 	strh	w26, [x5, 98]
-.L1129:
+.L1136:
 	udiv	w3, w3, w1
 	adrp	x24, .LANCHOR7
 	udiv	w4, w4, w2
 	ldr	w0, [x24, #:lo12:.LANCHOR7]
 	strh	w3, [x5, 88]
 	strh	w4, [x5, 90]
-	tbz	x0, 10, .L1130
+	tbz	x0, 10, .L1137
 	adrp	x0, .LC67
 	and	w4, w4, 65535
 	and	w3, w3, 65535
 	add	x0, x0, :lo12:.LC67
 	bl	printf
-.L1130:
+.L1137:
 	ldr	w0, [x24, #:lo12:.LANCHOR7]
-	adrp	x28, .LANCHOR129
-	tbz	x0, 10, .L1131
-	adrp	x0, .LANCHOR130
-	ldrh	w6, [x28, #:lo12:.LANCHOR129]
+	adrp	x28, .LANCHOR132
+	tbz	x0, 10, .L1138
+	adrp	x0, .LANCHOR133
+	ldrh	w6, [x28, #:lo12:.LANCHOR132]
 	mov	w4, w26
 	mov	w3, w20
-	ldrh	w5, [x0, #:lo12:.LANCHOR130]
+	ldrh	w5, [x0, #:lo12:.LANCHOR133]
 	mov	w2, w19
 	adrp	x0, .LC68
 	mov	w1, w27
 	add	x0, x0, :lo12:.LC68
 	bl	printf
-.L1131:
+.L1138:
 	ldr	x0, [x25, #:lo12:.LANCHOR5]
 	mov	w1, 255
 	mov	w2, 128
@@ -6580,36 +6639,36 @@ gc_static_wearleveling:
 	bl	ftl_memset
 	sub	w0, w26, w19
 	str	w0, [x29, 148]
-	ldrh	w0, [x28, #:lo12:.LANCHOR129]
+	ldrh	w0, [x28, #:lo12:.LANCHOR132]
 	ldr	w1, [x29, 148]
 	cmp	w1, w0
-	bgt	.L1132
-	adrp	x1, .LANCHOR130
+	bgt	.L1139
+	adrp	x1, .LANCHOR133
 	sub	w0, w20, w27
-	ldrh	w1, [x1, #:lo12:.LANCHOR130]
+	ldrh	w1, [x1, #:lo12:.LANCHOR133]
 	cmp	w0, w1
-	bgt	.L1132
-.L1139:
-	cbnz	w19, .L1133
-.L1141:
-	cbz	w27, .L1119
-	ldr	x2, [x22, #:lo12:.LANCHOR101]
+	bgt	.L1139
+.L1146:
+	cbnz	w19, .L1140
+.L1148:
+	cbz	w27, .L1126
+	ldr	x2, [x22, #:lo12:.LANCHOR97]
 	ldr	x1, [x21, #:lo12:.LANCHOR3]
 	ldrh	w5, [x23, #:lo12:.LANCHOR2]
 	ldrh	w0, [x2, 134]
 	add	x1, x1, x0, uxth 2
-.L1146:
+.L1153:
 	cmp	w0, w5
-	bcc	.L1148
+	bcc	.L1155
 	ldrh	w0, [x2, 74]
 	add	w0, w27, w0
 	strh	w0, [x2, 74]
 	ldrh	w0, [x2, 96]
 	cmp	w27, w0
-	bcs	.L1119
+	bcs	.L1126
 	sub	w7, w0, w27
 	strh	w7, [x2, 96]
-.L1119:
+.L1126:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -6617,14 +6676,14 @@ gc_static_wearleveling:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L1127:
+.L1134:
 	ldrb	w0, [x8, 2]
-	tbz	x0, 3, .L1124
+	tbz	x0, 3, .L1131
 	ldr	w0, [x8]
 	ldrh	w6, [x8]
 	ubfx	x0, x0, 11, 8
 	and	w6, w6, 2047
-.L1125:
+.L1132:
 	cmp	w6, w27
 	add	w1, w1, 1
 	csel	w7, w6, w27, cc
@@ -6635,19 +6694,19 @@ gc_static_wearleveling:
 	and	w27, w7, 65535
 	and	w20, w20, 65535
 	cmp	w0, w12
-	bne	.L1149
-	b	.L1150
-.L1124:
+	bne	.L1156
+	b	.L1157
+.L1131:
 	tst	w0, 24
-	bne	.L1126
+	bne	.L1133
 	ldrh	w6, [x8]
 	mov	w0, 65535
 	and	w6, w6, 2047
-	b	.L1125
-.L1126:
+	b	.L1132
+.L1133:
 	ldr	w0, [x8]
 	ubfx	x0, x0, 11, 8
-.L1149:
+.L1156:
 	cmp	w0, w19
 	add	w2, w2, 1
 	csel	w19, w0, w19, cc
@@ -6657,48 +6716,48 @@ gc_static_wearleveling:
 	and	w2, w2, 65535
 	and	w19, w19, 65535
 	and	w26, w0, 65535
-.L1150:
+.L1157:
 	add	w10, w10, 1
 	add	x8, x8, 4
 	and	w10, w10, 65535
-	b	.L1123
-.L1132:
-	ldr	x0, [x22, #:lo12:.LANCHOR101]
+	b	.L1130
+.L1139:
+	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	adrp	x25, .LANCHOR63
 	stp	wzr, wzr, [x29, 152]
 	ldrh	w26, [x0, 134]
 	add	x0, x23, :lo12:.LANCHOR2
 	str	x0, [x29, 128]
-	adrp	x0, .LANCHOR130
-	add	x0, x0, :lo12:.LANCHOR130
+	adrp	x0, .LANCHOR133
+	add	x0, x0, :lo12:.LANCHOR133
 	str	x0, [x29, 120]
 	add	x0, x25, :lo12:.LANCHOR63
 	str	x0, [x29, 136]
-.L1135:
+.L1142:
 	ldr	x0, [x29, 128]
 	ldrh	w0, [x0]
 	cmp	w0, w26
-	bls	.L1139
+	bls	.L1146
 	uxtw	x25, w26
 	ldr	x4, [x21, #:lo12:.LANCHOR3]
 	lsl	x3, x25, 2
 	add	x0, x4, x3
 	ldrb	w0, [x0, 2]
 	tst	w0, 192
-	beq	.L1136
+	beq	.L1143
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L1136
-	tbz	x0, 4, .L1137
-	ldrh	w0, [x28, #:lo12:.LANCHOR129]
+	beq	.L1143
+	tbz	x0, 4, .L1144
+	ldrh	w0, [x28, #:lo12:.LANCHOR132]
 	ldr	w1, [x29, 148]
 	cmp	w1, w0
-	ble	.L1138
+	ble	.L1145
 	ldr	w0, [x4, x3]
 	add	w1, w19, 1
 	ubfx	x0, x0, 11, 8
 	cmp	w0, w1
-	bgt	.L1138
+	bgt	.L1145
 	stp	x4, x3, [x29, 104]
 	mov	w2, 1
 	mov	w1, 0
@@ -6709,7 +6768,7 @@ gc_static_wearleveling:
 	add	w0, w0, 1
 	str	w0, [x29, 156]
 	ldr	w0, [x24, #:lo12:.LANCHOR7]
-	tbz	x0, 10, .L1138
+	tbz	x0, 10, .L1145
 	adrp	x0, .LANCHOR4
 	ldr	w6, [x4, x3]
 	ldrh	w5, [x4, x3]
@@ -6726,29 +6785,29 @@ gc_static_wearleveling:
 	add	x0, x0, :lo12:.LC69
 	ubfx	x2, x2, 5, 3
 	mov	w1, w26
-.L1173:
+.L1180:
 	bl	printf
-.L1138:
+.L1145:
 	ldr	w0, [x29, 156]
 	cmp	w0, 4
 	ldr	w0, [x29, 152]
 	ccmp	w0, 4, 2, ls
-	bhi	.L1139
-.L1136:
+	bhi	.L1146
+.L1143:
 	add	w8, w26, 1
 	and	w26, w8, 65535
-	b	.L1135
-.L1137:
+	b	.L1142
+.L1144:
 	ldr	x1, [x29, 120]
 	sub	w0, w20, w27
 	ldrh	w1, [x1]
 	cmp	w0, w1
-	ble	.L1138
+	ble	.L1145
 	ldrh	w0, [x4, x3]
 	add	w1, w27, 1
 	and	w0, w0, 2047
 	cmp	w0, w1
-	bgt	.L1138
+	bgt	.L1145
 	stp	x4, x3, [x29, 104]
 	mov	w2, 1
 	mov	w1, 0
@@ -6759,7 +6818,7 @@ gc_static_wearleveling:
 	add	w0, w0, 1
 	str	w0, [x29, 152]
 	ldr	w0, [x24, #:lo12:.LANCHOR7]
-	tbz	x0, 10, .L1138
+	tbz	x0, 10, .L1145
 	adrp	x0, .LANCHOR4
 	ldr	w6, [x4, x3]
 	ldrh	w5, [x4, x3]
@@ -6776,51 +6835,51 @@ gc_static_wearleveling:
 	add	x0, x0, :lo12:.LC70
 	ubfx	x2, x2, 5, 3
 	mov	w1, w26
-	b	.L1173
-.L1133:
-	ldr	x2, [x22, #:lo12:.LANCHOR101]
+	b	.L1180
+.L1140:
+	ldr	x2, [x22, #:lo12:.LANCHOR97]
 	ldr	x1, [x21, #:lo12:.LANCHOR3]
 	ldrh	w5, [x23, #:lo12:.LANCHOR2]
 	ldrh	w0, [x2, 134]
 	add	x1, x1, x0, uxth 2
-.L1142:
+.L1149:
 	cmp	w0, w5
-	bcc	.L1144
+	bcc	.L1151
 	ldrh	w0, [x2, 72]
 	add	w0, w19, w0
 	strh	w0, [x2, 72]
 	ldrh	w0, [x2, 98]
 	cmp	w19, w0
-	bcs	.L1141
+	bcs	.L1148
 	sub	w19, w0, w19
 	strh	w19, [x2, 98]
-	b	.L1141
-.L1144:
+	b	.L1148
+.L1151:
 	ldr	w3, [x1]
 	ubfx	x4, x3, 11, 8
 	cmp	w19, w4
-	bhi	.L1143
+	bhi	.L1150
 	sub	w4, w4, w19
 	bfi	w3, w4, 11, 8
 	str	w3, [x1]
-.L1143:
+.L1150:
 	add	w0, w0, 1
 	add	x1, x1, 4
 	and	w0, w0, 65535
-	b	.L1142
-.L1148:
+	b	.L1149
+.L1155:
 	ldrh	w3, [x1]
 	and	w4, w3, 2047
 	cmp	w4, w27
-	blt	.L1147
+	blt	.L1154
 	sub	w4, w4, w27
 	bfi	w3, w4, 0, 11
 	strh	w3, [x1]
-.L1147:
+.L1154:
 	add	w0, w0, 1
 	add	x1, x1, 4
 	and	w0, w0, 65535
-	b	.L1146
+	b	.L1153
 	.size	gc_static_wearleveling, .-gc_static_wearleveling
 	.section	.text.zftl_sblk_list_init,"ax",@progbits
 	.align	2
@@ -6842,7 +6901,7 @@ zftl_sblk_list_init:
 	stp	x23, x24, [sp, 48]
 	adrp	x22, .LANCHOR93
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR101
+	adrp	x25, .LANCHOR97
 	mul	w2, w2, w0
 	ldr	x0, [x28, #:lo12:.LANCHOR0]
 	adrp	x24, .LANCHOR89
@@ -6875,7 +6934,7 @@ zftl_sblk_list_init:
 	strh	wzr, [x22, #:lo12:.LANCHOR93]
 	sxth	w0, w0
 	str	w0, [x29, 188]
-	ldr	x0, [x25, #:lo12:.LANCHOR101]
+	ldr	x0, [x25, #:lo12:.LANCHOR97]
 	strh	wzr, [x21, #:lo12:.LANCHOR84]
 	strh	wzr, [x20, #:lo12:.LANCHOR86]
 	strh	wzr, [x19, #:lo12:.LANCHOR82]
@@ -6889,12 +6948,12 @@ zftl_sblk_list_init:
 	stp	x6, x7, [x29, 136]
 	stp	x8, x10, [x29, 152]
 	str	x0, [x29, 176]
-.L1175:
+.L1182:
 	ldr	x0, [x29, 176]
 	ldrh	w0, [x0]
 	cmp	w26, w0
-	blt	.L1191
-	ldr	x0, [x25, #:lo12:.LANCHOR101]
+	blt	.L1198
+	ldr	x0, [x25, #:lo12:.LANCHOR97]
 	ldrh	w1, [x24, #:lo12:.LANCHOR89]
 	ldp	x25, x26, [sp, 64]
 	strh	w1, [x0, 114]
@@ -6914,27 +6973,27 @@ zftl_sblk_list_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L1191:
+.L1198:
 	ldr	x4, [x28, #:lo12:.LANCHOR3]
 	sxtw	x2, w26
 	add	x4, x4, x2, lsl 2
 	ldrb	w6, [x4, 3]
-	cbz	w6, .L1192
+	cbz	w6, .L1199
 	ldr	x0, [x29, 112]
 	mov	w1, 0
-	ldr	x7, [x25, #:lo12:.LANCHOR101]
+	ldr	x7, [x25, #:lo12:.LANCHOR97]
 	ldrb	w8, [x0, #:lo12:.LANCHOR72]
 	ldr	x0, [x29, 104]
 	ldrh	w10, [x0, #:lo12:.LANCHOR80]
 	mov	w0, 0
-.L1177:
+.L1184:
 	cmp	w1, w8
-	blt	.L1180
-	cbz	w0, .L1181
+	blt	.L1187
+	cbz	w0, .L1188
 	mov	w1, 32768
 	sdiv	w0, w1, w0
 	sxth	w0, w0
-.L1176:
+.L1183:
 	ldr	x3, [x29, 168]
 	mov	w1, 6
 	smull	x1, w26, w1
@@ -6949,44 +7008,44 @@ zftl_sblk_list_init:
 	and	w0, w1, 224
 	cmp	w0, 32
 	ccmp	w0, w5, 4, ne
-	beq	.L1182
+	beq	.L1189
 	adrp	x5, .LANCHOR5
 	ldr	x5, [x5, #:lo12:.LANCHOR5]
 	ldrh	w6, [x5, 16]
 	cmp	w26, w6
-	beq	.L1182
+	beq	.L1189
 	ldrh	w6, [x5, 48]
 	cmp	w26, w6
-	beq	.L1182
+	beq	.L1189
 	ldrh	w5, [x5, 80]
 	cmp	w26, w5
-	beq	.L1182
+	beq	.L1189
 	cmp	w0, 64
-	bne	.L1183
+	bne	.L1190
 	ldr	x0, [x29, 128]
 	add	x2, x21, :lo12:.LANCHOR84
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR75
-.L1195:
+.L1202:
 	bl	_insert_data_list
-.L1182:
+.L1189:
 	add	w3, w26, 1
 	sxth	w26, w3
-	b	.L1175
-.L1180:
+	b	.L1182
+.L1187:
 	asr	w5, w6, w1
-	tbnz	x5, 0, .L1178
+	tbnz	x5, 0, .L1185
 	add	w0, w10, w0
 	sxth	w0, w0
-.L1179:
+.L1186:
 	add	w1, w1, 1
-	b	.L1177
-.L1178:
+	b	.L1184
+.L1185:
 	ldrh	w5, [x7, 146]
 	add	w5, w5, 1
 	strh	w5, [x7, 146]
-	b	.L1179
-.L1181:
+	b	.L1186
+.L1188:
 	ldrb	w1, [x4, 2]
 	mov	w5, -1
 	orr	w1, w1, -32
@@ -6994,75 +7053,75 @@ zftl_sblk_list_init:
 	adrp	x1, .LANCHOR4
 	ldr	x1, [x1, #:lo12:.LANCHOR4]
 	strh	w5, [x1, x2, lsl 1]
-	b	.L1176
-.L1192:
+	b	.L1183
+.L1199:
 	ldr	w0, [x29, 188]
-	b	.L1176
-.L1183:
+	b	.L1183
+.L1190:
 	cmp	w0, 96
-	bne	.L1184
+	bne	.L1191
 	ldr	x0, [x29, 136]
 	add	x2, x19, :lo12:.LANCHOR82
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR76
-	b	.L1195
-.L1184:
+	b	.L1202
+.L1191:
 	cmp	w0, 160
-	bne	.L1185
+	bne	.L1192
 	ldr	x0, [x29, 120]
 	add	x2, x20, :lo12:.LANCHOR86
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR74
-	b	.L1195
-.L1185:
-	cbnz	w0, .L1182
+	b	.L1202
+.L1192:
+	cbnz	w0, .L1189
 	adrp	x0, .LANCHOR4
 	ldr	x0, [x0, #:lo12:.LANCHOR4]
 	ldrh	w2, [x0, x2, lsl 1]
-	cbz	w2, .L1186
+	cbz	w2, .L1193
 	str	x4, [x29, 96]
 	mov	w1, w26
 	mov	x0, x27
 	bl	printf
 	ldr	x4, [x29, 96]
 	ldrb	w0, [x4, 2]
-	tbz	x0, 4, .L1187
+	tbz	x0, 4, .L1194
 	mov	w1, 5
-.L1194:
+.L1201:
 	bfi	w0, w1, 5, 3
 	strb	w0, [x4, 2]
 	mov	w2, 0
 	mov	w1, 1
 	mov	w0, w26
 	bl	gc_add_sblk
-	b	.L1182
-.L1187:
+	b	.L1189
+.L1194:
 	mov	w1, 2
-	b	.L1194
-.L1186:
+	b	.L1201
+.L1193:
 	ands	w1, w1, 24
-	bne	.L1189
+	bne	.L1196
 	ldr	x0, [x29, 160]
 	add	x2, x24, :lo12:.LANCHOR89
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR90
-.L1196:
+.L1203:
 	bl	_insert_free_list
-	b	.L1182
-.L1189:
+	b	.L1189
+.L1196:
 	cmp	w1, 16
-	bne	.L1190
+	bne	.L1197
 	ldr	x0, [x29, 152]
 	add	x2, x23, :lo12:.LANCHOR91
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR92
-	b	.L1196
-.L1190:
+	b	.L1203
+.L1197:
 	ldr	x0, [x29, 144]
 	add	x2, x22, :lo12:.LANCHOR93
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR94
-	b	.L1196
+	b	.L1203
 	.size	zftl_sblk_list_init, .-zftl_sblk_list_init
 	.section	.text.ftl_open_sblk_init,"ax",@progbits
 	.align	2
@@ -7083,8 +7142,8 @@ ftl_open_sblk_init:
 	add	x20, x20, :lo12:.LANCHOR72
 	add	x21, x21, :lo12:.LC64
 	stp	x25, x26, [sp, 64]
-.L1198:
-.L1201:
+.L1205:
+.L1208:
 	mov	w0, w22
 	bl	ftl_alloc_sblk
 	mov	w1, 0
@@ -7104,18 +7163,18 @@ ftl_open_sblk_init:
 	strh	w0, [x19, 6]
 	strh	wzr, [x19, 10]
 	strb	w22, [x19, 4]
-	beq	.L1202
+	beq	.L1209
 	ldrb	w0, [x20]
 	mul	w0, w1, w0
 	and	w0, w0, 65535
-.L1199:
+.L1206:
 	ldrb	w2, [x20]
 	adrp	x26, .LANCHOR4
 	strh	w0, [x19, 12]
 	ubfiz	x25, x24, 1, 16
 	mul	w2, w2, w1
-	adrp	x1, .LANCHOR106
-	ldr	x3, [x1, #:lo12:.LANCHOR106]
+	adrp	x1, .LANCHOR109
+	ldr	x3, [x1, #:lo12:.LANCHOR109]
 	mov	w1, 255
 	lsl	w2, w2, 2
 	add	x0, x3, x0, uxth 2
@@ -7124,7 +7183,7 @@ ftl_open_sblk_init:
 	ldrh	w1, [x19, 6]
 	strh	w1, [x0, x25]
 	ldrb	w0, [x19, 9]
-	cbnz	w0, .L1197
+	cbnz	w0, .L1204
 	mov	w1, w24
 	mov	x0, x21
 	bl	printf
@@ -7133,11 +7192,11 @@ ftl_open_sblk_init:
 	strh	w1, [x0, x25]
 	mov	w0, 7
 	strb	w0, [x19, 4]
-	b	.L1201
-.L1202:
+	b	.L1208
+.L1209:
 	mov	w0, 0
-	b	.L1199
-.L1197:
+	b	.L1206
+.L1204:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -7153,34 +7212,34 @@ pm_free_sblk:
 	stp	x29, x30, [sp, -368]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR131
+	adrp	x20, .LANCHOR134
 	stp	x21, x22, [sp, 32]
-	ldrh	w0, [x20, #:lo12:.LANCHOR131]
+	ldrh	w0, [x20, #:lo12:.LANCHOR134]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w0, 128
 	stp	x27, x28, [sp, 80]
-	bls	.L1205
-	adrp	x1, .LANCHOR132
+	bls	.L1212
+	adrp	x1, .LANCHOR135
 	adrp	x0, .LC0
 	mov	w2, 76
-	add	x1, x1, :lo12:.LANCHOR132
+	add	x1, x1, :lo12:.LANCHOR135
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1205:
+.L1212:
 	add	x28, x29, 112
 	mov	w2, 256
 	mov	w1, 0
 	mov	x0, x28
 	bl	ftl_memset
 	adrp	x23, .LANCHOR95
-	adrp	x5, .LANCHOR101
+	adrp	x5, .LANCHOR97
 	adrp	x0, .LANCHOR96
 	mov	w2, 21
 	ldrb	w12, [x23, #:lo12:.LANCHOR95]
-	ldr	x7, [x5, #:lo12:.LANCHOR101]
+	ldr	x7, [x5, #:lo12:.LANCHOR97]
 	ldrh	w11, [x0, #:lo12:.LANCHOR96]
-	ldrh	w13, [x20, #:lo12:.LANCHOR131]
+	ldrh	w13, [x20, #:lo12:.LANCHOR134]
 	add	x4, x7, 704
 	sub	w0, w2, w11
 	mov	w2, 1
@@ -7189,15 +7248,15 @@ pm_free_sblk:
 	sub	w2, w2, #1
 	add	x1, x1, 176
 	add	x1, x7, x1, lsl 2
-.L1206:
+.L1213:
 	cmp	x4, x1
-	bne	.L1210
+	bne	.L1217
 	adrp	x24, .LANCHOR72
 	adrp	x25, .LANCHOR80
 	adrp	x26, .LANCHOR7
 	adrp	x27, .LC72
 	ldrb	w22, [x24, #:lo12:.LANCHOR72]
-	add	x20, x20, :lo12:.LANCHOR131
+	add	x20, x20, :lo12:.LANCHOR134
 	ldrh	w0, [x25, #:lo12:.LANCHOR80]
 	add	x26, x26, :lo12:.LANCHOR7
 	add	x27, x27, :lo12:.LC72
@@ -7205,10 +7264,10 @@ pm_free_sblk:
 	str	wzr, [x29, 108]
 	mul	w22, w22, w0
 	and	w22, w22, 65535
-.L1211:
+.L1218:
 	ldrh	w0, [x20]
 	cmp	w0, w19
-	bhi	.L1217
+	bhi	.L1224
 	ldr	w0, [x29, 108]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -7217,7 +7276,7 @@ pm_free_sblk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 368
 	ret
-.L1210:
+.L1217:
 	ldr	w0, [x4]
 	add	x8, x7, 416
 	mov	x3, 0
@@ -7225,24 +7284,24 @@ pm_free_sblk:
 	and	w0, w0, w2
 	udiv	w0, w0, w12
 	and	w0, w0, 65535
-.L1207:
+.L1214:
 	cmp	w13, w3, uxth
-	bhi	.L1209
+	bhi	.L1216
 	add	x4, x4, 4
-	b	.L1206
-.L1209:
+	b	.L1213
+.L1216:
 	ldrh	w10, [x8]
 	cmp	w10, w0
-	bne	.L1208
+	bne	.L1215
 	ldrh	w10, [x28, x3, lsl 1]
 	add	w10, w10, 1
 	strh	w10, [x28, x3, lsl 1]
-.L1208:
+.L1215:
 	add	x3, x3, 1
 	add	x8, x8, 2
-	b	.L1207
-.L1217:
-	ldr	x1, [x5, #:lo12:.LANCHOR101]
+	b	.L1214
+.L1224:
+	ldr	x1, [x5, #:lo12:.LANCHOR97]
 	sxtw	x21, w19
 	add	x0, x21, 208
 	ldrb	w2, [x23, #:lo12:.LANCHOR95]
@@ -7250,22 +7309,22 @@ pm_free_sblk:
 	ldrh	w0, [x1, 692]
 	sdiv	w0, w0, w2
 	cmp	w0, w3
-	bne	.L1212
+	bne	.L1219
 	ldrb	w0, [x24, #:lo12:.LANCHOR72]
 	ldrh	w2, [x25, #:lo12:.LANCHOR80]
 	mul	w0, w0, w2
 	strh	w0, [x28, x21, lsl 1]
-.L1212:
+.L1219:
 	ldrh	w0, [x28, x21, lsl 1]
 	cmp	w22, w0
-	bls	.L1213
-	cbnz	w0, .L1218
-.L1215:
+	bls	.L1220
+	cbnz	w0, .L1225
+.L1222:
 	mov	w0, 65535
 	cmp	w3, w0
-	beq	.L1214
+	beq	.L1221
 	ldr	w0, [x26]
-	tbz	x0, 12, .L1216
+	tbz	x0, 12, .L1223
 	ldrh	w4, [x1, 688]
 	mov	w2, 0
 	str	x5, [x29, 96]
@@ -7273,30 +7332,30 @@ pm_free_sblk:
 	mov	x0, x27
 	bl	printf
 	ldr	x5, [x29, 96]
-.L1216:
-	ldr	x0, [x5, #:lo12:.LANCHOR101]
+.L1223:
+	ldr	x0, [x5, #:lo12:.LANCHOR97]
 	add	x21, x21, 208
 	str	x5, [x29, 96]
 	ldrh	w0, [x0, x21, lsl 1]
 	bl	ftl_free_sblk
 	ldr	x5, [x29, 96]
 	mov	w1, -1
-	ldr	x0, [x5, #:lo12:.LANCHOR101]
+	ldr	x0, [x5, #:lo12:.LANCHOR97]
 	strh	w1, [x0, x21, lsl 1]
 	ldrh	w1, [x0, 688]
 	sub	w1, w1, #1
 	strh	w1, [x0, 688]
-	b	.L1214
-.L1213:
-	cbz	w0, .L1215
-.L1214:
+	b	.L1221
+.L1220:
+	cbz	w0, .L1222
+.L1221:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1211
-.L1218:
+	b	.L1218
+.L1225:
 	mov	w22, w0
 	str	w19, [x29, 108]
-	b	.L1214
+	b	.L1221
 	.size	pm_free_sblk, .-pm_free_sblk
 	.section	.text.idb_init,"ax",@progbits
 	.align	2
@@ -7332,14 +7391,14 @@ flash_into_data_init:
 	add	x29, sp, 0
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
 	str	x19, [sp, 16]
-	tbz	x0, 12, .L1227
-	adrp	x2, .LANCHOR133
+	tbz	x0, 12, .L1234
+	adrp	x2, .LANCHOR136
 	adrp	x0, .LC73
-	add	x2, x2, :lo12:.LANCHOR133
+	add	x2, x2, :lo12:.LANCHOR136
 	mov	w1, 100
 	add	x0, x0, :lo12:.LC73
 	bl	printf
-.L1227:
+.L1234:
 	adrp	x19, .LANCHOR20
 	mov	w2, 2048
 	mov	w1, 0
@@ -7373,15 +7432,15 @@ flash_into_data_init:
 	.type	ftl_memcpy32, %function
 ftl_memcpy32:
 	mov	x3, 0
-.L1233:
+.L1240:
 	cmp	w2, w3
-	bhi	.L1234
+	bhi	.L1241
 	ret
-.L1234:
+.L1241:
 	ldr	w4, [x1, x3, lsl 2]
 	str	w4, [x0, x3, lsl 2]
 	add	x3, x3, 1
-	b	.L1233
+	b	.L1240
 	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.ftl_memcmp,"ax",@progbits
 	.align	2
@@ -7422,14 +7481,14 @@ nandc_init:
 	mov	x19, x0
 	ldr	w0, [x21, #:lo12:.LANCHOR7]
 	str	wzr, [x29, 56]
-	tbz	x0, 12, .L1239
-	adrp	x1, .LANCHOR134
+	tbz	x0, 12, .L1246
+	adrp	x1, .LANCHOR137
 	adrp	x0, .LC74
 	mov	x2, x19
-	add	x1, x1, :lo12:.LANCHOR134
+	add	x1, x1, :lo12:.LANCHOR137
 	add	x0, x0, :lo12:.LC74
 	bl	printf
-.L1239:
+.L1246:
 	adrp	x20, .LANCHOR22
 	mov	w0, 6
 	ldr	w2, [x19, 352]
@@ -7440,22 +7499,22 @@ nandc_init:
 	mov	x22, x0
 	str	x19, [x0, #:lo12:.LANCHOR21]
 	cmp	w2, w1
-	bne	.L1240
+	bne	.L1247
 	mov	w0, 8
 	strb	w0, [x20, #:lo12:.LANCHOR22]
-.L1240:
+.L1247:
 	ldr	w1, [x19, 128]
 	mov	w0, 12336
 	movk	w0, 0x5639, lsl 16
 	cmp	w1, w0
-	bne	.L1241
+	bne	.L1248
 	mov	w0, 9
 	strb	w0, [x20, #:lo12:.LANCHOR22]
-.L1241:
+.L1248:
 	ldrb	w0, [x20, #:lo12:.LANCHOR22]
 	cmp	w0, 9
 	adrp	x0, .LANCHOR41
-	bne	.L1242
+	bne	.L1249
 	mov	w1, 1
 	strb	w1, [x0, #:lo12:.LANCHOR41]
 	ldr	w0, [x29, 56]
@@ -7476,17 +7535,17 @@ nandc_init:
 	mov	w0, 39
 	str	w0, [x19, 84]
 	ldr	w0, [x21, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L1244
+	tbz	x0, 12, .L1251
 	ldr	w1, [x19]
 	ldr	w2, [x19, 8]
 	ldr	w3, [x19, 80]
 	ldr	w4, [x19, 84]
 	ldr	w5, [x19, 88]
-.L1257:
+.L1264:
 	adrp	x0, .LC75
 	add	x0, x0, :lo12:.LC75
 	bl	printf
-.L1244:
+.L1251:
 	adrp	x0, .LANCHOR42
 	mov	w1, 1
 	strb	w1, [x0, #:lo12:.LANCHOR42]
@@ -7495,17 +7554,17 @@ nandc_init:
 	adrp	x0, .LANCHOR40
 	strb	wzr, [x0, #:lo12:.LANCHOR40]
 	ldr	w0, [x21, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L1238
+	tbz	x0, 12, .L1245
 	ldrb	w1, [x20, #:lo12:.LANCHOR22]
 	adrp	x0, .LC76
 	add	x0, x0, :lo12:.LC76
 	bl	printf
-.L1238:
+.L1245:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1242:
+.L1249:
 	strb	wzr, [x0, #:lo12:.LANCHOR41]
 	ldr	w0, [x29, 56]
 	orr	w0, w0, 256
@@ -7529,14 +7588,14 @@ nandc_init:
 	adrp	x1, .LANCHOR43
 	str	x0, [x1, #:lo12:.LANCHOR43]
 	ldr	w0, [x21, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L1244
+	tbz	x0, 12, .L1251
 	ldr	x0, [x22, #:lo12:.LANCHOR21]
 	ldr	w1, [x0]
 	ldr	w2, [x0, 344]
 	ldr	w3, [x0, 304]
 	ldr	w4, [x0, 308]
 	ldr	w5, [x0, 312]
-	b	.L1257
+	b	.L1264
 	.size	nandc_init, .-nandc_init
 	.section	.text.buf_init,"ax",@progbits
 	.align	2
@@ -7550,10 +7609,10 @@ buf_init:
 	add	x19, x0, :lo12:.LANCHOR46
 	stp	x21, x22, [sp, 32]
 	mov	x20, x0
-	adrp	x22, .LANCHOR114
-	add	x22, x22, :lo12:.LANCHOR114
+	adrp	x22, .LANCHOR117
+	add	x22, x22, :lo12:.LANCHOR117
 	mov	w21, 0
-.L1259:
+.L1266:
 	and	w0, w21, 255
 	strb	w0, [x19, 1]
 	add	w1, w0, 1
@@ -7571,7 +7630,7 @@ buf_init:
 	bl	ftl_malloc
 	str	x0, [x19, -40]
 	cmp	w21, 32
-	bne	.L1259
+	bne	.L1266
 	add	x0, x20, :lo12:.LANCHOR46
 	mov	w1, -1
 	strb	w1, [x0, 1984]
@@ -7595,11 +7654,11 @@ gc_init:
 	mov	w1, 0
 	add	x29, sp, 0
 	strb	wzr, [x0, #:lo12:.LANCHOR70]
-	adrp	x0, .LANCHOR135
+	adrp	x0, .LANCHOR138
 	stp	x19, x20, [sp, 16]
 	adrp	x20, .LANCHOR63
 	add	x19, x20, :lo12:.LANCHOR63
-	strb	wzr, [x0, #:lo12:.LANCHOR135]
+	strb	wzr, [x0, #:lo12:.LANCHOR138]
 	mov	x0, x19
 	bl	ftl_memset
 	mov	w0, -1
@@ -7635,15 +7694,15 @@ gc_init:
 	mul	w0, w0, w3
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR136
-	str	x0, [x1, #:lo12:.LANCHOR136]
+	adrp	x1, .LANCHOR139
+	str	x0, [x1, #:lo12:.LANCHOR139]
 	ldrb	w1, [x19, #:lo12:.LANCHOR72]
 	ldrh	w0, [x20, #:lo12:.LANCHOR71]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR137
-	str	x0, [x1, #:lo12:.LANCHOR137]
+	adrp	x1, .LANCHOR140
+	str	x0, [x1, #:lo12:.LANCHOR140]
 	ldrh	w1, [x20, #:lo12:.LANCHOR71]
 	ldrb	w0, [x19, #:lo12:.LANCHOR72]
 	mul	w0, w1, w0
@@ -7662,9 +7721,9 @@ gc_init:
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR138
+	adrp	x1, .LANCHOR141
 	ldp	x19, x20, [sp, 16]
-	str	x0, [x1, #:lo12:.LANCHOR138]
+	str	x0, [x1, #:lo12:.LANCHOR141]
 	adrp	x0, .LANCHOR83
 	ldp	x29, x30, [sp], 32
 	ldrh	w1, [x0, #:lo12:.LANCHOR83]
@@ -7688,18 +7747,18 @@ js_hash:
 	mov	w0, 42982
 	mov	x3, 0
 	movk	w0, 0x47c6, lsl 16
-.L1266:
+.L1273:
 	cmp	w1, w3
-	bhi	.L1267
+	bhi	.L1274
 	ret
-.L1267:
+.L1274:
 	lsr	w2, w0, 2
 	ldrb	w5, [x4, x3]
 	add	w2, w2, w0, lsl 5
 	add	x3, x3, 1
 	add	w2, w2, w5
 	eor	w0, w0, w2
-	b	.L1266
+	b	.L1273
 	.size	js_hash, .-js_hash
 	.section	.text.timer_get_time,"ax",@progbits
 	.align	2
@@ -7763,9 +7822,9 @@ rknand_print_hex:
 	mov	x19, 0
 	mov	w20, 0
 	adrp	x27, .LC79
-.L1274:
+.L1281:
 	cmp	x25, x19
-	bne	.L1280
+	bne	.L1287
 	ldp	x19, x20, [sp, 16]
 	adrp	x1, .LC79
 	ldp	x21, x22, [sp, 32]
@@ -7777,38 +7836,38 @@ rknand_print_hex:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	printf
-.L1280:
-	cbnz	w20, .L1275
+.L1287:
+	cbnz	w20, .L1282
 	mov	w2, w19
 	mov	x1, x26
 	mov	x0, x23
 	bl	printf
-.L1275:
+.L1282:
 	cmp	w24, 4
-	bne	.L1276
+	bne	.L1283
 	ldr	w1, [x22, x19, lsl 2]
-.L1282:
+.L1289:
 	mov	x0, x21
 	add	w20, w20, 1
 	bl	printf
 	cmp	w20, 15
-	bls	.L1279
+	bls	.L1286
 	mov	w20, 0
 	add	x1, x27, :lo12:.LC79
 	adrp	x0, .LC80
 	add	x0, x0, :lo12:.LC80
 	bl	printf
-.L1279:
+.L1286:
 	add	x19, x19, 1
-	b	.L1274
-.L1276:
+	b	.L1281
+.L1283:
 	cmp	w24, 2
-	bne	.L1278
+	bne	.L1285
 	ldrsh	w1, [x22, x19, lsl 1]
-	b	.L1282
-.L1278:
+	b	.L1289
+.L1285:
 	ldrb	w1, [x22, x19]
-	b	.L1282
+	b	.L1289
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.hynix_get_read_retry_default,"ax",@progbits
 	.align	2
@@ -7840,43 +7899,43 @@ hynix_get_read_retry_default:
 	cmp	w3, 2
 	strb	w1, [x28, 130]
 	strb	w0, [x28, 131]
-	bne	.L1284
+	bne	.L1291
 	mov	w0, -89
 	strb	w0, [x28, 128]
-	adrp	x0, .LANCHOR139+17
+	adrp	x0, .LANCHOR142+17
 	mov	w1, -9
-	strb	w1, [x0, #:lo12:.LANCHOR139+17]
-.L1339:
+	strb	w1, [x0, #:lo12:.LANCHOR142+17]
+.L1346:
 	mov	w0, 7
-	b	.L1374
-.L1284:
+	b	.L1381
+.L1291:
 	ldr	w3, [x29, 140]
 	cmp	w3, 3
-	bne	.L1286
+	bne	.L1293
 	mov	x6, 0
-.L1287:
+.L1294:
 	sub	w0, w6, #80
 	strb	w0, [x22, x6]
 	add	x6, x6, 1
 	cmp	x6, 8
-	bne	.L1287
+	bne	.L1294
 	stp	w6, w6, [x29, 132]
-.L1285:
+.L1292:
 	ldr	w0, [x29, 140]
 	sub	w0, w0, #1
 	cmp	w0, 1
-	bhi	.L1292
+	bhi	.L1299
 	adrp	x7, .LANCHOR12
 	adrp	x11, .LANCHOR24
 	add	x24, x7, :lo12:.LANCHOR12
 	add	x25, x11, :lo12:.LANCHOR24
 	mov	w20, 0
 	mov	w26, 55
-.L1293:
+.L1300:
 	ldrb	w0, [x24]
 	cmp	w0, w20
-	bhi	.L1299
-.L1300:
+	bhi	.L1306
+.L1307:
 	ldr	x0, [x29, 112]
 	ldrb	w1, [x29, 136]
 	strb	w1, [x0, 1]
@@ -7889,10 +7948,10 @@ hynix_get_read_retry_default:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1286:
+.L1293:
 	ldr	w3, [x29, 140]
 	cmp	w3, 4
-	bne	.L1288
+	bne	.L1295
 	mov	w3, -52
 	strb	w3, [x28, 128]
 	mov	w3, -65
@@ -7908,13 +7967,13 @@ hynix_get_read_retry_default:
 	strb	w3, [x28, 132]
 	strb	w1, [x28, 134]
 	str	w0, [x29, 132]
-.L1375:
+.L1382:
 	str	w0, [x29, 136]
-	b	.L1285
-.L1288:
+	b	.L1292
+.L1295:
 	ldr	w0, [x29, 140]
 	cmp	w0, 5
-	bne	.L1289
+	bne	.L1296
 	mov	w0, 56
 	strb	w0, [x28, 128]
 	mov	w0, 57
@@ -7924,14 +7983,14 @@ hynix_get_read_retry_default:
 	mov	w0, 59
 	strb	w0, [x28, 131]
 	mov	w0, 8
-.L1374:
+.L1381:
 	str	w0, [x29, 132]
 	mov	w0, 4
-	b	.L1375
-.L1289:
+	b	.L1382
+.L1296:
 	ldr	w0, [x29, 140]
 	cmp	w0, 6
-	bne	.L1290
+	bne	.L1297
 	mov	w0, 14
 	strb	w0, [x28, 128]
 	mov	w0, 15
@@ -7941,18 +8000,18 @@ hynix_get_read_retry_default:
 	mov	w0, 17
 	strb	w0, [x28, 131]
 	mov	w0, 12
-	b	.L1374
-.L1290:
+	b	.L1381
+.L1297:
 	ldr	w0, [x29, 140]
 	cmp	w0, 7
-	bne	.L1339
+	bne	.L1346
 	mov	x0, 0
-.L1291:
+.L1298:
 	sub	w1, w0, #80
 	strb	w1, [x22, x0]
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L1291
+	bne	.L1298
 	mov	w0, -44
 	strb	w0, [x28, 136]
 	mov	w0, -43
@@ -7960,8 +8019,8 @@ hynix_get_read_retry_default:
 	mov	w0, 12
 	str	w0, [x29, 132]
 	mov	w0, 10
-	b	.L1375
-.L1299:
+	b	.L1382
+.L1306:
 	ldrb	w0, [x25, w20, sxtw]
 	mov	x1, 32
 	mov	w2, 160
@@ -7973,7 +8032,7 @@ hynix_get_read_retry_default:
 	adrp	x1, .LANCHOR21
 	ldr	x4, [x1, #:lo12:.LANCHOR21]
 	add	x23, x4, x0
-.L1294:
+.L1301:
 	str	w26, [x23, 2056]
 	ldrb	w0, [x22, x21]
 	str	w0, [x23, 2052]
@@ -7984,15 +8043,15 @@ hynix_get_read_retry_default:
 	add	x21, x21, 1
 	ldr	w0, [x29, 136]
 	cmp	w0, w21, uxtb
-	bhi	.L1294
-	adrp	x3, .LANCHOR139
-	add	x3, x3, :lo12:.LANCHOR139
+	bhi	.L1301
+	adrp	x3, .LANCHOR142
+	add	x3, x3, :lo12:.LANCHOR142
 	mov	x0, 0
-.L1297:
+.L1304:
 	add	x15, x19, x0
 	add	x14, x3, x0
 	mov	x1, 1
-.L1296:
+.L1303:
 	lsl	x4, x1, 2
 	lsl	x16, x1, 3
 	ldrb	w17, [x19, x0]
@@ -8001,10 +8060,10 @@ hynix_get_read_retry_default:
 	ldrb	w4, [x14, x4]
 	add	w4, w4, w17
 	strb	w4, [x15, x16]
-	bne	.L1296
+	bne	.L1303
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L1297
+	bne	.L1304
 	add	w5, w20, 1
 	strb	wzr, [x19, 16]
 	strb	wzr, [x19, 24]
@@ -8014,12 +8073,12 @@ hynix_get_read_retry_default:
 	strb	wzr, [x19, 48]
 	strb	wzr, [x19, 41]
 	strb	wzr, [x19, 49]
-	b	.L1293
-.L1292:
+	b	.L1300
+.L1299:
 	ldr	w0, [x29, 140]
 	sub	w0, w0, #3
 	cmp	w0, 4
-	bhi	.L1300
+	bhi	.L1307
 	ldp	w0, w1, [x29, 132]
 	adrp	x19, .LANCHOR12
 	add	x19, x19, :lo12:.LANCHOR12
@@ -8037,11 +8096,11 @@ hynix_get_read_retry_default:
 	sub	w20, w0, #5
 	add	x0, x13, 1
 	str	x0, [x29, 96]
-.L1301:
+.L1308:
 	ldrb	w0, [x19]
 	ldr	w1, [x29, 128]
 	cmp	w0, w1
-	bls	.L1300
+	bls	.L1307
 	ldr	w1, [x29, 128]
 	adrp	x0, .LANCHOR24
 	add	x0, x0, :lo12:.LANCHOR24
@@ -8063,22 +8122,22 @@ hynix_get_read_retry_default:
 	str	w0, [x27, 2056]
 	ldr	w0, [x29, 140]
 	cmp	w0, 4
-	bne	.L1302
+	bne	.L1309
 	mov	w0, 64
 	str	w23, [x27, 2052]
 	str	w0, [x27, 2048]
 	mov	w0, 204
-.L1376:
+.L1383:
 	str	w0, [x27, 2052]
 	mov	w0, 77
-	b	.L1377
-.L1302:
+	b	.L1384
+.L1309:
 	cmp	w20, 1
-	bhi	.L1304
+	bhi	.L1311
 	ldrb	w0, [x28, 128]
 	str	w0, [x27, 2052]
 	mov	w0, 82
-.L1377:
+.L1384:
 	str	w0, [x27, 2048]
 	mov	w0, 22
 	str	w0, [x27, 2056]
@@ -8093,10 +8152,10 @@ hynix_get_read_retry_default:
 	ldr	w0, [x29, 140]
 	str	wzr, [x27, 2052]
 	cmp	w0, 6
-	bne	.L1305
+	bne	.L1312
 	mov	w0, 31
 	str	w0, [x27, 2052]
-.L1306:
+.L1313:
 	mov	w23, 2
 	str	w23, [x27, 2052]
 	str	wzr, [x27, 2052]
@@ -8104,122 +8163,122 @@ hynix_get_read_retry_default:
 	str	w0, [x27, 2056]
 	bl	nandc_wait_flash_ready
 	cmp	w20, 1
-	bls	.L1340
+	bls	.L1347
 	ldr	w0, [x29, 140]
 	cmp	w0, 7
 	mov	w0, 32
 	csel	w23, w23, w0, ne
-.L1307:
-	adrp	x3, .LANCHOR140
+.L1314:
+	adrp	x3, .LANCHOR143
 	mov	x1, 0
-	ldr	x0, [x3, #:lo12:.LANCHOR140]
-.L1308:
+	ldr	x0, [x3, #:lo12:.LANCHOR143]
+.L1315:
 	ldr	w2, [x27, 2048]
 	strb	w2, [x0, x1]
 	add	x1, x1, 1
 	cmp	w23, w1, uxtb
-	bhi	.L1308
+	bhi	.L1315
 	ldr	w1, [x29, 140]
 	cmp	w1, 7
-	bne	.L1309
+	bne	.L1316
 	mov	w1, 0
-.L1311:
+.L1318:
 	ldrb	w2, [x0]
 	cmp	w2, 12
-	beq	.L1310
+	beq	.L1317
 	ldrb	w2, [x0, 1]
 	cmp	w2, 10
-	beq	.L1310
+	beq	.L1317
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 255
 	cmp	w1, 8
-	bne	.L1311
-.L1312:
+	bne	.L1318
+.L1319:
 	adrp	x0, .LC81
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC81
 	bl	printf
-.L1314:
-	b	.L1314
-.L1304:
+.L1321:
+	b	.L1321
+.L1311:
 	mov	w0, 174
 	str	w0, [x27, 2052]
 	str	wzr, [x27, 2048]
 	mov	w0, 176
-	b	.L1376
-.L1305:
+	b	.L1383
+.L1312:
 	str	wzr, [x27, 2052]
-	b	.L1306
-.L1340:
+	b	.L1313
+.L1347:
 	mov	w23, 16
-	b	.L1307
-.L1310:
+	b	.L1314
+.L1317:
 	cmp	w1, 6
-	bhi	.L1312
-.L1313:
-	ldr	x2, [x3, #:lo12:.LANCHOR140]
+	bhi	.L1319
+.L1320:
+	ldr	x2, [x3, #:lo12:.LANCHOR143]
 	mov	x0, 0
-.L1318:
+.L1325:
 	ldr	w1, [x29, 120]
 	cmp	w1, w0
-	bgt	.L1319
-	ldr	x1, [x3, #:lo12:.LANCHOR140]
+	bgt	.L1326
+	ldr	x1, [x3, #:lo12:.LANCHOR143]
 	mov	w16, 8
 	add	x3, x1, x21
-.L1321:
+.L1328:
 	mov	x0, 0
-.L1320:
+.L1327:
 	ldr	w17, [x3, x0, lsl 2]
 	ldr	w4, [x29, 124]
 	mvn	w17, w17
 	str	w17, [x3, x0, lsl 2]
 	add	x0, x0, 1
 	cmp	w4, w0
-	bgt	.L1320
+	bgt	.L1327
 	add	x3, x3, x22, uxtw 2
 	subs	w16, w16, #1
-	bne	.L1321
+	bne	.L1328
 	mov	x17, x1
 	mov	w23, 0
 	mov	w26, 1
-.L1322:
+.L1329:
 	mov	w3, 0
 	mov	w0, 0
-.L1326:
+.L1333:
 	mov	x25, x17
 	lsl	w16, w26, w0
 	mov	w24, 16
 	mov	w30, 0
-.L1324:
+.L1331:
 	ldr	w4, [x25]
 	add	x25, x25, x21
 	bics	wzr, w16, w4
 	cinc	w30, w30, eq
 	subs	w24, w24, #1
-	bne	.L1324
+	bne	.L1331
 	cmp	w30, 9
 	orr	w16, w3, w16
 	add	w0, w0, 1
 	csel	w3, w16, w3, cs
 	cmp	w0, 32
-	bne	.L1326
+	bne	.L1333
 	ldr	w0, [x29, 124]
 	add	w23, w23, 1
 	str	w3, [x17], 4
 	cmp	w0, w23
-	bgt	.L1322
+	bgt	.L1329
 	mov	x0, 0
 	mov	w3, 0
-.L1329:
+.L1336:
 	ldr	w16, [x1, x0]
 	add	x0, x0, 4
 	cmp	w16, 0
 	cinc	w3, w3, eq
 	cmp	x0, 32
-	bne	.L1329
+	bne	.L1336
 	cmp	w3, 7
-	ble	.L1330
+	ble	.L1337
 	mov	w3, 1024
 	mov	w2, 1
 	adrp	x0, .LC82
@@ -8229,67 +8288,67 @@ hynix_get_read_retry_default:
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC81
 	bl	printf
-.L1331:
-	b	.L1331
-.L1309:
+.L1338:
+	b	.L1338
+.L1316:
 	ldr	w1, [x29, 140]
 	cmp	w1, 6
-	bne	.L1313
+	bne	.L1320
 	mov	x1, 0
-.L1315:
+.L1322:
 	ldrb	w2, [x0, x1]
 	cmp	w2, 12
-	beq	.L1313
+	beq	.L1320
 	add	x2, x0, x1
 	ldrb	w2, [x2, 8]
 	cmp	w2, 4
-	beq	.L1313
+	beq	.L1320
 	add	x1, x1, 1
 	cmp	x1, 8
-	bne	.L1315
+	bne	.L1322
 	adrp	x0, .LC81
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC81
 	bl	printf
-.L1317:
-	b	.L1317
-.L1319:
+.L1324:
+	b	.L1324
+.L1326:
 	ldr	w1, [x27, 2048]
 	strb	w1, [x2, x0]
 	add	x0, x0, 1
-	b	.L1318
-.L1330:
+	b	.L1325
+.L1337:
 	ldr	w0, [x29, 140]
 	cmp	w0, 6
-	beq	.L1342
+	beq	.L1349
 	cmp	w0, 7
 	mov	x1, 10
 	mov	x0, 8
 	csel	x0, x0, x1, ne
-.L1332:
+.L1339:
 	ldr	x10, [x29, 104]
 	mov	w3, 0
-.L1333:
+.L1340:
 	mov	x1, 0
-.L1334:
+.L1341:
 	ldrb	w16, [x2, x1]
 	ldr	w4, [x29, 136]
 	strb	w16, [x10, x1]
 	add	x1, x1, 1
 	cmp	w4, w1, uxtb
-	bhi	.L1334
+	bhi	.L1341
 	ldr	x1, [x29, 96]
 	add	w3, w3, 1
 	add	x10, x10, x0
 	add	x2, x2, x1
 	ldr	w1, [x29, 132]
 	cmp	w1, w3
-	bgt	.L1333
+	bgt	.L1340
 	mov	w23, 255
 	str	w23, [x27, 2056]
 	bl	nandc_wait_flash_ready
 	cmp	w20, 1
-	bhi	.L1336
+	bhi	.L1343
 	mov	w0, 54
 	str	w0, [x27, 2056]
 	ldrb	w0, [x28, 128]
@@ -8304,20 +8363,20 @@ hynix_get_read_retry_default:
 	str	w23, [x27, 2052]
 	str	w23, [x27, 2052]
 	str	w23, [x27, 2052]
-.L1378:
+.L1385:
 	str	w0, [x27, 2056]
 	bl	nandc_wait_flash_ready
 	ldr	w0, [x29, 128]
 	add	w11, w0, 1
 	and	w0, w11, 255
 	str	w0, [x29, 128]
-	b	.L1301
-.L1342:
+	b	.L1308
+.L1349:
 	mov	x0, 4
-	b	.L1332
-.L1336:
+	b	.L1339
+.L1343:
 	mov	w0, 56
-	b	.L1378
+	b	.L1385
 	.size	hynix_get_read_retry_default, .-hynix_get_read_retry_default
 	.section	.text.flash_get_read_retry_tbl,"ax",@progbits
 	.align	2
@@ -8329,9 +8388,9 @@ flash_get_read_retry_tbl:
 	sub	w1, w0, #1
 	and	w1, w1, 255
 	cmp	w1, 6
-	bhi	.L1379
+	bhi	.L1386
 	b	hynix_get_read_retry_default
-.L1379:
+.L1386:
 	ret
 	.size	flash_get_read_retry_tbl, .-flash_get_read_retry_tbl
 	.section	.text.nandc_xfer_done,"ax",@progbits
@@ -8340,7 +8399,7 @@ flash_get_read_retry_tbl:
 	.type	nandc_xfer_done, %function
 nandc_xfer_done:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR141
+	adrp	x0, .LANCHOR144
 	adrp	x1, .LANCHOR22
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
@@ -8349,28 +8408,28 @@ nandc_xfer_done:
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	cmp	w1, 9
-	strb	wzr, [x0, #:lo12:.LANCHOR141]
-	bne	.L1382
+	strb	wzr, [x0, #:lo12:.LANCHOR144]
+	bne	.L1389
 	ldr	x20, [x19, #:lo12:.LANCHOR21]
 	mov	x24, x0
 	mov	w21, 0
 	ldr	w0, [x20, 16]
 	str	w0, [x29, 64]
 	ldr	w0, [x20, 48]
-	tbnz	x0, 1, .L1383
+	tbnz	x0, 1, .L1390
 	adrp	x22, .LC86
 	adrp	x23, .LC85
 	add	x22, x22, :lo12:.LC86
 	add	x23, x23, :lo12:.LC85
-.L1384:
+.L1391:
 	ldr	w0, [x29, 64]
-	tbnz	x0, 20, .L1387
+	tbnz	x0, 20, .L1394
 	ldr	x0, [x19, #:lo12:.LANCHOR21]
 	add	w21, w21, 1
 	tst	x21, 16777215
 	ldr	w0, [x0, 16]
 	str	w0, [x29, 64]
-	bne	.L1384
+	bne	.L1391
 	ldr	w2, [x29, 64]
 	mov	w1, w21
 	ldr	w3, [x20, 64]
@@ -8382,39 +8441,39 @@ nandc_xfer_done:
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1384
-.L1383:
+	b	.L1391
+.L1390:
 	adrp	x22, .LC84
 	adrp	x23, .LC85
 	add	x22, x22, :lo12:.LC84
 	add	x23, x23, :lo12:.LC85
-.L1385:
+.L1392:
 	ldr	w1, [x20, 64]
 	ldr	w0, [x29, 64]
 	ubfx	x1, x1, 16, 6
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0
-	bge	.L1387
+	bge	.L1394
 	ldr	x0, [x19, #:lo12:.LANCHOR21]
 	ldr	w0, [x0]
 	str	w0, [x29, 72]
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1386
+	tbz	x0, 13, .L1393
 	ldr	w0, [x29, 72]
-	tbz	x0, 17, .L1386
+	tbz	x0, 17, .L1393
 	ldr	w1, [x29, 72]
 	adrp	x0, .LC83
 	add	x0, x0, :lo12:.LC83
 	ubfx	x1, x1, 17, 1
-.L1419:
+.L1426:
 	bl	printf
-	b	.L1387
-.L1386:
+	b	.L1394
+.L1393:
 	ldr	w0, [x29, 64]
 	add	w21, w21, 1
 	ubfx	x0, x0, 22, 6
 	cmp	w21, w0, lsl 12
-	bne	.L1385
+	bne	.L1392
 	ldr	w2, [x20, 64]
 	mov	w1, w21
 	ldr	w3, [x29, 64]
@@ -8428,10 +8487,10 @@ nandc_xfer_done:
 	mov	w2, 4
 	bl	rknand_print_hex
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1385
+	tbz	x0, 13, .L1392
 	mov	w0, 1
-	strb	w0, [x24, #:lo12:.LANCHOR141]
-.L1387:
+	strb	w0, [x24, #:lo12:.LANCHOR144]
+.L1394:
 	adrp	x0, .LANCHOR43+32
 	ldp	x19, x20, [sp, 16]
 	str	wzr, [x0, #:lo12:.LANCHOR43+32]
@@ -8439,26 +8498,26 @@ nandc_xfer_done:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1382:
+.L1389:
 	ldr	x20, [x19, #:lo12:.LANCHOR21]
 	mov	w21, 0
 	ldr	w0, [x20, 8]
 	str	w0, [x29, 64]
 	ldr	w0, [x20, 16]
-	tbnz	x0, 1, .L1393
+	tbnz	x0, 1, .L1400
 	adrp	x22, .LC86
 	adrp	x23, .LC85
 	add	x22, x22, :lo12:.LC86
 	add	x23, x23, :lo12:.LC85
-.L1394:
+.L1401:
 	ldr	w0, [x29, 64]
-	tbnz	x0, 20, .L1387
+	tbnz	x0, 20, .L1394
 	ldr	x0, [x19, #:lo12:.LANCHOR21]
 	add	w21, w21, 1
 	tst	x21, 16777215
 	ldr	w0, [x0, 8]
 	str	w0, [x29, 64]
-	bne	.L1394
+	bne	.L1401
 	ldr	w2, [x29, 64]
 	mov	w1, w21
 	ldr	w3, [x20, 28]
@@ -8470,34 +8529,34 @@ nandc_xfer_done:
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1394
-.L1393:
+	b	.L1401
+.L1400:
 	adrp	x22, .LC84
 	adrp	x23, .LC85
 	add	x22, x22, :lo12:.LC84
 	add	x23, x23, :lo12:.LC85
-.L1395:
+.L1402:
 	ldr	w1, [x20, 28]
 	ldr	w0, [x29, 64]
 	ubfx	x1, x1, 16, 5
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0
-	bge	.L1387
+	bge	.L1394
 	ldr	x0, [x19, #:lo12:.LANCHOR21]
 	ldr	w0, [x0]
 	str	w0, [x29, 72]
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1396
+	tbz	x0, 13, .L1403
 	ldr	w0, [x29, 72]
-	tbz	x0, 17, .L1396
+	tbz	x0, 17, .L1403
 	adrp	x0, .LC87
 	ldr	w1, [x29, 72]
 	add	x0, x0, :lo12:.LC87
-	b	.L1419
-.L1396:
+	b	.L1426
+.L1403:
 	add	w21, w21, 1
 	tst	x21, 16777215
-	bne	.L1395
+	bne	.L1402
 	ldr	w2, [x20, 28]
 	mov	w1, w21
 	ldr	w3, [x29, 64]
@@ -8510,7 +8569,7 @@ nandc_xfer_done:
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1395
+	b	.L1402
 	.size	nandc_xfer_done, .-nandc_xfer_done
 	.section	.text.nandc_xfer,"ax",@progbits
 	.align	2
@@ -8531,20 +8590,20 @@ nandc_xfer:
 	mov	x21, x4
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
-	cbnz	w22, .L1439
+	cbnz	w22, .L1446
 	adrp	x0, .LANCHOR22
 	ldrb	w0, [x0, #:lo12:.LANCHOR22]
 	cmp	w0, 9
-	bne	.L1422
+	bne	.L1429
 	adrp	x22, .LANCHOR21
 	lsr	w19, w19, 2
 	mov	w3, 1
 	mov	w2, 0
 	ldr	x5, [x22, #:lo12:.LANCHOR21]
 	mov	w0, 0
-.L1423:
+.L1430:
 	cmp	w2, w19
-	bcc	.L1427
+	bcc	.L1434
 	ldr	w19, [x5]
 	cmp	w3, 0
 	mov	w1, 512
@@ -8553,7 +8612,7 @@ nandc_xfer:
 	movk	w1, 0x2, lsl 16
 	and	w1, w19, w1
 	cmp	w1, 139264
-	bne	.L1429
+	bne	.L1436
 	mov	w1, w19
 	adrp	x0, .LC88
 	add	x0, x0, :lo12:.LC88
@@ -8562,11 +8621,11 @@ nandc_xfer:
 	orr	w19, w19, 131072
 	str	w19, [x0]
 	mov	w0, -1
-.L1429:
-	tbz	x19, 13, .L1430
-	adrp	x1, .LANCHOR141
-	ldrb	w1, [x1, #:lo12:.LANCHOR141]
-	cbz	w1, .L1430
+.L1436:
+	tbz	x19, 13, .L1437
+	adrp	x1, .LANCHOR144
+	ldrb	w1, [x1, #:lo12:.LANCHOR144]
+	cbz	w1, .L1437
 	mov	w1, w19
 	adrp	x0, .LC89
 	add	x0, x0, :lo12:.LC89
@@ -8574,14 +8633,14 @@ nandc_xfer:
 	ldr	x0, [x22, #:lo12:.LANCHOR21]
 	mov	w1, 1
 	str	w1, [x0, 16]
-.L1458:
+.L1465:
 	mov	w0, -1
-.L1421:
+.L1428:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1427:
+.L1434:
 	uxtw	x1, w2
 	add	x1, x1, 84
 	ldr	w1, [x5, x1, lsl 2]
@@ -8592,30 +8651,30 @@ nandc_xfer:
 	and	w1, w4, w1, lsr 10
 	and	w3, w3, w1
 	ldr	w1, [x29, 56]
-	tbnz	x1, 2, .L1441
+	tbnz	x1, 2, .L1448
 	ldr	w1, [x29, 56]
-	tbnz	x1, 18, .L1441
+	tbnz	x1, 18, .L1448
 	ldr	w4, [x29, 56]
 	ldr	w1, [x29, 56]
 	ubfx	x4, x4, 3, 7
 	ubfx	x1, x1, 19, 7
 	cmp	w4, w1
 	ldr	w1, [x29, 56]
-	ble	.L1425
+	ble	.L1432
 	ubfx	x1, x1, 3, 7
-.L1426:
+.L1433:
 	cmp	w0, w1
 	csel	w0, w0, w1, cs
-.L1424:
+.L1431:
 	add	w2, w2, 1
-	b	.L1423
-.L1425:
+	b	.L1430
+.L1432:
 	ubfx	x1, x1, 19, 7
-	b	.L1426
-.L1441:
+	b	.L1433
+.L1448:
 	mov	w0, -1
-	b	.L1424
-.L1422:
+	b	.L1431
+.L1429:
 	adrp	x0, .LANCHOR40
 	lsr	w4, w19, 1
 	mov	w3, 64
@@ -8627,25 +8686,25 @@ nandc_xfer:
 	mov	w0, 128
 	csel	w3, w3, w0, cc
 	mov	w0, 0
-.L1432:
+.L1439:
 	add	w5, w3, w0
 	cmp	w2, w4
-	bcc	.L1433
+	bcc	.L1440
 	adrp	x22, .LANCHOR21
 	lsr	w19, w19, 2
 	mov	w3, 0
 	mov	w0, 0
 	ldr	x4, [x22, #:lo12:.LANCHOR21]
-.L1434:
+.L1441:
 	cmp	w3, w19
-	bcc	.L1438
+	bcc	.L1445
 	str	wzr, [x4, 16]
 	mov	w1, 8192
 	movk	w1, 0x2, lsl 16
 	ldr	w19, [x4]
 	and	w1, w19, w1
 	cmp	w1, 139264
-	bne	.L1430
+	bne	.L1437
 	mov	w1, w19
 	adrp	x0, .LC90
 	add	x0, x0, :lo12:.LC90
@@ -8653,8 +8712,8 @@ nandc_xfer:
 	ldr	x0, [x22, #:lo12:.LANCHOR21]
 	orr	w19, w19, 131072
 	str	w19, [x0]
-	b	.L1458
-.L1433:
+	b	.L1465
+.L1440:
 	ldr	x7, [x6, #:lo12:.LANCHOR43]
 	and	x0, x0, 4294967292
 	ldr	w0, [x7, x0]
@@ -8671,16 +8730,16 @@ nandc_xfer:
 	add	w1, w1, 4
 	strb	w0, [x21, x7]
 	mov	w0, w5
-	b	.L1432
-.L1438:
+	b	.L1439
+.L1445:
 	uxtw	x1, w3
 	add	x1, x1, 8
 	ldr	w1, [x4, x1, lsl 2]
 	str	w1, [x29, 56]
 	ldr	w1, [x29, 56]
-	tbnz	x1, 2, .L1444
+	tbnz	x1, 2, .L1451
 	ldr	w1, [x29, 56]
-	tbnz	x1, 15, .L1444
+	tbnz	x1, 15, .L1451
 	ldr	w2, [x29, 56]
 	ubfx	x6, x2, 3, 5
 	ldr	w2, [x29, 56]
@@ -8693,42 +8752,42 @@ nandc_xfer:
 	orr	w1, w5, w1, lsl 5
 	cmp	w2, w1
 	ldr	w1, [x29, 56]
-	bls	.L1436
+	bls	.L1443
 	ubfx	x2, x1, 3, 5
 	ldr	w1, [x29, 56]
 	ubfx	x1, x1, 27, 1
-.L1457:
+.L1464:
 	orr	w1, w2, w1, lsl 5
 	cmp	w0, w1
 	csel	w0, w0, w1, cs
-.L1435:
+.L1442:
 	add	w3, w3, 1
-	b	.L1434
-.L1436:
+	b	.L1441
+.L1443:
 	ubfx	x2, x1, 16, 5
 	ldr	w1, [x29, 56]
 	ubfx	x1, x1, 29, 1
-	b	.L1457
-.L1444:
+	b	.L1464
+.L1451:
 	mov	w0, -1
-	b	.L1435
-.L1430:
+	b	.L1442
+.L1437:
 	cmn	w0, #1
-	beq	.L1421
+	beq	.L1428
 	ldr	w1, [x21]
 	cmn	w1, #1
-	bne	.L1421
+	bne	.L1428
 	ldr	w1, [x21, 4]
 	cmn	w1, #1
-	bne	.L1421
+	bne	.L1428
 	ldr	w1, [x20]
 	cmn	w1, #1
 	mov	w1, 512
 	csel	w0, w0, w1, ne
-	b	.L1421
-.L1439:
+	b	.L1428
+.L1446:
 	mov	w0, 0
-	b	.L1421
+	b	.L1428
 	.size	nandc_xfer, .-nandc_xfer
 	.section	.text.flash_read_page,"ax",@progbits
 	.align	2
@@ -8752,22 +8811,22 @@ flash_read_page:
 	mov	x26, x3
 	and	w20, w1, 2097151
 	ubfx	x23, x22, 24, 2
-	tbz	x0, 4, .L1460
+	tbz	x0, 4, .L1467
 	mov	w3, w1
 	adrp	x0, .LC91
 	mov	w2, w23
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC91
 	bl	printf
-.L1460:
+.L1467:
 	bl	nandc_wait_flash_ready
 	mov	w0, w21
 	bl	nandc_cs
 	adrp	x6, .LANCHOR9
-	cbnz	w23, .L1461
+	cbnz	w23, .L1468
 	mov	w0, w21
 	bl	zftl_flash_enter_slc_mode
-.L1462:
+.L1469:
 	ubfiz	x4, x21, 8, 8
 	lsr	w0, w20, 8
 	add	x4, x19, x4
@@ -8784,12 +8843,12 @@ flash_read_page:
 	ldr	x0, [x6, #:lo12:.LANCHOR9]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1464
-	cbz	w23, .L1464
+	bne	.L1471
+	cbz	w23, .L1471
 	add	w20, w20, w20, lsl 1
 	sub	w0, w20, #1
 	add	w0, w0, w23
-.L1473:
+.L1480:
 	bl	nandc_set_seed
 	bl	nandc_wait_flash_ready
 	mov	w0, 5
@@ -8814,23 +8873,23 @@ flash_read_page:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1461:
+.L1468:
 	ldr	x0, [x6, #:lo12:.LANCHOR9]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1463
+	bne	.L1470
 	sxtw	x0, w21
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 8
 	str	w23, [x0, 8]
-	b	.L1462
-.L1463:
+	b	.L1469
+.L1470:
 	mov	w0, w21
 	bl	zftl_flash_exit_slc_mode
-	b	.L1462
-.L1464:
+	b	.L1469
+.L1471:
 	mov	w0, w20
-	b	.L1473
+	b	.L1480
 	.size	flash_read_page, .-flash_read_page
 	.section	.text.micron_read_retrial,"ax",@progbits
 	.align	2
@@ -8838,41 +8897,42 @@ flash_read_page:
 	.type	micron_read_retrial, %function
 micron_read_retrial:
 	stp	x29, x30, [sp, -128]!
-	and	w0, w0, 255
 	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	and	w24, w0, 255
+	adrp	x0, .LANCHOR40
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	mov	w22, w2
-	stp	w5, w0, [x29, 112]
-	adrp	x0, .LANCHOR40
-	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR7
+	mov	w22, w1
 	stp	x25, x26, [sp, 64]
-	mov	x26, x3
+	mov	x25, x2
 	stp	x27, x28, [sp, 80]
-	mov	x27, x4
+	mov	x26, x3
 	ldrb	w20, [x0, #:lo12:.LANCHOR40]
+	and	x19, x24, 255
+	str	w4, [x29, 116]
 	bl	nandc_wait_flash_ready
 	adrp	x0, .LANCHOR21
-	ldrb	w19, [x29, 116]
-	add	x23, x23, :lo12:.LANCHOR7
 	mov	w21, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	add	w20, w20, w20, lsl 1
-	str	x0, [x29, 120]
+	mov	w28, -1
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	asr	w20, w20, 2
-	adrp	x0, .LANCHOR143
-	add	x0, x0, :lo12:.LANCHOR143
+	str	x0, [x29, 120]
+	adrp	x0, .LANCHOR146
+	add	x0, x0, :lo12:.LANCHOR146
 	str	x0, [x29, 104]
-	mov	w24, -1
 	ldr	x0, [x29, 120]
-	add	x25, x0, x19, lsl 8
-.L1475:
+	add	x23, x0, x19, lsl 8
+	adrp	x0, .LANCHOR7
+	add	x0, x0, :lo12:.LANCHOR7
+	str	x0, [x29, 96]
+.L1482:
 	ldr	x0, [x29, 104]
 	ldrb	w0, [x0]
 	cmp	w21, w0
-	bcc	.L1480
-.L1479:
+	bcc	.L1487
+.L1486:
 	ldr	x0, [x29, 120]
 	add	x19, x0, x19, lsl 8
 	mov	w0, 239
@@ -8883,26 +8943,26 @@ micron_read_retrial:
 	bl	timer_delay_ns
 	str	wzr, [x19, 2048]
 	str	wzr, [x19, 2048]
-	cmp	w24, w20
+	cmp	w28, w20
 	str	wzr, [x19, 2048]
 	str	wzr, [x19, 2048]
-	bcc	.L1481
-	cmn	w24, #1
+	bcc	.L1488
+	cmn	w28, #1
 	mov	w0, 256
-	csel	w24, w24, w0, eq
-.L1481:
-	cmp	w24, 256
-	ccmn	w24, #1, 4, ne
-	bne	.L1474
+	csel	w28, w28, w0, eq
+.L1488:
+	cmp	w28, 256
+	ccmn	w28, #1, 4, ne
+	bne	.L1481
 	adrp	x0, .LC93
-	mov	w4, w24
+	mov	w4, w28
 	mov	w3, w21
 	mov	w2, w22
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC93
 	bl	printf
-.L1474:
-	mov	w0, w24
+.L1481:
+	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -8910,194 +8970,197 @@ micron_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1480:
+.L1487:
 	mov	w0, 239
-	str	w0, [x25, 2056]
+	str	w0, [x23, 2056]
 	mov	w0, 137
-	str	w0, [x25, 2052]
-	add	w28, w21, 1
+	str	w0, [x23, 2052]
+	add	w27, w21, 1
 	mov	w0, 200
 	bl	timer_delay_ns
-	str	w28, [x25, 2048]
-	str	wzr, [x25, 2048]
-	mov	x3, x27
-	ldrb	w0, [x29, 116]
-	mov	x2, x26
-	ldr	w4, [x29, 112]
+	str	w27, [x23, 2048]
+	str	wzr, [x23, 2048]
+	mov	x3, x26
+	ldr	w4, [x29, 116]
+	mov	x2, x25
+	str	wzr, [x23, 2048]
 	mov	w1, w22
-	str	wzr, [x25, 2048]
-	str	wzr, [x25, 2048]
+	str	wzr, [x23, 2048]
+	mov	w0, w24
 	bl	flash_read_page
 	mov	w7, w0
-	ldr	w0, [x23]
-	tbz	x0, 12, .L1476
-	str	w7, [x29, 100]
-	mov	w4, w24
+	ldr	x0, [x29, 96]
+	ldr	w0, [x0]
+	tbz	x0, 12, .L1483
+	str	w7, [x29, 112]
+	mov	w4, w28
 	mov	w3, w21
 	mov	w2, w22
 	mov	w1, w21
 	adrp	x0, .LC92
 	add	x0, x0, :lo12:.LC92
 	bl	printf
-	ldr	w7, [x29, 100]
-.L1476:
+	ldr	w7, [x29, 112]
+.L1483:
 	cmn	w7, #1
-	beq	.L1477
-	adrp	x0, .LANCHOR140
-	cmn	w24, #1
-	csel	w24, w24, w7, ne
+	beq	.L1484
+	adrp	x0, .LANCHOR143
+	cmn	w28, #1
+	csel	w28, w28, w7, ne
 	cmp	w7, w20
-	ldr	x26, [x0, #:lo12:.LANCHOR140]
-	adrp	x0, .LANCHOR142
-	ldr	x27, [x0, #:lo12:.LANCHOR142]
-	bcc	.L1483
-.L1477:
-	mov	w21, w28
-	b	.L1475
-.L1483:
-	mov	w24, w7
-	b	.L1479
+	ldr	x25, [x0, #:lo12:.LANCHOR143]
+	adrp	x0, .LANCHOR145
+	ldr	x26, [x0, #:lo12:.LANCHOR145]
+	bcc	.L1490
+.L1484:
+	mov	w21, w27
+	b	.L1482
+.L1490:
+	mov	w28, w7
+	b	.L1486
 	.size	micron_read_retrial, .-micron_read_retrial
 	.section	.text.toshiba_3d_read_retrial,"ax",@progbits
 	.align	2
 	.global	toshiba_3d_read_retrial
 	.type	toshiba_3d_read_retrial, %function
 toshiba_3d_read_retrial:
-	stp	x29, x30, [sp, -128]!
-	and	w6, w1, 255
+	stp	x29, x30, [sp, -144]!
 	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	mov	w23, w1
+	stp	x27, x28, [sp, 80]
+	mov	w28, w4
+	ubfx	x4, x23, 24, 2
+	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR17
+	and	w24, w0, 255
 	stp	x25, x26, [sp, 64]
-	and	w25, w0, 255
-	stp	x27, x28, [sp, 80]
 	mov	x27, x3
-	stp	x23, x24, [sp, 48]
-	mov	x28, x4
-	mov	w23, w2
-	stp	x19, x20, [sp, 16]
-	str	w5, [x29, 124]
+	mov	x26, x2
 	bl	nandc_wait_flash_ready
 	adrp	x0, .LANCHOR21
+	adrp	x22, .LANCHOR17
 	mov	w1, 46
 	mov	w2, 56
-	ldr	x26, [x0, #:lo12:.LANCHOR21]
-	and	x0, x25, 255
+	ldr	x25, [x0, #:lo12:.LANCHOR21]
+	and	x0, x24, 255
 	add	x21, x0, 8
-	str	x0, [x29, 112]
+	str	x0, [x29, 128]
 	ldrb	w0, [x22, #:lo12:.LANCHOR17]
-	add	x21, x26, x21, lsl 8
+	mov	w19, -1
+	add	x21, x25, x21, lsl 8
+	mov	w20, 1
 	cmp	w0, 36
 	mov	w0, 26
 	csel	w1, w2, w1, ne
-	str	w1, [x29, 96]
+	str	w1, [x29, 120]
 	mov	w1, 10
 	csel	w0, w1, w0, ne
-	str	w0, [x29, 104]
-	cbnz	w6, .L1498
-	sxtw	x24, w25
+	str	w0, [x29, 136]
 	add	x0, x22, :lo12:.LANCHOR17
-	add	x24, x24, 8
-	mov	w19, -1
-	add	x24, x26, x24, lsl 8
-	mov	w20, 1
-	str	x0, [x29, 96]
-.L1505:
-	ldr	x0, [x29, 96]
+	cbnz	w4, .L1505
+	str	x0, [x29, 120]
+	sxtw	x0, w24
+	add	x0, x0, 8
+	add	x0, x25, x0, lsl 8
+	str	x0, [x29, 112]
+.L1512:
+	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, 36
-	bne	.L1499
+	bne	.L1506
+	mov	w1, w20
 	mov	x0, x21
 	mov	w2, 0
-	mov	w1, w20
 	bl	toshiba_tlc_set_rr_para
+	ldr	x1, [x29, 112]
 	mov	w0, 93
-	str	w0, [x24, 8]
-.L1500:
-	ldr	w4, [x29, 124]
-	mov	x3, x28
-	mov	x2, x27
+	str	w0, [x1, 8]
+.L1507:
+	mov	w4, w28
+	mov	x3, x27
+	mov	x2, x26
 	mov	w1, w23
-	mov	w0, w25
+	mov	w0, w24
 	bl	flash_read_page
 	mov	w4, w0
 	adrp	x0, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 4, .L1501
+	tbz	x0, 4, .L1508
 	mov	w3, w4
-	str	w4, [x29, 120]
+	str	w4, [x29, 108]
 	mov	w2, w23
 	mov	w1, w20
 	adrp	x0, .LC94
 	add	x0, x0, :lo12:.LC94
 	bl	printf
-	ldr	w4, [x29, 120]
-.L1501:
+	ldr	w4, [x29, 108]
+.L1508:
 	cmn	w4, #1
-	beq	.L1502
-	adrp	x0, .LANCHOR140
+	beq	.L1509
+	adrp	x0, .LANCHOR143
 	cmn	w19, #1
 	csel	w19, w19, w4, ne
-	ldr	x27, [x0, #:lo12:.LANCHOR140]
-	adrp	x0, .LANCHOR142
-	ldr	x28, [x0, #:lo12:.LANCHOR142]
+	ldr	x26, [x0, #:lo12:.LANCHOR143]
+	adrp	x0, .LANCHOR145
+	ldr	x27, [x0, #:lo12:.LANCHOR145]
 	adrp	x0, .LANCHOR40
 	ldrb	w0, [x0, #:lo12:.LANCHOR40]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1520
-.L1502:
-	ldr	w0, [x29, 104]
+	bcc	.L1527
+.L1509:
+	ldr	w0, [x29, 136]
 	add	w20, w20, 1
 	cmp	w0, w20
-	bne	.L1505
-.L1504:
+	bne	.L1512
+.L1511:
 	ldrb	w0, [x22, #:lo12:.LANCHOR17]
 	cmp	w0, 36
-	bne	.L1506
+	bne	.L1513
 	mov	w2, 0
-.L1543:
+.L1550:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_tlc_set_rr_para
-	b	.L1507
-.L1499:
+	b	.L1514
+.L1506:
 	mov	w1, w20
 	mov	x0, x21
 	bl	toshiba_3d_set_slc_rr_para
-	b	.L1500
-.L1520:
+	b	.L1507
+.L1527:
 	mov	w19, w4
-	b	.L1504
-.L1506:
+	b	.L1511
+.L1513:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_3d_set_slc_rr_para
-.L1507:
+.L1514:
 	ldrb	w0, [x22, #:lo12:.LANCHOR17]
 	cmp	w0, 36
-	bne	.L1516
-	ldr	x0, [x29, 112]
-	add	x26, x26, x0, lsl 8
+	bne	.L1523
+	ldr	x0, [x29, 128]
+	add	x25, x25, x0, lsl 8
 	mov	w0, 85
-	str	w0, [x26, 2056]
+	str	w0, [x25, 2056]
 	mov	w0, 255
-	str	wzr, [x26, 2052]
-	str	wzr, [x26, 2048]
-	str	w0, [x26, 2056]
-.L1516:
+	str	wzr, [x25, 2052]
+	str	wzr, [x25, 2048]
+	str	w0, [x25, 2056]
+.L1523:
 	adrp	x0, .LANCHOR40
 	ldrb	w0, [x0, #:lo12:.LANCHOR40]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L1517
+	bcc	.L1524
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L1517:
+.L1524:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L1518
+	bne	.L1525
 	adrp	x0, .LC96
 	mov	w4, w19
 	mov	w3, w20
@@ -9105,7 +9168,7 @@ toshiba_3d_read_retrial:
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC96
 	bl	printf
-.L1518:
+.L1525:
 	bl	nandc_wait_flash_ready
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
@@ -9113,86 +9176,84 @@ toshiba_3d_read_retrial:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 128
+	ldp	x29, x30, [sp], 144
 	ret
-.L1498:
-	sxtw	x24, w25
-	orr	w23, w23, w6, lsl 24
-	add	x24, x24, 8
-	add	x0, x22, :lo12:.LANCHOR17
-	add	x24, x26, x24, lsl 8
-	mov	w19, -1
-	mov	w20, 1
-	str	x0, [x29, 104]
-.L1514:
-	ldr	x0, [x29, 104]
+.L1505:
+	str	x0, [x29, 112]
+	sxtw	x0, w24
+	add	x0, x0, 8
+	add	x0, x25, x0, lsl 8
+	str	x0, [x29, 136]
+.L1521:
+	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
 	cmp	w0, 36
-	bne	.L1508
+	bne	.L1515
 	mov	x0, x21
 	mov	w2, 1
 	mov	w1, w20
 	bl	toshiba_tlc_set_rr_para
 	mov	w0, 93
-.L1542:
-	str	w0, [x24, 8]
-	mov	x3, x28
-	mov	x2, x27
+.L1549:
+	ldr	x1, [x29, 136]
+	mov	w4, w28
+	mov	x3, x27
+	mov	x2, x26
+	str	w0, [x1, 8]
 	mov	w1, w23
-	ldr	w4, [x29, 124]
-	mov	w0, w25
+	mov	w0, w24
 	bl	flash_read_page
 	mov	w4, w0
 	adrp	x0, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 4, .L1510
+	tbz	x0, 4, .L1517
 	mov	w3, w4
-	str	w4, [x29, 120]
+	str	w4, [x29, 108]
 	mov	w2, w23
 	mov	w1, w20
 	adrp	x0, .LC95
 	add	x0, x0, :lo12:.LC95
 	bl	printf
-	ldr	w4, [x29, 120]
-.L1510:
+	ldr	w4, [x29, 108]
+.L1517:
 	cmn	w4, #1
-	beq	.L1511
-	adrp	x0, .LANCHOR140
+	beq	.L1518
+	adrp	x0, .LANCHOR143
 	cmn	w19, #1
 	csel	w19, w19, w4, ne
-	ldr	x27, [x0, #:lo12:.LANCHOR140]
-	adrp	x0, .LANCHOR142
-	ldr	x28, [x0, #:lo12:.LANCHOR142]
+	ldr	x26, [x0, #:lo12:.LANCHOR143]
+	adrp	x0, .LANCHOR145
+	ldr	x27, [x0, #:lo12:.LANCHOR145]
 	adrp	x0, .LANCHOR40
 	ldrb	w0, [x0, #:lo12:.LANCHOR40]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1521
-.L1511:
-	ldr	w0, [x29, 96]
+	bcc	.L1528
+.L1518:
+	ldr	w0, [x29, 120]
 	add	w20, w20, 1
 	cmp	w0, w20
-	bne	.L1514
-.L1513:
+	bne	.L1521
+.L1520:
 	ldrb	w0, [x22, #:lo12:.LANCHOR17]
 	cmp	w0, 36
-	bne	.L1515
+	bne	.L1522
 	mov	w2, 1
-	b	.L1543
-.L1508:
+	b	.L1550
+.L1515:
 	mov	x0, x21
 	mov	w1, w20
 	bl	toshiba_3d_set_tlc_rr_para
 	mov	w0, 38
-	b	.L1542
-.L1521:
+	b	.L1549
+.L1528:
 	mov	w19, w4
-	b	.L1513
-.L1515:
+	b	.L1520
+.L1522:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_3d_set_tlc_rr_para
-	b	.L1507
+	b	.L1514
 	.size	toshiba_3d_read_retrial, .-toshiba_3d_read_retrial
 	.section	.text.toshiba_read_retrial,"ax",@progbits
 	.align	2
@@ -9202,64 +9263,67 @@ toshiba_read_retrial:
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	stp	x27, x28, [sp, 80]
-	mov	x27, x3
-	stp	x19, x20, [sp, 16]
-	mov	x28, x4
 	stp	x25, x26, [sp, 64]
+	mov	w25, w1
+	stp	x19, x20, [sp, 16]
+	mov	x26, x2
+	stp	x27, x28, [sp, 80]
 	and	w19, w0, 255
 	stp	x23, x24, [sp, 48]
-	and	x26, x19, 255
-	stp	w5, w2, [x29, 120]
+	mov	x27, x3
+	str	w4, [x29, 116]
 	bl	nandc_wait_flash_ready
 	adrp	x0, .LANCHOR21
 	adrp	x1, .LANCHOR17
-	str	x1, [x29, 112]
-	add	x21, x26, 8
+	str	x1, [x29, 120]
 	ldr	x22, [x0, #:lo12:.LANCHOR21]
+	and	x0, x19, 255
+	add	x21, x0, 8
+	str	x0, [x29, 104]
 	ldrb	w0, [x1, #:lo12:.LANCHOR17]
-	sub	w0, w0, #67
 	add	x21, x22, x21, lsl 8
+	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
-	bls	.L1562
+	bls	.L1569
 	adrp	x0, .LANCHOR14
 	ldrb	w0, [x0, #:lo12:.LANCHOR14]
-	cbz	w0, .L1563
+	cbz	w0, .L1570
 	mov	w23, 1
 	mov	w0, 1
 	bl	nandc_set_if_mode
-.L1546:
-	add	x0, x22, x26, lsl 8
+.L1553:
+	and	x0, x19, 255
 	mov	w1, 92
+	add	x0, x22, x0, lsl 8
 	str	w1, [x0, 2056]
 	mov	w1, 197
 	str	w1, [x0, 2056]
-.L1545:
+.L1552:
 	sxtw	x0, w19
 	mov	w20, 1
 	add	x0, x0, 8
 	mov	w24, -1
 	add	x0, x22, x0, lsl 8
-	str	x0, [x29, 104]
-.L1547:
-	adrp	x0, .LANCHOR143
-	ldrb	w0, [x0, #:lo12:.LANCHOR143]
+	str	x0, [x29, 96]
+.L1554:
+	adrp	x0, .LANCHOR146
+	ldrb	w0, [x0, #:lo12:.LANCHOR146]
 	add	w0, w0, 1
 	cmp	w20, w0
-	bcc	.L1556
-	mov	w25, w24
-.L1555:
-	ldr	x0, [x29, 112]
+	bcc	.L1563
+	mov	w28, w24
+.L1562:
+	ldr	x0, [x29, 120]
 	mov	w1, 0
 	ldrb	w0, [x0, #:lo12:.LANCHOR17]
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x21
-	bhi	.L1557
+	bhi	.L1564
 	bl	sandisk_set_rr_para
-.L1558:
+.L1565:
 	sxtw	x19, w19
 	mov	w0, 255
 	add	x19, x19, 8
@@ -9268,29 +9332,29 @@ toshiba_read_retrial:
 	adrp	x0, .LANCHOR40
 	ldrb	w0, [x0, #:lo12:.LANCHOR40]
 	add	w0, w0, w0, lsl 1
-	cmp	w25, w0, lsr 2
-	bcc	.L1559
-	cmn	w25, #1
+	cmp	w28, w0, lsr 2
+	bcc	.L1566
+	cmn	w28, #1
 	mov	w0, 256
-	csel	w25, w25, w0, eq
-.L1559:
-	cmp	w25, 256
-	ccmn	w25, #1, 4, ne
-	bne	.L1560
-	ldr	w2, [x29, 124]
+	csel	w28, w28, w0, eq
+.L1566:
+	cmp	w28, 256
+	ccmn	w28, #1, 4, ne
+	bne	.L1567
 	adrp	x0, .LC96
-	mov	w4, w25
+	mov	w4, w28
 	mov	w3, w20
+	mov	w2, w25
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC96
 	bl	printf
-.L1560:
+.L1567:
 	bl	nandc_wait_flash_ready
-	cbz	w23, .L1544
+	cbz	w23, .L1551
 	mov	w0, 4
 	bl	nandc_set_if_mode
-.L1544:
-	mov	w0, w25
+.L1551:
+	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9298,70 +9362,71 @@ toshiba_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1563:
+.L1570:
 	mov	w23, 0
-	b	.L1546
-.L1562:
+	b	.L1553
+.L1569:
 	mov	w23, 0
-	b	.L1545
-.L1556:
-	ldr	x0, [x29, 112]
+	b	.L1552
+.L1563:
+	ldr	x0, [x29, 120]
 	mov	w1, w20
 	ldrb	w0, [x0, #:lo12:.LANCHOR17]
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x21
-	bhi	.L1548
+	bhi	.L1555
 	bl	sandisk_set_rr_para
-.L1549:
-	ldr	x0, [x29, 112]
+.L1556:
+	ldr	x0, [x29, 120]
 	ldrb	w0, [x0, #:lo12:.LANCHOR17]
 	cmp	w0, 34
-	bne	.L1550
-	adrp	x0, .LANCHOR143
-	ldrb	w0, [x0, #:lo12:.LANCHOR143]
+	bne	.L1557
+	adrp	x0, .LANCHOR146
+	ldrb	w0, [x0, #:lo12:.LANCHOR146]
 	sub	w0, w0, #3
 	cmp	w20, w0
-	bne	.L1550
-	ldr	x1, [x29, 104]
+	bne	.L1557
+	ldr	x1, [x29, 96]
 	mov	w0, 179
 	str	w0, [x1, 8]
-.L1550:
-	add	x0, x22, x26, lsl 8
+.L1557:
+	ldr	x0, [x29, 104]
 	mov	w1, 38
-	ldr	w4, [x29, 120]
-	mov	x3, x28
-	mov	x2, x27
+	ldr	w4, [x29, 116]
+	mov	x3, x27
+	mov	x2, x26
+	add	x0, x22, x0, lsl 8
 	str	w1, [x0, 2056]
 	mov	w1, 93
 	str	w1, [x0, 2056]
+	mov	w1, w25
 	mov	w0, w19
-	ldr	w1, [x29, 124]
 	bl	flash_read_page
-	mov	w25, w0
+	mov	w28, w0
 	cmn	w0, #1
-	beq	.L1553
+	beq	.L1560
 	cmn	w24, #1
 	csel	w24, w24, w0, ne
-	adrp	x0, .LANCHOR140
-	ldr	x27, [x0, #:lo12:.LANCHOR140]
-	adrp	x0, .LANCHOR142
-	ldr	x28, [x0, #:lo12:.LANCHOR142]
+	adrp	x0, .LANCHOR143
+	ldr	x26, [x0, #:lo12:.LANCHOR143]
+	adrp	x0, .LANCHOR145
+	ldr	x27, [x0, #:lo12:.LANCHOR145]
 	adrp	x0, .LANCHOR40
 	ldrb	w0, [x0, #:lo12:.LANCHOR40]
 	add	w0, w0, w0, lsl 1
-	cmp	w25, w0, lsr 2
-	bcc	.L1555
-.L1553:
+	cmp	w28, w0, lsr 2
+	bcc	.L1562
+.L1560:
 	add	w20, w20, 1
-	b	.L1547
-.L1548:
+	b	.L1554
+.L1555:
 	bl	toshiba_set_rr_para
-	b	.L1549
-.L1557:
+	b	.L1556
+.L1564:
 	bl	toshiba_set_rr_para
-	b	.L1558
+	b	.L1565
 	.size	toshiba_read_retrial, .-toshiba_read_retrial
 	.section	.text.hynix_read_retrial,"ax",@progbits
 	.align	2
@@ -9375,15 +9440,15 @@ hynix_read_retrial:
 	adrp	x0, .LANCHOR20
 	stp	x27, x28, [sp, 80]
 	stp	x21, x22, [sp, 32]
-	mov	w27, w5
+	mov	w27, w4
 	ldr	x28, [x0, #:lo12:.LANCHOR20]
-	mov	w22, w2
+	mov	w22, w1
 	stp	x25, x26, [sp, 64]
-	mov	x25, x3
+	mov	x25, x2
 	add	x28, x28, 112
 	stp	x19, x20, [sp, 16]
 	add	x0, x28, x23
-	mov	x26, x4
+	mov	x26, x3
 	mov	x21, x23
 	mov	w19, -1
 	ldrb	w24, [x28, 2]
@@ -9392,26 +9457,26 @@ hynix_read_retrial:
 	adrp	x6, .LANCHOR40
 	add	x6, x6, :lo12:.LANCHOR40
 	mov	w5, 0
-	adrp	x7, .LANCHOR140
-	adrp	x8, .LANCHOR142
-.L1577:
+	adrp	x7, .LANCHOR143
+	adrp	x8, .LANCHOR145
+.L1584:
 	cmp	w5, w24
-	bcc	.L1582
-.L1581:
+	bcc	.L1589
+.L1588:
 	adrp	x0, .LANCHOR40
 	add	x23, x28, x23
 	ldrb	w0, [x0, #:lo12:.LANCHOR40]
 	strb	w20, [x23, 8]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L1583
+	bcc	.L1590
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L1583:
+.L1590:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L1576
+	bne	.L1583
 	adrp	x0, .LC97
 	mov	w4, w19
 	mov	w3, w5
@@ -9419,7 +9484,7 @@ hynix_read_retrial:
 	mov	w1, w5
 	add	x0, x0, :lo12:.LC97
 	bl	printf
-.L1576:
+.L1583:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9428,7 +9493,7 @@ hynix_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1582:
+.L1589:
 	add	w20, w20, 1
 	stp	x6, x8, [x29, 96]
 	and	w20, w20, 255
@@ -9449,21 +9514,21 @@ hynix_read_retrial:
 	cmn	w0, #1
 	ldp	x6, x8, [x29, 96]
 	ldr	x7, [x29, 112]
-	beq	.L1579
+	beq	.L1586
 	ldrb	w1, [x6]
 	cmn	w19, #1
 	csel	w19, w19, w0, ne
-	ldr	x25, [x7, #:lo12:.LANCHOR140]
-	ldr	x26, [x8, #:lo12:.LANCHOR142]
+	ldr	x25, [x7, #:lo12:.LANCHOR143]
+	ldr	x26, [x8, #:lo12:.LANCHOR145]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L1585
-.L1579:
+	bcc	.L1592
+.L1586:
 	add	w5, w5, 1
-	b	.L1577
-.L1585:
+	b	.L1584
+.L1592:
 	mov	w19, w0
-	b	.L1581
+	b	.L1588
 	.size	hynix_read_retrial, .-hynix_read_retrial
 	.section	.text.flash_ddr_tunning_read,"ax",@progbits
 	.align	2
@@ -9499,7 +9564,7 @@ flash_ddr_tunning_read:
 	mov	w19, -1
 	str	wzr, [x29, 140]
 	str	x0, [x29, 112]
-.L1601:
+.L1608:
 	mov	w0, w25
 	bl	nandc_set_ddr_para
 	ldr	w4, [x29, 120]
@@ -9511,7 +9576,7 @@ flash_ddr_tunning_read:
 	mov	w4, w0
 	ldr	x0, [x29, 112]
 	ldr	w0, [x0]
-	tbz	x0, 4, .L1596
+	tbz	x0, 4, .L1603
 	mov	w3, w4
 	str	w4, [x29, 108]
 	mov	w2, w20
@@ -9519,51 +9584,51 @@ flash_ddr_tunning_read:
 	mov	x0, x21
 	bl	printf
 	ldr	w4, [x29, 108]
-.L1596:
+.L1603:
 	add	w0, w27, 1
 	cmp	w4, w0
-	bhi	.L1597
-	adrp	x0, .LANCHOR140
-	ldr	x0, [x0, #:lo12:.LANCHOR140]
+	bhi	.L1604
+	adrp	x0, .LANCHOR143
+	ldr	x0, [x0, #:lo12:.LANCHOR143]
 	str	x0, [x29, 128]
-	adrp	x0, .LANCHOR142
-	ldr	x26, [x0, #:lo12:.LANCHOR142]
+	adrp	x0, .LANCHOR145
+	ldr	x26, [x0, #:lo12:.LANCHOR145]
 	ldrb	w0, [x22]
 	cmp	w4, w0, lsr 2
-	bcs	.L1606
+	bcs	.L1613
 	add	w24, w24, 1
 	cmp	w24, 7
-	bls	.L1606
+	bls	.L1613
 	sub	w28, w25, w24
 	mov	w27, w4
 	mov	w19, 0
-.L1599:
+.L1606:
 	ldr	w0, [x29, 140]
 	cmp	w24, w23
 	csel	w28, w28, w0, cs
-.L1600:
-	cbz	w28, .L1602
+.L1607:
+	cbz	w28, .L1609
 	adrp	x0, .LANCHOR40
 	mov	w1, 3
 	ldrb	w0, [x0, #:lo12:.LANCHOR40]
 	udiv	w0, w0, w1
 	cmp	w0, w27
-	bls	.L1602
+	bls	.L1609
 	mov	w1, w28
 	adrp	x0, .LC99
 	add	x0, x0, :lo12:.LC99
 	bl	printf
 	mov	w0, w28
-.L1616:
+.L1623:
 	bl	nandc_set_ddr_para
-	cbz	w19, .L1595
+	cbz	w19, .L1602
 	ldr	w1, [x29, 136]
 	adrp	x0, .LC100
 	mov	w2, w20
 	add	x0, x0, :lo12:.LC100
 	mov	w27, w19
 	bl	printf
-.L1595:
+.L1602:
 	mov	w0, w27
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9572,29 +9637,29 @@ flash_ddr_tunning_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1597:
+.L1604:
 	cmp	w24, w23
-	bls	.L1607
+	bls	.L1614
 	sub	w0, w28, w24
 	str	w0, [x29, 140]
 	cmp	w24, 7
-	bhi	.L1600
+	bhi	.L1607
 	mov	w23, w24
-.L1607:
+.L1614:
 	mov	w24, 0
-	b	.L1598
-.L1606:
+	b	.L1605
+.L1613:
 	mov	w28, w25
 	mov	w27, w4
 	mov	w19, 0
-.L1598:
+.L1605:
 	add	w25, w25, 2
 	cmp	w25, 50
-	bne	.L1601
-	b	.L1599
-.L1602:
+	bne	.L1608
+	b	.L1606
+.L1609:
 	ldrb	w0, [x29, 124]
-	b	.L1616
+	b	.L1623
 	.size	flash_ddr_tunning_read, .-flash_ddr_tunning_read
 	.section	.text.flash_read_page_en,"ax",@progbits
 	.align	2
@@ -9617,43 +9682,43 @@ flash_read_page_en:
 	mov	w24, w4
 	ubfx	x21, x19, 24, 2
 	cmp	w0, w20
-	bhi	.L1618
-	adrp	x1, .LANCHOR144
+	bhi	.L1625
+	adrp	x1, .LANCHOR147
 	adrp	x0, .LC0
 	mov	w2, 378
-	add	x1, x1, :lo12:.LANCHOR144
+	add	x1, x1, :lo12:.LANCHOR147
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1618:
+.L1625:
 	adrp	x0, .LANCHOR24
 	add	x0, x0, :lo12:.LANCHOR24
 	ldrb	w20, [x0, w20, sxtw]
 	adrp	x0, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 4, .L1619
+	tbz	x0, 4, .L1626
 	adrp	x0, .LC101
 	mov	w2, w19
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC101
 	bl	printf
-.L1619:
-	cbnz	w21, .L1620
+.L1626:
+	cbnz	w21, .L1627
 	adrp	x0, .LANCHOR11
 	adrp	x1, .LANCHOR25
 	ldrb	w0, [x0, #:lo12:.LANCHOR11]
-	cbz	w0, .L1621
+	cbz	w0, .L1628
 	ldrb	w0, [x1, #:lo12:.LANCHOR25]
-	cbz	w0, .L1620
-.L1621:
+	cbz	w0, .L1627
+.L1628:
 	adrp	x0, .LANCHOR26
 	ldrb	w1, [x1, #:lo12:.LANCHOR25]
 	ldrh	w2, [x0, #:lo12:.LANCHOR26]
 	udiv	w0, w19, w2
 	mul	w0, w0, w2
 	sub	w19, w19, w0
-	cbz	w1, .L1622
+	cbz	w1, .L1629
 	add	w19, w0, w19, lsl 1
-.L1620:
+.L1627:
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -9662,16 +9727,16 @@ flash_read_page_en:
 	bl	flash_read_page
 	mov	w21, w0
 	cmn	w0, #1
-	bne	.L1617
+	bne	.L1624
 	adrp	x25, .LANCHOR42
 	mov	x26, x25
 	ldrb	w27, [x25, #:lo12:.LANCHOR42]
-	cbnz	w27, .L1624
-.L1627:
-	adrp	x0, .LANCHOR145
-	ldr	x6, [x0, #:lo12:.LANCHOR145]
-	cbnz	x6, .L1625
-.L1626:
+	cbnz	w27, .L1631
+.L1634:
+	adrp	x0, .LANCHOR148
+	ldr	x5, [x0, #:lo12:.LANCHOR148]
+	cbnz	x5, .L1632
+.L1633:
 	ldrb	w4, [x26, #:lo12:.LANCHOR42]
 	mov	w3, -1
 	mov	w2, w19
@@ -9681,7 +9746,7 @@ flash_read_page_en:
 	bl	printf
 	adrp	x0, .LANCHOR14
 	ldrb	w0, [x0, #:lo12:.LANCHOR14]
-	cbz	w0, .L1617
+	cbz	w0, .L1624
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -9694,13 +9759,13 @@ flash_read_page_en:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	b	flash_ddr_tunning_read
-.L1622:
+.L1629:
 	adrp	x1, .LANCHOR27
 	add	x1, x1, :lo12:.LANCHOR27
 	ldrh	w19, [x1, w19, uxtw 1]
 	add	w19, w19, w0
-	b	.L1620
-.L1624:
+	b	.L1627
+.L1631:
 	strb	wzr, [x25, #:lo12:.LANCHOR42]
 	mov	w4, w24
 	mov	x3, x23
@@ -9710,10 +9775,10 @@ flash_read_page_en:
 	bl	flash_read_page
 	strb	w27, [x25, #:lo12:.LANCHOR42]
 	cmn	w0, #1
-	beq	.L1627
-.L1645:
+	beq	.L1634
+.L1652:
 	mov	w21, w0
-.L1617:
+.L1624:
 	mov	w0, w21
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -9722,17 +9787,16 @@ flash_read_page_en:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1625:
-	mov	w5, w24
-	mov	x4, x23
-	mov	x3, x22
-	mov	w2, w19
-	mov	w1, 0
+.L1632:
+	mov	w4, w24
+	mov	x3, x23
+	mov	x2, x22
+	mov	w1, w19
 	mov	w0, w20
-	blr	x6
+	blr	x5
 	cmn	w0, #1
-	beq	.L1626
-	b	.L1645
+	beq	.L1633
+	b	.L1652
 	.size	flash_read_page_en, .-flash_read_page_en
 	.section	.text.flash_get_last_written_page,"ax",@progbits
 	.align	2
@@ -9743,11 +9807,11 @@ flash_get_last_written_page:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	w23, w0, 255
-	adrp	x0, .LANCHOR125
+	adrp	x0, .LANCHOR128
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
 	mov	x24, x2
-	ldrh	w19, [x0, #:lo12:.LANCHOR125]
+	ldrh	w19, [x0, #:lo12:.LANCHOR128]
 	adrp	x0, .LANCHOR32+26
 	stp	x21, x22, [sp, 32]
 	and	w21, w1, 65535
@@ -9762,23 +9826,23 @@ flash_get_last_written_page:
 	add	w1, w19, w26
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L1647
+	bne	.L1654
 	mov	w27, 0
 	mov	w28, 2
-.L1648:
+.L1655:
 	cmp	w27, w19
-	ble	.L1651
-.L1647:
+	ble	.L1658
+.L1654:
 	adrp	x0, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L1652
+	tbz	x0, 12, .L1659
 	ldr	w3, [x22]
 	adrp	x0, .LC103
 	mov	w2, w19
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC103
 	bl	printf
-.L1652:
+.L1659:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9787,7 +9851,7 @@ flash_get_last_written_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1651:
+.L1658:
 	add	w20, w27, w19
 	mov	w4, w25
 	mov	x3, x22
@@ -9797,14 +9861,14 @@ flash_get_last_written_page:
 	add	w1, w26, w20, sxth
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L1649
+	bne	.L1656
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L1648
-.L1649:
+	b	.L1655
+.L1656:
 	add	w20, w20, 1
 	sxth	w27, w20
-	b	.L1648
+	b	.L1655
 	.size	flash_get_last_written_page, .-flash_get_last_written_page
 	.section	.text.flash_get_last_written_page_ext,"ax",@progbits
 	.align	2
@@ -9841,46 +9905,46 @@ flash_info_blk_init:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	tbz	x0, 12, .L1659
+	tbz	x0, 12, .L1666
 	ldr	x4, [x20, #:lo12:.LANCHOR20]
-	adrp	x2, .LANCHOR146
+	adrp	x2, .LANCHOR149
 	adrp	x0, .LC104
 	mov	w3, 2048
-	add	x2, x2, :lo12:.LANCHOR146
+	add	x2, x2, :lo12:.LANCHOR149
 	mov	w1, 49
 	add	x0, x0, :lo12:.LC104
 	bl	printf
-.L1659:
-	adrp	x21, .LANCHOR147
+.L1666:
+	adrp	x21, .LANCHOR150
 	adrp	x23, .LANCHOR26
 	mov	w24, 21321
 	add	x26, x23, :lo12:.LANCHOR26
 	mov	x22, x21
 	mov	w19, 4
 	movk	w24, 0x5359, lsl 16
-.L1662:
+.L1669:
 	ldrh	w1, [x26]
 	mov	w4, 4
-	ldr	x3, [x21, #:lo12:.LANCHOR147]
+	ldr	x3, [x21, #:lo12:.LANCHOR150]
 	mov	w0, 0
 	ldr	x2, [x20, #:lo12:.LANCHOR20]
-	add	x27, x21, :lo12:.LANCHOR147
+	add	x27, x21, :lo12:.LANCHOR150
 	add	x25, x20, :lo12:.LANCHOR20
 	mul	w1, w1, w19
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L1660
+	beq	.L1667
 	ldr	x2, [x20, #:lo12:.LANCHOR20]
 	ldr	w0, [x2]
 	cmp	w0, w24
-	beq	.L1661
-.L1660:
+	beq	.L1668
+.L1667:
 	add	w19, w19, 1
 	cmp	w19, 16
-	bne	.L1662
-.L1686:
+	bne	.L1669
+.L1693:
 	mov	w0, -1
-.L1658:
+.L1665:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9888,16 +9952,16 @@ flash_info_blk_init:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1670:
+.L1677:
 	ldr	x0, [x25]
 	ldr	w1, [x0]
 	cmp	w1, w24
-	bne	.L1671
+	bne	.L1678
 	ldr	w19, [x0, 4]
-.L1664:
-	add	x24, x21, :lo12:.LANCHOR148
+.L1671:
+	add	x24, x21, :lo12:.LANCHOR151
 	ldrh	w0, [x23, #:lo12:.LANCHOR26]
-	ldr	x3, [x22, #:lo12:.LANCHOR147]
+	ldr	x3, [x22, #:lo12:.LANCHOR150]
 	mov	w4, 4
 	ldr	x2, [x20, #:lo12:.LANCHOR20]
 	ldrb	w1, [x24, 1]
@@ -9905,85 +9969,85 @@ flash_info_blk_init:
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L1665
+	beq	.L1672
 	ldr	x0, [x20, #:lo12:.LANCHOR20]
 	mov	w1, 21321
 	movk	w1, 0x5359, lsl 16
 	ldr	w2, [x0]
 	cmp	w2, w1
-	bne	.L1665
+	bne	.L1672
 	ldr	w1, [x0, 4]
 	cmp	w19, w1
-	bcs	.L1665
+	bcs	.L1672
 	ldrb	w1, [x0, 37]
 	ldrb	w0, [x0, 36]
-	strb	w1, [x21, #:lo12:.LANCHOR148]
+	strb	w1, [x21, #:lo12:.LANCHOR151]
 	strb	w0, [x24, 1]
-.L1665:
-	ldrb	w1, [x21, #:lo12:.LANCHOR148]
-	add	x24, x21, :lo12:.LANCHOR148
-	ldr	x3, [x22, #:lo12:.LANCHOR147]
+.L1672:
+	ldrb	w1, [x21, #:lo12:.LANCHOR151]
+	add	x24, x21, :lo12:.LANCHOR151
+	ldr	x3, [x22, #:lo12:.LANCHOR150]
 	mov	w4, 4
 	ldr	x2, [x20, #:lo12:.LANCHOR20]
 	mov	w0, 0
 	bl	flash_get_last_written_page
 	sxth	w19, w0
 	add	w0, w0, 1
-	ldrb	w21, [x21, #:lo12:.LANCHOR148]
+	ldrb	w21, [x21, #:lo12:.LANCHOR151]
 	strh	w0, [x24, 2]
 	ldrh	w0, [x23, #:lo12:.LANCHOR26]
 	mov	w23, 21321
 	movk	w23, 0x5359, lsl 16
 	madd	w21, w21, w0, w19
-.L1666:
-	tbz	w19, #31, .L1668
+.L1673:
+	tbz	w19, #31, .L1675
 	cmn	w19, #1
-	bne	.L1669
+	bne	.L1676
 	ldr	x0, [x20, #:lo12:.LANCHOR20]
 	ldr	w1, [x0]
 	adrp	x0, .LC105
 	add	x0, x0, :lo12:.LC105
 	bl	printf
-	b	.L1686
-.L1668:
-	ldr	x3, [x22, #:lo12:.LANCHOR147]
+	b	.L1693
+.L1675:
+	ldr	x3, [x22, #:lo12:.LANCHOR150]
 	mov	w4, 4
 	ldr	x2, [x20, #:lo12:.LANCHOR20]
 	mov	w1, w21
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L1667
+	beq	.L1674
 	ldr	x0, [x20, #:lo12:.LANCHOR20]
 	ldr	w0, [x0]
 	cmp	w0, w23
-	bne	.L1667
-.L1669:
+	bne	.L1674
+.L1676:
 	mov	w0, 0
-	b	.L1658
-.L1667:
+	b	.L1665
+.L1674:
 	sub	w19, w19, #1
 	sub	w21, w21, #1
 	sxth	w19, w19
-	b	.L1666
-.L1661:
-	adrp	x21, .LANCHOR148
-	add	x1, x21, :lo12:.LANCHOR148
+	b	.L1673
+.L1668:
+	adrp	x21, .LANCHOR151
+	add	x1, x21, :lo12:.LANCHOR151
 	ldrb	w3, [x2, 37]
 	mov	w4, 4
 	ldrb	w0, [x2, 36]
 	strb	w3, [x1, 1]
 	ldrh	w1, [x26]
 	ldr	x3, [x27]
-	strb	w0, [x21, #:lo12:.LANCHOR148]
+	strb	w0, [x21, #:lo12:.LANCHOR151]
 	mul	w1, w1, w0
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	bne	.L1670
-.L1671:
+	bne	.L1677
+.L1678:
 	mov	w19, 0
-	b	.L1664
+	b	.L1671
 	.size	flash_info_blk_init, .-flash_info_blk_init
 	.section	.text.flash_ddr_para_scan,"ax",@progbits
 	.align	2
@@ -10003,34 +10067,34 @@ flash_ddr_para_scan:
 	mov	w23, w1
 	str	x25, [sp, 64]
 	strb	w21, [x19, #:lo12:.LANCHOR14]
-	adrp	x24, .LANCHOR150
+	adrp	x24, .LANCHOR153
 	bl	flash_set_interface_mode
-	adrp	x25, .LANCHOR149
+	adrp	x25, .LANCHOR152
 	ldrb	w0, [x20, #:lo12:.LANCHOR39]
 	bl	nandc_set_if_mode
-	ldr	x3, [x25, #:lo12:.LANCHOR149]
+	ldr	x3, [x25, #:lo12:.LANCHOR152]
 	mov	w4, 4
-	ldr	x2, [x24, #:lo12:.LANCHOR150]
+	ldr	x2, [x24, #:lo12:.LANCHOR153]
 	mov	w1, w23
 	mov	w0, w22
 	bl	flash_ddr_tunning_read
-	ldr	x3, [x25, #:lo12:.LANCHOR149]
+	ldr	x3, [x25, #:lo12:.LANCHOR152]
 	mov	w4, 4
-	ldr	x2, [x24, #:lo12:.LANCHOR150]
+	ldr	x2, [x24, #:lo12:.LANCHOR153]
 	mov	w1, w23
 	mov	w0, w22
 	bl	flash_read_page
 	cmn	w0, #1
 	mov	x0, x19
-	bne	.L1688
+	bne	.L1695
 	ldrb	w1, [x20, #:lo12:.LANCHOR39]
-	tbz	x1, 0, .L1688
+	tbz	x1, 0, .L1695
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, w21
 	bl	nandc_set_if_mode
 	strb	wzr, [x19, #:lo12:.LANCHOR14]
-.L1689:
+.L1696:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -10038,10 +10102,10 @@ flash_ddr_para_scan:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1688:
+.L1695:
 	mov	w1, 1
 	strb	w1, [x0, #:lo12:.LANCHOR14]
-	b	.L1689
+	b	.L1696
 	.size	flash_ddr_para_scan, .-flash_ddr_para_scan
 	.section	.text.flash_complete_page_read,"ax",@progbits
 	.align	2
@@ -10064,14 +10128,14 @@ flash_complete_page_read:
 	mov	x25, x2
 	ubfx	x21, x23, 24, 2
 	cmp	w0, w20
-	bhi	.L1695
-	adrp	x1, .LANCHOR151
+	bhi	.L1702
+	adrp	x1, .LANCHOR154
 	adrp	x0, .LC0
 	mov	w2, 789
-	add	x1, x1, :lo12:.LANCHOR151
+	add	x1, x1, :lo12:.LANCHOR154
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1695:
+.L1702:
 	adrp	x0, .LANCHOR24
 	add	x0, x0, :lo12:.LANCHOR24
 	ldrb	w22, [x0, w20, sxtw]
@@ -10079,23 +10143,23 @@ flash_complete_page_read:
 	ldr	x4, [x0, #:lo12:.LANCHOR21]
 	mov	w0, w22
 	bl	nandc_cs
-	cbnz	w21, .L1696
+	cbnz	w21, .L1703
 	adrp	x0, .LANCHOR11
 	adrp	x1, .LANCHOR25
 	ldrb	w0, [x0, #:lo12:.LANCHOR11]
-	cbz	w0, .L1697
+	cbz	w0, .L1704
 	ldrb	w0, [x1, #:lo12:.LANCHOR25]
-	cbz	w0, .L1696
-.L1697:
+	cbz	w0, .L1703
+.L1704:
 	adrp	x0, .LANCHOR26
 	ldrb	w1, [x1, #:lo12:.LANCHOR25]
 	ldrh	w2, [x0, #:lo12:.LANCHOR26]
 	udiv	w0, w19, w2
 	mul	w0, w0, w2
 	sub	w19, w19, w0
-	cbz	w1, .L1698
+	cbz	w1, .L1705
 	add	w19, w0, w19, lsl 1
-.L1696:
+.L1703:
 	ubfiz	x0, x22, 8, 8
 	mov	w1, 5
 	add	x0, x4, x0
@@ -10114,12 +10178,12 @@ flash_complete_page_read:
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1699
-	cbz	w21, .L1699
+	bne	.L1706
+	cbz	w21, .L1706
 	sub	w0, w21, #1
 	add	w1, w19, w19, lsl 1
 	add	w0, w0, w1
-.L1732:
+.L1739:
 	adrp	x20, .LANCHOR32
 	add	x28, x20, :lo12:.LANCHOR32
 	bl	nandc_set_seed
@@ -10130,10 +10194,10 @@ flash_complete_page_read:
 	mov	w0, w22
 	bl	nandc_xfer
 	cmn	w0, #1
-	bne	.L1701
+	bne	.L1708
 	adrp	x26, .LANCHOR42
 	ldrb	w27, [x26, #:lo12:.LANCHOR42]
-	cbz	w27, .L1702
+	cbz	w27, .L1709
 	ldrb	w4, [x28, 9]
 	mov	x3, x25
 	strb	wzr, [x26, #:lo12:.LANCHOR42]
@@ -10142,16 +10206,16 @@ flash_complete_page_read:
 	mov	w0, w22
 	bl	flash_read_page
 	strb	w27, [x26, #:lo12:.LANCHOR42]
-	cbnz	w21, .L1703
-.L1708:
+	cbnz	w21, .L1710
+.L1715:
 	adrp	x1, .LANCHOR11
 	ldrb	w1, [x1, #:lo12:.LANCHOR11]
-	cbz	w1, .L1703
+	cbz	w1, .L1710
 	adrp	x1, .LANCHOR40
 	ldrb	w1, [x1, #:lo12:.LANCHOR40]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	blt	.L1703
+	blt	.L1710
 	add	x20, x20, :lo12:.LANCHOR32
 	ldrb	w1, [x20, 19]
 	sub	w1, w1, #4
@@ -10159,7 +10223,7 @@ flash_complete_page_read:
 	cmp	w1, 3
 	mov	w1, 256
 	csel	w0, w0, w1, hi
-.L1694:
+.L1701:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -10167,23 +10231,23 @@ flash_complete_page_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1698:
+.L1705:
 	adrp	x1, .LANCHOR27
 	add	x1, x1, :lo12:.LANCHOR27
 	ldrh	w19, [x1, w19, uxtw 1]
 	add	w19, w19, w0
-	b	.L1696
-.L1699:
+	b	.L1703
+.L1706:
 	mov	w0, w19
-	b	.L1732
-.L1703:
+	b	.L1739
+.L1710:
 	cmn	w0, #1
-	bne	.L1694
-.L1709:
-	adrp	x0, .LANCHOR145
-	ldr	x6, [x0, #:lo12:.LANCHOR145]
-	cbnz	x6, .L1705
-.L1707:
+	bne	.L1701
+.L1716:
+	adrp	x0, .LANCHOR148
+	ldr	x5, [x0, #:lo12:.LANCHOR148]
+	cbnz	x5, .L1712
+.L1714:
 	adrp	x0, .LANCHOR42
 	mov	w3, -1
 	mov	w2, w23
@@ -10194,22 +10258,21 @@ flash_complete_page_read:
 	bl	printf
 	adrp	x0, .LANCHOR14
 	ldrb	w0, [x0, #:lo12:.LANCHOR14]
-	cbnz	w0, .L1706
+	cbnz	w0, .L1713
 	mov	w0, -1
-	b	.L1694
-.L1705:
+	b	.L1701
+.L1712:
 	add	x0, x20, :lo12:.LANCHOR32
-	mov	x4, x25
-	mov	x3, x24
-	mov	w2, w19
-	mov	w1, w21
-	ldrb	w5, [x0, 9]
+	mov	x3, x25
+	mov	x2, x24
+	orr	w1, w19, w21, lsl 24
+	ldrb	w4, [x0, 9]
 	mov	w0, w22
-	blr	x6
+	blr	x5
 	cmn	w0, #1
-	beq	.L1707
-	b	.L1694
-.L1706:
+	beq	.L1714
+	b	.L1701
+.L1713:
 	add	x20, x20, :lo12:.LANCHOR32
 	orr	w1, w19, w21, lsl 24
 	mov	x3, x25
@@ -10223,30 +10286,30 @@ flash_complete_page_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	flash_ddr_tunning_read
-.L1702:
-	cbz	w21, .L1708
-	b	.L1709
-.L1701:
-	cbnz	w21, .L1694
-	b	.L1708
+.L1709:
+	cbz	w21, .L1715
+	b	.L1716
+.L1708:
+	cbnz	w21, .L1701
+	b	.L1715
 	.size	flash_complete_page_read, .-flash_complete_page_read
 	.section	.text.queue_wait_first_req_completed,"ax",@progbits
 	.align	2
 	.type	queue_wait_first_req_completed, %function
 queue_wait_first_req_completed:
 	stp	x29, x30, [sp, -64]!
-	adrp	x0, .LANCHOR117
+	adrp	x0, .LANCHOR120
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	ldrb	w0, [x0, #:lo12:.LANCHOR117]
+	ldrb	w0, [x0, #:lo12:.LANCHOR120]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	cmp	w0, 255
-	bne	.L1734
-.L1752:
+	bne	.L1741
+.L1759:
 	mov	w21, 0
-	b	.L1733
-.L1734:
+	b	.L1740
+.L1741:
 	adrp	x19, .LANCHOR46
 	sxtw	x22, w0
 	add	x1, x19, :lo12:.LANCHOR46
@@ -10255,34 +10318,34 @@ queue_wait_first_req_completed:
 	ldr	w21, [x1, 40]
 	sub	w3, w2, #1
 	cmp	w3, 9
-	bhi	.L1752
-	adrp	x1, .L1737
-	add	x1, x1, :lo12:.L1737
+	bhi	.L1759
+	adrp	x1, .L1744
+	add	x1, x1, :lo12:.L1744
 	ldrb	w1, [x1,w3,uxtw]
-	adr	x3, .Lrtx1737
+	adr	x3, .Lrtx1744
 	add	x1, x3, w1, sxtb #2
 	br	x1
-.Lrtx1737:
+.Lrtx1744:
 	.section	.rodata.queue_wait_first_req_completed,"a",@progbits
 	.align	0
 	.align	2
-.L1737:
-	.byte	(.L1736 - .Lrtx1737) / 4
-	.byte	(.L1736 - .Lrtx1737) / 4
-	.byte	(.L1738 - .Lrtx1737) / 4
-	.byte	(.L1738 - .Lrtx1737) / 4
-	.byte	(.L1738 - .Lrtx1737) / 4
-	.byte	(.L1739 - .Lrtx1737) / 4
-	.byte	(.L1740 - .Lrtx1737) / 4
-	.byte	(.L1741 - .Lrtx1737) / 4
-	.byte	(.L1738 - .Lrtx1737) / 4
-	.byte	(.L1741 - .Lrtx1737) / 4
+.L1744:
+	.byte	(.L1743 - .Lrtx1744) / 4
+	.byte	(.L1743 - .Lrtx1744) / 4
+	.byte	(.L1745 - .Lrtx1744) / 4
+	.byte	(.L1745 - .Lrtx1744) / 4
+	.byte	(.L1745 - .Lrtx1744) / 4
+	.byte	(.L1746 - .Lrtx1744) / 4
+	.byte	(.L1747 - .Lrtx1744) / 4
+	.byte	(.L1748 - .Lrtx1744) / 4
+	.byte	(.L1745 - .Lrtx1744) / 4
+	.byte	(.L1748 - .Lrtx1744) / 4
 	.section	.text.queue_wait_first_req_completed
-.L1736:
+.L1743:
 	mov	w1, 64
 	mov	w0, w21
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1752
+	tbz	x0, 6, .L1759
 	add	x19, x19, :lo12:.LANCHOR46
 	add	x19, x19, x22, lsl 6
 	ldp	x1, x0, [x19, 8]
@@ -10297,18 +10360,18 @@ queue_wait_first_req_completed:
 	ldrb	w0, [x19, 2]
 	orr	w0, w0, 8
 	strb	w0, [x19, 2]
-	b	.L1752
-.L1738:
+	b	.L1759
+.L1745:
 	mov	w0, w21
 	mov	w1, 64
 	bl	flash_wait_device_ready
 	mov	w21, w0
-	tbz	x21, 6, .L1752
+	tbz	x21, 6, .L1759
 	add	x19, x19, :lo12:.LANCHOR46
 	mov	w0, 5
 	add	x19, x19, x22, lsl 6
 	tst	w21, w0
-	beq	.L1751
+	beq	.L1758
 	ldrb	w1, [x19, 1]
 	mov	w0, 11
 	ldr	w3, [x19, 40]
@@ -10318,11 +10381,11 @@ queue_wait_first_req_completed:
 	adrp	x0, .LC107
 	add	x0, x0, :lo12:.LC107
 	bl	printf
-.L1770:
+.L1777:
 	mov	w0, -1
 	str	w0, [x19, 52]
-	b	.L1733
-.L1741:
+	b	.L1740
+.L1748:
 	cmp	w2, 10
 	add	x20, x19, :lo12:.LANCHOR46
 	ubfiz	x0, x0, 6, 8
@@ -10331,33 +10394,33 @@ queue_wait_first_req_completed:
 	add	x0, x20, x0
 	csel	w2, w2, w1, eq
 	ubfx	x3, x21, 21, 3
-.L1746:
+.L1753:
 	ldrb	w1, [x0]
 	cmp	w1, 255
-	bne	.L1750
+	bne	.L1757
 	mov	w21, -1
-	b	.L1733
-.L1750:
+	b	.L1740
+.L1757:
 	sxtw	x23, w1
 	ubfiz	x0, x1, 6, 8
 	add	x1, x20, x23, lsl 6
 	add	x0, x20, x0
 	ldrb	w4, [x1, 58]
 	cmp	w4, w2
-	bne	.L1746
+	bne	.L1753
 	ldr	w1, [x1, 40]
 	ubfx	x1, x1, 21, 3
 	cmp	w3, w1
-	bne	.L1746
+	bne	.L1753
 	mov	w0, w21
 	mov	w1, 64
 	bl	flash_wait_device_ready
 	mov	w24, w0
 	and	w21, w0, 64
-	tbz	x24, 6, .L1748
+	tbz	x24, 6, .L1755
 	add	x20, x20, x22, lsl 6
 	ands	w21, w0, 15
-	beq	.L1749
+	beq	.L1756
 	ldrb	w1, [x20, 1]
 	mov	w4, 11
 	ldr	w3, [x20, 40]
@@ -10370,7 +10433,7 @@ queue_wait_first_req_completed:
 	strb	w0, [x20, 58]
 	mov	w0, -1
 	str	w0, [x20, 52]
-.L1748:
+.L1755:
 	add	x1, x19, :lo12:.LANCHOR46
 	add	x22, x1, x22, lsl 6
 	add	x1, x1, x23, lsl 6
@@ -10378,47 +10441,47 @@ queue_wait_first_req_completed:
 	strb	w0, [x1, 58]
 	ldr	w0, [x22, 52]
 	str	w0, [x1, 52]
-.L1733:
+.L1740:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1749:
+.L1756:
 	mov	w0, 12
 	str	wzr, [x20, 52]
 	strb	w0, [x20, 58]
-	b	.L1748
-.L1739:
+	b	.L1755
+.L1746:
 	mov	w0, w21
 	mov	w1, 32
 	bl	flash_wait_device_ready
 	mov	w21, w0
-	tbz	x21, 5, .L1752
+	tbz	x21, 5, .L1759
 	add	x19, x19, :lo12:.LANCHOR46
 	tst	x21, 15
 	add	x19, x19, x22, lsl 6
-	beq	.L1751
+	beq	.L1758
 	mov	w0, 11
 	strb	w0, [x19, 58]
-	b	.L1770
-.L1751:
+	b	.L1777
+.L1758:
 	mov	w0, 12
 	str	wzr, [x19, 52]
 	strb	w0, [x19, 58]
-	b	.L1752
-.L1740:
+	b	.L1759
+.L1747:
 	mov	w1, 64
 	mov	w0, w21
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1752
+	tbz	x0, 6, .L1759
 	add	x19, x19, :lo12:.LANCHOR46
 	add	x19, x19, x22, lsl 6
 	str	w0, [x19, 52]
 	mov	w0, 6
 	strb	w0, [x19, 58]
-	b	.L1752
+	b	.L1759
 	.size	queue_wait_first_req_completed, .-queue_wait_first_req_completed
 	.section	.text.sblk_wait_write_queue_completed,"ax",@progbits
 	.align	2
@@ -10428,19 +10491,19 @@ sblk_wait_write_queue_completed:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR117
-	add	x19, x19, :lo12:.LANCHOR117
-.L1772:
+	adrp	x19, .LANCHOR120
+	add	x19, x19, :lo12:.LANCHOR120
+.L1779:
 	ldrb	w0, [x19]
 	cmp	w0, 255
-	bne	.L1773
+	bne	.L1780
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1773:
+.L1780:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L1772
+	b	.L1779
 	.size	sblk_wait_write_queue_completed, .-sblk_wait_write_queue_completed
 	.section	.text.ftl_read_page,"ax",@progbits
 	.align	2
@@ -10504,9 +10567,9 @@ ftl_open_sblk_read_test:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	adrp	x23, .LANCHOR80
-	adrp	x24, .LANCHOR114
+	adrp	x24, .LANCHOR117
 	add	x23, x23, :lo12:.LANCHOR80
-	add	x24, x24, :lo12:.LANCHOR114
+	add	x24, x24, :lo12:.LANCHOR117
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	add	x1, x29, 80
@@ -10514,45 +10577,45 @@ ftl_open_sblk_read_test:
 	bl	ftl_get_blk_list_in_sblk
 	strb	w0, [x29, 73]
 	strh	w14, [x29, 64]
-.L1780:
+.L1787:
 	ldrh	w0, [x23]
 	cmp	w0, w20
-	bls	.L1779
+	bls	.L1786
 	adrp	x22, .LANCHOR72
-	adrp	x21, .LANCHOR152
+	adrp	x21, .LANCHOR155
 	mov	w19, 0
 	add	x22, x22, :lo12:.LANCHOR72
-	add	x21, x21, :lo12:.LANCHOR152
-	b	.L1782
-.L1785:
+	add	x21, x21, :lo12:.LANCHOR155
+	b	.L1789
+.L1792:
 	add	x0, x29, 64
 	mov	w1, 65535
 	add	x0, x0, x19, sxtw 1
 	ldrh	w0, [x0, 16]
 	cmp	w0, w1
-	bne	.L1781
-.L1784:
+	bne	.L1788
+.L1791:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-.L1782:
+.L1789:
 	ldrb	w0, [x22]
 	cmp	w0, w19
-	bhi	.L1785
+	bhi	.L1792
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L1780
-.L1781:
-	adrp	x1, .LANCHOR99
+	b	.L1787
+.L1788:
+	adrp	x1, .LANCHOR103
 	ldrb	w3, [x24]
 	mov	x2, x21
-	ldrh	w4, [x1, #:lo12:.LANCHOR99]
+	ldrh	w4, [x1, #:lo12:.LANCHOR103]
 	adrp	x1, ftl_tmp_buffer
 	add	x1, x1, :lo12:ftl_tmp_buffer
 	madd	w0, w4, w0, w20
 	bl	ftl_read_ppa_page
 	cmp	w0, 512
-	bne	.L1784
-.L1779:
+	bne	.L1791
+.L1786:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -10572,19 +10635,19 @@ sblk_read_page:
 	mov	w22, w21
 	stp	x23, x24, [sp, 48]
 	mov	x20, x0
-	adrp	x23, .LANCHOR117
+	adrp	x23, .LANCHOR120
 	adrp	x24, .LANCHOR46
 	mov	x19, x0
-	add	x23, x23, :lo12:.LANCHOR117
+	add	x23, x23, :lo12:.LANCHOR120
 	add	x24, x24, :lo12:.LANCHOR46
 	stp	x25, x26, [sp, 64]
-.L1791:
-	cbnz	w22, .L1795
-.L1803:
+.L1798:
+	cbnz	w22, .L1802
+.L1810:
 	adrp	x19, .LANCHOR46
 	add	x19, x19, :lo12:.LANCHOR46
-.L1796:
-	cbnz	w21, .L1799
+.L1803:
+	cbnz	w21, .L1806
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10592,14 +10655,14 @@ sblk_read_page:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1795:
+.L1802:
 	ldrb	w25, [x19]
 	ldr	w26, [x19, 40]
-.L1792:
+.L1799:
 	mov	w1, 0
 	mov	w0, w26
 	bl	queue_lun_state
-	cbnz	w0, .L1793
+	cbnz	w0, .L1800
 	ldr	w1, [x19, 40]
 	mov	w0, 48
 	bl	flash_start_page_read
@@ -10612,26 +10675,26 @@ sblk_read_page:
 	mov	x0, x23
 	bl	buf_add_tail
 	subs	w22, w22, #1
-	beq	.L1803
+	beq	.L1810
 	ubfiz	x19, x25, 6, 8
 	add	x19, x24, x19
-	b	.L1791
-.L1793:
+	b	.L1798
+.L1800:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L1792
-.L1799:
+	b	.L1799
+.L1806:
 	ldrb	w0, [x20, 58]
 	cmp	w0, 12
-	bne	.L1797
+	bne	.L1804
 	ldrb	w20, [x20]
 	sub	w21, w21, #1
 	add	x20, x19, x20, lsl 6
-	b	.L1796
-.L1797:
+	b	.L1803
+.L1804:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L1796
+	b	.L1803
 	.size	sblk_read_page, .-sblk_read_page
 	.section	.text.gc_check_data_one_wl,"ax",@progbits
 	.align	2
@@ -10651,80 +10714,80 @@ gc_check_data_one_wl:
 	ldr	x0, [x20, 8]
 	stp	x25, x26, [sp, 80]
 	str	x27, [sp, 96]
-	cbnz	x0, .L1806
+	cbnz	x0, .L1813
 	mov	w0, 1
 	bl	buf_alloc
 	str	x0, [x20, 8]
-.L1806:
+.L1813:
 	add	x0, x19, :lo12:.LANCHOR63
 	ldr	x20, [x0, 8]
-	cbnz	x20, .L1807
-	adrp	x1, .LANCHOR153
+	cbnz	x20, .L1814
+	adrp	x1, .LANCHOR156
 	adrp	x0, .LC0
 	mov	w2, 348
-	add	x1, x1, :lo12:.LANCHOR153
+	add	x1, x1, :lo12:.LANCHOR156
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1807:
-	adrp	x26, .LANCHOR99
+.L1814:
+	adrp	x26, .LANCHOR103
 	adrp	x27, .LANCHOR67
 	add	x25, x21, 96
-	add	x26, x26, :lo12:.LANCHOR99
+	add	x26, x26, :lo12:.LANCHOR103
 	add	x27, x27, :lo12:.LANCHOR67
 	mov	w24, 0
-.L1808:
+.L1815:
 	ldrb	w0, [x21, 89]
 	cmp	w24, w0
-	bge	.L1817
+	bge	.L1824
 	mov	w23, 1
 	add	x22, x19, :lo12:.LANCHOR63
-	b	.L1818
-.L1816:
+	b	.L1825
+.L1823:
 	ldrh	w0, [x25]
 	ldrh	w1, [x26]
 	ldrb	w2, [x27]
 	cmp	w2, 3
 	mul	w1, w0, w1
 	ldrh	w0, [x22, 16]
-	bne	.L1809
+	bne	.L1816
 	add	w0, w0, w1
 	orr	w0, w0, w23, lsl 24
-.L1829:
+.L1836:
 	str	w0, [x20, 40]
 	mov	w1, 1
 	mov	x0, x20
 	bl	sblk_read_page
 	ldr	w2, [x20, 52]
-	adrp	x1, .LANCHOR136
+	adrp	x1, .LANCHOR139
 	cmn	w2, #1
-	beq	.L1812
+	beq	.L1819
 	ldrh	w0, [x22, 22]
-	ldr	x4, [x1, #:lo12:.LANCHOR136]
+	ldr	x4, [x1, #:lo12:.LANCHOR139]
 	ldr	x3, [x20, 24]
 	lsl	x0, x0, 2
 	ldr	w5, [x4, x0]
 	ldr	w4, [x3, 4]
 	cmp	w5, w4
-	bne	.L1812
-	adrp	x4, .LANCHOR137
-	ldr	x4, [x4, #:lo12:.LANCHOR137]
+	bne	.L1819
+	adrp	x4, .LANCHOR140
+	ldr	x4, [x4, #:lo12:.LANCHOR140]
 	ldr	w4, [x4, x0]
 	ldr	w0, [x3, 8]
 	cmp	w4, w0
-	beq	.L1813
-.L1812:
+	beq	.L1820
+.L1819:
 	ldrh	w0, [x22, 22]
-	ldr	x1, [x1, #:lo12:.LANCHOR136]
+	ldr	x1, [x1, #:lo12:.LANCHOR139]
 	lsl	x0, x0, 2
 	ldr	w3, [x1, x0]
 	cmn	w3, #1
-	beq	.L1813
+	beq	.L1820
 	adrp	x1, .LANCHOR7
 	ldr	w1, [x1, #:lo12:.LANCHOR7]
-	tbz	x1, 10, .L1814
+	tbz	x1, 10, .L1821
 	ldr	x1, [x20, 24]
-	adrp	x4, .LANCHOR137
-	ldr	x4, [x4, #:lo12:.LANCHOR137]
+	adrp	x4, .LANCHOR140
+	ldr	x4, [x4, #:lo12:.LANCHOR140]
 	ldr	w5, [x1, 12]
 	str	w5, [sp]
 	ldr	w4, [x4, x0]
@@ -10734,13 +10797,13 @@ gc_check_data_one_wl:
 	ldr	w7, [x1, 8]
 	ldr	w1, [x20, 40]
 	bl	printf
-.L1814:
+.L1821:
 	adrp	x0, .LANCHOR4
 	ldrh	w1, [x21, 80]
 	ldr	x0, [x0, #:lo12:.LANCHOR4]
 	strh	wzr, [x0, x1, lsl 1]
 	mov	w0, -1
-.L1805:
+.L1812:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -10749,37 +10812,37 @@ gc_check_data_one_wl:
 	ldr	x27, [sp, 96]
 	add	sp, sp, 112
 	ret
-.L1809:
+.L1816:
 	cmp	w2, 2
-	bne	.L1811
+	bne	.L1818
 	sub	w0, w0, #1
 	add	w1, w23, w1
 	add	w0, w0, w1
 	orr	w0, w0, 33554432
-	b	.L1829
-.L1811:
+	b	.L1836
+.L1818:
 	add	w0, w0, w1
-	b	.L1829
-.L1813:
+	b	.L1836
+.L1820:
 	ldrh	w0, [x22, 22]
 	add	w23, w23, 1
 	add	w0, w0, 1
 	strh	w0, [x22, 22]
-.L1818:
+.L1825:
 	ldrh	w0, [x22, 20]
 	cmp	w23, w0
-	ble	.L1816
+	ble	.L1823
 	add	w24, w24, 1
 	add	x25, x25, 2
-	b	.L1808
-.L1817:
-.L1815:
+	b	.L1815
+.L1824:
+.L1822:
 	add	x19, x19, :lo12:.LANCHOR63
 	ldrh	w0, [x19, 16]
 	add	w0, w0, 1
 	strh	w0, [x19, 16]
 	mov	w0, 0
-	b	.L1805
+	b	.L1812
 	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
 	.section	.text.flash_prog_page,"ax",@progbits
 	.align	2
@@ -10806,22 +10869,22 @@ flash_prog_page:
 	add	x23, x25, x23, lsl 8
 	and	w24, w1, 2097151
 	ubfx	x28, x21, 24, 2
-	tbz	x0, 4, .L1831
+	tbz	x0, 4, .L1838
 	adrp	x0, .LC109
 	mov	w3, w4
 	mov	w2, w28
 	add	x0, x0, :lo12:.LC109
 	bl	printf
-.L1831:
+.L1838:
 	bl	nandc_wait_flash_ready
 	mov	w0, w20
 	bl	hynix_reconfig_rr_para
 	mov	w0, w20
 	bl	nandc_cs
 	mov	w0, w20
-	cbnz	w28, .L1832
+	cbnz	w28, .L1839
 	bl	zftl_flash_enter_slc_mode
-.L1833:
+.L1840:
 	add	x19, x25, x19, lsl 8
 	mov	w0, 128
 	str	w0, [x19, 2056]
@@ -10851,15 +10914,15 @@ flash_prog_page:
 	mov	w0, w20
 	bl	nandc_de_cs
 	and	w19, w2, 4
-	tbz	x2, 2, .L1830
+	tbz	x2, 2, .L1837
 	ldr	w0, [x22, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L1830
+	tbz	x0, 12, .L1837
 	adrp	x0, .LC110
 	mov	w2, w19
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC110
 	bl	printf
-.L1830:
+.L1837:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10868,9 +10931,9 @@ flash_prog_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1832:
+.L1839:
 	bl	zftl_flash_exit_slc_mode
-	b	.L1833
+	b	.L1840
 	.size	flash_prog_page, .-flash_prog_page
 	.section	.text.flash_test_blk,"ax",@progbits
 	.align	2
@@ -10884,19 +10947,19 @@ flash_test_blk:
 	stp	x21, x22, [sp, 32]
 	ands	w21, w0, 255
 	str	x23, [sp, 48]
-	bne	.L1846
-	adrp	x0, .LANCHOR154
-	ldrb	w0, [x0, #:lo12:.LANCHOR154]
+	bne	.L1853
+	adrp	x0, .LANCHOR157
+	ldrb	w0, [x0, #:lo12:.LANCHOR157]
 	cmp	w0, w19
-	bhi	.L1850
-.L1846:
-	adrp	x22, .LANCHOR149
-	adrp	x23, .LANCHOR150
+	bhi	.L1857
+.L1853:
+	adrp	x22, .LANCHOR152
+	adrp	x23, .LANCHOR153
 	mov	w2, 32
 	mov	w1, 165
-	ldr	x0, [x22, #:lo12:.LANCHOR149]
+	ldr	x0, [x22, #:lo12:.LANCHOR152]
 	bl	ftl_memset
-	ldr	x0, [x23, #:lo12:.LANCHOR150]
+	ldr	x0, [x23, #:lo12:.LANCHOR153]
 	mov	w2, 8
 	mov	w1, 90
 	bl	ftl_memset
@@ -10907,54 +10970,54 @@ flash_test_blk:
 	mov	w1, w20
 	bl	flash_erase_block
 	cmn	w0, #1
-	beq	.L1848
+	beq	.L1855
 	adrp	x19, .LANCHOR32
 	add	x19, x19, :lo12:.LANCHOR32
-	ldr	x3, [x22, #:lo12:.LANCHOR149]
+	ldr	x3, [x22, #:lo12:.LANCHOR152]
 	mov	w1, w20
-	ldr	x2, [x23, #:lo12:.LANCHOR150]
+	ldr	x2, [x23, #:lo12:.LANCHOR153]
 	mov	w0, w21
 	ldrb	w4, [x19, 9]
 	bl	flash_prog_page
 	cmn	w0, #1
-	beq	.L1848
+	beq	.L1855
 	ldrb	w4, [x19, 9]
 	mov	w1, w20
-	ldr	x3, [x22, #:lo12:.LANCHOR149]
+	ldr	x3, [x22, #:lo12:.LANCHOR152]
 	mov	w0, w21
-	ldr	x2, [x23, #:lo12:.LANCHOR150]
+	ldr	x2, [x23, #:lo12:.LANCHOR153]
 	bl	flash_read_page
 	mov	w19, w0
 	cmn	w0, #1
-	beq	.L1848
-	ldr	x0, [x23, #:lo12:.LANCHOR150]
+	beq	.L1855
+	ldr	x0, [x23, #:lo12:.LANCHOR153]
 	ldr	w1, [x0]
 	mov	w0, 23130
 	movk	w0, 0x5a5a, lsl 16
 	cmp	w1, w0
-	bne	.L1848
-	ldr	x0, [x22, #:lo12:.LANCHOR149]
+	bne	.L1855
+	ldr	x0, [x22, #:lo12:.LANCHOR152]
 	ldr	w1, [x0]
 	mov	w0, 42405
 	movk	w0, 0xa5a5, lsl 16
 	cmp	w1, w0
-	beq	.L1849
-.L1848:
+	beq	.L1856
+.L1855:
 	mov	w19, -1
-.L1849:
+.L1856:
 	mov	w1, w20
 	mov	w0, w21
 	bl	flash_erase_block
 	mov	w0, w19
-.L1845:
+.L1852:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1850:
+.L1857:
 	mov	w0, 0
-	b	.L1845
+	b	.L1852
 	.size	flash_test_blk, .-flash_test_blk
 	.section	.text.id_block_prog_msb_ff_data,"ax",@progbits
 	.align	2
@@ -10965,50 +11028,50 @@ id_block_prog_msb_ff_data:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	and	w22, w0, 255
-	adrp	x0, .LANCHOR155
+	adrp	x0, .LANCHOR158
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
-	ldrb	w0, [x0, #:lo12:.LANCHOR155]
+	ldrb	w0, [x0, #:lo12:.LANCHOR158]
 	str	x25, [sp, 64]
-	cbnz	w0, .L1861
+	cbnz	w0, .L1868
 	adrp	x20, .LANCHOR32
 	add	x20, x20, :lo12:.LANCHOR32
 	ldrb	w0, [x20, 19]
 	sub	w0, w0, #5
 	and	w3, w0, 255
 	cmp	w3, 63
-	bhi	.L1861
+	bhi	.L1868
 	and	w19, w2, 65535
 	mov	x2, 16391
 	movk	x2, 0x4000, lsl 16
 	movk	x2, 0x8000, lsl 48
 	lsr	x0, x2, x3
-	tbz	x0, 0, .L1861
-	adrp	x21, .LANCHOR123
+	tbz	x0, 0, .L1868
+	adrp	x21, .LANCHOR126
 	mov	w23, w1
-	add	x21, x21, :lo12:.LANCHOR123
+	add	x21, x21, :lo12:.LANCHOR126
 	mov	w25, 65535
-	adrp	x24, .LANCHOR140
-.L1863:
+	adrp	x24, .LANCHOR143
+.L1870:
 	ldrh	w0, [x20, 10]
 	cmp	w0, w19
-	bhi	.L1864
-.L1861:
+	bhi	.L1871
+.L1868:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1864:
+.L1871:
 	ldrh	w0, [x21, w19, sxtw 1]
 	cmp	w0, w25
-	bne	.L1861
-	ldr	x0, [x24, #:lo12:.LANCHOR140]
+	bne	.L1868
+	ldr	x0, [x24, #:lo12:.LANCHOR143]
 	mov	w2, 16384
 	mov	w1, 255
 	bl	ftl_memset
-	ldr	x3, [x24, #:lo12:.LANCHOR140]
+	ldr	x3, [x24, #:lo12:.LANCHOR143]
 	add	w1, w19, w23
 	ldrb	w4, [x20, 9]
 	add	w19, w19, 1
@@ -11016,7 +11079,7 @@ id_block_prog_msb_ff_data:
 	mov	w0, w22
 	and	w19, w19, 65535
 	bl	flash_prog_page
-	b	.L1863
+	b	.L1870
 	.size	id_block_prog_msb_ff_data, .-id_block_prog_msb_ff_data
 	.section	.text.idb_write_data,"ax",@progbits
 	.align	2
@@ -11033,16 +11096,16 @@ idb_write_data:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	bls	.L1867
+	bls	.L1874
 	cmp	w1, 575
-	bhi	.L1868
-	adrp	x0, .LANCHOR156
+	bhi	.L1875
+	adrp	x0, .LANCHOR159
 	mov	x1, x2
 	mov	w2, 1
 	cmp	w4, 64
-	str	w2, [x0, #:lo12:.LANCHOR156]
+	str	w2, [x0, #:lo12:.LANCHOR159]
 	adrp	x0, idb_buf
-	bhi	.L1869
+	bhi	.L1876
 	mov	w2, 64
 	sub	w4, w2, w4
 	sub	w2, w3, w4
@@ -11050,9 +11113,9 @@ idb_write_data:
 	lsl	w2, w2, 9
 	add	x1, x1, x4
 	add	x0, x0, :lo12:idb_buf
-.L1945:
+.L1952:
 	bl	ftl_memcpy
-.L1924:
+.L1931:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -11061,7 +11124,7 @@ idb_write_data:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 256
 	ret
-.L1869:
+.L1876:
 	mov	w2, 576
 	sub	w2, w2, w4
 	cmp	w3, w2
@@ -11071,14 +11134,14 @@ idb_write_data:
 	add	x0, x0, :lo12:idb_buf
 	lsl	w2, w2, 9
 	add	x0, x0, x4
-	b	.L1945
-.L1867:
+	b	.L1952
+.L1874:
 	cmp	w1, 575
-	bls	.L1924
-.L1868:
-	adrp	x0, .LANCHOR156
-	ldr	w0, [x0, #:lo12:.LANCHOR156]
-	cbz	w0, .L1924
+	bls	.L1931
+.L1875:
+	adrp	x0, .LANCHOR159
+	ldr	w0, [x0, #:lo12:.LANCHOR159]
+	cbz	w0, .L1931
 	adrp	x3, .LANCHOR32
 	add	x1, x3, :lo12:.LANCHOR32
 	str	x3, [x29, 176]
@@ -11100,9 +11163,9 @@ idb_write_data:
 	cmp	w27, 512
 	csel	w27, w27, w0, lt
 	mov	w0, 0
-.L1874:
+.L1881:
 	ldr	w5, [x1]
-	cbnz	w5, .L1872
+	cbnz	w5, .L1879
 	ldr	w5, [x6, w0, uxtw 2]
 	add	w0, w0, 1
 	str	w5, [x1], -4
@@ -11110,8 +11173,8 @@ idb_write_data:
 	sub	w2, w2, #1
 	csel	w0, w0, wzr, cc
 	cmp	w2, 4096
-	bne	.L1874
-.L1872:
+	bne	.L1881
+.L1879:
 	add	x0, x3, :lo12:idb_buf
 	mov	w3, w27
 	ldr	w1, [x0, w2, uxtw 2]
@@ -11122,7 +11185,7 @@ idb_write_data:
 	adrp	x0, gp_flash_check_buf
 	add	x0, x0, :lo12:gp_flash_check_buf
 	str	x0, [x29, 184]
-.L1908:
+.L1915:
 	adrp	x0, gp_flash_check_buf
 	add	x20, x0, :lo12:gp_flash_check_buf
 	mov	w1, 0
@@ -11135,7 +11198,7 @@ idb_write_data:
 	add	x0, x0, x1, uxtw
 	ldrb	w0, [x0, 32]
 	cmp	w0, 255
-	beq	.L1875
+	beq	.L1882
 	ldr	w1, [x29, 132]
 	adrp	x19, .LANCHOR42
 	mul	w26, w0, w1
@@ -11155,11 +11218,11 @@ idb_write_data:
 	msub	w23, w23, w22, w26
 	sub	w24, w26, w23
 	cmp	w26, w24
-	bne	.L1914
+	bne	.L1921
 	adrp	x0, .LANCHOR22
 	ldrb	w0, [x0, #:lo12:.LANCHOR22]
 	cmp	w0, 9
-	bne	.L1914
+	bne	.L1921
 	mov	w2, 1024
 	mov	w1, 0
 	mov	x0, x20
@@ -11195,19 +11258,19 @@ idb_write_data:
 	str	w0, [x1, 8]
 	sub	w0, w27, #4
 	str	w0, [x29, 164]
-.L1876:
+.L1883:
 	adrp	x22, idb_buf
-	adrp	x28, .LANCHOR155
+	adrp	x28, .LANCHOR158
 	add	x22, x22, :lo12:idb_buf
-	add	x0, x28, :lo12:.LANCHOR155
+	add	x0, x28, :lo12:.LANCHOR158
 	adrp	x25, .LANCHOR27
 	str	x0, [x29, 152]
 	mov	w20, 0
 	add	x0, x25, :lo12:.LANCHOR27
 	str	x0, [x29, 144]
-.L1878:
+.L1885:
 	cmp	w27, w20
-	bhi	.L1889
+	bhi	.L1896
 	ldr	x0, [x29, 176]
 	add	x25, x19, :lo12:.LANCHOR42
 	strb	wzr, [x19, #:lo12:.LANCHOR42]
@@ -11233,10 +11296,10 @@ idb_write_data:
 	adrp	x0, .LANCHOR27
 	add	x0, x0, :lo12:.LANCHOR27
 	str	x0, [x29, 104]
-.L1890:
+.L1897:
 	ldr	w0, [x29, 160]
 	cmp	w22, w0
-	bcc	.L1904
+	bcc	.L1911
 	adrp	x0, .LANCHOR42
 	ldrb	w1, [x29, 128]
 	adrp	x3, idb_buf
@@ -11245,21 +11308,21 @@ idb_write_data:
 	mov	x1, 0
 	ldr	w0, [x29, 164]
 	lsl	w0, w0, 7
-.L1905:
+.L1912:
 	mov	w19, w1
 	cmp	w1, w0
-	bcc	.L1906
+	bcc	.L1913
 	ldr	w0, [x29, 168]
 	add	w0, w0, 1
 	str	w0, [x29, 168]
 	cmp	w0, 5
-	bls	.L1875
-	b	.L1910
-.L1914:
+	bls	.L1882
+	b	.L1917
+.L1921:
 	mov	x6, 0
 	str	w27, [x29, 164]
-	b	.L1876
-.L1889:
+	b	.L1883
+.L1896:
 	ldr	x2, [x29, 152]
 	add	w5, w23, w20
 	lsr	w5, w5, 2
@@ -11267,30 +11330,30 @@ idb_write_data:
 	add	w1, w5, 1
 	ldrb	w2, [x2]
 	ldrh	w0, [x0, w1, sxtw 1]
-	cbz	w2, .L1880
+	cbz	w2, .L1887
 	adrp	x0, .LANCHOR25
 	ldrb	w3, [x0, #:lo12:.LANCHOR25]
 	lsl	w0, w1, 1
 	cmp	w3, 0
 	csel	w0, w0, w1, ne
-.L1880:
+.L1887:
 	adrp	x1, .LANCHOR22
 	ldrb	w1, [x1, #:lo12:.LANCHOR22]
 	cmp	w1, 9
-	bne	.L1882
-.L1943:
+	bne	.L1889
+.L1950:
 	str	w0, [x29, 192]
 	mov	w0, 61424
 	str	w0, [x29, 196]
 	ldr	x0, [x29, 144]
 	ldrh	w0, [x0, w5, sxtw 1]
-	cbnz	w2, .L1884
+	cbnz	w2, .L1891
 	mov	w5, w0
-.L1885:
+.L1892:
 	mul	w1, w21, w5
 	adrp	x2, .LANCHOR40
 	adrp	x0, .LANCHOR10
-	cbnz	x6, .L1886
+	cbnz	x6, .L1893
 	ldr	x3, [x29, 176]
 	add	w1, w1, w24
 	ldrb	w7, [x2, #:lo12:.LANCHOR40]
@@ -11310,31 +11373,31 @@ idb_write_data:
 	ldr	w7, [x29, 160]
 	mov	w0, w7
 	bl	nandc_bch_sel
-	ldrb	w0, [x28, #:lo12:.LANCHOR155]
+	ldrb	w0, [x28, #:lo12:.LANCHOR158]
 	ldr	w5, [x29, 140]
-	cbnz	w0, .L1887
+	cbnz	w0, .L1894
 	udiv	w1, w24, w21
 	add	w2, w5, 1
 	bl	id_block_prog_msb_ff_data
-.L1887:
+.L1894:
 	add	x22, x22, 2048
-.L1888:
+.L1895:
 	add	w20, w20, 4
 	mov	x6, 0
 	and	w20, w20, 65535
-	b	.L1878
-.L1882:
+	b	.L1885
+.L1889:
 	sub	w0, w0, #1
 	lsl	w0, w0, 2
-	b	.L1943
-.L1884:
+	b	.L1950
+.L1891:
 	adrp	x0, .LANCHOR25
 	ldrb	w1, [x0, #:lo12:.LANCHOR25]
 	lsl	w0, w5, 1
 	cmp	w1, 0
 	csel	w5, w0, w5, ne
-	b	.L1885
-.L1886:
+	b	.L1892
+.L1893:
 	ldr	x3, [x29, 176]
 	add	w1, w1, w24
 	ldrb	w7, [x2, #:lo12:.LANCHOR40]
@@ -11353,21 +11416,21 @@ idb_write_data:
 	ldr	w7, [x29, 160]
 	mov	w0, w7
 	bl	nandc_bch_sel
-	b	.L1888
-.L1904:
+	b	.L1895
+.L1911:
 	add	w19, w28, w22
 	ldr	w0, [x29, 152]
-	adrp	x1, .LANCHOR155
+	adrp	x1, .LANCHOR158
 	sub	w24, w21, w0
 	ldr	x0, [x29, 104]
 	udiv	w19, w19, w21
-	ldrb	w1, [x1, #:lo12:.LANCHOR155]
+	ldrb	w1, [x1, #:lo12:.LANCHOR158]
 	and	w24, w24, 65535
 	and	w19, w19, 65535
 	ldrh	w0, [x0, w19, sxtw 1]
-	cbnz	w1, .L1891
+	cbnz	w1, .L1898
 	mov	w19, w0
-.L1892:
+.L1899:
 	adrp	x0, .LANCHOR10
 	ldr	w1, [x29, 136]
 	ldrb	w23, [x0, #:lo12:.LANCHOR10]
@@ -11387,44 +11450,44 @@ idb_write_data:
 	adrp	x0, .LANCHOR14
 	add	x0, x0, :lo12:.LANCHOR14
 	str	x0, [x29, 112]
-.L1893:
+.L1900:
 	mov	w4, w21
 	add	x3, x29, 192
 	mov	x2, x20
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_read_page
-	mov	w6, w0
+	mov	w5, w0
 	cmn	w0, #1
-	bne	.L1894
-	ldrb	w5, [x25]
-	cbnz	w5, .L1895
-.L1898:
-	adrp	x0, .LANCHOR145
-	ldr	x7, [x0, #:lo12:.LANCHOR145]
-	cbnz	x7, .L1896
-.L1897:
+	bne	.L1901
+	ldrb	w6, [x25]
+	cbnz	w6, .L1902
+.L1905:
+	adrp	x0, .LANCHOR148
+	ldr	x6, [x0, #:lo12:.LANCHOR148]
+	cbnz	x6, .L1903
+.L1904:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
-	cbz	w0, .L1894
+	cbz	w0, .L1901
 	mov	w4, w21
 	add	x3, x29, 192
 	mov	x2, x20
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_ddr_tunning_read
-	b	.L1944
-.L1891:
+	b	.L1951
+.L1898:
 	adrp	x0, .LANCHOR25
 	ldrb	w1, [x0, #:lo12:.LANCHOR25]
 	lsl	w0, w19, 1
 	cmp	w1, 0
 	csel	w19, w0, w19, ne
-	b	.L1892
-.L1895:
-	str	w5, [x29, 100]
+	b	.L1899
+.L1902:
+	str	w6, [x29, 100]
 	mov	w4, w21
-	str	w6, [x29, 120]
+	str	w5, [x29, 120]
 	add	x3, x29, 192
 	strb	wzr, [x25]
 	mov	x2, x20
@@ -11432,37 +11495,36 @@ idb_write_data:
 	mov	w0, 0
 	bl	flash_read_page
 	cmn	w0, #1
-	ldr	w5, [x29, 100]
-	strb	w5, [x25]
-	ldr	w6, [x29, 120]
-	beq	.L1898
-.L1944:
-	mov	w6, w0
-.L1894:
-	cmn	w6, #1
+	ldr	w6, [x29, 100]
+	strb	w6, [x25]
+	ldr	w5, [x29, 120]
+	beq	.L1905
+.L1951:
+	mov	w5, w0
+.L1901:
+	cmn	w5, #1
 	cset	w3, eq
 	cmp	w23, 16
 	cset	w0, ne
 	tst	w3, w0
-	beq	.L1900
+	beq	.L1907
 	mov	w0, 16
 	mov	w23, 16
 	bl	nandc_bch_sel
-	b	.L1893
-.L1896:
-	str	w6, [x29, 120]
-	mov	w5, w21
-	add	x4, x29, 192
-	mov	x3, x20
-	mov	w2, w19
-	mov	w1, 0
+	b	.L1900
+.L1903:
+	str	w5, [x29, 120]
+	mov	w4, w21
+	add	x3, x29, 192
+	mov	x2, x20
+	mov	w1, w19
 	mov	w0, 0
-	blr	x7
-	ldr	w6, [x29, 120]
+	blr	x6
 	cmn	w0, #1
-	beq	.L1897
-	b	.L1944
-.L1900:
+	ldr	w5, [x29, 120]
+	beq	.L1904
+	b	.L1951
+.L1907:
 	ldr	w0, [x29, 124]
 	bl	nandc_bch_sel
 	cmp	w3, 0
@@ -11472,35 +11534,35 @@ idb_write_data:
 	ldr	w0, [x29, 136]
 	cmp	w22, 0
 	ccmp	w26, w0, 0, eq
-	bne	.L1902
+	bne	.L1909
 	ldr	w0, [x29, 144]
-	cbnz	w0, .L1902
+	cbnz	w0, .L1909
 	ldr	w1, [x20]
 	mov	w0, 18766
 	movk	w0, 0x464e, lsl 16
 	cmp	w1, w0
-	bne	.L1902
+	bne	.L1909
 	ldr	w0, [x29, 160]
 	ldrb	w21, [x20, 17]
 	add	w0, w0, w24
 	str	w0, [x29, 160]
-.L1903:
+.L1910:
 	add	w22, w24, w22
 	and	w22, w22, 65535
-	b	.L1890
-.L1902:
+	b	.L1897
+.L1909:
 	ubfiz	x0, x24, 9, 16
 	str	wzr, [x29, 152]
 	add	x20, x20, x0
-	b	.L1903
-.L1906:
+	b	.L1910
+.L1913:
 	ldr	x4, [x29, 184]
 	lsl	x2, x1, 2
 	add	x1, x1, 1
 	ldr	w4, [x2, x4]
 	ldr	w2, [x3, x2]
 	cmp	w4, w2
-	beq	.L1905
+	beq	.L1912
 	ldr	x0, [x29, 184]
 	mov	w2, 512
 	mov	w1, 0
@@ -11512,22 +11574,22 @@ idb_write_data:
 	mov	w1, w26
 	mov	w0, 0
 	bl	flash_erase_block
-.L1875:
+.L1882:
 	ldr	w0, [x29, 172]
 	add	w0, w0, 1
 	str	w0, [x29, 172]
 	cmp	w0, 4
-	bne	.L1908
+	bne	.L1915
 	ldr	w0, [x29, 168]
-	cbnz	w0, .L1910
+	cbnz	w0, .L1917
 	adrp	x0, .LC113
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC113
 	bl	printf
-.L1910:
-	adrp	x0, .LANCHOR156
-	str	wzr, [x0, #:lo12:.LANCHOR156]
-	b	.L1924
+.L1917:
+	adrp	x0, .LANCHOR159
+	str	wzr, [x0, #:lo12:.LANCHOR159]
+	b	.L1931
 	.size	idb_write_data, .-idb_write_data
 	.section	.text.flash_start_tlc_page_prog,"ax",@progbits
 	.align	2
@@ -11550,14 +11612,14 @@ flash_start_tlc_page_prog:
 	mov	x23, x5
 	mov	x24, x6
 	cmp	w0, w19
-	bhi	.L1947
-	adrp	x1, .LANCHOR157
+	bhi	.L1954
+	adrp	x1, .LANCHOR160
 	adrp	x0, .LC0
 	mov	w2, 648
-	add	x1, x1, :lo12:.LANCHOR157
+	add	x1, x1, :lo12:.LANCHOR160
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1947:
+.L1954:
 	adrp	x0, .LANCHOR24
 	add	x0, x0, :lo12:.LANCHOR24
 	ldrb	w26, [x0, w19, sxtw]
@@ -11565,12 +11627,12 @@ flash_start_tlc_page_prog:
 	ldr	x19, [x0, #:lo12:.LANCHOR21]
 	mov	w0, w26
 	bl	nandc_cs
-	cbz	w25, .L1948
+	cbz	w25, .L1955
 	sxtw	x0, w26
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 8
 	str	w25, [x0, 8]
-.L1948:
+.L1955:
 	ubfiz	x0, x26, 8, 8
 	add	x19, x19, x0
 	mov	w0, 128
@@ -11653,8 +11715,8 @@ queue_tlc_prog_cmd:
 	strb	w0, [x1, 59]
 	mov	w0, -1
 	strb	w0, [x1]
-	adrp	x0, .LANCHOR117
-	add	x0, x0, :lo12:.LANCHOR117
+	adrp	x0, .LANCHOR120
+	add	x0, x0, :lo12:.LANCHOR120
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -11671,21 +11733,21 @@ sblk_tlc_prog_one_page:
 	mov	x19, x0
 	ldr	x0, [x0]
 	ldr	w20, [x0, 40]
-.L1956:
+.L1963:
 	mov	w1, 1
 	mov	w0, w20
 	bl	queue_lun_state
-	cbnz	w0, .L1957
+	cbnz	w0, .L1964
 	mov	x0, x19
 	bl	queue_tlc_prog_cmd
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1957:
+.L1964:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L1956
+	b	.L1963
 	.size	sblk_tlc_prog_one_page, .-sblk_tlc_prog_one_page
 	.section	.text.sblk_xlc_prog_pages,"ax",@progbits
 	.align	2
@@ -11702,13 +11764,13 @@ sblk_xlc_prog_pages:
 	stp	x23, x24, [sp, 48]
 	mov	w24, w2
 	ldr	w20, [x0, 40]
-.L1960:
+.L1967:
 	mov	w1, 1
 	mov	w0, w20
 	bl	queue_lun_state
-	cbnz	w0, .L1961
+	cbnz	w0, .L1968
 	cmp	w24, 2
-	bne	.L1962
+	bne	.L1969
 	ldr	x0, [x19]
 	mov	w2, 17
 	ldr	x1, [x22]
@@ -11784,25 +11846,25 @@ sblk_xlc_prog_pages:
 	mov	w0, 1
 	strb	w0, [x1, 59]
 	mov	w0, -1
-	strb	w0, [x1]
-	adrp	x0, .LANCHOR117
-	add	x0, x0, :lo12:.LANCHOR117
+	strb	w0, [x1]
+	adrp	x0, .LANCHOR120
+	add	x0, x0, :lo12:.LANCHOR120
 	bl	buf_add_tail
-.L1963:
+.L1970:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1961:
+.L1968:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L1960
-.L1962:
+	b	.L1967
+.L1969:
 	mov	x0, x19
 	bl	queue_tlc_prog_cmd
-	b	.L1963
+	b	.L1970
 	.size	sblk_xlc_prog_pages, .-sblk_xlc_prog_pages
 	.section	.text.flash_start_page_prog,"ax",@progbits
 	.align	2
@@ -11825,62 +11887,62 @@ flash_start_page_prog:
 	ubfx	x27, x1, 21, 3
 	ubfx	x22, x1, 24, 2
 	cmp	w0, w27
-	bhi	.L1966
-	adrp	x1, .LANCHOR158
+	bhi	.L1973
+	adrp	x1, .LANCHOR161
 	adrp	x0, .LC0
 	mov	w2, 685
-	add	x1, x1, :lo12:.LANCHOR158
+	add	x1, x1, :lo12:.LANCHOR161
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1966:
+.L1973:
 	adrp	x0, .LANCHOR24
 	add	x0, x0, :lo12:.LANCHOR24
 	ldrb	w21, [x0, w27, sxtw]
 	adrp	x0, .LANCHOR21
 	ldr	x20, [x0, #:lo12:.LANCHOR21]
 	bl	nandc_rdy_status
-	cbnz	w0, .L1967
+	cbnz	w0, .L1974
 	ldrb	w0, [x26, #:lo12:.LANCHOR12]
 	cmp	w0, 1
-	bne	.L1968
+	bne	.L1975
 	bl	nandc_wait_flash_ready
-.L1967:
+.L1974:
 	mov	w0, w21
 	bl	hynix_reconfig_rr_para
 	mov	w0, w21
 	bl	nandc_cs
-	cbnz	w22, .L1969
+	cbnz	w22, .L1976
 	adrp	x0, .LANCHOR11
 	adrp	x1, .LANCHOR25
 	ldrb	w0, [x0, #:lo12:.LANCHOR11]
-	cbz	w0, .L1970
+	cbz	w0, .L1977
 	ldrb	w0, [x1, #:lo12:.LANCHOR25]
-	cbz	w0, .L1971
-.L1970:
+	cbz	w0, .L1978
+.L1977:
 	adrp	x0, .LANCHOR26
 	ldrb	w1, [x1, #:lo12:.LANCHOR25]
 	ldrh	w2, [x0, #:lo12:.LANCHOR26]
 	udiv	w0, w19, w2
 	mul	w0, w0, w2
 	sub	w19, w19, w0
-	cbz	w1, .L1972
+	cbz	w1, .L1979
 	add	w19, w0, w19, lsl 1
-.L1971:
+.L1978:
 	mov	w0, w21
 	bl	zftl_flash_enter_slc_mode
-	b	.L1973
-.L1968:
+	b	.L1980
+.L1975:
 	mov	w2, 64
 	mov	w1, w19
 	mov	w0, w27
 	bl	flash_wait_device_ready_raw
-	b	.L1967
-.L1972:
+	b	.L1974
+.L1979:
 	adrp	x1, .LANCHOR27
 	add	x1, x1, :lo12:.LANCHOR27
 	ldrh	w19, [x1, w19, uxtw 1]
 	add	w19, w19, w0
-.L1973:
+.L1980:
 	ubfiz	x0, x21, 8, 8
 	add	x20, x20, x0
 	mov	w0, 128
@@ -11911,10 +11973,10 @@ flash_start_page_prog:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 96
 	b	nandc_de_cs
-.L1969:
+.L1976:
 	mov	w0, w21
 	bl	zftl_flash_exit_slc_mode
-	b	.L1973
+	b	.L1980
 	.size	flash_start_page_prog, .-flash_start_page_prog
 	.section	.text.queue_prog_cmd,"ax",@progbits
 	.align	2
@@ -11929,27 +11991,27 @@ queue_prog_cmd:
 	mov	x19, x0
 	mov	w0, 16
 	bl	flash_start_page_prog
-	adrp	x0, .LANCHOR117
+	adrp	x0, .LANCHOR120
 	ldr	w3, [x19, 40]
-	ldrb	w1, [x0, #:lo12:.LANCHOR117]
+	ldrb	w1, [x0, #:lo12:.LANCHOR120]
 	cmp	w1, 255
-	beq	.L1979
+	beq	.L1986
 	adrp	x2, .LANCHOR46
 	add	x2, x2, :lo12:.LANCHOR46
 	ubfx	x3, x3, 21, 3
 	mov	x6, x2
-.L1981:
+.L1988:
 	add	x4, x2, x1, lsl 6
 	ldr	w5, [x4, 40]
 	ubfx	x5, x5, 21, 3
 	cmp	w3, w5
-	bne	.L1980
+	bne	.L1987
 	ldrb	w5, [x4, 58]
 	cmp	w5, 6
-	bne	.L1980
+	bne	.L1987
 	mov	w1, 3
 	strb	w1, [x4, 58]
-.L1979:
+.L1986:
 	mov	w1, 3
 	strb	w1, [x19, 58]
 	mov	w1, 1
@@ -11957,16 +12019,16 @@ queue_prog_cmd:
 	mov	w1, -1
 	strb	w1, [x19]
 	mov	x1, x19
-	add	x0, x0, :lo12:.LANCHOR117
+	add	x0, x0, :lo12:.LANCHOR120
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	buf_add_tail
-.L1980:
+.L1987:
 	lsl	x1, x1, 6
 	ldrb	w1, [x6, x1]
 	cmp	w1, 255
-	bne	.L1981
-	b	.L1979
+	bne	.L1988
+	b	.L1986
 	.size	queue_prog_cmd, .-queue_prog_cmd
 	.section	.text.sblk_prog_page,"ax",@progbits
 	.align	2
@@ -11983,24 +12045,24 @@ sblk_prog_page:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	cbz	w0, .L1988
+	cbz	w0, .L1995
 	adrp	x0, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L1988
+	tbz	x0, 8, .L1995
 	ldr	w1, [x19, 40]
 	adrp	x0, .LC114
 	mov	w2, w20
 	add	x0, x0, :lo12:.LC114
 	bl	printf
-.L1988:
+.L1995:
 	adrp	x25, .LANCHOR36
 	adrp	x23, .LANCHOR46
 	add	x25, x25, :lo12:.LANCHOR36
 	add	x23, x23, :lo12:.LANCHOR46
 	mov	w21, 0
 	mov	w24, 1
-.L1989:
-	cbnz	w20, .L1999
+.L1996:
+	cbnz	w20, .L2006
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -12009,48 +12071,48 @@ sblk_prog_page:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1999:
+.L2006:
 	ldrb	w26, [x19]
 	ldr	w22, [x19, 40]
-.L1990:
+.L1997:
 	mov	w1, 1
 	mov	w0, w22
 	bl	queue_lun_state
-	cbnz	w0, .L1991
+	cbnz	w0, .L1998
 	cmp	w20, 1
-	beq	.L1992
+	beq	.L1999
 	ldrb	w0, [x25]
-	cbnz	w0, .L1993
-.L1992:
+	cbnz	w0, .L2000
+.L1999:
 	mov	x0, x19
 	bl	queue_prog_cmd
-.L1994:
+.L2001:
 	ubfiz	x19, x26, 6, 8
 	sub	w20, w20, #1
 	add	x19, x23, x19
-	b	.L1989
-.L1991:
+	b	.L1996
+.L1998:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L1990
-.L1993:
+	b	.L1997
+.L2000:
 	ldrb	w0, [x19]
 	ubfx	x27, x22, 21, 3
 	cmp	w0, 255
-	bne	.L1995
-	adrp	x1, .LANCHOR159
+	bne	.L2002
+	adrp	x1, .LANCHOR162
 	adrp	x0, .LC0
 	mov	w2, 489
-	add	x1, x1, :lo12:.LANCHOR159
+	add	x1, x1, :lo12:.LANCHOR162
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1995:
+.L2002:
 	ldrb	w0, [x19]
 	add	x0, x23, x0, lsl 6
 	ldr	w5, [x0, 40]
 	ubfx	x0, x5, 21, 3
 	cmp	w27, w0
-	bne	.L1996
+	bne	.L2003
 	adrp	x0, .LANCHOR96
 	ldrh	w2, [x0, #:lo12:.LANCHOR96]
 	adrp	x0, .LANCHOR95
@@ -12073,9 +12135,9 @@ sblk_prog_page:
 	cmp	w4, w0
 	and	w1, w1, w5
 	ccmp	w22, w1, 0, ne
-	bne	.L1996
+	bne	.L2003
 	cmp	w21, w3
-	beq	.L1996
+	beq	.L2003
 	ldr	w1, [x19, 40]
 	mov	w0, 17
 	ldr	x2, [x19, 8]
@@ -12088,15 +12150,15 @@ sblk_prog_page:
 	mov	w0, -1
 	strb	w0, [x19]
 	mov	x1, x19
-	adrp	x0, .LANCHOR117
-	add	x0, x0, :lo12:.LANCHOR117
+	adrp	x0, .LANCHOR120
+	add	x0, x0, :lo12:.LANCHOR120
 	bl	buf_add_tail
-	b	.L1994
-.L1996:
+	b	.L2001
+.L2003:
 	mov	x0, x19
 	mov	w21, 0
 	bl	queue_prog_cmd
-	b	.L1994
+	b	.L2001
 	.size	sblk_prog_page, .-sblk_prog_page
 	.section	.text.ftl_flush,"ax",@progbits
 	.align	2
@@ -12104,22 +12166,22 @@ sblk_prog_page:
 	.type	ftl_flush, %function
 ftl_flush:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR112
+	adrp	x0, .LANCHOR115
 	add	x29, sp, 0
-	ldrb	w1, [x0, #:lo12:.LANCHOR112]
+	ldrb	w1, [x0, #:lo12:.LANCHOR115]
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	adrp	x20, .LANCHOR160
-	cbz	w1, .L2011
-	ldrb	w2, [x20, #:lo12:.LANCHOR160]
+	adrp	x20, .LANCHOR163
+	cbz	w1, .L2018
+	ldrb	w2, [x20, #:lo12:.LANCHOR163]
 	adrp	x0, .LANCHOR46
 	add	x0, x0, :lo12:.LANCHOR46
 	add	x0, x0, x2, lsl 6
 	bl	sblk_prog_page
-.L2011:
+.L2018:
 	mov	w0, -1
-	strb	wzr, [x19, #:lo12:.LANCHOR112]
-	strb	w0, [x20, #:lo12:.LANCHOR160]
+	strb	wzr, [x19, #:lo12:.LANCHOR115]
+	strb	w0, [x20, #:lo12:.LANCHOR163]
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	ldp	x19, x20, [sp, 16]
@@ -12148,43 +12210,43 @@ flash_prog_page_en:
 	and	w21, w5, 255
 	ubfx	x19, x20, 24, 2
 	cmp	w0, w22
-	bhi	.L2017
-	adrp	x1, .LANCHOR161
+	bhi	.L2024
+	adrp	x1, .LANCHOR164
 	adrp	x0, .LC0
 	mov	w2, 473
-	add	x1, x1, :lo12:.LANCHOR161
+	add	x1, x1, :lo12:.LANCHOR164
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2017:
+.L2024:
 	adrp	x0, .LANCHOR24
 	add	x0, x0, :lo12:.LANCHOR24
 	ldrb	w26, [x0, w22, sxtw]
-	cbnz	w19, .L2027
+	cbnz	w19, .L2034
 	adrp	x0, .LANCHOR11
 	ldrb	w1, [x0, #:lo12:.LANCHOR11]
 	adrp	x0, .LANCHOR25
-	cbz	w1, .L2019
+	cbz	w1, .L2026
 	ldrb	w1, [x0, #:lo12:.LANCHOR25]
-	cbz	w1, .L2027
-.L2019:
+	cbz	w1, .L2034
+.L2026:
 	adrp	x1, .LANCHOR26
 	ldrb	w0, [x0, #:lo12:.LANCHOR25]
 	ldrh	w1, [x1, #:lo12:.LANCHOR26]
 	udiv	w19, w20, w1
 	mul	w19, w19, w1
 	sub	w1, w20, w19
-	cbz	w0, .L2020
+	cbz	w0, .L2027
 	add	w19, w19, w1, lsl 1
-.L2018:
+.L2025:
 	adrp	x0, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 4, .L2021
+	tbz	x0, 4, .L2028
 	adrp	x0, .LC115
 	mov	w2, w20
 	mov	w1, w26
 	add	x0, x0, :lo12:.LC115
 	bl	printf
-.L2021:
+.L2028:
 	mov	w1, w19
 	mov	w4, w25
 	mov	x3, x23
@@ -12192,68 +12254,68 @@ flash_prog_page_en:
 	mov	w0, w26
 	bl	flash_prog_page
 	mov	w19, w0
-	cbz	w21, .L2022
-	adrp	x26, .LANCHOR149
-	adrp	x21, .LANCHOR150
+	cbz	w21, .L2029
+	adrp	x26, .LANCHOR152
+	adrp	x21, .LANCHOR153
 	mov	w4, w25
 	mov	w1, w20
-	ldr	x3, [x26, #:lo12:.LANCHOR149]
+	ldr	x3, [x26, #:lo12:.LANCHOR152]
 	mov	w0, w22
-	ldr	x2, [x21, #:lo12:.LANCHOR150]
+	ldr	x2, [x21, #:lo12:.LANCHOR153]
 	bl	flash_read_page_en
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2023
-	ldr	x0, [x21, #:lo12:.LANCHOR150]
+	beq	.L2030
+	ldr	x0, [x21, #:lo12:.LANCHOR153]
 	ldr	w1, [x24]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	bne	.L2023
-	ldr	x0, [x26, #:lo12:.LANCHOR149]
+	bne	.L2030
+	ldr	x0, [x26, #:lo12:.LANCHOR152]
 	ldr	w1, [x23]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	beq	.L2022
-.L2023:
-	ldr	x1, [x26, #:lo12:.LANCHOR149]
+	beq	.L2029
+.L2030:
+	ldr	x1, [x26, #:lo12:.LANCHOR152]
 	mov	w3, 4
 	adrp	x0, .LC116
 	mov	w2, w3
 	add	x0, x0, :lo12:.LC116
 	bl	rknand_print_hex
-	ldr	x1, [x21, #:lo12:.LANCHOR150]
+	ldr	x1, [x21, #:lo12:.LANCHOR153]
 	mov	w3, 4
 	adrp	x0, .LC117
 	mov	w2, w3
 	add	x0, x0, :lo12:.LC117
 	bl	rknand_print_hex
-.L2024:
+.L2031:
 	mov	w1, w20
 	adrp	x0, .LC118
 	add	x0, x0, :lo12:.LC118
 	bl	printf
 	mov	w2, 499
-	adrp	x1, .LANCHOR161
+	adrp	x1, .LANCHOR164
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR161
+	add	x1, x1, :lo12:.LANCHOR164
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	mov	w0, -1
-	b	.L2025
-.L2020:
+	b	.L2032
+.L2027:
 	adrp	x0, .LANCHOR27
 	add	x0, x0, :lo12:.LANCHOR27
 	ldrh	w0, [x0, w1, uxtw 1]
 	add	w19, w0, w19
-	b	.L2018
-.L2027:
+	b	.L2025
+.L2034:
 	mov	w19, w20
-	b	.L2018
-.L2022:
+	b	.L2025
+.L2029:
 	mov	w0, w19
 	cmn	w19, #1
-	beq	.L2024
-.L2025:
+	beq	.L2031
+.L2032:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -12271,11 +12333,11 @@ ftl_test_block:
 	stp	x23, x24, [sp, 48]
 	adrp	x24, ftl_tmp_buffer
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR152
+	adrp	x25, .LANCHOR155
 	stp	x21, x22, [sp, 32]
-	adrp	x26, .LANCHOR100
+	adrp	x26, .LANCHOR104
 	and	w21, w0, 65535
-	add	x0, x26, :lo12:.LANCHOR100
+	add	x0, x26, :lo12:.LANCHOR104
 	stp	x19, x20, [sp, 16]
 	mov	w23, 0
 	stp	x27, x28, [sp, 80]
@@ -12284,100 +12346,100 @@ ftl_test_block:
 	str	x0, [x29, 112]
 	str	wzr, [x24, #:lo12:ftl_tmp_buffer]
 	add	x0, x27, :lo12:.LANCHOR95
-	str	wzr, [x25, #:lo12:.LANCHOR152]
+	str	wzr, [x25, #:lo12:.LANCHOR155]
 	str	x0, [x29, 96]
-.L2039:
+.L2046:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
 	cmp	w0, w20
-	bls	.L2049
+	bls	.L2056
 	add	x0, x27, :lo12:.LANCHOR95
 	mov	w22, 0
 	str	x0, [x29, 120]
 	adrp	x0, .LANCHOR7
 	add	x0, x0, :lo12:.LANCHOR7
 	str	x0, [x29, 104]
-	b	.L2050
-.L2048:
+	b	.L2057
+.L2055:
 	ldr	x0, [x29, 104]
 	ldr	w0, [x0]
-	tbz	x0, 12, .L2040
+	tbz	x0, 12, .L2047
 	adrp	x0, .LC119
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC119
 	bl	printf
-.L2040:
+.L2047:
 	ldr	x0, [x29, 96]
 	ldrb	w19, [x0]
 	madd	w19, w21, w19, w22
 	and	w19, w19, 65535
-	cbnz	w20, .L2041
+	cbnz	w20, .L2048
 	adrp	x0, .LANCHOR20
 	ldr	x0, [x0, #:lo12:.LANCHOR20]
 	ldrb	w0, [x0, 47]
 	cmp	w0, w19
-	bcs	.L2042
-.L2041:
+	bcs	.L2049
+.L2048:
 	and	w28, w20, 255
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_check_bad_block
-	cbnz	w0, .L2042
-	adrp	x0, .LANCHOR99
+	cbnz	w0, .L2049
+	adrp	x0, .LANCHOR103
 	mov	w1, w23
-	ldrh	w7, [x0, #:lo12:.LANCHOR99]
+	ldrh	w7, [x0, #:lo12:.LANCHOR103]
 	mov	w0, w28
 	mul	w26, w7, w19
 	mov	w2, w26
 	bl	flash_erase_block_en
-	cbz	w0, .L2043
+	cbz	w0, .L2050
 	adrp	x0, .LANCHOR67
 	ldrb	w0, [x0, #:lo12:.LANCHOR67]
 	cmp	w0, 2
-	bne	.L2065
+	bne	.L2072
 	adrp	x0, .LANCHOR11
 	ldrb	w0, [x0, #:lo12:.LANCHOR11]
-	cbz	w0, .L2065
+	cbz	w0, .L2072
 	mov	w2, w26
 	mov	w1, 1
 	mov	w0, w28
 	bl	flash_erase_block_en
-	cbnz	w0, .L2065
-.L2047:
+	cbnz	w0, .L2072
+.L2054:
 	adrp	x0, .LANCHOR67
 	mov	w23, 1
 	ldrb	w0, [x0, #:lo12:.LANCHOR67]
 	add	w26, w26, w0, lsl 24
-.L2046:
-	adrp	x0, .LANCHOR114
+.L2053:
+	adrp	x0, .LANCHOR117
 	mov	w5, 1
-	add	x3, x25, :lo12:.LANCHOR152
+	add	x3, x25, :lo12:.LANCHOR155
 	add	x2, x24, :lo12:ftl_tmp_buffer
-	ldrb	w4, [x0, #:lo12:.LANCHOR114]
+	ldrb	w4, [x0, #:lo12:.LANCHOR117]
 	mov	w1, w26
 	mov	w0, w28
 	bl	flash_prog_page_en
-	cbz	w0, .L2042
-.L2065:
+	cbz	w0, .L2049
+.L2072:
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_mask_bad_block
-.L2042:
+.L2049:
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L2050:
+.L2057:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, w22
-	bhi	.L2048
+	bhi	.L2055
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2039
-.L2043:
-	cbz	w23, .L2046
-	b	.L2047
-.L2049:
-	cbz	w23, .L2051
+	b	.L2046
+.L2050:
+	cbz	w23, .L2053
+	b	.L2054
+.L2056:
+	cbz	w23, .L2058
 	adrp	x0, .LANCHOR3
 	mov	w1, 2
 	ldr	x0, [x0, #:lo12:.LANCHOR3]
@@ -12385,7 +12447,7 @@ ftl_test_block:
 	ldrb	w0, [x21, 2]
 	bfi	w0, w1, 3, 2
 	strb	w0, [x21, 2]
-.L2051:
+.L2058:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -12420,18 +12482,18 @@ ftl_prog_page:
 	bl	flash_prog_page_en
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L2066
-	mov	w2, 2034
-	adrp	x1, .LANCHOR162
+	bne	.L2073
+	mov	w2, 2052
+	adrp	x1, .LANCHOR165
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR162
+	add	x1, x1, :lo12:.LANCHOR165
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	adrp	x0, .LC118
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC118
 	bl	printf
-.L2066:
+.L2073:
 	mov	w0, w19
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -12448,39 +12510,39 @@ ftl_info_flush:
 	mov	w1, 0
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR114
+	adrp	x21, .LANCHOR117
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR164
+	adrp	x22, .LANCHOR167
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LANCHOR99
+	adrp	x23, .LANCHOR103
 	stp	x27, x28, [sp, 80]
 	mov	x26, x23
-	ldrb	w2, [x21, #:lo12:.LANCHOR114]
-	add	x25, x22, :lo12:.LANCHOR164
-	add	x28, x23, :lo12:.LANCHOR99
+	ldrb	w2, [x21, #:lo12:.LANCHOR117]
+	add	x25, x22, :lo12:.LANCHOR167
+	add	x28, x23, :lo12:.LANCHOR103
 	mov	w24, 0
 	stp	x19, x20, [sp, 16]
 	mov	w27, w0
-	adrp	x20, .LANCHOR163
+	adrp	x20, .LANCHOR166
 	lsl	w2, w2, 1
-	add	x0, x20, :lo12:.LANCHOR163
+	add	x0, x20, :lo12:.LANCHOR166
 	bl	ftl_memset
-.L2070:
-	add	x0, x22, :lo12:.LANCHOR164
-	ldrb	w6, [x22, #:lo12:.LANCHOR164]
-	ldrh	w19, [x23, #:lo12:.LANCHOR99]
+.L2077:
+	add	x0, x22, :lo12:.LANCHOR167
+	ldrb	w6, [x22, #:lo12:.LANCHOR167]
+	ldrh	w19, [x23, #:lo12:.LANCHOR103]
 	ldrh	w4, [x0, 2]
-	adrp	x0, .LANCHOR101
-	ldr	x0, [x0, #:lo12:.LANCHOR101]
+	adrp	x0, .LANCHOR97
+	ldr	x0, [x0, #:lo12:.LANCHOR97]
 	ldr	w3, [x0, 4]
 	add	w3, w3, 1
 	str	w3, [x0, 4]
-	add	x0, x20, :lo12:.LANCHOR163
-	str	w27, [x20, #:lo12:.LANCHOR163]
+	add	x0, x20, :lo12:.LANCHOR166
+	str	w27, [x20, #:lo12:.LANCHOR166]
 	str	w3, [x0, 4]
 	adrp	x0, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2071
+	tbz	x0, 12, .L2078
 	mov	w2, w4
 	mov	w1, w6
 	str	w4, [x29, 96]
@@ -12490,26 +12552,26 @@ ftl_info_flush:
 	bl	printf
 	ldr	w4, [x29, 96]
 	ldr	w6, [x29, 104]
-.L2071:
+.L2078:
 	adrp	x1, .LANCHOR80
 	ldrh	w0, [x25, 2]
 	ldrh	w1, [x1, #:lo12:.LANCHOR80]
 	cmp	w1, w0
-	bhi	.L2072
-	adrp	x19, .LANCHOR165
+	bhi	.L2079
+	adrp	x19, .LANCHOR168
 	adrp	x3, .LC0
-	add	x19, x19, :lo12:.LANCHOR165
+	add	x19, x19, :lo12:.LANCHOR168
 	add	x3, x3, :lo12:.LC0
-.L2079:
+.L2086:
 	ldrb	w0, [x25, 1]
 	adrp	x4, .LANCHOR20
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x25, 1]
 	cmp	w0, 7
-	bls	.L2073
+	bls	.L2080
 	mov	x0, 0
-.L2078:
+.L2085:
 	ldr	x2, [x4, #:lo12:.LANCHOR20]
 	add	w1, w0, 8
 	and	w24, w0, 65535
@@ -12518,32 +12580,32 @@ ftl_info_flush:
 	add	w1, w2, 127
 	and	w1, w1, 255
 	cmp	w1, 125
-	bhi	.L2074
+	bhi	.L2081
 	mov	x0, x3
 	stp	x4, x3, [x29, 96]
 	mov	w2, 672
 	mov	x1, x19
 	bl	printf
 	ldp	x4, x3, [x29, 96]
-.L2077:
+.L2084:
 	strb	w24, [x25, 1]
 	mov	w24, 1
-.L2073:
+.L2080:
 	ldr	x0, [x4, #:lo12:.LANCHOR20]
 	ldrb	w1, [x25, 1]
 	add	x0, x0, x1
 	ldrb	w0, [x0, 40]
 	strb	w0, [x25]
 	cmp	w0, 255
-	beq	.L2079
+	beq	.L2086
 	ldrh	w19, [x28]
 	mul	w19, w19, w0
 	mov	w0, 0
 	mov	w1, w19
 	bl	flash_erase_block
-	ldrb	w4, [x21, #:lo12:.LANCHOR114]
+	ldrb	w4, [x21, #:lo12:.LANCHOR117]
 	mov	w1, w19
-	add	x3, x20, :lo12:.LANCHOR163
+	add	x3, x20, :lo12:.LANCHOR166
 	adrp	x2, ftl_info_data_buffer
 	mov	w0, 0
 	add	x2, x2, :lo12:ftl_info_data_buffer
@@ -12551,53 +12613,53 @@ ftl_info_flush:
 	bl	ftl_prog_page
 	mov	w0, 1
 	strh	w0, [x25, 2]
-.L2080:
-	ldrb	w4, [x21, #:lo12:.LANCHOR114]
+.L2087:
+	ldrb	w4, [x21, #:lo12:.LANCHOR117]
 	mov	w1, w19
-	add	x3, x20, :lo12:.LANCHOR163
+	add	x3, x20, :lo12:.LANCHOR166
 	adrp	x2, ftl_info_data_buffer
 	mov	w0, 0
 	add	x2, x2, :lo12:ftl_info_data_buffer
 	bl	ftl_prog_page
 	cmn	w0, #1
 	ldrh	w1, [x25, 2]
-	adrp	x0, .LANCHOR166
+	adrp	x0, .LANCHOR169
 	add	w1, w1, 1
 	strh	w1, [x25, 2]
-	beq	.L2081
-	ldrb	w1, [x0, #:lo12:.LANCHOR166]
-	cbz	w1, .L2082
+	beq	.L2088
+	ldrb	w1, [x0, #:lo12:.LANCHOR169]
+	cbz	w1, .L2089
+.L2088:
+	strb	wzr, [x0, #:lo12:.LANCHOR169]
+	b	.L2077
 .L2081:
-	strb	wzr, [x0, #:lo12:.LANCHOR166]
-	b	.L2070
-.L2074:
 	cmp	w2, 255
-	bne	.L2077
+	bne	.L2084
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L2078
+	bne	.L2085
 	mov	w24, w0
-	b	.L2077
-.L2072:
+	b	.L2084
+.L2079:
 	madd	w19, w19, w6, w4
-	cbnz	w0, .L2080
+	cbnz	w0, .L2087
 	mov	w1, w19
 	bl	flash_erase_block
-	b	.L2080
-.L2082:
-	cbnz	w24, .L2083
-.L2091:
-	adrp	x0, .LANCHOR164
-	ldrb	w0, [x0, #:lo12:.LANCHOR164]
+	b	.L2087
+.L2089:
+	cbnz	w24, .L2090
+.L2098:
+	adrp	x0, .LANCHOR167
+	ldrb	w0, [x0, #:lo12:.LANCHOR167]
 	cmp	w0, 255
-	bne	.L2085
-	adrp	x1, .LANCHOR165
+	bne	.L2092
+	adrp	x1, .LANCHOR168
 	adrp	x0, .LC0
 	mov	w2, 708
-	add	x1, x1, :lo12:.LANCHOR165
+	add	x1, x1, :lo12:.LANCHOR168
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2085:
+.L2092:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -12606,17 +12668,17 @@ ftl_info_flush:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2083:
+.L2090:
 	ldrb	w19, [x25, 1]
-	adrp	x20, .LANCHOR165
+	adrp	x20, .LANCHOR168
 	adrp	x21, .LC0
-	add	x20, x20, :lo12:.LANCHOR165
+	add	x20, x20, :lo12:.LANCHOR168
 	add	w19, w19, 1
 	add	x21, x21, :lo12:.LC0
 	adrp	x22, .LANCHOR20
-.L2086:
+.L2093:
 	cmp	w19, 7
-	bhi	.L2091
+	bhi	.L2098
 	ldr	x1, [x22, #:lo12:.LANCHOR20]
 	add	w0, w19, 8
 	add	x0, x1, x0, sxtw
@@ -12624,24 +12686,24 @@ ftl_info_flush:
 	add	w0, w23, 127
 	and	w0, w0, 255
 	cmp	w0, 125
-	bhi	.L2087
+	bhi	.L2094
 	mov	w2, 701
 	mov	x1, x20
 	mov	x0, x21
 	bl	printf
-.L2088:
-	ldrh	w1, [x26, #:lo12:.LANCHOR99]
+.L2095:
+	ldrh	w1, [x26, #:lo12:.LANCHOR103]
 	mov	w0, 0
 	mul	w1, w1, w23
 	bl	flash_erase_block
-	b	.L2089
-.L2087:
+	b	.L2096
+.L2094:
 	cmp	w23, 255
-	bne	.L2088
-.L2089:
+	bne	.L2095
+.L2096:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L2086
+	b	.L2093
 	.size	ftl_info_flush, .-ftl_info_flush
 	.section	.text.ftl_info_blk_init,"ax",@progbits
 	.align	2
@@ -12649,32 +12711,32 @@ ftl_info_flush:
 	.type	ftl_info_blk_init, %function
 ftl_info_blk_init:
 	stp	x29, x30, [sp, -128]!
-	adrp	x0, .LANCHOR167
-	adrp	x1, .LANCHOR166
+	adrp	x0, .LANCHOR170
+	adrp	x1, .LANCHOR169
 	mov	w2, 16384
 	add	x29, sp, 0
-	strb	wzr, [x0, #:lo12:.LANCHOR167]
+	strb	wzr, [x0, #:lo12:.LANCHOR170]
 	mov	w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR166]
-	adrp	x1, .LANCHOR168
+	strb	w0, [x1, #:lo12:.LANCHOR169]
+	adrp	x1, .LANCHOR171
 	stp	x19, x20, [sp, 16]
 	adrp	x20, ftl_info_data_buffer
-	strb	w0, [x1, #:lo12:.LANCHOR168]
+	strb	w0, [x1, #:lo12:.LANCHOR171]
 	adrp	x1, .LANCHOR3
 	add	x0, x20, :lo12:ftl_info_data_buffer
 	stp	x21, x22, [sp, 32]
 	str	x0, [x1, #:lo12:.LANCHOR3]
 	adrp	x1, .LANCHOR2
-	adrp	x22, .LANCHOR101
+	adrp	x22, .LANCHOR97
 	stp	x25, x26, [sp, 64]
 	ldrh	w1, [x1, #:lo12:.LANCHOR2]
-	adrp	x21, .LANCHOR164
+	adrp	x21, .LANCHOR167
 	stp	x23, x24, [sp, 48]
 	adrp	x23, .LANCHOR20
 	stp	x27, x28, [sp, 80]
-	adrp	x26, .LANCHOR99
+	adrp	x26, .LANCHOR103
 	add	x1, x0, x1, lsl 2
-	str	x1, [x22, #:lo12:.LANCHOR101]
+	str	x1, [x22, #:lo12:.LANCHOR97]
 	mov	w1, 0
 	bl	ftl_memset
 	mov	w1, 0
@@ -12682,19 +12744,19 @@ ftl_info_blk_init:
 	adrp	x0, ftl_ext_info_data_buffer
 	add	x0, x0, :lo12:ftl_ext_info_data_buffer
 	bl	ftl_memset
-	adrp	x25, .LANCHOR114
+	adrp	x25, .LANCHOR117
 	ldr	x1, [x23, #:lo12:.LANCHOR20]
-	add	x0, x21, :lo12:.LANCHOR164
+	add	x0, x21, :lo12:.LANCHOR167
 	mov	w27, 21574
-	add	x26, x26, :lo12:.LANCHOR99
-	add	x25, x25, :lo12:.LANCHOR114
+	add	x26, x26, :lo12:.LANCHOR103
+	add	x25, x25, :lo12:.LANCHOR117
 	mov	x19, 7
 	strb	wzr, [x0, 1]
 	movk	w27, 0x494c, lsl 16
 	ldrb	w1, [x1, 40]
-	strb	w1, [x21, #:lo12:.LANCHOR164]
+	strb	w1, [x21, #:lo12:.LANCHOR167]
 	strh	wzr, [x0, 2]
-.L2107:
+.L2114:
 	ldr	x1, [x23, #:lo12:.LANCHOR20]
 	add	w0, w19, 8
 	sxth	w24, w19
@@ -12702,36 +12764,36 @@ ftl_info_blk_init:
 	add	x0, x1, x0, sxtw
 	ldrb	w0, [x0, 32]
 	cmp	w0, 255
-	bne	.L2106
-.L2111:
+	bne	.L2113
+.L2118:
 	sub	x19, x19, #1
 	cmn	x19, #1
-	bne	.L2107
+	bne	.L2114
 	mov	w24, 0
-.L2108:
+.L2115:
 	adrp	x0, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2112
-	ldr	x0, [x22, #:lo12:.LANCHOR101]
+	tbz	x0, 12, .L2119
+	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	mov	w2, 4800
 	mov	w1, w19
 	ldr	w3, [x0]
 	adrp	x0, .LC122
 	add	x0, x0, :lo12:.LC122
 	bl	printf
-.L2112:
+.L2119:
 	cmn	w19, #1
-	bne	.L2113
+	bne	.L2120
 	mov	w1, 0
 	mov	w2, 16384
 	add	x0, x20, :lo12:ftl_info_data_buffer
 	bl	ftl_memset
-	ldr	x0, [x22, #:lo12:.LANCHOR101]
+	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	mov	w1, 21574
 	movk	w1, 0x494c, lsl 16
 	str	w1, [x0]
 	mov	w0, w19
-.L2105:
+.L2112:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -12739,12 +12801,12 @@ ftl_info_blk_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2106:
+.L2113:
 	ldrh	w6, [x26]
 	add	x8, x20, :lo12:ftl_info_data_buffer
 	ldrb	w4, [x25]
-	adrp	x7, .LANCHOR163
-	add	x7, x7, :lo12:.LANCHOR163
+	adrp	x7, .LANCHOR166
+	add	x7, x7, :lo12:.LANCHOR166
 	mov	x2, x8
 	mov	x3, x7
 	stp	x7, x8, [x29, 104]
@@ -12757,7 +12819,7 @@ ftl_info_blk_init:
 	cmn	w0, #1
 	ldr	w6, [x29, 124]
 	ldp	x7, x8, [x29, 104]
-	bne	.L2109
+	bne	.L2116
 	ldrb	w4, [x25]
 	mov	x3, x7
 	mov	x2, x8
@@ -12765,11 +12827,11 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_read_page
 	mov	w5, w0
-.L2109:
+.L2116:
 	adrp	x0, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2110
-	ldr	x0, [x22, #:lo12:.LANCHOR101]
+	tbz	x0, 12, .L2117
+	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	mov	w2, w5
 	str	w5, [x29, 124]
 	mov	w3, 580
@@ -12779,44 +12841,44 @@ ftl_info_blk_init:
 	add	x0, x0, :lo12:.LC121
 	bl	printf
 	ldr	w5, [x29, 124]
-.L2110:
+.L2117:
 	cmn	w5, #1
-	beq	.L2111
-	ldr	x0, [x22, #:lo12:.LANCHOR101]
+	beq	.L2118
+	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L2111
+	bne	.L2118
 	mov	w19, w24
-	b	.L2108
-.L2113:
+	b	.L2115
+.L2120:
 	ldr	x1, [x23, #:lo12:.LANCHOR20]
 	add	w0, w24, 8
 	add	x20, x20, :lo12:ftl_info_data_buffer
 	mov	w4, 4
 	mov	x2, x20
-	adrp	x26, .LANCHOR114
+	adrp	x26, .LANCHOR117
 	add	x0, x1, x0, sxtw
 	mov	w27, 21574
-	add	x26, x26, :lo12:.LANCHOR114
+	add	x26, x26, :lo12:.LANCHOR117
 	movk	w27, 0x494c, lsl 16
 	ldrb	w1, [x0, 32]
-	add	x0, x21, :lo12:.LANCHOR164
-	strb	w1, [x21, #:lo12:.LANCHOR164]
+	add	x0, x21, :lo12:.LANCHOR167
+	strb	w1, [x21, #:lo12:.LANCHOR167]
 	strb	w24, [x0, 1]
-	adrp	x24, .LANCHOR163
-	add	x24, x24, :lo12:.LANCHOR163
+	adrp	x24, .LANCHOR166
+	add	x24, x24, :lo12:.LANCHOR166
 	mov	w0, 0
 	mov	x3, x24
 	bl	flash_get_last_written_page
 	sxth	w23, w0
 	add	w0, w0, 1
 	and	w19, w0, 65535
-	adrp	x0, .LANCHOR99
-	ldrb	w25, [x21, #:lo12:.LANCHOR164]
-	ldrh	w0, [x0, #:lo12:.LANCHOR99]
+	adrp	x0, .LANCHOR103
+	ldrb	w25, [x21, #:lo12:.LANCHOR167]
+	ldrh	w0, [x0, #:lo12:.LANCHOR103]
 	madd	w25, w25, w0, w23
-.L2115:
-	tbnz	w23, #31, .L2120
+.L2122:
+	tbnz	w23, #31, .L2127
 	ldrb	w4, [x26]
 	mov	x3, x24
 	mov	x2, x20
@@ -12824,43 +12886,43 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_read_page
 	cmn	w0, #1
-	beq	.L2116
-	ldr	x0, [x22, #:lo12:.LANCHOR101]
+	beq	.L2123
+	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L2116
-.L2120:
-	ldr	x0, [x22, #:lo12:.LANCHOR101]
-	add	x21, x21, :lo12:.LANCHOR164
+	bne	.L2123
+.L2127:
+	ldr	x0, [x22, #:lo12:.LANCHOR97]
+	add	x21, x21, :lo12:.LANCHOR167
 	strh	w19, [x21, 2]
 	ldr	w1, [x0, 16]
 	cmp	w1, 2048
-	bhi	.L2117
-.L2118:
+	bhi	.L2124
+.L2125:
 	ldr	w1, [x0, 24]
 	cmp	w1, 2048
-	bls	.L2121
+	bls	.L2128
 	ldr	w2, [x0, 28]
 	add	w2, w2, w1, lsr 11
 	and	w1, w1, 2047
 	stp	w1, w2, [x0, 24]
-.L2121:
+.L2128:
 	ldr	w1, [x0, 32]
 	cmp	w1, 1024
-	bls	.L2122
+	bls	.L2129
 	ldr	w2, [x0, 36]
 	add	w2, w2, w1, lsr 10
 	and	w1, w1, 1023
 	stp	w1, w2, [x0, 32]
-.L2122:
+.L2129:
 	ldr	w1, [x0, 40]
 	cmp	w1, 1024
-	bls	.L2123
+	bls	.L2130
 	ldr	w2, [x0, 44]
 	add	w2, w2, w1, lsr 10
 	and	w1, w1, 1023
 	stp	w1, w2, [x0, 40]
-.L2123:
+.L2130:
 	ldr	w1, [x0, 64]
 	add	w1, w1, 1
 	str	w1, [x0, 64]
@@ -12869,18 +12931,18 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_info_flush
 	mov	w0, 0
-	b	.L2105
-.L2116:
+	b	.L2112
+.L2123:
 	sub	w23, w23, #1
 	sub	w25, w25, #1
 	sxth	w23, w23
-	b	.L2115
-.L2117:
+	b	.L2122
+.L2124:
 	ldr	w2, [x0, 20]
 	add	w2, w2, w1, lsr 11
 	and	w1, w1, 2047
 	stp	w1, w2, [x0, 16]
-	b	.L2118
+	b	.L2125
 	.size	ftl_info_blk_init, .-ftl_info_blk_init
 	.section	.text.ftl_ext_info_flush,"ax",@progbits
 	.align	2
@@ -12897,48 +12959,48 @@ ftl_ext_info_flush:
 	ldr	w1, [x0, 520]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbz	w1, .L2139
+	cbz	w1, .L2146
 	str	wzr, [x0, 520]
-.L2139:
+.L2146:
 	adrp	x20, .LANCHOR80
-	adrp	x22, .LANCHOR169
+	adrp	x22, .LANCHOR172
 	adrp	x21, .LANCHOR96
 	add	x20, x20, :lo12:.LANCHOR80
-	add	x22, x22, :lo12:.LANCHOR169
+	add	x22, x22, :lo12:.LANCHOR172
 	add	x21, x21, :lo12:.LANCHOR96
 	mov	w0, 0
 	bl	ftl_total_vpn_update
-.L2140:
-	adrp	x23, .LANCHOR101
+.L2147:
+	adrp	x23, .LANCHOR97
 	mov	x24, x23
-.L2143:
-	ldr	x0, [x23, #:lo12:.LANCHOR101]
+.L2150:
+	ldr	x0, [x23, #:lo12:.LANCHOR97]
 	ldr	w1, [x0, 56]
 	add	w1, w1, 1
 	str	w1, [x0, 56]
 	ldrh	w1, [x0, 140]
 	ldrh	w0, [x20]
 	cmp	w1, w0
-	bcc	.L2141
+	bcc	.L2148
 	bl	ftl_ext_alloc_new_blk
-.L2141:
-	ldr	x0, [x24, #:lo12:.LANCHOR101]
+.L2148:
+	ldr	x0, [x24, #:lo12:.LANCHOR97]
 	ldrh	w1, [x0, 130]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2142
+	bne	.L2149
 	adrp	x0, .LC0
-	mov	w2, 1621
+	mov	w2, 1639
 	mov	x1, x22
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2142:
-	ldr	x1, [x24, #:lo12:.LANCHOR101]
+.L2149:
+	ldr	x1, [x24, #:lo12:.LANCHOR97]
 	mov	w19, 21
 	ldrh	w0, [x21]
-	adrp	x26, .LANCHOR114
-	adrp	x27, .LANCHOR163
-	add	x25, x27, :lo12:.LANCHOR163
+	adrp	x26, .LANCHOR117
+	adrp	x27, .LANCHOR166
+	add	x25, x27, :lo12:.LANCHOR166
 	sub	w0, w19, w0
 	mov	w19, 1
 	ldrh	w2, [x1, 130]
@@ -12946,43 +13008,43 @@ ftl_ext_info_flush:
 	sub	w19, w19, #1
 	and	w19, w19, w2
 	asr	w28, w2, w0
-	adrp	x0, .LANCHOR99
-	ldrh	w2, [x0, #:lo12:.LANCHOR99]
+	adrp	x0, .LANCHOR103
+	ldrh	w2, [x0, #:lo12:.LANCHOR103]
 	ldrh	w0, [x1, 140]
 	mov	w1, 0
 	madd	w19, w19, w2, w0
-	ldrb	w2, [x26, #:lo12:.LANCHOR114]
+	ldrb	w2, [x26, #:lo12:.LANCHOR117]
 	mov	x0, x25
 	and	w19, w19, 65535
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	ldr	x0, [x24, #:lo12:.LANCHOR101]
+	ldr	x0, [x24, #:lo12:.LANCHOR97]
 	mov	w1, w19
-	ldrb	w4, [x26, #:lo12:.LANCHOR114]
+	ldrb	w4, [x26, #:lo12:.LANCHOR117]
 	mov	x3, x25
-	str	wzr, [x27, #:lo12:.LANCHOR163]
+	str	wzr, [x27, #:lo12:.LANCHOR166]
 	adrp	x2, ftl_ext_info_data_buffer
 	add	x2, x2, :lo12:ftl_ext_info_data_buffer
 	ldr	w0, [x0, 56]
 	str	w0, [x25, 4]
 	mov	w0, w28
 	bl	ftl_prog_page
-	ldr	x2, [x24, #:lo12:.LANCHOR101]
+	ldr	x2, [x24, #:lo12:.LANCHOR97]
 	ldrh	w1, [x2, 140]
 	add	w1, w1, 1
 	and	w1, w1, 65535
 	strh	w1, [x2, 140]
 	cmp	w1, 1
-	beq	.L2143
+	beq	.L2150
 	cmn	w0, #1
-	adrp	x0, .LANCHOR168
-	beq	.L2144
-	ldrb	w1, [x0, #:lo12:.LANCHOR168]
-	cbz	w1, .L2145
-.L2144:
-	strb	wzr, [x0, #:lo12:.LANCHOR168]
-	b	.L2140
-.L2145:
+	adrp	x0, .LANCHOR171
+	beq	.L2151
+	ldrb	w1, [x0, #:lo12:.LANCHOR171]
+	cbz	w1, .L2152
+.L2151:
+	strb	wzr, [x0, #:lo12:.LANCHOR171]
+	b	.L2147
+.L2152:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -12998,83 +13060,86 @@ ftl_ext_info_flush:
 	.type	ftl_ext_info_init, %function
 ftl_ext_info_init:
 	stp	x29, x30, [sp, -112]!
-	adrp	x0, .LANCHOR110
+	adrp	x0, .LANCHOR113
 	mov	w4, 4
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR101
-	strh	wzr, [x0, #:lo12:.LANCHOR110]
-	ldr	x0, [x22, #:lo12:.LANCHOR101]
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR97
+	strh	wzr, [x0, #:lo12:.LANCHOR113]
+	ldr	x0, [x23, #:lo12:.LANCHOR97]
 	stp	x19, x20, [sp, 16]
+	mov	w19, 1
 	stp	x25, x26, [sp, 64]
-	adrp	x25, ftl_ext_info_data_buffer
-	stp	x23, x24, [sp, 48]
-	add	x2, x25, :lo12:ftl_ext_info_data_buffer
-	ldrh	w19, [x0, 130]
+	adrp	x25, .LANCHOR166
+	stp	x21, x22, [sp, 32]
+	adrp	x26, ftl_ext_info_data_buffer
+	ldrh	w20, [x0, 130]
 	adrp	x0, .LANCHOR96
 	stp	x27, x28, [sp, 80]
-	adrp	x24, .LANCHOR163
+	add	x3, x25, :lo12:.LANCHOR166
 	ldrh	w1, [x0, #:lo12:.LANCHOR96]
 	mov	w0, 21
-	and	w26, w19, 16383
-	add	x3, x24, :lo12:.LANCHOR163
+	add	x2, x26, :lo12:ftl_ext_info_data_buffer
 	sub	w0, w0, w1
-	mov	w1, w26
-	asr	w19, w19, w0
-	and	w19, w19, 255
-	mov	w0, w19
+	lsl	w19, w19, w0
+	sub	w19, w19, #1
+	and	w19, w19, w20
+	asr	w20, w20, w0
+	and	w20, w20, 255
+	mov	w1, w19
+	mov	w0, w20
 	bl	flash_get_last_written_page
-	sxth	w21, w0
+	sxth	w22, w0
 	adrp	x0, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2156
-	adrp	x1, .LANCHOR170
+	tbz	x0, 12, .L2163
+	adrp	x1, .LANCHOR173
 	adrp	x0, .LC66
-	mov	w3, w21
-	mov	w2, 1665
-	add	x1, x1, :lo12:.LANCHOR170
+	mov	w3, w22
+	mov	w2, 1683
+	add	x1, x1, :lo12:.LANCHOR173
 	add	x0, x0, :lo12:.LC66
 	bl	printf
-.L2156:
-	adrp	x27, .LANCHOR114
-	adrp	x28, .LANCHOR99
+.L2163:
+	adrp	x27, .LANCHOR117
+	adrp	x28, .LANCHOR103
 	mov	w5, 20038
-	add	x27, x27, :lo12:.LANCHOR114
-	add	x28, x28, :lo12:.LANCHOR99
-	mov	w23, 0
+	add	x27, x27, :lo12:.LANCHOR117
+	add	x28, x28, :lo12:.LANCHOR103
+	mov	w24, 0
 	movk	w5, 0x4549, lsl 16
-.L2157:
-	and	w20, w21, 65535
-	sub	w0, w20, w23
-	tbnz	x0, 15, .L2162
+.L2164:
+	and	w21, w22, 65535
+	sub	w0, w21, w24
+	tbnz	x0, 15, .L2169
 	ldrh	w0, [x28]
-	sub	w1, w21, w23
+	sub	w1, w22, w24
 	ldrb	w4, [x27]
-	add	x3, x24, :lo12:.LANCHOR163
+	add	x3, x25, :lo12:.LANCHOR166
 	str	w5, [x29, 108]
-	add	x2, x25, :lo12:ftl_ext_info_data_buffer
-	madd	w1, w0, w26, w1
-	mov	w0, w19
+	add	x2, x26, :lo12:ftl_ext_info_data_buffer
+	madd	w1, w0, w19, w1
+	mov	w0, w20
 	bl	flash_read_page_en
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
 	ldr	w5, [x29, 108]
-	beq	.L2158
+	beq	.L2165
 	adrp	x0, .LANCHOR5
 	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	ldr	w0, [x0]
 	cmp	w0, w5
-	bne	.L2158
-.L2162:
+	bne	.L2165
+.L2169:
 	bl	zftl_sblk_list_init
-	ldr	x0, [x22, #:lo12:.LANCHOR101]
+	ldr	x0, [x23, #:lo12:.LANCHOR97]
 	ldrh	w1, [x0, 140]
-	cmp	w1, w21
-	bgt	.L2160
-	add	w20, w20, 1
-	strh	w20, [x0, 140]
+	cmp	w1, w22
+	bgt	.L2167
+	add	w21, w21, 1
+	strh	w21, [x0, 140]
 	bl	ftl_ext_info_flush
-.L2160:
+.L2167:
 	adrp	x0, .LANCHOR5
 	mov	w1, -1
 	ldp	x19, x20, [sp, 16]
@@ -13086,14 +13151,14 @@ ftl_ext_info_init:
 	str	wzr, [x0, 520]
 	str	wzr, [x0, 604]
 	str	wzr, [x0, 608]
-	adrp	x0, .LANCHOR111
-	strh	w1, [x0, #:lo12:.LANCHOR111]
+	adrp	x0, .LANCHOR114
+	strh	w1, [x0, #:lo12:.LANCHOR114]
 	mov	w0, 0
 	ldp	x29, x30, [sp], 112
 	ret
-.L2158:
-	add	w23, w23, 1
-	b	.L2157
+.L2165:
+	add	w24, w24, 1
+	b	.L2164
 	.size	ftl_ext_info_init, .-ftl_ext_info_init
 	.section	.text.ftl_low_format,"ax",@progbits
 	.align	2
@@ -13103,41 +13168,41 @@ ftl_low_format:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR171
+	adrp	x20, .LANCHOR174
 	stp	x21, x22, [sp, 32]
-	add	x20, x20, :lo12:.LANCHOR171
+	add	x20, x20, :lo12:.LANCHOR174
 	stp	x25, x26, [sp, 64]
 	adrp	x22, .LANCHOR20
 	mov	x25, x22
 	stp	x23, x24, [sp, 48]
 	mov	w19, 8
 	adrp	x23, .LC0
-.L2173:
+.L2180:
 	ldr	x0, [x22, #:lo12:.LANCHOR20]
 	add	x0, x0, x19, sxtw
 	ldrb	w21, [x0, 32]
 	add	w0, w21, 127
 	and	w0, w0, 255
 	cmp	w0, 125
-	bhi	.L2171
-	mov	w2, 1836
+	bhi	.L2178
+	mov	w2, 1854
 	mov	x1, x20
 	add	x0, x23, :lo12:.LC0
 	bl	printf
-.L2171:
+.L2178:
 	cmp	w21, 255
-	beq	.L2172
-	adrp	x0, .LANCHOR99
-	ldrh	w1, [x0, #:lo12:.LANCHOR99]
+	beq	.L2179
+	adrp	x0, .LANCHOR103
+	ldrh	w1, [x0, #:lo12:.LANCHOR103]
 	mov	w0, 0
 	mul	w1, w1, w21
 	bl	flash_erase_block
-.L2172:
+.L2179:
 	add	w19, w19, 1
 	cmp	w19, 16
-	bne	.L2173
+	bne	.L2180
 	bl	sblk_init
-	adrp	x19, .LANCHOR101
+	adrp	x19, .LANCHOR97
 	bl	ftl_info_blk_init
 	adrp	x22, .LANCHOR3
 	mov	w1, 0
@@ -13146,15 +13211,15 @@ ftl_low_format:
 	add	x0, x0, :lo12:ftl_info_data_buffer
 	bl	ftl_memset
 	adrp	x20, .LANCHOR2
-	ldr	x3, [x19, #:lo12:.LANCHOR101]
+	ldr	x3, [x19, #:lo12:.LANCHOR97]
 	mov	w5, 1
 	ldr	x1, [x22, #:lo12:.LANCHOR3]
 	ldrh	w4, [x20, #:lo12:.LANCHOR2]
 	ldrh	w0, [x3, 134]
 	add	x1, x1, x0, uxth 2
-.L2174:
+.L2181:
 	cmp	w0, w4
-	bcc	.L2175
+	bcc	.L2182
 	mov	w0, 21574
 	adrp	x24, .LANCHOR60
 	add	x24, x24, :lo12:.LANCHOR60
@@ -13163,11 +13228,11 @@ ftl_low_format:
 	mov	w21, 0
 	mov	w26, 1
 	str	w0, [x3]
-.L2176:
+.L2183:
 	ldrh	w0, [x20, #:lo12:.LANCHOR2]
 	adrp	x23, .LANCHOR95
 	cmp	w0, w21
-	bhi	.L2184
+	bhi	.L2191
 	adrp	x21, .LANCHOR5
 	mov	w2, 16384
 	mov	w1, 0
@@ -13176,7 +13241,7 @@ ftl_low_format:
 	bl	ftl_memset
 	ldr	x0, [x21, #:lo12:.LANCHOR5]
 	mov	w1, 20038
-	ldr	x6, [x19, #:lo12:.LANCHOR101]
+	ldr	x6, [x19, #:lo12:.LANCHOR97]
 	movk	w1, 0x4549, lsl 16
 	mov	w4, 3
 	mov	w10, 15
@@ -13196,7 +13261,7 @@ ftl_low_format:
 	add	x0, x0, 4
 	add	w24, w5, 1
 	add	x0, x1, x0
-.L2187:
+.L2194:
 	cmp	w2, 4
 	add	x1, x1, 4
 	csel	w7, w10, w4, eq
@@ -13205,7 +13270,7 @@ ftl_low_format:
 	orr	w7, w7, -32
 	strb	w7, [x1, -2]
 	cmp	x1, x0
-	bne	.L2187
+	bne	.L2194
 	mul	w5, w5, w8
 	mov	w4, 16
 	add	w0, w8, w3
@@ -13217,26 +13282,26 @@ ftl_low_format:
 	add	w4, w24, w4
 	and	w4, w4, 65535
 	strh	w4, [x6, 134]
-	tbz	x0, 12, .L2188
+	tbz	x0, 12, .L2195
 	adrp	x0, .LC123
 	mov	w3, w24
 	mov	w2, 128
-	mov	w1, 1883
+	mov	w1, 1901
 	add	x0, x0, :lo12:.LC123
 	bl	printf
-.L2188:
-	ldr	x0, [x19, #:lo12:.LANCHOR101]
+.L2195:
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	w2, 128
 	mov	w1, 255
 	add	x0, x0, 160
 	bl	ftl_memset
 	ldrb	w6, [x23, #:lo12:.LANCHOR95]
-	adrp	x0, .LANCHOR100
+	adrp	x0, .LANCHOR104
 	ldr	x11, [x22, #:lo12:.LANCHOR3]
 	adrp	x22, .LANCHOR96
-	ldr	x8, [x19, #:lo12:.LANCHOR101]
+	ldr	x8, [x19, #:lo12:.LANCHOR97]
 	and	w7, w6, 65535
-	ldrb	w12, [x0, #:lo12:.LANCHOR100]
+	ldrb	w12, [x0, #:lo12:.LANCHOR104]
 	mov	w2, 21
 	ldrh	w0, [x22, #:lo12:.LANCHOR96]
 	mov	w23, 0
@@ -13247,9 +13312,9 @@ ftl_low_format:
 	and	w1, w1, 65535
 	lsl	w2, w2, w0
 	and	w2, w2, 65535
-.L2189:
+.L2196:
 	cmp	w24, w10
-	bcc	.L2195
+	bcc	.L2202
 	adrp	x0, .LANCHOR4
 	ldrh	w2, [x20, #:lo12:.LANCHOR2]
 	mov	w1, 0
@@ -13257,7 +13322,7 @@ ftl_low_format:
 	lsl	w2, w2, 1
 	bl	ftl_memset
 	bl	zftl_sblk_list_init
-	ldr	x0, [x19, #:lo12:.LANCHOR101]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	ldrh	w1, [x20, #:lo12:.LANCHOR2]
 	ldrh	w2, [x0, 134]
 	strh	w23, [x0, 112]
@@ -13270,25 +13335,25 @@ ftl_low_format:
 	mov	w23, w0
 	mov	w1, 0
 	bl	ftl_erase_sblk
-	ldr	x1, [x19, #:lo12:.LANCHOR101]
+	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	mov	w0, w23
 	add	x1, x1, 672
 	bl	ftl_get_blk_list_in_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR101]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	ldrh	w20, [x0, 672]
 	strh	wzr, [x0, 690]
 	mov	w0, 65533
 	sub	w1, w20, #1
 	cmp	w0, w1, uxth
-	bcs	.L2196
-	adrp	x1, .LANCHOR171
+	bcs	.L2203
+	adrp	x1, .LANCHOR174
 	adrp	x0, .LC0
-	mov	w2, 1914
-	add	x1, x1, :lo12:.LANCHOR171
+	mov	w2, 1932
+	add	x1, x1, :lo12:.LANCHOR174
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2196:
-	ldr	x0, [x19, #:lo12:.LANCHOR101]
+.L2203:
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	w2, 256
 	mov	w1, 255
 	add	x0, x0, 416
@@ -13296,22 +13361,22 @@ ftl_low_format:
 	bl	ftl_memset
 	ldrh	w2, [x22, #:lo12:.LANCHOR96]
 	mov	w1, 21
-	ldr	x0, [x19, #:lo12:.LANCHOR101]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	sub	w1, w1, w2
 	asr	w1, w20, w1
 	strh	w1, [x0, 694]
 	mov	w1, 1
 	strh	w1, [x0, 688]
-	adrp	x1, .LANCHOR172
+	adrp	x1, .LANCHOR175
 	strh	w20, [x0, 692]
-	ldrh	w1, [x1, #:lo12:.LANCHOR172]
+	ldrh	w1, [x1, #:lo12:.LANCHOR175]
 	strh	w23, [x0, 416]
 	strh	w1, [x0, 698]
 	bl	ftl_alloc_sys_blk
 	mov	w20, w0
 	mov	w1, 0
 	bl	ftl_erase_phy_blk
-	ldr	x0, [x19, #:lo12:.LANCHOR101]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	w1, 2
 	strh	w20, [x0, 130]
 	ldr	x0, [x21, #:lo12:.LANCHOR5]
@@ -13321,7 +13386,7 @@ ftl_low_format:
 	mov	w1, 3
 	add	x0, x0, 48
 	bl	ftl_open_sblk_init
-	ldr	x1, [x19, #:lo12:.LANCHOR101]
+	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	ldr	x0, [x21, #:lo12:.LANCHOR5]
 	add	x0, x0, 136
 	ldrh	w2, [x1, 134]
@@ -13354,7 +13419,7 @@ ftl_low_format:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2175:
+.L2182:
 	ldrb	w2, [x1, 2]
 	add	w0, w0, 1
 	and	w0, w0, 65535
@@ -13362,31 +13427,31 @@ ftl_low_format:
 	and	w2, w2, 31
 	bfi	w2, w5, 3, 2
 	strb	w2, [x1, -2]
-	b	.L2174
-.L2184:
+	b	.L2181
+.L2191:
 	strh	w21, [x24]
 	mov	w0, w21
 	bl	ftl_test_block
 	ldrb	w11, [x23, #:lo12:.LANCHOR95]
-	adrp	x0, .LANCHOR100
+	adrp	x0, .LANCHOR104
 	ldr	x6, [x22, #:lo12:.LANCHOR3]
 	mov	w7, 0
-	ldrb	w14, [x0, #:lo12:.LANCHOR100]
+	ldrb	w14, [x0, #:lo12:.LANCHOR104]
 	mov	w10, 0
-	ldr	x13, [x19, #:lo12:.LANCHOR101]
+	ldr	x13, [x19, #:lo12:.LANCHOR97]
 	mov	w8, 0
 	mul	w12, w21, w11
 	add	x6, x6, x21, uxth 2
-.L2177:
+.L2184:
 	cmp	w8, w14
-	bcs	.L2181
+	bcs	.L2188
 	add	w15, w11, w7
-	b	.L2182
-.L2180:
+	b	.L2189
+.L2187:
 	add	w1, w7, w12
 	mov	w0, w8
 	bl	flash_check_bad_block
-	cbz	w0, .L2178
+	cbz	w0, .L2185
 	ldrb	w1, [x6, 3]
 	lsl	w0, w26, w7
 	orr	w0, w0, w1
@@ -13394,29 +13459,29 @@ ftl_low_format:
 	ldrh	w0, [x13, 148]
 	add	w0, w0, 1
 	strh	w0, [x13, 148]
-.L2179:
+.L2186:
 	add	w7, w7, 1
-.L2182:
+.L2189:
 	cmp	w7, w15
-	bne	.L2180
+	bne	.L2187
 	add	w8, w8, 1
 	sub	w12, w12, w11
 	and	w8, w8, 65535
-	b	.L2177
-.L2178:
+	b	.L2184
+.L2185:
 	add	w10, w10, 1
 	and	w10, w10, 65535
-	b	.L2179
-.L2181:
-	cbnz	w10, .L2183
+	b	.L2186
+.L2188:
+	cbnz	w10, .L2190
 	ldrb	w0, [x6, 2]
 	orr	w0, w0, -32
 	strb	w0, [x6, 2]
-.L2183:
+.L2190:
 	add	w21, w21, 1
 	and	w21, w21, 65535
-	b	.L2176
-.L2195:
+	b	.L2183
+.L2202:
 	add	x13, x11, x24, uxth 2
 	mov	w14, 0
 	mov	w15, 0
@@ -13424,48 +13489,48 @@ ftl_low_format:
 	ldrb	w0, [x13, 2]
 	orr	w0, w0, -32
 	strb	w0, [x13, 2]
-.L2190:
+.L2197:
 	cmp	w3, w12
-	bcc	.L2198
+	bcc	.L2205
 	add	w24, w24, 1
 	add	w1, w7, w1
 	and	w24, w24, 65535
 	and	w1, w1, 65535
-	b	.L2189
-.L2193:
+	b	.L2196
+.L2200:
 	ldrb	w5, [x13, 3]
 	add	w16, w15, w4
 	asr	w5, w5, w16
-	tbnz	x5, 0, .L2191
+	tbnz	x5, 0, .L2198
 	cmp	w6, 1
-	bls	.L2197
+	bls	.L2204
 	and	w0, w0, 1
 	add	w0, w1, w0
 	and	w0, w0, 65535
-.L2192:
+.L2199:
 	add	x5, x8, x23, sxtw 1
 	add	w23, w23, 1
 	and	w23, w23, 65535
 	add	w0, w0, w14
 	strh	w0, [x5, 160]
-.L2191:
+.L2198:
 	add	x4, x4, 1
-.L2194:
+.L2201:
 	and	w0, w4, 65535
 	cmp	w0, w7
-	bcc	.L2193
+	bcc	.L2200
 	add	w3, w3, 1
 	add	w0, w2, w14
 	and	w3, w3, 65535
 	add	w15, w15, w6
 	and	w14, w0, 65535
-	b	.L2190
-.L2197:
+	b	.L2197
+.L2204:
 	mov	w0, w1
-	b	.L2192
-.L2198:
+	b	.L2199
+.L2205:
 	mov	x4, 0
-	b	.L2194
+	b	.L2201
 	.size	ftl_low_format, .-ftl_low_format
 	.section	.text.ftl_re_low_format_test,"ax",@progbits
 	.align	2
@@ -13478,7 +13543,7 @@ ftl_re_low_format_test:
 	add	x0, x0, :lo12:.LC124
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR101
+	adrp	x19, .LANCHOR97
 	stp	x21, x22, [sp, 32]
 	adrp	x21, .LANCHOR2
 	str	x23, [sp, 48]
@@ -13486,7 +13551,7 @@ ftl_re_low_format_test:
 	bl	sblk_init
 	bl	ftl_info_blk_init
 	bl	ftl_ext_info_init
-	ldr	x0, [x19, #:lo12:.LANCHOR101]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	adrp	x3, .LANCHOR3
 	ldrh	w2, [x21, #:lo12:.LANCHOR2]
 	mov	w4, 0
@@ -13495,9 +13560,9 @@ ftl_re_low_format_test:
 	mov	w6, 0
 	ldrh	w1, [x0, 134]
 	add	x3, x3, x1, uxth 2
-.L2209:
+.L2216:
 	cmp	w1, w2
-	bcc	.L2213
+	bcc	.L2220
 	adrp	x23, .LANCHOR4
 	strh	w6, [x0, 114]
 	strh	w5, [x0, 118]
@@ -13515,46 +13580,46 @@ ftl_re_low_format_test:
 	mov	w1, 0
 	mov	w22, w0
 	bl	ftl_erase_sblk
-	ldr	x1, [x19, #:lo12:.LANCHOR101]
+	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	mov	w0, w22
 	add	x1, x1, 672
 	bl	ftl_get_blk_list_in_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR101]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	ldrh	w20, [x0, 672]
 	strh	wzr, [x0, 690]
 	mov	w0, 65533
 	sub	w1, w20, #1
 	cmp	w0, w1, uxth
-	bcs	.L2214
-	adrp	x1, .LANCHOR173
+	bcs	.L2221
+	adrp	x1, .LANCHOR176
 	adrp	x0, .LC0
-	mov	w2, 1986
-	add	x1, x1, :lo12:.LANCHOR173
+	mov	w2, 2004
+	add	x1, x1, :lo12:.LANCHOR176
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2214:
-	ldr	x0, [x19, #:lo12:.LANCHOR101]
+.L2221:
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	w2, 256
 	mov	w1, 255
 	add	x0, x0, 416
 	strh	wzr, [x0, 280]
 	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR101]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	w2, 4096
 	mov	w1, 0
 	add	x0, x0, 704
 	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR101]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	lsr	w1, w20, 14
 	and	w20, w20, 16383
 	ldrh	w2, [x21, #:lo12:.LANCHOR2]
 	strh	w1, [x0, 694]
 	mov	w1, 1
 	strh	w1, [x0, 688]
-	adrp	x1, .LANCHOR172
+	adrp	x1, .LANCHOR175
 	strh	w20, [x0, 692]
 	adrp	x20, .LANCHOR5
-	ldrh	w1, [x1, #:lo12:.LANCHOR172]
+	ldrh	w1, [x1, #:lo12:.LANCHOR175]
 	lsl	w2, w2, 1
 	strh	w22, [x0, 416]
 	strh	w1, [x0, 698]
@@ -13569,7 +13634,7 @@ ftl_re_low_format_test:
 	mov	w1, 3
 	add	x0, x0, 48
 	bl	ftl_open_sblk_init
-	ldr	x1, [x19, #:lo12:.LANCHOR101]
+	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	ldr	x0, [x20, #:lo12:.LANCHOR5]
 	add	x0, x0, 136
 	ldrh	w2, [x1, 134]
@@ -13605,29 +13670,29 @@ ftl_re_low_format_test:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2213:
+.L2220:
 	ldrb	w7, [x3, 2]
 	and	w8, w7, 31
 	strb	w8, [x3, 2]
 	ands	w7, w7, 24
-	bne	.L2210
+	bne	.L2217
 	add	w6, w6, 1
 	and	w6, w6, 65535
-.L2211:
+.L2218:
 	add	w1, w1, 1
 	add	x3, x3, 4
 	and	w1, w1, 65535
-	b	.L2209
-.L2210:
+	b	.L2216
+.L2217:
 	cmp	w7, 16
-	bne	.L2212
+	bne	.L2219
 	add	w5, w5, 1
 	and	w5, w5, 65535
-	b	.L2211
-.L2212:
+	b	.L2218
+.L2219:
 	add	w4, w4, 1
 	and	w4, w4, 65535
-	b	.L2211
+	b	.L2218
 	.size	ftl_re_low_format_test, .-ftl_re_low_format_test
 	.section	.text.ftl_prog_ppa_page,"ax",@progbits
 	.align	2
@@ -13649,27 +13714,27 @@ ftl_prog_ppa_page:
 ftl_write_last_log_page:
 	ldrh	w1, [x0, 6]
 	cmp	w1, 1
-	bne	.L2219
+	bne	.L2226
 	stp	x29, x30, [sp, -48]!
-	adrp	x1, .LANCHOR106
+	adrp	x1, .LANCHOR109
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
 	stp	x21, x22, [sp, 32]
-	ldr	x20, [x1, #:lo12:.LANCHOR106]
+	ldr	x20, [x1, #:lo12:.LANCHOR109]
 	ldrh	w22, [x0, 12]
 	bl	ftl_get_new_free_page
 	mov	w21, w0
 	cmn	w0, #1
-	beq	.L2220
+	beq	.L2227
 	ldrh	w0, [x19]
 	add	x20, x20, x22, uxth 2
 	bl	ftl_vpn_decrement
-	adrp	x0, .LANCHOR152
+	adrp	x0, .LANCHOR155
 	mov	w1, 15555
-	add	x6, x0, :lo12:.LANCHOR152
+	add	x6, x0, :lo12:.LANCHOR155
 	movk	w1, 0xf55f, lsl 16
-	str	w1, [x0, #:lo12:.LANCHOR152]
+	str	w1, [x0, #:lo12:.LANCHOR155]
 	adrp	x0, .LANCHOR80
 	ldrh	w1, [x0, #:lo12:.LANCHOR80]
 	adrp	x0, .LANCHOR72
@@ -13679,20 +13744,20 @@ ftl_write_last_log_page:
 	lsl	w1, w1, 2
 	bl	js_hash
 	stp	w0, wzr, [x6, 4]
-	adrp	x0, .LANCHOR114
+	adrp	x0, .LANCHOR117
 	mov	x2, x6
 	mov	x1, x20
-	ldrb	w3, [x0, #:lo12:.LANCHOR114]
+	ldrb	w3, [x0, #:lo12:.LANCHOR117]
 	mov	w0, w21
 	str	wzr, [x6, 12]
 	bl	ftl_prog_ppa_page
-.L2220:
+.L2227:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L2219:
+.L2226:
 	mov	w0, -1
 	ret
 	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
@@ -13713,36 +13778,36 @@ ftl_open_sblk_recovery:
 	mov	x25, x1
 	stp	x19, x20, [sp, 64]
 	stp	x23, x24, [sp, 96]
-	tbz	x0, 12, .L2226
+	tbz	x0, 12, .L2233
 	ldrh	w1, [x28, 2]
 	adrp	x0, .LC125
 	add	x0, x0, :lo12:.LC125
 	bl	printf
-.L2226:
+.L2233:
 	ldr	w0, [x22, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2227
+	tbz	x0, 12, .L2234
 	ldrb	w1, [x28, 5]
 	adrp	x0, .LC126
 	add	x0, x0, :lo12:.LC126
 	bl	printf
-.L2227:
+.L2234:
 	ldr	w0, [x22, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2228
+	tbz	x0, 12, .L2235
 	ldrh	w1, [x28]
 	adrp	x0, .LC127
 	add	x0, x0, :lo12:.LC127
 	bl	printf
-.L2228:
+.L2235:
 	ldr	w0, [x22, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2229
+	tbz	x0, 12, .L2236
 	ldrh	w2, [x28, 18]
 	adrp	x0, .LC128
 	ldrh	w1, [x28, 16]
 	add	x0, x0, :lo12:.LC128
 	bl	printf
-.L2229:
+.L2236:
 	ldrh	w0, [x28, 10]
-	adrp	x26, .LANCHOR114
+	adrp	x26, .LANCHOR117
 	strh	w0, [x28, 14]
 	mov	w27, 0
 	mov	w0, 1
@@ -13751,13 +13816,13 @@ ftl_open_sblk_recovery:
 	ldrb	w20, [x28, 5]
 	ldrh	w21, [x28, 2]
 	mov	x19, x0
-	add	x0, x26, :lo12:.LANCHOR114
+	add	x0, x26, :lo12:.LANCHOR117
 	str	x0, [x29, 128]
-.L2230:
+.L2237:
 	ldrh	w0, [x23, #:lo12:.LANCHOR80]
 	cmp	w0, w21
-	bhi	.L2244
-.L2233:
+	bhi	.L2251
+.L2240:
 	ldrh	w0, [x28, 10]
 	ldrh	w1, [x28, 6]
 	ldrh	w2, [x23, #:lo12:.LANCHOR80]
@@ -13767,22 +13832,22 @@ ftl_open_sblk_recovery:
 	strb	w20, [x28, 5]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L2245
-	adrp	x1, .LANCHOR174
+	beq	.L2252
+	adrp	x1, .LANCHOR177
 	adrp	x0, .LC0
-	mov	w2, 1347
-	add	x1, x1, :lo12:.LANCHOR174
+	mov	w2, 1365
+	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2245:
-	adrp	x21, .LANCHOR106
+.L2252:
+	adrp	x21, .LANCHOR109
 	ldrh	w3, [x28, 10]
 	mov	w0, 0
 	mov	w1, 0
-	ldr	x4, [x21, #:lo12:.LANCHOR106]
-.L2246:
+	ldr	x4, [x21, #:lo12:.LANCHOR109]
+.L2253:
 	cmp	w1, w3
-	bcc	.L2248
+	bcc	.L2255
 	ldrb	w20, [x28, 9]
 	adrp	x24, .LANCHOR4
 	ldrh	w1, [x23, #:lo12:.LANCHOR80]
@@ -13790,7 +13855,7 @@ ftl_open_sblk_recovery:
 	ldr	w0, [x22, #:lo12:.LANCHOR7]
 	sub	w20, w20, w3
 	and	w20, w20, 65535
-	tbz	x0, 12, .L2249
+	tbz	x0, 12, .L2256
 	ldrh	w1, [x28]
 	ldr	x2, [x24, #:lo12:.LANCHOR4]
 	ubfiz	x0, x1, 1, 16
@@ -13799,43 +13864,43 @@ ftl_open_sblk_recovery:
 	mov	w2, w20
 	add	x0, x0, :lo12:.LC130
 	bl	printf
-.L2249:
+.L2256:
 	ldr	x0, [x24, #:lo12:.LANCHOR4]
-	adrp	x25, .LANCHOR114
+	adrp	x25, .LANCHOR117
 	ldrh	w1, [x28]
 	adrp	x24, .LANCHOR72
 	adrp	x26, .LC131
 	add	x24, x24, :lo12:.LANCHOR72
-	add	x25, x25, :lo12:.LANCHOR114
+	add	x25, x25, :lo12:.LANCHOR117
 	add	x26, x26, :lo12:.LC131
 	strh	w20, [x0, x1, lsl 1]
 	mov	w20, 0
 	mov	x0, x19
 	bl	buf_free
-.L2250:
+.L2257:
 	ldrb	w0, [x24]
 	cmp	w20, w0, lsl 1
-	bcc	.L2253
+	bcc	.L2260
 	ldrh	w1, [x28, 12]
 	ldrh	w0, [x23, #:lo12:.LANCHOR80]
 	ldrb	w2, [x28, 9]
 	madd	w0, w0, w2, w1
 	mov	x1, -4
 	add	x0, x1, x0, sxtw 2
-	ldr	x1, [x21, #:lo12:.LANCHOR106]
+	ldr	x1, [x21, #:lo12:.LANCHOR109]
 	ldr	w0, [x1, x0]
 	cmn	w0, #1
-	beq	.L2254
-	adrp	x1, .LANCHOR174
+	beq	.L2261
+	adrp	x1, .LANCHOR177
 	adrp	x0, .LC0
-	mov	w2, 1377
-	add	x1, x1, :lo12:.LANCHOR174
+	mov	w2, 1395
+	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2254:
+.L2261:
 	ldrh	w0, [x28, 6]
 	cmp	w0, 1
-	bne	.L2225
+	bne	.L2232
 	ldp	x19, x20, [sp, 64]
 	mov	x0, x28
 	ldp	x21, x22, [sp, 80]
@@ -13845,27 +13910,27 @@ ftl_open_sblk_recovery:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 192
 	b	ftl_write_last_log_page
-.L2244:
+.L2251:
 	ldrb	w20, [x28, 5]
-	adrp	x0, .LANCHOR99
-	add	x0, x0, :lo12:.LANCHOR99
+	adrp	x0, .LANCHOR103
+	add	x0, x0, :lo12:.LANCHOR103
 	str	x0, [x29, 136]
-.L2231:
+.L2238:
 	ldrb	w0, [x28, 9]
 	cmp	w0, w20
-	bhi	.L2243
+	bhi	.L2250
 	add	w21, w21, 1
 	strb	wzr, [x28, 5]
 	and	w21, w21, 65535
-	b	.L2230
-.L2243:
+	b	.L2237
+.L2250:
 	add	x0, x28, x20, sxtw 1
 	ldrh	w11, [x0, 16]
 	mov	w0, 65535
 	cmp	w11, w0
-	beq	.L2232
+	beq	.L2239
 	ldr	x0, [x29, 136]
-	ldrb	w3, [x26, #:lo12:.LANCHOR114]
+	ldrb	w3, [x26, #:lo12:.LANCHOR117]
 	ldr	x1, [x19, 8]
 	ldr	x2, [x19, 24]
 	ldrh	w10, [x0]
@@ -13875,24 +13940,24 @@ ftl_open_sblk_recovery:
 	bl	ftl_read_ppa_page
 	mov	w24, w0
 	cmp	w0, 512
-	beq	.L2233
+	beq	.L2240
 	cmn	w0, #1
 	ldp	w11, w10, [x29, 116]
-	beq	.L2234
+	beq	.L2241
 	ldr	x0, [x19, 24]
 	ldr	w1, [x0]
 	cmn	w1, #1
-	bne	.L2234
+	bne	.L2241
 	ldr	w0, [x0, 4]
 	cmn	w0, #1
-	bne	.L2234
+	bne	.L2241
 	ldr	x0, [x19, 8]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L2233
-.L2234:
+	beq	.L2240
+.L2241:
 	ldr	w0, [x22, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2235
+	tbz	x0, 12, .L2242
 	ldr	x1, [x19, 24]
 	mov	w4, w24
 	ldr	x0, [x19, 8]
@@ -13914,22 +13979,22 @@ ftl_open_sblk_recovery:
 	adrp	x0, .LC129
 	add	x0, x0, :lo12:.LC129
 	bl	printf
-.L2235:
-	adrp	x0, .LANCHOR167
+.L2242:
+	adrp	x0, .LANCHOR170
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR167]
+	strb	w1, [x0, #:lo12:.LANCHOR170]
 	ldrb	w0, [x28, 9]
 	ldrh	w1, [x28, 10]
 	madd	w0, w0, w21, w20
 	cmp	w1, w0
-	beq	.L2236
-	adrp	x1, .LANCHOR174
+	beq	.L2243
+	adrp	x1, .LANCHOR177
 	adrp	x0, .LC0
-	mov	w2, 1270
-	add	x1, x1, :lo12:.LANCHOR174
+	mov	w2, 1288
+	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2236:
+.L2243:
 	ldrh	w0, [x28, 10]
 	ldrh	w1, [x28, 6]
 	ldrb	w2, [x28, 9]
@@ -13937,28 +14002,28 @@ ftl_open_sblk_recovery:
 	ldrh	w0, [x23, #:lo12:.LANCHOR80]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L2237
-	adrp	x1, .LANCHOR174
+	beq	.L2244
+	adrp	x1, .LANCHOR177
 	adrp	x0, .LC0
-	mov	w2, 1271
-	add	x1, x1, :lo12:.LANCHOR174
+	mov	w2, 1289
+	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2237:
+.L2244:
 	cmn	w24, #1
-	beq	.L2239
+	beq	.L2246
 	ldr	x0, [x19, 24]
 	ldr	w0, [x0, 4]
 	cmn	w0, #1
-	beq	.L2239
+	beq	.L2246
 	bl	lpa_hash_get_ppa
-	cbz	x25, .L2241
+	cbz	x25, .L2248
 	ldr	x3, [x19, 24]
 	ldr	w1, [x3, 8]
 	cmp	w0, w1
-	beq	.L2241
+	beq	.L2248
 	cmn	w0, #1
-	beq	.L2241
+	beq	.L2248
 	adrp	x4, .LANCHOR96
 	mov	w27, 21
 	mov	w24, 1
@@ -13973,11 +14038,11 @@ ftl_open_sblk_recovery:
 	udiv	w1, w1, w2
 	ldrh	w2, [x25]
 	cmp	w2, w1, uxth
-	bne	.L2241
+	bne	.L2248
 	ldr	x1, [x29, 128]
-	adrp	x6, .LANCHOR163
+	adrp	x6, .LANCHOR166
 	ldr	w7, [x3]
-	add	x2, x6, :lo12:.LANCHOR163
+	add	x2, x6, :lo12:.LANCHOR166
 	str	w7, [x29, 116]
 	str	x6, [x29, 120]
 	ldrb	w3, [x1]
@@ -13986,13 +14051,13 @@ ftl_open_sblk_recovery:
 	bl	ftl_read_ppa_page
 	ldr	x6, [x29, 120]
 	ldr	w7, [x29, 116]
-	ldr	w0, [x6, #:lo12:.LANCHOR163]
+	ldr	w0, [x6, #:lo12:.LANCHOR166]
 	cmp	w7, w0
-	bhi	.L2241
+	bhi	.L2248
 	ldr	x0, [x19, 24]
 	ldr	w0, [x0, 8]
 	cmn	w0, #1
-	beq	.L2239
+	beq	.L2246
 	ldp	x5, x4, [x29, 96]
 	ldrh	w1, [x4, #:lo12:.LANCHOR96]
 	sub	w27, w27, w1
@@ -14003,7 +14068,7 @@ ftl_open_sblk_recovery:
 	ldrb	w0, [x5, #:lo12:.LANCHOR95]
 	udiv	w0, w24, w0
 	bl	ftl_vpn_decrement
-.L2239:
+.L2246:
 	ldrh	w0, [x28, 6]
 	mov	w27, 1
 	sub	w0, w0, #1
@@ -14011,41 +14076,41 @@ ftl_open_sblk_recovery:
 	ldrh	w0, [x28, 10]
 	add	w0, w0, 1
 	strh	w0, [x28, 10]
-.L2232:
+.L2239:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2231
-.L2248:
+	b	.L2238
+.L2255:
 	ldrh	w2, [x28, 12]
 	add	w2, w2, w1
 	ldr	w2, [x4, x2, lsl 2]
 	cmn	w2, #1
-	beq	.L2247
+	beq	.L2254
 	add	w20, w0, 1
 	and	w0, w20, 65535
-.L2247:
+.L2254:
 	add	w1, w1, 1
-	b	.L2246
-.L2253:
-	cbz	w27, .L2251
+	b	.L2253
+.L2260:
+	cbz	w27, .L2258
 	ldrh	w0, [x28, 6]
 	cmp	w0, 1
-	bls	.L2251
+	bls	.L2258
 	mov	x0, x28
 	bl	ftl_get_new_free_page
 	mov	w4, w0
 	ldr	w0, [x22, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2252
+	tbz	x0, 12, .L2259
 	mov	w1, w4
 	str	w4, [x29, 136]
 	mov	x0, x26
 	bl	printf
 	ldr	w4, [x29, 136]
-.L2252:
-	adrp	x0, .LANCHOR101
+.L2259:
+	adrp	x0, .LANCHOR97
 	ldr	x2, [x19, 24]
 	ldr	x1, [x19, 8]
-	ldr	x0, [x0, #:lo12:.LANCHOR101]
+	ldr	x0, [x0, #:lo12:.LANCHOR97]
 	ldr	w0, [x0, 8]
 	str	w0, [x2]
 	str	wzr, [x2, 12]
@@ -14057,37 +14122,37 @@ ftl_open_sblk_recovery:
 	bl	ftl_prog_ppa_page
 	ldrh	w0, [x28]
 	bl	ftl_vpn_decrement
-.L2251:
+.L2258:
 	add	w20, w20, 1
-	b	.L2250
-.L2241:
+	b	.L2257
+.L2248:
 	ldr	x3, [x19, 24]
 	adrp	x0, .LANCHOR54
 	ldr	w0, [x0, #:lo12:.LANCHOR54]
 	ldr	w1, [x3, 4]
 	cmp	w1, w0
-	bcs	.L2239
+	bcs	.L2246
 	ldrb	w0, [x28, 9]
 	ldrh	w1, [x23, #:lo12:.LANCHOR80]
 	ldrh	w2, [x28, 10]
 	mul	w0, w0, w1
 	sub	w0, w0, #1
 	cmp	w2, w0
-	bge	.L2239
-	adrp	x0, .LANCHOR101
+	bge	.L2246
+	adrp	x0, .LANCHOR97
 	ldr	w1, [x3]
-	ldr	x0, [x0, #:lo12:.LANCHOR101]
+	ldr	x0, [x0, #:lo12:.LANCHOR97]
 	ldr	w4, [x0, 8]
 	cmp	w1, w4
-	bls	.L2242
+	bls	.L2249
 	str	w1, [x0, 8]
-.L2242:
+.L2249:
 	ldrh	w0, [x28, 12]
 	add	w2, w2, w0
 	ldp	w0, w1, [x3, 4]
 	bl	lpa_hash_update_ppa
-	b	.L2239
-.L2225:
+	b	.L2246
+.L2232:
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
 	ldp	x23, x24, [sp, 96]
@@ -14109,92 +14174,92 @@ pm_write_page:
 	stp	x21, x22, [sp, 32]
 	adrp	x21, .LANCHOR80
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR99
+	adrp	x22, .LANCHOR103
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LANCHOR101
+	adrp	x23, .LANCHOR97
 	mov	x25, x1
 	add	x21, x21, :lo12:.LANCHOR80
 	mov	x20, x23
-	add	x22, x22, :lo12:.LANCHOR99
+	add	x22, x22, :lo12:.LANCHOR103
 	mov	w24, 65535
 	str	x27, [sp, 80]
-.L2307:
-	ldr	x0, [x23, #:lo12:.LANCHOR101]
+.L2314:
+	ldr	x0, [x23, #:lo12:.LANCHOR97]
 	ldr	w1, [x0, 48]
 	ldrh	w2, [x0, 696]
 	add	w1, w1, 1
 	str	w1, [x0, 48]
 	ldrh	w1, [x21]
 	cmp	w2, w1
-	bcs	.L2308
+	bcs	.L2315
 	ldrh	w0, [x0, 692]
 	cmp	w0, w24
-	bne	.L2309
-.L2308:
+	bne	.L2316
+.L2315:
 	bl	pm_alloc_new_blk
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2309:
-	ldr	x0, [x20, #:lo12:.LANCHOR101]
+.L2316:
+	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	ldrh	w0, [x0, 692]
 	cmp	w0, w24
-	bne	.L2310
-	adrp	x1, .LANCHOR175
+	bne	.L2317
+	adrp	x1, .LANCHOR178
 	adrp	x0, .LC0
 	mov	w2, 228
-	add	x1, x1, :lo12:.LANCHOR175
+	add	x1, x1, :lo12:.LANCHOR178
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2310:
-	ldr	x0, [x20, #:lo12:.LANCHOR101]
-	adrp	x27, .LANCHOR176
+.L2317:
+	ldr	x0, [x20, #:lo12:.LANCHOR97]
+	adrp	x27, .LANCHOR179
 	ldrh	w1, [x22]
 	mov	w2, 64
 	ldrh	w26, [x0, 692]
 	ldrh	w0, [x0, 696]
 	madd	w26, w26, w1, w0
-	ldr	x0, [x27, #:lo12:.LANCHOR176]
+	ldr	x0, [x27, #:lo12:.LANCHOR179]
 	mov	w1, 0
 	bl	ftl_memset
-	ldr	x3, [x27, #:lo12:.LANCHOR176]
+	ldr	x3, [x27, #:lo12:.LANCHOR179]
 	mov	x2, x25
-	ldr	x0, [x20, #:lo12:.LANCHOR101]
+	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	str	w19, [x3]
 	ldr	w1, [x0, 48]
 	ldrb	w0, [x0, 694]
 	str	w1, [x3, 4]
-	adrp	x1, .LANCHOR114
-	ldrb	w4, [x1, #:lo12:.LANCHOR114]
+	adrp	x1, .LANCHOR117
+	ldrb	w4, [x1, #:lo12:.LANCHOR117]
 	mov	w1, w26
 	bl	ftl_prog_page
-	ldr	x2, [x20, #:lo12:.LANCHOR101]
+	ldr	x2, [x20, #:lo12:.LANCHOR97]
 	ldrh	w1, [x2, 696]
 	add	w1, w1, 1
 	and	w1, w1, 65535
 	strh	w1, [x2, 696]
 	cmp	w1, 1
-	adrp	x1, .LANCHOR177
-	beq	.L2311
-	ldrb	w3, [x1, #:lo12:.LANCHOR177]
-	cbz	w3, .L2312
-.L2311:
-	strb	wzr, [x1, #:lo12:.LANCHOR177]
-	b	.L2307
-.L2312:
+	adrp	x1, .LANCHOR180
+	beq	.L2318
+	ldrb	w3, [x1, #:lo12:.LANCHOR180]
+	cbz	w3, .L2319
+.L2318:
+	strb	wzr, [x1, #:lo12:.LANCHOR180]
+	b	.L2314
+.L2319:
 	cmn	w0, #1
-	bne	.L2314
+	bne	.L2321
 	mov	w1, w26
 	adrp	x0, .LC132
 	add	x0, x0, :lo12:.LC132
 	bl	printf
-	b	.L2307
-.L2314:
+	b	.L2314
+.L2321:
 	ldrh	w0, [x2, 698]
 	cmp	w19, w0
-	bcs	.L2315
+	bcs	.L2322
 	add	x19, x2, x19, uxtw 2
 	str	w26, [x19, 704]
-.L2315:
+.L2322:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -14218,28 +14283,28 @@ flash_info_flush:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2321
-	adrp	x2, .LANCHOR178
+	tbz	x0, 12, .L2328
+	adrp	x2, .LANCHOR181
 	adrp	x0, .LC73
-	add	x2, x2, :lo12:.LANCHOR178
+	add	x2, x2, :lo12:.LANCHOR181
 	mov	w1, 251
 	add	x0, x0, :lo12:.LC73
 	bl	printf
-.L2321:
-	adrp	x23, .LANCHOR147
+.L2328:
+	adrp	x23, .LANCHOR150
 	adrp	x20, .LANCHOR20
 	mov	w2, 64
 	mov	w1, 0
-	ldr	x0, [x23, #:lo12:.LANCHOR147]
-	adrp	x21, .LANCHOR148
+	ldr	x0, [x23, #:lo12:.LANCHOR150]
+	adrp	x21, .LANCHOR151
 	adrp	x22, .LANCHOR26
 	adrp	x24, .LC134
-	adrp	x25, .LANCHOR125
+	adrp	x25, .LANCHOR128
 	add	x22, x22, :lo12:.LANCHOR26
 	add	x24, x24, :lo12:.LC134
-	add	x25, x25, :lo12:.LANCHOR125
+	add	x25, x25, :lo12:.LANCHOR128
 	bl	ftl_memset
-	add	x27, x21, :lo12:.LANCHOR148
+	add	x27, x21, :lo12:.LANCHOR151
 	ldr	x1, [x20, #:lo12:.LANCHOR20]
 	mov	w3, 16
 	mov	w2, 4
@@ -14252,9 +14317,9 @@ flash_info_flush:
 	ldr	w1, [x6, 8]
 	bl	js_hash
 	str	w0, [x6, 12]
-.L2322:
-	add	x28, x21, :lo12:.LANCHOR148
-	ldrb	w4, [x21, #:lo12:.LANCHOR148]
+.L2329:
+	add	x28, x21, :lo12:.LANCHOR151
+	ldrb	w4, [x21, #:lo12:.LANCHOR151]
 	ldrh	w19, [x22]
 	mov	x0, x24
 	mov	w1, w4
@@ -14267,7 +14332,7 @@ flash_info_flush:
 	sub	w0, w0, #1
 	cmp	w1, w0
 	ldp	w3, w4, [x29, 104]
-	blt	.L2323
+	blt	.L2330
 	ldr	x6, [x20, #:lo12:.LANCHOR20]
 	ldrb	w7, [x28, 1]
 	strh	wzr, [x28, 2]
@@ -14275,32 +14340,32 @@ flash_info_flush:
 	ldrh	w1, [x6, 16]
 	add	w0, w0, 1
 	str	w0, [x6, 4]
-	ldrb	w0, [x21, #:lo12:.LANCHOR148]
+	ldrb	w0, [x21, #:lo12:.LANCHOR151]
 	add	w1, w1, 1
 	strb	w0, [x28, 1]
 	mov	x0, x6
-	strb	w7, [x21, #:lo12:.LANCHOR148]
+	strb	w7, [x21, #:lo12:.LANCHOR151]
 	strh	w1, [x0, 16]!
 	ldr	w1, [x6, 8]
 	bl	js_hash
 	ldrh	w19, [x22]
 	str	w0, [x6, 12]
 	mul	w19, w19, w7
-.L2332:
+.L2339:
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_erase_block
-	b	.L2324
-.L2327:
+	b	.L2331
+.L2334:
 	mov	w26, 1
-	b	.L2322
-.L2323:
+	b	.L2329
+.L2330:
 	madd	w19, w19, w4, w3
-	cbz	w1, .L2332
-.L2324:
+	cbz	w1, .L2339
+.L2331:
 	ldr	x2, [x20, #:lo12:.LANCHOR20]
 	mov	w1, w19
-	ldr	x3, [x23, #:lo12:.LANCHOR147]
+	ldr	x3, [x23, #:lo12:.LANCHOR150]
 	mov	w5, 1
 	mov	w4, 4
 	ldr	w0, [x2, 4]
@@ -14314,14 +14379,14 @@ flash_info_flush:
 	ldrh	w1, [x27, 2]
 	add	w1, w1, 1
 	strh	w1, [x27, 2]
-	bne	.L2325
+	bne	.L2332
 	mov	w1, w19
 	adrp	x0, .LC135
 	add	x0, x0, :lo12:.LC135
 	bl	printf
-	b	.L2322
-.L2325:
-	cbz	w26, .L2327
+	b	.L2329
+.L2332:
+	cbz	w26, .L2334
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -14346,14 +14411,14 @@ nand_flash_init:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2334
-	adrp	x2, .LANCHOR179
+	tbz	x0, 12, .L2341
+	adrp	x2, .LANCHOR182
 	adrp	x0, .LC73
-	add	x2, x2, :lo12:.LANCHOR179
-	mov	w1, 2083
+	add	x2, x2, :lo12:.LANCHOR182
+	mov	w1, 2101
 	add	x0, x0, :lo12:.LC73
 	bl	printf
-.L2334:
+.L2341:
 	adrp	x22, .LANCHOR9
 	adrp	x20, .LANCHOR38
 	add	x24, x20, :lo12:.LANCHOR38
@@ -14368,20 +14433,20 @@ nand_flash_init:
 	mov	w27, 2
 	str	x0, [x22, #:lo12:.LANCHOR9]
 	mov	w28, 44
-.L2340:
+.L2347:
 	mov	x1, x24
 	mov	w0, w23
 	bl	flash_read_id
 	strb	w27, [x23, x25]
-	cbnz	x23, .L2335
+	cbnz	x23, .L2342
 	ldrb	w0, [x26]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bls	.L2336
-.L2338:
+	bls	.L2343
+.L2345:
 	mov	w19, -2
-.L2333:
+.L2340:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -14390,55 +14455,55 @@ nand_flash_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2336:
+.L2343:
 	ldrb	w0, [x26, 1]
 	cmp	w0, 255
-	beq	.L2338
-.L2335:
+	beq	.L2345
+.L2342:
 	ldrb	w0, [x24]
 	cmp	w0, 181
-	bne	.L2339
+	bne	.L2346
 	strb	w28, [x24]
-.L2339:
+.L2346:
 	add	x23, x23, 1
 	add	x24, x24, 8
 	cmp	x23, 4
-	bne	.L2340
-	adrp	x0, .LANCHOR180
-	add	x8, x0, :lo12:.LANCHOR180
+	bne	.L2347
+	adrp	x0, .LANCHOR183
+	add	x8, x0, :lo12:.LANCHOR183
 	add	x8, x8, 1
 	mov	x7, x0
 	add	x12, x20, :lo12:.LANCHOR38
 	mov	x10, 0
-.L2343:
+.L2350:
 	ldrb	w2, [x8, -1]
 	mov	w11, w10
 	lsl	x24, x10, 5
 	mov	x1, x12
 	mov	x0, x8
 	bl	flash_mem_cmp8
-	cbnz	w0, .L2341
-	add	x0, x7, :lo12:.LANCHOR180
+	cbnz	w0, .L2348
+	add	x0, x7, :lo12:.LANCHOR183
 	ubfiz	x11, x11, 5, 32
 	add	x24, x0, x24
 	add	x0, x0, x11
-	adrp	x1, .LANCHOR181
-	add	x4, x1, :lo12:.LANCHOR181
+	adrp	x1, .LANCHOR184
+	add	x4, x1, :lo12:.LANCHOR184
 	ldrb	w3, [x0, 22]
 	mov	x0, 0
-.L2342:
+.L2349:
 	lsl	x5, x0, 5
 	mov	w2, w0
 	ldrb	w5, [x5, x4]
 	cmp	w5, w3
-	beq	.L2344
+	beq	.L2351
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L2342
+	bne	.L2349
 	mov	w2, w0
-.L2344:
+.L2351:
 	ubfiz	x0, x2, 5, 32
-	add	x1, x1, :lo12:.LANCHOR181
+	add	x1, x1, :lo12:.LANCHOR184
 	add	x1, x1, x0
 	mov	w2, 32
 	adrp	x0, .LANCHOR13
@@ -14452,86 +14517,86 @@ nand_flash_init:
 	bl	ftl_memcpy
 	ldrb	w0, [x24, #:lo12:.LANCHOR22]
 	cmp	w0, 8
-	bhi	.L2345
+	bhi	.L2352
 	ldrb	w1, [x23, 20]
 	cmp	w1, 60
-	bls	.L2346
+	bls	.L2353
 	mov	w1, 60
 	strb	w1, [x23, 20]
-.L2346:
+.L2353:
 	cmp	w0, 8
-	bne	.L2345
+	bne	.L2352
 	ldrb	w0, [x20, #:lo12:.LANCHOR38]
 	cmp	w0, 44
-	bne	.L2345
+	bne	.L2352
 	add	x0, x19, :lo12:.LANCHOR32
 	ldrb	w1, [x0, 28]
 	cmp	w1, 3
-	bne	.L2345
+	bne	.L2352
 	strb	wzr, [x0, 28]
-.L2345:
+.L2352:
 	ldr	w0, [x21, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2347
-	adrp	x2, .LANCHOR179
+	tbz	x0, 12, .L2354
+	adrp	x2, .LANCHOR182
 	adrp	x0, .LC73
-	add	x2, x2, :lo12:.LANCHOR179
-	mov	w1, 2104
+	add	x2, x2, :lo12:.LANCHOR182
+	mov	w1, 2122
 	add	x0, x0, :lo12:.LC73
 	bl	printf
-.L2347:
+.L2354:
 	mov	w0, 16384
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR150
+	adrp	x1, .LANCHOR153
 	adrp	x25, .LANCHOR20
 	add	x20, x19, :lo12:.LANCHOR32
 	adrp	x23, .LANCHOR39
-	str	x0, [x1, #:lo12:.LANCHOR150]
+	str	x0, [x1, #:lo12:.LANCHOR153]
 	mov	w0, 16384
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR140
-	str	x0, [x1, #:lo12:.LANCHOR140]
+	adrp	x1, .LANCHOR143
+	str	x0, [x1, #:lo12:.LANCHOR143]
 	mov	w0, 2048
 	bl	ftl_malloc
 	str	x0, [x25, #:lo12:.LANCHOR20]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR149
-	str	x0, [x1, #:lo12:.LANCHOR149]
+	adrp	x1, .LANCHOR152
+	str	x0, [x1, #:lo12:.LANCHOR152]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR142
-	str	x0, [x1, #:lo12:.LANCHOR142]
+	adrp	x1, .LANCHOR145
+	str	x0, [x1, #:lo12:.LANCHOR145]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR147
-	str	x0, [x1, #:lo12:.LANCHOR147]
-	adrp	x0, .LANCHOR154
-	strb	wzr, [x0, #:lo12:.LANCHOR154]
+	adrp	x1, .LANCHOR150
+	str	x0, [x1, #:lo12:.LANCHOR150]
+	adrp	x0, .LANCHOR157
+	strb	wzr, [x0, #:lo12:.LANCHOR157]
 	bl	flash_die_info_init
 	ldrb	w0, [x20, 18]
 	bl	flash_lsb_page_tbl_build
 	ldrb	w0, [x20, 20]
-	adrp	x20, .LANCHOR145
+	adrp	x20, .LANCHOR148
 	bl	nandc_bch_sel
-	str	xzr, [x20, #:lo12:.LANCHOR145]
+	str	xzr, [x20, #:lo12:.LANCHOR148]
 	ldr	x1, [x22, #:lo12:.LANCHOR9]
 	mov	x22, x25
 	ldrh	w0, [x1, 16]
 	ubfx	x2, x0, 8, 3
 	strb	w2, [x23, #:lo12:.LANCHOR39]
-	adrp	x2, .LANCHOR182
+	adrp	x2, .LANCHOR185
 	ubfx	x3, x0, 3, 1
-	strb	w3, [x2, #:lo12:.LANCHOR182]
+	strb	w3, [x2, #:lo12:.LANCHOR185]
 	adrp	x2, .LANCHOR36
 	ubfx	x3, x0, 4, 1
 	strb	w3, [x2, #:lo12:.LANCHOR36]
 	adrp	x2, .LANCHOR69
 	ubfx	x3, x0, 12, 1
 	strb	w3, [x2, #:lo12:.LANCHOR69]
-	adrp	x2, .LANCHOR98
+	adrp	x2, .LANCHOR102
 	ubfx	x3, x0, 13, 1
 	ubfx	x0, x0, 14, 1
-	strb	w3, [x2, #:lo12:.LANCHOR98]
+	strb	w3, [x2, #:lo12:.LANCHOR102]
 	adrp	x2, .LANCHOR25
 	strb	w0, [x2, #:lo12:.LANCHOR25]
 	mov	w2, 60
@@ -14542,174 +14607,174 @@ nand_flash_init:
 	strb	w2, [x1, #:lo12:.LANCHOR10]
 	ldrb	w2, [x24, #:lo12:.LANCHOR22]
 	cmp	w2, 9
-	bne	.L2348
+	bne	.L2355
 	mov	w2, 70
 	strb	w2, [x1, #:lo12:.LANCHOR10]
-.L2348:
+.L2355:
 	add	x19, x19, :lo12:.LANCHOR32
-	adrp	x1, .LANCHOR155
+	adrp	x1, .LANCHOR158
 	adrp	x25, .LANCHOR17
-	strb	w0, [x1, #:lo12:.LANCHOR155]
+	strb	w0, [x1, #:lo12:.LANCHOR158]
 	ldrh	w1, [x19, 16]
 	ldrb	w0, [x19, 19]
 	strb	w0, [x25, #:lo12:.LANCHOR17]
-	tbz	x1, 6, .L2350
+	tbz	x1, 6, .L2357
 	sub	w1, w0, #17
 	and	w1, w1, 255
 	cmp	w1, 2
-	bhi	.L2351
+	bhi	.L2358
 	adrp	x1, micron_read_retrial
 	add	x1, x1, :lo12:micron_read_retrial
-	str	x1, [x20, #:lo12:.LANCHOR145]
+	str	x1, [x20, #:lo12:.LANCHOR148]
 	cmp	w0, 19
-	adrp	x0, .LANCHOR143
-	beq	.L2352
+	adrp	x0, .LANCHOR146
+	beq	.L2359
 	mov	w1, 7
-.L2395:
-	strb	w1, [x0, #:lo12:.LANCHOR143]
-	b	.L2350
-.L2341:
+.L2402:
+	strb	w1, [x0, #:lo12:.LANCHOR146]
+	b	.L2357
+.L2348:
 	add	x10, x10, 1
 	add	x8, x8, 32
 	cmp	x10, 30
-	bne	.L2343
-	b	.L2338
-.L2352:
+	bne	.L2350
+	b	.L2345
+.L2359:
 	mov	w1, 15
-	b	.L2395
-.L2351:
+	b	.L2402
+.L2358:
 	sub	w1, w0, #65
 	cmp	w0, 33
 	and	w1, w1, 255
 	ccmp	w1, 1, 0, ne
-	bhi	.L2354
+	bhi	.L2361
 	adrp	x0, toshiba_read_retrial
 	add	x0, x0, :lo12:toshiba_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR145]
+	str	x0, [x20, #:lo12:.LANCHOR148]
 	adrp	x0, .LANCHOR19
 	mov	w1, 4
 	strb	w1, [x0, #:lo12:.LANCHOR19]
-.L2397:
+.L2404:
 	mov	w1, 7
-	adrp	x0, .LANCHOR143
-	b	.L2395
-.L2354:
+	adrp	x0, .LANCHOR146
+	b	.L2402
+.L2361:
 	sub	w2, w0, #34
 	sub	w1, w0, #67
 	and	w2, w2, 255
 	and	w1, w1, 255
 	cmp	w2, 1
 	ccmp	w1, 1, 0, hi
-	bhi	.L2355
+	bhi	.L2362
 	adrp	x2, toshiba_read_retrial
 	add	x2, x2, :lo12:toshiba_read_retrial
-	str	x2, [x20, #:lo12:.LANCHOR145]
+	str	x2, [x20, #:lo12:.LANCHOR148]
 	cmp	w0, 35
 	mov	w2, 68
 	ccmp	w0, w2, 4, ne
-	adrp	x0, .LANCHOR143
-	beq	.L2356
+	adrp	x0, .LANCHOR146
+	beq	.L2363
 	mov	w2, 7
-.L2394:
-	strb	w2, [x0, #:lo12:.LANCHOR143]
+.L2401:
+	strb	w2, [x0, #:lo12:.LANCHOR146]
 	cmp	w1, 1
 	adrp	x0, .LANCHOR19
-	bhi	.L2358
+	bhi	.L2365
 	mov	w1, 4
-.L2396:
+.L2403:
 	strb	w1, [x0, #:lo12:.LANCHOR19]
-.L2350:
+.L2357:
 	ldr	w0, [x21, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2359
-	adrp	x2, .LANCHOR179
+	tbz	x0, 12, .L2366
+	adrp	x2, .LANCHOR182
 	adrp	x0, .LC73
-	add	x2, x2, :lo12:.LANCHOR179
-	mov	w1, 2152
+	add	x2, x2, :lo12:.LANCHOR182
+	mov	w1, 2170
 	add	x0, x0, :lo12:.LC73
 	bl	printf
-.L2359:
+.L2366:
 	adrp	x24, .LANCHOR14
 	ldrb	w0, [x23, #:lo12:.LANCHOR39]
 	strb	wzr, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 0, .L2360
+	tbz	x0, 0, .L2367
 	mov	w0, 4
 	bl	nandc_set_if_mode
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
-.L2398:
+.L2405:
 	bl	nandc_set_if_mode
 	bl	flash_info_blk_init
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L2362
+	bne	.L2369
 	ldr	w0, [x21, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2333
-	adrp	x2, .LANCHOR179
-	mov	w1, 2172
-	add	x2, x2, :lo12:.LANCHOR179
+	tbz	x0, 12, .L2340
+	adrp	x2, .LANCHOR182
+	mov	w1, 2190
+	add	x2, x2, :lo12:.LANCHOR182
 	adrp	x0, .LC73
 	add	x0, x0, :lo12:.LC73
 	bl	printf
-	b	.L2333
-.L2356:
+	b	.L2340
+.L2363:
 	mov	w2, 17
-	b	.L2394
-.L2358:
+	b	.L2401
+.L2365:
 	mov	w1, 5
-	b	.L2396
-.L2355:
+	b	.L2403
+.L2362:
 	sub	w0, w0, #36
 	and	w0, w0, 255
 	cmp	w0, 1
-	bhi	.L2350
+	bhi	.L2357
 	adrp	x0, toshiba_3d_read_retrial
 	add	x0, x0, :lo12:toshiba_3d_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR145]
-	b	.L2397
-.L2360:
+	str	x0, [x20, #:lo12:.LANCHOR148]
+	b	.L2404
+.L2367:
 	mov	w0, 4
-	b	.L2398
-.L2362:
+	b	.L2405
+.L2369:
 	ldrb	w0, [x25, #:lo12:.LANCHOR17]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 6
-	bhi	.L2363
+	bhi	.L2370
 	adrp	x0, hynix_read_retrial
 	add	x0, x0, :lo12:hynix_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR145]
-.L2363:
+	str	x0, [x20, #:lo12:.LANCHOR148]
+.L2370:
 	ldrb	w0, [x23, #:lo12:.LANCHOR39]
-	tbz	x0, 2, .L2365
+	tbz	x0, 2, .L2372
 	ldr	x0, [x22, #:lo12:.LANCHOR20]
 	ldrb	w0, [x0, 19]
-	cbz	w0, .L2365
-	adrp	x0, .LANCHOR148
-	ldrb	w1, [x0, #:lo12:.LANCHOR148]
+	cbz	w0, .L2372
+	adrp	x0, .LANCHOR151
+	ldrb	w1, [x0, #:lo12:.LANCHOR151]
 	adrp	x0, .LANCHOR26
 	ldrh	w0, [x0, #:lo12:.LANCHOR26]
 	mul	w1, w1, w0
 	mov	w0, 0
 	bl	flash_ddr_para_scan
 	ldrb	w0, [x24, #:lo12:.LANCHOR14]
-	cbnz	w0, .L2365
+	cbnz	w0, .L2372
 	ldr	x0, [x22, #:lo12:.LANCHOR20]
 	strb	wzr, [x0, 19]
 	bl	flash_info_flush
-.L2365:
+.L2372:
 	ldr	w0, [x21, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2367
-	adrp	x2, .LANCHOR179
+	tbz	x0, 12, .L2374
+	adrp	x2, .LANCHOR182
 	adrp	x0, .LC73
-	add	x2, x2, :lo12:.LANCHOR179
-	mov	w1, 2225
+	add	x2, x2, :lo12:.LANCHOR182
+	mov	w1, 2243
 	add	x0, x0, :lo12:.LC73
 	bl	printf
-.L2367:
+.L2374:
 	bl	nand_flash_print_info
 	mov	w19, 0
-	b	.L2333
+	b	.L2340
 	.size	nand_flash_init, .-nand_flash_init
 	.section	.text.ftl_sysblk_dump,"ax",@progbits
 	.align	2
@@ -14730,27 +14795,27 @@ ftl_sysblk_dump:
 	stp	x21, x22, [sp, 80]
 	bl	buf_alloc
 	ldr	x24, [x0, 8]
-	adrp	x27, .LANCHOR99
-	adrp	x28, .LANCHOR114
+	adrp	x27, .LANCHOR103
+	adrp	x28, .LANCHOR117
 	mov	x25, x0
 	add	x26, x26, :lo12:.LANCHOR80
-	add	x27, x27, :lo12:.LANCHOR99
-	add	x28, x28, :lo12:.LANCHOR114
+	add	x27, x27, :lo12:.LANCHOR103
+	add	x28, x28, :lo12:.LANCHOR117
 	mov	w19, 0
-.L2400:
+.L2407:
 	ldrh	w0, [x26]
 	cmp	w0, w19
-	bhi	.L2402
+	bhi	.L2409
 	mov	x0, x25
 	bl	buf_free
-	cbz	w20, .L2403
-	adrp	x1, .LANCHOR183
+	cbz	w20, .L2410
+	adrp	x1, .LANCHOR186
 	adrp	x0, .LC0
-	mov	w2, 1214
-	add	x1, x1, :lo12:.LANCHOR183
+	mov	w2, 1232
+	add	x1, x1, :lo12:.LANCHOR186
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2403:
+.L2410:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
@@ -14760,7 +14825,7 @@ ftl_sysblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 144
 	ret
-.L2402:
+.L2409:
 	ldrh	w21, [x27]
 	ldrb	w3, [x28]
 	ldr	x1, [x25, 8]
@@ -14801,7 +14866,7 @@ ftl_sysblk_dump:
 	cmp	w22, 512
 	ccmn	w22, #1, 4, ne
 	csinc	w20, w20, wzr, ne
-	b	.L2400
+	b	.L2407
 	.size	ftl_sysblk_dump, .-ftl_sysblk_dump
 	.section	.text.dump_ftl_info,"ax",@progbits
 	.align	2
@@ -14816,20 +14881,20 @@ dump_ftl_info:
 	stp	x19, x20, [sp, 16]
 	add	x0, x0, :lo12:.LC137
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR101
+	adrp	x22, .LANCHOR97
 	adrp	x19, .LANCHOR5
 	adrp	x20, .LANCHOR80
 	bl	printf
 	adrp	x21, .LANCHOR2
-	adrp	x0, .LANCHOR164
-	add	x1, x0, :lo12:.LANCHOR164
+	adrp	x0, .LANCHOR167
+	add	x1, x0, :lo12:.LANCHOR167
 	ldrh	w3, [x1, 2]
 	ldrb	w2, [x1, 1]
-	ldrb	w1, [x0, #:lo12:.LANCHOR164]
+	ldrb	w1, [x0, #:lo12:.LANCHOR167]
 	adrp	x0, .LC138
 	add	x0, x0, :lo12:.LC138
 	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR101]
+	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	ldrh	w2, [x0, 140]
 	ldrh	w1, [x0, 130]
 	adrp	x0, .LC139
@@ -14867,8 +14932,8 @@ dump_ftl_info:
 	mov	w2, 4
 	ldrh	w3, [x20, #:lo12:.LANCHOR80]
 	mul	w3, w3, w0
-	adrp	x0, .LANCHOR106
-	ldr	x1, [x0, #:lo12:.LANCHOR106]
+	adrp	x0, .LANCHOR109
+	ldr	x1, [x0, #:lo12:.LANCHOR109]
 	adrp	x0, .LC143
 	lsl	w3, w3, 1
 	add	x0, x0, :lo12:.LC143
@@ -14880,7 +14945,7 @@ dump_ftl_info:
 	adrp	x0, .LC144
 	add	x0, x0, :lo12:.LC144
 	bl	rknand_print_hex
-	ldr	x1, [x22, #:lo12:.LANCHOR101]
+	ldr	x1, [x22, #:lo12:.LANCHOR97]
 	mov	w2, 4
 	adrp	x0, .LC136
 	add	x0, x0, :lo12:.LC136
@@ -14896,9 +14961,9 @@ dump_ftl_info:
 	bl	rknand_print_hex
 	mov	w3, 256
 	mov	w2, 2
-	adrp	x1, .LANCHOR105
+	adrp	x1, .LANCHOR108
 	adrp	x0, .LC146
-	add	x1, x1, :lo12:.LANCHOR105
+	add	x1, x1, :lo12:.LANCHOR108
 	add	x0, x0, :lo12:.LC146
 	bl	rknand_print_hex
 	ldrb	w0, [x19, #:lo12:.LANCHOR72]
@@ -14907,10 +14972,10 @@ dump_ftl_info:
 	ldp	x21, x22, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	mul	w3, w3, w0
-	adrp	x0, .LANCHOR107
+	adrp	x0, .LANCHOR110
 	ldp	x29, x30, [sp], 48
 	lsl	w3, w3, 1
-	ldr	x1, [x0, #:lo12:.LANCHOR107]
+	ldr	x1, [x0, #:lo12:.LANCHOR110]
 	adrp	x0, .LC147
 	add	x0, x0, :lo12:.LC147
 	b	rknand_print_hex
@@ -14939,7 +15004,7 @@ pm_ppa_update_check:
 	ubfx	x3, x3, 5, 3
 	cmp	w3, 1
 	ccmp	w3, 7, 4, ne
-	bne	.L2414
+	bne	.L2421
 	stp	x29, x30, [sp, -16]!
 	mov	w3, w2
 	mov	w2, w1
@@ -14952,7 +15017,7 @@ pm_ppa_update_check:
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
-.L2414:
+.L2421:
 	mov	w0, 0
 	ret
 	.size	pm_ppa_update_check, .-pm_ppa_update_check
@@ -14968,87 +15033,87 @@ load_l2p_region:
 	and	w19, w0, 65535
 	stp	x23, x24, [sp, 48]
 	cmp	w20, 31
-	bls	.L2420
-	adrp	x1, .LANCHOR184
+	bls	.L2427
+	adrp	x1, .LANCHOR187
 	adrp	x0, .LC0
 	mov	w2, 31
-	add	x1, x1, :lo12:.LANCHOR184
+	add	x1, x1, :lo12:.LANCHOR187
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2420:
-	adrp	x23, .LANCHOR101
-	ldr	x0, [x23, #:lo12:.LANCHOR101]
+.L2427:
+	adrp	x23, .LANCHOR97
+	ldr	x0, [x23, #:lo12:.LANCHOR97]
 	ldrh	w2, [x0, 698]
 	cmp	w2, w19
-	bcs	.L2421
+	bcs	.L2428
 	mov	w1, w19
 	adrp	x0, .LC149
 	add	x0, x0, :lo12:.LC149
 	bl	printf
-	adrp	x0, .LANCHOR185
+	adrp	x0, .LANCHOR188
 	mov	w1, 255
-	ldrh	w2, [x0, #:lo12:.LANCHOR185]
+	ldrh	w2, [x0, #:lo12:.LANCHOR188]
 	mov	x0, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	ldr	x0, [x23, #:lo12:.LANCHOR101]
+	ldr	x0, [x23, #:lo12:.LANCHOR97]
 	ldrh	w0, [x0, 698]
 	cmp	w0, w19
-	bcs	.L2423
+	bcs	.L2430
 	mov	w2, 35
-.L2428:
-	adrp	x1, .LANCHOR184
+.L2435:
+	adrp	x1, .LANCHOR187
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR184
+	add	x1, x1, :lo12:.LANCHOR187
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L2423
-.L2421:
+	b	.L2430
+.L2428:
 	add	x0, x0, x19, sxtw 2
 	sbfiz	x20, x20, 4, 32
 	ldr	w21, [x0, 704]
-	adrp	x0, .LANCHOR120
-	add	x0, x0, :lo12:.LANCHOR120
+	adrp	x0, .LANCHOR123
+	add	x0, x0, :lo12:.LANCHOR123
 	add	x22, x0, x20
 	strh	w19, [x0, x20]
 	strh	wzr, [x22, 2]
-	cbnz	w21, .L2424
+	cbnz	w21, .L2431
 	mov	w2, 0
 	mov	w1, w19
 	adrp	x0, .LC150
 	add	x0, x0, :lo12:.LC150
 	bl	printf
-	adrp	x0, .LANCHOR185
+	adrp	x0, .LANCHOR188
 	mov	w1, 255
-	ldrh	w2, [x0, #:lo12:.LANCHOR185]
+	ldrh	w2, [x0, #:lo12:.LANCHOR188]
 	ldr	x0, [x22, 8]
 	bl	ftl_memset
-.L2423:
+.L2430:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2424:
-	adrp	x20, .LANCHOR176
-	adrp	x24, .LANCHOR114
+.L2431:
+	adrp	x20, .LANCHOR179
+	adrp	x24, .LANCHOR117
 	ldr	x1, [x22, 8]
 	mov	w0, w21
-	ldr	x2, [x20, #:lo12:.LANCHOR176]
-	ldrb	w3, [x24, #:lo12:.LANCHOR114]
+	ldr	x2, [x20, #:lo12:.LANCHOR179]
+	ldrb	w3, [x24, #:lo12:.LANCHOR117]
 	bl	ftl_read_ppa_page
-	ldr	x1, [x20, #:lo12:.LANCHOR176]
+	ldr	x1, [x20, #:lo12:.LANCHOR179]
 	ldr	w2, [x1]
 	cmp	w2, w19
-	beq	.L2425
+	beq	.L2432
 	mov	w4, w21
 	mov	w3, w0
 	mov	w1, w19
 	adrp	x0, .LC151
 	add	x0, x0, :lo12:.LC151
 	bl	printf
-	ldr	x1, [x23, #:lo12:.LANCHOR101]
+	ldr	x1, [x23, #:lo12:.LANCHOR97]
 	mov	w2, 4
 	adrp	x0, .LC152
 	add	x0, x0, :lo12:.LC152
@@ -15057,12 +15122,12 @@ load_l2p_region:
 	bl	rknand_print_hex
 	ldr	x1, [x22, 8]
 	mov	w2, 4
-	ldrb	w3, [x24, #:lo12:.LANCHOR114]
+	ldrb	w3, [x24, #:lo12:.LANCHOR117]
 	adrp	x0, .LC153
 	add	x0, x0, :lo12:.LC153
 	lsl	w3, w3, 7
 	bl	rknand_print_hex
-	ldr	x1, [x20, #:lo12:.LANCHOR176]
+	ldr	x1, [x20, #:lo12:.LANCHOR179]
 	mov	w2, 4
 	mov	w3, 16
 	adrp	x0, .LC154
@@ -15082,13 +15147,13 @@ load_l2p_region:
 	mov	x1, 0
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
-.L2425:
-	ldr	x0, [x20, #:lo12:.LANCHOR176]
+.L2432:
+	ldr	x0, [x20, #:lo12:.LANCHOR179]
 	ldr	w0, [x0]
 	cmp	w19, w0
-	beq	.L2423
+	beq	.L2430
 	mov	w2, 57
-	b	.L2428
+	b	.L2435
 	.size	load_l2p_region, .-load_l2p_region
 	.section	.text.pm_gc,"ax",@progbits
 	.align	2
@@ -15098,73 +15163,73 @@ pm_gc:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR101
-	adrp	x19, .LANCHOR131
+	adrp	x20, .LANCHOR97
+	adrp	x19, .LANCHOR134
 	stp	x21, x22, [sp, 32]
-	ldr	x0, [x20, #:lo12:.LANCHOR101]
+	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	stp	x23, x24, [sp, 48]
 	ldrh	w1, [x0, 688]
-	ldrh	w0, [x19, #:lo12:.LANCHOR131]
+	ldrh	w0, [x19, #:lo12:.LANCHOR134]
 	str	x25, [sp, 64]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L2431
+	blt	.L2438
 	bl	pm_free_sblk
-	ldr	x2, [x20, #:lo12:.LANCHOR101]
-	ldrh	w1, [x19, #:lo12:.LANCHOR131]
+	ldr	x2, [x20, #:lo12:.LANCHOR97]
+	ldrh	w1, [x19, #:lo12:.LANCHOR134]
 	sub	w1, w1, #1
 	ldrh	w3, [x2, 688]
 	cmp	w3, w1
-	blt	.L2431
+	blt	.L2438
 	add	x0, x2, x0, uxth 1
 	ldrh	w21, [x0, 416]
 	mov	w0, 65535
 	cmp	w21, w0
-	bne	.L2433
-	adrp	x1, .LANCHOR186
-	add	x1, x1, :lo12:.LANCHOR186
+	bne	.L2440
+	adrp	x1, .LANCHOR189
+	add	x1, x1, :lo12:.LANCHOR189
 	mov	w2, 129
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	bl	pm_free_sblk
-	ldr	x1, [x20, #:lo12:.LANCHOR101]
+	ldr	x1, [x20, #:lo12:.LANCHOR97]
 	add	x0, x1, x0, uxth 1
 	ldrh	w21, [x0, 416]
-.L2433:
+.L2440:
 	bl	pm_select_ram_region
 	and	x24, x0, 65535
-	adrp	x1, .LANCHOR120
+	adrp	x1, .LANCHOR123
 	lsl	x0, x24, 4
-	add	x2, x1, :lo12:.LANCHOR120
+	add	x2, x1, :lo12:.LANCHOR123
 	mov	x22, x24
 	add	x19, x2, x0
 	mov	x23, x1
 	ldrh	w0, [x2, x0]
 	mov	w2, 65535
 	cmp	w0, w2
-	beq	.L2434
+	beq	.L2441
 	ldr	x1, [x19, 8]
-	cbz	x1, .L2434
+	cbz	x1, .L2441
 	ldrsh	w2, [x19, 2]
-	tbz	w2, #31, .L2434
+	tbz	w2, #31, .L2441
 	bl	pm_write_page
 	ldrh	w0, [x19, 2]
 	and	w0, w0, 32767
 	strh	w0, [x19, 2]
-.L2434:
-	add	x1, x23, :lo12:.LANCHOR120
+.L2441:
+	add	x1, x23, :lo12:.LANCHOR123
 	adrp	x25, .LANCHOR96
 	add	x24, x1, x24, lsl 4
 	add	x25, x25, :lo12:.LANCHOR96
 	mov	w19, 0
-.L2435:
-	ldr	x1, [x20, #:lo12:.LANCHOR101]
+.L2442:
+	ldr	x1, [x20, #:lo12:.LANCHOR97]
 	ldrh	w0, [x1, 698]
 	cmp	w0, w19
-	bhi	.L2437
+	bhi	.L2444
 	bl	pm_free_sblk
-.L2431:
+.L2438:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -15172,7 +15237,7 @@ pm_gc:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2437:
+.L2444:
 	add	x1, x1, x19, sxtw 2
 	ldrh	w3, [x25]
 	mov	w0, 21
@@ -15187,7 +15252,7 @@ pm_gc:
 	ldrb	w1, [x1, #:lo12:.LANCHOR95]
 	udiv	w0, w0, w1
 	cmp	w21, w0, uxth
-	bne	.L2436
+	bne	.L2443
 	mov	w1, w22
 	mov	w0, w19
 	bl	load_l2p_region
@@ -15196,10 +15261,10 @@ pm_gc:
 	bl	pm_write_page
 	mov	w0, -1
 	strh	w0, [x24]
-.L2436:
+.L2443:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L2435
+	b	.L2442
 	.size	pm_gc, .-pm_gc
 	.section	.text.pm_flush_id,"ax",@progbits
 	.align	2
@@ -15208,8 +15273,8 @@ pm_gc:
 pm_flush_id:
 	stp	x29, x30, [sp, -32]!
 	ubfiz	x0, x0, 4, 16
-	adrp	x2, .LANCHOR120
-	add	x2, x2, :lo12:.LANCHOR120
+	adrp	x2, .LANCHOR123
+	add	x2, x2, :lo12:.LANCHOR123
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	add	x19, x2, x0
@@ -15219,12 +15284,12 @@ pm_flush_id:
 	ldrh	w0, [x19, 2]
 	and	w0, w0, 32767
 	strh	w0, [x19, 2]
-	adrp	x19, .LANCHOR118
-	ldr	w0, [x19, #:lo12:.LANCHOR118]
-	cbz	w0, .L2443
+	adrp	x19, .LANCHOR121
+	ldr	w0, [x19, #:lo12:.LANCHOR121]
+	cbz	w0, .L2450
 	bl	pm_gc
-	str	wzr, [x19, #:lo12:.LANCHOR118]
-.L2443:
+	str	wzr, [x19, #:lo12:.LANCHOR121]
+.L2450:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -15238,21 +15303,21 @@ pm_flush:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR120
-	add	x19, x19, :lo12:.LANCHOR120
+	adrp	x19, .LANCHOR123
+	add	x19, x19, :lo12:.LANCHOR123
 	mov	w20, 0
 	add	x19, x19, 2
-.L2450:
+.L2457:
 	ldrsh	w0, [x19]
-	tbz	w0, #31, .L2449
+	tbz	w0, #31, .L2456
 	mov	w0, w20
 	bl	pm_flush_id
-.L2449:
+.L2456:
 	add	w20, w20, 1
 	add	x19, x19, 16
 	and	w20, w20, 65535
 	cmp	w20, 32
-	bne	.L2450
+	bne	.L2457
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -15301,74 +15366,74 @@ pm_init:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	mov	w24, w0
-	adrp	x0, .LANCHOR118
+	adrp	x0, .LANCHOR121
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	adrp	x20, .LANCHOR120
-	str	wzr, [x0, #:lo12:.LANCHOR118]
-	adrp	x0, .LANCHOR177
+	adrp	x20, .LANCHOR123
+	str	wzr, [x0, #:lo12:.LANCHOR121]
+	adrp	x0, .LANCHOR180
 	stp	x25, x26, [sp, 64]
-	add	x19, x20, :lo12:.LANCHOR120
-	strb	w1, [x0, #:lo12:.LANCHOR177]
+	add	x19, x20, :lo12:.LANCHOR123
+	strb	w1, [x0, #:lo12:.LANCHOR180]
 	mov	w0, 64
 	stp	x27, x28, [sp, 80]
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR176
-	adrp	x22, .LANCHOR114
+	adrp	x1, .LANCHOR179
+	adrp	x22, .LANCHOR117
 	add	x23, x19, 512
 	mov	x21, x1
-	add	x22, x22, :lo12:.LANCHOR114
-	str	x0, [x1, #:lo12:.LANCHOR176]
+	add	x22, x22, :lo12:.LANCHOR117
+	str	x0, [x1, #:lo12:.LANCHOR179]
 	mov	w25, -1
-.L2460:
+.L2467:
 	strh	w25, [x19]
 	strh	wzr, [x19, 2]
-	cbz	w24, .L2459
+	cbz	w24, .L2466
 	ldrb	w0, [x22]
 	lsl	w0, w0, 9
 	bl	ftl_malloc
 	str	x0, [x19, 8]
-.L2459:
+.L2466:
 	add	x19, x19, 16
 	cmp	x19, x23
-	bne	.L2460
-	add	x0, x20, :lo12:.LANCHOR120
-	adrp	x19, .LANCHOR101
-	ldr	x24, [x21, #:lo12:.LANCHOR176]
+	bne	.L2467
+	add	x0, x20, :lo12:.LANCHOR123
+	adrp	x19, .LANCHOR97
+	ldr	x24, [x21, #:lo12:.LANCHOR179]
 	mov	w4, 4
 	ldr	x25, [x0, 8]
 	mov	x3, x24
-	ldr	x0, [x19, #:lo12:.LANCHOR101]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	x2, x25
 	ldrh	w1, [x0, 692]
 	ldrb	w0, [x0, 694]
 	bl	flash_get_last_written_page
 	sxth	w26, w0
-	ldr	x0, [x19, #:lo12:.LANCHOR101]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	w23, w26
 	ldrh	w2, [x0, 696]
 	cmp	w2, w26
-	bgt	.L2461
+	bgt	.L2468
 	ldrh	w1, [x0, 692]
 	mov	w3, w26
 	adrp	x0, .LC155
 	add	x0, x0, :lo12:.LC155
-	adrp	x27, .LANCHOR99
-	adrp	x28, .LANCHOR114
-	add	x27, x27, :lo12:.LANCHOR99
-	add	x28, x28, :lo12:.LANCHOR114
+	adrp	x27, .LANCHOR103
+	adrp	x28, .LANCHOR117
+	add	x27, x27, :lo12:.LANCHOR103
+	add	x28, x28, :lo12:.LANCHOR117
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR101]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	ldrsh	w21, [x0, 696]
-.L2462:
+.L2469:
 	cmp	w21, w26
-	ble	.L2464
-	adrp	x0, .LANCHOR167
+	ble	.L2471
+	adrp	x0, .LANCHOR170
 	mov	w1, 1
-	add	x20, x20, :lo12:.LANCHOR120
+	add	x20, x20, :lo12:.LANCHOR123
 	add	w23, w23, 1
-	strb	w1, [x0, #:lo12:.LANCHOR167]
-	ldr	x0, [x19, #:lo12:.LANCHOR101]
+	strb	w1, [x0, #:lo12:.LANCHOR170]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	strh	w23, [x0, 696]
 	bl	pm_free_sblk
 	ldr	x1, [x20, 8]
@@ -15377,7 +15442,7 @@ pm_init:
 	ldr	x1, [x20, 8]
 	mov	w0, -1
 	bl	pm_write_page
-.L2461:
+.L2468:
 	bl	pm_free_sblk
 	bl	pm_gc
 	mov	w0, 0
@@ -15388,8 +15453,8 @@ pm_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2464:
-	ldr	x0, [x19, #:lo12:.LANCHOR101]
+.L2471:
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	x3, x24
 	ldrh	w1, [x27]
 	mov	x2, x25
@@ -15400,7 +15465,7 @@ pm_init:
 	mov	w1, w22
 	bl	flash_read_page_en
 	mov	w4, w0
-	ldr	x0, [x19, #:lo12:.LANCHOR101]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	str	w4, [x29, 108]
 	mov	w2, w22
 	ldr	w1, [x0, 48]
@@ -15414,18 +15479,18 @@ pm_init:
 	ldr	w4, [x29, 108]
 	cmp	w4, 512
 	ccmn	w4, #1, 4, ne
-	beq	.L2463
-	ldr	x1, [x19, #:lo12:.LANCHOR101]
+	beq	.L2470
+	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	ldr	w0, [x24]
 	ldrh	w2, [x1, 698]
 	cmp	w0, w2
-	bcs	.L2463
+	bcs	.L2470
 	add	x0, x1, x0, uxtw 2
 	str	w22, [x0, 704]
-.L2463:
+.L2470:
 	add	w21, w21, 1
 	sxth	w21, w21
-	b	.L2462
+	b	.L2469
 	.size	pm_init, .-pm_init
 	.section	.text.pm_log2phys,"ax",@progbits
 	.align	2
@@ -15436,10 +15501,10 @@ pm_log2phys:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	mov	x22, x1
-	adrp	x1, .LANCHOR114
+	adrp	x1, .LANCHOR117
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
-	ldrb	w1, [x1, #:lo12:.LANCHOR114]
+	ldrb	w1, [x1, #:lo12:.LANCHOR117]
 	stp	x23, x24, [sp, 48]
 	mov	w23, w2
 	lsl	w21, w1, 7
@@ -15450,52 +15515,52 @@ pm_log2phys:
 	cmp	w0, w2
 	and	w25, w21, 65535
 	msub	w20, w25, w20, w0
-	bcc	.L2474
+	bcc	.L2481
 	mov	w1, w0
 	adrp	x0, .LC157
 	add	x0, x0, :lo12:.LC157
 	bl	printf
 	mov	w0, -1
-.L2473:
+.L2480:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2474:
-	adrp	x24, .LANCHOR120
-	add	x0, x24, :lo12:.LANCHOR120
+.L2481:
+	adrp	x24, .LANCHOR123
+	add	x0, x24, :lo12:.LANCHOR123
 	and	x20, x20, 65535
 	add	x0, x0, 8
 	mov	x19, 0
-.L2480:
+.L2487:
 	ldr	x1, [x0]
-	cbz	x1, .L2476
+	cbz	x1, .L2483
 	ldrh	w1, [x0, -8]
 	cmp	w1, w25
-	bne	.L2476
-.L2477:
-	cbnz	w23, .L2478
-	add	x0, x24, :lo12:.LANCHOR120
+	bne	.L2483
+.L2484:
+	cbnz	w23, .L2485
+	add	x0, x24, :lo12:.LANCHOR123
 	add	x0, x0, x19, lsl 4
 	ldr	x0, [x0, 8]
 	ldr	w0, [x0, x20, lsl 2]
 	str	w0, [x22]
-.L2479:
-	add	x24, x24, :lo12:.LANCHOR120
+.L2486:
+	add	x24, x24, :lo12:.LANCHOR123
 	add	x19, x24, x19, lsl 4
 	ldrh	w0, [x19, 2]
 	mvn	x1, x0
 	tst	x1, 32767
-	beq	.L2482
+	beq	.L2489
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L2482:
+.L2489:
 	mov	w0, 0
-	b	.L2473
-.L2478:
-	add	x0, x24, :lo12:.LANCHOR120
+	b	.L2480
+.L2485:
+	add	x0, x24, :lo12:.LANCHOR123
 	ldr	w2, [x22]
 	add	x0, x0, x19, lsl 4
 	ldr	x1, [x0, 8]
@@ -15503,35 +15568,35 @@ pm_log2phys:
 	ldrh	w1, [x0, 2]
 	orr	w1, w1, -32768
 	strh	w1, [x0, 2]
-	adrp	x0, .LANCHOR121
-	strb	w21, [x0, #:lo12:.LANCHOR121]
-	b	.L2479
-.L2476:
+	adrp	x0, .LANCHOR124
+	strb	w21, [x0, #:lo12:.LANCHOR124]
+	b	.L2486
+.L2483:
 	add	w19, w19, 1
 	add	x0, x0, 16
 	and	x19, x19, 65535
 	cmp	w19, 32
-	bne	.L2480
+	bne	.L2487
 	bl	pm_select_ram_region
 	and	x19, x0, 65535
 	sbfiz	x1, x19, 4, 32
-	add	x2, x24, :lo12:.LANCHOR120
+	add	x2, x24, :lo12:.LANCHOR123
 	add	x3, x2, x1
 	mov	w26, w0
 	ldrh	w2, [x2, x1]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L2481
+	beq	.L2488
 	ldrsh	w1, [x3, 2]
-	tbz	w1, #31, .L2481
+	tbz	w1, #31, .L2488
 	bl	pm_flush_id
-.L2481:
-	adrp	x0, .LANCHOR187
+.L2488:
+	adrp	x0, .LANCHOR190
 	mov	w1, w26
-	strb	w19, [x0, #:lo12:.LANCHOR187]
+	strb	w19, [x0, #:lo12:.LANCHOR190]
 	mov	w0, w25
 	bl	load_l2p_region
-	b	.L2477
+	b	.L2484
 	.size	pm_log2phys, .-pm_log2phys
 	.section	.text.ftl_read_ahead,"ax",@progbits
 	.align	2
@@ -15546,12 +15611,12 @@ ftl_read_ahead:
 	ldr	w0, [x20, #:lo12:.LANCHOR56]
 	stp	x23, x24, [sp, 48]
 	cmn	w0, #1
-	beq	.L2497
+	beq	.L2504
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x19, x0
 	mov	w0, -1
-	cbz	x19, .L2488
+	cbz	x19, .L2495
 	ldr	w21, [x20, #:lo12:.LANCHOR56]
 	str	w21, [x19, 36]
 	str	w0, [x20, #:lo12:.LANCHOR56]
@@ -15561,40 +15626,40 @@ ftl_read_ahead:
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 76]
 	cmn	w0, #1
-	bne	.L2491
+	bne	.L2498
 	mov	w2, 0
 	add	x1, x29, 76
 	mov	w0, w21
 	bl	pm_log2phys
-.L2491:
+.L2498:
 	ldr	w0, [x29, 76]
 	stp	w0, w0, [x19, 40]
 	cmn	w0, #1
-	bne	.L2492
-	adrp	x0, .LANCHOR114
+	bne	.L2499
+	adrp	x0, .LANCHOR117
 	mov	w1, 0
-	ldrb	w2, [x0, #:lo12:.LANCHOR114]
+	ldrb	w2, [x0, #:lo12:.LANCHOR117]
 	mov	x0, x20
 	lsl	w2, w2, 9
 	bl	ftl_memset
 	ldrb	w0, [x19, 2]
 	orr	w0, w0, 8
 	strb	w0, [x19, 2]
-.L2497:
+.L2504:
 	mov	w0, 0
-.L2488:
+.L2495:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2492:
+.L2499:
 	mov	w1, 1
 	mov	x0, x19
 	bl	sblk_read_page
 	ldr	w23, [x19, 52]
 	cmn	w23, #1
-	bne	.L2493
+	bne	.L2500
 	ldrb	w0, [x19, 2]
 	and	w0, w0, -9
 	strb	w0, [x19, 2]
@@ -15603,10 +15668,10 @@ ftl_read_ahead:
 	ldr	w0, [x1, 552]
 	add	w0, w0, 1
 	str	w0, [x1, 552]
-.L2494:
+.L2501:
 	ldr	w5, [x22, 4]
 	cmp	w21, w5
-	beq	.L2495
+	beq	.L2502
 	ldrb	w1, [x19, 1]
 	adrp	x0, .LC159
 	ldr	w4, [x22]
@@ -15615,23 +15680,23 @@ ftl_read_ahead:
 	add	x0, x0, :lo12:.LC159
 	ldr	w3, [x29, 76]
 	bl	printf
-.L2495:
+.L2502:
 	ldr	w0, [x22, 4]
 	cmp	w21, w0
-	bne	.L2496
+	bne	.L2503
 	cmn	w23, #1
-	bne	.L2497
-.L2496:
+	bne	.L2504
+.L2503:
 	mov	w2, 874
-	adrp	x1, .LANCHOR188
+	adrp	x1, .LANCHOR191
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR188
+	add	x1, x1, :lo12:.LANCHOR191
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L2497
-.L2493:
+	b	.L2504
+.L2500:
 	cmp	w23, 256
-	bne	.L2494
+	bne	.L2501
 	adrp	x0, .LANCHOR96
 	mov	w20, 21
 	mov	w24, 1
@@ -15654,7 +15719,7 @@ ftl_read_ahead:
 	mov	w1, w24
 	mov	w0, w20
 	bl	gc_add_sblk
-	b	.L2494
+	b	.L2501
 	.size	ftl_read_ahead, .-ftl_read_ahead
 	.section	.text.gc_recovery,"ax",@progbits
 	.align	2
@@ -15670,9 +15735,9 @@ gc_recovery:
 	stp	x19, x20, [sp, 48]
 	ldr	x20, [x21, #:lo12:.LANCHOR5]
 	strb	wzr, [x0, #:lo12:.LANCHOR70]
-	adrp	x0, .LANCHOR135
+	adrp	x0, .LANCHOR138
 	stp	x23, x24, [sp, 80]
-	strb	wzr, [x0, #:lo12:.LANCHOR135]
+	strb	wzr, [x0, #:lo12:.LANCHOR138]
 	stp	x25, x26, [sp, 96]
 	stp	x27, x28, [sp, 112]
 	bl	gc_init
@@ -15682,7 +15747,7 @@ gc_recovery:
 	mov	w0, 65535
 	cmp	w1, w0
 	ldr	x0, [x21, #:lo12:.LANCHOR5]
-	beq	.L2502
+	beq	.L2509
 	mov	w1, -1
 	strh	w1, [x0, 130]
 	mov	w0, 1
@@ -15690,41 +15755,41 @@ gc_recovery:
 	mov	x27, x0
 	ldrb	w0, [x20, 89]
 	add	x1, x20, 80
-	adrp	x3, .LANCHOR99
+	adrp	x3, .LANCHOR103
 	adrp	x2, .LANCHOR67
 	sub	w0, w0, #1
 	str	x3, [x29, 128]
 	add	x0, x1, x0, sxtw 1
-	ldrh	w1, [x3, #:lo12:.LANCHOR99]
+	ldrh	w1, [x3, #:lo12:.LANCHOR103]
 	str	x2, [x29, 160]
 	ldrh	w0, [x0, 16]
 	mul	w1, w0, w1
 	ldrb	w0, [x2, #:lo12:.LANCHOR67]
 	str	w1, [x29, 200]
 	cmp	w0, 3
-	bne	.L2503
+	bne	.L2510
 	adrp	x0, .LANCHOR80
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	sub	w0, w0, #1
 	add	w0, w0, w1
 	orr	w0, w0, 50331648
-.L2550:
+.L2557:
 	str	w0, [x27, 40]
-.L2504:
+.L2511:
 	mov	w1, 1
 	mov	x0, x27
 	bl	sblk_read_page
 	ldr	w0, [x27, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2505
+	beq	.L2512
 	ldr	x0, [x27, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L2506
-.L2505:
+	beq	.L2513
+.L2512:
 	mov	x0, x27
 	bl	buf_free
 	ldr	x1, [x27, 24]
@@ -15743,7 +15808,7 @@ gc_recovery:
 	ldr	w1, [x27, 40]
 	ldr	w2, [x27, 52]
 	bl	printf
-.L2554:
+.L2561:
 	adrp	x0, .LANCHOR4
 	ldrh	w1, [x20, 80]
 	mov	w22, 0
@@ -15752,7 +15817,7 @@ gc_recovery:
 	ldr	x0, [x21, #:lo12:.LANCHOR5]
 	ldrh	w1, [x20, 80]
 	strh	w1, [x0, 130]
-.L2507:
+.L2514:
 	ldrh	w1, [x20, 80]
 	mov	w2, w22
 	adrp	x0, .LC163
@@ -15766,18 +15831,18 @@ gc_recovery:
 	mov	w1, 65535
 	ldrh	w0, [x0, 130]
 	cmp	w0, w1
-	beq	.L2536
+	beq	.L2543
 	bl	ftl_free_sblk
-.L2536:
-	adrp	x0, .LANCHOR101
-	ldr	x1, [x0, #:lo12:.LANCHOR101]
+.L2543:
+	adrp	x0, .LANCHOR97
+	ldr	x1, [x0, #:lo12:.LANCHOR97]
 	mov	w0, -1
 	strh	w0, [x1, 126]
 	ldr	x1, [x21, #:lo12:.LANCHOR5]
 	strh	w0, [x1, 130]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2501:
+.L2508:
 	ldp	x19, x20, [sp, 48]
 	ldp	x21, x22, [sp, 64]
 	ldp	x23, x24, [sp, 80]
@@ -15786,34 +15851,34 @@ gc_recovery:
 	ldp	x29, x30, [sp, 32]
 	add	sp, sp, 240
 	ret
-.L2503:
+.L2510:
 	cmp	w0, 2
-	bne	.L2504
+	bne	.L2511
 	adrp	x0, .LANCHOR80
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	add	w0, w1, w0, lsl 1
 	sub	w0, w0, #1
 	orr	w0, w0, 33554432
-	b	.L2550
-.L2506:
+	b	.L2557
+.L2513:
 	adrp	x26, .LANCHOR71
 	adrp	x19, .LANCHOR72
-	adrp	x22, .LANCHOR136
+	adrp	x22, .LANCHOR139
 	ldr	x1, [x27, 8]
 	ldrb	w0, [x19, #:lo12:.LANCHOR72]
 	ldrh	w2, [x26, #:lo12:.LANCHOR71]
 	mul	w2, w2, w0
-	ldr	x0, [x22, #:lo12:.LANCHOR136]
+	ldr	x0, [x22, #:lo12:.LANCHOR139]
 	lsl	w2, w2, 2
 	bl	ftl_memcpy
 	ldrb	w1, [x19, #:lo12:.LANCHOR72]
-	adrp	x19, .LANCHOR137
+	adrp	x19, .LANCHOR140
 	ldrh	w0, [x26, #:lo12:.LANCHOR71]
 	mul	w0, w0, w1
 	ldr	x1, [x27, 8]
 	lsl	w2, w0, 2
 	add	x1, x1, x0, sxtw 2
-	ldr	x0, [x19, #:lo12:.LANCHOR137]
+	ldr	x0, [x19, #:lo12:.LANCHOR140]
 	bl	ftl_memcpy
 	str	x26, [x29, 120]
 	adrp	x0, .LANCHOR80
@@ -15822,28 +15887,28 @@ gc_recovery:
 	ldr	x0, [x29, 160]
 	ldrb	w0, [x0, #:lo12:.LANCHOR67]
 	cmp	w0, 2
-	beq	.L2508
-.L2551:
+	beq	.L2515
+.L2558:
 	str	w0, [x29, 180]
 	adrp	x23, .LC161
 	ldr	x0, [x29, 128]
 	add	x23, x23, :lo12:.LC161
 	mov	w26, 0
 	mov	w22, 0
-	add	x0, x0, :lo12:.LANCHOR99
+	add	x0, x0, :lo12:.LANCHOR103
 	str	x0, [x29, 104]
-.L2510:
+.L2517:
 	sub	w0, w26, #1
 	str	w0, [x29, 184]
 	cmp	w26, w24
-	beq	.L2519
+	beq	.L2526
 	mov	x19, 0
-	b	.L2520
-.L2508:
+	b	.L2527
+.L2515:
 	lsl	w24, w24, 1
 	mov	w0, 1
-	b	.L2551
-.L2516:
+	b	.L2558
+.L2523:
 	ldr	x1, [x29, 104]
 	ldr	x0, [x29, 136]
 	ldrh	w1, [x1]
@@ -15853,32 +15918,32 @@ gc_recovery:
 	str	w0, [x29, 200]
 	ldrb	w1, [x1]
 	cmp	w1, 3
-	bne	.L2511
+	bne	.L2518
 	add	w0, w26, w0
 	orr	w0, w0, w25, lsl 24
-.L2552:
+.L2559:
 	str	w0, [x27, 40]
 	mov	w1, 1
 	mov	x0, x27
 	bl	sblk_read_page
 	ldr	x0, [x29, 152]
-	ldr	x0, [x0, #:lo12:.LANCHOR136]
+	ldr	x0, [x0, #:lo12:.LANCHOR139]
 	ldr	w3, [x0, x28]
 	ldr	x0, [x27, 24]
 	ldr	w6, [x0, 4]
 	cmp	w3, w6
-	bne	.L2514
+	bne	.L2521
 	ldr	x1, [x29, 144]
-	ldr	x1, [x1, #:lo12:.LANCHOR137]
+	ldr	x1, [x1, #:lo12:.LANCHOR140]
 	ldr	w2, [x1, x28]
 	ldr	w1, [x0, 8]
 	cmp	w2, w1
-	beq	.L2515
-.L2514:
+	beq	.L2522
+.L2521:
 	ldr	x1, [x29, 144]
 	ldr	w2, [x0, 12]
 	str	w2, [sp]
-	ldr	x1, [x1, #:lo12:.LANCHOR137]
+	ldr	x1, [x1, #:lo12:.LANCHOR140]
 	ldr	w5, [x0]
 	ldr	w7, [x0, 8]
 	mov	x0, x23
@@ -15887,38 +15952,38 @@ gc_recovery:
 	ldr	w1, [x27, 40]
 	bl	printf
 	ldr	x0, [x29, 152]
-	ldr	x0, [x0, #:lo12:.LANCHOR136]
+	ldr	x0, [x0, #:lo12:.LANCHOR139]
 	ldr	w0, [x0, x28]
 	cmn	w0, #1
-	beq	.L2515
+	beq	.L2522
 	mov	x0, x27
 	bl	buf_free
-	b	.L2554
-.L2511:
+	b	.L2561
+.L2518:
 	cmp	w1, 2
-	bne	.L2513
+	bne	.L2520
 	ldr	w1, [x29, 184]
 	add	w0, w0, w1
 	add	w0, w0, w25
 	orr	w0, w0, 33554432
-	b	.L2552
-.L2513:
+	b	.L2559
+.L2520:
 	add	w0, w26, w0
-	b	.L2552
-.L2515:
+	b	.L2559
+.L2522:
 	add	w22, w22, 1
 	add	w25, w25, 1
 	add	x28, x28, 4
-.L2518:
+.L2525:
 	ldr	w0, [x29, 180]
 	cmp	w0, w25
-	bcs	.L2516
+	bcs	.L2523
 	add	x19, x19, 1
-.L2520:
+.L2527:
 	ldr	x0, [x29, 168]
 	ldrb	w0, [x0, 9]
 	cmp	w0, w19
-	ble	.L2517
+	ble	.L2524
 	add	x0, x20, x19, lsl 1
 	str	x0, [x29, 136]
 	ldr	x0, [x29, 160]
@@ -15926,11 +15991,11 @@ gc_recovery:
 	mov	w25, 1
 	add	x0, x0, :lo12:.LANCHOR67
 	str	x0, [x29, 112]
-	b	.L2518
-.L2517:
+	b	.L2525
+.L2524:
 	add	w26, w26, 1
-	b	.L2510
-.L2519:
+	b	.L2517
+.L2526:
 	mov	x0, x27
 	bl	buf_free
 	ldr	x3, [x29, 120]
@@ -15948,46 +16013,46 @@ gc_recovery:
 	adrp	x0, .LANCHOR96
 	add	x0, x0, :lo12:.LANCHOR96
 	str	x0, [x29, 96]
-.L2521:
+.L2528:
 	sub	w0, w23, #1
 	str	w0, [x29, 120]
 	cmp	w26, w23
-	beq	.L2534
+	beq	.L2541
 	str	xzr, [x29, 184]
-	b	.L2535
-.L2531:
+	b	.L2542
+.L2538:
 	ldr	x1, [x29, 152]
 	sbfiz	x0, x27, 2, 32
-	ldr	x1, [x1, #:lo12:.LANCHOR136]
+	ldr	x1, [x1, #:lo12:.LANCHOR139]
 	ldr	w28, [x1, x0]
 	cmn	w28, #1
-	beq	.L2522
+	beq	.L2529
 	ldr	x1, [x29, 144]
-	ldr	x1, [x1, #:lo12:.LANCHOR137]
+	ldr	x1, [x1, #:lo12:.LANCHOR140]
 	ldr	w0, [x1, x0]
 	str	w0, [x29, 136]
 	mov	w0, w28
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 204]
 	cmn	w0, #1
-	bne	.L2523
+	bne	.L2530
 	mov	w2, 0
 	add	x1, x29, 204
 	mov	w0, w28
 	bl	pm_log2phys
-.L2523:
+.L2530:
 	ldr	x0, [x29, 112]
 	ldr	x1, [x29, 128]
 	ldrh	w0, [x0, 96]
-	ldrh	w1, [x1, #:lo12:.LANCHOR99]
+	ldrh	w1, [x1, #:lo12:.LANCHOR103]
 	mul	w0, w0, w1
 	ldr	x1, [x29, 160]
 	ldrb	w1, [x1, #:lo12:.LANCHOR67]
 	cmp	w1, 3
-	bne	.L2524
+	bne	.L2531
 	add	w0, w23, w0
 	orr	w0, w0, w25, lsl 24
-.L2553:
+.L2560:
 	str	w0, [x29, 200]
 	mov	w19, 21
 	ldr	x0, [x29, 96]
@@ -16005,7 +16070,7 @@ gc_recovery:
 	ldr	w0, [x29, 204]
 	cmp	w1, w0
 	and	x19, x19, 65535
-	bne	.L2527
+	bne	.L2534
 	ldr	w2, [x29, 200]
 	mov	w1, w28
 	str	w4, [x29, 136]
@@ -16013,21 +16078,21 @@ gc_recovery:
 	add	x0, x0, :lo12:.LC162
 	bl	pm_ppa_update_check
 	ldr	w4, [x29, 136]
-	cbz	w0, .L2528
-.L2548:
-	b	.L2548
-.L2524:
+	cbz	w0, .L2535
+.L2555:
+	b	.L2555
+.L2531:
 	cmp	w1, 2
-	bne	.L2526
+	bne	.L2533
 	ldr	w1, [x29, 120]
 	add	w0, w0, w1
 	add	w0, w0, w25
 	orr	w0, w0, 33554432
-	b	.L2553
-.L2526:
+	b	.L2560
+.L2533:
 	add	w0, w23, w0
-	b	.L2553
-.L2528:
+	b	.L2560
+.L2535:
 	mov	w2, w4
 	add	x1, x29, 200
 	mov	w0, w28
@@ -16035,34 +16100,34 @@ gc_recovery:
 	add	w22, w22, 1
 	mov	w0, w19
 	bl	ftl_vpn_decrement
-.L2530:
+.L2537:
 	adrp	x0, .LANCHOR3
 	add	w27, w27, 1
 	ldr	x0, [x0, #:lo12:.LANCHOR3]
 	add	x0, x0, x19, lsl 2
 	ldrb	w0, [x0, 2]
 	tst	w0, 224
-	bne	.L2522
+	bne	.L2529
 	ldr	x0, [x24, #:lo12:.LANCHOR4]
 	lsl	x19, x19, 1
 	ldrh	w1, [x0, x19]
-	cbz	w1, .L2522
+	cbz	w1, .L2529
 	strh	wzr, [x0, x19]
-.L2522:
+.L2529:
 	add	w25, w25, 1
-.L2533:
+.L2540:
 	ldr	w0, [x29, 180]
 	cmp	w0, w25
-	bcs	.L2531
+	bcs	.L2538
 	ldr	x0, [x29, 184]
 	add	x0, x0, 1
 	str	x0, [x29, 184]
-.L2535:
+.L2542:
 	ldr	x0, [x29, 168]
 	ldr	w1, [x29, 184]
 	ldrb	w0, [x0, 9]
 	cmp	w0, w1
-	ble	.L2532
+	ble	.L2539
 	ldr	x0, [x29, 184]
 	mov	w25, 1
 	add	x0, x20, x0, lsl 1
@@ -16070,43 +16135,43 @@ gc_recovery:
 	adrp	x0, .LANCHOR95
 	add	x0, x0, :lo12:.LANCHOR95
 	str	x0, [x29, 104]
-	b	.L2533
-.L2527:
+	b	.L2540
+.L2534:
 	ldr	w1, [x29, 200]
 	cmp	w0, w1
 	cinc	w22, w22, eq
-	b	.L2530
-.L2532:
+	b	.L2537
+.L2539:
 	add	w23, w23, 1
-	b	.L2521
-.L2534:
+	b	.L2528
+.L2541:
 	ldrh	w1, [x20, 80]
 	ldr	x0, [x24, #:lo12:.LANCHOR4]
 	strh	w22, [x0, x1, lsl 1]
-	b	.L2507
-.L2502:
+	b	.L2514
+.L2509:
 	ldrh	w0, [x0, 130]
 	cmp	w0, w1
-	beq	.L2501
-	adrp	x19, .LANCHOR101
-	ldr	x1, [x19, #:lo12:.LANCHOR101]
+	beq	.L2508
+	adrp	x19, .LANCHOR97
+	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	ldrh	w1, [x1, 126]
 	cmp	w1, w0
-	bne	.L2538
+	bne	.L2545
 	bl	pm_flush
 	ldr	x0, [x21, #:lo12:.LANCHOR5]
 	ldrh	w0, [x0, 130]
 	bl	ftl_free_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR101]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	w1, -1
 	strh	w1, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2538:
+.L2545:
 	ldr	x0, [x21, #:lo12:.LANCHOR5]
 	mov	w1, -1
 	strh	w1, [x0, 130]
-	b	.L2501
+	b	.L2508
 	.size	gc_recovery, .-gc_recovery
 	.section	.text.zftl_init,"ax",@progbits
 	.align	2
@@ -16122,14 +16187,14 @@ zftl_init:
 	stp	x21, x22, [sp, 32]
 	adrp	x22, .LANCHOR80
 	strb	wzr, [x1, #:lo12:.LANCHOR53]
-	adrp	x1, .LANCHOR160
+	adrp	x1, .LANCHOR163
 	stp	x19, x20, [sp, 16]
 	adrp	x21, .LANCHOR72
-	strb	w0, [x1, #:lo12:.LANCHOR160]
-	adrp	x0, .LANCHOR112
+	strb	w0, [x1, #:lo12:.LANCHOR163]
+	adrp	x0, .LANCHOR115
 	mov	w1, -1
 	stp	x23, x24, [sp, 48]
-	strb	wzr, [x0, #:lo12:.LANCHOR112]
+	strb	wzr, [x0, #:lo12:.LANCHOR115]
 	adrp	x0, .LANCHOR56
 	stp	x25, x26, [sp, 64]
 	adrp	x23, .LANCHOR2
@@ -16140,16 +16205,16 @@ zftl_init:
 	adrp	x0, .LC80
 	add	x0, x0, :lo12:.LC80
 	bl	printf
-	adrp	x20, .LANCHOR185
+	adrp	x20, .LANCHOR188
 	adrp	x1, .LANCHOR32
 	add	x1, x1, :lo12:.LANCHOR32
 	adrp	x0, .LANCHOR67
-	adrp	x2, .LANCHOR114
+	adrp	x2, .LANCHOR117
 	adrp	x7, .LANCHOR95
 	ldrb	w5, [x1, 12]
 	strb	w5, [x0, #:lo12:.LANCHOR67]
 	ldrb	w0, [x1, 9]
-	strb	w0, [x2, #:lo12:.LANCHOR114]
+	strb	w0, [x2, #:lo12:.LANCHOR117]
 	adrp	x2, .LANCHOR71
 	ldrh	w3, [x1, 10]
 	strh	w3, [x2, #:lo12:.LANCHOR71]
@@ -16157,172 +16222,172 @@ zftl_init:
 	ldrh	w8, [x1, 14]
 	ubfiz	w11, w0, 9, 7
 	ldrb	w4, [x2, #:lo12:.LANCHOR12]
-	adrp	x2, .LANCHOR100
+	adrp	x2, .LANCHOR104
 	sdiv	w6, w3, w5
 	strh	w8, [x23, #:lo12:.LANCHOR2]
-	strb	w4, [x2, #:lo12:.LANCHOR100]
+	strb	w4, [x2, #:lo12:.LANCHOR104]
 	ldrb	w2, [x1, 13]
 	adrp	x1, .LANCHOR26
 	strb	w2, [x7, #:lo12:.LANCHOR95]
 	ldrh	w7, [x1, #:lo12:.LANCHOR26]
-	adrp	x1, .LANCHOR99
+	adrp	x1, .LANCHOR103
 	strh	w6, [x22, #:lo12:.LANCHOR80]
 	mul	w4, w4, w2
-	strh	w7, [x1, #:lo12:.LANCHOR99]
-	strh	w11, [x20, #:lo12:.LANCHOR185]
+	strh	w7, [x1, #:lo12:.LANCHOR103]
+	strh	w11, [x20, #:lo12:.LANCHOR188]
 	mov	w2, 1
 	and	w4, w4, 255
 	mov	w1, 0
 	strb	w4, [x21, #:lo12:.LANCHOR72]
-.L2556:
+.L2563:
 	cmp	w7, w2
-	bcs	.L2557
+	bcs	.L2564
 	mul	w3, w0, w3
 	adrp	x2, .LANCHOR96
 	sub	w1, w1, #1
-	adrp	x10, .LANCHOR189
+	adrp	x10, .LANCHOR192
 	strh	w1, [x2, #:lo12:.LANCHOR96]
 	mov	w1, 57344
 	movk	w1, 0x1c, lsl 16
 	adrp	x28, .LANCHOR54
 	mul	w7, w3, w8
-	adrp	x24, .LANCHOR172
+	adrp	x24, .LANCHOR175
 	mul	w1, w4, w1
-	adrp	x27, .LANCHOR190
+	adrp	x27, .LANCHOR193
 	mul	w3, w3, w4
-	adrp	x26, .LANCHOR131
+	adrp	x26, .LANCHOR134
 	lsr	w2, w7, 21
 	mul	w6, w6, w4
 	mul	w7, w7, w4
 	sub	w3, w3, #1
-	str	w7, [x10, #:lo12:.LANCHOR189]
+	str	w7, [x10, #:lo12:.LANCHOR192]
 	sub	w7, w11, #1
 	mul	w1, w1, w2
 	adrp	x2, .LANCHOR59
 	adrp	x25, .LANCHOR83
 	str	w1, [x2, #:lo12:.LANCHOR59]
 	add	w2, w1, 24576
-	str	w2, [x27, #:lo12:.LANCHOR190]
+	str	w2, [x27, #:lo12:.LANCHOR193]
 	udiv	w0, w2, w0
 	udiv	w2, w2, w3
 	str	w0, [x28, #:lo12:.LANCHOR54]
 	add	w0, w7, w0, lsl 2
 	add	w2, w2, 8
 	udiv	w0, w0, w11
-	strh	w0, [x24, #:lo12:.LANCHOR172]
+	strh	w0, [x24, #:lo12:.LANCHOR175]
 	ubfiz	w0, w0, 4, 16
 	sdiv	w0, w0, w6
 	adrp	x6, .LANCHOR87
 	str	x6, [x29, 104]
 	strh	w2, [x6, #:lo12:.LANCHOR87]
-	adrp	x2, .LANCHOR191
-	strh	w0, [x26, #:lo12:.LANCHOR131]
+	adrp	x2, .LANCHOR100
+	strh	w0, [x26, #:lo12:.LANCHOR134]
 	add	w0, w8, w8, lsl 1
 	asr	w0, w0, 2
-	strh	w0, [x2, #:lo12:.LANCHOR191]
+	strh	w0, [x2, #:lo12:.LANCHOR100]
 	lsr	w0, w8, 4
 	strh	w0, [x25, #:lo12:.LANCHOR83]
 	cmp	w0, 79
-	bhi	.L2558
+	bhi	.L2565
 	mov	w0, 80
 	strh	w0, [x25, #:lo12:.LANCHOR83]
-.L2558:
-	adrp	x2, .LANCHOR192
+.L2565:
+	adrp	x2, .LANCHOR98
 	mov	w0, 4000
-	adrp	x4, .LANCHOR193
+	adrp	x4, .LANCHOR99
 	mov	w3, 1024
-	strh	w0, [x2, #:lo12:.LANCHOR192]
+	strh	w0, [x2, #:lo12:.LANCHOR98]
 	mov	w0, 50
-	strh	w0, [x4, #:lo12:.LANCHOR193]
-	adrp	x0, .LANCHOR130
+	strh	w0, [x4, #:lo12:.LANCHOR99]
+	adrp	x0, .LANCHOR133
 	mov	w6, 64
 	cmp	w5, 2
-	strh	w3, [x0, #:lo12:.LANCHOR130]
-	adrp	x3, .LANCHOR129
-	strh	w6, [x3, #:lo12:.LANCHOR129]
-	beq	.L2559
+	strh	w3, [x0, #:lo12:.LANCHOR133]
+	adrp	x3, .LANCHOR132
+	strh	w6, [x3, #:lo12:.LANCHOR132]
+	beq	.L2566
 	adrp	x5, .LANCHOR69
 	ldrb	w5, [x5, #:lo12:.LANCHOR69]
-	cbz	w5, .L2560
-.L2559:
+	cbz	w5, .L2567
+.L2566:
 	mov	w5, 150
-	strh	w5, [x4, #:lo12:.LANCHOR193]
+	strh	w5, [x4, #:lo12:.LANCHOR99]
 	mov	w4, 128
-	strh	w4, [x3, #:lo12:.LANCHOR129]
+	strh	w4, [x3, #:lo12:.LANCHOR132]
 	adrp	x3, .LANCHOR11
 	ldrb	w3, [x3, #:lo12:.LANCHOR11]
-	cbnz	w3, .L2560
+	cbnz	w3, .L2567
 	mov	w3, 600
-	strh	w3, [x2, #:lo12:.LANCHOR192]
+	strh	w3, [x2, #:lo12:.LANCHOR98]
 	mov	w2, 512
-	strh	w2, [x0, #:lo12:.LANCHOR130]
-.L2560:
+	strh	w2, [x0, #:lo12:.LANCHOR133]
+.L2567:
 	adrp	x19, .LANCHOR7
 	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2562
+	tbz	x0, 12, .L2569
 	str	x10, [x29, 96]
 	adrp	x0, .LC165
 	add	x0, x0, :lo12:.LC165
 	bl	printf
 	ldr	x10, [x29, 96]
-.L2562:
+.L2569:
 	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2563
-	ldr	w1, [x10, #:lo12:.LANCHOR189]
+	tbz	x0, 12, .L2570
+	ldr	w1, [x10, #:lo12:.LANCHOR192]
 	adrp	x0, .LC166
 	add	x0, x0, :lo12:.LC166
 	bl	printf
-.L2563:
+.L2570:
 	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2564
+	tbz	x0, 12, .L2571
 	ldr	w1, [x28, #:lo12:.LANCHOR54]
 	adrp	x0, .LC167
 	add	x0, x0, :lo12:.LC167
 	bl	printf
-.L2564:
+.L2571:
 	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2565
-	ldr	w1, [x27, #:lo12:.LANCHOR190]
+	tbz	x0, 12, .L2572
+	ldr	w1, [x27, #:lo12:.LANCHOR193]
 	adrp	x0, .LC168
 	add	x0, x0, :lo12:.LC168
 	bl	printf
-.L2565:
+.L2572:
 	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2566
-	ldrh	w1, [x24, #:lo12:.LANCHOR172]
+	tbz	x0, 12, .L2573
+	ldrh	w1, [x24, #:lo12:.LANCHOR175]
 	adrp	x0, .LC169
 	add	x0, x0, :lo12:.LC169
 	bl	printf
-.L2566:
+.L2573:
 	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2567
-	ldrh	w1, [x20, #:lo12:.LANCHOR185]
+	tbz	x0, 12, .L2574
+	ldrh	w1, [x20, #:lo12:.LANCHOR188]
 	adrp	x0, .LC170
 	add	x0, x0, :lo12:.LC170
 	bl	printf
-.L2567:
+.L2574:
 	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2568
-	ldrh	w1, [x26, #:lo12:.LANCHOR131]
+	tbz	x0, 12, .L2575
+	ldrh	w1, [x26, #:lo12:.LANCHOR134]
 	adrp	x0, .LC171
 	add	x0, x0, :lo12:.LC171
 	bl	printf
-.L2568:
+.L2575:
 	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2569
+	tbz	x0, 12, .L2576
 	ldrh	w1, [x25, #:lo12:.LANCHOR83]
 	adrp	x0, .LC172
 	add	x0, x0, :lo12:.LC172
 	bl	printf
-.L2569:
+.L2576:
 	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2570
+	tbz	x0, 12, .L2577
 	ldr	x0, [x29, 104]
 	ldrh	w1, [x0, #:lo12:.LANCHOR87]
 	adrp	x0, .LC173
 	add	x0, x0, :lo12:.LC173
 	bl	printf
-.L2570:
+.L2577:
 	bl	buf_init
 	adrp	x25, .LANCHOR5
 	ldrh	w1, [x23, #:lo12:.LANCHOR2]
@@ -16336,13 +16401,13 @@ zftl_init:
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR107
+	adrp	x1, .LANCHOR110
 	adrp	x2, ftl_ext_info_data_buffer
 	add	x2, x2, :lo12:ftl_ext_info_data_buffer
-	str	x0, [x1, #:lo12:.LANCHOR107]
-	adrp	x0, .LANCHOR106
+	str	x0, [x1, #:lo12:.LANCHOR110]
+	adrp	x0, .LANCHOR109
 	ldrh	w1, [x22, #:lo12:.LANCHOR80]
-	str	x2, [x0, #:lo12:.LANCHOR106]
+	str	x2, [x0, #:lo12:.LANCHOR109]
 	ldrb	w0, [x21, #:lo12:.LANCHOR72]
 	mul	w1, w1, w0
 	lsl	w0, w1, 1
@@ -16354,15 +16419,15 @@ zftl_init:
 	ldr	w0, [x19, #:lo12:.LANCHOR7]
 	add	x1, x2, x1, sxtw 2
 	str	x1, [x25, #:lo12:.LANCHOR5]
-	tbz	x0, 12, .L2571
+	tbz	x0, 12, .L2578
 	adrp	x0, .LC174
 	add	x0, x0, :lo12:.LC174
 	bl	printf
-.L2571:
+.L2578:
 	ldrh	w0, [x22, #:lo12:.LANCHOR80]
 	ldrb	w21, [x21, #:lo12:.LANCHOR72]
 	ldrh	w1, [x23, #:lo12:.LANCHOR2]
-	ldrh	w22, [x24, #:lo12:.LANCHOR172]
+	ldrh	w22, [x24, #:lo12:.LANCHOR175]
 	mul	w21, w0, w21
 	ldr	w0, [x19, #:lo12:.LANCHOR7]
 	add	w21, w1, w21, lsl 2
@@ -16371,34 +16436,34 @@ zftl_init:
 	add	w22, w1, w22, lsl 2
 	add	w21, w21, 612
 	add	w22, w22, 704
-	tbz	x0, 12, .L2572
-	ldrh	w3, [x20, #:lo12:.LANCHOR185]
+	tbz	x0, 12, .L2579
+	ldrh	w3, [x20, #:lo12:.LANCHOR188]
 	adrp	x0, .LC175
 	mov	w2, w22
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC175
 	bl	printf
-.L2572:
-	ldrh	w0, [x20, #:lo12:.LANCHOR185]
+.L2579:
+	ldrh	w0, [x20, #:lo12:.LANCHOR188]
 	cmp	w21, w0
-	bhi	.L2573
+	bhi	.L2580
 	cmp	w22, w0
-	bls	.L2574
-.L2573:
-.L2617:
-	b	.L2617
-.L2557:
+	bls	.L2581
+.L2580:
+.L2624:
+	b	.L2624
+.L2564:
 	add	w1, w1, 1
 	lsl	w2, w2, 1
 	and	w1, w1, 65535
-	b	.L2556
-.L2574:
+	b	.L2563
+.L2581:
 	bl	sblk_init
 	bl	ftl_info_blk_init
 	cmn	w0, #1
-	beq	.L2555
+	beq	.L2562
 	bl	ftl_ext_info_init
-	adrp	x19, .LANCHOR101
+	adrp	x19, .LANCHOR97
 	mov	w0, 1
 	bl	pm_init
 	bl	lpa_rebuild_hash
@@ -16410,7 +16475,7 @@ zftl_init:
 	add	x1, x0, 16
 	add	x0, x0, 48
 	bl	ftl_open_sblk_recovery
-	ldr	x1, [x19, #:lo12:.LANCHOR101]
+	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	ldr	w0, [x1, 8]
 	add	w0, w0, 16
 	str	w0, [x1, 8]
@@ -16427,20 +16492,20 @@ zftl_init:
 	bl	pm_flush
 	mov	w0, 1
 	bl	ftl_total_vpn_update
-	adrp	x0, .LANCHOR167
-	ldrb	w0, [x0, #:lo12:.LANCHOR167]
-	cbz	w0, .L2576
-	ldr	x1, [x19, #:lo12:.LANCHOR101]
+	adrp	x0, .LANCHOR170
+	ldrb	w0, [x0, #:lo12:.LANCHOR170]
+	cbz	w0, .L2583
+	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	ldr	w0, [x1, 68]
 	add	w0, w0, 1
 	str	w0, [x1, 68]
-.L2576:
+.L2583:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
 	bl	print_ftl_debug_info
 	mov	w0, 0
-.L2555:
+.L2562:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -16458,9 +16523,9 @@ rk_ftl_init:
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	bl	nand_flash_init
-	cbnz	w0, .L2621
+	cbnz	w0, .L2628
 	bl	zftl_init
-.L2621:
+.L2628:
 	mov	w19, w0
 	bl	idb_init
 	mov	w1, w19
@@ -16495,12 +16560,12 @@ gc_update_l2p_map_new:
 	str	x0, [x29, 128]
 	mul	w25, w25, w1
 	ldr	w1, [x21, #:lo12:.LANCHOR7]
-	tbz	x1, 8, .L2624
+	tbz	x1, 8, .L2631
 	ldrh	w1, [x20, 80]
 	adrp	x0, .LC177
 	add	x0, x0, :lo12:.LC177
 	bl	printf
-.L2624:
+.L2631:
 	adrp	x23, .LANCHOR4
 	ldrh	w1, [x20, 80]
 	sub	w2, w25, #1
@@ -16508,15 +16573,15 @@ gc_update_l2p_map_new:
 	ldr	x0, [x23, #:lo12:.LANCHOR4]
 	mov	w24, 0
 	strh	w2, [x0, x1, lsl 1]
-	adrp	x0, .LANCHOR114
-	add	x0, x0, :lo12:.LANCHOR114
+	adrp	x0, .LANCHOR117
+	add	x0, x0, :lo12:.LANCHOR117
 	str	x0, [x29, 104]
-.L2625:
+.L2632:
 	mov	w27, w22
 	cmp	w25, w22
-	bhi	.L2635
+	bhi	.L2642
 	ldr	w0, [x21, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L2636
+	tbz	x0, 8, .L2643
 	ldr	x0, [x29, 128]
 	mov	w3, w24
 	ldr	x1, [x23, #:lo12:.LANCHOR4]
@@ -16527,19 +16592,19 @@ gc_update_l2p_map_new:
 	adrp	x0, .LC181
 	add	x0, x0, :lo12:.LC181
 	bl	printf
-.L2636:
+.L2643:
 	ldrh	w1, [x20, 80]
 	ldr	x0, [x23, #:lo12:.LANCHOR4]
 	ldrh	w0, [x0, x1, lsl 1]
 	cmp	w24, w0
-	beq	.L2637
+	beq	.L2644
 	adrp	x1, .LANCHOR194
 	adrp	x0, .LC0
 	mov	w2, 463
 	add	x1, x1, :lo12:.LANCHOR194
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2637:
+.L2644:
 	ldrh	w1, [x20, 80]
 	ldr	x0, [x23, #:lo12:.LANCHOR4]
 	strh	w24, [x0, x1, lsl 1]
@@ -16552,27 +16617,27 @@ gc_update_l2p_map_new:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L2635:
-	adrp	x26, .LANCHOR136
+.L2642:
+	adrp	x26, .LANCHOR139
 	lsl	x19, x22, 2
-	ldr	x0, [x26, #:lo12:.LANCHOR136]
+	ldr	x0, [x26, #:lo12:.LANCHOR139]
 	ldr	w2, [x0, x19]
 	cmn	w2, #1
-	beq	.L2626
-	adrp	x0, .LANCHOR114
-	ldrb	w0, [x0, #:lo12:.LANCHOR114]
+	beq	.L2633
+	adrp	x0, .LANCHOR117
+	ldrb	w0, [x0, #:lo12:.LANCHOR117]
 	lsl	w0, w0, 7
 	udiv	w0, w2, w0
 	and	w0, w0, 65535
 	str	w0, [x29, 156]
 	ldr	w0, [x21, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L2627
+	tbz	x0, 8, .L2634
 	ldr	w1, [x29, 156]
 	adrp	x0, .LC178
 	mov	w3, w22
 	add	x0, x0, :lo12:.LC178
 	bl	printf
-.L2627:
+.L2634:
 	sub	w27, w25, w27
 	add	x27, x27, x22
 	lsl	x0, x27, 2
@@ -16583,46 +16648,46 @@ gc_update_l2p_map_new:
 	adrp	x0, .LANCHOR96
 	add	x0, x0, :lo12:.LANCHOR96
 	str	x0, [x29, 112]
-.L2628:
+.L2635:
 	ldr	x0, [x29, 136]
 	cmp	x0, x19
-	bne	.L2634
-.L2626:
+	bne	.L2641
+.L2633:
 	add	x22, x22, 1
-	b	.L2625
-.L2634:
-	ldr	x0, [x26, #:lo12:.LANCHOR136]
+	b	.L2632
+.L2641:
+	ldr	x0, [x26, #:lo12:.LANCHOR139]
 	ldr	w28, [x0, x19]
 	cmn	w28, #1
-	beq	.L2629
+	beq	.L2636
 	ldr	x0, [x29, 104]
 	ldr	w1, [x29, 156]
 	ldrb	w0, [x0]
 	lsl	w0, w0, 7
 	udiv	w0, w28, w0
 	cmp	w1, w0, uxth
-	bne	.L2629
-	adrp	x0, .LANCHOR137
-	ldr	x0, [x0, #:lo12:.LANCHOR137]
+	bne	.L2636
+	adrp	x0, .LANCHOR140
+	ldr	x0, [x0, #:lo12:.LANCHOR140]
 	ldr	w27, [x0, x19]
 	mov	w0, w28
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 172]
 	cmn	w0, #1
-	bne	.L2630
+	bne	.L2637
 	mov	w2, 0
 	add	x1, x29, 172
 	mov	w0, w28
 	bl	pm_log2phys
-.L2630:
+.L2637:
 	ldr	w3, [x29, 172]
 	cmp	w27, w3
-	bne	.L2631
-	adrp	x0, .LANCHOR138
+	bne	.L2638
+	adrp	x0, .LANCHOR141
 	mov	w2, 1
 	add	x1, x29, 168
 	add	w24, w24, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR138]
+	ldr	x0, [x0, #:lo12:.LANCHOR141]
 	ldr	w0, [x0, x19]
 	str	w0, [x29, 168]
 	mov	w0, w28
@@ -16647,34 +16712,34 @@ gc_update_l2p_map_new:
 	ldr	w1, [x29, 152]
 	ldrh	w0, [x0]
 	cmp	w0, w1
-	bne	.L2632
+	bne	.L2639
 	ldr	w0, [x21, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L2632
+	tbz	x0, 8, .L2639
 	ldr	w3, [x29, 172]
 	adrp	x0, .LC179
 	mov	w2, w27
 	mov	w1, w28
 	add	x0, x0, :lo12:.LC179
 	bl	printf
-.L2632:
-	ldr	x0, [x26, #:lo12:.LANCHOR136]
+.L2639:
+	ldr	x0, [x26, #:lo12:.LANCHOR139]
 	mov	w1, -1
 	str	w1, [x0, x19]
-.L2629:
+.L2636:
 	add	x19, x19, 4
-	b	.L2628
-.L2631:
+	b	.L2635
+.L2638:
 	ldr	w0, [x21, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L2633
+	tbz	x0, 8, .L2640
 	ldr	x0, [x29, 120]
 	mov	w2, w27
 	mov	w1, w28
 	bl	printf
-.L2633:
+.L2640:
 	ldr	x0, [x29, 144]
 	ldrh	w0, [x0]
 	bl	ftl_vpn_decrement
-	b	.L2632
+	b	.L2639
 	.size	gc_update_l2p_map_new, .-gc_update_l2p_map_new
 	.section	.text.gc_scan_src_blk_one_page,"ax",@progbits
 	.align	2
@@ -16698,43 +16763,43 @@ gc_scan_src_blk_one_page:
 	adrp	x2, .LANCHOR72
 	ldrb	w4, [x2, #:lo12:.LANCHOR72]
 	ldrh	w2, [x1, 2]
-.L2661:
+.L2668:
 	cmp	w3, w7
-	beq	.L2663
-	cbz	w6, .L2664
+	beq	.L2670
+	cbz	w6, .L2671
 	add	x1, x19, :lo12:.LANCHOR63
 	strb	w0, [x1, 4]
-.L2664:
-	cbz	w5, .L2665
+.L2671:
+	cbz	w5, .L2672
 	add	x0, x19, :lo12:.LANCHOR63
 	strh	w2, [x0, 2]
-.L2665:
-	adrp	x0, .LANCHOR99
-	ldrh	w22, [x0, #:lo12:.LANCHOR99]
+.L2672:
+	adrp	x0, .LANCHOR103
+	ldrh	w22, [x0, #:lo12:.LANCHOR103]
 	adrp	x0, .LANCHOR67
 	mov	x23, x0
 	ldrb	w1, [x0, #:lo12:.LANCHOR67]
 	mul	w22, w22, w3
 	cmp	w1, 2
-	bne	.L2666
+	bne	.L2673
 	add	x0, x19, :lo12:.LANCHOR63
 	ldrb	w1, [x0, 6]
-	cbnz	w1, .L2666
+	cbnz	w1, .L2673
 	ldrh	w0, [x0, 2]
 	add	w22, w22, w0, lsl 1
-.L2667:
+.L2674:
 	add	x1, x19, :lo12:.LANCHOR63
 	ldrb	w0, [x1, 4]
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x1, 4]
 	cmp	w4, w0
-	bne	.L2668
+	bne	.L2675
 	ldrh	w0, [x1, 2]
 	strb	wzr, [x1, 4]
 	add	w0, w0, 1
 	strh	w0, [x1, 2]
-.L2668:
+.L2675:
 	mov	w0, 1
 	add	x19, x19, :lo12:.LANCHOR63
 	bl	buf_alloc
@@ -16742,15 +16807,15 @@ gc_scan_src_blk_one_page:
 	mov	x21, x0
 	mov	w20, 0
 	adrp	x24, .LANCHOR64
-.L2678:
+.L2685:
 	ldrb	w0, [x19, 6]
 	cmp	w0, 3
-	bne	.L2669
-	cbz	w20, .L2670
-.L2669:
+	bne	.L2676
+	cbz	w20, .L2677
+.L2676:
 	cmp	w0, w20
-	bgt	.L2671
-.L2679:
+	bgt	.L2678
+.L2686:
 	mov	x0, x21
 	bl	buf_free
 	ldp	x19, x20, [sp, 16]
@@ -16759,33 +16824,33 @@ gc_scan_src_blk_one_page:
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2663:
+.L2670:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	cmp	w0, w4
-	bne	.L2662
+	bne	.L2669
 	add	w2, w2, 1
 	mov	w5, 1
 	and	w2, w2, 65535
 	mov	w0, 0
-.L2662:
+.L2669:
 	add	x3, x1, x0, sxtw 1
 	mov	w6, 1
 	ldrh	w3, [x3, 40]
-	b	.L2661
-.L2666:
+	b	.L2668
+.L2673:
 	add	x0, x19, :lo12:.LANCHOR63
 	ldrh	w0, [x0, 2]
 	add	w22, w0, w22
-	b	.L2667
-.L2671:
+	b	.L2674
+.L2678:
 	ldrb	w1, [x23]
 	cmp	w1, 2
-	bne	.L2672
-	cbnz	w0, .L2672
+	bne	.L2679
+	cbnz	w0, .L2679
 	add	w0, w20, w22
 	orr	w0, w0, 33554432
-.L2692:
+.L2699:
 	str	w0, [x21, 40]
 	mov	w1, 1
 	mov	x0, x21
@@ -16793,40 +16858,40 @@ gc_scan_src_blk_one_page:
 	ldr	w0, [x21, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2675
+	beq	.L2682
 	ldr	x0, [x21, 24]
 	ldr	w25, [x0, 4]
 	mov	w0, w25
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 92]
 	cmn	w0, #1
-	bne	.L2676
+	bne	.L2683
 	mov	w2, 0
 	add	x1, x29, 92
 	mov	w0, w25
 	bl	pm_log2phys
-.L2676:
+.L2683:
 	ldr	w0, [x29, 92]
 	cmp	w22, w0
-	bne	.L2675
+	bne	.L2682
 	ldrh	w0, [x19, 24]
 	ldr	x2, [x24, #:lo12:.LANCHOR64]
 	ubfiz	x1, x0, 2, 16
 	add	w0, w0, 1
 	str	w22, [x2, x1]
 	strh	w0, [x19, 24]
-.L2675:
+.L2682:
 	ldrh	w0, [x19, 26]
 	add	w0, w0, 1
 	strh	w0, [x19, 26]
-.L2670:
+.L2677:
 	add	w20, w20, 1
 	cmp	w20, 4
-	bne	.L2678
-	b	.L2679
-.L2672:
+	bne	.L2685
+	b	.L2686
+.L2679:
 	orr	w0, w22, w20, lsl 24
-	b	.L2692
+	b	.L2699
 	.size	gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page
 	.section	.text.gc_scan_static_data,"ax",@progbits
 	.align	2
@@ -16842,13 +16907,13 @@ gc_scan_static_data:
 	ldr	w1, [x0, 544]
 	str	x23, [sp, 48]
 	cmn	w1, #1
-	beq	.L2694
+	beq	.L2701
 	adrp	x21, .LANCHOR195
 	adrp	x22, .LC0
 	add	x21, x21, :lo12:.LANCHOR195
 	add	x22, x22, :lo12:.LC0
 	mov	w20, 11
-.L2702:
+.L2709:
 	ldr	x0, [x19, #:lo12:.LANCHOR5]
 	mov	w2, 0
 	add	x1, x29, 76
@@ -16856,7 +16921,7 @@ gc_scan_static_data:
 	bl	pm_log2phys
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L2695
+	beq	.L2702
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 76]
@@ -16866,7 +16931,7 @@ gc_scan_static_data:
 	bl	sblk_read_page
 	ldr	w0, [x23, 52]
 	cmp	w0, 256
-	bne	.L2696
+	bne	.L2703
 	adrp	x0, .LANCHOR96
 	ldr	w2, [x29, 76]
 	mov	w1, 1
@@ -16882,21 +16947,21 @@ gc_scan_static_data:
 	mov	w2, 0
 	udiv	w0, w0, w3
 	bl	gc_add_sblk
-.L2696:
+.L2703:
 	ldr	x0, [x19, #:lo12:.LANCHOR5]
 	ldr	x1, [x23, 24]
 	ldr	w0, [x0, 544]
 	ldr	w1, [x1, 4]
 	cmp	w1, w0
-	beq	.L2697
+	beq	.L2704
 	mov	w2, 1369
 	mov	x1, x21
 	mov	x0, x22
 	bl	printf
-.L2697:
+.L2704:
 	mov	x0, x23
 	bl	buf_free
-.L2695:
+.L2702:
 	ldr	x0, [x19, #:lo12:.LANCHOR5]
 	adrp	x2, .LANCHOR54
 	ldr	w2, [x2, #:lo12:.LANCHOR54]
@@ -16904,7 +16969,7 @@ gc_scan_static_data:
 	add	w1, w1, 1
 	str	w1, [x0, 544]
 	cmp	w1, w2
-	bcc	.L2698
+	bcc	.L2705
 	mov	w1, -1
 	str	w1, [x0, 544]
 	ldr	w1, [x0, 548]
@@ -16915,48 +16980,48 @@ gc_scan_static_data:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2693:
+.L2700:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2698:
+.L2705:
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	bne	.L2693
+	bne	.L2700
 	sub	w20, w20, #1
 	ands	w20, w20, 65535
-	bne	.L2702
-	b	.L2693
-.L2694:
-	adrp	x1, .LANCHOR101
-	ldr	x1, [x1, #:lo12:.LANCHOR101]
+	bne	.L2709
+	b	.L2700
+.L2701:
+	adrp	x1, .LANCHOR97
+	ldr	x1, [x1, #:lo12:.LANCHOR97]
 	ldr	w2, [x1, 40]
 	cmp	w2, 20480
-	bls	.L2704
+	bls	.L2711
 	ldr	w3, [x1, 44]
 	add	w3, w3, w2, lsr 10
 	and	w2, w2, 1023
 	stp	w2, w3, [x1, 40]
-.L2704:
+.L2711:
 	ldr	w2, [x0, 536]
 	ldr	w3, [x0, 12]
 	add	w2, w2, 12959744
 	add	w2, w2, 256
 	cmp	w3, w2
 	ldr	w2, [x1, 44]
-	bhi	.L2705
+	bhi	.L2712
 	ldr	w1, [x0, 540]
 	add	w1, w1, 98304
 	add	w1, w1, 1696
 	cmp	w2, w1
-	bls	.L2693
-.L2705:
+	bls	.L2700
+.L2712:
 	str	w3, [x0, 536]
 	str	w2, [x0, 540]
 	str	wzr, [x0, 544]
-	b	.L2693
+	b	.L2700
 	.size	gc_scan_static_data, .-gc_scan_static_data
 	.section	.text.ftl_sblk_dump,"ax",@progbits
 	.align	2
@@ -16974,11 +17039,11 @@ ftl_sblk_dump:
 	cmp	w21, w0
 	stp	x25, x26, [sp, 112]
 	stp	x27, x28, [sp, 128]
-	beq	.L2732
+	beq	.L2739
 	adrp	x0, .LANCHOR2
 	ldrh	w0, [x0, #:lo12:.LANCHOR2]
 	cmp	w0, w21
-	bls	.L2732
+	bls	.L2739
 	uxtw	x0, w21
 	adrp	x25, .LANCHOR3
 	str	x0, [x29, 136]
@@ -16990,10 +17055,10 @@ ftl_sblk_dump:
 	ldrb	w0, [x0, 2]
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L2733
+	bne	.L2740
 	adrp	x0, .LANCHOR67
 	ldrb	w24, [x0, #:lo12:.LANCHOR67]
-.L2713:
+.L2720:
 	add	x28, x29, 224
 	adrp	x19, .LANCHOR80
 	str	x1, [x29, 152]
@@ -17027,14 +17092,14 @@ ftl_sblk_dump:
 	str	x19, [x29, 128]
 	mov	x26, x0
 	stp	wzr, wzr, [x29, 168]
-	adrp	x0, .LANCHOR99
-	add	x0, x0, :lo12:.LANCHOR99
+	adrp	x0, .LANCHOR103
+	add	x0, x0, :lo12:.LANCHOR103
 	str	x0, [x29, 104]
-.L2714:
+.L2721:
 	ldr	x0, [x29, 128]
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w0, w20
-	bls	.L2729
+	bls	.L2736
 	lsl	w0, w20, 1
 	mov	w23, 0
 	sub	w0, w0, #1
@@ -17042,24 +17107,24 @@ ftl_sblk_dump:
 	adrp	x0, .LC129
 	add	x0, x0, :lo12:.LC129
 	str	x0, [x29, 112]
-	b	.L2730
-.L2733:
+	b	.L2737
+.L2740:
 	mov	w24, 1
-	b	.L2713
-.L2726:
+	b	.L2720
+.L2733:
 	ldr	x0, [x29, 120]
 	ldrh	w10, [x28, x0]
 	mov	w0, 65535
 	cmp	w10, w0
-	beq	.L2715
+	beq	.L2722
 	ldr	x0, [x29, 104]
 	cmp	w24, 3
 	ldrh	w19, [x0]
 	mul	w19, w19, w10
-	bne	.L2716
+	bne	.L2723
 	add	w19, w20, w19
 	orr	w19, w19, w22, lsl 24
-.L2717:
+.L2724:
 	str	w19, [x26, 40]
 	mov	w1, 1
 	str	w10, [x29, 100]
@@ -17102,22 +17167,22 @@ ftl_sblk_dump:
 	and	w0, w0, 224
 	cmp	w0, 224
 	ccmp	w0, w1, 4, ne
-	beq	.L2715
+	beq	.L2722
 	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L2720
+	bne	.L2727
 	ldr	x0, [x26, 24]
 	mov	w2, 0
 	add	x1, x29, 188
 	ldr	w0, [x0, 4]
 	bl	pm_log2phys
-.L2720:
+.L2727:
 	ldr	w0, [x29, 188]
 	cmp	w19, w0
-	bne	.L2721
+	bne	.L2728
 	ldr	w0, [x29, 172]
 	mov	w1, w19
 	add	w0, w0, 1
@@ -17128,75 +17193,75 @@ ftl_sblk_dump:
 	adrp	x0, .LC183
 	add	x0, x0, :lo12:.LC183
 	bl	printf
-.L2721:
+.L2728:
 	ldr	x0, [x29, 152]
-	cbz	x0, .L2723
+	cbz	x0, .L2730
 	ubfiz	x19, x27, 2, 32
 	ldr	w2, [x0, x19]
 	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	cmp	w0, w2
-	beq	.L2724
+	beq	.L2731
 	adrp	x0, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2724
+	tbz	x0, 12, .L2731
 	adrp	x0, .LC184
 	mov	w1, w27
 	add	x0, x0, :lo12:.LC184
 	bl	printf
-.L2724:
+.L2731:
 	ldr	x1, [x26, 24]
 	ldr	x0, [x29, 152]
 	ldr	w1, [x1, 4]
 	ldr	w0, [x0, x19]
 	cmp	w1, w0
-	beq	.L2723
+	beq	.L2730
 	cmn	w0, #1
-	beq	.L2723
+	beq	.L2730
 	adrp	x1, .LANCHOR196
 	adrp	x0, .LC0
-	mov	w2, 1175
+	mov	w2, 1193
 	add	x1, x1, :lo12:.LANCHOR196
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2723:
+.L2730:
 	add	w27, w27, 1
-.L2715:
+.L2722:
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L2728:
+.L2735:
 	cmp	w24, w22
-	bcs	.L2726
+	bcs	.L2733
 	add	w23, w23, 1
 	and	w23, w23, 65535
-.L2730:
+.L2737:
 	ldrb	w0, [x29, 201]
 	cmp	w0, w23
-	bls	.L2727
+	bls	.L2734
 	sxtw	x0, w23
 	mov	w22, 1
 	add	x0, x0, 8
 	lsl	x0, x0, 1
 	str	x0, [x29, 120]
-	b	.L2728
-.L2716:
+	b	.L2735
+.L2723:
 	cmp	w24, 2
-	bne	.L2718
+	bne	.L2725
 	ldr	w0, [x29, 148]
 	add	w19, w19, w0
 	adrp	x0, .LANCHOR67
 	add	w19, w19, w22
 	ldrb	w0, [x0, #:lo12:.LANCHOR67]
 	orr	w19, w19, w0, lsl 24
-	b	.L2717
-.L2718:
+	b	.L2724
+.L2725:
 	add	w19, w20, w19
-	b	.L2717
-.L2727:
+	b	.L2724
+.L2734:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2714
-.L2729:
+	b	.L2721
+.L2736:
 	mov	x0, x26
 	bl	buf_free
 	adrp	x0, .LANCHOR4
@@ -17209,7 +17274,7 @@ ftl_sblk_dump:
 	add	x0, x0, :lo12:.LC185
 	bl	printf
 	ldr	w0, [x29, 168]
-.L2711:
+.L2718:
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
 	ldp	x23, x24, [sp, 96]
@@ -17218,9 +17283,9 @@ ftl_sblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 272
 	ret
-.L2732:
+.L2739:
 	mov	w0, 0
-	b	.L2711
+	b	.L2718
 	.size	ftl_sblk_dump, .-ftl_sblk_dump
 	.section	.text.zftl_read,"ax",@progbits
 	.align	2
@@ -17240,31 +17305,31 @@ zftl_read:
 	stp	x25, x26, [sp, 64]
 	mov	x23, x3
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2744
+	tbz	x0, 12, .L2751
 	mov	w3, w2
 	adrp	x0, .LC186
 	mov	w2, w1
 	add	x0, x0, :lo12:.LC186
 	mov	w1, w21
 	bl	printf
-.L2744:
-	cbnz	w21, .L2745
+.L2751:
+	cbnz	w21, .L2752
 	adrp	x0, .LANCHOR59
 	mov	w21, 24576
 	ldr	w0, [x0, #:lo12:.LANCHOR59]
-.L2746:
+.L2753:
 	add	w1, w19, w24
 	cmp	w0, w1
-	bcc	.L2770
-	adrp	x1, .LANCHOR101
-	adrp	x25, .LANCHOR114
+	bcc	.L2777
+	adrp	x1, .LANCHOR97
+	adrp	x25, .LANCHOR117
 	add	w21, w21, w19
 	str	x1, [x29, 120]
-	ldr	x2, [x1, #:lo12:.LANCHOR101]
+	ldr	x2, [x1, #:lo12:.LANCHOR97]
 	ldr	w0, [x2, 24]
 	add	w0, w0, w24
 	str	w0, [x2, 24]
-	ldrb	w0, [x25, #:lo12:.LANCHOR114]
+	ldrb	w0, [x25, #:lo12:.LANCHOR117]
 	add	w2, w24, w21
 	stp	w2, wzr, [x29, 136]
 	sub	w2, w2, #1
@@ -17280,10 +17345,10 @@ zftl_read:
 	adrp	x0, .LANCHOR46
 	add	x0, x0, :lo12:.LANCHOR46
 	str	x0, [x29, 104]
-.L2748:
-	cbnz	w26, .L2768
+.L2755:
+	cbnz	w26, .L2775
 	ldr	w0, [x29, 140]
-.L2743:
+.L2750:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -17291,21 +17356,21 @@ zftl_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L2745:
+.L2752:
 	cmp	w21, 3
-	bhi	.L2770
+	bhi	.L2777
 	lsl	w21, w21, 13
 	mov	w0, 8192
-	b	.L2746
-.L2768:
-	ldrb	w1, [x25, #:lo12:.LANCHOR114]
+	b	.L2753
+.L2775:
+	ldrb	w1, [x25, #:lo12:.LANCHOR117]
 	cmp	w20, w27
 	ldr	w0, [x29, 132]
 	and	w19, w1, 65535
 	ccmp	w20, w0, 4, ne
-	bne	.L2771
+	bne	.L2778
 	cmp	w20, w27
-	bne	.L2750
+	bne	.L2757
 	udiv	w22, w21, w1
 	and	w0, w24, 65535
 	msub	w1, w22, w1, w21
@@ -17314,17 +17379,17 @@ zftl_read:
 	and	w19, w19, 65535
 	cmp	w24, w19
 	csel	w19, w0, w19, cc
-.L2749:
+.L2756:
 	adrp	x0, .LANCHOR46
 	add	x1, x0, :lo12:.LANCHOR46
 	add	x1, x1, 2
 	mov	w0, 0
-.L2753:
+.L2760:
 	ldr	w2, [x1, 34]
 	cmp	w20, w2
-	bne	.L2751
+	bne	.L2758
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L2751
+	tbz	x2, 3, .L2758
 	ldr	x1, [x29, 104]
 	ubfiz	x0, x0, 6, 32
 	lsl	w2, w19, 9
@@ -17336,92 +17401,92 @@ zftl_read:
 	add	x23, x23, x19
 	add	x1, x1, x22
 	bl	ftl_memcpy
-.L2752:
+.L2759:
 	add	w20, w20, 1
 	sub	w26, w26, #1
-	b	.L2748
-.L2750:
+	b	.L2755
+.L2757:
 	ldr	w0, [x29, 136]
 	msub	w19, w1, w20, w0
 	and	w19, w19, 255
-.L2771:
+.L2778:
 	mov	w22, 0
-	b	.L2749
-.L2751:
+	b	.L2756
+.L2758:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 32
-	bne	.L2753
+	bne	.L2760
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 156]
 	cmn	w0, #1
-	bne	.L2754
+	bne	.L2761
 	mov	w2, 0
 	add	x1, x29, 156
 	mov	w0, w20
 	bl	pm_log2phys
-.L2754:
+.L2761:
 	ldr	w0, [x29, 156]
 	cmn	w0, #1
-	bne	.L2755
-	add	x22, x25, :lo12:.LANCHOR114
+	bne	.L2762
+	add	x22, x25, :lo12:.LANCHOR117
 	mov	w19, 0
-.L2756:
+.L2763:
 	ldrb	w0, [x22]
 	cmp	w19, w0
-	bcs	.L2752
+	bcs	.L2759
 	madd	w0, w20, w0, w19
 	cmp	w21, w0
-	bhi	.L2757
+	bhi	.L2764
 	ldr	w1, [x29, 136]
 	cmp	w1, w0
-	bls	.L2757
+	bls	.L2764
 	mov	x0, x23
 	add	x23, x23, 512
 	mov	w2, 512
 	mov	w1, 0
 	bl	ftl_memset
-.L2757:
+.L2764:
 	add	w19, w19, 1
-	b	.L2756
-.L2755:
+	b	.L2763
+.L2762:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbnz	x0, .L2759
+	cbnz	x0, .L2766
 	bl	ftl_read_ahead
-	b	.L2748
-.L2759:
+	b	.L2755
+.L2766:
 	ldr	x0, [x29, 120]
-	ldr	x1, [x0, #:lo12:.LANCHOR101]
+	ldr	x1, [x0, #:lo12:.LANCHOR97]
 	ldr	w0, [x1, 40]
 	add	w0, w0, 1
 	str	w0, [x1, 40]
 	ldr	w0, [x29, 156]
 	stp	w0, w0, [x28, 40]
-	ldrb	w0, [x25, #:lo12:.LANCHOR114]
+	ldrb	w0, [x25, #:lo12:.LANCHOR117]
 	cmp	w0, w19
-	bne	.L2761
+	bne	.L2768
 	str	x23, [x28, 16]
-.L2761:
+.L2768:
 	mov	w1, 1
 	mov	x0, x28
 	bl	sblk_read_page
 	ldr	w10, [x28, 52]
 	cmn	w10, #1
-	bne	.L2762
+	bne	.L2769
 	adrp	x0, .LANCHOR5
 	str	w10, [x29, 140]
 	ldr	x1, [x0, #:lo12:.LANCHOR5]
 	ldr	w0, [x1, 552]
 	add	w0, w0, 1
 	str	w0, [x1, 552]
-.L2763:
+.L2770:
 	ldr	x0, [x28, 24]
 	ldr	w5, [x0, 4]
 	cmp	w20, w5
-	beq	.L2764
+	beq	.L2771
 	ldr	w4, [x0]
 	mov	w2, w20
 	ldp	w6, w7, [x0, 8]
@@ -17447,37 +17512,37 @@ zftl_read:
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
 	ldr	w10, [x29, 128]
-.L2764:
+.L2771:
 	ldr	x0, [x28, 24]
 	ldr	w0, [x0, 4]
 	cmp	w20, w0
-	bne	.L2765
+	bne	.L2772
 	cmn	w10, #1
-	bne	.L2766
-.L2765:
+	bne	.L2773
+.L2772:
 	ldr	x1, [x29, 112]
 	adrp	x0, .LC0
 	mov	w2, 1030
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2766:
+.L2773:
 	ldr	x0, [x28, 16]
-	cbnz	x0, .L2767
+	cbnz	x0, .L2774
 	ldr	x1, [x28, 8]
 	ubfiz	x22, x22, 9, 16
 	lsl	w2, w19, 9
 	mov	x0, x23
 	add	x1, x1, x22
 	bl	ftl_memcpy
-.L2767:
+.L2774:
 	ubfiz	x19, x19, 9, 16
 	mov	x0, x28
 	add	x23, x23, x19
 	bl	buf_free
-	b	.L2752
-.L2762:
+	b	.L2759
+.L2769:
 	cmp	w10, 256
-	bne	.L2763
+	bne	.L2770
 	adrp	x0, .LANCHOR96
 	mov	w4, 21
 	mov	w5, 1
@@ -17505,10 +17570,10 @@ zftl_read:
 	mov	w0, w4
 	bl	gc_add_sblk
 	ldr	w10, [x29, 96]
-	b	.L2763
-.L2770:
+	b	.L2770
+.L2777:
 	mov	w0, -1
-	b	.L2743
+	b	.L2750
 	.size	zftl_read, .-zftl_read
 	.section	.text.zftl_vendor_read,"ax",@progbits
 	.align	2
@@ -17625,10 +17690,10 @@ vpn_check:
 	mov	w1, 0
 	add	x0, x20, :lo12:check_vpc_tbl
 	bl	ftl_memset
-.L2787:
+.L2794:
 	ldr	w0, [x23]
 	cmp	w22, w0
-	bcc	.L2795
+	bcc	.L2802
 	adrp	x0, .LANCHOR2
 	adrp	x24, .LC193
 	add	x5, x0, :lo12:.LANCHOR2
@@ -17636,20 +17701,20 @@ vpn_check:
 	add	x24, x24, :lo12:.LC193
 	mov	w23, 0
 	mov	w22, 0
-.L2796:
+.L2803:
 	ldrh	w0, [x5]
 	cmp	w0, w22
-	bhi	.L2798
+	bhi	.L2805
 	adrp	x24, .LANCHOR198
 	adrp	x25, .LC0
 	add	x22, x28, :lo12:.LANCHOR2
 	add	x24, x24, :lo12:.LANCHOR198
 	add	x25, x25, :lo12:.LC0
 	mov	w21, 0
-.L2799:
+.L2806:
 	ldrh	w0, [x22]
 	cmp	w0, w21
-	bhi	.L2805
+	bhi	.L2812
 	mov	w2, w23
 	adrp	x1, .LANCHOR198
 	adrp	x0, .LC195
@@ -17663,20 +17728,20 @@ vpn_check:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2795:
+.L2802:
 	mov	w0, w22
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 124]
 	cmn	w0, #1
-	bne	.L2788
+	bne	.L2795
 	mov	w2, 0
 	add	x1, x29, 124
 	mov	w0, w22
 	bl	pm_log2phys
-.L2789:
+.L2796:
 	ldr	w2, [x29, 124]
 	cmn	w2, #1
-	beq	.L2791
+	beq	.L2798
 	adrp	x0, .LANCHOR96
 	mov	w3, 21
 	ldrh	w0, [x0, #:lo12:.LANCHOR96]
@@ -17693,26 +17758,26 @@ vpn_check:
 	and	w26, w3, 65535
 	and	w3, w3, 65535
 	cmp	w0, w26
-	bls	.L2792
+	bls	.L2799
 	add	x0, x20, :lo12:check_vpc_tbl
 	sxtw	x3, w3
 	ldrh	w1, [x0, x3, lsl 1]
 	add	w1, w1, 1
 	strh	w1, [x0, x3, lsl 1]
-.L2793:
+.L2800:
 	ldrh	w0, [x25]
 	cmp	w0, w26
-	bhi	.L2791
+	bhi	.L2798
 	adrp	x1, .LANCHOR198
 	adrp	x0, .LC0
 	mov	w2, 1266
 	add	x1, x1, :lo12:.LANCHOR198
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2791:
+.L2798:
 	add	w22, w22, 1
-	b	.L2787
-.L2788:
+	b	.L2794
+.L2795:
 	adrp	x1, .LANCHOR96
 	ldrh	w3, [x1, #:lo12:.LANCHOR96]
 	mov	w1, 21
@@ -17727,30 +17792,30 @@ vpn_check:
 	udiv	w0, w0, w1
 	ldrh	w1, [x24, #:lo12:.LANCHOR2]
 	cmp	w1, w0, uxth
-	bhi	.L2789
+	bhi	.L2796
 	mov	w2, 1256
 	adrp	x1, .LANCHOR198
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR198
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L2789
-.L2792:
+	b	.L2796
+.L2799:
 	mov	w1, w22
 	adrp	x0, .LC191
 	add	x0, x0, :lo12:.LC191
 	bl	printf
-	adrp	x0, .LANCHOR114
+	adrp	x0, .LANCHOR117
 	mov	w2, 4
-	ldrb	w3, [x0, #:lo12:.LANCHOR114]
-	adrp	x0, .LANCHOR120+8
-	ldr	x1, [x0, #:lo12:.LANCHOR120+8]
+	ldrb	w3, [x0, #:lo12:.LANCHOR117]
+	adrp	x0, .LANCHOR123+8
+	ldr	x1, [x0, #:lo12:.LANCHOR123+8]
 	adrp	x0, .LC192
 	lsl	w3, w3, 7
 	add	x0, x0, :lo12:.LC192
 	bl	rknand_print_hex
-	b	.L2793
-.L2798:
+	b	.L2800
+.L2805:
 	uxtw	x0, w22
 	ldr	x1, [x19, #:lo12:.LANCHOR4]
 	lsl	x27, x0, 1
@@ -17759,7 +17824,7 @@ vpn_check:
 	ldrh	w3, [x1, x27]
 	ldrh	w2, [x25, x26, lsl 1]
 	cmp	w3, w2
-	beq	.L2797
+	beq	.L2804
 	adrp	x1, .LANCHOR3
 	str	x5, [x29, 104]
 	ldr	x1, [x1, #:lo12:.LANCHOR3]
@@ -17774,62 +17839,62 @@ vpn_check:
 	ldr	x5, [x29, 104]
 	ldrh	w0, [x0, x27]
 	cmp	w0, w1
-	beq	.L2797
+	beq	.L2804
 	ldrh	w1, [x25, x26, lsl 1]
 	cmp	w1, w0
-	bls	.L2797
+	bls	.L2804
 	ldr	x0, [x21, #:lo12:.LANCHOR5]
 	ldrh	w1, [x0, 16]
 	cmp	w1, w22
-	beq	.L2797
+	beq	.L2804
 	ldrh	w1, [x0, 80]
 	cmp	w1, w22
-	beq	.L2797
+	beq	.L2804
 	ldrh	w0, [x0, 48]
 	cmp	w0, w22
 	csinc	w23, w23, wzr, eq
-.L2797:
+.L2804:
 	add	w0, w22, 1
 	and	w22, w0, 65535
-	b	.L2796
-.L2805:
+	b	.L2803
+.L2812:
 	adrp	x0, .LANCHOR3
 	uxtw	x26, w21
 	ldr	x0, [x0, #:lo12:.LANCHOR3]
 	add	x0, x0, x26, lsl 2
 	ldrb	w0, [x0, 2]
 	tst	w0, 224
-	bne	.L2801
+	bne	.L2808
 	add	x0, x20, :lo12:check_vpc_tbl
 	sxtw	x27, w21
 	ldrh	w0, [x0, x27, lsl 1]
-	cbnz	w0, .L2802
+	cbnz	w0, .L2809
 	ldr	x0, [x19, #:lo12:.LANCHOR4]
 	lsl	x28, x26, 1
 	ldrh	w0, [x0, x28]
-	cbz	w0, .L2803
+	cbz	w0, .L2810
 	adrp	x0, .LC194
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC194
 	bl	printf
-.L2803:
+.L2810:
 	ldr	x0, [x19, #:lo12:.LANCHOR4]
 	strh	wzr, [x0, x28]
-.L2802:
+.L2809:
 	ldr	x0, [x19, #:lo12:.LANCHOR4]
 	ldrh	w0, [x0, x26, lsl 1]
-	cbz	w0, .L2801
+	cbz	w0, .L2808
 	add	x0, x20, :lo12:check_vpc_tbl
 	ldrh	w0, [x0, x27, lsl 1]
-	cbz	w0, .L2801
+	cbz	w0, .L2808
 	mov	w2, 1298
 	mov	x1, x24
 	mov	x0, x25
 	bl	printf
-.L2801:
+.L2808:
 	add	w21, w21, 1
 	and	w21, w21, 65535
-	b	.L2799
+	b	.L2806
 	.size	vpn_check, .-vpn_check
 	.section	.text.gc_scan_src_blk,"ax",@progbits
 	.align	2
@@ -17846,21 +17911,21 @@ gc_scan_src_blk:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w1, w0
-	bne	.L2817
+	bne	.L2824
 	adrp	x1, .LANCHOR199
 	adrp	x0, .LC0
 	mov	w2, 897
 	add	x1, x1, :lo12:.LANCHOR199
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2817:
+.L2824:
 	ldrh	w1, [x19, #:lo12:.LANCHOR63]
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L2839
+	beq	.L2846
 	adrp	x0, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L2819
+	tbz	x0, 8, .L2826
 	adrp	x2, .LANCHOR4
 	ubfiz	x0, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR4]
@@ -17868,20 +17933,20 @@ gc_scan_src_blk:
 	adrp	x0, .LC196
 	add	x0, x0, :lo12:.LC196
 	bl	printf
-.L2819:
+.L2826:
 	ldrh	w0, [x19, #:lo12:.LANCHOR63]
 	add	x14, x19, :lo12:.LANCHOR63
 	add	x1, x14, 40
 	bl	ftl_get_blk_list_in_sblk
 	and	w1, w0, 255
 	strb	w1, [x14, 5]
-	cbnz	w1, .L2820
+	cbnz	w1, .L2827
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR63]
-.L2839:
+.L2846:
 	mov	w0, 0
-	b	.L2816
-.L2820:
+	b	.L2823
+.L2827:
 	adrp	x4, .LANCHOR3
 	ldrh	w3, [x19, #:lo12:.LANCHOR63]
 	mov	x22, x4
@@ -17891,64 +17956,64 @@ gc_scan_src_blk:
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 32
-	beq	.L2821
+	beq	.L2828
 	cmp	w1, 224
-	beq	.L2821
-	cbz	w1, .L2822
+	beq	.L2828
+	cbz	w1, .L2829
 	adrp	x1, .LANCHOR5
 	ldr	x1, [x1, #:lo12:.LANCHOR5]
 	ldrh	w3, [x1, 16]
 	cmp	w3, w2
-	beq	.L2821
+	beq	.L2828
 	ldrh	w3, [x1, 48]
 	cmp	w3, w2
-	beq	.L2821
+	beq	.L2828
 	ldrh	w1, [x1, 80]
 	cmp	w1, w2
-	bne	.L2853
-.L2821:
+	bne	.L2860
+.L2828:
 	add	x0, x19, :lo12:.LANCHOR63
 	mov	w1, -1
 	strh	w1, [x19, #:lo12:.LANCHOR63]
 	strh	wzr, [x0, 24]
-	b	.L2839
-.L2822:
+	b	.L2846
+.L2829:
 	adrp	x0, .LANCHOR4
 	mov	x20, x0
 	ldr	x1, [x0, #:lo12:.LANCHOR4]
 	ldrh	w1, [x1, x3, lsl 1]
-	cbz	w1, .L2824
+	cbz	w1, .L2831
 	adrp	x1, .LANCHOR199
 	adrp	x0, .LC0
 	mov	w2, 917
 	add	x1, x1, :lo12:.LANCHOR199
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2824:
+.L2831:
 	ldrh	w1, [x19, #:lo12:.LANCHOR63]
 	ldr	x0, [x20, #:lo12:.LANCHOR4]
 	strh	wzr, [x0, x1, lsl 1]
-	b	.L2821
-.L2853:
+	b	.L2828
+.L2860:
 	and	w0, w0, 255
 	sub	w0, w0, #1
 	add	x0, x14, x0, sxtw 1
 	ldrh	w21, [x0, 40]
 	mov	w0, 65535
 	cmp	w21, w0
-	bne	.L2825
+	bne	.L2832
 	adrp	x1, .LANCHOR199
 	adrp	x0, .LC0
 	mov	w2, 925
 	add	x1, x1, :lo12:.LANCHOR199
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2825:
-	adrp	x1, .LANCHOR99
+.L2832:
+	adrp	x1, .LANCHOR103
 	ldr	x3, [x22, #:lo12:.LANCHOR3]
 	adrp	x2, .LANCHOR80
 	adrp	x23, .LANCHOR71
-	ldrh	w20, [x1, #:lo12:.LANCHOR99]
+	ldrh	w20, [x1, #:lo12:.LANCHOR103]
 	mov	x24, x2
 	ldrh	w1, [x19, #:lo12:.LANCHOR63]
 	ldrh	w0, [x2, #:lo12:.LANCHOR80]
@@ -17959,14 +18024,14 @@ gc_scan_src_blk:
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 160
-	bne	.L2840
+	bne	.L2847
 	adrp	x1, .LANCHOR67
 	ldrb	w21, [x1, #:lo12:.LANCHOR67]
 	cmp	w21, 2
 	orr	w20, w20, w21, lsl 24
-	beq	.L2827
+	beq	.L2834
 	and	w21, w21, 65535
-.L2826:
+.L2833:
 	add	x22, x19, :lo12:.LANCHOR63
 	orr	w20, w0, w20
 	mov	w0, 1
@@ -17992,48 +18057,48 @@ gc_scan_src_blk:
 	ldr	w0, [x25, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L2828
-.L2830:
+	bne	.L2835
+.L2837:
 	mov	x0, x25
 	bl	buf_free
 	mov	w0, -1
-.L2816:
+.L2823:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2827:
+.L2834:
 	ldrh	w0, [x23, #:lo12:.LANCHOR71]
 	sub	w0, w0, #1
 	and	w0, w0, 65535
-	b	.L2826
-.L2840:
+	b	.L2833
+.L2847:
 	mov	w21, 1
-	b	.L2826
-.L2828:
+	b	.L2833
+.L2835:
 	ldr	x0, [x25, 24]
 	mov	w22, 15555
 	movk	w22, 0xf55f, lsl 16
 	ldr	w0, [x0]
 	cmp	w0, w22
-	beq	.L2829
+	beq	.L2836
 	ldrh	w0, [x19, #:lo12:.LANCHOR63]
 	mov	x1, 0
 	bl	ftl_sblk_dump
 	ldr	x0, [x25, 24]
 	ldr	w0, [x0]
 	cmp	w0, w22
-	beq	.L2830
+	beq	.L2837
 	mov	w2, 955
 	adrp	x1, .LANCHOR199
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR199
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L2830
-.L2829:
+	b	.L2837
+.L2836:
 	ldrb	w0, [x23, #:lo12:.LANCHOR72]
 	adrp	x22, .LANCHOR96
 	ldrh	w1, [x24, #:lo12:.LANCHOR80]
@@ -18045,9 +18110,9 @@ gc_scan_src_blk:
 	mul	w0, w0, w1
 	mul	w21, w21, w0
 	and	w21, w21, 65535
-.L2831:
+.L2838:
 	cmp	w21, w26
-	bgt	.L2836
+	bgt	.L2843
 	mov	x0, x25
 	bl	buf_free
 	ldrh	w1, [x19, #:lo12:.LANCHOR63]
@@ -18058,20 +18123,20 @@ gc_scan_src_blk:
 	ldrh	w2, [x3, x2]
 	ldrh	w3, [x0, 24]
 	cmp	w2, w3
-	beq	.L2837
+	beq	.L2844
 	adrp	x0, .LC197
 	add	x0, x0, :lo12:.LC197
 	bl	printf
-.L2837:
+.L2844:
 	ldrh	w2, [x19, #:lo12:.LANCHOR63]
 	add	x0, x19, :lo12:.LANCHOR63
 	ldr	x1, [x20, #:lo12:.LANCHOR4]
 	ldrh	w0, [x0, 24]
 	ldrh	w1, [x1, x2, lsl 1]
 	cmp	w1, w0
-	bcs	.L2838
+	bcs	.L2845
 	bl	vpn_check
-.L2838:
+.L2845:
 	add	x0, x19, :lo12:.LANCHOR63
 	ldrh	w2, [x19, #:lo12:.LANCHOR63]
 	ldr	x1, [x20, #:lo12:.LANCHOR4]
@@ -18079,20 +18144,20 @@ gc_scan_src_blk:
 	strh	w3, [x1, x2, lsl 1]
 	strh	wzr, [x0, 28]
 	ldrh	w0, [x0, 24]
-	b	.L2816
-.L2836:
+	b	.L2823
+.L2843:
 	ldr	w0, [x24, x26, lsl 2]
 	cmn	w0, #1
-	beq	.L2833
+	beq	.L2840
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 92]
 	cmn	w0, #1
-	bne	.L2834
+	bne	.L2841
 	ldr	w0, [x24, x26, lsl 2]
 	mov	w2, 0
 	add	x1, x29, 92
 	bl	pm_log2phys
-.L2834:
+.L2841:
 	ldrh	w1, [x22]
 	mov	w0, 21
 	ldr	w3, [x29, 92]
@@ -18107,16 +18172,16 @@ gc_scan_src_blk:
 	udiv	w0, w0, w1
 	add	x1, x19, :lo12:.LANCHOR63
 	cmp	w0, w2
-	bne	.L2833
+	bne	.L2840
 	ldrh	w0, [x1, 24]
 	ldr	x4, [x20, #:lo12:.LANCHOR64]
 	ubfiz	x2, x0, 2, 16
 	add	w0, w0, 1
 	str	w3, [x4, x2]
 	strh	w0, [x1, 24]
-.L2833:
+.L2840:
 	add	x26, x26, 1
-	b	.L2831
+	b	.L2838
 	.size	gc_scan_src_blk, .-gc_scan_src_blk
 	.section	.text.ftl_scan_all_data,"ax",@progbits
 	.align	2
@@ -18144,10 +18209,10 @@ ftl_scan_all_data:
 	bl	printf
 	add	x0, x24, :lo12:.LC200
 	str	x0, [x29, 120]
-.L2856:
+.L2863:
 	ldr	w0, [x23, #:lo12:.LANCHOR54]
 	cmp	w20, w0
-	bcc	.L2869
+	bcc	.L2876
 	mov	x0, x19
 	bl	buf_free
 	ldp	x29, x30, [sp, 16]
@@ -18158,35 +18223,35 @@ ftl_scan_all_data:
 	ldp	x27, x28, [sp, 96]
 	add	sp, sp, 160
 	ret
-.L2869:
+.L2876:
 	mov	w0, -1
 	str	w0, [x19, 36]
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 140]
 	cmn	w0, #1
-	bne	.L2857
+	bne	.L2864
 	mov	w2, 0
 	add	x1, x29, 140
 	mov	w0, w20
 	bl	pm_log2phys
-.L2857:
+.L2864:
 	tst	x20, 4095
-	bne	.L2858
+	bne	.L2865
 	ldr	w2, [x29, 140]
 	adrp	x0, .LC199
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC199
 	bl	printf
-.L2858:
+.L2865:
 	ldr	w0, [x29, 140]
 	stp	w0, w0, [x19, 40]
 	cmn	w0, #1
-	bne	.L2859
-.L2861:
+	bne	.L2866
+.L2868:
 	add	w20, w20, 1
-	b	.L2856
-.L2859:
+	b	.L2863
+.L2866:
 	mov	w1, 1
 	mov	x0, x19
 	bl	sblk_read_page
@@ -18194,16 +18259,16 @@ ftl_scan_all_data:
 	ldr	x0, [x19, 24]
 	cmp	w3, 256
 	ccmn	w3, #1, 4, ne
-	beq	.L2860
+	beq	.L2867
 	ldr	w1, [x0, 4]
 	cmp	w20, w1
-	beq	.L2861
-.L2860:
+	beq	.L2868
+.L2867:
 	ldr	x1, [x19, 8]
 	add	x27, x24, :lo12:.LC200
-	adrp	x25, .LANCHOR114
+	adrp	x25, .LANCHOR117
 	adrp	x26, .LC201
-	adrp	x22, .LANCHOR120
+	adrp	x22, .LANCHOR123
 	ldr	w2, [x1, 4]
 	str	w2, [sp, 8]
 	ldr	w1, [x1]
@@ -18217,12 +18282,12 @@ ftl_scan_all_data:
 	ldr	x1, [x19, 24]
 	ldr	w0, [x1, 8]
 	cmn	w0, #1
-	bne	.L2862
-.L2864:
-	ldrb	w21, [x25, #:lo12:.LANCHOR114]
+	bne	.L2869
+.L2871:
+	ldrb	w21, [x25, #:lo12:.LANCHOR117]
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
-	add	x22, x22, :lo12:.LANCHOR120
+	add	x22, x22, :lo12:.LANCHOR123
 	mov	w4, w0
 	add	x0, x26, :lo12:.LC201
 	lsl	w27, w21, 7
@@ -18243,26 +18308,26 @@ ftl_scan_all_data:
 	add	x1, x29, 140
 	mov	w0, w20
 	bl	pm_log2phys
-.L2863:
+.L2870:
 	ldr	x1, [x21]
-	cbz	x1, .L2868
+	cbz	x1, .L2875
 	ldrh	w0, [x21, -8]
 	cmp	w0, w25
-	bne	.L2868
+	bne	.L2875
 	mov	w3, 4096
 	mov	w2, 4
 	mov	x0, x26
 	bl	rknand_print_hex
-.L2868:
+.L2875:
 	add	x21, x21, 16
 	cmp	x22, x21
-	bne	.L2863
-	b	.L2861
-.L2862:
+	bne	.L2870
+	b	.L2868
+.L2869:
 	ldr	w21, [x1, 4]
 	ldr	w1, [x28]
 	cmp	w21, w1
-	bcs	.L2864
+	bcs	.L2871
 	str	w0, [x19, 40]
 	mov	w1, 1
 	mov	x0, x19
@@ -18284,12 +18349,12 @@ ftl_scan_all_data:
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 140]
 	cmn	w0, #1
-	bne	.L2865
+	bne	.L2872
 	mov	w2, 0
 	add	x1, x29, 140
 	mov	w0, w21
 	bl	pm_log2phys
-.L2865:
+.L2872:
 	ldr	w0, [x29, 140]
 	mov	w1, 1
 	str	w0, [x19, 40]
@@ -18308,7 +18373,7 @@ ftl_scan_all_data:
 	ldr	w3, [x19, 52]
 	ldr	x0, [x29, 120]
 	bl	printf
-	ldrb	w3, [x25, #:lo12:.LANCHOR114]
+	ldrb	w3, [x25, #:lo12:.LANCHOR117]
 	mov	w0, w21
 	str	w3, [x29, 104]
 	lsl	w2, w3, 7
@@ -18331,28 +18396,28 @@ ftl_scan_all_data:
 	mov	w2, 0
 	add	x1, x29, 140
 	bl	pm_log2phys
-	add	x0, x22, :lo12:.LANCHOR120
+	add	x0, x22, :lo12:.LANCHOR123
 	adrp	x5, .LC202
 	add	x21, x0, 8
 	add	x4, x0, 520
 	add	x5, x5, :lo12:.LC202
-.L2867:
+.L2874:
 	ldr	x1, [x21]
-	cbz	x1, .L2866
+	cbz	x1, .L2873
 	ldrh	w0, [x21, -8]
 	cmp	w0, w27
-	bne	.L2866
+	bne	.L2873
 	mov	x0, x5
 	stp	x4, x5, [x29, 104]
 	mov	w3, 4096
 	mov	w2, 4
 	bl	rknand_print_hex
 	ldp	x4, x5, [x29, 104]
-.L2866:
+.L2873:
 	add	x21, x21, 16
 	cmp	x4, x21
-	bne	.L2867
-	b	.L2864
+	bne	.L2874
+	b	.L2871
 	.size	ftl_scan_all_data, .-ftl_scan_all_data
 	.section	.text.ftl_update_l2p_map,"ax",@progbits
 	.align	2
@@ -18363,42 +18428,42 @@ ftl_update_l2p_map:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	mov	x22, x0
-	stp	x23, x24, [sp, 48]
-	adrp	x0, .LANCHOR80
 	stp	x19, x20, [sp, 16]
-	adrp	x24, .LANCHOR106
+	adrp	x0, .LANCHOR80
+	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	ldrh	w23, [x0, #:lo12:.LANCHOR80]
 	ldrb	w0, [x22, 9]
 	ldrh	w19, [x22, 12]
-	str	x24, [x29, 104]
 	mul	w23, w23, w0
-	ldr	x0, [x24, #:lo12:.LANCHOR106]
-	add	x19, x0, x19, lsl 2
-	add	x0, x19, x23, sxtw 2
-	ldr	w0, [x0, -4]
-	cmn	w0, #1
-	beq	.L2880
+	adrp	x0, .LANCHOR109
+	str	x0, [x29, 104]
+	ldr	x1, [x0, #:lo12:.LANCHOR109]
+	add	x19, x1, x19, lsl 2
+	add	x1, x19, x23, sxtw 2
+	ldr	w1, [x1, -4]
+	cmn	w1, #1
+	beq	.L2887
 	adrp	x1, .LANCHOR200
 	adrp	x0, .LC0
-	mov	w2, 1450
+	mov	w2, 1468
 	add	x1, x1, :lo12:.LANCHOR200
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2880:
-	adrp	x27, .LANCHOR114
-	mov	x28, 0
-	add	x0, x27, :lo12:.LANCHOR114
+.L2887:
+	adrp	x27, .LANCHOR117
+	mov	x24, 0
+	add	x0, x27, :lo12:.LANCHOR117
 	mov	w21, 0
 	str	x0, [x29, 96]
-.L2881:
-	cmp	w28, w23
-	blt	.L2888
+.L2888:
+	cmp	w24, w23
+	blt	.L2894
 	adrp	x0, .LANCHOR7
 	adrp	x19, .LANCHOR4
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2889
+	tbz	x0, 12, .L2895
 	ldrh	w1, [x22]
 	ldr	x2, [x19, #:lo12:.LANCHOR4]
 	ubfiz	x0, x1, 1, 16
@@ -18407,7 +18472,7 @@ ftl_update_l2p_map:
 	mov	w2, w21
 	add	x0, x0, :lo12:.LC207
 	bl	printf
-.L2889:
+.L2895:
 	ldrh	w1, [x22]
 	ldr	x0, [x19, #:lo12:.LANCHOR4]
 	ldp	x23, x24, [sp, 48]
@@ -18418,75 +18483,73 @@ ftl_update_l2p_map:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2888:
-	ldr	w2, [x19, x28, lsl 2]
+.L2894:
+	ldr	w2, [x19, x24, lsl 2]
 	cmn	w2, #1
-	beq	.L2882
-	ldrb	w20, [x27, #:lo12:.LANCHOR114]
+	beq	.L2889
+	ldrb	w20, [x27, #:lo12:.LANCHOR117]
 	adrp	x0, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
 	lsl	w20, w20, 7
 	udiv	w20, w2, w20
 	and	w20, w20, 65535
-	tbz	x0, 12, .L2883
+	tbz	x0, 12, .L2890
 	adrp	x0, .LC204
-	mov	w3, w28
+	mov	w3, w24
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC204
 	bl	printf
-.L2883:
-	adrp	x25, .LANCHOR99
+.L2890:
+	adrp	x25, .LANCHOR103
 	adrp	x26, .LC205
-	mov	x24, x28
-	add	x25, x25, :lo12:.LANCHOR99
+	mov	x28, x24
+	add	x25, x25, :lo12:.LANCHOR103
 	add	x26, x26, :lo12:.LC205
-.L2887:
-	ldr	w1, [x19, x24, lsl 2]
+.L2893:
+	ldr	w1, [x19, x28, lsl 2]
 	cmn	w1, #1
-	beq	.L2884
+	beq	.L2891
 	ldr	x0, [x29, 96]
 	ldrb	w2, [x0]
 	lsl	w2, w2, 7
 	udiv	w1, w1, w2
 	cmp	w20, w1, uxth
-	bne	.L2884
+	bne	.L2891
 	ldrb	w0, [x22, 9]
-	sdiv	w1, w24, w0
-	msub	w0, w1, w0, w24
+	sdiv	w1, w28, w0
+	msub	w0, w1, w0, w28
 	add	x0, x22, x0, sxtw 1
 	ldrh	w2, [x0, 16]
 	ldrh	w0, [x25]
 	madd	w2, w2, w0, w1
 	mov	x0, x26
 	str	w2, [x29, 124]
-	ldr	w1, [x19, x24, lsl 2]
+	ldr	w1, [x19, x28, lsl 2]
 	bl	pm_ppa_update_check
-	cbz	w0, .L2885
+	cbz	w0, .L2892
 	ldr	x0, [x29, 104]
 	mov	w3, w23
 	mov	w2, 4
-	ldr	x1, [x0, #:lo12:.LANCHOR106]
+	ldr	x1, [x0, #:lo12:.LANCHOR109]
 	adrp	x0, .LC206
 	add	x0, x0, :lo12:.LC206
 	bl	rknand_print_hex
-.L2886:
-	b	.L2886
-.L2885:
-	ldr	w0, [x19, x24, lsl 2]
+.L2892:
+	ldr	w0, [x19, x28, lsl 2]
 	add	w21, w21, 1
 	mov	w2, 1
 	add	x1, x29, 124
 	and	w21, w21, 65535
 	bl	pm_log2phys
 	mov	w0, -1
-	str	w0, [x19, x24, lsl 2]
-.L2884:
-	add	x24, x24, 1
-	cmp	w23, w24
-	bgt	.L2887
-.L2882:
+	str	w0, [x19, x28, lsl 2]
+.L2891:
 	add	x28, x28, 1
-	b	.L2881
+	cmp	w23, w28
+	bgt	.L2893
+.L2889:
+	add	x24, x24, 1
+	b	.L2888
 	.size	ftl_update_l2p_map, .-ftl_update_l2p_map
 	.section	.text.ftl_alloc_new_data_sblk,"ax",@progbits
 	.align	2
@@ -18502,9 +18565,9 @@ ftl_alloc_new_data_sblk:
 	ldrh	w0, [x19]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L2908
+	beq	.L2917
 	bl	zftl_insert_data_list
-.L2908:
+.L2917:
 	adrp	x0, .LANCHOR5
 	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	add	x0, x0, 16
@@ -18536,10 +18599,10 @@ ftl_write_commit:
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	stp	x27, x28, [sp, 80]
-.L2913:
+.L2922:
 	adrp	x3, .LANCHOR53
 	ldrb	w1, [x3, #:lo12:.LANCHOR53]
-	cbz	w1, .L2915
+	cbz	w1, .L2924
 	adrp	x4, .LANCHOR52
 	adrp	x2, .LANCHOR46
 	add	x2, x2, :lo12:.LANCHOR46
@@ -18558,11 +18621,11 @@ ftl_write_commit:
 	ldr	w22, [x0, 36]
 	strb	w5, [x4, #:lo12:.LANCHOR52]
 	cmp	w22, w1
-	bcc	.L2917
+	bcc	.L2926
 	ldr	x0, [x29, 120]
 	bl	buf_free
 	mov	w0, -1
-.L2912:
+.L2921:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -18570,25 +18633,25 @@ ftl_write_commit:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L2917:
+.L2926:
 	ldrb	w21, [x0, 57]
 	ldrb	w20, [x0, 56]
 	ldr	x24, [x0, 8]
 	ldr	x28, [x0, 24]
-	adrp	x0, .LANCHOR112
+	adrp	x0, .LANCHOR115
 	str	x0, [x29, 112]
-	ldrb	w1, [x0, #:lo12:.LANCHOR112]
-	cbz	w1, .L2919
-	adrp	x0, .LANCHOR160
-	ldrb	w1, [x0, #:lo12:.LANCHOR160]
+	ldrb	w1, [x0, #:lo12:.LANCHOR115]
+	cbz	w1, .L2928
+	adrp	x0, .LANCHOR163
+	ldrb	w1, [x0, #:lo12:.LANCHOR163]
 	add	x1, x2, x1, lsl 6
-.L2920:
+.L2929:
 	ldrb	w0, [x1]
 	cmp	w0, 255
-	bne	.L2921
+	bne	.L2930
 	ldr	w0, [x1, 36]
 	cmp	w22, w0
-	bne	.L2919
+	bne	.L2928
 	ldr	x0, [x1, 8]
 	ubfiz	x21, x21, 9, 8
 	lsl	w2, w20, 9
@@ -18597,33 +18660,33 @@ ftl_write_commit:
 	bl	ftl_memcpy
 	ldr	x0, [x29, 120]
 	bl	buf_free
-	b	.L2913
-.L2921:
+	b	.L2922
+.L2930:
 	ubfiz	x1, x0, 6, 8
 	add	x1, x26, x1
-	b	.L2920
-.L2919:
+	b	.L2929
+.L2928:
 	mov	w0, w22
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 140]
 	cmn	w0, #1
-	bne	.L2923
+	bne	.L2932
 	mov	w2, 0
 	add	x1, x29, 140
 	mov	w0, w22
 	bl	pm_log2phys
-.L2923:
+.L2932:
 	adrp	x25, .LANCHOR5
 	add	x1, x26, 2
 	mov	w0, 0
 	ldr	x19, [x25, #:lo12:.LANCHOR5]
 	add	x19, x19, 16
-.L2926:
+.L2935:
 	ldr	w2, [x1, 34]
 	cmp	w22, w2
-	bne	.L2924
+	bne	.L2933
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L2924
+	tbz	x2, 3, .L2933
 	ubfiz	x0, x0, 6, 32
 	and	w2, w2, -9
 	add	x0, x26, x0
@@ -18631,50 +18694,50 @@ ftl_write_commit:
 	ldr	x23, [x0, 8]
 	ldr	w0, [x0, 40]
 	str	w0, [x29, 140]
-.L2925:
-	adrp	x0, .LANCHOR114
+.L2934:
+	adrp	x0, .LANCHOR117
 	str	x0, [x29, 96]
-	ldrb	w1, [x0, #:lo12:.LANCHOR114]
+	ldrb	w1, [x0, #:lo12:.LANCHOR117]
 	cmp	w20, w1
-	bcs	.L2950
+	bcs	.L2959
 	add	w20, w21, w20
-	cbz	x23, .L2928
-	cbz	w21, .L2929
+	cbz	x23, .L2937
+	cbz	w21, .L2938
 	lsl	w2, w21, 9
 	mov	x1, x23
 	mov	x0, x24
 	bl	ftl_memcpy
 	ldr	x19, [x25, #:lo12:.LANCHOR5]
 	add	x19, x19, 48
-.L2929:
+.L2938:
 	ldr	x0, [x29, 96]
-	ldrb	w2, [x0, #:lo12:.LANCHOR114]
+	ldrb	w2, [x0, #:lo12:.LANCHOR117]
 	cmp	w20, w2
-	bcc	.L2930
+	bcc	.L2939
 	ldr	x19, [x25, #:lo12:.LANCHOR5]
 	add	x19, x19, 16
-.L2950:
+.L2959:
 	mov	w23, 0
-	b	.L2927
-.L2924:
+	b	.L2936
+.L2933:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 32
-	bne	.L2926
+	bne	.L2935
 	mov	x23, 0
-	b	.L2925
-.L2930:
+	b	.L2934
+.L2939:
 	ubfiz	x0, x20, 9, 9
 	sub	w2, w2, w20
 	add	x1, x23, x0
 	lsl	w2, w2, 9
 	add	x0, x24, x0
 	bl	ftl_memcpy
-	b	.L2950
-.L2928:
+	b	.L2959
+.L2937:
 	ldr	w0, [x29, 140]
 	cmn	w0, #1
-	beq	.L2931
+	beq	.L2940
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 140]
@@ -18687,11 +18750,11 @@ ftl_write_commit:
 	ldr	w0, [x0, 4]
 	add	w23, w23, 1
 	cmp	w22, w0
-	bne	.L2932
+	bne	.L2941
 	ldr	w0, [x27, 52]
 	cmn	w0, #1
-	bne	.L2933
-.L2932:
+	bne	.L2942
+.L2941:
 	ldrb	w1, [x27, 1]
 	mov	w3, w22
 	ldr	w4, [x27, 52]
@@ -18720,43 +18783,43 @@ ftl_write_commit:
 	mov	x1, 0
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
-.L2933:
+.L2942:
 	ldr	x0, [x27, 24]
 	ldr	w0, [x0, 4]
 	cmp	w22, w0
-	bne	.L2934
+	bne	.L2943
 	ldr	w0, [x27, 52]
 	cmn	w0, #1
-	bne	.L2935
-.L2934:
+	bne	.L2944
+.L2943:
 	adrp	x1, .LANCHOR201
 	adrp	x0, .LC0
 	mov	w2, 544
 	add	x1, x1, :lo12:.LANCHOR201
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2935:
-	cbz	w21, .L2936
+.L2944:
+	cbz	w21, .L2945
 	ldr	w0, [x29, 140]
 	lsl	w2, w21, 9
 	cmn	w0, #1
-	beq	.L2937
+	beq	.L2946
 	ldr	x1, [x27, 8]
 	mov	x0, x24
 	bl	ftl_memcpy
-.L2938:
+.L2947:
 	ldr	x19, [x25, #:lo12:.LANCHOR5]
 	add	x19, x19, 48
-.L2936:
+.L2945:
 	ldr	x0, [x29, 96]
-	ldrb	w2, [x0, #:lo12:.LANCHOR114]
+	ldrb	w2, [x0, #:lo12:.LANCHOR117]
 	cmp	w20, w2
-	bcc	.L2939
-	bls	.L2940
+	bcc	.L2948
+	bls	.L2949
 	ldr	x19, [x25, #:lo12:.LANCHOR5]
 	add	x19, x19, 16
-.L2940:
-	cbz	x27, .L2927
+.L2949:
+	cbz	x27, .L2936
 	ldrb	w0, [x27, 2]
 	mov	x1, x27
 	and	w0, w0, -9
@@ -18766,17 +18829,17 @@ ftl_write_commit:
 	bl	buf_remove_buf
 	mov	x0, x27
 	bl	buf_free
-.L2927:
+.L2936:
 	ldrh	w0, [x19, 6]
-	cbnz	w0, .L2942
+	cbnz	w0, .L2951
 	bl	ftl_flush
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L2942:
+.L2951:
 	mov	x0, x19
 	bl	ftl_get_new_free_page
 	ldr	x1, [x29, 104]
-	adrp	x20, .LANCHOR160
+	adrp	x20, .LANCHOR163
 	lsl	x2, x1, 6
 	add	x1, x26, x2
 	ldr	w3, [x1, 32]
@@ -18797,94 +18860,94 @@ ftl_write_commit:
 	sub	w0, w0, #1
 	strh	w0, [x1, 48]
 	ldr	x1, [x29, 120]
-	add	x0, x20, :lo12:.LANCHOR160
+	add	x0, x20, :lo12:.LANCHOR163
 	bl	buf_add_tail
 	ldr	x0, [x29, 112]
-	ldrb	w2, [x0, #:lo12:.LANCHOR112]
+	ldrb	w2, [x0, #:lo12:.LANCHOR115]
 	add	w2, w2, 1
 	and	w2, w2, 255
-	strb	w2, [x0, #:lo12:.LANCHOR112]
+	strb	w2, [x0, #:lo12:.LANCHOR115]
 	adrp	x0, .LANCHOR202
 	cmp	w2, 2
 	str	wzr, [x0, #:lo12:.LANCHOR202]
 	ldrh	w0, [x19, 6]
-	bhi	.L2943
+	bhi	.L2952
 	cmp	w0, 1
-	bne	.L2916
-.L2943:
+	bne	.L2925
+.L2952:
 	ldrb	w1, [x19, 5]
 	cmp	w1, 0
 	mov	w1, 0
 	cset	w4, ne
 	cmp	w0, 1
-	ldrb	w0, [x20, #:lo12:.LANCHOR160]
+	ldrb	w0, [x20, #:lo12:.LANCHOR163]
 	csinc	w4, w2, w4, eq
 	mov	w3, w0
-.L2947:
+.L2956:
 	cmp	w1, w4
-	bne	.L2948
-	strb	w3, [x20, #:lo12:.LANCHOR160]
+	bne	.L2957
+	strb	w3, [x20, #:lo12:.LANCHOR163]
 	and	w1, w1, 255
 	ldr	x3, [x29, 112]
 	sub	w2, w2, w1
 	ubfiz	x0, x0, 6, 8
 	add	x0, x26, x0
-	strb	w2, [x3, #:lo12:.LANCHOR112]
+	strb	w2, [x3, #:lo12:.LANCHOR115]
 	bl	sblk_prog_page
 	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bne	.L2916
+	bne	.L2925
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	mov	x0, x19
 	bl	ftl_write_last_log_page
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L2916:
+.L2925:
 	adrp	x0, .LANCHOR53
 	ldrb	w0, [x0, #:lo12:.LANCHOR53]
-	cbnz	w0, .L2913
-.L2915:
+	cbnz	w0, .L2922
+.L2924:
 	bl	ftl_write_completed
 	mov	w0, 0
-	b	.L2912
-.L2939:
+	b	.L2921
+.L2948:
 	ldr	w0, [x29, 140]
 	sub	w2, w2, w20
 	lsl	w2, w2, 9
 	cmn	w0, #1
 	ubfiz	x0, x20, 7, 9
-	beq	.L2941
+	beq	.L2950
 	ldr	x1, [x27, 8]
 	lsl	x0, x0, 2
 	add	x1, x1, x0
 	add	x0, x24, x0
 	bl	ftl_memcpy
-	b	.L2940
-.L2941:
+	b	.L2949
+.L2950:
 	mov	w1, 0
 	add	x0, x24, x0, lsl 2
 	bl	ftl_memset
-	b	.L2940
-.L2948:
+	b	.L2949
+.L2957:
 	ubfiz	x3, x3, 6, 8
 	add	w1, w1, 1
 	ldrb	w3, [x26, x3]
-	b	.L2947
-.L2949:
+	b	.L2956
+.L2958:
 	lsl	w2, w21, 9
 	mov	x27, 0
 	mov	w23, 0
-.L2937:
+.L2946:
 	mov	w1, 0
 	mov	x0, x24
 	bl	ftl_memset
-	b	.L2938
-.L2931:
-	cbnz	w21, .L2949
+	b	.L2947
+.L2940:
+	cbnz	w21, .L2958
 	mov	w23, 0
 	mov	x27, 0
-	b	.L2936
+	b	.L2945
 	.size	ftl_write_commit, .-ftl_write_commit
 	.section	.text.gc_do_copy_back,"ax",@progbits
 	.align	2
@@ -18901,10 +18964,10 @@ gc_do_copy_back:
 	stp	x23, x24, [sp, 64]
 	stp	x25, x26, [sp, 80]
 	stp	x27, x28, [sp, 96]
-	cbnz	w0, .L2973
+	cbnz	w0, .L2982
 	bl	buf_alloc
 	mov	x19, x0
-	cbz	x0, .L2972
+	cbz	x0, .L2981
 	adrp	x20, .LANCHOR63
 	add	x3, x20, :lo12:.LANCHOR63
 	ldrh	w2, [x3, 26]
@@ -18920,7 +18983,7 @@ gc_do_copy_back:
 	ldr	w0, [x19, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L2975
+	bne	.L2984
 	adrp	x0, .LANCHOR96
 	ldrh	w1, [x0, #:lo12:.LANCHOR96]
 	mov	w0, 21
@@ -18935,48 +18998,48 @@ gc_do_copy_back:
 	mov	x1, 0
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
-.L2975:
+.L2984:
 	ldr	w0, [x19, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L2976
+	bne	.L2985
 	adrp	x1, .LANCHOR203
 	adrp	x0, .LC0
 	mov	w2, 573
 	add	x1, x1, :lo12:.LANCHOR203
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2976:
+.L2985:
 	ldr	x0, [x19, 24]
 	ldr	w21, [x0, 4]
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 160]
 	cmn	w0, #1
-	bne	.L2977
+	bne	.L2986
 	mov	w2, 0
 	add	x1, x29, 160
 	mov	w0, w21
 	bl	pm_log2phys
-.L2977:
+.L2986:
 	ldr	w23, [x29, 160]
 	cmp	w22, w23
-	bne	.L2978
+	bne	.L2987
 	adrp	x0, .LANCHOR46
 	add	x0, x0, :lo12:.LANCHOR46
 	add	x1, x0, 2
 	add	x0, x0, 2050
-.L2981:
+.L2990:
 	ldr	w2, [x1, 34]
 	cmp	w21, w2
-	bne	.L2979
+	bne	.L2988
 	ldrb	w2, [x1]
-	tbz	x2, 1, .L2979
+	tbz	x2, 1, .L2988
 	mov	x0, x19
 	bl	buf_free
 	adrp	x0, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L2972
+	tbz	x0, 8, .L2981
 	add	x20, x20, :lo12:.LANCHOR63
 	adrp	x0, .LC209
 	mov	w2, w22
@@ -18984,7 +19047,7 @@ gc_do_copy_back:
 	add	x0, x0, :lo12:.LC209
 	ldrh	w3, [x20, 26]
 	bl	printf
-.L2972:
+.L2981:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -18993,14 +19056,14 @@ gc_do_copy_back:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 224
 	ret
-.L2979:
+.L2988:
 	add	x1, x1, 64
 	cmp	x0, x1
-	bne	.L2981
-	adrp	x0, .LANCHOR114
+	bne	.L2990
+	adrp	x0, .LANCHOR117
 	mov	w1, 10
 	strb	wzr, [x19, 57]
-	ldrb	w0, [x0, #:lo12:.LANCHOR114]
+	ldrb	w0, [x0, #:lo12:.LANCHOR117]
 	strb	w0, [x19, 56]
 	ldrb	w0, [x19, 2]
 	str	w21, [x19, 36]
@@ -19011,7 +19074,7 @@ gc_do_copy_back:
 	str	w0, [x19, 32]
 	adrp	x0, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L2982
+	tbz	x0, 8, .L2991
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	add	x1, x20, :lo12:.LANCHOR63
@@ -19023,24 +19086,24 @@ gc_do_copy_back:
 	ldrh	w5, [x1, 26]
 	mov	w1, w21
 	bl	printf
-.L2982:
+.L2991:
 	mov	x0, x19
 	bl	ftl_gc_write_buf
 	bl	ftl_write_commit
 	add	x20, x20, :lo12:.LANCHOR63
-	adrp	x0, .LANCHOR101
-	ldr	x1, [x0, #:lo12:.LANCHOR101]
+	adrp	x0, .LANCHOR97
+	ldr	x1, [x0, #:lo12:.LANCHOR97]
 	ldr	w0, [x1, 60]
 	add	w0, w0, 1
 	str	w0, [x1, 60]
 	ldrh	w0, [x20, 28]
 	add	w0, w0, 1
 	strh	w0, [x20, 28]
-	b	.L2972
-.L2978:
+	b	.L2981
+.L2987:
 	adrp	x0, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L2983
+	tbz	x0, 8, .L2992
 	add	x20, x20, :lo12:.LANCHOR63
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
@@ -19052,11 +19115,11 @@ gc_do_copy_back:
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC210
 	bl	printf
-.L2983:
+.L2992:
 	mov	x0, x19
 	bl	buf_free
-	b	.L2972
-.L2973:
+	b	.L2981
+.L2982:
 	adrp	x1, .LANCHOR5
 	adrp	x0, .LANCHOR67
 	stp	x0, x1, [x29, 128]
@@ -19065,10 +19128,10 @@ gc_do_copy_back:
 	ldrb	w25, [x0, #:lo12:.LANCHOR67]
 	add	x22, x22, 80
 	cmp	w25, 3
-	bne	.L2984
+	bne	.L2993
 	adrp	x0, .LANCHOR69
 	ldrb	w0, [x0, #:lo12:.LANCHOR69]
-	cbz	w0, .L2985
+	cbz	w0, .L2994
 	add	x0, x24, :lo12:.LANCHOR63
 	ldrb	w19, [x22, 9]
 	ldrh	w20, [x0, 314]
@@ -19077,7 +19140,7 @@ gc_do_copy_back:
 	sdiv	w21, w20, w21
 	madd	w19, w21, w19, w20
 	and	w19, w19, 65535
-.L2986:
+.L2995:
 	adrp	x1, .LANCHOR71
 	ldrb	w0, [x22, 9]
 	add	x4, x24, :lo12:.LANCHOR63
@@ -19086,16 +19149,16 @@ gc_do_copy_back:
 	mul	w8, w25, w0
 	ldrh	w10, [x4, 24]
 	mul	w3, w3, w0
-	adrp	x0, .LANCHOR137
-	ldr	x7, [x0, #:lo12:.LANCHOR137]
+	adrp	x0, .LANCHOR140
+	ldr	x7, [x0, #:lo12:.LANCHOR140]
 	sub	w3, w3, #1
-.L2989:
+.L2998:
 	cmp	w2, w8
-	blt	.L2991
-.L3018:
+	blt	.L3000
+.L3027:
 	mov	w23, 1
-	b	.L2987
-.L2985:
+	b	.L2996
+.L2994:
 	add	x0, x24, :lo12:.LANCHOR63
 	ldrb	w20, [x22, 9]
 	ldrh	w1, [x0, 314]
@@ -19111,17 +19174,17 @@ gc_do_copy_back:
 	madd	w20, w21, w20, w19
 	add	w20, w20, w20, lsl 1
 	and	w20, w20, 65535
-	beq	.L2986
-.L2987:
+	beq	.L2995
+.L2996:
 	adrp	x0, .LANCHOR7
 	str	x0, [x29, 112]
 	ldr	w1, [x0, #:lo12:.LANCHOR7]
-	tbz	x1, 8, .L2992
-	adrp	x0, .LANCHOR137
+	tbz	x1, 8, .L3001
+	adrp	x0, .LANCHOR140
 	ubfiz	x1, x20, 2, 16
 	mov	w6, w20
 	mov	w3, w19
-	ldr	x2, [x0, #:lo12:.LANCHOR137]
+	ldr	x2, [x0, #:lo12:.LANCHOR140]
 	add	x0, x24, :lo12:.LANCHOR63
 	ldrh	w4, [x0, 314]
 	adrp	x0, .LC211
@@ -19130,12 +19193,12 @@ gc_do_copy_back:
 	mov	w2, w23
 	mov	w1, w21
 	bl	printf
-.L2992:
+.L3001:
 	adrp	x0, .LANCHOR46
 	str	wzr, [x29, 152]
 	add	x0, x0, :lo12:.LANCHOR46
 	str	x0, [x29, 120]
-.L2993:
+.L3002:
 	ldrb	w2, [x22, 9]
 	ldr	w0, [x29, 152]
 	ldrh	w26, [x29, 152]
@@ -19143,27 +19206,27 @@ gc_do_copy_back:
 	str	w0, [x29, 156]
 	mul	w1, w25, w2
 	cmp	w0, w1
-	blt	.L3005
+	blt	.L3014
 	ldr	x0, [x29, 128]
 	ldrb	w0, [x0, #:lo12:.LANCHOR67]
 	cmp	w0, 3
 	add	x0, x29, 160
-	beq	.L3006
+	beq	.L3015
 	sub	w3, w1, #1
 	mov	w2, 0
-.L3007:
+.L3016:
 	cmp	w2, w3
-	blt	.L3013
+	blt	.L3022
 	ldr	x0, [x0, w3, sxtw 3]
 	mov	w2, -1
 	strb	w2, [x0]
 	ldr	x0, [x29, 160]
 	bl	sblk_prog_page
-	b	.L3012
-.L2984:
-	adrp	x0, .LANCHOR98
-	ldrb	w0, [x0, #:lo12:.LANCHOR98]
-	cbnz	w0, .L2988
+	b	.L3021
+.L2993:
+	adrp	x0, .LANCHOR102
+	ldrb	w0, [x0, #:lo12:.LANCHOR102]
+	cbnz	w0, .L2997
 	add	x0, x24, :lo12:.LANCHOR63
 	ldrb	w19, [x22, 9]
 	mov	w25, 1
@@ -19171,8 +19234,8 @@ gc_do_copy_back:
 	sdiv	w21, w20, w19
 	msub	w19, w21, w19, w20
 	and	w19, w19, 65535
-	b	.L2986
-.L2988:
+	b	.L2995
+.L2997:
 	add	x0, x24, :lo12:.LANCHOR63
 	ldrb	w19, [x22, 9]
 	mov	w25, 2
@@ -19180,28 +19243,28 @@ gc_do_copy_back:
 	sdiv	w21, w20, w19
 	msub	w19, w21, w19, w20
 	and	w19, w19, 65535
-	b	.L2986
-.L2991:
+	b	.L2995
+.L3000:
 	add	w5, w20, w2
 	cmp	w5, w3
-	beq	.L3018
+	beq	.L3027
 	sbfiz	x5, x5, 2, 32
 	ldr	w0, [x7, x5]
 	cmn	w0, #1
-	bne	.L2990
+	bne	.L2999
 	ldrh	w6, [x4, 26]
 	cmp	w6, w10
-	bcs	.L2972
+	bcs	.L2981
 	mov	w0, w6
 	bl	gc_get_src_ppa_from_index
 	add	w6, w6, 1
 	strh	w6, [x4, 26]
 	str	w0, [x7, x5]
-.L2990:
+.L2999:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-	b	.L2989
-.L3005:
+	b	.L2998
+.L3014:
 	ldr	w0, [x29, 156]
 	add	w0, w20, w0
 	str	w0, [x29, 144]
@@ -19210,11 +19273,11 @@ gc_do_copy_back:
 	ldr	x0, [x0, #:lo12:.LANCHOR68]
 	ldrb	w0, [x0, x27]
 	cmp	w0, 255
-	bne	.L2994
+	bne	.L3003
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbnz	x0, .L2995
+	cbnz	x0, .L3004
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	bl	gc_write_completed
@@ -19222,12 +19285,12 @@ gc_do_copy_back:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbz	x0, .L2972
-.L2995:
+	cbz	x0, .L2981
+.L3004:
 	adrp	x0, .LANCHOR68
 	ldrb	w1, [x28, 1]
 	adrp	x5, .LANCHOR71
-	adrp	x6, .LANCHOR137
+	adrp	x6, .LANCHOR140
 	ldr	x0, [x0, #:lo12:.LANCHOR68]
 	strb	w1, [x0, x27]
 	add	x1, x24, :lo12:.LANCHOR63
@@ -19243,11 +19306,11 @@ gc_do_copy_back:
 	mul	w0, w0, w7
 	sub	w0, w0, #1
 	cmp	w1, w0
-	bne	.L2996
-	adrp	x0, .LANCHOR136
+	bne	.L3005
+	adrp	x0, .LANCHOR139
 	adrp	x4, .LANCHOR72
 	stp	x6, x5, [x29, 96]
-	ldr	x1, [x0, #:lo12:.LANCHOR136]
+	ldr	x1, [x0, #:lo12:.LANCHOR139]
 	mov	w0, -1
 	str	x4, [x29, 144]
 	str	w0, [x1, x27, lsl 2]
@@ -19262,13 +19325,13 @@ gc_do_copy_back:
 	ldrh	w0, [x5, #:lo12:.LANCHOR71]
 	ldrb	w1, [x4, #:lo12:.LANCHOR72]
 	mul	w0, w0, w1
-	ldr	x1, [x6, #:lo12:.LANCHOR137]
+	ldr	x1, [x6, #:lo12:.LANCHOR140]
 	lsl	w2, w0, 2
 	add	x0, x7, x0, sxtw 2
 	bl	ftl_memcpy
-	adrp	x0, .LANCHOR114
+	adrp	x0, .LANCHOR117
 	mov	w1, 0
-	ldrb	w2, [x0, #:lo12:.LANCHOR114]
+	ldrb	w2, [x0, #:lo12:.LANCHOR117]
 	ldr	x0, [x28, 24]
 	lsl	w2, w2, 1
 	bl	ftl_memset
@@ -19289,7 +19352,7 @@ gc_do_copy_back:
 	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	ldr	w0, [x0, 132]
 	str	w0, [x6, 8]
-.L2994:
+.L3003:
 	adrp	x0, .LANCHOR68
 	ldr	w5, [x29, 156]
 	add	x3, x29, 160
@@ -19302,16 +19365,16 @@ gc_do_copy_back:
 	add	x2, x2, x1, lsl 6
 	str	x0, [x3, w5, sxtw 3]
 	mov	w0, 2
-	adrp	x5, .LANCHOR138
+	adrp	x5, .LANCHOR141
 	strh	w0, [x2, 50]
 	ldr	x0, [x29, 128]
 	strb	w23, [x2, 61]
 	ldrb	w0, [x0, #:lo12:.LANCHOR67]
 	cmp	w0, 3
-	bne	.L3000
+	bne	.L3009
 	udiv	w0, w26, w0
-	adrp	x6, .LANCHOR99
-	ldrh	w6, [x6, #:lo12:.LANCHOR99]
+	adrp	x6, .LANCHOR103
+	ldrh	w6, [x6, #:lo12:.LANCHOR103]
 	add	w3, w0, w19
 	add	w0, w0, w0, lsl 1
 	add	x3, x22, x3, sxtw 1
@@ -19323,13 +19386,13 @@ gc_do_copy_back:
 	ldrh	w6, [x2, 48]
 	orr	w3, w3, w21
 	str	w3, [x2, 40]
-	ldr	x2, [x5, #:lo12:.LANCHOR138]
+	ldr	x2, [x5, #:lo12:.LANCHOR141]
 	orr	w0, w3, w0, lsl 24
 	str	w0, [x2, x6, lsl 2]
-.L3001:
+.L3010:
 	ldr	x0, [x29, 112]
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L3004
+	tbz	x0, 8, .L3013
 	ldr	x0, [x29, 120]
 	mov	w2, w23
 	ldrb	w4, [x4, x27]
@@ -19350,15 +19413,15 @@ gc_do_copy_back:
 	ldr	w5, [x1, 40]
 	ldr	w1, [x29, 156]
 	bl	printf
-.L3004:
+.L3013:
 	ldr	w0, [x29, 152]
 	add	w0, w0, 1
 	str	w0, [x29, 152]
-	b	.L2993
-.L2996:
+	b	.L3002
+.L3005:
 	lsl	x0, x27, 2
 	str	x0, [x29, 144]
-	ldr	x0, [x6, #:lo12:.LANCHOR137]
+	ldr	x0, [x6, #:lo12:.LANCHOR140]
 	lsl	x1, x27, 2
 	ldr	w0, [x0, x1]
 	mov	w1, 1
@@ -19368,7 +19431,7 @@ gc_do_copy_back:
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L2998
+	bne	.L3007
 	adrp	x0, .LANCHOR96
 	ldr	w1, [x28, 40]
 	ldrh	w4, [x0, #:lo12:.LANCHOR96]
@@ -19387,99 +19450,99 @@ gc_do_copy_back:
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L2998
+	bne	.L3007
 	ldr	x0, [x28, 24]
 	mov	w1, -1
 	str	w1, [x0, 4]
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmp	w0, w1, 4, ne
-	bne	.L2998
+	bne	.L3007
 	adrp	x1, .LANCHOR203
 	adrp	x0, .LC0
 	mov	w2, 688
 	add	x1, x1, :lo12:.LANCHOR203
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2998:
+.L3007:
 	ldr	x0, [x28, 24]
 	adrp	x1, .LANCHOR54
 	ldr	w1, [x1, #:lo12:.LANCHOR54]
 	ldr	w2, [x0, 4]
 	cmp	w2, w1
-	bcc	.L2999
+	bcc	.L3008
 	mov	w1, -1
 	str	w1, [x0, 4]
-.L2999:
-	adrp	x1, .LANCHOR136
+.L3008:
+	adrp	x1, .LANCHOR139
 	lsl	x3, x27, 2
 	ldr	w2, [x0, 4]
-	ldr	x1, [x1, #:lo12:.LANCHOR136]
+	ldr	x1, [x1, #:lo12:.LANCHOR139]
 	str	w2, [x1, x3]
 	ldr	w1, [x28, 40]
 	str	w1, [x0, 8]
-	b	.L2994
-.L3000:
+	b	.L3003
+.L3009:
 	cmp	w0, 2
-	bne	.L3002
-	adrp	x0, .LANCHOR98
-	adrp	x3, .LANCHOR99
-	ldrb	w0, [x0, #:lo12:.LANCHOR98]
-	cbnz	w0, .L3003
+	bne	.L3011
+	adrp	x0, .LANCHOR102
+	adrp	x3, .LANCHOR103
+	ldrb	w0, [x0, #:lo12:.LANCHOR102]
+	cbnz	w0, .L3012
 	ldr	w0, [x29, 156]
-	ldrh	w3, [x3, #:lo12:.LANCHOR99]
+	ldrh	w3, [x3, #:lo12:.LANCHOR103]
 	add	w0, w19, w0
 	add	x0, x22, x0, sxtw 1
 	ldrh	w0, [x0, 16]
 	madd	w0, w0, w3, w21
-.L3064:
+.L3073:
 	orr	w0, w0, 33554432
 	str	w0, [x2, 40]
-.L3002:
+.L3011:
 	ldr	x0, [x29, 120]
 	add	x0, x0, x1, lsl 6
 	ldrh	w2, [x0, 48]
 	ldr	w3, [x0, 40]
-	ldr	x0, [x5, #:lo12:.LANCHOR138]
+	ldr	x0, [x5, #:lo12:.LANCHOR141]
 	str	w3, [x0, x2, lsl 2]
-	b	.L3001
-.L3003:
+	b	.L3010
+.L3012:
 	add	w0, w19, w26, lsr 1
-	ldrh	w3, [x3, #:lo12:.LANCHOR99]
+	ldrh	w3, [x3, #:lo12:.LANCHOR103]
 	add	x0, x22, x0, sxtw 1
 	ldrh	w0, [x0, 16]
 	madd	w0, w0, w3, w21
 	and	w3, w26, 1
 	add	w0, w0, w3
-	b	.L3064
-.L3006:
+	b	.L3073
+.L3015:
 	adrp	x1, .LANCHOR69
 	ldrb	w3, [x1, #:lo12:.LANCHOR69]
 	ldr	x1, [x29, 160]
-	cbz	w3, .L3008
-.L3011:
+	cbz	w3, .L3017
+.L3020:
 	strb	wzr, [x1, 60]
-	b	.L3009
-.L3008:
+	b	.L3018
+.L3017:
 	cmp	w23, 1
-	bne	.L3010
+	bne	.L3019
 	mov	w3, 9
-.L3063:
+.L3072:
 	strb	w3, [x1, 60]
-.L3009:
+.L3018:
 	add	x1, x0, 24
 	bl	sblk_xlc_prog_pages
-.L3012:
+.L3021:
 	adrp	x1, .LANCHOR69
 	ldrb	w3, [x22, 9]
 	ldrb	w1, [x1, #:lo12:.LANCHOR69]
 	and	w0, w3, 65535
-	cbz	w1, .L3014
+	cbz	w1, .L3023
 	add	w0, w0, w0, lsl 1
-.L3015:
-	adrp	x1, .LANCHOR101
+.L3024:
+	adrp	x1, .LANCHOR97
 	add	x24, x24, :lo12:.LANCHOR63
-	ldr	x1, [x1, #:lo12:.LANCHOR101]
+	ldr	x1, [x1, #:lo12:.LANCHOR97]
 	ldr	w2, [x1, 52]
 	add	w2, w2, w0
 	str	w2, [x1, 52]
@@ -19491,34 +19554,34 @@ gc_do_copy_back:
 	ldrh	w1, [x1, #:lo12:.LANCHOR71]
 	mul	w1, w1, w3
 	cmp	w0, w1
-	blt	.L3016
+	blt	.L3025
 	ldr	x0, [x29, 136]
 	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	strh	wzr, [x0, 86]
-.L3016:
+.L3025:
 	bl	gc_write_completed
-	b	.L2972
-.L3010:
+	b	.L2981
+.L3019:
 	cmp	w23, 2
-	bne	.L3011
+	bne	.L3020
 	mov	w3, 13
-	b	.L3063
-.L3013:
+	b	.L3072
+.L3022:
 	ldr	x4, [x0, w2, sxtw 3]
 	add	w2, w2, 1
 	ldr	x5, [x0, w2, sxtw 3]
 	and	w2, w2, 65535
 	ldrb	w5, [x5, 1]
 	strb	w5, [x4]
-	b	.L3007
-.L3014:
-	adrp	x1, .LANCHOR98
-	ldrb	w2, [x1, #:lo12:.LANCHOR98]
+	b	.L3016
+.L3023:
+	adrp	x1, .LANCHOR102
+	ldrb	w2, [x1, #:lo12:.LANCHOR102]
 	mov	w1, w0
 	ubfiz	w0, w0, 1, 15
 	cmp	w2, 0
 	csel	w0, w0, w1, ne
-	b	.L3015
+	b	.L3024
 	.size	gc_do_copy_back, .-gc_do_copy_back
 	.section	.text.zftl_discard,"ax",@progbits
 	.align	2
@@ -19537,7 +19600,7 @@ zftl_discard:
 	cmp	w2, w1
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	bcc	.L3086
+	bcc	.L3095
 	adrp	x24, .LANCHOR205
 	add	w22, w0, 24576
 	adrp	x0, .LANCHOR7
@@ -19546,26 +19609,26 @@ zftl_discard:
 	ldr	w2, [x0, #:lo12:.LANCHOR7]
 	add	w1, w19, w1
 	str	w1, [x24, #:lo12:.LANCHOR205]
-	tbz	x2, 12, .L3067
+	tbz	x2, 12, .L3076
 	adrp	x0, .LC213
 	mov	w4, 0
 	mov	w3, w19
 	mov	w2, w22
 	add	x0, x0, :lo12:.LC213
 	bl	printf
-.L3067:
-	adrp	x23, .LANCHOR101
-	adrp	x26, .LANCHOR114
-	ldr	x0, [x23, #:lo12:.LANCHOR101]
+.L3076:
+	adrp	x23, .LANCHOR97
+	adrp	x26, .LANCHOR117
+	ldr	x0, [x23, #:lo12:.LANCHOR97]
 	ldr	w27, [x0, 8]
 	add	w1, w27, 1
 	str	w1, [x0, 8]
 	bl	ftl_write_commit
 	bl	ftl_flush
-	ldrb	w21, [x26, #:lo12:.LANCHOR114]
+	ldrb	w21, [x26, #:lo12:.LANCHOR117]
 	udiv	w20, w22, w21
 	msub	w25, w20, w21, w22
-	cbz	w25, .L3068
+	cbz	w25, .L3077
 	sub	w21, w21, w25
 	mov	w0, w20
 	cmp	w21, w19
@@ -19573,20 +19636,20 @@ zftl_discard:
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	bne	.L3069
+	bne	.L3078
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
-.L3069:
+.L3078:
 	ldr	w0, [x29, 120]
 	and	w28, w21, 65535
 	cmn	w0, #1
-	beq	.L3071
+	beq	.L3080
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x3, x0
-	cbz	x0, .L3071
+	cbz	x0, .L3080
 	strb	w25, [x0, 57]
 	ubfiz	x25, x25, 9, 25
 	strb	w21, [x0, 56]
@@ -19601,57 +19664,57 @@ zftl_discard:
 	mov	x0, x3
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-	ldr	x1, [x23, #:lo12:.LANCHOR101]
+	ldr	x1, [x23, #:lo12:.LANCHOR97]
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3071:
+.L3080:
 	add	w20, w20, 1
 	sub	w19, w19, w28
-.L3068:
-	cbz	w19, .L3073
+.L3077:
+	cbz	w19, .L3082
 	bl	ftl_flush
-.L3073:
+.L3082:
 	adrp	x25, .LANCHOR96
-	add	x21, x26, :lo12:.LANCHOR114
+	add	x21, x26, :lo12:.LANCHOR117
 	add	x25, x25, :lo12:.LANCHOR96
 	mov	w0, -1
 	str	w0, [x29, 124]
-.L3074:
+.L3083:
 	ldrb	w0, [x21]
 	cmp	w19, w0
-	bcs	.L3079
-	cbz	w19, .L3081
+	bcs	.L3088
+	cbz	w19, .L3090
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	bne	.L3082
+	bne	.L3091
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
-.L3082:
+.L3091:
 	ldr	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3081
+	beq	.L3090
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x21, x0
-	cbz	x0, .L3081
+	cbz	x0, .L3090
 	strb	wzr, [x0, 57]
 	strb	w19, [x0, 56]
 	stp	w27, w20, [x21, 32]
-	ldrb	w0, [x26, #:lo12:.LANCHOR114]
+	ldrb	w0, [x26, #:lo12:.LANCHOR117]
 	cmp	w19, w0
-	bcc	.L3084
+	bcc	.L3093
 	adrp	x1, .LANCHOR206
 	adrp	x0, .LC0
 	mov	w2, 1177
 	add	x1, x1, :lo12:.LANCHOR206
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3084:
+.L3093:
 	ldr	x0, [x21, 8]
 	lsl	w2, w19, 9
 	mov	w1, 0
@@ -19659,42 +19722,42 @@ zftl_discard:
 	mov	x0, x21
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-	ldr	x1, [x23, #:lo12:.LANCHOR101]
+	ldr	x1, [x23, #:lo12:.LANCHOR97]
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3081:
+.L3090:
 	ldr	w1, [x24, #:lo12:.LANCHOR205]
 	cmp	w1, 8192
-	bls	.L3087
+	bls	.L3096
 	ldr	x0, [x29, 104]
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L3085
+	tbz	x0, 12, .L3094
 	adrp	x0, .LC213
 	mov	w4, 0
 	mov	w3, w19
 	mov	w2, w22
 	add	x0, x0, :lo12:.LC213
 	bl	printf
-.L3085:
+.L3094:
 	str	wzr, [x24, #:lo12:.LANCHOR205]
 	bl	flt_sys_flush
 	adrp	x0, .LANCHOR207
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR207]
-.L3087:
+.L3096:
 	mov	w0, 0
-	b	.L3065
-.L3079:
+	b	.L3074
+.L3088:
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3075
+	beq	.L3084
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbz	x0, .L3077
+	cbz	x0, .L3086
 	ldrb	w2, [x21]
 	mov	w1, 0
 	strb	w2, [x0, 56]
@@ -19706,24 +19769,24 @@ zftl_discard:
 	mov	x0, x28
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-.L3113:
-	ldr	x1, [x23, #:lo12:.LANCHOR101]
+.L3122:
+	ldr	x1, [x23, #:lo12:.LANCHOR97]
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3077:
+.L3086:
 	ldrb	w0, [x21]
 	add	w20, w20, 1
 	sub	w19, w19, w0
-	b	.L3074
-.L3075:
+	b	.L3083
+.L3084:
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
 	ldr	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3077
+	beq	.L3086
 	add	x1, x29, 124
 	mov	w2, 1
 	mov	w0, w20
@@ -19741,10 +19804,10 @@ zftl_discard:
 	ldrb	w1, [x1, #:lo12:.LANCHOR95]
 	udiv	w0, w0, w1
 	bl	ftl_vpn_decrement
-	b	.L3113
-.L3086:
+	b	.L3122
+.L3095:
 	mov	w0, -1
-.L3065:
+.L3074:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -19773,65 +19836,65 @@ zftl_do_gc:
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x19, x20, [sp, 32]
-	adrp	x19, .LANCHOR135
+	adrp	x19, .LANCHOR138
 	stp	x23, x24, [sp, 64]
 	adrp	x24, .LANCHOR5
 	ldrh	w20, [x2, #:lo12:.LANCHOR89]
 	stp	x21, x22, [sp, 48]
-	ldrb	w2, [x19, #:lo12:.LANCHOR135]
+	ldrb	w2, [x19, #:lo12:.LANCHOR138]
 	ldrh	w21, [x1, #:lo12:.LANCHOR93]
 	stp	x25, x26, [sp, 80]
 	cmp	w2, 6
 	ldr	x23, [x24, #:lo12:.LANCHOR5]
 	add	w20, w21, w20
-	bhi	.L3222
+	bhi	.L3231
 	mov	w22, w0
 	and	w20, w20, 65535
-	adrp	x0, .L3118
+	adrp	x0, .L3127
 	mov	x25, x1
-	add	x0, x0, :lo12:.L3118
+	add	x0, x0, :lo12:.L3127
 	ldrh	w0, [x0,w2,uxtw #1]
-	adr	x1, .Lrtx3118
+	adr	x1, .Lrtx3127
 	add	x0, x1, w0, sxth #2
 	br	x0
-.Lrtx3118:
+.Lrtx3127:
 	.section	.rodata.zftl_do_gc,"a",@progbits
 	.align	0
 	.align	2
-.L3118:
-	.2byte	(.L3117 - .Lrtx3118) / 4
-	.2byte	(.L3119 - .Lrtx3118) / 4
-	.2byte	(.L3120 - .Lrtx3118) / 4
-	.2byte	(.L3121 - .Lrtx3118) / 4
-	.2byte	(.L3122 - .Lrtx3118) / 4
-	.2byte	(.L3123 - .Lrtx3118) / 4
-	.2byte	(.L3124 - .Lrtx3118) / 4
+.L3127:
+	.2byte	(.L3126 - .Lrtx3127) / 4
+	.2byte	(.L3128 - .Lrtx3127) / 4
+	.2byte	(.L3129 - .Lrtx3127) / 4
+	.2byte	(.L3130 - .Lrtx3127) / 4
+	.2byte	(.L3131 - .Lrtx3127) / 4
+	.2byte	(.L3132 - .Lrtx3127) / 4
+	.2byte	(.L3133 - .Lrtx3127) / 4
 	.section	.text.zftl_do_gc
-.L3123:
+.L3132:
 	adrp	x21, .LANCHOR63
 	add	x25, x21, :lo12:.LANCHOR63
 	mov	w23, 0
-.L3125:
+.L3134:
 	bl	gc_check_data_one_wl
-	cbz	w0, .L3190
+	cbz	w0, .L3199
 	ldr	x0, [x24, #:lo12:.LANCHOR5]
 	add	x21, x21, :lo12:.LANCHOR63
 	strh	wzr, [x21, 56]
 	ldrh	w0, [x0, 80]
 	bl	ftl_free_sblk
-	adrp	x2, .LANCHOR101
+	adrp	x2, .LANCHOR97
 	ldr	x1, [x24, #:lo12:.LANCHOR5]
 	mov	w0, -1
-	ldr	x2, [x2, #:lo12:.LANCHOR101]
+	ldr	x2, [x2, #:lo12:.LANCHOR97]
 	strh	w0, [x1, 80]
 	strh	w0, [x2, 126]
 	strh	w0, [x1, 130]
 	ldr	x0, [x21, 8]
 	bl	buf_free
-	strb	wzr, [x19, #:lo12:.LANCHOR135]
+	strb	wzr, [x19, #:lo12:.LANCHOR138]
 	str	xzr, [x21, 8]
-	b	.L3246
-.L3117:
+	b	.L3255
+.L3126:
 	adrp	x0, .LANCHOR91
 	mov	w1, 65535
 	ldrh	w4, [x0, #:lo12:.LANCHOR91]
@@ -19839,14 +19902,14 @@ zftl_do_gc:
 	add	w21, w21, w4
 	and	w21, w21, 65535
 	cmp	w0, w1
-	beq	.L3126
+	beq	.L3135
 	adrp	x1, .LANCHOR7
 	cmp	w21, 7
 	mov	w22, 3
 	adrp	x24, .LANCHOR70
 	ldr	w1, [x1, #:lo12:.LANCHOR7]
 	csinc	w22, w22, wzr, hi
-	tbz	x1, 8, .L3128
+	tbz	x1, 8, .L3137
 	ldrh	w7, [x23, 122]
 	mov	w4, w21
 	ldrh	w6, [x23, 120]
@@ -19858,40 +19921,40 @@ zftl_do_gc:
 	adrp	x0, .LC214
 	add	x0, x0, :lo12:.LC214
 	bl	printf
-.L3128:
+.L3137:
 	ldrb	w0, [x24, #:lo12:.LANCHOR70]
 	mov	w2, 1
 	mov	w1, w22
 	bl	gc_search_src_blk
 	cmp	w0, 0
-	ble	.L3222
-.L3129:
+	ble	.L3231
+.L3138:
 	mov	w0, 1
-.L3245:
-	strb	w0, [x19, #:lo12:.LANCHOR135]
-	b	.L3222
-.L3126:
+.L3254:
+	strb	w0, [x19, #:lo12:.LANCHOR138]
+	b	.L3231
+.L3135:
 	adrp	x0, .LANCHOR84
 	cmp	w22, 1
 	ldrh	w25, [x0, #:lo12:.LANCHOR84]
 	adrp	x0, .LANCHOR82
 	ldrh	w26, [x0, #:lo12:.LANCHOR82]
-	bne	.L3130
+	bne	.L3139
 	bl	gc_scan_static_data
 	bl	gc_static_wearleveling
-.L3131:
+.L3140:
 	ldr	x2, [x24, #:lo12:.LANCHOR5]
 	adrp	x1, .LANCHOR70
 	mov	w0, 1
 	mov	x24, x1
 	strb	w0, [x1, #:lo12:.LANCHOR70]
 	ldrh	w5, [x2, 124]
-	cbz	w5, .L3133
-	strb	w0, [x19, #:lo12:.LANCHOR135]
+	cbz	w5, .L3142
+	strb	w0, [x19, #:lo12:.LANCHOR138]
 	adrp	x0, .LANCHOR7
 	strb	wzr, [x1, #:lo12:.LANCHOR70]
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L3222
+	tbz	x0, 8, .L3231
 	ldrh	w7, [x2, 122]
 	mov	w4, w21
 	ldrh	w6, [x2, 120]
@@ -19901,13 +19964,13 @@ zftl_do_gc:
 	adrp	x0, .LC215
 	add	x0, x0, :lo12:.LC215
 	bl	printf
-	b	.L3222
-.L3130:
+	b	.L3231
+.L3139:
 	adrp	x0, .LANCHOR73
 	ldrh	w0, [x0, #:lo12:.LANCHOR73]
 	cmp	w0, w20
-	bcs	.L3131
-.L3222:
+	bcs	.L3140
+.L3231:
 	mov	w0, 16
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
@@ -19916,44 +19979,44 @@ zftl_do_gc:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 96
 	ret
-.L3133:
+.L3142:
 	adrp	x23, .LANCHOR73
 	ldrh	w1, [x23, #:lo12:.LANCHOR73]
 	cmp	w20, w1
-	bcs	.L3134
+	bcs	.L3143
 	cmp	w21, 1
-	bls	.L3135
+	bls	.L3144
 	cmp	w21, 16
-	bls	.L3136
+	bls	.L3145
 	adrp	x1, .LANCHOR86
 	ldrh	w2, [x1, #:lo12:.LANCHOR86]
 	adrp	x1, .LANCHOR87
 	ldrh	w1, [x1, #:lo12:.LANCHOR87]
 	cmp	w2, w1
-	bcs	.L3136
+	bcs	.L3145
 	mov	w2, 16
 	mov	w1, 3
-.L3242:
+.L3251:
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-.L3137:
-	cbnz	w0, .L3129
-	b	.L3222
-.L3136:
+.L3146:
+	cbnz	w0, .L3138
+	b	.L3231
+.L3145:
 	mov	w2, 2
 	mov	w1, w2
 	mov	w0, 1
-.L3248:
+.L3257:
 	bl	gc_search_src_blk
 	tst	w0, 65535
-	bne	.L3129
+	bne	.L3138
 	mov	w2, 2
-	b	.L3243
-.L3135:
+	b	.L3252
+.L3144:
 	adrp	x0, .LANCHOR7
 	strb	wzr, [x24, #:lo12:.LANCHOR70]
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L3139
+	tbz	x0, 8, .L3148
 	ldrh	w7, [x2, 122]
 	adrp	x0, .LC215
 	ldrh	w6, [x2, 120]
@@ -19964,181 +20027,181 @@ zftl_do_gc:
 	mov	w1, 1778
 	add	x0, x0, :lo12:.LC215
 	bl	printf
-.L3139:
+.L3148:
 	cmp	w20, 16
-	bls	.L3140
+	bls	.L3149
 	mov	w2, 4
-.L3243:
+.L3252:
 	mov	w1, 3
 	ldrb	w0, [x24, #:lo12:.LANCHOR70]
-	b	.L3242
-.L3140:
+	b	.L3251
+.L3149:
 	mov	w2, 1
 	ldrb	w0, [x24, #:lo12:.LANCHOR70]
 	mov	w1, w2
-	b	.L3248
-.L3134:
+	b	.L3257
+.L3143:
 	cmp	w22, 1
 	lsl	w1, w1, 1
-	bne	.L3142
+	bne	.L3151
 	cmp	w20, w1
-	bge	.L3142
+	bge	.L3151
 	add	w0, w25, w26
 	and	w0, w0, 65535
 	cmp	w0, w21, lsr 1
-	bcs	.L3143
+	bcs	.L3152
 	adrp	x1, .LANCHOR86
 	ldrh	w2, [x1, #:lo12:.LANCHOR86]
 	adrp	x1, .LANCHOR87
 	ldrh	w1, [x1, #:lo12:.LANCHOR87]
 	cmp	w2, w1
-	bcs	.L3143
-.L3147:
+	bcs	.L3152
+.L3156:
 	adrp	x0, .LANCHOR83
 	ldrh	w0, [x0, #:lo12:.LANCHOR83]
 	lsr	w0, w0, 1
 	strh	w0, [x23, #:lo12:.LANCHOR73]
-	b	.L3222
-.L3143:
+	b	.L3231
+.L3152:
 	cmp	w21, 1
 	adrp	x22, .LANCHOR83
-	bls	.L3144
+	bls	.L3153
 	cmp	w21, 16
-	bls	.L3145
+	bls	.L3154
 	mov	w2, 8
 	mov	w1, 3
 	mov	w0, 1
-.L3240:
+.L3249:
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-.L3146:
+.L3155:
 	ldrh	w1, [x22, #:lo12:.LANCHOR83]
 	strh	w1, [x23, #:lo12:.LANCHOR73]
-	b	.L3137
-.L3145:
+	b	.L3146
+.L3154:
 	mov	w2, 2
 	mov	w0, 1
 	mov	w1, w2
 	bl	gc_search_src_blk
 	ands	w0, w0, 65535
-	bne	.L3146
+	bne	.L3155
 	mov	w2, 2
 	mov	w1, 3
 	ldrb	w0, [x24, #:lo12:.LANCHOR70]
-	b	.L3240
-.L3144:
+	b	.L3249
+.L3153:
 	cmp	w20, w0
-	bcs	.L3147
+	bcs	.L3156
 	strb	wzr, [x24, #:lo12:.LANCHOR70]
 	mov	w2, 8
 	mov	w1, 3
 	mov	w0, 0
-	b	.L3240
-.L3142:
+	b	.L3249
+.L3151:
 	cmp	w20, w1
-	bge	.L3147
-	b	.L3222
-.L3119:
+	bge	.L3156
+	b	.L3231
+.L3128:
 	adrp	x7, .LANCHOR63
 	mov	w0, 65535
 	ldrh	w1, [x7, #:lo12:.LANCHOR63]
 	cmp	w1, w0
-	bne	.L3148
+	bne	.L3157
 	bl	gc_get_src_blk
 	strh	w0, [x7, #:lo12:.LANCHOR63]
-.L3148:
+.L3157:
 	ldrh	w3, [x7, #:lo12:.LANCHOR63]
 	mov	w0, 65535
 	add	x1, x7, :lo12:.LANCHOR63
 	cmp	w3, w0
-	beq	.L3149
+	beq	.L3158
 	adrp	x0, .LANCHOR3
 	ldrh	w5, [x1, 56]
 	uxtw	x4, w3
 	ldr	x2, [x0, #:lo12:.LANCHOR3]
 	add	x2, x2, x4, lsl 2
-	cbz	w5, .L3150
+	cbz	w5, .L3159
 	add	x1, x1, 58
 	mov	w0, 0
-.L3152:
+.L3161:
 	ldrh	w6, [x1], 2
 	cmp	w6, w3
-	bne	.L3151
-.L3156:
+	bne	.L3160
+.L3165:
 	adrp	x0, .LANCHOR63
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR63]
-	b	.L3222
-.L3151:
+	b	.L3231
+.L3160:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w5, w0
-	bne	.L3152
-.L3150:
+	bne	.L3161
+.L3159:
 	ldrb	w0, [x2, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L3153
+	beq	.L3162
 	tst	w0, 192
-	bne	.L3154
-.L3153:
+	bne	.L3163
+.L3162:
 	adrp	x0, .LANCHOR4
 	ldr	x0, [x0, #:lo12:.LANCHOR4]
 	ldrh	w0, [x0, x4, lsl 1]
-	cbz	w0, .L3156
+	cbz	w0, .L3165
 	mov	w2, 1972
 	adrp	x1, .LANCHOR208
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR208
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3156
-.L3154:
+	b	.L3165
+.L3163:
 	mov	w0, 2
-	b	.L3245
-.L3149:
-	strb	wzr, [x19, #:lo12:.LANCHOR135]
-	b	.L3222
-.L3120:
+	b	.L3254
+.L3158:
+	strb	wzr, [x19, #:lo12:.LANCHOR138]
+	b	.L3231
+.L3129:
 	bl	gc_scan_src_blk
 	cmn	w0, #1
-	bne	.L3157
+	bne	.L3166
 	mov	w0, 3
-	b	.L3245
-.L3157:
+	b	.L3254
+.L3166:
 	adrp	x20, .LANCHOR63
 	mov	w2, 65535
 	add	x1, x20, :lo12:.LANCHOR63
 	ldrh	w0, [x20, #:lo12:.LANCHOR63]
 	cmp	w0, w2
-	beq	.L3129
+	beq	.L3138
 	ldrh	w2, [x1, 24]
-	cbz	w2, .L3158
+	cbz	w2, .L3167
 	mov	w0, 4
 	strh	wzr, [x1, 26]
-	strb	w0, [x19, #:lo12:.LANCHOR135]
-	b	.L3222
-.L3158:
+	strb	w0, [x19, #:lo12:.LANCHOR138]
+	b	.L3231
+.L3167:
 	mov	w1, 1
-	strb	w1, [x19, #:lo12:.LANCHOR135]
+	strb	w1, [x19, #:lo12:.LANCHOR138]
 	adrp	x19, .LANCHOR4
 	ubfiz	x0, x0, 1, 16
 	ldr	x1, [x19, #:lo12:.LANCHOR4]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L3159
+	cbz	w0, .L3168
 	adrp	x1, .LANCHOR208
 	adrp	x0, .LC0
 	mov	w2, 2000
 	add	x1, x1, :lo12:.LANCHOR208
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3159:
+.L3168:
 	ldrh	w0, [x20, #:lo12:.LANCHOR63]
 	add	x21, x20, :lo12:.LANCHOR63
 	ldr	x2, [x19, #:lo12:.LANCHOR4]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L3156
+	cbnz	w1, .L3165
 	bl	ftl_free_sblk
 	ldr	x0, [x19, #:lo12:.LANCHOR4]
 	ldrh	w1, [x20, #:lo12:.LANCHOR63]
@@ -20147,41 +20210,41 @@ zftl_do_gc:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w0, 8
-	bhi	.L3161
+	bhi	.L3170
 	strh	w0, [x21, 30]
-	b	.L3156
-.L3161:
+	b	.L3165
+.L3170:
 	strh	wzr, [x21, 30]
 	bl	ftl_flush
 	bl	pm_flush
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L3156
-.L3121:
+	b	.L3165
+.L3130:
 	adrp	x22, .LANCHOR63
 	adrp	x23, .LANCHOR80
 	add	x21, x22, :lo12:.LANCHOR63
 	add	x23, x23, :lo12:.LANCHOR80
-.L3223:
+.L3232:
 	bl	gc_scan_src_blk_one_page
 	ldrh	w1, [x21, 2]
 	ldrh	w0, [x23]
 	cmp	w1, w0
-	bcs	.L3162
+	bcs	.L3171
 	cmp	w20, 7
-	bls	.L3223
-	b	.L3222
-.L3162:
+	bls	.L3232
+	b	.L3231
+.L3171:
 	ldrh	w3, [x21, 24]
 	adrp	x0, .LANCHOR7
-	cbz	w3, .L3163
+	cbz	w3, .L3172
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
 	mov	w1, 4
 	strh	wzr, [x21, 26]
-	strb	w1, [x19, #:lo12:.LANCHOR135]
+	strb	w1, [x19, #:lo12:.LANCHOR138]
 	adrp	x19, .LANCHOR4
-	tbz	x0, 8, .L3164
+	tbz	x0, 8, .L3173
 	ldrh	w1, [x21]
 	ldr	x2, [x19, #:lo12:.LANCHOR4]
 	ubfiz	x0, x1, 1, 16
@@ -20189,56 +20252,56 @@ zftl_do_gc:
 	adrp	x0, .LC216
 	add	x0, x0, :lo12:.LC216
 	bl	printf
-.L3164:
+.L3173:
 	ldrh	w2, [x22, #:lo12:.LANCHOR63]
 	add	x0, x22, :lo12:.LANCHOR63
 	ldr	x1, [x19, #:lo12:.LANCHOR4]
 	ldrh	w0, [x0, 24]
 	ldrh	w1, [x1, x2, lsl 1]
 	cmp	w1, w0
-	beq	.L3165
+	beq	.L3174
 	adrp	x1, .LANCHOR208
 	adrp	x0, .LC0
 	mov	w2, 2034
 	add	x1, x1, :lo12:.LANCHOR208
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3165:
+.L3174:
 	add	x0, x22, :lo12:.LANCHOR63
 	ldrh	w1, [x22, #:lo12:.LANCHOR63]
 	ldrh	w2, [x0, 24]
 	ldr	x0, [x19, #:lo12:.LANCHOR4]
 	strh	w2, [x0, x1, lsl 1]
-	b	.L3222
-.L3163:
+	b	.L3231
+.L3172:
 	adrp	x2, .LANCHOR3
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
 	ldrh	w1, [x21]
 	ldr	x20, [x2, #:lo12:.LANCHOR3]
 	mov	w2, 1
-	strb	w2, [x19, #:lo12:.LANCHOR135]
+	strb	w2, [x19, #:lo12:.LANCHOR138]
 	add	x20, x20, x1, uxth 2
-	tbz	x0, 8, .L3166
+	tbz	x0, 8, .L3175
 	ldrb	w2, [x20, 2]
 	adrp	x0, .LC217
 	add	x0, x0, :lo12:.LC217
 	ubfx	x2, x2, 5, 3
 	bl	printf
-.L3166:
+.L3175:
 	ldrb	w0, [x20, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L3167
+	beq	.L3176
 	tst	w0, 192
-	bne	.L3168
-.L3167:
+	bne	.L3177
+.L3176:
 	adrp	x1, .LANCHOR208
 	adrp	x0, .LC0
 	mov	w2, 2044
 	add	x1, x1, :lo12:.LANCHOR208
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3168:
+.L3177:
 	ldrh	w0, [x22, #:lo12:.LANCHOR63]
 	add	x19, x22, :lo12:.LANCHOR63
 	bl	ftl_free_sblk
@@ -20248,27 +20311,27 @@ zftl_do_gc:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w0, 8
-	bhi	.L3169
+	bhi	.L3178
 	strh	w0, [x19, 30]
-	b	.L3222
-.L3169:
+	b	.L3231
+.L3178:
 	strh	wzr, [x19, 30]
-.L3246:
+.L3255:
 	bl	flt_sys_flush
-	b	.L3222
-.L3122:
+	b	.L3231
+.L3131:
 	ldrh	w1, [x23, 80]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L3170
+	bne	.L3179
 	adrp	x0, .LANCHOR70
 	ldrb	w0, [x0, #:lo12:.LANCHOR70]
 	cmp	w0, 1
-	bne	.L3170
+	bne	.L3179
 	bl	ftl_flush
 	ldrh	w0, [x25, #:lo12:.LANCHOR93]
-	cbz	w0, .L3171
-.L3244:
+	cbz	w0, .L3180
+.L3253:
 	lsr	w0, w0, 1
 	mov	w1, 5
 	bl	zftl_get_free_sblk
@@ -20276,26 +20339,26 @@ zftl_do_gc:
 	mov	w19, w21
 	mov	w0, 65535
 	cmp	w21, w0
-	beq	.L3173
+	beq	.L3182
 	adrp	x0, .LANCHOR3
 	ldr	x20, [x0, #:lo12:.LANCHOR3]
 	add	x20, x20, x21, uxth 2
 	ldrb	w0, [x20, 2]
 	tst	w0, 224
-	beq	.L3174
+	beq	.L3183
 	adrp	x1, .LANCHOR208
 	adrp	x0, .LC0
 	mov	w2, 2069
 	add	x1, x1, :lo12:.LANCHOR208
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3174:
+.L3183:
 	ldrb	w0, [x20, 2]
 	mov	w1, 5
 	bfi	w0, w1, 5, 3
 	orr	w0, w0, 16
 	strb	w0, [x20, 2]
-.L3193:
+.L3202:
 	mov	w1, 1
 	mov	w0, w19
 	bl	ftl_erase_sblk
@@ -20320,16 +20383,16 @@ zftl_do_gc:
 	ldrb	w0, [x20, #:lo12:.LANCHOR72]
 	strh	wzr, [x23, 90]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR136
-	ldr	x0, [x0, #:lo12:.LANCHOR136]
+	adrp	x0, .LANCHOR139
+	ldr	x0, [x0, #:lo12:.LANCHOR139]
 	lsl	w2, w2, 2
 	bl	ftl_memset
 	ldrb	w0, [x20, #:lo12:.LANCHOR72]
 	mov	w1, 255
 	ldrh	w2, [x22, #:lo12:.LANCHOR71]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR137
-	ldr	x0, [x0, #:lo12:.LANCHOR137]
+	adrp	x0, .LANCHOR140
+	ldr	x0, [x0, #:lo12:.LANCHOR140]
 	lsl	w2, w2, 2
 	bl	ftl_memset
 	ldrb	w0, [x20, #:lo12:.LANCHOR72]
@@ -20346,9 +20409,9 @@ zftl_do_gc:
 	strh	w1, [x0, 130]
 	bl	pm_flush
 	bl	ftl_ext_info_flush
-	adrp	x0, .LANCHOR101
+	adrp	x0, .LANCHOR97
 	mov	w1, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR101]
+	ldr	x0, [x0, #:lo12:.LANCHOR97]
 	strh	w19, [x0, 126]
 	adrp	x0, .LANCHOR63
 	add	x0, x0, :lo12:.LANCHOR63
@@ -20359,12 +20422,12 @@ zftl_do_gc:
 	strh	wzr, [x0, 318]
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L3222
-.L3171:
+	b	.L3231
+.L3180:
 	adrp	x0, .LANCHOR91
 	ldrh	w0, [x0, #:lo12:.LANCHOR91]
-	b	.L3244
-.L3170:
+	b	.L3253
+.L3179:
 	cmp	w22, 1
 	mov	w22, 4
 	csinc	w22, w22, wzr, eq
@@ -20377,26 +20440,26 @@ zftl_do_gc:
 	add	x25, x25, :lo12:.LANCHOR70
 	add	x20, x21, :lo12:.LANCHOR63
 	add	x26, x23, 80
-.L3177:
+.L3186:
 	sub	w22, w22, #1
 	and	w22, w22, 255
 	cmp	w22, 255
-	beq	.L3222
+	beq	.L3231
 	bl	gc_do_copy_back
 	ldrb	w0, [x25]
-	cbnz	w0, .L3178
+	cbnz	w0, .L3187
 	adrp	x0, .LANCHOR48
 	ldrb	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 3
-	bhi	.L3179
+	bhi	.L3188
 	bl	ftl_write_commit
-.L3179:
+.L3188:
 	ldrh	w1, [x20, 26]
 	ldrh	w0, [x20, 24]
 	cmp	w1, w0
-	bcc	.L3177
+	bcc	.L3186
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR135]
+	strb	w0, [x19, #:lo12:.LANCHOR138]
 	bl	ftl_write_commit
 	bl	ftl_flush
 	adrp	x0, .LANCHOR4
@@ -20404,24 +20467,24 @@ zftl_do_gc:
 	mov	x20, x0
 	ldr	x1, [x0, #:lo12:.LANCHOR4]
 	ldrh	w1, [x1, x2, lsl 1]
-	cbz	w1, .L3181
+	cbz	w1, .L3190
 	adrp	x1, .LANCHOR208
 	adrp	x0, .LC0
 	mov	w2, 2144
 	add	x1, x1, :lo12:.LANCHOR208
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3181:
+.L3190:
 	ldrh	w1, [x21, #:lo12:.LANCHOR63]
 	add	x19, x21, :lo12:.LANCHOR63
 	ldr	x2, [x20, #:lo12:.LANCHOR4]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w2, [x2, x0]
-	cbnz	w2, .L3182
+	cbnz	w2, .L3191
 	mov	w0, w1
 	bl	ftl_free_sblk
-	b	.L3156
-.L3182:
+	b	.L3165
+.L3191:
 	ldrh	w3, [x19, 24]
 	adrp	x22, .LANCHOR64
 	adrp	x0, .LC218
@@ -20462,54 +20525,54 @@ zftl_do_gc:
 	adrp	x0, .LC222
 	add	x0, x0, :lo12:.LC222
 	bl	rknand_print_hex
-	b	.L3156
-.L3178:
+	b	.L3165
+.L3187:
 	ldrh	w0, [x20, 318]
-	cbz	w0, .L3183
+	cbz	w0, .L3192
 	ldr	w0, [x20, 320]
 	strh	wzr, [x20, 318]
 	cmn	w0, #1
-	beq	.L3184
+	beq	.L3193
 	bl	ftl_mask_bad_block
-.L3184:
+.L3193:
 	ldr	x0, [x24, #:lo12:.LANCHOR5]
 	add	x20, x21, :lo12:.LANCHOR63
 	strh	wzr, [x20, 56]
 	ldrh	w0, [x0, 80]
 	str	wzr, [x20, 320]
 	bl	ftl_free_sblk
-	adrp	x2, .LANCHOR101
+	adrp	x2, .LANCHOR97
 	ldr	x1, [x24, #:lo12:.LANCHOR5]
 	mov	w0, -1
-	ldr	x2, [x2, #:lo12:.LANCHOR101]
+	ldr	x2, [x2, #:lo12:.LANCHOR97]
 	strh	w0, [x1, 80]
 	strh	w0, [x2, 126]
 	strh	w0, [x1, 130]
 	ldr	x0, [x20, 8]
-	cbz	x0, .L3185
+	cbz	x0, .L3194
 	bl	buf_free
-.L3185:
+.L3194:
 	add	x21, x21, :lo12:.LANCHOR63
 	str	xzr, [x21, 8]
 	bl	flt_sys_flush
 	mov	w2, 2177
-	strb	wzr, [x19, #:lo12:.LANCHOR135]
+	strb	wzr, [x19, #:lo12:.LANCHOR138]
 	adrp	x1, .LANCHOR208
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR208
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3222
-.L3183:
+	b	.L3231
+.L3192:
 	ldrh	w0, [x26, 6]
 	ldrh	w1, [x20, 26]
 	cmp	w0, 1
 	ldrh	w0, [x20, 24]
-	bls	.L3186
+	bls	.L3195
 	cmp	w1, w0
-	bcc	.L3177
+	bcc	.L3186
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR135]
+	strb	w0, [x19, #:lo12:.LANCHOR138]
 	ldrh	w0, [x20, 56]
 	add	w1, w0, 1
 	strh	w1, [x20, 56]
@@ -20518,12 +20581,12 @@ zftl_do_gc:
 	strh	w1, [x0, 58]
 	mov	w0, -1
 	strh	w0, [x20]
-	b	.L3222
-.L3186:
+	b	.L3231
+.L3195:
 	mov	w2, 5
-	strb	w2, [x19, #:lo12:.LANCHOR135]
+	strb	w2, [x19, #:lo12:.LANCHOR138]
 	cmp	w1, w0
-	bcc	.L3187
+	bcc	.L3196
 	ldrh	w0, [x20, 56]
 	add	w1, w0, 1
 	strh	w1, [x20, 56]
@@ -20532,7 +20595,7 @@ zftl_do_gc:
 	strh	w1, [x0, 58]
 	mov	w0, -1
 	strh	w0, [x20]
-.L3187:
+.L3196:
 	bl	ftl_flush
 	bl	sblk_wait_write_queue_completed
 	bl	gc_write_completed
@@ -20550,37 +20613,37 @@ zftl_do_gc:
 	strh	w1, [x0, 18]
 	cmp	w2, 2
 	strh	w2, [x0, 20]
-	bne	.L3188
+	bne	.L3197
 	ubfiz	w1, w1, 1, 15
 	strh	w1, [x0, 18]
 	mov	w1, 1
 	strh	w1, [x0, 20]
-.L3188:
+.L3197:
 	add	x21, x21, :lo12:.LANCHOR63
 	strh	wzr, [x21, 22]
-	b	.L3222
-.L3190:
+	b	.L3231
+.L3199:
 	ldrh	w1, [x25, 16]
 	ldrh	w0, [x25, 18]
 	cmp	w1, w0
-	bcc	.L3191
+	bcc	.L3200
 	mov	w0, 6
-	strb	w0, [x19, #:lo12:.LANCHOR135]
+	strb	w0, [x19, #:lo12:.LANCHOR138]
 	ldr	x0, [x25, 8]
 	bl	buf_free
 	str	xzr, [x25, 8]
-	b	.L3222
-.L3191:
+	b	.L3231
+.L3200:
 	cmp	w20, 7
-	bls	.L3125
+	bls	.L3134
 	cmp	w22, 1
-	bne	.L3222
+	bne	.L3231
 	add	w23, w23, 1
 	and	w23, w23, 255
 	cmp	w23, 4
-	bls	.L3125
-	b	.L3222
-.L3124:
+	bls	.L3134
+	b	.L3231
+.L3133:
 	bl	gc_update_l2p_map_new
 	mov	w20, -1
 	bl	gc_free_src_blk
@@ -20588,22 +20651,22 @@ zftl_do_gc:
 	bl	pm_flush
 	strh	w20, [x23, 80]
 	bl	ftl_ext_info_flush
-	adrp	x0, .LANCHOR101
-	ldr	x0, [x0, #:lo12:.LANCHOR101]
+	adrp	x0, .LANCHOR97
+	ldr	x0, [x0, #:lo12:.LANCHOR97]
 	strh	w20, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-	strb	wzr, [x19, #:lo12:.LANCHOR135]
+	strb	wzr, [x19, #:lo12:.LANCHOR138]
 	bl	print_ftl_debug_info
-	b	.L3222
-.L3173:
+	b	.L3231
+.L3182:
 	mov	w2, 2075
 	adrp	x1, .LANCHOR208
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR208
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3193
+	b	.L3202
 	.size	zftl_do_gc, .-zftl_do_gc
 	.section	.text.zftl_write,"ax",@progbits
 	.align	2
@@ -20623,29 +20686,29 @@ zftl_write:
 	stp	x21, x22, [sp, 32]
 	mov	x24, x3
 	stp	x25, x26, [sp, 64]
-	tbz	x0, 12, .L3250
+	tbz	x0, 12, .L3259
 	mov	w3, w2
 	adrp	x0, .LC223
 	mov	w2, w1
 	add	x0, x0, :lo12:.LC223
 	mov	w1, w27
 	bl	printf
-.L3250:
-	cbnz	w27, .L3251
+.L3259:
+	cbnz	w27, .L3260
 	adrp	x0, .LANCHOR59
 	mov	w27, 24576
 	ldr	w0, [x0, #:lo12:.LANCHOR59]
-.L3252:
+.L3261:
 	add	w1, w19, w20
 	cmp	w0, w1
-	bcc	.L3266
-	adrp	x23, .LANCHOR114
+	bcc	.L3275
+	adrp	x23, .LANCHOR117
 	add	w27, w27, w19
 	sub	w19, w20, #1
-	adrp	x25, .LANCHOR101
-	ldrb	w0, [x23, #:lo12:.LANCHOR114]
+	adrp	x25, .LANCHOR97
+	ldrb	w0, [x23, #:lo12:.LANCHOR117]
 	add	w19, w19, w27
-	add	x23, x23, :lo12:.LANCHOR114
+	add	x23, x23, :lo12:.LANCHOR117
 	udiv	w22, w27, w0
 	udiv	w19, w19, w0
 	add	w0, w27, w20
@@ -20653,8 +20716,8 @@ zftl_write:
 	mov	w26, w22
 	sub	w21, w19, w22
 	add	w21, w21, 1
-.L3254:
-	cbnz	w21, .L3262
+.L3263:
+	cbnz	w21, .L3271
 	adrp	x20, .LANCHOR89
 	adrp	x19, .LANCHOR93
 	add	x20, x20, :lo12:.LANCHOR89
@@ -20663,14 +20726,14 @@ zftl_write:
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
-.L3263:
+.L3272:
 	ldrh	w0, [x20]
 	ldrh	w1, [x19]
 	add	w0, w0, w1
 	cmp	w0, 7
-	ble	.L3264
+	ble	.L3273
 	mov	w0, 0
-.L3249:
+.L3258:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -20678,28 +20741,28 @@ zftl_write:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L3251:
+.L3260:
 	cmp	w27, 3
-	bhi	.L3266
+	bhi	.L3275
 	lsl	w27, w27, 13
 	mov	w0, 8192
-	b	.L3252
-.L3262:
+	b	.L3261
+.L3271:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbnz	x0, .L3255
+	cbnz	x0, .L3264
 	bl	ftl_write_commit
-	b	.L3254
-.L3255:
+	b	.L3263
+.L3264:
 	ldrb	w3, [x23]
 	cmp	w26, w22
 	strb	wzr, [x0, 57]
 	ccmp	w26, w19, 4, ne
 	strb	w3, [x0, 56]
-	bne	.L3258
+	bne	.L3267
 	cmp	w26, w22
-	bne	.L3259
+	bne	.L3268
 	udiv	w0, w27, w3
 	msub	w0, w0, w3, w27
 	and	w0, w0, 255
@@ -20708,9 +20771,9 @@ zftl_write:
 	and	w3, w3, 255
 	cmp	w20, w3
 	csel	w3, w20, w3, cc
-.L3271:
+.L3280:
 	strb	w3, [x28, 56]
-.L3258:
+.L3267:
 	ldr	x3, [x28, 8]
 	mov	x1, x24
 	ldrb	w0, [x28, 57]
@@ -20720,7 +20783,7 @@ zftl_write:
 	lsl	w2, w2, 9
 	add	x0, x3, x0
 	bl	ftl_memcpy
-	ldr	x1, [x25, #:lo12:.LANCHOR101]
+	ldr	x1, [x25, #:lo12:.LANCHOR97]
 	ldr	w0, [x1, 8]
 	str	w26, [x28, 36]
 	add	w26, w26, 1
@@ -20732,19 +20795,19 @@ zftl_write:
 	ldrb	w0, [x28, 56]
 	ubfiz	x0, x0, 9, 8
 	add	x24, x24, x0
-	b	.L3254
-.L3259:
+	b	.L3263
+.L3268:
 	ldr	w0, [x29, 108]
 	msub	w3, w3, w26, w0
-	b	.L3271
-.L3264:
+	b	.L3280
+.L3273:
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
-	b	.L3263
-.L3266:
+	b	.L3272
+.L3275:
 	mov	w0, -1
-	b	.L3249
+	b	.L3258
 	.size	zftl_write, .-zftl_write
 	.section	.text.zftl_vendor_write,"ax",@progbits
 	.align	2
@@ -20803,12 +20866,12 @@ ftl_write:
 	mov	x20, x3
 	mov	w22, w1
 	ands	w21, w0, 255
-	bne	.L3277
+	bne	.L3286
 	mov	w3, w2
 	mov	w0, 0
 	mov	x2, x20
 	bl	idb_write_data
-.L3277:
+.L3286:
 	mov	x3, x20
 	mov	w2, w19
 	mov	w1, w22
@@ -20920,6 +20983,7 @@ ftl_write:
 	.global	p_free_buf_head
 	.global	free_buf_count
 	.global	g_buf
+	.global	nandc_ecc_sts
 	.global	g_nandc_v6_master_info
 	.global	nandc_randomizer_en
 	.global	nandc_hw_seed
@@ -20988,14 +21052,14 @@ _c_ftl_block_addr_log2:
 	.zero	2
 	.section	.bss._c_ftl_block_align_addr,"aw",@nobits
 	.align	1
-	.set	.LANCHOR99,. + 0
+	.set	.LANCHOR103,. + 0
 	.type	_c_ftl_block_align_addr, %object
 	.size	_c_ftl_block_align_addr, 2
 _c_ftl_block_align_addr:
 	.zero	2
 	.section	.bss._c_ftl_byte_pre_page,"aw",@nobits
 	.align	1
-	.set	.LANCHOR185,. + 0
+	.set	.LANCHOR188,. + 0
 	.type	_c_ftl_byte_pre_page, %object
 	.size	_c_ftl_byte_pre_page, 2
 _c_ftl_byte_pre_page:
@@ -21007,7 +21071,7 @@ _c_ftl_byte_pre_page:
 _c_ftl_nand_blks_per_die:
 	.zero	2
 	.section	.bss._c_ftl_nand_die_num,"aw",@nobits
-	.set	.LANCHOR100,. + 0
+	.set	.LANCHOR104,. + 0
 	.type	_c_ftl_nand_die_num, %object
 	.size	_c_ftl_nand_die_num, 1
 _c_ftl_nand_die_num:
@@ -21046,55 +21110,55 @@ _c_ftl_planes_per_die:
 	.zero	1
 	.section	.bss._c_ftl_pm_page_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR172,. + 0
+	.set	.LANCHOR175,. + 0
 	.type	_c_ftl_pm_page_num, %object
 	.size	_c_ftl_pm_page_num, 2
 _c_ftl_pm_page_num:
 	.zero	2
 	.section	.bss._c_ftl_sec_per_page,"aw",@nobits
-	.set	.LANCHOR114,. + 0
+	.set	.LANCHOR117,. + 0
 	.type	_c_ftl_sec_per_page, %object
 	.size	_c_ftl_sec_per_page, 1
 _c_ftl_sec_per_page:
 	.zero	1
 	.section	.bss._c_max_pm_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR131,. + 0
+	.set	.LANCHOR134,. + 0
 	.type	_c_max_pm_sblk, %object
 	.size	_c_max_pm_sblk, 2
 _c_max_pm_sblk:
 	.zero	2
 	.section	.bss._c_mix_max_slc_ec_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR192,. + 0
+	.set	.LANCHOR98,. + 0
 	.type	_c_mix_max_slc_ec_count, %object
 	.size	_c_mix_max_slc_ec_count, 2
 _c_mix_max_slc_ec_count:
 	.zero	2
 	.section	.bss._c_mix_max_xlc_ec_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR193,. + 0
+	.set	.LANCHOR99,. + 0
 	.type	_c_mix_max_xlc_ec_count, %object
 	.size	_c_mix_max_xlc_ec_count, 2
 _c_mix_max_xlc_ec_count:
 	.zero	2
 	.section	.bss._c_swl_slc_gc_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR130,. + 0
+	.set	.LANCHOR133,. + 0
 	.type	_c_swl_slc_gc_th, %object
 	.size	_c_swl_slc_gc_th, 2
 _c_swl_slc_gc_th:
 	.zero	2
 	.section	.bss._c_swl_xlc_gc_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR129,. + 0
+	.set	.LANCHOR132,. + 0
 	.type	_c_swl_xlc_gc_th, %object
 	.size	_c_swl_xlc_gc_th, 2
 _c_swl_xlc_gc_th:
 	.zero	2
 	.section	.bss._c_totle_data_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR190,. + 0
+	.set	.LANCHOR193,. + 0
 	.type	_c_totle_data_density, %object
 	.size	_c_totle_data_density, 4
 _c_totle_data_density:
@@ -21108,7 +21172,7 @@ _c_totle_log_page:
 	.zero	4
 	.section	.bss._c_totle_phy_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR189,. + 0
+	.set	.LANCHOR192,. + 0
 	.type	_c_totle_phy_density, %object
 	.size	_c_totle_phy_density, 4
 _c_totle_phy_density:
@@ -21141,7 +21205,7 @@ _last_write_time:
 	.zero	4
 	.section	.bss._max_slc_super_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR191,. + 0
+	.set	.LANCHOR100,. + 0
 	.type	_max_slc_super_block, %object
 	.size	_max_slc_super_block, 2
 _max_slc_super_block:
@@ -21182,7 +21246,7 @@ fill_spare_size:
 	.zero	2
 	.section	.bss.flash_read_retry,"aw",@nobits
 	.align	3
-	.set	.LANCHOR145,. + 0
+	.set	.LANCHOR148,. + 0
 	.type	flash_read_retry, %object
 	.size	flash_read_retry, 8
 flash_read_retry:
@@ -21221,7 +21285,7 @@ free_xlc_sblk:
 ftl_ext_info_data_buffer:
 	.zero	16384
 	.section	.bss.ftl_ext_info_first_write,"aw",@nobits
-	.set	.LANCHOR168,. + 0
+	.set	.LANCHOR171,. + 0
 	.type	ftl_ext_info_first_write, %object
 	.size	ftl_ext_info_first_write, 1
 ftl_ext_info_first_write:
@@ -21241,7 +21305,7 @@ ftl_info_data_buffer:
 	.zero	16384
 	.section	.bss.ftl_info_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR163,. + 0
+	.set	.LANCHOR166,. + 0
 	.type	ftl_info_spare, %object
 	.size	ftl_info_spare, 256
 ftl_info_spare:
@@ -21254,14 +21318,14 @@ ftl_info_spare:
 ftl_low_format_cur_blk:
 	.zero	2
 	.section	.bss.ftl_power_lost_flag,"aw",@nobits
-	.set	.LANCHOR167,. + 0
+	.set	.LANCHOR170,. + 0
 	.type	ftl_power_lost_flag, %object
 	.size	ftl_power_lost_flag, 1
 ftl_power_lost_flag:
 	.zero	1
 	.section	.bss.ftl_sblk_lpa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR106,. + 0
+	.set	.LANCHOR109,. + 0
 	.type	ftl_sblk_lpa_tbl, %object
 	.size	ftl_sblk_lpa_tbl, 8
 ftl_sblk_lpa_tbl:
@@ -21275,13 +21339,13 @@ ftl_sblk_vpn:
 	.zero	8
 	.section	.bss.ftl_sblk_vpn_update_id,"aw",@nobits
 	.align	1
-	.set	.LANCHOR111,. + 0
+	.set	.LANCHOR114,. + 0
 	.type	ftl_sblk_vpn_update_id, %object
 	.size	ftl_sblk_vpn_update_id, 2
 ftl_sblk_vpn_update_id:
 	.zero	2
 	.section	.bss.ftl_sys_info_first_write,"aw",@nobits
-	.set	.LANCHOR166,. + 0
+	.set	.LANCHOR169,. + 0
 	.type	ftl_sys_info_first_write, %object
 	.size	ftl_sys_info_first_write, 1
 ftl_sys_info_first_write:
@@ -21294,14 +21358,14 @@ ftl_tmp_buffer:
 	.zero	16384
 	.section	.bss.ftl_tmp_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR152,. + 0
+	.set	.LANCHOR155,. + 0
 	.type	ftl_tmp_spare, %object
 	.size	ftl_tmp_spare, 256
 ftl_tmp_spare:
 	.zero	256
 	.section	.bss.ftl_vpn_update_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR110,. + 0
+	.set	.LANCHOR113,. + 0
 	.type	ftl_vpn_update_count, %object
 	.size	ftl_vpn_update_count, 2
 ftl_vpn_update_count:
@@ -21322,7 +21386,7 @@ g_buf:
 	.zero	2048
 	.section	.bss.g_die_addr,"aw",@nobits
 	.align	2
-	.set	.LANCHOR126,. + 0
+	.set	.LANCHOR129,. + 0
 	.type	g_die_addr, %object
 	.size	g_die_addr, 32
 g_die_addr:
@@ -21335,7 +21399,7 @@ g_die_addr:
 g_die_cs_idx:
 	.zero	8
 	.section	.bss.g_flash_3d_mlc_flag,"aw",@nobits
-	.set	.LANCHOR98,. + 0
+	.set	.LANCHOR102,. + 0
 	.type	g_flash_3d_mlc_flag, %object
 	.size	g_flash_3d_mlc_flag, 1
 g_flash_3d_mlc_flag:
@@ -21348,7 +21412,7 @@ g_flash_3d_tlc_flag:
 	.zero	1
 	.section	.bss.g_flash_blk_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR148,. + 0
+	.set	.LANCHOR151,. + 0
 	.type	g_flash_blk_info, %object
 	.size	g_flash_blk_info, 4
 g_flash_blk_info:
@@ -21373,20 +21437,20 @@ g_flash_interface_mode:
 g_flash_multi_page_prog_en:
 	.zero	1
 	.section	.bss.g_flash_multi_page_read_en,"aw",@nobits
-	.set	.LANCHOR182,. + 0
+	.set	.LANCHOR185,. + 0
 	.type	g_flash_multi_page_read_en, %object
 	.size	g_flash_multi_page_read_en, 1
 g_flash_multi_page_read_en:
 	.zero	1
 	.section	.bss.g_flash_page_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR150,. + 0
+	.set	.LANCHOR153,. + 0
 	.type	g_flash_page_buffer, %object
 	.size	g_flash_page_buffer, 8
 g_flash_page_buffer:
 	.zero	8
 	.section	.bss.g_flash_reversd_blks,"aw",@nobits
-	.set	.LANCHOR154,. + 0
+	.set	.LANCHOR157,. + 0
 	.type	g_flash_reversd_blks, %object
 	.size	g_flash_reversd_blks, 1
 g_flash_reversd_blks:
@@ -21399,28 +21463,28 @@ g_flash_slc_mode:
 	.zero	1
 	.section	.bss.g_flash_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR149,. + 0
+	.set	.LANCHOR152,. + 0
 	.type	g_flash_spare_buffer, %object
 	.size	g_flash_spare_buffer, 8
 g_flash_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_sys_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR147,. + 0
+	.set	.LANCHOR150,. + 0
 	.type	g_flash_sys_spare_buffer, %object
 	.size	g_flash_sys_spare_buffer, 8
 g_flash_sys_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_tmp_page_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR140,. + 0
+	.set	.LANCHOR143,. + 0
 	.type	g_flash_tmp_page_buffer, %object
 	.size	g_flash_tmp_page_buffer, 8
 g_flash_tmp_page_buffer:
 	.zero	8
 	.section	.bss.g_flash_tmp_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR142,. + 0
+	.set	.LANCHOR145,. + 0
 	.type	g_flash_tmp_spare_buffer, %object
 	.size	g_flash_tmp_spare_buffer, 8
 g_flash_tmp_spare_buffer:
@@ -21433,7 +21497,7 @@ g_flash_toggle_mode_en:
 	.zero	1
 	.section	.bss.g_ftl_info_blk,"aw",@nobits
 	.align	6
-	.set	.LANCHOR164,. + 0
+	.set	.LANCHOR167,. + 0
 	.type	g_ftl_info_blk, %object
 	.size	g_ftl_info_blk, 4
 g_ftl_info_blk:
@@ -21452,7 +21516,7 @@ g_gc_info:
 g_idb_ecc_bits:
 	.zero	1
 	.section	.bss.g_idb_slc_mode_enable,"aw",@nobits
-	.set	.LANCHOR155,. + 0
+	.set	.LANCHOR158,. + 0
 	.type	g_idb_slc_mode_enable, %object
 	.size	g_idb_slc_mode_enable, 1
 g_idb_slc_mode_enable:
@@ -21471,14 +21535,14 @@ g_lsb_page_tbl:
 g_maxRegNum:
 	.zero	1
 	.section	.bss.g_maxRetryCount,"aw",@nobits
-	.set	.LANCHOR143,. + 0
+	.set	.LANCHOR146,. + 0
 	.type	g_maxRetryCount, %object
 	.size	g_maxRetryCount, 1
 g_maxRetryCount:
 	.zero	1
 	.section	.bss.g_msb_page_tbl,"aw",@nobits
 	.align	2
-	.set	.LANCHOR123,. + 0
+	.set	.LANCHOR126,. + 0
 	.type	g_msb_page_tbl, %object
 	.size	g_msb_page_tbl, 1024
 g_msb_page_tbl:
@@ -21503,7 +21567,7 @@ g_nand_opt_para:
 g_nandc_ecc_bits:
 	.zero	1
 	.section	.bss.g_nandc_tran_timeout,"aw",@nobits
-	.set	.LANCHOR141,. + 0
+	.set	.LANCHOR144,. + 0
 	.type	g_nandc_tran_timeout, %object
 	.size	g_nandc_tran_timeout, 1
 g_nandc_tran_timeout:
@@ -21523,7 +21587,7 @@ g_nandc_ver:
 	.zero	1
 	.section	.bss.g_pm_spare,"aw",@nobits
 	.align	3
-	.set	.LANCHOR176,. + 0
+	.set	.LANCHOR179,. + 0
 	.type	g_pm_spare, %object
 	.size	g_pm_spare, 8
 g_pm_spare:
@@ -21547,21 +21611,21 @@ g_slc_mode_enable:
 	.zero	1
 	.section	.bss.g_slc_page_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR125,. + 0
+	.set	.LANCHOR128,. + 0
 	.type	g_slc_page_num, %object
 	.size	g_slc_page_num, 2
 g_slc_page_num:
 	.zero	2
 	.section	.bss.g_totle_phy_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR127,. + 0
+	.set	.LANCHOR130,. + 0
 	.type	g_totle_phy_block, %object
 	.size	g_totle_phy_block, 2
 g_totle_phy_block:
 	.zero	2
 	.section	.bss.gc_des_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR138,. + 0
+	.set	.LANCHOR141,. + 0
 	.type	gc_des_ppa_tbl, %object
 	.size	gc_des_ppa_tbl, 8
 gc_des_ppa_tbl:
@@ -21575,7 +21639,7 @@ gc_free_slc_sblk_th:
 	.zero	2
 	.section	.bss.gc_lpa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR136,. + 0
+	.set	.LANCHOR139,. + 0
 	.type	gc_lpa_tbl, %object
 	.size	gc_lpa_tbl, 8
 gc_lpa_tbl:
@@ -21595,7 +21659,7 @@ gc_page_buf_id:
 	.zero	8
 	.section	.bss.gc_pre_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR137,. + 0
+	.set	.LANCHOR140,. + 0
 	.type	gc_pre_ppa_tbl, %object
 	.size	gc_pre_ppa_tbl, 8
 gc_pre_ppa_tbl:
@@ -21629,7 +21693,7 @@ gc_slc_mode_tlc_vpn_th:
 gc_slc_mode_vpn_th:
 	.zero	2
 	.section	.bss.gc_state,"aw",@nobits
-	.set	.LANCHOR135,. + 0
+	.set	.LANCHOR138,. + 0
 	.type	gc_state, %object
 	.size	gc_state, 1
 gc_state:
@@ -21733,7 +21797,7 @@ gp_ftl_ext_info:
 	.zero	8
 	.section	.bss.gp_ftl_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR101,. + 0
+	.set	.LANCHOR97,. + 0
 	.type	gp_ftl_info, %object
 	.size	gp_ftl_info, 8
 gp_ftl_info:
@@ -21767,25 +21831,31 @@ idb_buf:
 	.zero	262144
 	.section	.bss.idb_need_write_back,"aw",@nobits
 	.align	2
-	.set	.LANCHOR156,. + 0
+	.set	.LANCHOR159,. + 0
 	.type	idb_need_write_back, %object
 	.size	idb_need_write_back, 4
 idb_need_write_back:
 	.zero	4
 	.section	.bss.lpa_hash,"aw",@nobits
 	.align	3
-	.set	.LANCHOR105,. + 0
+	.set	.LANCHOR108,. + 0
 	.type	lpa_hash, %object
 	.size	lpa_hash, 512
 lpa_hash:
 	.zero	512
 	.section	.bss.lpa_hash_index,"aw",@nobits
 	.align	3
-	.set	.LANCHOR107,. + 0
+	.set	.LANCHOR110,. + 0
 	.type	lpa_hash_index, %object
 	.size	lpa_hash_index, 8
 lpa_hash_index:
 	.zero	8
+	.section	.bss.nandc_ecc_sts,"aw",@nobits
+	.align	3
+	.type	nandc_ecc_sts, %object
+	.size	nandc_ecc_sts, 16
+nandc_ecc_sts:
+	.zero	16
 	.section	.bss.nandc_hw_seed,"aw",@nobits
 	.set	.LANCHOR41,. + 0
 	.type	nandc_hw_seed, %object
@@ -21812,33 +21882,33 @@ p_free_buf_head:
 p_read_ahead_ext_buf:
 	.zero	8
 	.section	.bss.pm_first_write,"aw",@nobits
-	.set	.LANCHOR177,. + 0
+	.set	.LANCHOR180,. + 0
 	.type	pm_first_write, %object
 	.size	pm_first_write, 1
 pm_first_write:
 	.zero	1
 	.section	.bss.pm_gc_enable,"aw",@nobits
 	.align	2
-	.set	.LANCHOR118,. + 0
+	.set	.LANCHOR121,. + 0
 	.type	pm_gc_enable, %object
 	.size	pm_gc_enable, 4
 pm_gc_enable:
 	.zero	4
 	.section	.bss.pm_last_load_ram_id,"aw",@nobits
-	.set	.LANCHOR187,. + 0
+	.set	.LANCHOR190,. + 0
 	.type	pm_last_load_ram_id, %object
 	.size	pm_last_load_ram_id, 1
 pm_last_load_ram_id:
 	.zero	1
 	.section	.bss.pm_last_update_ram_id,"aw",@nobits
-	.set	.LANCHOR121,. + 0
+	.set	.LANCHOR124,. + 0
 	.type	pm_last_update_ram_id, %object
 	.size	pm_last_update_ram_id, 1
 pm_last_update_ram_id:
 	.zero	1
 	.section	.bss.pm_ram_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR120,. + 0
+	.set	.LANCHOR123,. + 0
 	.type	pm_ram_info, %object
 	.size	pm_ram_info, 512
 pm_ram_info:
@@ -21857,7 +21927,7 @@ read_ahead_lpa:
 sblk_gc_write_completed_queue_head:
 	.zero	1
 	.section	.bss.sblk_queue_head,"aw",@nobits
-	.set	.LANCHOR117,. + 0
+	.set	.LANCHOR120,. + 0
 	.type	sblk_queue_head, %object
 	.size	sblk_queue_head, 1
 sblk_queue_head:
@@ -21869,7 +21939,7 @@ sblk_queue_head:
 sblk_read_completed_queue_head:
 	.zero	1
 	.section	.bss.sblk_write_completed_queue_head,"aw",@nobits
-	.set	.LANCHOR115,. + 0
+	.set	.LANCHOR118,. + 0
 	.type	sblk_write_completed_queue_head, %object
 	.size	sblk_write_completed_queue_head, 1
 sblk_write_completed_queue_head:
@@ -21901,13 +21971,13 @@ write_buf_count:
 write_buf_head:
 	.zero	1
 	.section	.bss.write_commit_count,"aw",@nobits
-	.set	.LANCHOR112,. + 0
+	.set	.LANCHOR115,. + 0
 	.type	write_commit_count, %object
 	.size	write_commit_count, 1
 write_commit_count:
 	.zero	1
 	.section	.bss.write_commit_head,"aw",@nobits
-	.set	.LANCHOR160,. + 0
+	.set	.LANCHOR163,. + 0
 	.type	write_commit_head, %object
 	.size	write_commit_head, 1
 write_commit_head:
@@ -21955,7 +22025,7 @@ g_nand_para_info:
 	.byte	0
 	.section	.data.hy_f26_ref_value,"aw",@progbits
 	.align	3
-	.set	.LANCHOR139,. + 0
+	.set	.LANCHOR142,. + 0
 	.type	hy_f26_ref_value, %object
 	.size	hy_f26_ref_value, 28
 hy_f26_ref_value:
@@ -21989,7 +22059,7 @@ hy_f26_ref_value:
 	.byte	-37
 	.section	.data.nand_opt_para,"aw",@progbits
 	.align	3
-	.set	.LANCHOR181,. + 0
+	.set	.LANCHOR184,. + 0
 	.type	nand_opt_para, %object
 	.size	nand_opt_para, 128
 nand_opt_para:
@@ -22834,7 +22904,7 @@ zftl_debug:
 	.word	17476
 	.section	.data.zftl_nand_flash_para_tbl,"aw",@progbits
 	.align	3
-	.set	.LANCHOR180,. + 0
+	.set	.LANCHOR183,. + 0
 	.type	zftl_nand_flash_para_tbl, %object
 	.size	zftl_nand_flash_para_tbl, 960
 zftl_nand_flash_para_tbl:
@@ -23678,432 +23748,432 @@ zftl_nand_flash_para_tbl:
 	.byte	-65
 	.byte	-66
 	.byte	0
-	.section	.rodata.__func__.10041,"a",@progbits
+	.section	.rodata.__func__.10035,"a",@progbits
 	.align	3
 	.set	.LANCHOR1,. + 0
-	.type	__func__.10041, %object
-	.size	__func__.10041, 18
-__func__.10041:
+	.type	__func__.10035, %object
+	.size	__func__.10035, 18
+__func__.10035:
 	.string	"_list_remove_node"
-	.section	.rodata.__func__.10066,"a",@progbits
+	.section	.rodata.__func__.10060,"a",@progbits
 	.align	3
 	.set	.LANCHOR6,. + 0
-	.type	__func__.10066, %object
-	.size	__func__.10066, 23
-__func__.10066:
+	.type	__func__.10060, %object
+	.size	__func__.10060, 23
+__func__.10060:
 	.string	"_list_update_data_list"
-	.section	.rodata.__func__.10165,"a",@progbits
+	.section	.rodata.__func__.10159,"a",@progbits
 	.align	3
-	.set	.LANCHOR165,. + 0
-	.type	__func__.10165, %object
-	.size	__func__.10165, 15
-__func__.10165:
+	.set	.LANCHOR168,. + 0
+	.type	__func__.10159, %object
+	.size	__func__.10159, 15
+__func__.10159:
 	.string	"ftl_info_flush"
-	.section	.rodata.__func__.10197,"a",@progbits
+	.section	.rodata.__func__.10191,"a",@progbits
 	.align	3
-	.set	.LANCHOR116,. + 0
-	.type	__func__.10197, %object
-	.size	__func__.10197, 15
-__func__.10197:
+	.set	.LANCHOR119,. + 0
+	.type	__func__.10191, %object
+	.size	__func__.10191, 15
+__func__.10191:
 	.string	"ftl_alloc_sblk"
-	.section	.rodata.__func__.10235,"a",@progbits
+	.section	.rodata.__func__.10233,"a",@progbits
 	.align	3
-	.set	.LANCHOR102,. + 0
-	.type	__func__.10235, %object
-	.size	__func__.10235, 18
-__func__.10235:
+	.set	.LANCHOR105,. + 0
+	.type	__func__.10233, %object
+	.size	__func__.10233, 18
+__func__.10233:
 	.string	"ftl_alloc_sys_blk"
-	.section	.rodata.__func__.10245,"a",@progbits
+	.section	.rodata.__func__.10243,"a",@progbits
 	.align	3
-	.set	.LANCHOR103,. + 0
-	.type	__func__.10245, %object
-	.size	__func__.10245, 17
-__func__.10245:
+	.set	.LANCHOR106,. + 0
+	.type	__func__.10243, %object
+	.size	__func__.10243, 17
+__func__.10243:
 	.string	"ftl_free_sys_blk"
-	.section	.rodata.__func__.10280,"a",@progbits
+	.section	.rodata.__func__.10278,"a",@progbits
 	.align	3
 	.set	.LANCHOR196,. + 0
-	.type	__func__.10280, %object
-	.size	__func__.10280, 14
-__func__.10280:
+	.type	__func__.10278, %object
+	.size	__func__.10278, 14
+__func__.10278:
 	.string	"ftl_sblk_dump"
-	.section	.rodata.__func__.10304,"a",@progbits
+	.section	.rodata.__func__.10302,"a",@progbits
 	.align	3
-	.set	.LANCHOR183,. + 0
-	.type	__func__.10304, %object
-	.size	__func__.10304, 16
-__func__.10304:
+	.set	.LANCHOR186,. + 0
+	.type	__func__.10302, %object
+	.size	__func__.10302, 16
+__func__.10302:
 	.string	"ftl_sysblk_dump"
-	.section	.rodata.__func__.10323,"a",@progbits
+	.section	.rodata.__func__.10321,"a",@progbits
 	.align	3
-	.set	.LANCHOR174,. + 0
-	.type	__func__.10323, %object
-	.size	__func__.10323, 23
-__func__.10323:
+	.set	.LANCHOR177,. + 0
+	.type	__func__.10321, %object
+	.size	__func__.10321, 23
+__func__.10321:
 	.string	"ftl_open_sblk_recovery"
-	.section	.rodata.__func__.10349,"a",@progbits
+	.section	.rodata.__func__.10347,"a",@progbits
 	.align	3
-	.set	.LANCHOR104,. + 0
-	.type	__func__.10349, %object
-	.size	__func__.10349, 23
-__func__.10349:
+	.set	.LANCHOR107,. + 0
+	.type	__func__.10347, %object
+	.size	__func__.10347, 23
+__func__.10347:
 	.string	"ftl_get_ppa_from_index"
-	.section	.rodata.__func__.10370,"a",@progbits
+	.section	.rodata.__func__.10368,"a",@progbits
 	.align	3
 	.set	.LANCHOR200,. + 0
-	.type	__func__.10370, %object
-	.size	__func__.10370, 19
-__func__.10370:
+	.type	__func__.10368, %object
+	.size	__func__.10368, 19
+__func__.10368:
 	.string	"ftl_update_l2p_map"
-	.section	.rodata.__func__.10389,"a",@progbits
+	.section	.rodata.__func__.10386,"a",@progbits
 	.align	3
-	.set	.LANCHOR108,. + 0
-	.type	__func__.10389, %object
-	.size	__func__.10389, 22
-__func__.10389:
+	.set	.LANCHOR111,. + 0
+	.type	__func__.10386, %object
+	.size	__func__.10386, 22
+__func__.10386:
 	.string	"ftl_get_new_free_page"
-	.section	.rodata.__func__.10400,"a",@progbits
+	.section	.rodata.__func__.10397,"a",@progbits
 	.align	3
-	.set	.LANCHOR109,. + 0
-	.type	__func__.10400, %object
-	.size	__func__.10400, 22
-__func__.10400:
+	.set	.LANCHOR112,. + 0
+	.type	__func__.10397, %object
+	.size	__func__.10397, 22
+__func__.10397:
 	.string	"ftl_ext_alloc_new_blk"
-	.section	.rodata.__func__.10425,"a",@progbits
+	.section	.rodata.__func__.10422,"a",@progbits
 	.align	3
-	.set	.LANCHOR169,. + 0
-	.type	__func__.10425, %object
-	.size	__func__.10425, 19
-__func__.10425:
+	.set	.LANCHOR172,. + 0
+	.type	__func__.10422, %object
+	.size	__func__.10422, 19
+__func__.10422:
 	.string	"ftl_ext_info_flush"
-	.section	.rodata.__func__.10437,"a",@progbits
+	.section	.rodata.__func__.10434,"a",@progbits
 	.align	3
-	.set	.LANCHOR170,. + 0
-	.type	__func__.10437, %object
-	.size	__func__.10437, 18
-__func__.10437:
+	.set	.LANCHOR173,. + 0
+	.type	__func__.10434, %object
+	.size	__func__.10434, 18
+__func__.10434:
 	.string	"ftl_ext_info_init"
-	.section	.rodata.__func__.10483,"a",@progbits
+	.section	.rodata.__func__.10480,"a",@progbits
 	.align	3
-	.set	.LANCHOR171,. + 0
-	.type	__func__.10483, %object
-	.size	__func__.10483, 15
-__func__.10483:
+	.set	.LANCHOR174,. + 0
+	.type	__func__.10480, %object
+	.size	__func__.10480, 15
+__func__.10480:
 	.string	"ftl_low_format"
-	.section	.rodata.__func__.10527,"a",@progbits
+	.section	.rodata.__func__.10524,"a",@progbits
 	.align	3
-	.set	.LANCHOR173,. + 0
-	.type	__func__.10527, %object
-	.size	__func__.10527, 23
-__func__.10527:
+	.set	.LANCHOR176,. + 0
+	.type	__func__.10524, %object
+	.size	__func__.10524, 23
+__func__.10524:
 	.string	"ftl_re_low_format_test"
-	.section	.rodata.__func__.10537,"a",@progbits
+	.section	.rodata.__func__.10534,"a",@progbits
 	.align	3
-	.set	.LANCHOR162,. + 0
-	.type	__func__.10537, %object
-	.size	__func__.10537, 14
-__func__.10537:
+	.set	.LANCHOR165,. + 0
+	.type	__func__.10534, %object
+	.size	__func__.10534, 14
+__func__.10534:
 	.string	"ftl_prog_page"
-	.section	.rodata.__func__.10712,"a",@progbits
+	.section	.rodata.__func__.10709,"a",@progbits
 	.align	3
-	.set	.LANCHOR159,. + 0
-	.type	__func__.10712, %object
-	.size	__func__.10712, 15
-__func__.10712:
+	.set	.LANCHOR162,. + 0
+	.type	__func__.10709, %object
+	.size	__func__.10709, 15
+__func__.10709:
 	.string	"sblk_prog_page"
-	.section	.rodata.__func__.10772,"a",@progbits
+	.section	.rodata.__func__.10769,"a",@progbits
 	.align	3
-	.set	.LANCHOR184,. + 0
-	.type	__func__.10772, %object
-	.size	__func__.10772, 16
-__func__.10772:
+	.set	.LANCHOR187,. + 0
+	.type	__func__.10769, %object
+	.size	__func__.10769, 16
+__func__.10769:
 	.string	"load_l2p_region"
-	.section	.rodata.__func__.10786,"a",@progbits
+	.section	.rodata.__func__.10783,"a",@progbits
 	.align	3
-	.set	.LANCHOR132,. + 0
-	.type	__func__.10786, %object
-	.size	__func__.10786, 13
-__func__.10786:
+	.set	.LANCHOR135,. + 0
+	.type	__func__.10783, %object
+	.size	__func__.10783, 13
+__func__.10783:
 	.string	"pm_free_sblk"
-	.section	.rodata.__func__.10806,"a",@progbits
+	.section	.rodata.__func__.10803,"a",@progbits
 	.align	3
-	.set	.LANCHOR186,. + 0
-	.type	__func__.10806, %object
-	.size	__func__.10806, 6
-__func__.10806:
+	.set	.LANCHOR189,. + 0
+	.type	__func__.10803, %object
+	.size	__func__.10803, 6
+__func__.10803:
 	.string	"pm_gc"
-	.section	.rodata.__func__.10822,"a",@progbits
+	.section	.rodata.__func__.10819,"a",@progbits
 	.align	3
-	.set	.LANCHOR119,. + 0
-	.type	__func__.10822, %object
-	.size	__func__.10822, 17
-__func__.10822:
+	.set	.LANCHOR122,. + 0
+	.type	__func__.10819, %object
+	.size	__func__.10819, 17
+__func__.10819:
 	.string	"pm_alloc_new_blk"
-	.section	.rodata.__func__.10832,"a",@progbits
+	.section	.rodata.__func__.10829,"a",@progbits
 	.align	3
-	.set	.LANCHOR175,. + 0
-	.type	__func__.10832, %object
-	.size	__func__.10832, 14
-__func__.10832:
+	.set	.LANCHOR178,. + 0
+	.type	__func__.10829, %object
+	.size	__func__.10829, 14
+__func__.10829:
 	.string	"pm_write_page"
-	.section	.rodata.__func__.10850,"a",@progbits
+	.section	.rodata.__func__.10847,"a",@progbits
 	.align	3
-	.set	.LANCHOR122,. + 0
-	.type	__func__.10850, %object
-	.size	__func__.10850, 21
-__func__.10850:
+	.set	.LANCHOR125,. + 0
+	.type	__func__.10847, %object
+	.size	__func__.10847, 21
+__func__.10847:
 	.string	"pm_select_ram_region"
-	.section	.rodata.__func__.8494,"a",@progbits
+	.section	.rodata.__func__.8490,"a",@progbits
 	.align	3
-	.set	.LANCHOR144,. + 0
-	.type	__func__.8494, %object
-	.size	__func__.8494, 19
-__func__.8494:
+	.set	.LANCHOR147,. + 0
+	.type	__func__.8490, %object
+	.size	__func__.8490, 19
+__func__.8490:
 	.string	"flash_read_page_en"
-	.section	.rodata.__func__.8523,"a",@progbits
+	.section	.rodata.__func__.8519,"a",@progbits
 	.align	3
-	.set	.LANCHOR161,. + 0
-	.type	__func__.8523, %object
-	.size	__func__.8523, 19
-__func__.8523:
+	.set	.LANCHOR164,. + 0
+	.type	__func__.8519, %object
+	.size	__func__.8519, 19
+__func__.8519:
 	.string	"flash_prog_page_en"
-	.section	.rodata.__func__.8538,"a",@progbits
+	.section	.rodata.__func__.8534,"a",@progbits
 	.align	3
 	.set	.LANCHOR35,. + 0
-	.type	__func__.8538, %object
-	.size	__func__.8538, 26
-__func__.8538:
+	.type	__func__.8534, %object
+	.size	__func__.8534, 26
+__func__.8534:
 	.string	"flash_erase_duplane_block"
-	.section	.rodata.__func__.8549,"a",@progbits
+	.section	.rodata.__func__.8545,"a",@progbits
 	.align	3
 	.set	.LANCHOR37,. + 0
-	.type	__func__.8549, %object
-	.size	__func__.8549, 21
-__func__.8549:
+	.type	__func__.8545, %object
+	.size	__func__.8545, 21
+__func__.8545:
 	.string	"flash_erase_block_en"
-	.section	.rodata.__func__.8563,"a",@progbits
+	.section	.rodata.__func__.8559,"a",@progbits
 	.align	3
 	.set	.LANCHOR23,. + 0
-	.type	__func__.8563, %object
-	.size	__func__.8563, 28
-__func__.8563:
+	.type	__func__.8559, %object
+	.size	__func__.8559, 28
+__func__.8559:
 	.string	"flash_wait_device_ready_raw"
-	.section	.rodata.__func__.8587,"a",@progbits
+	.section	.rodata.__func__.8583,"a",@progbits
 	.align	3
-	.set	.LANCHOR157,. + 0
-	.type	__func__.8587, %object
-	.size	__func__.8587, 26
-__func__.8587:
+	.set	.LANCHOR160,. + 0
+	.type	__func__.8583, %object
+	.size	__func__.8583, 26
+__func__.8583:
 	.string	"flash_start_tlc_page_prog"
-	.section	.rodata.__func__.8600,"a",@progbits
+	.section	.rodata.__func__.8596,"a",@progbits
 	.align	3
-	.set	.LANCHOR158,. + 0
-	.type	__func__.8600, %object
-	.size	__func__.8600, 22
-__func__.8600:
+	.set	.LANCHOR161,. + 0
+	.type	__func__.8596, %object
+	.size	__func__.8596, 22
+__func__.8596:
 	.string	"flash_start_page_prog"
-	.section	.rodata.__func__.8613,"a",@progbits
+	.section	.rodata.__func__.8609,"a",@progbits
 	.align	3
 	.set	.LANCHOR34,. + 0
-	.type	__func__.8613, %object
-	.size	__func__.8613, 22
-__func__.8613:
+	.type	__func__.8609, %object
+	.size	__func__.8609, 22
+__func__.8609:
 	.string	"flash_start_page_read"
-	.section	.rodata.__func__.8628,"a",@progbits
+	.section	.rodata.__func__.8624,"a",@progbits
 	.align	3
-	.set	.LANCHOR151,. + 0
-	.type	__func__.8628, %object
-	.size	__func__.8628, 25
-__func__.8628:
+	.set	.LANCHOR154,. + 0
+	.type	__func__.8624, %object
+	.size	__func__.8624, 25
+__func__.8624:
 	.string	"flash_complete_page_read"
-	.section	.rodata.__func__.8944,"a",@progbits
+	.section	.rodata.__func__.8937,"a",@progbits
 	.align	3
-	.set	.LANCHOR124,. + 0
-	.type	__func__.8944, %object
-	.size	__func__.8944, 20
-__func__.8944:
+	.set	.LANCHOR127,. + 0
+	.type	__func__.8937, %object
+	.size	__func__.8937, 20
+__func__.8937:
 	.string	"flash_die_info_init"
-	.section	.rodata.__func__.8954,"a",@progbits
+	.section	.rodata.__func__.8947,"a",@progbits
 	.align	3
 	.set	.LANCHOR8,. + 0
-	.type	__func__.8954, %object
-	.size	__func__.8954, 22
-__func__.8954:
+	.type	__func__.8947, %object
+	.size	__func__.8947, 22
+__func__.8947:
 	.string	"nand_flash_print_info"
-	.section	.rodata.__func__.8998,"a",@progbits
+	.section	.rodata.__func__.8991,"a",@progbits
 	.align	3
-	.set	.LANCHOR179,. + 0
-	.type	__func__.8998, %object
-	.size	__func__.8998, 16
-__func__.8998:
+	.set	.LANCHOR182,. + 0
+	.type	__func__.8991, %object
+	.size	__func__.8991, 16
+__func__.8991:
 	.string	"nand_flash_init"
-	.section	.rodata.__func__.9017,"a",@progbits
+	.section	.rodata.__func__.9011,"a",@progbits
 	.align	3
-	.set	.LANCHOR134,. + 0
-	.type	__func__.9017, %object
-	.size	__func__.9017, 11
-__func__.9017:
+	.set	.LANCHOR137,. + 0
+	.type	__func__.9011, %object
+	.size	__func__.9011, 11
+__func__.9011:
 	.string	"nandc_init"
-	.section	.rodata.__func__.9177,"a",@progbits
+	.section	.rodata.__func__.9171,"a",@progbits
 	.align	3
 	.set	.LANCHOR49,. + 0
-	.type	__func__.9177, %object
-	.size	__func__.9177, 13
-__func__.9177:
+	.type	__func__.9171, %object
+	.size	__func__.9171, 13
+__func__.9171:
 	.string	"buf_add_tail"
-	.section	.rodata.__func__.9190,"a",@progbits
+	.section	.rodata.__func__.9184,"a",@progbits
 	.align	3
 	.set	.LANCHOR50,. + 0
-	.type	__func__.9190, %object
-	.size	__func__.9190, 10
-__func__.9190:
+	.type	__func__.9184, %object
+	.size	__func__.9184, 10
+__func__.9184:
 	.string	"buf_alloc"
-	.section	.rodata.__func__.9204,"a",@progbits
+	.section	.rodata.__func__.9198,"a",@progbits
 	.align	3
 	.set	.LANCHOR51,. + 0
-	.type	__func__.9204, %object
-	.size	__func__.9204, 16
-__func__.9204:
+	.type	__func__.9198, %object
+	.size	__func__.9198, 16
+__func__.9198:
 	.string	"buf_remove_free"
-	.section	.rodata.__func__.9216,"a",@progbits
+	.section	.rodata.__func__.9210,"a",@progbits
 	.align	3
-	.set	.LANCHOR146,. + 0
-	.type	__func__.9216, %object
-	.size	__func__.9216, 20
-__func__.9216:
+	.set	.LANCHOR149,. + 0
+	.type	__func__.9210, %object
+	.size	__func__.9210, 20
+__func__.9210:
 	.string	"flash_info_blk_init"
-	.section	.rodata.__func__.9227,"a",@progbits
+	.section	.rodata.__func__.9221,"a",@progbits
 	.align	3
-	.set	.LANCHOR133,. + 0
-	.type	__func__.9227, %object
-	.size	__func__.9227, 21
-__func__.9227:
+	.set	.LANCHOR136,. + 0
+	.type	__func__.9221, %object
+	.size	__func__.9221, 21
+__func__.9221:
 	.string	"flash_into_data_init"
-	.section	.rodata.__func__.9249,"a",@progbits
+	.section	.rodata.__func__.9243,"a",@progbits
 	.align	3
-	.set	.LANCHOR178,. + 0
-	.type	__func__.9249, %object
-	.size	__func__.9249, 17
-__func__.9249:
+	.set	.LANCHOR181,. + 0
+	.type	__func__.9243, %object
+	.size	__func__.9243, 17
+__func__.9243:
 	.string	"flash_info_flush"
-	.section	.rodata.__func__.9322,"a",@progbits
+	.section	.rodata.__func__.9316,"a",@progbits
 	.align	3
-	.set	.LANCHOR128,. + 0
-	.type	__func__.9322, %object
-	.size	__func__.9322, 17
-__func__.9322:
+	.set	.LANCHOR131,. + 0
+	.type	__func__.9316, %object
+	.size	__func__.9316, 17
+__func__.9316:
 	.string	"lpa_rebuild_hash"
-	.section	.rodata.__func__.9374,"a",@progbits
+	.section	.rodata.__func__.9368,"a",@progbits
 	.align	3
 	.set	.LANCHOR201,. + 0
-	.type	__func__.9374, %object
-	.size	__func__.9374, 17
-__func__.9374:
+	.type	__func__.9368, %object
+	.size	__func__.9368, 17
+__func__.9368:
 	.string	"ftl_write_commit"
-	.section	.rodata.__func__.9385,"a",@progbits
+	.section	.rodata.__func__.9379,"a",@progbits
 	.align	3
-	.set	.LANCHOR113,. + 0
-	.type	__func__.9385, %object
-	.size	__func__.9385, 14
-__func__.9385:
+	.set	.LANCHOR116,. + 0
+	.type	__func__.9379, %object
+	.size	__func__.9379, 14
+__func__.9379:
 	.string	"ftl_write_buf"
-	.section	.rodata.__func__.9436,"a",@progbits
+	.section	.rodata.__func__.9430,"a",@progbits
 	.align	3
-	.set	.LANCHOR188,. + 0
-	.type	__func__.9436, %object
-	.size	__func__.9436, 15
-__func__.9436:
+	.set	.LANCHOR191,. + 0
+	.type	__func__.9430, %object
+	.size	__func__.9430, 15
+__func__.9430:
 	.string	"ftl_read_ahead"
-	.section	.rodata.__func__.9444,"a",@progbits
+	.section	.rodata.__func__.9438,"a",@progbits
 	.align	3
 	.set	.LANCHOR55,. + 0
-	.type	__func__.9444, %object
-	.size	__func__.9444, 13
-__func__.9444:
+	.type	__func__.9438, %object
+	.size	__func__.9438, 13
+__func__.9438:
 	.string	"ftl_read_buf"
-	.section	.rodata.__func__.9482,"a",@progbits
+	.section	.rodata.__func__.9476,"a",@progbits
 	.align	3
 	.set	.LANCHOR197,. + 0
-	.type	__func__.9482, %object
-	.size	__func__.9482, 10
-__func__.9482:
+	.type	__func__.9476, %object
+	.size	__func__.9476, 10
+__func__.9476:
 	.string	"zftl_read"
-	.section	.rodata.__func__.9508,"a",@progbits
+	.section	.rodata.__func__.9502,"a",@progbits
 	.align	3
 	.set	.LANCHOR206,. + 0
-	.type	__func__.9508, %object
-	.size	__func__.9508, 13
-__func__.9508:
+	.type	__func__.9502, %object
+	.size	__func__.9502, 13
+__func__.9502:
 	.string	"_ftl_discard"
-	.section	.rodata.__func__.9549,"a",@progbits
+	.section	.rodata.__func__.9543,"a",@progbits
 	.align	3
 	.set	.LANCHOR198,. + 0
-	.type	__func__.9549, %object
-	.size	__func__.9549, 10
-__func__.9549:
+	.type	__func__.9543, %object
+	.size	__func__.9543, 10
+__func__.9543:
 	.string	"vpn_check"
-	.section	.rodata.__func__.9671,"a",@progbits
+	.section	.rodata.__func__.9665,"a",@progbits
 	.align	3
 	.set	.LANCHOR61,. + 0
-	.type	__func__.9671, %object
-	.size	__func__.9671, 12
-__func__.9671:
+	.type	__func__.9665, %object
+	.size	__func__.9665, 12
+__func__.9665:
 	.string	"gc_add_sblk"
-	.section	.rodata.__func__.9689,"a",@progbits
+	.section	.rodata.__func__.9683,"a",@progbits
 	.align	3
-	.set	.LANCHOR153,. + 0
-	.type	__func__.9689, %object
-	.size	__func__.9689, 21
-__func__.9689:
+	.set	.LANCHOR156,. + 0
+	.type	__func__.9683, %object
+	.size	__func__.9683, 21
+__func__.9683:
 	.string	"gc_check_data_one_wl"
-	.section	.rodata.__func__.9723,"a",@progbits
+	.section	.rodata.__func__.9717,"a",@progbits
 	.align	3
 	.set	.LANCHOR194,. + 0
-	.type	__func__.9723, %object
-	.size	__func__.9723, 22
-__func__.9723:
+	.type	__func__.9717, %object
+	.size	__func__.9717, 22
+__func__.9717:
 	.string	"gc_update_l2p_map_new"
-	.section	.rodata.__func__.9736,"a",@progbits
+	.section	.rodata.__func__.9730,"a",@progbits
 	.align	3
 	.set	.LANCHOR66,. + 0
-	.type	__func__.9736, %object
-	.size	__func__.9736, 19
-__func__.9736:
+	.type	__func__.9730, %object
+	.size	__func__.9730, 19
+__func__.9730:
 	.string	"gc_write_completed"
-	.section	.rodata.__func__.9765,"a",@progbits
+	.section	.rodata.__func__.9759,"a",@progbits
 	.align	3
 	.set	.LANCHOR203,. + 0
-	.type	__func__.9765, %object
-	.size	__func__.9765, 16
-__func__.9765:
+	.type	__func__.9759, %object
+	.size	__func__.9759, 16
+__func__.9759:
 	.string	"gc_do_copy_back"
-	.section	.rodata.__func__.9787,"a",@progbits
+	.section	.rodata.__func__.9781,"a",@progbits
 	.align	3
-	.set	.LANCHOR97,. + 0
-	.type	__func__.9787, %object
-	.size	__func__.9787, 16
-__func__.9787:
+	.set	.LANCHOR101,. + 0
+	.type	__func__.9781, %object
+	.size	__func__.9781, 16
+__func__.9781:
 	.string	"gc_free_src_blk"
-	.section	.rodata.__func__.9832,"a",@progbits
+	.section	.rodata.__func__.9826,"a",@progbits
 	.align	3
 	.set	.LANCHOR199,. + 0
-	.type	__func__.9832, %object
-	.size	__func__.9832, 16
-__func__.9832:
+	.type	__func__.9826, %object
+	.size	__func__.9826, 16
+__func__.9826:
 	.string	"gc_scan_src_blk"
-	.section	.rodata.__func__.9891,"a",@progbits
+	.section	.rodata.__func__.9885,"a",@progbits
 	.align	3
 	.set	.LANCHOR195,. + 0
-	.type	__func__.9891, %object
-	.size	__func__.9891, 20
-__func__.9891:
+	.type	__func__.9885, %object
+	.size	__func__.9885, 20
+__func__.9885:
 	.string	"gc_scan_static_data"
-	.section	.rodata.__func__.9952,"a",@progbits
+	.section	.rodata.__func__.9946,"a",@progbits
 	.align	3
 	.set	.LANCHOR208,. + 0
-	.type	__func__.9952, %object
-	.size	__func__.9952, 11
-__func__.9952:
+	.type	__func__.9946, %object
+	.size	__func__.9946, 11
+__func__.9946:
 	.string	"zftl_do_gc"
 	.section	.rodata._list_remove_node.str1.1,"aMS",@progbits,1
 .LC0:
@@ -25320,7 +25390,7 @@ toshiba_ref_value:
 	.string	"zftl_get_free_sblk %x %d, %p %d %d\n"
 	.section	.rodata.zftl_init.str1.1,"aMS",@progbits,1
 .LC164:
-	.string	"FTL version: 6.0.6 20180402"
+	.string	"FTL version: 6.0.7 20180411"
 .LC165:
 	.string	"_c_user_data_density := %d\n"
 .LC166:

commit 41dd6e98d09f68a6f65276a29beda2805210fd46
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Apr 12 15:56:49 2018 +0800

    rockchip: clk: rk3128: add ofdata_to_platdata callback
    
    We need to init platdata from of data with ofdata_to_platdata callback.
    
    Change-Id: I9e8e9427767f9de84c9871d9a639e7fdb5319ba4
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c
index c5d829d3bc..795b46bab5 100644
--- a/drivers/clk/rockchip/clk_rk3128.c
+++ b/drivers/clk/rockchip/clk_rk3128.c
@@ -547,11 +547,19 @@ static struct clk_ops rk3128_clk_ops = {
 	.set_rate	= rk3128_clk_set_rate,
 };
 
-static int rk3128_clk_probe(struct udevice *dev)
+static int rk3128_clk_ofdata_to_platdata(struct udevice *dev)
 {
 	struct rk3128_clk_priv *priv = dev_get_priv(dev);
 
 	priv->cru = dev_read_addr_ptr(dev);
+
+	return 0;
+}
+
+static int rk3128_clk_probe(struct udevice *dev)
+{
+	struct rk3128_clk_priv *priv = dev_get_priv(dev);
+
 	rkclk_init(priv->cru);
 
 	return 0;
@@ -604,6 +612,7 @@ U_BOOT_DRIVER(rockchip_rk3128_cru) = {
 	.id		= UCLASS_CLK,
 	.of_match	= rk3128_clk_ids,
 	.priv_auto_alloc_size = sizeof(struct rk3128_clk_priv),
+	.ofdata_to_platdata = rk3128_clk_ofdata_to_platdata,
 	.ops		= &rk3128_clk_ops,
 	.bind		= rk3128_clk_bind,
 	.probe		= rk3128_clk_probe,

commit dcad0909f85ecb025ac79d61920f7e13d8cd596a
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Wed Apr 11 18:07:12 2018 +0800

    rockchip/rk3288: update the fennce config to support the RK bootloader
    
    Change-Id: I78e0d93c76ae6111697daa2a540558b4b9febd03
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/configs/fennec-rk3288_defconfig b/configs/fennec-rk3288_defconfig
index 5a4e98bdc2..ad5cb4bfc6 100644
--- a/configs/fennec-rk3288_defconfig
+++ b/configs/fennec-rk3288_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3288=y
 CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_TARGET_FENNEC_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-fennec"
@@ -13,12 +14,11 @@ CONFIG_CONSOLE_MUX=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
-CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
@@ -32,6 +32,7 @@ CONFIG_CMD_REGULATOR=y
 # CONFIG_SPL_ISO_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_SPL_PARTITION_UUIDS=y
+CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_ENV_IS_IN_MMC=y
@@ -62,7 +63,6 @@ CONFIG_DM_RESET=y
 CONFIG_DEBUG_UART_BASE=0xff690000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_DWC2=y

commit 55f2882c45d9095213af0cad9b1ca930c1307143
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Wed Apr 11 17:55:35 2018 +0800

    rockchip/rk3288: prevent fennce to build error with SPL
    
    As rk3288 enables the CONFIG_BOOTCOMMAN that will cause
    the build error with SPL enabled.
    
    Change-Id: I62972c354411cd7b8f93f8a465bef0e0096b615b
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/include/configs/fennec_rk3288.h b/include/configs/fennec_rk3288.h
index 15a374cca7..b031baa5ed 100644
--- a/include/configs/fennec_rk3288.h
+++ b/include/configs/fennec_rk3288.h
@@ -7,6 +7,11 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#ifndef CONFIG_SPL_BUILD
+#undef CONFIG_BOOTCOMMAND
+#define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
+#endif
+
 #define ROCKCHIP_DEVICE_SETTINGS
 #include <configs/rk3288_common.h>
 

commit 60b6b279ac3102ec1c4a0c1c7e931090cb1f7623
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Wed Apr 11 14:44:45 2018 +0800

    rockchip/rk3288: update the evb config to support the RK bootloader
    
    Change-Id: Ibc066439830c70905adc4ebb49fe64e0df08b1c6
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig
index 406d2284c7..d88ca692fb 100644
--- a/configs/evb-rk3288_defconfig
+++ b/configs/evb-rk3288_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3288=y
 CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_TARGET_EVB_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-evb"
@@ -12,12 +13,11 @@ CONFIG_SILENT_CONSOLE=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
-CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
@@ -30,6 +30,7 @@ CONFIG_CMD_REGULATOR=y
 # CONFIG_SPL_ISO_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_SPL_PARTITION_UUIDS=y
+CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_ENV_IS_IN_MMC=y
@@ -62,7 +63,6 @@ CONFIG_DM_RESET=y
 CONFIG_DEBUG_UART_BASE=0xff690000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_GADGET=y

commit a4cb27570155ae2002e1908585ee6926723e42a6
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Wed Apr 11 14:38:14 2018 +0800

    rockchip/rk3288: prevent to build error with SPL
    
    As rk3288 enables the CONFIG_BOOTCOMMAN that will cause
    the build error with SPL enabled.
    
    Change-Id: I3e66333ff38ee04e57cba172fc4f90aa74cb36e6
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/include/configs/evb_rk3288.h b/include/configs/evb_rk3288.h
index 15a374cca7..b031baa5ed 100644
--- a/include/configs/evb_rk3288.h
+++ b/include/configs/evb_rk3288.h
@@ -7,6 +7,11 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#ifndef CONFIG_SPL_BUILD
+#undef CONFIG_BOOTCOMMAND
+#define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
+#endif
+
 #define ROCKCHIP_DEVICE_SETTINGS
 #include <configs/rk3288_common.h>
 

commit d6a621c7b2966492705d776a35fe914d6dbe029f
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Wed Apr 11 09:48:29 2018 +0800

    rockchip: rk3308: disable display mode
    
    Commit 5c651246bb4f ("drm/rockchip: vop: add support rk3308 vop")
    will crash u-boot on 64M DRAM system. So we should disable this module
    before it give a better solution.
    
    U-Boot 2017.09-01464-gc9fcc18-dirty (Apr 11 2018 - 09:44:54 +0800)
    
    Model: Rockchip RK3308 EVB
    DRAM:  "Synchronous Abort" handler, esr 0x96000040
    ELR:     2529d0
    LR:      20fe80
    x0 : ffffffffffe36f58 x1 : 0000000000000000
    x2 : 00000000000000a8 x3 : 0000000000000000
    x4 : 0000000000000000 x5 : 0000000000000015
    x6 : 00000000000000a8 x7 : 0000000000000044
    x8 : 0000000000003eb4 x9 : 0000000000000000
    x10: 00000000002fdc5c x11: 0000000000284e50
    x12: 0000000000001e18 x13: 00000000002fdb1c
    x14: 0000000000284e50 x15: 00000000002fdddc
    x16: 0000000000000000 x17: 0000000000000000
    x18: 00000000002fde80 x19: 000000000025ae28
    x20: 000000000025ad50 x21: 0000000000000000
    x22: 0000000000000000 x23: 0000000000000000
    x24: 0000000000000000 x25: 0000000000000000
    x26: 0000000000000000 x27: 0000000000000000
    x28: 0000000000000000 x29: 00000000002fde30
    
    Resetting CPU ...
    
    Change-Id: I2265c6fec08246978201de837adb85c74424d1c8
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index ec4b4839d1..65c45baf79 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -56,11 +56,6 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Rockchip"
 CONFIG_G_DNL_VENDOR_NUM=0x2207
 CONFIG_G_DNL_PRODUCT_NUM=0x330d
-CONFIG_DM_VIDEO=y
-CONFIG_DISPLAY=y
-CONFIG_DRM_ROCKCHIP=y
-CONFIG_DRM_ROCKCHIP_RGB=y
-CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y

commit 2c5e0b8507991f80918236a0e79fb75ba44ce097
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Apr 11 11:55:00 2018 +0800

    rockchip: px30: update default ramdisk load addr
    
    The origin addr 0x06000000 have risk for ramdisk size
    bigger than 0x02400000, which will touch the area of
    0x08400000(reserved by bl32) and system abort.
    
    Change-Id: Id5320b4e171ec7ff16bee64d0b60b381081537a9
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index deea62fe9f..f2bbef6371 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -53,7 +53,7 @@
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x01f00000\0" \
 	"kernel_addr_r=0x02080000\0" \
-	"ramdisk_addr_r=0x06000000\0"
+	"ramdisk_addr_r=0x0a200000\0"
 
 #include <config_distro_bootcmd.h>
 #define CONFIG_EXTRA_ENV_SETTINGS \

commit aed5fe35557df67416e0b533e1aa2b0d16908beb
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Mon Apr 9 14:03:43 2018 +0800

    rockchip: dts: rk3308: adjust emmc io request
    
    make nandc io resource available instead of controlling by pinctrl
    
    Change-Id: I40c04e3f71223710c4f23649b45ef12b572ee0a8
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/dts/rk3308.dtsi b/arch/arm/dts/rk3308.dtsi
index becd964752..d4f016af16 100644
--- a/arch/arm/dts/rk3308.dtsi
+++ b/arch/arm/dts/rk3308.dtsi
@@ -379,8 +379,6 @@
 		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
 		fifo-depth = <0x100>;
 		interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_bus8>;
 		status = "disabled";
 	};
 

commit c64990bc277137e3acee0160bb5f4eedc11ebbf6
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Mon Apr 9 12:07:30 2018 +0800

    rockchip: configs: evb-rk3308: enable nand driver
    
    Change-Id: I05e3ae1a0824119d0d389ab4322e389d8efea0d1
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index 098079ca5c..ec4b4839d1 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -41,6 +41,7 @@ CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_DM_RESET=y
+CONFIG_RKNAND=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF0C0000
 CONFIG_DEBUG_UART_CLOCK=24000000

commit befb4f2e6a62b7470bbfa786b6eaec4ba74da596
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Mon Apr 9 12:01:16 2018 +0800

    rockchip: dts: rk3308: enable nandc node
    
    Change-Id: I20792b674f79d2244ced3c90568cc124c7284094
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-evb-u-boot.dtsi b/arch/arm/dts/rk3308-evb-u-boot.dtsi
index 9c30b35950..60bad75b5d 100644
--- a/arch/arm/dts/rk3308-evb-u-boot.dtsi
+++ b/arch/arm/dts/rk3308-evb-u-boot.dtsi
@@ -24,6 +24,11 @@
 	u-boot,dm-pre-reloc;
 };
 
+&nandc {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 &uart2 {
 	u-boot,dm-pre-reloc;
 	clock-frequency = <24000000>;

commit c9fcc189ba0788413c687b81e5178c90e391871a
Author: Zhaoyifeng <zyf@rock-chips.com>
Date:   Wed Mar 28 17:33:25 2018 +0800

    drivers: rknand: update ftl for rk3226 and px30
    
    1. Fix gc data lost issue.
    2. support micron 2D MLC NAND support.
    3. Support upgrade loader
    
    Change-Id: Id2bb3b523b06ca6be1912dae2d835b465f715691
    Signed-off-by: Zhaoyifeng <zyf@rock-chips.com>

diff --git a/drivers/rknand/rk_zftl_arm_v8.S b/drivers/rknand/rk_zftl_arm_v8.S
index 9351a7ddca..e85b4c2bc4 100644
--- a/drivers/rknand/rk_zftl_arm_v8.S
+++ b/drivers/rknand/rk_zftl_arm_v8.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2018-03-15
+ * date: 2018-04-02
  */
 	.arch armv8-a
 	.file	"rk_zftl_arm_v8.S"
@@ -34,79 +34,92 @@ flash_mem_cmp8:
 	.align	2
 	.type	_list_remove_node, %function
 _list_remove_node:
-	adrp	x3, .LANCHOR0
+	stp	x29, x30, [sp, -64]!
 	and	w1, w1, 65535
-	mov	w5, 65535
-	ldr	x7, [x0]
-	ldr	x4, [x3, #:lo12:.LANCHOR0]
 	mov	w3, 6
-	umull	x1, w1, w3
-	add	x6, x4, x1
-	ldrh	w3, [x4, x1]
-	cmp	w3, w5
-	ldrh	w5, [x6, 2]
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR0
+	stp	x19, x20, [sp, 16]
+	umull	x20, w1, w3
+	stp	x23, x24, [sp, 48]
+	mov	w1, 65535
+	ldr	x24, [x21, #:lo12:.LANCHOR0]
+	add	x19, x24, x20
+	ldrh	w4, [x24, x20]
+	ldrh	w3, [x19, 2]
+	cmp	w4, w1
+	ldr	x1, [x0]
 	bne	.L7
-	cmp	w5, w3
+	cmp	w3, w4
 	bne	.L7
-	cmp	x6, x7
+	cmp	x19, x1
 	bne	.L6
 .L7:
-	mov	w8, 65535
-	cmp	w5, w8
+	mov	x22, x0
+	mov	x23, x2
+	mov	w0, 65535
+	cmp	w3, w0
 	bne	.L9
-	cmp	x6, x7
+	cmp	x19, x1
 	beq	.L9
-	stp	x29, x30, [sp, -16]!
 	adrp	x1, .LANCHOR1
 	adrp	x0, .LC0
-	mov	w2, 182
-	add	x29, sp, 0
+	mov	w2, 184
 	add	x1, x1, :lo12:.LANCHOR1
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L10:
-	b	.L10
 .L9:
-	cmp	x6, x7
-	mov	w7, 65535
+	ldr	x0, [x22]
+	ldrh	w3, [x24, x20]
+	cmp	x19, x0
+	mov	w0, 65535
+	bne	.L10
+	cmp	w3, w0
 	bne	.L11
-	cmp	w3, w7
-	bne	.L12
-	str	xzr, [x0]
-.L13:
+	str	xzr, [x22]
+.L12:
 	mov	w0, -1
-	strh	w0, [x4, x1]
-	strh	w0, [x6, 2]
-	ldrh	w0, [x2]
+	strh	w0, [x24, x20]
+	strh	w0, [x19, 2]
+	ldrh	w0, [x23]
 	sub	w0, w0, #1
-	strh	w0, [x2]
+	strh	w0, [x23]
 .L6:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
 	ret
-.L12:
-	mov	w5, 6
-	umaddl	x3, w3, w5, x4
-	str	x3, [x0]
-	mov	w0, -1
-	strh	w0, [x3, 2]
-	b	.L13
 .L11:
-	cmp	w3, w7
-	bne	.L14
-	cmp	w5, w3
-	beq	.L13
-	mov	w0, 6
-	umull	x5, w5, w0
+	ldr	x0, [x21, #:lo12:.LANCHOR0]
+	mov	w1, 6
+	umaddl	x3, w3, w1, x0
 	mov	w0, -1
-	strh	w0, [x4, x5]
-	b	.L13
-.L14:
-	mov	w7, 6
-	umaddl	x0, w3, w7, x4
-	strh	w5, [x0, 2]
-	ldrh	w0, [x6, 2]
-	umull	x0, w0, w7
-	strh	w3, [x4, x0]
-	b	.L13
+	str	x3, [x22]
+	strh	w0, [x3, 2]
+	b	.L12
+.L10:
+	cmp	w3, w0
+	ldrh	w0, [x19, 2]
+	bne	.L13
+	cmp	w0, w3
+	beq	.L12
+	mov	w1, 6
+	mov	w2, -1
+	umull	x0, w0, w1
+	ldr	x1, [x21, #:lo12:.LANCHOR0]
+	strh	w2, [x1, x0]
+	b	.L12
+.L13:
+	ldr	x1, [x21, #:lo12:.LANCHOR0]
+	mov	w2, 6
+	umaddl	x4, w3, w2, x1
+	strh	w0, [x4, 2]
+	ldrh	w0, [x19, 2]
+	umull	x0, w0, w2
+	strh	w3, [x1, x0]
+	b	.L12
 	.size	_list_remove_node, .-_list_remove_node
 	.section	.text._list_pop_index_node,"ax",@progbits
 	.align	2
@@ -116,15 +129,15 @@ _list_pop_index_node:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	ldr	x20, [x0]
-	cbz	x20, .L24
+	cbz	x20, .L21
 	adrp	x3, .LANCHOR0
 	and	w1, w1, 65535
 	mov	w4, 65535
 	mov	w5, 6
 	ldr	x19, [x3, #:lo12:.LANCHOR0]
+.L17:
+	cbnz	w1, .L18
 .L20:
-	cbnz	w1, .L21
-.L23:
 	sub	x19, x20, x19
 	mov	x1, -6148914691236517206
 	asr	x19, x19, 1
@@ -137,21 +150,21 @@ _list_pop_index_node:
 	strh	w0, [x20]
 	strh	w0, [x20, 2]
 	mov	w0, w19
-.L18:
+.L15:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L21:
+.L18:
 	ldrh	w3, [x20]
 	cmp	w3, w4
-	beq	.L23
+	beq	.L20
 	sub	w1, w1, #1
 	umaddl	x20, w3, w5, x19
 	and	w1, w1, 65535
-	b	.L20
-.L24:
+	b	.L17
+.L21:
 	mov	w0, 65535
-	b	.L18
+	b	.L15
 	.size	_list_pop_index_node, .-_list_pop_index_node
 	.section	.text._insert_free_list,"ax",@progbits
 	.align	2
@@ -161,7 +174,7 @@ _insert_free_list:
 	and	w1, w1, 65535
 	ldrh	w3, [x3, #:lo12:.LANCHOR2]
 	cmp	w3, w1
-	bls	.L26
+	bls	.L23
 	ldrh	w3, [x2]
 	mov	w5, 6
 	ldr	x8, [x0]
@@ -174,11 +187,11 @@ _insert_free_list:
 	add	x7, x6, x12
 	strh	w2, [x7, 2]
 	strh	w2, [x6, x12]
-	cbnz	x8, .L28
-.L33:
+	cbnz	x8, .L25
+.L30:
 	str	x7, [x0]
 	ret
-.L28:
+.L25:
 	adrp	x2, .LANCHOR3
 	mov	x3, -6148914691236517206
 	movk	x3, 0xaaab, lsl 0
@@ -197,7 +210,7 @@ _insert_free_list:
 	mul	x2, x2, x3
 	mov	x3, x8
 	and	w2, w2, 65535
-.L31:
+.L28:
 	ubfiz	x13, x2, 2, 16
 	ldr	w5, [x11, x13]
 	ldrh	w13, [x11, x13]
@@ -206,32 +219,32 @@ _insert_free_list:
 	add	w5, w13, w5, lsl 3
 	and	w5, w5, 4095
 	cmp	w4, w5
-	bls	.L29
+	bls	.L26
 	ldrh	w5, [x3]
 	cmp	w5, w14
-	bne	.L30
+	bne	.L27
 	strh	w2, [x7, 2]
 	strh	w1, [x3]
 	ret
-.L30:
+.L27:
 	umaddl	x3, w5, w10, x6
 	mov	w2, w5
-	b	.L31
-.L29:
+	b	.L28
+.L26:
 	ldrh	w4, [x3, 2]
 	cmp	x8, x3
 	strh	w4, [x7, 2]
 	strh	w2, [x6, x12]
-	bne	.L32
+	bne	.L29
 	strh	w1, [x8, 2]
-	b	.L33
-.L32:
+	b	.L30
+.L29:
 	ldrh	w0, [x3, 2]
 	mov	w2, 6
 	umull	x0, w0, w2
 	strh	w1, [x6, x0]
 	strh	w1, [x3, 2]
-.L26:
+.L23:
 	ret
 	.size	_insert_free_list, .-_insert_free_list
 	.section	.text._insert_data_list,"ax",@progbits
@@ -242,7 +255,7 @@ _insert_data_list:
 	and	w1, w1, 65535
 	ldrh	w3, [x4, #:lo12:.LANCHOR2]
 	cmp	w3, w1
-	bls	.L50
+	bls	.L47
 	ldrh	w3, [x2]
 	mov	w11, 6
 	ldr	x8, [x0]
@@ -255,10 +268,10 @@ _insert_data_list:
 	add	x7, x6, x13
 	strh	w2, [x7, 2]
 	strh	w2, [x6, x13]
-	cbnz	x8, .L37
+	cbnz	x8, .L34
 	str	x7, [x0]
 	ret
-.L37:
+.L34:
 	stp	x29, x30, [sp, -32]!
 	adrp	x2, .LANCHOR4
 	mov	x3, -6148914691236517206
@@ -283,13 +296,13 @@ _insert_data_list:
 	adrp	x3, .LANCHOR3
 	ldr	x17, [x3, #:lo12:.LANCHOR3]
 	and	w2, w2, 65535
-.L45:
+.L42:
 	add	w10, w10, 1
 	and	w10, w10, 65535
 	cmp	w10, w30
-	bhi	.L34
+	bhi	.L31
 	cmp	w1, w2
-	beq	.L34
+	beq	.L31
 	uxtw	x4, w2
 	ldrh	w20, [x5, 4]
 	cmp	w20, 0
@@ -297,7 +310,7 @@ _insert_data_list:
 	mul	w3, w3, w20
 	csel	w3, w3, w12, ne
 	cmp	w14, w3
-	bne	.L41
+	bne	.L38
 	lsl	x4, x4, 2
 	ldr	w3, [x17, x4]
 	ldrh	w4, [x17, x4]
@@ -306,40 +319,40 @@ _insert_data_list:
 	add	w3, w4, w3, lsl 3
 	and	w3, w3, 4095
 	cmp	w16, w3
-	bhi	.L43
-.L42:
+	bhi	.L40
+.L39:
 	ldrh	w3, [x5, 2]
 	cmp	x8, x5
 	strh	w3, [x7, 2]
 	strh	w2, [x6, x13]
-	bne	.L46
+	bne	.L43
 	strh	w1, [x8, 2]
 	str	x7, [x0]
-	b	.L34
-.L41:
-	bcc	.L42
-.L43:
+	b	.L31
+.L38:
+	bcc	.L39
+.L40:
 	ldrh	w3, [x5]
 	cmp	w3, w19
-	bne	.L44
+	bne	.L41
 	strh	w2, [x7, 2]
 	strh	w1, [x5]
-.L34:
+.L31:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L44:
+.L41:
 	umaddl	x5, w3, w11, x6
 	mov	w2, w3
-	b	.L45
-.L46:
+	b	.L42
+.L43:
 	ldrh	w0, [x5, 2]
 	mov	w2, 6
 	umull	x0, w0, w2
 	strh	w1, [x6, x0]
 	strh	w1, [x5, 2]
-	b	.L34
-.L50:
+	b	.L31
+.L47:
 	ret
 	.size	_insert_data_list, .-_insert_data_list
 	.section	.text._list_get_gc_head_node.isra.2,"ax",@progbits
@@ -347,26 +360,26 @@ _insert_data_list:
 	.type	_list_get_gc_head_node.isra.2, %function
 _list_get_gc_head_node.isra.2:
 	and	w1, w1, 65535
-	cbz	x0, .L57
+	cbz	x0, .L54
 	adrp	x2, .LANCHOR0
 	mov	w3, 65535
 	mov	w4, 6
 	ldr	x2, [x2, #:lo12:.LANCHOR0]
-.L54:
-	cbz	w1, .L55
+.L51:
+	cbz	w1, .L52
 	ldrh	w0, [x0]
 	cmp	w0, w3
-	bne	.L56
+	bne	.L53
 	ret
-.L56:
+.L53:
 	sub	w1, w1, #1
 	umaddl	x0, w0, w4, x2
 	and	w1, w1, 65535
-	b	.L54
-.L57:
+	b	.L51
+.L54:
 	mov	w0, 65535
 	ret
-.L55:
+.L52:
 	sub	x0, x0, x2
 	mov	x1, -6148914691236517206
 	asr	x0, x0, 1
@@ -379,71 +392,81 @@ _list_get_gc_head_node.isra.2:
 	.align	2
 	.type	_list_update_data_list, %function
 _list_update_data_list:
-	stp	x29, x30, [sp, -48]!
+	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w19, w1, 65535
 	adrp	x1, .LANCHOR5
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
 	ldr	x1, [x1, #:lo12:.LANCHOR5]
 	ldrh	w3, [x1, 16]
-	str	x21, [sp, 32]
+	str	x25, [sp, 64]
 	cmp	w3, w19
-	beq	.L59
+	beq	.L56
 	ldrh	w3, [x1, 48]
 	cmp	w3, w19
-	beq	.L59
+	beq	.L56
 	ldrh	w1, [x1, 80]
 	cmp	w1, w19
-	beq	.L59
+	beq	.L56
 	adrp	x1, .LANCHOR0
-	mov	w3, 6
-	ldr	x4, [x1, #:lo12:.LANCHOR0]
-	umull	x3, w19, w3
-	ldr	x1, [x0]
-	add	x5, x4, x3
-	cmp	x5, x1
-	beq	.L59
-	ldrh	w1, [x5, 2]
+	mov	w22, 6
+	ldr	x3, [x0]
+	mov	x25, x1
+	umull	x22, w19, w22
+	ldr	x24, [x1, #:lo12:.LANCHOR0]
+	add	x23, x24, x22
+	cmp	x23, x3
+	beq	.L56
 	mov	x20, x0
+	ldrh	w0, [x23, 2]
+	mov	w1, 65535
 	mov	x21, x2
-	mov	w0, 65535
-	cmp	w1, w0
-	bne	.L61
-	ldrh	w0, [x4, x3]
 	cmp	w0, w1
-	bne	.L61
+	bne	.L60
+	ldrh	w1, [x24, x22]
+	cmp	w1, w0
+	bne	.L60
 	adrp	x1, .LANCHOR6
 	adrp	x0, .LC0
-	mov	w2, 249
+	mov	w2, 251
 	add	x1, x1, :lo12:.LANCHOR6
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L62:
-	b	.L62
+.L60:
+	ldrh	w1, [x23, 2]
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L61
+	ldrh	w0, [x24, x22]
+	cmp	w0, w1
+	beq	.L56
 .L61:
 	adrp	x0, .LANCHOR4
 	ubfiz	x2, x19, 1, 16
-	ldrh	w5, [x5, 4]
-	mov	w6, -1
+	mov	x5, -6148914691236517206
+	mov	w4, -1
 	ldr	x0, [x0, #:lo12:.LANCHOR4]
-	cmp	w5, 0
+	movk	x5, 0xaaab, lsl 0
 	ldrh	w3, [x0, x2]
+	ldrh	w2, [x23, 4]
+	cmp	w2, 0
+	mul	w3, w3, w2
 	mov	w2, 6
 	umull	x1, w1, w2
-	mov	x2, -6148914691236517206
-	movk	x2, 0xaaab, lsl 0
-	mul	w3, w3, w5
-	asr	x5, x1, 1
-	add	x1, x4, x1
-	csel	w3, w3, w6, ne
-	mul	x5, x5, x2
+	csel	w3, w3, w4, ne
+	asr	x2, x1, 1
+	mul	x2, x2, x5
+	ldrh	w0, [x0, x2, lsl 1]
+	ldr	x2, [x25, #:lo12:.LANCHOR0]
+	add	x1, x2, x1
 	ldrh	w1, [x1, 4]
 	cmp	w1, 0
-	ldrh	w0, [x0, x5, lsl 1]
 	mul	w0, w0, w1
-	csel	w0, w0, w6, ne
+	csel	w0, w0, w4, ne
 	cmp	w3, w0
-	bcs	.L59
+	bcs	.L56
 	mov	x2, x21
 	mov	w1, w19
 	mov	x0, x20
@@ -451,14 +474,18 @@ _list_update_data_list:
 	mov	x2, x21
 	mov	w1, w19
 	mov	x0, x20
-	ldr	x21, [sp, 32]
+	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
 	b	_insert_data_list
-.L59:
+.L56:
 	ldp	x19, x20, [sp, 16]
-	ldr	x21, [sp, 32]
-	ldp	x29, x30, [sp], 48
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 80
 	ret
 	.size	_list_update_data_list, .-_list_update_data_list
 	.section	.text.nand_flash_print_info,"ax",@progbits
@@ -466,110 +493,409 @@ _list_update_data_list:
 	.global	nand_flash_print_info
 	.type	nand_flash_print_info, %function
 nand_flash_print_info:
-	ret
-	.size	nand_flash_print_info, .-nand_flash_print_info
-	.section	.text.timer_delay_ns,"ax",@progbits
-	.align	2
-	.global	timer_delay_ns
-	.type	timer_delay_ns, %function
-timer_delay_ns:
-	sub	sp, sp, #16
-	lsr	w0, w0, 4
-	str	w0, [sp, 12]
-.L70:
-	ldr	w0, [sp, 12]
-	sub	w1, w0, #1
-	str	w1, [sp, 12]
-	cbnz	w0, .L70
-	add	sp, sp, 16
-	ret
-	.size	timer_delay_ns, .-timer_delay_ns
-	.section	.text.flash_read_status,"ax",@progbits
-	.align	2
-	.global	flash_read_status
-	.type	flash_read_status, %function
-flash_read_status:
-	stp	x29, x30, [sp, -16]!
-	mov	x2, x0
-	mov	w0, 112
+	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
-	str	w0, [x2, 8]
-	mov	w0, 120
-	bl	timer_delay_ns
-	ldr	w0, [x2]
-	ldp	x29, x30, [sp], 16
-	and	w0, w0, 255
-	ret
-	.size	flash_read_status, .-flash_read_status
-	.section	.text.toshiba_set_rr_para,"ax",@progbits
-	.align	2
-	.global	toshiba_set_rr_para
-	.type	toshiba_set_rr_para, %function
-toshiba_set_rr_para:
-	and	w11, w1, 255
-	mov	x4, x0
-	add	w2, w11, 1
-	mov	w0, 5
-	adrp	x6, .LANCHOR11
-	add	x6, x6, :lo12:.LANCHOR11
-	adrp	x3, .LANCHOR7
-	add	x3, x3, :lo12:.LANCHOR7
-	umull	x2, w2, w0
-	adrp	x0, .LANCHOR8
-	add	x7, x0, :lo12:.LANCHOR8
-	mov	x5, x0
-	ldrb	w0, [x6]
-	add	x3, x3, x2
-	add	x7, x7, x2
-	adrp	x8, .LANCHOR9
-	mov	x2, 0
-	adrp	x10, .LANCHOR10
-	add	x8, x8, :lo12:.LANCHOR9
-	add	x10, x10, :lo12:.LANCHOR10
-	cmp	w0, w2
-	bhi	.L83
-	ret
+	str	x19, [sp, 16]
+	adrp	x19, .LANCHOR7
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L68
+	adrp	x1, .LANCHOR8
+	adrp	x0, .LC1
+	add	x1, x1, :lo12:.LANCHOR8
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L68:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L69
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrb	w6, [x0, 6]
+	ldrb	w5, [x0, 5]
+	ldrb	w4, [x0, 4]
+	ldrb	w3, [x0, 3]
+	ldrb	w2, [x0, 2]
+	ldrb	w1, [x0, 1]
+	adrp	x0, .LC2
+	add	x0, x0, :lo12:.LC2
+	bl	printf
+.L69:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L70
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrb	w1, [x0, 8]
+	adrp	x0, .LC3
+	add	x0, x0, :lo12:.LC3
+	bl	printf
+.L70:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L71
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrb	w1, [x0, 9]
+	adrp	x0, .LC4
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+.L71:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L72
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrh	w1, [x0, 10]
+	adrp	x0, .LC5
+	add	x0, x0, :lo12:.LC5
+	bl	printf
+.L72:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L73
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrb	w1, [x0, 12]
+	adrp	x0, .LC6
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L73:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L74
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrb	w1, [x0, 13]
+	adrp	x0, .LC7
+	add	x0, x0, :lo12:.LC7
+	bl	printf
+.L74:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L75
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrh	w1, [x0, 14]
+	adrp	x0, .LC8
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L75:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L76
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrb	w1, [x0, 23]
+	adrp	x0, .LC9
+	add	x0, x0, :lo12:.LC9
+	bl	printf
+.L76:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L77
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrb	w1, [x0, 18]
+	adrp	x0, .LC10
+	add	x0, x0, :lo12:.LC10
+	bl	printf
 .L77:
-	cmp	w0, 35
-	bne	.L79
-	ldrsb	w0, [x3, x2]
-	b	.L84
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L78
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrb	w1, [x0, 19]
+	adrp	x0, .LC11
+	add	x0, x0, :lo12:.LC11
+	bl	printf
+.L78:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L79
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrb	w1, [x0, 20]
+	adrp	x0, .LC12
+	add	x0, x0, :lo12:.LC12
+	bl	printf
 .L79:
-	ldrsb	w0, [x10, w11, sxtw]
-	b	.L84
-.L83:
-	stp	x29, x30, [sp, -16]!
-	add	x29, sp, 0
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L80
+	adrp	x0, .LANCHOR10
+	ldrb	w1, [x0, #:lo12:.LANCHOR10]
+	adrp	x0, .LC13
+	add	x0, x0, :lo12:.LC13
+	bl	printf
 .L80:
-	mov	w0, 85
-	str	w0, [x4, 8]
-	add	x0, x5, :lo12:.LANCHOR8
-	ldrsb	w0, [x2, x0]
-	str	w0, [x4, 4]
-	mov	w0, 200
-	bl	timer_delay_ns
-	ldrb	w0, [x8]
-	cmp	w0, 34
-	bne	.L77
-	ldrsb	w0, [x7, x2]
-.L84:
-	str	w0, [x4]
-	add	x2, x2, 1
-	ldrb	w0, [x6]
-	cmp	w0, w2
-	bhi	.L80
-	ldp	x29, x30, [sp], 16
-	ret
-	.size	toshiba_set_rr_para, .-toshiba_set_rr_para
-	.section	.text.hynix_set_rr_para,"ax",@progbits
-	.align	2
-	.type	hynix_set_rr_para, %function
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L81
+	adrp	x0, .LANCHOR11
+	ldrb	w1, [x0, #:lo12:.LANCHOR11]
+	adrp	x0, .LC14
+	add	x0, x0, :lo12:.LC14
+	bl	printf
+.L81:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L82
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrb	w1, [x0, 22]
+	adrp	x0, .LC15
+	add	x0, x0, :lo12:.LC15
+	bl	printf
+.L82:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L83
+	adrp	x0, .LANCHOR12
+	ldrb	w1, [x0, #:lo12:.LANCHOR12]
+	adrp	x0, .LC16
+	add	x0, x0, :lo12:.LC16
+	bl	printf
+.L83:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L84
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrb	w1, [x0, 16]
+	adrp	x0, .LC17
+	add	x0, x0, :lo12:.LC17
+	and	w1, w1, 1
+	bl	printf
+.L84:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L85
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrh	w1, [x0, 16]
+	adrp	x0, .LC18
+	add	x0, x0, :lo12:.LC18
+	ubfx	x1, x1, 1, 1
+	bl	printf
+.L85:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L86
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrh	w1, [x0, 16]
+	adrp	x0, .LC19
+	add	x0, x0, :lo12:.LC19
+	ubfx	x1, x1, 2, 1
+	bl	printf
+.L86:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L87
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrh	w1, [x0, 16]
+	adrp	x0, .LC20
+	add	x0, x0, :lo12:.LC20
+	ubfx	x1, x1, 3, 1
+	bl	printf
+.L87:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L88
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrh	w1, [x0, 16]
+	adrp	x0, .LC21
+	add	x0, x0, :lo12:.LC21
+	ubfx	x1, x1, 4, 1
+	bl	printf
+.L88:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L89
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrh	w1, [x0, 16]
+	adrp	x0, .LC22
+	add	x0, x0, :lo12:.LC22
+	ubfx	x1, x1, 5, 1
+	bl	printf
+.L89:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L90
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrh	w1, [x0, 16]
+	adrp	x0, .LC23
+	add	x0, x0, :lo12:.LC23
+	ubfx	x1, x1, 6, 1
+	bl	printf
+.L90:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L91
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrh	w1, [x0, 16]
+	adrp	x0, .LC24
+	add	x0, x0, :lo12:.LC24
+	ubfx	x1, x1, 7, 1
+	bl	printf
+.L91:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L92
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrb	w1, [x0, 17]
+	adrp	x0, .LC25
+	add	x0, x0, :lo12:.LC25
+	and	w1, w1, 1
+	bl	printf
+.L92:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L93
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrh	w1, [x0, 16]
+	adrp	x0, .LC26
+	add	x0, x0, :lo12:.LC26
+	ubfx	x1, x1, 9, 1
+	bl	printf
+.L93:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L94
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrh	w1, [x0, 16]
+	adrp	x0, .LC27
+	add	x0, x0, :lo12:.LC27
+	ubfx	x1, x1, 10, 1
+	bl	printf
+.L94:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L95
+	adrp	x0, .LANCHOR11
+	ldrb	w1, [x0, #:lo12:.LANCHOR11]
+	adrp	x0, .LC14
+	add	x0, x0, :lo12:.LC14
+	bl	printf
+.L95:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L96
+	adrp	x0, .LANCHOR13
+	add	x0, x0, :lo12:.LANCHOR13
+	ldrb	w2, [x0, 11]
+	ldrb	w1, [x0, 10]
+	adrp	x0, .LC28
+	add	x0, x0, :lo12:.LC28
+	bl	printf
+.L96:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L97
+	adrp	x0, .LANCHOR13
+	add	x0, x0, :lo12:.LANCHOR13
+	ldrb	w2, [x0, 9]
+	ldrb	w1, [x0, 8]
+	adrp	x0, .LC29
+	add	x0, x0, :lo12:.LC29
+	bl	printf
+.L97:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L67
+	adrp	x0, .LANCHOR14
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ldrb	w1, [x0, #:lo12:.LANCHOR14]
+	adrp	x0, .LC30
+	add	x0, x0, :lo12:.LC30
+	b	printf
+.L67:
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	nand_flash_print_info, .-nand_flash_print_info
+	.section	.text.timer_delay_ns,"ax",@progbits
+	.align	2
+	.global	timer_delay_ns
+	.type	timer_delay_ns, %function
+timer_delay_ns:
+	sub	sp, sp, #16
+	lsr	w0, w0, 4
+	str	w0, [sp, 12]
+.L191:
+	ldr	w0, [sp, 12]
+	sub	w1, w0, #1
+	str	w1, [sp, 12]
+	cbnz	w0, .L191
+	add	sp, sp, 16
+	ret
+	.size	timer_delay_ns, .-timer_delay_ns
+	.section	.text.flash_read_status,"ax",@progbits
+	.align	2
+	.global	flash_read_status
+	.type	flash_read_status, %function
+flash_read_status:
+	stp	x29, x30, [sp, -16]!
+	mov	x2, x0
+	mov	w0, 112
+	add	x29, sp, 0
+	str	w0, [x2, 8]
+	mov	w0, 120
+	bl	timer_delay_ns
+	ldr	w0, [x2]
+	ldp	x29, x30, [sp], 16
+	and	w0, w0, 255
+	ret
+	.size	flash_read_status, .-flash_read_status
+	.section	.text.toshiba_set_rr_para,"ax",@progbits
+	.align	2
+	.global	toshiba_set_rr_para
+	.type	toshiba_set_rr_para, %function
+toshiba_set_rr_para:
+	and	w11, w1, 255
+	mov	x4, x0
+	add	w2, w11, 1
+	mov	w0, 5
+	adrp	x6, .LANCHOR19
+	add	x6, x6, :lo12:.LANCHOR19
+	adrp	x3, .LANCHOR15
+	add	x3, x3, :lo12:.LANCHOR15
+	umull	x2, w2, w0
+	adrp	x0, .LANCHOR16
+	add	x7, x0, :lo12:.LANCHOR16
+	mov	x5, x0
+	ldrb	w0, [x6]
+	add	x3, x3, x2
+	add	x7, x7, x2
+	adrp	x8, .LANCHOR17
+	mov	x2, 0
+	adrp	x10, .LANCHOR18
+	add	x8, x8, :lo12:.LANCHOR17
+	add	x10, x10, :lo12:.LANCHOR18
+	cmp	w0, w2
+	bhi	.L204
+	ret
+.L198:
+	cmp	w0, 35
+	bne	.L200
+	ldrsb	w0, [x3, x2]
+	b	.L205
+.L200:
+	ldrsb	w0, [x10, w11, sxtw]
+	b	.L205
+.L204:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+.L201:
+	mov	w0, 85
+	str	w0, [x4, 8]
+	add	x0, x5, :lo12:.LANCHOR16
+	ldrsb	w0, [x2, x0]
+	str	w0, [x4, 4]
+	mov	w0, 200
+	bl	timer_delay_ns
+	ldrb	w0, [x8]
+	cmp	w0, 34
+	bne	.L198
+	ldrsb	w0, [x7, x2]
+.L205:
+	str	w0, [x4]
+	add	x2, x2, 1
+	ldrb	w0, [x6]
+	cmp	w0, w2
+	bhi	.L201
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	toshiba_set_rr_para, .-toshiba_set_rr_para
+	.section	.text.hynix_set_rr_para,"ax",@progbits
+	.align	2
+	.type	hynix_set_rr_para, %function
 hynix_set_rr_para:
-	adrp	x2, .LANCHOR12
+	adrp	x2, .LANCHOR20
 	and	w1, w1, 255
 	mov	x3, 32
 	and	w0, w0, 255
-	ldr	x2, [x2, #:lo12:.LANCHOR12]
+	ldr	x2, [x2, #:lo12:.LANCHOR20]
 	mov	x4, 0
 	add	x6, x2, 128
 	add	x2, x2, 112
@@ -580,19 +906,19 @@ hynix_set_rr_para:
 	umaddl	x1, w1, w0, x3
 	ubfiz	x0, x0, 8, 8
 	add	x2, x2, x1
-	adrp	x1, .LANCHOR13
-	ldr	x3, [x1, #:lo12:.LANCHOR13]
+	adrp	x1, .LANCHOR21
+	ldr	x3, [x1, #:lo12:.LANCHOR21]
 	add	x3, x3, x0
 	mov	w0, 54
 	str	w0, [x3, 2056]
-	bhi	.L91
+	bhi	.L212
 	mov	w0, 22
 	str	w0, [x3, 2056]
 	ret
-.L91:
+.L212:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
-.L87:
+.L208:
 	ldrb	w0, [x6, x4]
 	str	w0, [x3, 2052]
 	mov	w0, 120
@@ -601,7 +927,7 @@ hynix_set_rr_para:
 	str	w0, [x3, 2048]
 	add	x4, x4, 1
 	cmp	w5, w4, uxtb
-	bhi	.L87
+	bhi	.L208
 	mov	w0, 22
 	str	w0, [x3, 2056]
 	ldp	x29, x30, [sp], 16
@@ -612,29 +938,29 @@ hynix_set_rr_para:
 	.global	hynix_reconfig_rr_para
 	.type	hynix_reconfig_rr_para, %function
 hynix_reconfig_rr_para:
-	adrp	x1, .LANCHOR9
-	ldrb	w1, [x1, #:lo12:.LANCHOR9]
+	adrp	x1, .LANCHOR17
+	ldrb	w1, [x1, #:lo12:.LANCHOR17]
 	sub	w1, w1, #1
 	and	w1, w1, 255
 	cmp	w1, 6
-	bhi	.L98
-	adrp	x8, .LANCHOR12
+	bhi	.L219
+	adrp	x8, .LANCHOR20
 	and	w0, w0, 255
 	sxtw	x7, w0
-	ldr	x1, [x8, #:lo12:.LANCHOR12]
+	ldr	x1, [x8, #:lo12:.LANCHOR20]
 	add	x1, x1, x7
 	ldrb	w1, [x1, 120]
-	cbz	w1, .L98
+	cbz	w1, .L219
 	stp	x29, x30, [sp, -16]!
 	mov	w1, 0
 	add	x29, sp, 0
 	bl	hynix_set_rr_para
-	ldr	x0, [x8, #:lo12:.LANCHOR12]
+	ldr	x0, [x8, #:lo12:.LANCHOR20]
 	add	x0, x0, x7
 	strb	wzr, [x0, 120]
 	ldp	x29, x30, [sp], 16
 	ret
-.L98:
+.L219:
 	ret
 	.size	hynix_reconfig_rr_para, .-hynix_reconfig_rr_para
 	.section	.text.nandc_set_ddr_para,"ax",@progbits
@@ -642,20 +968,20 @@ hynix_reconfig_rr_para:
 	.global	nandc_set_ddr_para
 	.type	nandc_set_ddr_para, %function
 nandc_set_ddr_para:
-	adrp	x1, .LANCHOR14
+	adrp	x1, .LANCHOR22
 	and	w0, w0, 255
-	adrp	x2, .LANCHOR13
-	ldrb	w1, [x1, #:lo12:.LANCHOR14]
-	ldr	x2, [x2, #:lo12:.LANCHOR13]
+	adrp	x2, .LANCHOR21
+	ldrb	w1, [x1, #:lo12:.LANCHOR22]
+	ldr	x2, [x2, #:lo12:.LANCHOR21]
 	cmp	w1, 9
 	lsl	w1, w0, 16
 	lsl	w0, w0, 8
 	orr	w1, w1, w0
 	orr	w1, w1, 3
-	bne	.L102
+	bne	.L223
 	str	w1, [x2, 80]
 	ret
-.L102:
+.L223:
 	str	w1, [x2, 304]
 	ret
 	.size	nandc_set_ddr_para, .-nandc_set_ddr_para
@@ -664,43 +990,43 @@ nandc_set_ddr_para:
 	.global	nandc_get_ddr_para
 	.type	nandc_get_ddr_para, %function
 nandc_get_ddr_para:
-	adrp	x0, .LANCHOR14
-	ldrb	w0, [x0, #:lo12:.LANCHOR14]
+	adrp	x0, .LANCHOR22
+	ldrb	w0, [x0, #:lo12:.LANCHOR22]
 	cmp	w0, 9
-	adrp	x0, .LANCHOR13
-	ldr	x0, [x0, #:lo12:.LANCHOR13]
-	bne	.L105
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
+	bne	.L226
 	ldr	w0, [x0, 80]
-.L107:
+.L228:
 	ubfx	x0, x0, 8, 8
 	ret
-.L105:
+.L226:
 	ldr	w0, [x0, 304]
-	b	.L107
+	b	.L228
 	.size	nandc_get_ddr_para, .-nandc_get_ddr_para
 	.section	.text.nandc_set_if_mode,"ax",@progbits
 	.align	2
 	.global	nandc_set_if_mode
 	.type	nandc_set_if_mode, %function
 nandc_set_if_mode:
-	adrp	x1, .LANCHOR13
+	adrp	x1, .LANCHOR21
 	and	w0, w0, 255
 	tst	w0, 6
-	ldr	x2, [x1, #:lo12:.LANCHOR13]
+	ldr	x2, [x1, #:lo12:.LANCHOR21]
 	ldr	w1, [x2]
-	beq	.L109
+	beq	.L230
 	tst	x0, 4
 	orr	w1, w1, 24576
-	adrp	x0, .LANCHOR14
+	adrp	x0, .LANCHOR22
 	and	w1, w1, -32769
 	orr	w1, w1, 196608
-	ldrb	w0, [x0, #:lo12:.LANCHOR14]
+	ldrb	w0, [x0, #:lo12:.LANCHOR22]
 	orr	w3, w1, 32768
 	csel	w1, w3, w1, ne
 	cmp	w0, 9
 	mov	w0, 4099
 	movk	w0, 0x10, lsl 16
-	bne	.L111
+	bne	.L232
 	mov	w3, 8321
 	str	w3, [x2, 8]
 	str	w0, [x2, 80]
@@ -708,10 +1034,10 @@ nandc_set_if_mode:
 	str	w0, [x2, 84]
 	mov	w0, 39
 	str	w0, [x2, 84]
-.L112:
+.L233:
 	str	w1, [x2]
 	ret
-.L111:
+.L232:
 	mov	w3, 8322
 	str	w3, [x2, 344]
 	str	w0, [x2, 304]
@@ -719,20 +1045,20 @@ nandc_set_if_mode:
 	str	w0, [x2, 308]
 	mov	w0, 39
 	str	w0, [x2, 308]
-	b	.L112
-.L109:
+	b	.L233
+.L230:
 	and	w1, w1, -8193
-	b	.L112
+	b	.L233
 	.size	nandc_set_if_mode, .-nandc_set_if_mode
 	.section	.text.nandc_cs,"ax",@progbits
 	.align	2
 	.global	nandc_cs
 	.type	nandc_cs, %function
 nandc_cs:
-	adrp	x1, .LANCHOR13
+	adrp	x1, .LANCHOR21
 	mov	w2, 1
 	lsl	w0, w2, w0
-	ldr	x3, [x1, #:lo12:.LANCHOR13]
+	ldr	x3, [x1, #:lo12:.LANCHOR21]
 	ldr	w1, [x3]
 	bfi	w1, w0, 0, 8
 	str	w1, [x3]
@@ -743,8 +1069,8 @@ nandc_cs:
 	.global	nandc_de_cs
 	.type	nandc_de_cs, %function
 nandc_de_cs:
-	adrp	x0, .LANCHOR13
-	ldr	x1, [x0, #:lo12:.LANCHOR13]
+	adrp	x0, .LANCHOR21
+	ldr	x1, [x0, #:lo12:.LANCHOR21]
 	ldr	w0, [x1]
 	and	w0, w0, -256
 	and	w0, w0, -131073
@@ -756,57 +1082,57 @@ nandc_de_cs:
 	.global	flash_wait_device_ready_raw
 	.type	flash_wait_device_ready_raw, %function
 flash_wait_device_ready_raw:
-	stp	x29, x30, [sp, -16]!
-	mov	w5, w1
-	adrp	x1, .LANCHOR15
-	and	w0, w0, 255
+	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
-	ldrb	w1, [x1, #:lo12:.LANCHOR15]
-	cmp	w1, w0
-	bhi	.L118
-	adrp	x1, .LANCHOR16
+	str	x21, [sp, 32]
+	and	w21, w0, 255
+	adrp	x0, .LANCHOR12
+	stp	x19, x20, [sp, 16]
+	mov	w19, w1
+	mov	w20, w2
+	ldrb	w0, [x0, #:lo12:.LANCHOR12]
+	cmp	w0, w21
+	bhi	.L239
+	adrp	x1, .LANCHOR23
 	adrp	x0, .LC0
-	mov	w2, 620
-	add	x1, x1, :lo12:.LANCHOR16
+	mov	w2, 599
+	add	x1, x1, :lo12:.LANCHOR23
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L119:
-	b	.L119
-.L118:
-	adrp	x1, .LANCHOR17
-	add	x1, x1, :lo12:.LANCHOR17
-	mov	w7, w2
-	ldrb	w6, [x1, w0, sxtw]
-	adrp	x0, .LANCHOR13
-	ldr	x4, [x0, #:lo12:.LANCHOR13]
-	mov	w0, w6
+.L239:
+	adrp	x0, .LANCHOR24
+	add	x0, x0, :lo12:.LANCHOR24
+	ldrb	w5, [x0, w21, sxtw]
+	adrp	x0, .LANCHOR21
+	ldr	x4, [x0, #:lo12:.LANCHOR21]
+	mov	w0, w5
 	bl	nandc_cs
-	ubfiz	x3, x6, 8, 8
-	add	x3, x4, x3
+	ubfiz	x2, x5, 8, 8
+	lsr	w6, w19, 8
+	lsr	w7, w19, 16
+	and	w19, w19, 255
+	add	x2, x4, x2
+	mov	w4, 120
+.L242:
+	str	w4, [x2, 2056]
 	mov	w0, 120
-	and	w1, w5, 255
-	str	w0, [x3, 2056]
-	str	w1, [x3, 2052]
-	lsr	w1, w5, 8
-	str	w1, [x3, 2052]
-	lsr	w5, w5, 16
-	str	w5, [x3, 2052]
-.L126:
+	str	w19, [x2, 2052]
+	str	w6, [x2, 2052]
+	str	w7, [x2, 2052]
 	bl	timer_delay_ns
-	ldr	w2, [x3, 2048]
-	and	w2, w2, 255
-	bics	wzr, w7, w2
-	bne	.L121
-	cmp	w2, 255
-	beq	.L121
-	mov	w0, w6
+	ldr	w3, [x2, 2048]
+	and	w3, w3, 255
+	bics	wzr, w20, w3
+	bne	.L242
+	cmp	w3, 255
+	beq	.L242
+	mov	w0, w5
 	bl	nandc_de_cs
-	ldp	x29, x30, [sp], 16
-	mov	w0, w2
+	ldp	x19, x20, [sp, 16]
+	mov	w0, w3
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 48
 	ret
-.L121:
-	mov	w0, 20
-	b	.L126
 	.size	flash_wait_device_ready_raw, .-flash_wait_device_ready_raw
 	.section	.text.flash_wait_device_ready,"ax",@progbits
 	.align	2
@@ -817,31 +1143,31 @@ flash_wait_device_ready:
 	ubfx	x6, x0, 21, 3
 	and	w1, w0, 2097151
 	tst	x0, 50331648
-	bne	.L128
-	adrp	x0, .LANCHOR18
-	adrp	x5, .LANCHOR19
-	ldrb	w0, [x0, #:lo12:.LANCHOR18]
-	cbz	w0, .L129
-	ldrb	w0, [x5, #:lo12:.LANCHOR19]
-	cbz	w0, .L128
-.L129:
-	adrp	x0, .LANCHOR20
-	ldrh	w3, [x0, #:lo12:.LANCHOR20]
-	ldrb	w0, [x5, #:lo12:.LANCHOR19]
+	bne	.L246
+	adrp	x0, .LANCHOR11
+	adrp	x5, .LANCHOR25
+	ldrb	w0, [x0, #:lo12:.LANCHOR11]
+	cbz	w0, .L247
+	ldrb	w0, [x5, #:lo12:.LANCHOR25]
+	cbz	w0, .L246
+.L247:
+	adrp	x0, .LANCHOR26
+	ldrh	w3, [x0, #:lo12:.LANCHOR26]
+	ldrb	w0, [x5, #:lo12:.LANCHOR25]
 	udiv	w4, w1, w3
 	mul	w4, w4, w3
 	sub	w3, w1, w4
-	cbz	w0, .L130
+	cbz	w0, .L248
 	add	w1, w4, w3, lsl 1
-.L128:
+.L246:
 	mov	w0, w6
 	b	flash_wait_device_ready_raw
-.L130:
-	adrp	x5, .LANCHOR21
-	add	x5, x5, :lo12:.LANCHOR21
+.L248:
+	adrp	x5, .LANCHOR27
+	add	x5, x5, :lo12:.LANCHOR27
 	ldrh	w3, [x5, w3, uxtw 1]
 	add	w1, w3, w4
-	b	.L128
+	b	.L246
 	.size	flash_wait_device_ready, .-flash_wait_device_ready
 	.section	.text.nandc_wait_flash_ready,"ax",@progbits
 	.align	2
@@ -851,25 +1177,25 @@ nandc_wait_flash_ready:
 	mov	w2, 34464
 	stp	x29, x30, [sp, -32]!
 	movk	w2, 0x1, lsl 16
-	adrp	x3, .LANCHOR13
+	adrp	x3, .LANCHOR21
 	add	x29, sp, 0
-.L139:
+.L257:
 	mov	w0, 100
 	bl	timer_delay_ns
-	ldr	x0, [x3, #:lo12:.LANCHOR13]
+	ldr	x0, [x3, #:lo12:.LANCHOR21]
 	ldr	w0, [x0]
 	str	w0, [x29, 24]
 	ldr	w0, [x29, 24]
-	tbnz	x0, 9, .L140
+	tbnz	x0, 9, .L258
 	subs	w2, w2, #1
-	bne	.L139
+	bne	.L257
 	mov	w0, -1
-.L137:
+.L255:
 	ldp	x29, x30, [sp], 32
 	ret
-.L140:
+.L258:
 	mov	w0, 0
-	b	.L137
+	b	.L255
 	.size	nandc_wait_flash_ready, .-nandc_wait_flash_ready
 	.section	.text.sandisk_set_rr_para,"ax",@progbits
 	.align	2
@@ -887,35 +1213,35 @@ sandisk_set_rr_para:
 	mov	w0, 200
 	bl	timer_delay_ns
 	add	w1, w2, 1
-	adrp	x0, .LANCHOR11
-	adrp	x2, .LANCHOR7
-	add	x2, x2, :lo12:.LANCHOR7
-	ldrb	w4, [x0, #:lo12:.LANCHOR11]
-	adrp	x0, .LANCHOR9
-	ldrb	w5, [x0, #:lo12:.LANCHOR9]
+	adrp	x0, .LANCHOR19
+	adrp	x2, .LANCHOR15
+	add	x2, x2, :lo12:.LANCHOR15
+	ldrb	w4, [x0, #:lo12:.LANCHOR19]
+	adrp	x0, .LANCHOR17
+	ldrb	w5, [x0, #:lo12:.LANCHOR17]
 	mov	w0, 5
 	umull	x1, w1, w0
-	adrp	x0, .LANCHOR8
-	add	x0, x0, :lo12:.LANCHOR8
+	adrp	x0, .LANCHOR16
+	add	x0, x0, :lo12:.LANCHOR16
 	add	x2, x2, x1
 	add	x1, x0, x1
 	mov	x0, 0
-.L144:
+.L262:
 	cmp	w4, w0
-	bhi	.L147
+	bhi	.L265
 	ldp	x29, x30, [sp], 16
 	b	nandc_wait_flash_ready
-.L147:
+.L265:
 	cmp	w5, 67
-	bne	.L145
+	bne	.L263
 	ldrsb	w6, [x1, x0]
-.L149:
+.L267:
 	add	x0, x0, 1
 	str	w6, [x3]
-	b	.L144
-.L145:
+	b	.L262
+.L263:
 	ldrsb	w6, [x2, x0]
-	b	.L149
+	b	.L267
 	.size	sandisk_set_rr_para, .-sandisk_set_rr_para
 	.section	.text.toshiba_3d_set_tlc_rr_para,"ax",@progbits
 	.align	2
@@ -934,8 +1260,8 @@ toshiba_3d_set_tlc_rr_para:
 	madd	x1, x2, x1, x1
 	mov	w0, -119
 	str	w0, [x4, 4]
-	adrp	x0, .LANCHOR22
-	add	x0, x0, :lo12:.LANCHOR22
+	adrp	x0, .LANCHOR28
+	add	x0, x0, :lo12:.LANCHOR28
 	add	x5, x0, x1
 	ldrsb	w0, [x0, x1]
 	str	w0, [x4]
@@ -970,8 +1296,8 @@ toshiba_3d_set_slc_rr_para:
 	str	wzr, [x0, 4]
 	mov	w2, -117
 	str	w2, [x0, 4]
-	adrp	x2, .LANCHOR23
-	add	x2, x2, :lo12:.LANCHOR23
+	adrp	x2, .LANCHOR29
+	add	x2, x2, :lo12:.LANCHOR29
 	add	x1, x2, x1, uxtb
 	ldrsb	w1, [x1, 1]
 	str	w1, [x0]
@@ -987,7 +1313,7 @@ toshiba_3d_set_slc_rr_para:
 toshiba_tlc_set_rr_para:
 	mov	w6, 239
 	uxtw	x1, w1
-	cbz	w2, .L154
+	cbz	w2, .L272
 	stp	x29, x30, [sp, -16]!
 	mov	x4, x0
 	mov	x2, 7
@@ -996,8 +1322,8 @@ toshiba_tlc_set_rr_para:
 	str	w6, [x4, 8]
 	mul	x1, x1, x2
 	str	w0, [x4, 4]
-	adrp	x0, .LANCHOR24
-	add	x0, x0, :lo12:.LANCHOR24
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
 	add	x5, x0, x1
 	ldrb	w0, [x0, x1]
 	str	w0, [x4]
@@ -1019,58 +1345,61 @@ toshiba_tlc_set_rr_para:
 	str	w0, [x4]
 	str	wzr, [x4]
 	ldp	x29, x30, [sp], 16
-.L157:
+.L275:
 	b	nandc_wait_flash_ready
-.L154:
+.L272:
 	str	w6, [x0, 8]
 	mov	w2, 20
 	str	w2, [x0, 4]
-	adrp	x2, .LANCHOR25
-	add	x2, x2, :lo12:.LANCHOR25
+	adrp	x2, .LANCHOR31
+	add	x2, x2, :lo12:.LANCHOR31
 	ldrb	w1, [x2, x1]
 	str	w1, [x0]
 	str	wzr, [x0]
 	str	wzr, [x0]
 	str	wzr, [x0]
-	b	.L157
+	b	.L275
 	.size	toshiba_tlc_set_rr_para, .-toshiba_tlc_set_rr_para
 	.section	.text.zftl_flash_enter_slc_mode,"ax",@progbits
 	.align	2
 	.global	zftl_flash_enter_slc_mode
 	.type	zftl_flash_enter_slc_mode, %function
 zftl_flash_enter_slc_mode:
-	adrp	x1, .LANCHOR18
+	adrp	x1, .LANCHOR11
 	and	x0, x0, 255
-	ldrb	w2, [x1, #:lo12:.LANCHOR18]
-	cbz	w2, .L160
-	adrp	x1, .LANCHOR13
+	ldrb	w2, [x1, #:lo12:.LANCHOR11]
+	cbz	w2, .L278
+	adrp	x1, .LANCHOR21
 	cmp	w2, 1
-	ldr	x1, [x1, #:lo12:.LANCHOR13]
-	bne	.L163
-.L180:
-	adrp	x2, .LANCHOR26+29
-	ldrb	w2, [x2, #:lo12:.LANCHOR26+29]
-	cbz	w2, .L160
+	ldr	x1, [x1, #:lo12:.LANCHOR21]
+	bne	.L281
+.L298:
+	adrp	x2, .LANCHOR32+29
+	ldrb	w2, [x2, #:lo12:.LANCHOR32+29]
+	cbz	w2, .L278
 	add	x0, x0, 8
 	add	x0, x1, x0, lsl 8
 	str	w2, [x0, 8]
 	ret
-.L163:
+.L281:
 	cmp	w2, 2
-	bne	.L165
-	adrp	x2, .LANCHOR27
-	ldrb	w3, [x2, #:lo12:.LANCHOR27]
-	cbz	w3, .L160
-	strb	wzr, [x2, #:lo12:.LANCHOR27]
-	b	.L180
-.L165:
+	bne	.L283
+	adrp	x2, .LANCHOR33
+	add	x2, x2, :lo12:.LANCHOR33
+	ldrb	w3, [x2, x0]
+	cbz	w3, .L278
+	strb	wzr, [x2, x0]
+	b	.L298
+.L283:
 	cmp	w2, 3
-	bne	.L160
-	adrp	x2, .LANCHOR27
-	ldrb	w3, [x2, #:lo12:.LANCHOR27]
-	cbz	w3, .L160
+	bne	.L278
+	adrp	x2, .LANCHOR33
+	sxtw	x3, w0
+	add	x2, x2, :lo12:.LANCHOR33
+	ldrb	w4, [x2, x3]
+	cbz	w4, .L278
 	ubfiz	x0, x0, 8, 8
-	strb	wzr, [x2, #:lo12:.LANCHOR27]
+	strb	wzr, [x2, x3]
 	add	x0, x1, x0
 	mov	w1, 239
 	str	w1, [x0, 2056]
@@ -1082,7 +1411,7 @@ zftl_flash_enter_slc_mode:
 	str	wzr, [x0, 2048]
 	str	wzr, [x0, 2048]
 	b	nandc_wait_flash_ready
-.L160:
+.L278:
 	ret
 	.size	zftl_flash_enter_slc_mode, .-zftl_flash_enter_slc_mode
 	.section	.text.zftl_flash_exit_slc_mode,"ax",@progbits
@@ -1090,115 +1419,208 @@ zftl_flash_enter_slc_mode:
 	.global	zftl_flash_exit_slc_mode
 	.type	zftl_flash_exit_slc_mode, %function
 zftl_flash_exit_slc_mode:
-	adrp	x1, .LANCHOR18
+	adrp	x1, .LANCHOR11
 	and	x0, x0, 255
-	ldrb	w2, [x1, #:lo12:.LANCHOR18]
-	cbz	w2, .L181
-	adrp	x1, .LANCHOR13
+	ldrb	w2, [x1, #:lo12:.LANCHOR11]
+	cbz	w2, .L299
+	adrp	x1, .LANCHOR21
 	cmp	w2, 1
-	ldr	x1, [x1, #:lo12:.LANCHOR13]
-	bne	.L184
-	adrp	x2, .LANCHOR26+30
-	ldrb	w2, [x2, #:lo12:.LANCHOR26+30]
-.L201:
-	cbz	w2, .L181
+	ldr	x1, [x1, #:lo12:.LANCHOR21]
+	bne	.L302
+	adrp	x2, .LANCHOR32+30
+	ldrb	w2, [x2, #:lo12:.LANCHOR32+30]
+.L319:
+	cbz	w2, .L299
 	add	x0, x0, 8
 	add	x0, x1, x0, lsl 8
 	str	w2, [x0, 8]
 	ret
-.L184:
+.L302:
 	cmp	w2, 2
-	bne	.L186
-	adrp	x4, .LANCHOR27
-	ldrb	w2, [x4, #:lo12:.LANCHOR27]
-	cbnz	w2, .L181
-	adrp	x2, .LANCHOR26
-	add	x2, x2, :lo12:.LANCHOR26
+	bne	.L304
+	adrp	x3, .LANCHOR33
+	add	x3, x3, :lo12:.LANCHOR33
+	ldrb	w2, [x3, x0]
+	cbnz	w2, .L299
+	adrp	x2, .LANCHOR32
+	add	x2, x2, :lo12:.LANCHOR32
 	mov	w5, 4
-	ldrb	w3, [x2, 12]
+	ldrb	w4, [x2, 12]
 	ldrb	w2, [x2, 30]
-	cmp	w3, 2
-	csel	w3, w3, w5, eq
-	strb	w3, [x4, #:lo12:.LANCHOR27]
-	b	.L201
-.L186:
+	cmp	w4, 2
+	csel	w4, w4, w5, eq
+	strb	w4, [x3, x0]
+	b	.L319
+.L304:
 	cmp	w2, 3
-	bne	.L181
-	adrp	x3, .LANCHOR27
-	ldrb	w2, [x3, #:lo12:.LANCHOR27]
-	cbnz	w2, .L181
+	bne	.L299
+	adrp	x3, .LANCHOR33
+	sxtw	x4, w0
+	add	x3, x3, :lo12:.LANCHOR33
+	ldrb	w2, [x3, x4]
+	cbnz	w2, .L299
 	ubfiz	x0, x0, 8, 8
-	adrp	x2, .LANCHOR26+12
+	adrp	x2, .LANCHOR32+12
 	add	x0, x1, x0
 	mov	w1, 239
-	ldrb	w2, [x2, #:lo12:.LANCHOR26+12]
-	mov	w4, 4
+	ldrb	w2, [x2, #:lo12:.LANCHOR32+12]
+	mov	w5, 4
 	str	w1, [x0, 2056]
 	cmp	w2, 2
 	mov	w1, 145
 	str	w1, [x0, 2052]
-	csel	w2, w2, w4, eq
+	csel	w2, w2, w5, eq
 	str	w2, [x0, 2048]
 	mov	w1, 1
 	str	w1, [x0, 2048]
 	str	wzr, [x0, 2048]
 	str	wzr, [x0, 2048]
-	strb	w2, [x3, #:lo12:.LANCHOR27]
+	strb	w2, [x3, x4]
 	b	nandc_wait_flash_ready
-.L181:
+.L299:
 	ret
 	.size	zftl_flash_exit_slc_mode, .-zftl_flash_exit_slc_mode
-	.section	.text.flash_erase_duplane_block,"ax",@progbits
+	.section	.text.flash_start_page_read,"ax",@progbits
+	.align	2
+	.global	flash_start_page_read
+	.type	flash_start_page_read, %function
+flash_start_page_read:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w20, w0, 255
+	adrp	x0, .LANCHOR12
+	stp	x21, x22, [sp, 32]
+	ubfx	x22, x1, 21, 3
+	and	w19, w1, 2097151
+	ldrb	w0, [x0, #:lo12:.LANCHOR12]
+	ubfx	x21, x1, 24, 2
+	cmp	w0, w22
+	bhi	.L321
+	adrp	x1, .LANCHOR34
+	adrp	x0, .LC0
+	mov	w2, 736
+	add	x1, x1, :lo12:.LANCHOR34
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L321:
+	adrp	x0, .LANCHOR24
+	add	x0, x0, :lo12:.LANCHOR24
+	ldrb	w7, [x0, w22, sxtw]
+	adrp	x0, .LANCHOR21
+	ldr	x6, [x0, #:lo12:.LANCHOR21]
+	mov	w0, w7
+	bl	nandc_cs
+	cbnz	w21, .L322
+	adrp	x0, .LANCHOR11
+	adrp	x1, .LANCHOR25
+	ldrb	w0, [x0, #:lo12:.LANCHOR11]
+	cbz	w0, .L323
+	ldrb	w0, [x1, #:lo12:.LANCHOR25]
+	cbz	w0, .L324
+.L323:
+	adrp	x0, .LANCHOR26
+	ldrb	w1, [x1, #:lo12:.LANCHOR25]
+	ldrh	w2, [x0, #:lo12:.LANCHOR26]
+	udiv	w0, w19, w2
+	mul	w0, w0, w2
+	sub	w19, w19, w0
+	cbz	w1, .L325
+	add	w19, w0, w19, lsl 1
+.L324:
+	mov	w0, w7
+	bl	zftl_flash_enter_slc_mode
+	b	.L326
+.L325:
+	adrp	x1, .LANCHOR27
+	add	x1, x1, :lo12:.LANCHOR27
+	ldrh	w19, [x1, w19, uxtw 1]
+	add	w19, w19, w0
+.L326:
+	ubfiz	x0, x7, 8, 8
+	and	w1, w19, 255
+	add	x0, x6, x0
+	ldp	x21, x22, [sp, 32]
+	str	wzr, [x0, 2056]
+	str	wzr, [x0, 2052]
+	str	wzr, [x0, 2052]
+	str	w1, [x0, 2052]
+	lsr	w1, w19, 8
+	str	w1, [x0, 2052]
+	lsr	w19, w19, 16
+	str	w19, [x0, 2052]
+	str	w20, [x0, 2056]
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	b	nandc_de_cs
+.L322:
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrb	w0, [x0, 12]
+	cmp	w0, 3
+	bne	.L327
+	sxtw	x0, w7
+	add	x0, x0, 8
+	add	x0, x6, x0, lsl 8
+	str	w21, [x0, 8]
+	b	.L326
+.L327:
+	mov	w0, w7
+	bl	zftl_flash_exit_slc_mode
+	b	.L326
+	.size	flash_start_page_read, .-flash_start_page_read
+	.section	.text.flash_erase_duplane_block,"ax",@progbits
 	.align	2
 	.global	flash_erase_duplane_block
 	.type	flash_erase_duplane_block, %function
 flash_erase_duplane_block:
 	stp	x29, x30, [sp, -80]!
-	and	w0, w0, 255
 	add	x29, sp, 0
-	str	x25, [sp, 64]
-	and	w25, w1, 255
-	adrp	x1, .LANCHOR15
 	stp	x19, x20, [sp, 16]
+	and	w19, w0, 255
+	adrp	x0, .LANCHOR12
 	stp	x21, x22, [sp, 32]
-	ldrb	w1, [x1, #:lo12:.LANCHOR15]
+	str	x25, [sp, 64]
+	mov	w22, w2
+	ldrb	w0, [x0, #:lo12:.LANCHOR12]
+	mov	w21, w3
 	stp	x23, x24, [sp, 48]
-	cmp	w1, w0
-	bhi	.L203
-	adrp	x1, .LANCHOR28
+	and	w25, w1, 255
+	cmp	w0, w19
+	bhi	.L333
+	adrp	x1, .LANCHOR35
 	adrp	x0, .LC0
-	mov	w2, 531
-	add	x1, x1, :lo12:.LANCHOR28
+	mov	w2, 510
+	add	x1, x1, :lo12:.LANCHOR35
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L204:
-	b	.L204
-.L203:
-	adrp	x1, .LANCHOR17
-	add	x1, x1, :lo12:.LANCHOR17
-	mov	w22, w2
-	mov	w21, w3
-	ldrb	w20, [x1, w0, sxtw]
-	adrp	x0, .LANCHOR13
-	ldr	x24, [x0, #:lo12:.LANCHOR13]
-	adrp	x0, .LANCHOR29
+.L333:
+	adrp	x0, .LANCHOR24
+	add	x0, x0, :lo12:.LANCHOR24
+	ldrb	w20, [x0, w19, sxtw]
+	adrp	x0, .LANCHOR21
+	ldr	x24, [x0, #:lo12:.LANCHOR21]
+	adrp	x0, .LANCHOR7
 	and	x19, x20, 255
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
 	add	x23, x19, 8
 	add	x23, x24, x23, lsl 8
-	tbz	x0, 4, .L205
-	adrp	x0, .LC1
+	tbz	x0, 4, .L334
+	adrp	x0, .LC31
+	mov	w3, w21
+	mov	w2, w22
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC1
+	add	x0, x0, :lo12:.LC31
 	bl	printf
-.L205:
+.L334:
 	bl	nandc_wait_flash_ready
 	mov	w0, w20
 	bl	nandc_cs
 	mov	w0, w20
-	cbnz	w25, .L206
+	cbnz	w25, .L335
 	bl	zftl_flash_enter_slc_mode
-.L207:
+.L336:
 	add	x24, x24, x19, lsl 8
 	mov	w0, 96
 	str	w0, [x24, 2056]
@@ -1208,9 +1630,9 @@ flash_erase_duplane_block:
 	str	w0, [x24, 2052]
 	lsr	w0, w22, 16
 	str	w0, [x24, 2052]
-	adrp	x0, .LANCHOR30
-	ldrb	w0, [x0, #:lo12:.LANCHOR30]
-	cbnz	w0, .L210
+	adrp	x0, .LANCHOR36
+	ldrb	w0, [x0, #:lo12:.LANCHOR36]
+	cbnz	w0, .L339
 	mov	w0, 208
 	str	w0, [x24, 2056]
 	mov	w19, 5
@@ -1218,7 +1640,7 @@ flash_erase_duplane_block:
 	mov	x0, x23
 	bl	flash_read_status
 	and	w5, w0, w19
-.L208:
+.L337:
 	mov	w0, 96
 	str	w0, [x24, 2056]
 	and	w0, w21, 255
@@ -1238,12 +1660,12 @@ flash_erase_duplane_block:
 	bl	nandc_de_cs
 	and	w19, w2, w19
 	orr	w19, w19, w5
-	cbz	w19, .L209
-	adrp	x0, .LC2
+	cbz	w19, .L338
+	adrp	x0, .LC32
 	mov	w1, w22
-	add	x0, x0, :lo12:.LC2
+	add	x0, x0, :lo12:.LC32
 	bl	printf
-.L209:
+.L338:
 	mov	w0, w19
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -1251,100 +1673,101 @@ flash_erase_duplane_block:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L206:
+.L335:
 	bl	zftl_flash_exit_slc_mode
-	b	.L207
-.L210:
+	b	.L336
+.L339:
 	mov	w5, 0
-	b	.L208
+	b	.L337
 	.size	flash_erase_duplane_block, .-flash_erase_duplane_block
 	.section	.text.flash_erase_block_en,"ax",@progbits
 	.align	2
 	.global	flash_erase_block_en
 	.type	flash_erase_block_en, %function
 flash_erase_block_en:
-	stp	x29, x30, [sp, -64]!
-	and	w0, w0, 255
+	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	and	w24, w1, 255
-	adrp	x1, .LANCHOR15
 	stp	x19, x20, [sp, 16]
+	and	w19, w0, 255
+	adrp	x0, .LANCHOR12
 	stp	x21, x22, [sp, 32]
-	ldrb	w1, [x1, #:lo12:.LANCHOR15]
-	cmp	w1, w0
-	bhi	.L219
-	adrp	x1, .LANCHOR31
+	str	x25, [sp, 64]
+	mov	w21, w2
+	ldrb	w0, [x0, #:lo12:.LANCHOR12]
+	and	w22, w2, 2097151
+	stp	x23, x24, [sp, 48]
+	and	w25, w1, 255
+	cmp	w0, w19
+	bhi	.L348
+	adrp	x1, .LANCHOR37
 	adrp	x0, .LC0
-	mov	w2, 576
-	add	x1, x1, :lo12:.LANCHOR31
+	mov	w2, 555
+	add	x1, x1, :lo12:.LANCHOR37
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L220:
-	b	.L220
-.L219:
-	adrp	x1, .LANCHOR17
-	add	x1, x1, :lo12:.LANCHOR17
-	mov	w21, w2
-	ldrb	w20, [x1, w0, sxtw]
-	adrp	x0, .LANCHOR13
-	ldr	x23, [x0, #:lo12:.LANCHOR13]
-	adrp	x0, .LANCHOR29
+.L348:
+	adrp	x0, .LANCHOR24
+	add	x0, x0, :lo12:.LANCHOR24
+	ldrb	w20, [x0, w19, sxtw]
+	adrp	x0, .LANCHOR21
+	ldr	x24, [x0, #:lo12:.LANCHOR21]
+	adrp	x0, .LANCHOR7
 	and	x19, x20, 255
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	add	x22, x19, 8
-	add	x22, x23, x22, lsl 8
-	tbz	x0, 4, .L221
-	adrp	x0, .LC3
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	add	x23, x19, 8
+	add	x23, x24, x23, lsl 8
+	tbz	x0, 4, .L349
+	adrp	x0, .LC33
+	mov	w2, w21
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC3
+	add	x0, x0, :lo12:.LC33
 	bl	printf
-.L221:
+.L349:
 	bl	nandc_wait_flash_ready
 	mov	w0, w20
 	bl	nandc_cs
 	mov	w0, w20
-	cbnz	w24, .L222
+	cbnz	w25, .L350
 	bl	zftl_flash_enter_slc_mode
-.L223:
-	add	x0, x23, x19, lsl 8
-	mov	w2, 96
-	and	w1, w21, 2097151
-	str	w2, [x0, 2056]
-	and	w2, w21, 255
-	str	w2, [x0, 2052]
-	lsr	w2, w1, 8
-	str	w2, [x0, 2052]
-	lsr	w1, w1, 16
+.L351:
+	add	x0, x24, x19, lsl 8
+	mov	w1, 96
+	str	w1, [x0, 2056]
+	and	w1, w21, 255
+	str	w1, [x0, 2052]
+	lsr	w1, w22, 8
 	str	w1, [x0, 2052]
+	lsr	w22, w22, 16
+	str	w22, [x0, 2052]
 	mov	w1, 208
 	str	w1, [x0, 2056]
 	bl	nandc_wait_flash_ready
-	mov	x0, x22
+	mov	x0, x23
 	bl	flash_read_status
 	mov	w19, w0
 	mov	w0, w20
 	bl	nandc_de_cs
 	mov	w0, 5
 	ands	w19, w19, w0
-	beq	.L224
-	adrp	x0, .LANCHOR20
+	beq	.L352
+	adrp	x0, .LANCHOR26
 	mov	w2, w19
-	ldrh	w1, [x0, #:lo12:.LANCHOR20]
-	adrp	x0, .LC4
-	add	x0, x0, :lo12:.LC4
+	ldrh	w1, [x0, #:lo12:.LANCHOR26]
+	adrp	x0, .LC34
+	add	x0, x0, :lo12:.LC34
 	udiv	w1, w21, w1
 	bl	printf
-.L224:
+.L352:
 	mov	w0, w19
+	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 64
+	ldp	x29, x30, [sp], 80
 	ret
-.L222:
+.L350:
 	bl	zftl_flash_exit_slc_mode
-	b	.L223
+	b	.L351
 	.size	flash_erase_block_en, .-flash_erase_block_en
 	.section	.text.flash_erase_block,"ax",@progbits
 	.align	2
@@ -1361,133 +1784,157 @@ flash_erase_block:
 	.type	flash_erase_all, %function
 flash_erase_all:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR26
-	add	x0, x0, :lo12:.LANCHOR26
+	adrp	x0, .LANCHOR32
+	add	x0, x0, :lo12:.LANCHOR32
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w19, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR20
+	adrp	x23, .LANCHOR26
 	stp	x21, x22, [sp, 32]
-	add	x23, x23, :lo12:.LANCHOR20
+	add	x23, x23, :lo12:.LANCHOR26
 	ldrh	w20, [x0, 14]
-	adrp	x22, .LANCHOR15
+	adrp	x22, .LANCHOR12
 	str	x25, [sp, 64]
-	add	x22, x22, :lo12:.LANCHOR15
-	adrp	x24, .LANCHOR17
+	add	x22, x22, :lo12:.LANCHOR12
+	adrp	x24, .LANCHOR24
 	ldrb	w1, [x0, 13]
 	mul	w20, w20, w1
 	and	w20, w20, 65535
-.L234:
+.L362:
 	ldrb	w0, [x22]
 	cmp	w0, w19
-	bhi	.L237
+	bhi	.L365
 	ldp	x19, x20, [sp, 16]
 	mov	w1, 0
 	ldp	x21, x22, [sp, 32]
-	adrp	x0, .LC5
+	adrp	x0, .LC35
 	ldp	x23, x24, [sp, 48]
-	add	x0, x0, :lo12:.LC5
+	add	x0, x0, :lo12:.LC35
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	b	printf
-.L237:
-	add	x0, x24, :lo12:.LANCHOR17
+.L365:
+	add	x0, x24, :lo12:.LANCHOR24
 	mov	w21, 0
 	ldrb	w25, [x0, w19, sxtw]
-.L235:
+.L363:
 	cmp	w20, w21, uxth
-	bhi	.L236
+	bhi	.L364
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L234
-.L236:
+	b	.L362
+.L364:
 	ldrh	w1, [x23]
 	mov	w0, w25
 	mul	w1, w1, w21
 	add	w21, w21, 1
 	bl	flash_erase_block
-	b	.L235
+	b	.L363
 	.size	flash_erase_all, .-flash_erase_all
 	.section	.text.flash_set_interface_mode,"ax",@progbits
 	.align	2
 	.global	flash_set_interface_mode
 	.type	flash_set_interface_mode, %function
 flash_set_interface_mode:
-	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR13
-	adrp	x5, .LANCHOR33
-	add	x5, x5, :lo12:.LANCHOR33
+	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
-	ldr	x6, [x1, #:lo12:.LANCHOR13]
-	adrp	x1, .LANCHOR32
-	mov	x2, 0
-	mov	w11, 69
-	ldrb	w1, [x1, #:lo12:.LANCHOR32]
-	mov	w7, 239
-	mov	w8, 128
-	mov	w12, 1
-	and	w10, w1, 4
-	and	w4, w1, 1
-	mov	w13, 35
-	mov	w14, 5
-.L247:
-	lsl	x1, x2, 3
-	ldrb	w3, [x1, x5]
-	cmp	w3, 152
-	ccmp	w3, w11, 4, ne
-	beq	.L240
-	cmp	w3, 44
-	bne	.L241
-.L240:
-	cmp	w0, 1
-	bne	.L242
-	cbz	w4, .L241
-	add	x1, x6, x2, lsl 8
-	cmp	w3, 44
-	str	w7, [x1, 2056]
-	bne	.L243
-	str	w0, [x1, 2052]
-	str	w14, [x1, 2048]
-.L246:
-	str	wzr, [x1, 2048]
-	str	wzr, [x1, 2048]
-	str	wzr, [x1, 2048]
-.L241:
-	add	x2, x2, 1
-	cmp	x2, 4
-	bne	.L247
+	stp	x23, x24, [sp, 48]
+	adrp	x24, .LANCHOR38
+	stp	x21, x22, [sp, 32]
+	adrp	x23, .LANCHOR7
+	adrp	x22, .LANCHOR39
+	str	x25, [sp, 64]
+	add	x24, x24, :lo12:.LANCHOR38
+	add	x22, x22, :lo12:.LANCHOR39
+	add	x23, x23, :lo12:.LANCHOR7
+	mov	w25, w0
+	stp	x19, x20, [sp, 16]
+	mov	x20, 0
+.L377:
+	lsl	x0, x20, 3
+	ldrb	w21, [x0, x24]
+	mov	w0, 69
+	cmp	w21, 152
+	ccmp	w21, w0, 4, ne
+	beq	.L368
+	cmp	w21, 44
+	bne	.L369
+.L368:
+	adrp	x0, .LANCHOR21
+	ldrb	w1, [x22]
+	cmp	w25, 1
+	ldr	x19, [x0, #:lo12:.LANCHOR21]
+	bne	.L370
+	tbz	x1, 0, .L369
+	ldr	w0, [x23]
+	tbz	x0, 12, .L371
+	adrp	x0, .LC36
+	add	x0, x0, :lo12:.LC36
+	bl	printf
+.L371:
+	add	x0, x19, x20, lsl 8
+	mov	w1, 239
+	cmp	w21, 44
+	str	w1, [x0, 2056]
+	mov	w1, 1
+	bne	.L372
+	str	w1, [x0, 2052]
+	mov	w1, 5
+.L392:
+	str	w1, [x0, 2048]
+.L376:
+	str	wzr, [x0, 2048]
+	str	wzr, [x0, 2048]
+	str	wzr, [x0, 2048]
+.L369:
+	add	x20, x20, 1
+	cmp	x20, 4
+	bne	.L377
 	bl	nandc_wait_flash_ready
+	ldr	x25, [sp, 64]
 	mov	w0, 0
-	ldp	x29, x30, [sp], 16
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
 	ret
-.L243:
-	str	w8, [x1, 2052]
-	str	w0, [x1, 2048]
-	b	.L246
-.L242:
-	cbz	w10, .L241
-	add	x1, x6, x2, lsl 8
-	cmp	w3, 44
-	str	w7, [x1, 2056]
-	bne	.L245
-	str	w12, [x1, 2052]
-	str	w13, [x1, 2048]
-	b	.L246
-.L245:
-	str	w8, [x1, 2052]
-	str	wzr, [x1, 2048]
-	b	.L246
+.L372:
+	mov	w2, 128
+	str	w2, [x0, 2052]
+	b	.L392
+.L370:
+	tbz	x1, 2, .L369
+	ldr	w0, [x23]
+	tbz	x0, 12, .L374
+	adrp	x0, .LC37
+	add	x0, x0, :lo12:.LC37
+	bl	printf
+.L374:
+	add	x0, x19, x20, lsl 8
+	mov	w1, 239
+	cmp	w21, 44
+	str	w1, [x0, 2056]
+	bne	.L375
+	mov	w1, 1
+	str	w1, [x0, 2052]
+	mov	w1, 35
+	b	.L392
+.L375:
+	mov	w1, 128
+	str	w1, [x0, 2052]
+	str	wzr, [x0, 2048]
+	b	.L376
 	.size	flash_set_interface_mode, .-flash_set_interface_mode
 	.section	.text.flash_reset,"ax",@progbits
 	.align	2
 	.global	flash_reset
 	.type	flash_reset, %function
 flash_reset:
-	adrp	x1, .LANCHOR13
+	adrp	x1, .LANCHOR21
 	ubfiz	x0, x0, 8, 8
 	add	x0, x0, 2048
-	ldr	x1, [x1, #:lo12:.LANCHOR13]
+	ldr	x1, [x1, #:lo12:.LANCHOR21]
 	add	x1, x1, x0
 	mov	w0, 255
 	str	w0, [x1, 8]
@@ -1500,10 +1947,10 @@ flash_reset:
 flash_read_id:
 	and	w10, w0, 255
 	stp	x29, x30, [sp, -16]!
-	adrp	x0, .LANCHOR13
+	adrp	x0, .LANCHOR21
 	mov	x8, x1
 	add	x29, sp, 0
-	ldr	x4, [x0, #:lo12:.LANCHOR13]
+	ldr	x4, [x0, #:lo12:.LANCHOR21]
 	mov	w0, w10
 	bl	flash_reset
 	mov	w0, w10
@@ -1537,18 +1984,18 @@ flash_read_id:
 	sub	w0, w2, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bhi	.L257
+	bhi	.L394
 	ldrb	w7, [x8, 5]
 	add	w1, w10, 1
 	ldrb	w6, [x8, 4]
-	adrp	x0, .LC6
+	adrp	x0, .LC38
 	ldrb	w5, [x8, 3]
-	add	x0, x0, :lo12:.LC6
+	add	x0, x0, :lo12:.LC38
 	ldrb	w4, [x8, 2]
 	ldrb	w3, [x8, 1]
 	ldp	x29, x30, [sp], 16
 	b	printf
-.L257:
+.L394:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	flash_read_id, .-flash_read_id
@@ -1559,12 +2006,12 @@ flash_read_id:
 flash_read_spare:
 	stp	x29, x30, [sp, -16]!
 	mov	x5, x2
-	adrp	x2, .LANCHOR26+9
+	adrp	x2, .LANCHOR32+9
 	ubfiz	x0, x0, 8, 8
 	add	x29, sp, 0
-	ldrb	w3, [x2, #:lo12:.LANCHOR26+9]
-	adrp	x2, .LANCHOR13
-	ldr	x4, [x2, #:lo12:.LANCHOR13]
+	ldrb	w3, [x2, #:lo12:.LANCHOR32+9]
+	adrp	x2, .LANCHOR21
+	ldr	x4, [x2, #:lo12:.LANCHOR21]
 	lsl	w3, w3, 9
 	add	x4, x4, x0
 	and	w0, w1, 255
@@ -1590,62 +2037,76 @@ flash_read_spare:
 	.global	sandisk_prog_test_bad_block
 	.type	sandisk_prog_test_bad_block, %function
 sandisk_prog_test_bad_block:
-	stp	x29, x30, [sp, -16]!
-	adrp	x2, .LANCHOR13
-	and	w0, w0, 255
+	stp	x29, x30, [sp, -48]!
+	mov	w4, w1
+	adrp	x1, .LANCHOR21
+	and	x2, x0, 255
 	add	x29, sp, 0
-	ldr	x4, [x2, #:lo12:.LANCHOR13]
-	adrp	x2, .LANCHOR26
-	add	x3, x2, :lo12:.LANCHOR26
-	mov	x5, x2
-	sxtw	x2, w0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR32
+	ldr	x19, [x1, #:lo12:.LANCHOR21]
+	add	x1, x20, :lo12:.LANCHOR32
+	str	x21, [sp, 32]
+	mov	x0, x2
 	add	x2, x2, 8
-	ldrb	w3, [x3, 29]
-	add	x2, x4, x2, lsl 8
-	cbz	w3, .L263
-.L270:
+	ldrb	w1, [x1, 29]
+	add	x2, x19, x2, lsl 8
+	cbz	w1, .L400
+.L414:
 	ubfiz	x0, x0, 8, 8
-	str	w3, [x2, 8]
-	add	x4, x4, x0
+	str	w1, [x2, 8]
+	add	x19, x19, x0
 	mov	w0, 128
-	str	w0, [x4, 2056]
-	and	w0, w1, 255
-	str	wzr, [x4, 2052]
-	str	wzr, [x4, 2052]
-	str	w0, [x4, 2052]
-	lsr	w0, w1, 8
-	str	w0, [x4, 2052]
-	lsr	w1, w1, 16
-	str	w1, [x4, 2052]
+	str	w0, [x19, 2056]
+	and	w0, w4, 255
+	str	wzr, [x19, 2052]
+	str	wzr, [x19, 2052]
+	str	w0, [x19, 2052]
+	lsr	w0, w4, 8
+	str	w0, [x19, 2052]
+	lsr	w0, w4, 16
+	str	w0, [x19, 2052]
 	mov	w0, 16
-	str	w0, [x4, 2056]
+	str	w0, [x19, 2056]
 	bl	nandc_wait_flash_ready
 	mov	w0, 112
-	str	w0, [x4, 2056]
+	str	w0, [x19, 2056]
 	mov	w0, 80
 	bl	timer_delay_ns
-	add	x2, x5, :lo12:.LANCHOR26
-	ldr	w0, [x4, 2048]
-	mov	w1, 5
-	and	w0, w0, w1
-	ldrb	w1, [x2, 30]
-	cbz	w1, .L262
-	str	w1, [x4, 2056]
-.L262:
-	ldp	x29, x30, [sp], 16
-	ret
-.L263:
-	mov	w3, 162
-	b	.L270
-	.size	sandisk_prog_test_bad_block, .-sandisk_prog_test_bad_block
-	.section	.text.nandc_rdy_status,"ax",@progbits
-	.align	2
-	.global	nandc_rdy_status
-	.type	nandc_rdy_status, %function
-nandc_rdy_status:
-	adrp	x0, .LANCHOR13
+	ldr	w2, [x19, 2048]
+	mov	w0, 5
+	ands	w21, w2, w0
+	beq	.L402
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L402
+	adrp	x0, .LC39
+	mov	w1, w4
+	add	x0, x0, :lo12:.LC39
+	bl	printf
+.L402:
+	add	x20, x20, :lo12:.LANCHOR32
+	ldrb	w0, [x20, 30]
+	cbz	w0, .L399
+	str	w0, [x19, 2056]
+.L399:
+	mov	w0, w21
+	ldr	x21, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+.L400:
+	mov	w1, 162
+	b	.L414
+	.size	sandisk_prog_test_bad_block, .-sandisk_prog_test_bad_block
+	.section	.text.nandc_rdy_status,"ax",@progbits
+	.align	2
+	.global	nandc_rdy_status
+	.type	nandc_rdy_status, %function
+nandc_rdy_status:
+	adrp	x0, .LANCHOR21
 	sub	sp, sp, #16
-	ldr	x0, [x0, #:lo12:.LANCHOR13]
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldr	w0, [x0]
 	str	w0, [sp, 8]
 	ldr	w0, [sp, 8]
@@ -1658,69 +2119,69 @@ nandc_rdy_status:
 	.global	nandc_bch_sel
 	.type	nandc_bch_sel, %function
 nandc_bch_sel:
-	adrp	x2, .LANCHOR34
+	adrp	x2, .LANCHOR40
 	mov	w1, 1
-	strb	w0, [x2, #:lo12:.LANCHOR34]
-	adrp	x2, .LANCHOR14
-	ldrb	w2, [x2, #:lo12:.LANCHOR14]
+	strb	w0, [x2, #:lo12:.LANCHOR40]
+	adrp	x2, .LANCHOR22
+	ldrb	w2, [x2, #:lo12:.LANCHOR22]
 	cmp	w2, 9
-	adrp	x2, .LANCHOR13
-	ldr	x2, [x2, #:lo12:.LANCHOR13]
-	bne	.L274
+	adrp	x2, .LANCHOR21
+	ldr	x2, [x2, #:lo12:.LANCHOR21]
+	bne	.L418
 	str	w1, [x2, 16]
 	cmp	w0, 70
-	beq	.L281
+	beq	.L425
 	cmp	w0, 60
-	beq	.L282
+	beq	.L426
 	cmp	w0, 40
 	cset	w1, eq
 	add	w1, w1, 1
-.L275:
+.L419:
 	lsl	w1, w1, 25
 	orr	w1, w1, 1
 	str	w1, [x2, 32]
 	ret
-.L281:
+.L425:
 	mov	w1, 0
-	b	.L275
-.L282:
+	b	.L419
+.L426:
 	mov	w1, 3
-	b	.L275
-.L274:
+	b	.L419
+.L418:
 	str	w1, [x2, 8]
 	cmp	w0, 16
 	mov	w1, 4096
-	bne	.L277
-.L280:
+	bne	.L421
+.L424:
 	and	w1, w1, -17
-.L278:
+.L422:
 	orr	w1, w1, 1
 	str	w1, [x2, 12]
 	ret
-.L277:
+.L421:
 	cmp	w0, 24
-	bne	.L279
+	bne	.L423
 	orr	w1, w1, 16
-	b	.L278
-.L279:
+	b	.L422
+.L423:
 	orr	w1, w1, 262144
 	cmp	w0, 40
 	orr	w1, w1, 16
-	bne	.L278
-	b	.L280
+	bne	.L422
+	b	.L424
 	.size	nandc_bch_sel, .-nandc_bch_sel
 	.section	.text.zftl_nandc_get_irq_status,"ax",@progbits
 	.align	2
 	.global	zftl_nandc_get_irq_status
 	.type	zftl_nandc_get_irq_status, %function
 zftl_nandc_get_irq_status:
-	adrp	x1, .LANCHOR14
-	ldrb	w1, [x1, #:lo12:.LANCHOR14]
+	adrp	x1, .LANCHOR22
+	ldrb	w1, [x1, #:lo12:.LANCHOR22]
 	cmp	w1, 9
-	bne	.L288
+	bne	.L432
 	ldr	w0, [x0, 296]
 	ret
-.L288:
+.L432:
 	ldr	w0, [x0, 372]
 	ret
 	.size	zftl_nandc_get_irq_status, .-zftl_nandc_get_irq_status
@@ -1752,37 +2213,38 @@ rk_nandc_flash_xfer_completed:
 nandc_xfer_start:
 	stp	x29, x30, [sp, -64]!
 	and	w1, w1, 255
-	adrp	x4, .LANCHOR37
+	adrp	x4, .LANCHOR43
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	w23, w0, 255
-	adrp	x0, .LANCHOR14
+	adrp	x0, .LANCHOR22
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	add	w20, w1, 1
-	ldrb	w0, [x0, #:lo12:.LANCHOR14]
-	adrp	x24, .LANCHOR13
+	ldrb	w0, [x0, #:lo12:.LANCHOR22]
+	adrp	x24, .LANCHOR21
 	cmp	w0, 9
-	bne	.L294
+	bne	.L438
 	ubfiz	w19, w23, 1, 1
 	mov	w0, 1
 	orr	w19, w19, 8
 	asr	w20, w20, 1
 	bfi	w19, w0, 5, 2
-	adrp	x0, .LANCHOR35
+	adrp	x0, .LANCHOR41
 	orr	w19, w19, 536870912
-	ldrb	w0, [x0, #:lo12:.LANCHOR35]
 	orr	w19, w19, 1024
+	ldrb	w0, [x0, #:lo12:.LANCHOR41]
 	and	w19, w19, -17
 	bfi	w19, w20, 22, 6
-	cbz	w0, .L295
-	adrp	x0, .LANCHOR36
-	ldrb	w1, [x0, #:lo12:.LANCHOR36]
+	orr	w19, w19, 128
+	cbz	w0, .L439
+	adrp	x0, .LANCHOR42
+	ldrb	w1, [x0, #:lo12:.LANCHOR42]
 	orr	w0, w19, 512
 	cmp	w1, 0
 	csel	w19, w0, w19, ne
-.L295:
-	add	x21, x4, :lo12:.LANCHOR37
+.L439:
+	add	x21, x4, :lo12:.LANCHOR43
 	add	x0, x2, 63
 	and	w20, w20, 63
 	and	x0, x0, -64
@@ -1799,7 +2261,7 @@ nandc_xfer_start:
 	and	x1, x1, -64
 	add	x1, x1, x20
 	bl	flush_dcache_range
-	ldr	x1, [x24, #:lo12:.LANCHOR13]
+	ldr	x1, [x24, #:lo12:.LANCHOR21]
 	mov	w0, 1
 	str	w0, [x21, 32]
 	mov	w2, 16
@@ -1816,22 +2278,22 @@ nandc_xfer_start:
 	cset	w2, eq
 	orr	w0, w0, 4
 	bfi	w0, w2, 1, 1
-	adrp	x2, .LANCHOR38
+	adrp	x2, .LANCHOR44
 	orr	w0, w0, 1
-	ldrh	w2, [x2, #:lo12:.LANCHOR38]
+	ldrh	w2, [x2, #:lo12:.LANCHOR44]
 	bfi	w0, w2, 16, 11
 	str	w0, [x1, 48]
 	str	w19, [x1, 16]
 	orr	w19, w19, 4
 	str	w19, [x1, 16]
-.L293:
+.L437:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L294:
-	ldr	x0, [x24, #:lo12:.LANCHOR13]
+.L438:
+	ldr	x0, [x24, #:lo12:.LANCHOR21]
 	ubfiz	w19, w23, 1, 1
 	orr	w19, w19, 8
 	asr	w20, w20, 1
@@ -1846,24 +2308,24 @@ nandc_xfer_start:
 	orr	w19, w19, 1024
 	and	w19, w19, -17
 	bfi	w19, w20, 22, 6
-	cbz	w23, .L297
-	adrp	x0, .LANCHOR34
+	cbz	w23, .L441
+	adrp	x0, .LANCHOR40
 	ubfx	x1, x1, 1, 7
-	ldr	x8, [x4, #:lo12:.LANCHOR37]
+	ldr	x8, [x4, #:lo12:.LANCHOR43]
 	add	x1, x3, x1, lsl 2
-	ldrb	w0, [x0, #:lo12:.LANCHOR34]
+	ldrb	w0, [x0, #:lo12:.LANCHOR40]
 	mov	w5, 128
 	cmp	w0, 24
 	mov	w0, 64
 	csel	w5, w5, w0, hi
 	mov	w0, 0
-.L299:
+.L443:
 	add	w7, w5, w0
 	cmp	x3, x1
-	bne	.L300
-.L301:
-	add	x21, x4, :lo12:.LANCHOR37
-	ldr	x0, [x4, #:lo12:.LANCHOR37]
+	bne	.L444
+.L445:
+	add	x21, x4, :lo12:.LANCHOR43
+	ldr	x0, [x4, #:lo12:.LANCHOR43]
 	and	w20, w20, 63
 	ubfiz	x1, x20, 10, 6
 	ubfiz	x20, x20, 7, 6
@@ -1880,7 +2342,7 @@ nandc_xfer_start:
 	and	x1, x1, -64
 	add	x1, x1, x20
 	bl	flush_dcache_range
-	ldr	x1, [x24, #:lo12:.LANCHOR13]
+	ldr	x1, [x24, #:lo12:.LANCHOR21]
 	mov	w0, 1
 	str	w0, [x21, 32]
 	cmp	w23, 0
@@ -1897,8 +2359,8 @@ nandc_xfer_start:
 	str	w19, [x1, 8]
 	orr	w19, w19, 4
 	str	w19, [x1, 8]
-	b	.L293
-.L300:
+	b	.L437
+.L444:
 	ldrh	w10, [x3]
 	and	x0, x0, 4294967292
 	ldrh	w6, [x3, 2]
@@ -1906,11 +2368,11 @@ nandc_xfer_start:
 	orr	x6, x10, x6, lsl 16
 	str	w6, [x8, x0]
 	mov	w0, w7
-	b	.L299
-.L297:
-	ldr	x1, [x4, #:lo12:.LANCHOR37]
+	b	.L443
+.L441:
+	ldr	x1, [x4, #:lo12:.LANCHOR43]
 	str	w0, [x1]
-	b	.L301
+	b	.L445
 	.size	nandc_xfer_start, .-nandc_xfer_start
 	.section	.text.nandc_set_seed,"ax",@progbits
 	.align	2
@@ -1918,160 +2380,61 @@ nandc_xfer_start:
 	.type	nandc_set_seed, %function
 nandc_set_seed:
 	and	x0, x0, 127
-	adrp	x1, .LANCHOR39
-	add	x1, x1, :lo12:.LANCHOR39
+	adrp	x1, .LANCHOR45
+	add	x1, x1, :lo12:.LANCHOR45
 	ldrh	w0, [x1, x0, lsl 1]
-	adrp	x1, .LANCHOR36
-	ldrb	w2, [x1, #:lo12:.LANCHOR36]
+	adrp	x1, .LANCHOR42
+	ldrb	w2, [x1, #:lo12:.LANCHOR42]
 	orr	w1, w0, -1073741824
 	cmp	w2, 0
 	csel	w0, w1, w0, ne
-	adrp	x1, .LANCHOR14
-	ldrb	w1, [x1, #:lo12:.LANCHOR14]
+	adrp	x1, .LANCHOR22
+	ldrb	w1, [x1, #:lo12:.LANCHOR22]
 	cmp	w1, 9
-	adrp	x1, .LANCHOR13
-	ldr	x1, [x1, #:lo12:.LANCHOR13]
-	bne	.L311
+	adrp	x1, .LANCHOR21
+	ldr	x1, [x1, #:lo12:.LANCHOR21]
+	bne	.L455
 	str	w0, [x1, 520]
 	ret
-.L311:
+.L455:
 	str	w0, [x1, 336]
 	ret
 	.size	nandc_set_seed, .-nandc_set_seed
-	.section	.text.flash_start_page_read,"ax",@progbits
-	.align	2
-	.global	flash_start_page_read
-	.type	flash_start_page_read, %function
-flash_start_page_read:
-	stp	x29, x30, [sp, -16]!
-	and	w11, w0, 255
-	adrp	x0, .LANCHOR15
-	ubfx	x2, x1, 21, 3
-	add	x29, sp, 0
-	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cmp	w0, w2
-	bhi	.L316
-	adrp	x1, .LANCHOR40
-	adrp	x0, .LC0
-	mov	w2, 759
-	add	x1, x1, :lo12:.LANCHOR40
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L317:
-	b	.L317
-.L316:
-	adrp	x0, .LANCHOR17
-	add	x0, x0, :lo12:.LANCHOR17
-	and	w6, w1, 2097151
-	ubfx	x10, x1, 24, 2
-	ldrb	w8, [x0, w2, sxtw]
-	adrp	x0, .LANCHOR13
-	ldr	x7, [x0, #:lo12:.LANCHOR13]
-	mov	w0, w8
-	bl	nandc_cs
-	adrp	x12, .LANCHOR41
-	cbnz	w10, .L318
-	adrp	x0, .LANCHOR18
-	ldrb	w1, [x0, #:lo12:.LANCHOR18]
-	adrp	x0, .LANCHOR19
-	cbz	w1, .L319
-	ldrb	w1, [x0, #:lo12:.LANCHOR19]
-	cbz	w1, .L320
-.L319:
-	adrp	x1, .LANCHOR20
-	ldrb	w0, [x0, #:lo12:.LANCHOR19]
-	ldrh	w1, [x1, #:lo12:.LANCHOR20]
-	udiv	w2, w6, w1
-	mul	w2, w2, w1
-	sub	w6, w6, w2
-	cbz	w0, .L321
-	add	w6, w2, w6, lsl 1
-.L320:
-	mov	w0, w8
-	bl	zftl_flash_enter_slc_mode
-	b	.L322
-.L321:
-	adrp	x3, .LANCHOR21
-	add	x3, x3, :lo12:.LANCHOR21
-	ldrh	w6, [x3, w6, uxtw 1]
-	add	w6, w6, w2
-.L322:
-	ubfiz	x2, x8, 8, 8
-	and	w0, w6, 255
-	add	x2, x7, x2
-	str	wzr, [x2, 2056]
-	str	wzr, [x2, 2052]
-	str	wzr, [x2, 2052]
-	str	w0, [x2, 2052]
-	lsr	w0, w6, 8
-	str	w0, [x2, 2052]
-	lsr	w0, w6, 16
-	str	w0, [x2, 2052]
-	ldr	x0, [x12, #:lo12:.LANCHOR41]
-	str	w11, [x2, 2056]
-	ldrb	w0, [x0, 12]
-	cmp	w0, 3
-	bne	.L324
-	cbz	w10, .L324
-	add	w6, w6, w6, lsl 1
-	sub	w0, w10, #1
-	add	w0, w6, w0
-.L333:
-	bl	nandc_set_seed
-	ldp	x29, x30, [sp], 16
-	mov	w0, 0
-	b	nandc_de_cs
-.L318:
-	ldr	x0, [x12, #:lo12:.LANCHOR41]
-	ldrb	w0, [x0, 12]
-	cmp	w0, 3
-	bne	.L323
-	sxtw	x0, w8
-	add	x0, x0, 8
-	add	x0, x7, x0, lsl 8
-	str	w10, [x0, 8]
-	b	.L322
-.L323:
-	mov	w0, w8
-	bl	zftl_flash_exit_slc_mode
-	b	.L322
-.L324:
-	mov	w0, w6
-	b	.L333
-	.size	flash_start_page_read, .-flash_start_page_read
 	.section	.text.zftl_flash_de_init,"ax",@progbits
 	.align	2
 	.global	zftl_flash_de_init
 	.type	zftl_flash_de_init, %function
 zftl_flash_de_init:
-	stp	x29, x30, [sp, -16]!
+	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
+	str	x19, [sp, 16]
 	bl	nandc_wait_flash_ready
+	adrp	x19, .LANCHOR14
 	mov	w0, 0
 	bl	hynix_reconfig_rr_para
-	adrp	x15, .LANCHOR42
-	ldrb	w0, [x15, #:lo12:.LANCHOR42]
-	cbz	w0, .L335
-	adrp	x0, .LANCHOR32
-	ldrb	w0, [x0, #:lo12:.LANCHOR32]
-	tbz	x0, 0, .L335
+	ldrb	w0, [x19, #:lo12:.LANCHOR14]
+	cbz	w0, .L460
+	adrp	x0, .LANCHOR39
+	ldrb	w0, [x0, #:lo12:.LANCHOR39]
+	tbz	x0, 0, .L460
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
 	bl	nandc_set_if_mode
-	strb	wzr, [x15, #:lo12:.LANCHOR42]
-.L335:
-	adrp	x3, .LANCHOR36
-	ldrb	w0, [x3, #:lo12:.LANCHOR36]
-	cbz	w0, .L336
+	strb	wzr, [x19, #:lo12:.LANCHOR14]
+.L460:
+	adrp	x3, .LANCHOR42
+	ldrb	w0, [x3, #:lo12:.LANCHOR42]
+	cbz	w0, .L461
 	mov	w0, 0
-	strb	wzr, [x3, #:lo12:.LANCHOR36]
+	strb	wzr, [x3, #:lo12:.LANCHOR42]
 	bl	nandc_set_seed
 	mov	w0, 1
-	strb	w0, [x3, #:lo12:.LANCHOR36]
-.L336:
+	strb	w0, [x3, #:lo12:.LANCHOR42]
+.L461:
 	mov	w0, 0
-	ldp	x29, x30, [sp], 16
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
 	ret
 	.size	zftl_flash_de_init, .-zftl_flash_de_init
 	.section	.text.nandc_randomizer_enable,"ax",@progbits
@@ -2079,8 +2442,8 @@ zftl_flash_de_init:
 	.global	nandc_randomizer_enable
 	.type	nandc_randomizer_enable, %function
 nandc_randomizer_enable:
-	adrp	x1, .LANCHOR36
-	strb	w0, [x1, #:lo12:.LANCHOR36]
+	adrp	x1, .LANCHOR42
+	strb	w0, [x1, #:lo12:.LANCHOR42]
 	ret
 	.size	nandc_randomizer_enable, .-nandc_randomizer_enable
 	.section	.text.nandc_get_chip_if,"ax",@progbits
@@ -2088,10 +2451,10 @@ nandc_randomizer_enable:
 	.global	nandc_get_chip_if
 	.type	nandc_get_chip_if, %function
 nandc_get_chip_if:
-	adrp	x1, .LANCHOR13
+	adrp	x1, .LANCHOR21
 	ubfiz	x0, x0, 8, 8
 	add	x0, x0, 2048
-	ldr	x1, [x1, #:lo12:.LANCHOR13]
+	ldr	x1, [x1, #:lo12:.LANCHOR21]
 	add	x0, x1, x0
 	ret
 	.size	nandc_get_chip_if, .-nandc_get_chip_if
@@ -2100,10 +2463,10 @@ nandc_get_chip_if:
 	.global	buf_reinit
 	.type	buf_reinit, %function
 buf_reinit:
-	adrp	x0, .LANCHOR43
-	add	x1, x0, :lo12:.LANCHOR43
+	adrp	x0, .LANCHOR46
+	add	x1, x0, :lo12:.LANCHOR46
 	mov	w2, 0
-.L350:
+.L475:
 	and	w3, w2, 255
 	strb	wzr, [x1, 2]
 	add	w4, w3, 1
@@ -2113,14 +2476,14 @@ buf_reinit:
 	str	xzr, [x1, 16]
 	cmp	w2, 32
 	add	x1, x1, 64
-	bne	.L350
-	add	x0, x0, :lo12:.LANCHOR43
+	bne	.L475
+	add	x0, x0, :lo12:.LANCHOR46
 	mov	w1, -1
 	strb	w1, [x0, 1984]
-	adrp	x0, .LANCHOR44
-	strb	wzr, [x0, #:lo12:.LANCHOR44]
-	adrp	x0, .LANCHOR45
-	strb	w2, [x0, #:lo12:.LANCHOR45]
+	adrp	x0, .LANCHOR47
+	strb	wzr, [x0, #:lo12:.LANCHOR47]
+	adrp	x0, .LANCHOR48
+	strb	w2, [x0, #:lo12:.LANCHOR48]
 	ret
 	.size	buf_reinit, .-buf_reinit
 	.section	.text.buf_add_tail,"ax",@progbits
@@ -2128,53 +2491,59 @@ buf_reinit:
 	.global	buf_add_tail
 	.type	buf_add_tail, %function
 buf_add_tail:
-	stp	x29, x30, [sp, -16]!
-	mov	w2, -1
+	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
-	strb	w2, [x1]
-	ldrb	w3, [x0]
-	cmp	w3, 255
-	bne	.L360
-	ldrb	w1, [x1, 1]
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	str	x21, [sp, 32]
+	mov	w0, -1
+	strb	w0, [x1]
+	mov	x20, x1
+	ldrb	w1, [x19]
 	cmp	w1, 255
-	bne	.L354
-	adrp	x1, .LANCHOR46
+	bne	.L483
+	ldrb	w0, [x20, 1]
+	cmp	w0, 255
+	bne	.L479
+	adrp	x1, .LANCHOR49
 	adrp	x0, .LC0
 	mov	w2, 74
-	add	x1, x1, :lo12:.LANCHOR46
+	add	x1, x1, :lo12:.LANCHOR49
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L355:
-	b	.L355
-.L354:
-	strb	w1, [x0]
-.L352:
-	ldp	x29, x30, [sp], 16
+.L479:
+	ldrb	w0, [x20, 1]
+	strb	w0, [x19]
+.L477:
+	ldp	x19, x20, [sp, 16]
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 48
 	ret
-.L357:
-	sbfiz	x0, x0, 6, 32
-	strb	w1, [x2, x0]
-	b	.L352
-.L360:
-	adrp	x2, .LANCHOR43
-	add	x2, x2, :lo12:.LANCHOR43
-.L361:
-	mov	w0, w3
-	sbfiz	x3, x3, 6, 32
-	ldrb	w3, [x2, x3]
-	cmp	w3, 255
-	bne	.L361
-	ldrb	w1, [x1, 1]
+.L483:
+	adrp	x0, .LANCHOR46
+	add	x2, x0, :lo12:.LANCHOR46
+	mov	x19, x0
+.L484:
+	sbfiz	x0, x1, 6, 32
+	mov	w21, w1
+	ldrb	w1, [x2, x0]
 	cmp	w1, 255
-	bne	.L357
-	adrp	x1, .LANCHOR46
+	bne	.L484
+	ldrb	w0, [x20, 1]
+	cmp	w0, 255
+	bne	.L481
+	adrp	x1, .LANCHOR49
 	adrp	x0, .LC0
 	mov	w2, 81
-	add	x1, x1, :lo12:.LANCHOR46
+	add	x1, x1, :lo12:.LANCHOR49
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L358:
-	b	.L358
+.L481:
+	add	x0, x19, :lo12:.LANCHOR46
+	sbfiz	x21, x21, 6, 32
+	ldrb	w1, [x20, 1]
+	strb	w1, [x0, x21]
+	b	.L477
 	.size	buf_add_tail, .-buf_add_tail
 	.section	.text.buf_free,"ax",@progbits
 	.align	2
@@ -2182,30 +2551,30 @@ buf_add_tail:
 	.type	buf_free, %function
 buf_free:
 	ldrb	w1, [x0, 2]
-	adrp	x2, .LANCHOR44
+	adrp	x2, .LANCHOR47
 	and	w1, w1, 8
 	strb	w1, [x0, 2]
-	cbz	w1, .L364
+	cbz	w1, .L487
 	stp	x29, x30, [sp, -16]!
 	mov	x1, x0
-	add	x0, x2, :lo12:.LANCHOR44
+	add	x0, x2, :lo12:.LANCHOR47
 	add	x29, sp, 0
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR45
+	adrp	x1, .LANCHOR48
 	ldp	x29, x30, [sp], 16
-	ldrb	w0, [x1, #:lo12:.LANCHOR45]
+	ldrb	w0, [x1, #:lo12:.LANCHOR48]
 	add	w0, w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR45]
+	strb	w0, [x1, #:lo12:.LANCHOR48]
 	ret
-.L364:
-	ldrb	w1, [x2, #:lo12:.LANCHOR44]
+.L487:
+	ldrb	w1, [x2, #:lo12:.LANCHOR47]
 	strb	w1, [x0]
-	adrp	x1, .LANCHOR45
+	adrp	x1, .LANCHOR48
 	ldrb	w0, [x0, 1]
-	strb	w0, [x2, #:lo12:.LANCHOR44]
-	ldrb	w0, [x1, #:lo12:.LANCHOR45]
+	strb	w0, [x2, #:lo12:.LANCHOR47]
+	ldrb	w0, [x1, #:lo12:.LANCHOR48]
 	add	w0, w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR45]
+	strb	w0, [x1, #:lo12:.LANCHOR48]
 	ret
 	.size	buf_free, .-buf_free
 	.section	.text.buf_alloc,"ax",@progbits
@@ -2213,52 +2582,60 @@ buf_free:
 	.global	buf_alloc
 	.type	buf_alloc, %function
 buf_alloc:
-	adrp	x1, .LANCHOR45
-	ldrb	w3, [x1, #:lo12:.LANCHOR45]
-	cbnz	w3, .L371
-	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR47
-	adrp	x0, .LC0
-	mov	w2, 121
+	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
-	add	x1, x1, :lo12:.LANCHOR47
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L372:
-	b	.L372
-.L371:
-	adrp	x6, .LANCHOR44
-	and	w7, w0, 255
-	mov	x5, x1
-	adrp	x1, .LANCHOR43
-	ldrb	w2, [x6, #:lo12:.LANCHOR44]
-	add	x4, x1, :lo12:.LANCHOR43
-	ubfiz	x0, x2, 6, 8
-	add	x0, x4, x0
-	cbnz	w7, .L373
-	cmp	w3, 1
-	beq	.L375
-.L373:
-	add	x1, x1, :lo12:.LANCHOR43
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR48
+	and	w20, w0, 255
+	ldrb	w0, [x19, #:lo12:.LANCHOR48]
+	cbz	w0, .L494
+.L497:
+	adrp	x3, .LANCHOR47
+	adrp	x1, .LANCHOR46
+	add	x0, x1, :lo12:.LANCHOR46
+	ldrb	w2, [x3, #:lo12:.LANCHOR47]
+	ubfiz	x4, x2, 6, 8
+	add	x0, x0, x4
+	mov	x4, x3
+	cbz	w20, .L495
+.L496:
+	add	x1, x1, :lo12:.LANCHOR46
 	sbfiz	x2, x2, 6, 32
-	add	x4, x1, x2
-	sub	w3, w3, #1
-	strb	w3, [x5, #:lo12:.LANCHOR45]
-	mov	w3, 1
-	ldrb	w7, [x1, x2]
-	strb	w3, [x4, 2]
-	mov	w3, -1
-	strb	w7, [x6, #:lo12:.LANCHOR44]
-	strb	w3, [x1, x2]
+	add	x3, x1, x2
+	ldrb	w5, [x1, x2]
+	strb	w5, [x4, #:lo12:.LANCHOR47]
+	ldrb	w4, [x19, #:lo12:.LANCHOR48]
+	strh	wzr, [x3, 50]
+	sub	w4, w4, #1
+	strb	w4, [x19, #:lo12:.LANCHOR48]
+	mov	w4, 1
+	str	xzr, [x3, 16]
+	strb	w4, [x3, 2]
+	mov	w4, -1
+	strb	w4, [x1, x2]
 	mov	w1, -1
-	strh	wzr, [x4, 50]
-	str	xzr, [x4, 16]
-	str	w1, [x4, 36]
-.L370:
-	ret
-.L375:
+	str	w1, [x3, 36]
+	b	.L493
+.L494:
+	mov	w2, 121
+	adrp	x1, .LANCHOR50
+	adrp	x0, .LC0
+	add	x1, x1, :lo12:.LANCHOR50
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+	ldrb	w0, [x19, #:lo12:.LANCHOR48]
+	cbnz	w0, .L497
+.L499:
 	mov	x0, 0
-	b	.L370
+.L493:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L495:
+	ldrb	w3, [x19, #:lo12:.LANCHOR48]
+	cmp	w3, 1
+	bne	.L496
+	b	.L499
 	.size	buf_alloc, .-buf_alloc
 	.section	.text.buf_remove_buf,"ax",@progbits
 	.align	2
@@ -2268,30 +2645,30 @@ buf_remove_buf:
 	ldrb	w4, [x1, 1]
 	ldrb	w2, [x0]
 	cmp	w4, w2
-	bne	.L382
+	bne	.L507
 	ldrb	w1, [x1]
 	strb	w1, [x0]
-.L386:
+.L511:
 	mov	w0, 1
 	ret
-.L383:
+.L508:
 	mov	w3, w2
 	sbfiz	x2, x2, 6, 32
 	ldrb	w2, [x0, x2]
 	cmp	w4, w2
-	bne	.L384
+	bne	.L509
 	sbfiz	x3, x3, 6, 32
 	ldrb	w2, [x1]
 	strb	w2, [x0, x3]
 	mov	w0, -1
 	strb	w0, [x1]
-	b	.L386
-.L382:
-	adrp	x0, .LANCHOR43
-	add	x0, x0, :lo12:.LANCHOR43
-.L384:
+	b	.L511
+.L507:
+	adrp	x0, .LANCHOR46
+	add	x0, x0, :lo12:.LANCHOR46
+.L509:
 	cmp	w2, 255
-	bne	.L383
+	bne	.L508
 	mov	w0, 0
 	ret
 	.size	buf_remove_buf, .-buf_remove_buf
@@ -2300,35 +2677,37 @@ buf_remove_buf:
 	.global	buf_remove_free
 	.type	buf_remove_free, %function
 buf_remove_free:
-	stp	x29, x30, [sp, -16]!
-	adrp	x6, .LANCHOR45
-	mov	x5, x0
+	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
-	ldrb	w0, [x6, #:lo12:.LANCHOR45]
-	cbnz	w0, .L388
-	adrp	x1, .LANCHOR48
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR48
+	mov	x20, x0
+	ldrb	w0, [x19, #:lo12:.LANCHOR48]
+	cbnz	w0, .L513
+	adrp	x1, .LANCHOR51
 	adrp	x0, .LC0
 	mov	w2, 170
-	add	x1, x1, :lo12:.LANCHOR48
+	add	x1, x1, :lo12:.LANCHOR51
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L389:
-	b	.L389
-.L388:
-	mov	x1, x5
-	adrp	x0, .LANCHOR44
-	add	x0, x0, :lo12:.LANCHOR44
+.L513:
+	ldrb	w0, [x19, #:lo12:.LANCHOR48]
+	cbz	w0, .L512
+	mov	x1, x20
+	adrp	x0, .LANCHOR47
+	add	x0, x0, :lo12:.LANCHOR47
 	bl	buf_remove_buf
 	cmp	w0, 1
-	bne	.L387
-	ldrb	w0, [x6, #:lo12:.LANCHOR45]
+	bne	.L512
+	ldrb	w0, [x19, #:lo12:.LANCHOR48]
 	sub	w0, w0, #1
-	strb	w0, [x6, #:lo12:.LANCHOR45]
-	ldrb	w0, [x5, 2]
+	strb	w0, [x19, #:lo12:.LANCHOR48]
+	ldrb	w0, [x20, 2]
 	orr	w0, w0, 1
-	strb	w0, [x5, 2]
-.L387:
-	ldp	x29, x30, [sp], 16
+	strb	w0, [x20, 2]
+.L512:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
 	ret
 	.size	buf_remove_free, .-buf_remove_free
 	.section	.text.flash_check_bad_block,"ax",@progbits
@@ -2336,8 +2715,8 @@ buf_remove_free:
 	.global	flash_check_bad_block
 	.type	flash_check_bad_block, %function
 flash_check_bad_block:
-	adrp	x3, .LANCHOR26
-	add	x3, x3, :lo12:.LANCHOR26
+	adrp	x3, .LANCHOR32
+	add	x3, x3, :lo12:.LANCHOR32
 	and	w5, w0, 255
 	lsr	w4, w1, 5
 	and	w1, w1, 31
@@ -2350,8 +2729,8 @@ flash_check_bad_block:
 	asr	w2, w2, 5
 	lsl	w2, w2, 2
 	umaddl	x0, w2, w5, x0
-	adrp	x2, .LANCHOR12
-	ldr	x2, [x2, #:lo12:.LANCHOR12]
+	adrp	x2, .LANCHOR20
+	ldr	x2, [x2, #:lo12:.LANCHOR20]
 	add	x0, x0, x4, uxtw 2
 	ldr	w0, [x2, x0]
 	lsr	w0, w0, w1
@@ -2368,14 +2747,14 @@ flash_mask_bad_block:
 	add	x29, sp, 0
 	str	x21, [sp, 32]
 	and	w21, w0, 255
-	adrp	x0, .LANCHOR26
-	add	x0, x0, :lo12:.LANCHOR26
+	adrp	x0, .LANCHOR32
+	add	x0, x0, :lo12:.LANCHOR32
 	stp	x19, x20, [sp, 16]
 	mov	w20, w1
 	ldrh	w19, [x0, 14]
 	ldrb	w1, [x0, 13]
-	adrp	x0, .LC7
-	add	x0, x0, :lo12:.LC7
+	adrp	x0, .LC40
+	add	x0, x0, :lo12:.LC40
 	mul	w19, w19, w1
 	mov	w1, w21
 	bl	printf
@@ -2389,8 +2768,8 @@ flash_mask_bad_block:
 	umaddl	x1, w1, w21, x19
 	ldr	x21, [sp, 32]
 	add	x1, x1, x0, uxtw 2
-	adrp	x0, .LANCHOR12
-	ldr	x2, [x0, #:lo12:.LANCHOR12]
+	adrp	x0, .LANCHOR20
+	ldr	x2, [x0, #:lo12:.LANCHOR20]
 	mov	w0, 1
 	lsl	w0, w0, w20
 	ldr	w20, [x2, x1]
@@ -2411,78 +2790,17 @@ ftl_gc_write_buf:
 	orr	w1, w1, 2
 	strb	w1, [x0, 2]
 	mov	x1, x0
-	adrp	x0, .LANCHOR49
-	add	x0, x0, :lo12:.LANCHOR49
+	adrp	x0, .LANCHOR52
+	add	x0, x0, :lo12:.LANCHOR52
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR50
+	adrp	x1, .LANCHOR53
 	ldp	x29, x30, [sp], 16
-	ldrb	w0, [x1, #:lo12:.LANCHOR50]
+	ldrb	w0, [x1, #:lo12:.LANCHOR53]
 	add	w0, w0, 1
 	and	w0, w0, 255
-	strb	w0, [x1, #:lo12:.LANCHOR50]
+	strb	w0, [x1, #:lo12:.LANCHOR53]
 	ret
 	.size	ftl_gc_write_buf, .-ftl_gc_write_buf
-	.section	.text.ftl_write_buf,"ax",@progbits
-	.align	2
-	.global	ftl_write_buf
-	.type	ftl_write_buf, %function
-ftl_write_buf:
-	stp	x29, x30, [sp, -32]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	cbnz	x0, .L398
-	adrp	x1, .LANCHOR51
-	adrp	x0, .LC0
-	mov	w2, 591
-	add	x1, x1, :lo12:.LANCHOR51
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L399:
-	b	.L399
-.L398:
-	adrp	x2, .LANCHOR52
-	ldrb	w1, [x0, 56]
-	mov	x19, x0
-	ldrb	w2, [x2, #:lo12:.LANCHOR52]
-	cmp	w2, w1
-	bcs	.L400
-	adrp	x1, .LANCHOR51
-	adrp	x0, .LC0
-	mov	w2, 596
-	add	x1, x1, :lo12:.LANCHOR51
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L401:
-	b	.L401
-.L400:
-	adrp	x20, .LANCHOR50
-	cbnz	w1, .L402
-	bl	buf_free
-	ldrb	w0, [x20, #:lo12:.LANCHOR50]
-.L397:
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	ret
-.L402:
-	mov	x1, x0
-	adrp	x0, .LANCHOR49
-	add	x0, x0, :lo12:.LANCHOR49
-	bl	buf_add_tail
-	adrp	x1, .LANCHOR53
-	ldrb	w3, [x19, 56]
-	ldrb	w0, [x20, #:lo12:.LANCHOR50]
-	ldr	x1, [x1, #:lo12:.LANCHOR53]
-	add	w0, w0, 1
-	and	w0, w0, 255
-	strb	w0, [x20, #:lo12:.LANCHOR50]
-	ldr	w2, [x1, 16]
-	add	w2, w2, w3
-	str	w2, [x1, 16]
-	ldr	w2, [x1, 32]
-	add	w2, w2, 1
-	str	w2, [x1, 32]
-	b	.L397
-	.size	ftl_write_buf, .-ftl_write_buf
 	.section	.text.zftl_cache_flush,"ax",@progbits
 	.align	2
 	.global	zftl_cache_flush
@@ -2495,60 +2813,62 @@ zftl_cache_flush:
 	.global	ftl_read_buf
 	.type	ftl_read_buf, %function
 ftl_read_buf:
-	stp	x29, x30, [sp, -32]!
-	adrp	x2, .LANCHOR54
+	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
-	str	x19, [sp, 16]
-	ldr	w2, [x2, #:lo12:.LANCHOR54]
-	cmp	w2, w0
-	bhi	.L407
+	stp	x19, x20, [sp, 16]
+	mov	w20, w0
+	adrp	x0, .LANCHOR54
+	str	x21, [sp, 32]
+	mov	x21, x1
+	ldr	w0, [x0, #:lo12:.LANCHOR54]
+	cmp	w0, w20
+	bhi	.L525
 	adrp	x1, .LANCHOR55
 	adrp	x0, .LC0
-	mov	w2, 834
+	mov	w2, 887
 	add	x1, x1, :lo12:.LANCHOR55
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L408:
-	b	.L408
-.L407:
-	adrp	x19, .LANCHOR43
-	add	x3, x19, :lo12:.LANCHOR43
-	add	x3, x3, 2
-	mov	w2, 0
-.L411:
-	ldr	w4, [x3, 34]
-	cmp	w0, w4
-	bne	.L409
-	ldrb	w4, [x3]
-	tbz	x4, 3, .L409
-	add	x19, x19, :lo12:.LANCHOR43
-	ubfiz	x2, x2, 6, 32
-	add	x19, x19, x2
-	orr	w0, w4, 4
+.L525:
+	adrp	x19, .LANCHOR46
+	add	x1, x19, :lo12:.LANCHOR46
+	add	x1, x1, 2
+	mov	w0, 0
+.L528:
+	ldr	w2, [x1, 34]
+	cmp	w20, w2
+	bne	.L526
+	ldrb	w2, [x1]
+	tbz	x2, 3, .L526
+	ubfiz	x0, x0, 6, 32
+	add	x19, x19, :lo12:.LANCHOR46
+	add	x19, x19, x0
+	orr	w0, w2, 4
 	strb	w0, [x19, 2]
-	tbnz	x4, 0, .L406
+	tbnz	x2, 0, .L524
 	mov	x0, x19
 	bl	buf_remove_free
-.L406:
+.L524:
 	mov	x0, x19
-	ldr	x19, [sp, 16]
-	ldp	x29, x30, [sp], 32
+	ldr	x21, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
 	ret
-.L409:
-	add	w2, w2, 1
-	add	x3, x3, 64
-	cmp	w2, 32
-	bne	.L411
-	adrp	x2, .LANCHOR56
-	ldr	w3, [x2, #:lo12:.LANCHOR56]
-	cmn	w3, #1
-	bne	.L412
-	str	w0, [x2, #:lo12:.LANCHOR56]
+.L526:
+	add	w0, w0, 1
+	add	x1, x1, 64
+	cmp	w0, 32
+	bne	.L528
+	adrp	x0, .LANCHOR56
+	ldr	w1, [x0, #:lo12:.LANCHOR56]
+	cmn	w1, #1
+	bne	.L529
+	str	w20, [x0, #:lo12:.LANCHOR56]
 	adrp	x0, .LANCHOR57
-	str	x1, [x0, #:lo12:.LANCHOR57]
-.L412:
+	str	x21, [x0, #:lo12:.LANCHOR57]
+.L529:
 	mov	x19, 0
-	b	.L406
+	b	.L524
 	.size	ftl_read_buf, .-ftl_read_buf
 	.section	.text.ftl_read_buf_free,"ax",@progbits
 	.align	2
@@ -2563,12 +2883,12 @@ ftl_read_buf_free:
 	add	x0, x0, :lo12:.LANCHOR58
 	bl	buf_remove_buf
 	ldrb	w0, [x5, 2]
-	tbz	x0, 1, .L419
+	tbz	x0, 1, .L536
 	and	w0, w0, -5
 	strb	w0, [x5, 2]
 	ldp	x29, x30, [sp], 16
 	ret
-.L419:
+.L536:
 	ldp	x29, x30, [sp], 16
 	mov	x0, x5
 	b	buf_free
@@ -2578,11 +2898,11 @@ ftl_read_buf_free:
 	.global	zftl_get_density
 	.type	zftl_get_density, %function
 zftl_get_density:
-	cbnz	w0, .L424
+	cbnz	w0, .L541
 	adrp	x0, .LANCHOR59
 	ldr	w0, [x0, #:lo12:.LANCHOR59]
 	ret
-.L424:
+.L541:
 	cmp	w0, 4
 	cset	w0, cc
 	lsl	w0, w0, 13
@@ -2633,34 +2953,32 @@ gc_add_sblk:
 	adrp	x0, .LANCHOR2
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
+	and	w22, w1, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR2]
+	and	w23, w2, 65535
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
 	cmp	w0, w20
-	bhi	.L432
+	bhi	.L549
 	adrp	x1, .LANCHOR61
 	adrp	x0, .LC0
 	mov	w2, 252
 	add	x1, x1, :lo12:.LANCHOR61
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L433:
-	b	.L433
-.L432:
+.L549:
 	adrp	x24, .LANCHOR4
 	uxtw	x19, w20
 	lsl	x26, x19, 1
-	adrp	x25, .LANCHOR29
+	adrp	x25, .LANCHOR7
 	ldr	x0, [x24, #:lo12:.LANCHOR4]
-	and	w23, w1, 65535
-	and	w22, w2, 65535
 	adrp	x27, .LANCHOR3
 	ldrh	w21, [x0, x26]
-	ldr	w0, [x25, #:lo12:.LANCHOR29]
-	tbz	x0, 8, .L434
+	ldr	w0, [x25, #:lo12:.LANCHOR7]
+	tbz	x0, 8, .L550
 	ldr	x0, [x27, #:lo12:.LANCHOR3]
 	mov	w4, w21
-	mov	w2, w23
+	mov	w2, w22
 	mov	w1, w20
 	add	x0, x0, x19, lsl 2
 	ldrb	w3, [x0, 2]
@@ -2669,82 +2987,82 @@ gc_add_sblk:
 	adrp	x0, .LANCHOR63+56
 	ubfx	x3, x3, 5, 3
 	ldrh	w5, [x0, #:lo12:.LANCHOR63+56]
-	adrp	x0, .LC8
-	add	x0, x0, :lo12:.LC8
+	adrp	x0, .LC41
+	add	x0, x0, :lo12:.LC41
 	bl	printf
-.L434:
+.L550:
 	ldr	x0, [x27, #:lo12:.LANCHOR3]
 	add	x19, x0, x19, lsl 2
 	ldrb	w3, [x19, 2]
 	tst	w3, 224
-	bne	.L435
-	cbz	w21, .L450
+	bne	.L551
+	cbz	w21, .L566
 	adrp	x1, .LANCHOR61
 	adrp	x0, .LC0
 	mov	w2, 257
 	add	x1, x1, :lo12:.LANCHOR61
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L437:
-	b	.L437
-.L435:
-	adrp	x1, .LANCHOR63
-	add	x0, x1, :lo12:.LANCHOR63
-	ldrh	w1, [x1, #:lo12:.LANCHOR63]
-	cmp	w1, w20
-	beq	.L450
+.L566:
+	mov	w0, 0
+	b	.L548
+.L551:
+	adrp	x0, .LANCHOR63
+	add	x1, x0, :lo12:.LANCHOR63
+	ldrh	w0, [x0, #:lo12:.LANCHOR63]
+	cmp	w0, w20
+	beq	.L566
 	adrp	x21, .LANCHOR5
-	ldr	x1, [x21, #:lo12:.LANCHOR5]
-	ldrh	w2, [x1, 48]
+	ldr	x0, [x21, #:lo12:.LANCHOR5]
+	ldrh	w2, [x0, 48]
 	cmp	w2, w20
-	beq	.L450
-	ldrh	w2, [x1, 16]
+	beq	.L566
+	ldrh	w2, [x0, 16]
 	cmp	w2, w20
-	beq	.L450
-	ldrh	w2, [x1, 80]
+	beq	.L566
+	ldrh	w2, [x0, 80]
 	cmp	w2, w20
-	beq	.L450
-	ldrh	w5, [x0, 56]
-	add	x0, x0, 58
+	beq	.L566
+	ldrh	w5, [x1, 56]
+	add	x1, x1, 58
 	mov	w2, 0
-.L438:
+.L553:
 	cmp	w2, w5
-	bcc	.L439
-	ubfiz	x19, x22, 7, 16
-	add	x0, x1, 392
+	bcc	.L554
+	cbnz	w22, .L555
+	ubfiz	x19, x23, 7, 16
 	add	x19, x19, 136
-	cmp	w23, 0
-	add	x1, x1, x19
-	csel	x19, x1, x0, eq
-	ldr	w0, [x25, #:lo12:.LANCHOR29]
-	tbz	x0, 8, .L441
+	add	x19, x0, x19
+.L556:
+	ldr	w0, [x25, #:lo12:.LANCHOR7]
+	tbz	x0, 8, .L557
 	ldr	x0, [x24, #:lo12:.LANCHOR4]
 	adrp	x1, .LANCHOR62
 	ubfx	x3, x3, 5, 3
-	mov	w2, w23
+	mov	w2, w22
 	ldrh	w6, [x1, #:lo12:.LANCHOR62]
 	mov	w1, w20
 	ldrh	w4, [x0, x26]
-	adrp	x0, .LC8
-	add	x0, x0, :lo12:.LC8
+	adrp	x0, .LC41
+	add	x0, x0, :lo12:.LC41
 	bl	printf
-.L441:
+.L557:
 	mov	x0, x19
 	add	x1, x19, 128
 	mov	w2, 65535
-.L444:
+.L560:
 	ldrh	w3, [x0]
 	cmp	w3, w2
-	bne	.L442
+	bne	.L558
 	strh	w20, [x0]
-	cbz	w23, .L443
+	cbz	w22, .L559
 	ldr	x1, [x21, #:lo12:.LANCHOR5]
 	ldrh	w0, [x1, 124]
 	add	w0, w0, 1
 	strh	w0, [x1, 124]
-.L461:
+.L575:
 	mov	w0, 1
-.L431:
+.L548:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -2752,27 +3070,27 @@ gc_add_sblk:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L439:
-	ldrh	w4, [x0], 2
+.L554:
+	ldrh	w4, [x1], 2
 	cmp	w4, w20
-	beq	.L450
+	beq	.L566
 	add	w2, w2, 1
-	b	.L438
-.L443:
+	b	.L553
+.L555:
+	add	x19, x0, 392
+	b	.L556
+.L559:
 	ldr	x0, [x21, #:lo12:.LANCHOR5]
-	add	x22, x0, x22, uxth 1
-	ldrh	w0, [x22, 120]
+	add	x23, x0, x23, uxth 1
+	ldrh	w0, [x23, 120]
 	add	w0, w0, 1
-	strh	w0, [x22, 120]
-	b	.L461
-.L442:
+	strh	w0, [x23, 120]
+	b	.L575
+.L558:
 	add	x0, x0, 2
-	cmp	x0, x1
-	bne	.L444
-	b	.L461
-.L450:
-	mov	w0, 0
-	b	.L431
+	cmp	x1, x0
+	bne	.L560
+	b	.L575
 	.size	gc_add_sblk, .-gc_add_sblk
 	.section	.text.gc_get_src_ppa_from_index,"ax",@progbits
 	.align	2
@@ -2793,18 +3111,18 @@ gc_write_completed:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR43
+	adrp	x23, .LANCHOR65
 	stp	x21, x22, [sp, 32]
-	add	x24, x23, :lo12:.LANCHOR43
-	adrp	x22, .LANCHOR65
-	add	x22, x22, :lo12:.LANCHOR65
+	adrp	x24, .LANCHOR46
+	add	x23, x23, :lo12:.LANCHOR65
+	add	x22, x24, :lo12:.LANCHOR46
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-.L464:
-	ldrb	w19, [x22]
+.L578:
+	ldrb	w19, [x23]
 	cmp	w19, 255
-	bne	.L477
+	bne	.L589
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -2812,23 +3130,23 @@ gc_write_completed:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L477:
+.L589:
 	lsl	x1, x19, 6
-	add	x0, x23, :lo12:.LANCHOR43
+	add	x0, x24, :lo12:.LANCHOR46
 	add	x2, x0, x1
 	ldrb	w0, [x0, x1]
 	ldr	w1, [x2, 52]
-	strb	w0, [x22]
-	ldrh	w26, [x2, 48]
-	cbz	w1, .L465
+	strb	w0, [x23]
+	ldrh	w25, [x2, 48]
+	cbz	w1, .L579
 	ldr	w2, [x2, 40]
 	adrp	x0, .LANCHOR63
 	add	x0, x0, :lo12:.LANCHOR63
 	mov	w3, 1
 	str	w2, [x0, 320]
 	strh	w3, [x0, 318]
-	adrp	x0, .LC9
-	add	x0, x0, :lo12:.LC9
+	adrp	x0, .LC42
+	add	x0, x0, :lo12:.LC42
 	bl	printf
 	adrp	x1, .LANCHOR66
 	adrp	x0, .LC0
@@ -2836,96 +3154,93 @@ gc_write_completed:
 	add	x1, x1, :lo12:.LANCHOR66
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L466:
-	b	.L466
-.L465:
-	adrp	x0, .LANCHOR67
-	mov	x28, x0
-	ldrb	w1, [x0, #:lo12:.LANCHOR67]
-	cmp	w1, 3
-	bne	.L478
+.L579:
+	adrp	x26, .LANCHOR67
+	ldrb	w0, [x26, #:lo12:.LANCHOR67]
+	cmp	w0, 3
+	bne	.L590
 	adrp	x0, .LANCHOR5
 	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	ldrb	w20, [x0, 89]
 	add	w20, w20, w20, lsl 1
 	and	w20, w20, 1023
-.L467:
-	adrp	x0, .LANCHOR29
-	adrp	x27, .LANCHOR68
-	and	x21, x26, 65535
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 8, .L468
-	ldr	x1, [x27, #:lo12:.LANCHOR68]
-	add	x0, x24, x19, lsl 6
-	mov	w3, w26
+.L580:
+	adrp	x0, .LANCHOR7
+	adrp	x28, .LANCHOR68
+	and	x21, x25, 65535
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 8, .L581
+	ldr	x1, [x28, #:lo12:.LANCHOR68]
+	add	x0, x22, x19, lsl 6
+	mov	w3, w25
 	ldrb	w2, [x0, 1]
-	adrp	x0, .LC10
+	adrp	x0, .LC43
 	ldrb	w4, [x1, x21]
-	add	x0, x0, :lo12:.LC10
-	mov	w1, w26
+	add	x0, x0, :lo12:.LC43
+	mov	w1, w25
 	bl	printf
-.L468:
-	ldr	x0, [x27, #:lo12:.LANCHOR68]
-	add	x19, x24, x19, lsl 6
-	mov	x25, x21
-	add	x2, x0, x21
-	ldrb	w1, [x0, x21]
-	ldrb	w0, [x19, 1]
+.L581:
+	ldr	x1, [x28, #:lo12:.LANCHOR68]
+	add	x0, x22, x19, lsl 6
+	mov	x27, x21
+	ldrb	w0, [x0, 1]
+	ldrb	w1, [x1, x21]
 	cmp	w1, w0
-	beq	.L469
+	beq	.L582
 	adrp	x1, .LANCHOR66
 	adrp	x0, .LC0
 	mov	w2, 526
 	add	x1, x1, :lo12:.LANCHOR66
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L470:
-	b	.L470
-.L478:
-	mov	w20, 1
-	b	.L467
-.L469:
+.L582:
+	add	x19, x22, x19, lsl 6
 	ldrb	w0, [x19, 61]
 	cmp	w0, 3
-	beq	.L471
-	ldrb	w0, [x28, #:lo12:.LANCHOR67]
+	beq	.L583
+	ldrb	w0, [x26, #:lo12:.LANCHOR67]
 	cmp	w0, 3
-	bne	.L471
+	bne	.L583
 	adrp	x0, .LANCHOR69
 	ldrb	w0, [x0, #:lo12:.LANCHOR69]
-	cbnz	w0, .L471
+	cbnz	w0, .L583
+	ldr	x1, [x28, #:lo12:.LANCHOR68]
 	mov	x0, 0
-.L472:
+	add	x21, x1, x21
+.L584:
 	cmp	w20, w0, uxth
-	bls	.L464
-	ldrb	w1, [x2, x0]
+	bls	.L578
+	ldrb	w1, [x21, x0]
 	add	x0, x0, 1
-	add	x1, x24, x1, lsl 6
+	add	x1, x22, x1, lsl 6
 	strb	wzr, [x1, 61]
-	b	.L472
-.L471:
+	b	.L584
+.L590:
+	mov	w20, 1
+	b	.L580
+.L583:
 	adrp	x19, .LANCHOR63
 	add	x19, x19, :lo12:.LANCHOR63
 	add	x20, x21, x20, uxth
 	mov	w21, -1
-	strh	w26, [x19, 316]
-.L473:
-	cmp	x25, x20
-	beq	.L464
-	ldr	x1, [x27, #:lo12:.LANCHOR68]
-	ldrb	w0, [x1, x25]
-	strb	w21, [x1, x25]
-	add	x25, x25, 1
+	strh	w25, [x19, 316]
+.L585:
+	cmp	x20, x27
+	beq	.L578
+	ldr	x1, [x28, #:lo12:.LANCHOR68]
+	ldrb	w0, [x1, x27]
+	strb	w21, [x1, x27]
+	add	x27, x27, 1
 	sbfiz	x1, x0, 6, 32
 	ubfiz	x0, x0, 6, 8
-	add	x1, x24, x1
-	add	x0, x24, x0
+	add	x1, x22, x1
+	add	x0, x22, x0
 	strb	wzr, [x1, 61]
 	bl	buf_free
 	ldrb	w0, [x19, 7]
 	sub	w0, w0, #1
 	strb	w0, [x19, 7]
-	b	.L473
+	b	.L585
 	.size	gc_write_completed, .-gc_write_completed
 	.section	.text.gc_get_src_blk,"ax",@progbits
 	.align	2
@@ -2937,44 +3252,44 @@ gc_get_src_blk:
 	adrp	x0, .LANCHOR70
 	ldrb	w3, [x0, #:lo12:.LANCHOR70]
 	ldrh	w0, [x2, 124]
-	cbz	w0, .L487
+	cbz	w0, .L602
 	add	x1, x2, 392
 	mov	w4, 1
-.L488:
+.L603:
 	add	x5, x1, 128
 	mov	w6, 65535
-.L492:
+.L607:
 	ldrh	w0, [x1]
 	cmp	w0, w6
-	beq	.L490
+	beq	.L605
 	mov	w5, -1
 	strh	w5, [x1]
-	cbz	w4, .L491
+	cbz	w4, .L606
 	ldrh	w1, [x2, 124]
 	sub	w1, w1, #1
 	strh	w1, [x2, 124]
 	ret
-.L487:
+.L602:
 	add	x0, x2, x3, sxtw 1
 	ldrh	w0, [x0, 120]
-	cbz	w0, .L493
+	cbz	w0, .L608
 	ubfiz	x1, x3, 7, 8
 	mov	w4, 0
 	add	x1, x1, 136
 	add	x1, x2, x1
-	b	.L488
-.L491:
+	b	.L603
+.L606:
 	add	x2, x2, x3, uxtb 1
 	ldrh	w1, [x2, 120]
 	sub	w1, w1, #1
 	strh	w1, [x2, 120]
 	ret
-.L490:
+.L605:
 	add	x1, x1, 2
 	cmp	x1, x5
-	bne	.L492
+	bne	.L607
 	ret
-.L493:
+.L608:
 	mov	w0, 65535
 	ret
 	.size	gc_get_src_blk, .-gc_get_src_blk
@@ -2990,11 +3305,11 @@ gc_free_temp_buf:
 	add	x0, x20, :lo12:.LANCHOR63
 	stp	x21, x22, [sp, 32]
 	ldrb	w1, [x0, 7]
-	cbz	w1, .L502
-	adrp	x1, .LANCHOR45
-	ldrb	w1, [x1, #:lo12:.LANCHOR45]
+	cbz	w1, .L617
+	adrp	x1, .LANCHOR48
+	ldrb	w1, [x1, #:lo12:.LANCHOR48]
 	cmp	w1, 1
-	bhi	.L502
+	bhi	.L617
 	ldrh	w19, [x0, 316]
 	adrp	x2, .LANCHOR72
 	adrp	x0, .LANCHOR71
@@ -3006,36 +3321,36 @@ gc_free_temp_buf:
 	mul	w0, w0, w2
 	cmp	w0, w1
 	csel	w1, w0, w1, ls
-	adrp	x0, .LANCHOR43
-	add	x0, x0, :lo12:.LANCHOR43
-.L497:
+	adrp	x0, .LANCHOR46
+	add	x0, x0, :lo12:.LANCHOR46
+.L612:
 	cmp	w19, w1
-	bcc	.L500
-.L502:
+	bcc	.L615
+.L617:
 	mov	w0, 0
-	b	.L495
-.L500:
+	b	.L610
+.L615:
 	uxtw	x22, w19
 	ldrb	w2, [x4, x22]
 	cmp	w2, 255
-	beq	.L498
+	beq	.L613
 	sbfiz	x3, x2, 6, 32
 	add	x3, x0, x3
 	ldrb	w3, [x3, 61]
-	cbnz	w3, .L498
+	cbnz	w3, .L613
 	ubfiz	x2, x2, 6, 8
 	add	x0, x0, x2
 	bl	buf_free
-	adrp	x0, .LANCHOR29
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 8, .L499
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 8, .L614
 	ldr	x0, [x21, #:lo12:.LANCHOR68]
 	mov	w1, w19
 	ldrb	w2, [x0, x22]
-	adrp	x0, .LC11
-	add	x0, x0, :lo12:.LC11
+	adrp	x0, .LC44
+	add	x0, x0, :lo12:.LC44
 	bl	printf
-.L499:
+.L614:
 	ldr	x0, [x21, #:lo12:.LANCHOR68]
 	add	x20, x20, :lo12:.LANCHOR63
 	mov	w1, -1
@@ -3044,14 +3359,14 @@ gc_free_temp_buf:
 	sub	w0, w0, #1
 	strb	w0, [x20, 7]
 	mov	w0, 1
-.L495:
+.L610:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L498:
+.L613:
 	add	w19, w19, 1
-	b	.L497
+	b	.L612
 	.size	gc_free_temp_buf, .-gc_free_temp_buf
 	.section	.text.print_gc_debug_info,"ax",@progbits
 	.align	2
@@ -3062,14 +3377,14 @@ print_gc_debug_info:
 	adrp	x1, .LANCHOR63
 	add	x0, x1, :lo12:.LANCHOR63
 	ldrh	w6, [x2, #:lo12:.LANCHOR73]
-	adrp	x2, .LANCHOR45
+	adrp	x2, .LANCHOR48
 	ldrh	w1, [x1, #:lo12:.LANCHOR63]
 	ldrb	w5, [x0, 7]
-	ldrb	w4, [x2, #:lo12:.LANCHOR45]
+	ldrb	w4, [x2, #:lo12:.LANCHOR48]
 	ldrh	w3, [x0, 314]
 	ldrh	w2, [x0, 2]
-	adrp	x0, .LC12
-	add	x0, x0, :lo12:.LC12
+	adrp	x0, .LC45
+	add	x0, x0, :lo12:.LC45
 	b	printf
 	.size	print_gc_debug_info, .-print_gc_debug_info
 	.section	.text.zftl_get_gc_node,"ax",@progbits
@@ -3080,23 +3395,23 @@ zftl_get_gc_node:
 	and	w1, w1, 65535
 	and	w0, w0, 65535
 	cmp	w1, 5
-	bne	.L512
+	bne	.L627
 	mov	w1, w0
 	adrp	x0, .LANCHOR74
 	ldr	x0, [x0, #:lo12:.LANCHOR74]
-.L514:
+.L629:
 	b	_list_get_gc_head_node.isra.2
-.L512:
+.L627:
 	cmp	w1, 2
 	mov	w1, w0
-	bne	.L513
+	bne	.L628
 	adrp	x0, .LANCHOR75
 	ldr	x0, [x0, #:lo12:.LANCHOR75]
-	b	.L514
-.L513:
+	b	.L629
+.L628:
 	adrp	x0, .LANCHOR76
 	ldr	x0, [x0, #:lo12:.LANCHOR76]
-	b	.L514
+	b	.L629
 	.size	zftl_get_gc_node, .-zftl_get_gc_node
 	.section	.text.gc_search_src_blk,"ax",@progbits
 	.align	2
@@ -3117,9 +3432,9 @@ gc_search_src_blk:
 	stp	x27, x28, [sp, 80]
 	add	x0, x0, x21, sxtw 1
 	ldrh	w19, [x0, 120]
-	cbz	w19, .L516
+	cbz	w19, .L631
 	mov	w0, w19
-.L515:
+.L630:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -3127,21 +3442,21 @@ gc_search_src_blk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L516:
+.L631:
 	and	w20, w2, 255
-	cbnz	w21, .L518
+	cbnz	w21, .L633
 	adrp	x24, .LANCHOR77
-	adrp	x26, .LANCHOR29
-	adrp	x27, .LC13
+	adrp	x26, .LANCHOR7
+	adrp	x27, .LC46
 	and	w23, w20, 65535
-	add	x26, x26, :lo12:.LANCHOR29
-	add	x27, x27, :lo12:.LC13
+	add	x26, x26, :lo12:.LANCHOR7
+	add	x27, x27, :lo12:.LC46
 	strh	wzr, [x24, #:lo12:.LANCHOR77]
 	mov	w22, 0
 	mov	w25, 0
-.L519:
+.L634:
 	cmp	w25, w23
-	bcs	.L524
+	bcs	.L639
 	ldrh	w6, [x24, #:lo12:.LANCHOR77]
 	add	x7, x24, :lo12:.LANCHOR77
 	mov	w1, 3
@@ -3154,44 +3469,44 @@ gc_search_src_blk:
 	mov	w0, 65535
 	mov	w28, w1
 	cmp	w1, w0
-	beq	.L520
+	beq	.L635
 	ldr	w0, [x26]
 	adrp	x6, .LANCHOR4
 	uxtw	x4, w1
-	tbz	x0, 8, .L521
+	tbz	x0, 8, .L636
 	ldr	x0, [x6, #:lo12:.LANCHOR4]
 	stp	x6, x4, [x29, 96]
 	ldrh	w3, [x0, x4, lsl 1]
 	mov	x0, x27
 	bl	printf
 	ldp	x6, x4, [x29, 96]
-.L521:
+.L636:
 	ldr	x0, [x6, #:lo12:.LANCHOR4]
 	ldrh	w1, [x0, x4, lsl 1]
 	adrp	x0, .LANCHOR62
 	ldrh	w0, [x0, #:lo12:.LANCHOR62]
 	cmp	w1, w0
-	bcs	.L522
+	bcs	.L637
 	mov	w2, 0
 	mov	w1, 0
 	mov	w0, w28
 	bl	gc_add_sblk
-	cbz	w0, .L523
+	cbz	w0, .L638
 	add	w5, w22, 1
 	and	w22, w5, 65535
 	cmp	w23, w22
-	bcs	.L523
-.L524:
+	bcs	.L638
+.L639:
 	ldr	x0, [x29, 112]
-	tbz	x0, 1, .L526
+	tbz	x0, 1, .L641
 	adrp	x25, .LANCHOR79
 	adrp	x28, .LANCHOR78
 	add	x27, x25, :lo12:.LANCHOR79
 	add	x28, x28, :lo12:.LANCHOR78
 	mov	w26, 65535
-.L527:
+.L642:
 	cmp	w19, w23
-	beq	.L531
+	beq	.L646
 	ldrh	w6, [x28]
 	mov	w1, 5
 	mov	w0, w6
@@ -3200,27 +3515,27 @@ gc_search_src_blk:
 	strh	w6, [x28]
 	and	w1, w0, 65535
 	cmp	w1, w26
-	beq	.L528
+	beq	.L643
 	adrp	x2, .LANCHOR4
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR4]
 	ldrh	w2, [x2, x1]
 	ldrh	w1, [x27]
 	cmp	w2, w1
-	bcs	.L529
+	bcs	.L644
 	mov	w2, 0
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L530
+	cbz	w0, .L645
 	add	w5, w22, 1
 	and	w22, w5, 65535
 	cmp	w23, w22
-	bcs	.L530
-.L531:
+	bcs	.L645
+.L646:
 	ldrh	w1, [x25, #:lo12:.LANCHOR79]
 	cmp	w22, w23
 	adrp	x0, .LANCHOR80
-	bcs	.L533
+	bcs	.L648
 	ldrh	w3, [x0, #:lo12:.LANCHOR80]
 	adrp	x0, .LANCHOR72
 	ldrb	w0, [x0, #:lo12:.LANCHOR72]
@@ -3228,20 +3543,20 @@ gc_search_src_blk:
 	mul	w0, w0, w3
 	sub	w0, w0, w2
 	cmp	w1, w0
-	bge	.L526
+	bge	.L641
 	add	w1, w1, w2
 	strh	w1, [x25, #:lo12:.LANCHOR79]
-.L526:
+.L641:
 	ldr	x0, [x29, 112]
-	tbz	x0, 0, .L534
+	tbz	x0, 0, .L649
 	cmp	w22, w23
-	bcs	.L534
+	bcs	.L649
 	adrp	x25, .LANCHOR81
 	add	x25, x25, :lo12:.LANCHOR81
 	mov	w24, 64
 	adrp	x26, .LANCHOR75
 	mov	w27, 65535
-.L539:
+.L654:
 	ldrh	w6, [x25]
 	ldr	x0, [x26, #:lo12:.LANCHOR75]
 	mov	w1, w6
@@ -3249,109 +3564,109 @@ gc_search_src_blk:
 	add	w6, w6, 1
 	strh	w6, [x25]
 	cmp	w27, w0, uxth
-	beq	.L535
+	beq	.L650
 	mov	w2, 0
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L536
+	cbz	w0, .L651
 	add	w5, w22, 1
 	and	w22, w5, 65535
 	cmp	w23, w22
-	bhi	.L536
-.L537:
+	bhi	.L651
+.L652:
 	adrp	x1, .LANCHOR62
 	adrp	x2, .LANCHOR80
 	ldrh	w0, [x1, #:lo12:.LANCHOR62]
 	ldrh	w2, [x2, #:lo12:.LANCHOR80]
 	cmp	w0, w2, lsr 1
-	bls	.L534
+	bls	.L649
 	sub	w0, w0, #8
-	b	.L613
-.L522:
+	b	.L728
+.L637:
 	strh	wzr, [x24, #:lo12:.LANCHOR77]
-	b	.L524
-.L520:
+	b	.L639
+.L635:
 	strh	wzr, [x7]
-	b	.L524
-.L523:
+	b	.L639
+.L638:
 	add	w25, w25, 1
 	and	w25, w25, 65535
-	b	.L519
-.L529:
+	b	.L634
+.L644:
 	strh	wzr, [x28]
-	b	.L531
-.L528:
+	b	.L646
+.L643:
 	strh	wzr, [x24, #:lo12:.LANCHOR77]
-	b	.L531
-.L530:
+	b	.L646
+.L645:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L527
-.L533:
+	b	.L642
+.L648:
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w1, w0
-	bls	.L526
+	bls	.L641
 	sub	w0, w1, w0, lsr 3
 	strh	w0, [x25, #:lo12:.LANCHOR79]
-	b	.L526
-.L535:
+	b	.L641
+.L650:
 	strh	wzr, [x25]
-.L538:
+.L653:
 	cmp	w22, w23
-	bcs	.L537
+	bcs	.L652
 	adrp	x1, .LANCHOR62
 	adrp	x2, .LANCHOR80
 	ldrh	w0, [x1, #:lo12:.LANCHOR62]
 	ldrh	w2, [x2, #:lo12:.LANCHOR80]
 	cmp	w2, w0
-	bls	.L534
+	bls	.L649
 	add	w0, w0, 8
-.L613:
+.L728:
 	strh	w0, [x1, #:lo12:.LANCHOR62]
-.L534:
-	adrp	x0, .LANCHOR29
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 8, .L561
+.L649:
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 8, .L676
 	ldr	w2, [x29, 112]
-	adrp	x0, .LC14
+	adrp	x0, .LC47
 	mov	w4, w20
 	mov	w3, w22
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC14
+	add	x0, x0, :lo12:.LC47
 	bl	printf
-.L561:
+.L676:
 	mov	w0, w22
-	b	.L515
-.L536:
+	b	.L630
+.L651:
 	sub	w24, w24, #1
 	ands	w24, w24, 65535
-	bne	.L539
-	b	.L538
-.L518:
+	bne	.L654
+	b	.L653
+.L633:
 	ldr	w0, [x29, 112]
 	adrp	x3, .LANCHOR81
 	and	w0, w0, 1
 	str	w0, [x29, 104]
 	ldr	x0, [x29, 112]
 	strh	wzr, [x3, #:lo12:.LANCHOR81]
-	tbz	x0, 0, .L563
+	tbz	x0, 0, .L678
 	adrp	x23, .LANCHOR82
 	adrp	x24, .LANCHOR83
 	ldrh	w0, [x23, #:lo12:.LANCHOR82]
 	ldrh	w1, [x24, #:lo12:.LANCHOR83]
 	cmp	w0, w1, lsr 1
-	bcc	.L564
+	bcc	.L679
 	adrp	x1, .LANCHOR84
 	mov	w22, 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR84]
 	cmp	w1, w0
-	bls	.L542
-.L611:
+	bls	.L657
+.L726:
 	add	x26, x3, :lo12:.LANCHOR81
 	and	w28, w20, 65535
 	mov	w25, 64
 	mov	w27, 65535
-.L545:
+.L660:
 	adrp	x0, .LANCHOR75
 	ldrh	w6, [x26]
 	ldr	x0, [x0, #:lo12:.LANCHOR75]
@@ -3360,27 +3675,27 @@ gc_search_src_blk:
 	add	w6, w6, 1
 	strh	w6, [x26]
 	cmp	w27, w0, uxth
-	beq	.L543
+	beq	.L658
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L544
+	cbz	w0, .L659
 	add	w5, w22, 1
 	and	w22, w5, 65535
 	cmp	w22, w28
-	bcc	.L544
-.L542:
+	bcc	.L659
+.L657:
 	ldrh	w1, [x24, #:lo12:.LANCHOR83]
 	ldrh	w0, [x23, #:lo12:.LANCHOR82]
 	cmp	w0, w1, lsr 1
-	bls	.L540
+	bls	.L655
 	adrp	x24, .LANCHOR77
 	and	w27, w20, 65535
 	mov	w23, 64
 	mov	w26, 65535
 	strh	wzr, [x24, #:lo12:.LANCHOR77]
 	add	x24, x24, :lo12:.LANCHOR77
-.L547:
+.L662:
 	ldrh	w6, [x24]
 	mov	w1, 3
 	mov	w0, w6
@@ -3388,22 +3703,22 @@ gc_search_src_blk:
 	add	w6, w6, 1
 	strh	w6, [x24]
 	cmp	w26, w0, uxth
-	beq	.L540
+	beq	.L655
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L546
+	cbz	w0, .L661
 	add	w5, w22, 1
 	and	w22, w5, 65535
 	cmp	w22, w27
-	bcs	.L540
-.L546:
+	bcs	.L655
+.L661:
 	sub	w23, w23, #1
 	ands	w23, w23, 65535
-	bne	.L547
-.L540:
+	bne	.L662
+.L655:
 	ldr	x0, [x29, 112]
-	tbz	x0, 1, .L548
+	tbz	x0, 1, .L663
 	adrp	x28, .LANCHOR78
 	adrp	x24, .LANCHOR85
 	add	x27, x24, :lo12:.LANCHOR85
@@ -3412,7 +3727,7 @@ gc_search_src_blk:
 	add	x28, x28, :lo12:.LANCHOR78
 	mov	w25, 65535
 	adrp	x26, .LANCHOR4
-.L553:
+.L668:
 	ldrh	w6, [x28]
 	mov	w1, 5
 	mov	w0, w6
@@ -3421,36 +3736,36 @@ gc_search_src_blk:
 	strh	w6, [x28]
 	and	w1, w0, 65535
 	cmp	w1, w25
-	beq	.L549
+	beq	.L664
 	ldr	x2, [x26, #:lo12:.LANCHOR4]
 	ubfiz	x1, x1, 1, 16
 	ldrh	w2, [x2, x1]
 	ldrh	w1, [x27]
 	cmp	w2, w1
-	bcs	.L550
+	bcs	.L665
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L551
+	cbz	w0, .L666
 	add	w5, w22, 1
 	add	w19, w19, 1
 	and	w22, w5, 65535
 	and	w19, w19, 65535
 	cmp	w22, w20
-	bcc	.L551
-.L552:
+	bcc	.L666
+.L667:
 	cmp	w22, w20
 	adrp	x4, .LANCHOR80
 	adrp	x2, .LANCHOR72
-	bcc	.L554
-	cbnz	w19, .L555
+	bcc	.L669
+	cbnz	w19, .L670
 	adrp	x0, .LANCHOR86
 	ldrh	w1, [x0, #:lo12:.LANCHOR86]
 	adrp	x0, .LANCHOR87
 	ldrh	w0, [x0, #:lo12:.LANCHOR87]
 	cmp	w1, w0
-	bls	.L555
-.L554:
+	bls	.L670
+.L669:
 	adrp	x1, .LANCHOR71
 	ldrb	w2, [x2, #:lo12:.LANCHOR72]
 	ldrh	w0, [x24, #:lo12:.LANCHOR85]
@@ -3459,13 +3774,13 @@ gc_search_src_blk:
 	ldrh	w1, [x4, #:lo12:.LANCHOR80]
 	sub	w1, w2, w1, lsr 3
 	cmp	w0, w1
-	bge	.L548
+	bge	.L663
 	add	w0, w0, 4
-.L612:
+.L727:
 	strh	w0, [x24, #:lo12:.LANCHOR85]
-.L548:
+.L663:
 	ldr	w0, [x29, 104]
-	cbz	w0, .L534
+	cbz	w0, .L649
 	adrp	x25, .LANCHOR78
 	adrp	x23, .LANCHOR88
 	add	x28, x23, :lo12:.LANCHOR88
@@ -3474,81 +3789,81 @@ gc_search_src_blk:
 	add	x25, x25, :lo12:.LANCHOR78
 	mov	w26, 65535
 	adrp	x27, .LANCHOR4
-.L559:
+.L674:
 	ldrh	w0, [x25]
 	mov	w1, 3
 	bl	zftl_get_gc_node
 	and	w1, w0, 65535
 	cmp	w1, w26
-	beq	.L556
+	beq	.L671
 	ldr	x2, [x27, #:lo12:.LANCHOR4]
 	ubfiz	x1, x1, 1, 16
 	ldrh	w1, [x2, x1]
 	ldrh	w2, [x28]
 	cmp	w2, w1
-	bls	.L557
+	bls	.L672
 	cmp	w1, 2
-	bhi	.L558
-.L557:
+	bhi	.L673
+.L672:
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L558
+	cbz	w0, .L673
 	add	w5, w22, 1
 	and	w22, w5, 65535
 	cmp	w22, w20
-	bcs	.L556
-.L558:
+	bcs	.L671
+.L673:
 	sub	w24, w24, #1
 	ands	w24, w24, 65535
-	bne	.L559
-.L556:
+	bne	.L674
+.L671:
 	cmp	w22, w20
 	adrp	x2, .LANCHOR80
-	bcs	.L560
+	bcs	.L675
 	ldrh	w0, [x23, #:lo12:.LANCHOR88]
 	ldrh	w1, [x2, #:lo12:.LANCHOR80]
 	cmp	w0, w1, lsr 1
-	bls	.L534
+	bls	.L649
 	sub	w0, w0, #4
 	strh	w0, [x23, #:lo12:.LANCHOR88]
-	b	.L534
-.L564:
+	b	.L649
+.L679:
 	mov	w22, 0
-	b	.L611
-.L543:
+	b	.L726
+.L658:
 	strh	wzr, [x26]
-	b	.L542
-.L544:
+	b	.L657
+.L659:
 	sub	w4, w25, #1
 	ands	w25, w4, 65535
-	bne	.L545
-	b	.L542
-.L563:
+	bne	.L660
+	b	.L657
+.L678:
 	mov	w22, 0
-	b	.L540
-.L550:
+	b	.L655
+.L665:
 	strh	wzr, [x28]
-	b	.L552
-.L549:
+	b	.L667
+.L664:
 	adrp	x0, .LANCHOR77
 	strh	wzr, [x0, #:lo12:.LANCHOR77]
-	b	.L552
-.L551:
+	b	.L667
+.L666:
 	sub	w23, w23, #1
 	ands	w23, w23, 65535
-	bne	.L553
-	b	.L552
-.L555:
+	bne	.L668
+	b	.L667
+.L670:
 	ldrh	w1, [x4, #:lo12:.LANCHOR80]
 	ldrb	w2, [x2, #:lo12:.LANCHOR72]
 	ldrh	w0, [x24, #:lo12:.LANCHOR85]
 	mul	w1, w1, w2
 	cmp	w0, w1
-	ble	.L548
+	ble	.L663
 	sub	w0, w0, #4
-	b	.L612
-.L560:
+	b	.L727
+.L675:
 	ldrh	w0, [x2, #:lo12:.LANCHOR80]
 	adrp	x2, .LANCHOR72
 	ldrh	w1, [x23, #:lo12:.LANCHOR88]
@@ -3556,10 +3871,10 @@ gc_search_src_blk:
 	mul	w0, w0, w2
 	sub	w0, w0, #32
 	cmp	w1, w0
-	bge	.L534
+	bge	.L649
 	add	w1, w1, 4
 	strh	w1, [x23, #:lo12:.LANCHOR88]
-	b	.L534
+	b	.L649
 	.size	gc_search_src_blk, .-gc_search_src_blk
 	.section	.text.zftl_insert_free_list,"ax",@progbits
 	.align	2
@@ -3572,27 +3887,27 @@ zftl_insert_free_list:
 	add	x0, x0, x1, uxth 2
 	ldrb	w0, [x0, 2]
 	ands	w0, w0, 24
-	bne	.L615
+	bne	.L730
 	adrp	x2, .LANCHOR89
 	adrp	x0, .LANCHOR90
 	add	x2, x2, :lo12:.LANCHOR89
 	add	x0, x0, :lo12:.LANCHOR90
-.L617:
+.L732:
 	b	_insert_free_list
-.L615:
+.L730:
 	cmp	w0, 16
-	bne	.L616
+	bne	.L731
 	adrp	x2, .LANCHOR91
 	adrp	x0, .LANCHOR92
 	add	x2, x2, :lo12:.LANCHOR91
 	add	x0, x0, :lo12:.LANCHOR92
-	b	.L617
-.L616:
+	b	.L732
+.L731:
 	adrp	x2, .LANCHOR93
 	adrp	x0, .LANCHOR94
 	add	x2, x2, :lo12:.LANCHOR93
 	add	x0, x0, :lo12:.LANCHOR94
-	b	.L617
+	b	.L732
 	.size	zftl_insert_free_list, .-zftl_insert_free_list
 	.section	.text.zftl_insert_data_list,"ax",@progbits
 	.align	2
@@ -3606,30 +3921,30 @@ zftl_insert_data_list:
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L619
+	bne	.L734
 	adrp	x2, .LANCHOR84
 	adrp	x0, .LANCHOR75
 	add	x2, x2, :lo12:.LANCHOR84
 	add	x0, x0, :lo12:.LANCHOR75
-.L622:
+.L737:
 	b	_insert_data_list
-.L619:
+.L734:
 	cmp	w2, 96
-	bne	.L620
+	bne	.L735
 	adrp	x2, .LANCHOR82
 	adrp	x0, .LANCHOR76
 	add	x2, x2, :lo12:.LANCHOR82
 	add	x0, x0, :lo12:.LANCHOR76
-	b	.L622
-.L620:
+	b	.L737
+.L735:
 	cmp	w2, 160
-	bne	.L618
+	bne	.L733
 	adrp	x2, .LANCHOR86
 	adrp	x0, .LANCHOR74
 	add	x2, x2, :lo12:.LANCHOR86
 	add	x0, x0, :lo12:.LANCHOR74
-	b	.L622
-.L618:
+	b	.L737
+.L733:
 	ret
 	.size	zftl_insert_data_list, .-zftl_insert_data_list
 	.section	.text.zftl_get_free_sblk,"ax",@progbits
@@ -3645,22 +3960,22 @@ zftl_get_free_sblk:
 	str	x21, [sp, 32]
 	and	w21, w1, 65535
 	cmp	w21, 5
-	bne	.L624
+	bne	.L739
 	adrp	x1, .LANCHOR91
 	add	x2, x1, :lo12:.LANCHOR91
 	ldrh	w3, [x1, #:lo12:.LANCHOR91]
 	ldrh	w1, [x20, #:lo12:.LANCHOR93]
 	cmp	w3, w1
-	bls	.L625
+	bls	.L740
 	mov	w1, w0
 	adrp	x0, .LANCHOR92
 	add	x0, x0, :lo12:.LANCHOR92
-.L629:
+.L744:
 	bl	_list_pop_index_node
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	bne	.L627
+	bne	.L742
 	adrp	x0, .LANCHOR89
 	ldrh	w5, [x20, #:lo12:.LANCHOR93]
 	mov	w2, w21
@@ -3668,32 +3983,32 @@ zftl_get_free_sblk:
 	ldrh	w4, [x0, #:lo12:.LANCHOR89]
 	adrp	x0, .LANCHOR90
 	ldr	x3, [x0, #:lo12:.LANCHOR90]
-	adrp	x0, .LC15
-	add	x0, x0, :lo12:.LC15
+	adrp	x0, .LC48
+	add	x0, x0, :lo12:.LC48
 	bl	printf
-.L627:
+.L742:
 	mov	w0, w19
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L625:
+.L740:
 	mov	w1, w0
 	add	x2, x20, :lo12:.LANCHOR93
 	adrp	x0, .LANCHOR94
 	add	x0, x0, :lo12:.LANCHOR94
-	b	.L629
-.L624:
+	b	.L744
+.L739:
 	adrp	x1, .LANCHOR89
 	add	x2, x1, :lo12:.LANCHOR89
 	ldrh	w3, [x1, #:lo12:.LANCHOR89]
 	ldrh	w1, [x20, #:lo12:.LANCHOR93]
 	cmp	w3, w1
-	bls	.L625
+	bls	.L740
 	mov	w1, w0
 	adrp	x0, .LANCHOR90
 	add	x0, x0, :lo12:.LANCHOR90
-	b	.L629
+	b	.L744
 	.size	zftl_get_free_sblk, .-zftl_get_free_sblk
 	.section	.text.zftl_remove_data_node,"ax",@progbits
 	.align	2
@@ -3707,30 +4022,30 @@ zftl_remove_data_node:
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L631
+	bne	.L746
 	adrp	x2, .LANCHOR84
 	adrp	x0, .LANCHOR75
 	add	x2, x2, :lo12:.LANCHOR84
 	add	x0, x0, :lo12:.LANCHOR75
-.L634:
+.L749:
 	b	_list_remove_node
-.L631:
+.L746:
 	cmp	w2, 96
-	bne	.L632
+	bne	.L747
 	adrp	x2, .LANCHOR82
 	adrp	x0, .LANCHOR76
 	add	x2, x2, :lo12:.LANCHOR82
 	add	x0, x0, :lo12:.LANCHOR76
-	b	.L634
-.L632:
+	b	.L749
+.L747:
 	cmp	w2, 160
-	bne	.L630
+	bne	.L745
 	adrp	x2, .LANCHOR86
 	adrp	x0, .LANCHOR74
 	add	x2, x2, :lo12:.LANCHOR86
 	add	x0, x0, :lo12:.LANCHOR74
-	b	.L634
-.L630:
+	b	.L749
+.L745:
 	ret
 	.size	zftl_remove_data_node, .-zftl_remove_data_node
 	.section	.text.zftl_remove_free_node,"ax",@progbits
@@ -3744,27 +4059,27 @@ zftl_remove_free_node:
 	add	x0, x0, x1, uxth 2
 	ldrb	w0, [x0, 2]
 	ands	w0, w0, 24
-	bne	.L636
+	bne	.L751
 	adrp	x2, .LANCHOR89
 	adrp	x0, .LANCHOR90
 	add	x2, x2, :lo12:.LANCHOR89
 	add	x0, x0, :lo12:.LANCHOR90
-.L638:
+.L753:
 	b	_list_remove_node
-.L636:
+.L751:
 	cmp	w0, 16
-	bne	.L637
+	bne	.L752
 	adrp	x2, .LANCHOR91
 	adrp	x0, .LANCHOR92
 	add	x2, x2, :lo12:.LANCHOR91
 	add	x0, x0, :lo12:.LANCHOR92
-	b	.L638
-.L637:
+	b	.L753
+.L752:
 	adrp	x2, .LANCHOR93
 	adrp	x0, .LANCHOR94
 	add	x2, x2, :lo12:.LANCHOR93
 	add	x0, x0, :lo12:.LANCHOR94
-	b	.L638
+	b	.L753
 	.size	zftl_remove_free_node, .-zftl_remove_free_node
 	.section	.text.zftl_list_update_data_list,"ax",@progbits
 	.align	2
@@ -3778,30 +4093,30 @@ zftl_list_update_data_list:
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L640
+	bne	.L755
 	adrp	x2, .LANCHOR84
 	adrp	x0, .LANCHOR75
 	add	x2, x2, :lo12:.LANCHOR84
 	add	x0, x0, :lo12:.LANCHOR75
-.L643:
+.L758:
 	b	_list_update_data_list
-.L640:
+.L755:
 	cmp	w2, 96
-	bne	.L641
+	bne	.L756
 	adrp	x2, .LANCHOR82
 	adrp	x0, .LANCHOR76
 	add	x2, x2, :lo12:.LANCHOR82
 	add	x0, x0, :lo12:.LANCHOR76
-	b	.L643
-.L641:
+	b	.L758
+.L756:
 	cmp	w2, 160
-	bne	.L639
+	bne	.L754
 	adrp	x2, .LANCHOR86
 	adrp	x0, .LANCHOR74
 	add	x2, x2, :lo12:.LANCHOR86
 	add	x0, x0, :lo12:.LANCHOR74
-	b	.L643
-.L639:
+	b	.L758
+.L754:
 	ret
 	.size	zftl_list_update_data_list, .-zftl_list_update_data_list
 	.section	.text.print_list_info,"ax",@progbits
@@ -3817,22 +4132,22 @@ print_list_info:
 	stp	x19, x20, [sp, 48]
 	mov	x19, x0
 	stp	x21, x22, [sp, 64]
-	adrp	x0, .LC16
+	adrp	x0, .LC49
 	stp	x23, x24, [sp, 80]
-	add	x0, x0, :lo12:.LC16
+	add	x0, x0, :lo12:.LC49
 	str	x25, [sp, 96]
 	bl	printf
 	ldr	x19, [x19]
-	cbz	x19, .L644
+	cbz	x19, .L759
 	mov	x23, -6148914691236517206
-	adrp	x21, .LC17
-	add	x21, x21, :lo12:.LC17
+	adrp	x21, .LC50
+	add	x21, x21, :lo12:.LC50
 	mov	w20, 0
 	adrp	x22, .LANCHOR0
 	movk	x23, 0xaaab, lsl 0
 	adrp	x24, .LANCHOR3
 	adrp	x25, .LANCHOR4
-.L651:
+.L766:
 	ldr	x2, [x22, #:lo12:.LANCHOR0]
 	ldr	x1, [x24, #:lo12:.LANCHOR3]
 	sub	x2, x19, x2
@@ -3863,14 +4178,14 @@ print_list_info:
 	ldrh	w19, [x19]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L644
+	beq	.L759
 	ldr	x0, [x22, #:lo12:.LANCHOR0]
 	mov	w1, 6
 	add	w20, w20, 1
 	cmp	w20, 33
 	umaddl	x19, w19, w1, x0
-	bne	.L651
-.L644:
+	bne	.L766
+.L759:
 	ldp	x19, x20, [sp, 48]
 	ldp	x21, x22, [sp, 64]
 	ldp	x23, x24, [sp, 80]
@@ -3925,55 +4240,58 @@ dump_all_list_info:
 ftl_get_blk_list_in_sblk:
 	adrp	x2, .LANCHOR3
 	and	w0, w0, 65535
-	adrp	x6, .LANCHOR96
-	add	x6, x6, :lo12:.LANCHOR96
+	adrp	x7, .LANCHOR96
+	add	x7, x7, :lo12:.LANCHOR96
 	ldr	x2, [x2, #:lo12:.LANCHOR3]
 	mov	w3, 0
-	mov	w12, 21
+	mov	w13, 21
 	add	x2, x2, x0, uxth 2
-	ldrb	w11, [x2, 3]
+	ldrb	w12, [x2, 3]
 	adrp	x2, .LANCHOR72
-	ldrb	w8, [x2, #:lo12:.LANCHOR72]
+	ldrb	w10, [x2, #:lo12:.LANCHOR72]
 	adrp	x2, .LANCHOR95
-	ldrb	w5, [x2, #:lo12:.LANCHOR95]
-	mul	w0, w0, w5
+	ldrb	w6, [x2, #:lo12:.LANCHOR95]
+	and	w2, w6, 65535
+	mul	w0, w0, w2
+	sub	w2, w2, #1
+	sxth	w5, w2
 	and	w4, w0, 65535
 	mov	w0, 0
-.L656:
-	cmp	w3, w8
-	blt	.L660
+.L771:
+	cmp	w3, w10
+	blt	.L775
 	sxtw	x2, w0
 	mov	w3, -1
-.L661:
-	cmp	w8, w2
-	bgt	.L662
+.L776:
+	cmp	w10, w2
+	bgt	.L777
 	ret
-.L660:
-	asr	w2, w11, w3
-	tbnz	x2, 0, .L657
-	sdiv	w2, w3, w5
-	ldrh	w7, [x6]
-	sbfiz	x10, x0, 1, 32
-	cmp	w5, 1
-	sub	w7, w12, w7
-	lsl	w2, w2, w7
+.L775:
+	asr	w2, w12, w3
+	tbnz	x2, 0, .L772
+	sdiv	w2, w3, w6
+	ldrh	w8, [x7]
+	sbfiz	x11, x0, 1, 32
+	cmp	w6, 1
+	sub	w8, w13, w8
+	lsl	w2, w2, w8
 	add	w2, w4, w2
 	and	w2, w2, 65535
-	bhi	.L658
-.L663:
+	bhi	.L773
+.L778:
 	add	w0, w0, 1
-	strh	w2, [x1, x10]
-.L657:
+	strh	w2, [x1, x11]
+.L772:
 	add	w3, w3, 1
-	b	.L656
-.L658:
-	and	w7, w3, 1
-	add	w2, w2, w7
-	b	.L663
-.L662:
+	b	.L771
+.L773:
+	and	w8, w5, w3
+	add	w2, w2, w8
+	b	.L778
+.L777:
 	strh	w3, [x1, x2, lsl 1]
 	add	x2, x2, 1
-	b	.L661
+	b	.L776
 	.size	ftl_get_blk_list_in_sblk, .-ftl_get_blk_list_in_sblk
 	.section	.text.ftl_free_sblk,"ax",@progbits
 	.align	2
@@ -4011,18 +4329,18 @@ gc_free_src_blk:
 	stp	x21, x22, [sp, 32]
 	adrp	x21, .LANCHOR63
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LC18
+	adrp	x22, .LC51
 	adrp	x23, .LANCHOR4
 	add	x21, x21, :lo12:.LANCHOR63
 	mov	x24, x23
-	add	x22, x22, :lo12:.LC18
+	add	x22, x22, :lo12:.LC51
 	stp	x19, x20, [sp, 16]
 	mov	w20, 0
 	stp	x25, x26, [sp, 64]
-.L667:
+.L782:
 	ldrh	w0, [x21, 56]
 	cmp	w0, w20
-	bhi	.L683
+	bhi	.L797
 	strh	wzr, [x21, 56]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -4030,123 +4348,121 @@ gc_free_src_blk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L683:
+.L797:
 	add	x0, x21, x20, sxtw 1
 	ldrh	w25, [x0, 58]
 	ldr	x0, [x23, #:lo12:.LANCHOR4]
 	mov	x19, x25
 	lsl	x26, x25, 1
 	ldrh	w2, [x0, x26]
-	cbz	w2, .L668
+	cbz	w2, .L783
 	mov	w1, w25
 	mov	x0, x22
 	bl	printf
-.L668:
+.L783:
 	ldr	x0, [x24, #:lo12:.LANCHOR4]
 	ldrh	w0, [x0, x26]
-	cbnz	w0, .L669
+	cbnz	w0, .L784
 	adrp	x0, .LANCHOR3
 	ldr	x0, [x0, #:lo12:.LANCHOR3]
 	add	x25, x0, x25, lsl 2
-	adrp	x0, .LANCHOR29
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 8, .L670
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 8, .L785
 	ldrb	w2, [x25, 2]
-	adrp	x0, .LC19
+	adrp	x0, .LC52
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC19
+	add	x0, x0, :lo12:.LC52
 	ubfx	x2, x2, 5, 3
 	bl	printf
-.L670:
+.L785:
 	ldrb	w0, [x25, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L671
+	beq	.L786
 	tst	w0, 192
-	bne	.L672
-.L671:
+	bne	.L787
+.L786:
 	adrp	x1, .LANCHOR97
 	adrp	x0, .LC0
 	mov	w2, 770
 	add	x1, x1, :lo12:.LANCHOR97
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L673:
-	b	.L673
-.L672:
+.L787:
 	mov	w0, w19
 	bl	ftl_free_sblk
 	adrp	x0, .LANCHOR5
 	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	ldrh	w2, [x0, 124]
-	cbz	w2, .L674
+	cbz	w2, .L788
 	add	x3, x0, 392
 	mov	w1, 0
-.L676:
+.L790:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L675
+	bne	.L789
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 392]
 	strh	w2, [x0, 124]
-.L674:
+.L788:
 	ldrh	w2, [x0, 120]
-	cbz	w2, .L677
+	cbz	w2, .L791
 	add	x3, x0, 136
 	mov	w1, 0
-.L679:
+.L793:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L678
+	bne	.L792
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 136]
 	strh	w2, [x0, 120]
-.L677:
+.L791:
 	ldrh	w2, [x0, 122]
-	cbz	w2, .L680
+	cbz	w2, .L794
 	add	x3, x0, 264
 	mov	w1, 0
-.L682:
+.L796:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L681
+	bne	.L795
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 264]
 	strh	w2, [x0, 122]
-.L680:
+.L794:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L667
-.L675:
+	b	.L782
+.L789:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L676
-	b	.L674
-.L678:
+	bne	.L790
+	b	.L788
+.L792:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L679
-	b	.L677
-.L681:
+	bne	.L793
+	b	.L791
+.L795:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L682
-	b	.L680
-.L669:
+	bne	.L796
+	b	.L794
+.L784:
 	mov	w2, 0
 	mov	w1, 1
 	mov	w0, w19
 	bl	gc_add_sblk
-	b	.L680
+	b	.L794
 	.size	gc_free_src_blk, .-gc_free_src_blk
 	.section	.text.ftl_erase_phy_blk,"ax",@progbits
 	.align	2
@@ -4172,14 +4488,14 @@ ftl_erase_phy_blk:
 	adrp	x0, .LANCHOR98
 	sxth	w19, w19
 	ldrb	w0, [x0, #:lo12:.LANCHOR98]
-	cbz	w0, .L707
+	cbz	w0, .L821
 	ldrh	w2, [x22, #:lo12:.LANCHOR99]
 	cmp	w21, 0
 	cset	w1, eq
 	mov	w0, w20
 	mul	w2, w2, w19
 	bl	flash_erase_block_en
-.L707:
+.L821:
 	ldrh	w2, [x22, #:lo12:.LANCHOR99]
 	mov	w1, w21
 	mov	w0, w20
@@ -4194,180 +4510,202 @@ ftl_erase_phy_blk:
 	.global	ftl_erase_sblk
 	.type	ftl_erase_sblk, %function
 ftl_erase_sblk:
-	stp	x29, x30, [sp, -160]!
+	stp	x29, x30, [sp, -176]!
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR3
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR3
 	stp	x25, x26, [sp, 64]
-	and	w25, w0, 65535
-	ldr	x0, [x21, #:lo12:.LANCHOR3]
-	mov	w22, w1
+	and	w26, w0, 65535
+	ldr	x0, [x23, #:lo12:.LANCHOR3]
+	adrp	x25, .LANCHOR100
+	stp	x21, x22, [sp, 32]
+	ubfiz	x22, x26, 2, 16
+	add	x0, x0, x22
+	stp	x27, x28, [sp, 80]
 	stp	x19, x20, [sp, 16]
-	ubfiz	x20, x25, 2, 16
-	add	x0, x0, x20
-	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR100
-	adrp	x23, .LANCHOR95
-	add	x24, x24, :lo12:.LANCHOR100
-	add	x23, x23, :lo12:.LANCHOR95
-	ldrb	w26, [x0, 3]
+	adrp	x24, .LANCHOR95
+	mov	w20, w1
+	add	x25, x25, :lo12:.LANCHOR100
+	ldrb	w28, [x0, 3]
+	add	x24, x24, :lo12:.LANCHOR95
+	add	x27, x29, 112
 	mov	w19, 0
-	str	x27, [sp, 80]
-	add	x27, x29, 96
-.L713:
-	ldrb	w0, [x24]
+.L827:
+	ldrb	w0, [x25]
 	cmp	w19, w0
-	bge	.L720
-	ldrb	w3, [x23]
+	bge	.L838
+	ldrb	w1, [x24]
 	adrp	x0, .LANCHOR99
-	mov	w1, 0
-	ldrh	w4, [x0, #:lo12:.LANCHOR99]
+	mov	w21, 0
+	ldrh	w3, [x0, #:lo12:.LANCHOR99]
+	sub	w4, w1, #1
 	mov	w0, 0
-	mul	w6, w19, w3
-	mul	w5, w25, w3
-	b	.L721
-.L715:
+	mul	w6, w19, w1
+	mul	w5, w26, w1
+	b	.L839
+.L829:
 	add	w2, w0, w6
-	asr	w2, w26, w2
-	tbnz	x2, 0, .L714
-	and	w2, w0, 1
+	asr	w2, w28, w2
+	tbnz	x2, 0, .L828
+	and	w2, w0, w4
 	add	w2, w2, w5
-	mul	w2, w2, w4
-	str	w2, [x27, w1, sxtw 2]
-	add	w1, w1, 1
-.L714:
+	mul	w2, w2, w3
+	str	w2, [x27, w21, sxtw 2]
+	add	w21, w21, 1
+.L828:
 	add	w0, w0, 1
-.L721:
-	cmp	w0, w3
-	blt	.L715
-	cmp	w1, 2
-	bne	.L716
+.L839:
+	cmp	w0, w1
+	blt	.L829
+	cmp	w1, 4
+	bne	.L830
+	mov	x3, 0
+.L831:
+	cmp	w21, w3
+	bgt	.L832
+.L833:
+	add	w19, w19, 1
+	b	.L827
+.L832:
+	ldr	w2, [x27, x3, lsl 2]
+	mov	w1, w20
+	str	x3, [x29, 104]
+	mov	w0, w19
+	bl	flash_erase_block_en
+	ldr	x3, [x29, 104]
+	add	x3, x3, 1
+	b	.L831
+.L830:
+	cmp	w21, 2
+	bne	.L834
 	adrp	x0, .LANCHOR98
 	ldrb	w0, [x0, #:lo12:.LANCHOR98]
-	cbz	w0, .L717
-	ldp	w2, w3, [x29, 96]
-	cmp	w22, 0
+	cbz	w0, .L835
+	ldp	w2, w3, [x29, 112]
+	cmp	w20, 0
 	cset	w1, eq
 	mov	w0, w19
 	bl	flash_erase_duplane_block
-.L717:
-	ldp	w2, w3, [x29, 96]
-	mov	w1, w22
+.L835:
+	ldp	w2, w3, [x29, 112]
+	mov	w1, w20
 	mov	w0, w19
 	bl	flash_erase_duplane_block
-.L718:
-	add	w19, w19, 1
-	b	.L713
-.L716:
-	cmp	w1, 1
-	bne	.L718
+	b	.L833
+.L834:
+	cmp	w21, 1
+	bne	.L833
 	adrp	x0, .LANCHOR98
 	ldrb	w0, [x0, #:lo12:.LANCHOR98]
-	cbz	w0, .L719
-	ldr	w2, [x29, 96]
-	cmp	w22, 0
+	cbz	w0, .L837
+	ldr	w2, [x29, 112]
+	cmp	w20, 0
 	cset	w1, eq
 	mov	w0, w19
 	bl	flash_erase_block_en
-.L719:
-	ldr	w2, [x29, 96]
-	mov	w1, w22
+.L837:
+	ldr	w2, [x29, 112]
+	mov	w1, w20
 	mov	w0, w19
 	bl	flash_erase_block_en
-	b	.L718
-.L720:
-	adrp	x2, .LANCHOR53
-	ldr	x3, [x21, #:lo12:.LANCHOR3]
-	cbnz	w22, .L722
-	ldrh	w1, [x3, x20]
+	b	.L833
+.L838:
+	adrp	x2, .LANCHOR101
+	ldr	x3, [x23, #:lo12:.LANCHOR3]
+	cbnz	w20, .L840
+	ldrh	w1, [x3, x22]
 	add	w0, w1, 1
 	and	w0, w0, 2047
 	bfi	w1, w0, 0, 11
-	strh	w1, [x3, x20]
-	ldr	x1, [x2, #:lo12:.LANCHOR53]
+	strh	w1, [x3, x22]
+	ldr	x1, [x2, #:lo12:.LANCHOR101]
 	ldr	w2, [x1, 84]
 	add	w2, w2, 1
 	str	w2, [x1, 84]
 	ldrh	w2, [x1, 96]
 	cmp	w2, w0
-	bge	.L724
+	bge	.L842
 	strh	w0, [x1, 96]
-.L724:
+.L842:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldr	x27, [sp, 80]
-	ldp	x29, x30, [sp], 160
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 176
 	ret
-.L722:
-	ldr	w1, [x3, x20]
+.L840:
+	ldr	w1, [x3, x22]
 	ubfx	x0, x1, 11, 8
 	add	w0, w0, 1
 	and	w0, w0, 255
 	bfi	w1, w0, 11, 8
-	str	w1, [x3, x20]
+	str	w1, [x3, x22]
 	and	w0, w0, 65535
-	ldr	x1, [x2, #:lo12:.LANCHOR53]
+	ldr	x1, [x2, #:lo12:.LANCHOR101]
 	ldr	w2, [x1, 80]
 	add	w2, w2, 1
 	str	w2, [x1, 80]
 	ldrh	w2, [x1, 98]
 	cmp	w2, w0
-	bcs	.L724
+	bcs	.L842
 	strh	w0, [x1, 98]
-	b	.L724
+	b	.L842
 	.size	ftl_erase_sblk, .-ftl_erase_sblk
 	.section	.text.ftl_alloc_sys_blk,"ax",@progbits
 	.align	2
 	.global	ftl_alloc_sys_blk
 	.type	ftl_alloc_sys_blk, %function
 ftl_alloc_sys_blk:
-	adrp	x0, .LANCHOR53
-	ldr	x1, [x0, #:lo12:.LANCHOR53]
-	ldrh	w0, [x1, 136]
-	cmp	w0, 63
-	bls	.L734
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR101
+	add	x29, sp, 0
+	ldr	x1, [x0, #:lo12:.LANCHOR101]
+	ldrh	w2, [x1, 136]
+	str	x19, [sp, 16]
+	mov	x19, x0
+	cmp	w2, 63
+	bls	.L852
 	strh	wzr, [x1, 136]
-.L734:
-	ldrh	w3, [x1, 112]
-	cbnz	w3, .L735
-	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR101
+.L852:
+	ldrh	w0, [x1, 112]
+	cbnz	w0, .L853
+	adrp	x1, .LANCHOR102
 	adrp	x0, .LC0
-	mov	w2, 983
-	add	x29, sp, 0
-	add	x1, x1, :lo12:.LANCHOR101
+	mov	w2, 994
+	add	x1, x1, :lo12:.LANCHOR102
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L736:
-	b	.L736
-.L735:
-	mov	w6, 65535
-.L741:
+.L853:
+	ldr	x1, [x19, #:lo12:.LANCHOR101]
+	mov	w5, 65535
+.L856:
 	ldrh	w2, [x1, 136]
-.L737:
-	mov	w4, w2
+.L854:
+	mov	w3, w2
 	cmp	w2, 63
-	ble	.L738
+	ble	.L855
 	strh	wzr, [x1, 136]
-	b	.L741
-.L738:
-	add	x5, x2, 1
-	add	x0, x1, x5, lsl 1
+	b	.L856
+.L855:
+	add	x4, x2, 1
+	add	x0, x1, x4, lsl 1
 	ldrh	w0, [x0, 158]
-	cmp	w0, w6
-	bne	.L742
-	mov	x2, x5
-	b	.L737
-.L742:
-	add	x4, x1, x4, sxtw 1
-	mov	w5, -1
-	sub	w3, w3, #1
-	strh	w5, [x4, 160]
+	cmp	w0, w5
+	bne	.L859
+	mov	x2, x4
+	b	.L854
+.L859:
+	add	x3, x1, x3, sxtw 1
+	mov	w4, -1
+	ldr	x19, [sp, 16]
+	strh	w4, [x3, 160]
 	strh	w2, [x1, 136]
-	strh	w3, [x1, 112]
+	ldrh	w2, [x1, 112]
+	sub	w2, w2, #1
+	strh	w2, [x1, 112]
+	ldp	x29, x30, [sp], 32
 	ret
 	.size	ftl_alloc_sys_blk, .-ftl_alloc_sys_blk
 	.section	.text.ftl_free_sys_blk,"ax",@progbits
@@ -4375,52 +4713,56 @@ ftl_alloc_sys_blk:
 	.global	ftl_free_sys_blk
 	.type	ftl_free_sys_blk, %function
 ftl_free_sys_blk:
-	adrp	x1, .LANCHOR53
-	and	w0, w0, 65535
-	ldr	x1, [x1, #:lo12:.LANCHOR53]
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w20, w0, 65535
+	adrp	x0, .LANCHOR101
+	mov	x19, x0
+	ldr	x1, [x0, #:lo12:.LANCHOR101]
 	ldrh	w2, [x1, 138]
 	cmp	w2, 63
-	bls	.L747
+	bls	.L862
 	strh	wzr, [x1, 138]
-.L747:
-	ldrh	w3, [x1, 112]
-	cmp	w3, 63
-	bls	.L748
-	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR102
+.L862:
+	ldrh	w0, [x1, 112]
+	cmp	w0, 63
+	bls	.L863
+	adrp	x1, .LANCHOR103
 	adrp	x0, .LC0
-	mov	w2, 1007
-	add	x29, sp, 0
-	add	x1, x1, :lo12:.LANCHOR102
+	mov	w2, 1018
+	add	x1, x1, :lo12:.LANCHOR103
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L749:
-	b	.L749
-.L748:
-	mov	w6, 65535
-.L754:
-	ldrh	w2, [x1, 138]
-.L750:
-	mov	w4, w2
-	cmp	w2, 63
-	ble	.L751
-	strh	wzr, [x1, 138]
-	b	.L754
-.L751:
-	add	x5, x2, 1
-	add	x7, x1, x5, lsl 1
-	ldrh	w7, [x7, 158]
-	cmp	w7, w6
-	bne	.L752
-	add	x4, x1, x4, sxtw 1
-	add	w3, w3, 1
-	strh	w0, [x4, 160]
-	strh	w2, [x1, 138]
-	strh	w3, [x1, 112]
+.L863:
+	ldr	x0, [x19, #:lo12:.LANCHOR101]
+	mov	w4, 65535
+.L866:
+	ldrh	w1, [x0, 138]
+.L864:
+	mov	w2, w1
+	cmp	w1, 63
+	ble	.L865
+	strh	wzr, [x0, 138]
+	b	.L866
+.L865:
+	add	x3, x1, 1
+	add	x5, x0, x3, lsl 1
+	ldrh	w5, [x5, 158]
+	cmp	w5, w4
+	bne	.L867
+	add	x2, x0, x2, sxtw 1
+	strh	w20, [x2, 160]
+	strh	w1, [x0, 138]
+	ldrh	w1, [x0, 112]
+	ldp	x19, x20, [sp, 16]
+	add	w1, w1, 1
+	strh	w1, [x0, 112]
+	ldp	x29, x30, [sp], 32
 	ret
-.L752:
-	mov	x2, x5
-	b	.L750
+.L867:
+	mov	x1, x3
+	b	.L864
 	.size	ftl_free_sys_blk, .-ftl_free_sys_blk
 	.section	.text.ftl_info_data_recovery,"ax",@progbits
 	.align	2
@@ -4430,7 +4772,7 @@ ftl_info_data_recovery:
 	ldrh	w2, [x0]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L768
+	beq	.L880
 	stp	x29, x30, [sp, -48]!
 	adrp	x1, .LANCHOR3
 	add	x29, sp, 0
@@ -4441,25 +4783,25 @@ ftl_info_data_recovery:
 	add	x21, x20, x19
 	ldrb	w1, [x21, 2]
 	tst	w1, 224
-	bne	.L758
+	bne	.L870
 	ldrb	w0, [x0, 4]
 	bfi	w1, w0, 5, 3
 	strb	w1, [x21, 2]
 	mov	w0, w2
 	bl	zftl_remove_free_node
 	ldrb	w0, [x21, 2]
-	adrp	x1, .LANCHOR53
-	ldr	x3, [x1, #:lo12:.LANCHOR53]
-	tbz	x0, 3, .L762
+	adrp	x1, .LANCHOR101
+	ldr	x3, [x1, #:lo12:.LANCHOR101]
+	tbz	x0, 3, .L874
 	ldrh	w2, [x3, 116]
 	sub	w2, w2, #1
 	strh	w2, [x3, 116]
-.L763:
+.L875:
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L765
+	bne	.L877
 	ldr	w0, [x20, x19]
-	ldr	x1, [x1, #:lo12:.LANCHOR53]
+	ldr	x1, [x1, #:lo12:.LANCHOR101]
 	ubfx	x2, x0, 11, 8
 	add	w2, w2, 1
 	bfi	w0, w2, 11, 8
@@ -4467,44 +4809,44 @@ ftl_info_data_recovery:
 	ldrh	w0, [x1, 120]
 	sub	w0, w0, #1
 	strh	w0, [x1, 120]
-.L758:
+.L870:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L762:
+.L874:
 	tst	w0, 24
-	bne	.L764
+	bne	.L876
 	ldrh	w2, [x3, 114]
 	sub	w2, w2, #1
 	strh	w2, [x3, 114]
-	b	.L763
-.L764:
+	b	.L875
+.L876:
 	ldrh	w2, [x3, 118]
 	sub	w2, w2, #1
 	strh	w2, [x3, 118]
-	b	.L763
-.L765:
+	b	.L875
+.L877:
 	ldrh	w2, [x20, x19]
 	cmp	w0, 64
 	add	w3, w2, 1
 	bfi	w2, w3, 0, 11
 	strh	w2, [x20, x19]
-	bne	.L766
-	ldr	x1, [x1, #:lo12:.LANCHOR53]
+	bne	.L878
+	ldr	x1, [x1, #:lo12:.LANCHOR101]
 	ldrh	w0, [x1, 122]
 	sub	w0, w0, #1
 	strh	w0, [x1, 122]
-	b	.L758
-.L766:
+	b	.L870
+.L878:
 	cmp	w0, 96
-	bne	.L758
-	ldr	x1, [x1, #:lo12:.LANCHOR53]
+	bne	.L870
+	ldr	x1, [x1, #:lo12:.LANCHOR101]
 	ldrh	w0, [x1, 124]
 	sub	w0, w0, #1
 	strh	w0, [x1, 124]
-	b	.L758
-.L768:
+	b	.L870
+.L880:
 	ret
 	.size	ftl_info_data_recovery, .-ftl_info_data_recovery
 	.section	.text.ftl_get_ppa_from_index,"ax",@progbits
@@ -4512,46 +4854,47 @@ ftl_info_data_recovery:
 	.global	ftl_get_ppa_from_index
 	.type	ftl_get_ppa_from_index, %function
 ftl_get_ppa_from_index:
-	and	w1, w0, 65535
-	adrp	x0, .LANCHOR5
-	adrp	x2, .LANCHOR72
-	ldr	x3, [x0, #:lo12:.LANCHOR5]
-	adrp	x0, .LANCHOR80
-	ldrb	w2, [x2, #:lo12:.LANCHOR72]
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
-	mul	w0, w0, w2
-	cmp	w1, w0
-	bge	.L772
-	add	x3, x3, 16
-.L773:
-	ldrb	w2, [x3, 9]
-	sdiv	w4, w1, w2
-	msub	w1, w4, w2, w1
-	add	x1, x3, x1, uxth 1
-	ldrh	w0, [x1, 16]
-	mov	w1, 65535
+	stp	x29, x30, [sp, -32]!
+	adrp	x1, .LANCHOR5
+	adrp	x3, .LANCHOR72
+	and	w0, w0, 65535
+	add	x29, sp, 0
+	ldr	x2, [x1, #:lo12:.LANCHOR5]
+	adrp	x1, .LANCHOR80
+	ldrb	w3, [x3, #:lo12:.LANCHOR72]
+	ldrh	w1, [x1, #:lo12:.LANCHOR80]
+	stp	x19, x20, [sp, 16]
+	mul	w1, w1, w3
 	cmp	w0, w1
-	bne	.L774
-	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR103
+	bge	.L884
+	add	x2, x2, 16
+.L885:
+	ldrb	w1, [x2, 9]
+	sdiv	w19, w0, w1
+	msub	w0, w19, w1, w0
+	add	x0, x2, x0, uxth 1
+	ldrh	w20, [x0, 16]
+	mov	w0, 65535
+	cmp	w20, w0
+	bne	.L886
+	adrp	x1, .LANCHOR104
 	adrp	x0, .LC0
-	mov	w2, 1385
-	add	x29, sp, 0
-	add	x1, x1, :lo12:.LANCHOR103
+	mov	w2, 1403
+	add	x1, x1, :lo12:.LANCHOR104
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L775:
-	b	.L775
-.L772:
-	sub	w1, w1, w0
-	add	x3, x3, 48
-	and	w1, w1, 65535
-	b	.L773
-.L774:
-	adrp	x1, .LANCHOR99
-	ldrh	w1, [x1, #:lo12:.LANCHOR99]
-	madd	w0, w1, w0, w4
+.L886:
+	adrp	x0, .LANCHOR99
+	ldrh	w0, [x0, #:lo12:.LANCHOR99]
+	madd	w0, w0, w20, w19
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
 	ret
+.L884:
+	sub	w0, w0, w1
+	add	x2, x2, 48
+	and	w0, w0, 65535
+	b	.L885
 	.size	ftl_get_ppa_from_index, .-ftl_get_ppa_from_index
 	.section	.text.lpa_hash_get_ppa,"ax",@progbits
 	.align	2
@@ -4559,122 +4902,119 @@ ftl_get_ppa_from_index:
 	.type	lpa_hash_get_ppa, %function
 lpa_hash_get_ppa:
 	and	x2, x0, 255
-	adrp	x1, .LANCHOR104
-	add	x1, x1, :lo12:.LANCHOR104
+	adrp	x1, .LANCHOR105
+	add	x1, x1, :lo12:.LANCHOR105
 	mov	w3, 65535
 	ldrh	w1, [x1, x2, lsl 1]
-	adrp	x2, .LANCHOR105
-	ldr	x4, [x2, #:lo12:.LANCHOR105]
 	adrp	x2, .LANCHOR106
-	ldr	x5, [x2, #:lo12:.LANCHOR106]
-.L780:
+	ldr	x4, [x2, #:lo12:.LANCHOR106]
+	adrp	x2, .LANCHOR107
+	ldr	x5, [x2, #:lo12:.LANCHOR107]
+.L889:
 	cmp	w1, w3
-	bne	.L782
+	bne	.L891
 	mov	w0, -1
 	ret
-.L782:
+.L891:
 	uxtw	x2, w1
 	ldr	w6, [x4, x2, lsl 2]
 	cmp	w0, w6
-	bne	.L781
+	bne	.L890
 	mov	w0, w1
 	b	ftl_get_ppa_from_index
-.L781:
+.L890:
 	ldrh	w1, [x5, x2, lsl 1]
-	b	.L780
+	b	.L889
 	.size	lpa_hash_get_ppa, .-lpa_hash_get_ppa
 	.section	.text.ftl_get_new_free_page,"ax",@progbits
 	.align	2
 	.global	ftl_get_new_free_page
 	.type	ftl_get_new_free_page, %function
 ftl_get_new_free_page:
-	stp	x29, x30, [sp, -16]!
-	mov	x1, x0
-	mov	w2, 65535
+	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
-	ldrh	w0, [x0]
-	cmp	w0, w2
-	bne	.L784
-	adrp	x1, .LANCHOR107
+	ldrh	w1, [x0]
+	str	x19, [sp, 16]
+	mov	x19, x0
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L893
+	adrp	x1, .LANCHOR108
 	adrp	x0, .LC0
-	mov	w2, 1500
-	add	x1, x1, :lo12:.LANCHOR107
+	mov	w2, 1518
+	add	x1, x1, :lo12:.LANCHOR108
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L785:
-	b	.L785
-.L784:
+.L893:
 	adrp	x0, .LANCHOR80
-	ldrh	w3, [x1, 2]
+	ldrh	w1, [x19, 2]
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
-	cmp	w3, w0
-	bne	.L786
-	adrp	x1, .LANCHOR107
+	cmp	w1, w0
+	bne	.L894
+	adrp	x1, .LANCHOR108
 	adrp	x0, .LC0
-	mov	w2, 1501
-	add	x1, x1, :lo12:.LANCHOR107
+	mov	w2, 1519
+	add	x1, x1, :lo12:.LANCHOR108
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L787:
-	b	.L787
-.L786:
-	ldrh	w4, [x1, 6]
-	cbnz	w4, .L788
-	adrp	x1, .LANCHOR107
+.L894:
+	ldrh	w0, [x19, 6]
+	cbnz	w0, .L895
+	adrp	x1, .LANCHOR108
 	adrp	x0, .LC0
-	mov	w2, 1502
-	add	x1, x1, :lo12:.LANCHOR107
+	mov	w2, 1520
+	add	x1, x1, :lo12:.LANCHOR108
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L789:
-	b	.L789
-.L788:
-	ldrb	w0, [x1, 5]
-	mov	w3, w2
+.L895:
+	ldrb	w0, [x19, 5]
+	mov	w2, 65535
 	add	x0, x0, 8
-	ldrh	w5, [x1, x0, lsl 1]
+	ldrh	w3, [x19, x0, lsl 1]
 	adrp	x0, .LANCHOR72
-	ldrb	w6, [x0, #:lo12:.LANCHOR72]
-.L790:
-	cmp	w5, w3
-	ldrb	w2, [x1, 5]
-	beq	.L792
-	adrp	x0, .LANCHOR99
-	sub	w4, w4, #1
-	strh	w4, [x1, 6]
-	add	w2, w2, 1
+	ldrb	w4, [x0, #:lo12:.LANCHOR72]
+.L896:
+	cmp	w3, w2
+	ldrb	w1, [x19, 5]
+	beq	.L898
+	adrp	x0, .LANCHOR99
+	add	w1, w1, 1
+	and	w1, w1, 255
+	ldrh	w2, [x19, 2]
 	ldrh	w0, [x0, #:lo12:.LANCHOR99]
-	and	w2, w2, 255
-	ldrh	w4, [x1, 10]
-	cmp	w6, w2
-	ldrh	w3, [x1, 2]
-	add	w4, w4, 1
-	strb	w2, [x1, 5]
-	mul	w0, w0, w5
-	strh	w4, [x1, 10]
-	orr	w0, w0, w3
-	bne	.L783
+	cmp	w4, w1
+	strb	w1, [x19, 5]
+	mul	w0, w0, w3
+	ldrh	w3, [x19, 6]
+	sub	w3, w3, #1
+	strh	w3, [x19, 6]
+	ldrh	w3, [x19, 10]
+	orr	w0, w0, w2
 	add	w3, w3, 1
-	strb	wzr, [x1, 5]
-	strh	w3, [x1, 2]
-.L783:
-	ldp	x29, x30, [sp], 16
-	ret
-.L792:
+	strh	w3, [x19, 10]
+	bne	.L892
 	add	w2, w2, 1
-	and	w2, w2, 255
-	strb	w2, [x1, 5]
-	cmp	w2, w6
-	bne	.L791
-	ldrh	w0, [x1, 2]
-	strb	wzr, [x1, 5]
+	strb	wzr, [x19, 5]
+	strh	w2, [x19, 2]
+.L892:
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L898:
+	add	w1, w1, 1
+	and	w1, w1, 255
+	strb	w1, [x19, 5]
+	cmp	w1, w4
+	bne	.L897
+	ldrh	w0, [x19, 2]
+	strb	wzr, [x19, 5]
 	add	w0, w0, 1
-	strh	w0, [x1, 2]
-.L791:
-	ldrb	w0, [x1, 5]
+	strh	w0, [x19, 2]
+.L897:
+	ldrb	w0, [x19, 5]
 	add	x0, x0, 8
-	ldrh	w5, [x1, x0, lsl 1]
-	b	.L790
+	ldrh	w3, [x19, x0, lsl 1]
+	b	.L896
 	.size	ftl_get_new_free_page, .-ftl_get_new_free_page
 	.section	.text.ftl_ext_alloc_new_blk,"ax",@progbits
 	.align	2
@@ -4685,28 +5025,27 @@ ftl_ext_alloc_new_blk:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	bl	ftl_alloc_sys_blk
-	and	w1, w0, 65535
-	mov	w2, 65533
-	mov	w19, w1
-	sub	w1, w1, #1
-	cmp	w2, w1, uxth
-	bcs	.L796
-	adrp	x1, .LANCHOR108
+	and	w0, w0, 65535
+	mov	w1, 65533
+	mov	w19, w0
+	sub	w0, w0, #1
+	cmp	w1, w0, uxth
+	bcs	.L902
+	adrp	x1, .LANCHOR109
 	adrp	x0, .LC0
-	mov	w2, 1533
-	add	x1, x1, :lo12:.LANCHOR108
+	mov	w2, 1551
+	add	x1, x1, :lo12:.LANCHOR109
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L797:
-	b	.L797
-.L796:
-	adrp	x20, .LANCHOR53
+.L902:
+	adrp	x20, .LANCHOR101
 	mov	w1, 0
+	mov	w0, w19
 	bl	ftl_erase_phy_blk
-	ldr	x0, [x20, #:lo12:.LANCHOR53]
+	ldr	x0, [x20, #:lo12:.LANCHOR101]
 	ldrh	w0, [x0, 130]
 	bl	ftl_free_sys_blk
-	ldr	x0, [x20, #:lo12:.LANCHOR53]
+	ldr	x0, [x20, #:lo12:.LANCHOR101]
 	strh	w19, [x0, 130]
 	strh	wzr, [x0, 140]
 	mov	w0, 0
@@ -4719,18 +5058,18 @@ ftl_ext_alloc_new_blk:
 	.global	ftl_total_vpn_update
 	.type	ftl_total_vpn_update, %function
 ftl_total_vpn_update:
-	adrp	x2, .LANCHOR109
+	adrp	x2, .LANCHOR110
 	mov	x3, x2
-	ldrh	w1, [x2, #:lo12:.LANCHOR109]
+	ldrh	w1, [x2, #:lo12:.LANCHOR110]
 	cmp	w1, 4
-	bhi	.L800
-	cbnz	w0, .L800
+	bhi	.L905
+	cbnz	w0, .L905
 	add	w1, w1, 1
-	strh	w1, [x2, #:lo12:.LANCHOR109]
+	strh	w1, [x2, #:lo12:.LANCHOR110]
 	ret
-.L800:
+.L905:
 	adrp	x0, .LANCHOR2
-	strh	wzr, [x3, #:lo12:.LANCHOR109]
+	strh	wzr, [x3, #:lo12:.LANCHOR110]
 	mov	x1, 0
 	mov	w2, 0
 	ldrh	w5, [x0, #:lo12:.LANCHOR2]
@@ -4740,37 +5079,37 @@ ftl_total_vpn_update:
 	adrp	x0, .LANCHOR3
 	ldr	x7, [x0, #:lo12:.LANCHOR3]
 	mov	w0, 0
-.L802:
+.L907:
 	cmp	w5, w1, uxth
-	bhi	.L805
+	bhi	.L910
 	adrp	x1, .LANCHOR5
 	ldr	x1, [x1, #:lo12:.LANCHOR5]
 	str	w2, [x1, 524]
-	adrp	x2, .LANCHOR53
+	adrp	x2, .LANCHOR101
 	str	w0, [x1, 528]
-	ldr	x2, [x2, #:lo12:.LANCHOR53]
+	ldr	x2, [x2, #:lo12:.LANCHOR101]
 	ldrh	w2, [x2, 120]
-	cbz	w2, .L799
+	cbz	w2, .L904
 	udiv	w0, w0, w2
 	str	w0, [x1, 532]
-.L799:
+.L904:
 	ret
-.L805:
+.L910:
 	ldrh	w3, [x6, x1, lsl 1]
 	cmp	w3, w8
-	beq	.L803
+	beq	.L908
 	add	x4, x7, x1, lsl 2
 	ldrb	w4, [x4, 2]
 	and	w4, w4, 224
 	cmp	w4, 160
-	bne	.L804
+	bne	.L909
 	add	w0, w0, w3
-.L803:
+.L908:
 	add	x1, x1, 1
-	b	.L802
-.L804:
+	b	.L907
+.L909:
 	add	w2, w2, w3
-	b	.L803
+	b	.L908
 	.size	ftl_total_vpn_update, .-ftl_total_vpn_update
 	.section	.text.ftl_debug_info_fill,"ax",@progbits
 	.align	2
@@ -4812,39 +5151,39 @@ ftl_vpn_decrement:
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L814
+	beq	.L919
 	adrp	x0, .LANCHOR4
 	ubfiz	x1, x19, 1, 16
 	ldr	x2, [x0, #:lo12:.LANCHOR4]
 	ldrh	w0, [x2, x1]
-	cbnz	w0, .L815
-	adrp	x0, .LC20
+	cbnz	w0, .L920
+	adrp	x0, .LC53
 	mov	w2, 0
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC20
+	add	x0, x0, :lo12:.LC53
 	bl	printf
-.L818:
+.L923:
 	mov	w0, 0
-	b	.L813
-.L815:
+	b	.L918
+.L920:
 	sub	w0, w0, #1
 	strh	w0, [x2, x1]
-.L814:
-	adrp	x20, .LANCHOR110
-	ldrh	w0, [x20, #:lo12:.LANCHOR110]
+.L919:
+	adrp	x20, .LANCHOR111
+	ldrh	w0, [x20, #:lo12:.LANCHOR111]
 	cmp	w19, w0
-	beq	.L818
+	beq	.L923
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L817
-	strh	w19, [x20, #:lo12:.LANCHOR110]
-	b	.L818
-.L817:
+	bne	.L922
+	strh	w19, [x20, #:lo12:.LANCHOR111]
+	b	.L923
+.L922:
 	bl	ftl_vpn_update
 	cmp	w0, 0
 	cset	w0, ne
-	strh	w19, [x20, #:lo12:.LANCHOR110]
-.L813:
+	strh	w19, [x20, #:lo12:.LANCHOR111]
+.L918:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -4854,46 +5193,46 @@ ftl_vpn_decrement:
 	.global	lpa_hash_update_ppa
 	.type	lpa_hash_update_ppa, %function
 lpa_hash_update_ppa:
-	adrp	x3, .LANCHOR104
+	adrp	x3, .LANCHOR105
 	and	x5, x0, 255
-	add	x4, x3, :lo12:.LANCHOR104
+	add	x4, x3, :lo12:.LANCHOR105
 	mov	w7, 65535
 	and	w2, w2, 65535
 	mov	w12, w7
 	ldrh	w6, [x4, x5, lsl 1]
-	adrp	x4, .LANCHOR105
-	ldr	x8, [x4, #:lo12:.LANCHOR105]
 	adrp	x4, .LANCHOR106
-	ldr	x4, [x4, #:lo12:.LANCHOR106]
-.L821:
+	ldr	x8, [x4, #:lo12:.LANCHOR106]
+	adrp	x4, .LANCHOR107
+	ldr	x4, [x4, #:lo12:.LANCHOR107]
+.L926:
 	cmp	w6, w12
-	beq	.L825
+	beq	.L930
 	uxtw	x11, w6
 	lsl	x10, x11, 2
 	add	x13, x8, x10
 	ldr	w10, [x8, x10]
 	cmp	w0, w10
 	lsl	x10, x11, 1
-	bne	.L822
+	bne	.L927
 	mov	w6, -1
 	str	w6, [x13]
 	cmp	w7, w12
-	bne	.L823
-	add	x6, x3, :lo12:.LANCHOR104
+	bne	.L928
+	add	x6, x3, :lo12:.LANCHOR105
 	ldrh	w7, [x4, x10]
 	strh	w7, [x6, x5, lsl 1]
-.L824:
+.L929:
 	mov	w6, -1
 	strh	w6, [x4, x11, lsl 1]
-.L825:
+.L930:
 	uxtw	x6, w2
-	add	x3, x3, :lo12:.LANCHOR104
+	add	x3, x3, :lo12:.LANCHOR105
 	cmn	w1, #1
 	str	w0, [x8, x6, lsl 2]
 	ldrh	w0, [x3, x5, lsl 1]
 	strh	w2, [x3, x5, lsl 1]
 	strh	w0, [x4, x6, lsl 1]
-	beq	.L832
+	beq	.L937
 	stp	x29, x30, [sp, -16]!
 	adrp	x0, .LANCHOR96
 	add	x29, sp, 0
@@ -4912,110 +5251,18 @@ lpa_hash_update_ppa:
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
-.L823:
+.L928:
 	ldrh	w6, [x4, x10]
 	strh	w6, [x4, w7, uxtw 1]
-	b	.L824
-.L822:
+	b	.L929
+.L927:
 	mov	w7, w6
 	ldrh	w6, [x4, x10]
-	b	.L821
-.L832:
+	b	.L926
+.L937:
 	mov	w0, -1
 	ret
 	.size	lpa_hash_update_ppa, .-lpa_hash_update_ppa
-	.section	.text.ftl_write_completed,"ax",@progbits
-	.align	2
-	.global	ftl_write_completed
-	.type	ftl_write_completed, %function
-ftl_write_completed:
-	stp	x29, x30, [sp, -80]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR111
-	stp	x21, x22, [sp, 32]
-	adrp	x19, .LANCHOR43
-	adrp	x22, .LANCHOR96
-	add	x20, x20, :lo12:.LANCHOR111
-	add	x19, x19, :lo12:.LANCHOR43
-	add	x22, x22, :lo12:.LANCHOR96
-	stp	x23, x24, [sp, 48]
-	str	x25, [sp, 64]
-.L836:
-	ldrb	w0, [x20]
-	cmp	w0, 255
-	bne	.L842
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldr	x25, [sp, 64]
-	ldp	x29, x30, [sp], 80
-	ret
-.L842:
-	ubfiz	x21, x0, 6, 8
-	sbfiz	x0, x0, 6, 32
-	add	x23, x19, x0
-	add	x21, x19, x21
-	ldrb	w0, [x19, x0]
-	strb	w0, [x20]
-	ldr	w0, [x23, 52]
-	cmn	w0, #1
-	bne	.L837
-	ldp	w2, w3, [x23, 36]
-	mov	w1, 21
-	ldrh	w0, [x22]
-	mov	w25, 1
-	sub	w1, w1, w0
-	lsr	w0, w3, w0
-	lsl	w1, w25, w1
-	sub	w1, w1, #1
-	and	w1, w1, w0
-	adrp	x0, .LANCHOR95
-	ldrb	w0, [x0, #:lo12:.LANCHOR95]
-	udiv	w1, w1, w0
-	adrp	x0, .LC21
-	add	x0, x0, :lo12:.LC21
-	and	w24, w1, 65535
-	mov	w1, w24
-	bl	printf
-	mov	w1, w25
-	mov	w2, 0
-	mov	w0, w24
-	bl	gc_add_sblk
-	adrp	x0, .LANCHOR5
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
-	ldr	w1, [x0, 556]
-	add	w1, w1, w25
-	str	w1, [x0, 556]
-	ldrh	w1, [x0, 16]
-	cmp	w1, w24
-	bne	.L838
-	strh	wzr, [x0, 22]
-.L839:
-	mov	x0, x21
-	bl	ftl_write_buf
-	b	.L836
-.L838:
-	ldrh	w1, [x0, 48]
-	cmp	w1, w24
-	bne	.L839
-	strh	wzr, [x0, 54]
-	b	.L839
-.L837:
-	ldrh	w2, [x23, 48]
-	ldr	w0, [x23, 36]
-	ldr	w1, [x23, 44]
-	bl	lpa_hash_update_ppa
-	ldrb	w0, [x23, 2]
-	tbz	x0, 2, .L841
-	and	w0, w0, -3
-	strb	w0, [x23, 2]
-	b	.L836
-.L841:
-	mov	x0, x21
-	bl	buf_free
-	b	.L836
-	.size	ftl_write_completed, .-ftl_write_completed
 	.section	.text.ftl_mask_bad_block,"ax",@progbits
 	.align	2
 	.global	ftl_mask_bad_block
@@ -5037,20 +5284,20 @@ ftl_mask_bad_block:
 	adrp	x0, .LANCHOR95
 	ldrb	w0, [x0, #:lo12:.LANCHOR95]
 	udiv	w2, w2, w0
-	adrp	x0, .LANCHOR29
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
 	and	w19, w2, 255
-	tbz	x0, 14, .L845
-	adrp	x0, .LC22
+	tbz	x0, 14, .L941
+	adrp	x0, .LC54
 	mov	w2, w19
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC22
+	add	x0, x0, :lo12:.LC54
 	bl	printf
-.L845:
+.L941:
 	adrp	x0, .LANCHOR2
 	ldrh	w0, [x0, #:lo12:.LANCHOR2]
 	cmp	w0, w19
-	bls	.L844
+	bls	.L940
 	adrp	x0, .LANCHOR3
 	mov	w1, 1
 	lsl	w1, w1, w20
@@ -5059,7 +5306,7 @@ ftl_mask_bad_block:
 	ldrb	w0, [x19, 3]
 	orr	w1, w1, w0
 	strb	w1, [x19, 3]
-.L844:
+.L940:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -5091,31 +5338,31 @@ print_ftl_debug_info:
 	ldrh	w2, [x1, #:lo12:.LANCHOR91]
 	adrp	x1, .LANCHOR89
 	ldr	w7, [x0, 524]
-	adrp	x0, .LC23
+	adrp	x0, .LC55
 	ldrh	w1, [x1, #:lo12:.LANCHOR89]
-	add	x0, x0, :lo12:.LC23
+	add	x0, x0, :lo12:.LC55
 	str	x19, [sp, 48]
-	adrp	x19, .LANCHOR53
+	adrp	x19, .LANCHOR101
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	ldr	x0, [x19, #:lo12:.LANCHOR101]
 	adrp	x1, .LANCHOR112
 	ldrb	w3, [x1, #:lo12:.LANCHOR112]
 	ldr	w4, [x0, 8]
 	ldr	w5, [x0, 64]
 	ldr	w1, [x0, 20]
 	ldr	w2, [x0, 28]
-	adrp	x0, .LC24
-	add	x0, x0, :lo12:.LC24
+	adrp	x0, .LC56
+	add	x0, x0, :lo12:.LC56
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	ldr	x0, [x19, #:lo12:.LANCHOR101]
 	ldr	w1, [x0, 52]
 	ldr	w2, [x0, 60]
 	ldr	w3, [x0, 16]
-	adrp	x0, .LC25
-	add	x0, x0, :lo12:.LC25
+	adrp	x0, .LC57
+	add	x0, x0, :lo12:.LC57
 	lsr	w3, w3, 11
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	ldr	x0, [x19, #:lo12:.LANCHOR101]
 	ldrh	w2, [x0, 98]
 	ldrh	w6, [x0, 72]
 	ldrh	w5, [x0, 96]
@@ -5128,8 +5375,8 @@ print_ftl_debug_info:
 	ldrh	w2, [x0, 90]
 	str	w2, [sp]
 	ldp	w7, w2, [x0, 80]
-	adrp	x0, .LC26
-	add	x0, x0, :lo12:.LC26
+	adrp	x0, .LC58
+	add	x0, x0, :lo12:.LC58
 	bl	printf
 	ldr	x19, [sp, 48]
 	adrp	x0, .LANCHOR73
@@ -5144,96 +5391,260 @@ print_ftl_debug_info:
 	ldrh	w2, [x0, #:lo12:.LANCHOR88]
 	adrp	x0, .LANCHOR85
 	ldrh	w1, [x0, #:lo12:.LANCHOR85]
-	adrp	x0, .LC27
-	add	x0, x0, :lo12:.LC27
+	adrp	x0, .LC59
+	add	x0, x0, :lo12:.LC59
 	b	printf
 	.size	print_ftl_debug_info, .-print_ftl_debug_info
-	.section	.text.ftl_alloc_sblk,"ax",@progbits
+	.section	.text.ftl_write_buf,"ax",@progbits
 	.align	2
-	.global	ftl_alloc_sblk
-	.type	ftl_alloc_sblk, %function
-ftl_alloc_sblk:
+	.global	ftl_write_buf
+	.type	ftl_write_buf, %function
+ftl_write_buf:
 	stp	x29, x30, [sp, -48]!
-	cmp	w0, 5
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	and	w22, w0, 65535
 	stp	x19, x20, [sp, 16]
-	cset	w21, eq
-	mov	w1, w22
-	mov	w20, w0
-	mov	w0, 0
-	bl	zftl_get_free_sblk
-	and	w19, w0, 65535
-	mov	w1, 65535
-	cmp	w19, w1
-	beq	.L855
-	adrp	x1, .LANCHOR3
-	ldr	x1, [x1, #:lo12:.LANCHOR3]
-	add	x19, x1, x19, uxth 2
-	ldrb	w2, [x19, 2]
-	tst	w2, 224
-	beq	.L856
+	str	x21, [sp, 32]
+	cbnz	x0, .L950
 	adrp	x1, .LANCHOR113
-	adrp	x0, .LC0
-	mov	w2, 752
 	add	x1, x1, :lo12:.LANCHOR113
+	mov	w2, 639
+	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L857:
-	b	.L857
-.L856:
-	bfi	w2, w20, 5, 3
-	lsl	w21, w21, 1
-	ubfx	x1, x2, 3, 2
-	orr	w21, w21, w1
-	bfi	w2, w21, 3, 2
-	strb	w2, [x19, 2]
-	ldp	x21, x22, [sp, 32]
+	bl	print_ftl_debug_info
+	mov	w0, -1
+.L949:
 	ldp	x19, x20, [sp, 16]
+	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L855:
-	bl	print_ftl_debug_info
-	adrp	x21, .LC28
-	mov	w2, w20
-	add	x21, x21, :lo12:.LC28
-	mov	w1, w19
-	mov	x0, x21
-	bl	printf
-	mov	w1, w22
-	mov	w0, 0
-	bl	zftl_get_free_sblk
-	and	w1, w0, 65535
-	mov	w2, w20
-	mov	x0, x21
-	bl	printf
-	bl	dump_all_list_info
+.L953:
+	mov	x1, x19
+	adrp	x0, .LANCHOR52
+	add	x0, x0, :lo12:.LANCHOR52
+	bl	buf_add_tail
+	adrp	x1, .LANCHOR101
+	ldrb	w3, [x19, 56]
+	ldrb	w0, [x21, #:lo12:.LANCHOR53]
+	ldr	x1, [x1, #:lo12:.LANCHOR101]
+	add	w0, w0, 1
+	and	w0, w0, 255
+	strb	w0, [x21, #:lo12:.LANCHOR53]
+	ldr	w2, [x1, 16]
+	add	w2, w2, w3
+	str	w2, [x1, 16]
+	ldr	w2, [x1, 32]
+	add	w2, w2, 1
+	str	w2, [x1, 32]
+	b	.L949
+.L950:
+	mov	x19, x0
+	adrp	x0, .LANCHOR114
+	mov	x20, x0
+	ldrb	w1, [x0, #:lo12:.LANCHOR114]
+	ldrb	w2, [x19, 56]
+	cmp	w2, w1
+	bls	.L955
 	adrp	x1, .LANCHOR113
 	adrp	x0, .LC0
-	mov	w2, 762
+	mov	w2, 644
 	add	x1, x1, :lo12:.LANCHOR113
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L858:
-	b	.L858
-	.size	ftl_alloc_sblk, .-ftl_alloc_sblk
-	.section	.text.sblk_init,"ax",@progbits
+.L955:
+	ldrb	w0, [x19, 56]
+	adrp	x21, .LANCHOR53
+	cbz	w0, .L952
+	ldrb	w1, [x20, #:lo12:.LANCHOR114]
+	cmp	w1, w0
+	bcs	.L953
+.L952:
+	mov	x0, x19
+	bl	buf_free
+	ldrb	w0, [x21, #:lo12:.LANCHOR53]
+	b	.L949
+	.size	ftl_write_buf, .-ftl_write_buf
+	.section	.text.ftl_write_completed,"ax",@progbits
 	.align	2
-	.global	sblk_init
-	.type	sblk_init, %function
-sblk_init:
-	adrp	x1, .LANCHOR114
-	mov	w0, -1
-	strb	w0, [x1, #:lo12:.LANCHOR114]
-	adrp	x1, .LANCHOR111
-	strb	w0, [x1, #:lo12:.LANCHOR111]
-	adrp	x1, .LANCHOR58
-	strb	w0, [x1, #:lo12:.LANCHOR58]
-	adrp	x1, .LANCHOR65
-	strb	w0, [x1, #:lo12:.LANCHOR65]
-	mov	w0, 0
-	ret
+	.global	ftl_write_completed
+	.type	ftl_write_completed, %function
+ftl_write_completed:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR115
+	stp	x21, x22, [sp, 32]
+	adrp	x19, .LANCHOR46
+	adrp	x22, .LANCHOR96
+	add	x20, x20, :lo12:.LANCHOR115
+	add	x19, x19, :lo12:.LANCHOR46
+	add	x22, x22, :lo12:.LANCHOR96
+	stp	x23, x24, [sp, 48]
+	str	x25, [sp, 64]
+.L961:
+	ldrb	w0, [x20]
+	cmp	w0, 255
+	bne	.L967
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L967:
+	ubfiz	x21, x0, 6, 8
+	sbfiz	x0, x0, 6, 32
+	add	x23, x19, x0
+	add	x21, x19, x21
+	ldrb	w0, [x19, x0]
+	strb	w0, [x20]
+	ldr	w0, [x23, 52]
+	cmn	w0, #1
+	bne	.L962
+	ldp	w2, w3, [x23, 36]
+	mov	w1, 21
+	ldrh	w0, [x22]
+	mov	w25, 1
+	sub	w1, w1, w0
+	lsr	w0, w3, w0
+	lsl	w1, w25, w1
+	sub	w1, w1, #1
+	and	w1, w1, w0
+	adrp	x0, .LANCHOR95
+	ldrb	w0, [x0, #:lo12:.LANCHOR95]
+	udiv	w1, w1, w0
+	adrp	x0, .LC60
+	add	x0, x0, :lo12:.LC60
+	and	w24, w1, 65535
+	mov	w1, w24
+	bl	printf
+	mov	w1, w25
+	mov	w2, 0
+	mov	w0, w24
+	bl	gc_add_sblk
+	adrp	x0, .LANCHOR5
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	ldr	w1, [x0, 556]
+	add	w1, w1, w25
+	str	w1, [x0, 556]
+	ldrh	w1, [x0, 16]
+	cmp	w1, w24
+	bne	.L963
+	strh	wzr, [x0, 22]
+.L964:
+	mov	x0, x21
+	bl	ftl_write_buf
+	b	.L961
+.L963:
+	ldrh	w1, [x0, 48]
+	cmp	w1, w24
+	bne	.L964
+	strh	wzr, [x0, 54]
+	b	.L964
+.L962:
+	ldrh	w2, [x23, 48]
+	ldr	w0, [x23, 36]
+	ldr	w1, [x23, 44]
+	bl	lpa_hash_update_ppa
+	ldrb	w0, [x23, 2]
+	tbz	x0, 2, .L966
+	and	w0, w0, -3
+	strb	w0, [x23, 2]
+	b	.L961
+.L966:
+	mov	x0, x21
+	bl	buf_free
+	b	.L961
+	.size	ftl_write_completed, .-ftl_write_completed
+	.section	.text.ftl_alloc_sblk,"ax",@progbits
+	.align	2
+	.global	ftl_alloc_sblk
+	.type	ftl_alloc_sblk, %function
+ftl_alloc_sblk:
+	stp	x29, x30, [sp, -64]!
+	cmp	w0, 5
+	add	x29, sp, 0
+	str	x23, [sp, 48]
+	and	w23, w0, 65535
+	stp	x19, x20, [sp, 16]
+	mov	w1, w23
+	stp	x21, x22, [sp, 32]
+	mov	w20, w0
+	cset	w22, eq
+	mov	w0, 0
+	bl	zftl_get_free_sblk
+	and	w19, w0, 65535
+	mov	w0, 65535
+	cmp	w19, w0
+	beq	.L971
+	adrp	x0, .LANCHOR3
+	lsl	w22, w22, 1
+	ldr	x21, [x0, #:lo12:.LANCHOR3]
+	add	x21, x21, x19, uxth 2
+	ldrb	w0, [x21, 2]
+	tst	w0, 224
+	beq	.L972
+	adrp	x1, .LANCHOR116
+	adrp	x0, .LC0
+	mov	w2, 757
+	add	x1, x1, :lo12:.LANCHOR116
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L972:
+	ldrb	w0, [x21, 2]
+	bfi	w0, w20, 5, 3
+	ubfx	x1, x0, 3, 2
+	orr	w22, w22, w1
+	bfi	w0, w22, 3, 2
+	strb	w0, [x21, 2]
+.L973:
+	mov	w0, w19
+	ldr	x23, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+.L971:
+	bl	print_ftl_debug_info
+	adrp	x21, .LC61
+	mov	w2, w20
+	add	x21, x21, :lo12:.LC61
+	mov	w1, w19
+	mov	x0, x21
+	bl	printf
+	mov	w1, w23
+	mov	w0, 0
+	bl	zftl_get_free_sblk
+	and	w19, w0, 65535
+	mov	w2, w20
+	mov	w1, w19
+	mov	x0, x21
+	bl	printf
+	bl	dump_all_list_info
+	mov	w2, 767
+	adrp	x1, .LANCHOR116
+	adrp	x0, .LC0
+	add	x1, x1, :lo12:.LANCHOR116
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+	b	.L973
+	.size	ftl_alloc_sblk, .-ftl_alloc_sblk
+	.section	.text.sblk_init,"ax",@progbits
+	.align	2
+	.global	sblk_init
+	.type	sblk_init, %function
+sblk_init:
+	adrp	x1, .LANCHOR117
+	mov	w0, -1
+	strb	w0, [x1, #:lo12:.LANCHOR117]
+	adrp	x1, .LANCHOR115
+	strb	w0, [x1, #:lo12:.LANCHOR115]
+	adrp	x1, .LANCHOR58
+	strb	w0, [x1, #:lo12:.LANCHOR58]
+	adrp	x1, .LANCHOR65
+	strb	w0, [x1, #:lo12:.LANCHOR65]
+	mov	w0, 0
+	ret
 	.size	sblk_init, .-sblk_init
 	.section	.text.dump_sblk_queue,"ax",@progbits
 	.align	2
@@ -5241,25 +5652,25 @@ sblk_init:
 	.type	dump_sblk_queue, %function
 dump_sblk_queue:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LC29
-	add	x0, x0, :lo12:.LC29
+	adrp	x0, .LC62
+	add	x0, x0, :lo12:.LC62
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR114
+	adrp	x19, .LANCHOR117
 	str	x21, [sp, 32]
-	ldrb	w1, [x19, #:lo12:.LANCHOR114]
+	ldrb	w1, [x19, #:lo12:.LANCHOR117]
 	bl	printf
-	ldrb	w19, [x19, #:lo12:.LANCHOR114]
+	ldrb	w19, [x19, #:lo12:.LANCHOR117]
 	cmp	w19, 255
-	beq	.L863
-	adrp	x1, .LANCHOR43
+	beq	.L980
+	adrp	x1, .LANCHOR46
 	ubfiz	x19, x19, 6, 8
-	add	x1, x1, :lo12:.LANCHOR43
-	adrp	x21, .LC30
+	add	x1, x1, :lo12:.LANCHOR46
+	adrp	x21, .LC63
 	add	x19, x1, x19
-	add	x21, x21, :lo12:.LC30
+	add	x21, x21, :lo12:.LC63
 	mov	x20, x1
-.L865:
+.L982:
 	ldrb	w2, [x19, 58]
 	mov	x0, x21
 	ldrb	w1, [x19, 1]
@@ -5267,11 +5678,11 @@ dump_sblk_queue:
 	bl	printf
 	ldrb	w19, [x19]
 	cmp	w19, 255
-	beq	.L863
+	beq	.L980
 	ubfiz	x19, x19, 6, 8
 	add	x19, x20, x19
-	b	.L865
-.L863:
+	b	.L982
+.L980:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -5282,18 +5693,18 @@ dump_sblk_queue:
 	.global	queue_lun_state
 	.type	queue_lun_state, %function
 queue_lun_state:
-	adrp	x2, .LANCHOR114
-	ldrb	w2, [x2, #:lo12:.LANCHOR114]
+	adrp	x2, .LANCHOR117
+	ldrb	w2, [x2, #:lo12:.LANCHOR117]
 	cmp	w2, 255
-	beq	.L882
+	beq	.L999
 	adrp	x3, .LANCHOR96
-	adrp	x7, .LANCHOR43
-	add	x7, x7, :lo12:.LANCHOR43
-	adrp	x10, .L878
+	adrp	x7, .LANCHOR46
+	add	x7, x7, :lo12:.LANCHOR46
+	adrp	x10, .L995
 	ldrh	w8, [x3, #:lo12:.LANCHOR96]
 	mov	w3, 21
 	ubfx	x11, x0, 21, 3
-	add	x10, x10, :lo12:.L878
+	add	x10, x10, :lo12:.L995
 	sub	w4, w3, w8
 	mov	w3, 1
 	mov	x12, x7
@@ -5307,61 +5718,61 @@ queue_lun_state:
 	and	w6, w6, 65535
 	and	w4, w4, w6
 	and	w4, w4, w3
-.L881:
+.L998:
 	add	x0, x7, x2, lsl 6
 	ldr	w5, [x0, 40]
 	ubfx	x13, x5, 21, 3
 	cmp	w11, w13
-	bne	.L875
+	bne	.L992
 	lsr	w5, w5, w8
 	and	w5, w6, w5
 	and	w5, w3, w5
 	ldrb	w0, [x0, 58]
 	cmp	w4, w5
-	bne	.L876
+	bne	.L993
 	cmp	w1, 1
-	bne	.L873
+	bne	.L990
 	cmp	w0, 6
 	ccmp	w0, 8, 4, ne
-	beq	.L875
+	beq	.L992
 	ret
-.L876:
+.L993:
 	cmp	w1, 3
-	bhi	.L875
+	bhi	.L992
 	ldrb	w5, [x10,w1,uxtw]
-	adr	x13, .Lrtx878
+	adr	x13, .Lrtx995
 	add	x5, x13, w5, sxtb #2
 	br	x5
-.Lrtx878:
+.Lrtx995:
 	.section	.rodata.queue_lun_state,"a",@progbits
 	.align	0
 	.align	2
-.L878:
-	.byte	(.L877 - .Lrtx878) / 4
-	.byte	(.L879 - .Lrtx878) / 4
-	.byte	(.L880 - .Lrtx878) / 4
-	.byte	(.L873 - .Lrtx878) / 4
+.L995:
+	.byte	(.L994 - .Lrtx995) / 4
+	.byte	(.L996 - .Lrtx995) / 4
+	.byte	(.L997 - .Lrtx995) / 4
+	.byte	(.L990 - .Lrtx995) / 4
 	.section	.text.queue_lun_state
-.L877:
+.L994:
 	cmp	w0, 2
-	beq	.L875
+	beq	.L992
 	ret
-.L879:
+.L996:
 	cmp	w0, 6
 	ccmp	w0, 8, 4, ne
-	beq	.L875
+	beq	.L992
 	ret
-.L880:
+.L997:
 	cmp	w0, 10
-	bne	.L873
-.L875:
+	bne	.L990
+.L992:
 	lsl	x2, x2, 6
 	ldrb	w2, [x12, x2]
 	cmp	w2, 255
-	bne	.L881
-.L882:
+	bne	.L998
+.L999:
 	mov	w0, 0
-.L873:
+.L990:
 	ret
 	.size	queue_lun_state, .-queue_lun_state
 	.section	.text.queue_remove_completed_req,"ax",@progbits
@@ -5369,68 +5780,68 @@ queue_lun_state:
 	.global	queue_remove_completed_req
 	.type	queue_remove_completed_req, %function
 queue_remove_completed_req:
-	adrp	x6, .LANCHOR114
-	ldrb	w2, [x6, #:lo12:.LANCHOR114]
+	adrp	x6, .LANCHOR117
+	ldrb	w2, [x6, #:lo12:.LANCHOR117]
 	cmp	w2, 255
-	beq	.L884
-	adrp	x0, .LANCHOR43
+	beq	.L1001
+	adrp	x0, .LANCHOR46
 	lsl	x4, x2, 6
-	add	x5, x0, :lo12:.LANCHOR43
+	add	x5, x0, :lo12:.LANCHOR46
 	add	x3, x5, x4
 	ldrb	w1, [x3, 58]
 	sub	w1, w1, #11
 	and	w1, w1, 255
 	cmp	w1, 1
 	mov	x1, x0
-	bhi	.L884
+	bhi	.L1001
 	ldrb	w0, [x5, x4]
-	strb	w0, [x6, #:lo12:.LANCHOR114]
+	strb	w0, [x6, #:lo12:.LANCHOR117]
 	mov	w0, -1
 	strb	w0, [x5, x4]
 	ldrb	w0, [x3, 59]
 	cmp	w0, 1
-	bne	.L886
+	bne	.L1003
 	ldrh	w0, [x3, 50]
-	cbnz	w0, .L887
-	adrp	x0, .LANCHOR111
-	ldrb	w3, [x0, #:lo12:.LANCHOR111]
-	add	x0, x0, :lo12:.LANCHOR111
-.L888:
+	cbnz	w0, .L1004
+	adrp	x0, .LANCHOR115
+	ldrb	w3, [x0, #:lo12:.LANCHOR115]
+	add	x0, x0, :lo12:.LANCHOR115
+.L1005:
 	cmp	w3, 255
-	bne	.L892
-	add	x1, x1, :lo12:.LANCHOR43
+	bne	.L1009
+	add	x1, x1, :lo12:.LANCHOR46
 	add	x1, x1, x2, lsl 6
 	ldrb	w1, [x1, 1]
 	strb	w1, [x0]
 	ret
-.L887:
+.L1004:
 	adrp	x0, .LANCHOR65
 	ldrb	w3, [x0, #:lo12:.LANCHOR65]
 	add	x0, x0, :lo12:.LANCHOR65
-	b	.L888
-.L886:
-	cbnz	w0, .L884
+	b	.L1005
+.L1003:
+	cbnz	w0, .L1001
 	ldr	w0, [x3, 36]
 	cmn	w0, #1
-	beq	.L884
+	beq	.L1001
 	adrp	x0, .LANCHOR58
 	ldrb	w3, [x0, #:lo12:.LANCHOR58]
 	add	x0, x0, :lo12:.LANCHOR58
-	b	.L888
-.L892:
-	add	x0, x1, :lo12:.LANCHOR43
-.L899:
+	b	.L1005
+.L1009:
+	add	x0, x1, :lo12:.LANCHOR46
+.L1016:
 	mov	w1, w3
 	sbfiz	x3, x3, 6, 32
 	ldrb	w3, [x0, x3]
 	cmp	w3, 255
-	bne	.L899
+	bne	.L1016
 	add	x2, x0, x2, lsl 6
 	sbfiz	x1, x1, 6, 32
 	ldrb	w2, [x2, 1]
 	strb	w2, [x0, x1]
 	ret
-.L884:
+.L1001:
 	ret
 	.size	queue_remove_completed_req, .-queue_remove_completed_req
 	.section	.text.pm_alloc_new_blk,"ax",@progbits
@@ -5442,9 +5853,9 @@ pm_alloc_new_blk:
 	adrp	x2, .LANCHOR72
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR53
+	adrp	x20, .LANCHOR101
 	stp	x21, x22, [sp, 32]
-	ldr	x1, [x20, #:lo12:.LANCHOR53]
+	ldr	x1, [x20, #:lo12:.LANCHOR101]
 	ldrb	w2, [x2, #:lo12:.LANCHOR72]
 	ldrh	w0, [x1, 690]
 	str	x23, [sp, 48]
@@ -5452,183 +5863,185 @@ pm_alloc_new_blk:
 	and	w0, w0, 65535
 	strh	w0, [x1, 690]
 	cmp	w2, w0
-	bls	.L901
+	bls	.L1018
 	add	x0, x1, x0, sxtw 1
 	ldrh	w1, [x0, 672]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L902
-.L901:
-	adrp	x21, .LC31
-	add	x21, x21, :lo12:.LC31
+	bne	.L1019
+.L1018:
+	adrp	x19, .LC64
+	add	x19, x19, :lo12:.LC64
 	adrp	x23, .LANCHOR3
-.L916:
+.L1031:
 	mov	w0, 1
 	bl	ftl_alloc_sblk
 	mov	w1, 0
-	and	w19, w0, 65535
+	and	w21, w0, 65535
 	bl	ftl_erase_sblk
-	add	x13, x20, :lo12:.LANCHOR53
-	ldr	x1, [x20, #:lo12:.LANCHOR53]
-	mov	w0, w19
+	add	x14, x20, :lo12:.LANCHOR101
+	ldr	x1, [x20, #:lo12:.LANCHOR101]
+	mov	w0, w21
 	add	x1, x1, 672
 	bl	ftl_get_blk_list_in_sblk
 	tst	w0, 65535
-	bne	.L903
-	mov	w1, w19
-	mov	x0, x21
+	bne	.L1020
+	mov	w1, w21
+	mov	x0, x19
 	bl	printf
-	ldr	x0, [x23, #:lo12:.LANCHOR3]
-	add	x19, x0, x19, uxth 2
-	ldrb	w0, [x19, 2]
+	ldr	x1, [x23, #:lo12:.LANCHOR3]
+	add	x1, x1, x21, uxth 2
+	ldrb	w0, [x1, 2]
 	orr	w0, w0, -32
-	strb	w0, [x19, 2]
-	b	.L916
-.L903:
-	ldr	x1, [x13]
-	adrp	x0, .LANCHOR115
+	strb	w0, [x1, 2]
+	b	.L1031
+.L1020:
+	ldr	x0, [x14]
+	adrp	x1, .LANCHOR118
 	mov	w2, 1
-	mov	w3, 65535
-	str	w2, [x0, #:lo12:.LANCHOR115]
-	add	x2, x1, 416
-	mov	w0, 0
-	strh	wzr, [x1, 690]
-.L905:
-	ldrh	w4, [x2]
-	cmp	w4, w3
-	beq	.L904
-	add	w0, w0, 1
-	add	x2, x2, 2
-	cmp	w0, 128
-	bne	.L905
-	adrp	x1, .LANCHOR116
+	mov	w19, 0
+	add	x0, x0, 416
+	str	w2, [x1, #:lo12:.LANCHOR118]
+	mov	w1, 65535
+	strh	wzr, [x0, 274]
+.L1022:
+	ldrh	w2, [x0]
+	cmp	w2, w1
+	beq	.L1021
+	add	w19, w19, 1
+	add	x0, x0, 2
+	and	w19, w19, 65535
+	cmp	w19, 128
+	bne	.L1022
+	adrp	x1, .LANCHOR119
 	adrp	x0, .LC0
-	mov	w2, 188
-	add	x1, x1, :lo12:.LANCHOR116
+	mov	w2, 192
+	add	x1, x1, :lo12:.LANCHOR119
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L907:
-	b	.L907
-.L908:
+.L1021:
+	ldr	x0, [x20, #:lo12:.LANCHOR101]
+	add	x19, x0, x19, sxtw 1
+	ldrh	w1, [x0, 688]
+	strh	w21, [x19, 416]
+	add	w1, w1, 1
+	strh	w1, [x0, 688]
+.L1019:
+	ldr	x1, [x20, #:lo12:.LANCHOR101]
+	ldrh	w0, [x1, 690]
+	add	x0, x0, 336
+	ldrh	w19, [x1, x0, lsl 1]
+	mov	w0, 65533
+	sub	w1, w19, #1
+	cmp	w0, w1, uxth
+	bcs	.L1024
+	adrp	x1, .LANCHOR119
+	adrp	x0, .LC0
+	mov	w2, 197
+	add	x1, x1, :lo12:.LANCHOR119
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1024:
 	adrp	x1, .LANCHOR96
+	ldr	x0, [x20, #:lo12:.LANCHOR101]
 	mov	w2, 21
-	strh	wzr, [x0, 696]
 	ldrh	w1, [x1, #:lo12:.LANCHOR96]
-	strh	w3, [x0, 692]
 	sub	w2, w2, w1
-	asr	w4, w3, w2
+	strh	wzr, [x0, 696]
+	strh	w19, [x0, 692]
+	asr	w4, w19, w2
 	strh	w4, [x0, 694]
-	adrp	x0, .LANCHOR29
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 12, .L912
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L1027
 	mov	w0, 1
 	and	w4, w4, 65535
 	lsl	w2, w0, w2
-	mov	w1, w3
-	adrp	x0, .LC32
+	mov	w3, w19
+	adrp	x0, .LC65
 	sub	w2, w2, #1
-	add	x0, x0, :lo12:.LC32
+	mov	w1, w19
+	add	x0, x0, :lo12:.LC65
 	bl	printf
-.L912:
+.L1027:
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L904:
-	add	x0, x1, x0, sxtw 1
-	strh	w19, [x0, 416]
-	ldrh	w0, [x1, 688]
-	add	w0, w0, 1
-	strh	w0, [x1, 688]
-.L902:
-	ldr	x0, [x20, #:lo12:.LANCHOR53]
-	ldrh	w1, [x0, 690]
-	add	x1, x1, 336
-	ldrh	w3, [x0, x1, lsl 1]
-	mov	w1, 65533
-	sub	w2, w3, #1
-	cmp	w1, w2, uxth
-	bcs	.L908
-	adrp	x1, .LANCHOR116
-	adrp	x0, .LC0
-	mov	w2, 193
-	add	x1, x1, :lo12:.LANCHOR116
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L909:
-	b	.L909
 	.size	pm_alloc_new_blk, .-pm_alloc_new_blk
 	.section	.text.pm_select_ram_region,"ax",@progbits
 	.align	2
 	.global	pm_select_ram_region
 	.type	pm_select_ram_region, %function
 pm_select_ram_region:
-	adrp	x1, .LANCHOR117
-	add	x1, x1, :lo12:.LANCHOR117
-	mov	x2, 0
-	mov	w3, 65535
-.L921:
-	lsl	x4, x2, 4
-	and	w0, w2, 65535
-	ldrh	w4, [x4, x1]
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR120
+	add	x0, x0, :lo12:.LANCHOR120
+	mov	x1, 0
+	add	x29, sp, 0
+	mov	w2, 65535
+	str	x19, [sp, 16]
+.L1036:
+	lsl	x3, x1, 4
+	and	w19, w1, 65535
+	ldrh	w3, [x3, x0]
+	cmp	w3, w2
+	beq	.L1035
+	add	x1, x1, 1
+	cmp	x1, 32
+	bne	.L1036
+	add	x0, x0, 2
+	mov	w19, w1
+	mov	x2, x0
+	mov	w4, 32768
+	mov	w1, 0
+.L1038:
+	ldrh	w3, [x2]
+	tbnz	x3, 15, .L1037
+	cmp	w3, w4
+	bcs	.L1037
+	mov	w4, w3
+	mov	w19, w1
+.L1037:
+	add	w1, w1, 1
+	add	x2, x2, 16
+	and	w1, w1, 65535
+	cmp	w1, 32
+	bne	.L1038
+	cmp	w19, 32
+	bne	.L1035
+	adrp	x1, .LANCHOR121
+	mov	w2, -1
+	ldrb	w3, [x1, #:lo12:.LANCHOR121]
+	mov	w1, 0
+.L1040:
+	ldrh	w5, [x0]
+	cmp	w5, w2
+	bcs	.L1039
+	ldrh	w4, [x0, -2]
 	cmp	w4, w3
-	beq	.L920
-	add	x2, x2, 1
-	cmp	x2, 32
-	bne	.L921
-	add	x1, x1, 2
-	mov	w0, w2
-	mov	x3, x1
-	mov	w5, 32768
-	mov	w2, 0
-.L923:
-	ldrh	w4, [x3]
-	tbnz	x4, 15, .L922
-	cmp	w4, w5
-	bcs	.L922
-	mov	w5, w4
-	mov	w0, w2
-.L922:
-	add	w2, w2, 1
-	add	x3, x3, 16
-	and	w2, w2, 65535
-	cmp	w2, 32
-	bne	.L923
-	cmp	w0, 32
-	bne	.L920
-	adrp	x2, .LANCHOR118
-	mov	w3, -1
-	ldrb	w4, [x2, #:lo12:.LANCHOR118]
-	mov	w2, 0
-.L925:
-	ldrh	w6, [x1]
-	cmp	w6, w3
-	bcs	.L924
-	ldrh	w5, [x1, -2]
-	cmp	w5, w4
-	csel	w3, w3, w6, eq
-	csel	w0, w0, w2, eq
-.L924:
-	add	w2, w2, 1
-	add	x1, x1, 16
-	and	w2, w2, 65535
-	cmp	w2, 32
-	bne	.L925
-	cmp	w0, 32
-	bne	.L920
-	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR119
+	csel	w2, w2, w5, eq
+	csel	w19, w19, w1, eq
+.L1039:
+	add	w1, w1, 1
+	add	x0, x0, 16
+	and	w1, w1, 65535
+	cmp	w1, 32
+	bne	.L1040
+	cmp	w19, 32
+	bne	.L1035
+	adrp	x1, .LANCHOR122
 	adrp	x0, .LC0
-	mov	w2, 289
-	add	x29, sp, 0
-	add	x1, x1, :lo12:.LANCHOR119
+	mov	w2, 295
+	add	x1, x1, :lo12:.LANCHOR122
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L926:
-	b	.L926
-.L920:
+.L1035:
+	mov	w0, w19
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
 	ret
 	.size	pm_select_ram_region, .-pm_select_ram_region
 	.section	.text.ftl_memset,"ax",@progbits
@@ -5647,60 +6060,60 @@ flash_lsb_page_tbl_build:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR21
-	cbnz	w0, .L935
-	add	x1, x19, :lo12:.LANCHOR21
+	adrp	x19, .LANCHOR27
+	cbnz	w0, .L1047
+	add	x1, x19, :lo12:.LANCHOR27
 	mov	x0, 0
-.L936:
+.L1048:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 256
-	bne	.L936
-.L942:
-	adrp	x20, .LANCHOR120
-	add	x20, x20, :lo12:.LANCHOR120
+	bne	.L1048
+.L1054:
+	adrp	x20, .LANCHOR123
+	add	x20, x20, :lo12:.LANCHOR123
 	mov	w2, 1024
 	mov	w1, 255
 	mov	x0, x20
-	add	x19, x19, :lo12:.LANCHOR21
+	add	x19, x19, :lo12:.LANCHOR27
 	bl	ftl_memset
 	mov	x0, 0
-.L937:
+.L1049:
 	ldrh	w1, [x0, x19]
 	add	x0, x0, 2
 	cmp	x0, 512
 	strh	w1, [x20, w1, sxtw 1]
-	bne	.L937
+	bne	.L1049
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L935:
+.L1047:
 	cmp	w0, 1
-	bne	.L938
-	add	x3, x19, :lo12:.LANCHOR21
+	bne	.L1050
+	add	x3, x19, :lo12:.LANCHOR27
 	mov	x1, 0
-.L941:
+.L1053:
 	and	w0, w1, 65535
 	cmp	x1, 3
-	bls	.L939
+	bls	.L1051
 	ubfiz	w2, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 2
 	sub	w0, w2, w0
 	and	w0, w0, 65535
-.L939:
+.L1051:
 	strh	w0, [x3, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L941
-	b	.L942
-.L938:
+	bne	.L1053
+	b	.L1054
+.L1050:
 	cmp	w0, 2
-	bne	.L943
-	add	x3, x19, :lo12:.LANCHOR21
+	bne	.L1055
+	add	x3, x19, :lo12:.LANCHOR27
 	mov	w1, 65535
 	mov	x0, 0
-.L945:
+.L1057:
 	cmp	x0, 2
 	and	w2, w0, 65535
 	csel	w2, w2, w1, cc
@@ -5709,35 +6122,35 @@ flash_lsb_page_tbl_build:
 	add	x0, x0, 1
 	and	w1, w1, 65535
 	cmp	x0, 256
-	bne	.L945
-	b	.L942
-.L943:
+	bne	.L1057
+	b	.L1054
+.L1055:
 	cmp	w0, 3
-	bne	.L946
-	add	x3, x19, :lo12:.LANCHOR21
+	bne	.L1058
+	add	x3, x19, :lo12:.LANCHOR27
 	mov	x1, 0
-.L949:
+.L1061:
 	and	w0, w1, 65535
 	cmp	x1, 5
-	bls	.L947
+	bls	.L1059
 	ubfiz	w2, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 4
 	sub	w0, w2, w0
 	and	w0, w0, 65535
-.L947:
+.L1059:
 	strh	w0, [x3, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L949
-	b	.L942
-.L946:
+	bne	.L1061
+	b	.L1054
+.L1058:
 	cmp	w0, 4
-	bne	.L950
-	add	x1, x19, :lo12:.LANCHOR21
+	bne	.L1062
+	add	x1, x19, :lo12:.LANCHOR27
 	mov	w2, 1
 	add	x1, x1, 16
-	strh	wzr, [x19, #:lo12:.LANCHOR21]
+	strh	wzr, [x19, #:lo12:.LANCHOR27]
 	strh	w0, [x1, -8]
 	mov	w0, 5
 	strh	w2, [x1, -14]
@@ -5751,7 +6164,7 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1, -10]
 	strh	w0, [x1, -2]
 	mov	w0, 8
-.L952:
+.L1064:
 	and	w3, w0, 1
 	ubfiz	w2, w0, 1, 15
 	add	w3, w3, 6
@@ -5760,37 +6173,37 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1], 2
 	and	w0, w0, 65535
 	cmp	w0, 256
-	bne	.L952
-	b	.L942
-.L950:
+	bne	.L1064
+	b	.L1054
+.L1062:
 	cmp	w0, 5
-	bne	.L953
-	add	x1, x19, :lo12:.LANCHOR21
+	bne	.L1065
+	add	x1, x19, :lo12:.LANCHOR27
 	mov	x0, 0
-.L954:
+.L1066:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 16
-	bne	.L954
+	bne	.L1066
 	add	x1, x1, 32
-.L955:
+.L1067:
 	strh	w0, [x1], 2
 	add	w0, w0, 2
 	and	w0, w0, 65535
 	cmp	w0, 496
-	bne	.L955
-	b	.L942
-.L953:
+	bne	.L1067
+	b	.L1054
+.L1065:
 	cmp	w0, 8
-	bne	.L942
-	add	x1, x19, :lo12:.LANCHOR21
+	bne	.L1054
+	add	x1, x19, :lo12:.LANCHOR27
 	mov	x0, 0
-.L956:
+.L1068:
 	strh	w0, [x0, x1]
 	add	x0, x0, 2
 	cmp	x0, 512
-	bne	.L956
-	b	.L942
+	bne	.L1068
+	b	.L1054
 	.size	flash_lsb_page_tbl_build, .-flash_lsb_page_tbl_build
 	.section	.text.flash_die_info_init,"ax",@progbits
 	.align	2
@@ -5798,29 +6211,38 @@ flash_lsb_page_tbl_build:
 	.type	flash_die_info_init, %function
 flash_die_info_init:
 	stp	x29, x30, [sp, -80]!
-	mov	w2, 8
+	adrp	x0, .LANCHOR7
 	add	x29, sp, 0
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
 	stp	x19, x20, [sp, 16]
-	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR26
-	add	x19, x23, :lo12:.LANCHOR26
 	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR20
-	adrp	x26, .LANCHOR15
-	adrp	x22, .LANCHOR17
+	tbz	x0, 12, .L1084
+	adrp	x1, .LANCHOR124
+	adrp	x0, .LC1
+	add	x1, x1, :lo12:.LANCHOR124
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L1084:
+	adrp	x23, .LANCHOR32
+	add	x19, x23, :lo12:.LANCHOR32
+	adrp	x25, .LANCHOR26
+	adrp	x26, .LANCHOR12
+	adrp	x22, .LANCHOR24
+	add	x21, x22, :lo12:.LANCHOR24
 	ldrh	w0, [x19, 26]
-	add	x21, x22, :lo12:.LANCHOR17
+	mov	w2, 8
 	ldrb	w1, [x19, 12]
-	adrp	x24, .LANCHOR122
-	strh	w0, [x25, #:lo12:.LANCHOR20]
-	add	x20, x24, :lo12:.LANCHOR122
+	adrp	x24, .LANCHOR126
+	strh	w0, [x25, #:lo12:.LANCHOR26]
+	add	x20, x24, :lo12:.LANCHOR126
 	ldrh	w0, [x19, 10]
 	add	x19, x19, 1
-	strb	wzr, [x26, #:lo12:.LANCHOR15]
+	strb	wzr, [x26, #:lo12:.LANCHOR12]
 	sdiv	w0, w0, w1
-	adrp	x1, .LANCHOR121
-	strh	w0, [x1, #:lo12:.LANCHOR121]
+	adrp	x1, .LANCHOR125
+	strh	w0, [x1, #:lo12:.LANCHOR125]
 	mov	w1, 0
 	mov	x0, x21
 	bl	ftl_memset
@@ -5828,34 +6250,34 @@ flash_die_info_init:
 	mov	w1, 0
 	mov	x0, x20
 	bl	ftl_memset
-	ldrb	w13, [x23, #:lo12:.LANCHOR26]
+	ldrb	w13, [x23, #:lo12:.LANCHOR32]
 	mov	x7, x23
-	adrp	x14, .LANCHOR33
-	add	x11, x26, :lo12:.LANCHOR15
-	add	x23, x14, :lo12:.LANCHOR33
+	adrp	x14, .LANCHOR38
+	add	x11, x26, :lo12:.LANCHOR12
+	add	x23, x14, :lo12:.LANCHOR38
 	mov	x8, 0
-.L973:
+.L1086:
 	mov	w2, w13
 	add	x1, x23, x8, lsl 3
 	mov	x0, x19
 	bl	flash_mem_cmp8
-	cbnz	w0, .L972
+	cbnz	w0, .L1085
 	ldrb	w1, [x11]
 	add	w0, w1, 1
 	strb	w0, [x11]
 	str	wzr, [x20, x1, lsl 2]
 	strb	w8, [x21, x1]
-.L972:
+.L1085:
 	add	x8, x8, 1
 	cmp	x8, 4
-	bne	.L973
-	add	x0, x7, :lo12:.LANCHOR26
+	bne	.L1086
+	add	x0, x7, :lo12:.LANCHOR32
 	ldrb	w1, [x0, 8]
 	cmp	w1, 2
-	beq	.L974
-.L978:
-	add	x7, x7, :lo12:.LANCHOR26
-	ldrb	w0, [x26, #:lo12:.LANCHOR15]
+	beq	.L1087
+.L1091:
+	add	x7, x7, :lo12:.LANCHOR32
+	ldrb	w0, [x26, #:lo12:.LANCHOR12]
 	ldp	x19, x20, [sp, 16]
 	ldrb	w1, [x7, 13]
 	ldp	x21, x22, [sp, 32]
@@ -5865,30 +6287,30 @@ flash_die_info_init:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	mul	w0, w0, w1
-	adrp	x1, .LANCHOR123
-	strh	w0, [x1, #:lo12:.LANCHOR123]
+	adrp	x1, .LANCHOR127
+	strh	w0, [x1, #:lo12:.LANCHOR127]
 	ret
-.L974:
-	ldrh	w1, [x25, #:lo12:.LANCHOR20]
-	add	x14, x14, :lo12:.LANCHOR33
+.L1087:
+	ldrh	w1, [x25, #:lo12:.LANCHOR26]
+	add	x14, x14, :lo12:.LANCHOR38
 	ldrb	w11, [x0, 13]
 	add	x8, x0, 1
 	ldrb	w20, [x0, 23]
-	add	x19, x26, :lo12:.LANCHOR15
-	add	x15, x24, :lo12:.LANCHOR122
-	add	x22, x22, :lo12:.LANCHOR17
+	add	x19, x26, :lo12:.LANCHOR12
+	add	x15, x24, :lo12:.LANCHOR126
+	add	x22, x22, :lo12:.LANCHOR24
 	mov	x12, 0
 	mul	w11, w11, w1
 	ldrh	w1, [x0, 14]
 	and	w1, w1, 65280
 	mul	w11, w11, w1
 	lsl	w21, w11, 1
-.L977:
+.L1090:
 	mov	w2, w13
 	add	x1, x14, x12, lsl 3
 	mov	x0, x8
 	bl	flash_mem_cmp8
-	cbnz	w0, .L975
+	cbnz	w0, .L1088
 	ldrb	w1, [x19]
 	cmp	w20, 0
 	csel	w2, w11, w21, eq
@@ -5896,11 +6318,11 @@ flash_die_info_init:
 	strb	w0, [x19]
 	str	w2, [x15, x1, lsl 2]
 	strb	w12, [x22, x1]
-.L975:
+.L1088:
 	add	x12, x12, 1
 	cmp	x12, 4
-	bne	.L977
-	b	.L978
+	bne	.L1090
+	b	.L1091
 	.size	flash_die_info_init, .-flash_die_info_init
 	.section	.text.lpa_hash_init,"ax",@progbits
 	.align	2
@@ -5910,9 +6332,9 @@ lpa_hash_init:
 	stp	x29, x30, [sp, -16]!
 	mov	w2, 512
 	mov	w1, 255
-	adrp	x0, .LANCHOR104
+	adrp	x0, .LANCHOR105
 	add	x29, sp, 0
-	add	x0, x0, :lo12:.LANCHOR104
+	add	x0, x0, :lo12:.LANCHOR105
 	bl	ftl_memset
 	adrp	x0, .LANCHOR80
 	mov	w1, 255
@@ -5921,8 +6343,8 @@ lpa_hash_init:
 	adrp	x0, .LANCHOR72
 	ldrb	w0, [x0, #:lo12:.LANCHOR72]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR106
-	ldr	x0, [x0, #:lo12:.LANCHOR106]
+	adrp	x0, .LANCHOR107
+	ldr	x0, [x0, #:lo12:.LANCHOR107]
 	lsl	w2, w2, 2
 	b	ftl_memset
 	.size	lpa_hash_init, .-lpa_hash_init
@@ -5932,64 +6354,64 @@ lpa_hash_init:
 	.type	lpa_rebuild_hash, %function
 lpa_rebuild_hash:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LANCHOR29
+	adrp	x0, .LANCHOR7
 	add	x29, sp, 0
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	tbz	x0, 12, .L988
-	adrp	x1, .LANCHOR124
-	adrp	x0, .LC33
+	tbz	x0, 12, .L1104
+	adrp	x1, .LANCHOR128
+	adrp	x0, .LC66
 	mov	w3, 0
-	mov	w2, 219
-	add	x1, x1, :lo12:.LANCHOR124
-	add	x0, x0, :lo12:.LC33
+	mov	w2, 218
+	add	x1, x1, :lo12:.LANCHOR128
+	add	x0, x0, :lo12:.LC66
 	bl	printf
-.L988:
+.L1104:
 	adrp	x20, .LANCHOR80
 	adrp	x22, .LANCHOR72
-	adrp	x19, .LANCHOR104
-	add	x19, x19, :lo12:.LANCHOR104
+	adrp	x19, .LANCHOR105
+	add	x19, x19, :lo12:.LANCHOR105
 	mov	w2, 512
 	mov	w1, 255
 	mov	x0, x19
 	bl	ftl_memset
 	ldrh	w2, [x20, #:lo12:.LANCHOR80]
-	adrp	x21, .LANCHOR106
+	adrp	x21, .LANCHOR107
 	ldrb	w0, [x22, #:lo12:.LANCHOR72]
 	mov	w1, 255
 	add	x20, x20, :lo12:.LANCHOR80
 	mul	w2, w2, w0
-	ldr	x0, [x21, #:lo12:.LANCHOR106]
+	ldr	x0, [x21, #:lo12:.LANCHOR107]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	adrp	x0, .LANCHOR105
+	adrp	x0, .LANCHOR106
 	ldrb	w3, [x22, #:lo12:.LANCHOR72]
-	ldr	x5, [x21, #:lo12:.LANCHOR106]
+	ldr	x5, [x21, #:lo12:.LANCHOR107]
 	mov	w1, 0
-	ldr	x4, [x0, #:lo12:.LANCHOR105]
-.L989:
+	ldr	x4, [x0, #:lo12:.LANCHOR106]
+.L1105:
 	ldrh	w0, [x20]
 	mul	w0, w0, w3
 	cmp	w1, w0, lsl 1
-	blt	.L991
+	blt	.L1107
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L991:
+.L1107:
 	uxtw	x2, w1
 	ldr	w0, [x4, x2, lsl 2]
 	cmn	w0, #1
-	beq	.L990
+	beq	.L1106
 	and	x0, x0, 255
 	ldrh	w6, [x19, x0, lsl 1]
 	strh	w1, [x19, x0, lsl 1]
 	strh	w6, [x5, x2, lsl 1]
-.L990:
+.L1106:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L989
+	b	.L1105
 	.size	lpa_rebuild_hash, .-lpa_rebuild_hash
 	.section	.text.zftl_read_flash_info,"ax",@progbits
 	.align	2
@@ -6003,19 +6425,19 @@ zftl_read_flash_info:
 	str	x19, [sp, 16]
 	mov	x19, x0
 	bl	ftl_memset
-	adrp	x1, .LANCHOR26
-	add	x1, x1, :lo12:.LANCHOR26
-	adrp	x0, .LANCHOR20
+	adrp	x1, .LANCHOR32
+	add	x1, x1, :lo12:.LANCHOR32
+	adrp	x0, .LANCHOR26
 	mov	w4, 1
 	ldrb	w3, [x1, 9]
-	ldrh	w0, [x0, #:lo12:.LANCHOR20]
+	ldrh	w0, [x0, #:lo12:.LANCHOR26]
 	mul	w0, w3, w0
 	and	w2, w0, 65535
 	strb	w2, [x19, 4]
 	ubfx	x0, x2, 8, 8
 	strb	w0, [x19, 5]
-	adrp	x0, .LANCHOR34
-	ldrb	w0, [x0, #:lo12:.LANCHOR34]
+	adrp	x0, .LANCHOR40
+	ldrb	w0, [x0, #:lo12:.LANCHOR40]
 	strb	w0, [x19, 7]
 	ldrb	w0, [x1, 13]
 	mul	w0, w0, w2
@@ -6031,30 +6453,30 @@ zftl_read_flash_info:
 	ubfx	x2, x0, 16, 8
 	lsr	w0, w0, 24
 	strb	w2, [x19, 2]
-	adrp	x2, .LANCHOR17
+	adrp	x2, .LANCHOR24
 	strb	w0, [x19, 3]
 	mov	w0, 32
 	strb	w0, [x19, 8]
-	add	x2, x2, :lo12:.LANCHOR17
+	add	x2, x2, :lo12:.LANCHOR24
 	ldrb	w0, [x1, 7]
 	mov	x1, 0
 	strb	w0, [x19, 9]
-	adrp	x0, .LANCHOR15
-	ldrb	w3, [x0, #:lo12:.LANCHOR15]
-.L1000:
+	adrp	x0, .LANCHOR12
+	ldrb	w3, [x0, #:lo12:.LANCHOR12]
+.L1116:
 	cmp	w3, w1, uxtb
-	bhi	.L1001
+	bhi	.L1117
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1001:
+.L1117:
 	ldrb	w0, [x1, x2]
 	add	x1, x1, 1
 	ldrb	w5, [x19, 10]
 	lsl	w0, w4, w0
 	orr	w0, w0, w5
 	strb	w0, [x19, 10]
-	b	.L1000
+	b	.L1116
 	.size	zftl_read_flash_info, .-zftl_read_flash_info
 	.section	.text.gc_static_wearleveling,"ax",@progbits
 	.align	2
@@ -6065,20 +6487,20 @@ gc_static_wearleveling:
 	mov	w1, 10240
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR53
+	adrp	x22, .LANCHOR101
 	stp	x19, x20, [sp, 16]
-	ldr	x5, [x22, #:lo12:.LANCHOR53]
+	ldr	x5, [x22, #:lo12:.LANCHOR101]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	ldr	w0, [x5, 32]
 	cmp	w0, w1
-	bls	.L1004
+	bls	.L1120
 	ldr	w1, [x5, 36]
 	add	w1, w1, w0, lsr 10
 	and	w0, w0, 1023
 	stp	w0, w1, [x5, 32]
-.L1004:
+.L1120:
 	adrp	x25, .LANCHOR5
 	ldr	w3, [x5, 36]
 	ldr	x0, [x25, #:lo12:.LANCHOR5]
@@ -6087,12 +6509,12 @@ gc_static_wearleveling:
 	add	w1, w1, 860160
 	add	w1, w1, 3840
 	cmp	w2, w1
-	bhi	.L1005
+	bhi	.L1121
 	ldr	w1, [x0, 572]
 	add	w1, w1, 32
 	cmp	w3, w1
-	bls	.L1003
-.L1005:
+	bls	.L1119
+.L1121:
 	adrp	x21, .LANCHOR3
 	ldrh	w10, [x5, 134]
 	adrp	x23, .LANCHOR2
@@ -6110,46 +6532,46 @@ gc_static_wearleveling:
 	mov	w26, 0
 	mov	w3, 0
 	mov	w2, 0
-.L1007:
+.L1123:
 	cmp	w10, w11
-	bcc	.L1011
+	bcc	.L1127
 	ldrh	w0, [x5, 96]
 	cmp	w0, w20
-	bcs	.L1012
+	bcs	.L1128
 	strh	w20, [x5, 96]
-.L1012:
+.L1128:
 	ldrh	w0, [x5, 98]
 	cmp	w0, w26
-	bcs	.L1013
+	bcs	.L1129
 	strh	w26, [x5, 98]
-.L1013:
+.L1129:
 	udiv	w3, w3, w1
-	adrp	x24, .LANCHOR29
+	adrp	x24, .LANCHOR7
 	udiv	w4, w4, w2
-	ldr	w0, [x24, #:lo12:.LANCHOR29]
+	ldr	w0, [x24, #:lo12:.LANCHOR7]
 	strh	w3, [x5, 88]
 	strh	w4, [x5, 90]
-	tbz	x0, 10, .L1014
-	adrp	x0, .LC34
+	tbz	x0, 10, .L1130
+	adrp	x0, .LC67
 	and	w4, w4, 65535
 	and	w3, w3, 65535
-	add	x0, x0, :lo12:.LC34
+	add	x0, x0, :lo12:.LC67
 	bl	printf
-.L1014:
-	ldr	w0, [x24, #:lo12:.LANCHOR29]
-	adrp	x28, .LANCHOR125
-	tbz	x0, 10, .L1015
-	adrp	x0, .LANCHOR126
-	ldrh	w6, [x28, #:lo12:.LANCHOR125]
+.L1130:
+	ldr	w0, [x24, #:lo12:.LANCHOR7]
+	adrp	x28, .LANCHOR129
+	tbz	x0, 10, .L1131
+	adrp	x0, .LANCHOR130
+	ldrh	w6, [x28, #:lo12:.LANCHOR129]
 	mov	w4, w26
 	mov	w3, w20
-	ldrh	w5, [x0, #:lo12:.LANCHOR126]
+	ldrh	w5, [x0, #:lo12:.LANCHOR130]
 	mov	w2, w19
-	adrp	x0, .LC35
+	adrp	x0, .LC68
 	mov	w1, w27
-	add	x0, x0, :lo12:.LC35
+	add	x0, x0, :lo12:.LC68
 	bl	printf
-.L1015:
+.L1131:
 	ldr	x0, [x25, #:lo12:.LANCHOR5]
 	mov	w1, 255
 	mov	w2, 128
@@ -6158,36 +6580,36 @@ gc_static_wearleveling:
 	bl	ftl_memset
 	sub	w0, w26, w19
 	str	w0, [x29, 148]
-	ldrh	w0, [x28, #:lo12:.LANCHOR125]
+	ldrh	w0, [x28, #:lo12:.LANCHOR129]
 	ldr	w1, [x29, 148]
 	cmp	w1, w0
-	bgt	.L1016
-	adrp	x1, .LANCHOR126
+	bgt	.L1132
+	adrp	x1, .LANCHOR130
 	sub	w0, w20, w27
-	ldrh	w1, [x1, #:lo12:.LANCHOR126]
+	ldrh	w1, [x1, #:lo12:.LANCHOR130]
 	cmp	w0, w1
-	bgt	.L1016
-.L1023:
-	cbnz	w19, .L1017
-.L1025:
-	cbz	w27, .L1003
-	ldr	x2, [x22, #:lo12:.LANCHOR53]
+	bgt	.L1132
+.L1139:
+	cbnz	w19, .L1133
+.L1141:
+	cbz	w27, .L1119
+	ldr	x2, [x22, #:lo12:.LANCHOR101]
 	ldr	x1, [x21, #:lo12:.LANCHOR3]
 	ldrh	w5, [x23, #:lo12:.LANCHOR2]
 	ldrh	w0, [x2, 134]
 	add	x1, x1, x0, uxth 2
-.L1030:
+.L1146:
 	cmp	w0, w5
-	bcc	.L1032
+	bcc	.L1148
 	ldrh	w0, [x2, 74]
 	add	w0, w27, w0
 	strh	w0, [x2, 74]
 	ldrh	w0, [x2, 96]
 	cmp	w27, w0
-	bcs	.L1003
+	bcs	.L1119
 	sub	w7, w0, w27
 	strh	w7, [x2, 96]
-.L1003:
+.L1119:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -6195,14 +6617,14 @@ gc_static_wearleveling:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L1011:
+.L1127:
 	ldrb	w0, [x8, 2]
-	tbz	x0, 3, .L1008
+	tbz	x0, 3, .L1124
 	ldr	w0, [x8]
 	ldrh	w6, [x8]
 	ubfx	x0, x0, 11, 8
 	and	w6, w6, 2047
-.L1009:
+.L1125:
 	cmp	w6, w27
 	add	w1, w1, 1
 	csel	w7, w6, w27, cc
@@ -6213,19 +6635,19 @@ gc_static_wearleveling:
 	and	w27, w7, 65535
 	and	w20, w20, 65535
 	cmp	w0, w12
-	bne	.L1033
-	b	.L1034
-.L1008:
+	bne	.L1149
+	b	.L1150
+.L1124:
 	tst	w0, 24
-	bne	.L1010
+	bne	.L1126
 	ldrh	w6, [x8]
 	mov	w0, 65535
 	and	w6, w6, 2047
-	b	.L1009
-.L1010:
+	b	.L1125
+.L1126:
 	ldr	w0, [x8]
 	ubfx	x0, x0, 11, 8
-.L1033:
+.L1149:
 	cmp	w0, w19
 	add	w2, w2, 1
 	csel	w19, w0, w19, cc
@@ -6235,48 +6657,48 @@ gc_static_wearleveling:
 	and	w2, w2, 65535
 	and	w19, w19, 65535
 	and	w26, w0, 65535
-.L1034:
+.L1150:
 	add	w10, w10, 1
 	add	x8, x8, 4
 	and	w10, w10, 65535
-	b	.L1007
-.L1016:
-	ldr	x0, [x22, #:lo12:.LANCHOR53]
+	b	.L1123
+.L1132:
+	ldr	x0, [x22, #:lo12:.LANCHOR101]
 	adrp	x25, .LANCHOR63
 	stp	wzr, wzr, [x29, 152]
 	ldrh	w26, [x0, 134]
 	add	x0, x23, :lo12:.LANCHOR2
 	str	x0, [x29, 128]
-	adrp	x0, .LANCHOR126
-	add	x0, x0, :lo12:.LANCHOR126
+	adrp	x0, .LANCHOR130
+	add	x0, x0, :lo12:.LANCHOR130
 	str	x0, [x29, 120]
 	add	x0, x25, :lo12:.LANCHOR63
 	str	x0, [x29, 136]
-.L1019:
+.L1135:
 	ldr	x0, [x29, 128]
 	ldrh	w0, [x0]
 	cmp	w0, w26
-	bls	.L1023
+	bls	.L1139
 	uxtw	x25, w26
 	ldr	x4, [x21, #:lo12:.LANCHOR3]
 	lsl	x3, x25, 2
 	add	x0, x4, x3
 	ldrb	w0, [x0, 2]
 	tst	w0, 192
-	beq	.L1020
+	beq	.L1136
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L1020
-	tbz	x0, 4, .L1021
-	ldrh	w0, [x28, #:lo12:.LANCHOR125]
+	beq	.L1136
+	tbz	x0, 4, .L1137
+	ldrh	w0, [x28, #:lo12:.LANCHOR129]
 	ldr	w1, [x29, 148]
 	cmp	w1, w0
-	ble	.L1022
+	ble	.L1138
 	ldr	w0, [x4, x3]
 	add	w1, w19, 1
 	ubfx	x0, x0, 11, 8
 	cmp	w0, w1
-	bgt	.L1022
+	bgt	.L1138
 	stp	x4, x3, [x29, 104]
 	mov	w2, 1
 	mov	w1, 0
@@ -6286,8 +6708,8 @@ gc_static_wearleveling:
 	ldp	x4, x3, [x29, 104]
 	add	w0, w0, 1
 	str	w0, [x29, 156]
-	ldr	w0, [x24, #:lo12:.LANCHOR29]
-	tbz	x0, 10, .L1022
+	ldr	w0, [x24, #:lo12:.LANCHOR7]
+	tbz	x0, 10, .L1138
 	adrp	x0, .LANCHOR4
 	ldr	w6, [x4, x3]
 	ldrh	w5, [x4, x3]
@@ -6299,34 +6721,34 @@ gc_static_wearleveling:
 	ldr	x0, [x29, 136]
 	ldrb	w2, [x3, 2]
 	ldrh	w4, [x0, 56]
-	adrp	x0, .LC36
+	adrp	x0, .LC69
 	ldrh	w3, [x1, x25, lsl 1]
-	add	x0, x0, :lo12:.LC36
+	add	x0, x0, :lo12:.LC69
 	ubfx	x2, x2, 5, 3
 	mov	w1, w26
-.L1057:
+.L1173:
 	bl	printf
-.L1022:
+.L1138:
 	ldr	w0, [x29, 156]
 	cmp	w0, 4
 	ldr	w0, [x29, 152]
 	ccmp	w0, 4, 2, ls
-	bhi	.L1023
-.L1020:
+	bhi	.L1139
+.L1136:
 	add	w8, w26, 1
 	and	w26, w8, 65535
-	b	.L1019
-.L1021:
+	b	.L1135
+.L1137:
 	ldr	x1, [x29, 120]
 	sub	w0, w20, w27
 	ldrh	w1, [x1]
 	cmp	w0, w1
-	ble	.L1022
+	ble	.L1138
 	ldrh	w0, [x4, x3]
 	add	w1, w27, 1
 	and	w0, w0, 2047
 	cmp	w0, w1
-	bgt	.L1022
+	bgt	.L1138
 	stp	x4, x3, [x29, 104]
 	mov	w2, 1
 	mov	w1, 0
@@ -6336,8 +6758,8 @@ gc_static_wearleveling:
 	ldp	x4, x3, [x29, 104]
 	add	w0, w0, 1
 	str	w0, [x29, 152]
-	ldr	w0, [x24, #:lo12:.LANCHOR29]
-	tbz	x0, 10, .L1022
+	ldr	w0, [x24, #:lo12:.LANCHOR7]
+	tbz	x0, 10, .L1138
 	adrp	x0, .LANCHOR4
 	ldr	w6, [x4, x3]
 	ldrh	w5, [x4, x3]
@@ -6349,56 +6771,56 @@ gc_static_wearleveling:
 	ldr	x0, [x29, 136]
 	ldrb	w2, [x3, 2]
 	ldrh	w4, [x0, 56]
-	adrp	x0, .LC37
+	adrp	x0, .LC70
 	ldrh	w3, [x1, x25, lsl 1]
-	add	x0, x0, :lo12:.LC37
+	add	x0, x0, :lo12:.LC70
 	ubfx	x2, x2, 5, 3
 	mov	w1, w26
-	b	.L1057
-.L1017:
-	ldr	x2, [x22, #:lo12:.LANCHOR53]
+	b	.L1173
+.L1133:
+	ldr	x2, [x22, #:lo12:.LANCHOR101]
 	ldr	x1, [x21, #:lo12:.LANCHOR3]
 	ldrh	w5, [x23, #:lo12:.LANCHOR2]
 	ldrh	w0, [x2, 134]
 	add	x1, x1, x0, uxth 2
-.L1026:
+.L1142:
 	cmp	w0, w5
-	bcc	.L1028
+	bcc	.L1144
 	ldrh	w0, [x2, 72]
 	add	w0, w19, w0
 	strh	w0, [x2, 72]
 	ldrh	w0, [x2, 98]
 	cmp	w19, w0
-	bcs	.L1025
+	bcs	.L1141
 	sub	w19, w0, w19
 	strh	w19, [x2, 98]
-	b	.L1025
-.L1028:
+	b	.L1141
+.L1144:
 	ldr	w3, [x1]
 	ubfx	x4, x3, 11, 8
 	cmp	w19, w4
-	bhi	.L1027
+	bhi	.L1143
 	sub	w4, w4, w19
 	bfi	w3, w4, 11, 8
 	str	w3, [x1]
-.L1027:
+.L1143:
 	add	w0, w0, 1
 	add	x1, x1, 4
 	and	w0, w0, 65535
-	b	.L1026
-.L1032:
+	b	.L1142
+.L1148:
 	ldrh	w3, [x1]
 	and	w4, w3, 2047
 	cmp	w4, w27
-	blt	.L1031
+	blt	.L1147
 	sub	w4, w4, w27
 	bfi	w3, w4, 0, 11
 	strh	w3, [x1]
-.L1031:
+.L1147:
 	add	w0, w0, 1
 	add	x1, x1, 4
 	and	w0, w0, 65535
-	b	.L1030
+	b	.L1146
 	.size	gc_static_wearleveling, .-gc_static_wearleveling
 	.section	.text.zftl_sblk_list_init,"ax",@progbits
 	.align	2
@@ -6420,7 +6842,7 @@ zftl_sblk_list_init:
 	stp	x23, x24, [sp, 48]
 	adrp	x22, .LANCHOR93
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR53
+	adrp	x25, .LANCHOR101
 	mul	w2, w2, w0
 	ldr	x0, [x28, #:lo12:.LANCHOR0]
 	adrp	x24, .LANCHOR89
@@ -6453,26 +6875,26 @@ zftl_sblk_list_init:
 	strh	wzr, [x22, #:lo12:.LANCHOR93]
 	sxth	w0, w0
 	str	w0, [x29, 188]
-	ldr	x0, [x25, #:lo12:.LANCHOR53]
+	ldr	x0, [x25, #:lo12:.LANCHOR101]
 	strh	wzr, [x21, #:lo12:.LANCHOR84]
 	strh	wzr, [x20, #:lo12:.LANCHOR86]
 	strh	wzr, [x19, #:lo12:.LANCHOR82]
 	strh	wzr, [x0, 146]
 	ldrsh	w26, [x0, 134]
 	add	x0, x27, :lo12:.LANCHOR2
-	adrp	x27, .LC38
-	add	x27, x27, :lo12:.LC38
+	adrp	x27, .LC71
+	add	x27, x27, :lo12:.LC71
 	stp	x3, x2, [x29, 104]
 	stp	x4, x5, [x29, 120]
 	stp	x6, x7, [x29, 136]
 	stp	x8, x10, [x29, 152]
 	str	x0, [x29, 176]
-.L1059:
+.L1175:
 	ldr	x0, [x29, 176]
 	ldrh	w0, [x0]
 	cmp	w26, w0
-	blt	.L1075
-	ldr	x0, [x25, #:lo12:.LANCHOR53]
+	blt	.L1191
+	ldr	x0, [x25, #:lo12:.LANCHOR101]
 	ldrh	w1, [x24, #:lo12:.LANCHOR89]
 	ldp	x25, x26, [sp, 64]
 	strh	w1, [x0, 114]
@@ -6492,27 +6914,27 @@ zftl_sblk_list_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L1075:
+.L1191:
 	ldr	x4, [x28, #:lo12:.LANCHOR3]
 	sxtw	x2, w26
 	add	x4, x4, x2, lsl 2
 	ldrb	w6, [x4, 3]
-	cbz	w6, .L1076
+	cbz	w6, .L1192
 	ldr	x0, [x29, 112]
 	mov	w1, 0
-	ldr	x7, [x25, #:lo12:.LANCHOR53]
+	ldr	x7, [x25, #:lo12:.LANCHOR101]
 	ldrb	w8, [x0, #:lo12:.LANCHOR72]
 	ldr	x0, [x29, 104]
 	ldrh	w10, [x0, #:lo12:.LANCHOR80]
 	mov	w0, 0
-.L1061:
+.L1177:
 	cmp	w1, w8
-	blt	.L1064
-	cbz	w0, .L1065
+	blt	.L1180
+	cbz	w0, .L1181
 	mov	w1, 32768
 	sdiv	w0, w1, w0
 	sxth	w0, w0
-.L1060:
+.L1176:
 	ldr	x3, [x29, 168]
 	mov	w1, 6
 	smull	x1, w26, w1
@@ -6527,44 +6949,44 @@ zftl_sblk_list_init:
 	and	w0, w1, 224
 	cmp	w0, 32
 	ccmp	w0, w5, 4, ne
-	beq	.L1066
+	beq	.L1182
 	adrp	x5, .LANCHOR5
 	ldr	x5, [x5, #:lo12:.LANCHOR5]
 	ldrh	w6, [x5, 16]
 	cmp	w26, w6
-	beq	.L1066
+	beq	.L1182
 	ldrh	w6, [x5, 48]
 	cmp	w26, w6
-	beq	.L1066
+	beq	.L1182
 	ldrh	w5, [x5, 80]
 	cmp	w26, w5
-	beq	.L1066
+	beq	.L1182
 	cmp	w0, 64
-	bne	.L1067
+	bne	.L1183
 	ldr	x0, [x29, 128]
 	add	x2, x21, :lo12:.LANCHOR84
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR75
-.L1079:
+.L1195:
 	bl	_insert_data_list
-.L1066:
+.L1182:
 	add	w3, w26, 1
 	sxth	w26, w3
-	b	.L1059
-.L1064:
+	b	.L1175
+.L1180:
 	asr	w5, w6, w1
-	tbnz	x5, 0, .L1062
+	tbnz	x5, 0, .L1178
 	add	w0, w10, w0
 	sxth	w0, w0
-.L1063:
+.L1179:
 	add	w1, w1, 1
-	b	.L1061
-.L1062:
+	b	.L1177
+.L1178:
 	ldrh	w5, [x7, 146]
 	add	w5, w5, 1
 	strh	w5, [x7, 146]
-	b	.L1063
-.L1065:
+	b	.L1179
+.L1181:
 	ldrb	w1, [x4, 2]
 	mov	w5, -1
 	orr	w1, w1, -32
@@ -6572,75 +6994,75 @@ zftl_sblk_list_init:
 	adrp	x1, .LANCHOR4
 	ldr	x1, [x1, #:lo12:.LANCHOR4]
 	strh	w5, [x1, x2, lsl 1]
-	b	.L1060
-.L1076:
+	b	.L1176
+.L1192:
 	ldr	w0, [x29, 188]
-	b	.L1060
-.L1067:
+	b	.L1176
+.L1183:
 	cmp	w0, 96
-	bne	.L1068
+	bne	.L1184
 	ldr	x0, [x29, 136]
 	add	x2, x19, :lo12:.LANCHOR82
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR76
-	b	.L1079
-.L1068:
+	b	.L1195
+.L1184:
 	cmp	w0, 160
-	bne	.L1069
+	bne	.L1185
 	ldr	x0, [x29, 120]
 	add	x2, x20, :lo12:.LANCHOR86
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR74
-	b	.L1079
-.L1069:
-	cbnz	w0, .L1066
+	b	.L1195
+.L1185:
+	cbnz	w0, .L1182
 	adrp	x0, .LANCHOR4
 	ldr	x0, [x0, #:lo12:.LANCHOR4]
 	ldrh	w2, [x0, x2, lsl 1]
-	cbz	w2, .L1070
+	cbz	w2, .L1186
 	str	x4, [x29, 96]
 	mov	w1, w26
 	mov	x0, x27
 	bl	printf
 	ldr	x4, [x29, 96]
 	ldrb	w0, [x4, 2]
-	tbz	x0, 4, .L1071
+	tbz	x0, 4, .L1187
 	mov	w1, 5
-.L1078:
+.L1194:
 	bfi	w0, w1, 5, 3
 	strb	w0, [x4, 2]
 	mov	w2, 0
 	mov	w1, 1
 	mov	w0, w26
 	bl	gc_add_sblk
-	b	.L1066
-.L1071:
+	b	.L1182
+.L1187:
 	mov	w1, 2
-	b	.L1078
-.L1070:
+	b	.L1194
+.L1186:
 	ands	w1, w1, 24
-	bne	.L1073
+	bne	.L1189
 	ldr	x0, [x29, 160]
 	add	x2, x24, :lo12:.LANCHOR89
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR90
-.L1080:
+.L1196:
 	bl	_insert_free_list
-	b	.L1066
-.L1073:
+	b	.L1182
+.L1189:
 	cmp	w1, 16
-	bne	.L1074
+	bne	.L1190
 	ldr	x0, [x29, 152]
 	add	x2, x23, :lo12:.LANCHOR91
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR92
-	b	.L1080
-.L1074:
+	b	.L1196
+.L1190:
 	ldr	x0, [x29, 144]
 	add	x2, x22, :lo12:.LANCHOR93
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR94
-	b	.L1080
+	b	.L1196
 	.size	zftl_sblk_list_init, .-zftl_sblk_list_init
 	.section	.text.ftl_open_sblk_init,"ax",@progbits
 	.align	2
@@ -6654,15 +7076,15 @@ ftl_open_sblk_init:
 	stp	x21, x22, [sp, 32]
 	mov	x19, x0
 	stp	x23, x24, [sp, 48]
-	adrp	x21, .LC31
+	adrp	x21, .LC64
 	adrp	x23, .LANCHOR80
 	mov	w22, w1
 	add	x23, x23, :lo12:.LANCHOR80
 	add	x20, x20, :lo12:.LANCHOR72
-	add	x21, x21, :lo12:.LC31
+	add	x21, x21, :lo12:.LC64
 	stp	x25, x26, [sp, 64]
-.L1082:
-.L1085:
+.L1198:
+.L1201:
 	mov	w0, w22
 	bl	ftl_alloc_sblk
 	mov	w1, 0
@@ -6682,18 +7104,18 @@ ftl_open_sblk_init:
 	strh	w0, [x19, 6]
 	strh	wzr, [x19, 10]
 	strb	w22, [x19, 4]
-	beq	.L1086
+	beq	.L1202
 	ldrb	w0, [x20]
 	mul	w0, w1, w0
 	and	w0, w0, 65535
-.L1083:
+.L1199:
 	ldrb	w2, [x20]
 	adrp	x26, .LANCHOR4
 	strh	w0, [x19, 12]
 	ubfiz	x25, x24, 1, 16
 	mul	w2, w2, w1
-	adrp	x1, .LANCHOR105
-	ldr	x3, [x1, #:lo12:.LANCHOR105]
+	adrp	x1, .LANCHOR106
+	ldr	x3, [x1, #:lo12:.LANCHOR106]
 	mov	w1, 255
 	lsl	w2, w2, 2
 	add	x0, x3, x0, uxth 2
@@ -6702,7 +7124,7 @@ ftl_open_sblk_init:
 	ldrh	w1, [x19, 6]
 	strh	w1, [x0, x25]
 	ldrb	w0, [x19, 9]
-	cbnz	w0, .L1081
+	cbnz	w0, .L1197
 	mov	w1, w24
 	mov	x0, x21
 	bl	printf
@@ -6711,11 +7133,11 @@ ftl_open_sblk_init:
 	strh	w1, [x0, x25]
 	mov	w0, 7
 	strb	w0, [x19, 4]
-	b	.L1085
-.L1086:
+	b	.L1201
+.L1202:
 	mov	w0, 0
-	b	.L1083
-.L1081:
+	b	.L1199
+.L1197:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -6731,66 +7153,63 @@ pm_free_sblk:
 	stp	x29, x30, [sp, -368]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR127
+	adrp	x20, .LANCHOR131
 	stp	x21, x22, [sp, 32]
-	ldrh	w0, [x20, #:lo12:.LANCHOR127]
+	ldrh	w0, [x20, #:lo12:.LANCHOR131]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w0, 128
 	stp	x27, x28, [sp, 80]
-	bls	.L1089
-	adrp	x1, .LANCHOR128
+	bls	.L1205
+	adrp	x1, .LANCHOR132
 	adrp	x0, .LC0
-	mov	w2, 74
-	add	x1, x1, :lo12:.LANCHOR128
+	mov	w2, 76
+	add	x1, x1, :lo12:.LANCHOR132
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1090:
-	b	.L1090
-.L1089:
-	add	x23, x29, 112
+.L1205:
+	add	x28, x29, 112
 	mov	w2, 256
 	mov	w1, 0
-	mov	x0, x23
+	mov	x0, x28
 	bl	ftl_memset
-	adrp	x24, .LANCHOR53
+	adrp	x23, .LANCHOR95
+	adrp	x5, .LANCHOR101
 	adrp	x0, .LANCHOR96
 	mov	w2, 21
-	ldr	x5, [x24, #:lo12:.LANCHOR53]
-	ldrh	w8, [x0, #:lo12:.LANCHOR96]
-	ldrh	w11, [x20, #:lo12:.LANCHOR127]
-	add	x4, x5, 704
-	sub	w0, w2, w8
+	ldrb	w12, [x23, #:lo12:.LANCHOR95]
+	ldr	x7, [x5, #:lo12:.LANCHOR101]
+	ldrh	w11, [x0, #:lo12:.LANCHOR96]
+	ldrh	w13, [x20, #:lo12:.LANCHOR131]
+	add	x4, x7, 704
+	sub	w0, w2, w11
 	mov	w2, 1
-	ldrh	w1, [x5, 698]
+	ldrh	w1, [x7, 698]
 	lsl	w2, w2, w0
-	adrp	x0, .LANCHOR95
-	add	x1, x1, 176
 	sub	w2, w2, #1
-	ldrb	w10, [x0, #:lo12:.LANCHOR95]
-	add	x1, x5, x1, lsl 2
-	mov	x27, x0
-.L1091:
+	add	x1, x1, 176
+	add	x1, x7, x1, lsl 2
+.L1206:
 	cmp	x4, x1
-	bne	.L1095
-	adrp	x1, .LANCHOR72
-	adrp	x0, .LANCHOR80
-	add	x20, x20, :lo12:.LANCHOR127
-	add	x27, x27, :lo12:.LANCHOR95
-	ldrh	w2, [x0, #:lo12:.LANCHOR80]
-	add	x26, x1, :lo12:.LANCHOR72
-	ldrb	w21, [x1, #:lo12:.LANCHOR72]
-	add	x25, x0, :lo12:.LANCHOR80
-	mov	w28, 0
+	bne	.L1210
+	adrp	x24, .LANCHOR72
+	adrp	x25, .LANCHOR80
+	adrp	x26, .LANCHOR7
+	adrp	x27, .LC72
+	ldrb	w22, [x24, #:lo12:.LANCHOR72]
+	add	x20, x20, :lo12:.LANCHOR131
+	ldrh	w0, [x25, #:lo12:.LANCHOR80]
+	add	x26, x26, :lo12:.LANCHOR7
+	add	x27, x27, :lo12:.LC72
 	mov	w19, 0
-	mul	w21, w21, w2
-	mov	w2, 65535
-	and	w21, w21, 65535
-.L1096:
+	str	wzr, [x29, 108]
+	mul	w22, w22, w0
+	and	w22, w22, 65535
+.L1211:
 	ldrh	w0, [x20]
 	cmp	w0, w19
-	bhi	.L1101
-	mov	w0, w28
+	bhi	.L1217
+	ldr	w0, [x29, 108]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -6798,74 +7217,103 @@ pm_free_sblk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 368
 	ret
-.L1095:
+.L1210:
 	ldr	w0, [x4]
-	add	x6, x5, 416
+	add	x8, x7, 416
 	mov	x3, 0
-	lsr	w0, w0, w8
+	lsr	w0, w0, w11
 	and	w0, w0, w2
-	udiv	w0, w0, w10
+	udiv	w0, w0, w12
 	and	w0, w0, 65535
-.L1092:
-	cmp	w11, w3, uxth
-	bhi	.L1094
+.L1207:
+	cmp	w13, w3, uxth
+	bhi	.L1209
 	add	x4, x4, 4
-	b	.L1091
-.L1094:
-	ldrh	w7, [x6]
-	cmp	w7, w0
-	bne	.L1093
-	ldrh	w7, [x23, x3, lsl 1]
-	add	w7, w7, 1
-	strh	w7, [x23, x3, lsl 1]
-.L1093:
+	b	.L1206
+.L1209:
+	ldrh	w10, [x8]
+	cmp	w10, w0
+	bne	.L1208
+	ldrh	w10, [x28, x3, lsl 1]
+	add	w10, w10, 1
+	strh	w10, [x28, x3, lsl 1]
+.L1208:
 	add	x3, x3, 1
-	add	x6, x6, 2
-	b	.L1092
-.L1101:
-	ldr	x1, [x24, #:lo12:.LANCHOR53]
-	sxtw	x22, w19
-	add	x0, x22, 208
-	ldrb	w3, [x27]
-	ldrh	w0, [x1, x0, lsl 1]
-	ldrh	w1, [x1, 692]
-	sdiv	w1, w1, w3
-	cmp	w1, w0
-	bne	.L1097
-	ldrb	w1, [x26]
-	ldrh	w3, [x25]
-	mul	w1, w1, w3
-	strh	w1, [x23, x22, lsl 1]
-.L1097:
-	ldrh	w1, [x23, x22, lsl 1]
-	cmp	w21, w1
-	bls	.L1098
-	cbnz	w1, .L1102
-.L1100:
-	cmp	w0, w2
-	beq	.L1099
-	str	w2, [x29, 108]
+	add	x8, x8, 2
+	b	.L1207
+.L1217:
+	ldr	x1, [x5, #:lo12:.LANCHOR101]
+	sxtw	x21, w19
+	add	x0, x21, 208
+	ldrb	w2, [x23, #:lo12:.LANCHOR95]
+	ldrh	w3, [x1, x0, lsl 1]
+	ldrh	w0, [x1, 692]
+	sdiv	w0, w0, w2
+	cmp	w0, w3
+	bne	.L1212
+	ldrb	w0, [x24, #:lo12:.LANCHOR72]
+	ldrh	w2, [x25, #:lo12:.LANCHOR80]
+	mul	w0, w0, w2
+	strh	w0, [x28, x21, lsl 1]
+.L1212:
+	ldrh	w0, [x28, x21, lsl 1]
+	cmp	w22, w0
+	bls	.L1213
+	cbnz	w0, .L1218
+.L1215:
+	mov	w0, 65535
+	cmp	w3, w0
+	beq	.L1214
+	ldr	w0, [x26]
+	tbz	x0, 12, .L1216
+	ldrh	w4, [x1, 688]
+	mov	w2, 0
+	str	x5, [x29, 96]
+	mov	w1, w19
+	mov	x0, x27
+	bl	printf
+	ldr	x5, [x29, 96]
+.L1216:
+	ldr	x0, [x5, #:lo12:.LANCHOR101]
+	add	x21, x21, 208
+	str	x5, [x29, 96]
+	ldrh	w0, [x0, x21, lsl 1]
 	bl	ftl_free_sblk
-	ldr	x0, [x24, #:lo12:.LANCHOR53]
-	add	x22, x22, 208
+	ldr	x5, [x29, 96]
 	mov	w1, -1
-	ldr	w2, [x29, 108]
-	strh	w1, [x0, x22, lsl 1]
+	ldr	x0, [x5, #:lo12:.LANCHOR101]
+	strh	w1, [x0, x21, lsl 1]
 	ldrh	w1, [x0, 688]
 	sub	w1, w1, #1
 	strh	w1, [x0, 688]
-	b	.L1099
-.L1098:
-	cbz	w1, .L1100
-.L1099:
+	b	.L1214
+.L1213:
+	cbz	w0, .L1215
+.L1214:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1096
-.L1102:
-	mov	w28, w19
-	mov	w21, w1
-	b	.L1099
+	b	.L1211
+.L1218:
+	mov	w22, w0
+	str	w19, [x29, 108]
+	b	.L1214
 	.size	pm_free_sblk, .-pm_free_sblk
+	.section	.text.idb_init,"ax",@progbits
+	.align	2
+	.global	idb_init
+	.type	idb_init, %function
+idb_init:
+	stp	x29, x30, [sp, -16]!
+	mov	w2, 262144
+	mov	w1, 0
+	adrp	x0, idb_buf
+	add	x29, sp, 0
+	add	x0, x0, :lo12:idb_buf
+	bl	ftl_memset
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	idb_init, .-idb_init
 	.section	.text.ftl_memcpy,"ax",@progbits
 	.align	2
 	.global	ftl_memcpy
@@ -6880,14 +7328,24 @@ ftl_memcpy:
 	.type	flash_into_data_init, %function
 flash_into_data_init:
 	stp	x29, x30, [sp, -32]!
-	mov	w2, 2048
-	mov	w1, 0
+	adrp	x0, .LANCHOR7
 	add	x29, sp, 0
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
 	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR12
-	ldr	x0, [x19, #:lo12:.LANCHOR12]
+	tbz	x0, 12, .L1227
+	adrp	x2, .LANCHOR133
+	adrp	x0, .LC73
+	add	x2, x2, :lo12:.LANCHOR133
+	mov	w1, 100
+	add	x0, x0, :lo12:.LC73
+	bl	printf
+.L1227:
+	adrp	x19, .LANCHOR20
+	mov	w2, 2048
+	mov	w1, 0
+	ldr	x0, [x19, #:lo12:.LANCHOR20]
 	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR12]
+	ldr	x0, [x19, #:lo12:.LANCHOR20]
 	mov	w1, 21321
 	movk	w1, 0x5359, lsl 16
 	mov	w2, 32
@@ -6897,15 +7355,15 @@ flash_into_data_init:
 	str	w1, [x0, -72]
 	mov	w1, 1
 	strh	w1, [x0, -64]
-	adrp	x1, .LANCHOR129
-	add	x1, x1, :lo12:.LANCHOR129
+	adrp	x1, .LANCHOR13
+	add	x1, x1, :lo12:.LANCHOR13
 	bl	ftl_memcpy
-	ldr	x0, [x19, #:lo12:.LANCHOR12]
+	ldr	x0, [x19, #:lo12:.LANCHOR20]
 	mov	w2, 32
 	ldr	x19, [sp, 16]
-	adrp	x1, .LANCHOR26
+	adrp	x1, .LANCHOR32
 	ldp	x29, x30, [sp], 32
-	add	x1, x1, :lo12:.LANCHOR26
+	add	x1, x1, :lo12:.LANCHOR32
 	add	x0, x0, 48
 	b	ftl_memcpy
 	.size	flash_into_data_init, .-flash_into_data_init
@@ -6915,15 +7373,15 @@ flash_into_data_init:
 	.type	ftl_memcpy32, %function
 ftl_memcpy32:
 	mov	x3, 0
-.L1108:
+.L1233:
 	cmp	w2, w3
-	bhi	.L1109
+	bhi	.L1234
 	ret
-.L1109:
+.L1234:
 	ldr	w4, [x1, x3, lsl 2]
 	str	w4, [x0, x3, lsl 2]
 	add	x3, x3, 1
-	b	.L1108
+	b	.L1233
 	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.ftl_memcmp,"ax",@progbits
 	.align	2
@@ -6956,87 +7414,129 @@ ftl_malloc:
 	.global	nandc_init
 	.type	nandc_init, %function
 nandc_init:
-	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LANCHOR14
-	mov	w2, 6
+	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
-	strb	w2, [x1, #:lo12:.LANCHOR14]
-	adrp	x2, .LANCHOR13
-	str	wzr, [x29, 24]
-	str	x0, [x2, #:lo12:.LANCHOR13]
-	mov	w2, 12336
-	ldr	w3, [x0, 352]
-	movk	w2, 0x5638, lsl 16
-	cmp	w3, w2
-	bne	.L1114
-	mov	w2, 8
-	strb	w2, [x1, #:lo12:.LANCHOR14]
-.L1114:
-	ldr	w3, [x0, 128]
-	mov	w2, 12336
-	movk	w2, 0x5639, lsl 16
-	cmp	w3, w2
-	bne	.L1115
-	mov	w2, 9
-	strb	w2, [x1, #:lo12:.LANCHOR14]
-.L1115:
-	ldrb	w1, [x1, #:lo12:.LANCHOR14]
-	cmp	w1, 9
-	adrp	x1, .LANCHOR35
-	bne	.L1116
-	mov	w2, 1
-	strb	w2, [x1, #:lo12:.LANCHOR35]
-	ldr	w1, [x29, 24]
-	orr	w1, w1, 256
-	str	w1, [x29, 24]
-	ldr	w1, [x29, 24]
-	str	w1, [x0]
-	str	wzr, [x0, 520]
-	mov	w1, 4225
-	str	w1, [x0, 4]
-	mov	w1, 8321
-	str	w1, [x0, 8]
-	mov	w1, 4099
-	movk	w1, 0x10, lsl 16
-	str	w1, [x0, 80]
-	mov	w1, 38
-	str	w1, [x0, 84]
-	mov	w1, 39
-	str	w1, [x0, 84]
-.L1117:
-	adrp	x0, .LANCHOR36
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR7
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	ldr	w0, [x21, #:lo12:.LANCHOR7]
+	str	wzr, [x29, 56]
+	tbz	x0, 12, .L1239
+	adrp	x1, .LANCHOR134
+	adrp	x0, .LC74
+	mov	x2, x19
+	add	x1, x1, :lo12:.LANCHOR134
+	add	x0, x0, :lo12:.LC74
+	bl	printf
+.L1239:
+	adrp	x20, .LANCHOR22
+	mov	w0, 6
+	ldr	w2, [x19, 352]
+	mov	w1, 12336
+	strb	w0, [x20, #:lo12:.LANCHOR22]
+	adrp	x0, .LANCHOR21
+	movk	w1, 0x5638, lsl 16
+	mov	x22, x0
+	str	x19, [x0, #:lo12:.LANCHOR21]
+	cmp	w2, w1
+	bne	.L1240
+	mov	w0, 8
+	strb	w0, [x20, #:lo12:.LANCHOR22]
+.L1240:
+	ldr	w1, [x19, 128]
+	mov	w0, 12336
+	movk	w0, 0x5639, lsl 16
+	cmp	w1, w0
+	bne	.L1241
+	mov	w0, 9
+	strb	w0, [x20, #:lo12:.LANCHOR22]
+.L1241:
+	ldrb	w0, [x20, #:lo12:.LANCHOR22]
+	cmp	w0, 9
+	adrp	x0, .LANCHOR41
+	bne	.L1242
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR36]
-	adrp	x0, .LANCHOR38
-	strh	wzr, [x0, #:lo12:.LANCHOR38]
-	adrp	x0, .LANCHOR34
-	strb	wzr, [x0, #:lo12:.LANCHOR34]
-	ldp	x29, x30, [sp], 32
+	strb	w1, [x0, #:lo12:.LANCHOR41]
+	ldr	w0, [x29, 56]
+	orr	w0, w0, 256
+	str	w0, [x29, 56]
+	ldr	w0, [x29, 56]
+	str	w0, [x19]
+	str	wzr, [x19, 520]
+	mov	w0, 4225
+	str	w0, [x19, 4]
+	mov	w0, 8321
+	str	w0, [x19, 8]
+	mov	w0, 4099
+	movk	w0, 0x10, lsl 16
+	str	w0, [x19, 80]
+	mov	w0, 38
+	str	w0, [x19, 84]
+	mov	w0, 39
+	str	w0, [x19, 84]
+	ldr	w0, [x21, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L1244
+	ldr	w1, [x19]
+	ldr	w2, [x19, 8]
+	ldr	w3, [x19, 80]
+	ldr	w4, [x19, 84]
+	ldr	w5, [x19, 88]
+.L1257:
+	adrp	x0, .LC75
+	add	x0, x0, :lo12:.LC75
+	bl	printf
+.L1244:
+	adrp	x0, .LANCHOR42
+	mov	w1, 1
+	strb	w1, [x0, #:lo12:.LANCHOR42]
+	adrp	x0, .LANCHOR44
+	strh	wzr, [x0, #:lo12:.LANCHOR44]
+	adrp	x0, .LANCHOR40
+	strb	wzr, [x0, #:lo12:.LANCHOR40]
+	ldr	w0, [x21, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L1238
+	ldrb	w1, [x20, #:lo12:.LANCHOR22]
+	adrp	x0, .LC76
+	add	x0, x0, :lo12:.LC76
+	bl	printf
+.L1238:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
 	ret
-.L1116:
-	strb	wzr, [x1, #:lo12:.LANCHOR35]
-	ldr	w1, [x29, 24]
-	orr	w1, w1, 256
-	str	w1, [x29, 24]
-	ldr	w1, [x29, 24]
-	str	w1, [x0]
-	str	wzr, [x0, 336]
-	mov	w1, 4225
-	str	w1, [x0, 4]
-	mov	w1, 8321
-	str	w1, [x0, 344]
-	mov	w1, 4099
-	movk	w1, 0x10, lsl 16
-	str	w1, [x0, 304]
-	mov	w1, 38
-	str	w1, [x0, 308]
-	mov	w1, 39
-	str	w1, [x0, 308]
+.L1242:
+	strb	wzr, [x0, #:lo12:.LANCHOR41]
+	ldr	w0, [x29, 56]
+	orr	w0, w0, 256
+	str	w0, [x29, 56]
+	ldr	w0, [x29, 56]
+	str	w0, [x19]
+	str	wzr, [x19, 336]
+	mov	w0, 4225
+	str	w0, [x19, 4]
+	mov	w0, 8321
+	str	w0, [x19, 344]
+	mov	w0, 4099
+	movk	w0, 0x10, lsl 16
+	str	w0, [x19, 304]
+	mov	w0, 38
+	str	w0, [x19, 308]
+	mov	w0, 39
+	str	w0, [x19, 308]
 	mov	w0, 2048
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR37
-	str	x0, [x1, #:lo12:.LANCHOR37]
-	b	.L1117
+	adrp	x1, .LANCHOR43
+	str	x0, [x1, #:lo12:.LANCHOR43]
+	ldr	w0, [x21, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L1244
+	ldr	x0, [x22, #:lo12:.LANCHOR21]
+	ldr	w1, [x0]
+	ldr	w2, [x0, 344]
+	ldr	w3, [x0, 304]
+	ldr	w4, [x0, 308]
+	ldr	w5, [x0, 312]
+	b	.L1257
 	.size	nandc_init, .-nandc_init
 	.section	.text.buf_init,"ax",@progbits
 	.align	2
@@ -7044,16 +7544,16 @@ nandc_init:
 	.type	buf_init, %function
 buf_init:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LANCHOR43
+	adrp	x0, .LANCHOR46
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	add	x19, x0, :lo12:.LANCHOR43
+	add	x19, x0, :lo12:.LANCHOR46
 	stp	x21, x22, [sp, 32]
 	mov	x20, x0
-	adrp	x22, .LANCHOR52
-	add	x22, x22, :lo12:.LANCHOR52
+	adrp	x22, .LANCHOR114
+	add	x22, x22, :lo12:.LANCHOR114
 	mov	w21, 0
-.L1120:
+.L1259:
 	and	w0, w21, 255
 	strb	w0, [x19, 1]
 	add	w1, w0, 1
@@ -7071,15 +7571,15 @@ buf_init:
 	bl	ftl_malloc
 	str	x0, [x19, -40]
 	cmp	w21, 32
-	bne	.L1120
-	add	x0, x20, :lo12:.LANCHOR43
+	bne	.L1259
+	add	x0, x20, :lo12:.LANCHOR46
 	mov	w1, -1
 	strb	w1, [x0, 1984]
-	adrp	x0, .LANCHOR44
-	strb	wzr, [x0, #:lo12:.LANCHOR44]
-	adrp	x0, .LANCHOR45
+	adrp	x0, .LANCHOR47
+	strb	wzr, [x0, #:lo12:.LANCHOR47]
+	adrp	x0, .LANCHOR48
 	ldp	x19, x20, [sp, 16]
-	strb	w21, [x0, #:lo12:.LANCHOR45]
+	strb	w21, [x0, #:lo12:.LANCHOR48]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
@@ -7095,11 +7595,11 @@ gc_init:
 	mov	w1, 0
 	add	x29, sp, 0
 	strb	wzr, [x0, #:lo12:.LANCHOR70]
-	adrp	x0, .LANCHOR130
+	adrp	x0, .LANCHOR135
 	stp	x19, x20, [sp, 16]
 	adrp	x20, .LANCHOR63
 	add	x19, x20, :lo12:.LANCHOR63
-	strb	wzr, [x0, #:lo12:.LANCHOR130]
+	strb	wzr, [x0, #:lo12:.LANCHOR135]
 	mov	x0, x19
 	bl	ftl_memset
 	mov	w0, -1
@@ -7135,15 +7635,15 @@ gc_init:
 	mul	w0, w0, w3
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR131
-	str	x0, [x1, #:lo12:.LANCHOR131]
+	adrp	x1, .LANCHOR136
+	str	x0, [x1, #:lo12:.LANCHOR136]
 	ldrb	w1, [x19, #:lo12:.LANCHOR72]
 	ldrh	w0, [x20, #:lo12:.LANCHOR71]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR132
-	str	x0, [x1, #:lo12:.LANCHOR132]
+	adrp	x1, .LANCHOR137
+	str	x0, [x1, #:lo12:.LANCHOR137]
 	ldrh	w1, [x20, #:lo12:.LANCHOR71]
 	ldrb	w0, [x19, #:lo12:.LANCHOR72]
 	mul	w0, w1, w0
@@ -7162,9 +7662,9 @@ gc_init:
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR133
+	adrp	x1, .LANCHOR138
 	ldp	x19, x20, [sp, 16]
-	str	x0, [x1, #:lo12:.LANCHOR133]
+	str	x0, [x1, #:lo12:.LANCHOR138]
 	adrp	x0, .LANCHOR83
 	ldp	x29, x30, [sp], 32
 	ldrh	w1, [x0, #:lo12:.LANCHOR83]
@@ -7188,18 +7688,18 @@ js_hash:
 	mov	w0, 42982
 	mov	x3, 0
 	movk	w0, 0x47c6, lsl 16
-.L1127:
+.L1266:
 	cmp	w1, w3
-	bhi	.L1128
+	bhi	.L1267
 	ret
-.L1128:
+.L1267:
 	lsr	w2, w0, 2
 	ldrb	w5, [x4, x3]
 	add	w2, w2, w0, lsl 5
 	add	x3, x3, 1
 	add	w2, w2, w5
 	eor	w0, w0, w2
-	b	.L1127
+	b	.L1266
 	.size	js_hash, .-js_hash
 	.section	.text.timer_get_time,"ax",@progbits
 	.align	2
@@ -7248,67 +7748,67 @@ rknand_print_hex:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LC40
+	adrp	x21, .LC78
 	stp	x23, x24, [sp, 48]
 	mov	x22, x1
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LC39
+	adrp	x23, .LC77
 	mov	x26, x0
 	mov	w24, w2
 	uxtw	x25, w3
-	add	x23, x23, :lo12:.LC39
-	add	x21, x21, :lo12:.LC40
+	add	x23, x23, :lo12:.LC77
+	add	x21, x21, :lo12:.LC78
 	stp	x19, x20, [sp, 16]
 	str	x27, [sp, 80]
 	mov	x19, 0
 	mov	w20, 0
-	adrp	x27, .LC41
-.L1135:
+	adrp	x27, .LC79
+.L1274:
 	cmp	x25, x19
-	bne	.L1141
+	bne	.L1280
 	ldp	x19, x20, [sp, 16]
-	adrp	x1, .LC41
+	adrp	x1, .LC79
 	ldp	x21, x22, [sp, 32]
-	add	x1, x1, :lo12:.LC41
+	add	x1, x1, :lo12:.LC79
 	ldp	x23, x24, [sp, 48]
-	adrp	x0, .LC42
+	adrp	x0, .LC80
 	ldp	x25, x26, [sp, 64]
-	add	x0, x0, :lo12:.LC42
+	add	x0, x0, :lo12:.LC80
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	printf
-.L1141:
-	cbnz	w20, .L1136
+.L1280:
+	cbnz	w20, .L1275
 	mov	w2, w19
 	mov	x1, x26
 	mov	x0, x23
 	bl	printf
-.L1136:
+.L1275:
 	cmp	w24, 4
-	bne	.L1137
+	bne	.L1276
 	ldr	w1, [x22, x19, lsl 2]
-.L1143:
+.L1282:
 	mov	x0, x21
 	add	w20, w20, 1
 	bl	printf
 	cmp	w20, 15
-	bls	.L1140
+	bls	.L1279
 	mov	w20, 0
-	add	x1, x27, :lo12:.LC41
-	adrp	x0, .LC42
-	add	x0, x0, :lo12:.LC42
+	add	x1, x27, :lo12:.LC79
+	adrp	x0, .LC80
+	add	x0, x0, :lo12:.LC80
 	bl	printf
-.L1140:
+.L1279:
 	add	x19, x19, 1
-	b	.L1135
-.L1137:
+	b	.L1274
+.L1276:
 	cmp	w24, 2
-	bne	.L1139
+	bne	.L1278
 	ldrsh	w1, [x22, x19, lsl 1]
-	b	.L1143
-.L1139:
+	b	.L1282
+.L1278:
 	ldrb	w1, [x22, x19]
-	b	.L1143
+	b	.L1282
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.hynix_get_read_retry_default,"ax",@progbits
 	.align	2
@@ -7322,9 +7822,9 @@ hynix_get_read_retry_default:
 	stp	x27, x28, [sp, 80]
 	stp	x21, x22, [sp, 32]
 	str	w0, [x29, 140]
-	adrp	x0, .LANCHOR12
+	adrp	x0, .LANCHOR20
 	stp	x19, x20, [sp, 16]
-	ldr	x28, [x0, #:lo12:.LANCHOR12]
+	ldr	x28, [x0, #:lo12:.LANCHOR20]
 	stp	x23, x24, [sp, 48]
 	add	x0, x28, 112
 	str	x0, [x29, 112]
@@ -7340,43 +7840,43 @@ hynix_get_read_retry_default:
 	cmp	w3, 2
 	strb	w1, [x28, 130]
 	strb	w0, [x28, 131]
-	bne	.L1145
+	bne	.L1284
 	mov	w0, -89
 	strb	w0, [x28, 128]
-	adrp	x0, .LANCHOR134+17
+	adrp	x0, .LANCHOR139+17
 	mov	w1, -9
-	strb	w1, [x0, #:lo12:.LANCHOR134+17]
-.L1200:
+	strb	w1, [x0, #:lo12:.LANCHOR139+17]
+.L1339:
 	mov	w0, 7
-	b	.L1235
-.L1145:
+	b	.L1374
+.L1284:
 	ldr	w3, [x29, 140]
 	cmp	w3, 3
-	bne	.L1147
+	bne	.L1286
 	mov	x6, 0
-.L1148:
+.L1287:
 	sub	w0, w6, #80
 	strb	w0, [x22, x6]
 	add	x6, x6, 1
 	cmp	x6, 8
-	bne	.L1148
+	bne	.L1287
 	stp	w6, w6, [x29, 132]
-.L1146:
+.L1285:
 	ldr	w0, [x29, 140]
 	sub	w0, w0, #1
 	cmp	w0, 1
-	bhi	.L1153
-	adrp	x7, .LANCHOR15
-	adrp	x11, .LANCHOR17
-	add	x24, x7, :lo12:.LANCHOR15
-	add	x25, x11, :lo12:.LANCHOR17
+	bhi	.L1292
+	adrp	x7, .LANCHOR12
+	adrp	x11, .LANCHOR24
+	add	x24, x7, :lo12:.LANCHOR12
+	add	x25, x11, :lo12:.LANCHOR24
 	mov	w20, 0
 	mov	w26, 55
-.L1154:
+.L1293:
 	ldrb	w0, [x24]
 	cmp	w0, w20
-	bhi	.L1160
-.L1161:
+	bhi	.L1299
+.L1300:
 	ldr	x0, [x29, 112]
 	ldrb	w1, [x29, 136]
 	strb	w1, [x0, 1]
@@ -7389,10 +7889,10 @@ hynix_get_read_retry_default:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1147:
+.L1286:
 	ldr	w3, [x29, 140]
 	cmp	w3, 4
-	bne	.L1149
+	bne	.L1288
 	mov	w3, -52
 	strb	w3, [x28, 128]
 	mov	w3, -65
@@ -7408,13 +7908,13 @@ hynix_get_read_retry_default:
 	strb	w3, [x28, 132]
 	strb	w1, [x28, 134]
 	str	w0, [x29, 132]
-.L1236:
+.L1375:
 	str	w0, [x29, 136]
-	b	.L1146
-.L1149:
+	b	.L1285
+.L1288:
 	ldr	w0, [x29, 140]
 	cmp	w0, 5
-	bne	.L1150
+	bne	.L1289
 	mov	w0, 56
 	strb	w0, [x28, 128]
 	mov	w0, 57
@@ -7424,14 +7924,14 @@ hynix_get_read_retry_default:
 	mov	w0, 59
 	strb	w0, [x28, 131]
 	mov	w0, 8
-.L1235:
+.L1374:
 	str	w0, [x29, 132]
 	mov	w0, 4
-	b	.L1236
-.L1150:
+	b	.L1375
+.L1289:
 	ldr	w0, [x29, 140]
 	cmp	w0, 6
-	bne	.L1151
+	bne	.L1290
 	mov	w0, 14
 	strb	w0, [x28, 128]
 	mov	w0, 15
@@ -7441,18 +7941,18 @@ hynix_get_read_retry_default:
 	mov	w0, 17
 	strb	w0, [x28, 131]
 	mov	w0, 12
-	b	.L1235
-.L1151:
+	b	.L1374
+.L1290:
 	ldr	w0, [x29, 140]
 	cmp	w0, 7
-	bne	.L1200
+	bne	.L1339
 	mov	x0, 0
-.L1152:
+.L1291:
 	sub	w1, w0, #80
 	strb	w1, [x22, x0]
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L1152
+	bne	.L1291
 	mov	w0, -44
 	strb	w0, [x28, 136]
 	mov	w0, -43
@@ -7460,8 +7960,8 @@ hynix_get_read_retry_default:
 	mov	w0, 12
 	str	w0, [x29, 132]
 	mov	w0, 10
-	b	.L1236
-.L1160:
+	b	.L1375
+.L1299:
 	ldrb	w0, [x25, w20, sxtw]
 	mov	x1, 32
 	mov	w2, 160
@@ -7470,10 +7970,10 @@ hynix_get_read_retry_default:
 	ldr	x1, [x29, 112]
 	ubfiz	x0, x0, 8, 8
 	add	x19, x1, x2
-	adrp	x1, .LANCHOR13
-	ldr	x4, [x1, #:lo12:.LANCHOR13]
+	adrp	x1, .LANCHOR21
+	ldr	x4, [x1, #:lo12:.LANCHOR21]
 	add	x23, x4, x0
-.L1155:
+.L1294:
 	str	w26, [x23, 2056]
 	ldrb	w0, [x22, x21]
 	str	w0, [x23, 2052]
@@ -7484,15 +7984,15 @@ hynix_get_read_retry_default:
 	add	x21, x21, 1
 	ldr	w0, [x29, 136]
 	cmp	w0, w21, uxtb
-	bhi	.L1155
-	adrp	x3, .LANCHOR134
-	add	x3, x3, :lo12:.LANCHOR134
+	bhi	.L1294
+	adrp	x3, .LANCHOR139
+	add	x3, x3, :lo12:.LANCHOR139
 	mov	x0, 0
-.L1158:
+.L1297:
 	add	x15, x19, x0
 	add	x14, x3, x0
 	mov	x1, 1
-.L1157:
+.L1296:
 	lsl	x4, x1, 2
 	lsl	x16, x1, 3
 	ldrb	w17, [x19, x0]
@@ -7501,10 +8001,10 @@ hynix_get_read_retry_default:
 	ldrb	w4, [x14, x4]
 	add	w4, w4, w17
 	strb	w4, [x15, x16]
-	bne	.L1157
+	bne	.L1296
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L1158
+	bne	.L1297
 	add	w5, w20, 1
 	strb	wzr, [x19, 16]
 	strb	wzr, [x19, 24]
@@ -7514,15 +8014,15 @@ hynix_get_read_retry_default:
 	strb	wzr, [x19, 48]
 	strb	wzr, [x19, 41]
 	strb	wzr, [x19, 49]
-	b	.L1154
-.L1153:
+	b	.L1293
+.L1292:
 	ldr	w0, [x29, 140]
 	sub	w0, w0, #3
 	cmp	w0, 4
-	bhi	.L1161
+	bhi	.L1300
 	ldp	w0, w1, [x29, 132]
-	adrp	x19, .LANCHOR15
-	add	x19, x19, :lo12:.LANCHOR15
+	adrp	x19, .LANCHOR12
+	add	x19, x19, :lo12:.LANCHOR12
 	sub	w13, w1, #1
 	mul	w15, w0, w1
 	and	x13, x13, 255
@@ -7537,14 +8037,14 @@ hynix_get_read_retry_default:
 	sub	w20, w0, #5
 	add	x0, x13, 1
 	str	x0, [x29, 96]
-.L1162:
+.L1301:
 	ldrb	w0, [x19]
 	ldr	w1, [x29, 128]
 	cmp	w0, w1
-	bls	.L1161
+	bls	.L1300
 	ldr	w1, [x29, 128]
-	adrp	x0, .LANCHOR17
-	add	x0, x0, :lo12:.LANCHOR17
+	adrp	x0, .LANCHOR24
+	add	x0, x0, :lo12:.LANCHOR24
 	mov	w10, 160
 	mov	w23, 255
 	ldrb	w4, [x0, w1, sxtw]
@@ -7554,8 +8054,8 @@ hynix_get_read_retry_default:
 	ubfiz	x4, x4, 8, 8
 	add	x0, x0, x10
 	str	x0, [x29, 104]
-	adrp	x0, .LANCHOR13
-	ldr	x0, [x0, #:lo12:.LANCHOR13]
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	add	x27, x0, x4
 	str	w23, [x27, 2056]
 	bl	nandc_wait_flash_ready
@@ -7563,22 +8063,22 @@ hynix_get_read_retry_default:
 	str	w0, [x27, 2056]
 	ldr	w0, [x29, 140]
 	cmp	w0, 4
-	bne	.L1163
+	bne	.L1302
 	mov	w0, 64
 	str	w23, [x27, 2052]
 	str	w0, [x27, 2048]
 	mov	w0, 204
-.L1237:
+.L1376:
 	str	w0, [x27, 2052]
 	mov	w0, 77
-	b	.L1238
-.L1163:
+	b	.L1377
+.L1302:
 	cmp	w20, 1
-	bhi	.L1165
+	bhi	.L1304
 	ldrb	w0, [x28, 128]
 	str	w0, [x27, 2052]
 	mov	w0, 82
-.L1238:
+.L1377:
 	str	w0, [x27, 2048]
 	mov	w0, 22
 	str	w0, [x27, 2056]
@@ -7593,10 +8093,10 @@ hynix_get_read_retry_default:
 	ldr	w0, [x29, 140]
 	str	wzr, [x27, 2052]
 	cmp	w0, 6
-	bne	.L1166
+	bne	.L1305
 	mov	w0, 31
 	str	w0, [x27, 2052]
-.L1167:
+.L1306:
 	mov	w23, 2
 	str	w23, [x27, 2052]
 	str	wzr, [x27, 2052]
@@ -7604,192 +8104,192 @@ hynix_get_read_retry_default:
 	str	w0, [x27, 2056]
 	bl	nandc_wait_flash_ready
 	cmp	w20, 1
-	bls	.L1201
+	bls	.L1340
 	ldr	w0, [x29, 140]
 	cmp	w0, 7
 	mov	w0, 32
 	csel	w23, w23, w0, ne
-.L1168:
-	adrp	x3, .LANCHOR135
+.L1307:
+	adrp	x3, .LANCHOR140
 	mov	x1, 0
-	ldr	x0, [x3, #:lo12:.LANCHOR135]
-.L1169:
+	ldr	x0, [x3, #:lo12:.LANCHOR140]
+.L1308:
 	ldr	w2, [x27, 2048]
 	strb	w2, [x0, x1]
 	add	x1, x1, 1
 	cmp	w23, w1, uxtb
-	bhi	.L1169
+	bhi	.L1308
 	ldr	w1, [x29, 140]
 	cmp	w1, 7
-	bne	.L1170
+	bne	.L1309
 	mov	w1, 0
-.L1172:
+.L1311:
 	ldrb	w2, [x0]
 	cmp	w2, 12
-	beq	.L1171
+	beq	.L1310
 	ldrb	w2, [x0, 1]
 	cmp	w2, 10
-	beq	.L1171
+	beq	.L1310
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 255
 	cmp	w1, 8
-	bne	.L1172
-.L1173:
-	adrp	x0, .LC43
+	bne	.L1311
+.L1312:
+	adrp	x0, .LC81
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC43
+	add	x0, x0, :lo12:.LC81
 	bl	printf
-.L1175:
-	b	.L1175
-.L1165:
+.L1314:
+	b	.L1314
+.L1304:
 	mov	w0, 174
 	str	w0, [x27, 2052]
 	str	wzr, [x27, 2048]
 	mov	w0, 176
-	b	.L1237
-.L1166:
+	b	.L1376
+.L1305:
 	str	wzr, [x27, 2052]
-	b	.L1167
-.L1201:
+	b	.L1306
+.L1340:
 	mov	w23, 16
-	b	.L1168
-.L1171:
+	b	.L1307
+.L1310:
 	cmp	w1, 6
-	bhi	.L1173
-.L1174:
-	ldr	x2, [x3, #:lo12:.LANCHOR135]
+	bhi	.L1312
+.L1313:
+	ldr	x2, [x3, #:lo12:.LANCHOR140]
 	mov	x0, 0
-.L1179:
+.L1318:
 	ldr	w1, [x29, 120]
 	cmp	w1, w0
-	bgt	.L1180
-	ldr	x1, [x3, #:lo12:.LANCHOR135]
+	bgt	.L1319
+	ldr	x1, [x3, #:lo12:.LANCHOR140]
 	mov	w16, 8
 	add	x3, x1, x21
-.L1182:
+.L1321:
 	mov	x0, 0
-.L1181:
+.L1320:
 	ldr	w17, [x3, x0, lsl 2]
 	ldr	w4, [x29, 124]
 	mvn	w17, w17
 	str	w17, [x3, x0, lsl 2]
 	add	x0, x0, 1
 	cmp	w4, w0
-	bgt	.L1181
+	bgt	.L1320
 	add	x3, x3, x22, uxtw 2
 	subs	w16, w16, #1
-	bne	.L1182
+	bne	.L1321
 	mov	x17, x1
 	mov	w23, 0
 	mov	w26, 1
-.L1183:
+.L1322:
 	mov	w3, 0
 	mov	w0, 0
-.L1187:
+.L1326:
 	mov	x25, x17
 	lsl	w16, w26, w0
 	mov	w24, 16
 	mov	w30, 0
-.L1185:
+.L1324:
 	ldr	w4, [x25]
 	add	x25, x25, x21
 	bics	wzr, w16, w4
 	cinc	w30, w30, eq
 	subs	w24, w24, #1
-	bne	.L1185
+	bne	.L1324
 	cmp	w30, 9
 	orr	w16, w3, w16
 	add	w0, w0, 1
 	csel	w3, w16, w3, cs
 	cmp	w0, 32
-	bne	.L1187
+	bne	.L1326
 	ldr	w0, [x29, 124]
 	add	w23, w23, 1
 	str	w3, [x17], 4
 	cmp	w0, w23
-	bgt	.L1183
+	bgt	.L1322
 	mov	x0, 0
 	mov	w3, 0
-.L1190:
+.L1329:
 	ldr	w16, [x1, x0]
 	add	x0, x0, 4
 	cmp	w16, 0
 	cinc	w3, w3, eq
 	cmp	x0, 32
-	bne	.L1190
+	bne	.L1329
 	cmp	w3, 7
-	ble	.L1191
+	ble	.L1330
 	mov	w3, 1024
 	mov	w2, 1
-	adrp	x0, .LC44
-	add	x0, x0, :lo12:.LC44
+	adrp	x0, .LC82
+	add	x0, x0, :lo12:.LC82
 	bl	rknand_print_hex
-	adrp	x0, .LC43
+	adrp	x0, .LC81
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC43
+	add	x0, x0, :lo12:.LC81
 	bl	printf
-.L1192:
-	b	.L1192
-.L1170:
+.L1331:
+	b	.L1331
+.L1309:
 	ldr	w1, [x29, 140]
 	cmp	w1, 6
-	bne	.L1174
+	bne	.L1313
 	mov	x1, 0
-.L1176:
+.L1315:
 	ldrb	w2, [x0, x1]
 	cmp	w2, 12
-	beq	.L1174
+	beq	.L1313
 	add	x2, x0, x1
 	ldrb	w2, [x2, 8]
 	cmp	w2, 4
-	beq	.L1174
+	beq	.L1313
 	add	x1, x1, 1
 	cmp	x1, 8
-	bne	.L1176
-	adrp	x0, .LC43
+	bne	.L1315
+	adrp	x0, .LC81
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC43
+	add	x0, x0, :lo12:.LC81
 	bl	printf
-.L1178:
-	b	.L1178
-.L1180:
+.L1317:
+	b	.L1317
+.L1319:
 	ldr	w1, [x27, 2048]
 	strb	w1, [x2, x0]
 	add	x0, x0, 1
-	b	.L1179
-.L1191:
+	b	.L1318
+.L1330:
 	ldr	w0, [x29, 140]
 	cmp	w0, 6
-	beq	.L1203
+	beq	.L1342
 	cmp	w0, 7
 	mov	x1, 10
 	mov	x0, 8
 	csel	x0, x0, x1, ne
-.L1193:
+.L1332:
 	ldr	x10, [x29, 104]
 	mov	w3, 0
-.L1194:
+.L1333:
 	mov	x1, 0
-.L1195:
+.L1334:
 	ldrb	w16, [x2, x1]
 	ldr	w4, [x29, 136]
 	strb	w16, [x10, x1]
 	add	x1, x1, 1
 	cmp	w4, w1, uxtb
-	bhi	.L1195
+	bhi	.L1334
 	ldr	x1, [x29, 96]
 	add	w3, w3, 1
 	add	x10, x10, x0
 	add	x2, x2, x1
 	ldr	w1, [x29, 132]
 	cmp	w1, w3
-	bgt	.L1194
+	bgt	.L1333
 	mov	w23, 255
 	str	w23, [x27, 2056]
 	bl	nandc_wait_flash_ready
 	cmp	w20, 1
-	bhi	.L1197
+	bhi	.L1336
 	mov	w0, 54
 	str	w0, [x27, 2056]
 	ldrb	w0, [x28, 128]
@@ -7804,34 +8304,34 @@ hynix_get_read_retry_default:
 	str	w23, [x27, 2052]
 	str	w23, [x27, 2052]
 	str	w23, [x27, 2052]
-.L1239:
+.L1378:
 	str	w0, [x27, 2056]
 	bl	nandc_wait_flash_ready
 	ldr	w0, [x29, 128]
 	add	w11, w0, 1
 	and	w0, w11, 255
 	str	w0, [x29, 128]
-	b	.L1162
-.L1203:
+	b	.L1301
+.L1342:
 	mov	x0, 4
-	b	.L1193
-.L1197:
+	b	.L1332
+.L1336:
 	mov	w0, 56
-	b	.L1239
+	b	.L1378
 	.size	hynix_get_read_retry_default, .-hynix_get_read_retry_default
 	.section	.text.flash_get_read_retry_tbl,"ax",@progbits
 	.align	2
 	.global	flash_get_read_retry_tbl
 	.type	flash_get_read_retry_tbl, %function
 flash_get_read_retry_tbl:
-	adrp	x0, .LANCHOR26+19
-	ldrb	w0, [x0, #:lo12:.LANCHOR26+19]
+	adrp	x0, .LANCHOR32+19
+	ldrb	w0, [x0, #:lo12:.LANCHOR32+19]
 	sub	w1, w0, #1
 	and	w1, w1, 255
 	cmp	w1, 6
-	bhi	.L1240
+	bhi	.L1379
 	b	hynix_get_read_retry_default
-.L1240:
+.L1379:
 	ret
 	.size	flash_get_read_retry_tbl, .-flash_get_read_retry_tbl
 	.section	.text.nandc_xfer_done,"ax",@progbits
@@ -7840,78 +8340,81 @@ flash_get_read_retry_tbl:
 	.type	nandc_xfer_done, %function
 nandc_xfer_done:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR14
+	adrp	x0, .LANCHOR141
+	adrp	x1, .LANCHOR22
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR13
-	ldrb	w0, [x0, #:lo12:.LANCHOR14]
+	adrp	x19, .LANCHOR21
+	ldrb	w1, [x1, #:lo12:.LANCHOR22]
 	stp	x21, x22, [sp, 32]
-	str	x23, [sp, 48]
-	cmp	w0, 9
-	ldr	x20, [x19, #:lo12:.LANCHOR13]
-	bne	.L1243
-	ldr	w0, [x20, 16]
+	stp	x23, x24, [sp, 48]
+	cmp	w1, 9
+	strb	wzr, [x0, #:lo12:.LANCHOR141]
+	bne	.L1382
+	ldr	x20, [x19, #:lo12:.LANCHOR21]
+	mov	x24, x0
 	mov	w21, 0
+	ldr	w0, [x20, 16]
 	str	w0, [x29, 64]
 	ldr	w0, [x20, 48]
-	tbnz	x0, 1, .L1244
-	adrp	x22, .LC47
-	adrp	x23, .LC46
-	add	x22, x22, :lo12:.LC47
-	add	x23, x23, :lo12:.LC46
-.L1245:
+	tbnz	x0, 1, .L1383
+	adrp	x22, .LC86
+	adrp	x23, .LC85
+	add	x22, x22, :lo12:.LC86
+	add	x23, x23, :lo12:.LC85
+.L1384:
 	ldr	w0, [x29, 64]
-	tbnz	x0, 20, .L1248
-	ldr	x0, [x19, #:lo12:.LANCHOR13]
+	tbnz	x0, 20, .L1387
+	ldr	x0, [x19, #:lo12:.LANCHOR21]
 	add	w21, w21, 1
 	tst	x21, 16777215
 	ldr	w0, [x0, 16]
 	str	w0, [x29, 64]
-	bne	.L1245
+	bne	.L1384
 	ldr	w2, [x29, 64]
 	mov	w1, w21
 	ldr	w3, [x20, 64]
 	mov	x0, x22
 	ubfx	x3, x3, 16, 6
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR13]
-	mov	w3, 256
+	ldr	x1, [x19, #:lo12:.LANCHOR21]
+	mov	w3, 64
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1245
-.L1244:
-	adrp	x22, .LC45
-	adrp	x23, .LC46
-	add	x22, x22, :lo12:.LC45
-	add	x23, x23, :lo12:.LC46
-.L1246:
+	b	.L1384
+.L1383:
+	adrp	x22, .LC84
+	adrp	x23, .LC85
+	add	x22, x22, :lo12:.LC84
+	add	x23, x23, :lo12:.LC85
+.L1385:
 	ldr	w1, [x20, 64]
 	ldr	w0, [x29, 64]
 	ubfx	x1, x1, 16, 6
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0
-	blt	.L1250
-.L1248:
-	adrp	x0, .LANCHOR37+32
-	ldr	x23, [sp, 48]
-	ldp	x19, x20, [sp, 16]
-	str	wzr, [x0, #:lo12:.LANCHOR37+32]
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 80
-	ret
-.L1250:
-	ldr	x0, [x19, #:lo12:.LANCHOR13]
+	bge	.L1387
+	ldr	x0, [x19, #:lo12:.LANCHOR21]
 	ldr	w0, [x0]
 	str	w0, [x29, 72]
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1247
+	tbz	x0, 13, .L1386
 	ldr	w0, [x29, 72]
-	tbnz	x0, 17, .L1248
-.L1247:
+	tbz	x0, 17, .L1386
+	ldr	w1, [x29, 72]
+	adrp	x0, .LC83
+	add	x0, x0, :lo12:.LC83
+	ubfx	x1, x1, 17, 1
+.L1419:
+	bl	printf
+	b	.L1387
+.L1386:
+	ldr	w0, [x29, 64]
 	add	w21, w21, 1
-	tst	x21, 16777215
-	bne	.L1246
+	ubfx	x0, x0, 22, 6
+	cmp	w21, w0, lsl 12
+	bne	.L1385
 	ldr	w2, [x20, 64]
 	mov	w1, w21
 	ldr	w3, [x29, 64]
@@ -7919,71 +8422,82 @@ nandc_xfer_done:
 	ubfx	x2, x2, 16, 5
 	ubfx	x3, x3, 22, 6
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR13]
-	mov	w3, 256
-	mov	w2, 4
+	ldr	x1, [x19, #:lo12:.LANCHOR21]
 	mov	x0, x23
+	mov	w3, 64
+	mov	w2, 4
 	bl	rknand_print_hex
-	b	.L1246
-.L1243:
-	ldr	w0, [x20, 8]
+	ldr	w0, [x29, 72]
+	tbz	x0, 13, .L1385
+	mov	w0, 1
+	strb	w0, [x24, #:lo12:.LANCHOR141]
+.L1387:
+	adrp	x0, .LANCHOR43+32
+	ldp	x19, x20, [sp, 16]
+	str	wzr, [x0, #:lo12:.LANCHOR43+32]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	ret
+.L1382:
+	ldr	x20, [x19, #:lo12:.LANCHOR21]
 	mov	w21, 0
+	ldr	w0, [x20, 8]
 	str	w0, [x29, 64]
 	ldr	w0, [x20, 16]
-	tbnz	x0, 1, .L1254
-	adrp	x22, .LC47
-	adrp	x23, .LC46
-	add	x22, x22, :lo12:.LC47
-	add	x23, x23, :lo12:.LC46
-.L1255:
+	tbnz	x0, 1, .L1393
+	adrp	x22, .LC86
+	adrp	x23, .LC85
+	add	x22, x22, :lo12:.LC86
+	add	x23, x23, :lo12:.LC85
+.L1394:
 	ldr	w0, [x29, 64]
-	tbnz	x0, 20, .L1248
-	ldr	x0, [x19, #:lo12:.LANCHOR13]
+	tbnz	x0, 20, .L1387
+	ldr	x0, [x19, #:lo12:.LANCHOR21]
 	add	w21, w21, 1
 	tst	x21, 16777215
 	ldr	w0, [x0, 8]
 	str	w0, [x29, 64]
-	bne	.L1255
+	bne	.L1394
 	ldr	w2, [x29, 64]
 	mov	w1, w21
 	ldr	w3, [x20, 28]
 	mov	x0, x22
 	ubfx	x3, x3, 16, 5
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR13]
-	mov	w3, 256
+	ldr	x1, [x19, #:lo12:.LANCHOR21]
+	mov	w3, 64
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1255
-.L1254:
-	adrp	x22, .LC45
-	adrp	x23, .LC46
-	add	x22, x22, :lo12:.LC45
-	add	x23, x23, :lo12:.LC46
-.L1256:
+	b	.L1394
+.L1393:
+	adrp	x22, .LC84
+	adrp	x23, .LC85
+	add	x22, x22, :lo12:.LC84
+	add	x23, x23, :lo12:.LC85
+.L1395:
 	ldr	w1, [x20, 28]
 	ldr	w0, [x29, 64]
 	ubfx	x1, x1, 16, 5
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0
-	bge	.L1248
-	ldr	x0, [x19, #:lo12:.LANCHOR13]
+	bge	.L1387
+	ldr	x0, [x19, #:lo12:.LANCHOR21]
 	ldr	w0, [x0]
 	str	w0, [x29, 72]
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1257
+	tbz	x0, 13, .L1396
 	ldr	w0, [x29, 72]
-	tbz	x0, 17, .L1257
+	tbz	x0, 17, .L1396
+	adrp	x0, .LC87
 	ldr	w1, [x29, 72]
-	adrp	x0, .LC48
-	add	x0, x0, :lo12:.LC48
-	bl	printf
-	b	.L1248
-.L1257:
+	add	x0, x0, :lo12:.LC87
+	b	.L1419
+.L1396:
 	add	w21, w21, 1
 	tst	x21, 16777215
-	bne	.L1256
+	bne	.L1395
 	ldr	w2, [x20, 28]
 	mov	w1, w21
 	ldr	w3, [x29, 64]
@@ -7991,12 +8505,12 @@ nandc_xfer_done:
 	ubfx	x2, x2, 16, 5
 	ubfx	x3, x3, 22, 6
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR13]
-	mov	w3, 256
+	ldr	x1, [x19, #:lo12:.LANCHOR21]
+	mov	w3, 64
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1256
+	b	.L1395
 	.size	nandc_xfer_done, .-nandc_xfer_done
 	.section	.text.nandc_xfer,"ax",@progbits
 	.align	2
@@ -8008,30 +8522,29 @@ nandc_xfer:
 	stp	x19, x20, [sp, 16]
 	and	w19, w2, 255
 	stp	x21, x22, [sp, 32]
+	mov	x20, x3
 	and	w22, w1, 255
-	mov	x21, x3
-	mov	w1, w19
 	mov	x3, x4
-	mov	x2, x21
+	mov	x2, x20
+	mov	w1, w19
 	mov	w0, w22
-	mov	x20, x4
+	mov	x21, x4
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
-	cbnz	w22, .L1295
-	adrp	x0, .LANCHOR14
-	ldrb	w0, [x0, #:lo12:.LANCHOR14]
+	cbnz	w22, .L1439
+	adrp	x0, .LANCHOR22
+	ldrb	w0, [x0, #:lo12:.LANCHOR22]
 	cmp	w0, 9
-	bne	.L1279
-	adrp	x1, .LANCHOR13
+	bne	.L1422
+	adrp	x22, .LANCHOR21
 	lsr	w19, w19, 2
-	mov	x20, x1
 	mov	w3, 1
-	ldr	x5, [x1, #:lo12:.LANCHOR13]
 	mov	w2, 0
+	ldr	x5, [x22, #:lo12:.LANCHOR21]
 	mov	w0, 0
-.L1280:
+.L1423:
 	cmp	w2, w19
-	bcc	.L1284
+	bcc	.L1427
 	ldr	w19, [x5]
 	cmp	w3, 0
 	mov	w1, 512
@@ -8040,22 +8553,35 @@ nandc_xfer:
 	movk	w1, 0x2, lsl 16
 	and	w1, w19, w1
 	cmp	w1, 139264
-	bne	.L1278
+	bne	.L1429
 	mov	w1, w19
-	adrp	x0, .LC49
-	add	x0, x0, :lo12:.LC49
+	adrp	x0, .LC88
+	add	x0, x0, :lo12:.LC88
 	bl	printf
-	ldr	x0, [x20, #:lo12:.LANCHOR13]
+	ldr	x0, [x22, #:lo12:.LANCHOR21]
 	orr	w19, w19, 131072
-.L1308:
 	str	w19, [x0]
 	mov	w0, -1
-.L1278:
+.L1429:
+	tbz	x19, 13, .L1430
+	adrp	x1, .LANCHOR141
+	ldrb	w1, [x1, #:lo12:.LANCHOR141]
+	cbz	w1, .L1430
+	mov	w1, w19
+	adrp	x0, .LC89
+	add	x0, x0, :lo12:.LC89
+	bl	printf
+	ldr	x0, [x22, #:lo12:.LANCHOR21]
+	mov	w1, 1
+	str	w1, [x0, 16]
+.L1458:
+	mov	w0, -1
+.L1421:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1284:
+.L1427:
 	uxtw	x1, w2
 	add	x1, x1, 84
 	ldr	w1, [x5, x1, lsl 2]
@@ -8066,107 +8592,95 @@ nandc_xfer:
 	and	w1, w4, w1, lsr 10
 	and	w3, w3, w1
 	ldr	w1, [x29, 56]
-	tbnz	x1, 2, .L1297
+	tbnz	x1, 2, .L1441
 	ldr	w1, [x29, 56]
-	tbnz	x1, 18, .L1297
+	tbnz	x1, 18, .L1441
 	ldr	w4, [x29, 56]
 	ldr	w1, [x29, 56]
 	ubfx	x4, x4, 3, 7
 	ubfx	x1, x1, 19, 7
 	cmp	w4, w1
 	ldr	w1, [x29, 56]
-	ble	.L1282
+	ble	.L1425
 	ubfx	x1, x1, 3, 7
-.L1283:
+.L1426:
 	cmp	w0, w1
 	csel	w0, w0, w1, cs
-.L1281:
+.L1424:
 	add	w2, w2, 1
-	b	.L1280
-.L1282:
+	b	.L1423
+.L1425:
 	ubfx	x1, x1, 19, 7
-	b	.L1283
-.L1297:
+	b	.L1426
+.L1441:
 	mov	w0, -1
-	b	.L1281
-.L1279:
-	adrp	x0, .LANCHOR34
+	b	.L1424
+.L1422:
+	adrp	x0, .LANCHOR40
 	lsr	w4, w19, 1
 	mov	w3, 64
 	mov	w1, 1
-	ldrb	w0, [x0, #:lo12:.LANCHOR34]
+	ldrb	w0, [x0, #:lo12:.LANCHOR40]
 	mov	w2, 0
-	adrp	x6, .LANCHOR37
+	adrp	x6, .LANCHOR43
 	cmp	w0, 25
 	mov	w0, 128
 	csel	w3, w3, w0, cc
 	mov	w0, 0
-.L1287:
+.L1432:
 	add	w5, w3, w0
 	cmp	w2, w4
-	bcc	.L1288
-	adrp	x22, .LANCHOR13
+	bcc	.L1433
+	adrp	x22, .LANCHOR21
 	lsr	w19, w19, 2
 	mov	w3, 0
 	mov	w0, 0
-	ldr	x4, [x22, #:lo12:.LANCHOR13]
-.L1289:
+	ldr	x4, [x22, #:lo12:.LANCHOR21]
+.L1434:
 	cmp	w3, w19
-	bcc	.L1293
+	bcc	.L1438
 	str	wzr, [x4, 16]
-	cmn	w0, #1
-	beq	.L1294
-	ldr	w1, [x20]
-	cmn	w1, #1
-	bne	.L1294
-	ldr	w1, [x20, 4]
-	cmn	w1, #1
-	bne	.L1294
-	ldr	w1, [x21]
-	cmn	w1, #1
-	mov	w1, 512
-	csel	w0, w0, w1, ne
-.L1294:
-	ldr	w19, [x4]
 	mov	w1, 8192
 	movk	w1, 0x2, lsl 16
+	ldr	w19, [x4]
 	and	w1, w19, w1
 	cmp	w1, 139264
-	bne	.L1278
+	bne	.L1430
 	mov	w1, w19
-	adrp	x0, .LC50
-	add	x0, x0, :lo12:.LC50
+	adrp	x0, .LC90
+	add	x0, x0, :lo12:.LC90
 	bl	printf
+	ldr	x0, [x22, #:lo12:.LANCHOR21]
 	orr	w19, w19, 131072
-	ldr	x0, [x22, #:lo12:.LANCHOR13]
-	b	.L1308
-.L1288:
-	ldr	x7, [x6, #:lo12:.LANCHOR37]
+	str	w19, [x0]
+	b	.L1458
+.L1433:
+	ldr	x7, [x6, #:lo12:.LANCHOR43]
 	and	x0, x0, 4294967292
 	ldr	w0, [x7, x0]
 	lsl	w7, w2, 2
 	add	w2, w2, 1
-	strb	w0, [x20, x7]
+	strb	w0, [x21, x7]
 	lsr	w7, w0, 8
-	strb	w7, [x20, w1, uxtw]
+	strb	w7, [x21, w1, uxtw]
 	add	w7, w1, 1
 	lsr	w8, w0, 16
 	lsr	w0, w0, 24
-	strb	w8, [x20, x7]
+	strb	w8, [x21, x7]
 	add	w7, w1, 2
 	add	w1, w1, 4
-	strb	w0, [x20, x7]
+	strb	w0, [x21, x7]
 	mov	w0, w5
-	b	.L1287
-.L1293:
+	b	.L1432
+.L1438:
 	uxtw	x1, w3
 	add	x1, x1, 8
 	ldr	w1, [x4, x1, lsl 2]
 	str	w1, [x29, 56]
 	ldr	w1, [x29, 56]
-	tbnz	x1, 2, .L1300
+	tbnz	x1, 2, .L1444
 	ldr	w1, [x29, 56]
-	tbnz	x1, 15, .L1300
+	tbnz	x1, 15, .L1444
 	ldr	w2, [x29, 56]
 	ubfx	x6, x2, 3, 5
 	ldr	w2, [x29, 56]
@@ -8179,28 +8693,42 @@ nandc_xfer:
 	orr	w1, w5, w1, lsl 5
 	cmp	w2, w1
 	ldr	w1, [x29, 56]
-	bls	.L1291
+	bls	.L1436
 	ubfx	x2, x1, 3, 5
 	ldr	w1, [x29, 56]
 	ubfx	x1, x1, 27, 1
-.L1307:
+.L1457:
 	orr	w1, w2, w1, lsl 5
 	cmp	w0, w1
 	csel	w0, w0, w1, cs
-.L1290:
+.L1435:
 	add	w3, w3, 1
-	b	.L1289
-.L1291:
+	b	.L1434
+.L1436:
 	ubfx	x2, x1, 16, 5
 	ldr	w1, [x29, 56]
 	ubfx	x1, x1, 29, 1
-	b	.L1307
-.L1300:
+	b	.L1457
+.L1444:
 	mov	w0, -1
-	b	.L1290
-.L1295:
+	b	.L1435
+.L1430:
+	cmn	w0, #1
+	beq	.L1421
+	ldr	w1, [x21]
+	cmn	w1, #1
+	bne	.L1421
+	ldr	w1, [x21, 4]
+	cmn	w1, #1
+	bne	.L1421
+	ldr	w1, [x20]
+	cmn	w1, #1
+	mov	w1, 512
+	csel	w0, w0, w1, ne
+	b	.L1421
+.L1439:
 	mov	w0, 0
-	b	.L1278
+	b	.L1421
 	.size	nandc_xfer, .-nandc_xfer
 	.section	.text.flash_read_page,"ax",@progbits
 	.align	2
@@ -8211,35 +8739,35 @@ flash_read_page:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	and	w21, w0, 255
-	adrp	x0, .LANCHOR13
+	adrp	x0, .LANCHOR21
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	mov	w22, w1
-	ldr	x19, [x0, #:lo12:.LANCHOR13]
-	adrp	x0, .LANCHOR29
+	ldr	x19, [x0, #:lo12:.LANCHOR21]
+	adrp	x0, .LANCHOR7
 	stp	x25, x26, [sp, 64]
 	mov	w24, w4
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
 	mov	x25, x2
 	mov	x26, x3
 	and	w20, w1, 2097151
 	ubfx	x23, x22, 24, 2
-	tbz	x0, 4, .L1310
+	tbz	x0, 4, .L1460
 	mov	w3, w1
-	adrp	x0, .LC51
+	adrp	x0, .LC91
 	mov	w2, w23
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC51
+	add	x0, x0, :lo12:.LC91
 	bl	printf
-.L1310:
+.L1460:
 	bl	nandc_wait_flash_ready
 	mov	w0, w21
 	bl	nandc_cs
-	adrp	x6, .LANCHOR41
-	cbnz	w23, .L1311
+	adrp	x6, .LANCHOR9
+	cbnz	w23, .L1461
 	mov	w0, w21
 	bl	zftl_flash_enter_slc_mode
-.L1312:
+.L1462:
 	ubfiz	x4, x21, 8, 8
 	lsr	w0, w20, 8
 	add	x4, x19, x4
@@ -8253,15 +8781,15 @@ flash_read_page:
 	str	w0, [x4, 2052]
 	mov	w0, 48
 	str	w0, [x4, 2056]
-	ldr	x0, [x6, #:lo12:.LANCHOR41]
+	ldr	x0, [x6, #:lo12:.LANCHOR9]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1314
-	cbz	w23, .L1314
+	bne	.L1464
+	cbz	w23, .L1464
 	add	w20, w20, w20, lsl 1
 	sub	w0, w20, #1
 	add	w0, w0, w23
-.L1323:
+.L1473:
 	bl	nandc_set_seed
 	bl	nandc_wait_flash_ready
 	mov	w0, 5
@@ -8286,23 +8814,23 @@ flash_read_page:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1311:
-	ldr	x0, [x6, #:lo12:.LANCHOR41]
+.L1461:
+	ldr	x0, [x6, #:lo12:.LANCHOR9]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1313
+	bne	.L1463
 	sxtw	x0, w21
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 8
 	str	w23, [x0, 8]
-	b	.L1312
-.L1313:
+	b	.L1462
+.L1463:
 	mov	w0, w21
 	bl	zftl_flash_exit_slc_mode
-	b	.L1312
-.L1314:
+	b	.L1462
+.L1464:
 	mov	w0, w20
-	b	.L1323
+	b	.L1473
 	.size	flash_read_page, .-flash_read_page
 	.section	.text.micron_read_retrial,"ax",@progbits
 	.align	2
@@ -8310,66 +8838,71 @@ flash_read_page:
 	.type	micron_read_retrial, %function
 micron_read_retrial:
 	stp	x29, x30, [sp, -128]!
+	and	w0, w0, 255
 	add	x29, sp, 0
-	stp	x25, x26, [sp, 64]
-	and	w25, w0, 255
-	adrp	x0, .LANCHOR34
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	mov	x26, x3
+	mov	w22, w2
+	stp	w5, w0, [x29, 112]
+	adrp	x0, .LANCHOR40
 	stp	x23, x24, [sp, 48]
-	mov	w24, w2
+	adrp	x23, .LANCHOR7
+	stp	x25, x26, [sp, 64]
+	mov	x26, x3
 	stp	x27, x28, [sp, 80]
-	mov	w28, w5
-	ldrb	w21, [x0, #:lo12:.LANCHOR34]
 	mov	x27, x4
+	ldrb	w20, [x0, #:lo12:.LANCHOR40]
 	bl	nandc_wait_flash_ready
-	and	x20, x25, 255
-	adrp	x0, .LANCHOR13
-	adrp	x5, .LANCHOR137
-	add	w21, w21, w21, lsl 1
-	add	x5, x5, :lo12:.LANCHOR137
-	ldr	x6, [x0, #:lo12:.LANCHOR13]
-	asr	w21, w21, 2
-	mov	w23, 0
-	mov	w19, -1
-	mov	w8, 239
-	mov	w10, 137
-	add	x22, x6, x20, lsl 8
-.L1325:
-	ldrb	w0, [x5]
-	cmp	w23, w0
-	bcc	.L1329
-.L1328:
-	add	x6, x6, x20, lsl 8
+	adrp	x0, .LANCHOR21
+	ldrb	w19, [x29, 116]
+	add	x23, x23, :lo12:.LANCHOR7
+	mov	w21, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
+	add	w20, w20, w20, lsl 1
+	str	x0, [x29, 120]
+	asr	w20, w20, 2
+	adrp	x0, .LANCHOR143
+	add	x0, x0, :lo12:.LANCHOR143
+	str	x0, [x29, 104]
+	mov	w24, -1
+	ldr	x0, [x29, 120]
+	add	x25, x0, x19, lsl 8
+.L1475:
+	ldr	x0, [x29, 104]
+	ldrb	w0, [x0]
+	cmp	w21, w0
+	bcc	.L1480
+.L1479:
+	ldr	x0, [x29, 120]
+	add	x19, x0, x19, lsl 8
 	mov	w0, 239
-	str	w0, [x6, 2056]
+	str	w0, [x19, 2056]
 	mov	w0, 137
-	str	w0, [x6, 2052]
+	str	w0, [x19, 2052]
 	mov	w0, 200
 	bl	timer_delay_ns
-	str	wzr, [x6, 2048]
-	str	wzr, [x6, 2048]
-	cmp	w19, w21
-	str	wzr, [x6, 2048]
-	str	wzr, [x6, 2048]
-	bcc	.L1330
-	cmn	w19, #1
+	str	wzr, [x19, 2048]
+	str	wzr, [x19, 2048]
+	cmp	w24, w20
+	str	wzr, [x19, 2048]
+	str	wzr, [x19, 2048]
+	bcc	.L1481
+	cmn	w24, #1
 	mov	w0, 256
-	csel	w19, w19, w0, eq
-.L1330:
-	cmp	w19, 256
-	ccmn	w19, #1, 4, ne
-	bne	.L1324
-	adrp	x0, .LC52
-	mov	w4, w19
-	mov	w3, w23
-	mov	w2, w24
-	mov	w1, w23
-	add	x0, x0, :lo12:.LC52
+	csel	w24, w24, w0, eq
+.L1481:
+	cmp	w24, 256
+	ccmn	w24, #1, 4, ne
+	bne	.L1474
+	adrp	x0, .LC93
+	mov	w4, w24
+	mov	w3, w21
+	mov	w2, w22
+	mov	w1, w21
+	add	x0, x0, :lo12:.LC93
 	bl	printf
-.L1324:
-	mov	w0, w19
+.L1474:
+	mov	w0, w24
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -8377,44 +8910,53 @@ micron_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1329:
-	str	w8, [x22, 2056]
+.L1480:
+	mov	w0, 239
+	str	w0, [x25, 2056]
+	mov	w0, 137
+	str	w0, [x25, 2052]
+	add	w28, w21, 1
 	mov	w0, 200
-	str	w10, [x22, 2052]
-	stp	x5, x6, [x29, 96]
-	stp	w8, w10, [x29, 116]
 	bl	timer_delay_ns
-	add	w7, w23, 1
-	str	w7, [x22, 2048]
-	str	wzr, [x22, 2048]
-	mov	w4, w28
-	str	wzr, [x22, 2048]
+	str	w28, [x25, 2048]
+	str	wzr, [x25, 2048]
 	mov	x3, x27
-	str	wzr, [x22, 2048]
+	ldrb	w0, [x29, 116]
 	mov	x2, x26
-	str	w7, [x29, 124]
-	mov	w1, w24
-	mov	w0, w25
+	ldr	w4, [x29, 112]
+	mov	w1, w22
+	str	wzr, [x25, 2048]
+	str	wzr, [x25, 2048]
 	bl	flash_read_page
-	ldp	w8, w10, [x29, 116]
-	cmn	w0, #1
-	ldr	w7, [x29, 124]
-	ldp	x5, x6, [x29, 96]
-	beq	.L1326
-	adrp	x1, .LANCHOR135
-	cmn	w19, #1
-	csel	w19, w19, w0, ne
-	cmp	w0, w21
-	ldr	x26, [x1, #:lo12:.LANCHOR135]
-	adrp	x1, .LANCHOR136
-	ldr	x27, [x1, #:lo12:.LANCHOR136]
-	bcc	.L1332
-.L1326:
-	mov	w23, w7
-	b	.L1325
-.L1332:
-	mov	w19, w0
-	b	.L1328
+	mov	w7, w0
+	ldr	w0, [x23]
+	tbz	x0, 12, .L1476
+	str	w7, [x29, 100]
+	mov	w4, w24
+	mov	w3, w21
+	mov	w2, w22
+	mov	w1, w21
+	adrp	x0, .LC92
+	add	x0, x0, :lo12:.LC92
+	bl	printf
+	ldr	w7, [x29, 100]
+.L1476:
+	cmn	w7, #1
+	beq	.L1477
+	adrp	x0, .LANCHOR140
+	cmn	w24, #1
+	csel	w24, w24, w7, ne
+	cmp	w7, w20
+	ldr	x26, [x0, #:lo12:.LANCHOR140]
+	adrp	x0, .LANCHOR142
+	ldr	x27, [x0, #:lo12:.LANCHOR142]
+	bcc	.L1483
+.L1477:
+	mov	w21, w28
+	b	.L1475
+.L1483:
+	mov	w24, w7
+	b	.L1479
 	.size	micron_read_retrial, .-micron_read_retrial
 	.section	.text.toshiba_3d_read_retrial,"ax",@progbits
 	.align	2
@@ -8425,7 +8967,7 @@ toshiba_3d_read_retrial:
 	and	w6, w1, 255
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR9
+	adrp	x22, .LANCHOR17
 	stp	x25, x26, [sp, 64]
 	and	w25, w0, 255
 	stp	x27, x28, [sp, 80]
@@ -8436,14 +8978,14 @@ toshiba_3d_read_retrial:
 	stp	x19, x20, [sp, 16]
 	str	w5, [x29, 124]
 	bl	nandc_wait_flash_ready
-	adrp	x0, .LANCHOR13
+	adrp	x0, .LANCHOR21
 	mov	w1, 46
 	mov	w2, 56
-	ldr	x26, [x0, #:lo12:.LANCHOR13]
+	ldr	x26, [x0, #:lo12:.LANCHOR21]
 	and	x0, x25, 255
 	add	x21, x0, 8
 	str	x0, [x29, 112]
-	ldrb	w0, [x22, #:lo12:.LANCHOR9]
+	ldrb	w0, [x22, #:lo12:.LANCHOR17]
 	add	x21, x26, x21, lsl 8
 	cmp	w0, 36
 	mov	w0, 26
@@ -8452,26 +8994,26 @@ toshiba_3d_read_retrial:
 	mov	w1, 10
 	csel	w0, w1, w0, ne
 	str	w0, [x29, 104]
-	cbnz	w6, .L1344
+	cbnz	w6, .L1498
 	sxtw	x24, w25
-	add	x0, x22, :lo12:.LANCHOR9
+	add	x0, x22, :lo12:.LANCHOR17
 	add	x24, x24, 8
 	mov	w19, -1
 	add	x24, x26, x24, lsl 8
 	mov	w20, 1
 	str	x0, [x29, 96]
-.L1351:
+.L1505:
 	ldr	x0, [x29, 96]
 	ldrb	w0, [x0]
 	cmp	w0, 36
-	bne	.L1345
+	bne	.L1499
 	mov	x0, x21
 	mov	w2, 0
 	mov	w1, w20
 	bl	toshiba_tlc_set_rr_para
 	mov	w0, 93
 	str	w0, [x24, 8]
-.L1346:
+.L1500:
 	ldr	w4, [x29, 124]
 	mov	x3, x28
 	mov	x2, x27
@@ -8479,62 +9021,62 @@ toshiba_3d_read_retrial:
 	mov	w0, w25
 	bl	flash_read_page
 	mov	w4, w0
-	adrp	x0, .LANCHOR29
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 4, .L1347
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 4, .L1501
 	mov	w3, w4
 	str	w4, [x29, 120]
 	mov	w2, w23
 	mov	w1, w20
-	adrp	x0, .LC53
-	add	x0, x0, :lo12:.LC53
+	adrp	x0, .LC94
+	add	x0, x0, :lo12:.LC94
 	bl	printf
 	ldr	w4, [x29, 120]
-.L1347:
+.L1501:
 	cmn	w4, #1
-	beq	.L1348
-	adrp	x0, .LANCHOR135
+	beq	.L1502
+	adrp	x0, .LANCHOR140
 	cmn	w19, #1
 	csel	w19, w19, w4, ne
-	ldr	x27, [x0, #:lo12:.LANCHOR135]
-	adrp	x0, .LANCHOR136
-	ldr	x28, [x0, #:lo12:.LANCHOR136]
-	adrp	x0, .LANCHOR34
-	ldrb	w0, [x0, #:lo12:.LANCHOR34]
+	ldr	x27, [x0, #:lo12:.LANCHOR140]
+	adrp	x0, .LANCHOR142
+	ldr	x28, [x0, #:lo12:.LANCHOR142]
+	adrp	x0, .LANCHOR40
+	ldrb	w0, [x0, #:lo12:.LANCHOR40]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1366
-.L1348:
+	bcc	.L1520
+.L1502:
 	ldr	w0, [x29, 104]
 	add	w20, w20, 1
 	cmp	w0, w20
-	bne	.L1351
-.L1350:
-	ldrb	w0, [x22, #:lo12:.LANCHOR9]
+	bne	.L1505
+.L1504:
+	ldrb	w0, [x22, #:lo12:.LANCHOR17]
 	cmp	w0, 36
-	bne	.L1352
+	bne	.L1506
 	mov	w2, 0
-.L1389:
+.L1543:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_tlc_set_rr_para
-	b	.L1353
-.L1345:
+	b	.L1507
+.L1499:
 	mov	w1, w20
 	mov	x0, x21
 	bl	toshiba_3d_set_slc_rr_para
-	b	.L1346
-.L1366:
+	b	.L1500
+.L1520:
 	mov	w19, w4
-	b	.L1350
-.L1352:
+	b	.L1504
+.L1506:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_3d_set_slc_rr_para
-.L1353:
-	ldrb	w0, [x22, #:lo12:.LANCHOR9]
+.L1507:
+	ldrb	w0, [x22, #:lo12:.LANCHOR17]
 	cmp	w0, 36
-	bne	.L1362
+	bne	.L1516
 	ldr	x0, [x29, 112]
 	add	x26, x26, x0, lsl 8
 	mov	w0, 85
@@ -8543,27 +9085,27 @@ toshiba_3d_read_retrial:
 	str	wzr, [x26, 2052]
 	str	wzr, [x26, 2048]
 	str	w0, [x26, 2056]
-.L1362:
-	adrp	x0, .LANCHOR34
-	ldrb	w0, [x0, #:lo12:.LANCHOR34]
+.L1516:
+	adrp	x0, .LANCHOR40
+	ldrb	w0, [x0, #:lo12:.LANCHOR40]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L1363
+	bcc	.L1517
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L1363:
+.L1517:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L1364
-	adrp	x0, .LC55
+	bne	.L1518
+	adrp	x0, .LC96
 	mov	w4, w19
 	mov	w3, w20
 	mov	w2, w23
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC55
+	add	x0, x0, :lo12:.LC96
 	bl	printf
-.L1364:
+.L1518:
 	bl	nandc_wait_flash_ready
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
@@ -8573,26 +9115,26 @@ toshiba_3d_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1344:
+.L1498:
 	sxtw	x24, w25
 	orr	w23, w23, w6, lsl 24
 	add	x24, x24, 8
-	add	x0, x22, :lo12:.LANCHOR9
+	add	x0, x22, :lo12:.LANCHOR17
 	add	x24, x26, x24, lsl 8
 	mov	w19, -1
 	mov	w20, 1
 	str	x0, [x29, 104]
-.L1360:
+.L1514:
 	ldr	x0, [x29, 104]
 	ldrb	w0, [x0]
 	cmp	w0, 36
-	bne	.L1354
+	bne	.L1508
 	mov	x0, x21
 	mov	w2, 1
 	mov	w1, w20
 	bl	toshiba_tlc_set_rr_para
 	mov	w0, 93
-.L1388:
+.L1542:
 	str	w0, [x24, 8]
 	mov	x3, x28
 	mov	x2, x27
@@ -8601,56 +9143,56 @@ toshiba_3d_read_retrial:
 	mov	w0, w25
 	bl	flash_read_page
 	mov	w4, w0
-	adrp	x0, .LANCHOR29
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 4, .L1356
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 4, .L1510
 	mov	w3, w4
 	str	w4, [x29, 120]
 	mov	w2, w23
 	mov	w1, w20
-	adrp	x0, .LC54
-	add	x0, x0, :lo12:.LC54
+	adrp	x0, .LC95
+	add	x0, x0, :lo12:.LC95
 	bl	printf
 	ldr	w4, [x29, 120]
-.L1356:
+.L1510:
 	cmn	w4, #1
-	beq	.L1357
-	adrp	x0, .LANCHOR135
+	beq	.L1511
+	adrp	x0, .LANCHOR140
 	cmn	w19, #1
 	csel	w19, w19, w4, ne
-	ldr	x27, [x0, #:lo12:.LANCHOR135]
-	adrp	x0, .LANCHOR136
-	ldr	x28, [x0, #:lo12:.LANCHOR136]
-	adrp	x0, .LANCHOR34
-	ldrb	w0, [x0, #:lo12:.LANCHOR34]
+	ldr	x27, [x0, #:lo12:.LANCHOR140]
+	adrp	x0, .LANCHOR142
+	ldr	x28, [x0, #:lo12:.LANCHOR142]
+	adrp	x0, .LANCHOR40
+	ldrb	w0, [x0, #:lo12:.LANCHOR40]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1367
-.L1357:
+	bcc	.L1521
+.L1511:
 	ldr	w0, [x29, 96]
 	add	w20, w20, 1
 	cmp	w0, w20
-	bne	.L1360
-.L1359:
-	ldrb	w0, [x22, #:lo12:.LANCHOR9]
+	bne	.L1514
+.L1513:
+	ldrb	w0, [x22, #:lo12:.LANCHOR17]
 	cmp	w0, 36
-	bne	.L1361
+	bne	.L1515
 	mov	w2, 1
-	b	.L1389
-.L1354:
+	b	.L1543
+.L1508:
 	mov	x0, x21
 	mov	w1, w20
 	bl	toshiba_3d_set_tlc_rr_para
 	mov	w0, 38
-	b	.L1388
-.L1367:
+	b	.L1542
+.L1521:
 	mov	w19, w4
-	b	.L1359
-.L1361:
+	b	.L1513
+.L1515:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_3d_set_tlc_rr_para
-	b	.L1353
+	b	.L1507
 	.size	toshiba_3d_read_retrial, .-toshiba_3d_read_retrial
 	.section	.text.toshiba_read_retrial,"ax",@progbits
 	.align	2
@@ -8670,84 +9212,84 @@ toshiba_read_retrial:
 	and	x26, x19, 255
 	stp	w5, w2, [x29, 120]
 	bl	nandc_wait_flash_ready
-	adrp	x0, .LANCHOR13
-	adrp	x1, .LANCHOR9
+	adrp	x0, .LANCHOR21
+	adrp	x1, .LANCHOR17
 	str	x1, [x29, 112]
 	add	x21, x26, 8
-	ldr	x22, [x0, #:lo12:.LANCHOR13]
-	ldrb	w0, [x1, #:lo12:.LANCHOR9]
+	ldr	x22, [x0, #:lo12:.LANCHOR21]
+	ldrb	w0, [x1, #:lo12:.LANCHOR17]
 	sub	w0, w0, #67
 	add	x21, x22, x21, lsl 8
 	and	w0, w0, 255
 	cmp	w0, 1
-	bls	.L1408
-	adrp	x0, .LANCHOR42
-	ldrb	w0, [x0, #:lo12:.LANCHOR42]
-	cbz	w0, .L1409
+	bls	.L1562
+	adrp	x0, .LANCHOR14
+	ldrb	w0, [x0, #:lo12:.LANCHOR14]
+	cbz	w0, .L1563
 	mov	w23, 1
 	mov	w0, 1
 	bl	nandc_set_if_mode
-.L1392:
+.L1546:
 	add	x0, x22, x26, lsl 8
 	mov	w1, 92
 	str	w1, [x0, 2056]
 	mov	w1, 197
 	str	w1, [x0, 2056]
-.L1391:
+.L1545:
 	sxtw	x0, w19
 	mov	w20, 1
 	add	x0, x0, 8
 	mov	w24, -1
 	add	x0, x22, x0, lsl 8
 	str	x0, [x29, 104]
-.L1393:
-	adrp	x0, .LANCHOR137
-	ldrb	w0, [x0, #:lo12:.LANCHOR137]
+.L1547:
+	adrp	x0, .LANCHOR143
+	ldrb	w0, [x0, #:lo12:.LANCHOR143]
 	add	w0, w0, 1
 	cmp	w20, w0
-	bcc	.L1402
+	bcc	.L1556
 	mov	w25, w24
-.L1401:
+.L1555:
 	ldr	x0, [x29, 112]
 	mov	w1, 0
-	ldrb	w0, [x0, #:lo12:.LANCHOR9]
+	ldrb	w0, [x0, #:lo12:.LANCHOR17]
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x21
-	bhi	.L1403
+	bhi	.L1557
 	bl	sandisk_set_rr_para
-.L1404:
+.L1558:
 	sxtw	x19, w19
 	mov	w0, 255
 	add	x19, x19, 8
 	add	x22, x22, x19, lsl 8
 	str	w0, [x22, 8]
-	adrp	x0, .LANCHOR34
-	ldrb	w0, [x0, #:lo12:.LANCHOR34]
+	adrp	x0, .LANCHOR40
+	ldrb	w0, [x0, #:lo12:.LANCHOR40]
 	add	w0, w0, w0, lsl 1
 	cmp	w25, w0, lsr 2
-	bcc	.L1405
+	bcc	.L1559
 	cmn	w25, #1
 	mov	w0, 256
 	csel	w25, w25, w0, eq
-.L1405:
+.L1559:
 	cmp	w25, 256
 	ccmn	w25, #1, 4, ne
-	bne	.L1406
+	bne	.L1560
 	ldr	w2, [x29, 124]
-	adrp	x0, .LC55
+	adrp	x0, .LC96
 	mov	w4, w25
 	mov	w3, w20
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC55
+	add	x0, x0, :lo12:.LC96
 	bl	printf
-.L1406:
+.L1560:
 	bl	nandc_wait_flash_ready
-	cbz	w23, .L1390
+	cbz	w23, .L1544
 	mov	w0, 4
 	bl	nandc_set_if_mode
-.L1390:
+.L1544:
 	mov	w0, w25
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -8756,36 +9298,36 @@ toshiba_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1409:
+.L1563:
 	mov	w23, 0
-	b	.L1392
-.L1408:
+	b	.L1546
+.L1562:
 	mov	w23, 0
-	b	.L1391
-.L1402:
+	b	.L1545
+.L1556:
 	ldr	x0, [x29, 112]
 	mov	w1, w20
-	ldrb	w0, [x0, #:lo12:.LANCHOR9]
+	ldrb	w0, [x0, #:lo12:.LANCHOR17]
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x21
-	bhi	.L1394
+	bhi	.L1548
 	bl	sandisk_set_rr_para
-.L1395:
+.L1549:
 	ldr	x0, [x29, 112]
-	ldrb	w0, [x0, #:lo12:.LANCHOR9]
+	ldrb	w0, [x0, #:lo12:.LANCHOR17]
 	cmp	w0, 34
-	bne	.L1396
-	adrp	x0, .LANCHOR137
-	ldrb	w0, [x0, #:lo12:.LANCHOR137]
+	bne	.L1550
+	adrp	x0, .LANCHOR143
+	ldrb	w0, [x0, #:lo12:.LANCHOR143]
 	sub	w0, w0, #3
 	cmp	w20, w0
-	bne	.L1396
+	bne	.L1550
 	ldr	x1, [x29, 104]
 	mov	w0, 179
 	str	w0, [x1, 8]
-.L1396:
+.L1550:
 	add	x0, x22, x26, lsl 8
 	mov	w1, 38
 	ldr	w4, [x29, 120]
@@ -8799,27 +9341,27 @@ toshiba_read_retrial:
 	bl	flash_read_page
 	mov	w25, w0
 	cmn	w0, #1
-	beq	.L1399
+	beq	.L1553
 	cmn	w24, #1
 	csel	w24, w24, w0, ne
-	adrp	x0, .LANCHOR135
-	ldr	x27, [x0, #:lo12:.LANCHOR135]
-	adrp	x0, .LANCHOR136
-	ldr	x28, [x0, #:lo12:.LANCHOR136]
-	adrp	x0, .LANCHOR34
-	ldrb	w0, [x0, #:lo12:.LANCHOR34]
+	adrp	x0, .LANCHOR140
+	ldr	x27, [x0, #:lo12:.LANCHOR140]
+	adrp	x0, .LANCHOR142
+	ldr	x28, [x0, #:lo12:.LANCHOR142]
+	adrp	x0, .LANCHOR40
+	ldrb	w0, [x0, #:lo12:.LANCHOR40]
 	add	w0, w0, w0, lsl 1
 	cmp	w25, w0, lsr 2
-	bcc	.L1401
-.L1399:
+	bcc	.L1555
+.L1553:
 	add	w20, w20, 1
-	b	.L1393
-.L1394:
+	b	.L1547
+.L1548:
 	bl	toshiba_set_rr_para
-	b	.L1395
-.L1403:
+	b	.L1549
+.L1557:
 	bl	toshiba_set_rr_para
-	b	.L1404
+	b	.L1558
 	.size	toshiba_read_retrial, .-toshiba_read_retrial
 	.section	.text.hynix_read_retrial,"ax",@progbits
 	.align	2
@@ -8830,11 +9372,11 @@ hynix_read_retrial:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	x23, x0, 255
-	adrp	x0, .LANCHOR12
+	adrp	x0, .LANCHOR20
 	stp	x27, x28, [sp, 80]
 	stp	x21, x22, [sp, 32]
 	mov	w27, w5
-	ldr	x28, [x0, #:lo12:.LANCHOR12]
+	ldr	x28, [x0, #:lo12:.LANCHOR20]
 	mov	w22, w2
 	stp	x25, x26, [sp, 64]
 	mov	x25, x3
@@ -8847,37 +9389,37 @@ hynix_read_retrial:
 	ldrb	w24, [x28, 2]
 	ldrb	w20, [x0, 8]
 	bl	nandc_wait_flash_ready
-	adrp	x6, .LANCHOR34
-	add	x6, x6, :lo12:.LANCHOR34
+	adrp	x6, .LANCHOR40
+	add	x6, x6, :lo12:.LANCHOR40
 	mov	w5, 0
-	adrp	x7, .LANCHOR135
-	adrp	x8, .LANCHOR136
-.L1423:
+	adrp	x7, .LANCHOR140
+	adrp	x8, .LANCHOR142
+.L1577:
 	cmp	w5, w24
-	bcc	.L1428
-.L1427:
-	adrp	x0, .LANCHOR34
+	bcc	.L1582
+.L1581:
+	adrp	x0, .LANCHOR40
 	add	x23, x28, x23
-	ldrb	w0, [x0, #:lo12:.LANCHOR34]
+	ldrb	w0, [x0, #:lo12:.LANCHOR40]
 	strb	w20, [x23, 8]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L1429
+	bcc	.L1583
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L1429:
+.L1583:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L1422
-	adrp	x0, .LC56
+	bne	.L1576
+	adrp	x0, .LC97
 	mov	w4, w19
 	mov	w3, w5
 	mov	w2, w22
 	mov	w1, w5
-	add	x0, x0, :lo12:.LC56
+	add	x0, x0, :lo12:.LC97
 	bl	printf
-.L1422:
+.L1576:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -8886,7 +9428,7 @@ hynix_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1428:
+.L1582:
 	add	w20, w20, 1
 	stp	x6, x8, [x29, 96]
 	and	w20, w20, 255
@@ -8907,21 +9449,21 @@ hynix_read_retrial:
 	cmn	w0, #1
 	ldp	x6, x8, [x29, 96]
 	ldr	x7, [x29, 112]
-	beq	.L1425
+	beq	.L1579
 	ldrb	w1, [x6]
 	cmn	w19, #1
 	csel	w19, w19, w0, ne
-	ldr	x25, [x7, #:lo12:.LANCHOR135]
-	ldr	x26, [x8, #:lo12:.LANCHOR136]
+	ldr	x25, [x7, #:lo12:.LANCHOR140]
+	ldr	x26, [x8, #:lo12:.LANCHOR142]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L1431
-.L1425:
+	bcc	.L1585
+.L1579:
 	add	w5, w5, 1
-	b	.L1423
-.L1431:
+	b	.L1577
+.L1585:
 	mov	w19, w0
-	b	.L1427
+	b	.L1581
 	.size	hynix_read_retrial, .-hynix_read_retrial
 	.section	.text.flash_ddr_tunning_read,"ax",@progbits
 	.align	2
@@ -8934,15 +9476,15 @@ flash_ddr_tunning_read:
 	stp	x19, x20, [sp, 16]
 	mov	w20, w1
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LC57
+	adrp	x21, .LC98
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR34
+	adrp	x22, .LANCHOR40
 	stp	x25, x26, [sp, 64]
-	add	x21, x21, :lo12:.LC57
+	add	x21, x21, :lo12:.LC98
 	stp	x27, x28, [sp, 80]
 	mov	x26, x3
 	str	w4, [x29, 120]
-	add	x22, x22, :lo12:.LANCHOR34
+	add	x22, x22, :lo12:.LANCHOR40
 	str	x2, [x29, 128]
 	mov	w28, 0
 	str	w0, [x29, 136]
@@ -8950,14 +9492,14 @@ flash_ddr_tunning_read:
 	mov	w23, 0
 	str	w0, [x29, 124]
 	mov	w24, 0
-	adrp	x0, .LANCHOR29
+	adrp	x0, .LANCHOR7
 	mov	w27, 1024
-	add	x0, x0, :lo12:.LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR7
 	mov	w25, 6
 	mov	w19, -1
 	str	wzr, [x29, 140]
 	str	x0, [x29, 112]
-.L1447:
+.L1601:
 	mov	w0, w25
 	bl	nandc_set_ddr_para
 	ldr	w4, [x29, 120]
@@ -8969,7 +9511,7 @@ flash_ddr_tunning_read:
 	mov	w4, w0
 	ldr	x0, [x29, 112]
 	ldr	w0, [x0]
-	tbz	x0, 4, .L1442
+	tbz	x0, 4, .L1596
 	mov	w3, w4
 	str	w4, [x29, 108]
 	mov	w2, w20
@@ -8977,51 +9519,51 @@ flash_ddr_tunning_read:
 	mov	x0, x21
 	bl	printf
 	ldr	w4, [x29, 108]
-.L1442:
+.L1596:
 	add	w0, w27, 1
 	cmp	w4, w0
-	bhi	.L1443
-	adrp	x0, .LANCHOR135
-	ldr	x0, [x0, #:lo12:.LANCHOR135]
+	bhi	.L1597
+	adrp	x0, .LANCHOR140
+	ldr	x0, [x0, #:lo12:.LANCHOR140]
 	str	x0, [x29, 128]
-	adrp	x0, .LANCHOR136
-	ldr	x26, [x0, #:lo12:.LANCHOR136]
+	adrp	x0, .LANCHOR142
+	ldr	x26, [x0, #:lo12:.LANCHOR142]
 	ldrb	w0, [x22]
 	cmp	w4, w0, lsr 2
-	bcs	.L1452
+	bcs	.L1606
 	add	w24, w24, 1
 	cmp	w24, 7
-	bls	.L1452
+	bls	.L1606
 	sub	w28, w25, w24
 	mov	w27, w4
 	mov	w19, 0
-.L1445:
+.L1599:
 	ldr	w0, [x29, 140]
 	cmp	w24, w23
 	csel	w28, w28, w0, cs
-.L1446:
-	cbz	w28, .L1448
-	adrp	x0, .LANCHOR34
+.L1600:
+	cbz	w28, .L1602
+	adrp	x0, .LANCHOR40
 	mov	w1, 3
-	ldrb	w0, [x0, #:lo12:.LANCHOR34]
+	ldrb	w0, [x0, #:lo12:.LANCHOR40]
 	udiv	w0, w0, w1
 	cmp	w0, w27
-	bls	.L1448
+	bls	.L1602
 	mov	w1, w28
-	adrp	x0, .LC58
-	add	x0, x0, :lo12:.LC58
+	adrp	x0, .LC99
+	add	x0, x0, :lo12:.LC99
 	bl	printf
 	mov	w0, w28
-.L1462:
+.L1616:
 	bl	nandc_set_ddr_para
-	cbz	w19, .L1441
+	cbz	w19, .L1595
 	ldr	w1, [x29, 136]
-	adrp	x0, .LC59
+	adrp	x0, .LC100
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC59
+	add	x0, x0, :lo12:.LC100
 	mov	w27, w19
 	bl	printf
-.L1441:
+.L1595:
 	mov	w0, w27
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9030,29 +9572,29 @@ flash_ddr_tunning_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1443:
+.L1597:
 	cmp	w24, w23
-	bls	.L1453
+	bls	.L1607
 	sub	w0, w28, w24
 	str	w0, [x29, 140]
 	cmp	w24, 7
-	bhi	.L1446
+	bhi	.L1600
 	mov	w23, w24
-.L1453:
+.L1607:
 	mov	w24, 0
-	b	.L1444
-.L1452:
+	b	.L1598
+.L1606:
 	mov	w28, w25
 	mov	w27, w4
 	mov	w19, 0
-.L1444:
+.L1598:
 	add	w25, w25, 2
 	cmp	w25, 50
-	bne	.L1447
-	b	.L1445
-.L1448:
+	bne	.L1601
+	b	.L1599
+.L1602:
 	ldrb	w0, [x29, 124]
-	b	.L1462
+	b	.L1616
 	.size	flash_ddr_tunning_read, .-flash_ddr_tunning_read
 	.section	.text.flash_read_page_en,"ax",@progbits
 	.align	2
@@ -9060,60 +9602,58 @@ flash_ddr_tunning_read:
 	.type	flash_read_page_en, %function
 flash_read_page_en:
 	stp	x29, x30, [sp, -96]!
-	and	w0, w0, 255
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	mov	w19, w1
-	adrp	x1, .LANCHOR15
+	and	w20, w0, 255
+	adrp	x0, .LANCHOR12
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	ldrb	w1, [x1, #:lo12:.LANCHOR15]
+	mov	w19, w1
+	ldrb	w0, [x0, #:lo12:.LANCHOR12]
+	mov	x22, x2
 	stp	x25, x26, [sp, 64]
+	mov	x23, x3
 	str	x27, [sp, 80]
-	cmp	w1, w0
-	bhi	.L1464
-	adrp	x1, .LANCHOR138
+	mov	w24, w4
+	ubfx	x21, x19, 24, 2
+	cmp	w0, w20
+	bhi	.L1618
+	adrp	x1, .LANCHOR144
 	adrp	x0, .LC0
-	mov	w2, 399
-	add	x1, x1, :lo12:.LANCHOR138
+	mov	w2, 378
+	add	x1, x1, :lo12:.LANCHOR144
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1465:
-	b	.L1465
-.L1464:
-	adrp	x1, .LANCHOR17
-	add	x1, x1, :lo12:.LANCHOR17
-	mov	x22, x2
-	mov	x23, x3
-	mov	w24, w4
-	ldrb	w20, [x1, w0, sxtw]
-	adrp	x0, .LANCHOR29
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 4, .L1466
-	adrp	x0, .LC60
+.L1618:
+	adrp	x0, .LANCHOR24
+	add	x0, x0, :lo12:.LANCHOR24
+	ldrb	w20, [x0, w20, sxtw]
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 4, .L1619
+	adrp	x0, .LC101
 	mov	w2, w19
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC60
+	add	x0, x0, :lo12:.LC101
 	bl	printf
-.L1466:
-	tst	x19, 50331648
-	bne	.L1467
-	adrp	x0, .LANCHOR18
-	adrp	x1, .LANCHOR19
-	ldrb	w0, [x0, #:lo12:.LANCHOR18]
-	cbz	w0, .L1468
-	ldrb	w0, [x1, #:lo12:.LANCHOR19]
-	cbz	w0, .L1467
-.L1468:
-	adrp	x0, .LANCHOR20
-	ldrb	w1, [x1, #:lo12:.LANCHOR19]
-	ldrh	w2, [x0, #:lo12:.LANCHOR20]
+.L1619:
+	cbnz	w21, .L1620
+	adrp	x0, .LANCHOR11
+	adrp	x1, .LANCHOR25
+	ldrb	w0, [x0, #:lo12:.LANCHOR11]
+	cbz	w0, .L1621
+	ldrb	w0, [x1, #:lo12:.LANCHOR25]
+	cbz	w0, .L1620
+.L1621:
+	adrp	x0, .LANCHOR26
+	ldrb	w1, [x1, #:lo12:.LANCHOR25]
+	ldrh	w2, [x0, #:lo12:.LANCHOR26]
 	udiv	w0, w19, w2
 	mul	w0, w0, w2
 	sub	w19, w19, w0
-	cbz	w1, .L1469
+	cbz	w1, .L1622
 	add	w19, w0, w19, lsl 1
-.L1467:
+.L1620:
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -9122,26 +9662,26 @@ flash_read_page_en:
 	bl	flash_read_page
 	mov	w21, w0
 	cmn	w0, #1
-	bne	.L1463
-	adrp	x25, .LANCHOR36
+	bne	.L1617
+	adrp	x25, .LANCHOR42
 	mov	x26, x25
-	ldrb	w27, [x25, #:lo12:.LANCHOR36]
-	cbnz	w27, .L1471
-.L1474:
-	adrp	x0, .LANCHOR139
-	ldr	x6, [x0, #:lo12:.LANCHOR139]
-	cbnz	x6, .L1472
-.L1473:
-	ldrb	w4, [x26, #:lo12:.LANCHOR36]
+	ldrb	w27, [x25, #:lo12:.LANCHOR42]
+	cbnz	w27, .L1624
+.L1627:
+	adrp	x0, .LANCHOR145
+	ldr	x6, [x0, #:lo12:.LANCHOR145]
+	cbnz	x6, .L1625
+.L1626:
+	ldrb	w4, [x26, #:lo12:.LANCHOR42]
 	mov	w3, -1
 	mov	w2, w19
 	mov	w1, 0
-	adrp	x0, .LC61
-	add	x0, x0, :lo12:.LC61
+	adrp	x0, .LC102
+	add	x0, x0, :lo12:.LC102
 	bl	printf
-	adrp	x0, .LANCHOR42
-	ldrb	w0, [x0, #:lo12:.LANCHOR42]
-	cbz	w0, .L1463
+	adrp	x0, .LANCHOR14
+	ldrb	w0, [x0, #:lo12:.LANCHOR14]
+	cbz	w0, .L1617
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -9154,26 +9694,26 @@ flash_read_page_en:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	b	flash_ddr_tunning_read
-.L1469:
-	adrp	x1, .LANCHOR21
-	add	x1, x1, :lo12:.LANCHOR21
+.L1622:
+	adrp	x1, .LANCHOR27
+	add	x1, x1, :lo12:.LANCHOR27
 	ldrh	w19, [x1, w19, uxtw 1]
 	add	w19, w19, w0
-	b	.L1467
-.L1471:
-	strb	wzr, [x25, #:lo12:.LANCHOR36]
+	b	.L1620
+.L1624:
+	strb	wzr, [x25, #:lo12:.LANCHOR42]
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
 	mov	w1, w19
 	mov	w0, w20
 	bl	flash_read_page
-	strb	w27, [x25, #:lo12:.LANCHOR36]
+	strb	w27, [x25, #:lo12:.LANCHOR42]
 	cmn	w0, #1
-	beq	.L1474
-.L1492:
+	beq	.L1627
+.L1645:
 	mov	w21, w0
-.L1463:
+.L1617:
 	mov	w0, w21
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -9182,7 +9722,7 @@ flash_read_page_en:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1472:
+.L1625:
 	mov	w5, w24
 	mov	x4, x23
 	mov	x3, x22
@@ -9191,8 +9731,8 @@ flash_read_page_en:
 	mov	w0, w20
 	blr	x6
 	cmn	w0, #1
-	bne	.L1492
-	b	.L1473
+	beq	.L1626
+	b	.L1645
 	.size	flash_read_page_en, .-flash_read_page_en
 	.section	.text.flash_get_last_written_page,"ax",@progbits
 	.align	2
@@ -9200,61 +9740,71 @@ flash_read_page_en:
 	.type	flash_get_last_written_page, %function
 flash_get_last_written_page:
 	stp	x29, x30, [sp, -96]!
-	and	w1, w1, 65535
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	and	w21, w0, 255
-	adrp	x0, .LANCHOR121
+	stp	x23, x24, [sp, 48]
+	and	w23, w0, 255
+	adrp	x0, .LANCHOR125
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
-	mov	x22, x2
-	ldrh	w19, [x0, #:lo12:.LANCHOR121]
-	adrp	x0, .LANCHOR26+26
-	stp	x23, x24, [sp, 48]
-	mov	x23, x3
-	ldrh	w25, [x0, #:lo12:.LANCHOR26+26]
+	mov	x24, x2
+	ldrh	w19, [x0, #:lo12:.LANCHOR125]
+	adrp	x0, .LANCHOR32+26
+	stp	x21, x22, [sp, 32]
+	and	w21, w1, 65535
+	ldrh	w26, [x0, #:lo12:.LANCHOR32+26]
 	sub	w19, w19, #1
 	sxth	w19, w19
-	mov	w24, w4
-	mov	w0, w21
-	str	x27, [sp, 80]
-	mul	w25, w25, w1
-	add	w1, w19, w25
+	stp	x27, x28, [sp, 80]
+	mov	x22, x3
+	mov	w25, w4
+	mov	w0, w23
+	mul	w26, w26, w21
+	add	w1, w19, w26
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L1494
-	mov	w26, 0
-	mov	w27, 2
-.L1495:
-	cmp	w26, w19
-	ble	.L1498
-.L1494:
+	bne	.L1647
+	mov	w27, 0
+	mov	w28, 2
+.L1648:
+	cmp	w27, w19
+	ble	.L1651
+.L1647:
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L1652
+	ldr	w3, [x22]
+	adrp	x0, .LC103
+	mov	w2, w19
+	mov	w1, w21
+	add	x0, x0, :lo12:.LC103
+	bl	printf
+.L1652:
 	mov	w0, w19
-	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1498:
-	add	w20, w26, w19
-	mov	w4, w24
-	mov	x3, x23
-	mov	x2, x22
-	mov	w0, w21
-	sdiv	w20, w20, w27
-	add	w1, w25, w20, sxth
+.L1651:
+	add	w20, w27, w19
+	mov	w4, w25
+	mov	x3, x22
+	mov	x2, x24
+	mov	w0, w23
+	sdiv	w20, w20, w28
+	add	w1, w26, w20, sxth
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L1496
+	bne	.L1649
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L1495
-.L1496:
+	b	.L1648
+.L1649:
 	add	w20, w20, 1
-	sxth	w26, w20
-	b	.L1495
+	sxth	w27, w20
+	b	.L1648
 	.size	flash_get_last_written_page, .-flash_get_last_written_page
 	.section	.text.flash_get_last_written_page_ext,"ax",@progbits
 	.align	2
@@ -9282,147 +9832,158 @@ flash_get_last_written_page_ext:
 	.type	flash_info_blk_init, %function
 flash_info_blk_init:
 	stp	x29, x30, [sp, -96]!
+	adrp	x0, .LANCHOR7
 	add	x29, sp, 0
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR20
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR20
 	stp	x23, x24, [sp, 48]
-	mov	w24, 21321
 	stp	x25, x26, [sp, 64]
-	adrp	x26, .LANCHOR140
-	stp	x27, x28, [sp, 80]
-	mov	x21, x26
-	add	x27, x22, :lo12:.LANCHOR20
-	stp	x19, x20, [sp, 16]
-	movk	w24, 0x5359, lsl 16
+	str	x27, [sp, 80]
+	tbz	x0, 12, .L1659
+	ldr	x4, [x20, #:lo12:.LANCHOR20]
+	adrp	x2, .LANCHOR146
+	adrp	x0, .LC104
+	mov	w3, 2048
+	add	x2, x2, :lo12:.LANCHOR146
+	mov	w1, 49
+	add	x0, x0, :lo12:.LC104
+	bl	printf
+.L1659:
+	adrp	x21, .LANCHOR147
+	adrp	x23, .LANCHOR26
+	mov	w24, 21321
+	add	x26, x23, :lo12:.LANCHOR26
+	mov	x22, x21
 	mov	w19, 4
-.L1504:
-	ldrh	w1, [x27]
-	adrp	x20, .LANCHOR12
-	ldr	x3, [x26, #:lo12:.LANCHOR140]
+	movk	w24, 0x5359, lsl 16
+.L1662:
+	ldrh	w1, [x26]
 	mov	w4, 4
-	ldr	x2, [x20, #:lo12:.LANCHOR12]
+	ldr	x3, [x21, #:lo12:.LANCHOR147]
 	mov	w0, 0
-	add	x28, x26, :lo12:.LANCHOR140
-	add	x25, x20, :lo12:.LANCHOR12
+	ldr	x2, [x20, #:lo12:.LANCHOR20]
+	add	x27, x21, :lo12:.LANCHOR147
+	add	x25, x20, :lo12:.LANCHOR20
 	mul	w1, w1, w19
-	mov	x23, x20
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L1502
-	ldr	x2, [x20, #:lo12:.LANCHOR12]
+	beq	.L1660
+	ldr	x2, [x20, #:lo12:.LANCHOR20]
 	ldr	w0, [x2]
 	cmp	w0, w24
-	beq	.L1503
-.L1502:
+	beq	.L1661
+.L1660:
 	add	w19, w19, 1
 	cmp	w19, 16
-	bne	.L1504
-.L1525:
+	bne	.L1662
+.L1686:
 	mov	w0, -1
-.L1501:
+.L1658:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
+	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1512:
+.L1670:
 	ldr	x0, [x25]
 	ldr	w1, [x0]
 	cmp	w1, w24
-	bne	.L1513
+	bne	.L1671
 	ldr	w19, [x0, 4]
-.L1506:
-	add	x24, x20, :lo12:.LANCHOR141
-	ldrh	w0, [x22, #:lo12:.LANCHOR20]
-	ldr	x3, [x21, #:lo12:.LANCHOR140]
+.L1664:
+	add	x24, x21, :lo12:.LANCHOR148
+	ldrh	w0, [x23, #:lo12:.LANCHOR26]
+	ldr	x3, [x22, #:lo12:.LANCHOR147]
 	mov	w4, 4
-	ldr	x2, [x23, #:lo12:.LANCHOR12]
+	ldr	x2, [x20, #:lo12:.LANCHOR20]
 	ldrb	w1, [x24, 1]
 	mul	w1, w1, w0
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L1507
-	ldr	x0, [x23, #:lo12:.LANCHOR12]
+	beq	.L1665
+	ldr	x0, [x20, #:lo12:.LANCHOR20]
 	mov	w1, 21321
 	movk	w1, 0x5359, lsl 16
 	ldr	w2, [x0]
 	cmp	w2, w1
-	bne	.L1507
+	bne	.L1665
 	ldr	w1, [x0, 4]
 	cmp	w19, w1
-	bcs	.L1507
+	bcs	.L1665
 	ldrb	w1, [x0, 37]
 	ldrb	w0, [x0, 36]
-	strb	w1, [x20, #:lo12:.LANCHOR141]
+	strb	w1, [x21, #:lo12:.LANCHOR148]
 	strb	w0, [x24, 1]
-.L1507:
-	ldrb	w1, [x20, #:lo12:.LANCHOR141]
-	add	x24, x20, :lo12:.LANCHOR141
-	ldr	x3, [x21, #:lo12:.LANCHOR140]
+.L1665:
+	ldrb	w1, [x21, #:lo12:.LANCHOR148]
+	add	x24, x21, :lo12:.LANCHOR148
+	ldr	x3, [x22, #:lo12:.LANCHOR147]
 	mov	w4, 4
-	ldr	x2, [x23, #:lo12:.LANCHOR12]
+	ldr	x2, [x20, #:lo12:.LANCHOR20]
 	mov	w0, 0
 	bl	flash_get_last_written_page
 	sxth	w19, w0
 	add	w0, w0, 1
-	ldrb	w20, [x20, #:lo12:.LANCHOR141]
+	ldrb	w21, [x21, #:lo12:.LANCHOR148]
 	strh	w0, [x24, 2]
-	ldrh	w0, [x22, #:lo12:.LANCHOR20]
-	mov	w22, 21321
-	movk	w22, 0x5359, lsl 16
-	madd	w20, w20, w0, w19
-.L1508:
-	tbz	w19, #31, .L1510
+	ldrh	w0, [x23, #:lo12:.LANCHOR26]
+	mov	w23, 21321
+	movk	w23, 0x5359, lsl 16
+	madd	w21, w21, w0, w19
+.L1666:
+	tbz	w19, #31, .L1668
 	cmn	w19, #1
-	bne	.L1511
-	ldr	x0, [x23, #:lo12:.LANCHOR12]
+	bne	.L1669
+	ldr	x0, [x20, #:lo12:.LANCHOR20]
 	ldr	w1, [x0]
-	adrp	x0, .LC62
-	add	x0, x0, :lo12:.LC62
+	adrp	x0, .LC105
+	add	x0, x0, :lo12:.LC105
 	bl	printf
-	b	.L1525
-.L1510:
-	ldr	x3, [x21, #:lo12:.LANCHOR140]
+	b	.L1686
+.L1668:
+	ldr	x3, [x22, #:lo12:.LANCHOR147]
 	mov	w4, 4
-	ldr	x2, [x23, #:lo12:.LANCHOR12]
-	mov	w1, w20
+	ldr	x2, [x20, #:lo12:.LANCHOR20]
+	mov	w1, w21
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L1509
-	ldr	x0, [x23, #:lo12:.LANCHOR12]
+	beq	.L1667
+	ldr	x0, [x20, #:lo12:.LANCHOR20]
 	ldr	w0, [x0]
-	cmp	w0, w22
-	bne	.L1509
-.L1511:
+	cmp	w0, w23
+	bne	.L1667
+.L1669:
 	mov	w0, 0
-	b	.L1501
-.L1509:
+	b	.L1658
+.L1667:
 	sub	w19, w19, #1
-	sub	w20, w20, #1
+	sub	w21, w21, #1
 	sxth	w19, w19
-	b	.L1508
-.L1503:
-	adrp	x20, .LANCHOR141
-	add	x1, x20, :lo12:.LANCHOR141
+	b	.L1666
+.L1661:
+	adrp	x21, .LANCHOR148
+	add	x1, x21, :lo12:.LANCHOR148
 	ldrb	w3, [x2, 37]
 	mov	w4, 4
 	ldrb	w0, [x2, 36]
 	strb	w3, [x1, 1]
-	ldrh	w1, [x27]
-	ldr	x3, [x28]
-	strb	w0, [x20, #:lo12:.LANCHOR141]
+	ldrh	w1, [x26]
+	ldr	x3, [x27]
+	strb	w0, [x21, #:lo12:.LANCHOR148]
 	mul	w1, w1, w0
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	bne	.L1512
-.L1513:
+	bne	.L1670
+.L1671:
 	mov	w19, 0
-	b	.L1506
+	b	.L1664
 	.size	flash_info_blk_init, .-flash_info_blk_init
 	.section	.text.flash_ddr_para_scan,"ax",@progbits
 	.align	2
@@ -9432,44 +9993,44 @@ flash_ddr_para_scan:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR32
+	adrp	x20, .LANCHOR39
 	stp	x21, x22, [sp, 32]
 	and	w22, w0, 255
-	ldrb	w0, [x20, #:lo12:.LANCHOR32]
-	adrp	x19, .LANCHOR42
+	ldrb	w0, [x20, #:lo12:.LANCHOR39]
+	adrp	x19, .LANCHOR14
 	stp	x23, x24, [sp, 48]
 	mov	w21, 1
 	mov	w23, w1
 	str	x25, [sp, 64]
-	strb	w21, [x19, #:lo12:.LANCHOR42]
-	adrp	x24, .LANCHOR143
+	strb	w21, [x19, #:lo12:.LANCHOR14]
+	adrp	x24, .LANCHOR150
 	bl	flash_set_interface_mode
-	adrp	x25, .LANCHOR142
-	ldrb	w0, [x20, #:lo12:.LANCHOR32]
+	adrp	x25, .LANCHOR149
+	ldrb	w0, [x20, #:lo12:.LANCHOR39]
 	bl	nandc_set_if_mode
-	ldr	x3, [x25, #:lo12:.LANCHOR142]
+	ldr	x3, [x25, #:lo12:.LANCHOR149]
 	mov	w4, 4
-	ldr	x2, [x24, #:lo12:.LANCHOR143]
+	ldr	x2, [x24, #:lo12:.LANCHOR150]
 	mov	w1, w23
 	mov	w0, w22
 	bl	flash_ddr_tunning_read
-	ldr	x3, [x25, #:lo12:.LANCHOR142]
+	ldr	x3, [x25, #:lo12:.LANCHOR149]
 	mov	w4, 4
-	ldr	x2, [x24, #:lo12:.LANCHOR143]
+	ldr	x2, [x24, #:lo12:.LANCHOR150]
 	mov	w1, w23
 	mov	w0, w22
 	bl	flash_read_page
 	cmn	w0, #1
 	mov	x0, x19
-	bne	.L1527
-	ldrb	w1, [x20, #:lo12:.LANCHOR32]
-	tbz	x1, 0, .L1527
+	bne	.L1688
+	ldrb	w1, [x20, #:lo12:.LANCHOR39]
+	tbz	x1, 0, .L1688
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, w21
 	bl	nandc_set_if_mode
-	strb	wzr, [x19, #:lo12:.LANCHOR42]
-.L1528:
+	strb	wzr, [x19, #:lo12:.LANCHOR14]
+.L1689:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -9477,10 +10038,10 @@ flash_ddr_para_scan:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1527:
+.L1688:
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR42]
-	b	.L1528
+	strb	w1, [x0, #:lo12:.LANCHOR14]
+	b	.L1689
 	.size	flash_ddr_para_scan, .-flash_ddr_para_scan
 	.section	.text.flash_complete_page_read,"ax",@progbits
 	.align	2
@@ -9489,107 +10050,116 @@ flash_ddr_para_scan:
 flash_complete_page_read:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w19, w0, 2097151
 	stp	x23, x24, [sp, 48]
 	mov	w23, w0
-	adrp	x0, .LANCHOR15
-	stp	x19, x20, [sp, 16]
+	adrp	x0, .LANCHOR12
 	stp	x21, x22, [sp, 32]
-	mov	x24, x1
-	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	ubfx	x1, x23, 21, 3
 	stp	x25, x26, [sp, 64]
+	ubfx	x20, x23, 21, 3
+	ldrb	w0, [x0, #:lo12:.LANCHOR12]
+	mov	x24, x1
 	stp	x27, x28, [sp, 80]
-	cmp	w0, w1
-	bhi	.L1534
-	adrp	x1, .LANCHOR144
+	mov	x25, x2
+	ubfx	x21, x23, 24, 2
+	cmp	w0, w20
+	bhi	.L1695
+	adrp	x1, .LANCHOR151
 	adrp	x0, .LC0
-	mov	w2, 812
-	add	x1, x1, :lo12:.LANCHOR144
+	mov	w2, 789
+	add	x1, x1, :lo12:.LANCHOR151
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1535:
-	b	.L1535
-.L1534:
-	adrp	x0, .LANCHOR17
-	add	x0, x0, :lo12:.LANCHOR17
-	ubfx	x21, x23, 24, 2
-	mov	x25, x2
-	and	w19, w23, 2097151
-	ldrb	w22, [x0, w1, sxtw]
-	adrp	x0, .LANCHOR13
-	ldr	x4, [x0, #:lo12:.LANCHOR13]
+.L1695:
+	adrp	x0, .LANCHOR24
+	add	x0, x0, :lo12:.LANCHOR24
+	ldrb	w22, [x0, w20, sxtw]
+	adrp	x0, .LANCHOR21
+	ldr	x4, [x0, #:lo12:.LANCHOR21]
 	mov	w0, w22
 	bl	nandc_cs
-	cbnz	w21, .L1536
-	adrp	x0, .LANCHOR18
-	adrp	x1, .LANCHOR19
-	ldrb	w0, [x0, #:lo12:.LANCHOR18]
-	cbz	w0, .L1537
-	ldrb	w0, [x1, #:lo12:.LANCHOR19]
-	cbz	w0, .L1536
-.L1537:
-	adrp	x0, .LANCHOR20
-	ldrb	w1, [x1, #:lo12:.LANCHOR19]
-	ldrh	w2, [x0, #:lo12:.LANCHOR20]
+	cbnz	w21, .L1696
+	adrp	x0, .LANCHOR11
+	adrp	x1, .LANCHOR25
+	ldrb	w0, [x0, #:lo12:.LANCHOR11]
+	cbz	w0, .L1697
+	ldrb	w0, [x1, #:lo12:.LANCHOR25]
+	cbz	w0, .L1696
+.L1697:
+	adrp	x0, .LANCHOR26
+	ldrb	w1, [x1, #:lo12:.LANCHOR25]
+	ldrh	w2, [x0, #:lo12:.LANCHOR26]
 	udiv	w0, w19, w2
 	mul	w0, w0, w2
 	sub	w19, w19, w0
-	cbz	w1, .L1538
+	cbz	w1, .L1698
 	add	w19, w0, w19, lsl 1
-.L1536:
+.L1696:
 	ubfiz	x0, x22, 8, 8
 	mov	w1, 5
 	add	x0, x4, x0
-	adrp	x20, .LANCHOR26
-	add	x28, x20, :lo12:.LANCHOR26
-	mov	x4, x25
-	mov	x3, x24
 	str	w1, [x0, 2056]
 	and	w1, w19, 255
 	str	wzr, [x0, 2052]
 	str	wzr, [x0, 2052]
 	str	w1, [x0, 2052]
 	lsr	w1, w19, 8
-	ldrb	w2, [x28, 9]
 	str	w1, [x0, 2052]
 	lsr	w1, w19, 16
 	str	w1, [x0, 2052]
 	mov	w1, 224
 	str	w1, [x0, 2056]
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrb	w0, [x0, 12]
+	cmp	w0, 3
+	bne	.L1699
+	cbz	w21, .L1699
+	sub	w0, w21, #1
+	add	w1, w19, w19, lsl 1
+	add	w0, w0, w1
+.L1732:
+	adrp	x20, .LANCHOR32
+	add	x28, x20, :lo12:.LANCHOR32
+	bl	nandc_set_seed
+	mov	x4, x25
+	mov	x3, x24
+	ldrb	w2, [x28, 9]
 	mov	w1, 0
 	mov	w0, w22
 	bl	nandc_xfer
 	cmn	w0, #1
-	bne	.L1539
-	adrp	x26, .LANCHOR36
-	ldrb	w27, [x26, #:lo12:.LANCHOR36]
-	cbz	w27, .L1540
+	bne	.L1701
+	adrp	x26, .LANCHOR42
+	ldrb	w27, [x26, #:lo12:.LANCHOR42]
+	cbz	w27, .L1702
 	ldrb	w4, [x28, 9]
 	mov	x3, x25
-	strb	wzr, [x26, #:lo12:.LANCHOR36]
+	strb	wzr, [x26, #:lo12:.LANCHOR42]
 	mov	x2, x24
 	orr	w1, w19, w21, lsl 24
 	mov	w0, w22
 	bl	flash_read_page
-	strb	w27, [x26, #:lo12:.LANCHOR36]
-	cbnz	w21, .L1541
-.L1546:
-	adrp	x1, .LANCHOR18
-	ldrb	w1, [x1, #:lo12:.LANCHOR18]
-	cbz	w1, .L1541
-	adrp	x1, .LANCHOR34
-	ldrb	w1, [x1, #:lo12:.LANCHOR34]
+	strb	w27, [x26, #:lo12:.LANCHOR42]
+	cbnz	w21, .L1703
+.L1708:
+	adrp	x1, .LANCHOR11
+	ldrb	w1, [x1, #:lo12:.LANCHOR11]
+	cbz	w1, .L1703
+	adrp	x1, .LANCHOR40
+	ldrb	w1, [x1, #:lo12:.LANCHOR40]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	blt	.L1541
-	add	x20, x20, :lo12:.LANCHOR26
+	blt	.L1703
+	add	x20, x20, :lo12:.LANCHOR32
 	ldrb	w1, [x20, 19]
 	sub	w1, w1, #4
 	and	w1, w1, 255
 	cmp	w1, 3
 	mov	w1, 256
 	csel	w0, w0, w1, hi
-.L1533:
+.L1694:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9597,35 +10167,38 @@ flash_complete_page_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1538:
-	adrp	x1, .LANCHOR21
-	add	x1, x1, :lo12:.LANCHOR21
+.L1698:
+	adrp	x1, .LANCHOR27
+	add	x1, x1, :lo12:.LANCHOR27
 	ldrh	w19, [x1, w19, uxtw 1]
 	add	w19, w19, w0
-	b	.L1536
-.L1541:
-	cmn	w0, #1
-	bne	.L1533
-.L1547:
-	adrp	x0, .LANCHOR139
-	ldr	x6, [x0, #:lo12:.LANCHOR139]
-	cbnz	x6, .L1543
-.L1545:
-	adrp	x0, .LANCHOR36
+	b	.L1696
+.L1699:
+	mov	w0, w19
+	b	.L1732
+.L1703:
+	cmn	w0, #1
+	bne	.L1694
+.L1709:
+	adrp	x0, .LANCHOR145
+	ldr	x6, [x0, #:lo12:.LANCHOR145]
+	cbnz	x6, .L1705
+.L1707:
+	adrp	x0, .LANCHOR42
 	mov	w3, -1
 	mov	w2, w23
 	mov	w1, 0
-	ldrb	w4, [x0, #:lo12:.LANCHOR36]
-	adrp	x0, .LC63
-	add	x0, x0, :lo12:.LC63
+	ldrb	w4, [x0, #:lo12:.LANCHOR42]
+	adrp	x0, .LC106
+	add	x0, x0, :lo12:.LC106
 	bl	printf
-	adrp	x0, .LANCHOR42
-	ldrb	w0, [x0, #:lo12:.LANCHOR42]
-	cbnz	w0, .L1544
+	adrp	x0, .LANCHOR14
+	ldrb	w0, [x0, #:lo12:.LANCHOR14]
+	cbnz	w0, .L1706
 	mov	w0, -1
-	b	.L1533
-.L1543:
-	add	x0, x20, :lo12:.LANCHOR26
+	b	.L1694
+.L1705:
+	add	x0, x20, :lo12:.LANCHOR32
 	mov	x4, x25
 	mov	x3, x24
 	mov	w2, w19
@@ -9634,10 +10207,10 @@ flash_complete_page_read:
 	mov	w0, w22
 	blr	x6
 	cmn	w0, #1
-	beq	.L1545
-	b	.L1533
-.L1544:
-	add	x20, x20, :lo12:.LANCHOR26
+	beq	.L1707
+	b	.L1694
+.L1706:
+	add	x20, x20, :lo12:.LANCHOR32
 	orr	w1, w19, w21, lsl 24
 	mov	x3, x25
 	mov	x2, x24
@@ -9650,67 +10223,67 @@ flash_complete_page_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	flash_ddr_tunning_read
-.L1539:
-	cbnz	w21, .L1533
-	b	.L1546
-.L1540:
-	cbz	w21, .L1546
-	b	.L1547
+.L1702:
+	cbz	w21, .L1708
+	b	.L1709
+.L1701:
+	cbnz	w21, .L1694
+	b	.L1708
 	.size	flash_complete_page_read, .-flash_complete_page_read
 	.section	.text.queue_wait_first_req_completed,"ax",@progbits
 	.align	2
 	.type	queue_wait_first_req_completed, %function
 queue_wait_first_req_completed:
 	stp	x29, x30, [sp, -64]!
-	adrp	x0, .LANCHOR114
+	adrp	x0, .LANCHOR117
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	ldrb	w0, [x0, #:lo12:.LANCHOR114]
+	ldrb	w0, [x0, #:lo12:.LANCHOR117]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	cmp	w0, 255
-	bne	.L1568
-.L1586:
+	bne	.L1734
+.L1752:
 	mov	w21, 0
-	b	.L1567
-.L1568:
-	adrp	x19, .LANCHOR43
+	b	.L1733
+.L1734:
+	adrp	x19, .LANCHOR46
 	sxtw	x22, w0
-	add	x1, x19, :lo12:.LANCHOR43
+	add	x1, x19, :lo12:.LANCHOR46
 	add	x1, x1, x22, lsl 6
 	ldrb	w2, [x1, 58]
 	ldr	w21, [x1, 40]
 	sub	w3, w2, #1
 	cmp	w3, 9
-	bhi	.L1586
-	adrp	x1, .L1571
-	add	x1, x1, :lo12:.L1571
+	bhi	.L1752
+	adrp	x1, .L1737
+	add	x1, x1, :lo12:.L1737
 	ldrb	w1, [x1,w3,uxtw]
-	adr	x3, .Lrtx1571
+	adr	x3, .Lrtx1737
 	add	x1, x3, w1, sxtb #2
 	br	x1
-.Lrtx1571:
+.Lrtx1737:
 	.section	.rodata.queue_wait_first_req_completed,"a",@progbits
 	.align	0
 	.align	2
-.L1571:
-	.byte	(.L1570 - .Lrtx1571) / 4
-	.byte	(.L1570 - .Lrtx1571) / 4
-	.byte	(.L1572 - .Lrtx1571) / 4
-	.byte	(.L1572 - .Lrtx1571) / 4
-	.byte	(.L1572 - .Lrtx1571) / 4
-	.byte	(.L1573 - .Lrtx1571) / 4
-	.byte	(.L1574 - .Lrtx1571) / 4
-	.byte	(.L1575 - .Lrtx1571) / 4
-	.byte	(.L1572 - .Lrtx1571) / 4
-	.byte	(.L1575 - .Lrtx1571) / 4
+.L1737:
+	.byte	(.L1736 - .Lrtx1737) / 4
+	.byte	(.L1736 - .Lrtx1737) / 4
+	.byte	(.L1738 - .Lrtx1737) / 4
+	.byte	(.L1738 - .Lrtx1737) / 4
+	.byte	(.L1738 - .Lrtx1737) / 4
+	.byte	(.L1739 - .Lrtx1737) / 4
+	.byte	(.L1740 - .Lrtx1737) / 4
+	.byte	(.L1741 - .Lrtx1737) / 4
+	.byte	(.L1738 - .Lrtx1737) / 4
+	.byte	(.L1741 - .Lrtx1737) / 4
 	.section	.text.queue_wait_first_req_completed
-.L1570:
+.L1736:
 	mov	w1, 64
 	mov	w0, w21
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1586
-	add	x19, x19, :lo12:.LANCHOR43
+	tbz	x0, 6, .L1752
+	add	x19, x19, :lo12:.LANCHOR46
 	add	x19, x19, x22, lsl 6
 	ldp	x1, x0, [x19, 8]
 	ldr	x2, [x19, 24]
@@ -9724,128 +10297,128 @@ queue_wait_first_req_completed:
 	ldrb	w0, [x19, 2]
 	orr	w0, w0, 8
 	strb	w0, [x19, 2]
-	b	.L1586
-.L1572:
+	b	.L1752
+.L1738:
 	mov	w0, w21
 	mov	w1, 64
 	bl	flash_wait_device_ready
 	mov	w21, w0
-	tbz	x21, 6, .L1586
-	add	x19, x19, :lo12:.LANCHOR43
+	tbz	x21, 6, .L1752
+	add	x19, x19, :lo12:.LANCHOR46
 	mov	w0, 5
 	add	x19, x19, x22, lsl 6
 	tst	w21, w0
-	beq	.L1585
+	beq	.L1751
 	ldrb	w1, [x19, 1]
 	mov	w0, 11
 	ldr	w3, [x19, 40]
 	mov	w4, 11
 	ldr	w2, [x19, 52]
 	strb	w0, [x19, 58]
-	adrp	x0, .LC64
-	add	x0, x0, :lo12:.LC64
+	adrp	x0, .LC107
+	add	x0, x0, :lo12:.LC107
 	bl	printf
-.L1604:
+.L1770:
 	mov	w0, -1
 	str	w0, [x19, 52]
-	b	.L1567
-.L1575:
+	b	.L1733
+.L1741:
 	cmp	w2, 10
-	add	x20, x19, :lo12:.LANCHOR43
+	add	x20, x19, :lo12:.LANCHOR46
 	ubfiz	x0, x0, 6, 8
 	mov	w1, 3
 	mov	w2, 9
 	add	x0, x20, x0
 	csel	w2, w2, w1, eq
 	ubfx	x3, x21, 21, 3
-.L1580:
+.L1746:
 	ldrb	w1, [x0]
 	cmp	w1, 255
-	bne	.L1584
+	bne	.L1750
 	mov	w21, -1
-	b	.L1567
-.L1584:
+	b	.L1733
+.L1750:
 	sxtw	x23, w1
 	ubfiz	x0, x1, 6, 8
 	add	x1, x20, x23, lsl 6
 	add	x0, x20, x0
 	ldrb	w4, [x1, 58]
 	cmp	w4, w2
-	bne	.L1580
+	bne	.L1746
 	ldr	w1, [x1, 40]
 	ubfx	x1, x1, 21, 3
 	cmp	w3, w1
-	bne	.L1580
+	bne	.L1746
 	mov	w0, w21
 	mov	w1, 64
 	bl	flash_wait_device_ready
 	mov	w24, w0
 	and	w21, w0, 64
-	tbz	x24, 6, .L1582
+	tbz	x24, 6, .L1748
 	add	x20, x20, x22, lsl 6
 	ands	w21, w0, 15
-	beq	.L1583
+	beq	.L1749
 	ldrb	w1, [x20, 1]
 	mov	w4, 11
 	ldr	w3, [x20, 40]
-	adrp	x0, .LC64
+	adrp	x0, .LC107
 	ldr	w2, [x20, 52]
-	add	x0, x0, :lo12:.LC64
+	add	x0, x0, :lo12:.LC107
 	mov	w21, w24
 	bl	printf
 	mov	w0, 11
 	strb	w0, [x20, 58]
 	mov	w0, -1
 	str	w0, [x20, 52]
-.L1582:
-	add	x1, x19, :lo12:.LANCHOR43
+.L1748:
+	add	x1, x19, :lo12:.LANCHOR46
 	add	x22, x1, x22, lsl 6
 	add	x1, x1, x23, lsl 6
 	ldrb	w0, [x22, 58]
 	strb	w0, [x1, 58]
 	ldr	w0, [x22, 52]
 	str	w0, [x1, 52]
-.L1567:
+.L1733:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1583:
+.L1749:
 	mov	w0, 12
 	str	wzr, [x20, 52]
 	strb	w0, [x20, 58]
-	b	.L1582
-.L1573:
+	b	.L1748
+.L1739:
 	mov	w0, w21
 	mov	w1, 32
 	bl	flash_wait_device_ready
 	mov	w21, w0
-	tbz	x21, 5, .L1586
-	add	x19, x19, :lo12:.LANCHOR43
+	tbz	x21, 5, .L1752
+	add	x19, x19, :lo12:.LANCHOR46
 	tst	x21, 15
 	add	x19, x19, x22, lsl 6
-	beq	.L1585
+	beq	.L1751
 	mov	w0, 11
 	strb	w0, [x19, 58]
-	b	.L1604
-.L1585:
+	b	.L1770
+.L1751:
 	mov	w0, 12
 	str	wzr, [x19, 52]
 	strb	w0, [x19, 58]
-	b	.L1586
-.L1574:
+	b	.L1752
+.L1740:
 	mov	w1, 64
 	mov	w0, w21
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1586
-	add	x19, x19, :lo12:.LANCHOR43
+	tbz	x0, 6, .L1752
+	add	x19, x19, :lo12:.LANCHOR46
 	add	x19, x19, x22, lsl 6
 	str	w0, [x19, 52]
 	mov	w0, 6
 	strb	w0, [x19, 58]
-	b	.L1586
+	b	.L1752
 	.size	queue_wait_first_req_completed, .-queue_wait_first_req_completed
 	.section	.text.sblk_wait_write_queue_completed,"ax",@progbits
 	.align	2
@@ -9855,19 +10428,19 @@ sblk_wait_write_queue_completed:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR114
-	add	x19, x19, :lo12:.LANCHOR114
-.L1606:
+	adrp	x19, .LANCHOR117
+	add	x19, x19, :lo12:.LANCHOR117
+.L1772:
 	ldrb	w0, [x19]
 	cmp	w0, 255
-	bne	.L1607
+	bne	.L1773
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1607:
+.L1773:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L1606
+	b	.L1772
 	.size	sblk_wait_write_queue_completed, .-sblk_wait_write_queue_completed
 	.section	.text.ftl_read_page,"ax",@progbits
 	.align	2
@@ -9926,49 +10499,49 @@ ftl_read_ppa_page:
 	.type	ftl_open_sblk_read_test, %function
 ftl_open_sblk_read_test:
 	stp	x29, x30, [sp, -96]!
-	and	w13, w0, 65535
-	mov	w0, w13
+	and	w14, w0, 65535
+	mov	w0, w14
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	adrp	x23, .LANCHOR80
-	adrp	x24, .LANCHOR52
+	adrp	x24, .LANCHOR114
 	add	x23, x23, :lo12:.LANCHOR80
-	add	x24, x24, :lo12:.LANCHOR52
+	add	x24, x24, :lo12:.LANCHOR114
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	add	x1, x29, 80
 	mov	w20, 0
 	bl	ftl_get_blk_list_in_sblk
 	strb	w0, [x29, 73]
-	strh	w13, [x29, 64]
-.L1614:
+	strh	w14, [x29, 64]
+.L1780:
 	ldrh	w0, [x23]
 	cmp	w0, w20
-	bls	.L1613
+	bls	.L1779
 	adrp	x22, .LANCHOR72
-	adrp	x21, .LANCHOR145
+	adrp	x21, .LANCHOR152
 	mov	w19, 0
 	add	x22, x22, :lo12:.LANCHOR72
-	add	x21, x21, :lo12:.LANCHOR145
-	b	.L1616
-.L1619:
+	add	x21, x21, :lo12:.LANCHOR152
+	b	.L1782
+.L1785:
 	add	x0, x29, 64
 	mov	w1, 65535
 	add	x0, x0, x19, sxtw 1
 	ldrh	w0, [x0, 16]
 	cmp	w0, w1
-	bne	.L1615
-.L1618:
+	bne	.L1781
+.L1784:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-.L1616:
+.L1782:
 	ldrb	w0, [x22]
 	cmp	w0, w19
-	bhi	.L1619
+	bhi	.L1785
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L1614
-.L1615:
+	b	.L1780
+.L1781:
 	adrp	x1, .LANCHOR99
 	ldrb	w3, [x24]
 	mov	x2, x21
@@ -9978,8 +10551,8 @@ ftl_open_sblk_read_test:
 	madd	w0, w4, w0, w20
 	bl	ftl_read_ppa_page
 	cmp	w0, 512
-	bne	.L1618
-.L1613:
+	bne	.L1784
+.L1779:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9999,19 +10572,19 @@ sblk_read_page:
 	mov	w22, w21
 	stp	x23, x24, [sp, 48]
 	mov	x20, x0
-	adrp	x23, .LANCHOR114
-	adrp	x24, .LANCHOR43
+	adrp	x23, .LANCHOR117
+	adrp	x24, .LANCHOR46
 	mov	x19, x0
-	add	x23, x23, :lo12:.LANCHOR114
-	add	x24, x24, :lo12:.LANCHOR43
+	add	x23, x23, :lo12:.LANCHOR117
+	add	x24, x24, :lo12:.LANCHOR46
 	stp	x25, x26, [sp, 64]
-.L1625:
-	cbnz	w22, .L1629
-.L1637:
-	adrp	x19, .LANCHOR43
-	add	x19, x19, :lo12:.LANCHOR43
-.L1630:
-	cbnz	w21, .L1633
+.L1791:
+	cbnz	w22, .L1795
+.L1803:
+	adrp	x19, .LANCHOR46
+	add	x19, x19, :lo12:.LANCHOR46
+.L1796:
+	cbnz	w21, .L1799
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10019,14 +10592,14 @@ sblk_read_page:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1629:
+.L1795:
 	ldrb	w25, [x19]
 	ldr	w26, [x19, 40]
-.L1626:
+.L1792:
 	mov	w1, 0
 	mov	w0, w26
 	bl	queue_lun_state
-	cbnz	w0, .L1627
+	cbnz	w0, .L1793
 	ldr	w1, [x19, 40]
 	mov	w0, 48
 	bl	flash_start_page_read
@@ -10039,26 +10612,26 @@ sblk_read_page:
 	mov	x0, x23
 	bl	buf_add_tail
 	subs	w22, w22, #1
-	beq	.L1637
+	beq	.L1803
 	ubfiz	x19, x25, 6, 8
 	add	x19, x24, x19
-	b	.L1625
-.L1627:
+	b	.L1791
+.L1793:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L1626
-.L1633:
+	b	.L1792
+.L1799:
 	ldrb	w0, [x20, 58]
 	cmp	w0, 12
-	bne	.L1631
+	bne	.L1797
 	ldrb	w20, [x20]
 	sub	w21, w21, #1
 	add	x20, x19, x20, lsl 6
-	b	.L1630
-.L1631:
+	b	.L1796
+.L1797:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L1630
+	b	.L1796
 	.size	sblk_read_page, .-sblk_read_page
 	.section	.text.gc_check_data_one_wl,"ax",@progbits
 	.align	2
@@ -10071,105 +10644,103 @@ gc_check_data_one_wl:
 	add	x29, sp, 16
 	stp	x19, x20, [sp, 32]
 	adrp	x19, .LANCHOR63
+	add	x20, x19, :lo12:.LANCHOR63
 	stp	x21, x22, [sp, 48]
-	add	x21, x19, :lo12:.LANCHOR63
-	ldr	x20, [x0, #:lo12:.LANCHOR5]
+	ldr	x21, [x0, #:lo12:.LANCHOR5]
 	stp	x23, x24, [sp, 64]
-	ldr	x0, [x21, 8]
+	ldr	x0, [x20, 8]
 	stp	x25, x26, [sp, 80]
 	str	x27, [sp, 96]
-	cbnz	x0, .L1640
+	cbnz	x0, .L1806
 	mov	w0, 1
 	bl	buf_alloc
-	str	x0, [x21, 8]
-.L1640:
+	str	x0, [x20, 8]
+.L1806:
 	add	x0, x19, :lo12:.LANCHOR63
-	ldr	x21, [x0, 8]
-	cbz	x21, .L1641
+	ldr	x20, [x0, 8]
+	cbnz	x20, .L1807
+	adrp	x1, .LANCHOR153
+	adrp	x0, .LC0
+	mov	w2, 348
+	add	x1, x1, :lo12:.LANCHOR153
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1807:
 	adrp	x26, .LANCHOR99
 	adrp	x27, .LANCHOR67
-	add	x25, x20, 96
+	add	x25, x21, 96
 	add	x26, x26, :lo12:.LANCHOR99
 	add	x27, x27, :lo12:.LANCHOR67
 	mov	w24, 0
-.L1642:
-	ldrb	w0, [x20, 89]
+.L1808:
+	ldrb	w0, [x21, 89]
 	cmp	w24, w0
-	bge	.L1652
+	bge	.L1817
 	mov	w23, 1
 	add	x22, x19, :lo12:.LANCHOR63
-	b	.L1653
-.L1641:
-	adrp	x1, .LANCHOR146
-	adrp	x0, .LC0
-	mov	w2, 348
-	add	x1, x1, :lo12:.LANCHOR146
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1643:
-	b	.L1643
-.L1651:
+	b	.L1818
+.L1816:
 	ldrh	w0, [x25]
 	ldrh	w1, [x26]
 	ldrb	w2, [x27]
 	cmp	w2, 3
 	mul	w1, w0, w1
 	ldrh	w0, [x22, 16]
-	bne	.L1644
+	bne	.L1809
 	add	w0, w0, w1
 	orr	w0, w0, w23, lsl 24
-.L1664:
-	str	w0, [x21, 40]
+.L1829:
+	str	w0, [x20, 40]
 	mov	w1, 1
-	mov	x0, x21
+	mov	x0, x20
 	bl	sblk_read_page
-	ldr	w2, [x21, 52]
-	adrp	x1, .LANCHOR131
+	ldr	w2, [x20, 52]
+	adrp	x1, .LANCHOR136
 	cmn	w2, #1
-	beq	.L1647
+	beq	.L1812
 	ldrh	w0, [x22, 22]
-	ldr	x4, [x1, #:lo12:.LANCHOR131]
-	ldr	x3, [x21, 24]
+	ldr	x4, [x1, #:lo12:.LANCHOR136]
+	ldr	x3, [x20, 24]
 	lsl	x0, x0, 2
 	ldr	w5, [x4, x0]
 	ldr	w4, [x3, 4]
 	cmp	w5, w4
-	bne	.L1647
-	adrp	x4, .LANCHOR132
-	ldr	x4, [x4, #:lo12:.LANCHOR132]
+	bne	.L1812
+	adrp	x4, .LANCHOR137
+	ldr	x4, [x4, #:lo12:.LANCHOR137]
 	ldr	w4, [x4, x0]
 	ldr	w0, [x3, 8]
 	cmp	w4, w0
-	beq	.L1648
-.L1647:
+	beq	.L1813
+.L1812:
 	ldrh	w0, [x22, 22]
-	ldr	x1, [x1, #:lo12:.LANCHOR131]
+	ldr	x1, [x1, #:lo12:.LANCHOR136]
 	lsl	x0, x0, 2
 	ldr	w3, [x1, x0]
 	cmn	w3, #1
-	beq	.L1648
-	adrp	x1, .LANCHOR29
-	ldr	w1, [x1, #:lo12:.LANCHOR29]
-	tbz	x1, 10, .L1649
-	ldr	x1, [x21, 24]
-	adrp	x4, .LANCHOR132
-	ldr	x4, [x4, #:lo12:.LANCHOR132]
+	beq	.L1813
+	adrp	x1, .LANCHOR7
+	ldr	w1, [x1, #:lo12:.LANCHOR7]
+	tbz	x1, 10, .L1814
+	ldr	x1, [x20, 24]
+	adrp	x4, .LANCHOR137
+	ldr	x4, [x4, #:lo12:.LANCHOR137]
 	ldr	w5, [x1, 12]
 	str	w5, [sp]
 	ldr	w4, [x4, x0]
-	adrp	x0, .LC65
+	adrp	x0, .LC108
 	ldp	w5, w6, [x1]
-	add	x0, x0, :lo12:.LC65
+	add	x0, x0, :lo12:.LC108
 	ldr	w7, [x1, 8]
-	ldr	w1, [x21, 40]
+	ldr	w1, [x20, 40]
 	bl	printf
-.L1649:
+.L1814:
 	adrp	x0, .LANCHOR4
-	ldrh	w1, [x20, 80]
+	ldrh	w1, [x21, 80]
 	ldr	x0, [x0, #:lo12:.LANCHOR4]
 	strh	wzr, [x0, x1, lsl 1]
 	mov	w0, -1
-.L1639:
+.L1805:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -10178,37 +10749,37 @@ gc_check_data_one_wl:
 	ldr	x27, [sp, 96]
 	add	sp, sp, 112
 	ret
-.L1644:
+.L1809:
 	cmp	w2, 2
-	bne	.L1646
+	bne	.L1811
 	sub	w0, w0, #1
 	add	w1, w23, w1
 	add	w0, w0, w1
 	orr	w0, w0, 33554432
-	b	.L1664
-.L1646:
+	b	.L1829
+.L1811:
 	add	w0, w0, w1
-	b	.L1664
-.L1648:
+	b	.L1829
+.L1813:
 	ldrh	w0, [x22, 22]
 	add	w23, w23, 1
 	add	w0, w0, 1
 	strh	w0, [x22, 22]
-.L1653:
+.L1818:
 	ldrh	w0, [x22, 20]
 	cmp	w23, w0
-	ble	.L1651
+	ble	.L1816
 	add	w24, w24, 1
 	add	x25, x25, 2
-	b	.L1642
-.L1652:
-.L1650:
+	b	.L1808
+.L1817:
+.L1815:
 	add	x19, x19, :lo12:.LANCHOR63
 	ldrh	w0, [x19, 16]
 	add	w0, w0, 1
 	strh	w0, [x19, 16]
 	mov	w0, 0
-	b	.L1639
+	b	.L1805
 	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
 	.section	.text.flash_prog_page,"ax",@progbits
 	.align	2
@@ -10219,77 +10790,87 @@ flash_prog_page:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 255
-	adrp	x0, .LANCHOR13
-	stp	x23, x24, [sp, 48]
 	stp	x21, x22, [sp, 32]
-	and	x19, x20, 255
-	ldr	x24, [x0, #:lo12:.LANCHOR13]
-	adrp	x0, .LANCHOR29
+	adrp	x0, .LANCHOR21
+	adrp	x22, .LANCHOR7
 	stp	x25, x26, [sp, 64]
+	ldr	x25, [x0, #:lo12:.LANCHOR21]
 	mov	w21, w1
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	add	x22, x19, 8
-	str	x27, [sp, 80]
-	mov	x25, x2
-	mov	x26, x3
-	add	x22, x24, x22, lsl 8
-	and	w23, w1, 2097151
-	ubfx	x27, x21, 24, 2
-	tbz	x0, 4, .L1666
-	adrp	x0, .LC66
+	ldr	w0, [x22, #:lo12:.LANCHOR7]
+	and	x19, x20, 255
+	stp	x23, x24, [sp, 48]
+	add	x23, x19, 8
+	stp	x27, x28, [sp, 80]
+	mov	x26, x2
+	mov	x27, x3
+	add	x23, x25, x23, lsl 8
+	and	w24, w1, 2097151
+	ubfx	x28, x21, 24, 2
+	tbz	x0, 4, .L1831
+	adrp	x0, .LC109
 	mov	w3, w4
-	mov	w2, w27
-	add	x0, x0, :lo12:.LC66
+	mov	w2, w28
+	add	x0, x0, :lo12:.LC109
 	bl	printf
-.L1666:
+.L1831:
 	bl	nandc_wait_flash_ready
 	mov	w0, w20
 	bl	hynix_reconfig_rr_para
 	mov	w0, w20
 	bl	nandc_cs
 	mov	w0, w20
-	cbnz	w27, .L1667
+	cbnz	w28, .L1832
 	bl	zftl_flash_enter_slc_mode
-.L1668:
-	add	x19, x24, x19, lsl 8
+.L1833:
+	add	x19, x25, x19, lsl 8
 	mov	w0, 128
-	and	w21, w21, 255
 	str	w0, [x19, 2056]
-	lsr	w0, w23, 8
+	and	w0, w21, 255
 	str	wzr, [x19, 2052]
 	str	wzr, [x19, 2052]
-	str	w21, [x19, 2052]
 	str	w0, [x19, 2052]
-	lsr	w0, w23, 16
+	lsr	w0, w24, 8
 	str	w0, [x19, 2052]
-	mov	w0, w23
+	lsr	w0, w24, 16
+	str	w0, [x19, 2052]
+	mov	w0, w24
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR26+9
-	mov	x3, x26
-	mov	x2, x25
-	ldrb	w1, [x0, #:lo12:.LANCHOR26+9]
+	adrp	x0, .LANCHOR32+9
+	mov	x3, x27
+	mov	x2, x26
+	ldrb	w1, [x0, #:lo12:.LANCHOR32+9]
 	mov	w0, 1
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
 	mov	w0, 16
 	str	w0, [x19, 2056]
 	bl	nandc_wait_flash_ready
-	mov	x0, x22
+	mov	x0, x23
 	bl	flash_read_status
 	mov	w2, w0
 	mov	w0, w20
 	bl	nandc_de_cs
-	ldr	x27, [sp, 80]
-	and	w0, w2, 4
+	and	w19, w2, 4
+	tbz	x2, 2, .L1830
+	ldr	w0, [x22, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L1830
+	adrp	x0, .LC110
+	mov	w2, w19
+	mov	w1, w21
+	add	x0, x0, :lo12:.LC110
+	bl	printf
+.L1830:
+	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1667:
+.L1832:
 	bl	zftl_flash_exit_slc_mode
-	b	.L1668
+	b	.L1833
 	.size	flash_prog_page, .-flash_prog_page
 	.section	.text.flash_test_blk,"ax",@progbits
 	.align	2
@@ -10303,146 +10884,724 @@ flash_test_blk:
 	stp	x21, x22, [sp, 32]
 	ands	w21, w0, 255
 	str	x23, [sp, 48]
-	bne	.L1674
-	adrp	x0, .LANCHOR147
-	ldrb	w0, [x0, #:lo12:.LANCHOR147]
+	bne	.L1846
+	adrp	x0, .LANCHOR154
+	ldrb	w0, [x0, #:lo12:.LANCHOR154]
 	cmp	w0, w19
-	bhi	.L1678
-.L1674:
-	adrp	x22, .LANCHOR142
-	adrp	x23, .LANCHOR143
+	bhi	.L1850
+.L1846:
+	adrp	x22, .LANCHOR149
+	adrp	x23, .LANCHOR150
 	mov	w2, 32
 	mov	w1, 165
-	ldr	x0, [x22, #:lo12:.LANCHOR142]
+	ldr	x0, [x22, #:lo12:.LANCHOR149]
 	bl	ftl_memset
-	ldr	x0, [x23, #:lo12:.LANCHOR143]
+	ldr	x0, [x23, #:lo12:.LANCHOR150]
 	mov	w2, 8
 	mov	w1, 90
 	bl	ftl_memset
-	adrp	x0, .LANCHOR20
-	ldrh	w20, [x0, #:lo12:.LANCHOR20]
+	adrp	x0, .LANCHOR26
+	ldrh	w20, [x0, #:lo12:.LANCHOR26]
 	mov	w0, w21
 	mul	w20, w20, w19
 	mov	w1, w20
 	bl	flash_erase_block
-	cmn	w0, #1
-	beq	.L1676
-	adrp	x19, .LANCHOR26
-	add	x19, x19, :lo12:.LANCHOR26
-	ldr	x3, [x22, #:lo12:.LANCHOR142]
-	mov	w1, w20
-	ldr	x2, [x23, #:lo12:.LANCHOR143]
-	mov	w0, w21
-	ldrb	w4, [x19, 9]
+	cmn	w0, #1
+	beq	.L1848
+	adrp	x19, .LANCHOR32
+	add	x19, x19, :lo12:.LANCHOR32
+	ldr	x3, [x22, #:lo12:.LANCHOR149]
+	mov	w1, w20
+	ldr	x2, [x23, #:lo12:.LANCHOR150]
+	mov	w0, w21
+	ldrb	w4, [x19, 9]
+	bl	flash_prog_page
+	cmn	w0, #1
+	beq	.L1848
+	ldrb	w4, [x19, 9]
+	mov	w1, w20
+	ldr	x3, [x22, #:lo12:.LANCHOR149]
+	mov	w0, w21
+	ldr	x2, [x23, #:lo12:.LANCHOR150]
+	bl	flash_read_page
+	mov	w19, w0
+	cmn	w0, #1
+	beq	.L1848
+	ldr	x0, [x23, #:lo12:.LANCHOR150]
+	ldr	w1, [x0]
+	mov	w0, 23130
+	movk	w0, 0x5a5a, lsl 16
+	cmp	w1, w0
+	bne	.L1848
+	ldr	x0, [x22, #:lo12:.LANCHOR149]
+	ldr	w1, [x0]
+	mov	w0, 42405
+	movk	w0, 0xa5a5, lsl 16
+	cmp	w1, w0
+	beq	.L1849
+.L1848:
+	mov	w19, -1
+.L1849:
+	mov	w1, w20
+	mov	w0, w21
+	bl	flash_erase_block
+	mov	w0, w19
+.L1845:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	ret
+.L1850:
+	mov	w0, 0
+	b	.L1845
+	.size	flash_test_blk, .-flash_test_blk
+	.section	.text.id_block_prog_msb_ff_data,"ax",@progbits
+	.align	2
+	.global	id_block_prog_msb_ff_data
+	.type	id_block_prog_msb_ff_data, %function
+id_block_prog_msb_ff_data:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	and	w22, w0, 255
+	adrp	x0, .LANCHOR155
+	stp	x19, x20, [sp, 16]
+	stp	x23, x24, [sp, 48]
+	ldrb	w0, [x0, #:lo12:.LANCHOR155]
+	str	x25, [sp, 64]
+	cbnz	w0, .L1861
+	adrp	x20, .LANCHOR32
+	add	x20, x20, :lo12:.LANCHOR32
+	ldrb	w0, [x20, 19]
+	sub	w0, w0, #5
+	and	w3, w0, 255
+	cmp	w3, 63
+	bhi	.L1861
+	and	w19, w2, 65535
+	mov	x2, 16391
+	movk	x2, 0x4000, lsl 16
+	movk	x2, 0x8000, lsl 48
+	lsr	x0, x2, x3
+	tbz	x0, 0, .L1861
+	adrp	x21, .LANCHOR123
+	mov	w23, w1
+	add	x21, x21, :lo12:.LANCHOR123
+	mov	w25, 65535
+	adrp	x24, .LANCHOR140
+.L1863:
+	ldrh	w0, [x20, 10]
+	cmp	w0, w19
+	bhi	.L1864
+.L1861:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L1864:
+	ldrh	w0, [x21, w19, sxtw 1]
+	cmp	w0, w25
+	bne	.L1861
+	ldr	x0, [x24, #:lo12:.LANCHOR140]
+	mov	w2, 16384
+	mov	w1, 255
+	bl	ftl_memset
+	ldr	x3, [x24, #:lo12:.LANCHOR140]
+	add	w1, w19, w23
+	ldrb	w4, [x20, 9]
+	add	w19, w19, 1
+	mov	x2, x3
+	mov	w0, w22
+	and	w19, w19, 65535
+	bl	flash_prog_page
+	b	.L1863
+	.size	id_block_prog_msb_ff_data, .-id_block_prog_msb_ff_data
+	.section	.text.idb_write_data,"ax",@progbits
+	.align	2
+	.global	idb_write_data
+	.type	idb_write_data, %function
+idb_write_data:
+	stp	x29, x30, [sp, -256]!
+	add	w0, w1, w3
+	mov	w4, w1
+	cmp	w0, 63
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	bls	.L1867
+	cmp	w1, 575
+	bhi	.L1868
+	adrp	x0, .LANCHOR156
+	mov	x1, x2
+	mov	w2, 1
+	cmp	w4, 64
+	str	w2, [x0, #:lo12:.LANCHOR156]
+	adrp	x0, idb_buf
+	bhi	.L1869
+	mov	w2, 64
+	sub	w4, w2, w4
+	sub	w2, w3, w4
+	ubfiz	x4, x4, 9, 25
+	lsl	w2, w2, 9
+	add	x1, x1, x4
+	add	x0, x0, :lo12:idb_buf
+.L1945:
+	bl	ftl_memcpy
+.L1924:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 256
+	ret
+.L1869:
+	mov	w2, 576
+	sub	w2, w2, w4
+	cmp	w3, w2
+	sub	w4, w4, #64
+	csel	w2, w3, w2, ls
+	ubfiz	x4, x4, 9, 25
+	add	x0, x0, :lo12:idb_buf
+	lsl	w2, w2, 9
+	add	x0, x0, x4
+	b	.L1945
+.L1867:
+	cmp	w1, 575
+	bls	.L1924
+.L1868:
+	adrp	x0, .LANCHOR156
+	ldr	w0, [x0, #:lo12:.LANCHOR156]
+	cbz	w0, .L1924
+	adrp	x3, .LANCHOR32
+	add	x1, x3, :lo12:.LANCHOR32
+	str	x3, [x29, 176]
+	adrp	x3, idb_buf
+	add	x6, x3, :lo12:idb_buf
+	mov	w4, 4097
+	ldrh	w0, [x1, 10]
+	ldrb	w2, [x1, 9]
+	ldrb	w1, [x1, 12]
+	mul	w2, w0, w2
+	lsl	w0, w0, 2
+	and	w2, w2, 65535
+	str	w2, [x29, 132]
+	sdiv	w27, w0, w1
+	mov	w0, 512
+	adrp	x1, idb_buf+262140
+	add	x1, x1, :lo12:idb_buf+262140
+	mov	w2, 65535
+	cmp	w27, 512
+	csel	w27, w27, w0, lt
+	mov	w0, 0
+.L1874:
+	ldr	w5, [x1]
+	cbnz	w5, .L1872
+	ldr	w5, [x6, w0, uxtw 2]
+	add	w0, w0, 1
+	str	w5, [x1], -4
+	cmp	w0, w4
+	sub	w2, w2, #1
+	csel	w0, w0, wzr, cc
+	cmp	w2, 4096
+	bne	.L1874
+.L1872:
+	add	x0, x3, :lo12:idb_buf
+	mov	w3, w27
+	ldr	w1, [x0, w2, uxtw 2]
+	adrp	x0, .LC111
+	add	x0, x0, :lo12:.LC111
+	bl	printf
+	stp	wzr, wzr, [x29, 168]
+	adrp	x0, gp_flash_check_buf
+	add	x0, x0, :lo12:gp_flash_check_buf
+	str	x0, [x29, 184]
+.L1908:
+	adrp	x0, gp_flash_check_buf
+	add	x20, x0, :lo12:gp_flash_check_buf
+	mov	w1, 0
+	mov	w2, 512
+	mov	x0, x20
+	bl	ftl_memset
+	adrp	x0, .LANCHOR20
+	ldr	w1, [x29, 172]
+	ldr	x0, [x0, #:lo12:.LANCHOR20]
+	add	x0, x0, x1, uxtw
+	ldrb	w0, [x0, 32]
+	cmp	w0, 255
+	beq	.L1875
+	ldr	w1, [x29, 132]
+	adrp	x19, .LANCHOR42
+	mul	w26, w0, w1
+	ldr	x0, [x29, 176]
+	add	x25, x0, :lo12:.LANCHOR32
+	ldrb	w0, [x19, #:lo12:.LANCHOR42]
+	str	w0, [x29, 128]
+	strb	wzr, [x19, #:lo12:.LANCHOR42]
+	mov	w0, 0
+	ldrb	w21, [x25, 9]
+	ldrh	w23, [x25, 10]
+	udiv	w1, w26, w21
+	mul	w23, w21, w23
+	and	w22, w23, 65535
+	bl	flash_erase_block
+	udiv	w23, w26, w22
+	msub	w23, w23, w22, w26
+	sub	w24, w26, w23
+	cmp	w26, w24
+	bne	.L1914
+	adrp	x0, .LANCHOR22
+	ldrb	w0, [x0, #:lo12:.LANCHOR22]
+	cmp	w0, 9
+	bne	.L1914
+	mov	w2, 1024
+	mov	w1, 0
+	mov	x0, x20
+	bl	ftl_memset
+	adrp	x1, gp_flash_check_buf
+	mov	w0, 18766
+	movk	w0, 0x464e, lsl 16
+	ldrb	w2, [x25, 12]
+	str	w0, [x1, #:lo12:gp_flash_check_buf]
+	cmp	w21, 8
+	ldrb	w0, [x25, 29]
+	mov	w1, 12
+	strb	w0, [x20, 16]
+	mov	w0, 4
+	strb	w0, [x20, 17]
+	ldrh	w0, [x25, 10]
+	str	w1, [x20, 4]
+	strb	wzr, [x20, 20]
+	str	wzr, [x20, 12]
+	sdiv	w0, w0, w2
+	mov	w2, 16
+	strh	w0, [x20, 18]
+	mov	w0, 70
+	csel	w0, w0, w2, hi
+	ldr	x2, [x29, 184]
+	strb	w0, [x2, 21]
+	adrp	x0, gp_flash_check_buf+12
+	strh	wzr, [x2, 22]
+	add	x0, x0, :lo12:gp_flash_check_buf+12
+	bl	js_hash
+	ldr	x1, [x29, 184]
+	mov	x6, x1
+	str	w0, [x1, 8]
+	sub	w0, w27, #4
+	str	w0, [x29, 164]
+.L1876:
+	adrp	x22, idb_buf
+	adrp	x28, .LANCHOR155
+	add	x22, x22, :lo12:idb_buf
+	add	x0, x28, :lo12:.LANCHOR155
+	adrp	x25, .LANCHOR27
+	str	x0, [x29, 152]
+	mov	w20, 0
+	add	x0, x25, :lo12:.LANCHOR27
+	str	x0, [x29, 144]
+.L1878:
+	cmp	w27, w20
+	bhi	.L1889
+	ldr	x0, [x29, 176]
+	add	x25, x19, :lo12:.LANCHOR42
+	strb	wzr, [x19, #:lo12:.LANCHOR42]
+	mov	w21, 4
+	add	x0, x0, :lo12:.LANCHOR32
+	mov	w22, 0
+	str	wzr, [x29, 144]
+	ldrb	w1, [x0, 9]
+	ldrh	w28, [x0, 10]
+	uxtw	x0, w1
+	mul	w28, w0, w28
+	and	w28, w28, 65535
+	udiv	w0, w26, w28
+	msub	w28, w0, w28, w26
+	sub	w0, w26, w28
+	stp	w0, w1, [x29, 136]
+	and	w0, w28, 3
+	str	w0, [x29, 152]
+	ldr	w0, [x29, 164]
+	str	w0, [x29, 160]
+	adrp	x0, gp_flash_check_buf
+	add	x20, x0, :lo12:gp_flash_check_buf
+	adrp	x0, .LANCHOR27
+	add	x0, x0, :lo12:.LANCHOR27
+	str	x0, [x29, 104]
+.L1890:
+	ldr	w0, [x29, 160]
+	cmp	w22, w0
+	bcc	.L1904
+	adrp	x0, .LANCHOR42
+	ldrb	w1, [x29, 128]
+	adrp	x3, idb_buf
+	add	x3, x3, :lo12:idb_buf
+	strb	w1, [x0, #:lo12:.LANCHOR42]
+	mov	x1, 0
+	ldr	w0, [x29, 164]
+	lsl	w0, w0, 7
+.L1905:
+	mov	w19, w1
+	cmp	w1, w0
+	bcc	.L1906
+	ldr	w0, [x29, 168]
+	add	w0, w0, 1
+	str	w0, [x29, 168]
+	cmp	w0, 5
+	bls	.L1875
+	b	.L1910
+.L1914:
+	mov	x6, 0
+	str	w27, [x29, 164]
+	b	.L1876
+.L1889:
+	ldr	x2, [x29, 152]
+	add	w5, w23, w20
+	lsr	w5, w5, 2
+	add	x0, x25, :lo12:.LANCHOR27
+	add	w1, w5, 1
+	ldrb	w2, [x2]
+	ldrh	w0, [x0, w1, sxtw 1]
+	cbz	w2, .L1880
+	adrp	x0, .LANCHOR25
+	ldrb	w3, [x0, #:lo12:.LANCHOR25]
+	lsl	w0, w1, 1
+	cmp	w3, 0
+	csel	w0, w0, w1, ne
+.L1880:
+	adrp	x1, .LANCHOR22
+	ldrb	w1, [x1, #:lo12:.LANCHOR22]
+	cmp	w1, 9
+	bne	.L1882
+.L1943:
+	str	w0, [x29, 192]
+	mov	w0, 61424
+	str	w0, [x29, 196]
+	ldr	x0, [x29, 144]
+	ldrh	w0, [x0, w5, sxtw 1]
+	cbnz	w2, .L1884
+	mov	w5, w0
+.L1885:
+	mul	w1, w21, w5
+	adrp	x2, .LANCHOR40
+	adrp	x0, .LANCHOR10
+	cbnz	x6, .L1886
+	ldr	x3, [x29, 176]
+	add	w1, w1, w24
+	ldrb	w7, [x2, #:lo12:.LANCHOR40]
+	add	x3, x3, :lo12:.LANCHOR32
+	ldrb	w0, [x0, #:lo12:.LANCHOR10]
+	str	w5, [x29, 140]
+	str	w7, [x29, 160]
+	ldrb	w6, [x3, 9]
+	udiv	w6, w1, w6
+	bl	nandc_bch_sel
+	mov	w1, w6
+	mov	w4, 4
+	add	x3, x29, 192
+	mov	x2, x22
+	mov	w0, 0
+	bl	flash_prog_page
+	ldr	w7, [x29, 160]
+	mov	w0, w7
+	bl	nandc_bch_sel
+	ldrb	w0, [x28, #:lo12:.LANCHOR155]
+	ldr	w5, [x29, 140]
+	cbnz	w0, .L1887
+	udiv	w1, w24, w21
+	add	w2, w5, 1
+	bl	id_block_prog_msb_ff_data
+.L1887:
+	add	x22, x22, 2048
+.L1888:
+	add	w20, w20, 4
+	mov	x6, 0
+	and	w20, w20, 65535
+	b	.L1878
+.L1882:
+	sub	w0, w0, #1
+	lsl	w0, w0, 2
+	b	.L1943
+.L1884:
+	adrp	x0, .LANCHOR25
+	ldrb	w1, [x0, #:lo12:.LANCHOR25]
+	lsl	w0, w5, 1
+	cmp	w1, 0
+	csel	w5, w0, w5, ne
+	b	.L1885
+.L1886:
+	ldr	x3, [x29, 176]
+	add	w1, w1, w24
+	ldrb	w7, [x2, #:lo12:.LANCHOR40]
+	add	x3, x3, :lo12:.LANCHOR32
+	ldrb	w0, [x0, #:lo12:.LANCHOR10]
+	str	w7, [x29, 160]
+	ldrb	w5, [x3, 9]
+	udiv	w5, w1, w5
+	bl	nandc_bch_sel
+	mov	x2, x6
+	mov	w4, 4
+	add	x3, x29, 192
+	mov	w1, w5
+	mov	w0, 0
 	bl	flash_prog_page
+	ldr	w7, [x29, 160]
+	mov	w0, w7
+	bl	nandc_bch_sel
+	b	.L1888
+.L1904:
+	add	w19, w28, w22
+	ldr	w0, [x29, 152]
+	adrp	x1, .LANCHOR155
+	sub	w24, w21, w0
+	ldr	x0, [x29, 104]
+	udiv	w19, w19, w21
+	ldrb	w1, [x1, #:lo12:.LANCHOR155]
+	and	w24, w24, 65535
+	and	w19, w19, 65535
+	ldrh	w0, [x0, w19, sxtw 1]
+	cbnz	w1, .L1891
+	mov	w19, w0
+.L1892:
+	adrp	x0, .LANCHOR10
+	ldr	w1, [x29, 136]
+	ldrb	w23, [x0, #:lo12:.LANCHOR10]
+	ldr	w0, [x29, 152]
+	add	w0, w0, w1
+	ldr	w1, [x29, 140]
+	madd	w19, w1, w19, w0
+	ldr	x0, [x29, 176]
+	add	x0, x0, :lo12:.LANCHOR32
+	ldrb	w0, [x0, 9]
+	udiv	w19, w19, w0
+	adrp	x0, .LANCHOR40
+	ldrb	w0, [x0, #:lo12:.LANCHOR40]
+	str	w0, [x29, 124]
+	mov	w0, w23
+	bl	nandc_bch_sel
+	adrp	x0, .LANCHOR14
+	add	x0, x0, :lo12:.LANCHOR14
+	str	x0, [x29, 112]
+.L1893:
+	mov	w4, w21
+	add	x3, x29, 192
+	mov	x2, x20
+	mov	w1, w19
+	mov	w0, 0
+	bl	flash_read_page
+	mov	w6, w0
 	cmn	w0, #1
-	beq	.L1676
-	ldrb	w4, [x19, 9]
-	mov	w1, w20
-	ldr	x3, [x22, #:lo12:.LANCHOR142]
-	mov	w0, w21
-	ldr	x2, [x23, #:lo12:.LANCHOR143]
+	bne	.L1894
+	ldrb	w5, [x25]
+	cbnz	w5, .L1895
+.L1898:
+	adrp	x0, .LANCHOR145
+	ldr	x7, [x0, #:lo12:.LANCHOR145]
+	cbnz	x7, .L1896
+.L1897:
+	ldr	x0, [x29, 112]
+	ldrb	w0, [x0]
+	cbz	w0, .L1894
+	mov	w4, w21
+	add	x3, x29, 192
+	mov	x2, x20
+	mov	w1, w19
+	mov	w0, 0
+	bl	flash_ddr_tunning_read
+	b	.L1944
+.L1891:
+	adrp	x0, .LANCHOR25
+	ldrb	w1, [x0, #:lo12:.LANCHOR25]
+	lsl	w0, w19, 1
+	cmp	w1, 0
+	csel	w19, w0, w19, ne
+	b	.L1892
+.L1895:
+	str	w5, [x29, 100]
+	mov	w4, w21
+	str	w6, [x29, 120]
+	add	x3, x29, 192
+	strb	wzr, [x25]
+	mov	x2, x20
+	mov	w1, w19
+	mov	w0, 0
 	bl	flash_read_page
-	mov	w19, w0
 	cmn	w0, #1
-	beq	.L1676
-	ldr	x0, [x23, #:lo12:.LANCHOR143]
-	ldr	w1, [x0]
-	mov	w0, 23130
-	movk	w0, 0x5a5a, lsl 16
-	cmp	w1, w0
-	bne	.L1676
-	ldr	x0, [x22, #:lo12:.LANCHOR142]
-	ldr	w1, [x0]
-	mov	w0, 42405
-	movk	w0, 0xa5a5, lsl 16
+	ldr	w5, [x29, 100]
+	strb	w5, [x25]
+	ldr	w6, [x29, 120]
+	beq	.L1898
+.L1944:
+	mov	w6, w0
+.L1894:
+	cmn	w6, #1
+	cset	w3, eq
+	cmp	w23, 16
+	cset	w0, ne
+	tst	w3, w0
+	beq	.L1900
+	mov	w0, 16
+	mov	w23, 16
+	bl	nandc_bch_sel
+	b	.L1893
+.L1896:
+	str	w6, [x29, 120]
+	mov	w5, w21
+	add	x4, x29, 192
+	mov	x3, x20
+	mov	w2, w19
+	mov	w1, 0
+	mov	w0, 0
+	blr	x7
+	ldr	w6, [x29, 120]
+	cmn	w0, #1
+	beq	.L1897
+	b	.L1944
+.L1900:
+	ldr	w0, [x29, 124]
+	bl	nandc_bch_sel
+	cmp	w3, 0
+	ldr	w0, [x29, 144]
+	csinv	w0, w0, wzr, eq
+	str	w0, [x29, 144]
+	ldr	w0, [x29, 136]
+	cmp	w22, 0
+	ccmp	w26, w0, 0, eq
+	bne	.L1902
+	ldr	w0, [x29, 144]
+	cbnz	w0, .L1902
+	ldr	w1, [x20]
+	mov	w0, 18766
+	movk	w0, 0x464e, lsl 16
 	cmp	w1, w0
-	beq	.L1677
-.L1676:
-	mov	w19, -1
-.L1677:
-	mov	w1, w20
-	mov	w0, w21
-	bl	flash_erase_block
-	mov	w0, w19
-.L1673:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldr	x23, [sp, 48]
-	ldp	x29, x30, [sp], 64
-	ret
-.L1678:
+	bne	.L1902
+	ldr	w0, [x29, 160]
+	ldrb	w21, [x20, 17]
+	add	w0, w0, w24
+	str	w0, [x29, 160]
+.L1903:
+	add	w22, w24, w22
+	and	w22, w22, 65535
+	b	.L1890
+.L1902:
+	ubfiz	x0, x24, 9, 16
+	str	wzr, [x29, 152]
+	add	x20, x20, x0
+	b	.L1903
+.L1906:
+	ldr	x4, [x29, 184]
+	lsl	x2, x1, 2
+	add	x1, x1, 1
+	ldr	w4, [x2, x4]
+	ldr	w2, [x3, x2]
+	cmp	w4, w2
+	beq	.L1905
+	ldr	x0, [x29, 184]
+	mov	w2, 512
+	mov	w1, 0
+	bl	ftl_memset
+	mov	w1, w19
+	adrp	x0, .LC112
+	add	x0, x0, :lo12:.LC112
+	bl	printf
+	mov	w1, w26
 	mov	w0, 0
-	b	.L1673
-	.size	flash_test_blk, .-flash_test_blk
+	bl	flash_erase_block
+.L1875:
+	ldr	w0, [x29, 172]
+	add	w0, w0, 1
+	str	w0, [x29, 172]
+	cmp	w0, 4
+	bne	.L1908
+	ldr	w0, [x29, 168]
+	cbnz	w0, .L1910
+	adrp	x0, .LC113
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC113
+	bl	printf
+.L1910:
+	adrp	x0, .LANCHOR156
+	str	wzr, [x0, #:lo12:.LANCHOR156]
+	b	.L1924
+	.size	idb_write_data, .-idb_write_data
 	.section	.text.flash_start_tlc_page_prog,"ax",@progbits
 	.align	2
 	.global	flash_start_tlc_page_prog
 	.type	flash_start_tlc_page_prog, %function
 flash_start_tlc_page_prog:
-	stp	x29, x30, [sp, -48]!
-	and	w8, w0, 255
-	adrp	x0, .LANCHOR15
-	and	w3, w3, 255
+	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
+	stp	x25, x26, [sp, 64]
+	and	w25, w0, 255
+	adrp	x0, .LANCHOR12
 	stp	x19, x20, [sp, 16]
-	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	str	x21, [sp, 32]
-	cmp	w0, w3
-	bhi	.L1690
-	adrp	x1, .LANCHOR148
+	stp	x21, x22, [sp, 32]
+	and	w19, w3, 255
+	stp	x23, x24, [sp, 48]
+	and	w21, w1, 255
+	ldrb	w0, [x0, #:lo12:.LANCHOR12]
+	and	w22, w2, 255
+	mov	w20, w4
+	mov	x23, x5
+	mov	x24, x6
+	cmp	w0, w19
+	bhi	.L1947
+	adrp	x1, .LANCHOR157
 	adrp	x0, .LC0
-	mov	w2, 671
-	add	x1, x1, :lo12:.LANCHOR148
+	mov	w2, 648
+	add	x1, x1, :lo12:.LANCHOR157
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1691:
-	b	.L1691
-.L1690:
-	adrp	x0, .LANCHOR17
-	add	x0, x0, :lo12:.LANCHOR17
-	and	w7, w1, 255
-	and	w21, w2, 255
-	ldrb	w20, [x0, w3, sxtw]
-	adrp	x0, .LANCHOR13
-	ldr	x19, [x0, #:lo12:.LANCHOR13]
-	mov	w0, w20
+.L1947:
+	adrp	x0, .LANCHOR24
+	add	x0, x0, :lo12:.LANCHOR24
+	ldrb	w26, [x0, w19, sxtw]
+	adrp	x0, .LANCHOR21
+	ldr	x19, [x0, #:lo12:.LANCHOR21]
+	mov	w0, w26
 	bl	nandc_cs
-	cbz	w8, .L1692
-	sxtw	x0, w20
+	cbz	w25, .L1948
+	sxtw	x0, w26
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 8
-	str	w8, [x0, 8]
-.L1692:
-	ubfiz	x0, x20, 8, 8
+	str	w25, [x0, 8]
+.L1948:
+	ubfiz	x0, x26, 8, 8
 	add	x19, x19, x0
 	mov	w0, 128
-	str	w7, [x19, 2056]
+	str	w21, [x19, 2056]
 	str	w0, [x19, 2056]
-	and	w0, w4, 255
+	and	w0, w20, 255
 	str	wzr, [x19, 2052]
 	str	wzr, [x19, 2052]
 	str	w0, [x19, 2052]
-	lsr	w0, w4, 8
+	lsr	w0, w20, 8
 	str	w0, [x19, 2052]
-	lsr	w0, w4, 16
-	add	w4, w4, w4, lsl 1
+	lsr	w0, w20, 16
+	add	w20, w20, w20, lsl 1
 	str	w0, [x19, 2052]
-	sub	w0, w4, #1
-	add	w0, w0, w7
+	sub	w0, w20, #1
+	add	w0, w0, w21
 	bl	nandc_set_seed
-	mov	x3, x6
-	adrp	x0, .LANCHOR26+9
-	mov	x2, x5
-	ldrb	w1, [x0, #:lo12:.LANCHOR26+9]
+	adrp	x0, .LANCHOR32+9
+	mov	x3, x24
+	mov	x2, x23
+	ldrb	w1, [x0, #:lo12:.LANCHOR32+9]
 	mov	w0, 1
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
-	str	w21, [x19, 2056]
-	mov	w0, w20
-	ldr	x21, [sp, 32]
+	mov	w0, w26
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	str	w22, [x19, 2056]
 	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 80
 	b	nandc_de_cs
 	.size	flash_start_tlc_page_prog, .-flash_start_tlc_page_prog
 	.section	.text.queue_tlc_prog_cmd,"ax",@progbits
@@ -10494,8 +11653,8 @@ queue_tlc_prog_cmd:
 	strb	w0, [x1, 59]
 	mov	w0, -1
 	strb	w0, [x1]
-	adrp	x0, .LANCHOR114
-	add	x0, x0, :lo12:.LANCHOR114
+	adrp	x0, .LANCHOR117
+	add	x0, x0, :lo12:.LANCHOR117
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -10512,21 +11671,21 @@ sblk_tlc_prog_one_page:
 	mov	x19, x0
 	ldr	x0, [x0]
 	ldr	w20, [x0, 40]
-.L1700:
+.L1956:
 	mov	w1, 1
 	mov	w0, w20
 	bl	queue_lun_state
-	cbnz	w0, .L1701
+	cbnz	w0, .L1957
 	mov	x0, x19
 	bl	queue_tlc_prog_cmd
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1701:
+.L1957:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L1700
+	b	.L1956
 	.size	sblk_tlc_prog_one_page, .-sblk_tlc_prog_one_page
 	.section	.text.sblk_xlc_prog_pages,"ax",@progbits
 	.align	2
@@ -10543,13 +11702,13 @@ sblk_xlc_prog_pages:
 	stp	x23, x24, [sp, 48]
 	mov	w24, w2
 	ldr	w20, [x0, 40]
-.L1704:
+.L1960:
 	mov	w1, 1
 	mov	w0, w20
 	bl	queue_lun_state
-	cbnz	w0, .L1705
+	cbnz	w0, .L1961
 	cmp	w24, 2
-	bne	.L1706
+	bne	.L1962
 	ldr	x0, [x19]
 	mov	w2, 17
 	ldr	x1, [x22]
@@ -10626,104 +11785,102 @@ sblk_xlc_prog_pages:
 	strb	w0, [x1, 59]
 	mov	w0, -1
 	strb	w0, [x1]
-	adrp	x0, .LANCHOR114
-	add	x0, x0, :lo12:.LANCHOR114
+	adrp	x0, .LANCHOR117
+	add	x0, x0, :lo12:.LANCHOR117
 	bl	buf_add_tail
-.L1707:
+.L1963:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1705:
+.L1961:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L1704
-.L1706:
+	b	.L1960
+.L1962:
 	mov	x0, x19
 	bl	queue_tlc_prog_cmd
-	b	.L1707
+	b	.L1963
 	.size	sblk_xlc_prog_pages, .-sblk_xlc_prog_pages
 	.section	.text.flash_start_page_prog,"ax",@progbits
 	.align	2
 	.global	flash_start_page_prog
 	.type	flash_start_page_prog, %function
 flash_start_page_prog:
-	stp	x29, x30, [sp, -80]!
+	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
-	str	x25, [sp, 64]
-	mov	w25, w1
-	adrp	x1, .LANCHOR15
-	stp	x21, x22, [sp, 32]
+	stp	x25, x26, [sp, 64]
+	adrp	x26, .LANCHOR12
 	stp	x23, x24, [sp, 48]
-	and	w22, w0, 255
+	and	w23, w0, 255
 	stp	x19, x20, [sp, 16]
-	mov	x24, x3
-	ldrb	w0, [x1, #:lo12:.LANCHOR15]
-	ubfx	x3, x25, 21, 3
-	cmp	w0, w3
-	bhi	.L1710
-	adrp	x1, .LANCHOR149
+	mov	x24, x2
+	stp	x21, x22, [sp, 32]
+	mov	x25, x3
+	ldrb	w0, [x26, #:lo12:.LANCHOR12]
+	and	w19, w1, 2097151
+	str	x27, [sp, 80]
+	ubfx	x27, x1, 21, 3
+	ubfx	x22, x1, 24, 2
+	cmp	w0, w27
+	bhi	.L1966
+	adrp	x1, .LANCHOR158
 	adrp	x0, .LC0
-	mov	w2, 708
-	add	x1, x1, :lo12:.LANCHOR149
+	mov	w2, 685
+	add	x1, x1, :lo12:.LANCHOR158
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1711:
-	b	.L1711
-.L1710:
-	adrp	x0, .LANCHOR17
-	add	x0, x0, :lo12:.LANCHOR17
-	mov	x23, x2
-	and	w19, w25, 2097151
-	ldrb	w21, [x0, w3, sxtw]
-	adrp	x0, .LANCHOR13
-	ldr	x20, [x0, #:lo12:.LANCHOR13]
+.L1966:
+	adrp	x0, .LANCHOR24
+	add	x0, x0, :lo12:.LANCHOR24
+	ldrb	w21, [x0, w27, sxtw]
+	adrp	x0, .LANCHOR21
+	ldr	x20, [x0, #:lo12:.LANCHOR21]
 	bl	nandc_rdy_status
-	cbnz	w0, .L1712
-	ldrb	w0, [x1, #:lo12:.LANCHOR15]
+	cbnz	w0, .L1967
+	ldrb	w0, [x26, #:lo12:.LANCHOR12]
 	cmp	w0, 1
-	bne	.L1713
+	bne	.L1968
 	bl	nandc_wait_flash_ready
-.L1712:
+.L1967:
 	mov	w0, w21
 	bl	hynix_reconfig_rr_para
 	mov	w0, w21
 	bl	nandc_cs
-	tst	x25, 50331648
-	bne	.L1714
-	adrp	x0, .LANCHOR18
-	adrp	x1, .LANCHOR19
-	ldrb	w0, [x0, #:lo12:.LANCHOR18]
-	cbz	w0, .L1715
-	ldrb	w0, [x1, #:lo12:.LANCHOR19]
-	cbz	w0, .L1716
-.L1715:
-	adrp	x0, .LANCHOR20
-	ldrb	w1, [x1, #:lo12:.LANCHOR19]
-	ldrh	w2, [x0, #:lo12:.LANCHOR20]
+	cbnz	w22, .L1969
+	adrp	x0, .LANCHOR11
+	adrp	x1, .LANCHOR25
+	ldrb	w0, [x0, #:lo12:.LANCHOR11]
+	cbz	w0, .L1970
+	ldrb	w0, [x1, #:lo12:.LANCHOR25]
+	cbz	w0, .L1971
+.L1970:
+	adrp	x0, .LANCHOR26
+	ldrb	w1, [x1, #:lo12:.LANCHOR25]
+	ldrh	w2, [x0, #:lo12:.LANCHOR26]
 	udiv	w0, w19, w2
 	mul	w0, w0, w2
 	sub	w19, w19, w0
-	cbz	w1, .L1717
+	cbz	w1, .L1972
 	add	w19, w0, w19, lsl 1
-.L1716:
+.L1971:
 	mov	w0, w21
 	bl	zftl_flash_enter_slc_mode
-	b	.L1718
-.L1713:
+	b	.L1973
+.L1968:
 	mov	w2, 64
 	mov	w1, w19
-	mov	w0, w3
+	mov	w0, w27
 	bl	flash_wait_device_ready_raw
-	b	.L1712
-.L1717:
-	adrp	x1, .LANCHOR21
-	add	x1, x1, :lo12:.LANCHOR21
+	b	.L1967
+.L1972:
+	adrp	x1, .LANCHOR27
+	add	x1, x1, :lo12:.LANCHOR27
 	ldrh	w19, [x1, w19, uxtw 1]
 	add	w19, w19, w0
-.L1718:
+.L1973:
 	ubfiz	x0, x21, 8, 8
 	add	x20, x20, x0
 	mov	w0, 128
@@ -10738,25 +11895,26 @@ flash_start_page_prog:
 	str	w0, [x20, 2052]
 	mov	w0, w19
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR26+9
-	mov	x3, x24
-	mov	x2, x23
-	ldrb	w1, [x0, #:lo12:.LANCHOR26+9]
+	adrp	x0, .LANCHOR32+9
+	mov	x3, x25
+	mov	x2, x24
+	ldrb	w1, [x0, #:lo12:.LANCHOR32+9]
 	mov	w0, 1
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
-	ldr	x25, [sp, 64]
-	ldp	x23, x24, [sp, 48]
-	str	w22, [x20, 2056]
+	ldr	x27, [sp, 80]
+	ldp	x25, x26, [sp, 64]
 	mov	w0, w21
-	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 80
+	str	w23, [x20, 2056]
+	ldp	x19, x20, [sp, 16]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 96
 	b	nandc_de_cs
-.L1714:
+.L1969:
 	mov	w0, w21
 	bl	zftl_flash_exit_slc_mode
-	b	.L1718
+	b	.L1973
 	.size	flash_start_page_prog, .-flash_start_page_prog
 	.section	.text.queue_prog_cmd,"ax",@progbits
 	.align	2
@@ -10771,27 +11929,27 @@ queue_prog_cmd:
 	mov	x19, x0
 	mov	w0, 16
 	bl	flash_start_page_prog
-	adrp	x0, .LANCHOR114
+	adrp	x0, .LANCHOR117
 	ldr	w3, [x19, 40]
-	ldrb	w1, [x0, #:lo12:.LANCHOR114]
+	ldrb	w1, [x0, #:lo12:.LANCHOR117]
 	cmp	w1, 255
-	beq	.L1724
-	adrp	x2, .LANCHOR43
-	add	x2, x2, :lo12:.LANCHOR43
+	beq	.L1979
+	adrp	x2, .LANCHOR46
+	add	x2, x2, :lo12:.LANCHOR46
 	ubfx	x3, x3, 21, 3
 	mov	x6, x2
-.L1726:
+.L1981:
 	add	x4, x2, x1, lsl 6
 	ldr	w5, [x4, 40]
 	ubfx	x5, x5, 21, 3
 	cmp	w3, w5
-	bne	.L1725
+	bne	.L1980
 	ldrb	w5, [x4, 58]
 	cmp	w5, 6
-	bne	.L1725
+	bne	.L1980
 	mov	w1, 3
 	strb	w1, [x4, 58]
-.L1724:
+.L1979:
 	mov	w1, 3
 	strb	w1, [x19, 58]
 	mov	w1, 1
@@ -10799,23 +11957,23 @@ queue_prog_cmd:
 	mov	w1, -1
 	strb	w1, [x19]
 	mov	x1, x19
-	add	x0, x0, :lo12:.LANCHOR114
+	add	x0, x0, :lo12:.LANCHOR117
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	buf_add_tail
-.L1725:
+.L1980:
 	lsl	x1, x1, 6
 	ldrb	w1, [x6, x1]
 	cmp	w1, 255
-	bne	.L1726
-	b	.L1724
+	bne	.L1981
+	b	.L1979
 	.size	queue_prog_cmd, .-queue_prog_cmd
 	.section	.text.sblk_prog_page,"ax",@progbits
 	.align	2
 	.global	sblk_prog_page
 	.type	sblk_prog_page, %function
 sblk_prog_page:
-	stp	x29, x30, [sp, -80]!
+	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
@@ -10824,121 +11982,121 @@ sblk_prog_page:
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	cbz	w0, .L1733
-	adrp	x0, .LANCHOR29
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 8, .L1733
+	str	x27, [sp, 80]
+	cbz	w0, .L1988
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 8, .L1988
 	ldr	w1, [x19, 40]
-	adrp	x0, .LC67
+	adrp	x0, .LC114
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC67
+	add	x0, x0, :lo12:.LC114
 	bl	printf
-.L1733:
-	adrp	x24, .LANCHOR30
-	adrp	x22, .LANCHOR43
-	add	x24, x24, :lo12:.LANCHOR30
-	add	x22, x22, :lo12:.LANCHOR43
+.L1988:
+	adrp	x25, .LANCHOR36
+	adrp	x23, .LANCHOR46
+	add	x25, x25, :lo12:.LANCHOR36
+	add	x23, x23, :lo12:.LANCHOR46
 	mov	w21, 0
-	mov	w23, 1
-.L1734:
-	cbnz	w20, .L1745
+	mov	w24, 1
+.L1989:
+	cbnz	w20, .L1999
 	mov	w0, 0
+	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
+	ldp	x29, x30, [sp], 96
 	ret
-.L1745:
-	ldrb	w25, [x19]
-	ldr	w26, [x19, 40]
-.L1735:
+.L1999:
+	ldrb	w26, [x19]
+	ldr	w22, [x19, 40]
+.L1990:
 	mov	w1, 1
-	mov	w0, w26
+	mov	w0, w22
 	bl	queue_lun_state
-	cbnz	w0, .L1736
+	cbnz	w0, .L1991
 	cmp	w20, 1
-	beq	.L1737
-	ldrb	w0, [x24]
-	cbnz	w0, .L1738
-.L1737:
+	beq	.L1992
+	ldrb	w0, [x25]
+	cbnz	w0, .L1993
+.L1992:
 	mov	x0, x19
 	bl	queue_prog_cmd
-.L1739:
-	ubfiz	x19, x25, 6, 8
+.L1994:
+	ubfiz	x19, x26, 6, 8
 	sub	w20, w20, #1
-	add	x19, x22, x19
-	b	.L1734
-.L1736:
+	add	x19, x23, x19
+	b	.L1989
+.L1991:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L1735
-.L1738:
+	b	.L1990
+.L1993:
 	ldrb	w0, [x19]
-	ubfx	x1, x26, 21, 3
+	ubfx	x27, x22, 21, 3
 	cmp	w0, 255
-	bne	.L1740
-	adrp	x1, .LANCHOR150
+	bne	.L1995
+	adrp	x1, .LANCHOR159
 	adrp	x0, .LC0
-	mov	w2, 486
-	add	x1, x1, :lo12:.LANCHOR150
+	mov	w2, 489
+	add	x1, x1, :lo12:.LANCHOR159
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1741:
-	b	.L1741
-.L1740:
-	sbfiz	x0, x0, 6, 32
-	add	x0, x22, x0
+.L1995:
+	ldrb	w0, [x19]
+	add	x0, x23, x0, lsl 6
 	ldr	w5, [x0, 40]
 	ubfx	x0, x5, 21, 3
-	cmp	w1, w0
-	bne	.L1742
+	cmp	w27, w0
+	bne	.L1996
 	adrp	x0, .LANCHOR96
 	ldrh	w2, [x0, #:lo12:.LANCHOR96]
 	adrp	x0, .LANCHOR95
 	ldrb	w3, [x0, #:lo12:.LANCHOR95]
 	mov	w0, 21
 	sub	w0, w0, w2
-	lsl	w1, w23, w2
+	lsl	w1, w24, w2
 	sub	w3, w3, #1
 	sub	w1, w1, #1
-	lsl	w0, w23, w0
+	lsl	w0, w24, w0
 	sub	w0, w0, #1
 	and	w0, w0, w3
-	lsr	w4, w26, w2
+	lsr	w4, w22, w2
 	and	w0, w0, 65535
 	and	w1, w1, 65535
 	and	w4, w0, w4
 	lsr	w2, w5, w2
 	and	w0, w0, w2
-	and	w26, w1, w26
+	and	w22, w1, w22
 	cmp	w4, w0
 	and	w1, w1, w5
-	ccmp	w26, w1, 0, ne
-	bne	.L1742
+	ccmp	w22, w1, 0, ne
+	bne	.L1996
 	cmp	w21, w3
-	beq	.L1742
+	beq	.L1996
 	ldr	w1, [x19, 40]
 	mov	w0, 17
 	ldr	x2, [x19, 8]
 	add	w21, w21, 1
 	ldr	x3, [x19, 24]
 	bl	flash_start_page_prog
-	strb	w23, [x19, 59]
+	strb	w24, [x19, 59]
 	mov	w0, 8
 	strb	w0, [x19, 58]
 	mov	w0, -1
 	strb	w0, [x19]
 	mov	x1, x19
-	adrp	x0, .LANCHOR114
-	add	x0, x0, :lo12:.LANCHOR114
+	adrp	x0, .LANCHOR117
+	add	x0, x0, :lo12:.LANCHOR117
 	bl	buf_add_tail
-	b	.L1739
-.L1742:
+	b	.L1994
+.L1996:
 	mov	x0, x19
 	mov	w21, 0
 	bl	queue_prog_cmd
-	b	.L1739
+	b	.L1994
 	.size	sblk_prog_page, .-sblk_prog_page
 	.section	.text.ftl_flush,"ax",@progbits
 	.align	2
@@ -10951,17 +12109,17 @@ ftl_flush:
 	ldrb	w1, [x0, #:lo12:.LANCHOR112]
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	adrp	x20, .LANCHOR151
-	cbz	w1, .L1757
-	ldrb	w2, [x20, #:lo12:.LANCHOR151]
-	adrp	x0, .LANCHOR43
-	add	x0, x0, :lo12:.LANCHOR43
+	adrp	x20, .LANCHOR160
+	cbz	w1, .L2011
+	ldrb	w2, [x20, #:lo12:.LANCHOR160]
+	adrp	x0, .LANCHOR46
+	add	x0, x0, :lo12:.LANCHOR46
 	add	x0, x0, x2, lsl 6
 	bl	sblk_prog_page
-.L1757:
+.L2011:
 	mov	w0, -1
 	strb	wzr, [x19, #:lo12:.LANCHOR112]
-	strb	w0, [x20, #:lo12:.LANCHOR151]
+	strb	w0, [x20, #:lo12:.LANCHOR160]
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	ldp	x19, x20, [sp, 16]
@@ -10976,127 +12134,126 @@ ftl_flush:
 flash_prog_page_en:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	and	w24, w0, 255
-	adrp	x0, .LANCHOR15
-	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	and	w22, w0, 255
+	adrp	x0, .LANCHOR12
+	stp	x19, x20, [sp, 16]
+	stp	x23, x24, [sp, 48]
+	mov	w20, w1
 	stp	x25, x26, [sp, 64]
-	cmp	w0, w24
-	bhi	.L1763
-	adrp	x1, .LANCHOR152
+	mov	x24, x2
+	ldrb	w0, [x0, #:lo12:.LANCHOR12]
+	mov	x23, x3
+	mov	w25, w4
+	and	w21, w5, 255
+	ubfx	x19, x20, 24, 2
+	cmp	w0, w22
+	bhi	.L2017
+	adrp	x1, .LANCHOR161
 	adrp	x0, .LC0
-	mov	w2, 494
-	add	x1, x1, :lo12:.LANCHOR152
+	mov	w2, 473
+	add	x1, x1, :lo12:.LANCHOR161
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1764:
-	b	.L1764
-.L1763:
-	adrp	x0, .LANCHOR17
-	add	x0, x0, :lo12:.LANCHOR17
-	mov	w20, w1
-	mov	x23, x2
-	mov	x22, x3
-	mov	w25, w4
-	and	w21, w5, 255
-	ldrb	w26, [x0, w24, sxtw]
-	tst	x20, 50331648
-	bne	.L1775
-	adrp	x0, .LANCHOR18
-	ldrb	w1, [x0, #:lo12:.LANCHOR18]
-	adrp	x0, .LANCHOR19
-	cbz	w1, .L1766
-	ldrb	w1, [x0, #:lo12:.LANCHOR19]
-	cbz	w1, .L1775
-.L1766:
-	adrp	x1, .LANCHOR20
-	ldrb	w0, [x0, #:lo12:.LANCHOR19]
-	ldrh	w1, [x1, #:lo12:.LANCHOR20]
+.L2017:
+	adrp	x0, .LANCHOR24
+	add	x0, x0, :lo12:.LANCHOR24
+	ldrb	w26, [x0, w22, sxtw]
+	cbnz	w19, .L2027
+	adrp	x0, .LANCHOR11
+	ldrb	w1, [x0, #:lo12:.LANCHOR11]
+	adrp	x0, .LANCHOR25
+	cbz	w1, .L2019
+	ldrb	w1, [x0, #:lo12:.LANCHOR25]
+	cbz	w1, .L2027
+.L2019:
+	adrp	x1, .LANCHOR26
+	ldrb	w0, [x0, #:lo12:.LANCHOR25]
+	ldrh	w1, [x1, #:lo12:.LANCHOR26]
 	udiv	w19, w20, w1
 	mul	w19, w19, w1
 	sub	w1, w20, w19
-	cbz	w0, .L1767
+	cbz	w0, .L2020
 	add	w19, w19, w1, lsl 1
-.L1765:
-	adrp	x0, .LANCHOR29
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 4, .L1768
-	adrp	x0, .LC68
+.L2018:
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 4, .L2021
+	adrp	x0, .LC115
 	mov	w2, w20
 	mov	w1, w26
-	add	x0, x0, :lo12:.LC68
+	add	x0, x0, :lo12:.LC115
 	bl	printf
-.L1768:
-	mov	w0, w26
-	mov	w4, w25
-	mov	x3, x22
-	mov	x2, x23
+.L2021:
 	mov	w1, w19
+	mov	w4, w25
+	mov	x3, x23
+	mov	x2, x24
+	mov	w0, w26
 	bl	flash_prog_page
-	mov	w26, w0
-	cbz	w21, .L1769
-	adrp	x21, .LANCHOR142
-	adrp	x19, .LANCHOR143
+	mov	w19, w0
+	cbz	w21, .L2022
+	adrp	x26, .LANCHOR149
+	adrp	x21, .LANCHOR150
 	mov	w4, w25
 	mov	w1, w20
-	ldr	x3, [x21, #:lo12:.LANCHOR142]
-	mov	w0, w24
-	ldr	x2, [x19, #:lo12:.LANCHOR143]
+	ldr	x3, [x26, #:lo12:.LANCHOR149]
+	mov	w0, w22
+	ldr	x2, [x21, #:lo12:.LANCHOR150]
 	bl	flash_read_page_en
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L1770
-	ldr	x0, [x19, #:lo12:.LANCHOR143]
-	ldr	w1, [x23]
+	beq	.L2023
+	ldr	x0, [x21, #:lo12:.LANCHOR150]
+	ldr	w1, [x24]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	bne	.L1770
-	ldr	x0, [x21, #:lo12:.LANCHOR142]
-	ldr	w1, [x22]
+	bne	.L2023
+	ldr	x0, [x26, #:lo12:.LANCHOR149]
+	ldr	w1, [x23]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	beq	.L1769
-.L1770:
-	ldr	x1, [x21, #:lo12:.LANCHOR142]
+	beq	.L2022
+.L2023:
+	ldr	x1, [x26, #:lo12:.LANCHOR149]
 	mov	w3, 4
-	adrp	x0, .LC69
+	adrp	x0, .LC116
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC69
+	add	x0, x0, :lo12:.LC116
 	bl	rknand_print_hex
-	ldr	x1, [x19, #:lo12:.LANCHOR143]
+	ldr	x1, [x21, #:lo12:.LANCHOR150]
 	mov	w3, 4
-	adrp	x0, .LC70
+	adrp	x0, .LC117
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC70
+	add	x0, x0, :lo12:.LC117
 	bl	rknand_print_hex
-.L1771:
+.L2024:
 	mov	w1, w20
-	adrp	x0, .LC71
-	add	x0, x0, :lo12:.LC71
+	adrp	x0, .LC118
+	add	x0, x0, :lo12:.LC118
 	bl	printf
-	adrp	x1, .LANCHOR152
+	mov	w2, 499
+	adrp	x1, .LANCHOR161
 	adrp	x0, .LC0
-	mov	w2, 520
-	add	x1, x1, :lo12:.LANCHOR152
+	add	x1, x1, :lo12:.LANCHOR161
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1773:
-	b	.L1773
-.L1767:
-	adrp	x0, .LANCHOR21
-	add	x0, x0, :lo12:.LANCHOR21
+	mov	w0, -1
+	b	.L2025
+.L2020:
+	adrp	x0, .LANCHOR27
+	add	x0, x0, :lo12:.LANCHOR27
 	ldrh	w0, [x0, w1, uxtw 1]
 	add	w19, w0, w19
-	b	.L1765
-.L1775:
+	b	.L2018
+.L2027:
 	mov	w19, w20
-	b	.L1765
-.L1769:
-	cmn	w26, #1
-	beq	.L1771
-	mov	w0, w26
+	b	.L2018
+.L2022:
+	mov	w0, w19
+	cmn	w19, #1
+	beq	.L2024
+.L2025:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -11114,7 +12271,7 @@ ftl_test_block:
 	stp	x23, x24, [sp, 48]
 	adrp	x24, ftl_tmp_buffer
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR145
+	adrp	x25, .LANCHOR152
 	stp	x21, x22, [sp, 32]
 	adrp	x26, .LANCHOR100
 	and	w21, w0, 65535
@@ -11127,45 +12284,45 @@ ftl_test_block:
 	str	x0, [x29, 112]
 	str	wzr, [x24, #:lo12:ftl_tmp_buffer]
 	add	x0, x27, :lo12:.LANCHOR95
-	str	wzr, [x25, #:lo12:.LANCHOR145]
+	str	wzr, [x25, #:lo12:.LANCHOR152]
 	str	x0, [x29, 96]
-.L1787:
+.L2039:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
 	cmp	w0, w20
-	bls	.L1797
+	bls	.L2049
 	add	x0, x27, :lo12:.LANCHOR95
 	mov	w22, 0
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR29
-	add	x0, x0, :lo12:.LANCHOR29
+	adrp	x0, .LANCHOR7
+	add	x0, x0, :lo12:.LANCHOR7
 	str	x0, [x29, 104]
-	b	.L1798
-.L1796:
+	b	.L2050
+.L2048:
 	ldr	x0, [x29, 104]
 	ldr	w0, [x0]
-	tbz	x0, 12, .L1788
-	adrp	x0, .LC72
+	tbz	x0, 12, .L2040
+	adrp	x0, .LC119
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC72
+	add	x0, x0, :lo12:.LC119
 	bl	printf
-.L1788:
+.L2040:
 	ldr	x0, [x29, 96]
 	ldrb	w19, [x0]
 	madd	w19, w21, w19, w22
 	and	w19, w19, 65535
-	cbnz	w20, .L1789
-	adrp	x0, .LANCHOR12
-	ldr	x0, [x0, #:lo12:.LANCHOR12]
+	cbnz	w20, .L2041
+	adrp	x0, .LANCHOR20
+	ldr	x0, [x0, #:lo12:.LANCHOR20]
 	ldrb	w0, [x0, 47]
 	cmp	w0, w19
-	bcs	.L1790
-.L1789:
+	bcs	.L2042
+.L2041:
 	and	w28, w20, 255
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_check_bad_block
-	cbnz	w0, .L1790
+	cbnz	w0, .L2042
 	adrp	x0, .LANCHOR99
 	mov	w1, w23
 	ldrh	w7, [x0, #:lo12:.LANCHOR99]
@@ -11173,54 +12330,54 @@ ftl_test_block:
 	mul	w26, w7, w19
 	mov	w2, w26
 	bl	flash_erase_block_en
-	cbz	w0, .L1791
+	cbz	w0, .L2043
 	adrp	x0, .LANCHOR67
 	ldrb	w0, [x0, #:lo12:.LANCHOR67]
 	cmp	w0, 2
-	bne	.L1813
-	adrp	x0, .LANCHOR18
-	ldrb	w0, [x0, #:lo12:.LANCHOR18]
-	cbz	w0, .L1813
+	bne	.L2065
+	adrp	x0, .LANCHOR11
+	ldrb	w0, [x0, #:lo12:.LANCHOR11]
+	cbz	w0, .L2065
 	mov	w2, w26
 	mov	w1, 1
 	mov	w0, w28
 	bl	flash_erase_block_en
-	cbnz	w0, .L1813
-.L1795:
+	cbnz	w0, .L2065
+.L2047:
 	adrp	x0, .LANCHOR67
 	mov	w23, 1
 	ldrb	w0, [x0, #:lo12:.LANCHOR67]
 	add	w26, w26, w0, lsl 24
-.L1794:
-	adrp	x0, .LANCHOR52
+.L2046:
+	adrp	x0, .LANCHOR114
 	mov	w5, 1
-	add	x3, x25, :lo12:.LANCHOR145
+	add	x3, x25, :lo12:.LANCHOR152
 	add	x2, x24, :lo12:ftl_tmp_buffer
-	ldrb	w4, [x0, #:lo12:.LANCHOR52]
+	ldrb	w4, [x0, #:lo12:.LANCHOR114]
 	mov	w1, w26
 	mov	w0, w28
 	bl	flash_prog_page_en
-	cbz	w0, .L1790
-.L1813:
+	cbz	w0, .L2042
+.L2065:
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_mask_bad_block
-.L1790:
+.L2042:
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L1798:
+.L2050:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, w22
-	bhi	.L1796
+	bhi	.L2048
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L1787
-.L1791:
-	cbz	w23, .L1794
-	b	.L1795
-.L1797:
-	cbz	w23, .L1799
+	b	.L2039
+.L2043:
+	cbz	w23, .L2046
+	b	.L2047
+.L2049:
+	cbz	w23, .L2051
 	adrp	x0, .LANCHOR3
 	mov	w1, 2
 	ldr	x0, [x0, #:lo12:.LANCHOR3]
@@ -11228,7 +12385,7 @@ ftl_test_block:
 	ldrb	w0, [x21, 2]
 	bfi	w0, w1, 3, 2
 	strb	w0, [x21, 2]
-.L1799:
+.L2051:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -11254,27 +12411,31 @@ ftl_prog_page:
 	str	x23, [sp, 48]
 	mov	w23, w4
 	bl	sblk_wait_write_queue_completed
+	mov	w0, w19
 	mov	w5, 1
 	mov	w4, w23
 	mov	x3, x22
 	mov	x2, x21
 	mov	w1, w20
-	mov	w0, w19
 	bl	flash_prog_page_en
+	mov	w19, w0
 	cmn	w0, #1
-	bne	.L1814
-	adrp	x1, .LANCHOR153
+	bne	.L2066
+	mov	w2, 2034
+	adrp	x1, .LANCHOR162
 	adrp	x0, .LC0
-	mov	w2, 2013
-	add	x1, x1, :lo12:.LANCHOR153
+	add	x1, x1, :lo12:.LANCHOR162
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1816:
-	b	.L1816
-.L1814:
+	adrp	x0, .LC118
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC118
+	bl	printf
+.L2066:
+	mov	w0, w19
+	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
 	.size	ftl_prog_page, .-ftl_prog_page
@@ -11287,196 +12448,200 @@ ftl_info_flush:
 	mov	w1, 0
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR52
+	adrp	x21, .LANCHOR114
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR155
-	ldrb	w2, [x21, #:lo12:.LANCHOR52]
-	mov	x23, x22
+	adrp	x22, .LANCHOR164
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR99
+	adrp	x23, .LANCHOR99
 	stp	x27, x28, [sp, 80]
-	mov	w26, 0
+	mov	x26, x23
+	ldrb	w2, [x21, #:lo12:.LANCHOR114]
+	add	x25, x22, :lo12:.LANCHOR164
+	add	x28, x23, :lo12:.LANCHOR99
+	mov	w24, 0
 	stp	x19, x20, [sp, 16]
+	mov	w27, w0
+	adrp	x20, .LANCHOR163
 	lsl	w2, w2, 1
-	adrp	x20, .LANCHOR154
-	str	w0, [x29, 108]
-	mov	x24, x25
-	add	x27, x22, :lo12:.LANCHOR155
-	add	x28, x25, :lo12:.LANCHOR99
-	add	x0, x20, :lo12:.LANCHOR154
+	add	x0, x20, :lo12:.LANCHOR163
 	bl	ftl_memset
-.L1819:
-	add	x0, x22, :lo12:.LANCHOR155
-	ldr	w1, [x29, 108]
-	ldrb	w6, [x22, #:lo12:.LANCHOR155]
-	ldrh	w19, [x25, #:lo12:.LANCHOR99]
+.L2070:
+	add	x0, x22, :lo12:.LANCHOR164
+	ldrb	w6, [x22, #:lo12:.LANCHOR164]
+	ldrh	w19, [x23, #:lo12:.LANCHOR99]
 	ldrh	w4, [x0, 2]
-	adrp	x0, .LANCHOR53
-	ldr	x0, [x0, #:lo12:.LANCHOR53]
+	adrp	x0, .LANCHOR101
+	ldr	x0, [x0, #:lo12:.LANCHOR101]
 	ldr	w3, [x0, 4]
 	add	w3, w3, 1
 	str	w3, [x0, 4]
-	add	x0, x20, :lo12:.LANCHOR154
-	str	w1, [x20, #:lo12:.LANCHOR154]
+	add	x0, x20, :lo12:.LANCHOR163
+	str	w27, [x20, #:lo12:.LANCHOR163]
 	str	w3, [x0, 4]
-	adrp	x0, .LANCHOR29
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 12, .L1820
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2071
 	mov	w2, w4
 	mov	w1, w6
-	stp	w4, w6, [x29, 100]
-	adrp	x0, .LC73
-	add	x0, x0, :lo12:.LC73
+	str	w4, [x29, 96]
+	adrp	x0, .LC120
+	str	w6, [x29, 104]
+	add	x0, x0, :lo12:.LC120
 	bl	printf
-	ldp	w4, w6, [x29, 100]
-.L1820:
+	ldr	w4, [x29, 96]
+	ldr	w6, [x29, 104]
+.L2071:
 	adrp	x1, .LANCHOR80
-	ldrh	w0, [x27, 2]
+	ldrh	w0, [x25, 2]
 	ldrh	w1, [x1, #:lo12:.LANCHOR80]
 	cmp	w1, w0
-	bhi	.L1821
-	adrp	x1, .LANCHOR12
-	ldrb	w0, [x27, 1]
-	ldrb	w2, [x27]
-	mov	w4, 0
-	ldr	x6, [x1, #:lo12:.LANCHOR12]
-.L1828:
+	bhi	.L2072
+	adrp	x19, .LANCHOR165
+	adrp	x3, .LC0
+	add	x19, x19, :lo12:.LANCHOR165
+	add	x3, x3, :lo12:.LC0
+.L2079:
+	ldrb	w0, [x25, 1]
+	adrp	x4, .LANCHOR20
 	add	w0, w0, 1
 	and	w0, w0, 255
+	strb	w0, [x25, 1]
 	cmp	w0, 7
-	bls	.L1822
-	mov	x1, 0
-.L1827:
-	add	x3, x6, x1
-	and	w7, w1, 65535
-	ldrb	w8, [x3, 40]
-	add	w3, w8, 127
-	and	w3, w3, 255
-	cmp	w3, 125
-	bhi	.L1823
-	add	x1, x23, :lo12:.LANCHOR155
-	strb	w0, [x1, 1]
-	cbz	w4, .L1824
-	strb	w2, [x23, #:lo12:.LANCHOR155]
-.L1824:
-	adrp	x1, .LANCHOR156
-	adrp	x0, .LC0
-	mov	w2, 668
-	add	x1, x1, :lo12:.LANCHOR156
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1825:
-	b	.L1825
-.L1823:
-	cmp	w8, 255
-	bne	.L1826
-	add	x1, x1, 1
-	cmp	x1, 8
-	bne	.L1827
-	mov	w7, w1
-.L1826:
-	and	w0, w7, 255
-	mov	w26, 1
-.L1822:
+	bls	.L2073
+	mov	x0, 0
+.L2078:
+	ldr	x2, [x4, #:lo12:.LANCHOR20]
 	add	w1, w0, 8
-	mov	w4, 1
-	add	x1, x6, x1, sxtw
+	and	w24, w0, 65535
+	add	x1, x2, x1, sxtw
 	ldrb	w2, [x1, 32]
-	cmp	w2, 255
-	beq	.L1828
+	add	w1, w2, 127
+	and	w1, w1, 255
+	cmp	w1, 125
+	bhi	.L2074
+	mov	x0, x3
+	stp	x4, x3, [x29, 96]
+	mov	w2, 672
+	mov	x1, x19
+	bl	printf
+	ldp	x4, x3, [x29, 96]
+.L2077:
+	strb	w24, [x25, 1]
+	mov	w24, 1
+.L2073:
+	ldr	x0, [x4, #:lo12:.LANCHOR20]
+	ldrb	w1, [x25, 1]
+	add	x0, x0, x1
+	ldrb	w0, [x0, 40]
+	strb	w0, [x25]
+	cmp	w0, 255
+	beq	.L2079
 	ldrh	w19, [x28]
-	strb	w0, [x27, 1]
+	mul	w19, w19, w0
 	mov	w0, 0
-	strb	w2, [x27]
-	mul	w19, w19, w2
 	mov	w1, w19
 	bl	flash_erase_block
-	ldrb	w4, [x21, #:lo12:.LANCHOR52]
+	ldrb	w4, [x21, #:lo12:.LANCHOR114]
 	mov	w1, w19
-	add	x3, x20, :lo12:.LANCHOR154
+	add	x3, x20, :lo12:.LANCHOR163
 	adrp	x2, ftl_info_data_buffer
 	mov	w0, 0
 	add	x2, x2, :lo12:ftl_info_data_buffer
+	add	w19, w19, 1
 	bl	ftl_prog_page
 	mov	w0, 1
-	add	w19, w19, w0
-	strh	w0, [x27, 2]
-.L1829:
-	ldrb	w4, [x21, #:lo12:.LANCHOR52]
+	strh	w0, [x25, 2]
+.L2080:
+	ldrb	w4, [x21, #:lo12:.LANCHOR114]
 	mov	w1, w19
-	add	x3, x20, :lo12:.LANCHOR154
+	add	x3, x20, :lo12:.LANCHOR163
 	adrp	x2, ftl_info_data_buffer
 	mov	w0, 0
 	add	x2, x2, :lo12:ftl_info_data_buffer
 	bl	ftl_prog_page
 	cmn	w0, #1
-	ldrh	w1, [x27, 2]
+	ldrh	w1, [x25, 2]
+	adrp	x0, .LANCHOR166
 	add	w1, w1, 1
-	strh	w1, [x27, 2]
-	beq	.L1819
-	cbnz	w26, .L1830
-.L1838:
-	ldrb	w0, [x23, #:lo12:.LANCHOR155]
+	strh	w1, [x25, 2]
+	beq	.L2081
+	ldrb	w1, [x0, #:lo12:.LANCHOR166]
+	cbz	w1, .L2082
+.L2081:
+	strb	wzr, [x0, #:lo12:.LANCHOR166]
+	b	.L2070
+.L2074:
+	cmp	w2, 255
+	bne	.L2077
+	add	x0, x0, 1
+	cmp	x0, 8
+	bne	.L2078
+	mov	w24, w0
+	b	.L2077
+.L2072:
+	madd	w19, w19, w6, w4
+	cbnz	w0, .L2080
+	mov	w1, w19
+	bl	flash_erase_block
+	b	.L2080
+.L2082:
+	cbnz	w24, .L2083
+.L2091:
+	adrp	x0, .LANCHOR164
+	ldrb	w0, [x0, #:lo12:.LANCHOR164]
 	cmp	w0, 255
-	bne	.L1854
-	adrp	x1, .LANCHOR156
+	bne	.L2085
+	adrp	x1, .LANCHOR165
 	adrp	x0, .LC0
-	mov	w2, 703
-	add	x1, x1, :lo12:.LANCHOR156
+	mov	w2, 708
+	add	x1, x1, :lo12:.LANCHOR165
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1839:
-	b	.L1839
-.L1821:
-	madd	w19, w19, w6, w4
-	cbnz	w0, .L1829
-	mov	w1, w19
-	bl	flash_erase_block
-	b	.L1829
-.L1830:
-	ldrb	w19, [x27, 1]
-	add	x24, x24, :lo12:.LANCHOR99
-	adrp	x20, .LANCHOR12
+.L2085:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L2083:
+	ldrb	w19, [x25, 1]
+	adrp	x20, .LANCHOR165
+	adrp	x21, .LC0
+	add	x20, x20, :lo12:.LANCHOR165
 	add	w19, w19, 1
-.L1833:
+	add	x21, x21, :lo12:.LC0
+	adrp	x22, .LANCHOR20
+.L2086:
 	cmp	w19, 7
-	bhi	.L1838
-	ldr	x1, [x20, #:lo12:.LANCHOR12]
+	bhi	.L2091
+	ldr	x1, [x22, #:lo12:.LANCHOR20]
 	add	w0, w19, 8
 	add	x0, x1, x0, sxtw
-	ldrb	w0, [x0, 32]
-	add	w1, w0, 127
-	and	w1, w1, 255
-	cmp	w1, 125
-	bhi	.L1834
-	adrp	x1, .LANCHOR156
-	adrp	x0, .LC0
-	mov	w2, 696
-	add	x1, x1, :lo12:.LANCHOR156
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1835:
-	b	.L1835
-.L1834:
-	cmp	w0, 255
-	beq	.L1836
-	ldrh	w1, [x24]
-	mul	w1, w1, w0
+	ldrb	w23, [x0, 32]
+	add	w0, w23, 127
+	and	w0, w0, 255
+	cmp	w0, 125
+	bhi	.L2087
+	mov	w2, 701
+	mov	x1, x20
+	mov	x0, x21
+	bl	printf
+.L2088:
+	ldrh	w1, [x26, #:lo12:.LANCHOR99]
 	mov	w0, 0
+	mul	w1, w1, w23
 	bl	flash_erase_block
-.L1836:
+	b	.L2089
+.L2087:
+	cmp	w23, 255
+	bne	.L2088
+.L2089:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1833
-.L1854:
-	ldp	x19, x20, [sp, 16]
-	mov	w0, 0
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 112
-	ret
+	b	.L2086
 	.size	ftl_info_flush, .-ftl_info_flush
 	.section	.text.ftl_info_blk_init,"ax",@progbits
 	.align	2
@@ -11484,84 +12649,89 @@ ftl_info_flush:
 	.type	ftl_info_blk_init, %function
 ftl_info_blk_init:
 	stp	x29, x30, [sp, -128]!
-	adrp	x0, .LANCHOR157
-	adrp	x1, .LANCHOR3
+	adrp	x0, .LANCHOR167
+	adrp	x1, .LANCHOR166
 	mov	w2, 16384
 	add	x29, sp, 0
+	strb	wzr, [x0, #:lo12:.LANCHOR167]
+	mov	w0, 1
+	strb	w0, [x1, #:lo12:.LANCHOR166]
+	adrp	x1, .LANCHOR168
 	stp	x19, x20, [sp, 16]
 	adrp	x20, ftl_info_data_buffer
-	strb	wzr, [x0, #:lo12:.LANCHOR157]
+	strb	w0, [x1, #:lo12:.LANCHOR168]
+	adrp	x1, .LANCHOR3
 	add	x0, x20, :lo12:ftl_info_data_buffer
+	stp	x21, x22, [sp, 32]
 	str	x0, [x1, #:lo12:.LANCHOR3]
 	adrp	x1, .LANCHOR2
-	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR53
-	ldrh	w1, [x1, #:lo12:.LANCHOR2]
-	adrp	x21, .LANCHOR155
+	adrp	x22, .LANCHOR101
 	stp	x25, x26, [sp, 64]
-	adrp	x26, .LANCHOR99
+	ldrh	w1, [x1, #:lo12:.LANCHOR2]
+	adrp	x21, .LANCHOR164
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR12
-	add	x1, x0, x1, lsl 2
+	adrp	x23, .LANCHOR20
 	stp	x27, x28, [sp, 80]
-	str	x1, [x22, #:lo12:.LANCHOR53]
+	adrp	x26, .LANCHOR99
+	add	x1, x0, x1, lsl 2
+	str	x1, [x22, #:lo12:.LANCHOR101]
 	mov	w1, 0
 	bl	ftl_memset
-	adrp	x25, .LANCHOR52
 	mov	w1, 0
 	mov	w2, 16384
 	adrp	x0, ftl_ext_info_data_buffer
 	add	x0, x0, :lo12:ftl_ext_info_data_buffer
 	bl	ftl_memset
+	adrp	x25, .LANCHOR114
+	ldr	x1, [x23, #:lo12:.LANCHOR20]
+	add	x0, x21, :lo12:.LANCHOR164
 	mov	w27, 21574
-	ldr	x1, [x23, #:lo12:.LANCHOR12]
-	add	x0, x21, :lo12:.LANCHOR155
 	add	x26, x26, :lo12:.LANCHOR99
-	add	x25, x25, :lo12:.LANCHOR52
+	add	x25, x25, :lo12:.LANCHOR114
 	mov	x19, 7
-	movk	w27, 0x494c, lsl 16
 	strb	wzr, [x0, 1]
+	movk	w27, 0x494c, lsl 16
 	ldrb	w1, [x1, 40]
-	strb	w1, [x21, #:lo12:.LANCHOR155]
+	strb	w1, [x21, #:lo12:.LANCHOR164]
 	strh	wzr, [x0, 2]
-.L1858:
-	ldr	x1, [x23, #:lo12:.LANCHOR12]
+.L2107:
+	ldr	x1, [x23, #:lo12:.LANCHOR20]
 	add	w0, w19, 8
 	sxth	w24, w19
 	mov	w28, w19
 	add	x0, x1, x0, sxtw
 	ldrb	w0, [x0, 32]
 	cmp	w0, 255
-	bne	.L1857
-.L1862:
+	bne	.L2106
+.L2111:
 	sub	x19, x19, #1
 	cmn	x19, #1
-	bne	.L1858
+	bne	.L2107
 	mov	w24, 0
-.L1859:
-	adrp	x0, .LANCHOR29
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 12, .L1863
-	ldr	x0, [x22, #:lo12:.LANCHOR53]
+.L2108:
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2112
+	ldr	x0, [x22, #:lo12:.LANCHOR101]
 	mov	w2, 4800
 	mov	w1, w19
 	ldr	w3, [x0]
-	adrp	x0, .LC75
-	add	x0, x0, :lo12:.LC75
+	adrp	x0, .LC122
+	add	x0, x0, :lo12:.LC122
 	bl	printf
-.L1863:
+.L2112:
 	cmn	w19, #1
-	bne	.L1864
+	bne	.L2113
 	mov	w1, 0
 	mov	w2, 16384
 	add	x0, x20, :lo12:ftl_info_data_buffer
 	bl	ftl_memset
-	ldr	x0, [x22, #:lo12:.LANCHOR53]
+	ldr	x0, [x22, #:lo12:.LANCHOR101]
 	mov	w1, 21574
 	movk	w1, 0x494c, lsl 16
 	str	w1, [x0]
 	mov	w0, w19
-.L1856:
+.L2105:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -11569,12 +12739,12 @@ ftl_info_blk_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1857:
+.L2106:
 	ldrh	w6, [x26]
 	add	x8, x20, :lo12:ftl_info_data_buffer
 	ldrb	w4, [x25]
-	adrp	x7, .LANCHOR154
-	add	x7, x7, :lo12:.LANCHOR154
+	adrp	x7, .LANCHOR163
+	add	x7, x7, :lo12:.LANCHOR163
 	mov	x2, x8
 	mov	x3, x7
 	stp	x7, x8, [x29, 104]
@@ -11587,7 +12757,7 @@ ftl_info_blk_init:
 	cmn	w0, #1
 	ldr	w6, [x29, 124]
 	ldp	x7, x8, [x29, 104]
-	bne	.L1860
+	bne	.L2109
 	ldrb	w4, [x25]
 	mov	x3, x7
 	mov	x2, x8
@@ -11595,46 +12765,46 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_read_page
 	mov	w5, w0
-.L1860:
-	adrp	x0, .LANCHOR29
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 12, .L1861
-	ldr	x0, [x22, #:lo12:.LANCHOR53]
+.L2109:
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2110
+	ldr	x0, [x22, #:lo12:.LANCHOR101]
 	mov	w2, w5
 	str	w5, [x29, 124]
-	mov	w3, 576
+	mov	w3, 580
 	mov	w1, w28
 	ldr	w4, [x0]
-	adrp	x0, .LC74
-	add	x0, x0, :lo12:.LC74
+	adrp	x0, .LC121
+	add	x0, x0, :lo12:.LC121
 	bl	printf
 	ldr	w5, [x29, 124]
-.L1861:
+.L2110:
 	cmn	w5, #1
-	beq	.L1862
-	ldr	x0, [x22, #:lo12:.LANCHOR53]
+	beq	.L2111
+	ldr	x0, [x22, #:lo12:.LANCHOR101]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L1862
+	bne	.L2111
 	mov	w19, w24
-	b	.L1859
-.L1864:
-	ldr	x1, [x23, #:lo12:.LANCHOR12]
+	b	.L2108
+.L2113:
+	ldr	x1, [x23, #:lo12:.LANCHOR20]
 	add	w0, w24, 8
 	add	x20, x20, :lo12:ftl_info_data_buffer
 	mov	w4, 4
 	mov	x2, x20
-	adrp	x26, .LANCHOR52
+	adrp	x26, .LANCHOR114
 	add	x0, x1, x0, sxtw
 	mov	w27, 21574
-	add	x26, x26, :lo12:.LANCHOR52
+	add	x26, x26, :lo12:.LANCHOR114
 	movk	w27, 0x494c, lsl 16
 	ldrb	w1, [x0, 32]
-	add	x0, x21, :lo12:.LANCHOR155
-	strb	w1, [x21, #:lo12:.LANCHOR155]
+	add	x0, x21, :lo12:.LANCHOR164
+	strb	w1, [x21, #:lo12:.LANCHOR164]
 	strb	w24, [x0, 1]
-	adrp	x24, .LANCHOR154
-	add	x24, x24, :lo12:.LANCHOR154
+	adrp	x24, .LANCHOR163
+	add	x24, x24, :lo12:.LANCHOR163
 	mov	w0, 0
 	mov	x3, x24
 	bl	flash_get_last_written_page
@@ -11642,11 +12812,11 @@ ftl_info_blk_init:
 	add	w0, w0, 1
 	and	w19, w0, 65535
 	adrp	x0, .LANCHOR99
-	ldrb	w25, [x21, #:lo12:.LANCHOR155]
+	ldrb	w25, [x21, #:lo12:.LANCHOR164]
 	ldrh	w0, [x0, #:lo12:.LANCHOR99]
 	madd	w25, w25, w0, w23
-.L1866:
-	tbnz	w23, #31, .L1871
+.L2115:
+	tbnz	w23, #31, .L2120
 	ldrb	w4, [x26]
 	mov	x3, x24
 	mov	x2, x20
@@ -11654,43 +12824,43 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_read_page
 	cmn	w0, #1
-	beq	.L1867
-	ldr	x0, [x22, #:lo12:.LANCHOR53]
+	beq	.L2116
+	ldr	x0, [x22, #:lo12:.LANCHOR101]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L1867
-.L1871:
-	ldr	x0, [x22, #:lo12:.LANCHOR53]
-	add	x21, x21, :lo12:.LANCHOR155
+	bne	.L2116
+.L2120:
+	ldr	x0, [x22, #:lo12:.LANCHOR101]
+	add	x21, x21, :lo12:.LANCHOR164
 	strh	w19, [x21, 2]
 	ldr	w1, [x0, 16]
 	cmp	w1, 2048
-	bhi	.L1868
-.L1869:
+	bhi	.L2117
+.L2118:
 	ldr	w1, [x0, 24]
 	cmp	w1, 2048
-	bls	.L1872
+	bls	.L2121
 	ldr	w2, [x0, 28]
 	add	w2, w2, w1, lsr 11
 	and	w1, w1, 2047
 	stp	w1, w2, [x0, 24]
-.L1872:
+.L2121:
 	ldr	w1, [x0, 32]
 	cmp	w1, 1024
-	bls	.L1873
+	bls	.L2122
 	ldr	w2, [x0, 36]
 	add	w2, w2, w1, lsr 10
 	and	w1, w1, 1023
 	stp	w1, w2, [x0, 32]
-.L1873:
+.L2122:
 	ldr	w1, [x0, 40]
 	cmp	w1, 1024
-	bls	.L1874
+	bls	.L2123
 	ldr	w2, [x0, 44]
 	add	w2, w2, w1, lsr 10
 	and	w1, w1, 1023
 	stp	w1, w2, [x0, 40]
-.L1874:
+.L2123:
 	ldr	w1, [x0, 64]
 	add	w1, w1, 1
 	str	w1, [x0, 64]
@@ -11699,18 +12869,18 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_info_flush
 	mov	w0, 0
-	b	.L1856
-.L1867:
+	b	.L2105
+.L2116:
 	sub	w23, w23, #1
 	sub	w25, w25, #1
 	sxth	w23, w23
-	b	.L1866
-.L1868:
+	b	.L2115
+.L2117:
 	ldr	w2, [x0, 20]
 	add	w2, w2, w1, lsr 11
 	and	w1, w1, 2047
 	stp	w1, w2, [x0, 16]
-	b	.L1869
+	b	.L2118
 	.size	ftl_info_blk_init, .-ftl_info_blk_init
 	.section	.text.ftl_ext_info_flush,"ax",@progbits
 	.align	2
@@ -11726,90 +12896,99 @@ ftl_ext_info_flush:
 	stp	x23, x24, [sp, 48]
 	ldr	w1, [x0, 520]
 	stp	x25, x26, [sp, 64]
-	str	x27, [sp, 80]
-	cbz	w1, .L1890
+	stp	x27, x28, [sp, 80]
+	cbz	w1, .L2139
 	str	wzr, [x0, 520]
-.L1890:
-	adrp	x24, .LANCHOR53
+.L2139:
 	adrp	x20, .LANCHOR80
+	adrp	x22, .LANCHOR169
 	adrp	x21, .LANCHOR96
 	add	x20, x20, :lo12:.LANCHOR80
-	mov	x22, x24
+	add	x22, x22, :lo12:.LANCHOR169
 	add	x21, x21, :lo12:.LANCHOR96
 	mov	w0, 0
 	bl	ftl_total_vpn_update
-.L1899:
-	ldr	x0, [x24, #:lo12:.LANCHOR53]
+.L2140:
+	adrp	x23, .LANCHOR101
+	mov	x24, x23
+.L2143:
+	ldr	x0, [x23, #:lo12:.LANCHOR101]
 	ldr	w1, [x0, 56]
 	add	w1, w1, 1
 	str	w1, [x0, 56]
 	ldrh	w1, [x0, 140]
 	ldrh	w0, [x20]
 	cmp	w1, w0
-	bcc	.L1891
+	bcc	.L2141
 	bl	ftl_ext_alloc_new_blk
-.L1891:
-	ldr	x2, [x22, #:lo12:.LANCHOR53]
+.L2141:
+	ldr	x0, [x24, #:lo12:.LANCHOR101]
+	ldrh	w1, [x0, 130]
 	mov	w0, 65535
-	ldrh	w1, [x2, 130]
 	cmp	w1, w0
-	bne	.L1892
-	adrp	x1, .LANCHOR158
+	bne	.L2142
 	adrp	x0, .LC0
-	mov	w2, 1603
-	add	x1, x1, :lo12:.LANCHOR158
+	mov	w2, 1621
+	mov	x1, x22
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1893:
-	b	.L1893
-.L1892:
-	ldrh	w0, [x21]
+.L2142:
+	ldr	x1, [x24, #:lo12:.LANCHOR101]
 	mov	w19, 21
-	adrp	x25, .LANCHOR52
-	adrp	x26, .LANCHOR154
+	ldrh	w0, [x21]
+	adrp	x26, .LANCHOR114
+	adrp	x27, .LANCHOR163
+	add	x25, x27, :lo12:.LANCHOR163
 	sub	w0, w19, w0
 	mov	w19, 1
-	add	x23, x26, :lo12:.LANCHOR154
-	asr	w27, w1, w0
+	ldrh	w2, [x1, 130]
 	lsl	w19, w19, w0
-	adrp	x0, .LANCHOR99
 	sub	w19, w19, #1
-	and	w19, w19, w1
-	ldrh	w1, [x0, #:lo12:.LANCHOR99]
-	ldrh	w0, [x2, 140]
-	ldrb	w2, [x25, #:lo12:.LANCHOR52]
-	madd	w19, w19, w1, w0
-	lsl	w2, w2, 1
+	and	w19, w19, w2
+	asr	w28, w2, w0
+	adrp	x0, .LANCHOR99
+	ldrh	w2, [x0, #:lo12:.LANCHOR99]
+	ldrh	w0, [x1, 140]
 	mov	w1, 0
-	mov	x0, x23
-	bl	ftl_memset
+	madd	w19, w19, w2, w0
+	ldrb	w2, [x26, #:lo12:.LANCHOR114]
+	mov	x0, x25
 	and	w19, w19, 65535
-	ldr	x0, [x22, #:lo12:.LANCHOR53]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	ldr	x0, [x24, #:lo12:.LANCHOR101]
 	mov	w1, w19
-	ldrb	w4, [x25, #:lo12:.LANCHOR52]
-	mov	x3, x23
-	str	wzr, [x26, #:lo12:.LANCHOR154]
+	ldrb	w4, [x26, #:lo12:.LANCHOR114]
+	mov	x3, x25
+	str	wzr, [x27, #:lo12:.LANCHOR163]
 	adrp	x2, ftl_ext_info_data_buffer
 	add	x2, x2, :lo12:ftl_ext_info_data_buffer
 	ldr	w0, [x0, 56]
-	str	w0, [x23, 4]
-	mov	w0, w27
+	str	w0, [x25, 4]
+	mov	w0, w28
 	bl	ftl_prog_page
-	ldr	x2, [x22, #:lo12:.LANCHOR53]
+	ldr	x2, [x24, #:lo12:.LANCHOR101]
 	ldrh	w1, [x2, 140]
 	add	w1, w1, 1
 	and	w1, w1, 65535
 	strh	w1, [x2, 140]
 	cmp	w1, 1
-	beq	.L1899
+	beq	.L2143
 	cmn	w0, #1
-	beq	.L1899
+	adrp	x0, .LANCHOR168
+	beq	.L2144
+	ldrb	w1, [x0, #:lo12:.LANCHOR168]
+	cbz	w1, .L2145
+.L2144:
+	strb	wzr, [x0, #:lo12:.LANCHOR168]
+	b	.L2140
+.L2145:
 	mov	w0, 0
-	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
 	.size	ftl_ext_info_flush, .-ftl_ext_info_flush
@@ -11819,13 +12998,13 @@ ftl_ext_info_flush:
 	.type	ftl_ext_info_init, %function
 ftl_ext_info_init:
 	stp	x29, x30, [sp, -112]!
-	adrp	x0, .LANCHOR109
+	adrp	x0, .LANCHOR110
 	mov	w4, 4
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR53
-	strh	wzr, [x0, #:lo12:.LANCHOR109]
-	ldr	x0, [x22, #:lo12:.LANCHOR53]
+	adrp	x22, .LANCHOR101
+	strh	wzr, [x0, #:lo12:.LANCHOR110]
+	ldr	x0, [x22, #:lo12:.LANCHOR101]
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
 	adrp	x25, ftl_ext_info_data_buffer
@@ -11834,11 +13013,11 @@ ftl_ext_info_init:
 	ldrh	w19, [x0, 130]
 	adrp	x0, .LANCHOR96
 	stp	x27, x28, [sp, 80]
-	adrp	x24, .LANCHOR154
+	adrp	x24, .LANCHOR163
 	ldrh	w1, [x0, #:lo12:.LANCHOR96]
 	mov	w0, 21
 	and	w26, w19, 16383
-	add	x3, x24, :lo12:.LANCHOR154
+	add	x3, x24, :lo12:.LANCHOR163
 	sub	w0, w0, w1
 	mov	w1, w26
 	asr	w19, w19, w0
@@ -11846,32 +13025,32 @@ ftl_ext_info_init:
 	mov	w0, w19
 	bl	flash_get_last_written_page
 	sxth	w21, w0
-	adrp	x0, .LANCHOR29
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 12, .L1905
-	adrp	x1, .LANCHOR159
-	adrp	x0, .LC33
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2156
+	adrp	x1, .LANCHOR170
+	adrp	x0, .LC66
 	mov	w3, w21
-	mov	w2, 1646
-	add	x1, x1, :lo12:.LANCHOR159
-	add	x0, x0, :lo12:.LC33
+	mov	w2, 1665
+	add	x1, x1, :lo12:.LANCHOR170
+	add	x0, x0, :lo12:.LC66
 	bl	printf
-.L1905:
-	adrp	x27, .LANCHOR52
+.L2156:
+	adrp	x27, .LANCHOR114
 	adrp	x28, .LANCHOR99
 	mov	w5, 20038
-	add	x27, x27, :lo12:.LANCHOR52
+	add	x27, x27, :lo12:.LANCHOR114
 	add	x28, x28, :lo12:.LANCHOR99
 	mov	w23, 0
 	movk	w5, 0x4549, lsl 16
-.L1906:
+.L2157:
 	and	w20, w21, 65535
 	sub	w0, w20, w23
-	tbnz	x0, 15, .L1911
+	tbnz	x0, 15, .L2162
 	ldrh	w0, [x28]
 	sub	w1, w21, w23
 	ldrb	w4, [x27]
-	add	x3, x24, :lo12:.LANCHOR154
+	add	x3, x24, :lo12:.LANCHOR163
 	str	w5, [x29, 108]
 	add	x2, x25, :lo12:ftl_ext_info_data_buffer
 	madd	w1, w0, w26, w1
@@ -11880,22 +13059,22 @@ ftl_ext_info_init:
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
 	ldr	w5, [x29, 108]
-	beq	.L1907
+	beq	.L2158
 	adrp	x0, .LANCHOR5
 	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	ldr	w0, [x0]
 	cmp	w0, w5
-	bne	.L1907
-.L1911:
+	bne	.L2158
+.L2162:
 	bl	zftl_sblk_list_init
-	ldr	x0, [x22, #:lo12:.LANCHOR53]
+	ldr	x0, [x22, #:lo12:.LANCHOR101]
 	ldrh	w1, [x0, 140]
 	cmp	w1, w21
-	bgt	.L1909
+	bgt	.L2160
 	add	w20, w20, 1
 	strh	w20, [x0, 140]
 	bl	ftl_ext_info_flush
-.L1909:
+.L2160:
 	adrp	x0, .LANCHOR5
 	mov	w1, -1
 	ldp	x19, x20, [sp, 16]
@@ -11907,14 +13086,14 @@ ftl_ext_info_init:
 	str	wzr, [x0, 520]
 	str	wzr, [x0, 604]
 	str	wzr, [x0, 608]
-	adrp	x0, .LANCHOR110
-	strh	w1, [x0, #:lo12:.LANCHOR110]
+	adrp	x0, .LANCHOR111
+	strh	w1, [x0, #:lo12:.LANCHOR111]
 	mov	w0, 0
 	ldp	x29, x30, [sp], 112
 	ret
-.L1907:
+.L2158:
 	add	w23, w23, 1
-	b	.L1906
+	b	.L2157
 	.size	ftl_ext_info_init, .-ftl_ext_info_init
 	.section	.text.ftl_low_format,"ax",@progbits
 	.align	2
@@ -11924,43 +13103,41 @@ ftl_low_format:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR99
+	adrp	x20, .LANCHOR171
 	stp	x21, x22, [sp, 32]
-	add	x20, x20, :lo12:.LANCHOR99
+	add	x20, x20, :lo12:.LANCHOR171
 	stp	x25, x26, [sp, 64]
-	adrp	x21, .LANCHOR12
-	mov	x25, x21
+	adrp	x22, .LANCHOR20
+	mov	x25, x22
 	stp	x23, x24, [sp, 48]
 	mov	w19, 8
-.L1923:
-	ldr	x0, [x21, #:lo12:.LANCHOR12]
+	adrp	x23, .LC0
+.L2173:
+	ldr	x0, [x22, #:lo12:.LANCHOR20]
 	add	x0, x0, x19, sxtw
-	ldrb	w0, [x0, 32]
-	add	w1, w0, 127
-	and	w1, w1, 255
-	cmp	w1, 125
-	bhi	.L1920
-	adrp	x1, .LANCHOR160
-	adrp	x0, .LC0
-	mov	w2, 1817
-	add	x1, x1, :lo12:.LANCHOR160
-	add	x0, x0, :lo12:.LC0
+	ldrb	w21, [x0, 32]
+	add	w0, w21, 127
+	and	w0, w0, 255
+	cmp	w0, 125
+	bhi	.L2171
+	mov	w2, 1836
+	mov	x1, x20
+	add	x0, x23, :lo12:.LC0
 	bl	printf
-.L1921:
-	b	.L1921
-.L1920:
-	cmp	w0, 255
-	beq	.L1922
-	ldrh	w1, [x20]
-	mul	w1, w1, w0
+.L2171:
+	cmp	w21, 255
+	beq	.L2172
+	adrp	x0, .LANCHOR99
+	ldrh	w1, [x0, #:lo12:.LANCHOR99]
 	mov	w0, 0
+	mul	w1, w1, w21
 	bl	flash_erase_block
-.L1922:
+.L2172:
 	add	w19, w19, 1
 	cmp	w19, 16
-	bne	.L1923
+	bne	.L2173
 	bl	sblk_init
-	adrp	x19, .LANCHOR53
+	adrp	x19, .LANCHOR101
 	bl	ftl_info_blk_init
 	adrp	x22, .LANCHOR3
 	mov	w1, 0
@@ -11969,15 +13146,15 @@ ftl_low_format:
 	add	x0, x0, :lo12:ftl_info_data_buffer
 	bl	ftl_memset
 	adrp	x20, .LANCHOR2
-	ldr	x3, [x19, #:lo12:.LANCHOR53]
+	ldr	x3, [x19, #:lo12:.LANCHOR101]
 	mov	w5, 1
 	ldr	x1, [x22, #:lo12:.LANCHOR3]
 	ldrh	w4, [x20, #:lo12:.LANCHOR2]
 	ldrh	w0, [x3, 134]
 	add	x1, x1, x0, uxth 2
-.L1924:
+.L2174:
 	cmp	w0, w4
-	bcc	.L1925
+	bcc	.L2175
 	mov	w0, 21574
 	adrp	x24, .LANCHOR60
 	add	x24, x24, :lo12:.LANCHOR60
@@ -11986,11 +13163,11 @@ ftl_low_format:
 	mov	w21, 0
 	mov	w26, 1
 	str	w0, [x3]
-.L1926:
+.L2176:
 	ldrh	w0, [x20, #:lo12:.LANCHOR2]
 	adrp	x23, .LANCHOR95
 	cmp	w0, w21
-	bhi	.L1934
+	bhi	.L2184
 	adrp	x21, .LANCHOR5
 	mov	w2, 16384
 	mov	w1, 0
@@ -11999,55 +13176,56 @@ ftl_low_format:
 	bl	ftl_memset
 	ldr	x0, [x21, #:lo12:.LANCHOR5]
 	mov	w1, 20038
-	ldr	x7, [x19, #:lo12:.LANCHOR53]
+	ldr	x6, [x19, #:lo12:.LANCHOR101]
 	movk	w1, 0x4549, lsl 16
-	ldr	x2, [x22, #:lo12:.LANCHOR3]
-	mov	w5, 3
-	ldrh	w3, [x7, 148]
+	mov	w4, 3
+	mov	w10, 15
+	ldrh	w3, [x6, 148]
 	str	w1, [x0]
-	mov	w1, 2
-	ldr	x0, [x25, #:lo12:.LANCHOR12]
-	ldrb	w6, [x23, #:lo12:.LANCHOR95]
-	cmp	w6, 1
+	ldr	x0, [x25, #:lo12:.LANCHOR20]
+	ldrb	w2, [x23, #:lo12:.LANCHOR95]
+	ldr	x1, [x22, #:lo12:.LANCHOR3]
+	cmp	w2, 1
+	and	w8, w2, 65535
 	ldrb	w0, [x0, 47]
-	csinc	w5, w5, wzr, ne
-	csinc	w1, w1, wzr, ne
-	and	w5, w5, 255
-	and	w1, w1, 65535
-	udiv	w0, w0, w6
-	and	w8, w0, 65535
+	csinc	w4, w4, wzr, ne
+	and	w4, w4, 255
+	udiv	w0, w0, w2
+	and	w5, w0, 65535
 	ubfiz	x0, x0, 2, 8
 	add	x0, x0, 4
-	add	w24, w8, 1
-	add	x0, x2, x0
-.L1935:
-	ldrb	w4, [x2, 2]
-	add	x2, x2, 4
-	strb	w5, [x2, -1]
-	orr	w4, w4, -32
-	strb	w4, [x2, -2]
-	cmp	x2, x0
-	bne	.L1935
-	add	w0, w1, w3
+	add	w24, w5, 1
+	add	x0, x1, x0
+.L2187:
+	cmp	w2, 4
+	add	x1, x1, 4
+	csel	w7, w10, w4, eq
+	strb	w7, [x1, -1]
+	ldrb	w7, [x1, -2]
+	orr	w7, w7, -32
+	strb	w7, [x1, -2]
+	cmp	x1, x0
+	bne	.L2187
+	mul	w5, w5, w8
 	mov	w4, 16
-	mul	w1, w1, w8
-	sdiv	w4, w4, w6
-	add	w1, w1, w0, uxth
-	adrp	x0, .LANCHOR29
-	strh	w1, [x7, 148]
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	add	w0, w8, w3
+	sdiv	w4, w4, w2
+	add	w0, w5, w0, uxth
+	strh	w0, [x6, 148]
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
 	add	w4, w24, w4
 	and	w4, w4, 65535
-	strh	w4, [x7, 134]
-	tbz	x0, 12, .L1936
-	adrp	x0, .LC76
+	strh	w4, [x6, 134]
+	tbz	x0, 12, .L2188
+	adrp	x0, .LC123
 	mov	w3, w24
 	mov	w2, 128
-	mov	w1, 1862
-	add	x0, x0, :lo12:.LC76
+	mov	w1, 1883
+	add	x0, x0, :lo12:.LC123
 	bl	printf
-.L1936:
-	ldr	x0, [x19, #:lo12:.LANCHOR53]
+.L2188:
+	ldr	x0, [x19, #:lo12:.LANCHOR101]
 	mov	w2, 128
 	mov	w1, 255
 	add	x0, x0, 160
@@ -12056,7 +13234,7 @@ ftl_low_format:
 	adrp	x0, .LANCHOR100
 	ldr	x11, [x22, #:lo12:.LANCHOR3]
 	adrp	x22, .LANCHOR96
-	ldr	x8, [x19, #:lo12:.LANCHOR53]
+	ldr	x8, [x19, #:lo12:.LANCHOR101]
 	and	w7, w6, 65535
 	ldrb	w12, [x0, #:lo12:.LANCHOR100]
 	mov	w2, 21
@@ -12069,9 +13247,9 @@ ftl_low_format:
 	and	w1, w1, 65535
 	lsl	w2, w2, w0
 	and	w2, w2, 65535
-.L1937:
+.L2189:
 	cmp	w24, w10
-	bcc	.L1943
+	bcc	.L2195
 	adrp	x0, .LANCHOR4
 	ldrh	w2, [x20, #:lo12:.LANCHOR2]
 	mov	w1, 0
@@ -12079,7 +13257,7 @@ ftl_low_format:
 	lsl	w2, w2, 1
 	bl	ftl_memset
 	bl	zftl_sblk_list_init
-	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	ldr	x0, [x19, #:lo12:.LANCHOR101]
 	ldrh	w1, [x20, #:lo12:.LANCHOR2]
 	ldrh	w2, [x0, 134]
 	strh	w23, [x0, 112]
@@ -12092,161 +13270,48 @@ ftl_low_format:
 	mov	w23, w0
 	mov	w1, 0
 	bl	ftl_erase_sblk
-	ldr	x1, [x19, #:lo12:.LANCHOR53]
+	ldr	x1, [x19, #:lo12:.LANCHOR101]
 	mov	w0, w23
 	add	x1, x1, 672
 	bl	ftl_get_blk_list_in_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR53]
-	mov	w1, 65533
+	ldr	x0, [x19, #:lo12:.LANCHOR101]
 	ldrh	w20, [x0, 672]
 	strh	wzr, [x0, 690]
-	sub	w2, w20, #1
-	cmp	w1, w2, uxth
-	bcs	.L1944
-	adrp	x1, .LANCHOR160
+	mov	w0, 65533
+	sub	w1, w20, #1
+	cmp	w0, w1, uxth
+	bcs	.L2196
+	adrp	x1, .LANCHOR171
 	adrp	x0, .LC0
-	mov	w2, 1893
-	add	x1, x1, :lo12:.LANCHOR160
+	mov	w2, 1914
+	add	x1, x1, :lo12:.LANCHOR171
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1945:
-	b	.L1945
-.L1925:
-	ldrb	w2, [x1, 2]
-	add	w0, w0, 1
-	and	w0, w0, 65535
-	add	x1, x1, 4
-	and	w2, w2, 31
-	bfi	w2, w5, 3, 2
-	strb	w2, [x1, -2]
-	b	.L1924
-.L1934:
-	strh	w21, [x24]
-	mov	w0, w21
-	bl	ftl_test_block
-	ldrb	w11, [x23, #:lo12:.LANCHOR95]
-	adrp	x0, .LANCHOR100
-	ldr	x6, [x22, #:lo12:.LANCHOR3]
-	mov	w7, 0
-	ldrb	w14, [x0, #:lo12:.LANCHOR100]
-	mov	w10, 0
-	ldr	x13, [x19, #:lo12:.LANCHOR53]
-	mov	w8, 0
-	mul	w12, w21, w11
-	add	x6, x6, x21, uxth 2
-.L1927:
-	cmp	w8, w14
-	bcs	.L1931
-	add	w15, w11, w7
-	b	.L1932
-.L1930:
-	add	w1, w7, w12
-	mov	w0, w8
-	bl	flash_check_bad_block
-	cbz	w0, .L1928
-	ldrb	w1, [x6, 3]
-	lsl	w0, w26, w7
-	orr	w0, w0, w1
-	strb	w0, [x6, 3]
-	ldrh	w0, [x13, 148]
-	add	w0, w0, 1
-	strh	w0, [x13, 148]
-.L1929:
-	add	w7, w7, 1
-.L1932:
-	cmp	w7, w15
-	bne	.L1930
-	add	w8, w8, 1
-	sub	w12, w12, w11
-	and	w8, w8, 65535
-	b	.L1927
-.L1928:
-	add	w10, w10, 1
-	and	w10, w10, 65535
-	b	.L1929
-.L1931:
-	cbnz	w10, .L1933
-	ldrb	w0, [x6, 2]
-	orr	w0, w0, -32
-	strb	w0, [x6, 2]
-.L1933:
-	add	w21, w21, 1
-	and	w21, w21, 65535
-	b	.L1926
-.L1943:
-	add	x13, x11, x24, uxth 2
-	mov	w14, 0
-	mov	w15, 0
-	mov	w3, 0
-	ldrb	w0, [x13, 2]
-	orr	w0, w0, -32
-	strb	w0, [x13, 2]
-.L1938:
-	cmp	w3, w12
-	bcc	.L1947
-	add	w24, w24, 1
-	add	w1, w7, w1
-	and	w24, w24, 65535
-	and	w1, w1, 65535
-	b	.L1937
-.L1941:
-	ldrb	w5, [x13, 3]
-	add	w16, w15, w4
-	asr	w5, w5, w16
-	tbnz	x5, 0, .L1939
-	cmp	w6, 1
-	bls	.L1946
-	and	w0, w0, 1
-	add	w0, w1, w0
-	and	w0, w0, 65535
-.L1940:
-	add	x5, x8, x23, sxtw 1
-	add	w23, w23, 1
-	and	w23, w23, 65535
-	add	w0, w0, w14
-	strh	w0, [x5, 160]
-.L1939:
-	add	x4, x4, 1
-.L1942:
-	and	w0, w4, 65535
-	cmp	w0, w7
-	bcc	.L1941
-	add	w3, w3, 1
-	add	w0, w2, w14
-	and	w3, w3, 65535
-	add	w15, w15, w6
-	and	w14, w0, 65535
-	b	.L1938
-.L1946:
-	mov	w0, w1
-	b	.L1940
-.L1947:
-	mov	x4, 0
-	b	.L1942
-.L1944:
-	strh	wzr, [x0, 696]
+.L2196:
+	ldr	x0, [x19, #:lo12:.LANCHOR101]
 	mov	w2, 256
 	mov	w1, 255
 	add	x0, x0, 416
+	strh	wzr, [x0, 280]
 	bl	ftl_memset
 	ldrh	w2, [x22, #:lo12:.LANCHOR96]
 	mov	w1, 21
-	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	ldr	x0, [x19, #:lo12:.LANCHOR101]
 	sub	w1, w1, w2
 	asr	w1, w20, w1
 	strh	w1, [x0, 694]
 	mov	w1, 1
 	strh	w1, [x0, 688]
-	adrp	x1, .LANCHOR161
+	adrp	x1, .LANCHOR172
 	strh	w20, [x0, 692]
-	ldrh	w1, [x1, #:lo12:.LANCHOR161]
+	ldrh	w1, [x1, #:lo12:.LANCHOR172]
 	strh	w23, [x0, 416]
 	strh	w1, [x0, 698]
 	bl	ftl_alloc_sys_blk
 	mov	w20, w0
 	mov	w1, 0
 	bl	ftl_erase_phy_blk
-	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	ldr	x0, [x19, #:lo12:.LANCHOR101]
 	mov	w1, 2
 	strh	w20, [x0, 130]
 	ldr	x0, [x21, #:lo12:.LANCHOR5]
@@ -12256,7 +13321,7 @@ ftl_low_format:
 	mov	w1, 3
 	add	x0, x0, 48
 	bl	ftl_open_sblk_init
-	ldr	x1, [x19, #:lo12:.LANCHOR53]
+	ldr	x1, [x19, #:lo12:.LANCHOR101]
 	ldr	x0, [x21, #:lo12:.LANCHOR5]
 	add	x0, x0, 136
 	ldrh	w2, [x1, 134]
@@ -12289,6 +13354,118 @@ ftl_low_format:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
+.L2175:
+	ldrb	w2, [x1, 2]
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	add	x1, x1, 4
+	and	w2, w2, 31
+	bfi	w2, w5, 3, 2
+	strb	w2, [x1, -2]
+	b	.L2174
+.L2184:
+	strh	w21, [x24]
+	mov	w0, w21
+	bl	ftl_test_block
+	ldrb	w11, [x23, #:lo12:.LANCHOR95]
+	adrp	x0, .LANCHOR100
+	ldr	x6, [x22, #:lo12:.LANCHOR3]
+	mov	w7, 0
+	ldrb	w14, [x0, #:lo12:.LANCHOR100]
+	mov	w10, 0
+	ldr	x13, [x19, #:lo12:.LANCHOR101]
+	mov	w8, 0
+	mul	w12, w21, w11
+	add	x6, x6, x21, uxth 2
+.L2177:
+	cmp	w8, w14
+	bcs	.L2181
+	add	w15, w11, w7
+	b	.L2182
+.L2180:
+	add	w1, w7, w12
+	mov	w0, w8
+	bl	flash_check_bad_block
+	cbz	w0, .L2178
+	ldrb	w1, [x6, 3]
+	lsl	w0, w26, w7
+	orr	w0, w0, w1
+	strb	w0, [x6, 3]
+	ldrh	w0, [x13, 148]
+	add	w0, w0, 1
+	strh	w0, [x13, 148]
+.L2179:
+	add	w7, w7, 1
+.L2182:
+	cmp	w7, w15
+	bne	.L2180
+	add	w8, w8, 1
+	sub	w12, w12, w11
+	and	w8, w8, 65535
+	b	.L2177
+.L2178:
+	add	w10, w10, 1
+	and	w10, w10, 65535
+	b	.L2179
+.L2181:
+	cbnz	w10, .L2183
+	ldrb	w0, [x6, 2]
+	orr	w0, w0, -32
+	strb	w0, [x6, 2]
+.L2183:
+	add	w21, w21, 1
+	and	w21, w21, 65535
+	b	.L2176
+.L2195:
+	add	x13, x11, x24, uxth 2
+	mov	w14, 0
+	mov	w15, 0
+	mov	w3, 0
+	ldrb	w0, [x13, 2]
+	orr	w0, w0, -32
+	strb	w0, [x13, 2]
+.L2190:
+	cmp	w3, w12
+	bcc	.L2198
+	add	w24, w24, 1
+	add	w1, w7, w1
+	and	w24, w24, 65535
+	and	w1, w1, 65535
+	b	.L2189
+.L2193:
+	ldrb	w5, [x13, 3]
+	add	w16, w15, w4
+	asr	w5, w5, w16
+	tbnz	x5, 0, .L2191
+	cmp	w6, 1
+	bls	.L2197
+	and	w0, w0, 1
+	add	w0, w1, w0
+	and	w0, w0, 65535
+.L2192:
+	add	x5, x8, x23, sxtw 1
+	add	w23, w23, 1
+	and	w23, w23, 65535
+	add	w0, w0, w14
+	strh	w0, [x5, 160]
+.L2191:
+	add	x4, x4, 1
+.L2194:
+	and	w0, w4, 65535
+	cmp	w0, w7
+	bcc	.L2193
+	add	w3, w3, 1
+	add	w0, w2, w14
+	and	w3, w3, 65535
+	add	w15, w15, w6
+	and	w14, w0, 65535
+	b	.L2190
+.L2197:
+	mov	w0, w1
+	b	.L2192
+.L2198:
+	mov	x4, 0
+	b	.L2194
 	.size	ftl_low_format, .-ftl_low_format
 	.section	.text.ftl_re_low_format_test,"ax",@progbits
 	.align	2
@@ -12297,11 +13474,11 @@ ftl_low_format:
 ftl_re_low_format_test:
 	stp	x29, x30, [sp, -64]!
 	mov	w1, 1
-	adrp	x0, .LC77
-	add	x0, x0, :lo12:.LC77
+	adrp	x0, .LC124
+	add	x0, x0, :lo12:.LC124
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR53
+	adrp	x19, .LANCHOR101
 	stp	x21, x22, [sp, 32]
 	adrp	x21, .LANCHOR2
 	str	x23, [sp, 48]
@@ -12309,7 +13486,7 @@ ftl_re_low_format_test:
 	bl	sblk_init
 	bl	ftl_info_blk_init
 	bl	ftl_ext_info_init
-	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	ldr	x0, [x19, #:lo12:.LANCHOR101]
 	adrp	x3, .LANCHOR3
 	ldrh	w2, [x21, #:lo12:.LANCHOR2]
 	mov	w4, 0
@@ -12318,10 +13495,10 @@ ftl_re_low_format_test:
 	mov	w6, 0
 	ldrh	w1, [x0, 134]
 	add	x3, x3, x1, uxth 2
-.L1958:
+.L2209:
 	cmp	w1, w2
-	bcc	.L1962
-	adrp	x22, .LANCHOR4
+	bcc	.L2213
+	adrp	x23, .LANCHOR4
 	strh	w6, [x0, 114]
 	strh	w5, [x0, 118]
 	lsl	w2, w2, 1
@@ -12330,83 +13507,59 @@ ftl_re_low_format_test:
 	strh	wzr, [x0, 122]
 	strh	wzr, [x0, 120]
 	strh	wzr, [x0, 124]
-	ldr	x0, [x22, #:lo12:.LANCHOR4]
+	ldr	x0, [x23, #:lo12:.LANCHOR4]
 	bl	ftl_memset
 	bl	zftl_sblk_list_init
 	mov	w0, 1
 	bl	ftl_alloc_sblk
 	mov	w1, 0
-	mov	w23, w0
+	mov	w22, w0
 	bl	ftl_erase_sblk
-	ldr	x1, [x19, #:lo12:.LANCHOR53]
-	mov	w0, w23
+	ldr	x1, [x19, #:lo12:.LANCHOR101]
+	mov	w0, w22
 	add	x1, x1, 672
 	bl	ftl_get_blk_list_in_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR53]
-	mov	w1, 65533
+	ldr	x0, [x19, #:lo12:.LANCHOR101]
 	ldrh	w20, [x0, 672]
 	strh	wzr, [x0, 690]
-	sub	w2, w20, #1
-	cmp	w1, w2, uxth
-	bcs	.L1963
-	adrp	x1, .LANCHOR162
+	mov	w0, 65533
+	sub	w1, w20, #1
+	cmp	w0, w1, uxth
+	bcs	.L2214
+	adrp	x1, .LANCHOR173
 	adrp	x0, .LC0
-	mov	w2, 1965
-	add	x1, x1, :lo12:.LANCHOR162
+	mov	w2, 1986
+	add	x1, x1, :lo12:.LANCHOR173
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1964:
-	b	.L1964
-.L1962:
-	ldrb	w7, [x3, 2]
-	and	w8, w7, 31
-	strb	w8, [x3, 2]
-	ands	w7, w7, 24
-	bne	.L1959
-	add	w6, w6, 1
-	and	w6, w6, 65535
-.L1960:
-	add	w1, w1, 1
-	add	x3, x3, 4
-	and	w1, w1, 65535
-	b	.L1958
-.L1959:
-	cmp	w7, 16
-	bne	.L1961
-	add	w5, w5, 1
-	and	w5, w5, 65535
-	b	.L1960
-.L1961:
-	add	w4, w4, 1
-	and	w4, w4, 65535
-	b	.L1960
-.L1963:
-	strh	wzr, [x0, 696]
+.L2214:
+	ldr	x0, [x19, #:lo12:.LANCHOR101]
 	mov	w2, 256
 	mov	w1, 255
 	add	x0, x0, 416
+	strh	wzr, [x0, 280]
 	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	ldr	x0, [x19, #:lo12:.LANCHOR101]
 	mov	w2, 4096
 	mov	w1, 0
 	add	x0, x0, 704
 	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	ldr	x0, [x19, #:lo12:.LANCHOR101]
 	lsr	w1, w20, 14
 	and	w20, w20, 16383
 	ldrh	w2, [x21, #:lo12:.LANCHOR2]
 	strh	w1, [x0, 694]
 	mov	w1, 1
 	strh	w1, [x0, 688]
-	adrp	x1, .LANCHOR161
+	adrp	x1, .LANCHOR172
 	strh	w20, [x0, 692]
 	adrp	x20, .LANCHOR5
-	ldrh	w1, [x1, #:lo12:.LANCHOR161]
+	ldrh	w1, [x1, #:lo12:.LANCHOR172]
 	lsl	w2, w2, 1
-	strh	w23, [x0, 416]
+	strh	w22, [x0, 416]
 	strh	w1, [x0, 698]
 	mov	w1, 0
-	ldr	x0, [x22, #:lo12:.LANCHOR4]
+	ldr	x0, [x23, #:lo12:.LANCHOR4]
 	bl	ftl_memset
 	ldr	x0, [x20, #:lo12:.LANCHOR5]
 	mov	w1, 2
@@ -12416,7 +13569,7 @@ ftl_re_low_format_test:
 	mov	w1, 3
 	add	x0, x0, 48
 	bl	ftl_open_sblk_init
-	ldr	x1, [x19, #:lo12:.LANCHOR53]
+	ldr	x1, [x19, #:lo12:.LANCHOR101]
 	ldr	x0, [x20, #:lo12:.LANCHOR5]
 	add	x0, x0, 136
 	ldrh	w2, [x1, 134]
@@ -12452,6 +13605,29 @@ ftl_re_low_format_test:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
+.L2213:
+	ldrb	w7, [x3, 2]
+	and	w8, w7, 31
+	strb	w8, [x3, 2]
+	ands	w7, w7, 24
+	bne	.L2210
+	add	w6, w6, 1
+	and	w6, w6, 65535
+.L2211:
+	add	w1, w1, 1
+	add	x3, x3, 4
+	and	w1, w1, 65535
+	b	.L2209
+.L2210:
+	cmp	w7, 16
+	bne	.L2212
+	add	w5, w5, 1
+	and	w5, w5, 65535
+	b	.L2211
+.L2212:
+	add	w4, w4, 1
+	and	w4, w4, 65535
+	b	.L2211
 	.size	ftl_re_low_format_test, .-ftl_re_low_format_test
 	.section	.text.ftl_prog_ppa_page,"ax",@progbits
 	.align	2
@@ -12473,27 +13649,27 @@ ftl_prog_ppa_page:
 ftl_write_last_log_page:
 	ldrh	w1, [x0, 6]
 	cmp	w1, 1
-	bne	.L1969
+	bne	.L2219
 	stp	x29, x30, [sp, -48]!
-	adrp	x1, .LANCHOR105
+	adrp	x1, .LANCHOR106
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
 	stp	x21, x22, [sp, 32]
-	ldr	x20, [x1, #:lo12:.LANCHOR105]
+	ldr	x20, [x1, #:lo12:.LANCHOR106]
 	ldrh	w22, [x0, 12]
 	bl	ftl_get_new_free_page
 	mov	w21, w0
 	cmn	w0, #1
-	beq	.L1970
+	beq	.L2220
 	ldrh	w0, [x19]
 	add	x20, x20, x22, uxth 2
 	bl	ftl_vpn_decrement
-	adrp	x0, .LANCHOR145
+	adrp	x0, .LANCHOR152
 	mov	w1, 15555
-	add	x6, x0, :lo12:.LANCHOR145
+	add	x6, x0, :lo12:.LANCHOR152
 	movk	w1, 0xf55f, lsl 16
-	str	w1, [x0, #:lo12:.LANCHOR145]
+	str	w1, [x0, #:lo12:.LANCHOR152]
 	adrp	x0, .LANCHOR80
 	ldrh	w1, [x0, #:lo12:.LANCHOR80]
 	adrp	x0, .LANCHOR72
@@ -12503,20 +13679,20 @@ ftl_write_last_log_page:
 	lsl	w1, w1, 2
 	bl	js_hash
 	stp	w0, wzr, [x6, 4]
-	adrp	x0, .LANCHOR52
+	adrp	x0, .LANCHOR114
 	mov	x2, x6
 	mov	x1, x20
-	ldrb	w3, [x0, #:lo12:.LANCHOR52]
+	ldrb	w3, [x0, #:lo12:.LANCHOR114]
 	mov	w0, w21
 	str	wzr, [x6, 12]
 	bl	ftl_prog_ppa_page
-.L1970:
+.L2220:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1969:
+.L2219:
 	mov	w0, -1
 	ret
 	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
@@ -12525,48 +13701,48 @@ ftl_write_last_log_page:
 	.global	ftl_open_sblk_recovery
 	.type	ftl_open_sblk_recovery, %function
 ftl_open_sblk_recovery:
-	sub	sp, sp, #176
+	sub	sp, sp, #192
 	stp	x29, x30, [sp, 48]
 	add	x29, sp, 48
 	stp	x21, x22, [sp, 80]
-	adrp	x22, .LANCHOR29
+	adrp	x22, .LANCHOR7
 	stp	x27, x28, [sp, 128]
 	mov	x28, x0
-	ldr	w0, [x22, #:lo12:.LANCHOR29]
+	ldr	w0, [x22, #:lo12:.LANCHOR7]
 	stp	x25, x26, [sp, 112]
 	mov	x25, x1
 	stp	x19, x20, [sp, 64]
 	stp	x23, x24, [sp, 96]
-	tbz	x0, 12, .L1976
+	tbz	x0, 12, .L2226
 	ldrh	w1, [x28, 2]
-	adrp	x0, .LC78
-	add	x0, x0, :lo12:.LC78
+	adrp	x0, .LC125
+	add	x0, x0, :lo12:.LC125
 	bl	printf
-.L1976:
-	ldr	w0, [x22, #:lo12:.LANCHOR29]
-	tbz	x0, 12, .L1977
+.L2226:
+	ldr	w0, [x22, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2227
 	ldrb	w1, [x28, 5]
-	adrp	x0, .LC79
-	add	x0, x0, :lo12:.LC79
+	adrp	x0, .LC126
+	add	x0, x0, :lo12:.LC126
 	bl	printf
-.L1977:
-	ldr	w0, [x22, #:lo12:.LANCHOR29]
-	tbz	x0, 12, .L1978
+.L2227:
+	ldr	w0, [x22, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2228
 	ldrh	w1, [x28]
-	adrp	x0, .LC80
-	add	x0, x0, :lo12:.LC80
+	adrp	x0, .LC127
+	add	x0, x0, :lo12:.LC127
 	bl	printf
-.L1978:
-	ldr	w0, [x22, #:lo12:.LANCHOR29]
-	tbz	x0, 12, .L1979
+.L2228:
+	ldr	w0, [x22, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2229
 	ldrh	w2, [x28, 18]
-	adrp	x0, .LC81
+	adrp	x0, .LC128
 	ldrh	w1, [x28, 16]
-	add	x0, x0, :lo12:.LC81
+	add	x0, x0, :lo12:.LC128
 	bl	printf
-.L1979:
+.L2229:
 	ldrh	w0, [x28, 10]
-	adrp	x26, .LANCHOR52
+	adrp	x26, .LANCHOR114
 	strh	w0, [x28, 14]
 	mov	w27, 0
 	mov	w0, 1
@@ -12575,130 +13751,152 @@ ftl_open_sblk_recovery:
 	ldrb	w20, [x28, 5]
 	ldrh	w21, [x28, 2]
 	mov	x19, x0
-	add	x0, x26, :lo12:.LANCHOR52
-	str	x0, [x29, 120]
-.L1980:
+	add	x0, x26, :lo12:.LANCHOR114
+	str	x0, [x29, 128]
+.L2230:
 	ldrh	w0, [x23, #:lo12:.LANCHOR80]
 	cmp	w0, w21
-	bhi	.L1996
-.L1983:
-	strb	w20, [x28, 5]
-	ldrh	w0, [x23, #:lo12:.LANCHOR80]
-	ldrb	w20, [x28, 9]
-	ldrh	w2, [x28, 10]
+	bhi	.L2244
+.L2233:
+	ldrh	w0, [x28, 10]
 	ldrh	w1, [x28, 6]
+	ldrh	w2, [x23, #:lo12:.LANCHOR80]
+	add	w1, w1, w0
+	ldrb	w0, [x28, 9]
 	strh	w21, [x28, 2]
-	mul	w20, w20, w0
-	add	w1, w1, w2
-	cmp	w1, w20
-	bne	.L1997
-	adrp	x21, .LANCHOR105
+	strb	w20, [x28, 5]
+	mul	w0, w0, w2
+	cmp	w1, w0
+	beq	.L2245
+	adrp	x1, .LANCHOR174
+	adrp	x0, .LC0
+	mov	w2, 1347
+	add	x1, x1, :lo12:.LANCHOR174
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2245:
+	adrp	x21, .LANCHOR106
+	ldrh	w3, [x28, 10]
 	mov	w0, 0
 	mov	w1, 0
-	ldr	x4, [x21, #:lo12:.LANCHOR105]
-.L1998:
-	cmp	w1, w2
-	bcc	.L2001
-	sub	w20, w20, w2
+	ldr	x4, [x21, #:lo12:.LANCHOR106]
+.L2246:
+	cmp	w1, w3
+	bcc	.L2248
+	ldrb	w20, [x28, 9]
 	adrp	x24, .LANCHOR4
-	add	w0, w0, w20
-	and	w20, w0, 65535
-	ldr	w0, [x22, #:lo12:.LANCHOR29]
-	tbz	x0, 12, .L2002
+	ldrh	w1, [x23, #:lo12:.LANCHOR80]
+	madd	w20, w20, w1, w0
+	ldr	w0, [x22, #:lo12:.LANCHOR7]
+	sub	w20, w20, w3
+	and	w20, w20, 65535
+	tbz	x0, 12, .L2249
 	ldrh	w1, [x28]
 	ldr	x2, [x24, #:lo12:.LANCHOR4]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w3, [x2, x0]
-	adrp	x0, .LC83
+	adrp	x0, .LC130
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC83
+	add	x0, x0, :lo12:.LC130
 	bl	printf
-.L2002:
+.L2249:
 	ldr	x0, [x24, #:lo12:.LANCHOR4]
-	adrp	x25, .LANCHOR52
+	adrp	x25, .LANCHOR114
 	ldrh	w1, [x28]
 	adrp	x24, .LANCHOR72
-	adrp	x26, .LC84
+	adrp	x26, .LC131
 	add	x24, x24, :lo12:.LANCHOR72
-	add	x25, x25, :lo12:.LANCHOR52
-	add	x26, x26, :lo12:.LC84
+	add	x25, x25, :lo12:.LANCHOR114
+	add	x26, x26, :lo12:.LC131
 	strh	w20, [x0, x1, lsl 1]
 	mov	w20, 0
 	mov	x0, x19
 	bl	buf_free
-.L2003:
+.L2250:
 	ldrb	w0, [x24]
 	cmp	w20, w0, lsl 1
-	bcc	.L2006
+	bcc	.L2253
 	ldrh	w1, [x28, 12]
 	ldrh	w0, [x23, #:lo12:.LANCHOR80]
 	ldrb	w2, [x28, 9]
 	madd	w0, w0, w2, w1
 	mov	x1, -4
 	add	x0, x1, x0, sxtw 2
-	ldr	x1, [x21, #:lo12:.LANCHOR105]
+	ldr	x1, [x21, #:lo12:.LANCHOR106]
 	ldr	w0, [x1, x0]
 	cmn	w0, #1
-	beq	.L2007
-	adrp	x1, .LANCHOR163
+	beq	.L2254
+	adrp	x1, .LANCHOR174
 	adrp	x0, .LC0
-	mov	w2, 1359
-	add	x1, x1, :lo12:.LANCHOR163
+	mov	w2, 1377
+	add	x1, x1, :lo12:.LANCHOR174
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2008:
-	b	.L2008
-.L1996:
+.L2254:
+	ldrh	w0, [x28, 6]
+	cmp	w0, 1
+	bne	.L2225
+	ldp	x19, x20, [sp, 64]
+	mov	x0, x28
+	ldp	x21, x22, [sp, 80]
+	ldp	x23, x24, [sp, 96]
+	ldp	x25, x26, [sp, 112]
+	ldp	x27, x28, [sp, 128]
+	ldp	x29, x30, [sp, 48]
+	add	sp, sp, 192
+	b	ftl_write_last_log_page
+.L2244:
 	ldrb	w20, [x28, 5]
-	adrp	x24, .LANCHOR99
-	add	x24, x24, :lo12:.LANCHOR99
-.L1981:
+	adrp	x0, .LANCHOR99
+	add	x0, x0, :lo12:.LANCHOR99
+	str	x0, [x29, 136]
+.L2231:
 	ldrb	w0, [x28, 9]
 	cmp	w0, w20
-	bhi	.L1995
+	bhi	.L2243
 	add	w21, w21, 1
 	strb	wzr, [x28, 5]
 	and	w21, w21, 65535
-	b	.L1980
-.L1995:
+	b	.L2230
+.L2243:
 	add	x0, x28, x20, sxtw 1
-	ldrh	w12, [x0, 16]
+	ldrh	w11, [x0, 16]
 	mov	w0, 65535
-	cmp	w12, w0
-	beq	.L1982
-	ldrh	w11, [x24]
-	ldrb	w3, [x26, #:lo12:.LANCHOR52]
+	cmp	w11, w0
+	beq	.L2232
+	ldr	x0, [x29, 136]
+	ldrb	w3, [x26, #:lo12:.LANCHOR114]
 	ldr	x1, [x19, 8]
 	ldr	x2, [x19, 24]
-	madd	w11, w11, w12, w21
-	stp	w12, w11, [x29, 108]
-	mov	w0, w11
+	ldrh	w10, [x0]
+	madd	w10, w10, w11, w21
+	stp	w11, w10, [x29, 116]
+	mov	w0, w10
 	bl	ftl_read_ppa_page
-	mov	w10, w0
+	mov	w24, w0
 	cmp	w0, 512
-	beq	.L1983
+	beq	.L2233
 	cmn	w0, #1
-	ldp	w12, w11, [x29, 108]
-	beq	.L1984
+	ldp	w11, w10, [x29, 116]
+	beq	.L2234
 	ldr	x0, [x19, 24]
 	ldr	w1, [x0]
 	cmn	w1, #1
-	bne	.L1984
+	bne	.L2234
 	ldr	w0, [x0, 4]
 	cmn	w0, #1
-	bne	.L1984
+	bne	.L2234
 	ldr	x0, [x19, 8]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L1983
-.L1984:
-	ldr	w0, [x22, #:lo12:.LANCHOR29]
-	tbz	x0, 12, .L1985
+	beq	.L2233
+.L2234:
+	ldr	w0, [x22, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2235
 	ldr	x1, [x19, 24]
-	mov	w4, w10
+	mov	w4, w24
 	ldr	x0, [x19, 8]
-	mov	w3, w11
-	str	w10, [x29, 112]
+	mov	w3, w10
 	ldr	w2, [x1, 12]
 	str	w2, [sp, 32]
 	ldr	w2, [x1, 8]
@@ -12710,109 +13908,102 @@ ftl_open_sblk_recovery:
 	str	w1, [sp, 8]
 	ldr	w1, [x0, 12]
 	str	w1, [sp]
-	mov	w1, w12
+	mov	w1, w11
 	ldp	w5, w6, [x0]
 	ldr	w7, [x0, 8]
-	adrp	x0, .LC82
-	add	x0, x0, :lo12:.LC82
+	adrp	x0, .LC129
+	add	x0, x0, :lo12:.LC129
 	bl	printf
-	ldr	w10, [x29, 112]
-.L1985:
-	ldrb	w2, [x28, 9]
-	adrp	x0, .LANCHOR157
+.L2235:
+	adrp	x0, .LANCHOR167
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR157]
-	ldrh	w0, [x28, 10]
-	madd	w1, w21, w2, w20
-	cmp	w0, w1
-	beq	.L1986
-	adrp	x1, .LANCHOR163
+	strb	w1, [x0, #:lo12:.LANCHOR167]
+	ldrb	w0, [x28, 9]
+	ldrh	w1, [x28, 10]
+	madd	w0, w0, w21, w20
+	cmp	w1, w0
+	beq	.L2236
+	adrp	x1, .LANCHOR174
 	adrp	x0, .LC0
-	mov	w2, 1255
-	add	x1, x1, :lo12:.LANCHOR163
+	mov	w2, 1270
+	add	x1, x1, :lo12:.LANCHOR174
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1987:
-	b	.L1987
-.L1986:
+.L2236:
+	ldrh	w0, [x28, 10]
 	ldrh	w1, [x28, 6]
+	ldrb	w2, [x28, 9]
 	add	w1, w1, w0
 	ldrh	w0, [x23, #:lo12:.LANCHOR80]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L1988
-	adrp	x1, .LANCHOR163
+	beq	.L2237
+	adrp	x1, .LANCHOR174
 	adrp	x0, .LC0
-	mov	w2, 1256
-	add	x1, x1, :lo12:.LANCHOR163
+	mov	w2, 1271
+	add	x1, x1, :lo12:.LANCHOR174
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1989:
-	b	.L1989
-.L1988:
-	cmn	w10, #1
-	beq	.L1991
-	ldr	x5, [x19, 24]
-	str	x5, [x29, 112]
-	ldr	w0, [x5, 4]
+.L2237:
+	cmn	w24, #1
+	beq	.L2239
+	ldr	x0, [x19, 24]
+	ldr	w0, [x0, 4]
 	cmn	w0, #1
-	beq	.L1991
+	beq	.L2239
 	bl	lpa_hash_get_ppa
-	cbz	x25, .L1993
-	ldr	x5, [x29, 112]
-	ldr	w1, [x5, 8]
+	cbz	x25, .L2241
+	ldr	x3, [x19, 24]
+	ldr	w1, [x3, 8]
 	cmp	w0, w1
-	beq	.L1993
+	beq	.L2241
 	cmn	w0, #1
-	beq	.L1993
-	adrp	x3, .LANCHOR96
-	mov	w1, 21
-	adrp	x27, .LANCHOR95
-	ldrh	w6, [x3, #:lo12:.LANCHOR96]
-	sub	w4, w1, w6
-	mov	w1, 1
-	lsr	w2, w0, w6
-	lsl	w1, w1, w4
+	beq	.L2241
+	adrp	x4, .LANCHOR96
+	mov	w27, 21
+	mov	w24, 1
+	ldrh	w5, [x4, #:lo12:.LANCHOR96]
+	sub	w1, w27, w5
+	lsr	w2, w0, w5
+	adrp	x5, .LANCHOR95
+	lsl	w1, w24, w1
 	sub	w1, w1, #1
 	and	w1, w1, w2
-	ldrb	w2, [x27, #:lo12:.LANCHOR95]
-	mov	x4, x3
+	ldrb	w2, [x5, #:lo12:.LANCHOR95]
 	udiv	w1, w1, w2
 	ldrh	w2, [x25]
 	cmp	w2, w1, uxth
-	bne	.L1993
-	ldr	x1, [x29, 120]
-	ldr	w6, [x5]
-	adrp	x5, .LANCHOR154
-	str	w6, [x29, 108]
-	add	x2, x5, :lo12:.LANCHOR154
-	str	x5, [x29, 112]
+	bne	.L2241
+	ldr	x1, [x29, 128]
+	adrp	x6, .LANCHOR163
+	ldr	w7, [x3]
+	add	x2, x6, :lo12:.LANCHOR163
+	str	w7, [x29, 116]
+	str	x6, [x29, 120]
 	ldrb	w3, [x1]
 	ldr	x1, [x19, 8]
-	str	x4, [x29, 96]
+	stp	x5, x4, [x29, 96]
 	bl	ftl_read_ppa_page
-	ldr	x5, [x29, 112]
-	ldr	w6, [x29, 108]
-	ldr	w0, [x5, #:lo12:.LANCHOR154]
-	cmp	w6, w0
-	bhi	.L1993
+	ldr	x6, [x29, 120]
+	ldr	w7, [x29, 116]
+	ldr	w0, [x6, #:lo12:.LANCHOR163]
+	cmp	w7, w0
+	bhi	.L2241
 	ldr	x0, [x19, 24]
-	ldr	w1, [x0, 8]
-	cmn	w1, #1
-	beq	.L1991
-	ldr	x4, [x29, 96]
-	mov	w0, 21
-	ldrh	w3, [x4, #:lo12:.LANCHOR96]
-	sub	w2, w0, w3
-	mov	w0, 1
-	lsr	w1, w1, w3
-	lsl	w0, w0, w2
-	sub	w0, w0, #1
-	and	w0, w0, w1
-	ldrb	w1, [x27, #:lo12:.LANCHOR95]
-	udiv	w0, w0, w1
+	ldr	w0, [x0, 8]
+	cmn	w0, #1
+	beq	.L2239
+	ldp	x5, x4, [x29, 96]
+	ldrh	w1, [x4, #:lo12:.LANCHOR96]
+	sub	w27, w27, w1
+	lsr	w0, w0, w1
+	lsl	w24, w24, w27
+	sub	w24, w24, #1
+	and	w24, w24, w0
+	ldrb	w0, [x5, #:lo12:.LANCHOR95]
+	udiv	w0, w24, w0
 	bl	ftl_vpn_decrement
-.L1991:
+.L2239:
 	ldrh	w0, [x28, 6]
 	mov	w27, 1
 	sub	w0, w0, #1
@@ -12820,50 +14011,41 @@ ftl_open_sblk_recovery:
 	ldrh	w0, [x28, 10]
 	add	w0, w0, 1
 	strh	w0, [x28, 10]
-.L1982:
+.L2232:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L1981
-.L1997:
-	adrp	x1, .LANCHOR163
-	adrp	x0, .LC0
-	mov	w2, 1332
-	add	x1, x1, :lo12:.LANCHOR163
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1999:
-	b	.L1999
-.L2001:
-	ldrh	w3, [x28, 12]
-	add	w3, w3, w1
-	ldr	w3, [x4, x3, lsl 2]
-	cmn	w3, #1
-	beq	.L2000
-	add	w0, w0, 1
-	and	w0, w0, 65535
-.L2000:
+	b	.L2231
+.L2248:
+	ldrh	w2, [x28, 12]
+	add	w2, w2, w1
+	ldr	w2, [x4, x2, lsl 2]
+	cmn	w2, #1
+	beq	.L2247
+	add	w20, w0, 1
+	and	w0, w20, 65535
+.L2247:
 	add	w1, w1, 1
-	b	.L1998
-.L2006:
-	cbz	w27, .L2004
+	b	.L2246
+.L2253:
+	cbz	w27, .L2251
 	ldrh	w0, [x28, 6]
 	cmp	w0, 1
-	bls	.L2004
+	bls	.L2251
 	mov	x0, x28
 	bl	ftl_get_new_free_page
 	mov	w4, w0
-	ldr	w0, [x22, #:lo12:.LANCHOR29]
-	tbz	x0, 12, .L2005
+	ldr	w0, [x22, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2252
 	mov	w1, w4
-	str	w4, [x29, 120]
+	str	w4, [x29, 136]
 	mov	x0, x26
 	bl	printf
-	ldr	w4, [x29, 120]
-.L2005:
-	adrp	x0, .LANCHOR53
+	ldr	w4, [x29, 136]
+.L2252:
+	adrp	x0, .LANCHOR101
 	ldr	x2, [x19, 24]
 	ldr	x1, [x19, 8]
-	ldr	x0, [x0, #:lo12:.LANCHOR53]
+	ldr	x0, [x0, #:lo12:.LANCHOR101]
 	ldr	w0, [x0, 8]
 	str	w0, [x2]
 	str	wzr, [x2, 12]
@@ -12875,57 +14057,44 @@ ftl_open_sblk_recovery:
 	bl	ftl_prog_ppa_page
 	ldrh	w0, [x28]
 	bl	ftl_vpn_decrement
-.L2004:
+.L2251:
 	add	w20, w20, 1
-	b	.L2003
-.L2007:
-	ldrh	w0, [x28, 6]
-	cmp	w0, 1
-	bne	.L1975
-	ldp	x19, x20, [sp, 64]
-	mov	x0, x28
-	ldp	x21, x22, [sp, 80]
-	ldp	x23, x24, [sp, 96]
-	ldp	x25, x26, [sp, 112]
-	ldp	x27, x28, [sp, 128]
-	ldp	x29, x30, [sp, 48]
-	add	sp, sp, 176
-	b	ftl_write_last_log_page
-.L1993:
+	b	.L2250
+.L2241:
 	ldr	x3, [x19, 24]
 	adrp	x0, .LANCHOR54
 	ldr	w0, [x0, #:lo12:.LANCHOR54]
 	ldr	w1, [x3, 4]
 	cmp	w1, w0
-	bcs	.L1991
+	bcs	.L2239
 	ldrb	w0, [x28, 9]
 	ldrh	w1, [x23, #:lo12:.LANCHOR80]
 	ldrh	w2, [x28, 10]
 	mul	w0, w0, w1
 	sub	w0, w0, #1
 	cmp	w2, w0
-	bge	.L1991
-	adrp	x0, .LANCHOR53
+	bge	.L2239
+	adrp	x0, .LANCHOR101
 	ldr	w1, [x3]
-	ldr	x0, [x0, #:lo12:.LANCHOR53]
+	ldr	x0, [x0, #:lo12:.LANCHOR101]
 	ldr	w4, [x0, 8]
 	cmp	w1, w4
-	bls	.L1994
+	bls	.L2242
 	str	w1, [x0, 8]
-.L1994:
+.L2242:
 	ldrh	w0, [x28, 12]
 	add	w2, w2, w0
 	ldp	w0, w1, [x3, 4]
 	bl	lpa_hash_update_ppa
-	b	.L1991
-.L1975:
+	b	.L2239
+.L2225:
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
 	ldp	x23, x24, [sp, 96]
 	ldp	x25, x26, [sp, 112]
 	ldp	x27, x28, [sp, 128]
 	ldp	x29, x30, [sp, 48]
-	add	sp, sp, 176
+	add	sp, sp, 192
 	ret
 	.size	ftl_open_sblk_recovery, .-ftl_open_sblk_recovery
 	.section	.text.pm_write_page,"ax",@progbits
@@ -12936,89 +14105,96 @@ pm_write_page:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR80
-	stp	x21, x22, [sp, 32]
 	mov	w19, w0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR80
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR53
-	mov	x24, x1
-	add	x20, x20, :lo12:.LANCHOR80
-	mov	x21, x22
+	adrp	x22, .LANCHOR99
 	stp	x25, x26, [sp, 64]
-	mov	w23, 65535
+	adrp	x23, .LANCHOR101
+	mov	x25, x1
+	add	x21, x21, :lo12:.LANCHOR80
+	mov	x20, x23
+	add	x22, x22, :lo12:.LANCHOR99
+	mov	w24, 65535
 	str	x27, [sp, 80]
-.L2058:
-	adrp	x25, .LANCHOR99
-.L2063:
-	ldr	x0, [x22, #:lo12:.LANCHOR53]
+.L2307:
+	ldr	x0, [x23, #:lo12:.LANCHOR101]
 	ldr	w1, [x0, 48]
 	ldrh	w2, [x0, 696]
 	add	w1, w1, 1
 	str	w1, [x0, 48]
-	ldrh	w1, [x20]
+	ldrh	w1, [x21]
 	cmp	w2, w1
-	bcs	.L2059
+	bcs	.L2308
 	ldrh	w0, [x0, 692]
-	cmp	w0, w23
-	bne	.L2060
-.L2059:
+	cmp	w0, w24
+	bne	.L2309
+.L2308:
 	bl	pm_alloc_new_blk
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2060:
-	ldr	x1, [x21, #:lo12:.LANCHOR53]
-	ldrh	w0, [x1, 692]
-	cmp	w0, w23
-	bne	.L2061
-	adrp	x1, .LANCHOR164
+.L2309:
+	ldr	x0, [x20, #:lo12:.LANCHOR101]
+	ldrh	w0, [x0, 692]
+	cmp	w0, w24
+	bne	.L2310
+	adrp	x1, .LANCHOR175
 	adrp	x0, .LC0
-	mov	w2, 224
-	add	x1, x1, :lo12:.LANCHOR164
+	mov	w2, 228
+	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2062:
-	b	.L2062
-.L2061:
-	ldrh	w1, [x1, 696]
-	adrp	x27, .LANCHOR165
-	ldrh	w26, [x25, #:lo12:.LANCHOR99]
+.L2310:
+	ldr	x0, [x20, #:lo12:.LANCHOR101]
+	adrp	x27, .LANCHOR176
+	ldrh	w1, [x22]
 	mov	w2, 64
-	madd	w26, w26, w0, w1
-	ldr	x0, [x27, #:lo12:.LANCHOR165]
+	ldrh	w26, [x0, 692]
+	ldrh	w0, [x0, 696]
+	madd	w26, w26, w1, w0
+	ldr	x0, [x27, #:lo12:.LANCHOR176]
 	mov	w1, 0
 	bl	ftl_memset
-	ldr	x3, [x27, #:lo12:.LANCHOR165]
-	mov	x2, x24
-	ldr	x0, [x21, #:lo12:.LANCHOR53]
+	ldr	x3, [x27, #:lo12:.LANCHOR176]
+	mov	x2, x25
+	ldr	x0, [x20, #:lo12:.LANCHOR101]
 	str	w19, [x3]
 	ldr	w1, [x0, 48]
 	ldrb	w0, [x0, 694]
 	str	w1, [x3, 4]
-	adrp	x1, .LANCHOR52
-	ldrb	w4, [x1, #:lo12:.LANCHOR52]
+	adrp	x1, .LANCHOR114
+	ldrb	w4, [x1, #:lo12:.LANCHOR114]
 	mov	w1, w26
 	bl	ftl_prog_page
-	ldr	x2, [x21, #:lo12:.LANCHOR53]
+	ldr	x2, [x20, #:lo12:.LANCHOR101]
 	ldrh	w1, [x2, 696]
 	add	w1, w1, 1
 	and	w1, w1, 65535
 	strh	w1, [x2, 696]
 	cmp	w1, 1
-	beq	.L2063
+	adrp	x1, .LANCHOR177
+	beq	.L2311
+	ldrb	w3, [x1, #:lo12:.LANCHOR177]
+	cbz	w3, .L2312
+.L2311:
+	strb	wzr, [x1, #:lo12:.LANCHOR177]
+	b	.L2307
+.L2312:
 	cmn	w0, #1
-	bne	.L2064
+	bne	.L2314
 	mov	w1, w26
-	adrp	x0, .LC85
-	add	x0, x0, :lo12:.LC85
+	adrp	x0, .LC132
+	add	x0, x0, :lo12:.LC132
 	bl	printf
-	b	.L2058
-.L2064:
+	b	.L2307
+.L2314:
 	ldrh	w0, [x2, 698]
 	cmp	w19, w0
-	bcs	.L2065
+	bcs	.L2315
 	add	x19, x2, x19, uxtw 2
 	str	w26, [x19, 704]
-.L2065:
+.L2315:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -13034,41 +14210,51 @@ pm_write_page:
 	.type	flash_info_flush, %function
 flash_info_flush:
 	stp	x29, x30, [sp, -112]!
-	mov	w2, 64
-	mov	w1, 0
+	adrp	x0, .LANCHOR7
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR140
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR12
-	ldr	x0, [x23, #:lo12:.LANCHOR140]
-	adrp	x24, .LC87
 	stp	x21, x22, [sp, 32]
-	add	x24, x24, :lo12:.LC87
+	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	adrp	x21, .LANCHOR141
 	stp	x27, x28, [sp, 80]
-	adrp	x22, .LANCHOR20
+	tbz	x0, 12, .L2321
+	adrp	x2, .LANCHOR178
+	adrp	x0, .LC73
+	add	x2, x2, :lo12:.LANCHOR178
+	mov	w1, 251
+	add	x0, x0, :lo12:.LC73
+	bl	printf
+.L2321:
+	adrp	x23, .LANCHOR147
+	adrp	x20, .LANCHOR20
+	mov	w2, 64
+	mov	w1, 0
+	ldr	x0, [x23, #:lo12:.LANCHOR147]
+	adrp	x21, .LANCHOR148
+	adrp	x22, .LANCHOR26
+	adrp	x24, .LC134
+	adrp	x25, .LANCHOR125
+	add	x22, x22, :lo12:.LANCHOR26
+	add	x24, x24, :lo12:.LC134
+	add	x25, x25, :lo12:.LANCHOR125
 	bl	ftl_memset
-	adrp	x25, .LANCHOR121
-	ldr	x1, [x20, #:lo12:.LANCHOR12]
+	add	x27, x21, :lo12:.LANCHOR148
+	ldr	x1, [x20, #:lo12:.LANCHOR20]
 	mov	w3, 16
 	mov	w2, 4
-	adrp	x0, .LC86
-	add	x0, x0, :lo12:.LC86
-	add	x22, x22, :lo12:.LANCHOR20
-	add	x25, x25, :lo12:.LANCHOR121
-	add	x27, x21, :lo12:.LANCHOR141
-	bl	rknand_print_hex
+	adrp	x0, .LC133
+	add	x0, x0, :lo12:.LC133
 	mov	w26, 0
-	ldr	x6, [x20, #:lo12:.LANCHOR12]
+	bl	rknand_print_hex
+	ldr	x6, [x20, #:lo12:.LANCHOR20]
 	add	x0, x6, 16
 	ldr	w1, [x6, 8]
 	bl	js_hash
 	str	w0, [x6, 12]
-.L2070:
-	add	x28, x21, :lo12:.LANCHOR141
-	ldrb	w4, [x21, #:lo12:.LANCHOR141]
+.L2322:
+	add	x28, x21, :lo12:.LANCHOR148
+	ldrb	w4, [x21, #:lo12:.LANCHOR148]
 	ldrh	w19, [x22]
 	mov	x0, x24
 	mov	w1, w4
@@ -13081,40 +14267,40 @@ flash_info_flush:
 	sub	w0, w0, #1
 	cmp	w1, w0
 	ldp	w3, w4, [x29, 104]
-	blt	.L2071
-	ldr	x6, [x20, #:lo12:.LANCHOR12]
+	blt	.L2323
+	ldr	x6, [x20, #:lo12:.LANCHOR20]
 	ldrb	w7, [x28, 1]
 	strh	wzr, [x28, 2]
 	ldr	w0, [x6, 4]
 	ldrh	w1, [x6, 16]
 	add	w0, w0, 1
 	str	w0, [x6, 4]
-	ldrb	w0, [x21, #:lo12:.LANCHOR141]
+	ldrb	w0, [x21, #:lo12:.LANCHOR148]
 	add	w1, w1, 1
 	strb	w0, [x28, 1]
 	mov	x0, x6
-	strb	w7, [x21, #:lo12:.LANCHOR141]
+	strb	w7, [x21, #:lo12:.LANCHOR148]
 	strh	w1, [x0, 16]!
 	ldr	w1, [x6, 8]
 	bl	js_hash
 	ldrh	w19, [x22]
 	str	w0, [x6, 12]
 	mul	w19, w19, w7
-.L2077:
+.L2332:
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_erase_block
-	b	.L2072
-.L2075:
+	b	.L2324
+.L2327:
 	mov	w26, 1
-	b	.L2070
-.L2071:
+	b	.L2322
+.L2323:
 	madd	w19, w19, w4, w3
-	cbz	w1, .L2077
-.L2072:
-	ldr	x2, [x20, #:lo12:.LANCHOR12]
+	cbz	w1, .L2332
+.L2324:
+	ldr	x2, [x20, #:lo12:.LANCHOR20]
 	mov	w1, w19
-	ldr	x3, [x23, #:lo12:.LANCHOR140]
+	ldr	x3, [x23, #:lo12:.LANCHOR147]
 	mov	w5, 1
 	mov	w4, 4
 	ldr	w0, [x2, 4]
@@ -13128,14 +14314,14 @@ flash_info_flush:
 	ldrh	w1, [x27, 2]
 	add	w1, w1, 1
 	strh	w1, [x27, 2]
-	bne	.L2073
+	bne	.L2325
 	mov	w1, w19
-	adrp	x0, .LC88
-	add	x0, x0, :lo12:.LC88
+	adrp	x0, .LC135
+	add	x0, x0, :lo12:.LC135
 	bl	printf
-	b	.L2070
-.L2073:
-	cbz	w26, .L2075
+	b	.L2322
+.L2325:
+	cbz	w26, .L2327
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -13150,325 +14336,380 @@ flash_info_flush:
 	.global	nand_flash_init
 	.type	nand_flash_init, %function
 nand_flash_init:
-	stp	x29, x30, [sp, -80]!
-	mov	w2, 2
-	adrp	x1, .LANCHOR27
+	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR41
-	stp	x23, x24, [sp, 48]
-	adrp	x21, .LANCHOR33
-	add	x23, x21, :lo12:.LANCHOR33
+	adrp	x21, .LANCHOR7
 	stp	x19, x20, [sp, 16]
-	str	x25, [sp, 64]
-	mov	x24, x23
-	strb	w2, [x1, #:lo12:.LANCHOR27]
+	mov	x19, x0
+	ldr	w0, [x21, #:lo12:.LANCHOR7]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	tbz	x0, 12, .L2334
+	adrp	x2, .LANCHOR179
+	adrp	x0, .LC73
+	add	x2, x2, :lo12:.LANCHOR179
+	mov	w1, 2083
+	add	x0, x0, :lo12:.LC73
+	bl	printf
+.L2334:
+	adrp	x22, .LANCHOR9
+	adrp	x20, .LANCHOR38
+	add	x24, x20, :lo12:.LANCHOR38
+	mov	x0, x19
+	adrp	x25, .LANCHOR33
 	bl	nandc_init
-	adrp	x19, .LANCHOR26
-	mov	w20, 0
-	add	x0, x19, :lo12:.LANCHOR26
-	mov	w25, 44
-	str	x0, [x22, #:lo12:.LANCHOR41]
-.L2084:
-	mov	x1, x23
-	mov	w0, w20
+	add	x25, x25, :lo12:.LANCHOR33
+	mov	x26, x24
+	adrp	x19, .LANCHOR32
+	mov	x23, 0
+	add	x0, x19, :lo12:.LANCHOR32
+	mov	w27, 2
+	str	x0, [x22, #:lo12:.LANCHOR9]
+	mov	w28, 44
+.L2340:
+	mov	x1, x24
+	mov	w0, w23
 	bl	flash_read_id
-	cbnz	w20, .L2079
-	ldrb	w0, [x24]
+	strb	w27, [x23, x25]
+	cbnz	x23, .L2335
+	ldrb	w0, [x26]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bls	.L2080
-.L2082:
-	mov	w0, -2
-.L2078:
+	bls	.L2336
+.L2338:
+	mov	w19, -2
+.L2333:
+	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldr	x25, [sp, 64]
-	ldp	x29, x30, [sp], 80
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
 	ret
-.L2080:
-	ldrb	w0, [x24, 1]
+.L2336:
+	ldrb	w0, [x26, 1]
 	cmp	w0, 255
-	beq	.L2082
-.L2079:
-	ldrb	w0, [x23]
+	beq	.L2338
+.L2335:
+	ldrb	w0, [x24]
 	cmp	w0, 181
-	bne	.L2083
-	strb	w25, [x23]
-.L2083:
-	add	w20, w20, 1
-	add	x23, x23, 8
-	and	w20, w20, 255
-	cmp	w20, 4
-	bne	.L2084
-	adrp	x0, .LANCHOR166
-	add	x8, x0, :lo12:.LANCHOR166
+	bne	.L2339
+	strb	w28, [x24]
+.L2339:
+	add	x23, x23, 1
+	add	x24, x24, 8
+	cmp	x23, 4
+	bne	.L2340
+	adrp	x0, .LANCHOR180
+	add	x8, x0, :lo12:.LANCHOR180
 	add	x8, x8, 1
 	mov	x7, x0
-	add	x12, x21, :lo12:.LANCHOR33
+	add	x12, x20, :lo12:.LANCHOR38
 	mov	x10, 0
-.L2087:
+.L2343:
 	ldrb	w2, [x8, -1]
 	mov	w11, w10
-	lsl	x23, x10, 5
+	lsl	x24, x10, 5
 	mov	x1, x12
 	mov	x0, x8
 	bl	flash_mem_cmp8
-	cbnz	w0, .L2085
-	add	x0, x7, :lo12:.LANCHOR166
+	cbnz	w0, .L2341
+	add	x0, x7, :lo12:.LANCHOR180
 	ubfiz	x11, x11, 5, 32
-	add	x23, x0, x23
+	add	x24, x0, x24
 	add	x0, x0, x11
-	adrp	x1, .LANCHOR167
-	add	x4, x1, :lo12:.LANCHOR167
+	adrp	x1, .LANCHOR181
+	add	x4, x1, :lo12:.LANCHOR181
 	ldrb	w3, [x0, 22]
 	mov	x0, 0
-.L2086:
+.L2342:
 	lsl	x5, x0, 5
 	mov	w2, w0
 	ldrb	w5, [x5, x4]
 	cmp	w5, w3
-	beq	.L2088
+	beq	.L2344
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L2086
+	bne	.L2342
 	mov	w2, w0
-.L2088:
+.L2344:
 	ubfiz	x0, x2, 5, 32
-	add	x1, x1, :lo12:.LANCHOR167
+	add	x1, x1, :lo12:.LANCHOR181
 	add	x1, x1, x0
 	mov	w2, 32
-	adrp	x0, .LANCHOR129
-	add	x20, x19, :lo12:.LANCHOR26
-	add	x0, x0, :lo12:.LANCHOR129
+	adrp	x0, .LANCHOR13
+	add	x0, x0, :lo12:.LANCHOR13
 	bl	ftl_memcpy
-	mov	x1, x23
+	add	x23, x19, :lo12:.LANCHOR32
+	mov	x1, x24
+	adrp	x24, .LANCHOR22
 	mov	w2, 32
-	mov	x0, x20
+	mov	x0, x23
 	bl	ftl_memcpy
-	adrp	x1, .LANCHOR14
-	mov	x23, x1
-	ldrb	w0, [x1, #:lo12:.LANCHOR14]
+	ldrb	w0, [x24, #:lo12:.LANCHOR22]
 	cmp	w0, 8
-	bhi	.L2089
-	ldrb	w1, [x20, 20]
+	bhi	.L2345
+	ldrb	w1, [x23, 20]
 	cmp	w1, 60
-	bls	.L2090
+	bls	.L2346
 	mov	w1, 60
-	strb	w1, [x20, 20]
-.L2090:
+	strb	w1, [x23, 20]
+.L2346:
 	cmp	w0, 8
-	bne	.L2089
-	ldrb	w0, [x21, #:lo12:.LANCHOR33]
+	bne	.L2345
+	ldrb	w0, [x20, #:lo12:.LANCHOR38]
 	cmp	w0, 44
-	bne	.L2089
-	add	x0, x19, :lo12:.LANCHOR26
+	bne	.L2345
+	add	x0, x19, :lo12:.LANCHOR32
 	ldrb	w1, [x0, 28]
 	cmp	w1, 3
-	bne	.L2089
+	bne	.L2345
 	strb	wzr, [x0, 28]
-.L2089:
+.L2345:
+	ldr	w0, [x21, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2347
+	adrp	x2, .LANCHOR179
+	adrp	x0, .LC73
+	add	x2, x2, :lo12:.LANCHOR179
+	mov	w1, 2104
+	add	x0, x0, :lo12:.LC73
+	bl	printf
+.L2347:
 	mov	w0, 16384
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR143
-	adrp	x21, .LANCHOR12
-	add	x20, x19, :lo12:.LANCHOR26
-	str	x0, [x1, #:lo12:.LANCHOR143]
+	adrp	x1, .LANCHOR150
+	adrp	x25, .LANCHOR20
+	add	x20, x19, :lo12:.LANCHOR32
+	adrp	x23, .LANCHOR39
+	str	x0, [x1, #:lo12:.LANCHOR150]
 	mov	w0, 16384
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR135
-	str	x0, [x1, #:lo12:.LANCHOR135]
+	adrp	x1, .LANCHOR140
+	str	x0, [x1, #:lo12:.LANCHOR140]
 	mov	w0, 2048
 	bl	ftl_malloc
-	str	x0, [x21, #:lo12:.LANCHOR12]
+	str	x0, [x25, #:lo12:.LANCHOR20]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR142
-	str	x0, [x1, #:lo12:.LANCHOR142]
+	adrp	x1, .LANCHOR149
+	str	x0, [x1, #:lo12:.LANCHOR149]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR136
-	str	x0, [x1, #:lo12:.LANCHOR136]
+	adrp	x1, .LANCHOR142
+	str	x0, [x1, #:lo12:.LANCHOR142]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR140
-	str	x0, [x1, #:lo12:.LANCHOR140]
-	adrp	x0, .LANCHOR147
-	strb	wzr, [x0, #:lo12:.LANCHOR147]
+	adrp	x1, .LANCHOR147
+	str	x0, [x1, #:lo12:.LANCHOR147]
+	adrp	x0, .LANCHOR154
+	strb	wzr, [x0, #:lo12:.LANCHOR154]
 	bl	flash_die_info_init
 	ldrb	w0, [x20, 18]
 	bl	flash_lsb_page_tbl_build
 	ldrb	w0, [x20, 20]
-	adrp	x20, .LANCHOR139
+	adrp	x20, .LANCHOR145
 	bl	nandc_bch_sel
-	str	xzr, [x20, #:lo12:.LANCHOR139]
-	ldr	x1, [x22, #:lo12:.LANCHOR41]
-	adrp	x22, .LANCHOR32
+	str	xzr, [x20, #:lo12:.LANCHOR145]
+	ldr	x1, [x22, #:lo12:.LANCHOR9]
+	mov	x22, x25
 	ldrh	w0, [x1, 16]
-	lsr	w3, w0, 8
-	ubfx	x4, x0, 3, 1
-	and	w2, w3, 7
-	strb	w2, [x22, #:lo12:.LANCHOR32]
-	adrp	x2, .LANCHOR168
-	strb	w4, [x2, #:lo12:.LANCHOR168]
-	adrp	x2, .LANCHOR30
-	ubfx	x4, x0, 4, 1
-	strb	w4, [x2, #:lo12:.LANCHOR30]
+	ubfx	x2, x0, 8, 3
+	strb	w2, [x23, #:lo12:.LANCHOR39]
+	adrp	x2, .LANCHOR182
+	ubfx	x3, x0, 3, 1
+	strb	w3, [x2, #:lo12:.LANCHOR182]
+	adrp	x2, .LANCHOR36
+	ubfx	x3, x0, 4, 1
+	strb	w3, [x2, #:lo12:.LANCHOR36]
 	adrp	x2, .LANCHOR69
-	ubfx	x4, x0, 12, 1
-	strb	w4, [x2, #:lo12:.LANCHOR69]
+	ubfx	x3, x0, 12, 1
+	strb	w3, [x2, #:lo12:.LANCHOR69]
 	adrp	x2, .LANCHOR98
-	ubfx	x4, x0, 13, 1
+	ubfx	x3, x0, 13, 1
 	ubfx	x0, x0, 14, 1
-	strb	w4, [x2, #:lo12:.LANCHOR98]
-	adrp	x2, .LANCHOR19
-	strb	w0, [x2, #:lo12:.LANCHOR19]
+	strb	w3, [x2, #:lo12:.LANCHOR98]
+	adrp	x2, .LANCHOR25
+	strb	w0, [x2, #:lo12:.LANCHOR25]
 	mov	w2, 60
 	ldrb	w0, [x1, 28]
-	adrp	x1, .LANCHOR18
-	strb	w0, [x1, #:lo12:.LANCHOR18]
-	adrp	x1, .LANCHOR169
-	strb	w2, [x1, #:lo12:.LANCHOR169]
-	ldrb	w2, [x23, #:lo12:.LANCHOR14]
+	adrp	x1, .LANCHOR11
+	strb	w0, [x1, #:lo12:.LANCHOR11]
+	adrp	x1, .LANCHOR10
+	strb	w2, [x1, #:lo12:.LANCHOR10]
+	ldrb	w2, [x24, #:lo12:.LANCHOR22]
 	cmp	w2, 9
-	bne	.L2091
+	bne	.L2348
 	mov	w2, 70
-	strb	w2, [x1, #:lo12:.LANCHOR169]
-.L2091:
-	add	x19, x19, :lo12:.LANCHOR26
-	adrp	x1, .LANCHOR170
-	adrp	x23, .LANCHOR9
-	strb	w0, [x1, #:lo12:.LANCHOR170]
+	strb	w2, [x1, #:lo12:.LANCHOR10]
+.L2348:
+	add	x19, x19, :lo12:.LANCHOR32
+	adrp	x1, .LANCHOR155
+	adrp	x25, .LANCHOR17
+	strb	w0, [x1, #:lo12:.LANCHOR155]
 	ldrh	w1, [x19, 16]
 	ldrb	w0, [x19, 19]
-	strb	w0, [x23, #:lo12:.LANCHOR9]
-	tbz	x1, 6, .L2093
+	strb	w0, [x25, #:lo12:.LANCHOR17]
+	tbz	x1, 6, .L2350
 	sub	w1, w0, #17
 	and	w1, w1, 255
 	cmp	w1, 2
-	bhi	.L2094
+	bhi	.L2351
 	adrp	x1, micron_read_retrial
 	add	x1, x1, :lo12:micron_read_retrial
-	str	x1, [x20, #:lo12:.LANCHOR139]
+	str	x1, [x20, #:lo12:.LANCHOR145]
 	cmp	w0, 19
-	adrp	x0, .LANCHOR137
-	beq	.L2095
+	adrp	x0, .LANCHOR143
+	beq	.L2352
 	mov	w1, 7
-.L2122:
-	strb	w1, [x0, #:lo12:.LANCHOR137]
-	b	.L2093
-.L2085:
+.L2395:
+	strb	w1, [x0, #:lo12:.LANCHOR143]
+	b	.L2350
+.L2341:
 	add	x10, x10, 1
 	add	x8, x8, 32
-	cmp	x10, 25
-	bne	.L2087
-	b	.L2082
-.L2095:
+	cmp	x10, 30
+	bne	.L2343
+	b	.L2338
+.L2352:
 	mov	w1, 15
-	b	.L2122
-.L2094:
+	b	.L2395
+.L2351:
 	sub	w1, w0, #65
 	cmp	w0, 33
 	and	w1, w1, 255
 	ccmp	w1, 1, 0, ne
-	bhi	.L2097
+	bhi	.L2354
 	adrp	x0, toshiba_read_retrial
 	add	x0, x0, :lo12:toshiba_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR139]
-	adrp	x0, .LANCHOR11
+	str	x0, [x20, #:lo12:.LANCHOR145]
+	adrp	x0, .LANCHOR19
 	mov	w1, 4
-	strb	w1, [x0, #:lo12:.LANCHOR11]
-.L2124:
+	strb	w1, [x0, #:lo12:.LANCHOR19]
+.L2397:
 	mov	w1, 7
-	adrp	x0, .LANCHOR137
-	b	.L2122
-.L2097:
+	adrp	x0, .LANCHOR143
+	b	.L2395
+.L2354:
 	sub	w2, w0, #34
 	sub	w1, w0, #67
 	and	w2, w2, 255
 	and	w1, w1, 255
 	cmp	w2, 1
 	ccmp	w1, 1, 0, hi
-	bhi	.L2098
+	bhi	.L2355
 	adrp	x2, toshiba_read_retrial
 	add	x2, x2, :lo12:toshiba_read_retrial
-	str	x2, [x20, #:lo12:.LANCHOR139]
+	str	x2, [x20, #:lo12:.LANCHOR145]
 	cmp	w0, 35
 	mov	w2, 68
 	ccmp	w0, w2, 4, ne
-	adrp	x0, .LANCHOR137
-	beq	.L2099
+	adrp	x0, .LANCHOR143
+	beq	.L2356
 	mov	w2, 7
-.L2121:
-	strb	w2, [x0, #:lo12:.LANCHOR137]
+.L2394:
+	strb	w2, [x0, #:lo12:.LANCHOR143]
 	cmp	w1, 1
-	adrp	x0, .LANCHOR11
-	bhi	.L2101
+	adrp	x0, .LANCHOR19
+	bhi	.L2358
 	mov	w1, 4
-.L2123:
-	strb	w1, [x0, #:lo12:.LANCHOR11]
-.L2093:
-	adrp	x19, .LANCHOR42
+.L2396:
+	strb	w1, [x0, #:lo12:.LANCHOR19]
+.L2350:
+	ldr	w0, [x21, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2359
+	adrp	x2, .LANCHOR179
+	adrp	x0, .LC73
+	add	x2, x2, :lo12:.LANCHOR179
+	mov	w1, 2152
+	add	x0, x0, :lo12:.LC73
+	bl	printf
+.L2359:
+	adrp	x24, .LANCHOR14
+	ldrb	w0, [x23, #:lo12:.LANCHOR39]
+	strb	wzr, [x24, #:lo12:.LANCHOR14]
+	tbz	x0, 0, .L2360
 	mov	w0, 4
-	strb	wzr, [x19, #:lo12:.LANCHOR42]
-	tbz	x3, 0, .L2102
 	bl	nandc_set_if_mode
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
-.L2102:
+.L2398:
 	bl	nandc_set_if_mode
 	bl	flash_info_blk_init
+	mov	w19, w0
 	cmn	w0, #1
-	beq	.L2078
-	ldrb	w0, [x23, #:lo12:.LANCHOR9]
-	sub	w0, w0, #1
-	and	w0, w0, 255
-	cmp	w0, 6
-	bhi	.L2104
-	adrp	x0, hynix_read_retrial
-	add	x0, x0, :lo12:hynix_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR139]
-.L2104:
-	ldrb	w0, [x22, #:lo12:.LANCHOR32]
-	tbnz	x0, 2, .L2105
-.L2125:
-	mov	w0, 0
-	b	.L2078
-.L2099:
+	bne	.L2362
+	ldr	w0, [x21, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2333
+	adrp	x2, .LANCHOR179
+	mov	w1, 2172
+	add	x2, x2, :lo12:.LANCHOR179
+	adrp	x0, .LC73
+	add	x0, x0, :lo12:.LC73
+	bl	printf
+	b	.L2333
+.L2356:
 	mov	w2, 17
-	b	.L2121
-.L2101:
+	b	.L2394
+.L2358:
 	mov	w1, 5
-	b	.L2123
-.L2098:
+	b	.L2396
+.L2355:
 	sub	w0, w0, #36
 	and	w0, w0, 255
 	cmp	w0, 1
-	bhi	.L2093
+	bhi	.L2350
 	adrp	x0, toshiba_3d_read_retrial
 	add	x0, x0, :lo12:toshiba_3d_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR139]
-	b	.L2124
-.L2105:
-	ldr	x0, [x21, #:lo12:.LANCHOR12]
+	str	x0, [x20, #:lo12:.LANCHOR145]
+	b	.L2397
+.L2360:
+	mov	w0, 4
+	b	.L2398
+.L2362:
+	ldrb	w0, [x25, #:lo12:.LANCHOR17]
+	sub	w0, w0, #1
+	and	w0, w0, 255
+	cmp	w0, 6
+	bhi	.L2363
+	adrp	x0, hynix_read_retrial
+	add	x0, x0, :lo12:hynix_read_retrial
+	str	x0, [x20, #:lo12:.LANCHOR145]
+.L2363:
+	ldrb	w0, [x23, #:lo12:.LANCHOR39]
+	tbz	x0, 2, .L2365
+	ldr	x0, [x22, #:lo12:.LANCHOR20]
 	ldrb	w0, [x0, 19]
-	cbz	w0, .L2125
-	adrp	x0, .LANCHOR141
-	ldrb	w1, [x0, #:lo12:.LANCHOR141]
-	adrp	x0, .LANCHOR20
-	ldrh	w0, [x0, #:lo12:.LANCHOR20]
+	cbz	w0, .L2365
+	adrp	x0, .LANCHOR148
+	ldrb	w1, [x0, #:lo12:.LANCHOR148]
+	adrp	x0, .LANCHOR26
+	ldrh	w0, [x0, #:lo12:.LANCHOR26]
 	mul	w1, w1, w0
 	mov	w0, 0
 	bl	flash_ddr_para_scan
-	ldrb	w0, [x19, #:lo12:.LANCHOR42]
-	cbnz	w0, .L2125
-	ldr	x0, [x21, #:lo12:.LANCHOR12]
+	ldrb	w0, [x24, #:lo12:.LANCHOR14]
+	cbnz	w0, .L2365
+	ldr	x0, [x22, #:lo12:.LANCHOR20]
 	strb	wzr, [x0, 19]
 	bl	flash_info_flush
-	b	.L2125
+.L2365:
+	ldr	w0, [x21, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2367
+	adrp	x2, .LANCHOR179
+	adrp	x0, .LC73
+	add	x2, x2, :lo12:.LANCHOR179
+	mov	w1, 2225
+	add	x0, x0, :lo12:.LC73
+	bl	printf
+.L2367:
+	bl	nand_flash_print_info
+	mov	w19, 0
+	b	.L2333
 	.size	nand_flash_init, .-nand_flash_init
 	.section	.text.ftl_sysblk_dump,"ax",@progbits
 	.align	2
@@ -13478,52 +14719,60 @@ ftl_sysblk_dump:
 	sub	sp, sp, #144
 	stp	x29, x30, [sp, 48]
 	add	x29, sp, 48
+	stp	x19, x20, [sp, 64]
+	mov	w20, 0
 	stp	x23, x24, [sp, 96]
+	and	w23, w0, 65535
 	stp	x25, x26, [sp, 112]
-	adrp	x26, .LANCHOR80
+	mov	w0, 1
 	stp	x27, x28, [sp, 128]
-	add	x26, x26, :lo12:.LANCHOR80
-	stp	x19, x20, [sp, 64]
-	adrp	x27, .LANCHOR99
+	adrp	x26, .LANCHOR80
 	stp	x21, x22, [sp, 80]
-	and	w22, w0, 65535
-	mov	w0, 1
 	bl	buf_alloc
-	ldr	x23, [x0, 8]
-	adrp	x28, .LANCHOR52
-	mov	x24, x0
+	ldr	x24, [x0, 8]
+	adrp	x27, .LANCHOR99
+	adrp	x28, .LANCHOR114
+	mov	x25, x0
+	add	x26, x26, :lo12:.LANCHOR80
 	add	x27, x27, :lo12:.LANCHOR99
-	add	x28, x28, :lo12:.LANCHOR52
-	mov	w25, 0
+	add	x28, x28, :lo12:.LANCHOR114
 	mov	w19, 0
-.L2127:
+.L2400:
 	ldrh	w0, [x26]
 	cmp	w0, w19
-	bhi	.L2129
-	mov	x0, x24
+	bhi	.L2402
+	mov	x0, x25
 	bl	buf_free
-	cbz	w25, .L2130
-	adrp	x1, .LANCHOR171
+	cbz	w20, .L2403
+	adrp	x1, .LANCHOR183
 	adrp	x0, .LC0
-	mov	w2, 1199
-	add	x1, x1, :lo12:.LANCHOR171
+	mov	w2, 1214
+	add	x1, x1, :lo12:.LANCHOR183
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2131:
-	b	.L2131
-.L2129:
-	ldrh	w20, [x27]
-	ldrb	w3, [x28]
-	ldr	x1, [x24, 8]
-	ldr	x2, [x24, 24]
-	madd	w20, w20, w22, w19
+.L2403:
 	mov	w0, w20
+	ldp	x19, x20, [sp, 64]
+	ldp	x21, x22, [sp, 80]
+	ldp	x23, x24, [sp, 96]
+	ldp	x25, x26, [sp, 112]
+	ldp	x27, x28, [sp, 128]
+	ldp	x29, x30, [sp, 48]
+	add	sp, sp, 144
+	ret
+.L2402:
+	ldrh	w21, [x27]
+	ldrb	w3, [x28]
+	ldr	x1, [x25, 8]
+	ldr	x2, [x25, 24]
+	madd	w21, w21, w23, w19
+	mov	w0, w21
 	bl	ftl_read_ppa_page
-	mov	w21, w0
-	ldr	x1, [x24, 24]
+	mov	w22, w0
+	ldr	x1, [x25, 24]
 	mov	w4, w0
-	ldr	x0, [x24, 8]
-	mov	w3, w20
+	ldr	x0, [x25, 8]
+	mov	w3, w21
 	ldr	w2, [x1, 12]
 	str	w2, [sp, 32]
 	ldr	w2, [x1, 8]
@@ -13537,32 +14786,22 @@ ftl_sysblk_dump:
 	str	w1, [sp, 8]
 	ldr	w1, [x0, 12]
 	str	w1, [sp]
-	mov	w1, w22
+	mov	w1, w23
 	ldp	w5, w6, [x0]
-	ldr	w7, [x0, 8]
-	adrp	x0, .LC82
-	add	x0, x0, :lo12:.LC82
+	ldr	w7, [x0, 8]
+	adrp	x0, .LC129
+	add	x0, x0, :lo12:.LC129
 	bl	printf
 	mov	w3, 32
 	mov	w2, 4
-	add	x1, x23, 704
-	adrp	x0, .LC89
-	add	x0, x0, :lo12:.LC89
+	add	x1, x24, 704
+	adrp	x0, .LC136
+	add	x0, x0, :lo12:.LC136
 	bl	rknand_print_hex
-	cmp	w21, 512
-	ccmn	w21, #1, 4, ne
-	csinc	w25, w25, wzr, ne
-	b	.L2127
-.L2130:
-	mov	w0, 0
-	ldp	x19, x20, [sp, 64]
-	ldp	x21, x22, [sp, 80]
-	ldp	x23, x24, [sp, 96]
-	ldp	x25, x26, [sp, 112]
-	ldp	x27, x28, [sp, 128]
-	ldp	x29, x30, [sp, 48]
-	add	sp, sp, 144
-	ret
+	cmp	w22, 512
+	ccmn	w22, #1, 4, ne
+	csinc	w20, w20, wzr, ne
+	b	.L2400
 	.size	ftl_sysblk_dump, .-ftl_sysblk_dump
 	.section	.text.dump_ftl_info,"ax",@progbits
 	.align	2
@@ -13570,30 +14809,35 @@ ftl_sysblk_dump:
 	.type	dump_ftl_info, %function
 dump_ftl_info:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LANCHOR155
-	add	x1, x0, :lo12:.LANCHOR155
+	adrp	x0, .LANCHOR48
 	add	x29, sp, 0
+	ldrb	w1, [x0, #:lo12:.LANCHOR48]
+	adrp	x0, .LC137
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR5
+	add	x0, x0, :lo12:.LC137
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR53
-	ldrh	w3, [x1, 2]
+	adrp	x22, .LANCHOR101
+	adrp	x19, .LANCHOR5
 	adrp	x20, .LANCHOR80
-	ldrb	w2, [x1, 1]
+	bl	printf
 	adrp	x21, .LANCHOR2
-	ldrb	w1, [x0, #:lo12:.LANCHOR155]
-	adrp	x0, .LC90
-	add	x0, x0, :lo12:.LC90
+	adrp	x0, .LANCHOR164
+	add	x1, x0, :lo12:.LANCHOR164
+	ldrh	w3, [x1, 2]
+	ldrb	w2, [x1, 1]
+	ldrb	w1, [x0, #:lo12:.LANCHOR164]
+	adrp	x0, .LC138
+	add	x0, x0, :lo12:.LC138
 	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR53]
+	ldr	x0, [x22, #:lo12:.LANCHOR101]
 	ldrh	w2, [x0, 140]
 	ldrh	w1, [x0, 130]
-	adrp	x0, .LC91
-	add	x0, x0, :lo12:.LC91
+	adrp	x0, .LC139
+	add	x0, x0, :lo12:.LC139
 	bl	printf
 	ldr	x1, [x19, #:lo12:.LANCHOR5]
-	adrp	x0, .LC92
-	add	x0, x0, :lo12:.LC92
+	adrp	x0, .LC140
+	add	x0, x0, :lo12:.LC140
 	ldrh	w5, [x1, 26]
 	ldrh	w4, [x1, 22]
 	ldrb	w3, [x1, 21]
@@ -13601,8 +14845,8 @@ dump_ftl_info:
 	ldrh	w1, [x1, 16]
 	bl	printf
 	ldr	x1, [x19, #:lo12:.LANCHOR5]
-	adrp	x0, .LC93
-	add	x0, x0, :lo12:.LC93
+	adrp	x0, .LC141
+	add	x0, x0, :lo12:.LC141
 	ldrh	w5, [x1, 58]
 	ldrh	w4, [x1, 54]
 	ldrb	w3, [x1, 53]
@@ -13611,8 +14855,8 @@ dump_ftl_info:
 	bl	printf
 	ldr	x1, [x19, #:lo12:.LANCHOR5]
 	adrp	x19, .LANCHOR72
-	adrp	x0, .LC94
-	add	x0, x0, :lo12:.LC94
+	adrp	x0, .LC142
+	add	x0, x0, :lo12:.LC142
 	ldrh	w5, [x1, 90]
 	ldrh	w4, [x1, 86]
 	ldrb	w3, [x1, 85]
@@ -13623,39 +14867,39 @@ dump_ftl_info:
 	mov	w2, 4
 	ldrh	w3, [x20, #:lo12:.LANCHOR80]
 	mul	w3, w3, w0
-	adrp	x0, .LANCHOR105
-	ldr	x1, [x0, #:lo12:.LANCHOR105]
-	adrp	x0, .LC95
+	adrp	x0, .LANCHOR106
+	ldr	x1, [x0, #:lo12:.LANCHOR106]
+	adrp	x0, .LC143
 	lsl	w3, w3, 1
-	add	x0, x0, :lo12:.LC95
+	add	x0, x0, :lo12:.LC143
 	bl	rknand_print_hex
 	adrp	x0, .LANCHOR4
 	ldrh	w3, [x21, #:lo12:.LANCHOR2]
 	mov	w2, 2
 	ldr	x1, [x0, #:lo12:.LANCHOR4]
-	adrp	x0, .LC96
-	add	x0, x0, :lo12:.LC96
+	adrp	x0, .LC144
+	add	x0, x0, :lo12:.LC144
 	bl	rknand_print_hex
-	ldr	x1, [x22, #:lo12:.LANCHOR53]
-	mov	w3, 32
+	ldr	x1, [x22, #:lo12:.LANCHOR101]
 	mov	w2, 4
-	adrp	x0, .LC89
+	adrp	x0, .LC136
+	add	x0, x0, :lo12:.LC136
 	add	x1, x1, 704
-	add	x0, x0, :lo12:.LC89
+	ldrh	w3, [x1, -6]
 	bl	rknand_print_hex
 	adrp	x0, .LANCHOR3
 	ldrh	w3, [x21, #:lo12:.LANCHOR2]
 	mov	w2, 4
 	ldr	x1, [x0, #:lo12:.LANCHOR3]
-	adrp	x0, .LC97
-	add	x0, x0, :lo12:.LC97
+	adrp	x0, .LC145
+	add	x0, x0, :lo12:.LC145
 	bl	rknand_print_hex
 	mov	w3, 256
 	mov	w2, 2
-	adrp	x1, .LANCHOR104
-	adrp	x0, .LC98
-	add	x1, x1, :lo12:.LANCHOR104
-	add	x0, x0, :lo12:.LC98
+	adrp	x1, .LANCHOR105
+	adrp	x0, .LC146
+	add	x1, x1, :lo12:.LANCHOR105
+	add	x0, x0, :lo12:.LC146
 	bl	rknand_print_hex
 	ldrb	w0, [x19, #:lo12:.LANCHOR72]
 	mov	w2, 2
@@ -13663,12 +14907,12 @@ dump_ftl_info:
 	ldp	x21, x22, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	mul	w3, w3, w0
-	adrp	x0, .LANCHOR106
+	adrp	x0, .LANCHOR107
 	ldp	x29, x30, [sp], 48
 	lsl	w3, w3, 1
-	ldr	x1, [x0, #:lo12:.LANCHOR106]
-	adrp	x0, .LC99
-	add	x0, x0, :lo12:.LC99
+	ldr	x1, [x0, #:lo12:.LANCHOR107]
+	adrp	x0, .LC147
+	add	x0, x0, :lo12:.LC147
 	b	rknand_print_hex
 	.size	dump_ftl_info, .-dump_ftl_info
 	.section	.text.pm_ppa_update_check,"ax",@progbits
@@ -13695,20 +14939,20 @@ pm_ppa_update_check:
 	ubfx	x3, x3, 5, 3
 	cmp	w3, 1
 	ccmp	w3, 7, 4, ne
-	bne	.L2139
+	bne	.L2414
 	stp	x29, x30, [sp, -16]!
 	mov	w3, w2
 	mov	w2, w1
 	mov	x1, x0
 	add	x29, sp, 0
-	adrp	x0, .LC100
-	add	x0, x0, :lo12:.LC100
+	adrp	x0, .LC148
+	add	x0, x0, :lo12:.LC148
 	bl	printf
 	bl	dump_ftl_info
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
-.L2139:
+.L2414:
 	mov	w0, 0
 	ret
 	.size	pm_ppa_update_check, .-pm_ppa_update_check
@@ -13717,108 +14961,112 @@ pm_ppa_update_check:
 	.type	load_l2p_region, %function
 load_l2p_region:
 	stp	x29, x30, [sp, -64]!
-	and	w1, w1, 65535
-	cmp	w1, 31
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
+	and	w20, w1, 65535
 	stp	x21, x22, [sp, 32]
-	str	x23, [sp, 48]
-	bls	.L2145
-	adrp	x1, .LANCHOR172
+	and	w19, w0, 65535
+	stp	x23, x24, [sp, 48]
+	cmp	w20, 31
+	bls	.L2420
+	adrp	x1, .LANCHOR184
 	adrp	x0, .LC0
-	mov	w2, 30
-	add	x1, x1, :lo12:.LANCHOR172
+	mov	w2, 31
+	add	x1, x1, :lo12:.LANCHOR184
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2146:
-	b	.L2146
-.L2145:
-	adrp	x23, .LANCHOR53
-	and	w19, w0, 65535
-	ldr	x0, [x23, #:lo12:.LANCHOR53]
+.L2420:
+	adrp	x23, .LANCHOR101
+	ldr	x0, [x23, #:lo12:.LANCHOR101]
 	ldrh	w2, [x0, 698]
 	cmp	w2, w19
-	bcs	.L2147
+	bcs	.L2421
 	mov	w1, w19
-	adrp	x0, .LC101
-	add	x0, x0, :lo12:.LC101
+	adrp	x0, .LC149
+	add	x0, x0, :lo12:.LC149
 	bl	printf
-	adrp	x0, .LANCHOR173
+	adrp	x0, .LANCHOR185
 	mov	w1, 255
-	ldrh	w2, [x0, #:lo12:.LANCHOR173]
+	ldrh	w2, [x0, #:lo12:.LANCHOR185]
 	mov	x0, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	ldr	x0, [x23, #:lo12:.LANCHOR53]
+	ldr	x0, [x23, #:lo12:.LANCHOR101]
 	ldrh	w0, [x0, 698]
 	cmp	w0, w19
-	bcs	.L2151
-	adrp	x1, .LANCHOR172
+	bcs	.L2423
+	mov	w2, 35
+.L2428:
+	adrp	x1, .LANCHOR184
 	adrp	x0, .LC0
-	mov	w2, 34
-	add	x1, x1, :lo12:.LANCHOR172
+	add	x1, x1, :lo12:.LANCHOR184
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2149:
-	b	.L2149
-.L2147:
+	b	.L2423
+.L2421:
 	add	x0, x0, x19, sxtw 2
-	sbfiz	x1, x1, 4, 32
+	sbfiz	x20, x20, 4, 32
 	ldr	w21, [x0, 704]
-	adrp	x0, .LANCHOR117
-	add	x0, x0, :lo12:.LANCHOR117
-	add	x22, x0, x1
-	strh	w19, [x0, x1]
+	adrp	x0, .LANCHOR120
+	add	x0, x0, :lo12:.LANCHOR120
+	add	x22, x0, x20
+	strh	w19, [x0, x20]
 	strh	wzr, [x22, 2]
-	cbnz	w21, .L2150
-	adrp	x0, .LANCHOR173
+	cbnz	w21, .L2424
+	mov	w2, 0
+	mov	w1, w19
+	adrp	x0, .LC150
+	add	x0, x0, :lo12:.LC150
+	bl	printf
+	adrp	x0, .LANCHOR185
 	mov	w1, 255
-	ldrh	w2, [x0, #:lo12:.LANCHOR173]
+	ldrh	w2, [x0, #:lo12:.LANCHOR185]
 	ldr	x0, [x22, 8]
 	bl	ftl_memset
-.L2151:
+.L2423:
 	mov	w0, 0
-	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2150:
-	adrp	x20, .LANCHOR165
-	adrp	x0, .LANCHOR52
+.L2424:
+	adrp	x20, .LANCHOR176
+	adrp	x24, .LANCHOR114
 	ldr	x1, [x22, 8]
-	ldrb	w3, [x0, #:lo12:.LANCHOR52]
 	mov	w0, w21
-	ldr	x2, [x20, #:lo12:.LANCHOR165]
+	ldr	x2, [x20, #:lo12:.LANCHOR176]
+	ldrb	w3, [x24, #:lo12:.LANCHOR114]
 	bl	ftl_read_ppa_page
-	ldr	x1, [x20, #:lo12:.LANCHOR165]
+	ldr	x1, [x20, #:lo12:.LANCHOR176]
 	ldr	w2, [x1]
 	cmp	w2, w19
-	beq	.L2152
+	beq	.L2425
 	mov	w4, w21
 	mov	w3, w0
 	mov	w1, w19
-	adrp	x0, .LC102
-	add	x0, x0, :lo12:.LC102
+	adrp	x0, .LC151
+	add	x0, x0, :lo12:.LC151
 	bl	printf
-	ldr	x1, [x23, #:lo12:.LANCHOR53]
+	ldr	x1, [x23, #:lo12:.LANCHOR101]
 	mov	w2, 4
-	adrp	x0, .LC103
-	add	x0, x0, :lo12:.LC103
+	adrp	x0, .LC152
+	add	x0, x0, :lo12:.LC152
 	add	x1, x1, 704
 	ldrh	w3, [x1, -6]
 	bl	rknand_print_hex
 	ldr	x1, [x22, 8]
-	mov	w3, 16
 	mov	w2, 4
-	adrp	x0, .LC104
-	add	x0, x0, :lo12:.LC104
+	ldrb	w3, [x24, #:lo12:.LANCHOR114]
+	adrp	x0, .LC153
+	add	x0, x0, :lo12:.LC153
+	lsl	w3, w3, 7
 	bl	rknand_print_hex
-	ldr	x1, [x20, #:lo12:.LANCHOR165]
+	ldr	x1, [x20, #:lo12:.LANCHOR176]
 	mov	w2, 4
 	mov	w3, 16
-	adrp	x0, .LC105
-	add	x0, x0, :lo12:.LC105
+	adrp	x0, .LC154
+	add	x0, x0, :lo12:.LC154
 	bl	rknand_print_hex
 	adrp	x0, .LANCHOR96
 	ldrh	w2, [x0, #:lo12:.LANCHOR96]
@@ -13834,19 +15082,13 @@ load_l2p_region:
 	mov	x1, 0
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
-.L2152:
-	ldr	x0, [x20, #:lo12:.LANCHOR165]
+.L2425:
+	ldr	x0, [x20, #:lo12:.LANCHOR176]
 	ldr	w0, [x0]
 	cmp	w19, w0
-	beq	.L2151
-	adrp	x1, .LANCHOR172
-	adrp	x0, .LC0
-	mov	w2, 55
-	add	x1, x1, :lo12:.LANCHOR172
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2153:
-	b	.L2153
+	beq	.L2423
+	mov	w2, 57
+	b	.L2428
 	.size	load_l2p_region, .-load_l2p_region
 	.section	.text.pm_gc,"ax",@progbits
 	.align	2
@@ -13856,71 +15098,73 @@ pm_gc:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR53
-	adrp	x20, .LANCHOR127
+	adrp	x20, .LANCHOR101
+	adrp	x19, .LANCHOR131
 	stp	x21, x22, [sp, 32]
-	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	ldr	x0, [x20, #:lo12:.LANCHOR101]
 	stp	x23, x24, [sp, 48]
 	ldrh	w1, [x0, 688]
-	ldrh	w0, [x20, #:lo12:.LANCHOR127]
+	ldrh	w0, [x19, #:lo12:.LANCHOR131]
 	str	x25, [sp, 64]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L2157
+	blt	.L2431
 	bl	pm_free_sblk
-	ldr	x2, [x19, #:lo12:.LANCHOR53]
-	ldrh	w1, [x20, #:lo12:.LANCHOR127]
+	ldr	x2, [x20, #:lo12:.LANCHOR101]
+	ldrh	w1, [x19, #:lo12:.LANCHOR131]
 	sub	w1, w1, #1
 	ldrh	w3, [x2, 688]
 	cmp	w3, w1
-	blt	.L2157
+	blt	.L2431
 	add	x0, x2, x0, uxth 1
-	mov	w23, 65535
-	ldrh	w20, [x0, 416]
-	cmp	w20, w23
-	bne	.L2159
-	adrp	x1, .LANCHOR174
+	ldrh	w21, [x0, 416]
+	mov	w0, 65535
+	cmp	w21, w0
+	bne	.L2433
+	adrp	x1, .LANCHOR186
+	add	x1, x1, :lo12:.LANCHOR186
+	mov	w2, 129
 	adrp	x0, .LC0
-	mov	w2, 127
-	add	x1, x1, :lo12:.LANCHOR174
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2160:
-	b	.L2160
-.L2159:
+	bl	pm_free_sblk
+	ldr	x1, [x20, #:lo12:.LANCHOR101]
+	add	x0, x1, x0, uxth 1
+	ldrh	w21, [x0, 416]
+.L2433:
 	bl	pm_select_ram_region
 	and	x24, x0, 65535
-	adrp	x1, .LANCHOR117
+	adrp	x1, .LANCHOR120
 	lsl	x0, x24, 4
-	add	x2, x1, :lo12:.LANCHOR117
-	mov	x22, x19
+	add	x2, x1, :lo12:.LANCHOR120
+	mov	x22, x24
 	add	x19, x2, x0
-	mov	x21, x24
-	ldrh	w0, [x2, x0]
-	cmp	w0, w23
 	mov	x23, x1
-	beq	.L2161
+	ldrh	w0, [x2, x0]
+	mov	w2, 65535
+	cmp	w0, w2
+	beq	.L2434
 	ldr	x1, [x19, 8]
-	cbz	x1, .L2161
+	cbz	x1, .L2434
 	ldrsh	w2, [x19, 2]
-	tbz	w2, #31, .L2161
+	tbz	w2, #31, .L2434
 	bl	pm_write_page
 	ldrh	w0, [x19, 2]
 	and	w0, w0, 32767
 	strh	w0, [x19, 2]
-.L2161:
-	add	x1, x23, :lo12:.LANCHOR117
+.L2434:
+	add	x1, x23, :lo12:.LANCHOR120
 	adrp	x25, .LANCHOR96
 	add	x24, x1, x24, lsl 4
 	add	x25, x25, :lo12:.LANCHOR96
 	mov	w19, 0
-.L2162:
-	ldr	x1, [x22, #:lo12:.LANCHOR53]
+.L2435:
+	ldr	x1, [x20, #:lo12:.LANCHOR101]
 	ldrh	w0, [x1, 698]
 	cmp	w0, w19
-	bhi	.L2164
+	bhi	.L2437
 	bl	pm_free_sblk
-.L2157:
+.L2431:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -13928,7 +15172,7 @@ pm_gc:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2164:
+.L2437:
 	add	x1, x1, x19, sxtw 2
 	ldrh	w3, [x25]
 	mov	w0, 21
@@ -13942,18 +15186,20 @@ pm_gc:
 	adrp	x1, .LANCHOR95
 	ldrb	w1, [x1, #:lo12:.LANCHOR95]
 	udiv	w0, w0, w1
-	cmp	w20, w0, uxth
-	bne	.L2163
-	mov	w1, w21
+	cmp	w21, w0, uxth
+	bne	.L2436
+	mov	w1, w22
 	mov	w0, w19
 	bl	load_l2p_region
 	ldr	x1, [x24, 8]
 	mov	w0, w19
 	bl	pm_write_page
-.L2163:
+	mov	w0, -1
+	strh	w0, [x24]
+.L2436:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L2162
+	b	.L2435
 	.size	pm_gc, .-pm_gc
 	.section	.text.pm_flush_id,"ax",@progbits
 	.align	2
@@ -13962,8 +15208,8 @@ pm_gc:
 pm_flush_id:
 	stp	x29, x30, [sp, -32]!
 	ubfiz	x0, x0, 4, 16
-	adrp	x2, .LANCHOR117
-	add	x2, x2, :lo12:.LANCHOR117
+	adrp	x2, .LANCHOR120
+	add	x2, x2, :lo12:.LANCHOR120
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	add	x19, x2, x0
@@ -13973,12 +15219,12 @@ pm_flush_id:
 	ldrh	w0, [x19, 2]
 	and	w0, w0, 32767
 	strh	w0, [x19, 2]
-	adrp	x19, .LANCHOR115
-	ldr	w0, [x19, #:lo12:.LANCHOR115]
-	cbz	w0, .L2170
+	adrp	x19, .LANCHOR118
+	ldr	w0, [x19, #:lo12:.LANCHOR118]
+	cbz	w0, .L2443
 	bl	pm_gc
-	str	wzr, [x19, #:lo12:.LANCHOR115]
-.L2170:
+	str	wzr, [x19, #:lo12:.LANCHOR118]
+.L2443:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -13992,21 +15238,21 @@ pm_flush:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR117
-	add	x19, x19, :lo12:.LANCHOR117
+	adrp	x19, .LANCHOR120
+	add	x19, x19, :lo12:.LANCHOR120
 	mov	w20, 0
 	add	x19, x19, 2
-.L2177:
+.L2450:
 	ldrsh	w0, [x19]
-	tbz	w0, #31, .L2176
+	tbz	w0, #31, .L2449
 	mov	w0, w20
 	bl	pm_flush_id
-.L2176:
+.L2449:
 	add	w20, w20, 1
 	add	x19, x19, 16
 	and	w20, w20, 65535
 	cmp	w20, 32
-	bne	.L2177
+	bne	.L2450
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -14051,75 +15297,78 @@ zftl_deinit:
 	.type	pm_init, %function
 pm_init:
 	stp	x29, x30, [sp, -112]!
+	mov	w1, 1
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	mov	w24, w0
-	adrp	x0, .LANCHOR115
+	adrp	x0, .LANCHOR118
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	adrp	x20, .LANCHOR117
+	adrp	x20, .LANCHOR120
+	str	wzr, [x0, #:lo12:.LANCHOR118]
+	adrp	x0, .LANCHOR177
 	stp	x25, x26, [sp, 64]
-	add	x19, x20, :lo12:.LANCHOR117
-	str	wzr, [x0, #:lo12:.LANCHOR115]
+	add	x19, x20, :lo12:.LANCHOR120
+	strb	w1, [x0, #:lo12:.LANCHOR177]
 	mov	w0, 64
 	stp	x27, x28, [sp, 80]
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR165
-	adrp	x22, .LANCHOR52
+	adrp	x1, .LANCHOR176
+	adrp	x22, .LANCHOR114
 	add	x23, x19, 512
 	mov	x21, x1
-	add	x22, x22, :lo12:.LANCHOR52
-	str	x0, [x1, #:lo12:.LANCHOR165]
+	add	x22, x22, :lo12:.LANCHOR114
+	str	x0, [x1, #:lo12:.LANCHOR176]
 	mov	w25, -1
-.L2187:
+.L2460:
 	strh	w25, [x19]
 	strh	wzr, [x19, 2]
-	cbz	w24, .L2186
+	cbz	w24, .L2459
 	ldrb	w0, [x22]
 	lsl	w0, w0, 9
 	bl	ftl_malloc
 	str	x0, [x19, 8]
-.L2186:
+.L2459:
 	add	x19, x19, 16
 	cmp	x19, x23
-	bne	.L2187
-	add	x0, x20, :lo12:.LANCHOR117
-	adrp	x19, .LANCHOR53
-	ldr	x24, [x21, #:lo12:.LANCHOR165]
+	bne	.L2460
+	add	x0, x20, :lo12:.LANCHOR120
+	adrp	x19, .LANCHOR101
+	ldr	x24, [x21, #:lo12:.LANCHOR176]
 	mov	w4, 4
 	ldr	x25, [x0, 8]
 	mov	x3, x24
-	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	ldr	x0, [x19, #:lo12:.LANCHOR101]
 	mov	x2, x25
 	ldrh	w1, [x0, 692]
 	ldrb	w0, [x0, 694]
 	bl	flash_get_last_written_page
 	sxth	w26, w0
-	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	ldr	x0, [x19, #:lo12:.LANCHOR101]
 	mov	w23, w26
 	ldrh	w2, [x0, 696]
 	cmp	w2, w26
-	bgt	.L2188
+	bgt	.L2461
 	ldrh	w1, [x0, 692]
 	mov	w3, w26
-	adrp	x0, .LC106
-	add	x0, x0, :lo12:.LC106
+	adrp	x0, .LC155
+	add	x0, x0, :lo12:.LC155
 	adrp	x27, .LANCHOR99
-	adrp	x28, .LANCHOR52
+	adrp	x28, .LANCHOR114
 	add	x27, x27, :lo12:.LANCHOR99
-	add	x28, x28, :lo12:.LANCHOR52
+	add	x28, x28, :lo12:.LANCHOR114
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	ldr	x0, [x19, #:lo12:.LANCHOR101]
 	ldrsh	w21, [x0, 696]
-.L2189:
+.L2462:
 	cmp	w21, w26
-	ble	.L2191
-	adrp	x0, .LANCHOR157
+	ble	.L2464
+	adrp	x0, .LANCHOR167
 	mov	w1, 1
-	add	x20, x20, :lo12:.LANCHOR117
+	add	x20, x20, :lo12:.LANCHOR120
 	add	w23, w23, 1
-	strb	w1, [x0, #:lo12:.LANCHOR157]
-	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	strb	w1, [x0, #:lo12:.LANCHOR167]
+	ldr	x0, [x19, #:lo12:.LANCHOR101]
 	strh	w23, [x0, 696]
 	bl	pm_free_sblk
 	ldr	x1, [x20, 8]
@@ -14128,7 +15377,7 @@ pm_init:
 	ldr	x1, [x20, 8]
 	mov	w0, -1
 	bl	pm_write_page
-.L2188:
+.L2461:
 	bl	pm_free_sblk
 	bl	pm_gc
 	mov	w0, 0
@@ -14139,8 +15388,8 @@ pm_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2191:
-	ldr	x0, [x19, #:lo12:.LANCHOR53]
+.L2464:
+	ldr	x0, [x19, #:lo12:.LANCHOR101]
 	mov	x3, x24
 	ldrh	w1, [x27]
 	mov	x2, x25
@@ -14151,32 +15400,32 @@ pm_init:
 	mov	w1, w22
 	bl	flash_read_page_en
 	mov	w4, w0
-	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	ldr	x0, [x19, #:lo12:.LANCHOR101]
 	str	w4, [x29, 108]
 	mov	w2, w22
 	ldr	w1, [x0, 48]
 	ldrh	w3, [x0, 694]
 	add	w1, w1, 1
 	str	w1, [x0, 48]
-	adrp	x0, .LC107
-	add	x0, x0, :lo12:.LC107
+	adrp	x0, .LC156
+	add	x0, x0, :lo12:.LC156
 	ldr	w1, [x24]
 	bl	printf
 	ldr	w4, [x29, 108]
 	cmp	w4, 512
 	ccmn	w4, #1, 4, ne
-	beq	.L2190
-	ldr	x1, [x19, #:lo12:.LANCHOR53]
+	beq	.L2463
+	ldr	x1, [x19, #:lo12:.LANCHOR101]
 	ldr	w0, [x24]
 	ldrh	w2, [x1, 698]
 	cmp	w0, w2
-	bcs	.L2190
+	bcs	.L2463
 	add	x0, x1, x0, uxtw 2
 	str	w22, [x0, 704]
-.L2190:
+.L2463:
 	add	w21, w21, 1
 	sxth	w21, w21
-	b	.L2189
+	b	.L2462
 	.size	pm_init, .-pm_init
 	.section	.text.pm_log2phys,"ax",@progbits
 	.align	2
@@ -14187,10 +15436,10 @@ pm_log2phys:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	mov	x22, x1
-	adrp	x1, .LANCHOR52
+	adrp	x1, .LANCHOR114
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
-	ldrb	w1, [x1, #:lo12:.LANCHOR52]
+	ldrb	w1, [x1, #:lo12:.LANCHOR114]
 	stp	x23, x24, [sp, 48]
 	mov	w23, w2
 	lsl	w21, w1, 7
@@ -14201,52 +15450,52 @@ pm_log2phys:
 	cmp	w0, w2
 	and	w25, w21, 65535
 	msub	w20, w25, w20, w0
-	bcc	.L2201
+	bcc	.L2474
 	mov	w1, w0
-	adrp	x0, .LC108
-	add	x0, x0, :lo12:.LC108
+	adrp	x0, .LC157
+	add	x0, x0, :lo12:.LC157
 	bl	printf
 	mov	w0, -1
-.L2200:
+.L2473:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2201:
-	adrp	x24, .LANCHOR117
-	add	x0, x24, :lo12:.LANCHOR117
+.L2474:
+	adrp	x24, .LANCHOR120
+	add	x0, x24, :lo12:.LANCHOR120
 	and	x20, x20, 65535
 	add	x0, x0, 8
 	mov	x19, 0
-.L2207:
+.L2480:
 	ldr	x1, [x0]
-	cbz	x1, .L2203
+	cbz	x1, .L2476
 	ldrh	w1, [x0, -8]
 	cmp	w1, w25
-	bne	.L2203
-.L2204:
-	cbnz	w23, .L2205
-	add	x0, x24, :lo12:.LANCHOR117
+	bne	.L2476
+.L2477:
+	cbnz	w23, .L2478
+	add	x0, x24, :lo12:.LANCHOR120
 	add	x0, x0, x19, lsl 4
 	ldr	x0, [x0, 8]
 	ldr	w0, [x0, x20, lsl 2]
 	str	w0, [x22]
-.L2206:
-	add	x24, x24, :lo12:.LANCHOR117
+.L2479:
+	add	x24, x24, :lo12:.LANCHOR120
 	add	x19, x24, x19, lsl 4
 	ldrh	w0, [x19, 2]
 	mvn	x1, x0
 	tst	x1, 32767
-	beq	.L2209
+	beq	.L2482
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L2209:
+.L2482:
 	mov	w0, 0
-	b	.L2200
-.L2205:
-	add	x0, x24, :lo12:.LANCHOR117
+	b	.L2473
+.L2478:
+	add	x0, x24, :lo12:.LANCHOR120
 	ldr	w2, [x22]
 	add	x0, x0, x19, lsl 4
 	ldr	x1, [x0, 8]
@@ -14254,35 +15503,35 @@ pm_log2phys:
 	ldrh	w1, [x0, 2]
 	orr	w1, w1, -32768
 	strh	w1, [x0, 2]
-	adrp	x0, .LANCHOR118
-	strb	w21, [x0, #:lo12:.LANCHOR118]
-	b	.L2206
-.L2203:
+	adrp	x0, .LANCHOR121
+	strb	w21, [x0, #:lo12:.LANCHOR121]
+	b	.L2479
+.L2476:
 	add	w19, w19, 1
 	add	x0, x0, 16
 	and	x19, x19, 65535
 	cmp	w19, 32
-	bne	.L2207
+	bne	.L2480
 	bl	pm_select_ram_region
 	and	x19, x0, 65535
 	sbfiz	x1, x19, 4, 32
-	add	x2, x24, :lo12:.LANCHOR117
+	add	x2, x24, :lo12:.LANCHOR120
 	add	x3, x2, x1
 	mov	w26, w0
 	ldrh	w2, [x2, x1]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L2208
+	beq	.L2481
 	ldrsh	w1, [x3, 2]
-	tbz	w1, #31, .L2208
+	tbz	w1, #31, .L2481
 	bl	pm_flush_id
-.L2208:
-	adrp	x0, .LANCHOR175
+.L2481:
+	adrp	x0, .LANCHOR187
 	mov	w1, w26
-	strb	w19, [x0, #:lo12:.LANCHOR175]
+	strb	w19, [x0, #:lo12:.LANCHOR187]
 	mov	w0, w25
 	bl	load_l2p_region
-	b	.L2204
+	b	.L2477
 	.size	pm_log2phys, .-pm_log2phys
 	.section	.text.ftl_read_ahead,"ax",@progbits
 	.align	2
@@ -14297,55 +15546,55 @@ ftl_read_ahead:
 	ldr	w0, [x20, #:lo12:.LANCHOR56]
 	stp	x23, x24, [sp, 48]
 	cmn	w0, #1
-	beq	.L2216
+	beq	.L2497
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x19, x0
 	mov	w0, -1
-	cbz	x19, .L2215
+	cbz	x19, .L2488
 	ldr	w21, [x20, #:lo12:.LANCHOR56]
 	str	w21, [x19, 36]
 	str	w0, [x20, #:lo12:.LANCHOR56]
 	mov	w0, w21
+	ldr	x20, [x19, 8]
+	ldr	x22, [x19, 24]
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 76]
-	ldr	x20, [x19, 8]
 	cmn	w0, #1
-	ldr	x22, [x19, 24]
-	bne	.L2218
+	bne	.L2491
 	mov	w2, 0
 	add	x1, x29, 76
 	mov	w0, w21
 	bl	pm_log2phys
-.L2218:
+.L2491:
 	ldr	w0, [x29, 76]
 	stp	w0, w0, [x19, 40]
 	cmn	w0, #1
-	bne	.L2219
-	adrp	x0, .LANCHOR52
+	bne	.L2492
+	adrp	x0, .LANCHOR114
 	mov	w1, 0
-	ldrb	w2, [x0, #:lo12:.LANCHOR52]
+	ldrb	w2, [x0, #:lo12:.LANCHOR114]
 	mov	x0, x20
 	lsl	w2, w2, 9
 	bl	ftl_memset
 	ldrb	w0, [x19, 2]
 	orr	w0, w0, 8
 	strb	w0, [x19, 2]
-.L2216:
+.L2497:
 	mov	w0, 0
-.L2215:
+.L2488:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2219:
+.L2492:
 	mov	w1, 1
 	mov	x0, x19
 	bl	sblk_read_page
 	ldr	w23, [x19, 52]
 	cmn	w23, #1
-	bne	.L2220
+	bne	.L2493
 	ldrb	w0, [x19, 2]
 	and	w0, w0, -9
 	strb	w0, [x19, 2]
@@ -14354,36 +15603,35 @@ ftl_read_ahead:
 	ldr	w0, [x1, 552]
 	add	w0, w0, 1
 	str	w0, [x1, 552]
-.L2221:
+.L2494:
 	ldr	w5, [x22, 4]
 	cmp	w21, w5
-	beq	.L2222
+	beq	.L2495
 	ldrb	w1, [x19, 1]
-	adrp	x0, .LC110
+	adrp	x0, .LC159
 	ldr	w4, [x22]
 	mov	w2, w21
 	ldp	w6, w7, [x22, 8]
-	add	x0, x0, :lo12:.LC110
+	add	x0, x0, :lo12:.LC159
 	ldr	w3, [x29, 76]
 	bl	printf
-.L2222:
+.L2495:
 	ldr	w0, [x22, 4]
 	cmp	w21, w0
-	bne	.L2223
+	bne	.L2496
 	cmn	w23, #1
-	bne	.L2216
-.L2223:
-	adrp	x1, .LANCHOR176
+	bne	.L2497
+.L2496:
+	mov	w2, 874
+	adrp	x1, .LANCHOR188
 	adrp	x0, .LC0
-	mov	w2, 821
-	add	x1, x1, :lo12:.LANCHOR176
+	add	x1, x1, :lo12:.LANCHOR188
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2224:
-	b	.L2224
-.L2220:
+	b	.L2497
+.L2493:
 	cmp	w23, 256
-	bne	.L2221
+	bne	.L2494
 	adrp	x0, .LANCHOR96
 	mov	w20, 21
 	mov	w24, 1
@@ -14398,15 +15646,15 @@ ftl_read_ahead:
 	adrp	x0, .LANCHOR95
 	ldrb	w0, [x0, #:lo12:.LANCHOR95]
 	udiv	w20, w20, w0
-	adrp	x0, .LC109
-	add	x0, x0, :lo12:.LC109
+	adrp	x0, .LC158
+	add	x0, x0, :lo12:.LC158
 	and	w1, w20, 65535
 	bl	printf
 	mov	w2, 0
 	mov	w1, w24
 	mov	w0, w20
 	bl	gc_add_sblk
-	b	.L2221
+	b	.L2494
 	.size	ftl_read_ahead, .-ftl_read_ahead
 	.section	.text.gc_recovery,"ax",@progbits
 	.align	2
@@ -14422,9 +15670,9 @@ gc_recovery:
 	stp	x19, x20, [sp, 48]
 	ldr	x20, [x21, #:lo12:.LANCHOR5]
 	strb	wzr, [x0, #:lo12:.LANCHOR70]
-	adrp	x0, .LANCHOR130
+	adrp	x0, .LANCHOR135
 	stp	x23, x24, [sp, 80]
-	strb	wzr, [x0, #:lo12:.LANCHOR130]
+	strb	wzr, [x0, #:lo12:.LANCHOR135]
 	stp	x25, x26, [sp, 96]
 	stp	x27, x28, [sp, 112]
 	bl	gc_init
@@ -14434,7 +15682,7 @@ gc_recovery:
 	mov	w0, 65535
 	cmp	w1, w0
 	ldr	x0, [x21, #:lo12:.LANCHOR5]
-	beq	.L2231
+	beq	.L2502
 	mov	w1, -1
 	strh	w1, [x0, 130]
 	mov	w0, 1
@@ -14454,29 +15702,29 @@ gc_recovery:
 	ldrb	w0, [x2, #:lo12:.LANCHOR67]
 	str	w1, [x29, 200]
 	cmp	w0, 3
-	bne	.L2232
+	bne	.L2503
 	adrp	x0, .LANCHOR80
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	sub	w0, w0, #1
 	add	w0, w0, w1
 	orr	w0, w0, 50331648
-.L2279:
+.L2550:
 	str	w0, [x27, 40]
-.L2233:
+.L2504:
 	mov	w1, 1
 	mov	x0, x27
 	bl	sblk_read_page
 	ldr	w0, [x27, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2234
+	beq	.L2505
 	ldr	x0, [x27, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L2235
-.L2234:
+	beq	.L2506
+.L2505:
 	mov	x0, x27
 	bl	buf_free
 	ldr	x1, [x27, 24]
@@ -14489,13 +15737,13 @@ gc_recovery:
 	str	w2, [sp]
 	ldp	w3, w4, [x0]
 	ldp	w5, w6, [x0, 8]
-	adrp	x0, .LC111
+	adrp	x0, .LC160
 	ldr	w7, [x1]
-	add	x0, x0, :lo12:.LC111
+	add	x0, x0, :lo12:.LC160
 	ldr	w1, [x27, 40]
 	ldr	w2, [x27, 52]
 	bl	printf
-.L2283:
+.L2554:
 	adrp	x0, .LANCHOR4
 	ldrh	w1, [x20, 80]
 	mov	w22, 0
@@ -14504,11 +15752,11 @@ gc_recovery:
 	ldr	x0, [x21, #:lo12:.LANCHOR5]
 	ldrh	w1, [x20, 80]
 	strh	w1, [x0, 130]
-.L2236:
+.L2507:
 	ldrh	w1, [x20, 80]
 	mov	w2, w22
-	adrp	x0, .LC114
-	add	x0, x0, :lo12:.LC114
+	adrp	x0, .LC163
+	add	x0, x0, :lo12:.LC163
 	bl	printf
 	mov	w0, -1
 	strh	w0, [x20, 80]
@@ -14518,18 +15766,18 @@ gc_recovery:
 	mov	w1, 65535
 	ldrh	w0, [x0, 130]
 	cmp	w0, w1
-	beq	.L2265
+	beq	.L2536
 	bl	ftl_free_sblk
-.L2265:
-	adrp	x0, .LANCHOR53
-	ldr	x1, [x0, #:lo12:.LANCHOR53]
+.L2536:
+	adrp	x0, .LANCHOR101
+	ldr	x1, [x0, #:lo12:.LANCHOR101]
 	mov	w0, -1
 	strh	w0, [x1, 126]
 	ldr	x1, [x21, #:lo12:.LANCHOR5]
 	strh	w0, [x1, 130]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2230:
+.L2501:
 	ldp	x19, x20, [sp, 48]
 	ldp	x21, x22, [sp, 64]
 	ldp	x23, x24, [sp, 80]
@@ -14538,34 +15786,34 @@ gc_recovery:
 	ldp	x29, x30, [sp, 32]
 	add	sp, sp, 240
 	ret
-.L2232:
+.L2503:
 	cmp	w0, 2
-	bne	.L2233
+	bne	.L2504
 	adrp	x0, .LANCHOR80
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	add	w0, w1, w0, lsl 1
 	sub	w0, w0, #1
 	orr	w0, w0, 33554432
-	b	.L2279
-.L2235:
+	b	.L2550
+.L2506:
 	adrp	x26, .LANCHOR71
 	adrp	x19, .LANCHOR72
-	adrp	x22, .LANCHOR131
+	adrp	x22, .LANCHOR136
 	ldr	x1, [x27, 8]
 	ldrb	w0, [x19, #:lo12:.LANCHOR72]
 	ldrh	w2, [x26, #:lo12:.LANCHOR71]
 	mul	w2, w2, w0
-	ldr	x0, [x22, #:lo12:.LANCHOR131]
+	ldr	x0, [x22, #:lo12:.LANCHOR136]
 	lsl	w2, w2, 2
 	bl	ftl_memcpy
 	ldrb	w1, [x19, #:lo12:.LANCHOR72]
-	adrp	x19, .LANCHOR132
+	adrp	x19, .LANCHOR137
 	ldrh	w0, [x26, #:lo12:.LANCHOR71]
 	mul	w0, w0, w1
 	ldr	x1, [x27, 8]
 	lsl	w2, w0, 2
 	add	x1, x1, x0, sxtw 2
-	ldr	x0, [x19, #:lo12:.LANCHOR132]
+	ldr	x0, [x19, #:lo12:.LANCHOR137]
 	bl	ftl_memcpy
 	str	x26, [x29, 120]
 	adrp	x0, .LANCHOR80
@@ -14574,28 +15822,28 @@ gc_recovery:
 	ldr	x0, [x29, 160]
 	ldrb	w0, [x0, #:lo12:.LANCHOR67]
 	cmp	w0, 2
-	beq	.L2237
-.L2280:
+	beq	.L2508
+.L2551:
 	str	w0, [x29, 180]
-	adrp	x23, .LC112
+	adrp	x23, .LC161
 	ldr	x0, [x29, 128]
-	add	x23, x23, :lo12:.LC112
+	add	x23, x23, :lo12:.LC161
 	mov	w26, 0
 	mov	w22, 0
 	add	x0, x0, :lo12:.LANCHOR99
 	str	x0, [x29, 104]
-.L2239:
+.L2510:
 	sub	w0, w26, #1
 	str	w0, [x29, 184]
 	cmp	w26, w24
-	beq	.L2248
+	beq	.L2519
 	mov	x19, 0
-	b	.L2249
-.L2237:
+	b	.L2520
+.L2508:
 	lsl	w24, w24, 1
 	mov	w0, 1
-	b	.L2280
-.L2245:
+	b	.L2551
+.L2516:
 	ldr	x1, [x29, 104]
 	ldr	x0, [x29, 136]
 	ldrh	w1, [x1]
@@ -14605,32 +15853,32 @@ gc_recovery:
 	str	w0, [x29, 200]
 	ldrb	w1, [x1]
 	cmp	w1, 3
-	bne	.L2240
+	bne	.L2511
 	add	w0, w26, w0
 	orr	w0, w0, w25, lsl 24
-.L2281:
+.L2552:
 	str	w0, [x27, 40]
 	mov	w1, 1
 	mov	x0, x27
 	bl	sblk_read_page
 	ldr	x0, [x29, 152]
-	ldr	x0, [x0, #:lo12:.LANCHOR131]
+	ldr	x0, [x0, #:lo12:.LANCHOR136]
 	ldr	w3, [x0, x28]
 	ldr	x0, [x27, 24]
 	ldr	w6, [x0, 4]
 	cmp	w3, w6
-	bne	.L2243
+	bne	.L2514
 	ldr	x1, [x29, 144]
-	ldr	x1, [x1, #:lo12:.LANCHOR132]
+	ldr	x1, [x1, #:lo12:.LANCHOR137]
 	ldr	w2, [x1, x28]
 	ldr	w1, [x0, 8]
 	cmp	w2, w1
-	beq	.L2244
-.L2243:
+	beq	.L2515
+.L2514:
 	ldr	x1, [x29, 144]
 	ldr	w2, [x0, 12]
 	str	w2, [sp]
-	ldr	x1, [x1, #:lo12:.LANCHOR132]
+	ldr	x1, [x1, #:lo12:.LANCHOR137]
 	ldr	w5, [x0]
 	ldr	w7, [x0, 8]
 	mov	x0, x23
@@ -14639,38 +15887,38 @@ gc_recovery:
 	ldr	w1, [x27, 40]
 	bl	printf
 	ldr	x0, [x29, 152]
-	ldr	x0, [x0, #:lo12:.LANCHOR131]
+	ldr	x0, [x0, #:lo12:.LANCHOR136]
 	ldr	w0, [x0, x28]
 	cmn	w0, #1
-	beq	.L2244
+	beq	.L2515
 	mov	x0, x27
 	bl	buf_free
-	b	.L2283
-.L2240:
+	b	.L2554
+.L2511:
 	cmp	w1, 2
-	bne	.L2242
+	bne	.L2513
 	ldr	w1, [x29, 184]
 	add	w0, w0, w1
 	add	w0, w0, w25
 	orr	w0, w0, 33554432
-	b	.L2281
-.L2242:
+	b	.L2552
+.L2513:
 	add	w0, w26, w0
-	b	.L2281
-.L2244:
+	b	.L2552
+.L2515:
 	add	w22, w22, 1
 	add	w25, w25, 1
 	add	x28, x28, 4
-.L2247:
+.L2518:
 	ldr	w0, [x29, 180]
 	cmp	w0, w25
-	bcs	.L2245
+	bcs	.L2516
 	add	x19, x19, 1
-.L2249:
+.L2520:
 	ldr	x0, [x29, 168]
 	ldrb	w0, [x0, 9]
 	cmp	w0, w19
-	ble	.L2246
+	ble	.L2517
 	add	x0, x20, x19, lsl 1
 	str	x0, [x29, 136]
 	ldr	x0, [x29, 160]
@@ -14678,11 +15926,11 @@ gc_recovery:
 	mov	w25, 1
 	add	x0, x0, :lo12:.LANCHOR67
 	str	x0, [x29, 112]
-	b	.L2247
-.L2246:
+	b	.L2518
+.L2517:
 	add	w26, w26, 1
-	b	.L2239
-.L2248:
+	b	.L2510
+.L2519:
 	mov	x0, x27
 	bl	buf_free
 	ldr	x3, [x29, 120]
@@ -14700,34 +15948,34 @@ gc_recovery:
 	adrp	x0, .LANCHOR96
 	add	x0, x0, :lo12:.LANCHOR96
 	str	x0, [x29, 96]
-.L2250:
+.L2521:
 	sub	w0, w23, #1
 	str	w0, [x29, 120]
 	cmp	w26, w23
-	beq	.L2263
+	beq	.L2534
 	str	xzr, [x29, 184]
-	b	.L2264
-.L2260:
+	b	.L2535
+.L2531:
 	ldr	x1, [x29, 152]
 	sbfiz	x0, x27, 2, 32
-	ldr	x1, [x1, #:lo12:.LANCHOR131]
+	ldr	x1, [x1, #:lo12:.LANCHOR136]
 	ldr	w28, [x1, x0]
 	cmn	w28, #1
-	beq	.L2251
+	beq	.L2522
 	ldr	x1, [x29, 144]
-	ldr	x1, [x1, #:lo12:.LANCHOR132]
+	ldr	x1, [x1, #:lo12:.LANCHOR137]
 	ldr	w0, [x1, x0]
 	str	w0, [x29, 136]
 	mov	w0, w28
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 204]
 	cmn	w0, #1
-	bne	.L2252
+	bne	.L2523
 	mov	w2, 0
 	add	x1, x29, 204
 	mov	w0, w28
 	bl	pm_log2phys
-.L2252:
+.L2523:
 	ldr	x0, [x29, 112]
 	ldr	x1, [x29, 128]
 	ldrh	w0, [x0, 96]
@@ -14736,10 +15984,10 @@ gc_recovery:
 	ldr	x1, [x29, 160]
 	ldrb	w1, [x1, #:lo12:.LANCHOR67]
 	cmp	w1, 3
-	bne	.L2253
+	bne	.L2524
 	add	w0, w23, w0
 	orr	w0, w0, w25, lsl 24
-.L2282:
+.L2553:
 	str	w0, [x29, 200]
 	mov	w19, 21
 	ldr	x0, [x29, 96]
@@ -14757,29 +16005,29 @@ gc_recovery:
 	ldr	w0, [x29, 204]
 	cmp	w1, w0
 	and	x19, x19, 65535
-	bne	.L2256
+	bne	.L2527
 	ldr	w2, [x29, 200]
 	mov	w1, w28
 	str	w4, [x29, 136]
-	adrp	x0, .LC113
-	add	x0, x0, :lo12:.LC113
+	adrp	x0, .LC162
+	add	x0, x0, :lo12:.LC162
 	bl	pm_ppa_update_check
 	ldr	w4, [x29, 136]
-	cbz	w0, .L2257
-.L2277:
-	b	.L2277
-.L2253:
+	cbz	w0, .L2528
+.L2548:
+	b	.L2548
+.L2524:
 	cmp	w1, 2
-	bne	.L2255
+	bne	.L2526
 	ldr	w1, [x29, 120]
 	add	w0, w0, w1
 	add	w0, w0, w25
 	orr	w0, w0, 33554432
-	b	.L2282
-.L2255:
+	b	.L2553
+.L2526:
 	add	w0, w23, w0
-	b	.L2282
-.L2257:
+	b	.L2553
+.L2528:
 	mov	w2, w4
 	add	x1, x29, 200
 	mov	w0, w28
@@ -14787,34 +16035,34 @@ gc_recovery:
 	add	w22, w22, 1
 	mov	w0, w19
 	bl	ftl_vpn_decrement
-.L2259:
+.L2530:
 	adrp	x0, .LANCHOR3
 	add	w27, w27, 1
 	ldr	x0, [x0, #:lo12:.LANCHOR3]
 	add	x0, x0, x19, lsl 2
 	ldrb	w0, [x0, 2]
 	tst	w0, 224
-	bne	.L2251
+	bne	.L2522
 	ldr	x0, [x24, #:lo12:.LANCHOR4]
 	lsl	x19, x19, 1
 	ldrh	w1, [x0, x19]
-	cbz	w1, .L2251
+	cbz	w1, .L2522
 	strh	wzr, [x0, x19]
-.L2251:
+.L2522:
 	add	w25, w25, 1
-.L2262:
+.L2533:
 	ldr	w0, [x29, 180]
 	cmp	w0, w25
-	bcs	.L2260
+	bcs	.L2531
 	ldr	x0, [x29, 184]
 	add	x0, x0, 1
 	str	x0, [x29, 184]
-.L2264:
+.L2535:
 	ldr	x0, [x29, 168]
 	ldr	w1, [x29, 184]
 	ldrb	w0, [x0, 9]
 	cmp	w0, w1
-	ble	.L2261
+	ble	.L2532
 	ldr	x0, [x29, 184]
 	mov	w25, 1
 	add	x0, x20, x0, lsl 1
@@ -14822,293 +16070,383 @@ gc_recovery:
 	adrp	x0, .LANCHOR95
 	add	x0, x0, :lo12:.LANCHOR95
 	str	x0, [x29, 104]
-	b	.L2262
-.L2256:
+	b	.L2533
+.L2527:
 	ldr	w1, [x29, 200]
 	cmp	w0, w1
 	cinc	w22, w22, eq
-	b	.L2259
-.L2261:
+	b	.L2530
+.L2532:
 	add	w23, w23, 1
-	b	.L2250
-.L2263:
+	b	.L2521
+.L2534:
 	ldrh	w1, [x20, 80]
 	ldr	x0, [x24, #:lo12:.LANCHOR4]
 	strh	w22, [x0, x1, lsl 1]
-	b	.L2236
-.L2231:
+	b	.L2507
+.L2502:
 	ldrh	w0, [x0, 130]
 	cmp	w0, w1
-	beq	.L2230
-	adrp	x19, .LANCHOR53
-	ldr	x1, [x19, #:lo12:.LANCHOR53]
+	beq	.L2501
+	adrp	x19, .LANCHOR101
+	ldr	x1, [x19, #:lo12:.LANCHOR101]
 	ldrh	w1, [x1, 126]
 	cmp	w1, w0
-	bne	.L2267
+	bne	.L2538
 	bl	pm_flush
 	ldr	x0, [x21, #:lo12:.LANCHOR5]
 	ldrh	w0, [x0, 130]
 	bl	ftl_free_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	ldr	x0, [x19, #:lo12:.LANCHOR101]
 	mov	w1, -1
 	strh	w1, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2267:
+.L2538:
 	ldr	x0, [x21, #:lo12:.LANCHOR5]
 	mov	w1, -1
 	strh	w1, [x0, 130]
-	b	.L2230
+	b	.L2501
 	.size	gc_recovery, .-gc_recovery
 	.section	.text.zftl_init,"ax",@progbits
 	.align	2
 	.global	zftl_init
 	.type	zftl_init, %function
 zftl_init:
-	stp	x29, x30, [sp, -64]!
-	adrp	x1, .LANCHOR49
+	stp	x29, x30, [sp, -112]!
+	adrp	x1, .LANCHOR52
 	mov	w0, -1
 	add	x29, sp, 0
-	strb	w0, [x1, #:lo12:.LANCHOR49]
-	adrp	x1, .LANCHOR50
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR72
-	strb	wzr, [x1, #:lo12:.LANCHOR50]
-	adrp	x1, .LANCHOR151
+	strb	w0, [x1, #:lo12:.LANCHOR52]
+	adrp	x1, .LANCHOR53
 	stp	x21, x22, [sp, 32]
-	adrp	x19, .LANCHOR2
-	strb	w0, [x1, #:lo12:.LANCHOR151]
+	adrp	x22, .LANCHOR80
+	strb	wzr, [x1, #:lo12:.LANCHOR53]
+	adrp	x1, .LANCHOR160
+	stp	x19, x20, [sp, 16]
+	adrp	x21, .LANCHOR72
+	strb	w0, [x1, #:lo12:.LANCHOR160]
 	adrp	x0, .LANCHOR112
 	mov	w1, -1
-	str	x23, [sp, 48]
+	stp	x23, x24, [sp, 48]
 	strb	wzr, [x0, #:lo12:.LANCHOR112]
 	adrp	x0, .LANCHOR56
-	adrp	x21, .LANCHOR80
-	adrp	x22, .LANCHOR173
+	stp	x25, x26, [sp, 64]
+	adrp	x23, .LANCHOR2
 	str	w1, [x0, #:lo12:.LANCHOR56]
-	adrp	x1, .LC115
-	adrp	x0, .LC42
-	add	x1, x1, :lo12:.LC115
-	add	x0, x0, :lo12:.LC42
+	adrp	x1, .LC164
+	stp	x27, x28, [sp, 80]
+	add	x1, x1, :lo12:.LC164
+	adrp	x0, .LC80
+	add	x0, x0, :lo12:.LC80
 	bl	printf
-	adrp	x2, .LANCHOR26
-	add	x2, x2, :lo12:.LANCHOR26
+	adrp	x20, .LANCHOR185
+	adrp	x1, .LANCHOR32
+	add	x1, x1, :lo12:.LANCHOR32
 	adrp	x0, .LANCHOR67
-	adrp	x1, .LANCHOR52
-	adrp	x6, .LANCHOR95
-	ldrb	w4, [x2, 12]
-	strb	w4, [x0, #:lo12:.LANCHOR67]
-	ldrb	w0, [x2, 9]
-	strb	w0, [x1, #:lo12:.LANCHOR52]
-	adrp	x1, .LANCHOR71
-	ldrh	w7, [x2, 10]
-	strh	w7, [x1, #:lo12:.LANCHOR71]
-	adrp	x1, .LANCHOR15
-	ubfiz	w10, w0, 9, 7
-	strh	w10, [x22, #:lo12:.LANCHOR173]
-	ldrb	w5, [x1, #:lo12:.LANCHOR15]
-	adrp	x1, .LANCHOR100
-	sdiv	w3, w7, w4
-	strb	w5, [x1, #:lo12:.LANCHOR100]
-	ldrb	w1, [x2, 13]
-	strb	w1, [x6, #:lo12:.LANCHOR95]
-	ldrh	w6, [x2, 14]
-	mov	w2, 0
-	strh	w3, [x21, #:lo12:.LANCHOR80]
-	mul	w5, w5, w1
-	adrp	x1, .LANCHOR20
-	strh	w6, [x19, #:lo12:.LANCHOR2]
-	and	w8, w5, 255
-	ldrh	w5, [x1, #:lo12:.LANCHOR20]
+	adrp	x2, .LANCHOR114
+	adrp	x7, .LANCHOR95
+	ldrb	w5, [x1, 12]
+	strb	w5, [x0, #:lo12:.LANCHOR67]
+	ldrb	w0, [x1, 9]
+	strb	w0, [x2, #:lo12:.LANCHOR114]
+	adrp	x2, .LANCHOR71
+	ldrh	w3, [x1, 10]
+	strh	w3, [x2, #:lo12:.LANCHOR71]
+	adrp	x2, .LANCHOR12
+	ldrh	w8, [x1, 14]
+	ubfiz	w11, w0, 9, 7
+	ldrb	w4, [x2, #:lo12:.LANCHOR12]
+	adrp	x2, .LANCHOR100
+	sdiv	w6, w3, w5
+	strh	w8, [x23, #:lo12:.LANCHOR2]
+	strb	w4, [x2, #:lo12:.LANCHOR100]
+	ldrb	w2, [x1, 13]
+	adrp	x1, .LANCHOR26
+	strb	w2, [x7, #:lo12:.LANCHOR95]
+	ldrh	w7, [x1, #:lo12:.LANCHOR26]
 	adrp	x1, .LANCHOR99
-	strb	w8, [x20, #:lo12:.LANCHOR72]
-	strh	w5, [x1, #:lo12:.LANCHOR99]
-	mov	w1, 1
-.L2285:
-	cmp	w5, w1
-	bcs	.L2286
-	adrp	x1, .LANCHOR96
-	sub	w2, w2, #1
-	adrp	x23, .LANCHOR161
-	mul	w3, w3, w8
-	strh	w2, [x1, #:lo12:.LANCHOR96]
-	mul	w2, w0, w7
+	strh	w6, [x22, #:lo12:.LANCHOR80]
+	mul	w4, w4, w2
+	strh	w7, [x1, #:lo12:.LANCHOR99]
+	strh	w11, [x20, #:lo12:.LANCHOR185]
+	mov	w2, 1
+	and	w4, w4, 255
+	mov	w1, 0
+	strb	w4, [x21, #:lo12:.LANCHOR72]
+.L2556:
+	cmp	w7, w2
+	bcs	.L2557
+	mul	w3, w0, w3
+	adrp	x2, .LANCHOR96
+	sub	w1, w1, #1
+	adrp	x10, .LANCHOR189
+	strh	w1, [x2, #:lo12:.LANCHOR96]
 	mov	w1, 57344
 	movk	w1, 0x1c, lsl 16
-	mul	w5, w2, w6
-	mul	w1, w8, w1
-	mul	w2, w2, w8
-	lsr	w7, w5, 21
-	mul	w5, w5, w8
-	sub	w2, w2, #1
-	mul	w1, w1, w7
-	adrp	x7, .LANCHOR59
-	str	w1, [x7, #:lo12:.LANCHOR59]
-	add	w1, w1, 24576
-	adrp	x7, .LANCHOR177
-	udiv	w0, w1, w0
-	str	w5, [x7, #:lo12:.LANCHOR177]
-	adrp	x5, .LANCHOR178
-	str	w1, [x5, #:lo12:.LANCHOR178]
-	adrp	x5, .LANCHOR54
-	udiv	w1, w1, w2
-	str	w0, [x5, #:lo12:.LANCHOR54]
-	sub	w5, w10, #1
-	add	w0, w5, w0, lsl 2
-	add	w1, w1, 8
-	udiv	w0, w0, w10
-	strh	w0, [x23, #:lo12:.LANCHOR161]
+	adrp	x28, .LANCHOR54
+	mul	w7, w3, w8
+	adrp	x24, .LANCHOR172
+	mul	w1, w4, w1
+	adrp	x27, .LANCHOR190
+	mul	w3, w3, w4
+	adrp	x26, .LANCHOR131
+	lsr	w2, w7, 21
+	mul	w6, w6, w4
+	mul	w7, w7, w4
+	sub	w3, w3, #1
+	str	w7, [x10, #:lo12:.LANCHOR189]
+	sub	w7, w11, #1
+	mul	w1, w1, w2
+	adrp	x2, .LANCHOR59
+	adrp	x25, .LANCHOR83
+	str	w1, [x2, #:lo12:.LANCHOR59]
+	add	w2, w1, 24576
+	str	w2, [x27, #:lo12:.LANCHOR190]
+	udiv	w0, w2, w0
+	udiv	w2, w2, w3
+	str	w0, [x28, #:lo12:.LANCHOR54]
+	add	w0, w7, w0, lsl 2
+	add	w2, w2, 8
+	udiv	w0, w0, w11
+	strh	w0, [x24, #:lo12:.LANCHOR172]
 	ubfiz	w0, w0, 4, 16
-	sdiv	w0, w0, w3
-	adrp	x3, .LANCHOR127
-	strh	w0, [x3, #:lo12:.LANCHOR127]
-	adrp	x0, .LANCHOR87
-	strh	w1, [x0, #:lo12:.LANCHOR87]
-	adrp	x1, .LANCHOR179
-	add	w0, w6, w6, lsl 1
+	sdiv	w0, w0, w6
+	adrp	x6, .LANCHOR87
+	str	x6, [x29, 104]
+	strh	w2, [x6, #:lo12:.LANCHOR87]
+	adrp	x2, .LANCHOR191
+	strh	w0, [x26, #:lo12:.LANCHOR131]
+	add	w0, w8, w8, lsl 1
 	asr	w0, w0, 2
-	strh	w0, [x1, #:lo12:.LANCHOR179]
-	adrp	x1, .LANCHOR83
-	lsr	w0, w6, 4
+	strh	w0, [x2, #:lo12:.LANCHOR191]
+	lsr	w0, w8, 4
+	strh	w0, [x25, #:lo12:.LANCHOR83]
 	cmp	w0, 79
-	strh	w0, [x1, #:lo12:.LANCHOR83]
-	bhi	.L2287
+	bhi	.L2558
 	mov	w0, 80
-	strh	w0, [x1, #:lo12:.LANCHOR83]
-.L2287:
-	adrp	x1, .LANCHOR180
+	strh	w0, [x25, #:lo12:.LANCHOR83]
+.L2558:
+	adrp	x2, .LANCHOR192
 	mov	w0, 4000
-	adrp	x3, .LANCHOR181
-	mov	w2, 1024
-	strh	w0, [x1, #:lo12:.LANCHOR180]
+	adrp	x4, .LANCHOR193
+	mov	w3, 1024
+	strh	w0, [x2, #:lo12:.LANCHOR192]
 	mov	w0, 50
-	strh	w0, [x3, #:lo12:.LANCHOR181]
-	adrp	x0, .LANCHOR126
-	mov	w5, 64
-	cmp	w4, 2
-	strh	w2, [x0, #:lo12:.LANCHOR126]
-	adrp	x2, .LANCHOR125
-	strh	w5, [x2, #:lo12:.LANCHOR125]
-	beq	.L2288
-	adrp	x4, .LANCHOR69
-	ldrb	w4, [x4, #:lo12:.LANCHOR69]
-	cbz	w4, .L2289
-.L2288:
-	mov	w4, 150
-	strh	w4, [x3, #:lo12:.LANCHOR181]
-	mov	w3, 128
-	strh	w3, [x2, #:lo12:.LANCHOR125]
-	adrp	x2, .LANCHOR18
-	ldrb	w2, [x2, #:lo12:.LANCHOR18]
-	cbnz	w2, .L2289
-	mov	w2, 600
-	strh	w2, [x1, #:lo12:.LANCHOR180]
-	mov	w1, 512
-	strh	w1, [x0, #:lo12:.LANCHOR126]
-.L2289:
+	strh	w0, [x4, #:lo12:.LANCHOR193]
+	adrp	x0, .LANCHOR130
+	mov	w6, 64
+	cmp	w5, 2
+	strh	w3, [x0, #:lo12:.LANCHOR130]
+	adrp	x3, .LANCHOR129
+	strh	w6, [x3, #:lo12:.LANCHOR129]
+	beq	.L2559
+	adrp	x5, .LANCHOR69
+	ldrb	w5, [x5, #:lo12:.LANCHOR69]
+	cbz	w5, .L2560
+.L2559:
+	mov	w5, 150
+	strh	w5, [x4, #:lo12:.LANCHOR193]
+	mov	w4, 128
+	strh	w4, [x3, #:lo12:.LANCHOR129]
+	adrp	x3, .LANCHOR11
+	ldrb	w3, [x3, #:lo12:.LANCHOR11]
+	cbnz	w3, .L2560
+	mov	w3, 600
+	strh	w3, [x2, #:lo12:.LANCHOR192]
+	mov	w2, 512
+	strh	w2, [x0, #:lo12:.LANCHOR130]
+.L2560:
+	adrp	x19, .LANCHOR7
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2562
+	str	x10, [x29, 96]
+	adrp	x0, .LC165
+	add	x0, x0, :lo12:.LC165
+	bl	printf
+	ldr	x10, [x29, 96]
+.L2562:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2563
+	ldr	w1, [x10, #:lo12:.LANCHOR189]
+	adrp	x0, .LC166
+	add	x0, x0, :lo12:.LC166
+	bl	printf
+.L2563:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2564
+	ldr	w1, [x28, #:lo12:.LANCHOR54]
+	adrp	x0, .LC167
+	add	x0, x0, :lo12:.LC167
+	bl	printf
+.L2564:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2565
+	ldr	w1, [x27, #:lo12:.LANCHOR190]
+	adrp	x0, .LC168
+	add	x0, x0, :lo12:.LC168
+	bl	printf
+.L2565:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2566
+	ldrh	w1, [x24, #:lo12:.LANCHOR172]
+	adrp	x0, .LC169
+	add	x0, x0, :lo12:.LC169
+	bl	printf
+.L2566:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2567
+	ldrh	w1, [x20, #:lo12:.LANCHOR185]
+	adrp	x0, .LC170
+	add	x0, x0, :lo12:.LC170
+	bl	printf
+.L2567:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2568
+	ldrh	w1, [x26, #:lo12:.LANCHOR131]
+	adrp	x0, .LC171
+	add	x0, x0, :lo12:.LC171
+	bl	printf
+.L2568:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2569
+	ldrh	w1, [x25, #:lo12:.LANCHOR83]
+	adrp	x0, .LC172
+	add	x0, x0, :lo12:.LC172
+	bl	printf
+.L2569:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2570
+	ldr	x0, [x29, 104]
+	ldrh	w1, [x0, #:lo12:.LANCHOR87]
+	adrp	x0, .LC173
+	add	x0, x0, :lo12:.LC173
+	bl	printf
+.L2570:
 	bl	buf_init
-	ldrh	w1, [x19, #:lo12:.LANCHOR2]
+	adrp	x25, .LANCHOR5
+	ldrh	w1, [x23, #:lo12:.LANCHOR2]
 	mov	w0, 6
 	mul	w0, w1, w0
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR0
 	str	x0, [x1, #:lo12:.LANCHOR0]
-	ldrb	w1, [x20, #:lo12:.LANCHOR72]
-	ldrh	w0, [x21, #:lo12:.LANCHOR80]
+	ldrb	w1, [x21, #:lo12:.LANCHOR72]
+	ldrh	w0, [x22, #:lo12:.LANCHOR80]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR106
-	adrp	x3, .LANCHOR4
-	str	x0, [x1, #:lo12:.LANCHOR106]
-	adrp	x0, .LANCHOR105
-	adrp	x1, ftl_ext_info_data_buffer
-	add	x2, x1, :lo12:ftl_ext_info_data_buffer
-	ldrb	w1, [x20, #:lo12:.LANCHOR72]
-	str	x2, [x0, #:lo12:.LANCHOR105]
-	ldrh	w0, [x21, #:lo12:.LANCHOR80]
-	mul	w0, w0, w1
-	lsl	w1, w0, 1
-	add	x4, x2, x1, sxtw 2
-	str	x4, [x3, #:lo12:.LANCHOR4]
-	ldrh	w3, [x19, #:lo12:.LANCHOR2]
-	adrp	x19, .LANCHOR5
-	add	w1, w1, w3, lsr 1
-	add	w0, w3, w0, lsl 2
+	adrp	x1, .LANCHOR107
+	adrp	x2, ftl_ext_info_data_buffer
+	add	x2, x2, :lo12:ftl_ext_info_data_buffer
+	str	x0, [x1, #:lo12:.LANCHOR107]
+	adrp	x0, .LANCHOR106
+	ldrh	w1, [x22, #:lo12:.LANCHOR80]
+	str	x2, [x0, #:lo12:.LANCHOR106]
+	ldrb	w0, [x21, #:lo12:.LANCHOR72]
+	mul	w1, w1, w0
+	lsl	w0, w1, 1
+	adrp	x1, .LANCHOR4
+	add	x3, x2, x0, sxtw 2
+	str	x3, [x1, #:lo12:.LANCHOR4]
+	ldrh	w1, [x23, #:lo12:.LANCHOR2]
+	add	w1, w0, w1, lsr 1
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
 	add	x1, x2, x1, sxtw 2
-	str	x1, [x19, #:lo12:.LANCHOR5]
-	ldrh	w1, [x23, #:lo12:.LANCHOR161]
-	lsl	w2, w3, 2
-	lsl	w0, w0, 1
-	add	w0, w0, 612
-	add	w1, w2, w1, lsl 2
-	ldrh	w2, [x22, #:lo12:.LANCHOR173]
-	add	w1, w1, 704
-	cmp	w0, w2
-	bhi	.L2291
-	cmp	w1, w2
-	bls	.L2292
-.L2291:
-.L2302:
-	b	.L2302
-.L2286:
-	add	w2, w2, 1
-	lsl	w1, w1, 1
-	and	w2, w2, 65535
-	b	.L2285
-.L2292:
+	str	x1, [x25, #:lo12:.LANCHOR5]
+	tbz	x0, 12, .L2571
+	adrp	x0, .LC174
+	add	x0, x0, :lo12:.LC174
+	bl	printf
+.L2571:
+	ldrh	w0, [x22, #:lo12:.LANCHOR80]
+	ldrb	w21, [x21, #:lo12:.LANCHOR72]
+	ldrh	w1, [x23, #:lo12:.LANCHOR2]
+	ldrh	w22, [x24, #:lo12:.LANCHOR172]
+	mul	w21, w0, w21
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	add	w21, w1, w21, lsl 2
+	lsl	w1, w1, 2
+	lsl	w21, w21, 1
+	add	w22, w1, w22, lsl 2
+	add	w21, w21, 612
+	add	w22, w22, 704
+	tbz	x0, 12, .L2572
+	ldrh	w3, [x20, #:lo12:.LANCHOR185]
+	adrp	x0, .LC175
+	mov	w2, w22
+	mov	w1, w21
+	add	x0, x0, :lo12:.LC175
+	bl	printf
+.L2572:
+	ldrh	w0, [x20, #:lo12:.LANCHOR185]
+	cmp	w21, w0
+	bhi	.L2573
+	cmp	w22, w0
+	bls	.L2574
+.L2573:
+.L2617:
+	b	.L2617
+.L2557:
+	add	w1, w1, 1
+	lsl	w2, w2, 1
+	and	w1, w1, 65535
+	b	.L2556
+.L2574:
 	bl	sblk_init
 	bl	ftl_info_blk_init
 	cmn	w0, #1
-	beq	.L2284
+	beq	.L2555
 	bl	ftl_ext_info_init
-	adrp	x20, .LANCHOR53
+	adrp	x19, .LANCHOR101
 	mov	w0, 1
 	bl	pm_init
 	bl	lpa_rebuild_hash
-	ldr	x0, [x19, #:lo12:.LANCHOR5]
+	ldr	x0, [x25, #:lo12:.LANCHOR5]
 	mov	x1, 0
 	add	x0, x0, 16
 	bl	ftl_open_sblk_recovery
-	ldr	x0, [x19, #:lo12:.LANCHOR5]
+	ldr	x0, [x25, #:lo12:.LANCHOR5]
 	add	x1, x0, 16
 	add	x0, x0, 48
 	bl	ftl_open_sblk_recovery
-	ldr	x1, [x20, #:lo12:.LANCHOR53]
+	ldr	x1, [x19, #:lo12:.LANCHOR101]
 	ldr	w0, [x1, 8]
 	add	w0, w0, 16
 	str	w0, [x1, 8]
-	ldr	x0, [x19, #:lo12:.LANCHOR5]
+	ldr	x0, [x25, #:lo12:.LANCHOR5]
 	add	x0, x0, 16
 	bl	ftl_info_data_recovery
-	ldr	x0, [x19, #:lo12:.LANCHOR5]
+	ldr	x0, [x25, #:lo12:.LANCHOR5]
 	add	x0, x0, 48
 	bl	ftl_info_data_recovery
-	ldr	x0, [x19, #:lo12:.LANCHOR5]
+	ldr	x0, [x25, #:lo12:.LANCHOR5]
 	add	x0, x0, 80
 	bl	ftl_info_data_recovery
 	bl	gc_recovery
 	bl	pm_flush
 	mov	w0, 1
 	bl	ftl_total_vpn_update
-	adrp	x0, .LANCHOR157
-	ldrb	w0, [x0, #:lo12:.LANCHOR157]
-	cbz	w0, .L2294
-	ldr	x1, [x20, #:lo12:.LANCHOR53]
+	adrp	x0, .LANCHOR167
+	ldrb	w0, [x0, #:lo12:.LANCHOR167]
+	cbz	w0, .L2576
+	ldr	x1, [x19, #:lo12:.LANCHOR101]
 	ldr	w0, [x1, 68]
 	add	w0, w0, 1
 	str	w0, [x1, 68]
-.L2294:
+.L2576:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
 	bl	print_ftl_debug_info
 	mov	w0, 0
-.L2284:
+.L2555:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	ldr	x23, [sp, 48]
-	ldp	x29, x30, [sp], 64
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
 	ret
 	.size	zftl_init, .-zftl_init
 	.section	.text.rk_ftl_init,"ax",@progbits
@@ -15120,13 +16458,14 @@ rk_ftl_init:
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	bl	nand_flash_init
-	cbnz	w0, .L2306
+	cbnz	w0, .L2621
 	bl	zftl_init
-.L2306:
+.L2621:
 	mov	w19, w0
-	mov	w1, w0
-	adrp	x0, .LC116
-	add	x0, x0, :lo12:.LC116
+	bl	idb_init
+	mov	w1, w19
+	adrp	x0, .LC176
+	add	x0, x0, :lo12:.LC176
 	bl	printf
 	mov	w0, w19
 	ldr	x19, [sp, 16]
@@ -15142,138 +16481,148 @@ gc_update_l2p_map_new:
 	adrp	x0, .LANCHOR5
 	adrp	x1, .LANCHOR71
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	ldr	x22, [x0, #:lo12:.LANCHOR5]
+	stp	x19, x20, [sp, 16]
+	ldr	x20, [x0, #:lo12:.LANCHOR5]
 	stp	x25, x26, [sp, 64]
 	ldrh	w25, [x1, #:lo12:.LANCHOR71]
-	add	x1, x22, 80
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR29
+	add	x1, x20, 80
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR7
 	stp	x23, x24, [sp, 48]
 	stp	x27, x28, [sp, 80]
 	str	x1, [x29, 144]
 	ldrb	w1, [x1, 9]
 	str	x0, [x29, 128]
 	mul	w25, w25, w1
-	ldr	w1, [x20, #:lo12:.LANCHOR29]
-	tbz	x1, 8, .L2309
-	ldrh	w1, [x22, 80]
-	adrp	x0, .LC117
-	add	x0, x0, :lo12:.LC117
+	ldr	w1, [x21, #:lo12:.LANCHOR7]
+	tbz	x1, 8, .L2624
+	ldrh	w1, [x20, 80]
+	adrp	x0, .LC177
+	add	x0, x0, :lo12:.LC177
 	bl	printf
-.L2309:
-	adrp	x24, .LANCHOR4
-	ldrh	w1, [x22, 80]
+.L2624:
+	adrp	x23, .LANCHOR4
+	ldrh	w1, [x20, 80]
 	sub	w2, w25, #1
-	mov	x21, 0
-	ldr	x0, [x24, #:lo12:.LANCHOR4]
-	mov	w23, 0
+	mov	x22, 0
+	ldr	x0, [x23, #:lo12:.LANCHOR4]
+	mov	w24, 0
 	strh	w2, [x0, x1, lsl 1]
-	adrp	x0, .LANCHOR52
-	add	x0, x0, :lo12:.LANCHOR52
+	adrp	x0, .LANCHOR114
+	add	x0, x0, :lo12:.LANCHOR114
 	str	x0, [x29, 104]
-.L2310:
-	mov	w27, w21
-	cmp	w25, w21
-	bhi	.L2320
-	ldr	w0, [x20, #:lo12:.LANCHOR29]
-	tbz	x0, 8, .L2321
+.L2625:
+	mov	w27, w22
+	cmp	w25, w22
+	bhi	.L2635
+	ldr	w0, [x21, #:lo12:.LANCHOR7]
+	tbz	x0, 8, .L2636
 	ldr	x0, [x29, 128]
-	mov	w3, w23
-	ldr	x1, [x24, #:lo12:.LANCHOR4]
-	ldrh	w2, [x22, 80]
+	mov	w3, w24
+	ldr	x1, [x23, #:lo12:.LANCHOR4]
+	ldrh	w2, [x20, 80]
 	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	ldrh	w2, [x1, x2, lsl 1]
 	ldrh	w1, [x0, 80]
-	adrp	x0, .LC121
-	add	x0, x0, :lo12:.LC121
+	adrp	x0, .LC181
+	add	x0, x0, :lo12:.LC181
 	bl	printf
-.L2321:
-	ldrh	w0, [x22, 80]
-	ldr	x1, [x24, #:lo12:.LANCHOR4]
-	lsl	x0, x0, 1
-	ldrh	w2, [x1, x0]
-	cmp	w23, w2
-	beq	.L2322
-	adrp	x1, .LANCHOR182
+.L2636:
+	ldrh	w1, [x20, 80]
+	ldr	x0, [x23, #:lo12:.LANCHOR4]
+	ldrh	w0, [x0, x1, lsl 1]
+	cmp	w24, w0
+	beq	.L2637
+	adrp	x1, .LANCHOR194
 	adrp	x0, .LC0
 	mov	w2, 463
-	add	x1, x1, :lo12:.LANCHOR182
+	add	x1, x1, :lo12:.LANCHOR194
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2323:
-	b	.L2323
-.L2320:
-	adrp	x26, .LANCHOR131
-	lsl	x19, x21, 2
-	ldr	x0, [x26, #:lo12:.LANCHOR131]
+.L2637:
+	ldrh	w1, [x20, 80]
+	ldr	x0, [x23, #:lo12:.LANCHOR4]
+	strh	w24, [x0, x1, lsl 1]
+	ldrh	w0, [x20, 80]
+	bl	zftl_insert_data_list
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 176
+	ret
+.L2635:
+	adrp	x26, .LANCHOR136
+	lsl	x19, x22, 2
+	ldr	x0, [x26, #:lo12:.LANCHOR136]
 	ldr	w2, [x0, x19]
 	cmn	w2, #1
-	beq	.L2311
-	adrp	x0, .LANCHOR52
-	ldrb	w0, [x0, #:lo12:.LANCHOR52]
+	beq	.L2626
+	adrp	x0, .LANCHOR114
+	ldrb	w0, [x0, #:lo12:.LANCHOR114]
 	lsl	w0, w0, 7
 	udiv	w0, w2, w0
 	and	w0, w0, 65535
 	str	w0, [x29, 156]
-	ldr	w0, [x20, #:lo12:.LANCHOR29]
-	tbz	x0, 8, .L2312
+	ldr	w0, [x21, #:lo12:.LANCHOR7]
+	tbz	x0, 8, .L2627
 	ldr	w1, [x29, 156]
-	adrp	x0, .LC118
-	mov	w3, w21
-	add	x0, x0, :lo12:.LC118
+	adrp	x0, .LC178
+	mov	w3, w22
+	add	x0, x0, :lo12:.LC178
 	bl	printf
-.L2312:
+.L2627:
 	sub	w27, w25, w27
-	add	x27, x27, x21
+	add	x27, x27, x22
 	lsl	x0, x27, 2
 	str	x0, [x29, 136]
-	adrp	x0, .LC120
-	add	x0, x0, :lo12:.LC120
+	adrp	x0, .LC180
+	add	x0, x0, :lo12:.LC180
 	str	x0, [x29, 120]
 	adrp	x0, .LANCHOR96
 	add	x0, x0, :lo12:.LANCHOR96
 	str	x0, [x29, 112]
-.L2313:
+.L2628:
 	ldr	x0, [x29, 136]
 	cmp	x0, x19
-	bne	.L2319
-.L2311:
-	add	x21, x21, 1
-	b	.L2310
-.L2319:
-	ldr	x0, [x26, #:lo12:.LANCHOR131]
+	bne	.L2634
+.L2626:
+	add	x22, x22, 1
+	b	.L2625
+.L2634:
+	ldr	x0, [x26, #:lo12:.LANCHOR136]
 	ldr	w28, [x0, x19]
 	cmn	w28, #1
-	beq	.L2314
+	beq	.L2629
 	ldr	x0, [x29, 104]
 	ldr	w1, [x29, 156]
 	ldrb	w0, [x0]
 	lsl	w0, w0, 7
 	udiv	w0, w28, w0
 	cmp	w1, w0, uxth
-	bne	.L2314
-	adrp	x0, .LANCHOR132
-	ldr	x0, [x0, #:lo12:.LANCHOR132]
+	bne	.L2629
+	adrp	x0, .LANCHOR137
+	ldr	x0, [x0, #:lo12:.LANCHOR137]
 	ldr	w27, [x0, x19]
 	mov	w0, w28
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 172]
 	cmn	w0, #1
-	bne	.L2315
+	bne	.L2630
 	mov	w2, 0
 	add	x1, x29, 172
 	mov	w0, w28
 	bl	pm_log2phys
-.L2315:
+.L2630:
 	ldr	w3, [x29, 172]
 	cmp	w27, w3
-	bne	.L2316
-	adrp	x0, .LANCHOR133
+	bne	.L2631
+	adrp	x0, .LANCHOR138
 	mov	w2, 1
 	add	x1, x29, 168
-	add	w23, w23, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR133]
+	add	w24, w24, 1
+	ldr	x0, [x0, #:lo12:.LANCHOR138]
 	ldr	w0, [x0, x19]
 	str	w0, [x29, 168]
 	mov	w0, w28
@@ -15298,45 +16647,34 @@ gc_update_l2p_map_new:
 	ldr	w1, [x29, 152]
 	ldrh	w0, [x0]
 	cmp	w0, w1
-	bne	.L2317
-	ldr	w0, [x20, #:lo12:.LANCHOR29]
-	tbz	x0, 8, .L2317
+	bne	.L2632
+	ldr	w0, [x21, #:lo12:.LANCHOR7]
+	tbz	x0, 8, .L2632
 	ldr	w3, [x29, 172]
-	adrp	x0, .LC119
+	adrp	x0, .LC179
 	mov	w2, w27
 	mov	w1, w28
-	add	x0, x0, :lo12:.LC119
+	add	x0, x0, :lo12:.LC179
 	bl	printf
-.L2317:
-	ldr	x0, [x26, #:lo12:.LANCHOR131]
+.L2632:
+	ldr	x0, [x26, #:lo12:.LANCHOR136]
 	mov	w1, -1
 	str	w1, [x0, x19]
-.L2314:
+.L2629:
 	add	x19, x19, 4
-	b	.L2313
-.L2316:
-	ldr	w0, [x20, #:lo12:.LANCHOR29]
-	tbz	x0, 8, .L2318
+	b	.L2628
+.L2631:
+	ldr	w0, [x21, #:lo12:.LANCHOR7]
+	tbz	x0, 8, .L2633
 	ldr	x0, [x29, 120]
 	mov	w2, w27
 	mov	w1, w28
 	bl	printf
-.L2318:
+.L2633:
 	ldr	x0, [x29, 144]
 	ldrh	w0, [x0]
 	bl	ftl_vpn_decrement
-	b	.L2317
-.L2322:
-	strh	w23, [x1, x0]
-	ldrh	w0, [x22, 80]
-	bl	zftl_insert_data_list
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 176
-	ret
+	b	.L2632
 	.size	gc_update_l2p_map_new, .-gc_update_l2p_map_new
 	.section	.text.gc_scan_src_blk_one_page,"ax",@progbits
 	.align	2
@@ -15360,17 +16698,17 @@ gc_scan_src_blk_one_page:
 	adrp	x2, .LANCHOR72
 	ldrb	w4, [x2, #:lo12:.LANCHOR72]
 	ldrh	w2, [x1, 2]
-.L2347:
+.L2661:
 	cmp	w3, w7
-	beq	.L2349
-	cbz	w6, .L2350
+	beq	.L2663
+	cbz	w6, .L2664
 	add	x1, x19, :lo12:.LANCHOR63
 	strb	w0, [x1, 4]
-.L2350:
-	cbz	w5, .L2351
+.L2664:
+	cbz	w5, .L2665
 	add	x0, x19, :lo12:.LANCHOR63
 	strh	w2, [x0, 2]
-.L2351:
+.L2665:
 	adrp	x0, .LANCHOR99
 	ldrh	w22, [x0, #:lo12:.LANCHOR99]
 	adrp	x0, .LANCHOR67
@@ -15378,25 +16716,25 @@ gc_scan_src_blk_one_page:
 	ldrb	w1, [x0, #:lo12:.LANCHOR67]
 	mul	w22, w22, w3
 	cmp	w1, 2
-	bne	.L2352
+	bne	.L2666
 	add	x0, x19, :lo12:.LANCHOR63
 	ldrb	w1, [x0, 6]
-	cbnz	w1, .L2352
+	cbnz	w1, .L2666
 	ldrh	w0, [x0, 2]
 	add	w22, w22, w0, lsl 1
-.L2353:
+.L2667:
 	add	x1, x19, :lo12:.LANCHOR63
 	ldrb	w0, [x1, 4]
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x1, 4]
 	cmp	w4, w0
-	bne	.L2354
+	bne	.L2668
 	ldrh	w0, [x1, 2]
 	strb	wzr, [x1, 4]
 	add	w0, w0, 1
 	strh	w0, [x1, 2]
-.L2354:
+.L2668:
 	mov	w0, 1
 	add	x19, x19, :lo12:.LANCHOR63
 	bl	buf_alloc
@@ -15404,15 +16742,15 @@ gc_scan_src_blk_one_page:
 	mov	x21, x0
 	mov	w20, 0
 	adrp	x24, .LANCHOR64
-.L2364:
+.L2678:
 	ldrb	w0, [x19, 6]
 	cmp	w0, 3
-	bne	.L2355
-	cbz	w20, .L2356
-.L2355:
+	bne	.L2669
+	cbz	w20, .L2670
+.L2669:
 	cmp	w0, w20
-	bgt	.L2357
-.L2365:
+	bgt	.L2671
+.L2679:
 	mov	x0, x21
 	bl	buf_free
 	ldp	x19, x20, [sp, 16]
@@ -15421,33 +16759,33 @@ gc_scan_src_blk_one_page:
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2349:
+.L2663:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	cmp	w0, w4
-	bne	.L2348
+	bne	.L2662
 	add	w2, w2, 1
 	mov	w5, 1
 	and	w2, w2, 65535
 	mov	w0, 0
-.L2348:
+.L2662:
 	add	x3, x1, x0, sxtw 1
 	mov	w6, 1
 	ldrh	w3, [x3, 40]
-	b	.L2347
-.L2352:
+	b	.L2661
+.L2666:
 	add	x0, x19, :lo12:.LANCHOR63
 	ldrh	w0, [x0, 2]
 	add	w22, w0, w22
-	b	.L2353
-.L2357:
+	b	.L2667
+.L2671:
 	ldrb	w1, [x23]
 	cmp	w1, 2
-	bne	.L2358
-	cbnz	w0, .L2358
+	bne	.L2672
+	cbnz	w0, .L2672
 	add	w0, w20, w22
 	orr	w0, w0, 33554432
-.L2378:
+.L2692:
 	str	w0, [x21, 40]
 	mov	w1, 1
 	mov	x0, x21
@@ -15455,40 +16793,40 @@ gc_scan_src_blk_one_page:
 	ldr	w0, [x21, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2361
+	beq	.L2675
 	ldr	x0, [x21, 24]
 	ldr	w25, [x0, 4]
 	mov	w0, w25
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 92]
 	cmn	w0, #1
-	bne	.L2362
+	bne	.L2676
 	mov	w2, 0
 	add	x1, x29, 92
 	mov	w0, w25
 	bl	pm_log2phys
-.L2362:
+.L2676:
 	ldr	w0, [x29, 92]
 	cmp	w22, w0
-	bne	.L2361
+	bne	.L2675
 	ldrh	w0, [x19, 24]
 	ldr	x2, [x24, #:lo12:.LANCHOR64]
 	ubfiz	x1, x0, 2, 16
 	add	w0, w0, 1
 	str	w22, [x2, x1]
 	strh	w0, [x19, 24]
-.L2361:
+.L2675:
 	ldrh	w0, [x19, 26]
 	add	w0, w0, 1
 	strh	w0, [x19, 26]
-.L2356:
+.L2670:
 	add	w20, w20, 1
 	cmp	w20, 4
-	bne	.L2364
-	b	.L2365
-.L2358:
+	bne	.L2678
+	b	.L2679
+.L2672:
 	orr	w0, w22, w20, lsl 24
-	b	.L2378
+	b	.L2692
 	.size	gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page
 	.section	.text.gc_scan_static_data,"ax",@progbits
 	.align	2
@@ -15504,13 +16842,13 @@ gc_scan_static_data:
 	ldr	w1, [x0, 544]
 	str	x23, [sp, 48]
 	cmn	w1, #1
-	beq	.L2380
-	adrp	x21, .LANCHOR96
-	adrp	x22, .LANCHOR95
-	add	x21, x21, :lo12:.LANCHOR96
-	add	x22, x22, :lo12:.LANCHOR95
+	beq	.L2694
+	adrp	x21, .LANCHOR195
+	adrp	x22, .LC0
+	add	x21, x21, :lo12:.LANCHOR195
+	add	x22, x22, :lo12:.LC0
 	mov	w20, 11
-.L2389:
+.L2702:
 	ldr	x0, [x19, #:lo12:.LANCHOR5]
 	mov	w2, 0
 	add	x1, x29, 76
@@ -15518,7 +16856,7 @@ gc_scan_static_data:
 	bl	pm_log2phys
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L2381
+	beq	.L2695
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 76]
@@ -15528,39 +16866,37 @@ gc_scan_static_data:
 	bl	sblk_read_page
 	ldr	w0, [x23, 52]
 	cmp	w0, 256
-	bne	.L2382
-	ldrh	w3, [x21]
-	mov	w0, 21
+	bne	.L2696
+	adrp	x0, .LANCHOR96
 	ldr	w2, [x29, 76]
 	mov	w1, 1
+	ldrh	w3, [x0, #:lo12:.LANCHOR96]
+	mov	w0, 21
 	sub	w0, w0, w3
 	lsr	w2, w2, w3
-	ldrb	w3, [x22]
 	lsl	w0, w1, w0
 	sub	w0, w0, #1
 	and	w0, w0, w2
+	adrp	x2, .LANCHOR95
+	ldrb	w3, [x2, #:lo12:.LANCHOR95]
 	mov	w2, 0
 	udiv	w0, w0, w3
 	bl	gc_add_sblk
-.L2382:
+.L2696:
 	ldr	x0, [x19, #:lo12:.LANCHOR5]
 	ldr	x1, [x23, 24]
 	ldr	w0, [x0, 544]
 	ldr	w1, [x1, 4]
 	cmp	w1, w0
-	beq	.L2383
-	adrp	x1, .LANCHOR183
-	adrp	x0, .LC0
+	beq	.L2697
 	mov	w2, 1369
-	add	x1, x1, :lo12:.LANCHOR183
-	add	x0, x0, :lo12:.LC0
+	mov	x1, x21
+	mov	x0, x22
 	bl	printf
-.L2384:
-	b	.L2384
-.L2383:
+.L2697:
 	mov	x0, x23
 	bl	buf_free
-.L2381:
+.L2695:
 	ldr	x0, [x19, #:lo12:.LANCHOR5]
 	adrp	x2, .LANCHOR54
 	ldr	w2, [x2, #:lo12:.LANCHOR54]
@@ -15568,7 +16904,7 @@ gc_scan_static_data:
 	add	w1, w1, 1
 	str	w1, [x0, 544]
 	cmp	w1, w2
-	bcc	.L2385
+	bcc	.L2698
 	mov	w1, -1
 	str	w1, [x0, 544]
 	ldr	w1, [x0, 548]
@@ -15579,48 +16915,48 @@ gc_scan_static_data:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2379:
+.L2693:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2385:
+.L2698:
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	bne	.L2379
+	bne	.L2693
 	sub	w20, w20, #1
 	ands	w20, w20, 65535
-	bne	.L2389
-	b	.L2379
-.L2380:
-	adrp	x1, .LANCHOR53
-	ldr	x1, [x1, #:lo12:.LANCHOR53]
+	bne	.L2702
+	b	.L2693
+.L2694:
+	adrp	x1, .LANCHOR101
+	ldr	x1, [x1, #:lo12:.LANCHOR101]
 	ldr	w2, [x1, 40]
 	cmp	w2, 20480
-	bls	.L2391
+	bls	.L2704
 	ldr	w3, [x1, 44]
 	add	w3, w3, w2, lsr 10
 	and	w2, w2, 1023
 	stp	w2, w3, [x1, 40]
-.L2391:
+.L2704:
 	ldr	w2, [x0, 536]
 	ldr	w3, [x0, 12]
 	add	w2, w2, 12959744
 	add	w2, w2, 256
 	cmp	w3, w2
 	ldr	w2, [x1, 44]
-	bhi	.L2392
+	bhi	.L2705
 	ldr	w1, [x0, 540]
 	add	w1, w1, 98304
 	add	w1, w1, 1696
 	cmp	w2, w1
-	bls	.L2379
-.L2392:
+	bls	.L2693
+.L2705:
 	str	w3, [x0, 536]
 	str	w2, [x0, 540]
 	str	wzr, [x0, 544]
-	b	.L2379
+	b	.L2693
 	.size	gc_scan_static_data, .-gc_scan_static_data
 	.section	.text.ftl_sblk_dump,"ax",@progbits
 	.align	2
@@ -15631,248 +16967,249 @@ ftl_sblk_dump:
 	stp	x29, x30, [sp, 48]
 	add	x29, sp, 48
 	stp	x21, x22, [sp, 80]
-	and	w22, w0, 65535
+	and	w21, w0, 65535
 	stp	x19, x20, [sp, 64]
 	mov	w0, 65535
 	stp	x23, x24, [sp, 96]
-	cmp	w22, w0
+	cmp	w21, w0
 	stp	x25, x26, [sp, 112]
 	stp	x27, x28, [sp, 128]
-	beq	.L2419
-	uxtw	x0, w22
-	str	x0, [x29, 144]
-	lsl	x14, x0, 2
-	adrp	x0, .LANCHOR3
-	mov	x13, x0
-	ldr	x2, [x0, #:lo12:.LANCHOR3]
-	add	x2, x2, x14
-	ldrb	w2, [x2, 2]
-	and	w2, w2, 224
-	cmp	w2, 160
-	bne	.L2420
+	beq	.L2732
+	adrp	x0, .LANCHOR2
+	ldrh	w0, [x0, #:lo12:.LANCHOR2]
+	cmp	w0, w21
+	bls	.L2732
+	uxtw	x0, w21
+	adrp	x25, .LANCHOR3
+	str	x0, [x29, 136]
+	lsl	x0, x0, 2
+	str	x0, [x29, 160]
+	ldr	x0, [x25, #:lo12:.LANCHOR3]
+	ldr	x2, [x29, 160]
+	add	x0, x0, x2
+	ldrb	w0, [x0, 2]
+	and	w0, w0, 224
+	cmp	w0, 160
+	bne	.L2733
 	adrp	x0, .LANCHOR67
 	ldrb	w24, [x0, #:lo12:.LANCHOR67]
-.L2400:
+.L2713:
 	add	x28, x29, 224
-	str	x1, [x29, 160]
-	mov	w0, w22
-	strh	w22, [x28, -32]!
+	adrp	x19, .LANCHOR80
+	str	x1, [x29, 152]
+	mov	w0, w21
+	mov	w27, 0
+	mov	w20, 0
+	strh	w21, [x28, -32]!
 	add	x1, x28, 16
 	bl	ftl_get_blk_list_in_sblk
-	adrp	x2, .LANCHOR80
+	ldrh	w2, [x19, #:lo12:.LANCHOR80]
 	and	w1, w0, 255
 	strb	w1, [x29, 201]
-	ldrh	w3, [x2, #:lo12:.LANCHOR80]
-	strh	wzr, [x29, 194]
-	strb	wzr, [x29, 197]
-	strh	wzr, [x29, 202]
-	mul	w1, w1, w3
-	str	x2, [x29, 136]
-	strh	w1, [x29, 198]
-	adrp	x1, .LANCHOR29
-	str	x1, [x29, 152]
-	ldr	w3, [x1, #:lo12:.LANCHOR29]
-	tbz	x3, 12, .L2401
-	ldr	x1, [x13, #:lo12:.LANCHOR3]
 	and	w4, w0, 255
+	strb	wzr, [x29, 197]
 	mov	w3, w24
-	adrp	x0, .LC122
-	add	x1, x1, x14
-	add	x0, x0, :lo12:.LC122
+	strh	wzr, [x29, 194]
+	adrp	x0, .LC182
+	mul	w1, w1, w2
+	ldr	x2, [x29, 160]
+	strh	w1, [x29, 198]
+	add	x0, x0, :lo12:.LC182
+	ldr	x1, [x25, #:lo12:.LANCHOR3]
+	strh	wzr, [x29, 202]
+	add	x1, x1, x2
 	ldrb	w2, [x1, 2]
-	mov	w1, w22
+	mov	w1, w21
 	ubfx	x2, x2, 5, 3
 	bl	printf
-.L2401:
 	mov	w0, 1
 	bl	buf_alloc
-	mov	w26, 0
-	mov	x21, x0
-	mov	w27, 0
+	str	x19, [x29, 128]
+	mov	x26, x0
+	stp	wzr, wzr, [x29, 168]
 	adrp	x0, .LANCHOR99
-	mov	w19, 0
 	add	x0, x0, :lo12:.LANCHOR99
-	str	wzr, [x29, 172]
-	str	x0, [x29, 112]
-.L2402:
-	ldr	x0, [x29, 136]
+	str	x0, [x29, 104]
+.L2714:
+	ldr	x0, [x29, 128]
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
-	cmp	w0, w19
-	bls	.L2416
-	lsl	w0, w19, 1
+	cmp	w0, w20
+	bls	.L2729
+	lsl	w0, w20, 1
 	mov	w23, 0
 	sub	w0, w0, #1
-	str	w0, [x29, 168]
-	adrp	x0, .LC82
-	add	x0, x0, :lo12:.LC82
-	str	x0, [x29, 120]
-	b	.L2417
-.L2420:
+	str	w0, [x29, 148]
+	adrp	x0, .LC129
+	add	x0, x0, :lo12:.LC129
+	str	x0, [x29, 112]
+	b	.L2730
+.L2733:
 	mov	w24, 1
-	b	.L2400
-.L2413:
-	ldr	x0, [x29, 128]
-	ldrh	w11, [x28, x0]
+	b	.L2713
+.L2726:
+	ldr	x0, [x29, 120]
+	ldrh	w10, [x28, x0]
 	mov	w0, 65535
-	cmp	w11, w0
-	beq	.L2403
-	ldr	x0, [x29, 112]
+	cmp	w10, w0
+	beq	.L2715
+	ldr	x0, [x29, 104]
 	cmp	w24, 3
-	ldrh	w8, [x0]
-	mul	w8, w8, w11
-	bne	.L2404
-	add	w8, w19, w8
-	orr	w25, w8, w20, lsl 24
-.L2405:
-	str	w25, [x21, 40]
+	ldrh	w19, [x0]
+	mul	w19, w19, w10
+	bne	.L2716
+	add	w19, w20, w19
+	orr	w19, w19, w22, lsl 24
+.L2717:
+	str	w19, [x26, 40]
 	mov	w1, 1
-	str	w11, [x29, 100]
-	mov	x0, x21
+	str	w10, [x29, 100]
+	mov	x0, x26
 	bl	sblk_read_page
-	ldr	x1, [x21, 24]
-	mov	w3, w25
-	ldr	x0, [x21, 8]
-	ldr	w12, [x21, 52]
-	ldr	w11, [x29, 100]
+	ldr	x1, [x26, 24]
+	mov	w3, w19
+	ldr	x0, [x26, 8]
+	ldr	w11, [x26, 52]
+	ldr	w10, [x29, 100]
 	ldr	w2, [x1, 12]
-	mov	w4, w12
+	mov	w4, w11
 	str	w2, [sp, 32]
-	str	w12, [x29, 104]
+	str	w11, [x29, 144]
 	ldr	w2, [x1, 8]
 	str	w2, [sp, 24]
 	ldr	w2, [x1, 4]
 	str	w2, [sp, 16]
-	mov	w2, w19
+	mov	w2, w20
 	ldr	w1, [x1]
 	str	w1, [sp, 8]
 	ldr	w1, [x0, 12]
 	str	w1, [sp]
-	mov	w1, w11
+	mov	w1, w10
 	ldp	w5, w6, [x0]
 	ldr	w7, [x0, 8]
-	ldr	x0, [x29, 120]
+	ldr	x0, [x29, 112]
 	bl	printf
-	ldr	w12, [x29, 104]
-	ldr	w0, [x29, 172]
-	cmp	w12, 512
-	ccmn	w12, #1, 4, ne
+	ldr	w11, [x29, 144]
+	ldr	w0, [x29, 168]
+	cmp	w11, 512
+	ldr	x1, [x29, 160]
+	ccmn	w11, #1, 4, ne
 	csinc	w0, w0, wzr, ne
-	str	w0, [x29, 172]
-	ldr	x0, [x21, 24]
-	ldr	w3, [x0, 4]
-	str	w3, [x29, 104]
-	mov	w0, w3
+	str	w0, [x29, 168]
+	ldr	x0, [x25, #:lo12:.LANCHOR3]
+	add	x0, x0, x1
+	mov	w1, 32
+	ldrb	w0, [x0, 2]
+	and	w0, w0, 224
+	cmp	w0, 224
+	ccmp	w0, w1, 4, ne
+	beq	.L2715
+	ldr	x0, [x26, 24]
+	ldr	w0, [x0, 4]
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 188]
 	cmn	w0, #1
-	ldr	w3, [x29, 104]
-	bne	.L2408
+	bne	.L2720
+	ldr	x0, [x26, 24]
 	mov	w2, 0
 	add	x1, x29, 188
-	mov	w0, w3
+	ldr	w0, [x0, 4]
 	bl	pm_log2phys
-.L2408:
+.L2720:
 	ldr	w0, [x29, 188]
-	cmp	w25, w0
-	bne	.L2409
-	ldr	x0, [x21, 24]
-	add	w26, w26, 1
-	mov	w3, w26
-	mov	w1, w25
+	cmp	w19, w0
+	bne	.L2721
+	ldr	w0, [x29, 172]
+	mov	w1, w19
+	add	w0, w0, 1
+	str	w0, [x29, 172]
+	ldr	x0, [x26, 24]
+	ldr	w3, [x29, 172]
 	ldr	w2, [x0, 4]
-	adrp	x0, .LC123
-	add	x0, x0, :lo12:.LC123
+	adrp	x0, .LC183
+	add	x0, x0, :lo12:.LC183
 	bl	printf
-.L2409:
-	ldr	x0, [x29, 160]
-	cbz	x0, .L2410
-	ubfiz	x3, x27, 2, 32
-	ldr	w2, [x0, x3]
-	ldr	x0, [x21, 24]
+.L2721:
+	ldr	x0, [x29, 152]
+	cbz	x0, .L2723
+	ubfiz	x19, x27, 2, 32
+	ldr	w2, [x0, x19]
+	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	cmp	w0, w2
-	beq	.L2411
-	ldr	x0, [x29, 152]
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 12, .L2411
-	str	x3, [x29, 104]
+	beq	.L2724
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2724
+	adrp	x0, .LC184
 	mov	w1, w27
-	adrp	x0, .LC124
-	add	x0, x0, :lo12:.LC124
+	add	x0, x0, :lo12:.LC184
 	bl	printf
-	ldr	x3, [x29, 104]
-.L2411:
-	ldr	x1, [x21, 24]
-	ldr	x0, [x29, 160]
+.L2724:
+	ldr	x1, [x26, 24]
+	ldr	x0, [x29, 152]
 	ldr	w1, [x1, 4]
-	ldr	w0, [x0, x3]
+	ldr	w0, [x0, x19]
 	cmp	w1, w0
-	beq	.L2410
+	beq	.L2723
 	cmn	w0, #1
-	beq	.L2410
-	adrp	x1, .LANCHOR184
+	beq	.L2723
+	adrp	x1, .LANCHOR196
 	adrp	x0, .LC0
-	mov	w2, 1160
-	add	x1, x1, :lo12:.LANCHOR184
+	mov	w2, 1175
+	add	x1, x1, :lo12:.LANCHOR196
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2412:
-	b	.L2412
-.L2404:
-	cmp	w24, 2
-	bne	.L2406
-	ldr	w0, [x29, 168]
-	add	w8, w8, w0
-	adrp	x0, .LANCHOR67
-	add	w8, w8, w20
-	ldrb	w0, [x0, #:lo12:.LANCHOR67]
-	orr	w25, w8, w0, lsl 24
-	b	.L2405
-.L2406:
-	add	w25, w19, w8
-	b	.L2405
-.L2410:
+.L2723:
 	add	w27, w27, 1
-.L2403:
-	add	w20, w20, 1
-	and	w20, w20, 65535
-.L2415:
-	cmp	w24, w20
-	bcs	.L2413
+.L2715:
+	add	w22, w22, 1
+	and	w22, w22, 65535
+.L2728:
+	cmp	w24, w22
+	bcs	.L2726
 	add	w23, w23, 1
 	and	w23, w23, 65535
-.L2417:
+.L2730:
 	ldrb	w0, [x29, 201]
 	cmp	w0, w23
-	bls	.L2414
+	bls	.L2727
 	sxtw	x0, w23
-	mov	w20, 1
+	mov	w22, 1
 	add	x0, x0, 8
 	lsl	x0, x0, 1
-	str	x0, [x29, 128]
-	b	.L2415
-.L2414:
-	add	w19, w19, 1
-	and	w19, w19, 65535
-	b	.L2402
-.L2416:
-	mov	x0, x21
+	str	x0, [x29, 120]
+	b	.L2728
+.L2716:
+	cmp	w24, 2
+	bne	.L2718
+	ldr	w0, [x29, 148]
+	add	w19, w19, w0
+	adrp	x0, .LANCHOR67
+	add	w19, w19, w22
+	ldrb	w0, [x0, #:lo12:.LANCHOR67]
+	orr	w19, w19, w0, lsl 24
+	b	.L2717
+.L2718:
+	add	w19, w20, w19
+	b	.L2717
+.L2727:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L2714
+.L2729:
+	mov	x0, x26
 	bl	buf_free
-	ldr	x0, [x29, 152]
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 12, .L2418
 	adrp	x0, .LANCHOR4
-	ldr	x1, [x29, 144]
-	mov	w3, w26
+	ldr	x1, [x29, 136]
+	ldr	w3, [x29, 172]
 	ldr	x0, [x0, #:lo12:.LANCHOR4]
 	ldrh	w2, [x0, x1, lsl 1]
-	adrp	x0, .LC125
-	mov	w1, w22
-	add	x0, x0, :lo12:.LC125
+	mov	w1, w21
+	adrp	x0, .LC185
+	add	x0, x0, :lo12:.LC185
 	bl	printf
-.L2418:
-	ldr	w0, [x29, 172]
-.L2398:
+	ldr	w0, [x29, 168]
+.L2711:
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
 	ldp	x23, x24, [sp, 96]
@@ -15881,9 +17218,9 @@ ftl_sblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 272
 	ret
-.L2419:
+.L2732:
 	mov	w0, 0
-	b	.L2398
+	b	.L2711
 	.size	ftl_sblk_dump, .-ftl_sblk_dump
 	.section	.text.zftl_read,"ax",@progbits
 	.align	2
@@ -15894,40 +17231,40 @@ zftl_read:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	mov	w21, w0
-	adrp	x0, .LANCHOR29
+	adrp	x0, .LANCHOR7
 	stp	x23, x24, [sp, 48]
 	stp	x19, x20, [sp, 16]
 	mov	w24, w2
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
 	mov	w19, w1
 	stp	x25, x26, [sp, 64]
 	mov	x23, x3
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2440
+	tbz	x0, 12, .L2744
 	mov	w3, w2
-	adrp	x0, .LC126
+	adrp	x0, .LC186
 	mov	w2, w1
-	add	x0, x0, :lo12:.LC126
+	add	x0, x0, :lo12:.LC186
 	mov	w1, w21
 	bl	printf
-.L2440:
-	cbnz	w21, .L2441
+.L2744:
+	cbnz	w21, .L2745
 	adrp	x0, .LANCHOR59
 	mov	w21, 24576
 	ldr	w0, [x0, #:lo12:.LANCHOR59]
-.L2442:
+.L2746:
 	add	w1, w19, w24
 	cmp	w0, w1
-	bcc	.L2467
-	adrp	x1, .LANCHOR53
-	adrp	x25, .LANCHOR52
+	bcc	.L2770
+	adrp	x1, .LANCHOR101
+	adrp	x25, .LANCHOR114
 	add	w21, w21, w19
 	str	x1, [x29, 120]
-	ldr	x2, [x1, #:lo12:.LANCHOR53]
+	ldr	x2, [x1, #:lo12:.LANCHOR101]
 	ldr	w0, [x2, 24]
 	add	w0, w0, w24
 	str	w0, [x2, 24]
-	ldrb	w0, [x25, #:lo12:.LANCHOR52]
+	ldrb	w0, [x25, #:lo12:.LANCHOR114]
 	add	w2, w24, w21
 	stp	w2, wzr, [x29, 136]
 	sub	w2, w2, #1
@@ -15937,16 +17274,16 @@ zftl_read:
 	sub	w26, w0, w27
 	str	w0, [x29, 132]
 	add	w26, w26, 1
-	adrp	x0, .LC110
-	add	x0, x0, :lo12:.LC110
+	adrp	x0, .LANCHOR197
+	add	x0, x0, :lo12:.LANCHOR197
 	str	x0, [x29, 112]
-	adrp	x0, .LANCHOR43
-	add	x0, x0, :lo12:.LANCHOR43
+	adrp	x0, .LANCHOR46
+	add	x0, x0, :lo12:.LANCHOR46
 	str	x0, [x29, 104]
-.L2444:
-	cbnz	w26, .L2465
+.L2748:
+	cbnz	w26, .L2768
 	ldr	w0, [x29, 140]
-.L2439:
+.L2743:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -15954,21 +17291,21 @@ zftl_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L2441:
+.L2745:
 	cmp	w21, 3
-	bhi	.L2467
+	bhi	.L2770
 	lsl	w21, w21, 13
 	mov	w0, 8192
-	b	.L2442
-.L2465:
-	ldrb	w1, [x25, #:lo12:.LANCHOR52]
+	b	.L2746
+.L2768:
+	ldrb	w1, [x25, #:lo12:.LANCHOR114]
 	cmp	w20, w27
 	ldr	w0, [x29, 132]
 	and	w19, w1, 65535
 	ccmp	w20, w0, 4, ne
-	bne	.L2468
+	bne	.L2771
 	cmp	w20, w27
-	bne	.L2446
+	bne	.L2750
 	udiv	w22, w21, w1
 	and	w0, w24, 65535
 	msub	w1, w22, w1, w21
@@ -15977,17 +17314,17 @@ zftl_read:
 	and	w19, w19, 65535
 	cmp	w24, w19
 	csel	w19, w0, w19, cc
-.L2445:
-	adrp	x0, .LANCHOR43
-	add	x1, x0, :lo12:.LANCHOR43
+.L2749:
+	adrp	x0, .LANCHOR46
+	add	x1, x0, :lo12:.LANCHOR46
 	add	x1, x1, 2
 	mov	w0, 0
-.L2449:
+.L2753:
 	ldr	w2, [x1, 34]
 	cmp	w20, w2
-	bne	.L2447
+	bne	.L2751
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L2447
+	tbz	x2, 3, .L2751
 	ldr	x1, [x29, 104]
 	ubfiz	x0, x0, 6, 32
 	lsl	w2, w19, 9
@@ -15999,99 +17336,100 @@ zftl_read:
 	add	x23, x23, x19
 	add	x1, x1, x22
 	bl	ftl_memcpy
-.L2448:
+.L2752:
 	add	w20, w20, 1
 	sub	w26, w26, #1
-	b	.L2444
-.L2446:
+	b	.L2748
+.L2750:
 	ldr	w0, [x29, 136]
 	msub	w19, w1, w20, w0
 	and	w19, w19, 255
-.L2468:
+.L2771:
 	mov	w22, 0
-	b	.L2445
-.L2447:
+	b	.L2749
+.L2751:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 32
-	bne	.L2449
+	bne	.L2753
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 156]
 	cmn	w0, #1
-	bne	.L2450
+	bne	.L2754
 	mov	w2, 0
 	add	x1, x29, 156
 	mov	w0, w20
 	bl	pm_log2phys
-.L2450:
+.L2754:
 	ldr	w0, [x29, 156]
 	cmn	w0, #1
-	bne	.L2451
-	add	x22, x25, :lo12:.LANCHOR52
+	bne	.L2755
+	add	x22, x25, :lo12:.LANCHOR114
 	mov	w19, 0
-.L2452:
+.L2756:
 	ldrb	w0, [x22]
 	cmp	w19, w0
-	bcs	.L2448
+	bcs	.L2752
 	madd	w0, w20, w0, w19
 	cmp	w21, w0
-	bhi	.L2453
+	bhi	.L2757
 	ldr	w1, [x29, 136]
 	cmp	w1, w0
-	bls	.L2453
+	bls	.L2757
 	mov	x0, x23
 	add	x23, x23, 512
 	mov	w2, 512
 	mov	w1, 0
 	bl	ftl_memset
-.L2453:
+.L2757:
 	add	w19, w19, 1
-	b	.L2452
-.L2451:
+	b	.L2756
+.L2755:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbnz	x0, .L2455
+	cbnz	x0, .L2759
 	bl	ftl_read_ahead
-	b	.L2444
-.L2455:
+	b	.L2748
+.L2759:
 	ldr	x0, [x29, 120]
-	ldr	x1, [x0, #:lo12:.LANCHOR53]
+	ldr	x1, [x0, #:lo12:.LANCHOR101]
 	ldr	w0, [x1, 40]
 	add	w0, w0, 1
 	str	w0, [x1, 40]
 	ldr	w0, [x29, 156]
 	stp	w0, w0, [x28, 40]
-	ldrb	w0, [x25, #:lo12:.LANCHOR52]
+	ldrb	w0, [x25, #:lo12:.LANCHOR114]
 	cmp	w0, w19
-	bne	.L2457
+	bne	.L2761
 	str	x23, [x28, 16]
-.L2457:
+.L2761:
 	mov	w1, 1
 	mov	x0, x28
 	bl	sblk_read_page
 	ldr	w10, [x28, 52]
 	cmn	w10, #1
-	bne	.L2458
+	bne	.L2762
 	adrp	x0, .LANCHOR5
 	str	w10, [x29, 140]
 	ldr	x1, [x0, #:lo12:.LANCHOR5]
 	ldr	w0, [x1, 552]
 	add	w0, w0, 1
 	str	w0, [x1, 552]
-.L2459:
+.L2763:
 	ldr	x0, [x28, 24]
 	ldr	w5, [x0, 4]
 	cmp	w20, w5
-	beq	.L2460
+	beq	.L2764
 	ldr	w4, [x0]
 	mov	w2, w20
 	ldp	w6, w7, [x0, 8]
 	str	w10, [x29, 128]
 	ldrb	w1, [x28, 1]
+	adrp	x0, .LC159
 	ldr	w3, [x29, 156]
-	ldr	x0, [x29, 112]
+	add	x0, x0, :lo12:.LC159
 	bl	printf
 	adrp	x0, .LANCHOR96
 	ldr	w1, [x29, 156]
@@ -16109,25 +17447,37 @@ zftl_read:
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
 	ldr	w10, [x29, 128]
-.L2460:
+.L2764:
 	ldr	x0, [x28, 24]
 	ldr	w0, [x0, 4]
 	cmp	w20, w0
-	bne	.L2461
+	bne	.L2765
 	cmn	w10, #1
-	bne	.L2462
-.L2461:
-	adrp	x1, .LANCHOR185
+	bne	.L2766
+.L2765:
+	ldr	x1, [x29, 112]
 	adrp	x0, .LC0
-	mov	w2, 976
-	add	x1, x1, :lo12:.LANCHOR185
+	mov	w2, 1030
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2463:
-	b	.L2463
-.L2458:
+.L2766:
+	ldr	x0, [x28, 16]
+	cbnz	x0, .L2767
+	ldr	x1, [x28, 8]
+	ubfiz	x22, x22, 9, 16
+	lsl	w2, w19, 9
+	mov	x0, x23
+	add	x1, x1, x22
+	bl	ftl_memcpy
+.L2767:
+	ubfiz	x19, x19, 9, 16
+	mov	x0, x28
+	add	x23, x23, x19
+	bl	buf_free
+	b	.L2752
+.L2762:
 	cmp	w10, 256
-	bne	.L2459
+	bne	.L2763
 	adrp	x0, .LANCHOR96
 	mov	w4, 21
 	mov	w5, 1
@@ -16143,37 +17493,22 @@ zftl_read:
 	adrp	x0, .LANCHOR95
 	ldrb	w0, [x0, #:lo12:.LANCHOR95]
 	udiv	w4, w4, w0
-	adrp	x0, .LC127
-	add	x0, x0, :lo12:.LC127
+	adrp	x0, .LC187
+	add	x0, x0, :lo12:.LC187
 	and	w1, w4, 65535
 	str	w4, [x29, 128]
 	bl	printf
-	ldr	w5, [x29, 100]
-	mov	w2, 0
-	ldr	w4, [x29, 128]
-	mov	w1, w5
-	mov	w0, w4
-	bl	gc_add_sblk
-	ldr	w10, [x29, 96]
-	b	.L2459
-.L2462:
-	ldr	x0, [x28, 16]
-	cbnz	x0, .L2464
-	ldr	x1, [x28, 8]
-	ubfiz	x22, x22, 9, 16
-	lsl	w2, w19, 9
-	mov	x0, x23
-	add	x1, x1, x22
-	bl	ftl_memcpy
-.L2464:
-	ubfiz	x19, x19, 9, 16
-	mov	x0, x28
-	add	x23, x23, x19
-	bl	buf_free
-	b	.L2448
-.L2467:
+	ldr	w5, [x29, 100]
+	mov	w2, 0
+	ldr	w4, [x29, 128]
+	mov	w1, w5
+	mov	w0, w4
+	bl	gc_add_sblk
+	ldr	w10, [x29, 96]
+	b	.L2763
+.L2770:
 	mov	w0, -1
-	b	.L2439
+	b	.L2743
 	.size	zftl_read, .-zftl_read
 	.section	.text.zftl_vendor_read,"ax",@progbits
 	.align	2
@@ -16245,81 +17580,81 @@ ftl_read:
 vpn_check:
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR5
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR54
+	adrp	x21, .LANCHOR5
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR4
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR4
+	adrp	x23, .LANCHOR54
 	stp	x25, x26, [sp, 64]
-	adrp	x22, .LANCHOR2
+	adrp	x24, .LANCHOR2
 	stp	x27, x28, [sp, 80]
 	bl	dump_ftl_info
-	ldr	x0, [x20, #:lo12:.LANCHOR5]
-	add	x21, x21, :lo12:.LANCHOR54
-	add	x23, x22, :lo12:.LANCHOR2
-	mov	w25, 0
-	adrp	x19, check_vpc_tbl
+	ldr	x0, [x21, #:lo12:.LANCHOR5]
+	add	x23, x23, :lo12:.LANCHOR54
+	add	x25, x24, :lo12:.LANCHOR2
+	mov	w22, 0
+	adrp	x20, check_vpc_tbl
 	ldrh	w3, [x0, 80]
 	ldrh	w2, [x0, 48]
 	ldrh	w1, [x0, 16]
-	adrp	x0, .LC128
-	add	x0, x0, :lo12:.LC128
+	adrp	x0, .LC188
+	add	x0, x0, :lo12:.LC188
 	bl	printf
-	ldr	x0, [x20, #:lo12:.LANCHOR5]
-	ldr	x3, [x24, #:lo12:.LANCHOR4]
+	ldr	x0, [x21, #:lo12:.LANCHOR5]
+	ldr	x3, [x19, #:lo12:.LANCHOR4]
 	ldrh	w1, [x0, 16]
 	ldrh	w2, [x0, 22]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w3, [x3, x0]
-	adrp	x0, .LC129
-	add	x0, x0, :lo12:.LC129
+	adrp	x0, .LC189
+	add	x0, x0, :lo12:.LC189
 	sub	w4, w3, w2
 	bl	printf
-	ldr	x0, [x20, #:lo12:.LANCHOR5]
-	ldr	x3, [x24, #:lo12:.LANCHOR4]
+	ldr	x0, [x21, #:lo12:.LANCHOR5]
+	ldr	x3, [x19, #:lo12:.LANCHOR4]
 	ldrh	w1, [x0, 48]
 	ldrh	w2, [x0, 54]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w3, [x3, x0]
-	adrp	x0, .LC130
-	add	x0, x0, :lo12:.LC130
+	adrp	x0, .LC190
+	add	x0, x0, :lo12:.LC190
 	sub	w4, w3, w2
 	bl	printf
 	mov	w2, 4608
 	mov	w1, 0
-	add	x0, x19, :lo12:check_vpc_tbl
+	add	x0, x20, :lo12:check_vpc_tbl
 	bl	ftl_memset
-.L2484:
-	ldr	w0, [x21]
-	cmp	w25, w0
-	bcc	.L2492
+.L2787:
+	ldr	w0, [x23]
+	cmp	w22, w0
+	bcc	.L2795
 	adrp	x0, .LANCHOR2
-	adrp	x23, .LC133
-	add	x28, x0, :lo12:.LANCHOR2
-	mov	x5, x0
-	add	x23, x23, :lo12:.LC133
+	adrp	x24, .LC193
+	add	x5, x0, :lo12:.LANCHOR2
+	mov	x28, x0
+	add	x24, x24, :lo12:.LC193
+	mov	w23, 0
 	mov	w22, 0
+.L2796:
+	ldrh	w0, [x5]
+	cmp	w0, w22
+	bhi	.L2798
+	adrp	x24, .LANCHOR198
+	adrp	x25, .LC0
+	add	x22, x28, :lo12:.LANCHOR2
+	add	x24, x24, :lo12:.LANCHOR198
+	add	x25, x25, :lo12:.LC0
 	mov	w21, 0
-.L2493:
-	ldrh	w0, [x28]
+.L2799:
+	ldrh	w0, [x22]
 	cmp	w0, w21
-	bhi	.L2495
-	adrp	x20, .LC134
-	add	x26, x5, :lo12:.LANCHOR2
-	add	x19, x19, :lo12:check_vpc_tbl
-	add	x20, x20, :lo12:.LC134
-	mov	w28, 0
-	adrp	x27, .LANCHOR3
-.L2496:
-	ldrh	w1, [x26]
-	cmp	w1, w28
-	bhi	.L2501
-	mov	w2, w22
-	adrp	x1, .LANCHOR186
-	adrp	x0, .LC135
-	add	x1, x1, :lo12:.LANCHOR186
-	add	x0, x0, :lo12:.LC135
+	bhi	.L2805
+	mov	w2, w23
+	adrp	x1, .LANCHOR198
+	adrp	x0, .LC195
+	add	x1, x1, :lo12:.LANCHOR198
+	add	x0, x0, :lo12:.LC195
 	bl	printf
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -16328,20 +17663,20 @@ vpn_check:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2492:
-	mov	w0, w25
+.L2795:
+	mov	w0, w22
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 124]
 	cmn	w0, #1
-	bne	.L2485
+	bne	.L2788
 	mov	w2, 0
 	add	x1, x29, 124
-	mov	w0, w25
+	mov	w0, w22
 	bl	pm_log2phys
-.L2486:
+.L2789:
 	ldr	w2, [x29, 124]
 	cmn	w2, #1
-	beq	.L2488
+	beq	.L2791
 	adrp	x0, .LANCHOR96
 	mov	w3, 21
 	ldrh	w0, [x0, #:lo12:.LANCHOR96]
@@ -16354,29 +17689,30 @@ vpn_check:
 	adrp	x0, .LANCHOR95
 	ldrb	w0, [x0, #:lo12:.LANCHOR95]
 	udiv	w3, w3, w0
-	ldrh	w0, [x22, #:lo12:.LANCHOR2]
+	ldrh	w0, [x24, #:lo12:.LANCHOR2]
 	and	w26, w3, 65535
 	and	w3, w3, 65535
 	cmp	w0, w26
-	bls	.L2489
-	add	x0, x19, :lo12:check_vpc_tbl
+	bls	.L2792
+	add	x0, x20, :lo12:check_vpc_tbl
 	sxtw	x3, w3
 	ldrh	w1, [x0, x3, lsl 1]
 	add	w1, w1, 1
 	strh	w1, [x0, x3, lsl 1]
-.L2490:
-	ldrh	w0, [x23]
+.L2793:
+	ldrh	w0, [x25]
 	cmp	w0, w26
-	bhi	.L2488
-	adrp	x1, .LANCHOR186
+	bhi	.L2791
+	adrp	x1, .LANCHOR198
 	adrp	x0, .LC0
-	mov	w2, 1206
-	add	x1, x1, :lo12:.LANCHOR186
+	mov	w2, 1266
+	add	x1, x1, :lo12:.LANCHOR198
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2491:
-	b	.L2491
-.L2485:
+.L2791:
+	add	w22, w22, 1
+	b	.L2787
+.L2788:
 	adrp	x1, .LANCHOR96
 	ldrh	w3, [x1, #:lo12:.LANCHOR96]
 	mov	w1, 21
@@ -16389,115 +17725,111 @@ vpn_check:
 	adrp	x1, .LANCHOR95
 	ldrb	w1, [x1, #:lo12:.LANCHOR95]
 	udiv	w0, w0, w1
-	ldrh	w1, [x22, #:lo12:.LANCHOR2]
+	ldrh	w1, [x24, #:lo12:.LANCHOR2]
 	cmp	w1, w0, uxth
-	bhi	.L2486
-	adrp	x1, .LANCHOR186
+	bhi	.L2789
+	mov	w2, 1256
+	adrp	x1, .LANCHOR198
 	adrp	x0, .LC0
-	mov	w2, 1196
-	add	x1, x1, :lo12:.LANCHOR186
+	add	x1, x1, :lo12:.LANCHOR198
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2487:
-	b	.L2487
-.L2489:
-	mov	w1, w25
-	adrp	x0, .LC131
-	add	x0, x0, :lo12:.LC131
+	b	.L2789
+.L2792:
+	mov	w1, w22
+	adrp	x0, .LC191
+	add	x0, x0, :lo12:.LC191
 	bl	printf
-	adrp	x0, .LANCHOR52
+	adrp	x0, .LANCHOR114
 	mov	w2, 4
-	ldrb	w3, [x0, #:lo12:.LANCHOR52]
-	adrp	x0, .LANCHOR117+8
-	ldr	x1, [x0, #:lo12:.LANCHOR117+8]
-	adrp	x0, .LC132
+	ldrb	w3, [x0, #:lo12:.LANCHOR114]
+	adrp	x0, .LANCHOR120+8
+	ldr	x1, [x0, #:lo12:.LANCHOR120+8]
+	adrp	x0, .LC192
 	lsl	w3, w3, 7
-	add	x0, x0, :lo12:.LC132
+	add	x0, x0, :lo12:.LC192
 	bl	rknand_print_hex
-	b	.L2490
-.L2488:
-	add	w25, w25, 1
-	b	.L2484
-.L2495:
-	uxtw	x0, w21
-	ldr	x1, [x24, #:lo12:.LANCHOR4]
+	b	.L2793
+.L2798:
+	uxtw	x0, w22
+	ldr	x1, [x19, #:lo12:.LANCHOR4]
 	lsl	x27, x0, 1
-	add	x25, x19, :lo12:check_vpc_tbl
-	sxtw	x26, w21
+	add	x25, x20, :lo12:check_vpc_tbl
+	sxtw	x26, w22
 	ldrh	w3, [x1, x27]
 	ldrh	w2, [x25, x26, lsl 1]
 	cmp	w3, w2
-	beq	.L2494
+	beq	.L2797
 	adrp	x1, .LANCHOR3
 	str	x5, [x29, 104]
 	ldr	x1, [x1, #:lo12:.LANCHOR3]
 	add	x0, x1, x0, lsl 2
-	mov	w1, w21
+	mov	w1, w22
 	ldrb	w4, [x0, 2]
-	mov	x0, x23
+	mov	x0, x24
 	ubfx	x4, x4, 5, 3
 	bl	printf
-	ldr	x0, [x24, #:lo12:.LANCHOR4]
+	ldr	x0, [x19, #:lo12:.LANCHOR4]
 	mov	w1, 65535
 	ldr	x5, [x29, 104]
 	ldrh	w0, [x0, x27]
 	cmp	w0, w1
-	beq	.L2494
+	beq	.L2797
 	ldrh	w1, [x25, x26, lsl 1]
 	cmp	w1, w0
-	bls	.L2494
-	ldr	x0, [x20, #:lo12:.LANCHOR5]
+	bls	.L2797
+	ldr	x0, [x21, #:lo12:.LANCHOR5]
 	ldrh	w1, [x0, 16]
-	cmp	w1, w21
-	beq	.L2494
+	cmp	w1, w22
+	beq	.L2797
 	ldrh	w1, [x0, 80]
-	cmp	w1, w21
-	beq	.L2494
+	cmp	w1, w22
+	beq	.L2797
 	ldrh	w0, [x0, 48]
-	cmp	w0, w21
-	csinc	w22, w22, wzr, eq
-.L2494:
-	add	w21, w21, 1
-	and	w21, w21, 65535
-	b	.L2493
-.L2501:
-	ldr	x0, [x27, #:lo12:.LANCHOR3]
-	uxtw	x21, w28
-	add	x0, x0, x21, lsl 2
-	ldrb	w1, [x0, 2]
-	tst	w1, 224
-	bne	.L2497
-	sxtw	x23, w28
-	ldrh	w1, [x19, x23, lsl 1]
-	cbnz	w1, .L2498
-	ldr	x1, [x24, #:lo12:.LANCHOR4]
-	lsl	x25, x21, 1
-	ldrh	w1, [x1, x25]
-	cbz	w1, .L2499
-	mov	w1, w28
-	mov	x0, x20
+	cmp	w0, w22
+	csinc	w23, w23, wzr, eq
+.L2797:
+	add	w0, w22, 1
+	and	w22, w0, 65535
+	b	.L2796
+.L2805:
+	adrp	x0, .LANCHOR3
+	uxtw	x26, w21
+	ldr	x0, [x0, #:lo12:.LANCHOR3]
+	add	x0, x0, x26, lsl 2
+	ldrb	w0, [x0, 2]
+	tst	w0, 224
+	bne	.L2801
+	add	x0, x20, :lo12:check_vpc_tbl
+	sxtw	x27, w21
+	ldrh	w0, [x0, x27, lsl 1]
+	cbnz	w0, .L2802
+	ldr	x0, [x19, #:lo12:.LANCHOR4]
+	lsl	x28, x26, 1
+	ldrh	w0, [x0, x28]
+	cbz	w0, .L2803
+	adrp	x0, .LC194
+	mov	w1, w21
+	add	x0, x0, :lo12:.LC194
 	bl	printf
-.L2499:
-	ldr	x1, [x24, #:lo12:.LANCHOR4]
-	strh	wzr, [x1, x25]
-.L2498:
-	ldr	x1, [x24, #:lo12:.LANCHOR4]
-	ldrh	w1, [x1, x21, lsl 1]
-	cbz	w1, .L2497
-	ldrh	w1, [x19, x23, lsl 1]
-	cbz	w1, .L2497
-	adrp	x1, .LANCHOR186
-	adrp	x0, .LC0
-	mov	w2, 1238
-	add	x1, x1, :lo12:.LANCHOR186
-	add	x0, x0, :lo12:.LC0
+.L2803:
+	ldr	x0, [x19, #:lo12:.LANCHOR4]
+	strh	wzr, [x0, x28]
+.L2802:
+	ldr	x0, [x19, #:lo12:.LANCHOR4]
+	ldrh	w0, [x0, x26, lsl 1]
+	cbz	w0, .L2801
+	add	x0, x20, :lo12:check_vpc_tbl
+	ldrh	w0, [x0, x27, lsl 1]
+	cbz	w0, .L2801
+	mov	w2, 1298
+	mov	x1, x24
+	mov	x0, x25
 	bl	printf
-.L2500:
-	b	.L2500
-.L2497:
-	add	w1, w28, 1
-	and	w28, w1, 65535
-	b	.L2496
+.L2801:
+	add	w21, w21, 1
+	and	w21, w21, 65535
+	b	.L2799
 	.size	vpn_check, .-vpn_check
 	.section	.text.gc_scan_src_blk,"ax",@progbits
 	.align	2
@@ -16514,198 +17846,208 @@ gc_scan_src_blk:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w1, w0
-	bne	.L2516
-	adrp	x1, .LANCHOR187
+	bne	.L2817
+	adrp	x1, .LANCHOR199
 	adrp	x0, .LC0
 	mov	w2, 897
-	add	x1, x1, :lo12:.LANCHOR187
+	add	x1, x1, :lo12:.LANCHOR199
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2517:
-	b	.L2517
-.L2516:
-	adrp	x0, .LANCHOR29
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 8, .L2518
+.L2817:
+	ldrh	w1, [x19, #:lo12:.LANCHOR63]
+	mov	w0, 65535
+	cmp	w1, w0
+	beq	.L2839
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 8, .L2819
 	adrp	x2, .LANCHOR4
 	ubfiz	x0, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR4]
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC136
-	add	x0, x0, :lo12:.LC136
+	adrp	x0, .LC196
+	add	x0, x0, :lo12:.LC196
 	bl	printf
-.L2518:
+.L2819:
 	ldrh	w0, [x19, #:lo12:.LANCHOR63]
-	add	x13, x19, :lo12:.LANCHOR63
-	add	x1, x13, 40
+	add	x14, x19, :lo12:.LANCHOR63
+	add	x1, x14, 40
 	bl	ftl_get_blk_list_in_sblk
 	and	w1, w0, 255
-	strb	w1, [x13, 5]
-	cbnz	w1, .L2519
+	strb	w1, [x14, 5]
+	cbnz	w1, .L2820
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR63]
-.L2555:
+.L2839:
 	mov	w0, 0
-.L2515:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 96
-	ret
-.L2519:
-	adrp	x1, .LANCHOR3
+	b	.L2816
+.L2820:
+	adrp	x4, .LANCHOR3
 	ldrh	w3, [x19, #:lo12:.LANCHOR63]
-	ldr	x1, [x1, #:lo12:.LANCHOR3]
+	mov	x22, x4
+	ldr	x1, [x4, #:lo12:.LANCHOR3]
 	mov	x2, x3
 	add	x1, x1, x3, lsl 2
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 32
-	beq	.L2521
+	beq	.L2821
 	cmp	w1, 224
-	beq	.L2521
-	cbz	w1, .L2522
-	adrp	x3, .LANCHOR5
-	ldr	x3, [x3, #:lo12:.LANCHOR5]
-	ldrh	w4, [x3, 16]
-	cmp	w4, w2
-	beq	.L2521
-	ldrh	w4, [x3, 48]
-	cmp	w4, w2
-	beq	.L2521
-	ldrh	w3, [x3, 80]
+	beq	.L2821
+	cbz	w1, .L2822
+	adrp	x1, .LANCHOR5
+	ldr	x1, [x1, #:lo12:.LANCHOR5]
+	ldrh	w3, [x1, 16]
 	cmp	w3, w2
-	bne	.L2553
-.L2521:
+	beq	.L2821
+	ldrh	w3, [x1, 48]
+	cmp	w3, w2
+	beq	.L2821
+	ldrh	w1, [x1, 80]
+	cmp	w1, w2
+	bne	.L2853
+.L2821:
 	add	x0, x19, :lo12:.LANCHOR63
 	mov	w1, -1
 	strh	w1, [x19, #:lo12:.LANCHOR63]
 	strh	wzr, [x0, 24]
-	b	.L2555
-.L2522:
+	b	.L2839
+.L2822:
 	adrp	x0, .LANCHOR4
-	ldr	x0, [x0, #:lo12:.LANCHOR4]
-	ldrh	w0, [x0, x3, lsl 1]
-	cbz	w0, .L2521
-	adrp	x1, .LANCHOR187
+	mov	x20, x0
+	ldr	x1, [x0, #:lo12:.LANCHOR4]
+	ldrh	w1, [x1, x3, lsl 1]
+	cbz	w1, .L2824
+	adrp	x1, .LANCHOR199
 	adrp	x0, .LC0
 	mov	w2, 917
-	add	x1, x1, :lo12:.LANCHOR187
+	add	x1, x1, :lo12:.LANCHOR199
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2524:
-	b	.L2524
-.L2553:
+.L2824:
+	ldrh	w1, [x19, #:lo12:.LANCHOR63]
+	ldr	x0, [x20, #:lo12:.LANCHOR4]
+	strh	wzr, [x0, x1, lsl 1]
+	b	.L2821
+.L2853:
 	and	w0, w0, 255
 	sub	w0, w0, #1
-	add	x0, x13, x0, sxtw 1
-	ldrh	w3, [x0, 40]
+	add	x0, x14, x0, sxtw 1
+	ldrh	w21, [x0, 40]
 	mov	w0, 65535
-	cmp	w3, w0
-	bne	.L2525
-	adrp	x1, .LANCHOR187
+	cmp	w21, w0
+	bne	.L2825
+	adrp	x1, .LANCHOR199
 	adrp	x0, .LC0
 	mov	w2, 925
-	add	x1, x1, :lo12:.LANCHOR187
+	add	x1, x1, :lo12:.LANCHOR199
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2526:
-	b	.L2526
-.L2525:
-	adrp	x4, .LANCHOR99
+.L2825:
+	adrp	x1, .LANCHOR99
+	ldr	x3, [x22, #:lo12:.LANCHOR3]
 	adrp	x2, .LANCHOR80
-	cmp	w1, 160
+	adrp	x23, .LANCHOR71
+	ldrh	w20, [x1, #:lo12:.LANCHOR99]
 	mov	x24, x2
-	ldrh	w20, [x4, #:lo12:.LANCHOR99]
-	adrp	x21, .LANCHOR71
+	ldrh	w1, [x19, #:lo12:.LANCHOR63]
 	ldrh	w0, [x2, #:lo12:.LANCHOR80]
+	add	x1, x3, x1, lsl 2
 	sub	w0, w0, #1
 	and	w0, w0, 65535
-	mul	w20, w20, w3
-	bne	.L2540
+	mul	w20, w20, w21
+	ldrb	w1, [x1, 2]
+	and	w1, w1, 224
+	cmp	w1, 160
+	bne	.L2840
 	adrp	x1, .LANCHOR67
-	ldrb	w1, [x1, #:lo12:.LANCHOR67]
-	and	w22, w1, 65535
-	cmp	w1, 2
-	orr	w20, w20, w1, lsl 24
-	bne	.L2527
-	ldrh	w0, [x21, #:lo12:.LANCHOR71]
-	mov	w22, 2
-	sub	w0, w0, #1
-	and	w0, w0, 65535
-.L2527:
-	add	x23, x19, :lo12:.LANCHOR63
+	ldrb	w21, [x1, #:lo12:.LANCHOR67]
+	cmp	w21, 2
+	orr	w20, w20, w21, lsl 24
+	beq	.L2827
+	and	w21, w21, 65535
+.L2826:
+	add	x22, x19, :lo12:.LANCHOR63
 	orr	w20, w0, w20
 	mov	w0, 1
-	strb	w22, [x23, 6]
-	strh	wzr, [x23, 2]
-	strb	wzr, [x23, 4]
-	strh	wzr, [x23, 26]
+	strb	w21, [x22, 6]
+	strh	wzr, [x22, 2]
+	strb	wzr, [x22, 4]
+	strh	wzr, [x22, 26]
 	bl	buf_alloc
 	str	w20, [x0, 40]
-	adrp	x20, .LANCHOR72
 	mov	x25, x0
 	mov	w1, 1
+	adrp	x20, .LANCHOR64
 	bl	sblk_read_page
-	ldrh	w2, [x21, #:lo12:.LANCHOR71]
-	adrp	x21, .LANCHOR64
-	ldrb	w0, [x20, #:lo12:.LANCHOR72]
+	ldrh	w2, [x23, #:lo12:.LANCHOR71]
+	adrp	x23, .LANCHOR72
 	mov	w1, 255
+	ldrb	w0, [x23, #:lo12:.LANCHOR72]
 	mul	w2, w2, w0
-	ldr	x0, [x21, #:lo12:.LANCHOR64]
+	ldr	x0, [x20, #:lo12:.LANCHOR64]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	strh	wzr, [x23, 24]
+	strh	wzr, [x22, 24]
 	ldr	w0, [x25, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L2528
-.L2530:
+	bne	.L2828
+.L2830:
 	mov	x0, x25
 	bl	buf_free
 	mov	w0, -1
-	b	.L2515
-.L2540:
-	mov	w22, 1
-	b	.L2527
-.L2528:
+.L2816:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	ret
+.L2827:
+	ldrh	w0, [x23, #:lo12:.LANCHOR71]
+	sub	w0, w0, #1
+	and	w0, w0, 65535
+	b	.L2826
+.L2840:
+	mov	w21, 1
+	b	.L2826
+.L2828:
 	ldr	x0, [x25, 24]
-	mov	w23, 15555
-	movk	w23, 0xf55f, lsl 16
+	mov	w22, 15555
+	movk	w22, 0xf55f, lsl 16
 	ldr	w0, [x0]
-	cmp	w0, w23
-	beq	.L2529
+	cmp	w0, w22
+	beq	.L2829
 	ldrh	w0, [x19, #:lo12:.LANCHOR63]
 	mov	x1, 0
 	bl	ftl_sblk_dump
 	ldr	x0, [x25, 24]
 	ldr	w0, [x0]
-	cmp	w0, w23
-	beq	.L2530
-	adrp	x1, .LANCHOR187
-	adrp	x0, .LC0
+	cmp	w0, w22
+	beq	.L2830
 	mov	w2, 955
-	add	x1, x1, :lo12:.LANCHOR187
+	adrp	x1, .LANCHOR199
+	adrp	x0, .LC0
+	add	x1, x1, :lo12:.LANCHOR199
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2531:
-	b	.L2531
-.L2529:
-	ldrh	w0, [x24, #:lo12:.LANCHOR80]
+	b	.L2830
+.L2829:
+	ldrb	w0, [x23, #:lo12:.LANCHOR72]
+	adrp	x22, .LANCHOR96
+	ldrh	w1, [x24, #:lo12:.LANCHOR80]
 	adrp	x23, .LANCHOR95
-	ldrb	w20, [x20, #:lo12:.LANCHOR72]
-	add	x23, x23, :lo12:.LANCHOR95
 	ldr	x24, [x25, 8]
-	mov	x26, 0
-	mul	w20, w20, w0
-	mul	w20, w22, w20
-	adrp	x22, .LANCHOR96
 	add	x22, x22, :lo12:.LANCHOR96
-	and	w20, w20, 65535
-.L2532:
-	cmp	w20, w26
-	bgt	.L2537
+	add	x23, x23, :lo12:.LANCHOR95
+	mov	x26, 0
+	mul	w0, w0, w1
+	mul	w21, w21, w0
+	and	w21, w21, 65535
+.L2831:
+	cmp	w21, w26
+	bgt	.L2836
 	mov	x0, x25
 	bl	buf_free
 	ldrh	w1, [x19, #:lo12:.LANCHOR63]
@@ -16716,20 +18058,20 @@ gc_scan_src_blk:
 	ldrh	w2, [x3, x2]
 	ldrh	w3, [x0, 24]
 	cmp	w2, w3
-	beq	.L2538
-	adrp	x0, .LC137
-	add	x0, x0, :lo12:.LC137
+	beq	.L2837
+	adrp	x0, .LC197
+	add	x0, x0, :lo12:.LC197
 	bl	printf
-.L2538:
+.L2837:
 	ldrh	w2, [x19, #:lo12:.LANCHOR63]
 	add	x0, x19, :lo12:.LANCHOR63
 	ldr	x1, [x20, #:lo12:.LANCHOR4]
 	ldrh	w0, [x0, 24]
 	ldrh	w1, [x1, x2, lsl 1]
 	cmp	w1, w0
-	bcs	.L2539
+	bcs	.L2838
 	bl	vpn_check
-.L2539:
+.L2838:
 	add	x0, x19, :lo12:.LANCHOR63
 	ldrh	w2, [x19, #:lo12:.LANCHOR63]
 	ldr	x1, [x20, #:lo12:.LANCHOR4]
@@ -16737,20 +18079,20 @@ gc_scan_src_blk:
 	strh	w3, [x1, x2, lsl 1]
 	strh	wzr, [x0, 28]
 	ldrh	w0, [x0, 24]
-	b	.L2515
-.L2537:
+	b	.L2816
+.L2836:
 	ldr	w0, [x24, x26, lsl 2]
 	cmn	w0, #1
-	beq	.L2534
+	beq	.L2833
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 92]
 	cmn	w0, #1
-	bne	.L2535
+	bne	.L2834
 	ldr	w0, [x24, x26, lsl 2]
 	mov	w2, 0
 	add	x1, x29, 92
 	bl	pm_log2phys
-.L2535:
+.L2834:
 	ldrh	w1, [x22]
 	mov	w0, 21
 	ldr	w3, [x29, 92]
@@ -16765,16 +18107,16 @@ gc_scan_src_blk:
 	udiv	w0, w0, w1
 	add	x1, x19, :lo12:.LANCHOR63
 	cmp	w0, w2
-	bne	.L2534
+	bne	.L2833
 	ldrh	w0, [x1, 24]
-	ldr	x4, [x21, #:lo12:.LANCHOR64]
+	ldr	x4, [x20, #:lo12:.LANCHOR64]
 	ubfiz	x2, x0, 2, 16
 	add	w0, w0, 1
 	str	w3, [x4, x2]
 	strh	w0, [x1, 24]
-.L2534:
+.L2833:
 	add	x26, x26, 1
-	b	.L2532
+	b	.L2831
 	.size	gc_scan_src_blk, .-gc_scan_src_blk
 	.section	.text.ftl_scan_all_data,"ax",@progbits
 	.align	2
@@ -16792,20 +18134,20 @@ ftl_scan_all_data:
 	stp	x27, x28, [sp, 96]
 	add	x28, x23, :lo12:.LANCHOR54
 	stp	x21, x22, [sp, 48]
-	adrp	x24, .LC140
+	adrp	x24, .LC200
 	stp	x25, x26, [sp, 80]
 	bl	buf_alloc
 	mov	w1, 0
 	mov	x19, x0
-	adrp	x0, .LC138
-	add	x0, x0, :lo12:.LC138
+	adrp	x0, .LC198
+	add	x0, x0, :lo12:.LC198
 	bl	printf
-	add	x0, x24, :lo12:.LC140
+	add	x0, x24, :lo12:.LC200
 	str	x0, [x29, 120]
-.L2557:
+.L2856:
 	ldr	w0, [x23, #:lo12:.LANCHOR54]
 	cmp	w20, w0
-	bcc	.L2570
+	bcc	.L2869
 	mov	x0, x19
 	bl	buf_free
 	ldp	x29, x30, [sp, 16]
@@ -16816,35 +18158,35 @@ ftl_scan_all_data:
 	ldp	x27, x28, [sp, 96]
 	add	sp, sp, 160
 	ret
-.L2570:
+.L2869:
 	mov	w0, -1
 	str	w0, [x19, 36]
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 140]
 	cmn	w0, #1
-	bne	.L2558
+	bne	.L2857
 	mov	w2, 0
 	add	x1, x29, 140
 	mov	w0, w20
 	bl	pm_log2phys
-.L2558:
+.L2857:
 	tst	x20, 4095
-	bne	.L2559
+	bne	.L2858
 	ldr	w2, [x29, 140]
-	adrp	x0, .LC139
+	adrp	x0, .LC199
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC139
+	add	x0, x0, :lo12:.LC199
 	bl	printf
-.L2559:
+.L2858:
 	ldr	w0, [x29, 140]
 	stp	w0, w0, [x19, 40]
 	cmn	w0, #1
-	bne	.L2560
-.L2562:
+	bne	.L2859
+.L2861:
 	add	w20, w20, 1
-	b	.L2557
-.L2560:
+	b	.L2856
+.L2859:
 	mov	w1, 1
 	mov	x0, x19
 	bl	sblk_read_page
@@ -16852,16 +18194,16 @@ ftl_scan_all_data:
 	ldr	x0, [x19, 24]
 	cmp	w3, 256
 	ccmn	w3, #1, 4, ne
-	beq	.L2561
+	beq	.L2860
 	ldr	w1, [x0, 4]
 	cmp	w20, w1
-	beq	.L2562
-.L2561:
+	beq	.L2861
+.L2860:
 	ldr	x1, [x19, 8]
-	add	x27, x24, :lo12:.LC140
-	adrp	x25, .LANCHOR52
-	adrp	x26, .LC141
-	adrp	x22, .LANCHOR117
+	add	x27, x24, :lo12:.LC200
+	adrp	x25, .LANCHOR114
+	adrp	x26, .LC201
+	adrp	x22, .LANCHOR120
 	ldr	w2, [x1, 4]
 	str	w2, [sp, 8]
 	ldr	w1, [x1]
@@ -16875,24 +18217,24 @@ ftl_scan_all_data:
 	ldr	x1, [x19, 24]
 	ldr	w0, [x1, 8]
 	cmn	w0, #1
-	bne	.L2563
-.L2565:
-	ldrb	w21, [x25, #:lo12:.LANCHOR52]
+	bne	.L2862
+.L2864:
+	ldrb	w21, [x25, #:lo12:.LANCHOR114]
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
-	add	x22, x22, :lo12:.LANCHOR117
+	add	x22, x22, :lo12:.LANCHOR120
 	mov	w4, w0
-	add	x0, x26, :lo12:.LC141
+	add	x0, x26, :lo12:.LC201
 	lsl	w27, w21, 7
 	ubfiz	w3, w21, 7, 9
 	sub	w3, w3, #1
 	add	x21, x22, 8
 	and	w3, w3, w20
-	adrp	x26, .LC143
+	adrp	x26, .LC203
 	sdiv	w27, w20, w27
 	and	w3, w3, 65535
 	add	x22, x22, 520
-	add	x26, x26, :lo12:.LC143
+	add	x26, x26, :lo12:.LC203
 	mov	w1, w20
 	and	w25, w27, 65535
 	mov	w2, w25
@@ -16901,26 +18243,26 @@ ftl_scan_all_data:
 	add	x1, x29, 140
 	mov	w0, w20
 	bl	pm_log2phys
-.L2564:
+.L2863:
 	ldr	x1, [x21]
-	cbz	x1, .L2569
+	cbz	x1, .L2868
 	ldrh	w0, [x21, -8]
 	cmp	w0, w25
-	bne	.L2569
+	bne	.L2868
 	mov	w3, 4096
 	mov	w2, 4
 	mov	x0, x26
 	bl	rknand_print_hex
-.L2569:
+.L2868:
 	add	x21, x21, 16
 	cmp	x22, x21
-	bne	.L2564
-	b	.L2562
-.L2563:
+	bne	.L2863
+	b	.L2861
+.L2862:
 	ldr	w21, [x1, 4]
 	ldr	w1, [x28]
 	cmp	w21, w1
-	bcs	.L2565
+	bcs	.L2864
 	str	w0, [x19, 40]
 	mov	w1, 1
 	mov	x0, x19
@@ -16942,12 +18284,12 @@ ftl_scan_all_data:
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 140]
 	cmn	w0, #1
-	bne	.L2566
+	bne	.L2865
 	mov	w2, 0
 	add	x1, x29, 140
 	mov	w0, w21
 	bl	pm_log2phys
-.L2566:
+.L2865:
 	ldr	w0, [x29, 140]
 	mov	w1, 1
 	str	w0, [x19, 40]
@@ -16966,7 +18308,7 @@ ftl_scan_all_data:
 	ldr	w3, [x19, 52]
 	ldr	x0, [x29, 120]
 	bl	printf
-	ldrb	w3, [x25, #:lo12:.LANCHOR52]
+	ldrb	w3, [x25, #:lo12:.LANCHOR114]
 	mov	w0, w21
 	str	w3, [x29, 104]
 	lsl	w2, w3, 7
@@ -16978,7 +18320,7 @@ ftl_scan_all_data:
 	ldr	w3, [x29, 104]
 	mov	w1, w21
 	ldr	w2, [x29, 112]
-	add	x0, x26, :lo12:.LC141
+	add	x0, x26, :lo12:.LC201
 	ubfiz	w3, w3, 7, 9
 	and	w2, w2, 65535
 	sub	w3, w3, #1
@@ -16989,28 +18331,28 @@ ftl_scan_all_data:
 	mov	w2, 0
 	add	x1, x29, 140
 	bl	pm_log2phys
-	add	x0, x22, :lo12:.LANCHOR117
-	adrp	x5, .LC142
+	add	x0, x22, :lo12:.LANCHOR120
+	adrp	x5, .LC202
 	add	x21, x0, 8
 	add	x4, x0, 520
-	add	x5, x5, :lo12:.LC142
-.L2568:
+	add	x5, x5, :lo12:.LC202
+.L2867:
 	ldr	x1, [x21]
-	cbz	x1, .L2567
+	cbz	x1, .L2866
 	ldrh	w0, [x21, -8]
 	cmp	w0, w27
-	bne	.L2567
+	bne	.L2866
 	mov	x0, x5
 	stp	x4, x5, [x29, 104]
 	mov	w3, 4096
 	mov	w2, 4
 	bl	rknand_print_hex
 	ldp	x4, x5, [x29, 104]
-.L2567:
+.L2866:
 	add	x21, x21, 16
 	cmp	x4, x21
-	bne	.L2568
-	b	.L2565
+	bne	.L2867
+	b	.L2864
 	.size	ftl_scan_all_data, .-ftl_scan_all_data
 	.section	.text.ftl_update_l2p_map,"ax",@progbits
 	.align	2
@@ -17024,7 +18366,7 @@ ftl_update_l2p_map:
 	stp	x23, x24, [sp, 48]
 	adrp	x0, .LANCHOR80
 	stp	x19, x20, [sp, 16]
-	adrp	x24, .LANCHOR105
+	adrp	x24, .LANCHOR106
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	ldrh	w23, [x0, #:lo12:.LANCHOR80]
@@ -17032,33 +18374,40 @@ ftl_update_l2p_map:
 	ldrh	w19, [x22, 12]
 	str	x24, [x29, 104]
 	mul	w23, w23, w0
-	ldr	x0, [x24, #:lo12:.LANCHOR105]
+	ldr	x0, [x24, #:lo12:.LANCHOR106]
 	add	x19, x0, x19, lsl 2
 	add	x0, x19, x23, sxtw 2
 	ldr	w0, [x0, -4]
 	cmn	w0, #1
-	bne	.L2581
-	adrp	x27, .LANCHOR52
+	beq	.L2880
+	adrp	x1, .LANCHOR200
+	adrp	x0, .LC0
+	mov	w2, 1450
+	add	x1, x1, :lo12:.LANCHOR200
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2880:
+	adrp	x27, .LANCHOR114
 	mov	x28, 0
-	add	x0, x27, :lo12:.LANCHOR52
+	add	x0, x27, :lo12:.LANCHOR114
 	mov	w21, 0
 	str	x0, [x29, 96]
-.L2582:
+.L2881:
 	cmp	w28, w23
-	blt	.L2590
-	adrp	x0, .LANCHOR29
+	blt	.L2888
+	adrp	x0, .LANCHOR7
 	adrp	x19, .LANCHOR4
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 12, .L2591
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2889
 	ldrh	w1, [x22]
 	ldr	x2, [x19, #:lo12:.LANCHOR4]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w3, [x2, x0]
-	adrp	x0, .LC147
+	adrp	x0, .LC207
 	mov	w2, w21
-	add	x0, x0, :lo12:.LC147
+	add	x0, x0, :lo12:.LC207
 	bl	printf
-.L2591:
+.L2889:
 	ldrh	w1, [x22]
 	ldr	x0, [x19, #:lo12:.LANCHOR4]
 	ldp	x23, x24, [sp, 48]
@@ -17069,47 +18418,38 @@ ftl_update_l2p_map:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2581:
-	adrp	x1, .LANCHOR188
-	adrp	x0, .LC0
-	mov	w2, 1432
-	add	x1, x1, :lo12:.LANCHOR188
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2583:
-	b	.L2583
-.L2590:
+.L2888:
 	ldr	w2, [x19, x28, lsl 2]
 	cmn	w2, #1
-	beq	.L2584
-	ldrb	w20, [x27, #:lo12:.LANCHOR52]
-	adrp	x0, .LANCHOR29
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	beq	.L2882
+	ldrb	w20, [x27, #:lo12:.LANCHOR114]
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
 	lsl	w20, w20, 7
 	udiv	w20, w2, w20
 	and	w20, w20, 65535
-	tbz	x0, 12, .L2585
-	adrp	x0, .LC144
+	tbz	x0, 12, .L2883
+	adrp	x0, .LC204
 	mov	w3, w28
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC144
+	add	x0, x0, :lo12:.LC204
 	bl	printf
-.L2585:
+.L2883:
 	adrp	x25, .LANCHOR99
-	adrp	x26, .LC145
+	adrp	x26, .LC205
 	mov	x24, x28
 	add	x25, x25, :lo12:.LANCHOR99
-	add	x26, x26, :lo12:.LC145
-.L2589:
+	add	x26, x26, :lo12:.LC205
+.L2887:
 	ldr	w1, [x19, x24, lsl 2]
 	cmn	w1, #1
-	beq	.L2586
+	beq	.L2884
 	ldr	x0, [x29, 96]
 	ldrb	w2, [x0]
 	lsl	w2, w2, 7
 	udiv	w1, w1, w2
 	cmp	w20, w1, uxth
-	bne	.L2586
+	bne	.L2884
 	ldrb	w0, [x22, 9]
 	sdiv	w1, w24, w0
 	msub	w0, w1, w0, w24
@@ -17121,17 +18461,17 @@ ftl_update_l2p_map:
 	str	w2, [x29, 124]
 	ldr	w1, [x19, x24, lsl 2]
 	bl	pm_ppa_update_check
-	cbz	w0, .L2587
+	cbz	w0, .L2885
 	ldr	x0, [x29, 104]
 	mov	w3, w23
 	mov	w2, 4
-	ldr	x1, [x0, #:lo12:.LANCHOR105]
-	adrp	x0, .LC146
-	add	x0, x0, :lo12:.LC146
+	ldr	x1, [x0, #:lo12:.LANCHOR106]
+	adrp	x0, .LC206
+	add	x0, x0, :lo12:.LC206
 	bl	rknand_print_hex
-.L2588:
-	b	.L2588
-.L2587:
+.L2886:
+	b	.L2886
+.L2885:
 	ldr	w0, [x19, x24, lsl 2]
 	add	w21, w21, 1
 	mov	w2, 1
@@ -17140,13 +18480,13 @@ ftl_update_l2p_map:
 	bl	pm_log2phys
 	mov	w0, -1
 	str	w0, [x19, x24, lsl 2]
-.L2586:
+.L2884:
 	add	x24, x24, 1
 	cmp	w23, w24
-	bgt	.L2589
-.L2584:
+	bgt	.L2887
+.L2882:
 	add	x28, x28, 1
-	b	.L2582
+	b	.L2881
 	.size	ftl_update_l2p_map, .-ftl_update_l2p_map
 	.section	.text.ftl_alloc_new_data_sblk,"ax",@progbits
 	.align	2
@@ -17162,9 +18502,9 @@ ftl_alloc_new_data_sblk:
 	ldrh	w0, [x19]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L2607
+	beq	.L2908
 	bl	zftl_insert_data_list
-.L2607:
+.L2908:
 	adrp	x0, .LANCHOR5
 	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	add	x0, x0, 16
@@ -17188,25 +18528,25 @@ ftl_alloc_new_data_sblk:
 	.type	ftl_write_commit, %function
 ftl_write_commit:
 	stp	x29, x30, [sp, -144]!
-	adrp	x0, .LANCHOR43
+	adrp	x0, .LANCHOR46
 	add	x29, sp, 0
 	stp	x25, x26, [sp, 64]
-	add	x26, x0, :lo12:.LANCHOR43
+	add	x26, x0, :lo12:.LANCHOR46
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	stp	x27, x28, [sp, 80]
-.L2612:
-	adrp	x3, .LANCHOR50
-	ldrb	w1, [x3, #:lo12:.LANCHOR50]
-	cbz	w1, .L2614
-	adrp	x4, .LANCHOR49
-	adrp	x2, .LANCHOR43
-	add	x2, x2, :lo12:.LANCHOR43
+.L2913:
+	adrp	x3, .LANCHOR53
+	ldrb	w1, [x3, #:lo12:.LANCHOR53]
+	cbz	w1, .L2915
+	adrp	x4, .LANCHOR52
+	adrp	x2, .LANCHOR46
+	add	x2, x2, :lo12:.LANCHOR46
 	sub	w1, w1, #1
-	ldrb	w0, [x4, #:lo12:.LANCHOR49]
+	ldrb	w0, [x4, #:lo12:.LANCHOR52]
 	str	x0, [x29, 104]
-	strb	w1, [x3, #:lo12:.LANCHOR50]
+	strb	w1, [x3, #:lo12:.LANCHOR53]
 	adrp	x1, .LANCHOR54
 	ubfiz	x27, x0, 6, 8
 	add	x5, x2, x27
@@ -17216,13 +18556,13 @@ ftl_write_commit:
 	add	x0, x2, x5
 	ldrb	w5, [x2, x5]
 	ldr	w22, [x0, 36]
-	strb	w5, [x4, #:lo12:.LANCHOR49]
+	strb	w5, [x4, #:lo12:.LANCHOR52]
 	cmp	w22, w1
-	bcc	.L2616
+	bcc	.L2917
 	ldr	x0, [x29, 120]
 	bl	buf_free
 	mov	w0, -1
-.L2611:
+.L2912:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -17230,7 +18570,7 @@ ftl_write_commit:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L2616:
+.L2917:
 	ldrb	w21, [x0, 57]
 	ldrb	w20, [x0, 56]
 	ldr	x24, [x0, 8]
@@ -17238,17 +18578,17 @@ ftl_write_commit:
 	adrp	x0, .LANCHOR112
 	str	x0, [x29, 112]
 	ldrb	w1, [x0, #:lo12:.LANCHOR112]
-	cbz	w1, .L2618
-	adrp	x0, .LANCHOR151
-	ldrb	w1, [x0, #:lo12:.LANCHOR151]
+	cbz	w1, .L2919
+	adrp	x0, .LANCHOR160
+	ldrb	w1, [x0, #:lo12:.LANCHOR160]
 	add	x1, x2, x1, lsl 6
-.L2619:
+.L2920:
 	ldrb	w0, [x1]
 	cmp	w0, 255
-	bne	.L2620
+	bne	.L2921
 	ldr	w0, [x1, 36]
 	cmp	w22, w0
-	bne	.L2618
+	bne	.L2919
 	ldr	x0, [x1, 8]
 	ubfiz	x21, x21, 9, 8
 	lsl	w2, w20, 9
@@ -17257,33 +18597,33 @@ ftl_write_commit:
 	bl	ftl_memcpy
 	ldr	x0, [x29, 120]
 	bl	buf_free
-	b	.L2612
-.L2620:
+	b	.L2913
+.L2921:
 	ubfiz	x1, x0, 6, 8
 	add	x1, x26, x1
-	b	.L2619
-.L2618:
+	b	.L2920
+.L2919:
 	mov	w0, w22
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 140]
 	cmn	w0, #1
-	bne	.L2622
+	bne	.L2923
 	mov	w2, 0
 	add	x1, x29, 140
 	mov	w0, w22
 	bl	pm_log2phys
-.L2622:
+.L2923:
 	adrp	x25, .LANCHOR5
 	add	x1, x26, 2
 	mov	w0, 0
 	ldr	x19, [x25, #:lo12:.LANCHOR5]
 	add	x19, x19, 16
-.L2625:
+.L2926:
 	ldr	w2, [x1, 34]
 	cmp	w22, w2
-	bne	.L2623
+	bne	.L2924
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L2623
+	tbz	x2, 3, .L2924
 	ubfiz	x0, x0, 6, 32
 	and	w2, w2, -9
 	add	x0, x26, x0
@@ -17291,50 +18631,50 @@ ftl_write_commit:
 	ldr	x23, [x0, 8]
 	ldr	w0, [x0, 40]
 	str	w0, [x29, 140]
-.L2624:
-	adrp	x0, .LANCHOR52
+.L2925:
+	adrp	x0, .LANCHOR114
 	str	x0, [x29, 96]
-	ldrb	w1, [x0, #:lo12:.LANCHOR52]
+	ldrb	w1, [x0, #:lo12:.LANCHOR114]
 	cmp	w20, w1
-	bcs	.L2650
-	cbz	x23, .L2627
-	cbz	w21, .L2628
+	bcs	.L2950
+	add	w20, w21, w20
+	cbz	x23, .L2928
+	cbz	w21, .L2929
 	lsl	w2, w21, 9
 	mov	x1, x23
 	mov	x0, x24
 	bl	ftl_memcpy
 	ldr	x19, [x25, #:lo12:.LANCHOR5]
 	add	x19, x19, 48
-.L2628:
+.L2929:
 	ldr	x0, [x29, 96]
-	add	w20, w21, w20
-	ldrb	w2, [x0, #:lo12:.LANCHOR52]
+	ldrb	w2, [x0, #:lo12:.LANCHOR114]
 	cmp	w20, w2
-	bcc	.L2629
+	bcc	.L2930
 	ldr	x19, [x25, #:lo12:.LANCHOR5]
 	add	x19, x19, 16
-.L2650:
+.L2950:
 	mov	w23, 0
-	b	.L2626
-.L2623:
+	b	.L2927
+.L2924:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 32
-	bne	.L2625
+	bne	.L2926
 	mov	x23, 0
-	b	.L2624
-.L2629:
+	b	.L2925
+.L2930:
 	ubfiz	x0, x20, 9, 9
 	sub	w2, w2, w20
 	add	x1, x23, x0
 	lsl	w2, w2, 9
 	add	x0, x24, x0
 	bl	ftl_memcpy
-	b	.L2650
-.L2627:
+	b	.L2950
+.L2928:
 	ldr	w0, [x29, 140]
 	cmn	w0, #1
-	beq	.L2630
+	beq	.L2931
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 140]
@@ -17347,23 +18687,23 @@ ftl_write_commit:
 	ldr	w0, [x0, 4]
 	add	w23, w23, 1
 	cmp	w22, w0
-	bne	.L2631
+	bne	.L2932
 	ldr	w0, [x27, 52]
 	cmn	w0, #1
-	bne	.L2632
-.L2631:
+	bne	.L2933
+.L2932:
 	ldrb	w1, [x27, 1]
 	mov	w3, w22
 	ldr	w4, [x27, 52]
-	adrp	x0, .LC148
+	adrp	x0, .LC208
 	ldr	w2, [x29, 140]
-	add	x0, x0, :lo12:.LC148
+	add	x0, x0, :lo12:.LC208
 	bl	printf
 	ldr	x1, [x27, 24]
 	mov	w3, 4
-	adrp	x0, .LC105
+	adrp	x0, .LC154
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC105
+	add	x0, x0, :lo12:.LC154
 	bl	rknand_print_hex
 	adrp	x0, .LANCHOR96
 	ldr	w1, [x29, 140]
@@ -17380,45 +18720,43 @@ ftl_write_commit:
 	mov	x1, 0
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
-.L2632:
+.L2933:
 	ldr	x0, [x27, 24]
 	ldr	w0, [x0, 4]
 	cmp	w22, w0
-	bne	.L2633
+	bne	.L2934
 	ldr	w0, [x27, 52]
 	cmn	w0, #1
-	bne	.L2634
-.L2633:
-	adrp	x1, .LANCHOR189
+	bne	.L2935
+.L2934:
+	adrp	x1, .LANCHOR201
 	adrp	x0, .LC0
-	mov	w2, 497
-	add	x1, x1, :lo12:.LANCHOR189
+	mov	w2, 544
+	add	x1, x1, :lo12:.LANCHOR201
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2635:
-	b	.L2635
-.L2634:
-	cbz	w21, .L2636
+.L2935:
+	cbz	w21, .L2936
 	ldr	w0, [x29, 140]
 	lsl	w2, w21, 9
 	cmn	w0, #1
-	beq	.L2637
+	beq	.L2937
 	ldr	x1, [x27, 8]
 	mov	x0, x24
 	bl	ftl_memcpy
-.L2638:
+.L2938:
 	ldr	x19, [x25, #:lo12:.LANCHOR5]
 	add	x19, x19, 48
-.L2636:
+.L2936:
 	ldr	x0, [x29, 96]
-	add	w20, w21, w20
-	ldrb	w2, [x0, #:lo12:.LANCHOR52]
+	ldrb	w2, [x0, #:lo12:.LANCHOR114]
 	cmp	w20, w2
-	bcc	.L2639
+	bcc	.L2939
+	bls	.L2940
 	ldr	x19, [x25, #:lo12:.LANCHOR5]
 	add	x19, x19, 16
-.L2640:
-	cbz	x27, .L2626
+.L2940:
+	cbz	x27, .L2927
 	ldrb	w0, [x27, 2]
 	mov	x1, x27
 	and	w0, w0, -9
@@ -17428,17 +18766,17 @@ ftl_write_commit:
 	bl	buf_remove_buf
 	mov	x0, x27
 	bl	buf_free
-.L2626:
+.L2927:
 	ldrh	w0, [x19, 6]
-	cbnz	w0, .L2642
+	cbnz	w0, .L2942
 	bl	ftl_flush
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L2642:
+.L2942:
 	mov	x0, x19
 	bl	ftl_get_new_free_page
 	ldr	x1, [x29, 104]
-	adrp	x20, .LANCHOR151
+	adrp	x20, .LANCHOR160
 	lsl	x2, x1, 6
 	add	x1, x26, x2
 	ldr	w3, [x1, 32]
@@ -17459,33 +18797,33 @@ ftl_write_commit:
 	sub	w0, w0, #1
 	strh	w0, [x1, 48]
 	ldr	x1, [x29, 120]
-	add	x0, x20, :lo12:.LANCHOR151
+	add	x0, x20, :lo12:.LANCHOR160
 	bl	buf_add_tail
 	ldr	x0, [x29, 112]
 	ldrb	w2, [x0, #:lo12:.LANCHOR112]
 	add	w2, w2, 1
 	and	w2, w2, 255
 	strb	w2, [x0, #:lo12:.LANCHOR112]
-	adrp	x0, .LANCHOR190
+	adrp	x0, .LANCHOR202
 	cmp	w2, 2
-	str	wzr, [x0, #:lo12:.LANCHOR190]
+	str	wzr, [x0, #:lo12:.LANCHOR202]
 	ldrh	w0, [x19, 6]
-	bhi	.L2643
+	bhi	.L2943
 	cmp	w0, 1
-	bne	.L2615
-.L2643:
+	bne	.L2916
+.L2943:
 	ldrb	w1, [x19, 5]
 	cmp	w1, 0
 	mov	w1, 0
 	cset	w4, ne
 	cmp	w0, 1
-	ldrb	w0, [x20, #:lo12:.LANCHOR151]
+	ldrb	w0, [x20, #:lo12:.LANCHOR160]
 	csinc	w4, w2, w4, eq
 	mov	w3, w0
-.L2647:
+.L2947:
 	cmp	w1, w4
-	bne	.L2648
-	strb	w3, [x20, #:lo12:.LANCHOR151]
+	bne	.L2948
+	strb	w3, [x20, #:lo12:.LANCHOR160]
 	and	w1, w1, 255
 	ldr	x3, [x29, 112]
 	sub	w2, w2, w1
@@ -17495,58 +18833,58 @@ ftl_write_commit:
 	bl	sblk_prog_page
 	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bne	.L2615
+	bne	.L2916
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	mov	x0, x19
 	bl	ftl_write_last_log_page
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L2615:
-	adrp	x0, .LANCHOR50
-	ldrb	w0, [x0, #:lo12:.LANCHOR50]
-	cbnz	w0, .L2612
-.L2614:
+.L2916:
+	adrp	x0, .LANCHOR53
+	ldrb	w0, [x0, #:lo12:.LANCHOR53]
+	cbnz	w0, .L2913
+.L2915:
 	bl	ftl_write_completed
 	mov	w0, 0
-	b	.L2611
-.L2639:
+	b	.L2912
+.L2939:
 	ldr	w0, [x29, 140]
 	sub	w2, w2, w20
 	lsl	w2, w2, 9
-	ubfiz	x20, x20, 7, 9
 	cmn	w0, #1
-	beq	.L2641
+	ubfiz	x0, x20, 7, 9
+	beq	.L2941
 	ldr	x1, [x27, 8]
-	lsl	x20, x20, 2
-	add	x0, x24, x20
-	add	x1, x1, x20
+	lsl	x0, x0, 2
+	add	x1, x1, x0
+	add	x0, x24, x0
 	bl	ftl_memcpy
-	b	.L2640
-.L2641:
+	b	.L2940
+.L2941:
 	mov	w1, 0
-	add	x0, x24, x20, lsl 2
+	add	x0, x24, x0, lsl 2
 	bl	ftl_memset
-	b	.L2640
-.L2648:
+	b	.L2940
+.L2948:
 	ubfiz	x3, x3, 6, 8
 	add	w1, w1, 1
 	ldrb	w3, [x26, x3]
-	b	.L2647
-.L2649:
+	b	.L2947
+.L2949:
 	lsl	w2, w21, 9
 	mov	x27, 0
 	mov	w23, 0
-.L2637:
+.L2937:
 	mov	w1, 0
 	mov	x0, x24
 	bl	ftl_memset
-	b	.L2638
-.L2630:
-	cbnz	w21, .L2649
+	b	.L2938
+.L2931:
+	cbnz	w21, .L2949
 	mov	w23, 0
 	mov	x27, 0
-	b	.L2636
+	b	.L2936
 	.size	ftl_write_commit, .-ftl_write_commit
 	.section	.text.gc_do_copy_back,"ax",@progbits
 	.align	2
@@ -17563,10 +18901,10 @@ gc_do_copy_back:
 	stp	x23, x24, [sp, 64]
 	stp	x25, x26, [sp, 80]
 	stp	x27, x28, [sp, 96]
-	cbnz	w0, .L2673
+	cbnz	w0, .L2973
 	bl	buf_alloc
 	mov	x19, x0
-	cbz	x0, .L2672
+	cbz	x0, .L2972
 	adrp	x20, .LANCHOR63
 	add	x3, x20, :lo12:.LANCHOR63
 	ldrh	w2, [x3, 26]
@@ -17582,7 +18920,7 @@ gc_do_copy_back:
 	ldr	w0, [x19, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L2675
+	bne	.L2975
 	adrp	x0, .LANCHOR96
 	ldrh	w1, [x0, #:lo12:.LANCHOR96]
 	mov	w0, 21
@@ -17597,58 +18935,56 @@ gc_do_copy_back:
 	mov	x1, 0
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
-.L2675:
+.L2975:
 	ldr	w0, [x19, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L2676
-	adrp	x1, .LANCHOR191
+	bne	.L2976
+	adrp	x1, .LANCHOR203
 	adrp	x0, .LC0
 	mov	w2, 573
-	add	x1, x1, :lo12:.LANCHOR191
+	add	x1, x1, :lo12:.LANCHOR203
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2677:
-	b	.L2677
-.L2676:
+.L2976:
 	ldr	x0, [x19, 24]
 	ldr	w21, [x0, 4]
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 160]
 	cmn	w0, #1
-	bne	.L2678
+	bne	.L2977
 	mov	w2, 0
 	add	x1, x29, 160
 	mov	w0, w21
 	bl	pm_log2phys
-.L2678:
+.L2977:
 	ldr	w23, [x29, 160]
 	cmp	w22, w23
-	bne	.L2679
-	adrp	x0, .LANCHOR43
-	add	x0, x0, :lo12:.LANCHOR43
+	bne	.L2978
+	adrp	x0, .LANCHOR46
+	add	x0, x0, :lo12:.LANCHOR46
 	add	x1, x0, 2
 	add	x0, x0, 2050
-.L2682:
+.L2981:
 	ldr	w2, [x1, 34]
 	cmp	w21, w2
-	bne	.L2680
+	bne	.L2979
 	ldrb	w2, [x1]
-	tbz	x2, 1, .L2680
+	tbz	x2, 1, .L2979
 	mov	x0, x19
 	bl	buf_free
-	adrp	x0, .LANCHOR29
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 8, .L2672
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 8, .L2972
 	add	x20, x20, :lo12:.LANCHOR63
-	adrp	x0, .LC149
+	adrp	x0, .LC209
 	mov	w2, w22
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC149
+	add	x0, x0, :lo12:.LC209
 	ldrh	w3, [x20, 26]
 	bl	printf
-.L2672:
+.L2972:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -17657,14 +18993,14 @@ gc_do_copy_back:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 224
 	ret
-.L2680:
+.L2979:
 	add	x1, x1, 64
 	cmp	x0, x1
-	bne	.L2682
-	adrp	x0, .LANCHOR52
+	bne	.L2981
+	adrp	x0, .LANCHOR114
 	mov	w1, 10
 	strb	wzr, [x19, 57]
-	ldrb	w0, [x0, #:lo12:.LANCHOR52]
+	ldrb	w0, [x0, #:lo12:.LANCHOR114]
 	strb	w0, [x19, 56]
 	ldrb	w0, [x19, 2]
 	str	w21, [x19, 36]
@@ -17673,54 +19009,54 @@ gc_do_copy_back:
 	ldr	x0, [x19, 24]
 	ldr	w0, [x0]
 	str	w0, [x19, 32]
-	adrp	x0, .LANCHOR29
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 8, .L2683
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 8, .L2982
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	add	x1, x20, :lo12:.LANCHOR63
 	mov	w3, w0
 	mov	w4, w22
-	adrp	x0, .LC150
+	adrp	x0, .LC210
 	mov	w2, w23
-	add	x0, x0, :lo12:.LC150
+	add	x0, x0, :lo12:.LC210
 	ldrh	w5, [x1, 26]
 	mov	w1, w21
 	bl	printf
-.L2683:
+.L2982:
 	mov	x0, x19
 	bl	ftl_gc_write_buf
 	bl	ftl_write_commit
 	add	x20, x20, :lo12:.LANCHOR63
-	adrp	x0, .LANCHOR53
-	ldr	x1, [x0, #:lo12:.LANCHOR53]
+	adrp	x0, .LANCHOR101
+	ldr	x1, [x0, #:lo12:.LANCHOR101]
 	ldr	w0, [x1, 60]
 	add	w0, w0, 1
 	str	w0, [x1, 60]
 	ldrh	w0, [x20, 28]
 	add	w0, w0, 1
 	strh	w0, [x20, 28]
-	b	.L2672
-.L2679:
-	adrp	x0, .LANCHOR29
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 8, .L2684
+	b	.L2972
+.L2978:
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 8, .L2983
 	add	x20, x20, :lo12:.LANCHOR63
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	mov	w3, w0
 	mov	w4, w22
-	adrp	x0, .LC150
+	adrp	x0, .LC210
 	ldrh	w5, [x20, 26]
 	mov	w2, w23
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC150
+	add	x0, x0, :lo12:.LC210
 	bl	printf
-.L2684:
+.L2983:
 	mov	x0, x19
 	bl	buf_free
-	b	.L2672
-.L2673:
+	b	.L2972
+.L2973:
 	adrp	x1, .LANCHOR5
 	adrp	x0, .LANCHOR67
 	stp	x0, x1, [x29, 128]
@@ -17729,10 +19065,10 @@ gc_do_copy_back:
 	ldrb	w25, [x0, #:lo12:.LANCHOR67]
 	add	x22, x22, 80
 	cmp	w25, 3
-	bne	.L2685
+	bne	.L2984
 	adrp	x0, .LANCHOR69
 	ldrb	w0, [x0, #:lo12:.LANCHOR69]
-	cbz	w0, .L2686
+	cbz	w0, .L2985
 	add	x0, x24, :lo12:.LANCHOR63
 	ldrb	w19, [x22, 9]
 	ldrh	w20, [x0, 314]
@@ -17741,7 +19077,7 @@ gc_do_copy_back:
 	sdiv	w21, w20, w21
 	madd	w19, w21, w19, w20
 	and	w19, w19, 65535
-.L2687:
+.L2986:
 	adrp	x1, .LANCHOR71
 	ldrb	w0, [x22, 9]
 	add	x4, x24, :lo12:.LANCHOR63
@@ -17750,21 +19086,21 @@ gc_do_copy_back:
 	mul	w8, w25, w0
 	ldrh	w10, [x4, 24]
 	mul	w3, w3, w0
-	adrp	x0, .LANCHOR132
-	ldr	x7, [x0, #:lo12:.LANCHOR132]
+	adrp	x0, .LANCHOR137
+	ldr	x7, [x0, #:lo12:.LANCHOR137]
 	sub	w3, w3, #1
-.L2690:
+.L2989:
 	cmp	w2, w8
-	blt	.L2692
-.L2720:
+	blt	.L2991
+.L3018:
 	mov	w23, 1
-	b	.L2688
-.L2686:
+	b	.L2987
+.L2985:
 	add	x0, x24, :lo12:.LANCHOR63
 	ldrb	w20, [x22, 9]
 	ldrh	w1, [x0, 314]
-	adrp	x0, .LANCHOR192
-	add	x0, x0, :lo12:.LANCHOR192
+	adrp	x0, .LANCHOR204
+	add	x0, x0, :lo12:.LANCHOR204
 	sdiv	w19, w1, w20
 	ldrh	w23, [x0, w19, sxtw 1]
 	msub	w19, w19, w20, w1
@@ -17775,31 +19111,31 @@ gc_do_copy_back:
 	madd	w20, w21, w20, w19
 	add	w20, w20, w20, lsl 1
 	and	w20, w20, 65535
-	beq	.L2687
-.L2688:
-	adrp	x0, .LANCHOR29
+	beq	.L2986
+.L2987:
+	adrp	x0, .LANCHOR7
 	str	x0, [x29, 112]
-	ldr	w1, [x0, #:lo12:.LANCHOR29]
-	tbz	x1, 8, .L2693
-	adrp	x0, .LANCHOR132
+	ldr	w1, [x0, #:lo12:.LANCHOR7]
+	tbz	x1, 8, .L2992
+	adrp	x0, .LANCHOR137
 	ubfiz	x1, x20, 2, 16
 	mov	w6, w20
 	mov	w3, w19
-	ldr	x2, [x0, #:lo12:.LANCHOR132]
+	ldr	x2, [x0, #:lo12:.LANCHOR137]
 	add	x0, x24, :lo12:.LANCHOR63
 	ldrh	w4, [x0, 314]
-	adrp	x0, .LC151
+	adrp	x0, .LC211
 	ldr	w5, [x2, x1]
-	add	x0, x0, :lo12:.LC151
+	add	x0, x0, :lo12:.LC211
 	mov	w2, w23
 	mov	w1, w21
 	bl	printf
-.L2693:
-	adrp	x0, .LANCHOR43
+.L2992:
+	adrp	x0, .LANCHOR46
 	str	wzr, [x29, 152]
-	add	x0, x0, :lo12:.LANCHOR43
+	add	x0, x0, :lo12:.LANCHOR46
 	str	x0, [x29, 120]
-.L2694:
+.L2993:
 	ldrb	w2, [x22, 9]
 	ldr	w0, [x29, 152]
 	ldrh	w26, [x29, 152]
@@ -17807,27 +19143,27 @@ gc_do_copy_back:
 	str	w0, [x29, 156]
 	mul	w1, w25, w2
 	cmp	w0, w1
-	blt	.L2707
+	blt	.L3005
 	ldr	x0, [x29, 128]
 	ldrb	w0, [x0, #:lo12:.LANCHOR67]
 	cmp	w0, 3
 	add	x0, x29, 160
-	beq	.L2708
+	beq	.L3006
 	sub	w3, w1, #1
 	mov	w2, 0
-.L2709:
+.L3007:
 	cmp	w2, w3
-	blt	.L2715
+	blt	.L3013
 	ldr	x0, [x0, w3, sxtw 3]
 	mov	w2, -1
 	strb	w2, [x0]
 	ldr	x0, [x29, 160]
 	bl	sblk_prog_page
-	b	.L2714
-.L2685:
+	b	.L3012
+.L2984:
 	adrp	x0, .LANCHOR98
 	ldrb	w0, [x0, #:lo12:.LANCHOR98]
-	cbnz	w0, .L2689
+	cbnz	w0, .L2988
 	add	x0, x24, :lo12:.LANCHOR63
 	ldrb	w19, [x22, 9]
 	mov	w25, 1
@@ -17835,8 +19171,8 @@ gc_do_copy_back:
 	sdiv	w21, w20, w19
 	msub	w19, w21, w19, w20
 	and	w19, w19, 65535
-	b	.L2687
-.L2689:
+	b	.L2986
+.L2988:
 	add	x0, x24, :lo12:.LANCHOR63
 	ldrb	w19, [x22, 9]
 	mov	w25, 2
@@ -17844,28 +19180,28 @@ gc_do_copy_back:
 	sdiv	w21, w20, w19
 	msub	w19, w21, w19, w20
 	and	w19, w19, 65535
-	b	.L2687
-.L2692:
+	b	.L2986
+.L2991:
 	add	w5, w20, w2
 	cmp	w5, w3
-	beq	.L2720
+	beq	.L3018
 	sbfiz	x5, x5, 2, 32
 	ldr	w0, [x7, x5]
 	cmn	w0, #1
-	bne	.L2691
+	bne	.L2990
 	ldrh	w6, [x4, 26]
 	cmp	w6, w10
-	bcs	.L2672
+	bcs	.L2972
 	mov	w0, w6
 	bl	gc_get_src_ppa_from_index
 	add	w6, w6, 1
 	strh	w6, [x4, 26]
 	str	w0, [x7, x5]
-.L2691:
+.L2990:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-	b	.L2690
-.L2707:
+	b	.L2989
+.L3005:
 	ldr	w0, [x29, 156]
 	add	w0, w20, w0
 	str	w0, [x29, 144]
@@ -17874,11 +19210,11 @@ gc_do_copy_back:
 	ldr	x0, [x0, #:lo12:.LANCHOR68]
 	ldrb	w0, [x0, x27]
 	cmp	w0, 255
-	bne	.L2695
+	bne	.L2994
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbnz	x0, .L2696
+	cbnz	x0, .L2995
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	bl	gc_write_completed
@@ -17886,12 +19222,12 @@ gc_do_copy_back:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbz	x0, .L2672
-.L2696:
+	cbz	x0, .L2972
+.L2995:
 	adrp	x0, .LANCHOR68
 	ldrb	w1, [x28, 1]
 	adrp	x5, .LANCHOR71
-	adrp	x6, .LANCHOR132
+	adrp	x6, .LANCHOR137
 	ldr	x0, [x0, #:lo12:.LANCHOR68]
 	strb	w1, [x0, x27]
 	add	x1, x24, :lo12:.LANCHOR63
@@ -17907,11 +19243,11 @@ gc_do_copy_back:
 	mul	w0, w0, w7
 	sub	w0, w0, #1
 	cmp	w1, w0
-	bne	.L2697
-	adrp	x0, .LANCHOR131
+	bne	.L2996
+	adrp	x0, .LANCHOR136
 	adrp	x4, .LANCHOR72
 	stp	x6, x5, [x29, 96]
-	ldr	x1, [x0, #:lo12:.LANCHOR131]
+	ldr	x1, [x0, #:lo12:.LANCHOR136]
 	mov	w0, -1
 	str	x4, [x29, 144]
 	str	w0, [x1, x27, lsl 2]
@@ -17926,13 +19262,13 @@ gc_do_copy_back:
 	ldrh	w0, [x5, #:lo12:.LANCHOR71]
 	ldrb	w1, [x4, #:lo12:.LANCHOR72]
 	mul	w0, w0, w1
-	ldr	x1, [x6, #:lo12:.LANCHOR132]
+	ldr	x1, [x6, #:lo12:.LANCHOR137]
 	lsl	w2, w0, 2
 	add	x0, x7, x0, sxtw 2
 	bl	ftl_memcpy
-	adrp	x0, .LANCHOR52
+	adrp	x0, .LANCHOR114
 	mov	w1, 0
-	ldrb	w2, [x0, #:lo12:.LANCHOR52]
+	ldrb	w2, [x0, #:lo12:.LANCHOR114]
 	ldr	x0, [x28, 24]
 	lsl	w2, w2, 1
 	bl	ftl_memset
@@ -17953,26 +19289,26 @@ gc_do_copy_back:
 	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	ldr	w0, [x0, 132]
 	str	w0, [x6, 8]
-.L2695:
+.L2994:
 	adrp	x0, .LANCHOR68
 	ldr	w5, [x29, 156]
 	add	x3, x29, 160
 	ldr	x4, [x0, #:lo12:.LANCHOR68]
-	adrp	x0, .LANCHOR43
-	add	x2, x0, :lo12:.LANCHOR43
+	adrp	x0, .LANCHOR46
+	add	x2, x0, :lo12:.LANCHOR46
 	ldrb	w1, [x4, x27]
 	ubfiz	x0, x1, 6, 8
 	add	x0, x2, x0
 	add	x2, x2, x1, lsl 6
 	str	x0, [x3, w5, sxtw 3]
 	mov	w0, 2
-	adrp	x5, .LANCHOR133
+	adrp	x5, .LANCHOR138
 	strh	w0, [x2, 50]
 	ldr	x0, [x29, 128]
 	strb	w23, [x2, 61]
 	ldrb	w0, [x0, #:lo12:.LANCHOR67]
 	cmp	w0, 3
-	bne	.L2702
+	bne	.L3000
 	udiv	w0, w26, w0
 	adrp	x6, .LANCHOR99
 	ldrh	w6, [x6, #:lo12:.LANCHOR99]
@@ -17987,13 +19323,13 @@ gc_do_copy_back:
 	ldrh	w6, [x2, 48]
 	orr	w3, w3, w21
 	str	w3, [x2, 40]
-	ldr	x2, [x5, #:lo12:.LANCHOR133]
+	ldr	x2, [x5, #:lo12:.LANCHOR138]
 	orr	w0, w3, w0, lsl 24
 	str	w0, [x2, x6, lsl 2]
-.L2703:
+.L3001:
 	ldr	x0, [x29, 112]
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 8, .L2706
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 8, .L3004
 	ldr	x0, [x29, 120]
 	mov	w2, w23
 	ldrb	w4, [x4, x27]
@@ -18007,39 +19343,39 @@ gc_do_copy_back:
 	str	w0, [sp, 8]
 	mov	w0, 3
 	udiv	w26, w26, w0
-	adrp	x0, .LC152
-	add	x0, x0, :lo12:.LC152
+	adrp	x0, .LC212
+	add	x0, x0, :lo12:.LC212
 	add	w26, w26, w19
 	str	w26, [sp]
 	ldr	w5, [x1, 40]
 	ldr	w1, [x29, 156]
 	bl	printf
-.L2706:
+.L3004:
 	ldr	w0, [x29, 152]
 	add	w0, w0, 1
 	str	w0, [x29, 152]
-	b	.L2694
-.L2697:
-	ldr	x0, [x6, #:lo12:.LANCHOR132]
-	lsl	x4, x27, 2
+	b	.L2993
+.L2996:
+	lsl	x0, x27, 2
+	str	x0, [x29, 144]
+	ldr	x0, [x6, #:lo12:.LANCHOR137]
+	lsl	x1, x27, 2
+	ldr	w0, [x0, x1]
 	mov	w1, 1
-	str	x4, [x29, 144]
-	ldr	w0, [x0, x4]
 	str	w0, [x28, 40]
 	mov	x0, x28
 	bl	sblk_read_page
 	ldr	w0, [x28, 52]
-	ldr	x4, [x29, 144]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L2699
+	bne	.L2998
 	adrp	x0, .LANCHOR96
 	ldr	w1, [x28, 40]
-	ldrh	w5, [x0, #:lo12:.LANCHOR96]
+	ldrh	w4, [x0, #:lo12:.LANCHOR96]
 	mov	w0, 21
-	sub	w2, w0, w5
+	sub	w2, w0, w4
 	mov	w0, 1
-	lsr	w1, w1, w5
+	lsr	w1, w1, w4
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
 	and	w0, w0, w1
@@ -18049,67 +19385,65 @@ gc_do_copy_back:
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
 	ldr	w0, [x28, 52]
-	ldr	x4, [x29, 144]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L2699
+	bne	.L2998
 	ldr	x0, [x28, 24]
 	mov	w1, -1
 	str	w1, [x0, 4]
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmp	w0, w1, 4, ne
-	bne	.L2699
-	adrp	x1, .LANCHOR191
+	bne	.L2998
+	adrp	x1, .LANCHOR203
 	adrp	x0, .LC0
 	mov	w2, 688
-	add	x1, x1, :lo12:.LANCHOR191
+	add	x1, x1, :lo12:.LANCHOR203
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2700:
-	b	.L2700
-.L2699:
+.L2998:
 	ldr	x0, [x28, 24]
 	adrp	x1, .LANCHOR54
 	ldr	w1, [x1, #:lo12:.LANCHOR54]
 	ldr	w2, [x0, 4]
 	cmp	w2, w1
-	bcc	.L2701
+	bcc	.L2999
 	mov	w1, -1
 	str	w1, [x0, 4]
-.L2701:
-	adrp	x1, .LANCHOR131
+.L2999:
+	adrp	x1, .LANCHOR136
+	lsl	x3, x27, 2
 	ldr	w2, [x0, 4]
-	ldr	x1, [x1, #:lo12:.LANCHOR131]
-	str	w2, [x1, x4]
+	ldr	x1, [x1, #:lo12:.LANCHOR136]
+	str	w2, [x1, x3]
 	ldr	w1, [x28, 40]
 	str	w1, [x0, 8]
-	b	.L2695
-.L2702:
+	b	.L2994
+.L3000:
 	cmp	w0, 2
-	bne	.L2704
+	bne	.L3002
 	adrp	x0, .LANCHOR98
 	adrp	x3, .LANCHOR99
 	ldrb	w0, [x0, #:lo12:.LANCHOR98]
-	cbnz	w0, .L2705
+	cbnz	w0, .L3003
 	ldr	w0, [x29, 156]
 	ldrh	w3, [x3, #:lo12:.LANCHOR99]
 	add	w0, w19, w0
 	add	x0, x22, x0, sxtw 1
 	ldrh	w0, [x0, 16]
 	madd	w0, w0, w3, w21
-.L2763:
+.L3064:
 	orr	w0, w0, 33554432
 	str	w0, [x2, 40]
-.L2704:
+.L3002:
 	ldr	x0, [x29, 120]
 	add	x0, x0, x1, lsl 6
 	ldrh	w2, [x0, 48]
 	ldr	w3, [x0, 40]
-	ldr	x0, [x5, #:lo12:.LANCHOR133]
+	ldr	x0, [x5, #:lo12:.LANCHOR138]
 	str	w3, [x0, x2, lsl 2]
-	b	.L2703
-.L2705:
+	b	.L3001
+.L3003:
 	add	w0, w19, w26, lsr 1
 	ldrh	w3, [x3, #:lo12:.LANCHOR99]
 	add	x0, x22, x0, sxtw 1
@@ -18117,35 +19451,35 @@ gc_do_copy_back:
 	madd	w0, w0, w3, w21
 	and	w3, w26, 1
 	add	w0, w0, w3
-	b	.L2763
-.L2708:
+	b	.L3064
+.L3006:
 	adrp	x1, .LANCHOR69
 	ldrb	w3, [x1, #:lo12:.LANCHOR69]
 	ldr	x1, [x29, 160]
-	cbz	w3, .L2710
-.L2713:
+	cbz	w3, .L3008
+.L3011:
 	strb	wzr, [x1, 60]
-	b	.L2711
-.L2710:
+	b	.L3009
+.L3008:
 	cmp	w23, 1
-	bne	.L2712
+	bne	.L3010
 	mov	w3, 9
-.L2762:
+.L3063:
 	strb	w3, [x1, 60]
-.L2711:
+.L3009:
 	add	x1, x0, 24
 	bl	sblk_xlc_prog_pages
-.L2714:
+.L3012:
 	adrp	x1, .LANCHOR69
 	ldrb	w3, [x22, 9]
 	ldrb	w1, [x1, #:lo12:.LANCHOR69]
 	and	w0, w3, 65535
-	cbz	w1, .L2716
+	cbz	w1, .L3014
 	add	w0, w0, w0, lsl 1
-.L2717:
-	adrp	x1, .LANCHOR53
+.L3015:
+	adrp	x1, .LANCHOR101
 	add	x24, x24, :lo12:.LANCHOR63
-	ldr	x1, [x1, #:lo12:.LANCHOR53]
+	ldr	x1, [x1, #:lo12:.LANCHOR101]
 	ldr	w2, [x1, 52]
 	add	w2, w2, w0
 	str	w2, [x1, 52]
@@ -18157,35 +19491,277 @@ gc_do_copy_back:
 	ldrh	w1, [x1, #:lo12:.LANCHOR71]
 	mul	w1, w1, w3
 	cmp	w0, w1
-	blt	.L2718
+	blt	.L3016
 	ldr	x0, [x29, 136]
 	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	strh	wzr, [x0, 86]
-.L2718:
+.L3016:
 	bl	gc_write_completed
-	b	.L2672
-.L2712:
+	b	.L2972
+.L3010:
 	cmp	w23, 2
-	bne	.L2713
+	bne	.L3011
 	mov	w3, 13
-	b	.L2762
-.L2715:
+	b	.L3063
+.L3013:
 	ldr	x4, [x0, w2, sxtw 3]
 	add	w2, w2, 1
 	ldr	x5, [x0, w2, sxtw 3]
 	and	w2, w2, 65535
 	ldrb	w5, [x5, 1]
 	strb	w5, [x4]
-	b	.L2709
-.L2716:
+	b	.L3007
+.L3014:
 	adrp	x1, .LANCHOR98
 	ldrb	w2, [x1, #:lo12:.LANCHOR98]
 	mov	w1, w0
 	ubfiz	w0, w0, 1, 15
 	cmp	w2, 0
 	csel	w0, w0, w1, ne
-	b	.L2717
+	b	.L3015
 	.size	gc_do_copy_back, .-gc_do_copy_back
+	.section	.text.zftl_discard,"ax",@progbits
+	.align	2
+	.global	zftl_discard
+	.type	zftl_discard, %function
+zftl_discard:
+	stp	x29, x30, [sp, -128]!
+	adrp	x2, .LANCHOR59
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w19, w1
+	ldr	w2, [x2, #:lo12:.LANCHOR59]
+	add	w1, w0, w1
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	cmp	w2, w1
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	bcc	.L3086
+	adrp	x24, .LANCHOR205
+	add	w22, w0, 24576
+	adrp	x0, .LANCHOR7
+	str	x0, [x29, 104]
+	ldr	w1, [x24, #:lo12:.LANCHOR205]
+	ldr	w2, [x0, #:lo12:.LANCHOR7]
+	add	w1, w19, w1
+	str	w1, [x24, #:lo12:.LANCHOR205]
+	tbz	x2, 12, .L3067
+	adrp	x0, .LC213
+	mov	w4, 0
+	mov	w3, w19
+	mov	w2, w22
+	add	x0, x0, :lo12:.LC213
+	bl	printf
+.L3067:
+	adrp	x23, .LANCHOR101
+	adrp	x26, .LANCHOR114
+	ldr	x0, [x23, #:lo12:.LANCHOR101]
+	ldr	w27, [x0, 8]
+	add	w1, w27, 1
+	str	w1, [x0, 8]
+	bl	ftl_write_commit
+	bl	ftl_flush
+	ldrb	w21, [x26, #:lo12:.LANCHOR114]
+	udiv	w20, w22, w21
+	msub	w25, w20, w21, w22
+	cbz	w25, .L3068
+	sub	w21, w21, w25
+	mov	w0, w20
+	cmp	w21, w19
+	csel	w21, w21, w19, ls
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 120]
+	cmn	w0, #1
+	bne	.L3069
+	mov	w2, 0
+	add	x1, x29, 120
+	mov	w0, w20
+	bl	pm_log2phys
+.L3069:
+	ldr	w0, [x29, 120]
+	and	w28, w21, 65535
+	cmn	w0, #1
+	beq	.L3071
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x3, x0
+	cbz	x0, .L3071
+	strb	w25, [x0, 57]
+	ubfiz	x25, x25, 9, 25
+	strb	w21, [x0, 56]
+	mov	w1, 0
+	ldr	x0, [x0, 8]
+	lsl	w2, w28, 9
+	stp	w27, w20, [x3, 32]
+	str	x3, [x29, 96]
+	add	x0, x0, x25
+	bl	ftl_memset
+	ldr	x3, [x29, 96]
+	mov	x0, x3
+	bl	ftl_write_buf
+	bl	ftl_write_commit
+	ldr	x1, [x23, #:lo12:.LANCHOR101]
+	ldr	w0, [x1, 76]
+	add	w0, w0, 1
+	str	w0, [x1, 76]
+.L3071:
+	add	w20, w20, 1
+	sub	w19, w19, w28
+.L3068:
+	cbz	w19, .L3073
+	bl	ftl_flush
+.L3073:
+	adrp	x25, .LANCHOR96
+	add	x21, x26, :lo12:.LANCHOR114
+	add	x25, x25, :lo12:.LANCHOR96
+	mov	w0, -1
+	str	w0, [x29, 124]
+.L3074:
+	ldrb	w0, [x21]
+	cmp	w19, w0
+	bcs	.L3079
+	cbz	w19, .L3081
+	mov	w0, w20
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 120]
+	cmn	w0, #1
+	bne	.L3082
+	mov	w2, 0
+	add	x1, x29, 120
+	mov	w0, w20
+	bl	pm_log2phys
+.L3082:
+	ldr	w0, [x29, 120]
+	cmn	w0, #1
+	beq	.L3081
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x21, x0
+	cbz	x0, .L3081
+	strb	wzr, [x0, 57]
+	strb	w19, [x0, 56]
+	stp	w27, w20, [x21, 32]
+	ldrb	w0, [x26, #:lo12:.LANCHOR114]
+	cmp	w19, w0
+	bcc	.L3084
+	adrp	x1, .LANCHOR206
+	adrp	x0, .LC0
+	mov	w2, 1177
+	add	x1, x1, :lo12:.LANCHOR206
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L3084:
+	ldr	x0, [x21, 8]
+	lsl	w2, w19, 9
+	mov	w1, 0
+	bl	ftl_memset
+	mov	x0, x21
+	bl	ftl_write_buf
+	bl	ftl_write_commit
+	ldr	x1, [x23, #:lo12:.LANCHOR101]
+	ldr	w0, [x1, 76]
+	add	w0, w0, 1
+	str	w0, [x1, 76]
+.L3081:
+	ldr	w1, [x24, #:lo12:.LANCHOR205]
+	cmp	w1, 8192
+	bls	.L3087
+	ldr	x0, [x29, 104]
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L3085
+	adrp	x0, .LC213
+	mov	w4, 0
+	mov	w3, w19
+	mov	w2, w22
+	add	x0, x0, :lo12:.LC213
+	bl	printf
+.L3085:
+	str	wzr, [x24, #:lo12:.LANCHOR205]
+	bl	flt_sys_flush
+	adrp	x0, .LANCHOR207
+	mov	w1, 1
+	str	w1, [x0, #:lo12:.LANCHOR207]
+.L3087:
+	mov	w0, 0
+	b	.L3065
+.L3079:
+	mov	w0, w20
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 120]
+	cmn	w0, #1
+	beq	.L3075
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x28, x0
+	cbz	x0, .L3077
+	ldrb	w2, [x21]
+	mov	w1, 0
+	strb	w2, [x0, 56]
+	strb	wzr, [x0, 57]
+	ldr	x0, [x0, 8]
+	lsl	w2, w2, 9
+	stp	w27, w20, [x28, 32]
+	bl	ftl_memset
+	mov	x0, x28
+	bl	ftl_write_buf
+	bl	ftl_write_commit
+.L3113:
+	ldr	x1, [x23, #:lo12:.LANCHOR101]
+	ldr	w0, [x1, 76]
+	add	w0, w0, 1
+	str	w0, [x1, 76]
+.L3077:
+	ldrb	w0, [x21]
+	add	w20, w20, 1
+	sub	w19, w19, w0
+	b	.L3074
+.L3075:
+	mov	w2, 0
+	add	x1, x29, 120
+	mov	w0, w20
+	bl	pm_log2phys
+	ldr	w0, [x29, 120]
+	cmn	w0, #1
+	beq	.L3077
+	add	x1, x29, 124
+	mov	w2, 1
+	mov	w0, w20
+	bl	pm_log2phys
+	ldrh	w3, [x25]
+	mov	w0, 21
+	ldr	w1, [x29, 120]
+	sub	w2, w0, w3
+	mov	w0, 1
+	lsr	w1, w1, w3
+	lsl	w0, w0, w2
+	sub	w0, w0, #1
+	and	w0, w0, w1
+	adrp	x1, .LANCHOR95
+	ldrb	w1, [x1, #:lo12:.LANCHOR95]
+	udiv	w0, w0, w1
+	bl	ftl_vpn_decrement
+	b	.L3113
+.L3086:
+	mov	w0, -1
+.L3065:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+	.size	zftl_discard, .-zftl_discard
+	.section	.text.ftl_discard,"ax",@progbits
+	.align	2
+	.global	ftl_discard
+	.type	ftl_discard, %function
+ftl_discard:
+	mov	w0, w1
+	mov	w1, w2
+	b	zftl_discard
+	.size	ftl_discard, .-ftl_discard
 	.section	.text.zftl_do_gc,"ax",@progbits
 	.align	2
 	.global	zftl_do_gc
@@ -18197,141 +19773,141 @@ zftl_do_gc:
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x19, x20, [sp, 32]
-	adrp	x19, .LANCHOR130
-	stp	x21, x22, [sp, 48]
-	ldrh	w20, [x2, #:lo12:.LANCHOR89]
+	adrp	x19, .LANCHOR135
 	stp	x23, x24, [sp, 64]
-	adrp	x23, .LANCHOR5
+	adrp	x24, .LANCHOR5
+	ldrh	w20, [x2, #:lo12:.LANCHOR89]
+	stp	x21, x22, [sp, 48]
+	ldrb	w2, [x19, #:lo12:.LANCHOR135]
 	ldrh	w21, [x1, #:lo12:.LANCHOR93]
-	ldrb	w2, [x19, #:lo12:.LANCHOR130]
 	stp	x25, x26, [sp, 80]
-	add	w20, w21, w20
-	ldr	x22, [x23, #:lo12:.LANCHOR5]
 	cmp	w2, 6
-	bhi	.L2868
-	mov	w24, w0
+	ldr	x23, [x24, #:lo12:.LANCHOR5]
+	add	w20, w21, w20
+	bhi	.L3222
+	mov	w22, w0
 	and	w20, w20, 65535
-	adrp	x0, .L2767
+	adrp	x0, .L3118
 	mov	x25, x1
-	add	x0, x0, :lo12:.L2767
+	add	x0, x0, :lo12:.L3118
 	ldrh	w0, [x0,w2,uxtw #1]
-	adr	x1, .Lrtx2767
+	adr	x1, .Lrtx3118
 	add	x0, x1, w0, sxth #2
 	br	x0
-.Lrtx2767:
+.Lrtx3118:
 	.section	.rodata.zftl_do_gc,"a",@progbits
 	.align	0
 	.align	2
-.L2767:
-	.2byte	(.L2766 - .Lrtx2767) / 4
-	.2byte	(.L2768 - .Lrtx2767) / 4
-	.2byte	(.L2769 - .Lrtx2767) / 4
-	.2byte	(.L2770 - .Lrtx2767) / 4
-	.2byte	(.L2771 - .Lrtx2767) / 4
-	.2byte	(.L2772 - .Lrtx2767) / 4
-	.2byte	(.L2773 - .Lrtx2767) / 4
+.L3118:
+	.2byte	(.L3117 - .Lrtx3118) / 4
+	.2byte	(.L3119 - .Lrtx3118) / 4
+	.2byte	(.L3120 - .Lrtx3118) / 4
+	.2byte	(.L3121 - .Lrtx3118) / 4
+	.2byte	(.L3122 - .Lrtx3118) / 4
+	.2byte	(.L3123 - .Lrtx3118) / 4
+	.2byte	(.L3124 - .Lrtx3118) / 4
 	.section	.text.zftl_do_gc
-.L2772:
+.L3123:
 	adrp	x21, .LANCHOR63
 	add	x25, x21, :lo12:.LANCHOR63
-	mov	w22, 0
-.L2774:
+	mov	w23, 0
+.L3125:
 	bl	gc_check_data_one_wl
-	cbz	w0, .L2841
-	ldr	x0, [x23, #:lo12:.LANCHOR5]
+	cbz	w0, .L3190
+	ldr	x0, [x24, #:lo12:.LANCHOR5]
 	add	x21, x21, :lo12:.LANCHOR63
 	strh	wzr, [x21, 56]
 	ldrh	w0, [x0, 80]
 	bl	ftl_free_sblk
-	adrp	x2, .LANCHOR53
-	ldr	x1, [x23, #:lo12:.LANCHOR5]
+	adrp	x2, .LANCHOR101
+	ldr	x1, [x24, #:lo12:.LANCHOR5]
 	mov	w0, -1
-	ldr	x2, [x2, #:lo12:.LANCHOR53]
+	ldr	x2, [x2, #:lo12:.LANCHOR101]
 	strh	w0, [x1, 80]
 	strh	w0, [x2, 126]
 	strh	w0, [x1, 130]
 	ldr	x0, [x21, 8]
 	bl	buf_free
-	strb	wzr, [x19, #:lo12:.LANCHOR130]
+	strb	wzr, [x19, #:lo12:.LANCHOR135]
 	str	xzr, [x21, 8]
-	b	.L2890
-.L2766:
+	b	.L3246
+.L3117:
 	adrp	x0, .LANCHOR91
 	mov	w1, 65535
 	ldrh	w4, [x0, #:lo12:.LANCHOR91]
-	ldrh	w0, [x22, 80]
+	ldrh	w0, [x23, 80]
 	add	w21, w21, w4
 	and	w21, w21, 65535
 	cmp	w0, w1
-	beq	.L2775
-	adrp	x1, .LANCHOR29
+	beq	.L3126
+	adrp	x1, .LANCHOR7
 	cmp	w21, 7
-	mov	w23, 3
+	mov	w22, 3
 	adrp	x24, .LANCHOR70
-	ldr	w1, [x1, #:lo12:.LANCHOR29]
-	csinc	w23, w23, wzr, hi
-	tbz	x1, 8, .L2777
-	ldrh	w7, [x22, 122]
+	ldr	w1, [x1, #:lo12:.LANCHOR7]
+	csinc	w22, w22, wzr, hi
+	tbz	x1, 8, .L3128
+	ldrh	w7, [x23, 122]
 	mov	w4, w21
-	ldrh	w6, [x22, 120]
+	ldrh	w6, [x23, 120]
 	mov	w3, w20
-	ldrh	w5, [x22, 124]
+	ldrh	w5, [x23, 124]
 	mov	w1, 1705
 	ldrb	w2, [x24, #:lo12:.LANCHOR70]
 	str	w0, [sp]
-	adrp	x0, .LC153
-	add	x0, x0, :lo12:.LC153
+	adrp	x0, .LC214
+	add	x0, x0, :lo12:.LC214
 	bl	printf
-.L2777:
+.L3128:
 	ldrb	w0, [x24, #:lo12:.LANCHOR70]
 	mov	w2, 1
-	mov	w1, w23
+	mov	w1, w22
 	bl	gc_search_src_blk
 	cmp	w0, 0
-	ble	.L2868
-.L2778:
+	ble	.L3222
+.L3129:
 	mov	w0, 1
-.L2889:
-	strb	w0, [x19, #:lo12:.LANCHOR130]
-	b	.L2868
-.L2775:
+.L3245:
+	strb	w0, [x19, #:lo12:.LANCHOR135]
+	b	.L3222
+.L3126:
 	adrp	x0, .LANCHOR84
-	cmp	w24, 1
+	cmp	w22, 1
 	ldrh	w25, [x0, #:lo12:.LANCHOR84]
 	adrp	x0, .LANCHOR82
 	ldrh	w26, [x0, #:lo12:.LANCHOR82]
-	bne	.L2779
+	bne	.L3130
 	bl	gc_scan_static_data
 	bl	gc_static_wearleveling
-.L2780:
-	ldr	x2, [x23, #:lo12:.LANCHOR5]
+.L3131:
+	ldr	x2, [x24, #:lo12:.LANCHOR5]
 	adrp	x1, .LANCHOR70
 	mov	w0, 1
-	mov	x23, x1
+	mov	x24, x1
 	strb	w0, [x1, #:lo12:.LANCHOR70]
 	ldrh	w5, [x2, 124]
-	cbz	w5, .L2782
-	strb	w0, [x19, #:lo12:.LANCHOR130]
-	adrp	x0, .LANCHOR29
+	cbz	w5, .L3133
+	strb	w0, [x19, #:lo12:.LANCHOR135]
+	adrp	x0, .LANCHOR7
 	strb	wzr, [x1, #:lo12:.LANCHOR70]
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 8, .L2868
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 8, .L3222
 	ldrh	w7, [x2, 122]
 	mov	w4, w21
 	ldrh	w6, [x2, 120]
 	mov	w3, w20
 	mov	w2, 0
 	mov	w1, 1762
-	adrp	x0, .LC154
-	add	x0, x0, :lo12:.LC154
+	adrp	x0, .LC215
+	add	x0, x0, :lo12:.LC215
 	bl	printf
-	b	.L2868
-.L2779:
+	b	.L3222
+.L3130:
 	adrp	x0, .LANCHOR73
 	ldrh	w0, [x0, #:lo12:.LANCHOR73]
 	cmp	w0, w20
-	bcs	.L2780
-.L2868:
+	bcs	.L3131
+.L3222:
 	mov	w0, 16
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
@@ -18340,321 +19916,329 @@ zftl_do_gc:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 96
 	ret
-.L2782:
-	adrp	x22, .LANCHOR73
-	ldrh	w1, [x22, #:lo12:.LANCHOR73]
+.L3133:
+	adrp	x23, .LANCHOR73
+	ldrh	w1, [x23, #:lo12:.LANCHOR73]
 	cmp	w20, w1
-	bcs	.L2783
+	bcs	.L3134
 	cmp	w21, 1
-	bls	.L2784
+	bls	.L3135
 	cmp	w21, 16
-	bls	.L2785
+	bls	.L3136
 	adrp	x1, .LANCHOR86
 	ldrh	w2, [x1, #:lo12:.LANCHOR86]
 	adrp	x1, .LANCHOR87
 	ldrh	w1, [x1, #:lo12:.LANCHOR87]
 	cmp	w2, w1
-	bcs	.L2785
+	bcs	.L3136
 	mov	w2, 16
 	mov	w1, 3
-.L2886:
+.L3242:
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-.L2786:
-	cbnz	w0, .L2778
-	b	.L2868
-.L2785:
+.L3137:
+	cbnz	w0, .L3129
+	b	.L3222
+.L3136:
 	mov	w2, 2
 	mov	w1, w2
 	mov	w0, 1
-.L2893:
+.L3248:
 	bl	gc_search_src_blk
 	tst	w0, 65535
-	bne	.L2778
+	bne	.L3129
 	mov	w2, 2
-	b	.L2887
-.L2784:
-	adrp	x0, .LANCHOR29
-	strb	wzr, [x23, #:lo12:.LANCHOR70]
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 8, .L2788
+	b	.L3243
+.L3135:
+	adrp	x0, .LANCHOR7
+	strb	wzr, [x24, #:lo12:.LANCHOR70]
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 8, .L3139
 	ldrh	w7, [x2, 122]
-	adrp	x0, .LC154
+	adrp	x0, .LC215
 	ldrh	w6, [x2, 120]
 	mov	w5, 0
 	mov	w4, w21
 	mov	w3, w20
 	mov	w2, 0
 	mov	w1, 1778
-	add	x0, x0, :lo12:.LC154
+	add	x0, x0, :lo12:.LC215
 	bl	printf
-.L2788:
+.L3139:
 	cmp	w20, 16
-	bls	.L2789
+	bls	.L3140
 	mov	w2, 4
-.L2887:
+.L3243:
 	mov	w1, 3
-	ldrb	w0, [x23, #:lo12:.LANCHOR70]
-	b	.L2886
-.L2789:
+	ldrb	w0, [x24, #:lo12:.LANCHOR70]
+	b	.L3242
+.L3140:
 	mov	w2, 1
-	ldrb	w0, [x23, #:lo12:.LANCHOR70]
+	ldrb	w0, [x24, #:lo12:.LANCHOR70]
 	mov	w1, w2
-	b	.L2893
-.L2783:
-	cmp	w24, 1
+	b	.L3248
+.L3134:
+	cmp	w22, 1
 	lsl	w1, w1, 1
-	bne	.L2791
+	bne	.L3142
 	cmp	w20, w1
-	bge	.L2791
+	bge	.L3142
 	add	w0, w25, w26
 	and	w0, w0, 65535
 	cmp	w0, w21, lsr 1
-	bcs	.L2792
+	bcs	.L3143
 	adrp	x1, .LANCHOR86
 	ldrh	w2, [x1, #:lo12:.LANCHOR86]
 	adrp	x1, .LANCHOR87
 	ldrh	w1, [x1, #:lo12:.LANCHOR87]
 	cmp	w2, w1
-	bcs	.L2792
-.L2796:
+	bcs	.L3143
+.L3147:
 	adrp	x0, .LANCHOR83
 	ldrh	w0, [x0, #:lo12:.LANCHOR83]
 	lsr	w0, w0, 1
-	strh	w0, [x22, #:lo12:.LANCHOR73]
-	b	.L2868
-.L2792:
+	strh	w0, [x23, #:lo12:.LANCHOR73]
+	b	.L3222
+.L3143:
 	cmp	w21, 1
-	adrp	x24, .LANCHOR83
-	bls	.L2793
+	adrp	x22, .LANCHOR83
+	bls	.L3144
 	cmp	w21, 16
-	bls	.L2794
+	bls	.L3145
 	mov	w2, 8
 	mov	w1, 3
 	mov	w0, 1
-.L2884:
+.L3240:
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-.L2795:
-	ldrh	w1, [x24, #:lo12:.LANCHOR83]
-	strh	w1, [x22, #:lo12:.LANCHOR73]
-	b	.L2786
-.L2794:
+.L3146:
+	ldrh	w1, [x22, #:lo12:.LANCHOR83]
+	strh	w1, [x23, #:lo12:.LANCHOR73]
+	b	.L3137
+.L3145:
 	mov	w2, 2
 	mov	w0, 1
 	mov	w1, w2
 	bl	gc_search_src_blk
 	ands	w0, w0, 65535
-	bne	.L2795
+	bne	.L3146
 	mov	w2, 2
 	mov	w1, 3
-	ldrb	w0, [x23, #:lo12:.LANCHOR70]
-	b	.L2884
-.L2793:
+	ldrb	w0, [x24, #:lo12:.LANCHOR70]
+	b	.L3240
+.L3144:
 	cmp	w20, w0
-	bcs	.L2796
-	strb	wzr, [x23, #:lo12:.LANCHOR70]
+	bcs	.L3147
+	strb	wzr, [x24, #:lo12:.LANCHOR70]
 	mov	w2, 8
 	mov	w1, 3
 	mov	w0, 0
-	b	.L2884
-.L2791:
+	b	.L3240
+.L3142:
 	cmp	w20, w1
-	bge	.L2796
-	b	.L2868
-.L2768:
+	bge	.L3147
+	b	.L3222
+.L3119:
 	adrp	x7, .LANCHOR63
 	mov	w0, 65535
 	ldrh	w1, [x7, #:lo12:.LANCHOR63]
 	cmp	w1, w0
-	bne	.L2797
+	bne	.L3148
 	bl	gc_get_src_blk
 	strh	w0, [x7, #:lo12:.LANCHOR63]
-.L2797:
+.L3148:
 	ldrh	w3, [x7, #:lo12:.LANCHOR63]
 	mov	w0, 65535
 	add	x1, x7, :lo12:.LANCHOR63
 	cmp	w3, w0
-	beq	.L2798
+	beq	.L3149
 	adrp	x0, .LANCHOR3
 	ldrh	w5, [x1, 56]
 	uxtw	x4, w3
 	ldr	x2, [x0, #:lo12:.LANCHOR3]
 	add	x2, x2, x4, lsl 2
-	cbz	w5, .L2799
+	cbz	w5, .L3150
 	add	x1, x1, 58
 	mov	w0, 0
-.L2801:
+.L3152:
 	ldrh	w6, [x1], 2
 	cmp	w6, w3
-	bne	.L2800
-.L2804:
+	bne	.L3151
+.L3156:
 	adrp	x0, .LANCHOR63
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR63]
-	b	.L2868
-.L2800:
+	b	.L3222
+.L3151:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w5, w0
-	bne	.L2801
-.L2799:
+	bne	.L3152
+.L3150:
 	ldrb	w0, [x2, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L2802
+	beq	.L3153
 	tst	w0, 192
-	bne	.L2803
-.L2802:
+	bne	.L3154
+.L3153:
 	adrp	x0, .LANCHOR4
 	ldr	x0, [x0, #:lo12:.LANCHOR4]
 	ldrh	w0, [x0, x4, lsl 1]
-	cbz	w0, .L2804
-	adrp	x1, .LANCHOR193
-	adrp	x0, .LC0
+	cbz	w0, .L3156
 	mov	w2, 1972
-	add	x1, x1, :lo12:.LANCHOR193
+	adrp	x1, .LANCHOR208
+	adrp	x0, .LC0
+	add	x1, x1, :lo12:.LANCHOR208
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2805:
-	b	.L2805
-.L2803:
+	b	.L3156
+.L3154:
 	mov	w0, 2
-	b	.L2889
-.L2798:
-	strb	wzr, [x19, #:lo12:.LANCHOR130]
-	b	.L2868
-.L2769:
+	b	.L3245
+.L3149:
+	strb	wzr, [x19, #:lo12:.LANCHOR135]
+	b	.L3222
+.L3120:
 	bl	gc_scan_src_blk
 	cmn	w0, #1
-	bne	.L2806
+	bne	.L3157
 	mov	w0, 3
-	b	.L2889
-.L2806:
-	adrp	x21, .LANCHOR63
-	mov	w1, 65535
-	add	x20, x21, :lo12:.LANCHOR63
-	ldrh	w0, [x21, #:lo12:.LANCHOR63]
-	cmp	w0, w1
-	beq	.L2778
-	ldrh	w1, [x20, 24]
-	cbz	w1, .L2807
+	b	.L3245
+.L3157:
+	adrp	x20, .LANCHOR63
+	mov	w2, 65535
+	add	x1, x20, :lo12:.LANCHOR63
+	ldrh	w0, [x20, #:lo12:.LANCHOR63]
+	cmp	w0, w2
+	beq	.L3129
+	ldrh	w2, [x1, 24]
+	cbz	w2, .L3158
 	mov	w0, 4
-	strh	wzr, [x20, 26]
-	strb	w0, [x19, #:lo12:.LANCHOR130]
-	b	.L2868
-.L2807:
+	strh	wzr, [x1, 26]
+	strb	w0, [x19, #:lo12:.LANCHOR135]
+	b	.L3222
+.L3158:
 	mov	w1, 1
-	strb	w1, [x19, #:lo12:.LANCHOR130]
+	strb	w1, [x19, #:lo12:.LANCHOR135]
 	adrp	x19, .LANCHOR4
-	ubfiz	x1, x0, 1, 16
-	ldr	x2, [x19, #:lo12:.LANCHOR4]
-	ldrh	w1, [x2, x1]
-	cbz	w1, .L2808
-	adrp	x1, .LANCHOR193
+	ubfiz	x0, x0, 1, 16
+	ldr	x1, [x19, #:lo12:.LANCHOR4]
+	ldrh	w0, [x1, x0]
+	cbz	w0, .L3159
+	adrp	x1, .LANCHOR208
 	adrp	x0, .LC0
 	mov	w2, 2000
-	add	x1, x1, :lo12:.LANCHOR193
+	add	x1, x1, :lo12:.LANCHOR208
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2809:
-	b	.L2809
-.L2808:
+.L3159:
+	ldrh	w0, [x20, #:lo12:.LANCHOR63]
+	add	x21, x20, :lo12:.LANCHOR63
+	ldr	x2, [x19, #:lo12:.LANCHOR4]
+	ubfiz	x1, x0, 1, 16
+	ldrh	w1, [x2, x1]
+	cbnz	w1, .L3156
 	bl	ftl_free_sblk
 	ldr	x0, [x19, #:lo12:.LANCHOR4]
-	ldrh	w1, [x21, #:lo12:.LANCHOR63]
+	ldrh	w1, [x20, #:lo12:.LANCHOR63]
 	strh	wzr, [x0, x1, lsl 1]
-	ldrh	w0, [x20, 30]
+	ldrh	w0, [x21, 30]
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	strh	w0, [x20, 30]
 	cmp	w0, 8
-	bls	.L2804
-	strh	wzr, [x20, 30]
+	bhi	.L3161
+	strh	w0, [x21, 30]
+	b	.L3156
+.L3161:
+	strh	wzr, [x21, 30]
 	bl	ftl_flush
 	bl	pm_flush
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L2804
-.L2770:
+	b	.L3156
+.L3121:
 	adrp	x22, .LANCHOR63
 	adrp	x23, .LANCHOR80
 	add	x21, x22, :lo12:.LANCHOR63
 	add	x23, x23, :lo12:.LANCHOR80
-.L2869:
+.L3223:
 	bl	gc_scan_src_blk_one_page
 	ldrh	w1, [x21, 2]
 	ldrh	w0, [x23]
 	cmp	w1, w0
-	bcs	.L2810
+	bcs	.L3162
 	cmp	w20, 7
-	bls	.L2869
-	b	.L2868
-.L2810:
+	bls	.L3223
+	b	.L3222
+.L3162:
 	ldrh	w3, [x21, 24]
-	adrp	x0, .LANCHOR29
-	cbz	w3, .L2811
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	adrp	x0, .LANCHOR7
+	cbz	w3, .L3163
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
 	mov	w1, 4
 	strh	wzr, [x21, 26]
-	strb	w1, [x19, #:lo12:.LANCHOR130]
+	strb	w1, [x19, #:lo12:.LANCHOR135]
 	adrp	x19, .LANCHOR4
-	tbz	x0, 8, .L2812
+	tbz	x0, 8, .L3164
 	ldrh	w1, [x21]
 	ldr	x2, [x19, #:lo12:.LANCHOR4]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC155
-	add	x0, x0, :lo12:.LC155
+	adrp	x0, .LC216
+	add	x0, x0, :lo12:.LC216
 	bl	printf
-.L2812:
+.L3164:
 	ldrh	w2, [x22, #:lo12:.LANCHOR63]
 	add	x0, x22, :lo12:.LANCHOR63
 	ldr	x1, [x19, #:lo12:.LANCHOR4]
 	ldrh	w0, [x0, 24]
 	ldrh	w1, [x1, x2, lsl 1]
 	cmp	w1, w0
-	beq	.L2868
-	adrp	x1, .LANCHOR193
+	beq	.L3165
+	adrp	x1, .LANCHOR208
 	adrp	x0, .LC0
 	mov	w2, 2034
-	add	x1, x1, :lo12:.LANCHOR193
+	add	x1, x1, :lo12:.LANCHOR208
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2813:
-	b	.L2813
-.L2811:
+.L3165:
+	add	x0, x22, :lo12:.LANCHOR63
+	ldrh	w1, [x22, #:lo12:.LANCHOR63]
+	ldrh	w2, [x0, 24]
+	ldr	x0, [x19, #:lo12:.LANCHOR4]
+	strh	w2, [x0, x1, lsl 1]
+	b	.L3222
+.L3163:
 	adrp	x2, .LANCHOR3
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
 	ldrh	w1, [x21]
 	ldr	x20, [x2, #:lo12:.LANCHOR3]
 	mov	w2, 1
-	strb	w2, [x19, #:lo12:.LANCHOR130]
+	strb	w2, [x19, #:lo12:.LANCHOR135]
 	add	x20, x20, x1, uxth 2
-	tbz	x0, 8, .L2814
+	tbz	x0, 8, .L3166
 	ldrb	w2, [x20, 2]
-	adrp	x0, .LC156
-	add	x0, x0, :lo12:.LC156
+	adrp	x0, .LC217
+	add	x0, x0, :lo12:.LC217
 	ubfx	x2, x2, 5, 3
 	bl	printf
-.L2814:
+.L3166:
 	ldrb	w0, [x20, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L2815
+	beq	.L3167
 	tst	w0, 192
-	bne	.L2816
-.L2815:
-	adrp	x1, .LANCHOR193
+	bne	.L3168
+.L3167:
+	adrp	x1, .LANCHOR208
 	adrp	x0, .LC0
 	mov	w2, 2044
-	add	x1, x1, :lo12:.LANCHOR193
+	add	x1, x1, :lo12:.LANCHOR208
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2817:
-	b	.L2817
-.L2816:
+.L3168:
 	ldrh	w0, [x22, #:lo12:.LANCHOR63]
 	add	x19, x22, :lo12:.LANCHOR63
 	bl	ftl_free_sblk
@@ -18663,108 +20247,109 @@ zftl_do_gc:
 	ldrh	w0, [x19, 30]
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	strh	w0, [x19, 30]
 	cmp	w0, 8
-	bls	.L2868
+	bhi	.L3169
+	strh	w0, [x19, 30]
+	b	.L3222
+.L3169:
 	strh	wzr, [x19, 30]
-.L2890:
+.L3246:
 	bl	flt_sys_flush
-	b	.L2868
-.L2771:
-	ldrh	w1, [x22, 80]
+	b	.L3222
+.L3122:
+	ldrh	w1, [x23, 80]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2818
+	bne	.L3170
 	adrp	x0, .LANCHOR70
 	ldrb	w0, [x0, #:lo12:.LANCHOR70]
 	cmp	w0, 1
-	bne	.L2818
+	bne	.L3170
 	bl	ftl_flush
 	ldrh	w0, [x25, #:lo12:.LANCHOR93]
-	cbz	w0, .L2819
-.L2888:
-	mov	w1, 5
+	cbz	w0, .L3171
+.L3244:
 	lsr	w0, w0, 1
+	mov	w1, 5
 	bl	zftl_get_free_sblk
-	and	w20, w0, 65535
-	mov	w1, 65535
-	cmp	w20, w1
-	beq	.L2821
-	adrp	x1, .LANCHOR3
-	ldr	x2, [x1, #:lo12:.LANCHOR3]
-	add	x2, x2, x20, uxth 2
-	ldrb	w1, [x2, 2]
-	tst	w1, 224
-	beq	.L2822
-	adrp	x1, .LANCHOR193
+	and	w21, w0, 65535
+	mov	w19, w21
+	mov	w0, 65535
+	cmp	w21, w0
+	beq	.L3173
+	adrp	x0, .LANCHOR3
+	ldr	x20, [x0, #:lo12:.LANCHOR3]
+	add	x20, x20, x21, uxth 2
+	ldrb	w0, [x20, 2]
+	tst	w0, 224
+	beq	.L3174
+	adrp	x1, .LANCHOR208
 	adrp	x0, .LC0
 	mov	w2, 2069
-	add	x1, x1, :lo12:.LANCHOR193
+	add	x1, x1, :lo12:.LANCHOR208
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2823:
-	b	.L2823
-.L2819:
-	adrp	x0, .LANCHOR91
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
-	b	.L2888
-.L2822:
-	mov	w21, 5
-	bfi	w1, w21, 5, 3
-	orr	w1, w1, 16
-	strb	w1, [x2, 2]
+.L3174:
+	ldrb	w0, [x20, 2]
+	mov	w1, 5
+	bfi	w0, w1, 5, 3
+	orr	w0, w0, 16
+	strb	w0, [x20, 2]
+.L3193:
 	mov	w1, 1
+	mov	w0, w19
 	bl	ftl_erase_sblk
-	strb	w21, [x22, 84]
-	add	x1, x22, 96
-	mov	w0, w20
+	adrp	x22, .LANCHOR71
+	mov	w0, 5
+	strb	w0, [x23, 84]
+	add	x1, x23, 96
+	mov	w0, w19
 	bl	ftl_get_blk_list_in_sblk
 	and	w0, w0, 255
 	adrp	x1, .LANCHOR80
-	strb	w0, [x22, 89]
-	adrp	x21, .LANCHOR72
-	strh	w20, [x22, 80]
+	adrp	x20, .LANCHOR72
+	strb	w0, [x23, 89]
 	ldrh	w1, [x1, #:lo12:.LANCHOR80]
-	strh	wzr, [x22, 82]
-	strb	wzr, [x22, 85]
-	strh	wzr, [x22, 90]
+	ldrh	w2, [x22, #:lo12:.LANCHOR71]
+	strh	w19, [x23, 80]
+	strh	wzr, [x23, 82]
 	mul	w0, w0, w1
+	strb	wzr, [x23, 85]
+	strh	w0, [x23, 86]
 	mov	w1, 255
-	strh	w0, [x22, 86]
-	adrp	x22, .LANCHOR71
-	ldrb	w0, [x21, #:lo12:.LANCHOR72]
-	ldrh	w2, [x22, #:lo12:.LANCHOR71]
+	ldrb	w0, [x20, #:lo12:.LANCHOR72]
+	strh	wzr, [x23, 90]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR131
-	ldr	x0, [x0, #:lo12:.LANCHOR131]
+	adrp	x0, .LANCHOR136
+	ldr	x0, [x0, #:lo12:.LANCHOR136]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	ldrb	w0, [x21, #:lo12:.LANCHOR72]
+	ldrb	w0, [x20, #:lo12:.LANCHOR72]
 	mov	w1, 255
 	ldrh	w2, [x22, #:lo12:.LANCHOR71]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR132
-	ldr	x0, [x0, #:lo12:.LANCHOR132]
+	adrp	x0, .LANCHOR137
+	ldr	x0, [x0, #:lo12:.LANCHOR137]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	ldrb	w0, [x21, #:lo12:.LANCHOR72]
+	ldrb	w0, [x20, #:lo12:.LANCHOR72]
 	mov	w1, 255
 	ldrh	w2, [x22, #:lo12:.LANCHOR71]
 	mul	w2, w2, w0
 	adrp	x0, .LANCHOR68
 	ldr	x0, [x0, #:lo12:.LANCHOR68]
 	bl	ftl_memset
-	ldr	x0, [x23, #:lo12:.LANCHOR5]
+	ldr	x0, [x24, #:lo12:.LANCHOR5]
 	mov	w1, -1
-	str	w20, [x0, 132]
+	str	w21, [x0, 132]
 	strh	w1, [x0, 128]
 	strh	w1, [x0, 130]
 	bl	pm_flush
 	bl	ftl_ext_info_flush
-	adrp	x0, .LANCHOR53
+	adrp	x0, .LANCHOR101
 	mov	w1, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR53]
-	strh	w20, [x0, 126]
+	ldr	x0, [x0, #:lo12:.LANCHOR101]
+	strh	w19, [x0, 126]
 	adrp	x0, .LANCHOR63
 	add	x0, x0, :lo12:.LANCHOR63
 	str	w1, [x0, 320]
@@ -18774,122 +20359,171 @@ zftl_do_gc:
 	strh	wzr, [x0, 318]
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L2868
-.L2818:
-	cmp	w24, 1
-	mov	w21, 4
-	csinc	w21, w21, wzr, eq
+	b	.L3222
+.L3171:
+	adrp	x0, .LANCHOR91
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	b	.L3244
+.L3170:
+	cmp	w22, 1
+	mov	w22, 4
+	csinc	w22, w22, wzr, eq
 	cmp	w20, 15
-	mov	w0, w21
-	add	w21, w21, 4
+	mov	w0, w22
+	add	w22, w22, 4
 	adrp	x25, .LANCHOR70
-	adrp	x24, .LANCHOR63
-	csel	w21, w21, w0, ls
+	adrp	x21, .LANCHOR63
+	csel	w22, w22, w0, ls
 	add	x25, x25, :lo12:.LANCHOR70
-	add	x20, x24, :lo12:.LANCHOR63
-	add	x26, x22, 80
-.L2827:
-	sub	w21, w21, #1
-	and	w21, w21, 255
-	cmp	w21, 255
-	beq	.L2868
+	add	x20, x21, :lo12:.LANCHOR63
+	add	x26, x23, 80
+.L3177:
+	sub	w22, w22, #1
+	and	w22, w22, 255
+	cmp	w22, 255
+	beq	.L3222
 	bl	gc_do_copy_back
 	ldrb	w0, [x25]
-	cbnz	w0, .L2828
-	adrp	x0, .LANCHOR45
-	ldrb	w0, [x0, #:lo12:.LANCHOR45]
+	cbnz	w0, .L3178
+	adrp	x0, .LANCHOR48
+	ldrb	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 3
-	bhi	.L2829
+	bhi	.L3179
 	bl	ftl_write_commit
-.L2829:
+.L3179:
 	ldrh	w1, [x20, 26]
 	ldrh	w0, [x20, 24]
 	cmp	w1, w0
-	bcc	.L2827
+	bcc	.L3177
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR130]
+	strb	w0, [x19, #:lo12:.LANCHOR135]
 	bl	ftl_write_commit
 	bl	ftl_flush
-	ldrh	w0, [x20]
-	adrp	x2, .LANCHOR4
-	ldr	x2, [x2, #:lo12:.LANCHOR4]
-	ubfiz	x1, x0, 1, 16
-	ldrh	w1, [x2, x1]
-	cbz	w1, .L2831
-	adrp	x1, .LANCHOR193
+	adrp	x0, .LANCHOR4
+	ldrh	w2, [x20]
+	mov	x20, x0
+	ldr	x1, [x0, #:lo12:.LANCHOR4]
+	ldrh	w1, [x1, x2, lsl 1]
+	cbz	w1, .L3181
+	adrp	x1, .LANCHOR208
 	adrp	x0, .LC0
 	mov	w2, 2144
-	add	x1, x1, :lo12:.LANCHOR193
+	add	x1, x1, :lo12:.LANCHOR208
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2832:
-	b	.L2832
-.L2831:
+.L3181:
+	ldrh	w1, [x21, #:lo12:.LANCHOR63]
+	add	x19, x21, :lo12:.LANCHOR63
+	ldr	x2, [x20, #:lo12:.LANCHOR4]
+	ubfiz	x0, x1, 1, 16
+	ldrh	w2, [x2, x0]
+	cbnz	w2, .L3182
+	mov	w0, w1
 	bl	ftl_free_sblk
-.L2891:
-	mov	w0, -1
-	strh	w0, [x20]
-	b	.L2868
-.L2828:
+	b	.L3156
+.L3182:
+	ldrh	w3, [x19, 24]
+	adrp	x22, .LANCHOR64
+	adrp	x0, .LC218
+	add	x0, x0, :lo12:.LC218
+	bl	printf
+	ldr	x1, [x22, #:lo12:.LANCHOR64]
+	mov	w2, 4
+	ldrh	w3, [x19, 24]
+	adrp	x0, .LC219
+	add	x0, x0, :lo12:.LC219
+	add	w3, w3, 1
+	bl	rknand_print_hex
+	ldrh	w1, [x21, #:lo12:.LANCHOR63]
+	ldr	x2, [x20, #:lo12:.LANCHOR4]
+	ldrh	w5, [x19, 28]
+	ubfiz	x0, x1, 1, 16
+	ldrh	w4, [x19, 26]
+	ldrh	w3, [x19, 24]
+	ldrh	w2, [x2, x0]
+	adrp	x0, .LC220
+	add	x0, x0, :lo12:.LC220
+	bl	printf
+	ldrh	w0, [x21, #:lo12:.LANCHOR63]
+	mov	x1, 0
+	bl	ftl_sblk_dump
+	bl	gc_scan_src_blk
+	ldrh	w1, [x21, #:lo12:.LANCHOR63]
+	ldr	x2, [x20, #:lo12:.LANCHOR4]
+	ldrh	w3, [x19, 24]
+	ubfiz	x0, x1, 1, 16
+	ldrh	w2, [x2, x0]
+	adrp	x0, .LC221
+	add	x0, x0, :lo12:.LC221
+	bl	printf
+	ldrh	w3, [x19, 24]
+	mov	w2, 4
+	ldr	x1, [x22, #:lo12:.LANCHOR64]
+	adrp	x0, .LC222
+	add	x0, x0, :lo12:.LC222
+	bl	rknand_print_hex
+	b	.L3156
+.L3178:
 	ldrh	w0, [x20, 318]
-	cbz	w0, .L2833
+	cbz	w0, .L3183
 	ldr	w0, [x20, 320]
 	strh	wzr, [x20, 318]
 	cmn	w0, #1
-	beq	.L2834
+	beq	.L3184
 	bl	ftl_mask_bad_block
-.L2834:
-	ldr	x0, [x23, #:lo12:.LANCHOR5]
-	add	x20, x24, :lo12:.LANCHOR63
+.L3184:
+	ldr	x0, [x24, #:lo12:.LANCHOR5]
+	add	x20, x21, :lo12:.LANCHOR63
 	strh	wzr, [x20, 56]
 	ldrh	w0, [x0, 80]
 	str	wzr, [x20, 320]
 	bl	ftl_free_sblk
-	adrp	x2, .LANCHOR53
-	ldr	x1, [x23, #:lo12:.LANCHOR5]
+	adrp	x2, .LANCHOR101
+	ldr	x1, [x24, #:lo12:.LANCHOR5]
 	mov	w0, -1
-	ldr	x2, [x2, #:lo12:.LANCHOR53]
+	ldr	x2, [x2, #:lo12:.LANCHOR101]
 	strh	w0, [x1, 80]
 	strh	w0, [x2, 126]
 	strh	w0, [x1, 130]
 	ldr	x0, [x20, 8]
-	cbz	x0, .L2835
+	cbz	x0, .L3185
 	bl	buf_free
-.L2835:
-	add	x24, x24, :lo12:.LANCHOR63
-	str	xzr, [x24, 8]
+.L3185:
+	add	x21, x21, :lo12:.LANCHOR63
+	str	xzr, [x21, 8]
 	bl	flt_sys_flush
-	adrp	x1, .LANCHOR193
-	adrp	x0, .LC0
-	strb	wzr, [x19, #:lo12:.LANCHOR130]
 	mov	w2, 2177
-	add	x1, x1, :lo12:.LANCHOR193
+	strb	wzr, [x19, #:lo12:.LANCHOR135]
+	adrp	x1, .LANCHOR208
+	adrp	x0, .LC0
+	add	x1, x1, :lo12:.LANCHOR208
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2836:
-	b	.L2836
-.L2833:
+	b	.L3222
+.L3183:
 	ldrh	w0, [x26, 6]
 	ldrh	w1, [x20, 26]
 	cmp	w0, 1
 	ldrh	w0, [x20, 24]
-	bls	.L2837
+	bls	.L3186
 	cmp	w1, w0
-	bcc	.L2827
+	bcc	.L3177
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR130]
+	strb	w0, [x19, #:lo12:.LANCHOR135]
 	ldrh	w0, [x20, 56]
 	add	w1, w0, 1
 	strh	w1, [x20, 56]
 	add	x0, x20, x0, sxtw 1
 	ldrh	w1, [x20]
 	strh	w1, [x0, 58]
-	b	.L2891
-.L2837:
+	mov	w0, -1
+	strh	w0, [x20]
+	b	.L3222
+.L3186:
 	mov	w2, 5
-	strb	w2, [x19, #:lo12:.LANCHOR130]
+	strb	w2, [x19, #:lo12:.LANCHOR135]
 	cmp	w1, w0
-	bcc	.L2838
+	bcc	.L3187
 	ldrh	w0, [x20, 56]
 	add	w1, w0, 1
 	strh	w1, [x20, 56]
@@ -18898,16 +20532,16 @@ zftl_do_gc:
 	strh	w1, [x0, 58]
 	mov	w0, -1
 	strh	w0, [x20]
-.L2838:
+.L3187:
 	bl	ftl_flush
 	bl	sblk_wait_write_queue_completed
 	bl	gc_write_completed
-	ldr	x0, [x23, #:lo12:.LANCHOR5]
-	ldrh	w1, [x22, 80]
+	ldr	x0, [x24, #:lo12:.LANCHOR5]
+	ldrh	w1, [x23, 80]
 	strh	w1, [x0, 128]
 	bl	pm_flush
 	bl	ftl_ext_info_flush
-	add	x0, x24, :lo12:.LANCHOR63
+	add	x0, x21, :lo12:.LANCHOR63
 	adrp	x1, .LANCHOR80
 	adrp	x2, .LANCHOR67
 	ldrh	w1, [x1, #:lo12:.LANCHOR80]
@@ -18916,61 +20550,60 @@ zftl_do_gc:
 	strh	w1, [x0, 18]
 	cmp	w2, 2
 	strh	w2, [x0, 20]
-	bne	.L2839
+	bne	.L3188
 	ubfiz	w1, w1, 1, 15
 	strh	w1, [x0, 18]
 	mov	w1, 1
 	strh	w1, [x0, 20]
-.L2839:
-	add	x24, x24, :lo12:.LANCHOR63
-	strh	wzr, [x24, 22]
-	b	.L2868
-.L2841:
+.L3188:
+	add	x21, x21, :lo12:.LANCHOR63
+	strh	wzr, [x21, 22]
+	b	.L3222
+.L3190:
 	ldrh	w1, [x25, 16]
 	ldrh	w0, [x25, 18]
 	cmp	w1, w0
-	bcc	.L2842
+	bcc	.L3191
 	mov	w0, 6
-	strb	w0, [x19, #:lo12:.LANCHOR130]
+	strb	w0, [x19, #:lo12:.LANCHOR135]
 	ldr	x0, [x25, 8]
 	bl	buf_free
 	str	xzr, [x25, 8]
-	b	.L2868
-.L2842:
+	b	.L3222
+.L3191:
 	cmp	w20, 7
-	bls	.L2774
-	cmp	w24, 1
-	bne	.L2868
-	add	w22, w22, 1
-	and	w22, w22, 255
-	cmp	w22, 4
-	bls	.L2774
-	b	.L2868
-.L2773:
+	bls	.L3125
+	cmp	w22, 1
+	bne	.L3222
+	add	w23, w23, 1
+	and	w23, w23, 255
+	cmp	w23, 4
+	bls	.L3125
+	b	.L3222
+.L3124:
 	bl	gc_update_l2p_map_new
 	mov	w20, -1
 	bl	gc_free_src_blk
 	bl	ftl_flush
 	bl	pm_flush
-	strh	w20, [x22, 80]
+	strh	w20, [x23, 80]
 	bl	ftl_ext_info_flush
-	adrp	x0, .LANCHOR53
-	ldr	x0, [x0, #:lo12:.LANCHOR53]
+	adrp	x0, .LANCHOR101
+	ldr	x0, [x0, #:lo12:.LANCHOR101]
 	strh	w20, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-	strb	wzr, [x19, #:lo12:.LANCHOR130]
+	strb	wzr, [x19, #:lo12:.LANCHOR135]
 	bl	print_ftl_debug_info
-	b	.L2868
-.L2821:
-	adrp	x1, .LANCHOR193
-	adrp	x0, .LC0
+	b	.L3222
+.L3173:
 	mov	w2, 2075
-	add	x1, x1, :lo12:.LANCHOR193
+	adrp	x1, .LANCHOR208
+	adrp	x0, .LC0
+	add	x1, x1, :lo12:.LANCHOR208
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2824:
-	b	.L2824
+	b	.L3193
 	.size	zftl_do_gc, .-zftl_do_gc
 	.section	.text.zftl_write,"ax",@progbits
 	.align	2
@@ -18981,38 +20614,38 @@ zftl_write:
 	add	x29, sp, 0
 	stp	x27, x28, [sp, 80]
 	mov	w27, w0
-	adrp	x0, .LANCHOR29
+	adrp	x0, .LANCHOR7
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	mov	w19, w1
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
 	mov	w20, w2
 	stp	x21, x22, [sp, 32]
 	mov	x24, x3
 	stp	x25, x26, [sp, 64]
-	tbz	x0, 12, .L2895
+	tbz	x0, 12, .L3250
 	mov	w3, w2
-	adrp	x0, .LC157
+	adrp	x0, .LC223
 	mov	w2, w1
-	add	x0, x0, :lo12:.LC157
+	add	x0, x0, :lo12:.LC223
 	mov	w1, w27
 	bl	printf
-.L2895:
-	cbnz	w27, .L2896
+.L3250:
+	cbnz	w27, .L3251
 	adrp	x0, .LANCHOR59
 	mov	w27, 24576
 	ldr	w0, [x0, #:lo12:.LANCHOR59]
-.L2897:
+.L3252:
 	add	w1, w19, w20
 	cmp	w0, w1
-	bcc	.L2911
-	adrp	x23, .LANCHOR52
+	bcc	.L3266
+	adrp	x23, .LANCHOR114
 	add	w27, w27, w19
 	sub	w19, w20, #1
-	adrp	x25, .LANCHOR53
-	ldrb	w0, [x23, #:lo12:.LANCHOR52]
+	adrp	x25, .LANCHOR101
+	ldrb	w0, [x23, #:lo12:.LANCHOR114]
 	add	w19, w19, w27
-	add	x23, x23, :lo12:.LANCHOR52
+	add	x23, x23, :lo12:.LANCHOR114
 	udiv	w22, w27, w0
 	udiv	w19, w19, w0
 	add	w0, w27, w20
@@ -19020,8 +20653,8 @@ zftl_write:
 	mov	w26, w22
 	sub	w21, w19, w22
 	add	w21, w21, 1
-.L2899:
-	cbnz	w21, .L2907
+.L3254:
+	cbnz	w21, .L3262
 	adrp	x20, .LANCHOR89
 	adrp	x19, .LANCHOR93
 	add	x20, x20, :lo12:.LANCHOR89
@@ -19030,14 +20663,14 @@ zftl_write:
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
-.L2908:
+.L3263:
 	ldrh	w0, [x20]
 	ldrh	w1, [x19]
 	add	w0, w0, w1
 	cmp	w0, 7
-	ble	.L2909
+	ble	.L3264
 	mov	w0, 0
-.L2894:
+.L3249:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -19045,28 +20678,28 @@ zftl_write:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2896:
+.L3251:
 	cmp	w27, 3
-	bhi	.L2911
+	bhi	.L3266
 	lsl	w27, w27, 13
 	mov	w0, 8192
-	b	.L2897
-.L2907:
+	b	.L3252
+.L3262:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbnz	x0, .L2900
+	cbnz	x0, .L3255
 	bl	ftl_write_commit
-	b	.L2899
-.L2900:
+	b	.L3254
+.L3255:
 	ldrb	w3, [x23]
 	cmp	w26, w22
 	strb	wzr, [x0, 57]
 	ccmp	w26, w19, 4, ne
 	strb	w3, [x0, 56]
-	bne	.L2903
+	bne	.L3258
 	cmp	w26, w22
-	bne	.L2904
+	bne	.L3259
 	udiv	w0, w27, w3
 	msub	w0, w0, w3, w27
 	and	w0, w0, 255
@@ -19075,9 +20708,9 @@ zftl_write:
 	and	w3, w3, 255
 	cmp	w20, w3
 	csel	w3, w20, w3, cc
-.L2916:
+.L3271:
 	strb	w3, [x28, 56]
-.L2903:
+.L3258:
 	ldr	x3, [x28, 8]
 	mov	x1, x24
 	ldrb	w0, [x28, 57]
@@ -19087,7 +20720,7 @@ zftl_write:
 	lsl	w2, w2, 9
 	add	x0, x3, x0
 	bl	ftl_memcpy
-	ldr	x1, [x25, #:lo12:.LANCHOR53]
+	ldr	x1, [x25, #:lo12:.LANCHOR101]
 	ldr	w0, [x1, 8]
 	str	w26, [x28, 36]
 	add	w26, w26, 1
@@ -19099,19 +20732,19 @@ zftl_write:
 	ldrb	w0, [x28, 56]
 	ubfiz	x0, x0, 9, 8
 	add	x24, x24, x0
-	b	.L2899
-.L2904:
+	b	.L3254
+.L3259:
 	ldr	w0, [x29, 108]
 	msub	w3, w3, w26, w0
-	b	.L2916
-.L2909:
+	b	.L3271
+.L3264:
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
-	b	.L2908
-.L2911:
+	b	.L3263
+.L3266:
 	mov	w0, -1
-	b	.L2894
+	b	.L3249
 	.size	zftl_write, .-zftl_write
 	.section	.text.zftl_vendor_write,"ax",@progbits
 	.align	2
@@ -19162,237 +20795,31 @@ FlashBootVendorWrite:
 	.global	ftl_write
 	.type	ftl_write, %function
 ftl_write:
-	and	w0, w0, 255
-	b	zftl_write
-	.size	ftl_write, .-ftl_write
-	.section	.text.zftl_discard,"ax",@progbits
-	.align	2
-	.global	zftl_discard
-	.type	zftl_discard, %function
-zftl_discard:
-	stp	x29, x30, [sp, -128]!
-	adrp	x2, .LANCHOR59
+	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	mov	w19, w1
-	ldr	w2, [x2, #:lo12:.LANCHOR59]
-	add	w1, w0, w1
+	mov	w19, w2
 	stp	x21, x22, [sp, 32]
-	stp	x23, x24, [sp, 48]
-	cmp	w2, w1
-	stp	x25, x26, [sp, 64]
-	stp	x27, x28, [sp, 80]
-	bcc	.L2942
-	adrp	x25, .LANCHOR52
-	adrp	x23, .LANCHOR194
-	add	w24, w0, 24576
-	adrp	x22, .LANCHOR53
-	ldrb	w21, [x25, #:lo12:.LANCHOR52]
-	ldr	w0, [x23, #:lo12:.LANCHOR194]
-	add	w0, w0, w19
-	str	w0, [x23, #:lo12:.LANCHOR194]
-	udiv	w20, w24, w21
-	ldr	x0, [x22, #:lo12:.LANCHOR53]
-	msub	w27, w20, w21, w24
-	ldr	w26, [x0, 8]
-	add	w1, w26, 1
-	str	w1, [x0, 8]
-	cbz	w27, .L2924
-	sub	w21, w21, w27
-	mov	w0, w20
-	cmp	w21, w19
-	csel	w21, w21, w19, ls
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 120]
-	cmn	w0, #1
-	bne	.L2925
-	mov	w2, 0
-	add	x1, x29, 120
-	mov	w0, w20
-	bl	pm_log2phys
-.L2925:
-	ldr	w0, [x29, 120]
-	and	w28, w21, 65535
-	cmn	w0, #1
-	beq	.L2927
-	mov	w0, 0
-	bl	buf_alloc
-	mov	x3, x0
-	cbz	x0, .L2927
-	strb	w27, [x0, 57]
-	ubfiz	x27, x27, 9, 25
-	strb	w21, [x0, 56]
-	mov	w1, 0
-	ldr	x0, [x0, 8]
-	lsl	w2, w28, 9
-	stp	w26, w20, [x3, 32]
-	str	x3, [x29, 104]
-	add	x0, x0, x27
-	bl	ftl_memset
-	ldr	x3, [x29, 104]
-	mov	x0, x3
-	bl	ftl_write_buf
-	bl	ftl_write_commit
-	ldr	x1, [x22, #:lo12:.LANCHOR53]
-	ldr	w0, [x1, 76]
-	add	w0, w0, 1
-	str	w0, [x1, 76]
-.L2927:
-	add	w20, w20, 1
-	sub	w19, w19, w28
-.L2924:
-	cbz	w19, .L2929
-	bl	ftl_flush
-.L2929:
-	adrp	x27, .LANCHOR96
-	add	x21, x25, :lo12:.LANCHOR52
-	add	x27, x27, :lo12:.LANCHOR96
-	mov	w0, -1
-	str	w0, [x29, 124]
-.L2930:
-	ldrb	w0, [x21]
-	cmp	w19, w0
-	bcs	.L2935
-	cbz	w19, .L2937
-	mov	w0, w20
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 120]
-	cmn	w0, #1
-	bne	.L2938
-	mov	w2, 0
-	add	x1, x29, 120
-	mov	w0, w20
-	bl	pm_log2phys
-.L2938:
-	ldr	w0, [x29, 120]
-	cmn	w0, #1
-	beq	.L2937
-	mov	w0, 0
-	bl	buf_alloc
-	mov	x21, x0
-	cbz	x0, .L2937
-	strb	wzr, [x0, 57]
-	strb	w19, [x0, 56]
-	stp	w26, w20, [x21, 32]
-	ldrb	w0, [x25, #:lo12:.LANCHOR52]
-	cmp	w19, w0
-	bcc	.L2940
-	adrp	x1, .LANCHOR195
-	adrp	x0, .LC0
-	mov	w2, 1117
-	add	x1, x1, :lo12:.LANCHOR195
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2941:
-	b	.L2941
-.L2935:
-	mov	w0, w20
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 120]
-	cmn	w0, #1
-	beq	.L2931
-	mov	w0, 0
-	bl	buf_alloc
-	mov	x28, x0
-	cbz	x0, .L2933
-	ldrb	w2, [x21]
-	mov	w1, 0
-	strb	w2, [x0, 56]
-	strb	wzr, [x0, 57]
-	ldr	x0, [x0, 8]
-	lsl	w2, w2, 9
-	stp	w26, w20, [x28, 32]
-	bl	ftl_memset
-	mov	x0, x28
-	bl	ftl_write_buf
-	bl	ftl_write_commit
-.L2963:
-	ldr	x1, [x22, #:lo12:.LANCHOR53]
-	ldr	w0, [x1, 76]
-	add	w0, w0, 1
-	str	w0, [x1, 76]
-.L2933:
-	ldrb	w0, [x21]
-	add	w20, w20, 1
-	sub	w19, w19, w0
-	b	.L2930
-.L2931:
-	mov	w2, 0
-	add	x1, x29, 120
-	mov	w0, w20
-	bl	pm_log2phys
-	ldr	w0, [x29, 120]
-	cmn	w0, #1
-	beq	.L2933
-	add	x1, x29, 124
-	mov	w2, 1
-	mov	w0, w20
-	bl	pm_log2phys
-	ldrh	w3, [x27]
-	mov	w1, 21
-	ldr	w0, [x29, 120]
-	sub	w2, w1, w3
-	mov	w1, 1
-	lsr	w0, w0, w3
-	lsl	w1, w1, w2
-	sub	w1, w1, #1
-	and	w1, w1, w0
-	adrp	x0, .LANCHOR95
-	ldrb	w0, [x0, #:lo12:.LANCHOR95]
-	udiv	w0, w1, w0
-	bl	ftl_vpn_decrement
-	b	.L2963
-.L2940:
-	ldr	x0, [x21, 8]
-	lsl	w2, w19, 9
-	mov	w1, 0
-	bl	ftl_memset
-	mov	x0, x21
-	bl	ftl_write_buf
-	bl	ftl_write_commit
-	ldr	x1, [x22, #:lo12:.LANCHOR53]
-	ldr	w0, [x1, 76]
-	add	w0, w0, 1
-	str	w0, [x1, 76]
-.L2937:
-	ldr	w1, [x23, #:lo12:.LANCHOR194]
-	cmp	w1, 8192
-	bls	.L2943
-	mov	w3, w19
-	mov	w2, w24
-	mov	w4, 0
-	adrp	x0, .LC158
-	add	x0, x0, :lo12:.LC158
-	bl	printf
-	str	wzr, [x23, #:lo12:.LANCHOR194]
-	bl	flt_sys_flush
-	adrp	x0, .LANCHOR196
-	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR196]
-.L2943:
+	mov	x20, x3
+	mov	w22, w1
+	ands	w21, w0, 255
+	bne	.L3277
+	mov	w3, w2
 	mov	w0, 0
-	b	.L2922
-.L2942:
-	mov	w0, -1
-.L2922:
+	mov	x2, x20
+	bl	idb_write_data
+.L3277:
+	mov	x3, x20
+	mov	w2, w19
+	mov	w1, w22
+	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 128
-	ret
-	.size	zftl_discard, .-zftl_discard
-	.section	.text.ftl_discard,"ax",@progbits
-	.align	2
-	.global	ftl_discard
-	.type	ftl_discard, %function
-ftl_discard:
-	mov	w0, w1
-	mov	w1, w2
-	b	zftl_discard
-	.size	ftl_discard, .-ftl_discard
+	ldp	x29, x30, [sp], 48
+	b	zftl_write
+	.size	ftl_write, .-ftl_write
 	.global	g_pm_spare
+	.global	pm_first_write
 	.global	pm_gc_enable
 	.global	pm_last_load_ram_id
 	.global	pm_last_update_ram_id
@@ -19414,6 +20841,8 @@ ftl_discard:
 	.global	gp_free_xlc_head
 	.global	gp_free_slc_head
 	.global	gp_sblk_list_tbl
+	.global	ftl_ext_info_first_write
+	.global	ftl_sys_info_first_write
 	.global	ftl_low_format_cur_blk
 	.global	ftl_power_lost_flag
 	.global	ftl_vpn_update_count
@@ -19496,6 +20925,7 @@ ftl_discard:
 	.global	nandc_hw_seed
 	.global	fill_spare_size
 	.global	g_nandc_ecc_bits
+	.global	g_nandc_tran_timeout
 	.global	g_nandc_ver
 	.global	gp_nandc
 	.global	hy_f26_ref_value
@@ -19537,7 +20967,7 @@ ftl_discard:
 	.global	g_flash_page_buffer
 	.section	.bss.IDByte,"aw",@nobits
 	.align	2
-	.set	.LANCHOR33,. + 0
+	.set	.LANCHOR38,. + 0
 	.type	IDByte, %object
 	.size	IDByte, 32
 IDByte:
@@ -19565,7 +20995,7 @@ _c_ftl_block_align_addr:
 	.zero	2
 	.section	.bss._c_ftl_byte_pre_page,"aw",@nobits
 	.align	1
-	.set	.LANCHOR173,. + 0
+	.set	.LANCHOR185,. + 0
 	.type	_c_ftl_byte_pre_page, %object
 	.size	_c_ftl_byte_pre_page, 2
 _c_ftl_byte_pre_page:
@@ -19616,55 +21046,55 @@ _c_ftl_planes_per_die:
 	.zero	1
 	.section	.bss._c_ftl_pm_page_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR161,. + 0
+	.set	.LANCHOR172,. + 0
 	.type	_c_ftl_pm_page_num, %object
 	.size	_c_ftl_pm_page_num, 2
 _c_ftl_pm_page_num:
 	.zero	2
 	.section	.bss._c_ftl_sec_per_page,"aw",@nobits
-	.set	.LANCHOR52,. + 0
+	.set	.LANCHOR114,. + 0
 	.type	_c_ftl_sec_per_page, %object
 	.size	_c_ftl_sec_per_page, 1
 _c_ftl_sec_per_page:
 	.zero	1
 	.section	.bss._c_max_pm_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR127,. + 0
+	.set	.LANCHOR131,. + 0
 	.type	_c_max_pm_sblk, %object
 	.size	_c_max_pm_sblk, 2
 _c_max_pm_sblk:
 	.zero	2
 	.section	.bss._c_mix_max_slc_ec_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR180,. + 0
+	.set	.LANCHOR192,. + 0
 	.type	_c_mix_max_slc_ec_count, %object
 	.size	_c_mix_max_slc_ec_count, 2
 _c_mix_max_slc_ec_count:
 	.zero	2
 	.section	.bss._c_mix_max_xlc_ec_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR181,. + 0
+	.set	.LANCHOR193,. + 0
 	.type	_c_mix_max_xlc_ec_count, %object
 	.size	_c_mix_max_xlc_ec_count, 2
 _c_mix_max_xlc_ec_count:
 	.zero	2
 	.section	.bss._c_swl_slc_gc_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR126,. + 0
+	.set	.LANCHOR130,. + 0
 	.type	_c_swl_slc_gc_th, %object
 	.size	_c_swl_slc_gc_th, 2
 _c_swl_slc_gc_th:
 	.zero	2
 	.section	.bss._c_swl_xlc_gc_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR125,. + 0
+	.set	.LANCHOR129,. + 0
 	.type	_c_swl_xlc_gc_th, %object
 	.size	_c_swl_xlc_gc_th, 2
 _c_swl_xlc_gc_th:
 	.zero	2
 	.section	.bss._c_totle_data_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR178,. + 0
+	.set	.LANCHOR190,. + 0
 	.type	_c_totle_data_density, %object
 	.size	_c_totle_data_density, 4
 _c_totle_data_density:
@@ -19678,7 +21108,7 @@ _c_totle_log_page:
 	.zero	4
 	.section	.bss._c_totle_phy_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR177,. + 0
+	.set	.LANCHOR189,. + 0
 	.type	_c_totle_phy_density, %object
 	.size	_c_totle_phy_density, 4
 _c_totle_phy_density:
@@ -19692,7 +21122,7 @@ _c_user_data_density:
 	.zero	4
 	.section	.bss._gc_after_discard_en,"aw",@nobits
 	.align	2
-	.set	.LANCHOR196,. + 0
+	.set	.LANCHOR207,. + 0
 	.type	_gc_after_discard_en, %object
 	.size	_gc_after_discard_en, 4
 _gc_after_discard_en:
@@ -19711,7 +21141,7 @@ _last_write_time:
 	.zero	4
 	.section	.bss._max_slc_super_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR179,. + 0
+	.set	.LANCHOR191,. + 0
 	.type	_max_slc_super_block, %object
 	.size	_max_slc_super_block, 2
 _max_slc_super_block:
@@ -19738,27 +21168,27 @@ check_vpc_tbl:
 	.zero	4608
 	.section	.bss.discard_sector_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR194,. + 0
+	.set	.LANCHOR205,. + 0
 	.type	discard_sector_count, %object
 	.size	discard_sector_count, 4
 discard_sector_count:
 	.zero	4
 	.section	.bss.fill_spare_size,"aw",@nobits
 	.align	1
-	.set	.LANCHOR38,. + 0
+	.set	.LANCHOR44,. + 0
 	.type	fill_spare_size, %object
 	.size	fill_spare_size, 2
 fill_spare_size:
 	.zero	2
 	.section	.bss.flash_read_retry,"aw",@nobits
 	.align	3
-	.set	.LANCHOR139,. + 0
+	.set	.LANCHOR145,. + 0
 	.type	flash_read_retry, %object
 	.size	flash_read_retry, 8
 flash_read_retry:
 	.zero	8
 	.section	.bss.free_buf_count,"aw",@nobits
-	.set	.LANCHOR45,. + 0
+	.set	.LANCHOR48,. + 0
 	.type	free_buf_count, %object
 	.size	free_buf_count, 1
 free_buf_count:
@@ -19790,9 +21220,15 @@ free_xlc_sblk:
 	.size	ftl_ext_info_data_buffer, 16384
 ftl_ext_info_data_buffer:
 	.zero	16384
+	.section	.bss.ftl_ext_info_first_write,"aw",@nobits
+	.set	.LANCHOR168,. + 0
+	.type	ftl_ext_info_first_write, %object
+	.size	ftl_ext_info_first_write, 1
+ftl_ext_info_first_write:
+	.zero	1
 	.section	.bss.ftl_flush_jiffies,"aw",@nobits
 	.align	2
-	.set	.LANCHOR190,. + 0
+	.set	.LANCHOR202,. + 0
 	.type	ftl_flush_jiffies, %object
 	.size	ftl_flush_jiffies, 4
 ftl_flush_jiffies:
@@ -19805,7 +21241,7 @@ ftl_info_data_buffer:
 	.zero	16384
 	.section	.bss.ftl_info_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR154,. + 0
+	.set	.LANCHOR163,. + 0
 	.type	ftl_info_spare, %object
 	.size	ftl_info_spare, 256
 ftl_info_spare:
@@ -19818,14 +21254,14 @@ ftl_info_spare:
 ftl_low_format_cur_blk:
 	.zero	2
 	.section	.bss.ftl_power_lost_flag,"aw",@nobits
-	.set	.LANCHOR157,. + 0
+	.set	.LANCHOR167,. + 0
 	.type	ftl_power_lost_flag, %object
 	.size	ftl_power_lost_flag, 1
 ftl_power_lost_flag:
 	.zero	1
 	.section	.bss.ftl_sblk_lpa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR105,. + 0
+	.set	.LANCHOR106,. + 0
 	.type	ftl_sblk_lpa_tbl, %object
 	.size	ftl_sblk_lpa_tbl, 8
 ftl_sblk_lpa_tbl:
@@ -19839,11 +21275,17 @@ ftl_sblk_vpn:
 	.zero	8
 	.section	.bss.ftl_sblk_vpn_update_id,"aw",@nobits
 	.align	1
-	.set	.LANCHOR110,. + 0
+	.set	.LANCHOR111,. + 0
 	.type	ftl_sblk_vpn_update_id, %object
 	.size	ftl_sblk_vpn_update_id, 2
 ftl_sblk_vpn_update_id:
 	.zero	2
+	.section	.bss.ftl_sys_info_first_write,"aw",@nobits
+	.set	.LANCHOR166,. + 0
+	.type	ftl_sys_info_first_write, %object
+	.size	ftl_sys_info_first_write, 1
+ftl_sys_info_first_write:
+	.zero	1
 	.section	.bss.ftl_tmp_buffer,"aw",@nobits
 	.align	6
 	.type	ftl_tmp_buffer, %object
@@ -19852,42 +21294,42 @@ ftl_tmp_buffer:
 	.zero	16384
 	.section	.bss.ftl_tmp_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR145,. + 0
+	.set	.LANCHOR152,. + 0
 	.type	ftl_tmp_spare, %object
 	.size	ftl_tmp_spare, 256
 ftl_tmp_spare:
 	.zero	256
 	.section	.bss.ftl_vpn_update_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR109,. + 0
+	.set	.LANCHOR110,. + 0
 	.type	ftl_vpn_update_count, %object
 	.size	ftl_vpn_update_count, 2
 ftl_vpn_update_count:
 	.zero	2
 	.section	.bss.g_block_align_addr,"aw",@nobits
 	.align	1
-	.set	.LANCHOR20,. + 0
+	.set	.LANCHOR26,. + 0
 	.type	g_block_align_addr, %object
 	.size	g_block_align_addr, 2
 g_block_align_addr:
 	.zero	2
 	.section	.bss.g_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR43,. + 0
+	.set	.LANCHOR46,. + 0
 	.type	g_buf, %object
 	.size	g_buf, 2048
 g_buf:
 	.zero	2048
 	.section	.bss.g_die_addr,"aw",@nobits
 	.align	2
-	.set	.LANCHOR122,. + 0
+	.set	.LANCHOR126,. + 0
 	.type	g_die_addr, %object
 	.size	g_die_addr, 32
 g_die_addr:
 	.zero	32
 	.section	.bss.g_die_cs_idx,"aw",@nobits
 	.align	2
-	.set	.LANCHOR17,. + 0
+	.set	.LANCHOR24,. + 0
 	.type	g_die_cs_idx, %object
 	.size	g_die_cs_idx, 8
 g_die_cs_idx:
@@ -19906,91 +21348,92 @@ g_flash_3d_tlc_flag:
 	.zero	1
 	.section	.bss.g_flash_blk_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR141,. + 0
+	.set	.LANCHOR148,. + 0
 	.type	g_flash_blk_info, %object
 	.size	g_flash_blk_info, 4
 g_flash_blk_info:
 	.zero	4
 	.section	.bss.g_flash_cur_mode,"aw",@nobits
-	.set	.LANCHOR27,. + 0
+	.align	3
+	.set	.LANCHOR33,. + 0
 	.type	g_flash_cur_mode, %object
-	.size	g_flash_cur_mode, 1
+	.size	g_flash_cur_mode, 4
 g_flash_cur_mode:
-	.zero	1
+	.zero	4
 	.section	.bss.g_flash_interface_mode,"aw",@nobits
-	.set	.LANCHOR32,. + 0
+	.set	.LANCHOR39,. + 0
 	.type	g_flash_interface_mode, %object
 	.size	g_flash_interface_mode, 1
 g_flash_interface_mode:
 	.zero	1
 	.section	.bss.g_flash_multi_page_prog_en,"aw",@nobits
-	.set	.LANCHOR30,. + 0
+	.set	.LANCHOR36,. + 0
 	.type	g_flash_multi_page_prog_en, %object
 	.size	g_flash_multi_page_prog_en, 1
 g_flash_multi_page_prog_en:
 	.zero	1
 	.section	.bss.g_flash_multi_page_read_en,"aw",@nobits
-	.set	.LANCHOR168,. + 0
+	.set	.LANCHOR182,. + 0
 	.type	g_flash_multi_page_read_en, %object
 	.size	g_flash_multi_page_read_en, 1
 g_flash_multi_page_read_en:
 	.zero	1
 	.section	.bss.g_flash_page_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR143,. + 0
+	.set	.LANCHOR150,. + 0
 	.type	g_flash_page_buffer, %object
 	.size	g_flash_page_buffer, 8
 g_flash_page_buffer:
 	.zero	8
 	.section	.bss.g_flash_reversd_blks,"aw",@nobits
-	.set	.LANCHOR147,. + 0
+	.set	.LANCHOR154,. + 0
 	.type	g_flash_reversd_blks, %object
 	.size	g_flash_reversd_blks, 1
 g_flash_reversd_blks:
 	.zero	1
 	.section	.bss.g_flash_slc_mode,"aw",@nobits
-	.set	.LANCHOR18,. + 0
+	.set	.LANCHOR11,. + 0
 	.type	g_flash_slc_mode, %object
 	.size	g_flash_slc_mode, 1
 g_flash_slc_mode:
 	.zero	1
 	.section	.bss.g_flash_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR142,. + 0
+	.set	.LANCHOR149,. + 0
 	.type	g_flash_spare_buffer, %object
 	.size	g_flash_spare_buffer, 8
 g_flash_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_sys_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR140,. + 0
+	.set	.LANCHOR147,. + 0
 	.type	g_flash_sys_spare_buffer, %object
 	.size	g_flash_sys_spare_buffer, 8
 g_flash_sys_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_tmp_page_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR135,. + 0
+	.set	.LANCHOR140,. + 0
 	.type	g_flash_tmp_page_buffer, %object
 	.size	g_flash_tmp_page_buffer, 8
 g_flash_tmp_page_buffer:
 	.zero	8
 	.section	.bss.g_flash_tmp_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR136,. + 0
+	.set	.LANCHOR142,. + 0
 	.type	g_flash_tmp_spare_buffer, %object
 	.size	g_flash_tmp_spare_buffer, 8
 g_flash_tmp_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_toggle_mode_en,"aw",@nobits
-	.set	.LANCHOR42,. + 0
+	.set	.LANCHOR14,. + 0
 	.type	g_flash_toggle_mode_en, %object
 	.size	g_flash_toggle_mode_en, 1
 g_flash_toggle_mode_en:
 	.zero	1
 	.section	.bss.g_ftl_info_blk,"aw",@nobits
 	.align	6
-	.set	.LANCHOR155,. + 0
+	.set	.LANCHOR164,. + 0
 	.type	g_ftl_info_blk, %object
 	.size	g_ftl_info_blk, 4
 g_ftl_info_blk:
@@ -20003,90 +21446,96 @@ g_ftl_info_blk:
 g_gc_info:
 	.zero	328
 	.section	.bss.g_idb_ecc_bits,"aw",@nobits
-	.set	.LANCHOR169,. + 0
+	.set	.LANCHOR10,. + 0
 	.type	g_idb_ecc_bits, %object
 	.size	g_idb_ecc_bits, 1
 g_idb_ecc_bits:
 	.zero	1
 	.section	.bss.g_idb_slc_mode_enable,"aw",@nobits
-	.set	.LANCHOR170,. + 0
+	.set	.LANCHOR155,. + 0
 	.type	g_idb_slc_mode_enable, %object
 	.size	g_idb_slc_mode_enable, 1
 g_idb_slc_mode_enable:
 	.zero	1
 	.section	.bss.g_lsb_page_tbl,"aw",@nobits
 	.align	2
-	.set	.LANCHOR21,. + 0
+	.set	.LANCHOR27,. + 0
 	.type	g_lsb_page_tbl, %object
 	.size	g_lsb_page_tbl, 512
 g_lsb_page_tbl:
 	.zero	512
 	.section	.bss.g_maxRegNum,"aw",@nobits
-	.set	.LANCHOR11,. + 0
+	.set	.LANCHOR19,. + 0
 	.type	g_maxRegNum, %object
 	.size	g_maxRegNum, 1
 g_maxRegNum:
 	.zero	1
 	.section	.bss.g_maxRetryCount,"aw",@nobits
-	.set	.LANCHOR137,. + 0
+	.set	.LANCHOR143,. + 0
 	.type	g_maxRetryCount, %object
 	.size	g_maxRetryCount, 1
 g_maxRetryCount:
 	.zero	1
 	.section	.bss.g_msb_page_tbl,"aw",@nobits
 	.align	2
-	.set	.LANCHOR120,. + 0
+	.set	.LANCHOR123,. + 0
 	.type	g_msb_page_tbl, %object
 	.size	g_msb_page_tbl, 1024
 g_msb_page_tbl:
 	.zero	1024
 	.section	.bss.g_nand_max_die,"aw",@nobits
-	.set	.LANCHOR15,. + 0
+	.set	.LANCHOR12,. + 0
 	.type	g_nand_max_die, %object
 	.size	g_nand_max_die, 1
 g_nand_max_die:
 	.zero	1
 	.section	.bss.g_nand_opt_para,"aw",@nobits
 	.align	3
-	.set	.LANCHOR129,. + 0
+	.set	.LANCHOR13,. + 0
 	.type	g_nand_opt_para, %object
 	.size	g_nand_opt_para, 32
 g_nand_opt_para:
 	.zero	32
 	.section	.bss.g_nandc_ecc_bits,"aw",@nobits
-	.set	.LANCHOR34,. + 0
+	.set	.LANCHOR40,. + 0
 	.type	g_nandc_ecc_bits, %object
 	.size	g_nandc_ecc_bits, 1
 g_nandc_ecc_bits:
+	.zero	1
+	.section	.bss.g_nandc_tran_timeout,"aw",@nobits
+	.set	.LANCHOR141,. + 0
+	.type	g_nandc_tran_timeout, %object
+	.size	g_nandc_tran_timeout, 1
+g_nandc_tran_timeout:
 	.zero	1
 	.section	.bss.g_nandc_v6_master_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR37,. + 0
+	.set	.LANCHOR43,. + 0
 	.type	g_nandc_v6_master_info, %object
 	.size	g_nandc_v6_master_info, 40
 g_nandc_v6_master_info:
 	.zero	40
 	.section	.bss.g_nandc_ver,"aw",@nobits
-	.set	.LANCHOR14,. + 0
+	.set	.LANCHOR22,. + 0
 	.type	g_nandc_ver, %object
 	.size	g_nandc_ver, 1
 g_nandc_ver:
 	.zero	1
 	.section	.bss.g_pm_spare,"aw",@nobits
 	.align	3
-	.set	.LANCHOR165,. + 0
+	.set	.LANCHOR176,. + 0
 	.type	g_pm_spare, %object
 	.size	g_pm_spare, 8
 g_pm_spare:
 	.zero	8
 	.section	.bss.g_retryMode,"aw",@nobits
-	.set	.LANCHOR9,. + 0
+	.set	.LANCHOR17,. + 0
 	.type	g_retryMode, %object
 	.size	g_retryMode, 1
 g_retryMode:
 	.zero	1
 	.section	.bss.g_slc_mode_addr2,"aw",@nobits
-	.set	.LANCHOR19,. + 0
+	.set	.LANCHOR25,. + 0
 	.type	g_slc_mode_addr2, %object
 	.size	g_slc_mode_addr2, 1
 g_slc_mode_addr2:
@@ -20098,21 +21547,21 @@ g_slc_mode_enable:
 	.zero	1
 	.section	.bss.g_slc_page_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR121,. + 0
+	.set	.LANCHOR125,. + 0
 	.type	g_slc_page_num, %object
 	.size	g_slc_page_num, 2
 g_slc_page_num:
 	.zero	2
 	.section	.bss.g_totle_phy_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR123,. + 0
+	.set	.LANCHOR127,. + 0
 	.type	g_totle_phy_block, %object
 	.size	g_totle_phy_block, 2
 g_totle_phy_block:
 	.zero	2
 	.section	.bss.gc_des_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR133,. + 0
+	.set	.LANCHOR138,. + 0
 	.type	gc_des_ppa_tbl, %object
 	.size	gc_des_ppa_tbl, 8
 gc_des_ppa_tbl:
@@ -20126,7 +21575,7 @@ gc_free_slc_sblk_th:
 	.zero	2
 	.section	.bss.gc_lpa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR131,. + 0
+	.set	.LANCHOR136,. + 0
 	.type	gc_lpa_tbl, %object
 	.size	gc_lpa_tbl, 8
 gc_lpa_tbl:
@@ -20146,7 +21595,7 @@ gc_page_buf_id:
 	.zero	8
 	.section	.bss.gc_pre_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR132,. + 0
+	.set	.LANCHOR137,. + 0
 	.type	gc_pre_ppa_tbl, %object
 	.size	gc_pre_ppa_tbl, 8
 gc_pre_ppa_tbl:
@@ -20180,7 +21629,7 @@ gc_slc_mode_tlc_vpn_th:
 gc_slc_mode_vpn_th:
 	.zero	2
 	.section	.bss.gc_state,"aw",@nobits
-	.set	.LANCHOR130,. + 0
+	.set	.LANCHOR135,. + 0
 	.type	gc_state, %object
 	.size	gc_state, 1
 gc_state:
@@ -20241,9 +21690,15 @@ gp_data_slc_data_head:
 	.size	gp_data_xlc_data_head, 8
 gp_data_xlc_data_head:
 	.zero	8
+	.section	.bss.gp_flash_check_buf,"aw",@nobits
+	.align	3
+	.type	gp_flash_check_buf, %object
+	.size	gp_flash_check_buf, 262144
+gp_flash_check_buf:
+	.zero	262144
 	.section	.bss.gp_flash_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR12,. + 0
+	.set	.LANCHOR20,. + 0
 	.type	gp_flash_info, %object
 	.size	gp_flash_info, 8
 gp_flash_info:
@@ -20278,21 +21733,21 @@ gp_ftl_ext_info:
 	.zero	8
 	.section	.bss.gp_ftl_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR53,. + 0
+	.set	.LANCHOR101,. + 0
 	.type	gp_ftl_info, %object
 	.size	gp_ftl_info, 8
 gp_ftl_info:
 	.zero	8
 	.section	.bss.gp_nand_para_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR41,. + 0
+	.set	.LANCHOR9,. + 0
 	.type	gp_nand_para_info, %object
 	.size	gp_nand_para_info, 8
 gp_nand_para_info:
 	.zero	8
 	.section	.bss.gp_nandc,"aw",@nobits
 	.align	3
-	.set	.LANCHOR13,. + 0
+	.set	.LANCHOR21,. + 0
 	.type	gp_nandc, %object
 	.size	gp_nandc, 8
 gp_nandc:
@@ -20304,34 +21759,47 @@ gp_nandc:
 	.size	gp_sblk_list_tbl, 8
 gp_sblk_list_tbl:
 	.zero	8
+	.section	.bss.idb_buf,"aw",@nobits
+	.align	3
+	.type	idb_buf, %object
+	.size	idb_buf, 262144
+idb_buf:
+	.zero	262144
+	.section	.bss.idb_need_write_back,"aw",@nobits
+	.align	2
+	.set	.LANCHOR156,. + 0
+	.type	idb_need_write_back, %object
+	.size	idb_need_write_back, 4
+idb_need_write_back:
+	.zero	4
 	.section	.bss.lpa_hash,"aw",@nobits
 	.align	3
-	.set	.LANCHOR104,. + 0
+	.set	.LANCHOR105,. + 0
 	.type	lpa_hash, %object
 	.size	lpa_hash, 512
 lpa_hash:
 	.zero	512
 	.section	.bss.lpa_hash_index,"aw",@nobits
 	.align	3
-	.set	.LANCHOR106,. + 0
+	.set	.LANCHOR107,. + 0
 	.type	lpa_hash_index, %object
 	.size	lpa_hash_index, 8
 lpa_hash_index:
 	.zero	8
 	.section	.bss.nandc_hw_seed,"aw",@nobits
-	.set	.LANCHOR35,. + 0
+	.set	.LANCHOR41,. + 0
 	.type	nandc_hw_seed, %object
 	.size	nandc_hw_seed, 1
 nandc_hw_seed:
 	.zero	1
 	.section	.bss.nandc_randomizer_en,"aw",@nobits
-	.set	.LANCHOR36,. + 0
+	.set	.LANCHOR42,. + 0
 	.type	nandc_randomizer_en, %object
 	.size	nandc_randomizer_en, 1
 nandc_randomizer_en:
 	.zero	1
 	.section	.bss.p_free_buf_head,"aw",@nobits
-	.set	.LANCHOR44,. + 0
+	.set	.LANCHOR47,. + 0
 	.type	p_free_buf_head, %object
 	.size	p_free_buf_head, 1
 p_free_buf_head:
@@ -20343,28 +21811,34 @@ p_free_buf_head:
 	.size	p_read_ahead_ext_buf, 8
 p_read_ahead_ext_buf:
 	.zero	8
+	.section	.bss.pm_first_write,"aw",@nobits
+	.set	.LANCHOR177,. + 0
+	.type	pm_first_write, %object
+	.size	pm_first_write, 1
+pm_first_write:
+	.zero	1
 	.section	.bss.pm_gc_enable,"aw",@nobits
 	.align	2
-	.set	.LANCHOR115,. + 0
+	.set	.LANCHOR118,. + 0
 	.type	pm_gc_enable, %object
 	.size	pm_gc_enable, 4
 pm_gc_enable:
 	.zero	4
 	.section	.bss.pm_last_load_ram_id,"aw",@nobits
-	.set	.LANCHOR175,. + 0
+	.set	.LANCHOR187,. + 0
 	.type	pm_last_load_ram_id, %object
 	.size	pm_last_load_ram_id, 1
 pm_last_load_ram_id:
 	.zero	1
 	.section	.bss.pm_last_update_ram_id,"aw",@nobits
-	.set	.LANCHOR118,. + 0
+	.set	.LANCHOR121,. + 0
 	.type	pm_last_update_ram_id, %object
 	.size	pm_last_update_ram_id, 1
 pm_last_update_ram_id:
 	.zero	1
 	.section	.bss.pm_ram_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR117,. + 0
+	.set	.LANCHOR120,. + 0
 	.type	pm_ram_info, %object
 	.size	pm_ram_info, 512
 pm_ram_info:
@@ -20383,7 +21857,7 @@ read_ahead_lpa:
 sblk_gc_write_completed_queue_head:
 	.zero	1
 	.section	.bss.sblk_queue_head,"aw",@nobits
-	.set	.LANCHOR114,. + 0
+	.set	.LANCHOR117,. + 0
 	.type	sblk_queue_head, %object
 	.size	sblk_queue_head, 1
 sblk_queue_head:
@@ -20395,7 +21869,7 @@ sblk_queue_head:
 sblk_read_completed_queue_head:
 	.zero	1
 	.section	.bss.sblk_write_completed_queue_head,"aw",@nobits
-	.set	.LANCHOR111,. + 0
+	.set	.LANCHOR115,. + 0
 	.type	sblk_write_completed_queue_head, %object
 	.size	sblk_write_completed_queue_head, 1
 sblk_write_completed_queue_head:
@@ -20415,13 +21889,13 @@ slc_cache_sblk:
 slc_data_sblk:
 	.zero	2
 	.section	.bss.write_buf_count,"aw",@nobits
-	.set	.LANCHOR50,. + 0
+	.set	.LANCHOR53,. + 0
 	.type	write_buf_count, %object
 	.size	write_buf_count, 1
 write_buf_count:
 	.zero	1
 	.section	.bss.write_buf_head,"aw",@nobits
-	.set	.LANCHOR49,. + 0
+	.set	.LANCHOR52,. + 0
 	.type	write_buf_head, %object
 	.size	write_buf_head, 1
 write_buf_head:
@@ -20433,7 +21907,7 @@ write_buf_head:
 write_commit_count:
 	.zero	1
 	.section	.bss.write_commit_head,"aw",@nobits
-	.set	.LANCHOR151,. + 0
+	.set	.LANCHOR160,. + 0
 	.type	write_commit_head, %object
 	.size	write_commit_head, 1
 write_commit_head:
@@ -20447,7 +21921,7 @@ xlc_data_sblk:
 	.zero	2
 	.section	.data.g_nand_para_info,"aw",@progbits
 	.align	3
-	.set	.LANCHOR26,. + 0
+	.set	.LANCHOR32,. + 0
 	.type	g_nand_para_info, %object
 	.size	g_nand_para_info, 32
 g_nand_para_info:
@@ -20481,7 +21955,7 @@ g_nand_para_info:
 	.byte	0
 	.section	.data.hy_f26_ref_value,"aw",@progbits
 	.align	3
-	.set	.LANCHOR134,. + 0
+	.set	.LANCHOR139,. + 0
 	.type	hy_f26_ref_value, %object
 	.size	hy_f26_ref_value, 28
 hy_f26_ref_value:
@@ -20515,7 +21989,7 @@ hy_f26_ref_value:
 	.byte	-37
 	.section	.data.nand_opt_para,"aw",@progbits
 	.align	3
-	.set	.LANCHOR167,. + 0
+	.set	.LANCHOR181,. + 0
 	.type	nand_opt_para, %object
 	.size	nand_opt_para, 128
 nand_opt_para:
@@ -20597,7 +22071,7 @@ nand_opt_para:
 	.zero	14
 	.section	.data.sd15_slc_rr,"aw",@progbits
 	.align	3
-	.set	.LANCHOR25,. + 0
+	.set	.LANCHOR31,. + 0
 	.type	sd15_slc_rr, %object
 	.size	sd15_slc_rr, 25
 sd15_slc_rr:
@@ -20628,7 +22102,7 @@ sd15_slc_rr:
 	.byte	112
 	.section	.data.sd15_tlc_rr,"aw",@progbits
 	.align	3
-	.set	.LANCHOR24,. + 0
+	.set	.LANCHOR30,. + 0
 	.type	sd15_tlc_rr, %object
 	.size	sd15_tlc_rr, 329
 sd15_tlc_rr:
@@ -20963,7 +22437,7 @@ sd15_tlc_rr:
 	.byte	0
 	.section	.data.tlc_prog_order,"aw",@progbits
 	.align	3
-	.set	.LANCHOR192,. + 0
+	.set	.LANCHOR204,. + 0
 	.type	tlc_prog_order, %object
 	.size	tlc_prog_order, 768
 tlc_prog_order:
@@ -21353,16 +22827,16 @@ tlc_prog_order:
 	.hword	1019
 	.section	.data.zftl_debug,"aw",@progbits
 	.align	2
-	.set	.LANCHOR29,. + 0
+	.set	.LANCHOR7,. + 0
 	.type	zftl_debug, %object
 	.size	zftl_debug, 4
 zftl_debug:
 	.word	17476
 	.section	.data.zftl_nand_flash_para_tbl,"aw",@progbits
 	.align	3
-	.set	.LANCHOR166,. + 0
+	.set	.LANCHOR180,. + 0
 	.type	zftl_nand_flash_para_tbl, %object
-	.size	zftl_nand_flash_para_tbl, 800
+	.size	zftl_nand_flash_para_tbl, 960
 zftl_nand_flash_para_tbl:
 	.byte	6
 	.byte	-104
@@ -21645,6 +23119,34 @@ zftl_nand_flash_para_tbl:
 	.byte	0
 	.byte	0
 	.byte	6
+	.byte	-104
+	.byte	-34
+	.byte	-108
+	.byte	-109
+	.byte	118
+	.byte	87
+	.byte	1
+	.byte	1
+	.byte	32
+	.hword	256
+	.byte	2
+	.byte	2
+	.hword	1058
+	.hword	17881
+	.byte	2
+	.byte	33
+	.byte	40
+	.byte	32
+	.byte	3
+	.byte	1
+	.byte	1
+	.byte	0
+	.hword	256
+	.byte	1
+	.byte	-94
+	.byte	0
+	.byte	0
+	.byte	6
 	.byte	69
 	.byte	58
 	.byte	-108
@@ -21714,7 +23216,7 @@ zftl_nand_flash_para_tbl:
 	.byte	2
 	.byte	2
 	.hword	1058
-	.hword	1497
+	.hword	17881
 	.byte	2
 	.byte	66
 	.byte	40
@@ -21742,7 +23244,7 @@ zftl_nand_flash_para_tbl:
 	.byte	2
 	.byte	2
 	.hword	1066
-	.hword	1497
+	.hword	17881
 	.byte	2
 	.byte	67
 	.byte	40
@@ -21756,6 +23258,34 @@ zftl_nand_flash_para_tbl:
 	.byte	-94
 	.byte	0
 	.byte	0
+	.byte	6
+	.byte	69
+	.byte	-41
+	.byte	-124
+	.byte	-109
+	.byte	114
+	.byte	87
+	.byte	8
+	.byte	1
+	.byte	32
+	.hword	256
+	.byte	2
+	.byte	1
+	.hword	1060
+	.hword	17857
+	.byte	2
+	.byte	66
+	.byte	40
+	.byte	32
+	.byte	2
+	.byte	1
+	.byte	1
+	.byte	0
+	.hword	256
+	.byte	1
+	.byte	-94
+	.byte	0
+	.byte	0
 	.byte	5
 	.byte	44
 	.byte	100
@@ -21777,27 +23307,111 @@ zftl_nand_flash_para_tbl:
 	.byte	32
 	.byte	1
 	.byte	0
-	.byte	4
+	.byte	4
+	.byte	0
+	.hword	512
+	.byte	2
+	.byte	-38
+	.byte	-33
+	.byte	0
+	.byte	5
+	.byte	44
+	.byte	100
+	.byte	100
+	.byte	86
+	.byte	-91
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	24
+	.hword	512
+	.byte	2
+	.byte	2
+	.hword	700
+	.hword	479
+	.byte	4
+	.byte	18
+	.byte	60
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.hword	512
+	.byte	3
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	5
+	.byte	44
+	.byte	68
+	.byte	68
+	.byte	75
+	.byte	-87
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	16
+	.hword	256
+	.byte	2
+	.byte	2
+	.hword	1064
+	.hword	479
+	.byte	3
+	.byte	17
+	.byte	40
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.hword	256
+	.byte	3
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	5
+	.byte	44
+	.byte	-124
+	.byte	100
+	.byte	84
+	.byte	-87
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	32
+	.hword	512
+	.byte	2
+	.byte	2
+	.hword	1024
+	.hword	479
+	.byte	4
+	.byte	18
+	.byte	60
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
 	.byte	0
 	.hword	512
-	.byte	2
-	.byte	-38
-	.byte	-33
+	.byte	3
+	.byte	0
+	.byte	0
 	.byte	0
 	.byte	5
 	.byte	44
 	.byte	100
 	.byte	100
-	.byte	86
-	.byte	-91
+	.byte	84
+	.byte	-92
 	.byte	0
 	.byte	4
 	.byte	1
-	.byte	24
+	.byte	32
 	.hword	512
 	.byte	2
-	.byte	2
-	.hword	700
+	.byte	1
+	.hword	1024
 	.hword	479
 	.byte	4
 	.byte	18
@@ -21808,13 +23422,13 @@ zftl_nand_flash_para_tbl:
 	.byte	1
 	.byte	0
 	.hword	512
-	.byte	3
 	.byte	0
 	.byte	0
 	.byte	0
-	.byte	6
+	.byte	0
+	.byte	5
 	.byte	44
-	.byte	68
+	.byte	100
 	.byte	68
 	.byte	75
 	.byte	-87
@@ -21824,9 +23438,9 @@ zftl_nand_flash_para_tbl:
 	.byte	16
 	.hword	256
 	.byte	2
-	.byte	2
-	.hword	1064
-	.hword	479
+	.byte	4
+	.hword	1024
+	.hword	449
 	.byte	3
 	.byte	17
 	.byte	40
@@ -21844,8 +23458,8 @@ zftl_nand_flash_para_tbl:
 	.byte	44
 	.byte	-124
 	.byte	100
-	.byte	84
-	.byte	-87
+	.byte	60
+	.byte	-91
 	.byte	0
 	.byte	4
 	.byte	1
@@ -21855,9 +23469,9 @@ zftl_nand_flash_para_tbl:
 	.byte	2
 	.hword	1024
 	.hword	479
-	.byte	4
-	.byte	18
-	.byte	60
+	.byte	3
+	.byte	17
+	.byte	40
 	.byte	32
 	.byte	1
 	.byte	0
@@ -21870,9 +23484,9 @@ zftl_nand_flash_para_tbl:
 	.byte	0
 	.byte	5
 	.byte	44
-	.byte	100
-	.byte	100
-	.byte	84
+	.byte	-124
+	.byte	68
+	.byte	52
 	.byte	-92
 	.byte	0
 	.byte	4
@@ -21880,28 +23494,28 @@ zftl_nand_flash_para_tbl:
 	.byte	32
 	.hword	512
 	.byte	2
-	.byte	1
-	.hword	1024
-	.hword	479
-	.byte	4
-	.byte	18
-	.byte	60
+	.byte	2
+	.hword	1096
+	.hword	9695
+	.byte	5
+	.byte	19
+	.byte	70
 	.byte	32
 	.byte	1
 	.byte	0
-	.byte	1
+	.byte	4
 	.byte	0
 	.hword	512
-	.byte	0
-	.byte	0
-	.byte	0
+	.byte	2
+	.byte	-38
+	.byte	-33
 	.byte	0
 	.byte	5
 	.byte	44
 	.byte	-124
 	.byte	68
-	.byte	52
-	.byte	-92
+	.byte	50
+	.byte	-86
 	.byte	0
 	.byte	4
 	.byte	1
@@ -21913,7 +23527,7 @@ zftl_nand_flash_para_tbl:
 	.hword	9695
 	.byte	5
 	.byte	19
-	.byte	70
+	.byte	60
 	.byte	32
 	.byte	1
 	.byte	0
@@ -22060,712 +23674,864 @@ zftl_nand_flash_para_tbl:
 	.byte	3
 	.byte	0
 	.hword	256
+	.byte	2
+	.byte	-65
+	.byte	-66
 	.byte	0
-	.byte	0
-	.byte	0
-	.byte	0
-	.section	.rodata.__func__.10029,"a",@progbits
+	.section	.rodata.__func__.10041,"a",@progbits
 	.align	3
 	.set	.LANCHOR1,. + 0
-	.type	__func__.10029, %object
-	.size	__func__.10029, 18
-__func__.10029:
+	.type	__func__.10041, %object
+	.size	__func__.10041, 18
+__func__.10041:
 	.string	"_list_remove_node"
-	.section	.rodata.__func__.10054,"a",@progbits
+	.section	.rodata.__func__.10066,"a",@progbits
 	.align	3
 	.set	.LANCHOR6,. + 0
-	.type	__func__.10054, %object
-	.size	__func__.10054, 23
-__func__.10054:
+	.type	__func__.10066, %object
+	.size	__func__.10066, 23
+__func__.10066:
 	.string	"_list_update_data_list"
-	.section	.rodata.__func__.10153,"a",@progbits
+	.section	.rodata.__func__.10165,"a",@progbits
 	.align	3
-	.set	.LANCHOR156,. + 0
-	.type	__func__.10153, %object
-	.size	__func__.10153, 15
-__func__.10153:
+	.set	.LANCHOR165,. + 0
+	.type	__func__.10165, %object
+	.size	__func__.10165, 15
+__func__.10165:
 	.string	"ftl_info_flush"
-	.section	.rodata.__func__.10185,"a",@progbits
+	.section	.rodata.__func__.10197,"a",@progbits
 	.align	3
-	.set	.LANCHOR113,. + 0
-	.type	__func__.10185, %object
-	.size	__func__.10185, 15
-__func__.10185:
+	.set	.LANCHOR116,. + 0
+	.type	__func__.10197, %object
+	.size	__func__.10197, 15
+__func__.10197:
 	.string	"ftl_alloc_sblk"
-	.section	.rodata.__func__.10220,"a",@progbits
+	.section	.rodata.__func__.10235,"a",@progbits
 	.align	3
-	.set	.LANCHOR101,. + 0
-	.type	__func__.10220, %object
-	.size	__func__.10220, 18
-__func__.10220:
+	.set	.LANCHOR102,. + 0
+	.type	__func__.10235, %object
+	.size	__func__.10235, 18
+__func__.10235:
 	.string	"ftl_alloc_sys_blk"
-	.section	.rodata.__func__.10230,"a",@progbits
+	.section	.rodata.__func__.10245,"a",@progbits
 	.align	3
-	.set	.LANCHOR102,. + 0
-	.type	__func__.10230, %object
-	.size	__func__.10230, 17
-__func__.10230:
+	.set	.LANCHOR103,. + 0
+	.type	__func__.10245, %object
+	.size	__func__.10245, 17
+__func__.10245:
 	.string	"ftl_free_sys_blk"
-	.section	.rodata.__func__.10264,"a",@progbits
+	.section	.rodata.__func__.10280,"a",@progbits
 	.align	3
-	.set	.LANCHOR184,. + 0
-	.type	__func__.10264, %object
-	.size	__func__.10264, 14
-__func__.10264:
+	.set	.LANCHOR196,. + 0
+	.type	__func__.10280, %object
+	.size	__func__.10280, 14
+__func__.10280:
 	.string	"ftl_sblk_dump"
-	.section	.rodata.__func__.10288,"a",@progbits
+	.section	.rodata.__func__.10304,"a",@progbits
 	.align	3
-	.set	.LANCHOR171,. + 0
-	.type	__func__.10288, %object
-	.size	__func__.10288, 16
-__func__.10288:
+	.set	.LANCHOR183,. + 0
+	.type	__func__.10304, %object
+	.size	__func__.10304, 16
+__func__.10304:
 	.string	"ftl_sysblk_dump"
-	.section	.rodata.__func__.10307,"a",@progbits
+	.section	.rodata.__func__.10323,"a",@progbits
 	.align	3
-	.set	.LANCHOR163,. + 0
-	.type	__func__.10307, %object
-	.size	__func__.10307, 23
-__func__.10307:
+	.set	.LANCHOR174,. + 0
+	.type	__func__.10323, %object
+	.size	__func__.10323, 23
+__func__.10323:
 	.string	"ftl_open_sblk_recovery"
-	.section	.rodata.__func__.10333,"a",@progbits
+	.section	.rodata.__func__.10349,"a",@progbits
 	.align	3
-	.set	.LANCHOR103,. + 0
-	.type	__func__.10333, %object
-	.size	__func__.10333, 23
-__func__.10333:
+	.set	.LANCHOR104,. + 0
+	.type	__func__.10349, %object
+	.size	__func__.10349, 23
+__func__.10349:
 	.string	"ftl_get_ppa_from_index"
-	.section	.rodata.__func__.10354,"a",@progbits
+	.section	.rodata.__func__.10370,"a",@progbits
 	.align	3
-	.set	.LANCHOR188,. + 0
-	.type	__func__.10354, %object
-	.size	__func__.10354, 19
-__func__.10354:
+	.set	.LANCHOR200,. + 0
+	.type	__func__.10370, %object
+	.size	__func__.10370, 19
+__func__.10370:
 	.string	"ftl_update_l2p_map"
-	.section	.rodata.__func__.10373,"a",@progbits
+	.section	.rodata.__func__.10389,"a",@progbits
 	.align	3
-	.set	.LANCHOR107,. + 0
-	.type	__func__.10373, %object
-	.size	__func__.10373, 22
-__func__.10373:
+	.set	.LANCHOR108,. + 0
+	.type	__func__.10389, %object
+	.size	__func__.10389, 22
+__func__.10389:
 	.string	"ftl_get_new_free_page"
-	.section	.rodata.__func__.10384,"a",@progbits
+	.section	.rodata.__func__.10400,"a",@progbits
 	.align	3
-	.set	.LANCHOR108,. + 0
-	.type	__func__.10384, %object
-	.size	__func__.10384, 22
-__func__.10384:
+	.set	.LANCHOR109,. + 0
+	.type	__func__.10400, %object
+	.size	__func__.10400, 22
+__func__.10400:
 	.string	"ftl_ext_alloc_new_blk"
-	.section	.rodata.__func__.10409,"a",@progbits
+	.section	.rodata.__func__.10425,"a",@progbits
 	.align	3
-	.set	.LANCHOR158,. + 0
-	.type	__func__.10409, %object
-	.size	__func__.10409, 19
-__func__.10409:
+	.set	.LANCHOR169,. + 0
+	.type	__func__.10425, %object
+	.size	__func__.10425, 19
+__func__.10425:
 	.string	"ftl_ext_info_flush"
-	.section	.rodata.__func__.10421,"a",@progbits
+	.section	.rodata.__func__.10437,"a",@progbits
 	.align	3
-	.set	.LANCHOR159,. + 0
-	.type	__func__.10421, %object
-	.size	__func__.10421, 18
-__func__.10421:
+	.set	.LANCHOR170,. + 0
+	.type	__func__.10437, %object
+	.size	__func__.10437, 18
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 	.string	"ftl_ext_info_init"
-	.section	.rodata.__func__.10467,"a",@progbits
+	.section	.rodata.__func__.10483,"a",@progbits
 	.align	3
-	.set	.LANCHOR160,. + 0
-	.type	__func__.10467, %object
-	.size	__func__.10467, 15
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 	.string	"ftl_low_format"
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+	.section	.rodata.__func__.10527,"a",@progbits
 	.align	3
-	.set	.LANCHOR162,. + 0
-	.type	__func__.10511, %object
-	.size	__func__.10511, 23
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+	.size	__func__.10527, 23
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 	.string	"ftl_re_low_format_test"
-	.section	.rodata.__func__.10521,"a",@progbits
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 	.align	3
-	.set	.LANCHOR153,. + 0
-	.type	__func__.10521, %object
-	.size	__func__.10521, 14
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+	.type	__func__.10537, %object
+	.size	__func__.10537, 14
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 	.string	"ftl_prog_page"
-	.section	.rodata.__func__.10696,"a",@progbits
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 	.align	3
-	.set	.LANCHOR150,. + 0
-	.type	__func__.10696, %object
-	.size	__func__.10696, 15
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+	.type	__func__.10712, %object
+	.size	__func__.10712, 15
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 	.string	"sblk_prog_page"
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 	.align	3
-	.set	.LANCHOR172,. + 0
-	.type	__func__.10755, %object
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 	.string	"load_l2p_region"
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 	.align	3
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 	.string	"pm_free_sblk"
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 	.align	3
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 	.string	"pm_gc"
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 	.align	3
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 	.string	"pm_alloc_new_blk"
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 	.align	3
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+	.size	__func__.10832, 14
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 	.string	"pm_write_page"
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 	.align	3
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 	.string	"pm_select_ram_region"
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 	.align	3
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 	.string	"flash_read_page_en"
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 	.align	3
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 	.string	"flash_prog_page_en"
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 	.align	3
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 	.string	"flash_erase_duplane_block"
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 	.align	3
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 	.string	"flash_erase_block_en"
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 	.align	3
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 	.string	"flash_wait_device_ready_raw"
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 	.string	"flash_start_tlc_page_prog"
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 	.align	3
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 	.string	"flash_start_page_prog"
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 	.align	3
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 	.string	"flash_start_page_read"
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 	.align	3
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 	.string	"flash_complete_page_read"
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 	.align	3
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 	.string	"buf_add_tail"
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 	.align	3
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 	.string	"buf_alloc"
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 	.align	3
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 	.string	"buf_remove_free"
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 	.align	3
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+	.size	__func__.9216, 20
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+	.type	__func__.9227, %object
+	.size	__func__.9227, 21
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+	.align	3
+	.set	.LANCHOR178,. + 0
+	.type	__func__.9249, %object
+	.size	__func__.9249, 17
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+	.align	3
+	.set	.LANCHOR128,. + 0
+	.type	__func__.9322, %object
+	.size	__func__.9322, 17
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 	.string	"lpa_rebuild_hash"
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 	.align	3
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 	.string	"ftl_write_commit"
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 	.align	3
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 	.string	"ftl_write_buf"
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 	.align	3
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+	.type	__func__.9436, %object
+	.size	__func__.9436, 15
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 	.string	"ftl_read_ahead"
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 	.align	3
 	.set	.LANCHOR55,. + 0
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-	.size	__func__.9434, 13
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+	.size	__func__.9444, 13
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 	.string	"ftl_read_buf"
-	.section	.rodata.__func__.9472,"a",@progbits
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 	.align	3
-	.set	.LANCHOR185,. + 0
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-	.size	__func__.9472, 10
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 	.string	"zftl_read"
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 	.align	3
-	.set	.LANCHOR195,. + 0
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 	.string	"_ftl_discard"
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 	.align	3
-	.set	.LANCHOR186,. + 0
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-	.size	__func__.9539, 10
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 	.string	"vpn_check"
-	.section	.rodata.__func__.9661,"a",@progbits
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 	.align	3
 	.set	.LANCHOR61,. + 0
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-	.size	__func__.9661, 12
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 	.string	"gc_add_sblk"
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 	.align	3
-	.set	.LANCHOR146,. + 0
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 	.string	"gc_check_data_one_wl"
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 	.align	3
-	.set	.LANCHOR182,. + 0
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 	.string	"gc_update_l2p_map_new"
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 	.align	3
 	.set	.LANCHOR66,. + 0
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-	.size	__func__.9726, 19
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 	.string	"gc_write_completed"
-	.section	.rodata.__func__.9755,"a",@progbits
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 	.align	3
-	.set	.LANCHOR191,. + 0
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-__func__.9755:
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 	.string	"gc_do_copy_back"
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 	.align	3
 	.set	.LANCHOR97,. + 0
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-	.size	__func__.9777, 16
-__func__.9777:
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 	.string	"gc_free_src_blk"
-	.section	.rodata.__func__.9822,"a",@progbits
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 	.align	3
-	.set	.LANCHOR187,. + 0
-	.type	__func__.9822, %object
-	.size	__func__.9822, 16
-__func__.9822:
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+	.type	__func__.9832, %object
+	.size	__func__.9832, 16
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 	.string	"gc_scan_src_blk"
-	.section	.rodata.__func__.9881,"a",@progbits
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 	.align	3
-	.set	.LANCHOR183,. + 0
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-	.size	__func__.9881, 20
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+	.size	__func__.9891, 20
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 	.string	"gc_scan_static_data"
-	.section	.rodata.__func__.9942,"a",@progbits
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 	.align	3
-	.set	.LANCHOR193,. + 0
-	.type	__func__.9942, %object
-	.size	__func__.9942, 11
-__func__.9942:
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+	.type	__func__.9952, %object
+	.size	__func__.9952, 11
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 	.string	"zftl_do_gc"
 	.section	.rodata._list_remove_node.str1.1,"aMS",@progbits,1
 .LC0:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
 	.section	.rodata.dump_ftl_info.str1.1,"aMS",@progbits,1
-.LC90:
+.LC137:
+	.string	"free_buf_count: %d\n"
+.LC138:
 	.string	"g_ftl_info_blk blk:0x%x, index:0x%x, page:0x%x\n"
-.LC91:
+.LC139:
 	.string	"ftl_ext_info_blk blk:0x%x, page:0x%x\n"
-.LC92:
+.LC140:
 	.string	"ac_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC93:
+.LC141:
 	.string	"tmp_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC94:
+.LC142:
 	.string	"gc_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC95:
+.LC143:
 	.string	"lpa:"
-.LC96:
+.LC144:
 	.string	"vpn:"
-.LC97:
+.LC145:
 	.string	"sblk:"
-.LC98:
+.LC146:
 	.string	"lpa_hash:"
-.LC99:
+.LC147:
 	.string	"lpa_hash_index:"
 	.section	.rodata.dump_sblk_queue.str1.1,"aMS",@progbits,1
-.LC29:
+.LC62:
 	.string	"dump_sblk_queue: %d\n"
-.LC30:
+.LC63:
 	.string	"buf id= %d state = %d ppa = %x\n"
 	.section	.rodata.flash_complete_page_read.str1.1,"aMS",@progbits,1
-.LC63:
+.LC106:
 	.string	"flash_complete_page_read %x %x error_ecc %d %d\n"
 	.section	.rodata.flash_ddr_tunning_read.str1.1,"aMS",@progbits,1
-.LC57:
+.LC98:
 	.string	"%d flash_ddr_tunning_read %x ecc=%d\n"
-.LC58:
+.LC99:
 	.string	"sync para %d\n"
-.LC59:
+.LC100:
 	.string	"DDR mode Read error %x %x\n"
 	.section	.rodata.flash_erase_all.str1.1,"aMS",@progbits,1
-.LC5:
+.LC35:
 	.string	"erase done: %x\n"
 	.section	.rodata.flash_erase_block_en.str1.1,"aMS",@progbits,1
-.LC3:
+.LC33:
 	.string	"flash_erase_block %x %x\n"
-.LC4:
+.LC34:
 	.string	"flash_erase_block block = %x status = %x\n"
 	.section	.rodata.flash_erase_duplane_block.str1.1,"aMS",@progbits,1
-.LC1:
+.LC31:
 	.string	"flash_erase_duplane_block %x %x %x\n"
-.LC2:
+.LC32:
 	.string	"flash_erase_duplane_block pageadd = %x status = %x\n"
+	.section	.rodata.flash_get_last_written_page.str1.1,"aMS",@progbits,1
+.LC103:
+	.string	"flash_get_last_written_page: %x %x %x\n"
 	.section	.rodata.flash_info_blk_init.str1.1,"aMS",@progbits,1
-.LC62:
+.LC104:
+	.string	"...%d @ %s %d %p\n"
+.LC105:
 	.string	"no sys info %x\n"
 	.section	.rodata.flash_info_flush.str1.1,"aMS",@progbits,1
-.LC86:
+.LC133:
 	.string	"finfo:"
-.LC87:
+.LC134:
 	.string	"flash_info_flush id = %x, page = %x\n"
-.LC88:
+.LC135:
 	.string	"sys_info_flush error:%x\n"
+	.section	.rodata.flash_into_data_init.str1.1,"aMS",@progbits,1
+.LC73:
+	.string	"...%d @ %s\n"
 	.section	.rodata.flash_mask_bad_block.str1.1,"aMS",@progbits,1
-.LC7:
+.LC40:
 	.string	"flash_mask_bad_block %d %d\n"
 	.section	.rodata.flash_prog_page.str1.1,"aMS",@progbits,1
-.LC66:
+.LC109:
 	.string	"flash_prog_page %x %x %x\n"
+.LC110:
+	.string	"flash_prog_page page_addr = %x status = %x\n"
 	.section	.rodata.flash_prog_page_en.str1.1,"aMS",@progbits,1
-.LC68:
+.LC115:
 	.string	"flash_prog_page_en:%x %x\n"
-.LC69:
+.LC116:
 	.string	"spare"
-.LC70:
+.LC117:
 	.string	"data"
-.LC71:
+.LC118:
 	.string	"write error: %x\n"
 	.section	.rodata.flash_read_id.str1.1,"aMS",@progbits,1
-.LC6:
+.LC38:
 	.string	"No.%d FLASH ID:%x %x %x %x %x %x\n"
 	.section	.rodata.flash_read_page.str1.1,"aMS",@progbits,1
-.LC51:
+.LC91:
 	.string	"flash_read_page %x %x %x\n"
 	.section	.rodata.flash_read_page_en.str1.1,"aMS",@progbits,1
-.LC60:
+.LC101:
 	.string	"flash_read_page_en %x %x\n"
-.LC61:
+.LC102:
 	.string	"flash_read_page_en %x %x error_ecc %d %d\n"
+	.section	.rodata.flash_set_interface_mode.str1.1,"aMS",@progbits,1
+.LC36:
+	.string	"nand sdr mode %x\n"
+.LC37:
+	.string	"nand ddr mode %x\n"
 	.section	.rodata.ftl_alloc_sblk.str1.1,"aMS",@progbits,1
-.LC28:
+.LC61:
 	.string	"alloc sblk %x %d\n"
 	.section	.rodata.ftl_info_blk_init.str1.1,"aMS",@progbits,1
-.LC74:
+.LC121:
 	.string	"%d %x @%d %x\n"
-.LC75:
+.LC122:
 	.string	"ftl_info_blk_init %d %d %x\n"
 	.section	.rodata.ftl_info_flush.str1.1,"aMS",@progbits,1
-.LC73:
+.LC120:
 	.string	"g_ftl_info_blk blk = %x, page = %x version = %d\n"
 	.section	.rodata.ftl_low_format.str1.1,"aMS",@progbits,1
-.LC76:
+.LC123:
 	.string	"low format %d %d %d %d\n"
 	.section	.rodata.ftl_mask_bad_block.str1.1,"aMS",@progbits,1
-.LC22:
+.LC54:
 	.string	"mask bad block:cs %x block: %x\n"
 	.section	.rodata.ftl_open_sblk_recovery.str1.1,"aMS",@progbits,1
-.LC78:
+.LC125:
 	.string	"saved_active_page  = %x\n"
-.LC79:
+.LC126:
 	.string	"saved_active_plane = %x\n"
-.LC80:
+.LC127:
 	.string	"sblk = %x\n"
-.LC81:
+.LC128:
 	.string	"phy_blk = %x %x\n"
-.LC82:
+.LC129:
 	.string	"blk= %x, page=%x, ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
-.LC83:
+.LC130:
 	.string	"sblk = %x, vpn0 = %d, vpn1 = %d\n"
-.LC84:
+.LC131:
 	.string	"dump write = %x\n"
 	.section	.rodata.ftl_re_low_format_test.str1.1,"aMS",@progbits,1
-.LC77:
+.LC124:
 	.string	"re low format %d\n"
 	.section	.rodata.ftl_read_ahead.str1.1,"aMS",@progbits,1
-.LC109:
+.LC158:
 	.string	"ftl_read_ahead refresh =%x, lpa = %x, ppa= %x\n"
-.LC110:
+.LC159:
 	.string	"id=%d, lpa = %x, ppa = %x spare = %x %x %x %x\n"
 	.section	.rodata.ftl_sblk_dump.str1.1,"aMS",@progbits,1
-.LC122:
+.LC182:
 	.string	"ftl_sblk_dump = %x %x %x %x\n"
-.LC123:
+.LC183:
 	.string	"page_addr = %x, lpa=%x vpn = %d\n"
-.LC124:
+.LC184:
 	.string	"index= %x, lpa=%x\n"
-.LC125:
+.LC185:
 	.string	"block = %x, vpn=%x check vpn = %d\n"
 	.section	.rodata.ftl_scan_all_data.str1.1,"aMS",@progbits,1
-.LC138:
+.LC198:
 	.string	"ftl_scan_all_data = %x\n"
-.LC139:
+.LC199:
 	.string	"scan lpa = %x ppa= %x\n"
-.LC140:
+.LC200:
 	.string	"lba = %x,addr= %x, ststus = %x, spare= %x %x %x %x data=%x %x\n"
-.LC141:
+.LC201:
 	.string	"lba = %x, id= %x, index = %x hash ppa = %x\n"
-.LC142:
+.LC202:
 	.string	"0pm:"
-.LC143:
+.LC203:
 	.string	"1pm:"
 	.section	.rodata.ftl_sysblk_dump.str1.1,"aMS",@progbits,1
-.LC89:
+.LC136:
 	.string	"l2p:"
 	.section	.rodata.ftl_test_block.str1.1,"aMS",@progbits,1
-.LC72:
+.LC119:
 	.string	"low format %d\n"
 	.section	.rodata.ftl_update_l2p_map.str1.1,"aMS",@progbits,1
-.LC144:
+.LC204:
 	.string	"ftl_update_l2p_map: %x %x %x\n"
-.LC145:
+.LC205:
 	.string	"ftl_update_l2p_map"
-.LC146:
+.LC206:
 	.string	"lpa_tbl:"
-.LC147:
+.LC207:
 	.string	"sblk %x vpn: %d %d\n"
 	.section	.rodata.ftl_vpn_decrement.str1.1,"aMS",@progbits,1
-.LC20:
+.LC53:
 	.string	"ftl_vpn_decrement %x = %d\n"
 	.section	.rodata.ftl_write_commit.str1.1,"aMS",@progbits,1
-.LC148:
+.LC208:
 	.string	"%d read error: ppa:%x, lpa:%x, status:%x\n"
 	.section	.rodata.ftl_write_completed.str1.1,"aMS",@progbits,1
-.LC21:
+.LC60:
 	.string	"ftl prog error =%x, lpa = %x, ppa= %x\n"
 	.section	.rodata.gc_add_sblk.str1.1,"aMS",@progbits,1
-.LC8:
+.LC41:
 	.string	"gc_add_sblk = %d, %d, %d, %d, %d, %d\n"
 	.section	.rodata.gc_check_data_one_wl.str1.1,"aMS",@progbits,1
-.LC65:
+.LC108:
 	.string	"1ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
 	.section	.rodata.gc_do_copy_back.str1.1,"aMS",@progbits,1
-.LC149:
+.LC209:
 	.string	"gc page in buf: lpa %x ppa = %x pageindex= %x\n"
-.LC150:
+.LC210:
 	.string	"gc_do_copy_back: lpa %x des_ppa = %x %x gc_ppa= %x page_index= %d\n"
-.LC151:
+.LC211:
 	.string	"gc_do_copy_back: %x %x %x %x gc_ppa:%x %x\n"
-.LC152:
+.LC212:
 	.string	"%d prog_step: %x %x buf id= %x ppa = %x hash=%x id = %x plane = %x lpa=%x\n"
 	.section	.rodata.gc_free_src_blk.str1.1,"aMS",@progbits,1
-.LC18:
+.LC51:
 	.string	"gc_free_src_blk = %x, vpn = %d\n"
-.LC19:
+.LC52:
 	.string	"gc_free_src_blk %x, %d\n"
 	.section	.rodata.gc_free_temp_buf.str1.1,"aMS",@progbits,1
-.LC11:
+.LC44:
 	.string	"%d gc_free_temp_buf buf id= %x\n"
 	.section	.rodata.gc_recovery.str1.1,"aMS",@progbits,1
-.LC111:
+.LC160:
 	.string	"ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
-.LC112:
+.LC161:
 	.string	"ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
-.LC113:
+.LC162:
 	.string	"gc_recovery"
-.LC114:
+.LC163:
 	.string	"gc_recovery: %x vpn = %x\n"
 	.section	.rodata.gc_scan_src_blk.str1.1,"aMS",@progbits,1
-.LC136:
+.LC196:
 	.string	"gc_scan_src_blk = %x, vpn = %d\n"
-.LC137:
+.LC197:
 	.string	"gc_scan_src_blk = %x, s vpn0 = %d, c vpn1 = %d\n"
 	.section	.rodata.gc_search_src_blk.str1.1,"aMS",@progbits,1
-.LC13:
+.LC46:
 	.string	"zftl_get_gc_node cache = %x index = %d vpn = %x\n"
-.LC14:
+.LC47:
 	.string	"gc_search_src_blk mode = %x, src mode = %x, count= %d %d\n"
 	.section	.rodata.gc_static_wearleveling.str1.1,"aMS",@progbits,1
-.LC34:
+.LC67:
 	.string	"gc_static_wearleveling: slc blk: %d, tlc blk: %d avg slc ec: %d, avg tlc ec: %d \n"
-.LC35:
+.LC68:
 	.string	"gc_static_wearleveling: min slc ec: %d, min tlc ec: %d max slc ec: %d, max tlc ec: %d; %d %d\n"
-.LC36:
+.LC69:
 	.string	"swl add tlc gc = %d, %d, %d, %d, %d, %d\n"
-.LC37:
+.LC70:
 	.string	"swl add slc gc  = %d, %d, %d, %d, %d, %d\n"
 	.section	.rodata.gc_update_l2p_map_new.str1.1,"aMS",@progbits,1
-.LC117:
+.LC177:
 	.string	"gc_update_l2p_map_new sblk %x\n"
-.LC118:
+.LC178:
 	.string	"gc_update_l2p_map_new: %x %x %x\n"
-.LC119:
+.LC179:
 	.string	"0lpa: %x %x %x\n"
-.LC120:
+.LC180:
 	.string	"lpa: %x %x %x\n"
-.LC121:
+.LC181:
 	.string	"gc_update_l2p_map_new: %x vpn = %x vpn1 = %x done\n"
 	.section	.rodata.gc_write_completed.str1.1,"aMS",@progbits,1
-.LC9:
+.LC42:
 	.string	"status: %x, ppa: %x\n"
-.LC10:
+.LC43:
 	.string	"gc_write_completed: %x  %x  %x %x\n"
 	.section	.rodata.hynix_get_read_retry_default.str1.1,"aMS",@progbits,1
-.LC43:
+.LC81:
 	.string	"otp error! %d"
-.LC44:
+.LC82:
 	.string	"rr"
 	.section	.rodata.hynix_read_retrial.str1.1,"aMS",@progbits,1
-.LC56:
+.LC97:
 	.string	"hynix RR %d row=%x, count %d, status=%d\n"
+	.section	.rodata.idb_write_data.str1.1,"aMS",@progbits,1
+.LC111:
+	.string	"1 write_idblock fix data %x %x %x\n"
+.LC112:
+	.string	"write_idblock check fail! %x\n"
+.LC113:
+	.string	"write_idblock fail! %x\n"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",@progbits,1
-.LC101:
+.LC149:
 	.string	"region_id = %d, pm_max_region = %d\n"
-.LC102:
+.LC150:
+	.string	"load_l2p_region no ppa = %x , %x, all setting 0xff....\n"
+.LC151:
 	.string	"load_l2p_region = %x,%x,%x, %x\n"
-.LC103:
+.LC152:
 	.string	"pm_ppa:"
-.LC104:
+.LC153:
 	.string	"data:"
-.LC105:
+.LC154:
 	.string	"spare:"
 	.section	.rodata.lpa_rebuild_hash.str1.1,"aMS",@progbits,1
-.LC33:
+.LC66:
 	.string	"%s %d %d\n"
 	.section	.rodata.micron_read_retrial.str1.1,"aMS",@progbits,1
-.LC52:
+.LC92:
+	.string	"micron %d row=%x,count %d,status=%d\n"
+.LC93:
 	.string	"micron RR %d row=%x,count %d,status=%d\n"
+	.section	.rodata.nand_flash_print_info.str1.1,"aMS",@progbits,1
+.LC1:
+	.string	"...%s enter...\n"
+.LC2:
+	.string	"No.0 FLASH ID: %x %x %x %x %x %x\n"
+.LC3:
+	.string	"DiePerChip: %x\n"
+.LC4:
+	.string	"SectPerPage: %x\n"
+.LC5:
+	.string	"PagePerBlk: %x\n"
+.LC6:
+	.string	"Cell: %x\n"
+.LC7:
+	.string	"PlanePerDie: %x\n"
+.LC8:
+	.string	"BlkPerPlane: %x\n"
+.LC9:
+	.string	"die gap: %x\n"
+.LC10:
+	.string	"lsbMode: %x\n"
+.LC11:
+	.string	"ReadRetryMode: %x\n"
+.LC12:
+	.string	"ecc: %x\n"
+.LC13:
+	.string	"idb ecc: %x\n"
+.LC14:
+	.string	"g_flash_slc_mode: %x\n"
+.LC15:
+	.string	"OptMode: %x\n"
+.LC16:
+	.string	"g_nand_max_die: %x\n"
+.LC17:
+	.string	"Cache read enable: %x\n"
+.LC18:
+	.string	"Cache random read enable: %x\n"
+.LC19:
+	.string	"Cache prog enable: %x\n"
+.LC20:
+	.string	"multi read enable: %x\n"
+.LC21:
+	.string	"multi prog enable: %x\n"
+.LC22:
+	.string	"interleave enable: %x\n"
+.LC23:
+	.string	"read retry enable: %x\n"
+.LC24:
+	.string	"randomizer enable: %x\n"
+.LC25:
+	.string	"SDR enable: %x\n"
+.LC26:
+	.string	"ONFI enable: %x\n"
+.LC27:
+	.string	"TOGGLE enable: %x\n"
+.LC28:
+	.string	"MultiPlaneProgCmd: %x %x\n"
+.LC29:
+	.string	"MultiPlaneReadCmd: %x %x\n"
+.LC30:
+	.string	"g_flash_toggle_mode_en: %x\n"
+	.section	.rodata.nandc_init.str1.1,"aMS",@progbits,1
+.LC74:
+	.string	"...%s enter... %p\n"
+.LC75:
+	.string	"0:%x %x %x %x %x\n"
+.LC76:
+	.string	"g_nandc_ver...%d\n"
 	.section	.rodata.nandc_xfer.str1.1,"aMS",@progbits,1
-.LC49:
+.LC88:
 	.string	"dqs data abort %x\n"
-.LC50:
+.LC89:
+	.string	"dqs data timeout %x\n"
+.LC90:
 	.string	"xfer error %x\n"
 	.section	.rodata.nandc_xfer_done.str1.1,"aMS",@progbits,1
-.LC45:
+.LC83:
+	.string	"flash_abort_clear = %d\n"
+.LC84:
 	.string	"%d mtrans_cnt = %d page_num = %d\n"
-.LC46:
+.LC85:
 	.string	"nandc:"
-.LC47:
+.LC86:
 	.string	"%d flReg.d32=%x %x\n"
-.LC48:
+.LC87:
 	.string	"nandc_xfer_done read error %x\n"
 	.section	.rodata.pm_alloc_new_blk.str1.1,"aMS",@progbits,1
-.LC31:
+.LC64:
 	.string	"blk %x is bad block\n"
-.LC32:
+.LC65:
 	.string	"pm_alloc_new_blk: %x %x %x %x\n"
+	.section	.rodata.pm_free_sblk.str1.1,"aMS",@progbits,1
+.LC72:
+	.string	"ftl_free_no_use_map_blk %x %x %x %d\n"
 	.section	.rodata.pm_init.str1.1,"aMS",@progbits,1
-.LC106:
+.LC155:
 	.string	"pm_init posr %x %x %x\n"
-.LC107:
+.LC156:
 	.string	"pm_init recovery %x %x %x\n"
 	.section	.rodata.pm_log2phys.str1.1,"aMS",@progbits,1
-.LC108:
+.LC157:
 	.string	"pm_log2phys  lpn = %d, max lpn = %d\n"
 	.section	.rodata.pm_ppa_update_check.str1.1,"aMS",@progbits,1
-.LC100:
+.LC148:
 	.string	"%s w error lpn = %x, max ppa = %d\n"
 	.section	.rodata.pm_write_page.str1.1,"aMS",@progbits,1
-.LC85:
+.LC132:
 	.string	"pm_write_page write error: %x\n"
 	.section	.rodata.print_ftl_debug_info.str1.1,"aMS",@progbits,1
-.LC23:
+.LC55:
 	.string	"free blk: s:%x,t:%x,m:%x, data blk:s:%x,%x,t%x vpn: s:%x t:%x, max_vpn: %x\n"
-.LC24:
+.LC56:
 	.string	"totle w: %d MB,r: %d MB %d dv:0x%X,poc:%d\n"
-.LC25:
+.LC57:
 	.string	"gc xlc page: %d,gc slc page: %d, tmp w: %d MB\n"
-.LC26:
+.LC58:
 	.string	"slc ec: %d,%d,%d,%d,%d,tlc ec: %d,%d,%d,%d,%d\n"
-.LC27:
+.LC59:
 	.string	"gc th: tlc_tlc: %d tlc_slc: %d slc_slc: %d slc_tlc:%d free_th: %d\n"
 	.section	.rodata.print_gc_debug_info.str1.1,"aMS",@progbits,1
-.LC12:
+.LC45:
 	.string	"gc: b:%x,p:%x,i:%x; free buf=%d %d free slc th: %d\n"
 	.section	.rodata.print_list_info.str1.1,"aMS",@progbits,1
-.LC16:
+.LC49:
 	.string	"list count:%p %d\n"
-.LC17:
+.LC50:
 	.string	"%d: node:%x %x %x %x, %d %d %d %d %d\n"
 	.section	.rodata.queue_wait_first_req_completed.str1.1,"aMS",@progbits,1
-.LC64:
+.LC107:
 	.string	"set buf %d,status = %x, ppa = %x lun state = %d\n"
 	.section	.rodata.random_seed,"a",@progbits
 	.align	3
-	.set	.LANCHOR39,. + 0
+	.set	.LANCHOR45,. + 0
 	.type	random_seed, %object
 	.size	random_seed, 256
 random_seed:
@@ -22898,23 +24664,26 @@ random_seed:
 	.hword	17598
 	.hword	28087
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",@progbits,1
-.LC116:
+.LC176:
 	.string	"zftl_init %x\n"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
-.LC39:
+.LC77:
 	.string	"%s 0x%x:"
-.LC40:
+.LC78:
 	.string	"%x "
-.LC41:
+.LC79:
 	.string	""
-.LC42:
+.LC80:
 	.string	"%s\n"
+	.section	.rodata.sandisk_prog_test_bad_block.str1.1,"aMS",@progbits,1
+.LC39:
+	.string	"bad block test:%x %x\n"
 	.section	.rodata.sblk_prog_page.str1.1,"aMS",@progbits,1
-.LC67:
+.LC114:
 	.string	"sblk_prog_page ppa = %x, count = %d\n"
 	.section	.rodata.toshiba_15ref_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR7,. + 0
+	.set	.LANCHOR15,. + 0
 	.type	toshiba_15ref_value, %object
 	.size	toshiba_15ref_value, 95
 toshiba_15ref_value:
@@ -23015,7 +24784,7 @@ toshiba_15ref_value:
 	.byte	0
 	.section	.rodata.toshiba_3D_slc_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR23,. + 0
+	.set	.LANCHOR29,. + 0
 	.type	toshiba_3D_slc_value, %object
 	.size	toshiba_3D_slc_value, 11
 toshiba_3D_slc_value:
@@ -23032,7 +24801,7 @@ toshiba_3D_slc_value:
 	.byte	56
 	.section	.rodata.toshiba_3D_tlc_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR22,. + 0
+	.set	.LANCHOR28,. + 0
 	.type	toshiba_3D_tlc_value, %object
 	.size	toshiba_3D_tlc_value, 399
 toshiba_3D_tlc_value:
@@ -23436,15 +25205,15 @@ toshiba_3D_tlc_value:
 	.byte	12
 	.byte	14
 	.section	.rodata.toshiba_3d_read_retrial.str1.1,"aMS",@progbits,1
-.LC53:
+.LC94:
 	.string	"toshiba SRR %d row=%x, status=%d\n"
-.LC54:
+.LC95:
 	.string	"toshiba TRR %d row=%x, status=%d\n"
-.LC55:
+.LC96:
 	.string	"toshiba RR %d row=%x,count %d,status=%d\n"
 	.section	.rodata.toshiba_A19ref_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR8,. + 0
+	.set	.LANCHOR16,. + 0
 	.type	toshiba_A19ref_value, %object
 	.size	toshiba_A19ref_value, 45
 toshiba_A19ref_value:
@@ -23495,7 +25264,7 @@ toshiba_A19ref_value:
 	.byte	0
 	.section	.rodata.toshiba_ref_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR10,. + 0
+	.set	.LANCHOR18,. + 0
 	.type	toshiba_ref_value, %object
 	.size	toshiba_ref_value, 8
 toshiba_ref_value:
@@ -23508,49 +25277,81 @@ toshiba_ref_value:
 	.byte	12
 	.byte	112
 	.section	.rodata.vpn_check.str1.1,"aMS",@progbits,1
-.LC128:
+.LC188:
 	.string	"acblk = %x, tempblk = %x, gc_des = %x\n"
-.LC129:
+.LC189:
 	.string	"acblk = %x, free page = %x, vpn = %x %x\n"
-.LC130:
+.LC190:
 	.string	"tmp_blk = %x, free page = %x, vpn = %x %x\n"
-.LC131:
+.LC191:
 	.string	"vpn_check lpa = %x, ppa = %x, blk = %x\n"
-.LC132:
+.LC192:
 	.string	"l2p"
-.LC133:
+.LC193:
 	.string	"vpn_check %x = c %x  s %x function: %x\n"
-.LC134:
+.LC194:
 	.string	"vpn_check blk = %x fix vpc\n"
-.LC135:
+.LC195:
 	.string	"...%s exit...%d\n"
 	.section	.rodata.zftl_discard.str1.1,"aMS",@progbits,1
-.LC158:
+.LC213:
 	.string	"ftl_discard:(%x, %x, %x, %x)\n"
 	.section	.rodata.zftl_do_gc.str1.1,"aMS",@progbits,1
-.LC153:
+.LC214:
 	.string	"gc %d: %d %d %d %d %d %d %d\n"
-.LC154:
+.LC215:
 	.string	"gc %d: %d %d %d %d %d %d\n"
-.LC155:
+.LC216:
 	.string	"GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\n"
-.LC156:
+.LC217:
 	.string	"gc free %x, %d\n"
+.LC218:
+	.string	"error gc slc free sblk = %x, vpn = %d %d\n"
+.LC219:
+	.string	"vpage0:"
+.LC220:
+	.string	"block %x, vpn = %d %d %d %d\n"
+.LC221:
+	.string	"block %x, vpn = %d %d\n"
+.LC222:
+	.string	"vpage1:"
 	.section	.rodata.zftl_get_free_sblk.str1.1,"aMS",@progbits,1
-.LC15:
+.LC48:
 	.string	"zftl_get_free_sblk %x %d, %p %d %d\n"
 	.section	.rodata.zftl_init.str1.1,"aMS",@progbits,1
-.LC115:
-	.string	"FTL version: 6.0.5 20180315"
+.LC164:
+	.string	"FTL version: 6.0.6 20180402"
+.LC165:
+	.string	"_c_user_data_density := %d\n"
+.LC166:
+	.string	"_c_totle_phy_density := %d\n"
+.LC167:
+	.string	"_c_totle_log_page := %d\n"
+.LC168:
+	.string	"_c_totle_data_density := %d\n"
+.LC169:
+	.string	"_c_ftl_pm_page_num := %d\n"
+.LC170:
+	.string	"_c_ftl_byte_pre_page := %d\n"
+.LC171:
+	.string	"_c_max_pm_sblk := %d\n"
+.LC172:
+	.string	"_min_slc_super_block := %d\n"
+.LC173:
+	.string	"_max_xlc_super_block := %d\n"
+.LC174:
+	.string	"gp_ftl_ext_info %p %p %p\n"
+.LC175:
+	.string	"flash info size: %d %d %d\n"
 	.section	.rodata.zftl_read.str1.1,"aMS",@progbits,1
-.LC126:
+.LC186:
 	.string	"ftl_read %x %x %x\n"
-.LC127:
+.LC187:
 	.string	"ftl_read refresh =%x, lpa = %x, ppa= %x\n"
 	.section	.rodata.zftl_sblk_list_init.str1.1,"aMS",@progbits,1
-.LC38:
+.LC71:
 	.string	"free blk vpn error: %x %x\n"
 	.section	.rodata.zftl_write.str1.1,"aMS",@progbits,1
-.LC157:
+.LC223:
 	.string	"ftlwrite %x %x %x\n"
 	.hidden	free

commit 46f2097ab870aef36e87e0bd169a319c01e295cf
Author: Caesar Wang <wxt@rock-chips.com>
Date:   Mon Apr 9 14:22:55 2018 +0800

    rockchip/rk3399: update config for firefly
    
    Change-Id: I608f5cc9bd956c58693f52895ab883c9c7ea42da
    Signed-off-by: Caesar Wang <wxt@rock-chips.com>

diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
index 95723b823c..fd655a0f32 100644
--- a/configs/firefly-rk3399_defconfig
+++ b/configs/firefly-rk3399_defconfig
@@ -5,14 +5,15 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_ROCKCHIP_RK3399=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
+CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3399-firefly"
 CONFIG_DEBUG_UART=y
+# CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_FIT=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 # CONFIG_DISPLAY_CPUINFO is not set
-CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
 CONFIG_SPL_ATF=y
@@ -24,14 +25,14 @@ CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
-CONFIG_CMD_LOAD_ANDROID=y
-CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_TIME=y
+CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_ENV_IS_IN_MMC=y
@@ -67,7 +68,6 @@ CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF1A0000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y

commit 7adb8398a1d9d22f605d5a3d10bae8f82383a469
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Thu Nov 30 15:56:54 2017 +0800

    drm/rockchip: lvds: add dual lvds support
    
    Change-Id: I305f3ea7597e87cf005fdfef87424f714b7c053e
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index d52e65f51e..4f3c0af80b 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -647,7 +647,8 @@ static int rockchip_lvds_enable(struct display_state *state)
 	if (lvds->pdata->has_vop_sel)
 		rockchip_lvds_vop_routing(lvds, crtc_state->crtc_id);
 
-	if (lvds->output == DISPLAY_OUTPUT_LVDS) {
+	if ((lvds->output == DISPLAY_OUTPUT_LVDS) ||
+	    (lvds->output == DISPLAY_OUTPUT_DUAL_LVDS)) {
 		if (lvds->pdata->chip_type == RK3288_LVDS)
 			rk3288_output_lvds(state);
 		else if (lvds->pdata->chip_type == RK3126_LVDS)

commit 5c651246bb4f56fc9119eb8dee2cc2356f74949b
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Wed Apr 4 09:19:34 2018 +0800

    drm/rockchip: vop: add support rk3308 vop
    
    Change-Id: I067ac3f95163dd678317a11ffad7a7d85225c9ee
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/arch/arm/dts/rk3308.dtsi b/arch/arm/dts/rk3308.dtsi
index 523337b5e6..becd964752 100644
--- a/arch/arm/dts/rk3308.dtsi
+++ b/arch/arm/dts/rk3308.dtsi
@@ -65,6 +65,23 @@
 		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
 	};
 
+	display_subsystem: display-subsystem {
+		compatible = "rockchip,display-subsystem";
+		ports = <&vop_out>;
+		status = "disabled";
+
+		route {
+			route_rgb: route-rgb {
+				status = "okay";
+				logo,uboot = "logo.bmp";
+				logo,kernel = "logo_kernel.bmp";
+				logo,mode = "center";
+				charge_logo,mode = "center";
+				connect = <&vop_out_rgb>;
+			};
+		};
+	};
+
 	psci {
 		compatible = "arm,psci-1.0";
 		method = "smc";
@@ -164,6 +181,27 @@
 		status = "disabled";
 	};
 
+	vop: vop@ff2e0000 {
+		compatible = "rockchip,rk3308-vop";
+		reg = <0x0 0xff2e0000 0x0 0x1fc>, <0x0 0xff2e0a00 0x0 0x400>;
+		reg-names = "regs", "gamma_lut";
+		interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_VOP>, <&cru DCLK_VOP>,
+			 <&cru HCLK_VOP>;
+		clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
+		status = "disabled";
+
+		vop_out: port {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			vop_out_rgb: endpoint@0 {
+				reg = <0>;
+				remote-endpoint = <&rgb_in_vop>;
+			};
+		};
+	};
+
 	pwm0: pwm@ff180000 {
 		compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
 		reg = <0x0 0xff180000 0x0 0x10>;
@@ -208,6 +246,31 @@
 		status = "disabled";
 	};
 
+	rgb: rgb {
+		compatible = "rockchip,rk3308-rgb";
+		status = "disabled";
+		pinctrl-names = "default";
+		pinctrl-0 = <&lcdc_ctl>;
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				rgb_in_vop: endpoint@0 {
+					reg = <0>;
+					remote-endpoint = <&vop_out_rgb>;
+				};
+			};
+
+		};
+	};
+
 	saradc: saradc@ff1e0000 {
 		compatible = "rockchip,rk3308-saradc", "rockchip,rk3399-saradc";
 		reg = <0x0 0xff1e0000 0x0 0x100>;
@@ -951,5 +1014,55 @@
 					<1 RK_PB4 3 &pcfg_pull_none>;
 			};
 		};
+
+		lcdc {
+			lcdc_ctl: lcdc-ctl {
+				rockchip,pins =
+					/* dclk */
+					<1 RK_PA0 RK_FUNC_1 &pcfg_pull_none>,
+					/* hsync */
+					<1 RK_PA1 RK_FUNC_1 &pcfg_pull_none>,
+					/* vsync */
+					<1 RK_PA2 RK_FUNC_1 &pcfg_pull_none>,
+					/* den */
+					<1 RK_PA3 RK_FUNC_1 &pcfg_pull_none>,
+					/* d0 */
+					<1 RK_PA4 RK_FUNC_1 &pcfg_pull_none>,
+					/* d1 */
+					<1 RK_PA5 RK_FUNC_1 &pcfg_pull_none>,
+					/* d2 */
+					<1 RK_PA6 RK_FUNC_1 &pcfg_pull_none>,
+					/* d3 */
+					<1 RK_PA7 RK_FUNC_1 &pcfg_pull_none>,
+					/* d4 */
+					<1 RK_PB0 RK_FUNC_1 &pcfg_pull_none>,
+					/* d5 */
+					<1 RK_PB1 RK_FUNC_1 &pcfg_pull_none>,
+					/* d6 */
+					<1 RK_PB2 RK_FUNC_1 &pcfg_pull_none>,
+					/* d7 */
+					<1 RK_PB3 RK_FUNC_1 &pcfg_pull_none>,
+					/* d8 */
+					<1 RK_PB4 RK_FUNC_1 &pcfg_pull_none>,
+					/* d9 */
+					<1 RK_PB5 RK_FUNC_1 &pcfg_pull_none>,
+					/* d10 */
+					<1 RK_PB6 RK_FUNC_1 &pcfg_pull_none>,
+					/* d11 */
+					<1 RK_PB7 RK_FUNC_1 &pcfg_pull_none>,
+					/* d12 */
+					<1 RK_PC0 RK_FUNC_1 &pcfg_pull_none>,
+					/* d13 */
+					<1 RK_PC1 RK_FUNC_1 &pcfg_pull_none>,
+					/* d14 */
+					<1 RK_PC2 RK_FUNC_1 &pcfg_pull_none>,
+					/* d15 */
+					<1 RK_PC3 RK_FUNC_1 &pcfg_pull_none>,
+					/* d16 */
+					<1 RK_PC4 RK_FUNC_1 &pcfg_pull_none>,
+					/* d17 */
+					<1 RK_PC5 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
 	};
 };
diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index c1ef8cf6cf..098079ca5c 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -55,6 +55,11 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Rockchip"
 CONFIG_G_DNL_VENDOR_NUM=0x2207
 CONFIG_G_DNL_PRODUCT_NUM=0x330d
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_RGB=y
+CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
diff --git a/drivers/video/drm/rockchip_crtc.c b/drivers/video/drm/rockchip_crtc.c
index 28c2eb4a78..722998a68d 100644
--- a/drivers/video/drm/rockchip_crtc.c
+++ b/drivers/video/drm/rockchip_crtc.c
@@ -32,6 +32,11 @@ static const struct rockchip_crtc px30_vop_big_data = {
 	.data = &px30_vop_big,
 };
 
+static const struct rockchip_crtc rk3308_vop_data = {
+	.funcs = &rockchip_vop_funcs,
+	.data = &rk3308_vop,
+};
+
 static const struct rockchip_crtc rk3288_vop_big_data = {
 	.funcs = &rockchip_vop_funcs,
 	.data = &rk3288_vop_big,
@@ -85,6 +90,9 @@ static const struct udevice_id rockchip_vop_ids[] = {
 	}, {
 		.compatible = "rockchip,px30-vop-big",
 		.data = (ulong)&px30_vop_big_data,
+	}, {
+		.compatible = "rockchip,rk3308-vop",
+		.data = (ulong)&rk3308_vop_data,
 	}, {
 		.compatible = "rockchip,rk3288-vop-big",
 		.data = (ulong)&rk3288_vop_big_data,
diff --git a/drivers/video/drm/rockchip_crtc.h b/drivers/video/drm/rockchip_crtc.h
index 613eaea0f8..60ace69f5f 100644
--- a/drivers/video/drm/rockchip_crtc.h
+++ b/drivers/video/drm/rockchip_crtc.h
@@ -28,6 +28,7 @@ extern const struct rockchip_crtc_funcs rockchip_vop_funcs;
 extern const struct vop_data rk3036_vop;
 extern const struct vop_data px30_vop_lit;
 extern const struct vop_data px30_vop_big;
+extern const struct vop_data rk3308_vop;
 extern const struct vop_data rk3288_vop_big;
 extern const struct vop_data rk3288_vop_lit;
 extern const struct vop_data rk3368_vop;
diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index 436cc3e35f..31541cf2d7 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -502,3 +502,70 @@ const struct vop_data px30_vop_big = {
 	.line_flag = &rk3366_vop_lite_line_flag,
 	.reg_len = RK3366_LIT_FRC_LOWER01_0 * 4,
 };
+
+static const struct vop_ctrl rk3308_ctrl_data = {
+	.standby = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 1),
+	.axi_outstanding_max_num = VOP_REG(RK3366_LIT_SYS_CTRL1, 0x1f, 16),
+	.axi_max_outstanding_en = VOP_REG(RK3366_LIT_SYS_CTRL1, 0x1, 12),
+	.htotal_pw = VOP_REG(RK3366_LIT_DSP_HTOTAL_HS_END, 0x0fff0fff, 0),
+	.hact_st_end = VOP_REG(RK3366_LIT_DSP_HACT_ST_END, 0x0fff0fff, 0),
+	.vtotal_pw = VOP_REG(RK3366_LIT_DSP_VTOTAL_VS_END, 0x0fff0fff, 0),
+	.vact_st_end = VOP_REG(RK3366_LIT_DSP_VACT_ST_END, 0x0fff0fff, 0),
+	.vact_st_end_f1 = VOP_REG(RK3366_LIT_DSP_VACT_ST_END_F1, 0x0fff0fff, 0),
+	.vs_st_end_f1 = VOP_REG(RK3366_LIT_DSP_VS_ST_END_F1, 0x0fff0fff, 0),
+	.global_regdone_en = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 13),
+	.auto_gate_en = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 0),
+	.dsp_layer_sel = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 3),
+	.overlay_mode = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 4),
+	.dclk_ddr = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 14),
+	.rgb_en = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 0),
+	.rgb_pin_pol = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x7, 2),
+	.rgb_dclk_pol = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 1),
+	.dither_up = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 2),
+	.dither_down = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x7, 6),
+	.dsp_data_swap = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1f, 9),
+	.dsp_ccir656_avg = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 5),
+	.dsp_black = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 15),
+	.dsp_blank = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 14),
+	.dsp_outzero = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 3),
+	.dsp_lut_en = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 5),
+	.out_mode = VOP_REG(RK3366_LIT_DSP_CTRL2, 0xf, 16),
+	.dsp_background = VOP_REG(RK3366_LIT_DSP_BG, 0x00ffffff, 0),
+	.cfg_done = VOP_REG(RK3366_LIT_REG_CFG_DONE, 0x1, 0),
+
+	.bcsh_en = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x1, 0),
+	.bcsh_r2y_csc_mode = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x1, 1),
+	.bcsh_out_mode = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x3, 2),
+	.bcsh_y2r_csc_mode = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x3, 4),
+	.bcsh_y2r_en = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x1, 6),
+	.bcsh_r2y_en = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x1, 7),
+	.bcsh_color_bar = VOP_REG(RK3366_LIT_BCSH_COL_BAR, 0xffffff, 0),
+	.bcsh_brightness = VOP_REG(RK3366_LIT_BCSH_BCS, 0xff, 0),
+	.bcsh_contrast = VOP_REG(RK3366_LIT_BCSH_BCS, 0x1ff, 8),
+	.bcsh_sat_con = VOP_REG(RK3366_LIT_BCSH_BCS, 0x3ff, 20),
+	.bcsh_sin_hue = VOP_REG(RK3366_LIT_BCSH_H, 0x1ff, 0),
+	.bcsh_cos_hue = VOP_REG(RK3366_LIT_BCSH_H, 0x1ff, 16),
+
+	.mcu_pix_total = VOP_REG(RK3366_LIT_MCU_CTRL, 0x3f, 0),
+	.mcu_cs_pst = VOP_REG(RK3366_LIT_MCU_CTRL, 0xf, 6),
+	.mcu_cs_pend = VOP_REG(RK3366_LIT_MCU_CTRL, 0x3f, 10),
+	.mcu_rw_pst = VOP_REG(RK3366_LIT_MCU_CTRL, 0xf, 16),
+	.mcu_rw_pend = VOP_REG(RK3366_LIT_MCU_CTRL, 0x3f, 20),
+	.mcu_clk_sel = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 26),
+	.mcu_hold_mode = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 27),
+	.mcu_frame_st = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 28),
+	.mcu_rs = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 29),
+	.mcu_bypass = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 30),
+	.mcu_type = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 31),
+	.mcu_rw_bypass_port = VOP_REG(RK3366_LIT_MCU_RW_BYPASS_PORT,
+				      0xffffffff, 0),
+};
+
+const struct vop_data rk3308_vop = {
+	.version = VOP_VERSION(2, 7),
+	.max_output = {1920, 1080},
+	.ctrl = &rk3308_ctrl_data,
+	.win = &rk3366_win0_data,
+	.line_flag = &rk3366_vop_lite_line_flag,
+	.reg_len = RK3366_LIT_FRC_LOWER01_0 * 4,
+};
diff --git a/include/configs/evb_rk3308.h b/include/configs/evb_rk3308.h
index 2fdadb9998..1fa3c14d65 100644
--- a/include/configs/evb_rk3308.h
+++ b/include/configs/evb_rk3308.h
@@ -12,7 +12,11 @@
 #define CONFIG_SYS_MMC_ENV_DEV 0
 
 
-#define CONFIG_CONSOLE_SCROLL_LINES		10
+#define ROCKCHIP_DEVICE_SETTINGS \
+			"stdout=serial,vidconsole\0" \
+			"stderr=serial,vidconsole\0"
+#undef CONFIG_CONSOLE_SCROLL_LINES
+#define CONFIG_CONSOLE_SCROLL_LINES            10
 
 #undef CONFIG_BOOTCOMMAND
 #define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h
index 98295e1747..ae78a2a521 100644
--- a/include/configs/rk3308_common.h
+++ b/include/configs/rk3308_common.h
@@ -59,6 +59,7 @@
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	ENV_MEM_LAYOUT_SETTINGS \
 	"partitions=" PARTS_DEFAULT \
+	ROCKCHIP_DEVICE_SETTINGS \
 	BOOTENV
 
 #endif

commit 45fa51f3200a74a02950d18f428469c678e69680
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Sat Mar 17 17:01:23 2018 +0800

    drm/panel: add support spi panel init
    
    Change-Id: Ib3bc1bbd21ec78b718ad06b9bbdebd213c39c5be
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index e050695fe2..0f216f9b98 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -29,6 +29,12 @@ enum display_mode {
 	ROCKCHIP_DISPLAY_CENTER,
 };
 
+enum rockchip_cmd_type {
+	CMD_TYPE_DEFAULT,
+	CMD_TYPE_SPI,
+	CMD_TYPE_MCU
+};
+
 /*
  * display output interface supported by rockchip lcdc
  */
diff --git a/drivers/video/drm/rockchip_panel.c b/drivers/video/drm/rockchip_panel.c
index 69b056d062..6605b4ef93 100644
--- a/drivers/video/drm/rockchip_panel.c
+++ b/drivers/video/drm/rockchip_panel.c
@@ -64,8 +64,26 @@ struct rockchip_panel_priv {
 	struct udevice *backlight;
 	struct gpio_desc enable_gpio;
 	struct gpio_desc reset_gpio;
+
+	int cmd_type;
+	struct gpio_desc spi_sdi_gpio;
+	struct gpio_desc spi_scl_gpio;
+	struct gpio_desc spi_cs_gpio;
 };
 
+static inline int get_panel_cmd_type(const char *s)
+{
+	if (!s)
+		return -EINVAL;
+
+	if (strncmp(s, "spi", 3) == 0)
+		return CMD_TYPE_SPI;
+	else if (strncmp(s, "mcu", 3) == 0)
+		return CMD_TYPE_MCU;
+
+	return CMD_TYPE_DEFAULT;
+}
+
 static int rockchip_panel_parse_cmds(const u8 *data, int length,
 				     struct rockchip_panel_cmds *pcmds)
 {
@@ -110,8 +128,64 @@ static int rockchip_panel_parse_cmds(const u8 *data, int length,
 	return 0;
 }
 
-static int rockchip_panel_send_cmds(struct display_state *state,
-				    struct rockchip_panel_cmds *cmds)
+static void rockchip_panel_write_spi_cmds(struct rockchip_panel_priv *priv,
+					  u8 type, int value)
+{
+	int i;
+
+	dm_gpio_set_value(&priv->spi_cs_gpio, 0);
+
+	if (type == 0)
+		value &= (~(1 << 8));
+	else
+		value |= (1 << 8);
+
+	for (i = 0; i < 9; i++) {
+		if (value & 0x100)
+			dm_gpio_set_value(&priv->spi_sdi_gpio, 1);
+		else
+			dm_gpio_set_value(&priv->spi_sdi_gpio, 0);
+
+		dm_gpio_set_value(&priv->spi_scl_gpio, 0);
+		udelay(10);
+		dm_gpio_set_value(&priv->spi_scl_gpio, 1);
+		value <<= 1;
+		udelay(10);
+	}
+
+	dm_gpio_set_value(&priv->spi_cs_gpio, 1);
+}
+
+static int rockchip_panel_send_spi_cmds(struct display_state *state,
+					struct rockchip_panel_cmds *cmds)
+{
+	struct panel_state *panel_state = &state->panel_state;
+	struct rockchip_panel_priv *priv = dev_get_priv(panel_state->dev);
+	int i;
+
+	if (!cmds)
+		return -EINVAL;
+
+	for (i = 0; i < cmds->cmd_cnt; i++) {
+		struct rockchip_cmd_desc *desc = &cmds->cmds[i];
+		int value = 0;
+
+		if (desc->header.payload_length == 2)
+			value = (desc->payload[0] << 8) | desc->payload[1];
+		else
+			value = desc->payload[0];
+		rockchip_panel_write_spi_cmds(priv,
+					      desc->header.data_type, value);
+
+		if (desc->header.delay_ms)
+			mdelay(desc->header.delay_ms);
+	}
+
+	return 0;
+}
+
+static int rockchip_panel_send_dsi_cmds(struct display_state *state,
+					struct rockchip_panel_cmds *cmds)
 {
 	int i, ret;
 
@@ -182,7 +256,12 @@ static int rockchip_panel_prepare(struct display_state *state)
 	mdelay(plat->delay.init);
 
 	if (plat->on_cmds) {
-		ret = rockchip_panel_send_cmds(state, plat->on_cmds);
+		if (priv->cmd_type == CMD_TYPE_SPI)
+			ret = rockchip_panel_send_spi_cmds(state,
+							   plat->on_cmds);
+		else
+			ret = rockchip_panel_send_dsi_cmds(state,
+							   plat->on_cmds);
 		if (ret)
 			printf("failed to send on cmds: %d\n", ret);
 	}
@@ -203,7 +282,12 @@ static void rockchip_panel_unprepare(struct display_state *state)
 		return;
 
 	if (plat->off_cmds) {
-		ret = rockchip_panel_send_cmds(state, plat->off_cmds);
+		if (priv->cmd_type == CMD_TYPE_SPI)
+			ret = rockchip_panel_send_spi_cmds(state,
+							   plat->off_cmds);
+		else
+			ret = rockchip_panel_send_dsi_cmds(state,
+							   plat->off_cmds);
 		if (ret)
 			printf("failed to send off cmds: %d\n", ret);
 	}
@@ -338,6 +422,7 @@ static int rockchip_panel_probe(struct udevice *dev)
 {
 	struct rockchip_panel_priv *priv = dev_get_priv(dev);
 	int ret;
+	const char *cmd_type;
 
 	ret = gpio_request_by_name(dev, "enable-gpios", 0,
 				   &priv->enable_gpio, GPIOD_IS_OUT);
@@ -367,6 +452,40 @@ static int rockchip_panel_probe(struct udevice *dev)
 		return ret;
 	}
 
+	ret = dev_read_string_index(dev, "rockchip,cmd-type", 0, &cmd_type);
+	if (ret)
+		priv->cmd_type = CMD_TYPE_DEFAULT;
+	else
+		priv->cmd_type = get_panel_cmd_type(cmd_type);
+
+	if (priv->cmd_type == CMD_TYPE_SPI) {
+		ret = gpio_request_by_name(dev, "spi-sdi-gpios", 0,
+					   &priv->spi_sdi_gpio, GPIOD_IS_OUT);
+		if (ret && ret != -ENOENT) {
+			printf("%s: Cannot get spi sdi GPIO: %d\n",
+			       __func__, ret);
+			return ret;
+		}
+		ret = gpio_request_by_name(dev, "spi-scl-gpios", 0,
+					   &priv->spi_scl_gpio, GPIOD_IS_OUT);
+		if (ret && ret != -ENOENT) {
+			printf("%s: Cannot get spi scl GPIO: %d\n",
+			       __func__, ret);
+			return ret;
+		}
+		ret = gpio_request_by_name(dev, "spi-cs-gpios", 0,
+					   &priv->spi_cs_gpio, GPIOD_IS_OUT);
+		if (ret && ret != -ENOENT) {
+			printf("%s: Cannot get spi cs GPIO: %d\n",
+			       __func__, ret);
+			return ret;
+		}
+		dm_gpio_set_value(&priv->spi_sdi_gpio, 1);
+		dm_gpio_set_value(&priv->spi_scl_gpio, 1);
+		dm_gpio_set_value(&priv->spi_cs_gpio, 1);
+		dm_gpio_set_value(&priv->reset_gpio, 0);
+	}
+
 	return 0;
 }
 

commit 112f288f30d4f99638451ff25afb3ea941d7fcab
Author: Caesar <wxt@rock-chips.com>
Date:   Tue Apr 3 20:39:29 2018 +0800

    rockchip/rk3399: update the evb config to support the RK bootloader
    
    Change-Id: Iac3b642ee180caa7654a94525c1b359b366fa092
    Signed-off-by: Caesar <wxt@rock-chips.com>

diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index c9d3037cdb..b8fca544c2 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -5,14 +5,15 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_ROCKCHIP_RK3399=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
+CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb"
 CONFIG_DEBUG_UART=y
+# CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_FIT=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 # CONFIG_DISPLAY_CPUINFO is not set
-CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
 CONFIG_SPL_ATF=y
@@ -24,14 +25,14 @@ CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
-CONFIG_CMD_LOAD_ANDROID=y
-CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_TIME=y
+CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_ENV_IS_IN_MMC=y
@@ -68,7 +69,6 @@ CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF1A0000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y

commit 8517e6f9eb7c22ec325223717594b9abfd83a1f2
Author: Caesar <wxt@rock-chips.com>
Date:   Tue Apr 3 20:36:36 2018 +0800

    rockchip/rk3399: prevent to build error with SPL
    
    As rk3399 enables the CONFIG_BOOTCOMMAN that will cause
    the build error with SPL enabled.
    
    Change-Id: I8d2f680efd24e9ad528d06f363f646e6a7c7f0f0
    Signed-off-by: Caesar <wxt@rock-chips.com>

diff --git a/include/configs/evb_rk3399.h b/include/configs/evb_rk3399.h
index 9e2c2e5c13..5565c7ce53 100644
--- a/include/configs/evb_rk3399.h
+++ b/include/configs/evb_rk3399.h
@@ -9,6 +9,11 @@
 
 #include <configs/rk3399_common.h>
 
+#ifndef CONFIG_SPL_BUILD
+#undef CONFIG_BOOTCOMMAND
+#define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
+#endif
+
 #define CONFIG_MMC_SDHCI_SDMA
 #define CONFIG_SYS_MMC_ENV_DEV 0
 

commit 1e104d55716c6b148f8f738afd5bebded4bb655e
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Wed Apr 4 19:49:26 2018 +0800

    arm: rockchip: rk3308: add nandc node for rk3308
    
    Change-Id: I71d4205f683141f41a3ecf4fac23b8bc5097dd74
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/dts/rk3308.dtsi b/arch/arm/dts/rk3308.dtsi
index 0662bd0b71..523337b5e6 100644
--- a/arch/arm/dts/rk3308.dtsi
+++ b/arch/arm/dts/rk3308.dtsi
@@ -336,6 +336,16 @@
 		status = "disabled";
 	};
 
+	nandc: nandc@ff4b0000 {
+		compatible = "rockchip,rk-nandc";
+		reg = <0x0 0xff4b0000 0x0 0x4000>;
+		interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
+		nandc_id = <0>;
+		clocks = <&cru SCLK_NANDC>, <&cru HCLK_NANDC>;
+		clock-names = "clk_nandc", "hclk_nandc";
+		status = "disabled";
+	};
+
 	cru: clock-controller@ff500000 {
 		compatible = "rockchip,rk3308-cru";
 		reg = <0x0 0xff500000 0x0 0x1000>;

commit f9f36d4f69ee7e6984d9a08f108b59a3088645ab
Author: Meng Dongyang <daniel.meng@rock-chips.com>
Date:   Tue Apr 3 10:11:20 2018 +0800

    phy: phy-rockchip-inno-usb2: add compatible of rk3308
    
    Add compatible of rk3308, using the data of rk3328.
    
    Change-Id: I4cda504d1ec15546f02a760f5c164a663424aa4c
    Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index 9cfd2c0077..f157c52f8a 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -682,6 +682,7 @@ static const struct rockchip_usb2phy_cfg rv1108_phy_cfgs[] = {
 
 static const struct udevice_id rockchip_usb2phy_ids[] = {
 	{ .compatible = "rockchip,rk3128-usb2phy", .data = (ulong)&rk312x_phy_cfgs },
+	{ .compatible = "rockchip,rk3308-usb2phy", .data = (ulong)&rk3328_phy_cfgs },
 	{ .compatible = "rockchip,rk3328-usb2phy", .data = (ulong)&rk3328_phy_cfgs },
 	{ .compatible = "rockchip,rv1108-usb2phy", .data = (ulong)&rv1108_phy_cfgs },
 	{ }

commit 87e0d84ff77e109bbf6e8390a6d4fa92cf9018c8
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Apr 3 10:25:21 2018 +0800

    rockchip: clk: rk3288: do rkclk_init() when CPLL is in slow mode
    
    The pre-loader(eg. miniloader) may not init the CPLL, we need to
    do the rkclk_init() to init the clocks in U-Boot, or else we may
    get wrong serial baurd rate in kernel.
    
    Change-Id: I4a226e110638aa18d10df35e8d9507f6679a5678
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index fc83271f91..b730cefbf7 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -1059,10 +1059,12 @@ static int rk3288_clk_probe(struct udevice *dev)
 		 * Init clocks in U-Boot proper if the NPLL is runnning. This
 		 * indicates that a previous boot loader set up the clocks, so
 		 * we need to redo it. U-Boot's SPL does not set this clock.
+		 * Or if the CPLL is not init, we need to redo the clk_init.
 		 */
 		reg = readl(&priv->cru->cru_mode_con);
-		if (((reg & NPLL_MODE_MASK) >> NPLL_MODE_SHIFT) ==
-				NPLL_MODE_NORMAL)
+		if ((((reg & NPLL_MODE_MASK) >> NPLL_MODE_SHIFT) ==
+				NPLL_MODE_NORMAL) ||
+		    !(reg & CPLL_MODE_MASK))
 			init_clocks = true;
 	}
 

commit 57c9220a25d13f37661e0b1d6de31bd160e1092d
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Apr 3 10:14:28 2018 +0800

    rockchip: sdram-common: fix size for 4GB in 32bit SoC
    
    System will get size '0' in 32bit system if the size is 4GB
    for the address is 32bit only, return the max space available
    instead of actual DDR size in rockchip_sdram_size().
    
    Change-Id: I879439e52a98ee7a3d5a20f38611aad74f723dca
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
index a6a5b9569f..f40edcce43 100644
--- a/arch/arm/mach-rockchip/sdram_common.c
+++ b/arch/arm/mach-rockchip/sdram_common.c
@@ -127,6 +127,10 @@ size_t rockchip_sdram_size(phys_addr_t reg)
 		      rank, col, bk, cs0_row, bw, row_3_4);
 	}
 
+	/* Handle 4GB size, or else size will be 0 after <<20 in 32bit system */
+	if (size_mb > (SDRAM_MAX_SIZE >> 20))
+		size_mb = (SDRAM_MAX_SIZE >> 20);
+
 	return (size_t)size_mb << 20;
 }
 

commit 9e68721b270b4ce4e71f19e283e4363e8b1a15ff
Author: qiujian <qiujian@rock-chips.com>
Date:   Wed Mar 28 18:03:45 2018 +0800

    bootargs : read oem unlock status
    
    Read oem unlock status from optee_client api
    and attach it to bootargs
    
    Change-Id: Ib8b1a9bc115ec9cb7e5ce09dc50845cfd7c1c81b
    Signed-off-by: Qiu Jian <qiujian@rock-chips.com>

diff --git a/cmd/bootrkp.c b/cmd/bootrkp.c
index cdbd089580..1fe4fe3d3a 100644
--- a/cmd/bootrkp.c
+++ b/cmd/bootrkp.c
@@ -8,6 +8,9 @@
 #include <android_bootloader.h>
 #include <attestation_key.h>
 #include <boot_rkimg.h>
+#include <optee_include/OpteeClientInterface.h>
+
+#define OEM_UNLOCK_ARG_SIZE 30
 
 static int do_boot_rockchip(cmd_tbl_t *cmdtp, int flag, int argc,
 		      char * const argv[])
@@ -33,6 +36,20 @@ static int do_boot_rockchip(cmd_tbl_t *cmdtp, int flag, int argc,
 		load_attestation_key(dev_desc, &misc_part_info);
 #endif
 
+#ifdef CONFIG_OPTEE_CLIENT
+	/* read oem unlock status and attach to bootargs */
+	uint8_t unlock = 0;
+	TEEC_Result result;
+	char oem_unlock[OEM_UNLOCK_ARG_SIZE] = {0};
+	result = trusty_read_oem_unlock(&unlock);
+	if (result) {
+		printf("read oem unlock status with error : 0x%x\n", result);
+	} else {
+		snprintf(oem_unlock, OEM_UNLOCK_ARG_SIZE, "androidboot.oem_unlocked=%d", unlock);
+		env_update("bootargs", oem_unlock);
+	}
+#endif
+
 	mode = rockchip_get_boot_mode();
 	if (mode == BOOT_MODE_RECOVERY) {
 		boot_partname = PART_RECOVERY;
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 2627da9347..7016f33e5a 100755
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -16,6 +16,7 @@
 #include <fs.h>
 #include <boot_rkimg.h>
 #include <attestation_key.h>
+#include <optee_include/OpteeClientInterface.h>
 
 #define ANDROID_PARTITION_BOOT "boot"
 #define ANDROID_PARTITION_MISC "misc"
@@ -33,6 +34,7 @@
 #else
 #define ANDROID_ARG_FDT_FILENAME "kernel.dtb"
 #endif
+#define OEM_UNLOCK_ARG_SIZE 30
 
 char *android_str_append(char *base_name, char *slot_suffix)
 {
@@ -562,6 +564,20 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	env_set_ulong("android_root_devnum", dev_desc->devnum);
 	env_set("android_slotsufix", slot_suffix);
 
+#ifdef CONFIG_OPTEE_CLIENT
+	/* read oem unlock status and attach to bootargs */
+	uint8_t unlock = 0;
+	TEEC_Result result;
+	char oem_unlock[OEM_UNLOCK_ARG_SIZE] = {0};
+	result = trusty_read_oem_unlock(&unlock);
+	if (result) {
+		printf("read oem unlock status with error : 0x%x\n", result);
+	} else {
+		snprintf(oem_unlock, OEM_UNLOCK_ARG_SIZE, "androidboot.oem_unlocked=%d", unlock);
+		env_update("bootargs", oem_unlock);
+	}
+#endif
+
 	/* Assemble the command line */
 	command_line = android_assemble_cmdline(slot_suffix, mode_cmdline);
 	env_update("bootargs", command_line);

commit f61a997e298454f34bee822067d9a5ee37105519
Author: qiujian <qiujian@rock-chips.com>
Date:   Wed Mar 28 16:57:01 2018 +0800

    fastboot: implement oem unlock commands for bootrkp
    
    Read-write oem unlock status from optee client api.
    
    Implement the following fastboot commands:
      fastboot oem unlock
      fastboot oem unlock_accept
      fastboot oem lock
      fastboot getvar oem-unlock
    
    Change-Id: I99edcee7b60c6d9529e6687291d87f22bf97b771
    Signed-off-by: Qiu Jian <qiujian@rock-chips.com>

diff --git a/cmd/bootrkp.c b/cmd/bootrkp.c
index 04b81b373a..cdbd089580 100644
--- a/cmd/bootrkp.c
+++ b/cmd/bootrkp.c
@@ -17,6 +17,7 @@ static int do_boot_rockchip(cmd_tbl_t *cmdtp, int flag, int argc,
 	int mode = 0;
 	char *boot_partname = PART_BOOT;
 	int ret = 0;
+	int i = 0;
 
 	dev_desc = rockchip_get_bootdev();
 
@@ -37,6 +38,15 @@ static int do_boot_rockchip(cmd_tbl_t *cmdtp, int flag, int argc,
 		boot_partname = PART_RECOVERY;
 		printf("%s boot from Recovery partition!\n", __func__);
 	}
+
+	for (i = 0; i < argc; i++) {
+		if (!strcmp(argv[i], "boot-recovery")) {
+			boot_partname = PART_RECOVERY;
+			printf("%s argv%d:%s boot from Recovery partition!\n",
+				__func__, i, argv[i]);
+		}
+	}
+
 	ret = part_get_info_by_name(dev_desc, boot_partname, &part_info);
 
 	if(boot_rockchip_image(dev_desc, &part_info))
diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 3a431e3497..6b75046ad4 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -29,12 +29,12 @@ struct bootloader_message {
 	char recovery[768];
 
 	/*
-         * The 'recovery' field used to be 1024 bytes.  It has only ever
+	 * The 'recovery' field used to be 1024 bytes.  It has only ever
 	 * been used to store the recovery command line, so 768 bytes
 	 * should be plenty.  We carve off the last 256 bytes to store the
 	 * stage string (for multistage packages) and possible future
 	 * expansion.
-         */
+	 */
 	char stage[32];
 	char slot_suffix[32];
 	char reserved[192];
@@ -203,6 +203,66 @@ struct blk_desc *rockchip_get_bootdev(void)
 }
 
 static int boot_mode = -1;
+
+static void rkloader_set_bootloader_msg(struct bootloader_message *bmsg)
+{
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+
+	dev_desc = rockchip_get_bootdev();
+	int ret = part_get_info_by_name(dev_desc, PART_MISC,
+			&part_info);
+	if (ret < 0) {
+		printf("not found misc partition.\n");
+		return;
+	}
+	int size = DIV_ROUND_UP(sizeof(struct bootloader_message), RK_BLK_SIZE)
+			* RK_BLK_SIZE;
+	ret = blk_dwrite(dev_desc, part_info.start + BOOTLOADER_MESSAGE_BLK_OFFSET,
+			size >> 9, bmsg);
+	if (ret != (size >> 9)) {
+		printf("wape data failed!");
+	}
+}
+
+void board_run_recovery(void)
+{
+	char *const boot_recovery_cmd[] = {"run", "boot_recovery_cmd", NULL};
+
+	env_set("boot_recovery_cmd", "bootrkp boot-recovery");
+
+	do_run(NULL, 0, ARRAY_SIZE(boot_recovery_cmd), boot_recovery_cmd);
+}
+
+void board_run_recovery_wipe_data(void)
+{
+	struct bootloader_message bmsg;
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+
+	printf("Rebooting into recovery to do wipe_data\n");
+	dev_desc = rockchip_get_bootdev();
+	int ret;
+
+	ret = part_get_info_by_name(dev_desc, PART_MISC,
+		&part_info);
+
+	if (ret < 0) {
+		printf("not found misc partition, just run recovery.\n");
+		board_run_recovery();
+	}
+
+	memset((char *)&bmsg, 0, sizeof(struct bootloader_message));
+	strcpy(bmsg.command, "boot-recovery");
+	bmsg.status[0] = 0;
+	strcpy(bmsg.recovery, "recovery\n--wipe_data");
+
+	rkloader_set_bootloader_msg(&bmsg);
+
+	/* now reboot to recovery */
+	board_run_recovery();
+}
+
 int rockchip_get_boot_mode(void)
 {
 	struct blk_desc *dev_desc;
diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 7857c2766b..b505ce9ce1 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -37,6 +37,8 @@
 #ifdef CONFIG_OPTEE_CLIENT
 #include <optee_include/OpteeClientInterface.h>
 #endif
+#include <boot_rkimg.h>
+#include <optee_include/tee_client_api.h>
 
 #define FASTBOOT_VERSION		"0.4"
 
@@ -685,6 +687,33 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req)
 			sprintf(part_size_str, "0x%016x", (int)part_info.size);
 			strncat(response, part_size_str, chars_left);
 		}
+	} else if (!strncmp("oem-unlock", cmd, 10)) {
+#ifdef CONFIG_OPTEE_CLIENT
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
+		fastboot_tx_write_str("FAILnot implemented");
+		return;
+#else
+
+		char msg[50] = {0};
+		uint8_t unlock = 0;
+		TEEC_Result result;
+
+		result = trusty_read_oem_unlock(&unlock);
+		if (result) {
+			printf("read oem unlock status with error : 0x%x\n", result);
+			fastboot_tx_write_str("FAILRead oem unlock status failed");
+			return;
+		}
+		sprintf(msg, "Device is %s, Status Code: %d\n",
+			unlock == 0 ? "LOCKED" : "UNLOCKED", unlock);
+
+		printf(msg);
+		strncat(response, msg, chars_left);
+#endif
+#else
+		fastboot_tx_write_str("FAILnot implemented");
+		return;
+#endif
 	} else {
 		char *envstr;
 
@@ -1143,16 +1172,126 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 #ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV
 	if (strncmp("format", cmd + 4, 6) == 0) {
 		char cmdbuf[32];
-                sprintf(cmdbuf, "gpt write mmc %x $partitions",
+		sprintf(cmdbuf, "gpt write mmc %x $partitions",
 			CONFIG_FASTBOOT_FLASH_MMC_DEV);
-                if (run_command(cmdbuf, 0))
+		if (run_command(cmdbuf, 0))
 			fastboot_tx_write_str("FAILmmc write failure");
-                else
+		else
 			fastboot_tx_write_str("OKAY");
 	} else
 #endif
 	if (strncmp("unlock", cmd + 4, 8) == 0) {
+#ifdef CONFIG_OPTEE_CLIENT
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
 		fastboot_tx_write_str("FAILnot implemented");
+		return;
+#else
+		uint8_t unlock = 0;
+		TEEC_Result result;
+		debug("oem unlock\n");
+		result = trusty_read_oem_unlock(&unlock);
+		if (result) {
+			printf("read oem unlock status with error : 0x%x\n", result);
+			fastboot_tx_write_str("FAILRead oem unlock status failed");
+			return;
+		}
+		if (unlock) {
+			printf("oem unlock ignored, device already unlocked\n");
+			fastboot_tx_write_str("FAILalready unlocked");
+			return;
+		}
+		printf("oem unlock requested:\n");
+		printf("\tUnlocking forces a factory reset and could\n");
+		printf("\topen your device up to a world of hurt.  If you\n");
+		printf("\tare sure you know what you're doing, then accept\n");
+		printf("\tvia 'fastboot oem unlock_accept'.\n");
+		env_set("unlock", "unlock");
+		fastboot_tx_write_str("OKAY");
+#endif
+#else
+		fastboot_tx_write_str("FAILnot implemented");
+		return;
+#endif
+	} else if (strncmp("unlock_accept", cmd + 4, 13) == 0) {
+#ifdef CONFIG_OPTEE_CLIENT
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
+		fastboot_tx_write_str("FAILnot implemented");
+		return;
+#else
+		char *unlock = env_get("unlock");
+		TEEC_Result result;
+		debug("oem unlock_accept\n");
+		if (unlock == NULL || strncmp("unlock", unlock, 6) != 0) {
+			printf("oem unlock_accept ignored, not pending\n");
+			fastboot_tx_write_str("FAILoem unlock not requested");
+			return;
+		}
+		env_set("unlock", "");
+		printf("Erasing userdata partition\n");
+		struct blk_desc *dev_desc;
+		disk_partition_t part_info;
+		dev_desc = rockchip_get_bootdev();
+		int ret = part_get_info_by_name(dev_desc, "userdata",
+				&part_info);
+		if (ret < 0) {
+			printf("not found userdata partition");
+			printf("Erase failed with error %d\n", ret);
+			fastboot_tx_write_str("FAILErasing userdata failed");
+			return;
+		}
+		ret = blk_derase(dev_desc, part_info.start, part_info.size);
+		if (ret != part_info.size) {
+			printf("Erase failed with error %d\n", ret);
+			fastboot_tx_write_str("FAILErasing userdata failed");
+			return;
+		}
+		printf("Erasing succeeded\n");
+
+		result = trusty_write_oem_unlock(1);
+		if (result) {
+			printf("write oem unlock status with error : 0x%x\n", result);
+			fastboot_tx_write_str("FAILWrite oem unlock status failed");
+			return;
+		}
+		fastboot_tx_write_str("OKAY");
+
+		/*
+		 * now reboot into recovery to do a format of the
+		 * userdata partition so it's ready to use on next boot
+		 */
+		board_run_recovery_wipe_data();
+#endif
+#else
+		fastboot_tx_write_str("FAILnot implemented");
+		return;
+#endif
+	} else if (strncmp("lock", cmd + 4, 8) == 0) {
+#ifdef CONFIG_OPTEE_CLIENT
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
+		fastboot_tx_write_str("FAILnot implemented");
+		return;
+#else
+		TEEC_Result result;
+		uint8_t unlock = 0;
+		trusty_read_oem_unlock(&unlock);
+		if (!unlock) {
+			printf("oem lock ignored, already locked\n");
+			fastboot_tx_write_str("FAILalready locked");
+			return;
+		}
+
+		result = trusty_write_oem_unlock(0);
+		if (result) {
+			printf("write oem unlock status with error : 0x%x\n", result);
+			fastboot_tx_write_str("FAILWrite oem unlock status failed");
+			return;
+		}
+		fastboot_tx_write_str("OKAY");
+#endif
+#else
+		fastboot_tx_write_str("FAILnot implemented");
+		return;
+#endif
 	} else if (strncmp("at-get-ca-request", cmd + 4, 17) == 0) {
 #ifdef CONFIG_OPTEE_CLIENT
 		uint8_t out[ATTEST_CA_OUT_SIZE];
diff --git a/include/boot_rkimg.h b/include/boot_rkimg.h
index d5078e846b..7a094be074 100644
--- a/include/boot_rkimg.h
+++ b/include/boot_rkimg.h
@@ -30,4 +30,14 @@ int rockchip_get_boot_mode(void);
 int boot_rockchip_image(struct blk_desc *dev, disk_partition_t *boot_part);
 struct blk_desc *rockchip_get_bootdev(void);
 
+/*
+ * reboot into recovery and wipe data
+ */
+void board_run_recovery_wipe_data(void);
+
+/*
+ * reboot into recovery
+ */
+void board_run_recovery(void);
+
 #endif

commit 78ef5fbdb92712dc771643c913975ff4faff380d
Author: qiujian <qiujian@rock-chips.com>
Date:   Wed Mar 28 16:12:55 2018 +0800

    lib: optee_client: add oem unlock status func
    
    Change-Id: If92c59650994bd2ab8e689f063acf1d65dc08e48
    Signed-off-by: Qiu Jian <qiujian@rock-chips.com>

diff --git a/include/optee_include/OpteeClientInterface.h b/include/optee_include/OpteeClientInterface.h
index 920e68155a..93470d3004 100644
--- a/include/optee_include/OpteeClientInterface.h
+++ b/include/optee_include/OpteeClientInterface.h
@@ -7,6 +7,8 @@
 #ifndef _OPTEECLIENTTEST_H_
 #define _OPTEECLIENTTEST_H_
 
+#include <optee_include/tee_client_api.h>
+
 #define ATAP_HEX_UUID_LEN 32
 #define ATTEST_DH_SIZE     8
 #define ATTEST_UUID_SIZE     (ATAP_HEX_UUID_LEN+1)
@@ -21,6 +23,20 @@ uint32_t trusty_read_lock_state(uint8_t *lock_state);
 uint32_t trusty_write_lock_state(uint8_t lock_state);
 uint32_t trusty_read_flash_lock_state(uint8_t *flash_lock_state);
 uint32_t trusty_write_flash_lock_state(uint8_t flash_lock_state);
+
+/*
+ * read data from rk_keymaster
+ *
+ * @filename:		the filename of the saved data to read
+ * @filename_size: 	size of filename
+ * @data: 		the buffer used to read data from rk_keymaster
+ * @data_size: 		buffer size of the data
+ *
+ * @return a positive number in case of error, or 0 on success.
+ */
+TEEC_Result read_from_keymaster
+	(uint8_t *filename, uint32_t filename_size,
+	uint8_t *data, uint32_t data_size);
 uint32_t write_to_keymaster
 	(uint8_t *filename, uint32_t filename_size,
 	uint8_t *data, uint32_t data_size);
@@ -38,4 +54,23 @@ uint32_t trusty_attest_get_ca
 	(uint8_t *operation_start, uint32_t *operation_size,
 	 uint8_t *out, uint32_t *out_len);
 uint32_t trusty_attest_set_ca(uint8_t *ca_response, uint32_t *ca_response_size);
+
+/*
+ * read oem unlock status from rk_keymaster
+ *
+ * @unlock:used to read oem unlock status code,0:locked,1:unlocked
+ *
+ * @return a positive number in case of error, or 0 on success.
+ */
+TEEC_Result trusty_read_oem_unlock(uint8_t *unlock);
+
+/*
+ * update oem unlock status to rk_keymaster
+ *
+ * @unlock: oem unlock status code,0:locked,1:unlocked
+ *
+ * @return a positive number in case of error, or 0 on success.
+ */
+TEEC_Result trusty_write_oem_unlock(uint8_t unlock);
+
 #endif
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index 1a2c23f0ca..0632b33733 100644
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <optee_include/OpteeClientApiLib.h>
 #include <optee_include/tee_client_api.h>
+#include <optee_include/tee_api_defines.h>
 #include <boot_rkimg.h>
 
 void test_optee(void)
@@ -808,6 +809,93 @@ uint32_t trusty_write_flash_lock_state(uint8_t flash_lock_state)
 	return TeecResult;
 }
 
+TEEC_Result read_from_keymaster(uint8_t *filename,
+		uint32_t filename_size,
+		uint8_t *data,
+		uint32_t size)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID tempuuid = { 0x258be795, 0xf9ca, 0x40e6,
+		{ 0xa8, 0x69, 0x9c, 0xe6, 0x88, 0x6c, 0x5d, 0x5d } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+	dev_desc = rockchip_get_bootdev();
+
+	debug("read_from_keymaster start\n");
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				&TeecSession,
+				TeecUuid,
+				TEEC_LOGIN_PUBLIC,
+				NULL,
+#ifdef CONFIG_OPTEE_V1
+				NULL,
+#endif
+#ifdef CONFIG_OPTEE_V2
+				&TeecOperation,
+#endif
+				&ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = filename_size;
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	memcpy(SharedMem0.buffer, filename, SharedMem0.size);
+
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = size;
+	SharedMem1.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						TEEC_MEMREF_TEMP_INOUT,
+						TEEC_NONE,
+						TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					142,
+					&TeecOperation,
+					&ErrorOrigin);
+	if (TeecResult == TEEC_SUCCESS)
+		memcpy(data, SharedMem1.buffer, SharedMem1.size);
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+	TEEC_CloseSession(&TeecSession);
+	TEEC_FinalizeContext(&TeecContext);
+	debug("read_from_keymaster end\n");
+
+	return TeecResult;
+}
+
 uint32_t write_to_keymaster(uint8_t *filename,
 		uint32_t filename_size,
 		uint8_t *data,
@@ -892,7 +980,7 @@ uint32_t write_to_keymaster(uint8_t *filename,
 	TEEC_ReleaseSharedMemory(&SharedMem1);
 	TEEC_CloseSession(&TeecSession);
 	TEEC_FinalizeContext(&TeecContext);
-	debug("testmm end\n");
+	debug("write_to_keymaster end\n");
 	debug("TeecResult %x\n", TeecResult);
 
 	return TeecResult;
@@ -1731,3 +1819,29 @@ uint32_t trusty_attest_set_ca(uint8_t *ca_response, uint32_t *ca_response_size)
 
 	return TeecResult;
 }
+
+TEEC_Result trusty_write_oem_unlock(uint8_t unlock)
+{
+	char *file = "oem.unlock";
+	TEEC_Result ret;
+
+	ret = write_to_keymaster((uint8_t *)file, strlen(file),
+		(uint8_t *)&unlock, 1);
+	return ret;
+}
+
+TEEC_Result trusty_read_oem_unlock(uint8_t *unlock)
+{
+	char *file = "oem.unlock";
+	TEEC_Result ret;
+
+	ret = read_from_keymaster((uint8_t *)file, strlen(file),
+		unlock, 1);
+
+	if (ret == TEE_ERROR_ITEM_NOT_FOUND) {
+		debug("init oem unlock status 0");
+		ret = trusty_write_oem_unlock(0);
+	}
+
+	return ret;
+}
\ No newline at end of file

commit 9564380bdf7e174e66c3ea441930593e4d0794d4
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Apr 2 20:18:38 2018 +0800

    arm: rockchip: rk3308: set u-boot,dm-pre-reloc for emmc and cru
    
    We use dt-spl.dtb for mmc_initialize to load dtb from kernel when
    CONFIG_USING_KERNEL_DTB is enabled, so set emmc as u-boot,dm-pre-reloc
    to make sure it will builtin dt-spl.dtb.
    
    As emmc driver depends on cru, so also set cru as u-boot,dm-pre-reloc here.
    
    Change-Id: Ia43d1a5ff2b9f75a28d18136d9d9185659a6fbe4
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-evb-u-boot.dtsi b/arch/arm/dts/rk3308-evb-u-boot.dtsi
index d21681348e..9c30b35950 100644
--- a/arch/arm/dts/rk3308-evb-u-boot.dtsi
+++ b/arch/arm/dts/rk3308-evb-u-boot.dtsi
@@ -12,6 +12,14 @@
 	};
 };
 
+&cru {
+        u-boot,dm-pre-reloc;
+};
+
+&emmc {
+	u-boot,dm-pre-reloc;
+};
+
 &grf {
 	u-boot,dm-pre-reloc;
 };

commit ec20593d9e707db8de34bc5f31c6c35b24fd571e
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Tue Mar 27 21:40:04 2018 +0800

    clk: rockchip: rk3308: Add support to set dclk_vop rate
    
    Change-Id: Ib7b5d35d4a65167d660f254600e0673bebd70432
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
index ee6204a4c5..e3fb750a39 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
@@ -160,6 +160,20 @@ enum {
 	BUS_HCLK_DIV_SHIFT	= 0,
 	BUS_HCLK_DIV_MASK	= 0x1f << BUS_HCLK_DIV_SHIFT,
 
+	/* CRU_CLK_SEL8_CON */
+	DCLK_VOP_SEL_SHIFT	= 14,
+	DCLK_VOP_SEL_MASK	= 0x3 << DCLK_VOP_SEL_SHIFT,
+	DCLK_VOP_SEL_DIVOUT	= 0,
+	DCLK_VOP_SEL_FRACOUT,
+	DCLK_VOP_SEL_24M,
+	DCLK_VOP_PLL_SEL_SHIFT	= 10,
+	DCLK_VOP_PLL_SEL_MASK	= 0x3 << DCLK_VOP_PLL_SEL_SHIFT,
+	DCLK_VOP_PLL_SEL_DPLL	= 0,
+	DCLK_VOP_PLL_SEL_VPLL0,
+	DCLK_VOP_PLL_SEL_VPLL1,
+	DCLK_VOP_DIV_SHIFT	= 0,
+	DCLK_VOP_DIV_MASK	= 0xff,
+
 	/* CRU_CLK_SEL25_CON */
 	/* CRU_CLK_SEL26_CON */
 	/* CRU_CLK_SEL27_CON */
diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index 3c8d5073fe..cf725596c8 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -44,7 +44,7 @@ static u32 pll_mode_mask[PLL_COUNT] = {
 	VPLL1_MODE_MASK
 };
 
-static ulong apll_hz, dpll_hz, vpll0_hz;
+static ulong apll_hz, dpll_hz, vpll0_hz, vpll1_hz;
 
 /*
  * How to calculate the PLL:
@@ -200,6 +200,7 @@ static void rkclk_init(struct rk3308_cru *cru)
 		     hclk_div << PERI_HCLK_DIV_SHIFT);
 
 	vpll0_hz = rkclk_pll_get_rate(cru, VPLL0);
+	vpll1_hz = rkclk_pll_get_rate(cru, VPLL1);
 }
 
 static ulong rk3308_i2c_get_clk(struct rk3308_cru *cru, ulong clk_id)
@@ -437,6 +438,93 @@ static ulong rk3308_pwm_set_clk(struct rk3308_cru *cru, uint hz)
 	return rk3308_pwm_get_clk(cru);
 }
 
+static ulong rk3308_vop_get_clk(struct rk3308_cru *cru)
+{
+	u32 div, pll_sel, vol_sel, con, parent;
+
+	con = readl(&cru->clksel_con[8]);
+	vol_sel = (con & DCLK_VOP_SEL_MASK) >> DCLK_VOP_SEL_SHIFT;
+	pll_sel = (con & DCLK_VOP_PLL_SEL_MASK) >> DCLK_VOP_PLL_SEL_SHIFT;
+	div = con & DCLK_VOP_DIV_MASK;
+
+	if (vol_sel == DCLK_VOP_SEL_24M) {
+		parent = OSC_HZ;
+	} else if (vol_sel == DCLK_VOP_SEL_DIVOUT) {
+		switch (pll_sel) {
+		case DCLK_VOP_PLL_SEL_DPLL:
+			parent = rkclk_pll_get_rate(cru, DPLL);
+			break;
+		case DCLK_VOP_PLL_SEL_VPLL0:
+			parent = rkclk_pll_get_rate(cru, VPLL0);
+			break;
+		case DCLK_VOP_PLL_SEL_VPLL1:
+			parent = rkclk_pll_get_rate(cru, VPLL1);
+			break;
+		default:
+			printf("do not support this vop pll sel\n");
+			return -EINVAL;
+		}
+	} else {
+		printf("do not support this vop sel\n");
+		return -EINVAL;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rk3308_vop_set_clk(struct rk3308_cru *cru, ulong hz)
+{
+	ulong pll_rate, now, best_rate = 0;
+	u32 i, div, best_div = 0, best_sel = 0;
+
+	for (i = 0; i <= DCLK_VOP_PLL_SEL_VPLL1; i++) {
+		switch (i) {
+		case DCLK_VOP_PLL_SEL_DPLL:
+			pll_rate = dpll_hz;
+			break;
+		case DCLK_VOP_PLL_SEL_VPLL0:
+			pll_rate = vpll0_hz;
+			break;
+		case DCLK_VOP_PLL_SEL_VPLL1:
+			pll_rate = vpll1_hz;
+			break;
+		default:
+			printf("do not support this vop pll sel\n");
+			return -EINVAL;
+		}
+
+		div = DIV_ROUND_UP(pll_rate, hz);
+		if (div > 255)
+			continue;
+		now = pll_rate / div;
+		if (abs(hz - now) < abs(hz - best_rate)) {
+			best_rate = now;
+			best_div = div;
+			best_sel = i;
+		}
+		debug("pll_rate=%lu, best_rate=%lu, best_div=%u, best_sel=%u\n",
+		      pll_rate, best_rate, best_div, best_sel);
+	}
+
+	if (best_rate != hz && hz == OSC_HZ) {
+		rk_clrsetreg(&cru->clksel_con[8],
+			     DCLK_VOP_SEL_MASK,
+			     DCLK_VOP_SEL_24M << DCLK_VOP_SEL_SHIFT);
+	} else if (best_rate) {
+		rk_clrsetreg(&cru->clksel_con[8],
+			     DCLK_VOP_SEL_MASK | DCLK_VOP_PLL_SEL_MASK |
+			     DCLK_VOP_DIV_MASK,
+			     DCLK_VOP_SEL_DIVOUT << DCLK_VOP_SEL_SHIFT |
+			     best_sel << DCLK_VOP_PLL_SEL_SHIFT |
+			     (best_div - 1) << DCLK_VOP_DIV_SHIFT);
+	} else {
+		printf("do not support this vop freq\n");
+		return -EINVAL;
+	}
+
+	return rk3308_vop_get_clk(cru);
+}
+
 static ulong rk3308_clk_get_rate(struct clk *clk)
 {
 	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
@@ -470,6 +558,9 @@ static ulong rk3308_clk_get_rate(struct clk *clk)
 	case SCLK_PWM:
 		rate = rk3308_pwm_get_clk(priv->cru);
 		break;
+	case DCLK_VOP:
+		rate = rk3308_vop_get_clk(priv->cru);
+		break;
 	default:
 		return -ENOENT;
 	}
@@ -508,6 +599,9 @@ static ulong rk3308_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_PWM:
 		ret = rk3308_pwm_set_clk(priv->cru, rate);
 		break;
+	case DCLK_VOP:
+		ret = rk3308_vop_set_clk(priv->cru, rate);
+		break;
 	default:
 		return -ENOENT;
 	}

commit 8bf1bc66d931f3f5b23129341f58403607c9fa4d
Author: David Wu <david.wu@rock-chips.com>
Date:   Mon Apr 2 16:01:22 2018 +0800

    pinctrl: rockchip: Add IOMUX_UNMASKED flag for rk3288 pmu_gpio0
    
    There are no masked bits for pmu_gpio0 iomux, so add the IOMUX_UNMASKED
    to read iomux register at first, it would not change others' bits.
    
    Change-Id: I5a0cf5f15c90fa769c3447d4e5f5380630b10c3b
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 36b06c508d..3fbd974f66 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -37,6 +37,7 @@ enum rockchip_pinctrl_type {
 #define IOMUX_UNROUTED		BIT(3)
 #define IOMUX_WIDTH_3BIT	BIT(4)
 #define IOMUX_8WIDTH_2BIT	BIT(5)
+#define IOMUX_UNMASKED		BIT(6)
 
 /**
  * @type: iomux variant using IOMUX_* constants
@@ -1113,7 +1114,11 @@ static int rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
 		}
 	}
 
-	data = (mask << (bit + 16));
+	if (mux_type & IOMUX_UNMASKED)
+		regmap_read(regmap, reg, &data);
+	else
+		data = (mask << (bit + 16));
+
 	data |= (mux & mask) << bit;
 	ret = regmap_write(regmap, reg, data);
 
@@ -2407,9 +2412,9 @@ static struct rockchip_pin_ctrl rk3228_pin_ctrl = {
 };
 
 static struct rockchip_pin_bank rk3288_pin_banks[] = {
-	PIN_BANK_IOMUX_FLAGS(0, 24, "gpio0", IOMUX_SOURCE_PMU,
-					     IOMUX_SOURCE_PMU,
-					     IOMUX_SOURCE_PMU,
+	PIN_BANK_IOMUX_FLAGS(0, 24, "gpio0", IOMUX_SOURCE_PMU | IOMUX_UNMASKED,
+					     IOMUX_SOURCE_PMU | IOMUX_UNMASKED,
+					     IOMUX_SOURCE_PMU | IOMUX_UNMASKED,
 					     IOMUX_UNROUTED
 			    ),
 	PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1", IOMUX_UNROUTED,

commit e290ced6461928697e46c08cd7d9cea63e63c88a
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Mon Apr 2 10:29:13 2018 +0800

    usb: gadget: skip receipent setup if usb config has not been set
    
    We found the following errors were reported when the rockusb
    command is executed.
    
    =============================
    RKUSB: LUN 0, dev 0, hwpart 0, sector 0x0, count 0xe90000
    "Synchronous Abort" handler, esr 0x96000010
    ELR:     22e5e4
    LR:      22e5dc
    x0 : 0000000000000000 x1 : 0000000000000064
    x2 : 0000000000000000 x3 : 00000000ff0c0000
    x4 : 0000000000000000 x5 : 0000000000000037
    x6 : 000000000000000a x7 : 0000000000000007
    x8 : 0000000000000008 x9 : 0000000000000008
    ...
    
    Resetting CPU ...
    
    It is caused by the null pointer in bmRequestType.Receipent.Device
    setup, theoretically, Receipent.Device setup should be handled after
    the set_configuration request was finished, so skip it if the usb
    configuration has not been set.
    
    Change-Id: I42caf375e8d842ad626d85a6a2a21dfb07fb557a
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c
index db3a754e49..ff89c1599c 100644
--- a/drivers/usb/gadget/composite.c
+++ b/drivers/usb/gadget/composite.c
@@ -903,10 +903,12 @@ unknown:
 		 * special non-standard request.
 		 */
 		case USB_RECIP_DEVICE:
-			debug("cdev->config->next_interface_id: %d intf: %d\n",
-			       cdev->config->next_interface_id, intf);
-			if (cdev->config->next_interface_id == 1)
-				f = cdev->config->interface[intf];
+			if (cdev->config) {
+				debug("cdev->config->next_interface_id: %d intf: %d\n",
+				      cdev->config->next_interface_id, intf);
+				if (cdev->config->next_interface_id == 1)
+					f = cdev->config->interface[intf];
+			}
 			break;
 		}
 

commit 5353f2a9a03776912796fcb29df3b07ee7b45eac
Author: jason.zhu <jason.zhu@rock-chips.com>
Date:   Fri Mar 30 21:26:59 2018 +0800

    android: fix memory overflow
    
    In the function android_assemble_cmdline, the allocated_suffix
    size must be strlen(ANDROID_ARG_SLOT_SUFFIX) + strlen(slot_suffix)
    +1. If not, the later strcpy and strcat operation will be
    out of bounds.
    
    Change-Id: Ib0ed73ebc2f076c8dc8afac168c7aaeccfddfa67
    Signed-off-by: jason.zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
old mode 100644
new mode 100755
index 669c057ee7..2627da9347
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -331,7 +331,9 @@ char *android_assemble_cmdline(const char *slot_suffix,
 	 */
 	if (slot_suffix) {
 		allocated_suffix = malloc(strlen(ANDROID_ARG_SLOT_SUFFIX) +
-					  strlen(slot_suffix));
+					  strlen(slot_suffix) + 1);
+		memset(allocated_suffix, 0, strlen(ANDROID_ARG_SLOT_SUFFIX)
+		       + strlen(slot_suffix) + 1);
 		strcpy(allocated_suffix, ANDROID_ARG_SLOT_SUFFIX);
 		strcat(allocated_suffix, slot_suffix);
 		*(current_chunk++) = allocated_suffix;

commit 4536545c9a6672a454d8de8c66064fe8efcabf98
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Apr 2 15:23:46 2018 +0800

    video/drm: rgb: properly check priv->grf pointer
    
    Change-Id: If5d4b1dea99aa2372488de5c154705a864fca474
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_rgb.c b/drivers/video/drm/rockchip_rgb.c
index 92dc839164..77009f0040 100644
--- a/drivers/video/drm/rockchip_rgb.c
+++ b/drivers/video/drm/rockchip_rgb.c
@@ -31,7 +31,7 @@ static int rockchip_rgb_prepare(struct display_state *state)
 	struct crtc_state *crtc_state = &state->crtc_state;
 	int pipe = crtc_state->crtc_id;
 
-	if (priv->grf) {
+	if (!IS_ERR_OR_NULL(priv->grf)) {
 		regmap_write(priv->grf, PX30_GRF_PD_VO_CON1,
 			     PX30_RGB_VOP_SEL(pipe));
 		regmap_write(priv->grf, PX30_GRF_PD_VO_CON1,

commit 72510c146aa740ec3e30a676e66b07f7cfbcb9c5
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Fri Mar 30 22:17:28 2018 +0800

    clk: rockchip: rk3308: Change peri bus parent to dpll
    
    Change-Id: I375500bdfaf884daf646b7c29e260fe997645f37
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index 98f4e68a5a..3c8d5073fe 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -184,21 +184,22 @@ static void rkclk_init(struct rk3308_cru *cru)
 		     hclk_div << BUS_HCLK_DIV_SHIFT);
 
 	/*
-	 * select vpll0 as pd_peri bus clock source and
+	 * select dpll as pd_peri bus clock source and
 	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
 	 */
-	vpll0_hz = rkclk_pll_get_rate(cru, VPLL0);
-	aclk_div = vpll0_hz / PERI_ACLK_HZ - 1;
-	hclk_div = vpll0_hz / PERI_HCLK_HZ - 1;
-	pclk_div = vpll0_hz / PERI_PCLK_HZ - 1;
+	aclk_div = dpll_hz / PERI_ACLK_HZ - 1;
+	hclk_div = dpll_hz / PERI_HCLK_HZ - 1;
+	pclk_div = dpll_hz / PERI_PCLK_HZ - 1;
 	rk_clrsetreg(&cru->clksel_con[36],
 		     PERI_PLL_SEL_MASK | PERI_ACLK_DIV_MASK,
-		     PERI_PLL_VPLL0 << PERI_PLL_SEL_SHIFT |
+		     BUS_PLL_SEL_DPLL << PERI_PLL_SEL_SHIFT |
 		     aclk_div << PERI_ACLK_DIV_SHIFT);
 	rk_clrsetreg(&cru->clksel_con[37],
 		     PERI_PCLK_DIV_MASK | PERI_HCLK_DIV_MASK,
 		     pclk_div << PERI_PCLK_DIV_SHIFT |
 		     hclk_div << PERI_HCLK_DIV_SHIFT);
+
+	vpll0_hz = rkclk_pll_get_rate(cru, VPLL0);
 }
 
 static ulong rk3308_i2c_get_clk(struct rk3308_cru *cru, ulong clk_id)

commit 329c8afb2461cf903861d68083883be2bdaa0b41
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Fri Mar 30 15:28:34 2018 +0800

    arm: rockchip: rk3308: fix the chip info
    
    The tag form tha package tool is rk3308
    
    Change-Id: I7c61ffb9f17a1eff72479eaa0912c57209156dbe
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/chip_info.c b/arch/arm/mach-rockchip/chip_info.c
index 772993ea08..bdf96bb9bf 100644
--- a/arch/arm/mach-rockchip/chip_info.c
+++ b/arch/arm/mach-rockchip/chip_info.c
@@ -41,7 +41,7 @@ int rockchip_get_chip_info(unsigned int chip_info[])
 #elif defined(CONFIG_ROCKCHIP_RK3288)
 	chip_info[0] = 0x33323041;
 #elif defined(CONFIG_ROCKCHIP_RK3308)
-	chip_info[0] = 0x33333045;
+	chip_info[0] = 0x33333038;
 #elif defined(CONFIG_ROCKCHIP_RK3328)
 	chip_info[0] = 0x33323043;
 	chip_info[3] = 0x56313030;

commit 839aff5094fc47c8983fc7ba5f95f8b1d27bc598
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Mar 29 16:21:40 2018 +0800

    rockchip: update and move CONFIG_NR_DRAM_BANKS to common header
    
    Most of SoCs have 2 banks after we enable OP-TEE,
    for those still only have 1 bank soc, it's OK to use 2 bank
    for the other one have size 0 if not used.
    
    Change-Id: Ifa0ee3e12960794c71398636e525ef853eae7870
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index da92b7a64c..deea62fe9f 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -38,7 +38,6 @@
 #define CONFIG_BOUNCE_BUFFER
 
 #define CONFIG_SYS_SDRAM_BASE		0
-#define CONFIG_NR_DRAM_BANKS		2
 #define SDRAM_MAX_SIZE			0xff000000
 #define SDRAM_BANK_SIZE			(2UL << 30)
 #define CONFIG_PREBOOT
diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index ed6770e52d..fc4f814355 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -35,9 +35,8 @@
 #define CONFIG_BOUNCE_BUFFER
 
 #define CONFIG_SYS_SDRAM_BASE		0x60000000
-#define CONFIG_NR_DRAM_BANKS		2
 #define SDRAM_BANK_SIZE			(512UL << 20UL)
-#define SDRAM_MAX_SIZE                  (CONFIG_NR_DRAM_BANKS * SDRAM_BANK_SIZE)
+#define SDRAM_MAX_SIZE			0x80000000
 
 #define CONFIG_SPI_FLASH
 #define CONFIG_SPI
diff --git a/include/configs/rk3066_common.h b/include/configs/rk3066_common.h
index aacd0facad..3f1b20f540 100644
--- a/include/configs/rk3066_common.h
+++ b/include/configs/rk3066_common.h
@@ -17,9 +17,8 @@
 #define CONFIG_SYS_CBSIZE		256
 
 #define CONFIG_SYS_SDRAM_BASE		0x60000000
-#define CONFIG_NR_DRAM_BANKS		1
 #define SDRAM_BANK_SIZE			(1024UL << 20UL)
-#define SDRAM_MAX_SIZE			CONFIG_NR_DRAM_BANKS * SDRAM_BANK_SIZE
+#define SDRAM_MAX_SIZE			0x80000000
 
 #define CONFIG_SYS_TIMER_COUNTS_DOWN
 
diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h
index 0358d95eba..ca4a21cfce 100644
--- a/include/configs/rk3128_common.h
+++ b/include/configs/rk3128_common.h
@@ -38,7 +38,6 @@
 
 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
 #define CONFIG_SYS_SDRAM_BASE		0x60000000
-#define CONFIG_NR_DRAM_BANKS		2
 #define SDRAM_MAX_SIZE			0x80000000
 
 #define CONFIG_SPI_FLASH
diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h
index 9c69a893d5..d95ce978b1 100644
--- a/include/configs/rk3188_common.h
+++ b/include/configs/rk3188_common.h
@@ -13,7 +13,6 @@
 #include "rockchip-common.h"
 
 #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
-#define CONFIG_NR_DRAM_BANKS		1
 #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 
@@ -44,7 +43,6 @@
 #define CONFIG_BOUNCE_BUFFER
 
 #define CONFIG_SYS_SDRAM_BASE		0x60000000
-#define CONFIG_NR_DRAM_BANKS		1
 #define SDRAM_BANK_SIZE			(2UL << 30)
 #define SDRAM_MAX_SIZE			0x80000000
 
diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h
index e40d4504b9..28263e1895 100644
--- a/include/configs/rk322x_common.h
+++ b/include/configs/rk322x_common.h
@@ -32,7 +32,6 @@
 #define CONFIG_BOUNCE_BUFFER
 
 #define CONFIG_SYS_SDRAM_BASE		0x60000000
-#define CONFIG_NR_DRAM_BANKS		2
 #define SDRAM_BANK_SIZE			(512UL << 20UL)
 #define SDRAM_MAX_SIZE			0x80000000
 
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index 5e9b314f16..6d5d0b5106 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -11,7 +11,6 @@
 #include "rockchip-common.h"
 
 #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
-#define CONFIG_NR_DRAM_BANKS		1
 #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 
@@ -48,7 +47,6 @@
 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME		"u-boot.img"
 
 #define CONFIG_SYS_SDRAM_BASE		0
-#define CONFIG_NR_DRAM_BANKS		1
 #define SDRAM_BANK_SIZE			(2UL << 30)
 #define SDRAM_MAX_SIZE			0xfe000000
 
diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h
index 24bf22cd8e..98295e1747 100644
--- a/include/configs/rk3308_common.h
+++ b/include/configs/rk3308_common.h
@@ -38,7 +38,6 @@
 #define CONFIG_BOUNCE_BUFFER
 
 #define CONFIG_SYS_SDRAM_BASE		0
-#define CONFIG_NR_DRAM_BANKS		2
 #define SDRAM_MAX_SIZE			0xff000000
 #define SDRAM_BANK_SIZE			(2UL << 30)
 #define CONFIG_PREBOOT
diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index 1ecc4f7b53..a55dd5e644 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -42,7 +42,6 @@
 /* FAT sd card locations. */
 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
 #define CONFIG_SYS_SDRAM_BASE		0
-#define CONFIG_NR_DRAM_BANKS		1
 #define SDRAM_MAX_SIZE			0xff000000
 
 #define CONFIG_SPI_FLASH
diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h
index a8a12a3eae..eead7b22ce 100644
--- a/include/configs/rk3368_common.h
+++ b/include/configs/rk3368_common.h
@@ -16,7 +16,6 @@
 
 #define CONFIG_SYS_SDRAM_BASE		0
 #define SDRAM_MAX_SIZE			0xff000000
-#define CONFIG_NR_DRAM_BANKS		1
 #define CONFIG_BAUDRATE			115200
 #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		1024
diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index fe17975d91..44b5af290d 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -9,7 +9,6 @@
 
 #include "rockchip-common.h"
 
-#define CONFIG_NR_DRAM_BANKS		1
 #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
@@ -52,7 +51,6 @@
 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
 #define CONFIG_SYS_SDRAM_BASE		0
 #define SDRAM_MAX_SIZE			0xf8000000
-#define CONFIG_NR_DRAM_BANKS		1
 
 #define CONFIG_SF_DEFAULT_SPEED 20000000
 
diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index 12d3609d51..f1b87ffbc4 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -14,6 +14,8 @@
 
 #define CONFIG_SYS_NS16550_MEM32
 
+#define CONFIG_NR_DRAM_BANKS		2
+
 #ifndef CONFIG_SPL_BUILD
 #include <config_distro_defaults.h>
 
diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h
index 4f3f7a0434..d0afa41a99 100644
--- a/include/configs/rv1108_common.h
+++ b/include/configs/rv1108_common.h
@@ -15,7 +15,6 @@
 
 #define CONFIG_SYS_SDRAM_BASE		0x60000000
 #define SDRAM_MAX_SIZE			0x80000000
-#define CONFIG_NR_DRAM_BANKS		1
 #define CONFIG_SYS_TEXT_BASE		CONFIG_SYS_SDRAM_BASE
 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_TEXT_BASE + 0x100000)
 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x2000000)

commit 5f601e7c0ecaafb8f7fa25a204f90faf8c3b300b
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Dec 19 21:00:56 2017 +0800

    rockchip: kylin-rk3036: add README file for OP-TEE support
    
    Detail of step by step to bring up the board with OP-TEE support.
    
    Change-Id: I0d0a1ab8cbe720e35959d6611519f4dfcb51b349
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/board/rockchip/kylin_rk3036/README b/board/rockchip/kylin_rk3036/README
new file mode 100644
index 0000000000..69f20313d0
--- /dev/null
+++ b/board/rockchip/kylin_rk3036/README
@@ -0,0 +1,68 @@
+Get the Source and prebuild binary
+==================================
+
+  > mkdir ~/kylin_rk3036
+  > cd ~/kylin_rk3036
+  > git clone git://git.denx.de/u-boot.git
+  > git clone https://github.com/rockchip-linux/rkbin.git
+  > git clone https://github.com/rockchip-linux/rkdeveloptool.git
+
+Get the OP-TEE
+===============
+
+  Get tee.bin in this step, copy it to U-Boot root dir:
+  > cp rkbin/rk30/rk3036_tee_v1.00.bin ../u-boot/tee.bin
+
+Compile the U-Boot
+==================
+
+  > cd ../u-boot
+  > export CROSS_COMPILE=arm-linux-gnueabihf-
+  > export ARCH=arm
+  > make kylin-rk3036_defconfig
+  > make
+  > make u-boot.itb
+
+  Get tpl/u-boot-tpl.bin, spl/u-boot-spl.bin and u-boot.itb in this step.
+
+Compile the rkdeveloptool
+=======================
+  Follow instructions in latest README
+  > cd ../rkflashtool
+  > autoreconf -i
+  > ./configure
+  > make
+  > sudo make install
+
+  Get rkdeveloptool in you Host in this step.
+
+Both origin binaries and Tool are ready now, choose either option 1 or
+option 2 to deploy U-Boot.
+
+Package the image
+=================
+
+  > cd ../u-boot
+  > tools/mkimage -n rk3036 -T rksd -d tpl/u-boot-tpl.bin idbloader.img
+  > cat spl/u-boot-spl.bin >> idbloader.img
+
+  Get idbloader.img in this step.
+
+Flash the image to eMMC
+=======================
+Power on(or reset with RESET KEY) with MASKROM KEY preesed, and then:
+  > cd ..
+  > rkdeveloptool db rkbin/rk30/rk3036_loader_v1.07.237.bin
+  > rkdeveloptool wl 64 u-boot/idbloader.img
+  > rkdeveloptool wl 0x4000 u-boot/u-boot.itb
+  > rkdeveloptool rd
+
+Flash the image to SD card
+==========================
+  > dd if=u-boot/idbloader.img of=/dev/sdb seek=64
+  > dd if=u-boot/u-boot.itb of=/dev/sdb seek=16384
+
+You should be able to get U-Boot log message with OP-TEE boot info.
+
+For more detail, please reference to:
+http://opensource.rock-chips.com/wiki_Boot_option

commit cdfcfbcc927a7d1e7047774c4de2c7c6b029369b
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Dec 19 20:54:15 2017 +0800

    rockchip: rk3036: Enable tpl and optee support
    
    Move original spl to tpl, and add spl to load next stage firmware,
    adapt all the address and option for them. Then Enable all the
    options for TPL/SPL and OPTEE.
    
    Change-Id: I44568d84984ca2f4b019fc85e80fbcbaba16fed4
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 3d08d9e4dd..bf418da8ab 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -25,7 +25,14 @@ config ROCKCHIP_RK3036
 	bool "Support Rockchip RK3036"
 	select CPU_V7
 	select SUPPORT_SPL
+	select SUPPORT_TPL
 	select SPL
+	select TPL
+	select BOARD_LATE_INIT
+	select ROCKCHIP_BROM_HELPER
+	select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
+	select TPL_NEEDS_SEPARATE_STACK if TPL
+	select DEBUG_UART_BOARD_INIT
 	help
 	  The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
 	  including NEON and GPU, Mali-400 graphics, several DDR3 options
diff --git a/configs/evb-rk3036_defconfig b/configs/evb-rk3036_defconfig
index 4bf97b7260..9c064ce8e7 100644
--- a/configs/evb-rk3036_defconfig
+++ b/configs/evb-rk3036_defconfig
@@ -1,22 +1,42 @@
 CONFIG_ARM=y
-# CONFIG_SPL_USE_ARCH_MEMCPY is not set
-# CONFIG_SPL_USE_ARCH_MEMSET is not set
 CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x800
 CONFIG_ROCKCHIP_RK3036=y
+CONFIG_TPL_TEXT_BASE=0x10081000
+CONFIG_TPL_STACK=0x10081fff
+# CONFIG_SPL_ROCKCHIP_BACK_TO_BROM is not set
+CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_TARGET_EVB_RK3036=y
-CONFIG_SPL_STACK_R_ADDR=0x80000
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_STACK_R_ADDR=0x60600000
 CONFIG_DEFAULT_DEVICE_TREE="rk3036-sdk"
 CONFIG_DEBUG_UART=y
-CONFIG_SPL_SYS_MALLOC_F_LEN=0x0
-# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x0
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_SOURCE="arch/arm/mach-rockchip/fit_spl_optee.its"
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
 CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
+CONFIG_SPL_OPTEE_SUPPORT=y
+CONFIG_SPL_OPTEE=y
+CONFIG_TPL_SERIAL_SUPPORT=y
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
@@ -27,17 +47,26 @@ CONFIG_CMD_TIME=y
 # CONFIG_SPL_ISO_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_SPL_PARTITION_UUIDS=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
 CONFIG_CLK=y
+CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_LED=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
 CONFIG_DM_RESET=y
-# CONFIG_SPL_DM_SERIAL is not set
+# CONFIG_TPL_DM_SERIAL is not set
 CONFIG_DEBUG_UART_BASE=0x20068000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
@@ -49,6 +78,12 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Rockchip"
 CONFIG_G_DNL_VENDOR_NUM=0x2207
 CONFIG_G_DNL_PRODUCT_NUM=0x310a
-CONFIG_SPL_TINY_MEMSET=y
 CONFIG_CMD_DHRYSTONE=y
+CONFIG_USE_TINY_PRINTF=y
 CONFIG_ERRNO_STR=y
+CONFIG_AVB_LIBAVB=y
+CONFIG_AVB_LIBAVB_AB=y
+CONFIG_AVB_LIBAVB_ATX=y
+CONFIG_AVB_LIBAVB_USER=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V1=y
diff --git a/configs/kylin-rk3036_defconfig b/configs/kylin-rk3036_defconfig
index dec941cfd3..8bfd8f46c5 100644
--- a/configs/kylin-rk3036_defconfig
+++ b/configs/kylin-rk3036_defconfig
@@ -1,16 +1,35 @@
 CONFIG_ARM=y
-# CONFIG_SPL_USE_ARCH_MEMCPY is not set
-# CONFIG_SPL_USE_ARCH_MEMSET is not set
 CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x800
 CONFIG_ROCKCHIP_RK3036=y
+CONFIG_TPL_TEXT_BASE=0x10081000
+CONFIG_TPL_STACK=0x10081fff
+# CONFIG_SPL_ROCKCHIP_BACK_TO_BROM is not set
+CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_TARGET_KYLIN_RK3036=y
-CONFIG_SPL_STACK_R_ADDR=0x80000
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_STACK_R_ADDR=0x60600000
 CONFIG_DEFAULT_DEVICE_TREE="rk3036-sdk"
-CONFIG_SPL_SYS_MALLOC_F_LEN=0x0
+CONFIG_DEBUG_UART=y
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x0
 # CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_SOURCE="arch/arm/mach-rockchip/fit_spl_optee.its"
 # CONFIG_DISPLAY_CPUINFO is not set
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
 CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
+CONFIG_SPL_OPTEE_SUPPORT=y
+CONFIG_SPL_OPTEE=y
+CONFIG_TPL_SERIAL_SUPPORT=y
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_IMLS is not set
@@ -23,21 +42,28 @@ CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIME=y
-# CONFIG_SPL_DOS_PARTITION is not set
-# CONFIG_SPL_ISO_PARTITION is not set
-# CONFIG_SPL_EFI_PARTITION is not set
-CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
 CONFIG_CLK=y
+CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_LED=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
 CONFIG_DM_REGULATOR_FIXED=y
-# CONFIG_SPL_DM_SERIAL is not set
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+# CONFIG_TPL_DM_SERIAL is not set
+CONFIG_DEBUG_UART_BASE=0x20068000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_DWC2=y
@@ -51,6 +77,10 @@ CONFIG_G_DNL_PRODUCT_NUM=0x310a
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_ETHER_SMSC95XX=y
-CONFIG_SPL_TINY_MEMSET=y
-CONFIG_CMD_DHRYSTONE=y
 CONFIG_ERRNO_STR=y
+CONFIG_AVB_LIBAVB=y
+CONFIG_AVB_LIBAVB_AB=y
+CONFIG_AVB_LIBAVB_ATX=y
+CONFIG_AVB_LIBAVB_USER=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V1=y
diff --git a/include/configs/evb_rk3036.h b/include/configs/evb_rk3036.h
index aa07889ff2..807bf7ec55 100644
--- a/include/configs/evb_rk3036.h
+++ b/include/configs/evb_rk3036.h
@@ -7,6 +7,37 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <linux/sizes.h>
 #include <configs/rk3036_common.h>
 
+/* Store env in emmc */
+#define CONFIG_SYS_MMC_ENV_DEV          0
+#define CONFIG_SYS_MMC_ENV_PART         0
+#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
+#define CONFIG_SUPPORT_EMMC_RPMB
+
+#ifndef CONFIG_SPL_BUILD
+/* Enable gpt partition table */
+#undef CONFIG_PREBOOT
+#define CONFIG_PREBOOT \
+	"mmc dev 0; " \
+	"gpt guid mmc 0; " \
+	"if test $? = 1; then " \
+		"fastboot usb 0; " \
+	"fi; "
+
+#define CONFIG_SYS_BOOT_RAMDISK_HIGH
+
+/* Store env in emmc */
+#define CONFIG_SYS_MMC_ENV_DEV		0 /* emmc */
+#define CONFIG_SYS_MMC_ENV_PART		0 /* user area */
+
+/* Enable atags */
+#define CONFIG_SYS_BOOTPARAMS_LEN	(64*1024)
+#define CONFIG_INITRD_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_CMDLINE_TAG
+
+#endif
+
 #endif
diff --git a/include/configs/kylin_rk3036.h b/include/configs/kylin_rk3036.h
index d2d630d610..807bf7ec55 100644
--- a/include/configs/kylin_rk3036.h
+++ b/include/configs/kylin_rk3036.h
@@ -10,12 +10,34 @@
 #include <linux/sizes.h>
 #include <configs/rk3036_common.h>
 
+/* Store env in emmc */
+#define CONFIG_SYS_MMC_ENV_DEV          0
+#define CONFIG_SYS_MMC_ENV_PART         0
+#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
+#define CONFIG_SUPPORT_EMMC_RPMB
+
 #ifndef CONFIG_SPL_BUILD
+/* Enable gpt partition table */
+#undef CONFIG_PREBOOT
+#define CONFIG_PREBOOT \
+	"mmc dev 0; " \
+	"gpt guid mmc 0; " \
+	"if test $? = 1; then " \
+		"fastboot usb 0; " \
+	"fi; "
+
+#define CONFIG_SYS_BOOT_RAMDISK_HIGH
 
 /* Store env in emmc */
 #define CONFIG_SYS_MMC_ENV_DEV		0 /* emmc */
 #define CONFIG_SYS_MMC_ENV_PART		0 /* user area */
 
+/* Enable atags */
+#define CONFIG_SYS_BOOTPARAMS_LEN	(64*1024)
+#define CONFIG_INITRD_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_CMDLINE_TAG
+
 #endif
 
 #endif
diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index b655a42c57..ed6770e52d 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -9,16 +9,23 @@
 #include <asm/arch/hardware.h>
 #include "rockchip-common.h"
 
-#define CONFIG_NR_DRAM_BANKS		1
 #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/*  64M */
 
-#define CONFIG_SYS_TEXT_BASE		0x60000000
-#define CONFIG_SYS_INIT_SP_ADDR		0x60100000
-#define CONFIG_SYS_LOAD_ADDR		0x60800800
-#define CONFIG_SPL_STACK		0x10081fff
-#define CONFIG_SPL_TEXT_BASE		0x10081000
+#define CONFIG_TINY_TPL
+#define CONFIG_SPL_FRAMEWORK
+
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_MEM32
+#define CONFIG_SYS_TEXT_BASE		0x61000000
+#define CONFIG_SYS_INIT_SP_ADDR		0x61100000
+#define CONFIG_SYS_LOAD_ADDR		0x61800800
+#define CONFIG_SPL_TEXT_BASE		0x60000000
+
+#define CONFIG_TPL_STACK		0x10081fff
+#define CONFIG_TPL_TEXT_BASE		0x10081000
 
 #define CONFIG_ROCKCHIP_MAX_INIT_SIZE	(4 << 10)
 #define CONFIG_ROCKCHIP_CHIP_TAG	"RK30"
@@ -28,7 +35,7 @@
 #define CONFIG_BOUNCE_BUFFER
 
 #define CONFIG_SYS_SDRAM_BASE		0x60000000
-#define CONFIG_NR_DRAM_BANKS		1
+#define CONFIG_NR_DRAM_BANKS		2
 #define SDRAM_BANK_SIZE			(512UL << 20UL)
 #define SDRAM_MAX_SIZE                  (CONFIG_NR_DRAM_BANKS * SDRAM_BANK_SIZE)
 

commit 30129f2f83f2d63123c91c28e3d0dd9c759233d5
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Jan 30 13:06:24 2018 +0800

    config: Add CONFIG_TINY_TPL to disable SPL framework at TPL
    
    Some devices cann't use SPL framework at TPL stage, but the
    CONFIG_SPL_FRAMEWORK is still defined at TPL stage, so need
    to separate them with CONFIG_TINY_TPL.
    
    If the SPL framewrok was used both at TPL and SPL stage,
    CONFIG_TINY_TPL is not defined.
    If the SPL framewrok was used at SPL stage, but not use at
    TPL, need to define CONFIG_TINY_TPL.
    
    Change-Id: Iabb7e0377ee00311ca468cb8ff7544c96bd999d6
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/sys_proto.h b/arch/arm/include/asm/arch-rockchip/sys_proto.h
index 7b7e336bda..f66bccee2f 100644
--- a/arch/arm/include/asm/arch-rockchip/sys_proto.h
+++ b/arch/arm/include/asm/arch-rockchip/sys_proto.h
@@ -7,7 +7,7 @@
 #ifndef _ASM_ARCH_SYS_PROTO_H
 #define _ASM_ARCH_SYS_PROTO_H
 
-#ifndef CONFIG_SPL_FRAMEWORK
+#if !defined(CONFIG_SPL_FRAMEWORK) || defined(CONFIG_TINY_TPL)
 void sdram_init(void);
 #endif
 
diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S
index 3c1c603039..f7e1755ea1 100644
--- a/arch/arm/lib/crt0.S
+++ b/arch/arm/lib/crt0.S
@@ -121,7 +121,7 @@ here:
 
 	bl	c_runtime_cpu_setup	/* we still call old routine here */
 #endif
-#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_FRAMEWORK)
+#if !defined(CONFIG_SPL_BUILD) || (defined(CONFIG_SPL_FRAMEWORK) && !defined(CONFIG_TPL_BUILD))
 # ifdef CONFIG_SPL_BUILD
 	/* Use a DRAM stack for the rest of SPL, if requested */
 	bl	spl_relocate_stack_gd
diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c
index 12b6149420..d712130d55 100644
--- a/arch/arm/mach-rockchip/tpl.c
+++ b/arch/arm/mach-rockchip/tpl.c
@@ -14,6 +14,7 @@
 #include <asm/io.h>
 #include <asm/arch/bootrom.h>
 #include <asm/arch/uart.h>
+#include <asm/arch-rockchip/sys_proto.h>
 
 #ifndef CONFIG_TPL_LIBCOMMON_SUPPORT
 #define CONFIG_SYS_NS16550_COM1 CONFIG_DEBUG_UART_BASE
@@ -70,8 +71,10 @@ __weak int arch_cpu_init(void)
 
 void board_init_f(ulong dummy)
 {
+#if defined(CONFIG_SPL_FRAMEWORK) && !defined(CONFIG_TINY_TPL)
 	struct udevice *dev;
 	int ret;
+#endif
 
 	rockchip_stimer_init();
 	arch_cpu_init();
@@ -88,28 +91,35 @@ void board_init_f(ulong dummy)
 	debug_uart_init();
 	printascii("\nU-Boot TPL " PLAIN_VERSION " (" U_BOOT_DATE " - " \
 				U_BOOT_TIME ")\n");
-
 #endif
+
+#if defined(CONFIG_SPL_FRAMEWORK) && !defined(CONFIG_TINY_TPL)
 	ret = spl_early_init();
 	if (ret) {
 		debug("spl_early_init() failed: %d\n", ret);
 		hang();
 	}
+#endif
 
 	/* Init ARM arch timer */
 	timer_init();
+
+#if defined(CONFIG_SPL_FRAMEWORK) && !defined(CONFIG_TINY_TPL)
 	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
 	if (ret) {
 		printf("DRAM init failed: %d\n", ret);
 		return;
 	}
+#else
+	sdram_init();
+#endif
 
 #if defined(CONFIG_TPL_ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_TPL_BOARD_INIT)
 	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
 #endif
 }
 
-#ifndef CONFIG_SPL_FRAMEWORK
+#if !(defined(CONFIG_SPL_FRAMEWORK) && !defined(CONFIG_TINY_TPL))
 /* Place Holders */
 void board_init_r(gd_t *id, ulong dest_addr)
 {
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 3e6f526e37..0be334db2a 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -852,6 +852,11 @@ config TPL_LIBGENERIC_SUPPORT
 	  Enable support for generic U-Boot libraries within TPL. See
 	  SPL_LIBGENERIC_SUPPORT for details.
 
+config TINY_TPL
+	bool "Support not to use spl framework in TPL"
+	help
+	  Enable support for not using spl framework in TPL, to reduce the TPL size.
+
 config TPL_MPC8XXX_INIT_DDR_SUPPORT
 	bool "Support MPC8XXX DDR init"
 	help
diff --git a/common/spl/Makefile b/common/spl/Makefile
index 9918a2e6f1..2267db8801 100644
--- a/common/spl/Makefile
+++ b/common/spl/Makefile
@@ -8,8 +8,17 @@
 # Based on common/Makefile.
 #
 
+ifeq ($(CONFIG_TPL_BUILD), y)
+ifndef CONFIG_TINY_TPL
+obj-$(CONFIG_SPL_FRAMEWORK) += spl.o
+endif
+else
 ifdef CONFIG_SPL_BUILD
 obj-$(CONFIG_SPL_FRAMEWORK) += spl.o
+endif
+endif
+
+ifdef CONFIG_SPL_BUILD
 obj-$(CONFIG_$(SPL_TPL_)BOOTROM_SUPPORT) += spl_bootrom.o
 obj-$(CONFIG_$(SPL_TPL_)LOAD_FIT) += spl_fit.o
 obj-$(CONFIG_$(SPL_TPL_)NOR_SUPPORT) += spl_nor.o
diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index 64390e5785..0d0426757d 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -64,7 +64,14 @@ HAVE_VENDOR_COMMON_LIB = $(if $(wildcard $(srctree)/board/$(VENDOR)/common/Makef
 libs-y += $(if $(BOARDDIR),board/$(BOARDDIR)/)
 libs-$(HAVE_VENDOR_COMMON_LIB) += board/$(VENDOR)/common/
 
+ifeq ($(CONFIG_TPL_BUILD),y)
+ifndef CONFIG_TINY_TPL
+libs-$(CONFIG_SPL_FRAMEWORK) += common/spl/
+endif
+else
 libs-$(CONFIG_SPL_FRAMEWORK) += common/spl/
+endif
+
 libs-y += common/init/
 
 # Special handling for a few options which support SPL/TPL
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index f22cf55ae3..12430e5d73 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -4870,6 +4870,7 @@ CONFIG_TIZEN
 CONFIG_TI_KEYSTONE_SERDES
 CONFIG_TI_KSNAV
 CONFIG_TI_SPI_MMAP
+CONFIG_TINY_TPL
 CONFIG_TMU_TIMER
 CONFIG_TPL_PAD_TO
 CONFIG_TPM_TIS_BASE_ADDRESS

commit 56af001036f56be445970b71f2c47d181bfe8b24
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Jan 30 11:29:31 2018 +0800

    ARM: mach-rockchip: tpl: Add hang() and udelay() for rk3036 tpl usage
    
    If CONFIG_TPL_LIBGENERIC_SUPPORT is not defined, we need to implement
    the hang() and udelay() for complier error.
    
    Change-Id: I43d4d6c55ba893ef554641b3574297c81dd85c93
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c
index ac071508c9..12b6149420 100644
--- a/arch/arm/mach-rockchip/tpl.c
+++ b/arch/arm/mach-rockchip/tpl.c
@@ -32,6 +32,20 @@ void putc(char c)
 }
 #endif /* CONFIG_TPL_LIBCOMMON_SUPPORT */
 
+#ifndef CONFIG_TPL_LIBGENERIC_SUPPORT
+void udelay(unsigned long usec)
+{
+	__udelay(usec);
+}
+
+void hang(void)
+{
+        bootstage_error(BOOTSTAGE_ID_NEED_RESET);
+        for (;;)
+                ;
+}
+#endif
+
 u32 spl_boot_device(void)
 {
 	return BOOT_DEVICE_BOOTROM;

commit 51b91a9708f494e4871f7167a66fc64345968925
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Jan 30 11:45:51 2018 +0800

    ARM: mach-rockchip: tpl: Change the LIBCOMMON_SUPPORT config from SPL to TPL
    
    Also we need to define the CONFIG_SYS_NS16550_COM1 compilering warning.
    
    Change-Id: Ib2069820c396d48d70e013cc86bb987822b064cb
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c
index 85e5416997..ac071508c9 100644
--- a/arch/arm/mach-rockchip/tpl.c
+++ b/arch/arm/mach-rockchip/tpl.c
@@ -15,7 +15,8 @@
 #include <asm/arch/bootrom.h>
 #include <asm/arch/uart.h>
 
-#ifndef CONFIG_SPL_LIBCOMMON_SUPPORT
+#ifndef CONFIG_TPL_LIBCOMMON_SUPPORT
+#define CONFIG_SYS_NS16550_COM1 CONFIG_DEBUG_UART_BASE
 void puts(const char *str)
 {
 	while (*str)
@@ -29,7 +30,7 @@ void putc(char c)
 
 	NS16550_putc((NS16550_t)(CONFIG_SYS_NS16550_COM1), c);
 }
-#endif /* CONFIG_SPL_LIBCOMMON_SUPPORT */
+#endif /* CONFIG_TPL_LIBCOMMON_SUPPORT */
 
 u32 spl_boot_device(void)
 {

commit d975296c8fbbdfdfdcb985d3ffc3da7e9ad8bec7
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Dec 19 20:36:00 2017 +0800

    rockchip: rk3036: Add some devices with dm-pre-reloc property
    
    Enable cru, emmc, dmc devices' pre-relocate property for usage.
    
    Change-Id: I297488f90f73f012feeb9e9aea3fb2e955b9ec0a
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/dts/rk3036-sdk-u-boot.dtsi b/arch/arm/dts/rk3036-sdk-u-boot.dtsi
index 6f15f4a8ec..51ee4a6e54 100644
--- a/arch/arm/dts/rk3036-sdk-u-boot.dtsi
+++ b/arch/arm/dts/rk3036-sdk-u-boot.dtsi
@@ -1,4 +1,12 @@
-&uart2 {
+&cru {
+	u-boot,dm-pre-reloc;
+};
+
+&dmc {
+	u-boot,dm-pre-reloc;
+};
+
+&emmc {
 	u-boot,dm-pre-reloc;
 };
 
@@ -9,3 +17,7 @@
 &pinctrl {
 	u-boot,dm-pre-reloc;
 };
+
+&uart2 {
+	u-boot,dm-pre-reloc;
+};
\ No newline at end of file
diff --git a/arch/arm/dts/rk3036.dtsi b/arch/arm/dts/rk3036.dtsi
index ca8f1e8e8d..4a78bb5010 100644
--- a/arch/arm/dts/rk3036.dtsi
+++ b/arch/arm/dts/rk3036.dtsi
@@ -109,6 +109,11 @@
 		assigned-clock-rates = <594000000>;
 	};
 
+	dmc: dmc@20004000 {
+		compatible = "rockchip,rk3036-dmc", "syscon";
+		reg = <0x0 0x20004000 0x0 0x1000>;
+	};
+
 	uart0: serial@20060000 {
 		compatible = "rockchip,rk3036-uart", "snps,dw-apb-uart";
 		reg = <0x20060000 0x100>;

commit 00fbb281ed61d719b345bb31b96d3bcd0f3f87ef
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Dec 19 20:29:33 2017 +0800

    rockchip: clk: rk3036: Add power down and power up for pll set
    
    If power down and power up were not done, there was an error during
    pll setting again.
    
    Change-Id: Iaa5ef558c2bff270614f08d96a70e5c847ce927c
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3036.h b/arch/arm/include/asm/arch-rockchip/cru_rk3036.h
index 22278e11ac..ca60507617 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3036.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3036.h
@@ -75,6 +75,8 @@ enum {
 
 	/* PLLCON1 */
 	PLL_RST_SHIFT		= 14,
+	PLL_PD_SHIFT		= 13,
+	PLL_PD_MASK		= 1 << PLL_PD_SHIFT,
 	PLL_DSMPD_SHIFT		= 12,
 	PLL_DSMPD_MASK		= 1 << PLL_DSMPD_SHIFT,
 	PLL_LOCK_STATUS_SHIFT	= 10,
diff --git a/drivers/clk/rockchip/clk_rk3036.c b/drivers/clk/rockchip/clk_rk3036.c
index 35b93d2341..ab3154c554 100644
--- a/drivers/clk/rockchip/clk_rk3036.c
+++ b/drivers/clk/rockchip/clk_rk3036.c
@@ -64,6 +64,9 @@ static int rkclk_set_pll(struct rk3036_cru *cru, enum rk_clk_id clk_id,
 	/* use integer mode */
 	rk_setreg(&pll->con1, 1 << PLL_DSMPD_SHIFT);
 
+	/* Power down */
+	rk_setreg(&pll->con1, 1 << PLL_PD_SHIFT);
+
 	rk_clrsetreg(&pll->con0,
 		     PLL_POSTDIV1_MASK | PLL_FBDIV_MASK,
 		     (div->postdiv1 << PLL_POSTDIV1_SHIFT) | div->fbdiv);
@@ -71,6 +74,9 @@ static int rkclk_set_pll(struct rk3036_cru *cru, enum rk_clk_id clk_id,
 		     (div->postdiv2 << PLL_POSTDIV2_SHIFT |
 		     div->refdiv << PLL_REFDIV_SHIFT));
 
+	/* Power Up */
+	rk_clrreg(&pll->con1, 1 << PLL_PD_SHIFT);
+
 	/* waiting for pll lock */
 	while (readl(&pll->con1) & (1 << PLL_LOCK_STATUS_SHIFT))
 		udelay(1);

commit 17dbd5695b1d03dd43f3273062b7dc178c1495c0
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Dec 19 20:11:05 2017 +0800

    rockchip: rk3036: Make the syscon build for spl usage
    
    Change the Make file to make rk3036_syscon built-in for
    spl usage, but tpl not need to use it.
    
    Change-Id: I6dd2b33e223a9854d0731ecc8c5b4b408a070d2e
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3036/Makefile b/arch/arm/mach-rockchip/rk3036/Makefile
index 8a144d1f9e..4c523993a2 100644
--- a/arch/arm/mach-rockchip/rk3036/Makefile
+++ b/arch/arm/mach-rockchip/rk3036/Makefile
@@ -6,7 +6,7 @@
 
 obj-y += rk3036.o clk_rk3036.o
 
-ifndef CONFIG_SPL_BUILD
+ifndef CONFIG_TPL_BUILD
 obj-y += syscon_rk3036.o
 endif
 

commit 32ff46e2cedb5304cdc8d01c143a1f1748a2dd7e
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Dec 19 11:24:20 2017 +0800

    rockchip: rk3036: Add sdram uclass driver
    
    This patch is for the implement of common interface, which get the
    sdram info for rk3036, just need to get the sdram info from OS_REG
    that has been written already.
    
    Change-Id: I56fdebead092bf3bb649809203d076d11a9ff890
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index 80262836a9..674a58cc77 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -6,6 +6,7 @@
 
 obj-$(CONFIG_ROCKCHIP_RK3368) = dmc-rk3368.o
 obj-$(CONFIG_ROCKCHIP_RV1108) = sdram_rv1108_pctl_phy.o sdram_rv1108.o
+obj-$(CONFIG_ROCKCHIP_RK3036) = sdram_rk3036.o
 obj-$(CONFIG_ROCKCHIP_RK3128) = sdram_rk3128.o
 obj-$(CONFIG_ROCKCHIP_RK3188) = sdram_rk3188.o
 obj-$(CONFIG_ROCKCHIP_RK322X) = sdram_rk322x.o
diff --git a/drivers/ram/rockchip/sdram_rk3036.c b/drivers/ram/rockchip/sdram_rk3036.c
new file mode 100644
index 0000000000..44c6a1c949
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_rk3036.c
@@ -0,0 +1,60 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:     GPL-2.0
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <ram.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/grf_rk3036.h>
+#include <asm/arch/sdram_common.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct dram_info {
+	struct ram_info info;
+	struct rk3036_grf *grf;
+};
+
+static int rk3036_dmc_probe(struct udevice *dev)
+{
+	struct dram_info *priv = dev_get_priv(dev);
+
+	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	debug("%s: grf=%p\n", __func__, priv->grf);
+	priv->info.base = CONFIG_SYS_SDRAM_BASE;
+	priv->info.size = rockchip_sdram_size(
+				(phys_addr_t)&priv->grf->os_reg[1]);
+
+	return 0;
+}
+
+static int rk3036_dmc_get_info(struct udevice *dev, struct ram_info *info)
+{
+	struct dram_info *priv = dev_get_priv(dev);
+
+	*info = priv->info;
+
+	return 0;
+}
+
+static struct ram_ops rk3036_dmc_ops = {
+	.get_info = rk3036_dmc_get_info,
+};
+
+static const struct udevice_id rk3036_dmc_ids[] = {
+	{ .compatible = "rockchip,rk3036-dmc" },
+	{ }
+};
+
+U_BOOT_DRIVER(dmc_rk3036) = {
+	.name = "rockchip_rk3036_dmc",
+	.id = UCLASS_RAM,
+	.of_match = rk3036_dmc_ids,
+	.ops = &rk3036_dmc_ops,
+	.probe = rk3036_dmc_probe,
+	.priv_auto_alloc_size = sizeof(struct dram_info),
+};

commit bb8e4ec3d9946dce300038005cb1764a4a3b4ed0
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Mar 21 15:21:30 2018 +0800

    clk: rockchip: Get cru's reg address before probe for rk3036
    
    The assigned clock-rate and clock-parent is done before probe,
    so it is better to get cru's reg address at ofdata_to_platdata
    before probe, otherwise there is a error to use cru's red address.
    
    Change-Id: I7af5faa931352a4ee4a495efa9b80c95066eb5c5
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3036.c b/drivers/clk/rockchip/clk_rk3036.c
index 761f032d81..35b93d2341 100644
--- a/drivers/clk/rockchip/clk_rk3036.c
+++ b/drivers/clk/rockchip/clk_rk3036.c
@@ -317,11 +317,19 @@ static struct clk_ops rk3036_clk_ops = {
 	.set_rate	= rk3036_clk_set_rate,
 };
 
+static int rk3036_clk_ofdata_to_platdata(struct udevice *dev)
+{
+	struct rk3036_clk_priv *priv = dev_get_priv(dev);
+
+	priv->cru = dev_read_addr_ptr(dev);
+
+	return 0;
+}
+
 static int rk3036_clk_probe(struct udevice *dev)
 {
 	struct rk3036_clk_priv *priv = dev_get_priv(dev);
 
-	priv->cru = (struct rk3036_cru *)devfdt_get_addr(dev);
 	rkclk_init(priv->cru);
 
 	return 0;
@@ -373,6 +381,7 @@ U_BOOT_DRIVER(rockchip_rk3036_cru) = {
 	.id		= UCLASS_CLK,
 	.of_match	= rk3036_clk_ids,
 	.priv_auto_alloc_size = sizeof(struct rk3036_clk_priv),
+	.ofdata_to_platdata = rk3036_clk_ofdata_to_platdata,
 	.ops		= &rk3036_clk_ops,
 	.bind		= rk3036_clk_bind,
 	.probe		= rk3036_clk_probe,

commit e0347805d052d61e7ec48c75341cd4c67621add6
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Mar 26 11:39:56 2018 +0800

    cockchip: bootcmd: do not detect dev type in bootcmd
    
    We should already set boot devtype and devnum in getting resource
    for kernel dtb or display logos, no need do it one more time.
    
    Change-Id: I88b2e552a0a6b216eec81bcbcf06bfa6b25f7671
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index 1f9d8411bc..12d3609d51 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -83,9 +83,7 @@
 	"name=userdata,size=-,uuid=${uuid_gpt_userdata};\0"
 
 #define RKIMG_BOOTCOMMAND \
-	"if mmc dev 0; then setenv devtype mmc; setenv devnum 0;" \
-	"else if rknand dev 0; then setenv devtype rknand; setenv devnum 0; fi;" \
-	"fi; boot_android ${devtype} ${devnum};" \
+	"boot_android ${devtype} ${devnum};" \
 	"bootrkp;"
 
 #endif

commit 0a2f04e67445c592efb78d9f9abdf4d7aefa77d0
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Wed Mar 28 14:11:48 2018 +0800

    arm: dts: rk3308: set u-boot,dm-pre-reloc for uart2
    
    We use dt-spl.dtb for serial_init when CONFIG_USING_KERNEL_DTB
    is enabled, so set the debug console uart2 on RK3308 EVB
    as u-boot,dm-pre-reloc to make sure it will builtin dt-spl.dtb.
    
    Also move it from board dts to board-u-boot.dtsi, as it's u-boot
    specific.
    
    Change-Id: I088f7e20bb91cd3f1337b099dfccdb76fccabf1c
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-evb-u-boot.dtsi b/arch/arm/dts/rk3308-evb-u-boot.dtsi
index aa7600fbe2..d21681348e 100644
--- a/arch/arm/dts/rk3308-evb-u-boot.dtsi
+++ b/arch/arm/dts/rk3308-evb-u-boot.dtsi
@@ -16,3 +16,8 @@
 	u-boot,dm-pre-reloc;
 };
 
+&uart2 {
+	u-boot,dm-pre-reloc;
+	clock-frequency = <24000000>;
+	status = "okay";
+};
diff --git a/arch/arm/dts/rk3308-evb.dts b/arch/arm/dts/rk3308-evb.dts
index 2f231b31c5..b787ef8687 100644
--- a/arch/arm/dts/rk3308-evb.dts
+++ b/arch/arm/dts/rk3308-evb.dts
@@ -99,11 +99,6 @@
 	status = "okay";
 };
 
-&uart2 {
-	clock-frequency = <24000000>;
-	status = "okay";
-};
-
 &u2phy {
 	status = "okay";
 };

commit 88a1f7ffcec9770f7d136c90d6bce84ba38b62cf
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Mar 27 11:04:46 2018 +0800

    pinctrl: rockchip: Fix the reg offset of rk3308
    
    Change-Id: I4f57f5eed807a60abfe4189b93a667ce13314f2c
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index ae7ab2e697..36b06c508d 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -2130,7 +2130,8 @@ static struct rockchip_pin_ctrl *rockchip_pinctrl_get_soc_data(struct udevice *d
 			 * 4bit iomux'es are spread over two registers.
 			 */
 			inc = (iom->type & (IOMUX_WIDTH_4BIT |
-					    IOMUX_WIDTH_3BIT)) ? 8 : 4;
+					    IOMUX_WIDTH_3BIT |
+					    IOMUX_8WIDTH_2BIT)) ? 8 : 4;
 			if (iom->type & IOMUX_SOURCE_PMU)
 				pmu_offs += inc;
 			else

commit 868bdcf3832c84e5ea62030311bd0c9ac733f750
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Mar 25 11:49:34 2018 +0800

    regulator: rk8xx: add ops->set_ramp_delay() implement
    
    Change-Id: I8c7b7fad8c966d2fff8e2b0cf80ff59b6f70b57b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/rk8xx.c b/drivers/power/regulator/rk8xx.c
index aace8ae280..f3f9620280 100644
--- a/drivers/power/regulator/rk8xx.c
+++ b/drivers/power/regulator/rk8xx.c
@@ -41,6 +41,7 @@
 #define RK817_BUCK_ON_VSEL(n)		(0xbb + 3 * (n - 1))
 #define RK817_BUCK_SLP_VSEL(n)		(0xbc + 3 * (n - 1))
 #define RK817_BUCK_VSEL_MASK		0x7f
+#define RK817_BUCK_CONFIG(i)		(0xba + (i) * 3)
 
 /* RK817 LDO */
 #define RK817_LDO_ON_VSEL(n)		(0xcc + 2 * (n - 1))
@@ -51,69 +52,94 @@
 #define RK817_POWER_EN(n)		(0xb1 + (n))
 #define RK817_POWER_SLP_EN(n)		(0xb5 + (n))
 
+/*
+ * Ramp delay
+ */
+#define RK805_RAMP_RATE_OFFSET		3
+#define RK805_RAMP_RATE_MASK		(3 << RK805_RAMP_RATE_OFFSET)
+#define RK805_RAMP_RATE_3MV_PER_US	(0 << RK805_RAMP_RATE_OFFSET)
+#define RK805_RAMP_RATE_6MV_PER_US	(1 << RK805_RAMP_RATE_OFFSET)
+#define RK805_RAMP_RATE_12_5MV_PER_US	(2 << RK805_RAMP_RATE_OFFSET)
+#define RK805_RAMP_RATE_25MV_PER_US	(3 << RK805_RAMP_RATE_OFFSET)
+
+#define RK808_RAMP_RATE_OFFSET		3
+#define RK808_RAMP_RATE_MASK		(3 << RK808_RAMP_RATE_OFFSET)
+#define RK808_RAMP_RATE_2MV_PER_US	(0 << RK808_RAMP_RATE_OFFSET)
+#define RK808_RAMP_RATE_4MV_PER_US	(1 << RK808_RAMP_RATE_OFFSET)
+#define RK808_RAMP_RATE_6MV_PER_US	(2 << RK808_RAMP_RATE_OFFSET)
+#define RK808_RAMP_RATE_10MV_PER_US	(3 << RK808_RAMP_RATE_OFFSET)
+
+#define RK817_RAMP_RATE_OFFSET		6
+#define RK817_RAMP_RATE_MASK		(0x3 << RK817_RAMP_RATE_OFFSET)
+#define RK817_RAMP_RATE_3MV_PER_US	(0x0 << RK817_RAMP_RATE_OFFSET)
+#define RK817_RAMP_RATE_6_3MV_PER_US	(0x1 << RK817_RAMP_RATE_OFFSET)
+#define RK817_RAMP_RATE_12_5MV_PER_US	(0x2 << RK817_RAMP_RATE_OFFSET)
+#define RK817_RAMP_RATE_25MV_PER_US	(0x3 << RK817_RAMP_RATE_OFFSET)
+
 struct rk8xx_reg_info {
 	uint min_uv;
 	uint step_uv;
 	u8 vsel_reg;
 	u8 vsel_sleep_reg;
+	u8 config_reg;
 	u8 vsel_mask;
 	u8 min_sel;
 };
 
 static const struct rk8xx_reg_info rk808_buck[] = {
-	{ 712500,   12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, RK808_BUCK_VSEL_MASK, },
-	{ 712500,   12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, RK808_BUCK_VSEL_MASK, },
-	{ 712500,   12500, -1, -1, RK808_BUCK_VSEL_MASK, },
-	{ 1800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, RK808_BUCK4_VSEL_MASK, },
+	{ 712500,   12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK808_BUCK_VSEL_MASK, },
+	{ 712500,   12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK808_BUCK_VSEL_MASK, },
+	{ 712500,   12500, -1, -1, REG_BUCK3_CONFIG, RK808_BUCK_VSEL_MASK, },
+	{ 1800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, REG_BUCK4_CONFIG, RK808_BUCK4_VSEL_MASK, },
 };
 
 static const struct rk8xx_reg_info rk816_buck[] = {
 	/* buck 1 */
-	{  712500,  12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, RK818_BUCK_VSEL_MASK, 0x00, },
-	{ 1800000, 200000, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, RK818_BUCK_VSEL_MASK, 0x3c, },
-	{ 2300000,      0, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, RK818_BUCK_VSEL_MASK, 0x3f, },
+	{  712500,  12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, 0x00, },
+	{ 1800000, 200000, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, 0x3c, },
+	{ 2300000,      0, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, 0x3f, },
 	/* buck 2 */
-	{  712500,  12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, RK818_BUCK_VSEL_MASK, 0x00, },
-	{ 1800000, 200000, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, RK818_BUCK_VSEL_MASK, 0x3c, },
-	{ 2300000,      0, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, RK818_BUCK_VSEL_MASK, 0x3f, },
+	{  712500,  12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x00, },
+	{ 1800000, 200000, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x3c, },
+	{ 2300000,      0, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x3f, },
 	/* buck 3 */
-	{ 712500, 12500, -1, -1, RK818_BUCK_VSEL_MASK, },
+	{ 712500, 12500, -1, -1, REG_BUCK3_CONFIG, RK818_BUCK_VSEL_MASK, },
 	/* buck 4 */
-	{  800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, RK818_BUCK4_VSEL_MASK, },
+	{  800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, REG_BUCK4_CONFIG, RK818_BUCK4_VSEL_MASK, },
 };
 
 static const struct rk8xx_reg_info rk809_buck5[] = {
 	/* buck 5 */
-	{ 1500000,	0, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), RK809_BUCK5_VSEL_MASK, 0x00, },
-	{ 1800000, 200000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), RK809_BUCK5_VSEL_MASK, 0x01, },
-	{ 2800000, 200000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), RK809_BUCK5_VSEL_MASK, 0x04, },
-	{ 3300000, 300000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), RK809_BUCK5_VSEL_MASK, 0x06, },
+	{ 1500000,	0, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), -1, RK809_BUCK5_VSEL_MASK, 0x00, },
+	{ 1800000, 200000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), -1, RK809_BUCK5_VSEL_MASK, 0x01, },
+	{ 2800000, 200000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), -1, RK809_BUCK5_VSEL_MASK, 0x04, },
+	{ 3300000, 300000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), -1, RK809_BUCK5_VSEL_MASK, 0x06, },
 };
 
 static const struct rk8xx_reg_info rk817_buck[] = {
 	/* buck 1 */
-	{  500000,  12500, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_VSEL_MASK, 0x00, },
-	{ 1500000, 100000, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_VSEL_MASK, 0x50, },
-	{ 2400000,	0, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_VSEL_MASK, 0x59, },
+	{  500000,  12500, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_CONFIG(1), RK817_BUCK_VSEL_MASK, 0x00, },
+	{ 1500000, 100000, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_CONFIG(1), RK817_BUCK_VSEL_MASK, 0x50, },
+	{ 2400000,	0, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_CONFIG(1), RK817_BUCK_VSEL_MASK, 0x59, },
 	/* buck 2 */
-	{  500000,  12500, RK817_BUCK_ON_VSEL(2), RK817_BUCK_SLP_VSEL(2), RK817_BUCK_VSEL_MASK, 0x00, },
-	{ 1500000, 100000, RK817_BUCK_ON_VSEL(2), RK817_BUCK_SLP_VSEL(2), RK817_BUCK_VSEL_MASK, 0x50, },
-	{ 2400000,	0, RK817_BUCK_ON_VSEL(2), RK817_BUCK_SLP_VSEL(2), RK817_BUCK_VSEL_MASK, 0x59, },
+	{  500000,  12500, RK817_BUCK_ON_VSEL(2), RK817_BUCK_SLP_VSEL(2), RK817_BUCK_CONFIG(2), RK817_BUCK_VSEL_MASK, 0x00, },
+	{ 1500000, 100000, RK817_BUCK_ON_VSEL(2), RK817_BUCK_SLP_VSEL(2), RK817_BUCK_CONFIG(2), RK817_BUCK_VSEL_MASK, 0x50, },
+	{ 2400000,	0, RK817_BUCK_ON_VSEL(2), RK817_BUCK_SLP_VSEL(2), RK817_BUCK_CONFIG(2), RK817_BUCK_VSEL_MASK, 0x59, },
 	/* buck 3 */
-	{  500000,  12500, RK817_BUCK_ON_VSEL(3), RK817_BUCK_SLP_VSEL(3), RK817_BUCK_VSEL_MASK, 0x00, },
-	{ 1500000, 100000, RK817_BUCK_ON_VSEL(3), RK817_BUCK_SLP_VSEL(3), RK817_BUCK_VSEL_MASK, 0x50, },
-	{ 2400000,	0, RK817_BUCK_ON_VSEL(3), RK817_BUCK_SLP_VSEL(3), RK817_BUCK_VSEL_MASK, 0x59, },
+	{  500000,  12500, RK817_BUCK_ON_VSEL(3), RK817_BUCK_SLP_VSEL(3), RK817_BUCK_CONFIG(3), RK817_BUCK_VSEL_MASK, 0x00, },
+	{ 1500000, 100000, RK817_BUCK_ON_VSEL(3), RK817_BUCK_SLP_VSEL(3), RK817_BUCK_CONFIG(3), RK817_BUCK_VSEL_MASK, 0x50, },
+	{ 2400000,	0, RK817_BUCK_ON_VSEL(3), RK817_BUCK_SLP_VSEL(3), RK817_BUCK_CONFIG(3), RK817_BUCK_VSEL_MASK, 0x59, },
 	/* buck 4 */
-	{  500000,  12500, RK817_BUCK_ON_VSEL(4), RK817_BUCK_SLP_VSEL(4), RK817_BUCK_VSEL_MASK, 0x00, },
-	{ 1500000, 100000, RK817_BUCK_ON_VSEL(4), RK817_BUCK_SLP_VSEL(4), RK817_BUCK_VSEL_MASK, 0x50, },
-	{ 3400000,	0, RK817_BUCK_ON_VSEL(4), RK817_BUCK_SLP_VSEL(4), RK817_BUCK_VSEL_MASK, 0x63, },
+	{  500000,  12500, RK817_BUCK_ON_VSEL(4), RK817_BUCK_SLP_VSEL(4), RK817_BUCK_CONFIG(4), RK817_BUCK_VSEL_MASK, 0x00, },
+	{ 1500000, 100000, RK817_BUCK_ON_VSEL(4), RK817_BUCK_SLP_VSEL(4), RK817_BUCK_CONFIG(4), RK817_BUCK_VSEL_MASK, 0x50, },
+	{ 3400000,	0, RK817_BUCK_ON_VSEL(4), RK817_BUCK_SLP_VSEL(4), RK817_BUCK_CONFIG(4), RK817_BUCK_VSEL_MASK, 0x63, },
 };
 
 static const struct rk8xx_reg_info rk818_buck[] = {
-	{ 712500,   12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, RK818_BUCK_VSEL_MASK, },
-	{ 712500,   12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, RK818_BUCK_VSEL_MASK, },
-	{ 712500,   12500, -1, -1, RK818_BUCK_VSEL_MASK, },
-	{ 1800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, RK818_BUCK4_VSEL_MASK, },
+	{ 712500,   12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, },
+	{ 712500,   12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, },
+	{ 712500,   12500, -1, -1, REG_BUCK3_CONFIG, RK818_BUCK_VSEL_MASK, },
+	{ 1800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, REG_BUCK4_CONFIG, RK818_BUCK4_VSEL_MASK, },
 };
 
 #ifdef ENABLE_DRIVER
@@ -389,6 +415,89 @@ static int _buck_get_enable(struct udevice *pmic, int buck)
 	return ret & mask ? true : false;
 }
 
+static int _buck_set_ramp_delay(struct udevice *pmic, int buck, u32 ramp_delay)
+{
+	const struct rk8xx_reg_info *info = get_buck_reg(pmic, buck, 0);
+	struct rk8xx_priv *priv = dev_get_priv(pmic);
+	u32 ramp_value, ramp_mask;
+
+	if (info->config_reg == -1)
+		return -ENOSYS;
+
+	switch (priv->variant) {
+	case RK805_ID:
+		ramp_mask = RK805_RAMP_RATE_MASK;
+		ramp_value = RK805_RAMP_RATE_12_5MV_PER_US;
+		switch (ramp_delay) {
+		case 0 ... 3000:
+			ramp_value = RK805_RAMP_RATE_3MV_PER_US;
+			break;
+		case 3001 ... 6000:
+			ramp_value = RK805_RAMP_RATE_6MV_PER_US;
+			break;
+		case 6001 ... 12500:
+			ramp_value = RK805_RAMP_RATE_12_5MV_PER_US;
+			break;
+		case 12501 ... 25000:
+			ramp_value = RK805_RAMP_RATE_25MV_PER_US;
+			break;
+		default:
+			printf("buck%d ramp_delay: %d not supported\n",
+			       buck, ramp_delay);
+		}
+		break;
+	case RK808_ID:
+	case RK816_ID:
+	case RK818_ID:
+		ramp_value = RK808_RAMP_RATE_6MV_PER_US;
+		ramp_mask = RK808_RAMP_RATE_MASK;
+		switch (ramp_delay) {
+		case 1 ... 2000:
+			ramp_value = RK808_RAMP_RATE_2MV_PER_US;
+			break;
+		case 2001 ... 4000:
+			ramp_value = RK808_RAMP_RATE_4MV_PER_US;
+			break;
+		case 4001 ... 6000:
+			ramp_value = RK808_RAMP_RATE_6MV_PER_US;
+			break;
+		case 6001 ... 10000:
+			ramp_value = RK808_RAMP_RATE_6MV_PER_US;
+			break;
+		default:
+			printf("buck%d ramp_delay: %d not supported\n",
+			       buck, ramp_delay);
+		}
+		break;
+	case RK809_ID:
+	case RK817_ID:
+		ramp_mask = RK817_RAMP_RATE_MASK;
+		ramp_value = RK817_RAMP_RATE_12_5MV_PER_US;
+		switch (ramp_delay) {
+		case 0 ... 3000:
+			ramp_value = RK817_RAMP_RATE_3MV_PER_US;
+			break;
+		case 3001 ... 6300:
+			ramp_value = RK817_RAMP_RATE_6_3MV_PER_US;
+			break;
+		case 6301 ... 12500:
+			ramp_value = RK817_RAMP_RATE_12_5MV_PER_US;
+			break;
+		case 12501 ... 25000:
+			ramp_value = RK817_RAMP_RATE_12_5MV_PER_US;
+			break;
+		default:
+			printf("buck%d ramp_delay: %d not supported\n",
+			       buck, ramp_delay);
+		}
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return pmic_clrsetbits(pmic, info->config_reg, ramp_mask, ramp_value);
+}
+
 static int _buck_set_suspend_enable(struct udevice *pmic, int buck, bool enable)
 {
 	uint mask;
@@ -628,6 +737,13 @@ static int buck_set_suspend_enable(struct udevice *dev, bool enable)
 	return _buck_set_suspend_enable(dev->parent, buck, enable);
 }
 
+static int buck_set_ramp_delay(struct udevice *dev, u32 ramp_delay)
+{
+	int buck = dev->driver_data - 1;
+
+	return _buck_set_ramp_delay(dev->parent, buck, ramp_delay);
+}
+
 static int buck_get_enable(struct udevice *dev)
 {
 	int buck = dev->driver_data - 1;
@@ -850,6 +966,7 @@ static const struct dm_regulator_ops rk8xx_buck_ops = {
 	.get_enable = buck_get_enable,
 	.set_enable = buck_set_enable,
 	.set_suspend_enable = buck_set_suspend_enable,
+	.set_ramp_delay = buck_set_ramp_delay,
 };
 
 static const struct dm_regulator_ops rk8xx_ldo_ops = {

commit b29e2b63a97e1c5ad7b34ab58189d319bfc3d854
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Mar 25 11:13:12 2018 +0800

    dm: regulator: add "regulator-ramp-delay" support
    
    Change-Id: Ic5bc78b2688b88d726c54dfff4f790746d92966b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/regulator-uclass.c b/drivers/power/regulator/regulator-uclass.c
index 6783ac43e1..b4e91251de 100644
--- a/drivers/power/regulator/regulator-uclass.c
+++ b/drivers/power/regulator/regulator-uclass.c
@@ -42,6 +42,8 @@ int regulator_set_value(struct udevice *dev, int uV)
 {
 	const struct dm_regulator_ops *ops = dev_get_driver_ops(dev);
 	struct dm_regulator_uclass_platdata *uc_pdata;
+	u32 old_uV = -ENODATA, us;
+	int ret;
 
 	uc_pdata = dev_get_uclass_platdata(dev);
 	if (uc_pdata->min_uV != -ENODATA && uV < uc_pdata->min_uV)
@@ -52,7 +54,24 @@ int regulator_set_value(struct udevice *dev, int uV)
 	if (!ops || !ops->set_value)
 		return -ENOSYS;
 
-	return ops->set_value(dev, uV);
+	if (uc_pdata->ramp_delay != -ENODATA) {
+		if (!ops->get_value)
+			return -ENOSYS;
+		old_uV = ops->get_value(dev);
+		if (old_uV < 0)
+			return -EINVAL;
+	}
+
+	ret = ops->set_value(dev, uV);
+
+	if (!ret && (old_uV != -ENODATA) && (old_uV != uV)) {
+		us = DIV_ROUND_UP(abs(uV - old_uV), uc_pdata->ramp_delay);
+		udelay(us);
+		debug("%s: ramp=%d, old_uV=%d, uV=%d, us=%d\n",
+		      uc_pdata->name, uc_pdata->ramp_delay, old_uV, uV, us);
+	}
+
+	return ret;
 }
 
 int regulator_set_suspend_value(struct udevice *dev, int uV)
@@ -136,6 +155,16 @@ int regulator_set_suspend_enable(struct udevice *dev, bool enable)
 	return ops->set_suspend_enable(dev, enable);
 }
 
+int regulator_set_ramp_delay(struct udevice *dev, u32 ramp_delay)
+{
+	const struct dm_regulator_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->set_ramp_delay)
+		return -ENOSYS;
+
+	return ops->set_ramp_delay(dev, ramp_delay);
+}
+
 int regulator_get_mode(struct udevice *dev)
 {
 	const struct dm_regulator_ops *ops = dev_get_driver_ops(dev);
@@ -202,6 +231,9 @@ int regulator_autoset(struct udevice *dev)
 
 	uc_pdata = dev_get_uclass_platdata(dev);
 
+	if (uc_pdata->ramp_delay != -ENODATA)
+		regulator_set_ramp_delay(dev, uc_pdata->ramp_delay);
+
 	ret = regulator_set_suspend_enable(dev, uc_pdata->suspend_on);
 	if (!ret && uc_pdata->suspend_on)
 		ret = regulator_set_suspend_value(dev, uc_pdata->suspend_uV);
@@ -352,7 +384,8 @@ static int regulator_pre_probe(struct udevice *dev)
 						-ENODATA);
 	uc_pdata->always_on = dev_read_bool(dev, "regulator-always-on");
 	uc_pdata->boot_on = dev_read_bool(dev, "regulator-boot-on");
-
+	uc_pdata->ramp_delay = dev_read_u32_default(dev, "regulator-ramp-delay",
+						    -ENODATA);
 	node = dev_read_subnode(dev, "regulator-state-mem");
 	if (ofnode_valid(node)) {
 		uc_pdata->suspend_on = !ofnode_read_bool(node, "regulator-off-in-suspend");
diff --git a/include/power/regulator.h b/include/power/regulator.h
index ef0c88414a..a442d885bb 100644
--- a/include/power/regulator.h
+++ b/include/power/regulator.h
@@ -179,6 +179,7 @@ struct dm_regulator_uclass_platdata {
 	u8 volt_reg;
 	bool suspend_on;
 	u32 suspend_uV;
+	u32 ramp_delay;
 };
 
 /* Regulator device operations */
@@ -237,6 +238,15 @@ struct dm_regulator_ops {
 	 */
 	int (*get_mode)(struct udevice *dev);
 	int (*set_mode)(struct udevice *dev, int mode_id);
+
+	/**
+	 * The regulator voltage set ramp delay
+	 *
+	 * @dev            - regulator device
+	 * @ramp_delay     - ramp delay [uV/uS]
+	 * @return zero on success and other failed.
+	 */
+	int (*set_ramp_delay)(struct udevice *dev, u32 ramp_delay);
 };
 
 /**

commit f2d1698c736d12d18f06085a4bf7d96f43833111
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Mar 26 18:02:23 2018 +0800

    autoboot: only allow ctrl+c to abort bootcmd
    
    It works only for rockchip platforms.
    
    Change-Id: I67e7d9ab625b7667ec411347249582ed9537686c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/autoboot.c b/common/autoboot.c
index a011865028..f201a95cfa 100644
--- a/common/autoboot.c
+++ b/common/autoboot.c
@@ -219,10 +219,14 @@ static int __abortboot(int bootdelay)
 	printf("Hit any key to stop autoboot: %2d ", bootdelay);
 #endif
 
+#ifdef CONFIG_ARCH_ROCKCHIP
+	if (ctrlc()) {	/* we press ctrl+c ? */
+#else
 	/*
 	 * Check if key already pressed
 	 */
 	if (tstc()) {	/* we got a key press	*/
+#endif
 		(void) getc();  /* consume input	*/
 		puts("\b\b\b 0");
 		abort = 1;	/* don't auto boot	*/

commit 2edb2ea41c615d9df440095ce4bd20fbcbc4ea88
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Mar 26 20:30:20 2018 +0800

    arm: rockchip: rk3308: remove debug_uart_init
    
    This is not necessary as we bringup this processor
    successfully now.
    
    Change-Id: I47c1ee4f67fbf8b391a00b3d8ccf8ea21efefacb
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3308/rk3308.c b/arch/arm/mach-rockchip/rk3308/rk3308.c
index a59d523e09..238f4ae2b7 100644
--- a/arch/arm/mach-rockchip/rk3308/rk3308.c
+++ b/arch/arm/mach-rockchip/rk3308/rk3308.c
@@ -71,15 +71,6 @@ enum {
 	UART2_IO_SEL_USB,
 };
 
-int arch_cpu_init(void)
-{
-	debug_uart_init();
-
-	printascii("U-Boot rk3308\n");
-
-	return 0;
-}
-
 void board_debug_uart_init(void)
 {
 	static struct rk3308_grf * const grf = (void *)GRF_BASE;

commit 8e7cd09f334740af888fd5f78259984f9aa5e77f
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Mar 26 20:24:32 2018 +0800

    arm: rockchip: rk3308: don't touch the iomux of gpio1c7 & gpio1c6
    
    The default function of gpio1c7 & gpio1c6 is jtag, it's
    better to keep it as it was when system startup.
    
    Change-Id: If4d8df43f55315d76338c339f66f19590106e22c
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3308/rk3308.c b/arch/arm/mach-rockchip/rk3308/rk3308.c
index 3642a861f5..a59d523e09 100644
--- a/arch/arm/mach-rockchip/rk3308/rk3308.c
+++ b/arch/arm/mach-rockchip/rk3308/rk3308.c
@@ -87,9 +87,6 @@ void board_debug_uart_init(void)
 	/* Enable early UART2 channel m1 on the rk3308 */
 	rk_clrsetreg(&grf->soc_con5, UART2_IO_SEL_MASK,
 		     UART2_IO_SEL_M1 << UART2_IO_SEL_SHIFT);
-	rk_clrsetreg(&grf->gpio1ch_iomux, GPIO1C7_MASK | GPIO1C6_MASK,
-		      GPIO1C7_GPIO << GPIO1C7_SHIFT |
-		      GPIO1C6_GPIO << GPIO1C6_SHIFT);
 	rk_clrsetreg(&grf->gpio4d_iomux,
 		     GPIO4D3_MASK | GPIO4D2_MASK,
 		     GPIO4D2_UART2_RX_M1 << GPIO4D2_SHIFT |

commit 79244e4cb1a2e4400498c1f1bf7b4e41c6090735
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 20 20:32:52 2018 +0800

    power: charge animation: imporve extrem low power charge
    
    Change-Id: I46203712e2aa02e04d645b660ea51811e7430821
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 82d8e3b73a..2b374f2364 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -180,6 +180,41 @@ static int system_suspend_enter(struct charge_animation_pdata *pdata)
 	return 0;
 }
 
+static void timer_irq_handler(int irq, void *data)
+{
+	struct udevice *dev = data;
+	struct charge_animation_priv *priv = dev_get_priv(dev);
+	static long long count;
+
+	writel(TIMER_CLR_INT, TIMER_BASE + TIMER_INTSTATUS);
+
+	priv->auto_wakeup_key_state = KEY_PRESS_DOWN;
+	printf("auto wakeup count: %lld\n", ++count);
+}
+
+static void autowakeup_timer_init(struct udevice *dev, uint32_t seconds)
+{
+	uint64_t period = 24000000ULL * seconds;
+
+	/* Disable before conifg */
+	writel(0, TIMER_BASE + TIMER_CTRL);
+
+	/* Config */
+	writel((uint32_t)period, TIMER_BASE + TIMER_LOAD_COUNT0);
+	writel((uint32_t)(period >> 32), TIMER_BASE + TIMER_LOAD_COUNT1);
+	writel(TIMER_CLR_INT, TIMER_BASE + TIMER_INTSTATUS);
+	writel(TIMER_EN | TIMER_INT_EN, TIMER_BASE + TIMER_CTRL);
+
+	/* IRQ */
+	irq_install_handler(TIMER_IRQ, timer_irq_handler, dev);
+	irq_handler_enable(TIMER_IRQ);
+}
+
+static void autowakeup_timer_uninit(void)
+{
+	irq_free_handler(TIMER_IRQ);
+}
+
 #ifdef CONFIG_DRM_ROCKCHIP
 static void charge_show_bmp(const char *name)
 {
@@ -202,6 +237,7 @@ static int charge_extrem_low_power(struct udevice *dev)
 	struct udevice *pmic = priv->pmic;
 	struct udevice *fg = priv->fg;
 	int voltage, soc, charging = 1;
+	static int timer_initialized;
 
 	voltage = fuel_gauge_get_voltage(fg);
 	if (voltage < 0)
@@ -211,10 +247,10 @@ static int charge_extrem_low_power(struct udevice *dev)
 		/* Check charger online */
 		charging = fuel_gauge_get_chrg_online(fg);
 		if (charging <= 0) {
-			printf("Not charging, online=%d. Shutdown...\n",
-			       charging);
+			printf("%s: Not charging, online=%d. Shutdown...\n",
+			       __func__, charging);
 			/* wait uart flush before shutdown */
-			mdelay(500);
+			mdelay(5);
 			/* PMIC shutdown */
 			pmic_shutdown(pmic);
 
@@ -222,6 +258,12 @@ static int charge_extrem_low_power(struct udevice *dev)
 			continue;
 		}
 
+		/* Enable auto wakeup */
+		if (!timer_initialized) {
+			timer_initialized = 1;
+			autowakeup_timer_init(dev, 5);
+		}
+
 		/*
 		 * Just for fuel gauge to update something important,
 		 * including charge current, coulometer or other.
@@ -246,43 +288,9 @@ static int charge_extrem_low_power(struct udevice *dev)
 		}
 	}
 
-	return 0;
-}
-
-static void timer_irq_handler(int irq, void *data)
-{
-	struct udevice *dev = data;
-	struct charge_animation_priv *priv = dev_get_priv(dev);
-	static long long count;
-
-	writel(TIMER_CLR_INT, TIMER_BASE + TIMER_INTSTATUS);
-
-	priv->auto_wakeup_key_state = KEY_PRESS_DOWN;
-	printf("auto wakeup count: %lld\n", ++count);
-}
-
-static void autowakeup_timer_init(struct udevice *dev)
-{
-	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
-	uint64_t period = 24000000ULL * (pdata->auto_wakeup_interval);
-
-	/* Disable before conifg */
-	writel(0, TIMER_BASE + TIMER_CTRL);
-
-	/* Config */
-	writel((uint32_t)period, TIMER_BASE + TIMER_LOAD_COUNT0);
-	writel((uint32_t)(period >> 32), TIMER_BASE + TIMER_LOAD_COUNT1);
-	writel(TIMER_CLR_INT, TIMER_BASE + TIMER_INTSTATUS);
-	writel(TIMER_EN | TIMER_INT_EN, TIMER_BASE + TIMER_CTRL);
-
-	/* IRQ */
-	irq_install_handler(TIMER_IRQ, timer_irq_handler, dev);
-	irq_handler_enable(TIMER_IRQ);
-}
+	autowakeup_timer_uninit();
 
-static void autowakeup_timer_uninit(void)
-{
-	irq_free_handler(TIMER_IRQ);
+	return 0;
 }
 
 static int charge_animation_show(struct udevice *dev)
@@ -368,7 +376,7 @@ static int charge_animation_show(struct udevice *dev)
 	/* Auto wakeup */
 	if (pdata->auto_wakeup_interval) {
 		printf("Auto wakeup: %dS\n", pdata->auto_wakeup_interval);
-		autowakeup_timer_init(dev);
+		autowakeup_timer_init(dev, pdata->auto_wakeup_interval);
 	}
 
 	printf("Enter U-Boot charging mode\n");
@@ -386,7 +394,7 @@ static int charge_animation_show(struct udevice *dev)
 			       charging);
 
 			/* wait uart flush before shutdown */
-			mdelay(500);
+			mdelay(5);
 
 			/* PMIC shutdown */
 			pmic_shutdown(pmic);
@@ -621,7 +629,7 @@ static int charge_animation_probe(struct udevice *dev)
 	}
 	priv->fg = fg;
 
-	/* Get PWRKEY: used for wakeup and trun off/on LCD */
+	/* Get PWRKEY: used for wakeup and turn off/on LCD */
 	ret = platform_key_read(KEY_POWER);
 	if (ret == KEY_NOT_EXIST) {
 		printf("Can't find power key\n");

commit df8136f045f953bcfff817c13ef8182f09330e67
Author: David Wu <david.wu@rock-chips.com>
Date:   Fri Mar 23 19:38:24 2018 +0800

    arm: dts: rockchip: Add recovery key support for rk3308-evb
    
    According to the hardware, the recovery key is conected to
    the saradc channel0.
    
    Change-Id: I9a1c2c49567da612b627f54ef84fbbf9be739b95
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-evb.dts b/arch/arm/dts/rk3308-evb.dts
index d0a20190f4..2f231b31c5 100644
--- a/arch/arm/dts/rk3308-evb.dts
+++ b/arch/arm/dts/rk3308-evb.dts
@@ -16,7 +16,21 @@
 		stdout-path = "serial2:1500000n8";
 	};
 
-	adc-keys {
+	adc-keys0 {
+		compatible = "adc-keys";
+		io-channels = <&saradc 0>;
+		io-channel-names = "buttons";
+		poll-interval = <100>;
+		keyup-threshold-microvolt = <1800000>;
+
+		vol-up-key {
+			linux,code = <KEY_VOLUMEUP>;
+			label = "volume up";
+			press-threshold-microvolt = <18000>;
+		};
+	};
+
+	adc-keys1 {
 		compatible = "adc-keys";
 		io-channels = <&saradc 1>;
 		io-channel-names = "buttons";
@@ -50,7 +64,7 @@
 		vol-up-key {
 			linux,code = <KEY_VOLUMEUP>;
 			label = "volume up";
-			press-threshold-microvolt = <180000>;
+			press-threshold-microvolt = <18000>;
 		};
 	};
 

commit 5a6ccfef5ba6d9dfdb3697729e2434e646fca963
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Fri Mar 23 20:07:05 2018 +0800

    configs: rockchip: disable fastboot for rk3308 evb
    
    Change-Id: Ic393febc7a12d7b3a304a1ffd2437f47737e8d45
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index a87affc504..c1ef8cf6cf 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -14,10 +14,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
-CONFIG_FASTBOOT_BUF_ADDR=0x800800
-CONFIG_FASTBOOT_BUF_SIZE=0x08000000
-CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_USB_FUNCTION_FASTBOOT is not set
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
 CONFIG_CMD_BOOT_ROCKCHIP=y

commit 9717771c04b65e44374c2e37c0f69b7f1f2e8bd2
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Fri Mar 23 20:06:07 2018 +0800

    arm: dts: rockchip: enable pwm regulator for rk3308 evb
    
    RK3308 EVB uses pwm0 modulates the arm core voltage, so
    enable pwm regulator here.
    
    Change-Id: I8e2b88b4d947fe40835952eb2278cecbf64d293e
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-evb.dts b/arch/arm/dts/rk3308-evb.dts
index 524a128d02..d0a20190f4 100644
--- a/arch/arm/dts/rk3308-evb.dts
+++ b/arch/arm/dts/rk3308-evb.dts
@@ -54,6 +54,18 @@
 		};
 	};
 
+	vdd_log: vdd_core: vdd-core {
+		compatible = "pwm-regulator";
+		pwms = <&pwm0 0 5000 1>;
+		regulator-name = "vdd_core";
+		regulator-min-microvolt = <847000>;
+		regulator-max-microvolt = <1366000>;
+		regulator-init-microvolt  = <1044000>;
+		regulator-always-on;
+		regulator-boot-on;
+		status = "okay";
+	};
+
 };
 
 &emmc {
@@ -65,6 +77,10 @@
 	status = "okay";
 };
 
+&pwm0 {
+	status = "okay";
+};
+
 &saradc {
 	status = "okay";
 };

commit a227d0b47a640004c25f714bb710ce912bb69787
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Fri Mar 23 20:05:31 2018 +0800

    arm: dts: rockchip: add pwm dt node for rk3308
    
    Add pwm device tree node for rk3308 SOC.
    
    Change-Id: If8342b81330cfd27f3316e092e1bd2a9b459631e
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/dts/rk3308.dtsi b/arch/arm/dts/rk3308.dtsi
index e1588d55e0..0662bd0b71 100644
--- a/arch/arm/dts/rk3308.dtsi
+++ b/arch/arm/dts/rk3308.dtsi
@@ -164,6 +164,50 @@
 		status = "disabled";
 	};
 
+	pwm0: pwm@ff180000 {
+		compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff180000 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm0_pin>;
+		clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm1: pwm@ff180010 {
+		compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff180010 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm1_pin>;
+		clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm2: pwm@ff180020 {
+		compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff180020 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm2_pin>;
+		clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm3: pwm@ff180030 {
+		compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff180030 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm3_pin>;
+		clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
 	saradc: saradc@ff1e0000 {
 		compatible = "rockchip,rk3308-saradc", "rockchip,rk3399-saradc";
 		reg = <0x0 0xff1e0000 0x0 0x100>;

commit b33ebddfc88565975ea3dfa5b425f2aa45f2da80
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Fri Mar 23 19:57:02 2018 +0800

    power: pwm regulator: support live tree
    
    Use live tree compatible api for pwm regulator.
    
    Change-Id: Id12c96c0631b6d963d663ef83e3df50abef5e827
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/drivers/power/regulator/pwm_regulator.c b/drivers/power/regulator/pwm_regulator.c
index b63f941990..29bceb5858 100644
--- a/drivers/power/regulator/pwm_regulator.c
+++ b/drivers/power/regulator/pwm_regulator.c
@@ -13,9 +13,6 @@
 #include <errno.h>
 #include <pwm.h>
 #include <power/regulator.h>
-#include <libfdt.h>
-#include <fdt_support.h>
-#include <fdtdec.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -94,13 +91,10 @@ static int pwm_regulator_set_voltage(struct udevice *dev, int uvolt)
 static int pwm_regulator_ofdata_to_platdata(struct udevice *dev)
 {
 	struct pwm_regulator_info *priv = dev_get_priv(dev);
-	struct fdtdec_phandle_args args;
-	const void *blob = gd->fdt_blob;
-	int node = dev_of_offset(dev);
+	struct ofnode_phandle_args args;
 	int ret;
 
-	ret = fdtdec_parse_phandle_with_args(blob, node, "pwms", "#pwm-cells",
-					     0, 0, &args);
+	ret = dev_read_phandle_with_args(dev, "pwms", "#pwm-cells", 0, 0, &args);
 	if (ret) {
 		debug("%s: Cannot get PWM phandle: ret=%d\n", __func__, ret);
 		return ret;
@@ -109,14 +103,13 @@ static int pwm_regulator_ofdata_to_platdata(struct udevice *dev)
 	priv->period_ns = args.args[1];
 	priv->polarity = args.args[2];
 
-	priv->init_voltage = fdtdec_get_int(blob, node,
-			"regulator-init-microvolt", -1);
+	priv->init_voltage = dev_read_u32_default(dev, "regulator-init-microvolt", -1);
 	if (priv->init_voltage < 0) {
 		printf("Cannot find regulator pwm init_voltage\n");
 		return -EINVAL;
 	}
 
-	ret = uclass_get_device_by_of_offset(UCLASS_PWM, args.node, &priv->pwm);
+	ret = uclass_get_device_by_ofnode(UCLASS_PWM, args.node, &priv->pwm);
 	if (ret) {
 		debug("%s: Cannot get PWM: ret=%d\n", __func__, ret);
 		return ret;

commit 7c3376860940f10727dd92a4b1173dcae36df91e
Author: Meng Dongyang <daniel.meng@rock-chips.com>
Date:   Fri Mar 23 20:57:40 2018 +0800

    arm: rockchip: rk3308: add DT of usb controller and enable usb
    
    Add DT of DWC2 EHCI and OHCI controller and enable them.
    
    Change-Id: Iedeeebe33f5f3e5616a43fb376e264cc2c46e40e
    Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-evb.dts b/arch/arm/dts/rk3308-evb.dts
index 6af645f1cc..524a128d02 100644
--- a/arch/arm/dts/rk3308-evb.dts
+++ b/arch/arm/dts/rk3308-evb.dts
@@ -73,3 +73,27 @@
 	clock-frequency = <24000000>;
 	status = "okay";
 };
+
+&u2phy {
+	status = "okay";
+};
+
+&u2phy_otg {
+	status = "okay";
+};
+
+&u2phy_host {
+	status = "okay";
+};
+
+&usb_host0_ehci {
+	status = "okay";
+};
+
+&usb_host0_ohci {
+	status = "okay";
+};
+
+&usb20_otg {
+	status = "okay";
+};
diff --git a/arch/arm/dts/rk3308.dtsi b/arch/arm/dts/rk3308.dtsi
index abf8cf01dd..e1588d55e0 100644
--- a/arch/arm/dts/rk3308.dtsi
+++ b/arch/arm/dts/rk3308.dtsi
@@ -93,6 +93,44 @@
 		reg = <0x0 0xff000000 0x0 0x10000>;
 	};
 
+	usb2phy_grf: syscon@ff008000 {
+		compatible = "rockchip,rk3308-usb2phy-grf", "syscon",
+			     "simple-mfd";
+		reg = <0x0 0xff008000 0x0 0x4000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		u2phy: usb2-phy@100 {
+			compatible = "rockchip,rk3308-usb2phy",
+				     "rockchip,rk3328-usb2phy";
+			reg = <0x100 0x10>;
+			clocks = <&cru SCLK_USBPHY_REF>;
+			clock-names = "phyclk";
+			#clock-cells = <0>;
+			assigned-clocks = <&cru USB480M>;
+			assigned-clock-parents = <&u2phy>;
+			clock-output-names = "usb480m_phy";
+			status = "disabled";
+
+			u2phy_host: host-port {
+				#phy-cells = <0>;
+				interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+				interrupt-names = "linestate";
+				status = "disabled";
+			};
+
+			u2phy_otg: otg-port {
+				#phy-cells = <0>;
+				interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
+					     <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
+					     <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+				interrupt-names = "otg-bvalid", "otg-id",
+						  "linestate";
+				status = "disabled";
+			};
+		};
+	};
+
 	uart0: serial@ff0a0000 {
 		compatible = "rockchip,rk3308-uart", "snps,dw-apb-uart";
 		reg = <0x0 0xff0a0000 0x0 0x100>;
@@ -169,6 +207,46 @@
 		rockchip,mode = <0>;
 	};
 
+	usb20_otg: usb@ff400000 {
+		compatible = "rockchip,rk3308-usb", "rockchip,rk3066-usb",
+			     "snps,dwc2";
+		reg = <0x0 0xff400000 0x0 0x40000>;
+		interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_OTG>;
+		clock-names = "otg";
+		dr_mode = "otg";
+		g-np-tx-fifo-size = <16>;
+		g-rx-fifo-size = <275>;
+		g-tx-fifo-size = <256 128 128 64 64 32>;
+		g-use-dma;
+		phys = <&u2phy_otg>;
+		phy-names = "usb2-phy";
+		status = "disabled";
+	};
+
+	usb_host0_ehci: usb@ff440000 {
+		compatible = "generic-ehci";
+		reg = <0x0 0xff440000 0x0 0x10000>;
+		interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_HOST>, <&cru HCLK_HOST_ARB>,
+			 <&u2phy>;
+		clock-names = "usbhost", "arbiter", "utmi";
+		phys = <&u2phy_host>;
+		phy-names = "usb";
+		status = "disabled";
+	};
+
+	usb_host0_ohci: usb@ff450000 {
+		compatible = "generic-ohci";
+		reg = <0x0 0xff450000 0x0 0x10000>;
+		interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_HOST>, <&cru HCLK_HOST_ARB>,
+			 <&u2phy>;
+		clock-names = "usbhost", "arbiter", "utmi";
+		phys = <&u2phy_host>;
+		phy-names = "usb";
+	};
+
 	sdmmc: dwmmc@ff480000 {
 		compatible = "rockchip,rk3308-dw-mshc", "rockchip,rk3288-dw-mshc";
 		reg = <0x0 0xff480000 0x0 0x4000>;

commit 9064e0be0b0c358f4dee7a22188011a0d4921fc7
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Fri Mar 23 21:43:33 2018 +0800

    clk: rockchip: rk3308: Delete DEBUG
    
    Change-Id: Ie4a3c3d37e464ac89a2b0e7990ec2760996e813f
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index 6004f6e32b..98f4e68a5a 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -3,7 +3,6 @@
  *
  * SPDX-License-Identifier:	GPL-2.0
  */
-#define DEBUG
 #include <common.h>
 #include <bitfield.h>
 #include <clk-uclass.h>

commit ceb961ad05a1518b0a9b0df8273e647db65ff198
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Fri Mar 23 21:42:19 2018 +0800

    clk: rockchip: rk3308: Fix cpu clock error
    
    Change-Id: I89f6f14fef0bb5222ec098f4afa71fed66ee1b83
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index 74e03e66ef..6004f6e32b 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -156,14 +156,14 @@ static void rkclk_init(struct rk3308_cru *cru)
 	 * set up dependent divisors for PCLK and ACLK clocks.
 	 * core hz : apll = 1:1
 	 */
-	apll_hz = rkclk_pll_get_rate(cru, DPLL);
+	apll_hz = rkclk_pll_get_rate(cru, APLL);
 	aclk_div = apll_hz / CORE_ACLK_HZ - 1;
 	pclk_div = apll_hz / CORE_DBG_HZ - 1;
 	rk_clrsetreg(&cru->clksel_con[0],
 		     CORE_ACLK_DIV_MASK | CORE_DBG_DIV_MASK |
 		     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK,
 		     aclk_div << CORE_ACLK_DIV_SHIFT |
-		     pclk_div << CORE_DIV_CON_SHIFT |
+		     pclk_div << CORE_DBG_DIV_SHIFT |
 		     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
 		     0 << CORE_DIV_CON_SHIFT);
 

commit a6bee18f07bf050c92982cb649de7ff16724c866
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Thu Mar 22 20:51:58 2018 +0800

    lib: optee_client: fix bug of rk file system
    
    fix bug which make error when we try to create
    a new file, old file should be delete, but old
    file which fd equal to zero is exist!
    
    Change-Id: I602e889ae12756c0c40e409d6439ac36cc1b5382
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/OpteeClientRkFs-v2.c b/lib/optee_clientApi/OpteeClientRkFs-v2.c
index f771116fbc..53cb8f16cf 100644
--- a/lib/optee_clientApi/OpteeClientRkFs-v2.c
+++ b/lib/optee_clientApi/OpteeClientRkFs-v2.c
@@ -298,7 +298,7 @@ static int rkss_verify_ptable(struct rk_secure_storage *rkss)
 	if (verify->version != RKSS_VERSION
 			|| verify->checkstr != RKSS_CHECK_STR) {
 		printf("verify [%lu] fail, cleanning ....", rkss->index);
-		memset(rkss->data, 0, sizeof(RKSS_DATA_LEN));
+		memset(rkss->data, 0, RKSS_DATA_LEN);
 		verify->checkstr = RKSS_CHECK_STR;
 		verify->version = RKSS_VERSION;
 		ret = rkss_write_section(rkss);
@@ -769,7 +769,7 @@ static TEEC_Result ree_fs_new_create(size_t num_params,
 
 	debug("ree_fs_new_create create file: %s, len: %lu \n", filename, strlen(filename));
 	fd = rkss_get_fileinfo_by_name(filename, &p);
-	if (fd > 0) {
+	if (fd >= 0) {
 		debug("ree_fs_new_create : file exist, clear it. %s", filename);
 		/* decrease ref from usedflags */
 		num = p.size / RKSS_DATA_LEN + 1;
@@ -1211,6 +1211,7 @@ int tee_supp_rk_fs_init(void)
 	/* clean secure storage*/
 #ifdef DEBUG_CLEAN_RKSS
 	for (i = 0; i < RKSS_DATA_SECTION_COUNT; i++) {
+		memset(rkss.data, 0, RKSS_DATA_LEN);
 		rkss.index = i;
 		rkss_write_section(&rkss);
 		printf("cleaned [%d]", i);
diff --git a/lib/optee_clientApi/OpteeClientRkFs.c b/lib/optee_clientApi/OpteeClientRkFs.c
index 2985cb7e8d..c38a128fdf 100644
--- a/lib/optee_clientApi/OpteeClientRkFs.c
+++ b/lib/optee_clientApi/OpteeClientRkFs.c
@@ -284,7 +284,7 @@ static int rkss_verify_ptable(struct rk_secure_storage* rkss)
 			|| verify->checkstr != RKSS_CHECK_STR)
 	{
 		debug("verify [%lu] fail, cleanning ....", rkss->index);
-		memset(rkss->data, 0, sizeof(RKSS_DATA_LEN));
+		memset(rkss->data, 0, RKSS_DATA_LEN);
 		verify->checkstr = RKSS_CHECK_STR;
 		verify->version = RKSS_VERSION;
 		int ret = rkss_write_section(rkss);
@@ -1184,6 +1184,7 @@ int tee_supp_rk_fs_init(void)
 	for (i = 0; i < RKSS_DATA_SECTION_COUNT; i++)
 	{
 		struct rk_secure_storage rkss = {0};
+		memset(rkss.data, 0, RKSS_DATA_LEN);
 		rkss.index = i;
 		rkss_write_section(&rkss);
 		printf("cleaned [%d]", i);

commit c3230cf0dfaf93e5051287008f01c0ccdbd66ccc
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Mar 15 22:12:54 2018 +0800

    lib: avb: add bootloader-min-versions
    
    The bootloader include uboot and trust. The uboot slot index
    number is 0. The trust slot number index is 1.
    
    Change-Id: Ia62edbf60486fa4128756458c6312f682a83d0f7
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/android_avb/rk_avb_ops_user.h b/include/android_avb/rk_avb_ops_user.h
index fff8060cb0..48e1f58afe 100644
--- a/include/android_avb/rk_avb_ops_user.h
+++ b/include/android_avb/rk_avb_ops_user.h
@@ -27,6 +27,9 @@ extern "C" {
 #define PERM_ATTR_SUCCESS_FLAG 1
 /* soc-v use the rsa2048 */
 #define VBOOT_KEY_SIZE   256
+#define RPMB_BASE_ADDR		(64*1024/256)
+#define UBOOT_RB_INDEX_OFFSET 24
+#define TRUST_RB_INDEX_OFFSET 28
 
 /**
  * Provided to fastboot to read how many slot in this system.
diff --git a/lib/avb/rk_avb_user/rk_avb_ops_user.c b/lib/avb/rk_avb_user/rk_avb_ops_user.c
index 7c7d545e6e..01cfb0c41a 100644
--- a/lib/avb/rk_avb_user/rk_avb_ops_user.c
+++ b/lib/avb/rk_avb_user/rk_avb_ops_user.c
@@ -428,6 +428,88 @@ int rk_avb_read_bootloader_locked_flag(uint8_t *flag)
 #endif
 }
 
+#ifdef CONFIG_SUPPORT_EMMC_RPMB
+static int curr_device = -1;
+
+int rk_bootloader_rollback_index_read(uint32_t offset, uint32_t bytes,
+				      void *rb_index)
+{
+
+	struct mmc *mmc;
+	uint8_t rpmb_buf[256] = {0};
+	uint32_t n;
+	char original_part;
+
+	if ((offset + bytes) > 256)
+		return -1;
+
+	if (curr_device < 0) {
+		if (get_mmc_num() > 0)
+			curr_device = 0;
+		else {
+			avb_error("No MMC device available");
+			return -1;
+		}
+	}
+
+	mmc = find_mmc_device(curr_device);
+	/* Switch to the RPMB partition */
+#ifndef CONFIG_BLK
+	original_part = mmc->block_dev.hwpart;
+#else
+	original_part = mmc_get_blk_desc(mmc)->hwpart;
+#endif
+	if (blk_select_hwpart_devnum(IF_TYPE_MMC, curr_device, MMC_PART_RPMB) !=
+	    0)
+		return -1;
+
+	n =  mmc_rpmb_read(mmc, rpmb_buf, RPMB_BASE_ADDR, 1, NULL);
+	if (n != 1)
+		return -1;
+
+	/* Return to original partition */
+	if (blk_select_hwpart_devnum(IF_TYPE_MMC, curr_device, original_part) !=
+	    0)
+		return -1;
+
+	memcpy(rb_index, (void*)&rpmb_buf[offset], bytes);
+
+	return 0;
+}
+
+int rk_avb_get_bootloader_min_version(char *buffer)
+{
+	uint32_t rb_index;
+	char temp[ROLLBACK_MAX_SIZE] = {0};
+
+	if (rk_bootloader_rollback_index_read(UBOOT_RB_INDEX_OFFSET,
+					      sizeof(uint32_t), &rb_index)) {
+		avb_error("Can not read uboot rollback index");
+		return -1;
+	}
+	snprintf(temp, sizeof(int) + 1, "%d", 0);
+	strncat(buffer, temp, ROLLBACK_MAX_SIZE);
+	strncat(buffer, ":", 1);
+	snprintf(temp, sizeof(uint32_t) + 1, "%d", rb_index);
+	strncat(buffer, temp, ROLLBACK_MAX_SIZE);
+	strncat(buffer, ",", 1);
+
+	if (rk_bootloader_rollback_index_read(TRUST_RB_INDEX_OFFSET,
+					      sizeof(uint32_t), &rb_index)) {
+		avb_error("Can not read trust rollback index");
+		return -1;
+	}
+
+	snprintf(temp, sizeof(int) + 1, "%d", 1);
+	strncat(buffer, temp, ROLLBACK_MAX_SIZE);
+	strncat(buffer, ":", 1);
+	snprintf(temp, sizeof(uint32_t) + 1, "%d", rb_index);
+	strncat(buffer, temp, ROLLBACK_MAX_SIZE);
+
+	return 0;
+}
+#endif
+
 void rk_avb_get_at_vboot_state(char *buf)
 {
 	char temp_buffer[200] = {0};
@@ -477,8 +559,15 @@ void rk_avb_get_at_vboot_state(char *buf)
 		printf("Can not avb_min_ver!\n");
 	sprintf(buf, "%s%s%s%s", buf, avb_min_ver, temp_buffer, crlf);
 
-	/* miniloader is not ready, bootloader-min-versions=-1 */
-	sprintf(buf, "%s%s%d%s", buf, btld_min_ver, -1, crlf);
+	/* bootloader-min-versions */
+	memset(temp_buffer, 0, 200);
+#ifdef CONFIG_SUPPORT_EMMC_RPMB
+	if (rk_avb_get_bootloader_min_version(temp_buffer))
+		avb_error("Call rk_avb_get_bootloader_min_version error!");
+#else
+	memcpy(temp_buffer, "-1", strlen("-1"));
+#endif
+	sprintf(buf, "%s%s%s%s", buf, btld_min_ver, temp_buffer, crlf);
 }
 
 int rk_avb_get_ab_info(AvbABData* ab_data)

commit df50318e9dc135a4a5a1c3028ae66e89d915ac6a
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Mar 15 22:00:30 2018 +0800

    lib: avb: add slot number to avb-min-versions
    
    Acording to google, the avb-min-versions includes the slot number
    rather than the image rollback-index stored in the image.
    
    PIK/PSK: use AVB_ATX_PSK_VERSION_LOCATION and AVB_ATX_PIK_VERSION_LOCATION
    as slot number.
    
    Change-Id: I06b8d107e27f1e0f136b5e964c1287bc13f80b7c
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/lib/avb/rk_avb_user/rk_avb_ops_user.c b/lib/avb/rk_avb_user/rk_avb_ops_user.c
index 7e78dcca95..7c7d545e6e 100644
--- a/lib/avb/rk_avb_user/rk_avb_ops_user.c
+++ b/lib/avb/rk_avb_user/rk_avb_ops_user.c
@@ -350,24 +350,13 @@ int rk_avb_write_attribute_hash(uint8_t *buf, uint8_t length)
 #endif
 }
 
-static const char* slot_suffixes[2] = {"_a", "_b"};
-
 int rk_avb_read_all_rollback_index(char *buffer)
 {
 	AvbOps* ops;
-	AvbVBMetaImageHeader vbmeta_header;
 	uint64_t stored_rollback_index = 0;
-	uint64_t pik_rollback_index = 0;
-	uint64_t psk_rollback_index = 0;
-	AvbSlotVerifyFlags flags;
 	AvbIOResult io_ret;
 	char temp[ROLLBACK_MAX_SIZE] = {0};
-	AvbAtxPublicKeyMetadata *metadata;
 	int n;
-	bool unlocked;
-	AvbSlotVerifyResult verify_result;
-	AvbSlotVerifyData *slot_data[SLOT_NUM] = {NULL, NULL};
-	const char *requested_partitions[1] = {"vbmeta"};
 
 	ops = avb_ops_user_new();
 	if (ops == NULL) {
@@ -375,125 +364,20 @@ int rk_avb_read_all_rollback_index(char *buffer)
 		return -1;
 	}
 
-	if (ops->read_is_device_unlocked(ops, &unlocked) != 0) {
-		printf("Error determining whether device is unlocked.\n");
-		unlocked = ANDROID_VBOOT_UNLOCK;
-		if (ops->write_is_device_unlocked(ops, &unlocked) != 0) {
-			printf("Can not write lock state!\n");
-			unlocked = ANDROID_VBOOT_LOCK;
-		}
-		if (ops->read_is_device_unlocked(ops, &unlocked) != 0) {
-			printf("Can not read lock state!\n");
-			unlocked = ANDROID_VBOOT_LOCK;
-		}
-	}
-
-	flags = AVB_SLOT_VERIFY_FLAGS_NONE;
-	if (unlocked)
-		flags |= AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR;
-
-	for (n = 0; n < SLOT_NUM; n++) {
-		verify_result = avb_slot_verify(ops,
-						requested_partitions,
-						slot_suffixes[n],
-						flags,
-						AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE,
-						&slot_data[n]);
-		switch (verify_result) {
-		case AVB_SLOT_VERIFY_RESULT_OK:
-			break;
-
-		case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA:
-		case AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION:
-		/* Even with AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR
-		 * these mean game over.
-		 */
-			printf("Invalid metadata!\n");
-			goto out;
-
-		/* explicit fallthrough. */
-		case AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION:
-			printf("Error verify!\n");
-			goto out;
-		case AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX:
-			printf("error rollback index!\n");
-			goto out;
-		case AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED:
-			printf("error key!\n");
-			goto out;
-		default:
-			printf("Some abnormal condition occur!\n");
-			goto out;
-		}
-	}
-	debug("partition_name = %s\n", slot_data[0]->vbmeta_images->partition_name);
-	debug("vbmeta_size = %d\n", (int)(size_t)slot_data[0]->vbmeta_images->vbmeta_size);
-
 	for (n = 0; n < AVB_MAX_NUMBER_OF_ROLLBACK_INDEX_LOCATIONS; n++) {
-		uint64_t rollback_index_value = 0;
-		if (slot_data[0] != NULL && slot_data[1] != NULL) {
-			uint64_t a_rollback_index = slot_data[0]->rollback_indexes[n];
-			uint64_t b_rollback_index = slot_data[1]->rollback_indexes[n];
-			rollback_index_value =
-				(a_rollback_index < b_rollback_index ? a_rollback_index
-								: b_rollback_index);
-		} else if (slot_data[0] != NULL) {
-			rollback_index_value = slot_data[0]->rollback_indexes[n];
-		} else if (slot_data[1] != NULL) {
-			rollback_index_value = slot_data[1]->rollback_indexes[n];
-		}
-
 		io_ret = ops->read_rollback_index(
 			ops, n, &stored_rollback_index);
 		if (io_ret != AVB_IO_RESULT_OK)
 			goto out;
-		snprintf(temp, sizeof(uint64_t) + 1, "%lld",
-			 stored_rollback_index);
+		snprintf(temp, sizeof(int) + 1, "%d", n);
 		strncat(buffer, temp, ROLLBACK_MAX_SIZE);
 		strncat(buffer, ":", 1);
 		snprintf(temp, sizeof(uint64_t) + 1, "%lld",
-			 rollback_index_value);
+			 stored_rollback_index);
 		strncat(buffer, temp, ROLLBACK_MAX_SIZE);
 		strncat(buffer, ",", 1);
 	}
 
-	for (n = 0; n < SLOT_NUM; n++) {
-		avb_vbmeta_image_header_to_host_byte_order((AvbVBMetaImageHeader *)
-							   slot_data[n]->vbmeta_images->\
-							   vbmeta_data,
-							   &vbmeta_header);
-		if (vbmeta_header.public_key_metadata_size > 0) {
-			metadata = (AvbAtxPublicKeyMetadata *)(slot_data[n]->\
-				vbmeta_images->vbmeta_data +
-			   	sizeof(AvbVBMetaImageHeader) +
-			   	vbmeta_header.authentication_data_block_size +
-			   	vbmeta_header.public_key_metadata_offset);
-			if (n == 0) {
-				pik_rollback_index =
-					metadata->product_intermediate_key_certificate.\
-					signed_data.key_version;
-				psk_rollback_index =
-					metadata->product_signing_key_certificate.\
-					signed_data.key_version;
-			}
-
-			if (pik_rollback_index > metadata->\
-				product_intermediate_key_certificate.\
-				signed_data.key_version) {
-				pik_rollback_index = metadata->\
-				product_intermediate_key_certificate.\
-				signed_data.key_version;
-			}
-
-			if (psk_rollback_index > metadata->\
-				product_signing_key_certificate.\
-				signed_data.key_version) {
-				psk_rollback_index = metadata->\
-				product_signing_key_certificate.\
-				signed_data.key_version;
-			}
-		}
-	}
 	io_ret =
 		ops->read_rollback_index(ops,
 					 AVB_ATX_PIK_VERSION_LOCATION,
@@ -503,10 +387,10 @@ int rk_avb_read_all_rollback_index(char *buffer)
 		goto out;
 	}
 	/* PIK rollback index */
-	snprintf(temp, sizeof(uint64_t) + 1, "%lld", stored_rollback_index);
+	snprintf(temp, sizeof(int) + 1, "%d", AVB_ATX_PIK_VERSION_LOCATION);
 	strncat(buffer, temp, ROLLBACK_MAX_SIZE);
 	strncat(buffer, ":", 1);
-	snprintf(temp, sizeof(uint64_t) + 1, "%lld", pik_rollback_index);
+	snprintf(temp, sizeof(uint64_t) + 1, "%lld", stored_rollback_index);
 	strncat(buffer, temp, ROLLBACK_MAX_SIZE);
 	strncat(buffer, ",", 1);
 	io_ret = ops->read_rollback_index(ops,
@@ -517,27 +401,16 @@ int rk_avb_read_all_rollback_index(char *buffer)
 		goto out;
 	}
 	/* PSK rollback index */
-	snprintf(temp, sizeof(uint64_t) + 1, "%lld", stored_rollback_index);
+	snprintf(temp, sizeof(int) + 1, "%d", AVB_ATX_PSK_VERSION_LOCATION);
 	strncat(buffer, temp, ROLLBACK_MAX_SIZE);
 	strncat(buffer, ":", 1);
-	snprintf(temp, sizeof(uint64_t) + 1, "%lld", psk_rollback_index);
+	snprintf(temp, sizeof(uint64_t) + 1, "%lld", stored_rollback_index);
 	strncat(buffer, temp, ROLLBACK_MAX_SIZE);
 	debug("%s\n", buffer);
-
-	for (n = 0; n < SLOT_NUM; n++) {
-		if (slot_data[n] != NULL) {
-			avb_slot_verify_data_free(slot_data[n]);
-		}
-	}
 	avb_ops_user_free(ops);
 
 	return 0;
 out:
-	for (n = 0; n < SLOT_NUM; n++) {
-		if (slot_data[n] != NULL) {
-			avb_slot_verify_data_free(slot_data[n]);
-		}
-	}
 	avb_ops_user_free(ops);
 
 	return -1;
@@ -557,7 +430,7 @@ int rk_avb_read_bootloader_locked_flag(uint8_t *flag)
 
 void rk_avb_get_at_vboot_state(char *buf)
 {
-	char temp_buffer[150] = {0};
+	char temp_buffer[200] = {0};
 	char temp_flag = 0;
 	char crlf[2] = {'\n', 0};
 	char *lock_val = NULL;

commit 4715d15e1726cac7a8e86a5514072b024c71547e
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Tue Feb 6 09:52:31 2018 +0800

    cmd: sf: add test count
    
    Change-Id: I06c0783998152ef5d32f95f6813d5dfe315b4cc2
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/cmd/sf.c b/cmd/sf.c
index f971eec781..9953895268 100644
--- a/cmd/sf.c
+++ b/cmd/sf.c
@@ -442,12 +442,15 @@ static int spi_flash_test(struct spi_flash *flash, uint8_t *buf, ulong len,
 {
 	struct test_info test;
 	int i;
+	int erase_len;
 
 	printf("SPI flash test:\n");
 	memset(&test, '\0', sizeof(test));
 	test.base_ms = get_timer(0);
 	test.bytes = len;
-	if (spi_flash_erase(flash, offset, len)) {
+
+	erase_len = roundup(len, 4096);
+	if (spi_flash_erase(flash, offset, erase_len)) {
 		printf("Erase failed\n");
 		return -1;
 	}
@@ -506,6 +509,8 @@ static int do_spi_flash_test(int argc, char * const argv[])
 	char *endp;
 	uint8_t *vbuf;
 	int ret;
+	int count;
+	int i;
 
 	if (argc < 3)
 		return -1;
@@ -516,6 +521,10 @@ static int do_spi_flash_test(int argc, char * const argv[])
 	if (*argv[2] == 0 || *endp != 0)
 		return -1;
 
+	count = simple_strtoul(argv[3], &endp, 10);
+	if (!count)
+		count = 1;
+
 	vbuf = memalign(ARCH_DMA_MINALIGN, len);
 	if (!vbuf) {
 		printf("Cannot allocate memory (%lu bytes)\n", len);
@@ -530,7 +539,13 @@ static int do_spi_flash_test(int argc, char * const argv[])
 
 	from = map_sysmem(CONFIG_SYS_TEXT_BASE, 0);
 	memcpy(buf, from, len);
-	ret = spi_flash_test(flash, buf, len, offset, vbuf);
+	for (i = 0; i < count; i++) {
+		ret = spi_flash_test(flash, buf, len, offset, vbuf);
+		if (ret < 0) {
+			printf("Test Failed, passed count:%d\n", i);
+			break;
+		}
+	}
 	free(vbuf);
 	free(buf);
 	if (ret) {

commit a3d7c00b32ef17a60f5a4789b3a43fcf1d671166
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Tue Feb 6 09:51:12 2018 +0800

    cmd: boot: add brom cmd to reboot to brom dnl mode
    
    Change-Id: I797491ebe25af1013732aeee87e61e3ba4bc1689
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/cmd/boot.c b/cmd/boot.c
index 72f2cf362d..28070d6b47 100644
--- a/cmd/boot.c
+++ b/cmd/boot.c
@@ -11,6 +11,8 @@
 #include <common.h>
 #include <command.h>
 #include <net.h>
+#include <asm/io.h>
+#include <asm/arch/boot_mode.h>
 
 #ifdef CONFIG_CMD_GO
 
@@ -45,6 +47,14 @@ static int do_go(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return rcode;
 }
 
+static int do_reboot_brom(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+	writel(BOOT_BROM_DOWNLOAD, CONFIG_ROCKCHIP_BOOT_MODE_REG);
+	do_reset(NULL, 0, 0, NULL);
+
+	return 0;
+}
+
 /* -------------------------------------------------------------------- */
 
 U_BOOT_CMD(
@@ -57,11 +67,17 @@ U_BOOT_CMD(
 #endif
 
 U_BOOT_CMD(
-	reset, 1, 0,	do_reset,
+	rbrom, 1, 0,	do_reboot_brom,
 	"Perform RESET of the CPU",
 	""
 );
 
+U_BOOT_CMD(
+        reset, 1, 0,    do_reset,
+        "Perform RESET of the CPU",
+        ""
+);
+
 #ifdef CONFIG_CMD_POWEROFF
 U_BOOT_CMD(
 	poweroff, 1, 0,	do_poweroff,

commit c25c0ed054237d663102fbb8baeed63461901186
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Wed Feb 28 14:10:08 2018 +0800

    ram: rockchip: add sdram driver for rk3308
    
    Change-Id: I600520037f231363731a38e34f905d40963d7bd3
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index 5db731b60b..80262836a9 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_ROCKCHIP_RK3128) = sdram_rk3128.o
 obj-$(CONFIG_ROCKCHIP_RK3188) = sdram_rk3188.o
 obj-$(CONFIG_ROCKCHIP_RK322X) = sdram_rk322x.o
 obj-$(CONFIG_ROCKCHIP_RK3288) = sdram_rk3288.o
+obj-$(CONFIG_ROCKCHIP_RK3308) = sdram_rk3308.o
 obj-$(CONFIG_ROCKCHIP_RK3328) = sdram_rk3328.o
 obj-$(CONFIG_ROCKCHIP_RK3399) = sdram_rk3399.o
 obj-$(CONFIG_ROCKCHIP_PX30) = sdram_px30.o
diff --git a/drivers/ram/rockchip/sdram_rk3308.c b/drivers/ram/rockchip/sdram_rk3308.c
new file mode 100644
index 0000000000..03a52535b7
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_rk3308.c
@@ -0,0 +1,58 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:     GPL-2.0
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <ram.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/grf_rk3308.h>
+#include <asm/arch/sdram_common.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct dram_info {
+	struct ram_info info;
+};
+
+static int rk3308_dmc_probe(struct udevice *dev)
+{
+	struct dram_info *priv = dev_get_priv(dev);
+	struct rk3308_grf *grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
+	priv->info.base = CONFIG_SYS_SDRAM_BASE;
+	priv->info.size = rockchip_sdram_size((phys_addr_t)&grf->os_reg2);
+
+	return 0;
+}
+
+static int rk3308_dmc_get_info(struct udevice *dev, struct ram_info *info)
+{
+	struct dram_info *priv = dev_get_priv(dev);
+
+	*info = priv->info;
+
+	return 0;
+}
+
+static struct ram_ops rk3308_dmc_ops = {
+	.get_info = rk3308_dmc_get_info,
+};
+
+
+static const struct udevice_id rk3308_dmc_ids[] = {
+	{ .compatible = "rockchip,rk3308-dmc" },
+	{ }
+};
+
+U_BOOT_DRIVER(dmc_rk3308) = {
+	.name = "rockchip_rk3308_dmc",
+	.id = UCLASS_RAM,
+	.of_match = rk3308_dmc_ids,
+	.ops = &rk3308_dmc_ops,
+	.probe = rk3308_dmc_probe,
+	.priv_auto_alloc_size = sizeof(struct dram_info),
+};

commit b7e6ff2c3de0079d6f69353d110ac6c6103caa63
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Mar 5 09:40:59 2018 +0800

    arm: rockchip: add rk3308 chip info
    
    Add chip info for rk3308.
    
    Change-Id: I30bea4469019bb7c6b0267f1a2bf6dc0ec5ba209
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/chip_info.c b/arch/arm/mach-rockchip/chip_info.c
index 99597663b8..772993ea08 100644
--- a/arch/arm/mach-rockchip/chip_info.c
+++ b/arch/arm/mach-rockchip/chip_info.c
@@ -23,6 +23,7 @@
  * rk3399 chip info:	{0x33333043, 0x32303136, 0x30313138, 0x56313030} - 330B20160118V100
  * rk322xh chip info:	{0x33323043, 0x32303136, 0x31313031, 0x56313030} - 320C20161101V100
  * rk3326 chip info:	{0x33333044, 0x32303137, 0x31323134, 0x56313030} - 330D20171214V100
+ * rk3308 chip info:	{0x33333045, 0x32303138, 0x30323033, 0x56313030} - 330E20180203V100
  */
 int rockchip_get_chip_info(unsigned int chip_info[])
 {
@@ -39,6 +40,8 @@ int rockchip_get_chip_info(unsigned int chip_info[])
 	chip_info[0] = 0x33323042;
 #elif defined(CONFIG_ROCKCHIP_RK3288)
 	chip_info[0] = 0x33323041;
+#elif defined(CONFIG_ROCKCHIP_RK3308)
+	chip_info[0] = 0x33333045;
 #elif defined(CONFIG_ROCKCHIP_RK3328)
 	chip_info[0] = 0x33323043;
 	chip_info[3] = 0x56313030;

commit 849faaa0e3bf38281c3c4bbef38eb37429e32714
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Thu Mar 1 14:23:02 2018 +0800

    common: boot_rkimg: avoid to access NULL address when failed to get bootdev type from env
    
    The NULL address maybe point to a security region on
    rockchip armv8 platform, which can't be accessed from
    u-boot(normal world). So before we access devtype by strcmp,
    set devtype to mmc if we failed to get it from env.
    
    Change-Id: Iceae3d1b89abd78fe59a3b57938254e55fa3894f
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 8e07264999..3a431e3497 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -155,6 +155,12 @@ int get_bootdev_type(void)
 	devtype_num_envset();
 	devtype = env_get("devtype");
 
+	/* For current use(Only EMMC support!) */
+	if (!devtype) {
+		devtype = "mmc";
+		printf("Use emmc as default boot media\n");
+	}
+
 	if (!strcmp(devtype, "mmc")) {
 		type = IF_TYPE_MMC;
 		boot_media = "emmc";
@@ -165,13 +171,6 @@ int get_bootdev_type(void)
 		/* Add new to support */
 	}
 
-	/* For current use(Only EMMC support!) */
-	if (!type) {
-		type = IF_TYPE_MMC;
-		boot_media = "emmc";
-		printf("Use emmc as default boot media\n");
-	}
-
 	if (!appended && boot_media) {
 		appended = 1;
 		/*

commit c1e43163e9db42fd612b50f01ace79218c18fc8c
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Wed Feb 28 14:08:23 2018 +0800

    board: rockchip: add rk3308 evb support
    
    Add basic support for rk3308 evb.
    
    Change-Id: I35aecc6747c222327a12b7583f84f971ab253fa3
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 74c848757f..3d08d9e4dd 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -415,6 +415,7 @@ source "arch/arm/mach-rockchip/rk3128/Kconfig"
 source "arch/arm/mach-rockchip/rk3188/Kconfig"
 source "arch/arm/mach-rockchip/rk322x/Kconfig"
 source "arch/arm/mach-rockchip/rk3288/Kconfig"
+source "arch/arm/mach-rockchip/rk3308/Kconfig"
 source "arch/arm/mach-rockchip/rk3328/Kconfig"
 source "arch/arm/mach-rockchip/rk3368/Kconfig"
 source "arch/arm/mach-rockchip/rk3399/Kconfig"
diff --git a/arch/arm/mach-rockchip/rk3308/Kconfig b/arch/arm/mach-rockchip/rk3308/Kconfig
new file mode 100644
index 0000000000..b0aa0ecdca
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3308/Kconfig
@@ -0,0 +1,18 @@
+if ROCKCHIP_RK3308
+
+config TARGET_EVB_RK3308
+	bool "EVB_RK3308"
+	select BOARD_LATE_INIT
+
+config SYS_SOC
+	default "rockchip"
+
+config SYS_MALLOC_F_LEN
+	default 0x400
+
+config SPL_SERIAL_SUPPORT
+	default y
+
+source "board/rockchip/evb_rk3308/Kconfig"
+
+endif
diff --git a/board/rockchip/evb_rk3308/Kconfig b/board/rockchip/evb_rk3308/Kconfig
new file mode 100644
index 0000000000..0074429cb6
--- /dev/null
+++ b/board/rockchip/evb_rk3308/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_EVB_RK3308
+
+config SYS_BOARD
+	default "evb_rk3308"
+
+config SYS_VENDOR
+	default "rockchip"
+
+config SYS_CONFIG_NAME
+	default "evb_rk3308"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+
+endif
diff --git a/board/rockchip/evb_rk3308/MAINTAINERS b/board/rockchip/evb_rk3308/MAINTAINERS
new file mode 100644
index 0000000000..0af119ae0a
--- /dev/null
+++ b/board/rockchip/evb_rk3308/MAINTAINERS
@@ -0,0 +1,6 @@
+EVB-RK3308
+M:      Andy Yan <andy.yan@rock-chips.com>
+S:      Maintained
+F:      board/rockchip/evb_rk3308
+F:      include/configs/evb_rk3308.h
+F:      configs/evb-rk3308_defconfig
diff --git a/board/rockchip/evb_rk3308/Makefile b/board/rockchip/evb_rk3308/Makefile
new file mode 100644
index 0000000000..05de5560f1
--- /dev/null
+++ b/board/rockchip/evb_rk3308/Makefile
@@ -0,0 +1,7 @@
+#
+# (C) Copyright 2018 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y	+= evb_rk3308.o
diff --git a/board/rockchip/evb_rk3308/evb_rk3308.c b/board/rockchip/evb_rk3308/evb_rk3308.c
new file mode 100644
index 0000000000..4bf86117df
--- /dev/null
+++ b/board/rockchip/evb_rk3308/evb_rk3308.c
@@ -0,0 +1,11 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <asm/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
new file mode 100644
index 0000000000..a87affc504
--- /dev/null
+++ b/configs/evb-rk3308_defconfig
@@ -0,0 +1,63 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_ROCKCHIP_RK3308=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_RKIMG_BOOTLOADER=y
+# CONFIG_USING_KERNEL_DTB is not set
+CONFIG_TARGET_EVB_RK3308=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3308-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
+# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_BOOTDELAY=0
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_FASTBOOT_BUF_ADDR=0x800800
+CONFIG_FASTBOOT_BUF_SIZE=0x08000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_RKPARM_PARTITION=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_ADC_KEY=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PINCTRL=y
+CONFIG_DM_FUEL_GAUGE=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0xFF0C0000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x330d
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
diff --git a/include/configs/evb_rk3308.h b/include/configs/evb_rk3308.h
new file mode 100644
index 0000000000..2fdadb9998
--- /dev/null
+++ b/include/configs/evb_rk3308.h
@@ -0,0 +1,20 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __EVB_RK3308_H
+#define __EVB_RK3308_H
+
+#include <configs/rk3308_common.h>
+
+#define CONFIG_SYS_MMC_ENV_DEV 0
+
+
+#define CONFIG_CONSOLE_SCROLL_LINES		10
+
+#undef CONFIG_BOOTCOMMAND
+#define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
+
+#endif

commit f135c3263247c7cfad868dfb20bc8f97eec60342
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Feb 26 09:39:56 2018 +0800

    arm: rockchip: rk3308: add core dtsi
    
    Sync these files from Linux kernel.
    
    Change-Id: I33432a84090d4f96ba932f30a3b4f0101c5a889d
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 9ea73115db..087b721eea 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -46,6 +46,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
 	rk3288-veyron-mickey.dtb \
 	rk3288-veyron-minnie.dtb \
 	rk3288-vyasa.dtb \
+	rk3308-evb.dtb \
 	rk3328-evb.dtb \
 	rk3368-lion.dtb \
 	rk3368-sheep.dtb \
diff --git a/arch/arm/dts/rk3308-evb-u-boot.dtsi b/arch/arm/dts/rk3308-evb-u-boot.dtsi
new file mode 100644
index 0000000000..aa7600fbe2
--- /dev/null
+++ b/arch/arm/dts/rk3308-evb-u-boot.dtsi
@@ -0,0 +1,18 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+/ {
+	dmc: dmc@20004000 {
+		u-boot,dm-pre-reloc;
+		compatible = "rockchip,rk3308-dmc";
+		reg = <0x0 0xff010000 0x0 0x10000>;
+	};
+};
+
+&grf {
+	u-boot,dm-pre-reloc;
+};
+
diff --git a/arch/arm/dts/rk3308-evb.dts b/arch/arm/dts/rk3308-evb.dts
new file mode 100644
index 0000000000..6af645f1cc
--- /dev/null
+++ b/arch/arm/dts/rk3308-evb.dts
@@ -0,0 +1,75 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+/dts-v1/;
+#include "rk3308.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Rockchip RK3308 EVB";
+	compatible = "rockchip,rk3308-evb", "rockchip,rk3308";
+
+	chosen {
+		stdout-path = "serial2:1500000n8";
+	};
+
+	adc-keys {
+		compatible = "adc-keys";
+		io-channels = <&saradc 1>;
+		io-channel-names = "buttons";
+		poll-interval = <100>;
+		keyup-threshold-microvolt = <1800000>;
+
+		esc-key {
+			linux,code = <KEY_MUTE>;
+			label = "mute";
+			press-threshold-microvolt = <1130000>;
+		};
+
+		home-key {
+			linux,code = <KEY_MODE>;
+			label = "mode";
+			press-threshold-microvolt = <901000>;
+		};
+
+		menu-key {
+			linux,code = <KEY_PLAY>;
+			label = "play";
+			press-threshold-microvolt = <624000>;
+		};
+
+		vol-down-key {
+			linux,code = <KEY_VOLUMEDOWN>;
+			label = "volume down";
+			press-threshold-microvolt = <300000>;
+		};
+
+		vol-up-key {
+			linux,code = <KEY_VOLUMEUP>;
+			label = "volume up";
+			press-threshold-microvolt = <180000>;
+		};
+	};
+
+};
+
+&emmc {
+	cap-mmc-highspeed;
+	mmc-hs200-1_8v;
+	supports-emmc;
+	non-removable;
+	num-slots = <1>;
+	status = "okay";
+};
+
+&saradc {
+	status = "okay";
+};
+
+&uart2 {
+	clock-frequency = <24000000>;
+	status = "okay";
+};
diff --git a/arch/arm/dts/rk3308.dtsi b/arch/arm/dts/rk3308.dtsi
new file mode 100644
index 0000000000..abf8cf01dd
--- /dev/null
+++ b/arch/arm/dts/rk3308.dtsi
@@ -0,0 +1,823 @@
+/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/clock/rk3308-cru.h>
+
+/ {
+	compatible = "rockchip,rk3308";
+
+	interrupt-parent = <&gic>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	aliases {
+		serial0 = &uart0;
+		serial1 = &uart1;
+		serial2 = &uart2;
+	};
+
+	cpus {
+		#address-cells = <2>;
+		#size-cells = <0>;
+
+		cpu0: cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a35", "arm,armv8";
+			reg = <0x0 0x0>;
+			enable-method = "psci";
+		};
+
+		cpu1: cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a35", "arm,armv8";
+			reg = <0x0 0x1>;
+			enable-method = "psci";
+		};
+
+		cpu2: cpu@2 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a35", "arm,armv8";
+			reg = <0x0 0x2>;
+			enable-method = "psci";
+		};
+
+		cpu3: cpu@3 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a35", "arm,armv8";
+			reg = <0x0 0x3>;
+			enable-method = "psci";
+		};
+	};
+
+	arm-pmu {
+		compatible = "arm,cortex-a53-pmu";
+		interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
+	};
+
+	psci {
+		compatible = "arm,psci-1.0";
+		method = "smc";
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+		clock-frequency = <24000000>;
+	};
+
+	clocks {
+		xin24m: xin24m {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <24000000>;
+			clock-output-names = "xin24m";
+		};
+	};
+
+	grf: grf@ff000000 {
+		compatible = "rockchip,rk3308-grf", "syscon", "simple-mfd";
+		reg = <0x0 0xff000000 0x0 0x10000>;
+	};
+
+	uart0: serial@ff0a0000 {
+		compatible = "rockchip,rk3308-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xff0a0000 0x0 0x100>;
+		interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		status = "disabled";
+	};
+
+	uart1: serial@ff0b0000 {
+		compatible = "rockchip,rk3308-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xff0b0000 0x0 0x100>;
+		interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		status = "disabled";
+	};
+
+	uart2: serial@ff0c0000 {
+		compatible = "rockchip,rk3308-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xff0c0000 0x0 0x100>;
+		interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		status = "disabled";
+	};
+
+	saradc: saradc@ff1e0000 {
+		compatible = "rockchip,rk3308-saradc", "rockchip,rk3399-saradc";
+		reg = <0x0 0xff1e0000 0x0 0x100>;
+		interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+		#io-channel-cells = <1>;
+		clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
+		clock-names = "saradc", "apb_pclk";
+		resets = <&cru SRST_SARADC_P>;
+		reset-names = "saradc-apb";
+		status = "disabled";
+	};
+
+	i2s0: i2s@ff300000 {
+		compatible = "rockchip,rk3308-i2s", "rockchip,rk3066-i2s";
+		reg = <0x0 0xff300000 0x0 0x10000>;
+	};
+
+	i2s1: i2s@ff310000 {
+		compatible = "rockchip,rk3308-i2s", "rockchip,rk3066-i2s";
+		reg = <0x0 0xff100000 0x0 0x10000>;
+	};
+
+	i2s2: i2s@ff320000 {
+		compatible = "rockchip,rk3308-i2s", "rockchip,rk3066-i2s";
+		reg = <0x0 0xff320000 0x0 0x10000>;
+	};
+
+	i2s3: i2s@ff330000 {
+		compatible = "rockchip,rk3308-i2s", "rockchip,rk3066-i2s";
+		reg = <0x0 0xff330000 0x0 0x10000>;
+	};
+
+	vad: vad@ff3c0000 {
+		compatible = "rockchip,rk3308-vad", "rockchip,vad";
+		reg = <0x0 0xff3c0000 0x0 0x10000>, <0x0 0xfff88000 0x0 0x38000>;
+		reg-names = "vad", "vad-memory";
+		interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
+		rockchip,audio-src = <0>;
+		rockchip,audio-chnl-num = <8>;
+		rockchip,audio-chnl = <0>;
+		rockchip,mode = <0>;
+	};
+
+	sdmmc: dwmmc@ff480000 {
+		compatible = "rockchip,rk3308-dw-mshc", "rockchip,rk3288-dw-mshc";
+		reg = <0x0 0xff480000 0x0 0x4000>;
+		max-frequency = <150000000>;
+		bus-width = <4>;
+		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
+			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
+		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
+		fifo-depth = <0x100>;
+		interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
+		status = "disabled";
+	};
+
+	emmc: dwmmc@ff490000 {
+		compatible = "rockchip,rk3308-dw-mshc", "rockchip,rk3288-dw-mshc";
+		reg = <0x0 0xff490000 0x0 0x4000>;
+		max-frequency = <150000000>;
+		bus-width = <8>;
+		clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
+			 <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
+		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
+		fifo-depth = <0x100>;
+		interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_bus8>;
+		status = "disabled";
+	};
+
+	sdio: dwmmc@ff4a0000 {
+		compatible = "rockchip,rk3308-dw-mshc", "rockchip,rk3288-dw-mshc";
+		reg = <0x0 0xff4a0000 0x0 0x4000>;
+		max-frequency = <150000000>;
+		bus-width = <4>;
+		clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
+			 <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
+		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
+		fifo-depth = <0x100>;
+		interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&sdio_bus4 &sdio_cmd &sdio_clk>;
+		status = "disabled";
+	};
+
+	cru: clock-controller@ff500000 {
+		compatible = "rockchip,rk3308-cru";
+		reg = <0x0 0xff500000 0x0 0x1000>;
+		rockchip,grf = <&grf>;
+		#clock-cells = <1>;
+		#reset-cells = <1>;
+	};
+
+	gic: interrupt-controller@ff580000 {
+		compatible = "arm,gic-400";
+		#interrupt-cells = <3>;
+		#address-cells = <0>;
+		interrupt-controller;
+
+		reg = <0x0 0xff581000 0x0 0x1000>,
+		      <0x0 0xff582000 0x0 0x2000>,
+		      <0x0 0xff584000 0x0 0x2000>,
+		      <0x0 0xff586000 0x0 0x2000>;
+		interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
+	};
+
+	pinctrl: pinctrl {
+		compatible = "rockchip,rk3308-pinctrl";
+		rockchip,grf = <&grf>;
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		gpio0: gpio0@ff220000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x0 0xff220000 0x0 0x100>;
+			interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
+			//clocks = <&cru PCLK_GPIO0>;
+			clocks = <&xin24m>;
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio1: gpio1@ff230000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x0 0xff230000 0x0 0x100>;
+			interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
+			//clocks = <&cru PCLK_GPIO1>;
+			clocks = <&xin24m>;
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio2: gpio2@ff240000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x0 0xff240000 0x0 0x100>;
+			interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
+			//clocks = <&cru PCLK_GPIO2>;
+			clocks = <&xin24m>;
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio3: gpio3@ff250000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x0 0xff250000 0x0 0x100>;
+			interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
+			//clocks = <&cru PCLK_GPIO3>;
+			clocks = <&xin24m>;
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio4: gpio4@ff260000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x0 0xff260000 0x0 0x100>;
+			interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
+			//clocks = <&cru PCLK_GPIO4>;
+			clocks = <&xin24m>;
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		pcfg_pull_up: pcfg-pull-up {
+			bias-pull-up;
+		};
+
+		pcfg_pull_down: pcfg-pull-down {
+			bias-pull-down;
+		};
+
+		pcfg_pull_none: pcfg-pull-none {
+			bias-disable;
+		};
+
+		pcfg_pull_none_2ma: pcfg-pull-none-2ma {
+			bias-disable;
+			drive-strength = <2>;
+		};
+
+		pcfg_pull_up_2ma: pcfg-pull-up-2ma {
+			bias-pull-up;
+			drive-strength = <2>;
+		};
+
+		pcfg_pull_up_4ma: pcfg-pull-up-4ma {
+			bias-pull-up;
+			drive-strength = <4>;
+		};
+
+		pcfg_pull_none_4ma: pcfg-pull-none-4ma {
+			bias-disable;
+			drive-strength = <4>;
+		};
+
+		pcfg_pull_down_4ma: pcfg-pull-down-4ma {
+			bias-pull-down;
+			drive-strength = <4>;
+		};
+
+		pcfg_pull_none_8ma: pcfg-pull-none-8ma {
+			bias-disable;
+			drive-strength = <8>;
+		};
+
+		pcfg_pull_up_8ma: pcfg-pull-up-8ma {
+			bias-pull-up;
+			drive-strength = <8>;
+		};
+
+		pcfg_pull_none_12ma: pcfg-pull-none-12ma {
+			bias-disable;
+			drive-strength = <12>;
+		};
+
+		pcfg_pull_up_12ma: pcfg-pull-up-12ma {
+			bias-pull-up;
+			drive-strength = <12>;
+		};
+
+		pcfg_pull_none_smt: pcfg-pull-none-smt {
+			bias-disable;
+			input-schmitt-enable;
+		};
+
+		pcfg_output_high: pcfg-output-high {
+			output-high;
+		};
+
+		pcfg_output_low: pcfg-output-low {
+			output-low;
+		};
+
+		pcfg_input_high: pcfg-input-high {
+			bias-pull-up;
+			input-enable;
+		};
+
+		pcfg_input: pcfg-input {
+			input-enable;
+		};
+
+		i2c0 {
+			i2c0_xfer: i2c0-xfer {
+				rockchip,pins =
+					<1 RK_PD0 2 &pcfg_pull_none_smt>,
+					<1 RK_PD1 2 &pcfg_pull_none_smt>;
+			};
+		};
+
+		i2c1 {
+			i2c1_xfer: i2c1-xfer {
+				rockchip,pins =
+					<0 RK_PB3 1 &pcfg_pull_none_smt>,
+					<0 RK_PB4 1 &pcfg_pull_none_smt>;
+			};
+		};
+
+		i2c2 {
+			i2c2_xfer: i2c2-xfer {
+				rockchip,pins =
+					<2 RK_PA2 3 &pcfg_pull_none_smt>,
+					<2 RK_PA3 3 &pcfg_pull_none_smt>;
+			};
+		};
+
+		i2c3-m0 {
+			i2c3m0_xfer: i2c3m0-xfer {
+				rockchip,pins =
+					<0 RK_PB7 2 &pcfg_pull_none_smt>,
+					<0 RK_PC0 2 &pcfg_pull_none_smt>;
+			};
+		};
+
+		i2c3-m1 {
+			i2c3m1_xfer: i2c3m1-xfer {
+				rockchip,pins =
+					<3 RK_PB4 2 &pcfg_pull_none_smt>,
+					<3 RK_PB5 2 &pcfg_pull_none_smt>;
+			};
+		};
+
+		tsadc {
+			tsadc_otp_gpio: tsadc-otp-gpio {
+				rockchip,pins =
+					<0 RK_PB2 0 &pcfg_pull_none>;
+			};
+
+			tsadc_otp_out: tsadc-otp-out {
+				rockchip,pins =
+					<0 RK_PB2 1 &pcfg_pull_none>;
+			};
+		};
+
+		uart0 {
+			uart0_xfer: uart0-xfer {
+				rockchip,pins =
+					<2 RK_PA1 1 &pcfg_pull_up>,
+					<2 RK_PA0 1 &pcfg_pull_none>;
+			};
+
+			uart0_cts: uart0-cts {
+				rockchip,pins =
+					<2 RK_PA2 1 &pcfg_pull_none>;
+			};
+
+			uart0_rts: uart0-rts {
+				rockchip,pins =
+					<2 RK_PA3 1 &pcfg_pull_none>;
+			};
+		};
+
+		uart1 {
+			uart1_xfer: uart1-xfer {
+				rockchip,pins =
+					<1 RK_PD1 1 &pcfg_pull_up>,
+					<1 RK_PD0 1 &pcfg_pull_none>;
+			};
+
+			uart1_cts: uart1-cts {
+				rockchip,pins =
+					<1 RK_PC6 1 &pcfg_pull_none>;
+			};
+
+			uart1_rts: uart1-rts {
+				rockchip,pins =
+					<1 RK_PC7 1 &pcfg_pull_none>;
+			};
+		};
+
+		uart2-m0 {
+			uart2m0_xfer: uart2m0-xfer {
+				rockchip,pins =
+					<1 RK_PC7 2 &pcfg_pull_up>,
+					<1 RK_PC6 2 &pcfg_pull_none>;
+			};
+		};
+
+		uart2-m1 {
+			uart2m1_xfer: uart2m1-xfer {
+				rockchip,pins =
+					<4 RK_PD3 2 &pcfg_pull_up>,
+					<4 RK_PD2 2 &pcfg_pull_none>;
+			};
+		};
+
+		uart3 {
+			uart3_xfer: uart3-xfer {
+				rockchip,pins =
+					<3 RK_PB5 4 &pcfg_pull_up>,
+					<3 RK_PB4 4 &pcfg_pull_none>;
+			};
+		};
+
+		uart4 {
+
+			uart4_xfer: uart4-xfer {
+				rockchip,pins =
+					<4 RK_PB1 1 &pcfg_pull_up>,
+					<4 RK_PB0 1 &pcfg_pull_none>;
+			};
+
+			uart4_cts: uart4-cts {
+				rockchip,pins =
+					<4 RK_PA6 1 &pcfg_pull_none>;
+
+			};
+
+			uart4_rts: uart4-rts {
+				rockchip,pins =
+					<4 RK_PA7 1 &pcfg_pull_none>;
+			};
+		};
+
+		spi0 {
+			spi0_clk: spi0-clk {
+				rockchip,pins =
+					<2 RK_PA2 2 &pcfg_pull_up>;
+			};
+
+			spi0_csn0: spi0-csn0 {
+				rockchip,pins =
+					<2 RK_PA3 2 &pcfg_pull_up>;
+			};
+
+			spi0_miso: spi0-miso {
+				rockchip,pins =
+					<2 RK_PA0 2 &pcfg_pull_up>;
+			};
+
+			spi0_mosi: spi0-mosi {
+				rockchip,pins =
+					<2 RK_PA1 2 &pcfg_pull_up>;
+			};
+		};
+
+		spi1 {
+			spi1_clk: spi1-clk {
+				rockchip,pins =
+					<3 RK_PB3 3 &pcfg_pull_up>;
+			};
+
+			spi1_csn0: spi1-csn0 {
+				rockchip,pins =
+					<3 RK_PB5 3 &pcfg_pull_up>;
+			};
+
+			spi1_miso: spi1-miso {
+				rockchip,pins =
+					<3 RK_PB2 3 &pcfg_pull_up>;
+			};
+
+			spi1_mosi: spi1-mosi {
+				rockchip,pins =
+					<3 RK_PB4 3 &pcfg_pull_up>;
+			};
+		};
+
+		spi2 {
+			spi2_clk: spi2-clk {
+				rockchip,pins =
+					<1 RK_PD0 3 &pcfg_pull_up>;
+			};
+
+			spi2_csn0: spi2-csn0 {
+				rockchip,pins =
+					<1 RK_PD1 3 &pcfg_pull_up>;
+			};
+
+			spi2_miso: spi2-miso {
+				rockchip,pins =
+					<1 RK_PC6 3 &pcfg_pull_up>;
+			};
+
+			spi2_mosi: spi2-mosi {
+				rockchip,pins =
+					<1 RK_PC7 3 &pcfg_pull_up>;
+			};
+		};
+
+		sdmmc {
+			sdmmc_clk: sdmmc-clk {
+				rockchip,pins =
+					<4 RK_PD5 1 &pcfg_pull_none_4ma>;
+			};
+
+			sdmmc_cmd: sdmmc-cmd {
+				rockchip,pins =
+					<4 RK_PD4 1 &pcfg_pull_up_4ma>;
+			};
+
+			sdmmc_pwren: sdmmc-pwren {
+				rockchip,pins =
+					<4 RK_PD6 1 &pcfg_pull_none_4ma>;
+			};
+
+			sdmmc_bus1: sdmmc-bus1 {
+				rockchip,pins =
+					<4 RK_PD0 1 &pcfg_pull_up_4ma>;
+			};
+
+			sdmmc_bus4: sdmmc-bus4 {
+				rockchip,pins =
+					<4 RK_PD0 1 &pcfg_pull_up_4ma>,
+					<4 RK_PD1 1 &pcfg_pull_up_4ma>,
+					<4 RK_PD2 1 &pcfg_pull_up_4ma>,
+					<4 RK_PD3 1 &pcfg_pull_up_4ma>;
+			};
+
+			sdmmc_gpio: sdmmc-gpio {
+				rockchip,pins =
+					<4 RK_PD0 0 &pcfg_pull_up_4ma>,
+					<4 RK_PD1 0 &pcfg_pull_up_4ma>,
+					<4 RK_PD2 0 &pcfg_pull_up_4ma>,
+					<4 RK_PD3 0 &pcfg_pull_up_4ma>,
+					<4 RK_PD4 0 &pcfg_pull_up_4ma>,
+					<4 RK_PD5 0 &pcfg_pull_up_4ma>,
+					<4 RK_PD6 0 &pcfg_pull_up_4ma>;
+			};
+		};
+
+		sdio {
+			sdio_clk: sdio-clk {
+				rockchip,pins =
+					<4 RK_PA5 1 &pcfg_pull_none_8ma>;
+			};
+
+			sdio_cmd: sdio-cmd {
+				rockchip,pins =
+					<4 RK_PA4 1 &pcfg_pull_up_8ma>;
+			};
+
+			sdio_pwren: sdio-pwren {
+				rockchip,pins =
+					<0 RK_PA2 1 &pcfg_pull_none_8ma>;
+			};
+
+			sdio_wrpt: sdio-wrpt {
+				rockchip,pins =
+					<0 RK_PA1 1 &pcfg_pull_none_8ma>;
+			};
+
+			sdio_intn: sdio-intn {
+				rockchip,pins =
+					<0 RK_PA0 1 &pcfg_pull_none_8ma>;
+			};
+
+			sdio_bus1: sdio-bus1 {
+				rockchip,pins =
+					<4 RK_PA0 1 &pcfg_pull_up_8ma>;
+			};
+
+			sdio_bus4: sdio-bus4 {
+				rockchip,pins =
+					<4 RK_PA0 1 &pcfg_pull_up_8ma>,
+					<4 RK_PA1 1 &pcfg_pull_up_8ma>,
+					<4 RK_PA2 1 &pcfg_pull_up_8ma>,
+					<4 RK_PA3 1 &pcfg_pull_up_8ma>;
+			};
+
+			sdio_gpio: sdio-gpio {
+				rockchip,pins =
+					<4 RK_PA0 0 &pcfg_pull_up_4ma>,
+					<4 RK_PA1 0 &pcfg_pull_up_4ma>,
+					<4 RK_PA2 0 &pcfg_pull_up_4ma>,
+					<4 RK_PA3 0 &pcfg_pull_up_4ma>,
+					<4 RK_PA4 0 &pcfg_pull_up_4ma>,
+					<4 RK_PA5 0 &pcfg_pull_up_4ma>;
+			};
+		};
+
+		emmc {
+			emmc_clk: emmc-clk {
+				rockchip,pins =
+					<3 RK_PB1 2 &pcfg_pull_none_8ma>;
+			};
+
+			emmc_cmd: emmc-cmd {
+				rockchip,pins =
+					<3 RK_PB0 2 &pcfg_pull_up_8ma>;
+			};
+
+			emmc_pwren: emmc-pwren {
+				rockchip,pins =
+					<3 RK_PB3 2 &pcfg_pull_none>;
+			};
+
+			emmc_rstn: emmc-rstn {
+				rockchip,pins =
+					<3 RK_PB2 2 &pcfg_pull_none>;
+			};
+
+			emmc_bus1: emmc-bus1 {
+				rockchip,pins =
+					<3 RK_PA0 2 &pcfg_pull_up_8ma>;
+			};
+
+			emmc_bus4: emmc-bus4 {
+				rockchip,pins =
+					<3 RK_PA0 2 &pcfg_pull_up_8ma>,
+					<3 RK_PA1 2 &pcfg_pull_up_8ma>,
+					<3 RK_PA2 2 &pcfg_pull_up_8ma>,
+					<3 RK_PA3 2 &pcfg_pull_up_8ma>;
+			};
+
+			emmc_bus8: emmc-bus8 {
+				rockchip,pins =
+					<3 RK_PA0 2 &pcfg_pull_up_8ma>,
+					<3 RK_PA1 2 &pcfg_pull_up_8ma>,
+					<3 RK_PA2 2 &pcfg_pull_up_8ma>,
+					<3 RK_PA3 2 &pcfg_pull_up_8ma>,
+					<3 RK_PA4 2 &pcfg_pull_up_8ma>,
+					<3 RK_PA5 2 &pcfg_pull_up_8ma>,
+					<3 RK_PA6 2 &pcfg_pull_up_8ma>,
+					<3 RK_PA7 2 &pcfg_pull_up_8ma>;
+			};
+		};
+
+		flash {
+			flash_csn0: flash-csn0 {
+				rockchip,pins =
+					<3 RK_PB5 1 &pcfg_pull_none>;
+			};
+
+			flash_rdy: flash-rdy {
+				rockchip,pins =
+					<3 RK_PB4 1 &pcfg_pull_none>;
+			};
+
+			flash_ale: flash-ale {
+				rockchip,pins =
+					<3 RK_PB3 1 &pcfg_pull_none>;
+			};
+
+			flash_cle: flash-cle {
+				rockchip,pins =
+					<3 RK_PB1 1 &pcfg_pull_none>;
+			};
+
+			flash_wrn: flash-wrn {
+				rockchip,pins =
+					<3 RK_PB0 1 &pcfg_pull_none>;
+			};
+
+			flash_rdn: flash-rdn {
+				rockchip,pins =
+					<3 RK_PB2 1 &pcfg_pull_none>;
+			};
+
+			flash_bus8: flash-bus8 {
+				rockchip,pins =
+					<3 RK_PA0 1 &pcfg_pull_up_12ma>,
+					<3 RK_PA1 1 &pcfg_pull_up_12ma>,
+					<3 RK_PA2 1 &pcfg_pull_up_12ma>,
+					<3 RK_PA3 1 &pcfg_pull_up_12ma>,
+					<3 RK_PA4 1 &pcfg_pull_up_12ma>,
+					<3 RK_PA5 1 &pcfg_pull_up_12ma>,
+					<3 RK_PA6 1 &pcfg_pull_up_12ma>,
+					<3 RK_PA7 1 &pcfg_pull_up_12ma>;
+			};
+		};
+
+		pwm0 {
+			pwm0_pin: pwm0-pin {
+				rockchip,pins =
+					<0 RK_PB5 1 &pcfg_pull_none>;
+			};
+		};
+
+		pwm1 {
+			pwm1_pin: pwm1-pin {
+				rockchip,pins =
+					<0 RK_PB6 1 &pcfg_pull_none>;
+			};
+		};
+
+		pwm2 {
+			pwm2_pin: pwm2-pin {
+				rockchip,pins =
+					<0 RK_PB7 1 &pcfg_pull_none>;
+			};
+		};
+
+		pwm3 {
+			pwm3_pin: pwm3-pin {
+				rockchip,pins =
+					<0 RK_PC0 1 &pcfg_pull_none>;
+			};
+		};
+
+		gmac {
+			rmii_pins: rmii-pins {
+				rockchip,pins =
+					/* mac_txen */
+					<1 RK_PC1 3 &pcfg_pull_none_12ma>,
+					/* mac_txd1 */
+					<1 RK_PC3 3 &pcfg_pull_none_12ma>,
+					/* mac_txd0 */
+					<1 RK_PC2 3 &pcfg_pull_none_12ma>,
+					/* mac_rxd0 */
+					<1 RK_PC4 3 &pcfg_pull_none>,
+					/* mac_rxd1 */
+					<1 RK_PC5 3 &pcfg_pull_none>,
+					/* mac_rxer */
+					<1 RK_PB7 3 &pcfg_pull_none>,
+					/* mac_rxdv */
+					<1 RK_PC0 3 &pcfg_pull_none>,
+					/* mac_mdio */
+					<1 RK_PB6 3 &pcfg_pull_none>,
+					/* mac_mdc */
+					<1 RK_PB5 3 &pcfg_pull_none>,
+					/* mac_clk */
+					<1 RK_PB4 3 &pcfg_pull_none>;
+			};
+		};
+	};
+};

commit 54d254fe97494da68cc03670ca2ea7e030b90775
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Wed Feb 28 14:11:38 2018 +0800

    clk: rockchip: add clk driver for rk3308
    
    Add basic clock for px30 which including cpu, bus, emmc, i2c,
    spi, pwm, saradc clock init.
    
    Change-Id: Idd8542d7833e4997378bce99e0a464d5d16890fd
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
index aeee9cea92..ee6204a4c5 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
@@ -11,24 +11,35 @@
 #define MHz		1000000
 #define OSC_HZ		(24 * MHz)
 
-#define APLL_HZ		(816 * MHz)
-#define GPLL_HZ		(600 * MHz)
-#define CPLL_HZ		(594 * MHz)
-
-#define CORE_PERI_HZ	204000000
 #define CORE_ACLK_HZ	408000000
+#define CORE_DBG_HZ	204000000
+
+#define BUS_ACLK_HZ	200000000
+#define BUS_HCLK_HZ	100000000
+#define BUS_PCLK_HZ	100000000
 
-#define BUS_ACLK_HZ	148500000
-#define BUS_HCLK_HZ	148500000
-#define BUS_PCLK_HZ	74250000
+#define PERI_ACLK_HZ	200000000
+#define PERI_HCLK_HZ	100000000
+#define PERI_PCLK_HZ	100000000
 
-#define PERI_ACLK_HZ	148500000
-#define PERI_HCLK_HZ	148500000
-#define PERI_PCLK_HZ	74250000
+#define AUDIO_HCLK_HZ	100000000
+#define AUDIO_PCLK_HZ	100000000
 
-enum apll_frequencies {
-	APLL_816_MHZ,
-	APLL_600_MHZ,
+/* RK3308 pll id */
+enum rk3308_pll_id {
+	APLL,
+	DPLL,
+	VPLL0,
+	VPLL1,
+	PLL_COUNT,
+};
+
+struct pll_div {
+	u32 refdiv;
+	u32 fbdiv;
+	u32 postdiv1;
+	u32 postdiv2;
+	u32 frac;
 };
 
 /* Private data for the clock driver - used by rockchip_get_cru() */
@@ -76,6 +87,145 @@ struct rk3308_cru {
 	unsigned int sdio_con[2];
 	unsigned int emmc_con[2];
 };
+
+enum {
+	/* PLLCON0*/
+	PLL_BP_SHIFT		= 15,
+	PLL_POSTDIV1_SHIFT	= 12,
+	PLL_POSTDIV1_MASK	= 7 << PLL_POSTDIV1_SHIFT,
+	PLL_FBDIV_SHIFT		= 0,
+	PLL_FBDIV_MASK		= 0xfff,
+
+	/* PLLCON1 */
+	PLL_PDSEL_SHIFT		= 15,
+	PLL_PD1_SHIFT		= 14,
+	PLL_PD_SHIFT		= 13,
+	PLL_PD_MASK		= 1 << PLL_PD_SHIFT,
+	PLL_DSMPD_SHIFT		= 12,
+	PLL_DSMPD_MASK		= 1 << PLL_DSMPD_SHIFT,
+	PLL_LOCK_STATUS_SHIFT	= 10,
+	PLL_LOCK_STATUS_MASK	= 1 << PLL_LOCK_STATUS_SHIFT,
+	PLL_POSTDIV2_SHIFT	= 6,
+	PLL_POSTDIV2_MASK	= 7 << PLL_POSTDIV2_SHIFT,
+	PLL_REFDIV_SHIFT	= 0,
+	PLL_REFDIV_MASK		= 0x3f,
+
+	/* PLLCON2 */
+	PLL_FOUT4PHASEPD_SHIFT	= 27,
+	PLL_FOUTVCOPD_SHIFT	= 26,
+	PLL_FOUTPOSTDIVPD_SHIFT	= 25,
+	PLL_DACPD_SHIFT		= 24,
+	PLL_FRAC_DIV	= 0xffffff,
+
+	/* CRU_MODE */
+	PLLMUX_FROM_XIN24M	= 0,
+	PLLMUX_FROM_PLL,
+	PLLMUX_FROM_RTC32K,
+	USBPHY480M_MODE_SHIFT	= 8,
+	USBPHY480M_MODE_MASK	= 3 << USBPHY480M_MODE_SHIFT,
+	VPLL1_MODE_SHIFT		= 6,
+	VPLL1_MODE_MASK		= 3 << VPLL1_MODE_SHIFT,
+	VPLL0_MODE_SHIFT		= 4,
+	VPLL0_MODE_MASK		= 3 << VPLL0_MODE_SHIFT,
+	DPLL_MODE_SHIFT		= 2,
+	DPLL_MODE_MASK		= 3 << DPLL_MODE_SHIFT,
+	APLL_MODE_SHIFT		= 0,
+	APLL_MODE_MASK		= 3 << APLL_MODE_SHIFT,
+
+	/* CRU_CLK_SEL0_CON */
+	CORE_ACLK_DIV_SHIFT	= 12,
+	CORE_ACLK_DIV_MASK	= 0x7 << CORE_ACLK_DIV_SHIFT,
+	CORE_DBG_DIV_SHIFT	= 8,
+	CORE_DBG_DIV_MASK	= 0xf << CORE_DBG_DIV_SHIFT,
+	CORE_CLK_PLL_SEL_SHIFT	= 6,
+	CORE_CLK_PLL_SEL_MASK	= 0x3 << CORE_CLK_PLL_SEL_SHIFT,
+	CORE_CLK_PLL_SEL_APLL	= 0,
+	CORE_CLK_PLL_SEL_VPLL0,
+	CORE_CLK_PLL_SEL_VPLL1,
+	CORE_DIV_CON_SHIFT	= 0,
+	CORE_DIV_CON_MASK	= 0x0f << CORE_DIV_CON_SHIFT,
+
+	/* CRU_CLK_SEL5_CON */
+	BUS_PLL_SEL_SHIFT	= 6,
+	BUS_PLL_SEL_MASK	= 0x3 << BUS_PLL_SEL_SHIFT,
+	BUS_PLL_SEL_DPLL	= 0,
+	BUS_PLL_SEL_VPLL0,
+	BUS_PLL_SEL_VPLL1,
+	BUS_ACLK_DIV_SHIFT	= 0,
+	BUS_ACLK_DIV_MASK	= 0x1f << BUS_ACLK_DIV_SHIFT,
+
+	/* CRU_CLK_SEL6_CON */
+	BUS_PCLK_DIV_SHIFT	= 8,
+	BUS_PCLK_DIV_MASK	= 0x1f << BUS_PCLK_DIV_SHIFT,
+	BUS_HCLK_DIV_SHIFT	= 0,
+	BUS_HCLK_DIV_MASK	= 0x1f << BUS_HCLK_DIV_SHIFT,
+
+	/* CRU_CLK_SEL25_CON */
+	/* CRU_CLK_SEL26_CON */
+	/* CRU_CLK_SEL27_CON */
+	/* CRU_CLK_SEL28_CON */
+	CLK_I2C_PLL_SEL_SHIFT		= 14,
+	CLK_I2C_PLL_SEL_MASK		= 0x3 << CLK_I2C_PLL_SEL_SHIFT,
+	CLK_I2C_PLL_SEL_DPLL		= 0,
+	CLK_I2C_PLL_SEL_VPLL0,
+	CLK_I2C_PLL_SEL_24M,
+	CLK_I2C_DIV_CON_SHIFT		= 0,
+	CLK_I2C_DIV_CON_MASK		= 0x7f << CLK_I2C_DIV_CON_SHIFT,
+
+	/* CRU_CLK_SEL29_CON */
+	CLK_PWM_PLL_SEL_SHIFT		= 14,
+	CLK_PWM_PLL_SEL_MASK		= 0x3 << CLK_PWM_PLL_SEL_SHIFT,
+	CLK_PWM_PLL_SEL_DPLL		= 0,
+	CLK_PWM_PLL_SEL_VPLL0,
+	CLK_PWM_PLL_SEL_24M,
+	CLK_PWM_DIV_CON_SHIFT		= 0,
+	CLK_PWM_DIV_CON_MASK		= 0x7f << CLK_PWM_DIV_CON_SHIFT,
+
+	/* CRU_CLK_SEL30_CON */
+	/* CRU_CLK_SEL31_CON */
+	/* CRU_CLK_SEL32_CON */
+	CLK_SPI_PLL_SEL_SHIFT		= 14,
+	CLK_SPI_PLL_SEL_MASK		= 0x3 << CLK_SPI_PLL_SEL_SHIFT,
+	CLK_SPI_PLL_SEL_DPLL		= 0,
+	CLK_SPI_PLL_SEL_VPLL0,
+	CLK_SPI_PLL_SEL_24M,
+	CLK_SPI_DIV_CON_SHIFT		= 0,
+	CLK_SPI_DIV_CON_MASK		= 0x7f << CLK_SPI_DIV_CON_SHIFT,
+
+	/* CRU_CLK_SEL34_CON */
+	CLK_SARADC_DIV_CON_SHIFT	= 0,
+	CLK_SARADC_DIV_CON_MASK		= 0x7ff << CLK_SARADC_DIV_CON_SHIFT,
+
+	/* CRU_CLK_SEL36_CON */
+	PERI_PLL_SEL_SHIFT	= 6,
+	PERI_PLL_SEL_MASK	= 0x3 << PERI_PLL_SEL_SHIFT,
+	PERI_PLL_DPLL		= 0,
+	PERI_PLL_VPLL0,
+	PERI_PLL_VPLL1,
+	PERI_ACLK_DIV_SHIFT	= 0,
+	PERI_ACLK_DIV_MASK	= 0x1f << PERI_ACLK_DIV_SHIFT,
+
+	/* CRU_CLK_SEL37_CON */
+	PERI_PCLK_DIV_SHIFT	= 8,
+	PERI_PCLK_DIV_MASK	= 0x1f << PERI_PCLK_DIV_SHIFT,
+	PERI_HCLK_DIV_SHIFT	= 0,
+	PERI_HCLK_DIV_MASK	= 0x1f << PERI_HCLK_DIV_SHIFT,
+
+	/* CRU_CLKSEL41_CON */
+	EMMC_CLK_SEL_SHIFT	= 15,
+	EMMC_CLK_SEL_MASK	= 1 << EMMC_CLK_SEL_SHIFT,
+	EMMC_CLK_SEL_EMMC	= 0,
+	EMMC_CLK_SEL_EMMC_DIV50,
+	EMMC_PLL_SHIFT		= 8,
+	EMMC_PLL_MASK		= 0x3 << EMMC_PLL_SHIFT,
+	EMMC_SEL_DPLL		= 0,
+	EMMC_SEL_VPLL0,
+	EMMC_SEL_VPLL1,
+	EMMC_SEL_24M,
+	EMMC_DIV_SHIFT		= 0,
+	EMMC_DIV_MASK		= 0xff << EMMC_DIV_SHIFT,
+};
+
 check_member(rk3308_cru, emmc_con[1], 0x494);
 
 #endif
diff --git a/drivers/clk/rockchip/Makefile b/drivers/clk/rockchip/Makefile
index 62d318cade..4091abc09b 100644
--- a/drivers/clk/rockchip/Makefile
+++ b/drivers/clk/rockchip/Makefile
@@ -11,6 +11,7 @@ obj-$(CONFIG_ROCKCHIP_RK3128) += clk_rk3128.o
 obj-$(CONFIG_ROCKCHIP_RK3188) += clk_rk3188.o
 obj-$(CONFIG_ROCKCHIP_RK322X) += clk_rk322x.o
 obj-$(CONFIG_ROCKCHIP_RK3288) += clk_rk3288.o
+obj-$(CONFIG_ROCKCHIP_RK3308) += clk_rk3308.o
 obj-$(CONFIG_ROCKCHIP_RK3328) += clk_rk3328.o
 obj-$(CONFIG_ROCKCHIP_RK3368) += clk_rk3368.o
 obj-$(CONFIG_ROCKCHIP_RK3399) += clk_rk3399.o
diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
new file mode 100644
index 0000000000..74e03e66ef
--- /dev/null
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -0,0 +1,716 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+#define DEBUG
+#include <common.h>
+#include <bitfield.h>
+#include <clk-uclass.h>
+#include <dm.h>
+#include <errno.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk3308.h>
+#include <asm/arch/hardware.h>
+#include <asm/io.h>
+#include <dm/lists.h>
+#include <dt-bindings/clock/rk3308-cru.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+enum {
+	VCO_MAX_HZ	= 3200U * 1000000,
+	VCO_MIN_HZ	= 800 * 1000000,
+	OUTPUT_MAX_HZ	= 3200U * 1000000,
+	OUTPUT_MIN_HZ	= 24 * 1000000,
+};
+
+#define DIV_TO_RATE(input_rate, div)    ((input_rate) / ((div) + 1))
+
+#define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\
+	.refdiv = _refdiv,\
+	.fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ),\
+	.postdiv1 = _postdiv1, .postdiv2 = _postdiv2};
+
+static const struct pll_div apll_816_cfg = PLL_DIVISORS(816 * MHz, 1, 2, 1);
+
+static u8 pll_mode_shift[PLL_COUNT] = {
+	APLL_MODE_SHIFT, DPLL_MODE_SHIFT, VPLL0_MODE_SHIFT,
+	VPLL1_MODE_SHIFT
+};
+
+static u32 pll_mode_mask[PLL_COUNT] = {
+	APLL_MODE_MASK, DPLL_MODE_MASK, VPLL0_MODE_MASK,
+	VPLL1_MODE_MASK
+};
+
+static ulong apll_hz, dpll_hz, vpll0_hz;
+
+/*
+ * How to calculate the PLL:
+ * Formulas also embedded within the Fractional PLL Verilog model:
+ * If DSMPD = 1 (DSM is disabled, "integer mode")
+ * FOUTVCO = FREF / REFDIV * FBDIV
+ * FOUTPOSTDIV = FOUTVCO / POSTDIV1 / POSTDIV2
+ * Where:
+ * FOUTVCO = Fractional PLL non-divided output frequency
+ * FOUTPOSTDIV = Fractional PLL divided output frequency
+ *               (output of second post divider)
+ * FREF = Fractional PLL input reference frequency, (the OSC_HZ 24MHz input)
+ * REFDIV = Fractional PLL input reference clock divider
+ * FBDIV = Integer value programmed into feedback divide
+ *
+ */
+
+static void rkclk_set_pll(struct rk3308_cru *cru, enum rk3308_pll_id pll_id,
+			  const struct pll_div *div)
+{
+	struct rk3308_pll *pll;
+	unsigned int *mode;
+	/* All PLLs have same VCO and output frequency range restrictions. */
+	uint vco_hz = OSC_HZ / 1000 * div->fbdiv / div->refdiv * 1000;
+	uint output_hz = vco_hz / div->postdiv1 / div->postdiv2;
+
+	pll = &cru->pll[pll_id];
+	mode = &cru->mode;
+
+	debug("PLL at %p: fb=%d, ref=%d, pst1=%d, pst2=%d, vco=%u Hz, output=%u Hz\n",
+	      pll, div->fbdiv, div->refdiv, div->postdiv1,
+	      div->postdiv2, vco_hz, output_hz);
+	assert(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ &&
+	       output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ);
+
+	/*
+	 * When power on or changing PLL setting,
+	 * we must force PLL into slow mode to ensure output stable clock.
+	 */
+	rk_clrsetreg(mode, pll_mode_mask[pll_id],
+		     PLLMUX_FROM_XIN24M << pll_mode_shift[pll_id]);
+
+	/* use integer mode */
+	rk_setreg(&pll->con1, 1 << PLL_DSMPD_SHIFT);
+	/* Power down */
+	rk_setreg(&pll->con1, 1 << PLL_PD_SHIFT);
+
+	rk_clrsetreg(&pll->con0,
+		     PLL_POSTDIV1_MASK | PLL_FBDIV_MASK,
+		     (div->postdiv1 << PLL_POSTDIV1_SHIFT) | div->fbdiv);
+	rk_clrsetreg(&pll->con1, PLL_POSTDIV2_MASK | PLL_REFDIV_MASK,
+		     (div->postdiv2 << PLL_POSTDIV2_SHIFT |
+		     div->refdiv << PLL_REFDIV_SHIFT));
+
+	/* Power Up */
+	rk_clrreg(&pll->con1, 1 << PLL_PD_SHIFT);
+
+	/* waiting for pll lock */
+	while (!(readl(&pll->con1) & (1 << PLL_LOCK_STATUS_SHIFT)))
+		udelay(1);
+
+	rk_clrsetreg(mode, pll_mode_mask[pll_id],
+		     PLLMUX_FROM_PLL << pll_mode_shift[pll_id]);
+}
+
+static uint32_t rkclk_pll_get_rate(struct rk3308_cru *cru,
+				   enum rk3308_pll_id pll_id)
+{
+	u32 refdiv, fbdiv, postdiv1, postdiv2;
+	u32 con;
+	struct rk3308_pll *pll;
+	uint shift;
+	uint mask;
+
+	pll = &cru->pll[pll_id];
+	con = readl(&cru->mode);
+
+	shift = pll_mode_shift[pll_id];
+	mask = pll_mode_mask[pll_id];
+
+	switch ((con & mask) >> shift) {
+	case PLLMUX_FROM_XIN24M:
+		return OSC_HZ;
+	case PLLMUX_FROM_PLL:
+		/* normal mode */
+		con = readl(&pll->con0);
+		postdiv1 = (con & PLL_POSTDIV1_MASK) >> PLL_POSTDIV1_SHIFT;
+		fbdiv = (con & PLL_FBDIV_MASK) >> PLL_FBDIV_SHIFT;
+		con = readl(&pll->con1);
+		postdiv2 = (con & PLL_POSTDIV2_MASK) >> PLL_POSTDIV2_SHIFT;
+		refdiv = (con & PLL_REFDIV_MASK) >> PLL_REFDIV_SHIFT;
+		return (24 * fbdiv / (refdiv * postdiv1 * postdiv2)) * 1000000;
+	case PLLMUX_FROM_RTC32K:
+	default:
+		return 32768;
+	}
+}
+
+static void rkclk_init(struct rk3308_cru *cru)
+{
+	u32 aclk_div, hclk_div, pclk_div;
+
+	/* init pll */
+	rkclk_set_pll(cru, APLL, &apll_816_cfg);
+
+	/*
+	 * select apll as cpu/core clock pll source and
+	 * set up dependent divisors for PCLK and ACLK clocks.
+	 * core hz : apll = 1:1
+	 */
+	apll_hz = rkclk_pll_get_rate(cru, DPLL);
+	aclk_div = apll_hz / CORE_ACLK_HZ - 1;
+	pclk_div = apll_hz / CORE_DBG_HZ - 1;
+	rk_clrsetreg(&cru->clksel_con[0],
+		     CORE_ACLK_DIV_MASK | CORE_DBG_DIV_MASK |
+		     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK,
+		     aclk_div << CORE_ACLK_DIV_SHIFT |
+		     pclk_div << CORE_DIV_CON_SHIFT |
+		     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
+		     0 << CORE_DIV_CON_SHIFT);
+
+	/*
+	 * select dpll as pd_bus bus clock source and
+	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
+	 */
+	dpll_hz = rkclk_pll_get_rate(cru, DPLL);
+	aclk_div = dpll_hz / BUS_ACLK_HZ - 1;
+	hclk_div = dpll_hz / BUS_HCLK_HZ - 1;
+	pclk_div = dpll_hz / BUS_PCLK_HZ - 1;
+	rk_clrsetreg(&cru->clksel_con[5],
+		     BUS_PLL_SEL_MASK | BUS_ACLK_DIV_MASK,
+		     BUS_PLL_SEL_DPLL << BUS_PLL_SEL_SHIFT |
+		     aclk_div << BUS_ACLK_DIV_SHIFT);
+	rk_clrsetreg(&cru->clksel_con[6],
+		     BUS_PCLK_DIV_MASK | BUS_HCLK_DIV_MASK,
+		     pclk_div << BUS_PCLK_DIV_SHIFT |
+		     hclk_div << BUS_HCLK_DIV_SHIFT);
+
+	/*
+	 * select vpll0 as pd_peri bus clock source and
+	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
+	 */
+	vpll0_hz = rkclk_pll_get_rate(cru, VPLL0);
+	aclk_div = vpll0_hz / PERI_ACLK_HZ - 1;
+	hclk_div = vpll0_hz / PERI_HCLK_HZ - 1;
+	pclk_div = vpll0_hz / PERI_PCLK_HZ - 1;
+	rk_clrsetreg(&cru->clksel_con[36],
+		     PERI_PLL_SEL_MASK | PERI_ACLK_DIV_MASK,
+		     PERI_PLL_VPLL0 << PERI_PLL_SEL_SHIFT |
+		     aclk_div << PERI_ACLK_DIV_SHIFT);
+	rk_clrsetreg(&cru->clksel_con[37],
+		     PERI_PCLK_DIV_MASK | PERI_HCLK_DIV_MASK,
+		     pclk_div << PERI_PCLK_DIV_SHIFT |
+		     hclk_div << PERI_HCLK_DIV_SHIFT);
+}
+
+static ulong rk3308_i2c_get_clk(struct rk3308_cru *cru, ulong clk_id)
+{
+	u32 div, con, con_id;
+
+	switch (clk_id) {
+	case SCLK_I2C0:
+		con_id = 25;
+		break;
+	case SCLK_I2C1:
+		con_id = 26;
+		break;
+	case SCLK_I2C2:
+		con_id = 27;
+		break;
+	case SCLK_I2C3:
+		con_id = 28;
+		break;
+	default:
+		printf("do not support this i2c bus\n");
+		return -EINVAL;
+	}
+
+	con = readl(&cru->clksel_con[con_id]);
+	div = con >> CLK_I2C_DIV_CON_SHIFT & CLK_I2C_DIV_CON_MASK;
+
+	return DIV_TO_RATE(dpll_hz, div);
+}
+
+static ulong rk3308_i2c_set_clk(struct rk3308_cru *cru, ulong clk_id, uint hz)
+{
+	u32 src_clk_div, con_id;
+
+	src_clk_div = dpll_hz / hz;
+	assert(src_clk_div - 1 < 127);
+
+	switch (clk_id) {
+	case SCLK_I2C0:
+		con_id = 25;
+		break;
+	case SCLK_I2C1:
+		con_id = 26;
+		break;
+	case SCLK_I2C2:
+		con_id = 27;
+		break;
+	case SCLK_I2C3:
+		con_id = 28;
+		break;
+	default:
+		printf("do not support this i2c bus\n");
+		return -EINVAL;
+	}
+	rk_clrsetreg(&cru->clksel_con[con_id],
+		     CLK_I2C_PLL_SEL_MASK | CLK_I2C_DIV_CON_MASK,
+		     CLK_I2C_PLL_SEL_DPLL << CLK_I2C_PLL_SEL_SHIFT |
+		     (src_clk_div - 1) << CLK_I2C_DIV_CON_SHIFT);
+
+	return rk3308_i2c_get_clk(cru, clk_id);
+}
+
+static ulong rk3308_mmc_get_clk(struct rk3308_cru *cru, uint clk_id)
+{
+	u32 div, con, con_id;
+
+	switch (clk_id) {
+	case HCLK_SDMMC:
+	case SCLK_SDMMC:
+		con_id = 39;
+		break;
+	case HCLK_EMMC:
+	case SCLK_EMMC:
+	case SCLK_EMMC_SAMPLE:
+		con_id = 41;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	con = readl(&cru->clksel_con[con_id]);
+	div = (con & EMMC_DIV_MASK) >> EMMC_DIV_SHIFT;
+
+	if ((con & EMMC_PLL_MASK) >> EMMC_PLL_SHIFT
+	    == EMMC_SEL_24M)
+		return DIV_TO_RATE(OSC_HZ, div) / 2;
+	else
+		return DIV_TO_RATE(vpll0_hz, div) / 2;
+}
+
+static ulong rk3308_mmc_set_clk(struct rk3308_cru *cru,
+				ulong clk_id, ulong set_rate)
+{
+	int src_clk_div;
+	u32 con_id;
+
+	debug("%s %ld %ld\n", __func__, clk_id, set_rate);
+
+	switch (clk_id) {
+	case HCLK_SDMMC:
+	case SCLK_SDMMC:
+		con_id = 39;
+		break;
+	case HCLK_EMMC:
+	case SCLK_EMMC:
+		con_id = 41;
+		break;
+	default:
+		return -EINVAL;
+	}
+	/* Select clk_sdmmc/emmc source from VPLL0 by default */
+	/* mmc clock defaulg div 2 internal, need provide double in cru */
+	src_clk_div = DIV_ROUND_UP(vpll0_hz / 2, set_rate);
+
+	if (src_clk_div > 127) {
+		/* use 24MHz source for 400KHz clock */
+		src_clk_div = DIV_ROUND_UP(OSC_HZ / 2, set_rate);
+		rk_clrsetreg(&cru->clksel_con[con_id],
+			     EMMC_PLL_MASK | EMMC_DIV_MASK | EMMC_CLK_SEL_MASK,
+			     EMMC_CLK_SEL_EMMC << EMMC_CLK_SEL_SHIFT |
+			     EMMC_SEL_24M << EMMC_PLL_SHIFT |
+			     (src_clk_div - 1) << EMMC_DIV_SHIFT);
+	} else {
+		rk_clrsetreg(&cru->clksel_con[con_id],
+			     EMMC_PLL_MASK | EMMC_DIV_MASK | EMMC_CLK_SEL_MASK,
+			     EMMC_CLK_SEL_EMMC << EMMC_CLK_SEL_SHIFT |
+			     EMMC_SEL_VPLL0 << EMMC_PLL_SHIFT |
+			     (src_clk_div - 1) << EMMC_DIV_SHIFT);
+	}
+
+	return rk3308_mmc_get_clk(cru, clk_id);
+}
+
+static ulong rk3308_saradc_get_clk(struct rk3308_cru *cru)
+{
+	u32 div, con;
+
+	con = readl(&cru->clksel_con[34]);
+	div = con >> CLK_SARADC_DIV_CON_SHIFT & CLK_SARADC_DIV_CON_MASK;
+
+	return DIV_TO_RATE(OSC_HZ, div);
+}
+
+static ulong rk3308_saradc_set_clk(struct rk3308_cru *cru, uint hz)
+{
+	int src_clk_div;
+
+	src_clk_div = OSC_HZ / hz;
+	assert(src_clk_div - 1 < 2047);
+
+	rk_clrsetreg(&cru->clksel_con[34],
+		     CLK_SARADC_DIV_CON_MASK,
+		     (src_clk_div - 1) << CLK_SARADC_DIV_CON_SHIFT);
+
+	return rk3308_saradc_get_clk(cru);
+}
+
+static ulong rk3308_spi_get_clk(struct rk3308_cru *cru, ulong clk_id)
+{
+	u32 div, con, con_id;
+
+	switch (clk_id) {
+	case SCLK_SPI0:
+		con_id = 30;
+		break;
+	case SCLK_SPI1:
+		con_id = 31;
+		break;
+	case SCLK_SPI2:
+		con_id = 32;
+		break;
+	default:
+		printf("do not support this spi bus\n");
+		return -EINVAL;
+	}
+
+	con = readl(&cru->clksel_con[con_id]);
+	div = con >> CLK_SPI_DIV_CON_SHIFT & CLK_SPI_DIV_CON_MASK;
+
+	return DIV_TO_RATE(dpll_hz, div);
+}
+
+static ulong rk3308_spi_set_clk(struct rk3308_cru *cru, ulong clk_id, uint hz)
+{
+	u32 src_clk_div, con_id;
+
+	src_clk_div = dpll_hz / hz;
+	assert(src_clk_div - 1 < 127);
+
+	switch (clk_id) {
+	case SCLK_SPI0:
+		con_id = 30;
+		break;
+	case SCLK_SPI1:
+		con_id = 31;
+		break;
+	case SCLK_SPI2:
+		con_id = 32;
+		break;
+	default:
+		printf("do not support this spi bus\n");
+		return -EINVAL;
+	}
+
+	rk_clrsetreg(&cru->clksel_con[con_id],
+		     CLK_SPI_PLL_SEL_MASK | CLK_SPI_DIV_CON_MASK,
+		     CLK_SPI_PLL_SEL_DPLL << CLK_SPI_PLL_SEL_SHIFT |
+		     (src_clk_div - 1) << CLK_SPI_DIV_CON_SHIFT);
+
+	return rk3308_spi_get_clk(cru, clk_id);
+}
+
+static ulong rk3308_pwm_get_clk(struct rk3308_cru *cru)
+{
+	u32 div, con;
+
+	con = readl(&cru->clksel_con[29]);
+	div = con >> CLK_PWM_DIV_CON_SHIFT & CLK_PWM_DIV_CON_MASK;
+
+	return DIV_TO_RATE(dpll_hz, div);
+}
+
+static ulong rk3308_pwm_set_clk(struct rk3308_cru *cru, uint hz)
+{
+	int src_clk_div;
+
+	src_clk_div = dpll_hz / hz;
+	assert(src_clk_div - 1 < 127);
+
+	rk_clrsetreg(&cru->clksel_con[29],
+		     CLK_PWM_PLL_SEL_MASK | CLK_PWM_DIV_CON_MASK,
+		     CLK_PWM_PLL_SEL_DPLL << CLK_PWM_PLL_SEL_SHIFT |
+		     (src_clk_div - 1) << CLK_PWM_DIV_CON_SHIFT);
+
+	return rk3308_pwm_get_clk(cru);
+}
+
+static ulong rk3308_clk_get_rate(struct clk *clk)
+{
+	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
+	ulong rate = 0;
+
+	debug("%s id:%ld\n", __func__, clk->id);
+
+	switch (clk->id) {
+	case 0 ... 15:
+		return 0;
+	case HCLK_SDMMC:
+	case HCLK_EMMC:
+	case SCLK_SDMMC:
+	case SCLK_EMMC:
+	case SCLK_EMMC_SAMPLE:
+		rate = rk3308_mmc_get_clk(priv->cru, clk->id);
+		break;
+	case SCLK_I2C0:
+	case SCLK_I2C1:
+	case SCLK_I2C2:
+	case SCLK_I2C3:
+		rate = rk3308_i2c_get_clk(priv->cru, clk->id);
+		break;
+	case SCLK_SARADC:
+		rate = rk3308_saradc_get_clk(priv->cru);
+		break;
+	case SCLK_SPI0:
+	case SCLK_SPI1:
+		rate = rk3308_spi_get_clk(priv->cru, clk->id);
+		break;
+	case SCLK_PWM:
+		rate = rk3308_pwm_get_clk(priv->cru);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return rate;
+}
+
+static ulong rk3308_clk_set_rate(struct clk *clk, ulong rate)
+{
+	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
+	ulong ret = 0;
+
+	debug("%s %ld %ld\n", __func__, clk->id, rate);
+	switch (clk->id) {
+	case 0 ... 15:
+		return 0;
+	case HCLK_SDMMC:
+	case HCLK_EMMC:
+	case SCLK_SDMMC:
+	case SCLK_EMMC:
+		ret = rk3308_mmc_set_clk(priv->cru, clk->id, rate);
+		break;
+	case SCLK_I2C0:
+	case SCLK_I2C1:
+	case SCLK_I2C2:
+	case SCLK_I2C3:
+		ret = rk3308_i2c_set_clk(priv->cru, clk->id, rate);
+		break;
+	case SCLK_SARADC:
+		ret = rk3308_saradc_set_clk(priv->cru, rate);
+		break;
+	case SCLK_SPI0:
+	case SCLK_SPI1:
+		ret = rk3308_spi_set_clk(priv->cru, clk->id, rate);
+		break;
+	case SCLK_PWM:
+		ret = rk3308_pwm_set_clk(priv->cru, rate);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+}
+
+#define ROCKCHIP_MMC_DELAY_SEL		BIT(11)
+#define ROCKCHIP_MMC_DEGREE_OFFSET	1
+#define ROCKCHIP_MMC_DEGREE_MASK	(0x3 << ROCKCHIP_MMC_DEGREE_OFFSET)
+#define ROCKCHIP_MMC_DELAYNUM_OFFSET	3
+#define ROCKCHIP_MMC_DELAYNUM_MASK	(0xff << ROCKCHIP_MMC_DELAYNUM_OFFSET)
+
+#define PSECS_PER_SEC 1000000000000LL
+/*
+ * Each fine delay is between 44ps-77ps. Assume each fine delay is 60ps to
+ * simplify calculations. So 45degs could be anywhere between 33deg and 57.8deg.
+ */
+#define ROCKCHIP_MMC_DELAY_ELEMENT_PSEC 60
+
+int rockchip_mmc_get_phase(struct clk *clk)
+{
+	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3308_cru *cru = priv->cru;
+	u32 raw_value, delay_num;
+	u16 degrees = 0;
+	ulong rate;
+
+	rate = rk3308_clk_get_rate(clk);
+
+	if (rate < 0)
+		return rate;
+
+	if (clk->id == SCLK_EMMC_SAMPLE)
+		raw_value = readl(&cru->emmc_con[1]);
+	else
+		raw_value = readl(&cru->sdmmc_con[1]);
+
+	raw_value &= ROCKCHIP_MMC_DEGREE_MASK;
+	degrees = (raw_value >>  ROCKCHIP_MMC_DEGREE_OFFSET) * 90;
+
+	if (raw_value & ROCKCHIP_MMC_DELAY_SEL) {
+		/* degrees/delaynum * 10000 */
+		unsigned long factor = (ROCKCHIP_MMC_DELAY_ELEMENT_PSEC / 10) *
+					36 * (rate / 1000000);
+
+		delay_num = (raw_value & ROCKCHIP_MMC_DELAYNUM_MASK);
+		delay_num >>= ROCKCHIP_MMC_DELAYNUM_OFFSET;
+		degrees += DIV_ROUND_CLOSEST(delay_num * factor, 10000);
+	}
+
+	return degrees % 360;
+
+}
+
+int rockchip_mmc_set_phase(struct clk *clk, u32 degrees)
+{
+	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3308_cru *cru = priv->cru;
+	u8 nineties, remainder, delay_num;
+	u32 raw_value, delay;
+	ulong rate;
+
+	rate = rk3308_clk_get_rate(clk);
+
+	if (rate < 0)
+		return rate;
+
+	nineties = degrees / 90;
+	remainder = (degrees % 90);
+
+	/*
+	 * Convert to delay; do a little extra work to make sure we
+	 * don't overflow 32-bit / 64-bit numbers.
+	 */
+	delay = 10000000; /* PSECS_PER_SEC / 10000 / 10 */
+	delay *= remainder;
+	delay = DIV_ROUND_CLOSEST(delay, (rate / 1000) * 36 *
+				(ROCKCHIP_MMC_DELAY_ELEMENT_PSEC / 10));
+
+	delay_num = (u8)min_t(u32, delay, 255);
+
+	raw_value = delay_num ? ROCKCHIP_MMC_DELAY_SEL : 0;
+	raw_value |= delay_num << ROCKCHIP_MMC_DELAYNUM_OFFSET;
+	raw_value |= nineties << ROCKCHIP_MMC_DEGREE_OFFSET;
+
+	if (clk->id == SCLK_EMMC_SAMPLE)
+		writel(raw_value | 0xffff0000, &cru->emmc_con[1]);
+	else
+		writel(raw_value | 0xffff0000, &cru->sdmmc_con[1]);
+
+	debug("mmc set_phase(%d) delay_nums=%u reg=%#x actual_degrees=%d\n",
+	      degrees, delay_num, raw_value, rockchip_mmc_get_phase(clk));
+
+	return 0;
+
+}
+
+static int rk3308_clk_get_phase(struct clk *clk)
+{
+	int ret;
+
+	switch (clk->id) {
+	case SCLK_EMMC_SAMPLE:
+	case SCLK_SDMMC_SAMPLE:
+		ret = rockchip_mmc_get_phase(clk);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+}
+
+static int rk3308_clk_set_phase(struct clk *clk, int degrees)
+{
+	int ret;
+
+	switch (clk->id) {
+	case SCLK_EMMC_SAMPLE:
+	case SCLK_SDMMC_SAMPLE:
+		ret = rockchip_mmc_set_phase(clk, degrees);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+}
+
+static struct clk_ops rk3308_clk_ops = {
+	.get_rate = rk3308_clk_get_rate,
+	.set_rate = rk3308_clk_set_rate,
+	.get_phase	= rk3308_clk_get_phase,
+	.set_phase	= rk3308_clk_set_phase,
+};
+
+static int rk3308_clk_probe(struct udevice *dev)
+{
+	struct rk3308_clk_priv *priv = dev_get_priv(dev);
+
+	rkclk_init(priv->cru);
+
+	return 0;
+}
+
+static int rk3308_clk_ofdata_to_platdata(struct udevice *dev)
+{
+	struct rk3308_clk_priv *priv = dev_get_priv(dev);
+
+	priv->cru = dev_read_addr_ptr(dev);
+
+	return 0;
+}
+
+static int rk3308_clk_bind(struct udevice *dev)
+{
+	int ret;
+	struct udevice *sys_child, *sf_child;
+	struct sysreset_reg *priv;
+	struct softreset_reg *sf_priv;
+
+	/* The reset driver does not have a device node, so bind it here */
+	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
+				 &sys_child);
+	if (ret) {
+		debug("Warning: No sysreset driver: ret=%d\n", ret);
+	} else {
+		priv = malloc(sizeof(struct sysreset_reg));
+		priv->glb_srst_fst_value = offsetof(struct rk3308_cru,
+						    glb_srst_fst);
+		priv->glb_srst_snd_value = offsetof(struct rk3308_cru,
+						    glb_srst_snd);
+		sys_child->priv = priv;
+	}
+
+	ret = device_bind_driver_to_node(dev, "rockchip_reset", "reset",
+					 dev_ofnode(dev), &sf_child);
+	if (ret) {
+		debug("Warning: No rockchip reset driver: ret=%d\n", ret);
+	} else {
+		sf_priv = malloc(sizeof(struct softreset_reg));
+		sf_priv->sf_reset_offset = offsetof(struct rk3308_cru,
+						    softrst_con[0]);
+		sf_priv->sf_reset_num = 12;
+		sf_child->priv = sf_priv;
+	}
+
+	return 0;
+}
+
+static const struct udevice_id rk3308_clk_ids[] = {
+	{ .compatible = "rockchip,rk3308-cru" },
+	{ }
+};
+
+U_BOOT_DRIVER(rockchip_rk3308_cru) = {
+	.name		= "rockchip_rk3308_cru",
+	.id		= UCLASS_CLK,
+	.of_match	= rk3308_clk_ids,
+	.priv_auto_alloc_size = sizeof(struct rk3308_clk_priv),
+	.ofdata_to_platdata = rk3308_clk_ofdata_to_platdata,
+	.ops		= &rk3308_clk_ops,
+	.bind		= rk3308_clk_bind,
+	.probe		= rk3308_clk_probe,
+};
diff --git a/include/dt-bindings/clock/rk3308-cru.h b/include/dt-bindings/clock/rk3308-cru.h
new file mode 100644
index 0000000000..1346a6929b
--- /dev/null
+++ b/include/dt-bindings/clock/rk3308-cru.h
@@ -0,0 +1,362 @@
+/*
+ * Copyright (c) 2017 Rockchip Electronics Co. Ltd.
+ * Author: Finley Xiao <finley.xiao@rock-chips.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3308_H
+#define _DT_BINDINGS_CLK_ROCKCHIP_RK3308_H
+
+/* core clocks */
+#define PLL_APLL		1
+#define PLL_DPLL		2
+#define PLL_VPLL0		3
+#define PLL_VPLL1		4
+#define ARMCLK			5
+
+/* sclk (special clocks) */
+#define USB480M			14
+#define SCLK_RTC32K		15
+#define SCLK_PVTM_CORE		16
+#define SCLK_UART0		17
+#define SCLK_UART1		18
+#define SCLK_UART2		19
+#define SCLK_UART3		20
+#define SCLK_UART4		21
+#define SCLK_I2C0		22
+#define SCLK_I2C1		23
+#define SCLK_I2C2		24
+#define SCLK_I2C3		25
+#define SCLK_PWM		26
+#define SCLK_SPI0		27
+#define SCLK_SPI1		28
+#define SCLK_SPI2		29
+#define SCLK_TIMER0		30
+#define SCLK_TIMER1		31
+#define SCLK_TIMER2		32
+#define SCLK_TIMER3		33
+#define SCLK_TIMER4		34
+#define SCLK_TIMER5		35
+#define SCLK_TSADC		36
+#define SCLK_SARADC		37
+#define SCLK_OTP		38
+#define SCLK_OTP_USR		39
+#define SCLK_CPU_BOOST		40
+#define SCLK_CRYPTO		41
+#define SCLK_CRYPTO_APK		42
+#define SCLK_NANDC_DIV		43
+#define SCLK_NANDC_DIV50	44
+#define SCLK_NANDC		45
+#define SCLK_SDMMC_DIV		46
+#define SCLK_SDMMC_DIV50	47
+#define SCLK_SDMMC		48
+#define SCLK_SDMMC_DRV		49
+#define SCLK_SDMMC_SAMPLE	50
+#define SCLK_SDIO_DIV		51
+#define SCLK_SDIO_DIV50		52
+#define SCLK_SDIO		53
+#define SCLK_SDIO_DRV		54
+#define SCLK_SDIO_SAMPLE	55
+#define SCLK_EMMC_DIV		56
+#define SCLK_EMMC_DIV50		57
+#define SCLK_EMMC		58
+#define SCLK_EMMC_DRV		59
+#define SCLK_EMMC_SAMPLE	60
+#define SCLK_SFC		61
+#define SCLK_OTG_ADP		62
+#define SCLK_GMAC_SRC		63
+#define SCLK_GMAC		64
+#define SCLK_MAC_REF		65
+#define SCLK_GMAC_RX_TX		66
+#define SCLK_GMAC_RMII		67
+#define SCLK_DDR_MON_TIMER	68
+#define SCLK_DDR_MON		69
+#define SCLK_DDRCLK		70
+#define SCLK_PMU		71
+#define SCLK_USBPHY_REF		72
+#define SCLK_WIFI		73
+#define SCLK_PVTM_PMU		74
+#define SCLK_PDM		75
+#define SCLK_I2S0_8CH_TX	76
+#define SCLK_I2S0_8CH_TX_OUT	77
+#define SCLK_I2S0_8CH_RX	78
+#define SCLK_I2S0_8CH_RX_OUT	79
+#define SCLK_I2S1_8CH_TX	80
+#define SCLK_I2S1_8CH_TX_OUT	81
+#define SCLK_I2S1_8CH_RX	82
+#define SCLK_I2S1_8CH_RX_OUT	83
+#define SCLK_I2S2_8CH_TX	84
+#define SCLK_I2S2_8CH_TX_OUT	85
+#define SCLK_I2S2_8CH_RX	86
+#define SCLK_I2S2_8CH_RX_OUT	87
+#define SCLK_I2S3_8CH_TX	88
+#define SCLK_I2S3_8CH_TX_OUT	89
+#define SCLK_I2S3_8CH_RX	90
+#define SCLK_I2S3_8CH_RX_OUT	91
+#define SCLK_I2S0_2CH		92
+#define SCLK_I2S0_2CH_OUT	93
+#define SCLK_I2S1_2CH		94
+#define SCLK_I2S1_2CH_OUT	95
+#define SCLK_SPDIF_TX_DIV	96
+#define SCLK_SPDIF_TX_DIV50	97
+#define SCLK_SPDIF_TX		98
+#define SCLK_SPDIF_RX_DIV	99
+#define SCLK_SPDIF_RX_DIV50	100
+#define SCLK_SPDIF_RX		101
+
+/* dclk */
+#define DCLK_VOP		120
+
+/* aclk */
+#define ACLK_CORE		130
+#define ACLK_BUS		131
+#define ACLK_PERI		132
+#define ACLK_GMAC		133
+#define ACLK_CRYPTO		134
+#define ACLK_VOP		135
+#define ACLK_GIC		136
+
+/* hclk */
+#define HCLK_BUS		150
+#define HCLK_PERI		151
+#define HCLK_AUDIO		152
+#define HCLK_NANDC		153
+#define HCLK_SDMMC		154
+#define HCLK_SDIO		155
+#define HCLK_EMMC		156
+#define HCLK_SFC		157
+#define HCLK_OTG		158
+#define HCLK_HOST		159
+#define HCLK_HOST_ARB		160
+#define HCLK_PDM		161
+#define HCLK_SPDIFTX		162
+#define HCLK_SPDIFRX		163
+#define HCLK_I2S0_8CH		164
+#define HCLK_I2S1_8CH		165
+#define HCLK_I2S2_8CH		166
+#define HCLK_I2S3_8CH		167
+#define HCLK_I2S0_2CH		168
+#define HCLK_I2S1_2CH		169
+#define HCLK_VAD		170
+#define HCLK_CRYPTO		171
+#define HCLK_VOP		172
+
+/* pclk */
+#define PCLK_BUS		190
+#define PCLK_DDR		191
+#define PCLK_PERI		192
+#define PCLK_PMU		193
+#define PCLK_AUDIO		194
+#define PCLK_GMAC		195
+#define PCLK_ACODEC		196
+#define PCLK_UART0		197
+#define PCLK_UART1		198
+#define PCLK_UART2		199
+#define PCLK_UART3		200
+#define PCLK_UART4		201
+#define PCLK_I2C0		202
+#define PCLK_I2C1		203
+#define PCLK_I2C2		204
+#define PCLK_I2C3		205
+#define PCLK_PWM		206
+#define PCLK_SPI0		207
+#define PCLK_SPI1		208
+#define PCLK_SPI2		209
+#define PCLK_SARADC		210
+#define PCLK_TSADC		211
+#define PCLK_TIMER		212
+#define PCLK_OTP_NS		213
+#define PCLK_WDT_NS		214
+#define PCLK_GPIO0		215
+#define PCLK_GPIO1		216
+#define PCLK_GPIO2		217
+#define PCLK_GPIO3		218
+#define PCLK_GPIO4		219
+#define PCLK_SGRF		220
+#define PCLK_GRF			221
+#define PCLK_USBSD_DET		222
+#define PCLK_DDR_UPCTL		223
+#define PCLK_DDR_MON		224
+#define PCLK_DDRPHY		225
+#define PCLK_DDR_STDBY		226
+#define PCLK_USB_GRF		227
+#define PCLK_CRU		228
+#define PCLK_OTP_PHY		229
+#define PCLK_CPU_BOOST		230
+
+#define CLK_NR_CLKS		(PCLK_CPU_BOOST + 1)
+
+/* soft-reset indices */
+
+/* cru_softrst_con0 */
+#define SRST_CORE0_PO		0
+#define SRST_CORE1_PO		1
+#define SRST_CORE2_PO		2
+#define SRST_CORE3_PO		3
+#define SRST_CORE0		4
+#define SRST_CORE1		5
+#define SRST_CORE2		6
+#define SRST_CORE3		7
+#define SRST_CORE0_DBG		8
+#define SRST_CORE1_DBG		9
+#define SRST_CORE2_DBG		10
+#define SRST_CORE3_DBG		11
+#define SRST_TOPDBG		12
+#define SRST_CORE_NOC		13
+#define SRST_STRC_A		14
+#define SRST_L2C		15
+
+/* cru_softrst_con1 */
+#define SRST_DAP		16
+#define SRST_CORE_PVTM		17
+#define SRST_CORE_PRF		18
+#define SRST_CORE_GRF		19
+#define SRST_DDRUPCTL		20
+#define SRST_DDRUPCTL_P		22
+#define SRST_MSCH		23
+#define SRST_DDRMON_P		25
+#define SRST_DDRSTDBY_P		26
+#define SRST_DDRSTDBY		27
+#define SRST_DDRPHY		28
+#define SRST_DDRPHY_DIV		29
+#define SRST_DDRPHY_P		30
+
+/* cru_softrst_con2 */
+#define SRST_BUS_NIU_H		32
+#define SRST_USB_NIU_P		33
+#define SRST_CRYPTO_A		34
+#define SRST_CRYPTO_H		35
+#define SRST_CRYPTO		36
+#define SRST_CRYPTO_APK		37
+#define SRST_VOP_A		38
+#define SRST_VOP_H		39
+#define SRST_VOP_D		40
+#define SRST_INTMEM_A		41
+#define SRST_ROM_H		42
+#define SRST_GIC_A		43
+#define SRST_UART0_P		44
+#define SRST_UART0		45
+#define SRST_UART1_P		46
+#define SRST_UART1		47
+
+/* cru_softrst_con3 */
+#define SRST_UART2_P		48
+#define SRST_UART2		49
+#define SRST_UART3_P		50
+#define SRST_UART3		51
+#define SRST_UART4_P		52
+#define SRST_UART4		53
+#define SRST_I2C0_P		54
+#define SRST_I2C0		55
+#define SRST_I2C1_P		56
+#define SRST_I2C1		57
+#define SRST_I2C2_P		58
+#define SRST_I2C2		59
+#define SRST_I2C3_P		60
+#define SRST_I2C3		61
+#define SRST_PWM_P		62
+#define SRST_PWM		63
+
+/* cru_softrst_con4 */
+#define SRST_SPI0_P		64
+#define SRST_SPI0		65
+#define SRST_SPI1_P		66
+#define SRST_SPI1		67
+#define SRST_SPI2_P		68
+#define SRST_SPI2		69
+#define SRST_SARADC_P		70
+#define SRST_TSADC_P		71
+#define SRST_TSADC		72
+#define SRST_TIMER0_P		73
+#define SRST_TIMER0		74
+#define SRST_TIMER1		75
+#define SRST_TIMER2		76
+#define SRST_TIMER3		77
+#define SRST_TIMER4		78
+#define SRST_TIMER5		79
+
+/* cru_softrst_con5 */
+#define SRST_OTP_NS_P		80
+#define SRST_OTP_NS_SBPI	81
+#define SRST_OTP_NS_USR		82
+#define SRST_OTP_PHY_P		83
+#define SRST_OTP_PHY		84
+#define SRST_GPIO0_P		86
+#define SRST_GPIO1_P		87
+#define SRST_GPIO2_P		88
+#define SRST_GPIO3_P		89
+#define SRST_GPIO4_P		90
+#define SRST_GRF_P		91
+#define SRST_USBSD_DET_P	92
+#define SRST_PMU		93
+#define SRST_PMU_PVTM		94
+#define SRST_USB_GRF_P		95
+
+/* cru_softrst_con6 */
+#define SRST_CPU_BOOST		96
+#define SRST_CPU_BOOST_P	97
+#define SRST_PERI_NIU_A		104
+#define SRST_PERI_NIU_H		105
+#define SRST_PERI_NIU_p		106
+#define SRST_USB2OTG_H		107
+#define SRST_USB2OTG		108
+#define SRST_USB2OTG_ADP	109
+#define SRST_USB2HOST_H		110
+#define SRST_USB2HOST_ARB_H	111
+
+/* cru_softrst_con7 */
+#define SRST_USB2HOST_AUX_H	112
+#define SRST_USB2HOST_EHCI	113
+#define SRST_USB2HOST		114
+#define SRST_USBPHYPOR		115
+#define SRST_UTMI0		116
+#define SRST_UTMI1		117
+#define SRST_SDIO_H		118
+#define SRST_EMMC_H		119
+#define SRST_SFC_H		120
+#define SRST_SFC		121
+#define SRST_SD_H		122
+#define SRST_NANDC_H		123
+#define SRST_NANDC_N		124
+#define SRST_GMAC_A		125
+
+/* cru_softrst_con8 */
+#define SRST_AUDIO_NIU_H	128
+#define SRST_AUDIO_NIU_P	129
+#define SRST_PDM_H		130
+#define SRST_PDM_M		131
+#define SRST_SPDIFTX_H		132
+#define SRST_SPDIFTX_M		133
+#define SRST_SPDIFRX_H		134
+#define SRST_SPDIFRX_M		135
+#define SRST_I2S0_8CH_H		136
+#define SRST_I2S0_8CH_TX_M	137
+#define SRST_I2S0_8CH_RX_M	138
+#define SRST_I2S1_8CH_H		139
+#define SRST_I2S1_8CH_TX_M	140
+#define SRST_I2S1_8CH_RX_M	141
+#define SRST_I2S2_8CH_H		142
+#define SRST_I2S2_8CH_TX_M	143
+
+/* cru_softrst_con9 */
+#define SRST_I2S2_8CH_RX_M	144
+#define SRST_I2S3_8CH_H		145
+#define SRST_I2S3_8CH_TX_M	146
+#define SRST_I2S3_8CH_RX_M	147
+#define SRST_I2S0_2CH_H		148
+#define SRST_I2S0_2CH_M		149
+#define SRST_I2S1_2CH_H		150
+#define SRST_I2S1_2CH_M		151
+#define SRST_VAD_H		152
+#define SRST_ACODEC_P		153
+
+#endif

commit 3d78ac3e4e75dad1cfbd93ab65653a424b332b0f
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Sun Feb 25 17:44:28 2018 +0800

    arm: rockchip: add RK3308 SOC support
    
    RK3308 is a Soc from Rockchip, which embedded with quad
    ARM Cortex-A35 and highly integrated audio interfaces.
    
    Change-Id: I93958481f2e9f0f8d8c40bbfaaa3899cd82ec43d
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
new file mode 100644
index 0000000000..aeee9cea92
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
@@ -0,0 +1,81 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#ifndef _ASM_ARCH_CRU_RK3308_H
+#define _ASM_ARCH_CRU_RK3308_H
+
+#include <common.h>
+
+#define MHz		1000000
+#define OSC_HZ		(24 * MHz)
+
+#define APLL_HZ		(816 * MHz)
+#define GPLL_HZ		(600 * MHz)
+#define CPLL_HZ		(594 * MHz)
+
+#define CORE_PERI_HZ	204000000
+#define CORE_ACLK_HZ	408000000
+
+#define BUS_ACLK_HZ	148500000
+#define BUS_HCLK_HZ	148500000
+#define BUS_PCLK_HZ	74250000
+
+#define PERI_ACLK_HZ	148500000
+#define PERI_HCLK_HZ	148500000
+#define PERI_PCLK_HZ	74250000
+
+enum apll_frequencies {
+	APLL_816_MHZ,
+	APLL_600_MHZ,
+};
+
+/* Private data for the clock driver - used by rockchip_get_cru() */
+struct rk3308_clk_priv {
+	struct rk3308_cru *cru;
+	ulong rate;
+};
+
+struct rk3308_cru {
+	struct rk3308_pll {
+		unsigned int con0;
+		unsigned int con1;
+		unsigned int con2;
+		unsigned int con3;
+		unsigned int con4;
+		unsigned int reserved0[3];
+	} pll[4];
+	unsigned int reserved1[8];
+	unsigned int mode;
+	unsigned int misc;
+	unsigned int reserved2[2];
+	unsigned int glb_cnt_th;
+	unsigned int glb_rst_st;
+	unsigned int glb_srst_fst;
+	unsigned int glb_srst_snd;
+	unsigned int glb_rst_con;
+	unsigned int pll_lock;
+	unsigned int reserved3[6];
+	unsigned int hwffc_con0;
+	unsigned int reserved4;
+	unsigned int hwffc_th;
+	unsigned int hwffc_intst;
+	unsigned int apll_con0_s;
+	unsigned int apll_con1_s;
+	unsigned int clksel_con0_s;
+	unsigned int reserved5;
+	unsigned int clksel_con[74];
+	unsigned int reserved6[54];
+	unsigned int clkgate_con[15];
+	unsigned int reserved7[(0x380 - 0x338) / 4 - 1];
+	unsigned int ssgtbl[32];
+	unsigned int softrst_con[10];
+	unsigned int reserved8[(0x480 - 0x424) / 4 - 1];
+	unsigned int sdmmc_con[2];
+	unsigned int sdio_con[2];
+	unsigned int emmc_con[2];
+};
+check_member(rk3308_cru, emmc_con[1], 0x494);
+
+#endif
diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3308.h b/arch/arm/include/asm/arch-rockchip/grf_rk3308.h
new file mode 100644
index 0000000000..7e8e3a62f8
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3308.h
@@ -0,0 +1,176 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#ifndef _ASM_ARCH_GRF_rk3308_H
+#define _ASM_ARCH_GRF_rk3308_H
+
+#include <common.h>
+
+struct rk3308_grf {
+	unsigned int gpio0a_iomux;
+	unsigned int reserved0;
+	unsigned int gpio0b_iomux;
+	unsigned int reserved1;
+	unsigned int gpio0c_iomux;
+	unsigned int reserved2[3];
+	unsigned int gpio1a_iomux;
+	unsigned int reserved3;
+	unsigned int gpio1bl_iomux;
+	unsigned int gpio1bh_iomux;
+	unsigned int gpio1cl_iomux;
+	unsigned int gpio1ch_iomux;
+	unsigned int gpio1d_iomux;
+	unsigned int reserved4;
+	unsigned int gpio2a_iomux;
+	unsigned int reserved5;
+	unsigned int gpio2b_iomux;
+	unsigned int reserved6;
+	unsigned int gpio2c_iomux;
+	unsigned int reserved7[3];
+	unsigned int gpio3a_iomux;
+	unsigned int reserved8;
+	unsigned int gpio3b_iomux;
+	unsigned int reserved9[5];
+	unsigned int gpio4a_iomux;
+	unsigned int reserved33;
+	unsigned int gpio4b_iomux;
+	unsigned int reserved10;
+	unsigned int gpio4c_iomux;
+	unsigned int reserved11;
+	unsigned int gpio4d_iomux;
+	unsigned int reserved34;
+	unsigned int gpio0a_p;
+	unsigned int gpio0b_p;
+	unsigned int gpio0c_p;
+	unsigned int reserved12;
+	unsigned int gpio1a_p;
+	unsigned int gpio1b_p;
+	unsigned int gpio1c_p;
+	unsigned int gpio1d_p;
+	unsigned int gpio2a_p;
+	unsigned int gpio2b_p;
+	unsigned int gpio2c_p;
+	unsigned int reserved13;
+	unsigned int gpio3a_p;
+	unsigned int gpio3b_p;
+	unsigned int reserved14[2];
+	unsigned int gpio4a_p;
+	unsigned int gpio4b_p;
+	unsigned int gpio4c_p;
+	unsigned int gpio4d_p;
+	unsigned int reserved15[(0x100 - 0xec) / 4 - 1];
+	unsigned int gpio0a_e;
+	unsigned int gpio0b_e;
+	unsigned int gpio0c_e;
+	unsigned int reserved16;
+	unsigned int gpio1a_e;
+	unsigned int gpio1b_e;
+	unsigned int gpio1c_e;
+	unsigned int gpio1d_e;
+	unsigned int gpio2a_e;
+	unsigned int gpio2b_e;
+	unsigned int gpio2c_e;
+	unsigned int reserved17;
+	unsigned int gpio3a_e;
+	unsigned int gpio3b_e;
+	unsigned int reserved18[2];
+	unsigned int gpio4a_e;
+	unsigned int gpio4b_e;
+	unsigned int gpio4c_e;
+	unsigned int gpio4d_e;
+	unsigned int gpio0a_sr;
+	unsigned int gpio0b_sr;
+	unsigned int gpio0c_sr;
+	unsigned int reserved19;
+	unsigned int gpio1a_sr;
+	unsigned int gpio1b_sr;
+	unsigned int gpio1c_sr;
+	unsigned int gpio1d_sr;
+	unsigned int gpio2a_sr;
+	unsigned int gpio2b_sr;
+	unsigned int gpio2c_sr;
+	unsigned int reserved20;
+	unsigned int gpio3a_sr;
+	unsigned int gpio3b_sr;
+	unsigned int reserved21[2];
+	unsigned int gpio4a_sr;
+	unsigned int gpio4b_sr;
+	unsigned int gpio4c_sr;
+	unsigned int gpio4d_sr;
+	unsigned int gpio0a_smt;
+	unsigned int gpio0b_smt;
+	unsigned int gpio0c_smt;
+	unsigned int reserved22;
+	unsigned int gpio1a_smt;
+	unsigned int gpio1b_smt;
+	unsigned int gpio1c_smt;
+	unsigned int gpio1d_smt;
+	unsigned int gpio2a_smt;
+	unsigned int gpio2b_smt;
+	unsigned int gpio2c_smt;
+	unsigned int reserved23;
+	unsigned int gpio3a_smt;
+	unsigned int gpio3b_smt;
+	unsigned int reserved35[2];
+	unsigned int gpio4a_smt;
+	unsigned int gpio4b_smt;
+	unsigned int gpio4c_smt;
+	unsigned int gpio4d_smt;
+	unsigned int reserved24[(0x300 - 0x1EC) / 4 - 1];
+	unsigned int soc_con0;
+	unsigned int soc_con1;
+	unsigned int soc_con2;
+	unsigned int soc_con3;
+	unsigned int soc_con4;
+	unsigned int soc_con5;
+	unsigned int soc_con6;
+	unsigned int soc_con7;
+	unsigned int soc_con8;
+	unsigned int soc_con9;
+	unsigned int soc_con10;
+	unsigned int reserved25[(0x380 - 0x328) / 4 - 1];
+	unsigned int soc_status0;
+	unsigned int reserved26[(0x400 - 0x380) / 4 - 1];
+	unsigned int cpu_con0;
+	unsigned int cpu_con1;
+	unsigned int cpu_con2;
+	unsigned int reserved27[(0x420 - 0x408) / 4 - 1];
+	unsigned int cpu_status0;
+	unsigned int cpu_status1;
+	unsigned int reserved28[(0x440 - 0x424) / 4 - 1];
+	unsigned int pvtm_con0;
+	unsigned int pvtm_con1;
+	unsigned int pvtm_status0;
+	unsigned int pvtm_status1;
+	unsigned int reserved29[(0x460 - 0x44C) / 4 - 1];
+	unsigned int tsadc_tbl;
+	unsigned int tsadc_tbh;
+	unsigned int reserved30[(0x480 - 0x464) / 4 - 1];
+	unsigned int host0_con0;
+	unsigned int host0_con1;
+	unsigned int otg_con0;
+	unsigned int host0_status0;
+	unsigned int reserved31[(0x4a0 - 0x48C) / 4 - 1];
+	unsigned int mac_con0;
+	unsigned int upctrl_con0;
+	unsigned int upctrl_status0;
+	unsigned int reserved32[(0x500 - 0x4A8) / 4 - 1];
+	unsigned int os_reg0;
+	unsigned int os_reg1;
+	unsigned int os_reg2;
+	unsigned int os_reg3;
+	unsigned int os_reg4;
+	unsigned int os_reg5;
+	unsigned int os_reg6;
+	unsigned int os_reg7;
+	unsigned int os_reg8;
+	unsigned int os_reg9;
+	unsigned int os_reg10;
+	unsigned int os_reg11;
+	unsigned int reserved38[(0x800 - 0x52C) / 4 - 1];
+	unsigned int chip_id;
+};
+check_member(rk3308_grf, gpio0a_p, 0xa0);
+#endif
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 74436308a3..74c848757f 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -127,6 +127,14 @@ config ROCKCHIP_RK3288
 	  and video codec support. Peripherals include Gigabit Ethernet,
 	  USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
 
+config ROCKCHIP_RK3308
+	bool "Support Rockchip RK3308"
+	select ARM64
+	select DEBUG_UART_BOARD_INIT
+	help
+	  The Rockchip RK3308 is a ARM-based Soc which embeded with quad
+	  Cortex-A35 and highly integrated audio interfaces.
+
 config ROCKCHIP_RK3328
 	bool "Support Rockchip RK3328"
 	select ARM64
@@ -260,6 +268,7 @@ config ROCKCHIP_BOOT_MODE_REG
 	default 0x20004040 if ROCKCHIP_RK3188
 	default 0x110005c8 if ROCKCHIP_RK322X
 	default 0xff730094 if ROCKCHIP_RK3288
+	default 0xff000500 if ROCKCHIP_RK3308
 	default 0xff1005c8 if ROCKCHIP_RK3328
 	default 0xff738200 if ROCKCHIP_RK3368
 	default 0xff320300 if ROCKCHIP_RK3399
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 4452117a73..de4faf2fa9 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -41,6 +41,7 @@ obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188/
 endif
 obj-$(CONFIG_ROCKCHIP_RK322X) += rk322x/
 obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288/
+obj-$(CONFIG_ROCKCHIP_RK3308) += rk3308/
 obj-$(CONFIG_ROCKCHIP_RK3328) += rk3328/
 obj-$(CONFIG_ROCKCHIP_RK3368) += rk3368/
 obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399/
diff --git a/arch/arm/mach-rockchip/rk3308/Makefile b/arch/arm/mach-rockchip/rk3308/Makefile
new file mode 100644
index 0000000000..196774d3e5
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3308/Makefile
@@ -0,0 +1,8 @@
+#
+# (C) Copyright 2018 Rockchip Electronics Co., Ltd.
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y += syscon_rk3308.o
+obj-y += rk3308.o
diff --git a/arch/arm/mach-rockchip/rk3308/rk3308.c b/arch/arm/mach-rockchip/rk3308/rk3308.c
new file mode 100644
index 0000000000..3642a861f5
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3308/rk3308.c
@@ -0,0 +1,97 @@
+/*
+ * Copyright (c) 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/grf_rk3308.h>
+#include <asm/arch/hardware.h>
+#include <asm/armv8/mmu.h>
+#include <debug_uart.h>
+
+static struct mm_region rk3308_mem_map[] = {
+	{
+		.virt = 0x0UL,
+		.phys = 0x0UL,
+		.size = 0xff000000UL,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+			 PTE_BLOCK_INNER_SHARE
+	}, {
+		.virt = 0xff000000UL,
+		.phys = 0xff000000UL,
+		.size = 0x01000000UL,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+			 PTE_BLOCK_NON_SHARE |
+			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
+	}, {
+		/* List terminator */
+		0,
+	}
+};
+
+struct mm_region *mem_map = rk3308_mem_map;
+
+#define GRF_BASE	0xff000000
+
+enum {
+
+	GPIO1C7_SHIFT		= 8,
+	GPIO1C7_MASK		= GENMASK(11, 8),
+	GPIO1C7_GPIO		= 0,
+	GPIO1C7_UART1_RTSN,
+	GPIO1C7_UART2_TX_M0,
+	GPIO1C7_SPI2_MOSI,
+	GPIO1C7_JTAG_TMS,
+
+	GPIO1C6_SHIFT		= 4,
+	GPIO1C6_MASK		= GENMASK(7, 4),
+	GPIO1C6_GPIO		= 0,
+	GPIO1C6_UART1_CTSN,
+	GPIO1C6_UART2_RX_M0,
+	GPIO1C6_SPI2_MISO,
+	GPIO1C6_JTAG_TCLK,
+
+	GPIO4D3_SHIFT           = 6,
+	GPIO4D3_MASK            = GENMASK(7, 6),
+	GPIO4D3_GPIO            = 0,
+	GPIO4D3_SDMMC_D3,
+	GPIO4D3_UART2_TX_M1,
+
+	GPIO4D2_SHIFT           = 4,
+	GPIO4D2_MASK            = GENMASK(5, 4),
+	GPIO4D2_GPIO            = 0,
+	GPIO4D2_SDMMC_D2,
+	GPIO4D2_UART2_RX_M1,
+
+	UART2_IO_SEL_SHIFT	= 2,
+	UART2_IO_SEL_MASK	= GENMASK(3, 2),
+	UART2_IO_SEL_M0		= 0,
+	UART2_IO_SEL_M1,
+	UART2_IO_SEL_USB,
+};
+
+int arch_cpu_init(void)
+{
+	debug_uart_init();
+
+	printascii("U-Boot rk3308\n");
+
+	return 0;
+}
+
+void board_debug_uart_init(void)
+{
+	static struct rk3308_grf * const grf = (void *)GRF_BASE;
+
+	/* Enable early UART2 channel m1 on the rk3308 */
+	rk_clrsetreg(&grf->soc_con5, UART2_IO_SEL_MASK,
+		     UART2_IO_SEL_M1 << UART2_IO_SEL_SHIFT);
+	rk_clrsetreg(&grf->gpio1ch_iomux, GPIO1C7_MASK | GPIO1C6_MASK,
+		      GPIO1C7_GPIO << GPIO1C7_SHIFT |
+		      GPIO1C6_GPIO << GPIO1C6_SHIFT);
+	rk_clrsetreg(&grf->gpio4d_iomux,
+		     GPIO4D3_MASK | GPIO4D2_MASK,
+		     GPIO4D2_UART2_RX_M1 << GPIO4D2_SHIFT |
+		     GPIO4D3_UART2_TX_M1 << GPIO4D3_SHIFT);
+}
diff --git a/arch/arm/mach-rockchip/rk3308/syscon_rk3308.c b/arch/arm/mach-rockchip/rk3308/syscon_rk3308.c
new file mode 100644
index 0000000000..109fcacd4b
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3308/syscon_rk3308.c
@@ -0,0 +1,21 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+
+static const struct udevice_id rk3308_syscon_ids[] = {
+	{ .compatible = "rockchip,rk3308-grf", .data = ROCKCHIP_SYSCON_GRF },
+	{ }
+};
+
+U_BOOT_DRIVER(syscon_rk3308) = {
+	.name = "rk3308_syscon",
+	.id = UCLASS_SYSCON,
+	.of_match = rk3308_syscon_ids,
+};
diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h
new file mode 100644
index 0000000000..24bf22cd8e
--- /dev/null
+++ b/include/configs/rk3308_common.h
@@ -0,0 +1,67 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __CONFIG_RK3308_COMMON_H
+#define __CONFIG_RK3308_COMMON_H
+
+#include "rockchip-common.h"
+
+#define CONFIG_SYS_MALLOC_LEN		(32 << 20)
+#define CONFIG_SYS_CBSIZE		1024
+#define CONFIG_SKIP_LOWLEVEL_INIT
+
+#define CONFIG_SPL_FRAMEWORK
+
+#define CONFIG_SYS_NS16550_MEM32
+
+#define CONFIG_SYS_TEXT_BASE		0x00200000
+#define CONFIG_SYS_INIT_SP_ADDR		0x00300000
+#define CONFIG_SYS_LOAD_ADDR		0x00800800
+#define CONFIG_SPL_STACK		0x00400000
+#define CONFIG_SPL_TEXT_BASE		0x00000000
+#define CONFIG_SPL_MAX_SIZE		0x10000
+#define CONFIG_SPL_BSS_START_ADDR	0x2000000
+#define CONFIG_SPL_BSS_MAX_SIZE		0x2000
+#define CONFIG_SYS_BOOTM_LEN		(64 << 20)	/* 64M */
+
+#define COUNTER_FREQUENCY		24000000
+
+#define GICD_BASE			0xff131000
+#define GICC_BASE			0xff132000
+
+#define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */
+
+/* MMC/SD IP block */
+#define CONFIG_BOUNCE_BUFFER
+
+#define CONFIG_SYS_SDRAM_BASE		0
+#define CONFIG_NR_DRAM_BANKS		2
+#define SDRAM_MAX_SIZE			0xff000000
+#define SDRAM_BANK_SIZE			(2UL << 30)
+#define CONFIG_PREBOOT
+
+#ifndef CONFIG_SPL_BUILD
+
+/* usb mass storage */
+#define CONFIG_USB_FUNCTION_MASS_STORAGE
+#define CONFIG_ROCKUSB_G_DNL_PID        0x330d
+
+#define ENV_MEM_LAYOUT_SETTINGS \
+	"scriptaddr=0x00500000\0" \
+	"pxefile_addr_r=0x00600000\0" \
+	"fdt_addr_r=0x01f00000\0" \
+	"kernel_addr_r=0x02080000\0" \
+	"ramdisk_addr_r=0x04000000\0"
+
+#include <config_distro_bootcmd.h>
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	ENV_MEM_LAYOUT_SETTINGS \
+	"partitions=" PARTS_DEFAULT \
+	BOOTENV
+
+#endif
+
+#endif

commit 178b5aad365178d7ba014e9f7b4af8ab3a0ed718
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Tue Mar 20 10:01:48 2018 +0800

    video/drm: lvds: Use default pinctrl state
    
    If we use the pinctrl-names is "default", there is no need to configure
    the iomux twice, remove the duplicates.
    
    Change-Id: Ibd774f06ce10d6abfbbfdd0415a35e323a74b3ad
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index 21c5c05a16..d52e65f51e 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -215,29 +215,6 @@ static void px30_output_ttl(struct display_state *state)
 	struct connector_state *conn_state = &state->conn_state;
 	struct rockchip_lvds_device *lvds = conn_state->private;
 	u32 val = 0;
-	int ret;
-
-	ret = dev_read_stringlist_search(conn_state->dev, "pinctrl-names", "m0");
-	if (ret < 0) {
-		/* iomux to lcdcm1 */
-		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3A_IOMUX_L, 0x000f, 0x0001);
-		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3A_IOMUX_H, 0x0f0f, 0x0101);
-		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3B_IOMUX_L, 0xff00, 0x1100);
-		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3B_IOMUX_H, 0x00f0, 0x0010);
-		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3C_IOMUX_L, 0xffff, 0x1111);
-		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3C_IOMUX_H, 0xffff, 0x1111);
-		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3D_IOMUX_L, 0xffff, 0x1111);
-	} else {
-		/* iomux to lcdcm0 */
-		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3A_IOMUX_L, 0xffff, 0x1111);
-		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3A_IOMUX_H, 0xffff, 0x1111);
-		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3B_IOMUX_L, 0xffff, 0x1111);
-		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3B_IOMUX_H, 0xffff, 0x1111);
-		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3C_IOMUX_L, 0xffff, 0x1111);
-		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3C_IOMUX_H, 0xffff, 0x1111);
-		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3D_IOMUX_L, 0xffff, 0x1111);
-		return;
-	}
 
 	/* enable lvds mode */
 	val = PX30_LVDS_PHY_MODE(0) | PX30_DPHY_FORCERXMODE(1);
@@ -261,11 +238,6 @@ static void rk3126_output_ttl(struct display_state *state)
 	struct rockchip_lvds_device *lvds = conn_state->private;
 	u32 val = 0;
 
-	/* iomux to lcdc */
-	writel(0xffc35541, lvds->grf + RK3126_GRF_GPIO2B_IOMUX);
-	writel(0xffff5555, lvds->grf + RK3126_GRF_GPIO2C_IOMUX);
-	writel(0x700c1004, lvds->grf + RK3126_GRF_GPIO2D_IOMUX);
-
 	/* enable lvds mode */
 	val = v_RK3126_LVDSMODE_EN(0) |
 		v_RK3126_MIPIPHY_TTL_EN(1) |
@@ -296,25 +268,6 @@ static void rk336x_output_ttl(struct display_state *state)
 	struct rockchip_lvds_device *lvds = conn_state->private;
 	u32 val = 0;
 
-	/* iomux to lcdc */
-	if (lvds->pdata->chip_type == RK3368_LVDS) {
-		/* lcdc data 11 10 */
-		lvds_pmugrf_writel(0x04, 0xf0005000);
-		/* lcdc data 12 13 14 15 16 17 18 19 */
-		lvds_pmugrf_writel(0x08, 0xFFFF5555);
-		/* lcdc data 20 21 22 23 HSYNC VSYNC DEN DCLK */
-		lvds_pmugrf_writel(0x0c, 0xFFFF5555);
-		/* set clock lane enable */
-		lvds_ctrl_writel(lvds, 0x0, 0x4);
-	} else {
-		/* lcdc data 15 ... 10, vsync, hsync */
-		lvds_pmugrf_writel(0x0c, 0xffff555a);
-		/* lcdc data 23 ... 16 */
-		lvds_pmugrf_writel(0x30, 0xffff5555);
-		/* lcdc dclk, den */
-		lvds_pmugrf_writel(0x34, 0x000f0005);
-	}
-
 	/* enable lvds mode */
 	val = v_RK336X_LVDSMODE_EN(0) | v_RK336X_MIPIPHY_TTL_EN(1) |
 		v_RK336X_MIPIPHY_LANE0_EN(1) |
@@ -471,8 +424,6 @@ static void rk3288_output_ttl(struct display_state *state)
 	struct rockchip_lvds_device *lvds = conn_state->private;
 
 	rk3288_lvds_pwr_on(state);
-	/* iomux: dclk den hsync vsync */
-	writel(0x00550055, lvds->grf + lvds->pdata->grf_gpio1d_iomux);
 	lvds_writel(lvds, RK3288_LVDS_CH0_REG0,
 		    RK3288_LVDS_CH0_REG0_TTL_EN |
 		    RK3288_LVDS_CH0_REG0_LANECK_EN |
diff --git a/drivers/video/drm/rockchip_lvds.h b/drivers/video/drm/rockchip_lvds.h
index 549ce4a473..339a04dc3a 100644
--- a/drivers/video/drm/rockchip_lvds.h
+++ b/drivers/video/drm/rockchip_lvds.h
@@ -120,13 +120,6 @@
 #define PX30_DPHY_FORCERXMODE(x)	(BITS_MASK(x, 0x1,  6) | BITS_EN(0x1,  6))
 #define PX30_RGB_VOP_SEL(x)		(BITS_MASK(x, 0x1,  2) | BITS_EN(0x1,  2))
 #define PX30_LVDS_VOP_SEL(x)		(BITS_MASK(x, 0x1,  1) | BITS_EN(0x1,  1))
-#define PX30_GRF_GPIO3A_IOMUX_L	0x0040
-#define PX30_GRF_GPIO3A_IOMUX_H	0x0044
-#define PX30_GRF_GPIO3B_IOMUX_L	0x0048
-#define PX30_GRF_GPIO3B_IOMUX_H	0x004c
-#define PX30_GRF_GPIO3C_IOMUX_L	0x0050
-#define PX30_GRF_GPIO3C_IOMUX_H	0x0054
-#define PX30_GRF_GPIO3D_IOMUX_L	0x0058
 
 #define v_RK336X_LVDS_OUTPUT_FORMAT(x) (BITS_MASK(x, 3, 13) | BITS_EN(3, 13))
 #define v_RK336X_LVDS_MSBSEL(x)        (BITS_MASK(x, 1, 11) | BITS_EN(1, 11))

commit 98aca512b44ab41b12cf9fa15d1e2a79ca0b3cb2
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Tue Mar 20 09:55:42 2018 +0800

    configs: evb-px30: enable CONFIG_DRM_ROCKCHIP_RGB
    
    Change-Id: I1ae7de3318688babc2d3593f9cf77a02d413915b
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 8d70e8cc99..133c3a840d 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -80,6 +80,7 @@ CONFIG_DISPLAY_ROCKCHIP_MIPI=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
+CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_DRM_ROCKCHIP_PANEL=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y

commit ae374f7964a53157c6cd264f8b31f03495c83b06
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Tue Mar 20 09:54:54 2018 +0800

    configs: evb-rk3326: enable CONFIG_DRM_ROCKCHIP_RGB
    
    Change-Id: I95be83b9dd4588484d2af6249ef9483e5ec4c61f
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/configs/evb-rk3326_defconfig b/configs/evb-rk3326_defconfig
index ac2b86d3e7..dab64402d2 100644
--- a/configs/evb-rk3326_defconfig
+++ b/configs/evb-rk3326_defconfig
@@ -82,6 +82,7 @@ CONFIG_DISPLAY_ROCKCHIP_MIPI=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
+CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_DRM_ROCKCHIP_PANEL=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y

commit 9e02a86e2a096a672c77293fbe95853d83d47296
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Tue Mar 20 09:48:39 2018 +0800

    video/drm: Add support for Rockchip RGB output interface
    
    Some CRTCs can directly output parallel and serial RGB data to panel
    or conversion chip on rockchip platform, so we add this driver to support it.
    
    Change-Id: I9e4f1a1978c9100767e44920a54afc4d39830d7d
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/Kconfig b/drivers/video/drm/Kconfig
index 04174ddece..a83278dc3c 100644
--- a/drivers/video/drm/Kconfig
+++ b/drivers/video/drm/Kconfig
@@ -53,3 +53,11 @@ config DRM_ROCKCHIP_LVDS
 	  Rockchip rk3288 SoC has LVDS TX Controller can be used, and it
 	  support LVDS, rgb, dual LVDS output mode. say Y to enable its
 	  driver.
+
+config DRM_ROCKCHIP_RGB
+	bool "Rockchip RGB Support"
+	depends on DRM_ROCKCHIP
+	select DRM_ROCKCHIP_PANEL
+	help
+	  Choose this option to enable support for Rockchip RGB driver.
+	  say Y to enable its driver.
diff --git a/drivers/video/drm/Makefile b/drivers/video/drm/Makefile
index a9a85cb1a9..f6b39fa882 100644
--- a/drivers/video/drm/Makefile
+++ b/drivers/video/drm/Makefile
@@ -13,4 +13,5 @@ obj-$(CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI) += rockchip-dw-mipi-dsi.o \
 obj-$(CONFIG_DRM_ROCKCHIP_DW_HDMI) += rockchip_dw_hdmi.o dw_hdmi.o
 obj-$(CONFIG_DRM_ROCKCHIP_ANALOGIX_DP) += rockchip_analogix_dp.o rockchip_analogix_dp_reg.o
 obj-$(CONFIG_DRM_ROCKCHIP_LVDS) += rockchip_lvds.o
+obj-$(CONFIG_DRM_ROCKCHIP_RGB) += rockchip_rgb.o
 obj-$(CONFIG_DRM_ROCKCHIP_PANEL) += rockchip_panel.o
diff --git a/drivers/video/drm/rockchip_rgb.c b/drivers/video/drm/rockchip_rgb.c
new file mode 100644
index 0000000000..92dc839164
--- /dev/null
+++ b/drivers/video/drm/rockchip_rgb.c
@@ -0,0 +1,133 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <errno.h>
+#include <syscon.h>
+#include <regmap.h>
+#include <dm/device.h>
+#include <dm/read.h>
+
+#include "rockchip_display.h"
+#include "rockchip_crtc.h"
+#include "rockchip_connector.h"
+
+#define PX30_GRF_PD_VO_CON1	0x0438
+#define PX30_LCDC_DCLK_INV(v)	HIWORD_UPDATE(v, 4, 4)
+#define PX30_RGB_SYNC_BYPASS(v)	HIWORD_UPDATE(v, 3, 3)
+#define PX30_RGB_VOP_SEL(v)	HIWORD_UPDATE(v, 2, 2)
+
+struct rockchip_rgb_priv {
+	struct regmap *grf;
+};
+
+static int rockchip_rgb_prepare(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct rockchip_rgb_priv *priv = dev_get_priv(conn_state->dev);
+	struct crtc_state *crtc_state = &state->crtc_state;
+	int pipe = crtc_state->crtc_id;
+
+	if (priv->grf) {
+		regmap_write(priv->grf, PX30_GRF_PD_VO_CON1,
+			     PX30_RGB_VOP_SEL(pipe));
+		regmap_write(priv->grf, PX30_GRF_PD_VO_CON1,
+			     PX30_RGB_SYNC_BYPASS(1));
+	}
+
+	return 0;
+}
+
+static int rockchip_rgb_unprepare(struct display_state *state)
+{
+	return 0;
+}
+
+static int to_output_mode(const char *s)
+{
+	const struct {
+		const char *name;
+		int format;
+	} formats[] = {
+		{ "p888", ROCKCHIP_OUT_MODE_P888 },
+		{ "p666", ROCKCHIP_OUT_MODE_P666 },
+		{ "p565", ROCKCHIP_OUT_MODE_P565 },
+		{ "s888", ROCKCHIP_OUT_MODE_S888 },
+		{ "s888_dummy", ROCKCHIP_OUT_MODE_S888_DUMMY }
+	};
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(formats); i++)
+		if (!strncmp(s, formats[i].name, strlen(formats[i].name)))
+			return formats[i].format;
+
+	return ROCKCHIP_OUT_MODE_P888;
+}
+
+static int rockchip_rgb_init(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct panel_state *panel_state = &state->panel_state;
+	const char *mode;
+
+	conn_state->type = DRM_MODE_CONNECTOR_LVDS;
+	conn_state->color_space = V4L2_COLORSPACE_DEFAULT;
+
+	mode = dev_read_string(panel_state->dev, "rgb-mode");
+	if (mode)
+		conn_state->output_mode = to_output_mode(mode);
+	else
+		conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
+
+	return 0;
+}
+
+static const struct rockchip_connector_funcs rockchip_rgb_funcs = {
+	.init = rockchip_rgb_init,
+	.enable = rockchip_rgb_prepare,
+	.disable = rockchip_rgb_unprepare,
+};
+
+static int rockchip_rgb_probe(struct udevice *dev)
+{
+	struct rockchip_rgb_priv *priv = dev_get_priv(dev);
+
+	priv->grf = syscon_get_regmap(dev_get_parent(dev));
+
+	return 0;
+}
+
+static const struct rockchip_connector rockchip_rgb_data = {
+	 .funcs = &rockchip_rgb_funcs,
+};
+
+static const struct udevice_id rockchip_rgb_ids[] = {
+	{
+		.compatible = "rockchip,px30-rgb",
+		.data = (ulong)&rockchip_rgb_data,
+	},
+	{
+		.compatible = "rockchip,rk3066-rgb",
+		.data = (ulong)&rockchip_rgb_data,
+	},
+	{
+		.compatible = "rockchip,rk3308-rgb",
+		.data = (ulong)&rockchip_rgb_data,
+	},
+	{
+		.compatible = "rockchip,rv1108-rgb",
+		.data = (ulong)&rockchip_rgb_data,
+	},
+	{}
+};
+
+U_BOOT_DRIVER(rockchip_rgb) = {
+	.name = "rockchip_rgb",
+	.id = UCLASS_DISPLAY,
+	.of_match = rockchip_rgb_ids,
+	.probe = rockchip_rgb_probe,
+	.priv_auto_alloc_size = sizeof(struct rockchip_rgb_priv),
+};

commit 9abae1863bee71c42818be29b9338c8fe592d868
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Mar 16 15:42:57 2018 +0800

    configs: evb-rk3326: remove CONFIG_DRM_ROCKCHIP_DSI_PANEL
    
    Change-Id: If17cfe1187316308b2ad7107927869890e176349
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/configs/evb-rk3326_defconfig b/configs/evb-rk3326_defconfig
index 8a33028559..ac2b86d3e7 100644
--- a/configs/evb-rk3326_defconfig
+++ b/configs/evb-rk3326_defconfig
@@ -83,7 +83,6 @@ CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_PANEL=y
-CONFIG_DRM_ROCKCHIP_DSI_PANEL=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y

commit 7660591e0a5c8101f82b7fd3a189d22de48b5541
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Mar 16 15:42:17 2018 +0800

    configs: evb-px30: remove CONFIG_DRM_ROCKCHIP_DSI_PANEL
    
    Change-Id: I84a20d6075269043a7b7f2651c1f424d5489a5c3
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 8751c592e9..8d70e8cc99 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -81,7 +81,6 @@ CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_PANEL=y
-CONFIG_DRM_ROCKCHIP_DSI_PANEL=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y

commit c493d00e7c13ad18bf7105dbbe9a685e46f40882
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Mar 16 10:52:59 2018 +0800

    video/drm: Merge panel driver into one driver
    
    This merges the rockchip panel driver into the common driver.
    This will make it easier to share code between the drivers and
    eventually merge them into one driver.
    
    Change-Id: I4c59e5f4f39ffc43b4d0339de8dfa23aec28220b
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/Kconfig b/drivers/video/drm/Kconfig
index 305df5c5a5..04174ddece 100644
--- a/drivers/video/drm/Kconfig
+++ b/drivers/video/drm/Kconfig
@@ -10,10 +10,8 @@ menuconfig DRM_ROCKCHIP
 	  Rockchip RK3288 and RK3399.
 
 config DRM_ROCKCHIP_PANEL
-	bool
-
-config DRM_ROCKCHIP_DSI_PANEL
-	bool
+	bool "Rockchip Panel Support"
+	select DRM_ROCKCHIP_MIPI_DSI
 
 config DRM_ROCKCHIP_DW_HDMI
 	bool "Rockchip specific extensions for Synopsys DW HDMI"
@@ -30,7 +28,7 @@ config DRM_ROCKCHIP_DW_MIPI_DSI
 	tristate "Rockchip specific extensions for Synopsys DW MIPI DSI"
 	depends on DRM_ROCKCHIP
 	select DRM_ROCKCHIP_MIPI_DSI
-	select DRM_ROCKCHIP_DSI_PANEL
+	select DRM_ROCKCHIP_PANEL
 	help
 	 This selects support for Rockchip SoC specific extensions
 	 for the Synopsys DesignWare HDMI driver. If you want to
diff --git a/drivers/video/drm/Makefile b/drivers/video/drm/Makefile
index 9e865118fc..a9a85cb1a9 100644
--- a/drivers/video/drm/Makefile
+++ b/drivers/video/drm/Makefile
@@ -5,14 +5,12 @@
 #
 
 obj-y += rockchip_display.o rockchip_crtc.o rockchip_phy.o \
-		rockchip_vop.o rockchip_vop_reg.o bmp_helper.o \
-		rockchip_panel.o
+		rockchip_vop.o rockchip_vop_reg.o bmp_helper.o
 
 obj-$(CONFIG_DRM_ROCKCHIP_MIPI_DSI)	+= rockchip_mipi_dsi.o
 obj-$(CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI) += rockchip-dw-mipi-dsi.o \
-			rockchip-inno-mipi-dphy.o rockchip_dsi_panel.o
+					  rockchip-inno-mipi-dphy.o
 obj-$(CONFIG_DRM_ROCKCHIP_DW_HDMI) += rockchip_dw_hdmi.o dw_hdmi.o
 obj-$(CONFIG_DRM_ROCKCHIP_ANALOGIX_DP) += rockchip_analogix_dp.o rockchip_analogix_dp_reg.o
 obj-$(CONFIG_DRM_ROCKCHIP_LVDS) += rockchip_lvds.o
-obj-$(CONFIG_DRM_ROCKCHIP_PANEL) += panel_simple.o
-obj-$(CONFIG_DRM_ROCKCHIP_DSI_PANEL) += rockchip_dsi_panel.o
+obj-$(CONFIG_DRM_ROCKCHIP_PANEL) += rockchip_panel.o
diff --git a/drivers/video/drm/panel_simple.c b/drivers/video/drm/panel_simple.c
deleted file mode 100644
index d577d33ebd..0000000000
--- a/drivers/video/drm/panel_simple.c
+++ /dev/null
@@ -1,202 +0,0 @@
-/*
- * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <config.h>
-#include <common.h>
-#include <errno.h>
-#include <malloc.h>
-#include <asm/unaligned.h>
-#include <linux/list.h>
-#include <linux/media-bus-format.h>
-#include <dm/uclass.h>
-#include <dm/uclass-id.h>
-#include <dm/ofnode.h>
-#include <asm/gpio.h>
-#include <backlight.h>
-#include <power/regulator.h>
-
-#include "rockchip_display.h"
-#include "rockchip_crtc.h"
-#include "rockchip_connector.h"
-#include "rockchip_panel.h"
-
-#define msleep(a)	udelay(a * 1000)
-
-struct panel_simple {
-	struct udevice *dev;
-	const void *blob;
-	ofnode node;
-
-	const struct drm_display_mode *mode;
-	int bus_format;
-
-	struct udevice *power_supply;
-	bool power_invert;
-	struct udevice *backlight;
-	struct gpio_desc enable;
-
-	int delay_prepare;
-	int delay_unprepare;
-	int delay_enable;
-	int delay_disable;
-};
-
-static int panel_simple_prepare(struct display_state *state)
-{
-	struct panel_state *panel_state = &state->panel_state;
-	struct panel_simple *panel = panel_state->private;
-	int ret;
-
-	if (panel->power_supply) {
-		ret = regulator_set_enable(panel->power_supply,
-					   panel->power_invert);
-		if (ret)
-			printf("%s: failed to enable power_supply",
-			       __func__);
-	}
-
-	dm_gpio_set_value(&panel->enable, 1);
-	mdelay(panel->delay_prepare);
-
-	return 0;
-}
-
-static int panel_simple_unprepare(struct display_state *state)
-{
-	struct panel_state *panel_state = &state->panel_state;
-	struct panel_simple *panel = panel_state->private;
-
-	dm_gpio_set_value(&panel->enable, 0);
-	mdelay(panel->delay_unprepare);
-
-	return 0;
-}
-
-static int panel_simple_enable(struct display_state *state)
-{
-	struct panel_state *panel_state = &state->panel_state;
-	struct panel_simple *panel = panel_state->private;
-	int ret;
-
-	if (panel->backlight) {
-		ret = backlight_enable(panel->backlight);
-		mdelay(panel->delay_enable);
-		return ret;
-	}
-
-	return 0;
-}
-
-static int panel_simple_disable(struct display_state *state)
-{
-	struct panel_state *panel_state = &state->panel_state;
-	struct panel_simple *panel = panel_state->private;
-	int ret;
-
-	if (panel->backlight) {
-		ret = backlight_disable(panel->backlight);
-		mdelay(panel->delay_disable);
-		return ret;
-	}
-
-	return 0;
-}
-
-static int panel_simple_parse_dt(const void *blob, ofnode node,
-				 struct panel_simple *panel)
-{
-	int ret;
-
-	ret = gpio_request_by_name(panel->dev, "enable-gpios", 0,
-				   &panel->enable, GPIOD_IS_OUT);
-	if (ret && ret != -ENOENT) {
-		printf("%s: Warning: cannot get enable GPIO: ret=%d\n",
-		      __func__, ret);
-		return ret;
-	}
-
-	ret = uclass_get_device_by_phandle(UCLASS_PANEL_BACKLIGHT, panel->dev,
-					   "backlight", &panel->backlight);
-	if (ret && ret != -ENOENT) {
-		printf("%s: Cannot get backlight: ret=%d\n", __func__, ret);
-		return ret;
-	}
-
-	ret = uclass_get_device_by_phandle(UCLASS_REGULATOR, panel->dev,
-					   "power-supply",
-					   &panel->power_supply);
-	if (ret && ret != -ENOENT) {
-		printf("%s: Cannot get power supply: ret=%d\n", __func__, ret);
-		return ret;
-	}
-
-	panel->power_invert = !!ofnode_read_s32_default(node, "power_invert", 0);
-
-	panel->delay_prepare = ofnode_read_s32_default(node, "prepare-delay-ms", 0);
-	panel->delay_unprepare = ofnode_read_s32_default(node, "unprepare-delay-ms", 0);
-	panel->delay_enable = ofnode_read_s32_default(node, "enable-delay-ms", 0);
-	panel->delay_disable = ofnode_read_s32_default(node, "disable-delay-ms", 0);
-	panel->bus_format = ofnode_read_s32_default(node, "bus-format", MEDIA_BUS_FMT_RBG888_1X24);
-
-	debug("delay prepare[%d] unprepare[%d] enable[%d] disable[%d]\n",
-	       panel->delay_prepare, panel->delay_unprepare,
-	       panel->delay_enable, panel->delay_disable);
-
-	/* keep panel blank on init. */
-	dm_gpio_set_value(&panel->enable, 0);
-
-	return 0;
-}
-
-static int panel_simple_init(struct display_state *state)
-{
-	const void *blob = state->blob;
-	struct connector_state *conn_state = &state->conn_state;
-	struct panel_state *panel_state = &state->panel_state;
-	ofnode node = panel_state->node;
-	const struct drm_display_mode *mode = panel_state->panel->data;
-	struct panel_simple *panel;
-	int ret;
-
-	panel = malloc(sizeof(*panel));
-	if (!panel)
-		return -ENOMEM;
-
-	memset(panel, 0, sizeof(*panel));
-	panel->blob = blob;
-	panel->node = node;
-	panel->mode = mode;
-	panel->dev = panel_state->dev;
-	panel_state->private = panel;
-
-	ret = panel_simple_parse_dt(blob, node, panel);
-	if (ret) {
-		printf("%s: failed to parse DT\n", __func__);
-		free(panel);
-		return ret;
-	}
-
-	conn_state->bus_format = panel->bus_format;
-
-	return 0;
-}
-
-static void panel_simple_deinit(struct display_state *state)
-{
-	struct panel_state *panel_state = &state->panel_state;
-	struct panel_simple *panel = panel_state->private;
-
-	free(panel);
-}
-
-const struct rockchip_panel_funcs panel_simple_funcs = {
-	.init		= panel_simple_init,
-	.deinit		= panel_simple_deinit,
-	.prepare	= panel_simple_prepare,
-	.unprepare	= panel_simple_unprepare,
-	.enable		= panel_simple_enable,
-	.disable	= panel_simple_disable,
-};
diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 77df5c2b53..6980c137e3 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -199,10 +199,12 @@ static int connector_panel_init(struct display_state *state)
 	panel_state->dev = dev;
 	panel_state->panel = panel;
 
-	ret = rockchip_panel_init(state);
-	if (ret) {
-		printf("failed to init panel driver\n");
-		return ret;
+	if (panel->funcs && panel->funcs->init) {
+		ret = panel->funcs->init(state);
+		if (ret) {
+			printf("failed to init panel driver\n");
+			return ret;
+		}
 	}
 
 	dsp_lut_node = dev_read_subnode(dev, "dsp-lut");
@@ -409,31 +411,44 @@ static int display_get_timing(struct display_state *state)
 	struct drm_display_mode *mode = &conn_state->mode;
 	const struct drm_display_mode *m;
 	struct panel_state *panel_state = &state->panel_state;
-	ofnode panel = panel_state->node;
+	const struct rockchip_panel *panel = panel_state->panel;
+	const struct rockchip_panel_funcs *panel_funcs = panel->funcs;
+	ofnode panel_node = panel_state->node;
+	int ret;
 
-	if (ofnode_valid(panel) && !display_get_timing_from_dts(panel_state, mode)) {
+	if (ofnode_valid(panel_node) && !display_get_timing_from_dts(panel_state, mode)) {
 		printf("Using display timing dts\n");
 		goto done;
 	}
 
-	m = rockchip_get_display_mode_from_panel(state);
-	if (m) {
-		printf("Using display timing from compatible panel driver\n");
+	if (panel->data) {
+		m = (const struct drm_display_mode *)panel->data;
 		memcpy(mode, m, sizeof(*m));
+		printf("Using display timing from compatible panel driver\n");
 		goto done;
 	}
 
-	rockchip_panel_prepare(state);
-
 	if (conn_funcs->get_edid && !conn_funcs->get_edid(state)) {
 		int panel_bits_per_colourp;
 
+		/* In order to read EDID, the panel needs to be powered on */
+		if (panel_funcs->prepare) {
+			ret = panel_funcs->prepare(state);
+			if (ret) {
+				printf("failed to prepare panel\n");
+				return ret;
+			}
+		}
+
 		if (!edid_get_drm_mode((void *)&conn_state->edid,
 				     sizeof(conn_state->edid), mode,
 				     &panel_bits_per_colourp)) {
 			printf("Using display timing from edid\n");
 			edid_print_info((void *)&conn_state->edid);
 			goto done;
+		} else {
+			if (panel_funcs->unprepare)
+				panel_funcs->unprepare(state);
 		}
 	}
 
@@ -547,6 +562,9 @@ static int display_enable(struct display_state *state)
 	struct crtc_state *crtc_state = &state->crtc_state;
 	const struct rockchip_crtc *crtc = crtc_state->crtc;
 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
+	struct panel_state *panel_state = &state->panel_state;
+	const struct rockchip_panel *panel = panel_state->panel;
+	const struct rockchip_panel_funcs *panel_funcs = panel->funcs;
 	int ret = 0;
 
 	display_init(state);
@@ -569,12 +587,18 @@ static int display_enable(struct display_state *state)
 			goto unprepare_crtc;
 	}
 
-	rockchip_panel_prepare(state);
+	if (panel_funcs->prepare) {
+		ret = panel_funcs->prepare(state);
+		if (ret) {
+			printf("failed to prepare panel\n");
+			goto unprepare_conn;
+		}
+	}
 
 	if (crtc_funcs->enable) {
 		ret = crtc_funcs->enable(state);
 		if (ret)
-			goto unprepare_conn;
+			goto unprepare_panel;
 	}
 
 	if (conn_funcs->enable) {
@@ -583,20 +607,33 @@ static int display_enable(struct display_state *state)
 			goto disable_crtc;
 	}
 
-	rockchip_panel_enable(state);
+	if (panel_funcs->enable) {
+		ret = panel_funcs->enable(state);
+		if (ret) {
+			printf("failed to enable panel\n");
+			goto disable_conn;
+		}
+	}
 
 	state->is_enable = true;
 
 	return 0;
+
+disable_conn:
+	if (conn_funcs->unprepare)
+		conn_funcs->unprepare(state);
+disable_crtc:
+	if (crtc_funcs->disable)
+		crtc_funcs->disable(state);
 unprepare_crtc:
 	if (crtc_funcs->unprepare)
 		crtc_funcs->unprepare(state);
+unprepare_panel:
+	if (panel_funcs->unprepare)
+		panel_funcs->unprepare(state);
 unprepare_conn:
 	if (conn_funcs->unprepare)
 		conn_funcs->unprepare(state);
-disable_crtc:
-	if (crtc_funcs->disable)
-		crtc_funcs->disable(state);
 	return ret;
 }
 
@@ -608,6 +645,9 @@ static int display_disable(struct display_state *state)
 	struct crtc_state *crtc_state = &state->crtc_state;
 	const struct rockchip_crtc *crtc = crtc_state->crtc;
 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
+	struct panel_state *panel_state = &state->panel_state;
+	const struct rockchip_panel *panel = panel_state->panel;
+	const struct rockchip_panel_funcs *panel_funcs = panel->funcs;
 
 	if (!state->is_init)
 		return 0;
@@ -615,7 +655,8 @@ static int display_disable(struct display_state *state)
 	if (!state->is_enable)
 		return 0;
 
-	rockchip_panel_disable(state);
+	if (panel_funcs->disable)
+		panel_funcs->disable(state);
 
 	if (crtc_funcs->disable)
 		crtc_funcs->disable(state);
@@ -623,7 +664,8 @@ static int display_disable(struct display_state *state)
 	if (conn_funcs->disable)
 		conn_funcs->disable(state);
 
-	rockchip_panel_unprepare(state);
+	if (panel_funcs->unprepare)
+		panel_funcs->unprepare(state);
 
 	if (conn_funcs->unprepare)
 		conn_funcs->unprepare(state);
diff --git a/drivers/video/drm/rockchip_dsi_panel.c b/drivers/video/drm/rockchip_dsi_panel.c
deleted file mode 100755
index 95ffa3238e..0000000000
--- a/drivers/video/drm/rockchip_dsi_panel.c
+++ /dev/null
@@ -1,411 +0,0 @@
-/*
- * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <config.h>
-#include <common.h>
-#include <errno.h>
-#include <malloc.h>
-#include <asm/unaligned.h>
-#include <linux/list.h>
-#include <linux/media-bus-format.h>
-#include <dm/uclass.h>
-#include <dm/uclass-id.h>
-#include <video.h>
-#include <dm/device.h>
-#include <dm/uclass-internal.h>
-#include <backlight.h>
-#include <power/regulator.h>
-#include <asm/gpio.h>
-
-#include "rockchip_display.h"
-#include "rockchip_crtc.h"
-#include "rockchip_connector.h"
-#include "rockchip_panel.h"
-#include "rockchip_mipi_dsi.h"
-
-#define msleep(a)	udelay(a * 1000)
-
-struct dsi_ctrl_hdr {
-	u8 dtype;	/* data type */
-	u8 wait;	/* ms */
-	u8 dlen;	/* payload len */
-} __packed;
-
-struct dsi_cmd_desc {
-	struct dsi_ctrl_hdr dchdr;
-	u8 *payload;
-};
-
-struct dsi_panel_cmds {
-	u8 *buf;
-	int blen;
-	struct dsi_cmd_desc *cmds;
-	int cmd_cnt;
-};
-
-struct rockchip_dsi_panel {
-	struct udevice *dev;
-	const void *blob;
-	ofnode node;
-
-	int bus_format;
-
-	struct udevice *power_supply;
-	bool power_invert;
-	struct udevice *backlight;
-	struct gpio_desc enable;
-	struct gpio_desc reset;
-
-	unsigned int delay_reset;
-	unsigned int delay_prepare;
-	unsigned int delay_unprepare;
-	unsigned int delay_enable;
-	unsigned int delay_disable;
-	unsigned int delay_init;
-
-	struct dsi_panel_cmds *on_cmds;
-	struct dsi_panel_cmds *off_cmds;
-};
-
-static int rockchip_dsi_panel_parse_cmds(ofnode node,
-					 const u8 *data, int blen,
-					 struct dsi_panel_cmds *pcmds)
-{
-	int len;
-	u8 *buf, *bp;
-	struct dsi_ctrl_hdr *dchdr;
-	int i, cnt;
-
-	if (!pcmds)
-		return -EINVAL;
-
-	buf = malloc(sizeof(char) * blen);
-	if (!buf)
-		return -ENOMEM;
-
-	memcpy(buf, data, blen);
-
-	/* scan dcs commands */
-	bp = buf;
-	len = blen;
-	cnt = 0;
-	while (len > sizeof(*dchdr)) {
-		dchdr = (struct dsi_ctrl_hdr *)bp;
-		if (dchdr->dlen > len) {
-			printf("%s: dtsi cmd=%x error, len=%d",
-			       __func__, dchdr->dtype, dchdr->dlen);
-			free(buf);
-			return -ENOMEM;
-		}
-
-		bp += sizeof(*dchdr);
-		len -= sizeof(*dchdr);
-		bp += dchdr->dlen;
-		len -= dchdr->dlen;
-		cnt++;
-	}
-
-	if (len != 0) {
-		printf("%s: dcs_cmd=%x len=%d error!", __func__, buf[0], blen);
-		free(buf);
-		return -ENOMEM;
-	}
-
-	pcmds->cmds = malloc(cnt * sizeof(struct dsi_cmd_desc));
-	if (!pcmds->cmds) {
-		free(buf);
-		return -ENOMEM;
-	}
-
-	pcmds->cmd_cnt = cnt;
-	pcmds->buf = buf;
-	pcmds->blen = blen;
-
-	bp = buf;
-	len = blen;
-	for (i = 0; i < cnt; i++) {
-		dchdr = (struct dsi_ctrl_hdr *)bp;
-		len -= sizeof(*dchdr);
-		bp += sizeof(*dchdr);
-		pcmds->cmds[i].dchdr = *dchdr;
-		pcmds->cmds[i].payload = bp;
-		bp += dchdr->dlen;
-		len -= dchdr->dlen;
-	}
-
-	debug("%s: total_len=%d, cmd_cnt=%d\n",
-	      __func__, pcmds->blen, pcmds->cmd_cnt);
-	return 0;
-}
-
-static int rockchip_dsi_panel_send_cmds(struct display_state *state,
-					struct dsi_panel_cmds *cmds)
-{
-	int i, ret;
-
-	if (!cmds)
-		return -EINVAL;
-
-	for (i = 0; i < cmds->cmd_cnt; i++) {
-		switch (cmds->cmds[i].dchdr.dtype) {
-		case MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM:
-		case MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM:
-		case MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM:
-		case MIPI_DSI_GENERIC_LONG_WRITE:
-			ret = mipi_dsi_generic_write(state, cmds->cmds[i].payload,
-						     cmds->cmds[i].dchdr.dlen);
-			break;
-		case MIPI_DSI_DCS_SHORT_WRITE:
-		case MIPI_DSI_DCS_SHORT_WRITE_PARAM:
-		case MIPI_DSI_DCS_LONG_WRITE:
-			ret = mipi_dsi_dcs_write(state, cmds->cmds[i].payload,
-						 cmds->cmds[i].dchdr.dlen);
-			break;
-		default:
-			return -EINVAL;
-		}
-
-		if (ret)
-			printf("failed to write cmd%d: %d\n", i, ret);
-
-		if (cmds->cmds[i].dchdr.wait)
-			msleep(cmds->cmds[i].dchdr.wait);
-	}
-
-	return 0;
-}
-
-static int rockchip_dsi_panel_prepare(struct display_state *state)
-{
-	struct panel_state *panel_state = &state->panel_state;
-	struct rockchip_dsi_panel *panel = panel_state->private;
-	int ret;
-
-	if (panel->power_supply) {
-		ret = regulator_set_enable(panel->power_supply,
-					   panel->power_invert);
-		if (ret)
-			printf("%s: failed to enable power_supply",
-			       __func__);
-	}
-
-	dm_gpio_set_value(&panel->enable, 1);
-	msleep(panel->delay_prepare);
-
-	dm_gpio_set_value(&panel->reset, 1);
-	msleep(panel->delay_reset);
-	dm_gpio_set_value(&panel->reset, 0);
-
-	msleep(panel->delay_init);
-
-	if (panel->on_cmds) {
-		ret = rockchip_dsi_panel_send_cmds(state, panel->on_cmds);
-		if (ret)
-			printf("failed to send on cmds: %d\n", ret);
-	}
-
-	return 0;
-}
-
-static int rockchip_dsi_panel_unprepare(struct display_state *state)
-{
-	struct panel_state *panel_state = &state->panel_state;
-	struct rockchip_dsi_panel *panel = panel_state->private;
-	int ret;
-
-	if (panel->off_cmds) {
-		ret = rockchip_dsi_panel_send_cmds(state, panel->off_cmds);
-		if (ret)
-			printf("failed to send on cmds: %d\n", ret);
-	}
-
-	dm_gpio_set_value(&panel->reset, 0);
-
-	mdelay(panel->delay_unprepare);
-
-	dm_gpio_set_value(&panel->enable, 0);
-
-	return 0;
-}
-
-static int rockchip_dsi_panel_enable(struct display_state *state)
-{
-	struct panel_state *panel_state = &state->panel_state;
-	struct rockchip_dsi_panel *panel = panel_state->private;
-	int ret;
-
-	if (panel->backlight) {
-		ret = backlight_enable(panel->backlight);
-		mdelay(panel->delay_enable);
-		return ret;
-	}
-
-	return 0;
-}
-
-static int rockchip_dsi_panel_disable(struct display_state *state)
-{
-	struct panel_state *panel_state = &state->panel_state;
-	struct rockchip_dsi_panel *panel = panel_state->private;
-	int ret;
-
-	if (panel->backlight) {
-		ret = backlight_disable(panel->backlight);
-		mdelay(panel->delay_disable);
-		return ret;
-	}
-
-	return 0;
-}
-
-static int rockchip_dsi_panel_parse_dt(ofnode node, struct rockchip_dsi_panel *panel)
-{
-	const void *data;
-	int len = 0;
-	int ret = 0;
-
-	panel->delay_prepare = ofnode_read_u32_default(node, "prepare-delay-ms", 0);
-	panel->delay_unprepare = ofnode_read_u32_default(node, "unprepare-delay-ms", 0);
-	panel->delay_enable = ofnode_read_u32_default(node, "enable-delay-ms", 0);
-	panel->delay_disable = ofnode_read_u32_default(node, "disable-delay-ms", 0);
-	panel->delay_init = ofnode_read_u32_default(node, "init-delay-ms", 0);
-	panel->delay_reset = ofnode_read_u32_default(node, "reset-delay-ms", 0);
-	panel->bus_format = ofnode_read_u32_default(node, "bus-format", MEDIA_BUS_FMT_RBG888_1X24);
-
-	data = ofnode_get_property(node, "panel-init-sequence", &len);
-	if (data) {
-		panel->on_cmds = malloc(sizeof(*panel->on_cmds));
-		if (!panel->on_cmds)
-			return -ENOMEM;
-
-		ret = rockchip_dsi_panel_parse_cmds(node, data, len,
-						    panel->on_cmds);
-		if (ret) {
-			printf("failed to parse panel init sequence\n");
-			goto free_on_cmds;
-		}
-	}
-
-	data = ofnode_get_property(node, "panel-exit-sequence", &len);
-	if (data) {
-		panel->off_cmds = malloc(sizeof(*panel->off_cmds));
-		if (!panel->off_cmds) {
-			ret = -ENOMEM;
-			goto free_on_cmds;
-		}
-
-		ret = rockchip_dsi_panel_parse_cmds(node, data, len,
-						    panel->off_cmds);
-		if (ret) {
-			printf("failed to parse panel exit sequence\n");
-			goto free_cmds;
-		}
-	}
-
-	ret = uclass_get_device_by_phandle(UCLASS_PANEL_BACKLIGHT, panel->dev,
-					   "backlight", &panel->backlight);
-	if (ret) {
-		printf("%s: Cannot get backlight: ret=%d\n", __func__, ret);
-		return ret;
-	}
-
-	ret = gpio_request_by_name(panel->dev, "enable-gpios", 0,
-				   &panel->enable, GPIOD_IS_OUT);
-	if (ret && ret != -ENOENT) {
-		printf("%s: Warning: cannot get enable GPIO: ret=%d\n",
-		      __func__, ret);
-		return ret;
-	}
-
-	ret = gpio_request_by_name(panel->dev, "reset-gpios", 0,
-				   &panel->reset, GPIOD_IS_OUT);
-	if (ret && ret != -ENOENT) {
-		printf("%s: Warning: cannot get reset GPIO: ret=%d\n",
-		      __func__, ret);
-		return ret;
-	}
-
-	ret = uclass_get_device_by_phandle(UCLASS_REGULATOR, panel->dev,
-					   "power-supply",
-					   &panel->power_supply);
-	if (ret && ret != -ENOENT) {
-		printf("%s: Cannot get power supply: ret=%d\n", __func__, ret);
-		return ret;
-	}
-
-	panel->power_invert = !!ofnode_read_u32_default(node, "power_invert", 0);
-
-	/* keep panel blank on init. */
-	dm_gpio_set_value(&panel->enable, 0);
-	dm_gpio_set_value(&panel->reset, 0);
-
-	return 0;
-
-free_cmds:
-	free(panel->off_cmds);
-free_on_cmds:
-	free(panel->on_cmds);
-	return ret;
-}
-
-static int rockchip_dsi_panel_init(struct display_state *state)
-{
-	const void *blob = state->blob;
-	struct connector_state *conn_state = &state->conn_state;
-	struct panel_state *panel_state = &state->panel_state;
-	ofnode node = panel_state->node;
-	struct rockchip_dsi_panel *panel;
-	int ret;
-
-	panel = malloc(sizeof(*panel));
-	if (!panel)
-		return -ENOMEM;
-
-	memset(panel, 0, sizeof(*panel));
-
-	panel->blob = blob;
-	panel->node = node;
-	panel->dev = panel_state->dev;
-	panel_state->private = panel;
-
-	ret = rockchip_dsi_panel_parse_dt(node, panel);
-	if (ret) {
-		printf("%s: failed to parse DT\n", __func__);
-		free(panel);
-		return ret;
-	}
-
-	conn_state->bus_format = panel->bus_format;
-
-	return 0;
-}
-
-static void rockchip_dsi_panel_deinit(struct display_state *state)
-{
-	struct panel_state *panel_state = &state->panel_state;
-	struct rockchip_dsi_panel *panel = panel_state->private;
-
-	if (panel->on_cmds) {
-		free(panel->on_cmds->buf);
-		free(panel->on_cmds->cmds);
-	}
-
-	if (panel->off_cmds) {
-		free(panel->off_cmds->buf);
-		free(panel->off_cmds->cmds);
-	}
-
-	free(panel);
-}
-
-const struct rockchip_panel_funcs rockchip_dsi_panel_funcs = {
-	.init		= rockchip_dsi_panel_init,
-	.deinit		= rockchip_dsi_panel_deinit,
-	.prepare	= rockchip_dsi_panel_prepare,
-	.unprepare	= rockchip_dsi_panel_unprepare,
-	.enable		= rockchip_dsi_panel_enable,
-	.disable	= rockchip_dsi_panel_disable,
-};
diff --git a/drivers/video/drm/rockchip_panel.c b/drivers/video/drm/rockchip_panel.c
index 5e0e85d7e1..69b056d062 100644
--- a/drivers/video/drm/rockchip_panel.c
+++ b/drivers/video/drm/rockchip_panel.c
@@ -4,193 +4,437 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
-#include <asm/unaligned.h>
 #include <config.h>
 #include <common.h>
 #include <errno.h>
+#include <malloc.h>
+#include <video.h>
+#include <backlight.h>
+#include <asm/gpio.h>
 #include <dm/device.h>
+#include <dm/read.h>
+#include <dm/uclass.h>
+#include <dm/uclass-id.h>
+#include <linux/media-bus-format.h>
+#include <power/regulator.h>
 
 #include "rockchip_display.h"
 #include "rockchip_crtc.h"
 #include "rockchip_connector.h"
+#include "rockchip_mipi_dsi.h"
 #include "rockchip_panel.h"
 
-#ifdef CONFIG_DRM_ROCKCHIP_PANEL
-static const struct drm_display_mode auo_b125han03_mode = {
-	.clock = 146900,
-	.hdisplay = 1920,
-	.hsync_start = 1920 + 48,
-	.hsync_end = 1920 + 48 + 32,
-	.htotal = 1920 + 48 + 32 + 140,
-	.vdisplay = 1080,
-	.vsync_start = 1080 + 2,
-	.vsync_end = 1080 + 2 + 5,
-	.vtotal = 1080 + 2 + 5 + 57,
-	.vrefresh = 60,
-	.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
-};
+struct rockchip_cmd_header {
+	u8 data_type;
+	u8 delay_ms;
+	u8 payload_length;
+} __packed;
 
-static const struct drm_display_mode lg_lp079qx1_sp0v_mode = {
-	.clock = 200000,
-	.hdisplay = 1536,
-	.hsync_start = 1536 + 12,
-	.hsync_end = 1536 + 12 + 16,
-	.htotal = 1536 + 12 + 16 + 48,
-	.vdisplay = 2048,
-	.vsync_start = 2048 + 8,
-	.vsync_end = 2048 + 8 + 4,
-	.vtotal = 2048 + 8 + 4 + 8,
-	.vrefresh = 60,
-	.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
+struct rockchip_cmd_desc {
+	struct rockchip_cmd_header header;
+	const u8 *payload;
 };
 
-static const struct rockchip_panel simple_panel_data = {
-	.funcs = &panel_simple_funcs,
+struct rockchip_panel_cmds {
+	struct rockchip_cmd_desc *cmds;
+	int cmd_cnt;
 };
 
-static const struct rockchip_panel lg_lp079qx1_sp0v_data = {
-	.funcs = &panel_simple_funcs,
-	.data = &lg_lp079qx1_sp0v_mode,
+struct rockchip_panel_plat {
+	bool power_invert;
+	u32 bus_format;
+
+	struct {
+		unsigned int prepare;
+		unsigned int unprepare;
+		unsigned int enable;
+		unsigned int disable;
+		unsigned int reset;
+		unsigned int init;
+	} delay;
+
+	struct rockchip_panel_cmds *on_cmds;
+	struct rockchip_panel_cmds *off_cmds;
 };
 
-static const struct rockchip_panel auo_b125han03_data = {
-	.funcs = &panel_simple_funcs,
-	.data = &auo_b125han03_mode,
+struct rockchip_panel_priv {
+	bool prepared;
+	bool enabled;
+	struct udevice *power_supply;
+	struct udevice *backlight;
+	struct gpio_desc enable_gpio;
+	struct gpio_desc reset_gpio;
 };
-#endif
 
-#ifdef CONFIG_DRM_ROCKCHIP_DSI_PANEL
-static const struct rockchip_panel simple_panel_dsi_data = {
-	.funcs = &rockchip_dsi_panel_funcs,
-};
-#endif
+static int rockchip_panel_parse_cmds(const u8 *data, int length,
+				     struct rockchip_panel_cmds *pcmds)
+{
+	int len;
+	const u8 *buf;
+	const struct rockchip_cmd_header *header;
+	int i, cnt = 0;
+
+	/* scan commands */
+	cnt = 0;
+	buf = data;
+	len = length;
+	while (len > sizeof(*header)) {
+		header = (const struct rockchip_cmd_header *)buf;
+		buf += sizeof(*header) + header->payload_length;
+		len -= sizeof(*header) + header->payload_length;
+		cnt++;
+	}
 
-static const struct udevice_id rockchip_panel_ids[] = {
-#ifdef CONFIG_DRM_ROCKCHIP_PANEL
-	{
-		.compatible = "simple-panel",
-		.data = (ulong)&simple_panel_data,
-	}, {
-		.compatible = "lg,lp079qx1-sp0v",
-		.data = (ulong)&lg_lp079qx1_sp0v_data,
-	}, {
-		.compatible = "auo,b125han03",
-		.data = (ulong)&auo_b125han03_data,
-	},
-#endif
-#ifdef CONFIG_DRM_ROCKCHIP_DSI_PANEL
-	{
-		.compatible = "simple-panel-dsi",
-		.data = (ulong)&simple_panel_dsi_data,
-	},
-#endif
-	{}
-};
+	pcmds->cmds = calloc(cnt, sizeof(struct rockchip_cmd_desc));
+	if (!pcmds->cmds)
+		return -ENOMEM;
+
+	pcmds->cmd_cnt = cnt;
+
+	buf = data;
+	len = length;
+	for (i = 0; i < cnt; i++) {
+		struct rockchip_cmd_desc *desc = &pcmds->cmds[i];
+
+		header = (const struct rockchip_cmd_header *)buf;
+		length -= sizeof(*header);
+		buf += sizeof(*header);
+		desc->header.data_type = header->data_type;
+		desc->header.delay_ms = header->delay_ms;
+		desc->header.payload_length = header->payload_length;
+		desc->payload = buf;
+		buf += header->payload_length;
+		length -= header->payload_length;
+	}
 
-static int rockchip_panel_probe(struct udevice *dev)
-{
 	return 0;
 }
 
-static int rockchip_panel_bind(struct udevice *dev)
+static int rockchip_panel_send_cmds(struct display_state *state,
+				    struct rockchip_panel_cmds *cmds)
 {
+	int i, ret;
+
+	if (!cmds)
+		return -EINVAL;
+
+	for (i = 0; i < cmds->cmd_cnt; i++) {
+		struct rockchip_cmd_desc *desc = &cmds->cmds[i];
+
+		switch (desc->header.data_type) {
+		case MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM:
+		case MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM:
+		case MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM:
+		case MIPI_DSI_GENERIC_LONG_WRITE:
+			ret = mipi_dsi_generic_write(state, desc->payload,
+						     desc->header.payload_length);
+			break;
+		case MIPI_DSI_DCS_SHORT_WRITE:
+		case MIPI_DSI_DCS_SHORT_WRITE_PARAM:
+		case MIPI_DSI_DCS_LONG_WRITE:
+			ret = mipi_dsi_dcs_write(state, desc->payload,
+						 desc->header.payload_length);
+			break;
+		default:
+			printf("unsupport command data type: %d\n",
+			       desc->header.data_type);
+			return -EINVAL;
+		}
+
+		if (ret) {
+			printf("failed to write cmd%d: %d\n", i, ret);
+			return ret;
+		}
+
+		if (desc->header.delay_ms)
+			mdelay(desc->header.delay_ms);
+	}
+
 	return 0;
 }
 
-U_BOOT_DRIVER(rockchip_panel) = {
-	.name = "rockchip_panel",
-	.id = UCLASS_PANEL,
-	.of_match = rockchip_panel_ids,
-	.bind	= rockchip_panel_bind,
-	.probe	= rockchip_panel_probe,
-};
-
-const struct drm_display_mode *
-rockchip_get_display_mode_from_panel(struct display_state *state)
+static int rockchip_panel_prepare(struct display_state *state)
 {
 	struct panel_state *panel_state = &state->panel_state;
-	const struct rockchip_panel *panel = panel_state->panel;
+	struct rockchip_panel_plat *plat = dev_get_platdata(panel_state->dev);
+	struct rockchip_panel_priv *priv = dev_get_priv(panel_state->dev);
+	int ret;
+
+	if (priv->prepared)
+		return 0;
+
+	if (priv->power_supply) {
+		ret = regulator_set_enable(priv->power_supply,
+					   !plat->power_invert);
+		if (ret) {
+			printf("%s: failed to enable power supply", __func__);
+			return ret;
+		}
+	}
 
-	if (!panel || !panel->data)
-		return NULL;
+	dm_gpio_set_value(&priv->enable_gpio, 1);
+	mdelay(plat->delay.prepare);
 
-	return (const struct drm_display_mode *)panel->data;
-}
+	dm_gpio_set_value(&priv->reset_gpio, 1);
+	mdelay(plat->delay.reset);
+	dm_gpio_set_value(&priv->reset_gpio, 0);
 
-int rockchip_panel_init(struct display_state *state)
-{
-	struct panel_state *panel_state = &state->panel_state;
-	const struct rockchip_panel *panel = panel_state->panel;
+	mdelay(plat->delay.init);
 
-	if (!panel || !panel->funcs || !panel->funcs->init) {
-		printf("%s: failed to find panel init funcs\n", __func__);
-		return -ENODEV;
+	if (plat->on_cmds) {
+		ret = rockchip_panel_send_cmds(state, plat->on_cmds);
+		if (ret)
+			printf("failed to send on cmds: %d\n", ret);
 	}
 
-	return panel->funcs->init(state);
+	priv->prepared = true;
+
+	return 0;
 }
 
-void rockchip_panel_deinit(struct display_state *state)
+static void rockchip_panel_unprepare(struct display_state *state)
 {
 	struct panel_state *panel_state = &state->panel_state;
-	const struct rockchip_panel *panel = panel_state->panel;
+	struct rockchip_panel_plat *plat = dev_get_platdata(panel_state->dev);
+	struct rockchip_panel_priv *priv = dev_get_priv(panel_state->dev);
+	int ret;
 
-	if (!panel || !panel->funcs || !panel->funcs->deinit) {
-		printf("%s: failed to find panel deinit funcs\n", __func__);
+	if (!priv->prepared)
 		return;
+
+	if (plat->off_cmds) {
+		ret = rockchip_panel_send_cmds(state, plat->off_cmds);
+		if (ret)
+			printf("failed to send off cmds: %d\n", ret);
 	}
 
-	panel->funcs->deinit(state);
+	dm_gpio_set_value(&priv->reset_gpio, 1);
+	dm_gpio_set_value(&priv->enable_gpio, 0);
+
+	if (priv->power_supply) {
+		ret = regulator_set_enable(priv->power_supply,
+					   plat->power_invert);
+		if (ret)
+			printf("%s: failed to disable power supply", __func__);
+	}
+
+	mdelay(plat->delay.unprepare);
+
+	priv->prepared = false;
 }
 
-int rockchip_panel_prepare(struct display_state *state)
+static int rockchip_panel_enable(struct display_state *state)
 {
 	struct panel_state *panel_state = &state->panel_state;
-	const struct rockchip_panel *panel = panel_state->panel;
+	struct rockchip_panel_plat *plat = dev_get_platdata(panel_state->dev);
+	struct rockchip_panel_priv *priv = dev_get_priv(panel_state->dev);
 
-	if (!panel || !panel->funcs || !panel->funcs->prepare) {
-		printf("%s: failed to find panel prepare funcs\n", __func__);
-		return -ENODEV;
-	}
+	if (priv->enabled)
+		return 0;
+
+	mdelay(plat->delay.enable);
+
+	if (priv->backlight)
+		backlight_enable(priv->backlight);
 
-	return panel->funcs->prepare(state);
+	priv->enabled = true;
+
+	return 0;
 }
 
-int rockchip_panel_unprepare(struct display_state *state)
+static void rockchip_panel_disable(struct display_state *state)
 {
 	struct panel_state *panel_state = &state->panel_state;
-	const struct rockchip_panel *panel = panel_state->panel;
+	struct rockchip_panel_plat *plat = dev_get_platdata(panel_state->dev);
+	struct rockchip_panel_priv *priv = dev_get_priv(panel_state->dev);
 
-	if (!panel || !panel->funcs || !panel->funcs->unprepare) {
-		printf("%s: failed to find panel unprepare funcs\n", __func__);
-		return -ENODEV;
-	}
+	if (!priv->enabled)
+		return;
+
+	if (priv->backlight)
+		backlight_disable(priv->backlight);
+
+	mdelay(plat->delay.disable);
 
-	return panel->funcs->unprepare(state);
+	priv->enabled = false;
 }
 
-int rockchip_panel_enable(struct display_state *state)
+static int rockchip_panel_init(struct display_state *state)
 {
+	struct connector_state *conn_state = &state->conn_state;
 	struct panel_state *panel_state = &state->panel_state;
-	const struct rockchip_panel *panel = panel_state->panel;
+	struct rockchip_panel_plat *plat = dev_get_platdata(panel_state->dev);
 
-	if (!panel || !panel->funcs || !panel->funcs->enable) {
-		printf("%s: failed to find panel prepare funcs\n", __func__);
-		return -ENODEV;
+	conn_state->bus_format = plat->bus_format;
+
+	return 0;
+}
+
+static const struct rockchip_panel_funcs rockchip_panel_funcs = {
+	.init = rockchip_panel_init,
+	.prepare = rockchip_panel_prepare,
+	.unprepare = rockchip_panel_unprepare,
+	.enable = rockchip_panel_enable,
+	.disable = rockchip_panel_disable,
+};
+
+static int rockchip_panel_ofdata_to_platdata(struct udevice *dev)
+{
+	struct rockchip_panel_plat *plat = dev_get_platdata(dev);
+	const void *data;
+	int len = 0;
+	int ret;
+
+	plat->power_invert = dev_read_bool(dev, "power-invert");
+
+	plat->delay.prepare = dev_read_u32_default(dev, "prepare-delay-ms", 0);
+	plat->delay.unprepare = dev_read_u32_default(dev, "unprepare-delay-ms", 0);
+	plat->delay.enable = dev_read_u32_default(dev, "enable-delay-ms", 0);
+	plat->delay.disable = dev_read_u32_default(dev, "disable-delay-ms", 0);
+	plat->delay.init = dev_read_u32_default(dev, "init-delay-ms", 0);
+	plat->delay.reset = dev_read_u32_default(dev, "reset-delay-ms", 0);
+
+	plat->bus_format = dev_read_u32_default(dev, "bus-format",
+						MEDIA_BUS_FMT_RBG888_1X24);
+
+	data = dev_read_prop(dev, "panel-init-sequence", &len);
+	if (data) {
+		plat->on_cmds = calloc(1, sizeof(*plat->on_cmds));
+		if (!plat->on_cmds)
+			return -ENOMEM;
+
+		ret = rockchip_panel_parse_cmds(data, len, plat->on_cmds);
+		if (ret) {
+			printf("failed to parse panel init sequence\n");
+			goto free_on_cmds;
+		}
 	}
 
-	return panel->funcs->enable(state);
+	data = dev_read_prop(dev, "panel-exit-sequence", &len);
+	if (data) {
+		plat->off_cmds = calloc(1, sizeof(*plat->off_cmds));
+		if (!plat->off_cmds) {
+			ret = -ENOMEM;
+			goto free_on_cmds;
+		}
+
+		ret = rockchip_panel_parse_cmds(data, len, plat->off_cmds);
+		if (ret) {
+			printf("failed to parse panel exit sequence\n");
+			goto free_cmds;
+		}
+	}
+
+	return 0;
+
+free_cmds:
+	free(plat->off_cmds);
+free_on_cmds:
+	free(plat->on_cmds);
+	return ret;
 }
 
-int rockchip_panel_disable(struct display_state *state)
+static int rockchip_panel_probe(struct udevice *dev)
 {
-	struct panel_state *panel_state = &state->panel_state;
-	const struct rockchip_panel *panel = panel_state->panel;
+	struct rockchip_panel_priv *priv = dev_get_priv(dev);
+	int ret;
+
+	ret = gpio_request_by_name(dev, "enable-gpios", 0,
+				   &priv->enable_gpio, GPIOD_IS_OUT);
+	if (ret && ret != -ENOENT) {
+		printf("%s: Cannot get enable GPIO: %d\n", __func__, ret);
+		return ret;
+	}
+
+	ret = gpio_request_by_name(dev, "reset-gpios", 0,
+				   &priv->reset_gpio, GPIOD_IS_OUT);
+	if (ret && ret != -ENOENT) {
+		printf("%s: Cannot get reset GPIO: %d\n", __func__, ret);
+		return ret;
+	}
+
+	ret = uclass_get_device_by_phandle(UCLASS_PANEL_BACKLIGHT, dev,
+					   "backlight", &priv->backlight);
+	if (ret && ret != -ENOENT) {
+		printf("%s: Cannot get backlight: %d\n", __func__, ret);
+		return ret;
+	}
 
-	if (!panel || !panel->funcs || !panel->funcs->disable) {
-		printf("%s: failed to find panel disable funcs\n", __func__);
-		return -ENODEV;
+	ret = uclass_get_device_by_phandle(UCLASS_REGULATOR, dev,
+					   "power-supply", &priv->power_supply);
+	if (ret && ret != -ENOENT) {
+		printf("%s: Cannot get power supply: %d\n", __func__, ret);
+		return ret;
 	}
 
-	return panel->funcs->disable(state);
+	return 0;
 }
+
+static const struct drm_display_mode auo_b125han03_mode = {
+	.clock = 146900,
+	.hdisplay = 1920,
+	.hsync_start = 1920 + 48,
+	.hsync_end = 1920 + 48 + 32,
+	.htotal = 1920 + 48 + 32 + 140,
+	.vdisplay = 1080,
+	.vsync_start = 1080 + 2,
+	.vsync_end = 1080 + 2 + 5,
+	.vtotal = 1080 + 2 + 5 + 57,
+	.vrefresh = 60,
+	.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
+};
+
+static const struct rockchip_panel auo_b125han03_data = {
+	.funcs = &rockchip_panel_funcs,
+	.data = &auo_b125han03_mode,
+};
+
+static const struct drm_display_mode lg_lp079qx1_sp0v_mode = {
+	.clock = 200000,
+	.hdisplay = 1536,
+	.hsync_start = 1536 + 12,
+	.hsync_end = 1536 + 12 + 16,
+	.htotal = 1536 + 12 + 16 + 48,
+	.vdisplay = 2048,
+	.vsync_start = 2048 + 8,
+	.vsync_end = 2048 + 8 + 4,
+	.vtotal = 2048 + 8 + 4 + 8,
+	.vrefresh = 60,
+	.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
+};
+
+static const struct rockchip_panel lg_lp079qx1_sp0v_data = {
+	.funcs = &rockchip_panel_funcs,
+	.data = &lg_lp079qx1_sp0v_mode,
+};
+
+static const struct rockchip_panel rockchip_panel_data = {
+	.funcs = &rockchip_panel_funcs,
+};
+
+static const struct udevice_id rockchip_panel_ids[] = {
+	{
+		.compatible = "auo,b125han03",
+		.data = (ulong)&auo_b125han03_data,
+	}, {
+		.compatible = "lg,lp079qx1-sp0v",
+		.data = (ulong)&lg_lp079qx1_sp0v_data,
+	}, {
+		.compatible = "simple-panel",
+		.data = (ulong)&rockchip_panel_data,
+	}, {
+		.compatible = "simple-panel-dsi",
+		.data = (ulong)&rockchip_panel_data,
+	},
+	{}
+};
+
+U_BOOT_DRIVER(rockchip_panel) = {
+	.name = "rockchip_panel",
+	.id = UCLASS_PANEL,
+	.of_match = rockchip_panel_ids,
+	.ofdata_to_platdata = rockchip_panel_ofdata_to_platdata,
+	.probe = rockchip_panel_probe,
+	.priv_auto_alloc_size = sizeof(struct rockchip_panel_priv),
+	.platdata_auto_alloc_size = sizeof(struct rockchip_panel_plat),
+};
diff --git a/drivers/video/drm/rockchip_panel.h b/drivers/video/drm/rockchip_panel.h
index 1f4163ddff..c947c9e4c7 100644
--- a/drivers/video/drm/rockchip_panel.h
+++ b/drivers/video/drm/rockchip_panel.h
@@ -11,9 +11,9 @@ struct rockchip_panel_funcs {
 	int (*init)(struct display_state *state);
 	void (*deinit)(struct display_state *state);
 	int (*prepare)(struct display_state *state);
-	int (*unprepare)(struct display_state *state);
+	void (*unprepare)(struct display_state *state);
 	int (*enable)(struct display_state *state);
-	int (*disable)(struct display_state *state);
+	void (*disable)(struct display_state *state);
 };
 
 struct rockchip_panel {
@@ -21,20 +21,4 @@ struct rockchip_panel {
 	const void *data;
 };
 
-const struct rockchip_panel *rockchip_get_panel(const void *blob, int node);
-const struct drm_display_mode *
-rockchip_get_display_mode_from_panel(struct display_state *state);
-int rockchip_panel_init(struct display_state *state);
-void rockchip_panel_deinit(struct display_state *state);
-int rockchip_panel_enable(struct display_state *state);
-int rockchip_panel_disable(struct display_state *state);
-int rockchip_panel_prepare(struct display_state *state);
-int rockchip_panel_unprepare(struct display_state *state);
-
-#ifdef CONFIG_DRM_ROCKCHIP_PANEL
-extern const struct rockchip_panel_funcs panel_simple_funcs;
-#endif
-#ifdef CONFIG_DRM_ROCKCHIP_DSI_PANEL
-extern const struct rockchip_panel_funcs rockchip_dsi_panel_funcs;
-#endif
 #endif	/* _ROCKCHIP_PANEL_H_ */

commit cac6ce177760466e391694d52351bd4ddf3b4357
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Mar 5 15:13:39 2018 +0800

    video/drm: mipi-dphy: optimized power on/off sequences
    
    we can power off da_pwrok and bandgap to reduce power consumption.
    
    Change-Id: I0fa42d6d29ebd6f9347c9c4e868495df2bc07e05
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip-inno-mipi-dphy.c b/drivers/video/drm/rockchip-inno-mipi-dphy.c
index 7c054b90d9..78ea041ef7 100644
--- a/drivers/video/drm/rockchip-inno-mipi-dphy.c
+++ b/drivers/video/drm/rockchip-inno-mipi-dphy.c
@@ -21,6 +21,7 @@
 
 /* Innosilicon MIPI D-PHY registers */
 #define INNO_PHY_LANE_CTRL	0x00000
+#define MIPI_BGPD		BIT(7)
 #define CLK_LANE_EN_MASK	BIT(6)
 #define DATA_LANE_3_EN_MASK	BIT(5)
 #define DATA_LANE_2_EN_MASK	BIT(4)
@@ -31,6 +32,8 @@
 #define DATA_LANE_2_EN		BIT(4)
 #define DATA_LANE_1_EN		BIT(3)
 #define DATA_LANE_0_EN		BIT(2)
+#define PWROK_BP		BIT(1)
+#define PWROK			BIT(0)
 #define INNO_PHY_POWER_CTRL	0x00004
 #define ANALOG_RESET_MASK	BIT(2)
 #define ANALOG_RESET		BIT(2)
@@ -53,6 +56,8 @@
 #define DIGITAL_RESET_MASK	BIT(0)
 #define DIGITAL_NORMAL		BIT(0)
 #define DIGITAL_RESET		0
+#define INNO_PHY_LVDS_CTRL	0x003ac
+#define LVDS_BGPD		BIT(0)
 
 #define INNO_CLOCK_LANE_REG_BASE	0x00100
 #define INNO_DATA_LANE_0_REG_BASE	0x00180
@@ -462,11 +467,34 @@ static inline void inno_mipi_dphy_pll_ldo_enable(struct inno_mipi_dphy *inno)
 			 PLL_POWER_ON | LDO_POWER_ON);
 }
 
+static inline void inno_mipi_dphy_da_pwrok_enable(struct inno_mipi_dphy *inno)
+{
+	inno_update_bits(inno, INNO_PHY_LANE_CTRL, PWROK_BP | PWROK, PWROK);
+}
+
+static inline void inno_mipi_dphy_da_pwrok_disable(struct inno_mipi_dphy *inno)
+{
+	inno_update_bits(inno, INNO_PHY_LANE_CTRL, PWROK_BP | PWROK, PWROK_BP);
+}
+
+static inline void inno_mipi_dphy_bgpd_enable(struct inno_mipi_dphy *inno)
+{
+	inno_update_bits(inno, INNO_PHY_LANE_CTRL, MIPI_BGPD, 0);
+}
+
+static inline void inno_mipi_dphy_bgpd_disable(struct inno_mipi_dphy *inno)
+{
+	inno_update_bits(inno, INNO_PHY_LANE_CTRL, MIPI_BGPD, MIPI_BGPD);
+	inno_update_bits(inno, INNO_PHY_LVDS_CTRL, LVDS_BGPD, LVDS_BGPD);
+}
+
 static int inno_mipi_dphy_power_on(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
 	struct inno_mipi_dphy *inno = conn_state->phy_private;
 
+	inno_mipi_dphy_bgpd_enable(inno);
+	inno_mipi_dphy_da_pwrok_enable(inno);
 	inno_mipi_dphy_pll_ldo_enable(inno);
 	inno_mipi_dphy_lane_enable(inno);
 	inno_mipi_dphy_reset(inno);
@@ -488,6 +516,8 @@ static int inno_mipi_dphy_power_off(struct display_state *state)
 
 	inno_mipi_dphy_lane_disable(inno);
 	inno_mipi_dphy_pll_ldo_disable(inno);
+	inno_mipi_dphy_da_pwrok_disable(inno);
+	inno_mipi_dphy_bgpd_disable(inno);
 
 	return 0;
 }

commit 693b63de6ef39c1e4f9a33a2b9e90249a44311f8
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Tue Mar 20 21:19:04 2018 +0800

    clk: Don't break when set default rate unsuccessfully
    
    Change-Id: I8073d6a68602aa5a8bc79accb13e95fcb2142cfa
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index 2db84c1297..46c690ee79 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -190,7 +190,7 @@ static int clk_set_default_rates(struct udevice *dev)
 		if (ret < 0) {
 			debug("%s: failed to set rate on clock %d for %s\n",
 			      __func__, index, dev_read_name(dev));
-			break;
+			continue;
 		}
 	}
 

commit f91572913ea05d9665789828eeec562348f29ff9
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Wed Mar 21 11:14:54 2018 +0800

    clk: rockchip: px30: Fix saradc div mask
    
    Change-Id: I79ecf32b78b9c4b71fa7f03ef3fa4ca80a80e70d
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index d4e3bfa560..64446d3eb2 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -486,7 +486,7 @@ static ulong px30_saradc_get_clk(struct px30_cru *cru)
 	u32 div, con;
 
 	con = readl(&cru->clksel_con[55]);
-	div = con >> CLK_SARADC_DIV_CON_SHIFT & CLK_PWM_DIV_CON_MASK;
+	div = con >> CLK_SARADC_DIV_CON_SHIFT & CLK_SARADC_DIV_CON_MASK;
 
 	return DIV_TO_RATE(OSC_HZ, div);
 }

commit 81c94adb24d09b7be07ba1a89e973d150c6cd2bf
Author: qiujian <qiujian@rock-chips.com>
Date:   Wed Mar 21 09:10:44 2018 +0800

    rk3326: enable optee v2
    
    use security partition storage
    
    Change-Id: I977e70b5d09d10438ba58aed3872579d4e517be8
    Signed-off-by: qiujian <qiujian@rock-chips.com>

diff --git a/configs/evb-rk3326_defconfig b/configs/evb-rk3326_defconfig
index ff9a228208..8a33028559 100644
--- a/configs/evb-rk3326_defconfig
+++ b/configs/evb-rk3326_defconfig
@@ -88,4 +88,7 @@ CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V2=y
+CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
 CONFIG_TEST_ROCKCHIP=y

commit 98cc3d23a5bc5d999a0b04a623704ed65d2c9c08
Author: qiujian <qiujian@rock-chips.com>
Date:   Tue Mar 20 09:09:53 2018 +0800

    px30: support emmc rpmb
    
    Change-Id: Ie7fd2b747c2d5ad59e843a88d73396dfc796c9ae
    Signed-off-by: qiujian <qiujian@rock-chips.com>

diff --git a/include/configs/evb_px30.h b/include/configs/evb_px30.h
index b54fb7fd9c..ae92c55fdb 100644
--- a/include/configs/evb_px30.h
+++ b/include/configs/evb_px30.h
@@ -17,6 +17,7 @@
 
 #undef CONFIG_CONSOLE_SCROLL_LINES
 #define CONFIG_CONSOLE_SCROLL_LINES		10
+#define CONFIG_SUPPORT_EMMC_RPMB
 
 #undef CONFIG_BOOTCOMMAND
 #define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND

commit 91c73fb4d1535d65289ad40582d4ae8ca3067b44
Author: qiujian <qiujian@rock-chips.com>
Date:   Mon Mar 19 14:39:06 2018 +0800

    lib: optee_client:Support attestation
    
     Add methods to read attestation key from the misc partition of
     last 64K, store key and certificate chain data in secure storage.
    
     When CONFIG_OPTEE_CLIENT is defined,
     uboot support load attestation data.
    
    Change-Id: I8f3bd7096a7856de9e58d294822a818d5fe380ba
    Signed-off-by: qiujian <qiujian@rock-chips.com>

diff --git a/cmd/bootrkp.c b/cmd/bootrkp.c
index c64a3c5978..04b81b373a 100644
--- a/cmd/bootrkp.c
+++ b/cmd/bootrkp.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <android_bootloader.h>
+#include <attestation_key.h>
 #include <boot_rkimg.h>
 
 static int do_boot_rockchip(cmd_tbl_t *cmdtp, int flag, int argc,
@@ -18,6 +19,19 @@ static int do_boot_rockchip(cmd_tbl_t *cmdtp, int flag, int argc,
 	int ret = 0;
 
 	dev_desc = rockchip_get_bootdev();
+
+#ifdef CONFIG_OPTEE_CLIENT
+	disk_partition_t misc_part_info;
+
+	/* load attestation key from misc partition. */
+	ret = part_get_info_by_name(dev_desc, "misc",
+				    &misc_part_info);
+	if (ret < 0)
+		printf("%s Could not find misc partition\n", __func__);
+	else
+		load_attestation_key(dev_desc, &misc_part_info);
+#endif
+
 	mode = rockchip_get_boot_mode();
 	if (mode == BOOT_MODE_RECOVERY) {
 		boot_partname = PART_RECOVERY;
diff --git a/common/Makefile b/common/Makefile
index eded2f1d78..49b434923d 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -138,3 +138,5 @@ obj-$(CONFIG_$(SPL_)LOG) += log.o
 obj-$(CONFIG_$(SPL_)LOG_CONSOLE) += log_console.o
 obj-y += s_record.o
 obj-y += xyzModem.o
+
+obj-$(CONFIG_OPTEE_CLIENT) += attestation_key.o
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 725541c642..669c057ee7 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -15,6 +15,7 @@
 #include <malloc.h>
 #include <fs.h>
 #include <boot_rkimg.h>
+#include <attestation_key.h>
 
 #define ANDROID_PARTITION_BOOT "boot"
 #define ANDROID_PARTITION_MISC "misc"
@@ -480,6 +481,12 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 					 &misc_part_info);
 	if (part_num < 0)
 		printf("%s Could not find misc partition\n", __func__);
+
+#ifdef CONFIG_OPTEE_CLIENT
+	/* load attestation key from misc partition. */
+	load_attestation_key(dev_desc, &misc_part_info);
+#endif
+
 	mode = android_bootloader_load_and_clear_mode(dev_desc, &misc_part_info);
 	printf("ANDROID: reboot reason: \"%s\"\n", android_boot_mode_str(mode));
 
diff --git a/common/attestation_key.c b/common/attestation_key.c
new file mode 100644
index 0000000000..675e48a19b
--- /dev/null
+++ b/common/attestation_key.c
@@ -0,0 +1,381 @@
+/*
+ * Copyright 2018, Rockchip Electronics Co., Ltd
+ * qiujian, <qiujian@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include "attestation_key.h"
+
+#include <common.h>
+#include <malloc.h>
+
+#include <optee_include/OpteeClientApiLib.h>
+
+/* attestation data offset*/
+#define ATTESTATION_DATA_OFFSET  65536
+
+/* block size */
+#define ATTESTATION_DATA_BLOCK_SIZE 512
+
+/* attestation data block offset */
+#define ATTESTATION_DATA_BLOCK_OFFSET (ATTESTATION_DATA_OFFSET / ATTESTATION_DATA_BLOCK_SIZE)
+
+#define ATAP_BLOB_LEN_MAX 2048
+#define ATAP_CERT_CHAIN_LEN_MAX 8192
+#define ATAP_CERT_CHAIN_ENTRIES_MAX 8
+
+/*
+ * Name of the attestation key file is
+ * ATTESTATION_KEY_PREFIX.%algorithm,
+ * where algorithm is either "EC" or "RSA"
+ */
+#define ATTESTATION_KEY_PREFIX "PrivateKey"
+
+/*
+ * Name of the attestation certificate file is
+ * ATTESTATION_CERT_PREFIX.%algorithm.%index,
+ * where index is the index within the certificate chain.
+ */
+#define ATTESTATION_CERT_PREFIX "CertificateChain"
+
+/* Maximum file name size.*/
+#define STORAGE_ID_LENGTH_MAX  64
+
+typedef enum{
+	KM_ALGORITHM_RSA = 1,
+	KM_ALGORITHM_EC = 3,
+} keymaster_algorithm_t;
+
+typedef struct {
+	uint8_t *data;
+	uint32_t data_length;
+} atap_blob;
+
+typedef struct {
+	atap_blob entries[ATAP_CERT_CHAIN_ENTRIES_MAX];
+	uint32_t entry_count;
+} atap_certchain;
+
+uint32_t write_to_keymaster(uint8_t *filename, uint32_t filename_size,
+				uint8_t *data, uint32_t data_size);
+
+static const char *get_keyslot_str(keymaster_algorithm_t key_type)
+{
+	switch (key_type) {
+	case KM_ALGORITHM_RSA:
+		return "RSA";
+	case KM_ALGORITHM_EC:
+		return "EC";
+	default:
+		return "";
+	}
+}
+
+static void free_blob(atap_blob blob)
+{
+	if (blob.data)
+		free(blob.data);
+
+	blob.data_length = 0;
+}
+
+static void free_cert_chain(atap_certchain cert_chain)
+{
+	unsigned int i = 0;
+
+	for (i = 0; i < cert_chain.entry_count; ++i) {
+		if (cert_chain.entries[i].data)
+			free(cert_chain.entries[i].data);
+
+		cert_chain.entries[i].data_length = 0;
+	}
+	memset(&cert_chain, 0, sizeof(atap_certchain));
+}
+
+static void copy_from_buf(uint8_t **buf_ptr, void *data, uint32_t data_size)
+{
+	memcpy(data, *buf_ptr, data_size);
+	*buf_ptr += data_size;
+}
+
+static void copy_uint32_from_buf(uint8_t **buf_ptr, uint32_t *x)
+{
+	copy_from_buf(buf_ptr, x, sizeof(uint32_t));
+}
+
+static bool copy_blob_from_buf(uint8_t **buf_ptr, atap_blob *blob)
+{
+	memset(blob, 0, sizeof(atap_blob));
+	copy_uint32_from_buf(buf_ptr, &blob->data_length);
+
+	if (blob->data_length > ATAP_BLOB_LEN_MAX)
+		return false;
+
+	if (blob->data_length) {
+		blob->data = (uint8_t *) malloc(blob->data_length);
+		if (blob->data == NULL)
+			return false;
+
+		copy_from_buf(buf_ptr, blob->data, blob->data_length);
+	}
+	return true;
+}
+
+static bool copy_cert_chain_from_buf(uint8_t **buf_ptr,
+					atap_certchain *cert_chain)
+{
+	uint32_t cert_chain_size = 0;
+	int32_t bytes_remaining = 0;
+	size_t i = 0;
+	bool retval = true;
+
+	memset(cert_chain, 0, sizeof(atap_certchain));
+
+	/* Copy size of cert chain, as it is a Variable field. */
+	copy_from_buf(buf_ptr, &cert_chain_size, sizeof(cert_chain_size));
+
+	if (cert_chain_size > ATAP_CERT_CHAIN_LEN_MAX)
+		return false;
+
+	if (cert_chain_size == 0)
+		return true;
+
+	bytes_remaining = cert_chain_size;
+	for (i = 0; i < ATAP_CERT_CHAIN_ENTRIES_MAX; ++i) {
+		if (!copy_blob_from_buf(buf_ptr, &cert_chain->entries[i])) {
+			retval = false;
+			break;
+		}
+
+		++cert_chain->entry_count;
+		bytes_remaining -= (sizeof(uint32_t) +
+					cert_chain->entries[i].data_length);
+
+		if (bytes_remaining <= 0) {
+			retval = (bytes_remaining == 0);
+			break;
+		}
+	}
+	if (retval == false)
+		free_cert_chain(*cert_chain);
+
+	return retval;
+}
+
+/* validate attestation data head. */
+static bool validate_ca_header(const uint8_t *buf, uint32_t buf_size)
+{
+
+	if (buf[0] != 'C' || buf[1] != 'A' || buf[2] != 0)
+		return false;
+
+	uint32_t data_size;
+
+	memcpy(&data_size, buf + 3, sizeof(uint32_t));
+
+	if (data_size <= 0 || data_size > ATTESTATION_DATA_OFFSET) {
+		printf("invalide data_size:%d\n", data_size);
+		return false;
+	}
+
+	uint32_t real_size;
+
+	memcpy(&real_size, buf + 3 + sizeof(uint32_t), sizeof(uint32_t));
+	if (real_size <= 0 || real_size > data_size) {
+		printf("invalide real_size:%d\n", real_size);
+		return false;
+	}
+	return true;
+}
+
+/* write key to security storage. */
+static uint32_t write_key(keymaster_algorithm_t key_type,
+				const uint8_t *key, uint32_t key_size)
+{
+	char key_file[STORAGE_ID_LENGTH_MAX] = {0};
+
+	snprintf(key_file, STORAGE_ID_LENGTH_MAX, "%s.%s", ATTESTATION_KEY_PREFIX,
+		get_keyslot_str(key_type));
+	write_to_keymaster((uint8_t *)key_file, strlen(key_file),
+				(uint8_t *)key, key_size);
+	return 0;
+}
+
+/* write cert to security storage. */
+static uint32_t write_cert(keymaster_algorithm_t key_type, const uint8_t *cert,
+				uint32_t cert_size, uint32_t index)
+{
+	char cert_file[STORAGE_ID_LENGTH_MAX] = {0};
+
+	snprintf(cert_file, STORAGE_ID_LENGTH_MAX, "%s.%s.%d", ATTESTATION_CERT_PREFIX,
+		get_keyslot_str(key_type), index);
+	write_to_keymaster((uint8_t *)cert_file, strlen(cert_file),
+				(uint8_t *)cert, cert_size);
+	return 0;
+}
+
+/* write cert chain length to security storage. */
+static uint32_t write_cert_chain_length(keymaster_algorithm_t key_type,
+				uint8_t chain_len)
+{
+	char cert_chain_length_file[STORAGE_ID_LENGTH_MAX] = {0};
+	uint8_t data = chain_len;
+	uint32_t len = 1;
+
+	snprintf(cert_chain_length_file, STORAGE_ID_LENGTH_MAX, "%s.%s.length",
+		ATTESTATION_CERT_PREFIX, get_keyslot_str(key_type));
+	write_to_keymaster((uint8_t *)cert_chain_length_file,
+				strlen(cert_chain_length_file), &data, len);
+
+	return 0;
+}
+
+atap_result load_attestation_key(struct blk_desc *dev_desc,
+				disk_partition_t *misc_partition)
+{
+	int ret;
+
+	if (!dev_desc) {
+		printf("%s: Could not find device\n", __func__);
+		return ATAP_RESULT_ERROR_DEVICE_NOT_FOUND;
+	}
+
+	if (misc_partition == NULL) {
+		printf("misc partition not found!\n");
+		return ATAP_RESULT_ERROR_PARTITION_NOT_FOUND;
+	}
+
+	/* get attestation data offset from misc partition */
+	lbaint_t key_offset = misc_partition->start +
+				misc_partition->size - ATTESTATION_DATA_BLOCK_OFFSET;
+
+	/* read ca head from attestation data offset */
+	uint8_t ca_headr[ATTESTATION_DATA_BLOCK_SIZE];
+
+	ret = blk_dread(dev_desc, key_offset, 1, ca_headr);
+	if (ret != 1) {
+		printf("failed to read ca head from misc\n");
+		return ATAP_RESULT_ERROR_BLOCK_READ;
+	}
+
+	if (!validate_ca_header(ca_headr, sizeof(ca_headr))) {
+		printf("ca head not found\n");
+		return ATAP_RESULT_ERROR_INVALID_HEAD;
+	}
+
+	/* get attestation data size from ca head */
+	uint32_t real_size;
+
+	memcpy(&real_size, ca_headr + 3 + sizeof(uint32_t), sizeof(uint32_t));
+
+	/* calculate real block size of attestation data */
+	int real_block_num = real_size / ATTESTATION_DATA_BLOCK_SIZE;
+
+	if (real_size % ATTESTATION_DATA_BLOCK_SIZE != 0)
+		real_block_num++;
+
+	unsigned char keybuf[ATTESTATION_DATA_OFFSET] = {0};
+
+	/* check block size */
+	if (real_block_num <= 0 || real_block_num > ATTESTATION_DATA_BLOCK_OFFSET) {
+		printf("invalidate real_block_num:%d\n", real_block_num);
+		return ATAP_RESULT_ERROR_INVALID_BLOCK_NUM;
+	}
+
+	/* read all attestation data from misc */
+	if (blk_dread(dev_desc, key_offset, real_block_num, keybuf) != real_block_num) {
+		printf("failed to read misc key\n");
+		return ATAP_RESULT_ERROR_BLOCK_READ;
+	}
+
+	/* read device id from buf*/
+	uint32_t device_id_size = 0;
+	uint8_t device_id[32] = {0};
+
+	memcpy(&device_id_size, keybuf + 16, sizeof(uint32_t));
+	if (device_id_size < 0 || device_id_size > sizeof(device_id)) {
+		printf("invalidate device_id_size:%d\n", device_id_size);
+		return ATAP_RESULT_ERROR_INVALID_DEVICE_ID;
+	}
+
+	memcpy(device_id, keybuf + 16 + sizeof(uint32_t), device_id_size);
+	debug("device_id:%s\n", device_id);
+
+	/* read algorithm from buf */
+	uint8_t *key_buf = keybuf + 16 + sizeof(uint32_t) + device_id_size;
+	uint32_t algorithm;
+
+	copy_uint32_from_buf(&key_buf, &algorithm);
+	debug("\n algorithm:%d\n", algorithm);
+
+	/* read rsa private key */
+	atap_blob key;
+
+	if (copy_blob_from_buf(&key_buf, &key) == false) {
+		printf("copy_blob_from_buf failed!\n");
+		return ATAP_RESULT_ERROR_BUF_COPY;
+	}
+	/* write rsa private key to security storage*/
+	write_key(KM_ALGORITHM_RSA, key.data, key.data_length);
+
+	/* read rsa cert chain */
+	atap_certchain certchain;
+
+	if (copy_cert_chain_from_buf(&key_buf, &certchain) == false) {
+		printf("copy_cert_chain_from_buf failed!\n");
+		return ATAP_RESULT_ERROR_BUF_COPY;
+	}
+
+	/* write rsa cert chain size to security storage*/
+	write_cert_chain_length(KM_ALGORITHM_RSA,
+				(uint8_t) certchain.entry_count);
+
+	/* write rsa cert chain data to security storage*/
+	int i = 0;
+
+	for (i = 0; i < certchain.entry_count; ++i) {
+		write_cert(KM_ALGORITHM_RSA, certchain.entries[i].data,
+			certchain.entries[i].data_length, i);
+	}
+
+	/* read ec algorithm */
+	copy_uint32_from_buf(&key_buf, &algorithm);
+	debug("\n algorithm:%d\n", algorithm);
+
+	/* read ec private key */
+	free_blob(key);
+	if (copy_blob_from_buf(&key_buf, &key) == false) {
+		printf("copy_blob_from_buf failed!\n");
+		return ATAP_RESULT_ERROR_BUF_COPY;
+	}
+
+	/* write ec private key to security storage*/
+	write_key(KM_ALGORITHM_EC, key.data, key.data_length);
+
+	/* read ec cert chain */
+	free_cert_chain(certchain);
+	if (copy_cert_chain_from_buf(&key_buf, &certchain) == false) {
+		printf("copy_cert_chain_from_buf failed!\n");
+		return ATAP_RESULT_ERROR_BUF_COPY;
+	}
+	/* write ec cert chain size to security storage*/
+	write_cert_chain_length(KM_ALGORITHM_EC,
+					(uint8_t) certchain.entry_count);
+
+	/* write ec cert chain to security storage*/
+	for (i = 0; i < certchain.entry_count; ++i) {
+		write_cert(KM_ALGORITHM_EC, certchain.entries[i].data,
+			certchain.entries[i].data_length, i);
+	}
+
+	memset(keybuf, 0, sizeof(keybuf));
+
+	/* wipe attestation data from misc*/
+	if (blk_dwrite(dev_desc, key_offset, real_block_num, keybuf) != real_block_num) {
+		printf("StorageWriteLba failed\n");
+		return ATAP_RESULT_ERROR_BLOCK_WRITE;
+	}
+
+	return ATAP_RESULT_OK;
+}
diff --git a/include/attestation_key.h b/include/attestation_key.h
new file mode 100644
index 0000000000..0eb09069f2
--- /dev/null
+++ b/include/attestation_key.h
@@ -0,0 +1,30 @@
+/*
+ * Copyright 2018, Rockchip Electronics Co., Ltd
+ * qiujian, <qiujian@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef ATTESTATION_KEY_H_
+#define ATTESTATION_KEY_H_
+
+#include <common.h>
+
+typedef enum {
+	ATAP_RESULT_OK,
+	ATAP_RESULT_ERROR_DEVICE_NOT_FOUND,
+	ATAP_RESULT_ERROR_PARTITION_NOT_FOUND,
+	ATAP_RESULT_ERROR_BLOCK_READ,
+	ATAP_RESULT_ERROR_BLOCK_WRITE,
+	ATAP_RESULT_ERROR_INVALID_HEAD,
+	ATAP_RESULT_ERROR_INVALID_BLOCK_NUM,
+	ATAP_RESULT_ERROR_INVALID_DEVICE_ID,
+	ATAP_RESULT_ERROR_BUF_COPY,
+	ATAP_RESULT_ERROR_STORAGE,
+} atap_result;
+
+/* load attestation key from misc partition. */
+atap_result load_attestation_key(struct blk_desc *dev_desc,
+				disk_partition_t *misc_partition);
+
+#endif	//ATTESTATION_KEY_H_

commit 3251364c8e16e8346c2edf3a3454739af0dc03aa
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Mon Mar 19 08:58:50 2018 +0800

    lib: optee_client: support rk file system for optee v2
    
    uboot can secure store data to nand or emmc "security"
    partition for optee v2
    
    Change-Id: I85abbfb3970a2fa3f46f540d3f16dfc7ca605317
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/include/optee_include/OpteeClientRkFs-v2.h b/include/optee_include/OpteeClientRkFs-v2.h
new file mode 100644
index 0000000000..a8ee4d6c5b
--- /dev/null
+++ b/include/optee_include/OpteeClientRkFs-v2.h
@@ -0,0 +1,75 @@
+/*
+ * Copyright (c) 2016, Fuzhou Rockchip Electronics Co.,Ltd.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef TEE_SUPP_RK_FS_H
+#define TEE_SUPP_RK_FS_H
+
+#define TEE_IOCTL_PARAM_ATTR_TYPE_MASK		0xff
+#define TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_INPUT	1
+#define TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_OUTPUT	2
+#define TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_INOUT	3	/* input and output */
+
+#define TEE_IOCTL_PARAM_ATTR_TYPE_MEMREF_INPUT	5
+#define TEE_IOCTL_PARAM_ATTR_TYPE_MEMREF_OUTPUT	6
+#define TEE_IOCTL_PARAM_ATTR_TYPE_MEMREF_INOUT	7	/* input and output */
+
+struct tee_ioctl_param_memref {
+	uint64_t shm_offs;
+	uint64_t size;
+	int64_t shm_id;
+};
+
+struct tee_ioctl_param_value {
+	uint64_t a;
+	uint64_t b;
+	uint64_t c;
+};
+
+struct tee_ioctl_param {
+	uint64_t attr;
+	union {
+		struct tee_ioctl_param_memref memref;
+		struct tee_ioctl_param_value value;
+	} u;
+};
+
+struct tee_ioctl_param;
+
+struct blk_desc *rockchip_get_bootdev(void);
+int part_get_info_by_name(struct blk_desc *dev_desc, const char *name,
+			disk_partition_t *info);
+unsigned long blk_dread(struct blk_desc *block_dev, lbaint_t start,
+			lbaint_t blkcnt, void *buffer);
+unsigned long blk_dwrite(struct blk_desc *block_dev, lbaint_t start,
+			lbaint_t blkcnt, const void *buffer);
+
+int tee_supp_rk_fs_init(void);
+
+int tee_supp_rk_fs_process(size_t num_params,
+			struct tee_ioctl_param *params);
+void OpteeClientRkFsInit(void);
+
+#endif
diff --git a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta
index 05d1133ee3..66cda56bd1 100644
Binary files a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta and b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta differ
diff --git a/lib/optee_clientApi/Kconfig b/lib/optee_clientApi/Kconfig
index 8689af11cb..c0e5565ddc 100644
--- a/lib/optee_clientApi/Kconfig
+++ b/lib/optee_clientApi/Kconfig
@@ -22,3 +22,10 @@ config OPTEE_V2
 	  be use in android bootloader a/b and avb
 	  step.
 
+config OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	bool "Support use emmc security partition for OPTEE version 2.0"
+	depends on OPTEE_V2
+	help
+	  U-boot can secure store data to security partition
+	  for nand or emmc, do not to store data to rpmb.
+
diff --git a/lib/optee_clientApi/Makefile b/lib/optee_clientApi/Makefile
index 888fda324d..989dfc2b72 100644
--- a/lib/optee_clientApi/Makefile
+++ b/lib/optee_clientApi/Makefile
@@ -9,9 +9,9 @@ obj-y += OpteeClientInterface.o
 obj-y += OpteeClientSMC.o
 obj-y += OpteeClientRPC.o
 obj-y += tee_smc-arm64.o
-obj-y += OpteeClientRkFs.o
 
 ifdef CONFIG_OPTEE_V1
+obj-y += OpteeClientRkFs.o
 obj-y += 258be795-f9ca-40e6-a8699ce6886c5d5d.o
 lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.o: lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c
 lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c: lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta
@@ -19,6 +19,7 @@ lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c: lib/optee_clientApi/2
 endif
 
 ifdef CONFIG_OPTEE_V2
+obj-y += OpteeClientRkFs-v2.o
 obj-y += 258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.o
 lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.o: lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.c
 lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.c: lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index f1d8fe90a1..1a2c23f0ca 100644
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <optee_include/OpteeClientApiLib.h>
 #include <optee_include/tee_client_api.h>
+#include <boot_rkimg.h>
 
 void test_optee(void)
 {
@@ -19,18 +20,35 @@ void test_optee(void)
 		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+	dev_desc = rockchip_get_bootdev();
 
 	debug("testmm start\n");
 	OpteeClientApiLibInitialize();
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
 
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
+
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				&TeecSession,
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
+#ifdef CONFIG_OPTEE_V1
 				NULL,
+#endif
+#ifdef CONFIG_OPTEE_V2
+				&TeecOperation,
+#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -116,18 +134,36 @@ uint32_t trusty_read_rollback_index(uint32_t slot, uint64_t *value)
 	TEEC_Operation TeecOperation = {0};
 	uint8_t hs[9];
 
+	struct blk_desc *dev_desc;
+	dev_desc = rockchip_get_bootdev();
+
 	b2hs((uint8_t *)&slot, hs, 4, 9);
 	debug("testmm start\n");
 	OpteeClientApiLibInitialize();
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
 
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
+
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				&TeecSession,
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
+#ifdef CONFIG_OPTEE_V1
 				NULL,
+#endif
+#ifdef CONFIG_OPTEE_V2
+				&TeecOperation,
+#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -186,17 +222,35 @@ uint32_t trusty_write_rollback_index(uint32_t slot, uint64_t value)
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
 	uint8_t hs[9];
+	struct blk_desc *dev_desc;
+	dev_desc = rockchip_get_bootdev();
+
 	b2hs((uint8_t *)&slot, hs, 4, 9);
 	OpteeClientApiLibInitialize();
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
 
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
+
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				&TeecSession,
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
+#ifdef CONFIG_OPTEE_V1
 				NULL,
+#endif
+#ifdef CONFIG_OPTEE_V2
+				&TeecOperation,
+#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -256,18 +310,35 @@ uint32_t trusty_read_permanent_attributes(uint8_t *attributes, uint32_t size)
 		{ 0xa8, 0x69, 0x9c, 0xe6, 0x88, 0x6c, 0x5d, 0x5d } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+	dev_desc = rockchip_get_bootdev();
 
 	debug("testmm start\n");
 	OpteeClientApiLibInitialize();
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
 
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
+
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				&TeecSession,
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
+#ifdef CONFIG_OPTEE_V1
 				NULL,
+#endif
+#ifdef CONFIG_OPTEE_V2
+				&TeecOperation,
+#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -323,18 +394,35 @@ uint32_t trusty_write_permanent_attributes(uint8_t *attributes, uint32_t size)
 		{ 0xa8, 0x69, 0x9c, 0xe6, 0x88, 0x6c, 0x5d, 0x5d } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+	dev_desc = rockchip_get_bootdev();
 
 	debug("testmm start\n");
 	OpteeClientApiLibInitialize();
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
 
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
+
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				&TeecSession,
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
+#ifdef CONFIG_OPTEE_V1
 				NULL,
+#endif
+#ifdef CONFIG_OPTEE_V2
+				&TeecOperation,
+#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -391,19 +479,35 @@ uint32_t trusty_read_lock_state(uint8_t *lock_state)
 		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+	dev_desc = rockchip_get_bootdev();
 
 	debug("testmm start\n");
 	OpteeClientApiLibInitialize();
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
 
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
 
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				&TeecSession,
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
+#ifdef CONFIG_OPTEE_V1
 				NULL,
+#endif
+#ifdef CONFIG_OPTEE_V2
+				&TeecOperation,
+#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -459,18 +563,35 @@ uint32_t trusty_write_lock_state(uint8_t lock_state)
 		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+	dev_desc = rockchip_get_bootdev();
 
 	debug("testmm start\n");
 	OpteeClientApiLibInitialize();
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
 
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
+
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				&TeecSession,
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
+#ifdef CONFIG_OPTEE_V1
 				NULL,
+#endif
+#ifdef CONFIG_OPTEE_V2
+				&TeecOperation,
+#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -527,19 +648,35 @@ uint32_t trusty_read_flash_lock_state(uint8_t *flash_lock_state)
 		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+	dev_desc = rockchip_get_bootdev();
 
 	debug("testmm start\n");
 	OpteeClientApiLibInitialize();
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
 
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
 
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				&TeecSession,
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
+#ifdef CONFIG_OPTEE_V1
 				NULL,
+#endif
+#ifdef CONFIG_OPTEE_V2
+				&TeecOperation,
+#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -596,18 +733,35 @@ uint32_t trusty_write_flash_lock_state(uint8_t flash_lock_state)
 		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+	dev_desc = rockchip_get_bootdev();
 
 	debug("testmm start\n");
 	OpteeClientApiLibInitialize();
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
 
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
+
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				&TeecSession,
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
+#ifdef CONFIG_OPTEE_V1
 				NULL,
+#endif
+#ifdef CONFIG_OPTEE_V2
+				&TeecOperation,
+#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -668,18 +822,35 @@ uint32_t write_to_keymaster(uint8_t *filename,
 		{ 0xa8, 0x69, 0x9c, 0xe6, 0x88, 0x6c, 0x5d, 0x5d } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+	dev_desc = rockchip_get_bootdev();
 
 	debug("write_to_keymaster\n");
 	OpteeClientApiLibInitialize();
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
 
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
+
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				&TeecSession,
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
+#ifdef CONFIG_OPTEE_V1
 				NULL,
+#endif
+#ifdef CONFIG_OPTEE_V2
+				&TeecOperation,
+#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -1095,18 +1266,35 @@ uint32_t trusty_read_permanent_attributes_flag(uint8_t *attributes)
 		{ 0xa8, 0x69, 0x9c, 0xe6, 0x88, 0x6c, 0x5d, 0x5d } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+	dev_desc = rockchip_get_bootdev();
 
 	debug("testmm start\n");
 	OpteeClientApiLibInitialize();
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
 
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
+
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				&TeecSession,
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
+#ifdef CONFIG_OPTEE_V1
 				NULL,
+#endif
+#ifdef CONFIG_OPTEE_V2
+				&TeecOperation,
+#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -1161,18 +1349,35 @@ uint32_t trusty_write_permanent_attributes_flag(uint8_t attributes)
 		{ 0xa8, 0x69, 0x9c, 0xe6, 0x88, 0x6c, 0x5d, 0x5d } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+	dev_desc = rockchip_get_bootdev();
 
 	debug("testmm start\n");
 	OpteeClientApiLibInitialize();
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
 
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
+
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				&TeecSession,
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
+#ifdef CONFIG_OPTEE_V1
 				NULL,
+#endif
+#ifdef CONFIG_OPTEE_V2
+				&TeecOperation,
+#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -1231,17 +1436,34 @@ uint32_t trusty_attest_dh(uint8_t *dh, uint32_t *dh_size)
 			     };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+	dev_desc = rockchip_get_bootdev();
 
 	OpteeClientApiLibInitialize();
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
 
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
+
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				      &TeecSession,
 				      TeecUuid,
 				      TEEC_LOGIN_PUBLIC,
 				      NULL,
-				      NULL,
+#ifdef CONFIG_OPTEE_V1
+					NULL,
+#endif
+#ifdef CONFIG_OPTEE_V2
+					&TeecOperation,
+#endif
 				      &ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -1288,17 +1510,34 @@ uint32_t trusty_attest_uuid(uint8_t *uuid, uint32_t *uuid_size)
 			     };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+	dev_desc = rockchip_get_bootdev();
 
 	OpteeClientApiLibInitialize();
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
 
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
+
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				      &TeecSession,
 				      TeecUuid,
 				      TEEC_LOGIN_PUBLIC,
 				      NULL,
-				      NULL,
+#ifdef CONFIG_OPTEE_V1
+					NULL,
+#endif
+#ifdef CONFIG_OPTEE_V2
+					&TeecOperation,
+#endif
 				      &ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -1352,17 +1591,34 @@ uint32_t trusty_attest_get_ca(uint8_t *operation_start,
 
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+	dev_desc = rockchip_get_bootdev();
 
 	OpteeClientApiLibInitialize();
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
 
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
+
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				      &TeecSession,
 				      TeecUuid,
 				      TEEC_LOGIN_PUBLIC,
 				      NULL,
-				      NULL,
+#ifdef CONFIG_OPTEE_V1
+					NULL,
+#endif
+#ifdef CONFIG_OPTEE_V2
+					&TeecOperation,
+#endif
 				      &ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -1418,16 +1674,33 @@ uint32_t trusty_attest_set_ca(uint8_t *ca_response, uint32_t *ca_response_size)
 			     };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+	dev_desc = rockchip_get_bootdev();
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
 
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
+
 	TeecResult = TEEC_OpenSession(&TeecContext,
-				      &TeecSession,
-				      TeecUuid,
-				      TEEC_LOGIN_PUBLIC,
-				      NULL,
-				      NULL,
-				      &ErrorOrigin);
+					&TeecSession,
+					TeecUuid,
+					TEEC_LOGIN_PUBLIC,
+					NULL,
+#ifdef CONFIG_OPTEE_V1
+					NULL,
+#endif
+#ifdef CONFIG_OPTEE_V2
+					&TeecOperation,
+#endif
+					&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
diff --git a/lib/optee_clientApi/OpteeClientRPC.c b/lib/optee_clientApi/OpteeClientRPC.c
index 3072381391..5f07f84d31 100644
--- a/lib/optee_clientApi/OpteeClientRPC.c
+++ b/lib/optee_clientApi/OpteeClientRPC.c
@@ -16,7 +16,12 @@
 #include <optee_include/tee_rpc_types.h>
 #include <optee_include/tee_rpc.h>
 #include <optee_include/258be795-f9ca-40e6-a8699ce6886c5d5d.h>
+#ifdef CONFIG_OPTEE_V1
 #include <optee_include/OpteeClientRkFs.h>
+#endif
+#ifdef CONFIG_OPTEE_V2
+#include <optee_include/OpteeClientRkFs-v2.h>
+#endif
 
 /*
  * Memory allocation.
@@ -482,8 +487,14 @@ TEEC_Result OpteeRpcCmdFs(t_teesmc32_arg *TeeSmc32Arg)
 	t_teesmc32_param *TeeSmc32Param;
 
 	TeeSmc32Param = TEESMC32_GET_PARAMS(TeeSmc32Arg);
+#ifdef CONFIG_OPTEE_V1
 	TeecResult = tee_supp_rk_fs_process((void *)(size_t)TeeSmc32Param[0].u.memref.buf_ptr,
 							TeeSmc32Param[0].u.memref.size);
+#endif
+#ifdef CONFIG_OPTEE_V2
+	TeecResult = tee_supp_rk_fs_process((size_t)TeeSmc32Arg->num_params,
+							(struct tee_ioctl_param *)TeeSmc32Param);
+#endif
 
 	return TeecResult;
 }
@@ -619,6 +630,11 @@ TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs)
 			TeecResult = OpteeRpcCmdRpmb(TeeSmc32Arg);
 			break;
 		}
+		case OPTEE_MSG_RPC_CMD_FS_V2: {
+			TeecResult = OpteeRpcCmdFs(TeeSmc32Arg);
+			TeeSmc32Arg->ret = TEEC_SUCCESS;
+			break;
+		}
 		case OPTEE_MSG_RPC_CMD_LOAD_TA_V2: {
 			TeecResult = OpteeRpcCmdLoadV2Ta(TeeSmc32Arg);
 			break;
diff --git a/lib/optee_clientApi/OpteeClientRkFs-v2.c b/lib/optee_clientApi/OpteeClientRkFs-v2.c
new file mode 100644
index 0000000000..f771116fbc
--- /dev/null
+++ b/lib/optee_clientApi/OpteeClientRkFs-v2.c
@@ -0,0 +1,1316 @@
+/*
+ * Copyright (c) 2016, Fuzhou Rockchip Electronics Co.,Ltd.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <common.h>
+#include <stdlib.h>
+#include <command.h>
+#include <optee_include/OpteeClientRkFs-v2.h>
+#include <optee_include/tee_client_api.h>
+
+/*
+ *#define DEBUG_RKFSS
+ *#define DEBUG_CLEAN_RKSS
+ */
+
+/*
+ * Operations and defines shared with TEE.
+ */
+#define OPTEE_MRF_OPEN			0
+#define OPTEE_MRF_CREATE		1
+#define OPTEE_MRF_CLOSE			2
+#define OPTEE_MRF_READ			3
+#define OPTEE_MRF_WRITE			4
+#define OPTEE_MRF_TRUNCATE		5
+#define OPTEE_MRF_REMOVE		6
+#define OPTEE_MRF_RENAME		7
+#define OPTEE_MRF_OPENDIR		8
+#define OPTEE_MRF_CLOSEDIR		9
+#define OPTEE_MRF_READDIR		10
+
+/*
+ * Open flags, defines shared with TEE.
+ */
+#define TEE_FS_O_RDONLY 0x1
+#define TEE_FS_O_WRONLY 0x2
+#define TEE_FS_O_RDWR   0x4
+#define TEE_FS_O_CREAT  0x8
+#define TEE_FS_O_EXCL   0x10
+#define TEE_FS_O_APPEND 0x20
+
+/*
+ * Seek flags, defines shared with TEE.
+ */
+#define TEE_FS_SEEK_SET 0x1
+#define TEE_FS_SEEK_END 0x2
+#define TEE_FS_SEEK_CUR 0x4
+
+/*
+ * Mkdir flags, defines shared with TEE.
+ */
+#define TEE_FS_S_IWUSR 0x1
+#define TEE_FS_S_IRUSR 0x2
+
+/*
+ * Access flags, X_OK not supported, defines shared with TEE.
+ */
+#define TEE_FS_R_OK    0x1
+#define TEE_FS_W_OK    0x2
+#define TEE_FS_F_OK    0x4
+
+/*
+ *	RK Secure Storage Ctrl
+ *		Storage Size : 512 kb
+ *		Header Size : 8 byte * 2 for each top of 512 byte
+ *		Partision Table Size : 128 * 512 b (24 Files And Folder)
+ *		File number: 128 * 4 = 512
+ *		Data Size : 895 * 512 b
+ *
+ *	------ RKSS Structure --------
+ *	- 512 byte patition table1 [0]
+ *		- 126 * 4 = 504 byte table info
+ *		- 8 byte verification
+ *	- 512 byte patition table2 [1]
+ *	             ...
+ *	- 512 byte patition table128 [127]
+ *	- 512 byte section used refs [128]
+ *		- 1 byte = 2 flag
+ *	- 895 * 512 byte data	[129 - 1023]
+ *	------------------------------
+ *
+ */
+#define RKSS_DATA_SECTION_COUNT		1024
+#define RKSS_DATA_LEN			512
+#define RKSS_PARTITION_TABLE_COUNT	128		/* total size 512 * 128*/
+#define RKSS_EACH_FILEFOLDER_COUNT	4		/* 504 / 126 = 4*/
+#define RKSS_NAME_MAX_LENGTH		117		/* 116 char + "\0"*/
+#define RKSS_USEDFLAGS_INDEX		RKSS_PARTITION_TABLE_COUNT
+
+#define RK_FS_R    0x1
+#define RK_FS_W    0x2
+#define RK_FS_D    0x8
+
+typedef struct rkss_file_info {
+	uint8_t		used;
+	char 		name[RKSS_NAME_MAX_LENGTH];
+	uint16_t	index;	/* from 129 to 1023*/
+	uint16_t	size;	/* size of data*/
+	uint16_t	father;
+	uint8_t 	id; /* file folder count index*/
+	uint8_t		flags;
+} rkss_file_info; /* 126 byte for each*/
+
+#define RKSS_VERSION		((uint32_t)0x1)
+#define RKSS_CHECK_STR	((uint32_t)0x12345678)
+#define RKSS_CHECK_PT		((uint8_t)0xFC)
+typedef struct rkss_file_verification {
+	uint32_t version;
+	uint32_t checkstr;
+} rkss_file_verification;
+
+typedef struct rk_secure_storage {
+	unsigned long index;
+	unsigned char data[RKSS_DATA_LEN];
+} rk_secure_storage;
+
+/* Path to all secure storage dev. */
+#define RKSS_DEV_NAND "/dev/block/rknand_security"
+#define RKSS_DEV_EMMC "/dev/block/by-name/security"
+
+/* Function Defines */
+#define UNREFERENCED_PARAMETER(P) (P = P)
+#define CHECKFLAG(flags, flag) (flags & flag)
+#define ADDFLAG(flags, flag) (flags | flag)
+
+/* RK Secure Storage Calls */
+static char dir_cache[RKSS_NAME_MAX_LENGTH][12];
+static int dir_num;
+static int dir_seek;
+
+static int rkss_read_section(struct rk_secure_storage *rkss)
+{
+	unsigned long ret;
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: Could not find device\n", __func__);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
+		printf("Could not find security partition\n");
+		return TEEC_ERROR_GENERIC;
+	}
+	ret = blk_dread(dev_desc, part_info.start + rkss->index, 1, rkss->data);
+	if (ret != 1) {
+		printf("blk_dread fail \n");
+		return TEEC_ERROR_GENERIC;
+	}
+
+	return TEEC_SUCCESS;
+}
+
+static int rkss_write_section(struct rk_secure_storage *rkss)
+{
+	unsigned long ret;
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: Could not find device\n", __func__);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
+		printf("Could not find security partition\n");
+		return TEEC_ERROR_GENERIC;
+	}
+	ret = blk_dwrite(dev_desc, part_info.start + rkss->index, 1, rkss->data);
+	if (ret != 1) {
+		printf("blk_dwrite fail \n");
+		return TEEC_ERROR_GENERIC;
+	}
+
+	return TEEC_SUCCESS;
+}
+
+static int rkss_read_patition_tables(unsigned char *data)
+{
+	unsigned long ret;
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: Could not find device\n", __func__);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
+		printf("Could not find security partition\n");
+		return TEEC_ERROR_GENERIC;
+	}
+	ret = blk_dread(dev_desc, part_info.start, RKSS_PARTITION_TABLE_COUNT, data);
+	if (ret != RKSS_PARTITION_TABLE_COUNT) {
+		printf("blk_dread fail \n");
+		return TEEC_ERROR_GENERIC;
+	}
+
+	return TEEC_SUCCESS;
+}
+
+#ifdef DEBUG_RKFSS
+static void rkss_dump(void *data, unsigned int len)
+{
+	char *p = (char *)data;
+	unsigned int i = 0;
+	printf("-------------- DUMP %d --------------", len);
+	for (i = 0; i < len; i++) {
+		printf("%02x ", *(p + i));
+	}
+	printf("\n");
+	printf("------------- DUMP END -------------");
+}
+
+static void rkss_dump_ptable(void)
+{
+	struct rk_secure_storage rkss = {0};
+	int i, n, ret;
+	void *pdata;
+	struct rkss_file_info *p;
+
+	printf("-------------- DUMP ptable --------------");
+	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++) {
+		rkss.index = i;
+		ret = rkss_read_section(&rkss);
+		if (ret < 0) {
+			printf("rkss_read_section fail ! ret: %d.", ret);
+			return;
+		}
+
+		for (n = 0; n < RKSS_EACH_FILEFOLDER_COUNT; n++) {
+			pdata = rkss.data;
+			p = (struct rkss_file_info *)pdata;
+			p += n;
+			printf("[%02d][%c] %s , inx:%d, size:%d",
+					i*RKSS_EACH_FILEFOLDER_COUNT+n, p->used == 0 ? 'F':'T', p->name,
+					p->index, p->size);
+		}
+	}
+	printf("-------------- DUMP END --------------");
+}
+
+static void rkss_dump_usedflags(void)
+{
+	struct rk_secure_storage rkss = {0};
+	int ret;
+
+	rkss.index = RKSS_USEDFLAGS_INDEX;
+	ret = rkss_read_section(&rkss);
+	if (ret < 0) {
+		printf("rkss_read_section fail ! ret: %d.", ret);
+		return;
+	}
+	rkss_dump(rkss.data, RKSS_DATA_LEN);
+}
+#endif
+
+static int rkss_verify_ptable(struct rk_secure_storage *rkss)
+{
+	void *vp = (void *)rkss->data;
+	char *cp = (char *)vp;
+	struct rkss_file_verification *verify;
+	int ret;
+
+	if (rkss->index > RKSS_PARTITION_TABLE_COUNT) {
+		printf("cannot support verifing other section.");
+		return TEEC_ERROR_GENERIC;
+	}
+
+	cp = (char *)(cp + RKSS_DATA_LEN - sizeof(struct rkss_file_verification));
+	verify = (struct rkss_file_verification *)(void *)cp;
+
+	if (verify->version != RKSS_VERSION
+			|| verify->checkstr != RKSS_CHECK_STR) {
+		printf("verify [%lu] fail, cleanning ....", rkss->index);
+		memset(rkss->data, 0, sizeof(RKSS_DATA_LEN));
+		verify->checkstr = RKSS_CHECK_STR;
+		verify->version = RKSS_VERSION;
+		ret = rkss_write_section(rkss);
+		if (ret < 0) {
+			printf("cleanning ptable fail ! ret: %d.", ret);
+			return TEEC_ERROR_GENERIC;
+		}
+		return TEEC_SUCCESS;
+	}
+	debug("verify success. %lu", rkss->index);
+	return TEEC_SUCCESS;
+}
+
+static int rkss_verify_usedflags(struct rk_secure_storage *rkss)
+{
+	uint8_t *flags = (uint8_t *)rkss->data;
+	int i, duel, flag, n, value, ret;
+	uint8_t *flagw;
+
+	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT + 1; i++) {
+		duel = *(flags + (int)i/2);
+		flag = i & 0x1 ? duel & 0x0F : (duel & 0xF0) >> 4;
+		if (flag != 0x1) {
+			debug("init usedflags section ...");
+			memset(rkss->data, 0x00, RKSS_DATA_LEN);
+			for (n = 0; n < RKSS_PARTITION_TABLE_COUNT + 1; n++) {
+				flagw = (uint8_t *)rkss->data + (int)n/2;
+				value = 0x1;
+				*flagw = n & 0x1 ? (*flagw & 0xF0) | (value & 0x0F) :
+						(*flagw & 0x0F) | (value << 4);
+			}
+			ret = rkss_write_section(rkss);
+			if (ret < 0) {
+				printf("clean usedflags section failed!!! ret: %d.", ret);
+				return TEEC_ERROR_GENERIC;
+			}
+
+			return TEEC_SUCCESS;
+		}
+	}
+	debug("rkss_verify_usedflags: sucess.");
+	return TEEC_SUCCESS;
+}
+
+static int rkss_get_fileinfo_by_index(int fd, struct rkss_file_info *pfileinfo)
+{
+	int i = fd / RKSS_EACH_FILEFOLDER_COUNT;
+	int n = fd - (RKSS_EACH_FILEFOLDER_COUNT * i);
+	struct rk_secure_storage rkss = {0};
+	int ret;
+	void *pdata;
+	struct rkss_file_info *p;
+
+	rkss.index = i;
+	ret = rkss_read_section(&rkss);
+	if (ret < 0) {
+		printf("rkss_read_section fail ! ret: %d.", ret);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	pdata = rkss.data;
+	p = (struct rkss_file_info *)pdata;
+	p += n;
+
+	if (p->used != 1) {
+		debug("error: unused section! ");
+		return TEEC_ERROR_GENERIC;
+	}
+	debug("rkss_get_fileinfo_by_index p->used = %d p->name=%s p->index=%d p->size=%d \n",
+		p->used, p->name, p->index, p->size);
+	memcpy(pfileinfo, p, sizeof(struct rkss_file_info));
+	return TEEC_SUCCESS;
+}
+
+static int rkss_get_fileinfo_by_name(
+		char *filename, struct rkss_file_info *pfileinfo)
+{
+	int i, ret;
+	uint8_t n = 0;
+	unsigned int len;
+	unsigned char *table_data;
+	struct rk_secure_storage rkss = {0};
+	void *pdata;
+	struct rkss_file_info *p;
+	const char *split = "/";
+	char *last_inpos;
+	char *last_svpos;
+	char *cur_inpos;
+	char *cur_svpos;
+	int size_in, size_sv;
+
+	len = strlen(filename);
+	if (len > RKSS_NAME_MAX_LENGTH - 1) {
+		printf("filename is too long. length:%u", len);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
+	if (table_data == NULL) {
+		printf("malloc table_data fail \n");
+		return TEEC_ERROR_GENERIC;
+	}
+	ret = rkss_read_patition_tables(table_data);
+	if (ret < 0) {
+		printf("rkss_read_patition_tables fail ! ret: %d.", ret);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++) {
+		rkss.index = i;
+		memcpy(rkss.data, table_data + rkss.index * RKSS_DATA_LEN, RKSS_DATA_LEN);
+
+		for (n = 0; n < RKSS_EACH_FILEFOLDER_COUNT; n++) {
+			pdata = rkss.data;
+			p = (struct rkss_file_info *)pdata;
+			p += n;
+
+			if (p->used == 0)
+				continue;
+
+			/* Full Matching*/
+			if (!strcmp(p->name, filename)) {
+				debug("rkss_get_fileinfo_by_name: hit table[%d/%d], index[%d/%d] \n",
+						i, RKSS_PARTITION_TABLE_COUNT, n, RKSS_EACH_FILEFOLDER_COUNT);
+				memcpy(pfileinfo, p, sizeof(struct rkss_file_info));
+				free(table_data);
+				return i * RKSS_EACH_FILEFOLDER_COUNT + n;
+			}
+
+			/* Folder Matching*/
+			last_inpos = filename;
+			last_svpos = p->name;
+			cur_inpos = NULL;
+			cur_svpos = NULL;
+			do {
+				cur_inpos = strstr(last_inpos, split);
+				cur_svpos = strstr(last_svpos, split);
+				size_in = cur_inpos == NULL ?
+						(int)strlen(last_inpos) : cur_inpos - last_inpos;
+				size_sv = cur_svpos == NULL ?
+						(int)strlen(last_svpos) : cur_svpos - last_svpos;
+
+				ret = memcmp(last_inpos, last_svpos, size_in);
+				last_inpos = cur_inpos + 1;
+				last_svpos = cur_svpos + 1;
+
+				if (size_in != size_sv || ret)
+					goto UNMATCHFOLDER;
+
+			} while (cur_inpos && cur_svpos);
+
+			debug("Matched folder: %s \n", p->name);
+			free(table_data);
+			return TEEC_ERROR_GENERIC;
+UNMATCHFOLDER:
+			debug("Unmatched ... \n");
+		}
+	}
+	debug("rkss_get_fileinfo_by_name: file or dir no found!");
+	free(table_data);
+	return TEEC_ERROR_GENERIC;
+}
+
+static int rkss_get_dirs_by_name(char *filename)
+{
+	int i, ret;
+	uint8_t n = 0;
+	unsigned int len;
+	unsigned char *table_data;
+	struct rk_secure_storage rkss = {0};
+	void *pdata;
+	struct rkss_file_info *p;
+	char *chk, *file, *subdir;
+
+	len = strlen(filename);
+	if (len > RKSS_NAME_MAX_LENGTH - 1) {
+		printf("filename is too long. length:%u", len);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
+	if (table_data == NULL) {
+		printf("malloc table_data fail \n");
+		return TEEC_ERROR_GENERIC;
+	}
+	ret = rkss_read_patition_tables(table_data);
+	if (ret < 0) {
+		printf("rkss_read_patition_tables fail ! ret: %d.", ret);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	dir_num = 0;
+	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++) {
+		rkss.index = i;
+		memcpy(rkss.data, table_data + rkss.index * RKSS_DATA_LEN, RKSS_DATA_LEN);
+
+		for (n = 0; n < RKSS_EACH_FILEFOLDER_COUNT; n++) {
+			pdata = rkss.data;
+			p = (struct rkss_file_info *)pdata;
+			p += n;
+
+			if (p->used == 0)
+				continue;
+
+			/* Full Matching*/
+			ret = memcmp(p->name, filename, strlen(filename));
+			debug("comparing [fd:%d] : %s ?= %s , ret:%d \n",
+					i*RKSS_EACH_FILEFOLDER_COUNT+n, p->name, filename, ret);
+			if (!ret && strlen(p->name) > strlen(filename)) {
+				chk = p->name + strlen(filename);
+				if (*chk == '/') {
+					file = p->name + strlen(filename) + 1;
+					subdir = strtok(file, "/");
+					debug("found: %s \n", subdir);
+					strcpy(dir_cache[dir_num], subdir);
+					++dir_num;
+				}
+			}
+		}
+	}
+	free(table_data);
+	return dir_num;
+}
+
+static int rkss_get_empty_section_from_usedflags(int section_size)
+{
+	struct rk_secure_storage rkss = {0};
+	int i, ret;
+	int count0 = 0;
+	uint8_t *flag;
+	uint8_t value;
+
+	rkss.index = RKSS_USEDFLAGS_INDEX;
+	ret = rkss_read_section(&rkss);
+	if (ret < 0) {
+		printf("rkss_read_section fail ! ret: %d.", ret);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	for (i = 0; i < RKSS_DATA_SECTION_COUNT; i++) {
+		flag = (uint8_t *)rkss.data + (int)i/2;
+		value = i & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
+
+		if (value == 0x0) {
+			if (++count0 == section_size) {
+				return (i + 1 - section_size);
+			}
+		} else {
+			count0 = 0;
+		}
+	}
+
+	printf("Not enough space available in secure storage !");
+	return TEEC_ERROR_GENERIC;
+}
+
+static int rkss_incref_usedflags_section(int index)
+{
+	struct rk_secure_storage rkss = {0};
+	int ret, value;
+	uint8_t *flag;
+
+	if (index >= RKSS_DATA_SECTION_COUNT) {
+		printf("index[%d] out of range.", index);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	rkss.index = RKSS_USEDFLAGS_INDEX;
+	ret = rkss_read_section(&rkss);
+	if (ret < 0) {
+		printf("rkss_read_section fail ! ret: %d.", ret);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	flag = (uint8_t *)rkss.data + (int)index/2;
+	value = index & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
+	if (++value > 0xF) {
+		printf("reference out of data: %d", value);
+		value = 0xF;
+	}
+	*flag = index & 0x1 ? (*flag & 0xF0) | (value & 0x0F) :
+			(*flag & 0x0F) | (value << 4);
+
+	ret = rkss_write_section(&rkss);
+	if (ret < 0) {
+		printf("rkss_write_section fail ! ret: %d.", ret);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	return TEEC_SUCCESS;
+}
+
+static int rkss_decref_usedflags_section(int index)
+{
+	struct rk_secure_storage rkss = {0};
+	int ret, value;
+	uint8_t *flag;
+
+	if (index >= RKSS_DATA_SECTION_COUNT) {
+		debug("index[%d] out of range.", index);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	rkss.index = RKSS_USEDFLAGS_INDEX;
+	ret = rkss_read_section(&rkss);
+	if (ret < 0) {
+		printf("rkss_read_section fail ! ret: %d.", ret);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	flag = (uint8_t *)rkss.data + (int)index/2;
+	value = index & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
+	if (--value < 0) {
+		printf("reference out of data: %d", value);
+		value = 0x0;
+	}
+	*flag = index & 0x1 ? (*flag & 0xF0) | (value & 0x0F) :
+			(*flag & 0x0F) | (value << 4);
+
+	ret = rkss_write_section(&rkss);
+	if (ret < 0) {
+		printf("rkss_write_section fail ! ret: %d.", ret);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	return TEEC_SUCCESS;
+}
+
+static int rkss_write_empty_ptable(struct rkss_file_info *pfileinfo)
+{
+	unsigned char *table_data;
+	int ret, i, n;
+	struct rk_secure_storage rkss = {0};
+	void *pdata;
+	struct rkss_file_info *p;
+
+	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
+	if (table_data == NULL) {
+		printf("malloc table_data fail \n");
+		return TEEC_ERROR_GENERIC;
+	}
+
+	ret = rkss_read_patition_tables(table_data);
+	if (ret < 0) {
+		printf("rkss_read_patition_tables fail ! ret: %d.", ret);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++) {
+		rkss.index = i;
+		memcpy(rkss.data, table_data + rkss.index * RKSS_DATA_LEN, RKSS_DATA_LEN);
+		for (n = 0; n < RKSS_EACH_FILEFOLDER_COUNT; n++) {
+			pdata = rkss.data;
+			p = (struct rkss_file_info *)pdata;
+			p += n;
+			if (p->used == 0) {
+				debug("write ptable in [%d][%d] .", i, n);
+				memcpy(p, pfileinfo, sizeof(struct rkss_file_info));
+				p->used = 1;
+				p->id = n;
+				debug("write emt ptable : [%d,%d] name:%s, index:%d, ",
+					i, n, p->name, p->index);
+				debug("size:%d, used:%d \n",  p->size, p->used);
+				ret = rkss_write_section(&rkss);
+				if (ret < 0) {
+					printf("rkss_write_section fail ! ret: %d.", ret);
+					free(table_data);
+					return TEEC_ERROR_GENERIC;
+				}
+
+				free(table_data);
+				return i * RKSS_EACH_FILEFOLDER_COUNT + n;
+			}
+		}
+	}
+	debug("No enough ptable space available in secure storage.\n");
+	free(table_data);
+	return TEEC_ERROR_GENERIC;
+}
+
+static int rkss_write_back_ptable(int fd, struct rkss_file_info *pfileinfo)
+{
+	int i = fd / RKSS_EACH_FILEFOLDER_COUNT;
+	int n = fd - (RKSS_EACH_FILEFOLDER_COUNT * i);
+	struct rk_secure_storage rkss = {0};
+	int ret;
+	void *pdata;
+	struct rkss_file_info *p;
+
+	rkss.index = i;
+	ret = rkss_read_section(&rkss);
+	if (ret < 0) {
+		printf("rkss_read_section fail ! ret: %d.", ret);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	pdata = rkss.data;
+	p = (struct rkss_file_info *)pdata;
+	p += n;
+
+	memcpy(p, pfileinfo, sizeof(struct rkss_file_info));
+	debug("write ptable : [%d,%d] name:%s, index:%d, size:%d, used:%d \n",
+			i, n, p->name, p->index, p->size, p->used);
+
+	ret = rkss_write_section(&rkss);
+	if (ret < 0) {
+		printf("rkss_write_section fail ! ret: %d.", ret);
+		return TEEC_ERROR_GENERIC;
+	}
+#ifdef DEBUG_RKFSS
+	rkss_dump_ptable();
+#endif
+	return TEEC_SUCCESS;
+}
+
+static uint32_t ree_fs_new_open(size_t num_params,
+				   struct tee_ioctl_param *params)
+{
+	char *filename;
+	int fd;
+	struct rkss_file_info p = {0};
+
+	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx \n",
+		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
+
+	filename = (char *)params[1].u.memref.shm_id;
+	if (!filename)
+		return TEEC_ERROR_BAD_PARAMETERS;
+
+	if (strlen(filename) > RKSS_NAME_MAX_LENGTH) {
+		printf("ree_fs_new_open: file name too long. %s", filename);
+		return TEEC_ERROR_BAD_PARAMETERS;
+	}
+
+	debug("ree_fs_new_open open file: %s, len: %lu \n", filename, strlen(filename));
+	fd = rkss_get_fileinfo_by_name(filename, &p);
+	if (fd < 0) {
+		debug("ree_fs_new_open : no such file. %s", filename);
+		return TEEC_ERROR_ITEM_NOT_FOUND;
+	}
+
+	debug("ree_fs_new_open! %s, fd: %d \n", filename, fd);
+
+	params[2].u.value.a = fd;
+	return TEEC_SUCCESS;
+}
+
+static TEEC_Result ree_fs_new_create(size_t num_params,
+				     struct tee_ioctl_param *params)
+{
+	char *filename;
+	int fd;
+	int ret, num, i;
+	struct rkss_file_info p = {0};
+	/* file open flags: O_RDWR | O_CREAT | O_TRUNC
+	 * if file exists, we must remove it first.
+	 */
+	filename = (char *)params[1].u.memref.shm_id;
+	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
+		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
+	if (!filename)
+		return TEEC_ERROR_BAD_PARAMETERS;
+
+	if (strlen(filename) > RKSS_NAME_MAX_LENGTH) {
+		printf("ree_fs_new_create: file name too long. %s", filename);
+		return TEEC_ERROR_BAD_PARAMETERS;
+	}
+
+	debug("ree_fs_new_create create file: %s, len: %lu \n", filename, strlen(filename));
+	fd = rkss_get_fileinfo_by_name(filename, &p);
+	if (fd > 0) {
+		debug("ree_fs_new_create : file exist, clear it. %s", filename);
+		/* decrease ref from usedflags */
+		num = p.size / RKSS_DATA_LEN + 1;
+		for (i = 0; i < num; i++) {
+			ret = rkss_decref_usedflags_section(p.index + i);
+			if (ret < 0) {
+				printf("rkss_decref_usedflags_section error !");
+				return TEEC_ERROR_GENERIC;
+			}
+		}
+
+		/* rm from ptable */
+		memset(&p, 0, sizeof(struct rkss_file_info));
+		ret = rkss_write_back_ptable(fd, &p);
+		if (ret < 0) {
+			printf("ree_fs_new_create : write back error %d", ret);
+			return TEEC_ERROR_GENERIC;
+		}
+	}
+
+	debug("ree_fs_new_create create new file: %s \n", filename);
+	strcpy(p.name, filename);
+	p.index = 0;
+	p.size = 0;
+	p.used = 1;
+	p.flags = RK_FS_R | RK_FS_W;
+	fd = rkss_write_empty_ptable(&p);
+	if (fd < 0) {
+		printf("ree_fs_new_create : write empty ptable error. %s", filename);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	debug("ree_fs_new_create ! %s, fd: %d. \n", filename, fd);
+
+	params[2].u.value.a = fd;
+	return TEEC_SUCCESS;
+}
+
+static TEEC_Result ree_fs_new_close(size_t num_params,
+				    struct tee_ioctl_param *params)
+{
+	debug("ree_fs_new_close !");
+	UNREFERENCED_PARAMETER(params);
+	UNREFERENCED_PARAMETER(num_params);
+	return TEEC_SUCCESS;
+}
+
+static TEEC_Result ree_fs_new_read(size_t num_params,
+				   struct tee_ioctl_param *params)
+{
+	uint8_t *data;
+	size_t len;
+	off_t offs;
+	int fd;
+	int ret;
+	struct rkss_file_info p = {0};
+	int section_offs, num, left, di, i, read;
+	struct rk_secure_storage rkss = {0};
+
+	fd = params[0].u.value.b;
+	offs = params[0].u.value.c;
+
+	data = (uint8_t *)params[1].u.memref.shm_id;
+	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
+		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
+
+	if (!data)
+		return TEEC_ERROR_BAD_PARAMETERS;
+	len = params[1].u.memref.size;
+
+	debug("ree_fs_new_read! fd:%d, len:%zu, offs:%ld \n", fd, len, offs);
+
+	ret = rkss_get_fileinfo_by_index(fd, &p);
+	if (ret < 0) {
+		debug("unavailable fd: %d!", fd);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	if (offs >= p.size)
+		return TEEC_ERROR_BAD_PARAMETERS;
+
+	section_offs = offs % RKSS_DATA_LEN;
+	num = (len + section_offs) / RKSS_DATA_LEN + 1;
+	left = len > p.size ? p.size : len;
+	di = 0;
+	debug("reading section[%d], fd:%d, len:%zu, offs:%ld, section_offs:%d, filesize:%d \n",
+			p.index, fd, len, offs, section_offs, p.size);
+	for (i = 0; i < num; i++) {
+		rkss.index = p.index + i + offs / RKSS_DATA_LEN;
+		ret = rkss_read_section(&rkss);
+		if (ret < 0) {
+			printf("unavailable file index %lu!", rkss.index);
+			return TEEC_ERROR_GENERIC;
+		}
+
+		if (i == 0) {
+			read = left > RKSS_DATA_LEN - section_offs ? RKSS_DATA_LEN - section_offs : left;
+			memcpy((char *)data + di, rkss.data + section_offs, read);
+		} else {
+			read = left > RKSS_DATA_LEN ? RKSS_DATA_LEN : left;
+			memcpy((char *)data + di, rkss.data, read);
+		}
+#ifdef DEBUG_RKFSS
+		rkss_dump((char *)data + di, read);
+#endif
+		di += read;
+		left -= read;
+	}
+
+	params[1].u.memref.size = di;
+	return TEEC_SUCCESS;
+}
+
+static TEEC_Result ree_fs_new_write(size_t num_params,
+				    struct tee_ioctl_param *params)
+{
+	uint8_t *data;
+	size_t len;
+	off_t offs;
+	struct rk_secure_storage rkss = {0};
+	struct rkss_file_info p = {0};
+	int ret, i, left, fd, new_size;
+	int section_num, di, read, lastw, ws;
+	uint8_t *file_data;
+
+	fd = params[0].u.value.b;
+	offs = params[0].u.value.c;
+
+	data = (uint8_t *)params[1].u.memref.shm_id;
+	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
+		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
+	if (!data)
+		return TEEC_ERROR_BAD_PARAMETERS;
+	len = params[1].u.memref.size;
+
+	debug("ree_fs_new_write ! fd:%d, len:%zu, offs:%ld \n", fd, len, offs);
+
+	ret = rkss_get_fileinfo_by_index(fd, &p);
+	if (ret < 0) {
+		printf("ree_fs_new_write: fd:%d unvailable!", fd);
+		return TEEC_ERROR_BAD_PARAMETERS;
+	}
+
+	new_size = offs + len > p.size ? offs + len : p.size;
+	file_data = malloc(new_size);
+	if (!file_data)
+		return TEEC_ERROR_OUT_OF_MEMORY;
+
+	if (p.size != 0) {
+		/* Read old file data out */
+		section_num = p.size / RKSS_DATA_LEN + 1;
+		left = p.size;
+		di = 0;
+		read = 0;
+		for (i = 0; i < section_num; i++) {
+			rkss.index = p.index + i;
+			ret = rkss_read_section(&rkss);
+			if (ret < 0) {
+				printf("unavailable file index %lu!", rkss.index);
+				ret = TEEC_ERROR_GENERIC;
+				goto out;
+			}
+
+			read = left > RKSS_DATA_LEN ? RKSS_DATA_LEN : left;
+			memcpy(file_data + di, rkss.data, read);
+#ifdef DEBUG_RKFSS
+			rkss_dump((char *)data + di, read);
+#endif
+			di += read;
+			left -= read;
+			/* decrease ref from usedflags */
+			ret = rkss_decref_usedflags_section(rkss.index);
+			if (ret < 0) {
+				printf("rkss_decref_usedflags_section error !");
+				ret = TEEC_ERROR_GENERIC;
+				goto out;
+			}
+		}
+	}
+
+	/* update new file info */
+	memcpy(file_data + offs, data, len);
+	p.size = new_size;
+	section_num = new_size / RKSS_DATA_LEN + 1;
+	p.index = rkss_get_empty_section_from_usedflags(section_num);
+	debug("Get Empty section in %d \n", p.index);
+	p.used = 1;
+	for (i = 0; i < section_num; i++) {
+		ret = rkss_incref_usedflags_section(p.index + i);
+		if (ret < 0) {
+			printf("rkss_incref_usedflags_section error !");
+			ret = TEEC_ERROR_GENERIC;
+			goto out;
+		}
+	}
+
+	ret = rkss_write_back_ptable(fd, &p);
+	if (ret < 0) {
+		printf("ree_fs_new_write: write ptable error!");
+		ret = TEEC_ERROR_GENERIC;
+		goto out;
+	}
+
+	/* write new file data */
+	left = p.size;
+	lastw = 0;
+	for (i = 0; i < section_num; i++) {
+		rkss.index = p.index + i;
+		ws = left > RKSS_DATA_LEN ? RKSS_DATA_LEN : left;
+		memset(rkss.data, 0, sizeof(rkss.data));
+		memcpy(rkss.data, file_data + lastw, ws);
+		lastw += ws;
+		left -= RKSS_DATA_LEN;
+		left = left < 0 ? 0 : left;
+#ifdef DEBUG_RKFSS
+		rkss_dump(rkss.data, ws);
+#endif
+		ret = rkss_write_section(&rkss);
+		if (ret < 0) {
+			printf("rkss_write_section: write error!");
+			ret = TEEC_ERROR_GENERIC;
+			goto out;
+		}
+	}
+
+#ifdef DEBUG_RKFSS
+	rkss_dump_usedflags();
+#endif
+
+out:
+	if (file_data)
+		free(file_data);
+
+	return TEEC_SUCCESS;
+}
+
+/* TODO: update file data space */
+static TEEC_Result ree_fs_new_truncate(size_t num_params,
+				       struct tee_ioctl_param *params)
+{
+	size_t len;
+	int fd, ret;
+	struct rkss_file_info p = {0};
+
+	fd = params[0].u.value.b;
+	len = params[0].u.value.c;
+
+	debug("ree_fs_new_truncate: fd:%d, lenth:%zu \n", fd, len);
+
+	ret = rkss_get_fileinfo_by_index(fd, &p);
+	if (ret < 0) {
+		printf("fd:%d unvailable!", fd);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	p.size = len;
+	ret = rkss_write_back_ptable(fd, &p);
+	if (ret < 0) {
+		printf("ree_fs_new_truncate: write ptable error!");
+		return TEEC_ERROR_GENERIC;
+	}
+
+	return TEEC_SUCCESS;
+}
+
+static TEEC_Result ree_fs_new_remove(size_t num_params,
+				     struct tee_ioctl_param *params)
+{
+	char *filename;
+	struct rkss_file_info p = {0};
+	int ret, fd, num, i;
+
+	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx \n",
+		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
+
+	filename = (char *)params[1].u.memref.shm_id;
+	if (!filename)
+		return TEEC_ERROR_BAD_PARAMETERS;
+
+	ret = rkss_get_fileinfo_by_name(filename, &p);
+	if (ret < 0) {
+		printf("ree_fs_new_remove: no such file. %s", filename);
+		return 0;
+	}
+	fd = ret;
+
+	debug("ree_fs_new_remove! %s fd:%d index:%d size:%d \n", filename, fd, p.index, p.size);
+
+	/* decrease ref from usedflags */
+	num = p.size / RKSS_DATA_LEN + 1;
+	i = 0;
+	for (i = 0; i < num; i++) {
+		ret = rkss_decref_usedflags_section(p.index + i);
+		if (ret < 0) {
+			printf("rkss_decref_usedflags_section error !");
+			return TEEC_ERROR_GENERIC;
+		}
+	}
+
+	/* rm from ptable */
+	memset(&p, 0, sizeof(struct rkss_file_info));
+	ret = rkss_write_back_ptable(fd, &p);
+	if (ret < 0) {
+		printf("ree_fs_new_remove: write back error %d", ret);
+		return TEEC_ERROR_GENERIC;
+	}
+
+#ifdef DEBUG_RKFSS
+	rkss_dump_ptable();
+	rkss_dump_usedflags();
+#endif
+	return TEEC_SUCCESS;
+}
+
+static TEEC_Result ree_fs_new_rename(size_t num_params,
+				     struct tee_ioctl_param *params)
+{
+	char *old_fname;
+	char *new_fname;
+	struct rkss_file_info p = {0};
+	int ret;
+
+	old_fname = (char *)params[1].u.memref.shm_id;
+	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
+		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
+	if (!old_fname)
+		return TEEC_ERROR_BAD_PARAMETERS;
+
+	new_fname = (char *)params[2].u.memref.shm_id;
+	debug("params[2].u.memref.shm_id = 0x%llx params[2].u.memref.shm_offs = 0x%llx\n",
+		params[2].u.memref.shm_id, params[2].u.memref.shm_offs);
+	if (!new_fname)
+		return TEEC_ERROR_BAD_PARAMETERS;
+
+	if (strlen(new_fname) > RKSS_NAME_MAX_LENGTH) {
+		printf("new file name too long. %s", new_fname);
+		return TEEC_ERROR_BAD_PARAMETERS;
+	}
+
+	debug("rename: %s -> %s \n", old_fname, new_fname);
+
+	ret = rkss_get_fileinfo_by_name(old_fname, &p);
+	if (ret < 0) {
+		printf("filename: %s no found.", old_fname);
+		return TEEC_ERROR_ITEM_NOT_FOUND;
+	}
+
+	strcpy(p.name, new_fname);
+
+	ret = rkss_write_back_ptable(ret, &p);
+	if (ret < 0) {
+		printf("write ptable error!");
+		return TEEC_ERROR_GENERIC;
+	}
+
+	return TEEC_SUCCESS;
+}
+
+static TEEC_Result ree_fs_new_opendir(size_t num_params,
+				      struct tee_ioctl_param *params)
+{
+	char *dirname;
+	int ret;
+
+	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx \n",
+		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
+
+	dirname = (char *)params[1].u.memref.shm_id;
+	if (!dirname)
+		return TEEC_ERROR_BAD_PARAMETERS;
+
+	dir_seek = 0;
+	ret = rkss_get_dirs_by_name(dirname);
+	if (ret < 0) {
+		printf("ree_fs_new_opendir: error");
+		return TEEC_ERROR_GENERIC;
+	}
+
+	debug("ree_fs_new_opendir: %s, seek/num:%d/%d \n", dirname, dir_seek, dir_num);
+	return TEEC_SUCCESS;
+}
+
+static TEEC_Result ree_fs_new_closedir(size_t num_params,
+				       struct tee_ioctl_param *params)
+{
+	if (num_params != 1 ||
+	    (params[0].attr & TEE_IOCTL_PARAM_ATTR_TYPE_MASK) !=
+			TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_INPUT)
+		return TEEC_ERROR_BAD_PARAMETERS;
+
+	dir_seek = 0;
+	dir_num = 0;
+
+	return TEEC_SUCCESS;
+}
+
+static TEEC_Result ree_fs_new_readdir(size_t num_params,
+				      struct tee_ioctl_param *params)
+{
+	char *dirname;
+	size_t len;
+	size_t dirname_len;
+
+	dirname = (char *) params[1].u.memref.shm_id;
+	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx \n",
+		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
+	if (!dirname)
+		return TEEC_ERROR_BAD_PARAMETERS;
+	len = params[1].u.memref.size;
+
+	debug("seek/num:%d/%d \n", dir_seek, dir_num);
+	if (dir_seek == dir_num) {
+		params[1].u.memref.size = 0;
+		debug("ree_fs_new_readdir: END");
+		return TEEC_ERROR_BAD_STATE;
+	}
+
+	dirname_len = strlen(dir_cache[dir_seek]) + 1;
+	params[1].u.memref.size = dirname_len;
+	if (dirname_len > len)
+		return TEEC_ERROR_SHORT_BUFFER;
+
+	strcpy(dirname, dir_cache[dir_seek]);
+	++dir_seek;
+
+	debug("ree_fs_new_readdir: %s \n", dirname);
+
+	return TEEC_SUCCESS;
+}
+
+int tee_supp_rk_fs_init(void)
+{
+	assert(sizeof(struct rkss_file_info) == 126);
+	assert(512 / sizeof(struct rkss_file_info) == RKSS_EACH_FILEFOLDER_COUNT);
+
+	int i, ret;
+	struct rk_secure_storage rkss = {0};
+
+	/* clean secure storage*/
+#ifdef DEBUG_CLEAN_RKSS
+	for (i = 0; i < RKSS_DATA_SECTION_COUNT; i++) {
+		rkss.index = i;
+		rkss_write_section(&rkss);
+		printf("cleaned [%d]", i);
+	}
+#endif
+
+	/* Verify Partition Table*/
+	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++) {
+		debug("rkss_get_fileinfo_by_name: reading %d", i);
+		rkss.index = i;
+		ret = rkss_read_section(&rkss);
+		if (ret < 0) {
+			printf("rkss_read_section fail ! ret: %d.", ret);
+			return TEEC_ERROR_GENERIC;
+		}
+		if (rkss_verify_ptable(&rkss) < 0) {
+			printf("rkss_verify_ptable fail !");
+			return TEEC_ERROR_GENERIC;
+		}
+	}
+
+	/* Verify Usedflags Section*/
+	rkss.index = RKSS_USEDFLAGS_INDEX;
+	ret = rkss_read_section(&rkss);
+	if (ret < 0) {
+		printf("rkss_read_section fail ! ret: %d.", ret);
+		return TEEC_ERROR_GENERIC;
+	}
+	ret = rkss_verify_usedflags(&rkss);
+	if (ret < 0) {
+		printf("rkss_verify_usedflags fail ! ret: %d.", ret);
+		return TEEC_ERROR_GENERIC;
+	}
+
+#ifdef DEBUG_RKFSS
+	rkss_dump_ptable();
+	rkss_dump_usedflags();
+#endif
+	return TEEC_SUCCESS;
+}
+
+void OpteeClientRkFsInit(void)
+{
+	debug(" OpteeClientRkFsInit\n");
+	tee_supp_rk_fs_init();
+}
+bool tee_supp_param_is_value(struct tee_ioctl_param *param)
+{
+	switch (param->attr & TEE_IOCTL_PARAM_ATTR_TYPE_MASK) {
+	case TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_INPUT:
+	case TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_OUTPUT:
+	case TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_INOUT:
+		return true;
+	default:
+		return false;
+	}
+}
+
+static int rkss_step;
+int tee_supp_rk_fs_process(size_t num_params,
+			struct tee_ioctl_param *params)
+{
+	if (!num_params || !tee_supp_param_is_value(params))
+		return TEEC_ERROR_BAD_PARAMETERS;
+
+	switch (params->u.value.a) {
+	case OPTEE_MRF_OPEN:
+		debug(">>>>>>> [%d] OPTEE_MRF_OPEN! \n", rkss_step++);
+		return ree_fs_new_open(num_params, params);
+	case OPTEE_MRF_CREATE:
+		debug(">>>>>>> [%d] OPTEE_MRF_CREATE! \n", rkss_step++);
+		return ree_fs_new_create(num_params, params);
+	case OPTEE_MRF_CLOSE:
+		debug(">>>>>>> [%d] OPTEE_MRF_CLOSE! \n", rkss_step++);
+		return ree_fs_new_close(num_params, params);
+	case OPTEE_MRF_READ:
+		debug(">>>>>>> [%d] OPTEE_MRF_READ! \n", rkss_step++);
+		return ree_fs_new_read(num_params, params);
+	case OPTEE_MRF_WRITE:
+		debug(">>>>>>> [%d] OPTEE_MRF_WRITE! \n", rkss_step++);
+		return ree_fs_new_write(num_params, params);
+	case OPTEE_MRF_TRUNCATE:
+		debug(">>>>>>> [%d] OPTEE_MRF_TRUNCATE! \n", rkss_step++);
+		return ree_fs_new_truncate(num_params, params);
+	case OPTEE_MRF_REMOVE:
+		debug(">>>>>>> [%d] OPTEE_MRF_REMOVE! \n", rkss_step++);
+		return ree_fs_new_remove(num_params, params);
+	case OPTEE_MRF_RENAME:
+		debug(">>>>>>> [%d] OPTEE_MRF_RENAME! \n", rkss_step++);
+		return ree_fs_new_rename(num_params, params);
+	case OPTEE_MRF_OPENDIR:
+		debug(">>>>>>> [%d] OPTEE_MRF_OPENDIR! \n", rkss_step++);
+		return ree_fs_new_opendir(num_params, params);
+	case OPTEE_MRF_CLOSEDIR:
+		debug(">>>>>>> [%d] OPTEE_MRF_CLOSEDIR! \n", rkss_step++);
+		return ree_fs_new_closedir(num_params, params);
+	case OPTEE_MRF_READDIR:
+		debug(">>>>>>> [%d] OPTEE_MRF_READDIR! \n", rkss_step++);
+		return ree_fs_new_readdir(num_params, params);
+	default:
+		return TEEC_ERROR_BAD_PARAMETERS;
+	}
+}

commit deedd3562aae87d513b69cd2cbc096d4ad7a6e51
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 20 20:10:37 2018 +0800

    include: key.h: remove unused definition
    
    Change-Id: I9797dba18237cd31aee2cc232af75a623e2ee9c2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/key.h b/include/key.h
index 5310c50d95..ab4471b7a8 100644
--- a/include/key.h
+++ b/include/key.h
@@ -12,9 +12,8 @@
 #define KEY_LONG_DOWN_MS	2000
 
 enum key_state {
-	KEY_PRESS_NONE,
-	KEY_PRESS_UP,
-	KEY_PRESS_DOWN,
+	KEY_PRESS_NONE,	/* press without release */
+	KEY_PRESS_DOWN,	/* press -> release */
 	KEY_PRESS_LONG_DOWN,
 	KEY_NOT_EXIST,
 };

commit f462f55341ba7573a4d61a1c7fdb0d78c96f13df
Author: David Wu <david.wu@rock-chips.com>
Date:   Fri Mar 16 18:01:22 2018 +0800

    video: pwm_backlight: support PWM polarity setting
    
    The latest kernel PWM drivers enable the polarity settings. When system
    run from U-Boot to kerenl, if there are differences in polarity set or
    duty cycle, the PMW will re-init:
    close -> set polarity and duty cycle -> enable the PWM.
    The pwm_backlight would be unstable, might be screen flashing.
    
    Change-Id: I7c026c9756e013f0ac99e43b09b633dc83268ce9
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/video/pwm_backlight.c b/drivers/video/pwm_backlight.c
index a124a961cb..718b2fd04b 100644
--- a/drivers/video/pwm_backlight.c
+++ b/drivers/video/pwm_backlight.c
@@ -20,6 +20,7 @@ struct pwm_backlight_priv {
 	struct udevice *pwm;
 	uint channel;
 	uint period_ns;
+	bool polarity;
 	uint default_level;
 	uint min_level;
 	uint max_level;
@@ -45,6 +46,12 @@ static int pwm_backlight_enable(struct udevice *dev)
 		mdelay(120);
 	}
 
+	ret = pwm_set_invert(priv->pwm, priv->channel, priv->polarity);
+	if (ret) {
+		dev_err(dev, "Failed to invert PWM\n");
+		return ret;
+	}
+
 	duty_cycle = priv->period_ns * (priv->default_level - priv->min_level) /
 		(priv->max_level - priv->min_level + 1);
 	ret = pwm_set_config(priv->pwm, priv->channel, priv->period_ns,
@@ -136,6 +143,7 @@ static int pwm_backlight_ofdata_to_platdata(struct udevice *dev)
 	}
 	priv->channel = args.args[0];
 	priv->period_ns = args.args[1];
+	priv->polarity = args.args[2];
 
 	index = dev_read_u32_default(dev, "default-brightness-level", 255);
 	cell = dev_read_prop(dev, "brightness-levels", &len);

commit bab0c55c3cc6b32a927a19c9cb5bb94a91f10963
Author: David Wu <david.wu@rock-chips.com>
Date:   Fri Mar 16 16:47:08 2018 +0800

    pwm: rockchip: Do pwm pinctrl setting after pwm enabled
    
    If the PWM pinctrl uses default state, the iomux setting will
    be done at probe, the PWM may not be enabled at this moment.
    It will make PWM into an intermediate state, destroy the default
    hardware state, the PWM is not ready for work yet. So it is better
    for doing PWM pinctrl setting after PWM enabled.
    
    Change-Id: I8b700a07083b9a6798303fc5a5ed9f29eb42c47e
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/dts/rk3036.dtsi b/arch/arm/dts/rk3036.dtsi
index ca1d5ac12e..ca8f1e8e8d 100644
--- a/arch/arm/dts/rk3036.dtsi
+++ b/arch/arm/dts/rk3036.dtsi
@@ -152,7 +152,7 @@
 		compatible = "rockchip,rk2928-pwm";
 		reg = <0x20050000 0x10>;
 		#pwm-cells = <3>;
-		pinctrl-names = "default";
+		pinctrl-names = "active";
 		pinctrl-0 = <&pwm0_pin>;
 		clocks = <&cru PCLK_PWM>;
 		clock-names = "pwm";
@@ -163,7 +163,7 @@
 		compatible = "rockchip,rk2928-pwm";
 		reg = <0x20050010 0x10>;
 		#pwm-cells = <3>;
-		pinctrl-names = "default";
+		pinctrl-names = "active";
 		pinctrl-0 = <&pwm1_pin>;
 		clocks = <&cru PCLK_PWM>;
 		clock-names = "pwm";
@@ -174,7 +174,7 @@
 		compatible = "rockchip,rk2928-pwm";
 		reg = <0x20050020 0x10>;
 		#pwm-cells = <3>;
-		pinctrl-names = "default";
+		pinctrl-names = "active";
 		pinctrl-0 = <&pwm2_pin>;
 		clocks = <&cru PCLK_PWM>;
 		clock-names = "pwm";
@@ -185,7 +185,7 @@
 		compatible = "rockchip,rk2928-pwm";
 		reg = <0x20050030 0x10>;
 		#pwm-cells = <2>;
-		pinctrl-names = "default";
+		pinctrl-names = "active";
 		pinctrl-0 = <&pwm3_pin>;
 		clocks = <&cru PCLK_PWM>;
 		clock-names = "pwm";
diff --git a/arch/arm/dts/rk3066a.dtsi b/arch/arm/dts/rk3066a.dtsi
index 92ee1c2aa0..7cb85a245d 100644
--- a/arch/arm/dts/rk3066a.dtsi
+++ b/arch/arm/dts/rk3066a.dtsi
@@ -637,22 +637,22 @@
 };
 
 &pwm0 {
-	pinctrl-names = "default";
+	pinctrl-names = "active";
 	pinctrl-0 = <&pwm0_out>;
 };
 
 &pwm1 {
-	pinctrl-names = "default";
+	pinctrl-names = "active";
 	pinctrl-0 = <&pwm1_out>;
 };
 
 &pwm2 {
-	pinctrl-names = "default";
+	pinctrl-names = "active";
 	pinctrl-0 = <&pwm2_out>;
 };
 
 &pwm3 {
-	pinctrl-names = "default";
+	pinctrl-names = "active";
 	pinctrl-0 = <&pwm3_out>;
 };
 
diff --git a/arch/arm/dts/rk3128.dtsi b/arch/arm/dts/rk3128.dtsi
index 9e2568f516..cf63f34b70 100644
--- a/arch/arm/dts/rk3128.dtsi
+++ b/arch/arm/dts/rk3128.dtsi
@@ -312,7 +312,7 @@
 		compatible = "rockchip,rk3128-pwm", "rockchip,rk3288-pwm";
 		reg = <0x20050000 0x10>;
 		#pwm-cells = <3>;
-		pinctrl-names = "default";
+		pinctrl-names = "active";
 		pinctrl-0 = <&pwm0_pin>;
 		clocks = <&cru PCLK_PWM>;
 		clock-names = "pwm";
@@ -322,7 +322,7 @@
 		compatible = "rockchip,rk3128-pwm", "rockchip,rk3288-pwm";
 		reg = <0x20050010 0x10>;
 		#pwm-cells = <2>;
-		pinctrl-names = "default";
+		pinctrl-names = "active";
 		pinctrl-0 = <&pwm1_pin>;
 		clocks = <&cru PCLK_PWM>;
 		clock-names = "pwm";
@@ -332,7 +332,7 @@
 		compatible = "rockchip,rk3128-pwm", "rockchip,rk3288-pwm";
 		reg = <0x20050020 0x10>;
 		#pwm-cells = <2>;
-		pinctrl-names = "default";
+		pinctrl-names = "active";
 		pinctrl-0 = <&pwm2_pin>;
 		clocks = <&cru PCLK_PWM>;
 		clock-names = "pwm";
@@ -342,7 +342,7 @@
 		compatible = "rockchip,rk3128-pwm", "rockchip,rk3288-pwm";
 		reg = <0x20050030 0x10>;
 		#pwm-cells = <2>;
-		pinctrl-names = "default";
+		pinctrl-names = "active";
 		pinctrl-0 = <&pwm3_pin>;
 		clocks = <&cru PCLK_PWM>;
 		clock-names = "pwm";
diff --git a/arch/arm/dts/rk3188.dtsi b/arch/arm/dts/rk3188.dtsi
index 518469cf97..5178b3df85 100644
--- a/arch/arm/dts/rk3188.dtsi
+++ b/arch/arm/dts/rk3188.dtsi
@@ -551,22 +551,22 @@
 };
 
 &pwm0 {
-	pinctrl-names = "default";
+	pinctrl-names = "active";
 	pinctrl-0 = <&pwm0_out>;
 };
 
 &pwm1 {
-	pinctrl-names = "default";
+	pinctrl-names = "active";
 	pinctrl-0 = <&pwm1_out>;
 };
 
 &pwm2 {
-	pinctrl-names = "default";
+	pinctrl-names = "active";
 	pinctrl-0 = <&pwm2_out>;
 };
 
 &pwm3 {
-	pinctrl-names = "default";
+	pinctrl-names = "active";
 	pinctrl-0 = <&pwm3_out>;
 };
 
diff --git a/arch/arm/dts/rk322x.dtsi b/arch/arm/dts/rk322x.dtsi
index 2757f93860..bbb8d4962c 100644
--- a/arch/arm/dts/rk322x.dtsi
+++ b/arch/arm/dts/rk322x.dtsi
@@ -288,7 +288,7 @@
 		#pwm-cells = <3>;
 		clocks = <&cru PCLK_PWM>;
 		clock-names = "pwm";
-		pinctrl-names = "default";
+		pinctrl-names = "active";
 		pinctrl-0 = <&pwm0_pin>;
 		status = "disabled";
 	};
@@ -299,7 +299,7 @@
 		#pwm-cells = <3>;
 		clocks = <&cru PCLK_PWM>;
 		clock-names = "pwm";
-		pinctrl-names = "default";
+		pinctrl-names = "active";
 		pinctrl-0 = <&pwm1_pin>;
 		status = "disabled";
 	};
@@ -310,7 +310,7 @@
 		#pwm-cells = <3>;
 		clocks = <&cru PCLK_PWM>;
 		clock-names = "pwm";
-		pinctrl-names = "default";
+		pinctrl-names = "active";
 		pinctrl-0 = <&pwm2_pin>;
 		status = "disabled";
 	};
@@ -321,7 +321,7 @@
 		#pwm-cells = <2>;
 		clocks = <&cru PCLK_PWM>;
 		clock-names = "pwm";
-		pinctrl-names = "default";
+		pinctrl-names = "active";
 		pinctrl-0 = <&pwm3_pin>;
 		status = "disabled";
 	};
diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index 2c8a616782..316cb3b590 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -520,7 +520,7 @@
 		compatible = "rockchip,rk3288-pwm";
 		reg = <0xff680000 0x10>;
 		#pwm-cells = <3>;
-		pinctrl-names = "default";
+		pinctrl-names = "active";
 		pinctrl-0 = <&pwm0_pin>;
 		clocks = <&cru PCLK_PWM>;
 		clock-names = "pwm";
@@ -532,7 +532,7 @@
 		compatible = "rockchip,rk3288-pwm";
 		reg = <0xff680010 0x10>;
 		#pwm-cells = <3>;
-		pinctrl-names = "default";
+		pinctrl-names = "active";
 		pinctrl-0 = <&pwm1_pin>;
 		clocks = <&cru PCLK_PWM>;
 		clock-names = "pwm";
@@ -544,7 +544,7 @@
 		compatible = "rockchip,rk3288-pwm";
 		reg = <0xff680020 0x10>;
 		#pwm-cells = <3>;
-		pinctrl-names = "default";
+		pinctrl-names = "active";
 		pinctrl-0 = <&pwm2_pin>;
 		clocks = <&cru PCLK_PWM>;
 		clock-names = "pwm";
@@ -556,7 +556,7 @@
 		compatible = "rockchip,rk3288-pwm";
 		reg = <0xff680030 0x10>;
 		#pwm-cells = <2>;
-		pinctrl-names = "default";
+		pinctrl-names = "active";
 		pinctrl-0 = <&pwm3_pin>;
 		clocks = <&cru PCLK_PWM>;
 		clock-names = "pwm";
diff --git a/arch/arm/dts/rk3368.dtsi b/arch/arm/dts/rk3368.dtsi
index b4f4f6139d..21b0971de3 100644
--- a/arch/arm/dts/rk3368.dtsi
+++ b/arch/arm/dts/rk3368.dtsi
@@ -592,7 +592,7 @@
 		compatible = "rockchip,rk3368-pwm", "rockchip,rk3288-pwm";
 		reg = <0x0 0xff680000 0x0 0x10>;
 		#pwm-cells = <3>;
-		pinctrl-names = "default";
+		pinctrl-names = "active";
 		pinctrl-0 = <&pwm0_pin>;
 		clocks = <&cru PCLK_PWM1>;
 		clock-names = "pwm";
@@ -603,7 +603,7 @@
 		compatible = "rockchip,rk3368-pwm", "rockchip,rk3288-pwm";
 		reg = <0x0 0xff680010 0x0 0x10>;
 		#pwm-cells = <3>;
-		pinctrl-names = "default";
+		pinctrl-names = "active";
 		pinctrl-0 = <&pwm1_pin>;
 		clocks = <&cru PCLK_PWM1>;
 		clock-names = "pwm";
@@ -623,7 +623,7 @@
 		compatible = "rockchip,rk3368-pwm", "rockchip,rk3288-pwm";
 		reg = <0x0 0xff680030 0x0 0x10>;
 		#pwm-cells = <3>;
-		pinctrl-names = "default";
+		pinctrl-names = "active";
 		pinctrl-0 = <&pwm3_pin>;
 		clocks = <&cru PCLK_PWM1>;
 		clock-names = "pwm";
diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
index 68221b47f7..5d9a8b9157 100644
--- a/arch/arm/dts/rk3399.dtsi
+++ b/arch/arm/dts/rk3399.dtsi
@@ -1091,7 +1091,7 @@
 		compatible = "rockchip,rk3399-pwm", "rockchip,rk3288-pwm";
 		reg = <0x0 0xff420000 0x0 0x10>;
 		#pwm-cells = <3>;
-		pinctrl-names = "default";
+		pinctrl-names = "active";
 		pinctrl-0 = <&pwm0_pin>;
 		clocks = <&pmucru PCLK_RKPWM_PMU>;
 		clock-names = "pwm";
@@ -1102,7 +1102,7 @@
 		compatible = "rockchip,rk3399-pwm", "rockchip,rk3288-pwm";
 		reg = <0x0 0xff420010 0x0 0x10>;
 		#pwm-cells = <3>;
-		pinctrl-names = "default";
+		pinctrl-names = "active";
 		pinctrl-0 = <&pwm1_pin>;
 		clocks = <&pmucru PCLK_RKPWM_PMU>;
 		clock-names = "pwm";
@@ -1113,7 +1113,7 @@
 		compatible = "rockchip,rk3399-pwm", "rockchip,rk3288-pwm";
 		reg = <0x0 0xff420020 0x0 0x10>;
 		#pwm-cells = <3>;
-		pinctrl-names = "default";
+		pinctrl-names = "active";
 		pinctrl-0 = <&pwm2_pin>;
 		clocks = <&pmucru PCLK_RKPWM_PMU>;
 		clock-names = "pwm";
@@ -1124,7 +1124,7 @@
 		compatible = "rockchip,rk3399-pwm", "rockchip,rk3288-pwm";
 		reg = <0x0 0xff420030 0x0 0x10>;
 		#pwm-cells = <3>;
-		pinctrl-names = "default";
+		pinctrl-names = "active";
 		pinctrl-0 = <&pwm3a_pin>;
 		clocks = <&pmucru PCLK_RKPWM_PMU>;
 		clock-names = "pwm";
diff --git a/drivers/pwm/rk_pwm.c b/drivers/pwm/rk_pwm.c
index e71c4a0b75..b22630be92 100644
--- a/drivers/pwm/rk_pwm.c
+++ b/drivers/pwm/rk_pwm.c
@@ -9,6 +9,7 @@
 #include <clk.h>
 #include <div64.h>
 #include <dm.h>
+#include <dm/pinctrl.h>
 #include <pwm.h>
 #include <regmap.h>
 #include <syscon.h>
@@ -128,6 +129,9 @@ static int rk_pwm_set_enable(struct udevice *dev, uint channel, bool enable)
 	if (priv->data->vop_pwm)
 		priv->vop_pwm_en = enable;
 
+	if (enable)
+		pinctrl_select_state(dev, "active");
+
 	return 0;
 }
 

commit fdd40e0026d77d8e6eefe187380ec53d878bda04
Author: David Wu <david.wu@rock-chips.com>
Date:   Fri Mar 16 11:36:02 2018 +0800

    pwm: rockchip: Update PWM driver to support all Rockchip Socs
    
    The new PWM driver support PWM polarity, lock, voppwm and more
    functions. In most cases, the PWM requires the same configuration
    as kernel to reduce the intermediate state between uboot and kernel,
    so we sync the code with driver.
    
    Change-Id: Ife5b8470f72eed197dd48e949bcf7da95b9de34c
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/pwm.h b/arch/arm/include/asm/arch-rockchip/pwm.h
index b1d8047691..3b6eb353e5 100644
--- a/arch/arm/include/asm/arch-rockchip/pwm.h
+++ b/arch/arm/include/asm/arch-rockchip/pwm.h
@@ -8,13 +8,15 @@
 #ifndef _ASM_ARCH_PWM_H
 #define _ASM_ARCH_PWM_H
 
-struct rk3288_pwm {
-	u32 cnt;
-	u32 period_hpr;
-	u32 duty_lpr;
-	u32 ctrl;
+struct rockchip_pwm_regs {
+	unsigned long duty;
+	unsigned long period;
+	unsigned long cntr;
+	unsigned long ctrl;
 };
-check_member(rk3288_pwm, ctrl, 0xc);
+
+#define PWM_CTRL_TIMER_EN		(1 << 0)
+#define PWM_CTRL_OUTPUT_EN		(1 << 3)
 
 #define RK_PWM_DISABLE                  (0 << 0)
 #define RK_PWM_ENABLE                   (1 << 0)
@@ -34,6 +36,9 @@ check_member(rk3288_pwm, ctrl, 0xc);
 #define PWM_OUTPUT_LEFT                 (0 << 5)
 #define PWM_OUTPUT_CENTER               (1 << 5)
 
+#define PWM_LOCK			(1 << 6)
+#define PWM_UNLOCK			(0 << 6)
+
 #define PWM_LP_ENABLE                   (1 << 8)
 #define PWM_LP_DISABLE                  (0 << 8)
 
diff --git a/drivers/pwm/rk_pwm.c b/drivers/pwm/rk_pwm.c
index 13ba2279d9..e71c4a0b75 100644
--- a/drivers/pwm/rk_pwm.c
+++ b/drivers/pwm/rk_pwm.c
@@ -18,22 +18,38 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+struct rockchip_pwm_data {
+	struct rockchip_pwm_regs regs;
+	unsigned int prescaler;
+	bool supports_polarity;
+	bool supports_lock;
+	bool vop_pwm;
+	u32 enable_conf;
+	u32 enable_conf_mask;
+};
+
 struct rk_pwm_priv {
-	struct rk3288_pwm *regs;
+	fdt_addr_t base;
 	ulong freq;
-	uint enable_conf;
+	u32 conf_polarity;
+	bool vop_pwm_en; /* indicate voppwm mirror register state */
+	const struct rockchip_pwm_data *data;
 };
 
 static int rk_pwm_set_invert(struct udevice *dev, uint channel, bool polarity)
 {
 	struct rk_pwm_priv *priv = dev_get_priv(dev);
 
+	if (!priv->data->supports_polarity) {
+		debug("%s: Do not support polarity\n", __func__);
+		return 0;
+	}
+
 	debug("%s: polarity=%u\n", __func__, polarity);
-	priv->enable_conf &= ~(PWM_DUTY_MASK | PWM_INACTIVE_MASK);
 	if (polarity)
-		priv->enable_conf |= PWM_DUTY_NEGATIVE | PWM_INACTIVE_POSTIVE;
+		priv->conf_polarity = PWM_DUTY_NEGATIVE | PWM_INACTIVE_POSTIVE;
 	else
-		priv->enable_conf |= PWM_DUTY_POSTIVE | PWM_INACTIVE_NEGATIVE;
+		priv->conf_polarity = PWM_DUTY_POSTIVE | PWM_INACTIVE_NEGATIVE;
 
 	return 0;
 }
@@ -42,24 +58,51 @@ static int rk_pwm_set_config(struct udevice *dev, uint channel, uint period_ns,
 			     uint duty_ns)
 {
 	struct rk_pwm_priv *priv = dev_get_priv(dev);
-	struct rk3288_pwm *regs = priv->regs;
+	const struct rockchip_pwm_regs *regs = &priv->data->regs;
 	unsigned long period, duty;
-	uint32_t ctrl;
+	u32 ctrl;
 
 	debug("%s: period_ns=%u, duty_ns=%u\n", __func__, period_ns, duty_ns);
 
-	ctrl = readl(&regs->ctrl);
-	/* Ignore bit0: RK_PWM_ENABLE */
-	ctrl &= ~0xfffe;
-	ctrl |= PWM_SEL_SRC_CLK | PWM_OUTPUT_LEFT | PWM_LP_DISABLE |
-		PWM_CONTINUOUS | priv->enable_conf;
-	writel(ctrl, &regs->ctrl);
+	ctrl = readl(priv->base + regs->ctrl);
+	if (priv->data->vop_pwm) {
+		if (priv->vop_pwm_en)
+			ctrl |= RK_PWM_ENABLE;
+		else
+			ctrl &= ~RK_PWM_ENABLE;
+	}
+
+	/*
+	 * Lock the period and duty of previous configuration, then
+	 * change the duty and period, that would not be effective.
+	 */
+	if (priv->data->supports_lock) {
+		ctrl |= PWM_LOCK;
+		writel(ctrl, priv->base + regs->ctrl);
+	}
 
-	period = lldiv((uint64_t)(priv->freq / 1000) * period_ns, 1000000);
-	duty = lldiv((uint64_t)(priv->freq / 1000) * duty_ns, 1000000);
+	period = lldiv((uint64_t)(priv->freq / 1000) * period_ns,
+		       priv->data->prescaler * 1000000);
+	duty = lldiv((uint64_t)(priv->freq / 1000) * duty_ns,
+		     priv->data->prescaler * 1000000);
+
+	writel(period, priv->base + regs->period);
+	writel(duty, priv->base + regs->duty);
+
+	if (priv->data->supports_polarity) {
+		ctrl &= ~(PWM_DUTY_MASK | PWM_INACTIVE_MASK);
+		ctrl |= priv->conf_polarity;
+	}
+
+	/*
+	 * Unlock and set polarity at the same time,
+	 * the configuration of duty, period and polarity
+	 * would be effective together at next period.
+	 */
+	if (priv->data->supports_lock)
+		ctrl &= ~PWM_LOCK;
+	writel(ctrl, priv->base + regs->ctrl);
 
-	writel(period, &regs->period_hpr);
-	writel(duty, &regs->duty_lpr);
 	debug("%s: period=%lu, duty=%lu\n", __func__, period, duty);
 
 	return 0;
@@ -68,10 +111,22 @@ static int rk_pwm_set_config(struct udevice *dev, uint channel, uint period_ns,
 static int rk_pwm_set_enable(struct udevice *dev, uint channel, bool enable)
 {
 	struct rk_pwm_priv *priv = dev_get_priv(dev);
-	struct rk3288_pwm *regs = priv->regs;
+	const struct rockchip_pwm_regs *regs = &priv->data->regs;
+	u32 ctrl;
 
 	debug("%s: Enable '%s'\n", __func__, dev->name);
-	clrsetbits_le32(&regs->ctrl, RK_PWM_ENABLE, enable ? RK_PWM_ENABLE : 0);
+
+	ctrl = readl(priv->base + regs->ctrl);
+	ctrl &= ~priv->data->enable_conf_mask;
+
+	if (enable)
+		ctrl |= priv->data->enable_conf;
+	else
+		ctrl &= ~priv->data->enable_conf;
+
+	writel(ctrl, priv->base + regs->ctrl);
+	if (priv->data->vop_pwm)
+		priv->vop_pwm_en = enable;
 
 	return 0;
 }
@@ -80,7 +135,7 @@ static int rk_pwm_ofdata_to_platdata(struct udevice *dev)
 {
 	struct rk_pwm_priv *priv = dev_get_priv(dev);
 
-	priv->regs = (struct rk3288_pwm *)dev_read_addr(dev);
+	priv->base = dev_read_addr(dev);
 
 	return 0;
 }
@@ -96,8 +151,12 @@ static int rk_pwm_probe(struct udevice *dev)
 		debug("%s get clock fail!\n", __func__);
 		return -EINVAL;
 	}
+
 	priv->freq = clk_get_rate(&clk);
-	priv->enable_conf = PWM_DUTY_POSTIVE | PWM_INACTIVE_POSTIVE;
+	priv->data = (struct rockchip_pwm_data *)dev_get_driver_data(dev);
+
+	if (priv->data->supports_polarity)
+		priv->conf_polarity = PWM_DUTY_POSTIVE | PWM_INACTIVE_POSTIVE;
 
 	return 0;
 }
@@ -108,9 +167,75 @@ static const struct pwm_ops rk_pwm_ops = {
 	.set_enable	= rk_pwm_set_enable,
 };
 
+static const struct rockchip_pwm_data pwm_data_v1 = {
+	.regs = {
+		.duty = 0x04,
+		.period = 0x08,
+		.cntr = 0x00,
+		.ctrl = 0x0c,
+	},
+	.prescaler = 2,
+	.supports_polarity = false,
+	.supports_lock = false,
+	.vop_pwm = false,
+	.enable_conf = PWM_CTRL_OUTPUT_EN | PWM_CTRL_TIMER_EN,
+	.enable_conf_mask = BIT(1) | BIT(3),
+};
+
+static const struct rockchip_pwm_data pwm_data_v2 = {
+	.regs = {
+		.duty = 0x08,
+		.period = 0x04,
+		.cntr = 0x00,
+		.ctrl = 0x0c,
+	},
+	.prescaler = 1,
+	.supports_polarity = true,
+	.supports_lock = false,
+	.vop_pwm = false,
+	.enable_conf = PWM_OUTPUT_LEFT | PWM_LP_DISABLE | RK_PWM_ENABLE |
+		       PWM_CONTINUOUS,
+	.enable_conf_mask = GENMASK(2, 0) | BIT(5) | BIT(8),
+};
+
+static const struct rockchip_pwm_data pwm_data_vop = {
+	.regs = {
+		.duty = 0x08,
+		.period = 0x04,
+		.cntr = 0x0c,
+		.ctrl = 0x00,
+	},
+	.prescaler = 1,
+	.supports_polarity = true,
+	.supports_lock = false,
+	.vop_pwm = true,
+	.enable_conf = PWM_OUTPUT_LEFT | PWM_LP_DISABLE | RK_PWM_ENABLE |
+		       PWM_CONTINUOUS,
+	.enable_conf_mask = GENMASK(2, 0) | BIT(5) | BIT(8),
+};
+
+static const struct rockchip_pwm_data pwm_data_v3 = {
+	.regs = {
+		.duty = 0x08,
+		.period = 0x04,
+		.cntr = 0x00,
+		.ctrl = 0x0c,
+	},
+	.prescaler = 1,
+	.supports_polarity = true,
+	.supports_lock = true,
+	.vop_pwm = false,
+	.enable_conf = PWM_OUTPUT_LEFT | PWM_LP_DISABLE | RK_PWM_ENABLE |
+		       PWM_CONTINUOUS,
+	.enable_conf_mask = GENMASK(2, 0) | BIT(5) | BIT(8),
+};
+
 static const struct udevice_id rk_pwm_ids[] = {
-	{ .compatible = "rockchip,rk3288-pwm" },
-	{ .compatible = "rockchip,rk3328-pwm" },
+	{ .compatible = "rockchip,rk2928-pwm", .data = (ulong)&pwm_data_v1},
+	{ .compatible = "rockchip,rk3288-pwm", .data = (ulong)&pwm_data_v2},
+	{ .compatible = "rockchip,rk3328-pwm", .data = (ulong)&pwm_data_v3},
+	{ .compatible = "rockchip,vop-pwm", .data = (ulong)&pwm_data_vop},
+	{ .compatible = "rockchip,rk3399-pwm", .data = (ulong)&pwm_data_v2},
 	{ }
 };
 

commit b3077611a614cd53588b27bc7ef25873dfaad35b
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Mar 13 17:47:31 2018 +0800

    pinctrl: rockchip: Add pinctrl support for rk3308
    
    The most pins of rk3308 are 2bits iomux, but the banks's register
    width is 0x8.
    
    Change-Id: Iaf79232a552a5e239610bce533fe884df4a4743c
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 6df466d3b7..ae7ab2e697 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -23,6 +23,7 @@ enum rockchip_pinctrl_type {
 	RK3128,
 	RK3188,
 	RK3288,
+	RK3308,
 	RK3368,
 	RK3399,
 };
@@ -35,6 +36,7 @@ enum rockchip_pinctrl_type {
 #define IOMUX_SOURCE_PMU	BIT(2)
 #define IOMUX_UNROUTED		BIT(3)
 #define IOMUX_WIDTH_3BIT	BIT(4)
+#define IOMUX_8WIDTH_2BIT	BIT(5)
 
 /**
  * @type: iomux variant using IOMUX_* constants
@@ -412,6 +414,70 @@ static  struct rockchip_mux_recalced_data rk3128_mux_recalced_data[] = {
 	},
 };
 
+static struct rockchip_mux_recalced_data rk3308_mux_recalced_data[] = {
+	{
+		.num = 1,
+		.pin = 14,
+		.reg = 0x28,
+		.bit = 12,
+		.mask = 0x7
+	}, {
+		.num = 1,
+		.pin = 15,
+		.reg = 0x2c,
+		.bit = 0,
+		.mask = 0x3
+	}, {
+		.num = 1,
+		.pin = 18,
+		.reg = 0x30,
+		.bit = 4,
+		.mask = 0x7
+	}, {
+		.num = 1,
+		.pin = 19,
+		.reg = 0x30,
+		.bit = 8,
+		.mask = 0x7
+	}, {
+		.num = 1,
+		.pin = 20,
+		.reg = 0x30,
+		.bit = 12,
+		.mask = 0x7
+	}, {
+		.num = 1,
+		.pin = 21,
+		.reg = 0x34,
+		.bit = 0,
+		.mask = 0x7
+	}, {
+		.num = 1,
+		.pin = 22,
+		.reg = 0x34,
+		.bit = 4,
+		.mask = 0x7
+	}, {
+		.num = 1,
+		.pin = 23,
+		.reg = 0x34,
+		.bit = 8,
+		.mask = 0x7
+	}, {
+		.num = 3,
+		.pin = 12,
+		.reg = 0x68,
+		.bit = 8,
+		.mask = 0x7
+	}, {
+		.num = 3,
+		.pin = 13,
+		.reg = 0x68,
+		.bit = 12,
+		.mask = 0x7
+	},
+};
+
 static struct rockchip_mux_recalced_data rk3328_mux_recalced_data[] = {
 	{
 		.num = 2,
@@ -718,6 +784,38 @@ static struct rockchip_mux_route_data rk3288_mux_route_data[] = {
 	},
 };
 
+static struct rockchip_mux_route_data rk3308_mux_route_data[] = {
+	{
+		/* uart2_rxm0 */
+		.bank_num = 1,
+		.pin = 22,
+		.func = 2,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 2) | BIT(16 + 3),
+	}, {
+		/* uart2_rxm1 */
+		.bank_num = 4,
+		.pin = 26,
+		.func = 2,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 2) | BIT(16 + 3) | BIT(2),
+	}, {
+		/* i2c3_sdam0 */
+		.bank_num = 0,
+		.pin = 23,
+		.func = 2,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 4),
+	}, {
+		/* i2c3_sdam1 */
+		.bank_num = 3,
+		.pin = 12,
+		.func = 2,
+		.route_offset = 0x314,
+		.route_val =  BIT(16 + 4) | BIT(4),
+	},
+};
+
 static struct rockchip_mux_route_data rk3328_mux_route_data[] = {
 	{
 		/* uart2dbg_rxm0 */
@@ -1371,6 +1469,61 @@ static void rk3228_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
 	*bit *= RK3288_DRV_BITS_PER_PIN;
 }
 
+#define RK3308_PULL_OFFSET		0xa0
+
+static void rk3308_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
+					 int pin_num, struct regmap **regmap,
+					 int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	*regmap = priv->regmap_base;
+	*reg = RK3308_PULL_OFFSET;
+	*reg += bank->bank_num * RK3188_PULL_BANK_STRIDE;
+	*reg += ((pin_num / RK3188_PULL_PINS_PER_REG) * 4);
+
+	*bit = (pin_num % RK3188_PULL_PINS_PER_REG);
+	*bit *= RK3188_PULL_BITS_PER_PIN;
+}
+
+#define RK3308_DRV_GRF_OFFSET		0x100
+
+static void rk3308_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
+					int pin_num, struct regmap **regmap,
+					int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	*regmap = priv->regmap_base;
+	*reg = RK3308_DRV_GRF_OFFSET;
+	*reg += bank->bank_num * RK3288_DRV_BANK_STRIDE;
+	*reg += ((pin_num / RK3288_DRV_PINS_PER_REG) * 4);
+
+	*bit = (pin_num % RK3288_DRV_PINS_PER_REG);
+	*bit *= RK3288_DRV_BITS_PER_PIN;
+}
+
+#define RK3308_SCHMITT_PINS_PER_REG	8
+#define RK3308_SCHMITT_BANK_STRIDE	16
+#define RK3308_SCHMITT_GRF_OFFSET	0x1a0
+
+static int rk3308_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank,
+					   int pin_num,
+					   struct regmap **regmap,
+					   int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	*regmap = priv->regmap_base;
+	*reg = RK3308_SCHMITT_GRF_OFFSET;
+
+	*reg += bank->bank_num * RK3308_SCHMITT_BANK_STRIDE;
+	*reg += ((pin_num / RK3308_SCHMITT_PINS_PER_REG) * 4);
+	*bit = pin_num % RK3308_SCHMITT_PINS_PER_REG;
+
+	return 0;
+}
+
 #define RK3368_PULL_GRF_OFFSET		0x100
 #define RK3368_PULL_PMU_OFFSET		0x10
 
@@ -1631,6 +1784,7 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank,
 	case RV1108:
 	case RK3188:
 	case RK3288:
+	case RK3308:
 	case RK3368:
 	case RK3399:
 		pull_type = bank->pull_type[pin_num / 8];
@@ -1724,6 +1878,7 @@ static bool rockchip_pinconf_pull_valid(struct rockchip_pin_ctrl *ctrl,
 	case RV1108:
 	case RK3188:
 	case RK3288:
+	case RK3308:
 	case RK3368:
 	case RK3399:
 		return (pull != PIN_CONFIG_BIAS_PULL_PIN_DEFAULT);
@@ -2295,6 +2450,44 @@ static struct rockchip_pin_ctrl rk3288_pin_ctrl = {
 		.drv_calc_reg		= rk3288_calc_drv_reg_and_bit,
 };
 
+static struct rockchip_pin_bank rk3308_pin_banks[] = {
+	PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", IOMUX_8WIDTH_2BIT,
+					     IOMUX_8WIDTH_2BIT,
+					     IOMUX_8WIDTH_2BIT,
+					     IOMUX_8WIDTH_2BIT),
+	PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1", IOMUX_8WIDTH_2BIT,
+					     IOMUX_8WIDTH_2BIT,
+					     IOMUX_8WIDTH_2BIT,
+					     IOMUX_8WIDTH_2BIT),
+	PIN_BANK_IOMUX_FLAGS(2, 32, "gpio2", IOMUX_8WIDTH_2BIT,
+					     IOMUX_8WIDTH_2BIT,
+					     IOMUX_8WIDTH_2BIT,
+					     IOMUX_8WIDTH_2BIT),
+	PIN_BANK_IOMUX_FLAGS(3, 32, "gpio3", IOMUX_8WIDTH_2BIT,
+					     IOMUX_8WIDTH_2BIT,
+					     IOMUX_8WIDTH_2BIT,
+					     IOMUX_8WIDTH_2BIT),
+	PIN_BANK_IOMUX_FLAGS(4, 32, "gpio4", IOMUX_8WIDTH_2BIT,
+					     IOMUX_8WIDTH_2BIT,
+					     IOMUX_8WIDTH_2BIT,
+					     IOMUX_8WIDTH_2BIT),
+};
+
+static struct rockchip_pin_ctrl rk3308_pin_ctrl = {
+		.pin_banks		= rk3308_pin_banks,
+		.nr_banks		= ARRAY_SIZE(rk3308_pin_banks),
+		.label			= "RK3308-GPIO",
+		.type			= RK3308,
+		.grf_mux_offset		= 0x0,
+		.iomux_recalced		= rk3308_mux_recalced_data,
+		.niomux_recalced	= ARRAY_SIZE(rk3308_mux_recalced_data),
+		.iomux_routes		= rk3308_mux_route_data,
+		.niomux_routes		= ARRAY_SIZE(rk3308_mux_route_data),
+		.pull_calc_reg		= rk3308_calc_pull_reg_and_bit,
+		.drv_calc_reg		= rk3308_calc_drv_reg_and_bit,
+		.schmitt_calc_reg	= rk3308_calc_schmitt_reg_and_bit,
+};
+
 static struct rockchip_pin_bank rk3328_pin_banks[] = {
 	PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", 0, 0, 0, 0),
 	PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1", 0, 0, 0, 0),
@@ -2435,6 +2628,8 @@ static const struct udevice_id rockchip_pinctrl_dt_match[] = {
 		.data = (ulong)&rk3228_pin_ctrl },
 	{ .compatible = "rockchip,rk3288-pinctrl",
 		.data = (ulong)&rk3288_pin_ctrl },
+	{ .compatible = "rockchip,rk3308-pinctrl",
+		.data = (ulong)&rk3308_pin_ctrl },
 	{ .compatible = "rockchip,rk3328-pinctrl",
 		.data = (ulong)&rk3328_pin_ctrl },
 	{ .compatible = "rockchip,rk3368-pinctrl",

commit e7f9facb5d212e692e8b21d0192921c715058033
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 13 19:57:46 2018 +0800

    power: charge animation: support auto wakeup and auto off screen
    
    Change-Id: I93f97c46e5f08c3ebe4b577355f5e23a9e3659ed
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 1db7cdbf42..82d8e3b73a 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -4,6 +4,7 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 
+#include <asm/io.h>
 #include <common.h>
 #include <boot_rkimg.h>
 #include <console.h>
@@ -22,6 +23,7 @@
 #include <power/pmic.h>
 #include <power/rk8xx_pmic.h>
 #include <power/regulator.h>
+#include <rk_timer_irq.h>
 #include <video_rockchip.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -39,6 +41,9 @@ struct charge_animation_priv {
 	struct udevice *fg;
 	const struct charge_image *image;
 	int image_num;
+
+	int auto_wakeup_key_state;
+	ulong auto_screen_off_timeout;
 };
 
 /*
@@ -80,6 +85,14 @@ static int charge_animation_ofdata_to_platdata(struct udevice *dev)
 	pdata->system_suspend =
 		dev_read_u32_default(dev, "rockchip,system-suspend", 0);
 
+	pdata->auto_wakeup_interval =
+		dev_read_u32_default(dev, "rockchip,auto-wakeup-interval", 0);
+	pdata->auto_wakeup_screen_invert =
+		dev_read_u32_default(dev, "rockchip,auto-wakeup-screen-invert", 0);
+
+	pdata->auto_off_screen_interval =
+		dev_read_u32_default(dev, "rockchip,auto-off-screen-interval", 15);
+
 	if (pdata->screen_on_voltage > pdata->exit_charge_voltage)
 		pdata->screen_on_voltage = pdata->exit_charge_voltage;
 
@@ -92,14 +105,33 @@ static int charge_animation_ofdata_to_platdata(struct udevice *dev)
 	return 0;
 }
 
-static int check_key_press(void)
+static int check_key_press(struct udevice *dev)
 {
+	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
+	struct charge_animation_priv *priv = dev_get_priv(dev);
 	u32 state;
 
 	state = platform_key_read(KEY_POWER);
 	if (state < 0)
 		printf("read power key failed: %d\n", state);
 
+	/* Fixup key state for following cases */
+	if (pdata->auto_wakeup_interval) {
+		if  (pdata->auto_wakeup_screen_invert) {
+			if (priv->auto_wakeup_key_state == KEY_PRESS_DOWN) {
+				/* Value is updated in timer interrupt */
+				priv->auto_wakeup_key_state = KEY_PRESS_NONE;
+				state = KEY_PRESS_DOWN;
+			}
+		}
+	} else if (pdata->auto_off_screen_interval) {
+		if (get_timer(priv->auto_screen_off_timeout) >
+		    pdata->auto_off_screen_interval * 1000) {	/* 1000ms */
+			state = KEY_PRESS_DOWN;
+			printf("Auto screen off\n");
+		}
+	}
+
 	return state;
 }
 
@@ -217,6 +249,42 @@ static int charge_extrem_low_power(struct udevice *dev)
 	return 0;
 }
 
+static void timer_irq_handler(int irq, void *data)
+{
+	struct udevice *dev = data;
+	struct charge_animation_priv *priv = dev_get_priv(dev);
+	static long long count;
+
+	writel(TIMER_CLR_INT, TIMER_BASE + TIMER_INTSTATUS);
+
+	priv->auto_wakeup_key_state = KEY_PRESS_DOWN;
+	printf("auto wakeup count: %lld\n", ++count);
+}
+
+static void autowakeup_timer_init(struct udevice *dev)
+{
+	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
+	uint64_t period = 24000000ULL * (pdata->auto_wakeup_interval);
+
+	/* Disable before conifg */
+	writel(0, TIMER_BASE + TIMER_CTRL);
+
+	/* Config */
+	writel((uint32_t)period, TIMER_BASE + TIMER_LOAD_COUNT0);
+	writel((uint32_t)(period >> 32), TIMER_BASE + TIMER_LOAD_COUNT1);
+	writel(TIMER_CLR_INT, TIMER_BASE + TIMER_INTSTATUS);
+	writel(TIMER_EN | TIMER_INT_EN, TIMER_BASE + TIMER_CTRL);
+
+	/* IRQ */
+	irq_install_handler(TIMER_IRQ, timer_irq_handler, dev);
+	irq_handler_enable(TIMER_IRQ);
+}
+
+static void autowakeup_timer_uninit(void)
+{
+	irq_free_handler(TIMER_IRQ);
+}
+
 static int charge_animation_show(struct udevice *dev)
 {
 	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
@@ -297,9 +365,16 @@ static int charge_animation_show(struct udevice *dev)
 		charge_show_bmp(NULL);
 	}
 
+	/* Auto wakeup */
+	if (pdata->auto_wakeup_interval) {
+		printf("Auto wakeup: %dS\n", pdata->auto_wakeup_interval);
+		autowakeup_timer_init(dev);
+	}
+
 	printf("Enter U-Boot charging mode\n");
 
 	charge_start = get_timer(0);
+
 	/* Charging ! */
 	while (1) {
 		debug("step1 (%d)... \n", screen_on);
@@ -409,7 +484,13 @@ static int charge_animation_show(struct udevice *dev)
 		if (screen_on) {
 			debug("SHOW: %s\n", image[show_idx].name);
 			charge_show_bmp(image[show_idx].name);
+
+			/* Re calculate timeout to off screen */
+			if (priv->auto_screen_off_timeout == 0)
+				priv->auto_screen_off_timeout = get_timer(0);
 		} else {
+			priv->auto_screen_off_timeout = 0;
+
 			system_suspend_enter(pdata);
 		}
 
@@ -432,7 +513,7 @@ static int charge_animation_show(struct udevice *dev)
 		 * Short key event: turn on/off screen;
 		 * Long key event: show logo and boot system or still charging.
 		 */
-		key_state = check_key_press();
+		key_state = check_key_press(dev);
 		if (key_state == KEY_PRESS_DOWN) {
 			/* NULL means show nothing, ie. turn off screen */
 			if (screen_on)
@@ -499,6 +580,9 @@ static int charge_animation_show(struct udevice *dev)
 		}
 	}
 
+	if (pdata->auto_wakeup_interval)
+		autowakeup_timer_uninit();
+
 	ms = get_timer(charge_start);
 	if (ms >= 1000) {
 		sec = ms / 1000;
diff --git a/include/power/charge_animation.h b/include/power/charge_animation.h
index 7cbc6d9952..a0a3c1565c 100644
--- a/include/power/charge_animation.h
+++ b/include/power/charge_animation.h
@@ -17,6 +17,9 @@ struct charge_animation_pdata {
 	int screen_on_voltage;
 
 	int system_suspend;
+	int auto_wakeup_interval;
+	int auto_wakeup_screen_invert;
+	int auto_off_screen_interval;
 };
 
 #endif

commit 616056c90cea162e75ad8037a745d3455010a01f
Author: shengfei Xu <xsf@rock-chips.com>
Date:   Tue Mar 13 15:50:49 2018 +0800

    power: charge_animation: skip charge if charger offline
    
    Change-Id: I66bd36fc4d3cd4a2f79cd5eb425f857fc8a577cb
    Signed-off-by: shengfei Xu <xsf@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 935d3941de..1db7cdbf42 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -269,6 +269,11 @@ static int charge_animation_show(struct udevice *dev)
 	}
 #endif
 
+	/* Not charger online, exit */
+	charging = fuel_gauge_get_chrg_online(fg);
+	if (charging <= 0)
+		return 0;
+
 	/* Enter android charge, set property for kernel */
 	if (pdata->android_charge) {
 		env_update("bootargs", "androidboot.mode=charger");
@@ -279,11 +284,6 @@ static int charge_animation_show(struct udevice *dev)
 	if (!pdata->uboot_charge)
 		return 0;
 
-	/* Not charger online, exit */
-	charging = fuel_gauge_get_chrg_online(fg);
-	if (charging <= 0)
-		return 0;
-
 	voltage = fuel_gauge_get_voltage(fg);
 	if (voltage < 0) {
 		printf("get voltage failed: %d\n", voltage);

commit dc8812a0ee9c619aa7d6460758c622f541f8e7f4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 14 20:04:32 2018 +0800

    test: rockchip: timer: move out timer irq definition
    
    Change-Id: Ia6322291a6ddb05f7971a0a51e161c046f9e91d2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/rk_timer_irq.h b/include/rk_timer_irq.h
new file mode 100644
index 0000000000..315761efff
--- /dev/null
+++ b/include/rk_timer_irq.h
@@ -0,0 +1,51 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _RK_TIMER_IRQ_H
+#define _RK_TIMER_IRQ_H
+
+#include <irq-platform.h>
+
+#define TIMER_LOAD_COUNT0	0x00
+#define TIMER_LOAD_COUNT1	0x04
+#define TIMER_CTRL		0x10
+#define TIMER_INTSTATUS		0x18
+
+#define TIMER_EN		BIT(0)
+#define TIMER_INT_EN		BIT(2)
+#define TIMER_CLR_INT		BIT(0)
+
+#if defined(CONFIG_ROCKCHIP_RK3128)
+#define TIMER_BASE		(0x20044000 + 0x20)	/* TIMER 1 */
+#define TIMER_IRQ		IRQ_TIMER1
+#elif defined(CONFIG_ROCKCHIP_RK322X)
+#define TIMER_BASE		(0x110C0000 + 0x20)	/* TIMER 1 */
+#define TIMER_IRQ		IRQ_TIMER1
+#elif defined(CONFIG_ROCKCHIP_RK3288)
+#define TIMER_BASE		(0xFF6B0000 + 0x20)	/* TIMER 1 */
+#define TIMER_IRQ		IRQ_TIMER1
+#elif defined(CONFIG_ROCKCHIP_RK3328)
+#define TIMER_BASE		(0xFF1C0000 + 0x20)	/* TIMER 1 */
+#define TIMER_IRQ		IRQ_TIMER1
+#elif defined(CONFIG_ROCKCHIP_RK3368)
+#define TIMER_BASE		(0xFF810000 + 0x20)	/* TIMER 1 */
+#define TIMER_IRQ		IRQ_TIMER1
+#elif defined(CONFIG_ROCKCHIP_RK3399)
+#define TIMER_BASE		(0xFF850000 + 0x20)	/* TIMER 1 */
+#define TIMER_IRQ		IRQ_TIMER1
+#elif defined(CONFIG_ROCKCHIP_PX30)
+/*
+ * Use timer0 and never change, because timer0 will be used in charge animation
+ * driver to support auto wakeup when system suspend. If core poweroff, PMU only
+ * support timer0(not all timer) as wakeup source.
+ */
+#define TIMER_BASE		(0xFF210000 + 0x00)	/* TIMER 0 */
+#define TIMER_IRQ		IRQ_TIMER0
+#else
+"Missing definitions of timer module test"
+#endif
+
+#endif
diff --git a/test/rockchip/test-timer.c b/test/rockchip/test-timer.c
index 103aee1167..66b20393a3 100644
--- a/test/rockchip/test-timer.c
+++ b/test/rockchip/test-timer.c
@@ -7,46 +7,9 @@
 #include <asm/io.h>
 #include <common.h>
 #include <irq-generic.h>
-#include <irq-platform.h>
+#include <rk_timer_irq.h>
 #include "test-rockchip.h"
 
-#define TIMER_LOAD_COUNT0	0x00
-#define TIMER_LOAD_COUNT1	0x04
-#define TIMER_CTRL		0x10
-#define TIMER_INTSTATUS		0x18
-
-#define SYS_COUNTER_FREQ0	24000000
-#define SYS_COUNTER_FREQ1	0
-
-#define TIMER_EN		BIT(0)
-#define TIMER_INT_EN		BIT(2)
-#define TIMER_CLR_INT		BIT(0)
-
-#if defined(CONFIG_ROCKCHIP_RK3128)
-#define TIMER_BASE		(0x20044000 + 0x20)	/* TIMER 1 */
-#define TIMER_IRQ		IRQ_TIMER1
-#elif defined(CONFIG_ROCKCHIP_RK322X)
-#define TIMER_BASE		(0x110C0000 + 0x20)	/* TIMER 1 */
-#define TIMER_IRQ		IRQ_TIMER1
-#elif defined(CONFIG_ROCKCHIP_RK3288)
-#define TIMER_BASE		(0xFF6B0000 + 0x20)	/* TIMER 1 */
-#define TIMER_IRQ		IRQ_TIMER1
-#elif defined(CONFIG_ROCKCHIP_RK3328)
-#define TIMER_BASE		(0xFF1C0000 + 0x20)	/* TIMER 1 */
-#define TIMER_IRQ		IRQ_TIMER1
-#elif defined(CONFIG_ROCKCHIP_RK3368)
-#define TIMER_BASE		(0xFF810000 + 0x20)	/* TIMER 1 */
-#define TIMER_IRQ		IRQ_TIMER1
-#elif defined(CONFIG_ROCKCHIP_RK3399)
-#define TIMER_BASE		(0xFF850000 + 0x20)	/* TIMER 1 */
-#define TIMER_IRQ		IRQ_TIMER1
-#elif defined(CONFIG_ROCKCHIP_PX30)
-#define TIMER_BASE		(0xFF210000 + 0x20)	/* TIMER 1 */
-#define TIMER_IRQ		IRQ_TIMER1
-#else
-"Missing definitions of timer module test"
-#endif
-
 /*************************** timer irq test ***********************************/
 static ulong seconds;
 
@@ -78,8 +41,8 @@ static int soc_timer_irq_test_init(void)
 	writel(0, TIMER_BASE + TIMER_CTRL);
 
 	/* Config */
-	writel(SYS_COUNTER_FREQ0, TIMER_BASE + TIMER_LOAD_COUNT0);
-	writel(SYS_COUNTER_FREQ1, TIMER_BASE + TIMER_LOAD_COUNT1);
+	writel(COUNTER_FREQUENCY, TIMER_BASE + TIMER_LOAD_COUNT0);
+	writel(0, TIMER_BASE + TIMER_LOAD_COUNT1);
 	writel(TIMER_CLR_INT, TIMER_BASE + TIMER_INTSTATUS);
 	writel(TIMER_EN | TIMER_INT_EN, TIMER_BASE + TIMER_CTRL);
 

commit 2dea0a8ed9ba115fae0ba945dc450db5d2086c7a
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Mar 16 11:56:43 2018 +0800

    rockchip: evb-px30: disable NET support
    
    Change-Id: Iba155fdd9da72df18d441f51b8b59ef888fdbeba
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index ec45935c8f..8751c592e9 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -33,6 +33,7 @@ CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
+# CONFIG_CMD_NET is not set
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y
 CONFIG_RK8XX_PWRKEY=y

commit 33ffdd247341f1d0a6035b7daf78acc32362cfa8
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Mar 1 11:23:30 2018 +0800

    debug: convert to use pr_debug for pte init and find dev
    
    These two op have too much print, convert to pr_debug and not print
    by default.
    
    Change-Id: I5b3c738db783419717441e24ee0b04ab6f02d61e
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c
index 6548f3c912..e371ce33fb 100644
--- a/arch/arm/cpu/armv8/cache_v8.c
+++ b/arch/arm/cpu/armv8/cache_v8.c
@@ -109,7 +109,7 @@ static u64 *find_pte(u64 addr, int level)
 	u64 va_bits;
 	int i;
 
-	debug("addr=%llx level=%d\n", addr, level);
+	pr_debug("addr=%llx level=%d\n", addr, level);
 
 	get_tcr(0, NULL, &va_bits);
 	if (va_bits < 39)
@@ -123,7 +123,7 @@ static u64 *find_pte(u64 addr, int level)
 	for (i = start_level; i < 4; i++) {
 		idx = (addr >> level2shift(i)) & 0x1FF;
 		pte += idx;
-		debug("idx=%llx PTE %p at level %d: %llx\n", idx, pte, i, *pte);
+		pr_debug("idx=%llx PTE %p at level %d: %llx\n", idx, pte, i, *pte);
 
 		/* Found it */
 		if (i == level)
@@ -163,7 +163,7 @@ static u64 *create_table(void)
 static void set_pte_table(u64 *pte, u64 *table)
 {
 	/* Point *pte to the new table */
-	debug("Setting %p to addr=%p\n", pte, table);
+	pr_debug("Setting %p to addr=%p\n", pte, table);
 	*pte = PTE_TYPE_TABLE | (ulong)table;
 }
 
@@ -182,7 +182,7 @@ static void split_block(u64 *pte, int level)
 		      "mem_map.", pte, old_pte);
 
 	new_table = create_table();
-	debug("Splitting pte %p (%llx) into %p\n", pte, old_pte, new_table);
+	pr_debug("Splitting pte %p (%llx) into %p\n", pte, old_pte, new_table);
 
 	for (i = 0; i < MAX_PTE_ENTRIES; i++) {
 		new_table[i] = old_pte | (i << levelshift);
@@ -191,7 +191,7 @@ static void split_block(u64 *pte, int level)
 		if ((level + 1) == 3)
 			new_table[i] |= PTE_TYPE_TABLE;
 
-		debug("Setting new_table[%lld] = %llx\n", i, new_table[i]);
+		pr_debug("Setting new_table[%lld] = %llx\n", i, new_table[i]);
 	}
 
 	/* Set the new table into effect */
@@ -213,7 +213,7 @@ static void add_map(struct mm_region *map)
 	while (size) {
 		pte = find_pte(virt, 0);
 		if (pte && (pte_type(pte) == PTE_TYPE_FAULT)) {
-			debug("Creating table for virt 0x%llx\n", virt);
+			pr_debug("Creating table for virt 0x%llx\n", virt);
 			new_table = create_table();
 			set_pte_table(pte, new_table);
 		}
@@ -224,11 +224,11 @@ static void add_map(struct mm_region *map)
 				panic("pte not found\n");
 
 			blocksize = 1ULL << level2shift(level);
-			debug("Checking if pte fits for virt=%llx size=%llx blocksize=%llx\n",
+			pr_debug("Checking if pte fits for virt=%llx size=%llx blocksize=%llx\n",
 			      virt, size, blocksize);
 			if (size >= blocksize && !(virt & (blocksize - 1))) {
 				/* Page fits, create block PTE */
-				debug("Setting PTE %p to block virt=%llx\n",
+				pr_debug("Setting PTE %p to block virt=%llx\n",
 				      pte, virt);
 				if (level == 3)
 					*pte = phys | attrs | PTE_TYPE_PAGE;
@@ -240,12 +240,12 @@ static void add_map(struct mm_region *map)
 				break;
 			} else if (pte_type(pte) == PTE_TYPE_FAULT) {
 				/* Page doesn't fit, create subpages */
-				debug("Creating subtable for virt 0x%llx blksize=%llx\n",
+				pr_debug("Creating subtable for virt 0x%llx blksize=%llx\n",
 				      virt, blocksize);
 				new_table = create_table();
 				set_pte_table(pte, new_table);
 			} else if (pte_type(pte) == PTE_TYPE_BLOCK) {
-				debug("Split block into subtable for virt 0x%llx blksize=0x%llx\n",
+				pr_debug("Split block into subtable for virt 0x%llx blksize=0x%llx\n",
 				      virt, blocksize);
 				split_block(pte, level);
 			}
@@ -439,9 +439,9 @@ inline void flush_dcache_all(void)
 	__asm_flush_dcache_all();
 	ret = __asm_flush_l3_dcache();
 	if (ret)
-		debug("flushing dcache returns 0x%x\n", ret);
+		pr_debug("flushing dcache returns 0x%x\n", ret);
 	else
-		debug("flushing dcache successfully.\n");
+		pr_debug("flushing dcache successfully.\n");
 }
 
 /*
@@ -520,13 +520,13 @@ static u64 set_one_region(u64 start, u64 size, u64 attrs, bool flag, int level)
 			*pte &= ~PMD_ATTRINDX_MASK;
 			*pte |= attrs & PMD_ATTRINDX_MASK;
 		}
-		debug("Set attrs=%llx pte=%p level=%d\n", attrs, pte, level);
+		pr_debug("Set attrs=%llx pte=%p level=%d\n", attrs, pte, level);
 
 		return levelsize;
 	}
 
 	/* Unaligned or doesn't fit, maybe split block into table */
-	debug("addr=%llx level=%d pte=%p (%llx)\n", start, level, pte, *pte);
+	pr_debug("addr=%llx level=%d pte=%p (%llx)\n", start, level, pte, *pte);
 
 	/* Maybe we need to split the block into a table */
 	if (pte_type(pte) == PTE_TYPE_BLOCK)
@@ -548,7 +548,7 @@ void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size,
 	u64 real_start = start;
 	u64 real_size = size;
 
-	debug("start=%lx size=%lx\n", (ulong)start, (ulong)size);
+	pr_debug("start=%lx size=%lx\n", (ulong)start, (ulong)size);
 
 	if (!gd->arch.tlb_emerg)
 		panic("Emergency page table not setup.");
diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c
index 480d202563..eaf1011ded 100644
--- a/drivers/core/uclass.c
+++ b/drivers/core/uclass.c
@@ -260,7 +260,7 @@ int uclass_find_device_by_seq(enum uclass_id id, int seq_or_req_seq,
 	int ret;
 
 	*devp = NULL;
-	debug("%s: %d %d\n", __func__, find_req_seq, seq_or_req_seq);
+	pr_debug("%s: %d %d\n", __func__, find_req_seq, seq_or_req_seq);
 	if (seq_or_req_seq == -1)
 		return -ENODEV;
 	ret = uclass_get(id, &uc);
@@ -268,15 +268,15 @@ int uclass_find_device_by_seq(enum uclass_id id, int seq_or_req_seq,
 		return ret;
 
 	list_for_each_entry(dev, &uc->dev_head, uclass_node) {
-		debug("   - %d %d '%s'\n", dev->req_seq, dev->seq, dev->name);
+		pr_debug("   - %d %d '%s'\n", dev->req_seq, dev->seq, dev->name);
 		if ((find_req_seq ? dev->req_seq : dev->seq) ==
 				seq_or_req_seq) {
 			*devp = dev;
-			debug("   - found\n");
+			pr_debug("   - found\n");
 			return 0;
 		}
 	}
-	debug("   - not found\n");
+	pr_debug("   - not found\n");
 
 	return -ENODEV;
 }

commit f111af68568aee9b98e65c2b1b6d0d47904afb65
Author: Zhaoyifeng <zyf@rock-chips.com>
Date:   Tue Mar 13 16:17:22 2018 +0800

    drivers: rknand: update ftl for rk3226 and px30
    
    1. Optimize the garbage processing.
    2. Fix the firmware upgrade failure issue.
    
    Change-Id: I20db620bcb2dbfa746eed71b2464140c67bfc227
    Signed-off-by: Zhaoyifeng <zyf@rock-chips.com>

diff --git a/drivers/rknand/rk_zftl_arm_v8.S b/drivers/rknand/rk_zftl_arm_v8.S
index 856443654f..9351a7ddca 100644
--- a/drivers/rknand/rk_zftl_arm_v8.S
+++ b/drivers/rknand/rk_zftl_arm_v8.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2018-02-11
+ * date: 2018-03-15
  */
 	.arch armv8-a
 	.file	"rk_zftl_arm_v8.S"
@@ -30,6 +30,437 @@ flash_mem_cmp8:
 	add	w0, w4, 1
 	ret
 	.size	flash_mem_cmp8, .-flash_mem_cmp8
+	.section	.text._list_remove_node,"ax",@progbits
+	.align	2
+	.type	_list_remove_node, %function
+_list_remove_node:
+	adrp	x3, .LANCHOR0
+	and	w1, w1, 65535
+	mov	w5, 65535
+	ldr	x7, [x0]
+	ldr	x4, [x3, #:lo12:.LANCHOR0]
+	mov	w3, 6
+	umull	x1, w1, w3
+	add	x6, x4, x1
+	ldrh	w3, [x4, x1]
+	cmp	w3, w5
+	ldrh	w5, [x6, 2]
+	bne	.L7
+	cmp	w5, w3
+	bne	.L7
+	cmp	x6, x7
+	bne	.L6
+.L7:
+	mov	w8, 65535
+	cmp	w5, w8
+	bne	.L9
+	cmp	x6, x7
+	beq	.L9
+	stp	x29, x30, [sp, -16]!
+	adrp	x1, .LANCHOR1
+	adrp	x0, .LC0
+	mov	w2, 182
+	add	x29, sp, 0
+	add	x1, x1, :lo12:.LANCHOR1
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L10:
+	b	.L10
+.L9:
+	cmp	x6, x7
+	mov	w7, 65535
+	bne	.L11
+	cmp	w3, w7
+	bne	.L12
+	str	xzr, [x0]
+.L13:
+	mov	w0, -1
+	strh	w0, [x4, x1]
+	strh	w0, [x6, 2]
+	ldrh	w0, [x2]
+	sub	w0, w0, #1
+	strh	w0, [x2]
+.L6:
+	ret
+.L12:
+	mov	w5, 6
+	umaddl	x3, w3, w5, x4
+	str	x3, [x0]
+	mov	w0, -1
+	strh	w0, [x3, 2]
+	b	.L13
+.L11:
+	cmp	w3, w7
+	bne	.L14
+	cmp	w5, w3
+	beq	.L13
+	mov	w0, 6
+	umull	x5, w5, w0
+	mov	w0, -1
+	strh	w0, [x4, x5]
+	b	.L13
+.L14:
+	mov	w7, 6
+	umaddl	x0, w3, w7, x4
+	strh	w5, [x0, 2]
+	ldrh	w0, [x6, 2]
+	umull	x0, w0, w7
+	strh	w3, [x4, x0]
+	b	.L13
+	.size	_list_remove_node, .-_list_remove_node
+	.section	.text._list_pop_index_node,"ax",@progbits
+	.align	2
+	.type	_list_pop_index_node, %function
+_list_pop_index_node:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	ldr	x20, [x0]
+	cbz	x20, .L24
+	adrp	x3, .LANCHOR0
+	and	w1, w1, 65535
+	mov	w4, 65535
+	mov	w5, 6
+	ldr	x19, [x3, #:lo12:.LANCHOR0]
+.L20:
+	cbnz	w1, .L21
+.L23:
+	sub	x19, x20, x19
+	mov	x1, -6148914691236517206
+	asr	x19, x19, 1
+	movk	x1, 0xaaab, lsl 0
+	mul	x19, x19, x1
+	and	w19, w19, 65535
+	mov	w1, w19
+	bl	_list_remove_node
+	mov	w0, -1
+	strh	w0, [x20]
+	strh	w0, [x20, 2]
+	mov	w0, w19
+.L18:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L21:
+	ldrh	w3, [x20]
+	cmp	w3, w4
+	beq	.L23
+	sub	w1, w1, #1
+	umaddl	x20, w3, w5, x19
+	and	w1, w1, 65535
+	b	.L20
+.L24:
+	mov	w0, 65535
+	b	.L18
+	.size	_list_pop_index_node, .-_list_pop_index_node
+	.section	.text._insert_free_list,"ax",@progbits
+	.align	2
+	.type	_insert_free_list, %function
+_insert_free_list:
+	adrp	x3, .LANCHOR2
+	and	w1, w1, 65535
+	ldrh	w3, [x3, #:lo12:.LANCHOR2]
+	cmp	w3, w1
+	bls	.L26
+	ldrh	w3, [x2]
+	mov	w5, 6
+	ldr	x8, [x0]
+	add	w3, w3, 1
+	strh	w3, [x2]
+	adrp	x2, .LANCHOR0
+	umull	x12, w1, w5
+	ldr	x6, [x2, #:lo12:.LANCHOR0]
+	mov	w2, -1
+	add	x7, x6, x12
+	strh	w2, [x7, 2]
+	strh	w2, [x6, x12]
+	cbnz	x8, .L28
+.L33:
+	str	x7, [x0]
+	ret
+.L28:
+	adrp	x2, .LANCHOR3
+	mov	x3, -6148914691236517206
+	movk	x3, 0xaaab, lsl 0
+	mov	w10, w5
+	ldr	x11, [x2, #:lo12:.LANCHOR3]
+	ubfiz	x2, x1, 2, 16
+	mov	w14, 65535
+	ldr	w4, [x11, x2]
+	ldrh	w2, [x11, x2]
+	ubfx	x4, x4, 11, 8
+	and	w2, w2, 2047
+	add	w4, w2, w4, lsl 3
+	sub	x2, x8, x6
+	asr	x2, x2, 1
+	and	w4, w4, 4095
+	mul	x2, x2, x3
+	mov	x3, x8
+	and	w2, w2, 65535
+.L31:
+	ubfiz	x13, x2, 2, 16
+	ldr	w5, [x11, x13]
+	ldrh	w13, [x11, x13]
+	ubfx	x5, x5, 11, 8
+	and	w13, w13, 2047
+	add	w5, w13, w5, lsl 3
+	and	w5, w5, 4095
+	cmp	w4, w5
+	bls	.L29
+	ldrh	w5, [x3]
+	cmp	w5, w14
+	bne	.L30
+	strh	w2, [x7, 2]
+	strh	w1, [x3]
+	ret
+.L30:
+	umaddl	x3, w5, w10, x6
+	mov	w2, w5
+	b	.L31
+.L29:
+	ldrh	w4, [x3, 2]
+	cmp	x8, x3
+	strh	w4, [x7, 2]
+	strh	w2, [x6, x12]
+	bne	.L32
+	strh	w1, [x8, 2]
+	b	.L33
+.L32:
+	ldrh	w0, [x3, 2]
+	mov	w2, 6
+	umull	x0, w0, w2
+	strh	w1, [x6, x0]
+	strh	w1, [x3, 2]
+.L26:
+	ret
+	.size	_insert_free_list, .-_insert_free_list
+	.section	.text._insert_data_list,"ax",@progbits
+	.align	2
+	.type	_insert_data_list, %function
+_insert_data_list:
+	adrp	x4, .LANCHOR2
+	and	w1, w1, 65535
+	ldrh	w3, [x4, #:lo12:.LANCHOR2]
+	cmp	w3, w1
+	bls	.L50
+	ldrh	w3, [x2]
+	mov	w11, 6
+	ldr	x8, [x0]
+	add	w3, w3, 1
+	strh	w3, [x2]
+	adrp	x2, .LANCHOR0
+	umull	x13, w1, w11
+	ldr	x6, [x2, #:lo12:.LANCHOR0]
+	mov	w2, -1
+	add	x7, x6, x13
+	strh	w2, [x7, 2]
+	strh	w2, [x6, x13]
+	cbnz	x8, .L37
+	str	x7, [x0]
+	ret
+.L37:
+	stp	x29, x30, [sp, -32]!
+	adrp	x2, .LANCHOR4
+	mov	x3, -6148914691236517206
+	mov	w12, -1
+	add	x29, sp, 0
+	ldr	x15, [x2, #:lo12:.LANCHOR4]
+	ubfiz	x2, x1, 1, 16
+	movk	x3, 0xaaab, lsl 0
+	ldrh	w30, [x4, #:lo12:.LANCHOR2]
+	mov	x5, x8
+	stp	x19, x20, [sp, 16]
+	mov	w10, 0
+	mov	w19, 65535
+	ldrh	w16, [x15, x2]
+	ldrh	w2, [x7, 4]
+	cmp	w2, 0
+	mul	w14, w16, w2
+	sub	x2, x8, x6
+	asr	x2, x2, 1
+	csel	w14, w14, w12, ne
+	mul	x2, x2, x3
+	adrp	x3, .LANCHOR3
+	ldr	x17, [x3, #:lo12:.LANCHOR3]
+	and	w2, w2, 65535
+.L45:
+	add	w10, w10, 1
+	and	w10, w10, 65535
+	cmp	w10, w30
+	bhi	.L34
+	cmp	w1, w2
+	beq	.L34
+	uxtw	x4, w2
+	ldrh	w20, [x5, 4]
+	cmp	w20, 0
+	ldrh	w3, [x15, x4, lsl 1]
+	mul	w3, w3, w20
+	csel	w3, w3, w12, ne
+	cmp	w14, w3
+	bne	.L41
+	lsl	x4, x4, 2
+	ldr	w3, [x17, x4]
+	ldrh	w4, [x17, x4]
+	ubfx	x3, x3, 11, 8
+	and	w4, w4, 2047
+	add	w3, w4, w3, lsl 3
+	and	w3, w3, 4095
+	cmp	w16, w3
+	bhi	.L43
+.L42:
+	ldrh	w3, [x5, 2]
+	cmp	x8, x5
+	strh	w3, [x7, 2]
+	strh	w2, [x6, x13]
+	bne	.L46
+	strh	w1, [x8, 2]
+	str	x7, [x0]
+	b	.L34
+.L41:
+	bcc	.L42
+.L43:
+	ldrh	w3, [x5]
+	cmp	w3, w19
+	bne	.L44
+	strh	w2, [x7, 2]
+	strh	w1, [x5]
+.L34:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L44:
+	umaddl	x5, w3, w11, x6
+	mov	w2, w3
+	b	.L45
+.L46:
+	ldrh	w0, [x5, 2]
+	mov	w2, 6
+	umull	x0, w0, w2
+	strh	w1, [x6, x0]
+	strh	w1, [x5, 2]
+	b	.L34
+.L50:
+	ret
+	.size	_insert_data_list, .-_insert_data_list
+	.section	.text._list_get_gc_head_node.isra.2,"ax",@progbits
+	.align	2
+	.type	_list_get_gc_head_node.isra.2, %function
+_list_get_gc_head_node.isra.2:
+	and	w1, w1, 65535
+	cbz	x0, .L57
+	adrp	x2, .LANCHOR0
+	mov	w3, 65535
+	mov	w4, 6
+	ldr	x2, [x2, #:lo12:.LANCHOR0]
+.L54:
+	cbz	w1, .L55
+	ldrh	w0, [x0]
+	cmp	w0, w3
+	bne	.L56
+	ret
+.L56:
+	sub	w1, w1, #1
+	umaddl	x0, w0, w4, x2
+	and	w1, w1, 65535
+	b	.L54
+.L57:
+	mov	w0, 65535
+	ret
+.L55:
+	sub	x0, x0, x2
+	mov	x1, -6148914691236517206
+	asr	x0, x0, 1
+	movk	x1, 0xaaab, lsl 0
+	mul	x0, x0, x1
+	and	w0, w0, 65535
+	ret
+	.size	_list_get_gc_head_node.isra.2, .-_list_get_gc_head_node.isra.2
+	.section	.text._list_update_data_list,"ax",@progbits
+	.align	2
+	.type	_list_update_data_list, %function
+_list_update_data_list:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w19, w1, 65535
+	adrp	x1, .LANCHOR5
+	ldr	x1, [x1, #:lo12:.LANCHOR5]
+	ldrh	w3, [x1, 16]
+	str	x21, [sp, 32]
+	cmp	w3, w19
+	beq	.L59
+	ldrh	w3, [x1, 48]
+	cmp	w3, w19
+	beq	.L59
+	ldrh	w1, [x1, 80]
+	cmp	w1, w19
+	beq	.L59
+	adrp	x1, .LANCHOR0
+	mov	w3, 6
+	ldr	x4, [x1, #:lo12:.LANCHOR0]
+	umull	x3, w19, w3
+	ldr	x1, [x0]
+	add	x5, x4, x3
+	cmp	x5, x1
+	beq	.L59
+	ldrh	w1, [x5, 2]
+	mov	x20, x0
+	mov	x21, x2
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L61
+	ldrh	w0, [x4, x3]
+	cmp	w0, w1
+	bne	.L61
+	adrp	x1, .LANCHOR6
+	adrp	x0, .LC0
+	mov	w2, 249
+	add	x1, x1, :lo12:.LANCHOR6
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L62:
+	b	.L62
+.L61:
+	adrp	x0, .LANCHOR4
+	ubfiz	x2, x19, 1, 16
+	ldrh	w5, [x5, 4]
+	mov	w6, -1
+	ldr	x0, [x0, #:lo12:.LANCHOR4]
+	cmp	w5, 0
+	ldrh	w3, [x0, x2]
+	mov	w2, 6
+	umull	x1, w1, w2
+	mov	x2, -6148914691236517206
+	movk	x2, 0xaaab, lsl 0
+	mul	w3, w3, w5
+	asr	x5, x1, 1
+	add	x1, x4, x1
+	csel	w3, w3, w6, ne
+	mul	x5, x5, x2
+	ldrh	w1, [x1, 4]
+	cmp	w1, 0
+	ldrh	w0, [x0, x5, lsl 1]
+	mul	w0, w0, w1
+	csel	w0, w0, w6, ne
+	cmp	w3, w0
+	bcs	.L59
+	mov	x2, x21
+	mov	w1, w19
+	mov	x0, x20
+	bl	_list_remove_node
+	mov	x2, x21
+	mov	w1, w19
+	mov	x0, x20
+	ldr	x21, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	b	_insert_data_list
+.L59:
+	ldp	x19, x20, [sp, 16]
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
+	.size	_list_update_data_list, .-_list_update_data_list
 	.section	.text.nand_flash_print_info,"ax",@progbits
 	.align	2
 	.global	nand_flash_print_info
@@ -37,13 +468,6 @@ flash_mem_cmp8:
 nand_flash_print_info:
 	ret
 	.size	nand_flash_print_info, .-nand_flash_print_info
-	.section	.text.FlashTimingCfg,"ax",@progbits
-	.align	2
-	.global	FlashTimingCfg
-	.type	FlashTimingCfg, %function
-FlashTimingCfg:
-	ret
-	.size	FlashTimingCfg, .-FlashTimingCfg
 	.section	.text.timer_delay_ns,"ax",@progbits
 	.align	2
 	.global	timer_delay_ns
@@ -52,11 +476,11 @@ timer_delay_ns:
 	sub	sp, sp, #16
 	lsr	w0, w0, 4
 	str	w0, [sp, 12]
-.L9:
+.L70:
 	ldr	w0, [sp, 12]
 	sub	w1, w0, #1
 	str	w1, [sp, 12]
-	cbnz	w0, .L9
+	cbnz	w0, .L70
 	add	sp, sp, 16
 	ret
 	.size	timer_delay_ns, .-timer_delay_ns
@@ -86,54 +510,54 @@ toshiba_set_rr_para:
 	mov	x4, x0
 	add	w2, w11, 1
 	mov	w0, 5
-	adrp	x6, .LANCHOR4
-	add	x6, x6, :lo12:.LANCHOR4
-	adrp	x3, .LANCHOR0
-	add	x3, x3, :lo12:.LANCHOR0
+	adrp	x6, .LANCHOR11
+	add	x6, x6, :lo12:.LANCHOR11
+	adrp	x3, .LANCHOR7
+	add	x3, x3, :lo12:.LANCHOR7
 	umull	x2, w2, w0
-	adrp	x0, .LANCHOR1
-	add	x7, x0, :lo12:.LANCHOR1
+	adrp	x0, .LANCHOR8
+	add	x7, x0, :lo12:.LANCHOR8
 	mov	x5, x0
 	ldrb	w0, [x6]
 	add	x3, x3, x2
 	add	x7, x7, x2
-	adrp	x8, .LANCHOR2
+	adrp	x8, .LANCHOR9
 	mov	x2, 0
-	adrp	x10, .LANCHOR3
-	add	x8, x8, :lo12:.LANCHOR2
-	add	x10, x10, :lo12:.LANCHOR3
+	adrp	x10, .LANCHOR10
+	add	x8, x8, :lo12:.LANCHOR9
+	add	x10, x10, :lo12:.LANCHOR10
 	cmp	w0, w2
-	bhi	.L22
+	bhi	.L83
 	ret
-.L16:
+.L77:
 	cmp	w0, 35
-	bne	.L18
+	bne	.L79
 	ldrsb	w0, [x3, x2]
-	b	.L23
-.L18:
+	b	.L84
+.L79:
 	ldrsb	w0, [x10, w11, sxtw]
-	b	.L23
-.L22:
+	b	.L84
+.L83:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
-.L19:
+.L80:
 	mov	w0, 85
 	str	w0, [x4, 8]
-	add	x0, x5, :lo12:.LANCHOR1
+	add	x0, x5, :lo12:.LANCHOR8
 	ldrsb	w0, [x2, x0]
 	str	w0, [x4, 4]
 	mov	w0, 200
 	bl	timer_delay_ns
 	ldrb	w0, [x8]
 	cmp	w0, 34
-	bne	.L16
+	bne	.L77
 	ldrsb	w0, [x7, x2]
-.L23:
+.L84:
 	str	w0, [x4]
 	add	x2, x2, 1
 	ldrb	w0, [x6]
 	cmp	w0, w2
-	bhi	.L19
+	bhi	.L80
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	toshiba_set_rr_para, .-toshiba_set_rr_para
@@ -141,11 +565,11 @@ toshiba_set_rr_para:
 	.align	2
 	.type	hynix_set_rr_para, %function
 hynix_set_rr_para:
-	adrp	x2, .LANCHOR5
+	adrp	x2, .LANCHOR12
 	and	w1, w1, 255
 	mov	x3, 32
 	and	w0, w0, 255
-	ldr	x2, [x2, #:lo12:.LANCHOR5]
+	ldr	x2, [x2, #:lo12:.LANCHOR12]
 	mov	x4, 0
 	add	x6, x2, 128
 	add	x2, x2, 112
@@ -156,19 +580,19 @@ hynix_set_rr_para:
 	umaddl	x1, w1, w0, x3
 	ubfiz	x0, x0, 8, 8
 	add	x2, x2, x1
-	adrp	x1, .LANCHOR6
-	ldr	x3, [x1, #:lo12:.LANCHOR6]
+	adrp	x1, .LANCHOR13
+	ldr	x3, [x1, #:lo12:.LANCHOR13]
 	add	x3, x3, x0
 	mov	w0, 54
 	str	w0, [x3, 2056]
-	bhi	.L30
+	bhi	.L91
 	mov	w0, 22
 	str	w0, [x3, 2056]
 	ret
-.L30:
+.L91:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
-.L26:
+.L87:
 	ldrb	w0, [x6, x4]
 	str	w0, [x3, 2052]
 	mov	w0, 120
@@ -177,7 +601,7 @@ hynix_set_rr_para:
 	str	w0, [x3, 2048]
 	add	x4, x4, 1
 	cmp	w5, w4, uxtb
-	bhi	.L26
+	bhi	.L87
 	mov	w0, 22
 	str	w0, [x3, 2056]
 	ldp	x29, x30, [sp], 16
@@ -188,29 +612,29 @@ hynix_set_rr_para:
 	.global	hynix_reconfig_rr_para
 	.type	hynix_reconfig_rr_para, %function
 hynix_reconfig_rr_para:
-	adrp	x1, .LANCHOR2
-	ldrb	w1, [x1, #:lo12:.LANCHOR2]
+	adrp	x1, .LANCHOR9
+	ldrb	w1, [x1, #:lo12:.LANCHOR9]
 	sub	w1, w1, #1
 	and	w1, w1, 255
 	cmp	w1, 6
-	bhi	.L37
-	adrp	x8, .LANCHOR5
+	bhi	.L98
+	adrp	x8, .LANCHOR12
 	and	w0, w0, 255
 	sxtw	x7, w0
-	ldr	x1, [x8, #:lo12:.LANCHOR5]
+	ldr	x1, [x8, #:lo12:.LANCHOR12]
 	add	x1, x1, x7
 	ldrb	w1, [x1, 120]
-	cbz	w1, .L37
+	cbz	w1, .L98
 	stp	x29, x30, [sp, -16]!
 	mov	w1, 0
 	add	x29, sp, 0
 	bl	hynix_set_rr_para
-	ldr	x0, [x8, #:lo12:.LANCHOR5]
+	ldr	x0, [x8, #:lo12:.LANCHOR12]
 	add	x0, x0, x7
 	strb	wzr, [x0, 120]
 	ldp	x29, x30, [sp], 16
 	ret
-.L37:
+.L98:
 	ret
 	.size	hynix_reconfig_rr_para, .-hynix_reconfig_rr_para
 	.section	.text.nandc_set_ddr_para,"ax",@progbits
@@ -218,20 +642,20 @@ hynix_reconfig_rr_para:
 	.global	nandc_set_ddr_para
 	.type	nandc_set_ddr_para, %function
 nandc_set_ddr_para:
-	adrp	x1, .LANCHOR7
+	adrp	x1, .LANCHOR14
 	and	w0, w0, 255
-	adrp	x2, .LANCHOR6
-	ldrb	w1, [x1, #:lo12:.LANCHOR7]
-	ldr	x2, [x2, #:lo12:.LANCHOR6]
+	adrp	x2, .LANCHOR13
+	ldrb	w1, [x1, #:lo12:.LANCHOR14]
+	ldr	x2, [x2, #:lo12:.LANCHOR13]
 	cmp	w1, 9
 	lsl	w1, w0, 16
 	lsl	w0, w0, 8
 	orr	w1, w1, w0
 	orr	w1, w1, 3
-	bne	.L41
+	bne	.L102
 	str	w1, [x2, 80]
 	ret
-.L41:
+.L102:
 	str	w1, [x2, 304]
 	ret
 	.size	nandc_set_ddr_para, .-nandc_set_ddr_para
@@ -240,43 +664,43 @@ nandc_set_ddr_para:
 	.global	nandc_get_ddr_para
 	.type	nandc_get_ddr_para, %function
 nandc_get_ddr_para:
-	adrp	x0, .LANCHOR7
-	ldrb	w0, [x0, #:lo12:.LANCHOR7]
+	adrp	x0, .LANCHOR14
+	ldrb	w0, [x0, #:lo12:.LANCHOR14]
 	cmp	w0, 9
-	adrp	x0, .LANCHOR6
-	ldr	x0, [x0, #:lo12:.LANCHOR6]
-	bne	.L44
+	adrp	x0, .LANCHOR13
+	ldr	x0, [x0, #:lo12:.LANCHOR13]
+	bne	.L105
 	ldr	w0, [x0, 80]
-.L46:
+.L107:
 	ubfx	x0, x0, 8, 8
 	ret
-.L44:
+.L105:
 	ldr	w0, [x0, 304]
-	b	.L46
+	b	.L107
 	.size	nandc_get_ddr_para, .-nandc_get_ddr_para
 	.section	.text.nandc_set_if_mode,"ax",@progbits
 	.align	2
 	.global	nandc_set_if_mode
 	.type	nandc_set_if_mode, %function
 nandc_set_if_mode:
-	adrp	x1, .LANCHOR6
+	adrp	x1, .LANCHOR13
 	and	w0, w0, 255
 	tst	w0, 6
-	ldr	x2, [x1, #:lo12:.LANCHOR6]
+	ldr	x2, [x1, #:lo12:.LANCHOR13]
 	ldr	w1, [x2]
-	beq	.L48
+	beq	.L109
 	tst	x0, 4
 	orr	w1, w1, 24576
-	adrp	x0, .LANCHOR7
+	adrp	x0, .LANCHOR14
 	and	w1, w1, -32769
 	orr	w1, w1, 196608
-	ldrb	w0, [x0, #:lo12:.LANCHOR7]
+	ldrb	w0, [x0, #:lo12:.LANCHOR14]
 	orr	w3, w1, 32768
 	csel	w1, w3, w1, ne
 	cmp	w0, 9
 	mov	w0, 4099
 	movk	w0, 0x10, lsl 16
-	bne	.L50
+	bne	.L111
 	mov	w3, 8321
 	str	w3, [x2, 8]
 	str	w0, [x2, 80]
@@ -284,10 +708,10 @@ nandc_set_if_mode:
 	str	w0, [x2, 84]
 	mov	w0, 39
 	str	w0, [x2, 84]
-.L51:
+.L112:
 	str	w1, [x2]
 	ret
-.L50:
+.L111:
 	mov	w3, 8322
 	str	w3, [x2, 344]
 	str	w0, [x2, 304]
@@ -295,20 +719,20 @@ nandc_set_if_mode:
 	str	w0, [x2, 308]
 	mov	w0, 39
 	str	w0, [x2, 308]
-	b	.L51
-.L48:
+	b	.L112
+.L109:
 	and	w1, w1, -8193
-	b	.L51
+	b	.L112
 	.size	nandc_set_if_mode, .-nandc_set_if_mode
 	.section	.text.nandc_cs,"ax",@progbits
 	.align	2
 	.global	nandc_cs
 	.type	nandc_cs, %function
 nandc_cs:
-	adrp	x1, .LANCHOR6
+	adrp	x1, .LANCHOR13
 	mov	w2, 1
 	lsl	w0, w2, w0
-	ldr	x3, [x1, #:lo12:.LANCHOR6]
+	ldr	x3, [x1, #:lo12:.LANCHOR13]
 	ldr	w1, [x3]
 	bfi	w1, w0, 0, 8
 	str	w1, [x3]
@@ -319,8 +743,8 @@ nandc_cs:
 	.global	nandc_de_cs
 	.type	nandc_de_cs, %function
 nandc_de_cs:
-	adrp	x0, .LANCHOR6
-	ldr	x1, [x0, #:lo12:.LANCHOR6]
+	adrp	x0, .LANCHOR13
+	ldr	x1, [x0, #:lo12:.LANCHOR13]
 	ldr	w0, [x1]
 	and	w0, w0, -256
 	and	w0, w0, -131073
@@ -334,27 +758,27 @@ nandc_de_cs:
 flash_wait_device_ready_raw:
 	stp	x29, x30, [sp, -16]!
 	mov	w5, w1
-	adrp	x1, .LANCHOR8
+	adrp	x1, .LANCHOR15
 	and	w0, w0, 255
 	add	x29, sp, 0
-	ldrb	w1, [x1, #:lo12:.LANCHOR8]
+	ldrb	w1, [x1, #:lo12:.LANCHOR15]
 	cmp	w1, w0
-	bhi	.L57
-	adrp	x1, .LANCHOR9
+	bhi	.L118
+	adrp	x1, .LANCHOR16
 	adrp	x0, .LC0
-	mov	w2, 604
-	add	x1, x1, :lo12:.LANCHOR9
+	mov	w2, 620
+	add	x1, x1, :lo12:.LANCHOR16
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L58:
-	b	.L58
-.L57:
-	adrp	x1, .LANCHOR10
-	add	x1, x1, :lo12:.LANCHOR10
+.L119:
+	b	.L119
+.L118:
+	adrp	x1, .LANCHOR17
+	add	x1, x1, :lo12:.LANCHOR17
 	mov	w7, w2
 	ldrb	w6, [x1, w0, sxtw]
-	adrp	x0, .LANCHOR6
-	ldr	x4, [x0, #:lo12:.LANCHOR6]
+	adrp	x0, .LANCHOR13
+	ldr	x4, [x0, #:lo12:.LANCHOR13]
 	mov	w0, w6
 	bl	nandc_cs
 	ubfiz	x3, x6, 8, 8
@@ -367,22 +791,22 @@ flash_wait_device_ready_raw:
 	str	w1, [x3, 2052]
 	lsr	w5, w5, 16
 	str	w5, [x3, 2052]
-.L65:
+.L126:
 	bl	timer_delay_ns
 	ldr	w2, [x3, 2048]
 	and	w2, w2, 255
 	bics	wzr, w7, w2
-	bne	.L60
+	bne	.L121
 	cmp	w2, 255
-	beq	.L60
+	beq	.L121
 	mov	w0, w6
 	bl	nandc_de_cs
 	ldp	x29, x30, [sp], 16
 	mov	w0, w2
 	ret
-.L60:
+.L121:
 	mov	w0, 20
-	b	.L65
+	b	.L126
 	.size	flash_wait_device_ready_raw, .-flash_wait_device_ready_raw
 	.section	.text.flash_wait_device_ready,"ax",@progbits
 	.align	2
@@ -393,31 +817,31 @@ flash_wait_device_ready:
 	ubfx	x6, x0, 21, 3
 	and	w1, w0, 2097151
 	tst	x0, 50331648
-	bne	.L67
-	adrp	x0, .LANCHOR11
-	adrp	x5, .LANCHOR12
-	ldrb	w0, [x0, #:lo12:.LANCHOR11]
-	cbz	w0, .L68
-	ldrb	w0, [x5, #:lo12:.LANCHOR12]
-	cbz	w0, .L67
-.L68:
-	adrp	x0, .LANCHOR13
-	ldrh	w3, [x0, #:lo12:.LANCHOR13]
-	ldrb	w0, [x5, #:lo12:.LANCHOR12]
+	bne	.L128
+	adrp	x0, .LANCHOR18
+	adrp	x5, .LANCHOR19
+	ldrb	w0, [x0, #:lo12:.LANCHOR18]
+	cbz	w0, .L129
+	ldrb	w0, [x5, #:lo12:.LANCHOR19]
+	cbz	w0, .L128
+.L129:
+	adrp	x0, .LANCHOR20
+	ldrh	w3, [x0, #:lo12:.LANCHOR20]
+	ldrb	w0, [x5, #:lo12:.LANCHOR19]
 	udiv	w4, w1, w3
 	mul	w4, w4, w3
 	sub	w3, w1, w4
-	cbz	w0, .L69
+	cbz	w0, .L130
 	add	w1, w4, w3, lsl 1
-.L67:
+.L128:
 	mov	w0, w6
 	b	flash_wait_device_ready_raw
-.L69:
-	adrp	x5, .LANCHOR14
-	add	x5, x5, :lo12:.LANCHOR14
+.L130:
+	adrp	x5, .LANCHOR21
+	add	x5, x5, :lo12:.LANCHOR21
 	ldrh	w3, [x5, w3, uxtw 1]
 	add	w1, w3, w4
-	b	.L67
+	b	.L128
 	.size	flash_wait_device_ready, .-flash_wait_device_ready
 	.section	.text.nandc_wait_flash_ready,"ax",@progbits
 	.align	2
@@ -427,25 +851,25 @@ nandc_wait_flash_ready:
 	mov	w2, 34464
 	stp	x29, x30, [sp, -32]!
 	movk	w2, 0x1, lsl 16
-	adrp	x3, .LANCHOR6
+	adrp	x3, .LANCHOR13
 	add	x29, sp, 0
-.L78:
+.L139:
 	mov	w0, 100
 	bl	timer_delay_ns
-	ldr	x0, [x3, #:lo12:.LANCHOR6]
+	ldr	x0, [x3, #:lo12:.LANCHOR13]
 	ldr	w0, [x0]
 	str	w0, [x29, 24]
 	ldr	w0, [x29, 24]
-	tbnz	x0, 9, .L79
+	tbnz	x0, 9, .L140
 	subs	w2, w2, #1
-	bne	.L78
+	bne	.L139
 	mov	w0, -1
-.L76:
+.L137:
 	ldp	x29, x30, [sp], 32
 	ret
-.L79:
+.L140:
 	mov	w0, 0
-	b	.L76
+	b	.L137
 	.size	nandc_wait_flash_ready, .-nandc_wait_flash_ready
 	.section	.text.sandisk_set_rr_para,"ax",@progbits
 	.align	2
@@ -463,35 +887,35 @@ sandisk_set_rr_para:
 	mov	w0, 200
 	bl	timer_delay_ns
 	add	w1, w2, 1
-	adrp	x0, .LANCHOR4
-	adrp	x2, .LANCHOR0
-	add	x2, x2, :lo12:.LANCHOR0
-	ldrb	w4, [x0, #:lo12:.LANCHOR4]
-	adrp	x0, .LANCHOR2
-	ldrb	w5, [x0, #:lo12:.LANCHOR2]
+	adrp	x0, .LANCHOR11
+	adrp	x2, .LANCHOR7
+	add	x2, x2, :lo12:.LANCHOR7
+	ldrb	w4, [x0, #:lo12:.LANCHOR11]
+	adrp	x0, .LANCHOR9
+	ldrb	w5, [x0, #:lo12:.LANCHOR9]
 	mov	w0, 5
 	umull	x1, w1, w0
-	adrp	x0, .LANCHOR1
-	add	x0, x0, :lo12:.LANCHOR1
+	adrp	x0, .LANCHOR8
+	add	x0, x0, :lo12:.LANCHOR8
 	add	x2, x2, x1
 	add	x1, x0, x1
 	mov	x0, 0
-.L83:
+.L144:
 	cmp	w4, w0
-	bhi	.L86
+	bhi	.L147
 	ldp	x29, x30, [sp], 16
 	b	nandc_wait_flash_ready
-.L86:
+.L147:
 	cmp	w5, 67
-	bne	.L84
+	bne	.L145
 	ldrsb	w6, [x1, x0]
-.L88:
+.L149:
 	add	x0, x0, 1
 	str	w6, [x3]
-	b	.L83
-.L84:
+	b	.L144
+.L145:
 	ldrsb	w6, [x2, x0]
-	b	.L88
+	b	.L149
 	.size	sandisk_set_rr_para, .-sandisk_set_rr_para
 	.section	.text.toshiba_3d_set_tlc_rr_para,"ax",@progbits
 	.align	2
@@ -510,8 +934,8 @@ toshiba_3d_set_tlc_rr_para:
 	madd	x1, x2, x1, x1
 	mov	w0, -119
 	str	w0, [x4, 4]
-	adrp	x0, .LANCHOR15
-	add	x0, x0, :lo12:.LANCHOR15
+	adrp	x0, .LANCHOR22
+	add	x0, x0, :lo12:.LANCHOR22
 	add	x5, x0, x1
 	ldrsb	w0, [x0, x1]
 	str	w0, [x4]
@@ -546,8 +970,8 @@ toshiba_3d_set_slc_rr_para:
 	str	wzr, [x0, 4]
 	mov	w2, -117
 	str	w2, [x0, 4]
-	adrp	x2, .LANCHOR16
-	add	x2, x2, :lo12:.LANCHOR16
+	adrp	x2, .LANCHOR23
+	add	x2, x2, :lo12:.LANCHOR23
 	add	x1, x2, x1, uxtb
 	ldrsb	w1, [x1, 1]
 	str	w1, [x0]
@@ -563,7 +987,7 @@ toshiba_3d_set_slc_rr_para:
 toshiba_tlc_set_rr_para:
 	mov	w6, 239
 	uxtw	x1, w1
-	cbz	w2, .L93
+	cbz	w2, .L154
 	stp	x29, x30, [sp, -16]!
 	mov	x4, x0
 	mov	x2, 7
@@ -572,8 +996,8 @@ toshiba_tlc_set_rr_para:
 	str	w6, [x4, 8]
 	mul	x1, x1, x2
 	str	w0, [x4, 4]
-	adrp	x0, .LANCHOR17
-	add	x0, x0, :lo12:.LANCHOR17
+	adrp	x0, .LANCHOR24
+	add	x0, x0, :lo12:.LANCHOR24
 	add	x5, x0, x1
 	ldrb	w0, [x0, x1]
 	str	w0, [x4]
@@ -595,49 +1019,58 @@ toshiba_tlc_set_rr_para:
 	str	w0, [x4]
 	str	wzr, [x4]
 	ldp	x29, x30, [sp], 16
-.L96:
+.L157:
 	b	nandc_wait_flash_ready
-.L93:
+.L154:
 	str	w6, [x0, 8]
 	mov	w2, 20
 	str	w2, [x0, 4]
-	adrp	x2, .LANCHOR18
-	add	x2, x2, :lo12:.LANCHOR18
+	adrp	x2, .LANCHOR25
+	add	x2, x2, :lo12:.LANCHOR25
 	ldrb	w1, [x2, x1]
 	str	w1, [x0]
 	str	wzr, [x0]
 	str	wzr, [x0]
 	str	wzr, [x0]
-	b	.L96
+	b	.L157
 	.size	toshiba_tlc_set_rr_para, .-toshiba_tlc_set_rr_para
-	.section	.text.flash_enter_slc_mode,"ax",@progbits
+	.section	.text.zftl_flash_enter_slc_mode,"ax",@progbits
 	.align	2
-	.global	flash_enter_slc_mode
-	.type	flash_enter_slc_mode, %function
-flash_enter_slc_mode:
-	adrp	x1, .LANCHOR11
+	.global	zftl_flash_enter_slc_mode
+	.type	zftl_flash_enter_slc_mode, %function
+zftl_flash_enter_slc_mode:
+	adrp	x1, .LANCHOR18
 	and	x0, x0, 255
-	ldrb	w2, [x1, #:lo12:.LANCHOR11]
-	cbz	w2, .L99
-	adrp	x1, .LANCHOR6
+	ldrb	w2, [x1, #:lo12:.LANCHOR18]
+	cbz	w2, .L160
+	adrp	x1, .LANCHOR13
 	cmp	w2, 1
-	ldr	x1, [x1, #:lo12:.LANCHOR6]
-	bne	.L101
-	adrp	x2, .LANCHOR19+29
-	ldrb	w2, [x2, #:lo12:.LANCHOR19+29]
-	cbz	w2, .L99
+	ldr	x1, [x1, #:lo12:.LANCHOR13]
+	bne	.L163
+.L180:
+	adrp	x2, .LANCHOR26+29
+	ldrb	w2, [x2, #:lo12:.LANCHOR26+29]
+	cbz	w2, .L160
 	add	x0, x0, 8
 	add	x0, x1, x0, lsl 8
 	str	w2, [x0, 8]
 	ret
-.L101:
+.L163:
 	cmp	w2, 2
-	bne	.L99
-	adrp	x2, .LANCHOR20
-	ldrb	w3, [x2, #:lo12:.LANCHOR20]
-	cbz	w3, .L99
+	bne	.L165
+	adrp	x2, .LANCHOR27
+	ldrb	w3, [x2, #:lo12:.LANCHOR27]
+	cbz	w3, .L160
+	strb	wzr, [x2, #:lo12:.LANCHOR27]
+	b	.L180
+.L165:
+	cmp	w2, 3
+	bne	.L160
+	adrp	x2, .LANCHOR27
+	ldrb	w3, [x2, #:lo12:.LANCHOR27]
+	cbz	w3, .L160
 	ubfiz	x0, x0, 8, 8
-	strb	wzr, [x2, #:lo12:.LANCHOR20]
+	strb	wzr, [x2, #:lo12:.LANCHOR27]
 	add	x0, x1, x0
 	mov	w1, 239
 	str	w1, [x0, 2056]
@@ -649,40 +1082,56 @@ flash_enter_slc_mode:
 	str	wzr, [x0, 2048]
 	str	wzr, [x0, 2048]
 	b	nandc_wait_flash_ready
-.L99:
+.L160:
 	ret
-	.size	flash_enter_slc_mode, .-flash_enter_slc_mode
-	.section	.text.flash_exit_slc_mode,"ax",@progbits
+	.size	zftl_flash_enter_slc_mode, .-zftl_flash_enter_slc_mode
+	.section	.text.zftl_flash_exit_slc_mode,"ax",@progbits
 	.align	2
-	.global	flash_exit_slc_mode
-	.type	flash_exit_slc_mode, %function
-flash_exit_slc_mode:
-	adrp	x1, .LANCHOR11
+	.global	zftl_flash_exit_slc_mode
+	.type	zftl_flash_exit_slc_mode, %function
+zftl_flash_exit_slc_mode:
+	adrp	x1, .LANCHOR18
 	and	x0, x0, 255
-	ldrb	w2, [x1, #:lo12:.LANCHOR11]
-	cbz	w2, .L111
-	adrp	x1, .LANCHOR6
+	ldrb	w2, [x1, #:lo12:.LANCHOR18]
+	cbz	w2, .L181
+	adrp	x1, .LANCHOR13
 	cmp	w2, 1
-	ldr	x1, [x1, #:lo12:.LANCHOR6]
-	bne	.L113
-	adrp	x2, .LANCHOR19+30
-	ldrb	w2, [x2, #:lo12:.LANCHOR19+30]
-	cbz	w2, .L111
+	ldr	x1, [x1, #:lo12:.LANCHOR13]
+	bne	.L184
+	adrp	x2, .LANCHOR26+30
+	ldrb	w2, [x2, #:lo12:.LANCHOR26+30]
+.L201:
+	cbz	w2, .L181
 	add	x0, x0, 8
 	add	x0, x1, x0, lsl 8
 	str	w2, [x0, 8]
 	ret
-.L113:
+.L184:
 	cmp	w2, 2
-	bne	.L111
-	adrp	x3, .LANCHOR20
-	ldrb	w2, [x3, #:lo12:.LANCHOR20]
-	cbnz	w2, .L111
+	bne	.L186
+	adrp	x4, .LANCHOR27
+	ldrb	w2, [x4, #:lo12:.LANCHOR27]
+	cbnz	w2, .L181
+	adrp	x2, .LANCHOR26
+	add	x2, x2, :lo12:.LANCHOR26
+	mov	w5, 4
+	ldrb	w3, [x2, 12]
+	ldrb	w2, [x2, 30]
+	cmp	w3, 2
+	csel	w3, w3, w5, eq
+	strb	w3, [x4, #:lo12:.LANCHOR27]
+	b	.L201
+.L186:
+	cmp	w2, 3
+	bne	.L181
+	adrp	x3, .LANCHOR27
+	ldrb	w2, [x3, #:lo12:.LANCHOR27]
+	cbnz	w2, .L181
 	ubfiz	x0, x0, 8, 8
-	adrp	x2, .LANCHOR19+12
+	adrp	x2, .LANCHOR26+12
 	add	x0, x1, x0
 	mov	w1, 239
-	ldrb	w2, [x2, #:lo12:.LANCHOR19+12]
+	ldrb	w2, [x2, #:lo12:.LANCHOR26+12]
 	mov	w4, 4
 	str	w1, [x0, 2056]
 	cmp	w2, 2
@@ -694,11 +1143,11 @@ flash_exit_slc_mode:
 	str	w1, [x0, 2048]
 	str	wzr, [x0, 2048]
 	str	wzr, [x0, 2048]
-	strb	w2, [x3, #:lo12:.LANCHOR20]
+	strb	w2, [x3, #:lo12:.LANCHOR27]
 	b	nandc_wait_flash_ready
-.L111:
+.L181:
 	ret
-	.size	flash_exit_slc_mode, .-flash_exit_slc_mode
+	.size	zftl_flash_exit_slc_mode, .-zftl_flash_exit_slc_mode
 	.section	.text.flash_erase_duplane_block,"ax",@progbits
 	.align	2
 	.global	flash_erase_duplane_block
@@ -707,99 +1156,94 @@ flash_erase_duplane_block:
 	stp	x29, x30, [sp, -80]!
 	and	w0, w0, 255
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	and	w24, w1, 255
-	adrp	x1, .LANCHOR8
+	str	x25, [sp, 64]
+	and	w25, w1, 255
+	adrp	x1, .LANCHOR15
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	ldrb	w1, [x1, #:lo12:.LANCHOR8]
-	str	x25, [sp, 64]
+	ldrb	w1, [x1, #:lo12:.LANCHOR15]
+	stp	x23, x24, [sp, 48]
 	cmp	w1, w0
-	bhi	.L124
-	adrp	x1, .LANCHOR21
+	bhi	.L203
+	adrp	x1, .LANCHOR28
 	adrp	x0, .LC0
-	mov	w2, 517
-	add	x1, x1, :lo12:.LANCHOR21
+	mov	w2, 531
+	add	x1, x1, :lo12:.LANCHOR28
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L125:
-	b	.L125
-.L124:
-	adrp	x1, .LANCHOR10
-	add	x1, x1, :lo12:.LANCHOR10
+.L204:
+	b	.L204
+.L203:
+	adrp	x1, .LANCHOR17
+	add	x1, x1, :lo12:.LANCHOR17
 	mov	w22, w2
 	mov	w21, w3
 	ldrb	w20, [x1, w0, sxtw]
-	adrp	x0, .LANCHOR6
-	ldr	x25, [x0, #:lo12:.LANCHOR6]
-	adrp	x0, .LANCHOR22
+	adrp	x0, .LANCHOR13
+	ldr	x24, [x0, #:lo12:.LANCHOR13]
+	adrp	x0, .LANCHOR29
 	and	x19, x20, 255
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
 	add	x23, x19, 8
-	add	x23, x25, x23, lsl 8
-	tbz	x0, 4, .L126
+	add	x23, x24, x23, lsl 8
+	tbz	x0, 4, .L205
 	adrp	x0, .LC1
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L126:
+.L205:
 	bl	nandc_wait_flash_ready
 	mov	w0, w20
 	bl	nandc_cs
 	mov	w0, w20
-	cbnz	w24, .L127
-	bl	flash_enter_slc_mode
-.L128:
-	add	x25, x25, x19, lsl 8
+	cbnz	w25, .L206
+	bl	zftl_flash_enter_slc_mode
+.L207:
+	add	x24, x24, x19, lsl 8
 	mov	w0, 96
-	str	w0, [x25, 2056]
+	str	w0, [x24, 2056]
 	and	w0, w22, 255
-	str	w0, [x25, 2052]
+	str	w0, [x24, 2052]
 	lsr	w0, w22, 8
-	str	w0, [x25, 2052]
+	str	w0, [x24, 2052]
 	lsr	w0, w22, 16
-	str	w0, [x25, 2052]
-	adrp	x0, .LANCHOR23
-	ldrb	w0, [x0, #:lo12:.LANCHOR23]
-	cbnz	w0, .L132
+	str	w0, [x24, 2052]
+	adrp	x0, .LANCHOR30
+	ldrb	w0, [x0, #:lo12:.LANCHOR30]
+	cbnz	w0, .L210
 	mov	w0, 208
-	str	w0, [x25, 2056]
+	str	w0, [x24, 2056]
 	mov	w19, 5
 	bl	nandc_wait_flash_ready
 	mov	x0, x23
 	bl	flash_read_status
 	and	w5, w0, w19
-.L129:
+.L208:
 	mov	w0, 96
-	str	w0, [x25, 2056]
+	str	w0, [x24, 2056]
 	and	w0, w21, 255
-	str	w0, [x25, 2052]
+	str	w0, [x24, 2052]
 	lsr	w0, w21, 8
-	str	w0, [x25, 2052]
+	str	w0, [x24, 2052]
 	lsr	w21, w21, 16
-	str	w21, [x25, 2052]
+	str	w21, [x24, 2052]
 	mov	w0, 208
-	str	w0, [x25, 2056]
+	str	w0, [x24, 2056]
+	mov	w19, 5
 	bl	nandc_wait_flash_ready
 	mov	x0, x23
 	bl	flash_read_status
-	mov	w6, w0
-	cbnz	w24, .L130
-	mov	w0, w20
-	bl	flash_exit_slc_mode
-.L130:
+	mov	w2, w0
 	mov	w0, w20
-	mov	w19, 5
 	bl	nandc_de_cs
-	and	w19, w6, w19
+	and	w19, w2, w19
 	orr	w19, w19, w5
-	cbz	w19, .L131
+	cbz	w19, .L209
 	adrp	x0, .LC2
-	mov	w2, w6
 	mov	w1, w22
 	add	x0, x0, :lo12:.LC2
 	bl	printf
-.L131:
+.L209:
 	mov	w0, w19
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -807,12 +1251,12 @@ flash_erase_duplane_block:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L127:
-	bl	flash_exit_slc_mode
-	b	.L128
-.L132:
+.L206:
+	bl	zftl_flash_exit_slc_mode
+	b	.L207
+.L210:
 	mov	w5, 0
-	b	.L129
+	b	.L208
 	.size	flash_erase_duplane_block, .-flash_erase_duplane_block
 	.section	.text.flash_erase_block_en,"ax",@progbits
 	.align	2
@@ -823,47 +1267,47 @@ flash_erase_block_en:
 	and	w0, w0, 255
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	and	w23, w1, 255
-	adrp	x1, .LANCHOR8
+	and	w24, w1, 255
+	adrp	x1, .LANCHOR15
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	ldrb	w1, [x1, #:lo12:.LANCHOR8]
+	ldrb	w1, [x1, #:lo12:.LANCHOR15]
 	cmp	w1, w0
-	bhi	.L141
-	adrp	x1, .LANCHOR24
+	bhi	.L219
+	adrp	x1, .LANCHOR31
 	adrp	x0, .LC0
-	mov	w2, 561
-	add	x1, x1, :lo12:.LANCHOR24
+	mov	w2, 576
+	add	x1, x1, :lo12:.LANCHOR31
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L142:
-	b	.L142
-.L141:
-	adrp	x1, .LANCHOR10
-	add	x1, x1, :lo12:.LANCHOR10
+.L220:
+	b	.L220
+.L219:
+	adrp	x1, .LANCHOR17
+	add	x1, x1, :lo12:.LANCHOR17
 	mov	w21, w2
 	ldrb	w20, [x1, w0, sxtw]
-	adrp	x0, .LANCHOR6
-	ldr	x24, [x0, #:lo12:.LANCHOR6]
-	adrp	x0, .LANCHOR22
+	adrp	x0, .LANCHOR13
+	ldr	x23, [x0, #:lo12:.LANCHOR13]
+	adrp	x0, .LANCHOR29
 	and	x19, x20, 255
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
 	add	x22, x19, 8
-	add	x22, x24, x22, lsl 8
-	tbz	x0, 4, .L143
+	add	x22, x23, x22, lsl 8
+	tbz	x0, 4, .L221
 	adrp	x0, .LC3
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC3
 	bl	printf
-.L143:
+.L221:
 	bl	nandc_wait_flash_ready
 	mov	w0, w20
 	bl	nandc_cs
 	mov	w0, w20
-	cbnz	w23, .L144
-	bl	flash_enter_slc_mode
-.L145:
-	add	x0, x24, x19, lsl 8
+	cbnz	w24, .L222
+	bl	zftl_flash_enter_slc_mode
+.L223:
+	add	x0, x23, x19, lsl 8
 	mov	w2, 96
 	and	w1, w21, 2097151
 	str	w2, [x0, 2056]
@@ -878,33 +1322,29 @@ flash_erase_block_en:
 	bl	nandc_wait_flash_ready
 	mov	x0, x22
 	bl	flash_read_status
-	mov	w5, w0
-	cbnz	w23, .L146
-	mov	w0, w20
-	bl	flash_exit_slc_mode
-.L146:
+	mov	w19, w0
 	mov	w0, w20
-	mov	w19, 5
 	bl	nandc_de_cs
-	ands	w19, w5, w19
-	beq	.L147
-	adrp	x0, .LANCHOR13
+	mov	w0, 5
+	ands	w19, w19, w0
+	beq	.L224
+	adrp	x0, .LANCHOR20
 	mov	w2, w19
-	ldrh	w1, [x0, #:lo12:.LANCHOR13]
+	ldrh	w1, [x0, #:lo12:.LANCHOR20]
 	adrp	x0, .LC4
 	add	x0, x0, :lo12:.LC4
 	udiv	w1, w21, w1
 	bl	printf
-.L147:
+.L224:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L144:
-	bl	flash_exit_slc_mode
-	b	.L145
+.L222:
+	bl	zftl_flash_exit_slc_mode
+	b	.L223
 	.size	flash_erase_block_en, .-flash_erase_block_en
 	.section	.text.flash_erase_block,"ax",@progbits
 	.align	2
@@ -921,27 +1361,27 @@ flash_erase_block:
 	.type	flash_erase_all, %function
 flash_erase_all:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR19
-	add	x0, x0, :lo12:.LANCHOR19
+	adrp	x0, .LANCHOR26
+	add	x0, x0, :lo12:.LANCHOR26
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w19, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR13
+	adrp	x23, .LANCHOR20
 	stp	x21, x22, [sp, 32]
-	add	x23, x23, :lo12:.LANCHOR13
+	add	x23, x23, :lo12:.LANCHOR20
 	ldrh	w20, [x0, 14]
-	adrp	x22, .LANCHOR8
+	adrp	x22, .LANCHOR15
 	str	x25, [sp, 64]
-	add	x22, x22, :lo12:.LANCHOR8
-	adrp	x24, .LANCHOR10
+	add	x22, x22, :lo12:.LANCHOR15
+	adrp	x24, .LANCHOR17
 	ldrb	w1, [x0, 13]
 	mul	w20, w20, w1
 	and	w20, w20, 65535
-.L157:
+.L234:
 	ldrb	w0, [x22]
 	cmp	w0, w19
-	bhi	.L160
+	bhi	.L237
 	ldp	x19, x20, [sp, 16]
 	mov	w1, 0
 	ldp	x21, x22, [sp, 32]
@@ -951,23 +1391,23 @@ flash_erase_all:
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	b	printf
-.L160:
-	add	x0, x24, :lo12:.LANCHOR10
+.L237:
+	add	x0, x24, :lo12:.LANCHOR17
 	mov	w21, 0
 	ldrb	w25, [x0, w19, sxtw]
-.L158:
+.L235:
 	cmp	w20, w21, uxth
-	bhi	.L159
+	bhi	.L236
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L157
-.L159:
+	b	.L234
+.L236:
 	ldrh	w1, [x23]
 	mov	w0, w25
 	mul	w1, w1, w21
 	add	w21, w21, 1
 	bl	flash_erase_block
-	b	.L158
+	b	.L235
 	.size	flash_erase_all, .-flash_erase_all
 	.section	.text.flash_set_interface_mode,"ax",@progbits
 	.align	2
@@ -975,15 +1415,15 @@ flash_erase_all:
 	.type	flash_set_interface_mode, %function
 flash_set_interface_mode:
 	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR6
-	adrp	x5, .LANCHOR26
-	add	x5, x5, :lo12:.LANCHOR26
+	adrp	x1, .LANCHOR13
+	adrp	x5, .LANCHOR33
+	add	x5, x5, :lo12:.LANCHOR33
 	add	x29, sp, 0
-	ldr	x6, [x1, #:lo12:.LANCHOR6]
-	adrp	x1, .LANCHOR25
+	ldr	x6, [x1, #:lo12:.LANCHOR13]
+	adrp	x1, .LANCHOR32
 	mov	x2, 0
 	mov	w11, 69
-	ldrb	w1, [x1, #:lo12:.LANCHOR25]
+	ldrb	w1, [x1, #:lo12:.LANCHOR32]
 	mov	w7, 239
 	mov	w8, 128
 	mov	w12, 1
@@ -991,63 +1431,63 @@ flash_set_interface_mode:
 	and	w4, w1, 1
 	mov	w13, 35
 	mov	w14, 5
-.L170:
+.L247:
 	lsl	x1, x2, 3
 	ldrb	w3, [x1, x5]
 	cmp	w3, 152
 	ccmp	w3, w11, 4, ne
-	beq	.L163
+	beq	.L240
 	cmp	w3, 44
-	bne	.L164
-.L163:
+	bne	.L241
+.L240:
 	cmp	w0, 1
-	bne	.L165
-	cbz	w4, .L164
+	bne	.L242
+	cbz	w4, .L241
 	add	x1, x6, x2, lsl 8
 	cmp	w3, 44
 	str	w7, [x1, 2056]
-	bne	.L166
+	bne	.L243
 	str	w0, [x1, 2052]
 	str	w14, [x1, 2048]
-.L169:
+.L246:
 	str	wzr, [x1, 2048]
 	str	wzr, [x1, 2048]
 	str	wzr, [x1, 2048]
-.L164:
+.L241:
 	add	x2, x2, 1
 	cmp	x2, 4
-	bne	.L170
+	bne	.L247
 	bl	nandc_wait_flash_ready
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L166:
+.L243:
 	str	w8, [x1, 2052]
 	str	w0, [x1, 2048]
-	b	.L169
-.L165:
-	cbz	w10, .L164
+	b	.L246
+.L242:
+	cbz	w10, .L241
 	add	x1, x6, x2, lsl 8
 	cmp	w3, 44
 	str	w7, [x1, 2056]
-	bne	.L168
+	bne	.L245
 	str	w12, [x1, 2052]
 	str	w13, [x1, 2048]
-	b	.L169
-.L168:
+	b	.L246
+.L245:
 	str	w8, [x1, 2052]
 	str	wzr, [x1, 2048]
-	b	.L169
+	b	.L246
 	.size	flash_set_interface_mode, .-flash_set_interface_mode
 	.section	.text.flash_reset,"ax",@progbits
 	.align	2
 	.global	flash_reset
 	.type	flash_reset, %function
 flash_reset:
-	adrp	x1, .LANCHOR6
+	adrp	x1, .LANCHOR13
 	ubfiz	x0, x0, 8, 8
 	add	x0, x0, 2048
-	ldr	x1, [x1, #:lo12:.LANCHOR6]
+	ldr	x1, [x1, #:lo12:.LANCHOR13]
 	add	x1, x1, x0
 	mov	w0, 255
 	str	w0, [x1, 8]
@@ -1058,17 +1498,17 @@ flash_reset:
 	.global	flash_read_id
 	.type	flash_read_id, %function
 flash_read_id:
-	and	w6, w0, 255
+	and	w10, w0, 255
 	stp	x29, x30, [sp, -16]!
-	adrp	x0, .LANCHOR6
-	mov	x5, x1
+	adrp	x0, .LANCHOR13
+	mov	x8, x1
 	add	x29, sp, 0
-	ldr	x4, [x0, #:lo12:.LANCHOR6]
-	mov	w0, w6
+	ldr	x4, [x0, #:lo12:.LANCHOR13]
+	mov	w0, w10
 	bl	flash_reset
-	mov	w0, w6
+	mov	w0, w10
 	bl	nandc_cs
-	ubfiz	x2, x6, 8, 8
+	ubfiz	x2, x10, 8, 8
 	add	x2, x4, x2
 	mov	w0, 144
 	str	w0, [x2, 2056]
@@ -1076,24 +1516,41 @@ flash_read_id:
 	str	wzr, [x2, 2052]
 	bl	timer_delay_ns
 	ldr	w0, [x2, 2048]
-	ldp	x29, x30, [sp], 16
-	strb	w0, [x5]
+	strb	w0, [x8]
 	ldr	w0, [x2, 2048]
-	strb	w0, [x5, 1]
+	strb	w0, [x8, 1]
 	ldr	w0, [x2, 2048]
-	strb	w0, [x5, 2]
+	strb	w0, [x8, 2]
 	ldr	w0, [x2, 2048]
-	strb	w0, [x5, 3]
+	strb	w0, [x8, 3]
 	ldr	w0, [x2, 2048]
-	strb	w0, [x5, 4]
+	strb	w0, [x8, 4]
 	ldr	w0, [x2, 2048]
-	strb	w0, [x5, 5]
+	strb	w0, [x8, 5]
 	ldr	w0, [x2, 2048]
-	strb	w0, [x5, 6]
+	strb	w0, [x8, 6]
 	ldr	w0, [x2, 2048]
-	strb	w0, [x5, 7]
-	mov	w0, w6
-	b	nandc_de_cs
+	strb	w0, [x8, 7]
+	mov	w0, w10
+	bl	nandc_de_cs
+	ldrb	w2, [x8]
+	sub	w0, w2, #1
+	and	w0, w0, 255
+	cmp	w0, 253
+	bhi	.L257
+	ldrb	w7, [x8, 5]
+	add	w1, w10, 1
+	ldrb	w6, [x8, 4]
+	adrp	x0, .LC6
+	ldrb	w5, [x8, 3]
+	add	x0, x0, :lo12:.LC6
+	ldrb	w4, [x8, 2]
+	ldrb	w3, [x8, 1]
+	ldp	x29, x30, [sp], 16
+	b	printf
+.L257:
+	ldp	x29, x30, [sp], 16
+	ret
 	.size	flash_read_id, .-flash_read_id
 	.section	.text.flash_read_spare,"ax",@progbits
 	.align	2
@@ -1102,12 +1559,12 @@ flash_read_id:
 flash_read_spare:
 	stp	x29, x30, [sp, -16]!
 	mov	x5, x2
-	adrp	x2, .LANCHOR19+9
+	adrp	x2, .LANCHOR26+9
 	ubfiz	x0, x0, 8, 8
 	add	x29, sp, 0
-	ldrb	w3, [x2, #:lo12:.LANCHOR19+9]
-	adrp	x2, .LANCHOR6
-	ldr	x4, [x2, #:lo12:.LANCHOR6]
+	ldrb	w3, [x2, #:lo12:.LANCHOR26+9]
+	adrp	x2, .LANCHOR13
+	ldr	x4, [x2, #:lo12:.LANCHOR13]
 	lsl	w3, w3, 9
 	add	x4, x4, x0
 	and	w0, w1, 255
@@ -1134,19 +1591,19 @@ flash_read_spare:
 	.type	sandisk_prog_test_bad_block, %function
 sandisk_prog_test_bad_block:
 	stp	x29, x30, [sp, -16]!
-	adrp	x2, .LANCHOR6
+	adrp	x2, .LANCHOR13
 	and	w0, w0, 255
 	add	x29, sp, 0
-	ldr	x4, [x2, #:lo12:.LANCHOR6]
-	adrp	x2, .LANCHOR19
-	add	x3, x2, :lo12:.LANCHOR19
+	ldr	x4, [x2, #:lo12:.LANCHOR13]
+	adrp	x2, .LANCHOR26
+	add	x3, x2, :lo12:.LANCHOR26
 	mov	x5, x2
 	sxtw	x2, w0
 	add	x2, x2, 8
 	ldrb	w3, [x3, 29]
 	add	x2, x4, x2, lsl 8
-	cbz	w3, .L185
-.L192:
+	cbz	w3, .L263
+.L270:
 	ubfiz	x0, x0, 8, 8
 	str	w3, [x2, 8]
 	add	x4, x4, x0
@@ -1167,105 +1624,106 @@ sandisk_prog_test_bad_block:
 	str	w0, [x4, 2056]
 	mov	w0, 80
 	bl	timer_delay_ns
-	add	x2, x5, :lo12:.LANCHOR19
+	add	x2, x5, :lo12:.LANCHOR26
 	ldr	w0, [x4, 2048]
 	mov	w1, 5
 	and	w0, w0, w1
 	ldrb	w1, [x2, 30]
-	cbz	w1, .L184
+	cbz	w1, .L262
 	str	w1, [x4, 2056]
-.L184:
+.L262:
 	ldp	x29, x30, [sp], 16
 	ret
-.L185:
+.L263:
 	mov	w3, 162
-	b	.L192
+	b	.L270
 	.size	sandisk_prog_test_bad_block, .-sandisk_prog_test_bad_block
+	.section	.text.nandc_rdy_status,"ax",@progbits
+	.align	2
+	.global	nandc_rdy_status
+	.type	nandc_rdy_status, %function
+nandc_rdy_status:
+	adrp	x0, .LANCHOR13
+	sub	sp, sp, #16
+	ldr	x0, [x0, #:lo12:.LANCHOR13]
+	ldr	w0, [x0]
+	str	w0, [sp, 8]
+	ldr	w0, [sp, 8]
+	add	sp, sp, 16
+	ubfx	x0, x0, 9, 1
+	ret
+	.size	nandc_rdy_status, .-nandc_rdy_status
 	.section	.text.nandc_bch_sel,"ax",@progbits
 	.align	2
 	.global	nandc_bch_sel
 	.type	nandc_bch_sel, %function
 nandc_bch_sel:
-	adrp	x2, .LANCHOR27
+	adrp	x2, .LANCHOR34
 	mov	w1, 1
-	strb	w0, [x2, #:lo12:.LANCHOR27]
-	adrp	x2, .LANCHOR7
-	ldrb	w2, [x2, #:lo12:.LANCHOR7]
+	strb	w0, [x2, #:lo12:.LANCHOR34]
+	adrp	x2, .LANCHOR14
+	ldrb	w2, [x2, #:lo12:.LANCHOR14]
 	cmp	w2, 9
-	adrp	x2, .LANCHOR6
-	ldr	x2, [x2, #:lo12:.LANCHOR6]
-	bne	.L194
+	adrp	x2, .LANCHOR13
+	ldr	x2, [x2, #:lo12:.LANCHOR13]
+	bne	.L274
 	str	w1, [x2, 16]
 	cmp	w0, 70
-	beq	.L201
+	beq	.L281
 	cmp	w0, 60
-	beq	.L202
+	beq	.L282
 	cmp	w0, 40
 	cset	w1, eq
 	add	w1, w1, 1
-.L195:
+.L275:
 	lsl	w1, w1, 25
 	orr	w1, w1, 1
 	str	w1, [x2, 32]
 	ret
-.L201:
+.L281:
 	mov	w1, 0
-	b	.L195
-.L202:
+	b	.L275
+.L282:
 	mov	w1, 3
-	b	.L195
-.L194:
+	b	.L275
+.L274:
 	str	w1, [x2, 8]
 	cmp	w0, 16
 	mov	w1, 4096
-	bne	.L197
-.L200:
+	bne	.L277
+.L280:
 	and	w1, w1, -17
-.L198:
+.L278:
 	orr	w1, w1, 1
 	str	w1, [x2, 12]
 	ret
-.L197:
+.L277:
 	cmp	w0, 24
-	bne	.L199
+	bne	.L279
 	orr	w1, w1, 16
-	b	.L198
-.L199:
+	b	.L278
+.L279:
 	orr	w1, w1, 262144
 	cmp	w0, 40
 	orr	w1, w1, 16
-	bne	.L198
-	b	.L200
+	bne	.L278
+	b	.L280
 	.size	nandc_bch_sel, .-nandc_bch_sel
-	.section	.text.NandCIrqEnable,"ax",@progbits
+	.section	.text.zftl_nandc_get_irq_status,"ax",@progbits
 	.align	2
-	.global	NandCIrqEnable
-	.type	NandCIrqEnable, %function
-NandCIrqEnable:
-	ret
-	.size	NandCIrqEnable, .-NandCIrqEnable
-	.section	.text.NandCIrqDisable,"ax",@progbits
-	.align	2
-	.global	NandCIrqDisable
-	.type	NandCIrqDisable, %function
-NandCIrqDisable:
-	ret
-	.size	NandCIrqDisable, .-NandCIrqDisable
-	.section	.text.rk_nandc_get_irq_status,"ax",@progbits
-	.align	2
-	.global	rk_nandc_get_irq_status
-	.type	rk_nandc_get_irq_status, %function
-rk_nandc_get_irq_status:
-	adrp	x1, .LANCHOR7
-	ldrb	w1, [x1, #:lo12:.LANCHOR7]
+	.global	zftl_nandc_get_irq_status
+	.type	zftl_nandc_get_irq_status, %function
+zftl_nandc_get_irq_status:
+	adrp	x1, .LANCHOR14
+	ldrb	w1, [x1, #:lo12:.LANCHOR14]
 	cmp	w1, 9
-	bne	.L210
+	bne	.L288
 	ldr	w0, [x0, 296]
 	ret
-.L210:
+.L288:
 	ldr	w0, [x0, 372]
 	ret
-	.size	rk_nandc_get_irq_status, .-rk_nandc_get_irq_status
+	.size	zftl_nandc_get_irq_status, .-zftl_nandc_get_irq_status
 	.section	.text.rk_nandc_flash_ready,"ax",@progbits
 	.align	2
 	.global	rk_nandc_flash_ready
@@ -1273,13 +1731,13 @@ rk_nandc_get_irq_status:
 rk_nandc_flash_ready:
 	ret
 	.size	rk_nandc_flash_ready, .-rk_nandc_flash_ready
-	.section	.text.NandcIqrWaitFlashReady,"ax",@progbits
+	.section	.text.nandc_iqr_wait_flash_ready,"ax",@progbits
 	.align	2
-	.global	NandcIqrWaitFlashReady
-	.type	NandcIqrWaitFlashReady, %function
-NandcIqrWaitFlashReady:
+	.global	nandc_iqr_wait_flash_ready
+	.type	nandc_iqr_wait_flash_ready, %function
+nandc_iqr_wait_flash_ready:
 	ret
-	.size	NandcIqrWaitFlashReady, .-NandcIqrWaitFlashReady
+	.size	nandc_iqr_wait_flash_ready, .-nandc_iqr_wait_flash_ready
 	.section	.text.rk_nandc_flash_xfer_completed,"ax",@progbits
 	.align	2
 	.global	rk_nandc_flash_xfer_completed
@@ -1294,37 +1752,37 @@ rk_nandc_flash_xfer_completed:
 nandc_xfer_start:
 	stp	x29, x30, [sp, -64]!
 	and	w1, w1, 255
-	adrp	x4, .LANCHOR30
+	adrp	x4, .LANCHOR37
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	w23, w0, 255
-	adrp	x0, .LANCHOR7
+	adrp	x0, .LANCHOR14
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	add	w20, w1, 1
-	ldrb	w0, [x0, #:lo12:.LANCHOR7]
-	adrp	x24, .LANCHOR6
+	ldrb	w0, [x0, #:lo12:.LANCHOR14]
+	adrp	x24, .LANCHOR13
 	cmp	w0, 9
-	bne	.L216
+	bne	.L294
 	ubfiz	w19, w23, 1, 1
 	mov	w0, 1
 	orr	w19, w19, 8
 	asr	w20, w20, 1
 	bfi	w19, w0, 5, 2
-	adrp	x0, .LANCHOR28
+	adrp	x0, .LANCHOR35
 	orr	w19, w19, 536870912
-	ldrb	w0, [x0, #:lo12:.LANCHOR28]
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
 	orr	w19, w19, 1024
 	and	w19, w19, -17
 	bfi	w19, w20, 22, 6
-	cbz	w0, .L217
-	adrp	x0, .LANCHOR29
-	ldrb	w1, [x0, #:lo12:.LANCHOR29]
+	cbz	w0, .L295
+	adrp	x0, .LANCHOR36
+	ldrb	w1, [x0, #:lo12:.LANCHOR36]
 	orr	w0, w19, 512
 	cmp	w1, 0
 	csel	w19, w0, w19, ne
-.L217:
-	add	x21, x4, :lo12:.LANCHOR30
+.L295:
+	add	x21, x4, :lo12:.LANCHOR37
 	add	x0, x2, 63
 	and	w20, w20, 63
 	and	x0, x0, -64
@@ -1341,7 +1799,7 @@ nandc_xfer_start:
 	and	x1, x1, -64
 	add	x1, x1, x20
 	bl	flush_dcache_range
-	ldr	x1, [x24, #:lo12:.LANCHOR6]
+	ldr	x1, [x24, #:lo12:.LANCHOR13]
 	mov	w0, 1
 	str	w0, [x21, 32]
 	mov	w2, 16
@@ -1358,22 +1816,22 @@ nandc_xfer_start:
 	cset	w2, eq
 	orr	w0, w0, 4
 	bfi	w0, w2, 1, 1
-	adrp	x2, .LANCHOR31
+	adrp	x2, .LANCHOR38
 	orr	w0, w0, 1
-	ldrh	w2, [x2, #:lo12:.LANCHOR31]
+	ldrh	w2, [x2, #:lo12:.LANCHOR38]
 	bfi	w0, w2, 16, 11
 	str	w0, [x1, 48]
 	str	w19, [x1, 16]
 	orr	w19, w19, 4
 	str	w19, [x1, 16]
-.L215:
+.L293:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L216:
-	ldr	x0, [x24, #:lo12:.LANCHOR6]
+.L294:
+	ldr	x0, [x24, #:lo12:.LANCHOR13]
 	ubfiz	w19, w23, 1, 1
 	orr	w19, w19, 8
 	asr	w20, w20, 1
@@ -1388,24 +1846,24 @@ nandc_xfer_start:
 	orr	w19, w19, 1024
 	and	w19, w19, -17
 	bfi	w19, w20, 22, 6
-	cbz	w23, .L219
-	adrp	x0, .LANCHOR27
+	cbz	w23, .L297
+	adrp	x0, .LANCHOR34
 	ubfx	x1, x1, 1, 7
-	ldr	x8, [x4, #:lo12:.LANCHOR30]
+	ldr	x8, [x4, #:lo12:.LANCHOR37]
 	add	x1, x3, x1, lsl 2
-	ldrb	w0, [x0, #:lo12:.LANCHOR27]
+	ldrb	w0, [x0, #:lo12:.LANCHOR34]
 	mov	w5, 128
 	cmp	w0, 24
 	mov	w0, 64
 	csel	w5, w5, w0, hi
 	mov	w0, 0
-.L221:
+.L299:
 	add	w7, w5, w0
 	cmp	x3, x1
-	bne	.L222
-.L223:
-	add	x21, x4, :lo12:.LANCHOR30
-	ldr	x0, [x4, #:lo12:.LANCHOR30]
+	bne	.L300
+.L301:
+	add	x21, x4, :lo12:.LANCHOR37
+	ldr	x0, [x4, #:lo12:.LANCHOR37]
 	and	w20, w20, 63
 	ubfiz	x1, x20, 10, 6
 	ubfiz	x20, x20, 7, 6
@@ -1422,7 +1880,7 @@ nandc_xfer_start:
 	and	x1, x1, -64
 	add	x1, x1, x20
 	bl	flush_dcache_range
-	ldr	x1, [x24, #:lo12:.LANCHOR6]
+	ldr	x1, [x24, #:lo12:.LANCHOR13]
 	mov	w0, 1
 	str	w0, [x21, 32]
 	cmp	w23, 0
@@ -1439,8 +1897,8 @@ nandc_xfer_start:
 	str	w19, [x1, 8]
 	orr	w19, w19, 4
 	str	w19, [x1, 8]
-	b	.L215
-.L222:
+	b	.L293
+.L300:
 	ldrh	w10, [x3]
 	and	x0, x0, 4294967292
 	ldrh	w6, [x3, 2]
@@ -1448,11 +1906,11 @@ nandc_xfer_start:
 	orr	x6, x10, x6, lsl 16
 	str	w6, [x8, x0]
 	mov	w0, w7
-	b	.L221
-.L219:
-	ldr	x1, [x4, #:lo12:.LANCHOR30]
+	b	.L299
+.L297:
+	ldr	x1, [x4, #:lo12:.LANCHOR37]
 	str	w0, [x1]
-	b	.L223
+	b	.L301
 	.size	nandc_xfer_start, .-nandc_xfer_start
 	.section	.text.nandc_set_seed,"ax",@progbits
 	.align	2
@@ -1460,23 +1918,23 @@ nandc_xfer_start:
 	.type	nandc_set_seed, %function
 nandc_set_seed:
 	and	x0, x0, 127
-	adrp	x1, .LANCHOR32
-	add	x1, x1, :lo12:.LANCHOR32
+	adrp	x1, .LANCHOR39
+	add	x1, x1, :lo12:.LANCHOR39
 	ldrh	w0, [x1, x0, lsl 1]
-	adrp	x1, .LANCHOR29
-	ldrb	w2, [x1, #:lo12:.LANCHOR29]
+	adrp	x1, .LANCHOR36
+	ldrb	w2, [x1, #:lo12:.LANCHOR36]
 	orr	w1, w0, -1073741824
 	cmp	w2, 0
 	csel	w0, w1, w0, ne
-	adrp	x1, .LANCHOR7
-	ldrb	w1, [x1, #:lo12:.LANCHOR7]
+	adrp	x1, .LANCHOR14
+	ldrb	w1, [x1, #:lo12:.LANCHOR14]
 	cmp	w1, 9
-	adrp	x1, .LANCHOR6
-	ldr	x1, [x1, #:lo12:.LANCHOR6]
-	bne	.L233
+	adrp	x1, .LANCHOR13
+	ldr	x1, [x1, #:lo12:.LANCHOR13]
+	bne	.L311
 	str	w0, [x1, 520]
 	ret
-.L233:
+.L311:
 	str	w0, [x1, 336]
 	ret
 	.size	nandc_set_seed, .-nandc_set_seed
@@ -1486,143 +1944,143 @@ nandc_set_seed:
 	.type	flash_start_page_read, %function
 flash_start_page_read:
 	stp	x29, x30, [sp, -16]!
-	and	w10, w0, 255
-	adrp	x0, .LANCHOR8
+	and	w11, w0, 255
+	adrp	x0, .LANCHOR15
 	ubfx	x2, x1, 21, 3
 	add	x29, sp, 0
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
 	cmp	w0, w2
-	bhi	.L238
-	adrp	x1, .LANCHOR33
+	bhi	.L316
+	adrp	x1, .LANCHOR40
 	adrp	x0, .LC0
-	mov	w2, 738
-	add	x1, x1, :lo12:.LANCHOR33
+	mov	w2, 759
+	add	x1, x1, :lo12:.LANCHOR40
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L239:
-	b	.L239
-.L238:
-	adrp	x0, .LANCHOR10
-	add	x0, x0, :lo12:.LANCHOR10
-	and	w5, w1, 2097151
-	ubfx	x8, x1, 24, 2
-	ldrb	w7, [x0, w2, sxtw]
-	adrp	x0, .LANCHOR6
-	ldr	x6, [x0, #:lo12:.LANCHOR6]
-	mov	w0, w7
+.L317:
+	b	.L317
+.L316:
+	adrp	x0, .LANCHOR17
+	add	x0, x0, :lo12:.LANCHOR17
+	and	w6, w1, 2097151
+	ubfx	x10, x1, 24, 2
+	ldrb	w8, [x0, w2, sxtw]
+	adrp	x0, .LANCHOR13
+	ldr	x7, [x0, #:lo12:.LANCHOR13]
+	mov	w0, w8
 	bl	nandc_cs
-	adrp	x11, .LANCHOR34
-	cbnz	w8, .L240
-	adrp	x0, .LANCHOR11
-	ldrb	w1, [x0, #:lo12:.LANCHOR11]
-	adrp	x0, .LANCHOR12
-	cbz	w1, .L241
-	ldrb	w1, [x0, #:lo12:.LANCHOR12]
-	cbz	w1, .L242
-.L241:
-	adrp	x1, .LANCHOR13
-	ldrb	w0, [x0, #:lo12:.LANCHOR12]
-	ldrh	w1, [x1, #:lo12:.LANCHOR13]
-	udiv	w2, w5, w1
+	adrp	x12, .LANCHOR41
+	cbnz	w10, .L318
+	adrp	x0, .LANCHOR18
+	ldrb	w1, [x0, #:lo12:.LANCHOR18]
+	adrp	x0, .LANCHOR19
+	cbz	w1, .L319
+	ldrb	w1, [x0, #:lo12:.LANCHOR19]
+	cbz	w1, .L320
+.L319:
+	adrp	x1, .LANCHOR20
+	ldrb	w0, [x0, #:lo12:.LANCHOR19]
+	ldrh	w1, [x1, #:lo12:.LANCHOR20]
+	udiv	w2, w6, w1
 	mul	w2, w2, w1
-	sub	w5, w5, w2
-	cbz	w0, .L243
-	add	w5, w2, w5, lsl 1
-.L242:
-	mov	w0, w7
-	bl	flash_enter_slc_mode
-	b	.L244
-.L243:
-	adrp	x3, .LANCHOR14
-	add	x3, x3, :lo12:.LANCHOR14
-	ldrh	w5, [x3, w5, uxtw 1]
-	add	w5, w5, w2
-.L244:
-	ubfiz	x2, x7, 8, 8
-	and	w0, w5, 255
-	add	x2, x6, x2
+	sub	w6, w6, w2
+	cbz	w0, .L321
+	add	w6, w2, w6, lsl 1
+.L320:
+	mov	w0, w8
+	bl	zftl_flash_enter_slc_mode
+	b	.L322
+.L321:
+	adrp	x3, .LANCHOR21
+	add	x3, x3, :lo12:.LANCHOR21
+	ldrh	w6, [x3, w6, uxtw 1]
+	add	w6, w6, w2
+.L322:
+	ubfiz	x2, x8, 8, 8
+	and	w0, w6, 255
+	add	x2, x7, x2
 	str	wzr, [x2, 2056]
 	str	wzr, [x2, 2052]
 	str	wzr, [x2, 2052]
 	str	w0, [x2, 2052]
-	lsr	w0, w5, 8
+	lsr	w0, w6, 8
 	str	w0, [x2, 2052]
-	lsr	w0, w5, 16
+	lsr	w0, w6, 16
 	str	w0, [x2, 2052]
-	ldr	x0, [x11, #:lo12:.LANCHOR34]
-	str	w10, [x2, 2056]
+	ldr	x0, [x12, #:lo12:.LANCHOR41]
+	str	w11, [x2, 2056]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L246
-	cbz	w8, .L246
-	add	w5, w5, w5, lsl 1
-	sub	w0, w8, #1
-	add	w0, w5, w0
-.L255:
+	bne	.L324
+	cbz	w10, .L324
+	add	w6, w6, w6, lsl 1
+	sub	w0, w10, #1
+	add	w0, w6, w0
+.L333:
 	bl	nandc_set_seed
 	ldp	x29, x30, [sp], 16
 	mov	w0, 0
 	b	nandc_de_cs
-.L240:
-	ldr	x0, [x11, #:lo12:.LANCHOR34]
+.L318:
+	ldr	x0, [x12, #:lo12:.LANCHOR41]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L245
-	sxtw	x0, w7
+	bne	.L323
+	sxtw	x0, w8
 	add	x0, x0, 8
-	add	x0, x6, x0, lsl 8
-	str	w8, [x0, 8]
-	b	.L244
-.L245:
-	mov	w0, w7
-	bl	flash_exit_slc_mode
-	b	.L244
-.L246:
-	mov	w0, w5
-	b	.L255
+	add	x0, x7, x0, lsl 8
+	str	w10, [x0, 8]
+	b	.L322
+.L323:
+	mov	w0, w8
+	bl	zftl_flash_exit_slc_mode
+	b	.L322
+.L324:
+	mov	w0, w6
+	b	.L333
 	.size	flash_start_page_read, .-flash_start_page_read
-	.section	.text.FlashDeInit,"ax",@progbits
+	.section	.text.zftl_flash_de_init,"ax",@progbits
 	.align	2
-	.global	FlashDeInit
-	.type	FlashDeInit, %function
-FlashDeInit:
+	.global	zftl_flash_de_init
+	.type	zftl_flash_de_init, %function
+zftl_flash_de_init:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	nandc_wait_flash_ready
 	mov	w0, 0
 	bl	hynix_reconfig_rr_para
-	adrp	x15, .LANCHOR35
-	ldrb	w0, [x15, #:lo12:.LANCHOR35]
-	cbz	w0, .L257
-	adrp	x0, .LANCHOR25
-	ldrb	w0, [x0, #:lo12:.LANCHOR25]
-	tbz	x0, 0, .L257
+	adrp	x15, .LANCHOR42
+	ldrb	w0, [x15, #:lo12:.LANCHOR42]
+	cbz	w0, .L335
+	adrp	x0, .LANCHOR32
+	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	tbz	x0, 0, .L335
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
 	bl	nandc_set_if_mode
-	strb	wzr, [x15, #:lo12:.LANCHOR35]
-.L257:
-	adrp	x3, .LANCHOR29
-	ldrb	w0, [x3, #:lo12:.LANCHOR29]
-	cbz	w0, .L258
+	strb	wzr, [x15, #:lo12:.LANCHOR42]
+.L335:
+	adrp	x3, .LANCHOR36
+	ldrb	w0, [x3, #:lo12:.LANCHOR36]
+	cbz	w0, .L336
 	mov	w0, 0
-	strb	wzr, [x3, #:lo12:.LANCHOR29]
+	strb	wzr, [x3, #:lo12:.LANCHOR36]
 	bl	nandc_set_seed
 	mov	w0, 1
-	strb	w0, [x3, #:lo12:.LANCHOR29]
-.L258:
+	strb	w0, [x3, #:lo12:.LANCHOR36]
+.L336:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-	.size	FlashDeInit, .-FlashDeInit
+	.size	zftl_flash_de_init, .-zftl_flash_de_init
 	.section	.text.nandc_randomizer_enable,"ax",@progbits
 	.align	2
 	.global	nandc_randomizer_enable
 	.type	nandc_randomizer_enable, %function
 nandc_randomizer_enable:
-	adrp	x1, .LANCHOR29
-	strb	w0, [x1, #:lo12:.LANCHOR29]
+	adrp	x1, .LANCHOR36
+	strb	w0, [x1, #:lo12:.LANCHOR36]
 	ret
 	.size	nandc_randomizer_enable, .-nandc_randomizer_enable
 	.section	.text.nandc_get_chip_if,"ax",@progbits
@@ -1630,10 +2088,10 @@ nandc_randomizer_enable:
 	.global	nandc_get_chip_if
 	.type	nandc_get_chip_if, %function
 nandc_get_chip_if:
-	adrp	x1, .LANCHOR6
+	adrp	x1, .LANCHOR13
 	ubfiz	x0, x0, 8, 8
 	add	x0, x0, 2048
-	ldr	x1, [x1, #:lo12:.LANCHOR6]
+	ldr	x1, [x1, #:lo12:.LANCHOR13]
 	add	x0, x1, x0
 	ret
 	.size	nandc_get_chip_if, .-nandc_get_chip_if
@@ -1642,10 +2100,10 @@ nandc_get_chip_if:
 	.global	buf_reinit
 	.type	buf_reinit, %function
 buf_reinit:
-	adrp	x0, .LANCHOR36
-	add	x1, x0, :lo12:.LANCHOR36
+	adrp	x0, .LANCHOR43
+	add	x1, x0, :lo12:.LANCHOR43
 	mov	w2, 0
-.L272:
+.L350:
 	and	w3, w2, 255
 	strb	wzr, [x1, 2]
 	add	w4, w3, 1
@@ -1655,14 +2113,14 @@ buf_reinit:
 	str	xzr, [x1, 16]
 	cmp	w2, 32
 	add	x1, x1, 64
-	bne	.L272
-	add	x0, x0, :lo12:.LANCHOR36
+	bne	.L350
+	add	x0, x0, :lo12:.LANCHOR43
 	mov	w1, -1
 	strb	w1, [x0, 1984]
-	adrp	x0, .LANCHOR37
-	strb	wzr, [x0, #:lo12:.LANCHOR37]
-	adrp	x0, .LANCHOR38
-	strb	w2, [x0, #:lo12:.LANCHOR38]
+	adrp	x0, .LANCHOR44
+	strb	wzr, [x0, #:lo12:.LANCHOR44]
+	adrp	x0, .LANCHOR45
+	strb	w2, [x0, #:lo12:.LANCHOR45]
 	ret
 	.size	buf_reinit, .-buf_reinit
 	.section	.text.buf_add_tail,"ax",@progbits
@@ -1676,47 +2134,47 @@ buf_add_tail:
 	strb	w2, [x1]
 	ldrb	w3, [x0]
 	cmp	w3, 255
-	bne	.L282
+	bne	.L360
 	ldrb	w1, [x1, 1]
 	cmp	w1, 255
-	bne	.L276
-	adrp	x1, .LANCHOR39
+	bne	.L354
+	adrp	x1, .LANCHOR46
 	adrp	x0, .LC0
 	mov	w2, 74
-	add	x1, x1, :lo12:.LANCHOR39
+	add	x1, x1, :lo12:.LANCHOR46
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L277:
-	b	.L277
-.L276:
+.L355:
+	b	.L355
+.L354:
 	strb	w1, [x0]
-.L274:
+.L352:
 	ldp	x29, x30, [sp], 16
 	ret
-.L279:
+.L357:
 	sbfiz	x0, x0, 6, 32
 	strb	w1, [x2, x0]
-	b	.L274
-.L282:
-	adrp	x2, .LANCHOR36
-	add	x2, x2, :lo12:.LANCHOR36
-.L283:
+	b	.L352
+.L360:
+	adrp	x2, .LANCHOR43
+	add	x2, x2, :lo12:.LANCHOR43
+.L361:
 	mov	w0, w3
 	sbfiz	x3, x3, 6, 32
 	ldrb	w3, [x2, x3]
 	cmp	w3, 255
-	bne	.L283
+	bne	.L361
 	ldrb	w1, [x1, 1]
 	cmp	w1, 255
-	bne	.L279
-	adrp	x1, .LANCHOR39
+	bne	.L357
+	adrp	x1, .LANCHOR46
 	adrp	x0, .LC0
 	mov	w2, 81
-	add	x1, x1, :lo12:.LANCHOR39
+	add	x1, x1, :lo12:.LANCHOR46
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L280:
-	b	.L280
+.L358:
+	b	.L358
 	.size	buf_add_tail, .-buf_add_tail
 	.section	.text.buf_free,"ax",@progbits
 	.align	2
@@ -1724,30 +2182,30 @@ buf_add_tail:
 	.type	buf_free, %function
 buf_free:
 	ldrb	w1, [x0, 2]
-	adrp	x2, .LANCHOR37
+	adrp	x2, .LANCHOR44
 	and	w1, w1, 8
 	strb	w1, [x0, 2]
-	cbz	w1, .L286
+	cbz	w1, .L364
 	stp	x29, x30, [sp, -16]!
 	mov	x1, x0
-	add	x0, x2, :lo12:.LANCHOR37
+	add	x0, x2, :lo12:.LANCHOR44
 	add	x29, sp, 0
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR38
+	adrp	x1, .LANCHOR45
 	ldp	x29, x30, [sp], 16
-	ldrb	w0, [x1, #:lo12:.LANCHOR38]
+	ldrb	w0, [x1, #:lo12:.LANCHOR45]
 	add	w0, w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR38]
+	strb	w0, [x1, #:lo12:.LANCHOR45]
 	ret
-.L286:
-	ldrb	w1, [x2, #:lo12:.LANCHOR37]
+.L364:
+	ldrb	w1, [x2, #:lo12:.LANCHOR44]
 	strb	w1, [x0]
-	adrp	x1, .LANCHOR38
+	adrp	x1, .LANCHOR45
 	ldrb	w0, [x0, 1]
-	strb	w0, [x2, #:lo12:.LANCHOR37]
-	ldrb	w0, [x1, #:lo12:.LANCHOR38]
+	strb	w0, [x2, #:lo12:.LANCHOR44]
+	ldrb	w0, [x1, #:lo12:.LANCHOR45]
 	add	w0, w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR38]
+	strb	w0, [x1, #:lo12:.LANCHOR45]
 	ret
 	.size	buf_free, .-buf_free
 	.section	.text.buf_alloc,"ax",@progbits
@@ -1755,52 +2213,52 @@ buf_free:
 	.global	buf_alloc
 	.type	buf_alloc, %function
 buf_alloc:
-	adrp	x1, .LANCHOR38
-	ldrb	w3, [x1, #:lo12:.LANCHOR38]
-	cbnz	w3, .L293
+	adrp	x1, .LANCHOR45
+	ldrb	w3, [x1, #:lo12:.LANCHOR45]
+	cbnz	w3, .L371
 	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR40
+	adrp	x1, .LANCHOR47
 	adrp	x0, .LC0
 	mov	w2, 121
 	add	x29, sp, 0
-	add	x1, x1, :lo12:.LANCHOR40
+	add	x1, x1, :lo12:.LANCHOR47
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L294:
-	b	.L294
-.L293:
-	adrp	x6, .LANCHOR37
+.L372:
+	b	.L372
+.L371:
+	adrp	x6, .LANCHOR44
 	and	w7, w0, 255
 	mov	x5, x1
-	adrp	x1, .LANCHOR36
-	ldrb	w2, [x6, #:lo12:.LANCHOR37]
-	add	x4, x1, :lo12:.LANCHOR36
+	adrp	x1, .LANCHOR43
+	ldrb	w2, [x6, #:lo12:.LANCHOR44]
+	add	x4, x1, :lo12:.LANCHOR43
 	ubfiz	x0, x2, 6, 8
 	add	x0, x4, x0
-	cbnz	w7, .L295
+	cbnz	w7, .L373
 	cmp	w3, 1
-	beq	.L297
-.L295:
-	add	x1, x1, :lo12:.LANCHOR36
+	beq	.L375
+.L373:
+	add	x1, x1, :lo12:.LANCHOR43
 	sbfiz	x2, x2, 6, 32
 	add	x4, x1, x2
 	sub	w3, w3, #1
-	strb	w3, [x5, #:lo12:.LANCHOR38]
+	strb	w3, [x5, #:lo12:.LANCHOR45]
 	mov	w3, 1
 	ldrb	w7, [x1, x2]
 	strb	w3, [x4, 2]
 	mov	w3, -1
-	strb	w7, [x6, #:lo12:.LANCHOR37]
+	strb	w7, [x6, #:lo12:.LANCHOR44]
 	strb	w3, [x1, x2]
 	mov	w1, -1
 	strh	wzr, [x4, 50]
 	str	xzr, [x4, 16]
 	str	w1, [x4, 36]
-.L292:
+.L370:
 	ret
-.L297:
+.L375:
 	mov	x0, 0
-	b	.L292
+	b	.L370
 	.size	buf_alloc, .-buf_alloc
 	.section	.text.buf_remove_buf,"ax",@progbits
 	.align	2
@@ -1810,30 +2268,30 @@ buf_remove_buf:
 	ldrb	w4, [x1, 1]
 	ldrb	w2, [x0]
 	cmp	w4, w2
-	bne	.L304
+	bne	.L382
 	ldrb	w1, [x1]
 	strb	w1, [x0]
-.L308:
+.L386:
 	mov	w0, 1
 	ret
-.L305:
+.L383:
 	mov	w3, w2
 	sbfiz	x2, x2, 6, 32
 	ldrb	w2, [x0, x2]
 	cmp	w4, w2
-	bne	.L306
+	bne	.L384
 	sbfiz	x3, x3, 6, 32
 	ldrb	w2, [x1]
 	strb	w2, [x0, x3]
 	mov	w0, -1
 	strb	w0, [x1]
-	b	.L308
-.L304:
-	adrp	x0, .LANCHOR36
-	add	x0, x0, :lo12:.LANCHOR36
-.L306:
+	b	.L386
+.L382:
+	adrp	x0, .LANCHOR43
+	add	x0, x0, :lo12:.LANCHOR43
+.L384:
 	cmp	w2, 255
-	bne	.L305
+	bne	.L383
 	mov	w0, 0
 	ret
 	.size	buf_remove_buf, .-buf_remove_buf
@@ -1843,33 +2301,33 @@ buf_remove_buf:
 	.type	buf_remove_free, %function
 buf_remove_free:
 	stp	x29, x30, [sp, -16]!
-	adrp	x6, .LANCHOR38
+	adrp	x6, .LANCHOR45
 	mov	x5, x0
 	add	x29, sp, 0
-	ldrb	w0, [x6, #:lo12:.LANCHOR38]
-	cbnz	w0, .L310
-	adrp	x1, .LANCHOR41
+	ldrb	w0, [x6, #:lo12:.LANCHOR45]
+	cbnz	w0, .L388
+	adrp	x1, .LANCHOR48
 	adrp	x0, .LC0
 	mov	w2, 170
-	add	x1, x1, :lo12:.LANCHOR41
+	add	x1, x1, :lo12:.LANCHOR48
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L311:
-	b	.L311
-.L310:
+.L389:
+	b	.L389
+.L388:
 	mov	x1, x5
-	adrp	x0, .LANCHOR37
-	add	x0, x0, :lo12:.LANCHOR37
+	adrp	x0, .LANCHOR44
+	add	x0, x0, :lo12:.LANCHOR44
 	bl	buf_remove_buf
 	cmp	w0, 1
-	bne	.L309
-	ldrb	w0, [x6, #:lo12:.LANCHOR38]
+	bne	.L387
+	ldrb	w0, [x6, #:lo12:.LANCHOR45]
 	sub	w0, w0, #1
-	strb	w0, [x6, #:lo12:.LANCHOR38]
+	strb	w0, [x6, #:lo12:.LANCHOR45]
 	ldrb	w0, [x5, 2]
 	orr	w0, w0, 1
 	strb	w0, [x5, 2]
-.L309:
+.L387:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	buf_remove_free, .-buf_remove_free
@@ -1878,8 +2336,8 @@ buf_remove_free:
 	.global	flash_check_bad_block
 	.type	flash_check_bad_block, %function
 flash_check_bad_block:
-	adrp	x3, .LANCHOR19
-	add	x3, x3, :lo12:.LANCHOR19
+	adrp	x3, .LANCHOR26
+	add	x3, x3, :lo12:.LANCHOR26
 	and	w5, w0, 255
 	lsr	w4, w1, 5
 	and	w1, w1, 31
@@ -1892,8 +2350,8 @@ flash_check_bad_block:
 	asr	w2, w2, 5
 	lsl	w2, w2, 2
 	umaddl	x0, w2, w5, x0
-	adrp	x2, .LANCHOR5
-	ldr	x2, [x2, #:lo12:.LANCHOR5]
+	adrp	x2, .LANCHOR12
+	ldr	x2, [x2, #:lo12:.LANCHOR12]
 	add	x0, x0, x4, uxtw 2
 	ldr	w0, [x2, x0]
 	lsr	w0, w0, w1
@@ -1910,14 +2368,14 @@ flash_mask_bad_block:
 	add	x29, sp, 0
 	str	x21, [sp, 32]
 	and	w21, w0, 255
-	adrp	x0, .LANCHOR19
-	add	x0, x0, :lo12:.LANCHOR19
+	adrp	x0, .LANCHOR26
+	add	x0, x0, :lo12:.LANCHOR26
 	stp	x19, x20, [sp, 16]
 	mov	w20, w1
 	ldrh	w19, [x0, 14]
 	ldrb	w1, [x0, 13]
-	adrp	x0, .LC6
-	add	x0, x0, :lo12:.LC6
+	adrp	x0, .LC7
+	add	x0, x0, :lo12:.LC7
 	mul	w19, w19, w1
 	mov	w1, w21
 	bl	printf
@@ -1931,8 +2389,8 @@ flash_mask_bad_block:
 	umaddl	x1, w1, w21, x19
 	ldr	x21, [sp, 32]
 	add	x1, x1, x0, uxtw 2
-	adrp	x0, .LANCHOR5
-	ldr	x2, [x0, #:lo12:.LANCHOR5]
+	adrp	x0, .LANCHOR12
+	ldr	x2, [x0, #:lo12:.LANCHOR12]
 	mov	w0, 1
 	lsl	w0, w0, w20
 	ldr	w20, [x2, x1]
@@ -1953,15 +2411,15 @@ ftl_gc_write_buf:
 	orr	w1, w1, 2
 	strb	w1, [x0, 2]
 	mov	x1, x0
-	adrp	x0, .LANCHOR42
-	add	x0, x0, :lo12:.LANCHOR42
+	adrp	x0, .LANCHOR49
+	add	x0, x0, :lo12:.LANCHOR49
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR43
+	adrp	x1, .LANCHOR50
 	ldp	x29, x30, [sp], 16
-	ldrb	w0, [x1, #:lo12:.LANCHOR43]
+	ldrb	w0, [x1, #:lo12:.LANCHOR50]
 	add	w0, w0, 1
 	and	w0, w0, 255
-	strb	w0, [x1, #:lo12:.LANCHOR43]
+	strb	w0, [x1, #:lo12:.LANCHOR50]
 	ret
 	.size	ftl_gc_write_buf, .-ftl_gc_write_buf
 	.section	.text.ftl_write_buf,"ax",@progbits
@@ -1972,125 +2430,125 @@ ftl_write_buf:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	cbnz	x0, .L320
-	adrp	x1, .LANCHOR44
+	cbnz	x0, .L398
+	adrp	x1, .LANCHOR51
 	adrp	x0, .LC0
-	mov	w2, 539
-	add	x1, x1, :lo12:.LANCHOR44
+	mov	w2, 591
+	add	x1, x1, :lo12:.LANCHOR51
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L321:
-	b	.L321
-.L320:
-	adrp	x2, .LANCHOR45
+.L399:
+	b	.L399
+.L398:
+	adrp	x2, .LANCHOR52
 	ldrb	w1, [x0, 56]
 	mov	x19, x0
-	ldrb	w2, [x2, #:lo12:.LANCHOR45]
+	ldrb	w2, [x2, #:lo12:.LANCHOR52]
 	cmp	w2, w1
-	bcs	.L322
-	adrp	x1, .LANCHOR44
+	bcs	.L400
+	adrp	x1, .LANCHOR51
 	adrp	x0, .LC0
-	mov	w2, 544
-	add	x1, x1, :lo12:.LANCHOR44
+	mov	w2, 596
+	add	x1, x1, :lo12:.LANCHOR51
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L323:
-	b	.L323
-.L322:
-	adrp	x20, .LANCHOR43
-	cbnz	w1, .L324
+.L401:
+	b	.L401
+.L400:
+	adrp	x20, .LANCHOR50
+	cbnz	w1, .L402
 	bl	buf_free
-	ldrb	w0, [x20, #:lo12:.LANCHOR43]
-.L319:
+	ldrb	w0, [x20, #:lo12:.LANCHOR50]
+.L397:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L324:
+.L402:
 	mov	x1, x0
-	adrp	x0, .LANCHOR42
-	add	x0, x0, :lo12:.LANCHOR42
+	adrp	x0, .LANCHOR49
+	add	x0, x0, :lo12:.LANCHOR49
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR46
+	adrp	x1, .LANCHOR53
 	ldrb	w3, [x19, 56]
-	ldrb	w0, [x20, #:lo12:.LANCHOR43]
-	ldr	x1, [x1, #:lo12:.LANCHOR46]
+	ldrb	w0, [x20, #:lo12:.LANCHOR50]
+	ldr	x1, [x1, #:lo12:.LANCHOR53]
 	add	w0, w0, 1
 	and	w0, w0, 255
-	strb	w0, [x20, #:lo12:.LANCHOR43]
+	strb	w0, [x20, #:lo12:.LANCHOR50]
 	ldr	w2, [x1, 16]
 	add	w2, w2, w3
 	str	w2, [x1, 16]
 	ldr	w2, [x1, 32]
 	add	w2, w2, 1
 	str	w2, [x1, 32]
-	b	.L319
+	b	.L397
 	.size	ftl_write_buf, .-ftl_write_buf
-	.section	.text.ftl_cache_flush,"ax",@progbits
+	.section	.text.zftl_cache_flush,"ax",@progbits
 	.align	2
-	.global	ftl_cache_flush
-	.type	ftl_cache_flush, %function
-ftl_cache_flush:
+	.global	zftl_cache_flush
+	.type	zftl_cache_flush, %function
+zftl_cache_flush:
 	ret
-	.size	ftl_cache_flush, .-ftl_cache_flush
+	.size	zftl_cache_flush, .-zftl_cache_flush
 	.section	.text.ftl_read_buf,"ax",@progbits
 	.align	2
 	.global	ftl_read_buf
 	.type	ftl_read_buf, %function
 ftl_read_buf:
 	stp	x29, x30, [sp, -32]!
-	adrp	x2, .LANCHOR47
+	adrp	x2, .LANCHOR54
 	add	x29, sp, 0
 	str	x19, [sp, 16]
-	ldr	w2, [x2, #:lo12:.LANCHOR47]
+	ldr	w2, [x2, #:lo12:.LANCHOR54]
 	cmp	w2, w0
-	bhi	.L329
-	adrp	x1, .LANCHOR48
+	bhi	.L407
+	adrp	x1, .LANCHOR55
 	adrp	x0, .LC0
-	mov	w2, 771
-	add	x1, x1, :lo12:.LANCHOR48
+	mov	w2, 834
+	add	x1, x1, :lo12:.LANCHOR55
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L330:
-	b	.L330
-.L329:
-	adrp	x19, .LANCHOR36
-	add	x3, x19, :lo12:.LANCHOR36
+.L408:
+	b	.L408
+.L407:
+	adrp	x19, .LANCHOR43
+	add	x3, x19, :lo12:.LANCHOR43
 	add	x3, x3, 2
 	mov	w2, 0
-.L333:
+.L411:
 	ldr	w4, [x3, 34]
 	cmp	w0, w4
-	bne	.L331
+	bne	.L409
 	ldrb	w4, [x3]
-	tbz	x4, 3, .L331
-	add	x19, x19, :lo12:.LANCHOR36
+	tbz	x4, 3, .L409
+	add	x19, x19, :lo12:.LANCHOR43
 	ubfiz	x2, x2, 6, 32
 	add	x19, x19, x2
 	orr	w0, w4, 4
 	strb	w0, [x19, 2]
-	tbnz	x4, 0, .L328
+	tbnz	x4, 0, .L406
 	mov	x0, x19
 	bl	buf_remove_free
-.L328:
+.L406:
 	mov	x0, x19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L331:
+.L409:
 	add	w2, w2, 1
 	add	x3, x3, 64
 	cmp	w2, 32
-	bne	.L333
-	adrp	x2, .LANCHOR49
-	ldr	w3, [x2, #:lo12:.LANCHOR49]
+	bne	.L411
+	adrp	x2, .LANCHOR56
+	ldr	w3, [x2, #:lo12:.LANCHOR56]
 	cmn	w3, #1
-	bne	.L334
-	str	w0, [x2, #:lo12:.LANCHOR49]
-	adrp	x0, .LANCHOR50
-	str	x1, [x0, #:lo12:.LANCHOR50]
-.L334:
+	bne	.L412
+	str	w0, [x2, #:lo12:.LANCHOR56]
+	adrp	x0, .LANCHOR57
+	str	x1, [x0, #:lo12:.LANCHOR57]
+.L412:
 	mov	x19, 0
-	b	.L328
+	b	.L406
 	.size	ftl_read_buf, .-ftl_read_buf
 	.section	.text.ftl_read_buf_free,"ax",@progbits
 	.align	2
@@ -2100,36 +2558,36 @@ ftl_read_buf_free:
 	mov	x5, x0
 	stp	x29, x30, [sp, -16]!
 	mov	x1, x0
-	adrp	x0, .LANCHOR51
+	adrp	x0, .LANCHOR58
 	add	x29, sp, 0
-	add	x0, x0, :lo12:.LANCHOR51
+	add	x0, x0, :lo12:.LANCHOR58
 	bl	buf_remove_buf
 	ldrb	w0, [x5, 2]
-	tbz	x0, 1, .L341
+	tbz	x0, 1, .L419
 	and	w0, w0, -5
 	strb	w0, [x5, 2]
 	ldp	x29, x30, [sp], 16
 	ret
-.L341:
+.L419:
 	ldp	x29, x30, [sp], 16
 	mov	x0, x5
 	b	buf_free
 	.size	ftl_read_buf_free, .-ftl_read_buf_free
-	.section	.text.ftl_get_density,"ax",@progbits
+	.section	.text.zftl_get_density,"ax",@progbits
 	.align	2
-	.global	ftl_get_density
-	.type	ftl_get_density, %function
-ftl_get_density:
-	cbnz	w0, .L346
-	adrp	x0, .LANCHOR52
-	ldr	w0, [x0, #:lo12:.LANCHOR52]
+	.global	zftl_get_density
+	.type	zftl_get_density, %function
+zftl_get_density:
+	cbnz	w0, .L424
+	adrp	x0, .LANCHOR59
+	ldr	w0, [x0, #:lo12:.LANCHOR59]
 	ret
-.L346:
+.L424:
 	cmp	w0, 4
 	cset	w0, cc
 	lsl	w0, w0, 13
 	ret
-	.size	ftl_get_density, .-ftl_get_density
+	.size	zftl_get_density, .-zftl_get_density
 	.section	.text.gc_hook,"ax",@progbits
 	.align	2
 	.global	gc_hook
@@ -2142,8 +2600,8 @@ gc_hook:
 	.global	FtlGetCurEraseBlock
 	.type	FtlGetCurEraseBlock, %function
 FtlGetCurEraseBlock:
-	adrp	x0, .LANCHOR53
-	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+	adrp	x0, .LANCHOR60
+	ldrh	w0, [x0, #:lo12:.LANCHOR60]
 	ret
 	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
 	.section	.text.FtlGetAllBlockNum,"ax",@progbits
@@ -2151,8 +2609,8 @@ FtlGetCurEraseBlock:
 	.global	FtlGetAllBlockNum
 	.type	FtlGetAllBlockNum, %function
 FtlGetAllBlockNum:
-	adrp	x0, .LANCHOR54
-	ldrh	w0, [x0, #:lo12:.LANCHOR54]
+	adrp	x0, .LANCHOR2
+	ldrh	w0, [x0, #:lo12:.LANCHOR2]
 	ret
 	.size	FtlGetAllBlockNum, .-FtlGetAllBlockNum
 	.section	.text.FtlLowFormat,"ax",@progbits
@@ -2168,141 +2626,162 @@ FtlLowFormat:
 	.global	gc_add_sblk
 	.type	gc_add_sblk, %function
 gc_add_sblk:
-	stp	x29, x30, [sp, -64]!
+	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	and	w19, w0, 65535
-	adrp	x0, .LANCHOR54
+	and	w20, w0, 65535
+	adrp	x0, .LANCHOR2
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	ldrh	w0, [x0, #:lo12:.LANCHOR54]
-	cmp	w0, w19
-	bhi	.L354
-	adrp	x1, .LANCHOR55
-	adrp	x0, .LC0
-	mov	w2, 240
-	add	x1, x1, :lo12:.LANCHOR55
+	ldrh	w0, [x0, #:lo12:.LANCHOR2]
+	stp	x25, x26, [sp, 64]
+	str	x27, [sp, 80]
+	cmp	w0, w20
+	bhi	.L432
+	adrp	x1, .LANCHOR61
+	adrp	x0, .LC0
+	mov	w2, 252
+	add	x1, x1, :lo12:.LANCHOR61
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L355:
-	b	.L355
-.L354:
-	adrp	x0, .LANCHOR56
-	uxtw	x20, w19
-	and	w21, w1, 65535
+.L433:
+	b	.L433
+.L432:
+	adrp	x24, .LANCHOR4
+	uxtw	x19, w20
+	lsl	x26, x19, 1
+	adrp	x25, .LANCHOR29
+	ldr	x0, [x24, #:lo12:.LANCHOR4]
+	and	w23, w1, 65535
 	and	w22, w2, 65535
-	ldr	x0, [x0, #:lo12:.LANCHOR56]
-	adrp	x24, .LANCHOR59
-	ldrh	w23, [x0, x20, lsl 1]
-	adrp	x0, .LANCHOR22
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	tbz	x0, 8, .L356
-	ldr	x0, [x24, #:lo12:.LANCHOR59]
-	mov	w4, w23
-	mov	w2, w21
-	mov	w1, w19
-	add	x0, x0, x20, lsl 2
+	adrp	x27, .LANCHOR3
+	ldrh	w21, [x0, x26]
+	ldr	w0, [x25, #:lo12:.LANCHOR29]
+	tbz	x0, 8, .L434
+	ldr	x0, [x27, #:lo12:.LANCHOR3]
+	mov	w4, w21
+	mov	w2, w23
+	mov	w1, w20
+	add	x0, x0, x19, lsl 2
 	ldrb	w3, [x0, 2]
-	adrp	x0, .LANCHOR57
-	ldrh	w6, [x0, #:lo12:.LANCHOR57]
-	adrp	x0, .LANCHOR58+56
+	adrp	x0, .LANCHOR62
+	ldrh	w6, [x0, #:lo12:.LANCHOR62]
+	adrp	x0, .LANCHOR63+56
 	ubfx	x3, x3, 5, 3
-	ldrh	w5, [x0, #:lo12:.LANCHOR58+56]
-	adrp	x0, .LC7
-	add	x0, x0, :lo12:.LC7
+	ldrh	w5, [x0, #:lo12:.LANCHOR63+56]
+	adrp	x0, .LC8
+	add	x0, x0, :lo12:.LC8
 	bl	printf
-.L356:
-	ldr	x0, [x24, #:lo12:.LANCHOR59]
-	add	x20, x0, x20, lsl 2
-	ldrb	w0, [x20, 2]
-	tst	w0, 224
-	bne	.L357
-	cbz	w23, .L371
-	adrp	x1, .LANCHOR55
+.L434:
+	ldr	x0, [x27, #:lo12:.LANCHOR3]
+	add	x19, x0, x19, lsl 2
+	ldrb	w3, [x19, 2]
+	tst	w3, 224
+	bne	.L435
+	cbz	w21, .L450
+	adrp	x1, .LANCHOR61
 	adrp	x0, .LC0
-	mov	w2, 245
-	add	x1, x1, :lo12:.LANCHOR55
+	mov	w2, 257
+	add	x1, x1, :lo12:.LANCHOR61
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L359:
-	b	.L359
-.L357:
-	adrp	x1, .LANCHOR58
-	add	x0, x1, :lo12:.LANCHOR58
-	ldrh	w1, [x1, #:lo12:.LANCHOR58]
-	cmp	w1, w19
-	beq	.L371
-	adrp	x1, .LANCHOR60
-	ldr	x2, [x1, #:lo12:.LANCHOR60]
-	ldrh	w1, [x2, 48]
-	cmp	w1, w19
-	beq	.L371
-	ldrh	w1, [x2, 16]
-	cmp	w1, w19
-	beq	.L371
-	ldrh	w1, [x2, 80]
-	cmp	w1, w19
-	beq	.L371
-	ldrh	w3, [x0, 56]
+.L437:
+	b	.L437
+.L435:
+	adrp	x1, .LANCHOR63
+	add	x0, x1, :lo12:.LANCHOR63
+	ldrh	w1, [x1, #:lo12:.LANCHOR63]
+	cmp	w1, w20
+	beq	.L450
+	adrp	x21, .LANCHOR5
+	ldr	x1, [x21, #:lo12:.LANCHOR5]
+	ldrh	w2, [x1, 48]
+	cmp	w2, w20
+	beq	.L450
+	ldrh	w2, [x1, 16]
+	cmp	w2, w20
+	beq	.L450
+	ldrh	w2, [x1, 80]
+	cmp	w2, w20
+	beq	.L450
+	ldrh	w5, [x0, 56]
 	add	x0, x0, 58
-	mov	w1, 0
-.L360:
-	cmp	w1, w3
-	bcc	.L361
-	ubfiz	x1, x22, 7, 16
-	add	x0, x2, 392
-	add	x1, x1, 136
-	cmp	w21, 0
-	add	x1, x2, x1
-	mov	w3, 65535
-	csel	x0, x1, x0, eq
-	add	x1, x0, 128
-.L365:
-	ldrh	w4, [x0]
-	cmp	w4, w3
-	bne	.L363
-	strh	w19, [x0]
-	cbz	w21, .L364
-	ldrh	w0, [x2, 124]
+	mov	w2, 0
+.L438:
+	cmp	w2, w5
+	bcc	.L439
+	ubfiz	x19, x22, 7, 16
+	add	x0, x1, 392
+	add	x19, x19, 136
+	cmp	w23, 0
+	add	x1, x1, x19
+	csel	x19, x1, x0, eq
+	ldr	w0, [x25, #:lo12:.LANCHOR29]
+	tbz	x0, 8, .L441
+	ldr	x0, [x24, #:lo12:.LANCHOR4]
+	adrp	x1, .LANCHOR62
+	ubfx	x3, x3, 5, 3
+	mov	w2, w23
+	ldrh	w6, [x1, #:lo12:.LANCHOR62]
+	mov	w1, w20
+	ldrh	w4, [x0, x26]
+	adrp	x0, .LC8
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L441:
+	mov	x0, x19
+	add	x1, x19, 128
+	mov	w2, 65535
+.L444:
+	ldrh	w3, [x0]
+	cmp	w3, w2
+	bne	.L442
+	strh	w20, [x0]
+	cbz	w23, .L443
+	ldr	x1, [x21, #:lo12:.LANCHOR5]
+	ldrh	w0, [x1, 124]
 	add	w0, w0, 1
-	strh	w0, [x2, 124]
-.L379:
+	strh	w0, [x1, 124]
+.L461:
 	mov	w0, 1
-.L353:
+.L431:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 64
+	ldp	x25, x26, [sp, 64]
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 96
 	ret
-.L361:
+.L439:
 	ldrh	w4, [x0], 2
-	cmp	w4, w19
-	beq	.L371
-	add	w1, w1, 1
-	b	.L360
-.L364:
-	add	x2, x2, x22, uxth 1
-	ldrh	w0, [x2, 120]
+	cmp	w4, w20
+	beq	.L450
+	add	w2, w2, 1
+	b	.L438
+.L443:
+	ldr	x0, [x21, #:lo12:.LANCHOR5]
+	add	x22, x0, x22, uxth 1
+	ldrh	w0, [x22, 120]
 	add	w0, w0, 1
-	strh	w0, [x2, 120]
-	b	.L379
-.L363:
+	strh	w0, [x22, 120]
+	b	.L461
+.L442:
 	add	x0, x0, 2
-	cmp	x1, x0
-	bne	.L365
-	b	.L379
-.L371:
+	cmp	x0, x1
+	bne	.L444
+	b	.L461
+.L450:
 	mov	w0, 0
-	b	.L353
+	b	.L431
 	.size	gc_add_sblk, .-gc_add_sblk
 	.section	.text.gc_get_src_ppa_from_index,"ax",@progbits
 	.align	2
 	.global	gc_get_src_ppa_from_index
 	.type	gc_get_src_ppa_from_index, %function
 gc_get_src_ppa_from_index:
-	adrp	x1, .LANCHOR61
+	adrp	x1, .LANCHOR64
 	ubfiz	x0, x0, 2, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR61]
+	ldr	x1, [x1, #:lo12:.LANCHOR64]
 	ldr	w0, [x1, x0]
 	ret
 	.size	gc_get_src_ppa_from_index, .-gc_get_src_ppa_from_index
@@ -2314,18 +2793,18 @@ gc_write_completed:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR36
+	adrp	x23, .LANCHOR43
 	stp	x21, x22, [sp, 32]
-	add	x24, x23, :lo12:.LANCHOR36
-	adrp	x22, .LANCHOR62
-	add	x22, x22, :lo12:.LANCHOR62
+	add	x24, x23, :lo12:.LANCHOR43
+	adrp	x22, .LANCHOR65
+	add	x22, x22, :lo12:.LANCHOR65
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-.L382:
+.L464:
 	ldrb	w19, [x22]
 	cmp	w19, 255
-	bne	.L395
+	bne	.L477
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -2333,107 +2812,107 @@ gc_write_completed:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L395:
+.L477:
 	lsl	x1, x19, 6
-	add	x0, x23, :lo12:.LANCHOR36
+	add	x0, x23, :lo12:.LANCHOR43
 	add	x2, x0, x1
 	ldrb	w0, [x0, x1]
 	ldr	w1, [x2, 52]
 	strb	w0, [x22]
 	ldrh	w26, [x2, 48]
-	cbz	w1, .L383
+	cbz	w1, .L465
 	ldr	w2, [x2, 40]
-	adrp	x0, .LANCHOR58
-	add	x0, x0, :lo12:.LANCHOR58
+	adrp	x0, .LANCHOR63
+	add	x0, x0, :lo12:.LANCHOR63
 	mov	w3, 1
 	str	w2, [x0, 320]
 	strh	w3, [x0, 318]
-	adrp	x0, .LC8
-	add	x0, x0, :lo12:.LC8
+	adrp	x0, .LC9
+	add	x0, x0, :lo12:.LC9
 	bl	printf
-	adrp	x1, .LANCHOR63
+	adrp	x1, .LANCHOR66
 	adrp	x0, .LC0
-	mov	w2, 502
-	add	x1, x1, :lo12:.LANCHOR63
+	mov	w2, 519
+	add	x1, x1, :lo12:.LANCHOR66
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L384:
-	b	.L384
-.L383:
-	adrp	x0, .LANCHOR64
+.L466:
+	b	.L466
+.L465:
+	adrp	x0, .LANCHOR67
 	mov	x28, x0
-	ldrb	w1, [x0, #:lo12:.LANCHOR64]
+	ldrb	w1, [x0, #:lo12:.LANCHOR67]
 	cmp	w1, 3
-	bne	.L396
-	adrp	x0, .LANCHOR60
-	ldr	x0, [x0, #:lo12:.LANCHOR60]
+	bne	.L478
+	adrp	x0, .LANCHOR5
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	ldrb	w20, [x0, 89]
 	add	w20, w20, w20, lsl 1
 	and	w20, w20, 1023
-.L385:
-	adrp	x0, .LANCHOR22
-	adrp	x27, .LANCHOR65
+.L467:
+	adrp	x0, .LANCHOR29
+	adrp	x27, .LANCHOR68
 	and	x21, x26, 65535
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	tbz	x0, 8, .L386
-	ldr	x1, [x27, #:lo12:.LANCHOR65]
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 8, .L468
+	ldr	x1, [x27, #:lo12:.LANCHOR68]
 	add	x0, x24, x19, lsl 6
 	mov	w3, w26
 	ldrb	w2, [x0, 1]
-	adrp	x0, .LC9
+	adrp	x0, .LC10
 	ldrb	w4, [x1, x21]
-	add	x0, x0, :lo12:.LC9
+	add	x0, x0, :lo12:.LC10
 	mov	w1, w26
 	bl	printf
-.L386:
-	ldr	x0, [x27, #:lo12:.LANCHOR65]
+.L468:
+	ldr	x0, [x27, #:lo12:.LANCHOR68]
 	add	x19, x24, x19, lsl 6
 	mov	x25, x21
 	add	x2, x0, x21
 	ldrb	w1, [x0, x21]
 	ldrb	w0, [x19, 1]
 	cmp	w1, w0
-	beq	.L387
-	adrp	x1, .LANCHOR63
+	beq	.L469
+	adrp	x1, .LANCHOR66
 	adrp	x0, .LC0
-	mov	w2, 509
-	add	x1, x1, :lo12:.LANCHOR63
+	mov	w2, 526
+	add	x1, x1, :lo12:.LANCHOR66
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L388:
-	b	.L388
-.L396:
+.L470:
+	b	.L470
+.L478:
 	mov	w20, 1
-	b	.L385
-.L387:
+	b	.L467
+.L469:
 	ldrb	w0, [x19, 61]
 	cmp	w0, 3
-	beq	.L389
-	ldrb	w0, [x28, #:lo12:.LANCHOR64]
+	beq	.L471
+	ldrb	w0, [x28, #:lo12:.LANCHOR67]
 	cmp	w0, 3
-	bne	.L389
-	adrp	x0, .LANCHOR66
-	ldrb	w0, [x0, #:lo12:.LANCHOR66]
-	cbnz	w0, .L389
+	bne	.L471
+	adrp	x0, .LANCHOR69
+	ldrb	w0, [x0, #:lo12:.LANCHOR69]
+	cbnz	w0, .L471
 	mov	x0, 0
-.L390:
+.L472:
 	cmp	w20, w0, uxth
-	bls	.L382
+	bls	.L464
 	ldrb	w1, [x2, x0]
 	add	x0, x0, 1
 	add	x1, x24, x1, lsl 6
 	strb	wzr, [x1, 61]
-	b	.L390
-.L389:
-	adrp	x19, .LANCHOR58
-	add	x19, x19, :lo12:.LANCHOR58
+	b	.L472
+.L471:
+	adrp	x19, .LANCHOR63
+	add	x19, x19, :lo12:.LANCHOR63
 	add	x20, x21, x20, uxth
 	mov	w21, -1
 	strh	w26, [x19, 316]
-.L391:
+.L473:
 	cmp	x25, x20
-	beq	.L382
-	ldr	x1, [x27, #:lo12:.LANCHOR65]
+	beq	.L464
+	ldr	x1, [x27, #:lo12:.LANCHOR68]
 	ldrb	w0, [x1, x25]
 	strb	w21, [x1, x25]
 	add	x25, x25, 1
@@ -2446,56 +2925,56 @@ gc_write_completed:
 	ldrb	w0, [x19, 7]
 	sub	w0, w0, #1
 	strb	w0, [x19, 7]
-	b	.L391
+	b	.L473
 	.size	gc_write_completed, .-gc_write_completed
 	.section	.text.gc_get_src_blk,"ax",@progbits
 	.align	2
 	.global	gc_get_src_blk
 	.type	gc_get_src_blk, %function
 gc_get_src_blk:
-	adrp	x0, .LANCHOR60
-	ldr	x2, [x0, #:lo12:.LANCHOR60]
-	adrp	x0, .LANCHOR67
-	ldrb	w3, [x0, #:lo12:.LANCHOR67]
+	adrp	x0, .LANCHOR5
+	ldr	x2, [x0, #:lo12:.LANCHOR5]
+	adrp	x0, .LANCHOR70
+	ldrb	w3, [x0, #:lo12:.LANCHOR70]
 	ldrh	w0, [x2, 124]
-	cbz	w0, .L405
+	cbz	w0, .L487
 	add	x1, x2, 392
 	mov	w4, 1
-.L406:
+.L488:
 	add	x5, x1, 128
 	mov	w6, 65535
-.L410:
+.L492:
 	ldrh	w0, [x1]
 	cmp	w0, w6
-	beq	.L408
+	beq	.L490
 	mov	w5, -1
 	strh	w5, [x1]
-	cbz	w4, .L409
+	cbz	w4, .L491
 	ldrh	w1, [x2, 124]
 	sub	w1, w1, #1
 	strh	w1, [x2, 124]
 	ret
-.L405:
+.L487:
 	add	x0, x2, x3, sxtw 1
 	ldrh	w0, [x0, 120]
-	cbz	w0, .L411
+	cbz	w0, .L493
 	ubfiz	x1, x3, 7, 8
 	mov	w4, 0
 	add	x1, x1, 136
 	add	x1, x2, x1
-	b	.L406
-.L409:
+	b	.L488
+.L491:
 	add	x2, x2, x3, uxtb 1
 	ldrh	w1, [x2, 120]
 	sub	w1, w1, #1
 	strh	w1, [x2, 120]
 	ret
-.L408:
+.L490:
 	add	x1, x1, 2
 	cmp	x1, x5
-	bne	.L410
+	bne	.L492
 	ret
-.L411:
+.L493:
 	mov	w0, 65535
 	ret
 	.size	gc_get_src_blk, .-gc_get_src_blk
@@ -2507,362 +2986,971 @@ gc_free_temp_buf:
 	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR58
-	add	x0, x20, :lo12:.LANCHOR58
+	adrp	x20, .LANCHOR63
+	add	x0, x20, :lo12:.LANCHOR63
 	stp	x21, x22, [sp, 32]
 	ldrb	w1, [x0, 7]
-	cbz	w1, .L420
-	adrp	x1, .LANCHOR38
-	ldrb	w1, [x1, #:lo12:.LANCHOR38]
+	cbz	w1, .L502
+	adrp	x1, .LANCHOR45
+	ldrb	w1, [x1, #:lo12:.LANCHOR45]
 	cmp	w1, 1
-	bhi	.L420
+	bhi	.L502
 	ldrh	w19, [x0, 316]
-	adrp	x2, .LANCHOR69
-	adrp	x0, .LANCHOR68
-	adrp	x21, .LANCHOR65
-	ldrb	w2, [x2, #:lo12:.LANCHOR69]
+	adrp	x2, .LANCHOR72
+	adrp	x0, .LANCHOR71
+	adrp	x21, .LANCHOR68
+	ldrb	w2, [x2, #:lo12:.LANCHOR72]
 	add	w1, w19, 24
-	ldrh	w0, [x0, #:lo12:.LANCHOR68]
-	ldr	x4, [x21, #:lo12:.LANCHOR65]
+	ldrh	w0, [x0, #:lo12:.LANCHOR71]
+	ldr	x4, [x21, #:lo12:.LANCHOR68]
 	mul	w0, w0, w2
 	cmp	w0, w1
 	csel	w1, w0, w1, ls
-	adrp	x0, .LANCHOR36
-	add	x0, x0, :lo12:.LANCHOR36
-.L415:
+	adrp	x0, .LANCHOR43
+	add	x0, x0, :lo12:.LANCHOR43
+.L497:
 	cmp	w19, w1
-	bcc	.L418
-.L420:
+	bcc	.L500
+.L502:
 	mov	w0, 0
-	b	.L413
-.L418:
+	b	.L495
+.L500:
 	uxtw	x22, w19
 	ldrb	w2, [x4, x22]
 	cmp	w2, 255
-	beq	.L416
+	beq	.L498
 	sbfiz	x3, x2, 6, 32
 	add	x3, x0, x3
 	ldrb	w3, [x3, 61]
-	cbnz	w3, .L416
+	cbnz	w3, .L498
 	ubfiz	x2, x2, 6, 8
 	add	x0, x0, x2
 	bl	buf_free
-	adrp	x0, .LANCHOR22
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	tbz	x0, 8, .L417
-	ldr	x0, [x21, #:lo12:.LANCHOR65]
+	adrp	x0, .LANCHOR29
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 8, .L499
+	ldr	x0, [x21, #:lo12:.LANCHOR68]
 	mov	w1, w19
 	ldrb	w2, [x0, x22]
-	adrp	x0, .LC10
-	add	x0, x0, :lo12:.LC10
+	adrp	x0, .LC11
+	add	x0, x0, :lo12:.LC11
 	bl	printf
-.L417:
-	ldr	x0, [x21, #:lo12:.LANCHOR65]
-	add	x20, x20, :lo12:.LANCHOR58
+.L499:
+	ldr	x0, [x21, #:lo12:.LANCHOR68]
+	add	x20, x20, :lo12:.LANCHOR63
 	mov	w1, -1
 	strb	w1, [x0, x22]
 	ldrb	w0, [x20, 7]
 	sub	w0, w0, #1
 	strb	w0, [x20, 7]
 	mov	w0, 1
-.L413:
+.L495:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L416:
+.L498:
 	add	w19, w19, 1
-	b	.L415
+	b	.L497
 	.size	gc_free_temp_buf, .-gc_free_temp_buf
-	.section	.text.gc_static_wearleveling,"ax",@progbits
+	.section	.text.print_gc_debug_info,"ax",@progbits
 	.align	2
-	.global	gc_static_wearleveling
-	.type	gc_static_wearleveling, %function
-gc_static_wearleveling:
-	stp	x29, x30, [sp, -80]!
+	.global	print_gc_debug_info
+	.type	print_gc_debug_info, %function
+print_gc_debug_info:
+	adrp	x2, .LANCHOR73
+	adrp	x1, .LANCHOR63
+	add	x0, x1, :lo12:.LANCHOR63
+	ldrh	w6, [x2, #:lo12:.LANCHOR73]
+	adrp	x2, .LANCHOR45
+	ldrh	w1, [x1, #:lo12:.LANCHOR63]
+	ldrb	w5, [x0, 7]
+	ldrb	w4, [x2, #:lo12:.LANCHOR45]
+	ldrh	w3, [x0, 314]
+	ldrh	w2, [x0, 2]
+	adrp	x0, .LC12
+	add	x0, x0, :lo12:.LC12
+	b	printf
+	.size	print_gc_debug_info, .-print_gc_debug_info
+	.section	.text.zftl_get_gc_node,"ax",@progbits
+	.align	2
+	.global	zftl_get_gc_node
+	.type	zftl_get_gc_node, %function
+zftl_get_gc_node:
+	and	w1, w1, 65535
+	and	w0, w0, 65535
+	cmp	w1, 5
+	bne	.L512
+	mov	w1, w0
+	adrp	x0, .LANCHOR74
+	ldr	x0, [x0, #:lo12:.LANCHOR74]
+.L514:
+	b	_list_get_gc_head_node.isra.2
+.L512:
+	cmp	w1, 2
+	mov	w1, w0
+	bne	.L513
+	adrp	x0, .LANCHOR75
+	ldr	x0, [x0, #:lo12:.LANCHOR75]
+	b	.L514
+.L513:
+	adrp	x0, .LANCHOR76
+	ldr	x0, [x0, #:lo12:.LANCHOR76]
+	b	.L514
+	.size	zftl_get_gc_node, .-zftl_get_gc_node
+	.section	.text.gc_search_src_blk,"ax",@progbits
+	.align	2
+	.global	gc_search_src_blk
+	.type	gc_search_src_blk, %function
+gc_search_src_blk:
+	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR46
+	and	w21, w0, 255
+	and	w0, w1, 255
 	stp	x19, x20, [sp, 16]
-	ldr	x5, [x21, #:lo12:.LANCHOR46]
+	str	w0, [x29, 112]
+	adrp	x0, .LANCHOR5
 	stp	x23, x24, [sp, 48]
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	stp	x25, x26, [sp, 64]
-	ldr	w0, [x5, 32]
-	cmp	w0, 20480
-	bls	.L429
-	ldr	w1, [x5, 36]
-	add	w1, w1, w0, lsr 10
-	and	w0, w0, 1023
-	stp	w0, w1, [x5, 32]
-.L429:
-	adrp	x0, .LANCHOR60
-	ldr	w3, [x5, 36]
-	ldr	x0, [x0, #:lo12:.LANCHOR60]
-	ldr	w1, [x0, 568]
-	ldr	w2, [x0, 12]
-	add	w1, w1, 12959744
-	add	w1, w1, 256
-	cmp	w2, w1
-	bhi	.L430
-	ldr	w1, [x0, 572]
-	add	w1, w1, 128
-	cmp	w3, w1
-	bls	.L428
-.L430:
-	adrp	x23, .LANCHOR59
-	ldrh	w10, [x5, 134]
-	adrp	x22, .LANCHOR54
-	mov	w20, 65535
-	ldr	x8, [x23, #:lo12:.LANCHOR59]
-	mov	w19, w20
-	ldrh	w11, [x22, #:lo12:.LANCHOR54]
-	mov	w12, w20
-	str	w2, [x0, 568]
-	mov	w4, 0
-	add	x8, x8, x10, uxth 2
-	str	w3, [x0, 572]
-	mov	w1, 0
+	stp	x27, x28, [sp, 80]
+	add	x0, x0, x21, sxtw 1
+	ldrh	w19, [x0, 120]
+	cbz	w19, .L516
+	mov	w0, w19
+.L515:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+.L516:
+	and	w20, w2, 255
+	cbnz	w21, .L518
+	adrp	x24, .LANCHOR77
+	adrp	x26, .LANCHOR29
+	adrp	x27, .LC13
+	and	w23, w20, 65535
+	add	x26, x26, :lo12:.LANCHOR29
+	add	x27, x27, :lo12:.LC13
+	strh	wzr, [x24, #:lo12:.LANCHOR77]
+	mov	w22, 0
 	mov	w25, 0
-	mov	w24, 0
-	mov	w3, 0
+.L519:
+	cmp	w25, w23
+	bcs	.L524
+	ldrh	w6, [x24, #:lo12:.LANCHOR77]
+	add	x7, x24, :lo12:.LANCHOR77
+	mov	w1, 3
+	mov	w0, w6
+	bl	zftl_get_gc_node
+	add	w2, w6, 1
+	and	w2, w2, 65535
+	strh	w2, [x24, #:lo12:.LANCHOR77]
+	and	w1, w0, 65535
+	mov	w0, 65535
+	mov	w28, w1
+	cmp	w1, w0
+	beq	.L520
+	ldr	w0, [x26]
+	adrp	x6, .LANCHOR4
+	uxtw	x4, w1
+	tbz	x0, 8, .L521
+	ldr	x0, [x6, #:lo12:.LANCHOR4]
+	stp	x6, x4, [x29, 96]
+	ldrh	w3, [x0, x4, lsl 1]
+	mov	x0, x27
+	bl	printf
+	ldp	x6, x4, [x29, 96]
+.L521:
+	ldr	x0, [x6, #:lo12:.LANCHOR4]
+	ldrh	w1, [x0, x4, lsl 1]
+	adrp	x0, .LANCHOR62
+	ldrh	w0, [x0, #:lo12:.LANCHOR62]
+	cmp	w1, w0
+	bcs	.L522
 	mov	w2, 0
-.L432:
-	cmp	w10, w11
-	bcc	.L436
-	ldrh	w0, [x5, 96]
-	cmp	w0, w25
-	bcs	.L437
-	strh	w25, [x5, 96]
-.L437:
-	ldrh	w0, [x5, 98]
-	cmp	w0, w24
-	bcs	.L438
-	strh	w24, [x5, 98]
-.L438:
-	udiv	w3, w3, w1
-	adrp	x0, .LANCHOR22
-	mov	x26, x0
-	udiv	w4, w4, w2
-	strh	w3, [x5, 88]
-	strh	w4, [x5, 90]
-	ldr	w5, [x0, #:lo12:.LANCHOR22]
-	tbz	x5, 8, .L439
-	adrp	x0, .LC11
-	and	w4, w4, 65535
-	and	w3, w3, 65535
-	add	x0, x0, :lo12:.LC11
-	bl	printf
-.L439:
-	ldr	w0, [x26, #:lo12:.LANCHOR22]
-	tbz	x0, 8, .L440
-	adrp	x0, .LC12
-	mov	w4, w24
-	mov	w3, w25
-	mov	w2, w19
-	mov	w1, w20
-	add	x0, x0, :lo12:.LC12
+	mov	w1, 0
+	mov	w0, w28
+	bl	gc_add_sblk
+	cbz	w0, .L523
+	add	w5, w22, 1
+	and	w22, w5, 65535
+	cmp	w23, w22
+	bcs	.L523
+.L524:
+	ldr	x0, [x29, 112]
+	tbz	x0, 1, .L526
+	adrp	x25, .LANCHOR79
+	adrp	x28, .LANCHOR78
+	add	x27, x25, :lo12:.LANCHOR79
+	add	x28, x28, :lo12:.LANCHOR78
+	mov	w26, 65535
+.L527:
+	cmp	w19, w23
+	beq	.L531
+	ldrh	w6, [x28]
+	mov	w1, 5
+	mov	w0, w6
+	bl	zftl_get_gc_node
+	add	w6, w6, 1
+	strh	w6, [x28]
+	and	w1, w0, 65535
+	cmp	w1, w26
+	beq	.L528
+	adrp	x2, .LANCHOR4
+	ubfiz	x1, x1, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR4]
+	ldrh	w2, [x2, x1]
+	ldrh	w1, [x27]
+	cmp	w2, w1
+	bcs	.L529
+	mov	w2, 0
+	mov	w1, 0
+	bl	gc_add_sblk
+	cbz	w0, .L530
+	add	w5, w22, 1
+	and	w22, w5, 65535
+	cmp	w23, w22
+	bcs	.L530
+.L531:
+	ldrh	w1, [x25, #:lo12:.LANCHOR79]
+	cmp	w22, w23
+	adrp	x0, .LANCHOR80
+	bcs	.L533
+	ldrh	w3, [x0, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR72
+	ldrb	w0, [x0, #:lo12:.LANCHOR72]
+	lsr	w2, w3, 3
+	mul	w0, w0, w3
+	sub	w0, w0, w2
+	cmp	w1, w0
+	bge	.L526
+	add	w1, w1, w2
+	strh	w1, [x25, #:lo12:.LANCHOR79]
+.L526:
+	ldr	x0, [x29, 112]
+	tbz	x0, 0, .L534
+	cmp	w22, w23
+	bcs	.L534
+	adrp	x25, .LANCHOR81
+	add	x25, x25, :lo12:.LANCHOR81
+	mov	w24, 64
+	adrp	x26, .LANCHOR75
+	mov	w27, 65535
+.L539:
+	ldrh	w6, [x25]
+	ldr	x0, [x26, #:lo12:.LANCHOR75]
+	mov	w1, w6
+	bl	_list_get_gc_head_node.isra.2
+	add	w6, w6, 1
+	strh	w6, [x25]
+	cmp	w27, w0, uxth
+	beq	.L535
+	mov	w2, 0
+	mov	w1, 0
+	bl	gc_add_sblk
+	cbz	w0, .L536
+	add	w5, w22, 1
+	and	w22, w5, 65535
+	cmp	w23, w22
+	bhi	.L536
+.L537:
+	adrp	x1, .LANCHOR62
+	adrp	x2, .LANCHOR80
+	ldrh	w0, [x1, #:lo12:.LANCHOR62]
+	ldrh	w2, [x2, #:lo12:.LANCHOR80]
+	cmp	w0, w2, lsr 1
+	bls	.L534
+	sub	w0, w0, #8
+	b	.L613
+.L522:
+	strh	wzr, [x24, #:lo12:.LANCHOR77]
+	b	.L524
+.L520:
+	strh	wzr, [x7]
+	b	.L524
+.L523:
+	add	w25, w25, 1
+	and	w25, w25, 65535
+	b	.L519
+.L529:
+	strh	wzr, [x28]
+	b	.L531
+.L528:
+	strh	wzr, [x24, #:lo12:.LANCHOR77]
+	b	.L531
+.L530:
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L527
+.L533:
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	cmp	w1, w0
+	bls	.L526
+	sub	w0, w1, w0, lsr 3
+	strh	w0, [x25, #:lo12:.LANCHOR79]
+	b	.L526
+.L535:
+	strh	wzr, [x25]
+.L538:
+	cmp	w22, w23
+	bcs	.L537
+	adrp	x1, .LANCHOR62
+	adrp	x2, .LANCHOR80
+	ldrh	w0, [x1, #:lo12:.LANCHOR62]
+	ldrh	w2, [x2, #:lo12:.LANCHOR80]
+	cmp	w2, w0
+	bls	.L534
+	add	w0, w0, 8
+.L613:
+	strh	w0, [x1, #:lo12:.LANCHOR62]
+.L534:
+	adrp	x0, .LANCHOR29
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 8, .L561
+	ldr	w2, [x29, 112]
+	adrp	x0, .LC14
+	mov	w4, w20
+	mov	w3, w22
+	mov	w1, w21
+	add	x0, x0, :lo12:.LC14
 	bl	printf
-.L440:
-	sub	w0, w24, w19
-	cmp	w0, 64
-	bgt	.L441
-.L447:
-	cbnz	w19, .L442
-.L448:
-	cbz	w20, .L428
-	ldr	x2, [x21, #:lo12:.LANCHOR46]
-	ldr	x1, [x23, #:lo12:.LANCHOR59]
-	ldrh	w5, [x22, #:lo12:.LANCHOR54]
-	ldrh	w0, [x2, 134]
-	add	x1, x1, x0, uxth 2
-.L453:
-	cmp	w0, w5
-	bcc	.L455
-	ldrh	w0, [x2, 74]
-	add	w0, w20, w0
-	strh	w0, [x2, 74]
-	ldrh	w0, [x2, 96]
-	cmp	w20, w0
-	bcs	.L428
-	sub	w20, w0, w20
-	strh	w20, [x2, 96]
-.L428:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
-	ret
-.L436:
-	ldrb	w0, [x8, 2]
-	tbz	x0, 3, .L433
-	ldr	w0, [x8]
-	ldrh	w7, [x8]
-	ubfx	x0, x0, 11, 8
-	and	w6, w7, 2047
-.L434:
-	cmp	w6, w20
-	add	w1, w1, 1
-	csel	w20, w6, w20, cc
-	cmp	w6, w25
-	add	w3, w3, w6
-	csel	w6, w6, w25, hi
-	and	w1, w1, 65535
-	and	w20, w20, 65535
-	and	w25, w6, 65535
-	cmp	w0, w12
-	bne	.L456
-	b	.L457
-.L433:
-	tst	w0, 24
-	bne	.L435
-	ldrh	w7, [x8]
-	mov	w0, 65535
-	and	w6, w7, 2047
-	b	.L434
-.L435:
-	ldr	w0, [x8]
-	ubfx	x0, x0, 11, 8
-.L456:
-	cmp	w0, w19
-	add	w2, w2, 1
-	csel	w19, w0, w19, cc
-	cmp	w0, w24
-	add	w4, w4, w0
-	csel	w0, w0, w24, hi
-	and	w2, w2, 65535
+.L561:
+	mov	w0, w22
+	b	.L515
+.L536:
+	sub	w24, w24, #1
+	ands	w24, w24, 65535
+	bne	.L539
+	b	.L538
+.L518:
+	ldr	w0, [x29, 112]
+	adrp	x3, .LANCHOR81
+	and	w0, w0, 1
+	str	w0, [x29, 104]
+	ldr	x0, [x29, 112]
+	strh	wzr, [x3, #:lo12:.LANCHOR81]
+	tbz	x0, 0, .L563
+	adrp	x23, .LANCHOR82
+	adrp	x24, .LANCHOR83
+	ldrh	w0, [x23, #:lo12:.LANCHOR82]
+	ldrh	w1, [x24, #:lo12:.LANCHOR83]
+	cmp	w0, w1, lsr 1
+	bcc	.L564
+	adrp	x1, .LANCHOR84
+	mov	w22, 0
+	ldrh	w1, [x1, #:lo12:.LANCHOR84]
+	cmp	w1, w0
+	bls	.L542
+.L611:
+	add	x26, x3, :lo12:.LANCHOR81
+	and	w28, w20, 65535
+	mov	w25, 64
+	mov	w27, 65535
+.L545:
+	adrp	x0, .LANCHOR75
+	ldrh	w6, [x26]
+	ldr	x0, [x0, #:lo12:.LANCHOR75]
+	mov	w1, w6
+	bl	_list_get_gc_head_node.isra.2
+	add	w6, w6, 1
+	strh	w6, [x26]
+	cmp	w27, w0, uxth
+	beq	.L543
+	mov	w2, w21
+	mov	w1, 0
+	bl	gc_add_sblk
+	cbz	w0, .L544
+	add	w5, w22, 1
+	and	w22, w5, 65535
+	cmp	w22, w28
+	bcc	.L544
+.L542:
+	ldrh	w1, [x24, #:lo12:.LANCHOR83]
+	ldrh	w0, [x23, #:lo12:.LANCHOR82]
+	cmp	w0, w1, lsr 1
+	bls	.L540
+	adrp	x24, .LANCHOR77
+	and	w27, w20, 65535
+	mov	w23, 64
+	mov	w26, 65535
+	strh	wzr, [x24, #:lo12:.LANCHOR77]
+	add	x24, x24, :lo12:.LANCHOR77
+.L547:
+	ldrh	w6, [x24]
+	mov	w1, 3
+	mov	w0, w6
+	bl	zftl_get_gc_node
+	add	w6, w6, 1
+	strh	w6, [x24]
+	cmp	w26, w0, uxth
+	beq	.L540
+	mov	w2, w21
+	mov	w1, 0
+	bl	gc_add_sblk
+	cbz	w0, .L546
+	add	w5, w22, 1
+	and	w22, w5, 65535
+	cmp	w22, w27
+	bcs	.L540
+.L546:
+	sub	w23, w23, #1
+	ands	w23, w23, 65535
+	bne	.L547
+.L540:
+	ldr	x0, [x29, 112]
+	tbz	x0, 1, .L548
+	adrp	x28, .LANCHOR78
+	adrp	x24, .LANCHOR85
+	add	x27, x24, :lo12:.LANCHOR85
+	mov	w23, 64
+	strh	wzr, [x28, #:lo12:.LANCHOR78]
+	add	x28, x28, :lo12:.LANCHOR78
+	mov	w25, 65535
+	adrp	x26, .LANCHOR4
+.L553:
+	ldrh	w6, [x28]
+	mov	w1, 5
+	mov	w0, w6
+	bl	zftl_get_gc_node
+	add	w6, w6, 1
+	strh	w6, [x28]
+	and	w1, w0, 65535
+	cmp	w1, w25
+	beq	.L549
+	ldr	x2, [x26, #:lo12:.LANCHOR4]
+	ubfiz	x1, x1, 1, 16
+	ldrh	w2, [x2, x1]
+	ldrh	w1, [x27]
+	cmp	w2, w1
+	bcs	.L550
+	mov	w2, w21
+	mov	w1, 0
+	bl	gc_add_sblk
+	cbz	w0, .L551
+	add	w5, w22, 1
+	add	w19, w19, 1
+	and	w22, w5, 65535
 	and	w19, w19, 65535
-	and	w24, w0, 65535
-.L457:
-	add	w10, w10, 1
-	add	x8, x8, 4
-	and	w10, w10, 65535
-	b	.L432
-.L441:
-	ldr	x0, [x21, #:lo12:.LANCHOR46]
-	add	x25, x22, :lo12:.LANCHOR54
-	ldrh	w24, [x0, 134]
-.L444:
+	cmp	w22, w20
+	bcc	.L551
+.L552:
+	cmp	w22, w20
+	adrp	x4, .LANCHOR80
+	adrp	x2, .LANCHOR72
+	bcc	.L554
+	cbnz	w19, .L555
+	adrp	x0, .LANCHOR86
+	ldrh	w1, [x0, #:lo12:.LANCHOR86]
+	adrp	x0, .LANCHOR87
+	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	cmp	w1, w0
+	bls	.L555
+.L554:
+	adrp	x1, .LANCHOR71
+	ldrb	w2, [x2, #:lo12:.LANCHOR72]
+	ldrh	w0, [x24, #:lo12:.LANCHOR85]
+	ldrh	w1, [x1, #:lo12:.LANCHOR71]
+	mul	w2, w1, w2
+	ldrh	w1, [x4, #:lo12:.LANCHOR80]
+	sub	w1, w2, w1, lsr 3
+	cmp	w0, w1
+	bge	.L548
+	add	w0, w0, 4
+.L612:
+	strh	w0, [x24, #:lo12:.LANCHOR85]
+.L548:
+	ldr	w0, [x29, 104]
+	cbz	w0, .L534
+	adrp	x25, .LANCHOR78
+	adrp	x23, .LANCHOR88
+	add	x28, x23, :lo12:.LANCHOR88
+	mov	w24, 64
+	strh	wzr, [x25, #:lo12:.LANCHOR78]
+	add	x25, x25, :lo12:.LANCHOR78
+	mov	w26, 65535
+	adrp	x27, .LANCHOR4
+.L559:
 	ldrh	w0, [x25]
-	cmp	w0, w24
-	bls	.L447
-	ldr	x2, [x23, #:lo12:.LANCHOR59]
-	ubfiz	x1, x24, 2, 16
-	add	x0, x2, x1
-	ldrb	w0, [x0, 2]
-	tst	w0, 192
-	beq	.L445
-	and	w3, w0, 224
-	cmp	w3, 224
-	beq	.L445
-	tbz	x0, 4, .L445
-	ldr	w0, [x2, x1]
-	ubfx	x0, x0, 11, 8
-	cmp	w0, w19
-	bhi	.L445
-	mov	w2, 1
-	mov	w0, w24
-	mov	w1, w2
+	mov	w1, 3
+	bl	zftl_get_gc_node
+	and	w1, w0, 65535
+	cmp	w1, w26
+	beq	.L556
+	ldr	x2, [x27, #:lo12:.LANCHOR4]
+	ubfiz	x1, x1, 1, 16
+	ldrh	w1, [x2, x1]
+	ldrh	w2, [x28]
+	cmp	w2, w1
+	bls	.L557
+	cmp	w1, 2
+	bhi	.L558
+.L557:
+	mov	w2, w21
+	mov	w1, 0
 	bl	gc_add_sblk
-.L445:
-	add	w24, w24, 1
-	and	w24, w24, 65535
-	b	.L444
-.L442:
-	ldr	x2, [x21, #:lo12:.LANCHOR46]
-	ldr	x1, [x23, #:lo12:.LANCHOR59]
-	ldrh	w5, [x22, #:lo12:.LANCHOR54]
-	ldrh	w0, [x2, 134]
-	add	x1, x1, x0, uxth 2
-.L449:
-	cmp	w0, w5
-	bcc	.L451
-	ldrh	w0, [x2, 72]
-	add	w0, w19, w0
-	strh	w0, [x2, 72]
-	ldrh	w0, [x2, 98]
-	cmp	w19, w0
-	bcs	.L448
-	sub	w19, w0, w19
-	strh	w19, [x2, 98]
-	b	.L448
-.L451:
-	ldr	w3, [x1]
-	ubfx	x4, x3, 11, 8
-	cmp	w19, w4
-	bhi	.L450
-	sub	w4, w4, w19
-	bfi	w3, w4, 11, 8
-	str	w3, [x1]
-.L450:
-	add	w0, w0, 1
-	add	x1, x1, 4
-	and	w0, w0, 65535
-	b	.L449
-.L455:
-	ldrh	w3, [x1]
-	and	w4, w3, 2047
-	cmp	w4, w20
-	blt	.L454
-	sub	w4, w4, w20
-	bfi	w3, w4, 0, 11
-	strh	w3, [x1]
-.L454:
-	add	w0, w0, 1
-	add	x1, x1, 4
-	and	w0, w0, 65535
-	b	.L453
-	.size	gc_static_wearleveling, .-gc_static_wearleveling
-	.section	.text.print_gc_debug_info,"ax",@progbits
+	cbz	w0, .L558
+	add	w5, w22, 1
+	and	w22, w5, 65535
+	cmp	w22, w20
+	bcs	.L556
+.L558:
+	sub	w24, w24, #1
+	ands	w24, w24, 65535
+	bne	.L559
+.L556:
+	cmp	w22, w20
+	adrp	x2, .LANCHOR80
+	bcs	.L560
+	ldrh	w0, [x23, #:lo12:.LANCHOR88]
+	ldrh	w1, [x2, #:lo12:.LANCHOR80]
+	cmp	w0, w1, lsr 1
+	bls	.L534
+	sub	w0, w0, #4
+	strh	w0, [x23, #:lo12:.LANCHOR88]
+	b	.L534
+.L564:
+	mov	w22, 0
+	b	.L611
+.L543:
+	strh	wzr, [x26]
+	b	.L542
+.L544:
+	sub	w4, w25, #1
+	ands	w25, w4, 65535
+	bne	.L545
+	b	.L542
+.L563:
+	mov	w22, 0
+	b	.L540
+.L550:
+	strh	wzr, [x28]
+	b	.L552
+.L549:
+	adrp	x0, .LANCHOR77
+	strh	wzr, [x0, #:lo12:.LANCHOR77]
+	b	.L552
+.L551:
+	sub	w23, w23, #1
+	ands	w23, w23, 65535
+	bne	.L553
+	b	.L552
+.L555:
+	ldrh	w1, [x4, #:lo12:.LANCHOR80]
+	ldrb	w2, [x2, #:lo12:.LANCHOR72]
+	ldrh	w0, [x24, #:lo12:.LANCHOR85]
+	mul	w1, w1, w2
+	cmp	w0, w1
+	ble	.L548
+	sub	w0, w0, #4
+	b	.L612
+.L560:
+	ldrh	w0, [x2, #:lo12:.LANCHOR80]
+	adrp	x2, .LANCHOR72
+	ldrh	w1, [x23, #:lo12:.LANCHOR88]
+	ldrb	w2, [x2, #:lo12:.LANCHOR72]
+	mul	w0, w0, w2
+	sub	w0, w0, #32
+	cmp	w1, w0
+	bge	.L534
+	add	w1, w1, 4
+	strh	w1, [x23, #:lo12:.LANCHOR88]
+	b	.L534
+	.size	gc_search_src_blk, .-gc_search_src_blk
+	.section	.text.zftl_insert_free_list,"ax",@progbits
 	.align	2
-	.global	print_gc_debug_info
-	.type	print_gc_debug_info, %function
-print_gc_debug_info:
-	adrp	x1, .LANCHOR58
-	add	x0, x1, :lo12:.LANCHOR58
-	adrp	x2, .LANCHOR38
-	ldrh	w1, [x1, #:lo12:.LANCHOR58]
-	ldrb	w5, [x0, 7]
-	ldrb	w4, [x2, #:lo12:.LANCHOR38]
-	ldrh	w3, [x0, 314]
-	ldrh	w2, [x0, 2]
-	adrp	x0, .LC13
-	add	x0, x0, :lo12:.LC13
-	b	printf
-	.size	print_gc_debug_info, .-print_gc_debug_info
-	.section	.text.ftl_get_blk_list_in_sblk,"ax",@progbits
+	.global	zftl_insert_free_list
+	.type	zftl_insert_free_list, %function
+zftl_insert_free_list:
+	and	w1, w0, 65535
+	adrp	x0, .LANCHOR3
+	ldr	x0, [x0, #:lo12:.LANCHOR3]
+	add	x0, x0, x1, uxth 2
+	ldrb	w0, [x0, 2]
+	ands	w0, w0, 24
+	bne	.L615
+	adrp	x2, .LANCHOR89
+	adrp	x0, .LANCHOR90
+	add	x2, x2, :lo12:.LANCHOR89
+	add	x0, x0, :lo12:.LANCHOR90
+.L617:
+	b	_insert_free_list
+.L615:
+	cmp	w0, 16
+	bne	.L616
+	adrp	x2, .LANCHOR91
+	adrp	x0, .LANCHOR92
+	add	x2, x2, :lo12:.LANCHOR91
+	add	x0, x0, :lo12:.LANCHOR92
+	b	.L617
+.L616:
+	adrp	x2, .LANCHOR93
+	adrp	x0, .LANCHOR94
+	add	x2, x2, :lo12:.LANCHOR93
+	add	x0, x0, :lo12:.LANCHOR94
+	b	.L617
+	.size	zftl_insert_free_list, .-zftl_insert_free_list
+	.section	.text.zftl_insert_data_list,"ax",@progbits
 	.align	2
-	.global	ftl_get_blk_list_in_sblk
-	.type	ftl_get_blk_list_in_sblk, %function
-ftl_get_blk_list_in_sblk:
-	adrp	x2, .LANCHOR59
-	and	w0, w0, 65535
-	adrp	x6, .LANCHOR71
-	add	x6, x6, :lo12:.LANCHOR71
-	ldr	x2, [x2, #:lo12:.LANCHOR59]
-	mov	w3, 0
-	mov	w12, 21
-	add	x2, x2, x0, uxth 2
-	ldrb	w11, [x2, 3]
-	adrp	x2, .LANCHOR69
-	ldrb	w8, [x2, #:lo12:.LANCHOR69]
-	adrp	x2, .LANCHOR70
-	ldrb	w5, [x2, #:lo12:.LANCHOR70]
-	mul	w0, w0, w5
-	and	w4, w0, 65535
-	mov	w0, 0
-.L479:
+	.global	zftl_insert_data_list
+	.type	zftl_insert_data_list, %function
+zftl_insert_data_list:
+	and	w1, w0, 65535
+	adrp	x0, .LANCHOR3
+	ldr	x0, [x0, #:lo12:.LANCHOR3]
+	add	x0, x0, x1, uxth 2
+	ldrb	w2, [x0, 2]
+	and	w2, w2, 224
+	cmp	w2, 64
+	bne	.L619
+	adrp	x2, .LANCHOR84
+	adrp	x0, .LANCHOR75
+	add	x2, x2, :lo12:.LANCHOR84
+	add	x0, x0, :lo12:.LANCHOR75
+.L622:
+	b	_insert_data_list
+.L619:
+	cmp	w2, 96
+	bne	.L620
+	adrp	x2, .LANCHOR82
+	adrp	x0, .LANCHOR76
+	add	x2, x2, :lo12:.LANCHOR82
+	add	x0, x0, :lo12:.LANCHOR76
+	b	.L622
+.L620:
+	cmp	w2, 160
+	bne	.L618
+	adrp	x2, .LANCHOR86
+	adrp	x0, .LANCHOR74
+	add	x2, x2, :lo12:.LANCHOR86
+	add	x0, x0, :lo12:.LANCHOR74
+	b	.L622
+.L618:
+	ret
+	.size	zftl_insert_data_list, .-zftl_insert_data_list
+	.section	.text.zftl_get_free_sblk,"ax",@progbits
+	.align	2
+	.global	zftl_get_free_sblk
+	.type	zftl_get_free_sblk, %function
+zftl_get_free_sblk:
+	stp	x29, x30, [sp, -48]!
+	and	w0, w0, 65535
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR93
+	str	x21, [sp, 32]
+	and	w21, w1, 65535
+	cmp	w21, 5
+	bne	.L624
+	adrp	x1, .LANCHOR91
+	add	x2, x1, :lo12:.LANCHOR91
+	ldrh	w3, [x1, #:lo12:.LANCHOR91]
+	ldrh	w1, [x20, #:lo12:.LANCHOR93]
+	cmp	w3, w1
+	bls	.L625
+	mov	w1, w0
+	adrp	x0, .LANCHOR92
+	add	x0, x0, :lo12:.LANCHOR92
+.L629:
+	bl	_list_pop_index_node
+	and	w19, w0, 65535
+	mov	w0, 65535
+	cmp	w19, w0
+	bne	.L627
+	adrp	x0, .LANCHOR89
+	ldrh	w5, [x20, #:lo12:.LANCHOR93]
+	mov	w2, w21
+	mov	w1, w19
+	ldrh	w4, [x0, #:lo12:.LANCHOR89]
+	adrp	x0, .LANCHOR90
+	ldr	x3, [x0, #:lo12:.LANCHOR90]
+	adrp	x0, .LC15
+	add	x0, x0, :lo12:.LC15
+	bl	printf
+.L627:
+	mov	w0, w19
+	ldr	x21, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+.L625:
+	mov	w1, w0
+	add	x2, x20, :lo12:.LANCHOR93
+	adrp	x0, .LANCHOR94
+	add	x0, x0, :lo12:.LANCHOR94
+	b	.L629
+.L624:
+	adrp	x1, .LANCHOR89
+	add	x2, x1, :lo12:.LANCHOR89
+	ldrh	w3, [x1, #:lo12:.LANCHOR89]
+	ldrh	w1, [x20, #:lo12:.LANCHOR93]
+	cmp	w3, w1
+	bls	.L625
+	mov	w1, w0
+	adrp	x0, .LANCHOR90
+	add	x0, x0, :lo12:.LANCHOR90
+	b	.L629
+	.size	zftl_get_free_sblk, .-zftl_get_free_sblk
+	.section	.text.zftl_remove_data_node,"ax",@progbits
+	.align	2
+	.global	zftl_remove_data_node
+	.type	zftl_remove_data_node, %function
+zftl_remove_data_node:
+	and	w1, w0, 65535
+	adrp	x0, .LANCHOR3
+	ldr	x0, [x0, #:lo12:.LANCHOR3]
+	add	x0, x0, x1, uxth 2
+	ldrb	w2, [x0, 2]
+	and	w2, w2, 224
+	cmp	w2, 64
+	bne	.L631
+	adrp	x2, .LANCHOR84
+	adrp	x0, .LANCHOR75
+	add	x2, x2, :lo12:.LANCHOR84
+	add	x0, x0, :lo12:.LANCHOR75
+.L634:
+	b	_list_remove_node
+.L631:
+	cmp	w2, 96
+	bne	.L632
+	adrp	x2, .LANCHOR82
+	adrp	x0, .LANCHOR76
+	add	x2, x2, :lo12:.LANCHOR82
+	add	x0, x0, :lo12:.LANCHOR76
+	b	.L634
+.L632:
+	cmp	w2, 160
+	bne	.L630
+	adrp	x2, .LANCHOR86
+	adrp	x0, .LANCHOR74
+	add	x2, x2, :lo12:.LANCHOR86
+	add	x0, x0, :lo12:.LANCHOR74
+	b	.L634
+.L630:
+	ret
+	.size	zftl_remove_data_node, .-zftl_remove_data_node
+	.section	.text.zftl_remove_free_node,"ax",@progbits
+	.align	2
+	.global	zftl_remove_free_node
+	.type	zftl_remove_free_node, %function
+zftl_remove_free_node:
+	and	w1, w0, 65535
+	adrp	x0, .LANCHOR3
+	ldr	x0, [x0, #:lo12:.LANCHOR3]
+	add	x0, x0, x1, uxth 2
+	ldrb	w0, [x0, 2]
+	ands	w0, w0, 24
+	bne	.L636
+	adrp	x2, .LANCHOR89
+	adrp	x0, .LANCHOR90
+	add	x2, x2, :lo12:.LANCHOR89
+	add	x0, x0, :lo12:.LANCHOR90
+.L638:
+	b	_list_remove_node
+.L636:
+	cmp	w0, 16
+	bne	.L637
+	adrp	x2, .LANCHOR91
+	adrp	x0, .LANCHOR92
+	add	x2, x2, :lo12:.LANCHOR91
+	add	x0, x0, :lo12:.LANCHOR92
+	b	.L638
+.L637:
+	adrp	x2, .LANCHOR93
+	adrp	x0, .LANCHOR94
+	add	x2, x2, :lo12:.LANCHOR93
+	add	x0, x0, :lo12:.LANCHOR94
+	b	.L638
+	.size	zftl_remove_free_node, .-zftl_remove_free_node
+	.section	.text.zftl_list_update_data_list,"ax",@progbits
+	.align	2
+	.global	zftl_list_update_data_list
+	.type	zftl_list_update_data_list, %function
+zftl_list_update_data_list:
+	and	w1, w0, 65535
+	adrp	x0, .LANCHOR3
+	ldr	x0, [x0, #:lo12:.LANCHOR3]
+	add	x0, x0, x1, uxth 2
+	ldrb	w2, [x0, 2]
+	and	w2, w2, 224
+	cmp	w2, 64
+	bne	.L640
+	adrp	x2, .LANCHOR84
+	adrp	x0, .LANCHOR75
+	add	x2, x2, :lo12:.LANCHOR84
+	add	x0, x0, :lo12:.LANCHOR75
+.L643:
+	b	_list_update_data_list
+.L640:
+	cmp	w2, 96
+	bne	.L641
+	adrp	x2, .LANCHOR82
+	adrp	x0, .LANCHOR76
+	add	x2, x2, :lo12:.LANCHOR82
+	add	x0, x0, :lo12:.LANCHOR76
+	b	.L643
+.L641:
+	cmp	w2, 160
+	bne	.L639
+	adrp	x2, .LANCHOR86
+	adrp	x0, .LANCHOR74
+	add	x2, x2, :lo12:.LANCHOR86
+	add	x0, x0, :lo12:.LANCHOR74
+	b	.L643
+.L639:
+	ret
+	.size	zftl_list_update_data_list, .-zftl_list_update_data_list
+	.section	.text.print_list_info,"ax",@progbits
+	.align	2
+	.global	print_list_info
+	.type	print_list_info, %function
+print_list_info:
+	sub	sp, sp, #112
+	stp	x29, x30, [sp, 32]
+	add	x29, sp, 32
+	ldrh	w2, [x1]
+	ldr	x1, [x0]
+	stp	x19, x20, [sp, 48]
+	mov	x19, x0
+	stp	x21, x22, [sp, 64]
+	adrp	x0, .LC16
+	stp	x23, x24, [sp, 80]
+	add	x0, x0, :lo12:.LC16
+	str	x25, [sp, 96]
+	bl	printf
+	ldr	x19, [x19]
+	cbz	x19, .L644
+	mov	x23, -6148914691236517206
+	adrp	x21, .LC17
+	add	x21, x21, :lo12:.LC17
+	mov	w20, 0
+	adrp	x22, .LANCHOR0
+	movk	x23, 0xaaab, lsl 0
+	adrp	x24, .LANCHOR3
+	adrp	x25, .LANCHOR4
+.L651:
+	ldr	x2, [x22, #:lo12:.LANCHOR0]
+	ldr	x1, [x24, #:lo12:.LANCHOR3]
+	sub	x2, x19, x2
+	ldr	x8, [x25, #:lo12:.LANCHOR4]
+	asr	x2, x2, 1
+	ldrh	w5, [x19, 4]
+	ldrh	w4, [x19, 2]
+	mul	x2, x2, x23
+	and	x7, x2, 65535
+	and	w2, w2, 65535
+	lsl	x0, x7, 2
+	add	x3, x1, x0
+	ldrh	w7, [x8, x7, lsl 1]
+	ldrb	w6, [x3, 2]
+	ldrh	w3, [x19]
+	str	w7, [sp, 16]
+	ldrh	w7, [x1, x0]
+	and	w7, w7, 2047
+	str	w7, [sp, 8]
+	ubfx	x7, x6, 3, 2
+	ubfx	x6, x6, 5, 3
+	ldr	w0, [x1, x0]
+	mov	w1, w20
+	ubfx	x0, x0, 11, 8
+	str	w0, [sp]
+	mov	x0, x21
+	bl	printf
+	ldrh	w19, [x19]
+	mov	w0, 65535
+	cmp	w19, w0
+	beq	.L644
+	ldr	x0, [x22, #:lo12:.LANCHOR0]
+	mov	w1, 6
+	add	w20, w20, 1
+	cmp	w20, 33
+	umaddl	x19, w19, w1, x0
+	bne	.L651
+.L644:
+	ldp	x19, x20, [sp, 48]
+	ldp	x21, x22, [sp, 64]
+	ldp	x23, x24, [sp, 80]
+	ldp	x29, x30, [sp, 32]
+	ldr	x25, [sp, 96]
+	add	sp, sp, 112
+	ret
+	.size	print_list_info, .-print_list_info
+	.section	.text.dump_all_list_info,"ax",@progbits
+	.align	2
+	.global	dump_all_list_info
+	.type	dump_all_list_info, %function
+dump_all_list_info:
+	stp	x29, x30, [sp, -16]!
+	adrp	x1, .LANCHOR89
+	adrp	x0, .LANCHOR90
+	add	x1, x1, :lo12:.LANCHOR89
+	add	x29, sp, 0
+	add	x0, x0, :lo12:.LANCHOR90
+	bl	print_list_info
+	adrp	x1, .LANCHOR91
+	adrp	x0, .LANCHOR92
+	add	x1, x1, :lo12:.LANCHOR91
+	add	x0, x0, :lo12:.LANCHOR92
+	bl	print_list_info
+	adrp	x1, .LANCHOR93
+	adrp	x0, .LANCHOR94
+	add	x1, x1, :lo12:.LANCHOR93
+	add	x0, x0, :lo12:.LANCHOR94
+	bl	print_list_info
+	adrp	x1, .LANCHOR84
+	adrp	x0, .LANCHOR75
+	add	x1, x1, :lo12:.LANCHOR84
+	add	x0, x0, :lo12:.LANCHOR75
+	bl	print_list_info
+	adrp	x1, .LANCHOR82
+	adrp	x0, .LANCHOR76
+	add	x1, x1, :lo12:.LANCHOR82
+	add	x0, x0, :lo12:.LANCHOR76
+	bl	print_list_info
+	ldp	x29, x30, [sp], 16
+	adrp	x1, .LANCHOR86
+	adrp	x0, .LANCHOR74
+	add	x1, x1, :lo12:.LANCHOR86
+	add	x0, x0, :lo12:.LANCHOR74
+	b	print_list_info
+	.size	dump_all_list_info, .-dump_all_list_info
+	.section	.text.ftl_get_blk_list_in_sblk,"ax",@progbits
+	.align	2
+	.global	ftl_get_blk_list_in_sblk
+	.type	ftl_get_blk_list_in_sblk, %function
+ftl_get_blk_list_in_sblk:
+	adrp	x2, .LANCHOR3
+	and	w0, w0, 65535
+	adrp	x6, .LANCHOR96
+	add	x6, x6, :lo12:.LANCHOR96
+	ldr	x2, [x2, #:lo12:.LANCHOR3]
+	mov	w3, 0
+	mov	w12, 21
+	add	x2, x2, x0, uxth 2
+	ldrb	w11, [x2, 3]
+	adrp	x2, .LANCHOR72
+	ldrb	w8, [x2, #:lo12:.LANCHOR72]
+	adrp	x2, .LANCHOR95
+	ldrb	w5, [x2, #:lo12:.LANCHOR95]
+	mul	w0, w0, w5
+	and	w4, w0, 65535
+	mov	w0, 0
+.L656:
 	cmp	w3, w8
-	blt	.L483
+	blt	.L660
 	sxtw	x2, w0
 	mov	w3, -1
-.L484:
+.L661:
 	cmp	w8, w2
-	bgt	.L485
+	bgt	.L662
 	ret
-.L483:
+.L660:
 	asr	w2, w11, w3
-	tbnz	x2, 0, .L480
+	tbnz	x2, 0, .L657
 	sdiv	w2, w3, w5
 	ldrh	w7, [x6]
 	sbfiz	x10, x0, 1, 32
@@ -2871,266 +3959,47 @@ ftl_get_blk_list_in_sblk:
 	lsl	w2, w2, w7
 	add	w2, w4, w2
 	and	w2, w2, 65535
-	bhi	.L481
-.L486:
+	bhi	.L658
+.L663:
 	add	w0, w0, 1
 	strh	w2, [x1, x10]
-.L480:
+.L657:
 	add	w3, w3, 1
-	b	.L479
-.L481:
+	b	.L656
+.L658:
 	and	w7, w3, 1
 	add	w2, w2, w7
-	b	.L486
-.L485:
+	b	.L663
+.L662:
 	strh	w3, [x1, x2, lsl 1]
 	add	x2, x2, 1
-	b	.L484
+	b	.L661
 	.size	ftl_get_blk_list_in_sblk, .-ftl_get_blk_list_in_sblk
-	.section	.text.ftl_alloc_sblk,"ax",@progbits
-	.align	2
-	.global	ftl_alloc_sblk
-	.type	ftl_alloc_sblk, %function
-ftl_alloc_sblk:
-.L488:
-	stp	x29, x30, [sp, -64]!
-	mov	w6, 2
-	mov	w7, 0
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	w20, w0
-	adrp	x0, .LANCHOR54
-	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR46
-	cmp	w20, 5
-	ldrh	w11, [x0, #:lo12:.LANCHOR54]
-	adrp	x0, .LANCHOR59
-	ldr	x1, [x22, #:lo12:.LANCHOR46]
-	mov	w19, 65535
-	ldr	x12, [x0, #:lo12:.LANCHOR59]
-	mov	w14, w11
-	str	x23, [sp, 48]
-	mov	w5, w19
-	csel	w23, wzr, w6, ne
-	mov	w13, w19
-	csel	w6, w6, wzr, ne
-.L503:
-	ldrh	w4, [x1, 132]
-	mov	w0, w4
-	add	x3, x12, x4, uxth 2
-.L489:
-	cmp	w0, w14
-	blt	.L501
-	sub	w0, w0, w4
-	add	w0, w7, w0
-	and	w7, w0, 65535
-	ldrh	w0, [x1, 134]
-	sub	w2, w11, w0
-	cmp	w7, w2
-	blt	.L502
-	cmp	w19, w13
-	beq	.L502
-	add	x21, x12, x19, uxth 2
-	b	.L493
-.L501:
-	ldrb	w2, [x3, 2]
-	mov	x21, x3
-	tst	w2, 224
-	bne	.L490
-	ubfx	x2, x2, 3, 2
-	cmp	w6, w2
-	beq	.L490
-	cbz	w23, .L491
-	ldr	w2, [x3]
-	ldrh	w10, [x1, 72]
-	ldrh	w8, [x1, 90]
-	ubfx	x2, x2, 11, 8
-	add	w8, w8, 1
-	add	w10, w10, w2
-	cmp	w10, w8
-	ble	.L492
-	and	w2, w2, 65535
-	cmp	w5, w2
-	bls	.L490
-	and	w19, w0, 65535
-	mov	w5, w2
-.L490:
-	add	w0, w0, 1
-	add	x3, x3, 4
-	b	.L489
-.L491:
-	ldrh	w2, [x3]
-	ldrh	w10, [x1, 74]
-	ldrh	w8, [x1, 88]
-	and	w2, w2, 2047
-	add	w10, w10, w2
-	add	w8, w8, 1
-	cmp	w10, w8
-	ble	.L492
-	cmp	w2, w5
-	bge	.L490
-	mov	w5, w2
-	and	w19, w0, 65535
-	b	.L490
-.L492:
-	and	w19, w0, 65535
-.L493:
-	adrp	x0, .LANCHOR22
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	tbz	x0, 12, .L494
-	ldrb	w4, [x21, 3]
-	adrp	x0, .LC14
-	ldrb	w3, [x21, 2]
-	mov	w2, w20
-	mov	w1, w19
-	add	x0, x0, :lo12:.LC14
-	ubfx	x3, x3, 5, 3
-	bl	printf
-.L494:
-	ldrb	w0, [x21, 2]
-	bfi	w0, w20, 5, 3
-	ubfx	x1, x0, 3, 2
-	orr	w1, w1, w23
-	bfi	w0, w1, 3, 2
-	strb	w0, [x21, 2]
-	ldr	x0, [x22, #:lo12:.LANCHOR46]
-	strh	w19, [x0, 132]
-	tbz	x1, 0, .L495
-	ldrh	w1, [x0, 116]
-	sub	w1, w1, #1
-	strh	w1, [x0, 116]
-.L496:
-	cmp	w20, 5
-	bne	.L498
-	ldrh	w1, [x0, 120]
-	add	w1, w1, 1
-	strh	w1, [x0, 120]
-.L506:
-	mov	w0, w19
-	ldr	x23, [sp, 48]
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 64
-	ret
-.L495:
-	ldrb	w1, [x21, 2]
-	tst	w1, 24
-	bne	.L497
-	ldrh	w1, [x0, 114]
-	sub	w1, w1, #1
-	strh	w1, [x0, 114]
-	b	.L496
-.L497:
-	ldrh	w1, [x0, 118]
-	sub	w1, w1, #1
-	strh	w1, [x0, 118]
-	b	.L496
-.L498:
-	cmp	w20, 2
-	bne	.L500
-	ldrh	w1, [x0, 122]
-	add	w1, w1, 1
-	strh	w1, [x0, 122]
-	b	.L506
-.L500:
-	cmp	w20, 3
-	bne	.L506
-	ldrh	w1, [x0, 124]
-	add	w1, w1, 1
-	strh	w1, [x0, 124]
-	b	.L506
-.L502:
-	strh	w0, [x1, 132]
-	mov	w14, w4
-	b	.L503
-	.size	ftl_alloc_sblk, .-ftl_alloc_sblk
 	.section	.text.ftl_free_sblk,"ax",@progbits
 	.align	2
 	.global	ftl_free_sblk
 	.type	ftl_free_sblk, %function
 ftl_free_sblk:
-	stp	x29, x30, [sp, -16]!
-	and	x0, x0, 65535
-	mov	w1, 65535
-	cmp	w0, w1
+	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
-	bne	.L511
-	adrp	x1, .LANCHOR72
-	adrp	x0, .LC0
-	mov	w2, 313
-	add	x1, x1, :lo12:.LANCHOR72
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L512:
-	b	.L512
-.L511:
-	adrp	x1, .LANCHOR59
-	ldr	x3, [x1, #:lo12:.LANCHOR59]
-	add	x3, x3, x0, lsl 2
-	ldrb	w1, [x3, 2]
-	ands	w4, w1, 224
-	bne	.L513
-	adrp	x1, .LANCHOR72
-	adrp	x0, .LC0
-	mov	w2, 316
-	add	x1, x1, :lo12:.LANCHOR72
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L514:
-	b	.L514
-.L513:
-	ubfx	x2, x1, 3, 2
-	cmp	w4, 160
-	adrp	x1, .LANCHOR46
-	bne	.L515
-	ldr	x5, [x1, #:lo12:.LANCHOR46]
-	ldrh	w4, [x5, 120]
-	sub	w4, w4, #1
-	strh	w4, [x5, 120]
-.L516:
-	tbz	x2, 0, .L518
-	ldr	x2, [x1, #:lo12:.LANCHOR46]
-	ldrh	w1, [x2, 116]
-	add	w1, w1, 1
-	strh	w1, [x2, 116]
-.L519:
-	ldrb	w1, [x3, 2]
+	str	x19, [sp, 16]
+	and	x19, x0, 65535
+	mov	w0, w19
+	bl	zftl_remove_data_node
+	mov	w0, w19
+	bl	zftl_insert_free_list
+	adrp	x0, .LANCHOR3
+	ldr	x0, [x0, #:lo12:.LANCHOR3]
+	add	x0, x0, x19, lsl 2
+	ldrb	w1, [x0, 2]
 	and	w1, w1, 31
-	strb	w1, [x3, 2]
-	adrp	x1, .LANCHOR56
-	ldr	x1, [x1, #:lo12:.LANCHOR56]
-	strh	wzr, [x1, x0, lsl 1]
-	ldp	x29, x30, [sp], 16
+	strb	w1, [x0, 2]
+	adrp	x0, .LANCHOR4
+	ldr	x0, [x0, #:lo12:.LANCHOR4]
+	strh	wzr, [x0, x19, lsl 1]
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
 	ret
-.L515:
-	cmp	w4, 64
-	bne	.L517
-	ldr	x5, [x1, #:lo12:.LANCHOR46]
-	ldrh	w4, [x5, 122]
-	sub	w4, w4, #1
-	strh	w4, [x5, 122]
-	b	.L516
-.L517:
-	cmp	w4, 96
-	bne	.L516
-	ldr	x5, [x1, #:lo12:.LANCHOR46]
-	ldrh	w4, [x5, 124]
-	sub	w4, w4, #1
-	strh	w4, [x5, 124]
-	b	.L516
-.L518:
-	cbnz	w2, .L520
-	ldr	x2, [x1, #:lo12:.LANCHOR46]
-	ldrh	w1, [x2, 114]
-	add	w1, w1, 1
-	strh	w1, [x2, 114]
-	b	.L519
-.L520:
-	ldr	x2, [x1, #:lo12:.LANCHOR46]
-	ldrh	w1, [x2, 118]
-	add	w1, w1, 1
-	strh	w1, [x2, 118]
-	b	.L519
 	.size	ftl_free_sblk, .-ftl_free_sblk
 	.section	.text.gc_free_src_blk,"ax",@progbits
 	.align	2
@@ -3140,20 +4009,20 @@ gc_free_src_blk:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR58
+	adrp	x21, .LANCHOR63
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LC15
-	adrp	x23, .LANCHOR56
-	add	x21, x21, :lo12:.LANCHOR58
+	adrp	x22, .LC18
+	adrp	x23, .LANCHOR4
+	add	x21, x21, :lo12:.LANCHOR63
 	mov	x24, x23
-	add	x22, x22, :lo12:.LC15
+	add	x22, x22, :lo12:.LC18
 	stp	x19, x20, [sp, 16]
 	mov	w20, 0
 	stp	x25, x26, [sp, 64]
-.L523:
+.L667:
 	ldrh	w0, [x21, 56]
 	cmp	w0, w20
-	bhi	.L539
+	bhi	.L683
 	strh	wzr, [x21, 56]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -3161,123 +4030,123 @@ gc_free_src_blk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L539:
+.L683:
 	add	x0, x21, x20, sxtw 1
 	ldrh	w25, [x0, 58]
-	ldr	x0, [x23, #:lo12:.LANCHOR56]
+	ldr	x0, [x23, #:lo12:.LANCHOR4]
 	mov	x19, x25
 	lsl	x26, x25, 1
 	ldrh	w2, [x0, x26]
-	cbz	w2, .L524
+	cbz	w2, .L668
 	mov	w1, w25
 	mov	x0, x22
 	bl	printf
-.L524:
-	ldr	x0, [x24, #:lo12:.LANCHOR56]
+.L668:
+	ldr	x0, [x24, #:lo12:.LANCHOR4]
 	ldrh	w0, [x0, x26]
-	cbnz	w0, .L525
-	adrp	x0, .LANCHOR59
-	ldr	x0, [x0, #:lo12:.LANCHOR59]
+	cbnz	w0, .L669
+	adrp	x0, .LANCHOR3
+	ldr	x0, [x0, #:lo12:.LANCHOR3]
 	add	x25, x0, x25, lsl 2
-	adrp	x0, .LANCHOR22
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	tbz	x0, 8, .L526
+	adrp	x0, .LANCHOR29
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 8, .L670
 	ldrb	w2, [x25, 2]
-	adrp	x0, .LC16
+	adrp	x0, .LC19
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC16
+	add	x0, x0, :lo12:.LC19
 	ubfx	x2, x2, 5, 3
 	bl	printf
-.L526:
+.L670:
 	ldrb	w0, [x25, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L527
+	beq	.L671
 	tst	w0, 192
-	bne	.L528
-.L527:
-	adrp	x1, .LANCHOR73
+	bne	.L672
+.L671:
+	adrp	x1, .LANCHOR97
 	adrp	x0, .LC0
-	mov	w2, 753
-	add	x1, x1, :lo12:.LANCHOR73
+	mov	w2, 770
+	add	x1, x1, :lo12:.LANCHOR97
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L529:
-	b	.L529
-.L528:
+.L673:
+	b	.L673
+.L672:
 	mov	w0, w19
 	bl	ftl_free_sblk
-	adrp	x0, .LANCHOR60
-	ldr	x0, [x0, #:lo12:.LANCHOR60]
+	adrp	x0, .LANCHOR5
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	ldrh	w2, [x0, 124]
-	cbz	w2, .L530
+	cbz	w2, .L674
 	add	x3, x0, 392
 	mov	w1, 0
-.L532:
+.L676:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L531
+	bne	.L675
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 392]
 	strh	w2, [x0, 124]
-.L530:
+.L674:
 	ldrh	w2, [x0, 120]
-	cbz	w2, .L533
+	cbz	w2, .L677
 	add	x3, x0, 136
 	mov	w1, 0
-.L535:
+.L679:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L534
+	bne	.L678
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 136]
 	strh	w2, [x0, 120]
-.L533:
+.L677:
 	ldrh	w2, [x0, 122]
-	cbz	w2, .L536
+	cbz	w2, .L680
 	add	x3, x0, 264
 	mov	w1, 0
-.L538:
+.L682:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L537
+	bne	.L681
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 264]
 	strh	w2, [x0, 122]
-.L536:
+.L680:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L523
-.L531:
+	b	.L667
+.L675:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L532
-	b	.L530
-.L534:
+	bne	.L676
+	b	.L674
+.L678:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L535
-	b	.L533
-.L537:
+	bne	.L679
+	b	.L677
+.L681:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L538
-	b	.L536
-.L525:
+	bne	.L682
+	b	.L680
+.L669:
 	mov	w2, 0
 	mov	w1, 1
 	mov	w0, w19
 	bl	gc_add_sblk
-	b	.L536
+	b	.L680
 	.size	gc_free_src_blk, .-gc_free_src_blk
 	.section	.text.ftl_erase_phy_blk,"ax",@progbits
 	.align	2
@@ -3289,29 +4158,29 @@ ftl_erase_phy_blk:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	mov	w21, w1
-	adrp	x1, .LANCHOR71
+	adrp	x1, .LANCHOR96
 	stp	x19, x20, [sp, 16]
 	mov	w19, 21
-	adrp	x22, .LANCHOR75
-	ldrh	w1, [x1, #:lo12:.LANCHOR71]
+	adrp	x22, .LANCHOR99
+	ldrh	w1, [x1, #:lo12:.LANCHOR96]
 	sub	w1, w19, w1
 	mov	w19, 1
 	lsl	w19, w19, w1
 	sub	w19, w19, #1
 	and	w19, w19, w0
 	asr	w20, w0, w1
-	adrp	x0, .LANCHOR74
+	adrp	x0, .LANCHOR98
 	sxth	w19, w19
-	ldrb	w0, [x0, #:lo12:.LANCHOR74]
-	cbz	w0, .L563
-	ldrh	w2, [x22, #:lo12:.LANCHOR75]
+	ldrb	w0, [x0, #:lo12:.LANCHOR98]
+	cbz	w0, .L707
+	ldrh	w2, [x22, #:lo12:.LANCHOR99]
 	cmp	w21, 0
 	cset	w1, eq
 	mov	w0, w20
 	mul	w2, w2, w19
 	bl	flash_erase_block_en
-.L563:
-	ldrh	w2, [x22, #:lo12:.LANCHOR75]
+.L707:
+	ldrh	w2, [x22, #:lo12:.LANCHOR99]
 	mov	w1, w21
 	mov	w0, w20
 	ldp	x21, x22, [sp, 32]
@@ -3328,102 +4197,102 @@ ftl_erase_sblk:
 	stp	x29, x30, [sp, -160]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR59
+	adrp	x21, .LANCHOR3
 	stp	x25, x26, [sp, 64]
 	and	w25, w0, 65535
-	ldr	x0, [x21, #:lo12:.LANCHOR59]
+	ldr	x0, [x21, #:lo12:.LANCHOR3]
 	mov	w22, w1
 	stp	x19, x20, [sp, 16]
 	ubfiz	x20, x25, 2, 16
 	add	x0, x0, x20
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR76
-	adrp	x23, .LANCHOR70
-	add	x24, x24, :lo12:.LANCHOR76
-	add	x23, x23, :lo12:.LANCHOR70
+	adrp	x24, .LANCHOR100
+	adrp	x23, .LANCHOR95
+	add	x24, x24, :lo12:.LANCHOR100
+	add	x23, x23, :lo12:.LANCHOR95
 	ldrb	w26, [x0, 3]
 	mov	w19, 0
 	str	x27, [sp, 80]
 	add	x27, x29, 96
-.L569:
+.L713:
 	ldrb	w0, [x24]
 	cmp	w19, w0
-	bge	.L576
+	bge	.L720
 	ldrb	w3, [x23]
-	adrp	x0, .LANCHOR75
+	adrp	x0, .LANCHOR99
 	mov	w1, 0
-	ldrh	w4, [x0, #:lo12:.LANCHOR75]
+	ldrh	w4, [x0, #:lo12:.LANCHOR99]
 	mov	w0, 0
 	mul	w6, w19, w3
 	mul	w5, w25, w3
-	b	.L577
-.L571:
+	b	.L721
+.L715:
 	add	w2, w0, w6
 	asr	w2, w26, w2
-	tbnz	x2, 0, .L570
+	tbnz	x2, 0, .L714
 	and	w2, w0, 1
 	add	w2, w2, w5
 	mul	w2, w2, w4
 	str	w2, [x27, w1, sxtw 2]
 	add	w1, w1, 1
-.L570:
+.L714:
 	add	w0, w0, 1
-.L577:
+.L721:
 	cmp	w0, w3
-	blt	.L571
+	blt	.L715
 	cmp	w1, 2
-	bne	.L572
-	adrp	x0, .LANCHOR74
-	ldrb	w0, [x0, #:lo12:.LANCHOR74]
-	cbz	w0, .L573
+	bne	.L716
+	adrp	x0, .LANCHOR98
+	ldrb	w0, [x0, #:lo12:.LANCHOR98]
+	cbz	w0, .L717
 	ldp	w2, w3, [x29, 96]
 	cmp	w22, 0
 	cset	w1, eq
 	mov	w0, w19
 	bl	flash_erase_duplane_block
-.L573:
+.L717:
 	ldp	w2, w3, [x29, 96]
 	mov	w1, w22
 	mov	w0, w19
 	bl	flash_erase_duplane_block
-.L574:
+.L718:
 	add	w19, w19, 1
-	b	.L569
-.L572:
+	b	.L713
+.L716:
 	cmp	w1, 1
-	bne	.L574
-	adrp	x0, .LANCHOR74
-	ldrb	w0, [x0, #:lo12:.LANCHOR74]
-	cbz	w0, .L575
+	bne	.L718
+	adrp	x0, .LANCHOR98
+	ldrb	w0, [x0, #:lo12:.LANCHOR98]
+	cbz	w0, .L719
 	ldr	w2, [x29, 96]
 	cmp	w22, 0
 	cset	w1, eq
 	mov	w0, w19
 	bl	flash_erase_block_en
-.L575:
+.L719:
 	ldr	w2, [x29, 96]
 	mov	w1, w22
 	mov	w0, w19
 	bl	flash_erase_block_en
-	b	.L574
-.L576:
-	adrp	x2, .LANCHOR46
-	ldr	x3, [x21, #:lo12:.LANCHOR59]
-	cbnz	w22, .L578
+	b	.L718
+.L720:
+	adrp	x2, .LANCHOR53
+	ldr	x3, [x21, #:lo12:.LANCHOR3]
+	cbnz	w22, .L722
 	ldrh	w1, [x3, x20]
 	add	w0, w1, 1
 	and	w0, w0, 2047
 	bfi	w1, w0, 0, 11
 	strh	w1, [x3, x20]
-	ldr	x1, [x2, #:lo12:.LANCHOR46]
+	ldr	x1, [x2, #:lo12:.LANCHOR53]
 	ldr	w2, [x1, 84]
 	add	w2, w2, 1
 	str	w2, [x1, 84]
 	ldrh	w2, [x1, 96]
 	cmp	w2, w0
-	bge	.L580
+	bge	.L724
 	strh	w0, [x1, 96]
-.L580:
+.L724:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -3432,7 +4301,7 @@ ftl_erase_sblk:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L578:
+.L722:
 	ldr	w1, [x3, x20]
 	ubfx	x0, x1, 11, 8
 	add	w0, w0, 1
@@ -3440,59 +4309,59 @@ ftl_erase_sblk:
 	bfi	w1, w0, 11, 8
 	str	w1, [x3, x20]
 	and	w0, w0, 65535
-	ldr	x1, [x2, #:lo12:.LANCHOR46]
+	ldr	x1, [x2, #:lo12:.LANCHOR53]
 	ldr	w2, [x1, 80]
 	add	w2, w2, 1
 	str	w2, [x1, 80]
 	ldrh	w2, [x1, 98]
 	cmp	w2, w0
-	bcs	.L580
+	bcs	.L724
 	strh	w0, [x1, 98]
-	b	.L580
+	b	.L724
 	.size	ftl_erase_sblk, .-ftl_erase_sblk
 	.section	.text.ftl_alloc_sys_blk,"ax",@progbits
 	.align	2
 	.global	ftl_alloc_sys_blk
 	.type	ftl_alloc_sys_blk, %function
 ftl_alloc_sys_blk:
-	adrp	x0, .LANCHOR46
-	ldr	x1, [x0, #:lo12:.LANCHOR46]
+	adrp	x0, .LANCHOR53
+	ldr	x1, [x0, #:lo12:.LANCHOR53]
 	ldrh	w0, [x1, 136]
 	cmp	w0, 63
-	bls	.L590
+	bls	.L734
 	strh	wzr, [x1, 136]
-.L590:
+.L734:
 	ldrh	w3, [x1, 112]
-	cbnz	w3, .L591
+	cbnz	w3, .L735
 	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR77
+	adrp	x1, .LANCHOR101
 	adrp	x0, .LC0
-	mov	w2, 440
+	mov	w2, 983
 	add	x29, sp, 0
-	add	x1, x1, :lo12:.LANCHOR77
+	add	x1, x1, :lo12:.LANCHOR101
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L592:
-	b	.L592
-.L591:
+.L736:
+	b	.L736
+.L735:
 	mov	w6, 65535
-.L597:
+.L741:
 	ldrh	w2, [x1, 136]
-.L593:
+.L737:
 	mov	w4, w2
 	cmp	w2, 63
-	ble	.L594
+	ble	.L738
 	strh	wzr, [x1, 136]
-	b	.L597
-.L594:
+	b	.L741
+.L738:
 	add	x5, x2, 1
 	add	x0, x1, x5, lsl 1
 	ldrh	w0, [x0, 158]
 	cmp	w0, w6
-	bne	.L598
+	bne	.L742
 	mov	x2, x5
-	b	.L593
-.L598:
+	b	.L737
+.L742:
 	add	x4, x1, x4, sxtw 1
 	mov	w5, -1
 	sub	w3, w3, #1
@@ -3506,125 +4375,136 @@ ftl_alloc_sys_blk:
 	.global	ftl_free_sys_blk
 	.type	ftl_free_sys_blk, %function
 ftl_free_sys_blk:
-	adrp	x1, .LANCHOR46
+	adrp	x1, .LANCHOR53
 	and	w0, w0, 65535
-	ldr	x1, [x1, #:lo12:.LANCHOR46]
+	ldr	x1, [x1, #:lo12:.LANCHOR53]
 	ldrh	w2, [x1, 138]
 	cmp	w2, 63
-	bls	.L603
+	bls	.L747
 	strh	wzr, [x1, 138]
-.L603:
+.L747:
 	ldrh	w3, [x1, 112]
 	cmp	w3, 63
-	bls	.L604
+	bls	.L748
 	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR78
+	adrp	x1, .LANCHOR102
 	adrp	x0, .LC0
-	mov	w2, 464
+	mov	w2, 1007
 	add	x29, sp, 0
-	add	x1, x1, :lo12:.LANCHOR78
+	add	x1, x1, :lo12:.LANCHOR102
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L605:
-	b	.L605
-.L604:
+.L749:
+	b	.L749
+.L748:
 	mov	w6, 65535
-.L610:
+.L754:
 	ldrh	w2, [x1, 138]
-.L606:
+.L750:
 	mov	w4, w2
 	cmp	w2, 63
-	ble	.L607
+	ble	.L751
 	strh	wzr, [x1, 138]
-	b	.L610
-.L607:
+	b	.L754
+.L751:
 	add	x5, x2, 1
 	add	x7, x1, x5, lsl 1
 	ldrh	w7, [x7, 158]
 	cmp	w7, w6
-	bne	.L608
+	bne	.L752
 	add	x4, x1, x4, sxtw 1
 	add	w3, w3, 1
 	strh	w0, [x4, 160]
 	strh	w2, [x1, 138]
 	strh	w3, [x1, 112]
 	ret
-.L608:
+.L752:
 	mov	x2, x5
-	b	.L606
+	b	.L750
 	.size	ftl_free_sys_blk, .-ftl_free_sys_blk
 	.section	.text.ftl_info_data_recovery,"ax",@progbits
 	.align	2
 	.global	ftl_info_data_recovery
 	.type	ftl_info_data_recovery, %function
 ftl_info_data_recovery:
-	ldrh	w1, [x0]
-	mov	w2, 65535
-	cmp	w1, w2
-	beq	.L614
-	adrp	x2, .LANCHOR59
-	ubfiz	x1, x1, 2, 16
-	ldr	x3, [x2, #:lo12:.LANCHOR59]
-	add	x4, x3, x1
-	ldrb	w2, [x4, 2]
-	tst	w2, 224
-	bne	.L614
+	ldrh	w2, [x0]
+	mov	w1, 65535
+	cmp	w2, w1
+	beq	.L768
+	stp	x29, x30, [sp, -48]!
+	adrp	x1, .LANCHOR3
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	ubfiz	x19, x2, 2, 16
+	ldr	x20, [x1, #:lo12:.LANCHOR3]
+	str	x21, [sp, 32]
+	add	x21, x20, x19
+	ldrb	w1, [x21, 2]
+	tst	w1, 224
+	bne	.L758
 	ldrb	w0, [x0, 4]
-	bfi	w2, w0, 5, 3
-	adrp	x0, .LANCHOR46
-	strb	w2, [x4, 2]
-	ldr	x5, [x0, #:lo12:.LANCHOR46]
-	tbz	x2, 3, .L618
-	ldrh	w2, [x5, 116]
+	bfi	w1, w0, 5, 3
+	strb	w1, [x21, 2]
+	mov	w0, w2
+	bl	zftl_remove_free_node
+	ldrb	w0, [x21, 2]
+	adrp	x1, .LANCHOR53
+	ldr	x3, [x1, #:lo12:.LANCHOR53]
+	tbz	x0, 3, .L762
+	ldrh	w2, [x3, 116]
 	sub	w2, w2, #1
-	strh	w2, [x5, 116]
-.L619:
-	ldrb	w2, [x4, 2]
-	and	w2, w2, 224
-	cmp	w2, 160
-	bne	.L621
-	ldr	w2, [x3, x1]
-	ubfx	x4, x2, 11, 8
-	add	w4, w4, 1
-	bfi	w2, w4, 11, 8
-	str	w2, [x3, x1]
-	ldr	x1, [x0, #:lo12:.LANCHOR46]
+	strh	w2, [x3, 116]
+.L763:
+	and	w0, w0, 224
+	cmp	w0, 160
+	bne	.L765
+	ldr	w0, [x20, x19]
+	ldr	x1, [x1, #:lo12:.LANCHOR53]
+	ubfx	x2, x0, 11, 8
+	add	w2, w2, 1
+	bfi	w0, w2, 11, 8
+	str	w0, [x20, x19]
 	ldrh	w0, [x1, 120]
 	sub	w0, w0, #1
 	strh	w0, [x1, 120]
+.L758:
+	ldp	x19, x20, [sp, 16]
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 48
 	ret
-.L618:
-	tst	w2, 24
-	bne	.L620
-	ldrh	w2, [x5, 114]
+.L762:
+	tst	w0, 24
+	bne	.L764
+	ldrh	w2, [x3, 114]
 	sub	w2, w2, #1
-	strh	w2, [x5, 114]
-	b	.L619
-.L620:
-	ldrh	w2, [x5, 118]
+	strh	w2, [x3, 114]
+	b	.L763
+.L764:
+	ldrh	w2, [x3, 118]
 	sub	w2, w2, #1
-	strh	w2, [x5, 118]
-	b	.L619
-.L621:
-	ldrh	w4, [x3, x1]
-	cmp	w2, 64
-	add	w5, w4, 1
-	bfi	w4, w5, 0, 11
-	strh	w4, [x3, x1]
-	bne	.L622
-	ldr	x1, [x0, #:lo12:.LANCHOR46]
+	strh	w2, [x3, 118]
+	b	.L763
+.L765:
+	ldrh	w2, [x20, x19]
+	cmp	w0, 64
+	add	w3, w2, 1
+	bfi	w2, w3, 0, 11
+	strh	w2, [x20, x19]
+	bne	.L766
+	ldr	x1, [x1, #:lo12:.LANCHOR53]
 	ldrh	w0, [x1, 122]
 	sub	w0, w0, #1
 	strh	w0, [x1, 122]
-	ret
-.L622:
-	cmp	w2, 96
-	bne	.L614
-	ldr	x1, [x0, #:lo12:.LANCHOR46]
+	b	.L758
+.L766:
+	cmp	w0, 96
+	bne	.L758
+	ldr	x1, [x1, #:lo12:.LANCHOR53]
 	ldrh	w0, [x1, 124]
 	sub	w0, w0, #1
 	strh	w0, [x1, 124]
-.L614:
+	b	.L758
+.L768:
 	ret
 	.size	ftl_info_data_recovery, .-ftl_info_data_recovery
 	.section	.text.ftl_get_ppa_from_index,"ax",@progbits
@@ -3633,17 +4513,17 @@ ftl_info_data_recovery:
 	.type	ftl_get_ppa_from_index, %function
 ftl_get_ppa_from_index:
 	and	w1, w0, 65535
-	adrp	x0, .LANCHOR60
-	adrp	x2, .LANCHOR69
-	ldr	x3, [x0, #:lo12:.LANCHOR60]
-	adrp	x0, .LANCHOR79
-	ldrb	w2, [x2, #:lo12:.LANCHOR69]
-	ldrh	w0, [x0, #:lo12:.LANCHOR79]
+	adrp	x0, .LANCHOR5
+	adrp	x2, .LANCHOR72
+	ldr	x3, [x0, #:lo12:.LANCHOR5]
+	adrp	x0, .LANCHOR80
+	ldrb	w2, [x2, #:lo12:.LANCHOR72]
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	bge	.L624
+	bge	.L772
 	add	x3, x3, 16
-.L625:
+.L773:
 	ldrb	w2, [x3, 9]
 	sdiv	w4, w1, w2
 	msub	w1, w4, w2, w1
@@ -3651,25 +4531,25 @@ ftl_get_ppa_from_index:
 	ldrh	w0, [x1, 16]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L626
+	bne	.L774
 	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR80
+	adrp	x1, .LANCHOR103
 	adrp	x0, .LC0
-	mov	w2, 837
+	mov	w2, 1385
 	add	x29, sp, 0
-	add	x1, x1, :lo12:.LANCHOR80
+	add	x1, x1, :lo12:.LANCHOR103
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L627:
-	b	.L627
-.L624:
+.L775:
+	b	.L775
+.L772:
 	sub	w1, w1, w0
 	add	x3, x3, 48
 	and	w1, w1, 65535
-	b	.L625
-.L626:
-	adrp	x1, .LANCHOR75
-	ldrh	w1, [x1, #:lo12:.LANCHOR75]
+	b	.L773
+.L774:
+	adrp	x1, .LANCHOR99
+	ldrh	w1, [x1, #:lo12:.LANCHOR99]
 	madd	w0, w1, w0, w4
 	ret
 	.size	ftl_get_ppa_from_index, .-ftl_get_ppa_from_index
@@ -3679,29 +4559,29 @@ ftl_get_ppa_from_index:
 	.type	lpa_hash_get_ppa, %function
 lpa_hash_get_ppa:
 	and	x2, x0, 255
-	adrp	x1, .LANCHOR81
-	add	x1, x1, :lo12:.LANCHOR81
+	adrp	x1, .LANCHOR104
+	add	x1, x1, :lo12:.LANCHOR104
 	mov	w3, 65535
 	ldrh	w1, [x1, x2, lsl 1]
-	adrp	x2, .LANCHOR82
-	ldr	x4, [x2, #:lo12:.LANCHOR82]
-	adrp	x2, .LANCHOR83
-	ldr	x5, [x2, #:lo12:.LANCHOR83]
-.L632:
+	adrp	x2, .LANCHOR105
+	ldr	x4, [x2, #:lo12:.LANCHOR105]
+	adrp	x2, .LANCHOR106
+	ldr	x5, [x2, #:lo12:.LANCHOR106]
+.L780:
 	cmp	w1, w3
-	bne	.L634
+	bne	.L782
 	mov	w0, -1
 	ret
-.L634:
+.L782:
 	uxtw	x2, w1
 	ldr	w6, [x4, x2, lsl 2]
 	cmp	w0, w6
-	bne	.L633
+	bne	.L781
 	mov	w0, w1
 	b	ftl_get_ppa_from_index
-.L633:
+.L781:
 	ldrh	w1, [x5, x2, lsl 1]
-	b	.L632
+	b	.L780
 	.size	lpa_hash_get_ppa, .-lpa_hash_get_ppa
 	.section	.text.ftl_get_new_free_page,"ax",@progbits
 	.align	2
@@ -3714,56 +4594,56 @@ ftl_get_new_free_page:
 	add	x29, sp, 0
 	ldrh	w0, [x0]
 	cmp	w0, w2
-	bne	.L636
-	adrp	x1, .LANCHOR84
+	bne	.L784
+	adrp	x1, .LANCHOR107
 	adrp	x0, .LC0
-	mov	w2, 948
-	add	x1, x1, :lo12:.LANCHOR84
+	mov	w2, 1500
+	add	x1, x1, :lo12:.LANCHOR107
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L637:
-	b	.L637
-.L636:
-	adrp	x0, .LANCHOR79
+.L785:
+	b	.L785
+.L784:
+	adrp	x0, .LANCHOR80
 	ldrh	w3, [x1, 2]
-	ldrh	w0, [x0, #:lo12:.LANCHOR79]
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w3, w0
-	bne	.L638
-	adrp	x1, .LANCHOR84
+	bne	.L786
+	adrp	x1, .LANCHOR107
 	adrp	x0, .LC0
-	mov	w2, 949
-	add	x1, x1, :lo12:.LANCHOR84
+	mov	w2, 1501
+	add	x1, x1, :lo12:.LANCHOR107
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L639:
-	b	.L639
-.L638:
+.L787:
+	b	.L787
+.L786:
 	ldrh	w4, [x1, 6]
-	cbnz	w4, .L640
-	adrp	x1, .LANCHOR84
+	cbnz	w4, .L788
+	adrp	x1, .LANCHOR107
 	adrp	x0, .LC0
-	mov	w2, 950
-	add	x1, x1, :lo12:.LANCHOR84
+	mov	w2, 1502
+	add	x1, x1, :lo12:.LANCHOR107
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L641:
-	b	.L641
-.L640:
+.L789:
+	b	.L789
+.L788:
 	ldrb	w0, [x1, 5]
 	mov	w3, w2
 	add	x0, x0, 8
 	ldrh	w5, [x1, x0, lsl 1]
-	adrp	x0, .LANCHOR69
-	ldrb	w6, [x0, #:lo12:.LANCHOR69]
-.L642:
+	adrp	x0, .LANCHOR72
+	ldrb	w6, [x0, #:lo12:.LANCHOR72]
+.L790:
 	cmp	w5, w3
 	ldrb	w2, [x1, 5]
-	beq	.L644
-	adrp	x0, .LANCHOR75
+	beq	.L792
+	adrp	x0, .LANCHOR99
 	sub	w4, w4, #1
 	strh	w4, [x1, 6]
 	add	w2, w2, 1
-	ldrh	w0, [x0, #:lo12:.LANCHOR75]
+	ldrh	w0, [x0, #:lo12:.LANCHOR99]
 	and	w2, w2, 255
 	ldrh	w4, [x1, 10]
 	cmp	w6, w2
@@ -3773,28 +4653,28 @@ ftl_get_new_free_page:
 	mul	w0, w0, w5
 	strh	w4, [x1, 10]
 	orr	w0, w0, w3
-	bne	.L635
+	bne	.L783
 	add	w3, w3, 1
 	strb	wzr, [x1, 5]
 	strh	w3, [x1, 2]
-.L635:
+.L783:
 	ldp	x29, x30, [sp], 16
 	ret
-.L644:
+.L792:
 	add	w2, w2, 1
 	and	w2, w2, 255
 	strb	w2, [x1, 5]
 	cmp	w2, w6
-	bne	.L643
+	bne	.L791
 	ldrh	w0, [x1, 2]
 	strb	wzr, [x1, 5]
 	add	w0, w0, 1
 	strh	w0, [x1, 2]
-.L643:
+.L791:
 	ldrb	w0, [x1, 5]
 	add	x0, x0, 8
 	ldrh	w5, [x1, x0, lsl 1]
-	b	.L642
+	b	.L790
 	.size	ftl_get_new_free_page, .-ftl_get_new_free_page
 	.section	.text.ftl_ext_alloc_new_blk,"ax",@progbits
 	.align	2
@@ -3810,23 +4690,23 @@ ftl_ext_alloc_new_blk:
 	mov	w19, w1
 	sub	w1, w1, #1
 	cmp	w2, w1, uxth
-	bcs	.L648
-	adrp	x1, .LANCHOR85
+	bcs	.L796
+	adrp	x1, .LANCHOR108
 	adrp	x0, .LC0
-	mov	w2, 981
-	add	x1, x1, :lo12:.LANCHOR85
+	mov	w2, 1533
+	add	x1, x1, :lo12:.LANCHOR108
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L649:
-	b	.L649
-.L648:
-	adrp	x20, .LANCHOR46
+.L797:
+	b	.L797
+.L796:
+	adrp	x20, .LANCHOR53
 	mov	w1, 0
 	bl	ftl_erase_phy_blk
-	ldr	x0, [x20, #:lo12:.LANCHOR46]
+	ldr	x0, [x20, #:lo12:.LANCHOR53]
 	ldrh	w0, [x0, 130]
 	bl	ftl_free_sys_blk
-	ldr	x0, [x20, #:lo12:.LANCHOR46]
+	ldr	x0, [x20, #:lo12:.LANCHOR53]
 	strh	w19, [x0, 130]
 	strh	wzr, [x0, 140]
 	mov	w0, 0
@@ -3839,51 +4719,58 @@ ftl_ext_alloc_new_blk:
 	.global	ftl_total_vpn_update
 	.type	ftl_total_vpn_update, %function
 ftl_total_vpn_update:
-	adrp	x2, .LANCHOR86
+	adrp	x2, .LANCHOR109
 	mov	x3, x2
-	ldrh	w1, [x2, #:lo12:.LANCHOR86]
+	ldrh	w1, [x2, #:lo12:.LANCHOR109]
 	cmp	w1, 4
-	bhi	.L652
-	cbnz	w0, .L652
+	bhi	.L800
+	cbnz	w0, .L800
 	add	w1, w1, 1
-	strh	w1, [x2, #:lo12:.LANCHOR86]
+	strh	w1, [x2, #:lo12:.LANCHOR109]
 	ret
-.L652:
-	adrp	x0, .LANCHOR54
-	strh	wzr, [x3, #:lo12:.LANCHOR86]
-	mov	w1, 0
+.L800:
+	adrp	x0, .LANCHOR2
+	strh	wzr, [x3, #:lo12:.LANCHOR109]
+	mov	x1, 0
 	mov	w2, 0
-	ldrh	w5, [x0, #:lo12:.LANCHOR54]
-	adrp	x0, .LANCHOR56
+	ldrh	w5, [x0, #:lo12:.LANCHOR2]
+	adrp	x0, .LANCHOR4
 	mov	w8, 65535
-	ldr	x6, [x0, #:lo12:.LANCHOR56]
-	adrp	x0, .LANCHOR59
-	ldr	x7, [x0, #:lo12:.LANCHOR59]
-	mov	x0, 0
-.L654:
-	cmp	w5, w0, uxth
-	bhi	.L657
-	adrp	x0, .LANCHOR60
-	ldr	x0, [x0, #:lo12:.LANCHOR60]
-	str	w2, [x0, 524]
-	str	w1, [x0, 528]
+	ldr	x6, [x0, #:lo12:.LANCHOR4]
+	adrp	x0, .LANCHOR3
+	ldr	x7, [x0, #:lo12:.LANCHOR3]
+	mov	w0, 0
+.L802:
+	cmp	w5, w1, uxth
+	bhi	.L805
+	adrp	x1, .LANCHOR5
+	ldr	x1, [x1, #:lo12:.LANCHOR5]
+	str	w2, [x1, 524]
+	adrp	x2, .LANCHOR53
+	str	w0, [x1, 528]
+	ldr	x2, [x2, #:lo12:.LANCHOR53]
+	ldrh	w2, [x2, 120]
+	cbz	w2, .L799
+	udiv	w0, w0, w2
+	str	w0, [x1, 532]
+.L799:
 	ret
-.L657:
-	ldrh	w3, [x6, x0, lsl 1]
+.L805:
+	ldrh	w3, [x6, x1, lsl 1]
 	cmp	w3, w8
-	beq	.L655
-	add	x4, x7, x0, lsl 2
+	beq	.L803
+	add	x4, x7, x1, lsl 2
 	ldrb	w4, [x4, 2]
 	and	w4, w4, 224
 	cmp	w4, 160
-	bne	.L656
-	add	w1, w1, w3
-.L655:
-	add	x0, x0, 1
-	b	.L654
-.L656:
+	bne	.L804
+	add	w0, w0, w3
+.L803:
+	add	x1, x1, 1
+	b	.L802
+.L804:
 	add	w2, w2, w3
-	b	.L655
+	b	.L803
 	.size	ftl_total_vpn_update, .-ftl_total_vpn_update
 	.section	.text.ftl_debug_info_fill,"ax",@progbits
 	.align	2
@@ -3898,12 +4785,20 @@ ftl_debug_info_fill:
 	.global	ftl_vpn_update
 	.type	ftl_vpn_update, %function
 ftl_vpn_update:
-	adrp	x1, .LANCHOR56
-	ubfiz	x0, x0, 1, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR56]
-	ldrh	w0, [x1, x0]
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	and	w19, w0, 65535
+	mov	w0, w19
+	bl	zftl_list_update_data_list
+	adrp	x0, .LANCHOR4
+	ubfiz	x19, x19, 1, 16
+	ldr	x0, [x0, #:lo12:.LANCHOR4]
+	ldrh	w0, [x0, x19]
+	ldr	x19, [sp, 16]
 	cmp	w0, 0
 	cset	w0, eq
+	ldp	x29, x30, [sp], 32
 	ret
 	.size	ftl_vpn_update, .-ftl_vpn_update
 	.section	.text.ftl_vpn_decrement,"ax",@progbits
@@ -3911,45 +4806,47 @@ ftl_vpn_update:
 	.global	ftl_vpn_decrement
 	.type	ftl_vpn_decrement, %function
 ftl_vpn_decrement:
-	stp	x29, x30, [sp, -16]!
-	and	w3, w0, 65535
-	mov	w0, 65535
-	cmp	w3, w0
+	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
-	beq	.L661
-	adrp	x0, .LANCHOR56
-	ubfiz	x1, x3, 1, 16
-	ldr	x2, [x0, #:lo12:.LANCHOR56]
+	stp	x19, x20, [sp, 16]
+	and	w19, w0, 65535
+	mov	w0, 65535
+	cmp	w19, w0
+	beq	.L814
+	adrp	x0, .LANCHOR4
+	ubfiz	x1, x19, 1, 16
+	ldr	x2, [x0, #:lo12:.LANCHOR4]
 	ldrh	w0, [x2, x1]
-	cbnz	w0, .L662
-	adrp	x0, .LC17
+	cbnz	w0, .L815
+	adrp	x0, .LC20
 	mov	w2, 0
-	mov	w1, w3
-	add	x0, x0, :lo12:.LC17
+	mov	w1, w19
+	add	x0, x0, :lo12:.LC20
 	bl	printf
-.L665:
+.L818:
 	mov	w0, 0
-	b	.L660
-.L662:
+	b	.L813
+.L815:
 	sub	w0, w0, #1
 	strh	w0, [x2, x1]
-.L661:
-	adrp	x2, .LANCHOR87
-	ldrh	w0, [x2, #:lo12:.LANCHOR87]
-	cmp	w3, w0
-	beq	.L665
+.L814:
+	adrp	x20, .LANCHOR110
+	ldrh	w0, [x20, #:lo12:.LANCHOR110]
+	cmp	w19, w0
+	beq	.L818
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L664
-	strh	w3, [x2, #:lo12:.LANCHOR87]
-	b	.L665
-.L664:
+	bne	.L817
+	strh	w19, [x20, #:lo12:.LANCHOR110]
+	b	.L818
+.L817:
 	bl	ftl_vpn_update
 	cmp	w0, 0
 	cset	w0, ne
-	strh	w3, [x2, #:lo12:.LANCHOR87]
-.L660:
-	ldp	x29, x30, [sp], 16
+	strh	w19, [x20, #:lo12:.LANCHOR110]
+.L813:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
 	ret
 	.size	ftl_vpn_decrement, .-ftl_vpn_decrement
 	.section	.text.lpa_hash_update_ppa,"ax",@progbits
@@ -3957,50 +4854,50 @@ ftl_vpn_decrement:
 	.global	lpa_hash_update_ppa
 	.type	lpa_hash_update_ppa, %function
 lpa_hash_update_ppa:
-	adrp	x3, .LANCHOR81
+	adrp	x3, .LANCHOR104
 	and	x5, x0, 255
-	add	x4, x3, :lo12:.LANCHOR81
+	add	x4, x3, :lo12:.LANCHOR104
 	mov	w7, 65535
 	and	w2, w2, 65535
 	mov	w12, w7
 	ldrh	w6, [x4, x5, lsl 1]
-	adrp	x4, .LANCHOR82
-	ldr	x8, [x4, #:lo12:.LANCHOR82]
-	adrp	x4, .LANCHOR83
-	ldr	x4, [x4, #:lo12:.LANCHOR83]
-.L668:
+	adrp	x4, .LANCHOR105
+	ldr	x8, [x4, #:lo12:.LANCHOR105]
+	adrp	x4, .LANCHOR106
+	ldr	x4, [x4, #:lo12:.LANCHOR106]
+.L821:
 	cmp	w6, w12
-	beq	.L672
+	beq	.L825
 	uxtw	x11, w6
 	lsl	x10, x11, 2
 	add	x13, x8, x10
 	ldr	w10, [x8, x10]
 	cmp	w0, w10
 	lsl	x10, x11, 1
-	bne	.L669
+	bne	.L822
 	mov	w6, -1
 	str	w6, [x13]
 	cmp	w7, w12
-	bne	.L670
-	add	x6, x3, :lo12:.LANCHOR81
+	bne	.L823
+	add	x6, x3, :lo12:.LANCHOR104
 	ldrh	w7, [x4, x10]
 	strh	w7, [x6, x5, lsl 1]
-.L671:
+.L824:
 	mov	w6, -1
 	strh	w6, [x4, x11, lsl 1]
-.L672:
+.L825:
 	uxtw	x6, w2
-	add	x3, x3, :lo12:.LANCHOR81
+	add	x3, x3, :lo12:.LANCHOR104
 	cmn	w1, #1
 	str	w0, [x8, x6, lsl 2]
 	ldrh	w0, [x3, x5, lsl 1]
 	strh	w2, [x3, x5, lsl 1]
 	strh	w0, [x4, x6, lsl 1]
-	beq	.L679
+	beq	.L832
 	stp	x29, x30, [sp, -16]!
-	adrp	x0, .LANCHOR71
+	adrp	x0, .LANCHOR96
 	add	x29, sp, 0
-	ldrh	w3, [x0, #:lo12:.LANCHOR71]
+	ldrh	w3, [x0, #:lo12:.LANCHOR96]
 	mov	w0, 21
 	sub	w2, w0, w3
 	mov	w0, 1
@@ -4008,22 +4905,22 @@ lpa_hash_update_ppa:
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
 	and	w1, w0, w1
-	adrp	x0, .LANCHOR70
-	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	adrp	x0, .LANCHOR95
+	ldrb	w0, [x0, #:lo12:.LANCHOR95]
 	udiv	w0, w1, w0
 	bl	ftl_vpn_decrement
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
-.L670:
+.L823:
 	ldrh	w6, [x4, x10]
 	strh	w6, [x4, w7, uxtw 1]
-	b	.L671
-.L669:
+	b	.L824
+.L822:
 	mov	w7, w6
 	ldrh	w6, [x4, x10]
-	b	.L668
-.L679:
+	b	.L821
+.L832:
 	mov	w0, -1
 	ret
 	.size	lpa_hash_update_ppa, .-lpa_hash_update_ppa
@@ -4035,26 +4932,26 @@ ftl_write_completed:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR88
+	adrp	x20, .LANCHOR111
 	stp	x21, x22, [sp, 32]
-	adrp	x19, .LANCHOR36
-	adrp	x22, .LANCHOR71
-	add	x20, x20, :lo12:.LANCHOR88
-	add	x19, x19, :lo12:.LANCHOR36
-	add	x22, x22, :lo12:.LANCHOR71
+	adrp	x19, .LANCHOR43
+	adrp	x22, .LANCHOR96
+	add	x20, x20, :lo12:.LANCHOR111
+	add	x19, x19, :lo12:.LANCHOR43
+	add	x22, x22, :lo12:.LANCHOR96
 	stp	x23, x24, [sp, 48]
 	str	x25, [sp, 64]
-.L683:
+.L836:
 	ldrb	w0, [x20]
 	cmp	w0, 255
-	bne	.L689
+	bne	.L842
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L689:
+.L842:
 	ubfiz	x21, x0, 6, 8
 	sbfiz	x0, x0, 6, 32
 	add	x23, x19, x0
@@ -4063,7 +4960,7 @@ ftl_write_completed:
 	strb	w0, [x20]
 	ldr	w0, [x23, 52]
 	cmn	w0, #1
-	bne	.L684
+	bne	.L837
 	ldp	w2, w3, [x23, 36]
 	mov	w1, 21
 	ldrh	w0, [x22]
@@ -4073,11 +4970,11 @@ ftl_write_completed:
 	lsl	w1, w25, w1
 	sub	w1, w1, #1
 	and	w1, w1, w0
-	adrp	x0, .LANCHOR70
-	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	adrp	x0, .LANCHOR95
+	ldrb	w0, [x0, #:lo12:.LANCHOR95]
 	udiv	w1, w1, w0
-	adrp	x0, .LC18
-	add	x0, x0, :lo12:.LC18
+	adrp	x0, .LC21
+	add	x0, x0, :lo12:.LC21
 	and	w24, w1, 65535
 	mov	w1, w24
 	bl	printf
@@ -4085,36 +4982,39 @@ ftl_write_completed:
 	mov	w2, 0
 	mov	w0, w24
 	bl	gc_add_sblk
-	adrp	x0, .LANCHOR60
-	ldr	x0, [x0, #:lo12:.LANCHOR60]
+	adrp	x0, .LANCHOR5
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	ldr	w1, [x0, 556]
+	add	w1, w1, w25
+	str	w1, [x0, 556]
 	ldrh	w1, [x0, 16]
 	cmp	w1, w24
-	bne	.L685
+	bne	.L838
 	strh	wzr, [x0, 22]
-.L686:
+.L839:
 	mov	x0, x21
 	bl	ftl_write_buf
-	b	.L683
-.L685:
+	b	.L836
+.L838:
 	ldrh	w1, [x0, 48]
 	cmp	w1, w24
-	bne	.L686
+	bne	.L839
 	strh	wzr, [x0, 54]
-	b	.L686
-.L684:
+	b	.L839
+.L837:
 	ldrh	w2, [x23, 48]
 	ldr	w0, [x23, 36]
 	ldr	w1, [x23, 44]
 	bl	lpa_hash_update_ppa
 	ldrb	w0, [x23, 2]
-	tbz	x0, 2, .L688
+	tbz	x0, 2, .L841
 	and	w0, w0, -3
 	strb	w0, [x23, 2]
-	b	.L683
-.L688:
+	b	.L836
+.L841:
 	mov	x0, x21
 	bl	buf_free
-	b	.L683
+	b	.L836
 	.size	ftl_write_completed, .-ftl_write_completed
 	.section	.text.ftl_mask_bad_block,"ax",@progbits
 	.align	2
@@ -4122,10 +5022,10 @@ ftl_write_completed:
 	.type	ftl_mask_bad_block, %function
 ftl_mask_bad_block:
 	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LANCHOR71
+	adrp	x1, .LANCHOR96
 	mov	w2, 21
 	add	x29, sp, 0
-	ldrh	w3, [x1, #:lo12:.LANCHOR71]
+	ldrh	w3, [x1, #:lo12:.LANCHOR96]
 	stp	x19, x20, [sp, 16]
 	ubfx	x20, x0, 21, 3
 	sub	w1, w2, w3
@@ -4134,32 +5034,32 @@ ftl_mask_bad_block:
 	lsl	w2, w2, w1
 	sub	w2, w2, #1
 	and	w2, w2, w0
-	adrp	x0, .LANCHOR70
-	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	adrp	x0, .LANCHOR95
+	ldrb	w0, [x0, #:lo12:.LANCHOR95]
 	udiv	w2, w2, w0
-	adrp	x0, .LANCHOR22
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	adrp	x0, .LANCHOR29
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
 	and	w19, w2, 255
-	tbz	x0, 14, .L692
-	adrp	x0, .LC19
+	tbz	x0, 14, .L845
+	adrp	x0, .LC22
 	mov	w2, w19
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC19
+	add	x0, x0, :lo12:.LC22
 	bl	printf
-.L692:
-	adrp	x0, .LANCHOR54
-	ldrh	w0, [x0, #:lo12:.LANCHOR54]
+.L845:
+	adrp	x0, .LANCHOR2
+	ldrh	w0, [x0, #:lo12:.LANCHOR2]
 	cmp	w0, w19
-	bls	.L691
-	adrp	x0, .LANCHOR59
+	bls	.L844
+	adrp	x0, .LANCHOR3
 	mov	w1, 1
 	lsl	w1, w1, w20
-	ldr	x0, [x0, #:lo12:.LANCHOR59]
+	ldr	x0, [x0, #:lo12:.LANCHOR3]
 	add	x19, x0, x19, uxtb 2
 	ldrb	w0, [x19, 3]
 	orr	w1, w1, w0
 	strb	w1, [x19, 3]
-.L691:
+.L844:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -4170,44 +5070,52 @@ ftl_mask_bad_block:
 	.type	print_ftl_debug_info, %function
 print_ftl_debug_info:
 	sub	sp, sp, #64
-	adrp	x1, .LANCHOR60
+	adrp	x1, .LANCHOR86
+	adrp	x0, .LANCHOR5
+	adrp	x7, .LANCHOR54
 	stp	x29, x30, [sp, 32]
 	add	x29, sp, 32
-	ldr	x7, [x1, #:lo12:.LANCHOR60]
+	ldrh	w6, [x1, #:lo12:.LANCHOR86]
+	adrp	x1, .LANCHOR82
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	ldr	w7, [x7, #:lo12:.LANCHOR54]
+	ldrh	w5, [x1, #:lo12:.LANCHOR82]
+	adrp	x1, .LANCHOR84
+	str	w7, [sp, 8]
+	ldrh	w4, [x1, #:lo12:.LANCHOR84]
+	adrp	x1, .LANCHOR93
+	ldr	w7, [x0, 528]
+	ldrh	w3, [x1, #:lo12:.LANCHOR93]
+	adrp	x1, .LANCHOR91
+	str	w7, [sp]
+	ldrh	w2, [x1, #:lo12:.LANCHOR91]
+	adrp	x1, .LANCHOR89
+	ldr	w7, [x0, 524]
+	adrp	x0, .LC23
+	ldrh	w1, [x1, #:lo12:.LANCHOR89]
+	add	x0, x0, :lo12:.LC23
 	str	x19, [sp, 48]
-	adrp	x19, .LANCHOR46
-	ldr	x0, [x19, #:lo12:.LANCHOR46]
-	ldrh	w6, [x0, 120]
-	ldrh	w5, [x0, 124]
-	ldrh	w4, [x0, 122]
-	ldrh	w3, [x0, 116]
-	ldrh	w2, [x0, 118]
-	ldrh	w1, [x0, 114]
-	ldr	w0, [x7, 528]
-	str	w0, [sp]
-	adrp	x0, .LC20
-	add	x0, x0, :lo12:.LC20
-	ldr	w7, [x7, 524]
+	adrp	x19, .LANCHOR53
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR46]
-	adrp	x1, .LANCHOR89
-	ldrb	w3, [x1, #:lo12:.LANCHOR89]
+	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	adrp	x1, .LANCHOR112
+	ldrb	w3, [x1, #:lo12:.LANCHOR112]
 	ldr	w4, [x0, 8]
 	ldr	w5, [x0, 64]
 	ldr	w1, [x0, 20]
 	ldr	w2, [x0, 28]
-	adrp	x0, .LC21
-	add	x0, x0, :lo12:.LC21
+	adrp	x0, .LC24
+	add	x0, x0, :lo12:.LC24
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	ldr	x0, [x19, #:lo12:.LANCHOR53]
 	ldr	w1, [x0, 52]
 	ldr	w2, [x0, 60]
 	ldr	w3, [x0, 16]
-	adrp	x0, .LC22
-	add	x0, x0, :lo12:.LC22
+	adrp	x0, .LC25
+	add	x0, x0, :lo12:.LC25
 	lsr	w3, w3, 11
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	ldr	x0, [x19, #:lo12:.LANCHOR53]
 	ldrh	w2, [x0, 98]
 	ldrh	w6, [x0, 72]
 	ldrh	w5, [x0, 96]
@@ -4220,28 +5128,110 @@ print_ftl_debug_info:
 	ldrh	w2, [x0, 90]
 	str	w2, [sp]
 	ldp	w7, w2, [x0, 80]
-	adrp	x0, .LC23
-	add	x0, x0, :lo12:.LC23
+	adrp	x0, .LC26
+	add	x0, x0, :lo12:.LC26
 	bl	printf
 	ldr	x19, [sp, 48]
+	adrp	x0, .LANCHOR73
 	ldp	x29, x30, [sp, 32]
 	add	sp, sp, 64
-	ret
+	ldrh	w5, [x0, #:lo12:.LANCHOR73]
+	adrp	x0, .LANCHOR79
+	ldrh	w4, [x0, #:lo12:.LANCHOR79]
+	adrp	x0, .LANCHOR62
+	ldrh	w3, [x0, #:lo12:.LANCHOR62]
+	adrp	x0, .LANCHOR88
+	ldrh	w2, [x0, #:lo12:.LANCHOR88]
+	adrp	x0, .LANCHOR85
+	ldrh	w1, [x0, #:lo12:.LANCHOR85]
+	adrp	x0, .LC27
+	add	x0, x0, :lo12:.LC27
+	b	printf
 	.size	print_ftl_debug_info, .-print_ftl_debug_info
+	.section	.text.ftl_alloc_sblk,"ax",@progbits
+	.align	2
+	.global	ftl_alloc_sblk
+	.type	ftl_alloc_sblk, %function
+ftl_alloc_sblk:
+	stp	x29, x30, [sp, -48]!
+	cmp	w0, 5
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	and	w22, w0, 65535
+	stp	x19, x20, [sp, 16]
+	cset	w21, eq
+	mov	w1, w22
+	mov	w20, w0
+	mov	w0, 0
+	bl	zftl_get_free_sblk
+	and	w19, w0, 65535
+	mov	w1, 65535
+	cmp	w19, w1
+	beq	.L855
+	adrp	x1, .LANCHOR3
+	ldr	x1, [x1, #:lo12:.LANCHOR3]
+	add	x19, x1, x19, uxth 2
+	ldrb	w2, [x19, 2]
+	tst	w2, 224
+	beq	.L856
+	adrp	x1, .LANCHOR113
+	adrp	x0, .LC0
+	mov	w2, 752
+	add	x1, x1, :lo12:.LANCHOR113
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L857:
+	b	.L857
+.L856:
+	bfi	w2, w20, 5, 3
+	lsl	w21, w21, 1
+	ubfx	x1, x2, 3, 2
+	orr	w21, w21, w1
+	bfi	w2, w21, 3, 2
+	strb	w2, [x19, 2]
+	ldp	x21, x22, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+.L855:
+	bl	print_ftl_debug_info
+	adrp	x21, .LC28
+	mov	w2, w20
+	add	x21, x21, :lo12:.LC28
+	mov	w1, w19
+	mov	x0, x21
+	bl	printf
+	mov	w1, w22
+	mov	w0, 0
+	bl	zftl_get_free_sblk
+	and	w1, w0, 65535
+	mov	w2, w20
+	mov	x0, x21
+	bl	printf
+	bl	dump_all_list_info
+	adrp	x1, .LANCHOR113
+	adrp	x0, .LC0
+	mov	w2, 762
+	add	x1, x1, :lo12:.LANCHOR113
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L858:
+	b	.L858
+	.size	ftl_alloc_sblk, .-ftl_alloc_sblk
 	.section	.text.sblk_init,"ax",@progbits
 	.align	2
 	.global	sblk_init
 	.type	sblk_init, %function
 sblk_init:
-	adrp	x1, .LANCHOR90
+	adrp	x1, .LANCHOR114
 	mov	w0, -1
-	strb	w0, [x1, #:lo12:.LANCHOR90]
-	adrp	x1, .LANCHOR88
-	strb	w0, [x1, #:lo12:.LANCHOR88]
-	adrp	x1, .LANCHOR51
-	strb	w0, [x1, #:lo12:.LANCHOR51]
-	adrp	x1, .LANCHOR62
-	strb	w0, [x1, #:lo12:.LANCHOR62]
+	strb	w0, [x1, #:lo12:.LANCHOR114]
+	adrp	x1, .LANCHOR111
+	strb	w0, [x1, #:lo12:.LANCHOR111]
+	adrp	x1, .LANCHOR58
+	strb	w0, [x1, #:lo12:.LANCHOR58]
+	adrp	x1, .LANCHOR65
+	strb	w0, [x1, #:lo12:.LANCHOR65]
 	mov	w0, 0
 	ret
 	.size	sblk_init, .-sblk_init
@@ -4251,25 +5241,25 @@ sblk_init:
 	.type	dump_sblk_queue, %function
 dump_sblk_queue:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LC24
-	add	x0, x0, :lo12:.LC24
+	adrp	x0, .LC29
+	add	x0, x0, :lo12:.LC29
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR90
+	adrp	x19, .LANCHOR114
 	str	x21, [sp, 32]
-	ldrb	w1, [x19, #:lo12:.LANCHOR90]
+	ldrb	w1, [x19, #:lo12:.LANCHOR114]
 	bl	printf
-	ldrb	w19, [x19, #:lo12:.LANCHOR90]
+	ldrb	w19, [x19, #:lo12:.LANCHOR114]
 	cmp	w19, 255
-	beq	.L701
-	adrp	x1, .LANCHOR36
+	beq	.L863
+	adrp	x1, .LANCHOR43
 	ubfiz	x19, x19, 6, 8
-	add	x1, x1, :lo12:.LANCHOR36
-	adrp	x21, .LC25
+	add	x1, x1, :lo12:.LANCHOR43
+	adrp	x21, .LC30
 	add	x19, x1, x19
-	add	x21, x21, :lo12:.LC25
+	add	x21, x21, :lo12:.LC30
 	mov	x20, x1
-.L703:
+.L865:
 	ldrb	w2, [x19, 58]
 	mov	x0, x21
 	ldrb	w1, [x19, 1]
@@ -4277,11 +5267,11 @@ dump_sblk_queue:
 	bl	printf
 	ldrb	w19, [x19]
 	cmp	w19, 255
-	beq	.L701
+	beq	.L863
 	ubfiz	x19, x19, 6, 8
 	add	x19, x20, x19
-	b	.L703
-.L701:
+	b	.L865
+.L863:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -4292,86 +5282,86 @@ dump_sblk_queue:
 	.global	queue_lun_state
 	.type	queue_lun_state, %function
 queue_lun_state:
-	adrp	x2, .LANCHOR90
-	ldrb	w2, [x2, #:lo12:.LANCHOR90]
+	adrp	x2, .LANCHOR114
+	ldrb	w2, [x2, #:lo12:.LANCHOR114]
 	cmp	w2, 255
-	beq	.L720
-	adrp	x3, .LANCHOR71
-	adrp	x7, .LANCHOR36
-	add	x7, x7, :lo12:.LANCHOR36
-	adrp	x10, .L716
-	ldrh	w8, [x3, #:lo12:.LANCHOR71]
+	beq	.L882
+	adrp	x3, .LANCHOR96
+	adrp	x7, .LANCHOR43
+	add	x7, x7, :lo12:.LANCHOR43
+	adrp	x10, .L878
+	ldrh	w8, [x3, #:lo12:.LANCHOR96]
 	mov	w3, 21
 	ubfx	x11, x0, 21, 3
-	add	x10, x10, :lo12:.L716
+	add	x10, x10, :lo12:.L878
 	sub	w4, w3, w8
 	mov	w3, 1
 	mov	x12, x7
 	lsl	w3, w3, w4
-	adrp	x4, .LANCHOR70
+	adrp	x4, .LANCHOR95
 	sub	w3, w3, #1
-	ldrb	w6, [x4, #:lo12:.LANCHOR70]
+	ldrb	w6, [x4, #:lo12:.LANCHOR95]
 	and	w3, w3, 65535
 	asr	w4, w0, w8
 	sub	w6, w6, #1
 	and	w6, w6, 65535
 	and	w4, w4, w6
 	and	w4, w4, w3
-.L719:
+.L881:
 	add	x0, x7, x2, lsl 6
 	ldr	w5, [x0, 40]
 	ubfx	x13, x5, 21, 3
 	cmp	w11, w13
-	bne	.L713
+	bne	.L875
 	lsr	w5, w5, w8
 	and	w5, w6, w5
 	and	w5, w3, w5
 	ldrb	w0, [x0, 58]
 	cmp	w4, w5
-	bne	.L714
+	bne	.L876
 	cmp	w1, 1
-	bne	.L711
+	bne	.L873
 	cmp	w0, 6
 	ccmp	w0, 8, 4, ne
-	beq	.L713
+	beq	.L875
 	ret
-.L714:
+.L876:
 	cmp	w1, 3
-	bhi	.L713
+	bhi	.L875
 	ldrb	w5, [x10,w1,uxtw]
-	adr	x13, .Lrtx716
+	adr	x13, .Lrtx878
 	add	x5, x13, w5, sxtb #2
 	br	x5
-.Lrtx716:
+.Lrtx878:
 	.section	.rodata.queue_lun_state,"a",@progbits
 	.align	0
 	.align	2
-.L716:
-	.byte	(.L715 - .Lrtx716) / 4
-	.byte	(.L717 - .Lrtx716) / 4
-	.byte	(.L718 - .Lrtx716) / 4
-	.byte	(.L711 - .Lrtx716) / 4
+.L878:
+	.byte	(.L877 - .Lrtx878) / 4
+	.byte	(.L879 - .Lrtx878) / 4
+	.byte	(.L880 - .Lrtx878) / 4
+	.byte	(.L873 - .Lrtx878) / 4
 	.section	.text.queue_lun_state
-.L715:
+.L877:
 	cmp	w0, 2
-	beq	.L713
+	beq	.L875
 	ret
-.L717:
+.L879:
 	cmp	w0, 6
 	ccmp	w0, 8, 4, ne
-	beq	.L713
+	beq	.L875
 	ret
-.L718:
+.L880:
 	cmp	w0, 10
-	bne	.L711
-.L713:
+	bne	.L873
+.L875:
 	lsl	x2, x2, 6
 	ldrb	w2, [x12, x2]
 	cmp	w2, 255
-	bne	.L719
-.L720:
+	bne	.L881
+.L882:
 	mov	w0, 0
-.L711:
+.L873:
 	ret
 	.size	queue_lun_state, .-queue_lun_state
 	.section	.text.queue_remove_completed_req,"ax",@progbits
@@ -4379,68 +5369,68 @@ queue_lun_state:
 	.global	queue_remove_completed_req
 	.type	queue_remove_completed_req, %function
 queue_remove_completed_req:
-	adrp	x6, .LANCHOR90
-	ldrb	w2, [x6, #:lo12:.LANCHOR90]
+	adrp	x6, .LANCHOR114
+	ldrb	w2, [x6, #:lo12:.LANCHOR114]
 	cmp	w2, 255
-	beq	.L722
-	adrp	x0, .LANCHOR36
+	beq	.L884
+	adrp	x0, .LANCHOR43
 	lsl	x4, x2, 6
-	add	x5, x0, :lo12:.LANCHOR36
+	add	x5, x0, :lo12:.LANCHOR43
 	add	x3, x5, x4
 	ldrb	w1, [x3, 58]
 	sub	w1, w1, #11
 	and	w1, w1, 255
 	cmp	w1, 1
 	mov	x1, x0
-	bhi	.L722
+	bhi	.L884
 	ldrb	w0, [x5, x4]
-	strb	w0, [x6, #:lo12:.LANCHOR90]
+	strb	w0, [x6, #:lo12:.LANCHOR114]
 	mov	w0, -1
 	strb	w0, [x5, x4]
 	ldrb	w0, [x3, 59]
 	cmp	w0, 1
-	bne	.L724
+	bne	.L886
 	ldrh	w0, [x3, 50]
-	cbnz	w0, .L725
-	adrp	x0, .LANCHOR88
-	ldrb	w3, [x0, #:lo12:.LANCHOR88]
-	add	x0, x0, :lo12:.LANCHOR88
-.L726:
+	cbnz	w0, .L887
+	adrp	x0, .LANCHOR111
+	ldrb	w3, [x0, #:lo12:.LANCHOR111]
+	add	x0, x0, :lo12:.LANCHOR111
+.L888:
 	cmp	w3, 255
-	bne	.L730
-	add	x1, x1, :lo12:.LANCHOR36
+	bne	.L892
+	add	x1, x1, :lo12:.LANCHOR43
 	add	x1, x1, x2, lsl 6
 	ldrb	w1, [x1, 1]
 	strb	w1, [x0]
 	ret
-.L725:
-	adrp	x0, .LANCHOR62
-	ldrb	w3, [x0, #:lo12:.LANCHOR62]
-	add	x0, x0, :lo12:.LANCHOR62
-	b	.L726
-.L724:
-	cbnz	w0, .L722
+.L887:
+	adrp	x0, .LANCHOR65
+	ldrb	w3, [x0, #:lo12:.LANCHOR65]
+	add	x0, x0, :lo12:.LANCHOR65
+	b	.L888
+.L886:
+	cbnz	w0, .L884
 	ldr	w0, [x3, 36]
 	cmn	w0, #1
-	beq	.L722
-	adrp	x0, .LANCHOR51
-	ldrb	w3, [x0, #:lo12:.LANCHOR51]
-	add	x0, x0, :lo12:.LANCHOR51
-	b	.L726
-.L730:
-	add	x0, x1, :lo12:.LANCHOR36
-.L737:
+	beq	.L884
+	adrp	x0, .LANCHOR58
+	ldrb	w3, [x0, #:lo12:.LANCHOR58]
+	add	x0, x0, :lo12:.LANCHOR58
+	b	.L888
+.L892:
+	add	x0, x1, :lo12:.LANCHOR43
+.L899:
 	mov	w1, w3
 	sbfiz	x3, x3, 6, 32
 	ldrb	w3, [x0, x3]
 	cmp	w3, 255
-	bne	.L737
+	bne	.L899
 	add	x2, x0, x2, lsl 6
 	sbfiz	x1, x1, 6, 32
 	ldrb	w2, [x2, 1]
 	strb	w2, [x0, x1]
 	ret
-.L722:
+.L884:
 	ret
 	.size	queue_remove_completed_req, .-queue_remove_completed_req
 	.section	.text.pm_alloc_new_blk,"ax",@progbits
@@ -4449,196 +5439,196 @@ queue_remove_completed_req:
 	.type	pm_alloc_new_blk, %function
 pm_alloc_new_blk:
 	stp	x29, x30, [sp, -64]!
-	adrp	x2, .LANCHOR69
+	adrp	x2, .LANCHOR72
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR46
+	adrp	x20, .LANCHOR53
 	stp	x21, x22, [sp, 32]
-	ldr	x1, [x20, #:lo12:.LANCHOR46]
-	ldrb	w2, [x2, #:lo12:.LANCHOR69]
+	ldr	x1, [x20, #:lo12:.LANCHOR53]
+	ldrb	w2, [x2, #:lo12:.LANCHOR72]
 	ldrh	w0, [x1, 690]
 	str	x23, [sp, 48]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	strh	w0, [x1, 690]
 	cmp	w2, w0
-	bls	.L739
+	bls	.L901
 	add	x0, x1, x0, sxtw 1
 	ldrh	w1, [x0, 672]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L740
-.L739:
-	adrp	x21, .LC26
-	add	x21, x21, :lo12:.LC26
-	adrp	x23, .LANCHOR59
-.L754:
+	bne	.L902
+.L901:
+	adrp	x21, .LC31
+	add	x21, x21, :lo12:.LC31
+	adrp	x23, .LANCHOR3
+.L916:
 	mov	w0, 1
 	bl	ftl_alloc_sblk
 	mov	w1, 0
 	and	w19, w0, 65535
 	bl	ftl_erase_sblk
-	add	x13, x20, :lo12:.LANCHOR46
-	ldr	x1, [x20, #:lo12:.LANCHOR46]
+	add	x13, x20, :lo12:.LANCHOR53
+	ldr	x1, [x20, #:lo12:.LANCHOR53]
 	mov	w0, w19
 	add	x1, x1, 672
 	bl	ftl_get_blk_list_in_sblk
 	tst	w0, 65535
-	bne	.L741
+	bne	.L903
 	mov	w1, w19
 	mov	x0, x21
 	bl	printf
-	ldr	x0, [x23, #:lo12:.LANCHOR59]
+	ldr	x0, [x23, #:lo12:.LANCHOR3]
 	add	x19, x0, x19, uxth 2
 	ldrb	w0, [x19, 2]
 	orr	w0, w0, -32
 	strb	w0, [x19, 2]
-	b	.L754
-.L741:
+	b	.L916
+.L903:
 	ldr	x1, [x13]
-	adrp	x0, .LANCHOR91
+	adrp	x0, .LANCHOR115
 	mov	w2, 1
 	mov	w3, 65535
-	str	w2, [x0, #:lo12:.LANCHOR91]
+	str	w2, [x0, #:lo12:.LANCHOR115]
 	add	x2, x1, 416
 	mov	w0, 0
 	strh	wzr, [x1, 690]
-.L743:
+.L905:
 	ldrh	w4, [x2]
 	cmp	w4, w3
-	beq	.L742
+	beq	.L904
 	add	w0, w0, 1
 	add	x2, x2, 2
 	cmp	w0, 128
-	bne	.L743
-	adrp	x1, .LANCHOR92
+	bne	.L905
+	adrp	x1, .LANCHOR116
 	adrp	x0, .LC0
 	mov	w2, 188
-	add	x1, x1, :lo12:.LANCHOR92
+	add	x1, x1, :lo12:.LANCHOR116
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L745:
-	b	.L745
-.L746:
-	adrp	x1, .LANCHOR71
+.L907:
+	b	.L907
+.L908:
+	adrp	x1, .LANCHOR96
 	mov	w2, 21
 	strh	wzr, [x0, 696]
-	ldrh	w1, [x1, #:lo12:.LANCHOR71]
+	ldrh	w1, [x1, #:lo12:.LANCHOR96]
 	strh	w3, [x0, 692]
 	sub	w2, w2, w1
 	asr	w4, w3, w2
 	strh	w4, [x0, 694]
-	adrp	x0, .LANCHOR22
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	tbz	x0, 12, .L750
+	adrp	x0, .LANCHOR29
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 12, .L912
 	mov	w0, 1
 	and	w4, w4, 65535
 	lsl	w2, w0, w2
 	mov	w1, w3
-	adrp	x0, .LC27
+	adrp	x0, .LC32
 	sub	w2, w2, #1
-	add	x0, x0, :lo12:.LC27
+	add	x0, x0, :lo12:.LC32
 	bl	printf
-.L750:
+.L912:
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L742:
+.L904:
 	add	x0, x1, x0, sxtw 1
 	strh	w19, [x0, 416]
 	ldrh	w0, [x1, 688]
 	add	w0, w0, 1
 	strh	w0, [x1, 688]
-.L740:
-	ldr	x0, [x20, #:lo12:.LANCHOR46]
+.L902:
+	ldr	x0, [x20, #:lo12:.LANCHOR53]
 	ldrh	w1, [x0, 690]
 	add	x1, x1, 336
 	ldrh	w3, [x0, x1, lsl 1]
 	mov	w1, 65533
 	sub	w2, w3, #1
 	cmp	w1, w2, uxth
-	bcs	.L746
-	adrp	x1, .LANCHOR92
+	bcs	.L908
+	adrp	x1, .LANCHOR116
 	adrp	x0, .LC0
 	mov	w2, 193
-	add	x1, x1, :lo12:.LANCHOR92
+	add	x1, x1, :lo12:.LANCHOR116
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L747:
-	b	.L747
+.L909:
+	b	.L909
 	.size	pm_alloc_new_blk, .-pm_alloc_new_blk
 	.section	.text.pm_select_ram_region,"ax",@progbits
 	.align	2
 	.global	pm_select_ram_region
 	.type	pm_select_ram_region, %function
 pm_select_ram_region:
-	adrp	x1, .LANCHOR93
-	add	x1, x1, :lo12:.LANCHOR93
+	adrp	x1, .LANCHOR117
+	add	x1, x1, :lo12:.LANCHOR117
 	mov	x2, 0
 	mov	w3, 65535
-.L759:
+.L921:
 	lsl	x4, x2, 4
 	and	w0, w2, 65535
 	ldrh	w4, [x4, x1]
 	cmp	w4, w3
-	beq	.L758
+	beq	.L920
 	add	x2, x2, 1
 	cmp	x2, 32
-	bne	.L759
+	bne	.L921
 	add	x1, x1, 2
 	mov	w0, w2
 	mov	x3, x1
 	mov	w5, 32768
 	mov	w2, 0
-.L761:
+.L923:
 	ldrh	w4, [x3]
-	tbnz	x4, 15, .L760
+	tbnz	x4, 15, .L922
 	cmp	w4, w5
-	bcs	.L760
+	bcs	.L922
 	mov	w5, w4
 	mov	w0, w2
-.L760:
+.L922:
 	add	w2, w2, 1
 	add	x3, x3, 16
 	and	w2, w2, 65535
 	cmp	w2, 32
-	bne	.L761
+	bne	.L923
 	cmp	w0, 32
-	bne	.L758
-	adrp	x2, .LANCHOR94
+	bne	.L920
+	adrp	x2, .LANCHOR118
 	mov	w3, -1
-	ldrb	w4, [x2, #:lo12:.LANCHOR94]
+	ldrb	w4, [x2, #:lo12:.LANCHOR118]
 	mov	w2, 0
-.L763:
+.L925:
 	ldrh	w6, [x1]
 	cmp	w6, w3
-	bcs	.L762
+	bcs	.L924
 	ldrh	w5, [x1, -2]
 	cmp	w5, w4
 	csel	w3, w3, w6, eq
 	csel	w0, w0, w2, eq
-.L762:
+.L924:
 	add	w2, w2, 1
 	add	x1, x1, 16
 	and	w2, w2, 65535
 	cmp	w2, 32
-	bne	.L763
+	bne	.L925
 	cmp	w0, 32
-	bne	.L758
+	bne	.L920
 	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR95
+	adrp	x1, .LANCHOR119
 	adrp	x0, .LC0
 	mov	w2, 289
 	add	x29, sp, 0
-	add	x1, x1, :lo12:.LANCHOR95
+	add	x1, x1, :lo12:.LANCHOR119
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L764:
-	b	.L764
-.L758:
+.L926:
+	b	.L926
+.L920:
 	ret
 	.size	pm_select_ram_region, .-pm_select_ram_region
 	.section	.text.ftl_memset,"ax",@progbits
@@ -4657,60 +5647,60 @@ flash_lsb_page_tbl_build:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR14
-	cbnz	w0, .L773
-	add	x1, x19, :lo12:.LANCHOR14
+	adrp	x19, .LANCHOR21
+	cbnz	w0, .L935
+	add	x1, x19, :lo12:.LANCHOR21
 	mov	x0, 0
-.L774:
+.L936:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 256
-	bne	.L774
-.L780:
-	adrp	x20, .LANCHOR96
-	add	x20, x20, :lo12:.LANCHOR96
+	bne	.L936
+.L942:
+	adrp	x20, .LANCHOR120
+	add	x20, x20, :lo12:.LANCHOR120
 	mov	w2, 1024
 	mov	w1, 255
 	mov	x0, x20
-	add	x19, x19, :lo12:.LANCHOR14
+	add	x19, x19, :lo12:.LANCHOR21
 	bl	ftl_memset
 	mov	x0, 0
-.L775:
+.L937:
 	ldrh	w1, [x0, x19]
 	add	x0, x0, 2
 	cmp	x0, 512
 	strh	w1, [x20, w1, sxtw 1]
-	bne	.L775
+	bne	.L937
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L773:
+.L935:
 	cmp	w0, 1
-	bne	.L776
-	add	x3, x19, :lo12:.LANCHOR14
+	bne	.L938
+	add	x3, x19, :lo12:.LANCHOR21
 	mov	x1, 0
-.L779:
+.L941:
 	and	w0, w1, 65535
 	cmp	x1, 3
-	bls	.L777
+	bls	.L939
 	ubfiz	w2, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 2
 	sub	w0, w2, w0
 	and	w0, w0, 65535
-.L777:
+.L939:
 	strh	w0, [x3, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L779
-	b	.L780
-.L776:
+	bne	.L941
+	b	.L942
+.L938:
 	cmp	w0, 2
-	bne	.L781
-	add	x3, x19, :lo12:.LANCHOR14
+	bne	.L943
+	add	x3, x19, :lo12:.LANCHOR21
 	mov	w1, 65535
 	mov	x0, 0
-.L783:
+.L945:
 	cmp	x0, 2
 	and	w2, w0, 65535
 	csel	w2, w2, w1, cc
@@ -4719,35 +5709,35 @@ flash_lsb_page_tbl_build:
 	add	x0, x0, 1
 	and	w1, w1, 65535
 	cmp	x0, 256
-	bne	.L783
-	b	.L780
-.L781:
+	bne	.L945
+	b	.L942
+.L943:
 	cmp	w0, 3
-	bne	.L784
-	add	x3, x19, :lo12:.LANCHOR14
+	bne	.L946
+	add	x3, x19, :lo12:.LANCHOR21
 	mov	x1, 0
-.L787:
+.L949:
 	and	w0, w1, 65535
 	cmp	x1, 5
-	bls	.L785
+	bls	.L947
 	ubfiz	w2, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 4
 	sub	w0, w2, w0
 	and	w0, w0, 65535
-.L785:
+.L947:
 	strh	w0, [x3, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L787
-	b	.L780
-.L784:
+	bne	.L949
+	b	.L942
+.L946:
 	cmp	w0, 4
-	bne	.L788
-	add	x1, x19, :lo12:.LANCHOR14
+	bne	.L950
+	add	x1, x19, :lo12:.LANCHOR21
 	mov	w2, 1
 	add	x1, x1, 16
-	strh	wzr, [x19, #:lo12:.LANCHOR14]
+	strh	wzr, [x19, #:lo12:.LANCHOR21]
 	strh	w0, [x1, -8]
 	mov	w0, 5
 	strh	w2, [x1, -14]
@@ -4761,7 +5751,7 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1, -10]
 	strh	w0, [x1, -2]
 	mov	w0, 8
-.L790:
+.L952:
 	and	w3, w0, 1
 	ubfiz	w2, w0, 1, 15
 	add	w3, w3, 6
@@ -4770,37 +5760,37 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1], 2
 	and	w0, w0, 65535
 	cmp	w0, 256
-	bne	.L790
-	b	.L780
-.L788:
+	bne	.L952
+	b	.L942
+.L950:
 	cmp	w0, 5
-	bne	.L791
-	add	x1, x19, :lo12:.LANCHOR14
+	bne	.L953
+	add	x1, x19, :lo12:.LANCHOR21
 	mov	x0, 0
-.L792:
+.L954:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 16
-	bne	.L792
+	bne	.L954
 	add	x1, x1, 32
-.L793:
+.L955:
 	strh	w0, [x1], 2
 	add	w0, w0, 2
 	and	w0, w0, 65535
 	cmp	w0, 496
-	bne	.L793
-	b	.L780
-.L791:
+	bne	.L955
+	b	.L942
+.L953:
 	cmp	w0, 8
-	bne	.L780
-	add	x1, x19, :lo12:.LANCHOR14
+	bne	.L942
+	add	x1, x19, :lo12:.LANCHOR21
 	mov	x0, 0
-.L794:
+.L956:
 	strh	w0, [x0, x1]
 	add	x0, x0, 2
 	cmp	x0, 512
-	bne	.L794
-	b	.L780
+	bne	.L956
+	b	.L942
 	.size	flash_lsb_page_tbl_build, .-flash_lsb_page_tbl_build
 	.section	.text.flash_die_info_init,"ax",@progbits
 	.align	2
@@ -4812,25 +5802,25 @@ flash_die_info_init:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR19
-	add	x19, x23, :lo12:.LANCHOR19
+	adrp	x23, .LANCHOR26
+	add	x19, x23, :lo12:.LANCHOR26
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR13
-	adrp	x26, .LANCHOR8
-	adrp	x22, .LANCHOR10
+	adrp	x25, .LANCHOR20
+	adrp	x26, .LANCHOR15
+	adrp	x22, .LANCHOR17
 	ldrh	w0, [x19, 26]
-	add	x21, x22, :lo12:.LANCHOR10
+	add	x21, x22, :lo12:.LANCHOR17
 	ldrb	w1, [x19, 12]
-	adrp	x24, .LANCHOR98
-	strh	w0, [x25, #:lo12:.LANCHOR13]
-	add	x20, x24, :lo12:.LANCHOR98
+	adrp	x24, .LANCHOR122
+	strh	w0, [x25, #:lo12:.LANCHOR20]
+	add	x20, x24, :lo12:.LANCHOR122
 	ldrh	w0, [x19, 10]
 	add	x19, x19, 1
-	strb	wzr, [x26, #:lo12:.LANCHOR8]
+	strb	wzr, [x26, #:lo12:.LANCHOR15]
 	sdiv	w0, w0, w1
-	adrp	x1, .LANCHOR97
-	strh	w0, [x1, #:lo12:.LANCHOR97]
+	adrp	x1, .LANCHOR121
+	strh	w0, [x1, #:lo12:.LANCHOR121]
 	mov	w1, 0
 	mov	x0, x21
 	bl	ftl_memset
@@ -4838,34 +5828,34 @@ flash_die_info_init:
 	mov	w1, 0
 	mov	x0, x20
 	bl	ftl_memset
-	ldrb	w13, [x23, #:lo12:.LANCHOR19]
+	ldrb	w13, [x23, #:lo12:.LANCHOR26]
 	mov	x7, x23
-	adrp	x14, .LANCHOR26
-	add	x11, x26, :lo12:.LANCHOR8
-	add	x23, x14, :lo12:.LANCHOR26
+	adrp	x14, .LANCHOR33
+	add	x11, x26, :lo12:.LANCHOR15
+	add	x23, x14, :lo12:.LANCHOR33
 	mov	x8, 0
-.L811:
+.L973:
 	mov	w2, w13
 	add	x1, x23, x8, lsl 3
 	mov	x0, x19
 	bl	flash_mem_cmp8
-	cbnz	w0, .L810
+	cbnz	w0, .L972
 	ldrb	w1, [x11]
 	add	w0, w1, 1
 	strb	w0, [x11]
 	str	wzr, [x20, x1, lsl 2]
 	strb	w8, [x21, x1]
-.L810:
+.L972:
 	add	x8, x8, 1
 	cmp	x8, 4
-	bne	.L811
-	add	x0, x7, :lo12:.LANCHOR19
+	bne	.L973
+	add	x0, x7, :lo12:.LANCHOR26
 	ldrb	w1, [x0, 8]
 	cmp	w1, 2
-	beq	.L812
-.L816:
-	add	x7, x7, :lo12:.LANCHOR19
-	ldrb	w0, [x26, #:lo12:.LANCHOR8]
+	beq	.L974
+.L978:
+	add	x7, x7, :lo12:.LANCHOR26
+	ldrb	w0, [x26, #:lo12:.LANCHOR15]
 	ldp	x19, x20, [sp, 16]
 	ldrb	w1, [x7, 13]
 	ldp	x21, x22, [sp, 32]
@@ -4875,30 +5865,30 @@ flash_die_info_init:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	mul	w0, w0, w1
-	adrp	x1, .LANCHOR99
-	strh	w0, [x1, #:lo12:.LANCHOR99]
+	adrp	x1, .LANCHOR123
+	strh	w0, [x1, #:lo12:.LANCHOR123]
 	ret
-.L812:
-	ldrh	w1, [x25, #:lo12:.LANCHOR13]
-	add	x14, x14, :lo12:.LANCHOR26
+.L974:
+	ldrh	w1, [x25, #:lo12:.LANCHOR20]
+	add	x14, x14, :lo12:.LANCHOR33
 	ldrb	w11, [x0, 13]
 	add	x8, x0, 1
 	ldrb	w20, [x0, 23]
-	add	x19, x26, :lo12:.LANCHOR8
-	add	x15, x24, :lo12:.LANCHOR98
-	add	x22, x22, :lo12:.LANCHOR10
+	add	x19, x26, :lo12:.LANCHOR15
+	add	x15, x24, :lo12:.LANCHOR122
+	add	x22, x22, :lo12:.LANCHOR17
 	mov	x12, 0
 	mul	w11, w11, w1
 	ldrh	w1, [x0, 14]
 	and	w1, w1, 65280
 	mul	w11, w11, w1
 	lsl	w21, w11, 1
-.L815:
+.L977:
 	mov	w2, w13
 	add	x1, x14, x12, lsl 3
 	mov	x0, x8
 	bl	flash_mem_cmp8
-	cbnz	w0, .L813
+	cbnz	w0, .L975
 	ldrb	w1, [x19]
 	cmp	w20, 0
 	csel	w2, w11, w21, eq
@@ -4906,26 +5896,12 @@ flash_die_info_init:
 	strb	w0, [x19]
 	str	w2, [x15, x1, lsl 2]
 	strb	w12, [x22, x1]
-.L813:
+.L975:
 	add	x12, x12, 1
 	cmp	x12, 4
-	bne	.L815
-	b	.L816
+	bne	.L977
+	b	.L978
 	.size	flash_die_info_init, .-flash_die_info_init
-	.section	.text.FlashReadFacBbtData,"ax",@progbits
-	.align	2
-	.global	FlashReadFacBbtData
-	.type	FlashReadFacBbtData, %function
-FlashReadFacBbtData:
-	stp	x29, x30, [sp, -16]!
-	lsr	w2, w2, 3
-	mov	w1, 0
-	add	x29, sp, 0
-	bl	ftl_memset
-	mov	w0, 0
-	ldp	x29, x30, [sp], 16
-	ret
-	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
 	.section	.text.lpa_hash_init,"ax",@progbits
 	.align	2
 	.global	lpa_hash_init
@@ -4934,19 +5910,19 @@ lpa_hash_init:
 	stp	x29, x30, [sp, -16]!
 	mov	w2, 512
 	mov	w1, 255
-	adrp	x0, .LANCHOR81
+	adrp	x0, .LANCHOR104
 	add	x29, sp, 0
-	add	x0, x0, :lo12:.LANCHOR81
+	add	x0, x0, :lo12:.LANCHOR104
 	bl	ftl_memset
-	adrp	x0, .LANCHOR79
+	adrp	x0, .LANCHOR80
 	mov	w1, 255
 	ldp	x29, x30, [sp], 16
-	ldrh	w2, [x0, #:lo12:.LANCHOR79]
-	adrp	x0, .LANCHOR69
-	ldrb	w0, [x0, #:lo12:.LANCHOR69]
+	ldrh	w2, [x0, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR72
+	ldrb	w0, [x0, #:lo12:.LANCHOR72]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR83
-	ldr	x0, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR106
+	ldr	x0, [x0, #:lo12:.LANCHOR106]
 	lsl	w2, w2, 2
 	b	ftl_memset
 	.size	lpa_hash_init, .-lpa_hash_init
@@ -4956,10103 +5932,8499 @@ lpa_hash_init:
 	.type	lpa_rebuild_hash, %function
 lpa_rebuild_hash:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LANCHOR22
+	adrp	x0, .LANCHOR29
 	add	x29, sp, 0
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	tbz	x0, 12, .L828
-	adrp	x1, .LANCHOR100
-	adrp	x0, .LC28
+	tbz	x0, 12, .L988
+	adrp	x1, .LANCHOR124
+	adrp	x0, .LC33
 	mov	w3, 0
-	mov	w2, 190
-	add	x1, x1, :lo12:.LANCHOR100
-	add	x0, x0, :lo12:.LC28
+	mov	w2, 219
+	add	x1, x1, :lo12:.LANCHOR124
+	add	x0, x0, :lo12:.LC33
 	bl	printf
-.L828:
-	adrp	x20, .LANCHOR79
-	adrp	x22, .LANCHOR69
-	adrp	x19, .LANCHOR81
-	add	x19, x19, :lo12:.LANCHOR81
+.L988:
+	adrp	x20, .LANCHOR80
+	adrp	x22, .LANCHOR72
+	adrp	x19, .LANCHOR104
+	add	x19, x19, :lo12:.LANCHOR104
 	mov	w2, 512
 	mov	w1, 255
 	mov	x0, x19
 	bl	ftl_memset
-	ldrh	w2, [x20, #:lo12:.LANCHOR79]
-	adrp	x21, .LANCHOR83
-	ldrb	w0, [x22, #:lo12:.LANCHOR69]
+	ldrh	w2, [x20, #:lo12:.LANCHOR80]
+	adrp	x21, .LANCHOR106
+	ldrb	w0, [x22, #:lo12:.LANCHOR72]
 	mov	w1, 255
-	add	x20, x20, :lo12:.LANCHOR79
+	add	x20, x20, :lo12:.LANCHOR80
 	mul	w2, w2, w0
-	ldr	x0, [x21, #:lo12:.LANCHOR83]
+	ldr	x0, [x21, #:lo12:.LANCHOR106]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	adrp	x0, .LANCHOR82
-	ldrb	w3, [x22, #:lo12:.LANCHOR69]
-	ldr	x5, [x21, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR105
+	ldrb	w3, [x22, #:lo12:.LANCHOR72]
+	ldr	x5, [x21, #:lo12:.LANCHOR106]
 	mov	w1, 0
-	ldr	x4, [x0, #:lo12:.LANCHOR82]
-.L829:
+	ldr	x4, [x0, #:lo12:.LANCHOR105]
+.L989:
 	ldrh	w0, [x20]
 	mul	w0, w0, w3
 	cmp	w1, w0, lsl 1
-	blt	.L831
+	blt	.L991
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L831:
+.L991:
 	uxtw	x2, w1
 	ldr	w0, [x4, x2, lsl 2]
 	cmn	w0, #1
-	beq	.L830
+	beq	.L990
 	and	x0, x0, 255
 	ldrh	w6, [x19, x0, lsl 1]
 	strh	w1, [x19, x0, lsl 1]
 	strh	w6, [x5, x2, lsl 1]
-.L830:
+.L990:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L829
+	b	.L989
 	.size	lpa_rebuild_hash, .-lpa_rebuild_hash
-	.section	.text.ftl_open_sblk_init,"ax",@progbits
+	.section	.text.zftl_read_flash_info,"ax",@progbits
 	.align	2
-	.global	ftl_open_sblk_init
-	.type	ftl_open_sblk_init, %function
-ftl_open_sblk_init:
-	stp	x29, x30, [sp, -80]!
+	.global	zftl_read_flash_info
+	.type	zftl_read_flash_info, %function
+zftl_read_flash_info:
+	stp	x29, x30, [sp, -32]!
+	mov	w2, 11
+	mov	w1, 0
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR69
-	stp	x21, x22, [sp, 32]
+	str	x19, [sp, 16]
 	mov	x19, x0
-	stp	x23, x24, [sp, 48]
-	adrp	x21, .LC26
-	adrp	x23, .LANCHOR79
-	mov	w22, w1
-	add	x23, x23, :lo12:.LANCHOR79
-	add	x20, x20, :lo12:.LANCHOR69
-	add	x21, x21, :lo12:.LC26
-	stp	x25, x26, [sp, 64]
-.L840:
-.L843:
-	mov	w0, w22
-	bl	ftl_alloc_sblk
-	mov	w1, 0
-	and	w24, w0, 65535
-	bl	ftl_erase_sblk
-	add	x1, x19, 16
-	mov	w0, w24
-	bl	ftl_get_blk_list_in_sblk
-	and	w0, w0, 255
-	ldrh	w1, [x23]
-	cmp	w22, 2
-	strb	w0, [x19, 9]
-	strh	w24, [x19]
-	strh	wzr, [x19, 2]
-	mul	w0, w1, w0
-	strb	wzr, [x19, 5]
-	strh	w0, [x19, 6]
-	strh	wzr, [x19, 10]
-	strb	w22, [x19, 4]
-	beq	.L844
-	ldrb	w0, [x20]
-	mul	w0, w1, w0
-	and	w0, w0, 65535
-.L841:
-	ldrb	w2, [x20]
-	adrp	x26, .LANCHOR56
-	strh	w0, [x19, 12]
-	ubfiz	x25, x24, 1, 16
-	mul	w2, w2, w1
-	adrp	x1, .LANCHOR82
-	ldr	x3, [x1, #:lo12:.LANCHOR82]
-	mov	w1, 255
-	lsl	w2, w2, 2
-	add	x0, x3, x0, uxth 2
 	bl	ftl_memset
-	ldr	x0, [x26, #:lo12:.LANCHOR56]
-	ldrh	w1, [x19, 6]
-	strh	w1, [x0, x25]
-	ldrb	w0, [x19, 9]
-	cbnz	w0, .L839
-	mov	w1, w24
-	mov	x0, x21
-	bl	printf
-	ldr	x0, [x26, #:lo12:.LANCHOR56]
-	mov	w1, -1
-	strh	w1, [x0, x25]
-	mov	w0, 7
-	strb	w0, [x19, 4]
-	b	.L843
-.L844:
-	mov	w0, 0
-	b	.L841
-.L839:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
+	adrp	x1, .LANCHOR26
+	add	x1, x1, :lo12:.LANCHOR26
+	adrp	x0, .LANCHOR20
+	mov	w4, 1
+	ldrb	w3, [x1, 9]
+	ldrh	w0, [x0, #:lo12:.LANCHOR20]
+	mul	w0, w3, w0
+	and	w2, w0, 65535
+	strb	w2, [x19, 4]
+	ubfx	x0, x2, 8, 8
+	strb	w0, [x19, 5]
+	adrp	x0, .LANCHOR34
+	ldrb	w0, [x0, #:lo12:.LANCHOR34]
+	strb	w0, [x19, 7]
+	ldrb	w0, [x1, 13]
+	mul	w0, w0, w2
+	ldrh	w2, [x1, 14]
+	strb	wzr, [x19, 10]
+	mul	w0, w0, w2
+	ldrb	w2, [x1, 8]
+	strb	w3, [x19, 6]
+	mul	w0, w0, w2
+	strb	w0, [x19]
+	ubfx	x2, x0, 8, 8
+	strb	w2, [x19, 1]
+	ubfx	x2, x0, 16, 8
+	lsr	w0, w0, 24
+	strb	w2, [x19, 2]
+	adrp	x2, .LANCHOR17
+	strb	w0, [x19, 3]
+	mov	w0, 32
+	strb	w0, [x19, 8]
+	add	x2, x2, :lo12:.LANCHOR17
+	ldrb	w0, [x1, 7]
+	mov	x1, 0
+	strb	w0, [x19, 9]
+	adrp	x0, .LANCHOR15
+	ldrb	w3, [x0, #:lo12:.LANCHOR15]
+.L1000:
+	cmp	w3, w1, uxtb
+	bhi	.L1001
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
 	ret
-	.size	ftl_open_sblk_init, .-ftl_open_sblk_init
-	.section	.text.pm_free_sblk,"ax",@progbits
+.L1001:
+	ldrb	w0, [x1, x2]
+	add	x1, x1, 1
+	ldrb	w5, [x19, 10]
+	lsl	w0, w4, w0
+	orr	w0, w0, w5
+	strb	w0, [x19, 10]
+	b	.L1000
+	.size	zftl_read_flash_info, .-zftl_read_flash_info
+	.section	.text.gc_static_wearleveling,"ax",@progbits
 	.align	2
-	.global	pm_free_sblk
-	.type	pm_free_sblk, %function
-pm_free_sblk:
-	stp	x29, x30, [sp, -368]!
+	.global	gc_static_wearleveling
+	.type	gc_static_wearleveling, %function
+gc_static_wearleveling:
+	stp	x29, x30, [sp, -160]!
+	mov	w1, 10240
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR101
 	stp	x21, x22, [sp, 32]
-	ldrh	w0, [x20, #:lo12:.LANCHOR101]
+	adrp	x22, .LANCHOR53
+	stp	x19, x20, [sp, 16]
+	ldr	x5, [x22, #:lo12:.LANCHOR53]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	cmp	w0, 128
 	stp	x27, x28, [sp, 80]
-	bls	.L847
-	adrp	x1, .LANCHOR102
-	adrp	x0, .LC0
-	mov	w2, 74
-	add	x1, x1, :lo12:.LANCHOR102
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L848:
-	b	.L848
-.L847:
-	add	x23, x29, 112
-	mov	w2, 256
+	ldr	w0, [x5, 32]
+	cmp	w0, w1
+	bls	.L1004
+	ldr	w1, [x5, 36]
+	add	w1, w1, w0, lsr 10
+	and	w0, w0, 1023
+	stp	w0, w1, [x5, 32]
+.L1004:
+	adrp	x25, .LANCHOR5
+	ldr	w3, [x5, 36]
+	ldr	x0, [x25, #:lo12:.LANCHOR5]
+	ldr	w1, [x0, 568]
+	ldr	w2, [x0, 12]
+	add	w1, w1, 860160
+	add	w1, w1, 3840
+	cmp	w2, w1
+	bhi	.L1005
+	ldr	w1, [x0, 572]
+	add	w1, w1, 32
+	cmp	w3, w1
+	bls	.L1003
+.L1005:
+	adrp	x21, .LANCHOR3
+	ldrh	w10, [x5, 134]
+	adrp	x23, .LANCHOR2
+	mov	w27, 65535
+	ldr	x8, [x21, #:lo12:.LANCHOR3]
+	mov	w19, w27
+	ldrh	w11, [x23, #:lo12:.LANCHOR2]
+	mov	w12, w27
+	str	w2, [x0, 568]
+	mov	w4, 0
+	add	x8, x8, x10, uxth 2
+	str	w3, [x0, 572]
 	mov	w1, 0
-	mov	x0, x23
+	mov	w20, 0
+	mov	w26, 0
+	mov	w3, 0
+	mov	w2, 0
+.L1007:
+	cmp	w10, w11
+	bcc	.L1011
+	ldrh	w0, [x5, 96]
+	cmp	w0, w20
+	bcs	.L1012
+	strh	w20, [x5, 96]
+.L1012:
+	ldrh	w0, [x5, 98]
+	cmp	w0, w26
+	bcs	.L1013
+	strh	w26, [x5, 98]
+.L1013:
+	udiv	w3, w3, w1
+	adrp	x24, .LANCHOR29
+	udiv	w4, w4, w2
+	ldr	w0, [x24, #:lo12:.LANCHOR29]
+	strh	w3, [x5, 88]
+	strh	w4, [x5, 90]
+	tbz	x0, 10, .L1014
+	adrp	x0, .LC34
+	and	w4, w4, 65535
+	and	w3, w3, 65535
+	add	x0, x0, :lo12:.LC34
+	bl	printf
+.L1014:
+	ldr	w0, [x24, #:lo12:.LANCHOR29]
+	adrp	x28, .LANCHOR125
+	tbz	x0, 10, .L1015
+	adrp	x0, .LANCHOR126
+	ldrh	w6, [x28, #:lo12:.LANCHOR125]
+	mov	w4, w26
+	mov	w3, w20
+	ldrh	w5, [x0, #:lo12:.LANCHOR126]
+	mov	w2, w19
+	adrp	x0, .LC35
+	mov	w1, w27
+	add	x0, x0, :lo12:.LC35
+	bl	printf
+.L1015:
+	ldr	x0, [x25, #:lo12:.LANCHOR5]
+	mov	w1, 255
+	mov	w2, 128
+	add	x0, x0, 264
+	strh	wzr, [x0, -142]
 	bl	ftl_memset
-	adrp	x24, .LANCHOR46
-	adrp	x0, .LANCHOR71
-	mov	w2, 21
-	ldr	x5, [x24, #:lo12:.LANCHOR46]
-	ldrh	w8, [x0, #:lo12:.LANCHOR71]
-	ldrh	w11, [x20, #:lo12:.LANCHOR101]
-	add	x4, x5, 704
-	sub	w0, w2, w8
-	mov	w2, 1
-	ldrh	w1, [x5, 698]
-	lsl	w2, w2, w0
-	adrp	x0, .LANCHOR70
-	add	x1, x1, 176
-	sub	w2, w2, #1
-	ldrb	w10, [x0, #:lo12:.LANCHOR70]
-	add	x1, x5, x1, lsl 2
-	mov	x27, x0
-.L849:
-	cmp	x4, x1
-	bne	.L853
-	adrp	x1, .LANCHOR69
-	adrp	x0, .LANCHOR79
-	add	x20, x20, :lo12:.LANCHOR101
-	add	x27, x27, :lo12:.LANCHOR70
-	ldrh	w2, [x0, #:lo12:.LANCHOR79]
-	add	x26, x1, :lo12:.LANCHOR69
-	ldrb	w21, [x1, #:lo12:.LANCHOR69]
-	add	x25, x0, :lo12:.LANCHOR79
-	mov	w28, 0
-	mov	w19, 0
-	mul	w21, w21, w2
-	mov	w2, 65535
-	and	w21, w21, 65535
-.L854:
-	ldrh	w0, [x20]
-	cmp	w0, w19
-	bhi	.L859
-	mov	w0, w28
+	sub	w0, w26, w19
+	str	w0, [x29, 148]
+	ldrh	w0, [x28, #:lo12:.LANCHOR125]
+	ldr	w1, [x29, 148]
+	cmp	w1, w0
+	bgt	.L1016
+	adrp	x1, .LANCHOR126
+	sub	w0, w20, w27
+	ldrh	w1, [x1, #:lo12:.LANCHOR126]
+	cmp	w0, w1
+	bgt	.L1016
+.L1023:
+	cbnz	w19, .L1017
+.L1025:
+	cbz	w27, .L1003
+	ldr	x2, [x22, #:lo12:.LANCHOR53]
+	ldr	x1, [x21, #:lo12:.LANCHOR3]
+	ldrh	w5, [x23, #:lo12:.LANCHOR2]
+	ldrh	w0, [x2, 134]
+	add	x1, x1, x0, uxth 2
+.L1030:
+	cmp	w0, w5
+	bcc	.L1032
+	ldrh	w0, [x2, 74]
+	add	w0, w27, w0
+	strh	w0, [x2, 74]
+	ldrh	w0, [x2, 96]
+	cmp	w27, w0
+	bcs	.L1003
+	sub	w7, w0, w27
+	strh	w7, [x2, 96]
+.L1003:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 368
+	ldp	x29, x30, [sp], 160
 	ret
-.L853:
-	ldr	w0, [x4]
-	add	x6, x5, 416
-	mov	x3, 0
-	lsr	w0, w0, w8
-	and	w0, w0, w2
-	udiv	w0, w0, w10
-	and	w0, w0, 65535
-.L850:
-	cmp	w11, w3, uxth
-	bhi	.L852
-	add	x4, x4, 4
-	b	.L849
-.L852:
-	ldrh	w7, [x6]
-	cmp	w7, w0
-	bne	.L851
-	ldrh	w7, [x23, x3, lsl 1]
-	add	w7, w7, 1
-	strh	w7, [x23, x3, lsl 1]
-.L851:
-	add	x3, x3, 1
-	add	x6, x6, 2
-	b	.L850
-.L859:
-	ldr	x1, [x24, #:lo12:.LANCHOR46]
-	sxtw	x22, w19
-	add	x0, x22, 208
-	ldrb	w3, [x27]
-	ldrh	w0, [x1, x0, lsl 1]
-	ldrh	w1, [x1, 692]
-	sdiv	w1, w1, w3
-	cmp	w1, w0
-	bne	.L855
-	ldrb	w1, [x26]
-	ldrh	w3, [x25]
-	mul	w1, w1, w3
-	strh	w1, [x23, x22, lsl 1]
-.L855:
-	ldrh	w1, [x23, x22, lsl 1]
-	cmp	w21, w1
-	bls	.L856
-	cbnz	w1, .L860
-.L858:
-	cmp	w0, w2
-	beq	.L857
-	str	w2, [x29, 108]
-	bl	ftl_free_sblk
-	ldr	x0, [x24, #:lo12:.LANCHOR46]
-	add	x22, x22, 208
-	mov	w1, -1
-	ldr	w2, [x29, 108]
-	strh	w1, [x0, x22, lsl 1]
-	ldrh	w1, [x0, 688]
-	sub	w1, w1, #1
-	strh	w1, [x0, 688]
-	b	.L857
-.L856:
-	cbz	w1, .L858
-.L857:
-	add	w19, w19, 1
+.L1011:
+	ldrb	w0, [x8, 2]
+	tbz	x0, 3, .L1008
+	ldr	w0, [x8]
+	ldrh	w6, [x8]
+	ubfx	x0, x0, 11, 8
+	and	w6, w6, 2047
+.L1009:
+	cmp	w6, w27
+	add	w1, w1, 1
+	csel	w7, w6, w27, cc
+	cmp	w6, w20
+	csel	w20, w6, w20, hi
+	and	w1, w1, 65535
+	add	w3, w3, w6
+	and	w27, w7, 65535
+	and	w20, w20, 65535
+	cmp	w0, w12
+	bne	.L1033
+	b	.L1034
+.L1008:
+	tst	w0, 24
+	bne	.L1010
+	ldrh	w6, [x8]
+	mov	w0, 65535
+	and	w6, w6, 2047
+	b	.L1009
+.L1010:
+	ldr	w0, [x8]
+	ubfx	x0, x0, 11, 8
+.L1033:
+	cmp	w0, w19
+	add	w2, w2, 1
+	csel	w19, w0, w19, cc
+	cmp	w0, w26
+	add	w4, w4, w0
+	csel	w0, w0, w26, hi
+	and	w2, w2, 65535
 	and	w19, w19, 65535
-	b	.L854
-.L860:
-	mov	w28, w19
-	mov	w21, w1
-	b	.L857
-	.size	pm_free_sblk, .-pm_free_sblk
-	.section	.text.ftl_memcpy,"ax",@progbits
-	.align	2
-	.global	ftl_memcpy
-	.type	ftl_memcpy, %function
-ftl_memcpy:
-	uxtw	x2, w2
-	b	memcpy
-	.size	ftl_memcpy, .-ftl_memcpy
-	.section	.text.flash_into_data_init,"ax",@progbits
-	.align	2
-	.global	flash_into_data_init
-	.type	flash_into_data_init, %function
-flash_into_data_init:
-	stp	x29, x30, [sp, -32]!
-	mov	w2, 2048
-	mov	w1, 0
-	add	x29, sp, 0
-	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR5
-	ldr	x0, [x19, #:lo12:.LANCHOR5]
-	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR5]
-	mov	w1, 21321
-	movk	w1, 0x5359, lsl 16
-	mov	w2, 32
-	add	x0, x0, 80
-	str	w1, [x0, -80]
-	mov	w1, 2032
-	str	w1, [x0, -72]
-	mov	w1, 1
-	strh	w1, [x0, -64]
-	adrp	x1, .LANCHOR103
-	add	x1, x1, :lo12:.LANCHOR103
-	bl	ftl_memcpy
-	ldr	x0, [x19, #:lo12:.LANCHOR5]
-	mov	w2, 32
-	ldr	x19, [sp, 16]
-	adrp	x1, .LANCHOR19
-	ldp	x29, x30, [sp], 32
-	add	x1, x1, :lo12:.LANCHOR19
-	add	x0, x0, 48
-	b	ftl_memcpy
-	.size	flash_into_data_init, .-flash_into_data_init
-	.section	.text.ftl_memcpy32,"ax",@progbits
-	.align	2
-	.global	ftl_memcpy32
-	.type	ftl_memcpy32, %function
-ftl_memcpy32:
-	mov	x3, 0
-.L866:
-	cmp	w2, w3
-	bhi	.L867
-	ret
-.L867:
-	ldr	w4, [x1, x3, lsl 2]
-	str	w4, [x0, x3, lsl 2]
-	add	x3, x3, 1
-	b	.L866
-	.size	ftl_memcpy32, .-ftl_memcpy32
-	.section	.text.ftl_memcmp,"ax",@progbits
-	.align	2
-	.global	ftl_memcmp
-	.type	ftl_memcmp, %function
-ftl_memcmp:
-	uxtw	x2, w2
-	b	memcmp
-	.size	ftl_memcmp, .-ftl_memcmp
-	.section	.text.rknand_get_clk_rate,"ax",@progbits
-	.align	2
-	.global	rknand_get_clk_rate
-	.type	rknand_get_clk_rate, %function
-rknand_get_clk_rate:
-	mov	w0, 19712
-	movk	w0, 0x8d2, lsl 16
-	ret
-	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
-	.section	.text.ftl_malloc,"ax",@progbits
-	.align	2
-	.global	ftl_malloc
-	.type	ftl_malloc, %function
-ftl_malloc:
+	and	w26, w0, 65535
+.L1034:
+	add	w10, w10, 1
+	add	x8, x8, 4
+	and	w10, w10, 65535
+	b	.L1007
+.L1016:
+	ldr	x0, [x22, #:lo12:.LANCHOR53]
+	adrp	x25, .LANCHOR63
+	stp	wzr, wzr, [x29, 152]
+	ldrh	w26, [x0, 134]
+	add	x0, x23, :lo12:.LANCHOR2
+	str	x0, [x29, 128]
+	adrp	x0, .LANCHOR126
+	add	x0, x0, :lo12:.LANCHOR126
+	str	x0, [x29, 120]
+	add	x0, x25, :lo12:.LANCHOR63
+	str	x0, [x29, 136]
+.L1019:
+	ldr	x0, [x29, 128]
+	ldrh	w0, [x0]
+	cmp	w0, w26
+	bls	.L1023
+	uxtw	x25, w26
+	ldr	x4, [x21, #:lo12:.LANCHOR3]
+	lsl	x3, x25, 2
+	add	x0, x4, x3
+	ldrb	w0, [x0, 2]
+	tst	w0, 192
+	beq	.L1020
+	and	w1, w0, 224
+	cmp	w1, 224
+	beq	.L1020
+	tbz	x0, 4, .L1021
+	ldrh	w0, [x28, #:lo12:.LANCHOR125]
+	ldr	w1, [x29, 148]
+	cmp	w1, w0
+	ble	.L1022
+	ldr	w0, [x4, x3]
+	add	w1, w19, 1
+	ubfx	x0, x0, 11, 8
+	cmp	w0, w1
+	bgt	.L1022
+	stp	x4, x3, [x29, 104]
+	mov	w2, 1
 	mov	w1, 0
-	sxtw	x0, w0
-	b	kmalloc
-	.size	ftl_malloc, .-ftl_malloc
-	.section	.text.nandc_init,"ax",@progbits
-	.align	2
-	.global	nandc_init
-	.type	nandc_init, %function
-nandc_init:
-	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LANCHOR7
-	mov	w2, 6
-	add	x29, sp, 0
-	strb	w2, [x1, #:lo12:.LANCHOR7]
-	adrp	x2, .LANCHOR6
-	str	wzr, [x29, 24]
-	str	x0, [x2, #:lo12:.LANCHOR6]
-	mov	w2, 12336
-	ldr	w3, [x0, 352]
-	movk	w2, 0x5638, lsl 16
-	cmp	w3, w2
-	bne	.L872
-	mov	w2, 8
-	strb	w2, [x1, #:lo12:.LANCHOR7]
-.L872:
-	ldr	w3, [x0, 128]
-	mov	w2, 12336
-	movk	w2, 0x5639, lsl 16
-	cmp	w3, w2
-	bne	.L873
-	mov	w2, 9
-	strb	w2, [x1, #:lo12:.LANCHOR7]
-.L873:
-	ldrb	w1, [x1, #:lo12:.LANCHOR7]
-	cmp	w1, 9
-	adrp	x1, .LANCHOR28
-	bne	.L874
+	mov	w0, w26
+	bl	gc_add_sblk
+	ldr	w0, [x29, 156]
+	ldp	x4, x3, [x29, 104]
+	add	w0, w0, 1
+	str	w0, [x29, 156]
+	ldr	w0, [x24, #:lo12:.LANCHOR29]
+	tbz	x0, 10, .L1022
+	adrp	x0, .LANCHOR4
+	ldr	w6, [x4, x3]
+	ldrh	w5, [x4, x3]
+	ldr	x1, [x0, #:lo12:.LANCHOR4]
+	ldr	x0, [x21, #:lo12:.LANCHOR3]
+	ubfx	x6, x6, 11, 8
+	and	w5, w5, 2047
+	add	x3, x0, x3
+	ldr	x0, [x29, 136]
+	ldrb	w2, [x3, 2]
+	ldrh	w4, [x0, 56]
+	adrp	x0, .LC36
+	ldrh	w3, [x1, x25, lsl 1]
+	add	x0, x0, :lo12:.LC36
+	ubfx	x2, x2, 5, 3
+	mov	w1, w26
+.L1057:
+	bl	printf
+.L1022:
+	ldr	w0, [x29, 156]
+	cmp	w0, 4
+	ldr	w0, [x29, 152]
+	ccmp	w0, 4, 2, ls
+	bhi	.L1023
+.L1020:
+	add	w8, w26, 1
+	and	w26, w8, 65535
+	b	.L1019
+.L1021:
+	ldr	x1, [x29, 120]
+	sub	w0, w20, w27
+	ldrh	w1, [x1]
+	cmp	w0, w1
+	ble	.L1022
+	ldrh	w0, [x4, x3]
+	add	w1, w27, 1
+	and	w0, w0, 2047
+	cmp	w0, w1
+	bgt	.L1022
+	stp	x4, x3, [x29, 104]
 	mov	w2, 1
-	strb	w2, [x1, #:lo12:.LANCHOR28]
-	ldr	w1, [x29, 24]
-	orr	w1, w1, 256
-	str	w1, [x29, 24]
-	ldr	w1, [x29, 24]
-	str	w1, [x0]
-	str	wzr, [x0, 520]
-	mov	w1, 4225
-	str	w1, [x0, 4]
-	mov	w1, 8321
-	str	w1, [x0, 8]
-	mov	w1, 4099
-	movk	w1, 0x10, lsl 16
-	str	w1, [x0, 80]
-	mov	w1, 38
-	str	w1, [x0, 84]
-	mov	w1, 39
-	str	w1, [x0, 84]
-.L875:
-	adrp	x0, .LANCHOR29
-	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR29]
-	adrp	x0, .LANCHOR31
-	strh	wzr, [x0, #:lo12:.LANCHOR31]
-	adrp	x0, .LANCHOR27
-	strb	wzr, [x0, #:lo12:.LANCHOR27]
-	ldp	x29, x30, [sp], 32
-	ret
-.L874:
-	strb	wzr, [x1, #:lo12:.LANCHOR28]
-	ldr	w1, [x29, 24]
-	orr	w1, w1, 256
-	str	w1, [x29, 24]
-	ldr	w1, [x29, 24]
-	str	w1, [x0]
-	str	wzr, [x0, 336]
-	mov	w1, 4225
-	str	w1, [x0, 4]
-	mov	w1, 8321
-	str	w1, [x0, 344]
-	mov	w1, 4099
-	movk	w1, 0x10, lsl 16
-	str	w1, [x0, 304]
-	mov	w1, 38
-	str	w1, [x0, 308]
-	mov	w1, 39
-	str	w1, [x0, 308]
-	mov	w0, 2048
-	bl	ftl_malloc
-	adrp	x1, .LANCHOR30
-	str	x0, [x1, #:lo12:.LANCHOR30]
-	b	.L875
-	.size	nandc_init, .-nandc_init
-	.section	.text.buf_init,"ax",@progbits
+	mov	w1, 0
+	mov	w0, w26
+	bl	gc_add_sblk
+	ldr	w0, [x29, 152]
+	ldp	x4, x3, [x29, 104]
+	add	w0, w0, 1
+	str	w0, [x29, 152]
+	ldr	w0, [x24, #:lo12:.LANCHOR29]
+	tbz	x0, 10, .L1022
+	adrp	x0, .LANCHOR4
+	ldr	w6, [x4, x3]
+	ldrh	w5, [x4, x3]
+	ldr	x1, [x0, #:lo12:.LANCHOR4]
+	ldr	x0, [x21, #:lo12:.LANCHOR3]
+	ubfx	x6, x6, 11, 8
+	and	w5, w5, 2047
+	add	x3, x0, x3
+	ldr	x0, [x29, 136]
+	ldrb	w2, [x3, 2]
+	ldrh	w4, [x0, 56]
+	adrp	x0, .LC37
+	ldrh	w3, [x1, x25, lsl 1]
+	add	x0, x0, :lo12:.LC37
+	ubfx	x2, x2, 5, 3
+	mov	w1, w26
+	b	.L1057
+.L1017:
+	ldr	x2, [x22, #:lo12:.LANCHOR53]
+	ldr	x1, [x21, #:lo12:.LANCHOR3]
+	ldrh	w5, [x23, #:lo12:.LANCHOR2]
+	ldrh	w0, [x2, 134]
+	add	x1, x1, x0, uxth 2
+.L1026:
+	cmp	w0, w5
+	bcc	.L1028
+	ldrh	w0, [x2, 72]
+	add	w0, w19, w0
+	strh	w0, [x2, 72]
+	ldrh	w0, [x2, 98]
+	cmp	w19, w0
+	bcs	.L1025
+	sub	w19, w0, w19
+	strh	w19, [x2, 98]
+	b	.L1025
+.L1028:
+	ldr	w3, [x1]
+	ubfx	x4, x3, 11, 8
+	cmp	w19, w4
+	bhi	.L1027
+	sub	w4, w4, w19
+	bfi	w3, w4, 11, 8
+	str	w3, [x1]
+.L1027:
+	add	w0, w0, 1
+	add	x1, x1, 4
+	and	w0, w0, 65535
+	b	.L1026
+.L1032:
+	ldrh	w3, [x1]
+	and	w4, w3, 2047
+	cmp	w4, w27
+	blt	.L1031
+	sub	w4, w4, w27
+	bfi	w3, w4, 0, 11
+	strh	w3, [x1]
+.L1031:
+	add	w0, w0, 1
+	add	x1, x1, 4
+	and	w0, w0, 65535
+	b	.L1030
+	.size	gc_static_wearleveling, .-gc_static_wearleveling
+	.section	.text.zftl_sblk_list_init,"ax",@progbits
 	.align	2
-	.global	buf_init
-	.type	buf_init, %function
-buf_init:
-	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LANCHOR36
+	.global	zftl_sblk_list_init
+	.type	zftl_sblk_list_init, %function
+zftl_sblk_list_init:
+	stp	x29, x30, [sp, -192]!
+	mov	w0, 6
+	mov	w1, 0
 	add	x29, sp, 0
+	stp	x27, x28, [sp, 80]
+	adrp	x27, .LANCHOR2
+	adrp	x28, .LANCHOR0
 	stp	x19, x20, [sp, 16]
-	add	x19, x0, :lo12:.LANCHOR36
+	ldrh	w2, [x27, #:lo12:.LANCHOR2]
+	adrp	x20, .LANCHOR86
 	stp	x21, x22, [sp, 32]
-	mov	x20, x0
-	adrp	x22, .LANCHOR45
-	add	x22, x22, :lo12:.LANCHOR45
-	mov	w21, 0
-.L878:
-	and	w0, w21, 255
-	strb	w0, [x19, 1]
-	add	w1, w0, 1
-	ldrb	w0, [x22]
-	strb	w1, [x19]
-	add	w21, w21, 1
-	strb	wzr, [x19, 2]
-	add	x19, x19, 64
-	str	xzr, [x19, -48]
-	lsl	w0, w0, 9
-	bl	ftl_malloc
-	str	x0, [x19, -56]
-	ldrb	w0, [x22]
-	lsl	w0, w0, 1
-	bl	ftl_malloc
-	str	x0, [x19, -40]
-	cmp	w21, 32
-	bne	.L878
-	add	x0, x20, :lo12:.LANCHOR36
-	mov	w1, -1
-	strb	w1, [x0, 1984]
-	adrp	x0, .LANCHOR37
-	strb	wzr, [x0, #:lo12:.LANCHOR37]
-	adrp	x0, .LANCHOR38
+	adrp	x19, .LANCHOR82
+	stp	x23, x24, [sp, 48]
+	adrp	x22, .LANCHOR93
+	stp	x25, x26, [sp, 64]
+	adrp	x25, .LANCHOR53
+	mul	w2, w2, w0
+	ldr	x0, [x28, #:lo12:.LANCHOR0]
+	adrp	x24, .LANCHOR89
+	adrp	x23, .LANCHOR91
+	adrp	x21, .LANCHOR84
+	bl	ftl_memset
+	str	x28, [x29, 168]
+	adrp	x2, .LANCHOR72
+	adrp	x3, .LANCHOR80
+	adrp	x10, .LANCHOR90
+	adrp	x8, .LANCHOR92
+	ldrb	w0, [x2, #:lo12:.LANCHOR72]
+	adrp	x7, .LANCHOR94
+	ldrh	w1, [x3, #:lo12:.LANCHOR80]
+	adrp	x6, .LANCHOR76
+	adrp	x5, .LANCHOR75
+	adrp	x4, .LANCHOR74
+	str	xzr, [x10, #:lo12:.LANCHOR90]
+	adrp	x28, .LANCHOR3
+	str	xzr, [x8, #:lo12:.LANCHOR92]
+	mul	w1, w0, w1
+	mov	w0, 32768
+	str	xzr, [x7, #:lo12:.LANCHOR94]
+	str	xzr, [x6, #:lo12:.LANCHOR76]
+	str	xzr, [x5, #:lo12:.LANCHOR75]
+	sdiv	w0, w0, w1
+	str	xzr, [x4, #:lo12:.LANCHOR74]
+	strh	wzr, [x24, #:lo12:.LANCHOR89]
+	strh	wzr, [x23, #:lo12:.LANCHOR91]
+	strh	wzr, [x22, #:lo12:.LANCHOR93]
+	sxth	w0, w0
+	str	w0, [x29, 188]
+	ldr	x0, [x25, #:lo12:.LANCHOR53]
+	strh	wzr, [x21, #:lo12:.LANCHOR84]
+	strh	wzr, [x20, #:lo12:.LANCHOR86]
+	strh	wzr, [x19, #:lo12:.LANCHOR82]
+	strh	wzr, [x0, 146]
+	ldrsh	w26, [x0, 134]
+	add	x0, x27, :lo12:.LANCHOR2
+	adrp	x27, .LC38
+	add	x27, x27, :lo12:.LC38
+	stp	x3, x2, [x29, 104]
+	stp	x4, x5, [x29, 120]
+	stp	x6, x7, [x29, 136]
+	stp	x8, x10, [x29, 152]
+	str	x0, [x29, 176]
+.L1059:
+	ldr	x0, [x29, 176]
+	ldrh	w0, [x0]
+	cmp	w26, w0
+	blt	.L1075
+	ldr	x0, [x25, #:lo12:.LANCHOR53]
+	ldrh	w1, [x24, #:lo12:.LANCHOR89]
+	ldp	x25, x26, [sp, 64]
+	strh	w1, [x0, 114]
+	ldrh	w1, [x23, #:lo12:.LANCHOR91]
+	strh	w1, [x0, 118]
+	ldrh	w1, [x22, #:lo12:.LANCHOR93]
+	strh	w1, [x0, 116]
+	ldrh	w1, [x21, #:lo12:.LANCHOR84]
+	strh	w1, [x0, 122]
+	ldrh	w1, [x20, #:lo12:.LANCHOR86]
+	strh	w1, [x0, 120]
+	ldrh	w1, [x19, #:lo12:.LANCHOR82]
+	strh	w1, [x0, 124]
 	ldp	x19, x20, [sp, 16]
-	strb	w21, [x0, #:lo12:.LANCHOR38]
 	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 48
+	ldp	x23, x24, [sp, 48]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 192
 	ret
-	.size	buf_init, .-buf_init
-	.section	.text.gc_init,"ax",@progbits
-	.align	2
-	.global	gc_init
-	.type	gc_init, %function
-gc_init:
-	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR67
-	mov	w2, 328
+.L1075:
+	ldr	x4, [x28, #:lo12:.LANCHOR3]
+	sxtw	x2, w26
+	add	x4, x4, x2, lsl 2
+	ldrb	w6, [x4, 3]
+	cbz	w6, .L1076
+	ldr	x0, [x29, 112]
 	mov	w1, 0
-	add	x29, sp, 0
-	strb	wzr, [x0, #:lo12:.LANCHOR67]
-	adrp	x0, .LANCHOR104
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR58
-	add	x19, x20, :lo12:.LANCHOR58
-	strb	wzr, [x0, #:lo12:.LANCHOR104]
-	mov	x0, x19
-	bl	ftl_memset
-	mov	w0, -1
-	strh	w0, [x20, #:lo12:.LANCHOR58]
-	adrp	x0, .LANCHOR79
-	str	xzr, [x19, 8]
-	adrp	x4, .LANCHOR105
-	adrp	x20, .LANCHOR68
-	ldrh	w1, [x0, #:lo12:.LANCHOR79]
-	lsr	w3, w1, 1
-	lsr	w0, w1, 2
-	strh	w3, [x19, 38]
-	strh	w0, [x19, 36]
-	adrp	x19, .LANCHOR69
-	ldrb	w2, [x19, #:lo12:.LANCHOR69]
-	mul	w1, w1, w2
-	sub	w1, w1, #32
-	strh	w1, [x4, #:lo12:.LANCHOR105]
-	adrp	x1, .LANCHOR106
-	strh	w3, [x1, #:lo12:.LANCHOR106]
-	adrp	x1, .LANCHOR57
-	strh	w0, [x1, #:lo12:.LANCHOR57]
-	ldrh	w0, [x20, #:lo12:.LANCHOR68]
-	mul	w0, w0, w2
-	lsl	w0, w0, 2
-	bl	ftl_malloc
-	adrp	x1, .LANCHOR107
-	str	x0, [x1, #:lo12:.LANCHOR107]
-	ldrb	w1, [x19, #:lo12:.LANCHOR69]
-	ldrh	w0, [x20, #:lo12:.LANCHOR68]
-	mul	w0, w0, w1
-	lsl	w0, w0, 2
-	bl	ftl_malloc
-	adrp	x1, .LANCHOR108
-	str	x0, [x1, #:lo12:.LANCHOR108]
-	ldrh	w1, [x20, #:lo12:.LANCHOR68]
-	ldrb	w0, [x19, #:lo12:.LANCHOR69]
-	mul	w0, w1, w0
-	bl	ftl_malloc
-	adrp	x1, .LANCHOR65
-	str	x0, [x1, #:lo12:.LANCHOR65]
-	ldrb	w1, [x19, #:lo12:.LANCHOR69]
-	ldrh	w0, [x20, #:lo12:.LANCHOR68]
-	mul	w0, w0, w1
-	lsl	w0, w0, 2
-	bl	ftl_malloc
-	adrp	x1, .LANCHOR61
-	str	x0, [x1, #:lo12:.LANCHOR61]
-	ldrb	w1, [x19, #:lo12:.LANCHOR69]
-	ldrh	w0, [x20, #:lo12:.LANCHOR68]
-	mul	w0, w0, w1
-	lsl	w0, w0, 2
-	bl	ftl_malloc
-	adrp	x1, .LANCHOR109
-	ldp	x19, x20, [sp, 16]
-	str	x0, [x1, #:lo12:.LANCHOR109]
-	ldp	x29, x30, [sp], 32
-	ret
-	.size	gc_init, .-gc_init
-	.section	.text.ftl_free,"ax",@progbits
-	.align	2
-	.global	ftl_free
-	.type	ftl_free, %function
-ftl_free:
-	b	free
-	.size	ftl_free, .-ftl_free
-	.section	.text.js_hash,"ax",@progbits
-	.align	2
-	.global	js_hash
-	.type	js_hash, %function
-js_hash:
-	mov	x4, x0
-	mov	w0, 42982
-	mov	x3, 0
-	movk	w0, 0x47c6, lsl 16
-.L885:
-	cmp	w1, w3
-	bhi	.L886
-	ret
-.L886:
-	lsr	w2, w0, 2
-	ldrb	w5, [x4, x3]
-	add	w2, w2, w0, lsl 5
-	add	x3, x3, 1
-	add	w2, w2, w5
-	eor	w0, w0, w2
-	b	.L885
-	.size	js_hash, .-js_hash
-	.section	.text.timer_get_time,"ax",@progbits
-	.align	2
-	.global	timer_get_time
-	.type	timer_get_time, %function
-timer_get_time:
+	ldr	x7, [x25, #:lo12:.LANCHOR53]
+	ldrb	w8, [x0, #:lo12:.LANCHOR72]
+	ldr	x0, [x29, 104]
+	ldrh	w10, [x0, #:lo12:.LANCHOR80]
 	mov	w0, 0
-	ret
-	.size	timer_get_time, .-timer_get_time
-	.section	.text.FlashCs123Init,"ax",@progbits
-	.align	2
-	.global	FlashCs123Init
-	.type	FlashCs123Init, %function
-FlashCs123Init:
-	ret
-	.size	FlashCs123Init, .-FlashCs123Init
-	.section	.text.rk_nand_de_init,"ax",@progbits
-	.align	2
-	.global	rk_nand_de_init
-	.type	rk_nand_de_init, %function
-rk_nand_de_init:
-	b	FlashDeInit
-	.size	rk_nand_de_init, .-rk_nand_de_init
-	.section	.text.rk_ftl_get_capacity,"ax",@progbits
-	.align	2
-	.global	rk_ftl_get_capacity
-	.type	rk_ftl_get_capacity, %function
-rk_ftl_get_capacity:
-	adrp	x0, .LANCHOR52
-	ldr	w0, [x0, #:lo12:.LANCHOR52]
-	ret
-	.size	rk_ftl_get_capacity, .-rk_ftl_get_capacity
-	.section	.text.rknand_print_hex,"ax",@progbits
+.L1061:
+	cmp	w1, w8
+	blt	.L1064
+	cbz	w0, .L1065
+	mov	w1, 32768
+	sdiv	w0, w1, w0
+	sxth	w0, w0
+.L1060:
+	ldr	x3, [x29, 168]
+	mov	w1, 6
+	smull	x1, w26, w1
+	ldr	x5, [x3, #:lo12:.LANCHOR0]
+	add	x6, x5, x1
+	strh	w0, [x6, 4]
+	mov	w0, -1
+	strh	w0, [x6, 2]
+	strh	w0, [x5, x1]
+	mov	w5, 224
+	ldrb	w1, [x4, 2]
+	and	w0, w1, 224
+	cmp	w0, 32
+	ccmp	w0, w5, 4, ne
+	beq	.L1066
+	adrp	x5, .LANCHOR5
+	ldr	x5, [x5, #:lo12:.LANCHOR5]
+	ldrh	w6, [x5, 16]
+	cmp	w26, w6
+	beq	.L1066
+	ldrh	w6, [x5, 48]
+	cmp	w26, w6
+	beq	.L1066
+	ldrh	w5, [x5, 80]
+	cmp	w26, w5
+	beq	.L1066
+	cmp	w0, 64
+	bne	.L1067
+	ldr	x0, [x29, 128]
+	add	x2, x21, :lo12:.LANCHOR84
+	mov	w1, w26
+	add	x0, x0, :lo12:.LANCHOR75
+.L1079:
+	bl	_insert_data_list
+.L1066:
+	add	w3, w26, 1
+	sxth	w26, w3
+	b	.L1059
+.L1064:
+	asr	w5, w6, w1
+	tbnz	x5, 0, .L1062
+	add	w0, w10, w0
+	sxth	w0, w0
+.L1063:
+	add	w1, w1, 1
+	b	.L1061
+.L1062:
+	ldrh	w5, [x7, 146]
+	add	w5, w5, 1
+	strh	w5, [x7, 146]
+	b	.L1063
+.L1065:
+	ldrb	w1, [x4, 2]
+	mov	w5, -1
+	orr	w1, w1, -32
+	strb	w1, [x4, 2]
+	adrp	x1, .LANCHOR4
+	ldr	x1, [x1, #:lo12:.LANCHOR4]
+	strh	w5, [x1, x2, lsl 1]
+	b	.L1060
+.L1076:
+	ldr	w0, [x29, 188]
+	b	.L1060
+.L1067:
+	cmp	w0, 96
+	bne	.L1068
+	ldr	x0, [x29, 136]
+	add	x2, x19, :lo12:.LANCHOR82
+	mov	w1, w26
+	add	x0, x0, :lo12:.LANCHOR76
+	b	.L1079
+.L1068:
+	cmp	w0, 160
+	bne	.L1069
+	ldr	x0, [x29, 120]
+	add	x2, x20, :lo12:.LANCHOR86
+	mov	w1, w26
+	add	x0, x0, :lo12:.LANCHOR74
+	b	.L1079
+.L1069:
+	cbnz	w0, .L1066
+	adrp	x0, .LANCHOR4
+	ldr	x0, [x0, #:lo12:.LANCHOR4]
+	ldrh	w2, [x0, x2, lsl 1]
+	cbz	w2, .L1070
+	str	x4, [x29, 96]
+	mov	w1, w26
+	mov	x0, x27
+	bl	printf
+	ldr	x4, [x29, 96]
+	ldrb	w0, [x4, 2]
+	tbz	x0, 4, .L1071
+	mov	w1, 5
+.L1078:
+	bfi	w0, w1, 5, 3
+	strb	w0, [x4, 2]
+	mov	w2, 0
+	mov	w1, 1
+	mov	w0, w26
+	bl	gc_add_sblk
+	b	.L1066
+.L1071:
+	mov	w1, 2
+	b	.L1078
+.L1070:
+	ands	w1, w1, 24
+	bne	.L1073
+	ldr	x0, [x29, 160]
+	add	x2, x24, :lo12:.LANCHOR89
+	mov	w1, w26
+	add	x0, x0, :lo12:.LANCHOR90
+.L1080:
+	bl	_insert_free_list
+	b	.L1066
+.L1073:
+	cmp	w1, 16
+	bne	.L1074
+	ldr	x0, [x29, 152]
+	add	x2, x23, :lo12:.LANCHOR91
+	mov	w1, w26
+	add	x0, x0, :lo12:.LANCHOR92
+	b	.L1080
+.L1074:
+	ldr	x0, [x29, 144]
+	add	x2, x22, :lo12:.LANCHOR93
+	mov	w1, w26
+	add	x0, x0, :lo12:.LANCHOR94
+	b	.L1080
+	.size	zftl_sblk_list_init, .-zftl_sblk_list_init
+	.section	.text.ftl_open_sblk_init,"ax",@progbits
 	.align	2
-	.global	rknand_print_hex
-	.type	rknand_print_hex, %function
-rknand_print_hex:
-	stp	x29, x30, [sp, -96]!
+	.global	ftl_open_sblk_init
+	.type	ftl_open_sblk_init, %function
+ftl_open_sblk_init:
+	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR72
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LC30
+	mov	x19, x0
 	stp	x23, x24, [sp, 48]
-	mov	x22, x1
+	adrp	x21, .LC31
+	adrp	x23, .LANCHOR80
+	mov	w22, w1
+	add	x23, x23, :lo12:.LANCHOR80
+	add	x20, x20, :lo12:.LANCHOR72
+	add	x21, x21, :lo12:.LC31
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LC29
-	mov	x26, x0
-	mov	w24, w2
-	uxtw	x25, w3
-	add	x23, x23, :lo12:.LC29
-	add	x21, x21, :lo12:.LC30
-	stp	x19, x20, [sp, 16]
-	str	x27, [sp, 80]
-	mov	x19, 0
-	mov	w20, 0
-	adrp	x27, .LC31
-.L892:
-	cmp	x25, x19
-	bne	.L898
+.L1082:
+.L1085:
+	mov	w0, w22
+	bl	ftl_alloc_sblk
+	mov	w1, 0
+	and	w24, w0, 65535
+	bl	ftl_erase_sblk
+	add	x1, x19, 16
+	mov	w0, w24
+	bl	ftl_get_blk_list_in_sblk
+	and	w0, w0, 255
+	ldrh	w1, [x23]
+	cmp	w22, 2
+	strb	w0, [x19, 9]
+	strh	w24, [x19]
+	strh	wzr, [x19, 2]
+	mul	w0, w1, w0
+	strb	wzr, [x19, 5]
+	strh	w0, [x19, 6]
+	strh	wzr, [x19, 10]
+	strb	w22, [x19, 4]
+	beq	.L1086
+	ldrb	w0, [x20]
+	mul	w0, w1, w0
+	and	w0, w0, 65535
+.L1083:
+	ldrb	w2, [x20]
+	adrp	x26, .LANCHOR4
+	strh	w0, [x19, 12]
+	ubfiz	x25, x24, 1, 16
+	mul	w2, w2, w1
+	adrp	x1, .LANCHOR105
+	ldr	x3, [x1, #:lo12:.LANCHOR105]
+	mov	w1, 255
+	lsl	w2, w2, 2
+	add	x0, x3, x0, uxth 2
+	bl	ftl_memset
+	ldr	x0, [x26, #:lo12:.LANCHOR4]
+	ldrh	w1, [x19, 6]
+	strh	w1, [x0, x25]
+	ldrb	w0, [x19, 9]
+	cbnz	w0, .L1081
+	mov	w1, w24
+	mov	x0, x21
+	bl	printf
+	ldr	x0, [x26, #:lo12:.LANCHOR4]
+	mov	w1, -1
+	strh	w1, [x0, x25]
+	mov	w0, 7
+	strb	w0, [x19, 4]
+	b	.L1085
+.L1086:
+	mov	w0, 0
+	b	.L1083
+.L1081:
 	ldp	x19, x20, [sp, 16]
-	adrp	x1, .LC31
 	ldp	x21, x22, [sp, 32]
-	add	x1, x1, :lo12:.LC31
 	ldp	x23, x24, [sp, 48]
-	adrp	x0, .LC32
 	ldp	x25, x26, [sp, 64]
-	add	x0, x0, :lo12:.LC32
-	ldr	x27, [sp, 80]
-	ldp	x29, x30, [sp], 96
-	b	printf
-.L898:
-	cbnz	w20, .L893
-	mov	w2, w19
-	mov	x1, x26
-	mov	x0, x23
-	bl	printf
-.L893:
-	cmp	w24, 4
-	bne	.L894
-	ldr	w1, [x22, x19, lsl 2]
-.L900:
-	mov	x0, x21
-	add	w20, w20, 1
-	bl	printf
-	cmp	w20, 15
-	bls	.L897
-	mov	w20, 0
-	add	x1, x27, :lo12:.LC31
-	adrp	x0, .LC32
-	add	x0, x0, :lo12:.LC32
-	bl	printf
-.L897:
-	add	x19, x19, 1
-	b	.L892
-.L894:
-	cmp	w24, 2
-	bne	.L896
-	ldrsh	w1, [x22, x19, lsl 1]
-	b	.L900
-.L896:
-	ldrb	w1, [x22, x19]
-	b	.L900
-	.size	rknand_print_hex, .-rknand_print_hex
-	.section	.text.hynix_get_read_retry_default,"ax",@progbits
+	ldp	x29, x30, [sp], 80
+	ret
+	.size	ftl_open_sblk_init, .-ftl_open_sblk_init
+	.section	.text.pm_free_sblk,"ax",@progbits
 	.align	2
-	.global	hynix_get_read_retry_default
-	.type	hynix_get_read_retry_default, %function
-hynix_get_read_retry_default:
-	stp	x29, x30, [sp, -144]!
-	mov	w2, -83
-	mov	w1, -82
+	.global	pm_free_sblk
+	.type	pm_free_sblk, %function
+pm_free_sblk:
+	stp	x29, x30, [sp, -368]!
 	add	x29, sp, 0
-	stp	x27, x28, [sp, 80]
-	stp	x21, x22, [sp, 32]
-	str	w0, [x29, 140]
-	adrp	x0, .LANCHOR5
 	stp	x19, x20, [sp, 16]
-	ldr	x28, [x0, #:lo12:.LANCHOR5]
+	adrp	x20, .LANCHOR127
+	stp	x21, x22, [sp, 32]
+	ldrh	w0, [x20, #:lo12:.LANCHOR127]
 	stp	x23, x24, [sp, 48]
-	add	x0, x28, 112
-	str	x0, [x29, 112]
-	ldrb	w0, [x29, 140]
-	add	x22, x28, 128
 	stp	x25, x26, [sp, 64]
-	strb	w0, [x28, 112]
-	mov	w0, -84
-	ldr	w3, [x29, 140]
-	strb	w0, [x28, 128]
-	mov	w0, -81
-	strb	w2, [x28, 129]
-	cmp	w3, 2
-	strb	w1, [x28, 130]
-	strb	w0, [x28, 131]
-	bne	.L902
-	mov	w0, -89
-	strb	w0, [x28, 128]
-	adrp	x0, .LANCHOR110+17
-	mov	w1, -9
-	strb	w1, [x0, #:lo12:.LANCHOR110+17]
-.L957:
-	mov	w0, 7
-	b	.L992
-.L902:
-	ldr	w3, [x29, 140]
-	cmp	w3, 3
-	bne	.L904
-	mov	x6, 0
-.L905:
-	sub	w0, w6, #80
-	strb	w0, [x22, x6]
-	add	x6, x6, 1
-	cmp	x6, 8
-	bne	.L905
-	stp	w6, w6, [x29, 132]
-.L903:
-	ldr	w0, [x29, 140]
-	sub	w0, w0, #1
-	cmp	w0, 1
-	bhi	.L910
-	adrp	x7, .LANCHOR8
-	adrp	x11, .LANCHOR10
-	add	x24, x7, :lo12:.LANCHOR8
-	add	x25, x11, :lo12:.LANCHOR10
-	mov	w20, 0
-	mov	w26, 55
-.L911:
-	ldrb	w0, [x24]
-	cmp	w0, w20
-	bhi	.L917
-.L918:
-	ldr	x0, [x29, 112]
-	ldrb	w1, [x29, 136]
-	strb	w1, [x0, 1]
-	ldrb	w1, [x29, 132]
-	strb	w1, [x0, 2]
+	cmp	w0, 128
+	stp	x27, x28, [sp, 80]
+	bls	.L1089
+	adrp	x1, .LANCHOR128
+	adrp	x0, .LC0
+	mov	w2, 74
+	add	x1, x1, :lo12:.LANCHOR128
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1090:
+	b	.L1090
+.L1089:
+	add	x23, x29, 112
+	mov	w2, 256
+	mov	w1, 0
+	mov	x0, x23
+	bl	ftl_memset
+	adrp	x24, .LANCHOR53
+	adrp	x0, .LANCHOR96
+	mov	w2, 21
+	ldr	x5, [x24, #:lo12:.LANCHOR53]
+	ldrh	w8, [x0, #:lo12:.LANCHOR96]
+	ldrh	w11, [x20, #:lo12:.LANCHOR127]
+	add	x4, x5, 704
+	sub	w0, w2, w8
+	mov	w2, 1
+	ldrh	w1, [x5, 698]
+	lsl	w2, w2, w0
+	adrp	x0, .LANCHOR95
+	add	x1, x1, 176
+	sub	w2, w2, #1
+	ldrb	w10, [x0, #:lo12:.LANCHOR95]
+	add	x1, x5, x1, lsl 2
+	mov	x27, x0
+.L1091:
+	cmp	x4, x1
+	bne	.L1095
+	adrp	x1, .LANCHOR72
+	adrp	x0, .LANCHOR80
+	add	x20, x20, :lo12:.LANCHOR127
+	add	x27, x27, :lo12:.LANCHOR95
+	ldrh	w2, [x0, #:lo12:.LANCHOR80]
+	add	x26, x1, :lo12:.LANCHOR72
+	ldrb	w21, [x1, #:lo12:.LANCHOR72]
+	add	x25, x0, :lo12:.LANCHOR80
+	mov	w28, 0
+	mov	w19, 0
+	mul	w21, w21, w2
+	mov	w2, 65535
+	and	w21, w21, 65535
+.L1096:
+	ldrh	w0, [x20]
+	cmp	w0, w19
+	bhi	.L1101
+	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 144
+	ldp	x29, x30, [sp], 368
 	ret
-.L904:
-	ldr	w3, [x29, 140]
-	cmp	w3, 4
-	bne	.L906
-	mov	w3, -52
-	strb	w3, [x28, 128]
-	mov	w3, -65
-	strb	w3, [x28, 129]
-	mov	w3, -86
-	strb	w3, [x28, 130]
-	mov	w3, -85
-	strb	w0, [x28, 135]
-	strb	w3, [x28, 131]
-	mov	w0, 8
-	mov	w3, -51
-	strb	w2, [x28, 133]
-	strb	w3, [x28, 132]
-	strb	w1, [x28, 134]
-	str	w0, [x29, 132]
-.L993:
-	str	w0, [x29, 136]
-	b	.L903
-.L906:
-	ldr	w0, [x29, 140]
-	cmp	w0, 5
-	bne	.L907
-	mov	w0, 56
-	strb	w0, [x28, 128]
-	mov	w0, 57
-	strb	w0, [x28, 129]
-	mov	w0, 58
-	strb	w0, [x28, 130]
-	mov	w0, 59
-	strb	w0, [x28, 131]
-	mov	w0, 8
-.L992:
-	str	w0, [x29, 132]
-	mov	w0, 4
-	b	.L993
-.L907:
-	ldr	w0, [x29, 140]
-	cmp	w0, 6
-	bne	.L908
-	mov	w0, 14
-	strb	w0, [x28, 128]
-	mov	w0, 15
-	strb	w0, [x28, 129]
-	mov	w0, 16
-	strb	w0, [x28, 130]
-	mov	w0, 17
-	strb	w0, [x28, 131]
-	mov	w0, 12
-	b	.L992
-.L908:
-	ldr	w0, [x29, 140]
-	cmp	w0, 7
-	bne	.L957
-	mov	x0, 0
-.L909:
-	sub	w1, w0, #80
-	strb	w1, [x22, x0]
-	add	x0, x0, 1
-	cmp	x0, 8
-	bne	.L909
-	mov	w0, -44
-	strb	w0, [x28, 136]
-	mov	w0, -43
-	strb	w0, [x28, 137]
-	mov	w0, 12
-	str	w0, [x29, 132]
-	mov	w0, 10
-	b	.L993
-.L917:
-	ldrb	w0, [x25, w20, sxtw]
-	mov	x1, 32
-	mov	w2, 160
-	mov	x21, 0
-	umaddl	x2, w2, w0, x1
-	ldr	x1, [x29, 112]
-	ubfiz	x0, x0, 8, 8
-	add	x19, x1, x2
-	adrp	x1, .LANCHOR6
-	ldr	x4, [x1, #:lo12:.LANCHOR6]
-	add	x23, x4, x0
-.L912:
-	str	w26, [x23, 2056]
-	ldrb	w0, [x22, x21]
-	str	w0, [x23, 2052]
-	mov	w0, 80
-	bl	timer_delay_ns
-	ldr	w0, [x23, 2048]
-	strb	w0, [x19, x21]
-	add	x21, x21, 1
-	ldr	w0, [x29, 136]
-	cmp	w0, w21, uxtb
-	bhi	.L912
-	adrp	x3, .LANCHOR110
-	add	x3, x3, :lo12:.LANCHOR110
-	mov	x0, 0
-.L915:
-	add	x15, x19, x0
-	add	x14, x3, x0
-	mov	x1, 1
-.L914:
-	lsl	x4, x1, 2
-	lsl	x16, x1, 3
-	ldrb	w17, [x19, x0]
-	add	x1, x1, 1
-	cmp	x1, 7
-	ldrb	w4, [x14, x4]
-	add	w4, w4, w17
-	strb	w4, [x15, x16]
-	bne	.L914
-	add	x0, x0, 1
-	cmp	x0, 4
-	bne	.L915
-	add	w5, w20, 1
-	strb	wzr, [x19, 16]
-	strb	wzr, [x19, 24]
-	and	w20, w5, 255
-	strb	wzr, [x19, 32]
-	strb	wzr, [x19, 40]
-	strb	wzr, [x19, 48]
-	strb	wzr, [x19, 41]
-	strb	wzr, [x19, 49]
-	b	.L911
-.L910:
-	ldr	w0, [x29, 140]
-	sub	w0, w0, #3
-	cmp	w0, 4
-	bhi	.L918
-	ldp	w0, w1, [x29, 132]
-	adrp	x19, .LANCHOR8
-	add	x19, x19, :lo12:.LANCHOR8
-	sub	w13, w1, #1
-	mul	w15, w0, w1
-	and	x13, x13, 255
-	asr	w0, w15, 2
-	stp	w0, wzr, [x29, 124]
-	lsl	w0, w15, 4
-	str	w0, [x29, 120]
-	ldr	w0, [x29, 124]
-	lsl	w22, w0, 1
-	sbfiz	x21, x0, 2, 32
-	ldr	w0, [x29, 140]
-	sub	w20, w0, #5
-	add	x0, x13, 1
-	str	x0, [x29, 96]
-.L919:
-	ldrb	w0, [x19]
-	ldr	w1, [x29, 128]
-	cmp	w0, w1
-	bls	.L918
-	ldr	w1, [x29, 128]
-	adrp	x0, .LANCHOR10
-	add	x0, x0, :lo12:.LANCHOR10
-	mov	w10, 160
-	mov	w23, 255
-	ldrb	w4, [x0, w1, sxtw]
-	mov	x0, 32
-	umaddl	x10, w10, w4, x0
-	ldr	x0, [x29, 112]
-	ubfiz	x4, x4, 8, 8
-	add	x0, x0, x10
-	str	x0, [x29, 104]
-	adrp	x0, .LANCHOR6
-	ldr	x0, [x0, #:lo12:.LANCHOR6]
-	add	x27, x0, x4
-	str	w23, [x27, 2056]
-	bl	nandc_wait_flash_ready
-	mov	w0, 54
-	str	w0, [x27, 2056]
-	ldr	w0, [x29, 140]
-	cmp	w0, 4
-	bne	.L920
-	mov	w0, 64
-	str	w23, [x27, 2052]
-	str	w0, [x27, 2048]
-	mov	w0, 204
-.L994:
-	str	w0, [x27, 2052]
-	mov	w0, 77
-	b	.L995
-.L920:
-	cmp	w20, 1
-	bhi	.L922
-	ldrb	w0, [x28, 128]
-	str	w0, [x27, 2052]
-	mov	w0, 82
-.L995:
-	str	w0, [x27, 2048]
-	mov	w0, 22
-	str	w0, [x27, 2056]
-	mov	w0, 23
-	str	w0, [x27, 2056]
-	mov	w0, 4
-	str	w0, [x27, 2056]
-	mov	w0, 25
-	str	w0, [x27, 2056]
-	str	wzr, [x27, 2056]
-	str	wzr, [x27, 2052]
-	ldr	w0, [x29, 140]
-	str	wzr, [x27, 2052]
-	cmp	w0, 6
-	bne	.L923
-	mov	w0, 31
-	str	w0, [x27, 2052]
-.L924:
-	mov	w23, 2
-	str	w23, [x27, 2052]
-	str	wzr, [x27, 2052]
-	mov	w0, 48
-	str	w0, [x27, 2056]
-	bl	nandc_wait_flash_ready
-	cmp	w20, 1
-	bls	.L958
-	ldr	w0, [x29, 140]
-	cmp	w0, 7
-	mov	w0, 32
-	csel	w23, w23, w0, ne
-.L925:
-	adrp	x3, .LANCHOR111
-	mov	x1, 0
-	ldr	x0, [x3, #:lo12:.LANCHOR111]
-.L926:
-	ldr	w2, [x27, 2048]
-	strb	w2, [x0, x1]
-	add	x1, x1, 1
-	cmp	w23, w1, uxtb
-	bhi	.L926
-	ldr	w1, [x29, 140]
-	cmp	w1, 7
-	bne	.L927
-	mov	w1, 0
-.L929:
-	ldrb	w2, [x0]
-	cmp	w2, 12
-	beq	.L928
-	ldrb	w2, [x0, 1]
-	cmp	w2, 10
-	beq	.L928
-	add	w1, w1, 1
-	add	x0, x0, 4
-	and	w1, w1, 255
-	cmp	w1, 8
-	bne	.L929
-.L930:
-	adrp	x0, .LC33
-	mov	w1, 0
-	add	x0, x0, :lo12:.LC33
-	bl	printf
-.L932:
-	b	.L932
-.L922:
-	mov	w0, 174
-	str	w0, [x27, 2052]
-	str	wzr, [x27, 2048]
-	mov	w0, 176
-	b	.L994
-.L923:
-	str	wzr, [x27, 2052]
-	b	.L924
-.L958:
-	mov	w23, 16
-	b	.L925
-.L928:
-	cmp	w1, 6
-	bhi	.L930
-.L931:
-	ldr	x2, [x3, #:lo12:.LANCHOR111]
-	mov	x0, 0
-.L936:
-	ldr	w1, [x29, 120]
+.L1095:
+	ldr	w0, [x4]
+	add	x6, x5, 416
+	mov	x3, 0
+	lsr	w0, w0, w8
+	and	w0, w0, w2
+	udiv	w0, w0, w10
+	and	w0, w0, 65535
+.L1092:
+	cmp	w11, w3, uxth
+	bhi	.L1094
+	add	x4, x4, 4
+	b	.L1091
+.L1094:
+	ldrh	w7, [x6]
+	cmp	w7, w0
+	bne	.L1093
+	ldrh	w7, [x23, x3, lsl 1]
+	add	w7, w7, 1
+	strh	w7, [x23, x3, lsl 1]
+.L1093:
+	add	x3, x3, 1
+	add	x6, x6, 2
+	b	.L1092
+.L1101:
+	ldr	x1, [x24, #:lo12:.LANCHOR53]
+	sxtw	x22, w19
+	add	x0, x22, 208
+	ldrb	w3, [x27]
+	ldrh	w0, [x1, x0, lsl 1]
+	ldrh	w1, [x1, 692]
+	sdiv	w1, w1, w3
 	cmp	w1, w0
-	bgt	.L937
-	ldr	x1, [x3, #:lo12:.LANCHOR111]
-	mov	w16, 8
-	add	x3, x1, x21
-.L939:
-	mov	x0, 0
-.L938:
-	ldr	w17, [x3, x0, lsl 2]
-	ldr	w4, [x29, 124]
-	mvn	w17, w17
-	str	w17, [x3, x0, lsl 2]
-	add	x0, x0, 1
-	cmp	w4, w0
-	bgt	.L938
-	add	x3, x3, x22, uxtw 2
-	subs	w16, w16, #1
-	bne	.L939
-	mov	x17, x1
-	mov	w23, 0
-	mov	w26, 1
-.L940:
-	mov	w3, 0
-	mov	w0, 0
-.L944:
-	mov	x25, x17
-	lsl	w16, w26, w0
-	mov	w24, 16
-	mov	w30, 0
-.L942:
-	ldr	w4, [x25]
-	add	x25, x25, x21
-	bics	wzr, w16, w4
-	cinc	w30, w30, eq
-	subs	w24, w24, #1
-	bne	.L942
-	cmp	w30, 9
-	orr	w16, w3, w16
-	add	w0, w0, 1
-	csel	w3, w16, w3, cs
-	cmp	w0, 32
-	bne	.L944
-	ldr	w0, [x29, 124]
-	add	w23, w23, 1
-	str	w3, [x17], 4
-	cmp	w0, w23
-	bgt	.L940
-	mov	x0, 0
-	mov	w3, 0
-.L947:
-	ldr	w16, [x1, x0]
-	add	x0, x0, 4
-	cmp	w16, 0
-	cinc	w3, w3, eq
-	cmp	x0, 32
-	bne	.L947
-	cmp	w3, 7
-	ble	.L948
-	mov	w3, 1024
-	mov	w2, 1
-	adrp	x0, .LC34
-	add	x0, x0, :lo12:.LC34
-	bl	rknand_print_hex
-	adrp	x0, .LC33
-	mov	w1, 0
-	add	x0, x0, :lo12:.LC33
-	bl	printf
-.L949:
-	b	.L949
-.L927:
-	ldr	w1, [x29, 140]
-	cmp	w1, 6
-	bne	.L931
-	mov	x1, 0
-.L933:
-	ldrb	w2, [x0, x1]
-	cmp	w2, 12
-	beq	.L931
-	add	x2, x0, x1
-	ldrb	w2, [x2, 8]
-	cmp	w2, 4
-	beq	.L931
-	add	x1, x1, 1
-	cmp	x1, 8
-	bne	.L933
-	adrp	x0, .LC33
+	bne	.L1097
+	ldrb	w1, [x26]
+	ldrh	w3, [x25]
+	mul	w1, w1, w3
+	strh	w1, [x23, x22, lsl 1]
+.L1097:
+	ldrh	w1, [x23, x22, lsl 1]
+	cmp	w21, w1
+	bls	.L1098
+	cbnz	w1, .L1102
+.L1100:
+	cmp	w0, w2
+	beq	.L1099
+	str	w2, [x29, 108]
+	bl	ftl_free_sblk
+	ldr	x0, [x24, #:lo12:.LANCHOR53]
+	add	x22, x22, 208
+	mov	w1, -1
+	ldr	w2, [x29, 108]
+	strh	w1, [x0, x22, lsl 1]
+	ldrh	w1, [x0, 688]
+	sub	w1, w1, #1
+	strh	w1, [x0, 688]
+	b	.L1099
+.L1098:
+	cbz	w1, .L1100
+.L1099:
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L1096
+.L1102:
+	mov	w28, w19
+	mov	w21, w1
+	b	.L1099
+	.size	pm_free_sblk, .-pm_free_sblk
+	.section	.text.ftl_memcpy,"ax",@progbits
+	.align	2
+	.global	ftl_memcpy
+	.type	ftl_memcpy, %function
+ftl_memcpy:
+	uxtw	x2, w2
+	b	memcpy
+	.size	ftl_memcpy, .-ftl_memcpy
+	.section	.text.flash_into_data_init,"ax",@progbits
+	.align	2
+	.global	flash_into_data_init
+	.type	flash_into_data_init, %function
+flash_into_data_init:
+	stp	x29, x30, [sp, -32]!
+	mov	w2, 2048
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC33
-	bl	printf
-.L935:
-	b	.L935
-.L937:
-	ldr	w1, [x27, 2048]
-	strb	w1, [x2, x0]
-	add	x0, x0, 1
-	b	.L936
-.L948:
-	ldr	w0, [x29, 140]
-	cmp	w0, 6
-	beq	.L960
-	cmp	w0, 7
-	mov	x1, 10
-	mov	x0, 8
-	csel	x0, x0, x1, ne
-.L950:
-	ldr	x10, [x29, 104]
-	mov	w3, 0
-.L951:
-	mov	x1, 0
-.L952:
-	ldrb	w16, [x2, x1]
-	ldr	w4, [x29, 136]
-	strb	w16, [x10, x1]
-	add	x1, x1, 1
-	cmp	w4, w1, uxtb
-	bhi	.L952
-	ldr	x1, [x29, 96]
-	add	w3, w3, 1
-	add	x10, x10, x0
-	add	x2, x2, x1
-	ldr	w1, [x29, 132]
-	cmp	w1, w3
-	bgt	.L951
-	mov	w23, 255
-	str	w23, [x27, 2056]
-	bl	nandc_wait_flash_ready
-	cmp	w20, 1
-	bhi	.L954
-	mov	w0, 54
-	str	w0, [x27, 2056]
-	ldrb	w0, [x28, 128]
-	str	w0, [x27, 2052]
-	str	wzr, [x27, 2048]
-	mov	w0, 22
-	str	w0, [x27, 2056]
-	mov	w0, 48
-	str	wzr, [x27, 2056]
-	str	wzr, [x27, 2052]
-	str	wzr, [x27, 2052]
-	str	w23, [x27, 2052]
-	str	w23, [x27, 2052]
-	str	w23, [x27, 2052]
-.L996:
-	str	w0, [x27, 2056]
-	bl	nandc_wait_flash_ready
-	ldr	w0, [x29, 128]
-	add	w11, w0, 1
-	and	w0, w11, 255
-	str	w0, [x29, 128]
-	b	.L919
-.L960:
-	mov	x0, 4
-	b	.L950
-.L954:
-	mov	w0, 56
-	b	.L996
-	.size	hynix_get_read_retry_default, .-hynix_get_read_retry_default
-	.section	.text.flash_get_read_retry_tbl,"ax",@progbits
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	adrp	x19, .LANCHOR12
+	ldr	x0, [x19, #:lo12:.LANCHOR12]
+	bl	ftl_memset
+	ldr	x0, [x19, #:lo12:.LANCHOR12]
+	mov	w1, 21321
+	movk	w1, 0x5359, lsl 16
+	mov	w2, 32
+	add	x0, x0, 80
+	str	w1, [x0, -80]
+	mov	w1, 2032
+	str	w1, [x0, -72]
+	mov	w1, 1
+	strh	w1, [x0, -64]
+	adrp	x1, .LANCHOR129
+	add	x1, x1, :lo12:.LANCHOR129
+	bl	ftl_memcpy
+	ldr	x0, [x19, #:lo12:.LANCHOR12]
+	mov	w2, 32
+	ldr	x19, [sp, 16]
+	adrp	x1, .LANCHOR26
+	ldp	x29, x30, [sp], 32
+	add	x1, x1, :lo12:.LANCHOR26
+	add	x0, x0, 48
+	b	ftl_memcpy
+	.size	flash_into_data_init, .-flash_into_data_init
+	.section	.text.ftl_memcpy32,"ax",@progbits
 	.align	2
-	.global	flash_get_read_retry_tbl
-	.type	flash_get_read_retry_tbl, %function
-flash_get_read_retry_tbl:
-	adrp	x0, .LANCHOR19+19
-	ldrb	w0, [x0, #:lo12:.LANCHOR19+19]
-	sub	w1, w0, #1
-	and	w1, w1, 255
-	cmp	w1, 6
-	bhi	.L997
-	b	hynix_get_read_retry_default
-.L997:
+	.global	ftl_memcpy32
+	.type	ftl_memcpy32, %function
+ftl_memcpy32:
+	mov	x3, 0
+.L1108:
+	cmp	w2, w3
+	bhi	.L1109
 	ret
-	.size	flash_get_read_retry_tbl, .-flash_get_read_retry_tbl
-	.section	.text.nandc_xfer_done,"ax",@progbits
+.L1109:
+	ldr	w4, [x1, x3, lsl 2]
+	str	w4, [x0, x3, lsl 2]
+	add	x3, x3, 1
+	b	.L1108
+	.size	ftl_memcpy32, .-ftl_memcpy32
+	.section	.text.ftl_memcmp,"ax",@progbits
 	.align	2
-	.global	nandc_xfer_done
-	.type	nandc_xfer_done, %function
-nandc_xfer_done:
-	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR7
+	.global	ftl_memcmp
+	.type	ftl_memcmp, %function
+ftl_memcmp:
+	uxtw	x2, w2
+	b	memcmp
+	.size	ftl_memcmp, .-ftl_memcmp
+	.section	.text.rknand_get_clk_rate,"ax",@progbits
+	.align	2
+	.global	rknand_get_clk_rate
+	.type	rknand_get_clk_rate, %function
+rknand_get_clk_rate:
+	mov	w0, 19712
+	movk	w0, 0x8d2, lsl 16
+	ret
+	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
+	.section	.text.ftl_malloc,"ax",@progbits
+	.align	2
+	.global	ftl_malloc
+	.type	ftl_malloc, %function
+ftl_malloc:
+	mov	w1, 0
+	sxtw	x0, w0
+	b	kmalloc
+	.size	ftl_malloc, .-ftl_malloc
+	.section	.text.nandc_init,"ax",@progbits
+	.align	2
+	.global	nandc_init
+	.type	nandc_init, %function
+nandc_init:
+	stp	x29, x30, [sp, -32]!
+	adrp	x1, .LANCHOR14
+	mov	w2, 6
+	add	x29, sp, 0
+	strb	w2, [x1, #:lo12:.LANCHOR14]
+	adrp	x2, .LANCHOR13
+	str	wzr, [x29, 24]
+	str	x0, [x2, #:lo12:.LANCHOR13]
+	mov	w2, 12336
+	ldr	w3, [x0, 352]
+	movk	w2, 0x5638, lsl 16
+	cmp	w3, w2
+	bne	.L1114
+	mov	w2, 8
+	strb	w2, [x1, #:lo12:.LANCHOR14]
+.L1114:
+	ldr	w3, [x0, 128]
+	mov	w2, 12336
+	movk	w2, 0x5639, lsl 16
+	cmp	w3, w2
+	bne	.L1115
+	mov	w2, 9
+	strb	w2, [x1, #:lo12:.LANCHOR14]
+.L1115:
+	ldrb	w1, [x1, #:lo12:.LANCHOR14]
+	cmp	w1, 9
+	adrp	x1, .LANCHOR35
+	bne	.L1116
+	mov	w2, 1
+	strb	w2, [x1, #:lo12:.LANCHOR35]
+	ldr	w1, [x29, 24]
+	orr	w1, w1, 256
+	str	w1, [x29, 24]
+	ldr	w1, [x29, 24]
+	str	w1, [x0]
+	str	wzr, [x0, 520]
+	mov	w1, 4225
+	str	w1, [x0, 4]
+	mov	w1, 8321
+	str	w1, [x0, 8]
+	mov	w1, 4099
+	movk	w1, 0x10, lsl 16
+	str	w1, [x0, 80]
+	mov	w1, 38
+	str	w1, [x0, 84]
+	mov	w1, 39
+	str	w1, [x0, 84]
+.L1117:
+	adrp	x0, .LANCHOR36
+	mov	w1, 1
+	strb	w1, [x0, #:lo12:.LANCHOR36]
+	adrp	x0, .LANCHOR38
+	strh	wzr, [x0, #:lo12:.LANCHOR38]
+	adrp	x0, .LANCHOR34
+	strb	wzr, [x0, #:lo12:.LANCHOR34]
+	ldp	x29, x30, [sp], 32
+	ret
+.L1116:
+	strb	wzr, [x1, #:lo12:.LANCHOR35]
+	ldr	w1, [x29, 24]
+	orr	w1, w1, 256
+	str	w1, [x29, 24]
+	ldr	w1, [x29, 24]
+	str	w1, [x0]
+	str	wzr, [x0, 336]
+	mov	w1, 4225
+	str	w1, [x0, 4]
+	mov	w1, 8321
+	str	w1, [x0, 344]
+	mov	w1, 4099
+	movk	w1, 0x10, lsl 16
+	str	w1, [x0, 304]
+	mov	w1, 38
+	str	w1, [x0, 308]
+	mov	w1, 39
+	str	w1, [x0, 308]
+	mov	w0, 2048
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR37
+	str	x0, [x1, #:lo12:.LANCHOR37]
+	b	.L1117
+	.size	nandc_init, .-nandc_init
+	.section	.text.buf_init,"ax",@progbits
+	.align	2
+	.global	buf_init
+	.type	buf_init, %function
+buf_init:
+	stp	x29, x30, [sp, -48]!
+	adrp	x0, .LANCHOR43
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR6
-	ldrb	w0, [x0, #:lo12:.LANCHOR7]
+	add	x19, x0, :lo12:.LANCHOR43
 	stp	x21, x22, [sp, 32]
-	str	x23, [sp, 48]
-	cmp	w0, 9
-	ldr	x20, [x19, #:lo12:.LANCHOR6]
-	bne	.L1000
-	ldr	w0, [x20, 16]
+	mov	x20, x0
+	adrp	x22, .LANCHOR52
+	add	x22, x22, :lo12:.LANCHOR52
 	mov	w21, 0
-	str	w0, [x29, 64]
-	ldr	w0, [x20, 48]
-	tbnz	x0, 1, .L1001
-	adrp	x22, .LC37
-	adrp	x23, .LC36
-	add	x22, x22, :lo12:.LC37
-	add	x23, x23, :lo12:.LC36
-.L1002:
-	ldr	w0, [x29, 64]
-	tbnz	x0, 20, .L1005
-	ldr	x0, [x19, #:lo12:.LANCHOR6]
+.L1120:
+	and	w0, w21, 255
+	strb	w0, [x19, 1]
+	add	w1, w0, 1
+	ldrb	w0, [x22]
+	strb	w1, [x19]
 	add	w21, w21, 1
-	tst	x21, 16777215
-	ldr	w0, [x0, 16]
-	str	w0, [x29, 64]
-	bne	.L1002
-	ldr	w2, [x29, 64]
-	mov	w1, w21
-	ldr	w3, [x20, 64]
-	mov	x0, x22
-	ubfx	x3, x3, 16, 6
-	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR6]
-	mov	w3, 256
-	mov	w2, 4
-	mov	x0, x23
-	bl	rknand_print_hex
-	b	.L1002
-.L1001:
-	adrp	x22, .LC35
-	adrp	x23, .LC36
-	add	x22, x22, :lo12:.LC35
-	add	x23, x23, :lo12:.LC36
-.L1003:
-	ldr	w1, [x20, 64]
-	ldr	w0, [x29, 64]
-	ubfx	x1, x1, 16, 6
-	ubfx	x0, x0, 22, 6
-	cmp	w1, w0
-	blt	.L1007
-.L1005:
-	adrp	x0, .LANCHOR30+32
-	ldr	x23, [sp, 48]
+	strb	wzr, [x19, 2]
+	add	x19, x19, 64
+	str	xzr, [x19, -48]
+	lsl	w0, w0, 9
+	bl	ftl_malloc
+	str	x0, [x19, -56]
+	ldrb	w0, [x22]
+	lsl	w0, w0, 1
+	bl	ftl_malloc
+	str	x0, [x19, -40]
+	cmp	w21, 32
+	bne	.L1120
+	add	x0, x20, :lo12:.LANCHOR43
+	mov	w1, -1
+	strb	w1, [x0, 1984]
+	adrp	x0, .LANCHOR44
+	strb	wzr, [x0, #:lo12:.LANCHOR44]
+	adrp	x0, .LANCHOR45
 	ldp	x19, x20, [sp, 16]
-	str	wzr, [x0, #:lo12:.LANCHOR30+32]
+	strb	w21, [x0, #:lo12:.LANCHOR45]
 	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 80
+	ldp	x29, x30, [sp], 48
 	ret
-.L1007:
-	ldr	x0, [x19, #:lo12:.LANCHOR6]
-	ldr	w0, [x0]
-	str	w0, [x29, 72]
-	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1004
-	ldr	w0, [x29, 72]
-	tbnz	x0, 17, .L1005
-.L1004:
-	add	w21, w21, 1
-	tst	x21, 16777215
-	bne	.L1003
-	ldr	w2, [x20, 64]
-	mov	w1, w21
-	ldr	w3, [x29, 64]
-	mov	x0, x22
-	ubfx	x2, x2, 16, 5
-	ubfx	x3, x3, 22, 6
-	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR6]
-	mov	w3, 256
-	mov	w2, 4
-	mov	x0, x23
-	bl	rknand_print_hex
-	b	.L1003
-.L1000:
-	ldr	w0, [x20, 8]
-	mov	w21, 0
-	str	w0, [x29, 64]
-	ldr	w0, [x20, 16]
-	tbnz	x0, 1, .L1011
-	adrp	x22, .LC37
-	adrp	x23, .LC36
-	add	x22, x22, :lo12:.LC37
-	add	x23, x23, :lo12:.LC36
-.L1012:
-	ldr	w0, [x29, 64]
-	tbnz	x0, 20, .L1005
-	ldr	x0, [x19, #:lo12:.LANCHOR6]
-	add	w21, w21, 1
-	tst	x21, 16777215
-	ldr	w0, [x0, 8]
-	str	w0, [x29, 64]
-	bne	.L1012
-	ldr	w2, [x29, 64]
-	mov	w1, w21
-	ldr	w3, [x20, 28]
-	mov	x0, x22
-	ubfx	x3, x3, 16, 5
-	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR6]
-	mov	w3, 256
-	mov	w2, 4
-	mov	x0, x23
-	bl	rknand_print_hex
-	b	.L1012
-.L1011:
-	adrp	x22, .LC35
-	adrp	x23, .LC36
-	add	x22, x22, :lo12:.LC35
-	add	x23, x23, :lo12:.LC36
-.L1013:
-	ldr	w1, [x20, 28]
-	ldr	w0, [x29, 64]
-	ubfx	x1, x1, 16, 5
-	ubfx	x0, x0, 22, 6
-	cmp	w1, w0
-	bge	.L1005
-	ldr	x0, [x19, #:lo12:.LANCHOR6]
-	ldr	w0, [x0]
-	str	w0, [x29, 72]
-	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1014
-	ldr	w0, [x29, 72]
-	tbz	x0, 17, .L1014
-	ldr	w1, [x29, 72]
-	adrp	x0, .LC38
-	add	x0, x0, :lo12:.LC38
-	bl	printf
-	b	.L1005
-.L1014:
-	add	w21, w21, 1
-	tst	x21, 16777215
-	bne	.L1013
-	ldr	w2, [x20, 28]
-	mov	w1, w21
-	ldr	w3, [x29, 64]
-	mov	x0, x22
-	ubfx	x2, x2, 16, 5
-	ubfx	x3, x3, 22, 6
-	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR6]
-	mov	w3, 256
-	mov	w2, 4
-	mov	x0, x23
-	bl	rknand_print_hex
-	b	.L1013
-	.size	nandc_xfer_done, .-nandc_xfer_done
-	.section	.text.nandc_xfer,"ax",@progbits
+	.size	buf_init, .-buf_init
+	.section	.text.gc_init,"ax",@progbits
 	.align	2
-	.global	nandc_xfer
-	.type	nandc_xfer, %function
-nandc_xfer:
-	stp	x29, x30, [sp, -64]!
+	.global	gc_init
+	.type	gc_init, %function
+gc_init:
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR70
+	mov	w2, 328
+	mov	w1, 0
 	add	x29, sp, 0
+	strb	wzr, [x0, #:lo12:.LANCHOR70]
+	adrp	x0, .LANCHOR130
 	stp	x19, x20, [sp, 16]
-	and	w19, w2, 255
-	stp	x21, x22, [sp, 32]
-	and	w22, w1, 255
-	mov	x21, x3
-	mov	w1, w19
-	mov	x3, x4
-	mov	x2, x21
-	mov	w0, w22
-	mov	x20, x4
-	bl	nandc_xfer_start
-	bl	nandc_xfer_done
-	cbnz	w22, .L1052
-	adrp	x0, .LANCHOR7
-	ldrb	w0, [x0, #:lo12:.LANCHOR7]
-	cmp	w0, 9
-	bne	.L1036
-	adrp	x1, .LANCHOR6
-	lsr	w19, w19, 2
-	mov	x20, x1
-	mov	w3, 1
-	ldr	x5, [x1, #:lo12:.LANCHOR6]
-	mov	w2, 0
-	mov	w0, 0
-.L1037:
-	cmp	w2, w19
-	bcc	.L1041
-	ldr	w19, [x5]
-	cmp	w3, 0
-	mov	w1, 512
-	csel	w0, w0, w1, eq
-	mov	w1, 8192
-	movk	w1, 0x2, lsl 16
-	and	w1, w19, w1
-	cmp	w1, 139264
-	bne	.L1035
-	mov	w1, w19
-	adrp	x0, .LC39
-	add	x0, x0, :lo12:.LC39
-	bl	printf
-	ldr	x0, [x20, #:lo12:.LANCHOR6]
-	orr	w19, w19, 131072
-.L1065:
-	str	w19, [x0]
+	adrp	x20, .LANCHOR63
+	add	x19, x20, :lo12:.LANCHOR63
+	strb	wzr, [x0, #:lo12:.LANCHOR130]
+	mov	x0, x19
+	bl	ftl_memset
 	mov	w0, -1
-.L1035:
+	strh	w0, [x20, #:lo12:.LANCHOR63]
+	adrp	x0, .LANCHOR80
+	str	xzr, [x19, 8]
+	adrp	x4, .LANCHOR88
+	adrp	x20, .LANCHOR71
+	ldrh	w1, [x0, #:lo12:.LANCHOR80]
+	lsr	w2, w1, 1
+	lsr	w0, w1, 2
+	strh	w2, [x19, 38]
+	adrp	x2, .LANCHOR81
+	strh	w0, [x19, 36]
+	adrp	x19, .LANCHOR72
+	strh	wzr, [x2, #:lo12:.LANCHOR81]
+	adrp	x2, .LANCHOR77
+	ldrb	w3, [x19, #:lo12:.LANCHOR72]
+	strh	wzr, [x2, #:lo12:.LANCHOR77]
+	adrp	x2, .LANCHOR78
+	strh	wzr, [x2, #:lo12:.LANCHOR78]
+	mul	w2, w1, w3
+	and	w2, w2, 65535
+	sub	w5, w2, #32
+	strh	w5, [x4, #:lo12:.LANCHOR88]
+	adrp	x4, .LANCHOR85
+	strh	w2, [x4, #:lo12:.LANCHOR85]
+	adrp	x2, .LANCHOR79
+	strh	w1, [x2, #:lo12:.LANCHOR79]
+	adrp	x1, .LANCHOR62
+	strh	w0, [x1, #:lo12:.LANCHOR62]
+	ldrh	w0, [x20, #:lo12:.LANCHOR71]
+	mul	w0, w0, w3
+	lsl	w0, w0, 2
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR131
+	str	x0, [x1, #:lo12:.LANCHOR131]
+	ldrb	w1, [x19, #:lo12:.LANCHOR72]
+	ldrh	w0, [x20, #:lo12:.LANCHOR71]
+	mul	w0, w0, w1
+	lsl	w0, w0, 2
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR132
+	str	x0, [x1, #:lo12:.LANCHOR132]
+	ldrh	w1, [x20, #:lo12:.LANCHOR71]
+	ldrb	w0, [x19, #:lo12:.LANCHOR72]
+	mul	w0, w1, w0
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR68
+	str	x0, [x1, #:lo12:.LANCHOR68]
+	ldrb	w1, [x19, #:lo12:.LANCHOR72]
+	ldrh	w0, [x20, #:lo12:.LANCHOR71]
+	mul	w0, w0, w1
+	lsl	w0, w0, 2
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR64
+	str	x0, [x1, #:lo12:.LANCHOR64]
+	ldrb	w1, [x19, #:lo12:.LANCHOR72]
+	ldrh	w0, [x20, #:lo12:.LANCHOR71]
+	mul	w0, w0, w1
+	lsl	w0, w0, 2
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR133
 	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 64
+	str	x0, [x1, #:lo12:.LANCHOR133]
+	adrp	x0, .LANCHOR83
+	ldp	x29, x30, [sp], 32
+	ldrh	w1, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR73
+	strh	w1, [x0, #:lo12:.LANCHOR73]
 	ret
-.L1041:
-	uxtw	x1, w2
-	add	x1, x1, 84
-	ldr	w1, [x5, x1, lsl 2]
-	str	w1, [x29, 56]
-	ldr	w1, [x29, 56]
-	ldr	w4, [x29, 56]
-	ubfx	x4, x4, 26, 1
-	and	w1, w4, w1, lsr 10
-	and	w3, w3, w1
-	ldr	w1, [x29, 56]
-	tbnz	x1, 2, .L1054
-	ldr	w1, [x29, 56]
-	tbnz	x1, 18, .L1054
-	ldr	w4, [x29, 56]
-	ldr	w1, [x29, 56]
-	ubfx	x4, x4, 3, 7
-	ubfx	x1, x1, 19, 7
-	cmp	w4, w1
-	ldr	w1, [x29, 56]
-	ble	.L1039
-	ubfx	x1, x1, 3, 7
-.L1040:
-	cmp	w0, w1
-	csel	w0, w0, w1, cs
-.L1038:
-	add	w2, w2, 1
-	b	.L1037
-.L1039:
-	ubfx	x1, x1, 19, 7
-	b	.L1040
-.L1054:
-	mov	w0, -1
-	b	.L1038
-.L1036:
-	adrp	x0, .LANCHOR27
-	lsr	w4, w19, 1
-	mov	w3, 64
-	mov	w1, 1
-	ldrb	w0, [x0, #:lo12:.LANCHOR27]
-	mov	w2, 0
-	adrp	x6, .LANCHOR30
-	cmp	w0, 25
-	mov	w0, 128
-	csel	w3, w3, w0, cc
-	mov	w0, 0
-.L1044:
-	add	w5, w3, w0
-	cmp	w2, w4
-	bcc	.L1045
-	adrp	x22, .LANCHOR6
-	lsr	w19, w19, 2
-	mov	w3, 0
-	mov	w0, 0
-	ldr	x4, [x22, #:lo12:.LANCHOR6]
-.L1046:
-	cmp	w3, w19
-	bcc	.L1050
-	str	wzr, [x4, 16]
-	cmn	w0, #1
-	beq	.L1051
-	ldr	w1, [x20]
-	cmn	w1, #1
-	bne	.L1051
-	ldr	w1, [x20, 4]
-	cmn	w1, #1
-	bne	.L1051
-	ldr	w1, [x21]
-	cmn	w1, #1
-	mov	w1, 512
-	csel	w0, w0, w1, ne
-.L1051:
-	ldr	w19, [x4]
-	mov	w1, 8192
-	movk	w1, 0x2, lsl 16
-	and	w1, w19, w1
-	cmp	w1, 139264
-	bne	.L1035
-	mov	w1, w19
-	adrp	x0, .LC40
-	add	x0, x0, :lo12:.LC40
-	bl	printf
-	orr	w19, w19, 131072
-	ldr	x0, [x22, #:lo12:.LANCHOR6]
-	b	.L1065
-.L1045:
-	ldr	x7, [x6, #:lo12:.LANCHOR30]
-	and	x0, x0, 4294967292
-	ldr	w0, [x7, x0]
-	lsl	w7, w2, 2
-	add	w2, w2, 1
-	strb	w0, [x20, x7]
-	lsr	w7, w0, 8
-	strb	w7, [x20, w1, uxtw]
-	add	w7, w1, 1
-	lsr	w8, w0, 16
-	lsr	w0, w0, 24
-	strb	w8, [x20, x7]
-	add	w7, w1, 2
-	add	w1, w1, 4
-	strb	w0, [x20, x7]
-	mov	w0, w5
-	b	.L1044
-.L1050:
-	uxtw	x1, w3
-	add	x1, x1, 8
-	ldr	w1, [x4, x1, lsl 2]
-	str	w1, [x29, 56]
-	ldr	w1, [x29, 56]
-	tbnz	x1, 2, .L1057
-	ldr	w1, [x29, 56]
-	tbnz	x1, 15, .L1057
-	ldr	w2, [x29, 56]
-	ubfx	x6, x2, 3, 5
-	ldr	w2, [x29, 56]
-	ldr	w1, [x29, 56]
-	ubfx	x2, x2, 27, 1
-	ubfx	x5, x1, 16, 5
-	ldr	w1, [x29, 56]
-	orr	w2, w6, w2, lsl 5
-	ubfx	x1, x1, 29, 1
-	orr	w1, w5, w1, lsl 5
-	cmp	w2, w1
-	ldr	w1, [x29, 56]
-	bls	.L1048
-	ubfx	x2, x1, 3, 5
-	ldr	w1, [x29, 56]
-	ubfx	x1, x1, 27, 1
-.L1064:
-	orr	w1, w2, w1, lsl 5
-	cmp	w0, w1
-	csel	w0, w0, w1, cs
-.L1047:
-	add	w3, w3, 1
-	b	.L1046
-.L1048:
-	ubfx	x2, x1, 16, 5
-	ldr	w1, [x29, 56]
-	ubfx	x1, x1, 29, 1
-	b	.L1064
-.L1057:
-	mov	w0, -1
-	b	.L1047
-.L1052:
+	.size	gc_init, .-gc_init
+	.section	.text.ftl_free,"ax",@progbits
+	.align	2
+	.global	ftl_free
+	.type	ftl_free, %function
+ftl_free:
+	b	free
+	.size	ftl_free, .-ftl_free
+	.section	.text.js_hash,"ax",@progbits
+	.align	2
+	.global	js_hash
+	.type	js_hash, %function
+js_hash:
+	mov	x4, x0
+	mov	w0, 42982
+	mov	x3, 0
+	movk	w0, 0x47c6, lsl 16
+.L1127:
+	cmp	w1, w3
+	bhi	.L1128
+	ret
+.L1128:
+	lsr	w2, w0, 2
+	ldrb	w5, [x4, x3]
+	add	w2, w2, w0, lsl 5
+	add	x3, x3, 1
+	add	w2, w2, w5
+	eor	w0, w0, w2
+	b	.L1127
+	.size	js_hash, .-js_hash
+	.section	.text.timer_get_time,"ax",@progbits
+	.align	2
+	.global	timer_get_time
+	.type	timer_get_time, %function
+timer_get_time:
 	mov	w0, 0
-	b	.L1035
-	.size	nandc_xfer, .-nandc_xfer
-	.section	.text.flash_read_page,"ax",@progbits
+	ret
+	.size	timer_get_time, .-timer_get_time
+	.section	.text.FlashCs123Init,"ax",@progbits
 	.align	2
-	.global	flash_read_page
-	.type	flash_read_page, %function
-flash_read_page:
-	stp	x29, x30, [sp, -80]!
+	.global	FlashCs123Init
+	.type	FlashCs123Init, %function
+FlashCs123Init:
+	ret
+	.size	FlashCs123Init, .-FlashCs123Init
+	.section	.text.rk_nand_de_init,"ax",@progbits
+	.align	2
+	.global	rk_nand_de_init
+	.type	rk_nand_de_init, %function
+rk_nand_de_init:
+	b	zftl_flash_de_init
+	.size	rk_nand_de_init, .-rk_nand_de_init
+	.section	.text.ftl_get_density,"ax",@progbits
+	.align	2
+	.global	ftl_get_density
+	.type	ftl_get_density, %function
+ftl_get_density:
+	and	w0, w0, 255
+	b	zftl_get_density
+	.size	ftl_get_density, .-ftl_get_density
+	.section	.text.ftl_get_capacity,"ax",@progbits
+	.align	2
+	.global	ftl_get_capacity
+	.type	ftl_get_capacity, %function
+ftl_get_capacity:
+	adrp	x0, .LANCHOR59
+	ldr	w0, [x0, #:lo12:.LANCHOR59]
+	ret
+	.size	ftl_get_capacity, .-ftl_get_capacity
+	.section	.text.rknand_print_hex,"ax",@progbits
+	.align	2
+	.global	rknand_print_hex
+	.type	rknand_print_hex, %function
+rknand_print_hex:
+	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	and	w21, w0, 255
-	adrp	x0, .LANCHOR6
-	stp	x19, x20, [sp, 16]
+	adrp	x21, .LC40
 	stp	x23, x24, [sp, 48]
-	mov	w23, w1
-	ldr	x19, [x0, #:lo12:.LANCHOR6]
-	adrp	x0, .LANCHOR22
+	mov	x22, x1
 	stp	x25, x26, [sp, 64]
-	mov	w24, w4
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	mov	x25, x2
-	mov	x26, x3
-	and	w20, w1, 2097151
-	ubfx	x22, x23, 24, 2
-	tbz	x0, 4, .L1067
-	mov	w3, w1
-	adrp	x0, .LC41
-	mov	w2, w22
-	mov	w1, w21
-	add	x0, x0, :lo12:.LC41
+	adrp	x23, .LC39
+	mov	x26, x0
+	mov	w24, w2
+	uxtw	x25, w3
+	add	x23, x23, :lo12:.LC39
+	add	x21, x21, :lo12:.LC40
+	stp	x19, x20, [sp, 16]
+	str	x27, [sp, 80]
+	mov	x19, 0
+	mov	w20, 0
+	adrp	x27, .LC41
+.L1135:
+	cmp	x25, x19
+	bne	.L1141
+	ldp	x19, x20, [sp, 16]
+	adrp	x1, .LC41
+	ldp	x21, x22, [sp, 32]
+	add	x1, x1, :lo12:.LC41
+	ldp	x23, x24, [sp, 48]
+	adrp	x0, .LC42
+	ldp	x25, x26, [sp, 64]
+	add	x0, x0, :lo12:.LC42
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	b	printf
+.L1141:
+	cbnz	w20, .L1136
+	mov	w2, w19
+	mov	x1, x26
+	mov	x0, x23
 	bl	printf
-.L1067:
-	bl	nandc_wait_flash_ready
-	mov	w0, w21
-	bl	nandc_cs
-	adrp	x5, .LANCHOR34
-	cbnz	w22, .L1068
-	mov	w0, w21
-	bl	flash_enter_slc_mode
-.L1069:
-	ubfiz	x4, x21, 8, 8
-	lsr	w0, w20, 8
-	add	x4, x19, x4
-	and	w23, w23, 255
-	str	wzr, [x4, 2056]
-	str	wzr, [x4, 2052]
-	str	wzr, [x4, 2052]
-	str	w23, [x4, 2052]
-	str	w0, [x4, 2052]
-	lsr	w0, w20, 16
-	str	w0, [x4, 2052]
-	mov	w0, 48
-	str	w0, [x4, 2056]
-	ldr	x0, [x5, #:lo12:.LANCHOR34]
-	ldrb	w0, [x0, 12]
-	cmp	w0, 3
-	bne	.L1071
-	cbz	w22, .L1071
-	add	w20, w20, w20, lsl 1
-	sub	w0, w20, #1
-	add	w0, w0, w22
-.L1081:
-	bl	nandc_set_seed
-	bl	nandc_wait_flash_ready
-	mov	w0, 5
-	str	w0, [x4, 2056]
-	str	wzr, [x4, 2052]
-	mov	w0, 224
-	str	wzr, [x4, 2052]
-	mov	x3, x25
-	str	w0, [x4, 2056]
-	mov	w2, w24
-	mov	w1, 0
-	mov	x4, x26
-	mov	w0, w21
-	bl	nandc_xfer
-	mov	w5, w0
-	cbnz	w22, .L1073
-	mov	w0, w21
-	bl	flash_exit_slc_mode
-.L1073:
-	mov	w0, 0
-	bl	nandc_de_cs
-	ldp	x19, x20, [sp, 16]
-	mov	w0, w5
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
-	ret
-.L1068:
-	ldr	x0, [x5, #:lo12:.LANCHOR34]
-	ldrb	w0, [x0, 12]
-	cmp	w0, 3
-	bne	.L1070
-	sxtw	x0, w21
-	add	x0, x0, 8
-	add	x0, x19, x0, lsl 8
-	str	w22, [x0, 8]
-	b	.L1069
-.L1070:
-	mov	w0, w21
-	bl	flash_exit_slc_mode
-	b	.L1069
-.L1071:
-	mov	w0, w20
-	b	.L1081
-	.size	flash_read_page, .-flash_read_page
-	.section	.text.micron_read_retrial,"ax",@progbits
+.L1136:
+	cmp	w24, 4
+	bne	.L1137
+	ldr	w1, [x22, x19, lsl 2]
+.L1143:
+	mov	x0, x21
+	add	w20, w20, 1
+	bl	printf
+	cmp	w20, 15
+	bls	.L1140
+	mov	w20, 0
+	add	x1, x27, :lo12:.LC41
+	adrp	x0, .LC42
+	add	x0, x0, :lo12:.LC42
+	bl	printf
+.L1140:
+	add	x19, x19, 1
+	b	.L1135
+.L1137:
+	cmp	w24, 2
+	bne	.L1139
+	ldrsh	w1, [x22, x19, lsl 1]
+	b	.L1143
+.L1139:
+	ldrb	w1, [x22, x19]
+	b	.L1143
+	.size	rknand_print_hex, .-rknand_print_hex
+	.section	.text.hynix_get_read_retry_default,"ax",@progbits
 	.align	2
-	.global	micron_read_retrial
-	.type	micron_read_retrial, %function
-micron_read_retrial:
-	stp	x29, x30, [sp, -128]!
+	.global	hynix_get_read_retry_default
+	.type	hynix_get_read_retry_default, %function
+hynix_get_read_retry_default:
+	stp	x29, x30, [sp, -144]!
+	mov	w2, -83
+	mov	w1, -82
 	add	x29, sp, 0
-	stp	x25, x26, [sp, 64]
-	and	w25, w0, 255
-	adrp	x0, .LANCHOR27
-	stp	x19, x20, [sp, 16]
+	stp	x27, x28, [sp, 80]
 	stp	x21, x22, [sp, 32]
-	mov	x26, x3
+	str	w0, [x29, 140]
+	adrp	x0, .LANCHOR12
+	stp	x19, x20, [sp, 16]
+	ldr	x28, [x0, #:lo12:.LANCHOR12]
 	stp	x23, x24, [sp, 48]
-	mov	w23, w2
-	stp	x27, x28, [sp, 80]
-	mov	x27, x4
-	ldrb	w21, [x0, #:lo12:.LANCHOR27]
-	and	x20, x25, 255
-	str	w5, [x29, 124]
-	bl	nandc_wait_flash_ready
-	adrp	x0, .LANCHOR6
-	adrp	x24, .LC42
-	add	w21, w21, w21, lsl 1
-	adrp	x7, .LANCHOR113
-	ldr	x8, [x0, #:lo12:.LANCHOR6]
-	asr	w21, w21, 2
-	add	x24, x24, :lo12:.LC42
-	add	x7, x7, :lo12:.LANCHOR113
-	mov	w22, 0
-	mov	w19, -1
-	add	x28, x8, x20, lsl 8
-.L1083:
-	ldrb	w0, [x7]
-	cmp	w22, w0
-	bcc	.L1087
-.L1086:
-	add	x8, x8, x20, lsl 8
-	mov	w0, 239
-	str	w0, [x8, 2056]
-	mov	w0, 137
-	str	w0, [x8, 2052]
-	mov	w0, 200
-	bl	timer_delay_ns
-	str	wzr, [x8, 2048]
-	str	wzr, [x8, 2048]
-	cmp	w19, w21
-	str	wzr, [x8, 2048]
-	str	wzr, [x8, 2048]
-	bcc	.L1088
-	cmn	w19, #1
-	mov	w0, 256
-	csel	w19, w19, w0, eq
-.L1088:
-	cmp	w19, 256
-	ccmn	w19, #1, 4, ne
-	bne	.L1082
-	adrp	x0, .LC43
-	mov	w4, w19
-	mov	w3, w22
-	mov	w2, w23
-	mov	w1, w22
-	add	x0, x0, :lo12:.LC43
-	bl	printf
-.L1082:
-	mov	w0, w19
+	add	x0, x28, 112
+	str	x0, [x29, 112]
+	ldrb	w0, [x29, 140]
+	add	x22, x28, 128
+	stp	x25, x26, [sp, 64]
+	strb	w0, [x28, 112]
+	mov	w0, -84
+	ldr	w3, [x29, 140]
+	strb	w0, [x28, 128]
+	mov	w0, -81
+	strb	w2, [x28, 129]
+	cmp	w3, 2
+	strb	w1, [x28, 130]
+	strb	w0, [x28, 131]
+	bne	.L1145
+	mov	w0, -89
+	strb	w0, [x28, 128]
+	adrp	x0, .LANCHOR134+17
+	mov	w1, -9
+	strb	w1, [x0, #:lo12:.LANCHOR134+17]
+.L1200:
+	mov	w0, 7
+	b	.L1235
+.L1145:
+	ldr	w3, [x29, 140]
+	cmp	w3, 3
+	bne	.L1147
+	mov	x6, 0
+.L1148:
+	sub	w0, w6, #80
+	strb	w0, [x22, x6]
+	add	x6, x6, 1
+	cmp	x6, 8
+	bne	.L1148
+	stp	w6, w6, [x29, 132]
+.L1146:
+	ldr	w0, [x29, 140]
+	sub	w0, w0, #1
+	cmp	w0, 1
+	bhi	.L1153
+	adrp	x7, .LANCHOR15
+	adrp	x11, .LANCHOR17
+	add	x24, x7, :lo12:.LANCHOR15
+	add	x25, x11, :lo12:.LANCHOR17
+	mov	w20, 0
+	mov	w26, 55
+.L1154:
+	ldrb	w0, [x24]
+	cmp	w0, w20
+	bhi	.L1160
+.L1161:
+	ldr	x0, [x29, 112]
+	ldrb	w1, [x29, 136]
+	strb	w1, [x0, 1]
+	ldrb	w1, [x29, 132]
+	strb	w1, [x0, 2]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 128
+	ldp	x29, x30, [sp], 144
 	ret
-.L1087:
-	mov	w0, 239
-	str	w0, [x28, 2056]
-	mov	w0, 137
-	str	w0, [x28, 2052]
-	stp	x7, x8, [x29, 96]
-	mov	w0, 200
+.L1147:
+	ldr	w3, [x29, 140]
+	cmp	w3, 4
+	bne	.L1149
+	mov	w3, -52
+	strb	w3, [x28, 128]
+	mov	w3, -65
+	strb	w3, [x28, 129]
+	mov	w3, -86
+	strb	w3, [x28, 130]
+	mov	w3, -85
+	strb	w0, [x28, 135]
+	strb	w3, [x28, 131]
+	mov	w0, 8
+	mov	w3, -51
+	strb	w2, [x28, 133]
+	strb	w3, [x28, 132]
+	strb	w1, [x28, 134]
+	str	w0, [x29, 132]
+.L1236:
+	str	w0, [x29, 136]
+	b	.L1146
+.L1149:
+	ldr	w0, [x29, 140]
+	cmp	w0, 5
+	bne	.L1150
+	mov	w0, 56
+	strb	w0, [x28, 128]
+	mov	w0, 57
+	strb	w0, [x28, 129]
+	mov	w0, 58
+	strb	w0, [x28, 130]
+	mov	w0, 59
+	strb	w0, [x28, 131]
+	mov	w0, 8
+.L1235:
+	str	w0, [x29, 132]
+	mov	w0, 4
+	b	.L1236
+.L1150:
+	ldr	w0, [x29, 140]
+	cmp	w0, 6
+	bne	.L1151
+	mov	w0, 14
+	strb	w0, [x28, 128]
+	mov	w0, 15
+	strb	w0, [x28, 129]
+	mov	w0, 16
+	strb	w0, [x28, 130]
+	mov	w0, 17
+	strb	w0, [x28, 131]
+	mov	w0, 12
+	b	.L1235
+.L1151:
+	ldr	w0, [x29, 140]
+	cmp	w0, 7
+	bne	.L1200
+	mov	x0, 0
+.L1152:
+	sub	w1, w0, #80
+	strb	w1, [x22, x0]
+	add	x0, x0, 1
+	cmp	x0, 8
+	bne	.L1152
+	mov	w0, -44
+	strb	w0, [x28, 136]
+	mov	w0, -43
+	strb	w0, [x28, 137]
+	mov	w0, 12
+	str	w0, [x29, 132]
+	mov	w0, 10
+	b	.L1236
+.L1160:
+	ldrb	w0, [x25, w20, sxtw]
+	mov	x1, 32
+	mov	w2, 160
+	mov	x21, 0
+	umaddl	x2, w2, w0, x1
+	ldr	x1, [x29, 112]
+	ubfiz	x0, x0, 8, 8
+	add	x19, x1, x2
+	adrp	x1, .LANCHOR13
+	ldr	x4, [x1, #:lo12:.LANCHOR13]
+	add	x23, x4, x0
+.L1155:
+	str	w26, [x23, 2056]
+	ldrb	w0, [x22, x21]
+	str	w0, [x23, 2052]
+	mov	w0, 80
 	bl	timer_delay_ns
-	add	w10, w22, 1
-	str	w10, [x28, 2048]
-	str	wzr, [x28, 2048]
-	mov	x3, x27
-	ldr	w4, [x29, 124]
-	mov	x2, x26
-	str	wzr, [x28, 2048]
-	mov	w1, w23
-	str	wzr, [x28, 2048]
-	mov	w0, w25
-	str	w10, [x29, 116]
-	bl	flash_read_page
-	mov	w6, w0
-	mov	w4, w19
-	str	w6, [x29, 120]
-	mov	w3, w22
-	mov	w2, w23
-	mov	w1, w22
-	mov	x0, x24
-	bl	printf
-	ldp	w10, w6, [x29, 116]
-	ldp	x7, x8, [x29, 96]
-	cmn	w6, #1
-	beq	.L1084
-	adrp	x0, .LANCHOR111
-	cmn	w19, #1
-	csel	w19, w19, w6, ne
-	cmp	w6, w21
-	ldr	x26, [x0, #:lo12:.LANCHOR111]
-	adrp	x0, .LANCHOR112
-	ldr	x27, [x0, #:lo12:.LANCHOR112]
-	bcc	.L1090
-.L1084:
-	mov	w22, w10
-	b	.L1083
-.L1090:
-	mov	w19, w6
-	b	.L1086
-	.size	micron_read_retrial, .-micron_read_retrial
-	.section	.text.toshiba_3d_read_retrial,"ax",@progbits
-	.align	2
-	.global	toshiba_3d_read_retrial
-	.type	toshiba_3d_read_retrial, %function
-toshiba_3d_read_retrial:
-	stp	x29, x30, [sp, -128]!
-	and	w6, w1, 255
-	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR2
-	stp	x25, x26, [sp, 64]
-	and	w25, w0, 255
-	stp	x27, x28, [sp, 80]
-	mov	x27, x3
-	stp	x23, x24, [sp, 48]
-	mov	x28, x4
-	mov	w23, w2
-	stp	x19, x20, [sp, 16]
-	str	w5, [x29, 124]
-	bl	nandc_wait_flash_ready
-	adrp	x0, .LANCHOR6
-	mov	w1, 46
-	mov	w2, 56
-	ldr	x26, [x0, #:lo12:.LANCHOR6]
-	and	x0, x25, 255
-	add	x21, x0, 8
-	str	x0, [x29, 112]
-	ldrb	w0, [x22, #:lo12:.LANCHOR2]
-	add	x21, x26, x21, lsl 8
-	cmp	w0, 36
-	mov	w0, 26
-	csel	w1, w2, w1, ne
-	str	w1, [x29, 96]
-	mov	w1, 10
-	csel	w0, w1, w0, ne
-	str	w0, [x29, 104]
-	cbnz	w6, .L1102
-	sxtw	x24, w25
-	adrp	x0, .LC44
-	add	x24, x24, 8
-	add	x0, x0, :lo12:.LC44
-	add	x24, x26, x24, lsl 8
-	mov	w19, -1
-	mov	w20, 1
+	ldr	w0, [x23, 2048]
+	strb	w0, [x19, x21]
+	add	x21, x21, 1
+	ldr	w0, [x29, 136]
+	cmp	w0, w21, uxtb
+	bhi	.L1155
+	adrp	x3, .LANCHOR134
+	add	x3, x3, :lo12:.LANCHOR134
+	mov	x0, 0
+.L1158:
+	add	x15, x19, x0
+	add	x14, x3, x0
+	mov	x1, 1
+.L1157:
+	lsl	x4, x1, 2
+	lsl	x16, x1, 3
+	ldrb	w17, [x19, x0]
+	add	x1, x1, 1
+	cmp	x1, 7
+	ldrb	w4, [x14, x4]
+	add	w4, w4, w17
+	strb	w4, [x15, x16]
+	bne	.L1157
+	add	x0, x0, 1
+	cmp	x0, 4
+	bne	.L1158
+	add	w5, w20, 1
+	strb	wzr, [x19, 16]
+	strb	wzr, [x19, 24]
+	and	w20, w5, 255
+	strb	wzr, [x19, 32]
+	strb	wzr, [x19, 40]
+	strb	wzr, [x19, 48]
+	strb	wzr, [x19, 41]
+	strb	wzr, [x19, 49]
+	b	.L1154
+.L1153:
+	ldr	w0, [x29, 140]
+	sub	w0, w0, #3
+	cmp	w0, 4
+	bhi	.L1161
+	ldp	w0, w1, [x29, 132]
+	adrp	x19, .LANCHOR15
+	add	x19, x19, :lo12:.LANCHOR15
+	sub	w13, w1, #1
+	mul	w15, w0, w1
+	and	x13, x13, 255
+	asr	w0, w15, 2
+	stp	w0, wzr, [x29, 124]
+	lsl	w0, w15, 4
+	str	w0, [x29, 120]
+	ldr	w0, [x29, 124]
+	lsl	w22, w0, 1
+	sbfiz	x21, x0, 2, 32
+	ldr	w0, [x29, 140]
+	sub	w20, w0, #5
+	add	x0, x13, 1
 	str	x0, [x29, 96]
-.L1108:
-	ldrb	w0, [x22, #:lo12:.LANCHOR2]
-	cmp	w0, 36
-	bne	.L1103
-	mov	x0, x21
-	mov	w2, 0
-	mov	w1, w20
-	bl	toshiba_tlc_set_rr_para
-	mov	w0, 93
-	str	w0, [x24, 8]
-.L1104:
-	ldr	w4, [x29, 124]
-	mov	x3, x28
-	mov	x2, x27
-	mov	w1, w23
-	mov	w0, w25
-	bl	flash_read_page
-	mov	w4, w0
-	mov	w3, w0
-	ldr	x0, [x29, 96]
-	str	w4, [x29, 120]
-	mov	w2, w23
-	mov	w1, w20
-	bl	printf
-	ldr	w4, [x29, 120]
-	cmn	w4, #1
-	beq	.L1105
-	adrp	x0, .LANCHOR111
-	cmn	w19, #1
-	csel	w19, w19, w4, ne
-	ldr	x27, [x0, #:lo12:.LANCHOR111]
-	adrp	x0, .LANCHOR112
-	ldr	x28, [x0, #:lo12:.LANCHOR112]
-	adrp	x0, .LANCHOR27
-	ldrb	w0, [x0, #:lo12:.LANCHOR27]
-	add	w0, w0, w0, lsl 1
-	cmp	w4, w0, lsr 2
-	bcc	.L1121
-.L1105:
-	ldr	w0, [x29, 104]
-	add	w20, w20, 1
-	cmp	w0, w20
-	bne	.L1108
-.L1107:
-	ldrb	w0, [x22, #:lo12:.LANCHOR2]
-	cmp	w0, 36
-	bne	.L1109
-	mov	w2, 0
-.L1135:
-	mov	w1, 0
-	mov	x0, x21
-	bl	toshiba_tlc_set_rr_para
-	b	.L1110
-.L1103:
-	mov	w1, w20
-	mov	x0, x21
-	bl	toshiba_3d_set_slc_rr_para
-	b	.L1104
-.L1121:
-	mov	w19, w4
-	b	.L1107
-.L1109:
-	mov	w1, 0
-	mov	x0, x21
-	bl	toshiba_3d_set_slc_rr_para
-.L1110:
-	ldrb	w0, [x22, #:lo12:.LANCHOR2]
-	cmp	w0, 36
-	bne	.L1118
+.L1162:
+	ldrb	w0, [x19]
+	ldr	w1, [x29, 128]
+	cmp	w0, w1
+	bls	.L1161
+	ldr	w1, [x29, 128]
+	adrp	x0, .LANCHOR17
+	add	x0, x0, :lo12:.LANCHOR17
+	mov	w10, 160
+	mov	w23, 255
+	ldrb	w4, [x0, w1, sxtw]
+	mov	x0, 32
+	umaddl	x10, w10, w4, x0
 	ldr	x0, [x29, 112]
-	add	x26, x26, x0, lsl 8
-	mov	w0, 85
-	str	w0, [x26, 2056]
-	mov	w0, 255
-	str	wzr, [x26, 2052]
-	str	wzr, [x26, 2048]
-	str	w0, [x26, 2056]
-.L1118:
-	mov	w4, w19
-	mov	w3, w20
-	mov	w2, w23
-	mov	w1, w20
-	adrp	x0, .LC46
-	add	x0, x0, :lo12:.LC46
-	bl	printf
-	adrp	x0, .LANCHOR27
-	ldrb	w0, [x0, #:lo12:.LANCHOR27]
-	add	w0, w0, w0, lsl 1
-	cmp	w19, w0, lsr 2
-	bcc	.L1119
-	cmn	w19, #1
-	mov	w0, 256
-	csel	w19, w19, w0, eq
-.L1119:
-	bl	nandc_wait_flash_ready
-	mov	w0, w19
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 128
-	ret
-.L1102:
-	sxtw	x24, w25
-	orr	w23, w23, w6, lsl 24
-	add	x24, x24, 8
-	adrp	x0, .LC45
-	add	x24, x26, x24, lsl 8
-	add	x0, x0, :lo12:.LC45
-	mov	w19, -1
-	mov	w20, 1
+	ubfiz	x4, x4, 8, 8
+	add	x0, x0, x10
 	str	x0, [x29, 104]
-.L1116:
-	ldrb	w0, [x22, #:lo12:.LANCHOR2]
-	cmp	w0, 36
-	bne	.L1111
-	mov	x0, x21
-	mov	w2, 1
-	mov	w1, w20
-	bl	toshiba_tlc_set_rr_para
-	mov	w0, 93
-.L1134:
-	str	w0, [x24, 8]
-	mov	x3, x28
-	mov	x2, x27
-	mov	w1, w23
-	ldr	w4, [x29, 124]
-	mov	w0, w25
-	bl	flash_read_page
-	mov	w4, w0
-	mov	w3, w0
-	ldr	x0, [x29, 104]
-	str	w4, [x29, 120]
-	mov	w2, w23
-	mov	w1, w20
-	bl	printf
-	ldr	w4, [x29, 120]
-	cmn	w4, #1
-	beq	.L1113
-	adrp	x0, .LANCHOR111
-	cmn	w19, #1
-	csel	w19, w19, w4, ne
-	ldr	x27, [x0, #:lo12:.LANCHOR111]
-	adrp	x0, .LANCHOR112
-	ldr	x28, [x0, #:lo12:.LANCHOR112]
-	adrp	x0, .LANCHOR27
-	ldrb	w0, [x0, #:lo12:.LANCHOR27]
-	add	w0, w0, w0, lsl 1
-	cmp	w4, w0, lsr 2
-	bcc	.L1122
-.L1113:
-	ldr	w0, [x29, 96]
-	add	w20, w20, 1
-	cmp	w0, w20
-	bne	.L1116
-.L1115:
-	ldrb	w0, [x22, #:lo12:.LANCHOR2]
-	cmp	w0, 36
-	bne	.L1117
-	mov	w2, 1
-	b	.L1135
-.L1111:
-	mov	x0, x21
-	mov	w1, w20
-	bl	toshiba_3d_set_tlc_rr_para
-	mov	w0, 38
-	b	.L1134
-.L1122:
-	mov	w19, w4
-	b	.L1115
-.L1117:
-	mov	w1, 0
-	mov	x0, x21
-	bl	toshiba_3d_set_tlc_rr_para
-	b	.L1110
-	.size	toshiba_3d_read_retrial, .-toshiba_3d_read_retrial
-	.section	.text.toshiba_read_retrial,"ax",@progbits
-	.align	2
-	.global	toshiba_read_retrial
-	.type	toshiba_read_retrial, %function
-toshiba_read_retrial:
-	stp	x29, x30, [sp, -128]!
-	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	stp	x27, x28, [sp, 80]
-	mov	x27, x3
-	stp	x19, x20, [sp, 16]
-	mov	x28, x4
-	stp	x25, x26, [sp, 64]
-	and	w19, w0, 255
-	stp	x23, x24, [sp, 48]
-	and	x26, x19, 255
-	stp	w5, w2, [x29, 120]
+	adrp	x0, .LANCHOR13
+	ldr	x0, [x0, #:lo12:.LANCHOR13]
+	add	x27, x0, x4
+	str	w23, [x27, 2056]
 	bl	nandc_wait_flash_ready
-	adrp	x0, .LANCHOR6
-	adrp	x1, .LANCHOR2
-	str	x1, [x29, 112]
-	add	x21, x26, 8
-	ldr	x22, [x0, #:lo12:.LANCHOR6]
-	ldrb	w0, [x1, #:lo12:.LANCHOR2]
-	sub	w0, w0, #67
-	add	x21, x22, x21, lsl 8
-	and	w0, w0, 255
-	cmp	w0, 1
-	bls	.L1154
-	adrp	x0, .LANCHOR35
-	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbz	w0, .L1155
-	mov	w23, 1
-	mov	w0, 1
-	bl	nandc_set_if_mode
-.L1138:
-	add	x0, x22, x26, lsl 8
-	mov	w1, 92
-	str	w1, [x0, 2056]
-	mov	w1, 197
-	str	w1, [x0, 2056]
-.L1137:
-	sxtw	x0, w19
-	mov	w20, 1
-	add	x0, x0, 8
-	mov	w24, -1
-	add	x0, x22, x0, lsl 8
-	str	x0, [x29, 104]
-.L1139:
-	adrp	x0, .LANCHOR113
-	ldrb	w0, [x0, #:lo12:.LANCHOR113]
-	add	w0, w0, 1
-	cmp	w20, w0
-	bcc	.L1148
-	mov	w25, w24
-.L1147:
-	ldr	x0, [x29, 112]
-	mov	w1, 0
-	ldrb	w0, [x0, #:lo12:.LANCHOR2]
-	sub	w0, w0, #67
-	and	w0, w0, 255
-	cmp	w0, 1
-	mov	x0, x21
-	bhi	.L1149
-	bl	sandisk_set_rr_para
-.L1150:
-	sxtw	x19, w19
-	mov	w0, 255
-	add	x19, x19, 8
-	add	x22, x22, x19, lsl 8
-	str	w0, [x22, 8]
-	adrp	x0, .LANCHOR27
-	ldrb	w0, [x0, #:lo12:.LANCHOR27]
-	add	w0, w0, w0, lsl 1
-	cmp	w25, w0, lsr 2
-	bcc	.L1151
-	cmn	w25, #1
-	mov	w0, 256
-	csel	w25, w25, w0, eq
-.L1151:
-	cmp	w25, 256
-	ccmn	w25, #1, 4, ne
-	bne	.L1152
-	ldr	w2, [x29, 124]
-	adrp	x0, .LC46
-	mov	w4, w25
-	mov	w3, w20
-	mov	w1, w20
-	add	x0, x0, :lo12:.LC46
-	bl	printf
-.L1152:
-	bl	nandc_wait_flash_ready
-	cbz	w23, .L1136
+	mov	w0, 54
+	str	w0, [x27, 2056]
+	ldr	w0, [x29, 140]
+	cmp	w0, 4
+	bne	.L1163
+	mov	w0, 64
+	str	w23, [x27, 2052]
+	str	w0, [x27, 2048]
+	mov	w0, 204
+.L1237:
+	str	w0, [x27, 2052]
+	mov	w0, 77
+	b	.L1238
+.L1163:
+	cmp	w20, 1
+	bhi	.L1165
+	ldrb	w0, [x28, 128]
+	str	w0, [x27, 2052]
+	mov	w0, 82
+.L1238:
+	str	w0, [x27, 2048]
+	mov	w0, 22
+	str	w0, [x27, 2056]
+	mov	w0, 23
+	str	w0, [x27, 2056]
 	mov	w0, 4
-	bl	nandc_set_if_mode
-.L1136:
-	mov	w0, w25
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 128
-	ret
-.L1155:
-	mov	w23, 0
-	b	.L1138
-.L1154:
-	mov	w23, 0
-	b	.L1137
-.L1148:
-	ldr	x0, [x29, 112]
-	mov	w1, w20
-	ldrb	w0, [x0, #:lo12:.LANCHOR2]
-	sub	w0, w0, #67
-	and	w0, w0, 255
-	cmp	w0, 1
-	mov	x0, x21
-	bhi	.L1140
-	bl	sandisk_set_rr_para
-.L1141:
-	ldr	x0, [x29, 112]
-	ldrb	w0, [x0, #:lo12:.LANCHOR2]
-	cmp	w0, 34
-	bne	.L1142
-	adrp	x0, .LANCHOR113
-	ldrb	w0, [x0, #:lo12:.LANCHOR113]
-	sub	w0, w0, #3
-	cmp	w20, w0
-	bne	.L1142
-	ldr	x1, [x29, 104]
-	mov	w0, 179
-	str	w0, [x1, 8]
-.L1142:
-	add	x0, x22, x26, lsl 8
-	mov	w1, 38
-	ldr	w4, [x29, 120]
-	mov	x3, x28
-	mov	x2, x27
-	str	w1, [x0, 2056]
-	mov	w1, 93
-	str	w1, [x0, 2056]
-	mov	w0, w19
-	ldr	w1, [x29, 124]
-	bl	flash_read_page
-	mov	w25, w0
-	cmn	w0, #1
-	beq	.L1145
-	cmn	w24, #1
-	csel	w24, w24, w0, ne
-	adrp	x0, .LANCHOR111
-	ldr	x27, [x0, #:lo12:.LANCHOR111]
-	adrp	x0, .LANCHOR112
-	ldr	x28, [x0, #:lo12:.LANCHOR112]
-	adrp	x0, .LANCHOR27
-	ldrb	w0, [x0, #:lo12:.LANCHOR27]
-	add	w0, w0, w0, lsl 1
-	cmp	w25, w0, lsr 2
-	bcc	.L1147
-.L1145:
-	add	w20, w20, 1
-	b	.L1139
-.L1140:
-	bl	toshiba_set_rr_para
-	b	.L1141
-.L1149:
-	bl	toshiba_set_rr_para
-	b	.L1150
-	.size	toshiba_read_retrial, .-toshiba_read_retrial
-	.section	.text.hynix_read_retrial,"ax",@progbits
-	.align	2
-	.global	hynix_read_retrial
-	.type	hynix_read_retrial, %function
-hynix_read_retrial:
-	stp	x29, x30, [sp, -128]!
-	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	and	x23, x0, 255
-	adrp	x0, .LANCHOR5
-	stp	x27, x28, [sp, 80]
-	stp	x21, x22, [sp, 32]
-	mov	w27, w5
-	ldr	x28, [x0, #:lo12:.LANCHOR5]
-	mov	w22, w2
-	stp	x25, x26, [sp, 64]
-	mov	x25, x3
-	add	x28, x28, 112
-	stp	x19, x20, [sp, 16]
-	add	x0, x28, x23
-	mov	x26, x4
-	mov	x21, x23
-	mov	w19, -1
-	ldrb	w24, [x28, 2]
-	ldrb	w20, [x0, 8]
+	str	w0, [x27, 2056]
+	mov	w0, 25
+	str	w0, [x27, 2056]
+	str	wzr, [x27, 2056]
+	str	wzr, [x27, 2052]
+	ldr	w0, [x29, 140]
+	str	wzr, [x27, 2052]
+	cmp	w0, 6
+	bne	.L1166
+	mov	w0, 31
+	str	w0, [x27, 2052]
+.L1167:
+	mov	w23, 2
+	str	w23, [x27, 2052]
+	str	wzr, [x27, 2052]
+	mov	w0, 48
+	str	w0, [x27, 2056]
 	bl	nandc_wait_flash_ready
-	adrp	x6, .LANCHOR27
-	add	x6, x6, :lo12:.LANCHOR27
-	mov	w5, 0
-	adrp	x7, .LANCHOR111
-	adrp	x8, .LANCHOR112
+	cmp	w20, 1
+	bls	.L1201
+	ldr	w0, [x29, 140]
+	cmp	w0, 7
+	mov	w0, 32
+	csel	w23, w23, w0, ne
+.L1168:
+	adrp	x3, .LANCHOR135
+	mov	x1, 0
+	ldr	x0, [x3, #:lo12:.LANCHOR135]
 .L1169:
-	cmp	w5, w24
-	bcc	.L1174
+	ldr	w2, [x27, 2048]
+	strb	w2, [x0, x1]
+	add	x1, x1, 1
+	cmp	w23, w1, uxtb
+	bhi	.L1169
+	ldr	w1, [x29, 140]
+	cmp	w1, 7
+	bne	.L1170
+	mov	w1, 0
+.L1172:
+	ldrb	w2, [x0]
+	cmp	w2, 12
+	beq	.L1171
+	ldrb	w2, [x0, 1]
+	cmp	w2, 10
+	beq	.L1171
+	add	w1, w1, 1
+	add	x0, x0, 4
+	and	w1, w1, 255
+	cmp	w1, 8
+	bne	.L1172
 .L1173:
-	adrp	x0, .LANCHOR27
-	add	x23, x28, x23
-	ldrb	w0, [x0, #:lo12:.LANCHOR27]
-	strb	w20, [x23, 8]
-	add	w0, w0, w0, lsl 1
-	cmp	w19, w0, lsr 2
-	bcc	.L1175
-	cmn	w19, #1
-	mov	w0, 256
-	csel	w19, w19, w0, eq
-.L1175:
-	cmp	w19, 256
-	ccmn	w19, #1, 4, ne
-	bne	.L1168
-	adrp	x0, .LC47
-	mov	w4, w19
-	mov	w3, w5
-	mov	w2, w22
-	mov	w1, w5
-	add	x0, x0, :lo12:.LC47
+	adrp	x0, .LC43
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC43
 	bl	printf
-.L1168:
-	mov	w0, w19
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 128
-	ret
-.L1174:
-	add	w20, w20, 1
-	stp	x6, x8, [x29, 96]
-	and	w20, w20, 255
-	str	x7, [x29, 112]
-	cmp	w24, w20
-	str	w5, [x29, 124]
-	csel	w20, w20, wzr, hi
-	mov	w0, w21
-	mov	w1, w20
-	bl	hynix_set_rr_para
-	mov	w4, w27
-	mov	x3, x26
-	mov	x2, x25
-	mov	w1, w22
-	mov	w0, w21
-	bl	flash_read_page
-	ldr	w5, [x29, 124]
-	cmn	w0, #1
-	ldp	x6, x8, [x29, 96]
-	ldr	x7, [x29, 112]
-	beq	.L1171
-	ldrb	w1, [x6]
-	cmn	w19, #1
-	csel	w19, w19, w0, ne
-	ldr	x25, [x7, #:lo12:.LANCHOR111]
-	ldr	x26, [x8, #:lo12:.LANCHOR112]
-	add	w1, w1, w1, lsl 1
-	cmp	w0, w1, lsr 2
-	bcc	.L1177
+.L1175:
+	b	.L1175
+.L1165:
+	mov	w0, 174
+	str	w0, [x27, 2052]
+	str	wzr, [x27, 2048]
+	mov	w0, 176
+	b	.L1237
+.L1166:
+	str	wzr, [x27, 2052]
+	b	.L1167
+.L1201:
+	mov	w23, 16
+	b	.L1168
 .L1171:
-	add	w5, w5, 1
-	b	.L1169
-.L1177:
-	mov	w19, w0
-	b	.L1173
-	.size	hynix_read_retrial, .-hynix_read_retrial
-	.section	.text.flash_ddr_tunning_read,"ax",@progbits
-	.align	2
-	.global	flash_ddr_tunning_read
-	.type	flash_ddr_tunning_read, %function
-flash_ddr_tunning_read:
-	stp	x29, x30, [sp, -144]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	w20, 0
-	stp	x21, x22, [sp, 32]
-	mov	w19, 0
-	stp	x23, x24, [sp, 48]
-	mov	w23, w1
-	stp	x25, x26, [sp, 64]
-	adrp	x24, .LC48
-	stp	x27, x28, [sp, 80]
-	and	w25, w0, 255
-	mov	x26, x2
-	mov	x27, x3
-	str	w4, [x29, 140]
-	add	x24, x24, :lo12:.LC48
-	bl	nandc_get_ddr_para
-	mov	w8, w0
-	mov	w28, 1024
-	mov	w21, 6
-	mov	w22, -1
-	mov	w6, 0
-	mov	w7, 0
-	adrp	x10, .LANCHOR111
-	adrp	x11, .LANCHOR112
-.L1192:
-	stp	x11, x10, [x29, 104]
-	mov	w0, w21
-	stp	w8, w6, [x29, 124]
-	str	w7, [x29, 132]
-	bl	nandc_set_ddr_para
-	ldr	w4, [x29, 140]
-	mov	x3, x27
-	mov	x2, x26
-	mov	w1, w23
-	mov	w0, w25
-	bl	flash_read_page
-	mov	w4, w0
-	mov	w3, w0
-	str	w4, [x29, 136]
-	mov	w2, w23
-	mov	w1, w21
-	mov	x0, x24
-	bl	printf
-	ldp	w7, w4, [x29, 132]
-	add	w0, w28, 1
-	ldp	w8, w6, [x29, 124]
+	cmp	w1, 6
+	bhi	.L1173
+.L1174:
+	ldr	x2, [x3, #:lo12:.LANCHOR135]
+	mov	x0, 0
+.L1179:
+	ldr	w1, [x29, 120]
+	cmp	w1, w0
+	bgt	.L1180
+	ldr	x1, [x3, #:lo12:.LANCHOR135]
+	mov	w16, 8
+	add	x3, x1, x21
+.L1182:
+	mov	x0, 0
+.L1181:
+	ldr	w17, [x3, x0, lsl 2]
+	ldr	w4, [x29, 124]
+	mvn	w17, w17
+	str	w17, [x3, x0, lsl 2]
+	add	x0, x0, 1
 	cmp	w4, w0
-	ldp	x11, x10, [x29, 104]
-	bhi	.L1188
-	ldr	x26, [x10, #:lo12:.LANCHOR111]
-	cmp	w4, 2
-	ldr	x27, [x11, #:lo12:.LANCHOR112]
-	bhi	.L1197
-	add	w19, w19, 1
-	cmp	w19, 7
-	bls	.L1197
-	mov	w0, w20
-	mov	w28, w4
-	sub	w20, w21, w19
-	mov	w22, 0
+	bgt	.L1181
+	add	x3, x3, x22, uxtw 2
+	subs	w16, w16, #1
+	bne	.L1182
+	mov	x17, x1
+	mov	w23, 0
+	mov	w26, 1
+.L1183:
+	mov	w3, 0
+	mov	w0, 0
+.L1187:
+	mov	x25, x17
+	lsl	w16, w26, w0
+	mov	w24, 16
+	mov	w30, 0
+.L1185:
+	ldr	w4, [x25]
+	add	x25, x25, x21
+	bics	wzr, w16, w4
+	cinc	w30, w30, eq
+	subs	w24, w24, #1
+	bne	.L1185
+	cmp	w30, 9
+	orr	w16, w3, w16
+	add	w0, w0, 1
+	csel	w3, w16, w3, cs
+	cmp	w0, 32
+	bne	.L1187
+	ldr	w0, [x29, 124]
+	add	w23, w23, 1
+	str	w3, [x17], 4
+	cmp	w0, w23
+	bgt	.L1183
+	mov	x0, 0
+	mov	w3, 0
 .L1190:
-	cmp	w19, w7
-	csel	w20, w20, w0, hi
-.L1191:
-	cbz	w20, .L1193
-	adrp	x0, .LANCHOR27
-	mov	w1, 3
-	ldrb	w0, [x0, #:lo12:.LANCHOR27]
-	udiv	w0, w0, w1
-	cmp	w0, w28
-	bls	.L1193
-	mov	w1, w20
-	adrp	x0, .LC49
-	add	x0, x0, :lo12:.LC49
+	ldr	w16, [x1, x0]
+	add	x0, x0, 4
+	cmp	w16, 0
+	cinc	w3, w3, eq
+	cmp	x0, 32
+	bne	.L1190
+	cmp	w3, 7
+	ble	.L1191
+	mov	w3, 1024
+	mov	w2, 1
+	adrp	x0, .LC44
+	add	x0, x0, :lo12:.LC44
+	bl	rknand_print_hex
+	adrp	x0, .LC43
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC43
 	bl	printf
-	mov	w0, w20
-.L1204:
-	bl	nandc_set_ddr_para
-	cbz	w22, .L1187
-	mov	w28, w22
-	mov	w2, w23
-	mov	w1, w25
-	adrp	x0, .LC50
-	add	x0, x0, :lo12:.LC50
+.L1192:
+	b	.L1192
+.L1170:
+	ldr	w1, [x29, 140]
+	cmp	w1, 6
+	bne	.L1174
+	mov	x1, 0
+.L1176:
+	ldrb	w2, [x0, x1]
+	cmp	w2, 12
+	beq	.L1174
+	add	x2, x0, x1
+	ldrb	w2, [x2, 8]
+	cmp	w2, 4
+	beq	.L1174
+	add	x1, x1, 1
+	cmp	x1, 8
+	bne	.L1176
+	adrp	x0, .LC43
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC43
 	bl	printf
-.L1187:
-	mov	w0, w28
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 144
-	ret
-.L1188:
-	cmp	w19, w7
-	bls	.L1198
-	sub	w20, w6, w19
-	cmp	w19, 7
-	bhi	.L1191
-	mov	w7, w19
-.L1198:
-	mov	w19, 0
-	b	.L1189
-.L1197:
-	mov	w6, w21
-	mov	w28, w4
-	mov	w22, 0
-.L1189:
-	add	w21, w21, 2
-	cmp	w21, 50
-	bne	.L1192
-	mov	w0, w20
-	mov	w20, w6
-	b	.L1190
+.L1178:
+	b	.L1178
+.L1180:
+	ldr	w1, [x27, 2048]
+	strb	w1, [x2, x0]
+	add	x0, x0, 1
+	b	.L1179
+.L1191:
+	ldr	w0, [x29, 140]
+	cmp	w0, 6
+	beq	.L1203
+	cmp	w0, 7
+	mov	x1, 10
+	mov	x0, 8
+	csel	x0, x0, x1, ne
 .L1193:
-	mov	w0, w8
-	b	.L1204
-	.size	flash_ddr_tunning_read, .-flash_ddr_tunning_read
-	.section	.text.flash_read_page_en,"ax",@progbits
+	ldr	x10, [x29, 104]
+	mov	w3, 0
+.L1194:
+	mov	x1, 0
+.L1195:
+	ldrb	w16, [x2, x1]
+	ldr	w4, [x29, 136]
+	strb	w16, [x10, x1]
+	add	x1, x1, 1
+	cmp	w4, w1, uxtb
+	bhi	.L1195
+	ldr	x1, [x29, 96]
+	add	w3, w3, 1
+	add	x10, x10, x0
+	add	x2, x2, x1
+	ldr	w1, [x29, 132]
+	cmp	w1, w3
+	bgt	.L1194
+	mov	w23, 255
+	str	w23, [x27, 2056]
+	bl	nandc_wait_flash_ready
+	cmp	w20, 1
+	bhi	.L1197
+	mov	w0, 54
+	str	w0, [x27, 2056]
+	ldrb	w0, [x28, 128]
+	str	w0, [x27, 2052]
+	str	wzr, [x27, 2048]
+	mov	w0, 22
+	str	w0, [x27, 2056]
+	mov	w0, 48
+	str	wzr, [x27, 2056]
+	str	wzr, [x27, 2052]
+	str	wzr, [x27, 2052]
+	str	w23, [x27, 2052]
+	str	w23, [x27, 2052]
+	str	w23, [x27, 2052]
+.L1239:
+	str	w0, [x27, 2056]
+	bl	nandc_wait_flash_ready
+	ldr	w0, [x29, 128]
+	add	w11, w0, 1
+	and	w0, w11, 255
+	str	w0, [x29, 128]
+	b	.L1162
+.L1203:
+	mov	x0, 4
+	b	.L1193
+.L1197:
+	mov	w0, 56
+	b	.L1239
+	.size	hynix_get_read_retry_default, .-hynix_get_read_retry_default
+	.section	.text.flash_get_read_retry_tbl,"ax",@progbits
 	.align	2
-	.global	flash_read_page_en
-	.type	flash_read_page_en, %function
-flash_read_page_en:
-	stp	x29, x30, [sp, -96]!
-	and	w0, w0, 255
+	.global	flash_get_read_retry_tbl
+	.type	flash_get_read_retry_tbl, %function
+flash_get_read_retry_tbl:
+	adrp	x0, .LANCHOR26+19
+	ldrb	w0, [x0, #:lo12:.LANCHOR26+19]
+	sub	w1, w0, #1
+	and	w1, w1, 255
+	cmp	w1, 6
+	bhi	.L1240
+	b	hynix_get_read_retry_default
+.L1240:
+	ret
+	.size	flash_get_read_retry_tbl, .-flash_get_read_retry_tbl
+	.section	.text.nandc_xfer_done,"ax",@progbits
+	.align	2
+	.global	nandc_xfer_done
+	.type	nandc_xfer_done, %function
+nandc_xfer_done:
+	stp	x29, x30, [sp, -80]!
+	adrp	x0, .LANCHOR14
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	mov	w19, w1
-	adrp	x1, .LANCHOR8
+	adrp	x19, .LANCHOR13
+	ldrb	w0, [x0, #:lo12:.LANCHOR14]
 	stp	x21, x22, [sp, 32]
-	stp	x23, x24, [sp, 48]
-	ldrb	w1, [x1, #:lo12:.LANCHOR8]
-	stp	x25, x26, [sp, 64]
-	str	x27, [sp, 80]
-	cmp	w1, w0
-	bhi	.L1206
-	adrp	x1, .LANCHOR114
-	adrp	x0, .LC0
-	mov	w2, 386
-	add	x1, x1, :lo12:.LANCHOR114
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1207:
-	b	.L1207
-.L1206:
-	adrp	x1, .LANCHOR10
-	add	x1, x1, :lo12:.LANCHOR10
-	mov	x22, x2
-	mov	x23, x3
-	mov	w24, w4
-	ldrb	w20, [x1, w0, sxtw]
-	adrp	x0, .LANCHOR22
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	tbz	x0, 4, .L1208
-	adrp	x0, .LC51
-	mov	w2, w19
-	mov	w1, w20
-	add	x0, x0, :lo12:.LC51
+	str	x23, [sp, 48]
+	cmp	w0, 9
+	ldr	x20, [x19, #:lo12:.LANCHOR13]
+	bne	.L1243
+	ldr	w0, [x20, 16]
+	mov	w21, 0
+	str	w0, [x29, 64]
+	ldr	w0, [x20, 48]
+	tbnz	x0, 1, .L1244
+	adrp	x22, .LC47
+	adrp	x23, .LC46
+	add	x22, x22, :lo12:.LC47
+	add	x23, x23, :lo12:.LC46
+.L1245:
+	ldr	w0, [x29, 64]
+	tbnz	x0, 20, .L1248
+	ldr	x0, [x19, #:lo12:.LANCHOR13]
+	add	w21, w21, 1
+	tst	x21, 16777215
+	ldr	w0, [x0, 16]
+	str	w0, [x29, 64]
+	bne	.L1245
+	ldr	w2, [x29, 64]
+	mov	w1, w21
+	ldr	w3, [x20, 64]
+	mov	x0, x22
+	ubfx	x3, x3, 16, 6
 	bl	printf
-.L1208:
-	tst	x19, 50331648
-	bne	.L1209
-	adrp	x0, .LANCHOR11
-	adrp	x1, .LANCHOR12
-	ldrb	w0, [x0, #:lo12:.LANCHOR11]
-	cbz	w0, .L1210
-	ldrb	w0, [x1, #:lo12:.LANCHOR12]
-	cbz	w0, .L1209
-.L1210:
-	adrp	x0, .LANCHOR13
-	ldrb	w1, [x1, #:lo12:.LANCHOR12]
-	ldrh	w2, [x0, #:lo12:.LANCHOR13]
-	udiv	w0, w19, w2
-	mul	w0, w0, w2
-	sub	w19, w19, w0
-	cbz	w1, .L1211
-	add	w19, w0, w19, lsl 1
-.L1209:
-	mov	w4, w24
-	mov	x3, x23
-	mov	x2, x22
-	mov	w1, w19
-	mov	w0, w20
-	bl	flash_read_page
-	mov	w21, w0
-	cmn	w0, #1
-	bne	.L1205
-	adrp	x25, .LANCHOR29
-	mov	x26, x25
-	ldrb	w27, [x25, #:lo12:.LANCHOR29]
-	cbnz	w27, .L1213
-.L1216:
-	adrp	x0, .LANCHOR115
-	ldr	x6, [x0, #:lo12:.LANCHOR115]
-	cbnz	x6, .L1214
-.L1215:
-	ldrb	w4, [x26, #:lo12:.LANCHOR29]
-	mov	w3, -1
-	mov	w2, w19
-	mov	w1, 0
-	adrp	x0, .LC52
-	add	x0, x0, :lo12:.LC52
-	bl	printf
-	adrp	x0, .LANCHOR35
-	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbz	w0, .L1205
-	mov	w4, w24
-	mov	x3, x23
-	mov	x2, x22
-	mov	w1, w19
-	mov	w0, w20
-	ldr	x27, [sp, 80]
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 96
-	b	flash_ddr_tunning_read
-.L1211:
-	adrp	x1, .LANCHOR14
-	add	x1, x1, :lo12:.LANCHOR14
-	ldrh	w19, [x1, w19, uxtw 1]
-	add	w19, w19, w0
-	b	.L1209
-.L1213:
-	strb	wzr, [x25, #:lo12:.LANCHOR29]
-	mov	w4, w24
-	mov	x3, x23
-	mov	x2, x22
-	mov	w1, w19
-	mov	w0, w20
-	bl	flash_read_page
-	strb	w27, [x25, #:lo12:.LANCHOR29]
-	cmn	w0, #1
-	beq	.L1216
-.L1234:
-	mov	w21, w0
-.L1205:
-	mov	w0, w21
-	ldr	x27, [sp, 80]
+	ldr	x1, [x19, #:lo12:.LANCHOR13]
+	mov	w3, 256
+	mov	w2, 4
+	mov	x0, x23
+	bl	rknand_print_hex
+	b	.L1245
+.L1244:
+	adrp	x22, .LC45
+	adrp	x23, .LC46
+	add	x22, x22, :lo12:.LC45
+	add	x23, x23, :lo12:.LC46
+.L1246:
+	ldr	w1, [x20, 64]
+	ldr	w0, [x29, 64]
+	ubfx	x1, x1, 16, 6
+	ubfx	x0, x0, 22, 6
+	cmp	w1, w0
+	blt	.L1250
+.L1248:
+	adrp	x0, .LANCHOR37+32
+	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
+	str	wzr, [x0, #:lo12:.LANCHOR37+32]
 	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 96
+	ldp	x29, x30, [sp], 80
 	ret
-.L1214:
-	mov	w5, w24
-	mov	x4, x23
-	mov	x3, x22
-	mov	w2, w19
-	mov	w1, 0
-	mov	w0, w20
-	blr	x6
-	cmn	w0, #1
-	bne	.L1234
-	b	.L1215
-	.size	flash_read_page_en, .-flash_read_page_en
-	.section	.text.flash_get_last_written_page,"ax",@progbits
+.L1250:
+	ldr	x0, [x19, #:lo12:.LANCHOR13]
+	ldr	w0, [x0]
+	str	w0, [x29, 72]
+	ldr	w0, [x29, 72]
+	tbz	x0, 13, .L1247
+	ldr	w0, [x29, 72]
+	tbnz	x0, 17, .L1248
+.L1247:
+	add	w21, w21, 1
+	tst	x21, 16777215
+	bne	.L1246
+	ldr	w2, [x20, 64]
+	mov	w1, w21
+	ldr	w3, [x29, 64]
+	mov	x0, x22
+	ubfx	x2, x2, 16, 5
+	ubfx	x3, x3, 22, 6
+	bl	printf
+	ldr	x1, [x19, #:lo12:.LANCHOR13]
+	mov	w3, 256
+	mov	w2, 4
+	mov	x0, x23
+	bl	rknand_print_hex
+	b	.L1246
+.L1243:
+	ldr	w0, [x20, 8]
+	mov	w21, 0
+	str	w0, [x29, 64]
+	ldr	w0, [x20, 16]
+	tbnz	x0, 1, .L1254
+	adrp	x22, .LC47
+	adrp	x23, .LC46
+	add	x22, x22, :lo12:.LC47
+	add	x23, x23, :lo12:.LC46
+.L1255:
+	ldr	w0, [x29, 64]
+	tbnz	x0, 20, .L1248
+	ldr	x0, [x19, #:lo12:.LANCHOR13]
+	add	w21, w21, 1
+	tst	x21, 16777215
+	ldr	w0, [x0, 8]
+	str	w0, [x29, 64]
+	bne	.L1255
+	ldr	w2, [x29, 64]
+	mov	w1, w21
+	ldr	w3, [x20, 28]
+	mov	x0, x22
+	ubfx	x3, x3, 16, 5
+	bl	printf
+	ldr	x1, [x19, #:lo12:.LANCHOR13]
+	mov	w3, 256
+	mov	w2, 4
+	mov	x0, x23
+	bl	rknand_print_hex
+	b	.L1255
+.L1254:
+	adrp	x22, .LC45
+	adrp	x23, .LC46
+	add	x22, x22, :lo12:.LC45
+	add	x23, x23, :lo12:.LC46
+.L1256:
+	ldr	w1, [x20, 28]
+	ldr	w0, [x29, 64]
+	ubfx	x1, x1, 16, 5
+	ubfx	x0, x0, 22, 6
+	cmp	w1, w0
+	bge	.L1248
+	ldr	x0, [x19, #:lo12:.LANCHOR13]
+	ldr	w0, [x0]
+	str	w0, [x29, 72]
+	ldr	w0, [x29, 72]
+	tbz	x0, 13, .L1257
+	ldr	w0, [x29, 72]
+	tbz	x0, 17, .L1257
+	ldr	w1, [x29, 72]
+	adrp	x0, .LC48
+	add	x0, x0, :lo12:.LC48
+	bl	printf
+	b	.L1248
+.L1257:
+	add	w21, w21, 1
+	tst	x21, 16777215
+	bne	.L1256
+	ldr	w2, [x20, 28]
+	mov	w1, w21
+	ldr	w3, [x29, 64]
+	mov	x0, x22
+	ubfx	x2, x2, 16, 5
+	ubfx	x3, x3, 22, 6
+	bl	printf
+	ldr	x1, [x19, #:lo12:.LANCHOR13]
+	mov	w3, 256
+	mov	w2, 4
+	mov	x0, x23
+	bl	rknand_print_hex
+	b	.L1256
+	.size	nandc_xfer_done, .-nandc_xfer_done
+	.section	.text.nandc_xfer,"ax",@progbits
 	.align	2
-	.global	flash_get_last_written_page
-	.type	flash_get_last_written_page, %function
-flash_get_last_written_page:
-	stp	x29, x30, [sp, -96]!
-	and	w1, w1, 65535
+	.global	nandc_xfer
+	.type	nandc_xfer, %function
+nandc_xfer:
+	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	and	w21, w0, 255
-	adrp	x0, .LANCHOR97
 	stp	x19, x20, [sp, 16]
-	stp	x25, x26, [sp, 64]
-	mov	x22, x2
-	ldrh	w19, [x0, #:lo12:.LANCHOR97]
-	adrp	x0, .LANCHOR19+26
-	stp	x23, x24, [sp, 48]
-	mov	x23, x3
-	ldrh	w25, [x0, #:lo12:.LANCHOR19+26]
-	sub	w19, w19, #1
-	sxth	w19, w19
-	mov	w24, w4
-	mov	w0, w21
-	str	x27, [sp, 80]
-	mul	w25, w25, w1
-	add	w1, w19, w25
-	bl	flash_read_page_en
-	cmp	w0, 512
-	bne	.L1236
-	mov	w26, 0
-	mov	w27, 2
-.L1237:
-	cmp	w26, w19
-	ble	.L1240
-.L1236:
-	mov	w0, w19
-	ldr	x27, [sp, 80]
+	and	w19, w2, 255
+	stp	x21, x22, [sp, 32]
+	and	w22, w1, 255
+	mov	x21, x3
+	mov	w1, w19
+	mov	x3, x4
+	mov	x2, x21
+	mov	w0, w22
+	mov	x20, x4
+	bl	nandc_xfer_start
+	bl	nandc_xfer_done
+	cbnz	w22, .L1295
+	adrp	x0, .LANCHOR14
+	ldrb	w0, [x0, #:lo12:.LANCHOR14]
+	cmp	w0, 9
+	bne	.L1279
+	adrp	x1, .LANCHOR13
+	lsr	w19, w19, 2
+	mov	x20, x1
+	mov	w3, 1
+	ldr	x5, [x1, #:lo12:.LANCHOR13]
+	mov	w2, 0
+	mov	w0, 0
+.L1280:
+	cmp	w2, w19
+	bcc	.L1284
+	ldr	w19, [x5]
+	cmp	w3, 0
+	mov	w1, 512
+	csel	w0, w0, w1, eq
+	mov	w1, 8192
+	movk	w1, 0x2, lsl 16
+	and	w1, w19, w1
+	cmp	w1, 139264
+	bne	.L1278
+	mov	w1, w19
+	adrp	x0, .LC49
+	add	x0, x0, :lo12:.LC49
+	bl	printf
+	ldr	x0, [x20, #:lo12:.LANCHOR13]
+	orr	w19, w19, 131072
+.L1308:
+	str	w19, [x0]
+	mov	w0, -1
+.L1278:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 96
+	ldp	x29, x30, [sp], 64
 	ret
-.L1240:
-	add	w20, w26, w19
-	mov	w4, w24
-	mov	x3, x23
-	mov	x2, x22
-	mov	w0, w21
-	sdiv	w20, w20, w27
-	add	w1, w25, w20, sxth
-	bl	flash_read_page_en
-	cmp	w0, 512
-	bne	.L1238
-	sub	w19, w20, #1
-	sxth	w19, w19
-	b	.L1237
-.L1238:
-	add	w20, w20, 1
-	sxth	w26, w20
-	b	.L1237
-	.size	flash_get_last_written_page, .-flash_get_last_written_page
-	.section	.text.flash_get_last_written_page_ext,"ax",@progbits
-	.align	2
-	.global	flash_get_last_written_page_ext
-	.type	flash_get_last_written_page_ext, %function
-flash_get_last_written_page_ext:
-	adrp	x4, .LANCHOR71
-	mov	w6, 21
-	and	w0, w0, 65535
-	mov	w5, 1
-	ldrh	w4, [x4, #:lo12:.LANCHOR71]
-	sub	w6, w6, w4
-	mov	w4, w3
-	mov	x3, x2
-	mov	x2, x1
-	lsl	w5, w5, w6
-	sub	w5, w5, #1
-	and	w1, w5, w0
-	asr	w0, w0, w6
-	b	flash_get_last_written_page
-	.size	flash_get_last_written_page_ext, .-flash_get_last_written_page_ext
-	.section	.text.flash_info_blk_init,"ax",@progbits
-	.align	2
-	.global	flash_info_blk_init
-	.type	flash_info_blk_init, %function
-flash_info_blk_init:
-	stp	x29, x30, [sp, -96]!
-	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR13
-	stp	x23, x24, [sp, 48]
-	mov	w24, 21321
-	stp	x25, x26, [sp, 64]
-	adrp	x26, .LANCHOR116
-	stp	x27, x28, [sp, 80]
-	mov	x21, x26
-	add	x27, x22, :lo12:.LANCHOR13
-	stp	x19, x20, [sp, 16]
-	movk	w24, 0x5359, lsl 16
-	mov	w19, 4
-.L1246:
-	ldrh	w1, [x27]
-	adrp	x20, .LANCHOR5
-	ldr	x3, [x26, #:lo12:.LANCHOR116]
-	mov	w4, 4
-	ldr	x2, [x20, #:lo12:.LANCHOR5]
-	mov	w0, 0
-	add	x28, x26, :lo12:.LANCHOR116
-	add	x25, x20, :lo12:.LANCHOR5
-	mul	w1, w1, w19
-	mov	x23, x20
-	bl	flash_read_page_en
-	cmn	w0, #1
-	beq	.L1244
-	ldr	x2, [x20, #:lo12:.LANCHOR5]
-	ldr	w0, [x2]
-	cmp	w0, w24
-	beq	.L1245
-.L1244:
-	add	w19, w19, 1
-	cmp	w19, 16
-	bne	.L1246
-.L1267:
+.L1284:
+	uxtw	x1, w2
+	add	x1, x1, 84
+	ldr	w1, [x5, x1, lsl 2]
+	str	w1, [x29, 56]
+	ldr	w1, [x29, 56]
+	ldr	w4, [x29, 56]
+	ubfx	x4, x4, 26, 1
+	and	w1, w4, w1, lsr 10
+	and	w3, w3, w1
+	ldr	w1, [x29, 56]
+	tbnz	x1, 2, .L1297
+	ldr	w1, [x29, 56]
+	tbnz	x1, 18, .L1297
+	ldr	w4, [x29, 56]
+	ldr	w1, [x29, 56]
+	ubfx	x4, x4, 3, 7
+	ubfx	x1, x1, 19, 7
+	cmp	w4, w1
+	ldr	w1, [x29, 56]
+	ble	.L1282
+	ubfx	x1, x1, 3, 7
+.L1283:
+	cmp	w0, w1
+	csel	w0, w0, w1, cs
+.L1281:
+	add	w2, w2, 1
+	b	.L1280
+.L1282:
+	ubfx	x1, x1, 19, 7
+	b	.L1283
+.L1297:
 	mov	w0, -1
-.L1243:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 96
-	ret
-.L1254:
-	ldr	x0, [x25]
-	ldr	w1, [x0]
-	cmp	w1, w24
-	bne	.L1255
-	ldr	w19, [x0, 4]
-.L1248:
-	add	x24, x20, :lo12:.LANCHOR117
-	ldrh	w0, [x22, #:lo12:.LANCHOR13]
-	ldr	x3, [x21, #:lo12:.LANCHOR116]
-	mov	w4, 4
-	ldr	x2, [x23, #:lo12:.LANCHOR5]
-	ldrb	w1, [x24, 1]
-	mul	w1, w1, w0
-	mov	w0, 0
-	bl	flash_read_page_en
-	cmn	w0, #1
-	beq	.L1249
-	ldr	x0, [x23, #:lo12:.LANCHOR5]
-	mov	w1, 21321
-	movk	w1, 0x5359, lsl 16
-	ldr	w2, [x0]
-	cmp	w2, w1
-	bne	.L1249
-	ldr	w1, [x0, 4]
-	cmp	w19, w1
-	bcs	.L1249
-	ldrb	w1, [x0, 37]
-	ldrb	w0, [x0, 36]
-	strb	w1, [x20, #:lo12:.LANCHOR117]
-	strb	w0, [x24, 1]
-.L1249:
-	ldrb	w1, [x20, #:lo12:.LANCHOR117]
-	add	x24, x20, :lo12:.LANCHOR117
-	ldr	x3, [x21, #:lo12:.LANCHOR116]
-	mov	w4, 4
-	ldr	x2, [x23, #:lo12:.LANCHOR5]
+	b	.L1281
+.L1279:
+	adrp	x0, .LANCHOR34
+	lsr	w4, w19, 1
+	mov	w3, 64
+	mov	w1, 1
+	ldrb	w0, [x0, #:lo12:.LANCHOR34]
+	mov	w2, 0
+	adrp	x6, .LANCHOR37
+	cmp	w0, 25
+	mov	w0, 128
+	csel	w3, w3, w0, cc
 	mov	w0, 0
-	bl	flash_get_last_written_page
-	sxth	w19, w0
-	add	w0, w0, 1
-	ldrb	w20, [x20, #:lo12:.LANCHOR117]
-	strh	w0, [x24, 2]
-	ldrh	w0, [x22, #:lo12:.LANCHOR13]
-	mov	w22, 21321
-	movk	w22, 0x5359, lsl 16
-	madd	w20, w20, w0, w19
-.L1250:
-	tbz	w19, #31, .L1252
-	cmn	w19, #1
-	bne	.L1253
-	ldr	x0, [x23, #:lo12:.LANCHOR5]
-	ldr	w1, [x0]
-	adrp	x0, .LC53
-	add	x0, x0, :lo12:.LC53
-	bl	printf
-	b	.L1267
-.L1252:
-	ldr	x3, [x21, #:lo12:.LANCHOR116]
-	mov	w4, 4
-	ldr	x2, [x23, #:lo12:.LANCHOR5]
-	mov	w1, w20
+.L1287:
+	add	w5, w3, w0
+	cmp	w2, w4
+	bcc	.L1288
+	adrp	x22, .LANCHOR13
+	lsr	w19, w19, 2
+	mov	w3, 0
 	mov	w0, 0
-	bl	flash_read_page_en
+	ldr	x4, [x22, #:lo12:.LANCHOR13]
+.L1289:
+	cmp	w3, w19
+	bcc	.L1293
+	str	wzr, [x4, 16]
 	cmn	w0, #1
-	beq	.L1251
-	ldr	x0, [x23, #:lo12:.LANCHOR5]
-	ldr	w0, [x0]
-	cmp	w0, w22
-	bne	.L1251
-.L1253:
-	mov	w0, 0
-	b	.L1243
-.L1251:
-	sub	w19, w19, #1
-	sub	w20, w20, #1
-	sxth	w19, w19
-	b	.L1250
-.L1245:
-	adrp	x20, .LANCHOR117
-	add	x1, x20, :lo12:.LANCHOR117
-	ldrb	w3, [x2, 37]
-	mov	w4, 4
-	ldrb	w0, [x2, 36]
-	strb	w3, [x1, 1]
-	ldrh	w1, [x27]
-	ldr	x3, [x28]
-	strb	w0, [x20, #:lo12:.LANCHOR117]
-	mul	w1, w1, w0
+	beq	.L1294
+	ldr	w1, [x20]
+	cmn	w1, #1
+	bne	.L1294
+	ldr	w1, [x20, 4]
+	cmn	w1, #1
+	bne	.L1294
+	ldr	w1, [x21]
+	cmn	w1, #1
+	mov	w1, 512
+	csel	w0, w0, w1, ne
+.L1294:
+	ldr	w19, [x4]
+	mov	w1, 8192
+	movk	w1, 0x2, lsl 16
+	and	w1, w19, w1
+	cmp	w1, 139264
+	bne	.L1278
+	mov	w1, w19
+	adrp	x0, .LC50
+	add	x0, x0, :lo12:.LC50
+	bl	printf
+	orr	w19, w19, 131072
+	ldr	x0, [x22, #:lo12:.LANCHOR13]
+	b	.L1308
+.L1288:
+	ldr	x7, [x6, #:lo12:.LANCHOR37]
+	and	x0, x0, 4294967292
+	ldr	w0, [x7, x0]
+	lsl	w7, w2, 2
+	add	w2, w2, 1
+	strb	w0, [x20, x7]
+	lsr	w7, w0, 8
+	strb	w7, [x20, w1, uxtw]
+	add	w7, w1, 1
+	lsr	w8, w0, 16
+	lsr	w0, w0, 24
+	strb	w8, [x20, x7]
+	add	w7, w1, 2
+	add	w1, w1, 4
+	strb	w0, [x20, x7]
+	mov	w0, w5
+	b	.L1287
+.L1293:
+	uxtw	x1, w3
+	add	x1, x1, 8
+	ldr	w1, [x4, x1, lsl 2]
+	str	w1, [x29, 56]
+	ldr	w1, [x29, 56]
+	tbnz	x1, 2, .L1300
+	ldr	w1, [x29, 56]
+	tbnz	x1, 15, .L1300
+	ldr	w2, [x29, 56]
+	ubfx	x6, x2, 3, 5
+	ldr	w2, [x29, 56]
+	ldr	w1, [x29, 56]
+	ubfx	x2, x2, 27, 1
+	ubfx	x5, x1, 16, 5
+	ldr	w1, [x29, 56]
+	orr	w2, w6, w2, lsl 5
+	ubfx	x1, x1, 29, 1
+	orr	w1, w5, w1, lsl 5
+	cmp	w2, w1
+	ldr	w1, [x29, 56]
+	bls	.L1291
+	ubfx	x2, x1, 3, 5
+	ldr	w1, [x29, 56]
+	ubfx	x1, x1, 27, 1
+.L1307:
+	orr	w1, w2, w1, lsl 5
+	cmp	w0, w1
+	csel	w0, w0, w1, cs
+.L1290:
+	add	w3, w3, 1
+	b	.L1289
+.L1291:
+	ubfx	x2, x1, 16, 5
+	ldr	w1, [x29, 56]
+	ubfx	x1, x1, 29, 1
+	b	.L1307
+.L1300:
+	mov	w0, -1
+	b	.L1290
+.L1295:
 	mov	w0, 0
-	bl	flash_read_page_en
-	cmn	w0, #1
-	bne	.L1254
-.L1255:
-	mov	w19, 0
-	b	.L1248
-	.size	flash_info_blk_init, .-flash_info_blk_init
-	.section	.text.flash_ddr_para_scan,"ax",@progbits
+	b	.L1278
+	.size	nandc_xfer, .-nandc_xfer
+	.section	.text.flash_read_page,"ax",@progbits
 	.align	2
-	.global	flash_ddr_para_scan
-	.type	flash_ddr_para_scan, %function
-flash_ddr_para_scan:
+	.global	flash_read_page
+	.type	flash_read_page, %function
+flash_read_page:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR25
 	stp	x21, x22, [sp, 32]
-	and	w22, w0, 255
-	ldrb	w0, [x20, #:lo12:.LANCHOR25]
-	adrp	x19, .LANCHOR35
+	and	w21, w0, 255
+	adrp	x0, .LANCHOR13
+	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
-	mov	w21, 1
-	mov	w23, w1
-	str	x25, [sp, 64]
-	strb	w21, [x19, #:lo12:.LANCHOR35]
-	adrp	x24, .LANCHOR119
-	bl	flash_set_interface_mode
-	adrp	x25, .LANCHOR118
-	ldrb	w0, [x20, #:lo12:.LANCHOR25]
-	bl	nandc_set_if_mode
-	ldr	x3, [x25, #:lo12:.LANCHOR118]
-	mov	w4, 4
-	ldr	x2, [x24, #:lo12:.LANCHOR119]
-	mov	w1, w23
-	mov	w0, w22
-	bl	flash_ddr_tunning_read
-	ldr	x3, [x25, #:lo12:.LANCHOR118]
-	mov	w4, 4
-	ldr	x2, [x24, #:lo12:.LANCHOR119]
-	mov	w1, w23
-	mov	w0, w22
-	bl	flash_read_page
-	cmn	w0, #1
-	mov	x0, x19
-	bne	.L1269
-	ldrb	w1, [x20, #:lo12:.LANCHOR25]
-	tbz	x1, 0, .L1269
-	mov	w0, 1
-	bl	flash_set_interface_mode
-	mov	w0, w21
-	bl	nandc_set_if_mode
-	strb	wzr, [x19, #:lo12:.LANCHOR35]
-.L1270:
-	mov	w0, 0
-	ldr	x25, [sp, 64]
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 80
-	ret
-.L1269:
-	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR35]
-	b	.L1270
-	.size	flash_ddr_para_scan, .-flash_ddr_para_scan
-	.section	.text.flash_complete_page_read,"ax",@progbits
-	.align	2
-	.global	flash_complete_page_read
-	.type	flash_complete_page_read, %function
-flash_complete_page_read:
-	stp	x29, x30, [sp, -112]!
-	add	x29, sp, 0
+	mov	w22, w1
+	ldr	x19, [x0, #:lo12:.LANCHOR13]
+	adrp	x0, .LANCHOR29
 	stp	x25, x26, [sp, 64]
-	mov	w25, w0
-	adrp	x0, .LANCHOR8
-	stp	x23, x24, [sp, 48]
-	stp	x19, x20, [sp, 16]
-	mov	x23, x1
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	ubfx	x1, x25, 21, 3
-	stp	x21, x22, [sp, 32]
-	stp	x27, x28, [sp, 80]
-	cmp	w0, w1
-	bhi	.L1276
-	adrp	x1, .LANCHOR120
-	adrp	x0, .LC0
-	mov	w2, 791
-	add	x1, x1, :lo12:.LANCHOR120
-	add	x0, x0, :lo12:.LC0
+	mov	w24, w4
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	mov	x25, x2
+	mov	x26, x3
+	and	w20, w1, 2097151
+	ubfx	x23, x22, 24, 2
+	tbz	x0, 4, .L1310
+	mov	w3, w1
+	adrp	x0, .LC51
+	mov	w2, w23
+	mov	w1, w21
+	add	x0, x0, :lo12:.LC51
 	bl	printf
-.L1277:
-	b	.L1277
-.L1276:
-	adrp	x0, .LANCHOR10
-	add	x0, x0, :lo12:.LANCHOR10
-	ubfx	x22, x25, 24, 2
-	mov	x24, x2
-	and	w19, w25, 2097151
-	ldrb	w21, [x0, w1, sxtw]
-	adrp	x0, .LANCHOR6
-	ldr	x4, [x0, #:lo12:.LANCHOR6]
+.L1310:
+	bl	nandc_wait_flash_ready
 	mov	w0, w21
 	bl	nandc_cs
-	cbnz	w22, .L1278
-	adrp	x0, .LANCHOR11
-	adrp	x1, .LANCHOR12
-	ldrb	w0, [x0, #:lo12:.LANCHOR11]
-	cbz	w0, .L1279
-	ldrb	w0, [x1, #:lo12:.LANCHOR12]
-	cbz	w0, .L1278
-.L1279:
-	adrp	x0, .LANCHOR13
-	ldrb	w1, [x1, #:lo12:.LANCHOR12]
-	ldrh	w2, [x0, #:lo12:.LANCHOR13]
-	udiv	w0, w19, w2
-	mul	w0, w0, w2
-	sub	w19, w19, w0
-	cbz	w1, .L1280
-	add	w19, w0, w19, lsl 1
-.L1278:
-	ubfiz	x0, x21, 8, 8
-	mov	w1, 5
-	add	x0, x4, x0
-	adrp	x20, .LANCHOR19
-	add	x6, x20, :lo12:.LANCHOR19
-	mov	x4, x24
-	str	x6, [x29, 104]
-	mov	x3, x23
-	str	w1, [x0, 2056]
-	and	w1, w19, 255
-	str	wzr, [x0, 2052]
-	str	wzr, [x0, 2052]
-	str	w1, [x0, 2052]
-	lsr	w1, w19, 8
-	ldrb	w2, [x6, 9]
-	str	w1, [x0, 2052]
-	lsr	w1, w19, 16
-	str	w1, [x0, 2052]
-	mov	w1, 224
-	str	w1, [x0, 2056]
+	adrp	x6, .LANCHOR41
+	cbnz	w23, .L1311
+	mov	w0, w21
+	bl	zftl_flash_enter_slc_mode
+.L1312:
+	ubfiz	x4, x21, 8, 8
+	lsr	w0, w20, 8
+	add	x4, x19, x4
+	and	w22, w22, 255
+	str	wzr, [x4, 2056]
+	str	wzr, [x4, 2052]
+	str	wzr, [x4, 2052]
+	str	w22, [x4, 2052]
+	str	w0, [x4, 2052]
+	lsr	w0, w20, 16
+	str	w0, [x4, 2052]
+	mov	w0, 48
+	str	w0, [x4, 2056]
+	ldr	x0, [x6, #:lo12:.LANCHOR41]
+	ldrb	w0, [x0, 12]
+	cmp	w0, 3
+	bne	.L1314
+	cbz	w23, .L1314
+	add	w20, w20, w20, lsl 1
+	sub	w0, w20, #1
+	add	w0, w0, w23
+.L1323:
+	bl	nandc_set_seed
+	bl	nandc_wait_flash_ready
+	mov	w0, 5
+	str	w0, [x4, 2056]
+	str	wzr, [x4, 2052]
+	mov	w0, 224
+	str	wzr, [x4, 2052]
+	mov	w2, w24
+	str	w0, [x4, 2056]
+	mov	x3, x25
+	mov	x4, x26
 	mov	w1, 0
 	mov	w0, w21
 	bl	nandc_xfer
-	mov	w26, w0
-	cmn	w0, #1
-	ldr	x6, [x29, 104]
-	bne	.L1275
-	adrp	x27, .LANCHOR29
-	mov	x28, x27
-	ldrb	w5, [x27, #:lo12:.LANCHOR29]
-	cbnz	w5, .L1282
-.L1285:
-	adrp	x0, .LANCHOR115
-	ldr	x6, [x0, #:lo12:.LANCHOR115]
-	cbnz	x6, .L1283
-.L1284:
-	ldrb	w4, [x28, #:lo12:.LANCHOR29]
-	mov	w3, -1
-	mov	w2, w25
-	mov	w1, 0
-	adrp	x0, .LC54
-	add	x0, x0, :lo12:.LC54
-	bl	printf
-	adrp	x0, .LANCHOR35
-	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbz	w0, .L1275
-	add	x20, x20, :lo12:.LANCHOR19
-	orr	w1, w19, w22, lsl 24
-	ldp	x25, x26, [sp, 64]
-	mov	x3, x24
-	ldrb	w4, [x20, 9]
-	mov	x2, x23
+	mov	w2, w0
+	mov	w0, 0
+	bl	nandc_de_cs
+	mov	w0, w2
 	ldp	x19, x20, [sp, 16]
-	mov	w0, w21
-	ldp	x23, x24, [sp, 48]
 	ldp	x21, x22, [sp, 32]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 112
-	b	flash_ddr_tunning_read
-.L1280:
-	adrp	x1, .LANCHOR14
-	add	x1, x1, :lo12:.LANCHOR14
-	ldrh	w19, [x1, w19, uxtw 1]
-	add	w19, w19, w0
-	b	.L1278
-.L1282:
-	ldrb	w4, [x6, 9]
-	mov	x3, x24
-	str	w5, [x29, 104]
-	mov	x2, x23
-	strb	wzr, [x27, #:lo12:.LANCHOR29]
-	orr	w1, w19, w22, lsl 24
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L1311:
+	ldr	x0, [x6, #:lo12:.LANCHOR41]
+	ldrb	w0, [x0, 12]
+	cmp	w0, 3
+	bne	.L1313
+	sxtw	x0, w21
+	add	x0, x0, 8
+	add	x0, x19, x0, lsl 8
+	str	w23, [x0, 8]
+	b	.L1312
+.L1313:
 	mov	w0, w21
-	bl	flash_read_page
-	cmn	w0, #1
-	ldr	w5, [x29, 104]
-	strb	w5, [x27, #:lo12:.LANCHOR29]
-	beq	.L1285
-.L1300:
-	mov	w26, w0
-.L1275:
-	mov	w0, w26
+	bl	zftl_flash_exit_slc_mode
+	b	.L1312
+.L1314:
+	mov	w0, w20
+	b	.L1323
+	.size	flash_read_page, .-flash_read_page
+	.section	.text.micron_read_retrial,"ax",@progbits
+	.align	2
+	.global	micron_read_retrial
+	.type	micron_read_retrial, %function
+micron_read_retrial:
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x25, x26, [sp, 64]
+	and	w25, w0, 255
+	adrp	x0, .LANCHOR34
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	mov	x26, x3
+	stp	x23, x24, [sp, 48]
+	mov	w24, w2
+	stp	x27, x28, [sp, 80]
+	mov	w28, w5
+	ldrb	w21, [x0, #:lo12:.LANCHOR34]
+	mov	x27, x4
+	bl	nandc_wait_flash_ready
+	and	x20, x25, 255
+	adrp	x0, .LANCHOR13
+	adrp	x5, .LANCHOR137
+	add	w21, w21, w21, lsl 1
+	add	x5, x5, :lo12:.LANCHOR137
+	ldr	x6, [x0, #:lo12:.LANCHOR13]
+	asr	w21, w21, 2
+	mov	w23, 0
+	mov	w19, -1
+	mov	w8, 239
+	mov	w10, 137
+	add	x22, x6, x20, lsl 8
+.L1325:
+	ldrb	w0, [x5]
+	cmp	w23, w0
+	bcc	.L1329
+.L1328:
+	add	x6, x6, x20, lsl 8
+	mov	w0, 239
+	str	w0, [x6, 2056]
+	mov	w0, 137
+	str	w0, [x6, 2052]
+	mov	w0, 200
+	bl	timer_delay_ns
+	str	wzr, [x6, 2048]
+	str	wzr, [x6, 2048]
+	cmp	w19, w21
+	str	wzr, [x6, 2048]
+	str	wzr, [x6, 2048]
+	bcc	.L1330
+	cmn	w19, #1
+	mov	w0, 256
+	csel	w19, w19, w0, eq
+.L1330:
+	cmp	w19, 256
+	ccmn	w19, #1, 4, ne
+	bne	.L1324
+	adrp	x0, .LC52
+	mov	w4, w19
+	mov	w3, w23
+	mov	w2, w24
+	mov	w1, w23
+	add	x0, x0, :lo12:.LC52
+	bl	printf
+.L1324:
+	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 112
+	ldp	x29, x30, [sp], 128
 	ret
-.L1283:
-	add	x0, x20, :lo12:.LANCHOR19
-	mov	x4, x24
-	mov	x3, x23
-	mov	w2, w19
-	mov	w1, w22
-	ldrb	w5, [x0, 9]
-	mov	w0, w21
-	blr	x6
+.L1329:
+	str	w8, [x22, 2056]
+	mov	w0, 200
+	str	w10, [x22, 2052]
+	stp	x5, x6, [x29, 96]
+	stp	w8, w10, [x29, 116]
+	bl	timer_delay_ns
+	add	w7, w23, 1
+	str	w7, [x22, 2048]
+	str	wzr, [x22, 2048]
+	mov	w4, w28
+	str	wzr, [x22, 2048]
+	mov	x3, x27
+	str	wzr, [x22, 2048]
+	mov	x2, x26
+	str	w7, [x29, 124]
+	mov	w1, w24
+	mov	w0, w25
+	bl	flash_read_page
+	ldp	w8, w10, [x29, 116]
 	cmn	w0, #1
-	beq	.L1284
-	b	.L1300
-	.size	flash_complete_page_read, .-flash_complete_page_read
-	.section	.text.queue_wait_first_req_completed,"ax",@progbits
+	ldr	w7, [x29, 124]
+	ldp	x5, x6, [x29, 96]
+	beq	.L1326
+	adrp	x1, .LANCHOR135
+	cmn	w19, #1
+	csel	w19, w19, w0, ne
+	cmp	w0, w21
+	ldr	x26, [x1, #:lo12:.LANCHOR135]
+	adrp	x1, .LANCHOR136
+	ldr	x27, [x1, #:lo12:.LANCHOR136]
+	bcc	.L1332
+.L1326:
+	mov	w23, w7
+	b	.L1325
+.L1332:
+	mov	w19, w0
+	b	.L1328
+	.size	micron_read_retrial, .-micron_read_retrial
+	.section	.text.toshiba_3d_read_retrial,"ax",@progbits
 	.align	2
-	.type	queue_wait_first_req_completed, %function
-queue_wait_first_req_completed:
-	stp	x29, x30, [sp, -64]!
-	adrp	x0, .LANCHOR90
+	.global	toshiba_3d_read_retrial
+	.type	toshiba_3d_read_retrial, %function
+toshiba_3d_read_retrial:
+	stp	x29, x30, [sp, -128]!
+	and	w6, w1, 255
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	ldrb	w0, [x0, #:lo12:.LANCHOR90]
 	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR9
+	stp	x25, x26, [sp, 64]
+	and	w25, w0, 255
+	stp	x27, x28, [sp, 80]
+	mov	x27, x3
 	stp	x23, x24, [sp, 48]
-	cmp	w0, 255
-	bne	.L1302
-.L1320:
-	mov	w21, 0
-	b	.L1301
-.L1302:
-	adrp	x19, .LANCHOR36
-	sxtw	x22, w0
-	add	x1, x19, :lo12:.LANCHOR36
-	add	x1, x1, x22, lsl 6
-	ldrb	w2, [x1, 58]
-	ldr	w21, [x1, 40]
-	sub	w3, w2, #1
-	cmp	w3, 9
-	bhi	.L1320
-	adrp	x1, .L1305
-	add	x1, x1, :lo12:.L1305
-	ldrb	w1, [x1,w3,uxtw]
-	adr	x3, .Lrtx1305
-	add	x1, x3, w1, sxtb #2
-	br	x1
-.Lrtx1305:
-	.section	.rodata.queue_wait_first_req_completed,"a",@progbits
-	.align	0
-	.align	2
-.L1305:
-	.byte	(.L1304 - .Lrtx1305) / 4
-	.byte	(.L1304 - .Lrtx1305) / 4
-	.byte	(.L1306 - .Lrtx1305) / 4
-	.byte	(.L1306 - .Lrtx1305) / 4
-	.byte	(.L1306 - .Lrtx1305) / 4
-	.byte	(.L1307 - .Lrtx1305) / 4
-	.byte	(.L1308 - .Lrtx1305) / 4
-	.byte	(.L1309 - .Lrtx1305) / 4
-	.byte	(.L1306 - .Lrtx1305) / 4
-	.byte	(.L1309 - .Lrtx1305) / 4
-	.section	.text.queue_wait_first_req_completed
-.L1304:
-	mov	w1, 64
-	mov	w0, w21
-	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1320
-	add	x19, x19, :lo12:.LANCHOR36
-	add	x19, x19, x22, lsl 6
-	ldp	x1, x0, [x19, 8]
-	ldr	x2, [x19, 24]
-	cmp	x0, 0
-	csel	x1, x0, x1, ne
-	mov	w0, w21
-	bl	flash_complete_page_read
-	str	w0, [x19, 52]
-	mov	w0, 12
-	strb	w0, [x19, 58]
-	ldrb	w0, [x19, 2]
-	orr	w0, w0, 8
-	strb	w0, [x19, 2]
-	b	.L1320
-.L1306:
-	mov	w0, w21
-	mov	w1, 64
-	bl	flash_wait_device_ready
-	mov	w21, w0
-	tbz	x21, 6, .L1320
-	add	x19, x19, :lo12:.LANCHOR36
-	mov	w0, 5
-	add	x19, x19, x22, lsl 6
-	tst	w21, w0
-	beq	.L1319
-	ldrb	w1, [x19, 1]
-	mov	w0, 11
-	ldr	w3, [x19, 40]
-	mov	w4, 11
-	ldr	w2, [x19, 52]
-	strb	w0, [x19, 58]
-	adrp	x0, .LC55
-	add	x0, x0, :lo12:.LC55
-	bl	printf
-.L1338:
-	mov	w0, -1
-	str	w0, [x19, 52]
-	b	.L1301
-.L1309:
-	cmp	w2, 10
-	add	x20, x19, :lo12:.LANCHOR36
-	ubfiz	x0, x0, 6, 8
-	mov	w1, 3
-	mov	w2, 9
-	add	x0, x20, x0
-	csel	w2, w2, w1, eq
-	ubfx	x3, x21, 21, 3
-.L1314:
-	ldrb	w1, [x0]
-	cmp	w1, 255
-	bne	.L1318
-	mov	w21, -1
-	b	.L1301
-.L1318:
-	sxtw	x23, w1
-	ubfiz	x0, x1, 6, 8
-	add	x1, x20, x23, lsl 6
-	add	x0, x20, x0
-	ldrb	w4, [x1, 58]
-	cmp	w4, w2
-	bne	.L1314
-	ldr	w1, [x1, 40]
-	ubfx	x1, x1, 21, 3
-	cmp	w3, w1
-	bne	.L1314
-	mov	w0, w21
-	mov	w1, 64
-	bl	flash_wait_device_ready
-	mov	w24, w0
-	and	w21, w0, 64
-	tbz	x24, 6, .L1316
-	add	x20, x20, x22, lsl 6
-	ands	w21, w0, 15
-	beq	.L1317
-	ldrb	w1, [x20, 1]
-	mov	w4, 11
-	ldr	w3, [x20, 40]
+	mov	x28, x4
+	mov	w23, w2
+	stp	x19, x20, [sp, 16]
+	str	w5, [x29, 124]
+	bl	nandc_wait_flash_ready
+	adrp	x0, .LANCHOR13
+	mov	w1, 46
+	mov	w2, 56
+	ldr	x26, [x0, #:lo12:.LANCHOR13]
+	and	x0, x25, 255
+	add	x21, x0, 8
+	str	x0, [x29, 112]
+	ldrb	w0, [x22, #:lo12:.LANCHOR9]
+	add	x21, x26, x21, lsl 8
+	cmp	w0, 36
+	mov	w0, 26
+	csel	w1, w2, w1, ne
+	str	w1, [x29, 96]
+	mov	w1, 10
+	csel	w0, w1, w0, ne
+	str	w0, [x29, 104]
+	cbnz	w6, .L1344
+	sxtw	x24, w25
+	add	x0, x22, :lo12:.LANCHOR9
+	add	x24, x24, 8
+	mov	w19, -1
+	add	x24, x26, x24, lsl 8
+	mov	w20, 1
+	str	x0, [x29, 96]
+.L1351:
+	ldr	x0, [x29, 96]
+	ldrb	w0, [x0]
+	cmp	w0, 36
+	bne	.L1345
+	mov	x0, x21
+	mov	w2, 0
+	mov	w1, w20
+	bl	toshiba_tlc_set_rr_para
+	mov	w0, 93
+	str	w0, [x24, 8]
+.L1346:
+	ldr	w4, [x29, 124]
+	mov	x3, x28
+	mov	x2, x27
+	mov	w1, w23
+	mov	w0, w25
+	bl	flash_read_page
+	mov	w4, w0
+	adrp	x0, .LANCHOR29
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 4, .L1347
+	mov	w3, w4
+	str	w4, [x29, 120]
+	mov	w2, w23
+	mov	w1, w20
+	adrp	x0, .LC53
+	add	x0, x0, :lo12:.LC53
+	bl	printf
+	ldr	w4, [x29, 120]
+.L1347:
+	cmn	w4, #1
+	beq	.L1348
+	adrp	x0, .LANCHOR135
+	cmn	w19, #1
+	csel	w19, w19, w4, ne
+	ldr	x27, [x0, #:lo12:.LANCHOR135]
+	adrp	x0, .LANCHOR136
+	ldr	x28, [x0, #:lo12:.LANCHOR136]
+	adrp	x0, .LANCHOR34
+	ldrb	w0, [x0, #:lo12:.LANCHOR34]
+	add	w0, w0, w0, lsl 1
+	cmp	w4, w0, lsr 2
+	bcc	.L1366
+.L1348:
+	ldr	w0, [x29, 104]
+	add	w20, w20, 1
+	cmp	w0, w20
+	bne	.L1351
+.L1350:
+	ldrb	w0, [x22, #:lo12:.LANCHOR9]
+	cmp	w0, 36
+	bne	.L1352
+	mov	w2, 0
+.L1389:
+	mov	w1, 0
+	mov	x0, x21
+	bl	toshiba_tlc_set_rr_para
+	b	.L1353
+.L1345:
+	mov	w1, w20
+	mov	x0, x21
+	bl	toshiba_3d_set_slc_rr_para
+	b	.L1346
+.L1366:
+	mov	w19, w4
+	b	.L1350
+.L1352:
+	mov	w1, 0
+	mov	x0, x21
+	bl	toshiba_3d_set_slc_rr_para
+.L1353:
+	ldrb	w0, [x22, #:lo12:.LANCHOR9]
+	cmp	w0, 36
+	bne	.L1362
+	ldr	x0, [x29, 112]
+	add	x26, x26, x0, lsl 8
+	mov	w0, 85
+	str	w0, [x26, 2056]
+	mov	w0, 255
+	str	wzr, [x26, 2052]
+	str	wzr, [x26, 2048]
+	str	w0, [x26, 2056]
+.L1362:
+	adrp	x0, .LANCHOR34
+	ldrb	w0, [x0, #:lo12:.LANCHOR34]
+	add	w0, w0, w0, lsl 1
+	cmp	w19, w0, lsr 2
+	bcc	.L1363
+	cmn	w19, #1
+	mov	w0, 256
+	csel	w19, w19, w0, eq
+.L1363:
+	cmp	w19, 256
+	ccmn	w19, #1, 4, ne
+	bne	.L1364
 	adrp	x0, .LC55
-	ldr	w2, [x20, 52]
+	mov	w4, w19
+	mov	w3, w20
+	mov	w2, w23
+	mov	w1, w20
 	add	x0, x0, :lo12:.LC55
-	mov	w21, w24
 	bl	printf
-	mov	w0, 11
-	strb	w0, [x20, 58]
-	mov	w0, -1
-	str	w0, [x20, 52]
-.L1316:
-	add	x1, x19, :lo12:.LANCHOR36
-	add	x22, x1, x22, lsl 6
-	add	x1, x1, x23, lsl 6
-	ldrb	w0, [x22, 58]
-	strb	w0, [x1, 58]
-	ldr	w0, [x22, 52]
-	str	w0, [x1, 52]
-.L1301:
-	mov	w0, w21
+.L1364:
+	bl	nandc_wait_flash_ready
+	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 64
-	ret
-.L1317:
-	mov	w0, 12
-	str	wzr, [x20, 52]
-	strb	w0, [x20, 58]
-	b	.L1316
-.L1307:
-	mov	w0, w21
-	mov	w1, 32
-	bl	flash_wait_device_ready
-	mov	w21, w0
-	tbz	x21, 5, .L1320
-	add	x19, x19, :lo12:.LANCHOR36
-	tst	x21, 15
-	add	x19, x19, x22, lsl 6
-	beq	.L1319
-	mov	w0, 11
-	strb	w0, [x19, 58]
-	b	.L1338
-.L1319:
-	mov	w0, 12
-	str	wzr, [x19, 52]
-	strb	w0, [x19, 58]
-	b	.L1320
-.L1308:
-	mov	w1, 64
-	mov	w0, w21
-	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1320
-	add	x19, x19, :lo12:.LANCHOR36
-	add	x19, x19, x22, lsl 6
-	str	w0, [x19, 52]
-	mov	w0, 6
-	strb	w0, [x19, 58]
-	b	.L1320
-	.size	queue_wait_first_req_completed, .-queue_wait_first_req_completed
-	.section	.text.sblk_wait_write_queue_completed,"ax",@progbits
-	.align	2
-	.global	sblk_wait_write_queue_completed
-	.type	sblk_wait_write_queue_completed, %function
-sblk_wait_write_queue_completed:
-	stp	x29, x30, [sp, -32]!
-	add	x29, sp, 0
-	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR90
-	add	x19, x19, :lo12:.LANCHOR90
-.L1340:
-	ldrb	w0, [x19]
-	cmp	w0, 255
-	bne	.L1341
-	ldr	x19, [sp, 16]
-	ldp	x29, x30, [sp], 32
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
 	ret
-.L1341:
-	bl	queue_wait_first_req_completed
-	bl	queue_remove_completed_req
-	b	.L1340
-	.size	sblk_wait_write_queue_completed, .-sblk_wait_write_queue_completed
-	.section	.text.ftl_read_page,"ax",@progbits
+.L1344:
+	sxtw	x24, w25
+	orr	w23, w23, w6, lsl 24
+	add	x24, x24, 8
+	add	x0, x22, :lo12:.LANCHOR9
+	add	x24, x26, x24, lsl 8
+	mov	w19, -1
+	mov	w20, 1
+	str	x0, [x29, 104]
+.L1360:
+	ldr	x0, [x29, 104]
+	ldrb	w0, [x0]
+	cmp	w0, 36
+	bne	.L1354
+	mov	x0, x21
+	mov	w2, 1
+	mov	w1, w20
+	bl	toshiba_tlc_set_rr_para
+	mov	w0, 93
+.L1388:
+	str	w0, [x24, 8]
+	mov	x3, x28
+	mov	x2, x27
+	mov	w1, w23
+	ldr	w4, [x29, 124]
+	mov	w0, w25
+	bl	flash_read_page
+	mov	w4, w0
+	adrp	x0, .LANCHOR29
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 4, .L1356
+	mov	w3, w4
+	str	w4, [x29, 120]
+	mov	w2, w23
+	mov	w1, w20
+	adrp	x0, .LC54
+	add	x0, x0, :lo12:.LC54
+	bl	printf
+	ldr	w4, [x29, 120]
+.L1356:
+	cmn	w4, #1
+	beq	.L1357
+	adrp	x0, .LANCHOR135
+	cmn	w19, #1
+	csel	w19, w19, w4, ne
+	ldr	x27, [x0, #:lo12:.LANCHOR135]
+	adrp	x0, .LANCHOR136
+	ldr	x28, [x0, #:lo12:.LANCHOR136]
+	adrp	x0, .LANCHOR34
+	ldrb	w0, [x0, #:lo12:.LANCHOR34]
+	add	w0, w0, w0, lsl 1
+	cmp	w4, w0, lsr 2
+	bcc	.L1367
+.L1357:
+	ldr	w0, [x29, 96]
+	add	w20, w20, 1
+	cmp	w0, w20
+	bne	.L1360
+.L1359:
+	ldrb	w0, [x22, #:lo12:.LANCHOR9]
+	cmp	w0, 36
+	bne	.L1361
+	mov	w2, 1
+	b	.L1389
+.L1354:
+	mov	x0, x21
+	mov	w1, w20
+	bl	toshiba_3d_set_tlc_rr_para
+	mov	w0, 38
+	b	.L1388
+.L1367:
+	mov	w19, w4
+	b	.L1359
+.L1361:
+	mov	w1, 0
+	mov	x0, x21
+	bl	toshiba_3d_set_tlc_rr_para
+	b	.L1353
+	.size	toshiba_3d_read_retrial, .-toshiba_3d_read_retrial
+	.section	.text.toshiba_read_retrial,"ax",@progbits
 	.align	2
-	.global	ftl_read_page
-	.type	ftl_read_page, %function
-ftl_read_page:
-	stp	x29, x30, [sp, -64]!
+	.global	toshiba_read_retrial
+	.type	toshiba_read_retrial, %function
+toshiba_read_retrial:
+	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	and	w19, w0, 255
 	stp	x21, x22, [sp, 32]
-	mov	w20, w1
-	mov	x21, x2
-	mov	x22, x3
-	str	x23, [sp, 48]
-	mov	w23, w4
-	bl	sblk_wait_write_queue_completed
-	mov	w4, w23
-	mov	x3, x22
-	mov	x2, x21
-	mov	w1, w20
-	mov	w0, w19
-	ldr	x23, [sp, 48]
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 64
-	b	flash_read_page_en
-	.size	ftl_read_page, .-ftl_read_page
-	.section	.text.ftl_read_ppa_page,"ax",@progbits
-	.align	2
-	.global	ftl_read_ppa_page
-	.type	ftl_read_ppa_page, %function
-ftl_read_ppa_page:
-	stp	x29, x30, [sp, -48]!
-	add	x29, sp, 0
+	stp	x27, x28, [sp, 80]
+	mov	x27, x3
 	stp	x19, x20, [sp, 16]
-	mov	w19, w0
-	stp	x21, x22, [sp, 32]
-	mov	x20, x1
-	mov	x21, x2
-	mov	w22, w3
-	bl	sblk_wait_write_queue_completed
-	ubfx	x0, x19, 21, 3
-	mov	w4, w22
-	mov	x3, x21
-	mov	x2, x20
-	mov	w1, w19
-	ldp	x21, x22, [sp, 32]
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
-	b	flash_read_page_en
-	.size	ftl_read_ppa_page, .-ftl_read_ppa_page
-	.section	.text.ftl_open_sblk_read_test,"ax",@progbits
-	.align	2
-	.global	ftl_open_sblk_read_test
-	.type	ftl_open_sblk_read_test, %function
-ftl_open_sblk_read_test:
-	stp	x29, x30, [sp, -96]!
-	and	w13, w0, 65535
-	mov	w0, w13
-	add	x29, sp, 0
+	mov	x28, x4
+	stp	x25, x26, [sp, 64]
+	and	w19, w0, 255
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR79
-	adrp	x24, .LANCHOR45
-	add	x23, x23, :lo12:.LANCHOR79
-	add	x24, x24, :lo12:.LANCHOR45
-	stp	x19, x20, [sp, 16]
-	stp	x21, x22, [sp, 32]
-	add	x1, x29, 80
-	mov	w20, 0
-	bl	ftl_get_blk_list_in_sblk
-	strb	w0, [x29, 73]
-	strh	w13, [x29, 64]
-.L1348:
-	ldrh	w0, [x23]
-	cmp	w0, w20
-	bls	.L1347
-	adrp	x22, .LANCHOR69
-	adrp	x21, .LANCHOR121
-	mov	w19, 0
-	add	x22, x22, :lo12:.LANCHOR69
-	add	x21, x21, :lo12:.LANCHOR121
-	b	.L1350
-.L1353:
-	add	x0, x29, 64
-	mov	w1, 65535
-	add	x0, x0, x19, sxtw 1
-	ldrh	w0, [x0, 16]
-	cmp	w0, w1
-	bne	.L1349
-.L1352:
-	add	w19, w19, 1
-	and	w19, w19, 65535
-.L1350:
-	ldrb	w0, [x22]
-	cmp	w0, w19
-	bhi	.L1353
-	add	w20, w20, 1
-	and	w20, w20, 65535
-	b	.L1348
-.L1349:
-	adrp	x1, .LANCHOR75
-	ldrb	w3, [x24]
-	mov	x2, x21
-	ldrh	w4, [x1, #:lo12:.LANCHOR75]
-	adrp	x1, ftl_tmp_buffer
-	add	x1, x1, :lo12:ftl_tmp_buffer
-	madd	w0, w4, w0, w20
-	bl	ftl_read_ppa_page
-	cmp	w0, 512
-	bne	.L1352
-.L1347:
+	and	x26, x19, 255
+	stp	w5, w2, [x29, 120]
+	bl	nandc_wait_flash_ready
+	adrp	x0, .LANCHOR13
+	adrp	x1, .LANCHOR9
+	str	x1, [x29, 112]
+	add	x21, x26, 8
+	ldr	x22, [x0, #:lo12:.LANCHOR13]
+	ldrb	w0, [x1, #:lo12:.LANCHOR9]
+	sub	w0, w0, #67
+	add	x21, x22, x21, lsl 8
+	and	w0, w0, 255
+	cmp	w0, 1
+	bls	.L1408
+	adrp	x0, .LANCHOR42
+	ldrb	w0, [x0, #:lo12:.LANCHOR42]
+	cbz	w0, .L1409
+	mov	w23, 1
+	mov	w0, 1
+	bl	nandc_set_if_mode
+.L1392:
+	add	x0, x22, x26, lsl 8
+	mov	w1, 92
+	str	w1, [x0, 2056]
+	mov	w1, 197
+	str	w1, [x0, 2056]
+.L1391:
+	sxtw	x0, w19
+	mov	w20, 1
+	add	x0, x0, 8
+	mov	w24, -1
+	add	x0, x22, x0, lsl 8
+	str	x0, [x29, 104]
+.L1393:
+	adrp	x0, .LANCHOR137
+	ldrb	w0, [x0, #:lo12:.LANCHOR137]
+	add	w0, w0, 1
+	cmp	w20, w0
+	bcc	.L1402
+	mov	w25, w24
+.L1401:
+	ldr	x0, [x29, 112]
+	mov	w1, 0
+	ldrb	w0, [x0, #:lo12:.LANCHOR9]
+	sub	w0, w0, #67
+	and	w0, w0, 255
+	cmp	w0, 1
+	mov	x0, x21
+	bhi	.L1403
+	bl	sandisk_set_rr_para
+.L1404:
+	sxtw	x19, w19
+	mov	w0, 255
+	add	x19, x19, 8
+	add	x22, x22, x19, lsl 8
+	str	w0, [x22, 8]
+	adrp	x0, .LANCHOR34
+	ldrb	w0, [x0, #:lo12:.LANCHOR34]
+	add	w0, w0, w0, lsl 1
+	cmp	w25, w0, lsr 2
+	bcc	.L1405
+	cmn	w25, #1
+	mov	w0, 256
+	csel	w25, w25, w0, eq
+.L1405:
+	cmp	w25, 256
+	ccmn	w25, #1, 4, ne
+	bne	.L1406
+	ldr	w2, [x29, 124]
+	adrp	x0, .LC55
+	mov	w4, w25
+	mov	w3, w20
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC55
+	bl	printf
+.L1406:
+	bl	nandc_wait_flash_ready
+	cbz	w23, .L1390
+	mov	w0, 4
+	bl	nandc_set_if_mode
+.L1390:
+	mov	w0, w25
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 96
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
 	ret
-	.size	ftl_open_sblk_read_test, .-ftl_open_sblk_read_test
-	.section	.text.sblk_read_page,"ax",@progbits
+.L1409:
+	mov	w23, 0
+	b	.L1392
+.L1408:
+	mov	w23, 0
+	b	.L1391
+.L1402:
+	ldr	x0, [x29, 112]
+	mov	w1, w20
+	ldrb	w0, [x0, #:lo12:.LANCHOR9]
+	sub	w0, w0, #67
+	and	w0, w0, 255
+	cmp	w0, 1
+	mov	x0, x21
+	bhi	.L1394
+	bl	sandisk_set_rr_para
+.L1395:
+	ldr	x0, [x29, 112]
+	ldrb	w0, [x0, #:lo12:.LANCHOR9]
+	cmp	w0, 34
+	bne	.L1396
+	adrp	x0, .LANCHOR137
+	ldrb	w0, [x0, #:lo12:.LANCHOR137]
+	sub	w0, w0, #3
+	cmp	w20, w0
+	bne	.L1396
+	ldr	x1, [x29, 104]
+	mov	w0, 179
+	str	w0, [x1, 8]
+.L1396:
+	add	x0, x22, x26, lsl 8
+	mov	w1, 38
+	ldr	w4, [x29, 120]
+	mov	x3, x28
+	mov	x2, x27
+	str	w1, [x0, 2056]
+	mov	w1, 93
+	str	w1, [x0, 2056]
+	mov	w0, w19
+	ldr	w1, [x29, 124]
+	bl	flash_read_page
+	mov	w25, w0
+	cmn	w0, #1
+	beq	.L1399
+	cmn	w24, #1
+	csel	w24, w24, w0, ne
+	adrp	x0, .LANCHOR135
+	ldr	x27, [x0, #:lo12:.LANCHOR135]
+	adrp	x0, .LANCHOR136
+	ldr	x28, [x0, #:lo12:.LANCHOR136]
+	adrp	x0, .LANCHOR34
+	ldrb	w0, [x0, #:lo12:.LANCHOR34]
+	add	w0, w0, w0, lsl 1
+	cmp	w25, w0, lsr 2
+	bcc	.L1401
+.L1399:
+	add	w20, w20, 1
+	b	.L1393
+.L1394:
+	bl	toshiba_set_rr_para
+	b	.L1395
+.L1403:
+	bl	toshiba_set_rr_para
+	b	.L1404
+	.size	toshiba_read_retrial, .-toshiba_read_retrial
+	.section	.text.hynix_read_retrial,"ax",@progbits
 	.align	2
-	.global	sblk_read_page
-	.type	sblk_read_page, %function
-sblk_read_page:
-	stp	x29, x30, [sp, -80]!
+	.global	hynix_read_retrial
+	.type	hynix_read_retrial, %function
+hynix_read_retrial:
+	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	and	w21, w1, 255
-	stp	x19, x20, [sp, 16]
-	mov	w22, w21
 	stp	x23, x24, [sp, 48]
-	mov	x20, x0
-	adrp	x23, .LANCHOR90
-	adrp	x24, .LANCHOR36
-	mov	x19, x0
-	add	x23, x23, :lo12:.LANCHOR90
-	add	x24, x24, :lo12:.LANCHOR36
+	and	x23, x0, 255
+	adrp	x0, .LANCHOR12
+	stp	x27, x28, [sp, 80]
+	stp	x21, x22, [sp, 32]
+	mov	w27, w5
+	ldr	x28, [x0, #:lo12:.LANCHOR12]
+	mov	w22, w2
 	stp	x25, x26, [sp, 64]
-.L1359:
-	cbnz	w22, .L1363
-.L1371:
-	adrp	x19, .LANCHOR36
-	add	x19, x19, :lo12:.LANCHOR36
-.L1364:
-	cbnz	w21, .L1367
-	mov	w0, 0
+	mov	x25, x3
+	add	x28, x28, 112
+	stp	x19, x20, [sp, 16]
+	add	x0, x28, x23
+	mov	x26, x4
+	mov	x21, x23
+	mov	w19, -1
+	ldrb	w24, [x28, 2]
+	ldrb	w20, [x0, 8]
+	bl	nandc_wait_flash_ready
+	adrp	x6, .LANCHOR34
+	add	x6, x6, :lo12:.LANCHOR34
+	mov	w5, 0
+	adrp	x7, .LANCHOR135
+	adrp	x8, .LANCHOR136
+.L1423:
+	cmp	w5, w24
+	bcc	.L1428
+.L1427:
+	adrp	x0, .LANCHOR34
+	add	x23, x28, x23
+	ldrb	w0, [x0, #:lo12:.LANCHOR34]
+	strb	w20, [x23, 8]
+	add	w0, w0, w0, lsl 1
+	cmp	w19, w0, lsr 2
+	bcc	.L1429
+	cmn	w19, #1
+	mov	w0, 256
+	csel	w19, w19, w0, eq
+.L1429:
+	cmp	w19, 256
+	ccmn	w19, #1, 4, ne
+	bne	.L1422
+	adrp	x0, .LC56
+	mov	w4, w19
+	mov	w3, w5
+	mov	w2, w22
+	mov	w1, w5
+	add	x0, x0, :lo12:.LC56
+	bl	printf
+.L1422:
+	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
 	ret
-.L1363:
-	ldrb	w25, [x19]
-	ldr	w26, [x19, 40]
-.L1360:
-	mov	w1, 0
-	mov	w0, w26
-	bl	queue_lun_state
-	cbnz	w0, .L1361
-	ldr	w1, [x19, 40]
-	mov	w0, 48
-	bl	flash_start_page_read
-	strb	wzr, [x19, 59]
-	mov	w0, 1
-	strb	w0, [x19, 58]
-	mov	w0, -1
-	strb	w0, [x19]
-	mov	x1, x19
-	mov	x0, x23
-	bl	buf_add_tail
-	subs	w22, w22, #1
-	beq	.L1371
-	ubfiz	x19, x25, 6, 8
-	add	x19, x24, x19
-	b	.L1359
-.L1361:
-	bl	queue_wait_first_req_completed
-	bl	queue_remove_completed_req
-	b	.L1360
-.L1367:
-	ldrb	w0, [x20, 58]
-	cmp	w0, 12
-	bne	.L1365
-	ldrb	w20, [x20]
-	sub	w21, w21, #1
-	add	x20, x19, x20, lsl 6
-	b	.L1364
-.L1365:
-	bl	queue_wait_first_req_completed
-	bl	queue_remove_completed_req
-	b	.L1364
-	.size	sblk_read_page, .-sblk_read_page
-	.section	.text.gc_check_data_one_wl,"ax",@progbits
+.L1428:
+	add	w20, w20, 1
+	stp	x6, x8, [x29, 96]
+	and	w20, w20, 255
+	str	x7, [x29, 112]
+	cmp	w24, w20
+	str	w5, [x29, 124]
+	csel	w20, w20, wzr, hi
+	mov	w0, w21
+	mov	w1, w20
+	bl	hynix_set_rr_para
+	mov	w4, w27
+	mov	x3, x26
+	mov	x2, x25
+	mov	w1, w22
+	mov	w0, w21
+	bl	flash_read_page
+	ldr	w5, [x29, 124]
+	cmn	w0, #1
+	ldp	x6, x8, [x29, 96]
+	ldr	x7, [x29, 112]
+	beq	.L1425
+	ldrb	w1, [x6]
+	cmn	w19, #1
+	csel	w19, w19, w0, ne
+	ldr	x25, [x7, #:lo12:.LANCHOR135]
+	ldr	x26, [x8, #:lo12:.LANCHOR136]
+	add	w1, w1, w1, lsl 1
+	cmp	w0, w1, lsr 2
+	bcc	.L1431
+.L1425:
+	add	w5, w5, 1
+	b	.L1423
+.L1431:
+	mov	w19, w0
+	b	.L1427
+	.size	hynix_read_retrial, .-hynix_read_retrial
+	.section	.text.flash_ddr_tunning_read,"ax",@progbits
 	.align	2
-	.global	gc_check_data_one_wl
-	.type	gc_check_data_one_wl, %function
-gc_check_data_one_wl:
-	sub	sp, sp, #112
-	adrp	x0, .LANCHOR60
-	stp	x29, x30, [sp, 16]
-	add	x29, sp, 16
-	stp	x19, x20, [sp, 32]
-	adrp	x19, .LANCHOR58
-	stp	x21, x22, [sp, 48]
-	add	x21, x19, :lo12:.LANCHOR58
-	ldr	x20, [x0, #:lo12:.LANCHOR60]
-	stp	x23, x24, [sp, 64]
-	ldr	x0, [x21, 8]
-	stp	x25, x26, [sp, 80]
-	str	x27, [sp, 96]
-	cbnz	x0, .L1374
-	mov	w0, 1
-	bl	buf_alloc
-	str	x0, [x21, 8]
-.L1374:
-	add	x0, x19, :lo12:.LANCHOR58
-	ldr	x21, [x0, 8]
-	cbz	x21, .L1375
-	adrp	x26, .LANCHOR75
-	adrp	x27, .LANCHOR64
-	add	x25, x20, 96
-	add	x26, x26, :lo12:.LANCHOR75
-	add	x27, x27, :lo12:.LANCHOR64
+	.global	flash_ddr_tunning_read
+	.type	flash_ddr_tunning_read, %function
+flash_ddr_tunning_read:
+	stp	x29, x30, [sp, -144]!
+	and	w0, w0, 255
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w20, w1
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LC57
+	stp	x23, x24, [sp, 48]
+	adrp	x22, .LANCHOR34
+	stp	x25, x26, [sp, 64]
+	add	x21, x21, :lo12:.LC57
+	stp	x27, x28, [sp, 80]
+	mov	x26, x3
+	str	w4, [x29, 120]
+	add	x22, x22, :lo12:.LANCHOR34
+	str	x2, [x29, 128]
+	mov	w28, 0
+	str	w0, [x29, 136]
+	bl	nandc_get_ddr_para
+	mov	w23, 0
+	str	w0, [x29, 124]
 	mov	w24, 0
-.L1376:
-	ldrb	w0, [x20, 89]
-	cmp	w24, w0
-	bge	.L1386
-	mov	w23, 1
-	add	x22, x19, :lo12:.LANCHOR58
-	b	.L1387
-.L1375:
-	adrp	x1, .LANCHOR122
-	adrp	x0, .LC0
-	mov	w2, 333
-	add	x1, x1, :lo12:.LANCHOR122
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1377:
-	b	.L1377
-.L1385:
-	ldrh	w0, [x25]
-	ldrh	w1, [x26]
-	ldrb	w2, [x27]
-	cmp	w2, 3
-	mul	w1, w0, w1
-	ldrh	w0, [x22, 16]
-	bne	.L1378
-	add	w0, w0, w1
-	orr	w0, w0, w23, lsl 24
-.L1398:
-	str	w0, [x21, 40]
-	mov	w1, 1
+	adrp	x0, .LANCHOR29
+	mov	w27, 1024
+	add	x0, x0, :lo12:.LANCHOR29
+	mov	w25, 6
+	mov	w19, -1
+	str	wzr, [x29, 140]
+	str	x0, [x29, 112]
+.L1447:
+	mov	w0, w25
+	bl	nandc_set_ddr_para
+	ldr	w4, [x29, 120]
+	mov	x3, x26
+	ldrb	w0, [x29, 136]
+	mov	w1, w20
+	ldr	x2, [x29, 128]
+	bl	flash_read_page
+	mov	w4, w0
+	ldr	x0, [x29, 112]
+	ldr	w0, [x0]
+	tbz	x0, 4, .L1442
+	mov	w3, w4
+	str	w4, [x29, 108]
+	mov	w2, w20
+	mov	w1, w25
 	mov	x0, x21
-	bl	sblk_read_page
-	ldr	w2, [x21, 52]
-	adrp	x1, .LANCHOR107
-	cmn	w2, #1
-	beq	.L1381
-	ldrh	w0, [x22, 22]
-	ldr	x4, [x1, #:lo12:.LANCHOR107]
-	ldr	x3, [x21, 24]
-	lsl	x0, x0, 2
-	ldr	w5, [x4, x0]
-	ldr	w4, [x3, 4]
-	cmp	w5, w4
-	bne	.L1381
-	adrp	x4, .LANCHOR108
-	ldr	x4, [x4, #:lo12:.LANCHOR108]
-	ldr	w4, [x4, x0]
-	ldr	w0, [x3, 8]
+	bl	printf
+	ldr	w4, [x29, 108]
+.L1442:
+	add	w0, w27, 1
 	cmp	w4, w0
-	beq	.L1382
-.L1381:
-	ldrh	w0, [x22, 22]
-	ldr	x1, [x1, #:lo12:.LANCHOR107]
-	lsl	x0, x0, 2
-	ldr	w3, [x1, x0]
-	cmn	w3, #1
-	beq	.L1382
-	adrp	x1, .LANCHOR22
-	ldr	w1, [x1, #:lo12:.LANCHOR22]
-	tbz	x1, 10, .L1383
-	ldr	x1, [x21, 24]
-	adrp	x4, .LANCHOR108
-	ldr	x4, [x4, #:lo12:.LANCHOR108]
-	ldr	w5, [x1, 12]
-	str	w5, [sp]
-	ldr	w4, [x4, x0]
-	adrp	x0, .LC56
-	ldp	w5, w6, [x1]
-	add	x0, x0, :lo12:.LC56
-	ldr	w7, [x1, 8]
-	ldr	w1, [x21, 40]
+	bhi	.L1443
+	adrp	x0, .LANCHOR135
+	ldr	x0, [x0, #:lo12:.LANCHOR135]
+	str	x0, [x29, 128]
+	adrp	x0, .LANCHOR136
+	ldr	x26, [x0, #:lo12:.LANCHOR136]
+	ldrb	w0, [x22]
+	cmp	w4, w0, lsr 2
+	bcs	.L1452
+	add	w24, w24, 1
+	cmp	w24, 7
+	bls	.L1452
+	sub	w28, w25, w24
+	mov	w27, w4
+	mov	w19, 0
+.L1445:
+	ldr	w0, [x29, 140]
+	cmp	w24, w23
+	csel	w28, w28, w0, cs
+.L1446:
+	cbz	w28, .L1448
+	adrp	x0, .LANCHOR34
+	mov	w1, 3
+	ldrb	w0, [x0, #:lo12:.LANCHOR34]
+	udiv	w0, w0, w1
+	cmp	w0, w27
+	bls	.L1448
+	mov	w1, w28
+	adrp	x0, .LC58
+	add	x0, x0, :lo12:.LC58
 	bl	printf
-.L1383:
-	adrp	x0, .LANCHOR56
-	ldrh	w1, [x20, 80]
-	ldr	x0, [x0, #:lo12:.LANCHOR56]
-	strh	wzr, [x0, x1, lsl 1]
-	mov	w0, -1
-.L1373:
-	ldp	x19, x20, [sp, 32]
-	ldp	x21, x22, [sp, 48]
-	ldp	x23, x24, [sp, 64]
-	ldp	x25, x26, [sp, 80]
-	ldp	x29, x30, [sp, 16]
-	ldr	x27, [sp, 96]
-	add	sp, sp, 112
+	mov	w0, w28
+.L1462:
+	bl	nandc_set_ddr_para
+	cbz	w19, .L1441
+	ldr	w1, [x29, 136]
+	adrp	x0, .LC59
+	mov	w2, w20
+	add	x0, x0, :lo12:.LC59
+	mov	w27, w19
+	bl	printf
+.L1441:
+	mov	w0, w27
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 144
 	ret
-.L1378:
-	cmp	w2, 2
-	bne	.L1380
-	sub	w0, w0, #1
-	add	w1, w23, w1
-	add	w0, w0, w1
-	orr	w0, w0, 33554432
-	b	.L1398
-.L1380:
-	add	w0, w0, w1
-	b	.L1398
-.L1382:
-	ldrh	w0, [x22, 22]
-	add	w23, w23, 1
-	add	w0, w0, 1
-	strh	w0, [x22, 22]
-.L1387:
-	ldrh	w0, [x22, 20]
-	cmp	w23, w0
-	ble	.L1385
-	add	w24, w24, 1
-	add	x25, x25, 2
-	b	.L1376
-.L1386:
-.L1384:
-	add	x19, x19, :lo12:.LANCHOR58
-	ldrh	w0, [x19, 16]
-	add	w0, w0, 1
-	strh	w0, [x19, 16]
-	mov	w0, 0
-	b	.L1373
-	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
-	.section	.text.flash_prog_page,"ax",@progbits
+.L1443:
+	cmp	w24, w23
+	bls	.L1453
+	sub	w0, w28, w24
+	str	w0, [x29, 140]
+	cmp	w24, 7
+	bhi	.L1446
+	mov	w23, w24
+.L1453:
+	mov	w24, 0
+	b	.L1444
+.L1452:
+	mov	w28, w25
+	mov	w27, w4
+	mov	w19, 0
+.L1444:
+	add	w25, w25, 2
+	cmp	w25, 50
+	bne	.L1447
+	b	.L1445
+.L1448:
+	ldrb	w0, [x29, 124]
+	b	.L1462
+	.size	flash_ddr_tunning_read, .-flash_ddr_tunning_read
+	.section	.text.flash_read_page_en,"ax",@progbits
 	.align	2
-	.global	flash_prog_page
-	.type	flash_prog_page, %function
-flash_prog_page:
+	.global	flash_read_page_en
+	.type	flash_read_page_en, %function
+flash_read_page_en:
 	stp	x29, x30, [sp, -96]!
+	and	w0, w0, 255
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	and	w20, w0, 255
-	adrp	x0, .LANCHOR6
-	str	x27, [sp, 80]
+	mov	w19, w1
+	adrp	x1, .LANCHOR15
 	stp	x21, x22, [sp, 32]
-	and	x19, x20, 255
-	ldr	x27, [x0, #:lo12:.LANCHOR6]
-	adrp	x0, .LANCHOR22
 	stp	x23, x24, [sp, 48]
-	mov	w21, w1
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	add	x23, x19, 8
+	ldrb	w1, [x1, #:lo12:.LANCHOR15]
 	stp	x25, x26, [sp, 64]
-	and	w24, w1, 2097151
-	mov	x25, x2
-	mov	x26, x3
-	ubfx	x22, x21, 24, 2
-	add	x23, x27, x23, lsl 8
-	tbz	x0, 4, .L1400
-	adrp	x0, .LC57
-	mov	w3, w4
-	mov	w2, w22
-	add	x0, x0, :lo12:.LC57
+	str	x27, [sp, 80]
+	cmp	w1, w0
+	bhi	.L1464
+	adrp	x1, .LANCHOR138
+	adrp	x0, .LC0
+	mov	w2, 399
+	add	x1, x1, :lo12:.LANCHOR138
+	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1400:
-	bl	nandc_wait_flash_ready
-	mov	w0, w20
-	bl	hynix_reconfig_rr_para
-	mov	w0, w20
-	bl	nandc_cs
-	mov	w0, w20
-	cbnz	w22, .L1401
-	bl	flash_enter_slc_mode
-.L1402:
-	add	x19, x27, x19, lsl 8
-	mov	w0, 128
-	and	w21, w21, 255
-	str	w0, [x19, 2056]
-	lsr	w0, w24, 8
-	str	wzr, [x19, 2052]
-	str	wzr, [x19, 2052]
-	str	w21, [x19, 2052]
-	str	w0, [x19, 2052]
-	lsr	w0, w24, 16
-	str	w0, [x19, 2052]
-	mov	w0, w24
-	bl	nandc_set_seed
-	adrp	x0, .LANCHOR19+9
-	mov	x3, x26
-	mov	x2, x25
-	ldrb	w1, [x0, #:lo12:.LANCHOR19+9]
-	mov	w0, 1
-	bl	nandc_xfer_start
-	bl	nandc_xfer_done
-	mov	w0, 16
-	str	w0, [x19, 2056]
-	bl	nandc_wait_flash_ready
-	mov	x0, x23
-	bl	flash_read_status
-	mov	w5, w0
-	cbnz	w22, .L1403
+.L1465:
+	b	.L1465
+.L1464:
+	adrp	x1, .LANCHOR17
+	add	x1, x1, :lo12:.LANCHOR17
+	mov	x22, x2
+	mov	x23, x3
+	mov	w24, w4
+	ldrb	w20, [x1, w0, sxtw]
+	adrp	x0, .LANCHOR29
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 4, .L1466
+	adrp	x0, .LC60
+	mov	w2, w19
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC60
+	bl	printf
+.L1466:
+	tst	x19, 50331648
+	bne	.L1467
+	adrp	x0, .LANCHOR18
+	adrp	x1, .LANCHOR19
+	ldrb	w0, [x0, #:lo12:.LANCHOR18]
+	cbz	w0, .L1468
+	ldrb	w0, [x1, #:lo12:.LANCHOR19]
+	cbz	w0, .L1467
+.L1468:
+	adrp	x0, .LANCHOR20
+	ldrb	w1, [x1, #:lo12:.LANCHOR19]
+	ldrh	w2, [x0, #:lo12:.LANCHOR20]
+	udiv	w0, w19, w2
+	mul	w0, w0, w2
+	sub	w19, w19, w0
+	cbz	w1, .L1469
+	add	w19, w0, w19, lsl 1
+.L1467:
+	mov	w4, w24
+	mov	x3, x23
+	mov	x2, x22
+	mov	w1, w19
 	mov	w0, w20
-	bl	flash_exit_slc_mode
-.L1403:
+	bl	flash_read_page
+	mov	w21, w0
+	cmn	w0, #1
+	bne	.L1463
+	adrp	x25, .LANCHOR36
+	mov	x26, x25
+	ldrb	w27, [x25, #:lo12:.LANCHOR36]
+	cbnz	w27, .L1471
+.L1474:
+	adrp	x0, .LANCHOR139
+	ldr	x6, [x0, #:lo12:.LANCHOR139]
+	cbnz	x6, .L1472
+.L1473:
+	ldrb	w4, [x26, #:lo12:.LANCHOR36]
+	mov	w3, -1
+	mov	w2, w19
+	mov	w1, 0
+	adrp	x0, .LC61
+	add	x0, x0, :lo12:.LC61
+	bl	printf
+	adrp	x0, .LANCHOR42
+	ldrb	w0, [x0, #:lo12:.LANCHOR42]
+	cbz	w0, .L1463
+	mov	w4, w24
+	mov	x3, x23
+	mov	x2, x22
+	mov	w1, w19
 	mov	w0, w20
-	bl	nandc_de_cs
+	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
-	and	w0, w5, 4
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	b	flash_ddr_tunning_read
+.L1469:
+	adrp	x1, .LANCHOR21
+	add	x1, x1, :lo12:.LANCHOR21
+	ldrh	w19, [x1, w19, uxtw 1]
+	add	w19, w19, w0
+	b	.L1467
+.L1471:
+	strb	wzr, [x25, #:lo12:.LANCHOR36]
+	mov	w4, w24
+	mov	x3, x23
+	mov	x2, x22
+	mov	w1, w19
+	mov	w0, w20
+	bl	flash_read_page
+	strb	w27, [x25, #:lo12:.LANCHOR36]
+	cmn	w0, #1
+	beq	.L1474
+.L1492:
+	mov	w21, w0
+.L1463:
+	mov	w0, w21
 	ldr	x27, [sp, 80]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1401:
-	bl	flash_exit_slc_mode
-	b	.L1402
-	.size	flash_prog_page, .-flash_prog_page
-	.section	.text.flash_test_blk,"ax",@progbits
+.L1472:
+	mov	w5, w24
+	mov	x4, x23
+	mov	x3, x22
+	mov	w2, w19
+	mov	w1, 0
+	mov	w0, w20
+	blr	x6
+	cmn	w0, #1
+	bne	.L1492
+	b	.L1473
+	.size	flash_read_page_en, .-flash_read_page_en
+	.section	.text.flash_get_last_written_page,"ax",@progbits
 	.align	2
-	.global	flash_test_blk
-	.type	flash_test_blk, %function
-flash_test_blk:
-	stp	x29, x30, [sp, -64]!
+	.global	flash_get_last_written_page
+	.type	flash_get_last_written_page, %function
+flash_get_last_written_page:
+	stp	x29, x30, [sp, -96]!
+	and	w1, w1, 65535
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	and	w19, w1, 65535
 	stp	x21, x22, [sp, 32]
-	ands	w21, w0, 255
-	str	x23, [sp, 48]
-	bne	.L1409
-	adrp	x0, .LANCHOR123
-	ldrb	w0, [x0, #:lo12:.LANCHOR123]
-	cmp	w0, w19
-	bhi	.L1413
-.L1409:
-	adrp	x22, .LANCHOR118
-	adrp	x23, .LANCHOR119
-	mov	w2, 32
-	mov	w1, 165
-	ldr	x0, [x22, #:lo12:.LANCHOR118]
-	bl	ftl_memset
-	ldr	x0, [x23, #:lo12:.LANCHOR119]
-	mov	w2, 8
-	mov	w1, 90
-	bl	ftl_memset
-	adrp	x0, .LANCHOR13
-	ldrh	w20, [x0, #:lo12:.LANCHOR13]
-	mov	w0, w21
-	mul	w20, w20, w19
-	mov	w1, w20
-	bl	flash_erase_block
-	cmn	w0, #1
-	beq	.L1411
-	adrp	x19, .LANCHOR19
-	add	x19, x19, :lo12:.LANCHOR19
-	ldr	x3, [x22, #:lo12:.LANCHOR118]
-	mov	w1, w20
-	ldr	x2, [x23, #:lo12:.LANCHOR119]
-	mov	w0, w21
-	ldrb	w4, [x19, 9]
-	bl	flash_prog_page
-	cmn	w0, #1
-	beq	.L1411
-	ldrb	w4, [x19, 9]
-	mov	w1, w20
-	ldr	x3, [x22, #:lo12:.LANCHOR118]
-	mov	w0, w21
-	ldr	x2, [x23, #:lo12:.LANCHOR119]
-	bl	flash_read_page
-	mov	w19, w0
-	cmn	w0, #1
-	beq	.L1411
-	ldr	x0, [x23, #:lo12:.LANCHOR119]
-	ldr	w1, [x0]
-	mov	w0, 23130
-	movk	w0, 0x5a5a, lsl 16
-	cmp	w1, w0
-	bne	.L1411
-	ldr	x0, [x22, #:lo12:.LANCHOR118]
-	ldr	w1, [x0]
-	mov	w0, 42405
-	movk	w0, 0xa5a5, lsl 16
-	cmp	w1, w0
-	beq	.L1412
-.L1411:
-	mov	w19, -1
-.L1412:
-	mov	w1, w20
+	and	w21, w0, 255
+	adrp	x0, .LANCHOR121
+	stp	x19, x20, [sp, 16]
+	stp	x25, x26, [sp, 64]
+	mov	x22, x2
+	ldrh	w19, [x0, #:lo12:.LANCHOR121]
+	adrp	x0, .LANCHOR26+26
+	stp	x23, x24, [sp, 48]
+	mov	x23, x3
+	ldrh	w25, [x0, #:lo12:.LANCHOR26+26]
+	sub	w19, w19, #1
+	sxth	w19, w19
+	mov	w24, w4
 	mov	w0, w21
-	bl	flash_erase_block
+	str	x27, [sp, 80]
+	mul	w25, w25, w1
+	add	w1, w19, w25
+	bl	flash_read_page_en
+	cmp	w0, 512
+	bne	.L1494
+	mov	w26, 0
+	mov	w27, 2
+.L1495:
+	cmp	w26, w19
+	ble	.L1498
+.L1494:
 	mov	w0, w19
-.L1408:
+	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	ldr	x23, [sp, 48]
-	ldp	x29, x30, [sp], 64
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
 	ret
-.L1413:
-	mov	w0, 0
-	b	.L1408
-	.size	flash_test_blk, .-flash_test_blk
-	.section	.text.flash_start_tlc_page_prog,"ax",@progbits
+.L1498:
+	add	w20, w26, w19
+	mov	w4, w24
+	mov	x3, x23
+	mov	x2, x22
+	mov	w0, w21
+	sdiv	w20, w20, w27
+	add	w1, w25, w20, sxth
+	bl	flash_read_page_en
+	cmp	w0, 512
+	bne	.L1496
+	sub	w19, w20, #1
+	sxth	w19, w19
+	b	.L1495
+.L1496:
+	add	w20, w20, 1
+	sxth	w26, w20
+	b	.L1495
+	.size	flash_get_last_written_page, .-flash_get_last_written_page
+	.section	.text.flash_get_last_written_page_ext,"ax",@progbits
 	.align	2
-	.global	flash_start_tlc_page_prog
-	.type	flash_start_tlc_page_prog, %function
-flash_start_tlc_page_prog:
-	stp	x29, x30, [sp, -48]!
-	and	w8, w0, 255
-	adrp	x0, .LANCHOR8
-	and	w3, w3, 255
+	.global	flash_get_last_written_page_ext
+	.type	flash_get_last_written_page_ext, %function
+flash_get_last_written_page_ext:
+	adrp	x4, .LANCHOR96
+	mov	w6, 21
+	and	w0, w0, 65535
+	mov	w5, 1
+	ldrh	w4, [x4, #:lo12:.LANCHOR96]
+	sub	w6, w6, w4
+	mov	w4, w3
+	mov	x3, x2
+	mov	x2, x1
+	lsl	w5, w5, w6
+	sub	w5, w5, #1
+	and	w1, w5, w0
+	asr	w0, w0, w6
+	b	flash_get_last_written_page
+	.size	flash_get_last_written_page_ext, .-flash_get_last_written_page_ext
+	.section	.text.flash_info_blk_init,"ax",@progbits
+	.align	2
+	.global	flash_info_blk_init
+	.type	flash_info_blk_init, %function
+flash_info_blk_init:
+	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR20
+	stp	x23, x24, [sp, 48]
+	mov	w24, 21321
+	stp	x25, x26, [sp, 64]
+	adrp	x26, .LANCHOR140
+	stp	x27, x28, [sp, 80]
+	mov	x21, x26
+	add	x27, x22, :lo12:.LANCHOR20
 	stp	x19, x20, [sp, 16]
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	str	x21, [sp, 32]
-	cmp	w0, w3
-	bhi	.L1425
-	adrp	x1, .LANCHOR124
-	adrp	x0, .LC0
-	mov	w2, 655
-	add	x1, x1, :lo12:.LANCHOR124
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1426:
-	b	.L1426
-.L1425:
-	adrp	x0, .LANCHOR10
-	add	x0, x0, :lo12:.LANCHOR10
-	and	w7, w1, 255
-	and	w21, w2, 255
-	ldrb	w20, [x0, w3, sxtw]
-	adrp	x0, .LANCHOR6
-	ldr	x19, [x0, #:lo12:.LANCHOR6]
-	mov	w0, w20
-	bl	nandc_cs
-	cbz	w8, .L1427
-	sxtw	x0, w20
-	add	x0, x0, 8
-	add	x0, x19, x0, lsl 8
-	str	w8, [x0, 8]
-.L1427:
-	ubfiz	x0, x20, 8, 8
-	add	x19, x19, x0
-	mov	w0, 128
-	str	w7, [x19, 2056]
-	str	w0, [x19, 2056]
-	and	w0, w4, 255
-	str	wzr, [x19, 2052]
-	str	wzr, [x19, 2052]
-	str	w0, [x19, 2052]
-	lsr	w0, w4, 8
-	str	w0, [x19, 2052]
-	lsr	w0, w4, 16
-	add	w4, w4, w4, lsl 1
-	str	w0, [x19, 2052]
-	sub	w0, w4, #1
-	add	w0, w0, w7
-	bl	nandc_set_seed
-	mov	x3, x6
-	adrp	x0, .LANCHOR19+9
-	mov	x2, x5
-	ldrb	w1, [x0, #:lo12:.LANCHOR19+9]
-	mov	w0, 1
-	bl	nandc_xfer_start
-	bl	nandc_xfer_done
-	str	w21, [x19, 2056]
-	mov	w0, w20
-	ldr	x21, [sp, 32]
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
-	b	nandc_de_cs
-	.size	flash_start_tlc_page_prog, .-flash_start_tlc_page_prog
-	.section	.text.queue_tlc_prog_cmd,"ax",@progbits
-	.align	2
-	.type	queue_tlc_prog_cmd, %function
-queue_tlc_prog_cmd:
-	stp	x29, x30, [sp, -48]!
-	mov	w2, 26
-	mov	w1, 1
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	x19, x0
-	ldr	x0, [x0]
-	ldr	w20, [x0, 40]
-	ldr	x5, [x0, 8]
-	ldr	x6, [x0, 24]
-	str	x21, [sp, 32]
-	and	w21, w20, 2097151
-	ubfx	x20, x20, 21, 3
-	mov	w4, w21
-	ldrb	w0, [x0, 60]
-	mov	w3, w20
-	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldp	x7, x0, [x19]
-	mov	w4, w21
-	mov	w3, w20
-	mov	w2, 26
-	mov	w1, 2
-	ldr	x5, [x0, 8]
-	ldr	x6, [x0, 24]
-	ldrb	w0, [x7, 60]
-	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldr	x0, [x19, 16]
-	mov	w4, w21
-	ldr	x7, [x19]
-	mov	w3, w20
-	mov	w2, 16
-	mov	w1, 3
-	ldr	x5, [x0, 8]
-	ldr	x6, [x0, 24]
-	ldrb	w0, [x7, 60]
-	bl	flash_start_tlc_page_prog
-	ldr	x1, [x19]
-	mov	w0, 4
-	strb	w0, [x1, 58]
-	mov	w0, 1
-	strb	w0, [x1, 59]
+	movk	w24, 0x5359, lsl 16
+	mov	w19, 4
+.L1504:
+	ldrh	w1, [x27]
+	adrp	x20, .LANCHOR12
+	ldr	x3, [x26, #:lo12:.LANCHOR140]
+	mov	w4, 4
+	ldr	x2, [x20, #:lo12:.LANCHOR12]
+	mov	w0, 0
+	add	x28, x26, :lo12:.LANCHOR140
+	add	x25, x20, :lo12:.LANCHOR12
+	mul	w1, w1, w19
+	mov	x23, x20
+	bl	flash_read_page_en
+	cmn	w0, #1
+	beq	.L1502
+	ldr	x2, [x20, #:lo12:.LANCHOR12]
+	ldr	w0, [x2]
+	cmp	w0, w24
+	beq	.L1503
+.L1502:
+	add	w19, w19, 1
+	cmp	w19, 16
+	bne	.L1504
+.L1525:
 	mov	w0, -1
-	strb	w0, [x1]
-	adrp	x0, .LANCHOR90
-	add	x0, x0, :lo12:.LANCHOR90
+.L1501:
 	ldp	x19, x20, [sp, 16]
-	ldr	x21, [sp, 32]
-	ldp	x29, x30, [sp], 48
-	b	buf_add_tail
-	.size	queue_tlc_prog_cmd, .-queue_tlc_prog_cmd
-	.section	.text.sblk_tlc_prog_one_page,"ax",@progbits
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	ret
+.L1512:
+	ldr	x0, [x25]
+	ldr	w1, [x0]
+	cmp	w1, w24
+	bne	.L1513
+	ldr	w19, [x0, 4]
+.L1506:
+	add	x24, x20, :lo12:.LANCHOR141
+	ldrh	w0, [x22, #:lo12:.LANCHOR20]
+	ldr	x3, [x21, #:lo12:.LANCHOR140]
+	mov	w4, 4
+	ldr	x2, [x23, #:lo12:.LANCHOR12]
+	ldrb	w1, [x24, 1]
+	mul	w1, w1, w0
+	mov	w0, 0
+	bl	flash_read_page_en
+	cmn	w0, #1
+	beq	.L1507
+	ldr	x0, [x23, #:lo12:.LANCHOR12]
+	mov	w1, 21321
+	movk	w1, 0x5359, lsl 16
+	ldr	w2, [x0]
+	cmp	w2, w1
+	bne	.L1507
+	ldr	w1, [x0, 4]
+	cmp	w19, w1
+	bcs	.L1507
+	ldrb	w1, [x0, 37]
+	ldrb	w0, [x0, 36]
+	strb	w1, [x20, #:lo12:.LANCHOR141]
+	strb	w0, [x24, 1]
+.L1507:
+	ldrb	w1, [x20, #:lo12:.LANCHOR141]
+	add	x24, x20, :lo12:.LANCHOR141
+	ldr	x3, [x21, #:lo12:.LANCHOR140]
+	mov	w4, 4
+	ldr	x2, [x23, #:lo12:.LANCHOR12]
+	mov	w0, 0
+	bl	flash_get_last_written_page
+	sxth	w19, w0
+	add	w0, w0, 1
+	ldrb	w20, [x20, #:lo12:.LANCHOR141]
+	strh	w0, [x24, 2]
+	ldrh	w0, [x22, #:lo12:.LANCHOR20]
+	mov	w22, 21321
+	movk	w22, 0x5359, lsl 16
+	madd	w20, w20, w0, w19
+.L1508:
+	tbz	w19, #31, .L1510
+	cmn	w19, #1
+	bne	.L1511
+	ldr	x0, [x23, #:lo12:.LANCHOR12]
+	ldr	w1, [x0]
+	adrp	x0, .LC62
+	add	x0, x0, :lo12:.LC62
+	bl	printf
+	b	.L1525
+.L1510:
+	ldr	x3, [x21, #:lo12:.LANCHOR140]
+	mov	w4, 4
+	ldr	x2, [x23, #:lo12:.LANCHOR12]
+	mov	w1, w20
+	mov	w0, 0
+	bl	flash_read_page_en
+	cmn	w0, #1
+	beq	.L1509
+	ldr	x0, [x23, #:lo12:.LANCHOR12]
+	ldr	w0, [x0]
+	cmp	w0, w22
+	bne	.L1509
+.L1511:
+	mov	w0, 0
+	b	.L1501
+.L1509:
+	sub	w19, w19, #1
+	sub	w20, w20, #1
+	sxth	w19, w19
+	b	.L1508
+.L1503:
+	adrp	x20, .LANCHOR141
+	add	x1, x20, :lo12:.LANCHOR141
+	ldrb	w3, [x2, 37]
+	mov	w4, 4
+	ldrb	w0, [x2, 36]
+	strb	w3, [x1, 1]
+	ldrh	w1, [x27]
+	ldr	x3, [x28]
+	strb	w0, [x20, #:lo12:.LANCHOR141]
+	mul	w1, w1, w0
+	mov	w0, 0
+	bl	flash_read_page_en
+	cmn	w0, #1
+	bne	.L1512
+.L1513:
+	mov	w19, 0
+	b	.L1506
+	.size	flash_info_blk_init, .-flash_info_blk_init
+	.section	.text.flash_ddr_para_scan,"ax",@progbits
 	.align	2
-	.global	sblk_tlc_prog_one_page
-	.type	sblk_tlc_prog_one_page, %function
-sblk_tlc_prog_one_page:
-	stp	x29, x30, [sp, -32]!
+	.global	flash_ddr_para_scan
+	.type	flash_ddr_para_scan, %function
+flash_ddr_para_scan:
+	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	mov	x19, x0
-	ldr	x0, [x0]
-	ldr	w20, [x0, 40]
-.L1435:
-	mov	w1, 1
-	mov	w0, w20
-	bl	queue_lun_state
-	cbnz	w0, .L1436
+	adrp	x20, .LANCHOR32
+	stp	x21, x22, [sp, 32]
+	and	w22, w0, 255
+	ldrb	w0, [x20, #:lo12:.LANCHOR32]
+	adrp	x19, .LANCHOR42
+	stp	x23, x24, [sp, 48]
+	mov	w21, 1
+	mov	w23, w1
+	str	x25, [sp, 64]
+	strb	w21, [x19, #:lo12:.LANCHOR42]
+	adrp	x24, .LANCHOR143
+	bl	flash_set_interface_mode
+	adrp	x25, .LANCHOR142
+	ldrb	w0, [x20, #:lo12:.LANCHOR32]
+	bl	nandc_set_if_mode
+	ldr	x3, [x25, #:lo12:.LANCHOR142]
+	mov	w4, 4
+	ldr	x2, [x24, #:lo12:.LANCHOR143]
+	mov	w1, w23
+	mov	w0, w22
+	bl	flash_ddr_tunning_read
+	ldr	x3, [x25, #:lo12:.LANCHOR142]
+	mov	w4, 4
+	ldr	x2, [x24, #:lo12:.LANCHOR143]
+	mov	w1, w23
+	mov	w0, w22
+	bl	flash_read_page
+	cmn	w0, #1
 	mov	x0, x19
-	bl	queue_tlc_prog_cmd
+	bne	.L1527
+	ldrb	w1, [x20, #:lo12:.LANCHOR32]
+	tbz	x1, 0, .L1527
+	mov	w0, 1
+	bl	flash_set_interface_mode
+	mov	w0, w21
+	bl	nandc_set_if_mode
+	strb	wzr, [x19, #:lo12:.LANCHOR42]
+.L1528:
 	mov	w0, 0
+	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 32
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
 	ret
-.L1436:
-	bl	queue_wait_first_req_completed
-	bl	queue_remove_completed_req
-	b	.L1435
-	.size	sblk_tlc_prog_one_page, .-sblk_tlc_prog_one_page
-	.section	.text.sblk_xlc_prog_pages,"ax",@progbits
+.L1527:
+	mov	w1, 1
+	strb	w1, [x0, #:lo12:.LANCHOR42]
+	b	.L1528
+	.size	flash_ddr_para_scan, .-flash_ddr_para_scan
+	.section	.text.flash_complete_page_read,"ax",@progbits
 	.align	2
-	.global	sblk_xlc_prog_pages
-	.type	sblk_xlc_prog_pages, %function
-sblk_xlc_prog_pages:
-	stp	x29, x30, [sp, -64]!
+	.global	flash_complete_page_read
+	.type	flash_complete_page_read, %function
+flash_complete_page_read:
+	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	mov	w23, w0
+	adrp	x0, .LANCHOR15
 	stp	x19, x20, [sp, 16]
-	mov	x19, x0
-	ldr	x0, [x0]
 	stp	x21, x22, [sp, 32]
-	mov	x22, x1
-	stp	x23, x24, [sp, 48]
-	mov	w24, w2
-	ldr	w20, [x0, 40]
-.L1439:
-	mov	w1, 1
-	mov	w0, w20
-	bl	queue_lun_state
-	cbnz	w0, .L1440
-	cmp	w24, 2
-	bne	.L1441
-	ldr	x0, [x19]
-	mov	w2, 17
-	ldr	x1, [x22]
-	ldr	w20, [x0, 40]
-	ldr	x5, [x0, 8]
-	ldr	x6, [x0, 24]
-	and	w23, w20, 2097151
-	ldrb	w0, [x0, 60]
-	ubfx	x20, x20, 21, 3
-	mov	w4, w23
-	mov	w3, w20
-	ldr	w21, [x1, 40]
-	mov	w1, 1
-	bl	flash_start_tlc_page_prog
-	and	w21, w21, 2097151
-	bl	nandc_wait_flash_ready
-	ldr	x7, [x19]
-	mov	w4, w21
-	ldr	x0, [x22]
-	mov	w3, w20
-	mov	w2, 26
-	mov	w1, 1
-	ldr	x5, [x0, 8]
-	ldr	x6, [x0, 24]
-	ldrb	w0, [x7, 60]
-	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldp	x7, x0, [x19]
-	mov	w4, w23
-	mov	w3, w20
-	mov	w1, w24
-	mov	w2, 17
-	ldr	x5, [x0, 8]
-	ldr	x6, [x0, 24]
-	ldrb	w0, [x7, 60]
-	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldr	x7, [x19]
-	mov	w4, w21
-	ldr	x0, [x22, 8]
-	mov	w3, w20
-	mov	w1, w24
-	mov	w2, 26
-	ldr	x5, [x0, 8]
-	ldr	x6, [x0, 24]
-	ldrb	w0, [x7, 60]
-	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldr	x7, [x19]
-	mov	w4, w23
-	ldr	x0, [x19, 16]
-	mov	w3, w20
-	mov	w2, 17
-	mov	w1, 3
-	ldr	x5, [x0, 8]
-	ldr	x6, [x0, 24]
-	ldrb	w0, [x7, 60]
-	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldr	x0, [x22, 16]
-	mov	w1, 3
-	ldr	x7, [x19]
-	mov	w4, w21
-	mov	w3, w20
-	mov	w2, 16
-	ldr	x5, [x0, 8]
-	ldr	x6, [x0, 24]
-	ldrb	w0, [x7, 60]
-	bl	flash_start_tlc_page_prog
-	ldr	x1, [x19]
-	mov	w0, 5
-	strb	w0, [x1, 58]
-	mov	w0, 1
-	strb	w0, [x1, 59]
-	mov	w0, -1
-	strb	w0, [x1]
-	adrp	x0, .LANCHOR90
-	add	x0, x0, :lo12:.LANCHOR90
-	bl	buf_add_tail
-.L1442:
-	mov	w0, 0
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 64
-	ret
-.L1440:
-	bl	queue_wait_first_req_completed
-	bl	queue_remove_completed_req
-	b	.L1439
-.L1441:
-	mov	x0, x19
-	bl	queue_tlc_prog_cmd
-	b	.L1442
-	.size	sblk_xlc_prog_pages, .-sblk_xlc_prog_pages
-	.section	.text.flash_start_page_prog,"ax",@progbits
-	.align	2
-	.global	flash_start_page_prog
-	.type	flash_start_page_prog, %function
-flash_start_page_prog:
-	stp	x29, x30, [sp, -48]!
-	mov	w11, w1
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	and	w20, w0, 255
-	adrp	x0, .LANCHOR8
-	str	x21, [sp, 32]
-	ubfx	x1, x11, 21, 3
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	mov	x24, x1
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	ubfx	x1, x23, 21, 3
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
 	cmp	w0, w1
-	bhi	.L1445
-	adrp	x1, .LANCHOR125
+	bhi	.L1534
+	adrp	x1, .LANCHOR144
 	adrp	x0, .LC0
-	mov	w2, 692
-	add	x1, x1, :lo12:.LANCHOR125
+	mov	w2, 812
+	add	x1, x1, :lo12:.LANCHOR144
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1446:
-	b	.L1446
-.L1445:
-	adrp	x0, .LANCHOR10
-	add	x0, x0, :lo12:.LANCHOR10
-	mov	x12, x2
-	mov	x13, x3
-	and	w10, w11, 2097151
-	ldrb	w21, [x0, w1, sxtw]
-	adrp	x0, .LANCHOR6
-	ldr	x19, [x0, #:lo12:.LANCHOR6]
-	mov	w0, w21
-	bl	hynix_reconfig_rr_para
-	mov	w0, w21
-	bl	nandc_cs
-	tst	x11, 50331648
-	bne	.L1447
-	adrp	x0, .LANCHOR11
-	adrp	x1, .LANCHOR12
-	ldrb	w0, [x0, #:lo12:.LANCHOR11]
-	cbz	w0, .L1448
-	ldrb	w0, [x1, #:lo12:.LANCHOR12]
-	cbz	w0, .L1449
-.L1448:
+.L1535:
+	b	.L1535
+.L1534:
+	adrp	x0, .LANCHOR17
+	add	x0, x0, :lo12:.LANCHOR17
+	ubfx	x21, x23, 24, 2
+	mov	x25, x2
+	and	w19, w23, 2097151
+	ldrb	w22, [x0, w1, sxtw]
 	adrp	x0, .LANCHOR13
-	ldrb	w1, [x1, #:lo12:.LANCHOR12]
-	ldrh	w2, [x0, #:lo12:.LANCHOR13]
-	udiv	w0, w10, w2
+	ldr	x4, [x0, #:lo12:.LANCHOR13]
+	mov	w0, w22
+	bl	nandc_cs
+	cbnz	w21, .L1536
+	adrp	x0, .LANCHOR18
+	adrp	x1, .LANCHOR19
+	ldrb	w0, [x0, #:lo12:.LANCHOR18]
+	cbz	w0, .L1537
+	ldrb	w0, [x1, #:lo12:.LANCHOR19]
+	cbz	w0, .L1536
+.L1537:
+	adrp	x0, .LANCHOR20
+	ldrb	w1, [x1, #:lo12:.LANCHOR19]
+	ldrh	w2, [x0, #:lo12:.LANCHOR20]
+	udiv	w0, w19, w2
 	mul	w0, w0, w2
-	sub	w10, w10, w0
-	cbz	w1, .L1450
-	add	w10, w0, w10, lsl 1
-.L1449:
-	mov	w0, w21
-	bl	flash_enter_slc_mode
-	b	.L1451
-.L1450:
-	adrp	x1, .LANCHOR14
-	add	x1, x1, :lo12:.LANCHOR14
-	ldrh	w10, [x1, w10, uxtw 1]
-	add	w10, w10, w0
-.L1451:
-	ubfiz	x0, x21, 8, 8
-	add	x19, x19, x0
-	mov	w0, 128
-	str	w0, [x19, 2056]
-	and	w0, w10, 255
-	str	wzr, [x19, 2052]
-	str	wzr, [x19, 2052]
-	str	w0, [x19, 2052]
-	lsr	w0, w10, 8
-	str	w0, [x19, 2052]
-	lsr	w0, w10, 16
-	str	w0, [x19, 2052]
-	mov	w0, w10
-	bl	nandc_set_seed
-	mov	x3, x13
-	adrp	x0, .LANCHOR19+9
-	mov	x2, x12
-	ldrb	w1, [x0, #:lo12:.LANCHOR19+9]
-	mov	w0, 1
-	bl	nandc_xfer_start
-	bl	nandc_xfer_done
-	mov	w0, w21
-	ldr	x21, [sp, 32]
-	str	w20, [x19, 2056]
+	sub	w19, w19, w0
+	cbz	w1, .L1538
+	add	w19, w0, w19, lsl 1
+.L1536:
+	ubfiz	x0, x22, 8, 8
+	mov	w1, 5
+	add	x0, x4, x0
+	adrp	x20, .LANCHOR26
+	add	x28, x20, :lo12:.LANCHOR26
+	mov	x4, x25
+	mov	x3, x24
+	str	w1, [x0, 2056]
+	and	w1, w19, 255
+	str	wzr, [x0, 2052]
+	str	wzr, [x0, 2052]
+	str	w1, [x0, 2052]
+	lsr	w1, w19, 8
+	ldrb	w2, [x28, 9]
+	str	w1, [x0, 2052]
+	lsr	w1, w19, 16
+	str	w1, [x0, 2052]
+	mov	w1, 224
+	str	w1, [x0, 2056]
+	mov	w1, 0
+	mov	w0, w22
+	bl	nandc_xfer
+	cmn	w0, #1
+	bne	.L1539
+	adrp	x26, .LANCHOR36
+	ldrb	w27, [x26, #:lo12:.LANCHOR36]
+	cbz	w27, .L1540
+	ldrb	w4, [x28, 9]
+	mov	x3, x25
+	strb	wzr, [x26, #:lo12:.LANCHOR36]
+	mov	x2, x24
+	orr	w1, w19, w21, lsl 24
+	mov	w0, w22
+	bl	flash_read_page
+	strb	w27, [x26, #:lo12:.LANCHOR36]
+	cbnz	w21, .L1541
+.L1546:
+	adrp	x1, .LANCHOR18
+	ldrb	w1, [x1, #:lo12:.LANCHOR18]
+	cbz	w1, .L1541
+	adrp	x1, .LANCHOR34
+	ldrb	w1, [x1, #:lo12:.LANCHOR34]
+	add	w1, w1, w1, lsl 1
+	cmp	w0, w1, lsr 2
+	blt	.L1541
+	add	x20, x20, :lo12:.LANCHOR26
+	ldrb	w1, [x20, 19]
+	sub	w1, w1, #4
+	and	w1, w1, 255
+	cmp	w1, 3
+	mov	w1, 256
+	csel	w0, w0, w1, hi
+.L1533:
 	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
-	b	nandc_de_cs
-.L1447:
-	mov	w0, w21
-	bl	flash_exit_slc_mode
-	b	.L1451
-	.size	flash_start_page_prog, .-flash_start_page_prog
-	.section	.text.queue_prog_cmd,"ax",@progbits
-	.align	2
-	.type	queue_prog_cmd, %function
-queue_prog_cmd:
-	stp	x29, x30, [sp, -32]!
-	add	x29, sp, 0
-	ldr	w1, [x0, 40]
-	ldr	x3, [x0, 24]
-	ldr	x2, [x0, 8]
-	str	x19, [sp, 16]
-	mov	x19, x0
-	mov	w0, 16
-	bl	flash_start_page_prog
-	adrp	x0, .LANCHOR90
-	ldr	w3, [x19, 40]
-	ldrb	w1, [x0, #:lo12:.LANCHOR90]
-	cmp	w1, 255
-	beq	.L1457
-	adrp	x2, .LANCHOR36
-	add	x2, x2, :lo12:.LANCHOR36
-	ubfx	x3, x3, 21, 3
-	mov	x6, x2
-.L1459:
-	add	x4, x2, x1, lsl 6
-	ldr	w5, [x4, 40]
-	ubfx	x5, x5, 21, 3
-	cmp	w3, w5
-	bne	.L1458
-	ldrb	w5, [x4, 58]
-	cmp	w5, 6
-	bne	.L1458
-	mov	w1, 3
-	strb	w1, [x4, 58]
-.L1457:
-	mov	w1, 3
-	strb	w1, [x19, 58]
-	mov	w1, 1
-	strb	w1, [x19, 59]
-	mov	w1, -1
-	strb	w1, [x19]
-	mov	x1, x19
-	add	x0, x0, :lo12:.LANCHOR90
-	ldr	x19, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	b	buf_add_tail
-.L1458:
-	lsl	x1, x1, 6
-	ldrb	w1, [x6, x1]
-	cmp	w1, 255
-	bne	.L1459
-	b	.L1457
-	.size	queue_prog_cmd, .-queue_prog_cmd
-	.section	.text.sblk_prog_page,"ax",@progbits
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	ret
+.L1538:
+	adrp	x1, .LANCHOR21
+	add	x1, x1, :lo12:.LANCHOR21
+	ldrh	w19, [x1, w19, uxtw 1]
+	add	w19, w19, w0
+	b	.L1536
+.L1541:
+	cmn	w0, #1
+	bne	.L1533
+.L1547:
+	adrp	x0, .LANCHOR139
+	ldr	x6, [x0, #:lo12:.LANCHOR139]
+	cbnz	x6, .L1543
+.L1545:
+	adrp	x0, .LANCHOR36
+	mov	w3, -1
+	mov	w2, w23
+	mov	w1, 0
+	ldrb	w4, [x0, #:lo12:.LANCHOR36]
+	adrp	x0, .LC63
+	add	x0, x0, :lo12:.LC63
+	bl	printf
+	adrp	x0, .LANCHOR42
+	ldrb	w0, [x0, #:lo12:.LANCHOR42]
+	cbnz	w0, .L1544
+	mov	w0, -1
+	b	.L1533
+.L1543:
+	add	x0, x20, :lo12:.LANCHOR26
+	mov	x4, x25
+	mov	x3, x24
+	mov	w2, w19
+	mov	w1, w21
+	ldrb	w5, [x0, 9]
+	mov	w0, w22
+	blr	x6
+	cmn	w0, #1
+	beq	.L1545
+	b	.L1533
+.L1544:
+	add	x20, x20, :lo12:.LANCHOR26
+	orr	w1, w19, w21, lsl 24
+	mov	x3, x25
+	mov	x2, x24
+	mov	w0, w22
+	ldrb	w4, [x20, 9]
+	ldp	x21, x22, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	b	flash_ddr_tunning_read
+.L1539:
+	cbnz	w21, .L1533
+	b	.L1546
+.L1540:
+	cbz	w21, .L1546
+	b	.L1547
+	.size	flash_complete_page_read, .-flash_complete_page_read
+	.section	.text.queue_wait_first_req_completed,"ax",@progbits
 	.align	2
-	.global	sblk_prog_page
-	.type	sblk_prog_page, %function
-sblk_prog_page:
-	stp	x29, x30, [sp, -80]!
+	.type	queue_wait_first_req_completed, %function
+queue_wait_first_req_completed:
+	stp	x29, x30, [sp, -64]!
+	adrp	x0, .LANCHOR114
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	mov	x19, x0
-	ldrh	w0, [x0, 50]
-	and	w20, w1, 255
+	ldrb	w0, [x0, #:lo12:.LANCHOR114]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	stp	x25, x26, [sp, 64]
-	cbz	w0, .L1466
-	adrp	x0, .LANCHOR22
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	tbz	x0, 8, .L1466
-	ldr	w1, [x19, 40]
-	adrp	x0, .LC58
-	mov	w2, w20
-	add	x0, x0, :lo12:.LC58
-	bl	printf
-.L1466:
-	adrp	x24, .LANCHOR23
-	adrp	x22, .LANCHOR36
-	add	x24, x24, :lo12:.LANCHOR23
-	add	x22, x22, :lo12:.LANCHOR36
+	cmp	w0, 255
+	bne	.L1568
+.L1586:
 	mov	w21, 0
-	mov	w23, 1
-.L1467:
-	cbnz	w20, .L1478
-	mov	w0, 0
+	b	.L1567
+.L1568:
+	adrp	x19, .LANCHOR43
+	sxtw	x22, w0
+	add	x1, x19, :lo12:.LANCHOR43
+	add	x1, x1, x22, lsl 6
+	ldrb	w2, [x1, 58]
+	ldr	w21, [x1, 40]
+	sub	w3, w2, #1
+	cmp	w3, 9
+	bhi	.L1586
+	adrp	x1, .L1571
+	add	x1, x1, :lo12:.L1571
+	ldrb	w1, [x1,w3,uxtw]
+	adr	x3, .Lrtx1571
+	add	x1, x3, w1, sxtb #2
+	br	x1
+.Lrtx1571:
+	.section	.rodata.queue_wait_first_req_completed,"a",@progbits
+	.align	0
+	.align	2
+.L1571:
+	.byte	(.L1570 - .Lrtx1571) / 4
+	.byte	(.L1570 - .Lrtx1571) / 4
+	.byte	(.L1572 - .Lrtx1571) / 4
+	.byte	(.L1572 - .Lrtx1571) / 4
+	.byte	(.L1572 - .Lrtx1571) / 4
+	.byte	(.L1573 - .Lrtx1571) / 4
+	.byte	(.L1574 - .Lrtx1571) / 4
+	.byte	(.L1575 - .Lrtx1571) / 4
+	.byte	(.L1572 - .Lrtx1571) / 4
+	.byte	(.L1575 - .Lrtx1571) / 4
+	.section	.text.queue_wait_first_req_completed
+.L1570:
+	mov	w1, 64
+	mov	w0, w21
+	bl	flash_wait_device_ready
+	tbz	x0, 6, .L1586
+	add	x19, x19, :lo12:.LANCHOR43
+	add	x19, x19, x22, lsl 6
+	ldp	x1, x0, [x19, 8]
+	ldr	x2, [x19, 24]
+	cmp	x0, 0
+	csel	x1, x0, x1, ne
+	mov	w0, w21
+	bl	flash_complete_page_read
+	str	w0, [x19, 52]
+	mov	w0, 12
+	strb	w0, [x19, 58]
+	ldrb	w0, [x19, 2]
+	orr	w0, w0, 8
+	strb	w0, [x19, 2]
+	b	.L1586
+.L1572:
+	mov	w0, w21
+	mov	w1, 64
+	bl	flash_wait_device_ready
+	mov	w21, w0
+	tbz	x21, 6, .L1586
+	add	x19, x19, :lo12:.LANCHOR43
+	mov	w0, 5
+	add	x19, x19, x22, lsl 6
+	tst	w21, w0
+	beq	.L1585
+	ldrb	w1, [x19, 1]
+	mov	w0, 11
+	ldr	w3, [x19, 40]
+	mov	w4, 11
+	ldr	w2, [x19, 52]
+	strb	w0, [x19, 58]
+	adrp	x0, .LC64
+	add	x0, x0, :lo12:.LC64
+	bl	printf
+.L1604:
+	mov	w0, -1
+	str	w0, [x19, 52]
+	b	.L1567
+.L1575:
+	cmp	w2, 10
+	add	x20, x19, :lo12:.LANCHOR43
+	ubfiz	x0, x0, 6, 8
+	mov	w1, 3
+	mov	w2, 9
+	add	x0, x20, x0
+	csel	w2, w2, w1, eq
+	ubfx	x3, x21, 21, 3
+.L1580:
+	ldrb	w1, [x0]
+	cmp	w1, 255
+	bne	.L1584
+	mov	w21, -1
+	b	.L1567
+.L1584:
+	sxtw	x23, w1
+	ubfiz	x0, x1, 6, 8
+	add	x1, x20, x23, lsl 6
+	add	x0, x20, x0
+	ldrb	w4, [x1, 58]
+	cmp	w4, w2
+	bne	.L1580
+	ldr	w1, [x1, 40]
+	ubfx	x1, x1, 21, 3
+	cmp	w3, w1
+	bne	.L1580
+	mov	w0, w21
+	mov	w1, 64
+	bl	flash_wait_device_ready
+	mov	w24, w0
+	and	w21, w0, 64
+	tbz	x24, 6, .L1582
+	add	x20, x20, x22, lsl 6
+	ands	w21, w0, 15
+	beq	.L1583
+	ldrb	w1, [x20, 1]
+	mov	w4, 11
+	ldr	w3, [x20, 40]
+	adrp	x0, .LC64
+	ldr	w2, [x20, 52]
+	add	x0, x0, :lo12:.LC64
+	mov	w21, w24
+	bl	printf
+	mov	w0, 11
+	strb	w0, [x20, 58]
+	mov	w0, -1
+	str	w0, [x20, 52]
+.L1582:
+	add	x1, x19, :lo12:.LANCHOR43
+	add	x22, x1, x22, lsl 6
+	add	x1, x1, x23, lsl 6
+	ldrb	w0, [x22, 58]
+	strb	w0, [x1, 58]
+	ldr	w0, [x22, 52]
+	str	w0, [x1, 52]
+.L1567:
+	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
+	ldp	x29, x30, [sp], 64
 	ret
-.L1478:
-	ldrb	w25, [x19]
-	ldr	w26, [x19, 40]
-.L1468:
-	mov	w1, 1
-	mov	w0, w26
-	bl	queue_lun_state
-	cbnz	w0, .L1469
-	cmp	w20, 1
-	beq	.L1470
-	ldrb	w0, [x24]
-	cbnz	w0, .L1471
-.L1470:
-	mov	x0, x19
-	bl	queue_prog_cmd
-.L1472:
-	ubfiz	x19, x25, 6, 8
-	sub	w20, w20, #1
-	add	x19, x22, x19
-	b	.L1467
-.L1469:
-	bl	queue_wait_first_req_completed
-	bl	queue_remove_completed_req
-	b	.L1468
-.L1471:
-	ldrb	w0, [x19]
-	ubfx	x1, x26, 21, 3
-	cmp	w0, 255
-	bne	.L1473
-	adrp	x1, .LANCHOR126
-	adrp	x0, .LC0
-	mov	w2, 478
-	add	x1, x1, :lo12:.LANCHOR126
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1474:
-	b	.L1474
-.L1473:
-	sbfiz	x0, x0, 6, 32
-	add	x0, x22, x0
-	ldr	w5, [x0, 40]
-	ubfx	x0, x5, 21, 3
-	cmp	w1, w0
-	bne	.L1475
-	adrp	x0, .LANCHOR71
-	ldrh	w2, [x0, #:lo12:.LANCHOR71]
-	adrp	x0, .LANCHOR70
-	ldrb	w3, [x0, #:lo12:.LANCHOR70]
-	mov	w0, 21
-	sub	w0, w0, w2
-	lsl	w1, w23, w2
-	sub	w3, w3, #1
-	sub	w1, w1, #1
-	lsl	w0, w23, w0
-	sub	w0, w0, #1
-	and	w0, w0, w3
-	lsr	w4, w26, w2
-	and	w0, w0, 65535
-	and	w1, w1, 65535
-	and	w4, w0, w4
-	lsr	w2, w5, w2
-	and	w0, w0, w2
-	and	w26, w1, w26
-	cmp	w4, w0
-	and	w1, w1, w5
-	ccmp	w26, w1, 0, ne
-	bne	.L1475
-	cmp	w21, w3
-	beq	.L1475
-	ldr	w1, [x19, 40]
-	mov	w0, 17
-	ldr	x2, [x19, 8]
-	add	w21, w21, 1
-	ldr	x3, [x19, 24]
-	bl	flash_start_page_prog
-	strb	w23, [x19, 59]
-	mov	w0, 8
+.L1583:
+	mov	w0, 12
+	str	wzr, [x20, 52]
+	strb	w0, [x20, 58]
+	b	.L1582
+.L1573:
+	mov	w0, w21
+	mov	w1, 32
+	bl	flash_wait_device_ready
+	mov	w21, w0
+	tbz	x21, 5, .L1586
+	add	x19, x19, :lo12:.LANCHOR43
+	tst	x21, 15
+	add	x19, x19, x22, lsl 6
+	beq	.L1585
+	mov	w0, 11
 	strb	w0, [x19, 58]
-	mov	w0, -1
-	strb	w0, [x19]
-	mov	x1, x19
-	adrp	x0, .LANCHOR90
-	add	x0, x0, :lo12:.LANCHOR90
-	bl	buf_add_tail
-	b	.L1472
-.L1475:
-	mov	x0, x19
-	mov	w21, 0
-	bl	queue_prog_cmd
-	b	.L1472
-	.size	sblk_prog_page, .-sblk_prog_page
-	.section	.text.ftl_flush,"ax",@progbits
+	b	.L1604
+.L1585:
+	mov	w0, 12
+	str	wzr, [x19, 52]
+	strb	w0, [x19, 58]
+	b	.L1586
+.L1574:
+	mov	w1, 64
+	mov	w0, w21
+	bl	flash_wait_device_ready
+	tbz	x0, 6, .L1586
+	add	x19, x19, :lo12:.LANCHOR43
+	add	x19, x19, x22, lsl 6
+	str	w0, [x19, 52]
+	mov	w0, 6
+	strb	w0, [x19, 58]
+	b	.L1586
+	.size	queue_wait_first_req_completed, .-queue_wait_first_req_completed
+	.section	.text.sblk_wait_write_queue_completed,"ax",@progbits
 	.align	2
-	.global	ftl_flush
-	.type	ftl_flush, %function
-ftl_flush:
+	.global	sblk_wait_write_queue_completed
+	.type	sblk_wait_write_queue_completed, %function
+sblk_wait_write_queue_completed:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR89
 	add	x29, sp, 0
-	ldrb	w1, [x0, #:lo12:.LANCHOR89]
-	stp	x19, x20, [sp, 16]
-	mov	x19, x0
-	adrp	x20, .LANCHOR127
-	cbz	w1, .L1490
-	ldrb	w2, [x20, #:lo12:.LANCHOR127]
-	adrp	x0, .LANCHOR36
-	add	x0, x0, :lo12:.LANCHOR36
-	add	x0, x0, x2, lsl 6
-	bl	sblk_prog_page
-.L1490:
-	mov	w0, -1
-	strb	wzr, [x19, #:lo12:.LANCHOR89]
-	strb	w0, [x20, #:lo12:.LANCHOR127]
-	bl	sblk_wait_write_queue_completed
-	bl	ftl_write_completed
-	ldp	x19, x20, [sp, 16]
-	mov	w0, -1
+	str	x19, [sp, 16]
+	adrp	x19, .LANCHOR114
+	add	x19, x19, :lo12:.LANCHOR114
+.L1606:
+	ldrb	w0, [x19]
+	cmp	w0, 255
+	bne	.L1607
+	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	b	ftl_vpn_decrement
-	.size	ftl_flush, .-ftl_flush
-	.section	.text.flash_prog_page_en,"ax",@progbits
+	ret
+.L1607:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L1606
+	.size	sblk_wait_write_queue_completed, .-sblk_wait_write_queue_completed
+	.section	.text.ftl_read_page,"ax",@progbits
 	.align	2
-	.global	flash_prog_page_en
-	.type	flash_prog_page_en, %function
-flash_prog_page_en:
-	stp	x29, x30, [sp, -80]!
+	.global	ftl_read_page
+	.type	ftl_read_page, %function
+ftl_read_page:
+	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	and	w24, w0, 255
-	adrp	x0, .LANCHOR8
 	stp	x19, x20, [sp, 16]
+	and	w19, w0, 255
 	stp	x21, x22, [sp, 32]
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	stp	x25, x26, [sp, 64]
-	cmp	w0, w24
-	bhi	.L1496
-	adrp	x1, .LANCHOR128
-	adrp	x0, .LC0
-	mov	w2, 480
-	add	x1, x1, :lo12:.LANCHOR128
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1497:
-	b	.L1497
-.L1496:
-	adrp	x0, .LANCHOR10
-	add	x0, x0, :lo12:.LANCHOR10
 	mov	w20, w1
-	mov	x23, x2
+	mov	x21, x2
 	mov	x22, x3
-	mov	w25, w4
-	and	w21, w5, 255
-	ldrb	w26, [x0, w24, sxtw]
-	tst	x20, 50331648
-	bne	.L1508
-	adrp	x0, .LANCHOR11
-	ldrb	w1, [x0, #:lo12:.LANCHOR11]
-	adrp	x0, .LANCHOR12
-	cbz	w1, .L1499
-	ldrb	w1, [x0, #:lo12:.LANCHOR12]
-	cbz	w1, .L1508
-.L1499:
-	adrp	x1, .LANCHOR13
-	ldrb	w0, [x0, #:lo12:.LANCHOR12]
-	ldrh	w1, [x1, #:lo12:.LANCHOR13]
-	udiv	w19, w20, w1
-	mul	w19, w19, w1
-	sub	w1, w20, w19
-	cbz	w0, .L1500
-	add	w19, w19, w1, lsl 1
-.L1498:
-	adrp	x0, .LANCHOR22
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	tbz	x0, 4, .L1501
-	adrp	x0, .LC59
-	mov	w2, w20
-	mov	w1, w26
-	add	x0, x0, :lo12:.LC59
-	bl	printf
-.L1501:
-	mov	w0, w26
-	mov	w4, w25
+	str	x23, [sp, 48]
+	mov	w23, w4
+	bl	sblk_wait_write_queue_completed
+	mov	w4, w23
 	mov	x3, x22
-	mov	x2, x23
-	mov	w1, w19
-	bl	flash_prog_page
-	mov	w26, w0
-	cbz	w21, .L1502
-	adrp	x21, .LANCHOR118
-	adrp	x19, .LANCHOR119
-	mov	w4, w25
-	mov	w1, w20
-	ldr	x3, [x21, #:lo12:.LANCHOR118]
-	mov	w0, w24
-	ldr	x2, [x19, #:lo12:.LANCHOR119]
-	bl	flash_read_page_en
-	cmp	w0, 512
-	ccmn	w0, #1, 4, ne
-	beq	.L1503
-	ldr	x0, [x19, #:lo12:.LANCHOR119]
-	ldr	w1, [x23]
-	ldr	w0, [x0]
-	cmp	w1, w0
-	bne	.L1503
-	ldr	x0, [x21, #:lo12:.LANCHOR118]
-	ldr	w1, [x22]
-	ldr	w0, [x0]
-	cmp	w1, w0
-	beq	.L1502
-.L1503:
-	ldr	x1, [x21, #:lo12:.LANCHOR118]
-	mov	w3, 4
-	adrp	x0, .LC60
-	mov	w2, w3
-	add	x0, x0, :lo12:.LC60
-	bl	rknand_print_hex
-	ldr	x1, [x19, #:lo12:.LANCHOR119]
-	mov	w3, 4
-	adrp	x0, .LC61
-	mov	w2, w3
-	add	x0, x0, :lo12:.LC61
-	bl	rknand_print_hex
-.L1504:
+	mov	x2, x21
 	mov	w1, w20
-	adrp	x0, .LC62
-	add	x0, x0, :lo12:.LC62
-	bl	printf
-	adrp	x1, .LANCHOR128
-	adrp	x0, .LC0
-	mov	w2, 506
-	add	x1, x1, :lo12:.LANCHOR128
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1506:
-	b	.L1506
-.L1500:
-	adrp	x0, .LANCHOR14
-	add	x0, x0, :lo12:.LANCHOR14
-	ldrh	w0, [x0, w1, uxtw 1]
-	add	w19, w0, w19
-	b	.L1498
-.L1508:
-	mov	w19, w20
-	b	.L1498
-.L1502:
-	cmn	w26, #1
-	beq	.L1504
-	mov	w0, w26
+	mov	w0, w19
+	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
-	ret
-	.size	flash_prog_page_en, .-flash_prog_page_en
-	.section	.text.ftl_test_block,"ax",@progbits
+	ldp	x29, x30, [sp], 64
+	b	flash_read_page_en
+	.size	ftl_read_page, .-ftl_read_page
+	.section	.text.ftl_read_ppa_page,"ax",@progbits
 	.align	2
-	.global	ftl_test_block
-	.type	ftl_test_block, %function
-ftl_test_block:
-	stp	x29, x30, [sp, -128]!
+	.global	ftl_read_ppa_page
+	.type	ftl_read_ppa_page, %function
+ftl_read_ppa_page:
+	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w19, w0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, ftl_tmp_buffer
-	adrp	x22, .LANCHOR121
+	mov	x20, x1
+	mov	x21, x2
+	mov	w22, w3
+	bl	sblk_wait_write_queue_completed
+	ubfx	x0, x19, 21, 3
+	mov	w4, w22
+	mov	x3, x21
+	mov	x2, x20
+	mov	w1, w19
+	ldp	x21, x22, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	b	flash_read_page_en
+	.size	ftl_read_ppa_page, .-ftl_read_ppa_page
+	.section	.text.ftl_open_sblk_read_test,"ax",@progbits
+	.align	2
+	.global	ftl_open_sblk_read_test
+	.type	ftl_open_sblk_read_test, %function
+ftl_open_sblk_read_test:
+	stp	x29, x30, [sp, -96]!
+	and	w13, w0, 65535
+	mov	w0, w13
+	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR76
-	add	x24, x24, :lo12:.LANCHOR76
-	stp	x25, x26, [sp, 64]
-	and	w26, w0, 65535
+	adrp	x23, .LANCHOR80
+	adrp	x24, .LANCHOR52
+	add	x23, x23, :lo12:.LANCHOR80
+	add	x24, x24, :lo12:.LANCHOR52
 	stp	x19, x20, [sp, 16]
-	adrp	x25, .LANCHOR70
-	stp	x27, x28, [sp, 80]
-	add	x0, x25, :lo12:.LANCHOR70
-	str	wzr, [x21, #:lo12:ftl_tmp_buffer]
-	mov	w19, 0
-	str	wzr, [x22, #:lo12:.LANCHOR121]
-	str	x0, [x29, 112]
-.L1520:
-	ldrb	w0, [x24]
-	cmp	w0, w19
-	bls	.L1527
-	add	x0, x25, :lo12:.LANCHOR70
-	adrp	x23, .LANCHOR22
+	stp	x21, x22, [sp, 32]
+	add	x1, x29, 80
 	mov	w20, 0
-	add	x23, x23, :lo12:.LANCHOR22
-	str	x0, [x29, 120]
-	b	.L1528
-.L1526:
-	ldr	w0, [x23]
-	tbz	x0, 12, .L1521
-	adrp	x0, .LC63
-	mov	w1, w26
-	add	x0, x0, :lo12:.LC63
-	bl	printf
-.L1521:
-	ldr	x0, [x29, 112]
-	ldrb	w6, [x0]
-	madd	w6, w26, w6, w20
-	and	w28, w6, 65535
-	cbnz	w19, .L1522
-	adrp	x0, .LANCHOR5
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
-	ldrb	w0, [x0, 47]
-	cmp	w0, w28
-	bcs	.L1523
-.L1522:
-	and	w27, w19, 255
-	mov	w1, w28
-	mov	w0, w27
-	bl	flash_check_bad_block
-	cbnz	w0, .L1523
-	adrp	x0, .LANCHOR75
-	ldrh	w8, [x0, #:lo12:.LANCHOR75]
-	mov	w0, w27
-	mul	w8, w8, w28
-	str	w8, [x29, 108]
-	mov	w1, w8
-	bl	flash_erase_block
-	ldr	w8, [x29, 108]
-	cbz	w0, .L1525
-.L1536:
-	mov	w1, w28
-	mov	w0, w27
-	bl	flash_mask_bad_block
-	b	.L1523
-.L1525:
-	adrp	x0, .LANCHOR45
-	mov	w5, 1
-	add	x3, x22, :lo12:.LANCHOR121
-	add	x2, x21, :lo12:ftl_tmp_buffer
-	ldrb	w4, [x0, #:lo12:.LANCHOR45]
-	mov	w1, w8
-	mov	w0, w27
-	bl	flash_prog_page_en
-	cbnz	w0, .L1536
-.L1523:
-	add	w20, w20, 1
-	and	w20, w20, 65535
-.L1528:
-	ldr	x0, [x29, 120]
-	ldrb	w0, [x0]
+	bl	ftl_get_blk_list_in_sblk
+	strb	w0, [x29, 73]
+	strh	w13, [x29, 64]
+.L1614:
+	ldrh	w0, [x23]
 	cmp	w0, w20
-	bhi	.L1526
+	bls	.L1613
+	adrp	x22, .LANCHOR72
+	adrp	x21, .LANCHOR145
+	mov	w19, 0
+	add	x22, x22, :lo12:.LANCHOR72
+	add	x21, x21, :lo12:.LANCHOR145
+	b	.L1616
+.L1619:
+	add	x0, x29, 64
+	mov	w1, 65535
+	add	x0, x0, x19, sxtw 1
+	ldrh	w0, [x0, 16]
+	cmp	w0, w1
+	bne	.L1615
+.L1618:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1520
-.L1527:
+.L1616:
+	ldrb	w0, [x22]
+	cmp	w0, w19
+	bhi	.L1619
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L1614
+.L1615:
+	adrp	x1, .LANCHOR99
+	ldrb	w3, [x24]
+	mov	x2, x21
+	ldrh	w4, [x1, #:lo12:.LANCHOR99]
+	adrp	x1, ftl_tmp_buffer
+	add	x1, x1, :lo12:ftl_tmp_buffer
+	madd	w0, w4, w0, w20
+	bl	ftl_read_ppa_page
+	cmp	w0, 512
+	bne	.L1618
+.L1613:
 	ldp	x19, x20, [sp, 16]
-	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 128
+	ldp	x29, x30, [sp], 96
 	ret
-	.size	ftl_test_block, .-ftl_test_block
-	.section	.text.ftl_prog_page,"ax",@progbits
+	.size	ftl_open_sblk_read_test, .-ftl_open_sblk_read_test
+	.section	.text.sblk_read_page,"ax",@progbits
 	.align	2
-	.global	ftl_prog_page
-	.type	ftl_prog_page, %function
-ftl_prog_page:
-	stp	x29, x30, [sp, -64]!
+	.global	sblk_read_page
+	.type	sblk_read_page, %function
+sblk_read_page:
+	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	and	w19, w0, 255
 	stp	x21, x22, [sp, 32]
-	mov	w20, w1
-	mov	x21, x2
-	mov	x22, x3
-	str	x23, [sp, 48]
-	mov	w23, w4
-	bl	sblk_wait_write_queue_completed
-	mov	w5, 1
-	mov	w4, w23
-	mov	x3, x22
-	mov	x2, x21
-	mov	w1, w20
-	mov	w0, w19
-	bl	flash_prog_page_en
-	cmn	w0, #1
-	bne	.L1537
-	adrp	x1, .LANCHOR129
-	adrp	x0, .LC0
-	mov	w2, 1414
-	add	x1, x1, :lo12:.LANCHOR129
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1539:
-	b	.L1539
-.L1537:
+	and	w21, w1, 255
+	stp	x19, x20, [sp, 16]
+	mov	w22, w21
+	stp	x23, x24, [sp, 48]
+	mov	x20, x0
+	adrp	x23, .LANCHOR114
+	adrp	x24, .LANCHOR43
+	mov	x19, x0
+	add	x23, x23, :lo12:.LANCHOR114
+	add	x24, x24, :lo12:.LANCHOR43
+	stp	x25, x26, [sp, 64]
+.L1625:
+	cbnz	w22, .L1629
+.L1637:
+	adrp	x19, .LANCHOR43
+	add	x19, x19, :lo12:.LANCHOR43
+.L1630:
+	cbnz	w21, .L1633
+	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	ldr	x23, [sp, 48]
-	ldp	x29, x30, [sp], 64
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
 	ret
-	.size	ftl_prog_page, .-ftl_prog_page
-	.section	.text.ftl_info_flush,"ax",@progbits
-	.align	2
-	.global	ftl_info_flush
-	.type	ftl_info_flush, %function
-ftl_info_flush:
-	stp	x29, x30, [sp, -112]!
+.L1629:
+	ldrb	w25, [x19]
+	ldr	w26, [x19, 40]
+.L1626:
 	mov	w1, 0
-	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR45
-	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR131
-	ldrb	w2, [x21, #:lo12:.LANCHOR45]
-	mov	x23, x22
-	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR75
-	stp	x27, x28, [sp, 80]
-	mov	w26, 0
-	stp	x19, x20, [sp, 16]
-	lsl	w2, w2, 1
-	adrp	x20, .LANCHOR130
-	str	w0, [x29, 108]
-	mov	x24, x25
-	add	x27, x22, :lo12:.LANCHOR131
-	add	x28, x25, :lo12:.LANCHOR75
-	add	x0, x20, :lo12:.LANCHOR130
-	bl	ftl_memset
-.L1542:
-	add	x0, x22, :lo12:.LANCHOR131
-	ldr	w1, [x29, 108]
-	ldrb	w6, [x22, #:lo12:.LANCHOR131]
-	ldrh	w19, [x25, #:lo12:.LANCHOR75]
-	ldrh	w4, [x0, 2]
-	adrp	x0, .LANCHOR46
-	ldr	x0, [x0, #:lo12:.LANCHOR46]
-	ldr	w3, [x0, 4]
-	add	w3, w3, 1
-	str	w3, [x0, 4]
-	add	x0, x20, :lo12:.LANCHOR130
-	str	w1, [x20, #:lo12:.LANCHOR130]
-	str	w3, [x0, 4]
-	adrp	x0, .LANCHOR22
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	tbz	x0, 12, .L1543
-	mov	w2, w4
-	mov	w1, w6
-	stp	w4, w6, [x29, 100]
-	adrp	x0, .LC64
-	add	x0, x0, :lo12:.LC64
-	bl	printf
-	ldp	w4, w6, [x29, 100]
-.L1543:
-	adrp	x1, .LANCHOR79
-	ldrh	w0, [x27, 2]
-	ldrh	w1, [x1, #:lo12:.LANCHOR79]
-	cmp	w1, w0
-	bhi	.L1544
-	adrp	x1, .LANCHOR5
-	ldrb	w0, [x27, 1]
-	ldrb	w2, [x27]
-	mov	w4, 0
-	ldr	x6, [x1, #:lo12:.LANCHOR5]
-.L1551:
-	add	w0, w0, 1
-	and	w0, w0, 255
-	cmp	w0, 7
-	bls	.L1545
-	mov	x1, 0
-.L1550:
-	add	x3, x6, x1
-	and	w7, w1, 65535
-	ldrb	w8, [x3, 40]
-	add	w3, w8, 127
-	and	w3, w3, 255
-	cmp	w3, 125
-	bhi	.L1546
-	add	x1, x23, :lo12:.LANCHOR131
-	strb	w0, [x1, 1]
-	cbz	w4, .L1547
-	strb	w2, [x23, #:lo12:.LANCHOR131]
-.L1547:
-	adrp	x1, .LANCHOR132
-	adrp	x0, .LC0
-	mov	w2, 156
-	add	x1, x1, :lo12:.LANCHOR132
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1548:
-	b	.L1548
-.L1546:
-	cmp	w8, 255
-	bne	.L1549
-	add	x1, x1, 1
-	cmp	x1, 8
-	bne	.L1550
-	mov	w7, w1
-.L1549:
-	and	w0, w7, 255
-	mov	w26, 1
-.L1545:
-	add	w1, w0, 8
-	mov	w4, 1
-	add	x1, x6, x1, sxtw
-	ldrb	w2, [x1, 32]
-	cmp	w2, 255
-	beq	.L1551
-	ldrh	w19, [x28]
-	strb	w0, [x27, 1]
-	mov	w0, 0
-	strb	w2, [x27]
-	mul	w19, w19, w2
-	mov	w1, w19
-	bl	flash_erase_block
-	ldrb	w4, [x21, #:lo12:.LANCHOR45]
-	mov	w1, w19
-	add	x3, x20, :lo12:.LANCHOR130
-	adrp	x2, ftl_info_data_buffer
-	mov	w0, 0
-	add	x2, x2, :lo12:ftl_info_data_buffer
-	bl	ftl_prog_page
+	mov	w0, w26
+	bl	queue_lun_state
+	cbnz	w0, .L1627
+	ldr	w1, [x19, 40]
+	mov	w0, 48
+	bl	flash_start_page_read
+	strb	wzr, [x19, 59]
 	mov	w0, 1
-	add	w19, w19, w0
-	strh	w0, [x27, 2]
-.L1552:
-	ldrb	w4, [x21, #:lo12:.LANCHOR45]
-	mov	w1, w19
-	add	x3, x20, :lo12:.LANCHOR130
-	adrp	x2, ftl_info_data_buffer
-	mov	w0, 0
-	add	x2, x2, :lo12:ftl_info_data_buffer
-	bl	ftl_prog_page
-	cmn	w0, #1
-	ldrh	w1, [x27, 2]
-	add	w1, w1, 1
-	strh	w1, [x27, 2]
-	beq	.L1542
-	cbnz	w26, .L1553
-.L1561:
-	ldrb	w0, [x23, #:lo12:.LANCHOR131]
-	cmp	w0, 255
-	bne	.L1577
-	adrp	x1, .LANCHOR132
+	strb	w0, [x19, 58]
+	mov	w0, -1
+	strb	w0, [x19]
+	mov	x1, x19
+	mov	x0, x23
+	bl	buf_add_tail
+	subs	w22, w22, #1
+	beq	.L1637
+	ubfiz	x19, x25, 6, 8
+	add	x19, x24, x19
+	b	.L1625
+.L1627:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L1626
+.L1633:
+	ldrb	w0, [x20, 58]
+	cmp	w0, 12
+	bne	.L1631
+	ldrb	w20, [x20]
+	sub	w21, w21, #1
+	add	x20, x19, x20, lsl 6
+	b	.L1630
+.L1631:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L1630
+	.size	sblk_read_page, .-sblk_read_page
+	.section	.text.gc_check_data_one_wl,"ax",@progbits
+	.align	2
+	.global	gc_check_data_one_wl
+	.type	gc_check_data_one_wl, %function
+gc_check_data_one_wl:
+	sub	sp, sp, #112
+	adrp	x0, .LANCHOR5
+	stp	x29, x30, [sp, 16]
+	add	x29, sp, 16
+	stp	x19, x20, [sp, 32]
+	adrp	x19, .LANCHOR63
+	stp	x21, x22, [sp, 48]
+	add	x21, x19, :lo12:.LANCHOR63
+	ldr	x20, [x0, #:lo12:.LANCHOR5]
+	stp	x23, x24, [sp, 64]
+	ldr	x0, [x21, 8]
+	stp	x25, x26, [sp, 80]
+	str	x27, [sp, 96]
+	cbnz	x0, .L1640
+	mov	w0, 1
+	bl	buf_alloc
+	str	x0, [x21, 8]
+.L1640:
+	add	x0, x19, :lo12:.LANCHOR63
+	ldr	x21, [x0, 8]
+	cbz	x21, .L1641
+	adrp	x26, .LANCHOR99
+	adrp	x27, .LANCHOR67
+	add	x25, x20, 96
+	add	x26, x26, :lo12:.LANCHOR99
+	add	x27, x27, :lo12:.LANCHOR67
+	mov	w24, 0
+.L1642:
+	ldrb	w0, [x20, 89]
+	cmp	w24, w0
+	bge	.L1652
+	mov	w23, 1
+	add	x22, x19, :lo12:.LANCHOR63
+	b	.L1653
+.L1641:
+	adrp	x1, .LANCHOR146
 	adrp	x0, .LC0
-	mov	w2, 191
-	add	x1, x1, :lo12:.LANCHOR132
+	mov	w2, 348
+	add	x1, x1, :lo12:.LANCHOR146
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1562:
-	b	.L1562
-.L1544:
-	madd	w19, w19, w6, w4
-	cbnz	w0, .L1552
-	mov	w1, w19
-	bl	flash_erase_block
-	b	.L1552
-.L1553:
-	ldrb	w19, [x27, 1]
-	add	x24, x24, :lo12:.LANCHOR75
-	adrp	x20, .LANCHOR5
-	add	w19, w19, 1
-.L1556:
-	cmp	w19, 7
-	bhi	.L1561
-	ldr	x1, [x20, #:lo12:.LANCHOR5]
-	add	w0, w19, 8
-	add	x0, x1, x0, sxtw
-	ldrb	w0, [x0, 32]
-	add	w1, w0, 127
-	and	w1, w1, 255
-	cmp	w1, 125
-	bhi	.L1557
-	adrp	x1, .LANCHOR132
-	adrp	x0, .LC0
-	mov	w2, 184
-	add	x1, x1, :lo12:.LANCHOR132
-	add	x0, x0, :lo12:.LC0
+.L1643:
+	b	.L1643
+.L1651:
+	ldrh	w0, [x25]
+	ldrh	w1, [x26]
+	ldrb	w2, [x27]
+	cmp	w2, 3
+	mul	w1, w0, w1
+	ldrh	w0, [x22, 16]
+	bne	.L1644
+	add	w0, w0, w1
+	orr	w0, w0, w23, lsl 24
+.L1664:
+	str	w0, [x21, 40]
+	mov	w1, 1
+	mov	x0, x21
+	bl	sblk_read_page
+	ldr	w2, [x21, 52]
+	adrp	x1, .LANCHOR131
+	cmn	w2, #1
+	beq	.L1647
+	ldrh	w0, [x22, 22]
+	ldr	x4, [x1, #:lo12:.LANCHOR131]
+	ldr	x3, [x21, 24]
+	lsl	x0, x0, 2
+	ldr	w5, [x4, x0]
+	ldr	w4, [x3, 4]
+	cmp	w5, w4
+	bne	.L1647
+	adrp	x4, .LANCHOR132
+	ldr	x4, [x4, #:lo12:.LANCHOR132]
+	ldr	w4, [x4, x0]
+	ldr	w0, [x3, 8]
+	cmp	w4, w0
+	beq	.L1648
+.L1647:
+	ldrh	w0, [x22, 22]
+	ldr	x1, [x1, #:lo12:.LANCHOR131]
+	lsl	x0, x0, 2
+	ldr	w3, [x1, x0]
+	cmn	w3, #1
+	beq	.L1648
+	adrp	x1, .LANCHOR29
+	ldr	w1, [x1, #:lo12:.LANCHOR29]
+	tbz	x1, 10, .L1649
+	ldr	x1, [x21, 24]
+	adrp	x4, .LANCHOR132
+	ldr	x4, [x4, #:lo12:.LANCHOR132]
+	ldr	w5, [x1, 12]
+	str	w5, [sp]
+	ldr	w4, [x4, x0]
+	adrp	x0, .LC65
+	ldp	w5, w6, [x1]
+	add	x0, x0, :lo12:.LC65
+	ldr	w7, [x1, 8]
+	ldr	w1, [x21, 40]
 	bl	printf
-.L1558:
-	b	.L1558
-.L1557:
-	cmp	w0, 255
-	beq	.L1559
-	ldrh	w1, [x24]
-	mul	w1, w1, w0
-	mov	w0, 0
-	bl	flash_erase_block
-.L1559:
-	add	w19, w19, 1
-	and	w19, w19, 65535
-	b	.L1556
-.L1577:
-	ldp	x19, x20, [sp, 16]
-	mov	w0, 0
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 112
+.L1649:
+	adrp	x0, .LANCHOR4
+	ldrh	w1, [x20, 80]
+	ldr	x0, [x0, #:lo12:.LANCHOR4]
+	strh	wzr, [x0, x1, lsl 1]
+	mov	w0, -1
+.L1639:
+	ldp	x19, x20, [sp, 32]
+	ldp	x21, x22, [sp, 48]
+	ldp	x23, x24, [sp, 64]
+	ldp	x25, x26, [sp, 80]
+	ldp	x29, x30, [sp, 16]
+	ldr	x27, [sp, 96]
+	add	sp, sp, 112
 	ret
-	.size	ftl_info_flush, .-ftl_info_flush
-	.section	.text.ftl_info_blk_init,"ax",@progbits
-	.align	2
-	.global	ftl_info_blk_init
-	.type	ftl_info_blk_init, %function
-ftl_info_blk_init:
-	stp	x29, x30, [sp, -128]!
-	adrp	x0, .LANCHOR133
-	adrp	x1, .LANCHOR59
-	mov	w2, 16384
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x20, ftl_info_data_buffer
-	strb	wzr, [x0, #:lo12:.LANCHOR133]
-	add	x0, x20, :lo12:ftl_info_data_buffer
-	str	x0, [x1, #:lo12:.LANCHOR59]
-	adrp	x1, .LANCHOR54
-	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR46
-	ldrh	w1, [x1, #:lo12:.LANCHOR54]
-	adrp	x21, .LANCHOR131
-	stp	x25, x26, [sp, 64]
-	adrp	x26, .LANCHOR75
-	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR5
-	add	x1, x0, x1, lsl 2
-	stp	x27, x28, [sp, 80]
-	str	x1, [x22, #:lo12:.LANCHOR46]
-	mov	w1, 0
-	bl	ftl_memset
-	adrp	x25, .LANCHOR45
-	mov	w1, 0
-	mov	w2, 16384
-	adrp	x0, ftl_ext_info_data_buffer
-	add	x0, x0, :lo12:ftl_ext_info_data_buffer
-	bl	ftl_memset
-	mov	w27, 21574
-	ldr	x1, [x23, #:lo12:.LANCHOR5]
-	add	x0, x21, :lo12:.LANCHOR131
-	add	x26, x26, :lo12:.LANCHOR75
-	add	x25, x25, :lo12:.LANCHOR45
-	mov	x19, 7
-	movk	w27, 0x494c, lsl 16
-	strb	wzr, [x0, 1]
-	ldrb	w1, [x1, 40]
-	strb	w1, [x21, #:lo12:.LANCHOR131]
-	strh	wzr, [x0, 2]
-.L1581:
-	ldr	x1, [x23, #:lo12:.LANCHOR5]
-	add	w0, w19, 8
-	sxth	w24, w19
-	mov	w28, w19
-	add	x0, x1, x0, sxtw
-	ldrb	w0, [x0, 32]
-	cmp	w0, 255
-	bne	.L1580
-.L1585:
-	sub	x19, x19, #1
-	cmn	x19, #1
-	bne	.L1581
-	mov	w24, 0
-.L1582:
-	adrp	x0, .LANCHOR22
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	tbz	x0, 12, .L1586
-	ldr	x0, [x22, #:lo12:.LANCHOR46]
-	mov	w2, 4800
-	mov	w1, w19
-	ldr	w3, [x0]
+.L1644:
+	cmp	w2, 2
+	bne	.L1646
+	sub	w0, w0, #1
+	add	w1, w23, w1
+	add	w0, w0, w1
+	orr	w0, w0, 33554432
+	b	.L1664
+.L1646:
+	add	w0, w0, w1
+	b	.L1664
+.L1648:
+	ldrh	w0, [x22, 22]
+	add	w23, w23, 1
+	add	w0, w0, 1
+	strh	w0, [x22, 22]
+.L1653:
+	ldrh	w0, [x22, 20]
+	cmp	w23, w0
+	ble	.L1651
+	add	w24, w24, 1
+	add	x25, x25, 2
+	b	.L1642
+.L1652:
+.L1650:
+	add	x19, x19, :lo12:.LANCHOR63
+	ldrh	w0, [x19, 16]
+	add	w0, w0, 1
+	strh	w0, [x19, 16]
+	mov	w0, 0
+	b	.L1639
+	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
+	.section	.text.flash_prog_page,"ax",@progbits
+	.align	2
+	.global	flash_prog_page
+	.type	flash_prog_page, %function
+flash_prog_page:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w20, w0, 255
+	adrp	x0, .LANCHOR13
+	stp	x23, x24, [sp, 48]
+	stp	x21, x22, [sp, 32]
+	and	x19, x20, 255
+	ldr	x24, [x0, #:lo12:.LANCHOR13]
+	adrp	x0, .LANCHOR29
+	stp	x25, x26, [sp, 64]
+	mov	w21, w1
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	add	x22, x19, 8
+	str	x27, [sp, 80]
+	mov	x25, x2
+	mov	x26, x3
+	add	x22, x24, x22, lsl 8
+	and	w23, w1, 2097151
+	ubfx	x27, x21, 24, 2
+	tbz	x0, 4, .L1666
 	adrp	x0, .LC66
+	mov	w3, w4
+	mov	w2, w27
 	add	x0, x0, :lo12:.LC66
 	bl	printf
-.L1586:
-	cmn	w19, #1
-	bne	.L1587
-	mov	w1, 0
-	mov	w2, 16384
-	add	x0, x20, :lo12:ftl_info_data_buffer
-	bl	ftl_memset
-	ldr	x0, [x22, #:lo12:.LANCHOR46]
-	mov	w1, 21574
-	movk	w1, 0x494c, lsl 16
-	str	w1, [x0]
-	mov	w0, w19
-.L1579:
+.L1666:
+	bl	nandc_wait_flash_ready
+	mov	w0, w20
+	bl	hynix_reconfig_rr_para
+	mov	w0, w20
+	bl	nandc_cs
+	mov	w0, w20
+	cbnz	w27, .L1667
+	bl	zftl_flash_enter_slc_mode
+.L1668:
+	add	x19, x24, x19, lsl 8
+	mov	w0, 128
+	and	w21, w21, 255
+	str	w0, [x19, 2056]
+	lsr	w0, w23, 8
+	str	wzr, [x19, 2052]
+	str	wzr, [x19, 2052]
+	str	w21, [x19, 2052]
+	str	w0, [x19, 2052]
+	lsr	w0, w23, 16
+	str	w0, [x19, 2052]
+	mov	w0, w23
+	bl	nandc_set_seed
+	adrp	x0, .LANCHOR26+9
+	mov	x3, x26
+	mov	x2, x25
+	ldrb	w1, [x0, #:lo12:.LANCHOR26+9]
+	mov	w0, 1
+	bl	nandc_xfer_start
+	bl	nandc_xfer_done
+	mov	w0, 16
+	str	w0, [x19, 2056]
+	bl	nandc_wait_flash_ready
+	mov	x0, x22
+	bl	flash_read_status
+	mov	w2, w0
+	mov	w0, w20
+	bl	nandc_de_cs
+	ldr	x27, [sp, 80]
+	and	w0, w2, 4
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 128
+	ldp	x29, x30, [sp], 96
 	ret
-.L1580:
-	ldrh	w6, [x26]
-	add	x8, x20, :lo12:ftl_info_data_buffer
-	ldrb	w4, [x25]
-	adrp	x7, .LANCHOR130
-	add	x7, x7, :lo12:.LANCHOR130
-	mov	x2, x8
-	mov	x3, x7
-	stp	x7, x8, [x29, 104]
-	mul	w6, w6, w0
-	mov	w0, 0
-	str	w6, [x29, 124]
-	mov	w1, w6
-	bl	ftl_read_page
-	mov	w5, w0
-	cmn	w0, #1
-	ldr	w6, [x29, 124]
-	ldp	x7, x8, [x29, 104]
-	bne	.L1583
-	ldrb	w4, [x25]
-	mov	x3, x7
-	mov	x2, x8
-	add	w1, w6, 1
-	mov	w0, 0
-	bl	ftl_read_page
-	mov	w5, w0
-.L1583:
-	adrp	x0, .LANCHOR22
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	tbz	x0, 12, .L1584
-	ldr	x0, [x22, #:lo12:.LANCHOR46]
-	mov	w2, w5
-	str	w5, [x29, 124]
-	mov	w3, 64
-	mov	w1, w28
-	ldr	w4, [x0]
-	adrp	x0, .LC65
-	add	x0, x0, :lo12:.LC65
-	bl	printf
-	ldr	w5, [x29, 124]
-.L1584:
-	cmn	w5, #1
-	beq	.L1585
-	ldr	x0, [x22, #:lo12:.LANCHOR46]
-	ldr	w0, [x0]
-	cmp	w0, w27
-	bne	.L1585
-	mov	w19, w24
-	b	.L1582
-.L1587:
-	ldr	x1, [x23, #:lo12:.LANCHOR5]
-	add	w0, w24, 8
-	add	x20, x20, :lo12:ftl_info_data_buffer
-	mov	w4, 4
-	mov	x2, x20
-	adrp	x26, .LANCHOR45
-	add	x0, x1, x0, sxtw
-	mov	w27, 21574
-	add	x26, x26, :lo12:.LANCHOR45
-	movk	w27, 0x494c, lsl 16
-	ldrb	w1, [x0, 32]
-	add	x0, x21, :lo12:.LANCHOR131
-	strb	w1, [x21, #:lo12:.LANCHOR131]
-	strb	w24, [x0, 1]
-	adrp	x24, .LANCHOR130
-	add	x24, x24, :lo12:.LANCHOR130
-	mov	w0, 0
-	mov	x3, x24
-	bl	flash_get_last_written_page
-	sxth	w23, w0
-	add	w0, w0, 1
-	and	w19, w0, 65535
-	adrp	x0, .LANCHOR75
-	ldrb	w25, [x21, #:lo12:.LANCHOR131]
-	ldrh	w0, [x0, #:lo12:.LANCHOR75]
-	madd	w25, w25, w0, w23
-.L1589:
-	tbnz	w23, #31, .L1594
-	ldrb	w4, [x26]
-	mov	x3, x24
-	mov	x2, x20
-	mov	w1, w25
-	mov	w0, 0
-	bl	ftl_read_page
-	cmn	w0, #1
-	beq	.L1590
-	ldr	x0, [x22, #:lo12:.LANCHOR46]
-	ldr	w0, [x0]
-	cmp	w0, w27
-	bne	.L1590
-.L1594:
-	ldr	x0, [x22, #:lo12:.LANCHOR46]
-	add	x21, x21, :lo12:.LANCHOR131
-	strh	w19, [x21, 2]
-	ldr	w1, [x0, 16]
-	cmp	w1, 2048
-	bhi	.L1591
-.L1592:
-	ldr	w1, [x0, 24]
-	cmp	w1, 2048
-	bls	.L1595
-	ldr	w2, [x0, 28]
-	add	w2, w2, w1, lsr 11
-	and	w1, w1, 2047
-	stp	w1, w2, [x0, 24]
-.L1595:
-	ldr	w1, [x0, 32]
-	cmp	w1, 1024
-	bls	.L1596
-	ldr	w2, [x0, 36]
-	add	w2, w2, w1, lsr 10
-	and	w1, w1, 1023
-	stp	w1, w2, [x0, 32]
-.L1596:
-	ldr	w1, [x0, 40]
-	cmp	w1, 1024
-	bls	.L1597
-	ldr	w2, [x0, 44]
-	add	w2, w2, w1, lsr 10
-	and	w1, w1, 1023
-	stp	w1, w2, [x0, 40]
-.L1597:
-	ldr	w1, [x0, 64]
-	add	w1, w1, 1
-	str	w1, [x0, 64]
-	mov	w0, 0
-	bl	ftl_info_flush
-	mov	w0, 0
-	bl	ftl_info_flush
-	mov	w0, 0
-	b	.L1579
-.L1590:
-	sub	w23, w23, #1
-	sub	w25, w25, #1
-	sxth	w23, w23
-	b	.L1589
-.L1591:
-	ldr	w2, [x0, 20]
-	add	w2, w2, w1, lsr 11
-	and	w1, w1, 2047
-	stp	w1, w2, [x0, 16]
-	b	.L1592
-	.size	ftl_info_blk_init, .-ftl_info_blk_init
-	.section	.text.ftl_ext_info_flush,"ax",@progbits
+.L1667:
+	bl	zftl_flash_exit_slc_mode
+	b	.L1668
+	.size	flash_prog_page, .-flash_prog_page
+	.section	.text.flash_test_blk,"ax",@progbits
 	.align	2
-	.global	ftl_ext_info_flush
-	.type	ftl_ext_info_flush, %function
-ftl_ext_info_flush:
-	stp	x29, x30, [sp, -96]!
-	adrp	x0, .LANCHOR60
+	.global	flash_test_blk
+	.type	flash_test_blk, %function
+flash_test_blk:
+	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR60]
 	stp	x19, x20, [sp, 16]
+	and	w19, w1, 65535
 	stp	x21, x22, [sp, 32]
-	stp	x23, x24, [sp, 48]
-	ldr	w1, [x0, 520]
-	stp	x25, x26, [sp, 64]
-	str	x27, [sp, 80]
-	cbz	w1, .L1613
-	str	wzr, [x0, 520]
-.L1613:
-	adrp	x24, .LANCHOR46
-	adrp	x20, .LANCHOR79
-	adrp	x21, .LANCHOR71
-	add	x20, x20, :lo12:.LANCHOR79
-	mov	x22, x24
-	add	x21, x21, :lo12:.LANCHOR71
-	mov	w0, 0
-	bl	ftl_total_vpn_update
-.L1622:
-	ldr	x0, [x24, #:lo12:.LANCHOR46]
-	ldr	w1, [x0, 56]
-	add	w1, w1, 1
-	str	w1, [x0, 56]
-	ldrh	w1, [x0, 140]
-	ldrh	w0, [x20]
-	cmp	w1, w0
-	bcc	.L1614
-	bl	ftl_ext_alloc_new_blk
-.L1614:
-	ldr	x2, [x22, #:lo12:.LANCHOR46]
-	mov	w0, 65535
-	ldrh	w1, [x2, 130]
-	cmp	w1, w0
-	bne	.L1615
-	adrp	x1, .LANCHOR134
-	adrp	x0, .LC0
-	mov	w2, 1048
-	add	x1, x1, :lo12:.LANCHOR134
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1616:
-	b	.L1616
-.L1615:
-	ldrh	w0, [x21]
-	mov	w19, 21
-	adrp	x25, .LANCHOR45
-	adrp	x26, .LANCHOR130
-	sub	w0, w19, w0
-	mov	w19, 1
-	add	x23, x26, :lo12:.LANCHOR130
-	asr	w27, w1, w0
-	lsl	w19, w19, w0
-	adrp	x0, .LANCHOR75
-	sub	w19, w19, #1
-	and	w19, w19, w1
-	ldrh	w1, [x0, #:lo12:.LANCHOR75]
-	ldrh	w0, [x2, 140]
-	ldrb	w2, [x25, #:lo12:.LANCHOR45]
-	madd	w19, w19, w1, w0
-	lsl	w2, w2, 1
-	mov	w1, 0
-	mov	x0, x23
+	ands	w21, w0, 255
+	str	x23, [sp, 48]
+	bne	.L1674
+	adrp	x0, .LANCHOR147
+	ldrb	w0, [x0, #:lo12:.LANCHOR147]
+	cmp	w0, w19
+	bhi	.L1678
+.L1674:
+	adrp	x22, .LANCHOR142
+	adrp	x23, .LANCHOR143
+	mov	w2, 32
+	mov	w1, 165
+	ldr	x0, [x22, #:lo12:.LANCHOR142]
 	bl	ftl_memset
-	and	w19, w19, 65535
-	ldr	x0, [x22, #:lo12:.LANCHOR46]
-	mov	w1, w19
-	ldrb	w4, [x25, #:lo12:.LANCHOR45]
-	mov	x3, x23
-	str	wzr, [x26, #:lo12:.LANCHOR130]
-	adrp	x2, ftl_ext_info_data_buffer
-	add	x2, x2, :lo12:ftl_ext_info_data_buffer
-	ldr	w0, [x0, 56]
-	str	w0, [x23, 4]
-	mov	w0, w27
-	bl	ftl_prog_page
-	ldr	x2, [x22, #:lo12:.LANCHOR46]
-	ldrh	w1, [x2, 140]
-	add	w1, w1, 1
-	and	w1, w1, 65535
-	strh	w1, [x2, 140]
-	cmp	w1, 1
-	beq	.L1622
+	ldr	x0, [x23, #:lo12:.LANCHOR143]
+	mov	w2, 8
+	mov	w1, 90
+	bl	ftl_memset
+	adrp	x0, .LANCHOR20
+	ldrh	w20, [x0, #:lo12:.LANCHOR20]
+	mov	w0, w21
+	mul	w20, w20, w19
+	mov	w1, w20
+	bl	flash_erase_block
 	cmn	w0, #1
-	beq	.L1622
-	mov	w0, 0
-	ldr	x27, [sp, 80]
+	beq	.L1676
+	adrp	x19, .LANCHOR26
+	add	x19, x19, :lo12:.LANCHOR26
+	ldr	x3, [x22, #:lo12:.LANCHOR142]
+	mov	w1, w20
+	ldr	x2, [x23, #:lo12:.LANCHOR143]
+	mov	w0, w21
+	ldrb	w4, [x19, 9]
+	bl	flash_prog_page
+	cmn	w0, #1
+	beq	.L1676
+	ldrb	w4, [x19, 9]
+	mov	w1, w20
+	ldr	x3, [x22, #:lo12:.LANCHOR142]
+	mov	w0, w21
+	ldr	x2, [x23, #:lo12:.LANCHOR143]
+	bl	flash_read_page
+	mov	w19, w0
+	cmn	w0, #1
+	beq	.L1676
+	ldr	x0, [x23, #:lo12:.LANCHOR143]
+	ldr	w1, [x0]
+	mov	w0, 23130
+	movk	w0, 0x5a5a, lsl 16
+	cmp	w1, w0
+	bne	.L1676
+	ldr	x0, [x22, #:lo12:.LANCHOR142]
+	ldr	w1, [x0]
+	mov	w0, 42405
+	movk	w0, 0xa5a5, lsl 16
+	cmp	w1, w0
+	beq	.L1677
+.L1676:
+	mov	w19, -1
+.L1677:
+	mov	w1, w20
+	mov	w0, w21
+	bl	flash_erase_block
+	mov	w0, w19
+.L1673:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 96
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 64
 	ret
-	.size	ftl_ext_info_flush, .-ftl_ext_info_flush
-	.section	.text.ftl_ext_info_init,"ax",@progbits
+.L1678:
+	mov	w0, 0
+	b	.L1673
+	.size	flash_test_blk, .-flash_test_blk
+	.section	.text.flash_start_tlc_page_prog,"ax",@progbits
 	.align	2
-	.global	ftl_ext_info_init
-	.type	ftl_ext_info_init, %function
-ftl_ext_info_init:
-	stp	x29, x30, [sp, -112]!
-	adrp	x0, .LANCHOR86
-	mov	w4, 4
+	.global	flash_start_tlc_page_prog
+	.type	flash_start_tlc_page_prog, %function
+flash_start_tlc_page_prog:
+	stp	x29, x30, [sp, -48]!
+	and	w8, w0, 255
+	adrp	x0, .LANCHOR15
+	and	w3, w3, 255
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR46
-	strh	wzr, [x0, #:lo12:.LANCHOR86]
-	ldr	x0, [x22, #:lo12:.LANCHOR46]
 	stp	x19, x20, [sp, 16]
-	stp	x25, x26, [sp, 64]
-	adrp	x25, ftl_ext_info_data_buffer
-	stp	x23, x24, [sp, 48]
-	add	x2, x25, :lo12:ftl_ext_info_data_buffer
-	ldrh	w19, [x0, 130]
-	adrp	x0, .LANCHOR71
-	stp	x27, x28, [sp, 80]
-	adrp	x24, .LANCHOR130
-	ldrh	w1, [x0, #:lo12:.LANCHOR71]
-	mov	w0, 21
-	and	w26, w19, 16383
-	add	x3, x24, :lo12:.LANCHOR130
-	sub	w0, w0, w1
-	mov	w1, w26
-	asr	w19, w19, w0
-	and	w19, w19, 255
-	mov	w0, w19
-	bl	flash_get_last_written_page
-	sxth	w21, w0
-	adrp	x0, .LANCHOR22
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	tbz	x0, 12, .L1628
-	adrp	x1, .LANCHOR135
-	adrp	x0, .LC28
-	mov	w3, w21
-	mov	w2, 1091
-	add	x1, x1, :lo12:.LANCHOR135
-	add	x0, x0, :lo12:.LC28
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	str	x21, [sp, 32]
+	cmp	w0, w3
+	bhi	.L1690
+	adrp	x1, .LANCHOR148
+	adrp	x0, .LC0
+	mov	w2, 671
+	add	x1, x1, :lo12:.LANCHOR148
+	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1628:
-	adrp	x27, .LANCHOR45
-	adrp	x28, .LANCHOR75
-	mov	w5, 20038
-	add	x27, x27, :lo12:.LANCHOR45
-	add	x28, x28, :lo12:.LANCHOR75
-	mov	w23, 0
-	movk	w5, 0x4549, lsl 16
-.L1629:
-	and	w20, w21, 65535
-	sub	w0, w20, w23
-	tbnz	x0, 15, .L1634
-	ldrh	w0, [x28]
-	sub	w1, w21, w23
-	ldrb	w4, [x27]
-	add	x3, x24, :lo12:.LANCHOR130
-	str	w5, [x29, 108]
-	add	x2, x25, :lo12:ftl_ext_info_data_buffer
-	madd	w1, w0, w26, w1
-	mov	w0, w19
-	bl	flash_read_page_en
-	cmp	w0, 512
-	ccmn	w0, #1, 4, ne
-	ldr	w5, [x29, 108]
-	beq	.L1630
-	adrp	x0, .LANCHOR60
-	ldr	x0, [x0, #:lo12:.LANCHOR60]
-	ldr	w0, [x0]
-	cmp	w0, w5
-	bne	.L1630
-.L1634:
-	ldr	x0, [x22, #:lo12:.LANCHOR46]
-	ldrh	w1, [x0, 140]
-	cmp	w1, w21
-	bgt	.L1632
-	add	w20, w20, 1
-	strh	w20, [x0, 140]
-	bl	ftl_ext_info_flush
-.L1632:
-	adrp	x0, .LANCHOR60
-	mov	w1, -1
+.L1691:
+	b	.L1691
+.L1690:
+	adrp	x0, .LANCHOR17
+	add	x0, x0, :lo12:.LANCHOR17
+	and	w7, w1, 255
+	and	w21, w2, 255
+	ldrb	w20, [x0, w3, sxtw]
+	adrp	x0, .LANCHOR13
+	ldr	x19, [x0, #:lo12:.LANCHOR13]
+	mov	w0, w20
+	bl	nandc_cs
+	cbz	w8, .L1692
+	sxtw	x0, w20
+	add	x0, x0, 8
+	add	x0, x19, x0, lsl 8
+	str	w8, [x0, 8]
+.L1692:
+	ubfiz	x0, x20, 8, 8
+	add	x19, x19, x0
+	mov	w0, 128
+	str	w7, [x19, 2056]
+	str	w0, [x19, 2056]
+	and	w0, w4, 255
+	str	wzr, [x19, 2052]
+	str	wzr, [x19, 2052]
+	str	w0, [x19, 2052]
+	lsr	w0, w4, 8
+	str	w0, [x19, 2052]
+	lsr	w0, w4, 16
+	add	w4, w4, w4, lsl 1
+	str	w0, [x19, 2052]
+	sub	w0, w4, #1
+	add	w0, w0, w7
+	bl	nandc_set_seed
+	mov	x3, x6
+	adrp	x0, .LANCHOR26+9
+	mov	x2, x5
+	ldrb	w1, [x0, #:lo12:.LANCHOR26+9]
+	mov	w0, 1
+	bl	nandc_xfer_start
+	bl	nandc_xfer_done
+	str	w21, [x19, 2056]
+	mov	w0, w20
+	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
-	ldr	x0, [x0, #:lo12:.LANCHOR60]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	str	wzr, [x0, 520]
-	adrp	x0, .LANCHOR87
-	strh	w1, [x0, #:lo12:.LANCHOR87]
-	mov	w0, 0
-	ldp	x29, x30, [sp], 112
-	ret
-.L1630:
-	add	w23, w23, 1
-	b	.L1629
-	.size	ftl_ext_info_init, .-ftl_ext_info_init
-	.section	.text.ftl_low_format,"ax",@progbits
+	ldp	x29, x30, [sp], 48
+	b	nandc_de_cs
+	.size	flash_start_tlc_page_prog, .-flash_start_tlc_page_prog
+	.section	.text.queue_tlc_prog_cmd,"ax",@progbits
 	.align	2
-	.global	ftl_low_format
-	.type	ftl_low_format, %function
-ftl_low_format:
-	stp	x29, x30, [sp, -80]!
+	.type	queue_tlc_prog_cmd, %function
+queue_tlc_prog_cmd:
+	stp	x29, x30, [sp, -48]!
+	mov	w2, 26
+	mov	w1, 1
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR75
-	stp	x21, x22, [sp, 32]
-	add	x20, x20, :lo12:.LANCHOR75
-	stp	x23, x24, [sp, 48]
-	adrp	x21, .LANCHOR5
-	mov	x24, x21
-	stp	x25, x26, [sp, 64]
-	mov	w19, 8
-.L1646:
-	ldr	x0, [x21, #:lo12:.LANCHOR5]
-	add	x0, x0, x19, sxtw
-	ldrb	w0, [x0, 32]
-	add	w1, w0, 127
-	and	w1, w1, 255
-	cmp	w1, 125
-	bhi	.L1643
-	adrp	x1, .LANCHOR136
-	adrp	x0, .LC0
-	mov	w2, 1228
-	add	x1, x1, :lo12:.LANCHOR136
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1644:
-	b	.L1644
-.L1643:
-	cmp	w0, 255
-	beq	.L1645
-	ldrh	w1, [x20]
-	mul	w1, w1, w0
-	mov	w0, 0
-	bl	flash_erase_block
-.L1645:
-	add	w19, w19, 1
-	cmp	w19, 16
-	bne	.L1646
-	bl	sblk_init
-	adrp	x19, .LANCHOR46
-	bl	ftl_info_blk_init
-	adrp	x20, .LANCHOR54
-	mov	w1, 0
-	mov	w2, 16384
-	adrp	x0, ftl_info_data_buffer
-	add	x0, x0, :lo12:ftl_info_data_buffer
-	bl	ftl_memset
-	add	x25, x20, :lo12:.LANCHOR54
-	ldr	x0, [x19, #:lo12:.LANCHOR46]
-	mov	w1, 21574
-	movk	w1, 0x494c, lsl 16
-	mov	w21, 0
-	mov	w26, 1
-	str	w1, [x0]
-.L1647:
-	ldrh	w0, [x25]
-	adrp	x22, .LANCHOR70
-	adrp	x23, .LANCHOR59
-	cmp	w0, w21
-	bhi	.L1655
-	adrp	x21, .LANCHOR60
-	mov	w1, 0
-	mov	w2, 16384
-	adrp	x0, ftl_ext_info_data_buffer
-	add	x0, x0, :lo12:ftl_ext_info_data_buffer
-	bl	ftl_memset
-	ldr	x0, [x21, #:lo12:.LANCHOR60]
-	mov	w1, 20038
-	movk	w1, 0x4549, lsl 16
-	mov	w3, 3
-	str	w1, [x0]
-	ldr	x0, [x24, #:lo12:.LANCHOR5]
-	ldrb	w5, [x22, #:lo12:.LANCHOR70]
-	ldr	x1, [x23, #:lo12:.LANCHOR59]
-	cmp	w5, 1
-	ldrb	w0, [x0, 47]
-	csinc	w3, w3, wzr, ne
-	and	w3, w3, 255
-	udiv	w0, w0, w5
-	add	w24, w0, 1
-	ubfiz	x0, x0, 2, 8
-	add	x0, x0, 4
-	add	x0, x1, x0
-.L1656:
-	ldrb	w2, [x1, 2]
-	add	x1, x1, 4
-	strb	w3, [x1, -1]
-	orr	w2, w2, -32
-	and	w2, w2, -25
-	strb	w2, [x1, -2]
-	cmp	x1, x0
-	bne	.L1656
-	mov	w4, 16
-	ldr	x0, [x19, #:lo12:.LANCHOR46]
-	sdiv	w4, w4, w5
-	add	w4, w24, w4
-	and	w4, w4, 65535
-	strh	w4, [x0, 134]
-	adrp	x0, .LANCHOR22
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	tbz	x0, 12, .L1657
-	adrp	x0, .LC67
-	mov	w3, w24
-	mov	w2, 128
-	mov	w1, 1265
-	add	x0, x0, :lo12:.LC67
-	bl	printf
-.L1657:
-	ldr	x0, [x19, #:lo12:.LANCHOR46]
-	mov	w2, 128
-	mov	w1, 255
-	add	x0, x0, 160
-	bl	ftl_memset
-	ldrb	w11, [x22, #:lo12:.LANCHOR70]
-	adrp	x0, .LANCHOR76
-	adrp	x22, .LANCHOR71
-	ldr	x3, [x19, #:lo12:.LANCHOR46]
-	and	w13, w11, 65535
-	ldrb	w12, [x0, #:lo12:.LANCHOR76]
-	ldrh	w0, [x22, #:lo12:.LANCHOR71]
-	mov	w5, 21
-	ldr	x2, [x23, #:lo12:.LANCHOR59]
-	mov	w4, 0
-	sub	w0, w5, w0
-	mul	w1, w24, w13
-	mov	w5, 1
-	ldrh	w7, [x3, 134]
-	lsl	w5, w5, w0
-	and	w1, w1, 65535
-	and	w5, w5, 65535
-.L1658:
-	cmp	w24, w7
-	bcc	.L1664
-	ldrh	w5, [x20, #:lo12:.LANCHOR54]
-	add	x0, x2, x7, uxth 2
-	mov	w1, w7
-	mov	w6, 1
-.L1665:
-	cmp	w1, w5
-	bcc	.L1666
-	sub	w5, w5, w7
-	strh	w4, [x3, 112]
-	strh	w5, [x3, 116]
-	mov	w0, 1
-	strh	wzr, [x3, 114]
-	strh	wzr, [x3, 118]
-	bl	ftl_alloc_sblk
-	mov	w23, w0
-	mov	w1, 0
-	bl	ftl_erase_sblk
-	ldr	x1, [x19, #:lo12:.LANCHOR46]
-	mov	w0, w23
-	add	x1, x1, 672
-	bl	ftl_get_blk_list_in_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR46]
-	mov	w1, 65533
-	ldrh	w20, [x0, 672]
-	strh	wzr, [x0, 690]
-	sub	w2, w20, #1
-	cmp	w1, w2, uxth
-	bcs	.L1667
-	adrp	x1, .LANCHOR136
-	adrp	x0, .LC0
-	mov	w2, 1297
-	add	x1, x1, :lo12:.LANCHOR136
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1668:
-	b	.L1668
-.L1655:
-	adrp	x0, .LANCHOR53
-	strh	w21, [x0, #:lo12:.LANCHOR53]
-	mov	w0, w21
-	bl	ftl_test_block
-	ldrb	w11, [x22, #:lo12:.LANCHOR70]
-	adrp	x0, .LANCHOR76
-	ldr	x6, [x23, #:lo12:.LANCHOR59]
-	mov	w8, 0
-	ldrb	w13, [x0, #:lo12:.LANCHOR76]
-	mov	w7, 1
-	mov	w10, 0
-	mul	w12, w21, w11
-	add	x6, x6, x21, uxth 2
-	add	w13, w13, 1
-.L1648:
-	cmp	w7, w13
-	beq	.L1652
-	add	w15, w11, w8
-	sub	w14, w7, #1
-	b	.L1653
-.L1651:
-	add	w1, w8, w12
-	mov	w0, w14
-	bl	flash_check_bad_block
-	cbz	w0, .L1649
-	ldrb	w1, [x6, 3]
-	lsl	w0, w26, w8
-	orr	w0, w0, w1
-	strb	w0, [x6, 3]
-.L1650:
-	add	w8, w8, 1
-.L1653:
-	cmp	w8, w15
-	bne	.L1651
-	add	w7, w7, 1
-	sub	w12, w12, w11
-	and	w7, w7, 65535
-	b	.L1648
-.L1649:
-	add	w10, w10, 1
-	and	w10, w10, 65535
-	b	.L1650
-.L1652:
-	cbnz	w10, .L1654
-	ldrb	w0, [x6, 2]
-	orr	w0, w0, -32
-	strb	w0, [x6, 2]
-.L1654:
-	add	w21, w21, 1
-	and	w21, w21, 65535
-	b	.L1647
-.L1664:
-	add	x14, x2, x24, uxth 2
-	mov	w15, 0
-	mov	w16, 0
-	mov	w6, 0
-	ldrb	w0, [x14, 2]
-	orr	w0, w0, -32
-	and	w0, w0, -25
-	strb	w0, [x14, 2]
-.L1659:
-	cmp	w6, w12
-	bcc	.L1670
-	add	w24, w24, 1
-	add	w1, w13, w1
-	and	w24, w24, 65535
-	and	w1, w1, 65535
-	b	.L1658
-.L1662:
-	ldrb	w10, [x14, 3]
-	add	w17, w16, w8
-	asr	w10, w10, w17
-	tbnz	x10, 0, .L1660
-	cmp	w11, 1
-	bls	.L1669
-	and	w0, w0, 1
-	add	w0, w1, w0
-	and	w0, w0, 65535
-.L1661:
-	add	x10, x3, x4, sxtw 1
-	add	w4, w4, 1
-	and	w4, w4, 65535
-	add	w0, w0, w15
-	strh	w0, [x10, 160]
-.L1660:
-	add	x8, x8, 1
-.L1663:
-	and	w0, w8, 65535
-	cmp	w0, w13
-	bcc	.L1662
-	add	w6, w6, 1
-	add	w0, w5, w15
-	and	w6, w6, 65535
-	add	w16, w16, w11
-	and	w15, w0, 65535
-	b	.L1659
-.L1669:
-	mov	w0, w1
-	b	.L1661
-.L1670:
-	mov	x8, 0
-	b	.L1663
-.L1666:
-	ldrb	w2, [x0, 2]
-	add	w1, w1, 1
-	and	w1, w1, 65535
-	add	x0, x0, 4
-	and	w2, w2, 31
-	bfi	w2, w6, 3, 2
-	strb	w2, [x0, -2]
-	b	.L1665
-.L1667:
-	strh	wzr, [x0, 696]
-	mov	w2, 256
-	mov	w1, 255
-	add	x0, x0, 416
-	bl	ftl_memset
-	ldrh	w2, [x22, #:lo12:.LANCHOR71]
-	mov	w1, 21
-	ldr	x0, [x19, #:lo12:.LANCHOR46]
-	sub	w1, w1, w2
-	asr	w1, w20, w1
-	strh	w1, [x0, 694]
-	mov	w1, 1
-	strh	w1, [x0, 688]
-	adrp	x1, .LANCHOR137
-	strh	w20, [x0, 692]
-	ldrh	w1, [x1, #:lo12:.LANCHOR137]
-	strh	w23, [x0, 416]
-	strh	w1, [x0, 698]
-	bl	ftl_alloc_sys_blk
-	mov	w20, w0
-	mov	w1, 0
-	bl	ftl_erase_phy_blk
-	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	mov	x19, x0
+	ldr	x0, [x0]
+	ldr	w20, [x0, 40]
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	str	x21, [sp, 32]
+	and	w21, w20, 2097151
+	ubfx	x20, x20, 21, 3
+	mov	w4, w21
+	ldrb	w0, [x0, 60]
+	mov	w3, w20
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldp	x7, x0, [x19]
+	mov	w4, w21
+	mov	w3, w20
+	mov	w2, 26
 	mov	w1, 2
-	strh	w20, [x0, 130]
-	ldr	x0, [x21, #:lo12:.LANCHOR60]
-	add	x0, x0, 16
-	bl	ftl_open_sblk_init
-	ldr	x0, [x21, #:lo12:.LANCHOR60]
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x0, [x19, 16]
+	mov	w4, w21
+	ldr	x7, [x19]
+	mov	w3, w20
+	mov	w2, 16
 	mov	w1, 3
-	add	x0, x0, 48
-	bl	ftl_open_sblk_init
-	ldr	x1, [x19, #:lo12:.LANCHOR46]
-	ldr	x0, [x21, #:lo12:.LANCHOR60]
-	add	x0, x0, 136
-	ldrh	w2, [x1, 134]
-	strh	w2, [x0, -10]
-	mov	w2, -1
-	strh	wzr, [x0, -12]
-	strh	w2, [x0, -56]
-	strh	w2, [x0, -6]
-	mov	w2, -1
-	strh	wzr, [x0, -16]
-	str	w2, [x0, 408]
-	strh	wzr, [x0, -14]
-	strh	w2, [x1, 126]
-	mov	w2, 256
-	mov	w1, 255
-	bl	ftl_memset
-	ldr	x0, [x21, #:lo12:.LANCHOR60]
-	mov	w2, 128
-	mov	w1, 255
-	add	x0, x0, 392
-	bl	ftl_memset
-	bl	ftl_ext_info_flush
-	mov	w0, 0
-	bl	ftl_info_flush
-	bl	ftl_info_blk_init
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
+	ldr	x1, [x19]
+	mov	w0, 4
+	strb	w0, [x1, 58]
+	mov	w0, 1
+	strb	w0, [x1, 59]
+	mov	w0, -1
+	strb	w0, [x1]
+	adrp	x0, .LANCHOR114
+	add	x0, x0, :lo12:.LANCHOR114
+	ldp	x19, x20, [sp, 16]
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	b	buf_add_tail
+	.size	queue_tlc_prog_cmd, .-queue_tlc_prog_cmd
+	.section	.text.sblk_tlc_prog_one_page,"ax",@progbits
+	.align	2
+	.global	sblk_tlc_prog_one_page
+	.type	sblk_tlc_prog_one_page, %function
+sblk_tlc_prog_one_page:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	ldr	x0, [x0]
+	ldr	w20, [x0, 40]
+.L1700:
+	mov	w1, 1
+	mov	w0, w20
+	bl	queue_lun_state
+	cbnz	w0, .L1701
+	mov	x0, x19
+	bl	queue_tlc_prog_cmd
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
+	ldp	x29, x30, [sp], 32
 	ret
-	.size	ftl_low_format, .-ftl_low_format
-	.section	.text.ftl_re_low_format_test,"ax",@progbits
+.L1701:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L1700
+	.size	sblk_tlc_prog_one_page, .-sblk_tlc_prog_one_page
+	.section	.text.sblk_xlc_prog_pages,"ax",@progbits
 	.align	2
-	.global	ftl_re_low_format_test
-	.type	ftl_re_low_format_test, %function
-ftl_re_low_format_test:
-	stp	x29, x30, [sp, -48]!
-	mov	w1, 1
-	adrp	x0, .LC68
-	add	x0, x0, :lo12:.LC68
+	.global	sblk_xlc_prog_pages
+	.type	sblk_xlc_prog_pages, %function
+sblk_xlc_prog_pages:
+	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR46
+	mov	x19, x0
+	ldr	x0, [x0]
 	stp	x21, x22, [sp, 32]
-	bl	printf
-	bl	sblk_init
-	adrp	x21, .LANCHOR54
-	bl	ftl_info_blk_init
-	bl	ftl_ext_info_init
-	ldr	x0, [x19, #:lo12:.LANCHOR46]
-	adrp	x2, .LANCHOR59
-	ldrh	w7, [x21, #:lo12:.LANCHOR54]
-	mov	w3, 0
-	ldr	x2, [x2, #:lo12:.LANCHOR59]
-	mov	w4, 0
-	mov	w5, 0
-	ldrh	w1, [x0, 134]
-	add	x2, x2, x1, uxth 2
-.L1681:
-	cmp	w1, w7
-	bcc	.L1685
-	strh	w5, [x0, 114]
-	strh	w4, [x0, 118]
-	strh	w3, [x0, 116]
-	strh	wzr, [x0, 122]
-	strh	wzr, [x0, 120]
-	strh	wzr, [x0, 124]
-	mov	w0, 1
-	bl	ftl_alloc_sblk
-	mov	w22, w0
-	mov	w1, 0
-	bl	ftl_erase_sblk
-	ldr	x1, [x19, #:lo12:.LANCHOR46]
-	mov	w0, w22
-	add	x1, x1, 672
-	bl	ftl_get_blk_list_in_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR46]
-	mov	w1, 65533
-	ldrh	w20, [x0, 672]
-	strh	wzr, [x0, 690]
-	sub	w2, w20, #1
-	cmp	w1, w2, uxth
-	bcs	.L1686
-	adrp	x1, .LANCHOR138
-	adrp	x0, .LC0
-	mov	w2, 1366
-	add	x1, x1, :lo12:.LANCHOR138
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1687:
-	b	.L1687
-.L1685:
-	ldrb	w6, [x2, 2]
-	and	w8, w6, 31
-	strb	w8, [x2, 2]
-	ands	w6, w6, 24
-	bne	.L1682
-	add	w5, w5, 1
-	and	w5, w5, 65535
-.L1683:
-	add	w1, w1, 1
-	add	x2, x2, 4
-	and	w1, w1, 65535
-	b	.L1681
-.L1682:
-	cmp	w6, 16
-	bne	.L1684
-	add	w4, w4, 1
-	and	w4, w4, 65535
-	b	.L1683
-.L1684:
-	add	w3, w3, 1
-	and	w3, w3, 65535
-	b	.L1683
-.L1686:
-	strh	wzr, [x0, 696]
-	mov	w2, 256
-	mov	w1, 255
-	add	x0, x0, 416
-	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR46]
-	mov	w2, 4096
-	mov	w1, 0
-	add	x0, x0, 704
-	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR46]
-	lsr	w1, w20, 14
-	and	w20, w20, 16383
-	ldrh	w2, [x21, #:lo12:.LANCHOR54]
-	strh	w1, [x0, 694]
+	mov	x22, x1
+	stp	x23, x24, [sp, 48]
+	mov	w24, w2
+	ldr	w20, [x0, 40]
+.L1704:
 	mov	w1, 1
-	strh	w1, [x0, 688]
-	adrp	x1, .LANCHOR137
-	strh	w20, [x0, 692]
-	adrp	x20, .LANCHOR60
-	ldrh	w1, [x1, #:lo12:.LANCHOR137]
-	lsl	w2, w2, 1
-	strh	w22, [x0, 416]
-	strh	w1, [x0, 698]
-	adrp	x0, .LANCHOR56
-	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR56]
-	bl	ftl_memset
-	ldr	x0, [x20, #:lo12:.LANCHOR60]
-	mov	w1, 2
-	add	x0, x0, 16
-	bl	ftl_open_sblk_init
-	ldr	x0, [x20, #:lo12:.LANCHOR60]
+	mov	w0, w20
+	bl	queue_lun_state
+	cbnz	w0, .L1705
+	cmp	w24, 2
+	bne	.L1706
+	ldr	x0, [x19]
+	mov	w2, 17
+	ldr	x1, [x22]
+	ldr	w20, [x0, 40]
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	and	w23, w20, 2097151
+	ldrb	w0, [x0, 60]
+	ubfx	x20, x20, 21, 3
+	mov	w4, w23
+	mov	w3, w20
+	ldr	w21, [x1, 40]
+	mov	w1, 1
+	bl	flash_start_tlc_page_prog
+	and	w21, w21, 2097151
+	bl	nandc_wait_flash_ready
+	ldr	x7, [x19]
+	mov	w4, w21
+	ldr	x0, [x22]
+	mov	w3, w20
+	mov	w2, 26
+	mov	w1, 1
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldp	x7, x0, [x19]
+	mov	w4, w23
+	mov	w3, w20
+	mov	w1, w24
+	mov	w2, 17
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x7, [x19]
+	mov	w4, w21
+	ldr	x0, [x22, 8]
+	mov	w3, w20
+	mov	w1, w24
+	mov	w2, 26
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x7, [x19]
+	mov	w4, w23
+	ldr	x0, [x19, 16]
+	mov	w3, w20
+	mov	w2, 17
 	mov	w1, 3
-	add	x0, x0, 48
-	bl	ftl_open_sblk_init
-	ldr	x1, [x19, #:lo12:.LANCHOR46]
-	ldr	x0, [x20, #:lo12:.LANCHOR60]
-	add	x0, x0, 136
-	ldrh	w2, [x1, 134]
-	strh	w2, [x0, -10]
-	mov	w2, -1
-	strh	wzr, [x0, -12]
-	strh	w2, [x0, -56]
-	strh	w2, [x0, -6]
-	mov	w2, -1
-	strh	wzr, [x0, -16]
-	str	w2, [x0, 408]
-	strh	wzr, [x0, -14]
-	strh	w2, [x1, 126]
-	mov	w2, 256
-	mov	w1, 255
-	bl	ftl_memset
-	ldr	x0, [x20, #:lo12:.LANCHOR60]
-	mov	w2, 128
-	mov	w1, 255
-	add	x0, x0, 392
-	bl	ftl_memset
-	ldr	x0, [x20, #:lo12:.LANCHOR60]
-	str	wzr, [x0, 520]
-	str	wzr, [x0, 524]
-	str	wzr, [x0, 528]
-	bl	ftl_ext_info_flush
-	mov	w0, 0
-	bl	ftl_info_flush
-	bl	ftl_info_blk_init
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x0, [x22, 16]
+	mov	w1, 3
+	ldr	x7, [x19]
+	mov	w4, w21
+	mov	w3, w20
+	mov	w2, 16
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
+	ldr	x1, [x19]
+	mov	w0, 5
+	strb	w0, [x1, 58]
+	mov	w0, 1
+	strb	w0, [x1, 59]
+	mov	w0, -1
+	strb	w0, [x1]
+	adrp	x0, .LANCHOR114
+	add	x0, x0, :lo12:.LANCHOR114
+	bl	buf_add_tail
+.L1707:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 48
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
 	ret
-	.size	ftl_re_low_format_test, .-ftl_re_low_format_test
-	.section	.text.ftl_prog_ppa_page,"ax",@progbits
-	.align	2
-	.global	ftl_prog_ppa_page
-	.type	ftl_prog_ppa_page, %function
-ftl_prog_ppa_page:
-	ubfx	x5, x0, 21, 3
-	mov	w4, w3
-	mov	x3, x2
-	mov	x2, x1
-	and	w1, w0, 2097151
-	mov	w0, w5
-	b	ftl_prog_page
-	.size	ftl_prog_ppa_page, .-ftl_prog_ppa_page
-	.section	.text.ftl_write_last_log_page,"ax",@progbits
+.L1705:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L1704
+.L1706:
+	mov	x0, x19
+	bl	queue_tlc_prog_cmd
+	b	.L1707
+	.size	sblk_xlc_prog_pages, .-sblk_xlc_prog_pages
+	.section	.text.flash_start_page_prog,"ax",@progbits
 	.align	2
-	.global	ftl_write_last_log_page
-	.type	ftl_write_last_log_page, %function
-ftl_write_last_log_page:
-	ldrh	w1, [x0, 6]
-	cmp	w1, 1
-	bne	.L1692
-	stp	x29, x30, [sp, -48]!
-	adrp	x1, .LANCHOR82
+	.global	flash_start_page_prog
+	.type	flash_start_page_prog, %function
+flash_start_page_prog:
+	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	x19, x0
+	str	x25, [sp, 64]
+	mov	w25, w1
+	adrp	x1, .LANCHOR15
 	stp	x21, x22, [sp, 32]
-	ldr	x20, [x1, #:lo12:.LANCHOR82]
-	ldrh	w22, [x0, 12]
-	bl	ftl_get_new_free_page
-	mov	w21, w0
-	cmn	w0, #1
-	beq	.L1693
-	ldrh	w0, [x19]
-	add	x20, x20, x22, uxth 2
-	bl	ftl_vpn_decrement
-	adrp	x0, .LANCHOR121
-	mov	w1, 15555
-	add	x6, x0, :lo12:.LANCHOR121
-	movk	w1, 0xf55f, lsl 16
-	str	w1, [x0, #:lo12:.LANCHOR121]
-	adrp	x0, .LANCHOR79
-	ldrh	w1, [x0, #:lo12:.LANCHOR79]
-	adrp	x0, .LANCHOR69
-	ldrb	w0, [x0, #:lo12:.LANCHOR69]
-	mul	w1, w1, w0
-	mov	x0, x20
-	lsl	w1, w1, 2
-	bl	js_hash
-	str	w0, [x6, 4]
-	adrp	x0, .LANCHOR45
-	mov	x2, x6
-	mov	x1, x20
-	ldrb	w3, [x0, #:lo12:.LANCHOR45]
+	stp	x23, x24, [sp, 48]
+	and	w22, w0, 255
+	stp	x19, x20, [sp, 16]
+	mov	x24, x3
+	ldrb	w0, [x1, #:lo12:.LANCHOR15]
+	ubfx	x3, x25, 21, 3
+	cmp	w0, w3
+	bhi	.L1710
+	adrp	x1, .LANCHOR149
+	adrp	x0, .LC0
+	mov	w2, 708
+	add	x1, x1, :lo12:.LANCHOR149
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1711:
+	b	.L1711
+.L1710:
+	adrp	x0, .LANCHOR17
+	add	x0, x0, :lo12:.LANCHOR17
+	mov	x23, x2
+	and	w19, w25, 2097151
+	ldrb	w21, [x0, w3, sxtw]
+	adrp	x0, .LANCHOR13
+	ldr	x20, [x0, #:lo12:.LANCHOR13]
+	bl	nandc_rdy_status
+	cbnz	w0, .L1712
+	ldrb	w0, [x1, #:lo12:.LANCHOR15]
+	cmp	w0, 1
+	bne	.L1713
+	bl	nandc_wait_flash_ready
+.L1712:
 	mov	w0, w21
-	bl	ftl_prog_ppa_page
-.L1693:
-	mov	w0, 0
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 48
-	ret
-.L1692:
-	mov	w0, -1
-	ret
-	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
-	.section	.text.ftl_open_sblk_recovery,"ax",@progbits
-	.align	2
-	.global	ftl_open_sblk_recovery
-	.type	ftl_open_sblk_recovery, %function
-ftl_open_sblk_recovery:
-	sub	sp, sp, #176
-	stp	x29, x30, [sp, 48]
-	add	x29, sp, 48
-	stp	x21, x22, [sp, 80]
-	adrp	x22, .LANCHOR22
-	stp	x27, x28, [sp, 128]
-	mov	x28, x0
-	ldr	w0, [x22, #:lo12:.LANCHOR22]
-	stp	x25, x26, [sp, 112]
-	mov	x25, x1
-	stp	x19, x20, [sp, 64]
-	stp	x23, x24, [sp, 96]
-	tbz	x0, 12, .L1699
-	ldrh	w1, [x28, 2]
-	adrp	x0, .LC69
-	add	x0, x0, :lo12:.LC69
-	bl	printf
-.L1699:
-	ldr	w0, [x22, #:lo12:.LANCHOR22]
-	tbz	x0, 12, .L1700
-	ldrb	w1, [x28, 5]
-	adrp	x0, .LC70
-	add	x0, x0, :lo12:.LC70
-	bl	printf
-.L1700:
-	ldr	w0, [x22, #:lo12:.LANCHOR22]
-	tbz	x0, 12, .L1701
-	ldrh	w1, [x28]
-	adrp	x0, .LC71
-	add	x0, x0, :lo12:.LC71
-	bl	printf
-.L1701:
-	ldr	w0, [x22, #:lo12:.LANCHOR22]
-	tbz	x0, 12, .L1702
-	ldrh	w2, [x28, 18]
-	adrp	x0, .LC72
-	ldrh	w1, [x28, 16]
-	add	x0, x0, :lo12:.LC72
-	bl	printf
-.L1702:
-	ldrh	w0, [x28, 10]
-	adrp	x26, .LANCHOR45
-	strh	w0, [x28, 14]
-	mov	w27, 0
+	bl	hynix_reconfig_rr_para
+	mov	w0, w21
+	bl	nandc_cs
+	tst	x25, 50331648
+	bne	.L1714
+	adrp	x0, .LANCHOR18
+	adrp	x1, .LANCHOR19
+	ldrb	w0, [x0, #:lo12:.LANCHOR18]
+	cbz	w0, .L1715
+	ldrb	w0, [x1, #:lo12:.LANCHOR19]
+	cbz	w0, .L1716
+.L1715:
+	adrp	x0, .LANCHOR20
+	ldrb	w1, [x1, #:lo12:.LANCHOR19]
+	ldrh	w2, [x0, #:lo12:.LANCHOR20]
+	udiv	w0, w19, w2
+	mul	w0, w0, w2
+	sub	w19, w19, w0
+	cbz	w1, .L1717
+	add	w19, w0, w19, lsl 1
+.L1716:
+	mov	w0, w21
+	bl	zftl_flash_enter_slc_mode
+	b	.L1718
+.L1713:
+	mov	w2, 64
+	mov	w1, w19
+	mov	w0, w3
+	bl	flash_wait_device_ready_raw
+	b	.L1712
+.L1717:
+	adrp	x1, .LANCHOR21
+	add	x1, x1, :lo12:.LANCHOR21
+	ldrh	w19, [x1, w19, uxtw 1]
+	add	w19, w19, w0
+.L1718:
+	ubfiz	x0, x21, 8, 8
+	add	x20, x20, x0
+	mov	w0, 128
+	str	w0, [x20, 2056]
+	and	w0, w19, 255
+	str	wzr, [x20, 2052]
+	str	wzr, [x20, 2052]
+	str	w0, [x20, 2052]
+	lsr	w0, w19, 8
+	str	w0, [x20, 2052]
+	lsr	w0, w19, 16
+	str	w0, [x20, 2052]
+	mov	w0, w19
+	bl	nandc_set_seed
+	adrp	x0, .LANCHOR26+9
+	mov	x3, x24
+	mov	x2, x23
+	ldrb	w1, [x0, #:lo12:.LANCHOR26+9]
 	mov	w0, 1
-	adrp	x23, .LANCHOR79
-	bl	buf_alloc
-	ldrb	w20, [x28, 5]
-	ldrh	w21, [x28, 2]
+	bl	nandc_xfer_start
+	bl	nandc_xfer_done
+	ldr	x25, [sp, 64]
+	ldp	x23, x24, [sp, 48]
+	str	w22, [x20, 2056]
+	mov	w0, w21
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 80
+	b	nandc_de_cs
+.L1714:
+	mov	w0, w21
+	bl	zftl_flash_exit_slc_mode
+	b	.L1718
+	.size	flash_start_page_prog, .-flash_start_page_prog
+	.section	.text.queue_prog_cmd,"ax",@progbits
+	.align	2
+	.type	queue_prog_cmd, %function
+queue_prog_cmd:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	ldr	w1, [x0, 40]
+	ldr	x3, [x0, 24]
+	ldr	x2, [x0, 8]
+	str	x19, [sp, 16]
 	mov	x19, x0
-	add	x0, x26, :lo12:.LANCHOR45
-	str	x0, [x29, 120]
-.L1703:
-	ldrh	w0, [x23, #:lo12:.LANCHOR79]
-	cmp	w0, w21
-	bhi	.L1718
-.L1706:
-	strh	w21, [x28, 2]
-	adrp	x21, .LANCHOR82
-	strb	w20, [x28, 5]
-	mov	w0, 0
-	ldrh	w3, [x28, 10]
-	mov	w1, 0
-	ldr	x4, [x21, #:lo12:.LANCHOR82]
-.L1719:
-	cmp	w1, w3
-	bcc	.L1721
-	ldrb	w20, [x28, 9]
-	adrp	x24, .LANCHOR56
-	ldrh	w1, [x23, #:lo12:.LANCHOR79]
-	madd	w20, w20, w1, w0
-	ldr	w0, [x22, #:lo12:.LANCHOR22]
-	sub	w20, w20, w3
-	and	w20, w20, 65535
-	tbz	x0, 12, .L1722
-	ldrh	w1, [x28]
-	ldr	x2, [x24, #:lo12:.LANCHOR56]
-	ubfiz	x0, x1, 1, 16
-	ldrh	w3, [x2, x0]
-	adrp	x0, .LC74
+	mov	w0, 16
+	bl	flash_start_page_prog
+	adrp	x0, .LANCHOR114
+	ldr	w3, [x19, 40]
+	ldrb	w1, [x0, #:lo12:.LANCHOR114]
+	cmp	w1, 255
+	beq	.L1724
+	adrp	x2, .LANCHOR43
+	add	x2, x2, :lo12:.LANCHOR43
+	ubfx	x3, x3, 21, 3
+	mov	x6, x2
+.L1726:
+	add	x4, x2, x1, lsl 6
+	ldr	w5, [x4, 40]
+	ubfx	x5, x5, 21, 3
+	cmp	w3, w5
+	bne	.L1725
+	ldrb	w5, [x4, 58]
+	cmp	w5, 6
+	bne	.L1725
+	mov	w1, 3
+	strb	w1, [x4, 58]
+.L1724:
+	mov	w1, 3
+	strb	w1, [x19, 58]
+	mov	w1, 1
+	strb	w1, [x19, 59]
+	mov	w1, -1
+	strb	w1, [x19]
+	mov	x1, x19
+	add	x0, x0, :lo12:.LANCHOR114
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	b	buf_add_tail
+.L1725:
+	lsl	x1, x1, 6
+	ldrb	w1, [x6, x1]
+	cmp	w1, 255
+	bne	.L1726
+	b	.L1724
+	.size	queue_prog_cmd, .-queue_prog_cmd
+	.section	.text.sblk_prog_page,"ax",@progbits
+	.align	2
+	.global	sblk_prog_page
+	.type	sblk_prog_page, %function
+sblk_prog_page:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	ldrh	w0, [x0, 50]
+	and	w20, w1, 255
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	cbz	w0, .L1733
+	adrp	x0, .LANCHOR29
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 8, .L1733
+	ldr	w1, [x19, 40]
+	adrp	x0, .LC67
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC74
-	bl	printf
-.L1722:
-	ldr	x0, [x24, #:lo12:.LANCHOR56]
-	adrp	x25, .LANCHOR45
-	ldrh	w1, [x28]
-	adrp	x24, .LANCHOR69
-	adrp	x26, .LC75
-	add	x24, x24, :lo12:.LANCHOR69
-	add	x25, x25, :lo12:.LANCHOR45
-	add	x26, x26, :lo12:.LC75
-	strh	w20, [x0, x1, lsl 1]
-	mov	w20, 0
-	mov	x0, x19
-	bl	buf_free
-.L1723:
-	ldrb	w0, [x24]
-	cmp	w20, w0, lsl 1
-	bcc	.L1726
-	ldrh	w1, [x28, 12]
-	ldrh	w0, [x23, #:lo12:.LANCHOR79]
-	ldrb	w2, [x28, 9]
-	madd	w0, w0, w2, w1
-	mov	x1, -4
-	add	x0, x1, x0, sxtw 2
-	ldr	x1, [x21, #:lo12:.LANCHOR82]
-	ldr	w0, [x1, x0]
-	cmn	w0, #1
-	beq	.L1727
-	adrp	x1, .LANCHOR139
-	adrp	x0, .LC0
-	mov	w2, 811
-	add	x1, x1, :lo12:.LANCHOR139
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1728:
-	b	.L1728
-.L1718:
-	ldrb	w20, [x28, 5]
-	adrp	x24, .LANCHOR75
-	add	x24, x24, :lo12:.LANCHOR75
-.L1704:
-	ldrb	w0, [x28, 9]
-	cmp	w0, w20
-	bhi	.L1717
-	add	w21, w21, 1
-	strb	wzr, [x28, 5]
-	and	w21, w21, 65535
-	b	.L1703
-.L1717:
-	add	x0, x28, x20, sxtw 1
-	ldrh	w12, [x0, 16]
-	mov	w0, 65535
-	cmp	w12, w0
-	beq	.L1705
-	ldrh	w10, [x24]
-	ldrb	w3, [x26, #:lo12:.LANCHOR45]
-	ldr	x1, [x19, 8]
-	ldr	x2, [x19, 24]
-	madd	w10, w10, w12, w21
-	stp	w12, w10, [x29, 108]
-	mov	w0, w10
-	bl	ftl_read_ppa_page
-	mov	w11, w0
-	cmp	w0, 512
-	beq	.L1706
-	ldr	w0, [x22, #:lo12:.LANCHOR22]
-	ldp	w12, w10, [x29, 108]
-	tbz	x0, 12, .L1707
-	ldr	x1, [x19, 24]
-	mov	w4, w11
-	ldr	x0, [x19, 8]
-	mov	w3, w10
-	str	w11, [x29, 112]
-	ldr	w2, [x1, 12]
-	str	w2, [sp, 32]
-	ldr	w2, [x1, 8]
-	str	w2, [sp, 24]
-	ldr	w2, [x1, 4]
-	str	w2, [sp, 16]
-	mov	w2, w21
-	ldr	w1, [x1]
-	str	w1, [sp, 8]
-	ldr	w1, [x0, 12]
-	str	w1, [sp]
-	mov	w1, w12
-	ldp	w5, w6, [x0]
-	ldr	w7, [x0, 8]
-	adrp	x0, .LC73
-	add	x0, x0, :lo12:.LC73
+	add	x0, x0, :lo12:.LC67
 	bl	printf
-	ldr	w11, [x29, 112]
-.L1707:
-	ldrb	w2, [x28, 9]
-	adrp	x0, .LANCHOR133
+.L1733:
+	adrp	x24, .LANCHOR30
+	adrp	x22, .LANCHOR43
+	add	x24, x24, :lo12:.LANCHOR30
+	add	x22, x22, :lo12:.LANCHOR43
+	mov	w21, 0
+	mov	w23, 1
+.L1734:
+	cbnz	w20, .L1745
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L1745:
+	ldrb	w25, [x19]
+	ldr	w26, [x19, 40]
+.L1735:
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR133]
-	ldrh	w0, [x28, 10]
-	madd	w1, w21, w2, w20
-	cmp	w0, w1
-	beq	.L1708
-	adrp	x1, .LANCHOR139
+	mov	w0, w26
+	bl	queue_lun_state
+	cbnz	w0, .L1736
+	cmp	w20, 1
+	beq	.L1737
+	ldrb	w0, [x24]
+	cbnz	w0, .L1738
+.L1737:
+	mov	x0, x19
+	bl	queue_prog_cmd
+.L1739:
+	ubfiz	x19, x25, 6, 8
+	sub	w20, w20, #1
+	add	x19, x22, x19
+	b	.L1734
+.L1736:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L1735
+.L1738:
+	ldrb	w0, [x19]
+	ubfx	x1, x26, 21, 3
+	cmp	w0, 255
+	bne	.L1740
+	adrp	x1, .LANCHOR150
 	adrp	x0, .LC0
-	mov	w2, 707
-	add	x1, x1, :lo12:.LANCHOR139
+	mov	w2, 486
+	add	x1, x1, :lo12:.LANCHOR150
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1709:
-	b	.L1709
-.L1708:
-	ldrh	w1, [x28, 6]
-	add	w1, w1, w0
-	ldrh	w0, [x23, #:lo12:.LANCHOR79]
-	mul	w0, w0, w2
+.L1741:
+	b	.L1741
+.L1740:
+	sbfiz	x0, x0, 6, 32
+	add	x0, x22, x0
+	ldr	w5, [x0, 40]
+	ubfx	x0, x5, 21, 3
 	cmp	w1, w0
-	beq	.L1710
-	adrp	x1, .LANCHOR139
-	adrp	x0, .LC0
-	mov	w2, 708
-	add	x1, x1, :lo12:.LANCHOR139
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1711:
-	b	.L1711
-.L1710:
-	cmn	w11, #1
-	beq	.L1713
-	ldr	x5, [x19, 24]
-	str	x5, [x29, 112]
-	ldr	w0, [x5, 4]
-	cmn	w0, #1
-	beq	.L1713
-	bl	lpa_hash_get_ppa
-	cbz	x25, .L1715
-	ldr	x5, [x29, 112]
-	ldr	w1, [x5, 8]
-	cmp	w0, w1
-	beq	.L1715
-	cmn	w0, #1
-	beq	.L1715
-	adrp	x3, .LANCHOR71
-	mov	w1, 21
-	adrp	x27, .LANCHOR70
-	ldrh	w6, [x3, #:lo12:.LANCHOR71]
-	sub	w4, w1, w6
-	mov	w1, 1
-	lsr	w2, w0, w6
-	lsl	w1, w1, w4
-	sub	w1, w1, #1
-	and	w1, w1, w2
-	ldrb	w2, [x27, #:lo12:.LANCHOR70]
-	mov	x4, x3
-	udiv	w1, w1, w2
-	ldrh	w2, [x25]
-	cmp	w2, w1, uxth
-	bne	.L1715
-	ldr	x1, [x29, 120]
-	ldr	w6, [x5]
-	adrp	x5, .LANCHOR130
-	str	w6, [x29, 108]
-	add	x2, x5, :lo12:.LANCHOR130
-	str	x5, [x29, 112]
-	ldrb	w3, [x1]
-	ldr	x1, [x19, 8]
-	str	x4, [x29, 96]
-	bl	ftl_read_ppa_page
-	ldr	x5, [x29, 112]
-	ldr	w6, [x29, 108]
-	ldr	w0, [x5, #:lo12:.LANCHOR130]
-	cmp	w6, w0
-	bhi	.L1715
-	ldr	x0, [x19, 24]
-	ldr	w1, [x0, 8]
-	cmn	w1, #1
-	beq	.L1713
-	ldr	x4, [x29, 96]
+	bne	.L1742
+	adrp	x0, .LANCHOR96
+	ldrh	w2, [x0, #:lo12:.LANCHOR96]
+	adrp	x0, .LANCHOR95
+	ldrb	w3, [x0, #:lo12:.LANCHOR95]
 	mov	w0, 21
-	ldrh	w3, [x4, #:lo12:.LANCHOR71]
-	sub	w2, w0, w3
-	mov	w0, 1
-	lsr	w1, w1, w3
-	lsl	w0, w0, w2
-	sub	w0, w0, #1
-	and	w0, w0, w1
-	ldrb	w1, [x27, #:lo12:.LANCHOR70]
-	udiv	w0, w0, w1
-	bl	ftl_vpn_decrement
-.L1713:
-	ldrh	w0, [x28, 6]
-	mov	w27, 1
+	sub	w0, w0, w2
+	lsl	w1, w23, w2
+	sub	w3, w3, #1
+	sub	w1, w1, #1
+	lsl	w0, w23, w0
 	sub	w0, w0, #1
-	strh	w0, [x28, 6]
-	ldrh	w0, [x28, 10]
-	add	w0, w0, 1
-	strh	w0, [x28, 10]
-.L1705:
-	add	w20, w20, 1
-	and	w20, w20, 65535
-	b	.L1704
-.L1721:
-	ldrh	w2, [x28, 12]
-	add	w2, w2, w1
-	ldr	w2, [x4, x2, lsl 2]
-	cmn	w2, #1
-	beq	.L1720
-	add	w20, w0, 1
-	and	w0, w20, 65535
-.L1720:
-	add	w1, w1, 1
-	b	.L1719
-.L1726:
-	cbz	w27, .L1724
-	ldrh	w0, [x28, 6]
-	cmp	w0, 1
-	bls	.L1724
-	mov	x0, x28
-	bl	ftl_get_new_free_page
-	mov	w4, w0
-	ldr	w0, [x22, #:lo12:.LANCHOR22]
-	tbz	x0, 12, .L1725
-	mov	w1, w4
-	str	w4, [x29, 120]
-	mov	x0, x26
-	bl	printf
-	ldr	w4, [x29, 120]
-.L1725:
-	adrp	x0, .LANCHOR46
-	ldr	x2, [x19, 24]
-	ldr	x1, [x19, 8]
-	ldr	x0, [x0, #:lo12:.LANCHOR46]
-	ldr	w0, [x0, 8]
-	str	w0, [x2]
-	str	wzr, [x2, 12]
-	mov	w0, -1
-	stp	w0, w0, [x2, 4]
-	mov	w0, w4
-	str	wzr, [x1]
-	ldrb	w3, [x25]
-	bl	ftl_prog_ppa_page
-	ldrh	w0, [x28]
-	bl	ftl_vpn_decrement
-.L1724:
-	add	w20, w20, 1
-	b	.L1723
-.L1727:
-	ldrh	w0, [x28, 6]
-	cmp	w0, 1
-	bne	.L1698
-	ldp	x19, x20, [sp, 64]
-	mov	x0, x28
-	ldp	x21, x22, [sp, 80]
-	ldp	x23, x24, [sp, 96]
-	ldp	x25, x26, [sp, 112]
-	ldp	x27, x28, [sp, 128]
-	ldp	x29, x30, [sp, 48]
-	add	sp, sp, 176
-	b	ftl_write_last_log_page
-.L1715:
+	and	w0, w0, w3
+	lsr	w4, w26, w2
+	and	w0, w0, 65535
+	and	w1, w1, 65535
+	and	w4, w0, w4
+	lsr	w2, w5, w2
+	and	w0, w0, w2
+	and	w26, w1, w26
+	cmp	w4, w0
+	and	w1, w1, w5
+	ccmp	w26, w1, 0, ne
+	bne	.L1742
+	cmp	w21, w3
+	beq	.L1742
+	ldr	w1, [x19, 40]
+	mov	w0, 17
+	ldr	x2, [x19, 8]
+	add	w21, w21, 1
 	ldr	x3, [x19, 24]
-	adrp	x0, .LANCHOR47
-	ldr	w0, [x0, #:lo12:.LANCHOR47]
-	ldr	w1, [x3, 4]
-	cmp	w1, w0
-	bcs	.L1713
-	ldrb	w0, [x28, 9]
-	ldrh	w1, [x23, #:lo12:.LANCHOR79]
-	ldrh	w2, [x28, 10]
-	mul	w0, w0, w1
-	sub	w0, w0, #1
-	cmp	w2, w0
-	bge	.L1713
-	adrp	x0, .LANCHOR46
-	ldr	w1, [x3]
-	ldr	x0, [x0, #:lo12:.LANCHOR46]
-	ldr	w4, [x0, 8]
-	cmp	w1, w4
-	bls	.L1716
-	str	w1, [x0, 8]
-.L1716:
-	ldrh	w0, [x28, 12]
-	add	w2, w2, w0
-	ldp	w0, w1, [x3, 4]
-	bl	lpa_hash_update_ppa
-	b	.L1713
-.L1698:
-	ldp	x19, x20, [sp, 64]
-	ldp	x21, x22, [sp, 80]
-	ldp	x23, x24, [sp, 96]
-	ldp	x25, x26, [sp, 112]
-	ldp	x27, x28, [sp, 128]
-	ldp	x29, x30, [sp, 48]
-	add	sp, sp, 176
-	ret
-	.size	ftl_open_sblk_recovery, .-ftl_open_sblk_recovery
-	.section	.text.pm_write_page,"ax",@progbits
+	bl	flash_start_page_prog
+	strb	w23, [x19, 59]
+	mov	w0, 8
+	strb	w0, [x19, 58]
+	mov	w0, -1
+	strb	w0, [x19]
+	mov	x1, x19
+	adrp	x0, .LANCHOR114
+	add	x0, x0, :lo12:.LANCHOR114
+	bl	buf_add_tail
+	b	.L1739
+.L1742:
+	mov	x0, x19
+	mov	w21, 0
+	bl	queue_prog_cmd
+	b	.L1739
+	.size	sblk_prog_page, .-sblk_prog_page
+	.section	.text.ftl_flush,"ax",@progbits
 	.align	2
-	.global	pm_write_page
-	.type	pm_write_page, %function
-pm_write_page:
-	stp	x29, x30, [sp, -96]!
+	.global	ftl_flush
+	.type	ftl_flush, %function
+ftl_flush:
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR112
 	add	x29, sp, 0
+	ldrb	w1, [x0, #:lo12:.LANCHOR112]
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR79
-	stp	x21, x22, [sp, 32]
-	mov	w19, w0
-	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR46
-	mov	x24, x1
-	add	x20, x20, :lo12:.LANCHOR79
-	mov	x21, x22
-	stp	x25, x26, [sp, 64]
-	mov	w23, 65535
-	str	x27, [sp, 80]
-.L1772:
-	adrp	x25, .LANCHOR75
-.L1777:
-	ldr	x0, [x22, #:lo12:.LANCHOR46]
-	ldr	w1, [x0, 48]
-	ldrh	w2, [x0, 696]
-	add	w1, w1, 1
-	str	w1, [x0, 48]
-	ldrh	w1, [x20]
-	cmp	w2, w1
-	bcs	.L1773
-	ldrh	w0, [x0, 692]
-	cmp	w0, w23
-	bne	.L1774
-.L1773:
-	bl	pm_alloc_new_blk
-	mov	w0, 0
-	bl	ftl_info_flush
-.L1774:
-	ldr	x1, [x21, #:lo12:.LANCHOR46]
-	ldrh	w0, [x1, 692]
-	cmp	w0, w23
-	bne	.L1775
-	adrp	x1, .LANCHOR140
-	adrp	x0, .LC0
-	mov	w2, 224
-	add	x1, x1, :lo12:.LANCHOR140
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1776:
-	b	.L1776
-.L1775:
-	ldrh	w1, [x1, 696]
-	adrp	x27, .LANCHOR141
-	ldrh	w26, [x25, #:lo12:.LANCHOR75]
-	mov	w2, 64
-	madd	w26, w26, w0, w1
-	ldr	x0, [x27, #:lo12:.LANCHOR141]
-	mov	w1, 0
-	bl	ftl_memset
-	ldr	x3, [x27, #:lo12:.LANCHOR141]
-	mov	x2, x24
-	ldr	x0, [x21, #:lo12:.LANCHOR46]
-	str	w19, [x3]
-	ldr	w1, [x0, 48]
-	ldrb	w0, [x0, 694]
-	str	w1, [x3, 4]
-	adrp	x1, .LANCHOR45
-	ldrb	w4, [x1, #:lo12:.LANCHOR45]
-	mov	w1, w26
-	bl	ftl_prog_page
-	ldr	x2, [x21, #:lo12:.LANCHOR46]
-	ldrh	w1, [x2, 696]
-	add	w1, w1, 1
-	and	w1, w1, 65535
-	strh	w1, [x2, 696]
-	cmp	w1, 1
-	beq	.L1777
-	cmn	w0, #1
-	bne	.L1778
-	mov	w1, w26
-	adrp	x0, .LC76
-	add	x0, x0, :lo12:.LC76
-	bl	printf
-	b	.L1772
-.L1778:
-	ldrh	w0, [x2, 698]
-	cmp	w19, w0
-	bcs	.L1779
-	add	x19, x2, x19, uxtw 2
-	str	w26, [x19, 704]
-.L1779:
-	mov	w0, 0
-	ldr	x27, [sp, 80]
+	mov	x19, x0
+	adrp	x20, .LANCHOR151
+	cbz	w1, .L1757
+	ldrb	w2, [x20, #:lo12:.LANCHOR151]
+	adrp	x0, .LANCHOR43
+	add	x0, x0, :lo12:.LANCHOR43
+	add	x0, x0, x2, lsl 6
+	bl	sblk_prog_page
+.L1757:
+	mov	w0, -1
+	strb	wzr, [x19, #:lo12:.LANCHOR112]
+	strb	w0, [x20, #:lo12:.LANCHOR151]
+	bl	sblk_wait_write_queue_completed
+	bl	ftl_write_completed
 	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 96
-	ret
-	.size	pm_write_page, .-pm_write_page
-	.section	.text.flash_info_flush,"ax",@progbits
+	mov	w0, -1
+	ldp	x29, x30, [sp], 32
+	b	ftl_vpn_decrement
+	.size	ftl_flush, .-ftl_flush
+	.section	.text.flash_prog_page_en,"ax",@progbits
 	.align	2
-	.global	flash_info_flush
-	.type	flash_info_flush, %function
-flash_info_flush:
-	stp	x29, x30, [sp, -112]!
-	mov	w2, 64
-	mov	w1, 0
+	.global	flash_prog_page_en
+	.type	flash_prog_page_en, %function
+flash_prog_page_en:
+	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR116
+	and	w24, w0, 255
+	adrp	x0, .LANCHOR15
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR5
-	ldr	x0, [x23, #:lo12:.LANCHOR116]
-	adrp	x24, .LC78
 	stp	x21, x22, [sp, 32]
-	add	x24, x24, :lo12:.LC78
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
 	stp	x25, x26, [sp, 64]
-	adrp	x21, .LANCHOR117
-	stp	x27, x28, [sp, 80]
-	adrp	x22, .LANCHOR13
-	bl	ftl_memset
-	adrp	x25, .LANCHOR97
-	ldr	x1, [x20, #:lo12:.LANCHOR5]
-	mov	w3, 16
-	mov	w2, 4
-	adrp	x0, .LC77
-	add	x0, x0, :lo12:.LC77
-	add	x22, x22, :lo12:.LANCHOR13
-	add	x25, x25, :lo12:.LANCHOR97
-	add	x27, x21, :lo12:.LANCHOR117
+	cmp	w0, w24
+	bhi	.L1763
+	adrp	x1, .LANCHOR152
+	adrp	x0, .LC0
+	mov	w2, 494
+	add	x1, x1, :lo12:.LANCHOR152
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1764:
+	b	.L1764
+.L1763:
+	adrp	x0, .LANCHOR17
+	add	x0, x0, :lo12:.LANCHOR17
+	mov	w20, w1
+	mov	x23, x2
+	mov	x22, x3
+	mov	w25, w4
+	and	w21, w5, 255
+	ldrb	w26, [x0, w24, sxtw]
+	tst	x20, 50331648
+	bne	.L1775
+	adrp	x0, .LANCHOR18
+	ldrb	w1, [x0, #:lo12:.LANCHOR18]
+	adrp	x0, .LANCHOR19
+	cbz	w1, .L1766
+	ldrb	w1, [x0, #:lo12:.LANCHOR19]
+	cbz	w1, .L1775
+.L1766:
+	adrp	x1, .LANCHOR20
+	ldrb	w0, [x0, #:lo12:.LANCHOR19]
+	ldrh	w1, [x1, #:lo12:.LANCHOR20]
+	udiv	w19, w20, w1
+	mul	w19, w19, w1
+	sub	w1, w20, w19
+	cbz	w0, .L1767
+	add	w19, w19, w1, lsl 1
+.L1765:
+	adrp	x0, .LANCHOR29
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 4, .L1768
+	adrp	x0, .LC68
+	mov	w2, w20
+	mov	w1, w26
+	add	x0, x0, :lo12:.LC68
+	bl	printf
+.L1768:
+	mov	w0, w26
+	mov	w4, w25
+	mov	x3, x22
+	mov	x2, x23
+	mov	w1, w19
+	bl	flash_prog_page
+	mov	w26, w0
+	cbz	w21, .L1769
+	adrp	x21, .LANCHOR142
+	adrp	x19, .LANCHOR143
+	mov	w4, w25
+	mov	w1, w20
+	ldr	x3, [x21, #:lo12:.LANCHOR142]
+	mov	w0, w24
+	ldr	x2, [x19, #:lo12:.LANCHOR143]
+	bl	flash_read_page_en
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	beq	.L1770
+	ldr	x0, [x19, #:lo12:.LANCHOR143]
+	ldr	w1, [x23]
+	ldr	w0, [x0]
+	cmp	w1, w0
+	bne	.L1770
+	ldr	x0, [x21, #:lo12:.LANCHOR142]
+	ldr	w1, [x22]
+	ldr	w0, [x0]
+	cmp	w1, w0
+	beq	.L1769
+.L1770:
+	ldr	x1, [x21, #:lo12:.LANCHOR142]
+	mov	w3, 4
+	adrp	x0, .LC69
+	mov	w2, w3
+	add	x0, x0, :lo12:.LC69
 	bl	rknand_print_hex
-	mov	w26, 0
-	ldr	x6, [x20, #:lo12:.LANCHOR5]
-	add	x0, x6, 16
-	ldr	w1, [x6, 8]
-	bl	js_hash
-	str	w0, [x6, 12]
-.L1784:
-	add	x28, x21, :lo12:.LANCHOR117
-	ldrb	w4, [x21, #:lo12:.LANCHOR117]
-	ldrh	w19, [x22]
-	mov	x0, x24
-	mov	w1, w4
-	ldrh	w3, [x28, 2]
-	stp	w3, w4, [x29, 104]
+	ldr	x1, [x19, #:lo12:.LANCHOR143]
+	mov	w3, 4
+	adrp	x0, .LC70
 	mov	w2, w3
+	add	x0, x0, :lo12:.LC70
+	bl	rknand_print_hex
+.L1771:
+	mov	w1, w20
+	adrp	x0, .LC71
+	add	x0, x0, :lo12:.LC71
 	bl	printf
-	ldrh	w0, [x25]
-	ldrh	w1, [x28, 2]
-	sub	w0, w0, #1
-	cmp	w1, w0
-	ldp	w3, w4, [x29, 104]
-	blt	.L1785
-	ldr	x6, [x20, #:lo12:.LANCHOR5]
-	ldrb	w7, [x28, 1]
-	strh	wzr, [x28, 2]
-	ldr	w0, [x6, 4]
-	ldrh	w1, [x6, 16]
-	add	w0, w0, 1
-	str	w0, [x6, 4]
-	ldrb	w0, [x21, #:lo12:.LANCHOR117]
-	add	w1, w1, 1
-	strb	w0, [x28, 1]
-	mov	x0, x6
-	strb	w7, [x21, #:lo12:.LANCHOR117]
-	strh	w1, [x0, 16]!
-	ldr	w1, [x6, 8]
-	bl	js_hash
-	ldrh	w19, [x22]
-	str	w0, [x6, 12]
-	mul	w19, w19, w7
-.L1791:
-	mov	w1, w19
-	mov	w0, 0
-	bl	flash_erase_block
-	b	.L1786
+	adrp	x1, .LANCHOR152
+	adrp	x0, .LC0
+	mov	w2, 520
+	add	x1, x1, :lo12:.LANCHOR152
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1773:
+	b	.L1773
+.L1767:
+	adrp	x0, .LANCHOR21
+	add	x0, x0, :lo12:.LANCHOR21
+	ldrh	w0, [x0, w1, uxtw 1]
+	add	w19, w0, w19
+	b	.L1765
+.L1775:
+	mov	w19, w20
+	b	.L1765
+.L1769:
+	cmn	w26, #1
+	beq	.L1771
+	mov	w0, w26
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+	.size	flash_prog_page_en, .-flash_prog_page_en
+	.section	.text.ftl_test_block,"ax",@progbits
+	.align	2
+	.global	ftl_test_block
+	.type	ftl_test_block, %function
+ftl_test_block:
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x24, ftl_tmp_buffer
+	stp	x25, x26, [sp, 64]
+	adrp	x25, .LANCHOR145
+	stp	x21, x22, [sp, 32]
+	adrp	x26, .LANCHOR100
+	and	w21, w0, 65535
+	add	x0, x26, :lo12:.LANCHOR100
+	stp	x19, x20, [sp, 16]
+	mov	w23, 0
+	stp	x27, x28, [sp, 80]
+	mov	w20, 0
+	adrp	x27, .LANCHOR95
+	str	x0, [x29, 112]
+	str	wzr, [x24, #:lo12:ftl_tmp_buffer]
+	add	x0, x27, :lo12:.LANCHOR95
+	str	wzr, [x25, #:lo12:.LANCHOR145]
+	str	x0, [x29, 96]
+.L1787:
+	ldr	x0, [x29, 112]
+	ldrb	w0, [x0]
+	cmp	w0, w20
+	bls	.L1797
+	add	x0, x27, :lo12:.LANCHOR95
+	mov	w22, 0
+	str	x0, [x29, 120]
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
+	str	x0, [x29, 104]
+	b	.L1798
+.L1796:
+	ldr	x0, [x29, 104]
+	ldr	w0, [x0]
+	tbz	x0, 12, .L1788
+	adrp	x0, .LC72
+	mov	w1, w21
+	add	x0, x0, :lo12:.LC72
+	bl	printf
+.L1788:
+	ldr	x0, [x29, 96]
+	ldrb	w19, [x0]
+	madd	w19, w21, w19, w22
+	and	w19, w19, 65535
+	cbnz	w20, .L1789
+	adrp	x0, .LANCHOR12
+	ldr	x0, [x0, #:lo12:.LANCHOR12]
+	ldrb	w0, [x0, 47]
+	cmp	w0, w19
+	bcs	.L1790
 .L1789:
-	mov	w26, 1
-	b	.L1784
-.L1785:
-	madd	w19, w19, w4, w3
-	cbz	w1, .L1791
-.L1786:
-	ldr	x2, [x20, #:lo12:.LANCHOR5]
+	and	w28, w20, 255
 	mov	w1, w19
-	ldr	x3, [x23, #:lo12:.LANCHOR116]
+	mov	w0, w28
+	bl	flash_check_bad_block
+	cbnz	w0, .L1790
+	adrp	x0, .LANCHOR99
+	mov	w1, w23
+	ldrh	w7, [x0, #:lo12:.LANCHOR99]
+	mov	w0, w28
+	mul	w26, w7, w19
+	mov	w2, w26
+	bl	flash_erase_block_en
+	cbz	w0, .L1791
+	adrp	x0, .LANCHOR67
+	ldrb	w0, [x0, #:lo12:.LANCHOR67]
+	cmp	w0, 2
+	bne	.L1813
+	adrp	x0, .LANCHOR18
+	ldrb	w0, [x0, #:lo12:.LANCHOR18]
+	cbz	w0, .L1813
+	mov	w2, w26
+	mov	w1, 1
+	mov	w0, w28
+	bl	flash_erase_block_en
+	cbnz	w0, .L1813
+.L1795:
+	adrp	x0, .LANCHOR67
+	mov	w23, 1
+	ldrb	w0, [x0, #:lo12:.LANCHOR67]
+	add	w26, w26, w0, lsl 24
+.L1794:
+	adrp	x0, .LANCHOR52
 	mov	w5, 1
-	mov	w4, 4
-	ldr	w0, [x2, 4]
-	str	w0, [x3]
-	mov	w0, 21321
-	movk	w0, 0x5359, lsl 16
-	str	w0, [x3, 4]
-	mov	w0, 0
+	add	x3, x25, :lo12:.LANCHOR145
+	add	x2, x24, :lo12:ftl_tmp_buffer
+	ldrb	w4, [x0, #:lo12:.LANCHOR52]
+	mov	w1, w26
+	mov	w0, w28
 	bl	flash_prog_page_en
-	cmn	w0, #1
-	ldrh	w1, [x27, 2]
-	add	w1, w1, 1
-	strh	w1, [x27, 2]
-	bne	.L1787
+	cbz	w0, .L1790
+.L1813:
 	mov	w1, w19
-	adrp	x0, .LC79
-	add	x0, x0, :lo12:.LC79
-	bl	printf
-	b	.L1784
-.L1787:
-	cbz	w26, .L1789
+	mov	w0, w28
+	bl	flash_mask_bad_block
+.L1790:
+	add	w22, w22, 1
+	and	w22, w22, 65535
+.L1798:
+	ldr	x0, [x29, 120]
+	ldrb	w0, [x0]
+	cmp	w0, w22
+	bhi	.L1796
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L1787
+.L1791:
+	cbz	w23, .L1794
+	b	.L1795
+.L1797:
+	cbz	w23, .L1799
+	adrp	x0, .LANCHOR3
+	mov	w1, 2
+	ldr	x0, [x0, #:lo12:.LANCHOR3]
+	add	x21, x0, x21, uxth 2
+	ldrb	w0, [x21, 2]
+	bfi	w0, w1, 3, 2
+	strb	w0, [x21, 2]
+.L1799:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 112
+	ldp	x29, x30, [sp], 128
 	ret
-	.size	flash_info_flush, .-flash_info_flush
-	.section	.text.nand_flash_init,"ax",@progbits
+	.size	ftl_test_block, .-ftl_test_block
+	.section	.text.ftl_prog_page,"ax",@progbits
 	.align	2
-	.global	nand_flash_init
-	.type	nand_flash_init, %function
-nand_flash_init:
+	.global	ftl_prog_page
+	.type	ftl_prog_page, %function
+ftl_prog_page:
 	stp	x29, x30, [sp, -64]!
-	mov	w2, 2
-	adrp	x1, .LANCHOR20
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR26
+	and	w19, w0, 255
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR34
-	stp	x23, x24, [sp, 48]
-	adrp	x19, .LANCHOR19
-	strb	w2, [x1, #:lo12:.LANCHOR20]
-	bl	nandc_init
-	add	x8, x20, :lo12:.LANCHOR26
-	add	x0, x19, :lo12:.LANCHOR19
-	mov	x10, x8
-	str	x0, [x21, #:lo12:.LANCHOR34]
-	mov	w7, 0
-	mov	w11, 44
-.L1798:
-	mov	x1, x8
-	mov	w0, w7
-	bl	flash_read_id
-	cbnz	w7, .L1793
-	ldrb	w0, [x10]
-	sub	w0, w0, #1
-	and	w0, w0, 255
-	cmp	w0, 253
-	bls	.L1794
-.L1796:
-	mov	w0, -2
-.L1792:
+	mov	w20, w1
+	mov	x21, x2
+	mov	x22, x3
+	str	x23, [sp, 48]
+	mov	w23, w4
+	bl	sblk_wait_write_queue_completed
+	mov	w5, 1
+	mov	w4, w23
+	mov	x3, x22
+	mov	x2, x21
+	mov	w1, w20
+	mov	w0, w19
+	bl	flash_prog_page_en
+	cmn	w0, #1
+	bne	.L1814
+	adrp	x1, .LANCHOR153
+	adrp	x0, .LC0
+	mov	w2, 2013
+	add	x1, x1, :lo12:.LANCHOR153
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1816:
+	b	.L1816
+.L1814:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
+	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1794:
-	ldrb	w0, [x10, 1]
-	cmp	w0, 255
-	beq	.L1796
-.L1793:
-	ldrb	w0, [x8]
-	cmp	w0, 181
-	bne	.L1797
-	strb	w11, [x8]
-.L1797:
-	add	w7, w7, 1
-	add	x8, x8, 8
-	and	w7, w7, 255
-	cmp	w7, 4
-	bne	.L1798
-	adrp	x0, .LANCHOR142
-	add	x8, x0, :lo12:.LANCHOR142
-	add	x8, x8, 1
-	mov	x7, x0
-	add	x12, x20, :lo12:.LANCHOR26
-	mov	x10, 0
-.L1801:
-	ldrb	w2, [x8, -1]
-	mov	w11, w10
-	lsl	x23, x10, 5
-	mov	x1, x12
-	mov	x0, x8
-	bl	flash_mem_cmp8
-	cbnz	w0, .L1799
-	add	x0, x7, :lo12:.LANCHOR142
-	ubfiz	x11, x11, 5, 32
-	add	x23, x0, x23
-	add	x0, x0, x11
-	adrp	x1, .LANCHOR143
-	add	x4, x1, :lo12:.LANCHOR143
-	ldrb	w3, [x0, 22]
-	mov	x0, 0
-.L1800:
-	lsl	x5, x0, 5
-	mov	w2, w0
-	ldrb	w5, [x5, x4]
-	cmp	w5, w3
-	beq	.L1802
-	add	x0, x0, 1
-	cmp	x0, 4
-	bne	.L1800
-	mov	w2, w0
-.L1802:
-	ubfiz	x0, x2, 5, 32
-	add	x1, x1, :lo12:.LANCHOR143
-	add	x1, x1, x0
-	mov	w2, 32
-	adrp	x0, .LANCHOR103
-	add	x22, x19, :lo12:.LANCHOR19
-	add	x0, x0, :lo12:.LANCHOR103
-	bl	ftl_memcpy
-	mov	x1, x23
-	mov	w2, 32
-	mov	x0, x22
-	bl	ftl_memcpy
-	adrp	x1, .LANCHOR7
-	mov	x24, x1
-	ldrb	w0, [x1, #:lo12:.LANCHOR7]
-	cmp	w0, 8
-	bhi	.L1803
-	ldrb	w1, [x22, 20]
-	cmp	w1, 60
-	bls	.L1804
-	mov	w1, 60
-	strb	w1, [x22, 20]
-.L1804:
-	cmp	w0, 8
-	bne	.L1803
-	ldrb	w0, [x20, #:lo12:.LANCHOR26]
-	cmp	w0, 44
-	bne	.L1803
-	add	x0, x19, :lo12:.LANCHOR19
-	ldrb	w1, [x0, 28]
-	cmp	w1, 2
-	bne	.L1803
-	strb	wzr, [x0, 28]
-.L1803:
-	mov	w0, 16384
-	bl	ftl_malloc
-	adrp	x1, .LANCHOR119
-	adrp	x23, .LANCHOR5
-	add	x20, x19, :lo12:.LANCHOR19
-	adrp	x22, .LANCHOR25
-	str	x0, [x1, #:lo12:.LANCHOR119]
-	mov	w0, 16384
-	bl	ftl_malloc
-	adrp	x1, .LANCHOR111
-	str	x0, [x1, #:lo12:.LANCHOR111]
-	mov	w0, 2048
-	bl	ftl_malloc
-	str	x0, [x23, #:lo12:.LANCHOR5]
-	mov	w0, 64
-	bl	ftl_malloc
-	adrp	x1, .LANCHOR118
-	str	x0, [x1, #:lo12:.LANCHOR118]
-	mov	w0, 64
-	bl	ftl_malloc
-	adrp	x1, .LANCHOR112
-	str	x0, [x1, #:lo12:.LANCHOR112]
-	mov	w0, 64
-	bl	ftl_malloc
-	adrp	x1, .LANCHOR116
-	str	x0, [x1, #:lo12:.LANCHOR116]
-	adrp	x0, .LANCHOR123
-	strb	wzr, [x0, #:lo12:.LANCHOR123]
-	bl	flash_die_info_init
-	ldrb	w0, [x20, 18]
-	bl	flash_lsb_page_tbl_build
-	ldrb	w0, [x20, 20]
-	adrp	x20, .LANCHOR115
-	bl	nandc_bch_sel
-	str	xzr, [x20, #:lo12:.LANCHOR115]
-	ldr	x1, [x21, #:lo12:.LANCHOR34]
-	mov	x21, x23
-	ldrh	w0, [x1, 16]
-	lsr	w3, w0, 8
-	ubfx	x4, x0, 3, 1
-	and	w2, w3, 7
-	strb	w2, [x22, #:lo12:.LANCHOR25]
-	adrp	x2, .LANCHOR144
-	strb	w4, [x2, #:lo12:.LANCHOR144]
-	adrp	x2, .LANCHOR23
-	ubfx	x4, x0, 4, 1
-	strb	w4, [x2, #:lo12:.LANCHOR23]
-	adrp	x2, .LANCHOR66
-	ubfx	x4, x0, 12, 1
-	strb	w4, [x2, #:lo12:.LANCHOR66]
-	adrp	x2, .LANCHOR74
-	ubfx	x4, x0, 13, 1
-	ubfx	x0, x0, 14, 1
-	strb	w4, [x2, #:lo12:.LANCHOR74]
-	adrp	x2, .LANCHOR12
-	strb	w0, [x2, #:lo12:.LANCHOR12]
-	mov	w2, 60
-	ldrb	w0, [x1, 28]
-	adrp	x1, .LANCHOR11
-	strb	w0, [x1, #:lo12:.LANCHOR11]
-	adrp	x1, .LANCHOR145
-	strb	w2, [x1, #:lo12:.LANCHOR145]
-	ldrb	w2, [x24, #:lo12:.LANCHOR7]
-	cmp	w2, 9
-	bne	.L1805
-	mov	w2, 70
-	strb	w2, [x1, #:lo12:.LANCHOR145]
-.L1805:
-	add	x19, x19, :lo12:.LANCHOR19
-	adrp	x1, .LANCHOR146
-	adrp	x23, .LANCHOR2
-	strb	w0, [x1, #:lo12:.LANCHOR146]
-	ldrh	w1, [x19, 16]
-	ldrb	w0, [x19, 19]
-	strb	w0, [x23, #:lo12:.LANCHOR2]
-	tbz	x1, 6, .L1807
-	sub	w1, w0, #17
-	and	w1, w1, 255
-	cmp	w1, 2
-	bhi	.L1808
-	adrp	x1, micron_read_retrial
-	add	x1, x1, :lo12:micron_read_retrial
-	str	x1, [x20, #:lo12:.LANCHOR115]
-	cmp	w0, 19
-	adrp	x0, .LANCHOR113
-	beq	.L1809
-	mov	w1, 7
-.L1836:
-	strb	w1, [x0, #:lo12:.LANCHOR113]
-	b	.L1807
-.L1799:
-	add	x10, x10, 1
-	add	x8, x8, 32
-	cmp	x10, 24
-	bne	.L1801
-	b	.L1796
-.L1809:
-	mov	w1, 15
-	b	.L1836
-.L1808:
-	sub	w1, w0, #65
-	cmp	w0, 33
-	and	w1, w1, 255
-	ccmp	w1, 1, 0, ne
-	bhi	.L1811
-	adrp	x0, toshiba_read_retrial
-	add	x0, x0, :lo12:toshiba_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR115]
-	adrp	x0, .LANCHOR4
-	mov	w1, 4
-	strb	w1, [x0, #:lo12:.LANCHOR4]
-.L1838:
-	mov	w1, 7
-	adrp	x0, .LANCHOR113
-	b	.L1836
-.L1811:
-	sub	w2, w0, #34
-	sub	w1, w0, #67
-	and	w2, w2, 255
-	and	w1, w1, 255
-	cmp	w2, 1
-	ccmp	w1, 1, 0, hi
-	bhi	.L1812
-	adrp	x2, toshiba_read_retrial
-	add	x2, x2, :lo12:toshiba_read_retrial
-	str	x2, [x20, #:lo12:.LANCHOR115]
-	cmp	w0, 35
-	mov	w2, 68
-	ccmp	w0, w2, 4, ne
-	adrp	x0, .LANCHOR113
-	beq	.L1813
-	mov	w2, 7
-.L1835:
-	strb	w2, [x0, #:lo12:.LANCHOR113]
-	cmp	w1, 1
-	adrp	x0, .LANCHOR4
-	bhi	.L1815
-	mov	w1, 4
-.L1837:
-	strb	w1, [x0, #:lo12:.LANCHOR4]
-.L1807:
-	adrp	x19, .LANCHOR35
-	mov	w0, 4
-	strb	wzr, [x19, #:lo12:.LANCHOR35]
-	tbz	x3, 0, .L1816
-	bl	nandc_set_if_mode
-	mov	w0, 1
-	bl	flash_set_interface_mode
-	mov	w0, 1
-.L1816:
-	bl	nandc_set_if_mode
-	bl	flash_info_blk_init
-	cmn	w0, #1
-	beq	.L1792
-	ldrb	w0, [x23, #:lo12:.LANCHOR2]
-	sub	w0, w0, #1
-	and	w0, w0, 255
-	cmp	w0, 6
-	bhi	.L1818
-	adrp	x0, hynix_read_retrial
-	add	x0, x0, :lo12:hynix_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR115]
-.L1818:
-	ldrb	w0, [x22, #:lo12:.LANCHOR25]
-	tbnz	x0, 2, .L1819
-.L1839:
-	mov	w0, 0
-	b	.L1792
-.L1813:
-	mov	w2, 17
-	b	.L1835
-.L1815:
-	mov	w1, 5
-	b	.L1837
-.L1812:
-	sub	w0, w0, #36
-	and	w0, w0, 255
-	cmp	w0, 1
-	bhi	.L1807
-	adrp	x0, toshiba_3d_read_retrial
-	add	x0, x0, :lo12:toshiba_3d_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR115]
-	b	.L1838
-.L1819:
-	ldr	x0, [x21, #:lo12:.LANCHOR5]
-	ldrb	w0, [x0, 19]
-	cbz	w0, .L1839
-	adrp	x0, .LANCHOR117
-	ldrb	w1, [x0, #:lo12:.LANCHOR117]
-	adrp	x0, .LANCHOR13
-	ldrh	w0, [x0, #:lo12:.LANCHOR13]
-	mul	w1, w1, w0
-	mov	w0, 0
-	bl	flash_ddr_para_scan
-	ldrb	w0, [x19, #:lo12:.LANCHOR35]
-	cbnz	w0, .L1839
-	ldr	x0, [x21, #:lo12:.LANCHOR5]
-	strb	wzr, [x0, 19]
-	bl	flash_info_flush
-	b	.L1839
-	.size	nand_flash_init, .-nand_flash_init
-	.section	.text.ftl_sysblk_dump,"ax",@progbits
+	.size	ftl_prog_page, .-ftl_prog_page
+	.section	.text.ftl_info_flush,"ax",@progbits
 	.align	2
-	.global	ftl_sysblk_dump
-	.type	ftl_sysblk_dump, %function
-ftl_sysblk_dump:
-	sub	sp, sp, #144
-	stp	x29, x30, [sp, 48]
-	add	x29, sp, 48
-	stp	x23, x24, [sp, 96]
-	stp	x25, x26, [sp, 112]
-	adrp	x26, .LANCHOR79
-	stp	x27, x28, [sp, 128]
-	add	x26, x26, :lo12:.LANCHOR79
-	stp	x19, x20, [sp, 64]
-	adrp	x27, .LANCHOR75
-	stp	x21, x22, [sp, 80]
-	and	w22, w0, 65535
-	mov	w0, 1
-	bl	buf_alloc
-	ldr	x23, [x0, 8]
-	adrp	x28, .LANCHOR45
-	mov	x24, x0
-	add	x27, x27, :lo12:.LANCHOR75
-	add	x28, x28, :lo12:.LANCHOR45
-	mov	w25, 0
-	mov	w19, 0
-.L1841:
-	ldrh	w0, [x26]
-	cmp	w0, w19
-	bhi	.L1843
-	mov	x0, x24
-	bl	buf_free
-	cbz	w25, .L1844
-	adrp	x1, .LANCHOR147
-	adrp	x0, .LC0
-	mov	w2, 655
-	add	x1, x1, :lo12:.LANCHOR147
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1845:
-	b	.L1845
-.L1843:
-	ldrh	w20, [x27]
-	ldrb	w3, [x28]
-	ldr	x1, [x24, 8]
-	ldr	x2, [x24, 24]
-	madd	w20, w20, w22, w19
-	mov	w0, w20
-	bl	ftl_read_ppa_page
-	mov	w21, w0
-	ldr	x1, [x24, 24]
-	mov	w4, w0
-	ldr	x0, [x24, 8]
-	mov	w3, w20
-	ldr	w2, [x1, 12]
-	str	w2, [sp, 32]
-	ldr	w2, [x1, 8]
-	str	w2, [sp, 24]
-	ldr	w2, [x1, 4]
-	str	w2, [sp, 16]
-	mov	w2, w19
-	add	w19, w19, 1
-	ldr	w1, [x1]
-	and	w19, w19, 65535
-	str	w1, [sp, 8]
-	ldr	w1, [x0, 12]
-	str	w1, [sp]
-	mov	w1, w22
-	ldp	w5, w6, [x0]
-	ldr	w7, [x0, 8]
+	.global	ftl_info_flush
+	.type	ftl_info_flush, %function
+ftl_info_flush:
+	stp	x29, x30, [sp, -112]!
+	mov	w1, 0
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR52
+	stp	x23, x24, [sp, 48]
+	adrp	x22, .LANCHOR155
+	ldrb	w2, [x21, #:lo12:.LANCHOR52]
+	mov	x23, x22
+	stp	x25, x26, [sp, 64]
+	adrp	x25, .LANCHOR99
+	stp	x27, x28, [sp, 80]
+	mov	w26, 0
+	stp	x19, x20, [sp, 16]
+	lsl	w2, w2, 1
+	adrp	x20, .LANCHOR154
+	str	w0, [x29, 108]
+	mov	x24, x25
+	add	x27, x22, :lo12:.LANCHOR155
+	add	x28, x25, :lo12:.LANCHOR99
+	add	x0, x20, :lo12:.LANCHOR154
+	bl	ftl_memset
+.L1819:
+	add	x0, x22, :lo12:.LANCHOR155
+	ldr	w1, [x29, 108]
+	ldrb	w6, [x22, #:lo12:.LANCHOR155]
+	ldrh	w19, [x25, #:lo12:.LANCHOR99]
+	ldrh	w4, [x0, 2]
+	adrp	x0, .LANCHOR53
+	ldr	x0, [x0, #:lo12:.LANCHOR53]
+	ldr	w3, [x0, 4]
+	add	w3, w3, 1
+	str	w3, [x0, 4]
+	add	x0, x20, :lo12:.LANCHOR154
+	str	w1, [x20, #:lo12:.LANCHOR154]
+	str	w3, [x0, 4]
+	adrp	x0, .LANCHOR29
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 12, .L1820
+	mov	w2, w4
+	mov	w1, w6
+	stp	w4, w6, [x29, 100]
 	adrp	x0, .LC73
 	add	x0, x0, :lo12:.LC73
 	bl	printf
-	mov	w3, 32
-	mov	w2, 4
-	add	x1, x23, 704
-	adrp	x0, .LC80
-	add	x0, x0, :lo12:.LC80
-	bl	rknand_print_hex
-	cmp	w21, 512
-	ccmn	w21, #1, 4, ne
-	csinc	w25, w25, wzr, ne
-	b	.L1841
-.L1844:
-	mov	w0, 0
-	ldp	x19, x20, [sp, 64]
-	ldp	x21, x22, [sp, 80]
-	ldp	x23, x24, [sp, 96]
-	ldp	x25, x26, [sp, 112]
-	ldp	x27, x28, [sp, 128]
-	ldp	x29, x30, [sp, 48]
-	add	sp, sp, 144
-	ret
-	.size	ftl_sysblk_dump, .-ftl_sysblk_dump
-	.section	.text.dump_ftl_info,"ax",@progbits
-	.align	2
-	.global	dump_ftl_info
-	.type	dump_ftl_info, %function
-dump_ftl_info:
-	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LANCHOR131
-	add	x1, x0, :lo12:.LANCHOR131
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR60
-	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR46
-	ldrh	w3, [x1, 2]
-	adrp	x20, .LANCHOR79
-	ldrb	w2, [x1, 1]
-	adrp	x21, .LANCHOR54
-	ldrb	w1, [x0, #:lo12:.LANCHOR131]
-	adrp	x0, .LC81
-	add	x0, x0, :lo12:.LC81
-	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR46]
-	ldrh	w2, [x0, 140]
-	ldrh	w1, [x0, 130]
-	adrp	x0, .LC82
-	add	x0, x0, :lo12:.LC82
-	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR60]
-	adrp	x0, .LC83
-	add	x0, x0, :lo12:.LC83
-	ldrh	w5, [x1, 26]
-	ldrh	w4, [x1, 22]
-	ldrb	w3, [x1, 21]
-	ldrh	w2, [x1, 18]
-	ldrh	w1, [x1, 16]
-	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR60]
-	adrp	x0, .LC84
-	add	x0, x0, :lo12:.LC84
-	ldrh	w5, [x1, 58]
-	ldrh	w4, [x1, 54]
-	ldrb	w3, [x1, 53]
-	ldrh	w2, [x1, 50]
-	ldrh	w1, [x1, 48]
-	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR60]
-	adrp	x19, .LANCHOR69
-	adrp	x0, .LC85
-	add	x0, x0, :lo12:.LC85
-	ldrh	w5, [x1, 90]
-	ldrh	w4, [x1, 86]
-	ldrb	w3, [x1, 85]
-	ldrh	w2, [x1, 82]
-	ldrh	w1, [x1, 80]
+	ldp	w4, w6, [x29, 100]
+.L1820:
+	adrp	x1, .LANCHOR80
+	ldrh	w0, [x27, 2]
+	ldrh	w1, [x1, #:lo12:.LANCHOR80]
+	cmp	w1, w0
+	bhi	.L1821
+	adrp	x1, .LANCHOR12
+	ldrb	w0, [x27, 1]
+	ldrb	w2, [x27]
+	mov	w4, 0
+	ldr	x6, [x1, #:lo12:.LANCHOR12]
+.L1828:
+	add	w0, w0, 1
+	and	w0, w0, 255
+	cmp	w0, 7
+	bls	.L1822
+	mov	x1, 0
+.L1827:
+	add	x3, x6, x1
+	and	w7, w1, 65535
+	ldrb	w8, [x3, 40]
+	add	w3, w8, 127
+	and	w3, w3, 255
+	cmp	w3, 125
+	bhi	.L1823
+	add	x1, x23, :lo12:.LANCHOR155
+	strb	w0, [x1, 1]
+	cbz	w4, .L1824
+	strb	w2, [x23, #:lo12:.LANCHOR155]
+.L1824:
+	adrp	x1, .LANCHOR156
+	adrp	x0, .LC0
+	mov	w2, 668
+	add	x1, x1, :lo12:.LANCHOR156
+	add	x0, x0, :lo12:.LC0
 	bl	printf
-	ldrb	w0, [x19, #:lo12:.LANCHOR69]
-	mov	w2, 4
-	ldrh	w3, [x20, #:lo12:.LANCHOR79]
-	mul	w3, w3, w0
-	adrp	x0, .LANCHOR82
-	ldr	x1, [x0, #:lo12:.LANCHOR82]
-	adrp	x0, .LC86
-	lsl	w3, w3, 1
-	add	x0, x0, :lo12:.LC86
-	bl	rknand_print_hex
-	adrp	x0, .LANCHOR56
-	ldrh	w3, [x21, #:lo12:.LANCHOR54]
-	mov	w2, 2
-	ldr	x1, [x0, #:lo12:.LANCHOR56]
-	adrp	x0, .LC87
-	add	x0, x0, :lo12:.LC87
-	bl	rknand_print_hex
-	ldr	x1, [x22, #:lo12:.LANCHOR46]
-	mov	w3, 32
-	mov	w2, 4
-	adrp	x0, .LC80
-	add	x1, x1, 704
-	add	x0, x0, :lo12:.LC80
-	bl	rknand_print_hex
-	adrp	x0, .LANCHOR59
-	ldrh	w3, [x21, #:lo12:.LANCHOR54]
-	mov	w2, 4
-	ldr	x1, [x0, #:lo12:.LANCHOR59]
-	adrp	x0, .LC88
-	add	x0, x0, :lo12:.LC88
-	bl	rknand_print_hex
-	mov	w3, 256
-	mov	w2, 2
-	adrp	x1, .LANCHOR81
-	adrp	x0, .LC89
-	add	x1, x1, :lo12:.LANCHOR81
-	add	x0, x0, :lo12:.LC89
-	bl	rknand_print_hex
-	ldrb	w0, [x19, #:lo12:.LANCHOR69]
-	mov	w2, 2
-	ldrh	w3, [x20, #:lo12:.LANCHOR79]
-	ldp	x21, x22, [sp, 32]
-	ldp	x19, x20, [sp, 16]
-	mul	w3, w3, w0
-	adrp	x0, .LANCHOR83
-	ldp	x29, x30, [sp], 48
-	lsl	w3, w3, 1
-	ldr	x1, [x0, #:lo12:.LANCHOR83]
-	adrp	x0, .LC90
-	add	x0, x0, :lo12:.LC90
-	b	rknand_print_hex
-	.size	dump_ftl_info, .-dump_ftl_info
-	.section	.text.pm_ppa_update_check,"ax",@progbits
-	.align	2
-	.global	pm_ppa_update_check
-	.type	pm_ppa_update_check, %function
-pm_ppa_update_check:
-	adrp	x3, .LANCHOR71
-	mov	w4, 21
-	ldrh	w3, [x3, #:lo12:.LANCHOR71]
-	sub	w5, w4, w3
+.L1825:
+	b	.L1825
+.L1823:
+	cmp	w8, 255
+	bne	.L1826
+	add	x1, x1, 1
+	cmp	x1, 8
+	bne	.L1827
+	mov	w7, w1
+.L1826:
+	and	w0, w7, 255
+	mov	w26, 1
+.L1822:
+	add	w1, w0, 8
 	mov	w4, 1
-	lsr	w3, w2, w3
-	lsl	w4, w4, w5
-	sub	w4, w4, #1
-	and	w4, w4, w3
-	adrp	x3, .LANCHOR70
-	ldrb	w3, [x3, #:lo12:.LANCHOR70]
-	udiv	w4, w4, w3
-	adrp	x3, .LANCHOR59
-	ldr	x3, [x3, #:lo12:.LANCHOR59]
-	add	x4, x3, x4, uxth 2
-	ldrb	w3, [x4, 2]
-	ubfx	x3, x3, 5, 3
-	cmp	w3, 1
-	ccmp	w3, 7, 4, ne
-	bne	.L1853
-	stp	x29, x30, [sp, -16]!
-	mov	w3, w2
-	mov	w2, w1
-	mov	x1, x0
-	add	x29, sp, 0
-	adrp	x0, .LC91
-	add	x0, x0, :lo12:.LC91
-	bl	printf
-	bl	dump_ftl_info
-	mov	w0, -1
-	ldp	x29, x30, [sp], 16
-	ret
-.L1853:
+	add	x1, x6, x1, sxtw
+	ldrb	w2, [x1, 32]
+	cmp	w2, 255
+	beq	.L1828
+	ldrh	w19, [x28]
+	strb	w0, [x27, 1]
 	mov	w0, 0
-	ret
-	.size	pm_ppa_update_check, .-pm_ppa_update_check
-	.section	.text.load_l2p_region,"ax",@progbits
-	.align	2
-	.global	load_l2p_region
-	.type	load_l2p_region, %function
-load_l2p_region:
-	stp	x29, x30, [sp, -64]!
-	and	w1, w1, 65535
-	cmp	w1, 31
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	stp	x21, x22, [sp, 32]
-	str	x23, [sp, 48]
-	bls	.L1859
-	adrp	x1, .LANCHOR148
+	strb	w2, [x27]
+	mul	w19, w19, w2
+	mov	w1, w19
+	bl	flash_erase_block
+	ldrb	w4, [x21, #:lo12:.LANCHOR52]
+	mov	w1, w19
+	add	x3, x20, :lo12:.LANCHOR154
+	adrp	x2, ftl_info_data_buffer
+	mov	w0, 0
+	add	x2, x2, :lo12:ftl_info_data_buffer
+	bl	ftl_prog_page
+	mov	w0, 1
+	add	w19, w19, w0
+	strh	w0, [x27, 2]
+.L1829:
+	ldrb	w4, [x21, #:lo12:.LANCHOR52]
+	mov	w1, w19
+	add	x3, x20, :lo12:.LANCHOR154
+	adrp	x2, ftl_info_data_buffer
+	mov	w0, 0
+	add	x2, x2, :lo12:ftl_info_data_buffer
+	bl	ftl_prog_page
+	cmn	w0, #1
+	ldrh	w1, [x27, 2]
+	add	w1, w1, 1
+	strh	w1, [x27, 2]
+	beq	.L1819
+	cbnz	w26, .L1830
+.L1838:
+	ldrb	w0, [x23, #:lo12:.LANCHOR155]
+	cmp	w0, 255
+	bne	.L1854
+	adrp	x1, .LANCHOR156
 	adrp	x0, .LC0
-	mov	w2, 30
-	add	x1, x1, :lo12:.LANCHOR148
+	mov	w2, 703
+	add	x1, x1, :lo12:.LANCHOR156
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1860:
-	b	.L1860
-.L1859:
-	adrp	x23, .LANCHOR46
-	and	w19, w0, 65535
-	ldr	x0, [x23, #:lo12:.LANCHOR46]
-	ldrh	w2, [x0, 698]
-	cmp	w2, w19
-	bcs	.L1861
+.L1839:
+	b	.L1839
+.L1821:
+	madd	w19, w19, w6, w4
+	cbnz	w0, .L1829
 	mov	w1, w19
-	adrp	x0, .LC92
-	add	x0, x0, :lo12:.LC92
-	bl	printf
-	adrp	x0, .LANCHOR149
-	mov	w1, 255
-	ldrh	w2, [x0, #:lo12:.LANCHOR149]
-	mov	x0, 0
-	ldr	x0, [x0, 8]
-	bl	ftl_memset
-	ldr	x0, [x23, #:lo12:.LANCHOR46]
-	ldrh	w0, [x0, 698]
-	cmp	w0, w19
-	bcs	.L1865
-	adrp	x1, .LANCHOR148
+	bl	flash_erase_block
+	b	.L1829
+.L1830:
+	ldrb	w19, [x27, 1]
+	add	x24, x24, :lo12:.LANCHOR99
+	adrp	x20, .LANCHOR12
+	add	w19, w19, 1
+.L1833:
+	cmp	w19, 7
+	bhi	.L1838
+	ldr	x1, [x20, #:lo12:.LANCHOR12]
+	add	w0, w19, 8
+	add	x0, x1, x0, sxtw
+	ldrb	w0, [x0, 32]
+	add	w1, w0, 127
+	and	w1, w1, 255
+	cmp	w1, 125
+	bhi	.L1834
+	adrp	x1, .LANCHOR156
 	adrp	x0, .LC0
-	mov	w2, 34
-	add	x1, x1, :lo12:.LANCHOR148
+	mov	w2, 696
+	add	x1, x1, :lo12:.LANCHOR156
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1863:
-	b	.L1863
-.L1861:
-	add	x0, x0, x19, sxtw 2
-	sbfiz	x1, x1, 4, 32
-	ldr	w21, [x0, 704]
-	adrp	x0, .LANCHOR93
-	add	x0, x0, :lo12:.LANCHOR93
-	add	x22, x0, x1
-	strh	w19, [x0, x1]
-	strh	wzr, [x22, 2]
-	cbnz	w21, .L1864
-	adrp	x0, .LANCHOR149
-	mov	w1, 255
-	ldrh	w2, [x0, #:lo12:.LANCHOR149]
-	ldr	x0, [x22, 8]
-	bl	ftl_memset
-.L1865:
+.L1835:
+	b	.L1835
+.L1834:
+	cmp	w0, 255
+	beq	.L1836
+	ldrh	w1, [x24]
+	mul	w1, w1, w0
 	mov	w0, 0
-	ldr	x23, [sp, 48]
+	bl	flash_erase_block
+.L1836:
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L1833
+.L1854:
 	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 64
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
 	ret
-.L1864:
-	adrp	x20, .LANCHOR141
-	adrp	x0, .LANCHOR45
-	ldr	x1, [x22, 8]
-	ldrb	w3, [x0, #:lo12:.LANCHOR45]
-	mov	w0, w21
-	ldr	x2, [x20, #:lo12:.LANCHOR141]
-	bl	ftl_read_ppa_page
-	ldr	x1, [x20, #:lo12:.LANCHOR141]
-	ldr	w2, [x1]
-	cmp	w2, w19
-	beq	.L1866
-	mov	w4, w21
-	mov	w3, w0
+	.size	ftl_info_flush, .-ftl_info_flush
+	.section	.text.ftl_info_blk_init,"ax",@progbits
+	.align	2
+	.global	ftl_info_blk_init
+	.type	ftl_info_blk_init, %function
+ftl_info_blk_init:
+	stp	x29, x30, [sp, -128]!
+	adrp	x0, .LANCHOR157
+	adrp	x1, .LANCHOR3
+	mov	w2, 16384
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, ftl_info_data_buffer
+	strb	wzr, [x0, #:lo12:.LANCHOR157]
+	add	x0, x20, :lo12:ftl_info_data_buffer
+	str	x0, [x1, #:lo12:.LANCHOR3]
+	adrp	x1, .LANCHOR2
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR53
+	ldrh	w1, [x1, #:lo12:.LANCHOR2]
+	adrp	x21, .LANCHOR155
+	stp	x25, x26, [sp, 64]
+	adrp	x26, .LANCHOR99
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR12
+	add	x1, x0, x1, lsl 2
+	stp	x27, x28, [sp, 80]
+	str	x1, [x22, #:lo12:.LANCHOR53]
+	mov	w1, 0
+	bl	ftl_memset
+	adrp	x25, .LANCHOR52
+	mov	w1, 0
+	mov	w2, 16384
+	adrp	x0, ftl_ext_info_data_buffer
+	add	x0, x0, :lo12:ftl_ext_info_data_buffer
+	bl	ftl_memset
+	mov	w27, 21574
+	ldr	x1, [x23, #:lo12:.LANCHOR12]
+	add	x0, x21, :lo12:.LANCHOR155
+	add	x26, x26, :lo12:.LANCHOR99
+	add	x25, x25, :lo12:.LANCHOR52
+	mov	x19, 7
+	movk	w27, 0x494c, lsl 16
+	strb	wzr, [x0, 1]
+	ldrb	w1, [x1, 40]
+	strb	w1, [x21, #:lo12:.LANCHOR155]
+	strh	wzr, [x0, 2]
+.L1858:
+	ldr	x1, [x23, #:lo12:.LANCHOR12]
+	add	w0, w19, 8
+	sxth	w24, w19
+	mov	w28, w19
+	add	x0, x1, x0, sxtw
+	ldrb	w0, [x0, 32]
+	cmp	w0, 255
+	bne	.L1857
+.L1862:
+	sub	x19, x19, #1
+	cmn	x19, #1
+	bne	.L1858
+	mov	w24, 0
+.L1859:
+	adrp	x0, .LANCHOR29
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 12, .L1863
+	ldr	x0, [x22, #:lo12:.LANCHOR53]
+	mov	w2, 4800
 	mov	w1, w19
-	adrp	x0, .LC93
-	add	x0, x0, :lo12:.LC93
+	ldr	w3, [x0]
+	adrp	x0, .LC75
+	add	x0, x0, :lo12:.LC75
 	bl	printf
-	ldr	x1, [x23, #:lo12:.LANCHOR46]
-	mov	w2, 4
-	adrp	x0, .LC94
-	add	x0, x0, :lo12:.LC94
-	add	x1, x1, 704
-	ldrh	w3, [x1, -6]
-	bl	rknand_print_hex
-	ldr	x1, [x22, 8]
-	mov	w3, 16
-	mov	w2, 4
-	adrp	x0, .LC95
-	add	x0, x0, :lo12:.LC95
-	bl	rknand_print_hex
-	ldr	x1, [x20, #:lo12:.LANCHOR141]
-	mov	w2, 4
-	mov	w3, 16
-	adrp	x0, .LC96
-	add	x0, x0, :lo12:.LC96
-	bl	rknand_print_hex
-	adrp	x0, .LANCHOR71
-	ldrh	w2, [x0, #:lo12:.LANCHOR71]
-	mov	w0, 21
-	sub	w1, w0, w2
-	mov	w0, 1
-	lsr	w21, w21, w2
-	lsl	w0, w0, w1
-	adrp	x1, .LANCHOR70
-	sub	w0, w0, #1
-	ldrb	w2, [x1, #:lo12:.LANCHOR70]
-	and	w0, w0, w21
-	mov	x1, 0
-	udiv	w0, w0, w2
-	bl	ftl_sblk_dump
+.L1863:
+	cmn	w19, #1
+	bne	.L1864
+	mov	w1, 0
+	mov	w2, 16384
+	add	x0, x20, :lo12:ftl_info_data_buffer
+	bl	ftl_memset
+	ldr	x0, [x22, #:lo12:.LANCHOR53]
+	mov	w1, 21574
+	movk	w1, 0x494c, lsl 16
+	str	w1, [x0]
+	mov	w0, w19
+.L1856:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+.L1857:
+	ldrh	w6, [x26]
+	add	x8, x20, :lo12:ftl_info_data_buffer
+	ldrb	w4, [x25]
+	adrp	x7, .LANCHOR154
+	add	x7, x7, :lo12:.LANCHOR154
+	mov	x2, x8
+	mov	x3, x7
+	stp	x7, x8, [x29, 104]
+	mul	w6, w6, w0
+	mov	w0, 0
+	str	w6, [x29, 124]
+	mov	w1, w6
+	bl	ftl_read_page
+	mov	w5, w0
+	cmn	w0, #1
+	ldr	w6, [x29, 124]
+	ldp	x7, x8, [x29, 104]
+	bne	.L1860
+	ldrb	w4, [x25]
+	mov	x3, x7
+	mov	x2, x8
+	add	w1, w6, 1
+	mov	w0, 0
+	bl	ftl_read_page
+	mov	w5, w0
+.L1860:
+	adrp	x0, .LANCHOR29
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 12, .L1861
+	ldr	x0, [x22, #:lo12:.LANCHOR53]
+	mov	w2, w5
+	str	w5, [x29, 124]
+	mov	w3, 576
+	mov	w1, w28
+	ldr	w4, [x0]
+	adrp	x0, .LC74
+	add	x0, x0, :lo12:.LC74
+	bl	printf
+	ldr	w5, [x29, 124]
+.L1861:
+	cmn	w5, #1
+	beq	.L1862
+	ldr	x0, [x22, #:lo12:.LANCHOR53]
+	ldr	w0, [x0]
+	cmp	w0, w27
+	bne	.L1862
+	mov	w19, w24
+	b	.L1859
+.L1864:
+	ldr	x1, [x23, #:lo12:.LANCHOR12]
+	add	w0, w24, 8
+	add	x20, x20, :lo12:ftl_info_data_buffer
+	mov	w4, 4
+	mov	x2, x20
+	adrp	x26, .LANCHOR52
+	add	x0, x1, x0, sxtw
+	mov	w27, 21574
+	add	x26, x26, :lo12:.LANCHOR52
+	movk	w27, 0x494c, lsl 16
+	ldrb	w1, [x0, 32]
+	add	x0, x21, :lo12:.LANCHOR155
+	strb	w1, [x21, #:lo12:.LANCHOR155]
+	strb	w24, [x0, 1]
+	adrp	x24, .LANCHOR154
+	add	x24, x24, :lo12:.LANCHOR154
+	mov	w0, 0
+	mov	x3, x24
+	bl	flash_get_last_written_page
+	sxth	w23, w0
+	add	w0, w0, 1
+	and	w19, w0, 65535
+	adrp	x0, .LANCHOR99
+	ldrb	w25, [x21, #:lo12:.LANCHOR155]
+	ldrh	w0, [x0, #:lo12:.LANCHOR99]
+	madd	w25, w25, w0, w23
 .L1866:
-	ldr	x0, [x20, #:lo12:.LANCHOR141]
+	tbnz	w23, #31, .L1871
+	ldrb	w4, [x26]
+	mov	x3, x24
+	mov	x2, x20
+	mov	w1, w25
+	mov	w0, 0
+	bl	ftl_read_page
+	cmn	w0, #1
+	beq	.L1867
+	ldr	x0, [x22, #:lo12:.LANCHOR53]
 	ldr	w0, [x0]
-	cmp	w19, w0
-	beq	.L1865
-	adrp	x1, .LANCHOR148
-	adrp	x0, .LC0
-	mov	w2, 55
-	add	x1, x1, :lo12:.LANCHOR148
-	add	x0, x0, :lo12:.LC0
-	bl	printf
+	cmp	w0, w27
+	bne	.L1867
+.L1871:
+	ldr	x0, [x22, #:lo12:.LANCHOR53]
+	add	x21, x21, :lo12:.LANCHOR155
+	strh	w19, [x21, 2]
+	ldr	w1, [x0, 16]
+	cmp	w1, 2048
+	bhi	.L1868
+.L1869:
+	ldr	w1, [x0, 24]
+	cmp	w1, 2048
+	bls	.L1872
+	ldr	w2, [x0, 28]
+	add	w2, w2, w1, lsr 11
+	and	w1, w1, 2047
+	stp	w1, w2, [x0, 24]
+.L1872:
+	ldr	w1, [x0, 32]
+	cmp	w1, 1024
+	bls	.L1873
+	ldr	w2, [x0, 36]
+	add	w2, w2, w1, lsr 10
+	and	w1, w1, 1023
+	stp	w1, w2, [x0, 32]
+.L1873:
+	ldr	w1, [x0, 40]
+	cmp	w1, 1024
+	bls	.L1874
+	ldr	w2, [x0, 44]
+	add	w2, w2, w1, lsr 10
+	and	w1, w1, 1023
+	stp	w1, w2, [x0, 40]
+.L1874:
+	ldr	w1, [x0, 64]
+	add	w1, w1, 1
+	str	w1, [x0, 64]
+	mov	w0, 0
+	bl	ftl_info_flush
+	mov	w0, 0
+	bl	ftl_info_flush
+	mov	w0, 0
+	b	.L1856
 .L1867:
-	b	.L1867
-	.size	load_l2p_region, .-load_l2p_region
-	.section	.text.pm_gc,"ax",@progbits
+	sub	w23, w23, #1
+	sub	w25, w25, #1
+	sxth	w23, w23
+	b	.L1866
+.L1868:
+	ldr	w2, [x0, 20]
+	add	w2, w2, w1, lsr 11
+	and	w1, w1, 2047
+	stp	w1, w2, [x0, 16]
+	b	.L1869
+	.size	ftl_info_blk_init, .-ftl_info_blk_init
+	.section	.text.ftl_ext_info_flush,"ax",@progbits
 	.align	2
-	.global	pm_gc
-	.type	pm_gc, %function
-pm_gc:
-	stp	x29, x30, [sp, -80]!
+	.global	ftl_ext_info_flush
+	.type	ftl_ext_info_flush, %function
+ftl_ext_info_flush:
+	stp	x29, x30, [sp, -96]!
+	adrp	x0, .LANCHOR5
 	add	x29, sp, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR46
-	adrp	x20, .LANCHOR101
 	stp	x21, x22, [sp, 32]
-	ldr	x0, [x19, #:lo12:.LANCHOR46]
 	stp	x23, x24, [sp, 48]
-	ldrh	w1, [x0, 688]
-	ldrh	w0, [x20, #:lo12:.LANCHOR101]
-	str	x25, [sp, 64]
-	sub	w0, w0, #1
+	ldr	w1, [x0, 520]
+	stp	x25, x26, [sp, 64]
+	str	x27, [sp, 80]
+	cbz	w1, .L1890
+	str	wzr, [x0, 520]
+.L1890:
+	adrp	x24, .LANCHOR53
+	adrp	x20, .LANCHOR80
+	adrp	x21, .LANCHOR96
+	add	x20, x20, :lo12:.LANCHOR80
+	mov	x22, x24
+	add	x21, x21, :lo12:.LANCHOR96
+	mov	w0, 0
+	bl	ftl_total_vpn_update
+.L1899:
+	ldr	x0, [x24, #:lo12:.LANCHOR53]
+	ldr	w1, [x0, 56]
+	add	w1, w1, 1
+	str	w1, [x0, 56]
+	ldrh	w1, [x0, 140]
+	ldrh	w0, [x20]
 	cmp	w1, w0
-	blt	.L1871
-	bl	pm_free_sblk
-	ldr	x2, [x19, #:lo12:.LANCHOR46]
-	ldrh	w1, [x20, #:lo12:.LANCHOR101]
-	sub	w1, w1, #1
-	ldrh	w3, [x2, 688]
-	cmp	w3, w1
-	blt	.L1871
-	add	x0, x2, x0, uxth 1
-	mov	w23, 65535
-	ldrh	w20, [x0, 416]
-	cmp	w20, w23
-	bne	.L1873
-	adrp	x1, .LANCHOR150
+	bcc	.L1891
+	bl	ftl_ext_alloc_new_blk
+.L1891:
+	ldr	x2, [x22, #:lo12:.LANCHOR53]
+	mov	w0, 65535
+	ldrh	w1, [x2, 130]
+	cmp	w1, w0
+	bne	.L1892
+	adrp	x1, .LANCHOR158
 	adrp	x0, .LC0
-	mov	w2, 127
-	add	x1, x1, :lo12:.LANCHOR150
+	mov	w2, 1603
+	add	x1, x1, :lo12:.LANCHOR158
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1874:
-	b	.L1874
-.L1873:
-	bl	pm_select_ram_region
-	and	x24, x0, 65535
-	adrp	x1, .LANCHOR93
-	lsl	x0, x24, 4
-	add	x2, x1, :lo12:.LANCHOR93
-	mov	x22, x19
-	add	x19, x2, x0
-	mov	x21, x24
-	ldrh	w0, [x2, x0]
-	cmp	w0, w23
-	mov	x23, x1
-	beq	.L1875
-	ldr	x1, [x19, 8]
-	cbz	x1, .L1875
-	ldrsh	w2, [x19, 2]
-	tbz	w2, #31, .L1875
-	bl	pm_write_page
-	ldrh	w0, [x19, 2]
-	and	w0, w0, 32767
-	strh	w0, [x19, 2]
-.L1875:
-	add	x1, x23, :lo12:.LANCHOR93
-	adrp	x25, .LANCHOR71
-	add	x24, x1, x24, lsl 4
-	add	x25, x25, :lo12:.LANCHOR71
-	mov	w19, 0
-.L1876:
-	ldr	x1, [x22, #:lo12:.LANCHOR46]
-	ldrh	w0, [x1, 698]
-	cmp	w0, w19
-	bhi	.L1878
-	bl	pm_free_sblk
-.L1871:
+.L1893:
+	b	.L1893
+.L1892:
+	ldrh	w0, [x21]
+	mov	w19, 21
+	adrp	x25, .LANCHOR52
+	adrp	x26, .LANCHOR154
+	sub	w0, w19, w0
+	mov	w19, 1
+	add	x23, x26, :lo12:.LANCHOR154
+	asr	w27, w1, w0
+	lsl	w19, w19, w0
+	adrp	x0, .LANCHOR99
+	sub	w19, w19, #1
+	and	w19, w19, w1
+	ldrh	w1, [x0, #:lo12:.LANCHOR99]
+	ldrh	w0, [x2, 140]
+	ldrb	w2, [x25, #:lo12:.LANCHOR52]
+	madd	w19, w19, w1, w0
+	lsl	w2, w2, 1
+	mov	w1, 0
+	mov	x0, x23
+	bl	ftl_memset
+	and	w19, w19, 65535
+	ldr	x0, [x22, #:lo12:.LANCHOR53]
+	mov	w1, w19
+	ldrb	w4, [x25, #:lo12:.LANCHOR52]
+	mov	x3, x23
+	str	wzr, [x26, #:lo12:.LANCHOR154]
+	adrp	x2, ftl_ext_info_data_buffer
+	add	x2, x2, :lo12:ftl_ext_info_data_buffer
+	ldr	w0, [x0, 56]
+	str	w0, [x23, 4]
+	mov	w0, w27
+	bl	ftl_prog_page
+	ldr	x2, [x22, #:lo12:.LANCHOR53]
+	ldrh	w1, [x2, 140]
+	add	w1, w1, 1
+	and	w1, w1, 65535
+	strh	w1, [x2, 140]
+	cmp	w1, 1
+	beq	.L1899
+	cmn	w0, #1
+	beq	.L1899
 	mov	w0, 0
-	ldr	x25, [sp, 64]
+	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 80
-	ret
-.L1878:
-	add	x1, x1, x19, sxtw 2
-	ldrh	w3, [x25]
-	mov	w0, 21
-	sub	w2, w0, w3
-	mov	w0, 1
-	ldr	w1, [x1, 704]
-	lsl	w0, w0, w2
-	sub	w0, w0, #1
-	lsr	w1, w1, w3
-	and	w0, w0, w1
-	adrp	x1, .LANCHOR70
-	ldrb	w1, [x1, #:lo12:.LANCHOR70]
-	udiv	w0, w0, w1
-	cmp	w20, w0, uxth
-	bne	.L1877
-	mov	w1, w21
-	mov	w0, w19
-	bl	load_l2p_region
-	ldr	x1, [x24, 8]
-	mov	w0, w19
-	bl	pm_write_page
-.L1877:
-	add	w19, w19, 1
-	and	w19, w19, 65535
-	b	.L1876
-	.size	pm_gc, .-pm_gc
-	.section	.text.pm_flush_id,"ax",@progbits
-	.align	2
-	.global	pm_flush_id
-	.type	pm_flush_id, %function
-pm_flush_id:
-	stp	x29, x30, [sp, -32]!
-	ubfiz	x0, x0, 4, 16
-	adrp	x2, .LANCHOR93
-	add	x2, x2, :lo12:.LANCHOR93
-	add	x29, sp, 0
-	str	x19, [sp, 16]
-	add	x19, x2, x0
-	ldrh	w0, [x2, x0]
-	ldr	x1, [x19, 8]
-	bl	pm_write_page
-	ldrh	w0, [x19, 2]
-	and	w0, w0, 32767
-	strh	w0, [x19, 2]
-	adrp	x19, .LANCHOR91
-	ldr	w0, [x19, #:lo12:.LANCHOR91]
-	cbz	w0, .L1884
-	bl	pm_gc
-	str	wzr, [x19, #:lo12:.LANCHOR91]
-.L1884:
-	mov	w0, 0
-	ldr	x19, [sp, 16]
-	ldp	x29, x30, [sp], 32
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
 	ret
-	.size	pm_flush_id, .-pm_flush_id
-	.section	.text.pm_flush,"ax",@progbits
+	.size	ftl_ext_info_flush, .-ftl_ext_info_flush
+	.section	.text.ftl_ext_info_init,"ax",@progbits
 	.align	2
-	.global	pm_flush
-	.type	pm_flush, %function
-pm_flush:
-	stp	x29, x30, [sp, -32]!
+	.global	ftl_ext_info_init
+	.type	ftl_ext_info_init, %function
+ftl_ext_info_init:
+	stp	x29, x30, [sp, -112]!
+	adrp	x0, .LANCHOR109
+	mov	w4, 4
 	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR53
+	strh	wzr, [x0, #:lo12:.LANCHOR109]
+	ldr	x0, [x22, #:lo12:.LANCHOR53]
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR93
-	add	x19, x19, :lo12:.LANCHOR93
-	mov	w20, 0
-	add	x19, x19, 2
-.L1891:
-	ldrsh	w0, [x19]
-	tbz	w0, #31, .L1890
-	mov	w0, w20
-	bl	pm_flush_id
-.L1890:
+	stp	x25, x26, [sp, 64]
+	adrp	x25, ftl_ext_info_data_buffer
+	stp	x23, x24, [sp, 48]
+	add	x2, x25, :lo12:ftl_ext_info_data_buffer
+	ldrh	w19, [x0, 130]
+	adrp	x0, .LANCHOR96
+	stp	x27, x28, [sp, 80]
+	adrp	x24, .LANCHOR154
+	ldrh	w1, [x0, #:lo12:.LANCHOR96]
+	mov	w0, 21
+	and	w26, w19, 16383
+	add	x3, x24, :lo12:.LANCHOR154
+	sub	w0, w0, w1
+	mov	w1, w26
+	asr	w19, w19, w0
+	and	w19, w19, 255
+	mov	w0, w19
+	bl	flash_get_last_written_page
+	sxth	w21, w0
+	adrp	x0, .LANCHOR29
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 12, .L1905
+	adrp	x1, .LANCHOR159
+	adrp	x0, .LC33
+	mov	w3, w21
+	mov	w2, 1646
+	add	x1, x1, :lo12:.LANCHOR159
+	add	x0, x0, :lo12:.LC33
+	bl	printf
+.L1905:
+	adrp	x27, .LANCHOR52
+	adrp	x28, .LANCHOR99
+	mov	w5, 20038
+	add	x27, x27, :lo12:.LANCHOR52
+	add	x28, x28, :lo12:.LANCHOR99
+	mov	w23, 0
+	movk	w5, 0x4549, lsl 16
+.L1906:
+	and	w20, w21, 65535
+	sub	w0, w20, w23
+	tbnz	x0, 15, .L1911
+	ldrh	w0, [x28]
+	sub	w1, w21, w23
+	ldrb	w4, [x27]
+	add	x3, x24, :lo12:.LANCHOR154
+	str	w5, [x29, 108]
+	add	x2, x25, :lo12:ftl_ext_info_data_buffer
+	madd	w1, w0, w26, w1
+	mov	w0, w19
+	bl	flash_read_page_en
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	ldr	w5, [x29, 108]
+	beq	.L1907
+	adrp	x0, .LANCHOR5
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	ldr	w0, [x0]
+	cmp	w0, w5
+	bne	.L1907
+.L1911:
+	bl	zftl_sblk_list_init
+	ldr	x0, [x22, #:lo12:.LANCHOR53]
+	ldrh	w1, [x0, 140]
+	cmp	w1, w21
+	bgt	.L1909
 	add	w20, w20, 1
-	add	x19, x19, 16
-	and	w20, w20, 65535
-	cmp	w20, 32
-	bne	.L1891
-	mov	w0, 0
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	ret
-	.size	pm_flush, .-pm_flush
-	.section	.text.flt_sys_flush,"ax",@progbits
-	.align	2
-	.global	flt_sys_flush
-	.type	flt_sys_flush, %function
-flt_sys_flush:
-	stp	x29, x30, [sp, -16]!
-	add	x29, sp, 0
-	bl	ftl_flush
-	bl	pm_flush
+	strh	w20, [x0, 140]
 	bl	ftl_ext_info_flush
-	ldp	x29, x30, [sp], 16
+.L1909:
+	adrp	x0, .LANCHOR5
+	mov	w1, -1
+	ldp	x19, x20, [sp, 16]
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	str	wzr, [x0, 520]
+	str	wzr, [x0, 604]
+	str	wzr, [x0, 608]
+	adrp	x0, .LANCHOR110
+	strh	w1, [x0, #:lo12:.LANCHOR110]
 	mov	w0, 0
-	b	ftl_info_flush
-	.size	flt_sys_flush, .-flt_sys_flush
-	.section	.text.rk_ftl_de_init,"ax",@progbits
-	.align	2
-	.global	rk_ftl_de_init
-	.type	rk_ftl_de_init, %function
-rk_ftl_de_init:
-	stp	x29, x30, [sp, -16]!
-	add	x29, sp, 0
-	bl	FlashDeInit
-	bl	flt_sys_flush
-	ldp	x29, x30, [sp], 16
-	b	FlashDeInit
-	.size	rk_ftl_de_init, .-rk_ftl_de_init
-	.section	.text.pm_init,"ax",@progbits
+	ldp	x29, x30, [sp], 112
+	ret
+.L1907:
+	add	w23, w23, 1
+	b	.L1906
+	.size	ftl_ext_info_init, .-ftl_ext_info_init
+	.section	.text.ftl_low_format,"ax",@progbits
 	.align	2
-	.global	pm_init
-	.type	pm_init, %function
-pm_init:
-	stp	x29, x30, [sp, -112]!
+	.global	ftl_low_format
+	.type	ftl_low_format, %function
+ftl_low_format:
+	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	mov	w24, w0
-	adrp	x0, .LANCHOR91
 	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR99
 	stp	x21, x22, [sp, 32]
-	adrp	x20, .LANCHOR93
+	add	x20, x20, :lo12:.LANCHOR99
 	stp	x25, x26, [sp, 64]
-	add	x19, x20, :lo12:.LANCHOR93
-	str	wzr, [x0, #:lo12:.LANCHOR91]
-	mov	w0, 64
-	stp	x27, x28, [sp, 80]
-	bl	ftl_malloc
-	adrp	x1, .LANCHOR141
-	adrp	x22, .LANCHOR45
-	add	x23, x19, 512
-	mov	x21, x1
-	add	x22, x22, :lo12:.LANCHOR45
-	str	x0, [x1, #:lo12:.LANCHOR141]
-	mov	w25, -1
-.L1900:
-	strh	w25, [x19]
-	strh	wzr, [x19, 2]
-	cbz	w24, .L1899
-	ldrb	w0, [x22]
-	lsl	w0, w0, 9
-	bl	ftl_malloc
-	str	x0, [x19, 8]
-.L1899:
-	add	x19, x19, 16
-	cmp	x19, x23
-	bne	.L1900
-	add	x0, x20, :lo12:.LANCHOR93
-	adrp	x19, .LANCHOR46
-	ldr	x24, [x21, #:lo12:.LANCHOR141]
-	mov	w4, 4
-	ldr	x25, [x0, 8]
-	mov	x3, x24
-	ldr	x0, [x19, #:lo12:.LANCHOR46]
-	mov	x2, x25
-	ldrh	w1, [x0, 692]
-	ldrb	w0, [x0, 694]
-	bl	flash_get_last_written_page
-	sxth	w26, w0
-	ldr	x0, [x19, #:lo12:.LANCHOR46]
-	mov	w23, w26
-	ldrh	w2, [x0, 696]
-	cmp	w2, w26
-	bgt	.L1901
-	ldrh	w1, [x0, 692]
-	mov	w3, w26
-	adrp	x0, .LC97
-	add	x0, x0, :lo12:.LC97
-	adrp	x27, .LANCHOR75
-	adrp	x28, .LANCHOR45
-	add	x27, x27, :lo12:.LANCHOR75
-	add	x28, x28, :lo12:.LANCHOR45
-	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR46]
-	ldrsh	w21, [x0, 696]
-.L1902:
-	cmp	w21, w26
-	ble	.L1904
-	adrp	x0, .LANCHOR133
-	mov	w1, 1
-	add	x20, x20, :lo12:.LANCHOR93
-	add	w23, w23, 1
-	strb	w1, [x0, #:lo12:.LANCHOR133]
-	ldr	x0, [x19, #:lo12:.LANCHOR46]
-	strh	w23, [x0, 696]
-	bl	pm_free_sblk
-	ldr	x1, [x20, 8]
-	mov	w0, -1
-	bl	pm_write_page
-	ldr	x1, [x20, 8]
-	mov	w0, -1
-	bl	pm_write_page
-.L1901:
-	bl	pm_free_sblk
-	bl	pm_gc
-	mov	w0, 0
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 112
-	ret
-.L1904:
-	ldr	x0, [x19, #:lo12:.LANCHOR46]
-	mov	x3, x24
-	ldrh	w1, [x27]
-	mov	x2, x25
-	ldrb	w4, [x28]
-	ldrh	w22, [x0, 692]
-	ldrb	w0, [x0, 694]
-	madd	w22, w22, w1, w21
-	mov	w1, w22
-	bl	flash_read_page_en
-	mov	w4, w0
-	ldr	x0, [x19, #:lo12:.LANCHOR46]
-	str	w4, [x29, 108]
-	mov	w2, w22
-	ldr	w1, [x0, 48]
-	ldrh	w3, [x0, 694]
-	add	w1, w1, 1
-	str	w1, [x0, 48]
-	adrp	x0, .LC98
-	add	x0, x0, :lo12:.LC98
-	ldr	w1, [x24]
-	bl	printf
-	ldr	w4, [x29, 108]
-	cmp	w4, 512
-	ccmn	w4, #1, 4, ne
-	beq	.L1903
-	ldr	x1, [x19, #:lo12:.LANCHOR46]
-	ldr	w0, [x24]
-	ldrh	w2, [x1, 698]
-	cmp	w0, w2
-	bcs	.L1903
-	add	x0, x1, x0, uxtw 2
-	str	w22, [x0, 704]
-.L1903:
-	add	w21, w21, 1
-	sxth	w21, w21
-	b	.L1902
-	.size	pm_init, .-pm_init
-	.section	.text.pm_log2phys,"ax",@progbits
-	.align	2
-	.global	pm_log2phys
-	.type	pm_log2phys, %function
-pm_log2phys:
-	stp	x29, x30, [sp, -80]!
-	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	mov	x22, x1
-	adrp	x1, .LANCHOR45
-	stp	x19, x20, [sp, 16]
-	stp	x25, x26, [sp, 64]
-	ldrb	w1, [x1, #:lo12:.LANCHOR45]
+	adrp	x21, .LANCHOR12
+	mov	x25, x21
 	stp	x23, x24, [sp, 48]
-	mov	w23, w2
-	lsl	w21, w1, 7
-	ubfiz	w20, w1, 7, 9
-	adrp	x1, .LANCHOR47
-	udiv	w21, w0, w21
-	ldr	w2, [x1, #:lo12:.LANCHOR47]
-	cmp	w0, w2
-	and	w25, w21, 65535
-	msub	w20, w25, w20, w0
-	bcc	.L1914
-	mov	w1, w0
-	adrp	x0, .LC99
-	add	x0, x0, :lo12:.LC99
+	mov	w19, 8
+.L1923:
+	ldr	x0, [x21, #:lo12:.LANCHOR12]
+	add	x0, x0, x19, sxtw
+	ldrb	w0, [x0, 32]
+	add	w1, w0, 127
+	and	w1, w1, 255
+	cmp	w1, 125
+	bhi	.L1920
+	adrp	x1, .LANCHOR160
+	adrp	x0, .LC0
+	mov	w2, 1817
+	add	x1, x1, :lo12:.LANCHOR160
+	add	x0, x0, :lo12:.LC0
 	bl	printf
-	mov	w0, -1
-.L1913:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
-	ret
-.L1914:
-	adrp	x24, .LANCHOR93
-	add	x0, x24, :lo12:.LANCHOR93
-	and	x20, x20, 65535
-	add	x0, x0, 8
-	mov	x19, 0
+.L1921:
+	b	.L1921
 .L1920:
-	ldr	x1, [x0]
-	cbz	x1, .L1916
-	ldrh	w1, [x0, -8]
-	cmp	w1, w25
-	bne	.L1916
-.L1917:
-	cbnz	w23, .L1918
-	add	x0, x24, :lo12:.LANCHOR93
-	add	x0, x0, x19, lsl 4
-	ldr	x0, [x0, 8]
-	ldr	w0, [x0, x20, lsl 2]
-	str	w0, [x22]
-.L1919:
-	add	x24, x24, :lo12:.LANCHOR93
-	add	x19, x24, x19, lsl 4
-	ldrh	w0, [x19, 2]
-	mvn	x1, x0
-	tst	x1, 32767
+	cmp	w0, 255
 	beq	.L1922
-	add	w0, w0, 1
-	strh	w0, [x19, 2]
-.L1922:
+	ldrh	w1, [x20]
+	mul	w1, w1, w0
 	mov	w0, 0
-	b	.L1913
-.L1918:
-	add	x0, x24, :lo12:.LANCHOR93
-	ldr	w2, [x22]
-	add	x0, x0, x19, lsl 4
-	ldr	x1, [x0, 8]
-	str	w2, [x1, x20, lsl 2]
-	ldrh	w1, [x0, 2]
-	orr	w1, w1, -32768
-	strh	w1, [x0, 2]
-	adrp	x0, .LANCHOR94
-	strb	w21, [x0, #:lo12:.LANCHOR94]
-	b	.L1919
-.L1916:
+	bl	flash_erase_block
+.L1922:
 	add	w19, w19, 1
-	add	x0, x0, 16
-	and	x19, x19, 65535
-	cmp	w19, 32
-	bne	.L1920
-	bl	pm_select_ram_region
-	and	x19, x0, 65535
-	sbfiz	x1, x19, 4, 32
-	add	x2, x24, :lo12:.LANCHOR93
-	add	x3, x2, x1
-	mov	w26, w0
-	ldrh	w2, [x2, x1]
-	mov	w1, 65535
-	cmp	w2, w1
-	beq	.L1921
-	ldrsh	w1, [x3, 2]
-	tbz	w1, #31, .L1921
-	bl	pm_flush_id
-.L1921:
-	adrp	x0, .LANCHOR151
-	mov	w1, w26
-	strb	w19, [x0, #:lo12:.LANCHOR151]
-	mov	w0, w25
-	bl	load_l2p_region
-	b	.L1917
-	.size	pm_log2phys, .-pm_log2phys
-	.section	.text.ftl_read_ahead,"ax",@progbits
-	.align	2
-	.global	ftl_read_ahead
-	.type	ftl_read_ahead, %function
-ftl_read_ahead:
-	stp	x29, x30, [sp, -80]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR49
-	stp	x21, x22, [sp, 32]
-	ldr	w0, [x20, #:lo12:.LANCHOR49]
-	stp	x23, x24, [sp, 48]
-	cmn	w0, #1
-	beq	.L1929
-	mov	w0, 0
-	bl	buf_alloc
-	mov	x19, x0
-	mov	w0, -1
-	cbz	x19, .L1928
-	ldr	w21, [x20, #:lo12:.LANCHOR49]
-	str	w21, [x19, 36]
-	str	w0, [x20, #:lo12:.LANCHOR49]
-	mov	w0, w21
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 76]
-	ldr	x20, [x19, 8]
-	cmn	w0, #1
-	ldr	x22, [x19, 24]
-	bne	.L1931
-	mov	w2, 0
-	add	x1, x29, 76
-	mov	w0, w21
-	bl	pm_log2phys
-.L1931:
-	ldr	w0, [x29, 76]
-	stp	w0, w0, [x19, 40]
-	cmn	w0, #1
-	bne	.L1932
-	adrp	x0, .LANCHOR45
+	cmp	w19, 16
+	bne	.L1923
+	bl	sblk_init
+	adrp	x19, .LANCHOR53
+	bl	ftl_info_blk_init
+	adrp	x22, .LANCHOR3
 	mov	w1, 0
-	ldrb	w2, [x0, #:lo12:.LANCHOR45]
-	mov	x0, x20
-	lsl	w2, w2, 9
+	mov	w2, 16384
+	adrp	x0, ftl_info_data_buffer
+	add	x0, x0, :lo12:ftl_info_data_buffer
 	bl	ftl_memset
-	ldrb	w0, [x19, 2]
-	orr	w0, w0, 8
-	strb	w0, [x19, 2]
-.L1929:
-	mov	w0, 0
-.L1928:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 80
-	ret
-.L1932:
-	mov	w1, 1
-	mov	x0, x19
-	bl	sblk_read_page
-	ldr	w23, [x19, 52]
-	cmp	w23, 256
-	bne	.L1933
-	adrp	x0, .LANCHOR71
-	mov	w20, 21
-	mov	w24, 1
-	ldrh	w1, [x0, #:lo12:.LANCHOR71]
-	ldr	w0, [x29, 76]
-	sub	w20, w20, w1
-	ldp	w2, w3, [x19, 36]
-	lsr	w0, w0, w1
-	lsl	w20, w24, w20
-	sub	w20, w20, #1
-	and	w20, w20, w0
-	adrp	x0, .LANCHOR70
-	ldrb	w0, [x0, #:lo12:.LANCHOR70]
-	udiv	w20, w20, w0
-	adrp	x0, .LC100
-	add	x0, x0, :lo12:.LC100
-	and	w1, w20, 65535
-	bl	printf
-	mov	w2, 0
-	mov	w1, w24
-	mov	w0, w20
-	bl	gc_add_sblk
-.L1933:
-	ldr	w5, [x22, 4]
-	cmp	w21, w5
-	beq	.L1934
-	ldrb	w1, [x19, 1]
-	adrp	x0, .LC101
-	ldr	w4, [x22]
-	mov	w2, w21
-	ldp	w6, w7, [x22, 8]
-	add	x0, x0, :lo12:.LC101
-	ldr	w3, [x29, 76]
-	bl	printf
-.L1934:
-	ldr	w0, [x22, 4]
-	cmp	w21, w0
-	bne	.L1935
-	cmn	w23, #1
-	bne	.L1929
-.L1935:
-	adrp	x1, .LANCHOR152
-	adrp	x0, .LC0
-	mov	w2, 758
-	add	x1, x1, :lo12:.LANCHOR152
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1936:
-	b	.L1936
-	.size	ftl_read_ahead, .-ftl_read_ahead
-	.section	.text.gc_update_l2p_map,"ax",@progbits
-	.align	2
-	.global	gc_update_l2p_map
-	.type	gc_update_l2p_map, %function
-gc_update_l2p_map:
-	stp	x29, x30, [sp, -144]!
-	adrp	x0, .LANCHOR60
-	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
+	adrp	x20, .LANCHOR2
+	ldr	x3, [x19, #:lo12:.LANCHOR53]
+	mov	w5, 1
+	ldr	x1, [x22, #:lo12:.LANCHOR3]
+	ldrh	w4, [x20, #:lo12:.LANCHOR2]
+	ldrh	w0, [x3, 134]
+	add	x1, x1, x0, uxth 2
+.L1924:
+	cmp	w0, w4
+	bcc	.L1925
+	mov	w0, 21574
+	adrp	x24, .LANCHOR60
+	add	x24, x24, :lo12:.LANCHOR60
+	movk	w0, 0x494c, lsl 16
+	strh	wzr, [x3, 148]
 	mov	w21, 0
-	stp	x23, x24, [sp, 48]
-	mov	w24, 0
-	stp	x25, x26, [sp, 64]
-	adrp	x26, .LANCHOR64
-	stp	x27, x28, [sp, 80]
-	mov	w27, 0
-	ldr	x22, [x0, #:lo12:.LANCHOR60]
-	add	x0, x26, :lo12:.LANCHOR64
-	stp	x19, x20, [sp, 16]
-	str	x0, [x29, 104]
-.L1943:
-	adrp	x0, .LANCHOR79
-	ldrh	w0, [x0, #:lo12:.LANCHOR79]
-	cmp	w27, w0
-	bge	.L1953
-	lsl	w23, w27, 1
-	mov	x19, 0
-	sub	w0, w23, #1
-	str	w0, [x29, 124]
-	b	.L1954
-.L1950:
-	adrp	x1, .LANCHOR107
-	sbfiz	x0, x24, 2, 32
-	ldr	x1, [x1, #:lo12:.LANCHOR107]
-	ldr	w23, [x1, x0]
-	cmn	w23, #1
-	beq	.L1944
-	adrp	x1, .LANCHOR108
-	ldr	x1, [x1, #:lo12:.LANCHOR108]
-	ldr	w20, [x1, x0]
-	mov	w0, w23
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 140]
-	cmn	w0, #1
-	bne	.L1945
-	mov	w2, 0
-	add	x1, x29, 140
-	mov	w0, w23
-	bl	pm_log2phys
-.L1945:
-	ldr	w0, [x29, 140]
-	cmp	w20, w0
-	bne	.L1946
-	ldr	x0, [x29, 112]
-	ldrh	w1, [x25]
-	ldrh	w0, [x0, 96]
-	mul	w0, w0, w1
-	ldr	x1, [x29, 104]
-	ldrb	w1, [x1]
-	cmp	w1, 3
-	bne	.L1947
-	add	w0, w0, w27
-	orr	w0, w0, w28, lsl 24
-.L1959:
+	mov	w26, 1
+	str	w0, [x3]
+.L1926:
+	ldrh	w0, [x20, #:lo12:.LANCHOR2]
+	adrp	x23, .LANCHOR95
+	cmp	w0, w21
+	bhi	.L1934
+	adrp	x21, .LANCHOR5
+	mov	w2, 16384
+	mov	w1, 0
+	adrp	x0, ftl_ext_info_data_buffer
+	add	x0, x0, :lo12:ftl_ext_info_data_buffer
+	bl	ftl_memset
+	ldr	x0, [x21, #:lo12:.LANCHOR5]
+	mov	w1, 20038
+	ldr	x7, [x19, #:lo12:.LANCHOR53]
+	movk	w1, 0x4549, lsl 16
+	ldr	x2, [x22, #:lo12:.LANCHOR3]
+	mov	w5, 3
+	ldrh	w3, [x7, 148]
+	str	w1, [x0]
+	mov	w1, 2
+	ldr	x0, [x25, #:lo12:.LANCHOR12]
+	ldrb	w6, [x23, #:lo12:.LANCHOR95]
+	cmp	w6, 1
+	ldrb	w0, [x0, 47]
+	csinc	w5, w5, wzr, ne
+	csinc	w1, w1, wzr, ne
+	and	w5, w5, 255
+	and	w1, w1, 65535
+	udiv	w0, w0, w6
+	and	w8, w0, 65535
+	ubfiz	x0, x0, 2, 8
+	add	x0, x0, 4
+	add	w24, w8, 1
+	add	x0, x2, x0
+.L1935:
+	ldrb	w4, [x2, 2]
+	add	x2, x2, 4
+	strb	w5, [x2, -1]
+	orr	w4, w4, -32
+	strb	w4, [x2, -2]
+	cmp	x2, x0
+	bne	.L1935
+	add	w0, w1, w3
+	mov	w4, 16
+	mul	w1, w1, w8
+	sdiv	w4, w4, w6
+	add	w1, w1, w0, uxth
+	adrp	x0, .LANCHOR29
+	strh	w1, [x7, 148]
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	add	w4, w24, w4
+	and	w4, w4, 65535
+	strh	w4, [x7, 134]
+	tbz	x0, 12, .L1936
+	adrp	x0, .LC76
+	mov	w3, w24
+	mov	w2, 128
+	mov	w1, 1862
+	add	x0, x0, :lo12:.LC76
+	bl	printf
+.L1936:
+	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	mov	w2, 128
+	mov	w1, 255
+	add	x0, x0, 160
+	bl	ftl_memset
+	ldrb	w6, [x23, #:lo12:.LANCHOR95]
+	adrp	x0, .LANCHOR100
+	ldr	x11, [x22, #:lo12:.LANCHOR3]
+	adrp	x22, .LANCHOR96
+	ldr	x8, [x19, #:lo12:.LANCHOR53]
+	and	w7, w6, 65535
+	ldrb	w12, [x0, #:lo12:.LANCHOR100]
+	mov	w2, 21
+	ldrh	w0, [x22, #:lo12:.LANCHOR96]
+	mov	w23, 0
+	mul	w1, w24, w7
+	sub	w0, w2, w0
+	ldrh	w10, [x8, 134]
 	mov	w2, 1
-	add	x1, x29, 136
-	str	w0, [x29, 136]
+	and	w1, w1, 65535
+	lsl	w2, w2, w0
+	and	w2, w2, 65535
+.L1937:
+	cmp	w24, w10
+	bcc	.L1943
+	adrp	x0, .LANCHOR4
+	ldrh	w2, [x20, #:lo12:.LANCHOR2]
+	mov	w1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR4]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	bl	zftl_sblk_list_init
+	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	ldrh	w1, [x20, #:lo12:.LANCHOR2]
+	ldrh	w2, [x0, 134]
+	strh	w23, [x0, 112]
+	sub	w1, w1, w2
+	strh	wzr, [x0, 114]
+	strh	w1, [x0, 116]
+	strh	wzr, [x0, 118]
+	mov	w0, 1
+	bl	ftl_alloc_sblk
+	mov	w23, w0
+	mov	w1, 0
+	bl	ftl_erase_sblk
+	ldr	x1, [x19, #:lo12:.LANCHOR53]
 	mov	w0, w23
-	bl	pm_log2phys
+	add	x1, x1, 672
+	bl	ftl_get_blk_list_in_sblk
+	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	mov	w1, 65533
+	ldrh	w20, [x0, 672]
+	strh	wzr, [x0, 690]
+	sub	w2, w20, #1
+	cmp	w1, w2, uxth
+	bcs	.L1944
+	adrp	x1, .LANCHOR160
+	adrp	x0, .LC0
+	mov	w2, 1893
+	add	x1, x1, :lo12:.LANCHOR160
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1945:
+	b	.L1945
+.L1925:
+	ldrb	w2, [x1, 2]
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	add	x1, x1, 4
+	and	w2, w2, 31
+	bfi	w2, w5, 3, 2
+	strb	w2, [x1, -2]
+	b	.L1924
+.L1934:
+	strh	w21, [x24]
+	mov	w0, w21
+	bl	ftl_test_block
+	ldrb	w11, [x23, #:lo12:.LANCHOR95]
+	adrp	x0, .LANCHOR100
+	ldr	x6, [x22, #:lo12:.LANCHOR3]
+	mov	w7, 0
+	ldrb	w14, [x0, #:lo12:.LANCHOR100]
+	mov	w10, 0
+	ldr	x13, [x19, #:lo12:.LANCHOR53]
+	mov	w8, 0
+	mul	w12, w21, w11
+	add	x6, x6, x21, uxth 2
+.L1927:
+	cmp	w8, w14
+	bcs	.L1931
+	add	w15, w11, w7
+	b	.L1932
+.L1930:
+	add	w1, w7, w12
+	mov	w0, w8
+	bl	flash_check_bad_block
+	cbz	w0, .L1928
+	ldrb	w1, [x6, 3]
+	lsl	w0, w26, w7
+	orr	w0, w0, w1
+	strb	w0, [x6, 3]
+	ldrh	w0, [x13, 148]
+	add	w0, w0, 1
+	strh	w0, [x13, 148]
+.L1929:
+	add	w7, w7, 1
+.L1932:
+	cmp	w7, w15
+	bne	.L1930
+	add	w8, w8, 1
+	sub	w12, w12, w11
+	and	w8, w8, 65535
+	b	.L1927
+.L1928:
+	add	w10, w10, 1
+	and	w10, w10, 65535
+	b	.L1929
+.L1931:
+	cbnz	w10, .L1933
+	ldrb	w0, [x6, 2]
+	orr	w0, w0, -32
+	strb	w0, [x6, 2]
+.L1933:
 	add	w21, w21, 1
-	adrp	x0, .LANCHOR71
-	ldrh	w2, [x0, #:lo12:.LANCHOR71]
-	mov	w0, 21
-	sub	w1, w0, w2
-	mov	w0, 1
-	lsr	w20, w20, w2
-	lsl	w0, w0, w1
-	sub	w0, w0, #1
-	and	w20, w0, w20
-	adrp	x0, .LANCHOR70
-	ldrb	w0, [x0, #:lo12:.LANCHOR70]
-	udiv	w0, w20, w0
-	bl	ftl_vpn_decrement
-.L1946:
+	and	w21, w21, 65535
+	b	.L1926
+.L1943:
+	add	x13, x11, x24, uxth 2
+	mov	w14, 0
+	mov	w15, 0
+	mov	w3, 0
+	ldrb	w0, [x13, 2]
+	orr	w0, w0, -32
+	strb	w0, [x13, 2]
+.L1938:
+	cmp	w3, w12
+	bcc	.L1947
 	add	w24, w24, 1
-.L1944:
-	add	w28, w28, 1
-.L1952:
-	ldrb	w0, [x26, #:lo12:.LANCHOR64]
-	cmp	w28, w0
-	ble	.L1950
-	add	x19, x19, 1
-.L1954:
-	ldrb	w0, [x22, 89]
-	cmp	w0, w19
-	ble	.L1951
-	add	x0, x22, x19, lsl 1
-	adrp	x25, .LANCHOR75
-	mov	w28, 1
-	add	x25, x25, :lo12:.LANCHOR75
-	str	x0, [x29, 112]
-	b	.L1952
+	add	w1, w7, w1
+	and	w24, w24, 65535
+	and	w1, w1, 65535
+	b	.L1937
+.L1941:
+	ldrb	w5, [x13, 3]
+	add	w16, w15, w4
+	asr	w5, w5, w16
+	tbnz	x5, 0, .L1939
+	cmp	w6, 1
+	bls	.L1946
+	and	w0, w0, 1
+	add	w0, w1, w0
+	and	w0, w0, 65535
+.L1940:
+	add	x5, x8, x23, sxtw 1
+	add	w23, w23, 1
+	and	w23, w23, 65535
+	add	w0, w0, w14
+	strh	w0, [x5, 160]
+.L1939:
+	add	x4, x4, 1
+.L1942:
+	and	w0, w4, 65535
+	cmp	w0, w7
+	bcc	.L1941
+	add	w3, w3, 1
+	add	w0, w2, w14
+	and	w3, w3, 65535
+	add	w15, w15, w6
+	and	w14, w0, 65535
+	b	.L1938
+.L1946:
+	mov	w0, w1
+	b	.L1940
 .L1947:
-	cmp	w1, 2
-	bne	.L1949
-	ldr	w1, [x29, 124]
-	add	w0, w0, w1
-	add	w0, w0, w28
-	orr	w0, w0, 33554432
-	b	.L1959
-.L1949:
-	add	w0, w0, w27
-	b	.L1959
-.L1951:
-	add	w27, w27, 1
-	b	.L1943
-.L1953:
-	adrp	x0, .LANCHOR56
-	ldrh	w1, [x22, 80]
+	mov	x4, 0
+	b	.L1942
+.L1944:
+	strh	wzr, [x0, 696]
+	mov	w2, 256
+	mov	w1, 255
+	add	x0, x0, 416
+	bl	ftl_memset
+	ldrh	w2, [x22, #:lo12:.LANCHOR96]
+	mov	w1, 21
+	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	sub	w1, w1, w2
+	asr	w1, w20, w1
+	strh	w1, [x0, 694]
+	mov	w1, 1
+	strh	w1, [x0, 688]
+	adrp	x1, .LANCHOR161
+	strh	w20, [x0, 692]
+	ldrh	w1, [x1, #:lo12:.LANCHOR161]
+	strh	w23, [x0, 416]
+	strh	w1, [x0, 698]
+	bl	ftl_alloc_sys_blk
+	mov	w20, w0
+	mov	w1, 0
+	bl	ftl_erase_phy_blk
+	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	mov	w1, 2
+	strh	w20, [x0, 130]
+	ldr	x0, [x21, #:lo12:.LANCHOR5]
+	add	x0, x0, 16
+	bl	ftl_open_sblk_init
+	ldr	x0, [x21, #:lo12:.LANCHOR5]
+	mov	w1, 3
+	add	x0, x0, 48
+	bl	ftl_open_sblk_init
+	ldr	x1, [x19, #:lo12:.LANCHOR53]
+	ldr	x0, [x21, #:lo12:.LANCHOR5]
+	add	x0, x0, 136
+	ldrh	w2, [x1, 134]
+	strh	w2, [x0, -10]
+	mov	w2, -1
+	strh	wzr, [x0, -12]
+	strh	w2, [x0, -56]
+	strh	w2, [x0, -6]
+	mov	w2, -1
+	strh	wzr, [x0, -16]
+	str	w2, [x0, 408]
+	strh	wzr, [x0, -14]
+	strh	w2, [x1, 126]
+	mov	w2, 256
+	mov	w1, 255
+	bl	ftl_memset
+	ldr	x0, [x21, #:lo12:.LANCHOR5]
+	mov	w2, 128
+	mov	w1, 255
+	add	x0, x0, 392
+	bl	ftl_memset
+	bl	ftl_ext_info_flush
+	mov	w0, 0
+	bl	ftl_info_flush
+	bl	ftl_info_blk_init
+	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-	ldr	x0, [x0, #:lo12:.LANCHOR56]
+	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	strh	w21, [x0, x1, lsl 1]
-	ldp	x27, x28, [sp, 80]
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 144
+	ldp	x29, x30, [sp], 80
 	ret
-	.size	gc_update_l2p_map, .-gc_update_l2p_map
-	.section	.text.gc_update_l2p_map_new,"ax",@progbits
+	.size	ftl_low_format, .-ftl_low_format
+	.section	.text.ftl_re_low_format_test,"ax",@progbits
 	.align	2
-	.global	gc_update_l2p_map_new
-	.type	gc_update_l2p_map_new, %function
-gc_update_l2p_map_new:
-	stp	x29, x30, [sp, -176]!
-	adrp	x0, .LANCHOR60
-	adrp	x1, .LANCHOR68
+	.global	ftl_re_low_format_test
+	.type	ftl_re_low_format_test, %function
+ftl_re_low_format_test:
+	stp	x29, x30, [sp, -64]!
+	mov	w1, 1
+	adrp	x0, .LC77
+	add	x0, x0, :lo12:.LC77
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	ldr	x24, [x0, #:lo12:.LANCHOR60]
-	stp	x25, x26, [sp, 64]
-	ldrh	w25, [x1, #:lo12:.LANCHOR68]
-	add	x1, x24, 80
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR22
+	adrp	x19, .LANCHOR53
 	stp	x21, x22, [sp, 32]
-	stp	x27, x28, [sp, 80]
-	str	x1, [x29, 144]
-	ldrb	w1, [x1, 9]
-	str	x0, [x29, 128]
-	mul	w25, w25, w1
-	ldr	w1, [x20, #:lo12:.LANCHOR22]
-	tbz	x1, 8, .L1961
-	ldrh	w1, [x24, 80]
-	adrp	x0, .LC102
-	add	x0, x0, :lo12:.LC102
-	bl	printf
-.L1961:
-	adrp	x23, .LANCHOR56
-	ldrh	w1, [x24, 80]
-	sub	w2, w25, #1
-	mov	x21, 0
-	ldr	x0, [x23, #:lo12:.LANCHOR56]
-	mov	w22, 0
-	strh	w2, [x0, x1, lsl 1]
-	adrp	x0, .LANCHOR45
-	add	x0, x0, :lo12:.LANCHOR45
-	str	x0, [x29, 104]
-.L1962:
-	mov	w27, w21
-	cmp	w25, w21
-	bhi	.L1972
-	ldr	w0, [x20, #:lo12:.LANCHOR22]
-	tbz	x0, 8, .L1973
-	ldr	x0, [x29, 128]
-	mov	w3, w22
-	ldr	x1, [x23, #:lo12:.LANCHOR56]
-	ldrh	w2, [x24, 80]
-	ldr	x0, [x0, #:lo12:.LANCHOR60]
-	ldrh	w2, [x1, x2, lsl 1]
-	ldrh	w1, [x0, 80]
-	adrp	x0, .LC106
-	add	x0, x0, :lo12:.LC106
+	adrp	x21, .LANCHOR2
+	str	x23, [sp, 48]
 	bl	printf
-.L1973:
-	ldrh	w0, [x24, 80]
-	ldr	x1, [x23, #:lo12:.LANCHOR56]
-	lsl	x0, x0, 1
-	ldrh	w2, [x1, x0]
-	cmp	w22, w2
-	beq	.L1974
-	adrp	x1, .LANCHOR153
+	bl	sblk_init
+	bl	ftl_info_blk_init
+	bl	ftl_ext_info_init
+	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	adrp	x3, .LANCHOR3
+	ldrh	w2, [x21, #:lo12:.LANCHOR2]
+	mov	w4, 0
+	ldr	x3, [x3, #:lo12:.LANCHOR3]
+	mov	w5, 0
+	mov	w6, 0
+	ldrh	w1, [x0, 134]
+	add	x3, x3, x1, uxth 2
+.L1958:
+	cmp	w1, w2
+	bcc	.L1962
+	adrp	x22, .LANCHOR4
+	strh	w6, [x0, 114]
+	strh	w5, [x0, 118]
+	lsl	w2, w2, 1
+	strh	w4, [x0, 116]
+	mov	w1, 0
+	strh	wzr, [x0, 122]
+	strh	wzr, [x0, 120]
+	strh	wzr, [x0, 124]
+	ldr	x0, [x22, #:lo12:.LANCHOR4]
+	bl	ftl_memset
+	bl	zftl_sblk_list_init
+	mov	w0, 1
+	bl	ftl_alloc_sblk
+	mov	w1, 0
+	mov	w23, w0
+	bl	ftl_erase_sblk
+	ldr	x1, [x19, #:lo12:.LANCHOR53]
+	mov	w0, w23
+	add	x1, x1, 672
+	bl	ftl_get_blk_list_in_sblk
+	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	mov	w1, 65533
+	ldrh	w20, [x0, 672]
+	strh	wzr, [x0, 690]
+	sub	w2, w20, #1
+	cmp	w1, w2, uxth
+	bcs	.L1963
+	adrp	x1, .LANCHOR162
 	adrp	x0, .LC0
-	mov	w2, 448
-	add	x1, x1, :lo12:.LANCHOR153
+	mov	w2, 1965
+	add	x1, x1, :lo12:.LANCHOR162
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1975:
-	b	.L1975
-.L1972:
-	adrp	x26, .LANCHOR107
-	lsl	x19, x21, 2
-	ldr	x0, [x26, #:lo12:.LANCHOR107]
-	ldr	w2, [x0, x19]
-	cmn	w2, #1
-	beq	.L1963
-	adrp	x0, .LANCHOR45
-	ldrb	w0, [x0, #:lo12:.LANCHOR45]
-	lsl	w0, w0, 7
-	udiv	w0, w2, w0
-	and	w0, w0, 65535
-	str	w0, [x29, 156]
-	ldr	w0, [x20, #:lo12:.LANCHOR22]
-	tbz	x0, 8, .L1964
-	ldr	w1, [x29, 156]
-	adrp	x0, .LC103
-	mov	w3, w21
-	add	x0, x0, :lo12:.LC103
-	bl	printf
 .L1964:
-	sub	w27, w25, w27
-	add	x27, x27, x21
-	lsl	x0, x27, 2
-	str	x0, [x29, 136]
-	adrp	x0, .LC105
-	add	x0, x0, :lo12:.LC105
-	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR71
-	add	x0, x0, :lo12:.LANCHOR71
-	str	x0, [x29, 112]
-.L1965:
-	ldr	x0, [x29, 136]
-	cmp	x0, x19
-	bne	.L1971
+	b	.L1964
+.L1962:
+	ldrb	w7, [x3, 2]
+	and	w8, w7, 31
+	strb	w8, [x3, 2]
+	ands	w7, w7, 24
+	bne	.L1959
+	add	w6, w6, 1
+	and	w6, w6, 65535
+.L1960:
+	add	w1, w1, 1
+	add	x3, x3, 4
+	and	w1, w1, 65535
+	b	.L1958
+.L1959:
+	cmp	w7, 16
+	bne	.L1961
+	add	w5, w5, 1
+	and	w5, w5, 65535
+	b	.L1960
+.L1961:
+	add	w4, w4, 1
+	and	w4, w4, 65535
+	b	.L1960
 .L1963:
-	add	x21, x21, 1
-	b	.L1962
-.L1971:
-	ldr	x0, [x26, #:lo12:.LANCHOR107]
-	ldr	w28, [x0, x19]
-	cmn	w28, #1
-	beq	.L1966
-	ldr	x0, [x29, 104]
-	ldr	w1, [x29, 156]
-	ldrb	w0, [x0]
-	lsl	w0, w0, 7
-	udiv	w0, w28, w0
-	cmp	w1, w0, uxth
-	bne	.L1966
-	adrp	x0, .LANCHOR108
-	ldr	x0, [x0, #:lo12:.LANCHOR108]
-	ldr	w27, [x0, x19]
-	mov	w0, w28
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 172]
-	cmn	w0, #1
-	bne	.L1967
-	mov	w2, 0
-	add	x1, x29, 172
-	mov	w0, w28
-	bl	pm_log2phys
-.L1967:
-	ldr	w3, [x29, 172]
-	cmp	w27, w3
-	bne	.L1968
-	adrp	x0, .LANCHOR109
-	mov	w2, 1
-	add	x1, x29, 168
-	add	w22, w22, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR109]
-	ldr	w0, [x0, x19]
-	str	w0, [x29, 168]
-	mov	w0, w28
-	bl	pm_log2phys
-	ldr	x0, [x29, 112]
-	mov	w1, 21
-	ldrh	w0, [x0]
-	sub	w2, w1, w0
+	strh	wzr, [x0, 696]
+	mov	w2, 256
+	mov	w1, 255
+	add	x0, x0, 416
+	bl	ftl_memset
+	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	mov	w2, 4096
+	mov	w1, 0
+	add	x0, x0, 704
+	bl	ftl_memset
+	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	lsr	w1, w20, 14
+	and	w20, w20, 16383
+	ldrh	w2, [x21, #:lo12:.LANCHOR2]
+	strh	w1, [x0, 694]
 	mov	w1, 1
-	lsr	w0, w27, w0
-	lsl	w1, w1, w2
-	sub	w1, w1, #1
-	and	w1, w1, w0
-	adrp	x0, .LANCHOR70
-	ldrb	w0, [x0, #:lo12:.LANCHOR70]
-	udiv	w1, w1, w0
-	and	w1, w1, 65535
-	str	w1, [x29, 152]
-	mov	w0, w1
-	bl	ftl_vpn_decrement
-	ldr	x0, [x29, 144]
-	ldr	w1, [x29, 152]
-	ldrh	w0, [x0]
-	cmp	w0, w1
-	bne	.L1969
-	ldr	w0, [x20, #:lo12:.LANCHOR22]
-	tbz	x0, 8, .L1969
-	ldr	w3, [x29, 172]
-	adrp	x0, .LC104
-	mov	w2, w27
-	mov	w1, w28
-	add	x0, x0, :lo12:.LC104
-	bl	printf
-.L1969:
-	ldr	x0, [x26, #:lo12:.LANCHOR107]
-	mov	w1, -1
-	str	w1, [x0, x19]
-.L1966:
-	add	x19, x19, 4
-	b	.L1965
-.L1968:
-	ldr	w0, [x20, #:lo12:.LANCHOR22]
-	tbz	x0, 8, .L1970
-	ldr	x0, [x29, 120]
-	mov	w2, w27
-	mov	w1, w28
-	bl	printf
-.L1970:
-	ldr	x0, [x29, 144]
-	ldrh	w0, [x0]
-	bl	ftl_vpn_decrement
-	b	.L1969
-.L1974:
-	strh	w22, [x1, x0]
+	strh	w1, [x0, 688]
+	adrp	x1, .LANCHOR161
+	strh	w20, [x0, 692]
+	adrp	x20, .LANCHOR5
+	ldrh	w1, [x1, #:lo12:.LANCHOR161]
+	lsl	w2, w2, 1
+	strh	w23, [x0, 416]
+	strh	w1, [x0, 698]
+	mov	w1, 0
+	ldr	x0, [x22, #:lo12:.LANCHOR4]
+	bl	ftl_memset
+	ldr	x0, [x20, #:lo12:.LANCHOR5]
+	mov	w1, 2
+	add	x0, x0, 16
+	bl	ftl_open_sblk_init
+	ldr	x0, [x20, #:lo12:.LANCHOR5]
+	mov	w1, 3
+	add	x0, x0, 48
+	bl	ftl_open_sblk_init
+	ldr	x1, [x19, #:lo12:.LANCHOR53]
+	ldr	x0, [x20, #:lo12:.LANCHOR5]
+	add	x0, x0, 136
+	ldrh	w2, [x1, 134]
+	strh	w2, [x0, -10]
+	mov	w2, -1
+	strh	wzr, [x0, -12]
+	strh	w2, [x0, -56]
+	strh	w2, [x0, -6]
+	mov	w2, -1
+	strh	wzr, [x0, -16]
+	str	w2, [x0, 408]
+	strh	wzr, [x0, -14]
+	strh	w2, [x1, 126]
+	mov	w2, 256
+	mov	w1, 255
+	bl	ftl_memset
+	ldr	x0, [x20, #:lo12:.LANCHOR5]
+	mov	w2, 128
+	mov	w1, 255
+	add	x0, x0, 392
+	bl	ftl_memset
+	ldr	x0, [x20, #:lo12:.LANCHOR5]
+	str	wzr, [x0, 520]
+	str	wzr, [x0, 524]
+	str	wzr, [x0, 528]
+	bl	ftl_ext_info_flush
+	mov	w0, 0
+	bl	ftl_info_flush
+	bl	ftl_info_blk_init
+	ldr	x23, [sp, 48]
+	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 176
+	ldp	x29, x30, [sp], 64
 	ret
-	.size	gc_update_l2p_map_new, .-gc_update_l2p_map_new
-	.section	.text.gc_scan_src_blk_one_page,"ax",@progbits
+	.size	ftl_re_low_format_test, .-ftl_re_low_format_test
+	.section	.text.ftl_prog_ppa_page,"ax",@progbits
 	.align	2
-	.global	gc_scan_src_blk_one_page
-	.type	gc_scan_src_blk_one_page, %function
-gc_scan_src_blk_one_page:
-	stp	x29, x30, [sp, -96]!
-	mov	w5, 0
-	mov	w6, 0
-	mov	w7, 65535
+	.global	ftl_prog_ppa_page
+	.type	ftl_prog_ppa_page, %function
+ftl_prog_ppa_page:
+	ubfx	x5, x0, 21, 3
+	mov	w4, w3
+	mov	x3, x2
+	mov	x2, x1
+	and	w1, w0, 2097151
+	mov	w0, w5
+	b	ftl_prog_page
+	.size	ftl_prog_ppa_page, .-ftl_prog_ppa_page
+	.section	.text.ftl_write_last_log_page,"ax",@progbits
+	.align	2
+	.global	ftl_write_last_log_page
+	.type	ftl_write_last_log_page, %function
+ftl_write_last_log_page:
+	ldrh	w1, [x0, 6]
+	cmp	w1, 1
+	bne	.L1969
+	stp	x29, x30, [sp, -48]!
+	adrp	x1, .LANCHOR105
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR58
-	add	x1, x19, :lo12:.LANCHOR58
+	mov	x19, x0
 	stp	x21, x22, [sp, 32]
-	stp	x23, x24, [sp, 48]
-	str	x25, [sp, 64]
-	ldrb	w0, [x1, 4]
-	add	x2, x1, x0, sxtw 1
-	ldrh	w3, [x2, 40]
-	adrp	x2, .LANCHOR69
-	ldrb	w4, [x2, #:lo12:.LANCHOR69]
-	ldrh	w2, [x1, 2]
-.L1999:
-	cmp	w3, w7
-	beq	.L2001
-	cbz	w6, .L2002
-	add	x1, x19, :lo12:.LANCHOR58
-	strb	w0, [x1, 4]
-.L2002:
-	cbz	w5, .L2003
-	add	x0, x19, :lo12:.LANCHOR58
-	strh	w2, [x0, 2]
-.L2003:
-	adrp	x0, .LANCHOR75
-	ldrh	w22, [x0, #:lo12:.LANCHOR75]
-	adrp	x0, .LANCHOR64
-	mov	x23, x0
-	ldrb	w1, [x0, #:lo12:.LANCHOR64]
-	mul	w22, w22, w3
-	cmp	w1, 2
-	bne	.L2004
-	add	x0, x19, :lo12:.LANCHOR58
-	ldrb	w1, [x0, 6]
-	cbnz	w1, .L2004
-	ldrh	w0, [x0, 2]
-	add	w22, w22, w0, lsl 1
-.L2005:
-	add	x1, x19, :lo12:.LANCHOR58
-	ldrb	w0, [x1, 4]
-	add	w0, w0, 1
-	and	w0, w0, 255
-	strb	w0, [x1, 4]
-	cmp	w4, w0
-	bne	.L2006
-	ldrh	w0, [x1, 2]
-	strb	wzr, [x1, 4]
-	add	w0, w0, 1
-	strh	w0, [x1, 2]
-.L2006:
-	mov	w0, 1
-	add	x19, x19, :lo12:.LANCHOR58
-	bl	buf_alloc
-	add	x23, x23, :lo12:.LANCHOR64
-	mov	x21, x0
-	mov	w20, 0
-	adrp	x24, .LANCHOR61
-.L2016:
-	ldrb	w0, [x19, 6]
-	cmp	w0, 3
-	bne	.L2007
-	cbz	w20, .L2008
-.L2007:
-	cmp	w0, w20
-	bgt	.L2009
-.L2017:
-	mov	x0, x21
-	bl	buf_free
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldr	x25, [sp, 64]
-	ldp	x29, x30, [sp], 96
-	ret
-.L2001:
-	add	w0, w0, 1
-	and	w0, w0, 255
-	cmp	w0, w4
-	bne	.L2000
-	add	w2, w2, 1
-	mov	w5, 1
-	and	w2, w2, 65535
-	mov	w0, 0
-.L2000:
-	add	x3, x1, x0, sxtw 1
-	mov	w6, 1
-	ldrh	w3, [x3, 40]
-	b	.L1999
-.L2004:
-	add	x0, x19, :lo12:.LANCHOR58
-	ldrh	w0, [x0, 2]
-	add	w22, w0, w22
-	b	.L2005
-.L2009:
-	ldrb	w1, [x23]
-	cmp	w1, 2
-	bne	.L2010
-	cbnz	w0, .L2010
-	add	w0, w20, w22
-	orr	w0, w0, 33554432
-.L2030:
-	str	w0, [x21, 40]
-	mov	w1, 1
-	mov	x0, x21
-	bl	sblk_read_page
-	ldr	w0, [x21, 52]
-	cmp	w0, 512
-	ccmn	w0, #1, 4, ne
-	beq	.L2013
-	ldr	x0, [x21, 24]
-	ldr	w25, [x0, 4]
-	mov	w0, w25
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 92]
-	cmn	w0, #1
-	bne	.L2014
-	mov	w2, 0
-	add	x1, x29, 92
-	mov	w0, w25
-	bl	pm_log2phys
-.L2014:
-	ldr	w0, [x29, 92]
-	cmp	w22, w0
-	bne	.L2013
-	ldrh	w0, [x19, 24]
-	ldr	x2, [x24, #:lo12:.LANCHOR61]
-	ubfiz	x1, x0, 2, 16
-	add	w0, w0, 1
-	str	w22, [x2, x1]
-	strh	w0, [x19, 24]
-.L2013:
-	ldrh	w0, [x19, 26]
-	add	w0, w0, 1
-	strh	w0, [x19, 26]
-.L2008:
-	add	w20, w20, 1
-	cmp	w20, 4
-	bne	.L2016
-	b	.L2017
-.L2010:
-	orr	w0, w22, w20, lsl 24
-	b	.L2030
-	.size	gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page
-	.section	.text.gc_scan_static_data,"ax",@progbits
-	.align	2
-	.global	gc_scan_static_data
-	.type	gc_scan_static_data, %function
-gc_scan_static_data:
-	stp	x29, x30, [sp, -80]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR60
-	stp	x21, x22, [sp, 32]
-	ldr	x0, [x19, #:lo12:.LANCHOR60]
-	ldr	w1, [x0, 544]
-	str	x23, [sp, 48]
-	cmn	w1, #1
-	beq	.L2032
-	adrp	x21, .LANCHOR71
-	adrp	x22, .LANCHOR70
-	add	x21, x21, :lo12:.LANCHOR71
-	add	x22, x22, :lo12:.LANCHOR70
-	mov	w20, 11
-.L2041:
-	ldr	x0, [x19, #:lo12:.LANCHOR60]
-	mov	w2, 0
-	add	x1, x29, 76
-	ldr	w0, [x0, 544]
-	bl	pm_log2phys
-	ldr	w0, [x29, 76]
+	ldr	x20, [x1, #:lo12:.LANCHOR105]
+	ldrh	w22, [x0, 12]
+	bl	ftl_get_new_free_page
+	mov	w21, w0
 	cmn	w0, #1
-	beq	.L2033
-	mov	w0, 1
-	bl	buf_alloc
-	ldr	w1, [x29, 76]
-	mov	x23, x0
-	str	w1, [x0, 40]
-	mov	w1, 1
-	bl	sblk_read_page
-	ldr	w0, [x23, 52]
-	cmp	w0, 256
-	bne	.L2034
-	ldrh	w3, [x21]
-	mov	w0, 21
-	ldr	w2, [x29, 76]
-	mov	w1, 1
-	sub	w0, w0, w3
-	lsr	w2, w2, w3
-	ldrb	w3, [x22]
-	lsl	w0, w1, w0
-	sub	w0, w0, #1
-	and	w0, w0, w2
-	mov	w2, 0
-	udiv	w0, w0, w3
-	bl	gc_add_sblk
-.L2034:
-	ldr	x0, [x19, #:lo12:.LANCHOR60]
-	ldr	x1, [x23, 24]
-	ldr	w0, [x0, 544]
-	ldr	w1, [x1, 4]
-	cmp	w1, w0
-	beq	.L2035
-	adrp	x1, .LANCHOR154
-	adrp	x0, .LC0
-	mov	w2, 1149
-	add	x1, x1, :lo12:.LANCHOR154
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2036:
-	b	.L2036
-.L2035:
-	mov	x0, x23
-	bl	buf_free
-.L2033:
-	ldr	x0, [x19, #:lo12:.LANCHOR60]
-	adrp	x2, .LANCHOR47
-	ldr	w2, [x2, #:lo12:.LANCHOR47]
-	ldr	w1, [x0, 544]
-	add	w1, w1, 1
-	str	w1, [x0, 544]
-	cmp	w1, w2
-	bcc	.L2037
-	mov	w1, -1
-	str	w1, [x0, 544]
-	ldr	w1, [x0, 548]
-	add	w1, w1, 1
-	str	w1, [x0, 548]
-	bl	ftl_flush
-	bl	pm_flush
-	bl	ftl_ext_info_flush
+	beq	.L1970
+	ldrh	w0, [x19]
+	add	x20, x20, x22, uxth 2
+	bl	ftl_vpn_decrement
+	adrp	x0, .LANCHOR145
+	mov	w1, 15555
+	add	x6, x0, :lo12:.LANCHOR145
+	movk	w1, 0xf55f, lsl 16
+	str	w1, [x0, #:lo12:.LANCHOR145]
+	adrp	x0, .LANCHOR80
+	ldrh	w1, [x0, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR72
+	ldrb	w0, [x0, #:lo12:.LANCHOR72]
+	mul	w1, w1, w0
+	mov	x0, x20
+	lsl	w1, w1, 2
+	bl	js_hash
+	stp	w0, wzr, [x6, 4]
+	adrp	x0, .LANCHOR52
+	mov	x2, x6
+	mov	x1, x20
+	ldrb	w3, [x0, #:lo12:.LANCHOR52]
+	mov	w0, w21
+	str	wzr, [x6, 12]
+	bl	ftl_prog_ppa_page
+.L1970:
 	mov	w0, 0
-	bl	ftl_info_flush
-.L2031:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	ldr	x23, [sp, 48]
-	ldp	x29, x30, [sp], 80
+	ldp	x29, x30, [sp], 48
 	ret
-.L2037:
-	ldr	w0, [x29, 76]
-	cmn	w0, #1
-	bne	.L2031
-	sub	w20, w20, #1
-	ands	w20, w20, 65535
-	bne	.L2041
-	b	.L2031
-.L2032:
-	adrp	x1, .LANCHOR46
-	ldr	x1, [x1, #:lo12:.LANCHOR46]
-	ldr	w2, [x1, 40]
-	cmp	w2, 20480
-	bls	.L2043
-	ldr	w3, [x1, 44]
-	add	w3, w3, w2, lsr 10
-	and	w2, w2, 1023
-	stp	w2, w3, [x1, 40]
-.L2043:
-	ldr	w2, [x0, 536]
-	ldr	w3, [x0, 12]
-	add	w2, w2, 12959744
-	add	w2, w2, 256
-	cmp	w3, w2
-	ldr	w2, [x1, 44]
-	bhi	.L2044
-	ldr	w1, [x0, 540]
-	add	w1, w1, 98304
-	add	w1, w1, 1696
-	cmp	w2, w1
-	bls	.L2031
-.L2044:
-	str	w3, [x0, 536]
-	str	w2, [x0, 540]
-	str	wzr, [x0, 544]
-	b	.L2031
-	.size	gc_scan_static_data, .-gc_scan_static_data
-	.section	.text.ftl_sblk_dump,"ax",@progbits
+.L1969:
+	mov	w0, -1
+	ret
+	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
+	.section	.text.ftl_open_sblk_recovery,"ax",@progbits
 	.align	2
-	.global	ftl_sblk_dump
-	.type	ftl_sblk_dump, %function
-ftl_sblk_dump:
-	sub	sp, sp, #256
+	.global	ftl_open_sblk_recovery
+	.type	ftl_open_sblk_recovery, %function
+ftl_open_sblk_recovery:
+	sub	sp, sp, #176
 	stp	x29, x30, [sp, 48]
 	add	x29, sp, 48
-	stp	x23, x24, [sp, 96]
-	and	w23, w0, 65535
-	stp	x19, x20, [sp, 64]
-	mov	w0, 65535
 	stp	x21, x22, [sp, 80]
-	cmp	w23, w0
-	stp	x25, x26, [sp, 112]
+	adrp	x22, .LANCHOR29
 	stp	x27, x28, [sp, 128]
-	beq	.L2072
-	uxtw	x0, w23
-	str	x0, [x29, 128]
-	lsl	x14, x0, 2
-	adrp	x0, .LANCHOR59
-	mov	x13, x0
-	ldr	x2, [x0, #:lo12:.LANCHOR59]
-	add	x2, x2, x14
-	ldrb	w2, [x2, 2]
-	and	w2, w2, 224
-	cmp	w2, 160
-	bne	.L2073
-	adrp	x0, .LANCHOR64
-	ldrb	w25, [x0, #:lo12:.LANCHOR64]
-.L2052:
-	add	x28, x29, 208
-	str	x1, [x29, 144]
-	mov	w0, w23
-	adrp	x21, .LANCHOR22
-	strh	w23, [x28, -32]!
-	add	x1, x28, 16
-	bl	ftl_get_blk_list_in_sblk
-	adrp	x2, .LANCHOR79
-	and	w1, w0, 255
-	strb	w1, [x29, 185]
-	ldrh	w3, [x2, #:lo12:.LANCHOR79]
-	strh	wzr, [x29, 178]
-	strb	wzr, [x29, 181]
-	strh	wzr, [x29, 186]
-	mul	w1, w1, w3
-	str	x2, [x29, 120]
-	strh	w1, [x29, 182]
-	ldr	w1, [x21, #:lo12:.LANCHOR22]
-	tbz	x1, 12, .L2053
-	ldr	x1, [x13, #:lo12:.LANCHOR59]
-	and	w4, w0, 255
-	mov	w3, w25
-	adrp	x0, .LC107
-	add	x1, x1, x14
-	add	x0, x0, :lo12:.LC107
-	ldrb	w2, [x1, 2]
-	mov	w1, w23
-	ubfx	x2, x2, 5, 3
+	mov	x28, x0
+	ldr	w0, [x22, #:lo12:.LANCHOR29]
+	stp	x25, x26, [sp, 112]
+	mov	x25, x1
+	stp	x19, x20, [sp, 64]
+	stp	x23, x24, [sp, 96]
+	tbz	x0, 12, .L1976
+	ldrh	w1, [x28, 2]
+	adrp	x0, .LC78
+	add	x0, x0, :lo12:.LC78
 	bl	printf
-.L2053:
-	mov	w0, 1
-	bl	buf_alloc
-	mov	w27, 0
-	mov	x26, x0
-	mov	w20, 0
-	adrp	x0, .LANCHOR75
-	stp	wzr, wzr, [x29, 152]
-	add	x0, x0, :lo12:.LANCHOR75
-	str	x0, [x29, 96]
-.L2054:
-	ldr	x0, [x29, 120]
-	ldrh	w0, [x0, #:lo12:.LANCHOR79]
+.L1976:
+	ldr	w0, [x22, #:lo12:.LANCHOR29]
+	tbz	x0, 12, .L1977
+	ldrb	w1, [x28, 5]
+	adrp	x0, .LC79
+	add	x0, x0, :lo12:.LC79
+	bl	printf
+.L1977:
+	ldr	w0, [x22, #:lo12:.LANCHOR29]
+	tbz	x0, 12, .L1978
+	ldrh	w1, [x28]
+	adrp	x0, .LC80
+	add	x0, x0, :lo12:.LC80
+	bl	printf
+.L1978:
+	ldr	w0, [x22, #:lo12:.LANCHOR29]
+	tbz	x0, 12, .L1979
+	ldrh	w2, [x28, 18]
+	adrp	x0, .LC81
+	ldrh	w1, [x28, 16]
+	add	x0, x0, :lo12:.LC81
+	bl	printf
+.L1979:
+	ldrh	w0, [x28, 10]
+	adrp	x26, .LANCHOR52
+	strh	w0, [x28, 14]
+	mov	w27, 0
+	mov	w0, 1
+	adrp	x23, .LANCHOR80
+	bl	buf_alloc
+	ldrb	w20, [x28, 5]
+	ldrh	w21, [x28, 2]
+	mov	x19, x0
+	add	x0, x26, :lo12:.LANCHOR52
+	str	x0, [x29, 120]
+.L1980:
+	ldrh	w0, [x23, #:lo12:.LANCHOR80]
+	cmp	w0, w21
+	bhi	.L1996
+.L1983:
+	strb	w20, [x28, 5]
+	ldrh	w0, [x23, #:lo12:.LANCHOR80]
+	ldrb	w20, [x28, 9]
+	ldrh	w2, [x28, 10]
+	ldrh	w1, [x28, 6]
+	strh	w21, [x28, 2]
+	mul	w20, w20, w0
+	add	w1, w1, w2
+	cmp	w1, w20
+	bne	.L1997
+	adrp	x21, .LANCHOR105
+	mov	w0, 0
+	mov	w1, 0
+	ldr	x4, [x21, #:lo12:.LANCHOR105]
+.L1998:
+	cmp	w1, w2
+	bcc	.L2001
+	sub	w20, w20, w2
+	adrp	x24, .LANCHOR4
+	add	w0, w0, w20
+	and	w20, w0, 65535
+	ldr	w0, [x22, #:lo12:.LANCHOR29]
+	tbz	x0, 12, .L2002
+	ldrh	w1, [x28]
+	ldr	x2, [x24, #:lo12:.LANCHOR4]
+	ubfiz	x0, x1, 1, 16
+	ldrh	w3, [x2, x0]
+	adrp	x0, .LC83
+	mov	w2, w20
+	add	x0, x0, :lo12:.LC83
+	bl	printf
+.L2002:
+	ldr	x0, [x24, #:lo12:.LANCHOR4]
+	adrp	x25, .LANCHOR52
+	ldrh	w1, [x28]
+	adrp	x24, .LANCHOR72
+	adrp	x26, .LC84
+	add	x24, x24, :lo12:.LANCHOR72
+	add	x25, x25, :lo12:.LANCHOR52
+	add	x26, x26, :lo12:.LC84
+	strh	w20, [x0, x1, lsl 1]
+	mov	w20, 0
+	mov	x0, x19
+	bl	buf_free
+.L2003:
+	ldrb	w0, [x24]
+	cmp	w20, w0, lsl 1
+	bcc	.L2006
+	ldrh	w1, [x28, 12]
+	ldrh	w0, [x23, #:lo12:.LANCHOR80]
+	ldrb	w2, [x28, 9]
+	madd	w0, w0, w2, w1
+	mov	x1, -4
+	add	x0, x1, x0, sxtw 2
+	ldr	x1, [x21, #:lo12:.LANCHOR105]
+	ldr	w0, [x1, x0]
+	cmn	w0, #1
+	beq	.L2007
+	adrp	x1, .LANCHOR163
+	adrp	x0, .LC0
+	mov	w2, 1359
+	add	x1, x1, :lo12:.LANCHOR163
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2008:
+	b	.L2008
+.L1996:
+	ldrb	w20, [x28, 5]
+	adrp	x24, .LANCHOR99
+	add	x24, x24, :lo12:.LANCHOR99
+.L1981:
+	ldrb	w0, [x28, 9]
 	cmp	w0, w20
-	bls	.L2069
-	lsl	w0, w20, 1
-	mov	w24, 0
-	sub	w0, w0, #1
-	str	w0, [x29, 140]
-	adrp	x0, .LC109
-	add	x0, x0, :lo12:.LC109
-	str	x0, [x29, 104]
-	b	.L2070
-.L2073:
-	mov	w25, 1
-	b	.L2052
-.L2066:
-	ldr	x0, [x29, 112]
-	ldrh	w10, [x28, x0]
+	bhi	.L1995
+	add	w21, w21, 1
+	strb	wzr, [x28, 5]
+	and	w21, w21, 65535
+	b	.L1980
+.L1995:
+	add	x0, x28, x20, sxtw 1
+	ldrh	w12, [x0, 16]
 	mov	w0, 65535
-	cmp	w10, w0
-	beq	.L2055
-	ldr	x0, [x29, 96]
-	cmp	w25, 3
-	ldrh	w19, [x0]
-	mul	w19, w19, w10
-	bne	.L2056
-	add	w19, w20, w19
-	orr	w19, w19, w22, lsl 24
-.L2057:
-	str	w19, [x26, 40]
-	mov	w1, 1
-	str	w10, [x29, 136]
-	mov	x0, x26
-	bl	sblk_read_page
-	ldr	w0, [x21, #:lo12:.LANCHOR22]
-	ldr	w11, [x26, 52]
-	ldr	w10, [x29, 136]
-	tbz	x0, 12, .L2059
-	ldr	x1, [x26, 24]
-	mov	w4, w11
-	ldr	x0, [x26, 8]
-	mov	w3, w19
-	str	w11, [x29, 136]
+	cmp	w12, w0
+	beq	.L1982
+	ldrh	w11, [x24]
+	ldrb	w3, [x26, #:lo12:.LANCHOR52]
+	ldr	x1, [x19, 8]
+	ldr	x2, [x19, 24]
+	madd	w11, w11, w12, w21
+	stp	w12, w11, [x29, 108]
+	mov	w0, w11
+	bl	ftl_read_ppa_page
+	mov	w10, w0
+	cmp	w0, 512
+	beq	.L1983
+	cmn	w0, #1
+	ldp	w12, w11, [x29, 108]
+	beq	.L1984
+	ldr	x0, [x19, 24]
+	ldr	w1, [x0]
+	cmn	w1, #1
+	bne	.L1984
+	ldr	w0, [x0, 4]
+	cmn	w0, #1
+	bne	.L1984
+	ldr	x0, [x19, 8]
+	ldr	w0, [x0]
+	cmn	w0, #1
+	beq	.L1983
+.L1984:
+	ldr	w0, [x22, #:lo12:.LANCHOR29]
+	tbz	x0, 12, .L1985
+	ldr	x1, [x19, 24]
+	mov	w4, w10
+	ldr	x0, [x19, 8]
+	mov	w3, w11
+	str	w10, [x29, 112]
 	ldr	w2, [x1, 12]
 	str	w2, [sp, 32]
 	ldr	w2, [x1, 8]
 	str	w2, [sp, 24]
 	ldr	w2, [x1, 4]
 	str	w2, [sp, 16]
-	mov	w2, w20
+	mov	w2, w21
 	ldr	w1, [x1]
 	str	w1, [sp, 8]
 	ldr	w1, [x0, 12]
 	str	w1, [sp]
-	mov	w1, w10
+	mov	w1, w12
 	ldp	w5, w6, [x0]
 	ldr	w7, [x0, 8]
-	adrp	x0, .LC73
-	add	x0, x0, :lo12:.LC73
-	bl	printf
-	ldr	w11, [x29, 136]
-.L2059:
-	cmp	w11, 512
-	ldr	w0, [x29, 152]
-	ccmn	w11, #1, 4, ne
-	csinc	w0, w0, wzr, ne
-	str	w0, [x29, 152]
-	ldr	x0, [x26, 24]
-	ldr	w3, [x0, 4]
-	str	w3, [x29, 136]
-	mov	w0, w3
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 172]
-	cmn	w0, #1
-	ldr	w3, [x29, 136]
-	bne	.L2061
-	mov	w2, 0
-	add	x1, x29, 172
-	mov	w0, w3
-	bl	pm_log2phys
-.L2061:
-	ldr	w0, [x29, 172]
-	cmp	w19, w0
-	bne	.L2062
-	ldr	w0, [x29, 156]
-	add	w0, w0, 1
-	str	w0, [x29, 156]
-	ldr	w0, [x21, #:lo12:.LANCHOR22]
-	tbz	x0, 12, .L2062
-	ldr	x0, [x26, 24]
-	mov	w1, w19
-	ldr	w3, [x29, 156]
-	ldr	w2, [x0, 4]
-	adrp	x0, .LC108
-	add	x0, x0, :lo12:.LC108
+	adrp	x0, .LC82
+	add	x0, x0, :lo12:.LC82
 	bl	printf
-.L2062:
-	ldr	x0, [x29, 144]
-	cbz	x0, .L2063
-	ubfiz	x19, x27, 2, 32
-	ldr	w2, [x0, x19]
-	ldr	x0, [x26, 24]
-	ldr	w0, [x0, 4]
-	cmp	w0, w2
-	beq	.L2064
-	ldr	w0, [x21, #:lo12:.LANCHOR22]
-	tbz	x0, 12, .L2064
-	ldr	x0, [x29, 104]
-	mov	w1, w27
+	ldr	w10, [x29, 112]
+.L1985:
+	ldrb	w2, [x28, 9]
+	adrp	x0, .LANCHOR157
+	mov	w1, 1
+	strb	w1, [x0, #:lo12:.LANCHOR157]
+	ldrh	w0, [x28, 10]
+	madd	w1, w21, w2, w20
+	cmp	w0, w1
+	beq	.L1986
+	adrp	x1, .LANCHOR163
+	adrp	x0, .LC0
+	mov	w2, 1255
+	add	x1, x1, :lo12:.LANCHOR163
+	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2064:
-	ldr	x1, [x26, 24]
-	ldr	x0, [x29, 144]
-	ldr	w1, [x1, 4]
-	ldr	w0, [x0, x19]
+.L1987:
+	b	.L1987
+.L1986:
+	ldrh	w1, [x28, 6]
+	add	w1, w1, w0
+	ldrh	w0, [x23, #:lo12:.LANCHOR80]
+	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L2063
-	cmn	w0, #1
-	beq	.L2063
-	adrp	x1, .LANCHOR155
+	beq	.L1988
+	adrp	x1, .LANCHOR163
 	adrp	x0, .LC0
-	mov	w2, 616
-	add	x1, x1, :lo12:.LANCHOR155
+	mov	w2, 1256
+	add	x1, x1, :lo12:.LANCHOR163
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2065:
-	b	.L2065
-.L2056:
-	cmp	w25, 2
-	bne	.L2058
-	ldr	w0, [x29, 140]
-	add	w19, w19, w0
-	adrp	x0, .LANCHOR64
-	add	w19, w19, w22
-	ldrb	w0, [x0, #:lo12:.LANCHOR64]
-	orr	w19, w19, w0, lsl 24
-	b	.L2057
-.L2058:
-	add	w19, w20, w19
-	b	.L2057
-.L2063:
-	add	w27, w27, 1
-.L2055:
-	add	w22, w22, 1
-	and	w22, w22, 65535
-.L2068:
-	cmp	w25, w22
-	bcs	.L2066
-	add	w24, w24, 1
-	and	w24, w24, 65535
-.L2070:
-	ldrb	w0, [x29, 185]
-	cmp	w0, w24
-	bls	.L2067
-	sxtw	x0, w24
-	mov	w22, 1
-	add	x0, x0, 8
-	lsl	x0, x0, 1
-	str	x0, [x29, 112]
-	b	.L2068
-.L2067:
+.L1989:
+	b	.L1989
+.L1988:
+	cmn	w10, #1
+	beq	.L1991
+	ldr	x5, [x19, 24]
+	str	x5, [x29, 112]
+	ldr	w0, [x5, 4]
+	cmn	w0, #1
+	beq	.L1991
+	bl	lpa_hash_get_ppa
+	cbz	x25, .L1993
+	ldr	x5, [x29, 112]
+	ldr	w1, [x5, 8]
+	cmp	w0, w1
+	beq	.L1993
+	cmn	w0, #1
+	beq	.L1993
+	adrp	x3, .LANCHOR96
+	mov	w1, 21
+	adrp	x27, .LANCHOR95
+	ldrh	w6, [x3, #:lo12:.LANCHOR96]
+	sub	w4, w1, w6
+	mov	w1, 1
+	lsr	w2, w0, w6
+	lsl	w1, w1, w4
+	sub	w1, w1, #1
+	and	w1, w1, w2
+	ldrb	w2, [x27, #:lo12:.LANCHOR95]
+	mov	x4, x3
+	udiv	w1, w1, w2
+	ldrh	w2, [x25]
+	cmp	w2, w1, uxth
+	bne	.L1993
+	ldr	x1, [x29, 120]
+	ldr	w6, [x5]
+	adrp	x5, .LANCHOR154
+	str	w6, [x29, 108]
+	add	x2, x5, :lo12:.LANCHOR154
+	str	x5, [x29, 112]
+	ldrb	w3, [x1]
+	ldr	x1, [x19, 8]
+	str	x4, [x29, 96]
+	bl	ftl_read_ppa_page
+	ldr	x5, [x29, 112]
+	ldr	w6, [x29, 108]
+	ldr	w0, [x5, #:lo12:.LANCHOR154]
+	cmp	w6, w0
+	bhi	.L1993
+	ldr	x0, [x19, 24]
+	ldr	w1, [x0, 8]
+	cmn	w1, #1
+	beq	.L1991
+	ldr	x4, [x29, 96]
+	mov	w0, 21
+	ldrh	w3, [x4, #:lo12:.LANCHOR96]
+	sub	w2, w0, w3
+	mov	w0, 1
+	lsr	w1, w1, w3
+	lsl	w0, w0, w2
+	sub	w0, w0, #1
+	and	w0, w0, w1
+	ldrb	w1, [x27, #:lo12:.LANCHOR95]
+	udiv	w0, w0, w1
+	bl	ftl_vpn_decrement
+.L1991:
+	ldrh	w0, [x28, 6]
+	mov	w27, 1
+	sub	w0, w0, #1
+	strh	w0, [x28, 6]
+	ldrh	w0, [x28, 10]
+	add	w0, w0, 1
+	strh	w0, [x28, 10]
+.L1982:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2054
-.L2069:
-	mov	x0, x26
-	bl	buf_free
-	ldr	w0, [x21, #:lo12:.LANCHOR22]
-	tbz	x0, 12, .L2071
-	adrp	x0, .LANCHOR56
-	ldr	x1, [x29, 128]
-	ldr	w3, [x29, 156]
-	ldr	x0, [x0, #:lo12:.LANCHOR56]
-	ldrh	w2, [x0, x1, lsl 1]
-	adrp	x0, .LC110
-	mov	w1, w23
-	add	x0, x0, :lo12:.LC110
+	b	.L1981
+.L1997:
+	adrp	x1, .LANCHOR163
+	adrp	x0, .LC0
+	mov	w2, 1332
+	add	x1, x1, :lo12:.LANCHOR163
+	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2071:
-	ldr	w0, [x29, 152]
-.L2050:
-	ldp	x19, x20, [sp, 64]
-	ldp	x21, x22, [sp, 80]
-	ldp	x23, x24, [sp, 96]
-	ldp	x25, x26, [sp, 112]
-	ldp	x27, x28, [sp, 128]
-	ldp	x29, x30, [sp, 48]
-	add	sp, sp, 256
-	ret
-.L2072:
-	mov	w0, 0
-	b	.L2050
-	.size	ftl_sblk_dump, .-ftl_sblk_dump
-	.section	.text.gc_search_src_blk,"ax",@progbits
-	.align	2
-	.global	gc_search_src_blk
-	.type	gc_search_src_blk, %function
-gc_search_src_blk:
-	stp	x29, x30, [sp, -160]!
+.L1999:
+	b	.L1999
+.L2001:
+	ldrh	w3, [x28, 12]
+	add	w3, w3, w1
+	ldr	w3, [x4, x3, lsl 2]
+	cmn	w3, #1
+	beq	.L2000
+	add	w0, w0, 1
+	and	w0, w0, 65535
+.L2000:
+	add	w1, w1, 1
+	b	.L1998
+.L2006:
+	cbz	w27, .L2004
+	ldrh	w0, [x28, 6]
+	cmp	w0, 1
+	bls	.L2004
+	mov	x0, x28
+	bl	ftl_get_new_free_page
+	mov	w4, w0
+	ldr	w0, [x22, #:lo12:.LANCHOR29]
+	tbz	x0, 12, .L2005
+	mov	w1, w4
+	str	w4, [x29, 120]
+	mov	x0, x26
+	bl	printf
+	ldr	w4, [x29, 120]
+.L2005:
+	adrp	x0, .LANCHOR53
+	ldr	x2, [x19, 24]
+	ldr	x1, [x19, 8]
+	ldr	x0, [x0, #:lo12:.LANCHOR53]
+	ldr	w0, [x0, 8]
+	str	w0, [x2]
+	str	wzr, [x2, 12]
+	mov	w0, -1
+	stp	w0, w0, [x2, 4]
+	mov	w0, w4
+	str	wzr, [x1]
+	ldrb	w3, [x25]
+	bl	ftl_prog_ppa_page
+	ldrh	w0, [x28]
+	bl	ftl_vpn_decrement
+.L2004:
+	add	w20, w20, 1
+	b	.L2003
+.L2007:
+	ldrh	w0, [x28, 6]
+	cmp	w0, 1
+	bne	.L1975
+	ldp	x19, x20, [sp, 64]
+	mov	x0, x28
+	ldp	x21, x22, [sp, 80]
+	ldp	x23, x24, [sp, 96]
+	ldp	x25, x26, [sp, 112]
+	ldp	x27, x28, [sp, 128]
+	ldp	x29, x30, [sp, 48]
+	add	sp, sp, 176
+	b	ftl_write_last_log_page
+.L1993:
+	ldr	x3, [x19, 24]
+	adrp	x0, .LANCHOR54
+	ldr	w0, [x0, #:lo12:.LANCHOR54]
+	ldr	w1, [x3, 4]
+	cmp	w1, w0
+	bcs	.L1991
+	ldrb	w0, [x28, 9]
+	ldrh	w1, [x23, #:lo12:.LANCHOR80]
+	ldrh	w2, [x28, 10]
+	mul	w0, w0, w1
+	sub	w0, w0, #1
+	cmp	w2, w0
+	bge	.L1991
+	adrp	x0, .LANCHOR53
+	ldr	w1, [x3]
+	ldr	x0, [x0, #:lo12:.LANCHOR53]
+	ldr	w4, [x0, 8]
+	cmp	w1, w4
+	bls	.L1994
+	str	w1, [x0, 8]
+.L1994:
+	ldrh	w0, [x28, 12]
+	add	w2, w2, w0
+	ldp	w0, w1, [x3, 4]
+	bl	lpa_hash_update_ppa
+	b	.L1991
+.L1975:
+	ldp	x19, x20, [sp, 64]
+	ldp	x21, x22, [sp, 80]
+	ldp	x23, x24, [sp, 96]
+	ldp	x25, x26, [sp, 112]
+	ldp	x27, x28, [sp, 128]
+	ldp	x29, x30, [sp, 48]
+	add	sp, sp, 176
+	ret
+	.size	ftl_open_sblk_recovery, .-ftl_open_sblk_recovery
+	.section	.text.pm_write_page,"ax",@progbits
+	.align	2
+	.global	pm_write_page
+	.type	pm_write_page, %function
+pm_write_page:
+	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR60
-	and	w23, w0, 255
-	and	w0, w1, 255
-	str	w0, [x29, 156]
-	ldr	x0, [x24, #:lo12:.LANCHOR60]
 	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR80
 	stp	x21, x22, [sp, 32]
-	add	x0, x0, x23, sxtw 1
+	mov	w19, w0
+	stp	x23, x24, [sp, 48]
+	adrp	x22, .LANCHOR53
+	mov	x24, x1
+	add	x20, x20, :lo12:.LANCHOR80
+	mov	x21, x22
 	stp	x25, x26, [sp, 64]
-	stp	x27, x28, [sp, 80]
-	ldrh	w19, [x0, 120]
-	cbnz	w19, .L2098
-	adrp	x26, .LANCHOR46
-	and	w27, w2, 255
-	ldr	x0, [x26, #:lo12:.LANCHOR46]
-	ldrh	w20, [x0, 134]
-	adrp	x0, .LANCHOR22
-	str	x0, [x29, 144]
-	ldr	w1, [x0, #:lo12:.LANCHOR22]
-	tbz	x1, 8, .L2101
-	ldr	w2, [x29, 156]
-	adrp	x0, .LC111
-	mov	w3, w27
-	mov	w1, w23
-	add	x0, x0, :lo12:.LC111
-	bl	printf
-.L2101:
-	ldr	x0, [x29, 144]
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	tbz	x0, 8, .L2102
-	ldr	x1, [x24, #:lo12:.LANCHOR60]
-	adrp	x2, .LANCHOR57
-	ldr	x0, [x26, #:lo12:.LANCHOR46]
-	ldrh	w3, [x2, #:lo12:.LANCHOR57]
-	ldrh	w2, [x1, 126]
-	ldrh	w1, [x0, 134]
-	adrp	x0, .LC111
-	add	x0, x0, :lo12:.LC111
-	bl	printf
-.L2102:
-	cmp	w27, 64
-	bls	.L2103
-	adrp	x1, .LANCHOR156
+	mov	w23, 65535
+	str	x27, [sp, 80]
+.L2058:
+	adrp	x25, .LANCHOR99
+.L2063:
+	ldr	x0, [x22, #:lo12:.LANCHOR53]
+	ldr	w1, [x0, 48]
+	ldrh	w2, [x0, 696]
+	add	w1, w1, 1
+	str	w1, [x0, 48]
+	ldrh	w1, [x20]
+	cmp	w2, w1
+	bcs	.L2059
+	ldrh	w0, [x0, 692]
+	cmp	w0, w23
+	bne	.L2060
+.L2059:
+	bl	pm_alloc_new_blk
+	mov	w0, 0
+	bl	ftl_info_flush
+.L2060:
+	ldr	x1, [x21, #:lo12:.LANCHOR53]
+	ldrh	w0, [x1, 692]
+	cmp	w0, w23
+	bne	.L2061
+	adrp	x1, .LANCHOR164
 	adrp	x0, .LC0
-	mov	w2, 1028
-	add	x1, x1, :lo12:.LANCHOR156
+	mov	w2, 224
+	add	x1, x1, :lo12:.LANCHOR164
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2104:
-	b	.L2104
-.L2103:
-	adrp	x0, .LANCHOR69
-	adrp	x22, .LANCHOR79
-	ldrb	w21, [x0, #:lo12:.LANCHOR69]
-	adrp	x0, .LANCHOR68
-	ldrh	w3, [x22, #:lo12:.LANCHOR79]
-	ldrh	w1, [x0, #:lo12:.LANCHOR68]
-	str	x0, [x29, 128]
-	adrp	x0, .LANCHOR54
-	str	x0, [x29, 120]
-	mul	w3, w21, w3
-	mul	w21, w21, w1
-	ldr	x1, [x26, #:lo12:.LANCHOR46]
-	and	w28, w3, 65535
-	and	w21, w21, 65535
-	ldrh	w25, [x1, 134]
-	add	x1, x0, :lo12:.LANCHOR54
-	adrp	x0, .LANCHOR105
-	str	x1, [x29, 136]
-	add	x0, x0, :lo12:.LANCHOR105
-	str	x0, [x29, 112]
-.L2105:
-	ldr	x0, [x29, 136]
-	ldrh	w1, [x0]
-	ldr	x0, [x26, #:lo12:.LANCHOR46]
-	ldrh	w0, [x0, 134]
-	sub	w2, w1, w0
-	cmp	w25, w2
-	blt	.L2117
-.L2114:
-	ldr	x0, [x26, #:lo12:.LANCHOR46]
-	ldrh	w1, [x0, 134]
-	ldr	x0, [x29, 120]
-	ldrh	w0, [x0, #:lo12:.LANCHOR54]
-	sub	w0, w0, w1
-	cmp	w25, w0
-	ldr	x0, [x24, #:lo12:.LANCHOR60]
-	blt	.L2118
-	strh	w1, [x0, 126]
-	cbnz	w23, .L2119
-	adrp	x0, .LANCHOR57
-	ldrh	w1, [x0, #:lo12:.LANCHOR57]
-	cmp	w1, w28
-	bcs	.L2120
-	strh	w28, [x0, #:lo12:.LANCHOR57]
-.L2120:
-	ldrh	w1, [x22, #:lo12:.LANCHOR79]
-	mov	w2, 7
-	ldrh	w3, [x0, #:lo12:.LANCHOR57]
-	mul	w2, w1, w2
-	cmp	w3, w2, lsr 3
-	bge	.L2122
-	add	w1, w3, w1, lsr 3
-	strh	w1, [x0, #:lo12:.LANCHOR57]
-.L2122:
-	ldr	x0, [x29, 144]
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	tbz	x0, 8, .L2128
-	adrp	x0, .LC113
-	mov	w1, w19
-	add	x0, x0, :lo12:.LC113
+.L2062:
+	b	.L2062
+.L2061:
+	ldrh	w1, [x1, 696]
+	adrp	x27, .LANCHOR165
+	ldrh	w26, [x25, #:lo12:.LANCHOR99]
+	mov	w2, 64
+	madd	w26, w26, w0, w1
+	ldr	x0, [x27, #:lo12:.LANCHOR165]
+	mov	w1, 0
+	bl	ftl_memset
+	ldr	x3, [x27, #:lo12:.LANCHOR165]
+	mov	x2, x24
+	ldr	x0, [x21, #:lo12:.LANCHOR53]
+	str	w19, [x3]
+	ldr	w1, [x0, 48]
+	ldrb	w0, [x0, 694]
+	str	w1, [x3, 4]
+	adrp	x1, .LANCHOR52
+	ldrb	w4, [x1, #:lo12:.LANCHOR52]
+	mov	w1, w26
+	bl	ftl_prog_page
+	ldr	x2, [x21, #:lo12:.LANCHOR53]
+	ldrh	w1, [x2, 696]
+	add	w1, w1, 1
+	and	w1, w1, 65535
+	strh	w1, [x2, 696]
+	cmp	w1, 1
+	beq	.L2063
+	cmn	w0, #1
+	bne	.L2064
+	mov	w1, w26
+	adrp	x0, .LC85
+	add	x0, x0, :lo12:.LC85
 	bl	printf
-.L2128:
-	bl	print_ftl_debug_info
-.L2098:
-	mov	w0, w19
+	b	.L2058
+.L2064:
+	ldrh	w0, [x2, 698]
+	cmp	w19, w0
+	bcs	.L2065
+	add	x19, x2, x19, uxtw 2
+	str	w26, [x19, 704]
+.L2065:
+	mov	w0, 0
+	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 160
+	ldp	x29, x30, [sp], 96
 	ret
-.L2117:
-	ldr	x2, [x24, #:lo12:.LANCHOR60]
-	ldrh	w20, [x2, 126]
-	add	w20, w25, w20
-	and	w20, w20, 65535
-	cmp	w1, w20
-	bhi	.L2106
-	sub	w0, w0, w1
-	add	w20, w20, w0
-	and	w20, w20, 65535
-	cmp	w1, w20
-	bhi	.L2106
-	adrp	x1, .LANCHOR156
-	adrp	x0, .LC0
-	mov	w2, 1038
-	add	x1, x1, :lo12:.LANCHOR156
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2107:
-	b	.L2107
-.L2106:
-	adrp	x0, .LANCHOR59
-	uxtw	x4, w20
-	ldr	x0, [x0, #:lo12:.LANCHOR59]
-	add	x0, x0, x4, lsl 2
-	ldrb	w1, [x0, 2]
-	mov	w0, 224
-	and	w1, w1, 224
-	cmp	w1, 32
-	ccmp	w1, w0, 4, ne
-	beq	.L2108
-	adrp	x5, .LANCHOR56
-	lsl	x4, x4, 1
-	ldr	x0, [x5, #:lo12:.LANCHOR56]
-	cbnz	w1, .L2109
-	ldrh	w1, [x0, x4]
-	cbz	w1, .L2110
-	mov	w2, w20
-	stp	x5, x4, [x29, 96]
-	adrp	x0, .LC112
-	add	x0, x0, :lo12:.LC112
-	bl	printf
-	mov	x1, 0
-	mov	w0, w20
-	bl	ftl_sblk_dump
-	ldp	x5, x4, [x29, 96]
-.L2110:
-	ldr	x0, [x5, #:lo12:.LANCHOR56]
-	ldrh	w0, [x0, x4]
-	cbz	w0, .L2108
-	adrp	x1, .LANCHOR156
-	adrp	x0, .LC0
-	mov	w2, 1047
-	add	x1, x1, :lo12:.LANCHOR156
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2111:
-	b	.L2111
-.L2109:
-	ldrh	w0, [x0, x4]
-	mov	w2, 65535
-	cmp	w0, w2
-	beq	.L2108
-	cmp	w1, 160
-	ldr	w3, [x29, 156]
-	cset	w2, eq
-	add	w2, w2, 1
-	and	w2, w3, w2
-	cbnz	w23, .L2113
-	cmp	w0, w28
-	csel	w3, w0, w28, cc
-	and	w28, w3, 65535
-	cbz	w2, .L2108
-	adrp	x1, .LANCHOR57
-	ldrh	w1, [x1, #:lo12:.LANCHOR57]
-	cmp	w1, w0
-	bls	.L2108
-	mov	w2, 0
-	mov	w1, 0
-	mov	w0, w20
-	bl	gc_add_sblk
-	cbz	w0, .L2108
-.L2161:
-	add	w19, w19, 1
-	and	w19, w19, 65535
-	b	.L2115
-.L2113:
-	cbz	w2, .L2115
-	bne	.L2116
-	adrp	x1, .LANCHOR106
-	cmp	w0, w21
-	csel	w21, w0, w21, cc
-	ldrh	w1, [x1, #:lo12:.LANCHOR106]
-	and	w21, w21, 65535
-	cmp	w1, w0
-	bls	.L2115
-.L2163:
-	mov	w2, w23
+	.size	pm_write_page, .-pm_write_page
+	.section	.text.flash_info_flush,"ax",@progbits
+	.align	2
+	.global	flash_info_flush
+	.type	flash_info_flush, %function
+flash_info_flush:
+	stp	x29, x30, [sp, -112]!
+	mov	w2, 64
 	mov	w1, 0
-	mov	w0, w20
-	bl	gc_add_sblk
-	cbz	w0, .L2115
-	b	.L2161
-.L2116:
-	ldr	x1, [x29, 112]
-	cmp	w0, w28
-	csel	w3, w0, w28, cc
-	and	w28, w3, 65535
-	ldrh	w1, [x1]
-	cmp	w1, w0
-	bls	.L2163
-.L2115:
-	cmp	w19, w27
-	bhi	.L2114
-.L2108:
-	add	w25, w25, 1
-	and	w25, w25, 65535
-	b	.L2105
-.L2119:
-	ldr	x0, [x29, 128]
-	adrp	x1, .LANCHOR70
-	ldrb	w1, [x1, #:lo12:.LANCHOR70]
-	ldrh	w0, [x0, #:lo12:.LANCHOR68]
-	mul	w0, w0, w1
-	adrp	x1, .LANCHOR106
-	cmp	w21, w0
-	beq	.L2123
-	ldrh	w2, [x1, #:lo12:.LANCHOR106]
-	cmp	w2, w21
-	bcs	.L2123
-	strh	w21, [x1, #:lo12:.LANCHOR106]
-.L2123:
-	ldrh	w4, [x22, #:lo12:.LANCHOR79]
-	ldrh	w2, [x1, #:lo12:.LANCHOR106]
-	lsr	w3, w4, 3
-	sub	w0, w0, w3
-	cmp	w2, w0
-	bge	.L2124
-	add	w2, w2, w3
-	strh	w2, [x1, #:lo12:.LANCHOR106]
-.L2124:
-	adrp	x1, .LANCHOR105
-	ldrh	w0, [x1, #:lo12:.LANCHOR105]
-	cmp	w0, w4, lsr 1
-	bls	.L2122
-	sub	w0, w0, w3
-	strh	w0, [x1, #:lo12:.LANCHOR105]
-	b	.L2122
-.L2118:
-	strh	w20, [x0, 126]
-	cbnz	w23, .L2126
-	adrp	x1, .LANCHOR57
-	ldrh	w0, [x22, #:lo12:.LANCHOR79]
-	ldrh	w2, [x1, #:lo12:.LANCHOR57]
-	cmp	w2, w0, lsr 2
-	bls	.L2122
-	sub	w0, w2, w0, lsr 3
-	strh	w0, [x1, #:lo12:.LANCHOR57]
-	b	.L2122
-.L2126:
-	adrp	x0, .LANCHOR106
-	ldrh	w2, [x22, #:lo12:.LANCHOR79]
-	ldrh	w1, [x0, #:lo12:.LANCHOR106]
-	cmp	w1, w2, lsr 1
-	bls	.L2127
-	sub	w1, w1, w2, lsr 3
-	strh	w1, [x0, #:lo12:.LANCHOR106]
-.L2127:
-	adrp	x0, .LANCHOR70
-	adrp	x3, .LANCHOR105
-	ldrb	w0, [x0, #:lo12:.LANCHOR70]
-	ldrh	w1, [x3, #:lo12:.LANCHOR105]
-	mul	w0, w0, w2
-	sub	w0, w0, #32
-	cmp	w1, w0
-	bge	.L2122
-	add	w1, w1, 32
-	strh	w1, [x3, #:lo12:.LANCHOR105]
-	b	.L2122
-	.size	gc_search_src_blk, .-gc_search_src_blk
-	.section	.text.ftl_read,"ax",@progbits
-	.align	2
-	.global	ftl_read
-	.type	ftl_read, %function
-ftl_read:
-	stp	x29, x30, [sp, -160]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	mov	x23, x3
-	stp	x25, x26, [sp, 64]
-	mov	w26, w2
+	adrp	x23, .LANCHOR140
 	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR12
+	ldr	x0, [x23, #:lo12:.LANCHOR140]
+	adrp	x24, .LC87
 	stp	x21, x22, [sp, 32]
+	add	x24, x24, :lo12:.LC87
+	stp	x25, x26, [sp, 64]
+	adrp	x21, .LANCHOR141
 	stp	x27, x28, [sp, 80]
-	cbnz	w0, .L2165
-	adrp	x0, .LANCHOR52
-	ldr	w2, [x0, #:lo12:.LANCHOR52]
-	mov	w0, 24576
-.L2166:
-	add	w3, w1, w26
-	cmp	w2, w3
-	bcc	.L2190
-	add	w22, w0, w1
-	adrp	x1, .LANCHOR46
-	adrp	x24, .LANCHOR45
-	str	x1, [x29, 120]
-	ldr	x2, [x1, #:lo12:.LANCHOR46]
-	ldr	w0, [x2, 24]
-	add	w0, w0, w26
-	str	w0, [x2, 24]
-	ldrb	w0, [x24, #:lo12:.LANCHOR45]
-	add	w2, w26, w22
-	stp	w2, wzr, [x29, 136]
-	sub	w2, w2, #1
-	udiv	w27, w22, w0
-	udiv	w0, w2, w0
-	mov	w20, w27
-	sub	w25, w0, w27
-	str	w0, [x29, 132]
-	add	w25, w25, 1
-	adrp	x0, .LC101
-	add	x0, x0, :lo12:.LC101
-	str	x0, [x29, 112]
-	adrp	x0, .LANCHOR36
-	add	x0, x0, :lo12:.LANCHOR36
-	str	x0, [x29, 104]
-.L2168:
-	cbnz	w25, .L2188
-	ldr	w0, [x29, 140]
-.L2164:
+	adrp	x22, .LANCHOR20
+	bl	ftl_memset
+	adrp	x25, .LANCHOR121
+	ldr	x1, [x20, #:lo12:.LANCHOR12]
+	mov	w3, 16
+	mov	w2, 4
+	adrp	x0, .LC86
+	add	x0, x0, :lo12:.LC86
+	add	x22, x22, :lo12:.LANCHOR20
+	add	x25, x25, :lo12:.LANCHOR121
+	add	x27, x21, :lo12:.LANCHOR141
+	bl	rknand_print_hex
+	mov	w26, 0
+	ldr	x6, [x20, #:lo12:.LANCHOR12]
+	add	x0, x6, 16
+	ldr	w1, [x6, 8]
+	bl	js_hash
+	str	w0, [x6, 12]
+.L2070:
+	add	x28, x21, :lo12:.LANCHOR141
+	ldrb	w4, [x21, #:lo12:.LANCHOR141]
+	ldrh	w19, [x22]
+	mov	x0, x24
+	mov	w1, w4
+	ldrh	w3, [x28, 2]
+	stp	w3, w4, [x29, 104]
+	mov	w2, w3
+	bl	printf
+	ldrh	w0, [x25]
+	ldrh	w1, [x28, 2]
+	sub	w0, w0, #1
+	cmp	w1, w0
+	ldp	w3, w4, [x29, 104]
+	blt	.L2071
+	ldr	x6, [x20, #:lo12:.LANCHOR12]
+	ldrb	w7, [x28, 1]
+	strh	wzr, [x28, 2]
+	ldr	w0, [x6, 4]
+	ldrh	w1, [x6, 16]
+	add	w0, w0, 1
+	str	w0, [x6, 4]
+	ldrb	w0, [x21, #:lo12:.LANCHOR141]
+	add	w1, w1, 1
+	strb	w0, [x28, 1]
+	mov	x0, x6
+	strb	w7, [x21, #:lo12:.LANCHOR141]
+	strh	w1, [x0, 16]!
+	ldr	w1, [x6, 8]
+	bl	js_hash
+	ldrh	w19, [x22]
+	str	w0, [x6, 12]
+	mul	w19, w19, w7
+.L2077:
+	mov	w1, w19
+	mov	w0, 0
+	bl	flash_erase_block
+	b	.L2072
+.L2075:
+	mov	w26, 1
+	b	.L2070
+.L2071:
+	madd	w19, w19, w4, w3
+	cbz	w1, .L2077
+.L2072:
+	ldr	x2, [x20, #:lo12:.LANCHOR12]
+	mov	w1, w19
+	ldr	x3, [x23, #:lo12:.LANCHOR140]
+	mov	w5, 1
+	mov	w4, 4
+	ldr	w0, [x2, 4]
+	str	w0, [x3]
+	mov	w0, 21321
+	movk	w0, 0x5359, lsl 16
+	str	w0, [x3, 4]
+	mov	w0, 0
+	bl	flash_prog_page_en
+	cmn	w0, #1
+	ldrh	w1, [x27, 2]
+	add	w1, w1, 1
+	strh	w1, [x27, 2]
+	bne	.L2073
+	mov	w1, w19
+	adrp	x0, .LC88
+	add	x0, x0, :lo12:.LC88
+	bl	printf
+	b	.L2070
+.L2073:
+	cbz	w26, .L2075
 	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 160
+	ldp	x29, x30, [sp], 112
 	ret
-.L2165:
-	cmp	w0, 3
-	bhi	.L2190
-	lsl	w0, w0, 13
-	mov	w2, 8192
-	b	.L2166
-.L2188:
-	ldrb	w1, [x24, #:lo12:.LANCHOR45]
-	cmp	w20, w27
-	ldr	w0, [x29, 132]
-	and	w19, w1, 65535
-	ccmp	w20, w0, 4, ne
-	bne	.L2191
-	cmp	w20, w27
-	bne	.L2170
-	udiv	w21, w22, w1
-	and	w0, w26, 65535
-	msub	w1, w21, w1, w22
-	and	w21, w1, 65535
-	sub	w19, w19, w21
-	and	w19, w19, 65535
-	cmp	w26, w19
-	csel	w19, w0, w19, cc
-.L2169:
-	adrp	x0, .LANCHOR36
-	add	x1, x0, :lo12:.LANCHOR36
-	add	x1, x1, 2
-	mov	w0, 0
-.L2173:
-	ldr	w2, [x1, 34]
-	cmp	w20, w2
-	bne	.L2171
-	ldrb	w2, [x1]
-	tbz	x2, 3, .L2171
-	ldr	x1, [x29, 104]
-	ubfiz	x0, x0, 6, 32
-	lsl	w2, w19, 9
-	ubfiz	x19, x19, 9, 16
-	add	x0, x1, x0
-	ubfiz	x21, x21, 9, 16
-	ldr	x1, [x0, 8]
-	mov	x0, x23
-	add	x23, x23, x19
-	add	x1, x1, x21
-	bl	ftl_memcpy
-.L2172:
-	add	w20, w20, 1
-	sub	w25, w25, #1
-	b	.L2168
-.L2170:
-	ldr	w0, [x29, 136]
-	msub	w19, w1, w20, w0
-	and	w19, w19, 255
-.L2191:
-	mov	w21, 0
-	b	.L2169
-.L2171:
-	add	w0, w0, 1
-	add	x1, x1, 64
-	cmp	w0, 32
-	bne	.L2173
-	mov	w0, w20
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 156]
-	cmn	w0, #1
-	bne	.L2174
-	mov	w2, 0
-	add	x1, x29, 156
+	.size	flash_info_flush, .-flash_info_flush
+	.section	.text.nand_flash_init,"ax",@progbits
+	.align	2
+	.global	nand_flash_init
+	.type	nand_flash_init, %function
+nand_flash_init:
+	stp	x29, x30, [sp, -80]!
+	mov	w2, 2
+	adrp	x1, .LANCHOR27
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR41
+	stp	x23, x24, [sp, 48]
+	adrp	x21, .LANCHOR33
+	add	x23, x21, :lo12:.LANCHOR33
+	stp	x19, x20, [sp, 16]
+	str	x25, [sp, 64]
+	mov	x24, x23
+	strb	w2, [x1, #:lo12:.LANCHOR27]
+	bl	nandc_init
+	adrp	x19, .LANCHOR26
+	mov	w20, 0
+	add	x0, x19, :lo12:.LANCHOR26
+	mov	w25, 44
+	str	x0, [x22, #:lo12:.LANCHOR41]
+.L2084:
+	mov	x1, x23
 	mov	w0, w20
-	bl	pm_log2phys
-.L2174:
-	ldr	w0, [x29, 156]
-	cmn	w0, #1
-	bne	.L2175
-	add	x21, x24, :lo12:.LANCHOR45
-	mov	w19, 0
-.L2176:
-	ldrb	w0, [x21]
-	cmp	w19, w0
-	bcs	.L2172
-	madd	w0, w20, w0, w19
-	cmp	w22, w0
-	bhi	.L2177
-	ldr	w1, [x29, 136]
-	cmp	w1, w0
-	bls	.L2177
-	mov	x0, x23
-	add	x23, x23, 512
-	mov	w2, 512
-	mov	w1, 0
-	bl	ftl_memset
-.L2177:
-	add	w19, w19, 1
-	b	.L2176
-.L2175:
-	mov	w0, 0
-	bl	buf_alloc
-	mov	x28, x0
-	cbnz	x0, .L2179
-	bl	ftl_read_ahead
-	b	.L2168
-.L2179:
-	ldr	x0, [x29, 120]
-	ldr	x1, [x0, #:lo12:.LANCHOR46]
-	ldr	w0, [x1, 40]
-	add	w0, w0, 1
-	str	w0, [x1, 40]
-	ldr	w0, [x29, 156]
-	stp	w0, w0, [x28, 40]
-	ldrb	w0, [x24, #:lo12:.LANCHOR45]
-	cmp	w0, w19
-	bne	.L2181
-	str	x23, [x28, 16]
-.L2181:
-	mov	w1, 1
-	mov	x0, x28
-	bl	sblk_read_page
-	ldr	w10, [x28, 52]
-	cmn	w10, #1
-	beq	.L2192
-	cmp	w10, 256
-	bne	.L2182
-	adrp	x0, .LANCHOR71
-	mov	w4, 21
-	mov	w5, 1
-	stp	w10, w5, [x29, 96]
-	ldrh	w1, [x0, #:lo12:.LANCHOR71]
-	ldr	w0, [x29, 156]
-	sub	w4, w4, w1
-	ldp	w2, w3, [x28, 36]
-	lsl	w4, w5, w4
-	lsr	w0, w0, w1
-	sub	w4, w4, #1
-	and	w4, w4, w0
-	adrp	x0, .LANCHOR70
-	ldrb	w0, [x0, #:lo12:.LANCHOR70]
-	udiv	w4, w4, w0
-	adrp	x0, .LC114
-	add	x0, x0, :lo12:.LC114
-	and	w1, w4, 65535
-	str	w4, [x29, 128]
-	bl	printf
-	ldr	w5, [x29, 100]
-	mov	w2, 0
-	ldr	w4, [x29, 128]
-	mov	w1, w5
-	mov	w0, w4
-	bl	gc_add_sblk
-	ldr	w10, [x29, 96]
-.L2182:
-	ldr	x0, [x28, 24]
-	ldr	w5, [x0, 4]
-	cmp	w20, w5
-	beq	.L2183
-	ldr	w4, [x0]
-	mov	w2, w20
-	ldp	w6, w7, [x0, 8]
-	str	w10, [x29, 128]
-	ldrb	w1, [x28, 1]
-	ldr	w3, [x29, 156]
-	ldr	x0, [x29, 112]
-	bl	printf
-	adrp	x0, .LANCHOR71
-	ldr	w1, [x29, 156]
-	ldrh	w3, [x0, #:lo12:.LANCHOR71]
-	mov	w0, 21
-	sub	w2, w0, w3
-	mov	w0, 1
-	lsr	w1, w1, w3
-	lsl	w0, w0, w2
+	bl	flash_read_id
+	cbnz	w20, .L2079
+	ldrb	w0, [x24]
 	sub	w0, w0, #1
-	and	w0, w0, w1
-	adrp	x1, .LANCHOR70
-	ldrb	w2, [x1, #:lo12:.LANCHOR70]
-	mov	x1, 0
-	udiv	w0, w0, w2
-	bl	ftl_sblk_dump
-	ldr	w10, [x29, 128]
-.L2183:
-	ldr	x0, [x28, 24]
-	ldr	w0, [x0, 4]
-	cmp	w20, w0
-	bne	.L2184
-	cmn	w10, #1
-	bne	.L2185
-.L2184:
-	adrp	x1, .LANCHOR157
-	adrp	x0, .LC0
-	mov	w2, 911
-	add	x1, x1, :lo12:.LANCHOR157
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2186:
-	b	.L2186
-.L2192:
-	str	w10, [x29, 140]
-	b	.L2182
-.L2185:
-	ldr	x0, [x28, 16]
-	cbnz	x0, .L2187
-	ldr	x1, [x28, 8]
-	ubfiz	x21, x21, 9, 16
-	lsl	w2, w19, 9
-	mov	x0, x23
-	add	x1, x1, x21
-	bl	ftl_memcpy
-.L2187:
-	ubfiz	x19, x19, 9, 16
-	mov	x0, x28
-	add	x23, x23, x19
-	bl	buf_free
-	b	.L2172
-.L2190:
-	mov	w0, -1
-	b	.L2164
-	.size	ftl_read, .-ftl_read
-	.section	.text.FtlRead,"ax",@progbits
-	.align	2
-	.global	FtlRead
-	.type	FtlRead, %function
-FtlRead:
 	and	w0, w0, 255
-	b	ftl_read
-	.size	FtlRead, .-FtlRead
-	.section	.text.StorageSysDataLoad,"ax",@progbits
-	.align	2
-	.global	StorageSysDataLoad
-	.type	StorageSysDataLoad, %function
-StorageSysDataLoad:
-	stp	x29, x30, [sp, -32]!
-	mov	w2, 512
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	x19, x1
-	mov	w20, w0
-	mov	w1, 0
-	mov	x0, x19
-	bl	ftl_memset
-	mov	x3, x19
-	mov	w1, w20
-	ldp	x19, x20, [sp, 16]
-	mov	w2, 1
-	ldp	x29, x30, [sp], 32
-	mov	w0, 2
-	b	ftl_read
-	.size	StorageSysDataLoad, .-StorageSysDataLoad
-	.section	.text.vpn_check,"ax",@progbits
-	.align	2
-	.global	vpn_check
-	.type	vpn_check, %function
-vpn_check:
-	stp	x29, x30, [sp, -112]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR60
-	stp	x21, x22, [sp, 32]
-	adrp	x20, .LANCHOR56
-	stp	x23, x24, [sp, 48]
-	adrp	x21, .LANCHOR47
-	stp	x25, x26, [sp, 64]
-	adrp	x22, .LANCHOR54
-	str	x27, [sp, 80]
-	bl	dump_ftl_info
-	ldr	x0, [x19, #:lo12:.LANCHOR60]
-	mov	w24, 0
-	add	x21, x21, :lo12:.LANCHOR47
-	add	x23, x22, :lo12:.LANCHOR54
-	ldrh	w3, [x0, 80]
-	ldrh	w2, [x0, 48]
-	ldrh	w1, [x0, 16]
-	adrp	x0, .LC115
-	add	x0, x0, :lo12:.LC115
-	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR60]
-	ldr	x3, [x20, #:lo12:.LANCHOR56]
-	ldrh	w1, [x0, 16]
-	ldrh	w2, [x0, 22]
-	ubfiz	x0, x1, 1, 16
-	ldrh	w3, [x3, x0]
-	adrp	x0, .LC116
-	add	x0, x0, :lo12:.LC116
-	sub	w4, w3, w2
-	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR60]
-	adrp	x19, check_vpc_tbl
-	ldr	x3, [x20, #:lo12:.LANCHOR56]
-	ldrh	w1, [x0, 48]
-	ldrh	w2, [x0, 54]
-	ubfiz	x0, x1, 1, 16
-	ldrh	w3, [x3, x0]
-	adrp	x0, .LC117
-	add	x0, x0, :lo12:.LC117
-	sub	w4, w3, w2
-	bl	printf
-	mov	w2, 4352
-	mov	w1, 0
-	add	x0, x19, :lo12:check_vpc_tbl
-	bl	ftl_memset
-.L2202:
-	ldr	w0, [x21]
-	cmp	w24, w0
-	bcc	.L2210
-	adrp	x0, .LANCHOR54
-	adrp	x23, .LC120
-	add	x24, x0, :lo12:.LANCHOR54
-	mov	x22, x0
-	add	x23, x23, :lo12:.LC120
-	mov	w21, 0
-.L2211:
-	ldrh	w0, [x24]
-	cmp	w0, w21
-	bhi	.L2213
-	adrp	x23, .LC121
-	add	x22, x22, :lo12:.LANCHOR54
-	add	x19, x19, :lo12:check_vpc_tbl
-	add	x23, x23, :lo12:.LC121
-	mov	w21, 0
-	adrp	x27, .LANCHOR59
-.L2214:
-	ldrh	w0, [x22]
-	cmp	w0, w21
-	bhi	.L2219
+	cmp	w0, 253
+	bls	.L2080
+.L2082:
+	mov	w0, -2
+.L2078:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldr	x27, [sp, 80]
-	ldp	x29, x30, [sp], 112
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 80
 	ret
-.L2210:
-	mov	w0, w24
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 108]
+.L2080:
+	ldrb	w0, [x24, 1]
+	cmp	w0, 255
+	beq	.L2082
+.L2079:
+	ldrb	w0, [x23]
+	cmp	w0, 181
+	bne	.L2083
+	strb	w25, [x23]
+.L2083:
+	add	w20, w20, 1
+	add	x23, x23, 8
+	and	w20, w20, 255
+	cmp	w20, 4
+	bne	.L2084
+	adrp	x0, .LANCHOR166
+	add	x8, x0, :lo12:.LANCHOR166
+	add	x8, x8, 1
+	mov	x7, x0
+	add	x12, x21, :lo12:.LANCHOR33
+	mov	x10, 0
+.L2087:
+	ldrb	w2, [x8, -1]
+	mov	w11, w10
+	lsl	x23, x10, 5
+	mov	x1, x12
+	mov	x0, x8
+	bl	flash_mem_cmp8
+	cbnz	w0, .L2085
+	add	x0, x7, :lo12:.LANCHOR166
+	ubfiz	x11, x11, 5, 32
+	add	x23, x0, x23
+	add	x0, x0, x11
+	adrp	x1, .LANCHOR167
+	add	x4, x1, :lo12:.LANCHOR167
+	ldrb	w3, [x0, 22]
+	mov	x0, 0
+.L2086:
+	lsl	x5, x0, 5
+	mov	w2, w0
+	ldrb	w5, [x5, x4]
+	cmp	w5, w3
+	beq	.L2088
+	add	x0, x0, 1
+	cmp	x0, 4
+	bne	.L2086
+	mov	w2, w0
+.L2088:
+	ubfiz	x0, x2, 5, 32
+	add	x1, x1, :lo12:.LANCHOR167
+	add	x1, x1, x0
+	mov	w2, 32
+	adrp	x0, .LANCHOR129
+	add	x20, x19, :lo12:.LANCHOR26
+	add	x0, x0, :lo12:.LANCHOR129
+	bl	ftl_memcpy
+	mov	x1, x23
+	mov	w2, 32
+	mov	x0, x20
+	bl	ftl_memcpy
+	adrp	x1, .LANCHOR14
+	mov	x23, x1
+	ldrb	w0, [x1, #:lo12:.LANCHOR14]
+	cmp	w0, 8
+	bhi	.L2089
+	ldrb	w1, [x20, 20]
+	cmp	w1, 60
+	bls	.L2090
+	mov	w1, 60
+	strb	w1, [x20, 20]
+.L2090:
+	cmp	w0, 8
+	bne	.L2089
+	ldrb	w0, [x21, #:lo12:.LANCHOR33]
+	cmp	w0, 44
+	bne	.L2089
+	add	x0, x19, :lo12:.LANCHOR26
+	ldrb	w1, [x0, 28]
+	cmp	w1, 3
+	bne	.L2089
+	strb	wzr, [x0, 28]
+.L2089:
+	mov	w0, 16384
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR143
+	adrp	x21, .LANCHOR12
+	add	x20, x19, :lo12:.LANCHOR26
+	str	x0, [x1, #:lo12:.LANCHOR143]
+	mov	w0, 16384
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR135
+	str	x0, [x1, #:lo12:.LANCHOR135]
+	mov	w0, 2048
+	bl	ftl_malloc
+	str	x0, [x21, #:lo12:.LANCHOR12]
+	mov	w0, 64
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR142
+	str	x0, [x1, #:lo12:.LANCHOR142]
+	mov	w0, 64
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR136
+	str	x0, [x1, #:lo12:.LANCHOR136]
+	mov	w0, 64
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR140
+	str	x0, [x1, #:lo12:.LANCHOR140]
+	adrp	x0, .LANCHOR147
+	strb	wzr, [x0, #:lo12:.LANCHOR147]
+	bl	flash_die_info_init
+	ldrb	w0, [x20, 18]
+	bl	flash_lsb_page_tbl_build
+	ldrb	w0, [x20, 20]
+	adrp	x20, .LANCHOR139
+	bl	nandc_bch_sel
+	str	xzr, [x20, #:lo12:.LANCHOR139]
+	ldr	x1, [x22, #:lo12:.LANCHOR41]
+	adrp	x22, .LANCHOR32
+	ldrh	w0, [x1, 16]
+	lsr	w3, w0, 8
+	ubfx	x4, x0, 3, 1
+	and	w2, w3, 7
+	strb	w2, [x22, #:lo12:.LANCHOR32]
+	adrp	x2, .LANCHOR168
+	strb	w4, [x2, #:lo12:.LANCHOR168]
+	adrp	x2, .LANCHOR30
+	ubfx	x4, x0, 4, 1
+	strb	w4, [x2, #:lo12:.LANCHOR30]
+	adrp	x2, .LANCHOR69
+	ubfx	x4, x0, 12, 1
+	strb	w4, [x2, #:lo12:.LANCHOR69]
+	adrp	x2, .LANCHOR98
+	ubfx	x4, x0, 13, 1
+	ubfx	x0, x0, 14, 1
+	strb	w4, [x2, #:lo12:.LANCHOR98]
+	adrp	x2, .LANCHOR19
+	strb	w0, [x2, #:lo12:.LANCHOR19]
+	mov	w2, 60
+	ldrb	w0, [x1, 28]
+	adrp	x1, .LANCHOR18
+	strb	w0, [x1, #:lo12:.LANCHOR18]
+	adrp	x1, .LANCHOR169
+	strb	w2, [x1, #:lo12:.LANCHOR169]
+	ldrb	w2, [x23, #:lo12:.LANCHOR14]
+	cmp	w2, 9
+	bne	.L2091
+	mov	w2, 70
+	strb	w2, [x1, #:lo12:.LANCHOR169]
+.L2091:
+	add	x19, x19, :lo12:.LANCHOR26
+	adrp	x1, .LANCHOR170
+	adrp	x23, .LANCHOR9
+	strb	w0, [x1, #:lo12:.LANCHOR170]
+	ldrh	w1, [x19, 16]
+	ldrb	w0, [x19, 19]
+	strb	w0, [x23, #:lo12:.LANCHOR9]
+	tbz	x1, 6, .L2093
+	sub	w1, w0, #17
+	and	w1, w1, 255
+	cmp	w1, 2
+	bhi	.L2094
+	adrp	x1, micron_read_retrial
+	add	x1, x1, :lo12:micron_read_retrial
+	str	x1, [x20, #:lo12:.LANCHOR139]
+	cmp	w0, 19
+	adrp	x0, .LANCHOR137
+	beq	.L2095
+	mov	w1, 7
+.L2122:
+	strb	w1, [x0, #:lo12:.LANCHOR137]
+	b	.L2093
+.L2085:
+	add	x10, x10, 1
+	add	x8, x8, 32
+	cmp	x10, 25
+	bne	.L2087
+	b	.L2082
+.L2095:
+	mov	w1, 15
+	b	.L2122
+.L2094:
+	sub	w1, w0, #65
+	cmp	w0, 33
+	and	w1, w1, 255
+	ccmp	w1, 1, 0, ne
+	bhi	.L2097
+	adrp	x0, toshiba_read_retrial
+	add	x0, x0, :lo12:toshiba_read_retrial
+	str	x0, [x20, #:lo12:.LANCHOR139]
+	adrp	x0, .LANCHOR11
+	mov	w1, 4
+	strb	w1, [x0, #:lo12:.LANCHOR11]
+.L2124:
+	mov	w1, 7
+	adrp	x0, .LANCHOR137
+	b	.L2122
+.L2097:
+	sub	w2, w0, #34
+	sub	w1, w0, #67
+	and	w2, w2, 255
+	and	w1, w1, 255
+	cmp	w2, 1
+	ccmp	w1, 1, 0, hi
+	bhi	.L2098
+	adrp	x2, toshiba_read_retrial
+	add	x2, x2, :lo12:toshiba_read_retrial
+	str	x2, [x20, #:lo12:.LANCHOR139]
+	cmp	w0, 35
+	mov	w2, 68
+	ccmp	w0, w2, 4, ne
+	adrp	x0, .LANCHOR137
+	beq	.L2099
+	mov	w2, 7
+.L2121:
+	strb	w2, [x0, #:lo12:.LANCHOR137]
+	cmp	w1, 1
+	adrp	x0, .LANCHOR11
+	bhi	.L2101
+	mov	w1, 4
+.L2123:
+	strb	w1, [x0, #:lo12:.LANCHOR11]
+.L2093:
+	adrp	x19, .LANCHOR42
+	mov	w0, 4
+	strb	wzr, [x19, #:lo12:.LANCHOR42]
+	tbz	x3, 0, .L2102
+	bl	nandc_set_if_mode
+	mov	w0, 1
+	bl	flash_set_interface_mode
+	mov	w0, 1
+.L2102:
+	bl	nandc_set_if_mode
+	bl	flash_info_blk_init
 	cmn	w0, #1
-	bne	.L2203
-	mov	w2, 0
-	add	x1, x29, 108
-	mov	w0, w24
-	bl	pm_log2phys
-.L2204:
-	ldr	w2, [x29, 108]
-	cmn	w2, #1
-	beq	.L2206
-	adrp	x0, .LANCHOR71
-	mov	w3, 21
-	ldrh	w0, [x0, #:lo12:.LANCHOR71]
-	sub	w1, w3, w0
-	mov	w3, 1
-	lsr	w0, w2, w0
-	lsl	w3, w3, w1
-	sub	w3, w3, #1
-	and	w3, w3, w0
-	adrp	x0, .LANCHOR70
-	ldrb	w0, [x0, #:lo12:.LANCHOR70]
-	udiv	w3, w3, w0
-	ldrh	w0, [x22, #:lo12:.LANCHOR54]
-	and	w25, w3, 65535
-	and	w3, w3, 65535
-	cmp	w0, w25
-	bls	.L2207
-	add	x0, x19, :lo12:check_vpc_tbl
-	sxtw	x3, w3
-	ldrh	w1, [x0, x3, lsl 1]
-	add	w1, w1, 1
-	strh	w1, [x0, x3, lsl 1]
-.L2208:
-	ldrh	w0, [x23]
-	cmp	w0, w25
-	bhi	.L2206
-	adrp	x1, .LANCHOR158
-	adrp	x0, .LC0
-	mov	w2, 1111
-	add	x1, x1, :lo12:.LANCHOR158
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2209:
-	b	.L2209
-.L2203:
-	adrp	x1, .LANCHOR71
-	ldrh	w3, [x1, #:lo12:.LANCHOR71]
-	mov	w1, 21
-	sub	w2, w1, w3
-	mov	w1, 1
-	lsr	w0, w0, w3
-	lsl	w1, w1, w2
-	sub	w1, w1, #1
-	and	w0, w1, w0
-	adrp	x1, .LANCHOR70
-	ldrb	w1, [x1, #:lo12:.LANCHOR70]
-	udiv	w0, w0, w1
-	ldrh	w1, [x22, #:lo12:.LANCHOR54]
-	cmp	w1, w0, uxth
-	bhi	.L2204
-	adrp	x1, .LANCHOR158
+	beq	.L2078
+	ldrb	w0, [x23, #:lo12:.LANCHOR9]
+	sub	w0, w0, #1
+	and	w0, w0, 255
+	cmp	w0, 6
+	bhi	.L2104
+	adrp	x0, hynix_read_retrial
+	add	x0, x0, :lo12:hynix_read_retrial
+	str	x0, [x20, #:lo12:.LANCHOR139]
+.L2104:
+	ldrb	w0, [x22, #:lo12:.LANCHOR32]
+	tbnz	x0, 2, .L2105
+.L2125:
+	mov	w0, 0
+	b	.L2078
+.L2099:
+	mov	w2, 17
+	b	.L2121
+.L2101:
+	mov	w1, 5
+	b	.L2123
+.L2098:
+	sub	w0, w0, #36
+	and	w0, w0, 255
+	cmp	w0, 1
+	bhi	.L2093
+	adrp	x0, toshiba_3d_read_retrial
+	add	x0, x0, :lo12:toshiba_3d_read_retrial
+	str	x0, [x20, #:lo12:.LANCHOR139]
+	b	.L2124
+.L2105:
+	ldr	x0, [x21, #:lo12:.LANCHOR12]
+	ldrb	w0, [x0, 19]
+	cbz	w0, .L2125
+	adrp	x0, .LANCHOR141
+	ldrb	w1, [x0, #:lo12:.LANCHOR141]
+	adrp	x0, .LANCHOR20
+	ldrh	w0, [x0, #:lo12:.LANCHOR20]
+	mul	w1, w1, w0
+	mov	w0, 0
+	bl	flash_ddr_para_scan
+	ldrb	w0, [x19, #:lo12:.LANCHOR42]
+	cbnz	w0, .L2125
+	ldr	x0, [x21, #:lo12:.LANCHOR12]
+	strb	wzr, [x0, 19]
+	bl	flash_info_flush
+	b	.L2125
+	.size	nand_flash_init, .-nand_flash_init
+	.section	.text.ftl_sysblk_dump,"ax",@progbits
+	.align	2
+	.global	ftl_sysblk_dump
+	.type	ftl_sysblk_dump, %function
+ftl_sysblk_dump:
+	sub	sp, sp, #144
+	stp	x29, x30, [sp, 48]
+	add	x29, sp, 48
+	stp	x23, x24, [sp, 96]
+	stp	x25, x26, [sp, 112]
+	adrp	x26, .LANCHOR80
+	stp	x27, x28, [sp, 128]
+	add	x26, x26, :lo12:.LANCHOR80
+	stp	x19, x20, [sp, 64]
+	adrp	x27, .LANCHOR99
+	stp	x21, x22, [sp, 80]
+	and	w22, w0, 65535
+	mov	w0, 1
+	bl	buf_alloc
+	ldr	x23, [x0, 8]
+	adrp	x28, .LANCHOR52
+	mov	x24, x0
+	add	x27, x27, :lo12:.LANCHOR99
+	add	x28, x28, :lo12:.LANCHOR52
+	mov	w25, 0
+	mov	w19, 0
+.L2127:
+	ldrh	w0, [x26]
+	cmp	w0, w19
+	bhi	.L2129
+	mov	x0, x24
+	bl	buf_free
+	cbz	w25, .L2130
+	adrp	x1, .LANCHOR171
 	adrp	x0, .LC0
-	mov	w2, 1101
-	add	x1, x1, :lo12:.LANCHOR158
+	mov	w2, 1199
+	add	x1, x1, :lo12:.LANCHOR171
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2205:
-	b	.L2205
-.L2207:
-	mov	w1, w24
-	adrp	x0, .LC118
-	add	x0, x0, :lo12:.LC118
+.L2131:
+	b	.L2131
+.L2129:
+	ldrh	w20, [x27]
+	ldrb	w3, [x28]
+	ldr	x1, [x24, 8]
+	ldr	x2, [x24, 24]
+	madd	w20, w20, w22, w19
+	mov	w0, w20
+	bl	ftl_read_ppa_page
+	mov	w21, w0
+	ldr	x1, [x24, 24]
+	mov	w4, w0
+	ldr	x0, [x24, 8]
+	mov	w3, w20
+	ldr	w2, [x1, 12]
+	str	w2, [sp, 32]
+	ldr	w2, [x1, 8]
+	str	w2, [sp, 24]
+	ldr	w2, [x1, 4]
+	str	w2, [sp, 16]
+	mov	w2, w19
+	add	w19, w19, 1
+	ldr	w1, [x1]
+	and	w19, w19, 65535
+	str	w1, [sp, 8]
+	ldr	w1, [x0, 12]
+	str	w1, [sp]
+	mov	w1, w22
+	ldp	w5, w6, [x0]
+	ldr	w7, [x0, 8]
+	adrp	x0, .LC82
+	add	x0, x0, :lo12:.LC82
 	bl	printf
-	adrp	x0, .LANCHOR45
+	mov	w3, 32
 	mov	w2, 4
-	ldrb	w3, [x0, #:lo12:.LANCHOR45]
-	adrp	x0, .LANCHOR93+8
-	ldr	x1, [x0, #:lo12:.LANCHOR93+8]
-	adrp	x0, .LC119
-	lsl	w3, w3, 7
-	add	x0, x0, :lo12:.LC119
+	add	x1, x23, 704
+	adrp	x0, .LC89
+	add	x0, x0, :lo12:.LC89
 	bl	rknand_print_hex
-	b	.L2208
-.L2206:
-	add	w24, w24, 1
-	b	.L2202
-.L2213:
-	ldr	x1, [x20, #:lo12:.LANCHOR56]
-	uxtw	x0, w21
-	ldrh	w3, [x1, x0, lsl 1]
-	add	x1, x19, :lo12:check_vpc_tbl
-	ldrh	w2, [x1, w21, sxtw 1]
-	cmp	w3, w2
-	beq	.L2212
-	adrp	x1, .LANCHOR59
-	ldr	x1, [x1, #:lo12:.LANCHOR59]
-	add	x0, x1, x0, lsl 2
-	mov	w1, w21
-	ldrb	w4, [x0, 2]
-	mov	x0, x23
-	ubfx	x4, x4, 5, 3
-	bl	printf
-.L2212:
-	add	w21, w21, 1
-	and	w21, w21, 65535
-	b	.L2211
-.L2219:
-	ldr	x0, [x27, #:lo12:.LANCHOR59]
-	uxtw	x24, w21
-	add	x0, x0, x24, lsl 2
-	ldrb	w0, [x0, 2]
-	tst	w0, 224
-	bne	.L2215
-	sxtw	x25, w21
-	ldrh	w0, [x19, x25, lsl 1]
-	cbnz	w0, .L2216
-	ldr	x0, [x20, #:lo12:.LANCHOR56]
-	lsl	x26, x24, 1
-	ldrh	w0, [x0, x26]
-	cbz	w0, .L2217
-	mov	w1, w21
-	mov	x0, x23
-	bl	printf
-.L2217:
-	ldr	x0, [x20, #:lo12:.LANCHOR56]
-	strh	wzr, [x0, x26]
-.L2216:
-	ldr	x0, [x20, #:lo12:.LANCHOR56]
-	ldrh	w0, [x0, x24, lsl 1]
-	cbz	w0, .L2215
-	ldrh	w0, [x19, x25, lsl 1]
-	cbz	w0, .L2215
-	adrp	x1, .LANCHOR158
-	adrp	x0, .LC0
-	mov	w2, 1143
-	add	x1, x1, :lo12:.LANCHOR158
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2218:
-	b	.L2218
-.L2215:
-	add	w21, w21, 1
-	and	w21, w21, 65535
-	b	.L2214
-	.size	vpn_check, .-vpn_check
-	.section	.text.ftl_info_check,"ax",@progbits
+	cmp	w21, 512
+	ccmn	w21, #1, 4, ne
+	csinc	w25, w25, wzr, ne
+	b	.L2127
+.L2130:
+	mov	w0, 0
+	ldp	x19, x20, [sp, 64]
+	ldp	x21, x22, [sp, 80]
+	ldp	x23, x24, [sp, 96]
+	ldp	x25, x26, [sp, 112]
+	ldp	x27, x28, [sp, 128]
+	ldp	x29, x30, [sp, 48]
+	add	sp, sp, 144
+	ret
+	.size	ftl_sysblk_dump, .-ftl_sysblk_dump
+	.section	.text.dump_ftl_info,"ax",@progbits
 	.align	2
-	.global	ftl_info_check
-	.type	ftl_info_check, %function
-ftl_info_check:
-	stp	x29, x30, [sp, -128]!
-	adrp	x0, .LANCHOR46
+	.global	dump_ftl_info
+	.type	dump_ftl_info, %function
+dump_ftl_info:
+	stp	x29, x30, [sp, -48]!
+	adrp	x0, .LANCHOR155
+	add	x1, x0, :lo12:.LANCHOR155
 	add	x29, sp, 0
-	ldr	x1, [x0, #:lo12:.LANCHOR46]
-	stp	x27, x28, [sp, 80]
-	adrp	x27, .LC122
-	stp	x25, x26, [sp, 64]
-	add	x27, x27, :lo12:.LC122
-	adrp	x26, .LANCHOR54
-	stp	x21, x22, [sp, 32]
-	ldrh	w28, [x1, 134]
-	mov	w25, 0
-	stp	x23, x24, [sp, 48]
-	mov	w21, 0
 	stp	x19, x20, [sp, 16]
-	mov	w23, 0
-	str	x0, [x29, 112]
-	mov	w24, 0
-	add	x0, x26, :lo12:.LANCHOR54
-	mov	w20, 0
-	mov	w22, 0
-	adrp	x26, .LANCHOR56
-	str	x0, [x29, 120]
-.L2234:
-	ldr	x0, [x29, 120]
-	ldrh	w0, [x0]
-	cmp	w0, w28
-	bhi	.L2249
-	mov	w3, w20
-	mov	w2, w21
-	mov	w1, w22
-	adrp	x0, .LC123
-	add	x0, x0, :lo12:.LC123
+	adrp	x19, .LANCHOR5
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR53
+	ldrh	w3, [x1, 2]
+	adrp	x20, .LANCHOR80
+	ldrb	w2, [x1, 1]
+	adrp	x21, .LANCHOR2
+	ldrb	w1, [x0, #:lo12:.LANCHOR155]
+	adrp	x0, .LC90
+	add	x0, x0, :lo12:.LC90
 	bl	printf
-	mov	w1, w25
-	mov	w3, w23
-	mov	w2, w24
-	adrp	x0, .LC124
-	add	x0, x0, :lo12:.LC124
+	ldr	x0, [x22, #:lo12:.LANCHOR53]
+	ldrh	w2, [x0, 140]
+	ldrh	w1, [x0, 130]
+	adrp	x0, .LC91
+	add	x0, x0, :lo12:.LC91
 	bl	printf
-	ldr	x0, [x29, 112]
-	ldr	x0, [x0, #:lo12:.LANCHOR46]
-	ldrh	w1, [x0, 114]
-	cmp	w1, w25
-	beq	.L2250
-	strh	w25, [x0, 114]
-.L2250:
-	ldrh	w1, [x0, 118]
-	cmp	w1, w24
-	beq	.L2251
-	strh	w24, [x0, 118]
-.L2251:
-	ldrh	w1, [x0, 116]
-	cmp	w1, w23
-	beq	.L2252
-	strh	w23, [x0, 116]
-.L2252:
-	ldrh	w1, [x0, 122]
-	cmp	w1, w22
-	beq	.L2253
-	strh	w22, [x0, 122]
-.L2253:
-	ldrh	w1, [x0, 120]
-	cmp	w1, w21
-	beq	.L2254
-	strh	w21, [x0, 120]
-.L2254:
-	ldrh	w1, [x0, 124]
-	cmp	w1, w20
-	beq	.L2233
-	strh	w20, [x0, 124]
-.L2233:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 128
-	ret
-.L2249:
-	adrp	x0, .LANCHOR59
-	uxtw	x19, w28
-	ldr	x4, [x0, #:lo12:.LANCHOR59]
-	add	x4, x4, x19, lsl 2
-	ldrb	w0, [x4, 2]
-	and	w1, w0, 224
-	cmp	w1, 64
-	bne	.L2235
-	add	w22, w22, 1
-	and	w22, w22, 65535
-.L2268:
-	ldr	x0, [x26, #:lo12:.LANCHOR56]
-	ldrh	w1, [x0, x19, lsl 1]
-	cmp	w1, 15
-	bls	.L2241
-	adrp	x0, .LANCHOR79
-	ldrh	w0, [x0, #:lo12:.LANCHOR79]
-.L2265:
-	adrp	x2, .LANCHOR69
-	ldrb	w2, [x2, #:lo12:.LANCHOR69]
-	mul	w0, w0, w2
-	cmp	w1, w0
-	bne	.L2237
-.L2241:
-	mov	w2, 0
-	mov	w1, 1
-	mov	w0, w28
-	bl	gc_add_sblk
-.L2237:
-	add	w3, w28, 1
-	and	w28, w3, 65535
-	b	.L2234
-.L2235:
-	cmp	w1, 96
-	bne	.L2238
-	add	w20, w20, 1
-	and	w20, w20, 65535
-	b	.L2268
-.L2238:
-	cmp	w1, 160
-	bne	.L2240
-	ldr	x0, [x26, #:lo12:.LANCHOR56]
-	add	w21, w21, 1
-	and	w21, w21, 65535
-	ldrh	w1, [x0, x19, lsl 1]
-	cmp	w1, 15
-	bls	.L2241
-	adrp	x0, .LANCHOR68
-	ldrh	w0, [x0, #:lo12:.LANCHOR68]
-	b	.L2265
-.L2240:
-	cbnz	w1, .L2237
-	ands	w0, w0, 24
-	bne	.L2242
-	add	w25, w25, 1
-	and	w25, w25, 65535
-.L2243:
-	ldr	x0, [x26, #:lo12:.LANCHOR56]
-	lsl	x19, x19, 1
-	ldrh	w2, [x0, x19]
-	cbz	w2, .L2245
-	str	x4, [x29, 104]
-	mov	w1, w28
-	mov	x0, x27
+	ldr	x1, [x19, #:lo12:.LANCHOR5]
+	adrp	x0, .LC92
+	add	x0, x0, :lo12:.LC92
+	ldrh	w5, [x1, 26]
+	ldrh	w4, [x1, 22]
+	ldrb	w3, [x1, 21]
+	ldrh	w2, [x1, 18]
+	ldrh	w1, [x1, 16]
 	bl	printf
-	ldr	x4, [x29, 104]
-	ldrb	w0, [x4, 2]
-	tbz	x0, 4, .L2246
-	mov	w1, 5
-.L2263:
-	bfi	w0, w1, 5, 3
-	strb	w0, [x4, 2]
-	mov	w2, 0
-	mov	w1, 1
-	mov	w0, w28
-	bl	gc_add_sblk
-	bl	vpn_check
-.L2245:
-	adrp	x0, .LANCHOR56
-	ldr	x0, [x0, #:lo12:.LANCHOR56]
-	ldrh	w0, [x0, x19]
-	cbz	w0, .L2237
-	adrp	x1, .LANCHOR159
-	adrp	x0, .LC0
-	mov	w2, 1202
-	add	x1, x1, :lo12:.LANCHOR159
-	add	x0, x0, :lo12:.LC0
+	ldr	x1, [x19, #:lo12:.LANCHOR5]
+	adrp	x0, .LC93
+	add	x0, x0, :lo12:.LC93
+	ldrh	w5, [x1, 58]
+	ldrh	w4, [x1, 54]
+	ldrb	w3, [x1, 53]
+	ldrh	w2, [x1, 50]
+	ldrh	w1, [x1, 48]
 	bl	printf
-.L2248:
-	b	.L2248
-.L2242:
-	cmp	w0, 16
-	bne	.L2244
-	add	w24, w24, 1
-	and	w24, w24, 65535
-	b	.L2243
-.L2244:
-	add	w23, w23, 1
-	and	w23, w23, 65535
-	b	.L2243
-.L2246:
-	mov	w1, 2
-	b	.L2263
-	.size	ftl_info_check, .-ftl_info_check
-	.section	.text.gc_scan_src_blk,"ax",@progbits
+	ldr	x1, [x19, #:lo12:.LANCHOR5]
+	adrp	x19, .LANCHOR72
+	adrp	x0, .LC94
+	add	x0, x0, :lo12:.LC94
+	ldrh	w5, [x1, 90]
+	ldrh	w4, [x1, 86]
+	ldrb	w3, [x1, 85]
+	ldrh	w2, [x1, 82]
+	ldrh	w1, [x1, 80]
+	bl	printf
+	ldrb	w0, [x19, #:lo12:.LANCHOR72]
+	mov	w2, 4
+	ldrh	w3, [x20, #:lo12:.LANCHOR80]
+	mul	w3, w3, w0
+	adrp	x0, .LANCHOR105
+	ldr	x1, [x0, #:lo12:.LANCHOR105]
+	adrp	x0, .LC95
+	lsl	w3, w3, 1
+	add	x0, x0, :lo12:.LC95
+	bl	rknand_print_hex
+	adrp	x0, .LANCHOR4
+	ldrh	w3, [x21, #:lo12:.LANCHOR2]
+	mov	w2, 2
+	ldr	x1, [x0, #:lo12:.LANCHOR4]
+	adrp	x0, .LC96
+	add	x0, x0, :lo12:.LC96
+	bl	rknand_print_hex
+	ldr	x1, [x22, #:lo12:.LANCHOR53]
+	mov	w3, 32
+	mov	w2, 4
+	adrp	x0, .LC89
+	add	x1, x1, 704
+	add	x0, x0, :lo12:.LC89
+	bl	rknand_print_hex
+	adrp	x0, .LANCHOR3
+	ldrh	w3, [x21, #:lo12:.LANCHOR2]
+	mov	w2, 4
+	ldr	x1, [x0, #:lo12:.LANCHOR3]
+	adrp	x0, .LC97
+	add	x0, x0, :lo12:.LC97
+	bl	rknand_print_hex
+	mov	w3, 256
+	mov	w2, 2
+	adrp	x1, .LANCHOR104
+	adrp	x0, .LC98
+	add	x1, x1, :lo12:.LANCHOR104
+	add	x0, x0, :lo12:.LC98
+	bl	rknand_print_hex
+	ldrb	w0, [x19, #:lo12:.LANCHOR72]
+	mov	w2, 2
+	ldrh	w3, [x20, #:lo12:.LANCHOR80]
+	ldp	x21, x22, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	mul	w3, w3, w0
+	adrp	x0, .LANCHOR106
+	ldp	x29, x30, [sp], 48
+	lsl	w3, w3, 1
+	ldr	x1, [x0, #:lo12:.LANCHOR106]
+	adrp	x0, .LC99
+	add	x0, x0, :lo12:.LC99
+	b	rknand_print_hex
+	.size	dump_ftl_info, .-dump_ftl_info
+	.section	.text.pm_ppa_update_check,"ax",@progbits
 	.align	2
-	.global	gc_scan_src_blk
-	.type	gc_scan_src_blk, %function
-gc_scan_src_blk:
-	stp	x29, x30, [sp, -96]!
-	mov	w0, 65535
+	.global	pm_ppa_update_check
+	.type	pm_ppa_update_check, %function
+pm_ppa_update_check:
+	adrp	x3, .LANCHOR96
+	mov	w4, 21
+	ldrh	w3, [x3, #:lo12:.LANCHOR96]
+	sub	w5, w4, w3
+	mov	w4, 1
+	lsr	w3, w2, w3
+	lsl	w4, w4, w5
+	sub	w4, w4, #1
+	and	w4, w4, w3
+	adrp	x3, .LANCHOR95
+	ldrb	w3, [x3, #:lo12:.LANCHOR95]
+	udiv	w4, w4, w3
+	adrp	x3, .LANCHOR3
+	ldr	x3, [x3, #:lo12:.LANCHOR3]
+	add	x4, x3, x4, uxth 2
+	ldrb	w3, [x4, 2]
+	ubfx	x3, x3, 5, 3
+	cmp	w3, 1
+	ccmp	w3, 7, 4, ne
+	bne	.L2139
+	stp	x29, x30, [sp, -16]!
+	mov	w3, w2
+	mov	w2, w1
+	mov	x1, x0
+	add	x29, sp, 0
+	adrp	x0, .LC100
+	add	x0, x0, :lo12:.LC100
+	bl	printf
+	bl	dump_ftl_info
+	mov	w0, -1
+	ldp	x29, x30, [sp], 16
+	ret
+.L2139:
+	mov	w0, 0
+	ret
+	.size	pm_ppa_update_check, .-pm_ppa_update_check
+	.section	.text.load_l2p_region,"ax",@progbits
+	.align	2
+	.type	load_l2p_region, %function
+load_l2p_region:
+	stp	x29, x30, [sp, -64]!
+	and	w1, w1, 65535
+	cmp	w1, 31
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR58
 	stp	x21, x22, [sp, 32]
-	ldrh	w1, [x19, #:lo12:.LANCHOR58]
-	stp	x23, x24, [sp, 48]
-	stp	x25, x26, [sp, 64]
-	cmp	w1, w0
-	bne	.L2270
-	adrp	x1, .LANCHOR160
+	str	x23, [sp, 48]
+	bls	.L2145
+	adrp	x1, .LANCHOR172
 	adrp	x0, .LC0
-	mov	w2, 880
-	add	x1, x1, :lo12:.LANCHOR160
+	mov	w2, 30
+	add	x1, x1, :lo12:.LANCHOR172
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2271:
-	b	.L2271
-.L2270:
-	adrp	x0, .LANCHOR22
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	tbz	x0, 8, .L2272
-	adrp	x2, .LANCHOR56
-	ubfiz	x0, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR56]
-	ldrh	w2, [x2, x0]
-	adrp	x0, .LC125
-	add	x0, x0, :lo12:.LC125
+.L2146:
+	b	.L2146
+.L2145:
+	adrp	x23, .LANCHOR53
+	and	w19, w0, 65535
+	ldr	x0, [x23, #:lo12:.LANCHOR53]
+	ldrh	w2, [x0, 698]
+	cmp	w2, w19
+	bcs	.L2147
+	mov	w1, w19
+	adrp	x0, .LC101
+	add	x0, x0, :lo12:.LC101
 	bl	printf
-.L2272:
-	ldrh	w0, [x19, #:lo12:.LANCHOR58]
-	add	x13, x19, :lo12:.LANCHOR58
-	add	x1, x13, 40
-	bl	ftl_get_blk_list_in_sblk
-	and	w1, w0, 255
-	strb	w1, [x13, 5]
-	cbnz	w1, .L2273
-	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR58]
-.L2309:
+	adrp	x0, .LANCHOR173
+	mov	w1, 255
+	ldrh	w2, [x0, #:lo12:.LANCHOR173]
+	mov	x0, 0
+	ldr	x0, [x0, 8]
+	bl	ftl_memset
+	ldr	x0, [x23, #:lo12:.LANCHOR53]
+	ldrh	w0, [x0, 698]
+	cmp	w0, w19
+	bcs	.L2151
+	adrp	x1, .LANCHOR172
+	adrp	x0, .LC0
+	mov	w2, 34
+	add	x1, x1, :lo12:.LANCHOR172
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2149:
+	b	.L2149
+.L2147:
+	add	x0, x0, x19, sxtw 2
+	sbfiz	x1, x1, 4, 32
+	ldr	w21, [x0, 704]
+	adrp	x0, .LANCHOR117
+	add	x0, x0, :lo12:.LANCHOR117
+	add	x22, x0, x1
+	strh	w19, [x0, x1]
+	strh	wzr, [x22, 2]
+	cbnz	w21, .L2150
+	adrp	x0, .LANCHOR173
+	mov	w1, 255
+	ldrh	w2, [x0, #:lo12:.LANCHOR173]
+	ldr	x0, [x22, 8]
+	bl	ftl_memset
+.L2151:
 	mov	w0, 0
-.L2269:
+	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 96
+	ldp	x29, x30, [sp], 64
 	ret
-.L2273:
-	adrp	x1, .LANCHOR59
-	ldrh	w3, [x19, #:lo12:.LANCHOR58]
-	ldr	x1, [x1, #:lo12:.LANCHOR59]
-	mov	x2, x3
-	add	x1, x1, x3, lsl 2
-	ldrb	w1, [x1, 2]
-	and	w1, w1, 224
-	cmp	w1, 32
-	beq	.L2275
-	cmp	w1, 224
-	beq	.L2275
-	cbz	w1, .L2276
-	adrp	x3, .LANCHOR60
-	ldr	x3, [x3, #:lo12:.LANCHOR60]
-	ldrh	w4, [x3, 16]
-	cmp	w4, w2
-	beq	.L2275
-	ldrh	w4, [x3, 48]
-	cmp	w4, w2
-	beq	.L2275
-	ldrh	w3, [x3, 80]
-	cmp	w3, w2
-	bne	.L2307
-.L2275:
-	add	x0, x19, :lo12:.LANCHOR58
-	mov	w1, -1
-	strh	w1, [x19, #:lo12:.LANCHOR58]
-	strh	wzr, [x0, 24]
-	b	.L2309
-.L2276:
-	adrp	x0, .LANCHOR56
-	ldr	x0, [x0, #:lo12:.LANCHOR56]
-	ldrh	w0, [x0, x3, lsl 1]
-	cbz	w0, .L2275
-	adrp	x1, .LANCHOR160
-	adrp	x0, .LC0
-	mov	w2, 900
-	add	x1, x1, :lo12:.LANCHOR160
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2278:
-	b	.L2278
-.L2307:
-	and	w0, w0, 255
-	sub	w0, w0, #1
-	add	x0, x13, x0, sxtw 1
-	ldrh	w3, [x0, 40]
-	mov	w0, 65535
-	cmp	w3, w0
-	bne	.L2279
-	adrp	x1, .LANCHOR160
-	adrp	x0, .LC0
-	mov	w2, 908
-	add	x1, x1, :lo12:.LANCHOR160
-	add	x0, x0, :lo12:.LC0
+.L2150:
+	adrp	x20, .LANCHOR165
+	adrp	x0, .LANCHOR52
+	ldr	x1, [x22, 8]
+	ldrb	w3, [x0, #:lo12:.LANCHOR52]
+	mov	w0, w21
+	ldr	x2, [x20, #:lo12:.LANCHOR165]
+	bl	ftl_read_ppa_page
+	ldr	x1, [x20, #:lo12:.LANCHOR165]
+	ldr	w2, [x1]
+	cmp	w2, w19
+	beq	.L2152
+	mov	w4, w21
+	mov	w3, w0
+	mov	w1, w19
+	adrp	x0, .LC102
+	add	x0, x0, :lo12:.LC102
 	bl	printf
-.L2280:
-	b	.L2280
-.L2279:
-	adrp	x4, .LANCHOR75
-	adrp	x2, .LANCHOR79
-	cmp	w1, 160
-	mov	x24, x2
-	ldrh	w20, [x4, #:lo12:.LANCHOR75]
-	adrp	x21, .LANCHOR68
-	ldrh	w0, [x2, #:lo12:.LANCHOR79]
-	sub	w0, w0, #1
-	and	w0, w0, 65535
-	mul	w20, w20, w3
-	bne	.L2294
-	adrp	x1, .LANCHOR64
-	ldrb	w1, [x1, #:lo12:.LANCHOR64]
-	and	w22, w1, 65535
-	cmp	w1, 2
-	orr	w20, w20, w1, lsl 24
-	bne	.L2281
-	ldrh	w0, [x21, #:lo12:.LANCHOR68]
-	mov	w22, 2
-	sub	w0, w0, #1
-	and	w0, w0, 65535
-.L2281:
-	add	x23, x19, :lo12:.LANCHOR58
-	orr	w20, w0, w20
+	ldr	x1, [x23, #:lo12:.LANCHOR53]
+	mov	w2, 4
+	adrp	x0, .LC103
+	add	x0, x0, :lo12:.LC103
+	add	x1, x1, 704
+	ldrh	w3, [x1, -6]
+	bl	rknand_print_hex
+	ldr	x1, [x22, 8]
+	mov	w3, 16
+	mov	w2, 4
+	adrp	x0, .LC104
+	add	x0, x0, :lo12:.LC104
+	bl	rknand_print_hex
+	ldr	x1, [x20, #:lo12:.LANCHOR165]
+	mov	w2, 4
+	mov	w3, 16
+	adrp	x0, .LC105
+	add	x0, x0, :lo12:.LC105
+	bl	rknand_print_hex
+	adrp	x0, .LANCHOR96
+	ldrh	w2, [x0, #:lo12:.LANCHOR96]
+	mov	w0, 21
+	sub	w1, w0, w2
 	mov	w0, 1
-	strb	w22, [x23, 6]
-	strh	wzr, [x23, 2]
-	strb	wzr, [x23, 4]
-	strh	wzr, [x23, 26]
-	bl	buf_alloc
-	str	w20, [x0, 40]
-	adrp	x20, .LANCHOR69
-	mov	x25, x0
-	mov	w1, 1
-	bl	sblk_read_page
-	ldrh	w2, [x21, #:lo12:.LANCHOR68]
-	adrp	x21, .LANCHOR61
-	ldrb	w0, [x20, #:lo12:.LANCHOR69]
-	mov	w1, 255
-	mul	w2, w2, w0
-	ldr	x0, [x21, #:lo12:.LANCHOR61]
-	lsl	w2, w2, 2
-	bl	ftl_memset
-	strh	wzr, [x23, 24]
-	ldr	w0, [x25, 52]
-	cmp	w0, 512
-	ccmn	w0, #1, 4, ne
-	bne	.L2282
-.L2284:
-	mov	w0, -1
-	b	.L2269
-.L2294:
-	mov	w22, 1
-	b	.L2281
-.L2282:
-	ldr	x0, [x25, 24]
-	mov	w23, 15555
-	movk	w23, 0xf55f, lsl 16
-	ldr	w0, [x0]
-	cmp	w0, w23
-	beq	.L2283
-	ldrh	w0, [x19, #:lo12:.LANCHOR58]
+	lsr	w21, w21, w2
+	lsl	w0, w0, w1
+	adrp	x1, .LANCHOR95
+	sub	w0, w0, #1
+	ldrb	w2, [x1, #:lo12:.LANCHOR95]
+	and	w0, w0, w21
 	mov	x1, 0
+	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
-	ldr	x0, [x25, 24]
+.L2152:
+	ldr	x0, [x20, #:lo12:.LANCHOR165]
 	ldr	w0, [x0]
-	cmp	w0, w23
-	beq	.L2284
-	adrp	x1, .LANCHOR160
+	cmp	w19, w0
+	beq	.L2151
+	adrp	x1, .LANCHOR172
 	adrp	x0, .LC0
-	mov	w2, 937
-	add	x1, x1, :lo12:.LANCHOR160
+	mov	w2, 55
+	add	x1, x1, :lo12:.LANCHOR172
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2285:
-	b	.L2285
-.L2283:
-	ldrh	w0, [x24, #:lo12:.LANCHOR79]
-	adrp	x23, .LANCHOR70
-	ldrb	w20, [x20, #:lo12:.LANCHOR69]
-	add	x23, x23, :lo12:.LANCHOR70
-	ldr	x24, [x25, 8]
-	mov	x26, 0
-	mul	w20, w20, w0
-	mul	w20, w22, w20
-	adrp	x22, .LANCHOR71
-	add	x22, x22, :lo12:.LANCHOR71
-	and	w20, w20, 65535
-.L2286:
-	cmp	w20, w26
-	bgt	.L2291
-	mov	x0, x25
-	bl	buf_free
-	ldrh	w1, [x19, #:lo12:.LANCHOR58]
-	adrp	x20, .LANCHOR56
-	add	x0, x19, :lo12:.LANCHOR58
-	ldr	x3, [x20, #:lo12:.LANCHOR56]
-	ubfiz	x2, x1, 1, 16
-	ldrh	w2, [x3, x2]
-	ldrh	w3, [x0, 24]
-	cmp	w2, w3
-	beq	.L2292
-	adrp	x0, .LC126
-	add	x0, x0, :lo12:.LC126
-	bl	printf
-.L2292:
-	ldrh	w2, [x19, #:lo12:.LANCHOR58]
-	add	x0, x19, :lo12:.LANCHOR58
-	ldr	x1, [x20, #:lo12:.LANCHOR56]
-	ldrh	w0, [x0, 24]
-	ldrh	w1, [x1, x2, lsl 1]
+.L2153:
+	b	.L2153
+	.size	load_l2p_region, .-load_l2p_region
+	.section	.text.pm_gc,"ax",@progbits
+	.align	2
+	.global	pm_gc
+	.type	pm_gc, %function
+pm_gc:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR53
+	adrp	x20, .LANCHOR127
+	stp	x21, x22, [sp, 32]
+	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	stp	x23, x24, [sp, 48]
+	ldrh	w1, [x0, 688]
+	ldrh	w0, [x20, #:lo12:.LANCHOR127]
+	str	x25, [sp, 64]
+	sub	w0, w0, #1
 	cmp	w1, w0
-	bcs	.L2293
-	bl	vpn_check
-.L2293:
-	add	x0, x19, :lo12:.LANCHOR58
-	ldrh	w2, [x19, #:lo12:.LANCHOR58]
-	ldr	x1, [x20, #:lo12:.LANCHOR56]
-	ldrh	w3, [x0, 24]
-	strh	w3, [x1, x2, lsl 1]
-	strh	wzr, [x0, 28]
-	ldrh	w0, [x0, 24]
-	b	.L2269
-.L2291:
-	ldr	w0, [x24, x26, lsl 2]
-	cmn	w0, #1
-	beq	.L2288
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 92]
-	cmn	w0, #1
-	bne	.L2289
-	ldr	w0, [x24, x26, lsl 2]
-	mov	w2, 0
-	add	x1, x29, 92
-	bl	pm_log2phys
-.L2289:
-	ldrh	w1, [x22]
+	blt	.L2157
+	bl	pm_free_sblk
+	ldr	x2, [x19, #:lo12:.LANCHOR53]
+	ldrh	w1, [x20, #:lo12:.LANCHOR127]
+	sub	w1, w1, #1
+	ldrh	w3, [x2, 688]
+	cmp	w3, w1
+	blt	.L2157
+	add	x0, x2, x0, uxth 1
+	mov	w23, 65535
+	ldrh	w20, [x0, 416]
+	cmp	w20, w23
+	bne	.L2159
+	adrp	x1, .LANCHOR174
+	adrp	x0, .LC0
+	mov	w2, 127
+	add	x1, x1, :lo12:.LANCHOR174
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2160:
+	b	.L2160
+.L2159:
+	bl	pm_select_ram_region
+	and	x24, x0, 65535
+	adrp	x1, .LANCHOR117
+	lsl	x0, x24, 4
+	add	x2, x1, :lo12:.LANCHOR117
+	mov	x22, x19
+	add	x19, x2, x0
+	mov	x21, x24
+	ldrh	w0, [x2, x0]
+	cmp	w0, w23
+	mov	x23, x1
+	beq	.L2161
+	ldr	x1, [x19, 8]
+	cbz	x1, .L2161
+	ldrsh	w2, [x19, 2]
+	tbz	w2, #31, .L2161
+	bl	pm_write_page
+	ldrh	w0, [x19, 2]
+	and	w0, w0, 32767
+	strh	w0, [x19, 2]
+.L2161:
+	add	x1, x23, :lo12:.LANCHOR117
+	adrp	x25, .LANCHOR96
+	add	x24, x1, x24, lsl 4
+	add	x25, x25, :lo12:.LANCHOR96
+	mov	w19, 0
+.L2162:
+	ldr	x1, [x22, #:lo12:.LANCHOR53]
+	ldrh	w0, [x1, 698]
+	cmp	w0, w19
+	bhi	.L2164
+	bl	pm_free_sblk
+.L2157:
+	mov	w0, 0
+	ldr	x25, [sp, 64]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	ret
+.L2164:
+	add	x1, x1, x19, sxtw 2
+	ldrh	w3, [x25]
 	mov	w0, 21
-	ldr	w3, [x29, 92]
-	sub	w2, w0, w1
+	sub	w2, w0, w3
 	mov	w0, 1
+	ldr	w1, [x1, 704]
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
-	lsr	w1, w3, w1
+	lsr	w1, w1, w3
 	and	w0, w0, w1
-	ldrb	w1, [x23]
-	ldrh	w2, [x19, #:lo12:.LANCHOR58]
+	adrp	x1, .LANCHOR95
+	ldrb	w1, [x1, #:lo12:.LANCHOR95]
 	udiv	w0, w0, w1
-	add	x1, x19, :lo12:.LANCHOR58
-	cmp	w0, w2
-	bne	.L2288
-	ldrh	w0, [x1, 24]
-	ldr	x4, [x21, #:lo12:.LANCHOR61]
-	ubfiz	x2, x0, 2, 16
-	add	w0, w0, 1
-	str	w3, [x4, x2]
-	strh	w0, [x1, 24]
-.L2288:
-	add	x26, x26, 1
-	b	.L2286
-	.size	gc_scan_src_blk, .-gc_scan_src_blk
-	.section	.text.ftl_scan_all_data,"ax",@progbits
+	cmp	w20, w0, uxth
+	bne	.L2163
+	mov	w1, w21
+	mov	w0, w19
+	bl	load_l2p_region
+	ldr	x1, [x24, 8]
+	mov	w0, w19
+	bl	pm_write_page
+.L2163:
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L2162
+	.size	pm_gc, .-pm_gc
+	.section	.text.pm_flush_id,"ax",@progbits
 	.align	2
-	.global	ftl_scan_all_data
-	.type	ftl_scan_all_data, %function
-ftl_scan_all_data:
-	sub	sp, sp, #160
+	.global	pm_flush_id
+	.type	pm_flush_id, %function
+pm_flush_id:
+	stp	x29, x30, [sp, -32]!
+	ubfiz	x0, x0, 4, 16
+	adrp	x2, .LANCHOR117
+	add	x2, x2, :lo12:.LANCHOR117
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	add	x19, x2, x0
+	ldrh	w0, [x2, x0]
+	ldr	x1, [x19, 8]
+	bl	pm_write_page
+	ldrh	w0, [x19, 2]
+	and	w0, w0, 32767
+	strh	w0, [x19, 2]
+	adrp	x19, .LANCHOR115
+	ldr	w0, [x19, #:lo12:.LANCHOR115]
+	cbz	w0, .L2170
+	bl	pm_gc
+	str	wzr, [x19, #:lo12:.LANCHOR115]
+.L2170:
 	mov	w0, 0
-	stp	x29, x30, [sp, 16]
-	add	x29, sp, 16
-	stp	x19, x20, [sp, 32]
-	mov	w20, 0
-	stp	x23, x24, [sp, 64]
-	adrp	x23, .LANCHOR47
-	stp	x27, x28, [sp, 96]
-	add	x28, x23, :lo12:.LANCHOR47
-	stp	x21, x22, [sp, 48]
-	adrp	x24, .LC129
-	stp	x25, x26, [sp, 80]
-	bl	buf_alloc
-	mov	w1, 0
-	mov	x19, x0
-	adrp	x0, .LC127
-	add	x0, x0, :lo12:.LC127
-	bl	printf
-	add	x0, x24, :lo12:.LC129
-	str	x0, [x29, 120]
-.L2311:
-	ldr	w0, [x23, #:lo12:.LANCHOR47]
-	cmp	w20, w0
-	bcc	.L2324
-	mov	x0, x19
-	bl	buf_free
-	ldp	x29, x30, [sp, 16]
-	ldp	x19, x20, [sp, 32]
-	ldp	x21, x22, [sp, 48]
-	ldp	x23, x24, [sp, 64]
-	ldp	x25, x26, [sp, 80]
-	ldp	x27, x28, [sp, 96]
-	add	sp, sp, 160
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
 	ret
-.L2324:
-	mov	w0, -1
-	str	w0, [x19, 36]
-	tst	x20, 4095
-	bne	.L2312
-	ldr	w2, [x29, 140]
-	adrp	x0, .LC128
-	mov	w1, w20
-	add	x0, x0, :lo12:.LC128
-	bl	printf
-.L2312:
-	mov	w0, w20
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 140]
-	cmn	w0, #1
-	bne	.L2313
-	mov	w2, 0
-	add	x1, x29, 140
+	.size	pm_flush_id, .-pm_flush_id
+	.section	.text.pm_flush,"ax",@progbits
+	.align	2
+	.global	pm_flush
+	.type	pm_flush, %function
+pm_flush:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR117
+	add	x19, x19, :lo12:.LANCHOR117
+	mov	w20, 0
+	add	x19, x19, 2
+.L2177:
+	ldrsh	w0, [x19]
+	tbz	w0, #31, .L2176
 	mov	w0, w20
-	bl	pm_log2phys
-.L2313:
-	ldr	w0, [x29, 140]
-	stp	w0, w0, [x19, 40]
-	cmn	w0, #1
-	bne	.L2314
-.L2316:
+	bl	pm_flush_id
+.L2176:
 	add	w20, w20, 1
-	b	.L2311
-.L2314:
-	mov	w1, 1
-	mov	x0, x19
-	bl	sblk_read_page
-	ldr	w3, [x19, 52]
-	ldr	x0, [x19, 24]
-	cmp	w3, 256
-	ccmn	w3, #1, 4, ne
-	beq	.L2315
-	ldr	w1, [x0, 4]
-	cmp	w20, w1
-	beq	.L2316
-.L2315:
-	ldr	x1, [x19, 8]
-	add	x27, x24, :lo12:.LC129
-	adrp	x25, .LANCHOR45
-	adrp	x26, .LC130
-	adrp	x22, .LANCHOR93
-	ldr	w2, [x1, 4]
-	str	w2, [sp, 8]
-	ldr	w1, [x1]
-	str	w1, [sp]
-	mov	w1, w20
-	ldp	w4, w5, [x0]
-	ldp	w6, w7, [x0, 8]
-	mov	x0, x27
-	ldr	w2, [x19, 40]
-	bl	printf
-	ldr	x1, [x19, 24]
-	ldr	w0, [x1, 8]
-	cmn	w0, #1
-	bne	.L2317
-.L2319:
-	ldrb	w21, [x25, #:lo12:.LANCHOR45]
-	mov	w0, w20
-	bl	lpa_hash_get_ppa
-	add	x22, x22, :lo12:.LANCHOR93
-	mov	w4, w0
-	add	x0, x26, :lo12:.LC130
-	lsl	w27, w21, 7
-	ubfiz	w3, w21, 7, 9
-	sub	w3, w3, #1
-	add	x21, x22, 8
-	and	w3, w3, w20
-	adrp	x26, .LC132
-	sdiv	w27, w20, w27
-	and	w3, w3, 65535
-	add	x22, x22, 520
-	add	x26, x26, :lo12:.LC132
-	mov	w1, w20
-	and	w25, w27, 65535
-	mov	w2, w25
-	bl	printf
-	mov	w2, 0
-	add	x1, x29, 140
-	mov	w0, w20
-	bl	pm_log2phys
-.L2318:
-	ldr	x1, [x21]
-	cbz	x1, .L2323
-	ldrh	w0, [x21, -8]
-	cmp	w0, w25
-	bne	.L2323
-	mov	w3, 4096
-	mov	w2, 4
-	mov	x0, x26
-	bl	rknand_print_hex
-.L2323:
-	add	x21, x21, 16
-	cmp	x22, x21
-	bne	.L2318
-	b	.L2316
-.L2317:
-	ldr	w21, [x1, 4]
-	ldr	w1, [x28]
-	cmp	w21, w1
-	bcs	.L2319
-	str	w0, [x19, 40]
-	mov	w1, 1
-	mov	x0, x19
-	bl	sblk_read_page
-	ldr	x1, [x19, 8]
-	ldr	x0, [x19, 24]
-	ldr	w2, [x1, 4]
-	str	w2, [sp, 8]
-	ldr	w1, [x1]
-	str	w1, [sp]
-	mov	w1, w20
-	ldp	w4, w5, [x0]
-	ldp	w6, w7, [x0, 8]
-	mov	x0, x27
-	ldr	w2, [x19, 40]
-	ldr	w3, [x19, 52]
+	add	x19, x19, 16
+	and	w20, w20, 65535
+	cmp	w20, 32
+	bne	.L2177
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	pm_flush, .-pm_flush
+	.section	.text.flt_sys_flush,"ax",@progbits
+	.align	2
+	.global	flt_sys_flush
+	.type	flt_sys_flush, %function
+flt_sys_flush:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	bl	ftl_flush
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	ldp	x29, x30, [sp], 16
+	mov	w0, 0
+	b	ftl_info_flush
+	.size	flt_sys_flush, .-flt_sys_flush
+	.section	.text.rk_ftl_de_init,"ax",@progbits
+	.align	2
+	.global	rk_ftl_de_init
+	.type	rk_ftl_de_init, %function
+rk_ftl_de_init:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	bl	zftl_flash_de_init
+	bl	flt_sys_flush
+	ldp	x29, x30, [sp], 16
+	b	zftl_flash_de_init
+	.size	rk_ftl_de_init, .-rk_ftl_de_init
+	.section	.text.zftl_deinit,"ax",@progbits
+	.align	2
+	.global	zftl_deinit
+	.type	zftl_deinit, %function
+zftl_deinit:
+	b	rk_ftl_de_init
+	.size	zftl_deinit, .-zftl_deinit
+	.section	.text.pm_init,"ax",@progbits
+	.align	2
+	.global	pm_init
+	.type	pm_init, %function
+pm_init:
+	stp	x29, x30, [sp, -112]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	mov	w24, w0
+	adrp	x0, .LANCHOR115
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	adrp	x20, .LANCHOR117
+	stp	x25, x26, [sp, 64]
+	add	x19, x20, :lo12:.LANCHOR117
+	str	wzr, [x0, #:lo12:.LANCHOR115]
+	mov	w0, 64
+	stp	x27, x28, [sp, 80]
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR165
+	adrp	x22, .LANCHOR52
+	add	x23, x19, 512
+	mov	x21, x1
+	add	x22, x22, :lo12:.LANCHOR52
+	str	x0, [x1, #:lo12:.LANCHOR165]
+	mov	w25, -1
+.L2187:
+	strh	w25, [x19]
+	strh	wzr, [x19, 2]
+	cbz	w24, .L2186
+	ldrb	w0, [x22]
+	lsl	w0, w0, 9
+	bl	ftl_malloc
+	str	x0, [x19, 8]
+.L2186:
+	add	x19, x19, 16
+	cmp	x19, x23
+	bne	.L2187
+	add	x0, x20, :lo12:.LANCHOR117
+	adrp	x19, .LANCHOR53
+	ldr	x24, [x21, #:lo12:.LANCHOR165]
+	mov	w4, 4
+	ldr	x25, [x0, 8]
+	mov	x3, x24
+	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	mov	x2, x25
+	ldrh	w1, [x0, 692]
+	ldrb	w0, [x0, 694]
+	bl	flash_get_last_written_page
+	sxth	w26, w0
+	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	mov	w23, w26
+	ldrh	w2, [x0, 696]
+	cmp	w2, w26
+	bgt	.L2188
+	ldrh	w1, [x0, 692]
+	mov	w3, w26
+	adrp	x0, .LC106
+	add	x0, x0, :lo12:.LC106
+	adrp	x27, .LANCHOR99
+	adrp	x28, .LANCHOR52
+	add	x27, x27, :lo12:.LANCHOR99
+	add	x28, x28, :lo12:.LANCHOR52
 	bl	printf
-	mov	w0, w21
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 140]
-	cmn	w0, #1
-	bne	.L2320
-	mov	w2, 0
-	add	x1, x29, 140
-	mov	w0, w21
-	bl	pm_log2phys
-.L2320:
-	ldr	w0, [x29, 140]
+	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	ldrsh	w21, [x0, 696]
+.L2189:
+	cmp	w21, w26
+	ble	.L2191
+	adrp	x0, .LANCHOR157
 	mov	w1, 1
-	str	w0, [x19, 40]
-	mov	x0, x19
-	bl	sblk_read_page
-	ldr	x1, [x19, 8]
-	ldr	x0, [x19, 24]
-	ldr	w2, [x1, 4]
-	str	w2, [sp, 8]
-	ldr	w1, [x1]
-	str	w1, [sp]
-	mov	w1, w21
-	ldp	w4, w5, [x0]
-	ldp	w6, w7, [x0, 8]
-	ldr	w2, [x19, 40]
-	ldr	w3, [x19, 52]
-	ldr	x0, [x29, 120]
-	bl	printf
-	ldrb	w3, [x25, #:lo12:.LANCHOR45]
-	mov	w0, w21
-	str	w3, [x29, 104]
-	lsl	w2, w3, 7
-	udiv	w2, w21, w2
-	and	w27, w2, 65535
-	str	w2, [x29, 112]
-	bl	lpa_hash_get_ppa
+	add	x20, x20, :lo12:.LANCHOR117
+	add	w23, w23, 1
+	strb	w1, [x0, #:lo12:.LANCHOR157]
+	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	strh	w23, [x0, 696]
+	bl	pm_free_sblk
+	ldr	x1, [x20, 8]
+	mov	w0, -1
+	bl	pm_write_page
+	ldr	x1, [x20, 8]
+	mov	w0, -1
+	bl	pm_write_page
+.L2188:
+	bl	pm_free_sblk
+	bl	pm_gc
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L2191:
+	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	mov	x3, x24
+	ldrh	w1, [x27]
+	mov	x2, x25
+	ldrb	w4, [x28]
+	ldrh	w22, [x0, 692]
+	ldrb	w0, [x0, 694]
+	madd	w22, w22, w1, w21
+	mov	w1, w22
+	bl	flash_read_page_en
 	mov	w4, w0
-	ldr	w3, [x29, 104]
-	mov	w1, w21
-	ldr	w2, [x29, 112]
-	add	x0, x26, :lo12:.LC130
-	ubfiz	w3, w3, 7, 9
-	and	w2, w2, 65535
-	sub	w3, w3, #1
-	and	w3, w3, w21
-	and	w3, w3, 65535
+	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	str	w4, [x29, 108]
+	mov	w2, w22
+	ldr	w1, [x0, 48]
+	ldrh	w3, [x0, 694]
+	add	w1, w1, 1
+	str	w1, [x0, 48]
+	adrp	x0, .LC107
+	add	x0, x0, :lo12:.LC107
+	ldr	w1, [x24]
+	bl	printf
+	ldr	w4, [x29, 108]
+	cmp	w4, 512
+	ccmn	w4, #1, 4, ne
+	beq	.L2190
+	ldr	x1, [x19, #:lo12:.LANCHOR53]
+	ldr	w0, [x24]
+	ldrh	w2, [x1, 698]
+	cmp	w0, w2
+	bcs	.L2190
+	add	x0, x1, x0, uxtw 2
+	str	w22, [x0, 704]
+.L2190:
+	add	w21, w21, 1
+	sxth	w21, w21
+	b	.L2189
+	.size	pm_init, .-pm_init
+	.section	.text.pm_log2phys,"ax",@progbits
+	.align	2
+	.global	pm_log2phys
+	.type	pm_log2phys, %function
+pm_log2phys:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	mov	x22, x1
+	adrp	x1, .LANCHOR52
+	stp	x19, x20, [sp, 16]
+	stp	x25, x26, [sp, 64]
+	ldrb	w1, [x1, #:lo12:.LANCHOR52]
+	stp	x23, x24, [sp, 48]
+	mov	w23, w2
+	lsl	w21, w1, 7
+	ubfiz	w20, w1, 7, 9
+	adrp	x1, .LANCHOR54
+	udiv	w21, w0, w21
+	ldr	w2, [x1, #:lo12:.LANCHOR54]
+	cmp	w0, w2
+	and	w25, w21, 65535
+	msub	w20, w25, w20, w0
+	bcc	.L2201
+	mov	w1, w0
+	adrp	x0, .LC108
+	add	x0, x0, :lo12:.LC108
 	bl	printf
+	mov	w0, -1
+.L2200:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L2201:
+	adrp	x24, .LANCHOR117
+	add	x0, x24, :lo12:.LANCHOR117
+	and	x20, x20, 65535
+	add	x0, x0, 8
+	mov	x19, 0
+.L2207:
+	ldr	x1, [x0]
+	cbz	x1, .L2203
+	ldrh	w1, [x0, -8]
+	cmp	w1, w25
+	bne	.L2203
+.L2204:
+	cbnz	w23, .L2205
+	add	x0, x24, :lo12:.LANCHOR117
+	add	x0, x0, x19, lsl 4
+	ldr	x0, [x0, 8]
+	ldr	w0, [x0, x20, lsl 2]
+	str	w0, [x22]
+.L2206:
+	add	x24, x24, :lo12:.LANCHOR117
+	add	x19, x24, x19, lsl 4
+	ldrh	w0, [x19, 2]
+	mvn	x1, x0
+	tst	x1, 32767
+	beq	.L2209
+	add	w0, w0, 1
+	strh	w0, [x19, 2]
+.L2209:
+	mov	w0, 0
+	b	.L2200
+.L2205:
+	add	x0, x24, :lo12:.LANCHOR117
+	ldr	w2, [x22]
+	add	x0, x0, x19, lsl 4
+	ldr	x1, [x0, 8]
+	str	w2, [x1, x20, lsl 2]
+	ldrh	w1, [x0, 2]
+	orr	w1, w1, -32768
+	strh	w1, [x0, 2]
+	adrp	x0, .LANCHOR118
+	strb	w21, [x0, #:lo12:.LANCHOR118]
+	b	.L2206
+.L2203:
+	add	w19, w19, 1
+	add	x0, x0, 16
+	and	x19, x19, 65535
+	cmp	w19, 32
+	bne	.L2207
+	bl	pm_select_ram_region
+	and	x19, x0, 65535
+	sbfiz	x1, x19, 4, 32
+	add	x2, x24, :lo12:.LANCHOR117
+	add	x3, x2, x1
+	mov	w26, w0
+	ldrh	w2, [x2, x1]
+	mov	w1, 65535
+	cmp	w2, w1
+	beq	.L2208
+	ldrsh	w1, [x3, 2]
+	tbz	w1, #31, .L2208
+	bl	pm_flush_id
+.L2208:
+	adrp	x0, .LANCHOR175
+	mov	w1, w26
+	strb	w19, [x0, #:lo12:.LANCHOR175]
+	mov	w0, w25
+	bl	load_l2p_region
+	b	.L2204
+	.size	pm_log2phys, .-pm_log2phys
+	.section	.text.ftl_read_ahead,"ax",@progbits
+	.align	2
+	.global	ftl_read_ahead
+	.type	ftl_read_ahead, %function
+ftl_read_ahead:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR56
+	stp	x21, x22, [sp, 32]
+	ldr	w0, [x20, #:lo12:.LANCHOR56]
+	stp	x23, x24, [sp, 48]
+	cmn	w0, #1
+	beq	.L2216
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x19, x0
+	mov	w0, -1
+	cbz	x19, .L2215
+	ldr	w21, [x20, #:lo12:.LANCHOR56]
+	str	w21, [x19, 36]
+	str	w0, [x20, #:lo12:.LANCHOR56]
 	mov	w0, w21
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 76]
+	ldr	x20, [x19, 8]
+	cmn	w0, #1
+	ldr	x22, [x19, 24]
+	bne	.L2218
 	mov	w2, 0
-	add	x1, x29, 140
+	add	x1, x29, 76
+	mov	w0, w21
 	bl	pm_log2phys
-	add	x0, x22, :lo12:.LANCHOR93
-	adrp	x5, .LC131
-	add	x21, x0, 8
-	add	x4, x0, 520
-	add	x5, x5, :lo12:.LC131
-.L2322:
-	ldr	x1, [x21]
-	cbz	x1, .L2321
-	ldrh	w0, [x21, -8]
-	cmp	w0, w27
-	bne	.L2321
-	mov	x0, x5
-	stp	x4, x5, [x29, 104]
-	mov	w3, 4096
-	mov	w2, 4
-	bl	rknand_print_hex
-	ldp	x4, x5, [x29, 104]
-.L2321:
-	add	x21, x21, 16
-	cmp	x4, x21
-	bne	.L2322
-	b	.L2319
-	.size	ftl_scan_all_data, .-ftl_scan_all_data
+.L2218:
+	ldr	w0, [x29, 76]
+	stp	w0, w0, [x19, 40]
+	cmn	w0, #1
+	bne	.L2219
+	adrp	x0, .LANCHOR52
+	mov	w1, 0
+	ldrb	w2, [x0, #:lo12:.LANCHOR52]
+	mov	x0, x20
+	lsl	w2, w2, 9
+	bl	ftl_memset
+	ldrb	w0, [x19, 2]
+	orr	w0, w0, 8
+	strb	w0, [x19, 2]
+.L2216:
+	mov	w0, 0
+.L2215:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	ret
+.L2219:
+	mov	w1, 1
+	mov	x0, x19
+	bl	sblk_read_page
+	ldr	w23, [x19, 52]
+	cmn	w23, #1
+	bne	.L2220
+	ldrb	w0, [x19, 2]
+	and	w0, w0, -9
+	strb	w0, [x19, 2]
+	adrp	x0, .LANCHOR5
+	ldr	x1, [x0, #:lo12:.LANCHOR5]
+	ldr	w0, [x1, 552]
+	add	w0, w0, 1
+	str	w0, [x1, 552]
+.L2221:
+	ldr	w5, [x22, 4]
+	cmp	w21, w5
+	beq	.L2222
+	ldrb	w1, [x19, 1]
+	adrp	x0, .LC110
+	ldr	w4, [x22]
+	mov	w2, w21
+	ldp	w6, w7, [x22, 8]
+	add	x0, x0, :lo12:.LC110
+	ldr	w3, [x29, 76]
+	bl	printf
+.L2222:
+	ldr	w0, [x22, 4]
+	cmp	w21, w0
+	bne	.L2223
+	cmn	w23, #1
+	bne	.L2216
+.L2223:
+	adrp	x1, .LANCHOR176
+	adrp	x0, .LC0
+	mov	w2, 821
+	add	x1, x1, :lo12:.LANCHOR176
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2224:
+	b	.L2224
+.L2220:
+	cmp	w23, 256
+	bne	.L2221
+	adrp	x0, .LANCHOR96
+	mov	w20, 21
+	mov	w24, 1
+	ldrh	w1, [x0, #:lo12:.LANCHOR96]
+	ldr	w0, [x29, 76]
+	sub	w20, w20, w1
+	ldp	w2, w3, [x19, 36]
+	lsr	w0, w0, w1
+	lsl	w20, w24, w20
+	sub	w20, w20, #1
+	and	w20, w20, w0
+	adrp	x0, .LANCHOR95
+	ldrb	w0, [x0, #:lo12:.LANCHOR95]
+	udiv	w20, w20, w0
+	adrp	x0, .LC109
+	add	x0, x0, :lo12:.LC109
+	and	w1, w20, 65535
+	bl	printf
+	mov	w2, 0
+	mov	w1, w24
+	mov	w0, w20
+	bl	gc_add_sblk
+	b	.L2221
+	.size	ftl_read_ahead, .-ftl_read_ahead
 	.section	.text.gc_recovery,"ax",@progbits
 	.align	2
 	.global	gc_recovery
 	.type	gc_recovery, %function
 gc_recovery:
 	sub	sp, sp, #240
-	adrp	x0, .LANCHOR67
+	adrp	x0, .LANCHOR70
 	stp	x29, x30, [sp, 32]
 	add	x29, sp, 32
 	stp	x21, x22, [sp, 64]
-	adrp	x21, .LANCHOR60
+	adrp	x21, .LANCHOR5
 	stp	x19, x20, [sp, 48]
-	ldr	x20, [x21, #:lo12:.LANCHOR60]
-	strb	wzr, [x0, #:lo12:.LANCHOR67]
-	adrp	x0, .LANCHOR104
+	ldr	x20, [x21, #:lo12:.LANCHOR5]
+	strb	wzr, [x0, #:lo12:.LANCHOR70]
+	adrp	x0, .LANCHOR130
 	stp	x23, x24, [sp, 80]
-	strb	wzr, [x0, #:lo12:.LANCHOR104]
+	strb	wzr, [x0, #:lo12:.LANCHOR130]
 	stp	x25, x26, [sp, 96]
 	stp	x27, x28, [sp, 112]
 	bl	gc_init
@@ -15061,8 +14433,8 @@ gc_recovery:
 	str	x0, [x29, 168]
 	mov	w0, 65535
 	cmp	w1, w0
-	ldr	x0, [x21, #:lo12:.LANCHOR60]
-	beq	.L2335
+	ldr	x0, [x21, #:lo12:.LANCHOR5]
+	beq	.L2231
 	mov	w1, -1
 	strh	w1, [x0, 130]
 	mov	w0, 1
@@ -15070,41 +14442,41 @@ gc_recovery:
 	mov	x27, x0
 	ldrb	w0, [x20, 89]
 	add	x1, x20, 80
-	adrp	x3, .LANCHOR75
-	adrp	x2, .LANCHOR64
+	adrp	x3, .LANCHOR99
+	adrp	x2, .LANCHOR67
 	sub	w0, w0, #1
 	str	x3, [x29, 128]
 	add	x0, x1, x0, sxtw 1
-	ldrh	w1, [x3, #:lo12:.LANCHOR75]
+	ldrh	w1, [x3, #:lo12:.LANCHOR99]
 	str	x2, [x29, 160]
 	ldrh	w0, [x0, 16]
 	mul	w1, w0, w1
-	ldrb	w0, [x2, #:lo12:.LANCHOR64]
+	ldrb	w0, [x2, #:lo12:.LANCHOR67]
 	str	w1, [x29, 200]
 	cmp	w0, 3
-	bne	.L2336
-	adrp	x0, .LANCHOR79
-	ldrh	w0, [x0, #:lo12:.LANCHOR79]
+	bne	.L2232
+	adrp	x0, .LANCHOR80
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	sub	w0, w0, #1
 	add	w0, w0, w1
 	orr	w0, w0, 50331648
-.L2383:
+.L2279:
 	str	w0, [x27, 40]
-.L2337:
+.L2233:
 	mov	w1, 1
 	mov	x0, x27
 	bl	sblk_read_page
 	ldr	w0, [x27, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2338
+	beq	.L2234
 	ldr	x0, [x27, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L2339
-.L2338:
+	beq	.L2235
+.L2234:
 	mov	x0, x27
 	bl	buf_free
 	ldr	x1, [x27, 24]
@@ -15117,47 +14489,47 @@ gc_recovery:
 	str	w2, [sp]
 	ldp	w3, w4, [x0]
 	ldp	w5, w6, [x0, 8]
-	adrp	x0, .LC133
+	adrp	x0, .LC111
 	ldr	w7, [x1]
-	add	x0, x0, :lo12:.LC133
+	add	x0, x0, :lo12:.LC111
 	ldr	w1, [x27, 40]
 	ldr	w2, [x27, 52]
 	bl	printf
-.L2387:
-	adrp	x0, .LANCHOR56
+.L2283:
+	adrp	x0, .LANCHOR4
 	ldrh	w1, [x20, 80]
 	mov	w22, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR56]
+	ldr	x0, [x0, #:lo12:.LANCHOR4]
 	strh	wzr, [x0, x1, lsl 1]
-	ldr	x0, [x21, #:lo12:.LANCHOR60]
+	ldr	x0, [x21, #:lo12:.LANCHOR5]
 	ldrh	w1, [x20, 80]
 	strh	w1, [x0, 130]
-.L2340:
+.L2236:
 	ldrh	w1, [x20, 80]
 	mov	w2, w22
-	adrp	x0, .LC138
-	add	x0, x0, :lo12:.LC138
+	adrp	x0, .LC114
+	add	x0, x0, :lo12:.LC114
 	bl	printf
 	mov	w0, -1
 	strh	w0, [x20, 80]
 	bl	pm_flush
 	bl	ftl_ext_info_flush
-	ldr	x0, [x21, #:lo12:.LANCHOR60]
+	ldr	x0, [x21, #:lo12:.LANCHOR5]
 	mov	w1, 65535
 	ldrh	w0, [x0, 130]
 	cmp	w0, w1
-	beq	.L2369
+	beq	.L2265
 	bl	ftl_free_sblk
-.L2369:
-	adrp	x0, .LANCHOR46
-	ldr	x1, [x0, #:lo12:.LANCHOR46]
+.L2265:
+	adrp	x0, .LANCHOR53
+	ldr	x1, [x0, #:lo12:.LANCHOR53]
 	mov	w0, -1
 	strh	w0, [x1, 126]
-	ldr	x1, [x21, #:lo12:.LANCHOR60]
+	ldr	x1, [x21, #:lo12:.LANCHOR5]
 	strh	w0, [x1, 130]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2334:
+.L2230:
 	ldp	x19, x20, [sp, 48]
 	ldp	x21, x22, [sp, 64]
 	ldp	x23, x24, [sp, 80]
@@ -15166,80 +14538,64 @@ gc_recovery:
 	ldp	x29, x30, [sp, 32]
 	add	sp, sp, 240
 	ret
-.L2336:
+.L2232:
 	cmp	w0, 2
-	bne	.L2337
-	adrp	x0, .LANCHOR79
-	ldrh	w0, [x0, #:lo12:.LANCHOR79]
+	bne	.L2233
+	adrp	x0, .LANCHOR80
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	add	w0, w1, w0, lsl 1
 	sub	w0, w0, #1
 	orr	w0, w0, 33554432
-	b	.L2383
-.L2339:
-	adrp	x26, .LANCHOR68
-	adrp	x19, .LANCHOR69
-	adrp	x23, .LANCHOR107
+	b	.L2279
+.L2235:
+	adrp	x26, .LANCHOR71
+	adrp	x19, .LANCHOR72
+	adrp	x22, .LANCHOR131
 	ldr	x1, [x27, 8]
-	ldrb	w0, [x19, #:lo12:.LANCHOR69]
-	adrp	x22, .LANCHOR108
-	ldrh	w2, [x26, #:lo12:.LANCHOR68]
+	ldrb	w0, [x19, #:lo12:.LANCHOR72]
+	ldrh	w2, [x26, #:lo12:.LANCHOR71]
 	mul	w2, w2, w0
-	ldr	x0, [x23, #:lo12:.LANCHOR107]
+	ldr	x0, [x22, #:lo12:.LANCHOR131]
 	lsl	w2, w2, 2
 	bl	ftl_memcpy
-	ldrb	w1, [x19, #:lo12:.LANCHOR69]
-	ldrh	w0, [x26, #:lo12:.LANCHOR68]
+	ldrb	w1, [x19, #:lo12:.LANCHOR72]
+	adrp	x19, .LANCHOR132
+	ldrh	w0, [x26, #:lo12:.LANCHOR71]
 	mul	w0, w0, w1
 	ldr	x1, [x27, 8]
 	lsl	w2, w0, 2
 	add	x1, x1, x0, sxtw 2
-	ldr	x0, [x22, #:lo12:.LANCHOR108]
+	ldr	x0, [x19, #:lo12:.LANCHOR132]
 	bl	ftl_memcpy
-	ldrb	w0, [x19, #:lo12:.LANCHOR69]
-	mov	w2, 4
-	ldrh	w3, [x26, #:lo12:.LANCHOR68]
-	ldr	x1, [x23, #:lo12:.LANCHOR107]
-	mul	w3, w3, w0
-	adrp	x0, .LC134
-	add	x0, x0, :lo12:.LC134
-	bl	rknand_print_hex
-	ldrb	w0, [x19, #:lo12:.LANCHOR69]
-	mov	w2, 4
-	ldrh	w3, [x26, #:lo12:.LANCHOR68]
-	ldr	x1, [x22, #:lo12:.LANCHOR108]
-	mul	w3, w3, w0
-	adrp	x0, .LC135
-	add	x0, x0, :lo12:.LC135
-	bl	rknand_print_hex
 	str	x26, [x29, 120]
-	adrp	x0, .LANCHOR79
-	stp	x22, x23, [x29, 144]
-	ldrh	w24, [x0, #:lo12:.LANCHOR79]
+	adrp	x0, .LANCHOR80
+	stp	x19, x22, [x29, 144]
+	ldrh	w24, [x0, #:lo12:.LANCHOR80]
 	ldr	x0, [x29, 160]
-	ldrb	w0, [x0, #:lo12:.LANCHOR64]
+	ldrb	w0, [x0, #:lo12:.LANCHOR67]
 	cmp	w0, 2
-	beq	.L2341
-.L2384:
+	beq	.L2237
+.L2280:
 	str	w0, [x29, 180]
-	adrp	x23, .LC136
+	adrp	x23, .LC112
 	ldr	x0, [x29, 128]
-	add	x23, x23, :lo12:.LC136
+	add	x23, x23, :lo12:.LC112
 	mov	w26, 0
 	mov	w22, 0
-	add	x0, x0, :lo12:.LANCHOR75
+	add	x0, x0, :lo12:.LANCHOR99
 	str	x0, [x29, 104]
-.L2343:
+.L2239:
 	sub	w0, w26, #1
 	str	w0, [x29, 184]
 	cmp	w26, w24
-	beq	.L2352
+	beq	.L2248
 	mov	x19, 0
-	b	.L2353
-.L2341:
+	b	.L2249
+.L2237:
 	lsl	w24, w24, 1
 	mov	w0, 1
-	b	.L2384
-.L2349:
+	b	.L2280
+.L2245:
 	ldr	x1, [x29, 104]
 	ldr	x0, [x29, 136]
 	ldrh	w1, [x1]
@@ -15249,32 +14605,32 @@ gc_recovery:
 	str	w0, [x29, 200]
 	ldrb	w1, [x1]
 	cmp	w1, 3
-	bne	.L2344
+	bne	.L2240
 	add	w0, w26, w0
 	orr	w0, w0, w25, lsl 24
-.L2385:
+.L2281:
 	str	w0, [x27, 40]
 	mov	w1, 1
 	mov	x0, x27
 	bl	sblk_read_page
 	ldr	x0, [x29, 152]
-	ldr	x0, [x0, #:lo12:.LANCHOR107]
+	ldr	x0, [x0, #:lo12:.LANCHOR131]
 	ldr	w3, [x0, x28]
 	ldr	x0, [x27, 24]
 	ldr	w6, [x0, 4]
 	cmp	w3, w6
-	bne	.L2347
+	bne	.L2243
 	ldr	x1, [x29, 144]
-	ldr	x1, [x1, #:lo12:.LANCHOR108]
+	ldr	x1, [x1, #:lo12:.LANCHOR132]
 	ldr	w2, [x1, x28]
 	ldr	w1, [x0, 8]
 	cmp	w2, w1
-	beq	.L2348
-.L2347:
+	beq	.L2244
+.L2243:
 	ldr	x1, [x29, 144]
 	ldr	w2, [x0, 12]
 	str	w2, [sp]
-	ldr	x1, [x1, #:lo12:.LANCHOR108]
+	ldr	x1, [x1, #:lo12:.LANCHOR132]
 	ldr	w5, [x0]
 	ldr	w7, [x0, 8]
 	mov	x0, x23
@@ -15283,107 +14639,107 @@ gc_recovery:
 	ldr	w1, [x27, 40]
 	bl	printf
 	ldr	x0, [x29, 152]
-	ldr	x0, [x0, #:lo12:.LANCHOR107]
+	ldr	x0, [x0, #:lo12:.LANCHOR131]
 	ldr	w0, [x0, x28]
 	cmn	w0, #1
-	beq	.L2348
+	beq	.L2244
 	mov	x0, x27
 	bl	buf_free
-	b	.L2387
-.L2344:
+	b	.L2283
+.L2240:
 	cmp	w1, 2
-	bne	.L2346
+	bne	.L2242
 	ldr	w1, [x29, 184]
 	add	w0, w0, w1
 	add	w0, w0, w25
 	orr	w0, w0, 33554432
-	b	.L2385
-.L2346:
+	b	.L2281
+.L2242:
 	add	w0, w26, w0
-	b	.L2385
-.L2348:
+	b	.L2281
+.L2244:
 	add	w22, w22, 1
 	add	w25, w25, 1
 	add	x28, x28, 4
-.L2351:
+.L2247:
 	ldr	w0, [x29, 180]
 	cmp	w0, w25
-	bcs	.L2349
+	bcs	.L2245
 	add	x19, x19, 1
-.L2353:
+.L2249:
 	ldr	x0, [x29, 168]
 	ldrb	w0, [x0, 9]
 	cmp	w0, w19
-	ble	.L2350
+	ble	.L2246
 	add	x0, x20, x19, lsl 1
 	str	x0, [x29, 136]
 	ldr	x0, [x29, 160]
 	sbfiz	x28, x22, 2, 32
 	mov	w25, 1
-	add	x0, x0, :lo12:.LANCHOR64
+	add	x0, x0, :lo12:.LANCHOR67
 	str	x0, [x29, 112]
-	b	.L2351
-.L2350:
+	b	.L2247
+.L2246:
 	add	w26, w26, 1
-	b	.L2343
-.L2352:
+	b	.L2239
+.L2248:
 	mov	x0, x27
 	bl	buf_free
 	ldr	x3, [x29, 120]
-	adrp	x24, .LANCHOR56
+	adrp	x24, .LANCHOR4
 	ldr	x0, [x29, 168]
 	mov	w22, 0
 	ldrh	w2, [x20, 80]
 	mov	w23, 0
-	ldr	x1, [x24, #:lo12:.LANCHOR56]
+	ldr	x1, [x24, #:lo12:.LANCHOR4]
 	mov	w27, 0
-	ldrh	w3, [x3, #:lo12:.LANCHOR68]
+	ldrh	w3, [x3, #:lo12:.LANCHOR71]
 	ldrb	w0, [x0, 9]
 	mul	w0, w0, w3
 	strh	w0, [x1, x2, lsl 1]
-	adrp	x0, .LANCHOR71
-	add	x0, x0, :lo12:.LANCHOR71
+	adrp	x0, .LANCHOR96
+	add	x0, x0, :lo12:.LANCHOR96
 	str	x0, [x29, 96]
-.L2354:
+.L2250:
 	sub	w0, w23, #1
 	str	w0, [x29, 120]
 	cmp	w26, w23
-	beq	.L2367
+	beq	.L2263
 	str	xzr, [x29, 184]
-	b	.L2368
-.L2364:
+	b	.L2264
+.L2260:
 	ldr	x1, [x29, 152]
 	sbfiz	x0, x27, 2, 32
-	ldr	x1, [x1, #:lo12:.LANCHOR107]
+	ldr	x1, [x1, #:lo12:.LANCHOR131]
 	ldr	w28, [x1, x0]
 	cmn	w28, #1
-	beq	.L2355
+	beq	.L2251
 	ldr	x1, [x29, 144]
-	ldr	x1, [x1, #:lo12:.LANCHOR108]
+	ldr	x1, [x1, #:lo12:.LANCHOR132]
 	ldr	w0, [x1, x0]
 	str	w0, [x29, 136]
 	mov	w0, w28
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 204]
 	cmn	w0, #1
-	bne	.L2356
+	bne	.L2252
 	mov	w2, 0
 	add	x1, x29, 204
 	mov	w0, w28
 	bl	pm_log2phys
-.L2356:
+.L2252:
 	ldr	x0, [x29, 112]
 	ldr	x1, [x29, 128]
 	ldrh	w0, [x0, 96]
-	ldrh	w1, [x1, #:lo12:.LANCHOR75]
+	ldrh	w1, [x1, #:lo12:.LANCHOR99]
 	mul	w0, w0, w1
 	ldr	x1, [x29, 160]
-	ldrb	w1, [x1, #:lo12:.LANCHOR64]
+	ldrb	w1, [x1, #:lo12:.LANCHOR67]
 	cmp	w1, 3
-	bne	.L2357
+	bne	.L2253
 	add	w0, w23, w0
 	orr	w0, w0, w25, lsl 24
-.L2386:
+.L2282:
 	str	w0, [x29, 200]
 	mov	w19, 21
 	ldr	x0, [x29, 96]
@@ -15401,29 +14757,29 @@ gc_recovery:
 	ldr	w0, [x29, 204]
 	cmp	w1, w0
 	and	x19, x19, 65535
-	bne	.L2360
+	bne	.L2256
 	ldr	w2, [x29, 200]
 	mov	w1, w28
 	str	w4, [x29, 136]
-	adrp	x0, .LC137
-	add	x0, x0, :lo12:.LC137
+	adrp	x0, .LC113
+	add	x0, x0, :lo12:.LC113
 	bl	pm_ppa_update_check
 	ldr	w4, [x29, 136]
-	cbz	w0, .L2361
-.L2381:
-	b	.L2381
-.L2357:
+	cbz	w0, .L2257
+.L2277:
+	b	.L2277
+.L2253:
 	cmp	w1, 2
-	bne	.L2359
+	bne	.L2255
 	ldr	w1, [x29, 120]
 	add	w0, w0, w1
 	add	w0, w0, w25
 	orr	w0, w0, 33554432
-	b	.L2386
-.L2359:
+	b	.L2282
+.L2255:
 	add	w0, w23, w0
-	b	.L2386
-.L2361:
+	b	.L2282
+.L2257:
 	mov	w2, w4
 	add	x1, x29, 200
 	mov	w0, w28
@@ -15431,302 +14787,330 @@ gc_recovery:
 	add	w22, w22, 1
 	mov	w0, w19
 	bl	ftl_vpn_decrement
-.L2363:
-	adrp	x0, .LANCHOR59
+.L2259:
+	adrp	x0, .LANCHOR3
 	add	w27, w27, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR59]
+	ldr	x0, [x0, #:lo12:.LANCHOR3]
 	add	x0, x0, x19, lsl 2
 	ldrb	w0, [x0, 2]
 	tst	w0, 224
-	bne	.L2355
-	ldr	x0, [x24, #:lo12:.LANCHOR56]
+	bne	.L2251
+	ldr	x0, [x24, #:lo12:.LANCHOR4]
 	lsl	x19, x19, 1
 	ldrh	w1, [x0, x19]
-	cbz	w1, .L2355
+	cbz	w1, .L2251
 	strh	wzr, [x0, x19]
-.L2355:
+.L2251:
 	add	w25, w25, 1
-.L2366:
+.L2262:
 	ldr	w0, [x29, 180]
 	cmp	w0, w25
-	bcs	.L2364
+	bcs	.L2260
 	ldr	x0, [x29, 184]
 	add	x0, x0, 1
 	str	x0, [x29, 184]
-.L2368:
+.L2264:
 	ldr	x0, [x29, 168]
 	ldr	w1, [x29, 184]
 	ldrb	w0, [x0, 9]
 	cmp	w0, w1
-	ble	.L2365
+	ble	.L2261
 	ldr	x0, [x29, 184]
 	mov	w25, 1
 	add	x0, x20, x0, lsl 1
 	str	x0, [x29, 112]
-	adrp	x0, .LANCHOR70
-	add	x0, x0, :lo12:.LANCHOR70
+	adrp	x0, .LANCHOR95
+	add	x0, x0, :lo12:.LANCHOR95
 	str	x0, [x29, 104]
-	b	.L2366
-.L2360:
+	b	.L2262
+.L2256:
 	ldr	w1, [x29, 200]
 	cmp	w0, w1
 	cinc	w22, w22, eq
-	b	.L2363
-.L2365:
+	b	.L2259
+.L2261:
 	add	w23, w23, 1
-	b	.L2354
-.L2367:
+	b	.L2250
+.L2263:
 	ldrh	w1, [x20, 80]
-	ldr	x0, [x24, #:lo12:.LANCHOR56]
+	ldr	x0, [x24, #:lo12:.LANCHOR4]
 	strh	w22, [x0, x1, lsl 1]
-	b	.L2340
-.L2335:
+	b	.L2236
+.L2231:
 	ldrh	w0, [x0, 130]
 	cmp	w0, w1
-	beq	.L2334
-	adrp	x19, .LANCHOR46
-	ldr	x1, [x19, #:lo12:.LANCHOR46]
+	beq	.L2230
+	adrp	x19, .LANCHOR53
+	ldr	x1, [x19, #:lo12:.LANCHOR53]
 	ldrh	w1, [x1, 126]
 	cmp	w1, w0
-	bne	.L2371
+	bne	.L2267
 	bl	pm_flush
-	ldr	x0, [x21, #:lo12:.LANCHOR60]
+	ldr	x0, [x21, #:lo12:.LANCHOR5]
 	ldrh	w0, [x0, 130]
 	bl	ftl_free_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	ldr	x0, [x19, #:lo12:.LANCHOR53]
 	mov	w1, -1
 	strh	w1, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2371:
-	ldr	x0, [x21, #:lo12:.LANCHOR60]
+.L2267:
+	ldr	x0, [x21, #:lo12:.LANCHOR5]
 	mov	w1, -1
 	strh	w1, [x0, 130]
-	b	.L2334
+	b	.L2230
 	.size	gc_recovery, .-gc_recovery
-	.section	.text.ftl_init,"ax",@progbits
+	.section	.text.zftl_init,"ax",@progbits
 	.align	2
-	.global	ftl_init
-	.type	ftl_init, %function
-ftl_init:
+	.global	zftl_init
+	.type	zftl_init, %function
+zftl_init:
 	stp	x29, x30, [sp, -64]!
-	adrp	x1, .LANCHOR42
+	adrp	x1, .LANCHOR49
 	mov	w0, -1
 	add	x29, sp, 0
-	strb	w0, [x1, #:lo12:.LANCHOR42]
-	adrp	x1, .LANCHOR43
+	strb	w0, [x1, #:lo12:.LANCHOR49]
+	adrp	x1, .LANCHOR50
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR79
-	strb	wzr, [x1, #:lo12:.LANCHOR43]
-	adrp	x1, .LANCHOR127
+	adrp	x20, .LANCHOR72
+	strb	wzr, [x1, #:lo12:.LANCHOR50]
+	adrp	x1, .LANCHOR151
 	stp	x21, x22, [sp, 32]
-	adrp	x19, .LANCHOR69
-	strb	w0, [x1, #:lo12:.LANCHOR127]
-	adrp	x0, .LANCHOR89
+	adrp	x19, .LANCHOR2
+	strb	w0, [x1, #:lo12:.LANCHOR151]
+	adrp	x0, .LANCHOR112
 	mov	w1, -1
-	stp	x23, x24, [sp, 48]
-	strb	wzr, [x0, #:lo12:.LANCHOR89]
-	adrp	x0, .LANCHOR49
-	adrp	x22, .LANCHOR54
-	adrp	x21, .LANCHOR149
-	str	w1, [x0, #:lo12:.LANCHOR49]
-	adrp	x1, .LC139
-	adrp	x0, .LC32
-	add	x1, x1, :lo12:.LC139
-	add	x0, x0, :lo12:.LC32
+	str	x23, [sp, 48]
+	strb	wzr, [x0, #:lo12:.LANCHOR112]
+	adrp	x0, .LANCHOR56
+	adrp	x21, .LANCHOR80
+	adrp	x22, .LANCHOR173
+	str	w1, [x0, #:lo12:.LANCHOR56]
+	adrp	x1, .LC115
+	adrp	x0, .LC42
+	add	x1, x1, :lo12:.LC115
+	add	x0, x0, :lo12:.LC42
 	bl	printf
-	adrp	x3, .LANCHOR19
-	add	x3, x3, :lo12:.LANCHOR19
-	adrp	x0, .LANCHOR64
-	adrp	x1, .LANCHOR45
-	adrp	x2, .LANCHOR68
-	adrp	x5, .LANCHOR70
-	ldrb	w7, [x3, 12]
-	strb	w7, [x0, #:lo12:.LANCHOR64]
-	ldrb	w0, [x3, 9]
-	strb	w0, [x1, #:lo12:.LANCHOR45]
-	ldrh	w1, [x3, 10]
-	strh	w1, [x2, #:lo12:.LANCHOR68]
-	adrp	x2, .LANCHOR8
-	ubfiz	w8, w0, 9, 7
-	strh	w8, [x21, #:lo12:.LANCHOR149]
-	ldrb	w4, [x2, #:lo12:.LANCHOR8]
-	adrp	x2, .LANCHOR76
-	sdiv	w7, w1, w7
-	strb	w4, [x2, #:lo12:.LANCHOR76]
-	ldrb	w2, [x3, 13]
-	strb	w2, [x5, #:lo12:.LANCHOR70]
-	ldrh	w5, [x3, 14]
-	adrp	x3, .LANCHOR13
-	strh	w7, [x20, #:lo12:.LANCHOR79]
-	mul	w4, w4, w2
-	ldrh	w6, [x3, #:lo12:.LANCHOR13]
-	adrp	x3, .LANCHOR75
-	strh	w5, [x22, #:lo12:.LANCHOR54]
-	and	w2, w4, 255
-	mov	w4, 1
-	strh	w6, [x3, #:lo12:.LANCHOR75]
-	mov	w3, 0
-	strb	w2, [x19, #:lo12:.LANCHOR69]
-.L2389:
-	cmp	w6, w4
-	bcs	.L2390
-	mul	w6, w0, w1
-	adrp	x4, .LANCHOR71
+	adrp	x2, .LANCHOR26
+	add	x2, x2, :lo12:.LANCHOR26
+	adrp	x0, .LANCHOR67
+	adrp	x1, .LANCHOR52
+	adrp	x6, .LANCHOR95
+	ldrb	w4, [x2, 12]
+	strb	w4, [x0, #:lo12:.LANCHOR67]
+	ldrb	w0, [x2, 9]
+	strb	w0, [x1, #:lo12:.LANCHOR52]
+	adrp	x1, .LANCHOR71
+	ldrh	w7, [x2, 10]
+	strh	w7, [x1, #:lo12:.LANCHOR71]
+	adrp	x1, .LANCHOR15
+	ubfiz	w10, w0, 9, 7
+	strh	w10, [x22, #:lo12:.LANCHOR173]
+	ldrb	w5, [x1, #:lo12:.LANCHOR15]
+	adrp	x1, .LANCHOR100
+	sdiv	w3, w7, w4
+	strb	w5, [x1, #:lo12:.LANCHOR100]
+	ldrb	w1, [x2, 13]
+	strb	w1, [x6, #:lo12:.LANCHOR95]
+	ldrh	w6, [x2, 14]
+	mov	w2, 0
+	strh	w3, [x21, #:lo12:.LANCHOR80]
+	mul	w5, w5, w1
+	adrp	x1, .LANCHOR20
+	strh	w6, [x19, #:lo12:.LANCHOR2]
+	and	w8, w5, 255
+	ldrh	w5, [x1, #:lo12:.LANCHOR20]
+	adrp	x1, .LANCHOR99
+	strb	w8, [x20, #:lo12:.LANCHOR72]
+	strh	w5, [x1, #:lo12:.LANCHOR99]
+	mov	w1, 1
+.L2285:
+	cmp	w5, w1
+	bcs	.L2286
+	adrp	x1, .LANCHOR96
+	sub	w2, w2, #1
+	adrp	x23, .LANCHOR161
+	mul	w3, w3, w8
+	strh	w2, [x1, #:lo12:.LANCHOR96]
+	mul	w2, w0, w7
 	mov	w1, 57344
-	sub	w3, w3, #1
 	movk	w1, 0x1c, lsl 16
-	strh	w3, [x4, #:lo12:.LANCHOR71]
-	adrp	x24, .LANCHOR137
-	adrp	x23, .LANCHOR60
-	mul	w4, w6, w5
-	mul	w1, w2, w1
-	lsr	w3, w4, 21
-	mul	w4, w4, w2
-	mul	w1, w1, w3
-	adrp	x3, .LANCHOR52
-	str	w1, [x3, #:lo12:.LANCHOR52]
+	mul	w5, w2, w6
+	mul	w1, w8, w1
+	mul	w2, w2, w8
+	lsr	w7, w5, 21
+	mul	w5, w5, w8
+	sub	w2, w2, #1
+	mul	w1, w1, w7
+	adrp	x7, .LANCHOR59
+	str	w1, [x7, #:lo12:.LANCHOR59]
 	add	w1, w1, 24576
-	adrp	x3, .LANCHOR161
+	adrp	x7, .LANCHOR177
 	udiv	w0, w1, w0
-	str	w4, [x3, #:lo12:.LANCHOR161]
-	adrp	x3, .LANCHOR162
-	str	w1, [x3, #:lo12:.LANCHOR162]
-	adrp	x3, .LANCHOR47
-	str	w0, [x3, #:lo12:.LANCHOR47]
-	sub	w3, w8, #1
-	add	w0, w3, w0, lsl 2
-	mul	w3, w7, w2
-	mul	w2, w6, w2
-	udiv	w0, w0, w8
+	str	w5, [x7, #:lo12:.LANCHOR177]
+	adrp	x5, .LANCHOR178
+	str	w1, [x5, #:lo12:.LANCHOR178]
+	adrp	x5, .LANCHOR54
 	udiv	w1, w1, w2
-	strh	w0, [x24, #:lo12:.LANCHOR137]
+	str	w0, [x5, #:lo12:.LANCHOR54]
+	sub	w5, w10, #1
+	add	w0, w5, w0, lsl 2
+	add	w1, w1, 8
+	udiv	w0, w0, w10
+	strh	w0, [x23, #:lo12:.LANCHOR161]
 	ubfiz	w0, w0, 4, 16
-	add	w1, w1, 2
 	sdiv	w0, w0, w3
-	adrp	x3, .LANCHOR101
-	strh	w0, [x3, #:lo12:.LANCHOR101]
-	adrp	x0, .LANCHOR163
-	strh	w1, [x0, #:lo12:.LANCHOR163]
-	add	w0, w5, w5, lsl 1
-	adrp	x1, .LANCHOR164
+	adrp	x3, .LANCHOR127
+	strh	w0, [x3, #:lo12:.LANCHOR127]
+	adrp	x0, .LANCHOR87
+	strh	w1, [x0, #:lo12:.LANCHOR87]
+	adrp	x1, .LANCHOR179
+	add	w0, w6, w6, lsl 1
 	asr	w0, w0, 2
-	strh	w0, [x1, #:lo12:.LANCHOR164]
-	lsr	w0, w5, 4
-	adrp	x1, .LANCHOR165
-	strh	w0, [x1, #:lo12:.LANCHOR165]
+	strh	w0, [x1, #:lo12:.LANCHOR179]
+	adrp	x1, .LANCHOR83
+	lsr	w0, w6, 4
+	cmp	w0, 79
+	strh	w0, [x1, #:lo12:.LANCHOR83]
+	bhi	.L2287
+	mov	w0, 80
+	strh	w0, [x1, #:lo12:.LANCHOR83]
+.L2287:
+	adrp	x1, .LANCHOR180
+	mov	w0, 4000
+	adrp	x3, .LANCHOR181
+	mov	w2, 1024
+	strh	w0, [x1, #:lo12:.LANCHOR180]
+	mov	w0, 50
+	strh	w0, [x3, #:lo12:.LANCHOR181]
+	adrp	x0, .LANCHOR126
+	mov	w5, 64
+	cmp	w4, 2
+	strh	w2, [x0, #:lo12:.LANCHOR126]
+	adrp	x2, .LANCHOR125
+	strh	w5, [x2, #:lo12:.LANCHOR125]
+	beq	.L2288
+	adrp	x4, .LANCHOR69
+	ldrb	w4, [x4, #:lo12:.LANCHOR69]
+	cbz	w4, .L2289
+.L2288:
+	mov	w4, 150
+	strh	w4, [x3, #:lo12:.LANCHOR181]
+	mov	w3, 128
+	strh	w3, [x2, #:lo12:.LANCHOR125]
+	adrp	x2, .LANCHOR18
+	ldrb	w2, [x2, #:lo12:.LANCHOR18]
+	cbnz	w2, .L2289
+	mov	w2, 600
+	strh	w2, [x1, #:lo12:.LANCHOR180]
+	mov	w1, 512
+	strh	w1, [x0, #:lo12:.LANCHOR126]
+.L2289:
 	bl	buf_init
-	ldrb	w1, [x19, #:lo12:.LANCHOR69]
-	ldrh	w0, [x20, #:lo12:.LANCHOR79]
+	ldrh	w1, [x19, #:lo12:.LANCHOR2]
+	mov	w0, 6
+	mul	w0, w1, w0
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR0
+	str	x0, [x1, #:lo12:.LANCHOR0]
+	ldrb	w1, [x20, #:lo12:.LANCHOR72]
+	ldrh	w0, [x21, #:lo12:.LANCHOR80]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR83
-	adrp	x2, ftl_ext_info_data_buffer
-	add	x2, x2, :lo12:ftl_ext_info_data_buffer
-	str	x0, [x1, #:lo12:.LANCHOR83]
-	adrp	x0, .LANCHOR82
-	ldrh	w1, [x20, #:lo12:.LANCHOR79]
-	str	x2, [x0, #:lo12:.LANCHOR82]
-	ldrb	w0, [x19, #:lo12:.LANCHOR69]
-	mul	w1, w1, w0
-	lsl	w0, w1, 1
-	adrp	x1, .LANCHOR56
-	add	x3, x2, x0, sxtw 2
-	str	x3, [x1, #:lo12:.LANCHOR56]
-	ldrh	w1, [x22, #:lo12:.LANCHOR54]
-	add	w1, w0, w1, lsr 1
-	adrp	x0, .LC140
+	adrp	x1, .LANCHOR106
+	adrp	x3, .LANCHOR4
+	str	x0, [x1, #:lo12:.LANCHOR106]
+	adrp	x0, .LANCHOR105
+	adrp	x1, ftl_ext_info_data_buffer
+	add	x2, x1, :lo12:ftl_ext_info_data_buffer
+	ldrb	w1, [x20, #:lo12:.LANCHOR72]
+	str	x2, [x0, #:lo12:.LANCHOR105]
+	ldrh	w0, [x21, #:lo12:.LANCHOR80]
+	mul	w0, w0, w1
+	lsl	w1, w0, 1
+	add	x4, x2, x1, sxtw 2
+	str	x4, [x3, #:lo12:.LANCHOR4]
+	ldrh	w3, [x19, #:lo12:.LANCHOR2]
+	adrp	x19, .LANCHOR5
+	add	w1, w1, w3, lsr 1
+	add	w0, w3, w0, lsl 2
 	add	x1, x2, x1, sxtw 2
-	add	x0, x0, :lo12:.LC140
-	str	x1, [x23, #:lo12:.LANCHOR60]
-	bl	printf
-	ldrh	w0, [x20, #:lo12:.LANCHOR79]
-	ldrb	w19, [x19, #:lo12:.LANCHOR69]
-	ldrh	w1, [x22, #:lo12:.LANCHOR54]
-	ldrh	w20, [x24, #:lo12:.LANCHOR137]
-	ldrh	w3, [x21, #:lo12:.LANCHOR149]
-	mul	w19, w0, w19
-	adrp	x0, .LC141
-	add	x0, x0, :lo12:.LC141
-	add	w19, w1, w19, lsl 2
-	lsl	w1, w1, 2
-	add	w20, w1, w20, lsl 2
-	lsl	w19, w19, 1
-	add	w19, w19, 600
-	add	w20, w20, 704
-	mov	w2, w20
-	mov	w1, w19
-	bl	printf
-	ldrh	w0, [x21, #:lo12:.LANCHOR149]
-	cmp	w19, w0
-	bhi	.L2391
-	cmp	w20, w0
-	bls	.L2392
-.L2391:
-.L2399:
-	b	.L2399
-.L2390:
-	add	w3, w3, 1
-	lsl	w4, w4, 1
-	and	w3, w3, 65535
-	b	.L2389
-.L2392:
+	str	x1, [x19, #:lo12:.LANCHOR5]
+	ldrh	w1, [x23, #:lo12:.LANCHOR161]
+	lsl	w2, w3, 2
+	lsl	w0, w0, 1
+	add	w0, w0, 612
+	add	w1, w2, w1, lsl 2
+	ldrh	w2, [x22, #:lo12:.LANCHOR173]
+	add	w1, w1, 704
+	cmp	w0, w2
+	bhi	.L2291
+	cmp	w1, w2
+	bls	.L2292
+.L2291:
+.L2302:
+	b	.L2302
+.L2286:
+	add	w2, w2, 1
+	lsl	w1, w1, 1
+	and	w2, w2, 65535
+	b	.L2285
+.L2292:
 	bl	sblk_init
 	bl	ftl_info_blk_init
 	cmn	w0, #1
-	beq	.L2388
+	beq	.L2284
 	bl	ftl_ext_info_init
-	adrp	x19, .LANCHOR46
+	adrp	x20, .LANCHOR53
 	mov	w0, 1
 	bl	pm_init
 	bl	lpa_rebuild_hash
-	ldr	x0, [x23, #:lo12:.LANCHOR60]
+	ldr	x0, [x19, #:lo12:.LANCHOR5]
 	mov	x1, 0
 	add	x0, x0, 16
 	bl	ftl_open_sblk_recovery
-	ldr	x0, [x23, #:lo12:.LANCHOR60]
+	ldr	x0, [x19, #:lo12:.LANCHOR5]
 	add	x1, x0, 16
 	add	x0, x0, 48
 	bl	ftl_open_sblk_recovery
-	ldr	x1, [x19, #:lo12:.LANCHOR46]
+	ldr	x1, [x20, #:lo12:.LANCHOR53]
 	ldr	w0, [x1, 8]
 	add	w0, w0, 16
 	str	w0, [x1, 8]
-	ldr	x0, [x23, #:lo12:.LANCHOR60]
+	ldr	x0, [x19, #:lo12:.LANCHOR5]
 	add	x0, x0, 16
 	bl	ftl_info_data_recovery
-	ldr	x0, [x23, #:lo12:.LANCHOR60]
+	ldr	x0, [x19, #:lo12:.LANCHOR5]
 	add	x0, x0, 48
 	bl	ftl_info_data_recovery
-	ldr	x0, [x23, #:lo12:.LANCHOR60]
+	ldr	x0, [x19, #:lo12:.LANCHOR5]
 	add	x0, x0, 80
 	bl	ftl_info_data_recovery
 	bl	gc_recovery
-	bl	ftl_info_check
 	bl	pm_flush
 	mov	w0, 1
 	bl	ftl_total_vpn_update
-	adrp	x0, .LANCHOR133
-	ldrb	w0, [x0, #:lo12:.LANCHOR133]
-	cbz	w0, .L2394
-	ldr	x1, [x19, #:lo12:.LANCHOR46]
+	adrp	x0, .LANCHOR157
+	ldrb	w0, [x0, #:lo12:.LANCHOR157]
+	cbz	w0, .L2294
+	ldr	x1, [x20, #:lo12:.LANCHOR53]
 	ldr	w0, [x1, 68]
 	add	w0, w0, 1
 	str	w0, [x1, 68]
-.L2394:
+.L2294:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
 	bl	print_ftl_debug_info
 	mov	w0, 0
-.L2388:
+.L2284:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
+	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-	.size	ftl_init, .-ftl_init
+	.size	zftl_init, .-zftl_init
 	.section	.text.rk_ftl_init,"ax",@progbits
 	.align	2
 	.global	rk_ftl_init
@@ -15736,2692 +15120,4612 @@ rk_ftl_init:
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	bl	nand_flash_init
-	cbnz	w0, .L2403
-	bl	ftl_init
-.L2403:
+	cbnz	w0, .L2306
+	bl	zftl_init
+.L2306:
 	mov	w19, w0
 	mov	w1, w0
-	adrp	x0, .LC142
-	add	x0, x0, :lo12:.LC142
+	adrp	x0, .LC116
+	add	x0, x0, :lo12:.LC116
 	bl	printf
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
 	.size	rk_ftl_init, .-rk_ftl_init
-	.section	.text.ftl_update_l2p_map,"ax",@progbits
+	.section	.text.gc_update_l2p_map_new,"ax",@progbits
 	.align	2
-	.global	ftl_update_l2p_map
-	.type	ftl_update_l2p_map, %function
-ftl_update_l2p_map:
-	stp	x29, x30, [sp, -128]!
+	.global	gc_update_l2p_map_new
+	.type	gc_update_l2p_map_new, %function
+gc_update_l2p_map_new:
+	stp	x29, x30, [sp, -176]!
+	adrp	x0, .LANCHOR5
+	adrp	x1, .LANCHOR71
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	mov	x22, x0
-	stp	x23, x24, [sp, 48]
-	adrp	x0, .LANCHOR79
-	stp	x19, x20, [sp, 16]
-	adrp	x24, .LANCHOR82
+	ldr	x22, [x0, #:lo12:.LANCHOR5]
 	stp	x25, x26, [sp, 64]
+	ldrh	w25, [x1, #:lo12:.LANCHOR71]
+	add	x1, x22, 80
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR29
+	stp	x23, x24, [sp, 48]
 	stp	x27, x28, [sp, 80]
-	ldrh	w23, [x0, #:lo12:.LANCHOR79]
-	ldrb	w0, [x22, 9]
-	ldrh	w19, [x22, 12]
-	str	x24, [x29, 104]
-	mul	w23, w23, w0
-	ldr	x0, [x24, #:lo12:.LANCHOR82]
-	add	x19, x0, x19, lsl 2
-	add	x0, x19, x23, sxtw 2
-	ldr	w0, [x0, -4]
-	cmn	w0, #1
-	bne	.L2406
-	adrp	x27, .LANCHOR45
-	mov	x28, 0
-	add	x0, x27, :lo12:.LANCHOR45
-	mov	w21, 0
-	str	x0, [x29, 96]
-.L2407:
-	cmp	w28, w23
-	blt	.L2415
-	adrp	x0, .LANCHOR22
-	adrp	x19, .LANCHOR56
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	tbz	x0, 12, .L2416
-	ldrh	w1, [x22]
-	ldr	x2, [x19, #:lo12:.LANCHOR56]
-	ubfiz	x0, x1, 1, 16
-	ldrh	w3, [x2, x0]
-	adrp	x0, .LC146
-	mov	w2, w21
-	add	x0, x0, :lo12:.LC146
+	str	x1, [x29, 144]
+	ldrb	w1, [x1, 9]
+	str	x0, [x29, 128]
+	mul	w25, w25, w1
+	ldr	w1, [x20, #:lo12:.LANCHOR29]
+	tbz	x1, 8, .L2309
+	ldrh	w1, [x22, 80]
+	adrp	x0, .LC117
+	add	x0, x0, :lo12:.LC117
 	bl	printf
-.L2416:
-	ldrh	w1, [x22]
-	ldr	x0, [x19, #:lo12:.LANCHOR56]
-	ldp	x23, x24, [sp, 48]
-	ldp	x19, x20, [sp, 16]
-	strh	w21, [x0, x1, lsl 1]
-	ldp	x25, x26, [sp, 64]
-	ldp	x21, x22, [sp, 32]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 128
-	ret
-.L2406:
-	adrp	x1, .LANCHOR166
+.L2309:
+	adrp	x24, .LANCHOR4
+	ldrh	w1, [x22, 80]
+	sub	w2, w25, #1
+	mov	x21, 0
+	ldr	x0, [x24, #:lo12:.LANCHOR4]
+	mov	w23, 0
+	strh	w2, [x0, x1, lsl 1]
+	adrp	x0, .LANCHOR52
+	add	x0, x0, :lo12:.LANCHOR52
+	str	x0, [x29, 104]
+.L2310:
+	mov	w27, w21
+	cmp	w25, w21
+	bhi	.L2320
+	ldr	w0, [x20, #:lo12:.LANCHOR29]
+	tbz	x0, 8, .L2321
+	ldr	x0, [x29, 128]
+	mov	w3, w23
+	ldr	x1, [x24, #:lo12:.LANCHOR4]
+	ldrh	w2, [x22, 80]
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	ldrh	w2, [x1, x2, lsl 1]
+	ldrh	w1, [x0, 80]
+	adrp	x0, .LC121
+	add	x0, x0, :lo12:.LC121
+	bl	printf
+.L2321:
+	ldrh	w0, [x22, 80]
+	ldr	x1, [x24, #:lo12:.LANCHOR4]
+	lsl	x0, x0, 1
+	ldrh	w2, [x1, x0]
+	cmp	w23, w2
+	beq	.L2322
+	adrp	x1, .LANCHOR182
 	adrp	x0, .LC0
-	mov	w2, 882
-	add	x1, x1, :lo12:.LANCHOR166
+	mov	w2, 463
+	add	x1, x1, :lo12:.LANCHOR182
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2408:
-	b	.L2408
-.L2415:
-	ldr	w2, [x19, x28, lsl 2]
+.L2323:
+	b	.L2323
+.L2320:
+	adrp	x26, .LANCHOR131
+	lsl	x19, x21, 2
+	ldr	x0, [x26, #:lo12:.LANCHOR131]
+	ldr	w2, [x0, x19]
 	cmn	w2, #1
-	beq	.L2409
-	ldrb	w20, [x27, #:lo12:.LANCHOR45]
-	adrp	x0, .LANCHOR22
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	lsl	w20, w20, 7
-	udiv	w20, w2, w20
-	and	w20, w20, 65535
-	tbz	x0, 12, .L2410
-	adrp	x0, .LC143
-	mov	w3, w28
-	mov	w1, w20
-	add	x0, x0, :lo12:.LC143
+	beq	.L2311
+	adrp	x0, .LANCHOR52
+	ldrb	w0, [x0, #:lo12:.LANCHOR52]
+	lsl	w0, w0, 7
+	udiv	w0, w2, w0
+	and	w0, w0, 65535
+	str	w0, [x29, 156]
+	ldr	w0, [x20, #:lo12:.LANCHOR29]
+	tbz	x0, 8, .L2312
+	ldr	w1, [x29, 156]
+	adrp	x0, .LC118
+	mov	w3, w21
+	add	x0, x0, :lo12:.LC118
 	bl	printf
-.L2410:
-	adrp	x25, .LANCHOR75
-	adrp	x26, .LC144
-	mov	x24, x28
-	add	x25, x25, :lo12:.LANCHOR75
-	add	x26, x26, :lo12:.LC144
-.L2414:
-	ldr	w1, [x19, x24, lsl 2]
-	cmn	w1, #1
-	beq	.L2411
-	ldr	x0, [x29, 96]
-	ldrb	w2, [x0]
-	lsl	w2, w2, 7
-	udiv	w1, w1, w2
-	cmp	w20, w1, uxth
-	bne	.L2411
-	ldrb	w0, [x22, 9]
-	sdiv	w1, w24, w0
-	msub	w0, w1, w0, w24
-	add	x0, x22, x0, sxtw 1
-	ldrh	w2, [x0, 16]
-	ldrh	w0, [x25]
-	madd	w2, w2, w0, w1
-	mov	x0, x26
-	str	w2, [x29, 124]
-	ldr	w1, [x19, x24, lsl 2]
-	bl	pm_ppa_update_check
-	cbz	w0, .L2412
+.L2312:
+	sub	w27, w25, w27
+	add	x27, x27, x21
+	lsl	x0, x27, 2
+	str	x0, [x29, 136]
+	adrp	x0, .LC120
+	add	x0, x0, :lo12:.LC120
+	str	x0, [x29, 120]
+	adrp	x0, .LANCHOR96
+	add	x0, x0, :lo12:.LANCHOR96
+	str	x0, [x29, 112]
+.L2313:
+	ldr	x0, [x29, 136]
+	cmp	x0, x19
+	bne	.L2319
+.L2311:
+	add	x21, x21, 1
+	b	.L2310
+.L2319:
+	ldr	x0, [x26, #:lo12:.LANCHOR131]
+	ldr	w28, [x0, x19]
+	cmn	w28, #1
+	beq	.L2314
 	ldr	x0, [x29, 104]
-	mov	w3, w23
-	mov	w2, 4
-	ldr	x1, [x0, #:lo12:.LANCHOR82]
-	adrp	x0, .LC145
-	add	x0, x0, :lo12:.LC145
-	bl	rknand_print_hex
-.L2413:
-	b	.L2413
-.L2412:
-	ldr	w0, [x19, x24, lsl 2]
-	add	w21, w21, 1
+	ldr	w1, [x29, 156]
+	ldrb	w0, [x0]
+	lsl	w0, w0, 7
+	udiv	w0, w28, w0
+	cmp	w1, w0, uxth
+	bne	.L2314
+	adrp	x0, .LANCHOR132
+	ldr	x0, [x0, #:lo12:.LANCHOR132]
+	ldr	w27, [x0, x19]
+	mov	w0, w28
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 172]
+	cmn	w0, #1
+	bne	.L2315
+	mov	w2, 0
+	add	x1, x29, 172
+	mov	w0, w28
+	bl	pm_log2phys
+.L2315:
+	ldr	w3, [x29, 172]
+	cmp	w27, w3
+	bne	.L2316
+	adrp	x0, .LANCHOR133
 	mov	w2, 1
-	add	x1, x29, 124
-	and	w21, w21, 65535
+	add	x1, x29, 168
+	add	w23, w23, 1
+	ldr	x0, [x0, #:lo12:.LANCHOR133]
+	ldr	w0, [x0, x19]
+	str	w0, [x29, 168]
+	mov	w0, w28
 	bl	pm_log2phys
-	mov	w0, -1
-	str	w0, [x19, x24, lsl 2]
-.L2411:
-	add	x24, x24, 1
-	cmp	w23, w24
-	bgt	.L2414
-.L2409:
-	add	x28, x28, 1
-	b	.L2407
-	.size	ftl_update_l2p_map, .-ftl_update_l2p_map
-	.section	.text.ftl_alloc_new_data_sblk,"ax",@progbits
-	.align	2
-	.global	ftl_alloc_new_data_sblk
-	.type	ftl_alloc_new_data_sblk, %function
-ftl_alloc_new_data_sblk:
-	stp	x29, x30, [sp, -32]!
-	add	x29, sp, 0
-	str	x19, [sp, 16]
-	mov	x19, x0
-	bl	ftl_update_l2p_map
-	bl	pm_flush
-	adrp	x0, .LANCHOR60
-	ldr	x0, [x0, #:lo12:.LANCHOR60]
-	add	x0, x0, 16
-	cmp	x19, x0
-	mov	x0, x19
-	cset	w1, ne
-	add	w1, w1, 2
-	bl	ftl_open_sblk_init
-	bl	ftl_ext_info_flush
-	mov	w0, 0
-	bl	ftl_info_flush
-	bl	lpa_rebuild_hash
-	ldr	x19, [sp, 16]
-	mov	w0, 0
-	ldp	x29, x30, [sp], 32
+	ldr	x0, [x29, 112]
+	mov	w1, 21
+	ldrh	w0, [x0]
+	sub	w2, w1, w0
+	mov	w1, 1
+	lsr	w0, w27, w0
+	lsl	w1, w1, w2
+	sub	w1, w1, #1
+	and	w1, w1, w0
+	adrp	x0, .LANCHOR95
+	ldrb	w0, [x0, #:lo12:.LANCHOR95]
+	udiv	w1, w1, w0
+	and	w1, w1, 65535
+	str	w1, [x29, 152]
+	mov	w0, w1
+	bl	ftl_vpn_decrement
+	ldr	x0, [x29, 144]
+	ldr	w1, [x29, 152]
+	ldrh	w0, [x0]
+	cmp	w0, w1
+	bne	.L2317
+	ldr	w0, [x20, #:lo12:.LANCHOR29]
+	tbz	x0, 8, .L2317
+	ldr	w3, [x29, 172]
+	adrp	x0, .LC119
+	mov	w2, w27
+	mov	w1, w28
+	add	x0, x0, :lo12:.LC119
+	bl	printf
+.L2317:
+	ldr	x0, [x26, #:lo12:.LANCHOR131]
+	mov	w1, -1
+	str	w1, [x0, x19]
+.L2314:
+	add	x19, x19, 4
+	b	.L2313
+.L2316:
+	ldr	w0, [x20, #:lo12:.LANCHOR29]
+	tbz	x0, 8, .L2318
+	ldr	x0, [x29, 120]
+	mov	w2, w27
+	mov	w1, w28
+	bl	printf
+.L2318:
+	ldr	x0, [x29, 144]
+	ldrh	w0, [x0]
+	bl	ftl_vpn_decrement
+	b	.L2317
+.L2322:
+	strh	w23, [x1, x0]
+	ldrh	w0, [x22, 80]
+	bl	zftl_insert_data_list
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 176
 	ret
-	.size	ftl_alloc_new_data_sblk, .-ftl_alloc_new_data_sblk
-	.section	.text.ftl_write_commit,"ax",@progbits
+	.size	gc_update_l2p_map_new, .-gc_update_l2p_map_new
+	.section	.text.gc_scan_src_blk_one_page,"ax",@progbits
 	.align	2
-	.global	ftl_write_commit
-	.type	ftl_write_commit, %function
-ftl_write_commit:
-	stp	x29, x30, [sp, -144]!
-	adrp	x0, .LANCHOR36
+	.global	gc_scan_src_blk_one_page
+	.type	gc_scan_src_blk_one_page, %function
+gc_scan_src_blk_one_page:
+	stp	x29, x30, [sp, -96]!
+	mov	w5, 0
+	mov	w6, 0
+	mov	w7, 65535
 	add	x29, sp, 0
-	stp	x25, x26, [sp, 64]
-	add	x25, x0, :lo12:.LANCHOR36
 	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR63
+	add	x1, x19, :lo12:.LANCHOR63
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	stp	x27, x28, [sp, 80]
-.L2436:
-	adrp	x3, .LANCHOR43
-	ldrb	w1, [x3, #:lo12:.LANCHOR43]
-	cbz	w1, .L2438
-	adrp	x4, .LANCHOR42
-	adrp	x2, .LANCHOR36
-	add	x2, x2, :lo12:.LANCHOR36
-	sub	w1, w1, #1
-	ldrb	w0, [x4, #:lo12:.LANCHOR42]
-	strb	w1, [x3, #:lo12:.LANCHOR43]
-	adrp	x1, .LANCHOR47
-	ubfiz	x27, x0, 6, 8
-	ldr	w1, [x1, #:lo12:.LANCHOR47]
-	add	x5, x2, x27
-	stp	x0, x5, [x29, 112]
-	lsl	x5, x0, 6
-	add	x0, x2, x5
-	ldrb	w5, [x2, x5]
-	ldr	w22, [x0, 36]
-	strb	w5, [x4, #:lo12:.LANCHOR42]
-	cmp	w22, w1
-	bcc	.L2440
-	ldr	x0, [x29, 120]
+	str	x25, [sp, 64]
+	ldrb	w0, [x1, 4]
+	add	x2, x1, x0, sxtw 1
+	ldrh	w3, [x2, 40]
+	adrp	x2, .LANCHOR72
+	ldrb	w4, [x2, #:lo12:.LANCHOR72]
+	ldrh	w2, [x1, 2]
+.L2347:
+	cmp	w3, w7
+	beq	.L2349
+	cbz	w6, .L2350
+	add	x1, x19, :lo12:.LANCHOR63
+	strb	w0, [x1, 4]
+.L2350:
+	cbz	w5, .L2351
+	add	x0, x19, :lo12:.LANCHOR63
+	strh	w2, [x0, 2]
+.L2351:
+	adrp	x0, .LANCHOR99
+	ldrh	w22, [x0, #:lo12:.LANCHOR99]
+	adrp	x0, .LANCHOR67
+	mov	x23, x0
+	ldrb	w1, [x0, #:lo12:.LANCHOR67]
+	mul	w22, w22, w3
+	cmp	w1, 2
+	bne	.L2352
+	add	x0, x19, :lo12:.LANCHOR63
+	ldrb	w1, [x0, 6]
+	cbnz	w1, .L2352
+	ldrh	w0, [x0, 2]
+	add	w22, w22, w0, lsl 1
+.L2353:
+	add	x1, x19, :lo12:.LANCHOR63
+	ldrb	w0, [x1, 4]
+	add	w0, w0, 1
+	and	w0, w0, 255
+	strb	w0, [x1, 4]
+	cmp	w4, w0
+	bne	.L2354
+	ldrh	w0, [x1, 2]
+	strb	wzr, [x1, 4]
+	add	w0, w0, 1
+	strh	w0, [x1, 2]
+.L2354:
+	mov	w0, 1
+	add	x19, x19, :lo12:.LANCHOR63
+	bl	buf_alloc
+	add	x23, x23, :lo12:.LANCHOR67
+	mov	x21, x0
+	mov	w20, 0
+	adrp	x24, .LANCHOR64
+.L2364:
+	ldrb	w0, [x19, 6]
+	cmp	w0, 3
+	bne	.L2355
+	cbz	w20, .L2356
+.L2355:
+	cmp	w0, w20
+	bgt	.L2357
+.L2365:
+	mov	x0, x21
 	bl	buf_free
-	mov	w0, -1
-.L2435:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 144
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 96
 	ret
-.L2440:
-	adrp	x26, .LANCHOR89
-	ldrb	w21, [x0, 57]
-	ldrb	w20, [x0, 56]
-	ldr	x24, [x0, 8]
-	ldr	x28, [x0, 24]
-	ldrb	w0, [x26, #:lo12:.LANCHOR89]
-	cbz	w0, .L2442
-	adrp	x0, .LANCHOR127
-	ldrb	w1, [x0, #:lo12:.LANCHOR127]
-	add	x1, x2, x1, lsl 6
-.L2443:
-	ldrb	w0, [x1]
-	cmp	w0, 255
-	bne	.L2444
-	ldr	w0, [x1, 36]
-	cmp	w22, w0
-	bne	.L2442
-	ldr	x0, [x1, 8]
-	ubfiz	x21, x21, 9, 8
-	lsl	w2, w20, 9
-	add	x1, x24, x21
-	add	x0, x0, x21
-	bl	ftl_memcpy
-	ldr	x0, [x29, 120]
-	bl	buf_free
-	b	.L2436
-.L2444:
-	ubfiz	x1, x0, 6, 8
-	add	x1, x25, x1
-	b	.L2443
-.L2442:
-	mov	w0, w22
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 140]
-	cmn	w0, #1
-	bne	.L2446
-	mov	w2, 0
-	add	x1, x29, 140
-	mov	w0, w22
-	bl	pm_log2phys
-.L2446:
-	adrp	x19, .LANCHOR60
-	add	x1, x25, 2
+.L2349:
+	add	w0, w0, 1
+	and	w0, w0, 255
+	cmp	w0, w4
+	bne	.L2348
+	add	w2, w2, 1
+	mov	w5, 1
+	and	w2, w2, 65535
 	mov	w0, 0
-	ldr	x3, [x19, #:lo12:.LANCHOR60]
-.L2449:
-	ldr	w2, [x1, 34]
-	cmp	w22, w2
-	bne	.L2447
-	ldrb	w2, [x1]
-	tbz	x2, 3, .L2447
-	ubfiz	x0, x0, 6, 32
-	and	w2, w2, -9
-	add	x0, x25, x0
-	strb	w2, [x0, 2]
-	ldr	x23, [x0, 8]
-	ldr	w0, [x0, 40]
-	str	w0, [x29, 140]
-.L2448:
-	adrp	x0, .LANCHOR45
-	str	x0, [x29, 104]
-	ldrb	w1, [x0, #:lo12:.LANCHOR45]
-	cmp	w20, w1
-	bcc	.L2450
-	add	x19, x3, 16
-.L2495:
-	mov	w23, 0
-.L2451:
-	ldrh	w0, [x19, 6]
-	cbnz	w0, .L2466
-	bl	ftl_flush
-	mov	x0, x19
-	bl	ftl_alloc_new_data_sblk
-.L2466:
-	mov	x0, x19
-	bl	ftl_get_new_free_page
-	ldr	x1, [x29, 112]
-	adrp	x20, .LANCHOR127
-	lsl	x2, x1, 6
-	add	x1, x25, x2
-	ldr	w3, [x1, 32]
-	stp	w3, w22, [x28]
-	str	w23, [x28, 12]
-	ldr	w3, [x29, 140]
-	str	w3, [x28, 8]
-	stp	w0, w3, [x1, 40]
-	mov	w0, -1
-	strb	w0, [x25, x2]
-	mov	w2, 10
-	ldrb	w0, [x1, 2]
-	orr	w0, w0, w2
-	ldrh	w2, [x19, 12]
-	strb	w0, [x1, 2]
-	ldrh	w0, [x19, 10]
-	add	w0, w0, w2
-	sub	w0, w0, #1
-	strh	w0, [x1, 48]
-	ldr	x1, [x29, 120]
-	add	x0, x20, :lo12:.LANCHOR127
-	bl	buf_add_tail
-	ldrb	w2, [x26, #:lo12:.LANCHOR89]
-	adrp	x0, .LANCHOR168
-	add	w2, w2, 1
-	str	wzr, [x0, #:lo12:.LANCHOR168]
-	and	w2, w2, 255
-	strb	w2, [x26, #:lo12:.LANCHOR89]
-	cmp	w2, 2
-	ldrh	w0, [x19, 6]
-	bhi	.L2467
-	cmp	w0, 1
-	bne	.L2439
-.L2467:
-	ldrb	w1, [x19, 5]
-	cmp	w1, 0
-	mov	w1, 0
-	cset	w4, ne
-	cmp	w0, 1
-	ldrb	w0, [x20, #:lo12:.LANCHOR127]
-	csinc	w4, w2, w4, eq
-	mov	w3, w0
-.L2471:
-	cmp	w1, w4
-	bne	.L2472
-	and	w1, w1, 255
-	ubfiz	x0, x0, 6, 8
-	sub	w2, w2, w1
-	strb	w3, [x20, #:lo12:.LANCHOR127]
-	strb	w2, [x26, #:lo12:.LANCHOR89]
-	add	x0, x25, x0
-	bl	sblk_prog_page
-	ldrh	w0, [x19, 6]
-	cmp	w0, 1
-	bne	.L2439
-	bl	sblk_wait_write_queue_completed
-	bl	ftl_write_completed
-	mov	x0, x19
-	bl	ftl_write_last_log_page
-	mov	x0, x19
-	bl	ftl_alloc_new_data_sblk
-.L2439:
-	adrp	x0, .LANCHOR43
-	ldrb	w0, [x0, #:lo12:.LANCHOR43]
-	cbnz	w0, .L2436
-.L2438:
-	bl	ftl_write_completed
-	mov	w0, 0
-	b	.L2435
-.L2447:
+.L2348:
+	add	x3, x1, x0, sxtw 1
+	mov	w6, 1
+	ldrh	w3, [x3, 40]
+	b	.L2347
+.L2352:
+	add	x0, x19, :lo12:.LANCHOR63
+	ldrh	w0, [x0, 2]
+	add	w22, w0, w22
+	b	.L2353
+.L2357:
+	ldrb	w1, [x23]
+	cmp	w1, 2
+	bne	.L2358
+	cbnz	w0, .L2358
+	add	w0, w20, w22
+	orr	w0, w0, 33554432
+.L2378:
+	str	w0, [x21, 40]
+	mov	w1, 1
+	mov	x0, x21
+	bl	sblk_read_page
+	ldr	w0, [x21, 52]
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	beq	.L2361
+	ldr	x0, [x21, 24]
+	ldr	w25, [x0, 4]
+	mov	w0, w25
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 92]
+	cmn	w0, #1
+	bne	.L2362
+	mov	w2, 0
+	add	x1, x29, 92
+	mov	w0, w25
+	bl	pm_log2phys
+.L2362:
+	ldr	w0, [x29, 92]
+	cmp	w22, w0
+	bne	.L2361
+	ldrh	w0, [x19, 24]
+	ldr	x2, [x24, #:lo12:.LANCHOR64]
+	ubfiz	x1, x0, 2, 16
 	add	w0, w0, 1
-	add	x1, x1, 64
-	cmp	w0, 32
-	bne	.L2449
-	mov	x23, 0
-	b	.L2448
-.L2450:
-	cbz	x23, .L2452
-	cbz	w21, .L2453
-	lsl	w2, w21, 9
-	mov	x1, x23
-	mov	x0, x24
-	bl	ftl_memcpy
-.L2453:
-	ldr	x0, [x29, 104]
-	add	w20, w21, w20
-	ldr	x19, [x19, #:lo12:.LANCHOR60]
-	ldrb	w2, [x0, #:lo12:.LANCHOR45]
-	cmp	w20, w2
-	bcc	.L2454
-	add	x19, x19, 16
-	b	.L2495
-.L2454:
-	ubfiz	x0, x20, 9, 9
-	sub	w2, w2, w20
-	add	x1, x23, x0
-	add	x19, x19, 48
-	lsl	w2, w2, 9
-	add	x0, x24, x0
-	bl	ftl_memcpy
-	b	.L2495
-.L2452:
-	ldr	w0, [x29, 140]
+	str	w22, [x2, x1]
+	strh	w0, [x19, 24]
+.L2361:
+	ldrh	w0, [x19, 26]
+	add	w0, w0, 1
+	strh	w0, [x19, 26]
+.L2356:
+	add	w20, w20, 1
+	cmp	w20, 4
+	bne	.L2364
+	b	.L2365
+.L2358:
+	orr	w0, w22, w20, lsl 24
+	b	.L2378
+	.size	gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page
+	.section	.text.gc_scan_static_data,"ax",@progbits
+	.align	2
+	.global	gc_scan_static_data
+	.type	gc_scan_static_data, %function
+gc_scan_static_data:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR5
+	stp	x21, x22, [sp, 32]
+	ldr	x0, [x19, #:lo12:.LANCHOR5]
+	ldr	w1, [x0, 544]
+	str	x23, [sp, 48]
+	cmn	w1, #1
+	beq	.L2380
+	adrp	x21, .LANCHOR96
+	adrp	x22, .LANCHOR95
+	add	x21, x21, :lo12:.LANCHOR96
+	add	x22, x22, :lo12:.LANCHOR95
+	mov	w20, 11
+.L2389:
+	ldr	x0, [x19, #:lo12:.LANCHOR5]
+	mov	w2, 0
+	add	x1, x29, 76
+	ldr	w0, [x0, 544]
+	bl	pm_log2phys
+	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L2455
+	beq	.L2381
 	mov	w0, 1
 	bl	buf_alloc
-	ldr	w1, [x29, 140]
-	mov	x27, x0
-	stp	w22, w1, [x0, 36]
+	ldr	w1, [x29, 76]
+	mov	x23, x0
+	str	w1, [x0, 40]
 	mov	w1, 1
 	bl	sblk_read_page
-	ldr	x0, [x27, 24]
-	ldr	w23, [x0, 12]
-	ldr	w0, [x0, 4]
-	add	w23, w23, 1
-	cmp	w22, w0
-	bne	.L2456
-	ldr	w0, [x27, 52]
-	cmn	w0, #1
-	bne	.L2457
-.L2456:
-	ldrb	w1, [x27, 1]
-	mov	w3, w22
-	ldr	w4, [x27, 52]
-	adrp	x0, .LC147
-	ldr	w2, [x29, 140]
-	add	x0, x0, :lo12:.LC147
-	bl	printf
-	ldr	x1, [x27, 24]
-	mov	w3, 4
-	adrp	x0, .LC96
-	mov	w2, w3
-	add	x0, x0, :lo12:.LC96
-	bl	rknand_print_hex
-	adrp	x0, .LANCHOR71
-	ldr	w1, [x29, 140]
-	ldrh	w3, [x0, #:lo12:.LANCHOR71]
+	ldr	w0, [x23, 52]
+	cmp	w0, 256
+	bne	.L2382
+	ldrh	w3, [x21]
 	mov	w0, 21
-	sub	w2, w0, w3
-	mov	w0, 1
-	lsr	w1, w1, w3
-	lsl	w0, w0, w2
+	ldr	w2, [x29, 76]
+	mov	w1, 1
+	sub	w0, w0, w3
+	lsr	w2, w2, w3
+	ldrb	w3, [x22]
+	lsl	w0, w1, w0
 	sub	w0, w0, #1
-	and	w0, w0, w1
-	adrp	x1, .LANCHOR70
-	ldrb	w2, [x1, #:lo12:.LANCHOR70]
-	mov	x1, 0
-	udiv	w0, w0, w2
-	bl	ftl_sblk_dump
-.L2457:
-	ldr	x0, [x27, 24]
-	ldr	w0, [x0, 4]
-	cmp	w22, w0
-	bne	.L2458
-	ldr	w0, [x27, 52]
-	cmn	w0, #1
-	bne	.L2459
-.L2458:
-	adrp	x1, .LANCHOR167
+	and	w0, w0, w2
+	mov	w2, 0
+	udiv	w0, w0, w3
+	bl	gc_add_sblk
+.L2382:
+	ldr	x0, [x19, #:lo12:.LANCHOR5]
+	ldr	x1, [x23, 24]
+	ldr	w0, [x0, 544]
+	ldr	w1, [x1, 4]
+	cmp	w1, w0
+	beq	.L2383
+	adrp	x1, .LANCHOR183
 	adrp	x0, .LC0
-	mov	w2, 445
-	add	x1, x1, :lo12:.LANCHOR167
+	mov	w2, 1369
+	add	x1, x1, :lo12:.LANCHOR183
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2460:
-	b	.L2460
-.L2459:
-	cbz	w21, .L2461
-	ldr	w0, [x29, 140]
-	lsl	w2, w21, 9
-	cmn	w0, #1
-	beq	.L2462
-	ldr	x1, [x27, 8]
-	mov	x0, x24
-	bl	ftl_memcpy
-.L2461:
-	ldr	x1, [x29, 104]
-	add	w20, w21, w20
-	ldr	x0, [x19, #:lo12:.LANCHOR60]
-	add	x19, x0, 48
-	ldrb	w2, [x1, #:lo12:.LANCHOR45]
-	cmp	w20, w2
-	bcc	.L2463
-	add	x19, x0, 16
-.L2464:
-	cbz	x27, .L2451
-	ldrb	w0, [x27, 2]
-	mov	x1, x27
-	and	w0, w0, -9
-	strb	w0, [x27, 2]
-	adrp	x0, .LANCHOR51
-	add	x0, x0, :lo12:.LANCHOR51
-	bl	buf_remove_buf
-	mov	x0, x27
+.L2384:
+	b	.L2384
+.L2383:
+	mov	x0, x23
 	bl	buf_free
-	b	.L2451
-.L2463:
-	ldr	w0, [x29, 140]
-	sub	w2, w2, w20
-	lsl	w2, w2, 9
-	ubfiz	x20, x20, 7, 9
-	cmn	w0, #1
-	beq	.L2465
-	ldr	x1, [x27, 8]
-	lsl	x20, x20, 2
-	add	x0, x24, x20
-	add	x1, x1, x20
-	bl	ftl_memcpy
-	b	.L2464
-.L2465:
-	mov	w1, 0
-	add	x0, x24, x20, lsl 2
-	bl	ftl_memset
-	b	.L2464
-.L2472:
-	ubfiz	x3, x3, 6, 8
+.L2381:
+	ldr	x0, [x19, #:lo12:.LANCHOR5]
+	adrp	x2, .LANCHOR54
+	ldr	w2, [x2, #:lo12:.LANCHOR54]
+	ldr	w1, [x0, 544]
 	add	w1, w1, 1
-	ldrb	w3, [x25, x3]
-	b	.L2471
-.L2473:
-	lsl	w2, w21, 9
-	mov	x27, 0
-	mov	w23, 0
-.L2462:
-	mov	w1, 0
-	mov	x0, x24
-	bl	ftl_memset
-	b	.L2461
-.L2455:
-	cbnz	w21, .L2473
-	mov	w23, 0
-	mov	x27, 0
-	b	.L2461
-	.size	ftl_write_commit, .-ftl_write_commit
-	.section	.text.ftl_discard,"ax",@progbits
-	.align	2
-	.global	ftl_discard
-	.type	ftl_discard, %function
-ftl_discard:
-	stp	x29, x30, [sp, -112]!
-	ands	w0, w0, 255
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	w20, w2
-	stp	x25, x26, [sp, 64]
-	mov	w26, w3
-	stp	x21, x22, [sp, 32]
-	stp	x23, x24, [sp, 48]
-	stp	x27, x28, [sp, 80]
-	bne	.L2497
-	adrp	x2, .LANCHOR52
-	mov	w21, 24576
-	ldr	w2, [x2, #:lo12:.LANCHOR52]
-.L2498:
-	add	w3, w1, w20
-	cmp	w2, w3
-	bcc	.L2519
-	add	w21, w21, w1
-	adrp	x1, .LANCHOR22
-	ldr	w1, [x1, #:lo12:.LANCHOR22]
-	tbz	x1, 12, .L2500
-	mov	w1, w0
-	mov	w4, w26
-	adrp	x0, .LC148
-	mov	w3, w20
-	mov	w2, w21
-	add	x0, x0, :lo12:.LC148
-	bl	printf
-.L2500:
-	adrp	x22, .LANCHOR46
-	adrp	x23, .LANCHOR45
-	cmp	w26, 1
-	ldr	x0, [x22, #:lo12:.LANCHOR46]
-	cset	w25, ls
-	ldr	w24, [x0, 8]
-	add	w1, w24, 1
-	str	w1, [x0, 8]
-	ldrb	w0, [x23, #:lo12:.LANCHOR45]
-	udiv	w19, w21, w0
-	msub	w21, w19, w0, w21
-	cbz	w21, .L2501
-	sub	w0, w0, w21
-	cmp	w0, w20
-	csel	w28, w0, w20, ls
-	cmp	w26, 1
-	and	w27, w28, 65535
-	bhi	.L2503
-	mov	w0, w19
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 104]
-	cmn	w0, #1
-	bne	.L2504
-	mov	w2, 0
-	add	x1, x29, 104
-	mov	w0, w19
-	bl	pm_log2phys
-.L2504:
-	ldr	w0, [x29, 104]
-	cmn	w0, #1
-	beq	.L2503
-	mov	w0, 0
-	bl	buf_alloc
-	mov	x26, x0
-	cbz	x0, .L2503
-	strb	w21, [x0, 57]
-	lsl	w2, w27, 9
-	strb	w28, [x0, 56]
-	mov	w1, 0
-	ldr	x0, [x0, 8]
-	ubfiz	x21, x21, 9, 25
-	stp	w24, w19, [x26, 32]
-	add	x0, x0, x21
-	bl	ftl_memset
-	mov	x0, x26
-	bl	ftl_write_buf
-	bl	ftl_write_commit
-	ldr	x1, [x22, #:lo12:.LANCHOR46]
-	ldr	w0, [x1, 76]
-	add	w0, w0, 1
-	str	w0, [x1, 76]
-.L2503:
-	add	w19, w19, 1
-	sub	w20, w20, w27
-.L2501:
-	cbz	w20, .L2506
+	str	w1, [x0, 544]
+	cmp	w1, w2
+	bcc	.L2385
+	mov	w1, -1
+	str	w1, [x0, 544]
+	ldr	w1, [x0, 548]
+	add	w1, w1, 1
+	str	w1, [x0, 548]
 	bl	ftl_flush
-.L2506:
-	adrp	x21, .LANCHOR71
-	add	x26, x23, :lo12:.LANCHOR45
-	add	x21, x21, :lo12:.LANCHOR71
-	mov	w0, -1
-	str	w0, [x29, 108]
-.L2507:
-	ldrb	w0, [x26]
-	cmp	w20, w0
-	bcs	.L2512
-	cmp	w20, 0
-	cset	w0, ne
-	tst	w25, w0
-	bne	.L2513
-.L2546:
+	bl	pm_flush
+	bl	ftl_ext_info_flush
 	mov	w0, 0
-.L2496:
+	bl	ftl_info_flush
+.L2379:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 112
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 80
 	ret
-.L2497:
-	cmp	w0, 3
-	bhi	.L2519
-	lsl	w21, w0, 13
-	mov	w2, 8192
-	b	.L2498
-.L2512:
-	mov	w0, w19
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 104]
-	cmn	w0, #1
-	mov	w2, 0
-	add	x1, x29, 104
-	mov	w0, w19
-	beq	.L2508
-	bl	pm_log2phys
-	ldr	w0, [x29, 104]
-	cmn	w0, #1
-	beq	.L2510
-	mov	w2, 1
-	add	x1, x29, 108
-	mov	w0, w19
-	bl	pm_log2phys
-.L2545:
-	ldr	x1, [x22, #:lo12:.LANCHOR46]
-	ldr	w0, [x1, 76]
-	add	w0, w0, 1
-	str	w0, [x1, 76]
-.L2510:
-	ldrb	w0, [x26]
-	add	w19, w19, 1
-	sub	w20, w20, w0
-	b	.L2507
-.L2508:
-	bl	pm_log2phys
-	ldr	w0, [x29, 104]
+.L2385:
+	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L2510
-	add	x1, x29, 108
-	mov	w2, 1
-	mov	w0, w19
-	bl	pm_log2phys
-	ldrh	w3, [x21]
-	mov	w0, 21
-	ldr	w1, [x29, 104]
-	sub	w2, w0, w3
+	bne	.L2379
+	sub	w20, w20, #1
+	ands	w20, w20, 65535
+	bne	.L2389
+	b	.L2379
+.L2380:
+	adrp	x1, .LANCHOR53
+	ldr	x1, [x1, #:lo12:.LANCHOR53]
+	ldr	w2, [x1, 40]
+	cmp	w2, 20480
+	bls	.L2391
+	ldr	w3, [x1, 44]
+	add	w3, w3, w2, lsr 10
+	and	w2, w2, 1023
+	stp	w2, w3, [x1, 40]
+.L2391:
+	ldr	w2, [x0, 536]
+	ldr	w3, [x0, 12]
+	add	w2, w2, 12959744
+	add	w2, w2, 256
+	cmp	w3, w2
+	ldr	w2, [x1, 44]
+	bhi	.L2392
+	ldr	w1, [x0, 540]
+	add	w1, w1, 98304
+	add	w1, w1, 1696
+	cmp	w2, w1
+	bls	.L2379
+.L2392:
+	str	w3, [x0, 536]
+	str	w2, [x0, 540]
+	str	wzr, [x0, 544]
+	b	.L2379
+	.size	gc_scan_static_data, .-gc_scan_static_data
+	.section	.text.ftl_sblk_dump,"ax",@progbits
+	.align	2
+	.global	ftl_sblk_dump
+	.type	ftl_sblk_dump, %function
+ftl_sblk_dump:
+	sub	sp, sp, #272
+	stp	x29, x30, [sp, 48]
+	add	x29, sp, 48
+	stp	x21, x22, [sp, 80]
+	and	w22, w0, 65535
+	stp	x19, x20, [sp, 64]
+	mov	w0, 65535
+	stp	x23, x24, [sp, 96]
+	cmp	w22, w0
+	stp	x25, x26, [sp, 112]
+	stp	x27, x28, [sp, 128]
+	beq	.L2419
+	uxtw	x0, w22
+	str	x0, [x29, 144]
+	lsl	x14, x0, 2
+	adrp	x0, .LANCHOR3
+	mov	x13, x0
+	ldr	x2, [x0, #:lo12:.LANCHOR3]
+	add	x2, x2, x14
+	ldrb	w2, [x2, 2]
+	and	w2, w2, 224
+	cmp	w2, 160
+	bne	.L2420
+	adrp	x0, .LANCHOR67
+	ldrb	w24, [x0, #:lo12:.LANCHOR67]
+.L2400:
+	add	x28, x29, 224
+	str	x1, [x29, 160]
+	mov	w0, w22
+	strh	w22, [x28, -32]!
+	add	x1, x28, 16
+	bl	ftl_get_blk_list_in_sblk
+	adrp	x2, .LANCHOR80
+	and	w1, w0, 255
+	strb	w1, [x29, 201]
+	ldrh	w3, [x2, #:lo12:.LANCHOR80]
+	strh	wzr, [x29, 194]
+	strb	wzr, [x29, 197]
+	strh	wzr, [x29, 202]
+	mul	w1, w1, w3
+	str	x2, [x29, 136]
+	strh	w1, [x29, 198]
+	adrp	x1, .LANCHOR29
+	str	x1, [x29, 152]
+	ldr	w3, [x1, #:lo12:.LANCHOR29]
+	tbz	x3, 12, .L2401
+	ldr	x1, [x13, #:lo12:.LANCHOR3]
+	and	w4, w0, 255
+	mov	w3, w24
+	adrp	x0, .LC122
+	add	x1, x1, x14
+	add	x0, x0, :lo12:.LC122
+	ldrb	w2, [x1, 2]
+	mov	w1, w22
+	ubfx	x2, x2, 5, 3
+	bl	printf
+.L2401:
 	mov	w0, 1
-	lsr	w1, w1, w3
-	lsl	w0, w0, w2
+	bl	buf_alloc
+	mov	w26, 0
+	mov	x21, x0
+	mov	w27, 0
+	adrp	x0, .LANCHOR99
+	mov	w19, 0
+	add	x0, x0, :lo12:.LANCHOR99
+	str	wzr, [x29, 172]
+	str	x0, [x29, 112]
+.L2402:
+	ldr	x0, [x29, 136]
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	cmp	w0, w19
+	bls	.L2416
+	lsl	w0, w19, 1
+	mov	w23, 0
 	sub	w0, w0, #1
-	and	w0, w0, w1
-	adrp	x1, .LANCHOR70
-	ldrb	w1, [x1, #:lo12:.LANCHOR70]
-	udiv	w0, w0, w1
-	bl	ftl_vpn_decrement
-	b	.L2545
-.L2513:
-	mov	w0, w19
+	str	w0, [x29, 168]
+	adrp	x0, .LC82
+	add	x0, x0, :lo12:.LC82
+	str	x0, [x29, 120]
+	b	.L2417
+.L2420:
+	mov	w24, 1
+	b	.L2400
+.L2413:
+	ldr	x0, [x29, 128]
+	ldrh	w11, [x28, x0]
+	mov	w0, 65535
+	cmp	w11, w0
+	beq	.L2403
+	ldr	x0, [x29, 112]
+	cmp	w24, 3
+	ldrh	w8, [x0]
+	mul	w8, w8, w11
+	bne	.L2404
+	add	w8, w19, w8
+	orr	w25, w8, w20, lsl 24
+.L2405:
+	str	w25, [x21, 40]
+	mov	w1, 1
+	str	w11, [x29, 100]
+	mov	x0, x21
+	bl	sblk_read_page
+	ldr	x1, [x21, 24]
+	mov	w3, w25
+	ldr	x0, [x21, 8]
+	ldr	w12, [x21, 52]
+	ldr	w11, [x29, 100]
+	ldr	w2, [x1, 12]
+	mov	w4, w12
+	str	w2, [sp, 32]
+	str	w12, [x29, 104]
+	ldr	w2, [x1, 8]
+	str	w2, [sp, 24]
+	ldr	w2, [x1, 4]
+	str	w2, [sp, 16]
+	mov	w2, w19
+	ldr	w1, [x1]
+	str	w1, [sp, 8]
+	ldr	w1, [x0, 12]
+	str	w1, [sp]
+	mov	w1, w11
+	ldp	w5, w6, [x0]
+	ldr	w7, [x0, 8]
+	ldr	x0, [x29, 120]
+	bl	printf
+	ldr	w12, [x29, 104]
+	ldr	w0, [x29, 172]
+	cmp	w12, 512
+	ccmn	w12, #1, 4, ne
+	csinc	w0, w0, wzr, ne
+	str	w0, [x29, 172]
+	ldr	x0, [x21, 24]
+	ldr	w3, [x0, 4]
+	str	w3, [x29, 104]
+	mov	w0, w3
 	bl	lpa_hash_get_ppa
-	str	w0, [x29, 104]
+	str	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L2514
+	ldr	w3, [x29, 104]
+	bne	.L2408
 	mov	w2, 0
-	add	x1, x29, 104
-	mov	w0, w19
+	add	x1, x29, 188
+	mov	w0, w3
 	bl	pm_log2phys
-.L2514:
-	ldr	w0, [x29, 104]
-	cmn	w0, #1
-	beq	.L2546
-	mov	w0, 0
-	bl	buf_alloc
-	mov	x21, x0
-	cbz	x0, .L2546
-	strb	wzr, [x0, 57]
-	strb	w20, [x0, 56]
-	stp	w24, w19, [x21, 32]
-	ldrb	w0, [x23, #:lo12:.LANCHOR45]
-	cmp	w20, w0
-	bcc	.L2516
-	adrp	x1, .LANCHOR169
-	adrp	x0, .LC0
-	mov	w2, 1048
-	add	x1, x1, :lo12:.LANCHOR169
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2517:
-	b	.L2517
-.L2516:
-	ldr	x0, [x21, 8]
-	lsl	w2, w20, 9
-	mov	w1, 0
-	bl	ftl_memset
-	mov	x0, x21
-	bl	ftl_write_buf
-	bl	ftl_write_commit
-	ldr	x1, [x22, #:lo12:.LANCHOR46]
-	ldr	w0, [x1, 76]
-	add	w0, w0, 1
-	str	w0, [x1, 76]
-	b	.L2546
-.L2519:
-	mov	w0, -1
-	b	.L2496
-	.size	ftl_discard, .-ftl_discard
-	.section	.text.FtlDiscard,"ax",@progbits
-	.align	2
-	.global	FtlDiscard
-	.type	FtlDiscard, %function
-FtlDiscard:
-	mov	w2, w1
-	mov	w3, 0
-	mov	w1, w0
-	mov	w0, 0
-	b	ftl_discard
-	.size	FtlDiscard, .-FtlDiscard
-	.section	.text.gc_do_copy_back,"ax",@progbits
-	.align	2
-	.global	gc_do_copy_back
-	.type	gc_do_copy_back, %function
-gc_do_copy_back:
-	sub	sp, sp, #224
-	adrp	x0, .LANCHOR67
-	stp	x29, x30, [sp, 16]
-	add	x29, sp, 16
-	ldrb	w0, [x0, #:lo12:.LANCHOR67]
-	stp	x19, x20, [sp, 32]
-	stp	x21, x22, [sp, 48]
-	stp	x23, x24, [sp, 64]
-	stp	x25, x26, [sp, 80]
-	stp	x27, x28, [sp, 96]
-	cbnz	w0, .L2549
-	bl	buf_alloc
-	mov	x19, x0
-	cbz	x0, .L2548
-	adrp	x20, .LANCHOR58
-	add	x3, x20, :lo12:.LANCHOR58
-	ldrh	w2, [x3, 26]
-	mov	w0, w2
-	bl	gc_get_src_ppa_from_index
-	add	w2, w2, 1
-	mov	w22, w0
-	str	w22, [x19, 40]
-	strh	w2, [x3, 26]
-	mov	w1, 1
-	mov	x0, x19
-	bl	sblk_read_page
-	ldr	w0, [x19, 52]
-	cmp	w0, 512
-	ccmn	w0, #1, 4, ne
-	bne	.L2551
-	adrp	x0, .LANCHOR71
-	ldrh	w1, [x0, #:lo12:.LANCHOR71]
-	mov	w0, 21
-	sub	w2, w0, w1
-	mov	w0, 1
-	lsr	w1, w22, w1
-	lsl	w0, w0, w2
-	sub	w0, w0, #1
-	and	w0, w0, w1
-	adrp	x1, .LANCHOR70
-	ldrb	w2, [x1, #:lo12:.LANCHOR70]
-	mov	x1, 0
-	udiv	w0, w0, w2
-	bl	ftl_sblk_dump
-.L2551:
-	ldr	w0, [x19, 52]
-	cmp	w0, 512
-	ccmn	w0, #1, 4, ne
-	bne	.L2552
-	adrp	x1, .LANCHOR170
+.L2408:
+	ldr	w0, [x29, 188]
+	cmp	w25, w0
+	bne	.L2409
+	ldr	x0, [x21, 24]
+	add	w26, w26, 1
+	mov	w3, w26
+	mov	w1, w25
+	ldr	w2, [x0, 4]
+	adrp	x0, .LC123
+	add	x0, x0, :lo12:.LC123
+	bl	printf
+.L2409:
+	ldr	x0, [x29, 160]
+	cbz	x0, .L2410
+	ubfiz	x3, x27, 2, 32
+	ldr	w2, [x0, x3]
+	ldr	x0, [x21, 24]
+	ldr	w0, [x0, 4]
+	cmp	w0, w2
+	beq	.L2411
+	ldr	x0, [x29, 152]
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 12, .L2411
+	str	x3, [x29, 104]
+	mov	w1, w27
+	adrp	x0, .LC124
+	add	x0, x0, :lo12:.LC124
+	bl	printf
+	ldr	x3, [x29, 104]
+.L2411:
+	ldr	x1, [x21, 24]
+	ldr	x0, [x29, 160]
+	ldr	w1, [x1, 4]
+	ldr	w0, [x0, x3]
+	cmp	w1, w0
+	beq	.L2410
+	cmn	w0, #1
+	beq	.L2410
+	adrp	x1, .LANCHOR184
 	adrp	x0, .LC0
-	mov	w2, 556
-	add	x1, x1, :lo12:.LANCHOR170
+	mov	w2, 1160
+	add	x1, x1, :lo12:.LANCHOR184
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2553:
-	b	.L2553
-.L2552:
-	ldr	x0, [x19, 24]
-	ldr	w21, [x0, 4]
-	mov	w0, w21
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 160]
-	cmn	w0, #1
-	bne	.L2554
-	mov	w2, 0
-	add	x1, x29, 160
-	mov	w0, w21
-	bl	pm_log2phys
-.L2554:
-	ldr	w23, [x29, 160]
-	cmp	w22, w23
-	bne	.L2555
-	adrp	x0, .LANCHOR36
-	add	x0, x0, :lo12:.LANCHOR36
-	add	x1, x0, 2
-	add	x0, x0, 2050
-.L2558:
-	ldr	w2, [x1, 34]
-	cmp	w21, w2
-	bne	.L2556
-	ldrb	w2, [x1]
-	tbz	x2, 1, .L2556
-	mov	x0, x19
+.L2412:
+	b	.L2412
+.L2404:
+	cmp	w24, 2
+	bne	.L2406
+	ldr	w0, [x29, 168]
+	add	w8, w8, w0
+	adrp	x0, .LANCHOR67
+	add	w8, w8, w20
+	ldrb	w0, [x0, #:lo12:.LANCHOR67]
+	orr	w25, w8, w0, lsl 24
+	b	.L2405
+.L2406:
+	add	w25, w19, w8
+	b	.L2405
+.L2410:
+	add	w27, w27, 1
+.L2403:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+.L2415:
+	cmp	w24, w20
+	bcs	.L2413
+	add	w23, w23, 1
+	and	w23, w23, 65535
+.L2417:
+	ldrb	w0, [x29, 201]
+	cmp	w0, w23
+	bls	.L2414
+	sxtw	x0, w23
+	mov	w20, 1
+	add	x0, x0, 8
+	lsl	x0, x0, 1
+	str	x0, [x29, 128]
+	b	.L2415
+.L2414:
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L2402
+.L2416:
+	mov	x0, x21
 	bl	buf_free
-	adrp	x0, .LANCHOR22
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	tbz	x0, 8, .L2548
-	add	x20, x20, :lo12:.LANCHOR58
-	adrp	x0, .LC149
-	mov	w2, w22
-	mov	w1, w21
-	add	x0, x0, :lo12:.LC149
-	ldrh	w3, [x20, 26]
+	ldr	x0, [x29, 152]
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 12, .L2418
+	adrp	x0, .LANCHOR4
+	ldr	x1, [x29, 144]
+	mov	w3, w26
+	ldr	x0, [x0, #:lo12:.LANCHOR4]
+	ldrh	w2, [x0, x1, lsl 1]
+	adrp	x0, .LC125
+	mov	w1, w22
+	add	x0, x0, :lo12:.LC125
 	bl	printf
-.L2548:
-	ldp	x19, x20, [sp, 32]
-	ldp	x21, x22, [sp, 48]
-	ldp	x23, x24, [sp, 64]
-	ldp	x25, x26, [sp, 80]
-	ldp	x27, x28, [sp, 96]
-	ldp	x29, x30, [sp, 16]
-	add	sp, sp, 224
+.L2418:
+	ldr	w0, [x29, 172]
+.L2398:
+	ldp	x19, x20, [sp, 64]
+	ldp	x21, x22, [sp, 80]
+	ldp	x23, x24, [sp, 96]
+	ldp	x25, x26, [sp, 112]
+	ldp	x27, x28, [sp, 128]
+	ldp	x29, x30, [sp, 48]
+	add	sp, sp, 272
 	ret
-.L2556:
-	add	x1, x1, 64
-	cmp	x0, x1
-	bne	.L2558
-	adrp	x0, .LANCHOR45
-	mov	w1, 10
-	strb	wzr, [x19, 57]
-	ldrb	w0, [x0, #:lo12:.LANCHOR45]
-	strb	w0, [x19, 56]
-	ldrb	w0, [x19, 2]
-	str	w21, [x19, 36]
-	orr	w0, w0, w1
-	strb	w0, [x19, 2]
-	ldr	x0, [x19, 24]
-	ldr	w0, [x0]
-	str	w0, [x19, 32]
-	adrp	x0, .LANCHOR22
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	tbz	x0, 8, .L2559
-	mov	w0, w21
-	bl	lpa_hash_get_ppa
-	add	x1, x20, :lo12:.LANCHOR58
-	mov	w3, w0
-	mov	w4, w22
-	adrp	x0, .LC150
-	mov	w2, w23
-	add	x0, x0, :lo12:.LC150
-	ldrh	w5, [x1, 26]
-	mov	w1, w21
-	bl	printf
-.L2559:
-	mov	x0, x19
-	bl	ftl_gc_write_buf
-	bl	ftl_write_commit
-	add	x20, x20, :lo12:.LANCHOR58
-	adrp	x0, .LANCHOR46
-	ldr	x1, [x0, #:lo12:.LANCHOR46]
-	ldr	w0, [x1, 60]
-	add	w0, w0, 1
-	str	w0, [x1, 60]
-	ldrh	w0, [x20, 28]
-	add	w0, w0, 1
-	strh	w0, [x20, 28]
-	b	.L2548
-.L2555:
-	adrp	x0, .LANCHOR22
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	tbz	x0, 8, .L2560
-	add	x20, x20, :lo12:.LANCHOR58
-	mov	w0, w21
-	bl	lpa_hash_get_ppa
-	mov	w3, w0
-	mov	w4, w22
-	adrp	x0, .LC150
-	ldrh	w5, [x20, 26]
-	mov	w2, w23
+.L2419:
+	mov	w0, 0
+	b	.L2398
+	.size	ftl_sblk_dump, .-ftl_sblk_dump
+	.section	.text.zftl_read,"ax",@progbits
+	.align	2
+	.global	zftl_read
+	.type	zftl_read, %function
+zftl_read:
+	stp	x29, x30, [sp, -160]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	mov	w21, w0
+	adrp	x0, .LANCHOR29
+	stp	x23, x24, [sp, 48]
+	stp	x19, x20, [sp, 16]
+	mov	w24, w2
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	mov	w19, w1
+	stp	x25, x26, [sp, 64]
+	mov	x23, x3
+	stp	x27, x28, [sp, 80]
+	tbz	x0, 12, .L2440
+	mov	w3, w2
+	adrp	x0, .LC126
+	mov	w2, w1
+	add	x0, x0, :lo12:.LC126
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC150
 	bl	printf
-.L2560:
-	mov	x0, x19
-	bl	buf_free
-	b	.L2548
-.L2549:
-	adrp	x1, .LANCHOR60
-	adrp	x0, .LANCHOR64
-	stp	x0, x1, [x29, 128]
-	adrp	x24, .LANCHOR58
-	ldr	x22, [x1, #:lo12:.LANCHOR60]
-	ldrb	w25, [x0, #:lo12:.LANCHOR64]
-	add	x22, x22, 80
-	cmp	w25, 3
-	bne	.L2561
-	adrp	x0, .LANCHOR66
-	ldrb	w0, [x0, #:lo12:.LANCHOR66]
-	cbz	w0, .L2562
-	add	x0, x24, :lo12:.LANCHOR58
-	ldrb	w19, [x22, 9]
-	ldrh	w20, [x0, 314]
-	add	w21, w19, w19, lsl 1
-	sub	w19, w19, w19, lsl 2
-	sdiv	w21, w20, w21
-	madd	w19, w21, w19, w20
-	and	w19, w19, 65535
-.L2563:
-	adrp	x1, .LANCHOR68
-	ldrb	w0, [x22, 9]
-	add	x4, x24, :lo12:.LANCHOR58
-	mov	w2, 0
-	ldrh	w3, [x1, #:lo12:.LANCHOR68]
-	mul	w8, w25, w0
-	ldrh	w10, [x4, 24]
-	mul	w3, w3, w0
-	adrp	x0, .LANCHOR108
-	ldr	x7, [x0, #:lo12:.LANCHOR108]
-	sub	w3, w3, #1
-.L2566:
-	cmp	w2, w8
-	blt	.L2568
-.L2596:
-	mov	w23, 1
-	b	.L2564
-.L2562:
-	add	x0, x24, :lo12:.LANCHOR58
-	ldrb	w20, [x22, 9]
-	ldrh	w1, [x0, 314]
-	adrp	x0, .LANCHOR171
-	add	x0, x0, :lo12:.LANCHOR171
-	sdiv	w19, w1, w20
-	ldrh	w23, [x0, w19, sxtw 1]
-	msub	w19, w19, w20, w1
-	and	w19, w19, 65535
-	lsr	w21, w23, 3
-	and	w23, w23, 7
-	cmp	w23, 1
-	madd	w20, w21, w20, w19
-	add	w20, w20, w20, lsl 1
-	and	w20, w20, 65535
-	beq	.L2563
-.L2564:
-	adrp	x0, .LANCHOR22
-	str	x0, [x29, 112]
-	ldr	w1, [x0, #:lo12:.LANCHOR22]
-	tbz	x1, 8, .L2569
-	adrp	x0, .LANCHOR108
-	ubfiz	x1, x20, 2, 16
-	mov	w6, w20
-	mov	w3, w19
-	ldr	x2, [x0, #:lo12:.LANCHOR108]
-	add	x0, x24, :lo12:.LANCHOR58
-	ldrh	w4, [x0, 314]
-	adrp	x0, .LC151
-	ldr	w5, [x2, x1]
-	add	x0, x0, :lo12:.LC151
-	mov	w2, w23
-	mov	w1, w21
-	bl	printf
-.L2569:
-	adrp	x0, .LANCHOR36
-	str	wzr, [x29, 152]
-	add	x0, x0, :lo12:.LANCHOR36
-	str	x0, [x29, 120]
-.L2570:
-	ldrb	w2, [x22, 9]
-	ldr	w0, [x29, 152]
-	ldrh	w26, [x29, 152]
-	and	w0, w0, 65535
-	str	w0, [x29, 156]
-	mul	w1, w25, w2
+.L2440:
+	cbnz	w21, .L2441
+	adrp	x0, .LANCHOR59
+	mov	w21, 24576
+	ldr	w0, [x0, #:lo12:.LANCHOR59]
+.L2442:
+	add	w1, w19, w24
 	cmp	w0, w1
-	blt	.L2583
-	ldr	x0, [x29, 128]
-	ldrb	w0, [x0, #:lo12:.LANCHOR64]
-	cmp	w0, 3
-	add	x0, x29, 160
-	beq	.L2584
-	sub	w3, w1, #1
-	mov	w2, 0
-.L2585:
-	cmp	w2, w3
-	blt	.L2591
-	ldr	x0, [x0, w3, sxtw 3]
-	mov	w2, -1
-	strb	w2, [x0]
-	ldr	x0, [x29, 160]
-	bl	sblk_prog_page
-	b	.L2590
-.L2561:
-	adrp	x0, .LANCHOR74
-	ldrb	w0, [x0, #:lo12:.LANCHOR74]
-	cbnz	w0, .L2565
-	add	x0, x24, :lo12:.LANCHOR58
-	ldrb	w19, [x22, 9]
-	mov	w25, 1
-	ldrh	w20, [x0, 314]
-	sdiv	w21, w20, w19
-	msub	w19, w21, w19, w20
-	and	w19, w19, 65535
-	b	.L2563
-.L2565:
-	add	x0, x24, :lo12:.LANCHOR58
-	ldrb	w19, [x22, 9]
-	mov	w25, 2
-	ldrh	w20, [x0, 314]
-	sdiv	w21, w20, w19
-	msub	w19, w21, w19, w20
+	bcc	.L2467
+	adrp	x1, .LANCHOR53
+	adrp	x25, .LANCHOR52
+	add	w21, w21, w19
+	str	x1, [x29, 120]
+	ldr	x2, [x1, #:lo12:.LANCHOR53]
+	ldr	w0, [x2, 24]
+	add	w0, w0, w24
+	str	w0, [x2, 24]
+	ldrb	w0, [x25, #:lo12:.LANCHOR52]
+	add	w2, w24, w21
+	stp	w2, wzr, [x29, 136]
+	sub	w2, w2, #1
+	udiv	w27, w21, w0
+	udiv	w0, w2, w0
+	mov	w20, w27
+	sub	w26, w0, w27
+	str	w0, [x29, 132]
+	add	w26, w26, 1
+	adrp	x0, .LC110
+	add	x0, x0, :lo12:.LC110
+	str	x0, [x29, 112]
+	adrp	x0, .LANCHOR43
+	add	x0, x0, :lo12:.LANCHOR43
+	str	x0, [x29, 104]
+.L2444:
+	cbnz	w26, .L2465
+	ldr	w0, [x29, 140]
+.L2439:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 160
+	ret
+.L2441:
+	cmp	w21, 3
+	bhi	.L2467
+	lsl	w21, w21, 13
+	mov	w0, 8192
+	b	.L2442
+.L2465:
+	ldrb	w1, [x25, #:lo12:.LANCHOR52]
+	cmp	w20, w27
+	ldr	w0, [x29, 132]
+	and	w19, w1, 65535
+	ccmp	w20, w0, 4, ne
+	bne	.L2468
+	cmp	w20, w27
+	bne	.L2446
+	udiv	w22, w21, w1
+	and	w0, w24, 65535
+	msub	w1, w22, w1, w21
+	and	w22, w1, 65535
+	sub	w19, w19, w22
 	and	w19, w19, 65535
-	b	.L2563
-.L2568:
-	add	w5, w20, w2
-	cmp	w5, w3
-	beq	.L2596
-	sbfiz	x5, x5, 2, 32
-	ldr	w0, [x7, x5]
+	cmp	w24, w19
+	csel	w19, w0, w19, cc
+.L2445:
+	adrp	x0, .LANCHOR43
+	add	x1, x0, :lo12:.LANCHOR43
+	add	x1, x1, 2
+	mov	w0, 0
+.L2449:
+	ldr	w2, [x1, 34]
+	cmp	w20, w2
+	bne	.L2447
+	ldrb	w2, [x1]
+	tbz	x2, 3, .L2447
+	ldr	x1, [x29, 104]
+	ubfiz	x0, x0, 6, 32
+	lsl	w2, w19, 9
+	ubfiz	x19, x19, 9, 16
+	add	x0, x1, x0
+	ubfiz	x22, x22, 9, 16
+	ldr	x1, [x0, 8]
+	mov	x0, x23
+	add	x23, x23, x19
+	add	x1, x1, x22
+	bl	ftl_memcpy
+.L2448:
+	add	w20, w20, 1
+	sub	w26, w26, #1
+	b	.L2444
+.L2446:
+	ldr	w0, [x29, 136]
+	msub	w19, w1, w20, w0
+	and	w19, w19, 255
+.L2468:
+	mov	w22, 0
+	b	.L2445
+.L2447:
+	add	w0, w0, 1
+	add	x1, x1, 64
+	cmp	w0, 32
+	bne	.L2449
+	mov	w0, w20
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 156]
 	cmn	w0, #1
-	bne	.L2567
-	ldrh	w6, [x4, 26]
-	cmp	w6, w10
-	bcs	.L2548
-	mov	w0, w6
-	bl	gc_get_src_ppa_from_index
-	add	w6, w6, 1
-	strh	w6, [x4, 26]
-	str	w0, [x7, x5]
-.L2567:
-	add	w2, w2, 1
-	and	w2, w2, 65535
-	b	.L2566
-.L2583:
+	bne	.L2450
+	mov	w2, 0
+	add	x1, x29, 156
+	mov	w0, w20
+	bl	pm_log2phys
+.L2450:
 	ldr	w0, [x29, 156]
-	add	w0, w20, w0
-	str	w0, [x29, 144]
-	sxtw	x27, w0
-	adrp	x0, .LANCHOR65
-	ldr	x0, [x0, #:lo12:.LANCHOR65]
-	ldrb	w0, [x0, x27]
-	cmp	w0, 255
-	bne	.L2571
-	mov	w0, 0
-	bl	buf_alloc
-	mov	x28, x0
-	cbnz	x0, .L2572
-	bl	sblk_wait_write_queue_completed
-	bl	ftl_write_completed
-	bl	gc_write_completed
-	bl	gc_free_temp_buf
+	cmn	w0, #1
+	bne	.L2451
+	add	x22, x25, :lo12:.LANCHOR52
+	mov	w19, 0
+.L2452:
+	ldrb	w0, [x22]
+	cmp	w19, w0
+	bcs	.L2448
+	madd	w0, w20, w0, w19
+	cmp	w21, w0
+	bhi	.L2453
+	ldr	w1, [x29, 136]
+	cmp	w1, w0
+	bls	.L2453
+	mov	x0, x23
+	add	x23, x23, 512
+	mov	w2, 512
+	mov	w1, 0
+	bl	ftl_memset
+.L2453:
+	add	w19, w19, 1
+	b	.L2452
+.L2451:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbz	x0, .L2548
-.L2572:
-	adrp	x0, .LANCHOR65
-	ldrb	w1, [x28, 1]
-	adrp	x5, .LANCHOR68
-	adrp	x6, .LANCHOR108
-	ldr	x0, [x0, #:lo12:.LANCHOR65]
-	strb	w1, [x0, x27]
-	add	x1, x24, :lo12:.LANCHOR58
-	strb	w23, [x28, 61]
-	ldrh	w7, [x5, #:lo12:.LANCHOR68]
-	ldrb	w0, [x1, 7]
+	cbnz	x0, .L2455
+	bl	ftl_read_ahead
+	b	.L2444
+.L2455:
+	ldr	x0, [x29, 120]
+	ldr	x1, [x0, #:lo12:.LANCHOR53]
+	ldr	w0, [x1, 40]
 	add	w0, w0, 1
-	strb	w0, [x1, 7]
-	add	w0, w26, w20
-	strh	w0, [x28, 48]
-	ldr	w1, [x29, 144]
-	ldrb	w0, [x22, 9]
-	mul	w0, w0, w7
-	sub	w0, w0, #1
-	cmp	w1, w0
-	bne	.L2573
-	adrp	x0, .LANCHOR107
-	adrp	x4, .LANCHOR69
-	stp	x6, x5, [x29, 96]
-	ldr	x1, [x0, #:lo12:.LANCHOR107]
-	mov	w0, -1
-	str	x4, [x29, 144]
-	str	w0, [x1, x27, lsl 2]
-	ldr	x0, [x28, 8]
-	ldrb	w2, [x4, #:lo12:.LANCHOR69]
-	mul	w2, w2, w7
-	lsl	w2, w2, 2
-	bl	ftl_memcpy
-	ldp	x6, x5, [x29, 96]
-	ldr	x4, [x29, 144]
-	ldr	x7, [x28, 8]
-	ldrh	w0, [x5, #:lo12:.LANCHOR68]
-	ldrb	w1, [x4, #:lo12:.LANCHOR69]
-	mul	w0, w0, w1
-	ldr	x1, [x6, #:lo12:.LANCHOR108]
-	lsl	w2, w0, 2
-	add	x0, x7, x0, sxtw 2
-	bl	ftl_memcpy
-	adrp	x0, .LANCHOR45
-	mov	w1, 0
-	ldrb	w2, [x0, #:lo12:.LANCHOR45]
+	str	w0, [x1, 40]
+	ldr	w0, [x29, 156]
+	stp	w0, w0, [x28, 40]
+	ldrb	w0, [x25, #:lo12:.LANCHOR52]
+	cmp	w0, w19
+	bne	.L2457
+	str	x23, [x28, 16]
+.L2457:
+	mov	w1, 1
+	mov	x0, x28
+	bl	sblk_read_page
+	ldr	w10, [x28, 52]
+	cmn	w10, #1
+	bne	.L2458
+	adrp	x0, .LANCHOR5
+	str	w10, [x29, 140]
+	ldr	x1, [x0, #:lo12:.LANCHOR5]
+	ldr	w0, [x1, 552]
+	add	w0, w0, 1
+	str	w0, [x1, 552]
+.L2459:
 	ldr	x0, [x28, 24]
-	lsl	w2, w2, 1
-	bl	ftl_memset
-	ldr	x6, [x28, 24]
-	mov	w0, 15555
-	ldr	x5, [x29, 104]
-	movk	w0, 0xf55f, lsl 16
-	ldr	x4, [x29, 144]
-	ldrh	w1, [x5, #:lo12:.LANCHOR68]
-	str	w0, [x6]
-	ldrb	w0, [x4, #:lo12:.LANCHOR69]
-	mul	w1, w1, w0
-	ldr	x0, [x28, 8]
-	lsl	w1, w1, 2
-	bl	js_hash
-	str	w0, [x6, 4]
-	ldr	x0, [x29, 136]
-	ldr	x0, [x0, #:lo12:.LANCHOR60]
-	ldr	w0, [x0, 132]
-	str	w0, [x6, 8]
-.L2571:
-	adrp	x0, .LANCHOR65
-	ldr	w5, [x29, 156]
-	add	x3, x29, 160
-	ldr	x4, [x0, #:lo12:.LANCHOR65]
-	adrp	x0, .LANCHOR36
-	add	x2, x0, :lo12:.LANCHOR36
-	ldrb	w1, [x4, x27]
-	ubfiz	x0, x1, 6, 8
-	add	x0, x2, x0
-	add	x2, x2, x1, lsl 6
-	str	x0, [x3, w5, sxtw 3]
-	mov	w0, 1
-	adrp	x5, .LANCHOR109
-	strh	w0, [x2, 50]
-	ldr	x0, [x29, 128]
-	strb	w23, [x2, 61]
-	ldrb	w0, [x0, #:lo12:.LANCHOR64]
-	cmp	w0, 3
-	bne	.L2578
-	udiv	w0, w26, w0
-	adrp	x6, .LANCHOR75
-	ldrh	w6, [x6, #:lo12:.LANCHOR75]
-	add	w3, w0, w19
-	add	w0, w0, w0, lsl 1
-	add	x3, x22, x3, sxtw 1
-	sub	w0, w26, w0
-	and	w0, w0, 65535
-	add	w0, w0, 1
-	ldrh	w3, [x3, 16]
-	mul	w3, w3, w6
-	ldrh	w6, [x2, 48]
-	orr	w3, w3, w21
-	str	w3, [x2, 40]
-	ldr	x2, [x5, #:lo12:.LANCHOR109]
-	orr	w0, w3, w0, lsl 24
-	str	w0, [x2, x6, lsl 2]
-.L2579:
+	ldr	w5, [x0, 4]
+	cmp	w20, w5
+	beq	.L2460
+	ldr	w4, [x0]
+	mov	w2, w20
+	ldp	w6, w7, [x0, 8]
+	str	w10, [x29, 128]
+	ldrb	w1, [x28, 1]
+	ldr	w3, [x29, 156]
 	ldr	x0, [x29, 112]
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	tbz	x0, 8, .L2582
-	ldr	x0, [x29, 120]
-	mov	w2, w23
-	ldrb	w4, [x4, x27]
-	add	x1, x0, x1, lsl 6
-	add	x0, x24, :lo12:.LANCHOR58
-	ldrb	w3, [x0, 6]
-	ldr	x0, [x1, 24]
-	ldrb	w7, [x1, 1]
-	ldrh	w6, [x1, 48]
-	ldr	w0, [x0, 4]
-	str	w0, [sp, 8]
-	mov	w0, 3
-	udiv	w26, w26, w0
-	adrp	x0, .LC152
-	add	x0, x0, :lo12:.LC152
-	add	w26, w26, w19
-	str	w26, [sp]
-	ldr	w5, [x1, 40]
-	ldr	w1, [x29, 156]
 	bl	printf
-.L2582:
-	ldr	w0, [x29, 152]
-	add	w0, w0, 1
-	str	w0, [x29, 152]
-	b	.L2570
-.L2573:
-	ldr	x0, [x6, #:lo12:.LANCHOR108]
-	lsl	x4, x27, 2
-	mov	w1, 1
-	str	x4, [x29, 144]
-	ldr	w0, [x0, x4]
-	str	w0, [x28, 40]
-	mov	x0, x28
-	bl	sblk_read_page
-	ldr	w0, [x28, 52]
-	ldr	x4, [x29, 144]
-	cmp	w0, 512
-	ccmn	w0, #1, 4, ne
-	bne	.L2575
-	adrp	x0, .LANCHOR71
-	ldr	w1, [x28, 40]
-	ldrh	w5, [x0, #:lo12:.LANCHOR71]
+	adrp	x0, .LANCHOR96
+	ldr	w1, [x29, 156]
+	ldrh	w3, [x0, #:lo12:.LANCHOR96]
 	mov	w0, 21
-	sub	w2, w0, w5
+	sub	w2, w0, w3
 	mov	w0, 1
-	lsr	w1, w1, w5
+	lsr	w1, w1, w3
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR70
-	ldrb	w2, [x1, #:lo12:.LANCHOR70]
+	adrp	x1, .LANCHOR95
+	ldrb	w2, [x1, #:lo12:.LANCHOR95]
 	mov	x1, 0
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
-	ldr	w0, [x28, 52]
-	ldr	x4, [x29, 144]
-	cmp	w0, 512
-	ccmn	w0, #1, 4, ne
-	bne	.L2575
+	ldr	w10, [x29, 128]
+.L2460:
 	ldr	x0, [x28, 24]
-	mov	w1, -1
-	str	w1, [x0, 4]
-	ldr	w0, [x28, 52]
-	cmp	w0, 512
-	ccmp	w0, w1, 4, ne
-	bne	.L2575
-	adrp	x1, .LANCHOR170
+	ldr	w0, [x0, 4]
+	cmp	w20, w0
+	bne	.L2461
+	cmn	w10, #1
+	bne	.L2462
+.L2461:
+	adrp	x1, .LANCHOR185
 	adrp	x0, .LC0
-	mov	w2, 671
-	add	x1, x1, :lo12:.LANCHOR170
+	mov	w2, 976
+	add	x1, x1, :lo12:.LANCHOR185
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2576:
-	b	.L2576
-.L2575:
-	ldr	x0, [x28, 24]
-	adrp	x1, .LANCHOR47
-	ldr	w1, [x1, #:lo12:.LANCHOR47]
-	ldr	w2, [x0, 4]
-	cmp	w2, w1
-	bcc	.L2577
-	mov	w1, -1
-	str	w1, [x0, 4]
-.L2577:
-	adrp	x1, .LANCHOR107
-	ldr	w2, [x0, 4]
-	ldr	x1, [x1, #:lo12:.LANCHOR107]
-	str	w2, [x1, x4]
-	ldr	w1, [x28, 40]
-	str	w1, [x0, 8]
-	b	.L2571
-.L2578:
-	cmp	w0, 2
-	bne	.L2580
-	adrp	x0, .LANCHOR74
-	adrp	x3, .LANCHOR75
-	ldrb	w0, [x0, #:lo12:.LANCHOR74]
-	cbnz	w0, .L2581
+.L2463:
+	b	.L2463
+.L2458:
+	cmp	w10, 256
+	bne	.L2459
+	adrp	x0, .LANCHOR96
+	mov	w4, 21
+	mov	w5, 1
+	stp	w10, w5, [x29, 96]
+	ldrh	w1, [x0, #:lo12:.LANCHOR96]
 	ldr	w0, [x29, 156]
-	ldrh	w3, [x3, #:lo12:.LANCHOR75]
-	add	w0, w19, w0
-	add	x0, x22, x0, sxtw 1
-	ldrh	w0, [x0, 16]
-	madd	w0, w0, w3, w21
-.L2639:
-	orr	w0, w0, 33554432
-	str	w0, [x2, 40]
-.L2580:
-	ldr	x0, [x29, 120]
-	add	x0, x0, x1, lsl 6
-	ldrh	w2, [x0, 48]
-	ldr	w3, [x0, 40]
-	ldr	x0, [x5, #:lo12:.LANCHOR109]
-	str	w3, [x0, x2, lsl 2]
-	b	.L2579
-.L2581:
-	add	w0, w19, w26, lsr 1
-	ldrh	w3, [x3, #:lo12:.LANCHOR75]
-	add	x0, x22, x0, sxtw 1
-	ldrh	w0, [x0, 16]
-	madd	w0, w0, w3, w21
-	and	w3, w26, 1
-	add	w0, w0, w3
-	b	.L2639
-.L2584:
-	adrp	x1, .LANCHOR66
-	ldrb	w3, [x1, #:lo12:.LANCHOR66]
-	ldr	x1, [x29, 160]
-	cbz	w3, .L2586
-.L2589:
-	strb	wzr, [x1, 60]
-	b	.L2587
-.L2586:
-	cmp	w23, 1
-	bne	.L2588
-	mov	w3, 9
-.L2638:
-	strb	w3, [x1, 60]
-.L2587:
-	add	x1, x0, 24
-	bl	sblk_xlc_prog_pages
-.L2590:
-	adrp	x1, .LANCHOR66
-	ldrb	w3, [x22, 9]
-	ldrb	w1, [x1, #:lo12:.LANCHOR66]
-	and	w0, w3, 65535
-	cbz	w1, .L2592
-	add	w0, w0, w0, lsl 1
-.L2593:
-	adrp	x1, .LANCHOR46
-	add	x24, x24, :lo12:.LANCHOR58
-	ldr	x1, [x1, #:lo12:.LANCHOR46]
-	ldr	w2, [x1, 52]
-	add	w2, w2, w0
-	str	w2, [x1, 52]
-	ldrh	w1, [x24, 314]
-	add	w0, w0, w1
-	adrp	x1, .LANCHOR68
-	and	w0, w0, 65535
-	strh	w0, [x24, 314]
-	ldrh	w1, [x1, #:lo12:.LANCHOR68]
-	mul	w1, w1, w3
-	cmp	w0, w1
-	blt	.L2594
-	ldr	x0, [x29, 136]
-	ldr	x0, [x0, #:lo12:.LANCHOR60]
-	strh	wzr, [x0, 86]
-.L2594:
-	bl	gc_write_completed
-	b	.L2548
-.L2588:
-	cmp	w23, 2
-	bne	.L2589
-	mov	w3, 13
-	b	.L2638
-.L2591:
-	ldr	x4, [x0, w2, sxtw 3]
-	add	w2, w2, 1
-	ldr	x5, [x0, w2, sxtw 3]
-	and	w2, w2, 65535
-	ldrb	w5, [x5, 1]
-	strb	w5, [x4]
-	b	.L2585
-.L2592:
-	adrp	x1, .LANCHOR74
-	ldrb	w2, [x1, #:lo12:.LANCHOR74]
+	sub	w4, w4, w1
+	ldp	w2, w3, [x28, 36]
+	lsl	w4, w5, w4
+	lsr	w0, w0, w1
+	sub	w4, w4, #1
+	and	w4, w4, w0
+	adrp	x0, .LANCHOR95
+	ldrb	w0, [x0, #:lo12:.LANCHOR95]
+	udiv	w4, w4, w0
+	adrp	x0, .LC127
+	add	x0, x0, :lo12:.LC127
+	and	w1, w4, 65535
+	str	w4, [x29, 128]
+	bl	printf
+	ldr	w5, [x29, 100]
+	mov	w2, 0
+	ldr	w4, [x29, 128]
+	mov	w1, w5
+	mov	w0, w4
+	bl	gc_add_sblk
+	ldr	w10, [x29, 96]
+	b	.L2459
+.L2462:
+	ldr	x0, [x28, 16]
+	cbnz	x0, .L2464
+	ldr	x1, [x28, 8]
+	ubfiz	x22, x22, 9, 16
+	lsl	w2, w19, 9
+	mov	x0, x23
+	add	x1, x1, x22
+	bl	ftl_memcpy
+.L2464:
+	ubfiz	x19, x19, 9, 16
+	mov	x0, x28
+	add	x23, x23, x19
+	bl	buf_free
+	b	.L2448
+.L2467:
+	mov	w0, -1
+	b	.L2439
+	.size	zftl_read, .-zftl_read
+	.section	.text.zftl_vendor_read,"ax",@progbits
+	.align	2
+	.global	zftl_vendor_read
+	.type	zftl_vendor_read, %function
+zftl_vendor_read:
+	mov	x3, x2
+	mov	w2, w1
+	add	w1, w0, 512
+	mov	w0, 2
+	b	zftl_read
+	.size	zftl_vendor_read, .-zftl_vendor_read
+	.section	.text.zftl_sys_read,"ax",@progbits
+	.align	2
+	.global	zftl_sys_read
+	.type	zftl_sys_read, %function
+zftl_sys_read:
+	mov	x3, x2
+	mov	w2, w1
 	mov	w1, w0
-	ubfiz	w0, w0, 1, 15
-	cmp	w2, 0
-	csel	w0, w0, w1, ne
-	b	.L2593
-	.size	gc_do_copy_back, .-gc_do_copy_back
-	.section	.text.do_gc,"ax",@progbits
+	mov	w0, 2
+	b	zftl_read
+	.size	zftl_sys_read, .-zftl_sys_read
+	.section	.text.StorageSysDataLoad,"ax",@progbits
 	.align	2
-	.global	do_gc
-	.type	do_gc, %function
-do_gc:
-	stp	x29, x30, [sp, -96]!
+	.global	StorageSysDataLoad
+	.type	StorageSysDataLoad, %function
+StorageSysDataLoad:
+	stp	x29, x30, [sp, -32]!
+	mov	w2, 512
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR46
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR104
-	ldr	x1, [x24, #:lo12:.LANCHOR46]
-	adrp	x23, .LANCHOR60
-	stp	x21, x22, [sp, 32]
-	stp	x25, x26, [sp, 64]
-	ldrb	w3, [x20, #:lo12:.LANCHOR104]
-	ldrh	w19, [x1, 116]
-	ldrh	w21, [x1, 114]
-	cmp	w3, 6
-	stp	x27, x28, [sp, 80]
-	ldr	x25, [x23, #:lo12:.LANCHOR60]
-	add	w21, w19, w21
-	bhi	.L2640
-	adrp	x2, .L2643
-	and	w21, w21, 65535
-	add	x2, x2, :lo12:.L2643
-	ldrh	w2, [x2,w3,uxtw #1]
-	adr	x3, .Lrtx2643
-	add	x2, x3, w2, sxth #2
-	br	x2
-.Lrtx2643:
-	.section	.rodata.do_gc,"a",@progbits
-	.align	0
-	.align	2
-.L2643:
-	.2byte	(.L2642 - .Lrtx2643) / 4
-	.2byte	(.L2644 - .Lrtx2643) / 4
-	.2byte	(.L2645 - .Lrtx2643) / 4
-	.2byte	(.L2646 - .Lrtx2643) / 4
-	.2byte	(.L2647 - .Lrtx2643) / 4
-	.2byte	(.L2648 - .Lrtx2643) / 4
-	.2byte	(.L2649 - .Lrtx2643) / 4
-	.section	.text.do_gc
-.L2642:
-	ldrh	w2, [x1, 118]
-	adrp	x22, .LANCHOR67
-	ldrh	w3, [x25, 80]
-	add	w19, w19, w2
-	mov	w2, 65535
-	and	w19, w19, 65535
-	cmp	w3, w2
-	beq	.L2650
-	adrp	x0, .LANCHOR22
-	cmp	w19, 7
-	mov	w23, 3
-	csinc	w23, w23, wzr, hi
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	tbz	x0, 8, .L2652
-	ldrh	w7, [x25, 122]
-	adrp	x0, .LC153
-	ldrh	w6, [x25, 120]
-	mov	w4, w19
-	ldrh	w5, [x25, 124]
-	mov	w3, w21
-	ldrb	w2, [x22, #:lo12:.LANCHOR67]
-	mov	w1, 1348
-	add	x0, x0, :lo12:.LC153
-	bl	printf
-.L2652:
-	ldrb	w0, [x22, #:lo12:.LANCHOR67]
+	mov	x19, x1
+	mov	w20, w0
+	mov	w1, 0
+	mov	x0, x19
+	bl	ftl_memset
+	mov	x3, x19
+	mov	w1, w20
+	ldp	x19, x20, [sp, 16]
 	mov	w2, 1
-	mov	w1, w23
-	bl	gc_search_src_blk
-	cmp	w0, 0
-	ble	.L2640
-.L2653:
-	mov	w0, 1
-.L2774:
-	strb	w0, [x20, #:lo12:.LANCHOR104]
-	b	.L2640
-.L2650:
-	ldrh	w25, [x1, 122]
-	cmp	w0, 1
-	ldrh	w27, [x1, 124]
-	bne	.L2654
-	bl	gc_scan_static_data
-	bl	gc_static_wearleveling
-.L2654:
-	ldr	x0, [x23, #:lo12:.LANCHOR60]
-	mov	w26, 1
-	strb	w26, [x22, #:lo12:.LANCHOR67]
-	ldrh	w5, [x0, 124]
-	cbz	w5, .L2655
-	adrp	x1, .LANCHOR22
-	strb	wzr, [x22, #:lo12:.LANCHOR67]
-	strb	w26, [x20, #:lo12:.LANCHOR104]
-	ldr	w1, [x1, #:lo12:.LANCHOR22]
-	tbz	x1, 8, .L2640
-	ldrh	w7, [x0, 122]
-	mov	w4, w19
-	ldrh	w6, [x0, 120]
-	mov	w3, w21
+	ldp	x29, x30, [sp], 32
+	mov	w0, 2
+	b	zftl_read
+	.size	StorageSysDataLoad, .-StorageSysDataLoad
+	.section	.text.FlashBootVendorRead,"ax",@progbits
+	.align	2
+	.global	FlashBootVendorRead
+	.type	FlashBootVendorRead, %function
+FlashBootVendorRead:
+	mov	x3, x2
+	mov	w2, w1
+	add	w1, w0, 512
+	mov	w0, 2
+	b	zftl_read
+	.size	FlashBootVendorRead, .-FlashBootVendorRead
+	.section	.text.ftl_read,"ax",@progbits
+	.align	2
+	.global	ftl_read
+	.type	ftl_read, %function
+ftl_read:
+	and	w0, w0, 255
+	b	zftl_read
+	.size	ftl_read, .-ftl_read
+	.section	.text.vpn_check,"ax",@progbits
+	.align	2
+	.global	vpn_check
+	.type	vpn_check, %function
+vpn_check:
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR5
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR54
+	stp	x23, x24, [sp, 48]
+	adrp	x24, .LANCHOR4
+	stp	x25, x26, [sp, 64]
+	adrp	x22, .LANCHOR2
+	stp	x27, x28, [sp, 80]
+	bl	dump_ftl_info
+	ldr	x0, [x20, #:lo12:.LANCHOR5]
+	add	x21, x21, :lo12:.LANCHOR54
+	add	x23, x22, :lo12:.LANCHOR2
+	mov	w25, 0
+	adrp	x19, check_vpc_tbl
+	ldrh	w3, [x0, 80]
+	ldrh	w2, [x0, 48]
+	ldrh	w1, [x0, 16]
+	adrp	x0, .LC128
+	add	x0, x0, :lo12:.LC128
+	bl	printf
+	ldr	x0, [x20, #:lo12:.LANCHOR5]
+	ldr	x3, [x24, #:lo12:.LANCHOR4]
+	ldrh	w1, [x0, 16]
+	ldrh	w2, [x0, 22]
+	ubfiz	x0, x1, 1, 16
+	ldrh	w3, [x3, x0]
+	adrp	x0, .LC129
+	add	x0, x0, :lo12:.LC129
+	sub	w4, w3, w2
+	bl	printf
+	ldr	x0, [x20, #:lo12:.LANCHOR5]
+	ldr	x3, [x24, #:lo12:.LANCHOR4]
+	ldrh	w1, [x0, 48]
+	ldrh	w2, [x0, 54]
+	ubfiz	x0, x1, 1, 16
+	ldrh	w3, [x3, x0]
+	adrp	x0, .LC130
+	add	x0, x0, :lo12:.LC130
+	sub	w4, w3, w2
+	bl	printf
+	mov	w2, 4608
+	mov	w1, 0
+	add	x0, x19, :lo12:check_vpc_tbl
+	bl	ftl_memset
+.L2484:
+	ldr	w0, [x21]
+	cmp	w25, w0
+	bcc	.L2492
+	adrp	x0, .LANCHOR2
+	adrp	x23, .LC133
+	add	x28, x0, :lo12:.LANCHOR2
+	mov	x5, x0
+	add	x23, x23, :lo12:.LC133
+	mov	w22, 0
+	mov	w21, 0
+.L2493:
+	ldrh	w0, [x28]
+	cmp	w0, w21
+	bhi	.L2495
+	adrp	x20, .LC134
+	add	x26, x5, :lo12:.LANCHOR2
+	add	x19, x19, :lo12:check_vpc_tbl
+	add	x20, x20, :lo12:.LC134
+	mov	w28, 0
+	adrp	x27, .LANCHOR3
+.L2496:
+	ldrh	w1, [x26]
+	cmp	w1, w28
+	bhi	.L2501
+	mov	w2, w22
+	adrp	x1, .LANCHOR186
+	adrp	x0, .LC135
+	add	x1, x1, :lo12:.LANCHOR186
+	add	x0, x0, :lo12:.LC135
+	bl	printf
 	ldp	x19, x20, [sp, 16]
-	mov	w2, 0
 	ldp	x21, x22, [sp, 32]
-	mov	w1, 1373
 	ldp	x23, x24, [sp, 48]
-	adrp	x0, .LC153
 	ldp	x25, x26, [sp, 64]
-	add	x0, x0, :lo12:.LC153
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 96
-	b	printf
-.L2655:
-	cmp	w21, 47
-	bhi	.L2657
-	cmp	w19, 1
-	bls	.L2658
-	cmp	w19, 16
-	bhi	.L2659
-	ldr	x0, [x24, #:lo12:.LANCHOR46]
-	ldrh	w0, [x0, 120]
-	cmp	w0, 127
-	bhi	.L2660
-.L2659:
-	mov	w2, 16
-	mov	w1, 3
-.L2779:
-	mov	w0, 1
-.L2772:
-	bl	gc_search_src_blk
-	and	w0, w0, 65535
-.L2661:
-	cbnz	w0, .L2653
-	b	.L2640
-.L2660:
-	mov	w2, 8
-	mov	w1, 2
-	b	.L2779
-.L2658:
-	adrp	x1, .LANCHOR22
-	strb	wzr, [x22, #:lo12:.LANCHOR67]
-	ldr	w1, [x1, #:lo12:.LANCHOR22]
-	tbz	x1, 8, .L2662
-	ldrh	w7, [x0, 122]
-	mov	w5, 0
-	ldrh	w6, [x0, 120]
-	mov	w4, w19
-	adrp	x0, .LC153
-	mov	w3, w21
+	ldp	x29, x30, [sp], 128
+	ret
+.L2492:
+	mov	w0, w25
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 124]
+	cmn	w0, #1
+	bne	.L2485
 	mov	w2, 0
-	mov	w1, 1386
-	add	x0, x0, :lo12:.LC153
+	add	x1, x29, 124
+	mov	w0, w25
+	bl	pm_log2phys
+.L2486:
+	ldr	w2, [x29, 124]
+	cmn	w2, #1
+	beq	.L2488
+	adrp	x0, .LANCHOR96
+	mov	w3, 21
+	ldrh	w0, [x0, #:lo12:.LANCHOR96]
+	sub	w1, w3, w0
+	mov	w3, 1
+	lsr	w0, w2, w0
+	lsl	w3, w3, w1
+	sub	w3, w3, #1
+	and	w3, w3, w0
+	adrp	x0, .LANCHOR95
+	ldrb	w0, [x0, #:lo12:.LANCHOR95]
+	udiv	w3, w3, w0
+	ldrh	w0, [x22, #:lo12:.LANCHOR2]
+	and	w26, w3, 65535
+	and	w3, w3, 65535
+	cmp	w0, w26
+	bls	.L2489
+	add	x0, x19, :lo12:check_vpc_tbl
+	sxtw	x3, w3
+	ldrh	w1, [x0, x3, lsl 1]
+	add	w1, w1, 1
+	strh	w1, [x0, x3, lsl 1]
+.L2490:
+	ldrh	w0, [x23]
+	cmp	w0, w26
+	bhi	.L2488
+	adrp	x1, .LANCHOR186
+	adrp	x0, .LC0
+	mov	w2, 1206
+	add	x1, x1, :lo12:.LANCHOR186
+	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2662:
-	cmp	w21, 16
-	bls	.L2663
-	mov	w2, 1
-.L2777:
-	mov	w1, 2
-	b	.L2771
-.L2663:
-	mov	w2, 16
-.L2773:
-	mov	w1, 1
-.L2771:
-	ldrb	w0, [x22, #:lo12:.LANCHOR67]
-	b	.L2772
-.L2657:
-	add	w25, w25, w27
-	cmp	w21, 127
-	and	w25, w25, 65535
-	bhi	.L2664
-	sub	w0, w19, #2
-	and	w0, w0, 65535
-	cmp	w0, 13
-	bhi	.L2665
-	mov	w2, 8
-	mov	w1, 2
-	mov	w0, w26
-	bl	gc_search_src_blk
-	tst	w0, 65535
-	bne	.L2653
-.L2668:
-	adrp	x0, .LANCHOR64
-	adrp	x26, .LANCHOR58
-	ldrb	w0, [x0, #:lo12:.LANCHOR64]
-	cmp	w0, 2
-	adrp	x0, .LANCHOR22
-	bne	.L2768
-	add	x1, x26, :lo12:.LANCHOR58
-	cmp	w19, 1
-	strh	wzr, [x1, 34]
-	bls	.L2669
-.L2672:
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
+.L2491:
+	b	.L2491
+.L2485:
+	adrp	x1, .LANCHOR96
+	ldrh	w3, [x1, #:lo12:.LANCHOR96]
+	mov	w1, 21
+	sub	w2, w1, w3
 	mov	w1, 1
-	strb	w1, [x22, #:lo12:.LANCHOR67]
-	tbz	x0, 8, .L2671
-	ldr	x0, [x23, #:lo12:.LANCHOR60]
-	mov	w4, w19
-	mov	w3, w21
-	mov	w2, 1
-	mov	w1, 1411
-	ldrh	w7, [x0, 122]
-	ldrh	w6, [x0, 120]
-	ldrh	w5, [x0, 124]
-	adrp	x0, .LC153
-	add	x0, x0, :lo12:.LC153
+	lsr	w0, w0, w3
+	lsl	w1, w1, w2
+	sub	w1, w1, #1
+	and	w0, w1, w0
+	adrp	x1, .LANCHOR95
+	ldrb	w1, [x1, #:lo12:.LANCHOR95]
+	udiv	w0, w0, w1
+	ldrh	w1, [x22, #:lo12:.LANCHOR2]
+	cmp	w1, w0, uxth
+	bhi	.L2486
+	adrp	x1, .LANCHOR186
+	adrp	x0, .LC0
+	mov	w2, 1196
+	add	x1, x1, :lo12:.LANCHOR186
+	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2671:
-	add	x26, x26, :lo12:.LANCHOR58
-	mov	w2, 16
-	mov	w1, 1
-	ldrh	w0, [x26, 34]
-	strh	wzr, [x26, 32]
-	add	w0, w0, 1
-	strh	w0, [x26, 34]
-	ldrb	w0, [x22, #:lo12:.LANCHOR67]
-	bl	gc_search_src_blk
-	and	w0, w0, 65535
-	cmp	w0, 7
-	ccmp	w19, 31, 2, ls
-	bls	.L2673
-	ldr	x1, [x24, #:lo12:.LANCHOR46]
-	ldrh	w2, [x1, 120]
-	adrp	x1, .LANCHOR163
-	ldrh	w1, [x1, #:lo12:.LANCHOR163]
-	cmp	w2, w1
-	bls	.L2661
-.L2673:
-	cmp	w25, 63
-	bhi	.L2674
-	mov	w2, 8
-	b	.L2777
-.L2665:
-	adrp	x0, .LANCHOR165
-	ldrh	w0, [x0, #:lo12:.LANCHOR165]
-	cmp	w25, w0, lsr 1
-	bcs	.L2668
-.L2640:
+.L2487:
+	b	.L2487
+.L2489:
+	mov	w1, w25
+	adrp	x0, .LC131
+	add	x0, x0, :lo12:.LC131
+	bl	printf
+	adrp	x0, .LANCHOR52
+	mov	w2, 4
+	ldrb	w3, [x0, #:lo12:.LANCHOR52]
+	adrp	x0, .LANCHOR117+8
+	ldr	x1, [x0, #:lo12:.LANCHOR117+8]
+	adrp	x0, .LC132
+	lsl	w3, w3, 7
+	add	x0, x0, :lo12:.LC132
+	bl	rknand_print_hex
+	b	.L2490
+.L2488:
+	add	w25, w25, 1
+	b	.L2484
+.L2495:
+	uxtw	x0, w21
+	ldr	x1, [x24, #:lo12:.LANCHOR4]
+	lsl	x27, x0, 1
+	add	x25, x19, :lo12:check_vpc_tbl
+	sxtw	x26, w21
+	ldrh	w3, [x1, x27]
+	ldrh	w2, [x25, x26, lsl 1]
+	cmp	w3, w2
+	beq	.L2494
+	adrp	x1, .LANCHOR3
+	str	x5, [x29, 104]
+	ldr	x1, [x1, #:lo12:.LANCHOR3]
+	add	x0, x1, x0, lsl 2
+	mov	w1, w21
+	ldrb	w4, [x0, 2]
+	mov	x0, x23
+	ubfx	x4, x4, 5, 3
+	bl	printf
+	ldr	x0, [x24, #:lo12:.LANCHOR4]
+	mov	w1, 65535
+	ldr	x5, [x29, 104]
+	ldrh	w0, [x0, x27]
+	cmp	w0, w1
+	beq	.L2494
+	ldrh	w1, [x25, x26, lsl 1]
+	cmp	w1, w0
+	bls	.L2494
+	ldr	x0, [x20, #:lo12:.LANCHOR5]
+	ldrh	w1, [x0, 16]
+	cmp	w1, w21
+	beq	.L2494
+	ldrh	w1, [x0, 80]
+	cmp	w1, w21
+	beq	.L2494
+	ldrh	w0, [x0, 48]
+	cmp	w0, w21
+	csinc	w22, w22, wzr, eq
+.L2494:
+	add	w21, w21, 1
+	and	w21, w21, 65535
+	b	.L2493
+.L2501:
+	ldr	x0, [x27, #:lo12:.LANCHOR3]
+	uxtw	x21, w28
+	add	x0, x0, x21, lsl 2
+	ldrb	w1, [x0, 2]
+	tst	w1, 224
+	bne	.L2497
+	sxtw	x23, w28
+	ldrh	w1, [x19, x23, lsl 1]
+	cbnz	w1, .L2498
+	ldr	x1, [x24, #:lo12:.LANCHOR4]
+	lsl	x25, x21, 1
+	ldrh	w1, [x1, x25]
+	cbz	w1, .L2499
+	mov	w1, w28
+	mov	x0, x20
+	bl	printf
+.L2499:
+	ldr	x1, [x24, #:lo12:.LANCHOR4]
+	strh	wzr, [x1, x25]
+.L2498:
+	ldr	x1, [x24, #:lo12:.LANCHOR4]
+	ldrh	w1, [x1, x21, lsl 1]
+	cbz	w1, .L2497
+	ldrh	w1, [x19, x23, lsl 1]
+	cbz	w1, .L2497
+	adrp	x1, .LANCHOR186
+	adrp	x0, .LC0
+	mov	w2, 1238
+	add	x1, x1, :lo12:.LANCHOR186
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2500:
+	b	.L2500
+.L2497:
+	add	w1, w28, 1
+	and	w28, w1, 65535
+	b	.L2496
+	.size	vpn_check, .-vpn_check
+	.section	.text.gc_scan_src_blk,"ax",@progbits
+	.align	2
+	.global	gc_scan_src_blk
+	.type	gc_scan_src_blk, %function
+gc_scan_src_blk:
+	stp	x29, x30, [sp, -96]!
+	mov	w0, 65535
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR63
+	stp	x21, x22, [sp, 32]
+	ldrh	w1, [x19, #:lo12:.LANCHOR63]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	cmp	w1, w0
+	bne	.L2516
+	adrp	x1, .LANCHOR187
+	adrp	x0, .LC0
+	mov	w2, 897
+	add	x1, x1, :lo12:.LANCHOR187
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2517:
+	b	.L2517
+.L2516:
+	adrp	x0, .LANCHOR29
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 8, .L2518
+	adrp	x2, .LANCHOR4
+	ubfiz	x0, x1, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR4]
+	ldrh	w2, [x2, x0]
+	adrp	x0, .LC136
+	add	x0, x0, :lo12:.LC136
+	bl	printf
+.L2518:
+	ldrh	w0, [x19, #:lo12:.LANCHOR63]
+	add	x13, x19, :lo12:.LANCHOR63
+	add	x1, x13, 40
+	bl	ftl_get_blk_list_in_sblk
+	and	w1, w0, 255
+	strb	w1, [x13, 5]
+	cbnz	w1, .L2519
+	mov	w0, -1
+	strh	w0, [x19, #:lo12:.LANCHOR63]
+.L2555:
+	mov	w0, 0
+.L2515:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2768:
-	cmp	w19, 1
-	bls	.L2669
-	add	x1, x26, :lo12:.LANCHOR58
-	ldrh	w1, [x1, 34]
-	cmp	w1, 3
-	bls	.L2672
-.L2669:
-	add	x26, x26, :lo12:.LANCHOR58
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	strb	wzr, [x22, #:lo12:.LANCHOR67]
-	strh	wzr, [x26, 34]
-	tbz	x0, 8, .L2675
-	ldr	x0, [x23, #:lo12:.LANCHOR60]
-	mov	w4, w19
-	mov	w3, w21
-	mov	w2, 0
-	mov	w1, 1426
-	ldrh	w7, [x0, 122]
-	ldrh	w6, [x0, 120]
-	ldrh	w5, [x0, 124]
-	adrp	x0, .LC153
-	add	x0, x0, :lo12:.LC153
-	bl	printf
-.L2675:
-	adrp	x0, .LANCHOR165
-	ldrh	w0, [x0, #:lo12:.LANCHOR165]
-	cmp	w25, w0, lsr 1
-	bls	.L2640
-	mov	w2, 16
-	cmp	w19, 31
-	bhi	.L2773
-	b	.L2778
-.L2674:
-	mov	w2, 16
-.L2778:
-	mov	w1, 3
-	b	.L2771
-.L2664:
-	cmp	w21, 255
-	bhi	.L2677
-	adrp	x0, .LANCHOR165
-	ldrh	w0, [x0, #:lo12:.LANCHOR165]
-	cmp	w25, w0
-	bls	.L2677
-	cmp	w25, w0, lsr 1
-	bcc	.L2640
-	strb	wzr, [x22, #:lo12:.LANCHOR67]
-	mov	w2, 16
-	mov	w1, w26
-	mov	w0, 0
-	bl	gc_search_src_blk
-	and	w0, w0, 65535
-	cmp	w0, 7
-	ccmp	w19, 4, 0, ls
-	bls	.L2661
-	ldr	x0, [x23, #:lo12:.LANCHOR60]
-	mov	w1, 255
-	mov	w2, 128
-	add	x0, x0, 136
-	strh	wzr, [x0, -16]
-	bl	ftl_memset
-	strb	w26, [x22, #:lo12:.LANCHOR67]
-	ldr	x0, [x24, #:lo12:.LANCHOR46]
-	ldrh	w1, [x0, 120]
-	adrp	x0, .LANCHOR163
-	ldrh	w0, [x0, #:lo12:.LANCHOR163]
-	cmp	w1, w0
-	bls	.L2678
-	cmp	w19, 16
-	bls	.L2679
-.L2681:
-	mov	w2, 8
-	mov	w1, 2
-.L2770:
-	mov	w0, 1
-	bl	gc_search_src_blk
-	mov	w1, 1
-	and	w0, w0, 65535
-	strb	w1, [x20, #:lo12:.LANCHOR104]
-	b	.L2661
-.L2678:
-	cmp	w19, 32
-	bls	.L2679
-	mov	w2, 16
-	mov	w1, w26
-	b	.L2770
-.L2679:
-	cmp	w19, 7
-	bls	.L2681
-	mov	w2, 16
-	mov	w1, 3
-	b	.L2770
-.L2677:
-	sub	w19, w19, #2
-	and	w19, w19, 65535
-	cmp	w19, 5
-	bhi	.L2640
-	adrp	x0, .LANCHOR165
-	ldrh	w0, [x0, #:lo12:.LANCHOR165]
-	cmp	w25, w0, lsr 1
-	bls	.L2640
-	mov	w2, 16
-	mov	w1, 2
-	mov	w0, 1
-	bl	gc_search_src_blk
-	and	w0, w0, 65535
-	cmp	w0, 15
-	bhi	.L2653
-	ldr	x3, [x23, #:lo12:.LANCHOR60]
-	mov	w2, 128
-	ldrb	w1, [x22, #:lo12:.LANCHOR67]
-	ldp	x19, x20, [sp, 16]
-	add	x0, x3, x1, sxtw 1
-	ubfiz	x1, x1, 7, 8
-	ldp	x21, x22, [sp, 32]
-	strh	wzr, [x0, 120]
-	add	x0, x1, 136
-	ldp	x23, x24, [sp, 48]
-	mov	w1, 255
-	ldp	x25, x26, [sp, 64]
-	add	x0, x3, x0
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 96
-	b	ftl_memset
-.L2644:
-	adrp	x7, .LANCHOR58
-	mov	w0, 65535
-	ldrh	w1, [x7, #:lo12:.LANCHOR58]
-	cmp	w1, w0
-	bne	.L2684
-	bl	gc_get_src_blk
-	strh	w0, [x7, #:lo12:.LANCHOR58]
-.L2684:
-	ldrh	w0, [x7, #:lo12:.LANCHOR58]
-	mov	w1, 65535
-	add	x2, x7, :lo12:.LANCHOR58
-	cmp	w0, w1
-	beq	.L2685
-	ldrh	w3, [x2, 56]
-	cbz	w3, .L2686
-	add	x2, x2, 58
-	mov	w1, 0
-.L2688:
-	ldrh	w4, [x2], 2
-	cmp	w4, w0
-	bne	.L2687
-.L2691:
-	adrp	x0, .LANCHOR58
-	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR58]
-	b	.L2640
-.L2687:
-	add	w1, w1, 1
-	and	w1, w1, 65535
-	cmp	w3, w1
-	bne	.L2688
-.L2686:
-	adrp	x1, .LANCHOR59
-	ldr	x1, [x1, #:lo12:.LANCHOR59]
-	add	x1, x1, x0, lsl 2
+.L2519:
+	adrp	x1, .LANCHOR3
+	ldrh	w3, [x19, #:lo12:.LANCHOR63]
+	ldr	x1, [x1, #:lo12:.LANCHOR3]
+	mov	x2, x3
+	add	x1, x1, x3, lsl 2
 	ldrb	w1, [x1, 2]
-	and	w2, w1, 224
-	cmp	w2, 224
-	beq	.L2689
-	tst	w1, 192
-	bne	.L2690
-.L2689:
-	adrp	x1, .LANCHOR56
-	ldr	x1, [x1, #:lo12:.LANCHOR56]
-	ldrh	w0, [x1, x0, lsl 1]
-	cbz	w0, .L2691
-	adrp	x1, .LANCHOR172
+	and	w1, w1, 224
+	cmp	w1, 32
+	beq	.L2521
+	cmp	w1, 224
+	beq	.L2521
+	cbz	w1, .L2522
+	adrp	x3, .LANCHOR5
+	ldr	x3, [x3, #:lo12:.LANCHOR5]
+	ldrh	w4, [x3, 16]
+	cmp	w4, w2
+	beq	.L2521
+	ldrh	w4, [x3, 48]
+	cmp	w4, w2
+	beq	.L2521
+	ldrh	w3, [x3, 80]
+	cmp	w3, w2
+	bne	.L2553
+.L2521:
+	add	x0, x19, :lo12:.LANCHOR63
+	mov	w1, -1
+	strh	w1, [x19, #:lo12:.LANCHOR63]
+	strh	wzr, [x0, 24]
+	b	.L2555
+.L2522:
+	adrp	x0, .LANCHOR4
+	ldr	x0, [x0, #:lo12:.LANCHOR4]
+	ldrh	w0, [x0, x3, lsl 1]
+	cbz	w0, .L2521
+	adrp	x1, .LANCHOR187
 	adrp	x0, .LC0
-	mov	w2, 1497
-	add	x1, x1, :lo12:.LANCHOR172
+	mov	w2, 917
+	add	x1, x1, :lo12:.LANCHOR187
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2692:
-	b	.L2692
-.L2690:
-	mov	w0, 2
-	b	.L2774
-.L2685:
-	strb	wzr, [x20, #:lo12:.LANCHOR104]
-	b	.L2640
-.L2645:
-	bl	gc_scan_src_blk
-	cmn	w0, #1
-	bne	.L2693
-	mov	w0, 3
-	b	.L2774
-.L2693:
-	adrp	x21, .LANCHOR58
-	mov	w1, 65535
-	add	x19, x21, :lo12:.LANCHOR58
-	ldrh	w0, [x21, #:lo12:.LANCHOR58]
-	cmp	w0, w1
-	beq	.L2653
-	ldrh	w1, [x19, 24]
-	cbz	w1, .L2694
-	mov	w0, 4
-	strh	wzr, [x19, 26]
-	strb	w0, [x20, #:lo12:.LANCHOR104]
-	b	.L2640
-.L2694:
-	mov	w1, 1
-	strb	w1, [x20, #:lo12:.LANCHOR104]
-	adrp	x20, .LANCHOR56
-	ubfiz	x1, x0, 1, 16
-	ldr	x2, [x20, #:lo12:.LANCHOR56]
-	ldrh	w1, [x2, x1]
-	cbz	w1, .L2695
-	adrp	x1, .LANCHOR172
+.L2524:
+	b	.L2524
+.L2553:
+	and	w0, w0, 255
+	sub	w0, w0, #1
+	add	x0, x13, x0, sxtw 1
+	ldrh	w3, [x0, 40]
+	mov	w0, 65535
+	cmp	w3, w0
+	bne	.L2525
+	adrp	x1, .LANCHOR187
 	adrp	x0, .LC0
-	mov	w2, 1525
-	add	x1, x1, :lo12:.LANCHOR172
+	mov	w2, 925
+	add	x1, x1, :lo12:.LANCHOR187
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2696:
-	b	.L2696
-.L2695:
-	bl	ftl_free_sblk
-	ldr	x0, [x20, #:lo12:.LANCHOR56]
-	ldrh	w1, [x21, #:lo12:.LANCHOR58]
-	strh	wzr, [x0, x1, lsl 1]
-	ldrh	w0, [x19, 30]
-	add	w0, w0, 1
+.L2526:
+	b	.L2526
+.L2525:
+	adrp	x4, .LANCHOR99
+	adrp	x2, .LANCHOR80
+	cmp	w1, 160
+	mov	x24, x2
+	ldrh	w20, [x4, #:lo12:.LANCHOR99]
+	adrp	x21, .LANCHOR71
+	ldrh	w0, [x2, #:lo12:.LANCHOR80]
+	sub	w0, w0, #1
 	and	w0, w0, 65535
-	strh	w0, [x19, 30]
-	cmp	w0, 8
-	bls	.L2691
-	strh	wzr, [x19, 30]
-	bl	ftl_flush
-	bl	pm_flush
-	bl	ftl_ext_info_flush
-	mov	w0, 0
-	bl	ftl_info_flush
-	b	.L2691
-.L2646:
-	bl	gc_scan_src_blk_one_page
-	adrp	x19, .LANCHOR58
-	add	x0, x19, :lo12:.LANCHOR58
-	adrp	x1, .LANCHOR79
-	ldrh	w1, [x1, #:lo12:.LANCHOR79]
-	ldrh	w2, [x0, 2]
-	cmp	w2, w1
-	bcc	.L2640
+	mul	w20, w20, w3
+	bne	.L2540
+	adrp	x1, .LANCHOR67
+	ldrb	w1, [x1, #:lo12:.LANCHOR67]
+	and	w22, w1, 65535
+	cmp	w1, 2
+	orr	w20, w20, w1, lsl 24
+	bne	.L2527
+	ldrh	w0, [x21, #:lo12:.LANCHOR71]
+	mov	w22, 2
+	sub	w0, w0, #1
+	and	w0, w0, 65535
+.L2527:
+	add	x23, x19, :lo12:.LANCHOR63
+	orr	w20, w0, w20
+	mov	w0, 1
+	strb	w22, [x23, 6]
+	strh	wzr, [x23, 2]
+	strb	wzr, [x23, 4]
+	strh	wzr, [x23, 26]
+	bl	buf_alloc
+	str	w20, [x0, 40]
+	adrp	x20, .LANCHOR72
+	mov	x25, x0
+	mov	w1, 1
+	bl	sblk_read_page
+	ldrh	w2, [x21, #:lo12:.LANCHOR71]
+	adrp	x21, .LANCHOR64
+	ldrb	w0, [x20, #:lo12:.LANCHOR72]
+	mov	w1, 255
+	mul	w2, w2, w0
+	ldr	x0, [x21, #:lo12:.LANCHOR64]
+	lsl	w2, w2, 2
+	bl	ftl_memset
+	strh	wzr, [x23, 24]
+	ldr	w0, [x25, 52]
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	bne	.L2528
+.L2530:
+	mov	x0, x25
+	bl	buf_free
+	mov	w0, -1
+	b	.L2515
+.L2540:
+	mov	w22, 1
+	b	.L2527
+.L2528:
+	ldr	x0, [x25, 24]
+	mov	w23, 15555
+	movk	w23, 0xf55f, lsl 16
+	ldr	w0, [x0]
+	cmp	w0, w23
+	beq	.L2529
+	ldrh	w0, [x19, #:lo12:.LANCHOR63]
+	mov	x1, 0
+	bl	ftl_sblk_dump
+	ldr	x0, [x25, 24]
+	ldr	w0, [x0]
+	cmp	w0, w23
+	beq	.L2530
+	adrp	x1, .LANCHOR187
+	adrp	x0, .LC0
+	mov	w2, 955
+	add	x1, x1, :lo12:.LANCHOR187
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2531:
+	b	.L2531
+.L2529:
+	ldrh	w0, [x24, #:lo12:.LANCHOR80]
+	adrp	x23, .LANCHOR95
+	ldrb	w20, [x20, #:lo12:.LANCHOR72]
+	add	x23, x23, :lo12:.LANCHOR95
+	ldr	x24, [x25, 8]
+	mov	x26, 0
+	mul	w20, w20, w0
+	mul	w20, w22, w20
+	adrp	x22, .LANCHOR96
+	add	x22, x22, :lo12:.LANCHOR96
+	and	w20, w20, 65535
+.L2532:
+	cmp	w20, w26
+	bgt	.L2537
+	mov	x0, x25
+	bl	buf_free
+	ldrh	w1, [x19, #:lo12:.LANCHOR63]
+	adrp	x20, .LANCHOR4
+	add	x0, x19, :lo12:.LANCHOR63
+	ldr	x3, [x20, #:lo12:.LANCHOR4]
+	ubfiz	x2, x1, 1, 16
+	ldrh	w2, [x3, x2]
 	ldrh	w3, [x0, 24]
-	adrp	x2, .LANCHOR22
-	cbz	w3, .L2697
-	strh	wzr, [x0, 26]
-	mov	w1, 4
-	ldr	w0, [x2, #:lo12:.LANCHOR22]
-	strb	w1, [x20, #:lo12:.LANCHOR104]
-	adrp	x20, .LANCHOR56
-	tbz	x0, 8, .L2698
-	ldrh	w1, [x19, #:lo12:.LANCHOR58]
-	ldr	x2, [x20, #:lo12:.LANCHOR56]
-	ubfiz	x0, x1, 1, 16
-	ldrh	w2, [x2, x0]
-	adrp	x0, .LC154
-	add	x0, x0, :lo12:.LC154
+	cmp	w2, w3
+	beq	.L2538
+	adrp	x0, .LC137
+	add	x0, x0, :lo12:.LC137
 	bl	printf
-.L2698:
-	ldrh	w2, [x19, #:lo12:.LANCHOR58]
-	add	x0, x19, :lo12:.LANCHOR58
-	ldr	x1, [x20, #:lo12:.LANCHOR56]
+.L2538:
+	ldrh	w2, [x19, #:lo12:.LANCHOR63]
+	add	x0, x19, :lo12:.LANCHOR63
+	ldr	x1, [x20, #:lo12:.LANCHOR4]
 	ldrh	w0, [x0, 24]
 	ldrh	w1, [x1, x2, lsl 1]
 	cmp	w1, w0
-	beq	.L2640
-	adrp	x1, .LANCHOR172
-	adrp	x0, .LC0
-	mov	w2, 1555
-	add	x1, x1, :lo12:.LANCHOR172
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2699:
-	b	.L2699
-.L2697:
-	adrp	x0, .LANCHOR59
-	ldrh	w1, [x19, #:lo12:.LANCHOR58]
-	ldr	x21, [x0, #:lo12:.LANCHOR59]
+	bcs	.L2539
+	bl	vpn_check
+.L2539:
+	add	x0, x19, :lo12:.LANCHOR63
+	ldrh	w2, [x19, #:lo12:.LANCHOR63]
+	ldr	x1, [x20, #:lo12:.LANCHOR4]
+	ldrh	w3, [x0, 24]
+	strh	w3, [x1, x2, lsl 1]
+	strh	wzr, [x0, 28]
+	ldrh	w0, [x0, 24]
+	b	.L2515
+.L2537:
+	ldr	w0, [x24, x26, lsl 2]
+	cmn	w0, #1
+	beq	.L2534
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 92]
+	cmn	w0, #1
+	bne	.L2535
+	ldr	w0, [x24, x26, lsl 2]
+	mov	w2, 0
+	add	x1, x29, 92
+	bl	pm_log2phys
+.L2535:
+	ldrh	w1, [x22]
+	mov	w0, 21
+	ldr	w3, [x29, 92]
+	sub	w2, w0, w1
 	mov	w0, 1
-	strb	w0, [x20, #:lo12:.LANCHOR104]
-	ldr	w0, [x2, #:lo12:.LANCHOR22]
-	add	x21, x21, x1, uxth 2
-	tbz	x0, 8, .L2700
-	ldrb	w2, [x21, 2]
-	adrp	x0, .LC155
-	add	x0, x0, :lo12:.LC155
-	ubfx	x2, x2, 5, 3
-	bl	printf
-.L2700:
-	ldrb	w0, [x21, 2]
-	and	w1, w0, 224
-	cmp	w1, 224
-	beq	.L2701
-	tst	w0, 192
-	bne	.L2702
-.L2701:
-	adrp	x1, .LANCHOR172
-	adrp	x0, .LC0
-	mov	w2, 1565
-	add	x1, x1, :lo12:.LANCHOR172
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2703:
-	b	.L2703
-.L2702:
-	ldrh	w0, [x19, #:lo12:.LANCHOR58]
-	add	x20, x19, :lo12:.LANCHOR58
-	bl	ftl_free_sblk
-	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR58]
-	ldrh	w0, [x20, 30]
-	add	w0, w0, 1
-	and	w0, w0, 65535
-	strh	w0, [x20, 30]
-	cmp	w0, 8
-	bls	.L2640
-	strh	wzr, [x20, 30]
-.L2776:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 96
-	b	flt_sys_flush
-.L2647:
-	ldrh	w27, [x25, 80]
-	mov	w0, 65535
-	add	x26, x25, 80
-	cmp	w27, w0
-	bne	.L2704
-	adrp	x0, .LANCHOR67
-	ldrb	w22, [x0, #:lo12:.LANCHOR67]
-	cmp	w22, 1
-	bne	.L2704
-	bl	ftl_flush
-	mov	w0, 5
-	bl	ftl_alloc_sblk
-	and	w28, w0, 65535
-	cmp	w28, w27
-	bne	.L2705
-	adrp	x1, .LANCHOR172
-	adrp	x0, .LC0
-	mov	w2, 1581
-	add	x1, x1, :lo12:.LANCHOR172
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2706:
-	b	.L2706
-.L2705:
-	mov	w1, w22
-	bl	ftl_erase_sblk
-	mov	w0, 5
-	strb	w0, [x26, 4]
-	add	x1, x25, 96
-	mov	w0, w28
-	bl	ftl_get_blk_list_in_sblk
-	and	w0, w0, 255
-	adrp	x1, .LANCHOR79
-	strb	w0, [x26, 9]
-	adrp	x21, .LANCHOR68
-	adrp	x20, .LANCHOR69
-	ldrh	w1, [x1, #:lo12:.LANCHOR79]
-	strh	w28, [x25, 80]
-	ldrh	w2, [x21, #:lo12:.LANCHOR68]
-	strh	wzr, [x26, 2]
-	mul	w0, w0, w1
-	strb	wzr, [x26, 5]
-	strh	w0, [x26, 6]
-	mov	w1, 255
-	ldrb	w0, [x20, #:lo12:.LANCHOR69]
-	strh	wzr, [x26, 10]
-	mul	w2, w2, w0
-	adrp	x0, .LANCHOR107
-	ldr	x0, [x0, #:lo12:.LANCHOR107]
-	lsl	w2, w2, 2
-	bl	ftl_memset
-	ldrb	w0, [x20, #:lo12:.LANCHOR69]
-	mov	w1, 255
-	ldrh	w2, [x21, #:lo12:.LANCHOR68]
-	mul	w2, w2, w0
-	adrp	x0, .LANCHOR108
-	ldr	x0, [x0, #:lo12:.LANCHOR108]
-	lsl	w2, w2, 2
-	bl	ftl_memset
-	ldrb	w0, [x20, #:lo12:.LANCHOR69]
-	mov	w1, 255
-	ldrh	w2, [x21, #:lo12:.LANCHOR68]
-	mul	w2, w2, w0
-	adrp	x0, .LANCHOR65
-	ldr	x0, [x0, #:lo12:.LANCHOR65]
-	bl	ftl_memset
-	ldr	x0, [x23, #:lo12:.LANCHOR60]
-	mov	w1, -1
-	str	w28, [x0, 132]
-	strh	w1, [x0, 128]
-	strh	w1, [x0, 130]
-	bl	pm_flush
-	bl	ftl_ext_info_flush
-	ldr	x0, [x24, #:lo12:.LANCHOR46]
-	mov	w1, -1
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	strh	w28, [x0, 126]
-	adrp	x0, .LANCHOR58
-	add	x0, x0, :lo12:.LANCHOR58
-	ldp	x23, x24, [sp, 48]
-	strh	wzr, [x0, 314]
-	strh	wzr, [x0, 56]
-	strh	wzr, [x0, 316]
-	strh	wzr, [x0, 318]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	str	w1, [x0, 320]
+	lsl	w0, w0, w2
+	sub	w0, w0, #1
+	lsr	w1, w3, w1
+	and	w0, w0, w1
+	ldrb	w1, [x23]
+	ldrh	w2, [x19, #:lo12:.LANCHOR63]
+	udiv	w0, w0, w1
+	add	x1, x19, :lo12:.LANCHOR63
+	cmp	w0, w2
+	bne	.L2534
+	ldrh	w0, [x1, 24]
+	ldr	x4, [x21, #:lo12:.LANCHOR64]
+	ubfiz	x2, x0, 2, 16
+	add	w0, w0, 1
+	str	w3, [x4, x2]
+	strh	w0, [x1, 24]
+.L2534:
+	add	x26, x26, 1
+	b	.L2532
+	.size	gc_scan_src_blk, .-gc_scan_src_blk
+	.section	.text.ftl_scan_all_data,"ax",@progbits
+	.align	2
+	.global	ftl_scan_all_data
+	.type	ftl_scan_all_data, %function
+ftl_scan_all_data:
+	sub	sp, sp, #160
 	mov	w0, 0
-	ldp	x29, x30, [sp], 96
-	b	ftl_info_flush
-.L2704:
-	cmp	w21, 31
-	bls	.L2724
-	cmp	w21, 63
-	bls	.L2725
-	cmp	w21, 127
-	bls	.L2726
-	cmp	w21, 255
-	cset	w21, ls
-	add	w21, w21, 1
-.L2707:
-	adrp	x27, .LANCHOR67
-	adrp	x22, .LANCHOR58
-	add	x27, x27, :lo12:.LANCHOR67
-	add	x19, x22, :lo12:.LANCHOR58
-	adrp	x28, .LANCHOR38
-.L2708:
-	sub	w21, w21, #1
-	and	w21, w21, 255
-	cmp	w21, 255
-	beq	.L2640
-	bl	gc_do_copy_back
-	ldrb	w0, [x27]
-	cbnz	w0, .L2709
-	ldrb	w0, [x28, #:lo12:.LANCHOR38]
-	cmp	w0, 3
-	bhi	.L2710
-	bl	ftl_write_commit
-.L2710:
-	ldrh	w1, [x19, 26]
-	ldrh	w0, [x19, 24]
-	cmp	w1, w0
-	bcc	.L2708
-	mov	w0, 1
-	strb	w0, [x20, #:lo12:.LANCHOR104]
-	bl	ftl_write_commit
-	bl	ftl_flush
-	ldrh	w0, [x19]
-	adrp	x2, .LANCHOR56
-	ldr	x2, [x2, #:lo12:.LANCHOR56]
-	ubfiz	x1, x0, 1, 16
-	ldrh	w1, [x2, x1]
-	cbz	w1, .L2712
-	adrp	x1, .LANCHOR172
-	adrp	x0, .LC0
-	mov	w2, 1638
-	add	x1, x1, :lo12:.LANCHOR172
-	add	x0, x0, :lo12:.LC0
+	stp	x29, x30, [sp, 16]
+	add	x29, sp, 16
+	stp	x19, x20, [sp, 32]
+	mov	w20, 0
+	stp	x23, x24, [sp, 64]
+	adrp	x23, .LANCHOR54
+	stp	x27, x28, [sp, 96]
+	add	x28, x23, :lo12:.LANCHOR54
+	stp	x21, x22, [sp, 48]
+	adrp	x24, .LC140
+	stp	x25, x26, [sp, 80]
+	bl	buf_alloc
+	mov	w1, 0
+	mov	x19, x0
+	adrp	x0, .LC138
+	add	x0, x0, :lo12:.LC138
 	bl	printf
-.L2713:
-	b	.L2713
-.L2724:
-	mov	w21, 9
-	b	.L2707
-.L2725:
-	mov	w21, 5
-	b	.L2707
-.L2726:
-	mov	w21, 3
-	b	.L2707
-.L2712:
-	bl	ftl_free_sblk
-.L2775:
+	add	x0, x24, :lo12:.LC140
+	str	x0, [x29, 120]
+.L2557:
+	ldr	w0, [x23, #:lo12:.LANCHOR54]
+	cmp	w20, w0
+	bcc	.L2570
+	mov	x0, x19
+	bl	buf_free
+	ldp	x29, x30, [sp, 16]
+	ldp	x19, x20, [sp, 32]
+	ldp	x21, x22, [sp, 48]
+	ldp	x23, x24, [sp, 64]
+	ldp	x25, x26, [sp, 80]
+	ldp	x27, x28, [sp, 96]
+	add	sp, sp, 160
+	ret
+.L2570:
 	mov	w0, -1
-	strh	w0, [x19]
-	b	.L2640
-.L2709:
-	ldrh	w0, [x19, 318]
-	cbz	w0, .L2714
-	ldr	w0, [x19, 320]
-	strh	wzr, [x19, 318]
+	str	w0, [x19, 36]
+	mov	w0, w20
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 140]
 	cmn	w0, #1
-	beq	.L2715
-	bl	ftl_mask_bad_block
-.L2715:
-	ldr	x0, [x23, #:lo12:.LANCHOR60]
-	add	x19, x22, :lo12:.LANCHOR58
-	strh	wzr, [x19, 56]
-	ldrh	w0, [x0, 80]
-	str	wzr, [x19, 320]
-	bl	ftl_free_sblk
-	ldr	x1, [x23, #:lo12:.LANCHOR60]
-	mov	w0, -1
-	ldr	x2, [x24, #:lo12:.LANCHOR46]
-	strh	w0, [x1, 80]
-	strh	w0, [x2, 126]
-	strh	w0, [x1, 130]
-	ldr	x0, [x19, 8]
-	cbz	x0, .L2716
-	bl	buf_free
-.L2716:
-	add	x22, x22, :lo12:.LANCHOR58
-	str	xzr, [x22, 8]
-	bl	flt_sys_flush
-	adrp	x1, .LANCHOR172
-	adrp	x0, .LC0
-	strb	wzr, [x20, #:lo12:.LANCHOR104]
-	mov	w2, 1671
-	add	x1, x1, :lo12:.LANCHOR172
-	add	x0, x0, :lo12:.LC0
+	bne	.L2558
+	mov	w2, 0
+	add	x1, x29, 140
+	mov	w0, w20
+	bl	pm_log2phys
+.L2558:
+	tst	x20, 4095
+	bne	.L2559
+	ldr	w2, [x29, 140]
+	adrp	x0, .LC139
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC139
 	bl	printf
-.L2717:
-	b	.L2717
-.L2714:
-	ldrh	w0, [x26, 6]
-	ldrh	w1, [x19, 26]
-	cmp	w0, 1
-	ldrh	w0, [x19, 24]
-	bls	.L2718
-	cmp	w1, w0
-	bcc	.L2708
-	mov	w0, 1
-	strb	w0, [x20, #:lo12:.LANCHOR104]
-	ldrh	w0, [x19, 56]
-	add	w1, w0, 1
-	strh	w1, [x19, 56]
-	add	x0, x19, x0, sxtw 1
-	ldrh	w1, [x19]
-	strh	w1, [x0, 58]
-	b	.L2775
-.L2718:
-	mov	w2, 5
-	strb	w2, [x20, #:lo12:.LANCHOR104]
-	cmp	w1, w0
-	bcc	.L2719
-	ldrh	w0, [x19, 56]
-	add	w1, w0, 1
-	strh	w1, [x19, 56]
-	add	x0, x19, x0, sxtw 1
-	ldrh	w1, [x19]
-	strh	w1, [x0, 58]
-	mov	w0, -1
-	strh	w0, [x19]
-.L2719:
-	bl	ftl_flush
-	bl	sblk_wait_write_queue_completed
-	bl	gc_write_completed
-	ldr	x0, [x23, #:lo12:.LANCHOR60]
-	ldrh	w1, [x25, 80]
-	strh	w1, [x0, 128]
-	bl	pm_flush
-	bl	ftl_ext_info_flush
-	add	x0, x22, :lo12:.LANCHOR58
-	adrp	x1, .LANCHOR79
-	adrp	x2, .LANCHOR64
-	ldrh	w1, [x1, #:lo12:.LANCHOR79]
-	ldrb	w2, [x2, #:lo12:.LANCHOR64]
-	strh	wzr, [x0, 16]
-	strh	w1, [x0, 18]
-	cmp	w2, 2
-	strh	w2, [x0, 20]
-	bne	.L2720
-	ubfiz	w1, w1, 1, 15
-	strh	w1, [x0, 18]
+.L2559:
+	ldr	w0, [x29, 140]
+	stp	w0, w0, [x19, 40]
+	cmn	w0, #1
+	bne	.L2560
+.L2562:
+	add	w20, w20, 1
+	b	.L2557
+.L2560:
 	mov	w1, 1
-	strh	w1, [x0, 20]
-.L2720:
-	add	x22, x22, :lo12:.LANCHOR58
-	strh	wzr, [x22, 22]
-	b	.L2640
-.L2648:
-	adrp	x19, .LANCHOR58
-	bl	gc_check_data_one_wl
-	add	x19, x19, :lo12:.LANCHOR58
-	cbz	w0, .L2722
-	ldr	x0, [x23, #:lo12:.LANCHOR60]
-	strh	wzr, [x19, 56]
-	ldrh	w0, [x0, 80]
-	bl	ftl_free_sblk
-	ldr	x1, [x23, #:lo12:.LANCHOR60]
-	mov	w0, -1
-	ldr	x2, [x24, #:lo12:.LANCHOR46]
-	strh	w0, [x1, 80]
-	strh	w0, [x2, 126]
-	strh	w0, [x1, 130]
-	ldr	x0, [x19, 8]
-	bl	buf_free
-	strb	wzr, [x20, #:lo12:.LANCHOR104]
-	str	xzr, [x19, 8]
-	b	.L2776
-.L2722:
-	ldrh	w1, [x19, 16]
-	ldrh	w0, [x19, 18]
-	cmp	w1, w0
-	bcc	.L2640
-	mov	w0, 6
-	strb	w0, [x20, #:lo12:.LANCHOR104]
-	ldr	x0, [x19, 8]
-	bl	buf_free
-	str	xzr, [x19, 8]
-	b	.L2640
-.L2649:
-	bl	gc_update_l2p_map_new
-	mov	w19, -1
-	bl	gc_free_src_blk
-	bl	ftl_flush
-	bl	pm_flush
-	strh	w19, [x25, 80]
-	bl	ftl_ext_info_flush
-	ldr	x0, [x24, #:lo12:.LANCHOR46]
-	strh	w19, [x0, 126]
-	mov	w0, 0
-	bl	ftl_info_flush
-	strb	wzr, [x20, #:lo12:.LANCHOR104]
-	ldp	x21, x22, [sp, 32]
-	ldp	x19, x20, [sp, 16]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 96
-	b	print_ftl_debug_info
-	.size	do_gc, .-do_gc
-	.section	.text.ftl_write,"ax",@progbits
-	.align	2
-	.global	ftl_write
-	.type	ftl_write, %function
-ftl_write:
-	stp	x29, x30, [sp, -112]!
-	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	mov	x23, x3
-	stp	x25, x26, [sp, 64]
-	mov	w25, w2
-	stp	x19, x20, [sp, 16]
-	stp	x21, x22, [sp, 32]
-	stp	x27, x28, [sp, 80]
-	cbnz	w0, .L2781
-	adrp	x0, .LANCHOR52
-	ldr	w2, [x0, #:lo12:.LANCHOR52]
-	mov	w0, 24576
-.L2782:
-	add	w3, w1, w25
-	cmp	w2, w3
-	bcc	.L2794
-	adrp	x22, .LANCHOR45
-	add	w27, w0, w1
-	sub	w19, w25, #1
-	adrp	x24, .LANCHOR46
-	ldrb	w0, [x22, #:lo12:.LANCHOR45]
-	add	w19, w19, w27
-	add	x22, x22, :lo12:.LANCHOR45
-	udiv	w21, w27, w0
-	udiv	w19, w19, w0
-	add	w0, w27, w25
-	str	w0, [x29, 108]
-	mov	w28, w21
-	sub	w20, w19, w21
-	add	w20, w20, 1
-.L2784:
-	cbnz	w20, .L2792
-	bl	ftl_write_commit
-	mov	w0, 0
+	mov	x0, x19
+	bl	sblk_read_page
+	ldr	w3, [x19, 52]
+	ldr	x0, [x19, 24]
+	cmp	w3, 256
+	ccmn	w3, #1, 4, ne
+	beq	.L2561
+	ldr	w1, [x0, 4]
+	cmp	w20, w1
+	beq	.L2562
+.L2561:
+	ldr	x1, [x19, 8]
+	add	x27, x24, :lo12:.LC140
+	adrp	x25, .LANCHOR52
+	adrp	x26, .LC141
+	adrp	x22, .LANCHOR117
+	ldr	w2, [x1, 4]
+	str	w2, [sp, 8]
+	ldr	w1, [x1]
+	str	w1, [sp]
+	mov	w1, w20
+	ldp	w4, w5, [x0]
+	ldp	w6, w7, [x0, 8]
+	mov	x0, x27
+	ldr	w2, [x19, 40]
+	bl	printf
+	ldr	x1, [x19, 24]
+	ldr	w0, [x1, 8]
+	cmn	w0, #1
+	bne	.L2563
+.L2565:
+	ldrb	w21, [x25, #:lo12:.LANCHOR52]
+	mov	w0, w20
+	bl	lpa_hash_get_ppa
+	add	x22, x22, :lo12:.LANCHOR117
+	mov	w4, w0
+	add	x0, x26, :lo12:.LC141
+	lsl	w27, w21, 7
+	ubfiz	w3, w21, 7, 9
+	sub	w3, w3, #1
+	add	x21, x22, 8
+	and	w3, w3, w20
+	adrp	x26, .LC143
+	sdiv	w27, w20, w27
+	and	w3, w3, 65535
+	add	x22, x22, 520
+	add	x26, x26, :lo12:.LC143
+	mov	w1, w20
+	and	w25, w27, 65535
+	mov	w2, w25
+	bl	printf
+	mov	w2, 0
+	add	x1, x29, 140
+	mov	w0, w20
+	bl	pm_log2phys
+.L2564:
+	ldr	x1, [x21]
+	cbz	x1, .L2569
+	ldrh	w0, [x21, -8]
+	cmp	w0, w25
+	bne	.L2569
+	mov	w3, 4096
+	mov	w2, 4
+	mov	x0, x26
+	bl	rknand_print_hex
+.L2569:
+	add	x21, x21, 16
+	cmp	x22, x21
+	bne	.L2564
+	b	.L2562
+.L2563:
+	ldr	w21, [x1, 4]
+	ldr	w1, [x28]
+	cmp	w21, w1
+	bcs	.L2565
+	str	w0, [x19, 40]
 	mov	w1, 1
-	bl	do_gc
-	mov	w0, 0
-.L2780:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
+	mov	x0, x19
+	bl	sblk_read_page
+	ldr	x1, [x19, 8]
+	ldr	x0, [x19, 24]
+	ldr	w2, [x1, 4]
+	str	w2, [sp, 8]
+	ldr	w1, [x1]
+	str	w1, [sp]
+	mov	w1, w20
+	ldp	w4, w5, [x0]
+	ldp	w6, w7, [x0, 8]
+	mov	x0, x27
+	ldr	w2, [x19, 40]
+	ldr	w3, [x19, 52]
+	bl	printf
+	mov	w0, w21
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 140]
+	cmn	w0, #1
+	bne	.L2566
+	mov	w2, 0
+	add	x1, x29, 140
+	mov	w0, w21
+	bl	pm_log2phys
+.L2566:
+	ldr	w0, [x29, 140]
+	mov	w1, 1
+	str	w0, [x19, 40]
+	mov	x0, x19
+	bl	sblk_read_page
+	ldr	x1, [x19, 8]
+	ldr	x0, [x19, 24]
+	ldr	w2, [x1, 4]
+	str	w2, [sp, 8]
+	ldr	w1, [x1]
+	str	w1, [sp]
+	mov	w1, w21
+	ldp	w4, w5, [x0]
+	ldp	w6, w7, [x0, 8]
+	ldr	w2, [x19, 40]
+	ldr	w3, [x19, 52]
+	ldr	x0, [x29, 120]
+	bl	printf
+	ldrb	w3, [x25, #:lo12:.LANCHOR52]
+	mov	w0, w21
+	str	w3, [x29, 104]
+	lsl	w2, w3, 7
+	udiv	w2, w21, w2
+	and	w27, w2, 65535
+	str	w2, [x29, 112]
+	bl	lpa_hash_get_ppa
+	mov	w4, w0
+	ldr	w3, [x29, 104]
+	mov	w1, w21
+	ldr	w2, [x29, 112]
+	add	x0, x26, :lo12:.LC141
+	ubfiz	w3, w3, 7, 9
+	and	w2, w2, 65535
+	sub	w3, w3, #1
+	and	w3, w3, w21
+	and	w3, w3, 65535
+	bl	printf
+	mov	w0, w21
+	mov	w2, 0
+	add	x1, x29, 140
+	bl	pm_log2phys
+	add	x0, x22, :lo12:.LANCHOR117
+	adrp	x5, .LC142
+	add	x21, x0, 8
+	add	x4, x0, 520
+	add	x5, x5, :lo12:.LC142
+.L2568:
+	ldr	x1, [x21]
+	cbz	x1, .L2567
+	ldrh	w0, [x21, -8]
+	cmp	w0, w27
+	bne	.L2567
+	mov	x0, x5
+	stp	x4, x5, [x29, 104]
+	mov	w3, 4096
+	mov	w2, 4
+	bl	rknand_print_hex
+	ldp	x4, x5, [x29, 104]
+.L2567:
+	add	x21, x21, 16
+	cmp	x4, x21
+	bne	.L2568
+	b	.L2565
+	.size	ftl_scan_all_data, .-ftl_scan_all_data
+	.section	.text.ftl_update_l2p_map,"ax",@progbits
+	.align	2
+	.global	ftl_update_l2p_map
+	.type	ftl_update_l2p_map, %function
+ftl_update_l2p_map:
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	mov	x22, x0
+	stp	x23, x24, [sp, 48]
+	adrp	x0, .LANCHOR80
+	stp	x19, x20, [sp, 16]
+	adrp	x24, .LANCHOR105
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	ldrh	w23, [x0, #:lo12:.LANCHOR80]
+	ldrb	w0, [x22, 9]
+	ldrh	w19, [x22, 12]
+	str	x24, [x29, 104]
+	mul	w23, w23, w0
+	ldr	x0, [x24, #:lo12:.LANCHOR105]
+	add	x19, x0, x19, lsl 2
+	add	x0, x19, x23, sxtw 2
+	ldr	w0, [x0, -4]
+	cmn	w0, #1
+	bne	.L2581
+	adrp	x27, .LANCHOR52
+	mov	x28, 0
+	add	x0, x27, :lo12:.LANCHOR52
+	mov	w21, 0
+	str	x0, [x29, 96]
+.L2582:
+	cmp	w28, w23
+	blt	.L2590
+	adrp	x0, .LANCHOR29
+	adrp	x19, .LANCHOR4
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 12, .L2591
+	ldrh	w1, [x22]
+	ldr	x2, [x19, #:lo12:.LANCHOR4]
+	ubfiz	x0, x1, 1, 16
+	ldrh	w3, [x2, x0]
+	adrp	x0, .LC147
+	mov	w2, w21
+	add	x0, x0, :lo12:.LC147
+	bl	printf
+.L2591:
+	ldrh	w1, [x22]
+	ldr	x0, [x19, #:lo12:.LANCHOR4]
 	ldp	x23, x24, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	strh	w21, [x0, x1, lsl 1]
 	ldp	x25, x26, [sp, 64]
+	ldp	x21, x22, [sp, 32]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 112
+	ldp	x29, x30, [sp], 128
 	ret
-.L2781:
-	cmp	w0, 3
-	bhi	.L2794
-	lsl	w0, w0, 13
-	mov	w2, 8192
-	b	.L2782
-.L2792:
-	mov	w0, 0
-	bl	buf_alloc
-	mov	x26, x0
-	cbnz	x0, .L2785
-	bl	ftl_write_commit
-	b	.L2784
-.L2785:
-	strb	wzr, [x0, 57]
-	cmp	w28, w21
-	ldrb	w0, [x22]
-	ccmp	w28, w19, 4, ne
-	strb	w0, [x26, 56]
-	bne	.L2788
-	cmp	w28, w21
-	bne	.L2789
-	udiv	w1, w27, w0
-	msub	w1, w1, w0, w27
-	and	w1, w1, 255
-	strb	w1, [x26, 57]
-	sub	w0, w0, w1
-	and	w0, w0, 255
-	cmp	w25, w0
-	csel	w0, w25, w0, cc
-.L2796:
-	strb	w0, [x26, 56]
-.L2788:
-	ldr	x3, [x26, 8]
-	mov	x1, x23
-	ldrb	w0, [x26, 57]
-	sub	w20, w20, #1
-	ldrb	w2, [x26, 56]
-	ubfiz	x0, x0, 9, 8
-	lsl	w2, w2, 9
-	add	x0, x3, x0
-	bl	ftl_memcpy
-	ldr	x1, [x24, #:lo12:.LANCHOR46]
-	ldr	w0, [x1, 8]
-	str	w28, [x26, 36]
-	add	w28, w28, 1
-	add	w2, w0, 1
-	str	w2, [x1, 8]
-	str	w0, [x26, 32]
+.L2581:
+	adrp	x1, .LANCHOR188
+	adrp	x0, .LC0
+	mov	w2, 1432
+	add	x1, x1, :lo12:.LANCHOR188
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2583:
+	b	.L2583
+.L2590:
+	ldr	w2, [x19, x28, lsl 2]
+	cmn	w2, #1
+	beq	.L2584
+	ldrb	w20, [x27, #:lo12:.LANCHOR52]
+	adrp	x0, .LANCHOR29
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	lsl	w20, w20, 7
+	udiv	w20, w2, w20
+	and	w20, w20, 65535
+	tbz	x0, 12, .L2585
+	adrp	x0, .LC144
+	mov	w3, w28
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC144
+	bl	printf
+.L2585:
+	adrp	x25, .LANCHOR99
+	adrp	x26, .LC145
+	mov	x24, x28
+	add	x25, x25, :lo12:.LANCHOR99
+	add	x26, x26, :lo12:.LC145
+.L2589:
+	ldr	w1, [x19, x24, lsl 2]
+	cmn	w1, #1
+	beq	.L2586
+	ldr	x0, [x29, 96]
+	ldrb	w2, [x0]
+	lsl	w2, w2, 7
+	udiv	w1, w1, w2
+	cmp	w20, w1, uxth
+	bne	.L2586
+	ldrb	w0, [x22, 9]
+	sdiv	w1, w24, w0
+	msub	w0, w1, w0, w24
+	add	x0, x22, x0, sxtw 1
+	ldrh	w2, [x0, 16]
+	ldrh	w0, [x25]
+	madd	w2, w2, w0, w1
 	mov	x0, x26
-	bl	ftl_write_buf
-	ldrb	w0, [x26, 56]
-	ubfiz	x0, x0, 9, 8
-	add	x23, x23, x0
-	b	.L2784
-.L2789:
-	ldr	w1, [x29, 108]
-	msub	w0, w0, w28, w1
-	b	.L2796
-.L2794:
+	str	w2, [x29, 124]
+	ldr	w1, [x19, x24, lsl 2]
+	bl	pm_ppa_update_check
+	cbz	w0, .L2587
+	ldr	x0, [x29, 104]
+	mov	w3, w23
+	mov	w2, 4
+	ldr	x1, [x0, #:lo12:.LANCHOR105]
+	adrp	x0, .LC146
+	add	x0, x0, :lo12:.LC146
+	bl	rknand_print_hex
+.L2588:
+	b	.L2588
+.L2587:
+	ldr	w0, [x19, x24, lsl 2]
+	add	w21, w21, 1
+	mov	w2, 1
+	add	x1, x29, 124
+	and	w21, w21, 65535
+	bl	pm_log2phys
 	mov	w0, -1
-	b	.L2780
-	.size	ftl_write, .-ftl_write
-	.section	.text.FtlWrite,"ax",@progbits
-	.align	2
-	.global	FtlWrite
-	.type	FtlWrite, %function
-FtlWrite:
-	and	w0, w0, 255
-	b	ftl_write
-	.size	FtlWrite, .-FtlWrite
-	.section	.text.StorageSysDataStore,"ax",@progbits
+	str	w0, [x19, x24, lsl 2]
+.L2586:
+	add	x24, x24, 1
+	cmp	w23, w24
+	bgt	.L2589
+.L2584:
+	add	x28, x28, 1
+	b	.L2582
+	.size	ftl_update_l2p_map, .-ftl_update_l2p_map
+	.section	.text.ftl_alloc_new_data_sblk,"ax",@progbits
 	.align	2
-	.global	StorageSysDataStore
-	.type	StorageSysDataStore, %function
-StorageSysDataStore:
-	mov	x3, x1
-	mov	w2, 1
-	mov	w1, w0
-	mov	w0, 2
-	b	ftl_write
-	.size	StorageSysDataStore, .-StorageSysDataStore
-	.global	g_pm_spare
-	.global	pm_gc_enable
-	.global	pm_last_load_ram_id
-	.global	pm_last_update_ram_id
-	.global	pm_ram_info
-	.global	sblk_gc_write_completed_queue_head
-	.global	sblk_read_completed_queue_head
-	.global	sblk_write_completed_queue_head
-	.global	sblk_queue_head
-	.global	ftl_low_format_cur_blk
-	.global	ftl_power_lost_flag
-	.global	ftl_vpn_update_count
-	.global	ftl_sblk_vpn_update_id
-	.global	ftl_sblk_lpa_tbl
-	.global	ftl_sblk_vpn
-	.global	gp_ftl_ext_info
-	.global	gp_ftl_info
-	.global	gp_blk_info
-	.global	ftl_tmp_spare
-	.global	ftl_info_spare
-	.global	ftl_ext_info_data_buffer
-	.global	ftl_info_data_buffer
-	.global	ftl_tmp_buffer
-	.global	g_ftl_info_blk
-	.global	tlc_prog_order
-	.global	gc_des_ppa_tbl
-	.global	gc_valid_page_ppa
-	.global	gc_page_buf_id
-	.global	gc_pre_ppa_tbl
-	.global	gc_lpa_tbl
-	.global	g_gc_info
-	.global	gc_slc_mode_vpn_th
-	.global	gc_tlc_mode_tlc_vpn_th
-	.global	gc_tlc_mode_slc_vpn_th
-	.global	gc_state
-	.global	gc_mode
-	.global	check_vpc_tbl
-	.global	p_read_ahead_ext_buf
-	.global	read_ahead_lpa
-	.global	write_commit_count
-	.global	write_commit_head
-	.global	write_buf_count
-	.global	write_buf_head
-	.global	ftl_flush_jiffies
-	.global	lpa_hash
-	.global	lpa_hash_index
-	.global	_min_slc_super_block
-	.global	_max_slc_super_block
-	.global	_max_xlc_super_block
-	.global	_c_max_pm_sblk
-	.global	_c_ftl_pm_page_num
-	.global	_c_totle_log_page
-	.global	_c_totle_data_density
-	.global	_c_user_data_density
-	.global	_c_totle_phy_density
-	.global	_c_ftl_block_addr_log2
-	.global	_c_ftl_block_align_addr
-	.global	_c_ftl_byte_pre_page
-	.global	_c_ftl_nand_blks_per_die
-	.global	_c_ftl_page_pre_slc_blk
-	.global	_c_ftl_page_pre_blk
-	.global	_c_ftl_blk_pre_plane
-	.global	_c_ftl_nand_planes_num
-	.global	_c_ftl_planes_per_die
-	.global	_c_ftl_sec_per_page
-	.global	_c_ftl_nand_die_num
-	.global	_c_ftl_nand_type
-	.global	zftl_debug
-	.global	g_flash_blk_info
-	.global	gp_flash_info
-	.global	p_free_buf_head
-	.global	free_buf_count
-	.global	g_buf
-	.global	g_nandc_v6_master_info
-	.global	nandc_randomizer_en
-	.global	nandc_hw_seed
-	.global	fill_spare_size
-	.global	g_nandc_ecc_bits
-	.global	g_nandc_ver
-	.global	gp_nandc
-	.global	hy_f26_ref_value
-	.global	sd15_tlc_rr
-	.global	sd15_slc_rr
-	.global	gNandParaInfo
-	.global	NandFlashParaTbl
-	.global	gpNandParaInfo
-	.global	gNandOptPara
-	.global	g_msb_page_tbl
-	.global	g_lsb_page_tbl
-	.global	g_die_addr
-	.global	g_die_cs_idx
-	.global	IDByte
-	.global	flash_read_retry
-	.global	g_maxRetryCount
-	.global	g_maxRegNum
-	.global	g_retryMode
-	.global	g_flash_toggle_mode_en
-	.global	g_flash_3d_mlc_flag
-	.global	g_flash_3d_tlc_flag
-	.global	g_flash_multi_page_prog_en
-	.global	g_flash_multi_page_read_en
-	.global	g_flash_interface_mode
-	.global	g_idb_ecc_bits
-	.global	g_idb_slc_mode_enable
-	.global	g_slc_mode_addr2
-	.global	g_slc_mode_enable
-	.global	g_flash_cur_mode
-	.global	g_flash_slc_mode
-	.global	g_slc_page_num
-	.global	g_totle_phy_block
-	.global	g_block_align_addr
-	.global	g_flash_reversd_blks
-	.global	g_nand_max_die
-	.global	g_flash_tmp_spare_buffer
-	.global	g_flash_tmp_page_buffer
-	.global	g_flash_sys_spare_buffer
-	.global	g_flash_spare_buffer
-	.global	g_flash_page_buffer
-	.section	.bss.IDByte,"aw",@nobits
+	.global	ftl_alloc_new_data_sblk
+	.type	ftl_alloc_new_data_sblk, %function
+ftl_alloc_new_data_sblk:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	mov	x19, x0
+	bl	ftl_update_l2p_map
+	bl	pm_flush
+	ldrh	w0, [x19]
+	mov	w1, 65535
+	cmp	w0, w1
+	beq	.L2607
+	bl	zftl_insert_data_list
+.L2607:
+	adrp	x0, .LANCHOR5
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	add	x0, x0, 16
+	cmp	x19, x0
+	mov	x0, x19
+	cset	w1, ne
+	add	w1, w1, 2
+	bl	ftl_open_sblk_init
+	bl	ftl_ext_info_flush
+	mov	w0, 0
+	bl	ftl_info_flush
+	bl	lpa_rebuild_hash
+	ldr	x19, [sp, 16]
+	mov	w0, 0
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	ftl_alloc_new_data_sblk, .-ftl_alloc_new_data_sblk
+	.section	.text.ftl_write_commit,"ax",@progbits
 	.align	2
-	.set	.LANCHOR26,. + 0
-	.type	IDByte, %object
-	.size	IDByte, 32
-IDByte:
-	.zero	32
-	.section	.bss._c_ftl_blk_pre_plane,"aw",@nobits
-	.align	1
-	.set	.LANCHOR54,. + 0
-	.type	_c_ftl_blk_pre_plane, %object
-	.size	_c_ftl_blk_pre_plane, 2
-_c_ftl_blk_pre_plane:
-	.zero	2
-	.section	.bss._c_ftl_block_addr_log2,"aw",@nobits
-	.align	1
-	.set	.LANCHOR71,. + 0
-	.type	_c_ftl_block_addr_log2, %object
-	.size	_c_ftl_block_addr_log2, 2
-_c_ftl_block_addr_log2:
-	.zero	2
-	.section	.bss._c_ftl_block_align_addr,"aw",@nobits
-	.align	1
-	.set	.LANCHOR75,. + 0
-	.type	_c_ftl_block_align_addr, %object
-	.size	_c_ftl_block_align_addr, 2
-_c_ftl_block_align_addr:
-	.zero	2
-	.section	.bss._c_ftl_byte_pre_page,"aw",@nobits
-	.align	1
-	.set	.LANCHOR149,. + 0
-	.type	_c_ftl_byte_pre_page, %object
-	.size	_c_ftl_byte_pre_page, 2
-_c_ftl_byte_pre_page:
-	.zero	2
-	.section	.bss._c_ftl_nand_blks_per_die,"aw",@nobits
-	.align	1
-	.type	_c_ftl_nand_blks_per_die, %object
-	.size	_c_ftl_nand_blks_per_die, 2
-_c_ftl_nand_blks_per_die:
-	.zero	2
-	.section	.bss._c_ftl_nand_die_num,"aw",@nobits
-	.set	.LANCHOR76,. + 0
-	.type	_c_ftl_nand_die_num, %object
-	.size	_c_ftl_nand_die_num, 1
-_c_ftl_nand_die_num:
-	.zero	1
-	.section	.bss._c_ftl_nand_planes_num,"aw",@nobits
-	.set	.LANCHOR69,. + 0
-	.type	_c_ftl_nand_planes_num, %object
-	.size	_c_ftl_nand_planes_num, 1
-_c_ftl_nand_planes_num:
-	.zero	1
-	.section	.bss._c_ftl_nand_type,"aw",@nobits
-	.set	.LANCHOR64,. + 0
-	.type	_c_ftl_nand_type, %object
-	.size	_c_ftl_nand_type, 1
-_c_ftl_nand_type:
-	.zero	1
-	.section	.bss._c_ftl_page_pre_blk,"aw",@nobits
-	.align	1
-	.set	.LANCHOR68,. + 0
-	.type	_c_ftl_page_pre_blk, %object
-	.size	_c_ftl_page_pre_blk, 2
-_c_ftl_page_pre_blk:
-	.zero	2
-	.section	.bss._c_ftl_page_pre_slc_blk,"aw",@nobits
-	.align	1
-	.set	.LANCHOR79,. + 0
-	.type	_c_ftl_page_pre_slc_blk, %object
-	.size	_c_ftl_page_pre_slc_blk, 2
-_c_ftl_page_pre_slc_blk:
-	.zero	2
-	.section	.bss._c_ftl_planes_per_die,"aw",@nobits
-	.set	.LANCHOR70,. + 0
-	.type	_c_ftl_planes_per_die, %object
+	.global	ftl_write_commit
+	.type	ftl_write_commit, %function
+ftl_write_commit:
+	stp	x29, x30, [sp, -144]!
+	adrp	x0, .LANCHOR43
+	add	x29, sp, 0
+	stp	x25, x26, [sp, 64]
+	add	x26, x0, :lo12:.LANCHOR43
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	stp	x27, x28, [sp, 80]
+.L2612:
+	adrp	x3, .LANCHOR50
+	ldrb	w1, [x3, #:lo12:.LANCHOR50]
+	cbz	w1, .L2614
+	adrp	x4, .LANCHOR49
+	adrp	x2, .LANCHOR43
+	add	x2, x2, :lo12:.LANCHOR43
+	sub	w1, w1, #1
+	ldrb	w0, [x4, #:lo12:.LANCHOR49]
+	str	x0, [x29, 104]
+	strb	w1, [x3, #:lo12:.LANCHOR50]
+	adrp	x1, .LANCHOR54
+	ubfiz	x27, x0, 6, 8
+	add	x5, x2, x27
+	str	x5, [x29, 120]
+	lsl	x5, x0, 6
+	ldr	w1, [x1, #:lo12:.LANCHOR54]
+	add	x0, x2, x5
+	ldrb	w5, [x2, x5]
+	ldr	w22, [x0, 36]
+	strb	w5, [x4, #:lo12:.LANCHOR49]
+	cmp	w22, w1
+	bcc	.L2616
+	ldr	x0, [x29, 120]
+	bl	buf_free
+	mov	w0, -1
+.L2611:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 144
+	ret
+.L2616:
+	ldrb	w21, [x0, 57]
+	ldrb	w20, [x0, 56]
+	ldr	x24, [x0, 8]
+	ldr	x28, [x0, 24]
+	adrp	x0, .LANCHOR112
+	str	x0, [x29, 112]
+	ldrb	w1, [x0, #:lo12:.LANCHOR112]
+	cbz	w1, .L2618
+	adrp	x0, .LANCHOR151
+	ldrb	w1, [x0, #:lo12:.LANCHOR151]
+	add	x1, x2, x1, lsl 6
+.L2619:
+	ldrb	w0, [x1]
+	cmp	w0, 255
+	bne	.L2620
+	ldr	w0, [x1, 36]
+	cmp	w22, w0
+	bne	.L2618
+	ldr	x0, [x1, 8]
+	ubfiz	x21, x21, 9, 8
+	lsl	w2, w20, 9
+	add	x1, x24, x21
+	add	x0, x0, x21
+	bl	ftl_memcpy
+	ldr	x0, [x29, 120]
+	bl	buf_free
+	b	.L2612
+.L2620:
+	ubfiz	x1, x0, 6, 8
+	add	x1, x26, x1
+	b	.L2619
+.L2618:
+	mov	w0, w22
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 140]
+	cmn	w0, #1
+	bne	.L2622
+	mov	w2, 0
+	add	x1, x29, 140
+	mov	w0, w22
+	bl	pm_log2phys
+.L2622:
+	adrp	x25, .LANCHOR5
+	add	x1, x26, 2
+	mov	w0, 0
+	ldr	x19, [x25, #:lo12:.LANCHOR5]
+	add	x19, x19, 16
+.L2625:
+	ldr	w2, [x1, 34]
+	cmp	w22, w2
+	bne	.L2623
+	ldrb	w2, [x1]
+	tbz	x2, 3, .L2623
+	ubfiz	x0, x0, 6, 32
+	and	w2, w2, -9
+	add	x0, x26, x0
+	strb	w2, [x0, 2]
+	ldr	x23, [x0, 8]
+	ldr	w0, [x0, 40]
+	str	w0, [x29, 140]
+.L2624:
+	adrp	x0, .LANCHOR52
+	str	x0, [x29, 96]
+	ldrb	w1, [x0, #:lo12:.LANCHOR52]
+	cmp	w20, w1
+	bcs	.L2650
+	cbz	x23, .L2627
+	cbz	w21, .L2628
+	lsl	w2, w21, 9
+	mov	x1, x23
+	mov	x0, x24
+	bl	ftl_memcpy
+	ldr	x19, [x25, #:lo12:.LANCHOR5]
+	add	x19, x19, 48
+.L2628:
+	ldr	x0, [x29, 96]
+	add	w20, w21, w20
+	ldrb	w2, [x0, #:lo12:.LANCHOR52]
+	cmp	w20, w2
+	bcc	.L2629
+	ldr	x19, [x25, #:lo12:.LANCHOR5]
+	add	x19, x19, 16
+.L2650:
+	mov	w23, 0
+	b	.L2626
+.L2623:
+	add	w0, w0, 1
+	add	x1, x1, 64
+	cmp	w0, 32
+	bne	.L2625
+	mov	x23, 0
+	b	.L2624
+.L2629:
+	ubfiz	x0, x20, 9, 9
+	sub	w2, w2, w20
+	add	x1, x23, x0
+	lsl	w2, w2, 9
+	add	x0, x24, x0
+	bl	ftl_memcpy
+	b	.L2650
+.L2627:
+	ldr	w0, [x29, 140]
+	cmn	w0, #1
+	beq	.L2630
+	mov	w0, 1
+	bl	buf_alloc
+	ldr	w1, [x29, 140]
+	mov	x27, x0
+	stp	w22, w1, [x0, 36]
+	mov	w1, 1
+	bl	sblk_read_page
+	ldr	x0, [x27, 24]
+	ldr	w23, [x0, 12]
+	ldr	w0, [x0, 4]
+	add	w23, w23, 1
+	cmp	w22, w0
+	bne	.L2631
+	ldr	w0, [x27, 52]
+	cmn	w0, #1
+	bne	.L2632
+.L2631:
+	ldrb	w1, [x27, 1]
+	mov	w3, w22
+	ldr	w4, [x27, 52]
+	adrp	x0, .LC148
+	ldr	w2, [x29, 140]
+	add	x0, x0, :lo12:.LC148
+	bl	printf
+	ldr	x1, [x27, 24]
+	mov	w3, 4
+	adrp	x0, .LC105
+	mov	w2, w3
+	add	x0, x0, :lo12:.LC105
+	bl	rknand_print_hex
+	adrp	x0, .LANCHOR96
+	ldr	w1, [x29, 140]
+	ldrh	w3, [x0, #:lo12:.LANCHOR96]
+	mov	w0, 21
+	sub	w2, w0, w3
+	mov	w0, 1
+	lsr	w1, w1, w3
+	lsl	w0, w0, w2
+	sub	w0, w0, #1
+	and	w0, w0, w1
+	adrp	x1, .LANCHOR95
+	ldrb	w2, [x1, #:lo12:.LANCHOR95]
+	mov	x1, 0
+	udiv	w0, w0, w2
+	bl	ftl_sblk_dump
+.L2632:
+	ldr	x0, [x27, 24]
+	ldr	w0, [x0, 4]
+	cmp	w22, w0
+	bne	.L2633
+	ldr	w0, [x27, 52]
+	cmn	w0, #1
+	bne	.L2634
+.L2633:
+	adrp	x1, .LANCHOR189
+	adrp	x0, .LC0
+	mov	w2, 497
+	add	x1, x1, :lo12:.LANCHOR189
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2635:
+	b	.L2635
+.L2634:
+	cbz	w21, .L2636
+	ldr	w0, [x29, 140]
+	lsl	w2, w21, 9
+	cmn	w0, #1
+	beq	.L2637
+	ldr	x1, [x27, 8]
+	mov	x0, x24
+	bl	ftl_memcpy
+.L2638:
+	ldr	x19, [x25, #:lo12:.LANCHOR5]
+	add	x19, x19, 48
+.L2636:
+	ldr	x0, [x29, 96]
+	add	w20, w21, w20
+	ldrb	w2, [x0, #:lo12:.LANCHOR52]
+	cmp	w20, w2
+	bcc	.L2639
+	ldr	x19, [x25, #:lo12:.LANCHOR5]
+	add	x19, x19, 16
+.L2640:
+	cbz	x27, .L2626
+	ldrb	w0, [x27, 2]
+	mov	x1, x27
+	and	w0, w0, -9
+	strb	w0, [x27, 2]
+	adrp	x0, .LANCHOR58
+	add	x0, x0, :lo12:.LANCHOR58
+	bl	buf_remove_buf
+	mov	x0, x27
+	bl	buf_free
+.L2626:
+	ldrh	w0, [x19, 6]
+	cbnz	w0, .L2642
+	bl	ftl_flush
+	mov	x0, x19
+	bl	ftl_alloc_new_data_sblk
+.L2642:
+	mov	x0, x19
+	bl	ftl_get_new_free_page
+	ldr	x1, [x29, 104]
+	adrp	x20, .LANCHOR151
+	lsl	x2, x1, 6
+	add	x1, x26, x2
+	ldr	w3, [x1, 32]
+	stp	w3, w22, [x28]
+	str	w23, [x28, 12]
+	ldr	w3, [x29, 140]
+	str	w3, [x28, 8]
+	stp	w0, w3, [x1, 40]
+	mov	w0, -1
+	strb	w0, [x26, x2]
+	mov	w2, 10
+	ldrb	w0, [x1, 2]
+	orr	w0, w0, w2
+	ldrh	w2, [x19, 12]
+	strb	w0, [x1, 2]
+	ldrh	w0, [x19, 10]
+	add	w0, w0, w2
+	sub	w0, w0, #1
+	strh	w0, [x1, 48]
+	ldr	x1, [x29, 120]
+	add	x0, x20, :lo12:.LANCHOR151
+	bl	buf_add_tail
+	ldr	x0, [x29, 112]
+	ldrb	w2, [x0, #:lo12:.LANCHOR112]
+	add	w2, w2, 1
+	and	w2, w2, 255
+	strb	w2, [x0, #:lo12:.LANCHOR112]
+	adrp	x0, .LANCHOR190
+	cmp	w2, 2
+	str	wzr, [x0, #:lo12:.LANCHOR190]
+	ldrh	w0, [x19, 6]
+	bhi	.L2643
+	cmp	w0, 1
+	bne	.L2615
+.L2643:
+	ldrb	w1, [x19, 5]
+	cmp	w1, 0
+	mov	w1, 0
+	cset	w4, ne
+	cmp	w0, 1
+	ldrb	w0, [x20, #:lo12:.LANCHOR151]
+	csinc	w4, w2, w4, eq
+	mov	w3, w0
+.L2647:
+	cmp	w1, w4
+	bne	.L2648
+	strb	w3, [x20, #:lo12:.LANCHOR151]
+	and	w1, w1, 255
+	ldr	x3, [x29, 112]
+	sub	w2, w2, w1
+	ubfiz	x0, x0, 6, 8
+	add	x0, x26, x0
+	strb	w2, [x3, #:lo12:.LANCHOR112]
+	bl	sblk_prog_page
+	ldrh	w0, [x19, 6]
+	cmp	w0, 1
+	bne	.L2615
+	bl	sblk_wait_write_queue_completed
+	bl	ftl_write_completed
+	mov	x0, x19
+	bl	ftl_write_last_log_page
+	mov	x0, x19
+	bl	ftl_alloc_new_data_sblk
+.L2615:
+	adrp	x0, .LANCHOR50
+	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	cbnz	w0, .L2612
+.L2614:
+	bl	ftl_write_completed
+	mov	w0, 0
+	b	.L2611
+.L2639:
+	ldr	w0, [x29, 140]
+	sub	w2, w2, w20
+	lsl	w2, w2, 9
+	ubfiz	x20, x20, 7, 9
+	cmn	w0, #1
+	beq	.L2641
+	ldr	x1, [x27, 8]
+	lsl	x20, x20, 2
+	add	x0, x24, x20
+	add	x1, x1, x20
+	bl	ftl_memcpy
+	b	.L2640
+.L2641:
+	mov	w1, 0
+	add	x0, x24, x20, lsl 2
+	bl	ftl_memset
+	b	.L2640
+.L2648:
+	ubfiz	x3, x3, 6, 8
+	add	w1, w1, 1
+	ldrb	w3, [x26, x3]
+	b	.L2647
+.L2649:
+	lsl	w2, w21, 9
+	mov	x27, 0
+	mov	w23, 0
+.L2637:
+	mov	w1, 0
+	mov	x0, x24
+	bl	ftl_memset
+	b	.L2638
+.L2630:
+	cbnz	w21, .L2649
+	mov	w23, 0
+	mov	x27, 0
+	b	.L2636
+	.size	ftl_write_commit, .-ftl_write_commit
+	.section	.text.gc_do_copy_back,"ax",@progbits
+	.align	2
+	.global	gc_do_copy_back
+	.type	gc_do_copy_back, %function
+gc_do_copy_back:
+	sub	sp, sp, #224
+	adrp	x0, .LANCHOR70
+	stp	x29, x30, [sp, 16]
+	add	x29, sp, 16
+	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	stp	x19, x20, [sp, 32]
+	stp	x21, x22, [sp, 48]
+	stp	x23, x24, [sp, 64]
+	stp	x25, x26, [sp, 80]
+	stp	x27, x28, [sp, 96]
+	cbnz	w0, .L2673
+	bl	buf_alloc
+	mov	x19, x0
+	cbz	x0, .L2672
+	adrp	x20, .LANCHOR63
+	add	x3, x20, :lo12:.LANCHOR63
+	ldrh	w2, [x3, 26]
+	mov	w0, w2
+	bl	gc_get_src_ppa_from_index
+	add	w2, w2, 1
+	mov	w22, w0
+	str	w22, [x19, 40]
+	strh	w2, [x3, 26]
+	mov	w1, 1
+	mov	x0, x19
+	bl	sblk_read_page
+	ldr	w0, [x19, 52]
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	bne	.L2675
+	adrp	x0, .LANCHOR96
+	ldrh	w1, [x0, #:lo12:.LANCHOR96]
+	mov	w0, 21
+	sub	w2, w0, w1
+	mov	w0, 1
+	lsr	w1, w22, w1
+	lsl	w0, w0, w2
+	sub	w0, w0, #1
+	and	w0, w0, w1
+	adrp	x1, .LANCHOR95
+	ldrb	w2, [x1, #:lo12:.LANCHOR95]
+	mov	x1, 0
+	udiv	w0, w0, w2
+	bl	ftl_sblk_dump
+.L2675:
+	ldr	w0, [x19, 52]
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	bne	.L2676
+	adrp	x1, .LANCHOR191
+	adrp	x0, .LC0
+	mov	w2, 573
+	add	x1, x1, :lo12:.LANCHOR191
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2677:
+	b	.L2677
+.L2676:
+	ldr	x0, [x19, 24]
+	ldr	w21, [x0, 4]
+	mov	w0, w21
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 160]
+	cmn	w0, #1
+	bne	.L2678
+	mov	w2, 0
+	add	x1, x29, 160
+	mov	w0, w21
+	bl	pm_log2phys
+.L2678:
+	ldr	w23, [x29, 160]
+	cmp	w22, w23
+	bne	.L2679
+	adrp	x0, .LANCHOR43
+	add	x0, x0, :lo12:.LANCHOR43
+	add	x1, x0, 2
+	add	x0, x0, 2050
+.L2682:
+	ldr	w2, [x1, 34]
+	cmp	w21, w2
+	bne	.L2680
+	ldrb	w2, [x1]
+	tbz	x2, 1, .L2680
+	mov	x0, x19
+	bl	buf_free
+	adrp	x0, .LANCHOR29
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 8, .L2672
+	add	x20, x20, :lo12:.LANCHOR63
+	adrp	x0, .LC149
+	mov	w2, w22
+	mov	w1, w21
+	add	x0, x0, :lo12:.LC149
+	ldrh	w3, [x20, 26]
+	bl	printf
+.L2672:
+	ldp	x19, x20, [sp, 32]
+	ldp	x21, x22, [sp, 48]
+	ldp	x23, x24, [sp, 64]
+	ldp	x25, x26, [sp, 80]
+	ldp	x27, x28, [sp, 96]
+	ldp	x29, x30, [sp, 16]
+	add	sp, sp, 224
+	ret
+.L2680:
+	add	x1, x1, 64
+	cmp	x0, x1
+	bne	.L2682
+	adrp	x0, .LANCHOR52
+	mov	w1, 10
+	strb	wzr, [x19, 57]
+	ldrb	w0, [x0, #:lo12:.LANCHOR52]
+	strb	w0, [x19, 56]
+	ldrb	w0, [x19, 2]
+	str	w21, [x19, 36]
+	orr	w0, w0, w1
+	strb	w0, [x19, 2]
+	ldr	x0, [x19, 24]
+	ldr	w0, [x0]
+	str	w0, [x19, 32]
+	adrp	x0, .LANCHOR29
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 8, .L2683
+	mov	w0, w21
+	bl	lpa_hash_get_ppa
+	add	x1, x20, :lo12:.LANCHOR63
+	mov	w3, w0
+	mov	w4, w22
+	adrp	x0, .LC150
+	mov	w2, w23
+	add	x0, x0, :lo12:.LC150
+	ldrh	w5, [x1, 26]
+	mov	w1, w21
+	bl	printf
+.L2683:
+	mov	x0, x19
+	bl	ftl_gc_write_buf
+	bl	ftl_write_commit
+	add	x20, x20, :lo12:.LANCHOR63
+	adrp	x0, .LANCHOR53
+	ldr	x1, [x0, #:lo12:.LANCHOR53]
+	ldr	w0, [x1, 60]
+	add	w0, w0, 1
+	str	w0, [x1, 60]
+	ldrh	w0, [x20, 28]
+	add	w0, w0, 1
+	strh	w0, [x20, 28]
+	b	.L2672
+.L2679:
+	adrp	x0, .LANCHOR29
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 8, .L2684
+	add	x20, x20, :lo12:.LANCHOR63
+	mov	w0, w21
+	bl	lpa_hash_get_ppa
+	mov	w3, w0
+	mov	w4, w22
+	adrp	x0, .LC150
+	ldrh	w5, [x20, 26]
+	mov	w2, w23
+	mov	w1, w21
+	add	x0, x0, :lo12:.LC150
+	bl	printf
+.L2684:
+	mov	x0, x19
+	bl	buf_free
+	b	.L2672
+.L2673:
+	adrp	x1, .LANCHOR5
+	adrp	x0, .LANCHOR67
+	stp	x0, x1, [x29, 128]
+	adrp	x24, .LANCHOR63
+	ldr	x22, [x1, #:lo12:.LANCHOR5]
+	ldrb	w25, [x0, #:lo12:.LANCHOR67]
+	add	x22, x22, 80
+	cmp	w25, 3
+	bne	.L2685
+	adrp	x0, .LANCHOR69
+	ldrb	w0, [x0, #:lo12:.LANCHOR69]
+	cbz	w0, .L2686
+	add	x0, x24, :lo12:.LANCHOR63
+	ldrb	w19, [x22, 9]
+	ldrh	w20, [x0, 314]
+	add	w21, w19, w19, lsl 1
+	sub	w19, w19, w19, lsl 2
+	sdiv	w21, w20, w21
+	madd	w19, w21, w19, w20
+	and	w19, w19, 65535
+.L2687:
+	adrp	x1, .LANCHOR71
+	ldrb	w0, [x22, 9]
+	add	x4, x24, :lo12:.LANCHOR63
+	mov	w2, 0
+	ldrh	w3, [x1, #:lo12:.LANCHOR71]
+	mul	w8, w25, w0
+	ldrh	w10, [x4, 24]
+	mul	w3, w3, w0
+	adrp	x0, .LANCHOR132
+	ldr	x7, [x0, #:lo12:.LANCHOR132]
+	sub	w3, w3, #1
+.L2690:
+	cmp	w2, w8
+	blt	.L2692
+.L2720:
+	mov	w23, 1
+	b	.L2688
+.L2686:
+	add	x0, x24, :lo12:.LANCHOR63
+	ldrb	w20, [x22, 9]
+	ldrh	w1, [x0, 314]
+	adrp	x0, .LANCHOR192
+	add	x0, x0, :lo12:.LANCHOR192
+	sdiv	w19, w1, w20
+	ldrh	w23, [x0, w19, sxtw 1]
+	msub	w19, w19, w20, w1
+	and	w19, w19, 65535
+	lsr	w21, w23, 3
+	and	w23, w23, 7
+	cmp	w23, 1
+	madd	w20, w21, w20, w19
+	add	w20, w20, w20, lsl 1
+	and	w20, w20, 65535
+	beq	.L2687
+.L2688:
+	adrp	x0, .LANCHOR29
+	str	x0, [x29, 112]
+	ldr	w1, [x0, #:lo12:.LANCHOR29]
+	tbz	x1, 8, .L2693
+	adrp	x0, .LANCHOR132
+	ubfiz	x1, x20, 2, 16
+	mov	w6, w20
+	mov	w3, w19
+	ldr	x2, [x0, #:lo12:.LANCHOR132]
+	add	x0, x24, :lo12:.LANCHOR63
+	ldrh	w4, [x0, 314]
+	adrp	x0, .LC151
+	ldr	w5, [x2, x1]
+	add	x0, x0, :lo12:.LC151
+	mov	w2, w23
+	mov	w1, w21
+	bl	printf
+.L2693:
+	adrp	x0, .LANCHOR43
+	str	wzr, [x29, 152]
+	add	x0, x0, :lo12:.LANCHOR43
+	str	x0, [x29, 120]
+.L2694:
+	ldrb	w2, [x22, 9]
+	ldr	w0, [x29, 152]
+	ldrh	w26, [x29, 152]
+	and	w0, w0, 65535
+	str	w0, [x29, 156]
+	mul	w1, w25, w2
+	cmp	w0, w1
+	blt	.L2707
+	ldr	x0, [x29, 128]
+	ldrb	w0, [x0, #:lo12:.LANCHOR67]
+	cmp	w0, 3
+	add	x0, x29, 160
+	beq	.L2708
+	sub	w3, w1, #1
+	mov	w2, 0
+.L2709:
+	cmp	w2, w3
+	blt	.L2715
+	ldr	x0, [x0, w3, sxtw 3]
+	mov	w2, -1
+	strb	w2, [x0]
+	ldr	x0, [x29, 160]
+	bl	sblk_prog_page
+	b	.L2714
+.L2685:
+	adrp	x0, .LANCHOR98
+	ldrb	w0, [x0, #:lo12:.LANCHOR98]
+	cbnz	w0, .L2689
+	add	x0, x24, :lo12:.LANCHOR63
+	ldrb	w19, [x22, 9]
+	mov	w25, 1
+	ldrh	w20, [x0, 314]
+	sdiv	w21, w20, w19
+	msub	w19, w21, w19, w20
+	and	w19, w19, 65535
+	b	.L2687
+.L2689:
+	add	x0, x24, :lo12:.LANCHOR63
+	ldrb	w19, [x22, 9]
+	mov	w25, 2
+	ldrh	w20, [x0, 314]
+	sdiv	w21, w20, w19
+	msub	w19, w21, w19, w20
+	and	w19, w19, 65535
+	b	.L2687
+.L2692:
+	add	w5, w20, w2
+	cmp	w5, w3
+	beq	.L2720
+	sbfiz	x5, x5, 2, 32
+	ldr	w0, [x7, x5]
+	cmn	w0, #1
+	bne	.L2691
+	ldrh	w6, [x4, 26]
+	cmp	w6, w10
+	bcs	.L2672
+	mov	w0, w6
+	bl	gc_get_src_ppa_from_index
+	add	w6, w6, 1
+	strh	w6, [x4, 26]
+	str	w0, [x7, x5]
+.L2691:
+	add	w2, w2, 1
+	and	w2, w2, 65535
+	b	.L2690
+.L2707:
+	ldr	w0, [x29, 156]
+	add	w0, w20, w0
+	str	w0, [x29, 144]
+	sxtw	x27, w0
+	adrp	x0, .LANCHOR68
+	ldr	x0, [x0, #:lo12:.LANCHOR68]
+	ldrb	w0, [x0, x27]
+	cmp	w0, 255
+	bne	.L2695
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x28, x0
+	cbnz	x0, .L2696
+	bl	sblk_wait_write_queue_completed
+	bl	ftl_write_completed
+	bl	gc_write_completed
+	bl	gc_free_temp_buf
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x28, x0
+	cbz	x0, .L2672
+.L2696:
+	adrp	x0, .LANCHOR68
+	ldrb	w1, [x28, 1]
+	adrp	x5, .LANCHOR71
+	adrp	x6, .LANCHOR132
+	ldr	x0, [x0, #:lo12:.LANCHOR68]
+	strb	w1, [x0, x27]
+	add	x1, x24, :lo12:.LANCHOR63
+	strb	w23, [x28, 61]
+	ldrh	w7, [x5, #:lo12:.LANCHOR71]
+	ldrb	w0, [x1, 7]
+	add	w0, w0, 1
+	strb	w0, [x1, 7]
+	add	w0, w26, w20
+	strh	w0, [x28, 48]
+	ldr	w1, [x29, 144]
+	ldrb	w0, [x22, 9]
+	mul	w0, w0, w7
+	sub	w0, w0, #1
+	cmp	w1, w0
+	bne	.L2697
+	adrp	x0, .LANCHOR131
+	adrp	x4, .LANCHOR72
+	stp	x6, x5, [x29, 96]
+	ldr	x1, [x0, #:lo12:.LANCHOR131]
+	mov	w0, -1
+	str	x4, [x29, 144]
+	str	w0, [x1, x27, lsl 2]
+	ldr	x0, [x28, 8]
+	ldrb	w2, [x4, #:lo12:.LANCHOR72]
+	mul	w2, w2, w7
+	lsl	w2, w2, 2
+	bl	ftl_memcpy
+	ldp	x6, x5, [x29, 96]
+	ldr	x4, [x29, 144]
+	ldr	x7, [x28, 8]
+	ldrh	w0, [x5, #:lo12:.LANCHOR71]
+	ldrb	w1, [x4, #:lo12:.LANCHOR72]
+	mul	w0, w0, w1
+	ldr	x1, [x6, #:lo12:.LANCHOR132]
+	lsl	w2, w0, 2
+	add	x0, x7, x0, sxtw 2
+	bl	ftl_memcpy
+	adrp	x0, .LANCHOR52
+	mov	w1, 0
+	ldrb	w2, [x0, #:lo12:.LANCHOR52]
+	ldr	x0, [x28, 24]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	ldr	x6, [x28, 24]
+	mov	w0, 15555
+	ldr	x5, [x29, 104]
+	movk	w0, 0xf55f, lsl 16
+	ldr	x4, [x29, 144]
+	ldrh	w1, [x5, #:lo12:.LANCHOR71]
+	str	w0, [x6]
+	ldrb	w0, [x4, #:lo12:.LANCHOR72]
+	mul	w1, w1, w0
+	ldr	x0, [x28, 8]
+	lsl	w1, w1, 2
+	bl	js_hash
+	str	w0, [x6, 4]
+	ldr	x0, [x29, 136]
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	ldr	w0, [x0, 132]
+	str	w0, [x6, 8]
+.L2695:
+	adrp	x0, .LANCHOR68
+	ldr	w5, [x29, 156]
+	add	x3, x29, 160
+	ldr	x4, [x0, #:lo12:.LANCHOR68]
+	adrp	x0, .LANCHOR43
+	add	x2, x0, :lo12:.LANCHOR43
+	ldrb	w1, [x4, x27]
+	ubfiz	x0, x1, 6, 8
+	add	x0, x2, x0
+	add	x2, x2, x1, lsl 6
+	str	x0, [x3, w5, sxtw 3]
+	mov	w0, 2
+	adrp	x5, .LANCHOR133
+	strh	w0, [x2, 50]
+	ldr	x0, [x29, 128]
+	strb	w23, [x2, 61]
+	ldrb	w0, [x0, #:lo12:.LANCHOR67]
+	cmp	w0, 3
+	bne	.L2702
+	udiv	w0, w26, w0
+	adrp	x6, .LANCHOR99
+	ldrh	w6, [x6, #:lo12:.LANCHOR99]
+	add	w3, w0, w19
+	add	w0, w0, w0, lsl 1
+	add	x3, x22, x3, sxtw 1
+	sub	w0, w26, w0
+	and	w0, w0, 65535
+	add	w0, w0, 1
+	ldrh	w3, [x3, 16]
+	mul	w3, w3, w6
+	ldrh	w6, [x2, 48]
+	orr	w3, w3, w21
+	str	w3, [x2, 40]
+	ldr	x2, [x5, #:lo12:.LANCHOR133]
+	orr	w0, w3, w0, lsl 24
+	str	w0, [x2, x6, lsl 2]
+.L2703:
+	ldr	x0, [x29, 112]
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 8, .L2706
+	ldr	x0, [x29, 120]
+	mov	w2, w23
+	ldrb	w4, [x4, x27]
+	add	x1, x0, x1, lsl 6
+	add	x0, x24, :lo12:.LANCHOR63
+	ldrb	w3, [x0, 6]
+	ldr	x0, [x1, 24]
+	ldrb	w7, [x1, 1]
+	ldrh	w6, [x1, 48]
+	ldr	w0, [x0, 4]
+	str	w0, [sp, 8]
+	mov	w0, 3
+	udiv	w26, w26, w0
+	adrp	x0, .LC152
+	add	x0, x0, :lo12:.LC152
+	add	w26, w26, w19
+	str	w26, [sp]
+	ldr	w5, [x1, 40]
+	ldr	w1, [x29, 156]
+	bl	printf
+.L2706:
+	ldr	w0, [x29, 152]
+	add	w0, w0, 1
+	str	w0, [x29, 152]
+	b	.L2694
+.L2697:
+	ldr	x0, [x6, #:lo12:.LANCHOR132]
+	lsl	x4, x27, 2
+	mov	w1, 1
+	str	x4, [x29, 144]
+	ldr	w0, [x0, x4]
+	str	w0, [x28, 40]
+	mov	x0, x28
+	bl	sblk_read_page
+	ldr	w0, [x28, 52]
+	ldr	x4, [x29, 144]
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	bne	.L2699
+	adrp	x0, .LANCHOR96
+	ldr	w1, [x28, 40]
+	ldrh	w5, [x0, #:lo12:.LANCHOR96]
+	mov	w0, 21
+	sub	w2, w0, w5
+	mov	w0, 1
+	lsr	w1, w1, w5
+	lsl	w0, w0, w2
+	sub	w0, w0, #1
+	and	w0, w0, w1
+	adrp	x1, .LANCHOR95
+	ldrb	w2, [x1, #:lo12:.LANCHOR95]
+	mov	x1, 0
+	udiv	w0, w0, w2
+	bl	ftl_sblk_dump
+	ldr	w0, [x28, 52]
+	ldr	x4, [x29, 144]
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	bne	.L2699
+	ldr	x0, [x28, 24]
+	mov	w1, -1
+	str	w1, [x0, 4]
+	ldr	w0, [x28, 52]
+	cmp	w0, 512
+	ccmp	w0, w1, 4, ne
+	bne	.L2699
+	adrp	x1, .LANCHOR191
+	adrp	x0, .LC0
+	mov	w2, 688
+	add	x1, x1, :lo12:.LANCHOR191
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2700:
+	b	.L2700
+.L2699:
+	ldr	x0, [x28, 24]
+	adrp	x1, .LANCHOR54
+	ldr	w1, [x1, #:lo12:.LANCHOR54]
+	ldr	w2, [x0, 4]
+	cmp	w2, w1
+	bcc	.L2701
+	mov	w1, -1
+	str	w1, [x0, 4]
+.L2701:
+	adrp	x1, .LANCHOR131
+	ldr	w2, [x0, 4]
+	ldr	x1, [x1, #:lo12:.LANCHOR131]
+	str	w2, [x1, x4]
+	ldr	w1, [x28, 40]
+	str	w1, [x0, 8]
+	b	.L2695
+.L2702:
+	cmp	w0, 2
+	bne	.L2704
+	adrp	x0, .LANCHOR98
+	adrp	x3, .LANCHOR99
+	ldrb	w0, [x0, #:lo12:.LANCHOR98]
+	cbnz	w0, .L2705
+	ldr	w0, [x29, 156]
+	ldrh	w3, [x3, #:lo12:.LANCHOR99]
+	add	w0, w19, w0
+	add	x0, x22, x0, sxtw 1
+	ldrh	w0, [x0, 16]
+	madd	w0, w0, w3, w21
+.L2763:
+	orr	w0, w0, 33554432
+	str	w0, [x2, 40]
+.L2704:
+	ldr	x0, [x29, 120]
+	add	x0, x0, x1, lsl 6
+	ldrh	w2, [x0, 48]
+	ldr	w3, [x0, 40]
+	ldr	x0, [x5, #:lo12:.LANCHOR133]
+	str	w3, [x0, x2, lsl 2]
+	b	.L2703
+.L2705:
+	add	w0, w19, w26, lsr 1
+	ldrh	w3, [x3, #:lo12:.LANCHOR99]
+	add	x0, x22, x0, sxtw 1
+	ldrh	w0, [x0, 16]
+	madd	w0, w0, w3, w21
+	and	w3, w26, 1
+	add	w0, w0, w3
+	b	.L2763
+.L2708:
+	adrp	x1, .LANCHOR69
+	ldrb	w3, [x1, #:lo12:.LANCHOR69]
+	ldr	x1, [x29, 160]
+	cbz	w3, .L2710
+.L2713:
+	strb	wzr, [x1, 60]
+	b	.L2711
+.L2710:
+	cmp	w23, 1
+	bne	.L2712
+	mov	w3, 9
+.L2762:
+	strb	w3, [x1, 60]
+.L2711:
+	add	x1, x0, 24
+	bl	sblk_xlc_prog_pages
+.L2714:
+	adrp	x1, .LANCHOR69
+	ldrb	w3, [x22, 9]
+	ldrb	w1, [x1, #:lo12:.LANCHOR69]
+	and	w0, w3, 65535
+	cbz	w1, .L2716
+	add	w0, w0, w0, lsl 1
+.L2717:
+	adrp	x1, .LANCHOR53
+	add	x24, x24, :lo12:.LANCHOR63
+	ldr	x1, [x1, #:lo12:.LANCHOR53]
+	ldr	w2, [x1, 52]
+	add	w2, w2, w0
+	str	w2, [x1, 52]
+	ldrh	w1, [x24, 314]
+	add	w0, w0, w1
+	adrp	x1, .LANCHOR71
+	and	w0, w0, 65535
+	strh	w0, [x24, 314]
+	ldrh	w1, [x1, #:lo12:.LANCHOR71]
+	mul	w1, w1, w3
+	cmp	w0, w1
+	blt	.L2718
+	ldr	x0, [x29, 136]
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	strh	wzr, [x0, 86]
+.L2718:
+	bl	gc_write_completed
+	b	.L2672
+.L2712:
+	cmp	w23, 2
+	bne	.L2713
+	mov	w3, 13
+	b	.L2762
+.L2715:
+	ldr	x4, [x0, w2, sxtw 3]
+	add	w2, w2, 1
+	ldr	x5, [x0, w2, sxtw 3]
+	and	w2, w2, 65535
+	ldrb	w5, [x5, 1]
+	strb	w5, [x4]
+	b	.L2709
+.L2716:
+	adrp	x1, .LANCHOR98
+	ldrb	w2, [x1, #:lo12:.LANCHOR98]
+	mov	w1, w0
+	ubfiz	w0, w0, 1, 15
+	cmp	w2, 0
+	csel	w0, w0, w1, ne
+	b	.L2717
+	.size	gc_do_copy_back, .-gc_do_copy_back
+	.section	.text.zftl_do_gc,"ax",@progbits
+	.align	2
+	.global	zftl_do_gc
+	.type	zftl_do_gc, %function
+zftl_do_gc:
+	sub	sp, sp, #96
+	adrp	x2, .LANCHOR89
+	adrp	x1, .LANCHOR93
+	stp	x29, x30, [sp, 16]
+	add	x29, sp, 16
+	stp	x19, x20, [sp, 32]
+	adrp	x19, .LANCHOR130
+	stp	x21, x22, [sp, 48]
+	ldrh	w20, [x2, #:lo12:.LANCHOR89]
+	stp	x23, x24, [sp, 64]
+	adrp	x23, .LANCHOR5
+	ldrh	w21, [x1, #:lo12:.LANCHOR93]
+	ldrb	w2, [x19, #:lo12:.LANCHOR130]
+	stp	x25, x26, [sp, 80]
+	add	w20, w21, w20
+	ldr	x22, [x23, #:lo12:.LANCHOR5]
+	cmp	w2, 6
+	bhi	.L2868
+	mov	w24, w0
+	and	w20, w20, 65535
+	adrp	x0, .L2767
+	mov	x25, x1
+	add	x0, x0, :lo12:.L2767
+	ldrh	w0, [x0,w2,uxtw #1]
+	adr	x1, .Lrtx2767
+	add	x0, x1, w0, sxth #2
+	br	x0
+.Lrtx2767:
+	.section	.rodata.zftl_do_gc,"a",@progbits
+	.align	0
+	.align	2
+.L2767:
+	.2byte	(.L2766 - .Lrtx2767) / 4
+	.2byte	(.L2768 - .Lrtx2767) / 4
+	.2byte	(.L2769 - .Lrtx2767) / 4
+	.2byte	(.L2770 - .Lrtx2767) / 4
+	.2byte	(.L2771 - .Lrtx2767) / 4
+	.2byte	(.L2772 - .Lrtx2767) / 4
+	.2byte	(.L2773 - .Lrtx2767) / 4
+	.section	.text.zftl_do_gc
+.L2772:
+	adrp	x21, .LANCHOR63
+	add	x25, x21, :lo12:.LANCHOR63
+	mov	w22, 0
+.L2774:
+	bl	gc_check_data_one_wl
+	cbz	w0, .L2841
+	ldr	x0, [x23, #:lo12:.LANCHOR5]
+	add	x21, x21, :lo12:.LANCHOR63
+	strh	wzr, [x21, 56]
+	ldrh	w0, [x0, 80]
+	bl	ftl_free_sblk
+	adrp	x2, .LANCHOR53
+	ldr	x1, [x23, #:lo12:.LANCHOR5]
+	mov	w0, -1
+	ldr	x2, [x2, #:lo12:.LANCHOR53]
+	strh	w0, [x1, 80]
+	strh	w0, [x2, 126]
+	strh	w0, [x1, 130]
+	ldr	x0, [x21, 8]
+	bl	buf_free
+	strb	wzr, [x19, #:lo12:.LANCHOR130]
+	str	xzr, [x21, 8]
+	b	.L2890
+.L2766:
+	adrp	x0, .LANCHOR91
+	mov	w1, 65535
+	ldrh	w4, [x0, #:lo12:.LANCHOR91]
+	ldrh	w0, [x22, 80]
+	add	w21, w21, w4
+	and	w21, w21, 65535
+	cmp	w0, w1
+	beq	.L2775
+	adrp	x1, .LANCHOR29
+	cmp	w21, 7
+	mov	w23, 3
+	adrp	x24, .LANCHOR70
+	ldr	w1, [x1, #:lo12:.LANCHOR29]
+	csinc	w23, w23, wzr, hi
+	tbz	x1, 8, .L2777
+	ldrh	w7, [x22, 122]
+	mov	w4, w21
+	ldrh	w6, [x22, 120]
+	mov	w3, w20
+	ldrh	w5, [x22, 124]
+	mov	w1, 1705
+	ldrb	w2, [x24, #:lo12:.LANCHOR70]
+	str	w0, [sp]
+	adrp	x0, .LC153
+	add	x0, x0, :lo12:.LC153
+	bl	printf
+.L2777:
+	ldrb	w0, [x24, #:lo12:.LANCHOR70]
+	mov	w2, 1
+	mov	w1, w23
+	bl	gc_search_src_blk
+	cmp	w0, 0
+	ble	.L2868
+.L2778:
+	mov	w0, 1
+.L2889:
+	strb	w0, [x19, #:lo12:.LANCHOR130]
+	b	.L2868
+.L2775:
+	adrp	x0, .LANCHOR84
+	cmp	w24, 1
+	ldrh	w25, [x0, #:lo12:.LANCHOR84]
+	adrp	x0, .LANCHOR82
+	ldrh	w26, [x0, #:lo12:.LANCHOR82]
+	bne	.L2779
+	bl	gc_scan_static_data
+	bl	gc_static_wearleveling
+.L2780:
+	ldr	x2, [x23, #:lo12:.LANCHOR5]
+	adrp	x1, .LANCHOR70
+	mov	w0, 1
+	mov	x23, x1
+	strb	w0, [x1, #:lo12:.LANCHOR70]
+	ldrh	w5, [x2, 124]
+	cbz	w5, .L2782
+	strb	w0, [x19, #:lo12:.LANCHOR130]
+	adrp	x0, .LANCHOR29
+	strb	wzr, [x1, #:lo12:.LANCHOR70]
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 8, .L2868
+	ldrh	w7, [x2, 122]
+	mov	w4, w21
+	ldrh	w6, [x2, 120]
+	mov	w3, w20
+	mov	w2, 0
+	mov	w1, 1762
+	adrp	x0, .LC154
+	add	x0, x0, :lo12:.LC154
+	bl	printf
+	b	.L2868
+.L2779:
+	adrp	x0, .LANCHOR73
+	ldrh	w0, [x0, #:lo12:.LANCHOR73]
+	cmp	w0, w20
+	bcs	.L2780
+.L2868:
+	mov	w0, 16
+	ldp	x19, x20, [sp, 32]
+	ldp	x21, x22, [sp, 48]
+	ldp	x23, x24, [sp, 64]
+	ldp	x25, x26, [sp, 80]
+	ldp	x29, x30, [sp, 16]
+	add	sp, sp, 96
+	ret
+.L2782:
+	adrp	x22, .LANCHOR73
+	ldrh	w1, [x22, #:lo12:.LANCHOR73]
+	cmp	w20, w1
+	bcs	.L2783
+	cmp	w21, 1
+	bls	.L2784
+	cmp	w21, 16
+	bls	.L2785
+	adrp	x1, .LANCHOR86
+	ldrh	w2, [x1, #:lo12:.LANCHOR86]
+	adrp	x1, .LANCHOR87
+	ldrh	w1, [x1, #:lo12:.LANCHOR87]
+	cmp	w2, w1
+	bcs	.L2785
+	mov	w2, 16
+	mov	w1, 3
+.L2886:
+	bl	gc_search_src_blk
+	and	w0, w0, 65535
+.L2786:
+	cbnz	w0, .L2778
+	b	.L2868
+.L2785:
+	mov	w2, 2
+	mov	w1, w2
+	mov	w0, 1
+.L2893:
+	bl	gc_search_src_blk
+	tst	w0, 65535
+	bne	.L2778
+	mov	w2, 2
+	b	.L2887
+.L2784:
+	adrp	x0, .LANCHOR29
+	strb	wzr, [x23, #:lo12:.LANCHOR70]
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 8, .L2788
+	ldrh	w7, [x2, 122]
+	adrp	x0, .LC154
+	ldrh	w6, [x2, 120]
+	mov	w5, 0
+	mov	w4, w21
+	mov	w3, w20
+	mov	w2, 0
+	mov	w1, 1778
+	add	x0, x0, :lo12:.LC154
+	bl	printf
+.L2788:
+	cmp	w20, 16
+	bls	.L2789
+	mov	w2, 4
+.L2887:
+	mov	w1, 3
+	ldrb	w0, [x23, #:lo12:.LANCHOR70]
+	b	.L2886
+.L2789:
+	mov	w2, 1
+	ldrb	w0, [x23, #:lo12:.LANCHOR70]
+	mov	w1, w2
+	b	.L2893
+.L2783:
+	cmp	w24, 1
+	lsl	w1, w1, 1
+	bne	.L2791
+	cmp	w20, w1
+	bge	.L2791
+	add	w0, w25, w26
+	and	w0, w0, 65535
+	cmp	w0, w21, lsr 1
+	bcs	.L2792
+	adrp	x1, .LANCHOR86
+	ldrh	w2, [x1, #:lo12:.LANCHOR86]
+	adrp	x1, .LANCHOR87
+	ldrh	w1, [x1, #:lo12:.LANCHOR87]
+	cmp	w2, w1
+	bcs	.L2792
+.L2796:
+	adrp	x0, .LANCHOR83
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	lsr	w0, w0, 1
+	strh	w0, [x22, #:lo12:.LANCHOR73]
+	b	.L2868
+.L2792:
+	cmp	w21, 1
+	adrp	x24, .LANCHOR83
+	bls	.L2793
+	cmp	w21, 16
+	bls	.L2794
+	mov	w2, 8
+	mov	w1, 3
+	mov	w0, 1
+.L2884:
+	bl	gc_search_src_blk
+	and	w0, w0, 65535
+.L2795:
+	ldrh	w1, [x24, #:lo12:.LANCHOR83]
+	strh	w1, [x22, #:lo12:.LANCHOR73]
+	b	.L2786
+.L2794:
+	mov	w2, 2
+	mov	w0, 1
+	mov	w1, w2
+	bl	gc_search_src_blk
+	ands	w0, w0, 65535
+	bne	.L2795
+	mov	w2, 2
+	mov	w1, 3
+	ldrb	w0, [x23, #:lo12:.LANCHOR70]
+	b	.L2884
+.L2793:
+	cmp	w20, w0
+	bcs	.L2796
+	strb	wzr, [x23, #:lo12:.LANCHOR70]
+	mov	w2, 8
+	mov	w1, 3
+	mov	w0, 0
+	b	.L2884
+.L2791:
+	cmp	w20, w1
+	bge	.L2796
+	b	.L2868
+.L2768:
+	adrp	x7, .LANCHOR63
+	mov	w0, 65535
+	ldrh	w1, [x7, #:lo12:.LANCHOR63]
+	cmp	w1, w0
+	bne	.L2797
+	bl	gc_get_src_blk
+	strh	w0, [x7, #:lo12:.LANCHOR63]
+.L2797:
+	ldrh	w3, [x7, #:lo12:.LANCHOR63]
+	mov	w0, 65535
+	add	x1, x7, :lo12:.LANCHOR63
+	cmp	w3, w0
+	beq	.L2798
+	adrp	x0, .LANCHOR3
+	ldrh	w5, [x1, 56]
+	uxtw	x4, w3
+	ldr	x2, [x0, #:lo12:.LANCHOR3]
+	add	x2, x2, x4, lsl 2
+	cbz	w5, .L2799
+	add	x1, x1, 58
+	mov	w0, 0
+.L2801:
+	ldrh	w6, [x1], 2
+	cmp	w6, w3
+	bne	.L2800
+.L2804:
+	adrp	x0, .LANCHOR63
+	mov	w1, -1
+	strh	w1, [x0, #:lo12:.LANCHOR63]
+	b	.L2868
+.L2800:
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	cmp	w5, w0
+	bne	.L2801
+.L2799:
+	ldrb	w0, [x2, 2]
+	and	w1, w0, 224
+	cmp	w1, 224
+	beq	.L2802
+	tst	w0, 192
+	bne	.L2803
+.L2802:
+	adrp	x0, .LANCHOR4
+	ldr	x0, [x0, #:lo12:.LANCHOR4]
+	ldrh	w0, [x0, x4, lsl 1]
+	cbz	w0, .L2804
+	adrp	x1, .LANCHOR193
+	adrp	x0, .LC0
+	mov	w2, 1972
+	add	x1, x1, :lo12:.LANCHOR193
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2805:
+	b	.L2805
+.L2803:
+	mov	w0, 2
+	b	.L2889
+.L2798:
+	strb	wzr, [x19, #:lo12:.LANCHOR130]
+	b	.L2868
+.L2769:
+	bl	gc_scan_src_blk
+	cmn	w0, #1
+	bne	.L2806
+	mov	w0, 3
+	b	.L2889
+.L2806:
+	adrp	x21, .LANCHOR63
+	mov	w1, 65535
+	add	x20, x21, :lo12:.LANCHOR63
+	ldrh	w0, [x21, #:lo12:.LANCHOR63]
+	cmp	w0, w1
+	beq	.L2778
+	ldrh	w1, [x20, 24]
+	cbz	w1, .L2807
+	mov	w0, 4
+	strh	wzr, [x20, 26]
+	strb	w0, [x19, #:lo12:.LANCHOR130]
+	b	.L2868
+.L2807:
+	mov	w1, 1
+	strb	w1, [x19, #:lo12:.LANCHOR130]
+	adrp	x19, .LANCHOR4
+	ubfiz	x1, x0, 1, 16
+	ldr	x2, [x19, #:lo12:.LANCHOR4]
+	ldrh	w1, [x2, x1]
+	cbz	w1, .L2808
+	adrp	x1, .LANCHOR193
+	adrp	x0, .LC0
+	mov	w2, 2000
+	add	x1, x1, :lo12:.LANCHOR193
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2809:
+	b	.L2809
+.L2808:
+	bl	ftl_free_sblk
+	ldr	x0, [x19, #:lo12:.LANCHOR4]
+	ldrh	w1, [x21, #:lo12:.LANCHOR63]
+	strh	wzr, [x0, x1, lsl 1]
+	ldrh	w0, [x20, 30]
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	strh	w0, [x20, 30]
+	cmp	w0, 8
+	bls	.L2804
+	strh	wzr, [x20, 30]
+	bl	ftl_flush
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	mov	w0, 0
+	bl	ftl_info_flush
+	b	.L2804
+.L2770:
+	adrp	x22, .LANCHOR63
+	adrp	x23, .LANCHOR80
+	add	x21, x22, :lo12:.LANCHOR63
+	add	x23, x23, :lo12:.LANCHOR80
+.L2869:
+	bl	gc_scan_src_blk_one_page
+	ldrh	w1, [x21, 2]
+	ldrh	w0, [x23]
+	cmp	w1, w0
+	bcs	.L2810
+	cmp	w20, 7
+	bls	.L2869
+	b	.L2868
+.L2810:
+	ldrh	w3, [x21, 24]
+	adrp	x0, .LANCHOR29
+	cbz	w3, .L2811
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	mov	w1, 4
+	strh	wzr, [x21, 26]
+	strb	w1, [x19, #:lo12:.LANCHOR130]
+	adrp	x19, .LANCHOR4
+	tbz	x0, 8, .L2812
+	ldrh	w1, [x21]
+	ldr	x2, [x19, #:lo12:.LANCHOR4]
+	ubfiz	x0, x1, 1, 16
+	ldrh	w2, [x2, x0]
+	adrp	x0, .LC155
+	add	x0, x0, :lo12:.LC155
+	bl	printf
+.L2812:
+	ldrh	w2, [x22, #:lo12:.LANCHOR63]
+	add	x0, x22, :lo12:.LANCHOR63
+	ldr	x1, [x19, #:lo12:.LANCHOR4]
+	ldrh	w0, [x0, 24]
+	ldrh	w1, [x1, x2, lsl 1]
+	cmp	w1, w0
+	beq	.L2868
+	adrp	x1, .LANCHOR193
+	adrp	x0, .LC0
+	mov	w2, 2034
+	add	x1, x1, :lo12:.LANCHOR193
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2813:
+	b	.L2813
+.L2811:
+	adrp	x2, .LANCHOR3
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	ldrh	w1, [x21]
+	ldr	x20, [x2, #:lo12:.LANCHOR3]
+	mov	w2, 1
+	strb	w2, [x19, #:lo12:.LANCHOR130]
+	add	x20, x20, x1, uxth 2
+	tbz	x0, 8, .L2814
+	ldrb	w2, [x20, 2]
+	adrp	x0, .LC156
+	add	x0, x0, :lo12:.LC156
+	ubfx	x2, x2, 5, 3
+	bl	printf
+.L2814:
+	ldrb	w0, [x20, 2]
+	and	w1, w0, 224
+	cmp	w1, 224
+	beq	.L2815
+	tst	w0, 192
+	bne	.L2816
+.L2815:
+	adrp	x1, .LANCHOR193
+	adrp	x0, .LC0
+	mov	w2, 2044
+	add	x1, x1, :lo12:.LANCHOR193
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2817:
+	b	.L2817
+.L2816:
+	ldrh	w0, [x22, #:lo12:.LANCHOR63]
+	add	x19, x22, :lo12:.LANCHOR63
+	bl	ftl_free_sblk
+	mov	w0, -1
+	strh	w0, [x22, #:lo12:.LANCHOR63]
+	ldrh	w0, [x19, 30]
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	strh	w0, [x19, 30]
+	cmp	w0, 8
+	bls	.L2868
+	strh	wzr, [x19, 30]
+.L2890:
+	bl	flt_sys_flush
+	b	.L2868
+.L2771:
+	ldrh	w1, [x22, 80]
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L2818
+	adrp	x0, .LANCHOR70
+	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	cmp	w0, 1
+	bne	.L2818
+	bl	ftl_flush
+	ldrh	w0, [x25, #:lo12:.LANCHOR93]
+	cbz	w0, .L2819
+.L2888:
+	mov	w1, 5
+	lsr	w0, w0, 1
+	bl	zftl_get_free_sblk
+	and	w20, w0, 65535
+	mov	w1, 65535
+	cmp	w20, w1
+	beq	.L2821
+	adrp	x1, .LANCHOR3
+	ldr	x2, [x1, #:lo12:.LANCHOR3]
+	add	x2, x2, x20, uxth 2
+	ldrb	w1, [x2, 2]
+	tst	w1, 224
+	beq	.L2822
+	adrp	x1, .LANCHOR193
+	adrp	x0, .LC0
+	mov	w2, 2069
+	add	x1, x1, :lo12:.LANCHOR193
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2823:
+	b	.L2823
+.L2819:
+	adrp	x0, .LANCHOR91
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	b	.L2888
+.L2822:
+	mov	w21, 5
+	bfi	w1, w21, 5, 3
+	orr	w1, w1, 16
+	strb	w1, [x2, 2]
+	mov	w1, 1
+	bl	ftl_erase_sblk
+	strb	w21, [x22, 84]
+	add	x1, x22, 96
+	mov	w0, w20
+	bl	ftl_get_blk_list_in_sblk
+	and	w0, w0, 255
+	adrp	x1, .LANCHOR80
+	strb	w0, [x22, 89]
+	adrp	x21, .LANCHOR72
+	strh	w20, [x22, 80]
+	ldrh	w1, [x1, #:lo12:.LANCHOR80]
+	strh	wzr, [x22, 82]
+	strb	wzr, [x22, 85]
+	strh	wzr, [x22, 90]
+	mul	w0, w0, w1
+	mov	w1, 255
+	strh	w0, [x22, 86]
+	adrp	x22, .LANCHOR71
+	ldrb	w0, [x21, #:lo12:.LANCHOR72]
+	ldrh	w2, [x22, #:lo12:.LANCHOR71]
+	mul	w2, w2, w0
+	adrp	x0, .LANCHOR131
+	ldr	x0, [x0, #:lo12:.LANCHOR131]
+	lsl	w2, w2, 2
+	bl	ftl_memset
+	ldrb	w0, [x21, #:lo12:.LANCHOR72]
+	mov	w1, 255
+	ldrh	w2, [x22, #:lo12:.LANCHOR71]
+	mul	w2, w2, w0
+	adrp	x0, .LANCHOR132
+	ldr	x0, [x0, #:lo12:.LANCHOR132]
+	lsl	w2, w2, 2
+	bl	ftl_memset
+	ldrb	w0, [x21, #:lo12:.LANCHOR72]
+	mov	w1, 255
+	ldrh	w2, [x22, #:lo12:.LANCHOR71]
+	mul	w2, w2, w0
+	adrp	x0, .LANCHOR68
+	ldr	x0, [x0, #:lo12:.LANCHOR68]
+	bl	ftl_memset
+	ldr	x0, [x23, #:lo12:.LANCHOR5]
+	mov	w1, -1
+	str	w20, [x0, 132]
+	strh	w1, [x0, 128]
+	strh	w1, [x0, 130]
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	adrp	x0, .LANCHOR53
+	mov	w1, -1
+	ldr	x0, [x0, #:lo12:.LANCHOR53]
+	strh	w20, [x0, 126]
+	adrp	x0, .LANCHOR63
+	add	x0, x0, :lo12:.LANCHOR63
+	str	w1, [x0, 320]
+	strh	wzr, [x0, 314]
+	strh	wzr, [x0, 56]
+	strh	wzr, [x0, 316]
+	strh	wzr, [x0, 318]
+	mov	w0, 0
+	bl	ftl_info_flush
+	b	.L2868
+.L2818:
+	cmp	w24, 1
+	mov	w21, 4
+	csinc	w21, w21, wzr, eq
+	cmp	w20, 15
+	mov	w0, w21
+	add	w21, w21, 4
+	adrp	x25, .LANCHOR70
+	adrp	x24, .LANCHOR63
+	csel	w21, w21, w0, ls
+	add	x25, x25, :lo12:.LANCHOR70
+	add	x20, x24, :lo12:.LANCHOR63
+	add	x26, x22, 80
+.L2827:
+	sub	w21, w21, #1
+	and	w21, w21, 255
+	cmp	w21, 255
+	beq	.L2868
+	bl	gc_do_copy_back
+	ldrb	w0, [x25]
+	cbnz	w0, .L2828
+	adrp	x0, .LANCHOR45
+	ldrb	w0, [x0, #:lo12:.LANCHOR45]
+	cmp	w0, 3
+	bhi	.L2829
+	bl	ftl_write_commit
+.L2829:
+	ldrh	w1, [x20, 26]
+	ldrh	w0, [x20, 24]
+	cmp	w1, w0
+	bcc	.L2827
+	mov	w0, 1
+	strb	w0, [x19, #:lo12:.LANCHOR130]
+	bl	ftl_write_commit
+	bl	ftl_flush
+	ldrh	w0, [x20]
+	adrp	x2, .LANCHOR4
+	ldr	x2, [x2, #:lo12:.LANCHOR4]
+	ubfiz	x1, x0, 1, 16
+	ldrh	w1, [x2, x1]
+	cbz	w1, .L2831
+	adrp	x1, .LANCHOR193
+	adrp	x0, .LC0
+	mov	w2, 2144
+	add	x1, x1, :lo12:.LANCHOR193
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2832:
+	b	.L2832
+.L2831:
+	bl	ftl_free_sblk
+.L2891:
+	mov	w0, -1
+	strh	w0, [x20]
+	b	.L2868
+.L2828:
+	ldrh	w0, [x20, 318]
+	cbz	w0, .L2833
+	ldr	w0, [x20, 320]
+	strh	wzr, [x20, 318]
+	cmn	w0, #1
+	beq	.L2834
+	bl	ftl_mask_bad_block
+.L2834:
+	ldr	x0, [x23, #:lo12:.LANCHOR5]
+	add	x20, x24, :lo12:.LANCHOR63
+	strh	wzr, [x20, 56]
+	ldrh	w0, [x0, 80]
+	str	wzr, [x20, 320]
+	bl	ftl_free_sblk
+	adrp	x2, .LANCHOR53
+	ldr	x1, [x23, #:lo12:.LANCHOR5]
+	mov	w0, -1
+	ldr	x2, [x2, #:lo12:.LANCHOR53]
+	strh	w0, [x1, 80]
+	strh	w0, [x2, 126]
+	strh	w0, [x1, 130]
+	ldr	x0, [x20, 8]
+	cbz	x0, .L2835
+	bl	buf_free
+.L2835:
+	add	x24, x24, :lo12:.LANCHOR63
+	str	xzr, [x24, 8]
+	bl	flt_sys_flush
+	adrp	x1, .LANCHOR193
+	adrp	x0, .LC0
+	strb	wzr, [x19, #:lo12:.LANCHOR130]
+	mov	w2, 2177
+	add	x1, x1, :lo12:.LANCHOR193
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2836:
+	b	.L2836
+.L2833:
+	ldrh	w0, [x26, 6]
+	ldrh	w1, [x20, 26]
+	cmp	w0, 1
+	ldrh	w0, [x20, 24]
+	bls	.L2837
+	cmp	w1, w0
+	bcc	.L2827
+	mov	w0, 1
+	strb	w0, [x19, #:lo12:.LANCHOR130]
+	ldrh	w0, [x20, 56]
+	add	w1, w0, 1
+	strh	w1, [x20, 56]
+	add	x0, x20, x0, sxtw 1
+	ldrh	w1, [x20]
+	strh	w1, [x0, 58]
+	b	.L2891
+.L2837:
+	mov	w2, 5
+	strb	w2, [x19, #:lo12:.LANCHOR130]
+	cmp	w1, w0
+	bcc	.L2838
+	ldrh	w0, [x20, 56]
+	add	w1, w0, 1
+	strh	w1, [x20, 56]
+	add	x0, x20, x0, sxtw 1
+	ldrh	w1, [x20]
+	strh	w1, [x0, 58]
+	mov	w0, -1
+	strh	w0, [x20]
+.L2838:
+	bl	ftl_flush
+	bl	sblk_wait_write_queue_completed
+	bl	gc_write_completed
+	ldr	x0, [x23, #:lo12:.LANCHOR5]
+	ldrh	w1, [x22, 80]
+	strh	w1, [x0, 128]
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	add	x0, x24, :lo12:.LANCHOR63
+	adrp	x1, .LANCHOR80
+	adrp	x2, .LANCHOR67
+	ldrh	w1, [x1, #:lo12:.LANCHOR80]
+	ldrb	w2, [x2, #:lo12:.LANCHOR67]
+	strh	wzr, [x0, 16]
+	strh	w1, [x0, 18]
+	cmp	w2, 2
+	strh	w2, [x0, 20]
+	bne	.L2839
+	ubfiz	w1, w1, 1, 15
+	strh	w1, [x0, 18]
+	mov	w1, 1
+	strh	w1, [x0, 20]
+.L2839:
+	add	x24, x24, :lo12:.LANCHOR63
+	strh	wzr, [x24, 22]
+	b	.L2868
+.L2841:
+	ldrh	w1, [x25, 16]
+	ldrh	w0, [x25, 18]
+	cmp	w1, w0
+	bcc	.L2842
+	mov	w0, 6
+	strb	w0, [x19, #:lo12:.LANCHOR130]
+	ldr	x0, [x25, 8]
+	bl	buf_free
+	str	xzr, [x25, 8]
+	b	.L2868
+.L2842:
+	cmp	w20, 7
+	bls	.L2774
+	cmp	w24, 1
+	bne	.L2868
+	add	w22, w22, 1
+	and	w22, w22, 255
+	cmp	w22, 4
+	bls	.L2774
+	b	.L2868
+.L2773:
+	bl	gc_update_l2p_map_new
+	mov	w20, -1
+	bl	gc_free_src_blk
+	bl	ftl_flush
+	bl	pm_flush
+	strh	w20, [x22, 80]
+	bl	ftl_ext_info_flush
+	adrp	x0, .LANCHOR53
+	ldr	x0, [x0, #:lo12:.LANCHOR53]
+	strh	w20, [x0, 126]
+	mov	w0, 0
+	bl	ftl_info_flush
+	strb	wzr, [x19, #:lo12:.LANCHOR130]
+	bl	print_ftl_debug_info
+	b	.L2868
+.L2821:
+	adrp	x1, .LANCHOR193
+	adrp	x0, .LC0
+	mov	w2, 2075
+	add	x1, x1, :lo12:.LANCHOR193
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2824:
+	b	.L2824
+	.size	zftl_do_gc, .-zftl_do_gc
+	.section	.text.zftl_write,"ax",@progbits
+	.align	2
+	.global	zftl_write
+	.type	zftl_write, %function
+zftl_write:
+	stp	x29, x30, [sp, -112]!
+	add	x29, sp, 0
+	stp	x27, x28, [sp, 80]
+	mov	w27, w0
+	adrp	x0, .LANCHOR29
+	stp	x19, x20, [sp, 16]
+	stp	x23, x24, [sp, 48]
+	mov	w19, w1
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	mov	w20, w2
+	stp	x21, x22, [sp, 32]
+	mov	x24, x3
+	stp	x25, x26, [sp, 64]
+	tbz	x0, 12, .L2895
+	mov	w3, w2
+	adrp	x0, .LC157
+	mov	w2, w1
+	add	x0, x0, :lo12:.LC157
+	mov	w1, w27
+	bl	printf
+.L2895:
+	cbnz	w27, .L2896
+	adrp	x0, .LANCHOR59
+	mov	w27, 24576
+	ldr	w0, [x0, #:lo12:.LANCHOR59]
+.L2897:
+	add	w1, w19, w20
+	cmp	w0, w1
+	bcc	.L2911
+	adrp	x23, .LANCHOR52
+	add	w27, w27, w19
+	sub	w19, w20, #1
+	adrp	x25, .LANCHOR53
+	ldrb	w0, [x23, #:lo12:.LANCHOR52]
+	add	w19, w19, w27
+	add	x23, x23, :lo12:.LANCHOR52
+	udiv	w22, w27, w0
+	udiv	w19, w19, w0
+	add	w0, w27, w20
+	str	w0, [x29, 108]
+	mov	w26, w22
+	sub	w21, w19, w22
+	add	w21, w21, 1
+.L2899:
+	cbnz	w21, .L2907
+	adrp	x20, .LANCHOR89
+	adrp	x19, .LANCHOR93
+	add	x20, x20, :lo12:.LANCHOR89
+	add	x19, x19, :lo12:.LANCHOR93
+	bl	ftl_write_commit
+	mov	w1, 1
+	mov	w0, 0
+	bl	zftl_do_gc
+.L2908:
+	ldrh	w0, [x20]
+	ldrh	w1, [x19]
+	add	w0, w0, w1
+	cmp	w0, 7
+	ble	.L2909
+	mov	w0, 0
+.L2894:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L2896:
+	cmp	w27, 3
+	bhi	.L2911
+	lsl	w27, w27, 13
+	mov	w0, 8192
+	b	.L2897
+.L2907:
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x28, x0
+	cbnz	x0, .L2900
+	bl	ftl_write_commit
+	b	.L2899
+.L2900:
+	ldrb	w3, [x23]
+	cmp	w26, w22
+	strb	wzr, [x0, 57]
+	ccmp	w26, w19, 4, ne
+	strb	w3, [x0, 56]
+	bne	.L2903
+	cmp	w26, w22
+	bne	.L2904
+	udiv	w0, w27, w3
+	msub	w0, w0, w3, w27
+	and	w0, w0, 255
+	strb	w0, [x28, 57]
+	sub	w3, w3, w0
+	and	w3, w3, 255
+	cmp	w20, w3
+	csel	w3, w20, w3, cc
+.L2916:
+	strb	w3, [x28, 56]
+.L2903:
+	ldr	x3, [x28, 8]
+	mov	x1, x24
+	ldrb	w0, [x28, 57]
+	sub	w21, w21, #1
+	ldrb	w2, [x28, 56]
+	ubfiz	x0, x0, 9, 8
+	lsl	w2, w2, 9
+	add	x0, x3, x0
+	bl	ftl_memcpy
+	ldr	x1, [x25, #:lo12:.LANCHOR53]
+	ldr	w0, [x1, 8]
+	str	w26, [x28, 36]
+	add	w26, w26, 1
+	add	w2, w0, 1
+	str	w2, [x1, 8]
+	str	w0, [x28, 32]
+	mov	x0, x28
+	bl	ftl_write_buf
+	ldrb	w0, [x28, 56]
+	ubfiz	x0, x0, 9, 8
+	add	x24, x24, x0
+	b	.L2899
+.L2904:
+	ldr	w0, [x29, 108]
+	msub	w3, w3, w26, w0
+	b	.L2916
+.L2909:
+	mov	w1, 1
+	mov	w0, 0
+	bl	zftl_do_gc
+	b	.L2908
+.L2911:
+	mov	w0, -1
+	b	.L2894
+	.size	zftl_write, .-zftl_write
+	.section	.text.zftl_vendor_write,"ax",@progbits
+	.align	2
+	.global	zftl_vendor_write
+	.type	zftl_vendor_write, %function
+zftl_vendor_write:
+	mov	x3, x2
+	mov	w2, w1
+	add	w1, w0, 512
+	mov	w0, 2
+	b	zftl_write
+	.size	zftl_vendor_write, .-zftl_vendor_write
+	.section	.text.zftl_sys_write,"ax",@progbits
+	.align	2
+	.global	zftl_sys_write
+	.type	zftl_sys_write, %function
+zftl_sys_write:
+	mov	x3, x2
+	mov	w2, w1
+	mov	w1, w0
+	mov	w0, 2
+	b	zftl_write
+	.size	zftl_sys_write, .-zftl_sys_write
+	.section	.text.StorageSysDataStore,"ax",@progbits
+	.align	2
+	.global	StorageSysDataStore
+	.type	StorageSysDataStore, %function
+StorageSysDataStore:
+	mov	x3, x1
+	mov	w2, 1
+	mov	w1, w0
+	mov	w0, 2
+	b	zftl_write
+	.size	StorageSysDataStore, .-StorageSysDataStore
+	.section	.text.FlashBootVendorWrite,"ax",@progbits
+	.align	2
+	.global	FlashBootVendorWrite
+	.type	FlashBootVendorWrite, %function
+FlashBootVendorWrite:
+	mov	x3, x2
+	mov	w2, w1
+	add	w1, w0, 512
+	mov	w0, 2
+	b	zftl_write
+	.size	FlashBootVendorWrite, .-FlashBootVendorWrite
+	.section	.text.ftl_write,"ax",@progbits
+	.align	2
+	.global	ftl_write
+	.type	ftl_write, %function
+ftl_write:
+	and	w0, w0, 255
+	b	zftl_write
+	.size	ftl_write, .-ftl_write
+	.section	.text.zftl_discard,"ax",@progbits
+	.align	2
+	.global	zftl_discard
+	.type	zftl_discard, %function
+zftl_discard:
+	stp	x29, x30, [sp, -128]!
+	adrp	x2, .LANCHOR59
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w19, w1
+	ldr	w2, [x2, #:lo12:.LANCHOR59]
+	add	w1, w0, w1
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	cmp	w2, w1
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	bcc	.L2942
+	adrp	x25, .LANCHOR52
+	adrp	x23, .LANCHOR194
+	add	w24, w0, 24576
+	adrp	x22, .LANCHOR53
+	ldrb	w21, [x25, #:lo12:.LANCHOR52]
+	ldr	w0, [x23, #:lo12:.LANCHOR194]
+	add	w0, w0, w19
+	str	w0, [x23, #:lo12:.LANCHOR194]
+	udiv	w20, w24, w21
+	ldr	x0, [x22, #:lo12:.LANCHOR53]
+	msub	w27, w20, w21, w24
+	ldr	w26, [x0, 8]
+	add	w1, w26, 1
+	str	w1, [x0, 8]
+	cbz	w27, .L2924
+	sub	w21, w21, w27
+	mov	w0, w20
+	cmp	w21, w19
+	csel	w21, w21, w19, ls
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 120]
+	cmn	w0, #1
+	bne	.L2925
+	mov	w2, 0
+	add	x1, x29, 120
+	mov	w0, w20
+	bl	pm_log2phys
+.L2925:
+	ldr	w0, [x29, 120]
+	and	w28, w21, 65535
+	cmn	w0, #1
+	beq	.L2927
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x3, x0
+	cbz	x0, .L2927
+	strb	w27, [x0, 57]
+	ubfiz	x27, x27, 9, 25
+	strb	w21, [x0, 56]
+	mov	w1, 0
+	ldr	x0, [x0, 8]
+	lsl	w2, w28, 9
+	stp	w26, w20, [x3, 32]
+	str	x3, [x29, 104]
+	add	x0, x0, x27
+	bl	ftl_memset
+	ldr	x3, [x29, 104]
+	mov	x0, x3
+	bl	ftl_write_buf
+	bl	ftl_write_commit
+	ldr	x1, [x22, #:lo12:.LANCHOR53]
+	ldr	w0, [x1, 76]
+	add	w0, w0, 1
+	str	w0, [x1, 76]
+.L2927:
+	add	w20, w20, 1
+	sub	w19, w19, w28
+.L2924:
+	cbz	w19, .L2929
+	bl	ftl_flush
+.L2929:
+	adrp	x27, .LANCHOR96
+	add	x21, x25, :lo12:.LANCHOR52
+	add	x27, x27, :lo12:.LANCHOR96
+	mov	w0, -1
+	str	w0, [x29, 124]
+.L2930:
+	ldrb	w0, [x21]
+	cmp	w19, w0
+	bcs	.L2935
+	cbz	w19, .L2937
+	mov	w0, w20
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 120]
+	cmn	w0, #1
+	bne	.L2938
+	mov	w2, 0
+	add	x1, x29, 120
+	mov	w0, w20
+	bl	pm_log2phys
+.L2938:
+	ldr	w0, [x29, 120]
+	cmn	w0, #1
+	beq	.L2937
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x21, x0
+	cbz	x0, .L2937
+	strb	wzr, [x0, 57]
+	strb	w19, [x0, 56]
+	stp	w26, w20, [x21, 32]
+	ldrb	w0, [x25, #:lo12:.LANCHOR52]
+	cmp	w19, w0
+	bcc	.L2940
+	adrp	x1, .LANCHOR195
+	adrp	x0, .LC0
+	mov	w2, 1117
+	add	x1, x1, :lo12:.LANCHOR195
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2941:
+	b	.L2941
+.L2935:
+	mov	w0, w20
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 120]
+	cmn	w0, #1
+	beq	.L2931
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x28, x0
+	cbz	x0, .L2933
+	ldrb	w2, [x21]
+	mov	w1, 0
+	strb	w2, [x0, 56]
+	strb	wzr, [x0, 57]
+	ldr	x0, [x0, 8]
+	lsl	w2, w2, 9
+	stp	w26, w20, [x28, 32]
+	bl	ftl_memset
+	mov	x0, x28
+	bl	ftl_write_buf
+	bl	ftl_write_commit
+.L2963:
+	ldr	x1, [x22, #:lo12:.LANCHOR53]
+	ldr	w0, [x1, 76]
+	add	w0, w0, 1
+	str	w0, [x1, 76]
+.L2933:
+	ldrb	w0, [x21]
+	add	w20, w20, 1
+	sub	w19, w19, w0
+	b	.L2930
+.L2931:
+	mov	w2, 0
+	add	x1, x29, 120
+	mov	w0, w20
+	bl	pm_log2phys
+	ldr	w0, [x29, 120]
+	cmn	w0, #1
+	beq	.L2933
+	add	x1, x29, 124
+	mov	w2, 1
+	mov	w0, w20
+	bl	pm_log2phys
+	ldrh	w3, [x27]
+	mov	w1, 21
+	ldr	w0, [x29, 120]
+	sub	w2, w1, w3
+	mov	w1, 1
+	lsr	w0, w0, w3
+	lsl	w1, w1, w2
+	sub	w1, w1, #1
+	and	w1, w1, w0
+	adrp	x0, .LANCHOR95
+	ldrb	w0, [x0, #:lo12:.LANCHOR95]
+	udiv	w0, w1, w0
+	bl	ftl_vpn_decrement
+	b	.L2963
+.L2940:
+	ldr	x0, [x21, 8]
+	lsl	w2, w19, 9
+	mov	w1, 0
+	bl	ftl_memset
+	mov	x0, x21
+	bl	ftl_write_buf
+	bl	ftl_write_commit
+	ldr	x1, [x22, #:lo12:.LANCHOR53]
+	ldr	w0, [x1, 76]
+	add	w0, w0, 1
+	str	w0, [x1, 76]
+.L2937:
+	ldr	w1, [x23, #:lo12:.LANCHOR194]
+	cmp	w1, 8192
+	bls	.L2943
+	mov	w3, w19
+	mov	w2, w24
+	mov	w4, 0
+	adrp	x0, .LC158
+	add	x0, x0, :lo12:.LC158
+	bl	printf
+	str	wzr, [x23, #:lo12:.LANCHOR194]
+	bl	flt_sys_flush
+	adrp	x0, .LANCHOR196
+	mov	w1, 1
+	str	w1, [x0, #:lo12:.LANCHOR196]
+.L2943:
+	mov	w0, 0
+	b	.L2922
+.L2942:
+	mov	w0, -1
+.L2922:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+	.size	zftl_discard, .-zftl_discard
+	.section	.text.ftl_discard,"ax",@progbits
+	.align	2
+	.global	ftl_discard
+	.type	ftl_discard, %function
+ftl_discard:
+	mov	w0, w1
+	mov	w1, w2
+	b	zftl_discard
+	.size	ftl_discard, .-ftl_discard
+	.global	g_pm_spare
+	.global	pm_gc_enable
+	.global	pm_last_load_ram_id
+	.global	pm_last_update_ram_id
+	.global	pm_ram_info
+	.global	sblk_gc_write_completed_queue_head
+	.global	sblk_read_completed_queue_head
+	.global	sblk_write_completed_queue_head
+	.global	sblk_queue_head
+	.global	slc_cache_sblk
+	.global	xlc_data_sblk
+	.global	slc_data_sblk
+	.global	free_mix_sblk
+	.global	free_xlc_sblk
+	.global	free_slc_sblk
+	.global	gp_data_xlc_data_head
+	.global	gp_data_slc_data_head
+	.global	gp_data_slc_cache_head
+	.global	gp_free_mix_head
+	.global	gp_free_xlc_head
+	.global	gp_free_slc_head
+	.global	gp_sblk_list_tbl
+	.global	ftl_low_format_cur_blk
+	.global	ftl_power_lost_flag
+	.global	ftl_vpn_update_count
+	.global	ftl_sblk_vpn_update_id
+	.global	ftl_sblk_lpa_tbl
+	.global	ftl_sblk_vpn
+	.global	gp_ftl_ext_info
+	.global	gp_ftl_info
+	.global	gp_blk_info
+	.global	ftl_tmp_spare
+	.global	ftl_info_spare
+	.global	ftl_ext_info_data_buffer
+	.global	ftl_info_data_buffer
+	.global	ftl_tmp_buffer
+	.global	g_ftl_info_blk
+	.global	tlc_prog_order
+	.global	gc_des_ppa_tbl
+	.global	gc_valid_page_ppa
+	.global	gc_page_buf_id
+	.global	gc_pre_ppa_tbl
+	.global	gc_lpa_tbl
+	.global	g_gc_info
+	.global	gc_xlc_data_index
+	.global	gc_slc_cache_index
+	.global	gc_slc_data_index
+	.global	gc_free_slc_sblk_th
+	.global	gc_slc_mode_vpn_th
+	.global	gc_slc_mode_tlc_vpn_th
+	.global	gc_tlc_mode_tlc_vpn_th
+	.global	gc_tlc_mode_slc_vpn_th
+	.global	gc_state
+	.global	gc_mode
+	.global	check_vpc_tbl
+	.global	p_read_ahead_ext_buf
+	.global	discard_sector_count
+	.global	read_ahead_lpa
+	.global	write_commit_count
+	.global	write_commit_head
+	.global	write_buf_count
+	.global	write_buf_head
+	.global	ftl_flush_jiffies
+	.global	lpa_hash
+	.global	lpa_hash_index
+	.global	_c_mix_max_xlc_ec_count
+	.global	_c_mix_max_slc_ec_count
+	.global	_c_swl_xlc_gc_th
+	.global	_c_swl_slc_gc_th
+	.global	_gc_after_discard_en
+	.global	_last_write_time
+	.global	_last_read_time
+	.global	_min_slc_super_block
+	.global	_max_slc_super_block
+	.global	_max_xlc_super_block
+	.global	_c_max_pm_sblk
+	.global	_c_ftl_pm_page_num
+	.global	_c_totle_log_page
+	.global	_c_totle_data_density
+	.global	_c_user_data_density
+	.global	_c_totle_phy_density
+	.global	_c_ftl_block_addr_log2
+	.global	_c_ftl_block_align_addr
+	.global	_c_ftl_byte_pre_page
+	.global	_c_ftl_nand_blks_per_die
+	.global	_c_ftl_page_pre_slc_blk
+	.global	_c_ftl_page_pre_blk
+	.global	_c_ftl_blk_pre_plane
+	.global	_c_ftl_nand_planes_num
+	.global	_c_ftl_planes_per_die
+	.global	_c_ftl_sec_per_page
+	.global	_c_ftl_nand_die_num
+	.global	_c_ftl_nand_type
+	.global	zftl_debug
+	.global	g_flash_blk_info
+	.global	gp_flash_info
+	.global	p_free_buf_head
+	.global	free_buf_count
+	.global	g_buf
+	.global	g_nandc_v6_master_info
+	.global	nandc_randomizer_en
+	.global	nandc_hw_seed
+	.global	fill_spare_size
+	.global	g_nandc_ecc_bits
+	.global	g_nandc_ver
+	.global	gp_nandc
+	.global	hy_f26_ref_value
+	.global	sd15_tlc_rr
+	.global	sd15_slc_rr
+	.global	g_nand_para_info
+	.global	gp_nand_para_info
+	.global	g_nand_opt_para
+	.global	g_msb_page_tbl
+	.global	g_lsb_page_tbl
+	.global	g_die_addr
+	.global	g_die_cs_idx
+	.global	IDByte
+	.global	flash_read_retry
+	.global	g_maxRetryCount
+	.global	g_maxRegNum
+	.global	g_retryMode
+	.global	g_flash_toggle_mode_en
+	.global	g_flash_3d_mlc_flag
+	.global	g_flash_3d_tlc_flag
+	.global	g_flash_multi_page_prog_en
+	.global	g_flash_multi_page_read_en
+	.global	g_flash_interface_mode
+	.global	g_idb_ecc_bits
+	.global	g_idb_slc_mode_enable
+	.global	g_slc_mode_addr2
+	.global	g_slc_mode_enable
+	.global	g_flash_cur_mode
+	.global	g_flash_slc_mode
+	.global	g_slc_page_num
+	.global	g_totle_phy_block
+	.global	g_block_align_addr
+	.global	g_flash_reversd_blks
+	.global	g_nand_max_die
+	.global	g_flash_tmp_spare_buffer
+	.global	g_flash_tmp_page_buffer
+	.global	g_flash_sys_spare_buffer
+	.global	g_flash_spare_buffer
+	.global	g_flash_page_buffer
+	.section	.bss.IDByte,"aw",@nobits
+	.align	2
+	.set	.LANCHOR33,. + 0
+	.type	IDByte, %object
+	.size	IDByte, 32
+IDByte:
+	.zero	32
+	.section	.bss._c_ftl_blk_pre_plane,"aw",@nobits
+	.align	1
+	.set	.LANCHOR2,. + 0
+	.type	_c_ftl_blk_pre_plane, %object
+	.size	_c_ftl_blk_pre_plane, 2
+_c_ftl_blk_pre_plane:
+	.zero	2
+	.section	.bss._c_ftl_block_addr_log2,"aw",@nobits
+	.align	1
+	.set	.LANCHOR96,. + 0
+	.type	_c_ftl_block_addr_log2, %object
+	.size	_c_ftl_block_addr_log2, 2
+_c_ftl_block_addr_log2:
+	.zero	2
+	.section	.bss._c_ftl_block_align_addr,"aw",@nobits
+	.align	1
+	.set	.LANCHOR99,. + 0
+	.type	_c_ftl_block_align_addr, %object
+	.size	_c_ftl_block_align_addr, 2
+_c_ftl_block_align_addr:
+	.zero	2
+	.section	.bss._c_ftl_byte_pre_page,"aw",@nobits
+	.align	1
+	.set	.LANCHOR173,. + 0
+	.type	_c_ftl_byte_pre_page, %object
+	.size	_c_ftl_byte_pre_page, 2
+_c_ftl_byte_pre_page:
+	.zero	2
+	.section	.bss._c_ftl_nand_blks_per_die,"aw",@nobits
+	.align	1
+	.type	_c_ftl_nand_blks_per_die, %object
+	.size	_c_ftl_nand_blks_per_die, 2
+_c_ftl_nand_blks_per_die:
+	.zero	2
+	.section	.bss._c_ftl_nand_die_num,"aw",@nobits
+	.set	.LANCHOR100,. + 0
+	.type	_c_ftl_nand_die_num, %object
+	.size	_c_ftl_nand_die_num, 1
+_c_ftl_nand_die_num:
+	.zero	1
+	.section	.bss._c_ftl_nand_planes_num,"aw",@nobits
+	.set	.LANCHOR72,. + 0
+	.type	_c_ftl_nand_planes_num, %object
+	.size	_c_ftl_nand_planes_num, 1
+_c_ftl_nand_planes_num:
+	.zero	1
+	.section	.bss._c_ftl_nand_type,"aw",@nobits
+	.set	.LANCHOR67,. + 0
+	.type	_c_ftl_nand_type, %object
+	.size	_c_ftl_nand_type, 1
+_c_ftl_nand_type:
+	.zero	1
+	.section	.bss._c_ftl_page_pre_blk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR71,. + 0
+	.type	_c_ftl_page_pre_blk, %object
+	.size	_c_ftl_page_pre_blk, 2
+_c_ftl_page_pre_blk:
+	.zero	2
+	.section	.bss._c_ftl_page_pre_slc_blk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR80,. + 0
+	.type	_c_ftl_page_pre_slc_blk, %object
+	.size	_c_ftl_page_pre_slc_blk, 2
+_c_ftl_page_pre_slc_blk:
+	.zero	2
+	.section	.bss._c_ftl_planes_per_die,"aw",@nobits
+	.set	.LANCHOR95,. + 0
+	.type	_c_ftl_planes_per_die, %object
 	.size	_c_ftl_planes_per_die, 1
 _c_ftl_planes_per_die:
 	.zero	1
 	.section	.bss._c_ftl_pm_page_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR137,. + 0
+	.set	.LANCHOR161,. + 0
 	.type	_c_ftl_pm_page_num, %object
 	.size	_c_ftl_pm_page_num, 2
 _c_ftl_pm_page_num:
 	.zero	2
 	.section	.bss._c_ftl_sec_per_page,"aw",@nobits
-	.set	.LANCHOR45,. + 0
+	.set	.LANCHOR52,. + 0
 	.type	_c_ftl_sec_per_page, %object
 	.size	_c_ftl_sec_per_page, 1
 _c_ftl_sec_per_page:
 	.zero	1
 	.section	.bss._c_max_pm_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR101,. + 0
+	.set	.LANCHOR127,. + 0
 	.type	_c_max_pm_sblk, %object
 	.size	_c_max_pm_sblk, 2
 _c_max_pm_sblk:
+	.zero	2
+	.section	.bss._c_mix_max_slc_ec_count,"aw",@nobits
+	.align	1
+	.set	.LANCHOR180,. + 0
+	.type	_c_mix_max_slc_ec_count, %object
+	.size	_c_mix_max_slc_ec_count, 2
+_c_mix_max_slc_ec_count:
+	.zero	2
+	.section	.bss._c_mix_max_xlc_ec_count,"aw",@nobits
+	.align	1
+	.set	.LANCHOR181,. + 0
+	.type	_c_mix_max_xlc_ec_count, %object
+	.size	_c_mix_max_xlc_ec_count, 2
+_c_mix_max_xlc_ec_count:
+	.zero	2
+	.section	.bss._c_swl_slc_gc_th,"aw",@nobits
+	.align	1
+	.set	.LANCHOR126,. + 0
+	.type	_c_swl_slc_gc_th, %object
+	.size	_c_swl_slc_gc_th, 2
+_c_swl_slc_gc_th:
+	.zero	2
+	.section	.bss._c_swl_xlc_gc_th,"aw",@nobits
+	.align	1
+	.set	.LANCHOR125,. + 0
+	.type	_c_swl_xlc_gc_th, %object
+	.size	_c_swl_xlc_gc_th, 2
+_c_swl_xlc_gc_th:
 	.zero	2
 	.section	.bss._c_totle_data_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR162,. + 0
+	.set	.LANCHOR178,. + 0
 	.type	_c_totle_data_density, %object
 	.size	_c_totle_data_density, 4
 _c_totle_data_density:
 	.zero	4
 	.section	.bss._c_totle_log_page,"aw",@nobits
 	.align	2
-	.set	.LANCHOR47,. + 0
+	.set	.LANCHOR54,. + 0
 	.type	_c_totle_log_page, %object
 	.size	_c_totle_log_page, 4
 _c_totle_log_page:
 	.zero	4
 	.section	.bss._c_totle_phy_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR161,. + 0
+	.set	.LANCHOR177,. + 0
 	.type	_c_totle_phy_density, %object
 	.size	_c_totle_phy_density, 4
 _c_totle_phy_density:
 	.zero	4
 	.section	.bss._c_user_data_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR52,. + 0
+	.set	.LANCHOR59,. + 0
 	.type	_c_user_data_density, %object
 	.size	_c_user_data_density, 4
 _c_user_data_density:
+	.zero	4
+	.section	.bss._gc_after_discard_en,"aw",@nobits
+	.align	2
+	.set	.LANCHOR196,. + 0
+	.type	_gc_after_discard_en, %object
+	.size	_gc_after_discard_en, 4
+_gc_after_discard_en:
+	.zero	4
+	.section	.bss._last_read_time,"aw",@nobits
+	.align	2
+	.type	_last_read_time, %object
+	.size	_last_read_time, 4
+_last_read_time:
+	.zero	4
+	.section	.bss._last_write_time,"aw",@nobits
+	.align	2
+	.type	_last_write_time, %object
+	.size	_last_write_time, 4
+_last_write_time:
 	.zero	4
 	.section	.bss._max_slc_super_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR164,. + 0
+	.set	.LANCHOR179,. + 0
 	.type	_max_slc_super_block, %object
 	.size	_max_slc_super_block, 2
 _max_slc_super_block:
 	.zero	2
 	.section	.bss._max_xlc_super_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR163,. + 0
+	.set	.LANCHOR87,. + 0
 	.type	_max_xlc_super_block, %object
 	.size	_max_xlc_super_block, 2
 _max_xlc_super_block:
 	.zero	2
 	.section	.bss._min_slc_super_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR165,. + 0
+	.set	.LANCHOR83,. + 0
 	.type	_min_slc_super_block, %object
 	.size	_min_slc_super_block, 2
 _min_slc_super_block:
@@ -18429,29 +19733,57 @@ _min_slc_super_block:
 	.section	.bss.check_vpc_tbl,"aw",@nobits
 	.align	3
 	.type	check_vpc_tbl, %object
-	.size	check_vpc_tbl, 4352
+	.size	check_vpc_tbl, 4608
 check_vpc_tbl:
-	.zero	4352
+	.zero	4608
+	.section	.bss.discard_sector_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR194,. + 0
+	.type	discard_sector_count, %object
+	.size	discard_sector_count, 4
+discard_sector_count:
+	.zero	4
 	.section	.bss.fill_spare_size,"aw",@nobits
 	.align	1
-	.set	.LANCHOR31,. + 0
+	.set	.LANCHOR38,. + 0
 	.type	fill_spare_size, %object
 	.size	fill_spare_size, 2
 fill_spare_size:
 	.zero	2
 	.section	.bss.flash_read_retry,"aw",@nobits
 	.align	3
-	.set	.LANCHOR115,. + 0
+	.set	.LANCHOR139,. + 0
 	.type	flash_read_retry, %object
 	.size	flash_read_retry, 8
 flash_read_retry:
 	.zero	8
 	.section	.bss.free_buf_count,"aw",@nobits
-	.set	.LANCHOR38,. + 0
+	.set	.LANCHOR45,. + 0
 	.type	free_buf_count, %object
 	.size	free_buf_count, 1
 free_buf_count:
 	.zero	1
+	.section	.bss.free_mix_sblk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR93,. + 0
+	.type	free_mix_sblk, %object
+	.size	free_mix_sblk, 2
+free_mix_sblk:
+	.zero	2
+	.section	.bss.free_slc_sblk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR89,. + 0
+	.type	free_slc_sblk, %object
+	.size	free_slc_sblk, 2
+free_slc_sblk:
+	.zero	2
+	.section	.bss.free_xlc_sblk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR91,. + 0
+	.type	free_xlc_sblk, %object
+	.size	free_xlc_sblk, 2
+free_xlc_sblk:
+	.zero	2
 	.section	.bss.ftl_ext_info_data_buffer,"aw",@nobits
 	.align	6
 	.type	ftl_ext_info_data_buffer, %object
@@ -18460,7 +19792,7 @@ ftl_ext_info_data_buffer:
 	.zero	16384
 	.section	.bss.ftl_flush_jiffies,"aw",@nobits
 	.align	2
-	.set	.LANCHOR168,. + 0
+	.set	.LANCHOR190,. + 0
 	.type	ftl_flush_jiffies, %object
 	.size	ftl_flush_jiffies, 4
 ftl_flush_jiffies:
@@ -18473,41 +19805,41 @@ ftl_info_data_buffer:
 	.zero	16384
 	.section	.bss.ftl_info_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR130,. + 0
+	.set	.LANCHOR154,. + 0
 	.type	ftl_info_spare, %object
 	.size	ftl_info_spare, 256
 ftl_info_spare:
 	.zero	256
 	.section	.bss.ftl_low_format_cur_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR53,. + 0
+	.set	.LANCHOR60,. + 0
 	.type	ftl_low_format_cur_blk, %object
 	.size	ftl_low_format_cur_blk, 2
 ftl_low_format_cur_blk:
 	.zero	2
 	.section	.bss.ftl_power_lost_flag,"aw",@nobits
-	.set	.LANCHOR133,. + 0
+	.set	.LANCHOR157,. + 0
 	.type	ftl_power_lost_flag, %object
 	.size	ftl_power_lost_flag, 1
 ftl_power_lost_flag:
 	.zero	1
 	.section	.bss.ftl_sblk_lpa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR82,. + 0
+	.set	.LANCHOR105,. + 0
 	.type	ftl_sblk_lpa_tbl, %object
 	.size	ftl_sblk_lpa_tbl, 8
 ftl_sblk_lpa_tbl:
 	.zero	8
 	.section	.bss.ftl_sblk_vpn,"aw",@nobits
 	.align	3
-	.set	.LANCHOR56,. + 0
+	.set	.LANCHOR4,. + 0
 	.type	ftl_sblk_vpn, %object
 	.size	ftl_sblk_vpn, 8
 ftl_sblk_vpn:
 	.zero	8
 	.section	.bss.ftl_sblk_vpn_update_id,"aw",@nobits
 	.align	1
-	.set	.LANCHOR87,. + 0
+	.set	.LANCHOR110,. + 0
 	.type	ftl_sblk_vpn_update_id, %object
 	.size	ftl_sblk_vpn_update_id, 2
 ftl_sblk_vpn_update_id:
@@ -18520,241 +19852,241 @@ ftl_tmp_buffer:
 	.zero	16384
 	.section	.bss.ftl_tmp_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR121,. + 0
+	.set	.LANCHOR145,. + 0
 	.type	ftl_tmp_spare, %object
 	.size	ftl_tmp_spare, 256
 ftl_tmp_spare:
 	.zero	256
 	.section	.bss.ftl_vpn_update_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR86,. + 0
+	.set	.LANCHOR109,. + 0
 	.type	ftl_vpn_update_count, %object
 	.size	ftl_vpn_update_count, 2
 ftl_vpn_update_count:
 	.zero	2
-	.section	.bss.gNandOptPara,"aw",@nobits
-	.align	3
-	.set	.LANCHOR103,. + 0
-	.type	gNandOptPara, %object
-	.size	gNandOptPara, 32
-gNandOptPara:
-	.zero	32
 	.section	.bss.g_block_align_addr,"aw",@nobits
 	.align	1
-	.set	.LANCHOR13,. + 0
+	.set	.LANCHOR20,. + 0
 	.type	g_block_align_addr, %object
 	.size	g_block_align_addr, 2
 g_block_align_addr:
 	.zero	2
 	.section	.bss.g_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR36,. + 0
+	.set	.LANCHOR43,. + 0
 	.type	g_buf, %object
 	.size	g_buf, 2048
 g_buf:
 	.zero	2048
 	.section	.bss.g_die_addr,"aw",@nobits
 	.align	2
-	.set	.LANCHOR98,. + 0
+	.set	.LANCHOR122,. + 0
 	.type	g_die_addr, %object
 	.size	g_die_addr, 32
 g_die_addr:
 	.zero	32
 	.section	.bss.g_die_cs_idx,"aw",@nobits
 	.align	2
-	.set	.LANCHOR10,. + 0
+	.set	.LANCHOR17,. + 0
 	.type	g_die_cs_idx, %object
 	.size	g_die_cs_idx, 8
 g_die_cs_idx:
 	.zero	8
 	.section	.bss.g_flash_3d_mlc_flag,"aw",@nobits
-	.set	.LANCHOR74,. + 0
+	.set	.LANCHOR98,. + 0
 	.type	g_flash_3d_mlc_flag, %object
 	.size	g_flash_3d_mlc_flag, 1
 g_flash_3d_mlc_flag:
 	.zero	1
 	.section	.bss.g_flash_3d_tlc_flag,"aw",@nobits
-	.set	.LANCHOR66,. + 0
+	.set	.LANCHOR69,. + 0
 	.type	g_flash_3d_tlc_flag, %object
 	.size	g_flash_3d_tlc_flag, 1
 g_flash_3d_tlc_flag:
 	.zero	1
 	.section	.bss.g_flash_blk_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR117,. + 0
+	.set	.LANCHOR141,. + 0
 	.type	g_flash_blk_info, %object
 	.size	g_flash_blk_info, 4
 g_flash_blk_info:
 	.zero	4
 	.section	.bss.g_flash_cur_mode,"aw",@nobits
-	.set	.LANCHOR20,. + 0
+	.set	.LANCHOR27,. + 0
 	.type	g_flash_cur_mode, %object
 	.size	g_flash_cur_mode, 1
 g_flash_cur_mode:
 	.zero	1
 	.section	.bss.g_flash_interface_mode,"aw",@nobits
-	.set	.LANCHOR25,. + 0
+	.set	.LANCHOR32,. + 0
 	.type	g_flash_interface_mode, %object
 	.size	g_flash_interface_mode, 1
 g_flash_interface_mode:
 	.zero	1
 	.section	.bss.g_flash_multi_page_prog_en,"aw",@nobits
-	.set	.LANCHOR23,. + 0
+	.set	.LANCHOR30,. + 0
 	.type	g_flash_multi_page_prog_en, %object
 	.size	g_flash_multi_page_prog_en, 1
 g_flash_multi_page_prog_en:
 	.zero	1
 	.section	.bss.g_flash_multi_page_read_en,"aw",@nobits
-	.set	.LANCHOR144,. + 0
+	.set	.LANCHOR168,. + 0
 	.type	g_flash_multi_page_read_en, %object
 	.size	g_flash_multi_page_read_en, 1
 g_flash_multi_page_read_en:
 	.zero	1
 	.section	.bss.g_flash_page_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR119,. + 0
+	.set	.LANCHOR143,. + 0
 	.type	g_flash_page_buffer, %object
 	.size	g_flash_page_buffer, 8
 g_flash_page_buffer:
 	.zero	8
 	.section	.bss.g_flash_reversd_blks,"aw",@nobits
-	.set	.LANCHOR123,. + 0
+	.set	.LANCHOR147,. + 0
 	.type	g_flash_reversd_blks, %object
 	.size	g_flash_reversd_blks, 1
 g_flash_reversd_blks:
 	.zero	1
 	.section	.bss.g_flash_slc_mode,"aw",@nobits
-	.set	.LANCHOR11,. + 0
+	.set	.LANCHOR18,. + 0
 	.type	g_flash_slc_mode, %object
 	.size	g_flash_slc_mode, 1
 g_flash_slc_mode:
 	.zero	1
 	.section	.bss.g_flash_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR118,. + 0
+	.set	.LANCHOR142,. + 0
 	.type	g_flash_spare_buffer, %object
 	.size	g_flash_spare_buffer, 8
 g_flash_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_sys_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR116,. + 0
+	.set	.LANCHOR140,. + 0
 	.type	g_flash_sys_spare_buffer, %object
 	.size	g_flash_sys_spare_buffer, 8
 g_flash_sys_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_tmp_page_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR111,. + 0
+	.set	.LANCHOR135,. + 0
 	.type	g_flash_tmp_page_buffer, %object
 	.size	g_flash_tmp_page_buffer, 8
 g_flash_tmp_page_buffer:
 	.zero	8
 	.section	.bss.g_flash_tmp_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR112,. + 0
+	.set	.LANCHOR136,. + 0
 	.type	g_flash_tmp_spare_buffer, %object
 	.size	g_flash_tmp_spare_buffer, 8
 g_flash_tmp_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_toggle_mode_en,"aw",@nobits
-	.set	.LANCHOR35,. + 0
+	.set	.LANCHOR42,. + 0
 	.type	g_flash_toggle_mode_en, %object
 	.size	g_flash_toggle_mode_en, 1
 g_flash_toggle_mode_en:
 	.zero	1
 	.section	.bss.g_ftl_info_blk,"aw",@nobits
 	.align	6
-	.set	.LANCHOR131,. + 0
+	.set	.LANCHOR155,. + 0
 	.type	g_ftl_info_blk, %object
 	.size	g_ftl_info_blk, 4
 g_ftl_info_blk:
 	.zero	4
 	.section	.bss.g_gc_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR58,. + 0
+	.set	.LANCHOR63,. + 0
 	.type	g_gc_info, %object
 	.size	g_gc_info, 328
 g_gc_info:
 	.zero	328
 	.section	.bss.g_idb_ecc_bits,"aw",@nobits
-	.set	.LANCHOR145,. + 0
+	.set	.LANCHOR169,. + 0
 	.type	g_idb_ecc_bits, %object
 	.size	g_idb_ecc_bits, 1
 g_idb_ecc_bits:
 	.zero	1
 	.section	.bss.g_idb_slc_mode_enable,"aw",@nobits
-	.set	.LANCHOR146,. + 0
+	.set	.LANCHOR170,. + 0
 	.type	g_idb_slc_mode_enable, %object
 	.size	g_idb_slc_mode_enable, 1
 g_idb_slc_mode_enable:
 	.zero	1
 	.section	.bss.g_lsb_page_tbl,"aw",@nobits
 	.align	2
-	.set	.LANCHOR14,. + 0
+	.set	.LANCHOR21,. + 0
 	.type	g_lsb_page_tbl, %object
 	.size	g_lsb_page_tbl, 512
 g_lsb_page_tbl:
 	.zero	512
 	.section	.bss.g_maxRegNum,"aw",@nobits
-	.set	.LANCHOR4,. + 0
+	.set	.LANCHOR11,. + 0
 	.type	g_maxRegNum, %object
 	.size	g_maxRegNum, 1
 g_maxRegNum:
 	.zero	1
 	.section	.bss.g_maxRetryCount,"aw",@nobits
-	.set	.LANCHOR113,. + 0
+	.set	.LANCHOR137,. + 0
 	.type	g_maxRetryCount, %object
 	.size	g_maxRetryCount, 1
 g_maxRetryCount:
 	.zero	1
 	.section	.bss.g_msb_page_tbl,"aw",@nobits
 	.align	2
-	.set	.LANCHOR96,. + 0
+	.set	.LANCHOR120,. + 0
 	.type	g_msb_page_tbl, %object
 	.size	g_msb_page_tbl, 1024
 g_msb_page_tbl:
 	.zero	1024
 	.section	.bss.g_nand_max_die,"aw",@nobits
-	.set	.LANCHOR8,. + 0
+	.set	.LANCHOR15,. + 0
 	.type	g_nand_max_die, %object
 	.size	g_nand_max_die, 1
 g_nand_max_die:
 	.zero	1
+	.section	.bss.g_nand_opt_para,"aw",@nobits
+	.align	3
+	.set	.LANCHOR129,. + 0
+	.type	g_nand_opt_para, %object
+	.size	g_nand_opt_para, 32
+g_nand_opt_para:
+	.zero	32
 	.section	.bss.g_nandc_ecc_bits,"aw",@nobits
-	.set	.LANCHOR27,. + 0
+	.set	.LANCHOR34,. + 0
 	.type	g_nandc_ecc_bits, %object
 	.size	g_nandc_ecc_bits, 1
 g_nandc_ecc_bits:
 	.zero	1
 	.section	.bss.g_nandc_v6_master_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR30,. + 0
+	.set	.LANCHOR37,. + 0
 	.type	g_nandc_v6_master_info, %object
 	.size	g_nandc_v6_master_info, 40
 g_nandc_v6_master_info:
 	.zero	40
 	.section	.bss.g_nandc_ver,"aw",@nobits
-	.set	.LANCHOR7,. + 0
+	.set	.LANCHOR14,. + 0
 	.type	g_nandc_ver, %object
 	.size	g_nandc_ver, 1
 g_nandc_ver:
 	.zero	1
 	.section	.bss.g_pm_spare,"aw",@nobits
 	.align	3
-	.set	.LANCHOR141,. + 0
+	.set	.LANCHOR165,. + 0
 	.type	g_pm_spare, %object
 	.size	g_pm_spare, 8
 g_pm_spare:
 	.zero	8
 	.section	.bss.g_retryMode,"aw",@nobits
-	.set	.LANCHOR2,. + 0
+	.set	.LANCHOR9,. + 0
 	.type	g_retryMode, %object
 	.size	g_retryMode, 1
 g_retryMode:
 	.zero	1
 	.section	.bss.g_slc_mode_addr2,"aw",@nobits
-	.set	.LANCHOR12,. + 0
+	.set	.LANCHOR19,. + 0
 	.type	g_slc_mode_addr2, %object
 	.size	g_slc_mode_addr2, 1
 g_slc_mode_addr2:
@@ -18766,254 +20098,359 @@ g_slc_mode_enable:
 	.zero	1
 	.section	.bss.g_slc_page_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR97,. + 0
+	.set	.LANCHOR121,. + 0
 	.type	g_slc_page_num, %object
 	.size	g_slc_page_num, 2
 g_slc_page_num:
 	.zero	2
 	.section	.bss.g_totle_phy_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR99,. + 0
+	.set	.LANCHOR123,. + 0
 	.type	g_totle_phy_block, %object
 	.size	g_totle_phy_block, 2
 g_totle_phy_block:
 	.zero	2
 	.section	.bss.gc_des_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR109,. + 0
+	.set	.LANCHOR133,. + 0
 	.type	gc_des_ppa_tbl, %object
 	.size	gc_des_ppa_tbl, 8
 gc_des_ppa_tbl:
 	.zero	8
+	.section	.bss.gc_free_slc_sblk_th,"aw",@nobits
+	.align	1
+	.set	.LANCHOR73,. + 0
+	.type	gc_free_slc_sblk_th, %object
+	.size	gc_free_slc_sblk_th, 2
+gc_free_slc_sblk_th:
+	.zero	2
 	.section	.bss.gc_lpa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR107,. + 0
+	.set	.LANCHOR131,. + 0
 	.type	gc_lpa_tbl, %object
 	.size	gc_lpa_tbl, 8
 gc_lpa_tbl:
 	.zero	8
 	.section	.bss.gc_mode,"aw",@nobits
-	.set	.LANCHOR67,. + 0
+	.set	.LANCHOR70,. + 0
 	.type	gc_mode, %object
 	.size	gc_mode, 1
 gc_mode:
 	.zero	1
 	.section	.bss.gc_page_buf_id,"aw",@nobits
 	.align	3
-	.set	.LANCHOR65,. + 0
+	.set	.LANCHOR68,. + 0
 	.type	gc_page_buf_id, %object
 	.size	gc_page_buf_id, 8
 gc_page_buf_id:
 	.zero	8
 	.section	.bss.gc_pre_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR108,. + 0
+	.set	.LANCHOR132,. + 0
 	.type	gc_pre_ppa_tbl, %object
 	.size	gc_pre_ppa_tbl, 8
 gc_pre_ppa_tbl:
 	.zero	8
+	.section	.bss.gc_slc_cache_index,"aw",@nobits
+	.align	1
+	.set	.LANCHOR77,. + 0
+	.type	gc_slc_cache_index, %object
+	.size	gc_slc_cache_index, 2
+gc_slc_cache_index:
+	.zero	2
+	.section	.bss.gc_slc_data_index,"aw",@nobits
+	.align	1
+	.set	.LANCHOR81,. + 0
+	.type	gc_slc_data_index, %object
+	.size	gc_slc_data_index, 2
+gc_slc_data_index:
+	.zero	2
+	.section	.bss.gc_slc_mode_tlc_vpn_th,"aw",@nobits
+	.align	1
+	.set	.LANCHOR79,. + 0
+	.type	gc_slc_mode_tlc_vpn_th, %object
+	.size	gc_slc_mode_tlc_vpn_th, 2
+gc_slc_mode_tlc_vpn_th:
+	.zero	2
 	.section	.bss.gc_slc_mode_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR57,. + 0
+	.set	.LANCHOR62,. + 0
 	.type	gc_slc_mode_vpn_th, %object
 	.size	gc_slc_mode_vpn_th, 2
 gc_slc_mode_vpn_th:
 	.zero	2
 	.section	.bss.gc_state,"aw",@nobits
-	.set	.LANCHOR104,. + 0
+	.set	.LANCHOR130,. + 0
 	.type	gc_state, %object
 	.size	gc_state, 1
 gc_state:
 	.zero	1
 	.section	.bss.gc_tlc_mode_slc_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR105,. + 0
+	.set	.LANCHOR88,. + 0
 	.type	gc_tlc_mode_slc_vpn_th, %object
 	.size	gc_tlc_mode_slc_vpn_th, 2
 gc_tlc_mode_slc_vpn_th:
 	.zero	2
 	.section	.bss.gc_tlc_mode_tlc_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR106,. + 0
+	.set	.LANCHOR85,. + 0
 	.type	gc_tlc_mode_tlc_vpn_th, %object
 	.size	gc_tlc_mode_tlc_vpn_th, 2
 gc_tlc_mode_tlc_vpn_th:
 	.zero	2
 	.section	.bss.gc_valid_page_ppa,"aw",@nobits
 	.align	3
-	.set	.LANCHOR61,. + 0
+	.set	.LANCHOR64,. + 0
 	.type	gc_valid_page_ppa, %object
 	.size	gc_valid_page_ppa, 8
 gc_valid_page_ppa:
 	.zero	8
-	.section	.bss.gpNandParaInfo,"aw",@nobits
-	.align	3
-	.set	.LANCHOR34,. + 0
-	.type	gpNandParaInfo, %object
-	.size	gpNandParaInfo, 8
-gpNandParaInfo:
-	.zero	8
+	.section	.bss.gc_xlc_data_index,"aw",@nobits
+	.align	1
+	.set	.LANCHOR78,. + 0
+	.type	gc_xlc_data_index, %object
+	.size	gc_xlc_data_index, 2
+gc_xlc_data_index:
+	.zero	2
 	.section	.bss.gp_blk_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR59,. + 0
+	.set	.LANCHOR3,. + 0
 	.type	gp_blk_info, %object
 	.size	gp_blk_info, 8
 gp_blk_info:
+	.zero	8
+	.section	.bss.gp_data_slc_cache_head,"aw",@nobits
+	.align	3
+	.set	.LANCHOR76,. + 0
+	.type	gp_data_slc_cache_head, %object
+	.size	gp_data_slc_cache_head, 8
+gp_data_slc_cache_head:
+	.zero	8
+	.section	.bss.gp_data_slc_data_head,"aw",@nobits
+	.align	3
+	.set	.LANCHOR75,. + 0
+	.type	gp_data_slc_data_head, %object
+	.size	gp_data_slc_data_head, 8
+gp_data_slc_data_head:
+	.zero	8
+	.section	.bss.gp_data_xlc_data_head,"aw",@nobits
+	.align	3
+	.set	.LANCHOR74,. + 0
+	.type	gp_data_xlc_data_head, %object
+	.size	gp_data_xlc_data_head, 8
+gp_data_xlc_data_head:
 	.zero	8
 	.section	.bss.gp_flash_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR5,. + 0
+	.set	.LANCHOR12,. + 0
 	.type	gp_flash_info, %object
 	.size	gp_flash_info, 8
 gp_flash_info:
+	.zero	8
+	.section	.bss.gp_free_mix_head,"aw",@nobits
+	.align	3
+	.set	.LANCHOR94,. + 0
+	.type	gp_free_mix_head, %object
+	.size	gp_free_mix_head, 8
+gp_free_mix_head:
+	.zero	8
+	.section	.bss.gp_free_slc_head,"aw",@nobits
+	.align	3
+	.set	.LANCHOR90,. + 0
+	.type	gp_free_slc_head, %object
+	.size	gp_free_slc_head, 8
+gp_free_slc_head:
+	.zero	8
+	.section	.bss.gp_free_xlc_head,"aw",@nobits
+	.align	3
+	.set	.LANCHOR92,. + 0
+	.type	gp_free_xlc_head, %object
+	.size	gp_free_xlc_head, 8
+gp_free_xlc_head:
 	.zero	8
 	.section	.bss.gp_ftl_ext_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR60,. + 0
+	.set	.LANCHOR5,. + 0
 	.type	gp_ftl_ext_info, %object
 	.size	gp_ftl_ext_info, 8
 gp_ftl_ext_info:
 	.zero	8
 	.section	.bss.gp_ftl_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR46,. + 0
+	.set	.LANCHOR53,. + 0
 	.type	gp_ftl_info, %object
 	.size	gp_ftl_info, 8
 gp_ftl_info:
+	.zero	8
+	.section	.bss.gp_nand_para_info,"aw",@nobits
+	.align	3
+	.set	.LANCHOR41,. + 0
+	.type	gp_nand_para_info, %object
+	.size	gp_nand_para_info, 8
+gp_nand_para_info:
 	.zero	8
 	.section	.bss.gp_nandc,"aw",@nobits
 	.align	3
-	.set	.LANCHOR6,. + 0
+	.set	.LANCHOR13,. + 0
 	.type	gp_nandc, %object
 	.size	gp_nandc, 8
 gp_nandc:
+	.zero	8
+	.section	.bss.gp_sblk_list_tbl,"aw",@nobits
+	.align	3
+	.set	.LANCHOR0,. + 0
+	.type	gp_sblk_list_tbl, %object
+	.size	gp_sblk_list_tbl, 8
+gp_sblk_list_tbl:
 	.zero	8
 	.section	.bss.lpa_hash,"aw",@nobits
 	.align	3
-	.set	.LANCHOR81,. + 0
+	.set	.LANCHOR104,. + 0
 	.type	lpa_hash, %object
 	.size	lpa_hash, 512
 lpa_hash:
 	.zero	512
 	.section	.bss.lpa_hash_index,"aw",@nobits
 	.align	3
-	.set	.LANCHOR83,. + 0
+	.set	.LANCHOR106,. + 0
 	.type	lpa_hash_index, %object
 	.size	lpa_hash_index, 8
 lpa_hash_index:
 	.zero	8
 	.section	.bss.nandc_hw_seed,"aw",@nobits
-	.set	.LANCHOR28,. + 0
+	.set	.LANCHOR35,. + 0
 	.type	nandc_hw_seed, %object
 	.size	nandc_hw_seed, 1
 nandc_hw_seed:
 	.zero	1
 	.section	.bss.nandc_randomizer_en,"aw",@nobits
-	.set	.LANCHOR29,. + 0
+	.set	.LANCHOR36,. + 0
 	.type	nandc_randomizer_en, %object
 	.size	nandc_randomizer_en, 1
 nandc_randomizer_en:
 	.zero	1
 	.section	.bss.p_free_buf_head,"aw",@nobits
-	.set	.LANCHOR37,. + 0
+	.set	.LANCHOR44,. + 0
 	.type	p_free_buf_head, %object
 	.size	p_free_buf_head, 1
 p_free_buf_head:
 	.zero	1
 	.section	.bss.p_read_ahead_ext_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR50,. + 0
+	.set	.LANCHOR57,. + 0
 	.type	p_read_ahead_ext_buf, %object
 	.size	p_read_ahead_ext_buf, 8
 p_read_ahead_ext_buf:
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 	.section	.bss.pm_gc_enable,"aw",@nobits
 	.align	2
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+	.set	.LANCHOR115,. + 0
 	.type	pm_gc_enable, %object
 	.size	pm_gc_enable, 4
 pm_gc_enable:
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 	.section	.bss.pm_last_load_ram_id,"aw",@nobits
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+	.set	.LANCHOR175,. + 0
 	.type	pm_last_load_ram_id, %object
 	.size	pm_last_load_ram_id, 1
 pm_last_load_ram_id:
 	.zero	1
 	.section	.bss.pm_last_update_ram_id,"aw",@nobits
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 	.type	pm_last_update_ram_id, %object
 	.size	pm_last_update_ram_id, 1
 pm_last_update_ram_id:
 	.zero	1
 	.section	.bss.pm_ram_info,"aw",@nobits
 	.align	3
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 	.size	pm_ram_info, 512
 pm_ram_info:
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 	.section	.bss.read_ahead_lpa,"aw",@nobits
 	.align	2
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 	.size	read_ahead_lpa, 4
 read_ahead_lpa:
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 	.section	.bss.sblk_gc_write_completed_queue_head,"aw",@nobits
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 	.section	.bss.sblk_queue_head,"aw",@nobits
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 	.size	sblk_queue_head, 1
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 	.section	.bss.sblk_read_completed_queue_head,"aw",@nobits
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 	.size	sblk_read_completed_queue_head, 1
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 	.section	.bss.sblk_write_completed_queue_head,"aw",@nobits
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 	.type	sblk_write_completed_queue_head, %object
 	.size	sblk_write_completed_queue_head, 1
 sblk_write_completed_queue_head:
 	.zero	1
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+	.align	1
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+	.type	slc_cache_sblk, %object
+	.size	slc_cache_sblk, 2
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+	.type	slc_data_sblk, %object
+	.size	slc_data_sblk, 2
+slc_data_sblk:
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 	.section	.bss.write_buf_count,"aw",@nobits
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 	.type	write_buf_count, %object
 	.size	write_buf_count, 1
 write_buf_count:
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 	.section	.bss.write_buf_head,"aw",@nobits
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 	.size	write_buf_head, 1
 write_buf_head:
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 	.section	.bss.write_commit_count,"aw",@nobits
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 write_commit_count:
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 write_commit_head:
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-	.section	.data.NandFlashParaTbl,"aw",@progbits
+	.section	.bss.xlc_data_sblk,"aw",@nobits
+	.align	1
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+	.type	xlc_data_sblk, %object
+	.size	xlc_data_sblk, 2
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+	.section	.data.g_nand_para_info,"aw",@progbits
 	.align	3
-	.set	.LANCHOR142,. + 0
-	.type	NandFlashParaTbl, %object
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-NandFlashParaTbl:
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@@ -19030,750 +20467,903 @@ NandFlashParaTbl:
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-	.set	.LANCHOR124,. + 0
-	.type	__func__.8500, %object
-	.size	__func__.8500, 26
-__func__.8500:
+	.set	.LANCHOR148,. + 0
+	.type	__func__.8584, %object
+	.size	__func__.8584, 26
+__func__.8584:
 	.string	"flash_start_tlc_page_prog"
-	.section	.rodata.__func__.8513,"a",@progbits
+	.section	.rodata.__func__.8597,"a",@progbits
 	.align	3
-	.set	.LANCHOR125,. + 0
-	.type	__func__.8513, %object
-	.size	__func__.8513, 22
-__func__.8513:
+	.set	.LANCHOR149,. + 0
+	.type	__func__.8597, %object
+	.size	__func__.8597, 22
+__func__.8597:
 	.string	"flash_start_page_prog"
-	.section	.rodata.__func__.8526,"a",@progbits
+	.section	.rodata.__func__.8610,"a",@progbits
 	.align	3
-	.set	.LANCHOR33,. + 0
-	.type	__func__.8526, %object
-	.size	__func__.8526, 22
-__func__.8526:
+	.set	.LANCHOR40,. + 0
+	.type	__func__.8610, %object
+	.size	__func__.8610, 22
+__func__.8610:
 	.string	"flash_start_page_read"
-	.section	.rodata.__func__.8541,"a",@progbits
+	.section	.rodata.__func__.8625,"a",@progbits
 	.align	3
-	.set	.LANCHOR120,. + 0
-	.type	__func__.8541, %object
-	.size	__func__.8541, 25
-__func__.8541:
+	.set	.LANCHOR144,. + 0
+	.type	__func__.8625, %object
+	.size	__func__.8625, 25
+__func__.8625:
 	.string	"flash_complete_page_read"
-	.section	.rodata.__func__.9099,"a",@progbits
+	.section	.rodata.__func__.9169,"a",@progbits
 	.align	3
-	.set	.LANCHOR39,. + 0
-	.type	__func__.9099, %object
-	.size	__func__.9099, 13
-__func__.9099:
+	.set	.LANCHOR46,. + 0
+	.type	__func__.9169, %object
+	.size	__func__.9169, 13
+__func__.9169:
 	.string	"buf_add_tail"
-	.section	.rodata.__func__.9112,"a",@progbits
+	.section	.rodata.__func__.9182,"a",@progbits
 	.align	3
-	.set	.LANCHOR40,. + 0
-	.type	__func__.9112, %object
-	.size	__func__.9112, 10
-__func__.9112:
+	.set	.LANCHOR47,. + 0
+	.type	__func__.9182, %object
+	.size	__func__.9182, 10
+__func__.9182:
 	.string	"buf_alloc"
-	.section	.rodata.__func__.9126,"a",@progbits
+	.section	.rodata.__func__.9196,"a",@progbits
 	.align	3
-	.set	.LANCHOR41,. + 0
-	.type	__func__.9126, %object
-	.size	__func__.9126, 16
-__func__.9126:
+	.set	.LANCHOR48,. + 0
+	.type	__func__.9196, %object
+	.size	__func__.9196, 16
+__func__.9196:
 	.string	"buf_remove_free"
-	.section	.rodata.__func__.9234,"a",@progbits
+	.section	.rodata.__func__.9312,"a",@progbits
 	.align	3
-	.set	.LANCHOR100,. + 0
-	.type	__func__.9234, %object
-	.size	__func__.9234, 17
-__func__.9234:
+	.set	.LANCHOR124,. + 0
+	.type	__func__.9312, %object
+	.size	__func__.9312, 17
+__func__.9312:
 	.string	"lpa_rebuild_hash"
-	.section	.rodata.__func__.9286,"a",@progbits
+	.section	.rodata.__func__.9364,"a",@progbits
 	.align	3
-	.set	.LANCHOR167,. + 0
-	.type	__func__.9286, %object
-	.size	__func__.9286, 17
-__func__.9286:
+	.set	.LANCHOR189,. + 0
+	.type	__func__.9364, %object
+	.size	__func__.9364, 17
+__func__.9364:
 	.string	"ftl_write_commit"
-	.section	.rodata.__func__.9297,"a",@progbits
+	.section	.rodata.__func__.9375,"a",@progbits
 	.align	3
-	.set	.LANCHOR44,. + 0
-	.type	__func__.9297, %object
-	.size	__func__.9297, 14
-__func__.9297:
+	.set	.LANCHOR51,. + 0
+	.type	__func__.9375, %object
+	.size	__func__.9375, 14
+__func__.9375:
 	.string	"ftl_write_buf"
-	.section	.rodata.__func__.9345,"a",@progbits
+	.section	.rodata.__func__.9426,"a",@progbits
 	.align	3
-	.set	.LANCHOR152,. + 0
-	.type	__func__.9345, %object
-	.size	__func__.9345, 15
-__func__.9345:
+	.set	.LANCHOR176,. + 0
+	.type	__func__.9426, %object
+	.size	__func__.9426, 15
+__func__.9426:
 	.string	"ftl_read_ahead"
-	.section	.rodata.__func__.9353,"a",@progbits
+	.section	.rodata.__func__.9434,"a",@progbits
 	.align	3
-	.set	.LANCHOR48,. + 0
-	.type	__func__.9353, %object
-	.size	__func__.9353, 13
-__func__.9353:
+	.set	.LANCHOR55,. + 0
+	.type	__func__.9434, %object
+	.size	__func__.9434, 13
+__func__.9434:
 	.string	"ftl_read_buf"
-	.section	.rodata.__func__.9391,"a",@progbits
+	.section	.rodata.__func__.9472,"a",@progbits
 	.align	3
-	.set	.LANCHOR157,. + 0
-	.type	__func__.9391, %object
-	.size	__func__.9391, 9
-__func__.9391:
-	.string	"ftl_read"
-	.section	.rodata.__func__.9417,"a",@progbits
+	.set	.LANCHOR185,. + 0
+	.type	__func__.9472, %object
+	.size	__func__.9472, 10
+__func__.9472:
+	.string	"zftl_read"
+	.section	.rodata.__func__.9498,"a",@progbits
 	.align	3
-	.set	.LANCHOR169,. + 0
-	.type	__func__.9417, %object
-	.size	__func__.9417, 12
-__func__.9417:
-	.string	"ftl_discard"
-	.section	.rodata.__func__.9438,"a",@progbits
+	.set	.LANCHOR195,. + 0
+	.type	__func__.9498, %object
+	.size	__func__.9498, 13
+__func__.9498:
+	.string	"_ftl_discard"
+	.section	.rodata.__func__.9539,"a",@progbits
 	.align	3
-	.set	.LANCHOR158,. + 0
-	.type	__func__.9438, %object
-	.size	__func__.9438, 10
-__func__.9438:
+	.set	.LANCHOR186,. + 0
+	.type	__func__.9539, %object
+	.size	__func__.9539, 10
+__func__.9539:
 	.string	"vpn_check"
-	.section	.rodata.__func__.9463,"a",@progbits
-	.align	3
-	.set	.LANCHOR159,. + 0
-	.type	__func__.9463, %object
-	.size	__func__.9463, 15
-__func__.9463:
-	.string	"ftl_info_check"
-	.section	.rodata.__func__.9572,"a",@progbits
+	.section	.rodata.__func__.9661,"a",@progbits
 	.align	3
-	.set	.LANCHOR55,. + 0
-	.type	__func__.9572, %object
-	.size	__func__.9572, 12
-__func__.9572:
+	.set	.LANCHOR61,. + 0
+	.type	__func__.9661, %object
+	.size	__func__.9661, 12
+__func__.9661:
 	.string	"gc_add_sblk"
-	.section	.rodata.__func__.9615,"a",@progbits
+	.section	.rodata.__func__.9679,"a",@progbits
 	.align	3
-	.set	.LANCHOR122,. + 0
-	.type	__func__.9615, %object
-	.size	__func__.9615, 21
-__func__.9615:
+	.set	.LANCHOR146,. + 0
+	.type	__func__.9679, %object
+	.size	__func__.9679, 21
+__func__.9679:
 	.string	"gc_check_data_one_wl"
-	.section	.rodata.__func__.9649,"a",@progbits
+	.section	.rodata.__func__.9713,"a",@progbits
 	.align	3
-	.set	.LANCHOR153,. + 0
-	.type	__func__.9649, %object
-	.size	__func__.9649, 22
-__func__.9649:
+	.set	.LANCHOR182,. + 0
+	.type	__func__.9713, %object
+	.size	__func__.9713, 22
+__func__.9713:
 	.string	"gc_update_l2p_map_new"
-	.section	.rodata.__func__.9662,"a",@progbits
+	.section	.rodata.__func__.9726,"a",@progbits
 	.align	3
-	.set	.LANCHOR63,. + 0
-	.type	__func__.9662, %object
-	.size	__func__.9662, 19
-__func__.9662:
+	.set	.LANCHOR66,. + 0
+	.type	__func__.9726, %object
+	.size	__func__.9726, 19
+__func__.9726:
 	.string	"gc_write_completed"
-	.section	.rodata.__func__.9691,"a",@progbits
+	.section	.rodata.__func__.9755,"a",@progbits
 	.align	3
-	.set	.LANCHOR170,. + 0
-	.type	__func__.9691, %object
-	.size	__func__.9691, 16
-__func__.9691:
+	.set	.LANCHOR191,. + 0
+	.type	__func__.9755, %object
+	.size	__func__.9755, 16
+__func__.9755:
 	.string	"gc_do_copy_back"
-	.section	.rodata.__func__.9713,"a",@progbits
+	.section	.rodata.__func__.9777,"a",@progbits
 	.align	3
-	.set	.LANCHOR73,. + 0
-	.type	__func__.9713, %object
-	.size	__func__.9713, 16
-__func__.9713:
+	.set	.LANCHOR97,. + 0
+	.type	__func__.9777, %object
+	.size	__func__.9777, 16
+__func__.9777:
 	.string	"gc_free_src_blk"
-	.section	.rodata.__func__.9758,"a",@progbits
+	.section	.rodata.__func__.9822,"a",@progbits
 	.align	3
-	.set	.LANCHOR160,. + 0
-	.type	__func__.9758, %object
-	.size	__func__.9758, 16
-__func__.9758:
+	.set	.LANCHOR187,. + 0
+	.type	__func__.9822, %object
+	.size	__func__.9822, 16
+__func__.9822:
 	.string	"gc_scan_src_blk"
-	.section	.rodata.__func__.9790,"a",@progbits
-	.align	3
-	.set	.LANCHOR156,. + 0
-	.type	__func__.9790, %object
-	.size	__func__.9790, 18
-__func__.9790:
-	.string	"gc_search_src_blk"
-	.section	.rodata.__func__.9806,"a",@progbits
+	.section	.rodata.__func__.9881,"a",@progbits
 	.align	3
-	.set	.LANCHOR154,. + 0
-	.type	__func__.9806, %object
-	.size	__func__.9806, 20
-__func__.9806:
+	.set	.LANCHOR183,. + 0
+	.type	__func__.9881, %object
+	.size	__func__.9881, 20
+__func__.9881:
 	.string	"gc_scan_static_data"
-	.section	.rodata.__func__.9867,"a",@progbits
+	.section	.rodata.__func__.9942,"a",@progbits
 	.align	3
-	.set	.LANCHOR172,. + 0
-	.type	__func__.9867, %object
-	.size	__func__.9867, 6
-__func__.9867:
-	.string	"do_gc"
-	.section	.rodata.__func__.9928,"a",@progbits
-	.align	3
-	.set	.LANCHOR132,. + 0
-	.type	__func__.9928, %object
-	.size	__func__.9928, 15
-__func__.9928:
-	.string	"ftl_info_flush"
-	.section	.rodata.__func__.9977,"a",@progbits
-	.align	3
-	.set	.LANCHOR72,. + 0
-	.type	__func__.9977, %object
-	.size	__func__.9977, 14
-__func__.9977:
-	.string	"ftl_free_sblk"
-	.section	.rodata.do_gc.str1.1,"aMS",@progbits,1
-.LC153:
-	.string	"gc %d: %d %d %d %d %d %d\n"
-.LC154:
-	.string	"GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\n"
-.LC155:
-	.string	"gc free %x, %d\n"
+	.set	.LANCHOR193,. + 0
+	.type	__func__.9942, %object
+	.size	__func__.9942, 11
+__func__.9942:
+	.string	"zftl_do_gc"
+	.section	.rodata._list_remove_node.str1.1,"aMS",@progbits,1
+.LC0:
+	.string	"\n!!!!! error @ func:%s - line:%d\n"
 	.section	.rodata.dump_ftl_info.str1.1,"aMS",@progbits,1
-.LC81:
+.LC90:
 	.string	"g_ftl_info_blk blk:0x%x, index:0x%x, page:0x%x\n"
-.LC82:
+.LC91:
 	.string	"ftl_ext_info_blk blk:0x%x, page:0x%x\n"
-.LC83:
+.LC92:
 	.string	"ac_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC84:
+.LC93:
 	.string	"tmp_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC85:
+.LC94:
 	.string	"gc_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC86:
+.LC95:
 	.string	"lpa:"
-.LC87:
+.LC96:
 	.string	"vpn:"
-.LC88:
+.LC97:
 	.string	"sblk:"
-.LC89:
+.LC98:
 	.string	"lpa_hash:"
-.LC90:
+.LC99:
 	.string	"lpa_hash_index:"
 	.section	.rodata.dump_sblk_queue.str1.1,"aMS",@progbits,1
-.LC24:
+.LC29:
 	.string	"dump_sblk_queue: %d\n"
-.LC25:
+.LC30:
 	.string	"buf id= %d state = %d ppa = %x\n"
 	.section	.rodata.flash_complete_page_read.str1.1,"aMS",@progbits,1
-.LC54:
+.LC63:
 	.string	"flash_complete_page_read %x %x error_ecc %d %d\n"
 	.section	.rodata.flash_ddr_tunning_read.str1.1,"aMS",@progbits,1
-.LC48:
+.LC57:
 	.string	"%d flash_ddr_tunning_read %x ecc=%d\n"
-.LC49:
+.LC58:
 	.string	"sync para %d\n"
-.LC50:
+.LC59:
 	.string	"DDR mode Read error %x %x\n"
 	.section	.rodata.flash_erase_all.str1.1,"aMS",@progbits,1
 .LC5:
@@ -21034,152 +22495,132 @@ __func__.9977:
 .LC2:
 	.string	"flash_erase_duplane_block pageadd = %x status = %x\n"
 	.section	.rodata.flash_info_blk_init.str1.1,"aMS",@progbits,1
-.LC53:
+.LC62:
 	.string	"no sys info %x\n"
 	.section	.rodata.flash_info_flush.str1.1,"aMS",@progbits,1
-.LC77:
+.LC86:
 	.string	"finfo:"
-.LC78:
+.LC87:
 	.string	"flash_info_flush id = %x, page = %x\n"
-.LC79:
+.LC88:
 	.string	"sys_info_flush error:%x\n"
 	.section	.rodata.flash_mask_bad_block.str1.1,"aMS",@progbits,1
-.LC6:
+.LC7:
 	.string	"flash_mask_bad_block %d %d\n"
 	.section	.rodata.flash_prog_page.str1.1,"aMS",@progbits,1
-.LC57:
+.LC66:
 	.string	"flash_prog_page %x %x %x\n"
 	.section	.rodata.flash_prog_page_en.str1.1,"aMS",@progbits,1
-.LC59:
+.LC68:
 	.string	"flash_prog_page_en:%x %x\n"
-.LC60:
+.LC69:
 	.string	"spare"
-.LC61:
+.LC70:
 	.string	"data"
-.LC62:
+.LC71:
 	.string	"write error: %x\n"
+	.section	.rodata.flash_read_id.str1.1,"aMS",@progbits,1
+.LC6:
+	.string	"No.%d FLASH ID:%x %x %x %x %x %x\n"
 	.section	.rodata.flash_read_page.str1.1,"aMS",@progbits,1
-.LC41:
+.LC51:
 	.string	"flash_read_page %x %x %x\n"
 	.section	.rodata.flash_read_page_en.str1.1,"aMS",@progbits,1
-.LC51:
+.LC60:
 	.string	"flash_read_page_en %x %x\n"
-.LC52:
+.LC61:
 	.string	"flash_read_page_en %x %x error_ecc %d %d\n"
-	.section	.rodata.flash_wait_device_ready_raw.str1.1,"aMS",@progbits,1
-.LC0:
-	.string	"\n!!!!! error @ func:%s - line:%d\n"
 	.section	.rodata.ftl_alloc_sblk.str1.1,"aMS",@progbits,1
-.LC14:
-	.string	"ftl_alloc_sblk %x, %d %d %d\n"
-	.section	.rodata.ftl_discard.str1.1,"aMS",@progbits,1
-.LC148:
-	.string	"ftl_discard:(%x, %x, %x, %x)\n"
+.LC28:
+	.string	"alloc sblk %x %d\n"
 	.section	.rodata.ftl_info_blk_init.str1.1,"aMS",@progbits,1
-.LC65:
-	.string	"%d %x @%d %x\n"
-.LC66:
-	.string	"ftl_info_blk_init %d %d %x\n"
-	.section	.rodata.ftl_info_check.str1.1,"aMS",@progbits,1
-.LC122:
-	.string	"free blk vpn error: %x %x\n"
-.LC123:
-	.string	"data blk: %d %d %d\n"
-.LC124:
-	.string	"free blk: %d %d %d\n"
+.LC74:
+	.string	"%d %x @%d %x\n"
+.LC75:
+	.string	"ftl_info_blk_init %d %d %x\n"
 	.section	.rodata.ftl_info_flush.str1.1,"aMS",@progbits,1
-.LC64:
+.LC73:
 	.string	"g_ftl_info_blk blk = %x, page = %x version = %d\n"
-	.section	.rodata.ftl_init.str1.1,"aMS",@progbits,1
-.LC139:
-	.string	"FTL version: 6.0.3 20180211"
-.LC140:
-	.string	"gp_ftl_ext_info %p %p %p\n"
-.LC141:
-	.string	"flash info size: %d %d %d\n"
 	.section	.rodata.ftl_low_format.str1.1,"aMS",@progbits,1
-.LC67:
+.LC76:
 	.string	"low format %d %d %d %d\n"
 	.section	.rodata.ftl_mask_bad_block.str1.1,"aMS",@progbits,1
-.LC19:
+.LC22:
 	.string	"mask bad block:cs %x block: %x\n"
 	.section	.rodata.ftl_open_sblk_recovery.str1.1,"aMS",@progbits,1
-.LC69:
+.LC78:
 	.string	"saved_active_page  = %x\n"
-.LC70:
+.LC79:
 	.string	"saved_active_plane = %x\n"
-.LC71:
+.LC80:
 	.string	"sblk = %x\n"
-.LC72:
+.LC81:
 	.string	"phy_blk = %x %x\n"
-.LC73:
+.LC82:
 	.string	"blk= %x, page=%x, ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
-.LC74:
+.LC83:
 	.string	"sblk = %x, vpn0 = %d, vpn1 = %d\n"
-.LC75:
+.LC84:
 	.string	"dump write = %x\n"
 	.section	.rodata.ftl_re_low_format_test.str1.1,"aMS",@progbits,1
-.LC68:
-	.string	"re low formaet %d\n"
-	.section	.rodata.ftl_read.str1.1,"aMS",@progbits,1
-.LC114:
-	.string	"ftl_read refresh =%x, lpa = %x, ppa= %x\n"
+.LC77:
+	.string	"re low format %d\n"
 	.section	.rodata.ftl_read_ahead.str1.1,"aMS",@progbits,1
-.LC100:
+.LC109:
 	.string	"ftl_read_ahead refresh =%x, lpa = %x, ppa= %x\n"
-.LC101:
+.LC110:
 	.string	"id=%d, lpa = %x, ppa = %x spare = %x %x %x %x\n"
 	.section	.rodata.ftl_sblk_dump.str1.1,"aMS",@progbits,1
-.LC107:
+.LC122:
 	.string	"ftl_sblk_dump = %x %x %x %x\n"
-.LC108:
+.LC123:
 	.string	"page_addr = %x, lpa=%x vpn = %d\n"
-.LC109:
+.LC124:
 	.string	"index= %x, lpa=%x\n"
-.LC110:
+.LC125:
 	.string	"block = %x, vpn=%x check vpn = %d\n"
 	.section	.rodata.ftl_scan_all_data.str1.1,"aMS",@progbits,1
-.LC127:
+.LC138:
 	.string	"ftl_scan_all_data = %x\n"
-.LC128:
+.LC139:
 	.string	"scan lpa = %x ppa= %x\n"
-.LC129:
+.LC140:
 	.string	"lba = %x,addr= %x, ststus = %x, spare= %x %x %x %x data=%x %x\n"
-.LC130:
+.LC141:
 	.string	"lba = %x, id= %x, index = %x hash ppa = %x\n"
-.LC131:
+.LC142:
 	.string	"0pm:"
-.LC132:
+.LC143:
 	.string	"1pm:"
 	.section	.rodata.ftl_sysblk_dump.str1.1,"aMS",@progbits,1
-.LC80:
+.LC89:
 	.string	"l2p:"
 	.section	.rodata.ftl_test_block.str1.1,"aMS",@progbits,1
-.LC63:
+.LC72:
 	.string	"low format %d\n"
 	.section	.rodata.ftl_update_l2p_map.str1.1,"aMS",@progbits,1
-.LC143:
-	.string	"ftl_update_l2p_map: %x %x %x\n"
 .LC144:
-	.string	"ftl_update_l2p_map"
+	.string	"ftl_update_l2p_map: %x %x %x\n"
 .LC145:
-	.string	"lpa_tbl:"
+	.string	"ftl_update_l2p_map"
 .LC146:
+	.string	"lpa_tbl:"
+.LC147:
 	.string	"sblk %x vpn: %d %d\n"
 	.section	.rodata.ftl_vpn_decrement.str1.1,"aMS",@progbits,1
-.LC17:
+.LC20:
 	.string	"ftl_vpn_decrement %x = %d\n"
 	.section	.rodata.ftl_write_commit.str1.1,"aMS",@progbits,1
-.LC147:
+.LC148:
 	.string	"%d read error: ppa:%x, lpa:%x, status:%x\n"
 	.section	.rodata.ftl_write_completed.str1.1,"aMS",@progbits,1
-.LC18:
+.LC21:
 	.string	"ftl prog error =%x, lpa = %x, ppa= %x\n"
 	.section	.rodata.gc_add_sblk.str1.1,"aMS",@progbits,1
-.LC7:
+.LC8:
 	.string	"gc_add_sblk = %d, %d, %d, %d, %d, %d\n"
 	.section	.rodata.gc_check_data_one_wl.str1.1,"aMS",@progbits,1
-.LC56:
+.LC65:
 	.string	"1ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
 	.section	.rodata.gc_do_copy_back.str1.1,"aMS",@progbits,1
 .LC149:
@@ -21191,137 +22632,140 @@ __func__.9977:
 .LC152:
 	.string	"%d prog_step: %x %x buf id= %x ppa = %x hash=%x id = %x plane = %x lpa=%x\n"
 	.section	.rodata.gc_free_src_blk.str1.1,"aMS",@progbits,1
-.LC15:
+.LC18:
 	.string	"gc_free_src_blk = %x, vpn = %d\n"
-.LC16:
+.LC19:
 	.string	"gc_free_src_blk %x, %d\n"
 	.section	.rodata.gc_free_temp_buf.str1.1,"aMS",@progbits,1
-.LC10:
+.LC11:
 	.string	"%d gc_free_temp_buf buf id= %x\n"
 	.section	.rodata.gc_recovery.str1.1,"aMS",@progbits,1
-.LC133:
+.LC111:
 	.string	"ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
-.LC134:
-	.string	"gc_lpa:"
-.LC135:
-	.string	"gc_ppa:"
-.LC136:
+.LC112:
 	.string	"ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
-.LC137:
+.LC113:
 	.string	"gc_recovery"
-.LC138:
+.LC114:
 	.string	"gc_recovery: %x vpn = %x\n"
 	.section	.rodata.gc_scan_src_blk.str1.1,"aMS",@progbits,1
-.LC125:
+.LC136:
 	.string	"gc_scan_src_blk = %x, vpn = %d\n"
-.LC126:
+.LC137:
 	.string	"gc_scan_src_blk = %x, s vpn0 = %d, c vpn1 = %d\n"
 	.section	.rodata.gc_search_src_blk.str1.1,"aMS",@progbits,1
-.LC111:
-	.string	"gc_search_src_blk = %d, %d, %d\n"
-.LC112:
-	.string	"vpn gc = %d, id = %d\n"
-.LC113:
-	.string	"gc_search_src_blk count= %d\n"
+.LC13:
+	.string	"zftl_get_gc_node cache = %x index = %d vpn = %x\n"
+.LC14:
+	.string	"gc_search_src_blk mode = %x, src mode = %x, count= %d %d\n"
 	.section	.rodata.gc_static_wearleveling.str1.1,"aMS",@progbits,1
-.LC11:
+.LC34:
 	.string	"gc_static_wearleveling: slc blk: %d, tlc blk: %d avg slc ec: %d, avg tlc ec: %d \n"
-.LC12:
-	.string	"gc_static_wearleveling: min slc ec: %d, min tlc ec: %d max slc ec: %d, max tlc ec: %d \n"
+.LC35:
+	.string	"gc_static_wearleveling: min slc ec: %d, min tlc ec: %d max slc ec: %d, max tlc ec: %d; %d %d\n"
+.LC36:
+	.string	"swl add tlc gc = %d, %d, %d, %d, %d, %d\n"
+.LC37:
+	.string	"swl add slc gc  = %d, %d, %d, %d, %d, %d\n"
 	.section	.rodata.gc_update_l2p_map_new.str1.1,"aMS",@progbits,1
-.LC102:
+.LC117:
 	.string	"gc_update_l2p_map_new sblk %x\n"
-.LC103:
+.LC118:
 	.string	"gc_update_l2p_map_new: %x %x %x\n"
-.LC104:
+.LC119:
 	.string	"0lpa: %x %x %x\n"
-.LC105:
+.LC120:
 	.string	"lpa: %x %x %x\n"
-.LC106:
+.LC121:
 	.string	"gc_update_l2p_map_new: %x vpn = %x vpn1 = %x done\n"
 	.section	.rodata.gc_write_completed.str1.1,"aMS",@progbits,1
-.LC8:
-	.string	"status: %x, ppa: %x\n"
 .LC9:
+	.string	"status: %x, ppa: %x\n"
+.LC10:
 	.string	"gc_write_completed: %x  %x  %x %x\n"
 	.section	.rodata.hynix_get_read_retry_default.str1.1,"aMS",@progbits,1
-.LC33:
+.LC43:
 	.string	"otp error! %d"
-.LC34:
+.LC44:
 	.string	"rr"
 	.section	.rodata.hynix_read_retrial.str1.1,"aMS",@progbits,1
-.LC47:
+.LC56:
 	.string	"hynix RR %d row=%x, count %d, status=%d\n"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",@progbits,1
-.LC92:
+.LC101:
 	.string	"region_id = %d, pm_max_region = %d\n"
-.LC93:
+.LC102:
 	.string	"load_l2p_region = %x,%x,%x, %x\n"
-.LC94:
+.LC103:
 	.string	"pm_ppa:"
-.LC95:
+.LC104:
 	.string	"data:"
-.LC96:
+.LC105:
 	.string	"spare:"
 	.section	.rodata.lpa_rebuild_hash.str1.1,"aMS",@progbits,1
-.LC28:
+.LC33:
 	.string	"%s %d %d\n"
 	.section	.rodata.micron_read_retrial.str1.1,"aMS",@progbits,1
-.LC42:
-	.string	"micron %d row=%x,count %d,status=%d\n"
-.LC43:
+.LC52:
 	.string	"micron RR %d row=%x,count %d,status=%d\n"
 	.section	.rodata.nandc_xfer.str1.1,"aMS",@progbits,1
-.LC39:
+.LC49:
 	.string	"dqs data abort %x\n"
-.LC40:
+.LC50:
 	.string	"xfer error %x\n"
 	.section	.rodata.nandc_xfer_done.str1.1,"aMS",@progbits,1
-.LC35:
+.LC45:
 	.string	"%d mtrans_cnt = %d page_num = %d\n"
-.LC36:
+.LC46:
 	.string	"nandc:"
-.LC37:
+.LC47:
 	.string	"%d flReg.d32=%x %x\n"
-.LC38:
+.LC48:
 	.string	"nandc_xfer_done read error %x\n"
 	.section	.rodata.pm_alloc_new_blk.str1.1,"aMS",@progbits,1
-.LC26:
+.LC31:
 	.string	"blk %x is bad block\n"
-.LC27:
+.LC32:
 	.string	"pm_alloc_new_blk: %x %x %x %x\n"
 	.section	.rodata.pm_init.str1.1,"aMS",@progbits,1
-.LC97:
+.LC106:
 	.string	"pm_init posr %x %x %x\n"
-.LC98:
+.LC107:
 	.string	"pm_init recovery %x %x %x\n"
 	.section	.rodata.pm_log2phys.str1.1,"aMS",@progbits,1
-.LC99:
+.LC108:
 	.string	"pm_log2phys  lpn = %d, max lpn = %d\n"
 	.section	.rodata.pm_ppa_update_check.str1.1,"aMS",@progbits,1
-.LC91:
+.LC100:
 	.string	"%s w error lpn = %x, max ppa = %d\n"
 	.section	.rodata.pm_write_page.str1.1,"aMS",@progbits,1
-.LC76:
+.LC85:
 	.string	"pm_write_page write error: %x\n"
 	.section	.rodata.print_ftl_debug_info.str1.1,"aMS",@progbits,1
-.LC20:
-	.string	"free blk: s:%x,t:%x,m:%x, data blk:s:%x,%x,t%x vpn: s:%x t:%x\n"
-.LC21:
+.LC23:
+	.string	"free blk: s:%x,t:%x,m:%x, data blk:s:%x,%x,t%x vpn: s:%x t:%x, max_vpn: %x\n"
+.LC24:
 	.string	"totle w: %d MB,r: %d MB %d dv:0x%X,poc:%d\n"
-.LC22:
+.LC25:
 	.string	"gc xlc page: %d,gc slc page: %d, tmp w: %d MB\n"
-.LC23:
+.LC26:
 	.string	"slc ec: %d,%d,%d,%d,%d,tlc ec: %d,%d,%d,%d,%d\n"
+.LC27:
+	.string	"gc th: tlc_tlc: %d tlc_slc: %d slc_slc: %d slc_tlc:%d free_th: %d\n"
 	.section	.rodata.print_gc_debug_info.str1.1,"aMS",@progbits,1
-.LC13:
-	.string	"gc: b:%x,p:%x,i:%x; free buf=%d %d\n"
+.LC12:
+	.string	"gc: b:%x,p:%x,i:%x; free buf=%d %d free slc th: %d\n"
+	.section	.rodata.print_list_info.str1.1,"aMS",@progbits,1
+.LC16:
+	.string	"list count:%p %d\n"
+.LC17:
+	.string	"%d: node:%x %x %x %x, %d %d %d %d %d\n"
 	.section	.rodata.queue_wait_first_req_completed.str1.1,"aMS",@progbits,1
-.LC55:
+.LC64:
 	.string	"set buf %d,status = %x, ppa = %x lun state = %d\n"
 	.section	.rodata.random_seed,"a",@progbits
 	.align	3
-	.set	.LANCHOR32,. + 0
+	.set	.LANCHOR39,. + 0
 	.type	random_seed, %object
 	.size	random_seed, 256
 random_seed:
@@ -21454,23 +22898,23 @@ random_seed:
 	.hword	17598
 	.hword	28087
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",@progbits,1
-.LC142:
-	.string	"ftl_init %x\n"
+.LC116:
+	.string	"zftl_init %x\n"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
-.LC29:
+.LC39:
 	.string	"%s 0x%x:"
-.LC30:
+.LC40:
 	.string	"%x "
-.LC31:
+.LC41:
 	.string	""
-.LC32:
+.LC42:
 	.string	"%s\n"
 	.section	.rodata.sblk_prog_page.str1.1,"aMS",@progbits,1
-.LC58:
+.LC67:
 	.string	"sblk_prog_page ppa = %x, count = %d\n"
 	.section	.rodata.toshiba_15ref_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR0,. + 0
+	.set	.LANCHOR7,. + 0
 	.type	toshiba_15ref_value, %object
 	.size	toshiba_15ref_value, 95
 toshiba_15ref_value:
@@ -21571,7 +23015,7 @@ toshiba_15ref_value:
 	.byte	0
 	.section	.rodata.toshiba_3D_slc_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR16,. + 0
+	.set	.LANCHOR23,. + 0
 	.type	toshiba_3D_slc_value, %object
 	.size	toshiba_3D_slc_value, 11
 toshiba_3D_slc_value:
@@ -21588,7 +23032,7 @@ toshiba_3D_slc_value:
 	.byte	56
 	.section	.rodata.toshiba_3D_tlc_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR15,. + 0
+	.set	.LANCHOR22,. + 0
 	.type	toshiba_3D_tlc_value, %object
 	.size	toshiba_3D_tlc_value, 399
 toshiba_3D_tlc_value:
@@ -21606,13 +23050,6 @@ toshiba_3D_tlc_value:
 	.byte	0
 	.byte	0
 	.byte	0
-	.byte	-9
-	.byte	-12
-	.byte	-9
-	.byte	-7
-	.byte	-13
-	.byte	-12
-	.byte	-7
 	.byte	5
 	.byte	-2
 	.byte	-1
@@ -21620,6 +23057,13 @@ toshiba_3D_tlc_value:
 	.byte	-3
 	.byte	-2
 	.byte	6
+	.byte	-9
+	.byte	-12
+	.byte	-9
+	.byte	-7
+	.byte	-13
+	.byte	-12
+	.byte	-7
 	.byte	-6
 	.byte	-15
 	.byte	-15
@@ -21992,15 +23436,15 @@ toshiba_3D_tlc_value:
 	.byte	12
 	.byte	14
 	.section	.rodata.toshiba_3d_read_retrial.str1.1,"aMS",@progbits,1
-.LC44:
+.LC53:
 	.string	"toshiba SRR %d row=%x, status=%d\n"
-.LC45:
+.LC54:
 	.string	"toshiba TRR %d row=%x, status=%d\n"
-.LC46:
+.LC55:
 	.string	"toshiba RR %d row=%x,count %d,status=%d\n"
 	.section	.rodata.toshiba_A19ref_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR1,. + 0
+	.set	.LANCHOR8,. + 0
 	.type	toshiba_A19ref_value, %object
 	.size	toshiba_A19ref_value, 45
 toshiba_A19ref_value:
@@ -22051,7 +23495,7 @@ toshiba_A19ref_value:
 	.byte	0
 	.section	.rodata.toshiba_ref_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR3,. + 0
+	.set	.LANCHOR10,. + 0
 	.type	toshiba_ref_value, %object
 	.size	toshiba_ref_value, 8
 toshiba_ref_value:
@@ -22064,18 +23508,49 @@ toshiba_ref_value:
 	.byte	12
 	.byte	112
 	.section	.rodata.vpn_check.str1.1,"aMS",@progbits,1
-.LC115:
+.LC128:
 	.string	"acblk = %x, tempblk = %x, gc_des = %x\n"
-.LC116:
+.LC129:
 	.string	"acblk = %x, free page = %x, vpn = %x %x\n"
-.LC117:
+.LC130:
 	.string	"tmp_blk = %x, free page = %x, vpn = %x %x\n"
-.LC118:
+.LC131:
 	.string	"vpn_check lpa = %x, ppa = %x, blk = %x\n"
-.LC119:
+.LC132:
 	.string	"l2p"
-.LC120:
+.LC133:
 	.string	"vpn_check %x = c %x  s %x function: %x\n"
-.LC121:
+.LC134:
 	.string	"vpn_check blk = %x fix vpc\n"
+.LC135:
+	.string	"...%s exit...%d\n"
+	.section	.rodata.zftl_discard.str1.1,"aMS",@progbits,1
+.LC158:
+	.string	"ftl_discard:(%x, %x, %x, %x)\n"
+	.section	.rodata.zftl_do_gc.str1.1,"aMS",@progbits,1
+.LC153:
+	.string	"gc %d: %d %d %d %d %d %d %d\n"
+.LC154:
+	.string	"gc %d: %d %d %d %d %d %d\n"
+.LC155:
+	.string	"GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\n"
+.LC156:
+	.string	"gc free %x, %d\n"
+	.section	.rodata.zftl_get_free_sblk.str1.1,"aMS",@progbits,1
+.LC15:
+	.string	"zftl_get_free_sblk %x %d, %p %d %d\n"
+	.section	.rodata.zftl_init.str1.1,"aMS",@progbits,1
+.LC115:
+	.string	"FTL version: 6.0.5 20180315"
+	.section	.rodata.zftl_read.str1.1,"aMS",@progbits,1
+.LC126:
+	.string	"ftl_read %x %x %x\n"
+.LC127:
+	.string	"ftl_read refresh =%x, lpa = %x, ppa= %x\n"
+	.section	.rodata.zftl_sblk_list_init.str1.1,"aMS",@progbits,1
+.LC38:
+	.string	"free blk vpn error: %x %x\n"
+	.section	.rodata.zftl_write.str1.1,"aMS",@progbits,1
+.LC157:
+	.string	"ftlwrite %x %x %x\n"
 	.hidden	free

commit e7e0d9902384e30fb0a93339b4bfe735c56ffa2e
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Mar 15 16:13:41 2018 +0800

    rockchip: add checksum compare for tos parameter
    
    To make sure the parameter is from TOS, compare the checksum.
    
    Change-Id: Id7c60e5666078b2655787d7e66dd71e6860f6ade
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
index cb7459e80e..a6a5b9569f 100644
--- a/arch/arm/mach-rockchip/sdram_common.c
+++ b/arch/arm/mach-rockchip/sdram_common.c
@@ -41,14 +41,34 @@ struct tos_parameter_t {
 };
 
 #if defined(CONFIG_SPL_FRAMEWORK) || !defined(CONFIG_SPL_OF_PLATDATA)
+static uint16_t trust_checksum(const uint8_t *buf, uint16_t len)
+{
+	uint16_t i;
+	uint16_t checksum = 0;
+
+	for (i = 0; i < len; i++) {
+		if (i % 2)
+			checksum += buf[i] << 8;
+		else
+			checksum += buf[i];
+	}
+	checksum = ~checksum;
+
+	return checksum;
+}
+
 int dram_init_banksize(void)
 {
 	size_t top = min((unsigned long)(gd->ram_size + CONFIG_SYS_SDRAM_BASE),
 			 gd->ram_top);
 	struct tos_parameter_t *tos_parameter;
+	u32 checksum;
+
 	tos_parameter = (struct tos_parameter_t *)(CONFIG_SYS_SDRAM_BASE +
 			TRUST_PARAMETER_OFFSET);
 
+	checksum = trust_checksum((uint8_t *)(unsigned long)tos_parameter + 8,
+				  sizeof(struct tos_parameter_t) - 8);
 #ifdef CONFIG_ARM64
 	/* Reserve 0x200000 for ATF bl31 */
 	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE + 0x200000;
@@ -57,7 +77,8 @@ int dram_init_banksize(void)
 	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
 	gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start;
 #endif
-	if (tos_parameter->tee_mem.flags == 1) {
+	if ((checksum == tos_parameter->checksum) &&
+	    (tos_parameter->tee_mem.flags == 1)) {
 		gd->bd->bi_dram[0].size = tos_parameter->tee_mem.phy_addr
 					- gd->bd->bi_dram[0].start;
 		gd->bd->bi_dram[1].start = tos_parameter->tee_mem.phy_addr +

commit a09afa0854bafc449483c8df5999a751149012de
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Mar 15 15:43:59 2018 +0800

    rockchip: spl/tpl: move stimer_init to very begining
    
    Change-Id: I1e962df10c2893ee66a98201de5beb586fce1fcb
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index c508b043d3..27ab566d15 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -64,6 +64,10 @@ u32 spl_boot_mode(const u32 boot_device)
 
 __weak void rockchip_stimer_init(void)
 {
+#ifndef CONFIG_ARM64
+	asm volatile("mcr p15, 0, %0, c14, c0, 0"
+		     : : "r"(COUNTER_FREQUENCY));
+#endif
 	writel(0, CONFIG_ROCKCHIP_STIMER_BASE + 0x10);
 	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
 	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
@@ -90,6 +94,7 @@ void board_init_f(ulong dummy)
 #endif
 
 #if !defined(CONFIG_SUPPORT_TPL)
+	rockchip_stimer_init();
 	arch_cpu_init();
 #endif
 #define EARLY_UART
@@ -106,7 +111,6 @@ void board_init_f(ulong dummy)
 	printascii("U-Boot SPL board init");
 #endif
 
-	rockchip_stimer_init();
 #ifdef CONFIG_SPL_FRAMEWORK
 	ret = spl_early_init();
 	if (ret) {
diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c
index 491e30f33f..85e5416997 100644
--- a/arch/arm/mach-rockchip/tpl.c
+++ b/arch/arm/mach-rockchip/tpl.c
@@ -58,6 +58,7 @@ void board_init_f(ulong dummy)
 	struct udevice *dev;
 	int ret;
 
+	rockchip_stimer_init();
 	arch_cpu_init();
 #define EARLY_DEBUG
 #ifdef EARLY_DEBUG
@@ -80,7 +81,6 @@ void board_init_f(ulong dummy)
 		hang();
 	}
 
-	rockchip_stimer_init();
 	/* Init ARM arch timer */
 	timer_init();
 	ret = uclass_get_device(UCLASS_RAM, 0, &dev);

commit 49f812dde0ebffa12f117a10d282e7dbb4336979
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 13 19:56:34 2018 +0800

    include: irq-platform.h: add px30 timer0 irq
    
    Change-Id: Ieadd2aa4d18c8db8927da225a62d9d58e9fd4342
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/irq-platform.h b/include/irq-platform.h
index f6e1b88a29..878de36ac9 100644
--- a/include/irq-platform.h
+++ b/include/irq-platform.h
@@ -144,6 +144,7 @@
 #define IRQ_GPIO3			38
 #define IRQ_PWM0			56
 #define IRQ_PWM1			57
+#define IRQ_TIMER0			62	/* non-secure */
 #define IRQ_TIMER1			63	/* non-secure */
 
 #define GIC_IRQS_NR			(4 * 32)

commit a46d9cd7747f25ac4d58e0b6d87887b3498a3c92
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 13 19:56:54 2018 +0800

    fuel gauge: rk817: disable debug info
    
    Change-Id: I6b48d9302aed33aa678b3a5496ed1aa8627a82b9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk817.c b/drivers/power/fuel_gauge/fg_rk817.c
index 7edd8b33b6..fddc31a4e4 100644
--- a/drivers/power/fuel_gauge/fg_rk817.c
+++ b/drivers/power/fuel_gauge/fg_rk817.c
@@ -20,7 +20,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-static int dbg_enable = 1;
+static int dbg_enable = 0;
 #define DBG(args...) \
 	do { \
 		if (dbg_enable) { \

commit 0f3732faad03e61fe1464b91aea9f766eeba7b91
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Mar 8 21:21:52 2018 +0800

    dm: video: add reserve size debug info for rockchip video
    
    Change-Id: I0d2693ea871ea41c84143e0f4e4c52c65b308dd7
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c
index bef7ffea90..b38b2764b2 100644
--- a/drivers/video/video-uclass.c
+++ b/drivers/video/video-uclass.c
@@ -82,6 +82,7 @@ int video_reserve(ulong *addrp)
 	size = DRM_ROCKCHIP_FB_SIZE + MEMORY_POOL_SIZE;
 	*addrp = *addrp - size;
 	*addrp &= ~((1 << 20) - 1);
+	debug("Reserving %lx Bytes for video at: %lx\n", size, *addrp);
 #else
 	for (uclass_find_first_device(UCLASS_VIDEO, &dev);
 	     dev;

commit c7a79779cf5d54070a282c0f11e6fba72bd83814
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 13 20:03:27 2018 +0800

    configs: evb-rk3326: enable CONFIG_TEST_ROCKCHIP
    
    Change-Id: I9d23acf226a075af790d9659b38763fb134967de
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-rk3326_defconfig b/configs/evb-rk3326_defconfig
index ffa693bac6..ff9a228208 100644
--- a/configs/evb-rk3326_defconfig
+++ b/configs/evb-rk3326_defconfig
@@ -88,3 +88,4 @@ CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
+CONFIG_TEST_ROCKCHIP=y

commit 6ee123990afc16b327672e6492655bada3281163
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 13 20:00:51 2018 +0800

    test: rockchip: timer: disable timer before configure
    
    Change-Id: I0c1e8749069554f7aa7a63c416cd4691ad0e3761
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/test/rockchip/test-timer.c b/test/rockchip/test-timer.c
index 8a2d656e04..103aee1167 100644
--- a/test/rockchip/test-timer.c
+++ b/test/rockchip/test-timer.c
@@ -74,11 +74,16 @@ static void timer_irq_handler(int irq, void *data)
 
 static int soc_timer_irq_test_init(void)
 {
+	/* Disable before config */
+	writel(0, TIMER_BASE + TIMER_CTRL);
+
+	/* Config */
 	writel(SYS_COUNTER_FREQ0, TIMER_BASE + TIMER_LOAD_COUNT0);
 	writel(SYS_COUNTER_FREQ1, TIMER_BASE + TIMER_LOAD_COUNT1);
 	writel(TIMER_CLR_INT, TIMER_BASE + TIMER_INTSTATUS);
 	writel(TIMER_EN | TIMER_INT_EN, TIMER_BASE + TIMER_CTRL);
 
+	/* Request irq */
 	irq_install_handler(TIMER_IRQ, timer_irq_handler, NULL);
 	irq_handler_enable(TIMER_IRQ);
 

commit b0635068cf051b5b5db0432dbce2ab3324d72e56
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 6 14:22:42 2018 +0800

    test: rockchip: key: add more key event test
    
    add KEY_HOME, KEY_MENU, KEY_ESC.
    
    Change-Id: Ifbf43169973e0a2bbdb062713482ced1ceae7be3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/test/rockchip/test-key.c b/test/rockchip/test-key.c
index 45bf521515..25718b0dbc 100644
--- a/test/rockchip/test-key.c
+++ b/test/rockchip/test-key.c
@@ -11,16 +11,17 @@
 #include <key.h>
 #include <linux/input.h>
 #include "test-rockchip.h"
-	
+
 int board_key_test(int argc, char * const argv[])
 {
 	while (!ctrlc()) {
-		mdelay(50);
+		mdelay(100);
 		platform_key_read(KEY_VOLUMEUP);
-		mdelay(50);
 		platform_key_read(KEY_VOLUMEDOWN);
-		mdelay(50);
 		platform_key_read(KEY_POWER);
+		platform_key_read(KEY_HOME);
+		platform_key_read(KEY_MENU);
+		platform_key_read(KEY_ESC);
 	}
 
 	return 0;

commit 0abc377938b5a02fc8025399f1a7f8d9c03a1014
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 6 14:21:32 2018 +0800

    include: key.h: use linux-event-codes.h
    
    linux-event-codes.h defines more key code than
    input.h
    
    Change-Id: Ib9c9946bb78420fdd6b1dbcdad48e46007cc4752
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/key.h b/include/key.h
index b7b8672bc8..5310c50d95 100644
--- a/include/key.h
+++ b/include/key.h
@@ -7,7 +7,7 @@
 #ifndef _KEY_H_
 #define _KEY_H_
 
-#include <linux/input.h>
+#include <dt-bindings/input/linux-event-codes.h>
 
 #define KEY_LONG_DOWN_MS	2000
 

commit 6fb52ead7dd18a9b48fda3a469d5c93958495b4e
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Thu Mar 15 11:47:42 2018 +0800

    clk: rockchip: px30: Fix pll lock status
    
    Change-Id: I0ccae06f42b37a21af7fc877bb00ca498dd8b95f
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index af57101f3e..d4e3bfa560 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -119,7 +119,7 @@ static void rkclk_set_pll(struct px30_cru *cru, enum px30_pll_id pll_id,
 	rk_clrreg(&pll->con1, 1 << PLL_PD_SHIFT);
 
 	/* waiting for pll lock */
-	while (readl(&pll->con1) & (1 << PLL_LOCK_STATUS_SHIFT))
+	while (!(readl(&pll->con1) & (1 << PLL_LOCK_STATUS_SHIFT)))
 		udelay(1);
 
 	rk_clrsetreg(mode, pll_mode_mask[pll_id],

commit fce7cb7b10c1a51662c7a1c3f230d28d24aeca0c
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Wed Mar 14 17:00:07 2018 +0800

    clk: rockchip: px30: Fix return value for some clocks
    
    Change-Id: Iac7a67337f05c42e99ad5e2eebbeb82b6375f676
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index cc4a399482..af57101f3e 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -356,7 +356,7 @@ static ulong px30_i2c_set_clk(struct px30_cru *cru, ulong clk_id, uint hz)
 		return -EINVAL;
 	}
 
-	return DIV_TO_RATE(GPLL_HZ, src_clk_div);
+	return px30_i2c_get_clk(cru, clk_id);
 }
 
 static ulong px30_mmc_get_clk(struct px30_cru *cru, uint clk_id)
@@ -478,7 +478,7 @@ static ulong px30_pwm_set_clk(struct px30_cru *cru, ulong clk_id, uint hz)
 		return -EINVAL;
 	}
 
-	return DIV_TO_RATE(GPLL_HZ, src_clk_div);
+	return px30_pwm_get_clk(cru, clk_id);
 }
 
 static ulong px30_saradc_get_clk(struct px30_cru *cru)
@@ -500,9 +500,9 @@ static ulong px30_saradc_set_clk(struct px30_cru *cru, uint hz)
 
 	rk_clrsetreg(&cru->clksel_con[55],
 		     CLK_SARADC_DIV_CON_MASK,
-		     src_clk_div << CLK_SARADC_DIV_CON_SHIFT);
+		     (src_clk_div - 1) << CLK_SARADC_DIV_CON_SHIFT);
 
-	return DIV_TO_RATE(OSC_HZ, src_clk_div);
+	return px30_saradc_get_clk(cru);
 }
 
 static ulong px30_spi_get_clk(struct px30_cru *cru, ulong clk_id)
@@ -510,11 +510,11 @@ static ulong px30_spi_get_clk(struct px30_cru *cru, ulong clk_id)
 	u32 div, con;
 
 	switch (clk_id) {
-	case SCLK_PWM0:
+	case SCLK_SPI0:
 		con = readl(&cru->clksel_con[53]);
 		div = con >> CLK_SPI0_DIV_CON_SHIFT & CLK_SPI_DIV_CON_MASK;
 		break;
-	case SCLK_PWM1:
+	case SCLK_SPI1:
 		con = readl(&cru->clksel_con[53]);
 		div = con >> CLK_SPI1_DIV_CON_SHIFT & CLK_SPI_DIV_CON_MASK;
 		break;
@@ -553,7 +553,7 @@ static ulong px30_spi_set_clk(struct px30_cru *cru, ulong clk_id, uint hz)
 		return -EINVAL;
 	}
 
-	return DIV_TO_RATE(GPLL_HZ, src_clk_div);
+	return px30_spi_get_clk(cru, clk_id);
 }
 
 static ulong px30_vop_get_clk(struct px30_cru *cru, ulong clk_id)
@@ -639,6 +639,7 @@ static ulong px30_clk_get_rate(struct clk *clk)
 		rate = px30_i2c_get_clk(priv->cru, clk->id);
 		break;
 	case SCLK_PWM0:
+	case SCLK_PWM1:
 		rate = px30_pwm_get_clk(priv->cru, clk->id);
 		break;
 	case SCLK_SARADC:

commit 432f5e8c587f7e55eca8b5ac5fe4ea08ecf1a8e0
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Mar 13 14:29:13 2018 +0800

    rockchip: px30: extend space for kenrel load
    
    kernel may need more then 32M, make room for it.
    
    Change-Id: Ia8916224a5915153aea731f45dddac1dda09df5b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index 3f203635b1..da92b7a64c 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -54,7 +54,7 @@
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x01f00000\0" \
 	"kernel_addr_r=0x02080000\0" \
-	"ramdisk_addr_r=0x04000000\0"
+	"ramdisk_addr_r=0x06000000\0"
 
 #include <config_distro_bootcmd.h>
 #define CONFIG_EXTRA_ENV_SETTINGS \

commit 96f1b3d9492b0148cc30cd080c04fcd7b1c0fc02
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Feb 28 17:43:22 2018 +0800

    rockchip: clk: px30: support emmc ciu-sample clock
    
    ciu-sample is a dummy clock, which should be the same with sclk_emmc.
    
    Change-Id: I5350774a390555153ddaee49fb9613f25f4f249b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 50e99b7e73..cc4a399482 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -370,6 +370,7 @@ static ulong px30_mmc_get_clk(struct px30_cru *cru, uint clk_id)
 		break;
 	case HCLK_EMMC:
 	case SCLK_EMMC:
+	case SCLK_EMMC_SAMPLE:
 		con_id = 20;
 		break;
 	default:
@@ -628,6 +629,7 @@ static ulong px30_clk_get_rate(struct clk *clk)
 	case HCLK_EMMC:
 	case SCLK_SDMMC:
 	case SCLK_EMMC:
+	case SCLK_EMMC_SAMPLE:
 		rate = px30_mmc_get_clk(priv->cru, clk->id);
 		break;
 	case SCLK_I2C0:
@@ -730,6 +732,7 @@ int rockchip_mmc_get_phase(struct clk *clk)
 	else
 		raw_value = readl(&cru->sdmmc_con[1]);
 
+	raw_value >>= 1;
 	degrees = (raw_value & ROCKCHIP_MMC_DEGREE_MASK) * 90;
 
 	if (raw_value & ROCKCHIP_MMC_DELAY_SEL) {
@@ -776,6 +779,7 @@ int rockchip_mmc_set_phase(struct clk *clk, u32 degrees)
 	raw_value |= delay_num << ROCKCHIP_MMC_DELAYNUM_OFFSET;
 	raw_value |= nineties;
 
+	raw_value <<= 1;
 	if (clk->id == SCLK_EMMC_SAMPLE)
 		writel(raw_value | 0xffff0000, &cru->emmc_con[1]);
 	else

commit 6aaa9b68fdcf3266686f3d64d3e59a4622c3f21c
Author: shengfei Xu <xsf@rock-chips.com>
Date:   Tue Mar 6 15:23:03 2018 +0800

    power: fuel gauge: rk817: fix the display soc jump from 0 to 100
    
    Change-Id: I8ad336bfdce6bac04ec5d07d885fd8a0992b4339
    Signed-off-by: shengfei Xu <xsf@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk817.c b/drivers/power/fuel_gauge/fg_rk817.c
index 061f7f347a..7edd8b33b6 100644
--- a/drivers/power/fuel_gauge/fg_rk817.c
+++ b/drivers/power/fuel_gauge/fg_rk817.c
@@ -20,7 +20,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-static int dbg_enable;
+static int dbg_enable = 1;
 #define DBG(args...) \
 	do { \
 		if (dbg_enable) { \
@@ -166,6 +166,7 @@ static int dbg_enable;
 
 #define CHRG_CT_EN		BIT(1)
 #define MIN_FCC			500
+#define CAP_INVALID		BIT(7)
 
 /* USB_CTRL_REG */
 #define INPUT_CUR_MSK		0x0f
@@ -219,8 +220,8 @@ struct rk817_battery_device {
 	int				pwron_voltage;
 	int				sm_linek;
 	int				sm_old_cap;
-	u8				calc_dsoc;
-	u8				calc_rsoc;
+	int				calc_dsoc;
+	int				calc_rsoc;
 	int				sm_chrg_dsoc;
 	u8				halt_cnt;
 	bool				is_halt;
@@ -236,7 +237,6 @@ struct rk817_battery_device {
 	u32				*ocv_table;
 	int				ocv_size;
 	u32				design_capacity;
-	u32				design_qmax;
 	u32				max_soc_offset;
 	u32				virtual_power;
 	u32				chrg_type;
@@ -428,33 +428,6 @@ static void rk817_bat_calibration(struct rk817_battery_device *battery)
 	}
 }
 
-static u32 rk817_bat_get_capacity_uah(struct rk817_battery_device *battery)
-{
-	u32 val = 0, capacity;
-
-	val = rk817_bat_read(battery, Q_PRES_H3) << 24;
-	val |= rk817_bat_read(battery, Q_PRES_H2) << 16;
-	val |= rk817_bat_read(battery, Q_PRES_L1) << 8;
-	val |= rk817_bat_read(battery, Q_PRES_L0) << 0;
-
-	capacity = ADC_TO_CAPACITY_UAH(val, battery->res_div);
-	return  capacity;
-}
-
-static u32 rk817_bat_get_capacity_mah(struct rk817_battery_device *battery)
-{
-	u32 val, capacity;
-
-	val = rk817_bat_read(battery, Q_PRES_H3) << 24;
-	val |= rk817_bat_read(battery, Q_PRES_H2) << 16;
-	val |= rk817_bat_read(battery, Q_PRES_L1) << 8;
-	val |= rk817_bat_read(battery, Q_PRES_L0) << 0;
-
-	capacity = ADC_TO_CAPACITY(val, battery->res_div);
-
-	return  capacity;
-}
-
 static void rk817_bat_init_coulomb_cap(struct rk817_battery_device *battery,
 				       u32 capacity)
 {
@@ -475,6 +448,47 @@ static void rk817_bat_init_coulomb_cap(struct rk817_battery_device *battery,
 	battery->remain_cap = capacity * 1000;
 }
 
+static bool rk817_bat_remain_cap_is_valid(struct rk817_battery_device *battery)
+{
+	return !(rk817_bat_read(battery, Q_PRES_H3) & CAP_INVALID);
+}
+
+static u32 rk817_bat_get_capacity_uah(struct rk817_battery_device *battery)
+{
+	u32 val = 0, capacity = 0;
+
+	if (rk817_bat_remain_cap_is_valid(battery)) {
+		val = rk817_bat_read(battery, Q_PRES_H3) << 24;
+		val |= rk817_bat_read(battery, Q_PRES_H2) << 16;
+		val |= rk817_bat_read(battery, Q_PRES_L1) << 8;
+		val |= rk817_bat_read(battery, Q_PRES_L0) << 0;
+
+		capacity = ADC_TO_CAPACITY_UAH(val, battery->res_div);
+	} else {
+		rk817_bat_init_coulomb_cap(battery, 0);
+	}
+
+	return  capacity;
+}
+
+static u32 rk817_bat_get_capacity_mah(struct rk817_battery_device *battery)
+{
+	u32 val, capacity = 0;
+
+	if (rk817_bat_remain_cap_is_valid(battery)) {
+		val = rk817_bat_read(battery, Q_PRES_H3) << 24;
+		val |= rk817_bat_read(battery, Q_PRES_H2) << 16;
+		val |= rk817_bat_read(battery, Q_PRES_L1) << 8;
+		val |= rk817_bat_read(battery, Q_PRES_L0) << 0;
+
+		capacity = ADC_TO_CAPACITY(val, battery->res_div);
+	} else {
+		rk817_bat_init_coulomb_cap(battery, 0);
+	}
+
+	return  capacity;
+}
+
 static void rk817_bat_save_cap(struct rk817_battery_device *battery,
 			       int capacity)
 {
@@ -643,7 +657,7 @@ static int rk817_bat_get_fcc(struct rk817_battery_device *battery)
 {
 	u32 fcc = 0;
 
-	fcc |= rk817_bat_read(battery, NEW_FCC_REG2) << 16;
+	fcc = rk817_bat_read(battery, NEW_FCC_REG2) << 16;
 	fcc |= rk817_bat_read(battery, NEW_FCC_REG1) << 8;
 	fcc |= rk817_bat_read(battery, NEW_FCC_REG0) << 0;
 
@@ -651,9 +665,9 @@ static int rk817_bat_get_fcc(struct rk817_battery_device *battery)
 		DBG("invalid fcc(%d), use design cap", fcc);
 		fcc = battery->design_capacity;
 		rk817_bat_save_fcc(battery, fcc);
-	} else if (fcc > battery->design_qmax) {
+	} else if (fcc > battery->qmax) {
 		DBG("invalid fcc(%d), use qmax", fcc);
-		fcc = battery->design_qmax;
+		fcc = battery->qmax;
 		rk817_bat_save_fcc(battery, fcc);
 	}
 
@@ -977,6 +991,7 @@ static void rk817_bat_debug_info(struct rk817_battery_device *battery)
 	DBG("k = %d, b = %d\n", battery->voltage_k, battery->voltage_b);
 	DBG("battery: %d\n", rk817_bat_get_battery_voltage(battery));
 	DBG("voltage_sys = %d\n", rk817_bat_get_sys_voltage(battery));
+	DBG("voltage_usb = %d\n", rk817_bat_get_USB_voltage(battery));
 	DBG("current_avg = %d\n", rk817_bat_get_avg_current(battery));
 	DBG("dsoc = %d\n", battery->dsoc);
 	DBG("rsoc = %d\n", rk817_bat_get_rsoc(battery));
@@ -1043,6 +1058,7 @@ static int rk817_bat_update_get_soc(struct udevice *dev)
 	struct rk817_battery_device *battery = dev_get_priv(dev);
 	static ulong seconds;
 
+	rk817_bat_debug_info(battery);
 	/* set charge current */
 	battery->chrg_type =
 		rk817_bat_get_charger_type(battery);
@@ -1150,8 +1166,6 @@ static int rk817_fg_init(struct rk817_battery_device *battery)
 	rk817_bat_rsoc_init(battery);
 	rk817_bat_init_coulomb_cap(battery, battery->nac);
 	rk817_bat_set_initialized_flag(battery);
-	battery->remain_cap = rk817_bat_get_capacity_uah(battery);
-	rk817_bat_calc_linek(battery);
 
 	battery->voltage_avg = rk817_bat_get_battery_voltage(battery);
 	battery->voltage_sys = rk817_bat_get_sys_voltage(battery);
@@ -1161,6 +1175,7 @@ static int rk817_fg_init(struct rk817_battery_device *battery)
 	battery->remain_cap = rk817_bat_get_capacity_uah(battery);
 	battery->rsoc = rk817_bat_get_rsoc(battery);
 	battery->sm_linek = rk817_bat_calc_linek(battery);
+	battery->chrg_type = rk817_bat_get_charger_type(battery);
 	battery->finish_chrg_base = get_timer(0);
 	battery->term_sig_base = get_timer(0);
 
@@ -1168,9 +1183,7 @@ static int rk817_fg_init(struct rk817_battery_device *battery)
 	battery->dbg_pwr_rsoc = battery->rsoc;
 	battery->dbg_pwr_vol = battery->voltage_avg;
 
-	DBG("chrg onle: %d\n", rk817_bat_dwc_otg_check_dpdm());
-	DBG("chrg onle: %d\n", rk817_bat_dwc_otg_check_dpdm());
-	DBG("chrg onle: %d\n", rk817_bat_dwc_otg_check_dpdm());
+	rk817_bat_charger_setting(battery, battery->chrg_type);
 
 	DBG("voltage_k = %d, voltage_b = %d\n",
 	    battery->voltage_k, battery->voltage_b);
@@ -1184,6 +1197,7 @@ static int rk817_fg_init(struct rk817_battery_device *battery)
 	DBG("qmax = %d\n", battery->qmax);
 	DBG("dsoc = %d\n", battery->dsoc);
 	DBG("rsoc = %d\n", battery->rsoc);
+	DBG("charge type: %d\n", battery->chrg_type);
 
 	return 0;
 }

commit 52015e971534309e28e967ac05cf99c5d240ae91
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Tue Mar 6 14:12:51 2018 +0800

    drm/rockchip: drm driver version only need print once
    
    Change-Id: I34999b0cf660437e6c2794137a4f35e89025a965
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 39c0e0745c..77df5c2b53 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -464,8 +464,12 @@ static int display_init(struct display_state *state)
 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
 	struct drm_display_mode *mode = &conn_state->mode;
 	int ret = 0;
+	static bool __print_once = false;
 
-	printf("Rockchip UBOOT DRM driver version: %s\n", DRIVER_VERSION);
+	if (!__print_once) {
+		__print_once = true;
+		printf("Rockchip UBOOT DRM driver version: %s\n", DRIVER_VERSION);
+	}
 
 	if (state->is_init)
 		return 0;

commit 0dc8896c7ed613184f2508cc4f81174d4b36baf6
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Mar 9 18:18:22 2018 +0800

    rockchip: clk: px30: only do one time clk init
    
    We may get into clk_probe more than one time from TPL/SPL/U-Boot,
    and we only need to init bus clock one time.
    
    Change-Id: Iab0434c66d344ff57c1edd30679c3ab3bb8f2b17
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_px30.h b/arch/arm/include/asm/arch-rockchip/cru_px30.h
index d883a9c8cb..3bb6007ff2 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_px30.h
@@ -227,7 +227,7 @@ enum {
 
 	/* CRU_CLK_SEL23_CON */
 	BUS_PLL_SEL_SHIFT	=15,
-	BUS_PLL_SEL_MASK	= 3 << BUS_PLL_SEL_SHIFT,
+	BUS_PLL_SEL_MASK	= 1 << BUS_PLL_SEL_SHIFT,
 	BUS_PLL_SEL_GPLL	= 0,
 	BUS_PLL_SEL_CPLL,
 	BUS_ACLK_DIV_SHIFT	= 8,
diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 4790bcb3c0..50e99b7e73 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -829,8 +829,12 @@ static struct clk_ops px30_clk_ops = {
 static int px30_clk_probe(struct udevice *dev)
 {
 	struct px30_clk_priv *priv = dev_get_priv(dev);
+	u32 reg = readl(&priv->cru->clksel_con[23]);
 
-	rkclk_init(priv->cru);
+	/* Only do the rkclk_init() one time for boot up */
+	if (((reg & BUS_ACLK_DIV_MASK) >> BUS_ACLK_DIV_SHIFT) !=
+	    (GPLL_HZ / BUS_ACLK_HZ - 1))
+		rkclk_init(priv->cru);
 
 	return 0;
 }

commit 2b1cc44fde238e2caf9b8fb9353c788258481ef7
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Mar 9 15:27:33 2018 +0800

    rockchip: add arch_cpu_init() in tpl
    
    Make sure arch_cpu_init() is called very early,
    if TPL exist, call it at the beginning of TPL board_init() and do not
    call it again in SPL.
    
    Change-Id: I035bac4c5da28640c866d51d1b7b250eb5912440
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index c9f91efeee..c508b043d3 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -89,6 +89,9 @@ void board_init_f(ulong dummy)
 #endif
 #endif
 
+#if !defined(CONFIG_SUPPORT_TPL)
+	arch_cpu_init();
+#endif
 #define EARLY_UART
 #if defined(EARLY_UART) && defined(CONFIG_DEBUG_UART)
 	/*
@@ -103,7 +106,6 @@ void board_init_f(ulong dummy)
 	printascii("U-Boot SPL board init");
 #endif
 
-	arch_cpu_init();
 	rockchip_stimer_init();
 #ifdef CONFIG_SPL_FRAMEWORK
 	ret = spl_early_init();
diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c
index e28ce13ce0..491e30f33f 100644
--- a/arch/arm/mach-rockchip/tpl.c
+++ b/arch/arm/mach-rockchip/tpl.c
@@ -48,11 +48,17 @@ __weak void rockchip_stimer_init(void)
 	writel(1, CONFIG_ROCKCHIP_STIMER_BASE + 0x10);
 }
 
+__weak int arch_cpu_init(void)
+{
+	return 0;
+}
+
 void board_init_f(ulong dummy)
 {
 	struct udevice *dev;
 	int ret;
 
+	arch_cpu_init();
 #define EARLY_DEBUG
 #ifdef EARLY_DEBUG
 	/*

commit 8e407a7f443f19411e3e528ac1279d7a08140a4c
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Wed Mar 7 11:39:14 2018 +0800

    lib: optee_client: fix compare bug in keymaster TA
    
    uboot send data and data length to keymaster TA, keymaster
    TA secure store the data, and read temp data from secure
    store, compare data and temp data, but the compare length
    use temp data length is wrong, fix the bug to use data length.
    
    Change-Id: I900a7ab1b1e95ca844dfb7327c34c793cf635278
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta
index 866dc39a48..05d1133ee3 100644
Binary files a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta and b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta differ

commit 86457e16088b96e67058465c0384ed1ff0830da4
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Mar 8 14:42:52 2018 +0800

    drivers: irq: fix compile warning
    
    In the function gpio_get_intr_type, 'type' may be
    used uninitialized if not add default process.
    
    Change-Id: I917fecc2ed06cc844c30c93508084f32608edf6f
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/irq/irq-gpio.c b/drivers/irq/irq-gpio.c
index 4b46b4fa73..7a2a22248d 100644
--- a/drivers/irq/irq-gpio.c
+++ b/drivers/irq/irq-gpio.c
@@ -165,6 +165,8 @@ static int gpio_get_intr_type(void __iomem *regbase,
 	case 0x03:
 		type = GPIOEdgelRising;
 		break;
+	default:
+		type = -EINVAL;
 	}
 
 	return type;

commit 82e713e13f9b964af6a9b80d7b272233c0614072
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Mar 7 15:23:21 2018 +0800

    lib: avb: support set_key_version
    
    the lib avb use this function to set key version
    
    Change-Id: Id0903b3326a0d6a0eadebd1ce23a19f92102908c
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/lib/avb/libavb_user/avb_ops_user.c b/lib/avb/libavb_user/avb_ops_user.c
index 85303fe599..bf92167b99 100644
--- a/lib/avb/libavb_user/avb_ops_user.c
+++ b/lib/avb/libavb_user/avb_ops_user.c
@@ -336,6 +336,17 @@ AvbIOResult avb_read_perm_attr_hash(AvbAtxOps* atx_ops,
 	return AVB_IO_RESULT_OK;
 }
 
+static void avb_set_key_version(AvbAtxOps* atx_ops,
+                        size_t rollback_index_location,
+                        uint64_t key_version)
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	if (trusty_write_rollback_index(rollback_index_location, key_version)) {
+		printf("%s: Fail to write rollback index\n", __FILE__);
+	}
+#endif
+}
+
 AvbOps* avb_ops_user_new(void) {
   AvbOps* ops;
 
@@ -375,6 +386,7 @@ AvbOps* avb_ops_user_new(void) {
   ops->ab_ops->write_ab_metadata = avb_ab_data_write;
   ops->atx_ops->read_permanent_attributes = avb_read_perm_attr;
   ops->atx_ops->read_permanent_attributes_hash = avb_read_perm_attr_hash;
+  ops->atx_ops->set_key_version = avb_set_key_version;
 
 out:
   return ops;

commit d9d5eb74015ce2cc22d948e91369c74ce77ccf1b
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Mar 6 19:33:36 2018 +0800

    androidboot: add cmd bootavb perm_attr_test
    
    Read and print the perm_attr.
    
    Change-Id: I1e2b73afa1e872eea7abf75d55570b1c8b19c311
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/cmd/boot_android.c b/cmd/boot_android.c
index d9dc0b5bee..308d1a7b11 100644
--- a/cmd/boot_android.c
+++ b/cmd/boot_android.c
@@ -15,6 +15,7 @@
 #include <command.h>
 #include <android_bootloader_message.h>
 #include <android_avb/rk_avb_ops_user.h>
+#include <android_avb/avb_atx_ops.h>
 
 static int do_boot_android(cmd_tbl_t *cmdtp, int flag, int argc,
 			   char * const argv[])
@@ -340,7 +341,7 @@ int do_avb_read_is_device_unlocked(cmd_tbl_t *cmdtp, int flag,
 		return CMD_RET_FAILURE;
 	}
 
-	debug("out_is_unlocked = %d\n", out_is_unlocked);
+	printf("out_is_unlocked = %d\n", out_is_unlocked);
 	avb_ops_user_free(ops);
 
 	return CMD_RET_SUCCESS;
@@ -573,6 +574,39 @@ int do_avb_write_ab_metadata(cmd_tbl_t *cmdtp, int flag,
 	return CMD_RET_SUCCESS;
 }
 
+int do_perm_attr_test(cmd_tbl_t *cmdtp, int flag,
+		      int argc, char * const argv[])
+{
+	AvbOps *ops;
+	int i;
+	uint8_t hash[AVB_SHA256_DIGEST_SIZE];
+
+	if (argc != 1)
+		return CMD_RET_USAGE;
+
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return CMD_RET_FAILURE;
+	}
+
+	if (ops->atx_ops->read_permanent_attributes_hash(ops->atx_ops, hash) != 0) {
+		printf("read_permanent_attributes_hash error!\n");
+		avb_ops_user_free(ops);
+		return CMD_RET_FAILURE;
+	}
+
+	for (i = 0; i < AVB_SHA256_DIGEST_SIZE; i++) {
+		if (i % 4 == 0)
+			printf("\n");
+		printf("0x%x  ", hash[i]);
+	}
+
+	avb_ops_user_free(ops);
+
+	return CMD_RET_SUCCESS;
+}
+
 int do_avb_verify_partition(cmd_tbl_t *cmdtp, int flag,
 			    int argc, char * const argv[])
 {
@@ -813,6 +847,7 @@ static cmd_tbl_t cmd_avb[] = {
 	U_BOOT_CMD_MKENT(write, 4, 1, do_avb_write, "", ""),
 	U_BOOT_CMD_MKENT(readabmisc, 1, 1, do_avb_read_ab_metadata, "", ""),
 	U_BOOT_CMD_MKENT(writeabmisc, 1, 1, do_avb_write_ab_metadata, "", ""),
+	U_BOOT_CMD_MKENT(perm_attr_test, 1, 1, do_perm_attr_test, "", ""),
 	U_BOOT_CMD_MKENT(verify, 3, 1, do_avb_verify_partition, "", ""),
 	U_BOOT_CMD_MKENT(flow, 2, 1, do_avb_flow, "", "")
 };
@@ -855,6 +890,7 @@ U_BOOT_CMD(
 	"bootavb write partition offset_blk cnt\n"
 	"bootavb readabmisc\n"
 	"bootavb writeabmisc\n"
+	"bootavb perm_attr_test\n"
 	"bootavb verify partition slot_cnt;partion name without '_a' or '_b'\n"
 	"bootavb flow v/n\n"
 );

commit b66b4823c8a03ee89200d361253421961f608508
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Mar 6 17:54:18 2018 +0800

    Revert "configs: rk3328_common: Increase the spl size for new pinctrl build-in"
    
    This reverts commit e7d7797312218d27453532d1fe6e5ce7e4729fc4.
    0x10000 is start address of atf, we can not use it now.
    
    Change-Id: I11267f2b20b38c1f67da2c7a44093a140b6574ac
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index fa84acf61b..1ecc4f7b53 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -20,11 +20,7 @@
 #define CONFIG_SYS_LOAD_ADDR		0x00800800
 #define CONFIG_SPL_STACK		0x00400000
 #define CONFIG_SPL_TEXT_BASE		0x00000000
-#ifdef CONFIG_TPL
-#define CONFIG_SPL_MAX_SIZE             0x20000
-#else
 #define CONFIG_SPL_MAX_SIZE             0x10000
-#endif
 #define CONFIG_SPL_BSS_START_ADDR	0x00400000
 #define CONFIG_SPL_BSS_MAX_SIZE         0x2000
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */

commit e37b3ef4625c37d74b634d0e9e591b53904f46ee
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Tue Mar 6 14:05:48 2018 +0800

    lib: optee_client: update keymaster TA
    
    uboot read date return error when file not exit,
    do not to create new file.
    
    Change-Id: Ic4cbc631b9e75dc345759d6d0dbcc86250245511
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta
index 29dd857e5d..866dc39a48 100644
Binary files a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta and b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta differ

commit d7407b119c2ee85e7d09a9a2766da3a54847f63e
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Mon Feb 26 08:51:18 2018 +0800

    lib: optee_client: move CONFIG_OPTEE_V1/V2 define
    
    move CONFIG_OPTEE_V1/V2 to lib/optee_clientApi/Kconfig
    
    Change-Id: I446454547a186a27110aa95183264154fc538de9
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk322x/Kconfig b/arch/arm/mach-rockchip/rk322x/Kconfig
index 2e7b0a6726..eebe63131d 100644
--- a/arch/arm/mach-rockchip/rk322x/Kconfig
+++ b/arch/arm/mach-rockchip/rk322x/Kconfig
@@ -20,14 +20,6 @@ config SYS_MALLOC_F_LEN
 config SPL_SERIAL_SUPPORT
 	default y
 
-config OPTEE_V1
-	bool "Support OPTEE version 1.0"
-	help
-	  U-boot can communicate with trust if
-	  the config is enable. This function can
-	  be use in android bootloader a/b and avb
-	  step.
-
 source "board/rockchip/evb_rk3229/Kconfig"
 source "board/rockchip/gva_rk3229/Kconfig"
 
diff --git a/lib/optee_clientApi/Kconfig b/lib/optee_clientApi/Kconfig
index 1b86310a6e..8689af11cb 100644
--- a/lib/optee_clientApi/Kconfig
+++ b/lib/optee_clientApi/Kconfig
@@ -5,3 +5,20 @@ config OPTEE_CLIENT
 	  the config is enable. This function can
 	  be use in android bootloader a/b and avb
 	  step.
+
+config OPTEE_V1
+	bool "Support OPTEE version 1.0"
+	help
+	  U-boot can communicate with trust if
+	  the config is enable. This function can
+	  be use in android bootloader a/b and avb
+	  step.
+
+config OPTEE_V2
+	bool "Support OPTEE version 2.0"
+	help
+	  U-boot can communicate with trust if
+	  the config is enable. This function can
+	  be use in android bootloader a/b and avb
+	  step.
+

commit 07e846a0c23a1d5ce2980c2b7e82d74433c3f44e
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Mar 6 17:21:54 2018 +0800

    rockchip: defconfig: rk3328: remove SPL_PINCTRL
    
    We do not need pinctrl driver in SPL.
    
    Change-Id: I60528976cece11c20cc3f6968631b9e355da23b7
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index 0e3830485d..79535c760d 100644
--- a/configs/evb-rk3328_defconfig
+++ b/configs/evb-rk3328_defconfig
@@ -61,7 +61,6 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PHY=y
 CONFIG_PINCTRL=y
-CONFIG_SPL_PINCTRL=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y

commit c0acb0f2ed3e6682d551a551a600e0cc39319e2a
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Tue Mar 6 14:59:31 2018 +0800

    usb: gadget: use google's vid and pid for fastboot
    
    Using Google's VID and PID default for fastboot command.
    
    Change-Id: I8deb275f0f6a925b8e0b9668b6ba59abd44b74a5
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index 586c0cd2c5..9b06812bff 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -54,12 +54,16 @@ static int rkusb_rst_code; /* The subcode in reset command (0xFF) */
 int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
 {
 	if (IS_RKUSB_UMS_DNL(name)) {
-		/* Fix to Rockchip VID and PID */
+		/* Fix to Rockchip's VID and PID */
 		dev->idVendor  = __constant_cpu_to_le16(0x2207);
 		dev->idProduct = __constant_cpu_to_le16(CONFIG_ROCKUSB_G_DNL_PID);
 
 		/* Enumerate as a loader device */
 		dev->bcdUSB = cpu_to_le16(0x0201);
+	} else if (!strncmp(name, "usb_dnl_fastboot", 16)) {
+		/* Fix to Google's VID and PID */
+		dev->idVendor  = __constant_cpu_to_le16(0x18d1);
+		dev->idProduct = __constant_cpu_to_le16(0xd00d);
 	}
 
 	return 0;

commit e4ed4bd4083eef3896a828cbe84ae1790fe0f9e8
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Mar 6 10:44:05 2018 +0800

    rockchip: rk3328: enable arch_cpu_init() setting in SPL
    
    arch_cpu_init() is only available in SPL but not in TPL.
    
    Change-Id: I76da98fe37c4e4ff00e33510eee6916ea20a7325
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3328/rk3328.c b/arch/arm/mach-rockchip/rk3328/rk3328.c
index 4856e464e7..8ff075f46b 100644
--- a/arch/arm/mach-rockchip/rk3328/rk3328.c
+++ b/arch/arm/mach-rockchip/rk3328/rk3328.c
@@ -49,7 +49,7 @@ const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
 };
 int arch_cpu_init(void)
 {
-#ifdef CONFIG_TPL_BUILD
+#ifdef CONFIG_SPL_BUILD
 	struct rk3328_grf_regs * const grf = (void *)GRF_BASE;
 	/* We do some SoC one time setting here. */
 

commit 9fcf96223cbc9ba0185e7d12a25997c9005dfdb9
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Mar 6 15:22:57 2018 +0800

    rockchip: bootm: update fdt addr for display fixup
    
    fdt has been relocate, can not use the addr from gd.
    
    Change-Id: I108eb13cb62b387f688e6fa1e7d26b2649f67a82
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/lib/bootm-fdt.c b/arch/arm/lib/bootm-fdt.c
index c0be8040d6..adf0d249f9 100644
--- a/arch/arm/lib/bootm-fdt.c
+++ b/arch/arm/lib/bootm-fdt.c
@@ -79,7 +79,7 @@ int arch_fixup_fdt(void *blob)
 #endif
 #endif
 #ifdef CONFIG_DRM_ROCKCHIP
-	rockchip_display_fixup((void *)gd->fdt_blob);
+	rockchip_display_fixup(blob);
 #endif
 #ifdef CONFIG_FMAN_ENET
 	ret = fdt_update_ethernet_dt(blob);

commit e17ddcea32b2fa7b82fb079f37195855a55e39a2
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Mar 5 22:15:55 2018 +0800

    fs: add api to get the name of filesystem type
    
    Let others to get the name of partition filesystem type which
    is private member in fs/fs.c
    
    Change-Id: Iae5c89c705fa65b5eedb4550963003b6e03e2820
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/fs/fs.c b/fs/fs.c
index 3481229aa6..60aca0f767 100644
--- a/fs/fs.c
+++ b/fs/fs.c
@@ -317,6 +317,25 @@ int fs_set_blk_dev_with_part(struct blk_desc *desc, int part)
 	return -1;
 }
 
+int fs_get_fstype(const char **fstype_name)
+{
+	struct fstype_info *info;
+
+	if (fstype_name == NULL) {
+		printf("** parameter error **\n");
+		return -1;
+	}
+
+	info = fs_get_info(fs_type);
+	if (info->fstype == FS_TYPE_ANY) {
+		printf("** not match any filesystem type **\n");
+		return -1;
+	}
+
+	*fstype_name = info->name;
+	return 0;
+}
+
 static void fs_close(void)
 {
 	struct fstype_info *info = fs_get_info(fs_type);
diff --git a/include/fs.h b/include/fs.h
index 0869ad6e80..972be04115 100644
--- a/include/fs.h
+++ b/include/fs.h
@@ -26,6 +26,15 @@
  */
 int fs_set_blk_dev(const char *ifname, const char *dev_part_str, int fstype);
 
+/*
+ * fs_get_fstype - Get filesystem type on the partition previously
+ * set by fs_set_blk_dev()
+ *
+ * @fstype_name: The return the name of filesystem type
+ * @return 0 if ok with valid *fstype_name, -1 on error conditions
+ */
+int fs_get_fstype(const char **fstype_name);
+
 /*
  * fs_set_blk_dev_with_part - Set current block device + partition
  *

commit de78ceae23299481131da3c2ec8d8867acf3ad4e
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Mar 5 20:49:09 2018 +0800

    fastboot: break fastboot 64 bytes limit
    
    Some message can not be complete transmission because
    the fastboot can only transmit 64 bytes one time. So add
    sleep_thread() to judge whether the data is complete
    transmission before call fastboot_complete().
    
    Change-Id: I9057ffc9ca4b92db8c9ab14e4650d386c5d06254
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 8a54408dd9..7857c2766b 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -49,6 +49,7 @@
 #define TX_ENDPOINT_MAXIMUM_PACKET_SIZE      (0x0040)
 
 #define EP_BUFFER_SIZE			4096
+#define SLEEP_COUNT 20000
 /*
  * EP_BUFFER_SIZE must always be an integral multiple of maxpacket size
  * (64 or 512 or 1024), else we break on certain controllers like DWC3
@@ -74,6 +75,7 @@ static unsigned int download_bytes;
 static unsigned int upload_size;
 static unsigned int upload_bytes;
 static bool start_upload;
+static unsigned intthread_wakeup_needed;
 
 static struct usb_endpoint_descriptor fs_ep_in = {
 	.bLength            = USB_DT_ENDPOINT_SIZE,
@@ -162,10 +164,78 @@ static struct usb_gadget_strings *fastboot_strings[] = {
 
 static void rx_handler_command(struct usb_ep *ep, struct usb_request *req);
 static int strcmp_l1(const char *s1, const char *s2);
+static void wakeup_thread(void)
+{
+	intthread_wakeup_needed = false;
+}
+
+static void busy_indicator(void)
+{
+	static int state;
+
+	switch (state) {
+	case 0:
+		puts("\r|"); break;
+	case 1:
+		puts("\r/"); break;
+	case 2:
+		puts("\r-"); break;
+	case 3:
+		puts("\r\\"); break;
+	case 4:
+		puts("\r|"); break;
+	case 5:
+		puts("\r/"); break;
+	case 6:
+		puts("\r-"); break;
+	case 7:
+		puts("\r\\"); break;
+	default:
+		state = 0;
+	}
+	if (state++ == 8)
+		state = 0;
+}
+
+static int sleep_thread(void)
+{
+	int rc = 0;
+	int i = 0, k = 0;
+
+	/* Wait until a signal arrives or we are woken up */
+	for (;;) {
+		if (!intthread_wakeup_needed)
+			break;
+
+		if (++i == SLEEP_COUNT) {
+			busy_indicator();
+			i = 0;
+			k++;
+		}
+
+		if (k == 10) {
+			/* Handle CTRL+C */
+			if (ctrlc())
+				return -EPIPE;
+
+			/* Check cable connection */
+			if (!g_dnl_board_usb_cable_connected())
+				return -EIO;
+
+			k = 0;
+		}
+
+		usb_gadget_handle_interrupts(0);
+	}
+	intthread_wakeup_needed = true;
+	return rc;
+}
 
 static void fastboot_complete(struct usb_ep *ep, struct usb_request *req)
 {
 	int status = req->status;
+
+	wakeup_thread();
 	if (!status)
 		return;
 	printf("status: %d ep '%s' trans: %d\n", status, ep->name, req->actual);
@@ -363,6 +433,12 @@ static int fastboot_tx_write(const char *buffer, unsigned int buffer_size)
 
 static int fastboot_tx_write_str(const char *buffer)
 {
+	int ret;
+
+	ret = sleep_thread();
+	if (ret < 0)
+		printf("warning: 0x%x, usb transmission is abnormal!\n", ret);
+
 	return fastboot_tx_write(buffer, strlen(buffer));
 }
 

commit 333857218c8e1b126d7e5cbf75edc6e0f4fa8b44
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 6 10:58:23 2018 +0800

    dm: key: fix compile error with DEBUG enabled
    
    Change-Id: I3e5aeb6598c8601efb669329203ad59a825c2b32
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/key-uclass.c b/drivers/input/key-uclass.c
index 21e25f63a0..efa6001311 100644
--- a/drivers/input/key-uclass.c
+++ b/drivers/input/key-uclass.c
@@ -50,9 +50,6 @@ int key_parse_adc_event(struct input_key *key, unsigned int adcval)
 	int report = KEY_NOT_EXIST;
 	int max, min;
 
-	debug("%s: %s: max=%d, min=%d, adcval=%d\n",
-	      __func__, key->name, max, min, adcval);
-
 	/* Get min, max */
 	max = key->value + key->margin;
 	if (key->value > key->margin)
@@ -60,6 +57,9 @@ int key_parse_adc_event(struct input_key *key, unsigned int adcval)
 	else
 		min = key->value;
 
+	debug("%s: %s: max=%d, min=%d, adcval=%d\n",
+	      __func__, key->name, max, min, adcval);
+
 	/* Check */
 	if ((adcval <= max) && (adcval >= min)) {
 		report = KEY_PRESS_DOWN;

commit 95f431d58ae3a713dca0834d9d9315cf9fd15491
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Mar 5 15:10:37 2018 +0800

    sysreset: rockchip: use dev_read_addr_ptr get cru base
    
    Use system api dev_read_addr_ptr to get cru reg base,
    rather than rockchip private api rockchip_get_cru, which
    will be cleanup later.
    
    Change-Id: I8ec067d2ffd1a83daaaeb28e52e5c90abc89d36b
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/drivers/sysreset/sysreset_rockchip.c b/drivers/sysreset/sysreset_rockchip.c
index be00fefb3a..23bdb2f9eb 100644
--- a/drivers/sysreset/sysreset_rockchip.c
+++ b/drivers/sysreset/sysreset_rockchip.c
@@ -10,14 +10,12 @@
 #include <sysreset.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
-#include <asm/arch/cru_rk3328.h>
-#include <asm/arch/hardware.h>
 #include <linux/err.h>
 
 int rockchip_sysreset_request(struct udevice *dev, enum sysreset_t type)
 {
 	struct sysreset_reg *offset = dev_get_priv(dev);
-	unsigned long cru_base = (unsigned long)rockchip_get_cru();
+	unsigned long cru_base = (unsigned long)dev_read_addr_ptr(dev->parent);
 
 	if (IS_ERR_VALUE(cru_base))
 		return (int)cru_base;

commit ccced9e100e8476082b4dea3eddc5712cf356ce3
Author: Lin Huang <hl@rock-chips.com>
Date:   Mon Mar 5 17:24:41 2018 +0800

    clk: rockchip: rk3399: refactor configure cpu clock function
    
    some board request enable cpu big core clock in uboot,
    refactor rk3399_configure_cpu() function, so that the little
    core and big core can reuse this function to set clock.
    
    Change-Id: I0390d22179faf91307b22348f6f9329a58f00143
    Signed-off-by: Lin Huang <hl@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
index c0319479b2..045b481ca0 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
@@ -94,9 +94,14 @@ check_member(rk3399_cru, sdio1_con[1], 0x594);
 
 #define PWM_CLOCK_HZ    PMU_PCLK_HZ
 
-enum apll_l_frequencies {
-	APLL_L_1600_MHZ,
-	APLL_L_600_MHZ,
+enum apll_frequencies {
+	APLL_1600_MHZ,
+	APLL_600_MHZ,
+};
+
+enum cpu_cluster {
+	CPU_CLUSTER_LITTLE,
+	CPU_CLUSTER_BIG,
 };
 
 #endif	/* __ASM_ARCH_CRU_RK3399_H_ */
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 5d6c2a30ec..955112d6ff 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -38,6 +38,7 @@ struct pll_div {
 	u32 postdiv1;
 	u32 postdiv2;
 	u32 frac;
+	u32 freq;
 };
 
 #define RATE_TO_DIV(input_rate, output_rate) \
@@ -47,7 +48,7 @@ struct pll_div {
 #define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\
 	.refdiv = _refdiv,\
 	.fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ),\
-	.postdiv1 = _postdiv1, .postdiv2 = _postdiv2};
+	.postdiv1 = _postdiv1, .postdiv2 = _postdiv2, .freq = hz};
 
 #if defined(CONFIG_SPL_BUILD)
 static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 2, 1);
@@ -56,12 +57,12 @@ static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 1, 2, 2);
 static const struct pll_div ppll_init_cfg = PLL_DIVISORS(PPLL_HZ, 2, 2, 1);
 #endif
 
-static const struct pll_div apll_l_1600_cfg = PLL_DIVISORS(1600*MHz, 3, 1, 1);
-static const struct pll_div apll_l_600_cfg = PLL_DIVISORS(600*MHz, 1, 2, 1);
+static const struct pll_div apll_1600_cfg = PLL_DIVISORS(1600*MHz, 3, 1, 1);
+static const struct pll_div apll_600_cfg = PLL_DIVISORS(600*MHz, 1, 2, 1);
 
-static const struct pll_div *apll_l_cfgs[] = {
-	[APLL_L_1600_MHZ] = &apll_l_1600_cfg,
-	[APLL_L_600_MHZ] = &apll_l_600_cfg,
+static const struct pll_div *apll_cfgs[] = {
+	[APLL_1600_MHZ] = &apll_1600_cfg,
+	[APLL_600_MHZ] = &apll_600_cfg,
 };
 
 enum {
@@ -113,23 +114,23 @@ enum {
 	/* PMUCRU_CLKSEL_CON3 */
 	CLK_I2C4_DIV_CON_SHIFT		= 0,
 
-	/* CLKSEL_CON0 */
-	ACLKM_CORE_L_DIV_CON_SHIFT	= 8,
-	ACLKM_CORE_L_DIV_CON_MASK	= 0x1f << ACLKM_CORE_L_DIV_CON_SHIFT,
-	CLK_CORE_L_PLL_SEL_SHIFT	= 6,
-	CLK_CORE_L_PLL_SEL_MASK		= 3 << CLK_CORE_L_PLL_SEL_SHIFT,
-	CLK_CORE_L_PLL_SEL_ALPLL	= 0x0,
-	CLK_CORE_L_PLL_SEL_ABPLL	= 0x1,
-	CLK_CORE_L_PLL_SEL_DPLL		= 0x10,
-	CLK_CORE_L_PLL_SEL_GPLL		= 0x11,
-	CLK_CORE_L_DIV_MASK		= 0x1f,
-	CLK_CORE_L_DIV_SHIFT		= 0,
-
-	/* CLKSEL_CON1 */
-	PCLK_DBG_L_DIV_SHIFT		= 0x8,
-	PCLK_DBG_L_DIV_MASK		= 0x1f << PCLK_DBG_L_DIV_SHIFT,
-	ATCLK_CORE_L_DIV_SHIFT		= 0,
-	ATCLK_CORE_L_DIV_MASK		= 0x1f << ATCLK_CORE_L_DIV_SHIFT,
+	/* CLKSEL_CON0 / CLKSEL_CON2 */
+	ACLKM_CORE_DIV_CON_MASK	= 0x1f,
+	ACLKM_CORE_DIV_CON_SHIFT	= 8,
+	CLK_CORE_PLL_SEL_MASK		= 3,
+	CLK_CORE_PLL_SEL_SHIFT		= 6,
+	CLK_CORE_PLL_SEL_ALPLL		= 0x0,
+	CLK_CORE_PLL_SEL_ABPLL		= 0x1,
+	CLK_CORE_PLL_SEL_DPLL		= 0x10,
+	CLK_CORE_PLL_SEL_GPLL		= 0x11,
+	CLK_CORE_DIV_MASK		= 0x1f,
+	CLK_CORE_DIV_SHIFT		= 0,
+
+	/* CLKSEL_CON1 / CLKSEL_CON3 */
+	PCLK_DBG_DIV_MASK		= 0x1f,
+	PCLK_DBG_DIV_SHIFT		= 0x8,
+	ATCLK_CORE_DIV_MASK		= 0x1f,
+	ATCLK_CORE_DIV_SHIFT		= 0,
 
 	/* CLKSEL_CON14 */
 	PCLK_PERIHP_DIV_CON_SHIFT	= 12,
@@ -399,37 +400,55 @@ static int pll_para_config(u32 freq_hz, struct pll_div *div)
 }
 
 void rk3399_configure_cpu(struct rk3399_cru *cru,
-			  enum apll_l_frequencies apll_l_freq)
+			  enum apll_frequencies freq,
+			  enum cpu_cluster cluster)
 {
 	u32 aclkm_div;
 	u32 pclk_dbg_div;
-	u32 atclk_div;
+	u32 atclk_div, apll_hz;
+	int con_base, parent;
+	u32 *pll_con;
+
+	switch (cluster) {
+	case CPU_CLUSTER_LITTLE:
+		con_base = 0;
+		parent = CLK_CORE_PLL_SEL_ALPLL;
+		pll_con = &cru->apll_l_con[0];
+		break;
+	case CPU_CLUSTER_BIG:
+	default:
+		con_base = 2;
+		parent = CLK_CORE_PLL_SEL_ABPLL;
+		pll_con = &cru->apll_b_con[0];
+		break;
+	}
 
-	rkclk_set_pll(&cru->apll_l_con[0], apll_l_cfgs[apll_l_freq]);
+	apll_hz = apll_cfgs[freq]->freq;
+	rkclk_set_pll(pll_con, apll_cfgs[freq]);
 
-	aclkm_div = APLL_HZ / ACLKM_CORE_HZ - 1;
-	assert((aclkm_div + 1) * ACLKM_CORE_HZ == APLL_HZ &&
+	aclkm_div = apll_hz / ACLKM_CORE_HZ - 1;
+	assert((aclkm_div + 1) * ACLKM_CORE_HZ == apll_hz &&
 	       aclkm_div < 0x1f);
 
-	pclk_dbg_div = APLL_HZ / PCLK_DBG_HZ - 1;
-	assert((pclk_dbg_div + 1) * PCLK_DBG_HZ == APLL_HZ &&
+	pclk_dbg_div = apll_hz / PCLK_DBG_HZ - 1;
+	assert((pclk_dbg_div + 1) * PCLK_DBG_HZ == apll_hz &&
 	       pclk_dbg_div < 0x1f);
 
-	atclk_div = APLL_HZ / ATCLK_CORE_HZ - 1;
-	assert((atclk_div + 1) * ATCLK_CORE_HZ == APLL_HZ &&
+	atclk_div = apll_hz / ATCLK_CORE_HZ - 1;
+	assert((atclk_div + 1) * ATCLK_CORE_HZ == apll_hz &&
 	       atclk_div < 0x1f);
 
-	rk_clrsetreg(&cru->clksel_con[0],
-		     ACLKM_CORE_L_DIV_CON_MASK | CLK_CORE_L_PLL_SEL_MASK |
-		     CLK_CORE_L_DIV_MASK,
-		     aclkm_div << ACLKM_CORE_L_DIV_CON_SHIFT |
-		     CLK_CORE_L_PLL_SEL_ALPLL << CLK_CORE_L_PLL_SEL_SHIFT |
-		     0 << CLK_CORE_L_DIV_SHIFT);
-
-	rk_clrsetreg(&cru->clksel_con[1],
-		     PCLK_DBG_L_DIV_MASK | ATCLK_CORE_L_DIV_MASK,
-		     pclk_dbg_div << PCLK_DBG_L_DIV_SHIFT |
-		     atclk_div << ATCLK_CORE_L_DIV_SHIFT);
+	rk_clrsetreg(&cru->clksel_con[con_base],
+		     ACLKM_CORE_DIV_CON_MASK | CLK_CORE_PLL_SEL_MASK |
+		     CLK_CORE_DIV_MASK,
+		     aclkm_div << ACLKM_CORE_DIV_CON_SHIFT |
+		     parent << CLK_CORE_PLL_SEL_SHIFT |
+		     0 << CLK_CORE_DIV_SHIFT);
+
+	rk_clrsetreg(&cru->clksel_con[con_base + 1],
+		     PCLK_DBG_DIV_MASK | ATCLK_CORE_DIV_MASK,
+		     pclk_dbg_div << PCLK_DBG_DIV_SHIFT |
+		     atclk_div << ATCLK_CORE_DIV_SHIFT);
 }
 #define I2C_CLK_REG_MASK(bus) \
 			(I2C_DIV_CON_MASK << \
@@ -1021,7 +1040,8 @@ static void rkclk_init(struct rk3399_cru *cru)
 	u32 hclk_div;
 	u32 pclk_div;
 
-	rk3399_configure_cpu(cru, APLL_L_600_MHZ);
+	rk3399_configure_cpu(cru, APLL_600_MHZ, CPU_CLUSTER_LITTLE);
+
 	/*
 	 * some cru registers changed by bootrom, we'd better reset them to
 	 * reset/default values described in TRM to avoid confusion in kernel.

commit 5f42424baefbb19c6b695a4e5d2096035db1d839
Author: Lin Huang <hl@rock-chips.com>
Date:   Tue Mar 6 10:10:31 2018 +0800

    clk: rockchip: Correct and standardize clock divisor range assertions
    
    Some of the asserts for valid clock divisor ranges were off by one. This
    patch corrects them and writes them all in a consistent way.
    
    Change-Id: Ia87974c8e27b7414cfe9210a916d114aa81f5ccb
    Signed-off-by: Lin Huang <hl@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index fc5c75e263..fc83271f91 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -401,14 +401,14 @@ static void rkclk_init(struct rk3288_cru *cru, struct rk3288_grf *grf)
 	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
 	 */
 	aclk_div = GPLL_HZ / PD_BUS_ACLK_HZ - 1;
-	assert((aclk_div + 1) * PD_BUS_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f);
+	assert((aclk_div + 1) * PD_BUS_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
 	hclk_div = PD_BUS_ACLK_HZ / PD_BUS_HCLK_HZ - 1;
 	assert((hclk_div + 1) * PD_BUS_HCLK_HZ ==
-		PD_BUS_ACLK_HZ && (hclk_div < 0x4) && (hclk_div != 0x2));
+		PD_BUS_ACLK_HZ && (hclk_div <= 0x3) && (hclk_div != 0x2));
 
 	pclk_div = PD_BUS_ACLK_HZ / PD_BUS_PCLK_HZ - 1;
 	assert((pclk_div + 1) * PD_BUS_PCLK_HZ ==
-		PD_BUS_ACLK_HZ && pclk_div < 0x7);
+		PD_BUS_ACLK_HZ && pclk_div <= 0x7);
 
 	rk_clrsetreg(&cru->cru_clksel_con[1],
 		     PD_BUS_PCLK_DIV_MASK | PD_BUS_HCLK_DIV_MASK |
@@ -423,15 +423,15 @@ static void rkclk_init(struct rk3288_cru *cru, struct rk3288_grf *grf)
 	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
 	 */
 	aclk_div = GPLL_HZ / PERI_ACLK_HZ - 1;
-	assert((aclk_div + 1) * PERI_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f);
+	assert((aclk_div + 1) * PERI_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
 
 	hclk_div = ilog2(PERI_ACLK_HZ / PERI_HCLK_HZ);
 	assert((1 << hclk_div) * PERI_HCLK_HZ ==
-		PERI_ACLK_HZ && (hclk_div < 0x4));
+		PERI_ACLK_HZ && (hclk_div <= 0x2));
 
 	pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ);
 	assert((1 << pclk_div) * PERI_PCLK_HZ ==
-		PERI_ACLK_HZ && (pclk_div < 0x4));
+		PERI_ACLK_HZ && (pclk_div <= 0x3));
 
 	rk_clrsetreg(&cru->cru_clksel_con[10],
 		     PERI_PCLK_DIV_MASK | PERI_HCLK_DIV_MASK |
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 5d47274949..5d6c2a30ec 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -498,7 +498,7 @@ static ulong rk3399_i2c_set_clk(struct rk3399_cru *cru, ulong clk_id, uint hz)
 
 	/* i2c0,4,8 src clock from ppll, i2c1,2,3,5,6,7 src clock from gpll*/
 	src_clk_div = GPLL_HZ / hz;
-	assert(src_clk_div - 1 < 127);
+	assert(src_clk_div - 1 <= 127);
 
 	switch (clk_id) {
 	case SCLK_I2C1:
@@ -639,7 +639,7 @@ static ulong rk3399_vop_set_clk(struct rk3399_cru *cru, ulong clk_id, u32 hz)
 	}
 	/* vop aclk source clk: cpll */
 	div = CPLL_HZ / aclk_vop;
-	assert(div - 1 < 32);
+	assert(div - 1 <= 31);
 
 	rk_clrsetreg(aclkreg_addr,
 		     ACLK_VOP_PLL_SEL_MASK | ACLK_VOP_DIV_CON_MASK,
@@ -821,7 +821,7 @@ static ulong rk3399_saradc_set_clk(struct rk3399_cru *cru, uint hz)
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1;
-	assert(src_clk_div < 128);
+	assert(src_clk_div <= 255);
 
 	rk_clrsetreg(&cru->clksel_con[26],
 		     CLK_SARADC_DIV_CON_MASK,
@@ -1037,15 +1037,15 @@ static void rkclk_init(struct rk3399_cru *cru)
 
 	/* configure perihp aclk, hclk, pclk */
 	aclk_div = GPLL_HZ / PERIHP_ACLK_HZ - 1;
-	assert((aclk_div + 1) * PERIHP_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f);
+	assert((aclk_div + 1) * PERIHP_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
 
 	hclk_div = PERIHP_ACLK_HZ / PERIHP_HCLK_HZ - 1;
 	assert((hclk_div + 1) * PERIHP_HCLK_HZ ==
-	       PERIHP_ACLK_HZ && (hclk_div < 0x4));
+	       PERIHP_ACLK_HZ && (hclk_div <= 0x3));
 
 	pclk_div = PERIHP_ACLK_HZ / PERIHP_PCLK_HZ - 1;
 	assert((pclk_div + 1) * PERIHP_PCLK_HZ ==
-	       PERIHP_ACLK_HZ && (pclk_div < 0x7));
+	       PERIHP_ACLK_HZ && (pclk_div <= 0x7));
 
 	rk_clrsetreg(&cru->clksel_con[14],
 		     PCLK_PERIHP_DIV_CON_MASK | HCLK_PERIHP_DIV_CON_MASK |
@@ -1057,15 +1057,15 @@ static void rkclk_init(struct rk3399_cru *cru)
 
 	/* configure perilp0 aclk, hclk, pclk */
 	aclk_div = GPLL_HZ / PERILP0_ACLK_HZ - 1;
-	assert((aclk_div + 1) * PERILP0_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f);
+	assert((aclk_div + 1) * PERILP0_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
 
 	hclk_div = PERILP0_ACLK_HZ / PERILP0_HCLK_HZ - 1;
 	assert((hclk_div + 1) * PERILP0_HCLK_HZ ==
-	       PERILP0_ACLK_HZ && (hclk_div < 0x4));
+	       PERILP0_ACLK_HZ && (hclk_div <= 0x3));
 
 	pclk_div = PERILP0_ACLK_HZ / PERILP0_PCLK_HZ - 1;
 	assert((pclk_div + 1) * PERILP0_PCLK_HZ ==
-	       PERILP0_ACLK_HZ && (pclk_div < 0x7));
+	       PERILP0_ACLK_HZ && (pclk_div <= 0x7));
 
 	rk_clrsetreg(&cru->clksel_con[23],
 		     PCLK_PERILP0_DIV_CON_MASK | HCLK_PERILP0_DIV_CON_MASK |
@@ -1078,11 +1078,11 @@ static void rkclk_init(struct rk3399_cru *cru)
 	/* perilp1 hclk select gpll as source */
 	hclk_div = GPLL_HZ / PERILP1_HCLK_HZ - 1;
 	assert((hclk_div + 1) * PERILP1_HCLK_HZ ==
-	       GPLL_HZ && (hclk_div < 0x1f));
+	       GPLL_HZ && (hclk_div <= 0x1f));
 
 	pclk_div = PERILP1_HCLK_HZ / PERILP1_PCLK_HZ - 1;
 	assert((pclk_div + 1) * PERILP1_PCLK_HZ ==
-	       PERILP1_HCLK_HZ && (pclk_div < 0x7));
+	       PERILP1_HCLK_HZ && (pclk_div <= 0x7));
 
 	rk_clrsetreg(&cru->clksel_con[25],
 		     PCLK_PERILP1_DIV_CON_MASK | HCLK_PERILP1_DIV_CON_MASK |
@@ -1295,6 +1295,7 @@ static void pmuclk_init(struct rk3399_pmucru *pmucru)
 
 	/*  configure pmu pclk */
 	pclk_div = PPLL_HZ / PMU_PCLK_HZ - 1;
+	assert((pclk_div + 1) * PMU_PCLK_HZ == PPLL_HZ && pclk_div <= 0x1f);
 	rk_clrsetreg(&pmucru->pmucru_clksel[0],
 		     PMU_PCLK_DIV_CON_MASK,
 		     pclk_div << PMU_PCLK_DIV_CON_SHIFT);

commit 1702a77f8e744d637f4d92ef9b3924582881533b
Author: Lin Huang <hl@rock-chips.com>
Date:   Tue Mar 6 09:55:59 2018 +0800

    clk: rockchip: rk3399: Fix rkclk_init() to actually use PERILP1_PCLK_HZ
    
    This patch fixes a typo in the clock initialization code that caused the
    PERILP1_PCLK_HZ constant to be ignored and the clock to always run at
    the same speed as its parent (PERILP1_HCLK_HZ). Since we've done all our
    previous tests and validation with this bug, we should probably increase
    the value of the constant (that had not actually been used) to the value
    that we had been incorrectly using instead.
    
    Change-Id: I8e1725f71ea0dbacd01929b8e8a80b91dc4f17cc
    Signed-off-by: Lin Huang <hl@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
index 033f067122..c0319479b2 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
@@ -90,7 +90,7 @@ check_member(rk3399_cru, sdio1_con[1], 0x594);
 #define PERILP0_PCLK_HZ	(49500*KHz)
 
 #define PERILP1_HCLK_HZ	(99000*KHz)
-#define PERILP1_PCLK_HZ	(49500*KHz)
+#define PERILP1_PCLK_HZ	(99000*KHz)
 
 #define PWM_CLOCK_HZ    PMU_PCLK_HZ
 
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 4fe37f7c5c..5d47274949 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -1080,9 +1080,9 @@ static void rkclk_init(struct rk3399_cru *cru)
 	assert((hclk_div + 1) * PERILP1_HCLK_HZ ==
 	       GPLL_HZ && (hclk_div < 0x1f));
 
-	pclk_div = PERILP1_HCLK_HZ / PERILP1_HCLK_HZ - 1;
-	assert((pclk_div + 1) * PERILP1_HCLK_HZ ==
-	       PERILP1_HCLK_HZ && (hclk_div < 0x7));
+	pclk_div = PERILP1_HCLK_HZ / PERILP1_PCLK_HZ - 1;
+	assert((pclk_div + 1) * PERILP1_PCLK_HZ ==
+	       PERILP1_HCLK_HZ && (pclk_div < 0x7));
 
 	rk_clrsetreg(&cru->clksel_con[25],
 		     PCLK_PERILP1_DIV_CON_MASK | HCLK_PERILP1_DIV_CON_MASK |

commit 102804ecccd6987c1cd964cbfe562fae119f8b9b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Mar 5 16:22:08 2018 +0800

    video: pwm_backlight: fix backlight disable fail issue
    
    1. set duty as 0;
    2. if there is not "enable-gpios", don't disable pwm;
    
    Change-Id: Ie788da61a38a6bfce4cdc5395e522e71a599eef0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/video/pwm_backlight.c b/drivers/video/pwm_backlight.c
index 13c20c2f9d..a124a961cb 100644
--- a/drivers/video/pwm_backlight.c
+++ b/drivers/video/pwm_backlight.c
@@ -55,7 +55,9 @@ static int pwm_backlight_enable(struct udevice *dev)
 	if (ret)
 		return ret;
 	mdelay(10);
-	dm_gpio_set_value(&priv->enable, 1);
+
+	if (dm_gpio_is_valid(&priv->enable))
+		dm_gpio_set_value(&priv->enable, 1);
 
 	return 0;
 }
@@ -64,22 +66,26 @@ static int pwm_backlight_disable(struct udevice *dev)
 {
 	struct pwm_backlight_priv *priv = dev_get_priv(dev);
 	struct dm_regulator_uclass_platdata *plat;
-	uint duty_cycle;
 	int ret;
 
-	duty_cycle = priv->period_ns * (priv->default_level - priv->min_level) /
-		(priv->max_level - priv->min_level + 1);
-	ret = pwm_set_config(priv->pwm, priv->channel, priv->period_ns,
-			     duty_cycle);
+	ret = pwm_set_config(priv->pwm, priv->channel, priv->period_ns, 0);
 	if (ret)
 		return ret;
 
-	ret = pwm_set_enable(priv->pwm, priv->channel, false);
-	if (ret)
-		return ret;
+	/*
+	 * Sometimes there is not "enable-gpios", we have to set pwm output
+	 * 0% or 100% duty to play role like "enable-gpios", so we should not
+	 * disable pwm, let's keep it enabled.
+	 */
+	if (dm_gpio_is_valid(&priv->enable)) {
+		ret = pwm_set_enable(priv->pwm, priv->channel, false);
+		if (ret)
+			return ret;
+	}
 
 	mdelay(10);
-	dm_gpio_set_value(&priv->enable, 0);
+	if (dm_gpio_is_valid(&priv->enable))
+		dm_gpio_set_value(&priv->enable, 0);
 
 	if (priv->reg) {
 		plat = dev_get_uclass_platdata(priv->reg);

commit 409b7b498bbe7dfd37828ae2cc11c65feddc419f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Mar 5 15:54:57 2018 +0800

    pwm: rk_pwm: don't default disable pwm while set config
    
    Change-Id: Id6be8fcef2da98662ebbcaff5df4dc014303914a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/pwm/rk_pwm.c b/drivers/pwm/rk_pwm.c
index 9eb3b369d0..13ba2279d9 100644
--- a/drivers/pwm/rk_pwm.c
+++ b/drivers/pwm/rk_pwm.c
@@ -44,12 +44,16 @@ static int rk_pwm_set_config(struct udevice *dev, uint channel, uint period_ns,
 	struct rk_pwm_priv *priv = dev_get_priv(dev);
 	struct rk3288_pwm *regs = priv->regs;
 	unsigned long period, duty;
+	uint32_t ctrl;
 
 	debug("%s: period_ns=%u, duty_ns=%u\n", __func__, period_ns, duty_ns);
-	writel(PWM_SEL_SRC_CLK | PWM_OUTPUT_LEFT | PWM_LP_DISABLE |
-		PWM_CONTINUOUS | priv->enable_conf |
-		RK_PWM_DISABLE,
-		&regs->ctrl);
+
+	ctrl = readl(&regs->ctrl);
+	/* Ignore bit0: RK_PWM_ENABLE */
+	ctrl &= ~0xfffe;
+	ctrl |= PWM_SEL_SRC_CLK | PWM_OUTPUT_LEFT | PWM_LP_DISABLE |
+		PWM_CONTINUOUS | priv->enable_conf;
+	writel(ctrl, &regs->ctrl);
 
 	period = lldiv((uint64_t)(priv->freq / 1000) * period_ns, 1000000);
 	duty = lldiv((uint64_t)(priv->freq / 1000) * duty_ns, 1000000);

commit b4011071620841a6415ac1341094109c85542e72
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Mar 5 11:29:11 2018 +0800

    rockchip: dts: rk3326-evb: fix typo "RK3126" -> "RK3326"
    
    Change-Id: I75afe0e718f1589d758d11f326526d505aef4fd9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3326-evb.dts b/arch/arm/dts/rk3326-evb.dts
index 93504616ac..eca91526e3 100644
--- a/arch/arm/dts/rk3326-evb.dts
+++ b/arch/arm/dts/rk3326-evb.dts
@@ -10,7 +10,7 @@
 #include <dt-bindings/input/input.h>
 
 / {
-	model = "Rockchip RK3126 EVB";
+	model = "Rockchip RK3326 EVB";
 	compatible = "rockchip,rk3326-evb", "rockchip,rk3326";
 
 	chosen {

commit da980a52008a37e1fe33e8832b8c278cda6b9c61
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Mar 5 20:41:23 2018 +0800

    lib: avb: initialize temp_flag before next used
    
    Change-Id: Icbc570fdb1cd1f8ff30309f5776421ee6c4a086b
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/lib/avb/rk_avb_user/rk_avb_ops_user.c b/lib/avb/rk_avb_user/rk_avb_ops_user.c
index d060da5d8f..7e78dcca95 100644
--- a/lib/avb/rk_avb_user/rk_avb_ops_user.c
+++ b/lib/avb/rk_avb_user/rk_avb_ops_user.c
@@ -579,6 +579,7 @@ void rk_avb_get_at_vboot_state(char *buf)
 	}
 	sprintf(buf, "%s%s%s%s", buf, avb_perm_attr_set, perm_attr_flag, crlf);
 
+	temp_flag = 0;
 	if (rk_avb_read_lock_state((uint8_t *)&temp_flag)) {
 		printf("Can not read lock state!\n");
 		lock_val = "";
@@ -590,6 +591,7 @@ void rk_avb_get_at_vboot_state(char *buf)
 	sprintf(buf, "%s%s%s%s%s%s%s", buf, avb_lock, lock_val, crlf,
 		avb_unlock_dis, unlocK_dis_val, crlf);
 
+	temp_flag = 0;
 	if (rk_avb_read_bootloader_locked_flag((uint8_t *)&temp_flag)) {
 		printf("Can not read bootloader locked flag!\n");
 		bootloader_locked_flag = "";

commit 2e40c2c11f0d1e8bad5bb55706ee814183cfa21f
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Feb 28 10:46:55 2018 +0800

    fastboot: update fastboot commands
    
    1. cb_oem.
    2. cb_flashing.
    3. cd_flash.
    
    Change-Id: I6348c53c992b794f37d6d1813be04bd3dc63d1b5
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 472d32e6d2..8a54408dd9 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -12,6 +12,7 @@
  */
 #include <config.h>
 #include <common.h>
+#include <console.h>
 #include <errno.h>
 #include <fastboot.h>
 #include <malloc.h>
@@ -19,10 +20,14 @@
 #include <linux/usb/gadget.h>
 #include <linux/usb/composite.h>
 #include <linux/compiler.h>
+#include <u-boot/sha256.h>
 #include <version.h>
 #include <g_dnl.h>
+#include <fs.h>
 #include <android_avb/avb_ops_user.h>
 #include <android_avb/rk_avb_ops_user.h>
+#include <dm/uclass.h>
+#include <power/fuel_gauge.h>
 #ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV
 #include <fb_mmc.h>
 #endif
@@ -785,8 +790,6 @@ static void cb_upload(struct usb_ep *ep, struct usb_request *req)
 {
 	char response[FASTBOOT_RESPONSE_LEN];
 
-
-
 	printf("Starting upload of %d bytes\n", upload_size);
 
 	if (0 == upload_size) {
@@ -840,7 +843,7 @@ static void cb_set_active(struct usb_ep *ep, struct usb_request *req)
 	strsep(&cmd, ":");
 	if (!cmd) {
 		pr_err("missing slot name");
-		fastboot_tx_write_str("FAIL: missing slot name");
+		fastboot_tx_write_str("FAILmissing slot name");
 		return;
 	}
 #ifdef CONFIG_RK_AVB_LIBAVB_USER
@@ -852,7 +855,7 @@ static void cb_set_active(struct usb_ep *ep, struct usb_request *req)
 		slot_number = 1;
 		rk_avb_set_slot_active(&slot_number);
 	} else {
-		fastboot_tx_write_str("FAIL: unkown slot name");
+		fastboot_tx_write_str("FAILunkown slot name");
 		return;
 	}
 
@@ -873,8 +876,15 @@ static void cb_flash(struct usb_ep *ep, struct usb_request *req)
 	uint8_t flash_lock_state;
 
 	if (rk_avb_read_flash_lock_state(&flash_lock_state)) {
-		fastboot_tx_write_str("FAIL");
-		return;
+		/* write the device flashing unlock when first read */
+		if (rk_avb_write_flash_lock_state(1)) {
+			fastboot_tx_write_str("FAILflash lock state write failure");
+			return;
+		}
+		if (rk_avb_read_flash_lock_state(&flash_lock_state)) {
+			fastboot_tx_write_str("FAILflash lock state read failure");
+			return;
+		}
 	}
 
 	if (flash_lock_state == 0) {
@@ -911,7 +921,8 @@ static void cb_flashing(struct usb_ep *ep, struct usb_request *req)
 		uint8_t flash_lock_state;
 		flash_lock_state = 0;
 		if (rk_avb_write_flash_lock_state(flash_lock_state))
-			fastboot_tx_write_str("FAIL");
+			fastboot_tx_write_str("FAILflash lock state"
+					      " write failure");
 		else
 			fastboot_tx_write_str("OKAY");
 #else
@@ -922,7 +933,8 @@ static void cb_flashing(struct usb_ep *ep, struct usb_request *req)
 		uint8_t flash_lock_state;
 		flash_lock_state = 1;
 		if (rk_avb_write_flash_lock_state(flash_lock_state))
-			fastboot_tx_write_str("FAIL");
+			fastboot_tx_write_str("FAILflash lock state"
+					      " write failure");
 		else
 			fastboot_tx_write_str("OKAY");
 #else
@@ -946,6 +958,108 @@ static void cb_flashing(struct usb_ep *ep, struct usb_request *req)
 }
 #endif
 
+static void cb_oem_perm_attr(void)
+{
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
+	sha256_context ctx;
+	uint8_t digest[SHA256_SUM_LEN] = {0};
+	uint8_t digest_temp[SHA256_SUM_LEN] = {0};
+	uint8_t perm_attr_temp[PERM_ATTR_TOTAL_SIZE] = {0};
+	uint8_t flag = 0;
+
+	if (PERM_ATTR_TOTAL_SIZE != download_bytes) {
+		printf("Permanent attribute size is not equal!\n");
+		fastboot_tx_write_str("FAILincorrect perm attribute size");
+		return;
+	}
+
+	if (rk_avb_read_perm_attr_flag(&flag)) {
+		printf("rk_avb_read_perm_attr_flag error!\n");
+		fastboot_tx_write_str("FAILperm attr read failed");
+		return;
+	}
+
+	if (flag == PERM_ATTR_SUCCESS_FLAG) {
+		if (rk_avb_read_attribute_hash(digest_temp,
+					       SHA256_SUM_LEN)) {
+			printf("The efuse IO can not be used!\n");
+			fastboot_tx_write_str("FAILefuse IO can not be used");
+			return;
+		}
+
+		if (memcmp(digest, digest_temp, SHA256_SUM_LEN) != 0) {
+			if (rk_avb_read_permanent_attributes(perm_attr_temp,
+							     PERM_ATTR_TOTAL_SIZE)) {
+				printf("rk_avb_write_permanent_attributes error!\n");
+				fastboot_tx_write_str("FAILread perm attr error");
+				return;
+			}
+
+			sha256_starts(&ctx);
+			sha256_update(&ctx,
+				      (const uint8_t *)perm_attr_temp,
+				      PERM_ATTR_TOTAL_SIZE);
+			sha256_finish(&ctx, digest);
+			if (memcmp(digest, digest_temp, SHA256_SUM_LEN) == 0) {
+				printf("The hash has been written!\n");
+				fastboot_tx_write_str("OKAY");
+				return;
+			}
+		}
+
+		if (rk_avb_write_perm_attr_flag(0)) {
+			fastboot_tx_write_str("FAILperm attr flag write failure");
+			return;
+		}
+	}
+
+	if (rk_avb_write_permanent_attributes((uint8_t *)
+					      CONFIG_FASTBOOT_BUF_ADDR,
+					      download_bytes)) {
+		if (rk_avb_write_perm_attr_flag(0)) {
+			fastboot_tx_write_str("FAILperm attr flag write failure");
+			return;
+		}
+		fastboot_tx_write_str("FAILperm attr write failed");
+		return;
+	}
+
+	memset(digest, 0, SHA256_SUM_LEN);
+	sha256_starts(&ctx);
+	sha256_update(&ctx, (const uint8_t *)CONFIG_FASTBOOT_BUF_ADDR,
+		      PERM_ATTR_TOTAL_SIZE);
+	sha256_finish(&ctx, digest);
+
+	if (rk_avb_write_attribute_hash((uint8_t *)digest,
+					SHA256_SUM_LEN)) {
+		if (rk_avb_read_attribute_hash(digest_temp,
+						SHA256_SUM_LEN)) {
+			printf("The efuse IO can not be used!\n");
+			fastboot_tx_write_str("FAILefuse IO can not be used");
+			return;
+		}
+		if (memcmp(digest, digest_temp, SHA256_SUM_LEN) != 0) {
+			if (rk_avb_write_perm_attr_flag(0)) {
+				fastboot_tx_write_str("FAILperm attr flag write failure");
+				return;
+			}
+			printf("The hash has been written, but is different!\n");
+			fastboot_tx_write_str("FAILhash comparison failure");
+			return;
+		}
+	}
+
+	if (rk_avb_write_perm_attr_flag(PERM_ATTR_SUCCESS_FLAG)) {
+		fastboot_tx_write_str("FAILperm attr flag write failure");
+		return;
+	}
+
+	fastboot_tx_write_str("OKAY");
+#else
+	fastboot_tx_write_str("FAILnot implemented");
+#endif
+}
+
 static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 {
 	char *cmd = req->buf;
@@ -956,7 +1070,7 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
                 sprintf(cmdbuf, "gpt write mmc %x $partitions",
 			CONFIG_FASTBOOT_FLASH_MMC_DEV);
                 if (run_command(cmdbuf, 0))
-			fastboot_tx_write_str("FAIL");
+			fastboot_tx_write_str("FAILmmc write failure");
                 else
 			fastboot_tx_write_str("OKAY");
 	} else
@@ -965,13 +1079,13 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 		fastboot_tx_write_str("FAILnot implemented");
 	} else if (strncmp("at-get-ca-request", cmd + 4, 17) == 0) {
 #ifdef CONFIG_OPTEE_CLIENT
-		uint8_t operation_start[128];
-		uint8_t out[256];
+		uint8_t out[ATTEST_CA_OUT_SIZE];
 		uint32_t operation_size = download_bytes;
-		uint32_t out_len = 256;
+		uint32_t out_len = ATTEST_CA_OUT_SIZE;
 		uint32_t res = 0;
-		memcpy(operation_start, (void *)CONFIG_FASTBOOT_BUF_ADDR, download_bytes);
-		res = trusty_attest_get_ca(operation_start, &operation_size, out, &out_len);
+
+		res = trusty_attest_get_ca((uint8_t *)CONFIG_FASTBOOT_BUF_ADDR,
+					   &operation_size, out, &out_len);
 		if (res) {
 			fastboot_tx_write_str("FAILtrusty_attest_get_ca failed");
 			return;
@@ -985,16 +1099,15 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 #endif
 	} else if (strncmp("at-set-ca-response", cmd + 4, 18) == 0) {
 #ifdef CONFIG_OPTEE_CLIENT
-		uint8_t ca_response[8*1024];
 		uint32_t ca_response_size = download_bytes;
 		uint32_t res = 0;
-		memcpy(ca_response, (void *)CONFIG_FASTBOOT_BUF_ADDR, download_bytes);
-		res = trusty_attest_set_ca(ca_response, &ca_response_size);
-		if (res) {
+
+		res = trusty_attest_set_ca((uint8_t *)CONFIG_FASTBOOT_BUF_ADDR,
+					   &ca_response_size);
+		if (res)
 			fastboot_tx_write_str("FAILtrusty_attest_set_ca failed");
-		} else {
+		else
 			fastboot_tx_write_str("OKAY");
-		}
 #else
 		fastboot_tx_write_str("FAILnot implemented");
 		return;
@@ -1004,7 +1117,7 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 		uint8_t lock_state;
 		lock_state = 0;
 		if (rk_avb_write_lock_state(lock_state))
-			fastboot_tx_write_str("FAIL");
+			fastboot_tx_write_str("FAILwrite lock state failed");
 		else
 			fastboot_tx_write_str("OKAY");
 #else
@@ -1014,13 +1127,13 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 #ifdef CONFIG_RK_AVB_LIBAVB_USER
 		uint8_t lock_state;
 		if (rk_avb_read_lock_state(&lock_state))
-			fastboot_tx_write_str("FAIL");
+			fastboot_tx_write_str("FAILlock sate read failure");
 		if (lock_state >> 1 == 1) {
 			fastboot_tx_write_str("FAILThe vboot is disable!");
 		} else {
 			lock_state = 1;
 			if (rk_avb_write_lock_state(lock_state))
-				fastboot_tx_write_str("FAIL");
+				fastboot_tx_write_str("FAILwrite lock state failed");
 			else
 				fastboot_tx_write_str("OKAY");
 		}
@@ -1032,57 +1145,33 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 		uint8_t lock_state;
 		lock_state = 2;
 		if (rk_avb_write_lock_state(lock_state))
-			fastboot_tx_write_str("FAIL");
+			fastboot_tx_write_str("FAILwrite lock state failed");
 		else
 			fastboot_tx_write_str("OKAY");
 #else
 		fastboot_tx_write_str("FAILnot implemented");
 #endif
 	} else if (strncmp("fuse at-perm-attr", cmd + 4, 16) == 0) {
-#ifdef CONFIG_RK_AVB_LIBAVB_USER
-		if (PERM_ATTR_TOTAL_SIZE != download_bytes) {
-			printf("Permanent attribute size is not equal!\n");
-			fastboot_tx_write_str("FAIL");
-			return;
-		}
-
-		if (rk_avb_write_permanent_attributes((uint8_t *)(size_t)
-					       CONFIG_FASTBOOT_BUF_ADDR,
-					       download_bytes
-					       - PERM_ATTR_DIGEST_SIZE)) {
-			fastboot_tx_write_str("FAIL");
-			return;
-		}
-
-		if (rk_avb_write_attribute_hash((uint8_t *)(size_t)
-					     (CONFIG_FASTBOOT_BUF_ADDR
-					     + download_bytes
-					     - PERM_ATTR_DIGEST_SIZE),
-					     PERM_ATTR_DIGEST_SIZE)) {
-			fastboot_tx_write_str("FAIL");
-			return;
-		}
-
-		if (rk_avb_write_perm_attr_flag(1)) {
-			fastboot_tx_write_str("FAIL");
-			return;
-		}
-
-		fastboot_tx_write_str("OKAY");
-#else
-		fastboot_tx_write_str("FAILnot implemented");
-#endif
+		cb_oem_perm_attr();
 	} else if (strncmp("fuse at-bootloader-vboot-key", cmd + 4, 27) == 0) {
 #ifdef CONFIG_RK_AVB_LIBAVB_USER
+		sha256_context ctx;
+		uint8_t digest[SHA256_SUM_LEN];
+
 		if (download_bytes != VBOOT_KEY_HASH_SIZE) {
-			fastboot_tx_write_str("FAIL");
+			fastboot_tx_write_str("FAILinvalid vboot key length");
 			printf("The vboot key size error!\n");
+			return;
 		}
 
-		if (rk_avb_write_vbootkey_hash((uint8_t *)
-					    CONFIG_FASTBOOT_BUF_ADDR,
-					    VBOOT_KEY_HASH_SIZE)) {
-			fastboot_tx_write_str("FAIL");
+		sha256_starts(&ctx);
+		sha256_update(&ctx, (const uint8_t *)CONFIG_FASTBOOT_BUF_ADDR,
+			      VBOOT_KEY_SIZE);
+		sha256_finish(&ctx, digest);
+
+		if (rk_avb_write_vbootkey_hash((uint8_t *)digest,
+					       SHA256_SUM_LEN)) {
+			fastboot_tx_write_str("FAILvbootkey hash write failure");
 			return;
 		}
 		fastboot_tx_write_str("OKAY");
diff --git a/include/optee_include/OpteeClientInterface.h b/include/optee_include/OpteeClientInterface.h
index 9954cbf7aa..920e68155a 100644
--- a/include/optee_include/OpteeClientInterface.h
+++ b/include/optee_include/OpteeClientInterface.h
@@ -7,6 +7,11 @@
 #ifndef _OPTEECLIENTTEST_H_
 #define _OPTEECLIENTTEST_H_
 
+#define ATAP_HEX_UUID_LEN 32
+#define ATTEST_DH_SIZE     8
+#define ATTEST_UUID_SIZE     (ATAP_HEX_UUID_LEN+1)
+#define ATTEST_CA_OUT_SIZE     256
+
 void test_optee(void);
 uint32_t trusty_read_rollback_index(uint32_t slot, uint64_t *value);
 uint32_t trusty_write_rollback_index(uint32_t slot, uint64_t value);

commit 2ae0a53a439c007f3f2aeb3b8317abb843e87361
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Feb 26 10:36:19 2018 +0800

    arm: Bump COMMAND_LINE_SIZE to 2048
    
    The current limit is small for avb Boot args.
    
    Change-Id: I381fc1a09a533036427a3ed29395eae2f18208d1
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/include/asm/setup.h b/arch/arm/include/asm/setup.h
index 3a4e902af1..97e38b43b0 100644
--- a/arch/arm/include/asm/setup.h
+++ b/arch/arm/include/asm/setup.h
@@ -30,7 +30,7 @@
  *  - this structure is relatively short-lived - only
  *    guaranteed to contain useful data in setup_arch()
  */
-#define COMMAND_LINE_SIZE 1024
+#define COMMAND_LINE_SIZE 2048
 
 /* This is the old deprecated way to pass parameters to the kernel */
 struct param_struct {

commit 90ed034fda126c6f231284b54a884458a105f36e
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Sun Feb 25 20:59:23 2018 +0800

    lib: avb: change the return value if the item is not found
    
    Change-Id: Ie6d29a59323789c594b4c6e9167c3bbe58e25e9f
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/lib/avb/libavb_user/avb_ops_user.c b/lib/avb/libavb_user/avb_ops_user.c
index c7263be901..85303fe599 100644
--- a/lib/avb/libavb_user/avb_ops_user.c
+++ b/lib/avb/libavb_user/avb_ops_user.c
@@ -184,7 +184,7 @@ static AvbIOResult read_rollback_index(AvbOps *ops,
 		int ret;
 		ret = trusty_read_rollback_index(rollback_index_location,
 						 out_rollback_index);
-		if (ret == TEE_ERROR_GENERIC) {
+		if (ret == TEE_ERROR_ITEM_NOT_FOUND) {
 			*out_rollback_index = 0;
 			ret = trusty_write_rollback_index(rollback_index_location,
 							  *out_rollback_index);
@@ -228,7 +228,7 @@ static AvbIOResult read_is_device_unlocked(AvbOps *ops, bool *out_is_unlocked)
 		int ret;
 
 		ret = trusty_read_lock_state((uint8_t *)out_is_unlocked);
-		if (ret == TEE_ERROR_GENERIC) {
+		if (ret == TEE_ERROR_ITEM_NOT_FOUND) {
 			*out_is_unlocked = 1;
 			if (trusty_write_lock_state(*out_is_unlocked)) {
 				printf("%s: init lock state error\n", __FILE__);
diff --git a/lib/avb/rk_avb_user/rk_avb_ops_user.c b/lib/avb/rk_avb_user/rk_avb_ops_user.c
index 5aaad9a743..d060da5d8f 100644
--- a/lib/avb/rk_avb_user/rk_avb_ops_user.c
+++ b/lib/avb/rk_avb_user/rk_avb_ops_user.c
@@ -159,7 +159,7 @@ int rk_avb_read_flash_lock_state(uint8_t *flash_lock_state)
 	int ret;
 
 	ret = trusty_read_flash_lock_state(flash_lock_state);
-	if (ret == TEE_ERROR_GENERIC) {
+	if (ret == TEE_ERROR_ITEM_NOT_FOUND) {
 		*flash_lock_state = 1;
 		if (trusty_write_flash_lock_state(*flash_lock_state)) {
 			printf("trusty_write_flash_lock_state error!\n");
@@ -214,7 +214,7 @@ int rk_avb_read_lock_state(uint8_t *lock_state)
 	int ret;
 
 	ret = trusty_read_lock_state(lock_state);
-	if (ret == TEE_ERROR_GENERIC) {
+	if (ret == TEE_ERROR_ITEM_NOT_FOUND) {
 		*lock_state = 1;
 		if (rk_avb_write_lock_state(*lock_state)) {
 			printf("avb_write_lock_state error!\n");

commit d52a71fde06028a180ab26fe96a88b37ec93b2de
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Sun Feb 25 17:37:26 2018 +0800

    configs: rockchip: px30: enlarge malloc length
    
    The avb process may malloc a large buffer,
    so enlarge malloc length.
    
    Change-Id: I8a67d4c60ac4e0faa2726d1e188b7901b7f2a7c4
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index e8fadc6646..3f203635b1 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -9,7 +9,7 @@
 
 #include "rockchip-common.h"
 
-#define CONFIG_SYS_MALLOC_LEN		(32 << 20)
+#define CONFIG_SYS_MALLOC_LEN		(64 << 20) /* 64M */
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
 

commit 2301a6f51c333575cfe15fc6addf415b2d9bdbbd
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Sun Feb 25 13:54:57 2018 +0800

    rockchip: resrouce_img: support a/b
    
    If apply the a/b system, open the macro CONFIG_ANDROID_AB.
    Then get the dtb from the boot '_a' or '_b' image.
    
    Change-Id: I21ad9d5a5e6e63e26bc16b1aeeb2e690c669a535
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 5eba80243b..b9f8d15e47 100644
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -8,6 +8,10 @@
 #include <linux/list.h>
 #include <asm/arch/resource_img.h>
 #include <boot_rkimg.h>
+#ifdef CONFIG_ANDROID_AB
+#include <android_avb/libavb_ab.h>
+#include <android_avb/rk_avb_ops_user.h>
+#endif
 #ifdef CONFIG_ANDROID_BOOT_IMAGE
 #include <android_bootloader.h>
 #include <android_image.h>
@@ -183,6 +187,15 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 	if (mode == BOOT_MODE_RECOVERY)
 		boot_partname = PART_RECOVERY;
 	/* Read boot/recovery and chenc if this is an AOSP img */
+#ifdef CONFIG_ANDROID_AB
+	char slot_suffix[3] = {0};
+
+	if (rk_avb_get_current_slot(slot_suffix))
+		goto out;
+	boot_partname = android_str_append(boot_partname, slot_suffix);
+	if (boot_partname == NULL)
+		goto out;
+#endif
 	ret = part_get_info_by_name(dev_desc, boot_partname,
 					 &part_info);
 	if (ret < 0) {
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 25128ae446..725541c642 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -33,6 +33,24 @@
 #define ANDROID_ARG_FDT_FILENAME "kernel.dtb"
 #endif
 
+char *android_str_append(char *base_name, char *slot_suffix)
+{
+	char *part_name;
+	size_t part_name_len;
+
+	part_name_len = strlen(base_name) + 1;
+	if (slot_suffix)
+		part_name_len += strlen(slot_suffix);
+	part_name = malloc(part_name_len);
+	if (!part_name)
+		return NULL;
+	strcpy(part_name, base_name);
+	if (slot_suffix && (slot_suffix[0] != '\0'))
+		strcat(part_name, slot_suffix);
+
+	return part_name;
+}
+
 int android_bootloader_message_load(
 	struct blk_desc *dev_desc,
 	const disk_partition_t *part_info,
diff --git a/include/android_bootloader.h b/include/android_bootloader.h
index cd6a4995ef..19854c8bce 100644
--- a/include/android_bootloader.h
+++ b/include/android_bootloader.h
@@ -77,4 +77,13 @@ int android_bootloader_boot_kernel(unsigned long kernel_address);
  */
 int android_boot_flow(unsigned long kernel_address);
 
+/** str_append- add str to tail.
+ *
+ * @base_name:	base name address.
+ * @slot_suffix: suffix.
+ *
+ * @return (base name + suffix)address.
+ */
+char *android_str_append(char *base_name, char *slot_suffix);
+
 #endif  /* __ANDROID_BOOTLOADER_H */

commit 76c40fa69f88575822bba85681a95770c203805d
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Sat Feb 24 14:49:20 2018 +0800

    lib: avb: fix compile error in arm64
    
    Change-Id: I7be9c7bab1721500c70cacb1774b579d2939436a
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/lib/avb/rk_avb_user/rk_avb_ops_user.c b/lib/avb/rk_avb_user/rk_avb_ops_user.c
index 9b04ecbd98..5aaad9a743 100644
--- a/lib/avb/rk_avb_user/rk_avb_ops_user.c
+++ b/lib/avb/rk_avb_user/rk_avb_ops_user.c
@@ -427,7 +427,7 @@ int rk_avb_read_all_rollback_index(char *buffer)
 		}
 	}
 	debug("partition_name = %s\n", slot_data[0]->vbmeta_images->partition_name);
-	debug("vbmeta_size = %d\n", slot_data[0]->vbmeta_images->vbmeta_size);
+	debug("vbmeta_size = %d\n", (int)(size_t)slot_data[0]->vbmeta_images->vbmeta_size);
 
 	for (n = 0; n < AVB_MAX_NUMBER_OF_ROLLBACK_INDEX_LOCATIONS; n++) {
 		uint64_t rollback_index_value = 0;

commit 2a1017eb24b52343927dc503723d267d6ad6198d
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Sat Feb 24 14:48:15 2018 +0800

    fastboot: fix compile error in arm64
    
    Change-Id: I935989c0573e12a95fac5e3b92a37b1764fad2fc
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index d34475e579..472d32e6d2 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -1046,7 +1046,7 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 			return;
 		}
 
-		if (rk_avb_write_permanent_attributes((uint8_t *)
+		if (rk_avb_write_permanent_attributes((uint8_t *)(size_t)
 					       CONFIG_FASTBOOT_BUF_ADDR,
 					       download_bytes
 					       - PERM_ATTR_DIGEST_SIZE)) {
@@ -1054,7 +1054,7 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 			return;
 		}
 
-		if (rk_avb_write_attribute_hash((uint8_t *)
+		if (rk_avb_write_attribute_hash((uint8_t *)(size_t)
 					     (CONFIG_FASTBOOT_BUF_ADDR
 					     + download_bytes
 					     - PERM_ATTR_DIGEST_SIZE),

commit 326572ea3b5ae88536ca9388f0b140e7d26c6d7c
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Sat Feb 24 14:46:01 2018 +0800

    androidboot: fix compile error in arm64
    
    Change-Id: I68bff703ffbf8ef9a65e4d62a5cf1052bc49ac9b
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/cmd/boot_android.c b/cmd/boot_android.c
index b7c1e4ea51..d9dc0b5bee 100644
--- a/cmd/boot_android.c
+++ b/cmd/boot_android.c
@@ -141,7 +141,7 @@ int do_avb_init_ab_metadata(cmd_tbl_t *cmdtp, int flag,
 	AvbABData ab_data;
 
 	memset(&ab_data, 0, sizeof(AvbABData));
-	debug("sizeof(AvbABData) = %d\n", sizeof(AvbABData));
+	debug("sizeof(AvbABData) = %d\n", (int)(size_t)sizeof(AvbABData));
 	if (argc != 1)
 		return CMD_RET_USAGE;
 

commit 92f26f7214dc65432b0223f46495b087cba4d1ca
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Mar 5 09:19:29 2018 +0800

    make.sh: fix typo "RKRUST" -> "RKTRUST"
    
    Change-Id: Ia824691d68521652c4a5a7d03a5080b57a8ae7b9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 192ce4adc1..cc3176f2ee 100755
--- a/make.sh
+++ b/make.sh
@@ -152,7 +152,7 @@ pack_trust_image()
 	# ARM64 uses trust_merger
 	if grep  -q '^CONFIG_ARM64=y' ${OUTDIR}/.config ; then
 		if [ ! -f ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini ]; then
-			echo "pack trust failed! Can't find: ${RKBIN}/RKRUST/${RKCHIP}TRUST.ini"
+			echo "pack trust failed! Can't find: ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini"
 			return
 		fi
 
@@ -160,7 +160,7 @@ pack_trust_image()
 		${TOOLCHAIN_RKBIN}/trust_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini
 		cd -
 		mv ${RKBIN}/trust.img ./trust.img
-		echo "pack trust okay! Input: ${RKBIN}/RKRUST/${RKCHIP}TRUST.ini"
+		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini"
 	# ARM uses loaderimage
 	else
 		if [ ! -f ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini ]; then

commit e959b7070e4502f74f300dc4b8e16f07efd4ff42
Author: Lin Huang <hl@rock-chips.com>
Date:   Thu Mar 1 16:13:25 2018 +0800

    clk: rockchip: rk3399: support uart0~uart4 clock get rate
    
    some board will use other uart as console output,
    so add uart0~uart4 clock get rate.
    
    Change-Id: Iafde4819cdcf3e650fe14c7c3dd9784d953ba8a0
    Signed-off-by: Lin Huang <hl@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index b86f9f4b05..4fe37f7c5c 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -855,7 +855,9 @@ static ulong rk3399_clk_get_rate(struct clk *clk)
 		rate = rk3399_spi_get_clk(priv->cru, clk->id);
 		break;
 	case SCLK_UART0:
+	case SCLK_UART1:
 	case SCLK_UART2:
+	case SCLK_UART3:
 		return 24000000;
 		break;
 	case PCLK_HDMI_CTRL:
@@ -1250,6 +1252,9 @@ static ulong rk3399_pmuclk_get_rate(struct clk *clk)
 	case SCLK_I2C8_PMU:
 		rate = rk3399_i2c_get_pmuclk(priv->pmucru, clk->id);
 		break;
+	case SCLK_UART4_PMU:
+		rate = 24000000;
+		break;
 	default:
 		return -ENOENT;
 	}

commit e2bc9ab67abac644335605139bfe85b8d367862f
Author: Lin Huang <hl@rock-chips.com>
Date:   Mon Feb 26 10:04:02 2018 +0800

    rockchip: smccc: add psci_cpu_on function
    
    With this function, we can up other cpu in Uboot.
    
    Change-Id: I968b5e05ce42a1bf799dbae7e8d4dfcc3fd958f1
    Signed-off-by: Lin Huang <hl@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h b/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
index 01007363b3..0167f3c4df 100644
--- a/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
+++ b/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
@@ -67,5 +67,6 @@ struct arm_smccc_res sip_smc_request_share_mem(unsigned long page_num,
 
 int sip_smc_set_sip_version(unsigned long version);
 struct arm_smccc_res sip_smc_get_sip_version(void);
+int psci_cpu_on(unsigned long cpuid, unsigned long entry_point);
 
 #endif
diff --git a/arch/arm/mach-rockchip/rockchip_smccc.c b/arch/arm/mach-rockchip/rockchip_smccc.c
index 3eed441181..3af89fc57a 100644
--- a/arch/arm/mach-rockchip/rockchip_smccc.c
+++ b/arch/arm/mach-rockchip/rockchip_smccc.c
@@ -13,8 +13,10 @@
 
 #ifdef CONFIG_ARM64
 #define ARM_PSCI_1_0_SYSTEM_SUSPEND	ARM_PSCI_1_0_FN64_SYSTEM_SUSPEND
+#define ARM_PSCI_0_2_CPU_ON		ARM_PSCI_0_2_FN64_CPU_ON
 #else
 #define ARM_PSCI_1_0_SYSTEM_SUSPEND	ARM_PSCI_1_0_FN_SYSTEM_SUSPEND
+#define ARM_PSCI_0_2_CPU_ON		ARM_PSCI_0_2_FN_CPU_ON
 #endif
 
 #define SIZE_PAGE(n)	((n) << 12)
@@ -30,6 +32,15 @@ static struct arm_smccc_res __invoke_sip_fn_smc(unsigned long function_id,
 	return res;
 }
 
+int psci_cpu_on(unsigned long cpuid, unsigned long entry_point)
+{
+	struct arm_smccc_res res;
+
+	res = __invoke_sip_fn_smc(ARM_PSCI_0_2_CPU_ON, cpuid, entry_point, 0);
+
+	return res.a0;
+}
+
 int psci_system_suspend(unsigned long unused)
 {
 	struct arm_smccc_res res;

commit a37d9222c09b66c7b340194e53f12e8cb922826c
Author: shengfei Xu <xsf@rock-chips.com>
Date:   Thu Mar 1 16:00:06 2018 +0800

    configs: evb-px30: enable charge animation
    
    Change-Id: Ia12ca035f55af60e607ce48581fa3ecab34cb03d
    Signed-off-by: shengfei Xu <xsf@rock-chips.com>

diff --git a/configs/evb-rk3326_defconfig b/configs/evb-rk3326_defconfig
index 61cc552b5d..ffa693bac6 100644
--- a/configs/evb-rk3326_defconfig
+++ b/configs/evb-rk3326_defconfig
@@ -51,6 +51,7 @@ CONFIG_REGULATOR_PWM=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_REGULATOR_RK8XX=y
 CONFIG_DM_CHARGE_DISPLAY=y
+CONFIG_CHARGE_ANIMATION=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_DM_RESET=y

commit 0092730cdb7350f87cecef447160a2520584520e
Author: shengfei Xu <xsf@rock-chips.com>
Date:   Thu Mar 1 15:57:35 2018 +0800

    configs: evb-px30: enable fuel gauge rk817 driver
    
    Change-Id: I301e8f36e7ee56218ae29cb66285da1dc02acf5c
    Signed-off-by: shengfei Xu <xsf@rock-chips.com>

diff --git a/configs/evb-rk3326_defconfig b/configs/evb-rk3326_defconfig
index 8d394357f6..61cc552b5d 100644
--- a/configs/evb-rk3326_defconfig
+++ b/configs/evb-rk3326_defconfig
@@ -44,6 +44,7 @@ CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
+CONFIG_POWER_FG_RK817=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y

commit ef4591a5189025425656c714a4da62e88bc776f1
Author: shengfei Xu <xsf@rock-chips.com>
Date:   Tue Feb 27 23:16:43 2018 +0800

    power: fuel gauge: add rk817 support
    
    Change-Id: I721887363b8eeea628b0042d34f0ab66ed76e6a1
    Signed-off-by: shengfei Xu <xsf@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/Kconfig b/drivers/power/fuel_gauge/Kconfig
index 7ba34aadaf..ef0ea6a4ed 100644
--- a/drivers/power/fuel_gauge/Kconfig
+++ b/drivers/power/fuel_gauge/Kconfig
@@ -17,6 +17,12 @@ config POWER_FG_RK818
 	help
 	  This adds support for RK818 fuel gauge support.
 
+config POWER_FG_RK817
+	bool "RK817 Fuel gauge support"
+	depends on DM_FUEL_GAUGE && PMIC_RK8XX
+	help
+	  This adds support for RK817 fuel gauge support.
+
 config POWER_FG_RK816
 	bool "RK816 Fuel gauge support"
 	depends on DM_FUEL_GAUGE && PMIC_RK8XX
diff --git a/drivers/power/fuel_gauge/Makefile b/drivers/power/fuel_gauge/Makefile
index fa73ef770e..9f9f8912ee 100644
--- a/drivers/power/fuel_gauge/Makefile
+++ b/drivers/power/fuel_gauge/Makefile
@@ -10,4 +10,5 @@ obj-$(CONFIG_DM_FUEL_GAUGE) += fuel_gauge_uclass.o
 obj-$(CONFIG_POWER_FG_CW201X) += fg_cw201x.o
 obj-$(CONFIG_POWER_FG_MAX17042) += fg_max17042.o
 obj-$(CONFIG_POWER_FG_RK818) += fg_rk818.o
+obj-$(CONFIG_POWER_FG_RK817) += fg_rk817.o
 obj-$(CONFIG_POWER_FG_RK816) += fg_rk816.o
diff --git a/drivers/power/fuel_gauge/fg_rk817.c b/drivers/power/fuel_gauge/fg_rk817.c
new file mode 100644
index 0000000000..061f7f347a
--- /dev/null
+++ b/drivers/power/fuel_gauge/fg_rk817.c
@@ -0,0 +1,1211 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#include <dm.h>
+#include <errno.h>
+#include <common.h>
+#include <malloc.h>
+#include <fdtdec.h>
+#include <asm/gpio.h>
+#include <common.h>
+#include <power/pmic.h>
+#include <dm/uclass-internal.h>
+#include <power/charge_display.h>
+#include <power/charge_animation.h>
+#include <power/fuel_gauge.h>
+#include <power/rk8xx_pmic.h>
+#include <linux/usb/phy-rockchip-inno-usb2.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static int dbg_enable;
+#define DBG(args...) \
+	do { \
+		if (dbg_enable) { \
+			printf(args); \
+		} \
+	} while (0)
+
+#define DIV(value)	((value) ? (value) : 1)
+#define ENABLE			0x01
+#define DISABLE			0x00
+#define MAX_INTERPOLATE		1000
+#define MAX_PERCENTAGE		100
+#define MAX_INT			0x7FFF
+
+#define ADC_CONFIG0		0x0050
+#define CUR_ADC_CFG0		0x0051
+#define CUR_ADC_CFG1		0x0052
+#define VOL_ADC_CFG0		0x0053
+#define VOL_ADC_CFG1		0x0054
+#define ADC_CONFIG1		0x0055
+#define GG_CON			0x0056
+#define GG_STS			0x0057
+#define RELAX_THRE_H		0x0058
+#define RELAX_THRE_L		0x0059
+#define RELAX_VOL1_H		0x005a
+#define RELAX_VOL1_L		0x005b
+#define RELAX_VOL2_H		0x005c
+#define RELAX_VOL2_L		0x005d
+#define RELAX_CUR1_H		0x005e
+#define RELAX_CUR1_L		0x005f
+#define RELAX_CUR2_H		0x0060
+#define RELAX_CUR2_L		0x0061
+#define OCV_THRE_VOL		0x0062
+#define OCV_VOL_H		0x0063
+#define OCV_VOL_L		0x0064
+#define OCV_VOL0_H		0x0065
+#define OCV_VOL0_L		0x0066
+#define OCV_CUR_H		0x0067
+#define OCV_CUR_L		0x0068
+#define OCV_CUR0_H		0x0069
+#define OCV_CUR0_L		0x006a
+#define PWRON_VOL_H		0x006b
+#define PWRON_VOL_L		0x006c
+#define PWRON_CUR_H		0x006d
+#define PWRON_CUR_L		0x006e
+#define OFF_CNT			0x006f
+#define Q_INIT_H3		0x0070
+#define Q_INIT_H2		0x0071
+#define Q_INIT_L1		0x0072
+#define Q_INIT_L0		0x0073
+#define Q_PRES_H3		0x0074
+#define Q_PRES_H2		0x0075
+#define Q_PRES_L1		0x0076
+#define Q_PRES_L0		0x0077
+#define BAT_VOL_H		0x0078
+#define BAT_VOL_L		0x0079
+#define BAT_CUR_H		0x007a
+#define BAT_CUR			0x007b
+#define BAT_TS_H		0x007c
+#define BAT_TS_L		0x007d
+#define USB_VOL_H		0x007e
+#define USB_VOL_L		0x007f
+#define SYS_VOL_H		0x0080
+#define SYS_VOL_L		0x0081
+#define Q_MAX_H3		0x0082
+#define Q_MAX_H2		0x0083
+#define Q_MAX_L1		0x0084
+#define Q_MAX_L0		0x0085
+#define Q_TERM_H3		0x0086
+#define Q_TERM_H2		0x0087
+#define Q_TERM_L1		0x0088
+#define Q_TERM_L0		0x0089
+#define Q_OCV_H3		0x008a
+#define Q_OCV_H2		0x008b
+#define Q_OCV_L1		0x008c
+#define Q_OCV_L0		0x008d
+#define OCV_CNT			0x008e
+#define SLEEP_CON_SAMP_CUR_H	0x008f
+#define SLEEP_CON_SAMP_CUR	0x0090
+#define CAL_OFFSET_H		0x0091
+#define CAL_OFFSET_L		0x0092
+#define VCALIB0_H		0x0093
+#define VCALIB0_L		0x0094
+#define VCALIB1_H		0x0095
+#define VCALIB1_L		0x0096
+#define IOFFSET_H		0x0097
+#define IOFFSET_L		0x0098
+#define BAT_R0			0x0099
+#define BAT_R1			0x009a
+#define BAT_R2			0x009b
+#define BAT_R3			0x009c
+#define REMAIN_CAP_REG0		0x9d
+#define REMAIN_CAP_REG1		0x9e
+#define REMAIN_CAP_REG2		0x9f
+#define NEW_FCC_REG0		0x00a0
+#define NEW_FCC_REG1		0x00a1
+#define NEW_FCC_REG2		0x00a2
+#define DATA6			0x00a3
+#define DATA7			0x00a4
+#define FG_INIT			0x00a5
+#define HALT_CNT_REG		0x00a6
+#define DATA10			0x00a7
+#define DATA11			0x00a8
+#define VOL_ADC_B3		0x00a9
+#define VOL_ADC_B2		0x00aa
+#define VOL_ADC_B1		0x00ab
+#define VOL_ADC_B_7_0		0x00ac
+#define CUR_ADC_K3		0x00ad
+#define CUR_ADC_K2		0x00ae
+#define CUR_ADC_K1		0x00af
+#define CUR_ADC_K0		0x00b0
+#define BAT_CON			BIT(4)
+#define SOC_REG			0xa5
+
+#define USB_CTRL_REG		0x00E5
+#define PMIC_SYS_STS		0x00f0
+#define PLUG_IN_STS		BIT(6)
+
+#define CHRG_TERM_DSOC		90
+#define CHRG_TERM_K		650
+#define CHRG_FULL_K		400
+#define CHARGE_FINISH		(0x04 << 4)
+
+/* CALI PARAM */
+#define FINISH_CALI_CURR	1500
+#define TERM_CALI_CURR		600
+#define VIRTUAL_POWER_VOL	4200
+#define VIRTUAL_POWER_CUR	1000
+#define VIRTUAL_POWER_SOC	66
+#define SECONDS(n)		((n) * 1000)
+
+/* CHRG_CTRL_REG */
+#define ILIM_450MA		(0x00)
+#define ILIM_2000MA		(0x07)
+#define ILIM_1500MA		(0x03)
+#define VLIM_4500MV		(0x50)
+
+/* sample resistor and division */
+#define SAMPLE_RES_10mR		10
+#define SAMPLE_RES_20mR		20
+#define SAMPLE_RES_DIV1		1
+#define SAMPLE_RES_DIV2		2
+
+#define CHRG_CT_EN		BIT(1)
+#define MIN_FCC			500
+
+/* USB_CTRL_REG */
+#define INPUT_CUR_MSK		0x0f
+#define INPUT_VOL_MSK		0xf0
+#define VOL_OUPUT_INSTANT_MODE	0x02
+
+#define ADC_TO_CURRENT(adc_value, samp_res)	\
+	(adc_value * 172 / 1000 / samp_res)
+#define CURRENT_TO_ADC(current, samp_res)	\
+	(current * 1000 * samp_res / 172)
+
+#define ADC_TO_CAPACITY(adc_value, samp_res)	\
+	(adc_value / 1000 * 172 / 3600 / samp_res)
+#define CAPACITY_TO_ADC(capacity, samp_res)	\
+	(capacity * samp_res * 3600 / 172 * 1000)
+
+#define ADC_TO_CAPACITY_UAH(adc_value, samp_res)	\
+	(adc_value / 3600 * 172 / samp_res)
+#define ADC_TO_CAPACITY_MAH(adc_value, samp_res)	\
+	(adc_value / 1000 * 172 / 3600 / samp_res)
+
+/* charger type definition */
+enum charger_type {
+	NO_CHARGER = 0,
+	USB_CHARGER,
+	AC_CHARGER,
+	DC_CHARGER,
+	UNDEF_CHARGER,
+};
+
+struct rk817_battery_device {
+	struct udevice *dev;
+	int				res_div;
+	bool				is_first_power_on;
+	bool				is_initialized;
+	bool				bat_first_power_on;
+	int				current_avg;
+	int				current_pwron;
+	int				voltage_usb;
+	int				voltage_sys;
+	int				voltage_avg;
+	int				voltage_k;/* VCALIB0 VCALIB1 */
+	int				voltage_b;
+	u32				remain_cap;
+	int				design_cap;
+	int				nac;
+	int				fcc;
+	int				qmax;
+	int				dsoc;
+	int				rsoc;
+	int				pwron_voltage;
+	int				sm_linek;
+	int				sm_old_cap;
+	u8				calc_dsoc;
+	u8				calc_rsoc;
+	int				sm_chrg_dsoc;
+	u8				halt_cnt;
+	bool				is_halt;
+	int				dbg_pwr_dsoc;
+	int				dbg_pwr_rsoc;
+	int				dbg_pwr_vol;
+	int				dbg_meet_soc;
+	int				dbg_calc_dsoc;
+	int				dbg_calc_rsoc;
+	int				adc_allow_update;
+	int				pwroff_min;
+	int				chrg_cur_input;
+	u32				*ocv_table;
+	int				ocv_size;
+	u32				design_capacity;
+	u32				design_qmax;
+	u32				max_soc_offset;
+	u32				virtual_power;
+	u32				chrg_type;
+	ulong				finish_chrg_base;
+	ulong				term_sig_base;
+	int				sm_meet_soc;
+};
+
+static u32 interpolate(int value, u32 *table, int size)
+{
+	u8 i;
+	u16 d;
+
+	for (i = 0; i < size; i++) {
+		if (value < table[i])
+			break;
+	}
+
+	if ((i > 0) && (i < size)) {
+		d = (value - table[i - 1]) * (MAX_INTERPOLATE / (size - 1));
+		d /= table[i] - table[i - 1];
+		d = d + (i - 1) * (MAX_INTERPOLATE / (size - 1));
+	} else {
+		d = i * ((MAX_INTERPOLATE + size / 2) / size);
+	}
+
+	if (d > 1000)
+		d = 1000;
+
+	return d;
+}
+
+/* (a * b) / c */
+static int32_t ab_div_c(u32 a, u32 b, u32 c)
+{
+	bool sign;
+	u32 ans = MAX_INT;
+	int tmp;
+
+	sign = ((((a ^ b) ^ c) & 0x80000000) != 0);
+	if (c != 0) {
+		if (sign)
+			c = -c;
+		tmp = (a * b + (c >> 1)) / c;
+		if (tmp < MAX_INT)
+			ans = tmp;
+	}
+
+	if (sign)
+		ans = -ans;
+
+	return ans;
+}
+
+static int rk817_bat_read(struct rk817_battery_device *battery, u8 reg)
+{
+	return pmic_reg_read(battery->dev->parent, reg);
+}
+
+static void rk817_bat_write(struct rk817_battery_device *battery,
+			    u8 reg, u8 buf)
+{
+	pmic_reg_write(battery->dev->parent, reg, buf);
+}
+
+static int rk817_bat_get_vaclib0(struct rk817_battery_device *battery)
+{
+	int vcalib_value = 0;
+
+	vcalib_value |= rk817_bat_read(battery, VCALIB0_H) << 8;
+	vcalib_value |= rk817_bat_read(battery, VCALIB0_L);
+
+	return vcalib_value;
+}
+
+static int rk817_bat_get_vaclib1(struct rk817_battery_device *battery)
+{
+	int vcalib_value = 0;
+
+	vcalib_value |= rk817_bat_read(battery, VCALIB1_H) << 8;
+	vcalib_value |= rk817_bat_read(battery, VCALIB1_L);
+
+	return vcalib_value;
+}
+
+static void rk817_bat_init_voltage_kb(struct rk817_battery_device *battery)
+{
+	int vcalib0, vcalib1;
+
+	vcalib0 = rk817_bat_get_vaclib0(battery);
+	vcalib1 =  rk817_bat_get_vaclib1(battery);
+	battery->voltage_k = (4025 - 2300) * 1000 / DIV(vcalib1 - vcalib0);
+	battery->voltage_b = 4025 - (battery->voltage_k * vcalib1) / 1000;
+}
+
+/* power on battery voltage */
+static int rk817_bat_get_pwron_voltage(struct rk817_battery_device *battery)
+{
+	int vol, val = 0;
+
+	val = rk817_bat_read(battery, PWRON_VOL_H) << 8;
+	val |= rk817_bat_read(battery, PWRON_VOL_L);
+	vol = battery->voltage_k * val / 1000 + battery->voltage_b;
+
+	return vol;
+}
+
+static int rk817_bat_get_USB_voltage(struct rk817_battery_device *battery)
+{
+	int vol, val = 0;
+
+	val = rk817_bat_read(battery, USB_VOL_L) << 0;
+	val |= rk817_bat_read(battery, USB_VOL_H) << 8;
+
+	vol = (battery->voltage_k * val / 1000 + battery->voltage_b) * 60 / 46;
+
+	return vol;
+}
+
+static int rk817_bat_get_sys_voltage(struct rk817_battery_device *battery)
+{
+	int vol, val = 0;
+
+	val = rk817_bat_read(battery, SYS_VOL_H) << 8;
+	val |= rk817_bat_read(battery, SYS_VOL_L) << 0;
+
+	vol = (battery->voltage_k * val / 1000 + battery->voltage_b) * 60 / 46;
+
+	return vol;
+}
+
+static int rk817_bat_get_battery_voltage(struct rk817_battery_device *battery)
+{
+	int vol, val = 0;
+
+	val = rk817_bat_read(battery, BAT_VOL_H) << 8;
+	val |= rk817_bat_read(battery, BAT_VOL_L) << 0;
+
+	vol = battery->voltage_k * val / 1000 + battery->voltage_b;
+
+	return vol;
+}
+
+static int rk817_bat_get_avg_current(struct rk817_battery_device *battery)
+{
+	int cur, val = 0;
+
+	val |= rk817_bat_read(battery, BAT_CUR);
+	val |= rk817_bat_read(battery, BAT_CUR_H) << 8;
+
+	if (val & 0x8000)
+		val -= 0x10000;
+
+	cur = ADC_TO_CURRENT(val, battery->res_div);
+
+	return cur;
+}
+
+static int rk817_bat_get_pwron_current(struct rk817_battery_device *battery)
+{
+	int cur, val = 0;
+
+	val |= rk817_bat_read(battery, PWRON_CUR_L);
+	val |= rk817_bat_read(battery, PWRON_CUR_H) << 8;
+
+	if (val & 0x8000)
+		val -= 0x10000;
+	cur = ADC_TO_CURRENT(val, battery->res_div);
+
+	return cur;
+}
+
+static void rk817_bat_calibration(struct rk817_battery_device *battery)
+{
+	int  ioffset_value = 0;
+	u8  buf = 0;
+
+	if (rk817_bat_read(battery, ADC_CONFIG1) & 0x80) {
+		ioffset_value = rk817_bat_read(battery, IOFFSET_H) << 8;
+		ioffset_value |= rk817_bat_read(battery, IOFFSET_L);
+
+		buf = (ioffset_value >> 8) & 0xff;
+		rk817_bat_write(battery, CAL_OFFSET_H, buf);
+		buf = (ioffset_value >> 0) & 0xff;
+		rk817_bat_write(battery, CAL_OFFSET_L, buf);
+
+		rk817_bat_init_voltage_kb(battery);
+		rk817_bat_write(battery, ADC_CONFIG1, 0x80);
+	}
+}
+
+static u32 rk817_bat_get_capacity_uah(struct rk817_battery_device *battery)
+{
+	u32 val = 0, capacity;
+
+	val = rk817_bat_read(battery, Q_PRES_H3) << 24;
+	val |= rk817_bat_read(battery, Q_PRES_H2) << 16;
+	val |= rk817_bat_read(battery, Q_PRES_L1) << 8;
+	val |= rk817_bat_read(battery, Q_PRES_L0) << 0;
+
+	capacity = ADC_TO_CAPACITY_UAH(val, battery->res_div);
+	return  capacity;
+}
+
+static u32 rk817_bat_get_capacity_mah(struct rk817_battery_device *battery)
+{
+	u32 val, capacity;
+
+	val = rk817_bat_read(battery, Q_PRES_H3) << 24;
+	val |= rk817_bat_read(battery, Q_PRES_H2) << 16;
+	val |= rk817_bat_read(battery, Q_PRES_L1) << 8;
+	val |= rk817_bat_read(battery, Q_PRES_L0) << 0;
+
+	capacity = ADC_TO_CAPACITY(val, battery->res_div);
+
+	return  capacity;
+}
+
+static void rk817_bat_init_coulomb_cap(struct rk817_battery_device *battery,
+				       u32 capacity)
+{
+	u8 buf;
+	u32 cap;
+
+	cap = CAPACITY_TO_ADC(capacity, battery->res_div);
+	buf = (cap >> 24) & 0xff;
+	rk817_bat_write(battery, Q_INIT_H3, buf);
+	buf = (cap >> 16) & 0xff;
+	rk817_bat_write(battery, Q_INIT_H2, buf);
+	buf = (cap >> 8) & 0xff;
+	rk817_bat_write(battery, Q_INIT_L1, buf);
+	buf = (cap >> 0) & 0xff;
+	rk817_bat_write(battery, Q_INIT_L0, buf);
+
+	battery->rsoc = capacity * 1000 * 100 / battery->fcc;
+	battery->remain_cap = capacity * 1000;
+}
+
+static void rk817_bat_save_cap(struct rk817_battery_device *battery,
+			       int capacity)
+{
+	u8 buf;
+	static u32 old_cap;
+
+	if (capacity >= battery->qmax)
+		capacity = battery->qmax;
+	if (capacity <= 0)
+		capacity = 0;
+	if (old_cap == capacity)
+		return;
+
+	old_cap = capacity;
+	buf = (capacity >> 16) & 0xff;
+	rk817_bat_write(battery, REMAIN_CAP_REG2, buf);
+	buf = (capacity >> 8) & 0xff;
+	rk817_bat_write(battery, REMAIN_CAP_REG1, buf);
+	buf = (capacity >> 0) & 0xff;
+	rk817_bat_write(battery, REMAIN_CAP_REG0, buf);
+}
+
+static int rk817_bat_get_rsoc(struct rk817_battery_device *battery)
+{
+	int remain_cap;
+
+	remain_cap = rk817_bat_get_capacity_uah(battery);
+
+	return remain_cap * 100 / DIV(battery->fcc);
+}
+
+static int rk817_bat_vol_to_soc(struct rk817_battery_device *battery,
+				int voltage)
+{
+	u32 *ocv_table, temp;
+	int ocv_size, ocv_soc;
+
+	ocv_table = battery->ocv_table;
+	ocv_size = battery->ocv_size;
+	temp = interpolate(voltage, ocv_table, ocv_size);
+	ocv_soc = ab_div_c(temp, MAX_PERCENTAGE, MAX_INTERPOLATE);
+
+	return ocv_soc;
+}
+
+static int rk817_bat_vol_to_cap(struct rk817_battery_device *battery,
+				int voltage)
+{
+	u32 *ocv_table, temp;
+	int ocv_size, capacity;
+
+	ocv_table = battery->ocv_table;
+	ocv_size = battery->ocv_size;
+	temp = interpolate(voltage, ocv_table, ocv_size);
+	capacity = ab_div_c(temp, battery->fcc, MAX_INTERPOLATE);
+
+	return capacity;
+}
+
+static void rk817_bat_save_dsoc(struct rk817_battery_device *battery,
+				u8 save_soc)
+{
+	static int last_soc = -1;
+	int value;
+
+	value = rk817_bat_read(battery, SOC_REG);
+	value &= 0x80;
+	if (last_soc != save_soc) {
+		rk817_bat_write(battery, SOC_REG, value | save_soc);
+		last_soc = save_soc;
+	}
+}
+
+static int rk817_bat_get_prev_dsoc(struct rk817_battery_device *battery)
+{
+	return (rk817_bat_read(battery, SOC_REG) & 0x7f);
+}
+
+static int rk817_bat_get_prev_cap(struct rk817_battery_device *battery)
+{
+	int val = 0;
+
+	val = rk817_bat_read(battery, REMAIN_CAP_REG2) << 16;
+	val |= rk817_bat_read(battery, REMAIN_CAP_REG1) << 8;
+	val |= rk817_bat_read(battery, REMAIN_CAP_REG0) << 0;
+
+	return val;
+}
+
+static void rk817_bat_gas_gaugle_enable(struct rk817_battery_device *battery)
+{
+	int value;
+
+	value = rk817_bat_read(battery, ADC_CONFIG0);
+	rk817_bat_write(battery, ADC_CONFIG0, value | 0x80);
+}
+
+static bool is_rk817_bat_first_pwron(struct rk817_battery_device *battery)
+{
+	int value;
+
+	value = rk817_bat_read(battery, GG_STS);
+
+	if (value & BAT_CON) {
+		rk817_bat_write(battery, GG_STS, value & (~BAT_CON));
+		return true;
+	}
+
+	return false;
+}
+
+static int rk817_bat_get_off_count(struct rk817_battery_device *battery)
+{
+	return rk817_bat_read(battery, OFF_CNT);
+}
+
+static void rk817_bat_update_qmax(struct rk817_battery_device *battery,
+				  u32 capacity)
+{
+	u8 buf;
+	u32 cap_adc;
+
+	cap_adc = CAPACITY_TO_ADC(capacity, battery->res_div);
+	buf = (cap_adc >> 24) & 0xff;
+	rk817_bat_write(battery, Q_MAX_H3, buf);
+	buf = (cap_adc >> 16) & 0xff;
+	rk817_bat_write(battery, Q_MAX_H2, buf);
+	buf = (cap_adc >> 8) & 0xff;
+	rk817_bat_write(battery, Q_MAX_L1, buf);
+	buf = (cap_adc >> 0) & 0xff;
+	rk817_bat_write(battery, Q_MAX_L0, buf);
+
+	battery->qmax = capacity;
+}
+
+static void rk817_bat_save_fcc(struct rk817_battery_device *battery, int  fcc)
+{
+	u8 buf;
+
+	buf = (fcc >> 16) & 0xff;
+	rk817_bat_write(battery, NEW_FCC_REG2, buf);
+	buf = (fcc >> 8) & 0xff;
+	rk817_bat_write(battery, NEW_FCC_REG1, buf);
+	buf = (fcc >> 0) & 0xff;
+	rk817_bat_write(battery, NEW_FCC_REG0, buf);
+}
+
+static void rk817_bat_first_pwron(struct rk817_battery_device *battery)
+{
+	battery->rsoc =
+		rk817_bat_vol_to_soc(battery,
+				     battery->pwron_voltage) * 1000;/* uAH */
+	battery->dsoc = battery->rsoc;
+	battery->fcc = battery->design_cap;
+
+	battery->nac = rk817_bat_vol_to_cap(battery,
+					    battery->pwron_voltage);
+
+	rk817_bat_update_qmax(battery, battery->qmax);
+	rk817_bat_save_fcc(battery, battery->fcc);
+	DBG("%s, rsoc = %d, dsoc = %d, fcc = %d, nac = %d\n",
+	    __func__, battery->rsoc, battery->dsoc, battery->fcc, battery->nac);
+}
+
+static int rk817_bat_get_fcc(struct rk817_battery_device *battery)
+{
+	u32 fcc = 0;
+
+	fcc |= rk817_bat_read(battery, NEW_FCC_REG2) << 16;
+	fcc |= rk817_bat_read(battery, NEW_FCC_REG1) << 8;
+	fcc |= rk817_bat_read(battery, NEW_FCC_REG0) << 0;
+
+	if (fcc < MIN_FCC) {
+		DBG("invalid fcc(%d), use design cap", fcc);
+		fcc = battery->design_capacity;
+		rk817_bat_save_fcc(battery, fcc);
+	} else if (fcc > battery->design_qmax) {
+		DBG("invalid fcc(%d), use qmax", fcc);
+		fcc = battery->design_qmax;
+		rk817_bat_save_fcc(battery, fcc);
+	}
+
+	return fcc;
+}
+
+static void rk817_bat_inc_halt_cnt(struct rk817_battery_device *battery)
+{
+	u8 cnt;
+
+	cnt =  rk817_bat_read(battery, HALT_CNT_REG);
+	rk817_bat_write(battery, HALT_CNT_REG, ++cnt);
+}
+
+static bool is_rk817_bat_last_halt(struct rk817_battery_device *battery)
+{
+	int pre_cap = rk817_bat_get_prev_cap(battery);
+	int now_cap = rk817_bat_get_capacity_mah(battery);
+
+	/* over 10%: system halt last time */
+	if (abs(now_cap - pre_cap) > (battery->fcc / 10)) {
+		rk817_bat_inc_halt_cnt(battery);
+		return true;
+	} else {
+		return false;
+	}
+}
+
+static u8 rk817_bat_get_halt_cnt(struct rk817_battery_device *battery)
+{
+	return rk817_bat_read(battery, HALT_CNT_REG);
+}
+
+static int rk817_bat_is_initialized(struct rk817_battery_device *battery)
+{
+	u8 val = rk817_bat_read(battery, FG_INIT);
+
+	return (val & 0x80);
+}
+
+static void rk817_bat_set_initialized_flag(struct rk817_battery_device *battery)
+{
+	u8 val = rk817_bat_read(battery, FG_INIT);
+
+	rk817_bat_write(battery, FG_INIT, val | (0x80));
+}
+
+static void rk817_bat_not_first_pwron(struct rk817_battery_device *battery)
+{
+	int now_cap, pre_soc, pre_cap;
+
+	battery->fcc = rk817_bat_get_fcc(battery);
+	pre_soc = rk817_bat_get_prev_dsoc(battery);
+	pre_cap = rk817_bat_get_prev_cap(battery);
+	now_cap = rk817_bat_get_capacity_mah(battery);
+	battery->remain_cap = pre_cap * 1000;
+	battery->is_halt = is_rk817_bat_last_halt(battery);
+	battery->halt_cnt = rk817_bat_get_halt_cnt(battery);
+
+	pre_soc *= 1000;
+	if (battery->is_halt) {
+		DBG("system halt last time... cap: pre=%d, now=%d\n",
+		    pre_cap, now_cap);
+		if (now_cap < 0)
+			now_cap = 0;
+		rk817_bat_init_coulomb_cap(battery, now_cap);
+		pre_cap = now_cap;
+		pre_soc = battery->rsoc;
+		goto finish;
+	}
+finish:
+	battery->dsoc = pre_soc;
+	battery->nac = pre_cap;
+	if (battery->nac < 0)
+		battery->nac = 0;
+
+	DBG("dsoc=%d cap=%d v=%d pwron_v =%d min=%d psoc=%d pcap=%d\n",
+	    battery->dsoc, battery->nac, rk817_bat_get_battery_voltage(battery),
+	    rk817_bat_get_pwron_voltage(battery),
+	    battery->pwroff_min, rk817_bat_get_prev_dsoc(battery),
+	    rk817_bat_get_prev_cap(battery));
+}
+
+static void rk817_bat_rsoc_init(struct rk817_battery_device *battery)
+{
+	battery->is_first_power_on = is_rk817_bat_first_pwron(battery);
+	battery->pwroff_min = rk817_bat_get_off_count(battery);
+	battery->pwron_voltage = rk817_bat_get_pwron_voltage(battery);
+
+	DBG("battery = %d\n", rk817_bat_get_battery_voltage(battery));
+	DBG("%s: is_first_power_on = %d, pwroff_min = %d, pwron_voltage = %d\n",
+	    __func__, battery->is_first_power_on,
+	    battery->pwroff_min, battery->pwron_voltage);
+
+	if (battery->is_first_power_on)
+		rk817_bat_first_pwron(battery);
+	else
+		rk817_bat_not_first_pwron(battery);
+
+	 rk817_bat_save_dsoc(battery, battery->dsoc / 1000);
+	 rk817_bat_save_cap(battery, battery->nac);
+}
+
+static int rk817_bat_calc_linek(struct rk817_battery_device *battery)
+{
+	int linek, diff, delta;
+
+	battery->calc_dsoc = battery->dsoc;
+	battery->calc_rsoc = battery->rsoc;
+	battery->sm_old_cap = battery->remain_cap;
+
+	delta = abs(battery->dsoc - battery->rsoc);
+	diff = delta * 3;
+	battery->sm_meet_soc = (battery->dsoc >= battery->rsoc) ?
+			   (battery->dsoc + diff) : (battery->rsoc + diff);
+
+	if (battery->dsoc < battery->rsoc)
+		linek = 1000 * (delta + diff) / DIV(diff);
+	else if (battery->dsoc > battery->rsoc)
+		linek = 1000 * diff / DIV(delta + diff);
+	else
+		linek = 1000;
+
+	battery->sm_chrg_dsoc = battery->dsoc;
+
+	DBG("<%s>. meet=%d, diff=%d, link=%d, calc: dsoc=%d, rsoc=%d\n",
+	    __func__, battery->sm_meet_soc, diff, linek,
+	    battery->calc_dsoc, battery->calc_rsoc);
+
+	return linek;
+}
+
+static int rk817_bat_get_est_voltage(struct rk817_battery_device *battery)
+{
+	return rk817_bat_get_battery_voltage(battery);
+}
+
+static int rk817_bat_update_get_voltage(struct udevice *dev)
+{
+	struct rk817_battery_device *battery = dev_get_priv(dev);
+
+	if (!battery->virtual_power && battery->voltage_k)
+		return rk817_bat_get_est_voltage(battery);
+	else
+		return VIRTUAL_POWER_VOL;
+}
+
+static int rk817_bat_update_get_current(struct udevice *dev)
+{
+	struct rk817_battery_device *battery = dev_get_priv(dev);
+
+	if (!battery->virtual_power && battery->voltage_k)
+		return rk817_bat_get_avg_current(battery);
+	else
+		return VIRTUAL_POWER_CUR;
+}
+
+static int rk817_bat_dwc_otg_check_dpdm(void)
+{
+	return rockchip_chg_get_type();
+}
+
+static bool rk817_bat_update_get_chrg_online(struct udevice *dev)
+{
+	return rk817_bat_dwc_otg_check_dpdm();
+}
+
+static int rk817_bat_get_usb_state(struct rk817_battery_device *battery)
+{
+	int charger_type;
+
+	switch (rk817_bat_dwc_otg_check_dpdm()) {
+	case 0:
+		if ((rk817_bat_read(battery, PMIC_SYS_STS) & PLUG_IN_STS) != 0)
+			charger_type = DC_CHARGER;
+		else
+			charger_type = NO_CHARGER;
+		break;
+	case 1:
+	case 3:
+		charger_type = USB_CHARGER;
+		break;
+	case 2:
+		charger_type = AC_CHARGER;
+		break;
+	default:
+		charger_type = NO_CHARGER;
+	}
+
+	return charger_type;
+}
+
+static int rk817_bat_get_charger_type(struct rk817_battery_device *battery)
+{
+	/* check by ic hardware: this check make check work safer */
+	if ((rk817_bat_read(battery, PMIC_SYS_STS) & PLUG_IN_STS) == 0)
+		return NO_CHARGER;
+
+	/* virtual or bat not exist */
+	if (battery->virtual_power)
+		return DC_CHARGER;
+
+	/* check USB secondly */
+	return rk817_bat_get_usb_state(battery);
+}
+
+static void rk817_bat_set_input_current(struct rk817_battery_device *battery,
+					int input_current)
+{
+	u8 usb_ctrl;
+
+	usb_ctrl = rk817_bat_read(battery, USB_CTRL_REG);
+	usb_ctrl &= ~INPUT_CUR_MSK;
+	usb_ctrl |= ((input_current) | 0x08);
+	rk817_bat_write(battery, USB_CTRL_REG, usb_ctrl);
+}
+
+static void rk817_bat_set_input_voltage(struct rk817_battery_device *battery,
+					int input_voltage)
+{
+	u8 usb_ctrl;
+
+	usb_ctrl = rk817_bat_read(battery, USB_CTRL_REG);
+	usb_ctrl &= ~INPUT_VOL_MSK;
+	usb_ctrl |= ((input_voltage) | 0x80);
+	rk817_bat_write(battery, USB_CTRL_REG, usb_ctrl);
+}
+
+static void rk817_bat_charger_setting(struct rk817_battery_device *battery,
+				      int charger)
+{
+	static u8 old_charger = UNDEF_CHARGER;
+
+	rk817_bat_set_input_voltage(battery, VLIM_4500MV);
+	/* charger changed */
+	if (old_charger != charger) {
+		if (charger == NO_CHARGER) {
+			DBG("NO_CHARGER\n");
+			rk817_bat_set_input_current(battery, ILIM_450MA);
+		} else if (charger == USB_CHARGER) {
+			DBG("USB_CHARGER\n");
+			rk817_bat_set_input_current(battery, ILIM_450MA);
+		} else if (charger == DC_CHARGER || charger == AC_CHARGER) {
+			DBG("DC OR AC CHARGE\n");
+			rk817_bat_set_input_current(battery, ILIM_1500MA);
+		} else {
+			DBG("charger setting error %d\n", charger);
+		}
+
+		old_charger = charger;
+	}
+}
+
+static void rk817_bat_linek_algorithm(struct rk817_battery_device *battery)
+{
+	int delta_cap, ydsoc, tmp;
+	u8 chg_st = rk817_bat_get_charger_type(battery);
+
+	/* slow down */
+	if (battery->dsoc / 1000 == 99)
+		battery->sm_linek = CHRG_FULL_K;
+	else if (battery->dsoc / 1000 >= CHRG_TERM_DSOC &&
+		 battery->current_avg > TERM_CALI_CURR)
+		battery->sm_linek = CHRG_TERM_K;
+
+	delta_cap = battery->remain_cap - battery->sm_old_cap;
+	ydsoc = battery->sm_linek * (delta_cap  / DIV(battery->fcc)) / 10;
+	battery->sm_chrg_dsoc += ydsoc;
+
+	tmp = battery->sm_chrg_dsoc / 1000;
+
+	if (ydsoc > 0) {
+		if (battery->sm_chrg_dsoc < 0)
+			battery->sm_chrg_dsoc = 0;
+
+		tmp = battery->sm_chrg_dsoc / 1000;
+
+		if (tmp != battery->dsoc / 1000) {
+			if (battery->sm_chrg_dsoc < battery->dsoc)
+				return;
+
+			battery->dsoc = battery->sm_chrg_dsoc;
+			if (battery->dsoc <= 0)
+				battery->dsoc = 0;
+		}
+
+		battery->sm_old_cap = battery->remain_cap;
+		if (battery->dsoc / 1000 == battery->rsoc / 1000 &&
+		    battery->sm_linek != CHRG_FULL_K &&
+		    battery->sm_linek != CHRG_TERM_K)
+			battery->sm_linek = 1000;
+	}
+
+	if ((battery->sm_linek == 1000 || battery->dsoc >= 100 * 1000) &&
+	    (chg_st != CHARGE_FINISH)) {
+		if (battery->sm_linek == 1000)
+			battery->dsoc = battery->rsoc;
+		battery->sm_chrg_dsoc = battery->dsoc;
+	}
+}
+
+static void rk817_bat_finish_chrg(struct rk817_battery_device *battery)
+{
+	u32 tgt_sec = 0;
+
+	if (battery->dsoc / 1000 < 100) {
+		tgt_sec = battery->fcc * 3600 / 100 / FINISH_CALI_CURR;
+		if (get_timer(battery->finish_chrg_base) > SECONDS(tgt_sec)) {
+			battery->finish_chrg_base = get_timer(0);
+			battery->dsoc += 1000;
+		}
+	}
+}
+
+static void rk817_bat_debug_info(struct rk817_battery_device *battery)
+{
+	DBG("debug info:\n");
+	DBG("CAL_OFFSET = 0x%x", rk817_bat_read(battery, CAL_OFFSET_H));
+	DBG("%x\n", rk817_bat_read(battery, CAL_OFFSET_L));
+	DBG("current_avg = %d\n", rk817_bat_get_avg_current(battery));
+	DBG("k = %d, b = %d\n", battery->voltage_k, battery->voltage_b);
+	DBG("battery: %d\n", rk817_bat_get_battery_voltage(battery));
+	DBG("voltage_sys = %d\n", rk817_bat_get_sys_voltage(battery));
+	DBG("current_avg = %d\n", rk817_bat_get_avg_current(battery));
+	DBG("dsoc = %d\n", battery->dsoc);
+	DBG("rsoc = %d\n", rk817_bat_get_rsoc(battery));
+	DBG("remain_cap = %d\n", rk817_bat_get_capacity_uah(battery));
+	DBG("fcc = %d\n", battery->fcc);
+	DBG("qmax = %d\n", battery->qmax);
+}
+
+static void rk817_bat_smooth_charge(struct rk817_battery_device *battery)
+{
+	u8 chg_st = rk817_bat_get_charger_type(battery);
+
+	rk817_bat_debug_info(battery);
+	rk817_bat_calibration(battery);
+	/* set terminal charge mode */
+	if (battery->term_sig_base &&
+	    get_timer(battery->term_sig_base) > SECONDS(1))
+		battery->term_sig_base = 0;
+
+	/* not charge mode and not keep in uboot charge: exit */
+	if ((battery->chrg_type == NO_CHARGER) ||
+	    !rk817_bat_is_initialized(battery)) {
+		DBG("chrg=%d\n", battery->chrg_type);
+		rk817_bat_set_initialized_flag(battery);
+		goto out;
+	}
+
+	/* update rsoc and remain cap */
+	battery->remain_cap = rk817_bat_get_capacity_uah(battery);
+	battery->rsoc = rk817_bat_get_rsoc(battery);
+	if (battery->remain_cap / 1000 > battery->fcc) {
+		battery->sm_old_cap -=
+			(battery->remain_cap - battery->fcc * 1000);
+		rk817_bat_init_coulomb_cap(battery, battery->fcc + 100);
+		rk817_bat_init_coulomb_cap(battery, battery->fcc);
+	}
+
+	/* finish charge step */
+	if (chg_st == CHARGE_FINISH) {
+		rk817_bat_finish_chrg(battery);
+		rk817_bat_init_coulomb_cap(battery, battery->fcc + 100);
+		rk817_bat_init_coulomb_cap(battery, battery->fcc);
+	} else {
+		DBG("smooth charge step...\n");
+		battery->adc_allow_update = true;
+		battery->finish_chrg_base = get_timer(0);
+		rk817_bat_linek_algorithm(battery);
+	}
+
+	/* dsoc limit */
+	if (battery->dsoc / 1000 > 100)
+		battery->dsoc = 100 * 1000;
+	else if (battery->dsoc < 0)
+		battery->dsoc = 0;
+
+	rk817_bat_save_dsoc(battery, battery->dsoc / 1000);
+	rk817_bat_save_cap(battery, battery->remain_cap / 1000);
+out:
+	return;
+}
+
+static int rk817_bat_update_get_soc(struct udevice *dev)
+{
+	struct rk817_battery_device *battery = dev_get_priv(dev);
+	static ulong seconds;
+
+	/* set charge current */
+	battery->chrg_type =
+		rk817_bat_get_charger_type(battery);
+	rk817_bat_charger_setting(battery, battery->chrg_type);
+
+	/* fg calc every 5 seconds */
+	if (!seconds)
+		seconds = get_timer(0);
+	if (get_timer(seconds) >= SECONDS(5)) {
+		seconds = get_timer(0);
+		rk817_bat_smooth_charge(battery);
+	}
+
+	/* bat exist, fg init success(dts pass) and uboot charge: report data */
+	if (!battery->virtual_power && battery->voltage_k)
+		return battery->dsoc / 1000;
+	else
+		return VIRTUAL_POWER_SOC;
+}
+
+static struct dm_fuel_gauge_ops fg_ops = {
+	.get_soc = rk817_bat_update_get_soc,
+	.get_voltage = rk817_bat_update_get_voltage,
+	.get_current = rk817_bat_update_get_current,
+	.get_chrg_online = rk817_bat_update_get_chrg_online,
+};
+
+static int rk817_fg_ofdata_to_platdata(struct udevice *dev)
+{
+	struct rk8xx_priv *rk8xx = dev_get_priv(dev->parent);
+	struct rk817_battery_device *battery = dev_get_priv(dev);
+	const char *prop;
+	int  len, value;
+	int i;
+
+	if (rk8xx->variant != 0x8170) {
+		debug("%s: Not support pmic variant: rk%x\n",
+		      __func__, rk8xx->variant);
+		return -EINVAL;
+	}
+
+	battery->dev = dev;
+
+	/* Parse ocv table */
+	prop = dev_read_prop(dev, "ocv_table", &len);
+	if (!prop) {
+		printf("can't find ocv_table prop\n");
+		return -EINVAL;
+	}
+
+	battery->ocv_table = calloc(len, 1);
+	if (!battery->ocv_table) {
+		printf("can't calloc ocv_table\n");
+		return -ENOMEM;
+	}
+
+	battery->ocv_size = len / 4;
+	if (dev_read_u32_array(dev, "ocv_table",
+			       battery->ocv_table, battery->ocv_size)) {
+		printf("can't read ocv_table\n");
+		free(battery->ocv_table);
+		return -EINVAL;
+	}
+
+	/* Parse neccessay */
+	battery->design_cap = dev_read_u32_default(dev, "design_capacity", -1);
+	if (battery->design_cap < 0) {
+		printf("can't read design_capacity\n");
+		return -EINVAL;
+	}
+
+	battery->qmax = dev_read_u32_default(dev, "design_qmax", -1);
+	if (battery->qmax < 0) {
+		printf("can't read design_qmax\n");
+		return -EINVAL;
+	}
+
+	value = dev_read_u32_default(dev, "sample_res", -1);
+	if (battery->res_div < 0)
+		printf("read sample_res error\n");
+
+	battery->res_div = (value == SAMPLE_RES_20mR) ?
+		       SAMPLE_RES_DIV2 : SAMPLE_RES_DIV1;
+
+	DBG("OCV Value:");
+	for (i = 0; i < battery->ocv_size; i++)
+		DBG("%d  ", battery->ocv_table[i]);
+	DBG("ocvsize: %d\n", battery->ocv_size);
+	DBG("battery->design_cap: %d\n", battery->design_cap);
+	DBG("battery->qmax: %d\n", battery->qmax);
+
+	return 0;
+}
+
+static int rk817_fg_init(struct rk817_battery_device *battery)
+{
+	int value;
+
+	value = rk817_bat_read(battery, GG_CON);
+	rk817_bat_write(battery, GG_CON, value | VOL_OUPUT_INSTANT_MODE);
+
+	rk817_bat_gas_gaugle_enable(battery);
+	rk817_bat_init_voltage_kb(battery);
+	rk817_bat_calibration(battery);
+	rk817_bat_rsoc_init(battery);
+	rk817_bat_init_coulomb_cap(battery, battery->nac);
+	rk817_bat_set_initialized_flag(battery);
+	battery->remain_cap = rk817_bat_get_capacity_uah(battery);
+	rk817_bat_calc_linek(battery);
+
+	battery->voltage_avg = rk817_bat_get_battery_voltage(battery);
+	battery->voltage_sys = rk817_bat_get_sys_voltage(battery);
+	battery->voltage_usb = rk817_bat_get_USB_voltage(battery);
+	battery->current_avg = rk817_bat_get_avg_current(battery);
+	battery->current_pwron = rk817_bat_get_pwron_current(battery);
+	battery->remain_cap = rk817_bat_get_capacity_uah(battery);
+	battery->rsoc = rk817_bat_get_rsoc(battery);
+	battery->sm_linek = rk817_bat_calc_linek(battery);
+	battery->finish_chrg_base = get_timer(0);
+	battery->term_sig_base = get_timer(0);
+
+	battery->dbg_pwr_dsoc = battery->dsoc;
+	battery->dbg_pwr_rsoc = battery->rsoc;
+	battery->dbg_pwr_vol = battery->voltage_avg;
+
+	DBG("chrg onle: %d\n", rk817_bat_dwc_otg_check_dpdm());
+	DBG("chrg onle: %d\n", rk817_bat_dwc_otg_check_dpdm());
+	DBG("chrg onle: %d\n", rk817_bat_dwc_otg_check_dpdm());
+
+	DBG("voltage_k = %d, voltage_b = %d\n",
+	    battery->voltage_k, battery->voltage_b);
+	DBG("voltage_sys = %d\n", battery->voltage_sys);
+	DBG("voltage usb: %d\n", battery->voltage_avg);
+	DBG("battery: %d\n", battery->voltage_avg);
+	DBG("current_avg = %d\n", battery->current_avg);
+	DBG("current_pwron = %d\n", battery->current_pwron);
+	DBG("remain_cap = %d\n", battery->remain_cap);
+	DBG("fcc = %d\n", battery->fcc);
+	DBG("qmax = %d\n", battery->qmax);
+	DBG("dsoc = %d\n", battery->dsoc);
+	DBG("rsoc = %d\n", battery->rsoc);
+
+	return 0;
+}
+
+static int rk817_fg_probe(struct udevice *dev)
+{
+	struct rk8xx_priv *priv = dev_get_priv(dev->parent);
+	struct rk817_battery_device *battery = dev_get_priv(dev);
+
+	if (priv->variant != 0x8170) {
+		debug("Not support pmic variant: rk%x\n", priv->variant);
+		return -EINVAL;
+	}
+
+	return rk817_fg_init(battery);
+}
+
+U_BOOT_DRIVER(rk817_fg) = {
+	.name = "rk817_fg",
+	.id = UCLASS_FG,
+	.probe = rk817_fg_probe,
+	.ops = &fg_ops,
+	.ofdata_to_platdata = rk817_fg_ofdata_to_platdata,
+	.priv_auto_alloc_size = sizeof(struct rk817_battery_device),
+};

commit 28722b7d183dce04f1b906c03ef636ac725a66fc
Author: Huibin Hong <huibin.hong@rock-chips.com>
Date:   Tue Feb 27 11:51:11 2018 +0800

    rockchip: dts: rk3328: enable uart rx pull up
    
    Change-Id: I85653ed9d52865250703ff559e3da67f0cec68ee
    Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>

diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi
index 5b5a837536..5f7542bd9a 100644
--- a/arch/arm/dts/rk3328.dtsi
+++ b/arch/arm/dts/rk3328.dtsi
@@ -766,7 +766,7 @@
 			uart0_xfer: uart0-xfer {
 				rockchip,pins =
 					<1 9 RK_FUNC_1 &pcfg_pull_up>,
-					<1 8 RK_FUNC_1 &pcfg_pull_none>;
+					<1 8 RK_FUNC_1 &pcfg_pull_up>;
 			};
 
 			uart0_cts: uart0-cts {
@@ -789,7 +789,7 @@
 			uart1_xfer: uart1-xfer {
 				rockchip,pins =
 					<3 4 RK_FUNC_4 &pcfg_pull_up>,
-					<3 6 RK_FUNC_4 &pcfg_pull_none>;
+					<3 6 RK_FUNC_4 &pcfg_pull_up>;
 			};
 
 			uart1_cts: uart1-cts {
@@ -812,7 +812,7 @@
 			uart2m0_xfer: uart2m0-xfer {
 				rockchip,pins =
 					<1 0 RK_FUNC_2 &pcfg_pull_up>,
-					<1 1 RK_FUNC_2 &pcfg_pull_none>;
+					<1 1 RK_FUNC_2 &pcfg_pull_up>;
 			};
 		};
 
@@ -820,7 +820,7 @@
 			uart2m1_xfer: uart2m1-xfer {
 				rockchip,pins =
 					<2 0 RK_FUNC_1 &pcfg_pull_up>,
-					<2 1 RK_FUNC_1 &pcfg_pull_none>;
+					<2 1 RK_FUNC_1 &pcfg_pull_up>;
 			};
 		};
 

commit 2e3f27707f96f88d4498d80756b79a3d2d831fed
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Mar 5 08:58:28 2018 +0800

    board_f: print relocation offset
    
    actually that relocation takes some troubls for our debug,
    print relocation offset can help a lot.
    
    Change-Id: Ib15d6111930fda8e8cdfab505d977aaf1da934b2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/board_f.c b/common/board_f.c
index e46eceda7d..f76f7da756 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -628,7 +628,7 @@ static int setup_reloc(void)
 #endif
 	memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
 
-	debug("Relocation Offset is: %08lx\n", gd->reloc_off);
+	printf("Relocation Offset is: %08lx\n", gd->reloc_off);
 	debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
 	      gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
 	      gd->start_addr_sp);

commit ba8f56d9f15abd8e64f88944dd926ee84ce6fba8
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Sun Feb 25 11:27:00 2018 +0800

    lib: optee_client: remove printf log
    
    Change-Id: Ie0b41b309544e36c7c39863339bf5888e0683dcb
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/OpteeClientRPC.c b/lib/optee_clientApi/OpteeClientRPC.c
index f32633a7ba..3072381391 100644
--- a/lib/optee_clientApi/OpteeClientRPC.c
+++ b/lib/optee_clientApi/OpteeClientRPC.c
@@ -136,15 +136,15 @@ TEEC_Result OpteeRpcCmdLoadV2Ta(t_teesmc32_arg *TeeSmc32Arg)
 
 	memcpy(uuid, (void *)&TeeSmc32Param[0].u.value, 16);
 	for (i = 0; i < 16; i++)
-		printf("uuid 0x%x", uuid[i]);
+		debug("uuid 0x%x", uuid[i]);
 
 	if (TeeSmc32Param[1].u.memref.buf_ptr == 0) {
-		printf("return size of TA, keymaster_size = 0x%x", keymaster_size);
+		debug("return size of TA, keymaster_size = 0x%x", keymaster_size);
 		TeeSmc32Param[1].u.memref.size = keymaster_size;
 	} else {
 		memcpy((void *)TeeSmc32Param[1].u.memref.buf_ptr,
 			(void *)keymaster_data, TeeSmc32Param[1].u.memref.size);
-		printf("memref.buf_ptr = 0x%llx; memref.size = 0x%llx",
+		debug("memref.buf_ptr = 0x%llx; memref.size = 0x%llx",
 			TeeSmc32Param[1].u.memref.buf_ptr,
 			TeeSmc32Param[1].u.memref.size);
 	}
@@ -520,7 +520,7 @@ TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs)
 		TeecResult = OpteeRpcAlloc(ArmSmcArgs->Arg1, &ArmSmcArgs->Arg1);
 #endif
 #ifdef CONFIG_OPTEE_V2
-		printf("ArmSmcArgs->Arg1 = 0x%x", ArmSmcArgs->Arg1);
+		debug("ArmSmcArgs->Arg1 = 0x%x", ArmSmcArgs->Arg1);
 		TeecResult = OpteeRpcAlloc(ArmSmcArgs->Arg1, &ArmSmcArgs->Arg2);
 		ArmSmcArgs->Arg5 = ArmSmcArgs->Arg2;
 		ArmSmcArgs->Arg1 = 0;
@@ -561,7 +561,7 @@ TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs)
 #ifdef CONFIG_OPTEE_V2
 		t_teesmc32_arg *TeeSmc32Arg =
 			(t_teesmc32_arg *)((size_t)ArmSmcArgs->Arg1 << 32 | ArmSmcArgs->Arg2);
-		printf("TeeSmc32Arg->cmd = 0x%x", TeeSmc32Arg->cmd);
+		debug("TeeSmc32Arg->cmd = 0x%x", TeeSmc32Arg->cmd);
 #endif
 		switch (TeeSmc32Arg->cmd) {
 #ifdef CONFIG_OPTEE_V1
@@ -601,7 +601,7 @@ TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs)
 			uint32_t tempaddr;
 			uint32_t allocsize = TeeSmc32Arg->params[0].u.value.b;
 			TeecResult = OpteeRpcAlloc(allocsize, &tempaddr);
-			printf("allocsize = 0x%x tempaddr = 0x%x", allocsize, tempaddr);
+			debug("allocsize = 0x%x tempaddr = 0x%x", allocsize, tempaddr);
 			TeeSmc32Arg->params[0].attr = OPTEE_MSG_ATTR_TYPE_TMEM_OUTPUT_V2;
 			TeeSmc32Arg->params[0].u.memref.buf_ptr = tempaddr;
 			TeeSmc32Arg->params[0].u.memref.size = allocsize;
diff --git a/lib/optee_clientApi/OpteeClientRkFs.c b/lib/optee_clientApi/OpteeClientRkFs.c
index 0e619e2cf0..2985cb7e8d 100644
--- a/lib/optee_clientApi/OpteeClientRkFs.c
+++ b/lib/optee_clientApi/OpteeClientRkFs.c
@@ -169,12 +169,12 @@ static int rkss_read_section(struct rk_secure_storage *rkss)
 
 	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {
-		printf("%s: Could not find device\n", __func__);
+		debug("%s: Could not find device\n", __func__);
 		return -1;
 	}
 
 	if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
-		printf("Could not find security partition\n");
+		debug("Could not find security partition\n");
 		return -1;
 	}
 	ret = blk_dread(dev_desc, part_info.start + rkss->index, 1, rkss->data);
@@ -1199,7 +1199,7 @@ int tee_supp_rk_fs_init(void)
 		int ret = rkss_read_section(&rkss);
 		if (ret < 0)
 		{
-			printf("rkss_read_section fail ! ret: %d.", ret);
+			debug("rkss_read_section fail ! ret: %d.", ret);
 			return -1;
 		}
 		if (rkss_verify_ptable(&rkss) < 0)

commit e559407d6e801933e38737edce2f0e637aa647a5
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Thu Mar 1 11:54:36 2018 +0800

    drm/rockchip: add version control for uboot drm driver
    
    Add basic version for rockchip UBOOT DRM driver
    
    Change-Id: Ia1b3862bce75f68e1bf9919cad285ba141492b01
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 70fd3fd25a..39c0e0745c 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -31,6 +31,15 @@
 #include <dm/of_access.h>
 #include <dm/ofnode.h>
 
+#define DRIVER_VERSION	"v1.0.0"
+
+/***********************************************************************
+ *  Rockchip UBOOT DRM driver version
+ *
+ *  v1.0.0	: add basic version for rockchip drm driver(hjc)
+ *
+ **********************************************************************/
+
 #define RK_BLK_SIZE 512
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -456,6 +465,8 @@ static int display_init(struct display_state *state)
 	struct drm_display_mode *mode = &conn_state->mode;
 	int ret = 0;
 
+	printf("Rockchip UBOOT DRM driver version: %s\n", DRIVER_VERSION);
+
 	if (state->is_init)
 		return 0;
 

commit 06bb018f670dd76518bd8f397195597898667a92
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Thu Mar 1 10:58:33 2018 +0800

    drm/rockchip: rk3288 vop: identify vop lit and vop big
    
    most of rk3288 vop lit is same with vop big, but some feature is
    different, just like max output resolution.
    
    vop big max output: 3840*2160
    vop lit max ougput: 2560*1600
    
    Change-Id: Ic154d68c1ef53fd54fc61959078f43f789f28215
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_crtc.c b/drivers/video/drm/rockchip_crtc.c
index 350c0fa24b..28c2eb4a78 100644
--- a/drivers/video/drm/rockchip_crtc.c
+++ b/drivers/video/drm/rockchip_crtc.c
@@ -32,9 +32,14 @@ static const struct rockchip_crtc px30_vop_big_data = {
 	.data = &px30_vop_big,
 };
 
-static const struct rockchip_crtc rk3288_vop_data = {
+static const struct rockchip_crtc rk3288_vop_big_data = {
 	.funcs = &rockchip_vop_funcs,
-	.data = &rk3288_vop,
+	.data = &rk3288_vop_big,
+};
+
+static const struct rockchip_crtc rk3288_vop_lit_data = {
+	.funcs = &rockchip_vop_funcs,
+	.data = &rk3288_vop_lit,
 };
 
 static const struct rockchip_crtc rk3368_vop_data = {
@@ -81,8 +86,11 @@ static const struct udevice_id rockchip_vop_ids[] = {
 		.compatible = "rockchip,px30-vop-big",
 		.data = (ulong)&px30_vop_big_data,
 	}, {
-		.compatible = "rockchip,rk3288-vop",
-		.data = (ulong)&rk3288_vop_data,
+		.compatible = "rockchip,rk3288-vop-big",
+		.data = (ulong)&rk3288_vop_big_data,
+	}, {
+		.compatible = "rockchip,rk3288-vop-lit",
+		.data = (ulong)&rk3288_vop_lit_data,
 	}, {
 		.compatible = "rockchip,rk3368-vop",
 		.data = (ulong)&rk3368_vop_data,
diff --git a/drivers/video/drm/rockchip_crtc.h b/drivers/video/drm/rockchip_crtc.h
index 7d23f7d1c4..613eaea0f8 100644
--- a/drivers/video/drm/rockchip_crtc.h
+++ b/drivers/video/drm/rockchip_crtc.h
@@ -28,7 +28,8 @@ extern const struct rockchip_crtc_funcs rockchip_vop_funcs;
 extern const struct vop_data rk3036_vop;
 extern const struct vop_data px30_vop_lit;
 extern const struct vop_data px30_vop_big;
-extern const struct vop_data rk3288_vop;
+extern const struct vop_data rk3288_vop_big;
+extern const struct vop_data rk3288_vop_lit;
 extern const struct vop_data rk3368_vop;
 extern const struct vop_data rk3366_vop;
 extern const struct vop_data rk3399_vop_big;
diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index b4f6b02ca2..436cc3e35f 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -161,7 +161,7 @@ static const struct vop_line_flag rk3288_vop_line_flag = {
 	.line_flag_num[0] = VOP_REG(RK3288_INTR_CTRL0, 0x1fff, 12),
 };
 
-const struct vop_data rk3288_vop = {
+const struct vop_data rk3288_vop_big = {
 	.version = VOP_VERSION(3, 1),
 	.max_output = {3840, 2160},
 	.feature = VOP_FEATURE_OUTPUT_10BIT,
@@ -171,6 +171,16 @@ const struct vop_data rk3288_vop = {
 	.reg_len = RK3288_DSP_VACT_ST_END_F1 * 4,
 };
 
+const struct vop_data rk3288_vop_lit = {
+	.version = VOP_VERSION(3, 1),
+	.max_output = {2560, 1600},
+	.feature = VOP_FEATURE_OUTPUT_10BIT,
+	.ctrl = &rk3288_ctrl_data,
+	.win = &rk3288_win01_data,
+	.line_flag = &rk3288_vop_line_flag,
+	.reg_len = RK3288_DSP_VACT_ST_END_F1 * 4,
+};
+
 static const struct vop_line_flag rk3368_vop_line_flag = {
 	.line_flag_num[0] = VOP_REG(RK3368_LINE_FLAG, 0xffff, 0),
 	.line_flag_num[1] = VOP_REG(RK3368_LINE_FLAG, 0xffff, 16),

commit 2735489a3ec3356631a8d26fd6c269e9f65df8c7
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Sat Feb 24 08:57:40 2018 +0800

    drm/rockchip: rk3328 vop: add support 4096 output
    
    add max_output to identify vop max output resolution.
    
    Change-Id: I3d6f0f63a09d6b6f728aeb52cd821bf82bfcf4f8
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index f84d55317d..f8c0bd79b9 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -214,6 +214,7 @@ static int rockchip_vop_init(struct display_state *state)
 	vop->ctrl = vop_data->ctrl;
 	vop->line_flag = vop_data->line_flag;
 	vop->version = vop_data->version;
+	vop->max_output = vop_data->max_output;
 
 	/*
 	 * TODO:
@@ -461,8 +462,9 @@ static void scl_vop_cal_scl_fac(struct vop *vop,
 	if (!vop->win->scl)
 		return;
 
-	if (dst_w > 3840) {
-		printf("Maximum destination width (3840) exceeded\n");
+	if (dst_w > vop->max_output.width) {
+		printf("Maximum destination width %d exceeded\n",
+		       vop->max_output.width);
 		return;
 	}
 
diff --git a/drivers/video/drm/rockchip_vop.h b/drivers/video/drm/rockchip_vop.h
index 10b433a163..0ab9d52e8c 100644
--- a/drivers/video/drm/rockchip_vop.h
+++ b/drivers/video/drm/rockchip_vop.h
@@ -16,11 +16,10 @@
 #define VOP_MINOR(version) 	((version) & 0xff)
 
 #define VOP_REG_SUPPORT(vop, reg) \
-		(reg.mask && \
-		 (!reg.major || \
-		  (reg.major == VOP_MAJOR(vop->version) && \
-		   reg.begin_minor <= VOP_MINOR(vop->version) && \
-		   reg.end_minor >= VOP_MINOR(vop->version))))
+		(!reg.major || (reg.major == VOP_MAJOR(vop->version) && \
+		reg.begin_minor <= VOP_MINOR(vop->version) && \
+		reg.end_minor >= VOP_MINOR(vop->version) && \
+		reg.mask))
 
 #define VOP_WIN_SUPPORT(vop, win, name) \
 		VOP_REG_SUPPORT(vop, win->name)
@@ -413,6 +412,11 @@ struct vop_line_flag {
 	struct vop_reg line_flag_num[2];
 };
 
+struct vop_rect {
+	int width;
+	int height;
+};
+
 #define VOP_FEATURE_OUTPUT_10BIT	BIT(0)
 
 struct vop_data {
@@ -423,6 +427,7 @@ struct vop_data {
 	int win_offset;
 	int reg_len;
 	u64 feature;
+	struct vop_rect max_output;
 };
 
 struct vop {
@@ -434,6 +439,7 @@ struct vop {
 	const struct vop_win *win;
 	const struct vop_line_flag *line_flag;
 	int win_offset;
+	struct vop_rect max_output;
 };
 
 static inline void vop_writel(struct vop *vop, uint32_t offset, uint32_t v)
diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index 57a94f0d9f..b4f6b02ca2 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -163,6 +163,7 @@ static const struct vop_line_flag rk3288_vop_line_flag = {
 
 const struct vop_data rk3288_vop = {
 	.version = VOP_VERSION(3, 1),
+	.max_output = {3840, 2160},
 	.feature = VOP_FEATURE_OUTPUT_10BIT,
 	.ctrl = &rk3288_ctrl_data,
 	.win = &rk3288_win01_data,
@@ -177,6 +178,7 @@ static const struct vop_line_flag rk3368_vop_line_flag = {
 
 const struct vop_data rk3368_vop = {
 	.version = VOP_VERSION(3, 2),
+	.max_output = {4096, 2160},
 	.ctrl = &rk3288_ctrl_data,
 	.win = &rk3288_win01_data,
 	.line_flag = &rk3368_vop_line_flag,
@@ -190,6 +192,7 @@ static const struct vop_line_flag rk3366_vop_line_flag = {
 
 const struct vop_data rk3366_vop = {
 	.version = VOP_VERSION(3, 4),
+	.max_output = {4096, 2160},
 	.ctrl = &rk3288_ctrl_data,
 	.win = &rk3288_win01_data,
 	.line_flag = &rk3366_vop_line_flag,
@@ -198,6 +201,7 @@ const struct vop_data rk3366_vop = {
 
 const struct vop_data rk3399_vop_big = {
 	.version = VOP_VERSION(3, 5),
+	.max_output = {4096, 2160},
 	.feature = VOP_FEATURE_OUTPUT_10BIT,
 	.ctrl = &rk3288_ctrl_data,
 	.win = &rk3288_win01_data,
@@ -207,6 +211,7 @@ const struct vop_data rk3399_vop_big = {
 
 const struct vop_data rk3399_vop_lit = {
 	.version = VOP_VERSION(3, 6),
+	.max_output = {2560, 1600},
 	.ctrl = &rk3288_ctrl_data,
 	.win = &rk3288_win01_data,
 	.line_flag = &rk3366_vop_line_flag,
@@ -215,6 +220,7 @@ const struct vop_data rk3399_vop_lit = {
 
 const struct vop_data rk322x_vop = {
 	.version = VOP_VERSION(3, 7),
+	.max_output = {4096, 2160},
 	.feature = VOP_FEATURE_OUTPUT_10BIT,
 	.ctrl = &rk3288_ctrl_data,
 	.win = &rk3288_win01_data,
@@ -304,6 +310,7 @@ static const struct vop_line_flag rk3328_vop_line_flag = {
 
 const struct vop_data rk3328_vop = {
 	.version = VOP_VERSION(3, 8),
+	.max_output = {4096, 2160},
 	.feature = VOP_FEATURE_OUTPUT_10BIT,
 	.ctrl = &rk3328_ctrl_data,
 	.win = &rk3288_win01_data,
@@ -354,6 +361,7 @@ static const struct vop_line_flag rk3036_vop_line_flag = {
 
 const struct vop_data rk3036_vop = {
 	.version = VOP_VERSION(2, 2),
+	.max_output = {1920, 1080},
 	.ctrl = &rk3036_ctrl_data,
 	.win = &rk3036_win0_data,
 	.line_flag = &rk3036_vop_line_flag,
@@ -469,6 +477,7 @@ static const struct vop_line_flag rk3366_vop_lite_line_flag = {
 
 const struct vop_data px30_vop_lit = {
 	.version = VOP_VERSION(2, 5),
+	.max_output = {1920, 1080},
 	.ctrl = &px30_ctrl_data,
 	.win = &rk3366_win1_data,
 	.line_flag = &rk3366_vop_lite_line_flag,
@@ -477,6 +486,7 @@ const struct vop_data px30_vop_lit = {
 
 const struct vop_data px30_vop_big = {
 	.version = VOP_VERSION(2, 6),
+	.max_output = {1920, 1080},
 	.ctrl = &px30_ctrl_data,
 	.win = &rk3366_win0_data,
 	.line_flag = &rk3366_vop_lite_line_flag,

commit 419dcb5b07e357d38613a7afb94abbece7254b8b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Mar 1 18:09:15 2018 +0800

    rockchip: move display dtb fixup to bootm
    
    Change-Id: I25102790fa6330c7b3ce3f9904e250944083c5ca
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/lib/bootm-fdt.c b/arch/arm/lib/bootm-fdt.c
index a70c0087a0..c0be8040d6 100644
--- a/arch/arm/lib/bootm-fdt.c
+++ b/arch/arm/lib/bootm-fdt.c
@@ -22,6 +22,9 @@
 #endif
 #include <asm/psci.h>
 #include <asm/spin_table.h>
+#ifdef CONFIG_DRM_ROCKCHIP
+#include <video_rockchip.h>
+#endif
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -75,7 +78,9 @@ int arch_fixup_fdt(void *blob)
 		return ret;
 #endif
 #endif
-
+#ifdef CONFIG_DRM_ROCKCHIP
+	rockchip_display_fixup((void *)gd->fdt_blob);
+#endif
 #ifdef CONFIG_FMAN_ENET
 	ret = fdt_update_ethernet_dt(blob);
 	if (ret)
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 6513069509..b1521e88b5 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -96,7 +96,6 @@ int board_late_init(void)
 
 #ifdef CONFIG_DRM_ROCKCHIP
 	rockchip_show_logo();
-	rockchip_display_fixup((void *)gd->fdt_blob);
 #endif
 
 	return rk_board_late_init();

commit 8fc5ae065cee12498594832519486c153d0e77f1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Feb 28 14:24:53 2018 +0800

    power: charge_animation: move out delay
    
    Change-Id: Ic46f9ba23fc8e9e3b41e8fc8118a29ecdc00de8f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 65a1c67133..935d3941de 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -100,11 +100,6 @@ static int check_key_press(void)
 	if (state < 0)
 		printf("read power key failed: %d\n", state);
 
-	if (state == KEY_PRESS_LONG_DOWN)
-		printf("power key long pressed...\n");
-	else if (state == KEY_PRESS_DOWN)
-		printf("power key short pressed...\n");
-
 	return state;
 }
 
@@ -139,17 +134,17 @@ static int system_suspend_enter(struct charge_animation_pdata *pdata)
 		local_irq_enable();
 		putc('1');
 		putc('\n');
-
-		/*
-		 * We must wait for key release event finish, otherwise
-		 * we may read key state too early.
-		 */
-		mdelay(300);
 	} else {
 		printf("\nWfi\n");
 		wfi();
 	}
 
+	/*
+	 * We must wait for key release event finish, otherwise
+	 * we may read key state too early.
+	 */
+	mdelay(300);
+
 	return 0;
 }
 

commit 9cacbc789960a1cc288bdc7ea6df67e4517965ef
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Feb 28 14:23:56 2018 +0800

    input: rk8xx: drivers/input/rk8xx_pwrkey.c
    
    Change-Id: I920b761825f2f3114d38b17fa377bcb19e88bb18
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/rk8xx_pwrkey.c b/drivers/input/rk8xx_pwrkey.c
index 80f7cd9cf4..3f10a2c3cb 100644
--- a/drivers/input/rk8xx_pwrkey.c
+++ b/drivers/input/rk8xx_pwrkey.c
@@ -104,38 +104,11 @@ static struct reg_data rk805_init_reg[] = {
 static int rk8xx_pwrkey_read(struct udevice *dev, int code)
 {
 	struct input_key *key = dev_get_platdata(dev);
-	u32 report = KEY_NOT_EXIST;
 
 	if (key->code != code)
-		goto out;
-
-	debug("%s: long key ms: %llu\n",
-	      __func__, key->up_t - key->down_t);
-
-	if ((key->up_t > key->down_t) &&
-	    (key->up_t - key->down_t) >= KEY_LONG_DOWN_MS) {
-		key->up_t = 0;
-		key->down_t = 0;
-		report = KEY_PRESS_LONG_DOWN;
-		printf("'%s' key long pressed down\n", key->name);
-	} else if (key->down_t &&
-		   key_get_timer(key->down_t) >= KEY_LONG_DOWN_MS) {
-		key->up_t = 0;
-		key->down_t = 0;
-		report = KEY_PRESS_LONG_DOWN;
-		printf("'%s' key long pressed down(hold)\n", key->name);
-	} else if ((key->up_t > key->down_t) &&
-		   (key->up_t - key->down_t) < KEY_LONG_DOWN_MS) {
-		key->up_t = 0;
-		key->down_t = 0;
-		report = KEY_PRESS_DOWN;
-		printf("'%s' key pressed down\n", key->name);
-	} else {
-		report = KEY_PRESS_NONE;
-	}
+		return KEY_NOT_EXIST;
 
-out:
-	return report;
+	return key_parse_gpio_event(key);
 }
 
 static void pwrkey_irq_handler(int irq, void *data)
@@ -215,7 +188,7 @@ static int pwrkey_interrupt_init(struct udevice *dev)
 		return ret;
 	}
 
-	key->name = "pwrkey";
+	key->name = "power";
 	key->code = KEY_POWER;
 	irq = phandle_gpio_to_irq(phandle, interrupt[0]);
 	irq_install_handler(irq, pwrkey_irq_handler, dev);

commit d7a503edb0196cb36b51ae12ba374057ae0cbf96
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Feb 28 14:23:40 2018 +0800

    input: gpio_key: use dm universal interface to parse event
    
    Change-Id: Ic3b7fca99be30ab7b1bb8a37fd54b603c1da223a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/gpio_key.c b/drivers/input/gpio_key.c
index f14eec9a40..9bf124d0f2 100644
--- a/drivers/input/gpio_key.c
+++ b/drivers/input/gpio_key.c
@@ -110,33 +110,8 @@ static int gpio_key_read(struct udevice *dev, int code)
 	for (i = 0; i < priv->key_nr; i++) {
 		if (key[i].code != code)
 			continue;
-
-		debug("%s: long key ms: %llu, up=%llu, down=%llu\n",
-		      key[i].name, key[i].up_t - key[i].down_t,
-		      key[i].up_t, key[i].down_t);
-
-		if (key[i].down_t && (key[i].up_t > key[i].down_t) &&
-		    (key[i].up_t - key[i].down_t) >= KEY_LONG_DOWN_MS) {
-			key[i].up_t = 0;
-			key[i].down_t = 0;
-			report = KEY_PRESS_LONG_DOWN;
-			printf("'%s' key long pressed down\n", key[i].name);
-		} else if (key[i].down_t && key_get_timer(key[i].down_t) >=
-			   KEY_LONG_DOWN_MS) {
-			key[i].up_t = 0;
-			key[i].down_t = 0;
-			report = KEY_PRESS_LONG_DOWN;
-			printf("'%s' key long pressed down(hold)\n",
-			       key[i].name);
-		} else if ((key[i].up_t > key[i].down_t) &&
-			   (key[i].up_t - key[i].down_t) < KEY_LONG_DOWN_MS) {
-			key[i].up_t = 0;
-			key[i].down_t = 0;
-			report = KEY_PRESS_DOWN;
-			printf("'%s' key pressed down\n", key[i].name);
-		} else {
-			report = KEY_PRESS_NONE;
-		}
+		report = key_parse_gpio_event(key[i]);
+		break;
 	}
 
 	return report;

commit 6cef563abc2a66e021c7c03460e02a62ba5eeaee
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Feb 28 14:22:38 2018 +0800

    input: rk_key: use dm universal interface to parse event
    
    Change-Id: I80c7a75a4150f1a8ebbf3d70541aa737cd687f91
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/rk_key.c b/drivers/input/rk_key.c
index 1f68872ae1..bc127c6841 100644
--- a/drivers/input/rk_key.c
+++ b/drivers/input/rk_key.c
@@ -149,52 +149,12 @@ static int rk_keys_read(struct udevice *dev, int code)
 				printf("%s: failed to read saradc\n",
 				       key[i].name);
 			} else {
-				/* Get min, max */
-				max = key[i].value + key[i].margin;
-				if (key[i].value > key[i].margin)
-					min = key[i].value - key[i].margin;
-				else
-					min = key[i].value;
-
-				/* Check */
-				if ((adcval <= max) && (adcval >= min)) {
-					report = KEY_PRESS_DOWN;
-					printf("'%s' key pressed down\n",
-					       key[i].name);
-				} else {
-					report = KEY_PRESS_NONE;
-				}
+				report = key_parse_adc_event(key[i], adcval);
 			}
-			break;
 		} else {
-			debug("%s: ms: %llu, up=%llu, down=%llu\n",
-			      key[i].name, key[i].up_t - key[i].down_t,
-			      key[i].up_t, key[i].down_t);
-
-			if (key[i].down_t && (key[i].up_t > key[i].down_t) &&
-			    (key[i].up_t - key[i].down_t) >= KEY_LONG_DOWN_MS) {
-				key[i].up_t = 0;
-				key[i].down_t = 0;
-				report = KEY_PRESS_LONG_DOWN;
-				printf("'%s' key long pressed down\n",
-				       key[i].name);
-			} else if (key[i].down_t && key_get_timer(key[i].down_t) >=
-				   KEY_LONG_DOWN_MS) {
-				key[i].up_t = 0;
-				key[i].down_t = 0;
-				report = KEY_PRESS_LONG_DOWN;
-				printf("'%s' key long pressed down(hold)\n",
-				       key[i].name);
-			} else if ((key[i].up_t > key[i].down_t) &&
-				   (key[i].up_t - key[i].down_t) < KEY_LONG_DOWN_MS) {
-				key[i].up_t = 0;
-				key[i].down_t = 0;
-				report = KEY_PRESS_DOWN;
-				printf("'%s' key pressed down\n", key[i].name);
-			} else {
-				report = KEY_PRESS_NONE;
-			}
+			report = key_parse_gpio_event(key[i]);
 		}
+		break;
 	}
 
 	return report;

commit 3fb8400061cb87ff97a6d26dec8b33728867ebb5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Feb 28 14:21:44 2018 +0800

    dm: key: add universal interface to parse gpio and adc key event
    
    Change-Id: I9a1b9d0a36d8fe34ea68bb4f15bf217cae407bf0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/key-uclass.c b/drivers/input/key-uclass.c
index 4a437c920e..21e25f63a0 100644
--- a/drivers/input/key-uclass.c
+++ b/drivers/input/key-uclass.c
@@ -45,6 +45,72 @@ static int key_read(struct udevice *dev, int code)
 	return ops->read(dev, code);
 }
 
+int key_parse_adc_event(struct input_key *key, unsigned int adcval)
+{
+	int report = KEY_NOT_EXIST;
+	int max, min;
+
+	debug("%s: %s: max=%d, min=%d, adcval=%d\n",
+	      __func__, key->name, max, min, adcval);
+
+	/* Get min, max */
+	max = key->value + key->margin;
+	if (key->value > key->margin)
+		min = key->value - key->margin;
+	else
+		min = key->value;
+
+	/* Check */
+	if ((adcval <= max) && (adcval >= min)) {
+		report = KEY_PRESS_DOWN;
+		printf("%s key pressed..\n", key->name);
+	} else {
+		report = KEY_PRESS_NONE;
+	}
+
+	return report;
+}
+
+int key_parse_gpio_event(struct input_key *key)
+{
+	u32 report = KEY_NOT_EXIST;
+
+	debug("%s: %s: up=%llu, down=%llu, delta=%llu\n",
+	      __func__, key->name, key->up_t, key->down_t,
+	      key->up_t - key->down_t);
+
+	/* Possible this is machine power-on long pressed, so ignore this */
+	if (key->down_t == 0 && key->up_t != 0) {
+		report = KEY_PRESS_NONE;
+		goto out;
+	}
+
+	if ((key->up_t > key->down_t) &&
+	    (key->up_t - key->down_t) >= KEY_LONG_DOWN_MS) {
+		key->up_t = 0;
+		key->down_t = 0;
+		report = KEY_PRESS_LONG_DOWN;
+		printf("%s key long pressed(hold)..\n", key->name);
+	} else if (key->down_t &&
+		   key_get_timer(key->down_t) >= KEY_LONG_DOWN_MS) {
+		key->up_t = 0;
+		key->down_t = 0;
+		report = KEY_PRESS_LONG_DOWN;
+		printf("%s key long pressed..\n", key->name);
+	} else if ((key->up_t > key->down_t) &&
+		   (key->up_t - key->down_t) < KEY_LONG_DOWN_MS) {
+		key->up_t = 0;
+		key->down_t = 0;
+		report = KEY_PRESS_DOWN;
+		printf("%s key short pressed..\n", key->name);
+	} else {
+		report = KEY_PRESS_NONE;
+	}
+
+out:
+	return report;
+}
+
 int platform_key_read(int code)
 {
 	struct udevice *dev;
diff --git a/include/key.h b/include/key.h
index 911804dd08..b7b8672bc8 100644
--- a/include/key.h
+++ b/include/key.h
@@ -41,4 +41,8 @@ struct input_key {
 uint64_t key_get_timer(uint64_t base);
 int platform_key_read(int code);
 
+/* General interface for adc or gpio interrupt key event parse */
+int key_parse_gpio_event(struct input_key *key);
+int key_parse_adc_event(struct input_key *key, unsigned int adcval);
+
 #endif

commit 459102b8a584fd95df0d9bf06f3cf21286f8d5a9
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Thu Mar 1 09:07:58 2018 +0800

    video/drm: dsi: use of_alias_get_id() to get id
    
    Change-Id: I82f9081a35daea6841dc6273f4f4a4e5141dfe79
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index 406257ee3a..4cd967fccd 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -939,7 +939,7 @@ static int rockchip_dw_mipi_dsi_init(struct display_state *state)
 	ofnode mipi_node = conn_state->node;
 	struct dw_mipi_dsi *dsi;
 	ofnode panel;
-	static int id = 0;
+	int id;
 	int ret;
 
 	dsi = malloc(sizeof(*dsi));
@@ -955,8 +955,12 @@ static int rockchip_dw_mipi_dsi_init(struct display_state *state)
 		return -ENXIO;
 	}
 
+	id = of_alias_get_id(ofnode_to_np(mipi_node), "dsi");
+	if (id < 0)
+		id = 0;
+
 	dsi->pdata = pdata;
-	dsi->id = id++;
+	dsi->id = id;
 	dsi->blob = state->blob;
 	dsi->node = mipi_node;
 	conn_state->private = dsi;

commit 64e1e04c21d7356332ffe862145d38d399f1a816
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Feb 27 17:03:31 2018 +0800

    fastboot: support rknand device
    
    Use rockchip_get_bootdev() to get dev_desc.
    
    Change-Id: I127d5418f65db42d93930283348bb4072447012f
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/fb_mmc.c b/common/fb_mmc.c
index 0a3c780ae3..48ec1cf0d9 100644
--- a/common/fb_mmc.c
+++ b/common/fb_mmc.c
@@ -15,7 +15,9 @@
 #include <div64.h>
 #include <linux/compat.h>
 #include <android_image.h>
-
+#ifdef CONFIG_RKIMG_BOOTLOADER
+#include <boot_rkimg.h>
+#endif
 /*
  * FIXME: Ensure we always set these names via Kconfig once xxx_PARTITION is
  * migrated
@@ -297,8 +299,11 @@ void fb_mmc_flash_write(const char *cmd, void *download_buffer,
 	u64 disksize = 0;
 	char reason[128] = {0};
 #endif
-
+#ifdef CONFIG_RKIMG_BOOTLOADER
+	dev_desc = rockchip_get_bootdev();
+#else
 	dev_desc = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV);
+#endif
 	if (!dev_desc || dev_desc->type == DEV_TYPE_UNKNOWN) {
 		pr_err("invalid mmc device\n");
 		fastboot_fail("invalid mmc device", response);
@@ -405,7 +410,11 @@ void fb_mmc_erase(const char *cmd, char *response)
 		return;
 	}
 
+#ifdef CONFIG_RKIMG_BOOTLOADER
+	dev_desc = rockchip_get_bootdev();
+#else
 	dev_desc = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV);
+#endif
 	if (!dev_desc || dev_desc->type == DEV_TYPE_UNKNOWN) {
 		pr_err("invalid mmc device");
 		fastboot_fail("invalid mmc device", response);

commit bebadd87fbcde9bd18db45172cbab9abd9c29217
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Wed Feb 28 09:23:00 2018 +0800

    phy: phy-rockchip-inno-usb2: fix the wrong charger type
    
    The wrong type of charger was reported when there was not usb-cable
    plugged in. This change adds USB-Vbus status checking before do charge
    detection to fix it.
    
    Change-Id: I5e35414d40fdfe8d07ab2aa0771490e86a97e248
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index 6d784b66c2..9cfd2c0077 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -265,6 +265,12 @@ int rockchip_chg_get_type(void)
 	base = get_reg_base(rphy);
 	port_cfg = &rphy->phy_cfg->port_cfgs[USB2PHY_PORT_OTG];
 
+	/* Check USB-Vbus status first */
+	if (!property_enabled(base, &port_cfg->utmi_bvalid)) {
+		pr_info("%s: no charger found\n", __func__);
+		return POWER_SUPPLY_TYPE_UNKNOWN;
+	}
+
 	/* Suspend USB-PHY and put the controller in non-driving mode */
 	property_enable(base, &port_cfg->phy_sus, true);
 	property_enable(base, &rphy->phy_cfg->chg_det.opmode, false);

commit 57ab23a62c097a7ca5317e3c7d0ec303379642a7
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Tue Feb 27 11:44:27 2018 +0800

    rockchip: boot_mode: add usb-vbus detect support
    
    Checked the usb-vbus status after the download key had been pressed in
    case of there was no usb-cable plugged in PC.
    
    Change-Id: Iece797be68f0f3094f3137e4c90a53000fb9ffe2
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index f88a14b3d0..a0c4919611 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -12,6 +12,7 @@
 #include <dm.h>
 #include <fdtdec.h>
 #include <boot_rkimg.h>
+#include <linux/usb/phy-rockchip-inno-usb2.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -82,7 +83,7 @@ void devtype_num_envset(void)
 
 void rockchip_dnl_mode_check(void)
 {
-	if (rockchip_dnl_key_pressed()) {
+	if (rockchip_dnl_key_pressed() && rockchip_u2phy_vbus_detect()) {
 		printf("download key pressed, entering download mode...\n");
 		/* If failed, we fall back to bootrom download mode */
 		run_command_list("rockusb 0 ${devtype} ${devnum}", -1, 0);
diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index 09afed66c6..6d784b66c2 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -342,6 +342,11 @@ out:
 	return chg_type;
 }
 
+int rockchip_u2phy_vbus_detect(void)
+{
+	return (rockchip_chg_get_type() == POWER_SUPPLY_TYPE_USB) ? 1 : 0;
+}
+
 void otg_phy_init(struct dwc2_udc *dev)
 {
 	const struct rockchip_usb2phy_port_cfg *port_cfg;
diff --git a/include/linux/usb/phy-rockchip-inno-usb2.h b/include/linux/usb/phy-rockchip-inno-usb2.h
index d56c9ff6c1..a44c00433d 100644
--- a/include/linux/usb/phy-rockchip-inno-usb2.h
+++ b/include/linux/usb/phy-rockchip-inno-usb2.h
@@ -9,4 +9,13 @@
 
 extern int rockchip_chg_get_type(void);
 
+#ifdef CONFIG_PHY_ROCKCHIP_INNO_USB2
+int rockchip_u2phy_vbus_detect(void);
+#else
+static inline int rockchip_u2phy_vbus_detect(void)
+{
+	return -ENOSYS;
+}
+#endif
+
 #endif /* _PHY_ROCKCHIP_INNO_USB2_H */

commit 620af6a373c793320f2a27dfb1c4335891d5ab76
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Wed Feb 28 09:42:29 2018 +0800

    drm/rockchip: vop: update ymirror support
    
    some vop unsupport ymirror, the yaddr calc is wrong.
    
    Change-Id: I4b95eb21d16ffa14a4db484b7a45856ceb19425d
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index 7eb2276cec..f84d55317d 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -572,8 +572,12 @@ static int rockchip_vop_set_plane(struct display_state *state)
 	dsp_sty = crtc_y + mode->vtotal - mode->vsync_start;
 	dsp_st = dsp_sty << 16 | (dsp_stx & 0xffff);
 
-	if (crtc_state->ymirror)
-		crtc_state->dma_addr += (src_h - 1) * xvir * 4;
+	if (crtc_state->ymirror) {
+		if (VOP_WIN_SUPPORT(vop, vop->win, ymirror))
+			crtc_state->dma_addr += (src_h - 1) * xvir * 4;
+		else
+			crtc_state->ymirror = 0;
+	}
 	VOP_WIN_SET(vop, ymirror, crtc_state->ymirror);
 	VOP_WIN_SET(vop, format, crtc_state->format);
 	VOP_WIN_SET(vop, yrgb_vir, xvir);
diff --git a/drivers/video/drm/rockchip_vop.h b/drivers/video/drm/rockchip_vop.h
index 5c3caded05..10b433a163 100644
--- a/drivers/video/drm/rockchip_vop.h
+++ b/drivers/video/drm/rockchip_vop.h
@@ -16,13 +16,14 @@
 #define VOP_MINOR(version) 	((version) & 0xff)
 
 #define VOP_REG_SUPPORT(vop, reg) \
-		(!reg.major || (reg.major == VOP_MAJOR(vop->version) && \
-		reg.begin_minor <= VOP_MINOR(vop->version) && \
-		reg.end_minor >= VOP_MINOR(vop->version) && \
-		reg.mask))
+		(reg.mask && \
+		 (!reg.major || \
+		  (reg.major == VOP_MAJOR(vop->version) && \
+		   reg.begin_minor <= VOP_MINOR(vop->version) && \
+		   reg.end_minor >= VOP_MINOR(vop->version))))
 
 #define VOP_WIN_SUPPORT(vop, win, name) \
-		VOP_REG_SUPPORT(vop, win->phy->name)
+		VOP_REG_SUPPORT(vop, win->name)
 
 #define VOP_CTRL_SUPPORT(vop, name) \
 		VOP_REG_SUPPORT(vop, vop->ctrl->name)

commit 60efa98282ba68b2dccb4e7570144c05dbf7c375
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Feb 24 17:20:01 2018 +0800

    rockchip: add evb-rk3326 support
    
    Change-Id: Ic224db95452c9d2e6108dc93ec81018a6718f607
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3326-evb.dts b/arch/arm/dts/rk3326-evb.dts
new file mode 100644
index 0000000000..93504616ac
--- /dev/null
+++ b/arch/arm/dts/rk3326-evb.dts
@@ -0,0 +1,419 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+/dts-v1/;
+#include "px30.dtsi"
+#include "px30-u-boot.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Rockchip RK3126 EVB";
+	compatible = "rockchip,rk3326-evb", "rockchip,rk3326";
+
+	chosen {
+		stdout-path = &uart2;
+	};
+
+	dmc: dmc@20004000 {
+		u-boot,dm-pre-reloc;
+		compatible = "rockchip,px30-dmc", "syscon";
+		reg = <0x0 0xff2a0000 0x0 0x1000>;
+	};
+
+	adc-keys {
+		compatible = "adc-keys";
+		io-channels = <&saradc 2>;
+		io-channel-names = "buttons";
+		keyup-threshold-microvolt = <1800000>;
+
+		vol-up-key {
+			linux,code = <KEY_VOLUMEUP>;
+			label = "volume up";
+			press-threshold-microvolt = <10000>;
+		};
+
+		vol-down-key {
+			linux,code = <KEY_VOLUMEDOWN>;
+			label = "volume down";
+			press-threshold-microvolt = <170000>;
+		};
+
+		home-key {
+			linux,code = <KEY_HOME>;
+			label = "home";
+			press-threshold-microvolt = <254000>;
+		};
+
+		menu-key {
+			linux,code = <KEY_MENU>;
+			label = "menu";
+			press-threshold-microvolt = <414000>;
+		};
+
+		esc-key {
+			linux,code = <KEY_ESC>;
+			label = "esc";
+			press-threshold-microvolt = <614000>;
+		};
+	};
+
+	backlight: backlight {
+		compatible = "pwm-backlight";
+		pwms = <&pwm1 0 25000 0>;
+		brightness-levels = <
+			  0   1   2   3   4   5   6   7
+			  8   9  10  11  12  13  14  15
+			 16  17  18  19  20  21  22  23
+			 24  25  26  27  28  29  30  31
+			 32  33  34  35  36  37  38  39
+			 40  41  42  43  44  45  46  47
+			 48  49  50  51  52  53  54  55
+			 56  57  58  59  60  61  62  63
+			 64  65  66  67  68  69  70  71
+			 72  73  74  75  76  77  78  79
+			 80  81  82  83  84  85  86  87
+			 88  89  90  91  92  93  94  95
+			 96  97  98  99 100 101 102 103
+			104 105 106 107 108 109 110 111
+			112 113 114 115 116 117 118 119
+			120 121 122 123 124 125 126 127
+			128 129 130 131 132 133 134 135
+			136 137 138 139 140 141 142 143
+			144 145 146 147 148 149 150 151
+			152 153 154 155 156 157 158 159
+			160 161 162 163 164 165 166 167
+			168 169 170 171 172 173 174 175
+			176 177 178 179 180 181 182 183
+			184 185 186 187 188 189 190 191
+			192 193 194 195 196 197 198 199
+			200 201 202 203 204 205 206 207
+			208 209 210 211 212 213 214 215
+			216 217 218 219 220 221 222 223
+			224 225 226 227 228 229 230 231
+			232 233 234 235 236 237 238 239
+			240 241 242 243 244 245 246 247
+			248 249 250 251 252 253 254 255>;
+		default-brightness-level = <200>;
+	};
+};
+
+
+&i2c0 {
+	status = "okay";
+
+	rk817: pmic@20 {
+		compatible = "rockchip,rk817";
+		reg = <0x20>;
+		interrupt-parent = <&gpio0>;
+		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pmic_int>;
+		rockchip,system-power-controller;
+		wakeup-source;
+		#clock-cells = <1>;
+		clock-output-names = "xin32k", "rk808-clkout2";
+
+		vcc1-supply = <&vccsys>;
+		vcc2-supply = <&vccsys>;
+		vcc3-supply = <&vccsys>;
+		vcc4-supply = <&vccsys>;
+		vcc5-supply = <&vccsys>;
+		vcc6-supply = <&vccsys>;
+		vcc7-supply = <&vcc_3v0>;
+		vcc8-supply = <&vccsys>;
+		vcc9-supply = <&dcdc_boost>;
+
+		vccsys: vccsys{
+			compatible = "regulator-fixed";
+			regulator-name = "vcc3v8_sys";
+			regulator-always-on;
+			regulator-boot-on;
+			regulator-min-microvolt = <3800000>;
+			regulator-max-microvolt = <3800000>;
+		};
+
+		rk817_pin0_ts: rk817_pin0_ts {
+			pins = "gpio0";
+			function = "pin_fun0";
+		};
+
+		rk817_pin0_gpio: rk817_pin0_gpio {
+			pins = "gpio0";
+			function = "gpio";
+		};
+
+		rk817_pin1_gt: rk817_pin1_gt {
+			pins = "gpio1";
+			function = "pin_fun0";
+		};
+
+		rk817_pin1_gpio: rk817_pin1_gpio {
+			pins = "gpio1";
+			function = "gpio";
+		};
+
+		pwrkey {
+			status = "okay";
+		};
+
+		regulators {
+			vdd_arm: DCDC_REG1 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <950000>;
+				regulator-max-microvolt = <1350000>;
+				regulator-ramp-delay = <6001>;
+				regulator-initial-mode = <0x1>;
+				regulator-name = "vdd_arm";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <700000>;
+				};
+			};
+
+			vdd_logic: DCDC_REG2 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <950000>;
+				regulator-max-microvolt = <1350000>;
+				regulator-ramp-delay = <6001>;
+				regulator-initial-mode = <0x1>;
+				regulator-name = "vdd_logic";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-suspend-microvolt = <800000>;
+				};
+			};
+
+			vcc_ddr: DCDC_REG3 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-initial-mode = <0x1>;
+				regulator-name = "vcc_ddr";
+					regulator-state-mem {
+					regulator-on-in-suspend;
+				};
+			};
+
+			vcc_3v0: DCDC_REG4 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3000000>;
+				regulator-initial-mode = <0x1>;
+				regulator-name = "vcc_3v0";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-suspend-microvolt = <3000000>;
+				};
+			};
+
+			vcc2v5_ddr: LDO_REG1 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <2500000>;
+				regulator-max-microvolt = <2500000>;
+				regulator-name = "vcc2v5_ddr";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <2500000>;
+				};
+			};
+
+			vcc1v8_soc: LDO_REG2 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+
+				regulator-name = "vcc1v8_soc";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vdd1v0_soc: LDO_REG3 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+
+				regulator-name = "vcc1v0_soc";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-suspend-microvolt = <1000000>;
+				};
+			};
+
+			vcc3v0_pmu: LDO_REG4 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3000000>;
+
+				regulator-name = "vcc3v0_pmu";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-suspend-microvolt = <3000000>;
+				};
+			};
+
+			vccio_sd: LDO_REG5 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+
+				regulator-name = "vccio_sd";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3300000>;
+				};
+			};
+
+			vcc_sd: LDO_REG6 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+
+				regulator-name = "vcc_sd";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3300000>;
+				};
+			};
+
+			vcc2v8_dvp: LDO_REG7 {
+			regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <2800000>;
+				regulator-max-microvolt = <2800000>;
+
+				regulator-name = "vcc2v8_dvp";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-suspend-microvolt = <2800000>;
+				};
+			};
+
+			vcc1v8_dvp: LDO_REG8 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+
+				regulator-name = "vcc1v8_dvp";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vdd1v5_dvp: LDO_REG9 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1500000>;
+				regulator-max-microvolt = <1500000>;
+
+				regulator-name = "vdd1v5_dvp";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-suspend-microvolt = <1500000>;
+				};
+			};
+
+			dcdc_boost: BOOST {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <4700000>;
+				regulator-max-microvolt = <5400000>;
+				regulator-name = "boost";
+			};
+
+			otg_switch: OTG_SWITCH {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-name = "otg_switch";
+			};
+		};
+
+		battery {
+			compatible = "rk817,battery";
+			ocv_table = <3500 3625 3685 3697 3718 3735 3748
+						3760 3774 3788 3802 3816 3834 3853
+						3877 3908 3946 3975 4018 4071 4106>;
+			design_capacity = <2500>;
+			design_qmax = <2750>;
+			bat_res = <100>;
+			sleep_enter_current = <300>;
+			sleep_exit_current = <300>;
+			sleep_filter_current = <100>;
+			power_off_thresd = <3500>;
+			zero_algorithm_vol = <3850>;
+			max_soc_offset = <60>;
+			monitor_sec = <5>;
+			sample_res = <10>;
+			virtual_power = <1>;
+		};
+
+		charger {
+			compatible = "rk817,charger";
+			min_input_voltage = <4500>;
+			max_input_current = <1500>;
+			max_chrg_current = <1300>;
+			max_chrg_voltage = <4200>;
+			chrg_term_mode = <1>;
+			chrg_finish_cur = <300>;
+			virtual_power = <0>;
+			dc_det_adc = <0>;
+		};
+	};
+};
+
+&emmc {
+	u-boot,dm-pre-reloc;
+	fifo-mode;
+	bus-width = <8>;
+	cap-mmc-highspeed;
+	supports-emmc;
+	disable-wp;
+	non-removable;
+	num-slots = <1>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
+	status = "okay";
+};
+
+&pwm1 {
+	status = "okay";
+};
+
+&saradc {
+	status = "okay";
+};
+
+&pinctrl {
+	pmic {
+	pmic_int: pmic_int {
+		rockchip,pins =
+			<0 7 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+};
+
+&u2phy {
+	status = "okay";
+};
+
+&u2phy_otg {
+	status = "okay";
+};
+
+&u2phy_host {
+	status = "okay";
+};
diff --git a/configs/evb-rk3326_defconfig b/configs/evb-rk3326_defconfig
new file mode 100644
index 0000000000..8d394357f6
--- /dev/null
+++ b/configs/evb-rk3326_defconfig
@@ -0,0 +1,88 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_ROCKCHIP_PX30=y
+CONFIG_ROCKCHIP_RK3326=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_TARGET_EVB_PX30=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3326-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_BOOTDELAY=0
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_FASTBOOT_BUF_ADDR=0x800800
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_RKPARM_PARTITION=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_RK8XX_PWRKEY=y
+CONFIG_ADC_KEY=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PINCTRL=y
+CONFIG_DM_FUEL_GAUGE=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_DM_CHARGE_DISPLAY=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_RKNAND=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0xFF160000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x330d
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_DISPLAY_ROCKCHIP_MIPI=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_DRM_ROCKCHIP_LVDS=y
+CONFIG_DRM_ROCKCHIP_PANEL=y
+CONFIG_DRM_ROCKCHIP_DSI_PANEL=y
+CONFIG_LCD=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y

commit 0d9749497752f11984882c6095d52901ff09a75c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Feb 24 17:17:30 2018 +0800

    rockchip: chip info: update RK3326 and PX30
    
    PX30 uses "PX30" and RK3326 uses "RK3326".
    
    Change-Id: I80dd716265214b754bf368d658721f5b2ae271c8
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/chip_info.c b/arch/arm/mach-rockchip/chip_info.c
index bb6083bf90..99597663b8 100644
--- a/arch/arm/mach-rockchip/chip_info.c
+++ b/arch/arm/mach-rockchip/chip_info.c
@@ -48,8 +48,16 @@ int rockchip_get_chip_info(unsigned int chip_info[])
 #elif defined(CONFIG_ROCKCHIP_RK3399)
 	chip_info[0] = 0x33333043;
 	chip_info[3] = 0x56313030;
+
+/*
+ * Must check CONFIG_ROCKCHIP_RK3326 first! Because RK3326 board defconfig
+ * will contains both CONFIG_ROCKCHIP_RK3326 and CONFIG_ROCKCHIP_PX30, we
+ * would like treat the board as RK3326.
+ */
+#elif defined(CONFIG_ROCKCHIP_RK3326)
+	chip_info[0] = 0x33333236;
 #elif defined(CONFIG_ROCKCHIP_PX30)
-	chip_info[0] = 0x33333044;
+	chip_info[0] = 0x50583330;
 #endif
 
 	return 0;
@@ -73,8 +81,6 @@ int rockchip_rockusb_get_chip_info(unsigned int chip_info[])
 		chip_info[0] = 0x33323248;
 #elif defined(CONFIG_ROCKCHIP_RK3399)
 		chip_info[0] = 0x33333043;
-#elif defined(CONFIG_ROCKCHIP_PX30)
-		chip_info[0] = 0x33333236;
 #endif
 	}
 

commit 2ce00756b4287e8ff68ba02c1e46a692adde86cd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Feb 24 17:13:58 2018 +0800

    make.sh: remove RKCHIP fixup for PX30
    
    PX30 and RK3326 would have their individual ini files.
    
    Change-Id: I3e8f05b34ee9a38429fd2870f635328eaf6b5f59
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 5a7b1d8c2e..192ce4adc1 100755
--- a/make.sh
+++ b/make.sh
@@ -119,8 +119,6 @@ fixup_chip_name()
 {
 	if [ "$RKCHIP" = 'RK3228' -o "$RKCHIP" = 'RK3229' ]; then
 		RKCHIP=RK322X
-	elif [ "$RKCHIP" = 'PX30' ]; then
-		RKCHIP=RK3326
 	fi
 }
 

commit a08ded54815c5795d9f601aff9e73e3949c90e15
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Feb 24 17:12:00 2018 +0800

    rockchip: Kconfig: add ROCKCHIP_RK3326
    
    RK3326 can use most code from PX30, but at some situations we have
    to distinguish between RK3326 and PX30, so this macro gives help.
    It is usually selected in rk3326 board defconfig.
    
    Change-Id: Ie890ec2f9e00056709da4799270b7967ffe385cc
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index ad488a53b4..74436308a3 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -11,6 +11,16 @@ config ROCKCHIP_PX30
 	  and video codec support. Peripherals include Gigabit Ethernet,
 	  USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
 
+if ROCKCHIP_PX30
+
+config ROCKCHIP_RK3326
+	bool "Support Rockchip RK3326 "
+	help
+	  RK3326 can use most code from PX30, but at some situations we have
+	  to distinguish between RK3326 and PX30, so this macro gives help.
+	  It is usually selected in rk3326 board defconfig.
+endif
+
 config ROCKCHIP_RK3036
 	bool "Support Rockchip RK3036"
 	select CPU_V7

commit 9d312af1d43031086e370d963f52a68980c396ec
Author: Zhaoyifeng <zyf@rock-chips.com>
Date:   Tue Feb 27 17:30:20 2018 +0800

    configs: evb-px30: enable nand driver
    
    Change-Id: Ia0e407f80c480caafdc035933747f4f0bf4ad2a3
    Signed-off-by: Zhaoyifeng <zyf@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 2dd4178ff8..ec45935c8f 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -52,6 +52,7 @@ CONFIG_DM_CHARGE_DISPLAY=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_DM_RESET=y
+CONFIG_RKNAND=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF160000
 CONFIG_DEBUG_UART_CLOCK=24000000

commit b00aeb2c8dc3fafa5e48987189d7f72117cd59a7
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Sun Feb 25 20:15:55 2018 +0800

    configs: evb-px30: change the fastboot buffer size
    
    Change-Id: I7968e3e30762e1373473eb8e254cb8af45da028d
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 167c1a928b..2dd4178ff8 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -14,7 +14,7 @@ CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
-CONFIG_FASTBOOT_BUF_SIZE=0x08000000
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_IMLS is not set

commit bcefd07799145a28a089d00a629ab5a83cec7385
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Tue Feb 27 12:22:16 2018 +0800

    clk: rockchip: px30: Remove duplicate definition of mode shift and mask
    
    Change-Id: I94c3b5a6dfd23c96b681e05e28865bc541421391
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 2367a00658..4790bcb3c0 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -42,6 +42,15 @@ static const struct pll_div *apll_cfgs[] = {
 	[APLL_600_MHZ] = &apll_600_cfg,
 };
 
+static u8 pll_mode_shift[PLL_COUNT] = {
+	APLL_MODE_SHIFT, DPLL_MODE_SHIFT, CPLL_MODE_SHIFT,
+	NPLL_MODE_SHIFT, GPLL_MODE_SHIFT
+};
+static u32 pll_mode_mask[PLL_COUNT] = {
+	APLL_MODE_MASK, DPLL_MODE_MASK, CPLL_MODE_MASK,
+	NPLL_MODE_MASK, GPLL_MODE_MASK
+};
+
 /*
  *  the div restructions of pll in integer mode, these are defined in
  *  * CRU_*PLL_CON0 or PMUCRU_*PLL_CON0
@@ -72,14 +81,6 @@ static void rkclk_set_pll(struct px30_cru *cru, enum px30_pll_id pll_id,
 	/* All PLLs have same VCO and output frequency range restrictions. */
 	uint vco_hz = OSC_HZ / 1000 * div->fbdiv / div->refdiv * 1000;
 	uint output_hz = vco_hz / div->postdiv1 / div->postdiv2;
-	static u8 mode_shift[PLL_COUNT] = {
-		APLL_MODE_SHIFT, DPLL_MODE_SHIFT, CPLL_MODE_SHIFT,
-		NPLL_MODE_SHIFT, GPLL_MODE_SHIFT
-	};
-	static u32 mode_mask[PLL_COUNT] = {
-		APLL_MODE_MASK, DPLL_MODE_MASK, CPLL_MODE_MASK,
-		NPLL_MODE_MASK, GPLL_MODE_MASK
-	};
 
 	if (pll_id == GPLL) {
 		pll = &cru->gpll;
@@ -99,8 +100,8 @@ static void rkclk_set_pll(struct px30_cru *cru, enum px30_pll_id pll_id,
 	 * When power on or changing PLL setting,
 	 * we must force PLL into slow mode to ensure output stable clock.
 	 */
-	rk_clrsetreg(mode, mode_mask[pll_id],
-		     PLLMUX_FROM_XIN24M << mode_shift[pll_id]);
+	rk_clrsetreg(mode, pll_mode_mask[pll_id],
+		     PLLMUX_FROM_XIN24M << pll_mode_shift[pll_id]);
 
 	/* use integer mode */
 	rk_setreg(&pll->con1, 1 << PLL_DSMPD_SHIFT);
@@ -121,8 +122,8 @@ static void rkclk_set_pll(struct px30_cru *cru, enum px30_pll_id pll_id,
 	while (readl(&pll->con1) & (1 << PLL_LOCK_STATUS_SHIFT))
 		udelay(1);
 
-	rk_clrsetreg(mode, mode_mask[pll_id],
-		     PLLMUX_FROM_PLL << mode_shift[pll_id]);
+	rk_clrsetreg(mode, pll_mode_mask[pll_id],
+		     PLLMUX_FROM_PLL << pll_mode_shift[pll_id]);
 
 	return;
 }
@@ -133,14 +134,6 @@ static uint32_t rkclk_pll_get_rate(struct px30_cru *cru,
 	u32 refdiv, fbdiv, postdiv1, postdiv2;
 	u32 con;
 	struct px30_pll *pll;
-	static u8 clk_shift[PLL_COUNT] = {
-		APLL_MODE_SHIFT, DPLL_MODE_SHIFT, CPLL_MODE_SHIFT,
-		NPLL_MODE_SHIFT, GPLL_MODE_SHIFT
-	};
-	static u32 clk_mask[PLL_COUNT] = {
-		APLL_MODE_MASK, DPLL_MODE_MASK, CPLL_MODE_MASK,
-		NPLL_MODE_MASK, GPLL_MODE_MASK
-	};
 	uint shift;
 	uint mask;
 
@@ -152,8 +145,8 @@ static uint32_t rkclk_pll_get_rate(struct px30_cru *cru,
 		con = readl(&cru->mode);
 	}
 
-	shift = clk_shift[pll_id];
-	mask = clk_mask[pll_id];
+	shift = pll_mode_shift[pll_id];
+	mask = pll_mode_mask[pll_id];
 
 	switch ((con & mask) >> shift) {
 	case PLLMUX_FROM_XIN24M:

commit 30f1f38dda0f851c213bad1d954a5afa6c6c2db6
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Fri Feb 23 20:18:50 2018 +0800

    clk: rockchip: px30: Add support to set and get rate for vopb
    
    Change-Id: I5105c4823ffd6632c29a8faa80b995f7ef0decaa
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_px30.h b/arch/arm/include/asm/arch-rockchip/cru_px30.h
index e459b9926c..d883a9c8cb 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_px30.h
@@ -9,6 +9,7 @@
 #include <common.h>
 
 #define MHz		1000000
+#define KHz		1000
 #define OSC_HZ		(24 * MHz)
 
 #define APLL_HZ		(816 * MHz)
@@ -161,6 +162,28 @@ enum {
 	CORE_DIV_CON_SHIFT	= 0,
 	CORE_DIV_CON_MASK	= 0x0f << CORE_DIV_CON_SHIFT,
 
+	/* CRU_CLK_SEL3_CON */
+	ACLK_VO_PLL_SHIFT	= 6,
+	ACLK_VO_PLL_MASK	= 0x3 << ACLK_VO_PLL_SHIFT,
+	ACLK_VO_SEL_GPLL	= 0,
+	ACLK_VO_SEL_CPLL,
+	ACLK_VO_SEL_NPLL,
+	ACLK_VO_DIV_SHIFT	= 0,
+	ACLK_VO_DIV_MASK	= 0x1f << ACLK_VO_DIV_SHIFT,
+
+	/* CRU_CLK_SEL5_CON */
+	DCLK_VOPB_SEL_SHIFT	= 14,
+	DCLK_VOPB_SEL_MASK	= 0x3 << DCLK_VOPB_SEL_SHIFT,
+	DCLK_VOPB_SEL_DIVOUT	= 0,
+	DCLK_VOPB_SEL_FRACOUT,
+	DCLK_VOPB_SEL_24M,
+	DCLK_VOPB_PLL_SEL_SHIFT	= 11,
+	DCLK_VOPB_PLL_SEL_MASK	= 0x1 << DCLK_VOPB_PLL_SEL_SHIFT,
+	DCLK_VOPB_PLL_SEL_CPLL	= 0,
+	DCLK_VOPB_PLL_SEL_NPLL,
+	DCLK_VOPB_DIV_SHIFT	= 0,
+	DCLK_VOPB_DIV_MASK	= 0xff,
+
 	/* CRU_CLK_SEL14_CON */
 	PERI_PLL_SEL_SHIFT	=15,
 	PERI_PLL_SEL_MASK	= 3 << PERI_PLL_SEL_SHIFT,
diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 5df3ba9d28..2367a00658 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -127,6 +127,116 @@ static void rkclk_set_pll(struct px30_cru *cru, enum px30_pll_id pll_id,
 	return;
 }
 
+static uint32_t rkclk_pll_get_rate(struct px30_cru *cru,
+				   enum px30_pll_id pll_id)
+{
+	u32 refdiv, fbdiv, postdiv1, postdiv2;
+	u32 con;
+	struct px30_pll *pll;
+	static u8 clk_shift[PLL_COUNT] = {
+		APLL_MODE_SHIFT, DPLL_MODE_SHIFT, CPLL_MODE_SHIFT,
+		NPLL_MODE_SHIFT, GPLL_MODE_SHIFT
+	};
+	static u32 clk_mask[PLL_COUNT] = {
+		APLL_MODE_MASK, DPLL_MODE_MASK, CPLL_MODE_MASK,
+		NPLL_MODE_MASK, GPLL_MODE_MASK
+	};
+	uint shift;
+	uint mask;
+
+	if (pll_id == GPLL) {
+		pll = &cru->gpll;
+		con = readl(&cru->pmu_mode);
+	} else {
+		pll = &cru->pll[pll_id];
+		con = readl(&cru->mode);
+	}
+
+	shift = clk_shift[pll_id];
+	mask = clk_mask[pll_id];
+
+	switch ((con & mask) >> shift) {
+	case PLLMUX_FROM_XIN24M:
+		return OSC_HZ;
+	case PLLMUX_FROM_PLL:
+		/* normal mode */
+		con = readl(&pll->con0);
+		postdiv1 = (con & PLL_POSTDIV1_MASK) >> PLL_POSTDIV1_SHIFT;
+		fbdiv = (con & PLL_FBDIV_MASK) >> PLL_FBDIV_SHIFT;
+		con = readl(&pll->con1);
+		postdiv2 = (con & PLL_POSTDIV2_MASK) >> PLL_POSTDIV2_SHIFT;
+		refdiv = (con & PLL_REFDIV_MASK) >> PLL_REFDIV_SHIFT;
+		return (24 * fbdiv / (refdiv * postdiv1 * postdiv2)) * 1000000;
+	case PLLMUX_FROM_RTC32K:
+	default:
+		return 32768;
+	}
+}
+
+static int pll_para_config(u32 freq_hz, struct pll_div *div)
+{
+	u32 ref_khz = OSC_HZ / KHz, refdiv, fbdiv = 0;
+	u32 postdiv1, postdiv2 = 1;
+	u32 fref_khz;
+	u32 diff_khz, best_diff_khz;
+	const u32 max_refdiv = 63, max_fbdiv = 3200, min_fbdiv = 16;
+	const u32 max_postdiv1 = 7, max_postdiv2 = 7;
+	u32 vco_khz;
+	u32 freq_khz = freq_hz / KHz;
+
+	if (!freq_hz) {
+		printf("%s: the frequency can't be 0 Hz\n", __func__);
+		return -1;
+	}
+
+	postdiv1 = DIV_ROUND_UP(VCO_MIN_HZ / 1000, freq_khz);
+	if (postdiv1 > max_postdiv1) {
+		postdiv2 = DIV_ROUND_UP(postdiv1, max_postdiv1);
+		postdiv1 = DIV_ROUND_UP(postdiv1, postdiv2);
+	}
+
+	vco_khz = freq_khz * postdiv1 * postdiv2;
+
+	if (vco_khz < (VCO_MIN_HZ / KHz) || vco_khz > (VCO_MAX_HZ / KHz) ||
+	    postdiv2 > max_postdiv2) {
+		printf("%s: Cannot find out a supported VCO for Freq (%uHz)\n",
+		       __func__, freq_hz);
+		return -1;
+	}
+
+	div->postdiv1 = postdiv1;
+	div->postdiv2 = postdiv2;
+
+	best_diff_khz = vco_khz;
+	for (refdiv = 1; refdiv < max_refdiv && best_diff_khz; refdiv++) {
+		fref_khz = ref_khz / refdiv;
+
+		fbdiv = vco_khz / fref_khz;
+		if ((fbdiv >= max_fbdiv) || (fbdiv <= min_fbdiv))
+			continue;
+		diff_khz = vco_khz - fbdiv * fref_khz;
+		if (fbdiv + 1 < max_fbdiv && diff_khz > fref_khz / 2) {
+			fbdiv++;
+			diff_khz = fref_khz - diff_khz;
+		}
+
+		if (diff_khz >= best_diff_khz)
+			continue;
+
+		best_diff_khz = diff_khz;
+		div->refdiv = refdiv;
+		div->fbdiv = fbdiv;
+	}
+
+	if (best_diff_khz > 4 * (MHz / KHz)) {
+		printf("%s: Failed to match output frequency %u bestis %u Hz\n",
+		       __func__, freq_hz,
+		       best_diff_khz * KHz);
+		return -1;
+	}
+	return 0;
+}
+
 static void rkclk_init(struct px30_cru *cru)
 {
 	u32 aclk_div;
@@ -452,6 +562,67 @@ static ulong px30_spi_set_clk(struct px30_cru *cru, ulong clk_id, uint hz)
 	return DIV_TO_RATE(GPLL_HZ, src_clk_div);
 }
 
+static ulong px30_vop_get_clk(struct px30_cru *cru, ulong clk_id)
+{
+	u32 div, con, parent;
+
+	switch (clk_id) {
+	case ACLK_VOPB:
+		con = readl(&cru->clksel_con[3]);
+		div = con & ACLK_VO_DIV_MASK;
+		parent = GPLL_HZ;
+		break;
+	case DCLK_VOPB:
+		con = readl(&cru->clksel_con[5]);
+		div = con & DCLK_VOPB_DIV_MASK;
+		parent = rkclk_pll_get_rate(cru, CPLL);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong px30_vop_set_clk(struct px30_cru *cru, ulong clk_id, uint hz)
+{
+	int src_clk_div;
+	struct pll_div cpll_config = {0};
+
+	src_clk_div = GPLL_HZ / hz;
+	assert(src_clk_div - 1 < 31);
+
+	switch (clk_id) {
+	case ACLK_VOPB:
+		rk_clrsetreg(&cru->clksel_con[3],
+			     ACLK_VO_PLL_MASK | ACLK_VO_DIV_MASK,
+			     ACLK_VO_SEL_GPLL << ACLK_VO_PLL_SHIFT |
+			     (src_clk_div - 1) << ACLK_VO_DIV_SHIFT);
+		break;
+	case DCLK_VOPB:
+		/*
+		 * vopb dclk source from cpll, and equals to
+		 * cpll(means div == 1)
+		 */
+		if (pll_para_config(hz, &cpll_config))
+			return -1;
+		rkclk_set_pll(cru, CPLL, &cpll_config);
+
+		rk_clrsetreg(&cru->clksel_con[5],
+			     DCLK_VOPB_SEL_MASK | DCLK_VOPB_PLL_SEL_MASK |
+			     DCLK_VOPB_DIV_MASK,
+			     DCLK_VOPB_SEL_DIVOUT << DCLK_VOPB_SEL_SHIFT |
+			     DCLK_VOPB_PLL_SEL_CPLL << DCLK_VOPB_PLL_SEL_SHIFT |
+			     (1 - 1) << DCLK_VOPB_DIV_SHIFT);
+		break;
+	default:
+		printf("do not support this vop freq\n");
+		return -EINVAL;
+	}
+
+	return hz;
+}
+
 static ulong px30_clk_get_rate(struct clk *clk)
 {
 	struct px30_clk_priv *priv = dev_get_priv(clk->dev);
@@ -482,6 +653,10 @@ static ulong px30_clk_get_rate(struct clk *clk)
 	case SCLK_SPI1:
 		rate = px30_spi_get_clk(priv->cru, clk->id);
 		break;
+	case ACLK_VOPB:
+	case DCLK_VOPB:
+		rate = px30_vop_get_clk(priv->cru, clk->id);
+		break;
 	default:
 		return -ENOENT;
 	}
@@ -521,6 +696,10 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_SPI1:
 		ret = px30_spi_set_clk(priv->cru, clk->id, rate);
 		break;
+	case ACLK_VOPB:
+	case DCLK_VOPB:
+		ret = px30_vop_set_clk(priv->cru, clk->id, rate);
+		break;
 	default:
 		return -ENOENT;
 	}

commit 77ecce68978fc975f8b6e821df5b0b2e278d826c
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Sun Feb 25 10:58:49 2018 +0800

    clk: rockchip: px30: Modify gpll to 1200MHz
    
    Change-Id: Ia853acdc1d6c7085712379680b6fb1ed6a5802d6
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_px30.h b/arch/arm/include/asm/arch-rockchip/cru_px30.h
index e39607591c..e459b9926c 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_px30.h
@@ -12,7 +12,7 @@
 #define OSC_HZ		(24 * MHz)
 
 #define APLL_HZ		(816 * MHz)
-#define GPLL_HZ		(600 * MHz)
+#define GPLL_HZ		(1200 * MHz)
 #define CPLL_HZ		(594 * MHz)
 
 #define CORE_PERI_HZ	204000000
diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 1f32fe9abd..5df3ba9d28 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -32,7 +32,7 @@ enum {
 	.refdiv = _refdiv,\
 	.fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ),\
 	.postdiv1 = _postdiv1, .postdiv2 = _postdiv2};
-static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 1, 4, 1);
+static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 1, 1, 1);
 
 static const struct pll_div apll_816_cfg = PLL_DIVISORS(816 * MHz, 1, 2, 1);
 static const struct pll_div apll_600_cfg = PLL_DIVISORS(600 * MHz, 1, 3, 1);

commit 2b34f30706ac2949afe455227500aabbf14ad01c
Author: Mark Yao <mark.yao@rock-chips.com>
Date:   Thu Nov 9 20:18:05 2017 +0800

    video/rockchip: vop: enable axi outstanding function
    
    On some scenes, win lite area may flush with short width.
    
    As the Technical Reference Manual description, need enable
    axi outstanding function if use IOMMU.
    
    From testing, after setting axi outstanding max number to 30
    solve windows flush problem.
    
    Change-Id: I7eb41b6169776260257a94177f84c04d37b604e5
    Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index 9868600bc0..7eb2276cec 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -239,9 +239,14 @@ static int rockchip_vop_init(struct display_state *state)
 	rockchip_vop_init_gamma(vop, state);
 
 	VOP_CTRL_SET(vop, global_regdone_en, 1);
+	VOP_CTRL_SET(vop, axi_outstanding_max_num, 30);
+	VOP_CTRL_SET(vop, axi_max_outstanding_en, 1);
 	VOP_CTRL_SET(vop, reg_done_frm, 1);
 	VOP_CTRL_SET(vop, win_gate[0], 1);
 	VOP_CTRL_SET(vop, win_gate[1], 1);
+	VOP_CTRL_SET(vop, win_channel[0], 0x12);
+	VOP_CTRL_SET(vop, win_channel[1], 0x34);
+	VOP_CTRL_SET(vop, win_channel[2], 0x56);
 	VOP_CTRL_SET(vop, dsp_blank, 0);
 
 	val = 0x8;
diff --git a/drivers/video/drm/rockchip_vop.h b/drivers/video/drm/rockchip_vop.h
index 86a691d5c1..5c3caded05 100644
--- a/drivers/video/drm/rockchip_vop.h
+++ b/drivers/video/drm/rockchip_vop.h
@@ -232,6 +232,8 @@ struct vop_reg {
 
 struct vop_ctrl {
 	struct vop_reg standby;
+	struct vop_reg axi_outstanding_max_num;
+	struct vop_reg axi_max_outstanding_en;
 	struct vop_reg htotal_pw;
 	struct vop_reg hact_st_end;
 	struct vop_reg vtotal_pw;
@@ -316,6 +318,9 @@ struct vop_ctrl {
 	struct vop_reg cabc_global_dn;
 	struct vop_reg cabc_calc_pixel_num;
 
+	struct vop_reg win_gate[4];
+	struct vop_reg win_channel[4];
+
 	/* BCSH */
 	struct vop_reg bcsh_brightness;
 	struct vop_reg bcsh_contrast;
@@ -345,7 +350,7 @@ struct vop_ctrl {
 	struct vop_reg mcu_type;
 	struct vop_reg mcu_rw_bypass_port;
 
-	struct vop_reg win_gate[4];
+
 	struct vop_reg cfg_done;
 };
 
diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index 90674020a9..57a94f0d9f 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -86,6 +86,8 @@ static const struct vop_win rk3288_win01_data = {
 
 static const struct vop_ctrl rk3288_ctrl_data = {
 	.standby = VOP_REG(RK3288_SYS_CTRL, 0x1, 22),
+	.axi_outstanding_max_num = VOP_REG(RK3288_SYS_CTRL1, 0x1f, 13),
+	.axi_max_outstanding_en = VOP_REG(RK3288_SYS_CTRL1, 0x1, 12),
 	.htotal_pw = VOP_REG(RK3288_DSP_HTOTAL_HS_END, 0x1fff1fff, 0),
 	.hact_st_end = VOP_REG(RK3288_DSP_HACT_ST_END, 0x1fff1fff, 0),
 	.vtotal_pw = VOP_REG(RK3288_DSP_VTOTAL_VS_END, 0x1fff1fff, 0),
@@ -132,6 +134,19 @@ static const struct vop_ctrl rk3288_ctrl_data = {
 	.update_gamma_lut = VOP_REG_VER(RK3288_DSP_CTRL1, 0x1, 7, 3, 5, -1),
 	.out_mode = VOP_REG(RK3288_DSP_CTRL0, 0xf, 0),
 
+	.bcsh_brightness = VOP_REG(RK3288_BCSH_BCS, 0xff, 0),
+	.bcsh_contrast = VOP_REG(RK3288_BCSH_BCS, 0x1ff, 8),
+	.bcsh_sat_con = VOP_REG(RK3288_BCSH_BCS, 0x3ff, 20),
+	.bcsh_out_mode = VOP_REG(RK3288_BCSH_BCS, 0x3, 0),
+	.bcsh_sin_hue = VOP_REG(RK3288_BCSH_H, 0x1ff, 0),
+	.bcsh_cos_hue = VOP_REG(RK3288_BCSH_H, 0x1ff, 16),
+	.bcsh_r2y_csc_mode = VOP_REG_VER(RK3368_BCSH_CTRL, 0x1, 6, 3, 1, -1),
+	.bcsh_r2y_en = VOP_REG_VER(RK3368_BCSH_CTRL, 0x1, 4, 3, 1, -1),
+	.bcsh_y2r_csc_mode = VOP_REG_VER(RK3368_BCSH_CTRL, 0x3, 2, 3, 1, -1),
+	.bcsh_y2r_en = VOP_REG_VER(RK3368_BCSH_CTRL, 0x1, 0, 3, 1, -1),
+	.bcsh_color_bar = VOP_REG(RK3288_BCSH_COLOR_BAR, 0xffffff, 8),
+	.bcsh_en = VOP_REG(RK3288_BCSH_COLOR_BAR, 0x1, 0),
+
 	.xmirror = VOP_REG(RK3288_DSP_CTRL0, 0x1, 22),
 	.ymirror = VOP_REG(RK3288_DSP_CTRL0, 0x1, 23),
 
@@ -209,6 +224,8 @@ const struct vop_data rk322x_vop = {
 
 static const struct vop_ctrl rk3328_ctrl_data = {
 	.standby = VOP_REG(RK3328_SYS_CTRL, 0x1, 22),
+	.axi_outstanding_max_num = VOP_REG(RK3328_SYS_CTRL1, 0x1f, 13),
+	.axi_max_outstanding_en = VOP_REG(RK3328_SYS_CTRL1, 0x1, 12),
 	.reg_done_frm = VOP_REG(RK3328_SYS_CTRL1, 0x1, 24),
 	.auto_gate_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 23),
 	.htotal_pw = VOP_REG(RK3328_DSP_HTOTAL_HS_END, 0x1fff1fff, 0),
@@ -272,6 +289,9 @@ static const struct vop_ctrl rk3328_ctrl_data = {
 	.bcsh_y2r_en = VOP_REG(RK3328_BCSH_CTRL, 0x1, 0),
 	.bcsh_color_bar = VOP_REG(RK3328_BCSH_COLOR_BAR, 0xffffff, 8),
 	.bcsh_en = VOP_REG(RK3328_BCSH_COLOR_BAR, 0x1, 0),
+	.win_channel[0] = VOP_REG_VER(RK3328_WIN0_CTRL2, 0xff, 0, 3, 8, 8),
+	.win_channel[1] = VOP_REG_VER(RK3328_WIN1_CTRL2, 0xff, 0, 3, 8, 8),
+	.win_channel[2] = VOP_REG_VER(RK3328_WIN2_CTRL2, 0xff, 0, 3, 8, 8),
 
 	.cfg_done = VOP_REG(RK3328_REG_CFG_DONE, 0x1, 0),
 };

commit 09b01f9e9fe244b340d4bc1861cacd6c5e8837de
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Thu Jan 25 10:20:03 2018 +0800

    drm/rockchip: vop: Support drm tve
    
    Change-Id: Ie32dda5e3c825d03bc5c864a6b346113196c484d
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index 2e85fd618c..9868600bc0 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -270,6 +270,19 @@ static int rockchip_vop_init(struct display_state *state)
 		VOP_CTRL_SET(vop, data01_swap,
 			!!(conn_state->output_type & ROCKCHIP_OUTPUT_DSI_DUAL_LINK));
 		break;
+	case DRM_MODE_CONNECTOR_TV:
+		if (vdisplay == CVBS_PAL_VDISPLAY)
+			VOP_CTRL_SET(vop, tve_sw_mode, 1);
+		else
+			VOP_CTRL_SET(vop, tve_sw_mode, 0);
+		VOP_CTRL_SET(vop, tve_dclk_pol, 1);
+		VOP_CTRL_SET(vop, tve_dclk_en, 1);
+		/* use the same pol reg with hdmi */
+		VOP_CTRL_SET(vop, hdmi_pin_pol, val);
+		VOP_CTRL_SET(vop, sw_genlock, 1);
+		VOP_CTRL_SET(vop, sw_uv_offset_en, 1);
+		VOP_CTRL_SET(vop, dither_up, 1);
+		break;
 	default:
 		printf("unsupport connector_type[%d]\n", conn_state->type);
 	}
diff --git a/drivers/video/drm/rockchip_vop.h b/drivers/video/drm/rockchip_vop.h
index d398d0d696..86a691d5c1 100644
--- a/drivers/video/drm/rockchip_vop.h
+++ b/drivers/video/drm/rockchip_vop.h
@@ -64,6 +64,8 @@
 #define VOP_WIN_GET(x, name) \
 		vop_read_reg(x, vop->win->offset, &vop->win->name)
 
+#define CVBS_PAL_VDISPLAY              288
+
 enum alpha_mode {
 	ALPHA_STRAIGHT,
 	ALPHA_INVERSE,
@@ -277,6 +279,13 @@ struct vop_ctrl {
 	struct vop_reg dither_up;
 	struct vop_reg dither_down;
 
+	struct vop_reg sw_dac_sel;
+	struct vop_reg tve_sw_mode;
+	struct vop_reg tve_dclk_pol;
+	struct vop_reg tve_dclk_en;
+	struct vop_reg sw_genlock;
+	struct vop_reg sw_uv_offset_en;
+
 	struct vop_reg dsp_out_yuv;
 	struct vop_reg dsp_data_swap;
 	struct vop_reg dsp_ccir656_avg;
diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index b2111713fc..90674020a9 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -235,6 +235,12 @@ static const struct vop_ctrl rk3328_ctrl_data = {
 	.hdmi_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 13),
 	.edp_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 14),
 	.mipi_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 15),
+	.tve_dclk_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 24),
+	.tve_dclk_pol = VOP_REG(RK3328_SYS_CTRL, 0x1, 25),
+	.tve_sw_mode = VOP_REG(RK3328_SYS_CTRL, 0x1, 26),
+	.sw_uv_offset_en  = VOP_REG(RK3328_SYS_CTRL, 0x1, 27),
+	.sw_genlock   = VOP_REG(RK3328_SYS_CTRL, 0x1, 28),
+	.sw_dac_sel = VOP_REG(RK3328_SYS_CTRL, 0x1, 29),
 	.rgb_pin_pol = VOP_REG(RK3328_DSP_CTRL1, 0xf, 16),
 	.hdmi_pin_pol = VOP_REG(RK3328_DSP_CTRL1, 0xf, 20),
 	.edp_pin_pol = VOP_REG(RK3328_DSP_CTRL1, 0xf, 24),

commit 44aac45b9111887edeaea11488540e2fffc2c770
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Tue Jan 30 20:04:52 2018 +0800

    drm/rockchip: correct rk3328 vop register config
    
    Change-Id: Iba808c60e783432cf69ed1e24c6aeace46f1e1bd
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index 3aea0d344e..b2111713fc 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -229,6 +229,7 @@ static const struct vop_ctrl rk3328_ctrl_data = {
 	.global_regdone_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 11),
 	.overlay_mode = VOP_REG(RK3328_SYS_CTRL, 0x1, 16),
 	.core_dclk_div = VOP_REG(RK3328_DSP_CTRL0, 0x1, 4),
+	.dclk_ddr = VOP_REG(RK3328_DSP_CTRL0, 0x1, 8),
 	.p2i_en = VOP_REG(RK3328_DSP_CTRL0, 0x1, 5),
 	.rgb_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 12),
 	.hdmi_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 13),

commit f11b858f2e763d7f2854c0bd0222aaa13cf38458
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Fri Jan 26 19:33:31 2018 +0800

    drm/rockchip: add more checkout mode
    
    check detail timing for the some resolution but different fps
    
    Change-Id: I103060aff3a64e9e285b5a5f87e71528cd053728
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    (Cherry pick from commit 335b9e52fbf97edb43c75bb1bc21dd10db5616bc)

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 04938360e4..70fd3fd25a 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -1086,6 +1086,8 @@ void rockchip_display_fixup(void *blob)
 		FDT_SET_U32("logo,ymirror", s->logo.ymirror);
 		FDT_SET_U32("video,hdisplay", s->conn_state.mode.hdisplay);
 		FDT_SET_U32("video,vdisplay", s->conn_state.mode.vdisplay);
+		FDT_SET_U32("video,crtc_hsync_end", s->conn_state.mode.crtc_hsync_end);
+		FDT_SET_U32("video,crtc_vsync_end", s->conn_state.mode.crtc_vsync_end);
 		FDT_SET_U32("video,vrefresh",
 			    drm_mode_vrefresh(&s->conn_state.mode));
 		FDT_SET_U32("video,flags", s->conn_state.mode.flags);

commit 8a2a3a29b6deb986d4d0fed46a5ce3639336de72
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Thu Jan 18 19:41:55 2018 +0800

    drm/rockchip: vop: add support overscan
    
    add vop post scale for some TV overscan
    
    Change-Id: I1f310d9d65a8a0ea2a0d3100954ef4ff0a587f4d
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    (Cherry pick from commit 68d08545b912610f63a3cdb0e1e13ca44b1abc1f)

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 4fc35cb1f2..04938360e4 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -981,6 +981,10 @@ static int rockchip_display_probe(struct udevice *dev)
 		s->conn_state.node = np_to_ofnode(cnt_node);
 		s->conn_state.dev = conn_dev;
 		s->conn_state.connector = conn;
+		s->conn_state.overscan.left_margin = 100;
+		s->conn_state.overscan.right_margin = 100;
+		s->conn_state.overscan.top_margin = 100;
+		s->conn_state.overscan.bottom_margin = 100;
 		s->crtc_state.node = np_to_ofnode(vop_node);
 		s->crtc_state.dev = crtc_dev;
 		s->crtc_state.crtc = crtc;
@@ -1084,6 +1088,11 @@ void rockchip_display_fixup(void *blob)
 		FDT_SET_U32("video,vdisplay", s->conn_state.mode.vdisplay);
 		FDT_SET_U32("video,vrefresh",
 			    drm_mode_vrefresh(&s->conn_state.mode));
+		FDT_SET_U32("video,flags", s->conn_state.mode.flags);
+		FDT_SET_U32("overscan,left_margin", s->conn_state.overscan.left_margin);
+		FDT_SET_U32("overscan,right_margin", s->conn_state.overscan.right_margin);
+		FDT_SET_U32("overscan,top_margin", s->conn_state.overscan.top_margin);
+		FDT_SET_U32("overscan,bottom_margin", s->conn_state.overscan.bottom_margin);
 #undef FDT_SET_U32
 	}
 }
diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index 949a543e41..2e85fd618c 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -132,6 +132,51 @@ static int rockchip_vop_init_gamma(struct vop *vop, struct display_state *state)
 	return 0;
 }
 
+static void vop_post_config(struct display_state *state, struct vop *vop)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct drm_display_mode *mode = &conn_state->mode;
+	u16 vtotal = mode->crtc_vtotal;
+	u16 hact_st = mode->crtc_htotal - mode->crtc_hsync_start;
+	u16 vact_st = mode->crtc_vtotal - mode->crtc_vsync_start;
+	u16 hdisplay = mode->crtc_hdisplay;
+	u16 vdisplay = mode->crtc_vdisplay;
+	u16 hsize = hdisplay * (conn_state->overscan.left_margin + conn_state->overscan.right_margin) / 200;
+	u16 vsize = vdisplay * (conn_state->overscan.top_margin + conn_state->overscan.bottom_margin) / 200;
+	u16 hact_end, vact_end;
+	u32 val;
+
+	if (mode->flags & DRM_MODE_FLAG_INTERLACE)
+		vsize = round_down(vsize, 2);
+
+	hact_st += hdisplay * (100 - conn_state->overscan.left_margin) / 200;
+	hact_end = hact_st + hsize;
+	val = hact_st << 16;
+	val |= hact_end;
+
+	VOP_CTRL_SET(vop, hpost_st_end, val);
+	vact_st += vdisplay * (100 - conn_state->overscan.top_margin) / 200;
+	vact_end = vact_st + vsize;
+	val = vact_st << 16;
+	val |= vact_end;
+	VOP_CTRL_SET(vop, vpost_st_end, val);
+	val = scl_cal_scale2(vdisplay, vsize) << 16;
+	val |= scl_cal_scale2(hdisplay, hsize);
+	VOP_CTRL_SET(vop, post_scl_factor, val);
+#define POST_HORIZONTAL_SCALEDOWN_EN(x)		((x) << 0)
+#define POST_VERTICAL_SCALEDOWN_EN(x)		((x) << 1)
+	VOP_CTRL_SET(vop, post_scl_ctrl,
+		     POST_HORIZONTAL_SCALEDOWN_EN(hdisplay != hsize) |
+		     POST_VERTICAL_SCALEDOWN_EN(vdisplay != vsize));
+	if (mode->flags & DRM_MODE_FLAG_INTERLACE) {
+		u16 vact_st_f1 = vtotal + vact_st + 1;
+		u16 vact_end_f1 = vact_st_f1 + vsize;
+
+		val = vact_st_f1 << 16 | vact_end_f1;
+		VOP_CTRL_SET(vop, vpost_st_end_f1, val);
+	}
+}
+
 static int rockchip_vop_init(struct display_state *state)
 {
 	struct crtc_state *crtc_state = &state->crtc_state;
@@ -312,34 +357,32 @@ static int rockchip_vop_init(struct display_state *state)
 	val = hact_st << 16;
 	val |= hact_end;
 	VOP_CTRL_SET(vop, hact_st_end, val);
-	VOP_CTRL_SET(vop, hpost_st_end, val);
 	val = vact_st << 16;
 	val |= vact_end;
 	VOP_CTRL_SET(vop, vact_st_end, val);
-	VOP_CTRL_SET(vop, vpost_st_end, val);
 	if (mode->flags & DRM_MODE_FLAG_INTERLACE) {
-			u16 vact_st_f1 = vtotal + vact_st + 1;
-			u16 vact_end_f1 = vact_st_f1 + vdisplay;
-
-			val = vact_st_f1 << 16 | vact_end_f1;
-			VOP_CTRL_SET(vop, vact_st_end_f1, val);
-			VOP_CTRL_SET(vop, vpost_st_end_f1, val);
-
-			val = vtotal << 16 | (vtotal + vsync_len);
-			VOP_CTRL_SET(vop, vs_st_end_f1, val);
-			VOP_CTRL_SET(vop, dsp_interlace, 1);
-			VOP_CTRL_SET(vop, p2i_en, 1);
-			vtotal += vtotal + 1;
+		u16 vact_st_f1 = vtotal + vact_st + 1;
+		u16 vact_end_f1 = vact_st_f1 + vdisplay;
+
+		val = vact_st_f1 << 16 | vact_end_f1;
+		VOP_CTRL_SET(vop, vact_st_end_f1, val);
+
+		val = vtotal << 16 | (vtotal + vsync_len);
+		VOP_CTRL_SET(vop, vs_st_end_f1, val);
+		VOP_CTRL_SET(vop, dsp_interlace, 1);
+		VOP_CTRL_SET(vop, p2i_en, 1);
+		vtotal += vtotal + 1;
 		act_end = vact_end_f1;
-		} else {
-			VOP_CTRL_SET(vop, dsp_interlace, 0);
-			VOP_CTRL_SET(vop, p2i_en, 0);
+	} else {
+		VOP_CTRL_SET(vop, dsp_interlace, 0);
+		VOP_CTRL_SET(vop, p2i_en, 0);
 		act_end = vact_end;
-		}
-		VOP_CTRL_SET(vop, vtotal_pw, (vtotal << 16) | vsync_len);
+	}
+	VOP_CTRL_SET(vop, vtotal_pw, (vtotal << 16) | vsync_len);
+	vop_post_config(state, vop);
+	VOP_CTRL_SET(vop, core_dclk_div,
+		     !!(mode->flags & DRM_MODE_FLAG_DBLCLK));
 
-		VOP_CTRL_SET(vop, core_dclk_div,
-					 !!(mode->flags & DRM_MODE_FLAG_DBLCLK));
 	VOP_CTRL_SET(vop, standby, 1);
 	VOP_LINE_FLAG_SET(vop, line_flag_num[0], act_end - 3);
 	VOP_LINE_FLAG_SET(vop, line_flag_num[1],

commit 960080c99d6933991578271b78b7f983ac7b4975
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Mon Feb 26 20:18:06 2018 +0800

    drm/rockchip: vop: line flag num config according to interlace
    
    when in interlace mode, the line flag should set to the second fild last
    line
    
    Change-Id: I1c3b6c19a31deb4a506d304b4abeeb5c2b6dd87d
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    (Cherry pick from commit f8e3a4d80aee7f93309f7cc04294de02295f97dd)

diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index c56ad4f8e5..949a543e41 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -151,7 +151,7 @@ static int rockchip_vop_init(struct display_state *state)
 	u16 vact_st = mode->crtc_vtotal - mode->crtc_vsync_start;
 	u16 vact_end = vact_st + vdisplay;
 	struct clk dclk, aclk;
-	u32 val;
+	u32 val, act_end;
 	int ret;
 	bool yuv_overlay = false, post_r2y_en = false, post_y2r_en = false;
 	u16 post_csc_mode;
@@ -330,18 +330,20 @@ static int rockchip_vop_init(struct display_state *state)
 			VOP_CTRL_SET(vop, dsp_interlace, 1);
 			VOP_CTRL_SET(vop, p2i_en, 1);
 			vtotal += vtotal + 1;
+		act_end = vact_end_f1;
 		} else {
 			VOP_CTRL_SET(vop, dsp_interlace, 0);
 			VOP_CTRL_SET(vop, p2i_en, 0);
+		act_end = vact_end;
 		}
 		VOP_CTRL_SET(vop, vtotal_pw, (vtotal << 16) | vsync_len);
 
 		VOP_CTRL_SET(vop, core_dclk_div,
 					 !!(mode->flags & DRM_MODE_FLAG_DBLCLK));
 	VOP_CTRL_SET(vop, standby, 1);
-	VOP_LINE_FLAG_SET(vop, line_flag_num[0], vact_end - 3);
+	VOP_LINE_FLAG_SET(vop, line_flag_num[0], act_end - 3);
 	VOP_LINE_FLAG_SET(vop, line_flag_num[1],
-			  vact_end - us_to_vertical_line(mode, 1000));
+			  act_end - us_to_vertical_line(mode, 1000));
 	vop_cfg_done(vop);
 
 	return 0;

commit b014f33558b8cc05a3a77f1e8f70cbe5088931d6
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Mon Feb 26 20:12:32 2018 +0800

    drm/rockchip: display: add overscan config for hdmi or tv output
    
    This will be used to config overscan for tv output.
    
    Change-Id: I2fec3f0a1493243212d88fc97f8e9a9d8701bf8c
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    (Cherry pick from commit 3a393d0378474a59d8046b418eefaa6df6947235)

diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index 6219c35aac..e050695fe2 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -72,6 +72,13 @@ struct panel_state {
 	void *private;
 };
 
+struct overscan {
+	int left_margin;
+	int right_margin;
+	int top_margin;
+	int bottom_margin;
+};
+
 struct connector_state {
 	struct udevice *dev;
 	const struct rockchip_connector *connector;
@@ -84,6 +91,7 @@ struct connector_state {
 	void *phy_private;
 
 	struct drm_display_mode mode;
+	struct overscan overscan;
 	u8 edid[EDID_SIZE * 4];
 	int bus_format;
 	int output_mode;

commit b0dbe9a090143011abb4ef33fb8fec12b9108ef5
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Tue Jan 16 11:06:21 2018 +0800

    drm/rockchip: rk3328 vop: set frame effect when in interlace mode
    
    This will improve display quality for P in i output.
    
    Change-Id: If34b8879a41ea10ce756c1feebc2e9df64183261
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    (Cherry pick from commit 99096b14d61a9ef456745e1ffcb036d38bdda008)

diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index c9e1567afc..c56ad4f8e5 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -194,6 +194,7 @@ static int rockchip_vop_init(struct display_state *state)
 	rockchip_vop_init_gamma(vop, state);
 
 	VOP_CTRL_SET(vop, global_regdone_en, 1);
+	VOP_CTRL_SET(vop, reg_done_frm, 1);
 	VOP_CTRL_SET(vop, win_gate[0], 1);
 	VOP_CTRL_SET(vop, win_gate[1], 1);
 	VOP_CTRL_SET(vop, dsp_blank, 0);
diff --git a/drivers/video/drm/rockchip_vop.h b/drivers/video/drm/rockchip_vop.h
index f0f7a211b5..d398d0d696 100644
--- a/drivers/video/drm/rockchip_vop.h
+++ b/drivers/video/drm/rockchip_vop.h
@@ -320,6 +320,7 @@ struct vop_ctrl {
 	struct vop_reg bcsh_color_bar;
 	struct vop_reg bcsh_out_mode;
 	struct vop_reg bcsh_en;
+	struct vop_reg reg_done_frm;
 
 	/* MCU OUTPUT */
 	struct vop_reg mcu_pix_total;
diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index 9a184612ea..3aea0d344e 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -209,6 +209,7 @@ const struct vop_data rk322x_vop = {
 
 static const struct vop_ctrl rk3328_ctrl_data = {
 	.standby = VOP_REG(RK3328_SYS_CTRL, 0x1, 22),
+	.reg_done_frm = VOP_REG(RK3328_SYS_CTRL1, 0x1, 24),
 	.auto_gate_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 23),
 	.htotal_pw = VOP_REG(RK3328_DSP_HTOTAL_HS_END, 0x1fff1fff, 0),
 	.hact_st_end = VOP_REG(RK3328_DSP_HACT_ST_END, 0x1fff1fff, 0),

commit ccd843b9282db92599458856d2ff6d000cea6573
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Wed Dec 13 19:35:59 2017 +0800

    drm/rockchip: add support interlace mode output
    
    add interlace timing config for hdmi/cvbs interlace output mode
    
    Change-Id: Ic0bb06667a5c56d81f5229b7ef87baef9e0e5f32
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    (Cherry pick from commit 3452c2ff12f80f249bc54d28bc3c52d089f76a8a)

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 192ea8b3b2..4fc35cb1f2 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -311,6 +311,87 @@ static int display_get_timing_from_dts(struct panel_state *panel_state,
 	return 0;
 }
 
+/**
+ * drm_mode_set_crtcinfo - set CRTC modesetting timing parameters
+ * @p: mode
+ * @adjust_flags: a combination of adjustment flags
+ *
+ * Setup the CRTC modesetting timing parameters for @p, adjusting if necessary.
+ *
+ * - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of
+ *   interlaced modes.
+ * - The CRTC_STEREO_DOUBLE flag can be used to compute the timings for
+ *   buffers containing two eyes (only adjust the timings when needed, eg. for
+ *   "frame packing" or "side by side full").
+ * - The CRTC_NO_DBLSCAN and CRTC_NO_VSCAN flags request that adjustment *not*
+ *   be performed for doublescan and vscan > 1 modes respectively.
+ */
+void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags)
+{
+	if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN))
+		return;
+
+	if (p->flags & DRM_MODE_FLAG_DBLCLK)
+		p->crtc_clock = 2 * p->clock;
+	else
+		p->crtc_clock = p->clock;
+	p->crtc_hdisplay = p->hdisplay;
+	p->crtc_hsync_start = p->hsync_start;
+	p->crtc_hsync_end = p->hsync_end;
+	p->crtc_htotal = p->htotal;
+	p->crtc_hskew = p->hskew;
+	p->crtc_vdisplay = p->vdisplay;
+	p->crtc_vsync_start = p->vsync_start;
+	p->crtc_vsync_end = p->vsync_end;
+	p->crtc_vtotal = p->vtotal;
+
+	if (p->flags & DRM_MODE_FLAG_INTERLACE) {
+		if (adjust_flags & CRTC_INTERLACE_HALVE_V) {
+			p->crtc_vdisplay /= 2;
+			p->crtc_vsync_start /= 2;
+			p->crtc_vsync_end /= 2;
+			p->crtc_vtotal /= 2;
+		}
+	}
+
+	if (!(adjust_flags & CRTC_NO_DBLSCAN)) {
+		if (p->flags & DRM_MODE_FLAG_DBLSCAN) {
+			p->crtc_vdisplay *= 2;
+			p->crtc_vsync_start *= 2;
+			p->crtc_vsync_end *= 2;
+			p->crtc_vtotal *= 2;
+		}
+	}
+
+	if (!(adjust_flags & CRTC_NO_VSCAN)) {
+		if (p->vscan > 1) {
+			p->crtc_vdisplay *= p->vscan;
+			p->crtc_vsync_start *= p->vscan;
+			p->crtc_vsync_end *= p->vscan;
+			p->crtc_vtotal *= p->vscan;
+		}
+	}
+
+	if (adjust_flags & CRTC_STEREO_DOUBLE) {
+		unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK;
+
+		switch (layout) {
+		case DRM_MODE_FLAG_3D_FRAME_PACKING:
+			p->crtc_clock *= 2;
+			p->crtc_vdisplay += p->crtc_vtotal;
+			p->crtc_vsync_start += p->crtc_vtotal;
+			p->crtc_vsync_end += p->crtc_vtotal;
+			p->crtc_vtotal += p->crtc_vtotal;
+			break;
+		}
+	}
+
+	p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay);
+	p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal);
+	p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay);
+	p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal);
+}
+
 static int display_get_timing(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
@@ -372,6 +453,7 @@ static int display_init(struct display_state *state)
 	struct crtc_state *crtc_state = &state->crtc_state;
 	const struct rockchip_crtc *crtc = crtc_state->crtc;
 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
+	struct drm_display_mode *mode = &conn_state->mode;
 	int ret = 0;
 
 	if (state->is_init)
@@ -405,6 +487,7 @@ static int display_init(struct display_state *state)
 		if (ret)
 			goto deinit;
 	}
+	drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
 
 	if (crtc_funcs->init) {
 		ret = crtc_funcs->init(state);
diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index cfdf184640..c9e1567afc 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -140,15 +140,15 @@ static int rockchip_vop_init(struct display_state *state)
 	const struct rockchip_crtc *crtc = crtc_state->crtc;
 	const struct vop_data *vop_data = crtc->data;
 	struct vop *vop;
-	u16 hsync_len = mode->hsync_end - mode->hsync_start;
-	u16 hdisplay = mode->hdisplay;
-	u16 htotal = mode->htotal;
-	u16 hact_st = mode->htotal - mode->hsync_start;
+	u16 hsync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
+	u16 hdisplay = mode->crtc_hdisplay;
+	u16 htotal = mode->crtc_htotal;
+	u16 hact_st = mode->crtc_htotal - mode->crtc_hsync_start;
 	u16 hact_end = hact_st + hdisplay;
-	u16 vdisplay = mode->vdisplay;
-	u16 vtotal = mode->vtotal;
-	u16 vsync_len = mode->vsync_end - mode->vsync_start;
-	u16 vact_st = mode->vtotal - mode->vsync_start;
+	u16 vdisplay = mode->crtc_vdisplay;
+	u16 vtotal = mode->crtc_vtotal;
+	u16 vsync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
+	u16 vact_st = mode->crtc_vtotal - mode->crtc_vsync_start;
 	u16 vact_end = vact_st + vdisplay;
 	struct clk dclk, aclk;
 	u32 val;
@@ -312,11 +312,31 @@ static int rockchip_vop_init(struct display_state *state)
 	val |= hact_end;
 	VOP_CTRL_SET(vop, hact_st_end, val);
 	VOP_CTRL_SET(vop, hpost_st_end, val);
-	VOP_CTRL_SET(vop, vtotal_pw, (vtotal << 16) | vsync_len);
 	val = vact_st << 16;
 	val |= vact_end;
 	VOP_CTRL_SET(vop, vact_st_end, val);
 	VOP_CTRL_SET(vop, vpost_st_end, val);
+	if (mode->flags & DRM_MODE_FLAG_INTERLACE) {
+			u16 vact_st_f1 = vtotal + vact_st + 1;
+			u16 vact_end_f1 = vact_st_f1 + vdisplay;
+
+			val = vact_st_f1 << 16 | vact_end_f1;
+			VOP_CTRL_SET(vop, vact_st_end_f1, val);
+			VOP_CTRL_SET(vop, vpost_st_end_f1, val);
+
+			val = vtotal << 16 | (vtotal + vsync_len);
+			VOP_CTRL_SET(vop, vs_st_end_f1, val);
+			VOP_CTRL_SET(vop, dsp_interlace, 1);
+			VOP_CTRL_SET(vop, p2i_en, 1);
+			vtotal += vtotal + 1;
+		} else {
+			VOP_CTRL_SET(vop, dsp_interlace, 0);
+			VOP_CTRL_SET(vop, p2i_en, 0);
+		}
+		VOP_CTRL_SET(vop, vtotal_pw, (vtotal << 16) | vsync_len);
+
+		VOP_CTRL_SET(vop, core_dclk_div,
+					 !!(mode->flags & DRM_MODE_FLAG_DBLCLK));
 	VOP_CTRL_SET(vop, standby, 1);
 	VOP_LINE_FLAG_SET(vop, line_flag_num[0], vact_end - 3);
 	VOP_LINE_FLAG_SET(vop, line_flag_num[1],
diff --git a/include/drm_modes.h b/include/drm_modes.h
index e77f3a6bbc..78cfcdc2b6 100644
--- a/include/drm_modes.h
+++ b/include/drm_modes.h
@@ -7,13 +7,18 @@
 #ifndef _DRM_MODES_H
 #define _DRM_MODES_H
 
-#define DRM_MODE_TYPE_BUILTIN	BIT(0)
-#define DRM_MODE_TYPE_CLOCK_C	(BIT(1) | DRM_MODE_TYPE_BUILTIN)
-#define DRM_MODE_TYPE_CRTC_C	(BIT(2) | DRM_MODE_TYPE_BUILTIN)
-#define DRM_MODE_TYPE_PREFERRED	BIT(3)
-#define DRM_MODE_TYPE_DEFAULT	BIT(4)
-#define DRM_MODE_TYPE_USERDEF	BIT(5)
-#define DRM_MODE_TYPE_DRIVER	BIT(6)
+#define DRM_DISPLAY_INFO_LEN	32
+#define DRM_CONNECTOR_NAME_LEN	32
+#define DRM_DISPLAY_MODE_LEN	32
+#define DRM_PROP_NAME_LEN	32
+
+#define DRM_MODE_TYPE_BUILTIN	(1<<0)
+#define DRM_MODE_TYPE_CLOCK_C	((1<<1) | DRM_MODE_TYPE_BUILTIN)
+#define DRM_MODE_TYPE_CRTC_C	((1<<2) | DRM_MODE_TYPE_BUILTIN)
+#define DRM_MODE_TYPE_PREFERRED	(1<<3)
+#define DRM_MODE_TYPE_DEFAULT	(1<<4)
+#define DRM_MODE_TYPE_USERDEF	(1<<5)
+#define DRM_MODE_TYPE_DRIVER	(1<<6)
 
 /* Video mode flags */
 /* bit compatible with the xorg definitions. */
@@ -114,6 +119,14 @@ enum v4l2_colorspace {
 	V4L2_COLORSPACE_DCI_P3        = 12,
 };
 
+#define CRTC_INTERLACE_HALVE_V	(1 << 0) /* halve V values for interlacing */
+#define CRTC_STEREO_DOUBLE	(1 << 1) /* adjust timings for stereo modes */
+#define CRTC_NO_DBLSCAN		(1 << 2) /* don't adjust doublescan */
+#define CRTC_NO_VSCAN		(1 << 3) /* don't adjust doublescan */
+#define CRTC_STEREO_DOUBLE_ONLY	(CRTC_STEREO_DOUBLE | CRTC_NO_DBLSCAN | CRTC_NO_VSCAN)
+
+#define DRM_MODE_FLAG_3D_MAX	DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF
+
 struct drm_display_mode {
 	/* Proposed mode values */
 	int clock;		/* in kHz */
@@ -129,6 +142,23 @@ struct drm_display_mode {
 	int vscan;
 	unsigned int flags;
 	int picture_aspect_ratio;
+	int hskew;
+	unsigned int type;
+	/* Actual mode we give to hw */
+	int crtc_clock;         /* in KHz */
+	int crtc_hdisplay;
+	int crtc_hblank_start;
+	int crtc_hblank_end;
+	int crtc_hsync_start;
+	int crtc_hsync_end;
+	int crtc_htotal;
+	int crtc_hskew;
+	int crtc_vdisplay;
+	int crtc_vblank_start;
+	int crtc_vblank_end;
+	int crtc_vsync_start;
+	int crtc_vsync_end;
+	int crtc_vtotal;
 };
 
 #endif

commit 79feefb1157f4035aaedc183e6039cb3401c756e
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Mon Feb 26 19:49:43 2018 +0800

    video/rockchip: vop:  add support CSC function for HDMI YUV output
    
    add CSC config for YUV output mode
    
    Change-Id: I9b53c3b3bdc0fc1a733897474c126042d17c3ac9
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    (Cherry-pick from commit 34d6280a1ae02cc3c98aa8e6d32151b37fd849c6)

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index 7c0073147f..406257ee3a 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -961,6 +961,7 @@ static int rockchip_dw_mipi_dsi_init(struct display_state *state)
 	dsi->node = mipi_node;
 	conn_state->private = dsi;
 	conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
+	conn_state->color_space = V4L2_COLORSPACE_DEFAULT;
 
 	panel = dev_read_subnode(conn_state->dev, "panel");
 	if (!ofnode_valid(panel)) {
diff --git a/drivers/video/drm/rockchip_analogix_dp.c b/drivers/video/drm/rockchip_analogix_dp.c
index da7b1a0495..b86863ec3f 100644
--- a/drivers/video/drm/rockchip_analogix_dp.c
+++ b/drivers/video/drm/rockchip_analogix_dp.c
@@ -883,6 +883,7 @@ static int rockchip_analogix_dp_init(struct display_state *state)
 	conn_state->private = dp;
 	conn_state->type = DRM_MODE_CONNECTOR_eDP;
 	conn_state->output_mode = ROCKCHIP_OUT_MODE_AAAA;
+	conn_state->color_space = V4L2_COLORSPACE_DEFAULT;
 
 #if 0
 	if (pdata->chip_type == RK3399_EDP) {
diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index 0ddab1c355..6219c35aac 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -35,6 +35,9 @@ enum display_mode {
 #define ROCKCHIP_OUT_MODE_P888	0
 #define ROCKCHIP_OUT_MODE_P666	1
 #define ROCKCHIP_OUT_MODE_P565	2
+#define ROCKCHIP_OUT_MODE_S888		8
+#define ROCKCHIP_OUT_MODE_S888_DUMMY	12
+#define ROCKCHIP_OUT_MODE_YUV420	14
 /* for use special outface */
 #define ROCKCHIP_OUT_MODE_AAAA	15
 
@@ -86,6 +89,7 @@ struct connector_state {
 	int output_mode;
 	int type;
 	int output_type;
+	int color_space;
 
 	struct {
 		u32 *lut;
diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index 86617e8524..21c5c05a16 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -642,6 +642,7 @@ static int rockchip_lvds_init(struct display_state *state)
 		conn_state->output_mode = ROCKCHIP_OUT_MODE_P666;
 	else
 		conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
+	conn_state->color_space = V4L2_COLORSPACE_DEFAULT;
 
 	return 0;
 }
diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index 8ad5c0c005..cfdf184640 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -30,6 +30,56 @@ static inline int us_to_vertical_line(struct drm_display_mode *mode, int us)
 	return us * mode->clock / mode->htotal / 1000;
 }
 
+static int to_vop_csc_mode(int csc_mode)
+{
+	switch (csc_mode) {
+	case V4L2_COLORSPACE_SMPTE170M:
+		return CSC_BT601L;
+	case V4L2_COLORSPACE_REC709:
+	case V4L2_COLORSPACE_DEFAULT:
+		return CSC_BT709L;
+	case V4L2_COLORSPACE_JPEG:
+		return CSC_BT601F;
+	case V4L2_COLORSPACE_BT2020:
+		return CSC_BT2020;
+	default:
+		return CSC_BT709L;
+	}
+}
+
+static bool is_yuv_output(uint32_t bus_format)
+{
+	switch (bus_format) {
+	case MEDIA_BUS_FMT_YUV8_1X24:
+	case MEDIA_BUS_FMT_YUV10_1X30:
+	case MEDIA_BUS_FMT_UYYVYY8_0_5X24:
+	case MEDIA_BUS_FMT_UYYVYY10_0_5X30:
+		return true;
+	default:
+		return false;
+	}
+}
+
+static bool is_uv_swap(uint32_t bus_format, uint32_t output_mode)
+{
+	/*
+	 * FIXME:
+	 *
+	 * There is no media type for YUV444 output,
+	 * so when out_mode is AAAA or P888, assume output is YUV444 on
+	 * yuv format.
+	 *
+	 * From H/W testing, YUV444 mode need a rb swap.
+	 */
+	if ((bus_format == MEDIA_BUS_FMT_YUV8_1X24 ||
+	     bus_format == MEDIA_BUS_FMT_YUV10_1X30) &&
+	    (output_mode == ROCKCHIP_OUT_MODE_AAAA ||
+	     output_mode == ROCKCHIP_OUT_MODE_P888))
+		return true;
+	else
+		return false;
+}
+
 static int rockchip_vop_init_gamma(struct vop *vop, struct display_state *state)
 {
 	struct crtc_state *crtc_state = &state->crtc_state;
@@ -103,6 +153,8 @@ static int rockchip_vop_init(struct display_state *state)
 	struct clk dclk, aclk;
 	u32 val;
 	int ret;
+	bool yuv_overlay = false, post_r2y_en = false, post_y2r_en = false;
+	u16 post_csc_mode;
 
 	vop = malloc(sizeof(*vop));
 	if (!vop)
@@ -188,6 +240,14 @@ static int rockchip_vop_init(struct display_state *state)
 	case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
 		val = DITHER_DOWN_EN(1) | DITHER_DOWN_MODE(RGB888_TO_RGB666);
 		break;
+	case MEDIA_BUS_FMT_YUV8_1X24:
+	case MEDIA_BUS_FMT_UYYVYY8_0_5X24:
+		val = DITHER_DOWN_EN(0) | PRE_DITHER_DOWN_EN(1);
+		break;
+	case MEDIA_BUS_FMT_YUV10_1X30:
+	case MEDIA_BUS_FMT_UYYVYY10_0_5X30:
+		val = DITHER_DOWN_EN(0) | PRE_DITHER_DOWN_EN(0);
+		break;
 	case MEDIA_BUS_FMT_RGB888_1X24:
 	default:
 		val = DITHER_DOWN_EN(0) | PRE_DITHER_DOWN_EN(0);
@@ -200,7 +260,53 @@ static int rockchip_vop_init(struct display_state *state)
 	val |= DITHER_DOWN_MODE_SEL(DITHER_DOWN_ALLEGRO);
 	VOP_CTRL_SET(vop, dither_down, val);
 
+	VOP_CTRL_SET(vop, dclk_ddr,
+		     conn_state->output_mode == ROCKCHIP_OUT_MODE_YUV420 ? 1 : 0);
+	VOP_CTRL_SET(vop, hdmi_dclk_out_en,
+		     conn_state->output_mode == ROCKCHIP_OUT_MODE_YUV420 ? 1 : 0);
+
+	if (is_uv_swap(conn_state->bus_format, conn_state->output_mode))
+		VOP_CTRL_SET(vop, dsp_data_swap, DSP_RB_SWAP);
+	else
+		VOP_CTRL_SET(vop, dsp_data_swap, 0);
+
 	VOP_CTRL_SET(vop, out_mode, conn_state->output_mode);
+
+	if (VOP_CTRL_SUPPORT(vop, overlay_mode)) {
+		yuv_overlay = is_yuv_output(conn_state->bus_format);
+		VOP_CTRL_SET(vop, overlay_mode, yuv_overlay);
+	}
+	/*
+	 * todo: r2y for win csc
+	 */
+	VOP_CTRL_SET(vop, dsp_out_yuv, is_yuv_output(conn_state->bus_format));
+
+	if (yuv_overlay) {
+		if (!is_yuv_output(conn_state->bus_format))
+			post_y2r_en = true;
+	} else {
+		if (is_yuv_output(conn_state->bus_format))
+			post_r2y_en = true;
+	}
+
+	post_csc_mode = to_vop_csc_mode(conn_state->color_space);
+	VOP_CTRL_SET(vop, bcsh_r2y_en, post_r2y_en);
+	VOP_CTRL_SET(vop, bcsh_y2r_en, post_y2r_en);
+	VOP_CTRL_SET(vop, bcsh_r2y_csc_mode, post_csc_mode);
+	VOP_CTRL_SET(vop, bcsh_y2r_csc_mode, post_csc_mode);
+
+	/*
+	 * Background color is 10bit depth if vop version >= 3.5
+	 */
+	if (!is_yuv_output(conn_state->bus_format))
+		val = 0;
+	else if (VOP_MAJOR(vop->version) == 3 &&
+		 VOP_MINOR(vop->version) >= 5)
+		val = 0x20010200;
+	else
+		val = 0x801080;
+	VOP_CTRL_SET(vop, dsp_background, val);
+
 	VOP_CTRL_SET(vop, htotal_pw, (htotal << 16) | hsync_len);
 	val = hact_st << 16;
 	val |= hact_end;
diff --git a/drivers/video/drm/rockchip_vop.h b/drivers/video/drm/rockchip_vop.h
index 8b2d3ffc4e..f0f7a211b5 100644
--- a/drivers/video/drm/rockchip_vop.h
+++ b/drivers/video/drm/rockchip_vop.h
@@ -128,6 +128,18 @@ enum dither_down_mode_sel {
 	DITHER_DOWN_FRC = 0x1
 };
 
+enum vop_csc_format {
+	CSC_BT601L,
+	CSC_BT709L,
+	CSC_BT601F,
+	CSC_BT2020,
+};
+
+#define DSP_BG_SWAP		0x1
+#define DSP_RB_SWAP		0x2
+#define DSP_RG_SWAP		0x4
+#define DSP_DELTA_SWAP		0x8
+
 #define PRE_DITHER_DOWN_EN(x)	((x) << 0)
 #define DITHER_DOWN_EN(x)	((x) << 1)
 #define DITHER_DOWN_MODE(x)	((x) << 2)
@@ -238,6 +250,7 @@ struct vop_ctrl {
 	struct vop_reg core_dclk_div;
 	struct vop_reg dclk_ddr;
 	struct vop_reg p2i_en;
+	struct vop_reg hdmi_dclk_out_en;
 	struct vop_reg rgb_en;
 	struct vop_reg lvds_en;
 	struct vop_reg edp_en;
diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index c3a054485d..9a184612ea 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -219,6 +219,9 @@ static const struct vop_ctrl rk3328_ctrl_data = {
 	.hpost_st_end = VOP_REG(RK3328_POST_DSP_HACT_INFO, 0x1fff1fff, 0),
 	.vpost_st_end = VOP_REG(RK3328_POST_DSP_VACT_INFO, 0x1fff1fff, 0),
 	.vpost_st_end_f1 = VOP_REG(RK3328_POST_DSP_VACT_INFO_F1, 0x1fff1fff, 0),
+	.post_scl_factor = VOP_REG(RK3328_POST_SCL_FACTOR_YRGB, 0xffffffff, 0),
+	.post_scl_ctrl = VOP_REG(RK3328_POST_SCL_CTRL, 0x3, 0),
+	.dsp_out_yuv = VOP_REG(RK3328_POST_SCL_CTRL, 0x1, 2),
 	.dsp_interlace = VOP_REG(RK3328_DSP_CTRL0, 0x1, 10),
 	.dsp_layer_sel = VOP_REG(RK3328_DSP_CTRL1, 0xff, 8),
 	.post_lb_mode = VOP_REG(RK3328_SYS_CTRL, 0x1, 18),
@@ -249,6 +252,19 @@ static const struct vop_ctrl rk3328_ctrl_data = {
 
 	.dsp_background = VOP_REG(RK3328_DSP_BG, 0xffffffff, 0),
 
+	.bcsh_brightness = VOP_REG(RK3328_BCSH_BCS, 0xff, 0),
+	.bcsh_contrast = VOP_REG(RK3328_BCSH_BCS, 0x1ff, 8),
+	.bcsh_sat_con = VOP_REG(RK3328_BCSH_BCS, 0x3ff, 20),
+	.bcsh_out_mode = VOP_REG(RK3328_BCSH_BCS, 0x3, 30),
+	.bcsh_sin_hue = VOP_REG(RK3328_BCSH_H, 0x1ff, 0),
+	.bcsh_cos_hue = VOP_REG(RK3328_BCSH_H, 0x1ff, 16),
+	.bcsh_r2y_csc_mode = VOP_REG(RK3328_BCSH_CTRL, 0x3, 6),
+	.bcsh_r2y_en = VOP_REG(RK3328_BCSH_CTRL, 0x1, 4),
+	.bcsh_y2r_csc_mode = VOP_REG(RK3328_BCSH_CTRL, 0x3, 2),
+	.bcsh_y2r_en = VOP_REG(RK3328_BCSH_CTRL, 0x1, 0),
+	.bcsh_color_bar = VOP_REG(RK3328_BCSH_COLOR_BAR, 0xffffff, 8),
+	.bcsh_en = VOP_REG(RK3328_BCSH_COLOR_BAR, 0x1, 0),
+
 	.cfg_done = VOP_REG(RK3328_REG_CFG_DONE, 0x1, 0),
 };
 
diff --git a/drivers/video/drm/rockchip_vop_reg.h b/drivers/video/drm/rockchip_vop_reg.h
index 70d76bb59f..675616240e 100644
--- a/drivers/video/drm/rockchip_vop_reg.h
+++ b/drivers/video/drm/rockchip_vop_reg.h
@@ -112,6 +112,10 @@
 #define RK3288_DSP_VACT_ST_END			0x0194
 #define RK3288_DSP_VS_ST_END_F1			0x0198
 #define RK3288_DSP_VACT_ST_END_F1		0x019c
+
+#define RK3288_BCSH_COLOR_BAR			0x01b0
+#define RK3288_BCSH_BCS				0x01b4
+#define RK3288_BCSH_H				0x01b8
 /* register definition end */
 
 /* rk3368 register definition */
diff --git a/include/drm_modes.h b/include/drm_modes.h
index bc8d569f63..e77f3a6bbc 100644
--- a/include/drm_modes.h
+++ b/include/drm_modes.h
@@ -56,6 +56,64 @@
 #define DRM_EDID_PT_STEREO         (1 << 5)
 #define DRM_EDID_PT_INTERLACED     (1 << 7)
 
+/* see also http://vektor.theorem.ca/graphics/ycbcr/ */
+enum v4l2_colorspace {
+	/*
+	 * Default colorspace, i.e. let the driver figure it out.
+	 * Can only be used with video capture.
+	 */
+	V4L2_COLORSPACE_DEFAULT       = 0,
+
+	/* SMPTE 170M: used for broadcast NTSC/PAL SDTV */
+	V4L2_COLORSPACE_SMPTE170M     = 1,
+
+	/* Obsolete pre-1998 SMPTE 240M HDTV standard, superseded by Rec 709 */
+	V4L2_COLORSPACE_SMPTE240M     = 2,
+
+	/* Rec.709: used for HDTV */
+	V4L2_COLORSPACE_REC709        = 3,
+
+	/*
+	 * Deprecated, do not use. No driver will ever return this. This was
+	 * based on a misunderstanding of the bt878 datasheet.
+	 */
+	V4L2_COLORSPACE_BT878         = 4,
+
+	/*
+	 * NTSC 1953 colorspace. This only makes sense when dealing with
+	 * really, really old NTSC recordings. Superseded by SMPTE 170M.
+	 */
+	V4L2_COLORSPACE_470_SYSTEM_M  = 5,
+
+	/*
+	 * EBU Tech 3213 PAL/SECAM colorspace. This only makes sense when
+	 * dealing with really old PAL/SECAM recordings. Superseded by
+	 * SMPTE 170M.
+	 */
+	V4L2_COLORSPACE_470_SYSTEM_BG = 6,
+
+	/*
+	 * Effectively shorthand for V4L2_COLORSPACE_SRGB, V4L2_YCBCR_ENC_601
+	 * and V4L2_QUANTIZATION_FULL_RANGE. To be used for (Motion-)JPEG.
+	 */
+	V4L2_COLORSPACE_JPEG          = 7,
+
+	/* For RGB colorspaces such as produces by most webcams. */
+	V4L2_COLORSPACE_SRGB          = 8,
+
+	/* AdobeRGB colorspace */
+	V4L2_COLORSPACE_ADOBERGB      = 9,
+
+	/* BT.2020 colorspace, used for UHDTV. */
+	V4L2_COLORSPACE_BT2020        = 10,
+
+	/* Raw colorspace: for RAW unprocessed images */
+	V4L2_COLORSPACE_RAW           = 11,
+
+	/* DCI-P3 colorspace, used by cinema projectors */
+	V4L2_COLORSPACE_DCI_P3        = 12,
+};
+
 struct drm_display_mode {
 	/* Proposed mode values */
 	int clock;		/* in kHz */

commit 7130fbf68d11caadbe9f99cff39bb55b9aface94
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Fri Feb 2 10:55:38 2018 +0800

    drm/rockchip: vop: add support px30
    
    PX30 have two vop(vopb and vopl), the vopb have win0, win1 and win2,
    the vopl only have win1,most of register define is same with rk3366,
    so we porting the rk3366 vop register define for px30.
    
    win0: support yuv and scale;
    win1: support rgbx and afbdc format(vopb only);
    win2: support rgbx and four region;
    
    Change-Id: Ib9b796516e2bd43d98c79d5d3226a9e167739f76
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_crtc.c b/drivers/video/drm/rockchip_crtc.c
index 45d827a9ab..350c0fa24b 100644
--- a/drivers/video/drm/rockchip_crtc.c
+++ b/drivers/video/drm/rockchip_crtc.c
@@ -22,6 +22,16 @@ static const struct rockchip_crtc rk3036_vop_data = {
 	.data = &rk3036_vop,
 };
 
+static const struct rockchip_crtc px30_vop_lit_data = {
+	.funcs = &rockchip_vop_funcs,
+	.data = &px30_vop_lit,
+};
+
+static const struct rockchip_crtc px30_vop_big_data = {
+	.funcs = &rockchip_vop_funcs,
+	.data = &px30_vop_big,
+};
+
 static const struct rockchip_crtc rk3288_vop_data = {
 	.funcs = &rockchip_vop_funcs,
 	.data = &rk3288_vop,
@@ -64,6 +74,12 @@ static const struct udevice_id rockchip_vop_ids[] = {
 	}, {
 		.compatible = "rockchip,rk3126-vop",
 		.data = (ulong)&rk3036_vop_data,
+	}, {
+		.compatible = "rockchip,px30-vop-lit",
+		.data = (ulong)&px30_vop_lit_data,
+	}, {
+		.compatible = "rockchip,px30-vop-big",
+		.data = (ulong)&px30_vop_big_data,
 	}, {
 		.compatible = "rockchip,rk3288-vop",
 		.data = (ulong)&rk3288_vop_data,
diff --git a/drivers/video/drm/rockchip_crtc.h b/drivers/video/drm/rockchip_crtc.h
index 087a84cd98..7d23f7d1c4 100644
--- a/drivers/video/drm/rockchip_crtc.h
+++ b/drivers/video/drm/rockchip_crtc.h
@@ -26,6 +26,8 @@ struct rockchip_crtc_funcs {
 struct vop_data;
 extern const struct rockchip_crtc_funcs rockchip_vop_funcs;
 extern const struct vop_data rk3036_vop;
+extern const struct vop_data px30_vop_lit;
+extern const struct vop_data px30_vop_big;
 extern const struct vop_data rk3288_vop;
 extern const struct vop_data rk3368_vop;
 extern const struct vop_data rk3366_vop;
diff --git a/drivers/video/drm/rockchip_vop.h b/drivers/video/drm/rockchip_vop.h
index 387632ea75..8b2d3ffc4e 100644
--- a/drivers/video/drm/rockchip_vop.h
+++ b/drivers/video/drm/rockchip_vop.h
@@ -239,17 +239,26 @@ struct vop_ctrl {
 	struct vop_reg dclk_ddr;
 	struct vop_reg p2i_en;
 	struct vop_reg rgb_en;
+	struct vop_reg lvds_en;
 	struct vop_reg edp_en;
 	struct vop_reg hdmi_en;
 	struct vop_reg mipi_en;
 	struct vop_reg data01_swap;
 	struct vop_reg mipi_dual_channel_en;
 	struct vop_reg dp_en;
+	struct vop_reg dclk_pol;
 	struct vop_reg pin_pol;
+	struct vop_reg rgb_dclk_pol;
 	struct vop_reg rgb_pin_pol;
+	struct vop_reg lvds_dclk_pol;
+	struct vop_reg lvds_pin_pol;
+	struct vop_reg hdmi_dclk_pol;
 	struct vop_reg hdmi_pin_pol;
+	struct vop_reg edp_dclk_pol;
 	struct vop_reg edp_pin_pol;
+	struct vop_reg mipi_dclk_pol;
 	struct vop_reg mipi_pin_pol;
+	struct vop_reg dp_dclk_pol;
 	struct vop_reg dp_pin_pol;
 
 	struct vop_reg dither_up;
@@ -270,6 +279,49 @@ struct vop_ctrl {
 	struct vop_reg ymirror;
 	struct vop_reg dsp_background;
 
+	/* CABC */
+	struct vop_reg cabc_total_num;
+	struct vop_reg cabc_config_mode;
+	struct vop_reg cabc_stage_up_mode;
+	struct vop_reg cabc_scale_cfg_value;
+	struct vop_reg cabc_scale_cfg_enable;
+	struct vop_reg cabc_global_dn_limit_en;
+	struct vop_reg cabc_lut_en;
+	struct vop_reg cabc_en;
+	struct vop_reg cabc_handle_en;
+	struct vop_reg cabc_stage_up;
+	struct vop_reg cabc_stage_down;
+	struct vop_reg cabc_global_dn;
+	struct vop_reg cabc_calc_pixel_num;
+
+	/* BCSH */
+	struct vop_reg bcsh_brightness;
+	struct vop_reg bcsh_contrast;
+	struct vop_reg bcsh_sat_con;
+	struct vop_reg bcsh_sin_hue;
+	struct vop_reg bcsh_cos_hue;
+	struct vop_reg bcsh_r2y_csc_mode;
+	struct vop_reg bcsh_r2y_en;
+	struct vop_reg bcsh_y2r_csc_mode;
+	struct vop_reg bcsh_y2r_en;
+	struct vop_reg bcsh_color_bar;
+	struct vop_reg bcsh_out_mode;
+	struct vop_reg bcsh_en;
+
+	/* MCU OUTPUT */
+	struct vop_reg mcu_pix_total;
+	struct vop_reg mcu_cs_pst;
+	struct vop_reg mcu_cs_pend;
+	struct vop_reg mcu_rw_pst;
+	struct vop_reg mcu_rw_pend;
+	struct vop_reg mcu_clk_sel;
+	struct vop_reg mcu_hold_mode;
+	struct vop_reg mcu_frame_st;
+	struct vop_reg mcu_rs;
+	struct vop_reg mcu_bypass;
+	struct vop_reg mcu_type;
+	struct vop_reg mcu_rw_bypass_port;
+
 	struct vop_reg win_gate[4];
 	struct vop_reg cfg_done;
 };
diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index 057448c51c..c3a054485d 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -315,3 +315,126 @@ const struct vop_data rk3036_vop = {
 	.line_flag = &rk3036_vop_line_flag,
 	.reg_len = RK3036_DSP_VACT_ST_END_F1 * 4,
 };
+
+static const struct vop_scl_regs rk3366_lit_win_scl = {
+	.scale_yrgb_x = VOP_REG(RK3366_LIT_WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0),
+	.scale_yrgb_y = VOP_REG(RK3366_LIT_WIN0_SCL_FACTOR_YRGB, 0xffff, 16),
+	.scale_cbcr_x = VOP_REG(RK3366_LIT_WIN0_SCL_FACTOR_CBR, 0xffff, 0x0),
+	.scale_cbcr_y = VOP_REG(RK3366_LIT_WIN0_SCL_FACTOR_CBR, 0xffff, 16),
+};
+
+static const struct vop_win rk3366_win0_data = {
+	.scl = &rk3366_lit_win_scl,
+
+	.enable = VOP_REG(RK3366_LIT_WIN0_CTRL0, 0x1, 0),
+	.format = VOP_REG(RK3366_LIT_WIN0_CTRL0, 0x7, 1),
+	.rb_swap = VOP_REG(RK3366_LIT_WIN0_CTRL0, 0x1, 12),
+	.act_info = VOP_REG(RK3366_LIT_WIN0_ACT_INFO, 0xffffffff, 0),
+	.dsp_info = VOP_REG(RK3366_LIT_WIN0_DSP_INFO, 0xffffffff, 0),
+	.dsp_st = VOP_REG(RK3366_LIT_WIN0_DSP_ST, 0xffffffff, 0),
+	.yrgb_mst = VOP_REG(RK3366_LIT_WIN0_YRGB_MST0, 0xffffffff, 0),
+	.uv_mst = VOP_REG(RK3366_LIT_WIN0_CBR_MST0, 0xffffffff, 0),
+	.yrgb_vir = VOP_REG(RK3366_LIT_WIN0_VIR, 0x1fff, 0),
+	.uv_vir = VOP_REG(RK3366_LIT_WIN0_VIR, 0x1fff, 16),
+
+	.alpha_mode = VOP_REG(RK3366_LIT_WIN0_ALPHA_CTRL, 0x1, 1),
+	.alpha_en = VOP_REG(RK3366_LIT_WIN0_ALPHA_CTRL, 0x1, 0),
+};
+
+static const struct vop_win rk3366_win1_data = {
+	.enable = VOP_REG(RK3366_LIT_WIN1_CTRL0, 0x1, 0),
+	.format = VOP_REG(RK3366_LIT_WIN1_CTRL0, 0x7, 4),
+	.rb_swap = VOP_REG(RK3366_LIT_WIN1_CTRL0, 0x1, 12),
+	.dsp_info = VOP_REG(RK3366_LIT_WIN1_DSP_INFO, 0xffffffff, 0),
+	.dsp_st = VOP_REG(RK3366_LIT_WIN1_DSP_ST, 0xffffffff, 0),
+	.yrgb_mst = VOP_REG(RK3366_LIT_WIN1_MST, 0xffffffff, 0),
+	.yrgb_vir = VOP_REG(RK3366_LIT_WIN1_VIR, 0x1fff, 0),
+
+	.alpha_mode = VOP_REG(RK3366_LIT_WIN1_ALPHA_CTRL, 0x1, 1),
+	.alpha_en = VOP_REG(RK3366_LIT_WIN1_ALPHA_CTRL, 0x1, 0),
+};
+
+static const struct vop_ctrl px30_ctrl_data = {
+	.standby = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 1),
+	.htotal_pw = VOP_REG(RK3366_LIT_DSP_HTOTAL_HS_END, 0x0fff0fff, 0),
+	.hact_st_end = VOP_REG(RK3366_LIT_DSP_HACT_ST_END, 0x0fff0fff, 0),
+	.vtotal_pw = VOP_REG(RK3366_LIT_DSP_VTOTAL_VS_END, 0x0fff0fff, 0),
+	.vact_st_end = VOP_REG(RK3366_LIT_DSP_VACT_ST_END, 0x0fff0fff, 0),
+	.vact_st_end_f1 = VOP_REG(RK3366_LIT_DSP_VACT_ST_END_F1, 0x0fff0fff, 0),
+	.vs_st_end_f1 = VOP_REG(RK3366_LIT_DSP_VS_ST_END_F1, 0x0fff0fff, 0),
+	.dsp_interlace = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 0),
+	.global_regdone_en = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 13),
+	.auto_gate_en = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 0),
+	.dsp_layer_sel = VOP_REG(RK3366_LIT_DSP_CTRL2, 0xf, 22),
+	.overlay_mode = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 4),
+	.core_dclk_div = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 13),
+	.dclk_ddr = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 14),
+	.rgb_en = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 0),
+	.rgb_pin_pol = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x7, 2),
+	.hdmi_en = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 8),
+	.hdmi_pin_pol = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x7, 10),
+	.lvds_en = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 16),
+	.lvds_pin_pol = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x7, 18),
+	.mipi_en = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 24),
+	.mipi_pin_pol = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x7, 26),
+	.mipi_dclk_pol = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 25),
+	.lvds_dclk_pol = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 17),
+	.hdmi_dclk_pol = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 9),
+	.rgb_dclk_pol = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 1),
+	.dither_up = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 2),
+	.dither_down = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x7, 6),
+	.dsp_data_swap = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1f, 9),
+	.dsp_ccir656_avg = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 5),
+	.dsp_black = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 15),
+	.dsp_blank = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 14),
+	.dsp_outzero = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 3),
+	.dsp_lut_en = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 5),
+	.out_mode = VOP_REG(RK3366_LIT_DSP_CTRL2, 0xf, 16),
+	.dsp_background = VOP_REG(RK3366_LIT_DSP_BG, 0x00ffffff, 0),
+	.cfg_done = VOP_REG(RK3366_LIT_REG_CFG_DONE, 0x1, 0),
+
+	.bcsh_en = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x1, 0),
+	.bcsh_r2y_csc_mode = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x1, 1),
+	.bcsh_out_mode = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x3, 2),
+	.bcsh_y2r_csc_mode = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x3, 4),
+	.bcsh_y2r_en = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x1, 6),
+	.bcsh_r2y_en = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x1, 7),
+	.bcsh_color_bar = VOP_REG(RK3366_LIT_BCSH_COL_BAR, 0xffffff, 0),
+	.bcsh_brightness = VOP_REG(RK3366_LIT_BCSH_BCS, 0xff, 0),
+	.bcsh_contrast = VOP_REG(RK3366_LIT_BCSH_BCS, 0x1ff, 8),
+	.bcsh_sat_con = VOP_REG(RK3366_LIT_BCSH_BCS, 0x3ff, 20),
+	.bcsh_sin_hue = VOP_REG(RK3366_LIT_BCSH_H, 0x1ff, 0),
+	.bcsh_cos_hue = VOP_REG(RK3366_LIT_BCSH_H, 0x1ff, 16),
+
+	.cabc_config_mode = VOP_REG(PX30_CABC_CTRL0, 0x3, 2),
+	.cabc_calc_pixel_num = VOP_REG(PX30_CABC_CTRL0, 0x7fffff, 4),
+	.cabc_handle_en = VOP_REG(PX30_CABC_CTRL0, 0x1, 1),
+	.cabc_en = VOP_REG(PX30_CABC_CTRL0, 0x1, 0),
+	.cabc_total_num = VOP_REG(PX30_CABC_CTRL1, 0x7fffff, 4),
+	.cabc_lut_en = VOP_REG(PX30_CABC_CTRL1, 0x1, 0),
+	.cabc_stage_up_mode = VOP_REG(PX30_CABC_CTRL2, 0x1, 19),
+	.cabc_stage_up = VOP_REG(PX30_CABC_CTRL2, 0x1ff, 8),
+	.cabc_stage_down = VOP_REG(PX30_CABC_CTRL2, 0xff, 0),
+	.cabc_global_dn = VOP_REG(PX30_CABC_CTRL3, 0xff, 0),
+	.cabc_global_dn_limit_en = VOP_REG(PX30_CABC_CTRL3, 0x1, 8),
+};
+
+static const struct vop_line_flag rk3366_vop_lite_line_flag = {
+	.line_flag_num[0] = VOP_REG(RK3366_LIT_LINE_FLAG, 0xfff, 0),
+};
+
+const struct vop_data px30_vop_lit = {
+	.version = VOP_VERSION(2, 5),
+	.ctrl = &px30_ctrl_data,
+	.win = &rk3366_win1_data,
+	.line_flag = &rk3366_vop_lite_line_flag,
+	.reg_len = RK3366_LIT_FRC_LOWER01_0 * 4,
+};
+
+const struct vop_data px30_vop_big = {
+	.version = VOP_VERSION(2, 6),
+	.ctrl = &px30_ctrl_data,
+	.win = &rk3366_win0_data,
+	.line_flag = &rk3366_vop_lite_line_flag,
+	.reg_len = RK3366_LIT_FRC_LOWER01_0 * 4,
+};
diff --git a/drivers/video/drm/rockchip_vop_reg.h b/drivers/video/drm/rockchip_vop_reg.h
index ed0c22e21e..70d76bb59f 100644
--- a/drivers/video/drm/rockchip_vop_reg.h
+++ b/drivers/video/drm/rockchip_vop_reg.h
@@ -869,4 +869,87 @@
 #define RK3036_HWC_LUT_ADDR		0x800
 /* rk3036 register definition end */
 
+/* rk3366 register definition */
+#define RK3366_LIT_REG_CFG_DONE			0x00000
+#define RK3366_LIT_VERSION			0x00004
+#define RK3366_LIT_DSP_BG			0x00008
+#define RK3366_LIT_MCU_CTRL			0x0000c
+#define RK3366_LIT_SYS_CTRL0			0x00010
+#define RK3366_LIT_SYS_CTRL1			0x00014
+#define RK3366_LIT_SYS_CTRL2			0x00018
+#define RK3366_LIT_DSP_CTRL0			0x00020
+#define RK3366_LIT_DSP_CTRL2			0x00028
+#define RK3366_LIT_VOP_STATUS			0x0002c
+#define RK3366_LIT_LINE_FLAG			0x00030
+#define RK3366_LIT_INTR_EN			0x00034
+#define RK3366_LIT_INTR_CLEAR			0x00038
+#define RK3366_LIT_INTR_STATUS			0x0003c
+#define RK3366_LIT_WIN0_CTRL0			0x00050
+#define RK3366_LIT_WIN0_CTRL1			0x00054
+#define RK3366_LIT_WIN0_COLOR_KEY		0x00058
+#define RK3366_LIT_WIN0_VIR			0x0005c
+#define RK3366_LIT_WIN0_YRGB_MST0		0x00060
+#define RK3366_LIT_WIN0_CBR_MST0		0x00064
+#define RK3366_LIT_WIN0_ACT_INFO		0x00068
+#define RK3366_LIT_WIN0_DSP_INFO		0x0006c
+#define RK3366_LIT_WIN0_DSP_ST			0x00070
+#define RK3366_LIT_WIN0_SCL_FACTOR_YRGB		0x00074
+#define RK3366_LIT_WIN0_SCL_FACTOR_CBR		0x00078
+#define RK3366_LIT_WIN0_SCL_OFFSET		0x0007c
+#define RK3366_LIT_WIN0_ALPHA_CTRL		0x00080
+#define RK3366_LIT_WIN1_CTRL0			0x00090
+#define RK3366_LIT_WIN1_CTRL1			0x00094
+#define RK3366_LIT_WIN1_VIR			0x00098
+#define RK3366_LIT_WIN1_MST			0x000a0
+#define RK3366_LIT_WIN1_DSP_INFO		0x000a4
+#define RK3366_LIT_WIN1_DSP_ST			0x000a8
+#define RK3366_LIT_WIN1_COLOR_KEY		0x000ac
+#define RK3366_LIT_WIN1_ALPHA_CTRL		0x000bc
+#define RK3366_LIT_HWC_CTRL0			0x000e0
+#define RK3366_LIT_HWC_CTRL1			0x000e4
+#define RK3366_LIT_HWC_MST			0x000e8
+#define RK3366_LIT_HWC_DSP_ST			0x000ec
+#define RK3366_LIT_HWC_ALPHA_CTRL		0x000f0
+#define RK3366_LIT_DSP_HTOTAL_HS_END		0x00100
+#define RK3366_LIT_DSP_HACT_ST_END		0x00104
+#define RK3366_LIT_DSP_VTOTAL_VS_END		0x00108
+#define RK3366_LIT_DSP_VACT_ST_END		0x0010c
+#define RK3366_LIT_DSP_VS_ST_END_F1		0x00110
+#define RK3366_LIT_DSP_VACT_ST_END_F1		0x00114
+#define RK3366_LIT_BCSH_CTRL			0x00160
+#define RK3366_LIT_BCSH_COL_BAR			0x00164
+#define RK3366_LIT_BCSH_BCS			0x00168
+#define RK3366_LIT_BCSH_H			0x0016c
+#define RK3366_LIT_FRC_LOWER01_0		0x00170
+#define RK3366_LIT_FRC_LOWER01_1		0x00174
+#define RK3366_LIT_FRC_LOWER10_0		0x00178
+#define RK3366_LIT_FRC_LOWER10_1		0x0017c
+#define RK3366_LIT_FRC_LOWER11_0		0x00180
+#define RK3366_LIT_FRC_LOWER11_1		0x00184
+#define RK3366_LIT_MCU_RW_BYPASS_PORT		0x0018c
+#define RK3366_LIT_DBG_REG_000			0x00190
+#define RK3366_LIT_BLANKING_VALUE		0x001f4
+#define RK3366_LIT_FLAG_REG_FRM_VALID		0x001f8
+#define RK3366_LIT_FLAG_REG			0x001fc
+#define RK3366_LIT_HWC_LUT_ADDR			0x00600
+#define RK3366_LIT_GAMMA_LUT_ADDR		0x00a00
+/* rk3366 register definition end */
+
+/* px30 register definition */
+#define PX30_CABC_CTRL0				0x00200
+#define PX30_CABC_CTRL1				0x00204
+#define PX30_CABC_CTRL2				0x00208
+#define PX30_CABC_CTRL3				0x0020c
+#define PX30_CABC_GAUSS_LINE0_0			0x00210
+#define PX30_CABC_GAUSS_LINE0_1			0x00214
+#define PX30_CABC_GAUSS_LINE1_0			0x00218
+#define PX30_CABC_GAUSS_LINE1_1			0x0021c
+#define PX30_CABC_GAUSS_LINE2_0			0x00220
+#define PX30_CABC_GAUSS_LINE2_1			0x00224
+#define PX30_AFBCD0_CTRL			0x00240
+#define PX30_AFBCD0_HDR_PTR			0x00244
+#define PX30_AFBCD0_PIC_SIZE			0x00248
+#define PX30_AFBCD0_PIC_OFFSET			0x0024c
+#define PX30_AFBCD0_AXI_CTRL			0x00250
+/* px30 register definition end */
 #endif /* _ROCKCHIP_VOP_REG_H */

commit 55e9fafcca1bb04365c89b9a045ed5ee485ed630
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sun Feb 25 18:17:51 2018 +0800

    core: do not fail in device_probe() when clk set default fail
    
    Assigned clocks are widely used in kernel, but not in U-Boot yet,
    many U-Boot clock driver do not have the API while dts port from kernel
    have "assigned-clocks" node.
    
    Just give a warning now instead of a device probe fail.
    
    Change-Id: Icc1da8bdd1a21d6d118e37d305bd7909758c40b2
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/core/device.c b/drivers/core/device.c
index 9d58f44ee1..b68b277bd8 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -407,7 +407,7 @@ int device_probe(struct udevice *dev)
 	/* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
 	ret = clk_set_defaults(dev);
 	if (ret)
-		goto fail;
+		debug("%s clk_set_defaults failed %d\n", __func__, ret);
 
 	if (drv->probe) {
 		ret = drv->probe(dev);

commit b15a08dd6889c72736c1a0c01f0e739e73c0ec38
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Feb 26 10:07:31 2018 +0800

    configs: rockchip: enable display for evb-px30
    
    Change-Id: I982c253ecc7f5e6ddbdf9cad459c9f59e720fb60
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index f1bd27e663..167c1a928b 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -72,6 +72,15 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Rockchip"
 CONFIG_G_DNL_VENDOR_NUM=0x2207
 CONFIG_G_DNL_PRODUCT_NUM=0x330d
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_DISPLAY_ROCKCHIP_MIPI=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_DRM_ROCKCHIP_LVDS=y
+CONFIG_DRM_ROCKCHIP_PANEL=y
+CONFIG_DRM_ROCKCHIP_DSI_PANEL=y
+CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
diff --git a/include/configs/evb_px30.h b/include/configs/evb_px30.h
index 836f60f546..b54fb7fd9c 100644
--- a/include/configs/evb_px30.h
+++ b/include/configs/evb_px30.h
@@ -11,7 +11,11 @@
 
 #define CONFIG_SYS_MMC_ENV_DEV 0
 
+#define ROCKCHIP_DEVICE_SETTINGS \
+		"stdout=serial,vidconsole\0" \
+		"stderr=serial,vidconsole\0"
 
+#undef CONFIG_CONSOLE_SCROLL_LINES
 #define CONFIG_CONSOLE_SCROLL_LINES		10
 
 #undef CONFIG_BOOTCOMMAND
diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index 6c9676181d..e8fadc6646 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -60,6 +60,7 @@
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	ENV_MEM_LAYOUT_SETTINGS \
 	"partitions=" PARTS_DEFAULT \
+	ROCKCHIP_DEVICE_SETTINGS \
 	BOOTENV
 
 #endif

commit 1e44acfc6902837d129e4265cff6a8af3e49b1b6
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Feb 26 10:14:27 2018 +0800

    video/drm: display: check route_* status
    
    Change-Id: I2154678dc200f453b1dd9af624c3c616b9871a5d
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 127390fb96..192ea8b3b2 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -85,10 +85,9 @@ static struct udevice *get_panel_device(struct display_state *state, ofnode conn
 
 	node = dev_read_subnode(conn_state->dev, "panel");
 	if (ofnode_valid(node) &&
-	    of_device_is_available(ofnode_to_np(node))){
+	    of_device_is_available(ofnode_to_np(node))) {
 		ret = uclass_get_device_by_ofnode(UCLASS_PANEL, node, &dev);
-		if(!ret) {
-			printf("%s get panel dev\n", __func__);
+		if (!ret) {
 			panel_state->node = node;
 			return dev;
 		}
@@ -122,12 +121,10 @@ static struct udevice *get_panel_device(struct display_state *state, ofnode conn
 			ret = uclass_get_device_by_ofnode(UCLASS_PANEL,
 							  np_to_ofnode(panel),
 							  &dev);
-			if (ret) {
-				printf("Warn: can't find panel drv %d\n", ret);
-				continue;
+			if (!ret) {
+				panel_state->node = np_to_ofnode(panel);
+				return dev;
 			}
-			panel_state->node = np_to_ofnode(panel);
-			return dev;
 		}
 	}
 
@@ -144,9 +141,10 @@ static int connector_phy_init(struct display_state *state)
 	ret = uclass_get_device_by_phandle(UCLASS_PHY, conn_state->dev, "phys",
 					   &dev);
 	if (ret) {
-		printf("Warn: can't find phy driver\n");
+		debug("Warn: can't find phy driver\n");
 		return 0;
 	}
+
 	phy = (const struct rockchip_phy *)dev_get_driver_data(dev);
 	if (!phy) {
 		printf("failed to find phy driver\n");
@@ -197,10 +195,13 @@ static int connector_panel_init(struct display_state *state)
 		printf("failed to init panel driver\n");
 		return ret;
 	}
+
 	dsp_lut_node = dev_read_subnode(dev, "dsp-lut");
 	if (!ofnode_valid(dsp_lut_node)) {
-		printf("%s can not find dsp-lut node\n", __func__);
+		debug("%s can not find dsp-lut node\n", __func__);
+		return 0;
 	}
+
 	ofnode_get_property(dsp_lut_node, "gamma-lut", &len);
 	if (len > 0) {
 		conn_state->gamma.size = len / sizeof(u32);
@@ -817,7 +818,9 @@ static int rockchip_display_probe(struct udevice *dev)
 	if (!ofnode_valid(route_node))
 		return -ENODEV;
 
-	ofnode_for_each_subnode(node, route_node){
+	ofnode_for_each_subnode(node, route_node) {
+		if (!ofnode_is_available(node))
+			continue;
 		phandle = ofnode_read_u32_default(node, "connect", -1);
 		if (phandle < 0) {
 			printf("Warn: can't find connect node's handle\n");

commit 38efbccc2d92b96a9ea7d23b77179646714e5ba9
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Feb 26 10:10:08 2018 +0800

    video/drm: panel_simple: correct delay name
    
    Change-Id: I3df8e20cac2176b0f739128ff7c7a7856c8e39d3
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/panel_simple.c b/drivers/video/drm/panel_simple.c
index 6eb77b0c1c..d577d33ebd 100644
--- a/drivers/video/drm/panel_simple.c
+++ b/drivers/video/drm/panel_simple.c
@@ -135,13 +135,13 @@ static int panel_simple_parse_dt(const void *blob, ofnode node,
 
 	panel->power_invert = !!ofnode_read_s32_default(node, "power_invert", 0);
 
-	panel->delay_prepare = ofnode_read_s32_default(node, "delay,prepare", 0);
-	panel->delay_unprepare = ofnode_read_s32_default(node, "delay,unprepare", 0);
-	panel->delay_enable = ofnode_read_s32_default(node, "delay,enable", 0);
-	panel->delay_disable = ofnode_read_s32_default(node, "delay,disable", 0);
+	panel->delay_prepare = ofnode_read_s32_default(node, "prepare-delay-ms", 0);
+	panel->delay_unprepare = ofnode_read_s32_default(node, "unprepare-delay-ms", 0);
+	panel->delay_enable = ofnode_read_s32_default(node, "enable-delay-ms", 0);
+	panel->delay_disable = ofnode_read_s32_default(node, "disable-delay-ms", 0);
 	panel->bus_format = ofnode_read_s32_default(node, "bus-format", MEDIA_BUS_FMT_RBG888_1X24);
 
-	printf("delay prepare[%d] unprepare[%d] enable[%d] disable[%d]\n",
+	debug("delay prepare[%d] unprepare[%d] enable[%d] disable[%d]\n",
 	       panel->delay_prepare, panel->delay_unprepare,
 	       panel->delay_enable, panel->delay_disable);
 

commit 30d6d4339c76deca140c9b76ebf18444c1c8be06
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Feb 2 14:39:12 2018 +0800

    video/drm: lvds: Add support for PX30
    
    Change-Id: I3ba982a42dad00014db4ce432843ca026023360d
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_connector.h b/drivers/video/drm/rockchip_connector.h
index 9720d26ea4..1ed54647c5 100644
--- a/drivers/video/drm/rockchip_connector.h
+++ b/drivers/video/drm/rockchip_connector.h
@@ -73,10 +73,4 @@ extern const struct rockchip_dp_chip_data rk3399_analogix_edp_drv_data;
 extern const struct rockchip_dp_chip_data rk3368_analogix_edp_drv_data;
 extern const struct rockchip_dp_chip_data rk3288_analogix_dp_drv_data;
 #endif
-#ifdef CONFIG_DRM_ROCKCHIP_LVDS
-struct rockchip_lvds_chip_data;
-extern const struct rockchip_connector_funcs rockchip_lvds_funcs;
-extern const struct rockchip_lvds_chip_data rk3368_lvds_drv_data;
-extern const struct rockchip_lvds_chip_data rk3288_lvds_drv_data;
-#endif
 #endif
diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index cc4bbff1e0..86617e8524 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -12,6 +12,7 @@
 #include <linux/list.h>
 #include <linux/ioport.h>
 #include <asm/io.h>
+#include <asm/hardware.h>
 #include <dm/device.h>
 #include <dm/read.h>
 #include <dm/ofnode.h>
@@ -25,9 +26,10 @@
 #include "rockchip_lvds.h"
 
 enum rockchip_lvds_sub_devtype {
+	PX30_LVDS,
+	RK3126_LVDS,
 	RK3288_LVDS,
 	RK3368_LVDS,
-	RK3126_LVDS,
 };
 
 struct rockchip_lvds_chip_data {
@@ -131,28 +133,6 @@ static int rockchip_lvds_clk_enable(struct rockchip_lvds_device *lvds)
 	return 0;
 }
 
-const struct rockchip_lvds_chip_data rk3126_lvds_drv_data = {
-	.chip_type = RK3126_LVDS,
-	.grf_soc_con7  = RK3126_GRF_LVDS_CON0,
-	.grf_soc_con15 = RK3126_GRF_CON1,
-	.has_vop_sel = true,
-};
-
-const struct rockchip_lvds_chip_data rk3368_lvds_drv_data = {
-	.chip_type = RK3368_LVDS,
-	.grf_soc_con7  = RK3368_GRF_SOC_CON7,
-	.grf_soc_con15 = RK3368_GRF_SOC_CON15,
-	.has_vop_sel = false,
-};
-
-const struct rockchip_lvds_chip_data rk3288_lvds_drv_data = {
-	.chip_type = RK3288_LVDS,
-	.has_vop_sel = true,
-	.grf_soc_con6 = 0x025c,
-	.grf_soc_con7 = 0x0260,
-	.grf_gpio1d_iomux = 0x000c,
-};
-
 static int rk336x_lvds_pwr_off(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
@@ -230,6 +210,51 @@ static int rk336x_lvds_pwr_on(struct display_state *state)
 	return 0;
 }
 
+static void px30_output_ttl(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct rockchip_lvds_device *lvds = conn_state->private;
+	u32 val = 0;
+	int ret;
+
+	ret = dev_read_stringlist_search(conn_state->dev, "pinctrl-names", "m0");
+	if (ret < 0) {
+		/* iomux to lcdcm1 */
+		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3A_IOMUX_L, 0x000f, 0x0001);
+		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3A_IOMUX_H, 0x0f0f, 0x0101);
+		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3B_IOMUX_L, 0xff00, 0x1100);
+		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3B_IOMUX_H, 0x00f0, 0x0010);
+		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3C_IOMUX_L, 0xffff, 0x1111);
+		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3C_IOMUX_H, 0xffff, 0x1111);
+		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3D_IOMUX_L, 0xffff, 0x1111);
+	} else {
+		/* iomux to lcdcm0 */
+		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3A_IOMUX_L, 0xffff, 0x1111);
+		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3A_IOMUX_H, 0xffff, 0x1111);
+		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3B_IOMUX_L, 0xffff, 0x1111);
+		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3B_IOMUX_H, 0xffff, 0x1111);
+		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3C_IOMUX_L, 0xffff, 0x1111);
+		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3C_IOMUX_H, 0xffff, 0x1111);
+		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3D_IOMUX_L, 0xffff, 0x1111);
+		return;
+	}
+
+	/* enable lvds mode */
+	val = PX30_LVDS_PHY_MODE(0) | PX30_DPHY_FORCERXMODE(1);
+	writel(val, lvds->grf + PX30_GRF_PD_VO_CON1);
+
+	/* enable lane */
+	lvds_writel(lvds, MIPIPHY_REG0, 0x7f);
+	val = v_LANE0_EN(1) | v_LANE1_EN(1) | v_LANE2_EN(1) | v_LANE3_EN(1) |
+		v_LANECLK_EN(1) | v_PLL_PWR_OFF(1);
+	lvds_writel(lvds, MIPIPHY_REGEB, val);
+	/* set ttl mode and reset phy config */
+	val = v_LVDS_MODE_EN(0) | v_TTL_MODE_EN(1) | v_MIPI_MODE_EN(0) |
+		v_MSB_SEL(1) | v_DIG_INTER_RST(1);
+	lvds_writel(lvds, MIPIPHY_REGE0, val);
+	rk336x_lvds_pwr_on(state);
+}
+
 static void rk3126_output_ttl(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
@@ -312,6 +337,38 @@ static void rk336x_output_ttl(struct display_state *state)
 	rk336x_lvds_pwr_on(state);
 }
 
+static void px30_output_lvds(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct rockchip_lvds_device *lvds = conn_state->private;
+	u32 val = 0;
+
+	/* enable lvds mode */
+	val = PX30_LVDS_PHY_MODE(1) | PX30_DPHY_FORCERXMODE(1);
+	/* config lvds_format */
+	val |= PX30_LVDS_OUTPUT_FORMAT(lvds->format);
+	/* LSB receive mode */
+	val |= PX30_LVDS_MSBSEL(LVDS_MSB_D7);
+	writel(val, lvds->grf + PX30_GRF_PD_VO_CON1);
+
+	/* digital internal disable */
+	lvds_msk_reg(lvds, MIPIPHY_REGE1, m_DIG_INTER_EN, v_DIG_INTER_EN(0));
+
+	/* set pll prediv and fbdiv */
+	lvds_writel(lvds, MIPIPHY_REG3, v_PREDIV(2) | v_FBDIV_MSB(0));
+	lvds_writel(lvds, MIPIPHY_REG4, v_FBDIV_LSB(28));
+
+	lvds_writel(lvds, MIPIPHY_REGE8, 0xfc);
+
+	/* set lvds mode and reset phy config */
+	lvds_msk_reg(lvds, MIPIPHY_REGE0,
+		     m_MSB_SEL | m_DIG_INTER_RST,
+		     v_MSB_SEL(1) | v_DIG_INTER_RST(1));
+
+	rk336x_lvds_pwr_on(state);
+	lvds_msk_reg(lvds, MIPIPHY_REGE1, m_DIG_INTER_EN, v_DIG_INTER_EN(1));
+}
+
 static void rk3126_output_lvds(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
@@ -517,14 +574,14 @@ static int rockchip_lvds_init(struct display_state *state)
 	if (pdata->chip_type == RK3288_LVDS) {
 		lvds->regbase = dev_read_addr_ptr(conn_state->dev);
 	} else {
-		i = dev_read_resource_byname(conn_state->dev, "mipi_lvds_phy", &lvds_phy);
+		i = dev_read_resource(conn_state->dev, 0, &lvds_phy);
 		if (i) {
 			printf("can't get regs lvds_phy addresses!\n");
 			free(lvds);
 			return -ENOMEM;
 		}
 
-		i = dev_read_resource_byname(conn_state->dev, "mipi_lvds_ctl", &lvds_ctrl);
+		i = dev_read_resource(conn_state->dev, 1, &lvds_ctrl);
 		if (i) {
 			printf("can't get regs lvds_ctrl addresses!\n");
 			free(lvds);
@@ -534,7 +591,7 @@ static int rockchip_lvds_init(struct display_state *state)
 		lvds->regbase = (void *)lvds_phy.start;
 		lvds->ctrl_reg = (void *)lvds_ctrl.start;
 	}
-	printf("%s regbase %p\n", __func__, lvds->regbase);
+
 	lvds->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 	if (lvds->grf <= 0) {
 		printf("%s: Get syscon grf failed (ret=%p)\n",
@@ -619,6 +676,13 @@ static void rockchip_lvds_vop_routing(struct rockchip_lvds_device *lvds, int pip
 		else
 			val = RK3288_LVDS_SOC_CON6_SEL_VOP_LIT << 16;
 		writel(val, lvds->grf + lvds->pdata->grf_soc_con6);
+	} else if (lvds->pdata->chip_type == PX30_LVDS) {
+		if (lvds->output == DISPLAY_OUTPUT_RGB)
+			writel(PX30_RGB_VOP_SEL(pipe),
+			       lvds->grf + PX30_GRF_PD_VO_CON1);
+		else if (lvds->output == DISPLAY_OUTPUT_LVDS)
+			writel(PX30_LVDS_VOP_SEL(pipe),
+			       lvds->grf + PX30_GRF_PD_VO_CON1);
 	}
 }
 
@@ -636,6 +700,8 @@ static int rockchip_lvds_enable(struct display_state *state)
 			rk3288_output_lvds(state);
 		else if (lvds->pdata->chip_type == RK3126_LVDS)
 			rk3126_output_lvds(state);
+		else if (lvds->pdata->chip_type == PX30_LVDS)
+			px30_output_lvds(state);
 		else
 			rk336x_output_lvds(state);
 	} else {
@@ -643,6 +709,8 @@ static int rockchip_lvds_enable(struct display_state *state)
 			rk3288_output_ttl(state);
 		else if (lvds->pdata->chip_type == RK3126_LVDS)
 			rk3126_output_ttl(state);
+		else if (lvds->pdata->chip_type == PX30_LVDS)
+			px30_output_ttl(state);
 		else
 			rk336x_output_ttl(state);
 	}
@@ -671,9 +739,34 @@ const struct rockchip_connector_funcs rockchip_lvds_funcs = {
 	.disable = rockchip_lvds_disable,
 };
 
-static const struct rockchip_connector rk3368_lvds_data = {
+static const struct rockchip_lvds_chip_data px30_lvds_drv_data = {
+	.chip_type = PX30_LVDS,
+	.has_vop_sel = true,
+};
+
+static const struct rockchip_connector px30_lvds_data = {
 	 .funcs = &rockchip_lvds_funcs,
-	 .data = &rk3368_lvds_drv_data,
+	 .data = &px30_lvds_drv_data,
+};
+
+static const struct rockchip_lvds_chip_data rk3126_lvds_drv_data = {
+	.chip_type = RK3126_LVDS,
+	.grf_soc_con7  = RK3126_GRF_LVDS_CON0,
+	.grf_soc_con15 = RK3126_GRF_CON1,
+	.has_vop_sel = true,
+};
+
+static const struct rockchip_connector rk3126_lvds_data = {
+	 .funcs = &rockchip_lvds_funcs,
+	 .data = &rk3126_lvds_drv_data,
+};
+
+static const struct rockchip_lvds_chip_data rk3288_lvds_drv_data = {
+	.chip_type = RK3288_LVDS,
+	.has_vop_sel = true,
+	.grf_soc_con6 = 0x025c,
+	.grf_soc_con7 = 0x0260,
+	.grf_gpio1d_iomux = 0x000c,
 };
 
 static const struct rockchip_connector rk3288_lvds_data = {
@@ -681,22 +774,36 @@ static const struct rockchip_connector rk3288_lvds_data = {
 	 .data = &rk3288_lvds_drv_data,
 };
 
-static const struct rockchip_connector rk3126_lvds_data = {
+static const struct rockchip_lvds_chip_data rk3368_lvds_drv_data = {
+	.chip_type = RK3368_LVDS,
+	.grf_soc_con7  = RK3368_GRF_SOC_CON7,
+	.grf_soc_con15 = RK3368_GRF_SOC_CON15,
+	.has_vop_sel = false,
+};
+
+static const struct rockchip_connector rk3368_lvds_data = {
 	 .funcs = &rockchip_lvds_funcs,
-	 .data = &rk3126_lvds_drv_data,
+	 .data = &rk3368_lvds_drv_data,
 };
 
 static const struct udevice_id rockchip_lvds_ids[] = {
 	{
-	 .compatible = "rockchip,rk3368-lvds",
-	 .data = (ulong)&rk3368_lvds_data,
-	}, {
-	 .compatible = "rockchip,rk3288-lvds",
-	 .data = (ulong)&rk3288_lvds_data,
-	}, {
-	 .compatible = "rockchip,rk3126-lvds",
-	 .data = (ulong)&rk3126_lvds_data,
-	}, {}
+		.compatible = "rockchip,px30-lvds",
+		.data = (ulong)&px30_lvds_data,
+	},
+	{
+		.compatible = "rockchip,rk3126-lvds",
+		.data = (ulong)&rk3126_lvds_data,
+	},
+	{
+		.compatible = "rockchip,rk3288-lvds",
+		.data = (ulong)&rk3288_lvds_data,
+	},
+	{
+		.compatible = "rockchip,rk3368-lvds",
+		.data = (ulong)&rk3368_lvds_data,
+	},
+	{}
 };
 
 U_BOOT_DRIVER(rockchip_lvds) = {
diff --git a/drivers/video/drm/rockchip_lvds.h b/drivers/video/drm/rockchip_lvds.h
index 40a294ee4f..549ce4a473 100644
--- a/drivers/video/drm/rockchip_lvds.h
+++ b/drivers/video/drm/rockchip_lvds.h
@@ -112,6 +112,21 @@
 #define RK3126_GRF_GPIO2C_IOMUX2	0x00e8  /* d18 d19 d20 d21 */
 #define RK3126_GRF_GPIO2D_IOMUX	0x00d4  /* d22 d23 0x700c1004*/
 
+#define PX30_GRF_PD_VO_CON0	0x0434
+#define PX30_GRF_PD_VO_CON1	0x0438
+#define PX30_LVDS_OUTPUT_FORMAT(x)	(BITS_MASK(x, 0x3, 13) | BITS_EN(0x3, 13))
+#define PX30_LVDS_PHY_MODE(x)		(BITS_MASK(x, 0x1, 12) | BITS_EN(0x1, 12))
+#define PX30_LVDS_MSBSEL(x)		(BITS_MASK(x, 0x1, 11) | BITS_EN(0x1, 11))
+#define PX30_DPHY_FORCERXMODE(x)	(BITS_MASK(x, 0x1,  6) | BITS_EN(0x1,  6))
+#define PX30_RGB_VOP_SEL(x)		(BITS_MASK(x, 0x1,  2) | BITS_EN(0x1,  2))
+#define PX30_LVDS_VOP_SEL(x)		(BITS_MASK(x, 0x1,  1) | BITS_EN(0x1,  1))
+#define PX30_GRF_GPIO3A_IOMUX_L	0x0040
+#define PX30_GRF_GPIO3A_IOMUX_H	0x0044
+#define PX30_GRF_GPIO3B_IOMUX_L	0x0048
+#define PX30_GRF_GPIO3B_IOMUX_H	0x004c
+#define PX30_GRF_GPIO3C_IOMUX_L	0x0050
+#define PX30_GRF_GPIO3C_IOMUX_H	0x0054
+#define PX30_GRF_GPIO3D_IOMUX_L	0x0058
 
 #define v_RK336X_LVDS_OUTPUT_FORMAT(x) (BITS_MASK(x, 3, 13) | BITS_EN(3, 13))
 #define v_RK336X_LVDS_MSBSEL(x)        (BITS_MASK(x, 1, 11) | BITS_EN(1, 11))

commit 0c108ca17358cd1dd6d2f45d4c4842e9a6799bbe
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Feb 26 17:17:12 2018 +0800

    video/drm: lvds: remove unused code
    
    Change-Id: I452b6bb6a6dfda2a48d4c4b26aa0a6cf2b8242dc
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_connector.h b/drivers/video/drm/rockchip_connector.h
index 3e5e2ca0f1..9720d26ea4 100644
--- a/drivers/video/drm/rockchip_connector.h
+++ b/drivers/video/drm/rockchip_connector.h
@@ -76,7 +76,6 @@ extern const struct rockchip_dp_chip_data rk3288_analogix_dp_drv_data;
 #ifdef CONFIG_DRM_ROCKCHIP_LVDS
 struct rockchip_lvds_chip_data;
 extern const struct rockchip_connector_funcs rockchip_lvds_funcs;
-extern const struct rockchip_lvds_chip_data rk3366_lvds_drv_data;
 extern const struct rockchip_lvds_chip_data rk3368_lvds_drv_data;
 extern const struct rockchip_lvds_chip_data rk3288_lvds_drv_data;
 #endif
diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index 45216750b2..cc4bbff1e0 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -26,7 +26,6 @@
 
 enum rockchip_lvds_sub_devtype {
 	RK3288_LVDS,
-	RK3366_LVDS,
 	RK3368_LVDS,
 	RK3126_LVDS,
 };
@@ -139,13 +138,6 @@ const struct rockchip_lvds_chip_data rk3126_lvds_drv_data = {
 	.has_vop_sel = true,
 };
 
-const struct rockchip_lvds_chip_data rk3366_lvds_drv_data = {
-	.chip_type = RK3366_LVDS,
-	.grf_soc_con7  = RK3366_GRF_SOC_CON5,
-	.grf_soc_con15 = RK3366_GRF_SOC_CON6,
-	.has_vop_sel = true,
-};
-
 const struct rockchip_lvds_chip_data rk3368_lvds_drv_data = {
 	.chip_type = RK3368_LVDS,
 	.grf_soc_con7  = RK3368_GRF_SOC_CON7,
@@ -627,13 +619,6 @@ static void rockchip_lvds_vop_routing(struct rockchip_lvds_device *lvds, int pip
 		else
 			val = RK3288_LVDS_SOC_CON6_SEL_VOP_LIT << 16;
 		writel(val, lvds->grf + lvds->pdata->grf_soc_con6);
-	} else {
-		if (pipe)
-			val = RK3366_LVDS_VOP_SEL_LIT;
-		else
-			val = RK3366_LVDS_VOP_SEL_BIG;
-
-		writel(val, lvds->grf + RK3366_GRF_SOC_CON0);
 	}
 }
 
@@ -686,11 +671,6 @@ const struct rockchip_connector_funcs rockchip_lvds_funcs = {
 	.disable = rockchip_lvds_disable,
 };
 
-static const struct rockchip_connector rk3366_lvds_data = {
-	 .funcs = &rockchip_lvds_funcs,
-	 .data = &rk3366_lvds_drv_data,
-};
-
 static const struct rockchip_connector rk3368_lvds_data = {
 	 .funcs = &rockchip_lvds_funcs,
 	 .data = &rk3368_lvds_drv_data,
@@ -708,9 +688,6 @@ static const struct rockchip_connector rk3126_lvds_data = {
 
 static const struct udevice_id rockchip_lvds_ids[] = {
 	{
-	 .compatible = "rockchip,rk3366-lvds",
-	 .data = (ulong)&rk3366_lvds_data,
-	}, {
 	 .compatible = "rockchip,rk3368-lvds",
 	 .data = (ulong)&rk3368_lvds_data,
 	}, {
diff --git a/drivers/video/drm/rockchip_lvds.h b/drivers/video/drm/rockchip_lvds.h
index d06ed18b3b..40a294ee4f 100644
--- a/drivers/video/drm/rockchip_lvds.h
+++ b/drivers/video/drm/rockchip_lvds.h
@@ -102,12 +102,6 @@
 #define BITS_MASK(x, mask, bit)  BITS((x) & (mask), bit)
 #define BITS_EN(mask, bit)       BITS(mask, bit + 16)
 
-#define RK3366_GRF_SOC_CON0	0x0400
-#define RK3366_LVDS_VOP_SEL_LIT	(BITS_MASK(1, 1, 0) | BITS_EN(1, 0))
-#define RK3366_LVDS_VOP_SEL_BIG	(BITS_MASK(0, 1, 0) | BITS_EN(1, 0))
-#define RK3366_GRF_SOC_CON5	0x0414
-#define RK3366_GRF_SOC_CON6	0x0418
-
 #define RK3368_GRF_SOC_CON7	0x041c
 #define RK3368_GRF_SOC_CON15	0x043c
 

commit 211d041f98f1a37a44c94baa42f70952be0b664c
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Feb 2 14:38:18 2018 +0800

    video/drm: dphy: Add support for PX30
    
    Change-Id: Ia63096a70afd1e24439266abfff51cf259a1297a
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip-inno-mipi-dphy.c b/drivers/video/drm/rockchip-inno-mipi-dphy.c
index a808c0bcd9..7c054b90d9 100644
--- a/drivers/video/drm/rockchip-inno-mipi-dphy.c
+++ b/drivers/video/drm/rockchip-inno-mipi-dphy.c
@@ -124,7 +124,7 @@ struct inno_mipi_dphy_timing {
 struct inno_mipi_dphy {
 	const void *blob;
 	ofnode node;
-	u32 regs;
+	void __iomem *regs;
 
 	unsigned int lane_mbps;
 	int lanes;
@@ -560,11 +560,7 @@ static int inno_mipi_dphy_init(struct display_state *state)
 		return ret;
 	}
 
-	inno->regs = (u32)ofnode_get_addr(node);
-	if (inno->regs == FDT_ADDR_T_NONE) {
-		printf("%s: failed to get mipi phy address\n", __func__);
-		return -ENOMEM;
-	}
+	inno->regs = (void __iomem *)ofnode_get_addr(node);
 
 	conn_state->phy_private = inno;
 
diff --git a/drivers/video/drm/rockchip_phy.c b/drivers/video/drm/rockchip_phy.c
index 4b3fd5f1a1..c6893a29ef 100644
--- a/drivers/video/drm/rockchip_phy.c
+++ b/drivers/video/drm/rockchip_phy.c
@@ -17,15 +17,7 @@
 #include "rockchip_phy.h"
 
 #ifdef CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI
-static const struct rockchip_phy rockchip_rk3366_mipi_dphy_data = {
-	 .funcs = &inno_mipi_dphy_funcs,
-};
-
-static const struct rockchip_phy rockchip_rk3368_mipi_dphy_data = {
-	 .funcs = &inno_mipi_dphy_funcs,
-};
-
-static const struct rockchip_phy rockchip_rk312x_mipi_dphy_data = {
+static const struct rockchip_phy rockchip_inno_mipi_dphy_data = {
 	 .funcs = &inno_mipi_dphy_funcs,
 };
 #endif
@@ -33,16 +25,20 @@ static const struct rockchip_phy rockchip_rk312x_mipi_dphy_data = {
 static const struct udevice_id rockchip_phy_ids[] = {
 #ifdef CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI
 	{
-	 .compatible = "rockchip,rk3366-mipi-dphy",
-	 .data = (ulong)&rockchip_rk3366_mipi_dphy_data,
+		.compatible = "rockchip,px30-mipi-dphy",
+		.data = (ulong)&rockchip_inno_mipi_dphy_data,
+	},
+	{
+		.compatible = "rockchip,rk3128-mipi-dphy",
+		.data = (ulong)&rockchip_inno_mipi_dphy_data,
 	},
 	{
-	 .compatible = "rockchip,rk3368-mipi-dphy",
-	 .data = (ulong)&rockchip_rk3368_mipi_dphy_data,
+		.compatible = "rockchip,rk3366-mipi-dphy",
+		.data = (ulong)&rockchip_inno_mipi_dphy_data,
 	},
 	{
-	 .compatible = "rockchip,rk3128-mipi-dphy",
-	 .data = (ulong)&rockchip_rk312x_mipi_dphy_data,
+		.compatible = "rockchip,rk3368-mipi-dphy",
+		.data = (ulong)&rockchip_inno_mipi_dphy_data,
 	},
 #endif
 	{}

commit 4a2a52ec6d9d8e90f390ed3b899cc0cebf56aa16
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Feb 2 10:13:26 2018 +0800

    video/drm: dsi: Add support for PX30
    
    Change-Id: I96b966f10c281ab144f84395fa3ab9568c17a4f6
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index 173446b9bd..7c0073147f 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -263,6 +263,7 @@ enum {
 };
 
 enum soc_type {
+	PX30,
 	RK3128,
 	RK3288,
 	RK3366,
@@ -1135,6 +1136,26 @@ static const struct rockchip_connector_funcs rockchip_dw_mipi_dsi_funcs = {
 	.transfer = rockchip_dw_mipi_dsi_transfer,
 };
 
+static const u32 px30_dsi_grf_reg_fields[MAX_FIELDS] = {
+	[DPIUPDATECFG]		= GRF_REG_FIELD(0x0434,  7,  7),
+	[DPICOLORM]		= GRF_REG_FIELD(0x0434,  3,  3),
+	[DPISHUTDN]		= GRF_REG_FIELD(0x0434,  2,  2),
+	[FORCETXSTOPMODE]	= GRF_REG_FIELD(0x0438,  7, 10),
+	[TURNDISABLE]		= GRF_REG_FIELD(0x0438,  5,  5),
+	[VOPSEL]		= GRF_REG_FIELD(0x0438,  0,  0),
+};
+
+static const struct dw_mipi_dsi_plat_data px30_mipi_dsi_drv_data = {
+	.dsi0_grf_reg_fields = px30_dsi_grf_reg_fields,
+	.max_bit_rate_per_lane = 1000000000UL,
+	.soc_type = PX30,
+};
+
+static const struct rockchip_connector px30_mipi_dsi_data = {
+	 .funcs = &rockchip_dw_mipi_dsi_funcs,
+	 .data = &px30_mipi_dsi_drv_data,
+};
+
 static const u32 rk3128_dsi_grf_reg_fields[MAX_FIELDS] = {
 	[FORCETXSTOPMODE]	= GRF_REG_FIELD(0x0150, 10, 13),
 	[FORCERXMODE]		= GRF_REG_FIELD(0x0150,  9,  9),
@@ -1271,6 +1292,10 @@ static const struct rockchip_connector rk3399_mipi_dsi_data = {
 };
 
 static const struct udevice_id rockchip_mipi_dsi_ids[] = {
+	{
+		.compatible = "rockchip,px30-mipi-dsi",
+		.data = (ulong)&px30_mipi_dsi_data,
+	},
 	{
 		.compatible = "rockchip,rk3128-mipi-dsi",
 		.data = (ulong)&rk3128_mipi_dsi_data,

commit c39a6706c52f4ed2c6a025f085b614255d60e8d4
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Feb 2 10:09:50 2018 +0800

    video/drm: dsi: Add a better description for dw_mipi_dsi_plat_data
    
    Change-Id: I5c172902f313c328c9c50f579b8ec5d149ca45e6
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index 05175fe44c..173446b9bd 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -10,6 +10,7 @@
 #include <malloc.h>
 #include <asm/unaligned.h>
 #include <asm/io.h>
+#include <asm/hardware.h>
 #include <linux/list.h>
 #include <dm/device.h>
 #include <dm/read.h>
@@ -26,54 +27,6 @@
 #define MSEC_PER_SEC    1000L
 #define USEC_PER_SEC	1000000L
 
-#define readx_poll_timeout(op, addr, val, cond, sleep_us, timeout_us)	\
-({ \
-	int try = 100; \
-	for (;;) { \
-		(val) = op(addr); \
-		if (cond) \
-			break; \
-		try--; \
-		if (!try) \
-			break; \
-		if (sleep_us) \
-			udelay(sleep_us >> 2); \
-	} \
-	(cond) ? 0 : -ETIMEDOUT; \
-})
-
-#define RK3288_GRF_SOC_CON6		0x025c
-#define RK3288_DSI0_SEL_VOP_LIT		BIT(6)
-#define RK3288_DSI1_SEL_VOP_LIT		BIT(9)
-
-#define RK3288_GRF_SOC_CON9		0x0268
-
-#define RK3288_GRF_SOC_CON14		0x027c
-#define RK3288_TXRX_BASEDIR		BIT(15)
-#define RK3288_TXRX_MASTERSLAVEZ	BIT(14)
-#define RK3288_TXRX_CLKEN		BIT(12)
-
-#define RK3366_GRF_SOC_CON0		0x0400
-#define RK3366_DSI_SEL_VOP_LIT		BIT(2)
-
-#define RK3399_GRF_SOC_CON19		0x6250
-#define RK3399_DSI0_SEL_VOP_LIT		BIT(0)
-#define RK3399_DSI1_SEL_VOP_LIT		BIT(4)
-
-/* disable turnrequest, turndisable, forcetxstopmode, forcerxmode */
-#define RK3399_GRF_SOC_CON22		0x6258
-#define RK3399_GRF_DSI0_MODE		0xffff0000
-/* disable turndisable, forcetxstopmode, forcerxmode, enable */
-#define RK3399_GRF_SOC_CON23		0x625c
-#define RK3399_GRF_DSI1_MODE1		0xffff0000
-#define RK3399_GRF_DSI1_ENABLE		0x000f000f
-/* disable basedir and enable clk*/
-#define RK3399_GRF_SOC_CON24		0x6260
-#define RK3399_TXRX_MASTERSLAVEZ	BIT(7)
-#define RK3399_TXRX_ENABLECLK		BIT(6)
-#define RK3399_TXRX_BASEDIR		BIT(5)
-#define RK3399_GRF_DSI1_MODE2		0x00600040
-
 #define DSI_VERSION			0x00
 #define DSI_PWR_UP			0x04
 #define RESET				0
@@ -309,23 +262,37 @@ enum {
 	BIASEXTR_127_7,
 };
 
+enum soc_type {
+	RK3128,
+	RK3288,
+	RK3366,
+	RK3368,
+	RK3399,
+};
+
+#define GRF_REG_FIELD(reg, lsb, msb)	((reg << 16) | (lsb << 8) | (msb))
+
+enum grf_reg_fields {
+	DPIUPDATECFG,
+	DPISHUTDN,
+	DPICOLORM,
+	VOPSEL,
+	TURNREQUEST,
+	TURNDISABLE,
+	FORCETXSTOPMODE,
+	FORCERXMODE,
+	ENABLE_N,
+	MASTERSLAVEZ,
+	ENABLECLK,
+	BASEDIR,
+	MAX_FIELDS,
+};
+
 struct dw_mipi_dsi_plat_data {
-	u32 dsi0_en_bit;
-	u32 dsi1_en_bit;
-	u32 grf_switch_reg;
-	u32 grf_dsi0_mode;
-	u32 grf_dsi0_mode_reg;
-	u32 grf_dsi1_mode;
-	u32 grf_dsi1_mode_reg1;
-	u32 dsi1_basedir;
-	u32 dsi1_masterslavez;
-	u32 dsi1_enableclk;
-	u32 grf_dsi1_mode_reg2;
-	u32 grf_dsi1_cfg_reg;
-	unsigned int max_data_lanes;
-	u32 max_bit_rate_per_lane;
-	bool has_vop_sel;
-	bool vsync_quirk;
+	const u32 *dsi0_grf_reg_fields;
+	const u32 *dsi1_grf_reg_fields;
+	unsigned long max_bit_rate_per_lane;
+	enum soc_type soc_type;
 };
 
 struct mipi_dphy {
@@ -341,6 +308,7 @@ struct dw_mipi_dsi {
 	void *grf;
 	const void *blob;
 	ofnode node;
+	int id;
 
 	/* dual-channel */
 	struct dw_mipi_dsi *master;
@@ -402,6 +370,24 @@ static inline u32 dsi_read(struct dw_mipi_dsi *dsi, u32 reg)
 	return readl(dsi->base + reg);
 }
 
+static void grf_field_write(struct dw_mipi_dsi *dsi, enum grf_reg_fields index,
+			    unsigned int val)
+{
+	const u32 field = dsi->id ? dsi->pdata->dsi1_grf_reg_fields[index] :
+			  dsi->pdata->dsi0_grf_reg_fields[index];
+	u16 reg;
+	u8 msb, lsb;
+
+	if (!field)
+		return;
+
+	reg = (field >> 16) & 0xffff;
+	lsb = (field >>  8) & 0xff;
+	msb = (field >>  0) & 0xff;
+
+	rk_clrsetreg(dsi->grf + reg, GENMASK(msb, lsb), val << lsb);
+}
+
 static int rockchip_wait_w_pld_fifo_not_full(struct dw_mipi_dsi *dsi)
 {
 	u32 sts;
@@ -791,7 +777,7 @@ static void dw_mipi_dsi_dpi_config(struct dw_mipi_dsi *dsi,
 	if (mode->flags & DRM_MODE_FLAG_NHSYNC)
 		val |= HSYNC_ACTIVE_LOW;
 
-	if (dsi->pdata->vsync_quirk)
+	if (dsi->pdata->soc_type == RK3128)
 		val ^= VSYNC_ACTIVE_LOW;
 
 	dsi_write(dsi, DSI_DPI_VCID, DPI_VID(dsi->channel));
@@ -899,59 +885,6 @@ static void dw_mipi_dsi_clear_err(struct dw_mipi_dsi *dsi)
 	dsi_write(dsi, DSI_INT_MSK1, 0);
 }
 
-const struct dw_mipi_dsi_plat_data rk312x_mipi_dsi_drv_data = {
-	.max_data_lanes = 4,
-	.max_bit_rate_per_lane = 1000000000,
-	.vsync_quirk = true,
-};
-
-const struct dw_mipi_dsi_plat_data rk3288_mipi_dsi_drv_data = {
-	.dsi0_en_bit = RK3288_DSI0_SEL_VOP_LIT,
-	.dsi1_en_bit = RK3288_DSI1_SEL_VOP_LIT,
-	.grf_switch_reg = RK3288_GRF_SOC_CON6,
-	.dsi1_basedir = RK3288_TXRX_BASEDIR,
-	.dsi1_masterslavez = RK3288_TXRX_MASTERSLAVEZ,
-	.grf_dsi1_cfg_reg = RK3288_GRF_SOC_CON14,
-	.max_data_lanes = 4,
-	.max_bit_rate_per_lane = 1500000000,
-	.has_vop_sel = true,
-};
-
-const struct dw_mipi_dsi_plat_data rk3366_mipi_dsi_drv_data = {
-	.dsi0_en_bit = BIT(2),
-	.grf_switch_reg = 0x0400,
-	.max_data_lanes = 4,
-	.max_bit_rate_per_lane = 1000000000,
-	.has_vop_sel = true,
-};
-
-const struct dw_mipi_dsi_plat_data rk3368_mipi_dsi_drv_data = {
-	.max_bit_rate_per_lane = 1000000000,
-	.max_data_lanes = 4,
-};
-
-const struct dw_mipi_dsi_plat_data rk3399_mipi_dsi_drv_data = {
-	.dsi0_en_bit = RK3399_DSI0_SEL_VOP_LIT,
-	.dsi1_en_bit = RK3399_DSI1_SEL_VOP_LIT,
-	.grf_switch_reg = RK3399_GRF_SOC_CON19,
-	.grf_dsi0_mode = RK3399_GRF_DSI0_MODE,
-	.grf_dsi0_mode_reg = RK3399_GRF_SOC_CON22,
-	.grf_dsi1_mode = RK3399_GRF_DSI1_MODE1,
-	.grf_dsi1_mode_reg1 = RK3399_GRF_SOC_CON23,
-	.dsi1_basedir = RK3399_TXRX_BASEDIR,
-	.dsi1_masterslavez = RK3399_TXRX_MASTERSLAVEZ,
-	.dsi1_enableclk = RK3399_TXRX_ENABLECLK,
-	.grf_dsi1_mode_reg2 = RK3399_GRF_SOC_CON24,
-	.max_data_lanes = 4,
-	.max_bit_rate_per_lane = 1500000000,
-	.has_vop_sel = true,
-};
-
-static int dw_mipi_dsi_clk_enable(struct dw_mipi_dsi *dsi)
-{
-	return 0;
-}
-
 static int rockchip_dsi_dual_channel_probe(struct dw_mipi_dsi *master)
 {
 	int phandle;
@@ -987,6 +920,7 @@ static int rockchip_dsi_dual_channel_probe(struct dw_mipi_dsi *master)
 	slave->node = np_to_ofnode(np);
 	slave->base = (u32 *)ofnode_get_addr_index(slave->node, 0);
 	slave->pdata = master->pdata;
+	slave->id = 1;
 	slave->dphy.phy = master->dphy.phy;
 	slave->lanes = master->lanes;
 	slave->format = master->format;
@@ -1004,6 +938,7 @@ static int rockchip_dw_mipi_dsi_init(struct display_state *state)
 	ofnode mipi_node = conn_state->node;
 	struct dw_mipi_dsi *dsi;
 	ofnode panel;
+	static int id = 0;
 	int ret;
 
 	dsi = malloc(sizeof(*dsi));
@@ -1020,6 +955,7 @@ static int rockchip_dw_mipi_dsi_init(struct display_state *state)
 	}
 
 	dsi->pdata = pdata;
+	dsi->id = id++;
 	dsi->blob = state->blob;
 	dsi->node = mipi_node;
 	conn_state->private = dsi;
@@ -1040,7 +976,7 @@ static int rockchip_dw_mipi_dsi_init(struct display_state *state)
 
 	FDT_GET_INT(dsi->lanes, "dsi,lanes");
 	FDT_GET_INT(dsi->format, "dsi,format");
-	FDT_GET_INT(dsi->mode_flags, "dsi,mode_flags");
+	FDT_GET_INT(dsi->mode_flags, "dsi,flags");
 	FDT_GET_INT(dsi->channel, "reg");
 
 	ret = rockchip_dsi_dual_channel_probe(dsi);
@@ -1072,9 +1008,6 @@ static void rockchip_dw_dsi_pre_init(struct display_state *state,
 
 	dsi->mode = &conn_state->mode;
 
-	dw_mipi_dsi_clk_enable(dsi);
-
-
 	if (conn_state->phy) {
 		bw = rockchip_dsi_calc_bandwidth(dsi);
 		rate = rockchip_phy_set_pll(state, bw * USEC_PER_SEC);
@@ -1107,61 +1040,36 @@ static void rockchip_dw_dsi_host_init(struct dw_mipi_dsi *dsi)
 	dw_mipi_dsi_clear_err(dsi);
 }
 
-static int
-rockchip_dsi_grf_config(const struct dw_mipi_dsi_plat_data *pdata,
-			struct dw_mipi_dsi *dsi, int vop_id)
+static void dw_mipi_dsi_vop_routing(struct dw_mipi_dsi *dsi, int vop_id)
 {
-	int val;
+	grf_field_write(dsi, VOPSEL, vop_id);
 
-	if (pdata->grf_dsi0_mode_reg)
-		writel(pdata->grf_dsi0_mode,
-		       dsi->grf + pdata->grf_dsi0_mode_reg);
+	if (dsi->slave)
+		grf_field_write(dsi->slave, VOPSEL, vop_id);
+}
 
-	if (dsi->slave) {
-		if (vop_id)
-			val = pdata->dsi0_en_bit |
-			      (pdata->dsi0_en_bit << 16) |
-			      pdata->dsi1_en_bit |
-			      (pdata->dsi1_en_bit << 16);
-		else
-			val = (pdata->dsi0_en_bit << 16) |
-			      (pdata->dsi1_en_bit << 16);
-
-		if (pdata->grf_switch_reg)
-			writel(val, dsi->grf + pdata->grf_switch_reg);
-
-		val = pdata->dsi1_masterslavez |
-		      (pdata->dsi1_masterslavez << 16) |
-		      (pdata->dsi1_basedir << 16);
-		if (pdata->grf_dsi1_cfg_reg)
-			writel(val, dsi->grf + pdata->grf_dsi1_cfg_reg);
-
-		if (pdata->grf_dsi0_mode_reg)
-			writel(pdata->grf_dsi0_mode,
-			       dsi->grf + pdata->grf_dsi0_mode_reg);
-		if (pdata->grf_dsi1_mode_reg1)
-			writel(pdata->grf_dsi1_mode,
-			       dsi->grf + pdata->grf_dsi1_mode_reg1);
-		if (pdata->grf_dsi1_mode_reg2)
-			writel(RK3399_GRF_DSI1_MODE2,
-			       dsi->grf + pdata->grf_dsi1_mode_reg2);
-		if (pdata->grf_dsi1_mode_reg1)
-			writel(RK3399_GRF_DSI1_ENABLE,
-			       dsi->grf + pdata->grf_dsi1_mode_reg1);
-	} else {
-		if (pdata->grf_switch_reg) {
-			if (vop_id)
-				val = pdata->dsi0_en_bit |
-				      (pdata->dsi0_en_bit << 16);
-			else
-				val = pdata->dsi0_en_bit << 16;
-
-			writel(val, dsi->grf + pdata->grf_switch_reg);
-		}
-	}
-	debug("vop %s output to dsi0\n", (vop_id) ? "LIT" : "BIG");
+static void mipi_dphy_init(struct dw_mipi_dsi *dsi)
+{
+	u32 map[] = {0x1, 0x3, 0x7, 0xf};
 
-	return 0;
+	/* Configures DPHY to work as a Master */
+	grf_field_write(dsi, MASTERSLAVEZ, 1);
+
+	/* Configures lane as TX */
+	grf_field_write(dsi, BASEDIR, 0);
+
+	/* Set all REQUEST inputs to zero */
+	grf_field_write(dsi, TURNREQUEST, 0);
+	grf_field_write(dsi, TURNDISABLE, 0);
+	grf_field_write(dsi, FORCETXSTOPMODE, 0);
+	grf_field_write(dsi, FORCERXMODE, 0);
+	udelay(1);
+
+	/* Enable Data Lane Module */
+	grf_field_write(dsi, ENABLE_N, map[dsi->lanes - 1]);
+
+	/* Enable Clock Lane Module */
+	grf_field_write(dsi, ENABLECLK, 1);
 }
 
 static void rockchip_dw_dsi_controller_init(struct dw_mipi_dsi *dsi)
@@ -1169,6 +1077,7 @@ static void rockchip_dw_dsi_controller_init(struct dw_mipi_dsi *dsi)
 	rockchip_dw_dsi_host_init(dsi);
 
 	mdelay(10);
+	mipi_dphy_init(dsi);
 	dw_mipi_dsi_phy_init(dsi);
 
 	if (dsi->slave)
@@ -1179,19 +1088,14 @@ static int rockchip_dw_mipi_dsi_prepare(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
 	struct crtc_state *crtc_state = &state->crtc_state;
-	const struct rockchip_connector *connector = conn_state->connector;
-	const struct dw_mipi_dsi_plat_data *pdata = connector->data;
 	struct dw_mipi_dsi *dsi = conn_state->private;
 
-	rockchip_dsi_grf_config(pdata, dsi, crtc_state->crtc_id);
+	dw_mipi_dsi_vop_routing(dsi, crtc_state->crtc_id);
 
 	rockchip_dw_dsi_pre_init(state, dsi);
 
 	rockchip_dw_dsi_controller_init(dsi);
 
-	if (!pdata->has_vop_sel)
-		return 0;
-
 	return 0;
 }
 
@@ -1222,7 +1126,7 @@ static int rockchip_dw_mipi_dsi_disable(struct display_state *state)
 	return 0;
 }
 
-const struct rockchip_connector_funcs rockchip_dw_mipi_dsi_funcs = {
+static const struct rockchip_connector_funcs rockchip_dw_mipi_dsi_funcs = {
 	.init = rockchip_dw_mipi_dsi_init,
 	.deinit = rockchip_dw_mipi_dsi_deinit,
 	.prepare = rockchip_dw_mipi_dsi_prepare,
@@ -1231,47 +1135,161 @@ const struct rockchip_connector_funcs rockchip_dw_mipi_dsi_funcs = {
 	.transfer = rockchip_dw_mipi_dsi_transfer,
 };
 
+static const u32 rk3128_dsi_grf_reg_fields[MAX_FIELDS] = {
+	[FORCETXSTOPMODE]	= GRF_REG_FIELD(0x0150, 10, 13),
+	[FORCERXMODE]		= GRF_REG_FIELD(0x0150,  9,  9),
+	[TURNDISABLE]		= GRF_REG_FIELD(0x0150,  8,  8),
+	[DPICOLORM]		= GRF_REG_FIELD(0x0150,  5,  5),
+	[DPISHUTDN]		= GRF_REG_FIELD(0x0150,  4,  4),
+};
+
+static const struct dw_mipi_dsi_plat_data rk3128_mipi_dsi_drv_data = {
+	.dsi0_grf_reg_fields = rk3128_dsi_grf_reg_fields,
+	.max_bit_rate_per_lane = 1000000000UL,
+	.soc_type = RK3128,
+};
+
+static const struct rockchip_connector rk3128_mipi_dsi_data = {
+	 .funcs = &rockchip_dw_mipi_dsi_funcs,
+	 .data = &rk3128_mipi_dsi_drv_data,
+};
+
+static const u32 rk3288_dsi0_grf_reg_fields[MAX_FIELDS] = {
+	[DPICOLORM]		= GRF_REG_FIELD(0x025c,  8,  8),
+	[DPISHUTDN]		= GRF_REG_FIELD(0x025c,  7,  7),
+	[VOPSEL]		= GRF_REG_FIELD(0x025c,  6,  6),
+	[FORCETXSTOPMODE]	= GRF_REG_FIELD(0x0264,  8, 11),
+	[FORCERXMODE]		= GRF_REG_FIELD(0x0264,  4,  7),
+	[TURNDISABLE]		= GRF_REG_FIELD(0x0264,  0,  3),
+	[TURNREQUEST]		= GRF_REG_FIELD(0x03a4,  8, 10),
+	[DPIUPDATECFG]		= GRF_REG_FIELD(0x03a8,  0,  0),
+};
+
+static const u32 rk3288_dsi1_grf_reg_fields[MAX_FIELDS] = {
+	[DPICOLORM]		= GRF_REG_FIELD(0x025c, 11, 11),
+	[DPISHUTDN]		= GRF_REG_FIELD(0x025c, 10, 10),
+	[VOPSEL]		= GRF_REG_FIELD(0x025c,  9,  9),
+	[ENABLE_N]		= GRF_REG_FIELD(0x0268, 12, 15),
+	[FORCETXSTOPMODE]	= GRF_REG_FIELD(0x0268,  8, 11),
+	[FORCERXMODE]		= GRF_REG_FIELD(0x0268,  4,  7),
+	[TURNDISABLE]		= GRF_REG_FIELD(0x0268,  0,  3),
+	[BASEDIR]		= GRF_REG_FIELD(0x027c, 15, 15),
+	[MASTERSLAVEZ]		= GRF_REG_FIELD(0x027c, 14, 14),
+	[ENABLECLK]		= GRF_REG_FIELD(0x027c, 12, 12),
+	[TURNREQUEST]		= GRF_REG_FIELD(0x03a4,  4,  7),
+	[DPIUPDATECFG]		= GRF_REG_FIELD(0x03a8,  1,  1),
+};
+
+static const struct dw_mipi_dsi_plat_data rk3288_mipi_dsi_drv_data = {
+	.dsi0_grf_reg_fields = rk3288_dsi0_grf_reg_fields,
+	.dsi1_grf_reg_fields = rk3288_dsi1_grf_reg_fields,
+	.max_bit_rate_per_lane = 1500000000UL,
+	.soc_type = RK3288,
+};
+
 static const struct rockchip_connector rk3288_mipi_dsi_data = {
 	 .funcs = &rockchip_dw_mipi_dsi_funcs,
 	 .data = &rk3288_mipi_dsi_drv_data,
 };
 
+static const u32 rk3366_dsi_grf_reg_fields[MAX_FIELDS] = {
+	[VOPSEL]		= GRF_REG_FIELD(0x0400,  2,  2),
+	[DPIUPDATECFG]		= GRF_REG_FIELD(0x0410,  9,  9),
+	[DPICOLORM]		= GRF_REG_FIELD(0x0410,  3,  3),
+	[DPISHUTDN]		= GRF_REG_FIELD(0x0410,  2,  2),
+	[FORCETXSTOPMODE]	= GRF_REG_FIELD(0x0414,  7, 10),
+	[FORCERXMODE]		= GRF_REG_FIELD(0x0414,  6,  6),
+	[TURNDISABLE]		= GRF_REG_FIELD(0x0414,  5,  5),
+};
+
+static const struct dw_mipi_dsi_plat_data rk3366_mipi_dsi_drv_data = {
+	.dsi0_grf_reg_fields = rk3366_dsi_grf_reg_fields,
+	.max_bit_rate_per_lane = 1000000000UL,
+	.soc_type = RK3366,
+};
+
 static const struct rockchip_connector rk3366_mipi_dsi_data = {
 	 .funcs = &rockchip_dw_mipi_dsi_funcs,
 	 .data = &rk3366_mipi_dsi_drv_data,
 };
 
+static const u32 rk3368_dsi_grf_reg_fields[MAX_FIELDS] = {
+	[DPIUPDATECFG]		= GRF_REG_FIELD(0x0418,  7,  7),
+	[DPICOLORM]		= GRF_REG_FIELD(0x0418,  3,  3),
+	[DPISHUTDN]		= GRF_REG_FIELD(0x0418,  2,  2),
+	[FORCETXSTOPMODE]	= GRF_REG_FIELD(0x041c,  7, 10),
+	[FORCERXMODE]		= GRF_REG_FIELD(0x041c,  6,  6),
+	[TURNDISABLE]		= GRF_REG_FIELD(0x041c,  5,  5),
+};
+
+static const struct dw_mipi_dsi_plat_data rk3368_mipi_dsi_drv_data = {
+	.dsi0_grf_reg_fields = rk3368_dsi_grf_reg_fields,
+	.max_bit_rate_per_lane = 1000000000UL,
+	.soc_type = RK3368,
+};
+
 static const struct rockchip_connector rk3368_mipi_dsi_data = {
 	 .funcs = &rockchip_dw_mipi_dsi_funcs,
 	 .data = &rk3368_mipi_dsi_drv_data,
 };
 
-const struct rockchip_connector rk3399_mipi_dsi_data = {
-	 .funcs = &rockchip_dw_mipi_dsi_funcs,
-	 .data = &rk3399_mipi_dsi_drv_data,
+static const u32 rk3399_dsi0_grf_reg_fields[MAX_FIELDS] = {
+	[DPIUPDATECFG]		= GRF_REG_FIELD(0x6224, 15, 15),
+	[DPISHUTDN]		= GRF_REG_FIELD(0x6224, 14, 14),
+	[DPICOLORM]		= GRF_REG_FIELD(0x6224, 13, 13),
+	[VOPSEL]		= GRF_REG_FIELD(0x6250,  0,  0),
+	[TURNREQUEST]		= GRF_REG_FIELD(0x6258, 12, 15),
+	[TURNDISABLE]		= GRF_REG_FIELD(0x6258,  8, 11),
+	[FORCETXSTOPMODE]	= GRF_REG_FIELD(0x6258,  4,  7),
+	[FORCERXMODE]		= GRF_REG_FIELD(0x6258,  0,  3),
+};
+
+static const u32 rk3399_dsi1_grf_reg_fields[MAX_FIELDS] = {
+	[VOPSEL]		= GRF_REG_FIELD(0x6250,  4,  4),
+	[DPIUPDATECFG]		= GRF_REG_FIELD(0x6250,  3,  3),
+	[DPISHUTDN]		= GRF_REG_FIELD(0x6250,  2,  2),
+	[DPICOLORM]		= GRF_REG_FIELD(0x6250,  1,  1),
+	[TURNDISABLE]		= GRF_REG_FIELD(0x625c, 12, 15),
+	[FORCETXSTOPMODE]	= GRF_REG_FIELD(0x625c,  8, 11),
+	[ENABLE_N]		= GRF_REG_FIELD(0x625c,  0,  3),
+	[MASTERSLAVEZ]		= GRF_REG_FIELD(0x6260,  7,  7),
+	[ENABLECLK]		= GRF_REG_FIELD(0x6260,  6,  6),
+	[BASEDIR]		= GRF_REG_FIELD(0x6260,  5,  5),
+	[TURNREQUEST]		= GRF_REG_FIELD(0x6260,  0,  3),
+};
+
+static const struct dw_mipi_dsi_plat_data rk3399_mipi_dsi_drv_data = {
+	.dsi0_grf_reg_fields = rk3399_dsi0_grf_reg_fields,
+	.dsi1_grf_reg_fields = rk3399_dsi1_grf_reg_fields,
+	.max_bit_rate_per_lane = 1500000000UL,
+	.soc_type = RK3399,
 };
 
-static const struct rockchip_connector rk312x_mipi_dsi_data = {
+static const struct rockchip_connector rk3399_mipi_dsi_data = {
 	 .funcs = &rockchip_dw_mipi_dsi_funcs,
-	 .data = &rk312x_mipi_dsi_drv_data,
+	 .data = &rk3399_mipi_dsi_drv_data,
 };
 
 static const struct udevice_id rockchip_mipi_dsi_ids[] = {
 	{
-	 .compatible = "rockchip,rk3288-mipi-dsi",
-	 .data = (ulong)&rk3288_mipi_dsi_data,
-	},{
-	 .compatible = "rockchip,rk3366-mipi-dsi",
-	 .data = (ulong)&rk3366_mipi_dsi_data,
-	},{
-	 .compatible = "rockchip,rk3368-mipi-dsi",
-	 .data = (ulong)&rk3368_mipi_dsi_data,
-	},{
-	 .compatible = "rockchip,rk3399-mipi-dsi",
-	 .data = (ulong)&rk3399_mipi_dsi_data,
-	},{
-	 .compatible = "rockchip,rk3128-mipi-dsi",
-	 .data = (ulong)&rk312x_mipi_dsi_data,
+		.compatible = "rockchip,rk3128-mipi-dsi",
+		.data = (ulong)&rk3128_mipi_dsi_data,
+	},
+	{
+		.compatible = "rockchip,rk3288-mipi-dsi",
+		.data = (ulong)&rk3288_mipi_dsi_data,
+	},
+	{
+		.compatible = "rockchip,rk3366-mipi-dsi",
+		.data = (ulong)&rk3366_mipi_dsi_data,
+	},
+	{
+		.compatible = "rockchip,rk3368-mipi-dsi",
+		.data = (ulong)&rk3368_mipi_dsi_data,
+	},
+	{
+		.compatible = "rockchip,rk3399-mipi-dsi",
+		.data = (ulong)&rk3399_mipi_dsi_data,
 	},
 	{}
 };
diff --git a/drivers/video/drm/rockchip_connector.h b/drivers/video/drm/rockchip_connector.h
index bec485baec..3e5e2ca0f1 100644
--- a/drivers/video/drm/rockchip_connector.h
+++ b/drivers/video/drm/rockchip_connector.h
@@ -66,14 +66,6 @@ struct rockchip_connector_funcs {
 const struct rockchip_connector *
 rockchip_get_connector(const void *blob, int connector_node);
 
-#ifdef CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI
-struct dw_mipi_dsi_plat_data;
-extern const struct rockchip_connector_funcs rockchip_dw_mipi_dsi_funcs;
-extern const struct dw_mipi_dsi_plat_data rk3288_mipi_dsi_drv_data;
-extern const struct dw_mipi_dsi_plat_data rk3366_mipi_dsi_drv_data;
-extern const struct dw_mipi_dsi_plat_data rk3368_mipi_dsi_drv_data;
-extern const struct dw_mipi_dsi_plat_data rk3399_mipi_dsi_drv_data;
-#endif
 #ifdef CONFIG_DRM_ROCKCHIP_ANALOGIX_DP
 struct rockchip_dp_chip_data;
 extern const struct rockchip_connector_funcs rockchip_analogix_dp_funcs;

commit 87f0ac575479dbdd18df4e3ae8e3423eb1e19e48
Author: David Wu <david.wu@rock-chips.com>
Date:   Mon Feb 26 16:48:32 2018 +0800

    pinctrl: rockchip: Change the max pin entry to 30
    
    Some case like rk3328 gmac rgmii pins has 22 pins, so
    need to change the max pin entry to 30, otherwise it
    make something not work.
    
    Change-Id: I6897ce6ff995713da75c2094d857b3eb95b77204
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index d05a3f5630..6df466d3b7 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -13,7 +13,7 @@
 
 #define MAX_ROCKCHIP_GPIO_PER_BANK	32
 #define RK_FUNC_GPIO			0
-#define MAX_ROCKCHIP_PINS_ENTRIES	20
+#define MAX_ROCKCHIP_PINS_ENTRIES	30
 
 enum rockchip_pinctrl_type {
 	PX30,
@@ -1841,19 +1841,20 @@ static int rockchip_pinctrl_set_state(struct udevice *dev,
 #endif
 	data = dev_read_prop(config, "rockchip,pins", &count);
 	if (count < 0) {
-		debug("%s: bad array %d\n", __func__, count);
+		debug("%s: bad array size %d\n", __func__, count);
 		return -EINVAL;
 	}
-	count /= sizeof(u32);
-	for (i = 0; i < count; i++)
-		cells[i] = fdt32_to_cpu(data[i]);
 
+	count /= sizeof(u32);
 	if (count > MAX_ROCKCHIP_PINS_ENTRIES * 4) {
 		debug("%s: unsupported pins array count %d\n",
 		      __func__, count);
 		return -EINVAL;
 	}
 
+	for (i = 0; i < count; i++)
+		cells[i] = fdt32_to_cpu(data[i]);
+
 	for (i = 0; i < (count >> 2); i++) {
 		bank = cells[4 * i + 0];
 		pin = cells[4 * i + 1];

commit 773f0d3d6a42cde5d7ff760537d9afa8da47b18e
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Fri Feb 23 16:24:14 2018 +0800

    configs: rockchip: enable ehci and ohci support for evb-px30
    
    Enable ECHI & OHCI host support for Rockchip evb-px30 SoC.
    
    Change-Id: I156ca98b569ccf0181433661ed0f79b0b40ecdab
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 8cce86aa2c..f1bd27e663 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -23,6 +23,8 @@ CONFIG_CMD_LOAD_ANDROID=y
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_RKPARM_PARTITION=y
 CONFIG_OF_LIVE=y
@@ -59,6 +61,11 @@ CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index e8d8d4cc23..6c9676181d 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -64,4 +64,8 @@
 
 #endif
 
+/* rockchip ohci host driver */
+#define CONFIG_USB_OHCI_NEW
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	1
+
 #endif

commit 9b3cc842e76075e9b173aecc58633bca9b594b2c
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Fri Feb 23 16:17:27 2018 +0800

    phy: phy-rockchip-inno-usb2: live-tree support
    
    This change adds child node bind to support live-tree feature.
    
    Change-Id: Ida629ad281f09673e19ee8beb125792f8b0c60a2
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index 2848ed2722..09afed66c6 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <dm/lists.h>
 #include <generic-phy.h>
 #include <syscon.h>
 #include <asm/io.h>
@@ -371,12 +372,10 @@ void otg_phy_init(struct dwc2_udc *dev)
 
 static int rockchip_usb2phy_init(struct phy *phy)
 {
-	struct rockchip_usb2phy *rphy;
+	struct udevice *parent = phy->dev->parent;
+	struct rockchip_usb2phy *rphy = dev_get_priv(parent);
 	const struct rockchip_usb2phy_port_cfg *port_cfg;
-	void __iomem *base;
-
-	rphy = dev_get_priv(phy->dev);
-	base = get_reg_base(rphy);
+	void __iomem *base = get_reg_base(rphy);
 
 	if (phy->id == USB2PHY_PORT_OTG) {
 		port_cfg = &rphy->phy_cfg->port_cfgs[USB2PHY_PORT_OTG];
@@ -397,12 +396,10 @@ static int rockchip_usb2phy_init(struct phy *phy)
 
 static int rockchip_usb2phy_exit(struct phy *phy)
 {
-	struct rockchip_usb2phy *rphy;
+	struct udevice *parent = phy->dev->parent;
+	struct rockchip_usb2phy *rphy = dev_get_priv(parent);
 	const struct rockchip_usb2phy_port_cfg *port_cfg;
-	void __iomem *base;
-
-	rphy = dev_get_priv(phy->dev);
-	base = get_reg_base(rphy);
+	void __iomem *base = get_reg_base(rphy);
 
 	if (phy->id == USB2PHY_PORT_OTG) {
 		port_cfg = &rphy->phy_cfg->port_cfgs[USB2PHY_PORT_OTG];
@@ -418,6 +415,51 @@ static int rockchip_usb2phy_exit(struct phy *phy)
 	return 0;
 }
 
+static int rockchip_usb2phy_of_xlate(struct phy *phy,
+				     struct ofnode_phandle_args *args)
+{
+	const char *dev_name = phy->dev->name;
+
+	if (!strcasecmp(dev_name, "host-port")) {
+		phy->id = USB2PHY_PORT_HOST;
+	} else if (!strcasecmp(dev_name, "otg-port")) {
+		phy->id = USB2PHY_PORT_OTG;
+	} else {
+		pr_err("%s: invalid dev name\n", __func__);
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int rockchip_usb2phy_bind(struct udevice *dev)
+{
+	struct udevice *child;
+	ofnode subnode;
+	const char *node_name;
+	int ret;
+
+	dev_for_each_subnode(subnode, dev) {
+		if (!ofnode_valid(subnode)) {
+			debug("%s: %s subnode not found", __func__, dev->name);
+			return -ENXIO;
+		}
+
+		node_name = ofnode_get_name(subnode);
+		debug("%s: subnode %s\n", __func__, node_name);
+
+		ret = device_bind_driver_to_node(dev, "rockchip_usb2phy_port",
+						 node_name, subnode, &child);
+		if (ret) {
+			pr_err("%s: '%s' cannot bind 'rockchip_usb2phy_port'\n",
+			       __func__, node_name);
+			return ret;
+		}
+	}
+
+	return 0;
+}
+
 static int rockchip_usb2phy_probe(struct udevice *dev)
 {
 	const struct rockchip_usb2phy_cfg *phy_cfgs;
@@ -480,6 +522,7 @@ static int rockchip_usb2phy_probe(struct udevice *dev)
 static struct phy_ops rockchip_usb2phy_ops = {
 	.init = rockchip_usb2phy_init,
 	.exit = rockchip_usb2phy_exit,
+	.of_xlate = rockchip_usb2phy_of_xlate,
 };
 
 static const struct rockchip_usb2phy_cfg rk312x_phy_cfgs[] = {
@@ -633,11 +676,17 @@ static const struct udevice_id rockchip_usb2phy_ids[] = {
 	{ }
 };
 
+U_BOOT_DRIVER(rockchip_usb2phy_port) = {
+	.name		= "rockchip_usb2phy_port",
+	.id		= UCLASS_PHY,
+	.ops		= &rockchip_usb2phy_ops,
+};
+
 U_BOOT_DRIVER(rockchip_usb2phy) = {
 	.name		= "rockchip_usb2phy",
 	.id		= UCLASS_PHY,
 	.of_match	= rockchip_usb2phy_ids,
-	.ops		= &rockchip_usb2phy_ops,
 	.probe		= rockchip_usb2phy_probe,
+	.bind		= rockchip_usb2phy_bind,
 	.priv_auto_alloc_size = sizeof(struct rockchip_usb2phy),
 };

commit ee0a9610b2e3703ae155d4594ae3db83c965ddaf
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Sat Feb 24 10:06:43 2018 +0800

    usb: host: dwc2: disable hnp and srp default for rockchip platform
    
    Due to rockchip platform use live-tree which deployed from linux kernel,
    so abandon the previous 'hnp-srp-disable' DT property and disable hnp and
    srp default at probe time.
    
    Change-Id: I5fb34bc789812d463b6a3c42b268af447d130950
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
index 1293e18f75..d9aa2182f8 100644
--- a/drivers/usb/host/dwc2.c
+++ b/drivers/usb/host/dwc2.c
@@ -1263,6 +1263,10 @@ static int dwc2_usb_probe(struct udevice *dev)
 
 	bus_priv->desc_before_addr = true;
 
+#ifdef CONFIG_ARCH_ROCKCHIP
+	priv->hnp_srp_disable = true;
+#endif
+
 	return dwc2_init_common(dev, priv);
 }
 

commit d2e45d1f9b7dfebc02ba362290e6b461b83bd1a2
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Fri Feb 23 15:46:13 2018 +0800

    usb: host: amend clock exception handling for ehci and ohci
    
    Some platforms, like Rockchip, not implement clk_enable/clk_disable
    APIs, add 'ENOSYS' condition to exclude it.
    
    Change-Id: Ic79122dcad30d318d9326aeb287d0b15c99bfbae
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/host/ehci-generic.c b/drivers/usb/host/ehci-generic.c
index 1cb92c0338..ad59aa8c19 100644
--- a/drivers/usb/host/ehci-generic.c
+++ b/drivers/usb/host/ehci-generic.c
@@ -50,7 +50,7 @@ static int ehci_usb_probe(struct udevice *dev)
 			if (err < 0)
 				break;
 			err = clk_enable(&priv->clocks[i]);
-			if (err) {
+			if (err && err != -ENOSYS) {
 				pr_err("failed to enable clock %d\n", i);
 				clk_free(&priv->clocks[i]);
 				goto clk_err;
diff --git a/drivers/usb/host/ohci-generic.c b/drivers/usb/host/ohci-generic.c
index c1b881cc21..bf5b2d79a4 100644
--- a/drivers/usb/host/ohci-generic.c
+++ b/drivers/usb/host/ohci-generic.c
@@ -47,7 +47,7 @@ static int ohci_usb_probe(struct udevice *dev)
 				break;
 
 			err = clk_enable(&priv->clocks[i]);
-			if (err) {
+			if (err && err != -ENOSYS) {
 				pr_err("failed to enable clock %d\n", i);
 				clk_free(&priv->clocks[i]);
 				goto clk_err;

commit 5ccb6a79f27ea602ad23b07251d1bb8a60109893
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Fri Feb 23 15:33:46 2018 +0800

    usb: host: use map_physmem method in ohci-generic
    
    Using map_physmem method instead of typecasting fdt_addr_t to a
    pointer directly.
    
    This is inspired by commit 643cacb6d ("usb: ehci: Use map_physmem
    in ehci-generic").
    
    Change-Id: I99590eabc763ad73bfb8f0cba7d02f9ef2fb423a
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/host/ohci-generic.c b/drivers/usb/host/ohci-generic.c
index bf55a71d66..c1b881cc21 100644
--- a/drivers/usb/host/ohci-generic.c
+++ b/drivers/usb/host/ohci-generic.c
@@ -4,6 +4,7 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
+#include <asm/io.h>
 #include <common.h>
 #include <clk.h>
 #include <dm.h>
@@ -27,7 +28,7 @@ struct generic_ohci {
 
 static int ohci_usb_probe(struct udevice *dev)
 {
-	struct ohci_regs *regs = (struct ohci_regs *)devfdt_get_addr(dev);
+	struct ohci_regs *regs;
 	struct generic_ohci *priv = dev_get_priv(dev);
 	int i, err, ret, clock_nb, reset_nb;
 
@@ -100,6 +101,7 @@ static int ohci_usb_probe(struct udevice *dev)
 		}
 	}
 
+	regs = map_physmem(dev_read_addr(dev), 0x100, MAP_NOCACHE);
 	err = ohci_register(dev, regs);
 	if (err)
 		goto phy_err;

commit db235eb51fab3cc7c7d8e5c84bee417865688285
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Fri Feb 23 19:38:21 2018 +0800

    clk: rockchip: px30: Move pll mode operation into rkclk_set_pll
    
    Change-Id: I55bc3f9eedd41c40b8e424b482ad620b248262b1
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_px30.h b/arch/arm/include/asm/arch-rockchip/cru_px30.h
index 088017d50d..e39607591c 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_px30.h
@@ -37,6 +37,16 @@ struct px30_clk_priv {
 	ulong rate;
 };
 
+/* PX30 pll id */
+enum px30_pll_id {
+	APLL,
+	DPLL,
+	CPLL,
+	NPLL,
+	GPLL,
+	PLL_COUNT,
+};
+
 struct px30_cru {
 	struct px30_pll {
 		unsigned int con0;
diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 91c91fcea5..1f32fe9abd 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -64,12 +64,30 @@ static const struct pll_div *apll_cfgs[] = {
  * FBDIV = Integer value programmed into feedback divide
  *
  */
-static void rkclk_set_pll(void *pll_base, const struct pll_div *div)
+static void rkclk_set_pll(struct px30_cru *cru, enum px30_pll_id pll_id,
+			  const struct pll_div *div)
 {
-	struct px30_pll *pll = (struct px30_pll *)pll_base;
+	struct px30_pll *pll;
+	unsigned int *mode;
 	/* All PLLs have same VCO and output frequency range restrictions. */
 	uint vco_hz = OSC_HZ / 1000 * div->fbdiv / div->refdiv * 1000;
 	uint output_hz = vco_hz / div->postdiv1 / div->postdiv2;
+	static u8 mode_shift[PLL_COUNT] = {
+		APLL_MODE_SHIFT, DPLL_MODE_SHIFT, CPLL_MODE_SHIFT,
+		NPLL_MODE_SHIFT, GPLL_MODE_SHIFT
+	};
+	static u32 mode_mask[PLL_COUNT] = {
+		APLL_MODE_MASK, DPLL_MODE_MASK, CPLL_MODE_MASK,
+		NPLL_MODE_MASK, GPLL_MODE_MASK
+	};
+
+	if (pll_id == GPLL) {
+		pll = &cru->gpll;
+		mode = &cru->pmu_mode;
+	} else {
+		pll = &cru->pll[pll_id];
+		mode = &cru->mode;
+	};
 
 	debug("PLL at %p: fb=%d, ref=%d, pst1=%d, pst2=%d, vco=%u Hz, output=%u Hz\n",
 	      pll, div->fbdiv, div->refdiv, div->postdiv1,
@@ -77,6 +95,13 @@ static void rkclk_set_pll(void *pll_base, const struct pll_div *div)
 	assert(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ &&
 	       output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ);
 
+	/*
+	 * When power on or changing PLL setting,
+	 * we must force PLL into slow mode to ensure output stable clock.
+	 */
+	rk_clrsetreg(mode, mode_mask[pll_id],
+		     PLLMUX_FROM_XIN24M << mode_shift[pll_id]);
+
 	/* use integer mode */
 	rk_setreg(&pll->con1, 1 << PLL_DSMPD_SHIFT);
 	/* Power down */
@@ -96,6 +121,9 @@ static void rkclk_set_pll(void *pll_base, const struct pll_div *div)
 	while (readl(&pll->con1) & (1 << PLL_LOCK_STATUS_SHIFT))
 		udelay(1);
 
+	rk_clrsetreg(mode, mode_mask[pll_id],
+		     PLLMUX_FROM_PLL << mode_shift[pll_id]);
+
 	return;
 }
 
@@ -105,14 +133,9 @@ static void rkclk_init(struct px30_cru *cru)
 	u32 hclk_div;
 	u32 pclk_div;
 
-	rk_clrsetreg(&cru->mode, APLL_MODE_MASK,
-		     PLLMUX_FROM_XIN24M << APLL_MODE_SHIFT);
-	rk_clrsetreg(&cru->pmu_mode, GPLL_MODE_MASK,
-		     PLLMUX_FROM_XIN24M << GPLL_MODE_SHIFT);
-
 	/* init pll */
-	rkclk_set_pll(&cru->pll[0] , apll_cfgs[APLL_816_MHZ]);
-	rkclk_set_pll(&cru->gpll, &gpll_init_cfg);
+	rkclk_set_pll(cru, APLL, apll_cfgs[APLL_816_MHZ]);
+	rkclk_set_pll(cru, GPLL, &gpll_init_cfg);
 
 	/*
 	 * select apll as cpu/core clock pll source and
@@ -158,11 +181,6 @@ static void rkclk_init(struct px30_cru *cru)
 		     PERI_PLL_GPLL << PERI_PLL_SEL_SHIFT |
 		     hclk_div << PERI_HCLK_DIV_SHIFT |
 		     aclk_div << PERI_ACLK_DIV_SHIFT);
-
-	rk_clrsetreg(&cru->mode, APLL_MODE_MASK,
-		     PLLMUX_FROM_PLL << APLL_MODE_SHIFT);
-	rk_clrsetreg(&cru->pmu_mode, GPLL_MODE_MASK,
-		     PLLMUX_FROM_PLL << GPLL_MODE_SHIFT);
 }
 
 static ulong px30_i2c_get_clk(struct px30_cru *cru, ulong clk_id)

commit 5039ac47ffa0ca6001568cfe6489e060549c6921
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sun Feb 25 18:13:34 2018 +0800

    core: device_bind_common: do not use mmc node from kernel
    
    The driver for U-Boot and kernel are different, we can not re-use
    mmc node from kernel now.
    BTW: U-Boot need alias for mmc to make sure emmc at mmc0(not support
         in kernel dtb).
    
    Change-Id: I1b8fd3ab8a28e3abb5964dc113d0028abe2beaa2
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/core/device.c b/drivers/core/device.c
index 89f2e46998..9d58f44ee1 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -50,6 +50,9 @@ static int device_bind_common(struct udevice *parent, const struct driver *drv,
 		return ret;
 	}
 
+#ifdef CONFIG_USING_KERNEL_DTB
+	/* Do not use mmc node from kernel dtb */
+	if(drv->id == UCLASS_MMC)
 	list_for_each_entry(dev, &uc->dev_head, uclass_node) {
 		if (!strcmp(name, dev->name)){
 			debug("%s do not bind dev already in list %s\n",
@@ -58,7 +61,7 @@ static int device_bind_common(struct udevice *parent, const struct driver *drv,
 			return 0;
 		}
 	}
-
+#endif
 	dev = calloc(1, sizeof(struct udevice));
 	if (!dev)
 		return -ENOMEM;

commit 88949342ad3110302f947d19d4d850222f9fb07b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Feb 25 10:50:55 2018 +0800

    power: add rockchip_pm.c for devices low power control
    
    during system suspend in charge animation, we may need add
    power manage control for some devices low power. Since U-Boot
    don't provide standard suspend/resume callback for device. We
    have to add rockchip_pm.c to write hard code to achieve this
    for different platforms or boards.
    
    Change-Id: I01f67c7c57cbcaae48d3def65eea8cab499af93b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index febe58f6f4..0e5b1c84cf 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -81,6 +81,14 @@ config CHARGE_ANIMATION
 	help
 	  This adds a simple function for charge animation display.
 
+config ROCKCHIP_PM
+	bool "Enable Rockchip power manager for charge animation"
+	depends on CHARGE_ANIMATION
+	default y
+	help
+	  This adds power manage control of devices for low power
+	  during system suspend in charge animation.
+
 config AXP_DCDC1_VOLT
 	int "axp pmic dcdc1 voltage"
 	depends on AXP221_POWER || AXP809_POWER || AXP818_POWER
diff --git a/drivers/power/Makefile b/drivers/power/Makefile
index a80457bc37..0ad93a981f 100644
--- a/drivers/power/Makefile
+++ b/drivers/power/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_AXP221_POWER)	+= axp221.o
 obj-$(CONFIG_AXP809_POWER)	+= axp809.o
 obj-$(CONFIG_AXP818_POWER)	+= axp818.o
 obj-$(CONFIG_CHARGE_ANIMATION)	+= charge_animation.o
+obj-$(CONFIG_ROCKCHIP_PM)	+= rockchip_pm.o
 obj-$(CONFIG_EXYNOS_TMU)	+= exynos-tmu.o
 obj-$(CONFIG_FTPMU010_POWER)	+= ftpmu010.o
 obj-$(CONFIG_SY8106A_POWER)	+= sy8106a.o
diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index b462e4a84c..65a1c67133 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -17,6 +17,7 @@
 #include <linux/input.h>
 #include <power/charge_display.h>
 #include <power/charge_animation.h>
+#include <power/rockchip_pm.h>
 #include <power/fuel_gauge.h>
 #include <power/pmic.h>
 #include <power/rk8xx_pmic.h>
@@ -122,12 +123,16 @@ static int system_suspend_enter(struct charge_animation_pdata *pdata)
 		putc('2');
 		irqs_suspend();
 		putc('3');
+		device_suspend();
+		putc('4');
 		putc('\n');
 
 		/* Trap into ATF for low power mode */
 		cpu_suspend(0, psci_system_suspend);
 
 		putc('\n');
+		putc('4');
+		device_resume();
 		putc('3');
 		irqs_resume();
 		putc('2');
diff --git a/drivers/power/rockchip_pm.c b/drivers/power/rockchip_pm.c
new file mode 100644
index 0000000000..2ec4e78cdc
--- /dev/null
+++ b/drivers/power/rockchip_pm.c
@@ -0,0 +1,20 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <command.h>
+#include <common.h>
+#include <dm.h>
+#include <power/rockchip_pm.h>
+
+int device_suspend(void)
+{
+	return 0;
+}
+
+int device_resume(void)
+{
+	return 0;
+}
diff --git a/include/power/rockchip_pm.h b/include/power/rockchip_pm.h
new file mode 100644
index 0000000000..65f008b2e1
--- /dev/null
+++ b/include/power/rockchip_pm.h
@@ -0,0 +1,13 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _ROCKCHIP_PM_H_
+#define _ROCKCHIP_PM_H_
+
+int device_suspend(void);
+int device_resume(void);
+
+#endif

commit 1e7885d671f108a8cb0798aee8c7eeffef3e573a
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Sun Feb 25 21:59:10 2018 +0800

    px30: arch_cpu_init: Fix error pd_vo bit
    
    Change-Id: I3b93425732183bc1b627cf489164955818a873fa
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c
index 9074ecae83..e23e456bd3 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -40,7 +40,7 @@ int arch_cpu_init(void)
 	/* Disable the ddr secure region setting to make it non-secure */
 #endif
 	/* Enable PD_VO (default disable at reset) */
-	rk_clrreg(PMU_PWRDN_CON, 13);
+	rk_clrreg(PMU_PWRDN_CON, 1 << 13);
 
 	return 0;
 }

commit a872e26cf53cfd342e043132554f925136448021
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Feb 24 17:40:30 2018 +0800

    px30: arch_cpu_init: enable pd_vo
    
    Change-Id: I789b5e759c962604e6bb22922b0e73eb8cfd63a9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c
index 1655bf7726..9074ecae83 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -9,6 +9,8 @@
 #include <asm/arch/hardware.h>
 #include <asm/armv8/mmu.h>
 
+#define PMU_PWRDN_CON	0xff000018
+
 static struct mm_region px30_mem_map[] = {
 	{
 		.virt = 0x0UL,
@@ -37,6 +39,9 @@ int arch_cpu_init(void)
 	/* We do some SoC one time setting here. */
 	/* Disable the ddr secure region setting to make it non-secure */
 #endif
+	/* Enable PD_VO (default disable at reset) */
+	rk_clrreg(PMU_PWRDN_CON, 13);
+
 	return 0;
 }
 #define GRF_BASE	0xff140000

commit 0e1b20c53db7fafc0915a97654ec0ee2071d849c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Feb 24 17:02:18 2018 +0800

    dm: regulator: add "regulator-init-microvolt" support
    
    Change-Id: I5045dc33157d071460302b513b67b942fef1586d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/regulator-uclass.c b/drivers/power/regulator/regulator-uclass.c
index 2c1a1854f6..6783ac43e1 100644
--- a/drivers/power/regulator/regulator-uclass.c
+++ b/drivers/power/regulator/regulator-uclass.c
@@ -211,6 +211,8 @@ int regulator_autoset(struct udevice *dev)
 
 	if (uc_pdata->flags & REGULATOR_FLAG_AUTOSET_UV)
 		ret = regulator_set_value(dev, uc_pdata->min_uV);
+	if (uc_pdata->init_uV > 0)
+		ret = regulator_set_value(dev, uc_pdata->init_uV);
 	if (!ret && (uc_pdata->flags & REGULATOR_FLAG_AUTOSET_UA))
 		ret = regulator_set_current(dev, uc_pdata->min_uA);
 
@@ -342,6 +344,8 @@ static int regulator_pre_probe(struct udevice *dev)
 						-ENODATA);
 	uc_pdata->max_uV = dev_read_u32_default(dev, "regulator-max-microvolt",
 						-ENODATA);
+	uc_pdata->init_uV = dev_read_u32_default(dev, "regulator-init-microvolt",
+						-ENODATA);
 	uc_pdata->min_uA = dev_read_u32_default(dev, "regulator-min-microamp",
 						-ENODATA);
 	uc_pdata->max_uA = dev_read_u32_default(dev, "regulator-max-microamp",
diff --git a/include/power/regulator.h b/include/power/regulator.h
index ea1bf995bb..ef0c88414a 100644
--- a/include/power/regulator.h
+++ b/include/power/regulator.h
@@ -168,6 +168,7 @@ struct dm_regulator_uclass_platdata {
 	int mode_count;
 	int min_uV;
 	int max_uV;
+	int init_uV;
 	int min_uA;
 	int max_uA;
 	bool always_on;

commit 1b6b965c67314d1ae08815e9b9d8e75429fc21a5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Feb 22 15:03:04 2018 +0800

    pmic: add rk809 support
    
    include sub modules: pmic, regulator, pwrkey
    
    Change-Id: I840983ceafc7677840674e7d1aebab703e3a537d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/rk8xx_pwrkey.c b/drivers/input/rk8xx_pwrkey.c
index 76328e28b1..80f7cd9cf4 100644
--- a/drivers/input/rk8xx_pwrkey.c
+++ b/drivers/input/rk8xx_pwrkey.c
@@ -14,7 +14,6 @@
 #include <asm/arch/periph.h>
 #include <dm/pinctrl.h>
 
-#define RK817_GPIO_INT_CFG	0xfe
 #define	RK817_INT_STS_REG0	0xf8
 #define	RK817_INT_MSK_REG0	0xf9
 #define	RK817_INT_STS_REG1	0xfa
@@ -24,7 +23,6 @@
 #define RK817_PWRON_RISE_INT	(1 << 1)
 #define RK817_PWRON_FALL_INT	(1 << 0)
 #define RK817_PLUG_OUT_INT	(1 << 1)
-#define RK817_INT_POL_MSK	BIT(1)
 
 #define	RK816_INT_STS_REG1	0x49
 #define	RK816_INT_MSK_REG1	0x4a
@@ -64,8 +62,6 @@ static struct reg_data rk817_init_reg[] = {
 	{ RK817_INT_STS_REG0, 0xff },
 	{ RK817_INT_STS_REG1, 0xff },
 	{ RK817_INT_STS_REG2, 0xff },
-	/* pmic_int active low */
-	{ RK817_GPIO_INT_CFG, 0x20 },
 };
 
 static struct reg_data rk817_irq_reg[] = {
@@ -265,6 +261,7 @@ static int rk8xx_pwrkey_probe(struct udevice *dev)
 		priv->irq_reg = rk816_irq_reg;
 		priv->irq_reg_num = ARRAY_SIZE(rk816_irq_reg);
 		break;
+	case RK809_ID:
 	case RK817_ID:
 		priv->key_int_sts_reg = RK817_INT_STS_REG0;
 		priv->key_int_msk_reg = RK817_INT_MSK_REG0;
diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index 59f1b9172e..6dc3edb13c 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -93,6 +93,7 @@ static int rk8xx_shutdown(struct udevice *dev)
 		devctrl_reg = REG_DEVCTRL;
 		dev_off = BIT(0);
 		break;
+	case RK809_ID:
 	case RK817_ID:
 		devctrl_reg = RK817_REG_SYS_CFG3;
 		dev_off = BIT(0);
@@ -161,7 +162,8 @@ static int rk8xx_probe(struct udevice *dev)
 	uint8_t msb, lsb, id_msb, id_lsb;
 
 	/* read Chip variant */
-	if (device_is_compatible(dev, "rockchip,rk817")) {
+	if (device_is_compatible(dev, "rockchip,rk817") ||
+	    device_is_compatible(dev, "rockchip,rk809")) {
 		id_msb = RK817_ID_MSB;
 		id_lsb = RK817_ID_LSB;
 	} else {
@@ -179,6 +181,7 @@ static int rk8xx_probe(struct udevice *dev)
 	case RK816_ID:
 	case RK818_ID:
 		break;
+	case RK809_ID:
 	case RK817_ID:
 #ifdef CONFIG_DM_CHARGE_DISPLAY
 		init_data = rk817_init_reg;
@@ -219,6 +222,7 @@ static struct dm_pmic_ops rk8xx_ops = {
 static const struct udevice_id rk8xx_ids[] = {
 	{ .compatible = "rockchip,rk805" },
 	{ .compatible = "rockchip,rk808" },
+	{ .compatible = "rockchip,rk809" },
 	{ .compatible = "rockchip,rk816" },
 	{ .compatible = "rockchip,rk817" },
 	{ .compatible = "rockchip,rk818" },
diff --git a/drivers/power/regulator/rk8xx.c b/drivers/power/regulator/rk8xx.c
index edad841e13..aace8ae280 100644
--- a/drivers/power/regulator/rk8xx.c
+++ b/drivers/power/regulator/rk8xx.c
@@ -33,6 +33,10 @@
 #define RK818_USB_ILIM_SEL_MASK		0x0f
 #define RK818_USB_CHG_SD_VSEL_MASK	0x70
 
+/* RK809 BUCK5 */
+#define RK809_BUCK5_CONFIG(n)		(0xde + (n) * 1)
+#define RK809_BUCK5_VSEL_MASK		0x07
+
 /* RK817 BUCK */
 #define RK817_BUCK_ON_VSEL(n)		(0xbb + 3 * (n - 1))
 #define RK817_BUCK_SLP_VSEL(n)		(0xbc + 3 * (n - 1))
@@ -78,6 +82,14 @@ static const struct rk8xx_reg_info rk816_buck[] = {
 	{  800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, RK818_BUCK4_VSEL_MASK, },
 };
 
+static const struct rk8xx_reg_info rk809_buck5[] = {
+	/* buck 5 */
+	{ 1500000,	0, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), RK809_BUCK5_VSEL_MASK, 0x00, },
+	{ 1800000, 200000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), RK809_BUCK5_VSEL_MASK, 0x01, },
+	{ 2800000, 200000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), RK809_BUCK5_VSEL_MASK, 0x04, },
+	{ 3300000, 300000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), RK809_BUCK5_VSEL_MASK, 0x06, },
+};
+
 static const struct rk8xx_reg_info rk817_buck[] = {
 	/* buck 1 */
 	{  500000,  12500, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_VSEL_MASK, 0x00, },
@@ -196,6 +208,7 @@ static const struct rk8xx_reg_info *get_buck_reg(struct udevice *pmic,
 			return &rk816_buck[num + 4];
 		}
 
+	case RK809_ID:
 	case RK817_ID:
 		switch (num) {
 		case 0 ... 2:
@@ -205,13 +218,23 @@ static const struct rk8xx_reg_info *get_buck_reg(struct udevice *pmic,
 				return &rk817_buck[num * 3 + 1];
 			else
 				return &rk817_buck[num * 3 + 2];
-		default:
+		case 3:
 			if (uvolt < 1500000)
 				return &rk817_buck[num * 3 + 0];
 			else if (uvolt < 3400000)
 				return &rk817_buck[num * 3 + 1];
 			else
 				return &rk817_buck[num * 3 + 2];
+		/* BUCK5 for RK809 */
+		default:
+			if (uvolt < 1800000)
+				return &rk809_buck5[0];
+			else if (uvolt < 2800000)
+				return &rk809_buck5[1];
+			else if (uvolt < 3300000)
+				return &rk809_buck5[2];
+			else
+				return &rk809_buck5[3];
 		}
 	case RK818_ID:
 		return &rk818_buck[num];
@@ -278,12 +301,22 @@ static int _buck_set_enable(struct udevice *pmic, int buck, bool enable)
 		ret = pmic_clrsetbits(pmic, REG_DCDC_EN, mask,
 				      enable ? mask : 0);
 		break;
+	case RK809_ID:
 	case RK817_ID:
-		if (enable)
-			value = ((1 << buck) | (1 << (buck + 4)));
-		else
-			value = ((0 << buck) | (1 << (buck + 4)));
-		ret = pmic_reg_write(pmic, RK817_POWER_EN(0), value);
+		if (buck < 4) {
+			if (enable)
+				value = ((1 << buck) | (1 << (buck + 4)));
+			else
+				value = ((0 << buck) | (1 << (buck + 4)));
+			ret = pmic_reg_write(pmic, RK817_POWER_EN(0), value);
+		/* BUCK5 for RK809 */
+		} else {
+			if (enable)
+				value = ((1 << 1) | (1 << 5));
+			else
+				value = ((0 << 1) | (1 << 5));
+			ret = pmic_reg_write(pmic, RK817_POWER_EN(3), value);
+		}
 		break;
 	default:
 		ret = -EINVAL;
@@ -337,12 +370,22 @@ static int _buck_get_enable(struct udevice *pmic, int buck)
 		if (ret < 0)
 			return ret;
 		break;
+	case RK809_ID:
 	case RK817_ID:
-		mask = 1 << buck;
-		ret = pmic_reg_read(pmic, RK817_POWER_EN(0));
-			debug("%s: %s, buck=%d, en=%x\n", __func__, pmic->name, buck, ret);
+		if (buck < 4) {
+			mask = 1 << buck;
+			ret = pmic_reg_read(pmic, RK817_POWER_EN(0));
+		/* BUCK5 for RK809 */
+		} else {
+			mask = 1 << 1;
+			ret = pmic_reg_read(pmic, RK817_POWER_EN(3));
+		}
 		break;
 	}
+
+	if (ret < 0)
+		return ret;
+
 	return ret & mask ? true : false;
 }
 
@@ -359,15 +402,18 @@ static int _buck_set_suspend_enable(struct udevice *pmic, int buck, bool enable)
 		ret = pmic_clrsetbits(pmic, RK816_REG_DCDC_SLP_EN, mask,
 				      enable ? mask : 0);
 		break;
-
 	case RK808_ID:
 	case RK818_ID:
 		mask = 1 << buck;
 		ret = pmic_clrsetbits(pmic, REG_SLEEP_SET_OFF1, mask,
 				      enable ? 0 : mask);
 		break;
+	case RK809_ID:
 	case RK817_ID:
-		mask = 1 << buck;
+		if (buck < 4)
+			mask = 1 << buck;
+		else
+			mask = 1 << 5;	/* BUCK5 for RK809 */
 		ret = pmic_clrsetbits(pmic, RK817_POWER_SLP_EN(0), mask,
 				      enable ? mask : 0);
 		break;
@@ -387,6 +433,7 @@ static const struct rk8xx_reg_info *get_ldo_reg(struct udevice *pmic,
 	case RK805_ID:
 	case RK816_ID:
 		return &rk816_ldo[num];
+	case RK809_ID:
 	case RK817_ID:
 		if (uvolt < 3400000)
 			return &rk817_ldo[num * 2 + 0];
@@ -423,6 +470,7 @@ static int _ldo_get_enable(struct udevice *pmic, int ldo)
 		if (ret < 0)
 			return ret;
 		break;
+	case RK809_ID:
 	case RK817_ID:
 		if (ldo < 4) {
 			mask = 1 << ldo;
@@ -438,6 +486,10 @@ static int _ldo_get_enable(struct udevice *pmic, int ldo)
 		}
 		break;
 	}
+
+	if (ret < 0)
+		return ret;
+
 	return ret & mask ? true : false;
 }
 
@@ -469,6 +521,7 @@ static int _ldo_set_enable(struct udevice *pmic, int ldo, bool enable)
 		ret = pmic_clrsetbits(pmic, REG_LDO_EN, mask,
 				       enable ? mask : 0);
 		break;
+	case RK809_ID:
 	case RK817_ID:
 		if (ldo < 4) {
 			en_reg = RK817_POWER_EN(1);
@@ -511,6 +564,7 @@ static int _ldo_set_suspend_enable(struct udevice *pmic, int ldo, bool enable)
 		ret = pmic_clrsetbits(pmic, REG_SLEEP_SET_OFF2, mask,
 				      enable ? 0 : mask);
 		break;
+	case RK809_ID:
 	case RK817_ID:
 		if (ldo == 8) {
 			mask = 1 << 4;	/* LDO9 */
@@ -663,30 +717,96 @@ static int ldo_get_enable(struct udevice *dev)
 
 static int switch_set_enable(struct udevice *dev, bool enable)
 {
-	int sw = dev->driver_data - 1;
-	uint mask;
+	struct rk8xx_priv *priv = dev_get_priv(dev->parent);
+	int ret = 0, sw = dev->driver_data - 1;
+	uint mask = 0;
 
-	mask = 1 << (sw + 5);
+	switch (priv->variant) {
+	case RK808_ID:
+		mask = 1 << (sw + 5);
+		ret = pmic_clrsetbits(dev->parent, REG_DCDC_EN, mask,
+				      enable ? mask : 0);
+		break;
+	case RK809_ID:
+		mask = (1 << (sw + 2)) | (1 << (sw + 6));
+		ret = pmic_clrsetbits(dev->parent, RK817_POWER_EN(3), mask,
+				      enable ? mask : 0);
+		break;
+	case RK818_ID:
+		mask = 1 << 6;
+		ret = pmic_clrsetbits(dev->parent, REG_DCDC_EN, mask,
+				      enable ? mask : 0);
+		break;
+	}
+
+	debug("%s: switch%d, enable=%d, mask=0x%x\n",
+	      __func__, sw + 1, enable, mask);
 
-	return pmic_clrsetbits(dev->parent, REG_DCDC_EN, mask,
-			       enable ? mask : 0);
+	return ret;
 }
 
 static int switch_get_enable(struct udevice *dev)
 {
-	int sw = dev->driver_data - 1;
-	int ret;
-	uint mask;
+	struct rk8xx_priv *priv = dev_get_priv(dev->parent);
+	int ret = 0, sw = dev->driver_data - 1;
+	uint mask = 0;
 
-	mask = 1 << (sw + 5);
+	switch (priv->variant) {
+	case RK808_ID:
+		mask = 1 << (sw + 5);
+		ret = pmic_reg_read(dev->parent, REG_DCDC_EN);
+		break;
+	case RK809_ID:
+		mask = 1 << (sw + 2);
+		ret = pmic_reg_read(dev->parent, RK817_POWER_EN(3));
+		break;
+	case RK818_ID:
+		mask = 1 << 6;
+		ret = pmic_reg_read(dev->parent, REG_DCDC_EN);
+		break;
+	}
 
-	ret = pmic_reg_read(dev->parent, REG_DCDC_EN);
 	if (ret < 0)
 		return ret;
 
 	return ret & mask ? true : false;
 }
 
+static int switch_set_suspend_value(struct udevice *dev, int uvolt)
+{
+	return 0;
+}
+
+static int switch_set_suspend_enable(struct udevice *dev, bool enable)
+{
+	struct rk8xx_priv *priv = dev_get_priv(dev->parent);
+	int ret = 0, sw = dev->driver_data - 1;
+	uint mask = 0;
+
+	switch (priv->variant) {
+	case RK808_ID:
+		mask = 1 << (sw + 5);
+		ret = pmic_clrsetbits(dev->parent, REG_SLEEP_SET_OFF1, mask,
+				      enable ? 0 : mask);
+		break;
+	case RK809_ID:
+		mask = 1 << (sw + 6);
+		ret = pmic_clrsetbits(dev->parent, RK817_POWER_SLP_EN(0), mask,
+				      enable ? mask : 0);
+		break;
+	case RK818_ID:
+		mask = 1 << 6;
+		ret = pmic_clrsetbits(dev->parent, REG_SLEEP_SET_OFF1, mask,
+				      enable ? 0 : mask);
+		break;
+	}
+
+	debug("%s: switch%d, enable=%d, mask=0x%x\n",
+	      __func__, sw + 1, enable, mask);
+
+	return ret;
+}
+
 static int rk8xx_buck_probe(struct udevice *dev)
 {
 	struct dm_regulator_uclass_platdata *uc_pdata;
@@ -744,6 +864,8 @@ static const struct dm_regulator_ops rk8xx_ldo_ops = {
 static const struct dm_regulator_ops rk8xx_switch_ops = {
 	.get_enable = switch_get_enable,
 	.set_enable = switch_set_enable,
+	.set_suspend_enable = switch_set_suspend_enable,
+	.set_suspend_value = switch_set_suspend_value,
 };
 
 U_BOOT_DRIVER(rk8xx_buck) = {
diff --git a/include/power/rk8xx_pmic.h b/include/power/rk8xx_pmic.h
index 51dd046f11..f8297db791 100644
--- a/include/power/rk8xx_pmic.h
+++ b/include/power/rk8xx_pmic.h
@@ -186,6 +186,7 @@ enum {
 enum {
 	RK805_ID = 0x8050,
 	RK808_ID = 0x0000,
+	RK809_ID = 0x8090,
 	RK816_ID = 0x8160,
 	RK817_ID = 0x8170,
 	RK818_ID = 0x8180,

commit 1c223666dcdc234f94640ded21407835a0af3712
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Feb 24 15:22:26 2018 +0800

    pmic: rk8xx: add init register setting for rk817
    
    1. set pmic_sleep as sleep function;
    2. set pmic_int active low.
    
    Change-Id: I4bc4034e18b19dc9b1b328870db652d11173fe3a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/rk8xx_pwrkey.c b/drivers/input/rk8xx_pwrkey.c
index 9cba035e83..76328e28b1 100644
--- a/drivers/input/rk8xx_pwrkey.c
+++ b/drivers/input/rk8xx_pwrkey.c
@@ -41,11 +41,6 @@
 #define RK805_PWRON_RISE_INT	(1 << 0)
 #define RK805_PWRON_FALL_INT	(1 << 7)
 
-struct reg_data {
-	u8 reg;
-	u8 val;
-};
-
 struct rk8xx_key_priv {
 	u8 key_int_sts_reg;
 	u8 key_int_msk_reg;
diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index bc87a877b2..59f1b9172e 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -13,6 +13,18 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+/*
+ * Only when system suspend while U-Boot charge needs this config support
+ */
+#ifdef CONFIG_DM_CHARGE_DISPLAY
+static struct reg_data rk817_init_reg[] = {
+	/* Set pmic_sleep as sleep function */
+	{ RK817_PMIC_SYS_CFG3, 0x08, 0x18 },
+	/* Set pmic_int active low */
+	{ RK817_GPIO_INT_CFG,  0x00, 0x02 },
+};
+#endif
+
 static const struct pmic_child_info pmic_children_info[] = {
 	{ .prefix = "DCDC_REG", .driver = "rk8xx_buck"},
 	{ .prefix = "LDO_REG", .driver = "rk8xx_ldo"},
@@ -143,6 +155,9 @@ static int rk8xx_bind(struct udevice *dev)
 static int rk8xx_probe(struct udevice *dev)
 {
 	struct rk8xx_priv *priv = dev_get_priv(dev);
+	struct reg_data *init_data = NULL;
+	int init_data_num = 0;
+	int ret = 0, i;
 	uint8_t msb, lsb, id_msb, id_lsb;
 
 	/* read Chip variant */
@@ -158,15 +173,37 @@ static int rk8xx_probe(struct udevice *dev)
 	rk8xx_read(dev, id_lsb, &lsb, 1);
 
 	priv->variant = ((msb << 8) | lsb) & RK8XX_ID_MSK;
-	if ((priv->variant != RK808_ID) &&
-	    (priv->variant != RK805_ID) &&
-	    (priv->variant != RK816_ID) &&
-	    (priv->variant != RK817_ID) &&
-	    (priv->variant != RK818_ID)) {
+	switch (priv->variant) {
+	case RK805_ID:
+	case RK808_ID:
+	case RK816_ID:
+	case RK818_ID:
+		break;
+	case RK817_ID:
+#ifdef CONFIG_DM_CHARGE_DISPLAY
+		init_data = rk817_init_reg;
+		init_data_num = ARRAY_SIZE(rk817_init_reg);
+#endif
+		break;
+	default:
 		printf("Unknown PMIC: RK%x!!\n", priv->variant);
 		return -EINVAL;
 	}
 
+	for (i = 0; i < init_data_num; i++) {
+		ret = pmic_clrsetbits(dev,
+				      init_data[i].reg,
+				      init_data[i].mask,
+				      init_data[i].val);
+		if (ret < 0) {
+			printf("%s: i2c set reg 0x%x failed, ret=%d\n",
+			       __func__, init_data[i].reg, ret);
+		}
+
+		debug("%s: reg[0x%x] = 0x%x\n", __func__, init_data[i].reg,
+		      pmic_reg_read(dev, init_data[i].reg));
+	}
+
 	printf("PMIC:  RK%x\n", priv->variant);
 
 	return 0;
diff --git a/include/power/rk8xx_pmic.h b/include/power/rk8xx_pmic.h
index 79c57896bd..51dd046f11 100644
--- a/include/power/rk8xx_pmic.h
+++ b/include/power/rk8xx_pmic.h
@@ -195,6 +195,15 @@ enum {
 #define RK817_ID_LSB	0xee
 #define RK8XX_ID_MSK	0xfff0
 
+#define RK817_PMIC_SYS_CFG3	0xf4
+#define RK817_GPIO_INT_CFG	0xfe
+
+struct reg_data {
+	u8 reg;
+	u8 val;
+	u8 mask;
+};
+
 struct rk8xx_reg_table {
 	char *name;
 	u8 reg_ctl;

commit 3c3675ddd7dfb95c8dc592003d9f5feb2e081ff9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Feb 24 15:18:27 2018 +0800

    rockchip: recoganize boot devtype dynamicly
    
    currently support: emmc and rknand.
    
    Change-Id: I8b0e2623256ed3357de2acbee0d2455162228ab5
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/boot_mode.h b/arch/arm/include/asm/arch-rockchip/boot_mode.h
index 6b2a610cf4..e38627e4c1 100644
--- a/arch/arm/include/asm/arch-rockchip/boot_mode.h
+++ b/arch/arm/include/asm/arch-rockchip/boot_mode.h
@@ -20,6 +20,7 @@
 
 #ifndef __ASSEMBLY__
 int setup_boot_mode(void);
+void devtype_num_envset(void);
 #endif
 
 #endif
diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index b50b17329c..f88a14b3d0 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -64,14 +64,20 @@ __weak int rockchip_dnl_key_pressed(void)
 		return false;
 }
 
-static void devtype_num_envset(void)
+void devtype_num_envset(void)
 {
+	static int done = 0;
+
+	if (done)
+		return;
+
 	const char *devtype_num_set =
 	"if mmc dev 0; then setenv devtype mmc; setenv devnum 0;"
 	"else if rknand dev 0; then setenv devtype rknand; setenv devnum 0; fi;"
 	"fi;";
 
 	run_command_list(devtype_num_set, -1, 0);
+	done = 1;
 }
 
 void rockchip_dnl_mode_check(void)
diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 582255d436..8e07264999 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -148,30 +148,28 @@ err:
 int get_bootdev_type(void)
 {
 	int type = 0;
-	char *boot_media = NULL;
+	char *boot_media = NULL, *devtype = NULL;
 	char boot_options[128] = {0};
 	static int appended;
 
-	#ifdef CONFIG_EMMC_BOOT
+	devtype_num_envset();
+	devtype = env_get("devtype");
+
+	if (!strcmp(devtype, "mmc")) {
 		type = IF_TYPE_MMC;
 		boot_media = "emmc";
-	#endif /* CONFIG_EMMC_BOOT */
-	#ifdef CONFIG_QSPI_BOOT
-		type = IF_TYPE_SPI_NAND;
-		boot_media = "nand";
-	#endif /* CONFIG_QSPI_BOOT */
-	#ifdef CONFIG_NAND_BOOT
+	} else if (!strcmp(devtype, "rknand")) {
 		type = IF_TYPE_RKNAND;
 		boot_media = "nand";
-	#endif /* CONFIG_NAND_BOOT */
-	#ifdef CONFIG_NOR_BOOT
-		type = IF_TYPE_SPI_NOR;
-	#endif /* CONFIG_NOR_BOOT */
+	} else {
+		/* Add new to support */
+	}
 
 	/* For current use(Only EMMC support!) */
 	if (!type) {
 		type = IF_TYPE_MMC;
 		boot_media = "emmc";
+		printf("Use emmc as default boot media\n");
 	}
 
 	if (!appended && boot_media) {

commit d5bbff804fbade799dd6aaf4ae887154a8eb1859
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sun Feb 25 16:38:10 2018 +0800

    rockchip: test-timer: support ARM64 px30
    
    Add px30 timer 1 base;
    Add support for read arm64 arch counter.
    
    Change-Id: I8ea8b6835647d063d1c9a0fa579df0522b0f2c11
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/test/rockchip/test-timer.c b/test/rockchip/test-timer.c
index f7b7db0cb6..8a2d656e04 100644
--- a/test/rockchip/test-timer.c
+++ b/test/rockchip/test-timer.c
@@ -40,6 +40,9 @@
 #elif defined(CONFIG_ROCKCHIP_RK3399)
 #define TIMER_BASE		(0xFF850000 + 0x20)	/* TIMER 1 */
 #define TIMER_IRQ		IRQ_TIMER1
+#elif defined(CONFIG_ROCKCHIP_PX30)
+#define TIMER_BASE		(0xFF210000 + 0x20)	/* TIMER 1 */
+#define TIMER_IRQ		IRQ_TIMER1
 #else
 "Missing definitions of timer module test"
 #endif
@@ -93,7 +96,11 @@ static inline uint64_t arch_counter_get_cntpct(void)
 	uint64_t cval;
 
 	isb();
+#ifdef CONFIG_ARM64
+	asm volatile("mrs %0, cntpct_el0" : "=r" (cval));
+#else
 	asm volatile("mrrc p15, 0, %Q0, %R0, c14" : "=r" (cval));
+#endif
 	return cval;
 }
 

commit eb80c6bc09b80acab6491a04037eb9d6f96a3e9a
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sun Feb 25 15:08:09 2018 +0800

    rockchip: test: fix size warning in arm64
    
    Fix warning in emmc and nand test case.
    
    Change-Id: Id879e22b2f735d4d72be9a98dd7d9b074b8185ae
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/test/rockchip/test-emmc.c b/test/rockchip/test-emmc.c
index 05406d3eac..7dc538e45d 100644
--- a/test/rockchip/test-emmc.c
+++ b/test/rockchip/test-emmc.c
@@ -69,7 +69,7 @@ int board_emmc_test(int argc, char * const argv[])
 	/* 2. Prepare and start cli command */
 
 	snprintf(cmd_mmc, sizeof(cmd_mmc), "mmc write 0x%x 0x%x 0x%x",
-		 (u32)write_buffer, lba, blocks);
+		 (u32)(ulong)write_buffer, lba, blocks);
 	ts = get_timer(0);
 	err = cli_simple_run_command(cmd_mmc, 0);
 	ts = get_timer(0) - ts;
@@ -80,7 +80,7 @@ int board_emmc_test(int argc, char * const argv[])
 		blocks / 2048, ts, (blocks >> 1) / ts);
 
 	snprintf(cmd_mmc, sizeof(cmd_mmc), "mmc read 0x%x 0x%x 0x%x",
-		 (u32)read_buffer, lba, blocks);
+		 (u32)(ulong)read_buffer, lba, blocks);
 	ts = get_timer(0);
 	err = cli_simple_run_command(cmd_mmc, 0);
 	ts = get_timer(0) - ts;
diff --git a/test/rockchip/test-rknand.c b/test/rockchip/test-rknand.c
index de38b0d508..c02b003039 100644
--- a/test/rockchip/test-rknand.c
+++ b/test/rockchip/test-rknand.c
@@ -76,7 +76,7 @@ int board_rknand_test(int argc, char * const argv[])
 
 	snprintf(cmd_rknand, sizeof(cmd_rknand),
 		 "rknand write 0x%x 0x1000 0x%x",
-		 (u32)write_buffer, blocks);
+		 (u32)(ulong)write_buffer, blocks);
 	ts = get_timer(0);
 	err = cli_simple_run_command(cmd_rknand, 0);
 	ts = get_timer(0) - ts;
@@ -88,7 +88,7 @@ int board_rknand_test(int argc, char * const argv[])
 
 	snprintf(cmd_rknand, sizeof(cmd_rknand),
 		 "rknand read 0x%x 0x1000 0x%x",
-		 (u32)read_buffer, blocks);
+		 (u32)(ulong)read_buffer, blocks);
 	ts = get_timer(0);
 	err = cli_simple_run_command(cmd_rknand, 0);
 	ts = get_timer(0) - ts;

commit db8cda52f56e0ee141b1df81e39e1bf23a54bc7f
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Feb 24 18:03:55 2018 +0800

    part_efi: update part_get_info_efi() to reuse part info
    
    We use part_get_info_by_name to get partition, this will read MBR, GPT
    header and GPT entry every time, optimize to read only once.
    
    Change-Id: I4d6c508311f7cc661aa991b3c61460a2b8d63fac
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/disk/part_efi.c b/disk/part_efi.c
index 7582b6feb5..a83558a976 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -269,8 +269,15 @@ void part_print_efi(struct blk_desc *dev_desc)
 int part_get_info_efi(struct blk_desc *dev_desc, int part,
 		      disk_partition_t *info)
 {
-	ALLOC_CACHE_ALIGN_BUFFER_PAD(gpt_header, gpt_head, 1, dev_desc->blksz);
-	gpt_entry *gpt_pte = NULL;
+	static gpt_entry *gpt_pte = NULL;
+	static gpt_header *gpt_head = NULL;
+
+	if (!gpt_head)
+		gpt_head = memalign(ARCH_DMA_MINALIGN, dev_desc->blksz);
+
+	/* We suppose different dev have different size, eg. emmc vs sd */
+	if (!gpt_head && (gpt_head->last_usable_lba + 0x22) != dev_desc->lba)
+		gpt_pte = NULL;
 
 	/* "part" argument must be at least 1 */
 	if (part < 1) {
@@ -297,7 +304,6 @@ int part_get_info_efi(struct blk_desc *dev_desc, int part,
 	    !is_pte_valid(&gpt_pte[part - 1])) {
 		debug("%s: *** ERROR: Invalid partition number %d ***\n",
 			__func__, part);
-		free(gpt_pte);
 		return -1;
 	}
 
@@ -324,8 +330,6 @@ int part_get_info_efi(struct blk_desc *dev_desc, int part,
 	debug("%s: start 0x" LBAF ", size 0x" LBAF ", name %s\n", __func__,
 	      info->start, info->size, info->name);
 
-	/* Remember to free pte */
-	free(gpt_pte);
 	return 0;
 }
 
@@ -939,6 +943,10 @@ static int is_gpt_valid(struct blk_desc *dev_desc, u64 lba,
 		return 0;
 	}
 
+	/* Re-use pte if it's not NULL */
+	if (*pgpt_pte)
+		return 1;
+
 	ALLOC_CACHE_ALIGN_BUFFER(legacy_mbr, mbr, dev_desc->blksz);
 
 	/* Read MBR Header from device */

commit 9edad0e87725fc79b21189ba2c4b57c30b87d114
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Feb 24 17:42:55 2018 +0800

    configs: rockchip: Enable pwm config for evb-px30
    
    The backlight need to use the pwm interface.
    
    Change-Id: I7b36b7116d16c974413e43178f0f5826a1e1902c
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index e47b2b75c5..8cce86aa2c 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -47,6 +47,7 @@ CONFIG_REGULATOR_PWM=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_REGULATOR_RK8XX=y
 CONFIG_DM_CHARGE_DISPLAY=y
+CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000

commit 35aeff25db8f005161bb82eb223fba3cbb536938
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Feb 24 17:39:46 2018 +0800

    dts: rockchip: Add backlight support for px30-evb
    
    The backlight uses the pwm1.
    
    Change-Id: Ic546c82c075210d7c85d99f99f51406729db3146
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/dts/px30-evb.dts b/arch/arm/dts/px30-evb.dts
index 2fee4918b3..10b39e2cb1 100644
--- a/arch/arm/dts/px30-evb.dts
+++ b/arch/arm/dts/px30-evb.dts
@@ -59,6 +59,45 @@
 			press-threshold-microvolt = <614000>;
 		};
 	};
+
+	backlight: backlight {
+		compatible = "pwm-backlight";
+		pwms = <&pwm1 0 25000 0>;
+		brightness-levels = <
+			  0   1   2   3   4   5   6   7
+			  8   9  10  11  12  13  14  15
+			 16  17  18  19  20  21  22  23
+			 24  25  26  27  28  29  30  31
+			 32  33  34  35  36  37  38  39
+			 40  41  42  43  44  45  46  47
+			 48  49  50  51  52  53  54  55
+			 56  57  58  59  60  61  62  63
+			 64  65  66  67  68  69  70  71
+			 72  73  74  75  76  77  78  79
+			 80  81  82  83  84  85  86  87
+			 88  89  90  91  92  93  94  95
+			 96  97  98  99 100 101 102 103
+			104 105 106 107 108 109 110 111
+			112 113 114 115 116 117 118 119
+			120 121 122 123 124 125 126 127
+			128 129 130 131 132 133 134 135
+			136 137 138 139 140 141 142 143
+			144 145 146 147 148 149 150 151
+			152 153 154 155 156 157 158 159
+			160 161 162 163 164 165 166 167
+			168 169 170 171 172 173 174 175
+			176 177 178 179 180 181 182 183
+			184 185 186 187 188 189 190 191
+			192 193 194 195 196 197 198 199
+			200 201 202 203 204 205 206 207
+			208 209 210 211 212 213 214 215
+			216 217 218 219 220 221 222 223
+			224 225 226 227 228 229 230 231
+			232 233 234 235 236 237 238 239
+			240 241 242 243 244 245 246 247
+			248 249 250 251 252 253 254 255>;
+		default-brightness-level = <200>;
+	};
 };
 
 
@@ -350,6 +389,10 @@
 	status = "okay";
 };
 
+&pwm1 {
+	status = "okay";
+};
+
 &saradc {
 	status = "okay";
 };

commit a166f9e7373e43a3333b67db8a0aaaa0946399b0
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Feb 24 17:27:28 2018 +0800

    pwm: rk_pwm: Add pwm support for rk3328
    
    The pwm of rk3328 is almost the same as rk3288, except
    the lock feature, would implement in feature.
    
    Change-Id: I22650128c456f25aa9815718386c50142cac404a
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/pwm/rk_pwm.c b/drivers/pwm/rk_pwm.c
index 7d3e11d667..9eb3b369d0 100644
--- a/drivers/pwm/rk_pwm.c
+++ b/drivers/pwm/rk_pwm.c
@@ -106,6 +106,7 @@ static const struct pwm_ops rk_pwm_ops = {
 
 static const struct udevice_id rk_pwm_ids[] = {
 	{ .compatible = "rockchip,rk3288-pwm" },
+	{ .compatible = "rockchip,rk3328-pwm" },
 	{ }
 };
 

commit d2866b3201e096051554c2f7219d91c940ac8bd4
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Thu Jan 25 15:27:10 2018 +0100

    rockchip: clk: guard set_parent implementations against OF_PLATDATA
    
    The set_parent implementations do not make sense when OF_PLATDATA is
    enabled.  We guard these against OF_PLATDATA and don't populate the
    set_parent-op when this is the case.
    
    Change-Id: I37c384bf6851666550b8b3902d79b9278cff5074
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index d5b17c0c3a..fc5c75e263 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -964,7 +964,7 @@ static int rk3288_clk_set_phase(struct clk *clk, int degrees)
 	return ret;
 }
 
-static int rk3288_gmac_set_parent(struct clk *clk, struct clk *parent)
+static int __maybe_unused rk3288_gmac_set_parent(struct clk *clk, struct clk *parent)
 {
 	struct rk3288_clk_priv *priv = dev_get_priv(clk->dev);
 	struct rk3288_cru *cru = priv->cru;
@@ -1002,7 +1002,7 @@ static int rk3288_gmac_set_parent(struct clk *clk, struct clk *parent)
 	return -EINVAL;
 }
 
-static int rk3288_clk_set_parent(struct clk *clk, struct clk *parent)
+static int __maybe_unused rk3288_clk_set_parent(struct clk *clk, struct clk *parent)
 {
 	switch (clk->id) {
 	case SCLK_MAC:
@@ -1020,7 +1020,9 @@ static struct clk_ops rk3288_clk_ops = {
 	.set_rate	= rk3288_clk_set_rate,
 	.get_phase	= rk3288_clk_get_phase,
 	.set_phase	= rk3288_clk_set_phase,
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
 	.set_parent	= rk3288_clk_set_parent,
+#endif
 };
 
 static int rk3288_clk_ofdata_to_platdata(struct udevice *dev)
diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c
index fab315caff..37b1a41ccd 100644
--- a/drivers/clk/rockchip/clk_rk3368.c
+++ b/drivers/clk/rockchip/clk_rk3368.c
@@ -520,7 +520,7 @@ static ulong rk3368_clk_set_rate(struct clk *clk, ulong rate)
 	return ret;
 }
 
-static int rk3368_gmac_set_parent(struct clk *clk, struct clk *parent)
+static int __maybe_unused rk3368_gmac_set_parent(struct clk *clk, struct clk *parent)
 {
 	struct rk3368_clk_priv *priv = dev_get_priv(clk->dev);
 	struct rk3368_cru *cru = priv->cru;
@@ -557,7 +557,7 @@ static int rk3368_gmac_set_parent(struct clk *clk, struct clk *parent)
 	return -EINVAL;
 }
 
-static int rk3368_clk_set_parent(struct clk *clk, struct clk *parent)
+static int __maybe_unused rk3368_clk_set_parent(struct clk *clk, struct clk *parent)
 {
 	switch (clk->id) {
 	case SCLK_MAC:
@@ -571,7 +571,9 @@ static int rk3368_clk_set_parent(struct clk *clk, struct clk *parent)
 static struct clk_ops rk3368_clk_ops = {
 	.get_rate = rk3368_clk_get_rate,
 	.set_rate = rk3368_clk_set_rate,
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
 	.set_parent = rk3368_clk_set_parent,
+#endif
 };
 
 static int rk3368_clk_probe(struct udevice *dev)
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 1ca6b91fc2..b86f9f4b05 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -943,7 +943,7 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate)
 	return ret;
 }
 
-static int rk3399_gmac_set_parent(struct clk *clk, struct clk *parent)
+static int __maybe_unused rk3399_gmac_set_parent(struct clk *clk, struct clk *parent)
 {
 	struct rk3399_clk_priv *priv = dev_get_priv(clk->dev);
 	const char *clock_output_name;
@@ -978,7 +978,7 @@ static int rk3399_gmac_set_parent(struct clk *clk, struct clk *parent)
 	return -EINVAL;
 }
 
-static int rk3399_clk_set_parent(struct clk *clk, struct clk *parent)
+static int __maybe_unused rk3399_clk_set_parent(struct clk *clk, struct clk *parent)
 {
 	switch (clk->id) {
 	case SCLK_RMII_SRC:
@@ -1006,7 +1006,9 @@ static int rk3399_clk_enable(struct clk *clk)
 static struct clk_ops rk3399_clk_ops = {
 	.get_rate = rk3399_clk_get_rate,
 	.set_rate = rk3399_clk_set_rate,
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
 	.set_parent = rk3399_clk_set_parent,
+#endif
 	.enable = rk3399_clk_enable,
 };
 

commit b2477abafdf5ddff73639f8cf6b5057f36021774
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Jan 13 14:07:04 2018 +0800

    clk: rockchip: clk_rk3368: Implement "assign-clock-parent"
    
    Implement the setting parent for gmac clock, and add internal
    pll div set for mac clk.
    
    Change-Id: I4f75d0c1e35bbe7ff0af07d05dbb42f4732d5eb7
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3368.h b/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
index 5f6a5fbe4c..6a6fe4775d 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
@@ -95,6 +95,13 @@ enum {
 	CLK_SARADC_DIV_CON_WIDTH	= 8,
 
 	/* CLKSEL43_CON */
+	GMAC_DIV_CON_SHIFT		= 0x0,
+	GMAC_DIV_CON_MASK		= GENMASK(4, 0),
+	GMAC_PLL_SHIFT			= 6,
+	GMAC_PLL_MASK			= GENMASK(7, 6),
+	GMAC_PLL_SELECT_NEW		= (0x0 << GMAC_PLL_SHIFT),
+	GMAC_PLL_SELECT_CODEC		= (0x1 << GMAC_PLL_SHIFT),
+	GMAC_PLL_SELECT_GENERAL		= (0x2 << GMAC_PLL_SHIFT),
 	GMAC_MUX_SEL_EXTCLK             = BIT(8),
 
 	/* CLKSEL51_CON */
diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c
index 1af10891fb..fab315caff 100644
--- a/drivers/clk/rockchip/clk_rk3368.c
+++ b/drivers/clk/rockchip/clk_rk3368.c
@@ -311,15 +311,43 @@ static ulong rk3368_ddr_set_clk(struct rk3368_cru *cru, ulong set_rate)
 #endif
 
 #if CONFIG_IS_ENABLED(GMAC_ROCKCHIP)
-static ulong rk3368_gmac_set_clk(struct rk3368_cru *cru,
-				 ulong clk_id, ulong set_rate)
+static ulong rk3368_gmac_set_clk(struct rk3368_cru *cru, ulong set_rate)
 {
+	ulong ret;
+
 	/*
-	 * This models the 'assigned-clock-parents = <&ext_gmac>' from
-	 * the DTS and switches to the 'ext_gmac' clock parent.
+	 * The gmac clock can be derived either from an external clock
+	 * or can be generated from internally by a divider from SCLK_MAC.
 	 */
-	rk_setreg(&cru->clksel_con[43], GMAC_MUX_SEL_EXTCLK);
-	return set_rate;
+	if (readl(&cru->clksel_con[43]) & GMAC_MUX_SEL_EXTCLK) {
+		/* An external clock will always generate the right rate... */
+		ret = set_rate;
+	} else {
+		u32 con = readl(&cru->clksel_con[43]);
+		ulong pll_rate;
+		u8 div;
+
+		if (((con >> GMAC_PLL_SHIFT) & GMAC_PLL_MASK) ==
+		    GMAC_PLL_SELECT_GENERAL)
+			pll_rate = GPLL_HZ;
+		else if (((con >> GMAC_PLL_SHIFT) & GMAC_PLL_MASK) ==
+			 GMAC_PLL_SELECT_CODEC)
+			pll_rate = CPLL_HZ;
+		else
+			/* CPLL is not set */
+			return -EPERM;
+
+		div = DIV_ROUND_UP(pll_rate, set_rate) - 1;
+		if (div <= 0x1f)
+			rk_clrsetreg(&cru->clksel_con[43], GMAC_DIV_CON_MASK,
+				     div << GMAC_DIV_CON_SHIFT);
+		else
+			debug("Unsupported div for gmac:%d\n", div);
+
+		return DIV_TO_RATE(pll_rate, div);
+	}
+
+	return ret;
 }
 #endif
 
@@ -479,7 +507,7 @@ static ulong rk3368_clk_set_rate(struct clk *clk, ulong rate)
 #if CONFIG_IS_ENABLED(GMAC_ROCKCHIP)
 	case SCLK_MAC:
 		/* select the external clock */
-		ret = rk3368_gmac_set_clk(priv->cru, clk->id, rate);
+		ret = rk3368_gmac_set_clk(priv->cru, rate);
 		break;
 #endif
 	case SCLK_SARADC:
@@ -492,9 +520,58 @@ static ulong rk3368_clk_set_rate(struct clk *clk, ulong rate)
 	return ret;
 }
 
+static int rk3368_gmac_set_parent(struct clk *clk, struct clk *parent)
+{
+	struct rk3368_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3368_cru *cru = priv->cru;
+	const char *clock_output_name;
+	int ret;
+
+	/*
+	 * If the requested parent is in the same clock-controller and
+	 * the id is SCLK_MAC ("sclk_mac"), switch to the internal
+	 * clock.
+	 */
+	if ((parent->dev == clk->dev) && (parent->id == SCLK_MAC)) {
+		debug("%s: switching GAMC to SCLK_MAC\n", __func__);
+		rk_clrreg(&cru->clksel_con[43], GMAC_MUX_SEL_EXTCLK);
+		return 0;
+	}
+
+	/*
+	 * Otherwise, we need to check the clock-output-names of the
+	 * requested parent to see if the requested id is "ext_gmac".
+	 */
+	ret = dev_read_string_index(parent->dev, "clock-output-names",
+				    parent->id, &clock_output_name);
+	if (ret < 0)
+		return -ENODATA;
+
+	/* If this is "ext_gmac", switch to the external clock input */
+	if (!strcmp(clock_output_name, "ext_gmac")) {
+		debug("%s: switching GMAC to external clock\n", __func__);
+		rk_setreg(&cru->clksel_con[43], GMAC_MUX_SEL_EXTCLK);
+		return 0;
+	}
+
+	return -EINVAL;
+}
+
+static int rk3368_clk_set_parent(struct clk *clk, struct clk *parent)
+{
+	switch (clk->id) {
+	case SCLK_MAC:
+		return rk3368_gmac_set_parent(clk, parent);
+	}
+
+	debug("%s: unsupported clk %ld\n", __func__, clk->id);
+	return -ENOENT;
+}
+
 static struct clk_ops rk3368_clk_ops = {
 	.get_rate = rk3368_clk_get_rate,
 	.set_rate = rk3368_clk_set_rate,
+	.set_parent = rk3368_clk_set_parent,
 };
 
 static int rk3368_clk_probe(struct udevice *dev)

commit b0b687083556912fcd77170684cec67b062f7900
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Jan 13 14:06:33 2018 +0800

    clk: rockchip: clk_rk3288: Implement "assign-clock-parent" and "assign-clock-rate"
    
    The RK3288 CRU-node assigns rates to a number of clocks that are not
    implemented in the RK3288 clock-driver (but which have been
    sufficiently initialised from rkclk_init()): for these clocks, we
    implement the gmac clock set parent, but simply ignore the
    others' set_rate() operation and return 0 to signal success.
    
    Change-Id: Ic1a41634aba674001beb0e7e5ca3f7f2fa008e51
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index 431ff89e21..d5b17c0c3a 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -295,15 +295,42 @@ static int pll_para_config(ulong freq_hz, struct pll_div *div, uint *ext_div)
 	return 0;
 }
 
-static int rockchip_mac_set_clk(struct rk3288_cru *cru,
-				  int periph, uint freq)
+static int rockchip_mac_set_clk(struct rk3288_cru *cru, uint freq)
 {
-	/* Assuming mac_clk is fed by an external clock */
-	rk_clrsetreg(&cru->cru_clksel_con[21],
-		     RMII_EXTCLK_MASK,
-		     RMII_EXTCLK_SELECT_EXT_CLK << RMII_EXTCLK_SHIFT);
+	ulong ret;
+
+	/*
+	 * The gmac clock can be derived either from an external clock
+	 * or can be generated from internally by a divider from SCLK_MAC.
+	 */
+	if (readl(&cru->cru_clksel_con[21]) & RMII_EXTCLK_MASK) {
+		/* An external clock will always generate the right rate... */
+		ret = freq;
+	} else {
+		u32 con = readl(&cru->cru_clksel_con[21]);
+		ulong pll_rate;
+		u8 div;
+
+		if (((con >> EMAC_PLL_SHIFT) & EMAC_PLL_MASK) ==
+		    EMAC_PLL_SELECT_GENERAL)
+			pll_rate = GPLL_HZ;
+		else if (((con >> EMAC_PLL_SHIFT) & EMAC_PLL_MASK) ==
+			 EMAC_PLL_SELECT_CODEC)
+			pll_rate = CPLL_HZ;
+		else
+			pll_rate = NPLL_HZ;
+
+		div = DIV_ROUND_UP(pll_rate, freq) - 1;
+		if (div <= 0x1f)
+			rk_clrsetreg(&cru->cru_clksel_con[21], MAC_DIV_CON_MASK,
+				     div << MAC_DIV_CON_SHIFT);
+		else
+			debug("Unsupported div for gmac:%d\n", div);
+
+		return DIV_TO_RATE(pll_rate, div);
+	}
 
-	 return 0;
+	return ret;
 }
 
 static int rockchip_vop_set_clk(struct rk3288_cru *cru, struct rk3288_grf *grf,
@@ -747,7 +774,7 @@ static ulong rk3288_clk_set_rate(struct clk *clk, ulong rate)
 		break;
 #ifndef CONFIG_SPL_BUILD
 	case SCLK_MAC:
-		new_rate = rockchip_mac_set_clk(priv->cru, clk->id, rate);
+		new_rate = rockchip_mac_set_clk(priv->cru, rate);
 		break;
 	case DCLK_VOP0:
 	case DCLK_VOP1:
@@ -800,6 +827,17 @@ static ulong rk3288_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_SARADC:
 		new_rate = rockchip_saradc_set_clk(priv->cru, rate);
 		break;
+	case PLL_GPLL:
+	case PLL_CPLL:
+	case PLL_NPLL:
+	case ACLK_CPU:
+	case HCLK_CPU:
+	case PCLK_CPU:
+	case ACLK_PERI:
+	case HCLK_PERI:
+	case PCLK_PERI:
+	case SCLK_UART0:
+		return 0;
 	default:
 		return -ENOENT;
 	}
@@ -926,11 +964,63 @@ static int rk3288_clk_set_phase(struct clk *clk, int degrees)
 	return ret;
 }
 
+static int rk3288_gmac_set_parent(struct clk *clk, struct clk *parent)
+{
+	struct rk3288_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3288_cru *cru = priv->cru;
+	const char *clock_output_name;
+	int ret;
+
+	/*
+	 * If the requested parent is in the same clock-controller and
+	 * the id is SCLK_MAC_PLL ("mac_pll_src"), switch to the internal
+	 * clock.
+	 */
+	if ((parent->dev == clk->dev) && (parent->id == SCLK_MAC_PLL)) {
+		debug("%s: switching GAMC to SCLK_MAC_PLL\n", __func__);
+		rk_clrsetreg(&cru->cru_clksel_con[21], RMII_EXTCLK_MASK, 0);
+		return 0;
+	}
+
+	/*
+	 * Otherwise, we need to check the clock-output-names of the
+	 * requested parent to see if the requested id is "ext_gmac".
+	 */
+	ret = dev_read_string_index(parent->dev, "clock-output-names",
+				    parent->id, &clock_output_name);
+	if (ret < 0)
+		return -ENODATA;
+
+	/* If this is "ext_gmac", switch to the external clock input */
+	if (!strcmp(clock_output_name, "ext_gmac")) {
+		debug("%s: switching GMAC to external clock\n", __func__);
+		rk_clrsetreg(&cru->cru_clksel_con[21], RMII_EXTCLK_MASK,
+			     RMII_EXTCLK_SELECT_EXT_CLK << RMII_EXTCLK_SHIFT);
+		return 0;
+	}
+
+	return -EINVAL;
+}
+
+static int rk3288_clk_set_parent(struct clk *clk, struct clk *parent)
+{
+	switch (clk->id) {
+	case SCLK_MAC:
+		return rk3288_gmac_set_parent(clk, parent);
+	case SCLK_USBPHY480M_SRC:
+		return 0;
+	}
+
+	debug("%s: unsupported clk %ld\n", __func__, clk->id);
+	return -ENOENT;
+}
+
 static struct clk_ops rk3288_clk_ops = {
 	.get_rate	= rk3288_clk_get_rate,
 	.set_rate	= rk3288_clk_set_rate,
 	.get_phase	= rk3288_clk_get_phase,
 	.set_phase	= rk3288_clk_set_phase,
+	.set_parent	= rk3288_clk_set_parent,
 };
 
 static int rk3288_clk_ofdata_to_platdata(struct udevice *dev)
diff --git a/include/dt-bindings/clock/rk3288-cru.h b/include/dt-bindings/clock/rk3288-cru.h
index 216eee5b59..e37113a72d 100644
--- a/include/dt-bindings/clock/rk3288-cru.h
+++ b/include/dt-bindings/clock/rk3288-cru.h
@@ -76,6 +76,7 @@
 #define SCLK_PVTM_CORE		123
 #define SCLK_PVTM_GPU		124
 
+#define SCLK_MAC_PLL		150
 #define SCLK_MAC		151
 #define SCLK_MACREF_OUT		152
 

commit 506b2ea9fbbe2eb3463971ce1f104eae586781b3
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Jan 13 14:06:16 2018 +0800

    ARM: dts: rk3288: Remove unused LCDC clock assigned
    
    The LCDC assigned rate is 0, it will make boot error,
    error log:"pll_para_config: the frequency can not be
     0 Hz". Remove them, and the lcdc driver will do the
    correct clock rate setting.
    
    Change-Id: Ic189f6747e36a2f4083f81d9db899a9f44fe0936
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index da518783e2..2c8a616782 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -604,19 +604,16 @@
 		u-boot,dm-pre-reloc;
 		#clock-cells = <1>;
 		#reset-cells = <1>;
-		assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>,
-				  <&cru PLL_GPLL>, <&cru PLL_CPLL>,
+		assigned-clocks = <&cru PLL_GPLL>, <&cru PLL_CPLL>,
 				  <&cru PLL_NPLL>, <&cru ACLK_CPU>,
 				  <&cru HCLK_CPU>, <&cru PCLK_CPU>,
 				  <&cru ACLK_PERI>, <&cru HCLK_PERI>,
 				  <&cru PCLK_PERI>;
-		assigned-clock-rates = <0>, <0>,
-				       <594000000>, <400000000>,
+		assigned-clock-rates = <594000000>, <400000000>,
 				       <500000000>, <300000000>,
 				       <150000000>, <75000000>,
 				       <300000000>, <150000000>,
 				       <75000000>;
-		assigned-clock-parents = <&cru PLL_NPLL>, <&cru PLL_GPLL>;
 	};
 
 	grf: syscon@ff770000 {

commit ba37392aaf3c7df5af04067780d97efb5259a3e5
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Jan 13 14:05:51 2018 +0800

    config: evb-rk3229: Enable rk gmac configs
    
    Add gmac config support for rk3229 evb.
    
    Change-Id: I11514c969b35c7418aae6c0c66fe7003d3aa3b5c
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index 13e46d9e0b..94051e7e3b 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -46,6 +46,7 @@ CONFIG_TPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_TPL_DM=y
+CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_TPL_REGMAP=y
@@ -59,6 +60,10 @@ CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PHY=y
 CONFIG_PINCTRL=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y

commit af166ffa36927dffc447d2337e2e62b1b120dc27
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Jan 13 14:05:30 2018 +0800

    net: gmac_rockchip: Add support for the RK3228 GMAC
    
    The GMAC in the RK3228 once again is identical to the incarnation in
    the RK3288 and the RK3399, except for where some of the configuration
    and control registers are located in the GRF.
    
    This adds the RK3368-specific logic necessary to reuse this driver.
    
    Change-Id: Iba16013ad469196e0d0674fa62d1dcecf6749968
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/drivers/net/gmac_rockchip.c b/drivers/net/gmac_rockchip.c
index 8e83bb7402..1eb7ce1aa1 100644
--- a/drivers/net/gmac_rockchip.c
+++ b/drivers/net/gmac_rockchip.c
@@ -15,6 +15,7 @@
 #include <asm/arch/periph.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/hardware.h>
+#include <asm/arch/grf_rk322x.h>
 #include <asm/arch/grf_rk3288.h>
 #include <asm/arch/grf_rk3328.h>
 #include <asm/arch/grf_rk3368.h>
@@ -80,6 +81,39 @@ static int gmac_rockchip_ofdata_to_platdata(struct udevice *dev)
 	return designware_eth_ofdata_to_platdata(dev);
 }
 
+static int rk3228_gmac_fix_mac_speed(struct dw_eth_dev *priv)
+{
+	struct rk322x_grf *grf;
+	int clk;
+	enum {
+		RK3228_GMAC_CLK_SEL_SHIFT = 8,
+		RK3228_GMAC_CLK_SEL_MASK  = GENMASK(9, 8),
+		RK3228_GMAC_CLK_SEL_125M  = 0 << 8,
+		RK3228_GMAC_CLK_SEL_25M   = 3 << 8,
+		RK3228_GMAC_CLK_SEL_2_5M  = 2 << 8,
+	};
+
+	switch (priv->phydev->speed) {
+	case 10:
+		clk = RK3228_GMAC_CLK_SEL_2_5M;
+		break;
+	case 100:
+		clk = RK3228_GMAC_CLK_SEL_25M;
+		break;
+	case 1000:
+		clk = RK3228_GMAC_CLK_SEL_125M;
+		break;
+	default:
+		debug("Unknown phy speed: %d\n", priv->phydev->speed);
+		return -EINVAL;
+	}
+
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	rk_clrsetreg(&grf->mac_con[1], RK3228_GMAC_CLK_SEL_MASK, clk);
+
+	return 0;
+}
+
 static int rk3288_gmac_fix_mac_speed(struct dw_eth_dev *priv)
 {
 	struct rk3288_grf *grf;
@@ -232,6 +266,50 @@ static int rv1108_set_rmii_speed(struct dw_eth_dev *priv)
 	return 0;
 }
 
+static void rk3228_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata)
+{
+	struct rk322x_grf *grf;
+	enum {
+		RK3228_RMII_MODE_SHIFT = 10,
+		RK3228_RMII_MODE_MASK  = BIT(10),
+
+		RK3228_GMAC_PHY_INTF_SEL_SHIFT = 4,
+		RK3228_GMAC_PHY_INTF_SEL_MASK  = GENMASK(6, 4),
+		RK3228_GMAC_PHY_INTF_SEL_RGMII = BIT(4),
+
+		RK3228_RXCLK_DLY_ENA_GMAC_MASK = BIT(1),
+		RK3228_RXCLK_DLY_ENA_GMAC_DISABLE = 0,
+		RK3228_RXCLK_DLY_ENA_GMAC_ENABLE = BIT(1),
+
+		RK3228_TXCLK_DLY_ENA_GMAC_MASK = BIT(0),
+		RK3228_TXCLK_DLY_ENA_GMAC_DISABLE = 0,
+		RK3228_TXCLK_DLY_ENA_GMAC_ENABLE = BIT(0),
+	};
+	enum {
+		RK3228_CLK_RX_DL_CFG_GMAC_SHIFT = 0x7,
+		RK3228_CLK_RX_DL_CFG_GMAC_MASK = GENMASK(13, 7),
+
+		RK3228_CLK_TX_DL_CFG_GMAC_SHIFT = 0x0,
+		RK3228_CLK_TX_DL_CFG_GMAC_MASK = GENMASK(6, 0),
+	};
+
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	rk_clrsetreg(&grf->mac_con[1],
+		     RK3228_RMII_MODE_MASK |
+		     RK3228_GMAC_PHY_INTF_SEL_MASK |
+		     RK3228_RXCLK_DLY_ENA_GMAC_MASK |
+		     RK3228_TXCLK_DLY_ENA_GMAC_MASK,
+		     RK3228_GMAC_PHY_INTF_SEL_RGMII |
+		     RK3228_RXCLK_DLY_ENA_GMAC_ENABLE |
+		     RK3228_TXCLK_DLY_ENA_GMAC_ENABLE);
+
+	rk_clrsetreg(&grf->mac_con[0],
+		     RK3228_CLK_RX_DL_CFG_GMAC_MASK |
+		     RK3228_CLK_TX_DL_CFG_GMAC_MASK,
+		     pdata->rx_delay << RK3228_CLK_RX_DL_CFG_GMAC_SHIFT |
+		     pdata->tx_delay << RK3228_CLK_TX_DL_CFG_GMAC_SHIFT);
+}
+
 static void rk3288_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata)
 {
 	struct rk3288_grf *grf;
@@ -459,6 +537,11 @@ const struct eth_ops gmac_rockchip_eth_ops = {
 	.write_hwaddr		= designware_eth_write_hwaddr,
 };
 
+const struct rk_gmac_ops rk3228_gmac_ops = {
+	.fix_mac_speed = rk3228_gmac_fix_mac_speed,
+	.set_to_rgmii = rk3228_gmac_set_to_rgmii,
+};
+
 const struct rk_gmac_ops rk3288_gmac_ops = {
 	.fix_mac_speed = rk3288_gmac_fix_mac_speed,
 	.set_to_rgmii = rk3288_gmac_set_to_rgmii,
@@ -485,6 +568,8 @@ const struct rk_gmac_ops rv1108_gmac_ops = {
 };
 
 static const struct udevice_id rockchip_gmac_ids[] = {
+	{ .compatible = "rockchip,rk3228-gmac",
+	  .data = (ulong)&rk3228_gmac_ops },
 	{ .compatible = "rockchip,rk3288-gmac",
 	  .data = (ulong)&rk3288_gmac_ops },
 	{ .compatible = "rockchip,rk3328-gmac",

commit 58996dfcd4e8c9f7eda2d9765fdbd3a74396961e
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Jan 13 14:05:12 2018 +0800

    clk: rockchip: Add rk322x gamc clock support
    
    Assuming mac_clk is fed by an external clock, set clk_rmii_src
    clock select control register from IO for rgmii interface.
    
    Change-Id: I6405c3b2ead429084118c544bcc461e0b301d77a
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c
index edcf49f0e8..54b53c4d34 100644
--- a/drivers/clk/rockchip/clk_rk322x.c
+++ b/drivers/clk/rockchip/clk_rk322x.c
@@ -238,6 +238,41 @@ static ulong rockchip_mmc_get_clk(struct rk322x_cru *cru, uint clk_general_rate,
 	return DIV_TO_RATE(src_rate, div) / 2;
 }
 
+static ulong rk322x_mac_set_clk(struct rk322x_cru *cru, uint freq)
+{
+	ulong ret;
+
+	/*
+	 * The gmac clock can be derived either from an external clock
+	 * or can be generated from internally by a divider from SCLK_MAC.
+	 */
+	if (readl(&cru->cru_clksel_con[5]) & BIT(5)) {
+		/* An external clock will always generate the right rate... */
+		ret = freq;
+	} else {
+		u32 con = readl(&cru->cru_clksel_con[5]);
+		ulong pll_rate;
+		u8 div;
+
+		if ((con >> MAC_PLL_SEL_SHIFT) & MAC_PLL_SEL_MASK)
+			pll_rate = GPLL_HZ;
+		else
+			/* CPLL is not set */
+			return -EPERM;
+
+		div = DIV_ROUND_UP(pll_rate, freq) - 1;
+		if (div <= 0x1f)
+			rk_clrsetreg(&cru->cru_clksel_con[5], CLK_MAC_DIV_MASK,
+				     div << CLK_MAC_DIV_SHIFT);
+		else
+			debug("Unsupported div for gmac:%d\n", div);
+
+		return DIV_TO_RATE(pll_rate, div);
+	}
+
+	return ret;
+}
+
 static ulong rockchip_mmc_set_clk(struct rk322x_cru *cru, uint clk_general_rate,
 				  int periph, uint freq)
 {
@@ -378,6 +413,11 @@ static ulong rk322x_clk_set_rate(struct clk *clk, ulong rate)
 	case CLK_DDR:
 		new_rate = rk322x_ddr_set_clk(priv->cru, rate);
 		break;
+	case SCLK_MAC:
+		new_rate = rk322x_mac_set_clk(priv->cru, rate);
+		break;
+	case PLL_GPLL:
+		return 0;
 	default:
 		return -ENOENT;
 	}
@@ -385,9 +425,76 @@ static ulong rk322x_clk_set_rate(struct clk *clk, ulong rate)
 	return new_rate;
 }
 
+static int rk322x_gmac_set_parent(struct clk *clk, struct clk *parent)
+{
+	struct rk322x_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk322x_cru *cru = priv->cru;
+
+	/*
+	 * If the requested parent is in the same clock-controller and the id
+	 * is SCLK_MAC_SRC ("sclk_gmac_src"), switch to the internal clock.
+	 */
+	if ((parent->dev == clk->dev) && (parent->id == SCLK_MAC_SRC)) {
+		debug("%s: switching RGMII to SCLK_MAC_SRC\n", __func__);
+		rk_clrsetreg(&cru->cru_clksel_con[5], BIT(5), 0);
+		return 0;
+	}
+
+	/*
+	 * If the requested parent is in the same clock-controller and the id
+	 * is SCLK_MAC_EXTCLK (sclk_mac_extclk), switch to the external clock.
+	 */
+	if ((parent->dev == clk->dev) && (parent->id == SCLK_MAC_EXTCLK)) {
+		debug("%s: switching RGMII to SCLK_MAC_EXTCLK\n", __func__);
+		rk_clrsetreg(&cru->cru_clksel_con[5], BIT(5), BIT(5));
+		return 0;
+	}
+
+	return -EINVAL;
+}
+
+static int rk322x_gmac_extclk_set_parent(struct clk *clk, struct clk *parent)
+{
+	struct rk322x_clk_priv *priv = dev_get_priv(clk->dev);
+	const char *clock_output_name;
+	struct rk322x_cru *cru = priv->cru;
+	int ret;
+
+	ret = dev_read_string_index(parent->dev, "clock-output-names",
+				    parent->id, &clock_output_name);
+	if (ret < 0)
+		return -ENODATA;
+
+	if (!strcmp(clock_output_name, "ext_gmac")) {
+		debug("%s: switching gmac extclk to ext_gmac\n", __func__);
+		rk_clrsetreg(&cru->cru_clksel_con[29], BIT(10), 0);
+		return 0;
+	} else if (!strcmp(clock_output_name, "phy_50m_out")) {
+		debug("%s: switching gmac extclk to phy_50m_out\n", __func__);
+		rk_clrsetreg(&cru->cru_clksel_con[29], BIT(10), BIT(10));
+		return 0;
+	}
+
+	return -EINVAL;
+}
+
+static int rk322x_clk_set_parent(struct clk *clk, struct clk *parent)
+{
+	switch (clk->id) {
+	case SCLK_MAC:
+		return rk322x_gmac_set_parent(clk, parent);
+	case SCLK_MAC_EXTCLK:
+		return rk322x_gmac_extclk_set_parent(clk, parent);
+	}
+
+	debug("%s: unsupported clk %ld\n", __func__, clk->id);
+	return -ENOENT;
+}
+
 static struct clk_ops rk322x_clk_ops = {
 	.get_rate	= rk322x_clk_get_rate,
 	.set_rate	= rk322x_clk_set_rate,
+	.set_parent	= rk322x_clk_set_parent,
 };
 
 static int rk322x_clk_ofdata_to_platdata(struct udevice *dev)

commit ae0a27344f0b609dd6d4a3a14b2171b533d8db0b
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Jan 13 14:04:26 2018 +0800

    rockchip: pinctrl: rk322x: Move the iomux definitions into pinctrl-driver
    
    Clean the iomux definitions at grf_rk322x.h, and move them into
    pinctrl-driver for resolving the compiling error of redefinition.
    After that, define the uart2 iomux at rk322x-board file.
    
    Change-Id: If409e90706650de9fbe75b5c5fa47498cbbc79fe
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk322x.h b/arch/arm/include/asm/arch-rockchip/grf_rk322x.h
index c0c0d84cf1..52e5a0a0d5 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rk322x.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk322x.h
@@ -88,461 +88,6 @@ struct rk322x_sgrf {
 	unsigned int busdmac_con[4];
 };
 
-/* GRF_GPIO0A_IOMUX */
-enum {
-	GPIO0A7_SHIFT		= 14,
-	GPIO0A7_MASK		= 3 << GPIO0A7_SHIFT,
-	GPIO0A7_GPIO		= 0,
-	GPIO0A7_I2C3_SDA,
-	GPIO0A7_HDMI_DDCSDA,
-
-	GPIO0A6_SHIFT		= 12,
-	GPIO0A6_MASK		= 3 << GPIO0A6_SHIFT,
-	GPIO0A6_GPIO		= 0,
-	GPIO0A6_I2C3_SCL,
-	GPIO0A6_HDMI_DDCSCL,
-
-	GPIO0A3_SHIFT		= 6,
-	GPIO0A3_MASK		= 3 << GPIO0A3_SHIFT,
-	GPIO0A3_GPIO		= 0,
-	GPIO0A3_I2C1_SDA,
-	GPIO0A3_SDIO_CMD,
-
-	GPIO0A2_SHIFT		= 4,
-	GPIO0A2_MASK		= 3 << GPIO0A2_SHIFT,
-	GPIO0A2_GPIO		= 0,
-	GPIO0A2_I2C1_SCL,
-
-	GPIO0A1_SHIFT		= 2,
-	GPIO0A1_MASK		= 3 << GPIO0A1_SHIFT,
-	GPIO0A1_GPIO		= 0,
-	GPIO0A1_I2C0_SDA,
-
-	GPIO0A0_SHIFT		= 0,
-	GPIO0A0_MASK		= 3 << GPIO0A0_SHIFT,
-	GPIO0A0_GPIO		= 0,
-	GPIO0A0_I2C0_SCL,
-};
-
-/* GRF_GPIO0B_IOMUX */
-enum {
-	GPIO0B7_SHIFT		= 14,
-	GPIO0B7_MASK		= 3 << GPIO0B7_SHIFT,
-	GPIO0B7_GPIO		= 0,
-	GPIO0B7_HDMI_HDP,
-
-	GPIO0B6_SHIFT		= 12,
-	GPIO0B6_MASK		= 3 << GPIO0B6_SHIFT,
-	GPIO0B6_GPIO		= 0,
-	GPIO0B6_I2S_SDI,
-	GPIO0B6_SPI_CSN0,
-
-	GPIO0B5_SHIFT		= 10,
-	GPIO0B5_MASK		= 3 << GPIO0B5_SHIFT,
-	GPIO0B5_GPIO		= 0,
-	GPIO0B5_I2S_SDO,
-	GPIO0B5_SPI_RXD,
-
-	GPIO0B3_SHIFT		= 6,
-	GPIO0B3_MASK		= 3 << GPIO0B3_SHIFT,
-	GPIO0B3_GPIO		= 0,
-	GPIO0B3_I2S1_LRCKRX,
-	GPIO0B3_SPI_TXD,
-
-	GPIO0B1_SHIFT		= 2,
-	GPIO0B1_MASK		= 3 << GPIO0B1_SHIFT,
-	GPIO0B1_GPIO		= 0,
-	GPIO0B1_I2S_SCLK,
-	GPIO0B1_SPI_CLK,
-
-	GPIO0B0_SHIFT		= 0,
-	GPIO0B0_MASK		= 3,
-	GPIO0B0_GPIO		= 0,
-	GPIO0B0_I2S_MCLK,
-};
-
-/* GRF_GPIO0C_IOMUX */
-enum {
-	GPIO0C4_SHIFT		= 8,
-	GPIO0C4_MASK		= 3 << GPIO0C4_SHIFT,
-	GPIO0C4_GPIO		= 0,
-	GPIO0C4_HDMI_CECSDA,
-
-	GPIO0C1_SHIFT		= 2,
-	GPIO0C1_MASK		= 3 << GPIO0C1_SHIFT,
-	GPIO0C1_GPIO		= 0,
-	GPIO0C1_UART0_RSTN,
-	GPIO0C1_CLK_OUT1,
-};
-
-/* GRF_GPIO0D_IOMUX */
-enum {
-	GPIO0D6_SHIFT		= 12,
-	GPIO0D6_MASK		= 3 << GPIO0D6_SHIFT,
-	GPIO0D6_GPIO		= 0,
-	GPIO0D6_SDIO_PWREN,
-	GPIO0D6_PWM11,
-
-
-	GPIO0D4_SHIFT		= 8,
-	GPIO0D4_MASK		= 3 << GPIO0D4_SHIFT,
-	GPIO0D4_GPIO		= 0,
-	GPIO0D4_PWM2,
-
-	GPIO0D3_SHIFT		= 6,
-	GPIO0D3_MASK		= 3 << GPIO0D3_SHIFT,
-	GPIO0D3_GPIO		= 0,
-	GPIO0D3_PWM1,
-
-	GPIO0D2_SHIFT		= 4,
-	GPIO0D2_MASK		= 3 << GPIO0D2_SHIFT,
-	GPIO0D2_GPIO		= 0,
-	GPIO0D2_PWM0,
-};
-
-/* GRF_GPIO1A_IOMUX */
-enum {
-	GPIO1A7_SHIFT		= 14,
-	GPIO1A7_MASK		= 1,
-	GPIO1A7_GPIO		= 0,
-	GPIO1A7_SDMMC_WRPRT,
-};
-
-/* GRF_GPIO1B_IOMUX */
-enum {
-	GPIO1B7_SHIFT		= 14,
-	GPIO1B7_MASK		= 3 << GPIO1B7_SHIFT,
-	GPIO1B7_GPIO		= 0,
-	GPIO1B7_SDMMC_CMD,
-
-	GPIO1B6_SHIFT		= 12,
-	GPIO1B6_MASK		= 3 << GPIO1B6_SHIFT,
-	GPIO1B6_GPIO		= 0,
-	GPIO1B6_SDMMC_PWREN,
-
-	GPIO1B4_SHIFT		= 8,
-	GPIO1B4_MASK		= 3 << GPIO1B4_SHIFT,
-	GPIO1B4_GPIO		= 0,
-	GPIO1B4_SPI_CSN1,
-	GPIO1B4_PWM12,
-
-	GPIO1B3_SHIFT		= 6,
-	GPIO1B3_MASK		= 3 << GPIO1B3_SHIFT,
-	GPIO1B3_GPIO		= 0,
-	GPIO1B3_UART1_RSTN,
-	GPIO1B3_PWM13,
-
-	GPIO1B2_SHIFT		= 4,
-	GPIO1B2_MASK		= 3 << GPIO1B2_SHIFT,
-	GPIO1B2_GPIO		= 0,
-	GPIO1B2_UART1_SIN,
-	GPIO1B2_UART21_SIN,
-
-	GPIO1B1_SHIFT		= 2,
-	GPIO1B1_MASK		= 3 << GPIO1B1_SHIFT,
-	GPIO1B1_GPIO		= 0,
-	GPIO1B1_UART1_SOUT,
-	GPIO1B1_UART21_SOUT,
-};
-
-/* GRF_GPIO1C_IOMUX */
-enum {
-	GPIO1C7_SHIFT		= 14,
-	GPIO1C7_MASK		= 3 << GPIO1C7_SHIFT,
-	GPIO1C7_GPIO		= 0,
-	GPIO1C7_NAND_CS3,
-	GPIO1C7_EMMC_RSTNOUT,
-
-	GPIO1C6_SHIFT		= 12,
-	GPIO1C6_MASK		= 3 << GPIO1C6_SHIFT,
-	GPIO1C6_GPIO		= 0,
-	GPIO1C6_NAND_CS2,
-	GPIO1C6_EMMC_CMD,
-
-
-	GPIO1C5_SHIFT		= 10,
-	GPIO1C5_MASK		= 3 << GPIO1C5_SHIFT,
-	GPIO1C5_GPIO		= 0,
-	GPIO1C5_SDMMC_D3,
-	GPIO1C5_JTAG_TMS,
-
-	GPIO1C4_SHIFT		= 8,
-	GPIO1C4_MASK		= 3 << GPIO1C4_SHIFT,
-	GPIO1C4_GPIO		= 0,
-	GPIO1C4_SDMMC_D2,
-	GPIO1C4_JTAG_TCK,
-
-	GPIO1C3_SHIFT		= 6,
-	GPIO1C3_MASK		= 3 << GPIO1C3_SHIFT,
-	GPIO1C3_GPIO		= 0,
-	GPIO1C3_SDMMC_D1,
-	GPIO1C3_UART2_SIN,
-
-	GPIO1C2_SHIFT		= 4,
-	GPIO1C2_MASK		= 3 << GPIO1C2_SHIFT ,
-	GPIO1C2_GPIO		= 0,
-	GPIO1C2_SDMMC_D0,
-	GPIO1C2_UART2_SOUT,
-
-	GPIO1C1_SHIFT		= 2,
-	GPIO1C1_MASK		= 3 << GPIO1C1_SHIFT,
-	GPIO1C1_GPIO		= 0,
-	GPIO1C1_SDMMC_DETN,
-
-	GPIO1C0_SHIFT		= 0,
-	GPIO1C0_MASK		= 3 << GPIO1C0_SHIFT,
-	GPIO1C0_GPIO		= 0,
-	GPIO1C0_SDMMC_CLKOUT,
-};
-
-/* GRF_GPIO1D_IOMUX */
-enum {
-	GPIO1D7_SHIFT		= 14,
-	GPIO1D7_MASK		= 3 << GPIO1D7_SHIFT,
-	GPIO1D7_GPIO		= 0,
-	GPIO1D7_NAND_D7,
-	GPIO1D7_EMMC_D7,
-
-	GPIO1D6_SHIFT		= 12,
-	GPIO1D6_MASK		= 3 << GPIO1D6_SHIFT,
-	GPIO1D6_GPIO		= 0,
-	GPIO1D6_NAND_D6,
-	GPIO1D6_EMMC_D6,
-
-	GPIO1D5_SHIFT		= 10,
-	GPIO1D5_MASK		= 3 << GPIO1D5_SHIFT,
-	GPIO1D5_GPIO		= 0,
-	GPIO1D5_NAND_D5,
-	GPIO1D5_EMMC_D5,
-
-	GPIO1D4_SHIFT		= 8,
-	GPIO1D4_MASK		= 3 << GPIO1D4_SHIFT,
-	GPIO1D4_GPIO		= 0,
-	GPIO1D4_NAND_D4,
-	GPIO1D4_EMMC_D4,
-
-	GPIO1D3_SHIFT		= 6,
-	GPIO1D3_MASK		= 3 << GPIO1D3_SHIFT,
-	GPIO1D3_GPIO		= 0,
-	GPIO1D3_NAND_D3,
-	GPIO1D3_EMMC_D3,
-
-	GPIO1D2_SHIFT		= 4,
-	GPIO1D2_MASK		= 3 << GPIO1D2_SHIFT,
-	GPIO1D2_GPIO		= 0,
-	GPIO1D2_NAND_D2,
-	GPIO1D2_EMMC_D2,
-
-	GPIO1D1_SHIFT		= 2,
-	GPIO1D1_MASK		= 3 << GPIO1D1_SHIFT,
-	GPIO1D1_GPIO		= 0,
-	GPIO1D1_NAND_D1,
-	GPIO1D1_EMMC_D1,
-
-	GPIO1D0_SHIFT		= 0,
-	GPIO1D0_MASK		= 3 << GPIO1D0_SHIFT,
-	GPIO1D0_GPIO		= 0,
-	GPIO1D0_NAND_D0,
-	GPIO1D0_EMMC_D0,
-};
-
-/* GRF_GPIO2A_IOMUX */
-enum {
-	GPIO2A7_SHIFT		= 14,
-	GPIO2A7_MASK		= 3 << GPIO2A7_SHIFT,
-	GPIO2A7_GPIO		= 0,
-	GPIO2A7_NAND_DQS,
-	GPIO2A7_EMMC_CLKOUT,
-
-	GPIO2A5_SHIFT		= 10,
-	GPIO2A5_MASK		= 3 << GPIO2A5_SHIFT,
-	GPIO2A5_GPIO		= 0,
-	GPIO2A5_NAND_WP,
-	GPIO2A5_EMMC_PWREN,
-
-	GPIO2A4_SHIFT		= 8,
-	GPIO2A4_MASK		= 3 << GPIO2A4_SHIFT,
-	GPIO2A4_GPIO		= 0,
-	GPIO2A4_NAND_RDY,
-	GPIO2A4_EMMC_CMD,
-
-	GPIO2A3_SHIFT		= 6,
-	GPIO2A3_MASK		= 3 << GPIO2A3_SHIFT,
-	GPIO2A3_GPIO		= 0,
-	GPIO2A3_NAND_RDN,
-	GPIO2A4_SPI1_CSN1,
-
-	GPIO2A2_SHIFT		= 4,
-	GPIO2A2_MASK		= 3 << GPIO2A2_SHIFT,
-	GPIO2A2_GPIO		= 0,
-	GPIO2A2_NAND_WRN,
-	GPIO2A4_SPI1_CSN0,
-
-	GPIO2A1_SHIFT		= 2,
-	GPIO2A1_MASK		= 3 << GPIO2A1_SHIFT,
-	GPIO2A1_GPIO		= 0,
-	GPIO2A1_NAND_CLE,
-	GPIO2A1_SPI1_TXD,
-
-	GPIO2A0_SHIFT		= 0,
-	GPIO2A0_MASK		= 3 << GPIO2A0_SHIFT,
-	GPIO2A0_GPIO		= 0,
-	GPIO2A0_NAND_ALE,
-	GPIO2A0_SPI1_RXD,
-};
-
-/* GRF_GPIO2B_IOMUX */
-enum {
-	GPIO2B7_SHIFT		= 14,
-	GPIO2B7_MASK		= 3 << GPIO2B7_SHIFT,
-	GPIO2B7_GPIO		= 0,
-	GPIO2B7_GMAC_RXER,
-
-	GPIO2B6_SHIFT		= 12,
-	GPIO2B6_MASK		= 3 << GPIO2B6_SHIFT,
-	GPIO2B6_GPIO		= 0,
-	GPIO2B6_GMAC_CLK,
-	GPIO2B6_MAC_LINK,
-
-	GPIO2B5_SHIFT		= 10,
-	GPIO2B5_MASK		= 3 << GPIO2B5_SHIFT,
-	GPIO2B5_GPIO		= 0,
-	GPIO2B5_GMAC_TXEN,
-
-	GPIO2B4_SHIFT		= 8,
-	GPIO2B4_MASK		= 3 << GPIO2B4_SHIFT,
-	GPIO2B4_GPIO		= 0,
-	GPIO2B4_GMAC_MDIO,
-
-	GPIO2B3_SHIFT		= 6,
-	GPIO2B3_MASK		= 3 << GPIO2B3_SHIFT,
-	GPIO2B3_GPIO		= 0,
-	GPIO2B3_GMAC_RXCLK,
-
-	GPIO2B2_SHIFT		= 4,
-	GPIO2B2_MASK		= 3 << GPIO2B2_SHIFT,
-	GPIO2B2_GPIO		= 0,
-	GPIO2B2_GMAC_CRS,
-
-	GPIO2B1_SHIFT		= 2,
-	GPIO2B1_MASK		= 3 << GPIO2B1_SHIFT,
-	GPIO2B1_GPIO		= 0,
-	GPIO2B1_GMAC_TXCLK,
-
-
-	GPIO2B0_SHIFT		= 0,
-	GPIO2B0_MASK		= 3 << GPIO2B0_SHIFT,
-	GPIO2B0_GPIO		= 0,
-	GPIO2B0_GMAC_RXDV,
-	GPIO2B0_MAC_SPEED_IOUT,
-};
-
-/* GRF_GPIO2C_IOMUX */
-enum {
-	GPIO2C7_SHIFT		= 14,
-	GPIO2C7_MASK		= 3 << GPIO2C7_SHIFT,
-	GPIO2C7_GPIO		= 0,
-	GPIO2C7_GMAC_TXD3,
-
-	GPIO2C6_SHIFT		= 12,
-	GPIO2C6_MASK		= 3 << GPIO2C6_SHIFT,
-	GPIO2C6_GPIO		= 0,
-	GPIO2C6_GMAC_TXD2,
-
-	GPIO2C5_SHIFT		= 10,
-	GPIO2C5_MASK		= 3 << GPIO2C5_SHIFT,
-	GPIO2C5_GPIO		= 0,
-	GPIO2C5_I2C2_SCL,
-	GPIO2C5_GMAC_RXD2,
-
-	GPIO2C4_SHIFT		= 8,
-	GPIO2C4_MASK		= 3 << GPIO2C4_SHIFT,
-	GPIO2C4_GPIO		= 0,
-	GPIO2C4_I2C2_SDA,
-	GPIO2C4_GMAC_RXD3,
-
-	GPIO2C3_SHIFT		= 6,
-	GPIO2C3_MASK		= 3 << GPIO2C3_SHIFT,
-	GPIO2C3_GPIO		= 0,
-	GPIO2C3_GMAC_TXD0,
-
-	GPIO2C2_SHIFT		= 4,
-	GPIO2C2_MASK		= 3 << GPIO2C2_SHIFT,
-	GPIO2C2_GPIO		= 0,
-	GPIO2C2_GMAC_TXD1,
-
-	GPIO2C1_SHIFT		= 2,
-	GPIO2C1_MASK		= 3 << GPIO2C1_SHIFT,
-	GPIO2C1_GPIO		= 0,
-	GPIO2C1_GMAC_RXD0,
-
-	GPIO2C0_SHIFT		= 0,
-	GPIO2C0_MASK		= 3 << GPIO2C0_SHIFT,
-	GPIO2C0_GPIO		= 0,
-	GPIO2C0_GMAC_RXD1,
-};
-
-/* GRF_GPIO2D_IOMUX */
-enum {
-	GPIO2D1_SHIFT		= 2,
-	GPIO2D1_MASK		= 3 << GPIO2D1_SHIFT,
-	GPIO2D1_GPIO		= 0,
-	GPIO2D1_GMAC_MDC,
-
-	GPIO2D0_SHIFT		= 0,
-	GPIO2D0_MASK		= 3,
-	GPIO2D0_GPIO		= 0,
-	GPIO2D0_GMAC_COL,
-};
-
-/* GRF_GPIO3C_IOMUX */
-enum {
-	GPIO3C6_SHIFT		= 12,
-	GPIO3C6_MASK		= 3 << GPIO3C6_SHIFT,
-	GPIO3C6_GPIO		= 0,
-	GPIO3C6_DRV_VBUS1,
-
-	GPIO3C5_SHIFT		= 10,
-	GPIO3C5_MASK		= 3 << GPIO3C5_SHIFT,
-	GPIO3C5_GPIO		= 0,
-	GPIO3C5_PWM10,
-
-	GPIO3C1_SHIFT		= 2,
-	GPIO3C1_MASK		= 3 << GPIO3C1_SHIFT,
-	GPIO3C1_GPIO		= 0,
-	GPIO3C1_DRV_VBUS,
-};
-
-/* GRF_GPIO3D_IOMUX */
-enum {
-	GPIO3D2_SHIFT	= 4,
-	GPIO3D2_MASK	= 3 << GPIO3D2_SHIFT,
-	GPIO3D2_GPIO	= 0,
-	GPIO3D2_PWM3,
-};
-
-/* GRF_CON_IOMUX */
-enum {
-	CON_IOMUX_GMAC_SHIFT		= 15,
-	CON_IOMUX_GMAC_MASK	= 1 << CON_IOMUX_GMAC_SHIFT,
-	CON_IOMUX_UART1SEL_SHIFT	= 11,
-	CON_IOMUX_UART1SEL_MASK	= 1 << CON_IOMUX_UART1SEL_SHIFT,
-	CON_IOMUX_UART2SEL_SHIFT	= 8,
-	CON_IOMUX_UART2SEL_MASK	= 1 << CON_IOMUX_UART2SEL_SHIFT,
-	CON_IOMUX_UART2SEL_2	= 0,
-	CON_IOMUX_UART2SEL_21,
-	CON_IOMUX_EMMCSEL_SHIFT	= 7,
-	CON_IOMUX_EMMCSEL_MASK	= 1 << CON_IOMUX_EMMCSEL_SHIFT,
-	CON_IOMUX_PWM3SEL_SHIFT	= 3,
-	CON_IOMUX_PWM3SEL_MASK	= 1 << CON_IOMUX_PWM3SEL_SHIFT,
-	CON_IOMUX_PWM2SEL_SHIFT	= 2,
-	CON_IOMUX_PWM2SEL_MASK	= 1 << CON_IOMUX_PWM2SEL_SHIFT,
-	CON_IOMUX_PWM1SEL_SHIFT	= 1,
-	CON_IOMUX_PWM1SEL_MASK	= 1 << CON_IOMUX_PWM1SEL_SHIFT,
-	CON_IOMUX_PWM0SEL_SHIFT	= 0,
-	CON_IOMUX_PWM0SEL_MASK	= 1 << CON_IOMUX_PWM0SEL_SHIFT,
-};
-
 /* GRF_MACPHY_CON0 */
 enum {
 	MACPHY_CFG_ENABLE_SHIFT = 0,
diff --git a/arch/arm/mach-rockchip/rk322x/rk322x.c b/arch/arm/mach-rockchip/rk322x/rk322x.c
index 48c9884658..b38a308500 100644
--- a/arch/arm/mach-rockchip/rk322x/rk322x.c
+++ b/arch/arm/mach-rockchip/rk322x/rk322x.c
@@ -52,6 +52,25 @@ int arch_cpu_init(void)
 void board_debug_uart_init(void)
 {
 	static struct rk322x_grf * const grf = (void *)GRF_BASE;
+	enum {
+		GPIO1B2_SHIFT		= 4,
+		GPIO1B2_MASK		= 3 << GPIO1B2_SHIFT,
+		GPIO1B2_GPIO		= 0,
+		GPIO1B2_UART21_SIN,
+
+		GPIO1B1_SHIFT		= 2,
+		GPIO1B1_MASK		= 3 << GPIO1B1_SHIFT,
+		GPIO1B1_GPIO            = 0,
+		GPIO1B1_UART1_SOUT,
+		GPIO1B1_UART21_SOUT,
+	};
+	enum {
+		CON_IOMUX_UART2SEL_SHIFT= 8,
+		CON_IOMUX_UART2SEL_MASK	= 1 << CON_IOMUX_UART2SEL_SHIFT,
+		CON_IOMUX_UART2SEL_2	= 0,
+		CON_IOMUX_UART2SEL_21,
+	};
+
 	/* Enable early UART2 channel 1 on the RK322x */
 	rk_clrsetreg(&grf->gpio1b_iomux,
 		     GPIO1B1_MASK | GPIO1B2_MASK,

commit 895e4b943b18d21b2c0c5c24f04bcc626bc3ad91
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Jan 13 14:04:11 2018 +0800

    rockchip: dts: rk3328-evb: Enable gmac2io for rk3328-evb
    
    Add rk3328-evb gmac support.
    
    Change-Id: I1f6b33c27fd12c2039e9054246bb455095bd83ac
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts
index 4b13a8da64..d9faee410c 100644
--- a/arch/arm/dts/rk3328-evb.dts
+++ b/arch/arm/dts/rk3328-evb.dts
@@ -16,6 +16,13 @@
 		stdout-path = &uart2;
 	};
 
+	gmac_clkin: external-gmac-clock {
+		compatible = "fixed-clock";
+		clock-frequency = <125000000>;
+		clock-output-names = "gmac_clkin";
+		#clock-cells = <0>;
+	};
+
 	vcc3v3_sdmmc: sdmmc-pwren {
 		compatible = "regulator-fixed";
 		regulator-name = "vcc3v3";
@@ -41,6 +48,13 @@
 		regulator-min-microvolt = <5000000>;
 		regulator-max-microvolt = <5000000>;
 	};
+
+	vcc_phy: vcc-phy-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_phy";
+		regulator-always-on;
+		regulator-boot-on;
+	};
 };
 
 &saradc {
@@ -77,6 +91,22 @@
 	status = "okay";
 };
 
+&gmac2io {
+	phy-supply = <&vcc_phy>;
+	phy-mode = "rgmii";
+	clock_in_out = "input";
+	snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
+	snps,reset-active-low;
+	snps,reset-delays-us = <0 10000 50000>;
+	assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
+	assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&rgmiim1_pins>;
+	tx_delay = <0x26>;
+	rx_delay = <0x11>;
+	status = "okay";
+};
+
 &u2phy {
         status = "okay";
 };

commit 926d2d5e11e9d60230233663b27fc1a735b5f5ed
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Jan 13 14:03:56 2018 +0800

    rockchip: dts: rk3328: Add gmac2io support
    
    Add basic dts configuration for rk3328 gmac2io.
    
    Change-Id: I9f84d5dcd06966f11746aab4cdc241e9ceb27594
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi
index 2a4c4929d7..5b5a837536 100644
--- a/arch/arm/dts/rk3328.dtsi
+++ b/arch/arm/dts/rk3328.dtsi
@@ -500,6 +500,25 @@
 		status = "disabled";
 	};
 
+	gmac2io: ethernet@ff540000 {
+		compatible = "rockchip,rk3328-gmac";
+		reg = <0x0 0xff540000 0x0 0x10000>;
+		rockchip,grf = <&grf>;
+		interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "macirq";
+		clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_RX>,
+			 <&cru SCLK_MAC2IO_TX>, <&cru SCLK_MAC2IO_REF>,
+			 <&cru SCLK_MAC2IO_REFOUT>, <&cru ACLK_MAC2IO>,
+			 <&cru PCLK_MAC2IO>;
+		clock-names = "stmmaceth", "mac_clk_rx",
+			      "mac_clk_tx", "clk_mac_ref",
+			      "clk_mac_refout", "aclk_mac",
+			      "pclk_mac";
+		resets = <&cru SRST_GMAC2IO_A>;
+		reset-names = "stmmaceth";
+		status = "disabled";
+	};
+
 	usb_host0_ehci: usb@ff5c0000 {
 		compatible = "generic-ehci";
 		reg = <0x0 0xff5c0000 0x0 0x10000>;

commit 0d980b734ec89005b8524374ca290ef711499149
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Jan 13 14:03:23 2018 +0800

    rockchip: configs: Enable GMAC configs for evb-rk3328
    
    Enable GMAC configs for evb-rk3328
    
    Change-Id: I85d61ae4fedc3b6e9533b4913fa9666670f79356
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index bbd04b5209..0e3830485d 100644
--- a/configs/evb-rk3328_defconfig
+++ b/configs/evb-rk3328_defconfig
@@ -40,6 +40,7 @@ CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent
 CONFIG_TPL_OF_PLATDATA=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_TPL_DM=y
+CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_TPL_REGMAP=y
@@ -55,6 +56,10 @@ CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PHY=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_DM_PMIC=y

commit c36b26c0b3a7833628d37c8ff125c15aadbcf197
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Jan 13 14:03:04 2018 +0800

    net: gmac_rockchip: Add rk3328 gmac support
    
    The GMAC2IO in the RK3328 once again is identical to the incarnation in
    the RK3288 and the RK3399, except for where some of the configuration
    and control registers are located in the GRF.
    
    This adds the RK3328-specific logic necessary to reuse this driver.
    
    Change-Id: If00fc0dc957cf3e29faa1d1d0611a6e6edd29ced
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/drivers/net/gmac_rockchip.c b/drivers/net/gmac_rockchip.c
index f5f288ec82..8e83bb7402 100644
--- a/drivers/net/gmac_rockchip.c
+++ b/drivers/net/gmac_rockchip.c
@@ -16,6 +16,7 @@
 #include <asm/arch/clock.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/grf_rk3288.h>
+#include <asm/arch/grf_rk3328.h>
 #include <asm/arch/grf_rk3368.h>
 #include <asm/arch/grf_rk3399.h>
 #include <asm/arch/grf_rv1108.h>
@@ -105,6 +106,39 @@ static int rk3288_gmac_fix_mac_speed(struct dw_eth_dev *priv)
 	return 0;
 }
 
+static int rk3328_gmac_fix_mac_speed(struct dw_eth_dev *priv)
+{
+	struct rk3328_grf_regs *grf;
+	int clk;
+	enum {
+		RK3328_GMAC_CLK_SEL_SHIFT = 11,
+		RK3328_GMAC_CLK_SEL_MASK  = GENMASK(12, 11),
+		RK3328_GMAC_CLK_SEL_125M  = 0 << 11,
+		RK3328_GMAC_CLK_SEL_25M   = 3 << 11,
+		RK3328_GMAC_CLK_SEL_2_5M  = 2 << 11,
+	};
+
+	switch (priv->phydev->speed) {
+	case 10:
+		clk = RK3328_GMAC_CLK_SEL_2_5M;
+		break;
+	case 100:
+		clk = RK3328_GMAC_CLK_SEL_25M;
+		break;
+	case 1000:
+		clk = RK3328_GMAC_CLK_SEL_125M;
+		break;
+	default:
+		debug("Unknown phy speed: %d\n", priv->phydev->speed);
+		return -EINVAL;
+	}
+
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	rk_clrsetreg(&grf->mac_con[1], RK3328_GMAC_CLK_SEL_MASK, clk);
+
+	return 0;
+}
+
 static int rk3368_gmac_fix_mac_speed(struct dw_eth_dev *priv)
 {
 	struct rk3368_grf *grf;
@@ -218,6 +252,50 @@ static void rk3288_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata)
 		     pdata->tx_delay << RK3288_CLK_TX_DL_CFG_GMAC_SHIFT);
 }
 
+static void rk3328_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata)
+{
+	struct rk3328_grf_regs *grf;
+	enum {
+		RK3328_RMII_MODE_SHIFT = 9,
+		RK3328_RMII_MODE_MASK  = BIT(9),
+
+		RK3328_GMAC_PHY_INTF_SEL_SHIFT = 4,
+		RK3328_GMAC_PHY_INTF_SEL_MASK  = GENMASK(6, 4),
+		RK3328_GMAC_PHY_INTF_SEL_RGMII = BIT(4),
+
+		RK3328_RXCLK_DLY_ENA_GMAC_MASK = BIT(1),
+		RK3328_RXCLK_DLY_ENA_GMAC_DISABLE = 0,
+		RK3328_RXCLK_DLY_ENA_GMAC_ENABLE = BIT(1),
+
+		RK3328_TXCLK_DLY_ENA_GMAC_MASK = BIT(0),
+		RK3328_TXCLK_DLY_ENA_GMAC_DISABLE = 0,
+		RK3328_TXCLK_DLY_ENA_GMAC_ENABLE = BIT(0),
+	};
+	enum {
+		RK3328_CLK_RX_DL_CFG_GMAC_SHIFT = 0x7,
+		RK3328_CLK_RX_DL_CFG_GMAC_MASK = GENMASK(13, 7),
+
+		RK3328_CLK_TX_DL_CFG_GMAC_SHIFT = 0x0,
+		RK3328_CLK_TX_DL_CFG_GMAC_MASK = GENMASK(6, 0),
+	};
+
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	rk_clrsetreg(&grf->mac_con[1],
+		     RK3328_RMII_MODE_MASK |
+		     RK3328_GMAC_PHY_INTF_SEL_MASK |
+		     RK3328_RXCLK_DLY_ENA_GMAC_MASK |
+		     RK3328_TXCLK_DLY_ENA_GMAC_MASK,
+		     RK3328_GMAC_PHY_INTF_SEL_RGMII |
+		     RK3328_RXCLK_DLY_ENA_GMAC_MASK |
+		     RK3328_TXCLK_DLY_ENA_GMAC_ENABLE);
+
+	rk_clrsetreg(&grf->mac_con[0],
+		     RK3328_CLK_RX_DL_CFG_GMAC_MASK |
+		     RK3328_CLK_TX_DL_CFG_GMAC_MASK,
+		     pdata->rx_delay << RK3328_CLK_RX_DL_CFG_GMAC_SHIFT |
+		     pdata->tx_delay << RK3328_CLK_TX_DL_CFG_GMAC_SHIFT);
+}
+
 static void rk3368_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata)
 {
 	struct rk3368_grf *grf;
@@ -386,6 +464,11 @@ const struct rk_gmac_ops rk3288_gmac_ops = {
 	.set_to_rgmii = rk3288_gmac_set_to_rgmii,
 };
 
+const struct rk_gmac_ops rk3328_gmac_ops = {
+	.fix_mac_speed = rk3328_gmac_fix_mac_speed,
+	.set_to_rgmii = rk3328_gmac_set_to_rgmii,
+};
+
 const struct rk_gmac_ops rk3368_gmac_ops = {
 	.fix_mac_speed = rk3368_gmac_fix_mac_speed,
 	.set_to_rgmii = rk3368_gmac_set_to_rgmii,
@@ -404,6 +487,8 @@ const struct rk_gmac_ops rv1108_gmac_ops = {
 static const struct udevice_id rockchip_gmac_ids[] = {
 	{ .compatible = "rockchip,rk3288-gmac",
 	  .data = (ulong)&rk3288_gmac_ops },
+	{ .compatible = "rockchip,rk3328-gmac",
+	  .data = (ulong)&rk3328_gmac_ops },
 	{ .compatible = "rockchip,rk3368-gmac",
 	  .data = (ulong)&rk3368_gmac_ops },
 	{ .compatible = "rockchip,rk3399-gmac",

commit 07a48b3e0c0544018909234ed0a06956669f20de
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Jan 13 14:02:36 2018 +0800

    clk: rockchip: Add rk3328 gamc clock support
    
    The rk3328 soc has two gmac controllers, one is gmac2io,
    the other is gmac2phy. We use the gmac2io rgmii interface
    for 1000M phy here.
    
    Change-Id: I4963f03f6aea2c7196f33dae0bca38a432c80690
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c
index db79ffe3bd..dcf0d4028d 100644
--- a/drivers/clk/rockchip/clk_rk3328.c
+++ b/drivers/clk/rockchip/clk_rk3328.c
@@ -13,6 +13,7 @@
 #include <asm/arch/clock.h>
 #include <asm/arch/cru_rk3328.h>
 #include <asm/arch/hardware.h>
+#include <asm/arch/grf_rk3328.h>
 #include <asm/io.h>
 #include <dm/lists.h>
 #include <dt-bindings/clock/rk3328-cru.h>
@@ -94,6 +95,14 @@ enum {
 	PCLK_DBG_DIV_SHIFT		= 0,
 	PCLK_DBG_DIV_MASK		= 0xF << PCLK_DBG_DIV_SHIFT,
 
+	/* CLKSEL_CON27 */
+	GMAC2IO_PLL_SEL_SHIFT		= 7,
+	GMAC2IO_PLL_SEL_MASK		= 1 << GMAC2IO_PLL_SEL_SHIFT,
+	GMAC2IO_PLL_SEL_CPLL		= 0,
+	GMAC2IO_PLL_SEL_GPLL		= 1,
+	GMAC2IO_CLK_DIV_MASK		= 0x1f,
+	GMAC2IO_CLK_DIV_SHIFT		= 0,
+
 	/* CLKSEL_CON28 */
 	ACLK_PERIHP_PLL_SEL_CPLL	= 0,
 	ACLK_PERIHP_PLL_SEL_GPLL,
@@ -393,6 +402,44 @@ static ulong rk3328_i2c_set_clk(struct rk3328_cru *cru, ulong clk_id, uint hz)
 	return DIV_TO_RATE(GPLL_HZ, src_clk_div);
 }
 
+static ulong rk3328_gmac2io_set_clk(struct rk3328_cru *cru, ulong rate)
+{
+	struct rk3328_grf_regs *grf;
+	ulong ret;
+
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
+	/*
+	 * The RGMII CLK can be derived either from an external "clkin"
+	 * or can be generated from internally by a divider from SCLK_MAC.
+	 */
+	if (readl(&grf->mac_con[1]) & BIT(10) &&
+	    readl(&grf->soc_con[4]) & BIT(14)) {
+		/* An external clock will always generate the right rate... */
+		ret = rate;
+	} else {
+		u32 con = readl(&cru->clksel_con[27]);
+		ulong pll_rate;
+		u8 div;
+
+		if ((con >> GMAC2IO_PLL_SEL_SHIFT) & GMAC2IO_PLL_SEL_GPLL)
+			pll_rate = GPLL_HZ;
+		else
+			pll_rate = CPLL_HZ;
+
+		div = DIV_ROUND_UP(pll_rate, rate) - 1;
+		if (div <= 0x1f)
+			rk_clrsetreg(&cru->clksel_con[27], GMAC2IO_CLK_DIV_MASK,
+				     div << GMAC2IO_CLK_DIV_SHIFT);
+		else
+			debug("Unsupported div for gmac:%d\n", div);
+
+		return DIV_TO_RATE(pll_rate, div);
+	}
+
+	return ret;
+}
+
 static ulong rk3328_mmc_get_clk(struct rk3328_cru *cru, uint clk_id)
 {
 	u32 div, con, con_id;
@@ -558,12 +605,48 @@ static ulong rk3328_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_I2C3:
 		ret = rk3328_i2c_set_clk(priv->cru, clk->id, rate);
 		break;
+	case SCLK_MAC2IO:
+		ret = rk3328_gmac2io_set_clk(priv->cru, rate);
+		break;
 	case SCLK_PWM:
 		ret = rk3328_pwm_set_clk(priv->cru, rate);
 		break;
 	case SCLK_SARADC:
 		ret = rk3328_saradc_set_clk(priv->cru, rate);
 		break;
+	case DCLK_LCDC:
+	case SCLK_PDM:
+	case SCLK_RTC32K:
+	case SCLK_UART0:
+	case SCLK_UART1:
+	case SCLK_UART2:
+	case SCLK_SDIO:
+	case SCLK_TSP:
+	case SCLK_WIFI:
+	case ACLK_BUS_PRE:
+	case HCLK_BUS_PRE:
+	case PCLK_BUS_PRE:
+	case ACLK_PERI_PRE:
+	case HCLK_PERI:
+	case PCLK_PERI:
+	case ACLK_VIO_PRE:
+	case HCLK_VIO_PRE:
+	case ACLK_RGA_PRE:
+	case SCLK_RGA:
+	case ACLK_VOP_PRE:
+	case ACLK_RKVDEC_PRE:
+	case ACLK_RKVENC:
+	case ACLK_VPU_PRE:
+	case SCLK_VDEC_CABAC:
+	case SCLK_VDEC_CORE:
+	case SCLK_VENC_CORE:
+	case SCLK_VENC_DSP:
+	case SCLK_EFUSE:
+	case PCLK_DDR:
+	case ACLK_GMAC:
+	case PCLK_GMAC:
+	case SCLK_USB3OTG_SUSPEND:
+		return 0;
 	default:
 		return -ENOENT;
 	}
@@ -571,9 +654,104 @@ static ulong rk3328_clk_set_rate(struct clk *clk, ulong rate)
 	return ret;
 }
 
+static int rk3328_gmac2io_set_parent(struct clk *clk, struct clk *parent)
+{
+	struct rk3328_grf_regs *grf;
+	const char *clock_output_name;
+	int ret;
+
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
+	/*
+	 * If the requested parent is in the same clock-controller and the id
+	 * is SCLK_MAC2IO_SRC ("clk_mac2io_src"), switch to the internal clock.
+	 */
+	if ((parent->dev == clk->dev) && (parent->id == SCLK_MAC2IO_SRC)) {
+		debug("%s: switching RGMII to SCLK_MAC2IO_SRC\n", __func__);
+		rk_clrreg(&grf->mac_con[1], BIT(10));
+		return 0;
+	}
+
+	/*
+	 * Otherwise, we need to check the clock-output-names of the
+	 * requested parent to see if the requested id is "gmac_clkin".
+	 */
+	ret = dev_read_string_index(parent->dev, "clock-output-names",
+				    parent->id, &clock_output_name);
+	if (ret < 0)
+		return -ENODATA;
+
+	/* If this is "gmac_clkin", switch to the external clock input */
+	if (!strcmp(clock_output_name, "gmac_clkin")) {
+		debug("%s: switching RGMII to CLKIN\n", __func__);
+		rk_setreg(&grf->mac_con[1], BIT(10));
+		return 0;
+	}
+
+	return -EINVAL;
+}
+
+static int rk3328_gmac2io_ext_set_parent(struct clk *clk, struct clk *parent)
+{
+	struct rk3328_grf_regs *grf;
+	const char *clock_output_name;
+	int ret;
+
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
+	/*
+	 * If the requested parent is in the same clock-controller and the id
+	 * is SCLK_MAC2IO ("clk_mac2io"), switch to the internal clock.
+	 */
+	if ((parent->dev == clk->dev) && (parent->id == SCLK_MAC2IO)) {
+		debug("%s: switching RGMII to SCLK_MAC2IO\n", __func__);
+		rk_clrreg(&grf->soc_con[4], BIT(14));
+		return 0;
+	}
+
+	/*
+	 * Otherwise, we need to check the clock-output-names of the
+	 * requested parent to see if the requested id is "gmac_clkin".
+	 */
+	ret = dev_read_string_index(parent->dev, "clock-output-names",
+				    parent->id, &clock_output_name);
+	if (ret < 0)
+		return -ENODATA;
+
+	/* If this is "gmac_clkin", switch to the external clock input */
+	if (!strcmp(clock_output_name, "gmac_clkin")) {
+		debug("%s: switching RGMII to CLKIN\n", __func__);
+		rk_setreg(&grf->soc_con[4], BIT(14));
+		return 0;
+	}
+
+	return -EINVAL;
+}
+
+static int rk3328_clk_set_parent(struct clk *clk, struct clk *parent)
+{
+	switch (clk->id) {
+	case SCLK_MAC2IO:
+		return rk3328_gmac2io_set_parent(clk, parent);
+	case SCLK_MAC2IO_EXT:
+		return rk3328_gmac2io_ext_set_parent(clk, parent);
+	case DCLK_LCDC:
+	case SCLK_PDM:
+	case SCLK_RTC32K:
+	case SCLK_UART0:
+	case SCLK_UART1:
+	case SCLK_UART2:
+		return 0;
+	}
+
+	debug("%s: unsupported clk %ld\n", __func__, clk->id);
+	return -ENOENT;
+}
+
 static struct clk_ops rk3328_clk_ops = {
 	.get_rate = rk3328_clk_get_rate,
 	.set_rate = rk3328_clk_set_rate,
+	.set_parent = rk3328_clk_set_parent,
 };
 
 static int rk3328_clk_probe(struct udevice *dev)
diff --git a/include/dt-bindings/clock/rk3328-cru.h b/include/dt-bindings/clock/rk3328-cru.h
index 6d8bf1330b..cdc0b338aa 100644
--- a/include/dt-bindings/clock/rk3328-cru.h
+++ b/include/dt-bindings/clock/rk3328-cru.h
@@ -86,6 +86,9 @@
 #define SCLK_USB3OTG_SUSPEND	97
 #define SCLK_REF_USB3OTG_SRC	98
 #define SCLK_MAC2IO_SRC		99
+#define SCLK_MAC2IO		100
+#define SCLK_MAC2PHY		101
+#define SCLK_MAC2IO_EXT		102
 
 /* dclk gates */
 #define DCLK_LCDC		180
@@ -199,9 +202,6 @@
 
 #define CLK_NR_CLKS		(HCLK_HDCP + 1)
 
-#define SCLK_MAC2IO		0
-#define SCLK_MAC2PHY		1
-
 #define CLKGRF_NR_CLKS		(SCLK_MAC2PHY + 1)
 
 /* soft-reset indices */

commit 5431549b1ad41db031b1a20a9a5419a920164422
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Jan 13 14:01:45 2018 +0800

    rockchip: pinctrl: rk3328: Move the iomux definitions into pinctrl-driver
    
    Clean the iomux definitions at grf_rk3328.h, and move them into
    pinctrl-driver for resolving the compiling error of redefinition.
    
    Change-Id: I6297fa72bff03a0d0620982b2f8745cd1dbe2e8e
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3328.h b/arch/arm/include/asm/arch-rockchip/grf_rk3328.h
index f0a0781d8d..0c37f2ad18 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rk3328.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3328.h
@@ -131,118 +131,5 @@ struct rk3328_sgrf_regs {
 };
 check_member(rk3328_sgrf_regs, hdcp_key_access_mask, 0x2a0);
 
-enum {
-	/* GPIO0A_IOMUX */
-	GPIO0A5_SEL_SHIFT	= 10,
-	GPIO0A5_SEL_MASK	= 3 << GPIO0A5_SEL_SHIFT,
-	GPIO0A5_I2C3_SCL	= 2,
-
-	GPIO0A6_SEL_SHIFT	= 12,
-	GPIO0A6_SEL_MASK	= 3 << GPIO0A6_SEL_SHIFT,
-	GPIO0A6_I2C3_SDA	= 2,
-
-	GPIO0A7_SEL_SHIFT	= 14,
-	GPIO0A7_SEL_MASK	= 3 << GPIO0A7_SEL_SHIFT,
-	GPIO0A7_EMMC_DATA0	= 2,
-
-	/* GPIO0D_IOMUX*/
-	GPIO0D6_SEL_SHIFT	= 12,
-	GPIO0D6_SEL_MASK	= 3 << GPIO0D6_SEL_SHIFT,
-	GPIO0D6_GPIO		= 0,
-	GPIO0D6_SDMMC0_PWRENM1	= 3,
-
-	/* GPIO1A_IOMUX */
-	GPIO1A0_SEL_SHIFT	= 0,
-	GPIO1A0_SEL_MASK	= 0x3fff << GPIO1A0_SEL_SHIFT,
-	GPIO1A0_CARD_DATA_CLK_CMD_DETN	= 0x1555,
-
-	/* GPIO2A_IOMUX */
-	GPIO2A0_SEL_SHIFT	= 0,
-	GPIO2A0_SEL_MASK	= 3 << GPIO2A0_SEL_SHIFT,
-	GPIO2A0_UART2_TX_M1	= 1,
-
-	GPIO2A1_SEL_SHIFT	= 2,
-	GPIO2A1_SEL_MASK	= 3 << GPIO2A1_SEL_SHIFT,
-	GPIO2A1_UART2_RX_M1	= 1,
-
-	GPIO2A2_SEL_SHIFT	= 4,
-	GPIO2A2_SEL_MASK	= 3 << GPIO2A2_SEL_SHIFT,
-	GPIO2A2_PWM_IR		= 1,
-
-	GPIO2A4_SEL_SHIFT	= 8,
-	GPIO2A4_SEL_MASK	= 3 << GPIO2A4_SEL_SHIFT,
-	GPIO2A4_PWM_0		= 1,
-	GPIO2A4_I2C1_SDA,
-
-	GPIO2A5_SEL_SHIFT	= 10,
-	GPIO2A5_SEL_MASK	= 3 << GPIO2A5_SEL_SHIFT,
-	GPIO2A5_PWM_1		= 1,
-	GPIO2A5_I2C1_SCL,
-
-	GPIO2A6_SEL_SHIFT	= 12,
-	GPIO2A6_SEL_MASK	= 3 << GPIO2A6_SEL_SHIFT,
-	GPIO2A6_PWM_2		= 1,
-
-	GPIO2A7_SEL_SHIFT	= 14,
-	GPIO2A7_SEL_MASK	= 3 << GPIO2A7_SEL_SHIFT,
-	GPIO2A7_GPIO		= 0,
-	GPIO2A7_SDMMC0_PWRENM0,
-
-	/* GPIO2BL_IOMUX */
-	GPIO2BL0_SEL_SHIFT	= 0,
-	GPIO2BL0_SEL_MASK	= 0x3f << GPIO2BL0_SEL_SHIFT,
-	GPIO2BL0_SPI_CLK_TX_RX_M0	= 0x15,
-
-	GPIO2BL3_SEL_SHIFT	= 6,
-	GPIO2BL3_SEL_MASK	= 3 << GPIO2BL3_SEL_SHIFT,
-	GPIO2BL3_SPI_CSN0_M0	= 1,
-
-	GPIO2BL4_SEL_SHIFT	= 8,
-	GPIO2BL4_SEL_MASK	= 3 << GPIO2BL4_SEL_SHIFT,
-	GPIO2BL4_SPI_CSN1_M0	= 1,
-
-	GPIO2BL5_SEL_SHIFT	= 10,
-	GPIO2BL5_SEL_MASK	= 3 << GPIO2BL5_SEL_SHIFT,
-	GPIO2BL5_I2C2_SDA	= 1,
-
-	GPIO2BL6_SEL_SHIFT	= 12,
-	GPIO2BL6_SEL_MASK	= 3 << GPIO2BL6_SEL_SHIFT,
-	GPIO2BL6_I2C2_SCL	= 1,
-
-	/* GPIO2D_IOMUX */
-	GPIO2D0_SEL_SHIFT	= 0,
-	GPIO2D0_SEL_MASK	= 3 << GPIO2D0_SEL_SHIFT,
-	GPIO2D0_I2C0_SCL	= 1,
-
-	GPIO2D1_SEL_SHIFT	= 2,
-	GPIO2D1_SEL_MASK	= 3 << GPIO2D1_SEL_SHIFT,
-	GPIO2D1_I2C0_SDA	= 1,
-
-	GPIO2D4_SEL_SHIFT	= 8,
-	GPIO2D4_SEL_MASK	= 0xff << GPIO2D4_SEL_SHIFT,
-	GPIO2D4_EMMC_DATA1234	= 0xaa,
-
-	/* GPIO3C_IOMUX */
-	GPIO3C0_SEL_SHIFT	= 0,
-	GPIO3C0_SEL_MASK	= 0x3fff << GPIO3C0_SEL_SHIFT,
-	GPIO3C0_EMMC_DATA567_PWR_CLK_RSTN_CMD	= 0x2aaa,
-
-	/* COM_IOMUX */
-	IOMUX_SEL_UART2_SHIFT	= 0,
-	IOMUX_SEL_UART2_MASK	= 3 << IOMUX_SEL_UART2_SHIFT,
-	IOMUX_SEL_UART2_M0	= 0,
-	IOMUX_SEL_UART2_M1,
-
-	IOMUX_SEL_SPI_SHIFT	= 4,
-	IOMUX_SEL_SPI_MASK	= 3 << IOMUX_SEL_SPI_SHIFT,
-	IOMUX_SEL_SPI_M0	= 0,
-	IOMUX_SEL_SPI_M1,
-	IOMUX_SEL_SPI_M2,
-
-	IOMUX_SEL_SDMMC_SHIFT	= 7,
-	IOMUX_SEL_SDMMC_MASK	= 1 << IOMUX_SEL_SDMMC_SHIFT,
-	IOMUX_SEL_SDMMC_M0	= 0,
-	IOMUX_SEL_SDMMC_M1,
-};
 
 #endif	/* __SOC_ROCKCHIP_RK3328_GRF_H__ */
diff --git a/arch/arm/mach-rockchip/rk3328/rk3328.c b/arch/arm/mach-rockchip/rk3328/rk3328.c
index a8de952377..4856e464e7 100644
--- a/arch/arm/mach-rockchip/rk3328/rk3328.c
+++ b/arch/arm/mach-rockchip/rk3328/rk3328.c
@@ -72,6 +72,21 @@ void board_debug_uart_init(void)
 #ifdef CONFIG_TPL_BUILD
 	struct rk3328_grf_regs * const grf = (void *)GRF_BASE;
 	struct rk_uart * const uart = (void *)UART2_BASE;
+	enum{
+		GPIO2A0_SEL_SHIFT       = 0,
+		GPIO2A0_SEL_MASK        = 3 << GPIO2A0_SEL_SHIFT,
+		GPIO2A0_UART2_TX_M1     = 1,
+
+		GPIO2A1_SEL_SHIFT       = 2,
+		GPIO2A1_SEL_MASK        = 3 << GPIO2A1_SEL_SHIFT,
+		GPIO2A1_UART2_RX_M1     = 1,
+	};
+	enum {
+		IOMUX_SEL_UART2_SHIFT   = 0,
+		IOMUX_SEL_UART2_MASK    = 3 << IOMUX_SEL_UART2_SHIFT,
+		IOMUX_SEL_UART2_M0      = 0,
+		IOMUX_SEL_UART2_M1,
+	};
 
 	/* uart_sel_clk default select 24MHz */
 	writel((3 << (8 + 16)) | (2 << 8), CRU_BASE + 0x148);

commit 0a33ce653deee71d7ccbc64e2e3168db33a3c7c0
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Jan 13 14:01:12 2018 +0800

    net: gmac_rockchip: Add support for the RV1108 GMAC
    
    The rv1108 GMAC only support rmii interface, so need to add the
    set_rmii() ops. Use the phy current interface to set rmii or
    rgmii ops. At the same time, need to set the mac clock rate of
    rmii with 50M, the clock rate of rgmii with 125M.
    
    Change-Id: Ie669aefd1af254f4f7c71ac82decc01bd61e9e5b
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/drivers/net/gmac_rockchip.c b/drivers/net/gmac_rockchip.c
index 49cba41f52..f5f288ec82 100644
--- a/drivers/net/gmac_rockchip.c
+++ b/drivers/net/gmac_rockchip.c
@@ -18,6 +18,7 @@
 #include <asm/arch/grf_rk3288.h>
 #include <asm/arch/grf_rk3368.h>
 #include <asm/arch/grf_rk3399.h>
+#include <asm/arch/grf_rv1108.h>
 #include <dm/pinctrl.h>
 #include <dt-bindings/clock/rk3288-cru.h>
 #include "designware.h"
@@ -31,12 +32,14 @@ DECLARE_GLOBAL_DATA_PTR;
  */
 struct gmac_rockchip_platdata {
 	struct dw_eth_pdata dw_eth_pdata;
+	bool clock_input;
 	int tx_delay;
 	int rx_delay;
 };
 
 struct rk_gmac_ops {
 	int (*fix_mac_speed)(struct dw_eth_dev *priv);
+	void (*set_to_rmii)(struct gmac_rockchip_platdata *pdata);
 	void (*set_to_rgmii)(struct gmac_rockchip_platdata *pdata);
 };
 
@@ -55,6 +58,13 @@ void gmac_set_rgmii(struct udevice *dev, u32 tx_delay, u32 rx_delay)
 static int gmac_rockchip_ofdata_to_platdata(struct udevice *dev)
 {
 	struct gmac_rockchip_platdata *pdata = dev_get_platdata(dev);
+	const char *string;
+
+	string = dev_read_string(dev, "clock_in_out");
+	if (!strcmp(string, "input"))
+		pdata->clock_input = true;
+	else
+		pdata->clock_input = false;
 
 	/* Check the new naming-style first... */
 	pdata->tx_delay = dev_read_u32_default(dev, "tx_delay", -ENOENT);
@@ -153,6 +163,41 @@ static int rk3399_gmac_fix_mac_speed(struct dw_eth_dev *priv)
 	return 0;
 }
 
+static int rv1108_set_rmii_speed(struct dw_eth_dev *priv)
+{
+	struct rv1108_grf *grf;
+	int clk, speed;
+	enum {
+		RV1108_GMAC_SPEED_MASK		= BIT(2),
+		RV1108_GMAC_SPEED_10M		= 0 << 2,
+		RV1108_GMAC_SPEED_100M		= 1 << 2,
+		RV1108_GMAC_CLK_SEL_MASK	= BIT(7),
+		RV1108_GMAC_CLK_SEL_2_5M	= 0 << 7,
+		RV1108_GMAC_CLK_SEL_25M		= 1 << 7,
+	};
+
+	switch (priv->phydev->speed) {
+	case 10:
+		clk = RV1108_GMAC_CLK_SEL_2_5M;
+		speed = RV1108_GMAC_SPEED_10M;
+		break;
+	case 100:
+		clk = RV1108_GMAC_CLK_SEL_25M;
+		speed = RV1108_GMAC_SPEED_100M;
+		break;
+	default:
+		debug("Unknown phy speed: %d\n", priv->phydev->speed);
+		return -EINVAL;
+	}
+
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	rk_clrsetreg(&grf->gmac_con0,
+		     RV1108_GMAC_CLK_SEL_MASK | RV1108_GMAC_SPEED_MASK,
+		     clk | speed);
+
+	return 0;
+}
+
 static void rk3288_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata)
 {
 	struct rk3288_grf *grf;
@@ -232,25 +277,76 @@ static void rk3399_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata)
 		     pdata->tx_delay << RK3399_CLK_TX_DL_CFG_GMAC_SHIFT);
 }
 
+static void rv1108_gmac_set_to_rmii(struct gmac_rockchip_platdata *pdata)
+{
+	struct rv1108_grf *grf;
+
+	enum {
+		RV1108_GMAC_PHY_INTF_SEL_MASK  = GENMASK(6, 4),
+		RV1108_GMAC_PHY_INTF_SEL_RMII  = 4 << 4,
+	};
+
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	rk_clrsetreg(&grf->gmac_con0,
+		     RV1108_GMAC_PHY_INTF_SEL_MASK,
+		     RV1108_GMAC_PHY_INTF_SEL_RMII);
+}
+
 static int gmac_rockchip_probe(struct udevice *dev)
 {
 	struct gmac_rockchip_platdata *pdata = dev_get_platdata(dev);
 	struct rk_gmac_ops *ops =
 		(struct rk_gmac_ops *)dev_get_driver_data(dev);
+	struct dw_eth_pdata *dw_pdata = dev_get_platdata(dev);
+	struct eth_pdata *eth_pdata = &dw_pdata->eth_pdata;
 	struct clk clk;
+	ulong rate;
 	int ret;
 
 	ret = clk_get_by_index(dev, 0, &clk);
 	if (ret)
 		return ret;
 
-	/* Since mac_clk is fed by an external clock we can use 0 here */
-	ret = clk_set_rate(&clk, 0);
-	if (ret)
-		return ret;
+	switch (eth_pdata->phy_interface) {
+	case PHY_INTERFACE_MODE_RGMII:
+		/*
+		 * If the gmac clock is from internal pll, need to set and
+		 * check the return value for gmac clock at RGMII mode. If
+		 * the gmac clock is from external source, the clock rate
+		 * is not set, because of it is bypassed.
+		 */
+		if (!pdata->clock_input) {
+			rate = clk_set_rate(&clk, 125000000);
+			if (rate != 125000000)
+				return -EINVAL;
+		}
+
+		/* Set to RGMII mode */
+		if (ops->set_to_rgmii)
+			ops->set_to_rgmii(pdata);
+		else
+			return -EPERM;
 
-	/* Set to RGMII mode */
-	ops->set_to_rgmii(pdata);
+		break;
+	case PHY_INTERFACE_MODE_RMII:
+		/* The commet is the same as RGMII mode */
+		if (!pdata->clock_input) {
+			rate = clk_set_rate(&clk, 50000000);
+			if (rate != 50000000)
+				return -EINVAL;
+		}
+
+		/* Set to RMII mode */
+		if (ops->set_to_rmii)
+			ops->set_to_rmii(pdata);
+		else
+			return -EPERM;
+
+		break;
+	default:
+		debug("NO interface defined!\n");
+		return -ENXIO;
+	}
 
 	return designware_eth_probe(dev);
 }
@@ -300,6 +396,11 @@ const struct rk_gmac_ops rk3399_gmac_ops = {
 	.set_to_rgmii = rk3399_gmac_set_to_rgmii,
 };
 
+const struct rk_gmac_ops rv1108_gmac_ops = {
+	.fix_mac_speed = rv1108_set_rmii_speed,
+	.set_to_rmii = rv1108_gmac_set_to_rmii,
+};
+
 static const struct udevice_id rockchip_gmac_ids[] = {
 	{ .compatible = "rockchip,rk3288-gmac",
 	  .data = (ulong)&rk3288_gmac_ops },
@@ -307,6 +408,8 @@ static const struct udevice_id rockchip_gmac_ids[] = {
 	  .data = (ulong)&rk3368_gmac_ops },
 	{ .compatible = "rockchip,rk3399-gmac",
 	  .data = (ulong)&rk3399_gmac_ops },
+	{ .compatible = "rockchip,rv1108-gmac",
+	  .data = (ulong)&rv1108_gmac_ops },
 	{ }
 };
 

commit a1e3d296959e9db987307718f4d4704938e170b9
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Jan 13 13:53:57 2018 +0800

    rockchip: pinctrl: rv1108: Move the iomux definitions into pinctrl-driver
    
    If we include both the rk3288_grf.h and rv1108_grf.h, it will cause the
    conflicts of redefinition. Clean the iomux definitions at grf_rv1108.h,
    and move them into pinctrl-driver.
    
    Change-Id: Ie47ccd77963de909acf3494ad7e3ce20b3c560a6
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/arch/arm/include/asm/arch-rockchip/grf_rv1108.h b/arch/arm/include/asm/arch-rockchip/grf_rv1108.h
index a1c11a7604..999d679ced 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rv1108.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rv1108.h
@@ -150,405 +150,6 @@ struct rv1108_pmu_grf {
 };
 check_member(rv1108_pmu_grf, ceva_jtag_mask, 0x388);
 
-/* GRF_GPIO1B_IOMUX */
-enum {
-	GPIO1B7_SHIFT		= 14,
-	GPIO1B7_MASK		= 3 << GPIO1B7_SHIFT,
-	GPIO1B7_GPIO		= 0,
-	GPIO1B7_LCDC_D12,
-	GPIO1B7_I2S_SDIO2_M0,
-	GPIO1B7_GMAC_RXDV,
-
-	GPIO1B6_SHIFT		= 12,
-	GPIO1B6_MASK		= 3 << GPIO1B6_SHIFT,
-	GPIO1B6_GPIO		= 0,
-	GPIO1B6_LCDC_D13,
-	GPIO1B6_I2S_LRCLKTX_M0,
-	GPIO1B6_GMAC_RXD1,
-
-	GPIO1B5_SHIFT		= 10,
-	GPIO1B5_MASK		= 3 << GPIO1B5_SHIFT,
-	GPIO1B5_GPIO		= 0,
-	GPIO1B5_LCDC_D14,
-	GPIO1B5_I2S_SDIO1_M0,
-	GPIO1B5_GMAC_RXD0,
-
-	GPIO1B4_SHIFT		= 8,
-	GPIO1B4_MASK		= 3 << GPIO1B4_SHIFT,
-	GPIO1B4_GPIO		= 0,
-	GPIO1B4_LCDC_D15,
-	GPIO1B4_I2S_MCLK_M0,
-	GPIO1B4_GMAC_TXEN,
-
-	GPIO1B3_SHIFT		= 6,
-	GPIO1B3_MASK		= 3 << GPIO1B3_SHIFT,
-	GPIO1B3_GPIO		= 0,
-	GPIO1B3_LCDC_D16,
-	GPIO1B3_I2S_SCLK_M0,
-	GPIO1B3_GMAC_TXD1,
-
-	GPIO1B2_SHIFT		= 4,
-	GPIO1B2_MASK		= 3 << GPIO1B2_SHIFT,
-	GPIO1B2_GPIO		= 0,
-	GPIO1B2_LCDC_D17,
-	GPIO1B2_I2S_SDIO_M0,
-	GPIO1B2_GMAC_TXD0,
-
-	GPIO1B1_SHIFT		= 2,
-	GPIO1B1_MASK		= 3 << GPIO1B1_SHIFT,
-	GPIO1B1_GPIO		= 0,
-	GPIO1B1_LCDC_D9,
-	GPIO1B1_PWM7,
-
-	GPIO1B0_SHIFT		= 0,
-	GPIO1B0_MASK		= 3,
-	GPIO1B0_GPIO		= 0,
-	GPIO1B0_LCDC_D8,
-	GPIO1B0_PWM6,
-};
-
-/* GRF_GPIO1C_IOMUX */
-enum {
-	GPIO1C7_SHIFT		= 14,
-	GPIO1C7_MASK		= 3 << GPIO1C7_SHIFT,
-	GPIO1C7_GPIO		= 0,
-	GPIO1C7_CIF_D5,
-	GPIO1C7_I2S_SDIO2_M1,
-
-	GPIO1C6_SHIFT		= 12,
-	GPIO1C6_MASK		= 3 << GPIO1C6_SHIFT,
-	GPIO1C6_GPIO		= 0,
-	GPIO1C6_CIF_D4,
-	GPIO1C6_I2S_LRCLKTX_M1,
-
-	GPIO1C5_SHIFT		= 10,
-	GPIO1C5_MASK		= 3 << GPIO1C5_SHIFT,
-	GPIO1C5_GPIO		= 0,
-	GPIO1C5_LCDC_CLK,
-	GPIO1C5_GMAC_CLK,
-
-	GPIO1C4_SHIFT		= 8,
-	GPIO1C4_MASK		= 3 << GPIO1C4_SHIFT,
-	GPIO1C4_GPIO		= 0,
-	GPIO1C4_LCDC_HSYNC,
-	GPIO1C4_GMAC_MDC,
-
-	GPIO1C3_SHIFT		= 6,
-	GPIO1C3_MASK		= 3 << GPIO1C3_SHIFT,
-	GPIO1C3_GPIO		= 0,
-	GPIO1C3_LCDC_VSYNC,
-	GPIO1C3_GMAC_MDIO,
-
-	GPIO1C2_SHIFT		= 4,
-	GPIO1C2_MASK		= 3 << GPIO1C2_SHIFT,
-	GPIO1C2_GPIO		= 0,
-	GPIO1C2_LCDC_EN,
-	GPIO1C2_I2S_SDIO3_M0,
-	GPIO1C2_GMAC_RXER,
-
-	GPIO1C1_SHIFT		= 2,
-	GPIO1C1_MASK		= 3 << GPIO1C1_SHIFT,
-	GPIO1C1_GPIO		= 0,
-	GPIO1C1_LCDC_D10,
-	GPIO1C1_I2S_SDI_M0,
-	GPIO1C1_PWM4,
-
-	GPIO1C0_SHIFT		= 0,
-	GPIO1C0_MASK		= 3,
-	GPIO1C0_GPIO		= 0,
-	GPIO1C0_LCDC_D11,
-	GPIO1C0_I2S_LRCLKRX_M0,
-};
-
-/* GRF_GPIO1D_OIMUX */
-enum {
-	GPIO1D7_SHIFT		= 14,
-	GPIO1D7_MASK		= 3 << GPIO1D7_SHIFT,
-	GPIO1D7_GPIO		= 0,
-	GPIO1D7_HDMI_CEC,
-	GPIO1D7_DSP_RTCK,
-
-	GPIO1D6_SHIFT		= 12,
-	GPIO1D6_MASK		= 1 << GPIO1D6_SHIFT,
-	GPIO1D6_GPIO		= 0,
-	GPIO1D6_HDMI_HPD_M0,
-
-	GPIO1D5_SHIFT		= 10,
-	GPIO1D5_MASK		= 3 << GPIO1D5_SHIFT,
-	GPIO1D5_GPIO		= 0,
-	GPIO1D5_UART2_RTSN,
-	GPIO1D5_HDMI_SDA_M0,
-
-	GPIO1D4_SHIFT		= 8,
-	GPIO1D4_MASK		= 3 << GPIO1D4_SHIFT,
-	GPIO1D4_GPIO		= 0,
-	GPIO1D4_UART2_CTSN,
-	GPIO1D4_HDMI_SCL_M0,
-
-	GPIO1D3_SHIFT		= 6,
-	GPIO1D3_MASK		= 3 << GPIO1D3_SHIFT,
-	GPIO1D3_GPIO		= 0,
-	GPIO1D3_UART0_SOUT,
-	GPIO1D3_SPI_TXD_M0,
-
-	GPIO1D2_SHIFT		= 4,
-	GPIO1D2_MASK		= 3 << GPIO1D2_SHIFT,
-	GPIO1D2_GPIO		= 0,
-	GPIO1D2_UART0_SIN,
-	GPIO1D2_SPI_RXD_M0,
-	GPIO1D2_DSP_TDI,
-
-	GPIO1D1_SHIFT		= 2,
-	GPIO1D1_MASK		= 3 << GPIO1D1_SHIFT,
-	GPIO1D1_GPIO		= 0,
-	GPIO1D1_UART0_RTSN,
-	GPIO1D1_SPI_CSN0_M0,
-	GPIO1D1_DSP_TMS,
-
-	GPIO1D0_SHIFT		= 0,
-	GPIO1D0_MASK		= 3,
-	GPIO1D0_GPIO		= 0,
-	GPIO1D0_UART0_CTSN,
-	GPIO1D0_SPI_CLK_M0,
-	GPIO1D0_DSP_TCK,
-};
-
-/* GRF_GPIO2A_IOMUX */
-enum {
-	GPIO2A7_SHIFT		= 14,
-	GPIO2A7_MASK		= 3 << GPIO2A7_SHIFT,
-	GPIO2A7_GPIO		= 0,
-	GPIO2A7_FLASH_D7,
-	GPIO2A7_EMMC_D7,
-
-	GPIO2A6_SHIFT		= 12,
-	GPIO2A6_MASK		= 3 << GPIO2A6_SHIFT,
-	GPIO2A6_GPIO		= 0,
-	GPIO2A6_FLASH_D6,
-	GPIO2A6_EMMC_D6,
-
-	GPIO2A5_SHIFT		= 10,
-	GPIO2A5_MASK		= 3 << GPIO2A5_SHIFT,
-	GPIO2A5_GPIO		= 0,
-	GPIO2A5_FLASH_D5,
-	GPIO2A5_EMMC_D5,
-
-	GPIO2A4_SHIFT		= 8,
-	GPIO2A4_MASK		= 3 << GPIO2A4_SHIFT,
-	GPIO2A4_GPIO		= 0,
-	GPIO2A4_FLASH_D4,
-	GPIO2A4_EMMC_D4,
-
-	GPIO2A3_SHIFT		= 6,
-	GPIO2A3_MASK		= 3 << GPIO2A3_SHIFT,
-	GPIO2A3_GPIO		= 0,
-	GPIO2A3_FLASH_D3,
-	GPIO2A3_EMMC_D3,
-	GPIO2A3_SFC_HOLD_IO3,
-
-	GPIO2A2_SHIFT		= 4,
-	GPIO2A2_MASK		= 3 << GPIO2A2_SHIFT,
-	GPIO2A2_GPIO		= 0,
-	GPIO2A2_FLASH_D2,
-	GPIO2A2_EMMC_D2,
-	GPIO2A2_SFC_WP_IO2,
-
-	GPIO2A1_SHIFT		= 2,
-	GPIO2A1_MASK		= 3 << GPIO2A1_SHIFT,
-	GPIO2A1_GPIO		= 0,
-	GPIO2A1_FLASH_D1,
-	GPIO2A1_EMMC_D1,
-	GPIO2A1_SFC_SO_IO1,
-
-	GPIO2A0_SHIFT		= 0,
-	GPIO2A0_MASK		= 3 << GPIO2A0_SHIFT,
-	GPIO2A0_GPIO		= 0,
-	GPIO2A0_FLASH_D0,
-	GPIO2A0_EMMC_D0,
-	GPIO2A0_SFC_SI_IO0,
-};
-
-/* GRF_GPIO2B_IOMUX */
-enum {
-	GPIO2B7_SHIFT		= 14,
-	GPIO2B7_MASK		= 3 << GPIO2B7_SHIFT,
-	GPIO2B7_GPIO		= 0,
-	GPIO2B7_FLASH_CS1,
-	GPIO2B7_SFC_CLK,
-
-	GPIO2B6_SHIFT		= 12,
-	GPIO2B6_MASK		= 1 << GPIO2B6_SHIFT,
-	GPIO2B6_GPIO		= 0,
-	GPIO2B6_EMMC_CLKO,
-
-	GPIO2B5_SHIFT		= 10,
-	GPIO2B5_MASK		= 1 << GPIO2B5_SHIFT,
-	GPIO2B5_GPIO		= 0,
-	GPIO2B5_FLASH_CS0,
-
-	GPIO2B4_SHIFT		= 8,
-	GPIO2B4_MASK		= 3 << GPIO2B4_SHIFT,
-	GPIO2B4_GPIO		= 0,
-	GPIO2B4_FLASH_RDY,
-	GPIO2B4_EMMC_CMD,
-	GPIO2B4_SFC_CSN0,
-
-	GPIO2B3_SHIFT		= 6,
-	GPIO2B3_MASK		= 1 << GPIO2B3_SHIFT,
-	GPIO2B3_GPIO		= 0,
-	GPIO2B3_FLASH_RDN,
-
-	GPIO2B2_SHIFT		= 4,
-	GPIO2B2_MASK		= 1 << GPIO2B2_SHIFT,
-	GPIO2B2_GPIO		= 0,
-	GPIO2B2_FLASH_WRN,
-
-	GPIO2B1_SHIFT		= 2,
-	GPIO2B1_MASK		= 1 << GPIO2B1_SHIFT,
-	GPIO2B1_GPIO		= 0,
-	GPIO2B1_FLASH_CLE,
-
-	GPIO2B0_SHIFT		= 0,
-	GPIO2B0_MASK		= 1 << GPIO2B0_SHIFT,
-	GPIO2B0_GPIO		= 0,
-	GPIO2B0_FLASH_ALE,
-};
-
-/* GRF_GPIO2D_IOMUX */
-enum {
-	GPIO2D7_SHIFT		= 14,
-	GPIO2D7_MASK		= 1 << GPIO2D7_SHIFT,
-	GPIO2D7_GPIO		= 0,
-	GPIO2D7_SDIO_D0,
-
-	GPIO2D6_SHIFT		= 12,
-	GPIO2D6_MASK		= 1 << GPIO2D6_SHIFT,
-	GPIO2D6_GPIO		= 0,
-	GPIO2D6_SDIO_CMD,
-
-	GPIO2D5_SHIFT		= 10,
-	GPIO2D5_MASK		= 1 << GPIO2D5_SHIFT,
-	GPIO2D5_GPIO		= 0,
-	GPIO2D5_SDIO_CLKO,
-
-	GPIO2D4_SHIFT		= 8,
-	GPIO2D4_MASK		= 1 << GPIO2D4_SHIFT,
-	GPIO2D4_GPIO		= 0,
-	GPIO2D4_I2C1_SCL,
-
-	GPIO2D3_SHIFT		= 6,
-	GPIO2D3_MASK		= 1 << GPIO2D3_SHIFT,
-	GPIO2D3_GPIO		= 0,
-	GPIO2D3_I2C1_SDA,
-
-	GPIO2D2_SHIFT		= 4,
-	GPIO2D2_MASK		= 3 << GPIO2D2_SHIFT,
-	GPIO2D2_GPIO		= 0,
-	GPIO2D2_UART2_SOUT_M0,
-	GPIO2D2_JTAG_TCK,
-
-	GPIO2D1_SHIFT		= 2,
-	GPIO2D1_MASK		= 3 << GPIO2D1_SHIFT,
-	GPIO2D1_GPIO		= 0,
-	GPIO2D1_UART2_SIN_M0,
-	GPIO2D1_JTAG_TMS,
-	GPIO2D1_DSP_TMS,
-
-	GPIO2D0_SHIFT		= 0,
-	GPIO2D0_MASK		= 3,
-	GPIO2D0_GPIO		= 0,
-	GPIO2D0_UART0_CTSN,
-	GPIO2D0_SPI_CLK_M0,
-	GPIO2D0_DSP_TCK,
-};
-
-/* GRF_GPIO3A_IOMUX */
-enum {
-	GPIO3A7_SHIFT		= 14,
-	GPIO3A7_MASK		= 1 << GPIO3A7_SHIFT,
-	GPIO3A7_GPIO		= 0,
-
-	GPIO3A6_SHIFT		= 12,
-	GPIO3A6_MASK		= 3 << GPIO3A6_SHIFT,
-	GPIO3A6_GPIO		= 0,
-	GPIO3A6_UART1_SOUT,
-
-	GPIO3A5_SHIFT		= 10,
-	GPIO3A5_MASK		= 3 << GPIO3A5_SHIFT,
-	GPIO3A5_GPIO		= 0,
-	GPIO3A5_UART1_SIN,
-
-	GPIO3A4_SHIFT		= 8,
-	GPIO3A4_MASK		= 1 << GPIO3A4_SHIFT,
-	GPIO3A4_GPIO		= 0,
-	GPIO3A4_UART1_CTSN,
-
-	GPIO3A3_SHIFT		= 6,
-	GPIO3A3_MASK		= 1 << GPIO3A3_SHIFT,
-	GPIO3A3_GPIO		= 0,
-	GPIO3A3_UART1_RTSN,
-
-	GPIO3A2_SHIFT		= 4,
-	GPIO3A2_MASK		= 1 << GPIO3A2_SHIFT,
-	GPIO3A2_GPIO		= 0,
-	GPIO3A2_SDIO_D3,
-
-	GPIO3A1_SHIFT		= 2,
-	GPIO3A1_MASK		= 1 << GPIO3A1_SHIFT,
-	GPIO3A1_GPIO		= 0,
-	GPIO3A1_SDIO_D2,
-
-	GPIO3A0_SHIFT		= 0,
-	GPIO3A0_MASK		= 1,
-	GPIO3A0_GPIO		= 0,
-	GPIO3A0_SDIO_D1,
-};
-
-/* GRF_GPIO3C_IOMUX */
-enum {
-	GPIO3C7_SHIFT		= 14,
-	GPIO3C7_MASK		= 1 << GPIO3C7_SHIFT,
-	GPIO3C7_GPIO		= 0,
-	GPIO3C7_CIF_CLKI,
-
-	GPIO3C6_SHIFT		= 12,
-	GPIO3C6_MASK		= 1 << GPIO3C6_SHIFT,
-	GPIO3C6_GPIO		= 0,
-	GPIO3C6_CIF_VSYNC,
-
-	GPIO3C5_SHIFT		= 10,
-	GPIO3C5_MASK		= 1 << GPIO3C5_SHIFT,
-	GPIO3C5_GPIO		= 0,
-	GPIO3C5_SDMMC_CMD,
-
-	GPIO3C4_SHIFT		= 8,
-	GPIO3C4_MASK		= 1 << GPIO3C4_SHIFT,
-	GPIO3C4_GPIO		= 0,
-	GPIO3C4_SDMMC_CLKO,
-
-	GPIO3C3_SHIFT		= 6,
-	GPIO3C3_MASK		= 3 << GPIO3C3_SHIFT,
-	GPIO3C3_GPIO		= 0,
-	GPIO3C3_SDMMC_D0,
-	GPIO3C3_UART2_SOUT_M1,
-
-	GPIO3C2_SHIFT		= 4,
-	GPIO3C2_MASK		= 3 << GPIO3C2_SHIFT,
-	GPIO3C2_GPIO		= 0,
-	GPIO3C2_SDMMC_D1,
-	GPIO3C2_UART2_SIN_M1,
-
-	GPIOC1_SHIFT		= 2,
-	GPIOC1_MASK		= 1 << GPIOC1_SHIFT,
-	GPIOC1_GPIO		= 0,
-	GPIOC1_SDMMC_D2,
-
-	GPIOC0_SHIFT		= 0,
-	GPIOC0_MASK		= 1,
-	GPIO3C0_GPIO		= 0,
-	GPIO3C0_SDMMC_D3,
-};
-
 enum {
 	/* GRF_SOC_CON0 */
 	MSCH_MAINDDR3_SHIFT		= 4,
diff --git a/arch/arm/mach-rockchip/rv1108/rv1108.c b/arch/arm/mach-rockchip/rv1108/rv1108.c
index 44cf33359e..86bfdea237 100644
--- a/arch/arm/mach-rockchip/rv1108/rv1108.c
+++ b/arch/arm/mach-rockchip/rv1108/rv1108.c
@@ -21,11 +21,35 @@ void board_debug_uart_init(void)
 	struct rv1108_grf *grf = (void *)GRF_BASE;
 
 #if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0x10230000)
+	enum {
+		GPIO3A6_SHIFT           = 12,
+		GPIO3A6_MASK            = 3 << GPIO3A6_SHIFT,
+		GPIO3A6_GPIO            = 0,
+		GPIO3A6_UART1_SOUT,
+
+		GPIO3A5_SHIFT           = 10,
+		GPIO3A5_MASK            = 3 << GPIO3A5_SHIFT,
+		GPIO3A5_GPIO            = 0,
+		GPIO3A5_UART1_SIN,
+	};
+
 	rk_clrsetreg(&grf->gpio3a_iomux,	/* UART0 */
 		     GPIO3A6_MASK | GPIO3A5_MASK,
 		     GPIO3A6_UART1_SOUT << GPIO3A6_SHIFT |
 		     GPIO3A5_UART1_SIN << GPIO3A5_SHIFT);
 #else
+	enum {
+		GPIO2D2_SHIFT		= 4,
+		GPIO2D2_MASK		= 3 << GPIO2D2_SHIFT,
+		GPIO2D2_GPIO            = 0,
+		GPIO2D2_UART2_SOUT_M0,
+
+		GPIO2D1_SHIFT		= 2,
+		GPIO2D1_MASK		= 3 << GPIO2D1_SHIFT,
+		GPIO2D1_GPIO            = 0,
+		GPIO2D1_UART2_SIN_M0,
+	};
+
 	rk_clrsetreg(&grf->gpio2d_iomux,	/* UART2 */
 		     GPIO2D2_MASK | GPIO2D1_MASK,
 		     GPIO2D2_UART2_SOUT_M0 << GPIO2D2_SHIFT |

commit 329c0b944368d3346565b3deced506be6ed7367e
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Jan 13 13:53:56 2018 +0800

    rockchip: grf_rv1108.h: Fix the grf offsets
    
    The last 4 grf registers offset of rv1108 are wrong, fix them
    for correct usage.
    
    Change-Id: I4bbc7e8fcd04321d5ebcfb2c1a288ea49c0eddfc
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/arch/arm/include/asm/arch-rockchip/grf_rv1108.h b/arch/arm/include/asm/arch-rockchip/grf_rv1108.h
index a518b05727..a1c11a7604 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rv1108.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rv1108.h
@@ -101,13 +101,17 @@ struct rv1108_grf {
 	u32 reserved14[2];
 	u32 dma_con0;
 	u32 dma_con1;
-	u32 reserved15[539];
+	u32 reserved15[59];
 	u32 uoc_status;
+	u32 reserved16[2];
 	u32 host_status;
+	u32 reserved17[59];
 	u32 gmac_con0;
+	u32 reserved18[191];
 	u32 chip_id;
 };
-check_member(rv1108_grf, chip_id, 0xf90);
+
+check_member(rv1108_grf, chip_id, 0x0c00);
 
 struct rv1108_pmu_grf {
 	u32 gpioa_iomux;

commit bfcd5474588c9d8b7a9eed5d7826815568b377d9
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Jan 13 13:53:55 2018 +0800

    rockchip: configs: Enable CONFIG_NET_RANDOM_ETHADDR for rk3288-evb
    
    If the Ethernet address is not set, the network can't work,
    enable the random address config for default use.
    
    Change-Id: If639e0bc19f3b9dc749cbedc436a2d661f42d724
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig
index c68e5a26b5..406d2284c7 100644
--- a/configs/evb-rk3288_defconfig
+++ b/configs/evb-rk3288_defconfig
@@ -33,6 +33,7 @@ CONFIG_SPL_PARTITION_UUIDS=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_ENV_IS_IN_MMC=y
+CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y

commit 9991a2b18dcb4a9fed36e450fb73c7d3d74eceb3
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Jan 13 13:53:54 2018 +0800

    rockchip: dts: rk3399-evb: Change the tx/rx delay value for transmission quality
    
    Give the mac controller the correct tx-delay and rx-delay value
    for the rgmii mode transmission. If they are not matched, there
    would be Ethernet packets lost, the net feature may not work.
    
    Change-Id: I4ff6bd47fe75ff6b480de45df2e0e4e611e3950d
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts
index a0ea589015..0a81691bcb 100644
--- a/arch/arm/dts/rk3399-evb.dts
+++ b/arch/arm/dts/rk3399-evb.dts
@@ -277,7 +277,7 @@
 	assigned-clock-parents = <&clkin_gmac>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&rgmii_pins>;
-	tx_delay = <0x10>;
-	rx_delay = <0x10>;
+	tx_delay = <0x28>;
+	rx_delay = <0x11>;
 	status = "okay";
 };

commit a6de9238bf53efaa437da288f1cbf4f5321d9dca
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Jan 8 14:00:27 2018 +0100

    rockchip: clk: rk3399: accept all assigned-clocks from the 'cru'-node
    
    The RK3399 CRU-node assigns rates to a number of clocks that are not
    implemented in the RK3399 clock-driver (but which have been
    sufficiently initialised from rkclk_init()): for these clocks, we
    simply ignore the set_rate() operation and return 0 to signal success.
    
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: David Wu <david.wu@rock-chips.com>
    
    Series-changes: 2
    - Fixed David's email address.
    
    (cherry picked from commit d2f1f1abafbedd3580334f2564bfea918e49522d)
    
    Change-Id: Ic19614e75b76d8159cf03ac4adb180ca5a8688fd
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 3b7203e654..1ca6b91fc2 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -883,6 +883,24 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate)
 	switch (clk->id) {
 	case 0 ... 63:
 		return 0;
+
+	case ACLK_PERIHP:
+	case HCLK_PERIHP:
+	case PCLK_PERIHP:
+		return 0;
+
+	case ACLK_PERILP0:
+	case HCLK_PERILP0:
+	case PCLK_PERILP0:
+		return 0;
+
+	case ACLK_CCI:
+		return 0;
+
+	case HCLK_PERILP1:
+	case PCLK_PERILP1:
+		return 0;
+
 	case HCLK_SDMMC:
 	case SCLK_SDMMC:
 	case SCLK_EMMC:

commit 0b2881acbd7a4f32aaa8600efd9712e95698fe28
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Jan 8 13:59:18 2018 +0100

    clk: implement clk_set_defaults()
    
    Linux uses the properties 'assigned-clocks', 'assigned-clock-parents'
    and 'assigned-clock-rates' to configure the clock subsystem for use
    with various peripheral nodes.
    
    This implements clk_set_defaults() and hooks it up with the general
    device probibin in drivers/core/device.c: when a new device is probed,
    clk_set_defaults() will be called for it and will process the
    properties mentioned above.
    
    Note that this functionality is designed to fail gracefully (i.e. if a
    clock-driver does not implement set_parent(), we simply accept this
    and ignore the error) as not to break existing board-support.
    
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: David Wu <david.wu@rock-chips.com>
    
    Series-changes: 2
    - Fixed David's email address.
    
    Series-version: 2
    
    Cover-letter:
    clk: support assigned-clock, assigned-clock-parents, assigned-clock-rates
    
    For various peripherals on Rockchip SoCs (e.g. for the Ethernet GMAC),
    the parent-clock needs to be set via the DTS.  This adds the required
    plumbing and implements the GMAC case for the RK3399.
    END
    
    (cherry picked from commit f4fcba5c5baaaa9d477d753f97124efdb8e45893)
    
    Change-Id: I549891987c5a3e8546b96f1f54ad575950f92b12
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index 91dc01d619..2db84c1297 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -2,6 +2,7 @@
  * Copyright (C) 2015 Google, Inc
  * Written by Simon Glass <sjg@chromium.org>
  * Copyright (c) 2016, NVIDIA CORPORATION.
+ * Copyright (c) 2018, Theobroma Systems Design und Consulting GmbH
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
@@ -10,6 +11,7 @@
 #include <clk.h>
 #include <clk-uclass.h>
 #include <dm.h>
+#include <dm/read.h>
 #include <dt-structs.h>
 #include <errno.h>
 
@@ -101,6 +103,122 @@ int clk_get_by_index(struct udevice *dev, int index, struct clk *clk)
 {
 	return clk_get_by_indexed_prop(dev, "clocks", index, clk);
 }
+
+static int clk_set_default_parents(struct udevice *dev)
+{
+	struct clk clk, parent_clk;
+	int index;
+	int num_parents;
+	int ret;
+
+	num_parents = dev_count_phandle_with_args(dev, "assigned-clock-parents",
+						  "#clock-cells");
+	if (num_parents < 0) {
+		debug("%s: could not read assigned-clock-parents for %p\n",
+		      __func__, dev);
+		return 0;
+	}
+
+	for (index = 0; index < num_parents; index++) {
+		ret = clk_get_by_indexed_prop(dev, "assigned-clock-parents",
+					      index, &parent_clk);
+		if (ret) {
+			debug("%s: could not get parent clock %d for %s\n",
+			      __func__, index, dev_read_name(dev));
+			return ret;
+		}
+
+		ret = clk_get_by_indexed_prop(dev, "assigned-clocks",
+					      index, &clk);
+		if (ret) {
+			debug("%s: could not get assigned clock %d for %s\n",
+			      __func__, index, dev_read_name(dev));
+			return ret;
+		}
+
+		ret = clk_set_parent(&clk, &parent_clk);
+
+		/*
+		 * Not all drivers may support clock-reparenting (as of now).
+		 * Ignore errors due to this.
+		 */
+		if (ret == -ENOSYS)
+			continue;
+
+		if (ret) {
+			debug("%s: failed to reparent clock %d for %s\n",
+			      __func__, index, dev_read_name(dev));
+			return ret;
+		}
+	}
+
+	return 0;
+}
+
+static int clk_set_default_rates(struct udevice *dev)
+{
+	struct clk clk;
+	int index;
+	int num_rates;
+	int size;
+	int ret = 0;
+	u32 *rates = NULL;
+
+	size = dev_read_size(dev, "assigned-clock-rates");
+	if (size < 0)
+		return 0;
+
+	num_rates = size / sizeof(u32);
+	rates = calloc(num_rates, sizeof(u32));
+	if (!rates)
+		return -ENOMEM;
+
+	ret = dev_read_u32_array(dev, "assigned-clock-rates", rates, num_rates);
+	if (ret)
+		goto fail;
+
+	for (index = 0; index < num_rates; index++) {
+		ret = clk_get_by_indexed_prop(dev, "assigned-clocks",
+					      index, &clk);
+		if (ret) {
+			debug("%s: could not get assigned clock %d for %s\n",
+			      __func__, index, dev_read_name(dev));
+			continue;
+		}
+
+		ret = clk_set_rate(&clk, rates[index]);
+		if (ret < 0) {
+			debug("%s: failed to set rate on clock %d for %s\n",
+			      __func__, index, dev_read_name(dev));
+			break;
+		}
+	}
+
+fail:
+	free(rates);
+	return ret;
+}
+
+int clk_set_defaults(struct udevice *dev)
+{
+	int ret;
+
+	/* If this is running pre-reloc state, don't take any action. */
+	if (!(gd->flags & GD_FLG_RELOC))
+		return 0;
+
+	debug("%s(%s)\n", __func__, dev_read_name(dev));
+
+	ret = clk_set_default_parents(dev);
+	if (ret)
+		return ret;
+
+	ret = clk_set_default_rates(dev);
+	if (ret < 0)
+		return ret;
+
+	return 0;
+}
 # endif /* OF_PLATDATA */
 
 int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk)
diff --git a/drivers/core/device.c b/drivers/core/device.c
index b15f602252..89f2e46998 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -11,6 +11,7 @@
 
 #include <common.h>
 #include <asm/io.h>
+#include <clk.h>
 #include <fdtdec.h>
 #include <fdt_support.h>
 #include <malloc.h>
@@ -400,6 +401,11 @@ int device_probe(struct udevice *dev)
 			goto fail;
 	}
 
+	/* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
+	ret = clk_set_defaults(dev);
+	if (ret)
+		goto fail;
+
 	if (drv->probe) {
 		ret = drv->probe(dev);
 		if (ret) {
diff --git a/include/clk.h b/include/clk.h
index 3791974095..f0598d8f2e 100644
--- a/include/clk.h
+++ b/include/clk.h
@@ -133,6 +133,23 @@ static inline int clk_release_all(struct clk *clk, int count)
 
 #endif
 
+#if (CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)) && \
+	CONFIG_IS_ENABLED(CLK)
+/**
+ * clk_set_defaults - Process 'assigned-{clocks/clock-parents/clock-rates}'
+ *                    properties to configure clocks
+ *
+ * @dev:        A device to process (the ofnode associated with this device
+ *              will be processed).
+ */
+int clk_set_defaults(struct udevice *dev);
+#else
+static inline int clk_set_defaults(struct udevice *dev)
+{
+	return 0;
+}
+#endif
+
 /**
  * clk_request - Request a clock by provider-specific ID.
  *

commit 0ee68417d2d0793aed9af0023546d6d59e4cffd1
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Jan 8 13:11:01 2018 +0100

    rockchip: clk: rk3399: implement set_parent() operation
    
    This implements the (newly added) set_parent() operation for the
    RK3399 with a focus on allowing the RGMII clock parent to be
    configured via the assigned-clock-parents property of the GMAC node.
    
    This implementation supports only the GMAC (in fact only the RGMII
    clock parent) and allows to set this clock's parent either to the
    internal SCLK_GMAC or to an external clock input (identifiable by it
    providing a 'clock-output-name' of "gmac_clkin").
    
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: David Wu <david.wu@rock-chips.com>
    
    Series-changes: 2
    - Fixed David's email address.
    
    (cherry picked from commit a45f17e8b9f91628936349ef40a06d10dc9c08ae)
    
    Change-Id: I64910d7fa0b520194a5bd2b82e2bb5fbd5b6637c
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 08eb8f55b0..3b7203e654 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -742,6 +742,30 @@ static ulong rk3399_mmc_set_clk(struct rk3399_cru *cru,
 	return rk3399_mmc_get_clk(cru, clk_id);
 }
 
+static ulong rk3399_gmac_set_clk(struct rk3399_cru *cru, ulong rate)
+{
+	ulong ret;
+
+	/*
+	 * The RGMII CLK can be derived either from an external "clkin"
+	 * or can be generated from internally by a divider from SCLK_MAC.
+	 */
+	if (readl(&cru->clksel_con[19]) & BIT(4)) {
+		/* An external clock will always generate the right rate... */
+		ret = rate;
+	} else {
+		/*
+		 * No platform uses an internal clock to date.
+		 * Implement this once it becomes necessary and print an error
+		 * if someone tries to use it (while it remains unimplemented).
+		 */
+		pr_err("%s: internal clock is UNIMPLEMENTED\n", __func__);
+		ret = 0;
+	}
+
+	return ret;
+}
+
 #define PMUSGRF_DDR_RGN_CON16 0xff330040
 static ulong rk3399_ddr_set_clk(struct rk3399_cru *cru,
 				ulong set_rate)
@@ -865,8 +889,7 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate)
 		ret = rk3399_mmc_set_clk(priv->cru, clk->id, rate);
 		break;
 	case SCLK_MAC:
-		/* nothing to do, as this is an external clock */
-		ret = rate;
+		ret = rk3399_gmac_set_clk(priv->cru, rate);
 		break;
 	case SCLK_I2C1:
 	case SCLK_I2C2:
@@ -902,6 +925,52 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate)
 	return ret;
 }
 
+static int rk3399_gmac_set_parent(struct clk *clk, struct clk *parent)
+{
+	struct rk3399_clk_priv *priv = dev_get_priv(clk->dev);
+	const char *clock_output_name;
+	int ret;
+
+	/*
+	 * If the requested parent is in the same clock-controller and
+	 * the id is SCLK_MAC ("clk_gmac"), switch to the internal clock.
+	 */
+	if ((parent->dev == clk->dev) && (parent->id == SCLK_MAC)) {
+		debug("%s: switching RGMII to SCLK_MAC\n", __func__);
+		rk_clrreg(&priv->cru->clksel_con[19], BIT(4));
+		return 0;
+	}
+
+	/*
+	 * Otherwise, we need to check the clock-output-names of the
+	 * requested parent to see if the requested id is "clkin_gmac".
+	 */
+	ret = dev_read_string_index(parent->dev, "clock-output-names",
+				    parent->id, &clock_output_name);
+	if (ret < 0)
+		return -ENODATA;
+
+	/* If this is "clkin_gmac", switch to the external clock input */
+	if (!strcmp(clock_output_name, "clkin_gmac")) {
+		debug("%s: switching RGMII to CLKIN\n", __func__);
+		rk_setreg(&priv->cru->clksel_con[19], BIT(4));
+		return 0;
+	}
+
+	return -EINVAL;
+}
+
+static int rk3399_clk_set_parent(struct clk *clk, struct clk *parent)
+{
+	switch (clk->id) {
+	case SCLK_RMII_SRC:
+		return rk3399_gmac_set_parent(clk, parent);
+	}
+
+	debug("%s: unsupported clk %ld\n", __func__, clk->id);
+	return -ENOENT;
+}
+
 static int rk3399_clk_enable(struct clk *clk)
 {
 	switch (clk->id) {
@@ -919,6 +988,7 @@ static int rk3399_clk_enable(struct clk *clk)
 static struct clk_ops rk3399_clk_ops = {
 	.get_rate = rk3399_clk_get_rate,
 	.set_rate = rk3399_clk_set_rate,
+	.set_parent = rk3399_clk_set_parent,
 	.enable = rk3399_clk_enable,
 };
 

commit 2ae83ee4a9c4733d431bfff3e674aaf2adb6b751
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Jan 8 11:18:18 2018 +0100

    clk: refactor clk_get_by_index() into clk_get_by_indexed_prop()
    
    The logic in clk_get_by_index() may be useful for other properties
    than 'clocks': e.g. 'assigned-clocks' and 'assigned-clock-parents'
    follows the same model.
    
    This commit refactors clk_get_by_index() by introducing an internal
    function clk_get_by_indexed_prop() that allows to specify the name
    of the property to process.  The original clk_get_by_index() call
    is simply directed through this helper function with the property
    name fixed to "clocks".
    
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: David Wu <david.wu@rock-chips.com>
    
    Series-changes: 2
    - Fixed David's email address.
    
    (cherry picked from commit 95f9a7e5957093612b1e8447ac5460a6adcea3ba)
    
    Change-Id: I898e38a99e63c851a0c8285670a4c86a711a6972
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index ee7495cb0d..91dc01d619 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -53,7 +53,8 @@ static int clk_of_xlate_default(struct clk *clk,
 	return 0;
 }
 
-int clk_get_by_index(struct udevice *dev, int index, struct clk *clk)
+static int clk_get_by_indexed_prop(struct udevice *dev, const char *prop_name,
+				   int index, struct clk *clk)
 {
 	int ret;
 	struct ofnode_phandle_args args;
@@ -65,7 +66,7 @@ int clk_get_by_index(struct udevice *dev, int index, struct clk *clk)
 	assert(clk);
 	clk->dev = NULL;
 
-	ret = dev_read_phandle_with_args(dev, "clocks", "#clock-cells", 0,
+	ret = dev_read_phandle_with_args(dev, prop_name, "#clock-cells", 0,
 					 index, &args);
 	if (ret) {
 		debug("%s: fdtdec_parse_phandle_with_args failed: err=%d\n",
@@ -95,6 +96,11 @@ int clk_get_by_index(struct udevice *dev, int index, struct clk *clk)
 
 	return clk_request(dev_clk, clk);
 }
+
+int clk_get_by_index(struct udevice *dev, int index, struct clk *clk)
+{
+	return clk_get_by_indexed_prop(dev, "clocks", index, clk);
+}
 # endif /* OF_PLATDATA */
 
 int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk)

commit 4686bbffedcc4cf265ce9eb5a7907ff6ac8869bf
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Jan 8 11:15:08 2018 +0100

    clk: add clk_set_parent()
    
    Clocks may support multiple parents: this change introduces an
    optional operation on the clk-uclass to set a clock's parent.
    
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: David Wu <david.wu@rock-chips.com>
    
    Series-changes: 2
    - Fixed David's email address.
    
    (cherry picked from commit f7d1046da18fd03a047b5f4d290a8ab8550ebf73)
    
    Change-Id: I92065a132988a66b7d86a936766429ea024f4d1e
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index caf53d3e4a..ee7495cb0d 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -208,6 +208,18 @@ int clk_set_phase(struct clk *clk, int degrees)
 	return ops->set_phase(clk, degrees);
 }
 
+int clk_set_parent(struct clk *clk, struct clk *parent)
+{
+	const struct clk_ops *ops = clk_dev_ops(clk->dev);
+
+	debug("%s(clk=%p, parent=%p)\n", __func__, clk, parent);
+
+	if (!ops->set_parent)
+		return -ENOSYS;
+
+	return ops->set_parent(clk, parent);
+}
+
 int clk_enable(struct clk *clk)
 {
 	const struct clk_ops *ops = clk_dev_ops(clk->dev);
diff --git a/include/clk-uclass.h b/include/clk-uclass.h
index a3eb3a987e..be784c8c9f 100644
--- a/include/clk-uclass.h
+++ b/include/clk-uclass.h
@@ -94,6 +94,14 @@ struct clk_ops {
 	 * @return 0 on success, or -ve error code.
 	 */
 	int (*set_phase)(struct clk *clk, int degrees);
+	/**
+	 * set_parent() - Set current clock parent
+	 *
+	 * @clk:        The clock to manipulate.
+	 * @parent:     New clock parent.
+	 * @return zero on success, or -ve error code.
+	 */
+	int (*set_parent)(struct clk *clk, struct clk *parent);
 	/**
 	 * enable() - Enable a clock.
 	 *
diff --git a/include/clk.h b/include/clk.h
index 13b157b59b..3791974095 100644
--- a/include/clk.h
+++ b/include/clk.h
@@ -197,6 +197,17 @@ int clk_get_phase(struct clk *clk);
  */
 int clk_set_phase(struct clk *clk, int degrees);
 
+/**
+ * clk_set_parent() - Set current clock parent.
+ *
+ * @clk:	A clock struct that was previously successfully requested by
+ *		clk_request/get_by_*().
+ * @parent:	A clock struct that was previously successfully requested by
+ *		clk_request/get_by_*().
+ * @return new rate, or -ve error code.
+ */
+int clk_set_parent(struct clk *clk, struct clk *parent);
+
 /**
  * clk_enable() - Enable (turn on) a clock.
  *

commit eda90cbc2ada28031a80c791de51535a9175aad2
Author: Mario Six <mario.six@gdsys.cc>
Date:   Mon Jan 15 11:06:53 2018 +0100

    clk: Remove superfluous gd declarations
    
    The clk uclass was converted to support a live device tree recently,
    hence the global data pointer declarations are no longer needed.
    
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Mario Six <mario.six@gdsys.cc>
    (cherry picked from commit 7fe1b063d8eef2549bd53d618dcecb6723e1354c)
    
    Change-Id: If3dbb3dfc7b2ab5a94846c0e11635cc1c2af563c
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index e7e57943a8..caf53d3e4a 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -13,8 +13,6 @@
 #include <dt-structs.h>
 #include <errno.h>
 
-DECLARE_GLOBAL_DATA_PTR;
-
 static inline const struct clk_ops *clk_dev_ops(struct udevice *dev)
 {
 	return (const struct clk_ops *)dev->driver->ops;
diff --git a/drivers/clk/clk_fixed_rate.c b/drivers/clk/clk_fixed_rate.c
index 63565b6ed8..aefc64ed5d 100644
--- a/drivers/clk/clk_fixed_rate.c
+++ b/drivers/clk/clk_fixed_rate.c
@@ -8,8 +8,6 @@
 #include <clk-uclass.h>
 #include <dm.h>
 
-DECLARE_GLOBAL_DATA_PTR;
-
 struct clk_fixed_rate {
 	unsigned long fixed_rate;
 };

commit 7c1014244c3a57a4dd5e29438be17a579f67475a
Author: Mario Six <mario.six@gdsys.cc>
Date:   Mon Jan 15 11:06:51 2018 +0100

    clk: clk-uclass: Fix style violations
    
    checkpatch.pl complains that the clk_ops structures used in clk-uclass.c
    ought to be const, so we mark them as const.
    
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Mario Six <mario.six@gdsys.cc>
    (cherry picked from commit 268453be7c8f9fb93e1c40b9ce5f7382335ebeb4)
    
    Change-Id: I4939e3354672f1200a8bcee9f747df5ccca1214d
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index e006b6bbab..e7e57943a8 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -15,9 +15,9 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-static inline struct clk_ops *clk_dev_ops(struct udevice *dev)
+static inline const struct clk_ops *clk_dev_ops(struct udevice *dev)
 {
-	return (struct clk_ops *)dev->driver->ops;
+	return (const struct clk_ops *)dev->driver->ops;
 }
 
 #if CONFIG_IS_ENABLED(OF_CONTROL)
@@ -60,7 +60,7 @@ int clk_get_by_index(struct udevice *dev, int index, struct clk *clk)
 	int ret;
 	struct ofnode_phandle_args args;
 	struct udevice *dev_clk;
-	struct clk_ops *ops;
+	const struct clk_ops *ops;
 
 	debug("%s(dev=%p, index=%d, clk=%p)\n", __func__, dev, index, clk);
 
@@ -68,7 +68,7 @@ int clk_get_by_index(struct udevice *dev, int index, struct clk *clk)
 	clk->dev = NULL;
 
 	ret = dev_read_phandle_with_args(dev, "clocks", "#clock-cells", 0,
-					  index, &args);
+					 index, &args);
 	if (ret) {
 		debug("%s: fdtdec_parse_phandle_with_args failed: err=%d\n",
 		      __func__, ret);
@@ -142,7 +142,7 @@ int clk_release_all(struct clk *clk, int count)
 
 int clk_request(struct udevice *dev, struct clk *clk)
 {
-	struct clk_ops *ops = clk_dev_ops(dev);
+	const struct clk_ops *ops = clk_dev_ops(dev);
 
 	debug("%s(dev=%p, clk=%p)\n", __func__, dev, clk);
 
@@ -156,7 +156,7 @@ int clk_request(struct udevice *dev, struct clk *clk)
 
 int clk_free(struct clk *clk)
 {
-	struct clk_ops *ops = clk_dev_ops(clk->dev);
+	const struct clk_ops *ops = clk_dev_ops(clk->dev);
 
 	debug("%s(clk=%p)\n", __func__, clk);
 
@@ -168,7 +168,7 @@ int clk_free(struct clk *clk)
 
 ulong clk_get_rate(struct clk *clk)
 {
-	struct clk_ops *ops = clk_dev_ops(clk->dev);
+	const struct clk_ops *ops = clk_dev_ops(clk->dev);
 
 	debug("%s(clk=%p)\n", __func__, clk);
 
@@ -180,7 +180,7 @@ ulong clk_get_rate(struct clk *clk)
 
 ulong clk_set_rate(struct clk *clk, ulong rate)
 {
-	struct clk_ops *ops = clk_dev_ops(clk->dev);
+	const struct clk_ops *ops = clk_dev_ops(clk->dev);
 
 	debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate);
 
@@ -192,7 +192,7 @@ ulong clk_set_rate(struct clk *clk, ulong rate)
 
 int clk_get_phase(struct clk *clk)
 {
-	struct clk_ops *ops = clk_dev_ops(clk->dev);
+	const struct clk_ops *ops = clk_dev_ops(clk->dev);
 
 	if (!ops->get_phase)
 		return -ENOSYS;
@@ -202,7 +202,7 @@ int clk_get_phase(struct clk *clk)
 
 int clk_set_phase(struct clk *clk, int degrees)
 {
-	struct clk_ops *ops = clk_dev_ops(clk->dev);
+	const struct clk_ops *ops = clk_dev_ops(clk->dev);
 
 	if (!ops->set_phase)
 		return -ENOSYS;
@@ -212,7 +212,7 @@ int clk_set_phase(struct clk *clk, int degrees)
 
 int clk_enable(struct clk *clk)
 {
-	struct clk_ops *ops = clk_dev_ops(clk->dev);
+	const struct clk_ops *ops = clk_dev_ops(clk->dev);
 
 	debug("%s(clk=%p)\n", __func__, clk);
 
@@ -224,7 +224,7 @@ int clk_enable(struct clk *clk)
 
 int clk_disable(struct clk *clk)
 {
-	struct clk_ops *ops = clk_dev_ops(clk->dev);
+	const struct clk_ops *ops = clk_dev_ops(clk->dev);
 
 	debug("%s(clk=%p)\n", __func__, clk);
 

commit 8159cb4fb4af282591787cf59d2a5b8305eac0cd
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Fri Feb 23 19:42:39 2018 +0800

    mmc: fix bug in function do_mmc_testrpmb
    
    Change-Id: I35aebe3aefc512928281e2f17ef020b36befc36e
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/cmd/mmc.c b/cmd/mmc.c
index af71e108f8..8d320fa122 100644
--- a/cmd/mmc.c
+++ b/cmd/mmc.c
@@ -147,7 +147,7 @@ static int do_mmc_testrpmb(cmd_tbl_t *cmdtp,
 	uint64_t value;
 	trusty_write_rollback_index(0x87654321, 0x1122334455667788);
 	trusty_read_rollback_index(0x87654321, &value);
-	debug("sizeof(value) %x\n ", sizeof(value));
+	debug("sizeof(value) %zu\n ", sizeof(value));
 	if (value == 0x1122334455667788)
 		printf("good ! value==0x1122334455667788\n ");
 	else

commit 1f25ada2a8eccef6ea3d9844a40d05d7ce7027d4
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Fri Feb 23 19:30:03 2018 +0800

    lib: optee_client: support new optee message
    
    Change-Id: I83e8da2252f1fef6dff7d388d12e6fb7972cf79e
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/include/optee_include/OpteeClientRkFs.h b/include/optee_include/OpteeClientRkFs.h
new file mode 100644
index 0000000000..d7f68bc277
--- /dev/null
+++ b/include/optee_include/OpteeClientRkFs.h
@@ -0,0 +1,38 @@
+/*
+ * Copyright (c) 2016, Fuzhou Rockchip Electronics Co.,Ltd.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef TEE_SUPP_RK_FS_H
+#define TEE_SUPP_RK_FS_H
+
+#include <stddef.h>
+
+int tee_supp_rk_fs_init(void);
+
+int tee_supp_rk_fs_process(void *cmd, uint32_t cmd_size);
+
+void OpteeClientRkFsInit(void);
+
+#endif
diff --git a/include/optee_include/tee_rpc.h b/include/optee_include/tee_rpc.h
index c6ddc6b3c1..2515bc1e61 100644
--- a/include/optee_include/tee_rpc.h
+++ b/include/optee_include/tee_rpc.h
@@ -39,5 +39,4 @@
 #define TEE_WAIT_MUTEX_DELETE	2
 #define TEE_RPC_WAIT		0x30000000
 
-
 #endif
diff --git a/include/optee_include/tee_rpc_types.h b/include/optee_include/tee_rpc_types.h
index a90c1a63f9..dbb4110a88 100644
--- a/include/optee_include/tee_rpc_types.h
+++ b/include/optee_include/tee_rpc_types.h
@@ -12,7 +12,7 @@
 
 struct tee_rpc_load_ta_cmd {
 	TEE_UUID uuid;
-	void *va;
+	uint32_t va;
 };
 
 struct tee_rpc_rpmb_cmd {
diff --git a/include/optee_include/teesmc.h b/include/optee_include/teesmc.h
index 1bad06d0a8..04c735283c 100644
--- a/include/optee_include/teesmc.h
+++ b/include/optee_include/teesmc.h
@@ -206,28 +206,6 @@ struct teesmc32_arg {
 	 */
 };
 
-/**
- * TEESMC32_GET_PARAMS - return pointer to union teesmc32_param *
- *
- * @x: Pointer to a struct teesmc32_arg
- *
- * Returns a pointer to the params[] inside a struct teesmc32_arg.
- */
-#define TEESMC32_GET_PARAMS(x) \
-	(struct teesmc32_param *)(((struct teesmc32_arg *)(x)) + 1)
-
-/**
- * TEESMC32_GET_ARG_SIZE - return size of struct teesmc32_arg
- *
- * @num_params: Number of parameters embedded in the struct teesmc32_arg
- *
- * Returns the size of the struct teesmc32_arg together with the number
- * of embedded paramters.
- */
-#define TEESMC32_GET_ARG_SIZE(num_params) \
-	(sizeof(struct teesmc32_arg) + \
-	 sizeof(struct teesmc32_param) * (num_params))
-
 /**
  * struct teesmc64_arg - SMC argument for Trusted OS
  * @cmd: OS Command, one of TEESMC_CMD_*
@@ -667,10 +645,21 @@ struct teesmc_meta_open_session {
 #define TEESMC_RETURN_IS_RPC(ret) \
 	(((ret) & TEESMC_RETURN_RPC_PREFIX_MASK) == TEESMC_RETURN_RPC_PREFIX)
 
+typedef struct teesmc_meta_open_session t_teesmc_meta_open_session;
+
+#ifdef CONFIG_OPTEE_V1
+
 typedef struct teesmc32_arg             t_teesmc32_arg;
 typedef struct teesmc32_param           t_teesmc32_param;
-typedef struct teesmc_meta_open_session t_teesmc_meta_open_session;
 
+#define TEESMC32_GET_PARAMS(x) \
+	(struct teesmc32_param *)(((struct teesmc32_arg *)(x)) + 1)
+
+#define TEESMC32_GET_ARG_SIZE(num_params) \
+	(sizeof(struct teesmc32_arg) + \
+	 sizeof(struct teesmc32_param) * (num_params))
+
+#endif
 void tee_smc_call(ARM_SMC_ARGS *param);
 
 #endif /* TEESMC_H */
diff --git a/include/optee_include/teesmc_v2.h b/include/optee_include/teesmc_v2.h
new file mode 100644
index 0000000000..43bcd1a7ee
--- /dev/null
+++ b/include/optee_include/teesmc_v2.h
@@ -0,0 +1,89 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef TEESMC_V2_H
+#define TEESMC_V2_H
+
+#define OPTEE_SMC_CALL_WITH_ARG_V2 0x32000004
+
+struct optee_msg_param_tmem_v2 {
+	uint64_t buf_ptr;
+	uint64_t size;
+	uint64_t shm_ref;
+};
+
+struct optee_msg_param_rmem_v2 {
+	uint64_t offs;
+	uint64_t size;
+	uint64_t shm_ref;
+};
+
+struct optee_msg_param_value_v2 {
+	uint64_t a;
+	uint64_t b;
+	uint64_t c;
+};
+
+struct optee_msg_param_v2 {
+	uint64_t attr;
+	union {
+		struct optee_msg_param_tmem_v2 memref;
+		struct optee_msg_param_rmem_v2 rmem;
+		struct optee_msg_param_value_v2 value;
+	} u;
+};
+
+struct optee_msg_arg_v2 {
+	uint32_t cmd;
+	uint32_t ta_func;
+	uint32_t session;
+	uint32_t cancel_id;
+	uint32_t pad;
+	uint32_t ret;
+	uint32_t ret_origin;
+	uint32_t num_params;
+
+	/* num_params tells the actual number of element in params */
+	struct optee_msg_param_v2 params[];
+};
+
+#ifdef CONFIG_OPTEE_V2
+typedef struct optee_msg_arg_v2        t_teesmc32_arg;
+typedef struct optee_msg_param_v2      t_teesmc32_param;
+
+#define TEESMC32_GET_ARG_SIZE(num_params) \
+	(sizeof(struct optee_msg_arg_v2) + \
+	 sizeof(struct optee_msg_param_v2) * (num_params))
+
+#define TEESMC32_GET_PARAMS(x) \
+	(struct optee_msg_param_v2 *)(((struct optee_msg_arg_v2 *)(x)) + 1)
+
+#endif
+
+#define OPTEE_MSG_ATTR_TYPE_NONE_V2		0x0
+#define OPTEE_MSG_ATTR_TYPE_VALUE_INPUT_V2		0x1
+#define OPTEE_MSG_ATTR_TYPE_VALUE_OUTPUT_V2		0x2
+#define OPTEE_MSG_ATTR_TYPE_VALUE_INOUT_V2		0x3
+#define OPTEE_MSG_ATTR_TYPE_RMEM_INPUT_V2		0x5
+#define OPTEE_MSG_ATTR_TYPE_RMEM_OUTPUT_V2		0x6
+#define OPTEE_MSG_ATTR_TYPE_RMEM_INOUT_V2		0x7
+#define OPTEE_MSG_ATTR_TYPE_TMEM_INPUT_V2		0x9
+#define OPTEE_MSG_ATTR_TYPE_TMEM_OUTPUT_V2		0xa
+#define OPTEE_MSG_ATTR_TYPE_TMEM_INOUT_V2		0xb
+
+#define OPTEE_MSG_ATTR_META_V2			(1 << (8))
+
+#define OPTEE_MSG_RPC_CMD_SHM_ALLOC_V2	6
+#define OPTEE_MSG_RPC_CMD_SHM_FREE_V2	7
+
+#define OPTEE_MSG_RPC_CMD_LOAD_TA_V2	0
+
+#define OPTEE_MSG_RPC_CMD_RPMB_V2		1
+
+#define OPTEE_MSG_RPC_CMD_FS_V2		2
+
+
+#endif /* TEESMC_V2_H */
diff --git a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta
new file mode 100644
index 0000000000..29dd857e5d
Binary files /dev/null and b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta differ
diff --git a/lib/optee_clientApi/Makefile b/lib/optee_clientApi/Makefile
index 7d402989e7..888fda324d 100644
--- a/lib/optee_clientApi/Makefile
+++ b/lib/optee_clientApi/Makefile
@@ -9,8 +9,19 @@ obj-y += OpteeClientInterface.o
 obj-y += OpteeClientSMC.o
 obj-y += OpteeClientRPC.o
 obj-y += tee_smc-arm64.o
-obj-y += 258be795-f9ca-40e6-a8699ce6886c5d5d.o
+obj-y += OpteeClientRkFs.o
 
+ifdef CONFIG_OPTEE_V1
+obj-y += 258be795-f9ca-40e6-a8699ce6886c5d5d.o
 lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.o: lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c
 lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c: lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta
 	$(srctree)/lib/optee_clientApi/tabinary_to_cfile.py --prefix keymaster --TA $< --out $@
+endif
+
+ifdef CONFIG_OPTEE_V2
+obj-y += 258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.o
+lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.o: lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.c
+lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.c: lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta
+	$(srctree)/lib/optee_clientApi/tabinary_to_cfile.py --prefix keymaster --TA $< --out $@
+endif
+
diff --git a/lib/optee_clientApi/OpteeClientApiLib.c b/lib/optee_clientApi/OpteeClientApiLib.c
index 8704be9057..a2f8c12ab4 100644
--- a/lib/optee_clientApi/OpteeClientApiLib.c
+++ b/lib/optee_clientApi/OpteeClientApiLib.c
@@ -8,6 +8,7 @@
 #include <optee_include/OpteeClientApiLib.h>
 #include <optee_include/OpteeClientMem.h>
 #include <optee_include/OpteeClientSMC.h>
+#include <optee_include/OpteeClientRkFs.h>
 
 /*
  * Initlialize the library
@@ -18,6 +19,8 @@ TEEC_Result OpteeClientApiLibInitialize(void)
 
 	OpteeClientMemInit();
 
+	OpteeClientRkFsInit();
+
 	return status;
 }
 
@@ -64,8 +67,8 @@ exit:
  */
 TEEC_Result TEEC_FinalizeContext(TEEC_Context *context)
 {
-	debug("TEEC_FinalizeContext Enter-Exit: context=0x%X\n",
-		(unsigned int)context);
+	debug("TEEC_FinalizeContext Enter-Exit: context=0x%zu\n",
+		(size_t)context);
 	return TEEC_SUCCESS;
 }
 
@@ -81,7 +84,7 @@ TEEC_Result TEEC_AllocateSharedMemory(TEEC_Context *context,
 {
 	TEEC_Result TeecResult = TEEC_SUCCESS;
 
-	debug("TEEC_AllocateSharedMemory Enter: context=%s 0x%X, shared_memory=0x%X\n",
+	debug("TEEC_AllocateSharedMemory Enter: context=%s 0x%X, shared_memory=0x%zu\n",
 		context->devname, context->fd, shared_memory->size);
 
 	if ((context == NULL) || (shared_memory == NULL)) {
@@ -97,7 +100,7 @@ TEEC_Result TEEC_AllocateSharedMemory(TEEC_Context *context,
 	shared_memory->buffer = NULL;
 	shared_memory->alloc_buffer = 0;
 
-	debug("TEEC_AllocateSharedMemory: size=0x%X, flags=0x%X\n",
+	debug("TEEC_AllocateSharedMemory: size=0x%zu, flags=0x%X\n",
 			shared_memory->size, shared_memory->flags);
 
 	shared_memory->buffer = OpteeClientMemAlloc(shared_memory->size);
@@ -121,7 +124,7 @@ Exit:
  */
 void TEEC_ReleaseSharedMemory(TEEC_SharedMemory *shared_memory)
 {
-	debug("TEEC_ReleaseSharedMemory Enter: shared_memory=0x%X\n",
+	debug("TEEC_ReleaseSharedMemory Enter: shared_memory=0x%zu\n",
 				shared_memory->size);
 
 	if (shared_memory == NULL)
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index 7710c89a50..f1d8fe90a1 100644
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -713,7 +713,7 @@ uint32_t write_to_keymaster(uint8_t *filename,
 						TEEC_NONE);
 
 	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					139,
+					141,
 					&TeecOperation,
 					&ErrorOrigin);
 
diff --git a/lib/optee_clientApi/OpteeClientMem.c b/lib/optee_clientApi/OpteeClientMem.c
index ac63037b22..e78b603f29 100644
--- a/lib/optee_clientApi/OpteeClientMem.c
+++ b/lib/optee_clientApi/OpteeClientMem.c
@@ -125,14 +125,17 @@ void my_free(void *ptr)
  */
 void OpteeClientMemInit(void)
 {
-#ifdef CONFIG_ROCKCHIP_RK3328
+#ifdef CONFIG_ARM64
 	debug(" OpteeClientMemInit 64\n");
-	my_malloc_init(0x09200000, 0x00200000);
-#endif
-#ifdef CONFIG_ROCKCHIP_RK322X
+	my_malloc_init((void *)0x09e10000, 0x003e0000);
+#else
 	debug(" OpteeClientMemInit 32\n");
+#ifdef CONFIG_ROCKCHIP_RK3288
+	my_malloc_init((void *)0x0910a000, 0x000e0000);
+#else
 	my_malloc_init((void *)0x6910a000, 0x000e0000);
 #endif
+#endif
 }
 
 /*
diff --git a/lib/optee_clientApi/OpteeClientRPC.c b/lib/optee_clientApi/OpteeClientRPC.c
index 3c03ac79d1..f32633a7ba 100644
--- a/lib/optee_clientApi/OpteeClientRPC.c
+++ b/lib/optee_clientApi/OpteeClientRPC.c
@@ -11,10 +11,12 @@
 #include <optee_include/OpteeClientMem.h>
 #include <optee_include/OpteeClientRPC.h>
 #include <optee_include/teesmc.h>
+#include <optee_include/teesmc_v2.h>
 #include <optee_include/teesmc_optee.h>
 #include <optee_include/tee_rpc_types.h>
 #include <optee_include/tee_rpc.h>
 #include <optee_include/258be795-f9ca-40e6-a8699ce6886c5d5d.h>
+#include <optee_include/OpteeClientRkFs.h>
 
 /*
  * Memory allocation.
@@ -23,12 +25,12 @@
 TEEC_Result OpteeRpcAlloc(uint32_t Size, uint32_t *Address)
 {
 	TEEC_Result TeecResult = TEEC_SUCCESS;
-	uint32_t AllocAddress;
+	size_t AllocAddress;
 
 	*Address = 0;
 
 	if (Size != 0) {
-		AllocAddress = (uint32_t) OpteeClientMemAlloc(Size);
+		AllocAddress = (size_t) OpteeClientMemAlloc(Size);
 
 		if (AllocAddress == 0)
 			TeecResult = TEEC_ERROR_OUT_OF_MEMORY;
@@ -44,7 +46,7 @@ TEEC_Result OpteeRpcAlloc(uint32_t Size, uint32_t *Address)
  */
 TEEC_Result OpteeRpcFree(uint32_t Address)
 {
-	OpteeClientMemFree((void *)Address);
+	OpteeClientMemFree((void *)(size_t)Address);
 	return TEEC_SUCCESS;
 }
 
@@ -67,7 +69,7 @@ TEEC_Result OpteeRpcCmdLoadTa(t_teesmc32_arg *TeeSmc32Arg)
 
 	TeeSmc32Param = TEESMC32_GET_PARAMS(TeeSmc32Arg);
 	TeeLoadTaCmd = (struct tee_rpc_load_ta_cmd *)
-					TeeSmc32Param[0].u.memref.buf_ptr;
+					(size_t)TeeSmc32Param[0].u.memref.buf_ptr;
 	TeeLoadTaCmdSize = TeeSmc32Param[0].u.memref.size;
 
 	if ((TeeLoadTaCmd == NULL) ||
@@ -79,7 +81,7 @@ TEEC_Result OpteeRpcCmdLoadTa(t_teesmc32_arg *TeeSmc32Arg)
 	TEEC_Result Status = 0;
 	void *ImageData = NULL;
 	uint32_t ImageSize = 0;
-	uint32_t AllocAddress = 0;
+	size_t AllocAddress = 0;
 
 	ImageData = (void *)keymaster_data;
 	ImageSize = keymaster_size;
@@ -89,7 +91,7 @@ TEEC_Result OpteeRpcCmdLoadTa(t_teesmc32_arg *TeeSmc32Arg)
 		goto Exit;
 	}
 
-	AllocAddress = (uint32_t) OpteeClientMemAlloc(ImageSize);
+	AllocAddress = (size_t) OpteeClientMemAlloc(ImageSize);
 
 	if (AllocAddress == 0) {
 		TeecResult = TEEC_ERROR_OUT_OF_MEMORY;
@@ -98,12 +100,12 @@ TEEC_Result OpteeRpcCmdLoadTa(t_teesmc32_arg *TeeSmc32Arg)
 
 	memcpy((void *)AllocAddress, ImageData, ImageSize);
 
-	debug("...TA loaded at 0x%X of size 0x%X bytes\n",
+	debug("...TA loaded at 0x%zu of size 0x%X bytes\n",
 		AllocAddress, ImageSize);
 	debug("...AllocAddress[0] 0x%X ; AllocAddress[1] 0x%X bytes\n",
 		*(char *)AllocAddress, *(char *)(AllocAddress+1));
 
-	TeeLoadTaCmd->va = (void *)AllocAddress;
+	TeeLoadTaCmd->va = AllocAddress;
 
 	TeeSmc32Param[1].u.memref.buf_ptr = AllocAddress;
 	TeeSmc32Param[1].u.memref.size = ImageSize;
@@ -117,6 +119,46 @@ Exit:
 	return TeecResult;
 }
 
+#ifdef CONFIG_OPTEE_V2
+TEEC_Result OpteeRpcCmdLoadV2Ta(t_teesmc32_arg *TeeSmc32Arg)
+{
+	TEEC_Result TeecResult = TEEC_SUCCESS;
+	t_teesmc32_param *TeeSmc32Param = NULL;
+	uint8_t uuid[16];
+	int i;
+
+	if (TeeSmc32Arg->num_params != 2) {
+		TeecResult = TEEC_ERROR_BAD_PARAMETERS;
+		goto Exit;
+	}
+
+	TeeSmc32Param = TEESMC32_GET_PARAMS(TeeSmc32Arg);
+
+	memcpy(uuid, (void *)&TeeSmc32Param[0].u.value, 16);
+	for (i = 0; i < 16; i++)
+		printf("uuid 0x%x", uuid[i]);
+
+	if (TeeSmc32Param[1].u.memref.buf_ptr == 0) {
+		printf("return size of TA, keymaster_size = 0x%x", keymaster_size);
+		TeeSmc32Param[1].u.memref.size = keymaster_size;
+	} else {
+		memcpy((void *)TeeSmc32Param[1].u.memref.buf_ptr,
+			(void *)keymaster_data, TeeSmc32Param[1].u.memref.size);
+		printf("memref.buf_ptr = 0x%llx; memref.size = 0x%llx",
+			TeeSmc32Param[1].u.memref.buf_ptr,
+			TeeSmc32Param[1].u.memref.size);
+	}
+
+Exit:
+	TeeSmc32Arg->ret = TeecResult;
+	TeeSmc32Arg->ret_origin = TEEC_ORIGIN_API;
+
+	debug("OpteeRpcCmdLoadTa Exit : TeecResult=0x%X\n", TeecResult);
+
+	return TeecResult;
+}
+#endif
+
 /*
  * Free a previously loaded TA and release the memory
  * Param[0] = IN: TA Image to free
@@ -130,7 +172,7 @@ TEEC_Result OpteeRpcCmdFreeTa(t_teesmc32_arg *TeeSmc32Arg)
 	TEEC_Result TeecResult = TEEC_SUCCESS;
 	t_teesmc32_param *TeeSmc32Param = NULL;
 	uint32_t ImageSize = 0;
-	uint32_t AllocAddress = 0;
+	size_t AllocAddress = 0;
 
 	if (TeeSmc32Arg->num_params != 1) {
 		TeecResult = TEEC_ERROR_BAD_PARAMETERS;
@@ -164,6 +206,7 @@ Exit:
 /*
  * Execute an RPMB storage operation.
  */
+
 uint16_t global_block_count;
 TEEC_Result OpteeRpcCmdRpmb(t_teesmc32_arg *TeeSmc32Arg)
 {
@@ -188,12 +231,12 @@ TEEC_Result OpteeRpcCmdRpmb(t_teesmc32_arg *TeeSmc32Arg)
 	}
 
 	TeeSmc32Param = TEESMC32_GET_PARAMS(TeeSmc32Arg);
-	RpmbRequest = (struct tee_rpc_rpmb_cmd *)
+	RpmbRequest = (struct tee_rpc_rpmb_cmd *)(size_t)
 		TeeSmc32Param[0].u.memref.buf_ptr;
 	switch (RpmbRequest->cmd) {
 	case TEE_RPC_RPMB_CMD_DATA_REQ: {
 		RequestPackets = (EFI_RK_RPMB_DATA_PACKET *)(RpmbRequest + 1);
-		ResponsePackets = (EFI_RK_RPMB_DATA_PACKET *)
+		ResponsePackets = (EFI_RK_RPMB_DATA_PACKET *)(size_t)
 		TeeSmc32Param[1].u.memref.buf_ptr;
 
 		global_block_count =
@@ -344,7 +387,7 @@ TEEC_Result OpteeRpcCmdRpmb(t_teesmc32_arg *TeeSmc32Arg)
 	case TEE_RPC_RPMB_CMD_GET_DEV_INFO: {
 		mmc = do_returnmmc();
 
-		DevInfo = (struct tee_rpc_rpmb_dev_info *)
+		DevInfo = (struct tee_rpc_rpmb_dev_info *)(size_t)
 		TeeSmc32Param[1].u.memref.buf_ptr;
 
 		DevInfo->cid[0] = (mmc->cid[0]) >> 24 & 0xff;
@@ -435,9 +478,15 @@ Exit:
  */
 TEEC_Result OpteeRpcCmdFs(t_teesmc32_arg *TeeSmc32Arg)
 {
-	return TEEC_ERROR_NOT_IMPLEMENTED;
-}
+	TEEC_Result TeecResult = TEEC_SUCCESS;
+	t_teesmc32_param *TeeSmc32Param;
 
+	TeeSmc32Param = TEESMC32_GET_PARAMS(TeeSmc32Arg);
+	TeecResult = tee_supp_rk_fs_process((void *)(size_t)TeeSmc32Param[0].u.memref.buf_ptr,
+							TeeSmc32Param[0].u.memref.size);
+
+	return TeecResult;
+}
 
 /*
  * TBD.
@@ -447,7 +496,6 @@ TEEC_Result OpteeRpcCmdGetTime(t_teesmc32_arg *TeeSmc32Arg)
 	return TEEC_ERROR_NOT_IMPLEMENTED;
 }
 
-
 /*
  * TBD.
  */
@@ -463,12 +511,21 @@ TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs)
 {
 	TEEC_Result TeecResult = TEEC_SUCCESS;
 
-	debug("OpteeRpcCallback Enter: Arg0=0x%X, Arg1=0x%X, Arg2=0x%X\n",
-		ArmSmcArgs->Arg0, ArmSmcArgs->Arg1, ArmSmcArgs->Arg2);
+	//printf("OpteeRpcCallback Enter: Arg0=0x%X, Arg1=0x%X, Arg2=0x%X\n",
+		//ArmSmcArgs->Arg0, ArmSmcArgs->Arg1, ArmSmcArgs->Arg2);
 
 	switch (TEESMC_RETURN_GET_RPC_FUNC(ArmSmcArgs->Arg0)) {
 	case TEESMC_RPC_FUNC_ALLOC_ARG: {
+#ifdef CONFIG_OPTEE_V1
 		TeecResult = OpteeRpcAlloc(ArmSmcArgs->Arg1, &ArmSmcArgs->Arg1);
+#endif
+#ifdef CONFIG_OPTEE_V2
+		printf("ArmSmcArgs->Arg1 = 0x%x", ArmSmcArgs->Arg1);
+		TeecResult = OpteeRpcAlloc(ArmSmcArgs->Arg1, &ArmSmcArgs->Arg2);
+		ArmSmcArgs->Arg5 = ArmSmcArgs->Arg2;
+		ArmSmcArgs->Arg1 = 0;
+		ArmSmcArgs->Arg4 = 0;
+#endif
 		break;
 	}
 
@@ -478,7 +535,12 @@ TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs)
 	}
 
 	case TEESMC_RPC_FUNC_FREE_ARG: {
+#ifdef CONFIG_OPTEE_V1
 		TeecResult = OpteeRpcFree(ArmSmcArgs->Arg1);
+#endif
+#ifdef CONFIG_OPTEE_V2
+		TeecResult = OpteeRpcFree(ArmSmcArgs->Arg2);
+#endif
 		break;
 	}
 
@@ -492,10 +554,17 @@ TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs)
 	}
 
 	case TEESMC_RPC_FUNC_CMD: {
+#ifdef CONFIG_OPTEE_V1
 		t_teesmc32_arg *TeeSmc32Arg =
-			(t_teesmc32_arg *)ArmSmcArgs->Arg1;
-
+			(t_teesmc32_arg *)(size_t)ArmSmcArgs->Arg1;
+#endif
+#ifdef CONFIG_OPTEE_V2
+		t_teesmc32_arg *TeeSmc32Arg =
+			(t_teesmc32_arg *)((size_t)ArmSmcArgs->Arg1 << 32 | ArmSmcArgs->Arg2);
+		printf("TeeSmc32Arg->cmd = 0x%x", TeeSmc32Arg->cmd);
+#endif
 		switch (TeeSmc32Arg->cmd) {
+#ifdef CONFIG_OPTEE_V1
 		case TEE_RPC_LOAD_TA: {
 			TeecResult = OpteeRpcCmdLoadTa(TeeSmc32Arg);
 			break;
@@ -513,6 +582,7 @@ TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs)
 
 		case TEE_RPC_FS: {
 			TeecResult = OpteeRpcCmdFs(TeeSmc32Arg);
+			TeeSmc32Arg->ret = TEEC_SUCCESS;
 			break;
 		}
 
@@ -525,6 +595,35 @@ TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs)
 			TeecResult = OpteeRpcCmdWaitMutex(TeeSmc32Arg);
 			break;
 		}
+#endif
+#ifdef CONFIG_OPTEE_V2
+		case OPTEE_MSG_RPC_CMD_SHM_ALLOC_V2: {
+			uint32_t tempaddr;
+			uint32_t allocsize = TeeSmc32Arg->params[0].u.value.b;
+			TeecResult = OpteeRpcAlloc(allocsize, &tempaddr);
+			printf("allocsize = 0x%x tempaddr = 0x%x", allocsize, tempaddr);
+			TeeSmc32Arg->params[0].attr = OPTEE_MSG_ATTR_TYPE_TMEM_OUTPUT_V2;
+			TeeSmc32Arg->params[0].u.memref.buf_ptr = tempaddr;
+			TeeSmc32Arg->params[0].u.memref.size = allocsize;
+			TeeSmc32Arg->params[0].u.memref.shm_ref = tempaddr;
+			TeeSmc32Arg->ret = TEE_SUCCESS;
+			break;
+		}
+		case OPTEE_MSG_RPC_CMD_SHM_FREE_V2: {
+			uint32_t tempaddr = TeeSmc32Arg->params[0].u.value.b;
+			TeecResult = OpteeRpcFree(tempaddr);
+			break;
+
+		}
+		case OPTEE_MSG_RPC_CMD_RPMB_V2: {
+			TeecResult = OpteeRpcCmdRpmb(TeeSmc32Arg);
+			break;
+		}
+		case OPTEE_MSG_RPC_CMD_LOAD_TA_V2: {
+			TeecResult = OpteeRpcCmdLoadV2Ta(TeeSmc32Arg);
+			break;
+		}
+#endif
 
 		default: {
 			printf("...unsupported RPC CMD: cmd=0x%X\n",
diff --git a/lib/optee_clientApi/OpteeClientRkFs.c b/lib/optee_clientApi/OpteeClientRkFs.c
new file mode 100644
index 0000000000..0e619e2cf0
--- /dev/null
+++ b/lib/optee_clientApi/OpteeClientRkFs.c
@@ -0,0 +1,1330 @@
+/*
+ * Copyright (c) 2016, Fuzhou Rockchip Electronics Co.,Ltd.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *																		Created by jeffry.zhang@rock-chips.com
+ */
+#include <common.h>
+#include <stdlib.h>
+#include <command.h>
+
+//#define DEBUG_RKFSS
+//#define DEBUG_CLEAN_RKSS
+
+/*
+ * Operations and defines shared with TEE.
+ */
+#define TEE_FS_OPEN       1
+#define TEE_FS_CLOSE      2
+#define TEE_FS_READ       3
+#define TEE_FS_WRITE      4
+#define TEE_FS_SEEK       5
+#define TEE_FS_UNLINK     6
+#define TEE_FS_RENAME     7
+#define TEE_FS_TRUNC      8
+#define TEE_FS_MKDIR      9
+#define TEE_FS_OPENDIR   10
+#define TEE_FS_CLOSEDIR  11
+#define TEE_FS_READDIR   12
+#define TEE_FS_RMDIR     13
+#define TEE_FS_ACCESS    14
+#define TEE_FS_LINK      15
+
+/*
+ * Open flags, defines shared with TEE.
+ */
+#define TEE_FS_O_RDONLY 0x1
+#define TEE_FS_O_WRONLY 0x2
+#define TEE_FS_O_RDWR   0x4
+#define TEE_FS_O_CREAT  0x8
+#define TEE_FS_O_EXCL   0x10
+#define TEE_FS_O_APPEND 0x20
+
+/*
+ * Seek flags, defines shared with TEE.
+ */
+#define TEE_FS_SEEK_SET 0x1
+#define TEE_FS_SEEK_END 0x2
+#define TEE_FS_SEEK_CUR 0x4
+
+/*
+ * Mkdir flags, defines shared with TEE.
+ */
+#define TEE_FS_S_IWUSR 0x1
+#define TEE_FS_S_IRUSR 0x2
+
+/*
+ * Access flags, X_OK not supported, defines shared with TEE.
+ */
+#define TEE_FS_R_OK    0x1
+#define TEE_FS_W_OK    0x2
+#define TEE_FS_F_OK    0x4
+
+/*
+ *	RK Secure Storage Ctrl
+ *		Storage Size : 512 kb
+ *		Header Size : 8 byte * 2 for each top of 512 byte
+ *		Partision Table Size : 128 * 512 b (24 Files And Folder)
+ *		File number: 128 * 4 = 512
+ *		Data Size : 895 * 512 b
+ *
+ *	------ RKSS Structure --------
+ *	- 512 byte patition table1 [0]
+ *		- 126 * 4 = 504 byte table info
+ *		- 8 byte verification
+ *	- 512 byte patition table2 [1]
+ *	             ...
+ *	- 512 byte patition table128 [127]
+ *	- 512 byte section used refs [128]
+ *		- 1 byte = 2 flag
+ *	- 895 * 512 byte data	[129 - 1023]
+ *	------------------------------
+ *
+ */
+#define RKSS_DATA_SECTION_COUNT		1024
+#define RKSS_DATA_LEN			512
+#define RKSS_PARTITION_TABLE_COUNT	128		// total size 512 * 128
+#define RKSS_EACH_FILEFOLDER_COUNT	4		// 504 / 126 = 4
+#define RKSS_NAME_MAX_LENGTH		117		// 116 char + "\0"
+#define RKSS_USEDFLAGS_INDEX		RKSS_PARTITION_TABLE_COUNT
+
+typedef struct rkss_file_info
+{
+	uint8_t		used;
+	char 		name[RKSS_NAME_MAX_LENGTH];
+	uint16_t	index;	// from 129 to 1024
+	uint16_t	size;	// size of data
+	uint16_t	father;
+	uint8_t 	id; // file folder count index
+#define RK_FS_R    0x1
+#define RK_FS_W    0x2
+#define RK_FS_D    0x8
+	uint8_t		flags;
+}rkss_file_info; // 126 byte for each
+
+#define RKSS_VERSION		(uint32_t)0x1
+#define RKSS_CHECK_STR	(uint32_t)0x12345678
+#define RKSS_CHECK_PT		(uint8_t)0xFC
+typedef struct rkss_file_verification
+{
+	uint32_t version;
+	uint32_t checkstr;
+}rkss_file_verification; // 8 byte
+
+typedef struct rk_secure_storage
+{
+	unsigned long index;
+	unsigned char data[RKSS_DATA_LEN];
+}rk_secure_storage;
+
+/* Path to all secure storage dev. */
+#define RKSS_DEV "/dev/block/rknand_security"
+
+/* Function Defines */
+#define UNREFERENCED_PARAMETER(P) (P=P)
+#define CHECKFLAG(flags, flag) (flags & flag)
+#define ADDFLAG(flags, flag) (flags | flag)
+
+/* RK Secure Storage Calls */
+static int file_seek = 0;
+static char dir_cache[RKSS_NAME_MAX_LENGTH][12];
+static int dir_num = 0;
+static int dir_seek = 0;
+
+extern struct blk_desc *rockchip_get_bootdev(void);
+extern int part_get_info_by_name(struct blk_desc *dev_desc, const char *name,
+	disk_partition_t *info);
+extern unsigned long blk_dread(struct blk_desc *block_dev, lbaint_t start,
+			lbaint_t blkcnt, void *buffer);
+
+extern unsigned long blk_dwrite(struct blk_desc *block_dev, lbaint_t start,
+			 lbaint_t blkcnt, const void *buffer);
+
+static int rkss_read_section(struct rk_secure_storage *rkss)
+{
+	int ret;
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: Could not find device\n", __func__);
+		return -1;
+	}
+
+	if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
+		printf("Could not find security partition\n");
+		return -1;
+	}
+	ret = blk_dread(dev_desc, part_info.start + rkss->index, 1, rkss->data);
+	if (ret < 0)
+		return -1;
+
+	return 0;
+}
+
+static int rkss_write_section(struct rk_secure_storage *rkss)
+{
+	int ret;
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: Could not find device\n", __func__);
+		return -1;
+	}
+
+	if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
+		printf("Could not find security partition\n");
+		return -1;
+	}
+	ret = blk_dwrite(dev_desc, part_info.start + rkss->index, 1, rkss->data);
+	if (ret < 0)
+		return -1;
+
+	return 0;
+}
+
+#ifdef DEBUG_RKFSS
+static void rkss_dump(void* data, unsigned int len)
+{
+	char *p = (char *)data;
+	unsigned int i = 0;
+	printf("-------------- DUMP %d --------------", len);
+	for (i = 0; i < len; i++)
+	{
+		printf("%02x ", *(p + i));
+	}
+	printf("\n");
+	printf("------------- DUMP END -------------");
+}
+
+static void rkss_dump_ptable(void)
+{
+	printf("-------------- DUMP ptable --------------");
+	int i = 0;
+	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++)
+	{
+		struct rk_secure_storage rkss = {0};
+		rkss.index = i;
+		int ret = rkss_read_section(&rkss);
+		if (ret < 0)
+		{
+			printf("rkss_read_section fail ! ret: %d.", ret);
+			return;
+		}
+
+		int n ;
+		for (n = 0; n < RKSS_EACH_FILEFOLDER_COUNT; n++)
+		{
+			void *pdata = rkss.data;
+			struct rkss_file_info *p = (struct rkss_file_info *)pdata;
+			p += n;
+
+			printf("[%02d][%c] %s , inx:%d, size:%d",
+					i*RKSS_EACH_FILEFOLDER_COUNT+n, p->used == 0 ? 'F':'T' ,p->name,
+					p->index, p->size);
+		}
+	}
+	printf("-------------- DUMP END --------------");
+}
+
+static void rkss_dump_usedflags(void)
+{
+	struct rk_secure_storage rkss = {0};
+	rkss.index = RKSS_USEDFLAGS_INDEX;
+	int ret = rkss_read_section(&rkss);
+	if (ret < 0)
+	{
+		printf("rkss_read_section fail ! ret: %d.", ret);
+		return;
+	}
+	rkss_dump(rkss.data, RKSS_DATA_LEN);
+}
+#endif
+
+static int rkss_verify_ptable(struct rk_secure_storage* rkss)
+{
+	void *vp = (void *)rkss->data;
+	char *cp = (char *)vp;
+
+	if ( rkss->index > RKSS_PARTITION_TABLE_COUNT)
+	{
+		printf("cannot support verifing other section.");
+		return 0;
+	}
+
+	cp = (char *)(cp + RKSS_DATA_LEN - sizeof(struct rkss_file_verification));
+	struct rkss_file_verification *verify =
+			(struct rkss_file_verification *)(void *)cp;
+
+	if (verify->version != RKSS_VERSION
+			|| verify->checkstr != RKSS_CHECK_STR)
+	{
+		debug("verify [%lu] fail, cleanning ....", rkss->index);
+		memset(rkss->data, 0, sizeof(RKSS_DATA_LEN));
+		verify->checkstr = RKSS_CHECK_STR;
+		verify->version = RKSS_VERSION;
+		int ret = rkss_write_section(rkss);
+		if (ret < 0)
+		{
+			printf("cleanning ptable fail ! ret: %d.", ret);
+			return -1;
+		}
+		return 0;
+	}
+	return 0;
+}
+
+static int rkss_verify_usedflags(struct rk_secure_storage* rkss)
+{
+	uint8_t *flags = (uint8_t *)rkss->data;
+
+	int i = 0;
+	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT + 1; i++)
+	{
+		int duel = *(flags + (int)i/2);
+		int flag = i & 0x1 ? duel & 0x0F : (duel & 0xF0) >> 4;
+		if ( flag != 0x1 )
+		{
+			debug("init usedflags section ...");
+			memset(rkss->data, 0x00, RKSS_DATA_LEN);
+			int n = 0;
+			for (n = 0; n < RKSS_PARTITION_TABLE_COUNT + 1; n++)
+			{
+				uint8_t *flagw = (uint8_t *)rkss->data + (int)n/2;
+				uint8_t value = 0x1;
+				*flagw = n & 0x1 ? (*flagw & 0xF0) | (value & 0x0F) :
+						(*flagw & 0x0F) | (value << 4);
+			}
+			int ret = rkss_write_section(rkss);
+			if (ret < 0)
+			{
+				printf("clean usedflags section failed!!! ret: %d.", ret);
+				return -1;
+			}
+
+			return 0;
+		}
+	}
+	return 0;
+}
+
+static int rkss_get_fileinfo_by_index(int fd, struct rkss_file_info *pfileinfo)
+{
+	int i = fd / RKSS_EACH_FILEFOLDER_COUNT;
+	int n = fd - (RKSS_EACH_FILEFOLDER_COUNT * i);
+
+	struct rk_secure_storage rkss = {0};
+	rkss.index = i;
+	int ret = rkss_read_section(&rkss);
+	if (ret < 0)
+	{
+		printf("rkss_read_section fail ! ret: %d.", ret);
+		return -1;
+	}
+
+	void *pdata = rkss.data;
+	struct rkss_file_info *p = (struct rkss_file_info *)pdata;
+	p += n;
+
+	if (p->used != 1)
+	{
+		printf("error: unused section! ");
+		return -1;
+	}
+
+	memcpy(pfileinfo, p, sizeof(struct rkss_file_info));
+	return 0;
+}
+
+static int rkss_get_fileinfo_by_name(
+		char* filename, struct rkss_file_info *pfileinfo)
+{
+	int i = 0;
+	uint8_t n = 0;
+	unsigned int len;
+
+	len = strlen(filename);
+	if (len > RKSS_NAME_MAX_LENGTH - 1)
+	{
+		printf("filename is too long. length:%u", len);
+		return -1;
+	}
+
+	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++)
+	{
+		struct rk_secure_storage rkss = {0};
+		rkss.index = i;
+		int ret = rkss_read_section(&rkss);
+		if (ret < 0)
+		{
+			printf("rkss_read_section fail ! ret: %d.", ret);
+			return -1;
+		}
+
+		for (n = 0; n < RKSS_EACH_FILEFOLDER_COUNT; n++)
+		{
+			void *pdata = rkss.data;
+			struct rkss_file_info *p = (struct rkss_file_info *)pdata;
+			p += n;
+
+			if (p->used == 0)
+				continue;
+
+			if (!strcmp(p->name, filename))
+			{
+				debug("rkss_get_fileinfo_by_name: hit table[%d/%d], index[%d/%d]",
+						i, RKSS_PARTITION_TABLE_COUNT, n, RKSS_EACH_FILEFOLDER_COUNT);
+				memcpy(pfileinfo, p, sizeof(struct rkss_file_info));
+				return i * RKSS_EACH_FILEFOLDER_COUNT + n;
+			}
+
+			// Folder Matching
+			const char *split = "/";
+			char *last_inpos = filename;
+			char *last_svpos = p->name;
+			char *cur_inpos = NULL;
+			char *cur_svpos = NULL;
+			do {
+				cur_inpos = strstr(last_inpos, split);
+				cur_svpos = strstr(last_svpos, split);
+				int size_in = cur_inpos == NULL ?
+						(int)strlen(last_inpos) : cur_inpos - last_inpos;
+				int size_sv = cur_svpos == NULL ?
+						(int)strlen(last_svpos) : cur_svpos - last_svpos;
+
+				ret = memcmp(last_inpos, last_svpos, size_in);
+
+				last_inpos = cur_inpos + 1;
+				last_svpos = cur_svpos + 1;
+
+				if (size_in != size_sv || ret)
+					goto UNMATCHFOLDER;
+
+			} while(cur_inpos && cur_svpos);
+
+			debug("Matched folder: %s", p->name);
+			return -100;
+UNMATCHFOLDER:
+			debug("Unmatched ...");
+		}
+	}
+	debug("rkss_get_fileinfo_by_name: file or dir no found!");
+	return -1;
+}
+
+static int rkss_get_dirs_by_name(char* filename)
+{
+	int i = 0;
+	uint8_t n = 0;
+	unsigned int len;
+
+	len = strlen(filename);
+	if (len > RKSS_NAME_MAX_LENGTH - 1)
+	{
+		printf("filename is too long. length:%u", len);
+		return -1;
+	}
+
+	dir_num = 0;
+	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++)
+	{
+		struct rk_secure_storage rkss = {0};
+		rkss.index = i;
+		int ret = rkss_read_section(&rkss);
+		if (ret < 0)
+		{
+			printf("rkss_read_section fail ! ret: %d.", ret);
+			return -1;
+		}
+
+		for (n = 0; n < RKSS_EACH_FILEFOLDER_COUNT; n++)
+		{
+			void *pdata = rkss.data;
+			struct rkss_file_info *p = (struct rkss_file_info *)pdata;
+			p += n;
+
+			if (p->used == 0)
+				continue;
+
+			// Full Matching
+			ret = memcmp(p->name, filename, strlen(filename));
+			debug("comparing [fd:%d] : %s ?= %s , ret:%d",
+					i*RKSS_EACH_FILEFOLDER_COUNT+n, p->name, filename, ret);
+			if (!ret && strlen(p->name) > strlen(filename))
+			{
+				char *chk = p->name + strlen(filename);
+				if (*chk == '/')
+				{
+					char *file = p->name + strlen(filename) + 1;
+					char *subdir = strtok(file, "/");
+					printf("found: %s", subdir);
+					strcpy(dir_cache[dir_num], subdir);
+					++dir_num;
+				}
+			}
+		}
+	}
+	return dir_num;
+}
+
+static int rkss_get_empty_section_from_usedflags(int section_size)
+{
+	struct rk_secure_storage rkss = {0};
+	rkss.index = RKSS_USEDFLAGS_INDEX;
+	int ret = rkss_read_section(&rkss);
+	if (ret < 0)
+	{
+		printf("rkss_read_section fail ! ret: %d.", ret);
+		return -1;
+	}
+
+	int i = 0;
+	int count0 = 0;
+	for (i = 0; i < RKSS_DATA_SECTION_COUNT; i++)
+	{
+		uint8_t *flag = (uint8_t *)rkss.data + (int)i/2;
+		uint8_t value = i & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
+
+		if (value == 0x0)
+		{
+			if (++count0 == section_size)
+			{
+				return (i + 1 - section_size);
+			}
+		}
+		else
+		{
+			count0 = 0;
+		}
+	}
+
+	printf("Not enough space available in secure storage !");
+	return -10;
+}
+
+static int rkss_incref_usedflags_section(int index)
+{
+	debug("rkss_incref_usedflags_section :%d", index);
+	if (index >= RKSS_DATA_SECTION_COUNT)
+	{
+		printf("index[%d] out of range.", index);
+		return -1;
+	}
+
+	struct rk_secure_storage rkss = {0};
+	rkss.index = RKSS_USEDFLAGS_INDEX;
+	int ret = rkss_read_section(&rkss);
+	if (ret < 0)
+	{
+		printf("rkss_read_section fail ! ret: %d.", ret);
+		return -1;
+	}
+
+	uint8_t *flag = (uint8_t *)rkss.data + (int)index/2;
+	int value = index & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
+	if (++value > 0xF)
+	{
+		printf("reference out of data: %d", value);
+		value = 0xF;
+	}
+	*flag = index & 0x1 ? (*flag & 0xF0) | (value & 0x0F) :
+			(*flag & 0x0F) | (value << 4);
+
+	ret = rkss_write_section(&rkss);
+	if (ret < 0)
+	{
+		printf("rkss_write_section fail ! ret: %d.", ret);
+		return -1;
+	}
+
+	return 0;
+}
+
+static int rkss_decref_usedflags_section(int index)
+{
+	debug("rkss_decref_usedflags_section :%d", index);
+	if (index >= RKSS_DATA_SECTION_COUNT)
+	{
+		printf("index[%d] out of range.", index);
+		return -1;
+	}
+
+	struct rk_secure_storage rkss = {0};
+	rkss.index = RKSS_USEDFLAGS_INDEX;
+	int ret = rkss_read_section(&rkss);
+	if (ret < 0)
+	{
+		printf("rkss_read_section fail ! ret: %d.", ret);
+		return -1;
+	}
+
+	uint8_t *flag = (uint8_t *)rkss.data + (int)index/2;
+	int value = index & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
+	if (--value < 0)
+	{
+		printf("reference out of data: %d", value);
+		value = 0x0;
+	}
+	*flag = index & 0x1 ? (*flag & 0xF0) | (value & 0x0F) :
+			(*flag & 0x0F) | (value << 4);
+
+	ret = rkss_write_section(&rkss);
+	if (ret < 0)
+	{
+		printf("rkss_write_section fail ! ret: %d.", ret);
+		return -1;
+	}
+
+	return 0;
+}
+
+static int rkss_write_empty_ptable(struct rkss_file_info *pfileinfo)
+{
+	int i = 0;
+	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++)
+	{
+		struct rk_secure_storage rkss = {0};
+		rkss.index = i;
+		int ret = rkss_read_section(&rkss);
+		if (ret < 0)
+		{
+			printf("rkss_read_section fail ! ret: %d.", ret);
+			return -1;
+		}
+
+		int n = 0;
+		for (n = 0; n < RKSS_EACH_FILEFOLDER_COUNT; n++)
+		{
+			void *pdata = rkss.data;
+			struct rkss_file_info *p = (struct rkss_file_info *)pdata;
+			p += n;
+			if (p->used == 0)
+			{
+				debug("write ptable in [%d][%d] .",i ,n);
+				memcpy(p, pfileinfo, sizeof(struct rkss_file_info));
+				p->used = 1;
+				p->id = n;
+				debug("write emt ptable : [%d,%d] name:%s, index:%d, size:%d, used:%d",
+						i,n,p->name,p->index,p->size,p->used);
+				ret = rkss_write_section(&rkss);
+				if (ret < 0)
+				{
+					printf("rkss_write_section fail ! ret: %d.", ret);
+					return -1;
+				}
+
+				return i * RKSS_EACH_FILEFOLDER_COUNT + n;
+			}
+		}
+	}
+	printf("No enough ptable space available in secure storage.");
+	return -1;
+}
+
+static int rkss_write_back_ptable(int fd, struct rkss_file_info *pfileinfo)
+{
+	int i = fd / RKSS_EACH_FILEFOLDER_COUNT;
+	int n = fd - (RKSS_EACH_FILEFOLDER_COUNT * i);
+
+	struct rk_secure_storage rkss = {0};
+	rkss.index = i;
+	int ret = rkss_read_section(&rkss);
+	if (ret < 0)
+	{
+		debug("rkss_read_section fail ! ret: %d.", ret);
+		return -1;
+	}
+
+	void *pdata = rkss.data;
+	struct rkss_file_info *p = (struct rkss_file_info *)pdata;
+	p += n;
+
+	memcpy(p, pfileinfo, sizeof(struct rkss_file_info));
+	debug("write ptable : [%d,%d] name:%s, index:%d, size:%d, used:%d",
+			i,n,p->name,p->index,p->size,p->used);
+
+	ret = rkss_write_section(&rkss);
+	if (ret < 0)
+	{
+		debug("rkss_write_section fail ! ret: %d.", ret);
+		return -1;
+	}
+
+	return 0;
+}
+
+/*
+ * Structure for file related RPC calls
+ *
+ * @op     The operation like open, close, read, write etc
+ * @flags  Flags to the operation shared with secure world
+ * @arg    Argument to operation
+ * @fd     NW file descriptor
+ * @len    Length of buffer at the end of this struct
+ * @res    Result of the operation
+ */
+struct tee_fs_rpc {
+	int op;
+	int flags;
+	int arg;
+	int fd;
+	uint32_t len;
+	int res;
+};
+
+static int tee_fs_open(struct tee_fs_rpc *fsrpc)
+{
+	int make_newfile = 0;
+	char *filename = (char *)(fsrpc + 1);
+
+	if (strlen(filename) > RKSS_NAME_MAX_LENGTH)
+	{
+		debug("tee_fs_open: file name too long. %s",filename);
+		return -1;
+	}
+
+	debug("tee_fs_open open file: %s, len: %zu", filename, strlen(filename));
+	struct rkss_file_info p = {0};
+	int ret = rkss_get_fileinfo_by_name(filename, &p);
+	if (ret < 0)
+	{
+		debug("tee_fs_open : no such file. %s", filename);
+		make_newfile = 1;
+	}
+	else
+	{
+		fsrpc->fd = ret;
+		file_seek = 0;
+		if (CHECKFLAG(fsrpc->flags, TEE_FS_O_APPEND))
+		{
+			file_seek = p.size;
+		}
+	}
+
+	if (make_newfile)
+	{
+		if (CHECKFLAG(fsrpc->flags, TEE_FS_O_CREAT))
+		{
+			debug("tee_fs_open create new file: %s", filename);
+			strcpy(p.name, filename);
+			p.index = 0;
+			p.size = fsrpc->len;
+			p.used = 1;
+			p.flags = RK_FS_R | RK_FS_W;
+			ret = rkss_write_empty_ptable(&p);
+			if (ret < 0)
+			{
+				printf("tee_fs_open : error. %s", filename);
+				return -1;
+			}
+			fsrpc->fd = ret;
+			file_seek = 0;
+		}
+		else
+		{
+			debug("and no create flag found.");
+			return -1;
+		}
+	}
+
+	debug("tee_fs_open ! %s , fd:%d, flag: %x, len: %d",
+			filename, fsrpc->fd, fsrpc->flags, fsrpc->len);
+
+	return fsrpc->fd;
+}
+
+static int tee_fs_close(struct tee_fs_rpc *fsrpc)
+{
+	debug("tee_fs_close !");
+	UNREFERENCED_PARAMETER(fsrpc);
+	return 0;
+}
+
+static int tee_fs_read(struct tee_fs_rpc *fsrpc)
+{
+	debug("tee_fs_read! fd:%d, len:%d", fsrpc->fd, fsrpc->len);
+	void *data = (void *)(fsrpc + 1);
+
+	struct rkss_file_info p = {0};
+	int ret = rkss_get_fileinfo_by_index(fsrpc->fd, &p);
+	if (ret < 0)
+	{
+		printf("unavailable fd !");
+		return -1;
+	}
+
+	if (file_seek != 0)
+	{
+		printf("warning !!! file_seek != 0. unsupported now.");
+	}
+
+	int num = fsrpc->len / RKSS_DATA_LEN + 1;
+	int left = fsrpc->len > p.size ? p.size : fsrpc->len;
+	int di = 0;
+	debug("reading section[%d], fd:%d, len:%d, filesize:%d",
+			p.index, fsrpc->fd, fsrpc->len, p.size);
+	int i = 0;
+	for (i = 0; i < num; i++)
+	{
+		struct rk_secure_storage rkss = {0};
+		rkss.index = p.index + i;
+		ret = rkss_read_section(&rkss);
+		if (ret < 0)
+		{
+			printf("unavailable file index %lu!", rkss.index);
+			return -1;
+		}
+
+		int read = left > RKSS_DATA_LEN ? RKSS_DATA_LEN : left;
+		memcpy(data + di, rkss.data, read);
+#ifdef DEBUG_RKFSS
+		rkss_dump(data + di, read);
+#endif
+		di += read;
+		left -= read;
+	}
+	return di;
+}
+
+static int tee_fs_write(struct tee_fs_rpc *fsrpc)
+{
+	debug("tee_fs_write ! fd:%d, lenth:%d",fsrpc->fd, fsrpc->len);
+	void *data = (void *)(fsrpc + 1);
+
+	if (fsrpc->fd < 0)
+	{
+		printf("tee_fs_write error ! wrong fd : %d",fsrpc->fd);
+		return -1;
+	}
+
+	if (file_seek != 0)
+	{
+		printf("warning !!! file_seek != 0. unsupported now.");
+	}
+
+	struct rkss_file_info p = {0};
+	int ret = rkss_get_fileinfo_by_index(fsrpc->fd, &p);
+	if (ret < 0)
+	{
+		printf("tee_fs_write: fd unvailable!");
+		return -1;
+	}
+
+	p.size = fsrpc->len;
+	int num = fsrpc->len / RKSS_DATA_LEN + 1;
+	p.index = rkss_get_empty_section_from_usedflags(num);
+	debug("Get Empty section in %d", p.index);
+	p.used = 1;
+	int i = 0;
+	for (i = 0; i < num; i++)
+	{
+		ret = rkss_incref_usedflags_section(p.index + i);
+		if (ret < 0)
+		{
+			printf("rkss_incref_usedflags_section error !");
+			return -1;
+		}
+	}
+
+	ret = rkss_write_back_ptable(fsrpc->fd, &p);
+	if (ret < 0)
+	{
+		printf("tee_fs_write: write ptable error!");
+		return -1;
+	}
+
+	int left = p.size;
+	int lastw = 0;
+	for (i = 0; i < num; i++)
+	{
+		struct rk_secure_storage rkss = {0};
+		rkss.index = p.index + i;
+		int ws = left > RKSS_DATA_LEN ? RKSS_DATA_LEN : left;
+		memcpy(rkss.data, (char *)data + lastw, ws);
+		lastw += ws;
+		left -= RKSS_DATA_LEN;
+		left = left < 0 ? 0 : left;
+		debug("writing: fd:%d, section[%lu], size:%d", fsrpc->fd, rkss.index, ws);
+#ifdef DEBUG_RKFSS
+		rkss_dump(rkss.data, ws);
+#endif
+		ret = rkss_write_section(&rkss);
+		if (ret < 0)
+		{
+			printf("rkss_write_section: write error!");
+			return -1;
+		}
+	}
+
+#ifdef DEBUG_RKFSS
+	rkss_dump_usedflags();
+#endif
+	return fsrpc->len;
+}
+
+static int tee_fs_seek(struct tee_fs_rpc *fsrpc)
+{
+	debug("tee_fs_seek ! fd:%d, seek:%d, flag:%x", fsrpc->fd, fsrpc->arg, fsrpc->flags);
+
+	if (fsrpc->flags == TEE_FS_SEEK_CUR)
+	{
+		fsrpc->res = file_seek + fsrpc->arg;
+	}
+	else if (fsrpc->flags == TEE_FS_SEEK_SET)
+	{
+		file_seek = fsrpc->arg;
+		fsrpc->res = file_seek;
+	}
+	else if (fsrpc->flags == TEE_FS_SEEK_END)
+	{
+		struct rkss_file_info p = {0};
+		int ret = rkss_get_fileinfo_by_index(fsrpc->fd, &p);
+		if (ret < 0)
+		{
+			printf("unavilable fd.");
+			return -1;
+		}
+		file_seek = p.size + fsrpc->arg;
+		fsrpc->res = file_seek;
+	}
+	else
+	{
+		printf("tee_fs_seek: unsupport seed mode.");
+		return -1;
+	}
+
+	return fsrpc->res;
+}
+
+static int tee_fs_unlink(struct tee_fs_rpc *fsrpc)
+{
+	char *filename = (char *)(fsrpc + 1);
+
+	struct rkss_file_info p = {0};
+	int ret = rkss_get_fileinfo_by_name(filename, &p);
+	if (ret < 0)
+	{
+		printf("tee_fs_unlink : no such file. %s", filename);
+		return 0;
+	}
+	int fd = ret;
+
+	debug("tee_fs_unlink ! %s fd:%d index:%d size:%d", filename, fd, p.index, p.size);
+
+	/* decrease ref from usedflags */
+	int num = p.size / RKSS_DATA_LEN + 1;
+	int i = 0;
+	for (i = 0; i < num; i++)
+	{
+		ret = rkss_decref_usedflags_section(p.index + i);
+		if (ret < 0)
+		{
+			printf("rkss_decref_usedflags_section error !");
+			return -1;
+		}
+	}
+
+	/* rm from ptable */
+	memset(&p, 0, sizeof(struct rkss_file_info));
+	ret = rkss_write_back_ptable(fd, &p);
+	if (ret < 0)
+	{
+		printf("tee_fs_unlink : write back error %d", ret);
+		return -1;
+	}
+
+#ifdef DEBUG_RKFSS
+	rkss_dump_ptable();
+#endif
+
+	return 0;
+}
+
+static int tee_fs_link(struct tee_fs_rpc *fsrpc)
+{
+	char *filename = (char *)(fsrpc + 1);
+	size_t offset_new_fn = strlen(filename) + 1;
+	char *newfilename = filename + offset_new_fn;
+	debug("tee_fs_link ! %s -> %s", filename, newfilename);
+
+	struct rkss_file_info p_old = {0};
+	int ret = rkss_get_fileinfo_by_name(filename, &p_old);
+	if (ret < 0)
+	{
+		printf("cannot find src file %s.", filename);
+		return -1;
+	}
+
+	struct rkss_file_info p_check = {0};
+	ret = rkss_get_fileinfo_by_name(newfilename, &p_check);
+	if (!ret)
+	{
+		printf("file exist ! %s.", newfilename);
+		return -1;
+	}
+
+	struct rkss_file_info p_new = {0};
+	memcpy(&p_new, &p_old, sizeof(struct rkss_file_info));
+	strcpy(p_new.name, newfilename);
+	ret = rkss_write_empty_ptable(&p_new);
+	if (ret < 0)
+	{
+		printf("tee_fs_open : error. %s", filename);
+		return -1;
+	}
+
+	int num = p_new.size / RKSS_DATA_LEN + 1;
+	int i = 0;
+	for (i = 0; i < num; i++)
+	{
+		ret = rkss_incref_usedflags_section(p_new.index + i);
+		if (ret < 0)
+		{
+			printf("rkss_incref_usedflags_section error !");
+			return -1;
+		}
+	}
+
+#ifdef DEBUG_RKFSS
+	rkss_dump_ptable();
+#endif
+
+	return 0;
+}
+
+static int tee_fs_rename(struct tee_fs_rpc *fsrpc)
+{
+	char *filenames = (char *)(fsrpc + 1);
+	char *newnames = filenames + strlen(filenames) + 1;
+	debug("rename: %s -> %s", filenames, newnames);
+
+	struct rkss_file_info p = {0};
+	int ret = rkss_get_fileinfo_by_name(filenames, &p);
+	if (ret < 0)
+	{
+		printf("filename no found .");
+		return -1;
+	}
+
+	strcpy(p.name, newnames);
+
+	ret = rkss_write_back_ptable(ret, &p);
+	if (ret < 0)
+	{
+		printf("write ptable error!");
+		return -1;
+	}
+
+	return 0;
+}
+
+static int tee_fs_truncate(struct tee_fs_rpc *fsrpc)
+{
+	debug("tee_fs_truncate: fd:%d, lenth:%d", fsrpc->fd, fsrpc->arg);
+	if (fsrpc->fd < 0)
+	{
+		printf("tee_fs_truncate: fd unavilable !");
+		return -1;
+	}
+
+	struct rkss_file_info p = {0};
+	int ret = rkss_get_fileinfo_by_index(fsrpc->fd, &p);
+	if (ret < 0)
+	{
+		printf("fd unvailable!");
+		return -1;
+	}
+
+	p.size = fsrpc->arg;
+	ret = rkss_write_back_ptable(fsrpc->fd, &p);
+	if (ret < 0)
+	{
+		printf("tee_fs_write: write ptable error!");
+		return -1;
+	}
+	return 0;
+}
+
+static int tee_fs_mkdir(struct tee_fs_rpc *fsrpc)
+{
+	char *dirname = (char *)(fsrpc + 1);
+	UNREFERENCED_PARAMETER(dirname);
+	debug("tee_fs_mkdir: %s",dirname);
+	return 0;
+}
+
+static int tee_fs_opendir(struct tee_fs_rpc *fsrpc)
+{
+	char *dirname = (char *)(fsrpc + 1);
+	dir_seek = 0;
+	int ret = rkss_get_dirs_by_name(dirname);
+	if (ret < 0)
+	{
+		printf("tee_fs_opendir: error");
+	}
+	debug("tee_fs_opendir: %s, seek/num:%d/%d", dirname, dir_seek, dir_num);
+	return 0;
+}
+
+static int tee_fs_closedir(struct tee_fs_rpc *fsrpc)
+{
+	char *dirname = (char *)(fsrpc + 1);
+	UNREFERENCED_PARAMETER(dirname);
+	debug("tee_fs_closedir: %s", dirname);
+	dir_seek = 0;
+	dir_num = 0;
+	return 0;
+}
+
+static int tee_fs_readdir(struct tee_fs_rpc *fsrpc)
+{
+	char *dirname = (char *)(fsrpc + 1);
+	printf("seek/num:%d/%d",dir_seek, dir_num);
+	if (dir_seek == dir_num)
+	{
+		dirname = NULL;
+		fsrpc->len = 0;
+		printf("tee_fs_readdir: END");
+		return -1;
+	}
+
+	strcpy(dirname, dir_cache[dir_seek]);
+	fsrpc->len = strlen(dir_cache[dir_seek]) + 1;
+	++dir_seek;
+
+	debug("tee_fs_readdir: %s", dirname);
+	return 0;
+}
+
+static int tee_fs_rmdir(struct tee_fs_rpc *fsrpc)
+{
+	char *dirname = (char *)(fsrpc + 1);
+	debug("tee_fs_rmdir: %s", dirname);
+
+	struct rkss_file_info p = {0};
+	int ret = rkss_get_fileinfo_by_name(dirname, &p);
+	if (ret == -100)
+	{
+		printf("dir is not empty.");
+		return -1;
+	}
+	else if (ret >= 0)
+	{
+		printf("%s is not a dir.", p.name);
+		return -1;
+	}
+	debug("rmdir success.");
+	return 0;
+}
+
+static int tee_fs_access(struct tee_fs_rpc *fsrpc)
+{
+	char *filename = (char *)(fsrpc + 1);
+	debug("tee_fs_access: name:%s,flag:%x",filename,fsrpc->flags);
+
+	struct rkss_file_info p = {0};
+	int ret = rkss_get_fileinfo_by_name(filename, &p);
+	if (ret < 0 && ret != -100)
+	{
+		debug("tee_fs_access: %s no such file or directory.", filename);
+		return -1;
+	}
+
+	if (CHECKFLAG(fsrpc->flags, TEE_FS_R_OK))
+	{
+		if (!CHECKFLAG(p.flags, RK_FS_R))
+		{
+			printf("tee_fs_access: no permission FS_R_OK in %x.", p.flags);
+			return -1;
+		}
+	}
+
+	if (CHECKFLAG(fsrpc->flags, TEE_FS_W_OK))
+	{
+		if (!CHECKFLAG(p.flags, RK_FS_W))
+		{
+			printf("tee_fs_access: no permission FS_W_OK in %x.", p.flags);
+			return -1;
+		}
+	}
+	return 0;
+}
+
+int tee_supp_rk_fs_init(void)
+{
+	assert(sizeof(struct rkss_file_info) == 126);
+	assert(512 / sizeof(struct rkss_file_info) == RKSS_EACH_FILEFOLDER_COUNT);
+
+	int i = 0;
+#ifdef DEBUG_CLEAN_RKSS // clean secure storage
+	for (i = 0; i < RKSS_DATA_SECTION_COUNT; i++)
+	{
+		struct rk_secure_storage rkss = {0};
+		rkss.index = i;
+		rkss_write_section(&rkss);
+		printf("cleaned [%d]", i);
+	}
+#endif
+
+	// Verify Partition Table
+	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++)
+	{
+		//DMSG("rkss_get_fileinfo_by_name: reading %d",i);
+		struct rk_secure_storage rkss = {0};
+		rkss.index = i;
+		int ret = rkss_read_section(&rkss);
+		if (ret < 0)
+		{
+			printf("rkss_read_section fail ! ret: %d.", ret);
+			return -1;
+		}
+		if (rkss_verify_ptable(&rkss) < 0)
+		{
+			printf("rkss_verify_ptable fail !");
+			return -1;
+		}
+	}
+
+	// Verify Usedflags Section
+	struct rk_secure_storage rkss = {0};
+	rkss.index = RKSS_USEDFLAGS_INDEX;
+	int ret = rkss_read_section(&rkss);
+	if (ret < 0)
+	{
+		printf("rkss_read_section fail ! ret: %d.", ret);
+		return -1;
+	}
+	ret = rkss_verify_usedflags(&rkss);
+	if (ret < 0)
+	{
+		printf("rkss_verify_usedflags fail ! ret: %d.", ret);
+		return -1;
+	}
+
+#ifdef DEBUG_RKFSS
+	rkss_dump_ptable();
+	rkss_dump_usedflags();
+#endif
+
+	return 0;
+}
+void OpteeClientRkFsInit(void)
+{
+	debug(" OpteeClientRkFsInit\n");
+	tee_supp_rk_fs_init();
+}
+
+static int rkss_step = 0;
+int tee_supp_rk_fs_process(void *cmd, size_t cmd_size)
+{
+	struct tee_fs_rpc *fsrpc = cmd;
+	int ret = -1;
+
+	if (cmd_size < sizeof(struct tee_fs_rpc))
+	{
+		printf(">>>cmd_size < sizeof(struct tee_fs_rpc) !");
+		return ret;
+	}
+
+	if (cmd == NULL)
+	{
+		printf(">>>cmd == NULL !");
+		return ret;
+	}
+
+	switch (fsrpc->op) {
+	case TEE_FS_OPEN:
+		debug(">>>>>>> [%d] TEE_FS_OPEN !", rkss_step++);
+		ret = tee_fs_open(fsrpc);
+		break;
+	case TEE_FS_CLOSE:
+		debug(">>>>>>> [%d] TEE_FS_CLOSE !", rkss_step++);
+		ret = tee_fs_close(fsrpc);
+		break;
+	case TEE_FS_READ:
+		debug(">>>>>>> [%d] TEE_FS_READ !", rkss_step++);
+		ret = tee_fs_read(fsrpc);
+		break;
+	case TEE_FS_WRITE:
+		debug(">>>>>>> [%d] TEE_FS_WRITE !", rkss_step++);
+		ret = tee_fs_write(fsrpc);
+		break;
+	case TEE_FS_SEEK:
+		debug(">>>>>>> [%d] TEE_FS_SEEK !", rkss_step++);
+		ret = tee_fs_seek(fsrpc);
+		break;
+	case TEE_FS_UNLINK:
+		debug(">>>>>>> [%d] TEE_FS_UNLINK !", rkss_step++);
+		ret = tee_fs_unlink(fsrpc);
+		break;
+	case TEE_FS_RENAME:
+		debug(">>>>>>> [%d] TEE_FS_RENAME !", rkss_step++);
+		ret = tee_fs_rename(fsrpc);
+		break;
+	case TEE_FS_TRUNC:
+		debug(">>>>>>> [%d] TEE_FS_TRUNC !", rkss_step++);
+		ret = tee_fs_truncate(fsrpc);
+		break;
+	case TEE_FS_MKDIR:
+		debug(">>>>>>> [%d] TEE_FS_MKDIR !", rkss_step++);
+		ret = tee_fs_mkdir(fsrpc);
+		debug(">>>>>>> ret = [%d]  !", ret);
+		break;
+	case TEE_FS_OPENDIR:
+		debug(">>>>>>> [%d] TEE_FS_OPENDIR !", rkss_step++);
+		ret = tee_fs_opendir(fsrpc);
+		break;
+	case TEE_FS_CLOSEDIR:
+		debug(">>>>>>> [%d] TEE_FS_CLOSEDIR !", rkss_step++);
+		ret = tee_fs_closedir(fsrpc);
+		break;
+	case TEE_FS_READDIR:
+		debug(">>>>>>> [%d] TEE_FS_READDIR !", rkss_step++);
+		ret = tee_fs_readdir(fsrpc);
+		break;
+	case TEE_FS_RMDIR:
+		debug(">>>>>>> [%d] TEE_FS_RMDIR !", rkss_step++);
+		ret = tee_fs_rmdir(fsrpc);
+		break;
+	case TEE_FS_ACCESS:
+		debug(">>>>>>> [%d] TEE_FS_ACCESS !", rkss_step++);
+		ret = tee_fs_access(fsrpc);
+		break;
+	case TEE_FS_LINK:
+		debug(">>>>>>> [%d] TEE_FS_LINK !", rkss_step++);
+		ret = tee_fs_link(fsrpc);
+		break;
+	default:
+		printf(">>>>> DEFAULT !! %d",fsrpc->op);
+		break;
+	}
+
+	fsrpc->res = ret;
+	debug(">>>>>>> fsrpc->res = [%d]	!", fsrpc->res);
+
+	return ret;
+}
diff --git a/lib/optee_clientApi/OpteeClientSMC.c b/lib/optee_clientApi/OpteeClientSMC.c
index b3df5d6f7f..8e2aaffb34 100644
--- a/lib/optee_clientApi/OpteeClientSMC.c
+++ b/lib/optee_clientApi/OpteeClientSMC.c
@@ -9,6 +9,8 @@
 #include <optee_include/OpteeClientSMC.h>
 #include <optee_include/OpteeClientRPC.h>
 #include <optee_include/teesmc.h>
+#include <optee_include/teesmc_v2.h>
+
 
 #define TEEC_SMC_DEFAULT_CACHE_ATTRIBUTES \
 	(TEESMC_ATTR_CACHE_DEFAULT << TEESMC_ATTR_CACHE_SHIFT);
@@ -19,6 +21,19 @@ static void GetTeeSmc32Params(t_teesmc32_param *TeeSmc32Param,
 	TEEC_Operation *operation);
 static TEEC_Result OpteeSmcCall(t_teesmc32_arg *TeeSmc32Arg);
 
+void tee_uuid_to_octets(uint8_t *d, const TEEC_UUID *s)
+{
+	d[0] = s->timeLow >> 24;
+	d[1] = s->timeLow >> 16;
+	d[2] = s->timeLow >> 8;
+	d[3] = s->timeLow;
+	d[4] = s->timeMid >> 8;
+	d[5] = s->timeMid;
+	d[6] = s->timeHiAndVersion >> 8;
+	d[7] = s->timeHiAndVersion;
+	memcpy(d + 8, s->clockSeqAndNode, sizeof(s->clockSeqAndNode));
+}
+
 /*
  * This function opens a new Session between the Client application and the
  * specified TEE application.
@@ -38,8 +53,16 @@ TEEC_Result TEEC_SMC_OpenSession(TEEC_Context *context,
 
 	t_teesmc32_arg *TeeSmc32Arg = NULL;
 	t_teesmc32_param *TeeSmc32Param = NULL;
+
 	t_teesmc_meta_open_session *TeeSmcMetaSession = NULL;
-	static const uint32_t MetaNum = 1;
+
+#ifdef CONFIG_OPTEE_V1
+	uint32_t MetaNum = 1;
+#endif
+
+#ifdef CONFIG_OPTEE_V2
+	uint32_t MetaNum = 2;
+#endif
 
 	*error_origin = TEEC_ORIGIN_API;
 
@@ -77,18 +100,34 @@ TEEC_Result TEEC_SMC_OpenSession(TEEC_Context *context,
 		sizeof(TeeSmcMetaSession->uuid));
 	TeeSmcMetaSession->clnt_login = TEEC_LOGIN_PUBLIC;
 
-	TeeSmc32Param[0].u.memref.buf_ptr = (uint32_t) TeeSmcMetaSession;
+	TeeSmc32Param[0].u.memref.buf_ptr = (uint32_t) (size_t)TeeSmcMetaSession;
 	TeeSmc32Param[0].u.memref.size = sizeof(*TeeSmcMetaSession);
 
-#ifdef CONFIG_ROCKCHIP_RK3328
+#ifdef CONFIG_OPTEE_V1
+#ifdef CONFIG_ARM64
 	TeeSmc32Param[0].attr = TEESMC_ATTR_TYPE_MEMREF_INPUT |
 				TEESMC_ATTR_META              |
 				TEEC_SMC_DEFAULT_CACHE_ATTRIBUTES;
-#endif
-
-#ifdef CONFIG_ROCKCHIP_RK322X
+#else
 	TeeSmc32Param[0].attr = TEESMC_ATTR_TYPE_MEMREF_INPUT |
 				TEESMC_ATTR_META;
+#endif
+#endif
+
+#ifdef CONFIG_OPTEE_V2
+#ifdef CONFIG_ARM64
+	uint8_t * session_uuid = (uint8_t *)&TeeSmcMetaSession->uuid;
+	tee_uuid_to_octets(session_uuid, destination);
+	memcpy((void *)&TeeSmc32Param[0].u.value, &TeeSmcMetaSession->uuid, sizeof(TeeSmcMetaSession->uuid));
+	TeeSmc32Param[1].u.value.c = TeeSmcMetaSession->clnt_login;
+
+	TeeSmc32Param[0].attr = OPTEE_MSG_ATTR_TYPE_VALUE_INPUT_V2 |
+				OPTEE_MSG_ATTR_META_V2;
+	TeeSmc32Param[1].attr = OPTEE_MSG_ATTR_TYPE_VALUE_INPUT_V2 |
+				OPTEE_MSG_ATTR_META_V2;
+#else
+	printf("Not support! All rockchips use optee v2.5 are 64 bits! \n");
+#endif
 #endif
 
 	SetTeeSmc32Params(operation, TeeSmc32Param + MetaNum);
@@ -128,6 +167,7 @@ TEEC_Result TEEC_SMC_CloseSession(TEEC_Session *session,
 {
 	TEEC_Result TeecResult = TEEC_SUCCESS;
 	uint32_t TeeSmc32ArgLength;
+
 	t_teesmc32_arg *TeeSmc32Arg = NULL;
 
 	*error_origin = TEEC_ORIGIN_API;
@@ -174,6 +214,7 @@ TEEC_Result TEEC_SMC_InvokeCommand(TEEC_Session *session,
 {
 	TEEC_Result TeecResult = TEEC_SUCCESS;
 	uint32_t TeeSmc32ArgLength;
+
 	t_teesmc32_arg *TeeSmc32Arg = NULL;
 	t_teesmc32_param *TeeSmc32Param = NULL;
 
@@ -255,16 +296,28 @@ void SetTeeSmc32Params(TEEC_Operation *operation,
 		if (attr == TEEC_MEMREF_TEMP_INPUT ||
 			attr == TEEC_MEMREF_TEMP_OUTPUT ||
 			attr == TEEC_MEMREF_TEMP_INOUT) {
-#ifdef CONFIG_ROCKCHIP_RK3328
+
+#ifdef CONFIG_OPTEE_V1
+#ifdef CONFIG_ARM64
 			attr |= TEEC_SMC_DEFAULT_CACHE_ATTRIBUTES;
-			debug(" 3328 attr %x\n", attr);
+			debug(" OPTEE_OS_V1 ARCH64 attr %x\n", attr);
+#else
+			debug(" OPTEE_OS_V1 ARCH32 attr %x\n", attr);
+#endif
 #endif
-#ifdef CONFIG_ROCKCHIP_RK322X
-			debug(" 322X attr %x\n", attr);
+
+#ifdef CONFIG_OPTEE_V2
+#ifdef CONFIG_ARM64
+			attr += (OPTEE_MSG_ATTR_TYPE_TMEM_INPUT_V2 - TEEC_MEMREF_TEMP_INPUT);
+			debug(" OPTEE_OS_V2 ARCH64 attr %x\n", attr);
+#else
+			printf("Not support! All rockchips use optee v2 are 64 bits! \n");
 #endif
+#endif
+
 			TeeSmc32Param[ParamCount].attr = attr;
 			TeeSmc32Param[ParamCount].u.memref.buf_ptr =
-			(uint32_t)operation->params[ParamCount].tmpref.buffer;
+			(uint32_t)(size_t)operation->params[ParamCount].tmpref.buffer;
 			TeeSmc32Param[ParamCount].u.memref.size =
 				operation->params[ParamCount].tmpref.size;
 		} else {
@@ -310,12 +363,21 @@ TEEC_Result OpteeSmcCall(t_teesmc32_arg *TeeSmc32Arg)
 	TEEC_Result TeecResult = TEEC_SUCCESS;
 	ARM_SMC_ARGS ArmSmcArgs = {0};
 
+#ifdef CONFIG_OPTEE_V1
 	ArmSmcArgs.Arg0 = TEESMC32_CALL_WITH_ARG;
-	ArmSmcArgs.Arg1 = (uint32_t) TeeSmc32Arg;
+	ArmSmcArgs.Arg1 = (uint32_t) (size_t)TeeSmc32Arg;
+#endif
+
+#ifdef CONFIG_OPTEE_V2
+	ArmSmcArgs.Arg0 = OPTEE_SMC_CALL_WITH_ARG_V2;
+	ArmSmcArgs.Arg1 = 0;
+	ArmSmcArgs.Arg2 = (uint32_t) (size_t)TeeSmc32Arg;
+#endif
 
 	while (1) {
 		tee_smc_call(&ArmSmcArgs);
-
+		debug("arg0=0x%x arg1=0x%x arg2=0x%x arg3=0x%x",
+			ArmSmcArgs.Arg0, ArmSmcArgs.Arg1, ArmSmcArgs.Arg2, ArmSmcArgs.Arg3);
 		if (TEESMC_RETURN_IS_RPC(ArmSmcArgs.Arg0)) {
 			(void) OpteeRpcCallback(&ArmSmcArgs);
 		} else if (ArmSmcArgs.Arg0 == TEESMC_RETURN_UNKNOWN_FUNCTION) {

commit b5cc267faa4430f73ad29249da3ba58bf28b8d17
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Fri Feb 23 19:52:36 2018 +0800

    rk322x: enable OPTEE_V1 macro
    
    rk322x can store data to secure storage.
    
    Change-Id: Idc1a33d7a86f08690ad77ae37f0cd706fd19cfa6
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk322x/Kconfig b/arch/arm/mach-rockchip/rk322x/Kconfig
index eebe63131d..2e7b0a6726 100644
--- a/arch/arm/mach-rockchip/rk322x/Kconfig
+++ b/arch/arm/mach-rockchip/rk322x/Kconfig
@@ -20,6 +20,14 @@ config SYS_MALLOC_F_LEN
 config SPL_SERIAL_SUPPORT
 	default y
 
+config OPTEE_V1
+	bool "Support OPTEE version 1.0"
+	help
+	  U-boot can communicate with trust if
+	  the config is enable. This function can
+	  be use in android bootloader a/b and avb
+	  step.
+
 source "board/rockchip/evb_rk3229/Kconfig"
 source "board/rockchip/gva_rk3229/Kconfig"
 
diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index 302c44efa8..13e46d9e0b 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -84,3 +84,4 @@ CONFIG_AVB_LIBAVB_AB=y
 CONFIG_AVB_LIBAVB_ATX=y
 CONFIG_AVB_LIBAVB_USER=y
 CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V1=y
diff --git a/configs/gva-rk3229_defconfig b/configs/gva-rk3229_defconfig
index d54c2028db..26e9c9bfee 100644
--- a/configs/gva-rk3229_defconfig
+++ b/configs/gva-rk3229_defconfig
@@ -82,5 +82,6 @@ CONFIG_AVB_LIBAVB_ATX=y
 CONFIG_AVB_LIBAVB_USER=y
 CONFIG_RK_AVB_LIBAVB_USER=y
 CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V1=y
 CONFIG_ANDROID_AB=y
 CONFIG_ANDROID_AVB=y

commit 29fae127338dd8be2b0385630d5062321ad61284
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Feb 21 16:39:08 2018 +0800

    configs: evb-px30: enable boot android
    
    Change-Id: I8889563810e57e8c18a379590bd4b829995321c0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 71918dd332..e47b2b75c5 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -8,17 +8,19 @@ CONFIG_TARGET_EVB_PX30=y
 CONFIG_DEFAULT_DEVICE_TREE="px30-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
-# CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_BUF_SIZE=0x08000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 # CONFIG_CMD_SETEXPR is not set

commit 6d82ce07fae4196b491828596bea783d7b24762c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Feb 22 15:07:04 2018 +0800

    include: key.h: clean up
    
    Change-Id: Id5cec38070c09494643bad2244d14633b93d4d0f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/key.h b/include/key.h
index fcbd4274d5..911804dd08 100644
--- a/include/key.h
+++ b/include/key.h
@@ -7,6 +7,8 @@
 #ifndef _KEY_H_
 #define _KEY_H_
 
+#include <linux/input.h>
+
 #define KEY_LONG_DOWN_MS	2000
 
 enum key_state {
@@ -18,10 +20,8 @@ enum key_state {
 };
 
 struct dm_key_ops {
-	int type;
 	const char *name;
 	int (*read)(struct udevice *dev, int code);
-	int (*exist)(struct udevice *dev, int code);
 };
 
 struct input_key {

commit 366bd23fdb489a47acc848deb962c56f8cdbdd52
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Feb 21 16:37:51 2018 +0800

    make.sh: make assign output directory cmd as an option
    
    default use current directory as output dir, you can also
    assign output dir by command "O=[directory]".
    
    Example:
            ./make.sh evb-px30 O=rockdev
    
    Change-Id: I1a7efb7a273d147d81b7fa9bb0bbbe00a8f5d12e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 47bd096f50..5a7b1d8c2e 100755
--- a/make.sh
+++ b/make.sh
@@ -3,10 +3,13 @@ set -e
 BOARD=$1
 SUBCMD=$2
 RKCHIP=${BOARD##*-}
-DSTDIR=rockdev/${RKCHIP}
 RKCHIP=$(echo ${RKCHIP} | tr '[a-z]' '[A-Z]')
 JOB=`sed -n "N;/processor/p" /proc/cpuinfo|wc -l`
 
+# Declare global default output dir and cmd, update in prepare()
+OUTDIR=.
+OUTOPT=
+
 # Declare global rkbin tools and rkbin Responsity path, updated in prepare()
 TOOLCHAIN_RKBIN=./
 RKBIN=./
@@ -27,7 +30,7 @@ OBJ_ARM64=aarch64-linux-gnu-objdump
 
 prepare()
 {
-	local absolute_path
+	local absolute_path cmd
 
 	# Check invaid args and help
 	if [ "$BOARD" = '--help' -o "$BOARD" = '-h' -o "$BOARD" = '--h' -o "$BOARD" = '' ]; then
@@ -57,11 +60,11 @@ prepare()
 		exit 1
 	fi
 
-	# Clean! We assume that ./u-boot.map, u-boot.cfg or u-boot.lds indicates U-Boot project is not clean,
-	# maybe git checkout from rkdevelop.
-	if [ -f ./u-boot.map -o -f ./u-boot.cfg -o -f ./u-boot.lds ]; then
-		make mrproper
-		echo "auto \"make mrproper\" done..."
+	# Assign output directory
+	cmd=${SUBCMD%=*}
+	if [ "${cmd}" = 'O' ]; then
+		OUTDIR=${SUBCMD#*=}
+		OUTOPT=O=${OUTDIR}
 	fi
 }
 
@@ -69,13 +72,13 @@ select_toolchain()
 {
 	local absolute_path
 
-	if grep  -q '^CONFIG_ARM64=y' ${DSTDIR}/out/.config ; then
+	if grep  -q '^CONFIG_ARM64=y' ${OUTDIR}/.config ; then
 		if [ -d ${TOOLCHAIN_ARM64} ]; then
 			absolute_path=$(cd `dirname ${TOOLCHAIN_ARM64}`; pwd)
 			TOOLCHAIN_GCC=${absolute_path}/bin/${GCC_ARM64}
 			TOOLCHAIN_OBJDUMP=${absolute_path}/bin/${OBJ_ARM64}
 		else
-			echo "Can't find toolchain: ${TOOLCHAIN_GCC}"
+			echo "Can't find toolchain: ${TOOLCHAIN_ARM64}"
 			exit 1
 		fi
 	else
@@ -84,7 +87,7 @@ select_toolchain()
 			TOOLCHAIN_GCC=${absolute_path}/bin/${GCC_ARM32}
 			TOOLCHAIN_OBJDUMP=${absolute_path}/bin/${OBJ_ARM32}
 		else
-			echo "Can't find toolchain: ${TOOLCHAIN_GCC}"
+			echo "Can't find toolchain: ${TOOLCHAIN_ARM32}"
 			exit 1
 		fi
 	fi
@@ -96,13 +99,9 @@ sub_commands()
 {
 	local elf=${SUBCMD%-*} opt=${SUBCMD#*-}
 
-	# Make clean, distclean and mrproper
-	if [ "$SUBCMD" = 'clean' -o "$SUBCMD" = 'distclean' -o "$SUBCMD" = 'mrproper' ]; then
-		make $SUBCMD O=${DSTDIR}/out
-		exit 0
-	elif [ "$elf" = 'elf' ]; then
-		if [ ! -f ${DSTDIR}/out/u-boot ]; then
-			echo "Can't find elf file: ${DSTDIR}/out/u-boot"
+	if [ "$elf" = 'elf' ]; then
+		if [ ! -f ${OUTDIR}/u-boot ]; then
+			echo "Can't find elf file: ${OUTDIR}/u-boot"
 			exit 1
 		else
 			# default 'elf' without option, use '-D'
@@ -110,23 +109,7 @@ sub_commands()
 				opt=D
 			fi
 
-			${TOOLCHAIN_OBJDUMP} -${opt} ${DSTDIR}/out/u-boot | less
-			exit 0
-		fi
-	elif [ "$SUBCMD" = 'map' ]; then
-		if [ ! -f ${DSTDIR}/out/System.map ]; then
-			echo "Can't find map file: ${DSTDIR}/out/System.map"
-			exit 1
-		else
-			vim ${DSTDIR}/out/System.map
-			exit 0
-		fi
-	elif [ "$SUBCMD" = '.config' ]; then
-		if [ ! -f ${DSTDIR}/out/.config ]; then
-			echo "Can't find .config file: ${DSTDIR}/out/.config"
-			exit 1
-		else
-			vim ${DSTDIR}/out/.config
+			${TOOLCHAIN_OBJDUMP} -${opt} ${OUTDIR}/u-boot | less
 			exit 0
 		fi
 	fi
@@ -145,9 +128,9 @@ pack_uboot_image()
 {
 	local UBOOT_LOAD_ADDR
 
-	UBOOT_LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${DSTDIR}/out/include/autoconf.mk|tr -d '\r'`
-	${TOOLCHAIN_RKBIN}/loaderimage --pack --uboot ${DSTDIR}/out/u-boot.bin uboot.img ${UBOOT_LOAD_ADDR}
-	echo "pack uboot okay! Input: ${DSTDIR}/out/u-boot.bin"
+	UBOOT_LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
+	${TOOLCHAIN_RKBIN}/loaderimage --pack --uboot ${OUTDIR}/u-boot.bin uboot.img ${UBOOT_LOAD_ADDR}
+	echo "pack uboot okay! Input: ${OUTDIR}/u-boot.bin"
 }
 
 pack_loader_image()
@@ -169,7 +152,7 @@ pack_trust_image()
 	local TOS TOS_TA DARM_BASE TEE_LOAD_ADDR TEE_OFFSET=0x8400000
 
 	# ARM64 uses trust_merger
-	if grep  -q '^CONFIG_ARM64=y' ${DSTDIR}/out/.config ; then
+	if grep  -q '^CONFIG_ARM64=y' ${OUTDIR}/.config ; then
 		if [ ! -f ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini ]; then
 			echo "pack trust failed! Can't find: ${RKBIN}/RKRUST/${RKCHIP}TRUST.ini"
 			return
@@ -188,7 +171,7 @@ pack_trust_image()
 		fi
 
 		# OP-TEE is 132M(0x8400000) offset from DRAM base.
-		DARM_BASE=`sed -n "/CONFIG_SYS_SDRAM_BASE=/s/CONFIG_SYS_SDRAM_BASE=//p" ${DSTDIR}/out/include/autoconf.mk|tr -d '\r'`
+		DARM_BASE=`sed -n "/CONFIG_SYS_SDRAM_BASE=/s/CONFIG_SYS_SDRAM_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
 		TEE_LOAD_ADDR=$((DARM_BASE+TEE_OFFSET))
 
 		# Convert Dec to Hex
@@ -223,10 +206,10 @@ pack_trust_image()
 
 prepare
 echo "make for ${BOARD}_defconfig by -j${JOB}"
-make ${BOARD}_defconfig O=${DSTDIR}/out
+make ${BOARD}_defconfig ${OUTOPT}
 select_toolchain
 sub_commands
-make CROSS_COMPILE=${TOOLCHAIN_GCC}  all --jobs=${JOB} O=${DSTDIR}/out
+make CROSS_COMPILE=${TOOLCHAIN_GCC}  all --jobs=${JOB} ${OUTOPT}
 fixup_chip_name
 pack_uboot_image
 pack_loader_image

commit 5f048e57a3bb755673988cf2bfc62e38b9060a4d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Feb 21 17:40:57 2018 +0800

    rockchip: smccc: add more interfaces support
    
    These interfaces are moved from kernel 4.4:
    ./drivers/firmware/rockchip_sip.c
    
    Only those maybe used in U-Boot are moved.
    
    Change-Id: I5896606c992056199f116692cca3c6d9530fd2f9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h b/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
index 7a2b0a7420..01007363b3 100644
--- a/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
+++ b/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
@@ -7,10 +7,65 @@
 #ifndef __ROCKCHIP_SMCCC_H__
 #define __ROCKCHIP_SMCCC_H__
 
+/* Rockchip platform SiP call ID */
+#define SIP_ATF_VERSION			0x82000001
+#define SIP_ACCESS_REG			0x82000002
+#define SIP_SUSPEND_MODE		0x82000003
+#define SIP_PENDING_CPUS		0x82000004
+#define SIP_UARTDBG_CFG			0x82000005
+#define SIP_UARTDBG_CFG64		0xc2000005
+#define SIP_MCU_EL3FIQ_CFG		0x82000006
+#define SIP_ACCESS_CHIP_STATE64		0xc2000006
+#define SIP_SECURE_MEM_CONFIG		0x82000007
+#define SIP_ACCESS_CHIP_EXTRA_STATE64	0xc2000007
+#define SIP_DRAM_CONFIG			0x82000008
+#define SIP_SHARE_MEM			0x82000009
+#define SIP_SIP_VERSION			0x8200000a
+#define SIP_REMOTECTL_CFG		0x8200000b
+#define PSCI_SIP_VPU_RESET		0x8200000c
+
+/* Rockchip Sip version */
+#define SIP_IMPLEMENT_V1                (1)
+#define SIP_IMPLEMENT_V2                (2)
+
+/* Error return code */
+#define IS_SIP_ERROR(x)			(!!(x))
+
+#define SIP_RET_SUCCESS			0
+#define SIP_RET_SMC_UNKNOWN		-1
+#define SIP_RET_NOT_SUPPORTED		-2
+#define SIP_RET_INVALID_PARAMS		-3
+#define SIP_RET_INVALID_ADDRESS		-4
+#define SIP_RET_DENIED			-5
+
+/* SIP_ACCESS_REG: read or write */
+#define SECURE_REG_RD			0x0
+#define SECURE_REG_WR			0x1
+
+/* Share mem page types */
+typedef enum {
+	SHARE_PAGE_TYPE_INVALID = 0,
+	SHARE_PAGE_TYPE_UARTDBG,
+	SHARE_PAGE_TYPE_DDR,
+	SHARE_PAGE_TYPE_MAX,
+} share_page_type_t;
+
 /* Stand PSCI system suspend */
 int psci_system_suspend(unsigned long unused);
 
+/* Rockchip SMC Calls */
 int sip_smc_set_suspend_mode(unsigned long ctrl,
 			     unsigned long config1,
 			     unsigned long config2);
+
+struct arm_smccc_res sip_smc_dram(unsigned long arg0,
+				  unsigned long arg1,
+				  unsigned long arg2);
+
+struct arm_smccc_res sip_smc_request_share_mem(unsigned long page_num,
+					       share_page_type_t page_type);
+
+int sip_smc_set_sip_version(unsigned long version);
+struct arm_smccc_res sip_smc_get_sip_version(void);
+
 #endif
diff --git a/arch/arm/mach-rockchip/rockchip_smccc.c b/arch/arm/mach-rockchip/rockchip_smccc.c
index ea56758e0d..3eed441181 100644
--- a/arch/arm/mach-rockchip/rockchip_smccc.c
+++ b/arch/arm/mach-rockchip/rockchip_smccc.c
@@ -9,6 +9,7 @@
 #include <asm/psci.h>
 #include <asm/suspend.h>
 #include <linux/arm-smccc.h>
+#include <linux/io.h>
 
 #ifdef CONFIG_ARM64
 #define ARM_PSCI_1_0_SYSTEM_SUSPEND	ARM_PSCI_1_0_FN64_SYSTEM_SUSPEND
@@ -16,8 +17,7 @@
 #define ARM_PSCI_1_0_SYSTEM_SUSPEND	ARM_PSCI_1_0_FN_SYSTEM_SUSPEND
 #endif
 
-/* Rockchip platform SiP call ID */
-#define SIP_SUSPEND_MODE		0x82000003
+#define SIZE_PAGE(n)	((n) << 12)
 
 static struct arm_smccc_res __invoke_sip_fn_smc(unsigned long function_id,
 						unsigned long arg0,
@@ -48,3 +48,52 @@ int sip_smc_set_suspend_mode(unsigned long ctrl,
 	res = __invoke_sip_fn_smc(SIP_SUSPEND_MODE, ctrl, config1, config2);
 	return res.a0;
 }
+
+struct arm_smccc_res sip_smc_dram(unsigned long arg0,
+				  unsigned long arg1,
+				  unsigned long arg2)
+{
+	return __invoke_sip_fn_smc(SIP_DRAM_CONFIG, arg0, arg1, arg2);
+}
+
+struct arm_smccc_res sip_smc_request_share_mem(unsigned long page_num,
+					       share_page_type_t page_type)
+{
+	struct arm_smccc_res res;
+	unsigned long share_mem_phy;
+
+	res = __invoke_sip_fn_smc(SIP_SHARE_MEM, page_num, page_type, 0);
+	if (IS_SIP_ERROR(res.a0))
+		goto error;
+
+	share_mem_phy = res.a1;
+	res.a1 = (unsigned long)ioremap(share_mem_phy, SIZE_PAGE(page_num));
+
+error:
+	return res;
+}
+
+struct arm_smccc_res sip_smc_get_sip_version(void)
+{
+	return __invoke_sip_fn_smc(SIP_SIP_VERSION, 0, 0, 0);
+}
+
+/*
+ * OP-TEE works both for kernel 3.10 and 4.4, and these two kernels have
+ * different sip implement that 3.10 uses SIP_IMPLEMENT_V1 and 4.4 uses
+ * SIP_IMPLEMENT_V2. So we should tell OP-TEE the current rockchip sip
+ * version(default SIP_IMPLEMENT_V1) before use.
+ */
+int sip_smc_set_sip_version(unsigned long version)
+{
+	struct arm_smccc_res res;
+
+	res = __invoke_sip_fn_smc(SIP_SIP_VERSION, version, SECURE_REG_WR, 0);
+	if (IS_SIP_ERROR(res.a0)) {
+		printf("%s: set rockchip sip version v%ld failed\n",
+		       __func__, version);
+		return res.a0;
+	}
+
+	return 0;
+}

commit eb2a5055adabace3ccc9bc96e201c28f15556dfe
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Feb 22 18:05:46 2018 +0800

    rockchip: boot_rkimg: do not read dtb again if we have do it
    
    We may read the dtb file before bootrkp command, we can use it directly.
    
    Change-Id: Iff6dcd037d9d3637f1be81f458140189c13b1977
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 1d582b8f58..582255d436 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -21,6 +21,7 @@
 
 #define BOOTLOADER_MESSAGE_OFFSET_IN_MISC	(16 * 1024)
 #define BOOTLOADER_MESSAGE_BLK_OFFSET		(BOOTLOADER_MESSAGE_OFFSET_IN_MISC >> 9)
+DECLARE_GLOBAL_DATA_PTR;
 
 struct bootloader_message {
 	char command[32];
@@ -315,11 +316,14 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 		ramdisk_size = 0;
 	}
 
-	fdt_size = rockchip_read_resource_file((void *)fdt_addr_r, DTB_FILE, 0, 0);
-	if (fdt_size < 0) {
-		printf("%s fdt read error\n", __func__);
-		ret = -EINVAL;
-		goto out;
+	if (gd->fdt_blob != (void *)fdt_addr_r) {
+		fdt_size = rockchip_read_resource_file((void *)fdt_addr_r,
+						       DTB_FILE, 0, 0);
+		if (fdt_size < 0) {
+			printf("%s fdt read error\n", __func__);
+			ret = -EINVAL;
+			goto out;
+		}
 	}
 
 	printf("kernel   @ 0x%08lx (0x%08x)\n", kernel_addr_r, kernel_size);

commit 530f7262cae0596029f978e16f627d756e9db810
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Feb 22 18:05:09 2018 +0800

    rockchip: board: update logo reserve memory in late init
    
    Change-Id: I455b78b9abe0bc4d28dba1a0cd9971262c313365
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index b1521e88b5..6513069509 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -96,6 +96,7 @@ int board_late_init(void)
 
 #ifdef CONFIG_DRM_ROCKCHIP
 	rockchip_show_logo();
+	rockchip_display_fixup((void *)gd->fdt_blob);
 #endif
 
 	return rk_board_late_init();

commit 51619d03f1a6bc8c3d10cb880057caeadcf2f637
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Feb 22 17:35:17 2018 +0800

    rockchip: display: enable rockchip_display_fixup()
    
    Enable and update the rockchip_display_fixup() so that we can update the
    logo reserve memory node for kernel dts.
    
    Change-Id: I34e3812689052a63ed58c61a41bca53798ffd666
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 1c05de3383..127390fb96 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -62,12 +62,10 @@ static void *get_display_buffer(int size)
 	return buf;
 }
 
-#if 0
 static unsigned long get_display_size(void)
 {
 	return memory_end - memory_start;
 }
-#endif
 
 static bool can_direct_logo(int bpp)
 {
@@ -935,7 +933,6 @@ static int rockchip_display_probe(struct udevice *dev)
 	return 0;
 }
 
-#if 0
 void rockchip_display_fixup(void *blob)
 {
 	const struct rockchip_connector_funcs *conn_funcs;
@@ -944,17 +941,16 @@ void rockchip_display_fixup(void *blob)
 	const struct rockchip_crtc *crtc;
 	struct display_state *s;
 	u32 offset;
-	int node;
-	char path[100];
-	int ret;
+	const struct device_node *np;
+	const char *path;
 
 	if (!get_display_size())
 		return;
 
-	node = fdt_update_reserved_memory(blob, "rockchip,drm-logo",
+	offset = fdt_update_reserved_memory(blob, "rockchip,drm-logo",
 					       (u64)memory_start,
 					       (u64)get_display_size());
-	if (node < 0) {
+	if (offset < 0) {
 		printf("failed to add drm-loader-logo memory\n");
 		return;
 	}
@@ -985,17 +981,14 @@ void rockchip_display_fixup(void *blob)
 		if (conn_funcs->fixup_dts)
 			conn_funcs->fixup_dts(s, blob);
 
-		ret = fdt_get_path(s->blob, s->node, path, sizeof(path));
-		if (ret < 0) {
-			printf("failed to get route path[%s], ret=%d\n",
-			       path, ret);
-			continue;
-		}
-
+		np = ofnode_to_np(s->node);
+		path = np->full_name;
+		fdt_increase_size(blob, 0x400);
 #define FDT_SET_U32(name, val) \
 		do_fixup_by_path_u32(blob, path, name, val, 1);
 
-		offset = s->logo.offset + s->logo.mem - memory_start;
+		offset = s->logo.offset + (u32)(unsigned long)s->logo.mem
+			 - memory_start;
 		FDT_SET_U32("logo,offset", offset);
 		FDT_SET_U32("logo,width", s->logo.width);
 		FDT_SET_U32("logo,height", s->logo.height);
@@ -1008,7 +1001,6 @@ void rockchip_display_fixup(void *blob)
 #undef FDT_SET_U32
 	}
 }
-#endif
 
 int rockchip_display_bind(struct udevice *dev)
 {
diff --git a/include/video_rockchip.h b/include/video_rockchip.h
index ce764c8e46..335b27ebcb 100644
--- a/include/video_rockchip.h
+++ b/include/video_rockchip.h
@@ -23,5 +23,6 @@
 
 void rockchip_show_bmp(const char *bmp);
 void rockchip_show_logo(void);
+void rockchip_display_fixup(void *blob);
 
 #endif

commit 3a39dbf87401c35ad6cba1709d3db5948b73aa0c
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Feb 22 17:34:07 2018 +0800

    fdt_support: add fdt_update_reserved_memory()
    
    Add API for rockchip pass uboot logo memory info to kernel.
    
    Change-Id: Ib3bfadc381efae21359a43654493e8e0f4e67dd0
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/fdt_support.c b/common/fdt_support.c
index 0e8e90481d..feb01d0b79 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -523,6 +523,36 @@ int fdt_fixup_memory(void *blob, u64 start, u64 size)
 	return fdt_fixup_memory_banks(blob, &start, &size, 1);
 }
 
+int fdt_update_reserved_memory(void *blob, char *name, u64 start, u64 size)
+{
+	int nodeoffset, len, err;
+	u8 tmp[16]; /* Up to 64-bit address + 64-bit size */
+
+#if 0
+	/*name is rockchip_logo*/
+	nodeoffset = fdt_find_or_add_subnode(blob, 0, "reserved-memory");
+	if (nodeoffset < 0)
+		return nodeoffset;
+	printf("hjc>>reserved-memory>>%s, nodeoffset:%d\n", __func__, nodeoffset);
+	nodeoffset = fdt_find_or_add_subnode(blob, nodeoffset, name);
+	if (nodeoffset < 0)
+		return nodeoffset;
+#else
+	nodeoffset = fdt_node_offset_by_compatible(blob, 0, name);
+	if (nodeoffset < 0)
+		debug("Can't find nodeoffset: %d\n", nodeoffset);
+#endif
+	len = fdt_pack_reg(blob, tmp, &start, &size, 1);
+	err = fdt_setprop(blob, nodeoffset, "reg", tmp, len);
+	if (err < 0) {
+		printf("WARNING: could not set %s %s.\n",
+				"reg", fdt_strerror(err));
+		return err;
+	}
+
+	return nodeoffset;
+}
+
 void fdt_fixup_ethernet(void *fdt)
 {
 	int i = 0, j, prop;
diff --git a/include/fdt_support.h b/include/fdt_support.h
index f00fadcddb..4f4b48ebb0 100644
--- a/include/fdt_support.h
+++ b/include/fdt_support.h
@@ -103,6 +103,8 @@ static inline int fdt_fixup_memory_banks(void *blob, u64 start[], u64 size[],
 }
 #endif
 
+int fdt_update_reserved_memory(void *blob, char *name, u64 start, u64 size);
+
 void fdt_fixup_ethernet(void *fdt);
 int fdt_find_and_setprop(void *fdt, const char *node, const char *prop,
 			 const void *val, int len, int create);

commit 3f251879bfd8a56b1ac30c8ef55d3abe5630612d
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Feb 22 16:44:14 2018 +0800

    boot_android: fix load address for boot image
    
    The kernel image follows the header(default 0x800) in boot.img, we need to fix
    the load address for boot.img so that kernel image can align to 0x80000 as
    required by ARM64 kernel booting.
    
    Change-Id: I526ff38bfce2d8fd1571aff817ade11086f196e3
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/cmd/boot_android.c b/cmd/boot_android.c
index 5df2e9b270..b7c1e4ea51 100644
--- a/cmd/boot_android.c
+++ b/cmd/boot_android.c
@@ -41,6 +41,11 @@ static int do_boot_android(cmd_tbl_t *cmdtp, int flag, int argc,
 			load_address = CONFIG_SYS_LOAD_ADDR;
 	}
 
+	/* ARM64 kernel load addr need to align to 0x80000, and android boot.img
+	 * have a 2KB header, need to reserve space for it.
+	 */
+	load_address &= ~0x7ffff;
+	load_address -= 0x800; /* default page size for boot header */
 	dev_desc = blk_get_dev(argv[1], simple_strtoul(argv[2], NULL, 16));
 	if (!dev_desc) {
 		printf("Could not get %s %s\n", argv[1], argv[2]);

commit 09e52837fcfb4e90d056e4e39dc54212a99c74be
Author: Yu YongZhen <yuyz@rock-chips.com>
Date:   Sun Feb 11 15:23:36 2018 +0800

    common: boot_rkimg: go on the boot flow even no ramdisk found
    
    in some case, we need persistent file system in NOR or NAND,
    such as squashfs, we need to boot system in flash.
    
    Change-Id: I46e4ae3e43f96f77f1ca6b4df8424fce19866226
    Signed-off-by: Yu YongZhen <yuyz@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 3c58fa14db..1d582b8f58 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -312,8 +312,7 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 	if (ramdisk_size < 0) {
 		printf("%s ramdisk part %s read error\n", __func__,
 		       boot_part->name);
-		ret = -EINVAL;
-		goto out;
+		ramdisk_size = 0;
 	}
 
 	fdt_size = rockchip_read_resource_file((void *)fdt_addr_r, DTB_FILE, 0, 0);

commit 76ba1d8a713bc964fc8e0a639f90344c4c60f026
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sun Feb 11 15:57:07 2018 +0800

    Makefile: enable -Werror option
    
    Enable warning treat as error cflags to avoid further compile warning.
    
    Change-Id: Ibfd959b4afa4724c4d6920985f21e55b959a0ed0
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/Makefile b/Makefile
index a86fd4d544..a1b28de1ef 100644
--- a/Makefile
+++ b/Makefile
@@ -360,7 +360,7 @@ KBUILD_CPPFLAGS := -D__KERNEL__ -D__UBOOT__
 KBUILD_CFLAGS   := -Wall -Wstrict-prototypes \
 		   -Wno-format-security \
 		   -fno-builtin -ffreestanding
-KBUILD_CFLAGS	+= -fshort-wchar
+KBUILD_CFLAGS	+= -fshort-wchar -Werror
 KBUILD_AFLAGS   := -D__ASSEMBLY__
 
 # Read UBOOTRELEASE from include/config/uboot.release (if it exists)

commit 440e24d771ee68dead5265c27a039f184c4241d6
Author: Simon Glass <sjg@chromium.org>
Date:   Thu Dec 28 13:14:15 2017 -0700

    UPSTREAM: dm: core: Add a function to look up a uclass by name
    
    Each uclass has a driver name which we can use to look up the uclass. This
    is useful for logging, where the uclass ID is used as the category.
    
    Add a function to handle this, as well as a test.
    
    Change-Id: Id221809d6f9f818b52a5bf88f4e12d409a070f05
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 6e43d1b19982b1756b7c607569d1778e556d6577)

diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c
index 197ac1c0a8..480d202563 100644
--- a/drivers/core/uclass.c
+++ b/drivers/core/uclass.c
@@ -161,6 +161,20 @@ const char *uclass_get_name(enum uclass_id id)
 	return uc->uc_drv->name;
 }
 
+enum uclass_id uclass_get_by_name(const char *name)
+{
+	int i;
+
+	for (i = 0; i < UCLASS_COUNT; i++) {
+		struct uclass_driver *uc_drv = lists_uclass_lookup(i);
+
+		if (uc_drv && !strcmp(uc_drv->name, name))
+			return i;
+	}
+
+	return UCLASS_INVALID;
+}
+
 int uclass_find_device(enum uclass_id id, int index, struct udevice **devp)
 {
 	struct uclass *uc;
diff --git a/include/dm/uclass.h b/include/dm/uclass.h
index f6fe785583..d54683a106 100644
--- a/include/dm/uclass.h
+++ b/include/dm/uclass.h
@@ -127,6 +127,14 @@ int uclass_get(enum uclass_id key, struct uclass **ucp);
  */
 const char *uclass_get_name(enum uclass_id id);
 
+/**
+ * uclass_get_by_name() - Look up a uclass by its driver name
+ *
+ * @name: Name to look up
+ * @returns the associated uclass ID, or UCLASS_INVALID if not found
+ */
+enum uclass_id uclass_get_by_name(const char *name);
+
 /**
  * uclass_get_device() - Get a uclass device based on an ID and index
  *
diff --git a/test/dm/core.c b/test/dm/core.c
index 50ee41b9e2..052bf8fffb 100644
--- a/test/dm/core.c
+++ b/test/dm/core.c
@@ -862,3 +862,12 @@ static int dm_test_device_get_uclass_id(struct unit_test_state *uts)
 	return 0;
 }
 DM_TEST(dm_test_device_get_uclass_id, DM_TESTF_SCAN_PDATA);
+
+static int dm_test_uclass_names(struct unit_test_state *uts)
+{
+	ut_asserteq_str("test", uclass_get_name(UCLASS_TEST));
+	ut_asserteq(UCLASS_TEST, uclass_get_by_name("test"));
+
+	return 0;
+}
+DM_TEST(dm_test_uclass_names, DM_TESTF_SCAN_PDATA);

commit 18aa8da9a4c0ce30c89c0850a0670850890074ea
Author: Mario Six <mario.six@gdsys.cc>
Date:   Mon Jan 15 11:07:20 2018 +0100

    UPSTREAM: core: Make device_is_compatible live-tree compatible
    
    Judging from its name and parameters, device_is_compatible looks like it
    is compatible with a live device tree, but it actually isn't.
    
    Make it compatible with a live device tree.
    
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Change-Id: I892142d611ab5068d4ec6bdb51666a673b679794
    Signed-off-by: Mario Six <mario.six@gdsys.cc>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 29d11b8838bb2aa324b8873159cbd7088870a75b)

diff --git a/drivers/core/device.c b/drivers/core/device.c
index 00f8d7d13c..b15f602252 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -17,6 +17,7 @@
 #include <dm/device.h>
 #include <dm/device-internal.h>
 #include <dm/lists.h>
+#include <dm/of_access.h>
 #include <dm/pinctrl.h>
 #include <dm/platdata.h>
 #include <dm/read.h>
@@ -712,8 +713,12 @@ int device_set_name(struct udevice *dev, const char *name)
 bool device_is_compatible(struct udevice *dev, const char *compat)
 {
 	const void *fdt = gd->fdt_blob;
+	ofnode node = dev_ofnode(dev);
 
-	return !fdt_node_check_compatible(fdt, dev_of_offset(dev), compat);
+	if (ofnode_is_np(node))
+		return of_device_is_compatible(ofnode_to_np(node), compat, NULL, NULL);
+	else
+		return !fdt_node_check_compatible(fdt, ofnode_to_offset(node), compat);
 }
 
 bool of_machine_is_compatible(const char *compat)

commit 822b9c09c16a6b2244ecd7f73e113c00db7584a8
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sun Feb 11 19:47:50 2018 +0800

    rockchip: phycore-rk3288: fix compile warning
    
    Change-Id: Iaa874efe1446b788e45415e8b70473b105014727
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/board/phytec/phycore_rk3288/phycore-rk3288.c b/board/phytec/phycore_rk3288/phycore-rk3288.c
index a81954e780..175c017a14 100644
--- a/board/phytec/phycore_rk3288/phycore-rk3288.c
+++ b/board/phytec/phycore_rk3288/phycore-rk3288.c
@@ -12,6 +12,7 @@
 #include <i2c_eeprom.h>
 #include <netdev.h>
 #include "som.h"
+#include <power/rk8xx_pmic.h>
 
 static int valid_rk3288_som(struct rk3288_som *som)
 {

commit 5034b89cfa2ae02e0c998a126cf14346ff4d156c
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sun Feb 11 18:12:39 2018 +0800

    serial: ns16550: fix compile warning
    
    Change-Id: I495b9eca5f54105270f9e2311ef29c9b296c0476
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index 89843cedd7..490087c017 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -473,6 +473,7 @@ const struct dm_serial_ops ns16550_serial_ops = {
 	.setbrg = ns16550_serial_setbrg,
 };
 
+#if CONFIG_IS_ENABLED(SERIAL_PRESENT)
 #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
 /*
  * Please consider existing compatible strings before adding a new
@@ -495,8 +496,6 @@ static const struct udevice_id ns16550_serial_ids[] = {
 };
 #endif /* OF_CONTROL && !OF_PLATDATA */
 
-#if CONFIG_IS_ENABLED(SERIAL_PRESENT)
-
 /* TODO(sjg@chromium.org): Integrate this into a macro like CONFIG_IS_ENABLED */
 #if !defined(CONFIG_TPL_BUILD) || defined(CONFIG_TPL_DM_SERIAL)
 U_BOOT_DRIVER(ns16550_serial) = {

commit 174b45448e334397fdadf104f3fe82d5e5158e4e
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sun Feb 11 15:45:35 2018 +0800

    fastboot: fix compile warning
    
    Change-Id: Ife064a098cbec3689790934eae86b4726f5f027d
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 007cdc3b3f..d34475e579 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -776,7 +776,8 @@ static void tx_handler_ul(struct usb_ep *ep, struct usb_request *req)
 	if (!upload_bytes)
 		start_upload = true;
 
-	fastboot_tx_write((char *)(CONFIG_FASTBOOT_BUF_ADDR + upload_bytes),
+	fastboot_tx_write((char *)((phys_addr_t)CONFIG_FASTBOOT_BUF_ADDR + \
+			  upload_bytes),
 			  xfer_size);
 }
 

commit 6fff026f96cd04bd31536159d9e13ea40904fc0e
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sun Feb 11 15:45:11 2018 +0800

    rockchip: usb: dwc2: fix compile warning
    
    Change-Id: Ic0b190aa93378faf28147306d195fbc49c28c34d
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
index f995c350d2..687046151d 100644
--- a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
+++ b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
@@ -114,7 +114,8 @@ static int setdma_rx(struct dwc2_ep *ep, struct dwc2_request *req)
 				(unsigned long) ep->dma_buf +
 				ROUND(ep->len, CONFIG_SYS_CACHELINE_SIZE));
 
-	writel((unsigned int) ep->dma_buf, &reg->out_endp[ep_num].doepdma);
+	writel((unsigned int)(unsigned long)ep->dma_buf,
+	       &reg->out_endp[ep_num].doepdma);
 	writel(DOEPT_SIZ_PKT_CNT(pktcnt) | DOEPT_SIZ_XFER_SIZE(length),
 	       &reg->out_endp[ep_num].doeptsiz);
 	writel(DEPCTL_EPENA|DEPCTL_CNAK|ctrl, &reg->out_endp[ep_num].doepctl);

commit e4feb814ab1460f600cd11f2d0321d11f702d70f
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sun Feb 11 15:43:09 2018 +0800

    rockchip: android: fix compile warning
    
    Change-Id: Ic89e97a852999a9ec929942b1b612f13cc43f57f
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 2d9adec2d6..25128ae446 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -355,6 +355,7 @@ char *android_assemble_cmdline(const char *slot_suffix,
 	return cmdline;
 }
 
+#ifdef CONFIG_ANDROID_AVB
 static void slot_set_unbootable(AvbABSlotData* slot)
 {
 	slot->priority = 0;
@@ -362,7 +363,6 @@ static void slot_set_unbootable(AvbABSlotData* slot)
 	slot->successful_boot = 0;
 }
 
-#ifdef CONFIG_ANDROID_AVB
 static AvbSlotVerifyResult android_slot_verify(char *boot_partname,
 			       unsigned long load_address,
 			       char *slot_suffix)

commit 9cd0e7c23ce7cfad6e014fe77119cdf30c8e662b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sun Feb 11 15:42:05 2018 +0800

    bootm-fdt: fix compile warning
    
    Change-Id: I5915dc22285e133d52159d6d3ab8cb631f7dfab1
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/lib/bootm-fdt.c b/arch/arm/lib/bootm-fdt.c
index 39c0c8d566..a70c0087a0 100644
--- a/arch/arm/lib/bootm-fdt.c
+++ b/arch/arm/lib/bootm-fdt.c
@@ -46,8 +46,8 @@ int arch_fixup_fdt(void *blob)
 		size[bank] = bd->bi_dram[bank].size;
 		if (size[bank] == 0)
 			continue;
-		printf("Adding bank: start=0x%08lx, size=0x%08lx\n",
-		       gd->bd->bi_dram[bank].start, gd->bd->bi_dram[bank].size);
+		printf("Adding bank: start=0x%08llx, size=0x%08llx\n",
+		       start[bank], size[bank]);
 
 #ifdef CONFIG_ARMV7_NONSEC
 		ret = armv7_apply_memory_carveout(&start[bank], &size[bank]);

commit 912bc5c1260a0c2ef47913c38884da8d9177ce96
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Sun Feb 11 15:35:51 2018 +0800

    usb: gadget: fix bos descriptor for rockusb
    
    A GetDescriptor(BOS) request always requires the Device Capability
    descriptors as part of the BOS information. This patch adds a generic
    Device Capability descriptor header to fix it.
    
    Fixes: 8ddd5824c ("usb: gadget: add bos descriptor response for rockusb command")
    Change-Id: I6b5976c6f13a6991a7d00c8221ece2a740032a07
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c
index 626117f075..db3a754e49 100644
--- a/drivers/usb/gadget/composite.c
+++ b/drivers/usb/gadget/composite.c
@@ -273,6 +273,7 @@ static int count_configs(struct usb_composite_dev *cdev, unsigned type)
 
 static int bos_desc(struct usb_composite_dev *cdev)
 {
+	struct usb_dev_cap_header	*cap;
 	struct usb_bos_descriptor	*bos = cdev->req->buf;
 
 	bos->bLength = USB_DT_BOS_SIZE;
@@ -280,6 +281,13 @@ static int bos_desc(struct usb_composite_dev *cdev)
 	bos->wTotalLength = cpu_to_le16(USB_DT_BOS_SIZE);
 	bos->bNumDeviceCaps = 0;
 
+	cap = cdev->req->buf + le16_to_cpu(bos->wTotalLength);
+	bos->bNumDeviceCaps++;
+	bos->wTotalLength = cpu_to_le16(bos->wTotalLength + sizeof(*cap));
+	cap->bLength = sizeof(*cap);
+	cap->bDescriptorType = USB_DT_DEVICE_CAPABILITY;
+	cap->bDevCapabilityType = 0;
+
 	return le16_to_cpu(bos->wTotalLength);
 }
 

commit 6ba708bc77dfce093107821405a3f9a43b78086b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Feb 11 15:33:41 2018 +0800

    pmic: rk8xx: verify supported chip id list
    
    Change-Id: I792181827a4c68dab8918694f4a0604d5f331537
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index 81bbc38891..bc87a877b2 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -158,6 +158,14 @@ static int rk8xx_probe(struct udevice *dev)
 	rk8xx_read(dev, id_lsb, &lsb, 1);
 
 	priv->variant = ((msb << 8) | lsb) & RK8XX_ID_MSK;
+	if ((priv->variant != RK808_ID) &&
+	    (priv->variant != RK805_ID) &&
+	    (priv->variant != RK816_ID) &&
+	    (priv->variant != RK817_ID) &&
+	    (priv->variant != RK818_ID)) {
+		printf("Unknown PMIC: RK%x!!\n", priv->variant);
+		return -EINVAL;
+	}
 
 	printf("PMIC:  RK%x\n", priv->variant);
 

commit 74550e825760f596eca2faca1818a59d43e4b7ee
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Feb 11 15:30:46 2018 +0800

    rockchip: chip_info: fixup PX30 to RK3326
    
    This is used for verify pre-loader in rockusb mode
    
    Change-Id: I110e274bae256a2f924555a04672a0e0c6eef7ee
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/chip_info.c b/arch/arm/mach-rockchip/chip_info.c
index 1bfee8ef92..bb6083bf90 100644
--- a/arch/arm/mach-rockchip/chip_info.c
+++ b/arch/arm/mach-rockchip/chip_info.c
@@ -73,6 +73,8 @@ int rockchip_rockusb_get_chip_info(unsigned int chip_info[])
 		chip_info[0] = 0x33323248;
 #elif defined(CONFIG_ROCKCHIP_RK3399)
 		chip_info[0] = 0x33333043;
+#elif defined(CONFIG_ROCKCHIP_PX30)
+		chip_info[0] = 0x33333236;
 #endif
 	}
 

commit 2ecf1e82eff3bd915486265aa3f93e7bff6acd63
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Feb 11 15:28:59 2018 +0800

    make.sh: fixup RKCHIP from 'PX30' to 'RK3326'
    
    This is for INI file look up
    
    Change-Id: Iac3ee79c12d9c5c51484e41533346fbc4acf4215
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 0779c4e9c2..47bd096f50 100755
--- a/make.sh
+++ b/make.sh
@@ -136,6 +136,8 @@ fixup_chip_name()
 {
 	if [ "$RKCHIP" = 'RK3228' -o "$RKCHIP" = 'RK3229' ]; then
 		RKCHIP=RK322X
+	elif [ "$RKCHIP" = 'PX30' ]; then
+		RKCHIP=RK3326
 	fi
 }
 

commit 0fcca447cbdd19596f4136c6502453c2e0670905
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Feb 11 14:43:24 2018 +0800

    configs: evb-px30: set CONFIG_BOOTDELAY=0
    
    Change-Id: I1dddacb974ce7859572ce7d0d0410ac883b44569
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index b58995d37b..71918dd332 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -11,7 +11,7 @@ CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 # CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
-CONFIG_BOOTDELAY=5
+CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_BUF_SIZE=0x08000000

commit 8ce70bc0c5f38b86dd7ddaaab78604e9dec1ab58
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sun Feb 11 14:55:34 2018 +0800

    rockchip: rknand: fix Kconfig define
    
    fix error:
    Error: You must add new CONFIG options using Kconfig
    The following new ad-hoc CONFIG options were detected:
    CONFIG_DM_PWM
    
    Please add these via Kconfig instead. Find a suitable Kconfig
    file and add a 'config' or 'menuconfig' option.
    
    Change-Id: I893a18eb1c36e28307379872814532ba825be586
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/rknand/Kconfig b/drivers/rknand/Kconfig
index cf7cac4777..96ebd29f49 100644
--- a/drivers/rknand/Kconfig
+++ b/drivers/rknand/Kconfig
@@ -11,6 +11,7 @@ config RKNAND
 	help
 	  This option enables support for Rockchip NAND FLASH devices.
 	  It supports block interface(with rk ftl) to read and write NAND FLASH.
+
 config ZFTL
 	bool "Rockchip ZFTL for rkpx30/rk3326 to support 3D/2D TLC/MLC"
 	depends on RKNAND && (ROCKCHIP_PX30)
@@ -18,4 +19,4 @@ config ZFTL
 	help
 	  This option enables support for Rockchip NAND FLASH devices.
 	  It supports block interface(with zftl) to read and write 3D/2D TLC/MLC
-	  NAND FLASH.
\ No newline at end of file
+	  NAND FLASH.

commit 68c3ade63c1845abdcfe4a4ff4c7af1543f189c5
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Wed Feb 7 11:34:56 2018 +0800

    configs: rockchip: enable usb-phy support for px30
    
    Enable usb-phy support for Rockchip evb-px30 SoC.
    
    Change-Id: Id4b3c56e23f6f6fb4f09ede7680db333c0a3a510
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 5e33d6f9be..b58995d37b 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -35,6 +35,8 @@ CONFIG_RK8XX_PWRKEY=y
 CONFIG_ADC_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
 CONFIG_DM_PMIC=y

commit fe0857a163fd0b84ae38a13089ec68e85d74283c
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Wed Feb 7 11:11:27 2018 +0800

    ARM: dts: rockchip: enable usb-phy for px30-evb
    
    This change enable usb-phy support for px30-evb board.
    
    Change-Id: I3200cd4b3988e84927ad2af274e7be78ff498dec
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/arch/arm/dts/px30-evb.dts b/arch/arm/dts/px30-evb.dts
index 7fd0d4feb3..2fee4918b3 100644
--- a/arch/arm/dts/px30-evb.dts
+++ b/arch/arm/dts/px30-evb.dts
@@ -362,3 +362,15 @@
 		};
 	};
 };
+
+&u2phy {
+	status = "okay";
+};
+
+&u2phy_otg {
+	status = "okay";
+};
+
+&u2phy_host {
+	status = "okay";
+};

commit e09cbbab1a02f2bea514824054851957a9b8f781
Author: Zhaoyifeng <zyf@rock-chips.com>
Date:   Wed Feb 7 11:21:35 2018 +0800

    drivers: rknand: add nand driver for rkpx30 and rk3326
    
    rk_zftl_arm_xx is new ftl for support 2D/3D TLC/MLC NAND FLASH.
    rk_ftl_arm_xx is legacy ftl for support 2D MLC NAND FLASH
    
    Change-Id: I80794998562a8916e634f533d1b917bf8aab4d91
    Signed-off-by: Zhaoyifeng <zyf@rock-chips.com>

diff --git a/drivers/rknand/Kconfig b/drivers/rknand/Kconfig
index ea2f21d484..cf7cac4777 100644
--- a/drivers/rknand/Kconfig
+++ b/drivers/rknand/Kconfig
@@ -7,6 +7,15 @@
 config RKNAND
 	bool "Rockchip NAND FLASH device support"
 	depends on BLK
+	select ZFTL if ROCKCHIP_PX30
 	help
 	  This option enables support for Rockchip NAND FLASH devices.
 	  It supports block interface(with rk ftl) to read and write NAND FLASH.
+config ZFTL
+	bool "Rockchip ZFTL for rkpx30/rk3326 to support 3D/2D TLC/MLC"
+	depends on RKNAND && (ROCKCHIP_PX30)
+	default y if ROCKCHIP_PX30
+	help
+	  This option enables support for Rockchip NAND FLASH devices.
+	  It supports block interface(with zftl) to read and write 3D/2D TLC/MLC
+	  NAND FLASH.
\ No newline at end of file
diff --git a/drivers/rknand/Makefile b/drivers/rknand/Makefile
index 573462b851..92dcebf20d 100644
--- a/drivers/rknand/Makefile
+++ b/drivers/rknand/Makefile
@@ -4,4 +4,21 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
 
-obj-y += rknand.o rk_ftl_arm_v7.o
+obj-y += rknand.o
+ifdef CONFIG_ARM64
+
+ifdef CONFIG_ZFTL
+obj-y += rk_zftl_arm_v8.o
+else
+obj-y += rk_ftl_arm_v8.o
+endif
+
+else
+
+ifdef CONFIG_ZFTL
+obj-y += rk_zftl_arm_v7.o
+else
+obj-y += rk_ftl_arm_v7.o
+endif
+
+endif
\ No newline at end of file
diff --git a/drivers/rknand/rk_ftl_arm_v7.S b/drivers/rknand/rk_ftl_arm_v7.S
index aa26ca5fe2..284102b3f5 100644
--- a/drivers/rknand/rk_ftl_arm_v7.S
+++ b/drivers/rknand/rk_ftl_arm_v7.S
@@ -5,9 +5,8 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2018-02-01
+ * date: 2018-02-08
  */
-	.syntax unified
 	.arch armv7-a
 	.eabi_attribute 20, 1
 	.eabi_attribute 21, 1
@@ -17,7 +16,7 @@
 	.eabi_attribute 26, 2
 	.eabi_attribute 30, 4
 	.eabi_attribute 34, 0
-	.eabi_attribute 18, 4
+	.eabi_attribute 18, 2
 	.file	"rk_ftl_arm_v7.S"
 	.section	.text.ftl_set_blk_mode.part.9,"ax",%progbits
 	.align	1
@@ -4484,7 +4483,7 @@ make_superblock:
 	cmp	r2, r3
 	bcc	.L642
 	ldr	r1, .L654+4
-	movw	r2, #2296
+	movw	r2, #2298
 	ldr	r0, .L654+8
 	bl	printf
 	ldr	r1, .L654+12
@@ -5532,18 +5531,17 @@ ReadFlashInfo:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
-	movs	r1, #0
-	ldr	r6, .L809
 	movs	r2, #11
+	movs	r1, #0
 	mov	r4, r0
-	movs	r5, #0
 	bl	ftl_memset
-	ldr	r3, [r6]
-	mov	r0, r5
-	ldr	r2, .L809+4
-	ldrb	r3, [r3, #9]	@ zero_extendqisi2
-	ldr	r2, [r2]
-	smulbb	r3, r3, r2
+	ldr	r3, .L809
+	movs	r2, #0
+	ldr	r1, [r3]
+	ldr	r3, .L809+4
+	ldrb	r0, [r1, #9]	@ zero_extendqisi2
+	ldr	r3, [r3]
+	smulbb	r3, r3, r0
 	uxth	r3, r3
 	strb	r3, [r4, #4]
 	lsrs	r3, r3, #8
@@ -5551,39 +5549,38 @@ ReadFlashInfo:
 	ldr	r3, .L809+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	strb	r3, [r4, #7]
-	bl	FlashBootGetCapacity
-	ubfx	r3, r0, #8, #8
-	strb	r0, [r4]
-	strb	r3, [r4, #1]
-	ubfx	r3, r0, #16, #8
-	strb	r3, [r4, #2]
-	lsrs	r0, r0, #24
-	ldr	r3, [r6]
-	strb	r0, [r4, #3]
-	mov	r0, r5
-	ldr	r1, .L809+12
-	ldrb	r2, [r3, #9]	@ zero_extendqisi2
-	strb	r2, [r4, #6]
-	movs	r2, #32
-	strb	r2, [r4, #8]
-	ldrb	r3, [r3, #7]	@ zero_extendqisi2
-	strb	r5, [r4, #10]
+	ldr	r3, .L809+12
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	strb	r5, [r4]
+	ldrb	r5, [r3, #1]	@ zero_extendqisi2
+	strb	r5, [r4, #1]
+	ldrb	r5, [r3, #2]	@ zero_extendqisi2
+	ldrb	r3, [r3, #3]	@ zero_extendqisi2
+	strb	r0, [r4, #6]
+	strb	r5, [r4, #2]
 	movs	r5, #1
+	strb	r3, [r4, #3]
+	movs	r3, #32
+	strb	r3, [r4, #8]
+	ldrb	r3, [r1, #7]	@ zero_extendqisi2
+	ldr	r0, .L809+16
+	strb	r2, [r4, #10]
 	strb	r3, [r4, #9]
-	ldr	r3, .L809+16
-	ldrb	r2, [r3]	@ zero_extendqisi2
+	ldr	r3, .L809+20
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	mov	r3, r2
 .L807:
-	uxtb	r3, r0
-	cmp	r2, r3
+	uxtb	r2, r3
+	cmp	r1, r2
 	bhi	.L808
 	pop	{r4, r5, r6, pc}
 .L808:
-	ldrb	r3, [r0, r1]	@ zero_extendqisi2
-	adds	r0, r0, #1
+	ldrb	r2, [r3, r0]	@ zero_extendqisi2
+	adds	r3, r3, #1
 	ldrb	r6, [r4, #10]	@ zero_extendqisi2
-	lsl	r3, r5, r3
-	orrs	r3, r3, r6
-	strb	r3, [r4, #10]
+	lsl	r2, r5, r2
+	orrs	r2, r2, r6
+	strb	r2, [r4, #10]
 	b	.L807
 .L810:
 	.align	2
@@ -5591,6 +5588,7 @@ ReadFlashInfo:
 	.word	.LANCHOR18
 	.word	.LANCHOR3
 	.word	.LANCHOR31
+	.word	.LANCHOR67
 	.word	.LANCHOR26
 	.word	.LANCHOR25
 	.size	ReadFlashInfo, .-ReadFlashInfo
@@ -6114,7 +6112,7 @@ SupperBlkListInit:
 	cmp	r3, r5
 	bge	.L859
 	ldr	r1, .L860+64
-	movw	r2, #2366
+	mov	r2, #2368
 	ldr	r0, .L860+68
 	bl	printf
 	ldr	r1, .L860+72
@@ -6738,970 +6736,970 @@ FlashReadRawPage:
 	.word	.LANCHOR2
 	.word	.LANCHOR3
 	.size	FlashReadRawPage, .-FlashReadRawPage
-	.section	.text.FlashLoadPhyInfo,"ax",%progbits
+	.section	.text.FlashDdrTunningRead,"ax",%progbits
 	.align	1
-	.global	FlashLoadPhyInfo
+	.global	FlashDdrTunningRead
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashLoadPhyInfo, %function
-FlashLoadPhyInfo:
-	@ args = 0, pretend = 0, frame = 24
+	.type	FlashDdrTunningRead, %function
+FlashDdrTunningRead:
+	@ args = 4, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r3, #60
+	mov	r7, r3
+	ldr	r3, .L967
 	sub	sp, sp, #24
-	ldr	fp, .L957+8
-	movs	r4, #0
-	movs	r7, #4
-	strb	r3, [sp, #20]
-	movs	r3, #40
-	strb	r3, [sp, #21]
-	movs	r3, #24
-	strb	r3, [sp, #22]
-	movs	r3, #16
-	ldr	r1, .L957
-	mov	r0, r4
-	strb	r3, [sp, #23]
-	mov	r6, #-1
-	ldrh	r3, [fp, #10]
-	ldr	r8, .L957+36
-	ldr	r5, .L957+4
-	str	r3, [sp, #4]
-	ldr	r3, [r1]
-	str	r4, [r8]
-	str	r3, [r5]
-	bl	flash_enter_slc_mode
-	mov	r10, r1
-	str	r8, [sp, #12]
-.L943:
-	mov	r8, #0
-	adds	r3, r4, #1
-	str	r3, [sp, #8]
-.L945:
-	add	r3, sp, #20
-	ldrb	r0, [r3, r8]	@ zero_extendqisi2
-	bl	FlashBchSel
-	movs	r3, #0
-	ldr	r2, [r10]
-	mov	r1, r4
-	mov	r0, r3
-	bl	FlashReadRawPage
-	adds	r0, r0, #1
-	bne	.L944
-	movs	r3, #0
-	ldr	r2, [r10]
-	ldr	r1, [sp, #8]
-	mov	r0, r3
+	str	r0, [sp, #8]
+	ldr	r3, [r3]
+	str	r1, [sp, #12]
+	str	r2, [sp, #4]
+	ldr	r3, [r3, #304]
+	str	r3, [sp, #20]
+	ldr	r3, .L967+4
+	ldr	r3, [r3]
+	cmp	r3, #8
+	ldr	r3, [sp, #56]
+	ite	cc
+	movcc	fp, #6
+	movcs	fp, #12
+	cmp	r3, #0
+	beq	.L956
+	movs	r0, #1
+	ldr	r4, .L967+8
+	bl	FlashSetInterfaceMode
+	movs	r0, #1
+	bl	NandcSetMode
+	ldr	r0, [sp, #8]
+	bl	FlashReset
+	mov	r3, r7
+	ldr	r2, [sp, #4]
+	ldr	r1, [sp, #12]
+	ldr	r0, [sp, #8]
 	bl	FlashReadRawPage
-	adds	r0, r0, #1
-	bne	.L944
-	add	r8, r8, #1
-	cmp	r8, #4
+	mov	r6, r0
+	ldrb	r0, [r4]	@ zero_extendqisi2
+	bl	FlashSetInterfaceMode
+	ldrb	r0, [r4]	@ zero_extendqisi2
+	bl	NandcSetMode
+	adds	r3, r6, #1
 	bne	.L945
-.L946:
-	ldr	r3, [sp, #4]
-	subs	r7, r7, #1
-	add	r4, r4, r3
-	bne	.L943
-	mov	r0, r7
-	b	.L956
-.L947:
-	movw	r1, #2036
-	add	r0, r8, #12
-	bl	JSHash
-	ldr	r3, [r8, #8]
-	cmp	r3, r0
-	bne	.L953
-	movs	r2, #32
-	add	r1, r8, #160
-	ldr	r0, .L957+8
-	bl	ftl_memcpy
-	ldr	r1, [r5]
-	movs	r2, #32
-	ldr	r0, .L957+12
-	adds	r1, r1, #192
-	bl	ftl_memcpy
-	ldr	r1, [r5]
-	mov	r2, #852
-	ldr	r0, .L957+16
-	adds	r1, r1, #224
-	bl	ftl_memcpy
-	ldr	r6, [r5]
-	mov	r0, r4
-	ldr	r3, .L957+20
-	ldrh	r1, [fp, #10]
-	ldr	r2, [r6, #1076]
-	strb	r2, [r3]
-	ldr	r3, [sp, #12]
-	str	r4, [r3]
-	bl	__aeabi_uidiv
-	ldr	r3, .L957+24
-	adds	r2, r0, #1
-	cbz	r0, .L949
-.L955:
-	str	r2, [r3]
-	ldrh	r2, [r6, #14]
-	movs	r6, #0
-	ldr	r3, .L957+28
-	strb	r2, [r3]
-	b	.L946
-.L949:
-	movs	r2, #2
-	b	.L955
-.L953:
+.L954:
 	mov	r6, #-1
-	b	.L946
-.L944:
-	ldr	r8, [r5]
-	ldr	r2, .L957+32
-	ldr	r3, [r8]
-	cmp	r3, r2
-	bne	.L946
-	cmp	r6, #0
-	bne	.L947
-	ldrh	r1, [fp, #10]
-	mov	r0, r4
-	bl	__aeabi_uidiv
-	ldr	r3, .L957+24
-	adds	r0, r0, #1
-	str	r0, [r3]
-	mov	r0, r6
-.L956:
-	bl	flash_exit_slc_mode
+.L942:
 	mov	r0, r6
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L945:
+	mov	r2, r6
+	ldr	r1, [sp, #12]
+	ldr	r0, .L967+12
+	bl	printf
+	ldr	r2, .L967+16
+	ldr	r3, [r2]
+	adds	r3, r3, #1
+	cmp	r3, #2048
+	bcs	.L947
+	str	r3, [r2]
+	b	.L942
+.L947:
+	movs	r7, #0
+	str	r7, [r2]
+	str	r7, [sp, #4]
+.L944:
+	mov	r10, #0
+	mov	r8, #-1
+	mov	r5, r10
+	mov	r4, r10
+	str	r10, [sp, #16]
+.L952:
+	uxtb	r0, fp
+	bl	NandcSetDdrPara
+	mov	r3, r7
+	ldr	r2, [sp, #4]
+	ldr	r1, [sp, #12]
+	ldr	r0, [sp, #8]
+	bl	FlashReadRawPage
+	adds	r3, r6, #1
+	cmp	r0, r3
+	bhi	.L948
+	cmp	r0, #2
+	bhi	.L958
+	adds	r4, r4, #1
+	cmp	r4, #9
+	bls	.L958
+	mov	r3, r5
+	mov	r6, r0
+	sub	r5, fp, r4
+	mov	r8, #0
+.L950:
+	ldr	r2, [sp, #16]
+	cmp	r4, r2
+	it	ls
+	movls	r5, r3
+.L951:
+	cbz	r5, .L953
+	mov	r1, r5
+	ldr	r0, .L967+20
+	bl	printf
+	uxtb	r0, r5
+	bl	NandcSetDdrPara
+.L953:
+	cmp	r8, #0
+	beq	.L942
+	ldr	r2, [sp, #12]
+	ldr	r1, [sp, #8]
+	ldr	r0, .L967+24
+	bl	printf
+	ldr	r3, [sp, #56]
+	cmp	r3, #0
+	beq	.L954
+	ldr	r3, [sp, #20]
+	ubfx	r0, r3, #8, #8
+	bl	NandcSetDdrPara
+	b	.L942
+.L956:
+	mov	r6, #1024
+	b	.L944
+.L948:
+	ldr	r3, [sp, #16]
+	cmp	r4, r3
+	bls	.L959
+	cmp	r4, #7
+	sub	r5, r10, r4
+	bhi	.L951
+	str	r4, [sp, #16]
+.L959:
+	movs	r4, #0
+	b	.L949
 .L958:
+	mov	r8, #0
+	mov	r10, fp
+	mov	r6, r0
+	mov	r7, r8
+	str	r8, [sp, #4]
+.L949:
+	add	fp, fp, #2
+	cmp	fp, #69
+	bls	.L952
+	mov	r3, r5
+	mov	r5, r10
+	b	.L950
+.L968:
 	.align	2
-.L957:
-	.word	.LANCHOR143
+.L967:
+	.word	.LANCHOR19
+	.word	.LANCHOR32
+	.word	.LANCHOR24
+	.word	.LC7
 	.word	.LANCHOR142
-	.word	.LANCHOR29
-	.word	.LANCHOR7
-	.word	.LANCHOR20
-	.word	.LANCHOR28
-	.word	.LANCHOR145
-	.word	.LANCHOR146
-	.word	1312902724
-	.word	.LANCHOR144
-	.size	FlashLoadPhyInfo, .-FlashLoadPhyInfo
-	.section	.text.ToshibaReadRetrial,"ax",%progbits
+	.word	.LC8
+	.word	.LC9
+	.size	FlashDdrTunningRead, .-FlashDdrTunningRead
+	.section	.text.FlashReadPage,"ax",%progbits
 	.align	1
-	.global	ToshibaReadRetrial
+	.global	FlashReadPage
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ToshibaReadRetrial, %function
-ToshibaReadRetrial:
-	@ args = 0, pretend = 0, frame = 24
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #24
-	mov	r6, r0
-	str	r2, [sp, #12]
-	mov	fp, r3
-	str	r1, [sp, #20]
-	bl	NandcWaitFlashReady
-	ldr	r3, .L986
-	ldr	r2, .L986+4
-	ldr	r4, [r3, r6, lsl #3]
-	add	r3, r3, r6, lsl #3
-	str	r2, [sp, #16]
-	ldrb	r7, [r3, #4]	@ zero_extendqisi2
-	ldrb	r3, [r2]	@ zero_extendqisi2
-	add	r5, r7, #8
-	subs	r3, r3, #67
-	add	r5, r4, r5, lsl #8
-	cmp	r3, #1
-	bls	.L976
-	ldr	r3, .L986+8
+	.type	FlashReadPage, %function
+FlashReadPage:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r7, r2
+	mov	r5, r0
+	mov	r6, r1
+	mov	r8, r3
+	bl	FlashReadRawPage
+	adds	r2, r0, #1
+	mov	r4, r0
+	bne	.L970
+	ldr	r10, .L988+20
+	ldrb	fp, [r10]	@ zero_extendqisi2
+	cmp	fp, #0
+	bne	.L971
+.L973:
+	ldr	r3, .L988
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L977
-	movs	r0, #0
-	bl	NandcSetDdrMode
+	cbz	r3, .L970
+	ldr	r3, .L988+4
+	mov	r1, r6
+	mov	r2, r7
+	mov	r0, r5
+	ldr	r3, [r3]
+	ldr	r10, [r3, #304]
 	movs	r3, #1
-.L977:
-	str	r3, [sp, #8]
-	add	r3, r4, r7, lsl #8
-	movs	r2, #92
-	str	r2, [r3, #2056]
-	movs	r2, #197
-	str	r2, [r3, #2056]
-.L960:
-	mov	r8, #1
-	mov	r3, #-1
-	str	r3, [sp, #4]
-.L962:
-	ldr	r3, .L986+12
+	str	r3, [sp]
+	mov	r3, r8
+	bl	FlashDdrTunningRead
+	adds	r1, r0, #1
+	mov	r4, r0
+	beq	.L974
+	ldr	r3, .L988+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	adds	r3, r3, #1
-	cmp	r8, r3
-	bcc	.L971
-	ldr	r10, [sp, #4]
-.L970:
-	ldr	r3, [sp, #16]
-	movs	r1, #0
-	mov	r0, r5
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	subs	r2, r2, #67
-	cmp	r2, #1
-	bhi	.L972
-	bl	SandiskSetRRPara
-.L973:
-	add	r4, r4, r7, lsl #8
-	movs	r2, #255
-	str	r2, [r4, #2056]
-	ldr	r2, .L986+16
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	add	r2, r2, r2, lsl #1
-	cmp	r10, r2, asr #2
-	bcc	.L974
-	cmp	r10, #-1
-	it	ne
-	movne	r10, #256
+	cmp	r0, r3, lsr #1
+	bls	.L970
 .L974:
-	mov	r0, r6
-	bl	NandcWaitFlashReady
-	ldr	r3, [sp, #8]
-	cbz	r3, .L959
-	movs	r0, #4
-	bl	NandcSetDdrMode
-.L959:
-	mov	r0, r10
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L976:
-	movs	r3, #0
-	str	r3, [sp, #8]
-	b	.L960
+	ubfx	r0, r10, #8, #8
+	bl	NandcSetDdrPara
+	b	.L970
 .L971:
-	ldr	r3, [sp, #16]
+	movs	r3, #0
+	mov	r2, r7
+	strb	r3, [r10]
+	mov	r1, r6
+	mov	r3, r8
 	mov	r0, r5
-	uxtb	r1, r8
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	subs	r3, r3, #67
-	cmp	r3, #1
-	bhi	.L963
-	bl	SandiskSetRRPara
-.L964:
-	ldr	r3, [sp, #16]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #34
-	bne	.L965
-	ldr	r3, .L986+12
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	subs	r3, r3, #3
-	cmp	r8, r3
-	ittt	eq
-	addeq	r3, r4, r7, lsl #8
-	moveq	r2, #179
-	streq	r2, [r3, #2056]
-.L965:
-	add	r3, r4, r7, lsl #8
-	movs	r2, #38
-	str	r2, [r3, #2056]
-	movs	r2, #93
-	str	r2, [r3, #2056]
-	ldr	r3, [sp, #8]
-	cbz	r3, .L966
-	movs	r0, #4
-	bl	NandcSetDdrMode
-	mov	r3, fp
-	ldr	r2, [sp, #12]
-	ldr	r1, [sp, #20]
-	mov	r0, r6
 	bl	FlashReadRawPage
-	mov	r10, r0
-	movs	r0, #0
-	bl	NandcSetDdrMode
-.L967:
-	cmp	r10, #-1
-	beq	.L968
-	ldr	r2, .L986+16
-	ldr	r3, [sp, #4]
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cmp	r3, #-1
-	it	eq
-	moveq	r3, r10
-	str	r3, [sp, #4]
-	add	r2, r2, r2, lsl #1
-	cmp	r10, r2, asr #2
-	bcc	.L970
-	mov	fp, #0
-	str	fp, [sp, #12]
-.L968:
-	add	r8, r8, #1
-	b	.L962
-.L963:
-	bl	ToshibaSetRRPara
-	b	.L964
-.L966:
-	mov	r3, fp
-	ldr	r2, [sp, #12]
-	ldr	r1, [sp, #20]
-	mov	r0, r6
-	bl	FlashReadRawPage
-	mov	r10, r0
-	b	.L967
-.L972:
-	bl	ToshibaSetRRPara
-	b	.L973
-.L987:
+	adds	r3, r0, #1
+	strb	fp, [r10]
+	beq	.L973
+	mov	r4, r0
+.L970:
+	ldr	r10, .L988+24
+	ldr	fp, [r10]
+	cmp	fp, #0
+	beq	.L969
+	adds	r2, r4, #1
+	bne	.L969
+	mov	r3, r8
+	mov	r2, r7
+	mov	r1, r6
+	mov	r0, r5
+	blx	fp
+	mov	r3, r6
+	mov	r4, r0
+	mov	r1, r0
+	mov	r2, r5
+	ldr	r0, .L988+12
+	bl	printf
+	adds	r3, r4, #1
+	bne	.L969
+	ldr	r3, .L988+16
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L969
+	mov	r0, r5
+	bl	flash_enter_slc_mode
+	ldr	r4, [r10]
+	mov	r3, r8
+	mov	r2, r7
+	mov	r1, r6
+	mov	r0, r5
+	blx	r4
+	mov	r4, r0
+	mov	r0, r5
+	bl	flash_exit_slc_mode
+.L969:
+	mov	r0, r4
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L989:
 	.align	2
-.L986:
-	.word	.LANCHOR6
-	.word	.LANCHOR10
+.L988:
 	.word	.LANCHOR28
-	.word	.LANCHOR147
+	.word	.LANCHOR19
 	.word	.LANCHOR31
-	.size	ToshibaReadRetrial, .-ToshibaReadRetrial
-	.section	.text.SamsungReadRetrial,"ax",%progbits
+	.word	.LC10
+	.word	.LANCHOR8
+	.word	.LANCHOR5
+	.word	.LANCHOR143
+	.size	FlashReadPage, .-FlashReadPage
+	.section	.text.FlashDdrParaScan,"ax",%progbits
 	.align	1
-	.global	SamsungReadRetrial
+	.global	FlashDdrParaScan
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	SamsungReadRetrial, %function
-SamsungReadRetrial:
+	.type	FlashDdrParaScan, %function
+FlashDdrParaScan:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r7, r0
-	mov	r10, r2
-	mov	r8, r3
-	mov	fp, r1
-	movs	r6, #1
-	bl	NandcWaitFlashReady
-	ldr	r2, .L1001
-	mov	r4, #-1
-	add	r3, r2, r7, lsl #3
-	ldrb	r5, [r3, #4]	@ zero_extendqisi2
-	add	r3, r5, #8
-	ldr	r5, [r2, r7, lsl #3]
-	add	r5, r5, r3, lsl #8
-.L989:
-	ldr	r3, .L1001+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	adds	r3, r3, #1
-	cmp	r6, r3
-	bcc	.L993
-.L992:
-	movs	r1, #0
-	mov	r0, r5
-	bl	SamsungSetRRPara
-	ldr	r3, .L1001+8
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	r4, r3, asr #2
-	bcc	.L988
-	adds	r3, r4, #1
-	it	ne
-	movne	r4, #256
-.L988:
-	mov	r0, r4
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L993:
-	uxtb	r1, r6
-	mov	r0, r5
-	bl	SamsungSetRRPara
-	mov	r2, r10
-	mov	r3, r8
-	mov	r1, fp
-	mov	r0, r7
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	mov	r6, r0
+	ldr	r4, .L1001
+	movs	r5, #0
+	mov	r7, r1
+	ldrb	r0, [r4]	@ zero_extendqisi2
+	bl	FlashSetInterfaceMode
+	ldrb	r0, [r4]	@ zero_extendqisi2
+	bl	NandcSetMode
+	mov	r3, r5
+	mov	r2, r5
+	str	r5, [sp]
+	mov	r1, r7
+	mov	r0, r6
+	bl	FlashDdrTunningRead
+	mov	r3, r5
+	mov	r2, r5
+	mov	r8, r0
+	mov	r1, r7
+	mov	r0, r6
+	ldr	r5, .L1001+4
 	bl	FlashReadRawPage
-	adds	r2, r0, #1
-	beq	.L990
-	ldr	r3, .L1001+8
-	cmp	r4, #-1
-	it	eq
-	moveq	r4, r0
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	r0, r3, asr #2
-	bcc	.L996
-	mov	r8, #0
-	mov	r10, r8
-.L990:
-	adds	r6, r6, #1
-	b	.L989
-.L996:
-	mov	r4, r0
-	b	.L992
+	adds	r0, r0, #1
+	beq	.L991
+	cmp	r8, #-1
+	bne	.L992
+.L991:
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	lsls	r3, r3, #31
+	bpl	.L992
+	movs	r0, #1
+	bl	FlashSetInterfaceMode
+	movs	r0, #1
+	bl	NandcSetMode
+	movs	r3, #0
+.L1000:
+	movs	r0, #0
+	strb	r3, [r5]
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L992:
+	movs	r3, #1
+	b	.L1000
 .L1002:
 	.align	2
 .L1001:
-	.word	.LANCHOR6
-	.word	.LANCHOR147
-	.word	.LANCHOR31
-	.size	SamsungReadRetrial, .-SamsungReadRetrial
-	.section	.text.MicronReadRetrial,"ax",%progbits
+	.word	.LANCHOR24
+	.word	.LANCHOR28
+	.size	FlashDdrParaScan, .-FlashDdrParaScan
+	.section	.text.FlashLoadPhyInfo,"ax",%progbits
 	.align	1
-	.global	MicronReadRetrial
+	.global	FlashLoadPhyInfo
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	MicronReadRetrial, %function
-MicronReadRetrial:
+	.type	FlashLoadPhyInfo, %function
+FlashLoadPhyInfo:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r10, r3
-	ldr	r3, .L1018
-	sub	sp, sp, #32
-	mov	r7, r0
-	mov	fp, r2
-	str	r1, [sp, #16]
-	ldrb	r4, [r3]	@ zero_extendqisi2
-	ldr	r3, .L1018+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #0
-	bne	.L1004
-	add	r4, r4, r4, lsl #1
-	asrs	r4, r4, #2
-.L1005:
-	mov	r0, r7
-	bl	NandcWaitFlashReady
-	ldr	r3, .L1018+8
-	movs	r6, #0
-	mov	r5, #-1
-	ldr	r2, [r3, r7, lsl #3]
-	add	r3, r3, r7, lsl #3
-	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-	str	r2, [sp, #8]
-	str	r3, [sp, #12]
-	lsls	r3, r3, #8
-	str	r3, [sp, #24]
+	movs	r3, #60
+	sub	sp, sp, #24
+	ldr	fp, .L1018+8
+	movs	r4, #0
+	movs	r7, #4
+	strb	r3, [sp, #20]
+	movs	r3, #40
+	strb	r3, [sp, #21]
+	movs	r3, #24
+	strb	r3, [sp, #22]
+	movs	r3, #16
+	ldr	r1, .L1018
+	mov	r0, r4
+	strb	r3, [sp, #23]
+	mov	r6, #-1
+	ldrh	r3, [fp, #10]
+	ldr	r8, .L1018+36
+	ldr	r5, .L1018+4
+	str	r3, [sp, #4]
+	ldr	r3, [r1]
+	str	r4, [r8]
+	str	r3, [r5]
+	bl	flash_enter_slc_mode
+	mov	r10, r1
+	str	r8, [sp, #12]
+.L1004:
+	mov	r8, #0
+	adds	r3, r4, #1
+	str	r3, [sp, #8]
 .L1006:
-	ldr	r3, .L1018+12
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r6, r3
-	bcc	.L1010
-.L1009:
-	ldr	r3, [sp, #8]
-	movs	r0, #200
-	ldr	r2, [sp, #12]
-	add	r7, r3, r2, lsl #8
-	movs	r3, #239
-	str	r3, [r7, #2056]
-	movs	r3, #137
-	str	r3, [r7, #2052]
-	bl	udelay
-	cmp	r5, r4
-	mov	r3, #0
-	str	r3, [r7, #2048]
-	str	r3, [r7, #2048]
-	str	r3, [r7, #2048]
-	str	r3, [r7, #2048]
-	bcc	.L1003
-	adds	r3, r5, #1
-	ldr	r2, [sp, #16]
-	it	ne
-	movne	r5, #256
-	mov	r3, r6
-	str	r5, [sp]
-	mov	r1, r6
+	add	r3, sp, #20
+	ldrb	r0, [r3, r8]	@ zero_extendqisi2
+	bl	FlashBchSel
+	movs	r3, #0
+	ldr	r2, [r10]
+	mov	r1, r4
+	mov	r0, r3
+	bl	FlashReadRawPage
+	adds	r0, r0, #1
+	bne	.L1005
+	movs	r3, #0
+	ldr	r2, [r10]
+	ldr	r1, [sp, #8]
+	mov	r0, r3
+	bl	FlashReadRawPage
+	adds	r0, r0, #1
+	bne	.L1005
+	add	r8, r8, #1
+	cmp	r8, #4
+	bne	.L1006
+.L1007:
+	ldr	r3, [sp, #4]
+	subs	r7, r7, #1
+	add	r4, r4, r3
+	bne	.L1004
+	mov	r0, r7
+	b	.L1017
+.L1008:
+	movw	r1, #2036
+	add	r0, r8, #12
+	bl	JSHash
+	ldr	r3, [r8, #8]
+	cmp	r3, r0
+	bne	.L1014
+	movs	r2, #32
+	add	r1, r8, #160
+	ldr	r0, .L1018+8
+	bl	ftl_memcpy
+	ldr	r1, [r5]
+	movs	r2, #32
+	ldr	r0, .L1018+12
+	adds	r1, r1, #192
+	bl	ftl_memcpy
+	ldr	r1, [r5]
+	mov	r2, #852
 	ldr	r0, .L1018+16
-	bl	printf
-.L1003:
-	mov	r0, r5
-	add	sp, sp, #32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1004:
+	adds	r1, r1, #224
+	bl	ftl_memcpy
+	ldr	r6, [r5]
+	mov	r0, r4
 	ldr	r3, .L1018+20
-	smull	r4, r5, r4, r3
-	mov	r4, r5
-	b	.L1005
-.L1010:
-	ldr	r2, [sp, #24]
-	movs	r0, #200
-	ldr	r3, [sp, #8]
-	mov	r8, #0
-	add	r3, r3, r2
-	movs	r2, #239
-	str	r2, [r3, #2056]
-	movs	r2, #137
-	str	r2, [r3, #2052]
-	str	r3, [sp, #28]
-	bl	udelay
-	adds	r3, r6, #1
-	ldr	r1, [sp, #16]
-	mov	r2, r3
-	str	r3, [sp, #20]
-	ldr	r3, [sp, #28]
-	mov	r0, r7
-	str	r2, [r3, #2048]
-	mov	r2, fp
-	str	r8, [r3, #2048]
-	str	r8, [r3, #2048]
-	str	r8, [r3, #2048]
-	mov	r3, r10
-	bl	FlashReadRawPage
+	ldrh	r1, [fp, #10]
+	ldr	r2, [r6, #1076]
+	strb	r2, [r3]
+	ldr	r3, [sp, #12]
+	str	r4, [r3]
+	bl	__aeabi_uidiv
+	ldr	r3, .L1018+24
 	adds	r2, r0, #1
-	beq	.L1007
-	cmp	r5, #-1
-	it	eq
-	moveq	r5, r0
-	cmp	r0, r4
-	bcc	.L1013
-	mov	r10, r8
-	mov	fp, r8
-.L1007:
-	ldr	r6, [sp, #20]
-	b	.L1006
-.L1013:
-	mov	r5, r0
-	b	.L1009
+	cbz	r0, .L1010
+.L1016:
+	str	r2, [r3]
+	ldrh	r2, [r6, #14]
+	movs	r6, #0
+	ldr	r3, .L1018+28
+	strb	r2, [r3]
+	b	.L1007
+.L1010:
+	movs	r2, #2
+	b	.L1016
+.L1014:
+	mov	r6, #-1
+	b	.L1007
+.L1005:
+	ldr	r8, [r5]
+	ldr	r2, .L1018+32
+	ldr	r3, [r8]
+	cmp	r3, r2
+	bne	.L1007
+	cmp	r6, #0
+	bne	.L1008
+	ldrh	r1, [fp, #10]
+	mov	r0, r4
+	bl	__aeabi_uidiv
+	ldr	r3, .L1018+24
+	adds	r0, r0, #1
+	str	r0, [r3]
+	mov	r0, r6
+.L1017:
+	bl	flash_exit_slc_mode
+	mov	r0, r6
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
 .L1019:
 	.align	2
 .L1018:
-	.word	.LANCHOR31
-	.word	.LANCHOR8
-	.word	.LANCHOR6
+	.word	.LANCHOR145
+	.word	.LANCHOR144
+	.word	.LANCHOR29
+	.word	.LANCHOR7
+	.word	.LANCHOR20
+	.word	.LANCHOR28
 	.word	.LANCHOR147
-	.word	.LC7
-	.word	1431655766
-	.size	MicronReadRetrial, .-MicronReadRetrial
-	.section	.text.HynixReadRetrial,"ax",%progbits
+	.word	.LANCHOR148
+	.word	1312902724
+	.word	.LANCHOR146
+	.size	FlashLoadPhyInfo, .-FlashLoadPhyInfo
+	.section	.text.ToshibaReadRetrial,"ax",%progbits
 	.align	1
-	.global	HynixReadRetrial
+	.global	ToshibaReadRetrial
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	HynixReadRetrial, %function
-HynixReadRetrial:
-	@ args = 0, pretend = 0, frame = 8
+	.type	ToshibaReadRetrial, %function
+ToshibaReadRetrial:
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	fp, r2
-	ldr	r4, .L1037
-	mov	r8, #0
-	mov	r6, #-1
-	mov	r10, r3
-	mov	r7, r0
-	str	r1, [sp, #4]
-	ldrb	r2, [r4, #2]	@ zero_extendqisi2
-	adds	r3, r4, r0
-	ldrb	r5, [r3, #12]	@ zero_extendqisi2
-	str	r2, [sp]
-	ldr	r2, .L1037+4
-	ldr	r2, [r2]
-	ldrb	r2, [r2, #19]	@ zero_extendqisi2
-	cmp	r2, #7
-	it	eq
-	ldrbeq	r5, [r3, #20]	@ zero_extendqisi2
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #24
+	mov	r6, r0
+	str	r2, [sp, #12]
+	mov	fp, r3
+	str	r1, [sp, #20]
 	bl	NandcWaitFlashReady
-.L1022:
-	ldr	r3, [sp]
-	cmp	r8, r3
-	bcc	.L1027
-.L1026:
-	ldr	r3, .L1037+4
-	add	r4, r4, r7
-	ldr	r3, [r3]
-	ldrb	r3, [r3, #19]	@ zero_extendqisi2
-	cmp	r3, #7
-	ldr	r3, .L1037+8
-	ite	eq
-	strbeq	r5, [r4, #20]
-	strbne	r5, [r4, #12]
+	ldr	r3, .L1047
+	ldr	r2, .L1047+4
+	ldr	r4, [r3, r6, lsl #3]
+	add	r3, r3, r6, lsl #3
+	str	r2, [sp, #16]
+	ldrb	r7, [r3, #4]	@ zero_extendqisi2
+	ldrb	r3, [r2]	@ zero_extendqisi2
+	add	r5, r7, #8
+	subs	r3, r3, #67
+	add	r5, r4, r5, lsl #8
+	cmp	r3, #1
+	bls	.L1037
+	ldr	r3, .L1047+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	r6, r3, asr #2
-	bcc	.L1020
-	adds	r3, r6, #1
+	cbz	r3, .L1038
+	movs	r0, #0
+	bl	NandcSetDdrMode
+	movs	r3, #1
+.L1038:
+	str	r3, [sp, #8]
+	add	r3, r4, r7, lsl #8
+	movs	r2, #92
+	str	r2, [r3, #2056]
+	movs	r2, #197
+	str	r2, [r3, #2056]
+.L1021:
+	mov	r8, #1
+	mov	r3, #-1
+	str	r3, [sp, #4]
+.L1023:
+	ldr	r3, .L1047+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	cmp	r8, r3
+	bcc	.L1032
+	ldr	r10, [sp, #4]
+.L1031:
+	ldr	r3, [sp, #16]
+	movs	r1, #0
+	mov	r0, r5
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	subs	r2, r2, #67
+	cmp	r2, #1
+	bhi	.L1033
+	bl	SandiskSetRRPara
+.L1034:
+	add	r4, r4, r7, lsl #8
+	movs	r2, #255
+	str	r2, [r4, #2056]
+	ldr	r2, .L1047+16
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	add	r2, r2, r2, lsl #1
+	cmp	r10, r2, asr #2
+	bcc	.L1035
+	cmp	r10, #-1
 	it	ne
-	movne	r6, #256
-.L1020:
+	movne	r10, #256
+.L1035:
 	mov	r0, r6
-	add	sp, sp, #8
+	bl	NandcWaitFlashReady
+	ldr	r3, [sp, #8]
+	cbz	r3, .L1020
+	movs	r0, #4
+	bl	NandcSetDdrMode
+.L1020:
+	mov	r0, r10
+	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1027:
-	ldr	r3, [sp]
-	adds	r5, r5, #1
-	uxtb	r5, r5
-	ldr	r2, .L1037+12
-	ldrb	r1, [r4, #1]	@ zero_extendqisi2
-	mov	r0, r7
-	cmp	r3, r5
-	it	ls
-	movls	r5, #0
-	mov	r3, r5
-	bl	HynixSetRRPara
-	mov	r2, fp
-	mov	r3, r10
-	ldr	r1, [sp, #4]
-	mov	r0, r7
+.L1037:
+	movs	r3, #0
+	str	r3, [sp, #8]
+	b	.L1021
+.L1032:
+	ldr	r3, [sp, #16]
+	mov	r0, r5
+	uxtb	r1, r8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	subs	r3, r3, #67
+	cmp	r3, #1
+	bhi	.L1024
+	bl	SandiskSetRRPara
+.L1025:
+	ldr	r3, [sp, #16]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #34
+	bne	.L1026
+	ldr	r3, .L1047+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	subs	r3, r3, #3
+	cmp	r8, r3
+	ittt	eq
+	addeq	r3, r4, r7, lsl #8
+	moveq	r2, #179
+	streq	r2, [r3, #2056]
+.L1026:
+	add	r3, r4, r7, lsl #8
+	movs	r2, #38
+	str	r2, [r3, #2056]
+	movs	r2, #93
+	str	r2, [r3, #2056]
+	ldr	r3, [sp, #8]
+	cbz	r3, .L1027
+	movs	r0, #4
+	bl	NandcSetDdrMode
+	mov	r3, fp
+	ldr	r2, [sp, #12]
+	ldr	r1, [sp, #20]
+	mov	r0, r6
 	bl	FlashReadRawPage
-	adds	r2, r0, #1
-	beq	.L1024
-	ldr	r3, .L1037+8
-	cmp	r6, #-1
+	mov	r10, r0
+	movs	r0, #0
+	bl	NandcSetDdrMode
+.L1028:
+	cmp	r10, #-1
+	beq	.L1029
+	ldr	r2, .L1047+16
+	ldr	r3, [sp, #4]
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r3, #-1
 	it	eq
-	moveq	r6, r0
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	r0, r3, asr #2
+	moveq	r3, r10
+	str	r3, [sp, #4]
+	add	r2, r2, r2, lsl #1
+	cmp	r10, r2, asr #2
 	bcc	.L1031
-	mov	r10, #0
-	mov	fp, r10
-.L1024:
+	mov	fp, #0
+	str	fp, [sp, #12]
+.L1029:
 	add	r8, r8, #1
-	b	.L1022
-.L1031:
-	mov	r6, r0
-	b	.L1026
-.L1038:
+	b	.L1023
+.L1024:
+	bl	ToshibaSetRRPara
+	b	.L1025
+.L1027:
+	mov	r3, fp
+	ldr	r2, [sp, #12]
+	ldr	r1, [sp, #20]
+	mov	r0, r6
+	bl	FlashReadRawPage
+	mov	r10, r0
+	b	.L1028
+.L1033:
+	bl	ToshibaSetRRPara
+	b	.L1034
+.L1048:
 	.align	2
-.L1037:
-	.word	.LANCHOR20
-	.word	.LANCHOR18
+.L1047:
+	.word	.LANCHOR6
+	.word	.LANCHOR10
+	.word	.LANCHOR28
+	.word	.LANCHOR149
 	.word	.LANCHOR31
-	.word	.LANCHOR20+4
-	.size	HynixReadRetrial, .-HynixReadRetrial
-	.section	.text.FlashDdrTunningRead,"ax",%progbits
+	.size	ToshibaReadRetrial, .-ToshibaReadRetrial
+	.section	.text.SamsungReadRetrial,"ax",%progbits
 	.align	1
-	.global	FlashDdrTunningRead
+	.global	SamsungReadRetrial
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashDdrTunningRead, %function
-FlashDdrTunningRead:
-	@ args = 4, pretend = 0, frame = 24
+	.type	SamsungReadRetrial, %function
+SamsungReadRetrial:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r7, r3
-	ldr	r3, .L1064
-	sub	sp, sp, #24
-	str	r0, [sp, #8]
-	ldr	r3, [r3]
-	str	r1, [sp, #12]
-	str	r2, [sp, #4]
-	ldr	r3, [r3, #304]
-	str	r3, [sp, #20]
-	ldr	r3, .L1064+4
-	ldr	r3, [r3]
-	cmp	r3, #8
-	ldr	r3, [sp, #56]
-	ite	cc
-	movcc	fp, #6
-	movcs	fp, #12
-	cmp	r3, #0
-	beq	.L1053
-	movs	r0, #1
-	ldr	r4, .L1064+8
-	bl	FlashSetInterfaceMode
-	movs	r0, #1
-	bl	NandcSetMode
-	ldr	r0, [sp, #8]
-	bl	FlashReset
-	mov	r3, r7
-	ldr	r2, [sp, #4]
-	ldr	r1, [sp, #12]
-	ldr	r0, [sp, #8]
-	bl	FlashReadRawPage
-	mov	r6, r0
-	ldrb	r0, [r4]	@ zero_extendqisi2
-	bl	FlashSetInterfaceMode
-	ldrb	r0, [r4]	@ zero_extendqisi2
-	bl	NandcSetMode
-	adds	r3, r6, #1
-	bne	.L1042
-.L1051:
-	mov	r6, #-1
-.L1039:
-	mov	r0, r6
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1042:
-	mov	r2, r6
-	ldr	r1, [sp, #12]
-	ldr	r0, .L1064+12
-	bl	printf
-	ldr	r2, .L1064+16
-	ldr	r3, [r2]
+	mov	r7, r0
+	mov	r10, r2
+	mov	r8, r3
+	mov	fp, r1
+	movs	r6, #1
+	bl	NandcWaitFlashReady
+	ldr	r2, .L1062
+	mov	r4, #-1
+	add	r3, r2, r7, lsl #3
+	ldrb	r5, [r3, #4]	@ zero_extendqisi2
+	add	r3, r5, #8
+	ldr	r5, [r2, r7, lsl #3]
+	add	r5, r5, r3, lsl #8
+.L1050:
+	ldr	r3, .L1062+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
 	adds	r3, r3, #1
-	cmp	r3, #2048
-	bcs	.L1044
-	str	r3, [r2]
-	b	.L1039
-.L1044:
-	movs	r7, #0
-	str	r7, [r2]
-	str	r7, [sp, #4]
-.L1041:
-	mov	r10, #0
-	mov	r8, #-1
-	mov	r5, r10
-	mov	r4, r10
-	str	r10, [sp, #16]
+	cmp	r6, r3
+	bcc	.L1054
+.L1053:
+	movs	r1, #0
+	mov	r0, r5
+	bl	SamsungSetRRPara
+	ldr	r3, .L1062+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r4, r3, asr #2
+	bcc	.L1049
+	adds	r3, r4, #1
+	it	ne
+	movne	r4, #256
 .L1049:
-	uxtb	r0, fp
-	bl	NandcSetDdrPara
-	mov	r3, r7
-	ldr	r2, [sp, #4]
-	ldr	r1, [sp, #12]
-	ldr	r0, [sp, #8]
+	mov	r0, r4
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1054:
+	uxtb	r1, r6
+	mov	r0, r5
+	bl	SamsungSetRRPara
+	mov	r2, r10
+	mov	r3, r8
+	mov	r1, fp
+	mov	r0, r7
 	bl	FlashReadRawPage
-	adds	r3, r6, #1
-	cmp	r0, r3
-	bhi	.L1045
-	cmp	r0, #2
-	bhi	.L1055
-	adds	r4, r4, #1
-	cmp	r4, #9
-	bls	.L1055
-	mov	r3, r5
-	mov	r6, r0
-	sub	r5, fp, r4
-	mov	r8, #0
-.L1047:
-	ldr	r2, [sp, #16]
-	cmp	r4, r2
-	it	ls
-	movls	r5, r3
-.L1048:
-	cbz	r5, .L1050
-	mov	r1, r5
-	ldr	r0, .L1064+20
-	bl	printf
-	uxtb	r0, r5
-	bl	NandcSetDdrPara
-.L1050:
-	cmp	r8, #0
-	beq	.L1039
-	ldr	r2, [sp, #12]
-	ldr	r1, [sp, #8]
-	ldr	r0, .L1064+24
-	bl	printf
-	ldr	r3, [sp, #56]
-	cmp	r3, #0
+	adds	r2, r0, #1
 	beq	.L1051
-	ldr	r3, [sp, #20]
-	ubfx	r0, r3, #8, #8
-	bl	NandcSetDdrPara
-	b	.L1039
-.L1053:
-	mov	r6, #1024
-	b	.L1041
-.L1045:
-	ldr	r3, [sp, #16]
-	cmp	r4, r3
-	bls	.L1056
-	cmp	r4, #7
-	sub	r5, r10, r4
-	bhi	.L1048
-	str	r4, [sp, #16]
-.L1056:
-	movs	r4, #0
-	b	.L1046
-.L1055:
+	ldr	r3, .L1062+8
+	cmp	r4, #-1
+	it	eq
+	moveq	r4, r0
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r0, r3, asr #2
+	bcc	.L1057
 	mov	r8, #0
-	mov	r10, fp
-	mov	r6, r0
-	mov	r7, r8
-	str	r8, [sp, #4]
-.L1046:
-	add	fp, fp, #2
-	cmp	fp, #69
-	bls	.L1049
-	mov	r3, r5
-	mov	r5, r10
-	b	.L1047
-.L1065:
+	mov	r10, r8
+.L1051:
+	adds	r6, r6, #1
+	b	.L1050
+.L1057:
+	mov	r4, r0
+	b	.L1053
+.L1063:
 	.align	2
-.L1064:
-	.word	.LANCHOR19
-	.word	.LANCHOR32
-	.word	.LANCHOR24
-	.word	.LC8
-	.word	.LANCHOR148
-	.word	.LC9
-	.word	.LC10
-	.size	FlashDdrTunningRead, .-FlashDdrTunningRead
-	.section	.text.FlashReadPage,"ax",%progbits
+.L1062:
+	.word	.LANCHOR6
+	.word	.LANCHOR149
+	.word	.LANCHOR31
+	.size	SamsungReadRetrial, .-SamsungReadRetrial
+	.section	.text.MicronReadRetrial,"ax",%progbits
 	.align	1
-	.global	FlashReadPage
+	.global	MicronReadRetrial
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashReadPage, %function
-FlashReadPage:
-	@ args = 0, pretend = 0, frame = 0
+	.type	MicronReadRetrial, %function
+MicronReadRetrial:
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r7, r2
-	mov	r5, r0
-	mov	r6, r1
-	mov	r8, r3
-	bl	FlashReadRawPage
-	adds	r2, r0, #1
-	mov	r4, r0
-	bne	.L1067
-	ldr	r10, .L1085+20
-	ldrb	fp, [r10]	@ zero_extendqisi2
-	cmp	fp, #0
-	bne	.L1068
-.L1070:
-	ldr	r3, .L1085
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1067
-	ldr	r3, .L1085+4
-	mov	r1, r6
-	mov	r2, r7
-	mov	r0, r5
-	ldr	r3, [r3]
-	ldr	r10, [r3, #304]
-	movs	r3, #1
-	str	r3, [sp]
-	mov	r3, r8
-	bl	FlashDdrTunningRead
-	adds	r1, r0, #1
-	mov	r4, r0
-	beq	.L1071
-	ldr	r3, .L1085+8
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r10, r3
+	ldr	r3, .L1079
+	sub	sp, sp, #32
+	mov	r7, r0
+	mov	fp, r2
+	str	r1, [sp, #16]
+	ldrb	r4, [r3]	@ zero_extendqisi2
+	ldr	r3, .L1079+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r0, r3, lsr #1
-	bls	.L1067
-.L1071:
-	ubfx	r0, r10, #8, #8
-	bl	NandcSetDdrPara
-	b	.L1067
-.L1068:
-	movs	r3, #0
-	mov	r2, r7
-	strb	r3, [r10]
-	mov	r1, r6
-	mov	r3, r8
-	mov	r0, r5
-	bl	FlashReadRawPage
-	adds	r3, r0, #1
-	strb	fp, [r10]
-	beq	.L1070
-	mov	r4, r0
+	cmp	r3, #0
+	bne	.L1065
+	add	r4, r4, r4, lsl #1
+	asrs	r4, r4, #2
+.L1066:
+	mov	r0, r7
+	bl	NandcWaitFlashReady
+	ldr	r3, .L1079+8
+	movs	r6, #0
+	mov	r5, #-1
+	ldr	r2, [r3, r7, lsl #3]
+	add	r3, r3, r7, lsl #3
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+	str	r2, [sp, #8]
+	str	r3, [sp, #12]
+	lsls	r3, r3, #8
+	str	r3, [sp, #24]
 .L1067:
-	ldr	r10, .L1085+24
-	ldr	fp, [r10]
-	cmp	fp, #0
-	beq	.L1066
-	adds	r2, r4, #1
-	bne	.L1066
-	mov	r3, r8
-	mov	r2, r7
-	mov	r1, r6
-	mov	r0, r5
-	blx	fp
-	mov	r3, r6
-	mov	r4, r0
-	mov	r1, r0
-	mov	r2, r5
-	ldr	r0, .L1085+12
-	bl	printf
-	adds	r3, r4, #1
-	bne	.L1066
-	ldr	r3, .L1085+16
+	ldr	r3, .L1079+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1066
-	mov	r0, r5
-	bl	flash_enter_slc_mode
-	ldr	r4, [r10]
-	mov	r3, r8
-	mov	r2, r7
+	cmp	r6, r3
+	bcc	.L1071
+.L1070:
+	ldr	r3, [sp, #8]
+	movs	r0, #200
+	ldr	r2, [sp, #12]
+	add	r7, r3, r2, lsl #8
+	movs	r3, #239
+	str	r3, [r7, #2056]
+	movs	r3, #137
+	str	r3, [r7, #2052]
+	bl	udelay
+	cmp	r5, r4
+	mov	r3, #0
+	str	r3, [r7, #2048]
+	str	r3, [r7, #2048]
+	str	r3, [r7, #2048]
+	str	r3, [r7, #2048]
+	bcc	.L1064
+	adds	r3, r5, #1
+	ldr	r2, [sp, #16]
+	it	ne
+	movne	r5, #256
+	mov	r3, r6
+	str	r5, [sp]
 	mov	r1, r6
+	ldr	r0, .L1079+16
+	bl	printf
+.L1064:
 	mov	r0, r5
-	blx	r4
-	mov	r4, r0
-	mov	r0, r5
-	bl	flash_exit_slc_mode
-.L1066:
-	mov	r0, r4
-	add	sp, sp, #8
+	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1086:
+.L1065:
+	ldr	r3, .L1079+20
+	smull	r4, r5, r4, r3
+	mov	r4, r5
+	b	.L1066
+.L1071:
+	ldr	r2, [sp, #24]
+	movs	r0, #200
+	ldr	r3, [sp, #8]
+	mov	r8, #0
+	add	r3, r3, r2
+	movs	r2, #239
+	str	r2, [r3, #2056]
+	movs	r2, #137
+	str	r2, [r3, #2052]
+	str	r3, [sp, #28]
+	bl	udelay
+	adds	r3, r6, #1
+	ldr	r1, [sp, #16]
+	mov	r2, r3
+	str	r3, [sp, #20]
+	ldr	r3, [sp, #28]
+	mov	r0, r7
+	str	r2, [r3, #2048]
+	mov	r2, fp
+	str	r8, [r3, #2048]
+	str	r8, [r3, #2048]
+	str	r8, [r3, #2048]
+	mov	r3, r10
+	bl	FlashReadRawPage
+	adds	r2, r0, #1
+	beq	.L1068
+	cmp	r5, #-1
+	it	eq
+	moveq	r5, r0
+	cmp	r0, r4
+	bcc	.L1074
+	mov	r10, r8
+	mov	fp, r8
+.L1068:
+	ldr	r6, [sp, #20]
+	b	.L1067
+.L1074:
+	mov	r5, r0
+	b	.L1070
+.L1080:
 	.align	2
-.L1085:
-	.word	.LANCHOR28
-	.word	.LANCHOR19
+.L1079:
 	.word	.LANCHOR31
-	.word	.LC11
 	.word	.LANCHOR8
-	.word	.LANCHOR5
+	.word	.LANCHOR6
 	.word	.LANCHOR149
-	.size	FlashReadPage, .-FlashReadPage
-	.section	.text.FlashDdrParaScan,"ax",%progbits
+	.word	.LC11
+	.word	1431655766
+	.size	MicronReadRetrial, .-MicronReadRetrial
+	.section	.text.HynixReadRetrial,"ax",%progbits
 	.align	1
-	.global	FlashDdrParaScan
+	.global	HynixReadRetrial
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashDdrParaScan, %function
-FlashDdrParaScan:
-	@ args = 0, pretend = 0, frame = 0
+	.type	HynixReadRetrial, %function
+HynixReadRetrial:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	mov	r6, r0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	fp, r2
 	ldr	r4, .L1098
-	movs	r5, #0
-	mov	r7, r1
-	ldrb	r0, [r4]	@ zero_extendqisi2
-	bl	FlashSetInterfaceMode
-	ldrb	r0, [r4]	@ zero_extendqisi2
-	bl	NandcSetMode
-	mov	r3, r5
-	mov	r2, r5
-	str	r5, [sp]
-	mov	r1, r7
-	mov	r0, r6
-	bl	FlashDdrTunningRead
-	mov	r3, r5
-	mov	r2, r5
-	mov	r8, r0
-	mov	r1, r7
+	mov	r8, #0
+	mov	r6, #-1
+	mov	r10, r3
+	mov	r7, r0
+	str	r1, [sp, #4]
+	ldrb	r2, [r4, #2]	@ zero_extendqisi2
+	adds	r3, r4, r0
+	ldrb	r5, [r3, #12]	@ zero_extendqisi2
+	str	r2, [sp]
+	ldr	r2, .L1098+4
+	ldr	r2, [r2]
+	ldrb	r2, [r2, #19]	@ zero_extendqisi2
+	cmp	r2, #7
+	it	eq
+	ldrbeq	r5, [r3, #20]	@ zero_extendqisi2
+	bl	NandcWaitFlashReady
+.L1083:
+	ldr	r3, [sp]
+	cmp	r8, r3
+	bcc	.L1088
+.L1087:
+	ldr	r3, .L1098+4
+	add	r4, r4, r7
+	ldr	r3, [r3]
+	ldrb	r3, [r3, #19]	@ zero_extendqisi2
+	cmp	r3, #7
+	ldr	r3, .L1098+8
+	ite	eq
+	strbeq	r5, [r4, #20]
+	strbne	r5, [r4, #12]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r6, r3, asr #2
+	bcc	.L1081
+	adds	r3, r6, #1
+	it	ne
+	movne	r6, #256
+.L1081:
 	mov	r0, r6
-	ldr	r5, .L1098+4
-	bl	FlashReadRawPage
-	adds	r0, r0, #1
-	beq	.L1088
-	cmp	r8, #-1
-	bne	.L1089
-.L1088:
-	ldrb	r3, [r4]	@ zero_extendqisi2
-	lsls	r3, r3, #31
-	bpl	.L1089
-	movs	r0, #1
-	bl	FlashSetInterfaceMode
-	movs	r0, #1
-	bl	NandcSetMode
-	movs	r3, #0
-.L1097:
-	movs	r0, #0
-	strb	r3, [r5]
 	add	sp, sp, #8
 	@ sp needed
-	pop	{r4, r5, r6, r7, r8, pc}
-.L1089:
-	movs	r3, #1
-	b	.L1097
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1088:
+	ldr	r3, [sp]
+	adds	r5, r5, #1
+	uxtb	r5, r5
+	ldr	r2, .L1098+12
+	ldrb	r1, [r4, #1]	@ zero_extendqisi2
+	mov	r0, r7
+	cmp	r3, r5
+	it	ls
+	movls	r5, #0
+	mov	r3, r5
+	bl	HynixSetRRPara
+	mov	r2, fp
+	mov	r3, r10
+	ldr	r1, [sp, #4]
+	mov	r0, r7
+	bl	FlashReadRawPage
+	adds	r2, r0, #1
+	beq	.L1085
+	ldr	r3, .L1098+8
+	cmp	r6, #-1
+	it	eq
+	moveq	r6, r0
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r0, r3, asr #2
+	bcc	.L1092
+	mov	r10, #0
+	mov	fp, r10
+.L1085:
+	add	r8, r8, #1
+	b	.L1083
+.L1092:
+	mov	r6, r0
+	b	.L1087
 .L1099:
 	.align	2
 .L1098:
-	.word	.LANCHOR24
-	.word	.LANCHOR28
-	.size	FlashDdrParaScan, .-FlashDdrParaScan
+	.word	.LANCHOR20
+	.word	.LANCHOR18
+	.word	.LANCHOR31
+	.word	.LANCHOR20+4
+	.size	HynixReadRetrial, .-HynixReadRetrial
 	.section	.text.FlashProgPage,"ax",%progbits
 	.align	1
 	.global	FlashProgPage
@@ -7922,8 +7920,8 @@ FlashSavePhyInfo:
 .L1115:
 	.align	2
 .L1114:
-	.word	.LANCHOR143
-	.word	.LANCHOR142
+	.word	.LANCHOR145
+	.word	.LANCHOR144
 	.word	.LANCHOR150
 	.word	.LANCHOR25
 	.word	.LANCHOR22
@@ -7935,8 +7933,8 @@ FlashSavePhyInfo:
 	.word	.LANCHOR7
 	.word	.LANCHOR20
 	.word	.LANCHOR151
-	.word	.LANCHOR145
-	.word	.LANCHOR144
+	.word	.LANCHOR147
+	.word	.LANCHOR146
 	.word	1312902724
 	.word	.LANCHOR3
 	.size	FlashSavePhyInfo, .-FlashSavePhyInfo
@@ -8059,10 +8057,10 @@ FlashReadIdbDataRaw:
 	.word	.LANCHOR31
 	.word	1446522928
 	.word	.LANCHOR2
-	.word	.LANCHOR143
+	.word	.LANCHOR145
 	.word	-52655045
 	.word	.LC12
-	.word	.LANCHOR145
+	.word	.LANCHOR147
 	.word	.LANCHOR3
 	.size	FlashReadIdbDataRaw, .-FlashReadIdbDataRaw
 	.section	.text.FlashPageProgMsbFFData,"ax",%progbits
@@ -9201,7 +9199,7 @@ HynixGetReadRetryDefault:
 	.word	.LANCHOR25
 	.word	.LANCHOR26
 	.word	.LANCHOR6
-	.word	.LANCHOR143
+	.word	.LANCHOR145
 	.word	.LC16
 .L1206:
 	cmp	r1, #6
@@ -9385,7 +9383,7 @@ HynixGetReadRetryDefault:
 .L1281:
 	.align	2
 .L1280:
-	.word	.LANCHOR143
+	.word	.LANCHOR145
 	.word	.LC17
 	.word	.LC16
 	.word	.LANCHOR20
@@ -9794,18 +9792,18 @@ FlashInit:
 .L1401:
 	.align	2
 .L1399:
-	.word	.LANCHOR143
+	.word	.LANCHOR145
 	.word	.LANCHOR151
 	.word	.LANCHOR150
 	.word	.LANCHOR28
 	.word	.LANCHOR194
 	.word	.LANCHOR195
 	.word	.LANCHOR196
-	.word	.LANCHOR146
-	.word	.LANCHOR145
+	.word	.LANCHOR148
+	.word	.LANCHOR147
 	.word	.LANCHOR22
 	.word	.LANCHOR3
-	.word	.LANCHOR148
+	.word	.LANCHOR142
 	.word	.LC18
 	.word	.LANCHOR153
 	.word	.LANCHOR20
@@ -9820,13 +9818,13 @@ FlashInit:
 	.word	.LC19
 	.word	.LANCHOR119
 	.word	.LANCHOR24
-	.word	.LANCHOR144
+	.word	.LANCHOR146
 	.word	.LANCHOR198
-	.word	.LANCHOR149
+	.word	.LANCHOR143
 	.word	.LANCHOR27
 	.word	.LANCHOR10
 	.word	.LANCHOR13
-	.word	.LANCHOR147
+	.word	.LANCHOR149
 	.word	.LANCHOR2
 	.word	.LANCHOR1
 	.word	.LANCHOR6
@@ -10037,13 +10035,13 @@ FlashInit:
 	.word	.LANCHOR34
 	.word	.LANCHOR152
 	.word	1446522928
-	.word	.LANCHOR144
+	.word	.LANCHOR146
 	.word	.LANCHOR139
 	.word	.LANCHOR15
 	.word	.LANCHOR25
 	.word	MicronReadRetrial
 	.word	ToshibaReadRetrial
-	.word	.LANCHOR147
+	.word	.LANCHOR149
 	.word	SamsungReadRetrial
 	.size	FlashInit, .-FlashInit
 	.section	.text.FlashReadSlc2KPages,"ax",%progbits
@@ -10452,7 +10450,7 @@ FlashReadPages:
 	.word	.LANCHOR8
 	.word	.LANCHOR3
 	.word	.LANCHOR28
-	.word	.LANCHOR149
+	.word	.LANCHOR143
 	.word	.LANCHOR19
 	.word	.LANCHOR31
 .L1456:
@@ -10590,7 +10588,7 @@ FlashReadPages:
 	.word	.LANCHOR31
 	.word	.LC23
 	.word	.LANCHOR8
-	.word	.LANCHOR149
+	.word	.LANCHOR143
 	.word	.LC20
 	.word	.LC22
 	.size	FlashReadPages, .-FlashReadPages
@@ -11186,7 +11184,7 @@ FlashTestBlk:
 .L1619:
 	.align	2
 .L1618:
-	.word	.LANCHOR145
+	.word	.LANCHOR147
 	.word	.LANCHOR151
 	.size	FlashTestBlk, .-FlashTestBlk
 	.section	.text.FtlLowFormatEraseBlock,"ax",%progbits
@@ -11672,7 +11670,7 @@ allocate_data_superblock:
 	cmp	r3, r2
 	ble	.L1683
 	ldr	r1, .L1743+16
-	movw	r2, #2818
+	movw	r2, #2822
 	ldr	r0, .L1743+20
 	bl	printf
 	ldr	r1, .L1743+24
@@ -11742,7 +11740,7 @@ allocate_data_superblock:
 	uxth	r8, r0
 	cbnz	r3, .L1687
 	ldr	r1, .L1743+16
-	movw	r2, #2838
+	movw	r2, #2842
 	ldr	r0, .L1743+20
 	bl	printf
 	ldr	r1, .L1743+24
@@ -11769,7 +11767,7 @@ allocate_data_superblock:
 	ldrh	r2, [r2]
 	cmp	r3, r2
 	ble	.L1681
-	movw	r2, #2850
+	movw	r2, #2854
 	ldr	r1, .L1743+16
 	ldr	r0, .L1743+20
 	bl	printf
@@ -11789,7 +11787,7 @@ allocate_data_superblock:
 	cmp	r3, r2
 	ble	.L1690
 	ldr	r1, .L1743+16
-	movw	r2, #2853
+	movw	r2, #2857
 	ldr	r0, .L1743+20
 	bl	printf
 	ldr	r1, .L1743+24
@@ -11815,7 +11813,7 @@ allocate_data_superblock:
 	bne	.L1693
 	cbnz	r6, .L1694
 	ldr	r1, .L1743+16
-	movw	r2, #2865
+	movw	r2, #2869
 	ldr	r0, .L1743+20
 	bl	printf
 	ldr	r1, .L1743+24
@@ -11842,7 +11840,7 @@ allocate_data_superblock:
 	cmp	r3, r8
 	bne	.L1696
 	ldr	r1, .L1743+16
-	movw	r2, #2872
+	movw	r2, #2876
 	ldr	r0, .L1743+20
 	bl	printf
 	ldr	r1, .L1743+24
@@ -12061,7 +12059,7 @@ allocate_data_superblock:
 	cbnz	r3, .L1682
 .L1711:
 	ldr	r1, .L1745+12
-	movw	r2, #2931
+	movw	r2, #2935
 	ldr	r0, .L1745+16
 	bl	printf
 	ldr	r1, .L1745+20
@@ -12194,7 +12192,7 @@ update_vpc_list:
 	ldrh	r3, [r5]
 	cbnz	r3, .L1766
 	ldr	r1, .L1771+16
-	movw	r2, #3042
+	movw	r2, #3046
 	ldr	r0, .L1771+20
 	bl	printf
 	ldr	r1, .L1771+24
@@ -12217,7 +12215,7 @@ update_vpc_list:
 	cmp	r3, r2
 	ble	.L1770
 	ldr	r1, .L1771+16
-	movw	r2, #3045
+	movw	r2, #3049
 	ldr	r0, .L1771+20
 	bl	printf
 	ldr	r1, .L1771+24
@@ -12295,7 +12293,7 @@ decrement_vpc_count:
 	mov	r0, r5
 	pop	{r4, r5, r6, pc}
 .L1776:
-	movw	r2, #3060
+	movw	r2, #3064
 .L1781:
 	ldr	r1, .L1782+8
 	ldr	r0, .L1782+12
@@ -12339,7 +12337,7 @@ decrement_vpc_count:
 	bne	.L1773
 	cmp	r4, r1
 	beq	.L1773
-	movw	r2, #3082
+	movw	r2, #3086
 	b	.L1781
 .L1783:
 	.align	2
@@ -12477,7 +12475,7 @@ get_new_active_ppa:
 	cmp	r2, r3
 	bne	.L1798
 	ldr	r1, .L1819
-	movw	r2, #2982
+	movw	r2, #2986
 	ldr	r0, .L1819+4
 	bl	printf
 	ldr	r1, .L1819+8
@@ -12490,7 +12488,7 @@ get_new_active_ppa:
 	cmp	r2, r3
 	bne	.L1799
 	ldr	r1, .L1819
-	movw	r2, #2983
+	movw	r2, #2987
 	ldr	r0, .L1819+4
 	bl	printf
 	ldr	r1, .L1819+8
@@ -12500,7 +12498,7 @@ get_new_active_ppa:
 	ldrh	r3, [r4, #4]
 	cbnz	r3, .L1800
 	ldr	r1, .L1819
-	movw	r2, #2984
+	movw	r2, #2988
 	ldr	r0, .L1819+4
 	bl	printf
 	ldr	r1, .L1819+8
@@ -12617,7 +12615,7 @@ get_new_active_ppa:
 	ldrh	r3, [r4, #4]
 	cbz	r3, .L1797
 	ldr	r1, .L1819
-	movw	r2, #3028
+	movw	r2, #3032
 	ldr	r0, .L1819+4
 	bl	printf
 	ldr	r1, .L1819+8
@@ -13243,7 +13241,7 @@ FtlLoadBbt:
 	cmp	r7, #0
 	bge	.L1899
 	ldr	r1, .L1915+16
-	mov	r2, #336
+	movw	r2, #335
 	ldr	r0, .L1915+20
 	bl	printf
 	ldr	r1, .L1915+24
@@ -14127,7 +14125,7 @@ FtlReUsePrevPpa:
 	ldrh	r3, [r8]
 	cbnz	r3, .L2014
 	ldr	r1, .L2019+16
-	movw	r2, #1823
+	movw	r2, #1825
 	ldr	r0, .L2019+20
 	bl	printf
 	ldr	r1, .L2019+24
@@ -14461,7 +14459,7 @@ allocate_new_data_superblock:
 	cmp	r3, r5
 	bcs	.L2049
 	ldr	r1, .L2075+4
-	movw	r2, #2939
+	movw	r2, #2943
 	ldr	r0, .L2075+8
 	bl	printf
 	ldr	r1, .L2075+12
@@ -14655,7 +14653,7 @@ FtlProgPages:
 	cmp	r2, r3
 	bcc	.L2083
 	ldr	r1, .L2096+12
-	movw	r2, #1550
+	mov	r2, #1552
 	ldr	r0, .L2096+16
 	bl	printf
 	ldr	r1, .L2096+20
@@ -14702,7 +14700,7 @@ FtlProgPages:
 	cmp	r2, r3
 	bcc	.L2077
 	ldr	r1, .L2096+12
-	movw	r2, #1567
+	movw	r2, #1569
 	ldr	r0, .L2096+16
 	bl	printf
 	ldr	r1, .L2096+20
@@ -16202,12 +16200,12 @@ FtlMapTblRecovery:
 	movs	r1, #0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #32
-	ldrh	fp, [r0, #6]
-	mov	r7, r0
+	ldrh	r7, [r0, #6]
+	mov	fp, r0
 	movs	r4, #0
 	str	r3, [sp, #12]
 	ldr	r3, [r0, #12]
-	lsl	r2, fp, #2
+	lsls	r2, r7, #2
 	str	r3, [sp, #8]
 	ldr	r3, [r0, #16]
 	str	r3, [sp, #20]
@@ -16217,20 +16215,20 @@ FtlMapTblRecovery:
 	bl	ftl_memset
 	ldr	r2, .L2322
 	ldr	r3, .L2322+4
-	str	r4, [r7, #32]
+	str	r4, [fp, #32]
 	ldr	r1, [r2]
 	mov	r10, r2
 	mov	r8, r3
-	str	r4, [r7, #28]
+	str	r4, [fp, #28]
 	str	r1, [r3, #8]
 	ldr	r1, .L2322+8
 	ldr	r5, [r1]
 	movw	r1, #65535
 	str	r5, [r3, #12]
-	strh	r1, [r7]	@ movhi
-	strh	r1, [r7, #2]	@ movhi
+	strh	r1, [fp]	@ movhi
+	strh	r1, [fp, #2]	@ movhi
 	movs	r1, #1
-	str	r1, [r7, #36]
+	str	r1, [fp, #36]
 .L2283:
 	ldr	r2, [sp, #16]
 	sxth	r3, r4
@@ -16250,47 +16248,46 @@ FtlMapTblRecovery:
 	bl	FtlGetLastWrittenPage
 	ldr	r3, [sp, #20]
 	sxth	r8, r0
-	strh	r4, [r7]	@ movhi
+	strh	r4, [fp]	@ movhi
 	movs	r4, #0
 	adds	r0, r0, #1
 	mov	r2, r3
 	ldr	r3, [sp, #16]
-	strh	r0, [r7, #2]	@ movhi
+	strh	r0, [fp, #2]	@ movhi
 	ldr	r3, [r2, r3, lsl #2]
-	str	r3, [r7, #28]
+	str	r3, [fp, #28]
 .L2285:
 	sxth	r3, r4
 	cmp	r3, r8
 	ble	.L2288
 .L2301:
 	ldr	r3, .L2322+12
-	cmp	r7, r3
+	cmp	fp, r3
 	str	r3, [sp, #12]
 	bne	.L2290
 	ldr	r3, .L2322+16
 	ldrh	r3, [r3]
 	cbz	r3, .L2290
-	ldr	fp, .L2322+40
-	movs	r4, #0
+	movs	r5, #0
 .L2304:
 	ldr	r3, .L2322+20
 	ldrh	r3, [r3]
-	cmp	r4, r3
-	bcc	.L2311
+	cmp	r5, r3
+	bcc	.L2310
 .L2290:
-	mov	r0, r7
+	mov	r0, fp
 	bl	ftl_free_no_use_map_blk
 	ldr	r3, .L2322+24
-	ldrh	r2, [r7, #2]
+	ldrh	r2, [fp, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
 	bne	.L2303
-	mov	r0, r7
+	mov	r0, fp
 	bl	ftl_map_blk_alloc_new_blk
 .L2303:
-	mov	r0, r7
+	mov	r0, fp
 	bl	ftl_map_blk_gc
-	mov	r0, r7
+	mov	r0, fp
 	bl	ftl_map_blk_gc
 	movs	r0, #0
 	add	sp, sp, #32
@@ -16308,10 +16305,10 @@ FtlMapTblRecovery:
 	adds	r3, r3, #1
 	beq	.L2286
 	ldrh	r3, [r5, #8]
-	cmp	fp, r3
+	cmp	r7, r3
 	bls	.L2287
 	ldrh	r1, [r5]
-	ldrh	r2, [r7, #4]
+	ldrh	r2, [fp, #4]
 	cmp	r1, r2
 	bne	.L2287
 	ldr	r2, [r10, #4]
@@ -16322,7 +16319,7 @@ FtlMapTblRecovery:
 	b	.L2285
 .L2286:
 	ldrh	r3, [r6]
-	strh	r3, [r7, #40]	@ movhi
+	strh	r3, [fp, #40]	@ movhi
 	b	.L2287
 .L2284:
 	ldr	r2, [r10]
@@ -16343,16 +16340,16 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	r3, [r8]
 	adds	r3, r3, #1
-	beq	.L2313
+	beq	.L2312
 	ldrh	r2, [r5]
-	ldrh	r3, [r7, #4]
+	ldrh	r3, [fp, #4]
 	cmp	r2, r3
-	bne	.L2313
+	bne	.L2312
 	ldrh	r2, [r5, #8]
 	movw	r3, #64245
 	cmp	r2, r3
 	beq	.L2292
-.L2313:
+.L2312:
 	ldr	r3, .L2322+24
 	movs	r6, #0
 .L2293:
@@ -16374,10 +16371,10 @@ FtlMapTblRecovery:
 	adds	r2, r2, #1
 	beq	.L2297
 	ldrh	r2, [r5, #8]
-	cmp	fp, r2
+	cmp	r7, r2
 	bls	.L2297
 	ldrh	r0, [r5]
-	ldrh	r1, [r7, #4]
+	ldrh	r1, [fp, #4]
 	cmp	r0, r1
 	ittt	eq
 	ldreq	r1, [r8, #4]
@@ -16403,104 +16400,100 @@ FtlMapTblRecovery:
 	ldr	r3, [r6, r3, lsl #3]
 	adds	r1, r1, #1
 	uxth	ip, r3
-	cmp	fp, ip
+	cmp	r7, ip
 	itttt	hi
 	addhi	r0, r0, r6
 	ldrhi	r3, [sp, #12]
 	ldrhi	r0, [r0, #4]
 	strhi	r0, [r3, ip, lsl #2]
 	b	.L2294
-.L2311:
-	ldr	r3, [fp]
-	lsls	r5, r4, #2
-	ldr	r2, [r3, r4, lsl #2]
-	subs	r3, r2, #1
-	adds	r3, r3, #3
+.L2310:
+	ldr	r10, .L2322+44
+	lsls	r6, r5, #2
+	ldr	r3, [r10]
+	ldr	r3, [r3, r5, lsl #2]
+	subs	r2, r3, #1
+	adds	r2, r2, #3
 	bhi	.L2306
-	ldr	r8, .L2322+44
-	ldr	r3, [r8]
-	ldr	r3, [r3, r4, lsl #2]
-	cmp	r2, r3
+	ldr	r7, .L2322+28
+	ldr	r2, [r7]
+	ldr	r2, [r2, r5, lsl #2]
+	cmp	r3, r2
 	beq	.L2306
-	ldr	r3, .L2322
-	ldr	r6, .L2322+4
-	ldr	r3, [r3]
-	str	r2, [r6, #4]
+	ldr	r2, .L2322
+	ldr	r4, .L2322+4
+	ldr	r2, [r2]
+	mov	r0, r4
+	str	r3, [r4, #4]
+	str	r2, [r4, #8]
+	ldr	r2, .L2322+8
+	ldr	r8, [r2]
 	movs	r2, #1
 	mov	r1, r2
-	mov	r0, r6
-	str	r3, [r6, #8]
-	ldr	r3, .L2322+8
-	ldr	r3, [r3]
-	str	r3, [r6, #12]
-	str	r3, [sp, #16]
+	str	r8, [r4, #12]
 	bl	FlashReadPages
-	ldr	r2, [r6]
-	ldr	r3, [sp, #16]
-	adds	r2, r2, #1
-	beq	.L2315
-	ldr	r2, [sp, #12]
-	ldrh	r1, [r3]
-	ldrh	r2, [r2, #4]
-	cmp	r1, r2
-	bne	.L2315
-	ldr	r10, [r3, #4]
-.L2308:
-	ldr	r2, [r8]
-	ldr	r0, .L2322+4
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	beq	.L2306
+	ldr	r3, [sp, #12]
+	ldrh	r2, [r8]
+	ldrh	r3, [r3, #4]
+	cmp	r2, r3
+	bne	.L2306
+	ldr	r2, [r7]
+	mov	r0, r4
+	ldr	r3, [r8, #4]
+	ldr	r2, [r2, r6]
 	str	r3, [sp, #16]
-	ldr	r2, [r2, r5]
-	str	r2, [r6, #4]
+	str	r2, [r4, #4]
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
+	ldr	r2, [r8, #4]
 	ldr	r3, [sp, #16]
-	ldr	r3, [r3, #4]
-	cmp	r10, r3
+	cmp	r3, r2
 	bls	.L2306
-	ldr	r2, [r8]
-	ldr	r1, [fp]
-	ldr	r0, .L2322+28
-	str	r3, [sp]
-	mov	r3, r10
-	ldr	r2, [r2, r5]
-	ldr	r1, [r1, r5]
+	ldr	r0, [r7]
+	ldr	r1, [r10]
+	str	r2, [sp]
+	ldr	r2, [r0, r6]
+	ldr	r1, [r1, r6]
+	ldr	r0, .L2322+32
 	bl	printf
-	ldr	r3, [fp]
-	ldr	r2, [r8]
-	ldr	r1, [r3, r5]
-	str	r1, [r2, r5]
-	movs	r1, #0
-	ldr	r0, [r3, r5]
-	ldr	r3, .L2322+32
+	ldr	r3, [r10]
+	ldr	r2, [r7]
+	ldr	r1, [r3, r6]
+	str	r1, [r2, r6]
+	movs	r2, #0
+	ldr	r0, [r3, r6]
+	ldr	r3, .L2322+36
 	ubfx	r0, r0, #10, #16
-	ldrh	r2, [r3]
-.L2309:
-	sxth	r5, r1
-	cmp	r5, r2
-	blt	.L2310
-	ldr	r1, .L2322+36
-	ldr	r1, [r1]
-	cmp	r2, r1
+	ldrh	r3, [r3]
+.L2308:
+	sxth	r1, r2
+	cmp	r1, r3
+	blt	.L2309
+	ldr	r2, .L2322+40
+	ldr	r2, [r2]
+	cmp	r3, r2
 	bcs	.L2306
-	ldr	r1, [sp, #8]
-	strh	r0, [r1, r2, lsl #1]	@ movhi
-	ldrh	r2, [r3]
-	adds	r2, r2, #1
-	strh	r2, [r3]	@ movhi
+	ldr	r2, [sp, #8]
+	strh	r0, [r2, r3, lsl #1]	@ movhi
+	ldr	r3, .L2322+36
+	ldr	r2, .L2322+36
+	ldrh	r3, [r3]
+	adds	r3, r3, #1
+	strh	r3, [r2]	@ movhi
 	bl	remove_from_free_sys_Queue
 	b	.L2306
-.L2315:
-	mov	r10, #0
-	b	.L2308
-.L2310:
-	ldr	r6, [sp, #8]
-	adds	r1, r1, #1
-	ldrh	r5, [r6, r5, lsl #1]
-	cmp	r5, r0
-	bne	.L2309
+.L2309:
+	ldr	r4, [sp, #8]
+	adds	r2, r2, #1
+	ldrh	r1, [r4, r1, lsl #1]
+	cmp	r1, r0
+	bne	.L2308
 .L2306:
-	adds	r4, r4, #1
+	adds	r5, r5, #1
 	b	.L2304
 .L2323:
 	.align	2
@@ -16512,11 +16505,11 @@ FtlMapTblRecovery:
 	.word	.LANCHOR68
 	.word	.LANCHOR65
 	.word	.LANCHOR52
+	.word	.LANCHOR128
 	.word	.LC42
 	.word	.LANCHOR125
 	.word	.LANCHOR63
 	.word	.LANCHOR192
-	.word	.LANCHOR128
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
 	.section	.text.FtlLoadVonderInfo,"ax",%progbits
 	.align	1
@@ -16757,7 +16750,7 @@ FtlRecoverySuperblock:
 	ldr	r3, [sp, #12]
 	cbz	r3, .L2340
 	ldr	r1, .L2500+32
-	movw	r2, #1894
+	mov	r2, #1896
 	ldr	r0, .L2500+36
 	bl	printf
 	ldr	r1, .L2500+40
@@ -16769,7 +16762,7 @@ FtlRecoverySuperblock:
 	cmp	r5, r3
 	beq	.L2341
 	ldr	r1, .L2500+32
-	movw	r2, #1895
+	movw	r2, #1897
 	ldr	r0, .L2500+36
 	bl	printf
 	ldr	r1, .L2500+40
@@ -17227,7 +17220,7 @@ FtlRecoverySuperblock:
 	cmp	r3, r0
 	bhi	.L2405
 	ldr	r1, .L2502+48
-	movw	r2, #2177
+	movw	r2, #2179
 	ldr	r0, .L2502+52
 	bl	printf
 	ldr	r1, .L2502+56
@@ -19401,7 +19394,7 @@ ftl_write:
 	cmp	r2, r3
 	bcc	.L2774
 	ldr	r1, .L2823+32
-	movw	r2, #1630
+	mov	r2, #1632
 	ldr	r0, .L2823+36
 	bl	printf
 	ldr	r1, .L2823+40
@@ -19430,7 +19423,7 @@ ftl_write:
 	cmp	r2, r3
 	bcc	.L2776
 	ldr	r1, .L2823+32
-	movw	r2, #1663
+	movw	r2, #1665
 	ldr	r0, .L2823+36
 	bl	printf
 	ldr	r1, .L2823+40
@@ -19585,7 +19578,7 @@ ftl_write:
 	cmp	r2, r3
 	bcc	.L2795
 	ldr	r1, .L2823+32
-	movw	r2, #1737
+	movw	r2, #1739
 	ldr	r0, .L2823+36
 	bl	printf
 	ldr	r1, .L2823+40
@@ -19707,7 +19700,7 @@ ftl_write:
 	ldr	r3, [fp, #8]
 	cmp	r4, r3
 	beq	.L2792
-	movw	r2, #1716
+	movw	r2, #1718
 	ldr	r1, .L2825+28
 	ldr	r0, .L2825+32
 	bl	printf
@@ -19756,7 +19749,7 @@ ftl_write:
 	cmp	r3, r8
 	bcs	.L2800
 	ldr	r1, .L2825+28
-	mov	r2, #1752
+	movw	r2, #1754
 	ldr	r0, .L2825+32
 	bl	printf
 	ldr	r1, .L2825+36
@@ -19890,10 +19883,10 @@ FlashReadFacBbtData:
 	.align	2
 .L2840:
 	.word	.LANCHOR15
-	.word	.LANCHOR143
+	.word	.LANCHOR145
 	.word	.LANCHOR194
 	.word	.LC55
-	.word	.LANCHOR145
+	.word	.LANCHOR147
 	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
 	.section	.text.FlashGetBadBlockList,"ax",%progbits
 	.align	1
@@ -20181,14 +20174,21 @@ FtlLowFormat:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
 	ldr	r3, .L2907
+	movs	r1, #0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #24
+	ldrh	r2, [r3]
+	ldr	r3, .L2907+4
+	lsls	r2, r2, #2
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldr	r3, .L2907+8
 	ldr	r3, [r3]
 	cmp	r3, #0
 	bne	.L2878
-	ldr	r6, .L2907+4
-	ldr	r2, .L2907+8
-	ldr	r5, .L2907+12
+	ldr	r6, .L2907+12
+	ldr	r2, .L2907+16
+	ldr	r5, .L2907+20
 	ldrh	r0, [r6]
 	str	r3, [r2]
 	str	r3, [r5]
@@ -20197,12 +20197,12 @@ FtlLowFormat:
 	cbz	r0, .L2879
 	bl	FtlMakeBbt
 .L2879:
-	ldr	r3, .L2907+16
-	ldr	r2, .L2907+20
-	ldr	ip, .L2907+112
+	ldr	r3, .L2907+24
+	ldr	r2, .L2907+28
+	ldr	ip, .L2907+108
 	ldrh	r1, [r3]
 	ldr	r4, [r2]
-	ldr	r2, .L2907+24
+	ldr	r2, .L2907+32
 	str	r3, [sp, #12]
 	lsls	r1, r1, #7
 	ldr	r7, [r2]
@@ -20212,9 +20212,9 @@ FtlLowFormat:
 	adds	r2, r2, #1
 	cmp	r3, r1
 	blt	.L2881
-	ldr	r3, .L2907+28
+	ldr	r3, .L2907+36
 	movs	r7, #0
-	ldr	fp, .L2907+116
+	ldr	fp, .L2907+112
 	ldrh	r4, [r3]
 	mov	r8, r3
 	mov	r10, fp
@@ -20222,7 +20222,7 @@ FtlLowFormat:
 	ldrh	r3, [fp]
 	cmp	r3, r4
 	bhi	.L2883
-	ldr	r4, .L2907+32
+	ldr	r4, .L2907+40
 	subs	r3, r7, #2
 	ldrh	r1, [r4]
 	cmp	r3, r1, lsl #1
@@ -20237,17 +20237,17 @@ FtlLowFormat:
 	cmp	r3, r0
 	bhi	.L2889
 	ldrh	r2, [r10]
-	ldr	r3, .L2907+36
+	ldr	r3, .L2907+44
 	ldrh	r4, [r4]
-	ldr	r7, .L2907+40
+	ldr	r7, .L2907+48
 	str	r2, [r3]
-	ldr	r3, .L2907+44
+	ldr	r3, .L2907+52
 	mov	r1, r4
 	ldr	r3, [r3]
 	mov	r0, r3
 	str	r3, [sp, #16]
 	bl	__aeabi_uidiv
-	ldr	r1, .L2907+48
+	ldr	r1, .L2907+56
 	ubfx	r3, r0, #5, #16
 	add	r2, r3, #36
 	mov	fp, r0
@@ -20269,11 +20269,11 @@ FtlLowFormat:
 	adds	r0, r0, #24
 	strh	r0, [r3]	@ movhi
 .L2890:
-	ldr	r3, .L2907+52
+	ldr	r3, .L2907+60
 	ldr	r3, [r3]
 	cmp	r3, #1
 	bne	.L2891
-	ldr	r2, .L2907+48
+	ldr	r2, .L2907+56
 	mov	r1, r4
 	mov	r0, r6
 	ldrh	r3, [r2]
@@ -20286,10 +20286,10 @@ FtlLowFormat:
 	add	r3, r3, r0, asr #2
 	strh	r3, [r2]	@ movhi
 .L2891:
-	ldr	r3, .L2907+56
+	ldr	r3, .L2907+64
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cbz	r3, .L2892
-	ldr	r2, .L2907+48
+	ldr	r2, .L2907+56
 	mov	r1, r4
 	mov	r0, r6
 	ldrh	r3, [r2]
@@ -20302,10 +20302,10 @@ FtlLowFormat:
 	add	r3, r3, r0, asr #2
 	strh	r3, [r2]	@ movhi
 .L2892:
-	ldr	r3, .L2907+60
+	ldr	r3, .L2907+68
 	ldrh	r3, [r3]
 	cbz	r3, .L2894
-	ldr	r2, .L2907+48
+	ldr	r2, .L2907+56
 	ldrh	r1, [r2]
 	add	r1, r1, r3, lsr #1
 	strh	r1, [r2]	@ movhi
@@ -20319,37 +20319,37 @@ FtlLowFormat:
 	strh	r1, [r2]	@ movhi
 .L2894:
 	ldr	r3, [sp, #8]
-	ldr	r6, .L2907+64
+	ldr	r6, .L2907+72
 	ldrh	r2, [r3]
 	ldr	r3, [r7]
 	subs	r3, r3, r2
 	muls	r4, r3, r4
-	ldr	r3, .L2907+68
+	ldr	r3, .L2907+76
 	ldrh	r3, [r3]
 	str	r4, [r6]
 	muls	r4, r3, r4
 	ldr	r3, [sp, #12]
 	ldrh	r3, [r3]
 	str	r4, [r7]
-	ldr	r7, .L2907+72
+	ldr	r7, .L2907+80
 	muls	r4, r3, r4
-	ldr	r3, .L2907+76
+	ldr	r3, .L2907+84
 	str	r4, [r3]
 	movw	r4, #65535
 	bl	FtlBbmTblFlush
 	ldrh	r2, [r10]
 	movs	r1, #0
-	ldr	r10, .L2907+120
+	ldr	r10, .L2907+116
 	lsls	r2, r2, #1
 	ldr	r0, [r10]
 	bl	ftl_memset
-	ldr	r2, .L2907+80
+	ldr	r2, .L2907+88
 	movs	r3, #0
 	strh	r3, [r7, #2]	@ movhi
 	movs	r1, #255
 	strb	r3, [r7, #6]
 	str	r3, [r2]
-	ldr	r2, .L2907+84
+	ldr	r2, .L2907+92
 	strh	r3, [r7]	@ movhi
 	strh	r3, [r2, #2]	@ movhi
 	strb	r3, [r2, #6]
@@ -20360,7 +20360,7 @@ FtlLowFormat:
 	mov	r8, r10
 	strb	r3, [r7, #8]
 	mov	r10, r7
-	ldr	r3, .L2907+88
+	ldr	r3, .L2907+96
 	lsrs	r2, r2, #3
 	ldr	r0, [r3]
 	bl	ftl_memset
@@ -20395,7 +20395,7 @@ FtlLowFormat:
 .L2884:
 	mov	r0, r7
 	bl	__aeabi_uidiv
-	ldr	r3, .L2907+92
+	ldr	r3, .L2907+100
 	ldr	r3, [r3]
 	add	r0, r0, r3
 	uxth	r0, r0
@@ -20422,7 +20422,7 @@ FtlLowFormat:
 .L2897:
 	ldr	r3, [r5]
 	ldrh	r1, [r7, #4]
-	ldr	r4, .L2907+96
+	ldr	r4, .L2907+104
 	str	r3, [r7, #12]
 	adds	r3, r3, #1
 	str	r3, [r5]
@@ -20443,13 +20443,47 @@ FtlLowFormat:
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r4]
-	cbnz	r3, .L2899
+	cmp	r3, #0
+	bne	.L2899
 	ldr	r3, [r8]
 	strh	r7, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
 	b	.L2898
+.L2908:
+	.align	2
+.L2907:
+	.word	.LANCHOR65
+	.word	.LANCHOR192
+	.word	.LANCHOR75
+	.word	.LANCHOR37
+	.word	.LANCHOR158
+	.word	.LANCHOR157
+	.word	.LANCHOR54
+	.word	.LANCHOR183
+	.word	.LANCHOR184
+	.word	.LANCHOR38
+	.word	.LANCHOR36
+	.word	.LANCHOR72
+	.word	.LANCHOR71
+	.word	.LANCHOR40
+	.word	.LANCHOR227
+	.word	.LANCHOR101
+	.word	.LANCHOR8
+	.word	.LANCHOR47
+	.word	.LANCHOR226
+	.word	.LANCHOR51
+	.word	.LANCHOR90
+	.word	.LANCHOR67
+	.word	.LANCHOR99
+	.word	.LANCHOR201
+	.word	.LANCHOR0
+	.word	.LANCHOR64
+	.word	.LANCHOR91
+	.word	168778952
+	.word	.LANCHOR39
+	.word	.LANCHOR82
 .L2899:
 	ldr	r3, [r5]
 	ldrh	r1, [r4, #4]
@@ -20459,10 +20493,10 @@ FtlLowFormat:
 	movw	r4, #65535
 	ldr	r3, [r8]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L2907+100
+	ldr	r3, .L2909
 	strh	r4, [r3]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L2907+104
+	ldr	r3, .L2909+4
 	movs	r2, #0
 	strh	r2, [r3, #2]	@ movhi
 	ldr	r2, [r6]
@@ -20476,7 +20510,7 @@ FtlLowFormat:
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
 	cbnz	r0, .L2878
-	ldr	r3, .L2907+108
+	ldr	r3, .L2909+8
 	movs	r2, #1
 	str	r2, [r3]
 .L2878:
@@ -20484,40 +20518,12 @@ FtlLowFormat:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2908:
+.L2910:
 	.align	2
-.L2907:
-	.word	.LANCHOR75
-	.word	.LANCHOR37
-	.word	.LANCHOR158
-	.word	.LANCHOR157
-	.word	.LANCHOR54
-	.word	.LANCHOR183
-	.word	.LANCHOR184
-	.word	.LANCHOR38
-	.word	.LANCHOR36
-	.word	.LANCHOR72
-	.word	.LANCHOR71
-	.word	.LANCHOR40
-	.word	.LANCHOR227
-	.word	.LANCHOR101
-	.word	.LANCHOR8
-	.word	.LANCHOR47
-	.word	.LANCHOR226
-	.word	.LANCHOR51
-	.word	.LANCHOR90
-	.word	.LANCHOR67
-	.word	.LANCHOR99
-	.word	.LANCHOR201
-	.word	.LANCHOR0
-	.word	.LANCHOR64
-	.word	.LANCHOR91
+.L2909:
 	.word	.LANCHOR92
 	.word	.LANCHOR206
 	.word	.LANCHOR223
-	.word	168778952
-	.word	.LANCHOR39
-	.word	.LANCHOR82
 	.size	FtlLowFormat, .-FtlLowFormat
 	.global	FtlMallocOffset
 	.global	FtlMallocBuffer
@@ -20764,7 +20770,7 @@ DieCsIndex:
 	.space	8
 	.section	.bss.FlashDdrTunningReadCount,"aw",%nobits
 	.align	2
-	.set	.LANCHOR148,. + 0
+	.set	.LANCHOR142,. + 0
 	.type	FlashDdrTunningReadCount, %object
 	.size	FlashDdrTunningReadCount, 4
 FlashDdrTunningReadCount:
@@ -21074,7 +21080,7 @@ gFlashOnfiModeEn:
 	.space	1
 	.section	.bss.gFlashPageBuffer0,"aw",%nobits
 	.align	2
-	.set	.LANCHOR143,. + 0
+	.set	.LANCHOR145,. + 0
 	.type	gFlashPageBuffer0, %object
 	.size	gFlashPageBuffer0, 4
 gFlashPageBuffer0:
@@ -21178,14 +21184,14 @@ gNandFlashIDBEccBits:
 	.space	1
 	.section	.bss.gNandFlashIdbBlockAddr,"aw",%nobits
 	.align	2
-	.set	.LANCHOR145,. + 0
+	.set	.LANCHOR147,. + 0
 	.type	gNandFlashIdbBlockAddr, %object
 	.size	gNandFlashIdbBlockAddr, 4
 gNandFlashIdbBlockAddr:
 	.space	4
 	.section	.bss.gNandFlashInfoBlockAddr,"aw",%nobits
 	.align	2
-	.set	.LANCHOR144,. + 0
+	.set	.LANCHOR146,. + 0
 	.type	gNandFlashInfoBlockAddr, %object
 	.size	gNandFlashInfoBlockAddr, 4
 gNandFlashInfoBlockAddr:
@@ -21208,7 +21214,7 @@ gNandFlashResEndPageAddr:
 gNandIDBResBlkNum:
 	.space	1
 	.section	.bss.gNandIDBResBlkNumSaveInFlash,"aw",%nobits
-	.set	.LANCHOR146,. + 0
+	.set	.LANCHOR148,. + 0
 	.type	gNandIDBResBlkNumSaveInFlash, %object
 	.size	gNandIDBResBlkNumSaveInFlash, 1
 gNandIDBResBlkNumSaveInFlash:
@@ -21605,7 +21611,7 @@ g_l2p_last_update_region_id:
 g_maxRegNum:
 	.space	1
 	.section	.bss.g_maxRetryCount,"aw",%nobits
-	.set	.LANCHOR147,. + 0
+	.set	.LANCHOR149,. + 0
 	.type	g_maxRetryCount, %object
 	.size	g_maxRetryCount, 1
 g_maxRetryCount:
@@ -21848,7 +21854,7 @@ gc_ink_free_return_value:
 	.space	2
 	.section	.bss.gpFlashSaveInfo,"aw",%nobits
 	.align	2
-	.set	.LANCHOR142,. + 0
+	.set	.LANCHOR144,. + 0
 	.type	gpFlashSaveInfo, %object
 	.size	gpFlashSaveInfo, 4
 gpFlashSaveInfo:
@@ -21875,7 +21881,7 @@ gpNandc1:
 	.space	4
 	.section	.bss.gpReadRetrial,"aw",%nobits
 	.align	2
-	.set	.LANCHOR149,. + 0
+	.set	.LANCHOR143,. + 0
 	.type	gpReadRetrial, %object
 	.size	gpReadRetrial, 4
 gpReadRetrial:
@@ -24656,11 +24662,11 @@ refValueDefault:
 	.byte	-32
 	.byte	-37
 	.section	.rodata.FlashDdrTunningRead.str1.1,"aMS",%progbits,1
-.LC8:
+.LC7:
 	.ascii	"sdr read ok %x ecc=%d\012\000"
-.LC9:
+.LC8:
 	.ascii	"sync para %d\012\000"
-.LC10:
+.LC9:
 	.ascii	"TOG mode Read error %x %x\012\000"
 	.section	.rodata.FlashEraseSLc2KBlocks.str1.1,"aMS",%progbits,1
 .LC1:
@@ -24686,7 +24692,7 @@ refValueDefault:
 .LC12:
 	.ascii	"ECC:%d\012\000"
 	.section	.rodata.FlashReadPage.str1.1,"aMS",%progbits,1
-.LC11:
+.LC10:
 	.ascii	"read retry status %x %x %x\012\000"
 	.section	.rodata.FlashReadPages.str1.1,"aMS",%progbits,1
 .LC23:
@@ -24717,7 +24723,7 @@ refValueDefault:
 	.ascii	"FtlGcScanTempBlkError ID %x %x!!!!!!!\012\000"
 	.section	.rodata.FtlInit.str1.1,"aMS",%progbits,1
 .LC48:
-	.ascii	"FTL version: 5.0.47 20171221\000"
+	.ascii	"FTL version: 5.0.47 20180208\000"
 .LC49:
 	.ascii	"...%s: no bad block mapping table, format device\012"
 	.ascii	"\000"
@@ -24766,187 +24772,187 @@ refValueDefault:
 .LC6:
 	.ascii	"%s\012\000"
 	.section	.rodata.MicronReadRetrial.str1.1,"aMS",%progbits,1
-.LC7:
+.LC11:
 	.ascii	"micron RR %d row=%x,count %d,status=%d\012\000"
-	.section	.rodata.__func__.10400,"a",%progbits
+	.section	.rodata.__func__.10401,"a",%progbits
 	.set	.LANCHOR240,. + 0
-	.type	__func__.10400, %object
-	.size	__func__.10400, 8
-__func__.10400:
+	.type	__func__.10401, %object
+	.size	__func__.10401, 8
+__func__.10401:
 	.ascii	"FtlInit\000"
-	.section	.rodata.__func__.10460,"a",%progbits
+	.section	.rodata.__func__.10461,"a",%progbits
 	.set	.LANCHOR220,. + 0
-	.type	__func__.10460, %object
-	.size	__func__.10460, 13
-__func__.10460:
+	.type	__func__.10461, %object
+	.size	__func__.10461, 13
+__func__.10461:
 	.ascii	"FtlProgPages\000"
-	.section	.rodata.__func__.10486,"a",%progbits
+	.section	.rodata.__func__.10487,"a",%progbits
 	.set	.LANCHOR242,. + 0
-	.type	__func__.10486, %object
-	.size	__func__.10486, 10
-__func__.10486:
+	.type	__func__.10487, %object
+	.size	__func__.10487, 10
+__func__.10487:
 	.ascii	"ftl_write\000"
-	.section	.rodata.__func__.10549,"a",%progbits
+	.section	.rodata.__func__.10550,"a",%progbits
 	.set	.LANCHOR121,. + 0
-	.type	__func__.10549, %object
-	.size	__func__.10549, 14
-__func__.10549:
+	.type	__func__.10550, %object
+	.size	__func__.10550, 14
+__func__.10550:
 	.ascii	"FtlBbt2Bitmap\000"
-	.section	.rodata.__func__.10595,"a",%progbits
+	.section	.rodata.__func__.10596,"a",%progbits
 	.set	.LANCHOR208,. + 0
-	.type	__func__.10595, %object
-	.size	__func__.10595, 11
-__func__.10595:
+	.type	__func__.10596, %object
+	.size	__func__.10596, 11
+__func__.10596:
 	.ascii	"FtlLoadBbt\000"
-	.section	.rodata.__func__.10704,"a",%progbits
+	.section	.rodata.__func__.10705,"a",%progbits
 	.set	.LANCHOR88,. + 0
-	.type	__func__.10704, %object
-	.size	__func__.10704, 17
-__func__.10704:
+	.type	__func__.10705, %object
+	.size	__func__.10705, 17
+__func__.10705:
 	.ascii	"INSERT_FREE_LIST\000"
-	.section	.rodata.__func__.10708,"a",%progbits
+	.section	.rodata.__func__.10709,"a",%progbits
 	.set	.LANCHOR85,. + 0
-	.type	__func__.10708, %object
-	.size	__func__.10708, 17
-__func__.10708:
+	.type	__func__.10709, %object
+	.size	__func__.10709, 17
+__func__.10709:
 	.ascii	"INSERT_DATA_LIST\000"
-	.section	.rodata.__func__.10738,"a",%progbits
+	.section	.rodata.__func__.10739,"a",%progbits
 	.set	.LANCHOR89,. + 0
-	.type	__func__.10738, %object
-	.size	__func__.10738, 17
-__func__.10738:
+	.type	__func__.10739, %object
+	.size	__func__.10739, 17
+__func__.10739:
 	.ascii	"List_remove_node\000"
-	.section	.rodata.__func__.10768,"a",%progbits
+	.section	.rodata.__func__.10769,"a",%progbits
 	.set	.LANCHOR93,. + 0
-	.type	__func__.10768, %object
-	.size	__func__.10768, 22
-__func__.10768:
+	.type	__func__.10769, %object
+	.size	__func__.10769, 22
+__func__.10769:
 	.ascii	"List_update_data_list\000"
-	.section	.rodata.__func__.10775,"a",%progbits
+	.section	.rodata.__func__.10776,"a",%progbits
 	.set	.LANCHOR212,. + 0
-	.type	__func__.10775, %object
-	.size	__func__.10775, 16
-__func__.10775:
+	.type	__func__.10776, %object
+	.size	__func__.10776, 16
+__func__.10776:
 	.ascii	"load_l2p_region\000"
-	.section	.rodata.__func__.10805,"a",%progbits
+	.section	.rodata.__func__.10806,"a",%progbits
 	.set	.LANCHOR94,. + 0
-	.type	__func__.10805, %object
-	.size	__func__.10805, 26
-__func__.10805:
+	.type	__func__.10806, %object
+	.size	__func__.10806, 26
+__func__.10806:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.section	.rodata.__func__.10819,"a",%progbits
+	.section	.rodata.__func__.10820,"a",%progbits
 	.set	.LANCHOR209,. + 0
-	.type	__func__.10819, %object
-	.size	__func__.10819, 15
-__func__.10819:
+	.type	__func__.10820, %object
+	.size	__func__.10820, 15
+__func__.10820:
 	.ascii	"ftl_map_blk_gc\000"
-	.section	.rodata.__func__.10832,"a",%progbits
+	.section	.rodata.__func__.10833,"a",%progbits
 	.set	.LANCHOR210,. + 0
-	.type	__func__.10832, %object
-	.size	__func__.10832, 31
-__func__.10832:
+	.type	__func__.10833, %object
+	.size	__func__.10833, 31
+__func__.10833:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.section	.rodata.__func__.10845,"a",%progbits
+	.section	.rodata.__func__.10846,"a",%progbits
 	.set	.LANCHOR211,. + 0
-	.type	__func__.10845, %object
-	.size	__func__.10845, 16
-__func__.10845:
+	.type	__func__.10846, %object
+	.size	__func__.10846, 16
+__func__.10846:
 	.ascii	"FtlMapWritePage\000"
-	.section	.rodata.__func__.10865,"a",%progbits
+	.section	.rodata.__func__.10866,"a",%progbits
 	.set	.LANCHOR97,. + 0
-	.type	__func__.10865, %object
-	.size	__func__.10865, 22
-__func__.10865:
+	.type	__func__.10866, %object
+	.size	__func__.10866, 22
+__func__.10866:
 	.ascii	"select_l2p_ram_region\000"
-	.section	.rodata.__func__.10881,"a",%progbits
+	.section	.rodata.__func__.10882,"a",%progbits
 	.set	.LANCHOR213,. + 0
-	.type	__func__.10881, %object
-	.size	__func__.10881, 9
-__func__.10881:
+	.type	__func__.10882, %object
+	.size	__func__.10882, 9
+__func__.10882:
 	.ascii	"log2phys\000"
-	.section	.rodata.__func__.10943,"a",%progbits
+	.section	.rodata.__func__.10944,"a",%progbits
 	.set	.LANCHOR207,. + 0
-	.type	__func__.10943, %object
-	.size	__func__.10943, 15
-__func__.10943:
+	.type	__func__.10944, %object
+	.size	__func__.10944, 15
+__func__.10944:
 	.ascii	"FtlVpcTblFlush\000"
-	.section	.rodata.__func__.10962,"a",%progbits
+	.section	.rodata.__func__.10963,"a",%progbits
 	.set	.LANCHOR224,. + 0
-	.type	__func__.10962, %object
-	.size	__func__.10962, 14
-__func__.10962:
+	.type	__func__.10963, %object
+	.size	__func__.10963, 14
+__func__.10963:
 	.ascii	"FtlScanSysBlk\000"
-	.section	.rodata.__func__.11016,"a",%progbits
+	.section	.rodata.__func__.11017,"a",%progbits
 	.set	.LANCHOR225,. + 0
-	.type	__func__.11016, %object
-	.size	__func__.11016, 15
-__func__.11016:
+	.type	__func__.11017, %object
+	.size	__func__.11017, 15
+__func__.11017:
 	.ascii	"FtlLoadSysInfo\000"
-	.section	.rodata.__func__.11085,"a",%progbits
+	.section	.rodata.__func__.11087,"a",%progbits
 	.set	.LANCHOR214,. + 0
-	.type	__func__.11085, %object
-	.size	__func__.11085, 16
-__func__.11085:
+	.type	__func__.11087, %object
+	.size	__func__.11087, 16
+__func__.11087:
 	.ascii	"FtlReUsePrevPpa\000"
-	.section	.rodata.__func__.11118,"a",%progbits
+	.section	.rodata.__func__.11120,"a",%progbits
 	.set	.LANCHOR228,. + 0
-	.type	__func__.11118, %object
-	.size	__func__.11118, 22
-__func__.11118:
+	.type	__func__.11120, %object
+	.size	__func__.11120, 22
+__func__.11120:
 	.ascii	"FtlRecoverySuperblock\000"
-	.section	.rodata.__func__.11172,"a",%progbits
+	.section	.rodata.__func__.11174,"a",%progbits
 	.set	.LANCHOR100,. + 0
-	.type	__func__.11172, %object
-	.size	__func__.11172, 16
-__func__.11172:
+	.type	__func__.11174, %object
+	.size	__func__.11174, 16
+__func__.11174:
 	.ascii	"make_superblock\000"
-	.section	.rodata.__func__.11192,"a",%progbits
+	.section	.rodata.__func__.11194,"a",%progbits
 	.set	.LANCHOR138,. + 0
-	.type	__func__.11192, %object
-	.size	__func__.11192, 18
-__func__.11192:
+	.type	__func__.11194, %object
+	.size	__func__.11194, 18
+__func__.11194:
 	.ascii	"SupperBlkListInit\000"
-	.section	.rodata.__func__.11269,"a",%progbits
+	.section	.rodata.__func__.11271,"a",%progbits
 	.set	.LANCHOR200,. + 0
-	.type	__func__.11269, %object
-	.size	__func__.11269, 25
-__func__.11269:
+	.type	__func__.11271, %object
+	.size	__func__.11271, 25
+__func__.11271:
 	.ascii	"allocate_data_superblock\000"
-	.section	.rodata.__func__.11283,"a",%progbits
+	.section	.rodata.__func__.11285,"a",%progbits
 	.set	.LANCHOR219,. + 0
-	.type	__func__.11283, %object
-	.size	__func__.11283, 29
-__func__.11283:
+	.type	__func__.11285, %object
+	.size	__func__.11285, 29
+__func__.11285:
 	.ascii	"allocate_new_data_superblock\000"
-	.section	.rodata.__func__.11289,"a",%progbits
+	.section	.rodata.__func__.11291,"a",%progbits
 	.set	.LANCHOR205,. + 0
-	.type	__func__.11289, %object
-	.size	__func__.11289, 19
-__func__.11289:
+	.type	__func__.11291, %object
+	.size	__func__.11291, 19
+__func__.11291:
 	.ascii	"get_new_active_ppa\000"
-	.section	.rodata.__func__.11300,"a",%progbits
+	.section	.rodata.__func__.11302,"a",%progbits
 	.set	.LANCHOR203,. + 0
-	.type	__func__.11300, %object
-	.size	__func__.11300, 16
-__func__.11300:
+	.type	__func__.11302, %object
+	.size	__func__.11302, 16
+__func__.11302:
 	.ascii	"update_vpc_list\000"
-	.section	.rodata.__func__.11305,"a",%progbits
+	.section	.rodata.__func__.11307,"a",%progbits
 	.set	.LANCHOR204,. + 0
-	.type	__func__.11305, %object
-	.size	__func__.11305, 20
-__func__.11305:
+	.type	__func__.11307, %object
+	.size	__func__.11307, 20
+__func__.11307:
 	.ascii	"decrement_vpc_count\000"
-	.section	.rodata.__func__.11373,"a",%progbits
+	.section	.rodata.__func__.11375,"a",%progbits
 	.set	.LANCHOR234,. + 0
-	.type	__func__.11373, %object
-	.size	__func__.11373, 19
-__func__.11373:
+	.type	__func__.11375, %object
+	.size	__func__.11375, 19
+__func__.11375:
 	.ascii	"FtlGcFreeTempBlock\000"
-	.section	.rodata.__func__.11467,"a",%progbits
+	.section	.rodata.__func__.11469,"a",%progbits
 	.set	.LANCHOR238,. + 0
-	.type	__func__.11467, %object
-	.size	__func__.11467, 23
-__func__.11467:
+	.type	__func__.11469, %object
+	.size	__func__.11469, 23
+__func__.11469:
 	.ascii	"rk_ftl_garbage_collect\000"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",%progbits,1
 .LC31:
diff --git a/drivers/rknand/rk_ftl_arm_v8.S b/drivers/rknand/rk_ftl_arm_v8.S
new file mode 100644
index 0000000000..bb62e2bc66
--- /dev/null
+++ b/drivers/rknand/rk_ftl_arm_v8.S
@@ -0,0 +1,22679 @@
+/*
+ * Copyright (c) 2016-2017, Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ * date: 2018-02-08
+ */
+	.arch armv8-a
+	.file	"rk_ftl_arm_v8.S"
+	.section	.text.ftl_set_blk_mode.part.9,"ax",@progbits
+	.align	2
+	.type	ftl_set_blk_mode.part.9, %function
+ftl_set_blk_mode.part.9:
+	and	w0, w0, 65535
+	adrp	x2, .LANCHOR0
+	ubfx	x1, x0, 5, 11
+	ldr	x3, [x2, #:lo12:.LANCHOR0]
+	lsl	x1, x1, 2
+	and	w0, w0, 31
+	mov	w2, 1
+	lsl	w2, w2, w0
+	ldr	w0, [x3, x1]
+	orr	w0, w0, w2
+	str	w0, [x3, x1]
+	ret
+	.size	ftl_set_blk_mode.part.9, .-ftl_set_blk_mode.part.9
+	.section	.text.FlashMemCmp8,"ax",@progbits
+	.align	2
+	.global	FlashMemCmp8
+	.type	FlashMemCmp8, %function
+FlashMemCmp8:
+	adrp	x3, .LANCHOR1
+	ldrb	w3, [x3, #:lo12:.LANCHOR1]
+	cbz	w3, .L7
+	ldrb	w4, [x0, 1]
+	ldrb	w3, [x1, 1]
+	cmp	w4, w3
+	beq	.L8
+.L7:
+	mov	x3, 0
+.L5:
+	mov	w4, w3
+	cmp	w3, w2
+	bcc	.L6
+.L8:
+	mov	w0, 0
+	ret
+.L6:
+	ldrb	w5, [x0, x3]
+	add	x3, x3, 1
+	add	x6, x1, x3
+	ldrb	w6, [x6, -1]
+	cmp	w6, w5
+	beq	.L5
+	add	w0, w4, 1
+	ret
+	.size	FlashMemCmp8, .-FlashMemCmp8
+	.section	.text.FlashRsvdBlkChk,"ax",@progbits
+	.align	2
+	.global	FlashRsvdBlkChk
+	.type	FlashRsvdBlkChk, %function
+FlashRsvdBlkChk:
+	adrp	x2, .LANCHOR2
+	adrp	x3, .LANCHOR3
+	and	w0, w0, 255
+	ldrb	w2, [x2, #:lo12:.LANCHOR2]
+	ldr	w3, [x3, #:lo12:.LANCHOR3]
+	mul	w2, w2, w3
+	cmp	w2, w1
+	bls	.L12
+	cmp	w0, 0
+	cset	w0, ne
+	ret
+.L12:
+	mov	w0, 1
+	ret
+	.size	FlashRsvdBlkChk, .-FlashRsvdBlkChk
+	.section	.text.FlashGetRandomizer,"ax",@progbits
+	.align	2
+	.global	FlashGetRandomizer
+	.type	FlashGetRandomizer, %function
+FlashGetRandomizer:
+	and	x3, x1, 127
+	adrp	x2, .LANCHOR4
+	add	x2, x2, :lo12:.LANCHOR4
+	ldrh	w4, [x2, x3, lsl 1]
+	adrp	x2, .LANCHOR5
+	ldrb	w2, [x2, #:lo12:.LANCHOR5]
+	cbz	w2, .L21
+	stp	x29, x30, [sp, -16]!
+	and	w0, w0, 255
+	add	x29, sp, 0
+	bl	FlashRsvdBlkChk
+	cmp	w0, 0
+	orr	w1, w4, -1073741824
+	csel	w4, w1, w4, ne
+	mov	w0, w4
+	ldp	x29, x30, [sp], 16
+	ret
+.L21:
+	mov	w0, w4
+	ret
+	.size	FlashGetRandomizer, .-FlashGetRandomizer
+	.section	.text.FlashSetRandomizer,"ax",@progbits
+	.align	2
+	.global	FlashSetRandomizer
+	.type	FlashSetRandomizer, %function
+FlashSetRandomizer:
+	and	w5, w0, 255
+	and	x2, x1, 127
+	adrp	x0, .LANCHOR4
+	add	x0, x0, :lo12:.LANCHOR4
+	ldrh	w4, [x0, x2, lsl 1]
+	adrp	x0, .LANCHOR5
+	ldrb	w0, [x0, #:lo12:.LANCHOR5]
+	cbz	w0, .L32
+	stp	x29, x30, [sp, -16]!
+	mov	w0, w5
+	add	x29, sp, 0
+	bl	FlashRsvdBlkChk
+	cmp	w0, 0
+	sbfiz	x5, x5, 4, 32
+	adrp	x0, .LANCHOR6
+	add	x0, x0, :lo12:.LANCHOR6
+	orr	w1, w4, -1073741824
+	csel	w4, w1, w4, ne
+	ldr	x0, [x0, x5]
+	str	w4, [x0, 336]
+	ldp	x29, x30, [sp], 16
+	ret
+.L32:
+	sbfiz	x5, x5, 4, 32
+	adrp	x0, .LANCHOR6
+	add	x0, x0, :lo12:.LANCHOR6
+	ldr	x0, [x0, x5]
+	str	w4, [x0, 336]
+	ret
+	.size	FlashSetRandomizer, .-FlashSetRandomizer
+	.section	.text.FlashReadCmd,"ax",@progbits
+	.align	2
+	.global	FlashReadCmd
+	.type	FlashReadCmd, %function
+FlashReadCmd:
+	and	w0, w0, 255
+	adrp	x4, .LANCHOR6
+	sbfiz	x5, x0, 4, 32
+	add	x4, x4, :lo12:.LANCHOR6
+	add	x2, x4, x5
+	lsr	w3, w1, 16
+	ldr	x4, [x4, x5]
+	ldrb	w2, [x2, 8]
+	add	x2, x4, x2, lsl 8
+	and	w4, w1, 255
+	str	wzr, [x2, 2056]
+	str	wzr, [x2, 2052]
+	str	wzr, [x2, 2052]
+	str	w4, [x2, 2052]
+	lsr	w4, w1, 8
+	str	w4, [x2, 2052]
+	str	w3, [x2, 2052]
+	mov	w3, 48
+	str	w3, [x2, 2056]
+	b	FlashSetRandomizer
+	.size	FlashReadCmd, .-FlashReadCmd
+	.section	.text.FlashReadDpDataOutCmd,"ax",@progbits
+	.align	2
+	.global	FlashReadDpDataOutCmd
+	.type	FlashReadDpDataOutCmd, %function
+FlashReadDpDataOutCmd:
+	and	w0, w0, 255
+	adrp	x2, .LANCHOR6
+	sbfiz	x3, x0, 4, 32
+	add	x2, x2, :lo12:.LANCHOR6
+	add	x4, x2, x3
+	and	w5, w1, 255
+	ldr	x6, [x2, x3]
+	adrp	x2, .LANCHOR7+16
+	lsr	w3, w1, 16
+	ldrb	w2, [x2, #:lo12:.LANCHOR7+16]
+	cmp	w2, 1
+	ldrb	w2, [x4, 8]
+	lsr	w4, w1, 8
+	add	x2, x6, x2, lsl 8
+	bne	.L37
+	mov	w6, 6
+	str	w6, [x2, 2056]
+	str	wzr, [x2, 2052]
+	str	wzr, [x2, 2052]
+	str	w5, [x2, 2052]
+	str	w4, [x2, 2052]
+	str	w3, [x2, 2052]
+.L39:
+	mov	w3, 224
+	str	w3, [x2, 2056]
+	b	FlashSetRandomizer
+.L37:
+	str	wzr, [x2, 2056]
+	str	wzr, [x2, 2052]
+	str	wzr, [x2, 2052]
+	str	w5, [x2, 2052]
+	str	w4, [x2, 2052]
+	str	w3, [x2, 2052]
+	mov	w3, 5
+	str	w3, [x2, 2056]
+	str	wzr, [x2, 2052]
+	str	wzr, [x2, 2052]
+	b	.L39
+	.size	FlashReadDpDataOutCmd, .-FlashReadDpDataOutCmd
+	.section	.text.flash_enter_slc_mode,"ax",@progbits
+	.align	2
+	.global	flash_enter_slc_mode
+	.type	flash_enter_slc_mode, %function
+flash_enter_slc_mode:
+	adrp	x1, .LANCHOR8
+	and	w0, w0, 255
+	ldrb	w1, [x1, #:lo12:.LANCHOR8]
+	cbz	w1, .L40
+	sbfiz	x0, x0, 4, 32
+	adrp	x1, .LANCHOR6
+	add	x1, x1, :lo12:.LANCHOR6
+	add	x2, x1, x0
+	ldr	x1, [x1, x0]
+	ldrb	w0, [x2, 8]
+	add	x0, x0, 8
+	add	x0, x1, x0, lsl 8
+	mov	w1, 218
+	str	w1, [x0, 8]
+.L40:
+	ret
+	.size	flash_enter_slc_mode, .-flash_enter_slc_mode
+	.section	.text.flash_exit_slc_mode,"ax",@progbits
+	.align	2
+	.global	flash_exit_slc_mode
+	.type	flash_exit_slc_mode, %function
+flash_exit_slc_mode:
+	adrp	x1, .LANCHOR8
+	and	w0, w0, 255
+	ldrb	w1, [x1, #:lo12:.LANCHOR8]
+	cbz	w1, .L45
+	sbfiz	x0, x0, 4, 32
+	adrp	x1, .LANCHOR6
+	add	x1, x1, :lo12:.LANCHOR6
+	add	x2, x1, x0
+	ldr	x1, [x1, x0]
+	ldrb	w0, [x2, 8]
+	add	x0, x0, 8
+	add	x0, x1, x0, lsl 8
+	mov	w1, 223
+	str	w1, [x0, 8]
+.L45:
+	ret
+	.size	flash_exit_slc_mode, .-flash_exit_slc_mode
+	.section	.text.FlashProgFirstCmd,"ax",@progbits
+	.align	2
+	.global	FlashProgFirstCmd
+	.type	FlashProgFirstCmd, %function
+FlashProgFirstCmd:
+	and	w0, w0, 255
+	adrp	x4, .LANCHOR6
+	sbfiz	x5, x0, 4, 32
+	add	x4, x4, :lo12:.LANCHOR6
+	add	x2, x4, x5
+	lsr	w3, w1, 16
+	ldr	x4, [x4, x5]
+	ldrb	w2, [x2, 8]
+	add	x2, x4, x2, lsl 8
+	mov	w4, 128
+	str	w4, [x2, 2056]
+	and	w4, w1, 255
+	str	wzr, [x2, 2052]
+	str	wzr, [x2, 2052]
+	str	w4, [x2, 2052]
+	lsr	w4, w1, 8
+	str	w4, [x2, 2052]
+	str	w3, [x2, 2052]
+	b	FlashSetRandomizer
+	.size	FlashProgFirstCmd, .-FlashProgFirstCmd
+	.section	.text.FlashEraseCmd,"ax",@progbits
+	.align	2
+	.global	FlashEraseCmd
+	.type	FlashEraseCmd, %function
+FlashEraseCmd:
+	ubfiz	x0, x0, 4, 8
+	adrp	x3, .LANCHOR6
+	add	x3, x3, :lo12:.LANCHOR6
+	add	x4, x3, x0
+	ldr	x3, [x3, x0]
+	ldrb	w0, [x4, 8]
+	cbz	w2, .L52
+	add	x2, x3, x0, lsl 8
+	mov	w4, 96
+	str	w4, [x2, 2056]
+	and	w4, w1, 255
+	str	w4, [x2, 2052]
+	lsr	w4, w1, 8
+	str	w4, [x2, 2052]
+	lsr	w4, w1, 16
+	str	w4, [x2, 2052]
+	adrp	x2, .LANCHOR3
+	ldr	w2, [x2, #:lo12:.LANCHOR3]
+	add	w1, w1, w2
+.L52:
+	add	x0, x3, x0, lsl 8
+	mov	w2, 96
+	str	w2, [x0, 2056]
+	and	w2, w1, 255
+	str	w2, [x0, 2052]
+	lsr	w2, w1, 8
+	str	w2, [x0, 2052]
+	lsr	w1, w1, 16
+	str	w1, [x0, 2052]
+	mov	w1, 208
+	str	w1, [x0, 2056]
+	ret
+	.size	FlashEraseCmd, .-FlashEraseCmd
+	.section	.text.FlashProgDpSecondCmd,"ax",@progbits
+	.align	2
+	.global	FlashProgDpSecondCmd
+	.type	FlashProgDpSecondCmd, %function
+FlashProgDpSecondCmd:
+	and	w0, w0, 255
+	adrp	x2, .LANCHOR7+11
+	sbfiz	x5, x0, 4, 32
+	adrp	x4, .LANCHOR6
+	add	x4, x4, :lo12:.LANCHOR6
+	ldrb	w6, [x2, #:lo12:.LANCHOR7+11]
+	add	x2, x4, x5
+	lsr	w3, w1, 16
+	ldr	x4, [x4, x5]
+	ldrb	w2, [x2, 8]
+	add	x2, x4, x2, lsl 8
+	and	w4, w1, 255
+	str	w6, [x2, 2056]
+	str	wzr, [x2, 2052]
+	str	wzr, [x2, 2052]
+	str	w4, [x2, 2052]
+	lsr	w4, w1, 8
+	str	w4, [x2, 2052]
+	str	w3, [x2, 2052]
+	b	FlashSetRandomizer
+	.size	FlashProgDpSecondCmd, .-FlashProgDpSecondCmd
+	.section	.text.FlashProgSecondCmd,"ax",@progbits
+	.align	2
+	.global	FlashProgSecondCmd
+	.type	FlashProgSecondCmd, %function
+FlashProgSecondCmd:
+	ubfiz	x0, x0, 4, 8
+	adrp	x1, .LANCHOR6
+	add	x1, x1, :lo12:.LANCHOR6
+	add	x2, x1, x0
+	ldr	x1, [x1, x0]
+	ldrb	w0, [x2, 8]
+	add	x0, x0, 8
+	add	x0, x1, x0, lsl 8
+	mov	w1, 16
+	str	w1, [x0, 8]
+	ret
+	.size	FlashProgSecondCmd, .-FlashProgSecondCmd
+	.section	.text.FlashProgDpFirstCmd,"ax",@progbits
+	.align	2
+	.global	FlashProgDpFirstCmd
+	.type	FlashProgDpFirstCmd, %function
+FlashProgDpFirstCmd:
+	ubfiz	x0, x0, 4, 8
+	adrp	x1, .LANCHOR6
+	add	x1, x1, :lo12:.LANCHOR6
+	add	x3, x1, x0
+	ldr	x2, [x1, x0]
+	adrp	x0, .LANCHOR7+10
+	ldrb	w1, [x0, #:lo12:.LANCHOR7+10]
+	ldrb	w0, [x3, 8]
+	add	x0, x0, 8
+	add	x0, x2, x0, lsl 8
+	str	w1, [x0, 8]
+	ret
+	.size	FlashProgDpFirstCmd, .-FlashProgDpFirstCmd
+	.section	.text.FlashReadStatus,"ax",@progbits
+	.align	2
+	.global	FlashReadStatus
+	.type	FlashReadStatus, %function
+FlashReadStatus:
+	ubfiz	x0, x0, 4, 8
+	adrp	x1, .LANCHOR6
+	add	x1, x1, :lo12:.LANCHOR6
+	stp	x29, x30, [sp, -32]!
+	add	x2, x1, x0
+	add	x29, sp, 0
+	ldr	x0, [x1, x0]
+	str	x19, [sp, 16]
+	ldrb	w19, [x2, 8]
+	add	x19, x0, x19, lsl 8
+	mov	w0, 112
+	str	w0, [x19, 2056]
+	mov	x0, 80
+	bl	udelay
+	ldr	w0, [x19, 2048]
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	FlashReadStatus, .-FlashReadStatus
+	.section	.text.JSHash,"ax",@progbits
+	.align	2
+	.global	JSHash
+	.type	JSHash, %function
+JSHash:
+	mov	x4, x0
+	mov	w0, 42982
+	mov	x3, 0
+	movk	w0, 0x47c6, lsl 16
+.L62:
+	cmp	w1, w3
+	bhi	.L63
+	ret
+.L63:
+	lsr	w2, w0, 2
+	ldrb	w5, [x4, x3]
+	add	w2, w2, w0, lsl 5
+	add	x3, x3, 1
+	add	w2, w2, w5
+	eor	w0, w0, w2
+	b	.L62
+	.size	JSHash, .-JSHash
+	.section	.text.FlashLoadIdbInfo,"ax",@progbits
+	.align	2
+	.global	FlashLoadIdbInfo
+	.type	FlashLoadIdbInfo, %function
+FlashLoadIdbInfo:
+	mov	w0, 0
+	ret
+	.size	FlashLoadIdbInfo, .-FlashLoadIdbInfo
+	.section	.text.FlashPrintInfo,"ax",@progbits
+	.align	2
+	.global	FlashPrintInfo
+	.type	FlashPrintInfo, %function
+FlashPrintInfo:
+	ret
+	.size	FlashPrintInfo, .-FlashPrintInfo
+	.section	.text.ToshibaSetRRPara,"ax",@progbits
+	.align	2
+	.global	ToshibaSetRRPara
+	.type	ToshibaSetRRPara, %function
+ToshibaSetRRPara:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	str	x27, [sp, 80]
+	and	w27, w1, 255
+	add	w2, w27, 1
+	stp	x21, x22, [sp, 32]
+	mov	x21, x0
+	mov	w0, 5
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR9
+	umull	x2, w2, w0
+	stp	x23, x24, [sp, 48]
+	adrp	x0, .LANCHOR10
+	add	x20, x20, :lo12:.LANCHOR9
+	add	x24, x0, :lo12:.LANCHOR10
+	stp	x25, x26, [sp, 64]
+	adrp	x23, .LANCHOR13
+	adrp	x25, .LANCHOR11
+	adrp	x26, .LANCHOR12
+	add	x23, x23, :lo12:.LANCHOR13
+	add	x25, x25, :lo12:.LANCHOR11
+	add	x26, x26, :lo12:.LANCHOR12
+	add	x20, x20, x2
+	add	x24, x24, x2
+	mov	x22, x0
+	mov	x19, 0
+.L67:
+	ldrb	w0, [x23]
+	cmp	w0, w19
+	bhi	.L71
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	ret
+.L71:
+	mov	w0, 85
+	str	w0, [x21, 8]
+	add	x0, x22, :lo12:.LANCHOR10
+	ldrsb	w0, [x19, x0]
+	str	w0, [x21, 4]
+	mov	x0, 200
+	bl	udelay
+	ldrb	w0, [x25]
+	cmp	w0, 34
+	bne	.L68
+	ldrsb	w0, [x24, x19]
+.L73:
+	add	x19, x19, 1
+	str	w0, [x21]
+	b	.L67
+.L68:
+	cmp	w0, 35
+	bne	.L70
+	ldrsb	w0, [x20, x19]
+	b	.L73
+.L70:
+	ldrsb	w0, [x26, w27, sxtw]
+	b	.L73
+	.size	ToshibaSetRRPara, .-ToshibaSetRRPara
+	.section	.text.SamsungSetRRPara,"ax",@progbits
+	.align	2
+	.global	SamsungSetRRPara
+	.type	SamsungSetRRPara, %function
+SamsungSetRRPara:
+	stp	x29, x30, [sp, -64]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	ubfiz	x21, x1, 2, 8
+	mov	x22, x0
+	add	x21, x21, 4
+	adrp	x0, .LANCHOR14
+	add	x0, x0, :lo12:.LANCHOR14
+	stp	x19, x20, [sp, 16]
+	add	x21, x0, x21
+	stp	x23, x24, [sp, 48]
+	mov	x19, x0
+	adrp	x23, .LANCHOR13
+	add	x23, x23, :lo12:.LANCHOR13
+	mov	x20, 0
+	mov	w24, 161
+.L75:
+	ldrb	w0, [x23]
+	cmp	w0, w20
+	bhi	.L76
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	ret
+.L76:
+	str	w24, [x22, 8]
+	str	wzr, [x22]
+	ldrsb	w0, [x20, x19]
+	str	w0, [x22]
+	ldrsb	w0, [x21, x20]
+	add	x20, x20, 1
+	str	w0, [x22]
+	mov	x0, 300
+	bl	udelay
+	b	.L75
+	.size	SamsungSetRRPara, .-SamsungSetRRPara
+	.section	.text.LogAddr2PhyAddr,"ax",@progbits
+	.align	2
+	.global	LogAddr2PhyAddr
+	.type	LogAddr2PhyAddr, %function
+LogAddr2PhyAddr:
+	adrp	x6, .LANCHOR15
+	add	x6, x6, :lo12:.LANCHOR15
+	and	w4, w4, 255
+	ldrh	w8, [x6, 12]
+	ldrh	w5, [x6, 14]
+	mul	w5, w5, w8
+	and	w8, w5, 65535
+	adrp	x5, .LANCHOR3
+	ldrh	w7, [x5, #:lo12:.LANCHOR3]
+	adrp	x5, .LANCHOR1
+	ldrb	w6, [x5, #:lo12:.LANCHOR1]
+	ubfiz	w5, w7, 1, 15
+	cmp	w6, 1
+	ldr	w6, [x0, 4]
+	csel	w7, w5, w7, eq
+	cmp	w1, 1
+	ubfx	x11, x6, 10, 16
+	and	w6, w6, 1023
+	udiv	w5, w11, w8
+	and	w10, w5, 65535
+	msub	w5, w5, w8, w11
+	and	w5, w5, 65535
+	bne	.L80
+	adrp	x1, .LANCHOR8
+	ldrb	w1, [x1, #:lo12:.LANCHOR8]
+	cbnz	w1, .L80
+	adrp	x1, .LANCHOR16
+	add	x1, x1, :lo12:.LANCHOR16
+	ldrh	w6, [x1, w6, sxtw 1]
+.L80:
+	uxtw	x8, w10
+	adrp	x1, .LANCHOR17
+	add	x1, x1, :lo12:.LANCHOR17
+	cmp	w4, 1
+	ldr	w1, [x1, x8, lsl 2]
+	madd	w5, w5, w7, w1
+	add	w5, w5, w6
+	str	w5, [x2]
+	str	w10, [x3]
+	bls	.L82
+	ldr	w1, [x0, 4]
+	ldr	w0, [x0, 60]
+	add	w1, w1, 1024
+	cmp	w1, w0
+	cset	w0, eq
+	ret
+.L82:
+	mov	w0, 0
+	ret
+	.size	LogAddr2PhyAddr, .-LogAddr2PhyAddr
+	.section	.text.FlashReadStatusEN,"ax",@progbits
+	.align	2
+	.global	FlashReadStatusEN
+	.type	FlashReadStatusEN, %function
+FlashReadStatusEN:
+	stp	x29, x30, [sp, -32]!
+	ubfiz	x0, x0, 4, 8
+	adrp	x3, .LANCHOR6
+	add	x3, x3, :lo12:.LANCHOR6
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	add	x4, x3, x0
+	ldr	x20, [x3, x0]
+	adrp	x0, .LANCHOR18
+	ldr	x0, [x0, #:lo12:.LANCHOR18]
+	ldrb	w19, [x4, 8]
+	ldrb	w0, [x0, 8]
+	cmp	w0, 2
+	bne	.L84
+	and	w2, w2, 255
+	adrp	x0, .LANCHOR7
+	cbnz	w2, .L85
+	add	x2, x0, :lo12:.LANCHOR7
+	ldrb	w3, [x2, 13]
+.L95:
+	add	x2, x19, 8
+	add	x0, x0, :lo12:.LANCHOR7
+	add	x2, x20, x2, lsl 8
+	str	w3, [x2, 8]
+	ldrb	w4, [x0, 15]
+	cbz	w4, .L89
+	add	x3, x19, 8
+	mov	w2, 0
+	add	x3, x20, x3, lsl 8
+.L88:
+	cmp	w2, w4
+	bcc	.L90
+.L89:
+	add	x19, x19, 8
+	mov	x0, 80
+	lsl	x19, x19, 8
+	bl	udelay
+	ldr	w0, [x20, x19]
+	ldp	x19, x20, [sp, 16]
+	and	w0, w0, 255
+	ldp	x29, x30, [sp], 32
+	ret
+.L85:
+	add	x2, x0, :lo12:.LANCHOR7
+	ldrb	w3, [x2, 14]
+	b	.L95
+.L90:
+	lsl	w0, w2, 3
+	add	w2, w2, 1
+	lsr	w0, w1, w0
+	and	w0, w0, 255
+	str	w0, [x3, 4]
+	b	.L88
+.L84:
+	add	x0, x19, 8
+	mov	w1, 112
+	add	x0, x20, x0, lsl 8
+	str	w1, [x0, 8]
+	b	.L89
+	.size	FlashReadStatusEN, .-FlashReadStatusEN
+	.section	.text.FlashWaitReadyEN,"ax",@progbits
+	.align	2
+	.global	FlashWaitReadyEN
+	.type	FlashWaitReadyEN, %function
+FlashWaitReadyEN:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w19, w0, 255
+	str	x21, [sp, 32]
+	mov	w20, w1
+	and	w21, w2, 255
+.L100:
+	mov	w1, w20
+	mov	w2, w21
+	mov	w0, w19
+	bl	FlashReadStatusEN
+	mov	w1, w0
+	cmp	w0, 255
+	beq	.L100
+	tbz	x1, 6, .L100
+	ldp	x19, x20, [sp, 16]
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
+	.size	FlashWaitReadyEN, .-FlashWaitReadyEN
+	.section	.text.NandcReadDontCaseBusyEn,"ax",@progbits
+	.align	2
+	.global	NandcReadDontCaseBusyEn
+	.type	NandcReadDontCaseBusyEn, %function
+NandcReadDontCaseBusyEn:
+	ret
+	.size	NandcReadDontCaseBusyEn, .-NandcReadDontCaseBusyEn
+	.section	.text.NandcGetChipIf,"ax",@progbits
+	.align	2
+	.global	NandcGetChipIf
+	.type	NandcGetChipIf, %function
+NandcGetChipIf:
+	ubfiz	x0, x0, 4, 8
+	adrp	x1, .LANCHOR6
+	add	x1, x1, :lo12:.LANCHOR6
+	add	x2, x1, x0
+	ldr	x0, [x1, x0]
+	ldrb	w2, [x2, 8]
+	add	x2, x2, 8
+	add	x0, x0, x2, lsl 8
+	ret
+	.size	NandcGetChipIf, .-NandcGetChipIf
+	.section	.text.NandcSetDdrPara,"ax",@progbits
+	.align	2
+	.global	NandcSetDdrPara
+	.type	NandcSetDdrPara, %function
+NandcSetDdrPara:
+	adrp	x1, .LANCHOR19
+	and	w0, w0, 255
+	lsl	w2, w0, 8
+	ldr	x1, [x1, #:lo12:.LANCHOR19]
+	orr	w0, w2, w0, lsl 16
+	orr	w0, w0, 1
+	str	w0, [x1, 304]
+	ret
+	.size	NandcSetDdrPara, .-NandcSetDdrPara
+	.section	.text.NandcSetDdrDiv,"ax",@progbits
+	.align	2
+	.global	NandcSetDdrDiv
+	.type	NandcSetDdrDiv, %function
+NandcSetDdrDiv:
+	adrp	x1, .LANCHOR19
+	and	w0, w0, 255
+	mov	w2, 16640
+	orr	w0, w0, w2
+	ldr	x1, [x1, #:lo12:.LANCHOR19]
+	str	w0, [x1, 344]
+	ret
+	.size	NandcSetDdrDiv, .-NandcSetDdrDiv
+	.section	.text.NandcSetDdrMode,"ax",@progbits
+	.align	2
+	.global	NandcSetDdrMode
+	.type	NandcSetDdrMode, %function
+NandcSetDdrMode:
+	adrp	x1, .LANCHOR19
+	cmp	w0, 0
+	ldr	x2, [x1, #:lo12:.LANCHOR19]
+	ldr	w1, [x2]
+	and	w3, w1, -8193
+	orr	w1, w1, 253952
+	csel	w1, w1, w3, ne
+	str	w1, [x2]
+	ret
+	.size	NandcSetDdrMode, .-NandcSetDdrMode
+	.section	.text.NandcSetMode,"ax",@progbits
+	.align	2
+	.global	NandcSetMode
+	.type	NandcSetMode, %function
+NandcSetMode:
+	adrp	x1, .LANCHOR19
+	and	w0, w0, 255
+	tst	w0, 6
+	ldr	x2, [x1, #:lo12:.LANCHOR19]
+	ldr	w1, [x2]
+	beq	.L112
+	orr	w1, w1, 24576
+	tst	x0, 4
+	and	w1, w1, -32769
+	mov	w0, 16641
+	orr	w1, w1, 196608
+	str	w0, [x2, 344]
+	mov	w0, 6659
+	orr	w3, w1, 32768
+	movk	w0, 0x1a, lsl 16
+	str	w0, [x2, 304]
+	csel	w1, w3, w1, ne
+	mov	w0, 38
+	str	w0, [x2, 308]
+	mov	w0, 39
+	str	w0, [x2, 308]
+.L114:
+	mov	w0, 0
+	str	w1, [x2]
+	ret
+.L112:
+	and	w1, w1, -8193
+	b	.L114
+	.size	NandcSetMode, .-NandcSetMode
+	.section	.text.NandcFlashCs,"ax",@progbits
+	.align	2
+	.global	NandcFlashCs
+	.type	NandcFlashCs, %function
+NandcFlashCs:
+	ubfiz	x0, x0, 4, 8
+	adrp	x1, .LANCHOR6
+	add	x1, x1, :lo12:.LANCHOR6
+	add	x3, x1, x0
+	ldr	x2, [x1, x0]
+	mov	w1, 1
+	ldrb	w3, [x3, 8]
+	ldr	w0, [x2]
+	lsl	w1, w1, w3
+	bfi	w0, w1, 0, 8
+	str	w0, [x2]
+	ret
+	.size	NandcFlashCs, .-NandcFlashCs
+	.section	.text.NandcFlashDeCs,"ax",@progbits
+	.align	2
+	.global	NandcFlashDeCs
+	.type	NandcFlashDeCs, %function
+NandcFlashDeCs:
+	ubfiz	x0, x0, 4, 8
+	adrp	x1, .LANCHOR6
+	add	x1, x1, :lo12:.LANCHOR6
+	ldr	x1, [x1, x0]
+	ldr	w0, [x1]
+	and	w0, w0, -256
+	and	w0, w0, -131073
+	str	w0, [x1]
+	ret
+	.size	NandcFlashDeCs, .-NandcFlashDeCs
+	.section	.text.HynixSetRRPara,"ax",@progbits
+	.align	2
+	.global	HynixSetRRPara
+	.type	HynixSetRRPara, %function
+HynixSetRRPara:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	and	w22, w0, 255
+	adrp	x0, .LANCHOR18
+	stp	x19, x20, [sp, 16]
+	stp	x25, x26, [sp, 64]
+	mov	x21, x2
+	ldr	x0, [x0, #:lo12:.LANCHOR18]
+	and	w26, w1, 255
+	stp	x23, x24, [sp, 48]
+	and	w20, w3, 255
+	adrp	x19, .LANCHOR20
+	ldrb	w0, [x0, 19]
+	cmp	w0, 6
+	bne	.L120
+	add	x0, x19, :lo12:.LANCHOR20
+	ubfiz	x19, x22, 6, 8
+	add	x19, x19, 20
+	add	x19, x19, x20, uxtw 2
+.L126:
+	add	x19, x0, x19
+.L121:
+	sxtw	x25, w22
+	adrp	x0, .LANCHOR6
+	lsl	x1, x25, 4
+	add	x0, x0, :lo12:.LANCHOR6
+	add	x2, x0, x1
+	and	x26, x26, 255
+	mov	x24, 0
+	ldr	x23, [x0, x1]
+	mov	w0, w22
+	ldrb	w5, [x2, 8]
+	bl	NandcFlashCs
+	ubfiz	x5, x5, 8, 8
+	add	x23, x23, x5
+	mov	w0, 54
+	str	w0, [x23, 2056]
+.L123:
+	cmp	x24, x26
+	bne	.L124
+	mov	w0, 22
+	str	w0, [x23, 2056]
+	mov	w0, w22
+	bl	NandcFlashDeCs
+	adrp	x0, .LANCHOR21
+	add	x0, x0, :lo12:.LANCHOR21
+	strb	w20, [x0, x25]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L120:
+	cmp	w0, 7
+	add	x0, x19, :lo12:.LANCHOR20
+	bne	.L122
+	mov	w19, 160
+	mov	x1, 28
+	umaddl	x1, w19, w22, x1
+	mov	w19, 10
+	umaddl	x19, w20, w19, x1
+	b	.L126
+.L122:
+	and	x19, x20, 255
+	add	x19, x19, 2
+	add	x19, x19, x22, uxtw 3
+	add	x19, x0, x19, lsl 3
+	add	x19, x19, 4
+	b	.L121
+.L124:
+	ldrb	w0, [x21, x24]
+	str	w0, [x23, 2052]
+	mov	x0, 200
+	bl	udelay
+	ldrsb	w0, [x19, x24]
+	add	x24, x24, 1
+	str	w0, [x23, 2048]
+	b	.L123
+	.size	HynixSetRRPara, .-HynixSetRRPara
+	.section	.text.FlashSetReadRetryDefault,"ax",@progbits
+	.align	2
+	.global	FlashSetReadRetryDefault
+	.type	FlashSetReadRetryDefault, %function
+FlashSetReadRetryDefault:
+	adrp	x0, .LANCHOR18
+	ldr	x0, [x0, #:lo12:.LANCHOR18]
+	ldrb	w0, [x0, 19]
+	sub	w0, w0, #1
+	and	w0, w0, 255
+	cmp	w0, 6
+	bhi	.L134
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR20
+	add	x20, x20, :lo12:.LANCHOR20
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR22
+	add	x22, x20, 4
+	add	x21, x21, :lo12:.LANCHOR22
+	mov	x19, 0
+.L130:
+	lsl	x1, x19, 3
+	and	w0, w19, 255
+	ldrb	w1, [x1, x21]
+	cmp	w1, 173
+	bne	.L129
+	ldrb	w1, [x20, 1]
+	mov	w3, 0
+	mov	x2, x22
+	bl	HynixSetRRPara
+.L129:
+	add	x19, x19, 1
+	cmp	x19, 4
+	bne	.L130
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
+.L134:
+	ret
+	.size	FlashSetReadRetryDefault, .-FlashSetReadRetryDefault
+	.section	.text.FlashWaitCmdDone,"ax",@progbits
+	.align	2
+	.global	FlashWaitCmdDone
+	.type	FlashWaitCmdDone, %function
+FlashWaitCmdDone:
+	and	x4, x0, 255
+	mov	x0, 24
+	stp	x29, x30, [sp, -32]!
+	adrp	x1, .LANCHOR23
+	add	x1, x1, :lo12:.LANCHOR23
+	mul	x0, x4, x0
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	add	x19, x1, x0
+	ldr	x2, [x19, 8]
+	cbz	x2, .L139
+	ldrb	w20, [x1, x0]
+	mov	w0, w20
+	bl	NandcFlashCs
+	adrp	x0, .LANCHOR17
+	add	x0, x0, :lo12:.LANCHOR17
+	ldr	w1, [x19, 4]
+	ldr	w0, [x0, x4, lsl 2]
+	cmp	w0, 0
+	mov	w0, w20
+	cset	w2, ne
+	bl	FlashWaitReadyEN
+	mov	w2, w0
+	mov	w0, w20
+	bl	NandcFlashDeCs
+	sbfx	x0, x2, 0, 1
+	ldr	x1, [x19, 8]
+	str	w0, [x1]
+	ldr	x1, [x19, 16]
+	str	xzr, [x19, 8]
+	cbz	x1, .L139
+	str	w0, [x1]
+	str	xzr, [x19, 16]
+.L139:
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	FlashWaitCmdDone, .-FlashWaitCmdDone
+	.section	.text.NandcDelayns,"ax",@progbits
+	.align	2
+	.global	NandcDelayns
+	.type	NandcDelayns, %function
+NandcDelayns:
+	stp	x29, x30, [sp, -16]!
+	uxtw	x0, w0
+	add	x29, sp, 0
+	bl	udelay
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	NandcDelayns, .-NandcDelayns
+	.section	.text.NandcWaitFlashReady,"ax",@progbits
+	.align	2
+	.global	NandcWaitFlashReady
+	.type	NandcWaitFlashReady, %function
+NandcWaitFlashReady:
+	stp	x29, x30, [sp, -48]!
+	ubfiz	x0, x0, 4, 8
+	adrp	x1, .LANCHOR6
+	add	x1, x1, :lo12:.LANCHOR6
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w19, 34464
+	ldr	x20, [x1, x0]
+	movk	w19, 0x1, lsl 16
+.L149:
+	mov	x0, 100
+	bl	udelay
+	ldr	w0, [x20]
+	str	w0, [x29, 40]
+	ldr	w0, [x29, 40]
+	tbnz	x0, 9, .L150
+	subs	w19, w19, #1
+	bne	.L149
+	mov	w0, -1
+.L147:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+.L150:
+	mov	w0, 0
+	b	.L147
+	.size	NandcWaitFlashReady, .-NandcWaitFlashReady
+	.section	.text.FlashReset,"ax",@progbits
+	.align	2
+	.global	FlashReset
+	.type	FlashReset, %function
+FlashReset:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	and	w19, w0, 255
+	sbfiz	x1, x19, 4, 32
+	adrp	x0, .LANCHOR6
+	add	x0, x0, :lo12:.LANCHOR6
+	add	x2, x0, x1
+	ldr	x5, [x0, x1]
+	mov	w0, w19
+	ldrb	w4, [x2, 8]
+	bl	NandcFlashCs
+	add	x4, x4, 8
+	add	x4, x5, x4, lsl 8
+	mov	w0, 255
+	str	w0, [x4, 8]
+	mov	w0, w19
+	bl	NandcWaitFlashReady
+	mov	w0, w19
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	b	NandcFlashDeCs
+	.size	FlashReset, .-FlashReset
+	.section	.text.FlashEraseBlock,"ax",@progbits
+	.align	2
+	.global	FlashEraseBlock
+	.type	FlashEraseBlock, %function
+FlashEraseBlock:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w19, w0, 255
+	mov	w20, w1
+	str	x21, [sp, 32]
+	mov	w0, w19
+	mov	w21, w2
+	bl	NandcWaitFlashReady
+	mov	w0, w19
+	bl	NandcFlashCs
+	mov	w2, w21
+	mov	w1, w20
+	mov	w0, w19
+	bl	FlashEraseCmd
+	mov	w0, w19
+	bl	NandcWaitFlashReady
+	mov	w1, w20
+	mov	w0, w19
+	bl	FlashReadStatus
+	mov	w2, w0
+	mov	w0, w19
+	bl	NandcFlashDeCs
+	ldr	x21, [sp, 32]
+	and	w0, w2, 1
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+	.size	FlashEraseBlock, .-FlashEraseBlock
+	.section	.text.FlashSetInterfaceMode,"ax",@progbits
+	.align	2
+	.global	FlashSetInterfaceMode
+	.type	FlashSetInterfaceMode, %function
+FlashSetInterfaceMode:
+	stp	x29, x30, [sp, -16]!
+	adrp	x1, .LANCHOR24
+	adrp	x2, .LANCHOR6
+	add	x2, x2, :lo12:.LANCHOR6
+	add	x29, sp, 0
+	ldrb	w1, [x1, #:lo12:.LANCHOR24]
+	adrp	x7, .LANCHOR22
+	add	x2, x2, 8
+	add	x7, x7, :lo12:.LANCHOR22
+	and	w12, w1, 4
+	and	w6, w1, 1
+	mov	x5, 0
+	mov	w13, 69
+	mov	w8, 239
+	mov	w10, 128
+	mov	w11, 1
+	mov	w14, 35
+	mov	w15, 32
+	mov	w16, 5
+	mov	w17, 44
+.L167:
+	ldrb	w3, [x5, x7]
+	ldrb	w4, [x2]
+	cmp	w3, 152
+	ccmp	w3, w13, 4, ne
+	beq	.L158
+	cmp	w3, 173
+	ccmp	w3, w17, 4, ne
+	bne	.L159
+.L158:
+	cmp	w0, 1
+	ldr	x1, [x2, -8]
+	bne	.L160
+	cbz	w6, .L159
+	ubfiz	x4, x4, 8, 8
+	cmp	w3, 173
+	add	x1, x1, x4
+	str	w8, [x1, 2056]
+	bne	.L161
+	str	w0, [x1, 2052]
+.L179:
+	str	wzr, [x1, 2048]
+	b	.L165
+.L161:
+	cmp	w3, 44
+	bne	.L163
+	str	w0, [x1, 2052]
+	str	w16, [x1, 2048]
+.L165:
+	str	wzr, [x1, 2048]
+	str	wzr, [x1, 2048]
+	str	wzr, [x1, 2048]
+.L159:
+	add	x5, x5, 8
+	add	x2, x2, 16
+	cmp	x5, 32
+	bne	.L167
+	mov	w0, 0
+	bl	NandcWaitFlashReady
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+.L163:
+	str	w10, [x1, 2052]
+	str	w0, [x1, 2048]
+	b	.L165
+.L160:
+	cbz	w12, .L159
+	ubfiz	x4, x4, 8, 8
+	cmp	w3, 173
+	add	x1, x1, x4
+	str	w8, [x1, 2056]
+	bne	.L164
+	str	w11, [x1, 2052]
+	str	w15, [x1, 2048]
+	b	.L165
+.L164:
+	cmp	w3, 44
+	bne	.L166
+	str	w11, [x1, 2052]
+	str	w14, [x1, 2048]
+	b	.L165
+.L166:
+	str	w10, [x1, 2052]
+	b	.L179
+	.size	FlashSetInterfaceMode, .-FlashSetInterfaceMode
+	.section	.text.SandiskSetRRPara,"ax",@progbits
+	.align	2
+	.global	SandiskSetRRPara
+	.type	SandiskSetRRPara, %function
+SandiskSetRRPara:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x20, x0
+	mov	w0, 239
+	and	w19, w1, 255
+	str	w0, [x20, 8]
+	mov	w0, 17
+	str	w0, [x20, 4]
+	mov	x0, 200
+	bl	udelay
+	adrp	x0, .LANCHOR13
+	add	w1, w19, 1
+	adrp	x2, .LANCHOR9
+	add	x2, x2, :lo12:.LANCHOR9
+	ldrb	w3, [x0, #:lo12:.LANCHOR13]
+	adrp	x0, .LANCHOR11
+	ldrb	w4, [x0, #:lo12:.LANCHOR11]
+	mov	w0, 5
+	umull	x1, w1, w0
+	adrp	x0, .LANCHOR10
+	add	x0, x0, :lo12:.LANCHOR10
+	add	x2, x2, x1
+	add	x1, x0, x1
+	mov	x0, 0
+.L181:
+	cmp	w3, w0
+	bhi	.L184
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x29, x30, [sp], 32
+	b	NandcWaitFlashReady
+.L184:
+	cmp	w4, 67
+	bne	.L182
+	ldrsb	w5, [x1, x0]
+.L186:
+	add	x0, x0, 1
+	str	w5, [x20]
+	b	.L181
+.L182:
+	ldrsb	w5, [x2, x0]
+	b	.L186
+	.size	SandiskSetRRPara, .-SandiskSetRRPara
+	.section	.text.FlashEraseSLc2KBlocks,"ax",@progbits
+	.align	2
+	.global	FlashEraseSLc2KBlocks
+	.type	FlashEraseSLc2KBlocks, %function
+FlashEraseSLc2KBlocks:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	mov	w22, 56
+	stp	x23, x24, [sp, 48]
+	and	w21, w1, 255
+	umaddl	x22, w1, w22, x0
+	stp	x19, x20, [sp, 16]
+	adrp	x23, .LANCHOR25
+	mov	x20, x0
+	add	x23, x23, :lo12:.LANCHOR25
+	adrp	x24, .LANCHOR26
+.L188:
+	cmp	x20, x22
+	bne	.L193
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	ret
+.L193:
+	mov	w1, 0
+	mov	w4, w21
+	add	x3, x29, 76
+	add	x2, x29, 72
+	mov	x0, x20
+	bl	LogAddr2PhyAddr
+	ldrb	w1, [x23]
+	ldr	w0, [x29, 76]
+	cmp	w1, w0
+	bhi	.L189
+	mov	w0, -1
+	str	w0, [x20]
+.L190:
+	sub	w21, w21, #1
+	add	x20, x20, 56
+	and	w21, w21, 255
+	b	.L188
+.L189:
+	uxtw	x0, w0
+	add	x1, x24, :lo12:.LANCHOR26
+	ldrb	w19, [x1, x0]
+	mov	x1, 24
+	mul	x0, x0, x1
+	adrp	x1, .LANCHOR23
+	add	x1, x1, :lo12:.LANCHOR23
+	strb	w19, [x1, x0]
+	mov	w0, w19
+	bl	NandcWaitFlashReady
+	mov	w0, w19
+	bl	NandcFlashCs
+	ldr	w1, [x29, 72]
+	mov	w2, 0
+	mov	w0, w19
+	bl	FlashEraseCmd
+	mov	w0, w19
+	bl	NandcWaitFlashReady
+	ldr	w1, [x29, 72]
+	mov	w0, w19
+	bl	FlashReadStatus
+	sbfx	x0, x0, 0, 1
+	str	w0, [x20]
+	adrp	x0, .LANCHOR3
+	ldr	w1, [x29, 72]
+	mov	w2, 0
+	ldr	w0, [x0, #:lo12:.LANCHOR3]
+	add	w1, w1, w0
+	mov	w0, w19
+	bl	FlashEraseCmd
+	mov	w0, w19
+	bl	NandcWaitFlashReady
+	ldr	w1, [x29, 72]
+	mov	w0, w19
+	bl	FlashReadStatus
+	tbz	x0, 0, .L191
+	mov	w0, -1
+	str	w0, [x20]
+.L191:
+	ldr	w0, [x20]
+	cmn	w0, #1
+	bne	.L192
+	ldr	w1, [x29, 72]
+	adrp	x0, .LC1
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L192:
+	mov	w0, w19
+	bl	NandcFlashDeCs
+	b	.L190
+	.size	FlashEraseSLc2KBlocks, .-FlashEraseSLc2KBlocks
+	.section	.text.FlashEraseBlocks,"ax",@progbits
+	.align	2
+	.global	FlashEraseBlocks
+	.type	FlashEraseBlocks, %function
+FlashEraseBlocks:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	mov	w24, w1
+	adrp	x1, .LANCHOR1
+	stp	x21, x22, [sp, 32]
+	stp	x19, x20, [sp, 16]
+	mov	w22, w2
+	ldrb	w1, [x1, #:lo12:.LANCHOR1]
+	stp	x25, x26, [sp, 64]
+	cbnz	w1, .L199
+	adrp	x25, .LANCHOR23
+	mov	x23, x0
+	add	x26, x25, :lo12:.LANCHOR23
+	mov	w19, 0
+.L200:
+	cmp	w19, w22
+	adrp	x13, .LANCHOR25
+	bcc	.L209
+	adrp	x20, .LANCHOR8
+	adrp	x21, .LANCHOR23
+	add	x22, x13, :lo12:.LANCHOR25
+	add	x20, x20, :lo12:.LANCHOR8
+	add	x21, x21, :lo12:.LANCHOR23
+	mov	x19, 0
+.L210:
+	ldrb	w0, [x22]
+	cmp	w0, w19
+	bhi	.L212
+	mov	w0, 0
+	b	.L198
+.L199:
+	mov	w1, w2
+	bl	FlashEraseSLc2KBlocks
+.L198:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	ret
+.L209:
+	mov	w12, 56
+	mov	w1, 0
+	sub	w4, w22, w19
+	add	x3, x29, 92
+	umull	x12, w19, w12
+	add	x2, x29, 88
+	add	x20, x23, x12
+	mov	x0, x20
+	bl	LogAddr2PhyAddr
+	mov	w21, w0
+	ldrb	w1, [x13, #:lo12:.LANCHOR25]
+	ldr	w0, [x29, 92]
+	cmp	w1, w0
+	bhi	.L202
+	mov	w0, -1
+	str	w0, [x23, x12]
+.L203:
+	add	w19, w19, 1
+	b	.L200
+.L202:
+	adrp	x1, .LANCHOR27
+	add	x2, x25, :lo12:.LANCHOR23
+	mov	x3, 24
+	ldrb	w1, [x1, #:lo12:.LANCHOR27]
+	cmp	w1, 0
+	uxtw	x1, w0
+	csel	w21, w21, wzr, ne
+	madd	x1, x1, x3, x2
+	ldr	x1, [x1, 8]
+	cbz	x1, .L205
+	bl	FlashWaitCmdDone
+.L205:
+	ldp	w2, w1, [x29, 88]
+	mov	x0, 24
+	madd	x0, x1, x0, x26
+	str	w2, [x0, 4]
+	stp	x20, xzr, [x0, 8]
+	cbz	w21, .L206
+	add	w2, w19, 1
+	mov	w3, 56
+	umaddl	x2, w2, w3, x23
+	str	x2, [x0, 16]
+.L206:
+	adrp	x0, .LANCHOR26
+	add	x0, x0, :lo12:.LANCHOR26
+	ldrb	w20, [x0, x1]
+	mov	x0, 24
+	mul	x1, x1, x0
+	mov	w0, w20
+	strb	w20, [x26, x1]
+	bl	NandcFlashCs
+	cmp	w24, 1
+	bne	.L207
+	adrp	x0, .LANCHOR8
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	cbz	w0, .L207
+	mov	w0, w20
+	bl	flash_enter_slc_mode
+.L208:
+	ldr	w1, [x29, 92]
+	adrp	x0, .LANCHOR17
+	add	x0, x0, :lo12:.LANCHOR17
+	add	w19, w19, w21
+	ldr	w0, [x0, x1, lsl 2]
+	ldr	w1, [x29, 88]
+	cmp	w0, 0
+	mov	w0, w20
+	cset	w2, ne
+	bl	FlashWaitReadyEN
+	ldr	w1, [x29, 88]
+	mov	w2, w21
+	mov	w0, w20
+	bl	FlashEraseCmd
+	mov	w0, w20
+	bl	NandcFlashDeCs
+	b	.L203
+.L207:
+	mov	w0, w20
+	bl	flash_exit_slc_mode
+	b	.L208
+.L212:
+	mov	w0, w19
+	bl	FlashWaitCmdDone
+	cmp	w24, 1
+	bne	.L211
+	ldrb	w0, [x20]
+	cbz	w0, .L211
+	mov	x0, 24
+	mul	x0, x19, x0
+	ldrb	w0, [x0, x21]
+	bl	flash_exit_slc_mode
+.L211:
+	add	x19, x19, 1
+	b	.L210
+	.size	FlashEraseBlocks, .-FlashEraseBlocks
+	.section	.text.FlashReadDpCmd,"ax",@progbits
+	.align	2
+	.global	FlashReadDpCmd
+	.type	FlashReadDpCmd, %function
+FlashReadDpCmd:
+	stp	x29, x30, [sp, -64]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	and	w22, w0, 255
+	mov	w21, w1
+	adrp	x0, .LANCHOR6
+	sbfiz	x1, x22, 4, 32
+	add	x0, x0, :lo12:.LANCHOR6
+	add	x3, x0, x1
+	stp	x19, x20, [sp, 16]
+	stp	x23, x24, [sp, 48]
+	and	w4, w21, 255
+	ldr	x6, [x0, x1]
+	adrp	x0, .LANCHOR7
+	ldrb	w19, [x3, 8]
+	add	x0, x0, :lo12:.LANCHOR7
+	lsr	w3, w21, 8
+	and	w24, w2, 255
+	lsr	w23, w2, 8
+	lsr	w20, w2, 16
+	add	x19, x6, x19, lsl 8
+	ldrb	w5, [x0, 8]
+	ldrb	w1, [x0, 16]
+	ldrb	w0, [x0, 9]
+	str	w5, [x19, 2056]
+	cmp	w1, 1
+	lsr	w1, w21, 16
+	bne	.L227
+	str	wzr, [x19, 2052]
+	str	wzr, [x19, 2052]
+	str	w4, [x19, 2052]
+	str	w3, [x19, 2052]
+	str	w1, [x19, 2052]
+	str	w0, [x19, 2056]
+	mov	w0, w22
+	bl	NandcWaitFlashReady
+	str	wzr, [x19, 2056]
+	str	wzr, [x19, 2052]
+	str	wzr, [x19, 2052]
+.L230:
+	str	w24, [x19, 2052]
+	mov	w0, 48
+	str	w23, [x19, 2052]
+	mov	w1, w21
+	str	w20, [x19, 2052]
+	str	w0, [x19, 2056]
+	mov	w0, w22
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	b	FlashSetRandomizer
+.L227:
+	str	w4, [x19, 2052]
+	str	w3, [x19, 2052]
+	str	w1, [x19, 2052]
+	str	w0, [x19, 2056]
+	b	.L230
+	.size	FlashReadDpCmd, .-FlashReadDpCmd
+	.section	.text.FlashDeInit,"ax",@progbits
+	.align	2
+	.global	FlashDeInit
+	.type	FlashDeInit, %function
+FlashDeInit:
+	stp	x29, x30, [sp, -32]!
+	mov	w0, 0
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	bl	NandcWaitFlashReady
+	adrp	x19, .LANCHOR28
+	bl	FlashSetReadRetryDefault
+	ldrb	w0, [x19, #:lo12:.LANCHOR28]
+	cbz	w0, .L232
+	adrp	x0, .LANCHOR24
+	ldrb	w0, [x0, #:lo12:.LANCHOR24]
+	tbz	x0, 0, .L232
+	mov	w0, 1
+	bl	FlashSetInterfaceMode
+	mov	w0, 1
+	bl	NandcSetMode
+	strb	wzr, [x19, #:lo12:.LANCHOR28]
+.L232:
+	adrp	x0, .LANCHOR6
+	ldr	x0, [x0, #:lo12:.LANCHOR6]
+	str	wzr, [x0, 336]
+	mov	w0, 0
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	FlashDeInit, .-FlashDeInit
+	.section	.text.NandcRandmzSel,"ax",@progbits
+	.align	2
+	.global	NandcRandmzSel
+	.type	NandcRandmzSel, %function
+NandcRandmzSel:
+	ubfiz	x0, x0, 4, 8
+	adrp	x2, .LANCHOR6
+	add	x2, x2, :lo12:.LANCHOR6
+	ldr	x0, [x2, x0]
+	str	w1, [x0, 336]
+	ret
+	.size	NandcRandmzSel, .-NandcRandmzSel
+	.section	.text.NandcTimeCfg,"ax",@progbits
+	.align	2
+	.global	NandcTimeCfg
+	.type	NandcTimeCfg, %function
+NandcTimeCfg:
+	cmp	w0, 35
+	adrp	x1, .LANCHOR19
+	bhi	.L242
+	ldr	x0, [x1, #:lo12:.LANCHOR19]
+	mov	w1, 4193
+.L245:
+	str	w1, [x0, 4]
+	ret
+.L242:
+	cmp	w0, 99
+	ldr	x0, [x1, #:lo12:.LANCHOR19]
+	bls	.L244
+	mov	w1, 8322
+	b	.L245
+.L244:
+	mov	w1, 4225
+	b	.L245
+	.size	NandcTimeCfg, .-NandcTimeCfg
+	.section	.text.FlashTimingCfg,"ax",@progbits
+	.align	2
+	.global	FlashTimingCfg
+	.type	FlashTimingCfg, %function
+FlashTimingCfg:
+	adrp	x0, .LANCHOR29+21
+	ldrb	w0, [x0, #:lo12:.LANCHOR29+21]
+	b	NandcTimeCfg
+	.size	FlashTimingCfg, .-FlashTimingCfg
+	.section	.text.NandcBchSel,"ax",@progbits
+	.align	2
+	.global	NandcBchSel
+	.type	NandcBchSel, %function
+NandcBchSel:
+	adrp	x1, .LANCHOR19
+	and	w0, w0, 255
+	cmp	w0, 16
+	ldr	x2, [x1, #:lo12:.LANCHOR19]
+	mov	w1, 1
+	str	w1, [x2, 8]
+	adrp	x1, .LANCHOR30
+	str	w0, [x1, #:lo12:.LANCHOR30]
+	mov	w1, 4096
+	bne	.L248
+.L251:
+	and	w1, w1, -17
+.L249:
+	orr	w1, w1, 1
+	str	w1, [x2, 12]
+	ret
+.L248:
+	cmp	w0, 24
+	bne	.L250
+	orr	w1, w1, 16
+	b	.L249
+.L250:
+	orr	w1, w1, 262144
+	cmp	w0, 40
+	orr	w1, w1, 16
+	bne	.L249
+	b	.L251
+	.size	NandcBchSel, .-NandcBchSel
+	.section	.text.FlashBchSel,"ax",@progbits
+	.align	2
+	.global	FlashBchSel
+	.type	FlashBchSel, %function
+FlashBchSel:
+	adrp	x1, .LANCHOR31
+	and	w0, w0, 255
+	strb	w0, [x1, #:lo12:.LANCHOR31]
+	b	NandcBchSel
+	.size	FlashBchSel, .-FlashBchSel
+	.section	.text.NandCIrqEnable,"ax",@progbits
+	.align	2
+	.global	NandCIrqEnable
+	.type	NandCIrqEnable, %function
+NandCIrqEnable:
+	ret
+	.size	NandCIrqEnable, .-NandCIrqEnable
+	.section	.text.NandCIrqDisable,"ax",@progbits
+	.align	2
+	.global	NandCIrqDisable
+	.type	NandCIrqDisable, %function
+NandCIrqDisable:
+	ret
+	.size	NandCIrqDisable, .-NandCIrqDisable
+	.section	.text.rk_nandc_get_irq_status,"ax",@progbits
+	.align	2
+	.global	rk_nandc_get_irq_status
+	.type	rk_nandc_get_irq_status, %function
+rk_nandc_get_irq_status:
+	ldr	w0, [x0, 372]
+	ret
+	.size	rk_nandc_get_irq_status, .-rk_nandc_get_irq_status
+	.section	.text.rk_nandc_flash_ready,"ax",@progbits
+	.align	2
+	.global	rk_nandc_flash_ready
+	.type	rk_nandc_flash_ready, %function
+rk_nandc_flash_ready:
+	ret
+	.size	rk_nandc_flash_ready, .-rk_nandc_flash_ready
+	.section	.text.NandcIqrWaitFlashReady,"ax",@progbits
+	.align	2
+	.global	NandcIqrWaitFlashReady
+	.type	NandcIqrWaitFlashReady, %function
+NandcIqrWaitFlashReady:
+	ret
+	.size	NandcIqrWaitFlashReady, .-NandcIqrWaitFlashReady
+	.section	.text.rk_nandc_flash_xfer_completed,"ax",@progbits
+	.align	2
+	.global	rk_nandc_flash_xfer_completed
+	.type	rk_nandc_flash_xfer_completed, %function
+rk_nandc_flash_xfer_completed:
+	ret
+	.size	rk_nandc_flash_xfer_completed, .-rk_nandc_flash_xfer_completed
+	.section	.text.NandcSendDumpDataStart,"ax",@progbits
+	.align	2
+	.global	NandcSendDumpDataStart
+	.type	NandcSendDumpDataStart, %function
+NandcSendDumpDataStart:
+	sub	sp, sp, #16
+	ldr	w2, [x0, 16]
+	mov	w1, 1066
+	movk	w1, 0x2020, lsl 16
+	str	w2, [sp, 8]
+	ldr	w2, [sp, 8]
+	and	w2, w2, -5
+	str	w2, [sp, 8]
+	ldr	w2, [sp, 8]
+	str	w2, [x0, 16]
+	str	w1, [x0, 8]
+	orr	w1, w1, 4
+	str	w1, [x0, 8]
+	add	sp, sp, 16
+	ret
+	.size	NandcSendDumpDataStart, .-NandcSendDumpDataStart
+	.section	.text.NandcSendDumpDataDone,"ax",@progbits
+	.align	2
+	.global	NandcSendDumpDataDone
+	.type	NandcSendDumpDataDone, %function
+NandcSendDumpDataDone:
+	sub	sp, sp, #16
+.L265:
+	ldr	w1, [x0, 8]
+	str	w1, [sp, 8]
+	ldr	w1, [sp, 8]
+	tbz	x1, 20, .L265
+	add	sp, sp, 16
+	ret
+	.size	NandcSendDumpDataDone, .-NandcSendDumpDataDone
+	.section	.text.NandcXferStart,"ax",@progbits
+	.align	2
+	.global	NandcXferStart
+	.type	NandcXferStart, %function
+NandcXferStart:
+	stp	x29, x30, [sp, -96]!
+	ubfiz	x0, x0, 4, 8
+	ubfx	x3, x3, 1, 7
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	and	w23, w1, 255
+	adrp	x1, .LANCHOR6
+	add	x1, x1, :lo12:.LANCHOR6
+	add	x6, x1, x0
+	stp	x21, x22, [sp, 32]
+	stp	x19, x20, [sp, 16]
+	ubfiz	w19, w23, 1, 1
+	ldr	x21, [x1, x0]
+	mov	w1, 16
+	ldrb	w0, [x6, 8]
+	orr	w19, w19, 8
+	str	x25, [sp, 64]
+	ldr	w22, [x21, 12]
+	bfi	w22, w1, 8, 8
+	and	w22, w22, -9
+	bfi	w22, w0, 5, 3
+	mov	w0, 1
+	bfi	w19, w0, 5, 2
+	adrp	x0, .LANCHOR32
+	orr	w19, w19, 536870912
+	orr	w19, w19, 1024
+	ldr	w0, [x0, #:lo12:.LANCHOR32]
+	bfi	w19, w3, 4, 1
+	cmp	w0, 3
+	bls	.L270
+	ldr	w0, [x21, 16]
+	cmp	x5, 0
+	str	w0, [x29, 88]
+	ccmp	x4, 0, 0, eq
+	ldr	w0, [x29, 88]
+	and	w0, w0, -5
+	str	w0, [x29, 88]
+	beq	.L271
+	and	w2, w2, 255
+	adrp	x20, .LANCHOR33
+	cbnz	w23, .L272
+.L280:
+	add	w2, w2, 1
+	ldr	x0, [x20, #:lo12:.LANCHOR33]
+	asr	w2, w2, 1
+	add	x20, x20, :lo12:.LANCHOR33
+	cmp	x4, 0
+	mov	x24, x4
+	bfi	w19, w2, 22, 6
+	csel	x0, x4, x0, ne
+	ldr	x1, [x20, 8]
+	ubfx	x25, x19, 22, 5
+	stp	x0, x1, [x20, 16]
+	stp	w0, w1, [x20, 32]
+	add	w1, w0, w25, lsl 10
+	uxtw	x0, w0
+	bl	flush_dcache_range
+	ldr	x0, [x20, 24]
+	add	w1, w0, w25, lsl 7
+	uxtw	x0, w0
+	bl	flush_dcache_range
+	mov	w0, 1
+	str	w0, [x20, 40]
+	ldr	w0, [x20, 32]
+	mov	w1, 16
+	str	w0, [x21, 20]
+	tst	x24, 3
+	ldr	w0, [x20, 36]
+	str	w0, [x21, 24]
+	str	wzr, [x29, 88]
+	ldr	w0, [x29, 88]
+	bfi	w0, w1, 9, 5
+	str	w0, [x29, 88]
+	ldr	w0, [x29, 88]
+	orr	w0, w0, 448
+	str	w0, [x29, 88]
+	bne	.L281
+	ldr	w0, [x29, 88]
+	mov	w1, 2
+	bfi	w0, w1, 3, 3
+	str	w0, [x29, 88]
+.L281:
+	ldr	w0, [x29, 88]
+	cmp	w23, 0
+	cset	w1, eq
+	orr	w0, w0, 4
+	str	w0, [x29, 88]
+	ldr	w0, [x29, 88]
+	bfi	w0, w1, 1, 1
+	str	w0, [x29, 88]
+	ldr	w0, [x29, 88]
+	orr	w0, w0, 1
+	str	w0, [x29, 88]
+.L271:
+	ldr	w0, [x29, 88]
+	str	w0, [x21, 16]
+.L270:
+	str	w22, [x21, 12]
+	str	w19, [x21, 8]
+	orr	w19, w19, 4
+	str	w19, [x21, 8]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	ret
+.L272:
+	adrp	x0, .LANCHOR30
+	mov	w6, 64
+	lsr	w11, w2, 1
+	mov	x1, x5
+	ldr	w0, [x0, #:lo12:.LANCHOR30]
+	mov	w7, 0
+	mov	w3, 0
+	mov	w12, -1
+	cmp	w0, 25
+	mov	w0, 128
+	csel	w6, w6, w0, cc
+	add	x0, x20, :lo12:.LANCHOR33
+	ldr	x10, [x0, 8]
+.L276:
+	cmp	w3, w11
+	bcs	.L280
+	lsr	w0, w7, 2
+	lsl	w0, w0, 2
+	cbz	x5, .L277
+	ldrh	w13, [x1]
+	add	x1, x1, 4
+	ldrh	w8, [x1, -2]
+	orr	x8, x13, x8, lsl 16
+	str	w8, [x10, x0]
+.L278:
+	add	w3, w3, 1
+	add	w7, w7, w6
+	b	.L276
+.L277:
+	str	w12, [x10, x0]
+	b	.L278
+	.size	NandcXferStart, .-NandcXferStart
+	.section	.text.NandcXferComp,"ax",@progbits
+	.align	2
+	.global	NandcXferComp
+	.type	NandcXferComp, %function
+NandcXferComp:
+	ubfiz	x0, x0, 4, 8
+	adrp	x1, .LANCHOR6
+	add	x1, x1, :lo12:.LANCHOR6
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	ldr	x3, [x1, x0]
+	adrp	x0, .LANCHOR32
+	str	x19, [sp, 16]
+	ldr	w2, [x0, #:lo12:.LANCHOR32]
+	cmp	w2, 3
+	bls	.L311
+	ldr	w0, [x3, 16]
+	tbz	x0, 2, .L311
+	ldr	w0, [x3, 16]
+	tbz	x0, 1, .L299
+	ldr	w0, [x3, 8]
+	str	w0, [x29, 32]
+.L292:
+	ldr	w1, [x3, 28]
+	ldr	w0, [x29, 32]
+	ubfx	x1, x1, 16, 5
+	ubfx	x0, x0, 22, 6
+	cmp	w1, w0
+	bge	.L296
+	cmp	w2, 5
+	bls	.L292
+	ldr	w0, [x3]
+	str	w0, [x29, 40]
+	ldr	w0, [x29, 40]
+	tbz	x0, 13, .L292
+	ldr	w0, [x29, 40]
+	tbz	x0, 17, .L292
+.L296:
+	adrp	x19, .LANCHOR33
+	add	x19, x19, :lo12:.LANCHOR33
+	ldr	w0, [x19, 40]
+	cbz	w0, .L297
+	ldr	w1, [x29, 32]
+	ldr	w0, [x19, 32]
+	ubfx	x1, x1, 22, 5
+	add	w1, w0, w1, lsl 10
+	uxtw	x0, w0
+	bl	invalidate_dcache_range
+	ldr	w1, [x29, 32]
+	ldr	w0, [x19, 36]
+	ubfx	x1, x1, 22, 5
+	add	w1, w0, w1, lsl 7
+	uxtw	x0, w0
+	bl	invalidate_dcache_range
+.L297:
+	adrp	x0, .LANCHOR33+40
+	str	wzr, [x0, #:lo12:.LANCHOR33+40]
+.L288:
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+.L299:
+	ldr	w0, [x3, 8]
+	str	w0, [x29, 32]
+	ldr	w0, [x29, 32]
+	tbz	x0, 20, .L299
+	adrp	x0, .LANCHOR34
+	mov	x4, x0
+	ldr	w1, [x0, #:lo12:.LANCHOR34]
+	cbz	w1, .L300
+	mov	x0, x3
+	bl	NandcSendDumpDataStart
+.L300:
+	ldr	w0, [x4, #:lo12:.LANCHOR34]
+	cbz	w0, .L297
+	mov	x0, x3
+	bl	NandcSendDumpDataDone
+	b	.L297
+.L311:
+	ldr	w0, [x3, 8]
+	str	w0, [x29, 32]
+	ldr	w0, [x29, 32]
+	tbz	x0, 20, .L311
+	b	.L288
+	.size	NandcXferComp, .-NandcXferComp
+	.section	.text.Ftl_log2,"ax",@progbits
+	.align	2
+	.global	Ftl_log2
+	.type	Ftl_log2, %function
+Ftl_log2:
+	mov	w2, 1
+	mov	w1, 0
+.L320:
+	cmp	w2, w0
+	bls	.L321
+	sub	w0, w1, #1
+	ret
+.L321:
+	add	w1, w1, 1
+	lsl	w2, w2, 1
+	and	w1, w1, 65535
+	b	.L320
+	.size	Ftl_log2, .-Ftl_log2
+	.section	.text.FtlPrintInfo,"ax",@progbits
+	.align	2
+	.global	FtlPrintInfo
+	.type	FtlPrintInfo, %function
+FtlPrintInfo:
+	ret
+	.size	FtlPrintInfo, .-FtlPrintInfo
+	.section	.text.FtlSysBlkNumInit,"ax",@progbits
+	.align	2
+	.global	FtlSysBlkNumInit
+	.type	FtlSysBlkNumInit, %function
+FtlSysBlkNumInit:
+	and	w0, w0, 65535
+	mov	w1, 24
+	cmp	w0, 24
+	adrp	x2, .LANCHOR37
+	csel	w0, w0, w1, cs
+	adrp	x1, .LANCHOR35
+	and	w0, w0, 65535
+	str	w0, [x1, #:lo12:.LANCHOR35]
+	adrp	x1, .LANCHOR36
+	ldrh	w1, [x1, #:lo12:.LANCHOR36]
+	mul	w1, w1, w0
+	str	w1, [x2, #:lo12:.LANCHOR37]
+	adrp	x2, .LANCHOR39
+	ldrh	w2, [x2, #:lo12:.LANCHOR39]
+	sub	w0, w2, w0
+	adrp	x2, .LANCHOR38
+	strh	w0, [x2, #:lo12:.LANCHOR38]
+	adrp	x0, .LANCHOR41
+	ldr	w0, [x0, #:lo12:.LANCHOR41]
+	sub	w1, w0, w1
+	adrp	x0, .LANCHOR40
+	str	w1, [x0, #:lo12:.LANCHOR40]
+	mov	w0, 0
+	ret
+	.size	FtlSysBlkNumInit, .-FtlSysBlkNumInit
+	.section	.text.FtlConstantsInit,"ax",@progbits
+	.align	2
+	.global	FtlConstantsInit
+	.type	FtlConstantsInit, %function
+FtlConstantsInit:
+	stp	x29, x30, [sp, -32]!
+	mov	x5, x0
+	adrp	x1, .LANCHOR44
+	adrp	x4, .LANCHOR43
+	add	x29, sp, 0
+	ldrh	w11, [x0, 8]
+	adrp	x0, .LANCHOR42
+	adrp	x6, .LANCHOR39
+	ldrh	w2, [x5, 10]
+	strh	w11, [x0, #:lo12:.LANCHOR42]
+	mov	x3, 0
+	ldrh	w0, [x5, 12]
+	ldrh	w8, [x5, 14]
+	strh	w0, [x1, #:lo12:.LANCHOR44]
+	adrp	x1, .LANCHOR45
+	add	x7, x1, :lo12:.LANCHOR45
+	strh	w2, [x4, #:lo12:.LANCHOR43]
+	strh	w8, [x6, #:lo12:.LANCHOR39]
+	str	x19, [sp, 16]
+.L325:
+	strb	w3, [x3, x7]
+	add	x3, x3, 1
+	cmp	x3, 32
+	bne	.L325
+	ldrh	w7, [x5, 20]
+	ldrb	w3, [x5, 15]
+	cmp	w7, w3
+	bcs	.L326
+	and	w13, w0, 255
+	mul	w15, w0, w2
+	ubfiz	w14, w13, 1, 7
+	add	x1, x1, :lo12:.LANCHOR45
+	mov	w7, 0
+.L327:
+	cmp	w7, w0
+	bcs	.L329
+	and	w3, w7, 255
+	mov	w10, w7
+	mov	w12, 0
+	b	.L330
+.L328:
+	add	w16, w15, w10
+	strb	w3, [x1, w10, uxtw]
+	add	w17, w13, w3
+	add	w3, w14, w3
+	add	w12, w12, 1
+	and	w3, w3, 255
+	add	w10, w10, w0
+	strb	w17, [x1, x16]
+.L330:
+	cmp	w12, w2
+	bcc	.L328
+	add	w7, w7, 1
+	b	.L327
+.L329:
+	ubfiz	w2, w2, 1, 15
+	lsr	w8, w8, 1
+	strh	w2, [x4, #:lo12:.LANCHOR43]
+	strh	w8, [x6, #:lo12:.LANCHOR39]
+.L326:
+	adrp	x1, .LANCHOR46
+	adrp	x13, .LANCHOR47
+	mov	w2, 5
+	cmp	w11, 1
+	strh	w2, [x1, #:lo12:.LANCHOR46]
+	strh	wzr, [x13, #:lo12:.LANCHOR47]
+	bne	.L331
+	strh	w11, [x1, #:lo12:.LANCHOR46]
+.L331:
+	adrp	x8, .LANCHOR48
+	mov	w1, 4352
+	strh	w1, [x8, #:lo12:.LANCHOR48]
+	adrp	x1, .LANCHOR1
+	ldrb	w11, [x1, #:lo12:.LANCHOR1]
+	cbz	w11, .L332
+	mov	w1, 384
+	strh	w1, [x8, #:lo12:.LANCHOR48]
+.L332:
+	ldrh	w4, [x4, #:lo12:.LANCHOR43]
+	adrp	x1, .LANCHOR36
+	ldrh	w3, [x6, #:lo12:.LANCHOR39]
+	mul	w4, w0, w4
+	mul	w0, w0, w3
+	and	w4, w4, 65535
+	strh	w4, [x1, #:lo12:.LANCHOR36]
+	adrp	x1, .LANCHOR49
+	and	w0, w0, 65535
+	strh	w0, [x1, #:lo12:.LANCHOR49]
+	bl	Ftl_log2
+	ldrh	w19, [x5, 16]
+	adrp	x1, .LANCHOR50
+	ldrh	w10, [x5, 20]
+	adrp	x7, .LANCHOR51
+	strh	w0, [x1, #:lo12:.LANCHOR50]
+	adrp	x0, .LANCHOR52
+	ldrh	w14, [x5, 18]
+	adrp	x15, .LANCHOR54
+	mul	w1, w4, w19
+	strh	w14, [x0, #:lo12:.LANCHOR52]
+	adrp	x0, .LANCHOR53
+	strh	w19, [x7, #:lo12:.LANCHOR51]
+	strh	w10, [x15, #:lo12:.LANCHOR54]
+	strh	w1, [x0, #:lo12:.LANCHOR53]
+	mov	w0, w10
+	bl	Ftl_log2
+	and	w12, w0, 65535
+	adrp	x6, .LANCHOR55
+	ubfiz	w2, w10, 9, 7
+	ldrh	w1, [x5, 26]
+	cmp	w3, 1024
+	strh	w0, [x6, #:lo12:.LANCHOR55]
+	adrp	x0, .LANCHOR56
+	strh	w2, [x0, #:lo12:.LANCHOR56]
+	adrp	x0, .LANCHOR57
+	ubfx	w2, w2, 8, 8
+	strh	w2, [x0, #:lo12:.LANCHOR57]
+	adrp	x0, .LANCHOR58
+	strh	w1, [x0, #:lo12:.LANCHOR58]
+	adrp	x0, .LANCHOR41
+	mul	w1, w4, w3
+	str	w1, [x0, #:lo12:.LANCHOR41]
+	bls	.L333
+	and	w0, w3, 255
+	strh	w0, [x13, #:lo12:.LANCHOR47]
+.L333:
+	ldrh	w0, [x13, #:lo12:.LANCHOR47]
+	adrp	x1, .LANCHOR59
+	sub	w0, w3, w0
+	mul	w0, w0, w4
+	mul	w0, w0, w10
+	mul	w0, w0, w19
+	asr	w0, w0, 11
+	str	w0, [x1, #:lo12:.LANCHOR59]
+	ldrh	w0, [x8, #:lo12:.LANCHOR48]
+	mul	w1, w14, w10
+	adrp	x10, .LANCHOR60
+	lsl	w0, w0, 3
+	sdiv	w0, w0, w1
+	and	w0, w0, 65535
+	cmp	w0, 4
+	bls	.L334
+.L352:
+	strh	w0, [x10, #:lo12:.LANCHOR60]
+	cbz	w11, .L336
+	mov	w0, 640
+	strh	w0, [x8, #:lo12:.LANCHOR48]
+.L336:
+	ldrh	w0, [x8, #:lo12:.LANCHOR48]
+	adrp	x1, .LANCHOR61
+	lsl	w3, w3, 6
+	cmp	w4, 1
+	adrp	x8, .LANCHOR35
+	asr	w0, w0, w12
+	add	w0, w0, 2
+	strh	w0, [x1, #:lo12:.LANCHOR61]
+	add	w0, w12, 9
+	adrp	x1, .LANCHOR63
+	asr	w3, w3, w0
+	adrp	x0, .LANCHOR62
+	strh	w3, [x0, #:lo12:.LANCHOR62]
+	and	w3, w3, 65535
+	mul	w0, w4, w3
+	add	w3, w3, 8
+	str	w0, [x1, #:lo12:.LANCHOR63]
+	ldrh	w0, [x10, #:lo12:.LANCHOR60]
+	udiv	w0, w0, w4
+	mov	x4, x1
+	add	w3, w0, w3
+	beq	.L337
+.L353:
+	str	w3, [x8, #:lo12:.LANCHOR35]
+	ldrh	w0, [x8, #:lo12:.LANCHOR35]
+	bl	FtlSysBlkNumInit
+	ldr	w1, [x8, #:lo12:.LANCHOR35]
+	adrp	x0, .LANCHOR64
+	mov	w2, 24
+	str	w1, [x0, #:lo12:.LANCHOR64]
+	adrp	x0, .LANCHOR40
+	ldrh	w1, [x7, #:lo12:.LANCHOR51]
+	ldr	w0, [x0, #:lo12:.LANCHOR40]
+	lsl	w0, w0, 2
+	mul	w0, w0, w1
+	ldrh	w1, [x6, #:lo12:.LANCHOR55]
+	add	w1, w1, 9
+	lsr	w0, w0, w1
+	adrp	x1, .LANCHOR65
+	add	w0, w0, 2
+	and	w0, w0, 65535
+	strh	w0, [x1, #:lo12:.LANCHOR65]
+	adrp	x1, .LANCHOR66
+	strh	w2, [x1, #:lo12:.LANCHOR66]
+	adrp	x1, .LANCHOR67
+	ldrh	w2, [x10, #:lo12:.LANCHOR60]
+	str	wzr, [x1, #:lo12:.LANCHOR67]
+	add	w1, w2, 3
+	strh	w1, [x10, #:lo12:.LANCHOR60]
+	ldr	w1, [x4, #:lo12:.LANCHOR63]
+	add	w3, w1, 3
+	str	w3, [x4, #:lo12:.LANCHOR63]
+	adrp	x3, .LANCHOR8
+	ldrb	w3, [x3, #:lo12:.LANCHOR8]
+	cbz	w3, .L339
+	add	w2, w2, 4
+	add	w1, w1, 5
+	strh	w2, [x10, #:lo12:.LANCHOR60]
+	str	w1, [x4, #:lo12:.LANCHOR63]
+.L339:
+	adrp	x1, .LANCHOR38
+	adrp	x3, .LANCHOR68
+	ldrh	w1, [x1, #:lo12:.LANCHOR38]
+	strh	wzr, [x3, #:lo12:.LANCHOR68]
+	lsl	w2, w1, 1
+	lsr	w1, w1, 3
+	add	w2, w2, 48
+	add	w1, w1, 4
+	add	w0, w2, w0, lsl 2
+	add	w0, w0, w1
+	ldrh	w1, [x15, #:lo12:.LANCHOR54]
+	cmp	w0, w1, lsl 9
+	bcs	.L340
+	mov	w0, 1
+	strh	w0, [x3, #:lo12:.LANCHOR68]
+.L340:
+	mov	w0, 0
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L334:
+	mov	w0, 4
+	b	.L352
+.L337:
+	add	w3, w3, 4
+	b	.L353
+	.size	FtlConstantsInit, .-FtlConstantsInit
+	.section	.text.IsBlkInVendorPart,"ax",@progbits
+	.align	2
+	.global	IsBlkInVendorPart
+	.type	IsBlkInVendorPart, %function
+IsBlkInVendorPart:
+	adrp	x1, .LANCHOR69
+	and	w0, w0, 65535
+	ldrh	w1, [x1, #:lo12:.LANCHOR69]
+	cbz	w1, .L358
+	adrp	x1, .LANCHOR60
+	ldrh	w2, [x1, #:lo12:.LANCHOR60]
+	adrp	x1, .LANCHOR70
+	ldr	x3, [x1, #:lo12:.LANCHOR70]
+	mov	x1, 0
+.L356:
+	cmp	w2, w1, uxth
+	bhi	.L357
+.L358:
+	mov	w0, 0
+	ret
+.L357:
+	add	x1, x1, 1
+	add	x4, x3, x1, lsl 1
+	ldrh	w4, [x4, -2]
+	cmp	w4, w0
+	bne	.L356
+	mov	w0, 1
+	ret
+	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
+	.section	.text.FtlGetCap,"ax",@progbits
+	.align	2
+	.global	FtlGetCap
+	.type	FtlGetCap, %function
+FtlGetCap:
+	adrp	x0, .LANCHOR67
+	ldr	w0, [x0, #:lo12:.LANCHOR67]
+	ret
+	.size	FtlGetCap, .-FtlGetCap
+	.section	.text.FtlGetCapacity,"ax",@progbits
+	.align	2
+	.global	FtlGetCapacity
+	.type	FtlGetCapacity, %function
+FtlGetCapacity:
+	adrp	x0, .LANCHOR67
+	ldr	w0, [x0, #:lo12:.LANCHOR67]
+	ret
+	.size	FtlGetCapacity, .-FtlGetCapacity
+	.section	.text.ftl_get_density,"ax",@progbits
+	.align	2
+	.global	ftl_get_density
+	.type	ftl_get_density, %function
+ftl_get_density:
+	adrp	x0, .LANCHOR67
+	ldr	w0, [x0, #:lo12:.LANCHOR67]
+	ret
+	.size	ftl_get_density, .-ftl_get_density
+	.section	.text.FtlGetLpn,"ax",@progbits
+	.align	2
+	.global	FtlGetLpn
+	.type	FtlGetLpn, %function
+FtlGetLpn:
+	adrp	x0, .LANCHOR71
+	ldr	w0, [x0, #:lo12:.LANCHOR71]
+	ret
+	.size	FtlGetLpn, .-FtlGetLpn
+	.section	.text.FtlGetCurEraseBlock,"ax",@progbits
+	.align	2
+	.global	FtlGetCurEraseBlock
+	.type	FtlGetCurEraseBlock, %function
+FtlGetCurEraseBlock:
+	adrp	x0, .LANCHOR36
+	ldrh	w1, [x0, #:lo12:.LANCHOR36]
+	adrp	x0, .LANCHOR72
+	ldr	w0, [x0, #:lo12:.LANCHOR72]
+	mul	w0, w1, w0
+	ret
+	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
+	.section	.text.FtlGetAllBlockNum,"ax",@progbits
+	.align	2
+	.global	FtlGetAllBlockNum
+	.type	FtlGetAllBlockNum, %function
+FtlGetAllBlockNum:
+	adrp	x0, .LANCHOR39
+	ldrh	w1, [x0, #:lo12:.LANCHOR39]
+	adrp	x0, .LANCHOR36
+	ldrh	w0, [x0, #:lo12:.LANCHOR36]
+	mul	w0, w1, w0
+	ret
+	.size	FtlGetAllBlockNum, .-FtlGetAllBlockNum
+	.section	.text.FtlBbmMapBadBlock,"ax",@progbits
+	.align	2
+	.global	FtlBbmMapBadBlock
+	.type	FtlBbmMapBadBlock, %function
+FtlBbmMapBadBlock:
+	stp	x29, x30, [sp, -32]!
+	and	w1, w0, 65535
+	adrp	x0, .LANCHOR49
+	mov	w4, 1
+	add	x29, sp, 0
+	ldrh	w0, [x0, #:lo12:.LANCHOR49]
+	str	x19, [sp, 16]
+	adrp	x19, .LANCHOR73
+	add	x19, x19, :lo12:.LANCHOR73
+	udiv	w3, w1, w0
+	and	w2, w3, 65535
+	msub	w3, w3, w0, w1
+	add	x0, x19, x2, uxth 3
+	and	w3, w3, 65535
+	and	w6, w3, 31
+	ldr	x0, [x0, 32]
+	ubfx	x5, x3, 5, 11
+	lsl	x5, x5, 2
+	lsl	w4, w4, w6
+	ldr	w6, [x0, x5]
+	orr	w4, w4, w6
+	str	w4, [x0, x5]
+	adrp	x0, .LC2
+	add	x0, x0, :lo12:.LC2
+	bl	printf
+	ldrh	w0, [x19, 6]
+	add	w0, w0, 1
+	strh	w0, [x19, 6]
+	mov	w0, 0
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	FtlBbmMapBadBlock, .-FtlBbmMapBadBlock
+	.section	.text.FtlBbmIsBadBlock,"ax",@progbits
+	.align	2
+	.global	FtlBbmIsBadBlock
+	.type	FtlBbmIsBadBlock, %function
+FtlBbmIsBadBlock:
+	adrp	x1, .LANCHOR49
+	and	w0, w0, 65535
+	ldrh	w1, [x1, #:lo12:.LANCHOR49]
+	udiv	w2, w0, w1
+	msub	w0, w2, w1, w0
+	adrp	x1, .LANCHOR73
+	add	x1, x1, :lo12:.LANCHOR73
+	add	x2, x1, x2, uxth 3
+	and	w0, w0, 65535
+	ubfx	x3, x0, 5, 11
+	and	w0, w0, 31
+	ldr	x1, [x2, 32]
+	ldr	w1, [x1, x3, lsl 2]
+	lsr	w0, w1, w0
+	and	w0, w0, 1
+	ret
+	.size	FtlBbmIsBadBlock, .-FtlBbmIsBadBlock
+	.section	.text.FtlBbtInfoPrint,"ax",@progbits
+	.align	2
+	.global	FtlBbtInfoPrint
+	.type	FtlBbtInfoPrint, %function
+FtlBbtInfoPrint:
+	ret
+	.size	FtlBbtInfoPrint, .-FtlBbtInfoPrint
+	.section	.text.V2P_block,"ax",@progbits
+	.align	2
+	.global	V2P_block
+	.type	V2P_block, %function
+V2P_block:
+	adrp	x2, .LANCHOR44
+	and	w0, w0, 65535
+	adrp	x4, .LANCHOR49
+	and	w1, w1, 65535
+	ldrh	w2, [x2, #:lo12:.LANCHOR44]
+	ldrh	w4, [x4, #:lo12:.LANCHOR49]
+	udiv	w3, w0, w2
+	msub	w0, w3, w2, w0
+	madd	w2, w2, w1, w0
+	madd	w0, w3, w4, w2
+	ret
+	.size	V2P_block, .-V2P_block
+	.section	.text.P2V_plane,"ax",@progbits
+	.align	2
+	.global	P2V_plane
+	.type	P2V_plane, %function
+P2V_plane:
+	and	w3, w0, 65535
+	adrp	x0, .LANCHOR44
+	ldrh	w1, [x0, #:lo12:.LANCHOR44]
+	adrp	x0, .LANCHOR49
+	ldrh	w2, [x0, #:lo12:.LANCHOR49]
+	udiv	w0, w3, w1
+	udiv	w2, w3, w2
+	msub	w0, w0, w1, w3
+	madd	w0, w1, w2, w0
+	ret
+	.size	P2V_plane, .-P2V_plane
+	.section	.text.P2V_block_in_plane,"ax",@progbits
+	.align	2
+	.global	P2V_block_in_plane
+	.type	P2V_block_in_plane, %function
+P2V_block_in_plane:
+	and	w2, w0, 65535
+	adrp	x0, .LANCHOR49
+	ldrh	w1, [x0, #:lo12:.LANCHOR49]
+	udiv	w0, w2, w1
+	msub	w0, w0, w1, w2
+	adrp	x1, .LANCHOR44
+	ldrh	w1, [x1, #:lo12:.LANCHOR44]
+	and	w0, w0, 65535
+	udiv	w0, w0, w1
+	ret
+	.size	P2V_block_in_plane, .-P2V_block_in_plane
+	.section	.text.ftl_cmp_data_ver,"ax",@progbits
+	.align	2
+	.global	ftl_cmp_data_ver
+	.type	ftl_cmp_data_ver, %function
+ftl_cmp_data_ver:
+	cmp	w0, w1
+	mov	w2, -2147483648
+	bls	.L374
+	sub	w1, w0, w1
+	cmp	w1, w2
+	cset	w0, ls
+	ret
+.L374:
+	sub	w1, w1, w0
+	cmp	w1, w2
+	cset	w0, hi
+	ret
+	.size	ftl_cmp_data_ver, .-ftl_cmp_data_ver
+	.section	.text.FtlFreeSysBlkQueueEmpty,"ax",@progbits
+	.align	2
+	.global	FtlFreeSysBlkQueueEmpty
+	.type	FtlFreeSysBlkQueueEmpty, %function
+FtlFreeSysBlkQueueEmpty:
+	adrp	x0, .LANCHOR74+6
+	ldrh	w0, [x0, #:lo12:.LANCHOR74+6]
+	cmp	w0, 0
+	cset	w0, eq
+	ret
+	.size	FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty
+	.section	.text.FtlFreeSysBlkQueueFull,"ax",@progbits
+	.align	2
+	.global	FtlFreeSysBlkQueueFull
+	.type	FtlFreeSysBlkQueueFull, %function
+FtlFreeSysBlkQueueFull:
+	adrp	x0, .LANCHOR74+6
+	ldrh	w0, [x0, #:lo12:.LANCHOR74+6]
+	cmp	w0, 1024
+	cset	w0, eq
+	ret
+	.size	FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull
+	.section	.text.FtlFreeSysBlkQueueIn,"ax",@progbits
+	.align	2
+	.global	FtlFreeSysBlkQueueIn
+	.type	FtlFreeSysBlkQueueIn, %function
+FtlFreeSysBlkQueueIn:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	str	x21, [sp, 32]
+	and	w21, w0, 65535
+	adrp	x0, .LANCHOR74
+	add	x2, x0, :lo12:.LANCHOR74
+	stp	x19, x20, [sp, 16]
+	ldrh	w2, [x2, 6]
+	cmp	w2, 1024
+	beq	.L378
+	and	w1, w1, 65535
+	mov	x19, x0
+	cbz	w1, .L380
+	adrp	x0, .LANCHOR75
+	ldr	w0, [x0, #:lo12:.LANCHOR75]
+	cbnz	w0, .L380
+	mov	w0, w21
+	bl	P2V_block_in_plane
+	and	w20, w0, 65535
+	adrp	x0, .LANCHOR76
+	lsl	w1, w21, 10
+	mov	w2, 1
+	ldr	x0, [x0, #:lo12:.LANCHOR76]
+	str	w1, [x0, 4]
+	mov	w1, w2
+	bl	FlashEraseBlocks
+	adrp	x1, .LANCHOR77
+	ubfiz	x0, x20, 1, 16
+	ldr	x2, [x1, #:lo12:.LANCHOR77]
+	ldrh	w1, [x2, x0]
+	add	w1, w1, 1
+	strh	w1, [x2, x0]
+	adrp	x1, .LANCHOR78
+	ldr	w0, [x1, #:lo12:.LANCHOR78]
+	add	w0, w0, 1
+	str	w0, [x1, #:lo12:.LANCHOR78]
+.L380:
+	add	x0, x19, :lo12:.LANCHOR74
+	ldrh	w1, [x0, 6]
+	add	w1, w1, 1
+	strh	w1, [x0, 6]
+	ldrh	w1, [x0, 4]
+	add	x2, x0, x1, sxtw 1
+	add	w1, w1, 1
+	and	w1, w1, 1023
+	strh	w1, [x0, 4]
+	strh	w21, [x2, 8]
+.L378:
+	ldp	x19, x20, [sp, 16]
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
+	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
+	.section	.text.FtlFreeSysBLkSort,"ax",@progbits
+	.align	2
+	.global	FtlFreeSysBLkSort
+	.type	FtlFreeSysBLkSort, %function
+FtlFreeSysBLkSort:
+	stp	x29, x30, [sp, -16]!
+	adrp	x2, .LANCHOR74
+	adrp	x1, .LANCHOR79
+	add	x0, x2, :lo12:.LANCHOR74
+	add	x29, sp, 0
+	ldr	x3, [x1, #:lo12:.LANCHOR79]
+	adrp	x1, .LANCHOR77
+	ldrh	w8, [x0, 2]
+	mov	x4, x2
+	ldrh	w7, [x0, 6]
+	mov	x6, x0
+	ldr	x10, [x1, #:lo12:.LANCHOR77]
+	and	x11, x8, 65535
+	mov	x5, 0
+.L389:
+	cmp	w7, w5, uxth
+	bhi	.L390
+	sub	w10, w7, #1
+	add	x2, x4, :lo12:.LANCHOR74
+	mov	w0, 0
+.L391:
+	cmp	w0, w10
+	blt	.L396
+	ldp	x29, x30, [sp], 16
+	ret
+.L390:
+	add	x0, x11, x5
+	add	x0, x6, x0, lsl 1
+	ldrh	w0, [x0, 8]
+	bl	P2V_block_in_plane
+	ubfiz	x0, x0, 1, 16
+	ldrh	w0, [x10, x0]
+	str	w0, [x3, x5, lsl 2]
+	add	x5, x5, 1
+	b	.L389
+.L396:
+	add	w5, w0, 1
+	mov	w1, w0
+	and	w5, w5, 65535
+	mov	w4, w5
+.L392:
+	cmp	w4, w7
+	bcc	.L394
+	cmp	w0, w1
+	beq	.L395
+	ubfiz	x4, x0, 2, 16
+	ubfiz	x6, x1, 2, 32
+	add	w0, w8, w0
+	add	w1, w1, w8
+	add	x0, x2, x0, sxtw 1
+	add	x1, x2, x1, sxtw 1
+	ldr	w12, [x3, x4]
+	ldr	w11, [x3, x6]
+	str	w12, [x3, x6]
+	str	w11, [x3, x4]
+	ldrh	w6, [x0, 8]
+	ldrh	w4, [x1, 8]
+	strh	w6, [x1, 8]
+	strh	w4, [x0, 8]
+.L395:
+	mov	w0, w5
+	b	.L391
+.L394:
+	ubfiz	x6, x4, 2, 16
+	ldr	w11, [x3, w1, uxtw 2]
+	ldr	w6, [x3, x6]
+	cmp	w11, w6
+	csel	w1, w1, w4, ls
+	add	w4, w4, 1
+	and	w4, w4, 65535
+	b	.L392
+	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
+	.section	.text.remove_from_free_sys_Queue,"ax",@progbits
+	.align	2
+	.global	remove_from_free_sys_Queue
+	.type	remove_from_free_sys_Queue, %function
+remove_from_free_sys_Queue:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR74
+	add	x19, x19, :lo12:.LANCHOR74
+	ldrh	w3, [x19, 6]
+	cbz	w3, .L403
+	and	w1, w0, 65535
+	ldrh	w0, [x19, 2]
+	mov	w20, 0
+.L400:
+	cmp	w20, w3
+	bcc	.L402
+.L403:
+	mov	w0, 0
+	b	.L398
+.L402:
+	add	w2, w20, w0
+	ubfiz	x2, x2, 1, 10
+	add	x2, x19, x2
+	ldrh	w2, [x2, 8]
+	cmp	w2, w1
+	bne	.L401
+	adrp	x0, .LC3
+	add	x0, x0, :lo12:.LC3
+	bl	printf
+	ldrh	w0, [x19, 2]
+	add	w20, w0, w20
+	add	x1, x19, x0, sxtw 1
+	add	w0, w0, 1
+	and	w0, w0, 1023
+	ubfiz	x20, x20, 1, 10
+	add	x20, x19, x20
+	strh	w0, [x19, 2]
+	ldrh	w0, [x19, 6]
+	ldrh	w1, [x1, 8]
+	sub	w0, w0, #1
+	strh	w1, [x20, 8]
+	strh	w0, [x19, 6]
+	mov	w0, 1
+.L398:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L401:
+	add	w20, w20, 1
+	b	.L400
+	.size	remove_from_free_sys_Queue, .-remove_from_free_sys_Queue
+	.section	.text.FtlFreeSysBlkQueueOut,"ax",@progbits
+	.align	2
+	.global	FtlFreeSysBlkQueueOut
+	.type	FtlFreeSysBlkQueueOut, %function
+FtlFreeSysBlkQueueOut:
+	adrp	x0, .LANCHOR74
+	add	x0, x0, :lo12:.LANCHOR74
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	ldrh	w2, [x0, 6]
+	stp	x19, x20, [sp, 16]
+	str	x21, [sp, 32]
+	cbz	w2, .L408
+	ldrh	w1, [x0, 2]
+	sub	w2, w2, #1
+	strh	w2, [x0, 6]
+	add	x3, x0, x1, sxtw 1
+	add	w1, w1, 1
+	and	w1, w1, 1023
+	strh	w1, [x0, 2]
+	adrp	x0, .LANCHOR75
+	ldrh	w19, [x3, 8]
+	ldr	w0, [x0, #:lo12:.LANCHOR75]
+	cbnz	w0, .L406
+	mov	w0, w19
+	bl	P2V_block_in_plane
+	adrp	x1, .LANCHOR76
+	and	w20, w0, 65535
+	lsl	w2, w19, 10
+	mov	x21, x1
+	ldr	x0, [x1, #:lo12:.LANCHOR76]
+	str	w2, [x0, 4]
+	adrp	x2, .LANCHOR8
+	ldrb	w2, [x2, #:lo12:.LANCHOR8]
+	cbz	w2, .L407
+	mov	w2, 1
+	mov	w1, 0
+	bl	FlashEraseBlocks
+.L407:
+	ldr	x0, [x21, #:lo12:.LANCHOR76]
+	mov	w2, 1
+	mov	w1, w2
+	bl	FlashEraseBlocks
+	adrp	x1, .LANCHOR77
+	ubfiz	x0, x20, 1, 16
+	ldr	x2, [x1, #:lo12:.LANCHOR77]
+	ldrh	w1, [x2, x0]
+	add	w1, w1, 1
+	strh	w1, [x2, x0]
+	adrp	x1, .LANCHOR78
+	ldr	w0, [x1, #:lo12:.LANCHOR78]
+	add	w0, w0, 1
+	str	w0, [x1, #:lo12:.LANCHOR78]
+.L406:
+	mov	w0, w19
+	ldr	x21, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+.L408:
+	mov	w19, 65535
+	b	.L406
+	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
+	.section	.text.insert_data_list,"ax",@progbits
+	.align	2
+	.global	insert_data_list
+	.type	insert_data_list, %function
+insert_data_list:
+	adrp	x1, .LANCHOR38
+	and	w0, w0, 65535
+	ldrh	w14, [x1, #:lo12:.LANCHOR38]
+	cmp	w14, w0
+	bls	.L429
+	adrp	x1, .LANCHOR80
+	mov	w3, 6
+	ldr	x6, [x1, #:lo12:.LANCHOR80]
+	umull	x13, w0, w3
+	mov	w1, -1
+	add	x5, x6, x13
+	strh	w1, [x5, 2]
+	strh	w1, [x6, x13]
+	adrp	x1, .LANCHOR81
+	mov	x15, x1
+	ldr	x12, [x1, #:lo12:.LANCHOR81]
+	cbnz	x12, .L416
+	str	x5, [x1, #:lo12:.LANCHOR81]
+.L429:
+	mov	w0, 0
+	ret
+.L416:
+	stp	x29, x30, [sp, -32]!
+	adrp	x1, .LANCHOR82
+	ubfiz	x2, x0, 1, 16
+	mov	x4, -6148914691236517206
+	add	x29, sp, 0
+	ldr	x16, [x1, #:lo12:.LANCHOR82]
+	movk	x4, 0xaaab, lsl 0
+	ldrh	w1, [x5, 4]
+	mov	w8, -1
+	mov	w11, w8
+	stp	x19, x20, [sp, 16]
+	cmp	w1, 0
+	mov	w20, 65535
+	ldrh	w7, [x16, x2]
+	mul	w7, w7, w1
+	sub	x1, x12, x6
+	asr	x1, x1, 1
+	csel	w7, w7, w8, ne
+	mov	w8, w3
+	mul	x1, x1, x4
+	adrp	x4, .LANCHOR77
+	ldr	x17, [x4, #:lo12:.LANCHOR77]
+	and	w1, w1, 65535
+	mov	x4, x12
+	add	x10, x17, x2
+	mov	w2, 0
+.L424:
+	add	w2, w2, 1
+	and	w2, w2, 65535
+	cmp	w14, w2
+	bcc	.L415
+	cmp	w1, w0
+	beq	.L415
+	ubfiz	x30, x1, 1, 16
+	ldrh	w19, [x4, 4]
+	cmp	w19, 0
+	ldrh	w3, [x16, x30]
+	mul	w3, w3, w19
+	csel	w3, w3, w11, ne
+	cmp	w7, w3
+	bne	.L420
+	ldrh	w19, [x17, x30]
+	ldrh	w3, [x10]
+	cmp	w19, w3
+	bcc	.L422
+.L421:
+	strh	w1, [x6, x13]
+	cmp	x4, x12
+	ldrh	w1, [x4, 2]
+	strh	w1, [x5, 2]
+	bne	.L425
+	strh	w0, [x4, 2]
+	str	x5, [x15, #:lo12:.LANCHOR81]
+	b	.L415
+.L420:
+	bcc	.L421
+.L422:
+	ldrh	w3, [x4]
+	cmp	w3, w20
+	bne	.L423
+	strh	w1, [x5, 2]
+	strh	w0, [x4]
+	adrp	x0, .LANCHOR83
+	str	x5, [x0, #:lo12:.LANCHOR83]
+.L415:
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L423:
+	umaddl	x4, w3, w8, x6
+	mov	w1, w3
+	b	.L424
+.L425:
+	ldrh	w1, [x4, 2]
+	mov	w2, 6
+	umull	x1, w1, w2
+	strh	w0, [x6, x1]
+	strh	w0, [x4, 2]
+	b	.L415
+	.size	insert_data_list, .-insert_data_list
+	.section	.text.INSERT_DATA_LIST,"ax",@progbits
+	.align	2
+	.global	INSERT_DATA_LIST
+	.type	INSERT_DATA_LIST, %function
+INSERT_DATA_LIST:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	bl	insert_data_list
+	adrp	x1, .LANCHOR84
+	ldrh	w0, [x1, #:lo12:.LANCHOR84]
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	strh	w0, [x1, #:lo12:.LANCHOR84]
+	adrp	x1, .LANCHOR38
+	ldrh	w1, [x1, #:lo12:.LANCHOR38]
+	cmp	w1, w0
+	bcs	.L431
+	mov	w2, 205
+	adrp	x1, .LANCHOR85
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR85
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	ldp	x29, x30, [sp], 16
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	b	printf
+.L431:
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
+	.section	.text.insert_free_list,"ax",@progbits
+	.align	2
+	.global	insert_free_list
+	.type	insert_free_list, %function
+insert_free_list:
+	and	w0, w0, 65535
+	mov	w7, 65535
+	cmp	w0, w7
+	beq	.L435
+	adrp	x1, .LANCHOR80
+	mov	w6, 6
+	ldr	x3, [x1, #:lo12:.LANCHOR80]
+	umull	x8, w0, w6
+	mov	w1, -1
+	add	x4, x3, x8
+	strh	w1, [x4, 2]
+	strh	w1, [x3, x8]
+	adrp	x1, .LANCHOR86
+	mov	x12, x1
+	ldr	x5, [x1, #:lo12:.LANCHOR86]
+	cbnz	x5, .L436
+	str	x4, [x1, #:lo12:.LANCHOR86]
+.L435:
+	mov	w0, 0
+	ret
+.L436:
+	adrp	x1, .LANCHOR77
+	mov	x2, -6148914691236517206
+	movk	x2, 0xaaab, lsl 0
+	ldr	x11, [x1, #:lo12:.LANCHOR77]
+	ubfiz	x1, x0, 1, 16
+	ldrh	w13, [x11, x1]
+	sub	x1, x5, x3
+	asr	x1, x1, 1
+	mul	x1, x1, x2
+	mov	x2, x5
+	and	w1, w1, 65535
+.L439:
+	ubfiz	x10, x1, 1, 16
+	ldrh	w10, [x11, x10]
+	cmp	w10, w13
+	bcs	.L437
+	ldrh	w10, [x2]
+	cmp	w10, w7
+	bne	.L438
+	strh	w1, [x4, 2]
+	strh	w0, [x2]
+	b	.L435
+.L438:
+	umaddl	x2, w10, w6, x3
+	mov	w1, w10
+	b	.L439
+.L437:
+	ldrh	w6, [x2, 2]
+	cmp	x2, x5
+	strh	w6, [x4, 2]
+	strh	w1, [x3, x8]
+	bne	.L440
+	strh	w0, [x2, 2]
+	str	x4, [x12, #:lo12:.LANCHOR86]
+	b	.L435
+.L440:
+	ldrh	w1, [x2, 2]
+	mov	w4, 6
+	umull	x1, w1, w4
+	strh	w0, [x3, x1]
+	strh	w0, [x2, 2]
+	b	.L435
+	.size	insert_free_list, .-insert_free_list
+	.section	.text.INSERT_FREE_LIST,"ax",@progbits
+	.align	2
+	.global	INSERT_FREE_LIST
+	.type	INSERT_FREE_LIST, %function
+INSERT_FREE_LIST:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	bl	insert_free_list
+	adrp	x1, .LANCHOR87
+	ldrh	w0, [x1, #:lo12:.LANCHOR87]
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	strh	w0, [x1, #:lo12:.LANCHOR87]
+	adrp	x1, .LANCHOR38
+	ldrh	w1, [x1, #:lo12:.LANCHOR38]
+	cmp	w1, w0
+	bcs	.L441
+	mov	w2, 198
+	adrp	x1, .LANCHOR88
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR88
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	ldp	x29, x30, [sp], 16
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	b	printf
+.L441:
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
+	.section	.text.List_remove_node,"ax",@progbits
+	.align	2
+	.global	List_remove_node
+	.type	List_remove_node, %function
+List_remove_node:
+	stp	x29, x30, [sp, -64]!
+	and	w1, w1, 65535
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR80
+	stp	x21, x22, [sp, 32]
+	mov	x22, x0
+	mov	w0, 6
+	str	x23, [sp, 48]
+	ldr	x23, [x20, #:lo12:.LANCHOR80]
+	umull	x21, w1, w0
+	mov	w0, 65535
+	add	x19, x23, x21
+	ldrh	w1, [x19, 2]
+	cmp	w1, w0
+	bne	.L445
+	ldr	x0, [x22]
+	cmp	x19, x0
+	beq	.L445
+	mov	w2, 363
+	adrp	x1, .LANCHOR89
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR89
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L445:
+	ldr	x0, [x22]
+	mov	w1, 65535
+	cmp	x19, x0
+	ldrh	w0, [x23, x21]
+	bne	.L446
+	cmp	w0, w1
+	bne	.L447
+	str	xzr, [x22]
+.L448:
+	mov	w0, -1
+	strh	w0, [x23, x21]
+	strh	w0, [x19, 2]
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	ret
+.L447:
+	ldr	x1, [x20, #:lo12:.LANCHOR80]
+	mov	w2, 6
+	umaddl	x0, w0, w2, x1
+	mov	w1, -1
+	str	x0, [x22]
+	strh	w1, [x0, 2]
+	b	.L448
+.L446:
+	cmp	w0, w1
+	ldrh	w1, [x19, 2]
+	bne	.L449
+	cmp	w1, w0
+	beq	.L448
+	mov	w0, 6
+	mov	w2, -1
+	umull	x1, w1, w0
+	ldr	x0, [x20, #:lo12:.LANCHOR80]
+	strh	w2, [x0, x1]
+	b	.L448
+.L449:
+	ldr	x2, [x20, #:lo12:.LANCHOR80]
+	mov	w3, 6
+	umaddl	x4, w0, w3, x2
+	strh	w1, [x4, 2]
+	ldrh	w1, [x19, 2]
+	umull	x1, w1, w3
+	strh	w0, [x2, x1]
+	b	.L448
+	.size	List_remove_node, .-List_remove_node
+	.section	.text.List_pop_index_node,"ax",@progbits
+	.align	2
+	.global	List_pop_index_node
+	.type	List_pop_index_node, %function
+List_pop_index_node:
+	ldr	x2, [x0]
+	cbz	x2, .L457
+	stp	x29, x30, [sp, -32]!
+	adrp	x3, .LANCHOR80
+	and	w1, w1, 65535
+	mov	w4, 65535
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	mov	w5, 6
+	ldr	x19, [x3, #:lo12:.LANCHOR80]
+.L453:
+	cbnz	w1, .L454
+.L456:
+	sub	x19, x2, x19
+	mov	x2, -6148914691236517206
+	asr	x19, x19, 1
+	movk	x2, 0xaaab, lsl 0
+	mul	x19, x19, x2
+	and	w19, w19, 65535
+	mov	w1, w19
+	bl	List_remove_node
+	mov	w0, w19
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L454:
+	ldrh	w3, [x2]
+	cmp	w3, w4
+	beq	.L456
+	sub	w1, w1, #1
+	umaddl	x2, w3, w5, x19
+	and	w1, w1, 65535
+	b	.L453
+.L457:
+	mov	w0, 65535
+	ret
+	.size	List_pop_index_node, .-List_pop_index_node
+	.section	.text.List_get_gc_head_node,"ax",@progbits
+	.align	2
+	.global	List_get_gc_head_node
+	.type	List_get_gc_head_node, %function
+List_get_gc_head_node:
+	and	w2, w0, 65535
+	adrp	x0, .LANCHOR81
+	ldr	x1, [x0, #:lo12:.LANCHOR81]
+	cbz	x1, .L467
+	adrp	x0, .LANCHOR80
+	mov	w4, 6
+	ldr	x3, [x0, #:lo12:.LANCHOR80]
+	mov	w0, 65535
+.L464:
+	cbz	w2, .L465
+	ldrh	w1, [x1]
+	cmp	w1, w0
+	bne	.L466
+	ret
+.L466:
+	sub	w2, w2, #1
+	umaddl	x1, w1, w4, x3
+	and	w2, w2, 65535
+	b	.L464
+.L467:
+	mov	w0, 65535
+	ret
+.L465:
+	sub	x0, x1, x3
+	mov	x1, -6148914691236517206
+	asr	x0, x0, 1
+	movk	x1, 0xaaab, lsl 0
+	mul	x0, x0, x1
+	and	w0, w0, 65535
+	ret
+	.size	List_get_gc_head_node, .-List_get_gc_head_node
+	.section	.text.List_update_data_list,"ax",@progbits
+	.align	2
+	.global	List_update_data_list
+	.type	List_update_data_list, %function
+List_update_data_list:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w19, w0, 65535
+	adrp	x0, .LANCHOR90
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	ldrh	w0, [x0, #:lo12:.LANCHOR90]
+	stp	x25, x26, [sp, 64]
+	cmp	w0, w19
+	beq	.L470
+	adrp	x0, .LANCHOR91
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	cmp	w0, w19
+	beq	.L470
+	adrp	x0, .LANCHOR92
+	ldrh	w0, [x0, #:lo12:.LANCHOR92]
+	cmp	w0, w19
+	beq	.L470
+	adrp	x1, .LANCHOR80
+	mov	w21, 6
+	adrp	x0, .LANCHOR81
+	mov	x26, x1
+	umull	x21, w19, w21
+	ldr	x23, [x1, #:lo12:.LANCHOR80]
+	ldr	x2, [x0, #:lo12:.LANCHOR81]
+	mov	x25, x0
+	add	x22, x23, x21
+	cmp	x22, x2
+	beq	.L470
+	adrp	x1, .LANCHOR82
+	ubfiz	x0, x19, 1, 16
+	mov	x24, x1
+	ldr	x2, [x1, #:lo12:.LANCHOR82]
+	mov	w1, 65535
+	ldrh	w20, [x2, x0]
+	ldrh	w0, [x22, 4]
+	mul	w20, w20, w0
+	ldrh	w0, [x22, 2]
+	cmp	w20, 0
+	csinv	w20, w20, wzr, ne
+	cmp	w0, w1
+	bne	.L473
+	ldrh	w1, [x23, x21]
+	cmp	w1, w0
+	bne	.L473
+	mov	w2, 481
+	adrp	x1, .LANCHOR93
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR93
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L473:
+	ldrh	w0, [x22, 2]
+	mov	w1, 65535
+	cmp	w0, w1
+	bne	.L474
+	ldrh	w1, [x23, x21]
+	cmp	w1, w0
+	beq	.L470
+.L474:
+	mov	w1, 6
+	mov	x2, -6148914691236517206
+	movk	x2, 0xaaab, lsl 0
+	umull	x1, w0, w1
+	asr	x0, x1, 1
+	mul	x0, x0, x2
+	ldr	x2, [x24, #:lo12:.LANCHOR82]
+	ldrh	w0, [x2, x0, lsl 1]
+	ldr	x2, [x26, #:lo12:.LANCHOR80]
+	add	x1, x2, x1
+	ldrh	w1, [x1, 4]
+	mul	w0, w0, w1
+	cmp	w0, 0
+	csinv	w0, w0, wzr, ne
+	cmp	w20, w0
+	bcs	.L470
+	adrp	x20, .LANCHOR84
+	mov	w1, w19
+	add	x0, x25, :lo12:.LANCHOR81
+	bl	List_remove_node
+	ldrh	w0, [x20, #:lo12:.LANCHOR84]
+	cbnz	w0, .L476
+	mov	w2, 492
+	adrp	x1, .LANCHOR93
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR93
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L476:
+	ldrh	w0, [x20, #:lo12:.LANCHOR84]
+	sub	w0, w0, #1
+	strh	w0, [x20, #:lo12:.LANCHOR84]
+	mov	w0, w19
+	bl	INSERT_DATA_LIST
+.L470:
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+	.size	List_update_data_list, .-List_update_data_list
+	.section	.text.ftl_map_blk_alloc_new_blk,"ax",@progbits
+	.align	2
+	.global	ftl_map_blk_alloc_new_blk
+	.type	ftl_map_blk_alloc_new_blk, %function
+ftl_map_blk_alloc_new_blk:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	ldrh	w1, [x0, 10]
+	mov	w20, 0
+	ldr	x0, [x0, 16]
+	str	x21, [sp, 32]
+.L479:
+	cmp	w20, w1
+	bne	.L482
+.L483:
+	mov	w2, 594
+	adrp	x1, .LANCHOR94
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR94
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+	b	.L484
+.L482:
+	mov	x21, x0
+	ldrh	w2, [x0], 2
+	cbnz	w2, .L480
+	bl	FtlFreeSysBlkQueueOut
+	strh	w0, [x21]
+	tst	w0, 65535
+	beq	.L481
+	ldr	w0, [x19, 48]
+	strh	wzr, [x19, 2]
+	add	w0, w0, 1
+	str	w0, [x19, 48]
+	ldrh	w0, [x19, 8]
+	strh	w20, [x19]
+	add	w0, w0, 1
+	strh	w0, [x19, 8]
+.L481:
+	ldrh	w0, [x19, 10]
+	cmp	w0, w20
+	bls	.L483
+.L484:
+	mov	w0, 0
+	ldr	x21, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+.L480:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L479
+	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
+	.section	.text.select_l2p_ram_region,"ax",@progbits
+	.align	2
+	.global	select_l2p_ram_region
+	.type	select_l2p_ram_region, %function
+select_l2p_ram_region:
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR66
+	mov	x1, 0
+	mov	w3, 65535
+	add	x29, sp, 0
+	ldrh	w2, [x0, #:lo12:.LANCHOR66]
+	adrp	x0, .LANCHOR95
+	str	x19, [sp, 16]
+	ldr	x0, [x0, #:lo12:.LANCHOR95]
+.L490:
+	and	w19, w1, 65535
+	cmp	w19, w2
+	bcc	.L492
+	add	x3, x0, 4
+	mov	w19, w2
+	mov	w5, -2147483648
+	mov	w1, 0
+.L493:
+	cmp	w1, w2
+	bne	.L495
+	cmp	w19, w2
+	bcc	.L491
+	adrp	x1, .LANCHOR96
+	mov	w19, w2
+	mov	w3, -1
+	ldrh	w4, [x1, #:lo12:.LANCHOR96]
+	mov	w1, 0
+.L496:
+	cmp	w1, w2
+	bne	.L498
+	cmp	w19, w1
+	bcc	.L491
+	mov	w2, 826
+	adrp	x1, .LANCHOR97
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR97
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+	b	.L491
+.L492:
+	add	x1, x1, 1
+	add	x4, x0, x1, lsl 4
+	ldrh	w4, [x4, -16]
+	cmp	w4, w3
+	bne	.L490
+.L491:
+	mov	w0, w19
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L495:
+	ldr	w4, [x3]
+	tbnz	w4, #31, .L494
+	cmp	w5, w4
+	bls	.L494
+	mov	w5, w4
+	mov	w19, w1
+.L494:
+	add	w1, w1, 1
+	add	x3, x3, 16
+	and	w1, w1, 65535
+	b	.L493
+.L498:
+	ldr	w6, [x0, 4]
+	cmp	w3, w6
+	bls	.L497
+	ldrh	w5, [x0]
+	cmp	w5, w4
+	csel	w3, w3, w6, eq
+	csel	w19, w19, w1, eq
+.L497:
+	add	w1, w1, 1
+	add	x0, x0, 16
+	and	w1, w1, 65535
+	b	.L496
+	.size	select_l2p_ram_region, .-select_l2p_ram_region
+	.section	.text.FtlUpdateVaildLpn,"ax",@progbits
+	.align	2
+	.global	FtlUpdateVaildLpn
+	.type	FtlUpdateVaildLpn, %function
+FtlUpdateVaildLpn:
+	adrp	x2, .LANCHOR98
+	mov	x3, x2
+	ldrh	w1, [x2, #:lo12:.LANCHOR98]
+	cmp	w1, 4
+	bhi	.L501
+	cbnz	w0, .L501
+	add	w1, w1, 1
+	strh	w1, [x2, #:lo12:.LANCHOR98]
+	ret
+.L501:
+	adrp	x1, .LANCHOR38
+	adrp	x0, .LANCHOR99
+	strh	wzr, [x3, #:lo12:.LANCHOR98]
+	mov	w2, 0
+	ldrh	w5, [x1, #:lo12:.LANCHOR38]
+	adrp	x1, .LANCHOR82
+	str	wzr, [x0, #:lo12:.LANCHOR99]
+	mov	w3, 0
+	ldr	x6, [x1, #:lo12:.LANCHOR82]
+	mov	w7, 65535
+	mov	x1, 0
+.L502:
+	cmp	w5, w1, uxth
+	bhi	.L504
+	cbz	w3, .L500
+	str	w2, [x0, #:lo12:.LANCHOR99]
+.L500:
+	ret
+.L504:
+	ldrh	w4, [x6, x1, lsl 1]
+	cmp	w4, w7
+	beq	.L503
+	add	w2, w2, w4
+	mov	w3, 1
+.L503:
+	add	x1, x1, 1
+	b	.L502
+	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
+	.section	.text.ftl_set_blk_mode,"ax",@progbits
+	.align	2
+	.global	ftl_set_blk_mode
+	.type	ftl_set_blk_mode, %function
+ftl_set_blk_mode:
+	and	w0, w0, 65535
+	cbz	w1, .L511
+	b	ftl_set_blk_mode.part.9
+.L511:
+	adrp	x1, .LANCHOR0
+	ubfx	x2, x0, 5, 11
+	lsl	x2, x2, 2
+	ldr	x3, [x1, #:lo12:.LANCHOR0]
+	and	w1, w0, 31
+	mov	w0, 1
+	lsl	w0, w0, w1
+	ldr	w1, [x3, x2]
+	bic	w0, w1, w0
+	str	w0, [x3, x2]
+	ret
+	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
+	.section	.text.ftl_get_blk_mode,"ax",@progbits
+	.align	2
+	.global	ftl_get_blk_mode
+	.type	ftl_get_blk_mode, %function
+ftl_get_blk_mode:
+	adrp	x1, .LANCHOR0
+	and	w0, w0, 65535
+	ldr	x1, [x1, #:lo12:.LANCHOR0]
+	ubfx	x2, x0, 5, 11
+	and	w0, w0, 31
+	ldr	w1, [x1, x2, lsl 2]
+	lsr	w0, w1, w0
+	and	w0, w0, 1
+	ret
+	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
+	.section	.text.ftl_sb_update_avl_pages,"ax",@progbits
+	.align	2
+	.global	ftl_sb_update_avl_pages
+	.type	ftl_sb_update_avl_pages, %function
+ftl_sb_update_avl_pages:
+	and	w2, w2, 65535
+	and	w6, w1, 65535
+	ubfiz	x4, x2, 1, 16
+	adrp	x1, .LANCHOR36
+	add	x4, x4, 16
+	strh	wzr, [x0, 4]
+	add	x4, x0, x4
+	ldrh	w3, [x1, #:lo12:.LANCHOR36]
+	mov	w1, 65535
+.L514:
+	cmp	w2, w3
+	bcc	.L516
+	adrp	x1, .LANCHOR51
+	ubfiz	x3, x3, 1, 16
+	add	x3, x3, 16
+	add	x2, x0, 16
+	ldrh	w1, [x1, #:lo12:.LANCHOR51]
+	add	x3, x0, x3
+	mov	w5, 65535
+	sub	w1, w1, #1
+	and	w1, w1, 65535
+	sub	w1, w1, w6
+.L517:
+	cmp	x2, x3
+	bne	.L519
+	ret
+.L516:
+	ldrh	w5, [x4]
+	cmp	w5, w1
+	beq	.L515
+	ldrh	w5, [x0, 4]
+	add	w5, w5, 1
+	strh	w5, [x0, 4]
+.L515:
+	add	w2, w2, 1
+	add	x4, x4, 2
+	and	w2, w2, 65535
+	b	.L514
+.L519:
+	ldrh	w4, [x2]
+	cmp	w4, w5
+	beq	.L518
+	ldrh	w4, [x0, 4]
+	add	w4, w1, w4
+	strh	w4, [x0, 4]
+.L518:
+	add	x2, x2, 2
+	b	.L517
+	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
+	.section	.text.make_superblock,"ax",@progbits
+	.align	2
+	.global	make_superblock
+	.type	make_superblock, %function
+make_superblock:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	ldrh	w1, [x0]
+	str	x19, [sp, 16]
+	mov	x19, x0
+	adrp	x0, .LANCHOR38
+	ldrh	w0, [x0, #:lo12:.LANCHOR38]
+	cmp	w1, w0
+	bcc	.L521
+	mov	w2, 2298
+	adrp	x1, .LANCHOR100
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR100
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L521:
+	adrp	x0, .LANCHOR36
+	adrp	x7, .LANCHOR45
+	add	x6, x19, 16
+	add	x7, x7, :lo12:.LANCHOR45
+	ldrh	w8, [x0, #:lo12:.LANCHOR36]
+	mov	x5, 0
+	strh	wzr, [x19, 4]
+	mov	w10, -1
+	strb	wzr, [x19, 7]
+.L522:
+	cmp	w8, w5, uxth
+	bhi	.L524
+	adrp	x1, .LANCHOR51
+	ldrb	w0, [x19, 7]
+	strb	wzr, [x19, 9]
+	ldrh	w1, [x1, #:lo12:.LANCHOR51]
+	mul	w0, w0, w1
+	strh	w0, [x19, 4]
+	adrp	x0, .LANCHOR101
+	ldr	w0, [x0, #:lo12:.LANCHOR101]
+	cbz	w0, .L525
+	adrp	x0, .LANCHOR77
+	ldrh	w1, [x19]
+	ldr	x0, [x0, #:lo12:.LANCHOR77]
+	ldrh	w0, [x0, x1, lsl 1]
+	cmp	w0, 59
+	bhi	.L525
+	mov	w0, 1
+	strb	w0, [x19, 9]
+.L525:
+	adrp	x0, .LANCHOR1
+	ldrb	w0, [x0, #:lo12:.LANCHOR1]
+	cbz	w0, .L526
+	mov	w0, 1
+	strb	w0, [x19, 9]
+.L526:
+	mov	w0, 0
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L524:
+	ldrh	w1, [x19]
+	ldrb	w0, [x7, x5]
+	bl	V2P_block
+	mov	w4, w0
+	strh	w10, [x6]
+	bl	FtlBbmIsBadBlock
+	cbnz	w0, .L523
+	strh	w4, [x6]
+	ldrb	w0, [x19, 7]
+	add	w0, w0, 1
+	strb	w0, [x19, 7]
+.L523:
+	add	x5, x5, 1
+	add	x6, x6, 2
+	b	.L522
+	.size	make_superblock, .-make_superblock
+	.section	.text.update_multiplier_value,"ax",@progbits
+	.align	2
+	.global	update_multiplier_value
+	.type	update_multiplier_value, %function
+update_multiplier_value:
+	and	w6, w0, 65535
+	adrp	x0, .LANCHOR36
+	mov	x7, 0
+	adrp	x8, .LANCHOR45
+	ldrh	w10, [x0, #:lo12:.LANCHOR36]
+	adrp	x0, .LANCHOR51
+	mov	w5, 0
+	add	x8, x8, :lo12:.LANCHOR45
+	ldrh	w11, [x0, #:lo12:.LANCHOR51]
+	cmp	w10, w7, uxth
+	bhi	.L546
+	cbz	w5, .L544
+	mov	w0, 32768
+	sdiv	w5, w0, w5
+.L545:
+	adrp	x0, .LANCHOR80
+	mov	w1, 6
+	ldr	x0, [x0, #:lo12:.LANCHOR80]
+	umaddl	x6, w6, w1, x0
+	mov	w0, 0
+	strh	w5, [x6, 4]
+	ret
+.L539:
+	mov	w5, 0
+	b	.L538
+.L544:
+	mov	w5, 0
+	b	.L545
+.L546:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+.L537:
+	ldrb	w0, [x8, x7]
+	mov	w1, w6
+	bl	V2P_block
+	bl	FtlBbmIsBadBlock
+	cbnz	w0, .L536
+	add	w5, w5, w11
+	and	w5, w5, 65535
+.L536:
+	add	x7, x7, 1
+	cmp	w10, w7, uxth
+	bhi	.L537
+	cbz	w5, .L539
+	mov	w0, 32768
+	sdiv	w5, w0, w5
+.L538:
+	adrp	x0, .LANCHOR80
+	mov	w1, 6
+	ldr	x0, [x0, #:lo12:.LANCHOR80]
+	umaddl	x6, w6, w1, x0
+	mov	w0, 0
+	strh	w5, [x6, 4]
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	update_multiplier_value, .-update_multiplier_value
+	.section	.text.GetFreeBlockMinEraseCount,"ax",@progbits
+	.align	2
+	.global	GetFreeBlockMinEraseCount
+	.type	GetFreeBlockMinEraseCount, %function
+GetFreeBlockMinEraseCount:
+	adrp	x0, .LANCHOR86
+	ldr	x0, [x0, #:lo12:.LANCHOR86]
+	cbz	x0, .L549
+	adrp	x1, .LANCHOR80
+	ldr	x1, [x1, #:lo12:.LANCHOR80]
+	sub	x0, x0, x1
+	mov	x1, -6148914691236517206
+	asr	x0, x0, 1
+	movk	x1, 0xaaab, lsl 0
+	mul	x0, x0, x1
+	adrp	x1, .LANCHOR77
+	ldr	x1, [x1, #:lo12:.LANCHOR77]
+	and	x0, x0, 65535
+	ldrh	w0, [x1, x0, lsl 1]
+	ret
+.L549:
+	mov	w0, 0
+	ret
+	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
+	.section	.text.GetFreeBlockMaxEraseCount,"ax",@progbits
+	.align	2
+	.global	GetFreeBlockMaxEraseCount
+	.type	GetFreeBlockMaxEraseCount, %function
+GetFreeBlockMaxEraseCount:
+	adrp	x1, .LANCHOR86
+	and	w0, w0, 65535
+	ldr	x1, [x1, #:lo12:.LANCHOR86]
+	cbz	x1, .L557
+	adrp	x2, .LANCHOR87
+	mov	w3, 7
+	mov	w5, 6
+	mov	w6, 65535
+	ldrh	w2, [x2, #:lo12:.LANCHOR87]
+	mul	w2, w2, w3
+	asr	w2, w2, 3
+	cmp	w0, w2
+	csel	w0, w2, w0, gt
+	adrp	x2, .LANCHOR80
+	ldr	x3, [x2, #:lo12:.LANCHOR80]
+	mov	x2, -6148914691236517206
+	movk	x2, 0xaaab, lsl 0
+	sub	x1, x1, x3
+	asr	x1, x1, 1
+	mul	x1, x1, x2
+	mov	w2, 0
+	and	w1, w1, 65535
+.L553:
+	cmp	w0, w2
+	beq	.L556
+	umull	x4, w1, w5
+	ldrh	w4, [x3, x4]
+	cmp	w4, w6
+	bne	.L554
+.L556:
+	adrp	x0, .LANCHOR77
+	ubfiz	x1, x1, 1, 16
+	ldr	x0, [x0, #:lo12:.LANCHOR77]
+	ldrh	w0, [x0, x1]
+	ret
+.L554:
+	add	w2, w2, 1
+	mov	w1, w4
+	and	w2, w2, 65535
+	b	.L553
+.L557:
+	mov	w0, 0
+	ret
+	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
+	.section	.text.free_data_superblock,"ax",@progbits
+	.align	2
+	.global	free_data_superblock
+	.type	free_data_superblock, %function
+free_data_superblock:
+	and	w0, w0, 65535
+	mov	w1, 65535
+	cmp	w0, w1
+	beq	.L561
+	stp	x29, x30, [sp, -16]!
+	adrp	x2, .LANCHOR82
+	ubfiz	x1, x0, 1, 16
+	add	x29, sp, 0
+	ldr	x2, [x2, #:lo12:.LANCHOR82]
+	strh	wzr, [x2, x1]
+	bl	INSERT_FREE_LIST
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+.L561:
+	mov	w0, 0
+	ret
+	.size	free_data_superblock, .-free_data_superblock
+	.section	.text.FtlGcBufInit,"ax",@progbits
+	.align	2
+	.global	FtlGcBufInit
+	.type	FtlGcBufInit, %function
+FtlGcBufInit:
+	adrp	x1, .LANCHOR103
+	adrp	x0, .LANCHOR102
+	adrp	x7, .LANCHOR104
+	adrp	x6, .LANCHOR105
+	ldr	x5, [x1, #:lo12:.LANCHOR103]
+	adrp	x1, .LANCHOR56
+	str	wzr, [x0, #:lo12:.LANCHOR102]
+	adrp	x0, .LANCHOR36
+	ldrh	w10, [x1, #:lo12:.LANCHOR56]
+	adrp	x1, .LANCHOR57
+	ldrh	w0, [x0, #:lo12:.LANCHOR36]
+	mov	w8, 24
+	ldrh	w11, [x1, #:lo12:.LANCHOR57]
+	adrp	x1, .LANCHOR106
+	ldr	x14, [x7, #:lo12:.LANCHOR104]
+	mov	x3, x5
+	ldr	x4, [x1, #:lo12:.LANCHOR106]
+	mov	w2, 0
+	ldr	x15, [x6, #:lo12:.LANCHOR105]
+	nop // between mem op and mult-accumulate
+	umaddl	x8, w0, w8, x5
+	add	x4, x4, 8
+	mov	w1, 0
+	mov	w16, 1
+.L565:
+	add	w13, w2, w10
+	add	w12, w1, w11
+	cmp	x3, x8
+	bne	.L566
+	adrp	x1, .LANCHOR107
+	ldr	x7, [x7, #:lo12:.LANCHOR104]
+	ldr	x6, [x6, #:lo12:.LANCHOR105]
+	mov	w8, 24
+	ldr	w4, [x1, #:lo12:.LANCHOR107]
+.L567:
+	cmp	w0, w4
+	bcc	.L568
+	ret
+.L566:
+	asr	w2, w2, 2
+	asr	w1, w1, 2
+	add	x2, x14, x2, sxtw 2
+	add	x1, x15, x1, sxtw 2
+	str	w16, [x3, 16]
+	stp	x2, x1, [x3]
+	add	x3, x3, 24
+	stp	x2, x1, [x4]
+	add	x4, x4, 56
+	mov	w1, w12
+	mov	w2, w13
+	b	.L565
+.L568:
+	umull	x3, w0, w8
+	mul	w1, w10, w0
+	add	x2, x5, x3
+	asr	w1, w1, 2
+	add	x1, x7, x1, sxtw 2
+	str	wzr, [x2, 16]
+	str	x1, [x5, x3]
+	mul	w1, w11, w0
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	asr	w1, w1, 2
+	add	x1, x6, x1, sxtw 2
+	str	x1, [x2, 8]
+	b	.L567
+	.size	FtlGcBufInit, .-FtlGcBufInit
+	.section	.text.FtlGcBufFree,"ax",@progbits
+	.align	2
+	.global	FtlGcBufFree
+	.type	FtlGcBufFree, %function
+FtlGcBufFree:
+	adrp	x2, .LANCHOR107
+	mov	w3, 0
+	mov	w7, 56
+	mov	w10, 24
+	ldr	w8, [x2, #:lo12:.LANCHOR107]
+	adrp	x2, .LANCHOR103
+	ldr	x4, [x2, #:lo12:.LANCHOR103]
+.L570:
+	cmp	w3, w1
+	bcs	.L569
+	umaddl	x6, w3, w7, x0
+	mov	w2, 0
+	b	.L575
+.L571:
+	add	w2, w2, 1
+	and	w2, w2, 65535
+.L575:
+	cmp	w2, w8
+	bcs	.L572
+	umull	x5, w2, w10
+	add	x11, x4, x5
+	ldr	x12, [x4, x5]
+	ldr	x5, [x6, 8]
+	cmp	x12, x5
+	bne	.L571
+	str	wzr, [x11, 16]
+.L572:
+	add	w3, w3, 1
+	and	w3, w3, 65535
+	b	.L570
+.L569:
+	ret
+	.size	FtlGcBufFree, .-FtlGcBufFree
+	.section	.text.FtlGcBufAlloc,"ax",@progbits
+	.align	2
+	.global	FtlGcBufAlloc
+	.type	FtlGcBufAlloc, %function
+FtlGcBufAlloc:
+	adrp	x2, .LANCHOR107
+	mov	w3, 0
+	mov	w7, 24
+	mov	w8, 1
+	ldr	w5, [x2, #:lo12:.LANCHOR107]
+	adrp	x2, .LANCHOR103
+	mov	w10, 56
+	ldr	x6, [x2, #:lo12:.LANCHOR103]
+.L577:
+	cmp	w3, w1
+	bcs	.L576
+	mov	w2, 0
+	b	.L582
+.L578:
+	add	w2, w2, 1
+	and	w2, w2, 65535
+.L582:
+	cmp	w2, w5
+	bcs	.L579
+	umaddl	x4, w2, w7, x6
+	ldr	w11, [x4, 16]
+	cbnz	w11, .L578
+	umaddl	x2, w3, w10, x0
+	ldr	x11, [x4]
+	str	w8, [x4, 16]
+	ldr	x4, [x4, 8]
+	stp	x11, x4, [x2, 8]
+.L579:
+	add	w3, w3, 1
+	and	w3, w3, 65535
+	b	.L577
+.L576:
+	ret
+	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
+	.section	.text.IsBlkInGcList,"ax",@progbits
+	.align	2
+	.global	IsBlkInGcList
+	.type	IsBlkInGcList, %function
+IsBlkInGcList:
+	adrp	x1, .LANCHOR108
+	and	w0, w0, 65535
+	ldrh	w2, [x1, #:lo12:.LANCHOR108]
+	adrp	x1, .LANCHOR109
+	ldr	x3, [x1, #:lo12:.LANCHOR109]
+	mov	x1, 0
+.L584:
+	cmp	w2, w1, uxth
+	bhi	.L586
+	mov	w0, 0
+	ret
+.L586:
+	add	x1, x1, 1
+	add	x4, x3, x1, lsl 1
+	ldrh	w4, [x4, -2]
+	cmp	w4, w0
+	bne	.L584
+	mov	w0, 1
+	ret
+	.size	IsBlkInGcList, .-IsBlkInGcList
+	.section	.text.FtlGcUpdatePage,"ax",@progbits
+	.align	2
+	.global	FtlGcUpdatePage
+	.type	FtlGcUpdatePage, %function
+FtlGcUpdatePage:
+	mov	w6, w0
+	mov	w10, w1
+	mov	w8, w2
+	stp	x29, x30, [sp, -16]!
+	lsr	w0, w0, 10
+	add	x29, sp, 0
+	bl	P2V_block_in_plane
+	and	w7, w0, 65535
+	adrp	x4, .LANCHOR108
+	adrp	x2, .LANCHOR109
+	mov	x3, 0
+	ldrh	w1, [x4, #:lo12:.LANCHOR108]
+	ldr	x5, [x2, #:lo12:.LANCHOR109]
+.L589:
+	and	w2, w3, 65535
+	cmp	w2, w1
+	bcc	.L591
+	bne	.L590
+	and	x3, x3, 65535
+	strh	w0, [x5, x3, lsl 1]
+	ldrh	w0, [x4, #:lo12:.LANCHOR108]
+	add	w0, w0, 1
+	strh	w0, [x4, #:lo12:.LANCHOR108]
+	b	.L590
+.L591:
+	add	x3, x3, 1
+	add	x2, x5, x3, lsl 1
+	ldrh	w2, [x2, -2]
+	cmp	w2, w7
+	bne	.L589
+.L590:
+	adrp	x4, .LANCHOR110
+	adrp	x1, .LANCHOR111
+	mov	w3, 12
+	ldrh	w0, [x4, #:lo12:.LANCHOR110]
+	ldr	x5, [x1, #:lo12:.LANCHOR111]
+	umull	x3, w0, w3
+	add	w0, w0, 1
+	add	x7, x5, x3
+	stp	w10, w8, [x7, 4]
+	str	w6, [x5, x3]
+	strh	w0, [x4, #:lo12:.LANCHOR110]
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
+	.section	.text.FtlGcRefreshBlock,"ax",@progbits
+	.align	2
+	.global	FtlGcRefreshBlock
+	.type	FtlGcRefreshBlock, %function
+FtlGcRefreshBlock:
+	adrp	x4, .LANCHOR112
+	and	w0, w0, 65535
+	ldrh	w5, [x4, #:lo12:.LANCHOR112]
+	cmp	w5, w0
+	beq	.L594
+	adrp	x1, .LANCHOR113
+	ldrh	w3, [x1, #:lo12:.LANCHOR113]
+	cmp	w0, w3
+	beq	.L594
+	mov	w2, 65535
+	cmp	w5, w2
+	bne	.L595
+	strh	w0, [x4, #:lo12:.LANCHOR112]
+.L594:
+	mov	w0, 0
+	ret
+.L595:
+	cmp	w3, w2
+	bne	.L594
+	strh	w0, [x1, #:lo12:.LANCHOR113]
+	b	.L594
+	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
+	.section	.text.FtlGcRefreshOpenBlock,"ax",@progbits
+	.align	2
+	.global	FtlGcRefreshOpenBlock
+	.type	FtlGcRefreshOpenBlock, %function
+FtlGcRefreshOpenBlock:
+	b	FtlGcRefreshBlock
+	.size	FtlGcRefreshOpenBlock, .-FtlGcRefreshOpenBlock
+	.section	.text.FtlGcMarkBadPhyBlk,"ax",@progbits
+	.align	2
+	.global	FtlGcMarkBadPhyBlk
+	.type	FtlGcMarkBadPhyBlk, %function
+FtlGcMarkBadPhyBlk:
+	and	w7, w0, 65535
+	stp	x29, x30, [sp, -16]!
+	mov	w0, w7
+	add	x29, sp, 0
+	bl	P2V_block_in_plane
+	and	w6, w0, 65535
+	bl	FtlGcRefreshBlock
+	adrp	x0, .LANCHOR101
+	ldr	w0, [x0, #:lo12:.LANCHOR101]
+	cbz	w0, .L598
+	adrp	x1, .LANCHOR77
+	ubfiz	x0, x6, 1, 16
+	ldr	x2, [x1, #:lo12:.LANCHOR77]
+	ldrh	w1, [x2, x0]
+	cmp	w1, 29
+	bls	.L598
+	sub	w1, w1, #30
+	strh	w1, [x2, x0]
+.L598:
+	adrp	x1, .LANCHOR114
+	adrp	x3, .LANCHOR115
+	add	x3, x3, :lo12:.LANCHOR115
+	mov	x2, 0
+	ldrh	w0, [x1, #:lo12:.LANCHOR114]
+.L599:
+	cmp	w0, w2, uxth
+	bhi	.L601
+	cmp	w0, 15
+	bhi	.L600
+	add	w2, w0, 1
+	strh	w2, [x1, #:lo12:.LANCHOR114]
+	adrp	x1, .LANCHOR115
+	add	x1, x1, :lo12:.LANCHOR115
+	strh	w7, [x1, w0, sxtw 1]
+	b	.L600
+.L601:
+	add	x2, x2, 1
+	add	x4, x3, x2, lsl 1
+	ldrh	w4, [x4, -2]
+	cmp	w4, w7
+	bne	.L599
+.L600:
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
+	.section	.text.FtlGcReFreshBadBlk,"ax",@progbits
+	.align	2
+	.global	FtlGcReFreshBadBlk
+	.type	FtlGcReFreshBadBlk, %function
+FtlGcReFreshBadBlk:
+	adrp	x0, .LANCHOR114
+	ldrh	w0, [x0, #:lo12:.LANCHOR114]
+	cbz	w0, .L613
+	adrp	x1, .LANCHOR112
+	ldrh	w2, [x1, #:lo12:.LANCHOR112]
+	mov	w1, 65535
+	cmp	w2, w1
+	bne	.L613
+	stp	x29, x30, [sp, -16]!
+	adrp	x6, .LANCHOR116
+	add	x29, sp, 0
+	ldrh	w1, [x6, #:lo12:.LANCHOR116]
+	cmp	w1, w0
+	bcc	.L608
+	strh	wzr, [x6, #:lo12:.LANCHOR116]
+.L608:
+	ldrh	w1, [x6, #:lo12:.LANCHOR116]
+	adrp	x0, .LANCHOR115
+	add	x0, x0, :lo12:.LANCHOR115
+	ldrh	w0, [x0, x1, lsl 1]
+	bl	P2V_block_in_plane
+	bl	FtlGcRefreshBlock
+	ldrh	w0, [x6, #:lo12:.LANCHOR116]
+	ldp	x29, x30, [sp], 16
+	add	w0, w0, 1
+	strh	w0, [x6, #:lo12:.LANCHOR116]
+	mov	w0, 0
+	ret
+.L613:
+	mov	w0, 0
+	ret
+	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
+	.section	.text.ftl_memset,"ax",@progbits
+	.align	2
+	.global	ftl_memset
+	.type	ftl_memset, %function
+ftl_memset:
+	uxtw	x2, w2
+	b	memset
+	.size	ftl_memset, .-ftl_memset
+	.section	.text.BuildFlashLsbPageTable,"ax",@progbits
+	.align	2
+	.global	BuildFlashLsbPageTable
+	.type	BuildFlashLsbPageTable, %function
+BuildFlashLsbPageTable:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w20, w1
+	cbnz	w0, .L618
+	adrp	x1, .LANCHOR16
+	add	x1, x1, :lo12:.LANCHOR16
+	mov	x0, 0
+.L619:
+	strh	w0, [x1, x0, lsl 1]
+	add	x0, x0, 1
+	cmp	x0, 256
+	bne	.L619
+.L625:
+	adrp	x19, .LANCHOR117
+	add	x19, x19, :lo12:.LANCHOR117
+	mov	w1, 255
+	mov	w2, 1024
+	mov	x0, x19
+	bl	ftl_memset
+	adrp	x1, .LANCHOR16
+	and	w20, w20, 65535
+	add	x1, x1, :lo12:.LANCHOR16
+	mov	x0, 0
+.L620:
+	cmp	w20, w0, uxth
+	bhi	.L642
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L618:
+	cmp	w0, 1
+	bne	.L621
+	adrp	x2, .LANCHOR16
+	add	x2, x2, :lo12:.LANCHOR16
+	mov	x1, 0
+.L624:
+	and	w0, w1, 65535
+	cmp	x1, 3
+	bls	.L622
+	ubfiz	w3, w0, 1, 15
+	and	w0, w0, 1
+	add	w0, w0, 2
+	sub	w0, w3, w0
+	and	w0, w0, 65535
+.L622:
+	strh	w0, [x2, x1, lsl 1]
+	add	x1, x1, 1
+	cmp	x1, 256
+	bne	.L624
+	b	.L625
+.L621:
+	cmp	w0, 2
+	bne	.L626
+	adrp	x2, .LANCHOR16
+	add	x2, x2, :lo12:.LANCHOR16
+	mov	w1, 65535
+	mov	x0, 0
+.L628:
+	cmp	x0, 2
+	and	w3, w0, 65535
+	csel	w3, w3, w1, cc
+	strh	w3, [x2, x0, lsl 1]
+	add	w1, w1, 2
+	add	x0, x0, 1
+	and	w1, w1, 65535
+	cmp	x0, 256
+	bne	.L628
+	b	.L625
+.L626:
+	cmp	w0, 3
+	bne	.L629
+	adrp	x2, .LANCHOR16
+	add	x2, x2, :lo12:.LANCHOR16
+	mov	x1, 0
+.L632:
+	and	w0, w1, 65535
+	cmp	x1, 5
+	bls	.L630
+	ubfiz	w3, w0, 1, 15
+	and	w0, w0, 1
+	add	w0, w0, 4
+	sub	w0, w3, w0
+	and	w0, w0, 65535
+.L630:
+	strh	w0, [x2, x1, lsl 1]
+	add	x1, x1, 1
+	cmp	x1, 256
+	bne	.L632
+	b	.L625
+.L629:
+	cmp	w0, 4
+	bne	.L633
+	adrp	x2, .LANCHOR16
+	add	x1, x2, :lo12:.LANCHOR16
+	add	x1, x1, 16
+	strh	wzr, [x2, #:lo12:.LANCHOR16]
+	mov	w2, 1
+	strh	w0, [x1, -8]
+	mov	w0, 5
+	strh	w2, [x1, -14]
+	mov	w2, 2
+	strh	w0, [x1, -6]
+	mov	w0, 7
+	strh	w2, [x1, -12]
+	mov	w2, 3
+	strh	w0, [x1, -4]
+	mov	w0, 8
+	strh	w2, [x1, -10]
+	strh	w0, [x1, -2]
+	mov	w0, 8
+.L635:
+	and	w3, w0, 1
+	ubfiz	w2, w0, 1, 15
+	add	w3, w3, 6
+	add	w0, w0, 1
+	sub	w2, w2, w3
+	strh	w2, [x1], 2
+	and	w0, w0, 65535
+	cmp	w0, 256
+	bne	.L635
+	b	.L625
+.L633:
+	cmp	w0, 5
+	bne	.L636
+	adrp	x1, .LANCHOR16
+	add	x1, x1, :lo12:.LANCHOR16
+	mov	x0, 0
+.L637:
+	strh	w0, [x1, x0, lsl 1]
+	add	x0, x0, 1
+	cmp	x0, 16
+	bne	.L637
+	add	x1, x1, 32
+.L638:
+	strh	w0, [x1], 2
+	add	w0, w0, 2
+	and	w0, w0, 65535
+	cmp	w0, 496
+	bne	.L638
+	b	.L625
+.L636:
+	cmp	w0, 6
+	bne	.L625
+	adrp	x3, .LANCHOR16
+	add	x3, x3, :lo12:.LANCHOR16
+	mov	w1, 0
+	mov	x2, 0
+	mov	w4, 12
+	mov	w5, 10
+.L641:
+	and	w0, w2, 65535
+	cmp	x2, 5
+	bls	.L639
+	tst	x0, 1
+	csel	w0, w4, w5, ne
+	sub	w0, w1, w0
+	and	w0, w0, 65535
+.L639:
+	strh	w0, [x3, x2, lsl 1]
+	add	w1, w1, 3
+	and	w1, w1, 65535
+	add	x2, x2, 1
+	cmp	w1, 768
+	bne	.L641
+	b	.L625
+.L642:
+	ldrh	w2, [x1, x0, lsl 1]
+	add	x0, x0, 1
+	strh	w2, [x19, w2, sxtw 1]
+	b	.L620
+	.size	BuildFlashLsbPageTable, .-BuildFlashLsbPageTable
+	.section	.text.FlashDieInfoInit,"ax",@progbits
+	.align	2
+	.global	FlashDieInfoInit
+	.type	FlashDieInfoInit, %function
+FlashDieInfoInit:
+	stp	x29, x30, [sp, -80]!
+	adrp	x0, .LANCHOR29+10
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR25
+	adrp	x20, .LANCHOR118
+	stp	x23, x24, [sp, 48]
+	ldrh	w0, [x0, #:lo12:.LANCHOR29+10]
+	adrp	x23, .LANCHOR3
+	stp	x21, x22, [sp, 32]
+	strb	wzr, [x19, #:lo12:.LANCHOR25]
+	cmp	w0, 256
+	strb	wzr, [x20, #:lo12:.LANCHOR118]
+	str	x25, [sp, 64]
+	bls	.L658
+	mov	w0, 512
+.L675:
+	adrp	x25, .LANCHOR26
+	add	x22, x25, :lo12:.LANCHOR26
+	str	w0, [x23, #:lo12:.LANCHOR3]
+	mov	w2, 8
+	mov	w1, 0
+	mov	x0, x22
+	adrp	x24, .LANCHOR17
+	bl	ftl_memset
+	add	x21, x24, :lo12:.LANCHOR17
+	mov	w2, 32
+	mov	w1, 0
+	mov	x0, x21
+	bl	ftl_memset
+	mov	w2, 192
+	mov	w1, 0
+	adrp	x0, .LANCHOR23
+	add	x0, x0, :lo12:.LANCHOR23
+	bl	ftl_memset
+	adrp	x0, .LANCHOR18
+	adrp	x12, .LANCHOR22
+	add	x14, x19, :lo12:.LANCHOR25
+	add	x15, x12, :lo12:.LANCHOR22
+	ldr	x7, [x0, #:lo12:.LANCHOR18]
+	mov	x8, 0
+	add	x10, x7, 1
+	ldrb	w11, [x7]
+.L662:
+	mov	w2, w11
+	add	x1, x15, x8, lsl 3
+	mov	x0, x10
+	bl	FlashMemCmp8
+	cbnz	w0, .L661
+	ldrb	w1, [x14]
+	add	w0, w1, 1
+	strb	w0, [x14]
+	str	wzr, [x21, x1, lsl 2]
+	strb	w8, [x22, x1]
+.L661:
+	add	x8, x8, 1
+	cmp	x8, 4
+	bne	.L662
+	ldrb	w0, [x19, #:lo12:.LANCHOR25]
+	strb	w0, [x20, #:lo12:.LANCHOR118]
+	ldrb	w0, [x7, 8]
+	cmp	w0, 2
+	beq	.L663
+.L667:
+	ldrb	w0, [x19, #:lo12:.LANCHOR25]
+	ldrh	w1, [x7, 14]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	mul	w0, w0, w1
+	ldrb	w1, [x7, 13]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	mul	w0, w0, w1
+	adrp	x1, .LANCHOR119
+	ldp	x29, x30, [sp], 80
+	strh	w0, [x1, #:lo12:.LANCHOR119]
+	ret
+.L658:
+	cmp	w0, 128
+	bls	.L675
+	mov	w0, 256
+	b	.L675
+.L663:
+	ldr	w20, [x23, #:lo12:.LANCHOR3]
+	add	x12, x12, :lo12:.LANCHOR22
+	add	x14, x19, :lo12:.LANCHOR25
+	add	x24, x24, :lo12:.LANCHOR17
+	add	x13, x25, :lo12:.LANCHOR26
+	mov	x15, 0
+.L666:
+	mov	w2, w11
+	add	x1, x12, x15, lsl 3
+	mov	x0, x10
+	bl	FlashMemCmp8
+	cbnz	w0, .L664
+	ldrb	w2, [x7, 13]
+	ldrh	w0, [x7, 14]
+	ldrb	w1, [x14]
+	and	w0, w0, 65280
+	mul	w2, w2, w20
+	mul	w0, w0, w2
+	sxtw	x2, w1
+	str	w0, [x24, x2, lsl 2]
+	ldrb	w3, [x7, 23]
+	cbz	w3, .L665
+	lsl	w0, w0, 1
+	str	w0, [x24, x2, lsl 2]
+.L665:
+	add	w1, w1, 1
+	strb	w15, [x13, x2]
+	strb	w1, [x14]
+.L664:
+	add	x15, x15, 1
+	cmp	x15, 4
+	bne	.L666
+	b	.L667
+	.size	FlashDieInfoInit, .-FlashDieInfoInit
+	.section	.text.ReadFlashInfo,"ax",@progbits
+	.align	2
+	.global	ReadFlashInfo
+	.type	ReadFlashInfo, %function
+ReadFlashInfo:
+	stp	x29, x30, [sp, -32]!
+	mov	w2, 11
+	mov	w1, 0
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	mov	x19, x0
+	bl	ftl_memset
+	adrp	x0, .LANCHOR18
+	adrp	x3, .LANCHOR67
+	mov	w4, 1
+	ldr	x1, [x0, #:lo12:.LANCHOR18]
+	adrp	x0, .LANCHOR3
+	ldr	w0, [x0, #:lo12:.LANCHOR3]
+	ldrb	w2, [x1, 9]
+	mul	w0, w0, w2
+	strb	w0, [x19, 4]
+	ubfx	x0, x0, 8, 8
+	strb	w0, [x19, 5]
+	adrp	x0, .LANCHOR31
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	strb	w0, [x19, 7]
+	add	x0, x3, :lo12:.LANCHOR67
+	ldrb	w3, [x3, #:lo12:.LANCHOR67]
+	strb	w3, [x19]
+	ldrb	w3, [x0, 1]
+	strb	w3, [x19, 1]
+	ldrb	w3, [x0, 2]
+	ldrb	w0, [x0, 3]
+	strb	w3, [x19, 2]
+	strb	w0, [x19, 3]
+	mov	w0, 32
+	strb	w2, [x19, 6]
+	adrp	x2, .LANCHOR26
+	strb	w0, [x19, 8]
+	add	x2, x2, :lo12:.LANCHOR26
+	ldrb	w0, [x1, 7]
+	mov	x1, 0
+	strb	w0, [x19, 9]
+	adrp	x0, .LANCHOR25
+	strb	wzr, [x19, 10]
+	ldrb	w3, [x0, #:lo12:.LANCHOR25]
+.L677:
+	cmp	w3, w1, uxtb
+	bhi	.L678
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L678:
+	ldrb	w0, [x1, x2]
+	add	x1, x1, 1
+	ldrb	w5, [x19, 10]
+	lsl	w0, w4, w0
+	orr	w0, w0, w5
+	strb	w0, [x19, 10]
+	b	.L677
+	.size	ReadFlashInfo, .-ReadFlashInfo
+	.section	.text.FtlBbt2Bitmap,"ax",@progbits
+	.align	2
+	.global	FtlBbt2Bitmap
+	.type	FtlBbt2Bitmap, %function
+FtlBbt2Bitmap:
+	stp	x29, x30, [sp, -64]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	mov	x21, x0
+	adrp	x0, .LANCHOR120
+	stp	x23, x24, [sp, 48]
+	adrp	x22, .LANCHOR49
+	adrp	x23, .LANCHOR121
+	ldrh	w2, [x0, #:lo12:.LANCHOR120]
+	add	x22, x22, :lo12:.LANCHOR49
+	add	x23, x23, :lo12:.LANCHOR121
+	stp	x19, x20, [sp, 16]
+	mov	w24, 65535
+	mov	x19, 0
+	mov	x20, x1
+	lsl	w2, w2, 2
+	mov	w1, 0
+	mov	x0, x20
+	bl	ftl_memset
+.L683:
+	ldrh	w0, [x21, x19]
+	cmp	w0, w24
+	beq	.L680
+	ldrh	w1, [x22]
+	cmp	w1, w0
+	bhi	.L682
+	mov	w2, 79
+	mov	x1, x23
+	adrp	x0, .LC4
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L682:
+	ldrh	w1, [x21, x19]
+	mov	w2, 1
+	add	x19, x19, 2
+	cmp	x19, 1024
+	ubfx	x0, x1, 5, 11
+	and	w1, w1, 31
+	lsl	x0, x0, 2
+	lsl	w2, w2, w1
+	ldr	w1, [x20, x0]
+	orr	w1, w1, w2
+	str	w1, [x20, x0]
+	bne	.L683
+.L680:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	ret
+	.size	FtlBbt2Bitmap, .-FtlBbt2Bitmap
+	.section	.text.FtlBbtMemInit,"ax",@progbits
+	.align	2
+	.global	FtlBbtMemInit
+	.type	FtlBbtMemInit, %function
+FtlBbtMemInit:
+	adrp	x1, .LANCHOR73
+	add	x0, x1, :lo12:.LANCHOR73
+	mov	w2, -1
+	add	x0, x0, 12
+	strh	w2, [x1, #:lo12:.LANCHOR73]
+	mov	w2, 16
+	strh	wzr, [x0, -6]
+	mov	w1, 255
+	b	ftl_memset
+	.size	FtlBbtMemInit, .-FtlBbtMemInit
+	.section	.text.FtlFreeSysBlkQueueInit,"ax",@progbits
+	.align	2
+	.global	FtlFreeSysBlkQueueInit
+	.type	FtlFreeSysBlkQueueInit, %function
+FtlFreeSysBlkQueueInit:
+	stp	x29, x30, [sp, -16]!
+	adrp	x1, .LANCHOR74
+	add	x3, x1, :lo12:.LANCHOR74
+	mov	w2, 2048
+	add	x29, sp, 0
+	strh	w0, [x1, #:lo12:.LANCHOR74]
+	mov	w1, 0
+	strh	wzr, [x3, 2]
+	add	x0, x3, 8
+	strh	wzr, [x3, 4]
+	strh	wzr, [x3, 6]
+	bl	ftl_memset
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
+	.section	.text.ftl_free_no_use_map_blk,"ax",@progbits
+	.align	2
+	.global	ftl_free_no_use_map_blk
+	.type	ftl_free_no_use_map_blk, %function
+ftl_free_no_use_map_blk:
+	stp	x29, x30, [sp, -80]!
+	mov	w1, 0
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	ldrh	w2, [x0, 10]
+	stp	x21, x22, [sp, 32]
+	ldp	x21, x20, [x0, 32]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	lsl	w2, w2, 1
+	ldr	x23, [x0, 16]
+	mov	x0, x21
+	bl	ftl_memset
+	mov	w0, 0
+.L691:
+	ldrh	w1, [x19, 6]
+	cmp	w1, w0
+	bhi	.L695
+	ldrh	w26, [x21]
+	adrp	x24, .LANCHOR52
+	add	x24, x24, :lo12:.LANCHOR52
+	mov	w25, 0
+	mov	w20, 0
+.L696:
+	ldrh	w0, [x19, 10]
+	cmp	w0, w20
+	bhi	.L700
+	mov	w0, w25
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L695:
+	ubfiz	x1, x0, 2, 16
+	ldr	w2, [x20, x1]
+	mov	w1, 0
+	ubfx	x2, x2, 10, 16
+.L692:
+	ldrh	w3, [x19, 10]
+	cmp	w3, w1
+	bhi	.L694
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	b	.L691
+.L694:
+	ubfiz	x3, x1, 1, 16
+	ldrh	w4, [x23, x3]
+	cmp	w4, w2
+	bne	.L693
+	ldrh	w4, [x21, x3]
+	add	w4, w4, 1
+	strh	w4, [x21, x3]
+.L693:
+	add	w1, w1, 1
+	and	w1, w1, 65535
+	b	.L692
+.L700:
+	ldrh	w0, [x19]
+	uxtw	x22, w20
+	cmp	w0, w20
+	bne	.L697
+	ldrh	w0, [x24]
+	ldrh	w1, [x19, 2]
+	cmp	w1, w0
+	bcs	.L697
+	strh	w0, [x21, x22, lsl 1]
+.L697:
+	lsl	x22, x22, 1
+	ldrh	w0, [x21, x22]
+	cmp	w26, w0
+	bls	.L698
+	mov	w25, w20
+	mov	w26, w0
+.L698:
+	cbnz	w0, .L699
+	ldrh	w0, [x23, x22]
+	cbz	w0, .L699
+	mov	w1, 1
+	bl	FtlFreeSysBlkQueueIn
+	strh	wzr, [x23, x22]
+	ldrh	w0, [x19, 8]
+	sub	w0, w0, #1
+	strh	w0, [x19, 8]
+.L699:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L696
+	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
+	.section	.text.FtlL2PDataInit,"ax",@progbits
+	.align	2
+	.global	FtlL2PDataInit
+	.type	FtlL2PDataInit, %function
+FtlL2PDataInit:
+	stp	x29, x30, [sp, -64]!
+	mov	w1, 0
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR122
+	adrp	x20, .LANCHOR63
+	stp	x21, x22, [sp, 32]
+	ldr	x0, [x19, #:lo12:.LANCHOR122]
+	adrp	x22, .LANCHOR56
+	ldr	w2, [x20, #:lo12:.LANCHOR63]
+	adrp	x21, .LANCHOR66
+	str	x23, [sp, 48]
+	adrp	x23, .LANCHOR123
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	ldrh	w0, [x21, #:lo12:.LANCHOR66]
+	mov	w1, 255
+	ldrh	w2, [x22, #:lo12:.LANCHOR56]
+	mul	w2, w2, w0
+	ldr	x0, [x23, #:lo12:.LANCHOR123]
+	bl	ftl_memset
+	adrp	x0, .LANCHOR95
+	ldrh	w3, [x21, #:lo12:.LANCHOR66]
+	ldr	x6, [x23, #:lo12:.LANCHOR123]
+	mov	x1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR95]
+	mov	w2, -1
+	ldrh	w5, [x22, #:lo12:.LANCHOR56]
+	add	x3, x0, x3, lsl 4
+.L706:
+	add	x4, x1, x5
+	cmp	x0, x3
+	bne	.L707
+	adrp	x1, .LANCHOR124
+	add	x0, x1, :lo12:.LANCHOR124
+	ldp	x21, x22, [sp, 32]
+	strh	w2, [x1, #:lo12:.LANCHOR124]
+	ldr	w1, [x20, #:lo12:.LANCHOR63]
+	strh	w1, [x0, 10]
+	mov	w1, -3902
+	strh	w1, [x0, 4]
+	adrp	x1, .LANCHOR125
+	ldr	x23, [sp, 48]
+	strh	w2, [x0, 2]
+	ldrh	w1, [x1, #:lo12:.LANCHOR125]
+	strh	w1, [x0, 8]
+	adrp	x1, .LANCHOR65
+	strh	w2, [x0, 60]
+	ldrh	w1, [x1, #:lo12:.LANCHOR65]
+	strh	w1, [x0, 6]
+	adrp	x1, .LANCHOR126
+	ldr	x1, [x1, #:lo12:.LANCHOR126]
+	str	x1, [x0, 16]
+	adrp	x1, .LANCHOR127
+	ldr	x1, [x1, #:lo12:.LANCHOR127]
+	str	x1, [x0, 24]
+	ldr	x1, [x19, #:lo12:.LANCHOR122]
+	ldp	x19, x20, [sp, 16]
+	str	x1, [x0, 32]
+	adrp	x1, .LANCHOR128
+	ldr	x1, [x1, #:lo12:.LANCHOR128]
+	str	x1, [x0, 40]
+	ldp	x29, x30, [sp], 64
+	ret
+.L707:
+	and	x1, x1, -4
+	strh	w2, [x0]
+	add	x1, x6, x1
+	str	wzr, [x0, 4]
+	str	x1, [x0, 8]
+	add	x0, x0, 16
+	mov	x1, x4
+	b	.L706
+	.size	FtlL2PDataInit, .-FtlL2PDataInit
+	.section	.text.FtlVariablesInit,"ax",@progbits
+	.align	2
+	.global	FtlVariablesInit
+	.type	FtlVariablesInit, %function
+FtlVariablesInit:
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR129
+	mov	w1, -1
+	add	x29, sp, 0
+	str	xzr, [x0, #:lo12:.LANCHOR129]
+	adrp	x0, .LANCHOR130
+	str	x19, [sp, 16]
+	adrp	x19, .LANCHOR39
+	strh	w1, [x0, #:lo12:.LANCHOR130]
+	adrp	x0, .LANCHOR131
+	mov	w1, -1
+	str	wzr, [x0, #:lo12:.LANCHOR131]
+	adrp	x0, .LANCHOR132
+	str	wzr, [x0, #:lo12:.LANCHOR132]
+	adrp	x0, .LANCHOR133
+	str	w1, [x0, #:lo12:.LANCHOR133]
+	adrp	x0, .LANCHOR101
+	mov	w1, 0
+	str	wzr, [x0, #:lo12:.LANCHOR101]
+	adrp	x0, .LANCHOR69
+	strh	wzr, [x0, #:lo12:.LANCHOR69]
+	adrp	x0, .LANCHOR60
+	ldrh	w2, [x0, #:lo12:.LANCHOR60]
+	adrp	x0, .LANCHOR70
+	ldr	x0, [x0, #:lo12:.LANCHOR70]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	adrp	x0, .LANCHOR77
+	ldrh	w2, [x19, #:lo12:.LANCHOR39]
+	mov	w1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR77]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	adrp	x0, .LANCHOR134
+	ldrh	w2, [x19, #:lo12:.LANCHOR39]
+	mov	w1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR134]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	mov	w2, 48
+	mov	w1, 0
+	adrp	x0, .LANCHOR135
+	add	x0, x0, :lo12:.LANCHOR135
+	bl	ftl_memset
+	mov	w2, 512
+	mov	w1, 0
+	adrp	x0, .LANCHOR136
+	add	x0, x0, :lo12:.LANCHOR136
+	bl	ftl_memset
+	bl	FtlGcBufInit
+	bl	FtlL2PDataInit
+	ldr	x19, [sp, 16]
+	mov	w0, 0
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	FtlVariablesInit, .-FtlVariablesInit
+	.section	.text.SupperBlkListInit,"ax",@progbits
+	.align	2
+	.global	SupperBlkListInit
+	.type	SupperBlkListInit, %function
+SupperBlkListInit:
+	stp	x29, x30, [sp, -96]!
+	adrp	x0, .LANCHOR39
+	mov	w1, 0
+	add	x29, sp, 0
+	ldrh	w2, [x0, #:lo12:.LANCHOR39]
+	mov	w0, 6
+	stp	x23, x24, [sp, 48]
+	adrp	x24, .LANCHOR80
+	stp	x19, x20, [sp, 16]
+	adrp	x23, .LANCHOR84
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR87
+	mul	w2, w2, w0
+	ldr	x0, [x24, #:lo12:.LANCHOR80]
+	stp	x25, x26, [sp, 64]
+	adrp	x25, .LANCHOR38
+	str	x27, [sp, 80]
+	adrp	x26, .LANCHOR45
+	add	x25, x25, :lo12:.LANCHOR38
+	add	x26, x26, :lo12:.LANCHOR45
+	bl	ftl_memset
+	mov	w21, 0
+	adrp	x0, .LANCHOR86
+	mov	w20, 0
+	mov	w19, 0
+	strh	wzr, [x23, #:lo12:.LANCHOR84]
+	str	xzr, [x0, #:lo12:.LANCHOR86]
+	adrp	x0, .LANCHOR81
+	strh	wzr, [x22, #:lo12:.LANCHOR87]
+	adrp	x27, .LANCHOR36
+	str	xzr, [x0, #:lo12:.LANCHOR81]
+	adrp	x0, .LANCHOR83
+	str	xzr, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR137
+	strh	wzr, [x0, #:lo12:.LANCHOR137]
+.L712:
+	ldrh	w0, [x25]
+	cmp	w19, w0
+	bge	.L719
+	adrp	x0, .LANCHOR51
+	ldrh	w8, [x27, #:lo12:.LANCHOR36]
+	mov	w5, 0
+	mov	w6, 0
+	ldrh	w7, [x0, #:lo12:.LANCHOR51]
+	b	.L720
+.L714:
+	ldrb	w0, [x26, w6, sxtw]
+	mov	w1, w19
+	bl	V2P_block
+	bl	FtlBbmIsBadBlock
+	cbnz	w0, .L713
+	add	w5, w7, w5
+	sxth	w5, w5
+.L713:
+	add	w6, w6, 1
+	sxth	w6, w6
+.L720:
+	cmp	w6, w8
+	blt	.L714
+	cbz	w5, .L715
+	mov	w0, 32768
+	sdiv	w5, w0, w5
+	sxth	w5, w5
+.L716:
+	ldr	x1, [x24, #:lo12:.LANCHOR80]
+	mov	w0, 6
+	smaddl	x0, w19, w0, x1
+	strh	w5, [x0, 4]
+	adrp	x0, .LANCHOR90
+	ldrh	w0, [x0, #:lo12:.LANCHOR90]
+	cmp	w19, w0
+	beq	.L717
+	adrp	x0, .LANCHOR91
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	cmp	w19, w0
+	beq	.L717
+	adrp	x0, .LANCHOR92
+	ldrh	w0, [x0, #:lo12:.LANCHOR92]
+	cmp	w19, w0
+	beq	.L717
+	adrp	x0, .LANCHOR82
+	ldr	x0, [x0, #:lo12:.LANCHOR82]
+	ldrh	w0, [x0, w19, sxtw 1]
+	cbnz	w0, .L718
+	add	w21, w21, 1
+	mov	w0, w19
+	and	w21, w21, 65535
+	bl	INSERT_FREE_LIST
+.L717:
+	add	w19, w19, 1
+	sxth	w19, w19
+	b	.L712
+.L715:
+	adrp	x0, .LANCHOR82
+	mov	w1, -1
+	ldr	x0, [x0, #:lo12:.LANCHOR82]
+	strh	w1, [x0, w19, sxtw 1]
+	b	.L716
+.L718:
+	add	w20, w20, 1
+	mov	w0, w19
+	and	w20, w20, 65535
+	bl	INSERT_DATA_LIST
+	b	.L717
+.L719:
+	strh	w20, [x23, #:lo12:.LANCHOR84]
+	add	w20, w20, w21
+	strh	w21, [x22, #:lo12:.LANCHOR87]
+	cmp	w0, w20
+	bge	.L721
+	mov	w2, 2368
+	adrp	x1, .LANCHOR138
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR138
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L721:
+	mov	w0, 0
+	ldr	x27, [sp, 80]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	ret
+	.size	SupperBlkListInit, .-SupperBlkListInit
+	.section	.text.FtlGcPageVarInit,"ax",@progbits
+	.align	2
+	.global	FtlGcPageVarInit
+	.type	FtlGcPageVarInit, %function
+FtlGcPageVarInit:
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR108
+	mov	w1, 255
+	add	x29, sp, 0
+	strh	wzr, [x0, #:lo12:.LANCHOR108]
+	adrp	x0, .LANCHOR110
+	str	x19, [sp, 16]
+	adrp	x19, .LANCHOR53
+	strh	wzr, [x0, #:lo12:.LANCHOR110]
+	adrp	x0, .LANCHOR109
+	ldrh	w2, [x19, #:lo12:.LANCHOR53]
+	ldr	x0, [x0, #:lo12:.LANCHOR109]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	ldrh	w2, [x19, #:lo12:.LANCHOR53]
+	mov	w0, 12
+	mov	w1, 255
+	mul	w2, w2, w0
+	adrp	x0, .LANCHOR111
+	ldr	x0, [x0, #:lo12:.LANCHOR111]
+	bl	ftl_memset
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	b	FtlGcBufInit
+	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
+	.section	.text.ftl_memcpy,"ax",@progbits
+	.align	2
+	.global	ftl_memcpy
+	.type	ftl_memcpy, %function
+ftl_memcpy:
+	uxtw	x2, w2
+	b	memcpy
+	.size	ftl_memcpy, .-ftl_memcpy
+	.section	.text.FlashReadIdbData,"ax",@progbits
+	.align	2
+	.global	FlashReadIdbData
+	.type	FlashReadIdbData, %function
+FlashReadIdbData:
+	stp	x29, x30, [sp, -16]!
+	mov	w2, 2048
+	adrp	x1, .LANCHOR139
+	add	x1, x1, :lo12:.LANCHOR139
+	add	x29, sp, 0
+	bl	ftl_memcpy
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	FlashReadIdbData, .-FlashReadIdbData
+	.section	.text.FlashLoadPhyInfoInRam,"ax",@progbits
+	.align	2
+	.global	FlashLoadPhyInfoInRam
+	.type	FlashLoadPhyInfoInRam, %function
+FlashLoadPhyInfoInRam:
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR140
+	add	x8, x0, :lo12:.LANCHOR140
+	adrp	x11, .LANCHOR22
+	add	x29, sp, 0
+	add	x8, x8, 1
+	mov	x7, x0
+	add	x11, x11, :lo12:.LANCHOR22
+	stp	x19, x20, [sp, 16]
+	mov	x10, 0
+.L731:
+	ldrb	w2, [x8, -1]
+	mov	w12, w10
+	lsl	x20, x10, 5
+	mov	x1, x11
+	mov	x0, x8
+	bl	FlashMemCmp8
+	mov	w19, w0
+	cbnz	w0, .L729
+	add	x0, x7, :lo12:.LANCHOR140
+	ubfiz	x12, x12, 5, 32
+	add	x20, x0, x20
+	add	x0, x0, x12
+	adrp	x1, .LANCHOR141
+	add	x4, x1, :lo12:.LANCHOR141
+	ldrb	w3, [x0, 22]
+	mov	x0, 0
+.L730:
+	lsl	x5, x0, 5
+	mov	w2, w0
+	ldrb	w5, [x5, x4]
+	cmp	w5, w3
+	beq	.L733
+	add	x0, x0, 1
+	cmp	x0, 4
+	bne	.L730
+	mov	w2, w0
+.L733:
+	ubfiz	x0, x2, 5, 32
+	add	x1, x1, :lo12:.LANCHOR141
+	add	x1, x1, x0
+	mov	w2, 32
+	adrp	x0, .LANCHOR7
+	add	x0, x0, :lo12:.LANCHOR7
+	bl	ftl_memcpy
+	mov	w2, 32
+	mov	x1, x20
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
+	bl	ftl_memcpy
+	b	.L728
+.L729:
+	add	x10, x10, 1
+	add	x8, x8, 32
+	cmp	x10, 73
+	bne	.L731
+	mov	w19, -1
+.L728:
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	FlashLoadPhyInfoInRam, .-FlashLoadPhyInfoInRam
+	.section	.text.ftl_memcpy32,"ax",@progbits
+	.align	2
+	.global	ftl_memcpy32
+	.type	ftl_memcpy32, %function
+ftl_memcpy32:
+	mov	x3, 0
+.L738:
+	cmp	w2, w3
+	bhi	.L739
+	ret
+.L739:
+	ldr	w4, [x1, x3, lsl 2]
+	str	w4, [x0, x3, lsl 2]
+	add	x3, x3, 1
+	b	.L738
+	.size	ftl_memcpy32, .-ftl_memcpy32
+	.section	.text.NandcCopy1KB,"ax",@progbits
+	.align	2
+	.global	NandcCopy1KB
+	.type	NandcCopy1KB, %function
+NandcCopy1KB:
+	stp	x29, x30, [sp, -48]!
+	and	w1, w1, 255
+	cmp	w1, 1
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w19, w2, 255
+	str	x21, [sp, 32]
+	add	x2, x0, 4096
+	add	x21, x0, 512
+	ubfiz	x0, x19, 9, 8
+	mov	x20, x4
+	add	x0, x2, x0
+	bne	.L741
+	cbz	x3, .L742
+	tst	x3, 3
+	bne	.L743
+	mov	w2, 256
+	mov	x1, x3
+	bl	ftl_memcpy32
+.L742:
+	cbz	x20, .L740
+	ldrb	w0, [x20]
+	lsr	w19, w19, 1
+	ldrb	w1, [x20, 1]
+	orr	x1, x0, x1, lsl 8
+	ldrb	w0, [x20, 2]
+	orr	x1, x1, x0, lsl 16
+	ldrb	w0, [x20, 3]
+	orr	x0, x1, x0, lsl 24
+	mov	w1, 12
+	mul	w19, w19, w1
+	str	w0, [x21, w19, sxtw 2]
+.L740:
+	ldp	x19, x20, [sp, 16]
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
+.L743:
+	mov	w2, 1024
+	mov	x1, x3
+	bl	ftl_memcpy
+	b	.L742
+.L741:
+	cbz	x3, .L746
+	tst	x3, 3
+	bne	.L747
+	mov	x1, x0
+	mov	w2, 256
+	mov	x0, x3
+	bl	ftl_memcpy32
+.L746:
+	cbz	x20, .L740
+	lsr	w19, w19, 1
+	mov	w0, 12
+	mul	w19, w19, w0
+	ldr	w0, [x21, w19, sxtw 2]
+	strb	w0, [x20]
+	lsr	w1, w0, 8
+	strb	w1, [x20, 1]
+	lsr	w1, w0, 16
+	lsr	w0, w0, 24
+	strb	w1, [x20, 2]
+	strb	w0, [x20, 3]
+	b	.L740
+.L747:
+	mov	x1, x0
+	mov	w2, 1024
+	mov	x0, x3
+	bl	ftl_memcpy
+	b	.L746
+	.size	NandcCopy1KB, .-NandcCopy1KB
+	.section	.text.NandcXferData,"ax",@progbits
+	.align	2
+	.global	NandcXferData
+	.type	NandcXferData, %function
+NandcXferData:
+	stp	x29, x30, [sp, -192]!
+	tst	x3, 63
+	add	x29, sp, 0
+	stp	x25, x26, [sp, 64]
+	and	w25, w0, 255
+	stp	x19, x20, [sp, 16]
+	adrp	x0, .LANCHOR6
+	and	w20, w1, 255
+	add	x0, x0, :lo12:.LANCHOR6
+	sbfiz	x1, x25, 4, 32
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	mov	x26, x3
+	stp	x27, x28, [sp, 80]
+	and	w24, w2, 255
+	mov	x21, x4
+	ldr	x19, [x0, x1]
+	bne	.L760
+	cbnz	x4, .L761
+	add	x21, x29, 128
+	mov	w2, 64
+	mov	w1, 255
+	add	x0, x29, 128
+	bl	ftl_memset
+.L761:
+	mov	x5, x21
+	mov	x4, x26
+	mov	w2, w24
+	mov	w1, w20
+	mov	w3, 0
+	mov	w0, w25
+	bl	NandcXferStart
+	mov	w0, w25
+	bl	NandcXferComp
+	cbnz	w20, .L785
+	adrp	x0, .LANCHOR30
+	adrp	x4, .LANCHOR33
+	mov	x1, x0
+	add	x4, x4, :lo12:.LANCHOR33
+	ldr	w2, [x0, #:lo12:.LANCHOR30]
+	mov	w0, 128
+	mov	w3, 64
+	cmp	w2, 25
+	ubfx	x2, x24, 1, 7
+	add	x2, x21, x2, lsl 2
+	csel	w3, w3, w0, cc
+	mov	w0, 0
+.L764:
+	add	w5, w3, w0
+	cmp	x21, x2
+	bne	.L765
+	adrp	x0, .LANCHOR32
+	ldr	w4, [x1, #:lo12:.LANCHOR30]
+	lsr	w24, w24, 2
+	mov	w2, 0
+	ldr	w3, [x0, #:lo12:.LANCHOR32]
+	mov	w22, 0
+.L766:
+	cmp	w2, w24
+	bcs	.L762
+	cbnz	w4, .L772
+.L762:
+	str	wzr, [x19, 16]
+.L773:
+	adrp	x0, .LANCHOR32
+	ldr	w0, [x0, #:lo12:.LANCHOR32]
+	cmp	w0, 5
+	bls	.L759
+	cbnz	w20, .L759
+	ldr	w0, [x19]
+	mov	w1, 8192
+	movk	w1, 0x2, lsl 16
+	and	w1, w0, w1
+	cmp	w1, 139264
+	bne	.L759
+	orr	w0, w0, 131072
+	mov	w22, -1
+	str	w0, [x19]
+.L759:
+	mov	w0, w22
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 192
+	ret
+.L765:
+	ldr	x6, [x4, 8]
+	and	x0, x0, 4294967292
+	add	x21, x21, 4
+	ldr	w0, [x6, x0]
+	strb	w0, [x21, -4]
+	lsr	w6, w0, 8
+	strb	w6, [x21, -3]
+	lsr	w6, w0, 16
+	strb	w6, [x21, -2]
+	lsr	w0, w0, 24
+	strb	w0, [x21, -1]
+	mov	w0, w5
+	b	.L764
+.L772:
+	uxtw	x0, w2
+	add	x0, x0, 8
+	ldr	w0, [x19, x0, lsl 2]
+	str	w0, [x29, 120]
+	ldr	w0, [x29, 120]
+	tbnz	x0, 2, .L788
+	ldr	w0, [x29, 120]
+	tbnz	x0, 15, .L788
+	cmp	w3, 5
+	bls	.L768
+	ldr	w1, [x29, 120]
+	ubfx	x6, x1, 3, 5
+	ldr	w1, [x29, 120]
+	ldr	w0, [x29, 120]
+	ubfx	x1, x1, 27, 1
+	ubfx	x5, x0, 16, 5
+	ldr	w0, [x29, 120]
+	orr	w1, w6, w1, lsl 5
+	ubfx	x0, x0, 29, 1
+	orr	w0, w5, w0, lsl 5
+	cmp	w1, w0
+	ldr	w0, [x29, 120]
+	bls	.L769
+	ubfx	x1, x0, 3, 5
+	ldr	w0, [x29, 120]
+	ubfx	x0, x0, 27, 1
+.L794:
+	orr	w0, w1, w0, lsl 5
+.L770:
+	cmp	w22, w0
+	csel	w22, w22, w0, cs
+.L767:
+	add	w2, w2, 1
+	b	.L766
+.L769:
+	ubfx	x1, x0, 16, 5
+	ldr	w0, [x29, 120]
+	ubfx	x0, x0, 29, 1
+	b	.L794
+.L768:
+	cmp	w3, 3
+	bls	.L789
+	ldr	w1, [x29, 120]
+	ubfx	x6, x1, 3, 5
+	ldr	w1, [x29, 120]
+	ldr	w0, [x29, 120]
+	ubfx	x1, x1, 28, 1
+	ubfx	x5, x0, 16, 5
+	ldr	w0, [x29, 120]
+	orr	w1, w6, w1, lsl 5
+	ubfx	x0, x0, 30, 1
+	orr	w0, w5, w0, lsl 5
+	cmp	w1, w0
+	ldr	w0, [x29, 120]
+	bls	.L771
+	ubfx	x1, x0, 3, 5
+	ldr	w0, [x29, 120]
+	ubfx	x0, x0, 28, 1
+	b	.L794
+.L771:
+	ubfx	x1, x0, 16, 5
+	ldr	w0, [x29, 120]
+	ubfx	x0, x0, 30, 1
+	b	.L794
+.L789:
+	mov	w0, 0
+	b	.L770
+.L788:
+	mov	w22, -1
+	b	.L767
+.L785:
+	mov	w22, 0
+	b	.L762
+.L760:
+	cmp	w20, 1
+	bne	.L774
+	cmp	x4, 0
+	mov	w23, 2
+	csel	w23, w23, wzr, ne
+	mov	w27, 0
+	lsl	w23, w23, 1
+	mov	w22, 0
+.L775:
+	cmp	w22, w24
+	bcc	.L777
+	mov	w22, 0
+	b	.L773
+.L777:
+	and	w28, w22, 3
+	cbz	x26, .L790
+	lsl	w3, w22, 9
+	add	x3, x26, x3
+.L776:
+	add	x4, x21, x27, uxtw
+	mov	w2, w28
+	mov	w1, 1
+	mov	x0, x19
+	bl	NandcCopy1KB
+	add	w22, w22, 2
+	mov	w3, w28
+	mov	x5, 0
+	mov	x4, 0
+	mov	w2, 2
+	mov	w1, 1
+	mov	w0, w25
+	bl	NandcXferStart
+	add	w27, w27, w23
+	mov	w0, w25
+	bl	NandcXferComp
+	b	.L775
+.L790:
+	mov	x3, 0
+	b	.L776
+.L774:
+	mov	w0, w25
+	mov	x5, 0
+	mov	x4, 0
+	mov	w3, 0
+	mov	w2, 2
+	mov	w1, 0
+	bl	NandcXferStart
+	mov	w27, 2
+	cmp	x21, 0
+	mov	w28, 0
+	csel	w27, w27, wzr, ne
+	mov	w23, 0
+	lsl	w0, w27, 1
+	mov	w22, 0
+	str	w0, [x29, 108]
+.L778:
+	cmp	w24, w23
+	bls	.L773
+	mov	w0, w25
+	bl	NandcXferComp
+	ldr	w0, [x19, 32]
+	add	w27, w23, 2
+	str	w0, [x29, 120]
+	cmp	w24, w27
+	bls	.L779
+	mov	x5, 0
+	mov	x4, 0
+	and	w3, w27, 3
+	mov	w2, 2
+	mov	w1, 0
+	mov	w0, w25
+	bl	NandcXferStart
+.L779:
+	ldr	w0, [x29, 120]
+	tbnz	x0, 2, .L791
+	ldr	w0, [x29, 120]
+	ubfx	x1, x0, 3, 5
+	ldr	w0, [x29, 120]
+	ubfx	x0, x0, 27, 1
+	orr	w0, w1, w0, lsl 5
+	cmp	w22, w0
+	csel	w22, w22, w0, cs
+.L780:
+	and	w2, w23, 3
+	cbz	x26, .L792
+	lsl	w3, w23, 9
+	add	x3, x26, x3
+.L781:
+	add	x4, x21, x28, uxtw
+	mov	x0, x19
+	mov	w1, 0
+	bl	NandcCopy1KB
+	ldr	w0, [x29, 108]
+	mov	w23, w27
+	add	w28, w28, w0
+	b	.L778
+.L791:
+	mov	w22, -1
+	b	.L780
+.L792:
+	mov	x3, 0
+	b	.L781
+	.size	NandcXferData, .-NandcXferData
+	.section	.text.FlashReadRawPage,"ax",@progbits
+	.align	2
+	.global	FlashReadRawPage
+	.type	FlashReadRawPage, %function
+FlashReadRawPage:
+	stp	x29, x30, [sp, -64]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	ands	w19, w0, 255
+	stp	x21, x22, [sp, 32]
+	mov	w21, w1
+	str	x23, [sp, 48]
+	adrp	x1, .LANCHOR29+9
+	mov	x22, x2
+	mov	x23, x3
+	ldrb	w20, [x1, #:lo12:.LANCHOR29+9]
+	bne	.L796
+	adrp	x0, .LANCHOR2
+	adrp	x1, .LANCHOR3
+	ldrb	w0, [x0, #:lo12:.LANCHOR2]
+	ldr	w1, [x1, #:lo12:.LANCHOR3]
+	mul	w0, w0, w1
+	cmp	w0, w21
+	mov	w0, 4
+	csel	w20, w20, w0, ls
+.L796:
+	mov	w0, w19
+	bl	NandcWaitFlashReady
+	mov	w0, w19
+	bl	NandcFlashCs
+	mov	w1, w21
+	mov	w0, w19
+	bl	FlashReadCmd
+	mov	w0, w19
+	bl	NandcWaitFlashReady
+	mov	w2, w20
+	mov	x4, x23
+	mov	x3, x22
+	mov	w1, 0
+	mov	w0, w19
+	bl	NandcXferData
+	mov	w2, w0
+	mov	w0, w19
+	bl	NandcFlashDeCs
+	ldr	x23, [sp, 48]
+	mov	w0, w2
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+	.size	FlashReadRawPage, .-FlashReadRawPage
+	.section	.text.FlashDdrTunningRead,"ax",@progbits
+	.align	2
+	.global	FlashDdrTunningRead
+	.type	FlashDdrTunningRead, %function
+FlashDdrTunningRead:
+	stp	x29, x30, [sp, -112]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	and	w24, w0, 255
+	adrp	x0, .LANCHOR19
+	stp	x25, x26, [sp, 64]
+	stp	x21, x22, [sp, 32]
+	mov	w25, w1
+	ldr	x0, [x0, #:lo12:.LANCHOR19]
+	mov	w22, 6
+	stp	x27, x28, [sp, 80]
+	mov	x23, x2
+	stp	x19, x20, [sp, 16]
+	mov	x28, x3
+	mov	w26, w4
+	ldr	w0, [x0, 304]
+	str	w0, [x29, 108]
+	adrp	x0, .LANCHOR32
+	ldr	w0, [x0, #:lo12:.LANCHOR32]
+	cmp	w0, 8
+	mov	w0, 12
+	csel	w22, w22, w0, cc
+	cbz	w4, .L812
+	mov	w0, 1
+	bl	FlashSetInterfaceMode
+	mov	w0, 1
+	bl	NandcSetMode
+	mov	w0, w24
+	adrp	x19, .LANCHOR24
+	bl	FlashReset
+	mov	x3, x28
+	mov	x2, x23
+	mov	w1, w25
+	mov	w0, w24
+	bl	FlashReadRawPage
+	mov	w21, w0
+	ldrb	w0, [x19, #:lo12:.LANCHOR24]
+	bl	FlashSetInterfaceMode
+	ldrb	w0, [x19, #:lo12:.LANCHOR24]
+	bl	NandcSetMode
+	cmn	w21, #1
+	bne	.L801
+.L810:
+	mov	w21, -1
+.L798:
+	mov	w0, w21
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L801:
+	mov	w1, w25
+	mov	w2, w21
+	adrp	x0, .LC7
+	add	x0, x0, :lo12:.LC7
+	bl	printf
+	adrp	x1, .LANCHOR142
+	ldr	w0, [x1, #:lo12:.LANCHOR142]
+	add	w0, w0, 1
+	cmp	w0, 2047
+	bhi	.L803
+	str	w0, [x1, #:lo12:.LANCHOR142]
+	b	.L798
+.L803:
+	str	wzr, [x1, #:lo12:.LANCHOR142]
+	mov	x28, 0
+	mov	x23, 0
+.L800:
+	mov	w5, 0
+	mov	w20, 0
+	mov	w6, 0
+	mov	w19, 0
+	mov	w27, -1
+.L808:
+	stp	w5, w6, [x29, 100]
+	mov	w0, w22
+	bl	NandcSetDdrPara
+	mov	w1, w25
+	mov	x3, x28
+	mov	x2, x23
+	mov	w0, w24
+	bl	FlashReadRawPage
+	add	w1, w21, 1
+	cmp	w0, w1
+	ldp	w5, w6, [x29, 100]
+	bhi	.L804
+	cmp	w0, 2
+	bhi	.L814
+	add	w19, w19, 1
+	cmp	w19, 9
+	bls	.L814
+	mov	w1, w20
+	mov	w21, w0
+	sub	w20, w22, w19
+	mov	w27, 0
+.L806:
+	cmp	w19, w6
+	csel	w20, w20, w1, hi
+.L807:
+	cbz	w20, .L809
+	mov	w1, w20
+	adrp	x0, .LC8
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+	mov	w0, w20
+	bl	NandcSetDdrPara
+.L809:
+	cbz	w27, .L798
+	adrp	x0, .LC9
+	mov	w2, w25
+	mov	w1, w24
+	add	x0, x0, :lo12:.LC9
+	bl	printf
+	cbz	w26, .L810
+	ldr	w1, [x29, 108]
+	lsr	w0, w1, 8
+	bl	NandcSetDdrPara
+	b	.L798
+.L812:
+	mov	w21, 1024
+	b	.L800
+.L804:
+	cmp	w19, w6
+	bls	.L815
+	sub	w20, w5, w19
+	cmp	w19, 7
+	bhi	.L807
+	mov	w6, w19
+.L815:
+	mov	w19, 0
+	b	.L805
+.L814:
+	mov	w5, w22
+	mov	w21, w0
+	mov	w27, 0
+	mov	x28, 0
+	mov	x23, 0
+.L805:
+	add	w22, w22, 2
+	cmp	w22, 69
+	bls	.L808
+	mov	w1, w20
+	mov	w20, w5
+	b	.L806
+	.size	FlashDdrTunningRead, .-FlashDdrTunningRead
+	.section	.text.FlashReadPage,"ax",@progbits
+	.align	2
+	.global	FlashReadPage
+	.type	FlashReadPage, %function
+FlashReadPage:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w20, w0, 255
+	stp	x21, x22, [sp, 32]
+	mov	w0, w20
+	stp	x23, x24, [sp, 48]
+	mov	w21, w1
+	mov	x22, x2
+	mov	x23, x3
+	str	x25, [sp, 64]
+	bl	FlashReadRawPage
+	mov	w19, w0
+	cmn	w0, #1
+	bne	.L825
+	adrp	x24, .LANCHOR5
+	ldrb	w25, [x24, #:lo12:.LANCHOR5]
+	cbnz	w25, .L826
+.L828:
+	adrp	x0, .LANCHOR28
+	ldrb	w0, [x0, #:lo12:.LANCHOR28]
+	cbz	w0, .L825
+	adrp	x0, .LANCHOR19
+	mov	w4, 1
+	mov	x3, x23
+	mov	x2, x22
+	ldr	x0, [x0, #:lo12:.LANCHOR19]
+	mov	w1, w21
+	ldr	w24, [x0, 304]
+	mov	w0, w20
+	bl	FlashDdrTunningRead
+	mov	w19, w0
+	cmn	w0, #1
+	beq	.L829
+	adrp	x0, .LANCHOR31
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	cmp	w19, w0, lsr 1
+	bls	.L825
+.L829:
+	lsr	w0, w24, 8
+	bl	NandcSetDdrPara
+	b	.L825
+.L826:
+	strb	wzr, [x24, #:lo12:.LANCHOR5]
+	mov	x3, x23
+	mov	x2, x22
+	mov	w1, w21
+	mov	w0, w20
+	bl	FlashReadRawPage
+	strb	w25, [x24, #:lo12:.LANCHOR5]
+	cmn	w0, #1
+	beq	.L828
+	mov	w19, w0
+.L825:
+	adrp	x24, .LANCHOR143
+	ldr	x4, [x24, #:lo12:.LANCHOR143]
+	cbz	x4, .L824
+	cmn	w19, #1
+	bne	.L824
+	mov	x3, x23
+	mov	x2, x22
+	mov	w1, w21
+	mov	w0, w20
+	blr	x4
+	mov	w19, w0
+	mov	w1, w0
+	mov	w3, w21
+	mov	w2, w20
+	adrp	x0, .LC10
+	add	x0, x0, :lo12:.LC10
+	bl	printf
+	cmn	w19, #1
+	bne	.L824
+	adrp	x0, .LANCHOR8
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	cbz	w0, .L824
+	mov	w0, w20
+	bl	flash_enter_slc_mode
+	ldr	x4, [x24, #:lo12:.LANCHOR143]
+	mov	x3, x23
+	mov	x2, x22
+	mov	w1, w21
+	mov	w0, w20
+	blr	x4
+	mov	w19, w0
+	mov	w0, w20
+	bl	flash_exit_slc_mode
+.L824:
+	mov	w0, w19
+	ldr	x25, [sp, 64]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	ret
+	.size	FlashReadPage, .-FlashReadPage
+	.section	.text.FlashDdrParaScan,"ax",@progbits
+	.align	2
+	.global	FlashDdrParaScan
+	.type	FlashDdrParaScan, %function
+FlashDdrParaScan:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR24
+	and	w20, w0, 255
+	stp	x21, x22, [sp, 32]
+	ldrb	w0, [x19, #:lo12:.LANCHOR24]
+	mov	w21, w1
+	bl	FlashSetInterfaceMode
+	ldrb	w0, [x19, #:lo12:.LANCHOR24]
+	bl	NandcSetMode
+	mov	w4, 0
+	mov	x3, 0
+	mov	x2, 0
+	mov	w1, w21
+	mov	w0, w20
+	bl	FlashDdrTunningRead
+	mov	x3, 0
+	mov	w22, w0
+	mov	x2, 0
+	mov	w0, w20
+	mov	w1, w21
+	adrp	x20, .LANCHOR28
+	bl	FlashReadRawPage
+	cmn	w0, #1
+	beq	.L845
+	cmn	w22, #1
+	bne	.L846
+.L845:
+	ldrb	w0, [x19, #:lo12:.LANCHOR24]
+	tbz	x0, 0, .L846
+	mov	w0, 1
+	bl	FlashSetInterfaceMode
+	mov	w0, 1
+	bl	NandcSetMode
+	strb	wzr, [x20, #:lo12:.LANCHOR28]
+.L847:
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
+.L846:
+	mov	w0, 1
+	strb	w0, [x20, #:lo12:.LANCHOR28]
+	b	.L847
+	.size	FlashDdrParaScan, .-FlashDdrParaScan
+	.section	.text.FlashLoadPhyInfo,"ax",@progbits
+	.align	2
+	.global	FlashLoadPhyInfo
+	.type	FlashLoadPhyInfo, %function
+FlashLoadPhyInfo:
+	stp	x29, x30, [sp, -128]!
+	mov	w0, 60
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR29
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR145
+	strb	w0, [x29, 120]
+	mov	w0, 40
+	strb	w0, [x29, 121]
+	mov	w0, 24
+	strb	w0, [x29, 122]
+	mov	w0, 16
+	strb	w0, [x29, 123]
+	add	x0, x20, :lo12:.LANCHOR29
+	stp	x23, x24, [sp, 48]
+	adrp	x21, .LANCHOR144
+	adrp	x24, .LANCHOR146
+	stp	x25, x26, [sp, 64]
+	ldrh	w0, [x0, 10]
+	adrp	x26, .LANCHOR7
+	str	w0, [x29, 108]
+	mov	w19, 0
+	ldr	x0, [x22, #:lo12:.LANCHOR145]
+	mov	w25, 4
+	str	x0, [x21, #:lo12:.LANCHOR144]
+	mov	w23, -1
+	stp	x27, x28, [sp, 80]
+	add	x26, x26, :lo12:.LANCHOR7
+	str	wzr, [x24, #:lo12:.LANCHOR146]
+	mov	w0, 0
+	bl	flash_enter_slc_mode
+.L856:
+	add	w28, w19, 1
+	mov	x27, 0
+.L858:
+	add	x0, x29, 120
+	ldrb	w0, [x0, x27]
+	bl	FlashBchSel
+	ldr	x2, [x22, #:lo12:.LANCHOR145]
+	mov	x3, 0
+	mov	w1, w19
+	mov	w0, 0
+	bl	FlashReadRawPage
+	cmn	w0, #1
+	bne	.L857
+	ldr	x2, [x22, #:lo12:.LANCHOR145]
+	mov	x3, 0
+	mov	w1, w28
+	mov	w0, 0
+	bl	FlashReadRawPage
+	cmn	w0, #1
+	bne	.L857
+	add	x27, x27, 1
+	cmp	x27, 4
+	bne	.L858
+.L859:
+	ldr	w0, [x29, 108]
+	subs	w25, w25, #1
+	add	w19, w19, w0
+	bne	.L856
+	b	.L864
+.L860:
+	mov	w1, 2036
+	add	x0, x6, 12
+	bl	JSHash
+	ldr	w1, [x6, 8]
+	cmp	w1, w0
+	bne	.L866
+	add	x23, x20, :lo12:.LANCHOR29
+	add	x1, x6, 160
+	mov	w2, 32
+	mov	x0, x23
+	bl	ftl_memcpy
+	ldr	x1, [x21, #:lo12:.LANCHOR144]
+	mov	w2, 32
+	mov	x0, x26
+	add	x1, x1, 192
+	bl	ftl_memcpy
+	ldr	x1, [x21, #:lo12:.LANCHOR144]
+	mov	w2, 852
+	adrp	x0, .LANCHOR20
+	add	x0, x0, :lo12:.LANCHOR20
+	add	x1, x1, 224
+	bl	ftl_memcpy
+	ldr	x1, [x21, #:lo12:.LANCHOR144]
+	adrp	x0, .LANCHOR28
+	str	w19, [x24, #:lo12:.LANCHOR146]
+	ldr	w2, [x1, 1076]
+	strb	w2, [x0, #:lo12:.LANCHOR28]
+	ldrh	w0, [x23, 10]
+	adrp	x2, .LANCHOR147
+	udiv	w0, w19, w0
+	add	w3, w0, 1
+	cbz	w0, .L862
+	str	w3, [x2, #:lo12:.LANCHOR147]
+.L863:
+	adrp	x0, .LANCHOR148
+	ldrh	w1, [x1, 14]
+	mov	w23, 0
+	strb	w1, [x0, #:lo12:.LANCHOR148]
+	b	.L859
+.L862:
+	mov	w0, 2
+	str	w0, [x2, #:lo12:.LANCHOR147]
+	b	.L863
+.L866:
+	mov	w23, -1
+	b	.L859
+.L857:
+	ldr	x6, [x21, #:lo12:.LANCHOR144]
+	mov	w1, 20036
+	movk	w1, 0x4e41, lsl 16
+	ldr	w0, [x6]
+	cmp	w0, w1
+	bne	.L859
+	cbnz	w23, .L860
+	add	x20, x20, :lo12:.LANCHOR29
+	ldrh	w0, [x20, 10]
+	udiv	w19, w19, w0
+	adrp	x0, .LANCHOR147
+	add	w19, w19, 1
+	str	w19, [x0, #:lo12:.LANCHOR147]
+.L864:
+	mov	w0, 0
+	bl	flash_exit_slc_mode
+	mov	w0, w23
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+	.size	FlashLoadPhyInfo, .-FlashLoadPhyInfo
+	.section	.text.ToshibaReadRetrial,"ax",@progbits
+	.align	2
+	.global	ToshibaReadRetrial
+	.type	ToshibaReadRetrial, %function
+ToshibaReadRetrial:
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	and	w21, w0, 255
+	stp	x25, x26, [sp, 64]
+	mov	w0, w21
+	stp	x19, x20, [sp, 16]
+	mov	x25, x2
+	stp	x27, x28, [sp, 80]
+	mov	x26, x3
+	str	w1, [x29, 120]
+	stp	x23, x24, [sp, 48]
+	bl	NandcWaitFlashReady
+	sbfiz	x1, x21, 4, 32
+	adrp	x0, .LANCHOR6
+	add	x0, x0, :lo12:.LANCHOR6
+	add	x2, x0, x1
+	ldr	x22, [x0, x1]
+	adrp	x1, .LANCHOR11
+	ldrb	w27, [x2, 8]
+	ldrb	w0, [x1, #:lo12:.LANCHOR11]
+	str	x1, [x29, 112]
+	add	x19, x27, 8
+	sub	w0, w0, #67
+	str	w27, [x29, 124]
+	and	w0, w0, 255
+	add	x19, x22, x19, lsl 8
+	cmp	w0, 1
+	bls	.L886
+	adrp	x0, .LANCHOR28
+	ldrb	w0, [x0, #:lo12:.LANCHOR28]
+	cbz	w0, .L887
+	mov	w23, 1
+	mov	w0, 0
+	bl	NandcSetDdrMode
+.L871:
+	add	x0, x22, x27, lsl 8
+	mov	w1, 92
+	str	w1, [x0, 2056]
+	mov	w1, 197
+	str	w1, [x0, 2056]
+.L870:
+	ldrsw	x0, [x29, 124]
+	mov	w20, 1
+	mov	w24, -1
+	add	x0, x0, 8
+	add	x0, x22, x0, lsl 8
+	str	x0, [x29, 104]
+.L872:
+	adrp	x0, .LANCHOR149
+	ldrb	w0, [x0, #:lo12:.LANCHOR149]
+	add	w0, w0, 1
+	cmp	w20, w0
+	bcc	.L881
+	mov	w28, w24
+.L880:
+	ldr	x0, [x29, 112]
+	mov	w1, 0
+	ldrb	w0, [x0, #:lo12:.LANCHOR11]
+	sub	w0, w0, #67
+	and	w0, w0, 255
+	cmp	w0, 1
+	mov	x0, x19
+	bhi	.L882
+	bl	SandiskSetRRPara
+.L883:
+	ldrsw	x0, [x29, 124]
+	add	x0, x0, 8
+	add	x22, x22, x0, lsl 8
+	mov	w0, 255
+	str	w0, [x22, 8]
+	adrp	x0, .LANCHOR31
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	add	w0, w0, w0, lsl 1
+	cmp	w28, w0, lsr 2
+	bcc	.L884
+	cmn	w28, #1
+	mov	w0, 256
+	csel	w28, w28, w0, eq
+.L884:
+	mov	w0, w21
+	bl	NandcWaitFlashReady
+	cbz	w23, .L869
+	mov	w0, 4
+	bl	NandcSetDdrMode
+.L869:
+	mov	w0, w28
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+.L887:
+	mov	w23, 0
+	b	.L871
+.L886:
+	mov	w23, 0
+	b	.L870
+.L881:
+	ldr	x0, [x29, 112]
+	mov	w1, w20
+	ldrb	w0, [x0, #:lo12:.LANCHOR11]
+	sub	w0, w0, #67
+	and	w0, w0, 255
+	cmp	w0, 1
+	mov	x0, x19
+	bhi	.L873
+	bl	SandiskSetRRPara
+.L874:
+	ldr	x0, [x29, 112]
+	ldrb	w0, [x0, #:lo12:.LANCHOR11]
+	cmp	w0, 34
+	bne	.L875
+	adrp	x0, .LANCHOR149
+	ldrb	w0, [x0, #:lo12:.LANCHOR149]
+	sub	w0, w0, #3
+	cmp	w20, w0
+	bne	.L875
+	ldr	x1, [x29, 104]
+	mov	w0, 179
+	str	w0, [x1, 8]
+.L875:
+	add	x0, x22, x27, lsl 8
+	mov	w1, 38
+	str	w1, [x0, 2056]
+	mov	w1, 93
+	str	w1, [x0, 2056]
+	cbz	w23, .L876
+	mov	w0, 4
+	bl	NandcSetDdrMode
+	ldr	w1, [x29, 120]
+	mov	x3, x26
+	mov	x2, x25
+	mov	w0, w21
+	bl	FlashReadRawPage
+	mov	w28, w0
+	mov	w0, 0
+	bl	NandcSetDdrMode
+.L877:
+	cmn	w28, #1
+	beq	.L878
+	adrp	x0, .LANCHOR31
+	cmn	w24, #1
+	csel	w24, w24, w28, ne
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	add	w0, w0, w0, lsl 1
+	cmp	w28, w0, lsr 2
+	bcc	.L880
+	mov	x26, 0
+	mov	x25, 0
+.L878:
+	add	w20, w20, 1
+	b	.L872
+.L873:
+	bl	ToshibaSetRRPara
+	b	.L874
+.L876:
+	ldr	w1, [x29, 120]
+	mov	x3, x26
+	mov	x2, x25
+	mov	w0, w21
+	bl	FlashReadRawPage
+	mov	w28, w0
+	b	.L877
+.L882:
+	bl	ToshibaSetRRPara
+	b	.L883
+	.size	ToshibaReadRetrial, .-ToshibaReadRetrial
+	.section	.text.SamsungReadRetrial,"ax",@progbits
+	.align	2
+	.global	SamsungReadRetrial
+	.type	SamsungReadRetrial, %function
+SamsungReadRetrial:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	and	w22, w0, 255
+	stp	x19, x20, [sp, 16]
+	mov	w0, w22
+	stp	x23, x24, [sp, 48]
+	mov	w23, w1
+	stp	x25, x26, [sp, 64]
+	mov	x24, x2
+	str	x27, [sp, 80]
+	mov	x25, x3
+	bl	NandcWaitFlashReady
+	adrp	x26, .LANCHOR149
+	sbfiz	x1, x22, 4, 32
+	adrp	x0, .LANCHOR6
+	add	x0, x0, :lo12:.LANCHOR6
+	adrp	x27, .LANCHOR31
+	add	x2, x0, x1
+	add	x26, x26, :lo12:.LANCHOR149
+	add	x27, x27, :lo12:.LANCHOR31
+	mov	w21, 1
+	ldr	x0, [x0, x1]
+	mov	w19, -1
+	ldrb	w20, [x2, 8]
+	add	x20, x20, 8
+	add	x20, x0, x20, lsl 8
+.L898:
+	ldrb	w0, [x26]
+	add	w0, w0, 1
+	cmp	w21, w0
+	bcc	.L902
+.L901:
+	mov	x0, x20
+	mov	w1, 0
+	bl	SamsungSetRRPara
+	adrp	x0, .LANCHOR31
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	add	w0, w0, w0, lsl 1
+	cmp	w19, w0, lsr 2
+	bcc	.L897
+	cmn	w19, #1
+	mov	w0, 256
+	csel	w19, w19, w0, eq
+.L897:
+	mov	w0, w19
+	ldr	x27, [sp, 80]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	ret
+.L902:
+	mov	w1, w21
+	mov	x0, x20
+	bl	SamsungSetRRPara
+	mov	x3, x25
+	mov	x2, x24
+	mov	w1, w23
+	mov	w0, w22
+	bl	FlashReadRawPage
+	cmn	w0, #1
+	beq	.L899
+	ldrb	w1, [x27]
+	cmn	w19, #1
+	csel	w19, w19, w0, ne
+	add	w1, w1, w1, lsl 1
+	cmp	w0, w1, lsr 2
+	bcc	.L904
+	mov	x25, 0
+	mov	x24, 0
+.L899:
+	add	w21, w21, 1
+	b	.L898
+.L904:
+	mov	w19, w0
+	b	.L901
+	.size	SamsungReadRetrial, .-SamsungReadRetrial
+	.section	.text.MicronReadRetrial,"ax",@progbits
+	.align	2
+	.global	MicronReadRetrial
+	.type	MicronReadRetrial, %function
+MicronReadRetrial:
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	and	w23, w0, 255
+	adrp	x0, .LANCHOR31
+	stp	x19, x20, [sp, 16]
+	stp	x25, x26, [sp, 64]
+	mov	w24, w1
+	ldrb	w20, [x0, #:lo12:.LANCHOR31]
+	adrp	x0, .LANCHOR8
+	stp	x21, x22, [sp, 32]
+	mov	x25, x2
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	mov	x26, x3
+	stp	x27, x28, [sp, 80]
+	cbnz	w0, .L912
+	add	w20, w20, w20, lsl 1
+	asr	w20, w20, 2
+.L913:
+	mov	w0, w23
+	bl	NandcWaitFlashReady
+	sbfiz	x1, x23, 4, 32
+	adrp	x0, .LANCHOR6
+	add	x0, x0, :lo12:.LANCHOR6
+	adrp	x28, .LANCHOR149
+	add	x2, x0, x1
+	add	x28, x28, :lo12:.LANCHOR149
+	mov	w27, 0
+	mov	w19, -1
+	ldr	x4, [x0, x1]
+	mov	w6, 239
+	ldrb	w21, [x2, 8]
+	mov	w7, 137
+	add	x22, x4, x21, lsl 8
+.L914:
+	ldrb	w0, [x28]
+	cmp	w27, w0
+	bcc	.L918
+.L917:
+	add	x21, x4, x21, lsl 8
+	mov	w0, 239
+	str	w0, [x21, 2056]
+	mov	w0, 137
+	str	w0, [x21, 2052]
+	mov	x0, 200
+	bl	udelay
+	str	wzr, [x21, 2048]
+	str	wzr, [x21, 2048]
+	cmp	w19, w20
+	str	wzr, [x21, 2048]
+	str	wzr, [x21, 2048]
+	bcc	.L919
+	cmn	w19, #1
+	mov	w0, 256
+	csel	w19, w19, w0, eq
+.L919:
+	cmp	w19, 256
+	ccmn	w19, #1, 4, ne
+	bne	.L911
+	adrp	x0, .LC11
+	mov	w4, w19
+	mov	w3, w27
+	mov	w2, w24
+	mov	w1, w27
+	add	x0, x0, :lo12:.LC11
+	bl	printf
+.L911:
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+.L912:
+	mov	w0, 3
+	sdiv	w20, w20, w0
+	b	.L913
+.L918:
+	str	w6, [x22, 2056]
+	mov	x0, 200
+	str	w7, [x22, 2052]
+	str	x4, [x29, 104]
+	stp	w6, w7, [x29, 116]
+	bl	udelay
+	add	w5, w27, 1
+	str	w5, [x22, 2048]
+	str	wzr, [x22, 2048]
+	mov	x3, x26
+	str	wzr, [x22, 2048]
+	mov	x2, x25
+	str	wzr, [x22, 2048]
+	mov	w1, w24
+	str	w5, [x29, 124]
+	mov	w0, w23
+	bl	FlashReadRawPage
+	cmn	w0, #1
+	ldp	w6, w7, [x29, 116]
+	ldr	w5, [x29, 124]
+	ldr	x4, [x29, 104]
+	beq	.L915
+	cmn	w19, #1
+	csel	w19, w19, w0, ne
+	cmp	w0, w20
+	bcc	.L921
+	mov	x26, 0
+	mov	x25, 0
+.L915:
+	mov	w27, w5
+	b	.L914
+.L921:
+	mov	w19, w0
+	b	.L917
+	.size	MicronReadRetrial, .-MicronReadRetrial
+	.section	.text.HynixReadRetrial,"ax",@progbits
+	.align	2
+	.global	HynixReadRetrial
+	.type	HynixReadRetrial, %function
+HynixReadRetrial:
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x25, x26, [sp, 64]
+	mov	w25, w1
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR20
+	add	x1, x19, :lo12:.LANCHOR20
+	stp	x27, x28, [sp, 80]
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR18
+	stp	x23, x24, [sp, 48]
+	and	x28, x0, 255
+	add	x0, x1, x28
+	mov	x23, x28
+	ldrb	w24, [x1, 2]
+	mov	x26, x2
+	ldr	x1, [x22, #:lo12:.LANCHOR18]
+	mov	x27, x3
+	ldrb	w20, [x0, 12]
+	ldrb	w1, [x1, 19]
+	cmp	w1, 7
+	bne	.L932
+	ldrb	w20, [x0, 20]
+.L932:
+	mov	w0, w23
+	bl	NandcWaitFlashReady
+	add	x6, x19, :lo12:.LANCHOR20
+	adrp	x5, .LANCHOR31
+	add	x7, x6, 4
+	add	x5, x5, :lo12:.LANCHOR31
+	mov	w4, 0
+	mov	w21, -1
+.L933:
+	cmp	w4, w24
+	bcc	.L938
+.L937:
+	ldr	x0, [x22, #:lo12:.LANCHOR18]
+	add	x19, x19, :lo12:.LANCHOR20
+	add	x19, x19, x28
+	ldrb	w0, [x0, 19]
+	cmp	w0, 7
+	bne	.L939
+	strb	w20, [x19, 20]
+.L940:
+	adrp	x0, .LANCHOR31
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	add	w0, w0, w0, lsl 1
+	cmp	w21, w0, lsr 2
+	bcc	.L931
+	cmn	w21, #1
+	mov	w0, 256
+	csel	w21, w21, w0, eq
+.L931:
+	mov	w0, w21
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+.L938:
+	add	w20, w20, 1
+	ldrb	w1, [x6, 1]
+	and	w20, w20, 255
+	mov	x2, x7
+	cmp	w24, w20
+	str	x5, [x29, 96]
+	csel	w20, w20, wzr, hi
+	str	w4, [x29, 108]
+	stp	x7, x6, [x29, 112]
+	mov	w3, w20
+	mov	w0, w23
+	bl	HynixSetRRPara
+	mov	x3, x27
+	mov	x2, x26
+	mov	w1, w25
+	mov	w0, w23
+	bl	FlashReadRawPage
+	cmn	w0, #1
+	ldr	w4, [x29, 108]
+	ldr	x5, [x29, 96]
+	ldp	x7, x6, [x29, 112]
+	beq	.L935
+	ldrb	w1, [x5]
+	cmn	w21, #1
+	csel	w21, w21, w0, ne
+	add	w1, w1, w1, lsl 1
+	cmp	w0, w1, lsr 2
+	bcc	.L942
+	mov	x27, 0
+	mov	x26, 0
+.L935:
+	add	w4, w4, 1
+	b	.L933
+.L942:
+	mov	w21, w0
+	b	.L937
+.L939:
+	strb	w20, [x19, 12]
+	b	.L940
+	.size	HynixReadRetrial, .-HynixReadRetrial
+	.section	.text.FlashProgPage,"ax",@progbits
+	.align	2
+	.global	FlashProgPage
+	.type	FlashProgPage, %function
+FlashProgPage:
+	stp	x29, x30, [sp, -64]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w20, w1
+	stp	x21, x22, [sp, 32]
+	adrp	x1, .LANCHOR29+9
+	str	x23, [sp, 48]
+	mov	x22, x2
+	ldrb	w21, [x1, #:lo12:.LANCHOR29+9]
+	ands	w19, w0, 255
+	mov	x23, x3
+	bne	.L950
+	adrp	x0, .LANCHOR2
+	adrp	x1, .LANCHOR3
+	ldrb	w0, [x0, #:lo12:.LANCHOR2]
+	ldr	w1, [x1, #:lo12:.LANCHOR3]
+	mul	w0, w0, w1
+	cmp	w0, w20
+	bls	.L950
+	adrp	x0, .LANCHOR1
+	ldrb	w0, [x0, #:lo12:.LANCHOR1]
+	cbnz	w0, .L951
+	sub	w21, w21, #2
+.L950:
+	mov	w0, w19
+	bl	NandcWaitFlashReady
+	mov	w0, w19
+	bl	NandcFlashCs
+	mov	w1, w20
+	mov	w0, w19
+	bl	FlashProgFirstCmd
+	mov	x4, x23
+	mov	x3, x22
+	mov	w2, w21
+	mov	w1, 1
+	mov	w0, w19
+	bl	NandcXferData
+	mov	w1, w20
+	mov	w0, w19
+	bl	FlashProgSecondCmd
+	mov	w0, w19
+	bl	NandcWaitFlashReady
+	mov	w1, w20
+	mov	w0, w19
+	bl	FlashReadStatus
+	mov	w2, w0
+	mov	w0, w19
+	bl	NandcFlashDeCs
+	ldr	x23, [sp, 48]
+	and	w0, w2, 1
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+.L951:
+	mov	w21, 4
+	b	.L950
+	.size	FlashProgPage, .-FlashProgPage
+	.section	.text.FlashSavePhyInfo,"ax",@progbits
+	.align	2
+	.global	FlashSavePhyInfo
+	.type	FlashSavePhyInfo, %function
+FlashSavePhyInfo:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR145
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR144
+	ldr	x0, [x22, #:lo12:.LANCHOR145]
+	adrp	x21, .LANCHOR3
+	str	x0, [x19, #:lo12:.LANCHOR144]
+	mov	w20, 0
+	adrp	x0, .LANCHOR150
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	mov	w25, 20036
+	ldrb	w0, [x0, #:lo12:.LANCHOR150]
+	movk	w25, 0x4e41, lsl 16
+	adrp	x24, .LANCHOR151
+	adrp	x26, .LANCHOR147
+	mov	w23, 0
+	add	x21, x21, :lo12:.LANCHOR3
+	add	x26, x26, :lo12:.LANCHOR147
+	bl	FlashBchSel
+	ldr	x0, [x22, #:lo12:.LANCHOR145]
+	mov	w2, 2048
+	mov	w1, 0
+	bl	ftl_memset
+	ldr	x0, [x19, #:lo12:.LANCHOR144]
+	adrp	x1, .LANCHOR25
+	mov	w2, 32
+	add	x0, x0, 16
+	str	w25, [x0, -16]
+	ldrb	w1, [x1, #:lo12:.LANCHOR25]
+	strh	w1, [x0, -4]
+	adrp	x1, .LANCHOR2
+	ldrb	w1, [x1, #:lo12:.LANCHOR2]
+	strh	w1, [x0, -2]
+	adrp	x1, .LANCHOR28
+	ldrb	w1, [x1, #:lo12:.LANCHOR28]
+	str	w1, [x0, 1060]
+	adrp	x1, .LANCHOR22
+	add	x1, x1, :lo12:.LANCHOR22
+	bl	ftl_memcpy
+	ldr	x0, [x19, #:lo12:.LANCHOR144]
+	mov	w2, 8
+	adrp	x1, .LANCHOR26
+	add	x1, x1, :lo12:.LANCHOR26
+	add	x0, x0, 80
+	bl	ftl_memcpy
+	ldr	x0, [x19, #:lo12:.LANCHOR144]
+	mov	w2, 32
+	adrp	x1, .LANCHOR17
+	add	x1, x1, :lo12:.LANCHOR17
+	add	x0, x0, 96
+	bl	ftl_memcpy
+	ldr	x0, [x19, #:lo12:.LANCHOR144]
+	mov	w2, 32
+	adrp	x1, .LANCHOR29
+	add	x1, x1, :lo12:.LANCHOR29
+	add	x0, x0, 160
+	bl	ftl_memcpy
+	ldr	x0, [x19, #:lo12:.LANCHOR144]
+	mov	w2, 32
+	adrp	x1, .LANCHOR7
+	add	x1, x1, :lo12:.LANCHOR7
+	add	x0, x0, 192
+	bl	ftl_memcpy
+	ldr	x0, [x19, #:lo12:.LANCHOR144]
+	mov	w2, 852
+	adrp	x1, .LANCHOR20
+	add	x1, x1, :lo12:.LANCHOR20
+	add	x0, x0, 224
+	bl	ftl_memcpy
+	ldr	x6, [x19, #:lo12:.LANCHOR144]
+	mov	w1, 2036
+	add	x0, x6, 12
+	bl	JSHash
+	str	w0, [x6, 8]
+	mov	w0, 1592
+	str	w0, [x6, 4]
+	ldr	x0, [x24, #:lo12:.LANCHOR151]
+	str	x0, [x19, #:lo12:.LANCHOR144]
+	mov	w0, 0
+	bl	flash_enter_slc_mode
+.L956:
+	ldr	w1, [x21]
+	mov	w2, 0
+	mov	w0, 0
+	mul	w1, w20, w1
+	bl	FlashEraseBlock
+	ldr	w1, [x21]
+	mov	x3, 0
+	ldr	x2, [x22, #:lo12:.LANCHOR145]
+	mov	w0, 0
+	mul	w1, w20, w1
+	bl	FlashProgPage
+	ldr	w1, [x21]
+	mov	x3, 0
+	ldr	x2, [x22, #:lo12:.LANCHOR145]
+	mov	w0, 0
+	mul	w1, w20, w1
+	add	w1, w1, 1
+	bl	FlashProgPage
+	ldr	w1, [x21]
+	mov	x3, 0
+	ldr	x2, [x24, #:lo12:.LANCHOR151]
+	mov	w0, 0
+	mul	w1, w20, w1
+	bl	FlashReadRawPage
+	cmn	w0, #1
+	add	w7, w20, 1
+	beq	.L954
+	ldr	x6, [x19, #:lo12:.LANCHOR144]
+	ldr	w0, [x6]
+	cmp	w0, w25
+	bne	.L954
+	mov	w1, 2036
+	add	x0, x6, 12
+	bl	JSHash
+	ldr	w1, [x6, 8]
+	cmp	w1, w0
+	bne	.L954
+	ldr	w0, [x21]
+	cmp	w23, 1
+	str	w7, [x26]
+	mul	w20, w0, w20
+	adrp	x0, .LANCHOR146
+	str	w20, [x0, #:lo12:.LANCHOR146]
+	beq	.L957
+	mov	w23, 1
+.L954:
+	mov	w20, w7
+	cmp	w7, 4
+	bne	.L956
+.L955:
+	mov	w0, 0
+	bl	flash_exit_slc_mode
+	cmp	w23, 0
+	csetm	w0, eq
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L957:
+	mov	w23, 2
+	b	.L955
+	.size	FlashSavePhyInfo, .-FlashSavePhyInfo
+	.section	.text.FlashReadIdbDataRaw,"ax",@progbits
+	.align	2
+	.global	FlashReadIdbDataRaw
+	.type	FlashReadIdbDataRaw, %function
+FlashReadIdbDataRaw:
+	stp	x29, x30, [sp, -144]!
+	mov	w1, 12336
+	movk	w1, 0x5638, lsl 16
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	mov	x23, x0
+	mov	w0, 60
+	stp	x25, x26, [sp, 64]
+	strb	w0, [x29, 136]
+	mov	w0, 40
+	strb	w0, [x29, 137]
+	mov	w0, 24
+	strb	w0, [x29, 138]
+	mov	w0, 16
+	strb	w0, [x29, 139]
+	adrp	x0, .LANCHOR31
+	stp	x19, x20, [sp, 16]
+	ldrb	w26, [x0, #:lo12:.LANCHOR31]
+	adrp	x0, .LANCHOR152
+	stp	x21, x22, [sp, 32]
+	ldr	w2, [x0, #:lo12:.LANCHOR152]
+	stp	x27, x28, [sp, 80]
+	str	x0, [x29, 120]
+	cmp	w2, w1
+	bne	.L964
+	mov	w0, 0
+	bl	flash_enter_slc_mode
+.L964:
+	adrp	x24, .LANCHOR2
+	adrp	x22, .LANCHOR3
+	add	x27, x29, 136
+	add	x22, x22, :lo12:.LANCHOR3
+	add	x28, x24, :lo12:.LANCHOR2
+	mov	w20, -1
+	mov	w19, 2
+	mov	w2, 2048
+	mov	w1, 0
+	mov	x0, x23
+	bl	ftl_memset
+.L965:
+	ldrb	w0, [x24, #:lo12:.LANCHOR2]
+	cmp	w19, w0
+	bcc	.L970
+.L969:
+	mov	w0, w26
+	bl	FlashBchSel
+	ldr	x0, [x29, 120]
+	ldr	w1, [x0, #:lo12:.LANCHOR152]
+	mov	w0, 12336
+	movk	w0, 0x5638, lsl 16
+	cmp	w1, w0
+	bne	.L963
+	mov	w0, 0
+	bl	flash_exit_slc_mode
+.L963:
+	mov	w0, w20
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 144
+	ret
+.L970:
+	mov	x4, 0
+	adrp	x25, .LANCHOR145
+.L967:
+	ldrb	w5, [x4, x27]
+	add	x21, x25, :lo12:.LANCHOR145
+	str	w5, [x29, 116]
+	mov	w0, w5
+	str	x4, [x29, 104]
+	bl	FlashBchSel
+	ldr	w1, [x22]
+	mov	x3, 0
+	ldr	x2, [x25, #:lo12:.LANCHOR145]
+	mov	w0, 0
+	mul	w1, w19, w1
+	bl	FlashReadRawPage
+	cmn	w0, #1
+	ldr	w5, [x29, 116]
+	bne	.L966
+	ldr	x4, [x29, 104]
+	add	x4, x4, 1
+	cmp	x4, 4
+	bne	.L967
+.L968:
+	add	w19, w19, 1
+	b	.L965
+.L973:
+	mov	w20, 0
+	b	.L969
+.L966:
+	ldr	x0, [x21]
+	ldr	w1, [x0]
+	mov	w0, 35899
+	movk	w0, 0xfcdc, lsl 16
+	cmp	w1, w0
+	bne	.L968
+	mov	w1, w5
+	adrp	x0, .LC12
+	add	x0, x0, :lo12:.LC12
+	bl	printf
+	ldr	x1, [x21]
+	mov	w2, 2048
+	mov	x0, x23
+	bl	ftl_memcpy
+	ldr	x0, [x21]
+	ldr	w0, [x0, 512]
+	strb	w0, [x28]
+	adrp	x0, .LANCHOR147
+	ldr	w1, [x0, #:lo12:.LANCHOR147]
+	cmp	w19, w1
+	bcs	.L973
+	str	w19, [x0, #:lo12:.LANCHOR147]
+	mov	w20, 0
+	bl	FlashSavePhyInfo
+	b	.L968
+	.size	FlashReadIdbDataRaw, .-FlashReadIdbDataRaw
+	.section	.text.FlashPageProgMsbFFData,"ax",@progbits
+	.align	2
+	.global	FlashPageProgMsbFFData
+	.type	FlashPageProgMsbFFData, %function
+FlashPageProgMsbFFData:
+	stp	x29, x30, [sp, -80]!
+	adrp	x3, .LANCHOR8
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w19, w2, 65535
+	adrp	x2, .LANCHOR18
+	stp	x21, x22, [sp, 32]
+	ldrb	w3, [x3, #:lo12:.LANCHOR8]
+	and	w21, w0, 255
+	ldr	x0, [x2, #:lo12:.LANCHOR18]
+	mov	x22, x2
+	stp	x23, x24, [sp, 48]
+	str	x25, [sp, 64]
+	ldrb	w0, [x0, 19]
+	cbz	w3, .L977
+	adrp	x2, .LANCHOR152
+	ldr	w3, [x2, #:lo12:.LANCHOR152]
+	mov	w2, 12336
+	movk	w2, 0x5638, lsl 16
+	cmp	w3, w2
+	beq	.L976
+.L977:
+	sub	w0, w0, #5
+	and	w0, w0, 255
+	cmp	w0, 63
+	bhi	.L976
+	mov	x2, 16391
+	movk	x2, 0x4000, lsl 16
+	movk	x2, 0x8000, lsl 48
+	lsr	x0, x2, x0
+	tbz	x0, 0, .L976
+	adrp	x20, .LANCHOR117
+	mov	w24, w1
+	add	x20, x20, :lo12:.LANCHOR117
+	mov	w23, 65535
+	adrp	x25, .LANCHOR151
+.L979:
+	ldr	x0, [x22, #:lo12:.LANCHOR18]
+	ldrh	w0, [x0, 10]
+	cmp	w0, w19
+	bhi	.L980
+.L976:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L980:
+	ldrh	w0, [x20, w19, sxtw 1]
+	cmp	w0, w23
+	bne	.L976
+	ldr	x0, [x25, #:lo12:.LANCHOR151]
+	mov	w2, 32768
+	mov	w1, 255
+	bl	ftl_memset
+	ldr	x2, [x25, #:lo12:.LANCHOR151]
+	add	w1, w19, w24
+	add	w19, w19, 1
+	mov	x3, 0
+	mov	w0, w21
+	and	w19, w19, 65535
+	bl	FlashProgPage
+	b	.L979
+	.size	FlashPageProgMsbFFData, .-FlashPageProgMsbFFData
+	.section	.text.ftl_memcmp,"ax",@progbits
+	.align	2
+	.global	ftl_memcmp
+	.type	ftl_memcmp, %function
+ftl_memcmp:
+	uxtw	x2, w2
+	b	memcmp
+	.size	ftl_memcmp, .-ftl_memcmp
+	.section	.text.rknand_get_clk_rate,"ax",@progbits
+	.align	2
+	.global	rknand_get_clk_rate
+	.type	rknand_get_clk_rate, %function
+rknand_get_clk_rate:
+	mov	w0, 19712
+	movk	w0, 0x8d2, lsl 16
+	ret
+	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
+	.section	.text.ftl_malloc,"ax",@progbits
+	.align	2
+	.global	ftl_malloc
+	.type	ftl_malloc, %function
+ftl_malloc:
+	mov	w1, 0
+	sxtw	x0, w0
+	b	kmalloc
+	.size	ftl_malloc, .-ftl_malloc
+	.section	.text.NandcInit,"ax",@progbits
+	.align	2
+	.global	NandcInit
+	.type	NandcInit, %function
+NandcInit:
+	stp	x29, x30, [sp, -16]!
+	adrp	x2, .LANCHOR6
+	add	x1, x2, :lo12:.LANCHOR6
+	add	x29, sp, 0
+	str	x0, [x2, #:lo12:.LANCHOR6]
+	mov	w2, 1
+	str	w2, [x1, 24]
+	mov	w2, 2
+	str	x0, [x1, 16]
+	str	x0, [x1, 32]
+	str	x0, [x1, 48]
+	str	w2, [x1, 40]
+	mov	w2, 3
+	str	wzr, [x1, 8]
+	str	w2, [x1, 56]
+	adrp	x1, .LANCHOR19
+	adrp	x2, .LANCHOR153
+	str	x0, [x1, #:lo12:.LANCHOR19]
+	ldr	w1, [x0]
+	ubfx	x3, x1, 13, 1
+	str	w3, [x2, #:lo12:.LANCHOR153]
+	ldr	w2, [x0, 352]
+	adrp	x3, .LANCHOR32
+	and	w1, w1, 245760
+	orr	w1, w1, 256
+	ubfx	x2, x2, 16, 4
+	str	w2, [x3, #:lo12:.LANCHOR32]
+	adrp	x2, .LANCHOR152
+	ldr	w3, [x0, 352]
+	str	w3, [x2, #:lo12:.LANCHOR152]
+	str	w1, [x0]
+	mov	w1, 4225
+	str	wzr, [x0, 336]
+	str	w1, [x0, 4]
+	mov	w1, 8322
+	str	w1, [x0, 344]
+	mov	w1, 6657
+	movk	w1, 0x1a, lsl 16
+	str	w1, [x0, 304]
+	mov	w0, 36864
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR154
+	adrp	x2, .LANCHOR33
+	str	x0, [x1, #:lo12:.LANCHOR154]
+	add	x1, x2, :lo12:.LANCHOR33
+	str	x0, [x2, #:lo12:.LANCHOR33]
+	add	x0, x0, 32768
+	str	wzr, [x1, 40]
+	str	x0, [x1, 8]
+	adrp	x0, .LANCHOR34
+	ldp	x29, x30, [sp], 16
+	str	wzr, [x0, #:lo12:.LANCHOR34]
+	ret
+	.size	NandcInit, .-NandcInit
+	.section	.text.FtlMemInit,"ax",@progbits
+	.align	2
+	.global	FtlMemInit
+	.type	FtlMemInit, %function
+FtlMemInit:
+	stp	x29, x30, [sp, -64]!
+	adrp	x0, .LANCHOR137
+	mov	w1, 65535
+	add	x29, sp, 0
+	strh	wzr, [x0, #:lo12:.LANCHOR137]
+	adrp	x0, .LANCHOR155
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR53
+	str	wzr, [x0, #:lo12:.LANCHOR155]
+	adrp	x0, .LANCHOR156
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR36
+	str	wzr, [x0, #:lo12:.LANCHOR156]
+	adrp	x0, .LANCHOR157
+	str	x23, [sp, 48]
+	adrp	x21, .LANCHOR56
+	str	wzr, [x0, #:lo12:.LANCHOR157]
+	adrp	x0, .LANCHOR158
+	adrp	x23, .LANCHOR57
+	str	wzr, [x0, #:lo12:.LANCHOR158]
+	adrp	x0, .LANCHOR159
+	str	wzr, [x0, #:lo12:.LANCHOR159]
+	adrp	x0, .LANCHOR160
+	str	wzr, [x0, #:lo12:.LANCHOR160]
+	adrp	x0, .LANCHOR161
+	str	wzr, [x0, #:lo12:.LANCHOR161]
+	adrp	x0, .LANCHOR162
+	str	wzr, [x0, #:lo12:.LANCHOR162]
+	adrp	x0, .LANCHOR163
+	str	wzr, [x0, #:lo12:.LANCHOR163]
+	adrp	x0, .LANCHOR164
+	str	wzr, [x0, #:lo12:.LANCHOR164]
+	adrp	x0, .LANCHOR165
+	str	wzr, [x0, #:lo12:.LANCHOR165]
+	adrp	x0, .LANCHOR166
+	str	wzr, [x0, #:lo12:.LANCHOR166]
+	adrp	x0, .LANCHOR78
+	str	wzr, [x0, #:lo12:.LANCHOR78]
+	adrp	x0, .LANCHOR167
+	str	wzr, [x0, #:lo12:.LANCHOR167]
+	adrp	x0, .LANCHOR168
+	str	wzr, [x0, #:lo12:.LANCHOR168]
+	adrp	x0, .LANCHOR169
+	str	wzr, [x0, #:lo12:.LANCHOR169]
+	adrp	x0, .LANCHOR170
+	str	wzr, [x0, #:lo12:.LANCHOR170]
+	adrp	x0, .LANCHOR171
+	str	w1, [x0, #:lo12:.LANCHOR171]
+	adrp	x0, .LANCHOR172
+	adrp	x1, .LANCHOR112
+	str	wzr, [x0, #:lo12:.LANCHOR172]
+	adrp	x0, .LANCHOR173
+	str	wzr, [x0, #:lo12:.LANCHOR173]
+	adrp	x0, .LANCHOR72
+	str	wzr, [x0, #:lo12:.LANCHOR72]
+	mov	w0, -1
+	strh	w0, [x1, #:lo12:.LANCHOR112]
+	adrp	x1, .LANCHOR113
+	strh	w0, [x1, #:lo12:.LANCHOR113]
+	adrp	x0, .LANCHOR174
+	mov	w1, 32
+	strh	w1, [x0, #:lo12:.LANCHOR174]
+	adrp	x0, .LANCHOR175
+	mov	w1, 128
+	strh	w1, [x0, #:lo12:.LANCHOR175]
+	adrp	x0, .LANCHOR176
+	strh	wzr, [x0, #:lo12:.LANCHOR176]
+	adrp	x0, .LANCHOR114
+	strh	wzr, [x0, #:lo12:.LANCHOR114]
+	adrp	x0, .LANCHOR177
+	strh	wzr, [x0, #:lo12:.LANCHOR177]
+	adrp	x0, .LANCHOR116
+	strh	wzr, [x0, #:lo12:.LANCHOR116]
+	ldrh	w0, [x19, #:lo12:.LANCHOR53]
+	lsl	w0, w0, 1
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR109
+	str	x0, [x1, #:lo12:.LANCHOR109]
+	mov	w0, 12
+	ldrh	w1, [x19, #:lo12:.LANCHOR53]
+	mul	w0, w1, w0
+	bl	ftl_malloc
+	ldrh	w19, [x22, #:lo12:.LANCHOR36]
+	adrp	x1, .LANCHOR111
+	str	x0, [x1, #:lo12:.LANCHOR111]
+	mov	w0, 56
+	mul	w19, w19, w0
+	lsl	w20, w19, 2
+	mov	w0, w20
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR178
+	str	x0, [x1, #:lo12:.LANCHOR178]
+	mov	w0, w19
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR179
+	str	x0, [x1, #:lo12:.LANCHOR179]
+	mov	w0, w20
+	bl	ftl_malloc
+	adrp	x20, .LANCHOR107
+	adrp	x1, .LANCHOR180
+	str	x0, [x1, #:lo12:.LANCHOR180]
+	mov	w0, w19
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR76
+	str	x0, [x1, #:lo12:.LANCHOR76]
+	mov	w0, w19
+	bl	ftl_malloc
+	ldrh	w19, [x21, #:lo12:.LANCHOR56]
+	adrp	x1, .LANCHOR106
+	str	x0, [x1, #:lo12:.LANCHOR106]
+	ldrh	w0, [x22, #:lo12:.LANCHOR36]
+	lsl	w0, w0, 1
+	add	w0, w0, 1
+	str	w0, [x20, #:lo12:.LANCHOR107]
+	mov	w0, w19
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR79
+	str	x0, [x1, #:lo12:.LANCHOR79]
+	mov	w0, w19
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR181
+	str	x0, [x1, #:lo12:.LANCHOR181]
+	mov	w0, w19
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR182
+	str	x0, [x1, #:lo12:.LANCHOR182]
+	ldr	w0, [x20, #:lo12:.LANCHOR107]
+	mul	w0, w19, w0
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR104
+	str	x0, [x1, #:lo12:.LANCHOR104]
+	mov	w0, w19
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR183
+	str	x0, [x1, #:lo12:.LANCHOR183]
+	mov	w0, w19
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR184
+	str	x0, [x1, #:lo12:.LANCHOR184]
+	mov	w0, 24
+	ldr	w1, [x20, #:lo12:.LANCHOR107]
+	mul	w0, w1, w0
+	bl	ftl_malloc
+	ldrh	w19, [x23, #:lo12:.LANCHOR57]
+	adrp	x1, .LANCHOR103
+	str	x0, [x1, #:lo12:.LANCHOR103]
+	ldrh	w0, [x22, #:lo12:.LANCHOR36]
+	adrp	x22, .LANCHOR63
+	mul	w19, w19, w0
+	mov	w0, w19
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR185
+	str	x0, [x1, #:lo12:.LANCHOR185]
+	lsl	w0, w19, 2
+	bl	ftl_malloc
+	adrp	x19, .LANCHOR39
+	adrp	x1, .LANCHOR186
+	str	x0, [x1, #:lo12:.LANCHOR186]
+	ldrh	w1, [x23, #:lo12:.LANCHOR57]
+	ldr	w0, [x20, #:lo12:.LANCHOR107]
+	adrp	x20, .LANCHOR187
+	mul	w0, w1, w0
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR105
+	str	x0, [x1, #:lo12:.LANCHOR105]
+	ldrh	w0, [x19, #:lo12:.LANCHOR39]
+	ubfiz	w0, w0, 1, 15
+	strh	w0, [x20, #:lo12:.LANCHOR187]
+	and	w0, w0, 65534
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR134
+	str	x0, [x1, #:lo12:.LANCHOR134]
+	ldrh	w0, [x20, #:lo12:.LANCHOR187]
+	add	x0, x0, 547
+	lsr	x0, x0, 9
+	strh	w0, [x20, #:lo12:.LANCHOR187]
+	lsl	w0, w0, 9
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR188
+	str	x0, [x1, #:lo12:.LANCHOR188]
+	adrp	x1, .LANCHOR77
+	add	x0, x0, 32
+	str	x0, [x1, #:lo12:.LANCHOR77]
+	ldrh	w0, [x19, #:lo12:.LANCHOR39]
+	lsl	w0, w0, 1
+	bl	ftl_malloc
+	ldr	w20, [x22, #:lo12:.LANCHOR63]
+	adrp	x1, .LANCHOR82
+	str	x0, [x1, #:lo12:.LANCHOR82]
+	lsl	w20, w20, 1
+	mov	w0, w20
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR126
+	str	x0, [x1, #:lo12:.LANCHOR126]
+	mov	w0, w20
+	bl	ftl_malloc
+	adrp	x20, .LANCHOR60
+	adrp	x1, .LANCHOR122
+	str	x0, [x1, #:lo12:.LANCHOR122]
+	ldrh	w0, [x19, #:lo12:.LANCHOR39]
+	lsr	w0, w0, 3
+	add	w0, w0, 4
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR0
+	str	x0, [x1, #:lo12:.LANCHOR0]
+	ldrh	w0, [x20, #:lo12:.LANCHOR60]
+	lsl	w0, w0, 1
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR70
+	str	x0, [x1, #:lo12:.LANCHOR70]
+	ldrh	w0, [x20, #:lo12:.LANCHOR60]
+	lsl	w0, w0, 1
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR189
+	str	x0, [x1, #:lo12:.LANCHOR189]
+	ldrh	w0, [x20, #:lo12:.LANCHOR60]
+	adrp	x20, .LANCHOR61
+	lsl	w0, w0, 2
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR190
+	str	x0, [x1, #:lo12:.LANCHOR190]
+	ldrh	w0, [x20, #:lo12:.LANCHOR61]
+	lsl	w0, w0, 2
+	bl	ftl_malloc
+	ldrh	w2, [x20, #:lo12:.LANCHOR61]
+	adrp	x1, .LANCHOR191
+	str	x0, [x1, #:lo12:.LANCHOR191]
+	mov	w1, 0
+	lsl	w2, w2, 2
+	bl	ftl_memset
+	adrp	x0, .LANCHOR65
+	ldrh	w20, [x0, #:lo12:.LANCHOR65]
+	lsl	w20, w20, 2
+	mov	w0, w20
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR128
+	str	x0, [x1, #:lo12:.LANCHOR128]
+	mov	w0, w20
+	bl	ftl_malloc
+	adrp	x20, .LANCHOR66
+	adrp	x1, .LANCHOR192
+	str	x0, [x1, #:lo12:.LANCHOR192]
+	ldr	w0, [x22, #:lo12:.LANCHOR63]
+	lsl	w0, w0, 2
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR127
+	str	x0, [x1, #:lo12:.LANCHOR127]
+	ldrh	w0, [x20, #:lo12:.LANCHOR66]
+	lsl	w0, w0, 4
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR95
+	str	x0, [x1, #:lo12:.LANCHOR95]
+	ldrh	w1, [x20, #:lo12:.LANCHOR66]
+	adrp	x20, .LANCHOR43
+	ldrh	w0, [x21, #:lo12:.LANCHOR56]
+	mul	w0, w1, w0
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR123
+	str	x0, [x1, #:lo12:.LANCHOR123]
+	mov	w0, 6
+	ldrh	w1, [x19, #:lo12:.LANCHOR39]
+	adrp	x19, .LANCHOR120
+	mul	w0, w1, w0
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR80
+	str	x0, [x1, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR49
+	ldrh	w1, [x20, #:lo12:.LANCHOR43]
+	ldrh	w0, [x0, #:lo12:.LANCHOR49]
+	add	w0, w0, 31
+	asr	w0, w0, 5
+	strh	w0, [x19, #:lo12:.LANCHOR120]
+	mul	w0, w1, w0
+	lsl	w0, w0, 2
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR73
+	ldrh	w5, [x19, #:lo12:.LANCHOR120]
+	add	x2, x1, :lo12:.LANCHOR73
+	ldrh	w7, [x20, #:lo12:.LANCHOR43]
+	add	x6, x2, 40
+	mov	w3, w5
+	str	x0, [x2, 32]
+	mov	x0, 1
+.L991:
+	cmp	w0, w7
+	bcc	.L992
+	mov	w2, 8
+	sub	w2, w2, w0
+	add	x2, x2, 1
+	add	x1, x1, :lo12:.LANCHOR73
+	mov	x3, 0
+.L993:
+	add	x3, x3, 1
+	cmp	x2, x3
+	bne	.L994
+	mov	w0, 0
+	ldr	x23, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+.L992:
+	ldr	x4, [x2, 32]
+	add	w0, w0, 1
+	add	x4, x4, x3, uxtw 2
+	add	w3, w3, w5
+	str	x4, [x6], 8
+	b	.L991
+.L994:
+	add	x4, x0, x3
+	add	x4, x1, x4, lsl 3
+	str	xzr, [x4, 24]
+	b	.L993
+	.size	FtlMemInit, .-FtlMemInit
+	.section	.text.ftl_free,"ax",@progbits
+	.align	2
+	.global	ftl_free
+	.type	ftl_free, %function
+ftl_free:
+	b	free
+	.size	ftl_free, .-ftl_free
+	.section	.text.StorageSysDataLoad,"ax",@progbits
+	.align	2
+	.global	StorageSysDataLoad
+	.type	StorageSysDataLoad, %function
+StorageSysDataLoad:
+	stp	x29, x30, [sp, -32]!
+	mov	x2, 512
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x1
+	mov	w20, w0
+	mov	w1, 0
+	mov	x0, x19
+	bl	memset
+	mov	x3, x19
+	add	w1, w20, 256
+	ldp	x19, x20, [sp, 16]
+	mov	w2, 1
+	ldp	x29, x30, [sp], 32
+	mov	w0, 16
+	b	FtlRead
+	.size	StorageSysDataLoad, .-StorageSysDataLoad
+	.section	.text.StorageSysDataStore,"ax",@progbits
+	.align	2
+	.global	StorageSysDataStore
+	.type	StorageSysDataStore, %function
+StorageSysDataStore:
+	mov	x3, x1
+	mov	w2, 1
+	add	w1, w0, 256
+	mov	w0, 16
+	b	FtlWrite
+	.size	StorageSysDataStore, .-StorageSysDataStore
+	.section	.text.FlashCs123Init,"ax",@progbits
+	.align	2
+	.global	FlashCs123Init
+	.type	FlashCs123Init, %function
+FlashCs123Init:
+	ret
+	.size	FlashCs123Init, .-FlashCs123Init
+	.section	.text.rk_nand_de_init,"ax",@progbits
+	.align	2
+	.global	rk_nand_de_init
+	.type	rk_nand_de_init, %function
+rk_nand_de_init:
+	b	FlashDeInit
+	.size	rk_nand_de_init, .-rk_nand_de_init
+	.section	.text.rk_ftl_get_capacity,"ax",@progbits
+	.align	2
+	.global	rk_ftl_get_capacity
+	.type	rk_ftl_get_capacity, %function
+rk_ftl_get_capacity:
+	adrp	x0, .LANCHOR67
+	ldr	w0, [x0, #:lo12:.LANCHOR67]
+	ret
+	.size	rk_ftl_get_capacity, .-rk_ftl_get_capacity
+	.section	.text.rknand_print_hex,"ax",@progbits
+	.align	2
+	.global	rknand_print_hex
+	.type	rknand_print_hex, %function
+rknand_print_hex:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LC14
+	stp	x23, x24, [sp, 48]
+	mov	x22, x1
+	stp	x25, x26, [sp, 64]
+	adrp	x23, .LC13
+	mov	x26, x0
+	mov	w24, w2
+	uxtw	x25, w3
+	add	x23, x23, :lo12:.LC13
+	add	x21, x21, :lo12:.LC14
+	stp	x19, x20, [sp, 16]
+	str	x27, [sp, 80]
+	mov	x19, 0
+	mov	w20, 0
+	adrp	x27, .LC15
+.L1004:
+	cmp	x25, x19
+	bne	.L1010
+	ldp	x19, x20, [sp, 16]
+	adrp	x1, .LC15
+	ldp	x21, x22, [sp, 32]
+	add	x1, x1, :lo12:.LC15
+	ldp	x23, x24, [sp, 48]
+	adrp	x0, .LC6
+	ldp	x25, x26, [sp, 64]
+	add	x0, x0, :lo12:.LC6
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	b	printf
+.L1010:
+	cbnz	w20, .L1005
+	mov	w2, w19
+	mov	x1, x26
+	mov	x0, x23
+	bl	printf
+.L1005:
+	cmp	w24, 4
+	bne	.L1006
+	ldr	w1, [x22, x19, lsl 2]
+.L1012:
+	mov	x0, x21
+	add	w20, w20, 1
+	bl	printf
+	cmp	w20, 15
+	bls	.L1009
+	mov	w20, 0
+	add	x1, x27, :lo12:.LC15
+	adrp	x0, .LC6
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1009:
+	add	x19, x19, 1
+	b	.L1004
+.L1006:
+	cmp	w24, 2
+	bne	.L1008
+	ldrsh	w1, [x22, x19, lsl 1]
+	b	.L1012
+.L1008:
+	ldrb	w1, [x22, x19]
+	b	.L1012
+	.size	rknand_print_hex, .-rknand_print_hex
+	.section	.text.HynixGetReadRetryDefault,"ax",@progbits
+	.align	2
+	.global	HynixGetReadRetryDefault
+	.type	HynixGetReadRetryDefault, %function
+HynixGetReadRetryDefault:
+	stp	x29, x30, [sp, -144]!
+	mov	w1, -84
+	mov	w4, -83
+	mov	w3, -82
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR20
+	stp	x25, x26, [sp, 64]
+	mov	w26, w0
+	add	x0, x20, :lo12:.LANCHOR20
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	cmp	w26, 2
+	stp	x27, x28, [sp, 80]
+	strb	w1, [x0, 4]
+	mov	w1, -81
+	strb	w26, [x20, #:lo12:.LANCHOR20]
+	strb	w4, [x0, 5]
+	strb	w3, [x0, 6]
+	strb	w1, [x0, 7]
+	bne	.L1014
+	mov	w1, -89
+	strb	w1, [x0, 4]
+	adrp	x0, .LANCHOR193+17
+	mov	w1, -9
+	strb	w1, [x0, #:lo12:.LANCHOR193+17]
+.L1070:
+	mov	w27, 7
+	b	.L1105
+.L1014:
+	cmp	w26, 3
+	bne	.L1016
+	mov	w1, -80
+	strb	w1, [x0, 4]
+	mov	w1, -79
+	strb	w1, [x0, 5]
+	mov	w1, -78
+	strb	w1, [x0, 6]
+	mov	w1, -77
+	strb	w1, [x0, 7]
+	mov	w1, -76
+	strb	w1, [x0, 8]
+	mov	w1, -75
+	strb	w1, [x0, 9]
+	mov	w1, -74
+	strb	w1, [x0, 10]
+	mov	w1, -73
+.L1106:
+	mov	w27, 8
+	mov	w28, w27
+	strb	w1, [x0, 11]
+.L1015:
+	sub	w0, w26, #1
+	cmp	w0, 1
+	bhi	.L1020
+	adrp	x26, .LANCHOR25
+	adrp	x0, .LANCHOR26
+	adrp	x25, .LANCHOR6
+	add	x26, x26, :lo12:.LANCHOR25
+	add	x4, x0, :lo12:.LANCHOR26
+	add	x25, x25, :lo12:.LANCHOR6
+	mov	w24, 0
+.L1021:
+	ldrb	w0, [x26]
+	cmp	w0, w24
+	bhi	.L1027
+.L1028:
+	add	x20, x20, :lo12:.LANCHOR20
+	ldp	x21, x22, [sp, 32]
+	strb	w28, [x20, 1]
+	strb	w27, [x20, 2]
+	ldp	x23, x24, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 144
+	ret
+.L1016:
+	cmp	w26, 4
+	bne	.L1017
+	mov	w5, -52
+	strb	w5, [x0, 4]
+	mov	w5, -65
+	strb	w5, [x0, 5]
+	mov	w5, -86
+	strb	w5, [x0, 6]
+	mov	w5, -85
+	strb	w4, [x0, 9]
+	strb	w5, [x0, 7]
+	mov	w5, -51
+	strb	w3, [x0, 10]
+	strb	w5, [x0, 8]
+	b	.L1106
+.L1017:
+	cmp	w26, 5
+	bne	.L1018
+	mov	w1, 56
+	strb	w1, [x0, 4]
+	mov	w1, 57
+	strb	w1, [x0, 5]
+	mov	w1, 58
+	mov	w27, 8
+	strb	w1, [x0, 6]
+	mov	w1, 59
+	strb	w1, [x0, 7]
+.L1105:
+	mov	w28, 4
+	b	.L1015
+.L1018:
+	cmp	w26, 6
+	bne	.L1019
+	mov	w1, 14
+	strb	w1, [x0, 4]
+	mov	w1, 15
+	strb	w1, [x0, 5]
+	mov	w1, 16
+	mov	w27, 12
+	strb	w1, [x0, 6]
+	mov	w1, 17
+	strb	w1, [x0, 7]
+	b	.L1105
+.L1019:
+	cmp	w26, 7
+	bne	.L1070
+	mov	w1, -80
+	strb	w1, [x0, 4]
+	mov	w1, -79
+	strb	w1, [x0, 5]
+	mov	w1, -78
+	strb	w1, [x0, 6]
+	mov	w1, -77
+	strb	w1, [x0, 7]
+	mov	w1, -76
+	strb	w1, [x0, 8]
+	mov	w1, -75
+	strb	w1, [x0, 9]
+	mov	w1, -74
+	strb	w1, [x0, 10]
+	mov	w1, -73
+	strb	w1, [x0, 11]
+	mov	w1, -44
+	mov	w27, 12
+	strb	w1, [x0, 12]
+	mov	w28, 10
+	mov	w1, -43
+	strb	w1, [x0, 13]
+	b	.L1015
+.L1027:
+	ldrb	w1, [x4, w24, sxtw]
+	add	x0, x20, :lo12:.LANCHOR20
+	mov	x21, x0
+	mov	x22, 0
+	ubfiz	x19, x1, 6, 8
+	sbfiz	x1, x1, 4, 32
+	add	x2, x25, x1
+	add	x19, x19, 20
+	add	x19, x0, x19
+	ldr	x1, [x25, x1]
+	ldrb	w23, [x2, 8]
+	add	x23, x1, x23, lsl 8
+	mov	w1, 55
+.L1022:
+	add	x0, x21, x22
+	str	w1, [x23, 2056]
+	str	x4, [x29, 128]
+	str	w1, [x29, 140]
+	ldrb	w0, [x0, 4]
+	str	w0, [x23, 2052]
+	mov	x0, 80
+	bl	udelay
+	ldr	w0, [x23, 2048]
+	strb	w0, [x19, x22]
+	add	x22, x22, 1
+	cmp	w28, w22, uxtb
+	ldr	w1, [x29, 140]
+	ldr	x4, [x29, 128]
+	bhi	.L1022
+	adrp	x2, .LANCHOR193
+	add	x2, x2, :lo12:.LANCHOR193
+	mov	x0, 0
+.L1025:
+	add	x7, x19, x0
+	add	x6, x2, x0
+	mov	x1, 1
+.L1024:
+	lsl	x3, x1, 2
+	lsl	x8, x1, 3
+	ldrb	w10, [x19, x0]
+	add	x1, x1, 1
+	cmp	x1, 7
+	ldrb	w3, [x6, x3]
+	add	w3, w3, w10
+	strb	w3, [x7, x8]
+	bne	.L1024
+	add	x0, x0, 1
+	cmp	x0, 4
+	bne	.L1025
+	add	w24, w24, 1
+	strb	wzr, [x19, 16]
+	strb	wzr, [x19, 24]
+	and	w24, w24, 255
+	strb	wzr, [x19, 32]
+	strb	wzr, [x19, 40]
+	strb	wzr, [x19, 48]
+	strb	wzr, [x19, 41]
+	strb	wzr, [x19, 49]
+	b	.L1021
+.L1020:
+	sub	w0, w26, #3
+	cmp	w0, 4
+	bhi	.L1028
+	mul	w24, w27, w28
+	adrp	x25, .LANCHOR25
+	sub	w22, w28, #1
+	mov	w21, 0
+	and	x22, x22, 255
+	lsl	w0, w24, 4
+	asr	w23, w24, 2
+	str	w0, [x29, 128]
+	lsl	w0, w23, 1
+	sbfiz	x24, x23, 2, 32
+	str	w0, [x29, 140]
+	add	x0, x25, :lo12:.LANCHOR25
+	sub	w25, w26, #5
+	str	x0, [x29, 120]
+	add	x0, x22, 1
+	str	x0, [x29, 112]
+.L1029:
+	ldr	x0, [x29, 120]
+	ldrb	w0, [x0]
+	cmp	w0, w21
+	bls	.L1028
+	adrp	x0, .LANCHOR26
+	add	x0, x0, :lo12:.LANCHOR26
+	ldrb	w22, [x0, w21, sxtw]
+	adrp	x0, .LANCHOR6
+	add	x0, x0, :lo12:.LANCHOR6
+	sbfiz	x1, x22, 4, 32
+	add	x3, x0, x1
+	ldr	x0, [x0, x1]
+	ldrb	w19, [x3, 8]
+	add	x19, x0, x19, lsl 8
+	mov	w0, 255
+	str	w0, [x19, 2056]
+	mov	w0, w22
+	bl	NandcWaitFlashReady
+	add	x1, x20, :lo12:.LANCHOR20
+	cmp	w26, 7
+	beq	.L1030
+	ubfiz	x0, x22, 6, 8
+	add	x0, x0, 20
+.L1107:
+	add	x3, x1, x0
+	mov	w0, 54
+	str	w0, [x19, 2056]
+	cmp	w26, 4
+	bne	.L1032
+	mov	w0, 255
+	str	w0, [x19, 2052]
+	mov	w0, 64
+	str	w0, [x19, 2048]
+	mov	w0, 204
+.L1108:
+	str	w0, [x19, 2052]
+	mov	w0, 77
+	b	.L1109
+.L1030:
+	mov	x3, 28
+	mov	w0, 160
+	umaddl	x0, w0, w22, x3
+	b	.L1107
+.L1032:
+	cmp	w25, 1
+	bhi	.L1034
+	add	x0, x20, :lo12:.LANCHOR20
+	ldrb	w0, [x0, 4]
+	str	w0, [x19, 2052]
+	mov	w0, 82
+.L1109:
+	str	w0, [x19, 2048]
+	mov	w0, 22
+	str	w0, [x19, 2056]
+	mov	w0, 23
+	str	w0, [x19, 2056]
+	mov	w0, 4
+	str	w0, [x19, 2056]
+	mov	w0, 25
+	str	w0, [x19, 2056]
+	cmp	w26, 6
+	str	wzr, [x19, 2056]
+	str	wzr, [x19, 2052]
+	str	wzr, [x19, 2052]
+	bne	.L1035
+	mov	w0, 31
+	str	w0, [x19, 2052]
+.L1036:
+	mov	w7, 2
+	str	w7, [x19, 2052]
+	str	wzr, [x19, 2052]
+	mov	w0, 48
+	str	w0, [x19, 2056]
+	mov	w0, w22
+	str	x3, [x29, 104]
+	str	w7, [x29, 136]
+	bl	NandcWaitFlashReady
+	cmp	w25, 1
+	ldr	x3, [x29, 104]
+	bls	.L1071
+	ldr	w7, [x29, 136]
+	cmp	w26, 7
+	mov	w1, 32
+	csel	w1, w1, w7, eq
+.L1037:
+	adrp	x8, .LANCHOR145
+	mov	x7, 0
+	ldr	x0, [x8, #:lo12:.LANCHOR145]
+.L1038:
+	ldr	w10, [x19, 2048]
+	strb	w10, [x0, x7]
+	add	x7, x7, 1
+	cmp	w1, w7, uxtb
+	bhi	.L1038
+	cmp	w26, 7
+	bne	.L1039
+	mov	w1, 0
+.L1041:
+	ldrb	w7, [x0]
+	cmp	w7, 12
+	beq	.L1040
+	ldrb	w7, [x0, 1]
+	cmp	w7, 10
+	beq	.L1040
+	add	w1, w1, 1
+	add	x0, x0, 4
+	and	w1, w1, 255
+	cmp	w1, 8
+	bne	.L1041
+.L1042:
+	adrp	x0, .LC16
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC16
+	bl	printf
+.L1044:
+	b	.L1044
+.L1034:
+	mov	w0, 174
+	str	w0, [x19, 2052]
+	str	wzr, [x19, 2048]
+	mov	w0, 176
+	b	.L1108
+.L1035:
+	str	wzr, [x19, 2052]
+	b	.L1036
+.L1071:
+	mov	w1, 16
+	b	.L1037
+.L1040:
+	cmp	w1, 6
+	bhi	.L1042
+.L1043:
+	ldr	x7, [x8, #:lo12:.LANCHOR145]
+	mov	x0, 0
+.L1048:
+	ldr	w1, [x29, 128]
+	cmp	w1, w0
+	bgt	.L1049
+	ldr	x1, [x8, #:lo12:.LANCHOR145]
+	mov	w10, 8
+	add	x8, x1, x24
+.L1051:
+	mov	x0, 0
+.L1050:
+	ldr	w11, [x8, x0, lsl 2]
+	mvn	w11, w11
+	str	w11, [x8, x0, lsl 2]
+	add	x0, x0, 1
+	cmp	w23, w0
+	bgt	.L1050
+	ldr	w0, [x29, 140]
+	subs	w10, w10, #1
+	add	x8, x8, x0, uxtw 2
+	bne	.L1051
+	mov	x11, x1
+	mov	w12, 0
+	mov	w16, 1
+.L1057:
+	mov	w8, 0
+	mov	w0, 0
+.L1056:
+	mov	x15, x11
+	lsl	w10, w16, w0
+	mov	w14, 16
+	mov	w13, 0
+.L1054:
+	ldr	w17, [x15]
+	add	x15, x15, x24
+	bics	wzr, w10, w17
+	cinc	w13, w13, eq
+	subs	w14, w14, #1
+	bne	.L1054
+	cmp	w13, 9
+	orr	w10, w8, w10
+	add	w0, w0, 1
+	csel	w8, w10, w8, cs
+	cmp	w0, 32
+	bne	.L1056
+	str	w8, [x11], 4
+	add	w12, w12, 1
+	cmp	w23, w12
+	bgt	.L1057
+	mov	x0, 0
+	mov	w8, 0
+.L1060:
+	ldr	w10, [x1, x0]
+	add	x0, x0, 4
+	cmp	w10, 0
+	cinc	w8, w8, eq
+	cmp	x0, 32
+	bne	.L1060
+	cmp	w8, 7
+	ble	.L1061
+	mov	w3, 1024
+	mov	w2, 1
+	adrp	x0, .LC17
+	add	x0, x0, :lo12:.LC17
+	bl	rknand_print_hex
+	adrp	x0, .LC16
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC16
+	bl	printf
+.L1062:
+	b	.L1062
+.L1039:
+	cmp	w26, 6
+	bne	.L1043
+	mov	x1, 0
+.L1045:
+	ldrb	w7, [x0, x1]
+	cmp	w7, 12
+	beq	.L1043
+	add	x7, x0, x1
+	ldrb	w7, [x7, 8]
+	cmp	w7, 4
+	beq	.L1043
+	add	x1, x1, 1
+	cmp	x1, 8
+	bne	.L1045
+	adrp	x0, .LC16
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC16
+	bl	printf
+.L1047:
+	b	.L1047
+.L1049:
+	ldr	w1, [x19, 2048]
+	strb	w1, [x7, x0]
+	add	x0, x0, 1
+	b	.L1048
+.L1061:
+	cmp	w26, 6
+	beq	.L1073
+	cmp	w26, 7
+	mov	x1, 8
+	mov	x0, 10
+	csel	x0, x0, x1, eq
+.L1063:
+	mov	x1, x3
+	mov	w8, 0
+.L1064:
+	mov	x3, 0
+.L1065:
+	ldrb	w10, [x7, x3]
+	strb	w10, [x1, x3]
+	add	x3, x3, 1
+	cmp	w28, w3, uxtb
+	bhi	.L1065
+	ldr	x2, [x29, 112]
+	add	w8, w8, 1
+	add	x1, x1, x0
+	cmp	w27, w8
+	add	x7, x7, x2
+	bgt	.L1064
+	mov	w0, 255
+	str	w0, [x19, 2056]
+	mov	w0, w22
+	bl	NandcWaitFlashReady
+	cmp	w25, 1
+	bhi	.L1067
+	mov	w0, 54
+	str	w0, [x19, 2056]
+	adrp	x0, .LANCHOR20+4
+	mov	w1, -1
+	ldrb	w0, [x0, #:lo12:.LANCHOR20+4]
+	str	w0, [x19, 2052]
+	str	wzr, [x19, 2048]
+	mov	w0, 22
+	str	w0, [x19, 2056]
+	mov	w0, w21
+	bl	FlashReadCmd
+.L1068:
+	add	w21, w21, 1
+	mov	w0, w22
+	and	w21, w21, 255
+	bl	NandcWaitFlashReady
+	b	.L1029
+.L1073:
+	mov	x0, 4
+	b	.L1063
+.L1067:
+	mov	w0, 56
+	str	w0, [x19, 2056]
+	b	.L1068
+	.size	HynixGetReadRetryDefault, .-HynixGetReadRetryDefault
+	.section	.text.FlashGetReadRetryDefault,"ax",@progbits
+	.align	2
+	.global	FlashGetReadRetryDefault
+	.type	FlashGetReadRetryDefault, %function
+FlashGetReadRetryDefault:
+	mov	w1, w0
+	cbz	w0, .L1110
+	sub	w2, w0, #1
+	cmp	w2, 6
+	bhi	.L1112
+	b	HynixGetReadRetryDefault
+.L1112:
+	cmp	w0, 49
+	bne	.L1113
+	adrp	x2, .LANCHOR20
+	add	x0, x2, :lo12:.LANCHOR20
+	strb	w1, [x2, #:lo12:.LANCHOR20]
+	mov	w1, 4
+	strb	w1, [x0, 1]
+	mov	w1, 15
+	strb	w1, [x0, 2]
+	adrp	x1, .LANCHOR14
+	add	x1, x1, :lo12:.LANCHOR14
+	mov	w2, 64
+.L1122:
+	add	x0, x0, 4
+	b	ftl_memcpy
+.L1113:
+	sub	w0, w0, #65
+	cmp	w1, 33
+	ccmp	w0, 1, 0, ne
+	bhi	.L1114
+	adrp	x2, .LANCHOR20
+	add	x0, x2, :lo12:.LANCHOR20
+	strb	w1, [x2, #:lo12:.LANCHOR20]
+	mov	w1, 4
+.L1123:
+	strb	w1, [x0, 1]
+	mov	w1, 7
+	mov	w2, 45
+	strb	w1, [x0, 2]
+	adrp	x1, .LANCHOR10
+	add	x1, x1, :lo12:.LANCHOR10
+	b	.L1122
+.L1114:
+	cmp	w1, 34
+	mov	w0, 67
+	ccmp	w1, w0, 4, ne
+	bne	.L1115
+	adrp	x2, .LANCHOR20
+	add	x0, x2, :lo12:.LANCHOR20
+	strb	w1, [x2, #:lo12:.LANCHOR20]
+	mov	w1, 5
+	b	.L1123
+.L1115:
+	cmp	w1, 35
+	mov	w0, 68
+	ccmp	w1, w0, 4, ne
+	bne	.L1110
+	adrp	x2, .LANCHOR20
+	add	x0, x2, :lo12:.LANCHOR20
+	strb	w1, [x2, #:lo12:.LANCHOR20]
+	mov	w1, 5
+	strb	w1, [x0, 1]
+	mov	w1, 17
+	mov	w2, 95
+	strb	w1, [x0, 2]
+	adrp	x1, .LANCHOR9
+	add	x1, x1, :lo12:.LANCHOR9
+	b	.L1122
+.L1110:
+	ret
+	.size	FlashGetReadRetryDefault, .-FlashGetReadRetryDefault
+	.section	.text.FlashInit,"ax",@progbits
+	.align	2
+	.global	FlashInit
+	.type	FlashInit, %function
+FlashInit:
+	stp	x29, x30, [sp, -112]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	stp	x21, x22, [sp, 32]
+	mov	w0, 32768
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR2
+	stp	x25, x26, [sp, 64]
+	adrp	x24, .LANCHOR150
+	stp	x27, x28, [sp, 80]
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR145
+	adrp	x21, .LANCHOR28
+	adrp	x22, .LANCHOR1
+	adrp	x20, .LANCHOR22
+	str	x0, [x1, #:lo12:.LANCHOR145]
+	mov	w0, 32768
+	bl	ftl_malloc
+	adrp	x25, .LANCHOR6
+	adrp	x1, .LANCHOR151
+	add	x25, x25, :lo12:.LANCHOR6
+	adrp	x26, .LC18
+	mov	w28, 0
+	str	x0, [x1, #:lo12:.LANCHOR151]
+	mov	w0, 4096
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR194
+	str	x0, [x1, #:lo12:.LANCHOR194]
+	mov	w0, 32768
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR195
+	str	x0, [x1, #:lo12:.LANCHOR195]
+	mov	w0, 4096
+	bl	ftl_malloc
+	strb	wzr, [x21, #:lo12:.LANCHOR28]
+	adrp	x1, .LANCHOR196
+	strb	wzr, [x22, #:lo12:.LANCHOR1]
+	str	x0, [x1, #:lo12:.LANCHOR196]
+	adrp	x1, .LANCHOR148
+	mov	w0, 50
+	strb	w0, [x23, #:lo12:.LANCHOR2]
+	strb	w0, [x1, #:lo12:.LANCHOR148]
+	adrp	x0, .LANCHOR147
+	mov	w1, 128
+	str	wzr, [x0, #:lo12:.LANCHOR147]
+	adrp	x0, .LANCHOR3
+	str	w1, [x0, #:lo12:.LANCHOR3]
+	adrp	x0, .LANCHOR142
+	str	wzr, [x0, #:lo12:.LANCHOR142]
+	mov	w0, 60
+	strb	w0, [x24, #:lo12:.LANCHOR150]
+	mov	x0, x19
+	add	x19, x20, :lo12:.LANCHOR22
+	bl	NandcInit
+	mov	x27, x19
+	add	x0, x26, :lo12:.LC18
+	str	x0, [x29, 104]
+.L1129:
+	and	w26, w28, 255
+	mov	w0, w26
+	bl	FlashReset
+	ldrb	w5, [x25, 8]
+	mov	w0, w26
+	ldr	x4, [x25]
+	bl	NandcFlashCs
+	ubfiz	x1, x5, 8, 8
+	add	x1, x4, x1
+	mov	w0, 144
+	str	x1, [x29, 96]
+	str	w0, [x1, 2056]
+	mov	x0, 200
+	str	wzr, [x1, 2052]
+	bl	udelay
+	ldr	x1, [x29, 96]
+	ldr	w0, [x1, 2048]
+	strb	w0, [x19]
+	ldr	w0, [x1, 2048]
+	strb	w0, [x19, 1]
+	ldr	w0, [x1, 2048]
+	strb	w0, [x19, 2]
+	ldr	w0, [x1, 2048]
+	strb	w0, [x19, 3]
+	ldr	w0, [x1, 2048]
+	strb	w0, [x19, 4]
+	ldr	w0, [x1, 2048]
+	strb	w0, [x19, 5]
+	mov	w0, w26
+	bl	NandcFlashDeCs
+	ldrb	w2, [x19]
+	sub	w0, w2, #1
+	and	w0, w0, 255
+	cmp	w0, 253
+	bhi	.L1125
+	ldrb	w7, [x19, 5]
+	add	w1, w28, 1
+	ldrb	w6, [x19, 4]
+	ldrb	w5, [x19, 3]
+	ldrb	w4, [x19, 2]
+	ldrb	w3, [x19, 1]
+	ldr	x0, [x29, 104]
+	bl	printf
+.L1125:
+	cbnz	w28, .L1126
+	ldrb	w0, [x27]
+	sub	w0, w0, #1
+	and	w0, w0, 255
+	cmp	w0, 253
+	bhi	.L1167
+	ldrb	w0, [x27, 1]
+	cmp	w0, 255
+	beq	.L1167
+.L1126:
+	ldrb	w0, [x19]
+	cmp	w0, 181
+	bne	.L1128
+	mov	w0, 44
+	strb	w0, [x19]
+.L1128:
+	add	w28, w28, 1
+	add	x25, x25, 16
+	add	x19, x19, 8
+	cmp	w28, 4
+	bne	.L1129
+	ldrb	w0, [x20, #:lo12:.LANCHOR22]
+	cmp	w0, 173
+	beq	.L1130
+	adrp	x0, .LANCHOR153
+	ldr	w0, [x0, #:lo12:.LANCHOR153]
+	bl	NandcSetDdrMode
+.L1130:
+	mov	w2, 852
+	adrp	x26, .LANCHOR20
+	mov	w1, 0
+	add	x0, x26, :lo12:.LANCHOR20
+	adrp	x19, .LANCHOR18
+	bl	ftl_memset
+	adrp	x28, .LANCHOR29
+	add	x0, x28, :lo12:.LANCHOR29
+	str	x0, [x19, #:lo12:.LANCHOR18]
+	add	x0, x20, :lo12:.LANCHOR22
+	adrp	x27, .LANCHOR5
+	ldrb	w2, [x0, 1]
+	strb	wzr, [x27, #:lo12:.LANCHOR5]
+	cmp	w2, 161
+	beq	.L1131
+	cmp	w2, 218
+	beq	.L1131
+	and	w1, w2, -33
+	cmp	w1, 209
+	beq	.L1131
+	cmp	w2, 220
+	bne	.L1132
+	ldrb	w0, [x0, 3]
+	cmp	w0, 149
+	bne	.L1132
+.L1131:
+	mov	w0, 1
+	adrp	x25, .LANCHOR197
+	add	x1, x25, :lo12:.LANCHOR197
+	strb	w0, [x22, #:lo12:.LANCHOR1]
+	mov	w0, 16
+	strb	w0, [x23, #:lo12:.LANCHOR2]
+	strb	w0, [x24, #:lo12:.LANCHOR150]
+	add	x3, x20, :lo12:.LANCHOR22
+	ldrb	w0, [x20, #:lo12:.LANCHOR22]
+	strb	w0, [x1, 1]
+	strb	w2, [x1, 2]
+	cmp	w0, 152
+	bne	.L1133
+	ldrsb	w0, [x3, 4]
+	tbnz	w0, #31, .L1133
+	mov	w0, 24
+	strb	w0, [x24, #:lo12:.LANCHOR150]
+.L1133:
+	adrp	x0, .LANCHOR152
+	ldr	w1, [x0, #:lo12:.LANCHOR152]
+	mov	w0, 12336
+	movk	w0, 0x5638, lsl 16
+	cmp	w1, w0
+	bne	.L1134
+	mov	w0, 16
+	strb	w0, [x24, #:lo12:.LANCHOR150]
+.L1134:
+	cmp	w2, 218
+	bne	.L1135
+	add	x0, x25, :lo12:.LANCHOR197
+	mov	w1, 2048
+	strh	w1, [x0, 14]
+	mov	w1, -38
+.L1202:
+	strb	w1, [x0, 2]
+.L1136:
+	adrp	x1, .LANCHOR141
+	add	x1, x1, :lo12:.LANCHOR141
+	mov	w2, 32
+	add	x1, x1, 32
+	adrp	x0, .LANCHOR7
+	add	x0, x0, :lo12:.LANCHOR7
+	bl	ftl_memcpy
+	mov	w2, 32
+	add	x1, x25, :lo12:.LANCHOR197
+	add	x0, x28, :lo12:.LANCHOR29
+	bl	ftl_memcpy
+.L1132:
+	ldrb	w0, [x22, #:lo12:.LANCHOR1]
+	adrp	x25, .LANCHOR8
+	cbnz	w0, .L1138
+	bl	FlashLoadPhyInfoInRam
+	cbnz	w0, .L1140
+	ldr	x0, [x19, #:lo12:.LANCHOR18]
+	adrp	x24, .LANCHOR24
+	ldrb	w1, [x0, 17]
+	and	w0, w1, 7
+	strb	w0, [x24, #:lo12:.LANCHOR24]
+	tbnz	x1, 0, .L1140
+	mov	w1, 1
+	strb	w1, [x21, #:lo12:.LANCHOR28]
+	bl	FlashSetInterfaceMode
+	ldrb	w0, [x24, #:lo12:.LANCHOR24]
+	bl	NandcSetMode
+.L1140:
+	ldr	x0, [x19, #:lo12:.LANCHOR18]
+	ldrb	w0, [x0, 26]
+	strb	w0, [x25, #:lo12:.LANCHOR8]
+	bl	FlashLoadPhyInfo
+	cbz	w0, .L1138
+	ldr	x0, [x19, #:lo12:.LANCHOR18]
+	ldrh	w1, [x0, 14]
+	adrp	x0, .LC19
+	add	x0, x0, :lo12:.LC19
+	bl	printf
+	bl	FlashLoadPhyInfoInRam
+	cmn	w0, #1
+	beq	.L1124
+	bl	FlashDieInfoInit
+	ldr	x0, [x19, #:lo12:.LANCHOR18]
+	ldrb	w0, [x0, 19]
+	bl	FlashGetReadRetryDefault
+	ldr	x0, [x19, #:lo12:.LANCHOR18]
+	adrp	x1, .LANCHOR119
+	ldrh	w1, [x1, #:lo12:.LANCHOR119]
+	ldrb	w2, [x0, 9]
+	add	w1, w1, 4095
+	cmp	w2, w1, lsr 12
+	blt	.L1143
+	ldrh	w1, [x0, 14]
+	add	w1, w1, 255
+	cmp	w2, w1, lsr 8
+	bge	.L1144
+.L1143:
+	ldrh	w1, [x0, 14]
+	and	w1, w1, -256
+	strh	w1, [x0, 14]
+.L1144:
+	adrp	x0, .LANCHOR24
+	ldrb	w0, [x0, #:lo12:.LANCHOR24]
+	tst	w0, 6
+	beq	.L1145
+	bl	FlashSavePhyInfo
+	adrp	x0, .LANCHOR146
+	ldr	w1, [x0, #:lo12:.LANCHOR146]
+	mov	w0, 0
+	bl	FlashDdrParaScan
+.L1145:
+	bl	FlashSavePhyInfo
+.L1138:
+	ldr	x2, [x19, #:lo12:.LANCHOR18]
+	adrp	x24, .LANCHOR24
+	ldrb	w0, [x2, 26]
+	strb	w0, [x25, #:lo12:.LANCHOR8]
+	ldrh	w0, [x2, 16]
+	ubfx	x1, x0, 7, 1
+	strb	w1, [x27, #:lo12:.LANCHOR5]
+	adrp	x1, .LANCHOR198
+	ubfx	x3, x0, 3, 1
+	adrp	x27, .LANCHOR143
+	strb	w3, [x1, #:lo12:.LANCHOR198]
+	adrp	x1, .LANCHOR27
+	ubfx	x3, x0, 4, 1
+	ubfx	x0, x0, 8, 3
+	strb	w3, [x1, #:lo12:.LANCHOR27]
+	strb	w0, [x24, #:lo12:.LANCHOR24]
+	ldrh	w1, [x2, 10]
+	ldrb	w0, [x2, 12]
+	str	xzr, [x27, #:lo12:.LANCHOR143]
+	sdiv	w1, w1, w0
+	ldrb	w0, [x2, 18]
+	bl	BuildFlashLsbPageTable
+	bl	FlashDieInfoInit
+	ldr	x0, [x19, #:lo12:.LANCHOR18]
+	ldrh	w1, [x0, 16]
+	tbz	x1, 6, .L1147
+	adrp	x1, .LANCHOR11
+	ldrb	w0, [x0, 19]
+	adrp	x3, .LANCHOR13
+	strb	w0, [x1, #:lo12:.LANCHOR11]
+	add	x1, x26, :lo12:.LANCHOR20
+	ldrb	w2, [x1, 1]
+	strb	w2, [x3, #:lo12:.LANCHOR13]
+	adrp	x2, .LANCHOR149
+	ldrb	w4, [x1, 2]
+	strb	w4, [x2, #:lo12:.LANCHOR149]
+	sub	w4, w0, #1
+	and	w4, w4, 255
+	cmp	w4, 6
+	mov	x4, x3
+	bhi	.L1148
+	adrp	x2, HynixReadRetrial
+	add	x2, x2, :lo12:HynixReadRetrial
+	str	x2, [x27, #:lo12:.LANCHOR143]
+	sub	w2, w0, #5
+	and	w2, w2, 255
+	cmp	w2, 1
+	bhi	.L1149
+	adrp	x2, .LANCHOR34
+	add	x1, x1, 20
+	mov	w3, 1
+	str	w3, [x2, #:lo12:.LANCHOR34]
+.L1150:
+	mov	x2, 0
+	mov	w3, 0
+.L1152:
+	ldrsb	w4, [x1, x2]
+	add	x2, x2, 1
+	cmp	w4, 0
+	cinc	w3, w3, eq
+	cmp	x2, 32
+	bne	.L1152
+	cmp	w3, 27
+	bls	.L1147
+	bl	FlashGetReadRetryDefault
+	bl	FlashSavePhyInfo
+.L1147:
+	adrp	x0, .LANCHOR152
+	ldr	w1, [x0, #:lo12:.LANCHOR152]
+	mov	w0, 12336
+	movk	w0, 0x5638, lsl 16
+	cmp	w1, w0
+	bne	.L1161
+	ldrb	w0, [x25, #:lo12:.LANCHOR8]
+	cbz	w0, .L1161
+	ldr	x0, [x19, #:lo12:.LANCHOR18]
+	strb	wzr, [x0, 18]
+.L1161:
+	ldrb	w0, [x20, #:lo12:.LANCHOR22]
+	cmp	w0, 44
+	bne	.L1162
+	ldrb	w0, [x21, #:lo12:.LANCHOR28]
+	cbz	w0, .L1162
+	strb	wzr, [x21, #:lo12:.LANCHOR28]
+	mov	w0, 1
+	bl	FlashSetInterfaceMode
+	mov	w0, 1
+	bl	NandcSetMode
+.L1162:
+	mov	w0, 0
+	bl	flash_enter_slc_mode
+	ldrb	w0, [x24, #:lo12:.LANCHOR24]
+	tst	w0, 6
+	beq	.L1163
+	ldrb	w1, [x21, #:lo12:.LANCHOR28]
+	cbnz	w1, .L1164
+	tbnz	x0, 0, .L1163
+.L1164:
+	adrp	x0, .LANCHOR146
+	ldr	w1, [x0, #:lo12:.LANCHOR146]
+	mov	w0, 0
+	bl	FlashDdrParaScan
+.L1163:
+	mov	w0, 0
+	bl	flash_exit_slc_mode
+	ldr	x0, [x19, #:lo12:.LANCHOR18]
+	ldrb	w0, [x0, 20]
+	bl	FlashBchSel
+	adrp	x0, .LANCHOR139
+	add	x0, x0, :lo12:.LANCHOR139
+	bl	FlashReadIdbDataRaw
+	ldr	x2, [x19, #:lo12:.LANCHOR18]
+	mov	w0, 16
+	adrp	x1, .LANCHOR15
+	strb	w0, [x23, #:lo12:.LANCHOR2]
+	add	x0, x1, :lo12:.LANCHOR15
+	ldrb	w3, [x2, 12]
+	strh	w3, [x0, 8]
+	ldrb	w4, [x2, 7]
+	str	w4, [x0, 4]
+	ldr	w4, [x20, #:lo12:.LANCHOR22]
+	str	w4, [x1, #:lo12:.LANCHOR15]
+	adrp	x1, .LANCHOR25
+	ldrh	w4, [x2, 14]
+	ldrb	w1, [x1, #:lo12:.LANCHOR25]
+	strh	w1, [x0, 10]
+	ldrb	w1, [x2, 13]
+	strh	w1, [x0, 12]
+	ldrh	w1, [x2, 10]
+	strh	w1, [x0, 16]
+	strh	w4, [x0, 14]
+	sdiv	w3, w1, w3
+	strh	w3, [x0, 18]
+	ldrb	w5, [x2, 9]
+	strh	w5, [x0, 20]
+	mov	w3, w5
+	mul	w1, w1, w5
+	mov	w5, 512
+	strh	w5, [x0, 24]
+	mov	w5, 16
+	and	w1, w1, 65535
+	strh	w5, [x0, 26]
+	strh	w1, [x0, 22]
+	ldrb	w5, [x22, #:lo12:.LANCHOR1]
+	cmp	w5, 1
+	bne	.L1165
+	ubfiz	w1, w1, 1, 15
+	lsr	w4, w4, 1
+	ubfiz	w3, w3, 1, 15
+	strh	w1, [x0, 22]
+	strh	w4, [x0, 14]
+	mov	w1, 8
+	strh	w3, [x0, 20]
+	strh	w1, [x0, 26]
+.L1165:
+	ldrb	w0, [x2, 20]
+	bl	FlashBchSel
+	mov	w0, 0
+.L1124:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L1135:
+	cmp	w2, 220
+	bne	.L1136
+	add	x0, x25, :lo12:.LANCHOR197
+	mov	w1, 4096
+	strh	w1, [x0, 14]
+	mov	w1, -36
+	b	.L1202
+.L1149:
+	add	x2, x1, 20
+	cmp	w0, 7
+	add	x1, x1, 28
+	csel	x1, x1, x2, eq
+	b	.L1150
+.L1148:
+	sub	w1, w0, #17
+	and	w1, w1, 255
+	cmp	w1, 2
+	bhi	.L1154
+	adrp	x1, MicronReadRetrial
+	add	x1, x1, :lo12:MicronReadRetrial
+	str	x1, [x27, #:lo12:.LANCHOR143]
+	cmp	w0, 19
+	beq	.L1155
+.L1206:
+	mov	w0, 7
+	b	.L1204
+.L1155:
+	mov	w0, 15
+.L1204:
+	strb	w0, [x2, #:lo12:.LANCHOR149]
+	b	.L1147
+.L1154:
+	sub	w1, w0, #65
+	cmp	w0, 33
+	and	w1, w1, 255
+	ccmp	w1, 1, 0, ne
+	bhi	.L1156
+	adrp	x0, ToshibaReadRetrial
+	add	x0, x0, :lo12:ToshibaReadRetrial
+	str	x0, [x27, #:lo12:.LANCHOR143]
+	mov	w0, 4
+	strb	w0, [x3, #:lo12:.LANCHOR13]
+	b	.L1206
+.L1156:
+	sub	w3, w0, #34
+	sub	w1, w0, #67
+	and	w3, w3, 255
+	and	w1, w1, 255
+	cmp	w3, 1
+	ccmp	w1, 1, 0, hi
+	bhi	.L1157
+	adrp	x3, ToshibaReadRetrial
+	add	x3, x3, :lo12:ToshibaReadRetrial
+	str	x3, [x27, #:lo12:.LANCHOR143]
+	cmp	w0, 35
+	mov	w3, 68
+	ccmp	w0, w3, 4, ne
+	beq	.L1158
+	mov	w0, 7
+.L1203:
+	strb	w0, [x2, #:lo12:.LANCHOR149]
+	cmp	w1, 1
+	bhi	.L1160
+	mov	w0, 4
+.L1205:
+	strb	w0, [x4, #:lo12:.LANCHOR13]
+	b	.L1147
+.L1158:
+	mov	w0, 17
+	b	.L1203
+.L1160:
+	mov	w0, 5
+	b	.L1205
+.L1157:
+	cmp	w0, 49
+	bne	.L1147
+	adrp	x0, SamsungReadRetrial
+	add	x0, x0, :lo12:SamsungReadRetrial
+	str	x0, [x27, #:lo12:.LANCHOR143]
+	b	.L1147
+.L1167:
+	mov	w0, -2
+	b	.L1124
+	.size	FlashInit, .-FlashInit
+	.section	.text.FlashReadSlc2KPages,"ax",@progbits
+	.align	2
+	.global	FlashReadSlc2KPages
+	.type	FlashReadSlc2KPages, %function
+FlashReadSlc2KPages:
+	stp	x29, x30, [sp, -112]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	mov	w22, 56
+	stp	x25, x26, [sp, 64]
+	mov	w25, w2
+	adrp	x2, .LANCHOR29+9
+	stp	x23, x24, [sp, 48]
+	nop // between mem op and mult-accumulate
+	umaddl	x22, w1, w22, x0
+	stp	x19, x20, [sp, 16]
+	ldrb	w24, [x2, #:lo12:.LANCHOR29+9]
+	adrp	x23, .LANCHOR25
+	mov	x19, x0
+	and	w21, w1, 255
+	add	x23, x23, :lo12:.LANCHOR25
+	adrp	x26, .LANCHOR26
+	str	x27, [sp, 80]
+.L1208:
+	cmp	x22, x19
+	bne	.L1220
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L1220:
+	mov	w1, w25
+	mov	w4, w21
+	add	x3, x29, 104
+	add	x2, x29, 108
+	mov	x0, x19
+	bl	LogAddr2PhyAddr
+	ldrb	w1, [x23]
+	ldr	w0, [x29, 104]
+	cmp	w1, w0
+	bhi	.L1209
+	mov	w0, -1
+	str	w0, [x19]
+.L1210:
+	sub	w21, w21, #1
+	add	x19, x19, 56
+	and	w21, w21, 255
+	b	.L1208
+.L1209:
+	add	x1, x26, :lo12:.LANCHOR26
+	ldrb	w27, [x1, w0, uxtw]
+	mov	w0, w27
+	bl	NandcWaitFlashReady
+	mov	w0, w27
+	bl	NandcFlashCs
+	ldr	w1, [x29, 108]
+	mov	w0, w27
+	bl	FlashReadCmd
+	mov	w0, w27
+	bl	NandcWaitFlashReady
+	ldp	x3, x4, [x19, 8]
+	mov	w2, w24
+	mov	w1, 0
+	mov	w0, w27
+	bl	NandcXferData
+	mov	w20, w0
+	adrp	x0, .LANCHOR3
+	ldr	w1, [x29, 108]
+	ldr	w0, [x0, #:lo12:.LANCHOR3]
+	add	w1, w1, w0
+	mov	w0, w27
+	bl	FlashReadCmd
+	ldr	x0, [x19, 8]
+	mov	w2, w24
+	mov	w1, 0
+	cmp	x0, 0
+	add	x3, x0, 2048
+	ldr	x0, [x19, 16]
+	csel	x3, x3, xzr, ne
+	cmp	x0, 0
+	add	x4, x0, 8
+	csel	x4, x4, xzr, ne
+	mov	w0, w27
+	bl	NandcXferData
+	mov	w2, w0
+	mov	w0, w27
+	bl	NandcFlashDeCs
+	cmp	w20, w2
+	adrp	x1, .LANCHOR31
+	csel	w0, w20, w2, cs
+	ldrb	w2, [x1, #:lo12:.LANCHOR31]
+	add	w1, w2, w2, lsl 1
+	cmp	w0, w1, lsr 2
+	bls	.L1213
+	cmn	w0, #1
+	mov	w1, 256
+	csel	w0, w0, w1, eq
+.L1213:
+	cmp	w0, 256
+	ccmn	w0, #1, 4, ne
+	csel	w0, w0, wzr, eq
+	str	w0, [x19]
+	ldr	x0, [x19, 16]
+	cbz	x0, .L1216
+	ldr	w1, [x0, 8]
+	cmn	w1, #1
+	bne	.L1216
+	ldr	w0, [x0]
+	cmn	w0, #1
+	beq	.L1216
+	str	w1, [x19]
+.L1216:
+	ldr	w3, [x19]
+	cmn	w3, #1
+	bne	.L1210
+	ldr	w1, [x19, 4]
+	adrp	x0, .LC20
+	add	x0, x0, :lo12:.LC20
+	bl	printf
+	ldr	x1, [x19, 8]
+	cbz	x1, .L1218
+	adrp	x0, .LC21
+	mov	w3, 8
+	mov	w2, 4
+	add	x0, x0, :lo12:.LC21
+	bl	rknand_print_hex
+.L1218:
+	ldr	x1, [x19, 16]
+	cbz	x1, .L1210
+	mov	w3, 4
+	adrp	x0, .LC22
+	mov	w2, w3
+	add	x0, x0, :lo12:.LC22
+	bl	rknand_print_hex
+	b	.L1210
+	.size	FlashReadSlc2KPages, .-FlashReadSlc2KPages
+	.section	.text.FlashReadPages,"ax",@progbits
+	.align	2
+	.global	FlashReadPages
+	.type	FlashReadPages, %function
+FlashReadPages:
+	stp	x29, x30, [sp, -176]!
+	adrp	x3, .LANCHOR1
+	add	x29, sp, 0
+	ldrb	w3, [x3, #:lo12:.LANCHOR1]
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	stp	w2, w1, [x29, 148]
+	cbnz	w3, .L1239
+	mov	x25, x0
+	adrp	x0, .LANCHOR29+9
+	adrp	x27, .LANCHOR20
+	mov	w23, 0
+	ldrb	w0, [x0, #:lo12:.LANCHOR29+9]
+	mov	w22, 0
+	str	w0, [x29, 156]
+	adrp	x0, .LANCHOR5
+	str	x0, [x29, 128]
+	ldrb	w1, [x0, #:lo12:.LANCHOR5]
+	add	x0, x27, :lo12:.LANCHOR20
+	str	w1, [x29, 144]
+	str	x0, [x29, 104]
+	add	x0, x0, 4
+	str	x0, [x29, 96]
+.L1240:
+	ldr	w0, [x29, 152]
+	cmp	w22, w0
+	bcc	.L1274
+	mov	w0, 0
+	b	.L1238
+.L1239:
+	bl	FlashReadSlc2KPages
+.L1238:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 176
+	ret
+.L1274:
+	mov	w26, 56
+	add	x3, x29, 168
+	ldp	w1, w0, [x29, 148]
+	umull	x26, w22, w26
+	add	x2, x29, 172
+	add	x21, x25, x26
+	sub	w4, w0, w22
+	mov	x0, x21
+	ldr	w24, [x21, 4]
+	bl	LogAddr2PhyAddr
+	mov	w20, w0
+	adrp	x0, .LANCHOR25
+	ldr	w1, [x29, 168]
+	ldrb	w0, [x0, #:lo12:.LANCHOR25]
+	cmp	w0, w1
+	bhi	.L1242
+	mov	w0, -1
+	str	w0, [x25, x26]
+.L1243:
+	add	w22, w22, 1
+	b	.L1240
+.L1242:
+	adrp	x0, .LANCHOR26
+	add	x0, x0, :lo12:.LANCHOR26
+	ldrb	w19, [x0, w1, uxtw]
+	adrp	x0, .LANCHOR198
+	ldrb	w0, [x0, #:lo12:.LANCHOR198]
+	cmp	w0, 0
+	mov	w0, w19
+	csel	w20, w20, wzr, ne
+	bl	NandcWaitFlashReady
+	adrp	x1, .LANCHOR18
+	str	x1, [x29, 120]
+	ldr	x0, [x1, #:lo12:.LANCHOR18]
+	ldrb	w2, [x0, 19]
+	sub	w0, w2, #1
+	and	w0, w0, 255
+	cmp	w0, 6
+	bhi	.L1245
+	add	x0, x27, :lo12:.LANCHOR20
+	sxtw	x1, w19
+	add	x0, x0, x1
+	cmp	w2, 7
+	ldrb	w3, [x0, 12]
+	bne	.L1246
+	ldrb	w3, [x0, 20]
+.L1246:
+	adrp	x0, .LANCHOR21
+	add	x0, x0, :lo12:.LANCHOR21
+	ldrb	w0, [x0, x1]
+	cmp	w0, w3
+	beq	.L1245
+	ldp	x2, x0, [x29, 96]
+	ldrb	w1, [x0, 1]
+	mov	w0, w19
+	bl	HynixSetRRPara
+.L1245:
+	mov	w0, w19
+	bl	NandcFlashCs
+	ldr	w0, [x29, 148]
+	cmp	w0, 1
+	cset	w0, eq
+	orr	w24, w0, w24, lsr 31
+	cbz	w24, .L1247
+	adrp	x0, .LANCHOR8
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	cbz	w0, .L1247
+	mov	w0, w19
+	bl	flash_enter_slc_mode
+.L1248:
+	adrp	x0, .LANCHOR3
+	add	x0, x0, :lo12:.LANCHOR3
+	str	x0, [x29, 112]
+	ldr	x0, [x29, 128]
+	add	x0, x0, :lo12:.LANCHOR5
+	str	x0, [x29, 136]
+.L1254:
+	ldr	w1, [x29, 172]
+	cmn	w1, #1
+	bne	.L1249
+	cmp	w19, 255
+	beq	.L1276
+.L1249:
+	cbz	w20, .L1251
+	ldr	x0, [x29, 112]
+	ldr	w2, [x0]
+	mov	w0, w19
+	add	w2, w1, w2
+	bl	FlashReadDpCmd
+.L1252:
+	mov	w0, w19
+	bl	NandcWaitFlashReady
+	cbz	w20, .L1250
+	ldr	w1, [x29, 172]
+	mov	w0, w19
+	bl	FlashReadDpDataOutCmd
+.L1250:
+	ldrb	w2, [x29, 156]
+	mov	w1, 0
+	ldp	x3, x4, [x21, 8]
+	mov	w0, w19
+	bl	NandcXferData
+	mov	w28, w0
+	ldr	x0, [x29, 136]
+	ldrb	w0, [x0]
+	cbz	w0, .L1253
+	cmn	w28, #1
+	bne	.L1253
+	ldr	x0, [x29, 136]
+	mov	w20, 0
+	strb	wzr, [x0]
+	b	.L1254
+.L1247:
+	mov	w0, w19
+	bl	flash_exit_slc_mode
+	b	.L1248
+.L1251:
+	mov	w0, w19
+	bl	FlashReadCmd
+	b	.L1252
+.L1276:
+	mov	w20, 0
+	b	.L1250
+.L1253:
+	cbz	w20, .L1255
+	adrp	x0, .LANCHOR3
+	ldr	w1, [x29, 172]
+	ldr	w0, [x0, #:lo12:.LANCHOR3]
+	add	w1, w1, w0
+	mov	w0, w19
+	bl	FlashReadDpDataOutCmd
+	add	w0, w22, 1
+	mov	w1, 56
+	ldrb	w2, [x29, 156]
+	nop // between mem op and mult-accumulate
+	umaddl	x0, w0, w1, x25
+	mov	w1, 0
+	ldp	x3, x4, [x0, 8]
+	mov	w0, w19
+	bl	NandcXferData
+	cmn	w0, #1
+	mov	w23, w0
+	csel	w20, w20, wzr, ne
+.L1255:
+	mov	w0, w19
+	bl	NandcFlashDeCs
+	ldr	x0, [x29, 128]
+	cmn	w28, #1
+	ldrb	w1, [x29, 144]
+	strb	w1, [x0, #:lo12:.LANCHOR5]
+	bne	.L1256
+	adrp	x0, .LANCHOR28
+	ldrb	w0, [x0, #:lo12:.LANCHOR28]
+	cbnz	w0, .L1257
+.L1261:
+	adrp	x20, .LANCHOR143
+	ldr	x4, [x20, #:lo12:.LANCHOR143]
+	cbnz	x4, .L1258
+	ldr	w1, [x29, 172]
+	mov	w0, w19
+	ldp	x2, x3, [x21, 8]
+	bl	FlashReadRawPage
+	b	.L1313
+.L1257:
+	adrp	x0, .LANCHOR19
+	ldr	w1, [x29, 172]
+	ldp	x2, x3, [x21, 8]
+	mov	w4, 1
+	ldr	x0, [x0, #:lo12:.LANCHOR19]
+	ldr	w20, [x0, 304]
+	mov	w0, w19
+	bl	FlashDdrTunningRead
+	mov	w28, w0
+	cmn	w0, #1
+	beq	.L1260
+	adrp	x0, .LANCHOR31
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	cmp	w28, w0, lsr 1
+	bls	.L1277
+.L1260:
+	lsr	w0, w20, 8
+	bl	NandcSetDdrPara
+	cmn	w28, #1
+	beq	.L1261
+.L1277:
+	mov	w20, 0
+.L1256:
+	adrp	x0, .LANCHOR31
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	add	w0, w0, w0, lsl 1
+	cmp	w28, w0, lsr 2
+	bls	.L1262
+	adrp	x0, .LANCHOR143
+	ldr	x0, [x0, #:lo12:.LANCHOR143]
+	cmp	x0, 0
+	mov	w0, 256
+	csel	w28, w28, w0, ne
+.L1262:
+	cmp	w28, 256
+	ccmn	w28, #1, 4, ne
+	csel	w3, w28, wzr, eq
+	str	w3, [x25, x26]
+	cmn	w3, #1
+	bne	.L1269
+	adrp	x0, .LANCHOR31
+	ldr	w1, [x21, 4]
+	ldrb	w2, [x0, #:lo12:.LANCHOR31]
+	adrp	x0, .LC20
+	add	x0, x0, :lo12:.LC20
+	bl	printf
+	ldr	x1, [x21, 16]
+	cbz	x1, .L1269
+	mov	w3, 4
+	adrp	x0, .LC22
+	mov	w2, w3
+	add	x0, x0, :lo12:.LC22
+	bl	rknand_print_hex
+.L1269:
+	cbz	w20, .L1271
+	adrp	x0, .LANCHOR31
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	add	w0, w0, w0, lsl 1
+	cmp	w23, w0, lsr 2
+	bls	.L1272
+	adrp	x0, .LANCHOR143
+	ldr	x0, [x0, #:lo12:.LANCHOR143]
+	cmp	x0, 0
+	mov	w0, 256
+	csel	w23, w23, w0, ne
+.L1272:
+	add	w0, w22, 1
+	mov	w1, 56
+	cmp	w23, 256
+	ccmn	w23, #1, 4, ne
+	umull	x0, w0, w1
+	csel	w1, w23, wzr, eq
+	str	w1, [x25, x0]
+.L1271:
+	add	w22, w22, w20
+	cbz	w24, .L1243
+	adrp	x0, .LANCHOR8
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	cbz	w0, .L1243
+	mov	w0, w19
+	bl	flash_exit_slc_mode
+	b	.L1243
+.L1258:
+	ldr	w1, [x29, 172]
+	mov	w0, w19
+	ldp	x2, x3, [x21, 8]
+	blr	x4
+	mov	w28, w0
+	cmn	w0, #1
+	bne	.L1280
+	ldr	x0, [x29, 120]
+	ldr	x0, [x0, #:lo12:.LANCHOR18]
+	ldrb	w0, [x0, 19]
+	sub	w0, w0, #1
+	and	w0, w0, 255
+	cmp	w0, 6
+	bhi	.L1263
+	add	x0, x27, :lo12:.LANCHOR20
+	mov	w3, 0
+	add	x2, x0, 4
+	ldrb	w1, [x0, 1]
+	mov	w0, w19
+	bl	HynixSetRRPara
+.L1263:
+	ldp	x2, x3, [x21, 8]
+	mov	w0, w19
+	ldr	w1, [x29, 172]
+	bl	FlashReadRawPage
+	mov	w28, w0
+	mov	w3, w0
+	adrp	x0, .LANCHOR31
+	ldr	w1, [x21, 4]
+	ldrb	w2, [x0, #:lo12:.LANCHOR31]
+	adrp	x0, .LC23
+	add	x0, x0, :lo12:.LC23
+	bl	printf
+	cmn	w28, #1
+	bne	.L1280
+	adrp	x0, .LANCHOR8
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	cbz	w0, .L1280
+	mov	w0, w19
+	cbz	w24, .L1264
+	bl	flash_enter_slc_mode
+.L1265:
+	ldr	x4, [x20, #:lo12:.LANCHOR143]
+	mov	w0, w19
+	ldr	w1, [x29, 172]
+	ldp	x2, x3, [x21, 8]
+	blr	x4
+.L1313:
+	mov	w28, w0
+.L1280:
+	mov	w20, 0
+	b	.L1262
+.L1264:
+	bl	flash_exit_slc_mode
+	b	.L1265
+	.size	FlashReadPages, .-FlashReadPages
+	.section	.text.FlashProgSlc2KPages,"ax",@progbits
+	.align	2
+	.global	FlashProgSlc2KPages
+	.type	FlashProgSlc2KPages, %function
+FlashProgSlc2KPages:
+	stp	x29, x30, [sp, -176]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	mov	w24, w2
+	mov	w23, 56
+	adrp	x2, .LANCHOR29+9
+	stp	x21, x22, [sp, 32]
+	and	w21, w1, 255
+	stp	x25, x26, [sp, 64]
+	nop // between mem op and mult-accumulate
+	umaddl	x23, w1, w23, x0
+	ldrb	w25, [x2, #:lo12:.LANCHOR29+9]
+	adrp	x26, .LANCHOR3
+	stp	x27, x28, [sp, 80]
+	mov	w22, w21
+	stp	x19, x20, [sp, 16]
+	mov	x27, x0
+	mov	x20, x0
+	add	x28, x26, :lo12:.LANCHOR3
+	str	w3, [x29, 108]
+.L1315:
+	cmp	x20, x23
+	bne	.L1321
+	ldr	w0, [x29, 108]
+	cbnz	w0, .L1322
+.L1341:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 176
+	ret
+.L1321:
+	mov	w1, w24
+	mov	w4, w22
+	add	x3, x29, 116
+	add	x2, x29, 112
+	mov	x0, x20
+	bl	LogAddr2PhyAddr
+	adrp	x0, .LANCHOR25
+	ldr	w1, [x29, 116]
+	ldrb	w0, [x0, #:lo12:.LANCHOR25]
+	cmp	w0, w1
+	bhi	.L1316
+	mov	w0, -1
+	str	w0, [x20]
+.L1317:
+	sub	w22, w22, #1
+	add	x20, x20, 56
+	and	w22, w22, 255
+	b	.L1315
+.L1316:
+	adrp	x0, .LANCHOR26
+	add	x0, x0, :lo12:.LANCHOR26
+	ldrb	w19, [x0, w1, uxtw]
+	mov	w0, w19
+	bl	NandcWaitFlashReady
+	mov	w0, w19
+	bl	NandcFlashCs
+	ldr	w1, [x29, 112]
+	mov	w0, w19
+	bl	FlashProgFirstCmd
+	ldp	x3, x4, [x20, 8]
+	mov	w2, w25
+	mov	w1, 1
+	mov	w0, w19
+	bl	NandcXferData
+	ldr	w1, [x29, 112]
+	mov	w0, w19
+	bl	FlashProgSecondCmd
+	mov	w0, w19
+	bl	NandcWaitFlashReady
+	ldr	w1, [x29, 112]
+	mov	w0, w19
+	bl	FlashReadStatus
+	sbfx	x0, x0, 0, 1
+	str	w0, [x20]
+	ldr	w1, [x29, 112]
+	ldr	w0, [x26, #:lo12:.LANCHOR3]
+	add	w1, w1, w0
+	mov	w0, w19
+	bl	FlashProgFirstCmd
+	ldr	x0, [x20, 8]
+	mov	w2, w25
+	mov	w1, 1
+	cmp	x0, 0
+	add	x3, x0, 2048
+	ldr	x0, [x20, 16]
+	csel	x3, x3, xzr, ne
+	cmp	x0, 0
+	add	x4, x0, 8
+	csel	x4, x4, xzr, ne
+	mov	w0, w19
+	bl	NandcXferData
+	ldr	w0, [x28]
+	ldr	w1, [x29, 112]
+	add	w1, w1, w0
+	mov	w0, w19
+	bl	FlashProgSecondCmd
+	mov	w0, w19
+	bl	NandcWaitFlashReady
+	ldr	w1, [x29, 112]
+	mov	w0, w19
+	bl	FlashReadStatus
+	tbz	x0, 0, .L1320
+	mov	w0, -1
+	str	w0, [x20]
+.L1320:
+	mov	w0, w19
+	bl	NandcFlashDeCs
+	b	.L1317
+.L1328:
+	ldr	w0, [x27]
+	cmn	w0, #1
+	bne	.L1323
+	ldr	w1, [x27, 4]
+	adrp	x0, .LC24
+	add	x0, x0, :lo12:.LC24
+	bl	printf
+.L1324:
+	sub	w21, w21, #1
+	add	x27, x27, 56
+	and	w21, w21, 255
+.L1342:
+	cmp	x27, x20
+	bne	.L1328
+	b	.L1341
+.L1323:
+	adrp	x19, .LANCHOR196
+	mov	w4, w21
+	add	x3, x29, 116
+	add	x2, x29, 112
+	mov	w1, w24
+	mov	x0, x27
+	bl	LogAddr2PhyAddr
+	ldr	x26, [x22, #:lo12:.LANCHOR195]
+	ldr	x25, [x19, #:lo12:.LANCHOR196]
+	mov	x2, 56
+	mov	x1, x27
+	add	x0, x29, 120
+	str	wzr, [x26]
+	str	wzr, [x25]
+	bl	memcpy
+	stp	x26, x25, [x29, 128]
+	mov	w2, w24
+	mov	w1, 1
+	add	x0, x29, 120
+	bl	FlashReadPages
+	ldr	w25, [x29, 120]
+	cmn	w25, #1
+	bne	.L1325
+	ldr	w1, [x27, 4]
+	adrp	x0, .LC25
+	add	x0, x0, :lo12:.LC25
+	bl	printf
+	str	w25, [x27]
+.L1325:
+	ldr	x0, [x27, 16]
+	cbz	x0, .L1326
+	ldr	w2, [x0]
+	ldr	x0, [x19, #:lo12:.LANCHOR196]
+	ldr	w3, [x0]
+	cmp	w2, w3
+	beq	.L1326
+	ldr	w1, [x27, 4]
+	adrp	x0, .LC26
+	add	x0, x0, :lo12:.LC26
+	bl	printf
+	mov	w0, -1
+	str	w0, [x27]
+.L1326:
+	ldr	x0, [x27, 8]
+	cbz	x0, .L1324
+	ldr	w2, [x0]
+	ldr	x0, [x23, #:lo12:.LANCHOR195]
+	ldr	w3, [x0]
+	cmp	w2, w3
+	beq	.L1324
+	ldr	w1, [x27, 4]
+	adrp	x0, .LC27
+	add	x0, x0, :lo12:.LC27
+	bl	printf
+	mov	w0, -1
+	str	w0, [x27]
+	b	.L1324
+.L1322:
+	adrp	x22, .LANCHOR195
+	mov	x23, x22
+	b	.L1342
+	.size	FlashProgSlc2KPages, .-FlashProgSlc2KPages
+	.section	.text.FlashProgPages,"ax",@progbits
+	.align	2
+	.global	FlashProgPages
+	.type	FlashProgPages, %function
+FlashProgPages:
+	stp	x29, x30, [sp, -176]!
+	adrp	x4, .LANCHOR18
+	add	x29, sp, 0
+	ldr	x4, [x4, #:lo12:.LANCHOR18]
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	ldrb	w4, [x4, 19]
+	stp	w3, w4, [x29, 100]
+	adrp	x4, .LANCHOR1
+	ldrb	w4, [x4, #:lo12:.LANCHOR1]
+	cbnz	w4, .L1345
+	mov	x19, x0
+	adrp	x0, .LANCHOR29+9
+	adrp	x27, .LANCHOR23
+	mov	w24, w1
+	ldrb	w0, [x0, #:lo12:.LANCHOR29+9]
+	mov	w22, w2
+	add	x28, x27, :lo12:.LANCHOR23
+	mov	w21, 0
+	str	w0, [x29, 108]
+.L1346:
+	cmp	w21, w24
+	adrp	x26, .LANCHOR25
+	bcc	.L1359
+	adrp	x21, .LANCHOR8
+	adrp	x23, .LANCHOR23
+	add	x25, x26, :lo12:.LANCHOR25
+	add	x21, x21, :lo12:.LANCHOR8
+	add	x23, x23, :lo12:.LANCHOR23
+	mov	x20, 0
+.L1360:
+	ldrb	w0, [x25]
+	cmp	w0, w20
+	bhi	.L1362
+	ldr	w0, [x29, 100]
+	cbnz	w0, .L1363
+.L1371:
+	mov	w0, 0
+	b	.L1344
+.L1345:
+	bl	FlashProgSlc2KPages
+.L1344:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 176
+	ret
+.L1359:
+	mov	w12, 56
+	mov	w1, w22
+	sub	w4, w24, w21
+	add	x3, x29, 116
+	umull	x12, w21, w12
+	add	x2, x29, 112
+	add	x25, x19, x12
+	mov	x0, x25
+	bl	LogAddr2PhyAddr
+	mov	w23, w0
+	ldrb	w1, [x26, #:lo12:.LANCHOR25]
+	ldr	w0, [x29, 116]
+	cmp	w1, w0
+	bhi	.L1348
+	mov	w0, -1
+	str	w0, [x19, x12]
+.L1349:
+	add	w21, w21, 1
+	b	.L1346
+.L1348:
+	adrp	x1, .LANCHOR27
+	add	x2, x27, :lo12:.LANCHOR23
+	mov	x3, 24
+	ldrb	w1, [x1, #:lo12:.LANCHOR27]
+	cmp	w1, 0
+	uxtw	x1, w0
+	csel	w23, w23, wzr, ne
+	madd	x1, x1, x3, x2
+	ldr	x1, [x1, 8]
+	cbz	x1, .L1351
+	bl	FlashWaitCmdDone
+.L1351:
+	ldp	w2, w1, [x29, 112]
+	mov	x0, 24
+	madd	x0, x1, x0, x28
+	str	w2, [x0, 4]
+	stp	x25, xzr, [x0, 8]
+	cbz	w23, .L1352
+	add	w2, w21, 1
+	mov	w3, 56
+	umaddl	x2, w2, w3, x19
+	str	x2, [x0, 16]
+.L1352:
+	adrp	x0, .LANCHOR26
+	add	x0, x0, :lo12:.LANCHOR26
+	ldrb	w20, [x0, x1]
+	mov	x0, 24
+	mul	x1, x1, x0
+	ldrb	w0, [x26, #:lo12:.LANCHOR25]
+	cmp	w0, 1
+	mov	w0, w20
+	strb	w20, [x28, x1]
+	bne	.L1353
+	bl	NandcWaitFlashReady
+.L1354:
+	ldr	w0, [x29, 104]
+	sub	w0, w0, #1
+	cmp	w0, 6
+	bhi	.L1355
+	adrp	x0, .LANCHOR21
+	add	x0, x0, :lo12:.LANCHOR21
+	ldrb	w0, [x0, w20, sxtw]
+	cbz	w0, .L1355
+	adrp	x0, .LANCHOR20
+	add	x0, x0, :lo12:.LANCHOR20
+	add	x2, x0, 4
+	mov	w3, 0
+	ldrb	w1, [x0, 1]
+	mov	w0, w20
+	bl	HynixSetRRPara
+.L1355:
+	mov	w0, w20
+	bl	NandcFlashCs
+	cmp	w22, 1
+	bne	.L1356
+	adrp	x0, .LANCHOR8
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	cbz	w0, .L1356
+	mov	w0, w20
+	bl	flash_enter_slc_mode
+.L1357:
+	ldr	w1, [x29, 112]
+	mov	w0, w20
+	bl	FlashProgFirstCmd
+	ldrb	w2, [x29, 108]
+	mov	w1, 1
+	ldp	x3, x4, [x25, 8]
+	mov	w0, w20
+	bl	NandcXferData
+	cbz	w23, .L1358
+	ldr	w1, [x29, 112]
+	mov	w0, w20
+	bl	FlashProgDpFirstCmd
+	ldr	w1, [x29, 116]
+	adrp	x0, .LANCHOR17
+	add	x0, x0, :lo12:.LANCHOR17
+	ldr	w0, [x0, x1, lsl 2]
+	ldr	w1, [x29, 112]
+	cmp	w0, 0
+	mov	w0, w20
+	cset	w2, ne
+	bl	FlashWaitReadyEN
+	adrp	x0, .LANCHOR3
+	ldr	w1, [x29, 112]
+	ldr	w0, [x0, #:lo12:.LANCHOR3]
+	add	w1, w1, w0
+	mov	w0, w20
+	bl	FlashProgDpSecondCmd
+	add	w0, w21, 1
+	mov	w1, 56
+	ldrb	w2, [x29, 108]
+	nop // between mem op and mult-accumulate
+	umaddl	x0, w0, w1, x19
+	mov	w1, 1
+	ldp	x3, x4, [x0, 8]
+	mov	w0, w20
+	bl	NandcXferData
+.L1358:
+	ldr	w1, [x29, 112]
+	mov	w0, w20
+	add	w21, w21, w23
+	bl	FlashProgSecondCmd
+	mov	w0, w20
+	bl	NandcFlashDeCs
+	b	.L1349
+.L1353:
+	bl	NandcFlashCs
+	ldr	w1, [x29, 116]
+	adrp	x0, .LANCHOR17
+	add	x0, x0, :lo12:.LANCHOR17
+	ldr	w0, [x0, x1, lsl 2]
+	ldr	w1, [x29, 112]
+	cmp	w0, 0
+	mov	w0, w20
+	cset	w2, ne
+	bl	FlashWaitReadyEN
+	mov	w0, w20
+	bl	NandcFlashDeCs
+	b	.L1354
+.L1356:
+	mov	w0, w20
+	bl	flash_exit_slc_mode
+	b	.L1357
+.L1362:
+	mov	w0, w20
+	bl	FlashWaitCmdDone
+	cmp	w22, 1
+	bne	.L1361
+	ldrb	w0, [x21]
+	cbz	w0, .L1361
+	mov	x0, 24
+	mul	x0, x20, x0
+	ldrb	w0, [x0, x23]
+	bl	flash_exit_slc_mode
+.L1361:
+	add	x20, x20, 1
+	b	.L1360
+.L1363:
+	mov	w0, 56
+	and	w20, w24, 255
+	adrp	x23, .LANCHOR195
+	mov	x25, x23
+	umaddl	x24, w24, w0, x19
+.L1364:
+	cmp	x24, x19
+	beq	.L1371
+	ldr	w0, [x19]
+	cmn	w0, #1
+	bne	.L1365
+	ldr	w1, [x19, 4]
+	adrp	x0, .LC24
+	add	x0, x0, :lo12:.LC24
+	bl	printf
+.L1366:
+	sub	w20, w20, #1
+	add	x19, x19, 56
+	and	w20, w20, 255
+	b	.L1364
+.L1365:
+	adrp	x21, .LANCHOR196
+	mov	w4, w20
+	add	x3, x29, 116
+	add	x2, x29, 112
+	mov	w1, w22
+	mov	x0, x19
+	bl	LogAddr2PhyAddr
+	ldr	x27, [x23, #:lo12:.LANCHOR195]
+	ldr	x26, [x21, #:lo12:.LANCHOR196]
+	mov	x2, 56
+	mov	x1, x19
+	add	x0, x29, 120
+	str	wzr, [x27]
+	str	wzr, [x26]
+	bl	memcpy
+	stp	x27, x26, [x29, 128]
+	mov	w2, w22
+	mov	w1, 1
+	add	x0, x29, 120
+	bl	FlashReadPages
+	ldr	w26, [x29, 120]
+	cmn	w26, #1
+	bne	.L1367
+	ldr	w1, [x19, 4]
+	adrp	x0, .LC25
+	add	x0, x0, :lo12:.LC25
+	bl	printf
+	str	w26, [x19]
+.L1367:
+	ldr	x0, [x19, 16]
+	cbz	x0, .L1368
+	ldr	w2, [x0]
+	ldr	x0, [x21, #:lo12:.LANCHOR196]
+	ldr	w3, [x0]
+	cmp	w2, w3
+	beq	.L1368
+	ldr	w1, [x19, 4]
+	adrp	x0, .LC26
+	add	x0, x0, :lo12:.LC26
+	bl	printf
+	mov	w0, -1
+	str	w0, [x19]
+.L1368:
+	ldr	x0, [x19, 8]
+	cbz	x0, .L1366
+	ldr	w2, [x0]
+	ldr	x0, [x25, #:lo12:.LANCHOR195]
+	ldr	w3, [x0]
+	cmp	w2, w3
+	beq	.L1366
+	ldr	w1, [x19, 4]
+	adrp	x0, .LC27
+	add	x0, x0, :lo12:.LC27
+	bl	printf
+	mov	w0, -1
+	str	w0, [x19]
+	b	.L1366
+	.size	FlashProgPages, .-FlashProgPages
+	.section	.text.FlashTestBlk,"ax",@progbits
+	.align	2
+	.global	FlashTestBlk
+	.type	FlashTestBlk, %function
+FlashTestBlk:
+	stp	x29, x30, [sp, -160]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w19, w0, 65535
+	adrp	x0, .LANCHOR147
+	ldr	w0, [x0, #:lo12:.LANCHOR147]
+	cmp	w19, w0
+	bcc	.L1399
+	adrp	x20, .LANCHOR151
+	mov	w2, 32
+	mov	w1, 165
+	lsl	w19, w19, 10
+	ldr	x0, [x20, #:lo12:.LANCHOR151]
+	str	x0, [x29, 48]
+	add	x0, x29, 96
+	str	x0, [x29, 56]
+	bl	ftl_memset
+	ldr	x0, [x20, #:lo12:.LANCHOR151]
+	mov	w2, 8
+	mov	w1, 90
+	bl	ftl_memset
+	str	w19, [x29, 44]
+	mov	w2, 1
+	add	x0, x29, 40
+	mov	w1, w2
+	bl	FlashEraseBlocks
+	mov	w3, 1
+	add	x0, x29, 40
+	mov	w2, w3
+	mov	w1, w3
+	bl	FlashProgPages
+	ldr	w0, [x29, 40]
+	mov	w2, 1
+	mov	w1, 0
+	cmp	w0, 0
+	add	x0, x29, 40
+	csetm	w19, ne
+	bl	FlashEraseBlocks
+.L1397:
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 160
+	ret
+.L1399:
+	mov	w19, 0
+	b	.L1397
+	.size	FlashTestBlk, .-FlashTestBlk
+	.section	.text.FtlLowFormatEraseBlock,"ax",@progbits
+	.align	2
+	.global	FtlLowFormatEraseBlock
+	.type	FtlLowFormatEraseBlock, %function
+FtlLowFormatEraseBlock:
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x25, x26, [sp, 64]
+	and	w25, w0, 65535
+	adrp	x0, .LANCHOR75
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	ldr	w0, [x0, #:lo12:.LANCHOR75]
+	stp	x23, x24, [sp, 48]
+	stp	x27, x28, [sp, 80]
+	cbnz	w0, .L1424
+	adrp	x0, .LANCHOR72
+	and	w24, w1, 255
+	adrp	x23, .LANCHOR8
+	adrp	x1, .LANCHOR36
+	str	w25, [x0, #:lo12:.LANCHOR72]
+	adrp	x0, .LANCHOR186
+	adrp	x21, .LANCHOR76
+	ldrb	w10, [x23, #:lo12:.LANCHOR8]
+	ldr	x12, [x0, #:lo12:.LANCHOR186]
+	adrp	x0, .LANCHOR57
+	ldrh	w11, [x1, #:lo12:.LANCHOR36]
+	mov	x8, 56
+	ldr	x6, [x21, #:lo12:.LANCHOR76]
+	adrp	x7, .LANCHOR45
+	ldrh	w13, [x0, #:lo12:.LANCHOR57]
+	add	x7, x7, :lo12:.LANCHOR45
+	mov	w14, w8
+	mov	x5, 0
+	mov	w20, 0
+	mov	w19, 0
+	stp	x0, x1, [x29, 112]
+.L1403:
+	cmp	w11, w5, uxth
+	bhi	.L1407
+	cbz	w20, .L1401
+	cmp	w10, 0
+	mov	w2, w20
+	cset	w22, ne
+	mov	x0, x6
+	mov	w1, w22
+	mov	x26, 0
+	bl	FlashEraseBlocks
+	mov	w0, 56
+	umull	x20, w20, w0
+.L1410:
+	ldr	x0, [x21, #:lo12:.LANCHOR76]
+	add	x1, x0, x26
+	ldr	w0, [x0, x26]
+	cmn	w0, #1
+	bne	.L1409
+	ldr	w0, [x1, 4]
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	lsr	w0, w0, 10
+	bl	FtlBbmMapBadBlock
+.L1409:
+	add	x26, x26, 56
+	cmp	x26, x20
+	bne	.L1410
+	cbnz	w24, .L1411
+	and	w22, w22, 65535
+	mov	w27, 6
+	mov	w26, 1
+.L1412:
+	adrp	x28, .LANCHOR45
+	mov	w23, 0
+	add	x0, x28, :lo12:.LANCHOR45
+	str	x0, [x29, 104]
+.L1420:
+	ldr	x0, [x29, 120]
+	mov	x5, 0
+	ldr	x6, [x21, #:lo12:.LANCHOR76]
+	mov	w20, 0
+	mov	w12, 56
+	ldrh	w7, [x0, #:lo12:.LANCHOR36]
+	adrp	x0, .LANCHOR183
+	ldr	x8, [x0, #:lo12:.LANCHOR183]
+	adrp	x0, .LANCHOR184
+	ldr	x10, [x0, #:lo12:.LANCHOR184]
+	ldr	x0, [x29, 112]
+	ldrh	w11, [x0, #:lo12:.LANCHOR57]
+.L1413:
+	cmp	w7, w5, uxth
+	bhi	.L1416
+	cbz	w20, .L1401
+	mov	w1, w20
+	mov	w3, 1
+	mov	w2, w22
+	mov	x0, x6
+	bl	FlashProgPages
+	mov	x28, 0
+	mov	w1, 56
+	umull	x1, w20, w1
+.L1419:
+	ldr	x0, [x21, #:lo12:.LANCHOR76]
+	add	x3, x0, x28
+	ldr	w0, [x0, x28]
+	cbz	w0, .L1418
+	ldr	w0, [x3, 4]
+	add	w19, w19, 1
+	str	x1, [x29, 96]
+	and	w19, w19, 65535
+	lsr	w0, w0, 10
+	bl	FtlBbmMapBadBlock
+	ldr	x1, [x29, 96]
+.L1418:
+	add	x28, x28, 56
+	cmp	x1, x28
+	bne	.L1419
+	add	w23, w23, w27
+	and	w23, w23, 65535
+	cmp	w23, w26
+	bcc	.L1420
+	mov	x23, 0
+.L1422:
+	cbz	w24, .L1421
+	ldr	x0, [x21, #:lo12:.LANCHOR76]
+	add	x1, x0, x23
+	ldr	w0, [x0, x23]
+	cbnz	w0, .L1421
+	ldr	w0, [x1, 4]
+	mov	w1, 1
+	lsr	w0, w0, 10
+	bl	FtlFreeSysBlkQueueIn
+.L1421:
+	add	x23, x23, 56
+	cmp	x23, x28
+	bne	.L1422
+	cmp	w25, 63
+	ccmp	w24, 0, 0, hi
+	beq	.L1401
+	ldr	x0, [x21, #:lo12:.LANCHOR76]
+	mov	w2, w20
+	mov	w1, w22
+	bl	FlashEraseBlocks
+.L1401:
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+.L1407:
+	mul	x0, x5, x8
+	mov	w1, w25
+	str	wzr, [x6, x0]
+	ldrb	w0, [x7, x5]
+	bl	V2P_block
+	and	w15, w0, 65535
+	mov	w22, w15
+	cbz	w24, .L1404
+	bl	IsBlkInVendorPart
+	cbnz	w0, .L1405
+.L1404:
+	mov	w0, w22
+	bl	FtlBbmIsBadBlock
+	cbnz	w0, .L1406
+	umaddl	x1, w20, w14, x6
+	lsl	w15, w15, 10
+	mul	w0, w20, w13
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	asr	w0, w0, 2
+	str	w15, [x1, 4]
+	add	x0, x12, x0, sxtw 2
+	stp	xzr, x0, [x1, 8]
+.L1405:
+	add	x5, x5, 1
+	b	.L1403
+.L1406:
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L1405
+.L1411:
+	adrp	x0, .LANCHOR52
+	ldrh	w26, [x0, #:lo12:.LANCHOR52]
+	ldrb	w0, [x23, #:lo12:.LANCHOR8]
+	cbnz	w0, .L1425
+	lsr	w27, w26, 2
+	mov	w22, 1
+	b	.L1412
+.L1425:
+	mov	w22, 1
+	mov	w27, w22
+	b	.L1412
+.L1416:
+	mov	x0, 56
+	mov	w1, w25
+	mul	x0, x5, x0
+	str	wzr, [x6, x0]
+	ldr	x0, [x29, 104]
+	ldrb	w0, [x0, x5]
+	bl	V2P_block
+	and	w13, w0, 65535
+	mov	w14, w13
+	cbz	w24, .L1414
+	bl	IsBlkInVendorPart
+	cbnz	w0, .L1415
+.L1414:
+	mov	w0, w14
+	bl	FtlBbmIsBadBlock
+	cbnz	w0, .L1415
+	umaddl	x1, w20, w12, x6
+	add	w13, w23, w13, lsl 10
+	mul	w0, w20, w11
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	asr	w0, w0, 2
+	str	w13, [x1, 4]
+	add	x0, x10, x0, sxtw 2
+	stp	x8, x0, [x1, 8]
+.L1415:
+	add	x5, x5, 1
+	b	.L1413
+.L1424:
+	mov	w19, 0
+	b	.L1401
+	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
+	.section	.text.FtlBbmTblFlush,"ax",@progbits
+	.align	2
+	.global	FtlBbmTblFlush
+	.type	FtlBbmTblFlush, %function
+FtlBbmTblFlush:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR75
+	stp	x19, x20, [sp, 16]
+	ldr	w0, [x22, #:lo12:.LANCHOR75]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	cbnz	w0, .L1448
+	adrp	x24, .LANCHOR185
+	adrp	x23, .LANCHOR79
+	adrp	x19, .LANCHOR199
+	add	x20, x19, :lo12:.LANCHOR199
+	ldr	x1, [x24, #:lo12:.LANCHOR185]
+	adrp	x21, .LANCHOR73
+	ldr	x0, [x23, #:lo12:.LANCHOR79]
+	add	x26, x21, :lo12:.LANCHOR73
+	stp	x0, x1, [x20, 8]
+	adrp	x1, .LANCHOR56
+	adrp	x27, .LANCHOR43
+	adrp	x28, .LANCHOR120
+	ldrh	w2, [x1, #:lo12:.LANCHOR56]
+	add	x26, x26, 32
+	mov	w25, 0
+	add	x27, x27, :lo12:.LANCHOR43
+	add	x28, x28, :lo12:.LANCHOR120
+	mov	w1, 0
+	bl	ftl_memset
+.L1449:
+	ldrh	w0, [x27]
+	cmp	w25, w0
+	blt	.L1450
+	add	x19, x19, :lo12:.LANCHOR199
+	add	x20, x21, :lo12:.LANCHOR73
+	mov	w2, 16
+	mov	w1, 255
+	adrp	x25, .LC28
+	adrp	x27, .LANCHOR52
+	ldr	x28, [x19, 16]
+	add	x25, x25, :lo12:.LC28
+	add	x27, x27, :lo12:.LANCHOR52
+	mov	w26, 0
+	mov	x0, x28
+	bl	ftl_memset
+	mov	w0, -3887
+	strh	w0, [x28]
+	ldr	w0, [x20, 8]
+	str	w0, [x28, 4]
+	ldrh	w0, [x21, #:lo12:.LANCHOR73]
+	mov	w21, 0
+	strh	w0, [x28, 2]
+	ldrh	w0, [x20, 4]
+	strh	w0, [x28, 8]
+	ldrh	w0, [x20, 6]
+	strh	w0, [x28, 10]
+	adrp	x0, .LANCHOR35
+	ldr	w0, [x0, #:lo12:.LANCHOR35]
+	strh	w0, [x28, 12]
+.L1451:
+	ldrh	w4, [x28, 10]
+	ldrh	w1, [x20]
+	ldrh	w2, [x20, 2]
+	ldrh	w3, [x20, 4]
+	ldr	x0, [x23, #:lo12:.LANCHOR79]
+	str	x0, [x19, 8]
+	ldr	x0, [x24, #:lo12:.LANCHOR185]
+	str	x0, [x19, 16]
+	orr	w0, w2, w1, lsl 10
+	str	wzr, [x19]
+	str	w0, [x19, 4]
+	mov	x0, x25
+	bl	printf
+	mov	w3, 1
+	mov	x0, x19
+	mov	w1, w3
+	mov	w2, w3
+	bl	FlashProgPages
+	ldrh	w0, [x27]
+	ldrh	w1, [x20, 2]
+	sub	w0, w0, #1
+	cmp	w1, w0
+	blt	.L1452
+	ldr	w0, [x20, 8]
+	mov	w2, 1
+	ldrh	w1, [x20, 4]
+	add	w0, w0, 1
+	str	w0, [x20, 8]
+	str	w0, [x28, 4]
+	ldrh	w0, [x20]
+	strh	w0, [x28, 8]
+	strh	w0, [x20, 4]
+	adrp	x0, .LANCHOR76
+	strh	w1, [x20]
+	lsl	w1, w1, 10
+	ldr	x0, [x0, #:lo12:.LANCHOR76]
+	str	w1, [x19, 4]
+	strh	wzr, [x20, 2]
+	str	w1, [x0, 4]
+	mov	w1, w2
+	bl	FlashEraseBlocks
+	mov	w3, 1
+	mov	x0, x19
+	mov	w2, w3
+	mov	w1, w3
+	bl	FlashProgPages
+.L1452:
+	ldrh	w0, [x20, 2]
+	add	w0, w0, 1
+	strh	w0, [x20, 2]
+	ldr	w0, [x19]
+	cmn	w0, #1
+	bne	.L1453
+	ldr	w1, [x19, 4]
+	add	w21, w21, 1
+	adrp	x0, .LC29
+	and	w21, w21, 65535
+	add	x0, x0, :lo12:.LC29
+	bl	printf
+	cmp	w21, 3
+	bls	.L1451
+	ldr	w1, [x19, 4]
+	mov	w2, w21
+	adrp	x0, .LC30
+	add	x0, x0, :lo12:.LC30
+	bl	printf
+	mov	w0, 1
+	str	w0, [x22, #:lo12:.LANCHOR75]
+.L1448:
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	ret
+.L1450:
+	ldrh	w2, [x28]
+	ldr	x1, [x26], 8
+	ldr	x0, [x20, 8]
+	mul	w3, w2, w25
+	lsl	w2, w2, 2
+	add	w25, w25, 1
+	add	x0, x0, x3, sxtw 2
+	bl	ftl_memcpy
+	b	.L1449
+.L1453:
+	cbnz	w26, .L1448
+	mov	w26, 1
+	b	.L1451
+	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
+	.section	.text.allocate_data_superblock,"ax",@progbits
+	.align	2
+	.global	allocate_data_superblock
+	.type	allocate_data_superblock, %function
+allocate_data_superblock:
+	adrp	x1, .LANCHOR75
+	ldr	w1, [x1, #:lo12:.LANCHOR75]
+	cbnz	w1, .L1521
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	stp	x27, x28, [sp, 80]
+	adrp	x27, .LANCHOR84
+	add	x0, x27, :lo12:.LANCHOR84
+	stp	x23, x24, [sp, 48]
+	str	x0, [x29, 120]
+	adrp	x0, .LANCHOR87
+	add	x23, x0, :lo12:.LANCHOR87
+	stp	x21, x22, [sp, 32]
+	stp	x25, x26, [sp, 64]
+.L1512:
+	ldr	x1, [x29, 120]
+	adrp	x0, .LANCHOR87
+	adrp	x25, .LANCHOR38
+	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	ldrh	w1, [x1]
+	add	w0, w0, w1
+	ldrh	w1, [x25, #:lo12:.LANCHOR38]
+	cmp	w0, w1
+	ble	.L1461
+	mov	w2, 2822
+	adrp	x1, .LANCHOR200
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR200
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1461:
+	adrp	x0, .LANCHOR92
+	add	x0, x0, :lo12:.LANCHOR92
+	cmp	x19, x0
+	bne	.L1462
+	adrp	x1, .LANCHOR170
+	ldrh	w2, [x23]
+	ldr	w3, [x1, #:lo12:.LANCHOR170]
+	lsr	w0, w2, 1
+	add	w4, w0, 1
+	mul	w1, w2, w3
+	add	w1, w4, w1, lsr 2
+	adrp	x4, .LANCHOR101
+	and	w1, w1, 65535
+	ldr	w4, [x4, #:lo12:.LANCHOR101]
+	cbz	w4, .L1463
+	adrp	x4, .LANCHOR168
+	ldr	w4, [x4, #:lo12:.LANCHOR168]
+	cmp	w4, 29
+	bhi	.L1463
+	cmp	w4, 2
+	bls	.L1496
+	tbz	x2, 0, .L1492
+	cbz	w3, .L1496
+.L1492:
+	mov	w1, w0
+	b	.L1463
+.L1462:
+	ldrb	w0, [x19, 8]
+	cmp	w0, 1
+	bne	.L1496
+	adrp	x0, .LANCHOR42
+	ldrh	w0, [x0, #:lo12:.LANCHOR42]
+	cmp	w0, 1
+	beq	.L1496
+	adrp	x0, .LANCHOR8
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	cbnz	w0, .L1496
+	adrp	x2, .LANCHOR101
+	ldrh	w0, [x23]
+	ldr	w2, [x2, #:lo12:.LANCHOR101]
+	lsr	w1, w0, 3
+	cbz	w2, .L1463
+	adrp	x2, .LANCHOR168
+	ldr	w2, [x2, #:lo12:.LANCHOR168]
+	cmp	w2, 1
+	bhi	.L1463
+	mov	w1, 7
+	mul	w1, w0, w1
+	lsr	w1, w1, 3
+.L1463:
+	cbz	w1, .L1464
+	sub	w1, w1, #1
+	and	w1, w1, 65535
+.L1464:
+	ldrb	w2, [x19, 8]
+	adrp	x0, .LANCHOR86
+	add	x0, x0, :lo12:.LANCHOR86
+	bl	List_pop_index_node
+	and	w21, w0, 65535
+	ldrh	w0, [x23]
+	cbnz	w0, .L1465
+	mov	w2, 2842
+	adrp	x1, .LANCHOR200
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR200
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1465:
+	ldrh	w0, [x23]
+	sub	w0, w0, #1
+	strh	w0, [x23]
+	strh	w21, [x19]
+	mov	x0, x19
+	bl	make_superblock
+	ldrb	w0, [x19, 7]
+	cbnz	w0, .L1466
+	adrp	x0, .LANCHOR82
+	ubfiz	x21, x21, 1, 16
+	mov	w1, -1
+	ldr	x0, [x0, #:lo12:.LANCHOR82]
+	strh	w1, [x0, x21]
+	ldrh	w1, [x27, #:lo12:.LANCHOR84]
+	ldrh	w0, [x23]
+	add	w0, w0, w1
+	ldrh	w1, [x25, #:lo12:.LANCHOR38]
+	cmp	w0, w1
+	ble	.L1512
+	mov	w2, 2854
+	adrp	x1, .LANCHOR200
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR200
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+	b	.L1512
+.L1496:
+	mov	w1, 0
+	b	.L1464
+.L1466:
+	ldrh	w1, [x27, #:lo12:.LANCHOR84]
+	ldrh	w0, [x23]
+	add	w0, w0, w1
+	ldrh	w1, [x25, #:lo12:.LANCHOR38]
+	cmp	w0, w1
+	ble	.L1468
+	mov	w2, 2857
+	adrp	x1, .LANCHOR200
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR200
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1468:
+	adrp	x1, .LANCHOR36
+	adrp	x24, .LANCHOR76
+	mov	w2, 56
+	mov	x3, 8
+	ldrh	w1, [x1, #:lo12:.LANCHOR36]
+	add	x26, x19, 16
+	ldr	x4, [x24, #:lo12:.LANCHOR76]
+	mov	x5, x26
+	mov	w20, 0
+	mov	w6, 65535
+	add	x0, x4, 8
+	umaddl	x1, w2, w1, x3
+	add	x1, x4, x1
+.L1469:
+	cmp	x1, x0
+	bne	.L1471
+	cbnz	w20, .L1472
+	mov	w2, 2869
+	adrp	x1, .LANCHOR200
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR200
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1472:
+	adrp	x0, .LANCHOR101
+	uxtw	x22, w21
+	adrp	x28, .LANCHOR77
+	ldr	w0, [x0, #:lo12:.LANCHOR101]
+	cbz	w0, .L1473
+	adrp	x0, .LANCHOR90
+	add	x0, x0, :lo12:.LANCHOR90
+	cmp	x19, x0
+	bne	.L1473
+	ldr	x0, [x28, #:lo12:.LANCHOR77]
+	ldrh	w0, [x0, x22, lsl 1]
+	cmp	w0, 30
+	bls	.L1473
+	strb	wzr, [x19, 8]
+.L1473:
+	adrp	x0, .LANCHOR201
+	ldrh	w0, [x0, #:lo12:.LANCHOR201]
+	cmp	w0, w21
+	bne	.L1474
+	mov	w2, 2876
+	adrp	x1, .LANCHOR200
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR200
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1474:
+	ldrb	w0, [x19, 8]
+	adrp	x6, .LANCHOR46
+	adrp	x5, .LANCHOR165
+	adrp	x4, .LANCHOR166
+	cbnz	w0, .L1475
+	ldr	x2, [x28, #:lo12:.LANCHOR77]
+	lsl	x1, x22, 1
+	ldrh	w0, [x2, x1]
+	cbz	w0, .L1476
+	ldrh	w7, [x6, #:lo12:.LANCHOR46]
+	add	w0, w0, w7
+.L1524:
+	strh	w0, [x2, x1]
+	mov	w1, 0
+	ldr	w0, [x5, #:lo12:.LANCHOR165]
+	add	w0, w0, 1
+	str	w0, [x5, #:lo12:.LANCHOR165]
+	mov	w0, w21
+	bl	ftl_set_blk_mode
+.L1478:
+	ldr	x0, [x28, #:lo12:.LANCHOR77]
+	lsl	x22, x22, 1
+	ldrh	w1, [x0, x22]
+	adrp	x0, .LANCHOR167
+	ldr	w2, [x0, #:lo12:.LANCHOR167]
+	cmp	w1, w2
+	bls	.L1479
+	str	w1, [x0, #:lo12:.LANCHOR167]
+.L1479:
+	ldr	w2, [x5, #:lo12:.LANCHOR165]
+	mov	x3, 4
+	ldr	w1, [x4, #:lo12:.LANCHOR166]
+	ldrh	w0, [x6, #:lo12:.LANCHOR46]
+	madd	w0, w0, w2, w1
+	ldrh	w1, [x25, #:lo12:.LANCHOR38]
+	udiv	w0, w0, w1
+	adrp	x1, .LANCHOR202
+	str	w0, [x1, #:lo12:.LANCHOR202]
+	adrp	x0, .LANCHOR188
+	ldr	x1, [x0, #:lo12:.LANCHOR188]
+	ldr	w0, [x1, 16]
+	add	w0, w0, 1
+	str	w0, [x1, 16]
+	mov	w1, 56
+	ldr	x0, [x24, #:lo12:.LANCHOR76]
+	nop // between mem op and mult-accumulate
+	umaddl	x1, w1, w20, x3
+	add	x2, x0, 4
+	add	x1, x0, x1
+.L1480:
+	cmp	x1, x2
+	bne	.L1481
+	adrp	x1, .LANCHOR8
+	ldrb	w1, [x1, #:lo12:.LANCHOR8]
+	cbz	w1, .L1482
+	ldrb	w1, [x19, 8]
+	mov	w2, w20
+	cmp	w1, 1
+	bne	.L1483
+	mov	w1, 0
+.L1525:
+	bl	FlashEraseBlocks
+.L1482:
+	ldrb	w1, [x19, 8]
+	mov	w2, w20
+	ldr	x0, [x24, #:lo12:.LANCHOR76]
+	mov	x25, 0
+	bl	FlashEraseBlocks
+	mov	w1, 0
+	mov	x3, 56
+.L1484:
+	cmp	w20, w25, uxth
+	bhi	.L1486
+	cbz	w1, .L1487
+	mov	w0, w21
+	bl	update_multiplier_value
+	bl	FtlBbmTblFlush
+.L1487:
+	ldrb	w0, [x19, 7]
+	adrp	x2, .LANCHOR82
+	cbnz	w0, .L1488
+	ldr	x0, [x2, #:lo12:.LANCHOR82]
+	mov	w1, -1
+	strh	w1, [x0, x22]
+	b	.L1512
+.L1471:
+	ldrh	w3, [x5]
+	stp	xzr, xzr, [x0]
+	cmp	w3, w6
+	beq	.L1470
+	umaddl	x7, w20, w2, x4
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	lsl	w3, w3, 10
+	str	w3, [x7, 4]
+.L1470:
+	add	x0, x0, 56
+	add	x5, x5, 2
+	b	.L1469
+.L1476:
+	mov	w0, 2
+	b	.L1524
+.L1475:
+	ldr	x2, [x28, #:lo12:.LANCHOR77]
+	lsl	x0, x22, 1
+	ldrh	w1, [x2, x0]
+	add	w1, w1, 1
+	strh	w1, [x2, x0]
+	ldr	w0, [x4, #:lo12:.LANCHOR166]
+	add	w0, w0, 1
+	str	w0, [x4, #:lo12:.LANCHOR166]
+	mov	w0, w21
+	bl	ftl_set_blk_mode.part.9
+	b	.L1478
+.L1481:
+	ldr	w3, [x2]
+	and	w3, w3, -1024
+	str	w3, [x2], 56
+	b	.L1480
+.L1483:
+	mov	w1, 1
+	b	.L1525
+.L1486:
+	mul	x0, x25, x3
+	ldr	x2, [x24, #:lo12:.LANCHOR76]
+	add	x4, x2, x0
+	ldr	w2, [x2, x0]
+	cmn	w2, #1
+	bne	.L1485
+	add	w1, w1, 1
+	ldr	w0, [x4, 4]
+	str	x3, [x29, 104]
+	stp	w2, w1, [x29, 112]
+	lsr	w0, w0, 10
+	bl	FtlBbmMapBadBlock
+	ldp	w2, w1, [x29, 112]
+	strh	w2, [x26]
+	ldr	x3, [x29, 104]
+	ldrb	w0, [x19, 7]
+	sub	w0, w0, #1
+	strb	w0, [x19, 7]
+.L1485:
+	add	x25, x25, 1
+	add	x26, x26, 2
+	b	.L1484
+.L1488:
+	adrp	x1, .LANCHOR51
+	adrp	x3, .LANCHOR157
+	strb	wzr, [x19, 6]
+	ldrh	w1, [x1, #:lo12:.LANCHOR51]
+	strh	wzr, [x19, 2]
+	strh	w21, [x19]
+	mul	w0, w0, w1
+	ldr	w1, [x3, #:lo12:.LANCHOR157]
+	str	w1, [x19, 12]
+	add	w1, w1, 1
+	str	w1, [x3, #:lo12:.LANCHOR157]
+	ldr	x1, [x2, #:lo12:.LANCHOR82]
+	and	w0, w0, 65535
+	strh	w0, [x19, 4]
+	strh	w0, [x1, x22]
+	ldrh	w0, [x19, 4]
+	cbz	w0, .L1489
+	ldrb	w0, [x19, 7]
+	cbnz	w0, .L1460
+.L1489:
+	mov	w2, 2935
+	adrp	x1, .LANCHOR200
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR200
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1460:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+.L1521:
+	mov	w0, 0
+	ret
+	.size	allocate_data_superblock, .-allocate_data_superblock
+	.section	.text.FtlGcFreeBadSuperBlk,"ax",@progbits
+	.align	2
+	.global	FtlGcFreeBadSuperBlk
+	.type	FtlGcFreeBadSuperBlk, %function
+FtlGcFreeBadSuperBlk:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR114
+	stp	x25, x26, [sp, 64]
+	and	w25, w0, 65535
+	ldrh	w0, [x21, #:lo12:.LANCHOR114]
+	stp	x19, x20, [sp, 16]
+	stp	x23, x24, [sp, 48]
+	str	x27, [sp, 80]
+	cbz	w0, .L1527
+	adrp	x23, .LANCHOR115
+	add	x24, x23, :lo12:.LANCHOR115
+	mov	w19, 0
+.L1528:
+	adrp	x0, .LANCHOR36
+	ldrh	w0, [x0, #:lo12:.LANCHOR36]
+	cmp	w0, w19
+	bhi	.L1534
+	bl	FtlGcReFreshBadBlk
+.L1527:
+	mov	w0, 0
+	ldr	x27, [sp, 80]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	ret
+.L1534:
+	adrp	x0, .LANCHOR45
+	add	x0, x0, :lo12:.LANCHOR45
+	mov	w1, w25
+	add	x22, x21, :lo12:.LANCHOR114
+	mov	w20, 0
+	ldrb	w0, [x0, w19, sxtw]
+	bl	V2P_block
+	and	w26, w0, 65535
+.L1529:
+	ldrh	w0, [x22]
+	cmp	w0, w20
+	bhi	.L1533
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L1528
+.L1533:
+	add	x0, x23, :lo12:.LANCHOR115
+	add	w27, w20, 1
+	ldrh	w0, [x0, w20, sxtw 1]
+	cmp	w0, w26
+	bne	.L1530
+	mov	w0, w26
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	ldrh	w1, [x22]
+	sxtw	x3, w27
+	and	x4, x20, 65535
+	mov	x0, 0
+.L1531:
+	add	w2, w20, w0
+	cmp	w1, w2, uxth
+	bhi	.L1532
+	sub	w1, w1, #1
+	strh	w1, [x22]
+.L1530:
+	and	w20, w27, 65535
+	b	.L1529
+.L1532:
+	add	x2, x3, x0
+	ldrh	w5, [x24, x2, lsl 1]
+	add	x2, x4, x0
+	add	x0, x0, 1
+	strh	w5, [x24, x2, lsl 1]
+	b	.L1531
+	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
+	.section	.text.update_vpc_list,"ax",@progbits
+	.align	2
+	.global	update_vpc_list
+	.type	update_vpc_list, %function
+update_vpc_list:
+	stp	x29, x30, [sp, -32]!
+	adrp	x1, .LANCHOR82
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w19, w0, 65535
+	ldr	x1, [x1, #:lo12:.LANCHOR82]
+	ubfiz	x0, x19, 1, 16
+	ldrh	w0, [x1, x0]
+	cbnz	w0, .L1540
+	adrp	x0, .LANCHOR201
+	ldrh	w1, [x0, #:lo12:.LANCHOR201]
+	cmp	w1, w19
+	bne	.L1541
+	mov	w1, -1
+	strh	w1, [x0, #:lo12:.LANCHOR201]
+.L1542:
+	adrp	x20, .LANCHOR84
+	mov	w1, w19
+	adrp	x0, .LANCHOR81
+	add	x0, x0, :lo12:.LANCHOR81
+	bl	List_remove_node
+	ldrh	w0, [x20, #:lo12:.LANCHOR84]
+	cbnz	w0, .L1544
+	mov	w2, 3046
+	adrp	x1, .LANCHOR203
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR203
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1544:
+	ldrh	w0, [x20, #:lo12:.LANCHOR84]
+	sub	w0, w0, #1
+	strh	w0, [x20, #:lo12:.LANCHOR84]
+	mov	w0, w19
+	bl	free_data_superblock
+	mov	w0, w19
+	bl	FtlGcFreeBadSuperBlk
+	adrp	x0, .LANCHOR87
+	ldrh	w1, [x20, #:lo12:.LANCHOR84]
+	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	add	w0, w0, w1
+	adrp	x1, .LANCHOR38
+	ldrh	w1, [x1, #:lo12:.LANCHOR38]
+	cmp	w0, w1
+	ble	.L1548
+	mov	w2, 3049
+	adrp	x1, .LANCHOR203
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR203
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1548:
+	mov	w0, 1
+	b	.L1539
+.L1541:
+	adrp	x0, .LANCHOR90
+	ldrh	w0, [x0, #:lo12:.LANCHOR90]
+	cmp	w0, w19
+	beq	.L1547
+	adrp	x0, .LANCHOR91
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	cmp	w0, w19
+	beq	.L1547
+	adrp	x0, .LANCHOR92
+	ldrh	w0, [x0, #:lo12:.LANCHOR92]
+	cmp	w0, w19
+	bne	.L1542
+.L1547:
+	mov	w0, 0
+.L1539:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L1540:
+	mov	w0, w19
+	bl	List_update_data_list
+	b	.L1547
+	.size	update_vpc_list, .-update_vpc_list
+	.section	.text.decrement_vpc_count,"ax",@progbits
+	.align	2
+	.global	decrement_vpc_count
+	.type	decrement_vpc_count, %function
+decrement_vpc_count:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w19, w0, 65535
+	str	x21, [sp, 32]
+	mov	w0, 65535
+	cmp	w19, w0
+	beq	.L1551
+	adrp	x21, .LANCHOR82
+	ubfiz	x20, x19, 1, 16
+	ldr	x1, [x21, #:lo12:.LANCHOR82]
+	ldrh	w0, [x1, x20]
+	cbnz	w0, .L1552
+	mov	w2, 0
+	mov	w1, w19
+	adrp	x0, .LC31
+	add	x0, x0, :lo12:.LC31
+	bl	printf
+	ldr	x0, [x21, #:lo12:.LANCHOR82]
+	ldrh	w0, [x0, x20]
+	cbz	w0, .L1553
+.L1558:
+	mov	w20, 0
+.L1550:
+	mov	w0, w20
+	ldr	x21, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+.L1553:
+	mov	w2, 3064
+	adrp	x1, .LANCHOR204
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR204
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+	b	.L1558
+.L1552:
+	sub	w0, w0, #1
+	strh	w0, [x1, x20]
+.L1551:
+	adrp	x21, .LANCHOR130
+	mov	w1, 65535
+	ldrh	w0, [x21, #:lo12:.LANCHOR130]
+	cmp	w0, w1
+	bne	.L1555
+	strh	w19, [x21, #:lo12:.LANCHOR130]
+	b	.L1558
+.L1555:
+	cmp	w19, w0
+	beq	.L1558
+	bl	update_vpc_list
+	cmp	w0, 0
+	adrp	x1, .LANCHOR80
+	adrp	x0, .LANCHOR81
+	strh	w19, [x21, #:lo12:.LANCHOR130]
+	cset	w20, ne
+	ldr	x1, [x1, #:lo12:.LANCHOR80]
+	ldr	x0, [x0, #:lo12:.LANCHOR81]
+	sub	x0, x0, x1
+	mov	x1, -6148914691236517206
+	asr	x0, x0, 1
+	movk	x1, 0xaaab, lsl 0
+	mul	x0, x0, x1
+	adrp	x1, .LANCHOR82
+	ldr	x1, [x1, #:lo12:.LANCHOR82]
+	and	x2, x0, 65535
+	ldrh	w1, [x1, x2, lsl 1]
+	cbnz	w1, .L1550
+	cmp	w19, w0, uxth
+	beq	.L1550
+	mov	w2, 3086
+	adrp	x1, .LANCHOR204
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR204
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+	b	.L1550
+	.size	decrement_vpc_count, .-decrement_vpc_count
+	.section	.text.FtlSlcSuperblockCheck,"ax",@progbits
+	.align	2
+	.global	FtlSlcSuperblockCheck
+	.type	FtlSlcSuperblockCheck, %function
+FtlSlcSuperblockCheck:
+	ldrh	w1, [x0, 4]
+	cbz	w1, .L1571
+	stp	x29, x30, [sp, -64]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w20, 65535
+	ldrh	w1, [x0]
+	stp	x21, x22, [sp, 32]
+	str	x23, [sp, 48]
+	cmp	w1, w20
+	beq	.L1559
+	mov	x19, x0
+	ldrb	w0, [x0, 6]
+	adrp	x22, .LANCHOR8
+	adrp	x21, .LANCHOR117
+	add	x0, x0, 8
+	add	x23, x22, :lo12:.LANCHOR8
+	add	x21, x21, :lo12:.LANCHOR117
+	ldrh	w0, [x19, x0, lsl 1]
+.L1563:
+	cmp	w0, w20
+	beq	.L1565
+	ldrb	w0, [x19, 8]
+	cmp	w0, 1
+	bne	.L1566
+	ldrb	w1, [x23]
+	cbnz	w1, .L1566
+	ldrh	w1, [x19, 2]
+	ldrh	w1, [x21, x1, lsl 1]
+	cmp	w1, w20
+	bne	.L1566
+	ldrh	w0, [x19, 4]
+	sub	w0, w0, #1
+	strh	w0, [x19, 4]
+	ldrh	w0, [x19]
+	bl	decrement_vpc_count
+	ldrh	w0, [x19, 4]
+	cbnz	w0, .L1565
+	ldrh	w0, [x19, 2]
+	add	w0, w0, 1
+.L1574:
+	strh	w0, [x19, 2]
+	strb	wzr, [x19, 6]
+.L1559:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	ret
+.L1565:
+	ldrb	w0, [x19, 6]
+	adrp	x1, .LANCHOR36
+	add	w0, w0, 1
+	ldrh	w1, [x1, #:lo12:.LANCHOR36]
+	and	w0, w0, 255
+	strb	w0, [x19, 6]
+	cmp	w1, w0
+	bne	.L1564
+	ldrh	w0, [x19, 2]
+	strb	wzr, [x19, 6]
+	add	w0, w0, 1
+	strh	w0, [x19, 2]
+.L1564:
+	ldrb	w0, [x19, 6]
+	add	x0, x0, 8
+	ldrh	w0, [x19, x0, lsl 1]
+	b	.L1563
+.L1566:
+	ldrb	w1, [x22, #:lo12:.LANCHOR8]
+	cbz	w1, .L1559
+	cmp	w0, 1
+	bne	.L1559
+	adrp	x0, .LANCHOR52
+	ldrh	w1, [x19, 2]
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
+	cmp	w1, w0
+	bcc	.L1559
+	ldrh	w0, [x19]
+	adrp	x1, .LANCHOR82
+	ldrh	w3, [x19, 4]
+	ldr	x2, [x1, #:lo12:.LANCHOR82]
+	lsl	x0, x0, 1
+	ldrh	w1, [x2, x0]
+	sub	w1, w1, w3
+	strh	w1, [x2, x0]
+	adrp	x0, .LANCHOR51
+	strh	wzr, [x19, 4]
+	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+	b	.L1574
+.L1571:
+	ret
+	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
+	.section	.text.get_new_active_ppa,"ax",@progbits
+	.align	2
+	.global	get_new_active_ppa
+	.type	get_new_active_ppa, %function
+get_new_active_ppa:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	ldrh	w1, [x0]
+	mov	w0, 65535
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	cmp	w1, w0
+	str	x25, [sp, 64]
+	bne	.L1576
+	mov	w2, 2986
+	adrp	x1, .LANCHOR205
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR205
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1576:
+	adrp	x20, .LANCHOR51
+	ldrh	w1, [x19, 2]
+	ldrh	w0, [x20, #:lo12:.LANCHOR51]
+	cmp	w1, w0
+	bne	.L1577
+	mov	w2, 2987
+	adrp	x1, .LANCHOR205
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR205
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1577:
+	ldrh	w0, [x19, 4]
+	cbnz	w0, .L1578
+	mov	w2, 2988
+	adrp	x1, .LANCHOR205
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR205
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1578:
+	ldrb	w0, [x19, 6]
+	adrp	x21, .LANCHOR36
+	strb	wzr, [x19, 10]
+	adrp	x23, .LANCHOR8
+	add	x0, x0, 8
+	adrp	x24, .LANCHOR117
+	add	x23, x23, :lo12:.LANCHOR8
+	add	x24, x24, :lo12:.LANCHOR117
+	add	x25, x21, :lo12:.LANCHOR36
+	ldrh	w22, [x19, x0, lsl 1]
+.L1579:
+	mov	w2, 65535
+	cmp	w22, w2
+	beq	.L1580
+	ldrb	w0, [x19, 8]
+	ldrh	w1, [x19, 4]
+	cmp	w0, 1
+	ldrh	w0, [x19, 2]
+	bne	.L1582
+	ldrb	w3, [x23]
+	cbnz	w3, .L1582
+	ldrh	w3, [x24, w0, sxtw 1]
+	cmp	w3, w2
+	bne	.L1582
+	ldrh	w0, [x19]
+	sub	w1, w1, #1
+	strh	w1, [x19, 4]
+	bl	decrement_vpc_count
+.L1580:
+	ldrb	w0, [x19, 6]
+	ldrh	w1, [x25]
+	add	w0, w0, 1
+	and	w0, w0, 255
+	strb	w0, [x19, 6]
+	cmp	w1, w0
+	bne	.L1581
+	ldrh	w0, [x19, 2]
+	strb	wzr, [x19, 6]
+	add	w0, w0, 1
+	strh	w0, [x19, 2]
+.L1581:
+	ldrb	w0, [x19, 6]
+	add	x0, x0, 8
+	ldrh	w22, [x19, x0, lsl 1]
+	b	.L1579
+.L1582:
+	adrp	x23, .LANCHOR8
+	adrp	x24, .LANCHOR117
+	orr	w22, w0, w22, lsl 10
+	add	x23, x23, :lo12:.LANCHOR8
+	add	x24, x24, :lo12:.LANCHOR117
+	sub	w1, w1, #1
+	strh	w1, [x19, 4]
+.L1583:
+	ldrb	w0, [x19, 6]
+	mov	w1, 65535
+	ldrh	w3, [x21, #:lo12:.LANCHOR36]
+.L1585:
+	add	w0, w0, 1
+	and	w0, w0, 255
+	cmp	w0, w3
+	bne	.L1584
+	ldrh	w0, [x19, 2]
+	add	w0, w0, 1
+	strh	w0, [x19, 2]
+	mov	w0, 0
+.L1584:
+	add	x2, x19, x0, sxtw 1
+	ldrh	w2, [x2, 16]
+	cmp	w2, w1
+	beq	.L1585
+	strb	w0, [x19, 6]
+	ldrb	w0, [x19, 8]
+	cmp	w0, 1
+	bne	.L1586
+	ldrb	w2, [x23]
+	ldrh	w0, [x19, 2]
+	cbnz	w2, .L1587
+	ldrh	w0, [x24, w0, sxtw 1]
+	cmp	w0, w1
+	bne	.L1586
+	ldrh	w0, [x19, 4]
+	cbz	w0, .L1586
+	sub	w0, w0, #1
+	strh	w0, [x19, 4]
+	ldrh	w0, [x19]
+	bl	decrement_vpc_count
+	b	.L1583
+.L1587:
+	adrp	x1, .LANCHOR52
+	ldrh	w1, [x1, #:lo12:.LANCHOR52]
+	cmp	w0, w1
+	bcc	.L1586
+	ldrh	w0, [x19]
+	adrp	x1, .LANCHOR82
+	ldrh	w3, [x19, 4]
+	ldr	x2, [x1, #:lo12:.LANCHOR82]
+	lsl	x0, x0, 1
+	ldrh	w1, [x2, x0]
+	sub	w1, w1, w3
+	strh	w1, [x2, x0]
+	strh	wzr, [x19, 4]
+	ldrh	w0, [x20, #:lo12:.LANCHOR51]
+	strh	w0, [x19, 2]
+	strb	wzr, [x19, 6]
+.L1586:
+	ldrh	w1, [x19, 2]
+	ldrh	w0, [x20, #:lo12:.LANCHOR51]
+	cmp	w1, w0
+	bne	.L1575
+	ldrh	w0, [x19, 4]
+	cbz	w0, .L1575
+	mov	w2, 3032
+	adrp	x1, .LANCHOR205
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR205
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1575:
+	mov	w0, w22
+	ldr	x25, [sp, 64]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	ret
+	.size	get_new_active_ppa, .-get_new_active_ppa
+	.section	.text.FtlVpcTblFlush,"ax",@progbits
+	.align	2
+	.global	FtlVpcTblFlush
+	.type	FtlVpcTblFlush, %function
+FtlVpcTblFlush:
+	stp	x29, x30, [sp, -112]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR75
+	stp	x19, x20, [sp, 16]
+	ldr	w0, [x23, #:lo12:.LANCHOR75]
+	stp	x21, x22, [sp, 32]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	str	x23, [x29, 104]
+	cbnz	w0, .L1600
+	adrp	x25, .LANCHOR185
+	adrp	x28, .LANCHOR199
+	adrp	x27, .LANCHOR206
+	add	x21, x28, :lo12:.LANCHOR199
+	ldr	x20, [x25, #:lo12:.LANCHOR185]
+	adrp	x24, .LANCHOR79
+	ldrh	w2, [x27, #:lo12:.LANCHOR206]
+	add	x1, x27, :lo12:.LANCHOR206
+	ldr	x0, [x24, #:lo12:.LANCHOR79]
+	mov	w3, 19539
+	stp	x0, x20, [x21, 8]
+	movk	w3, 0x4654, lsl 16
+	strh	w2, [x20, 2]
+	mov	w2, -3932
+	strh	w2, [x20]
+	adrp	x22, .LANCHOR157
+	ldr	w2, [x1, 8]
+	adrp	x26, .LANCHOR38
+	ldrh	w1, [x1, 6]
+	stp	w2, wzr, [x20, 4]
+	adrp	x2, .LANCHOR135
+	add	x19, x2, :lo12:.LANCHOR135
+	str	wzr, [x20, 12]
+	str	w3, [x2, #:lo12:.LANCHOR135]
+	mov	w2, 71
+	movk	w2, 0x5000, lsl 16
+	strh	w1, [x19, 8]
+	adrp	x1, .LANCHOR43
+	str	w2, [x19, 4]
+	adrp	x2, .LANCHOR90
+	ldrh	w1, [x1, #:lo12:.LANCHOR43]
+	strb	w1, [x19, 10]
+	add	x1, x2, :lo12:.LANCHOR90
+	ldrh	w2, [x2, #:lo12:.LANCHOR90]
+	strh	w2, [x19, 14]
+	ldrb	w3, [x1, 6]
+	ldrh	w2, [x1, 2]
+	ldrb	w1, [x1, 8]
+	strb	w1, [x19, 11]
+	orr	w2, w3, w2, lsl 6
+	strh	w2, [x19, 16]
+	adrp	x2, .LANCHOR91
+	add	x1, x2, :lo12:.LANCHOR91
+	ldrh	w2, [x2, #:lo12:.LANCHOR91]
+	ldrb	w3, [x1, 6]
+	strh	w2, [x19, 18]
+	ldrh	w2, [x1, 2]
+	ldrb	w1, [x1, 8]
+	strb	w1, [x19, 12]
+	orr	w2, w3, w2, lsl 6
+	strh	w2, [x19, 20]
+	adrp	x2, .LANCHOR92
+	add	x1, x2, :lo12:.LANCHOR92
+	ldrh	w2, [x2, #:lo12:.LANCHOR92]
+	strh	w2, [x19, 22]
+	ldrb	w3, [x1, 6]
+	ldrh	w2, [x1, 2]
+	ldrb	w1, [x1, 8]
+	strb	w1, [x19, 13]
+	adrp	x1, .LANCHOR165
+	orr	w2, w3, w2, lsl 6
+	strh	w2, [x19, 24]
+	ldr	w1, [x1, #:lo12:.LANCHOR165]
+	str	w1, [x19, 32]
+	ldr	w1, [x22, #:lo12:.LANCHOR157]
+	str	w1, [x19, 40]
+	adrp	x1, .LANCHOR158
+	ldr	w1, [x1, #:lo12:.LANCHOR158]
+	str	w1, [x19, 36]
+	adrp	x1, .LANCHOR56
+	ldrh	w2, [x1, #:lo12:.LANCHOR56]
+	mov	w1, 255
+	bl	ftl_memset
+	ldr	x0, [x21, 8]
+	mov	x1, x19
+	mov	w2, 48
+	mov	x19, x28
+	bl	ftl_memcpy
+	adrp	x1, .LANCHOR82
+	ldrh	w2, [x26, #:lo12:.LANCHOR38]
+	ldr	x0, [x21, 8]
+	ldr	x1, [x1, #:lo12:.LANCHOR82]
+	lsl	w2, w2, 1
+	add	x0, x0, 48
+	bl	ftl_memcpy
+	ldrh	w0, [x26, #:lo12:.LANCHOR38]
+	adrp	x1, .LANCHOR0
+	ldr	x3, [x21, 8]
+	ldr	x1, [x1, #:lo12:.LANCHOR0]
+	lsr	w2, w0, 3
+	ubfiz	x0, x0, 1, 16
+	add	x0, x0, 48
+	add	w2, w2, 4
+	and	x0, x0, -4
+	add	x0, x3, x0
+	bl	ftl_memcpy
+	adrp	x0, .LANCHOR68
+	ldrh	w0, [x0, #:lo12:.LANCHOR68]
+	cbz	w0, .L1601
+	ldrh	w0, [x26, #:lo12:.LANCHOR38]
+	adrp	x1, .LANCHOR65
+	ldr	x3, [x21, 8]
+	ldrh	w2, [x1, #:lo12:.LANCHOR65]
+	lsr	w1, w0, 3
+	add	w0, w1, w0, lsl 1
+	adrp	x1, .LANCHOR128
+	add	w0, w0, 52
+	lsl	w2, w2, 2
+	ldr	x1, [x1, #:lo12:.LANCHOR128]
+	and	x0, x0, 65532
+	add	x0, x3, x0
+	bl	ftl_memcpy
+.L1601:
+	mov	w0, 0
+	add	x28, x19, :lo12:.LANCHOR199
+	bl	FtlUpdateVaildLpn
+	add	x23, x27, :lo12:.LANCHOR206
+	mov	w21, 0
+	adrp	x27, .LANCHOR52
+	mov	w26, 65535
+	add	x0, x27, :lo12:.LANCHOR52
+	str	x0, [x29, 96]
+.L1602:
+	ldr	x0, [x24, #:lo12:.LANCHOR79]
+	mov	w3, 1
+	str	x0, [x28, 8]
+	mov	w2, w3
+	ldr	x0, [x25, #:lo12:.LANCHOR185]
+	ldrh	w1, [x23, 2]
+	str	x0, [x28, 16]
+	ldrh	w0, [x23]
+	orr	w0, w1, w0, lsl 10
+	mov	w1, w3
+	str	w0, [x28, 4]
+	mov	x0, x28
+	bl	FlashProgPages
+	ldrh	w0, [x27, #:lo12:.LANCHOR52]
+	ldrh	w1, [x23, 2]
+	sub	w0, w0, #1
+	cmp	w1, w0
+	blt	.L1603
+	ldrh	w0, [x23]
+	ldrh	w26, [x23, 4]
+	strh	wzr, [x23, 2]
+	strh	w0, [x23, 4]
+	bl	FtlFreeSysBlkQueueOut
+	strh	w0, [x23]
+	ldr	w1, [x22, #:lo12:.LANCHOR157]
+	mov	w3, 1
+	str	w1, [x23, 8]
+	add	w2, w1, 1
+	str	w2, [x22, #:lo12:.LANCHOR157]
+	ubfiz	w2, w0, 10, 16
+	str	w2, [x28, 4]
+	strh	w0, [x20, 2]
+	mov	w2, w3
+	str	w1, [x20, 4]
+	mov	x0, x28
+	mov	w1, w3
+	bl	FlashProgPages
+.L1603:
+	ldrh	w0, [x23, 2]
+	ldr	w1, [x28]
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	strh	w0, [x23, 2]
+	cmn	w1, #1
+	bne	.L1604
+	cmp	w0, 1
+	bne	.L1605
+	mov	w2, 1180
+	adrp	x1, .LANCHOR207
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR207
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1605:
+	ldrh	w0, [x23, 2]
+	cmp	w0, 1
+	bne	.L1606
+	ldr	x0, [x29, 96]
+	ldrh	w0, [x0]
+	sub	w0, w0, #1
+	strh	w0, [x23, 2]
+.L1606:
+	add	w21, w21, 1
+	and	w21, w21, 65535
+	cmp	w21, 3
+	bls	.L1602
+	add	x19, x19, :lo12:.LANCHOR199
+	mov	w2, w21
+	adrp	x0, .LC32
+	add	x0, x0, :lo12:.LC32
+	ldr	w1, [x19, 4]
+	bl	printf
+	ldr	x1, [x29, 104]
+	mov	w0, 1
+	str	w0, [x1, #:lo12:.LANCHOR75]
+.L1600:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L1604:
+	cmp	w0, 1
+	beq	.L1602
+	cmp	w1, 256
+	beq	.L1602
+	mov	w0, 65535
+	cmp	w26, w0
+	beq	.L1600
+	mov	w1, 1
+	mov	w0, w26
+	bl	FtlFreeSysBlkQueueIn
+	b	.L1600
+	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
+	.section	.text.FtlSuperblockPowerLostFix,"ax",@progbits
+	.align	2
+	.global	FtlSuperblockPowerLostFix
+	.type	FtlSuperblockPowerLostFix, %function
+FtlSuperblockPowerLostFix:
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	adrp	x0, .LANCHOR8
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	cbz	w0, .L1628
+	ldrb	w20, [x19, 8]
+	cmp	w20, 1
+	bne	.L1628
+	ldrh	w21, [x19, 4]
+.L1620:
+	adrp	x22, .LANCHOR158
+	add	x22, x22, :lo12:.LANCHOR158
+	mov	w24, -1
+	adrp	x23, .LANCHOR79
+.L1621:
+	sub	w21, w21, #1
+	cmn	w21, #1
+	beq	.L1623
+	ldrh	w0, [x19, 4]
+	cbnz	w0, .L1622
+.L1623:
+	ldrh	w0, [x19]
+	adrp	x1, .LANCHOR82
+	ldrh	w3, [x19, 4]
+	ldr	x2, [x1, #:lo12:.LANCHOR82]
+	lsl	x0, x0, 1
+	ldrh	w1, [x2, x0]
+	sub	w1, w1, w3
+	strh	w1, [x2, x0]
+	adrp	x0, .LANCHOR51
+	strb	wzr, [x19, 6]
+	strh	wzr, [x19, 4]
+	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+	strh	w0, [x19, 2]
+	ldp	x21, x22, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 128
+	ret
+.L1628:
+	mov	w20, 0
+	mov	w21, 12
+	b	.L1620
+.L1622:
+	mov	x0, x19
+	bl	get_new_active_ppa
+	str	w0, [x29, 76]
+	cmn	w0, #1
+	beq	.L1623
+	ldr	x0, [x23, #:lo12:.LANCHOR79]
+	mov	w3, 0
+	str	x0, [x29, 80]
+	mov	w2, w20
+	adrp	x0, .LANCHOR185
+	str	w24, [x29, 96]
+	ldr	x1, [x0, #:lo12:.LANCHOR185]
+	str	x1, [x29, 88]
+	ldrh	w0, [x19]
+	strh	w0, [x1, 2]
+	ldr	w0, [x22]
+	stp	w0, w24, [x1, 4]
+	add	w0, w0, 1
+	strh	wzr, [x1]
+	cmn	w0, #1
+	str	w24, [x1, 12]
+	csel	w0, w0, wzr, ne
+	mov	w1, 1
+	str	w0, [x22]
+	add	x0, x29, 72
+	bl	FlashProgPages
+	ldrh	w0, [x19]
+	bl	decrement_vpc_count
+	b	.L1621
+	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
+	.section	.text.FtlLoadFactoryBbt,"ax",@progbits
+	.align	2
+	.global	FtlLoadFactoryBbt
+	.type	FtlLoadFactoryBbt, %function
+FtlLoadFactoryBbt:
+	stp	x29, x30, [sp, -112]!
+	adrp	x2, .LANCHOR79
+	adrp	x0, .LANCHOR199
+	add	x1, x0, :lo12:.LANCHOR199
+	add	x29, sp, 0
+	ldr	x2, [x2, #:lo12:.LANCHOR79]
+	stp	x21, x22, [sp, 32]
+	mov	x22, x0
+	stp	x25, x26, [sp, 64]
+	adrp	x26, .LANCHOR49
+	stp	x27, x28, [sp, 80]
+	add	x28, x26, :lo12:.LANCHOR49
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR73
+	stp	x23, x24, [sp, 48]
+	add	x20, x20, :lo12:.LANCHOR73
+	str	x2, [x1, 8]
+	adrp	x2, .LANCHOR185
+	adrp	x23, .LANCHOR43
+	add	x20, x20, 12
+	ldr	x25, [x2, #:lo12:.LANCHOR185]
+	add	x23, x23, :lo12:.LANCHOR43
+	mov	w21, 0
+	mov	w27, -1
+	str	x25, [x1, 16]
+.L1635:
+	ldrh	w0, [x23]
+	cmp	w21, w0
+	bcc	.L1640
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L1640:
+	ldrh	w19, [x26, #:lo12:.LANCHOR49]
+	add	x24, x22, :lo12:.LANCHOR199
+	strh	w27, [x20]
+	mov	w3, 61664
+	sub	w19, w19, #1
+	and	w19, w19, 65535
+.L1636:
+	ldrh	w0, [x28]
+	sub	w1, w0, #15
+	cmp	w1, w19
+	bgt	.L1638
+	madd	w0, w0, w21, w19
+	mov	w2, 1
+	str	w3, [x29, 108]
+	mov	w1, w2
+	lsl	w0, w0, 10
+	str	w0, [x24, 4]
+	mov	x0, x24
+	bl	FlashReadPages
+	ldr	w0, [x24]
+	ldr	w3, [x29, 108]
+	cmn	w0, #1
+	beq	.L1637
+	ldrh	w0, [x25]
+	cmp	w0, w3
+	bne	.L1637
+	strh	w19, [x20]
+.L1638:
+	add	w21, w21, 1
+	add	x20, x20, 2
+	b	.L1635
+.L1637:
+	sub	w19, w19, #1
+	and	w19, w19, 65535
+	b	.L1636
+	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
+	.section	.text.FtlGetLastWrittenPage,"ax",@progbits
+	.align	2
+	.global	FtlGetLastWrittenPage
+	.type	FtlGetLastWrittenPage, %function
+FtlGetLastWrittenPage:
+	stp	x29, x30, [sp, -192]!
+	cmp	w1, 1
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	mov	w23, w1
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	bne	.L1646
+	adrp	x1, .LANCHOR52
+	ldrh	w19, [x1, #:lo12:.LANCHOR52]
+.L1647:
+	sub	w19, w19, #1
+	lsl	w21, w0, 10
+	sxth	w19, w19
+	add	x1, x29, 128
+	orr	w0, w19, w21
+	stp	xzr, x1, [x29, 80]
+	str	w0, [x29, 76]
+	mov	w2, w23
+	mov	w1, 1
+	add	x0, x29, 72
+	bl	FlashReadPages
+	ldr	w0, [x29, 128]
+	cmn	w0, #1
+	bne	.L1648
+	mov	w22, 0
+	mov	w24, 2
+.L1649:
+	cmp	w22, w19
+	ble	.L1652
+.L1648:
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 192
+	ret
+.L1646:
+	adrp	x1, .LANCHOR51
+	ldrh	w19, [x1, #:lo12:.LANCHOR51]
+	b	.L1647
+.L1652:
+	add	w20, w22, w19
+	mov	w2, w23
+	mov	w1, 1
+	sdiv	w20, w20, w24
+	sxth	w0, w20
+	orr	w0, w0, w21
+	str	w0, [x29, 76]
+	add	x0, x29, 72
+	bl	FlashReadPages
+	ldr	w0, [x29, 128]
+	cmn	w0, #1
+	bne	.L1650
+	ldr	w0, [x29, 132]
+	cmn	w0, #1
+	bne	.L1650
+	ldr	w0, [x29, 72]
+	cmn	w0, #1
+	beq	.L1650
+	sub	w19, w20, #1
+	sxth	w19, w19
+	b	.L1649
+.L1650:
+	add	w20, w20, 1
+	sxth	w22, w20
+	b	.L1649
+	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
+	.section	.text.FtlLoadBbt,"ax",@progbits
+	.align	2
+	.global	FtlLoadBbt
+	.type	FtlLoadBbt, %function
+FtlLoadBbt:
+	stp	x29, x30, [sp, -80]!
+	adrp	x0, .LANCHOR185
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR199
+	add	x20, x22, :lo12:.LANCHOR199
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR49
+	ldr	x21, [x0, #:lo12:.LANCHOR185]
+	str	x25, [sp, 64]
+	mov	w24, 61649
+	stp	xzr, x21, [x20, 8]
+	bl	FtlBbtMemInit
+	ldrh	w19, [x23, #:lo12:.LANCHOR49]
+	add	x23, x23, :lo12:.LANCHOR49
+	sub	w19, w19, #1
+	and	w19, w19, 65535
+.L1658:
+	ldrh	w0, [x23]
+	sub	w0, w0, #47
+	cmp	w0, w19
+	bgt	.L1661
+	lsl	w0, w19, 10
+	mov	w2, 1
+	str	w0, [x20, 4]
+	mov	w1, w2
+	mov	x0, x20
+	bl	FlashReadPages
+	ldr	w0, [x20]
+	cmn	w0, #1
+	bne	.L1659
+	ldr	w0, [x20, 4]
+	mov	w2, 1
+	mov	w1, w2
+	add	w0, w0, 1
+	str	w0, [x20, 4]
+	mov	x0, x20
+	bl	FlashReadPages
+.L1659:
+	ldr	w0, [x20]
+	cmn	w0, #1
+	beq	.L1660
+	ldrh	w0, [x21]
+	cmp	w0, w24
+	bne	.L1660
+	adrp	x1, .LANCHOR73
+	add	x0, x1, :lo12:.LANCHOR73
+	strh	w19, [x1, #:lo12:.LANCHOR73]
+	ldr	w1, [x21, 4]
+	str	w1, [x0, 8]
+	ldrh	w1, [x21, 8]
+	strh	w1, [x0, 4]
+.L1661:
+	adrp	x19, .LANCHOR73
+	mov	w0, 65535
+	add	x20, x19, :lo12:.LANCHOR73
+	ldrh	w1, [x19, #:lo12:.LANCHOR73]
+	cmp	w1, w0
+	beq	.L1675
+	ldrh	w1, [x20, 4]
+	cmp	w1, w0
+	beq	.L1665
+	add	x0, x22, :lo12:.LANCHOR199
+	lsl	w1, w1, 10
+	mov	w2, 1
+	str	w1, [x0, 4]
+	mov	w1, w2
+	bl	FlashReadPages
+	ldr	w0, [x22, #:lo12:.LANCHOR199]
+	cmn	w0, #1
+	beq	.L1665
+	ldrh	w1, [x21]
+	mov	w0, 61649
+	cmp	w1, w0
+	bne	.L1665
+	ldr	w1, [x20, 8]
+	ldr	w0, [x21, 4]
+	cmp	w0, w1
+	bls	.L1665
+	ldrh	w1, [x20, 4]
+	str	w0, [x20, 8]
+	ldrh	w0, [x21, 8]
+	strh	w1, [x19, #:lo12:.LANCHOR73]
+	strh	w0, [x20, 4]
+.L1665:
+	ldrh	w0, [x19, #:lo12:.LANCHOR73]
+	add	x23, x19, :lo12:.LANCHOR73
+	mov	w1, 1
+	adrp	x24, .LANCHOR79
+	mov	w25, 61649
+	bl	FtlGetLastWrittenPage
+	sxth	w20, w0
+	add	w0, w0, 1
+	strh	w0, [x23, 2]
+	add	x23, x22, :lo12:.LANCHOR199
+.L1667:
+	tbz	w20, #31, .L1670
+	mov	w2, 335
+	adrp	x1, .LANCHOR208
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR208
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1669:
+	add	x0, x19, :lo12:.LANCHOR73
+	ldrh	w1, [x21, 10]
+	strh	w1, [x0, 6]
+	mov	w1, 65535
+	ldrh	w0, [x21, 12]
+	cmp	w0, w1
+	beq	.L1672
+	adrp	x1, .LANCHOR35
+	ldr	w2, [x1, #:lo12:.LANCHOR35]
+	cmp	w0, w2
+	beq	.L1672
+	adrp	x1, .LANCHOR39
+	ldrh	w1, [x1, #:lo12:.LANCHOR39]
+	lsr	w1, w1, 2
+	cmp	w2, w1
+	bcs	.L1672
+	cmp	w0, w1
+	bcs	.L1672
+	bl	FtlSysBlkNumInit
+.L1672:
+	add	x19, x19, :lo12:.LANCHOR73
+	adrp	x21, .LANCHOR43
+	adrp	x23, .LANCHOR120
+	add	x19, x19, 32
+	add	x21, x21, :lo12:.LANCHOR43
+	add	x23, x23, :lo12:.LANCHOR120
+	add	x22, x22, :lo12:.LANCHOR199
+	mov	w20, 0
+.L1673:
+	ldrh	w0, [x21]
+	cmp	w20, w0
+	bcc	.L1674
+	mov	w0, 0
+.L1657:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L1660:
+	sub	w19, w19, #1
+	and	w19, w19, 65535
+	b	.L1658
+.L1670:
+	ldrh	w0, [x19, #:lo12:.LANCHOR73]
+	mov	w2, 1
+	mov	w1, w2
+	orr	w0, w20, w0, lsl 10
+	str	w0, [x23, 4]
+	ldr	x0, [x24, #:lo12:.LANCHOR79]
+	str	x0, [x23, 8]
+	mov	x0, x23
+	bl	FlashReadPages
+	ldr	w0, [x23]
+	cmn	w0, #1
+	beq	.L1668
+	ldrh	w0, [x21]
+	cmp	w0, w25
+	beq	.L1669
+.L1668:
+	sub	w20, w20, #1
+	sxth	w20, w20
+	b	.L1667
+.L1674:
+	ldrh	w2, [x23]
+	ldr	x0, [x22, 8]
+	mul	w1, w2, w20
+	lsl	w2, w2, 2
+	add	w20, w20, 1
+	add	x1, x0, x1, lsl 2
+	ldr	x0, [x19], 8
+	bl	ftl_memcpy
+	b	.L1673
+.L1675:
+	mov	w0, -1
+	b	.L1657
+	.size	FtlLoadBbt, .-FtlLoadBbt
+	.section	.text.ftl_map_blk_gc,"ax",@progbits
+	.align	2
+	.global	ftl_map_blk_gc
+	.type	ftl_map_blk_gc, %function
+ftl_map_blk_gc:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR52
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	ldr	x20, [x0, 16]
+	ldr	x22, [x0, 40]
+	bl	ftl_free_no_use_map_blk
+	ldrh	w4, [x19, 10]
+	ldrh	w2, [x19, 8]
+	sub	w1, w4, #4
+	cmp	w2, w1
+	ldrh	w1, [x19, 60]
+	bge	.L1688
+	mov	w2, 65535
+	cmp	w1, w2
+	beq	.L1690
+	ldrh	w3, [x19, 2]
+	ldrh	w2, [x21, #:lo12:.LANCHOR52]
+	cmp	w3, w2
+	bcc	.L1691
+.L1688:
+	mov	w2, 65535
+	and	w0, w0, 65535
+	cmp	w1, w2
+	beq	.L1692
+	ldrh	w3, [x19, 2]
+	ldrh	w2, [x21, #:lo12:.LANCHOR52]
+	cmp	w2, w3
+	bls	.L1693
+.L1692:
+	ubfiz	x0, x0, 1, 32
+	ldrh	w23, [x20, x0]
+	cbz	w23, .L1690
+	ldr	w1, [x19, 52]
+	cbnz	w1, .L1690
+	mov	w1, 1
+	str	w1, [x19, 52]
+	strh	wzr, [x20, x0]
+	ldrh	w0, [x19, 8]
+	ldrh	w1, [x19, 2]
+	sub	w0, w0, #1
+	strh	w0, [x19, 8]
+	ldrh	w0, [x21, #:lo12:.LANCHOR52]
+	cmp	w1, w0
+	bcc	.L1698
+	mov	x0, x19
+	bl	ftl_map_blk_alloc_new_blk
+.L1698:
+	adrp	x26, .LANCHOR199
+	adrp	x25, .LC34
+	add	x24, x26, :lo12:.LANCHOR199
+	add	x25, x25, :lo12:.LC34
+	mov	w20, 0
+.L1699:
+	ldrh	w0, [x19, 6]
+	cmp	w0, w20
+	bhi	.L1703
+	mov	w1, 1
+	mov	w0, w23
+	bl	FtlFreeSysBlkQueueIn
+	str	wzr, [x19, 52]
+.L1690:
+	ldrh	w1, [x19, 2]
+	ldrh	w0, [x21, #:lo12:.LANCHOR52]
+	cmp	w1, w0
+	bcc	.L1691
+	mov	x0, x19
+	bl	ftl_map_blk_alloc_new_blk
+.L1691:
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	ret
+.L1696:
+	ldrh	w6, [x20, x2, lsl 1]
+	add	x5, x2, 1
+	cmp	w6, w1
+	beq	.L1694
+	mov	x2, x5
+.L1695:
+	and	w23, w2, 65535
+	cmp	w23, w4
+	bcc	.L1696
+	mov	w23, w0
+.L1694:
+	and	x2, x2, 65535
+	adrp	x0, .LC33
+	add	x0, x0, :lo12:.LC33
+	ldrh	w2, [x20, x2, lsl 1]
+	bl	printf
+	mov	w0, -1
+	strh	w0, [x19, 60]
+	mov	w0, w23
+	b	.L1692
+.L1693:
+	mov	x2, 0
+	b	.L1695
+.L1703:
+	ubfiz	x27, x20, 2, 16
+	ldr	w1, [x22, x27]
+	cmp	w23, w1, lsr 10
+	bne	.L1700
+	adrp	x2, .LANCHOR181
+	add	x0, x26, :lo12:.LANCHOR199
+	ldr	x2, [x2, #:lo12:.LANCHOR181]
+	str	x2, [x0, 8]
+	adrp	x2, .LANCHOR185
+	str	w1, [x0, 4]
+	ldr	x28, [x2, #:lo12:.LANCHOR185]
+	mov	w2, 1
+	str	x28, [x0, 16]
+	mov	w1, w2
+	bl	FlashReadPages
+	ldrh	w0, [x28, 8]
+	cmp	w0, w20
+	beq	.L1701
+	mov	w2, 638
+	adrp	x1, .LANCHOR209
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR209
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1701:
+	ldr	w0, [x24]
+	cmn	w0, #1
+	bne	.L1702
+	str	wzr, [x22, x27]
+	mov	x0, x25
+	ldrh	w2, [x28, 8]
+	ldr	w1, [x24, 4]
+	bl	printf
+	adrp	x0, .LANCHOR75
+	mov	w1, 1
+	str	w1, [x0, #:lo12:.LANCHOR75]
+.L1700:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L1699
+.L1702:
+	ldr	x2, [x24, 8]
+	mov	w1, w20
+	mov	x0, x19
+	bl	FtlMapWritePage
+	b	.L1700
+	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
+	.section	.text.Ftl_write_map_blk_to_last_page,"ax",@progbits
+	.align	2
+	.global	Ftl_write_map_blk_to_last_page
+	.type	Ftl_write_map_blk_to_last_page, %function
+Ftl_write_map_blk_to_last_page:
+	adrp	x1, .LANCHOR75
+	ldr	w1, [x1, #:lo12:.LANCHOR75]
+	cbnz	w1, .L1719
+	stp	x29, x30, [sp, -64]!
+	mov	w1, 65535
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	stp	x21, x22, [sp, 32]
+	ldrh	w0, [x0]
+	ldr	x20, [x19, 16]
+	str	x23, [sp, 48]
+	cmp	w0, w1
+	bne	.L1710
+	ldrh	w0, [x19, 8]
+	cbz	w0, .L1711
+	mov	w2, 670
+	adrp	x1, .LANCHOR210
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR210
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1711:
+	ldrh	w0, [x19, 8]
+	add	w0, w0, 1
+	strh	w0, [x19, 8]
+	bl	FtlFreeSysBlkQueueOut
+	strh	w0, [x20]
+	ldr	w0, [x19, 48]
+	strh	wzr, [x19, 2]
+	add	w0, w0, 1
+	strh	wzr, [x19]
+	str	w0, [x19, 48]
+.L1709:
+	mov	w0, 0
+	ldr	x23, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+.L1710:
+	ubfiz	x0, x0, 1, 16
+	adrp	x1, .LANCHOR185
+	adrp	x23, .LANCHOR79
+	ldr	x22, [x19, 40]
+	ldr	x1, [x1, #:lo12:.LANCHOR185]
+	ldrh	w21, [x20, x0]
+	adrp	x20, .LANCHOR199
+	ldrh	w0, [x19, 2]
+	add	x2, x20, :lo12:.LANCHOR199
+	orr	w0, w0, w21, lsl 10
+	str	w0, [x2, 4]
+	ldr	x0, [x23, #:lo12:.LANCHOR79]
+	str	x1, [x2, 16]
+	str	x0, [x2, 8]
+	ldr	w2, [x19, 48]
+	str	w2, [x1, 4]
+	mov	w2, -1291
+	strh	w2, [x1, 8]
+	ldrh	w2, [x19, 4]
+	strh	w2, [x1]
+	strh	w21, [x1, 2]
+	adrp	x1, .LANCHOR52
+	ldrh	w2, [x1, #:lo12:.LANCHOR52]
+	mov	w1, 255
+	lsl	w2, w2, 3
+	bl	ftl_memset
+	ldrh	w4, [x19, 6]
+	mov	x1, 0
+	ldr	x3, [x23, #:lo12:.LANCHOR79]
+	mov	w2, 0
+.L1712:
+	cmp	w4, w1, uxth
+	bhi	.L1714
+	mov	w2, 1
+	mov	w3, 0
+	mov	w1, w2
+	add	x0, x20, :lo12:.LANCHOR199
+	bl	FlashProgPages
+	ldrh	w0, [x19, 2]
+	add	w0, w0, 1
+	strh	w0, [x19, 2]
+	mov	x0, x19
+	bl	ftl_map_blk_gc
+	b	.L1709
+.L1714:
+	ldr	w0, [x22, x1, lsl 2]
+	cmp	w21, w0, lsr 10
+	bne	.L1713
+	add	w2, w2, 1
+	and	w2, w2, 65535
+	ubfiz	x0, x2, 1, 16
+	str	w1, [x3, x0, lsl 2]
+	add	x0, x0, 1
+	ldr	w5, [x22, x1, lsl 2]
+	str	w5, [x3, x0, lsl 2]
+.L1713:
+	add	x1, x1, 1
+	b	.L1712
+.L1719:
+	mov	w0, 0
+	ret
+	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
+	.section	.text.FtlMapWritePage,"ax",@progbits
+	.align	2
+	.global	FtlMapWritePage
+	.type	FtlMapWritePage, %function
+FtlMapWritePage:
+	stp	x29, x30, [sp, -112]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x24, .LANCHOR75
+	stp	x19, x20, [sp, 16]
+	ldr	w3, [x24, #:lo12:.LANCHOR75]
+	stp	x21, x22, [sp, 32]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	cbnz	w3, .L1737
+	adrp	x23, .LANCHOR163
+	adrp	x25, .LANCHOR211
+	mov	w22, w1
+	add	x23, x23, :lo12:.LANCHOR163
+	add	x25, x25, :lo12:.LANCHOR211
+	mov	x19, x0
+	adrp	x27, .LANCHOR52
+	mov	w21, 0
+	add	x0, x27, :lo12:.LANCHOR52
+	stp	x2, x0, [x29, 96]
+.L1724:
+	ldr	w0, [x23]
+	ldrh	w1, [x19, 2]
+	add	w0, w0, 1
+	str	w0, [x23]
+	ldrh	w0, [x27, #:lo12:.LANCHOR52]
+	sub	w0, w0, #1
+	cmp	w1, w0
+	bge	.L1725
+	ldrh	w1, [x19]
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L1726
+.L1725:
+	mov	x0, x19
+	bl	Ftl_write_map_blk_to_last_page
+.L1726:
+	ldrh	w1, [x19]
+	ldr	x0, [x19, 16]
+	ldrh	w0, [x0, x1, lsl 1]
+	cbnz	w0, .L1727
+	mov	w2, 731
+	mov	x1, x25
+	adrp	x0, .LC4
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1727:
+	ldrh	w1, [x19]
+	ldrh	w0, [x19, 10]
+	cmp	w1, w0
+	bcc	.L1728
+	mov	w2, 732
+	mov	x1, x25
+	adrp	x0, .LC4
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1728:
+	ldrh	w1, [x19]
+	adrp	x20, .LANCHOR199
+	ldr	x0, [x19, 16]
+	add	x28, x20, :lo12:.LANCHOR199
+	mov	w2, 16
+	ldrh	w26, [x0, x1, lsl 1]
+	mov	w1, 0
+	ldrh	w0, [x19, 2]
+	orr	w0, w0, w26, lsl 10
+	str	w0, [x28, 4]
+	ldr	x0, [x29, 96]
+	str	x0, [x28, 8]
+	adrp	x0, .LANCHOR185
+	ldr	x0, [x0, #:lo12:.LANCHOR185]
+	str	x0, [x28, 16]
+	bl	ftl_memset
+	ldr	x0, [x28, 16]
+	mov	w3, 1
+	ldr	w1, [x19, 48]
+	mov	w2, w3
+	str	w1, [x0, 4]
+	ldrh	w1, [x19, 4]
+	strh	w1, [x0]
+	mov	w1, w3
+	strh	w22, [x0, 8]
+	strh	w26, [x0, 2]
+	mov	x0, x28
+	bl	FlashProgPages
+	ldrh	w0, [x19, 2]
+	ldr	w1, [x20, #:lo12:.LANCHOR199]
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	strh	w0, [x19, 2]
+	cmn	w1, #1
+	bne	.L1729
+	ldr	w1, [x28, 4]
+	adrp	x0, .LC35
+	add	x0, x0, :lo12:.LC35
+	add	w21, w21, 1
+	and	w21, w21, 65535
+	bl	printf
+	ldrh	w0, [x19, 2]
+	cmp	w0, 2
+	bhi	.L1730
+	ldr	x0, [x29, 104]
+	ldrh	w0, [x0]
+	sub	w0, w0, #1
+	strh	w0, [x19, 2]
+.L1730:
+	cmp	w21, 3
+	bls	.L1724
+	add	x20, x20, :lo12:.LANCHOR199
+	mov	w2, w21
+	adrp	x0, .LC36
+	add	x0, x0, :lo12:.LC36
+	ldr	w1, [x20, 4]
+	bl	printf
+	mov	w0, 1
+	str	w0, [x24, #:lo12:.LANCHOR75]
+.L1737:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L1729:
+	cbz	w1, .L1732
+	strh	w26, [x19, 60]
+	cmp	w0, 1
+	beq	.L1724
+	cmp	w1, 256
+.L1745:
+	beq	.L1724
+	add	x20, x20, :lo12:.LANCHOR199
+	ldr	x0, [x19, 40]
+	ldr	w1, [x20, 4]
+	str	w1, [x0, w22, uxtw 2]
+	b	.L1737
+.L1732:
+	cmp	w0, 1
+	b	.L1745
+	.size	FtlMapWritePage, .-FtlMapWritePage
+	.section	.text.flush_l2p_region,"ax",@progbits
+	.align	2
+	.global	flush_l2p_region
+	.type	flush_l2p_region, %function
+flush_l2p_region:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR95
+	ubfiz	x19, x0, 4, 16
+	ldr	x0, [x20, #:lo12:.LANCHOR95]
+	add	x1, x0, x19
+	ldr	x2, [x1, 8]
+	ldrh	w1, [x0, x19]
+	adrp	x0, .LANCHOR124
+	add	x0, x0, :lo12:.LANCHOR124
+	bl	FtlMapWritePage
+	ldr	x0, [x20, #:lo12:.LANCHOR95]
+	add	x0, x0, x19
+	ldp	x19, x20, [sp, 16]
+	ldr	w1, [x0, 4]
+	and	w1, w1, 2147483647
+	str	w1, [x0, 4]
+	mov	w0, 0
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	flush_l2p_region, .-flush_l2p_region
+	.section	.text.l2p_flush,"ax",@progbits
+	.align	2
+	.global	l2p_flush
+	.type	l2p_flush, %function
+l2p_flush:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR66
+	add	x20, x20, :lo12:.LANCHOR66
+	str	x21, [sp, 32]
+	mov	w19, 0
+	adrp	x21, .LANCHOR95
+.L1749:
+	ldrh	w0, [x20]
+	cmp	w0, w19
+	bhi	.L1751
+	mov	w0, 0
+	ldr	x21, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+.L1751:
+	ldr	x1, [x21, #:lo12:.LANCHOR95]
+	ubfiz	x0, x19, 4, 16
+	add	x0, x1, x0
+	ldr	w0, [x0, 4]
+	tbz	w0, #31, .L1750
+	mov	w0, w19
+	bl	flush_l2p_region
+.L1750:
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L1749
+	.size	l2p_flush, .-l2p_flush
+	.section	.text.load_l2p_region,"ax",@progbits
+	.align	2
+	.global	load_l2p_region
+	.type	load_l2p_region, %function
+load_l2p_region:
+	stp	x29, x30, [sp, -64]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w20, w0, 65535
+	adrp	x0, .LANCHOR65
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	and	x19, x1, 65535
+	ldrh	w0, [x0, #:lo12:.LANCHOR65]
+	cmp	w0, w20
+	bcs	.L1754
+	mov	w2, 503
+	adrp	x1, .LANCHOR212
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR212
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1754:
+	adrp	x1, .LANCHOR128
+	ubfiz	x0, x20, 2, 16
+	adrp	x22, .LANCHOR95
+	ldr	x1, [x1, #:lo12:.LANCHOR128]
+	ldr	w21, [x1, x0]
+	cbnz	w21, .L1755
+	ldr	x0, [x22, #:lo12:.LANCHOR95]
+	lsl	x19, x19, 4
+	adrp	x1, .LANCHOR56
+	add	x0, x0, x19
+	ldrh	w2, [x1, #:lo12:.LANCHOR56]
+	mov	w1, 255
+	ldr	x0, [x0, 8]
+	bl	ftl_memset
+	ldr	x0, [x22, #:lo12:.LANCHOR95]
+	add	x1, x0, x19
+	strh	w20, [x0, x19]
+	str	wzr, [x1, 4]
+.L1756:
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	ret
+.L1755:
+	ldr	x0, [x22, #:lo12:.LANCHOR95]
+	lsl	x19, x19, 4
+	adrp	x24, .LANCHOR199
+	add	x23, x24, :lo12:.LANCHOR199
+	add	x0, x0, x19
+	mov	w2, 1
+	mov	w1, w2
+	str	w21, [x23, 4]
+	ldr	x0, [x0, 8]
+	str	x0, [x23, 8]
+	adrp	x0, .LANCHOR185
+	ldr	x0, [x0, #:lo12:.LANCHOR185]
+	str	x0, [x23, 16]
+	mov	x0, x23
+	bl	FlashReadPages
+	ldr	x23, [x23, 16]
+	ldr	w0, [x24, #:lo12:.LANCHOR199]
+	cmp	w0, 256
+	bne	.L1757
+	mov	w2, w21
+	mov	w1, w20
+	adrp	x0, .LC37
+	add	x0, x0, :lo12:.LC37
+	bl	printf
+	lsr	w21, w21, 10
+	ldr	x1, [x22, #:lo12:.LANCHOR95]
+	adrp	x0, .LANCHOR124
+	add	x0, x0, :lo12:.LANCHOR124
+	add	x1, x1, x19
+	strh	w21, [x0, 60]
+	ldr	x2, [x1, 8]
+	mov	w1, w20
+	bl	FtlMapWritePage
+.L1757:
+	ldrh	w0, [x23, 8]
+	cmp	w0, w20
+	beq	.L1758
+	mov	w2, 529
+	adrp	x1, .LANCHOR212
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR212
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1758:
+	ldr	x0, [x22, #:lo12:.LANCHOR95]
+	add	x1, x0, x19
+	str	wzr, [x1, 4]
+	strh	w20, [x0, x19]
+	b	.L1756
+	.size	load_l2p_region, .-load_l2p_region
+	.section	.text.log2phys,"ax",@progbits
+	.align	2
+	.global	log2phys
+	.type	log2phys, %function
+log2phys:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	mov	x23, x1
+	adrp	x1, .LANCHOR55
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	mov	w24, w2
+	ldrh	w19, [x1, #:lo12:.LANCHOR55]
+	str	x25, [sp, 64]
+	add	w1, w19, 7
+	mov	x19, 1
+	lsr	w22, w0, w1
+	and	w22, w22, 65535
+	lsl	x19, x19, x1
+	adrp	x1, .LANCHOR71
+	sub	w19, w19, #1
+	ldr	w1, [x1, #:lo12:.LANCHOR71]
+	and	w19, w19, w0
+	and	x19, x19, 65535
+	cmp	w0, w1
+	bcc	.L1761
+	mov	w2, 851
+	adrp	x1, .LANCHOR213
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR213
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1761:
+	adrp	x21, .LANCHOR95
+	adrp	x0, .LANCHOR66
+	ldr	x2, [x21, #:lo12:.LANCHOR95]
+	ldrh	w1, [x0, #:lo12:.LANCHOR66]
+	mov	x0, 0
+.L1762:
+	and	x20, x0, 65535
+	cmp	w20, w1
+	bcc	.L1767
+	bl	select_l2p_ram_region
+	and	x20, x0, 65535
+	ldr	x2, [x21, #:lo12:.LANCHOR95]
+	ubfiz	x1, x20, 4, 16
+	mov	w25, w0
+	add	x3, x2, x1
+	ldrh	w2, [x2, x1]
+	mov	w1, 65535
+	cmp	w2, w1
+	beq	.L1768
+	ldr	w1, [x3, 4]
+	tbz	w1, #31, .L1768
+	bl	flush_l2p_region
+.L1768:
+	mov	w1, w25
+	mov	w0, w22
+	bl	load_l2p_region
+	b	.L1763
+.L1767:
+	add	x0, x0, 1
+	add	x3, x2, x0, lsl 4
+	ldrh	w3, [x3, -16]
+	cmp	w3, w22
+	bne	.L1762
+.L1763:
+	ldr	x0, [x21, #:lo12:.LANCHOR95]
+	add	x0, x0, x20, lsl 4
+	cbnz	w24, .L1764
+	ldr	x0, [x0, 8]
+	ldr	w0, [x0, x19, lsl 2]
+	str	w0, [x23]
+.L1765:
+	ldr	x0, [x21, #:lo12:.LANCHOR95]
+	add	x20, x0, x20, lsl 4
+	ldr	w0, [x20, 4]
+	cmn	w0, #1
+	beq	.L1770
+	add	w0, w0, 1
+	str	w0, [x20, 4]
+.L1770:
+	mov	w0, 0
+	ldr	x25, [sp, 64]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	ret
+.L1764:
+	ldr	x1, [x0, 8]
+	ldr	w2, [x23]
+	str	w2, [x1, x19, lsl 2]
+	ldr	w1, [x0, 4]
+	orr	w1, w1, -2147483648
+	str	w1, [x0, 4]
+	adrp	x0, .LANCHOR96
+	strh	w22, [x0, #:lo12:.LANCHOR96]
+	b	.L1765
+	.size	log2phys, .-log2phys
+	.section	.text.FtlReUsePrevPpa,"ax",@progbits
+	.align	2
+	.global	FtlReUsePrevPpa
+	.type	FtlReUsePrevPpa, %function
+FtlReUsePrevPpa:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR82
+	stp	x19, x20, [sp, 16]
+	mov	w21, w0
+	str	w1, [x29, 76]
+	lsr	w0, w1, 10
+	str	x23, [sp, 48]
+	bl	P2V_block_in_plane
+	ldr	x2, [x22, #:lo12:.LANCHOR82]
+	and	w3, w0, 65535
+	ubfiz	x20, x3, 1, 16
+	ldrh	w1, [x2, x20]
+	cbnz	w1, .L1776
+	adrp	x0, .LANCHOR86
+	ldr	x19, [x0, #:lo12:.LANCHOR86]
+	cbz	x19, .L1777
+	adrp	x2, .LANCHOR80
+	mov	x5, -6148914691236517206
+	movk	x5, 0xaaab, lsl 0
+	adrp	x23, .LANCHOR87
+	ldr	x2, [x2, #:lo12:.LANCHOR80]
+	mov	w6, 65535
+	ldrh	w4, [x23, #:lo12:.LANCHOR87]
+	sub	x19, x19, x2
+	asr	x19, x19, 1
+	mul	x19, x19, x5
+	mov	w5, 6
+	and	w19, w19, 65535
+.L1778:
+	cmp	w1, w4
+	beq	.L1777
+	cmp	w19, w3
+	bne	.L1779
+	mov	w1, w19
+	add	x0, x0, :lo12:.LANCHOR86
+	bl	List_remove_node
+	ldrh	w0, [x23, #:lo12:.LANCHOR87]
+	cbnz	w0, .L1780
+	mov	w2, 1825
+	adrp	x1, .LANCHOR214
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR214
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1780:
+	ldrh	w0, [x23, #:lo12:.LANCHOR87]
+	sub	w0, w0, #1
+	strh	w0, [x23, #:lo12:.LANCHOR87]
+	mov	w0, w19
+	bl	INSERT_DATA_LIST
+	ldr	x1, [x22, #:lo12:.LANCHOR82]
+	ldrh	w0, [x1, x20]
+	add	w0, w0, 1
+	strh	w0, [x1, x20]
+.L1777:
+	add	x1, x29, 76
+	mov	w2, 1
+	mov	w0, w21
+	bl	log2phys
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	ret
+.L1779:
+	umull	x19, w19, w5
+	ldrh	w19, [x2, x19]
+	cmp	w19, w6
+	beq	.L1777
+	add	w1, w1, 1
+	and	w1, w1, 65535
+	b	.L1778
+.L1776:
+	add	w1, w1, 1
+	strh	w1, [x2, x20]
+	b	.L1777
+	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
+	.section	.text.FtlVendorPartWrite,"ax",@progbits
+	.align	2
+	.global	FtlVendorPartWrite
+	.type	FtlVendorPartWrite, %function
+FtlVendorPartWrite:
+	stp	x29, x30, [sp, -176]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w20, w1
+	stp	x21, x22, [sp, 32]
+	add	w1, w0, w1
+	mov	w22, w0
+	adrp	x0, .LANCHOR48
+	stp	x23, x24, [sp, 48]
+	ldrh	w0, [x0, #:lo12:.LANCHOR48]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	cmp	w1, w0
+	bhi	.L1794
+	adrp	x0, .LANCHOR55
+	adrp	x26, .LANCHOR54
+	adrp	x27, .LANCHOR56
+	mov	x25, x2
+	ldrh	w21, [x0, #:lo12:.LANCHOR55]
+	add	x26, x26, :lo12:.LANCHOR54
+	add	x27, x27, :lo12:.LANCHOR56
+	mov	w24, 0
+	lsr	w21, w22, w21
+.L1788:
+	cbnz	w20, .L1793
+.L1786:
+	mov	w0, w24
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 176
+	ret
+.L1793:
+	ldrh	w1, [x26]
+	adrp	x0, .LANCHOR191
+	adrp	x28, .LANCHOR182
+	ldr	x0, [x0, #:lo12:.LANCHOR191]
+	udiv	w23, w22, w1
+	ldr	w2, [x0, w21, uxtw 2]
+	and	w0, w20, 65535
+	msub	w23, w23, w1, w22
+	sub	w19, w1, w23
+	and	w19, w19, 65535
+	cmp	w20, w19
+	csel	w19, w0, w19, cc
+	cbz	w2, .L1790
+	cmp	w19, w1
+	beq	.L1790
+	ldr	x0, [x28, #:lo12:.LANCHOR182]
+	str	w2, [x29, 124]
+	mov	w2, 1
+	stp	x0, xzr, [x29, 128]
+	mov	w1, w2
+	add	x0, x29, 120
+	bl	FlashReadPages
+.L1791:
+	lsl	w3, w19, 9
+	ldr	x0, [x28, #:lo12:.LANCHOR182]
+	lsl	w23, w23, 7
+	mov	w2, w3
+	mov	x1, x25
+	str	w3, [x29, 108]
+	add	x0, x0, x23, sxtw 2
+	bl	ftl_memcpy
+	ldr	x2, [x28, #:lo12:.LANCHOR182]
+	mov	w1, w21
+	adrp	x0, .LANCHOR215
+	add	x0, x0, :lo12:.LANCHOR215
+	sub	w20, w20, w19
+	add	w22, w22, w19
+	add	w21, w21, 1
+	bl	FtlMapWritePage
+	cmn	w0, #1
+	ldr	w3, [x29, 108]
+	csinv	w24, w24, wzr, ne
+	add	x25, x25, x3, sxtw
+	b	.L1788
+.L1790:
+	ldrh	w2, [x27]
+	mov	w1, 0
+	ldr	x0, [x28, #:lo12:.LANCHOR182]
+	bl	ftl_memset
+	b	.L1791
+.L1794:
+	mov	w24, -1
+	b	.L1786
+	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
+	.section	.text.Ftl_save_ext_data,"ax",@progbits
+	.align	2
+	.global	Ftl_save_ext_data
+	.type	Ftl_save_ext_data, %function
+Ftl_save_ext_data:
+	adrp	x0, .LANCHOR136
+	add	x2, x0, :lo12:.LANCHOR136
+	ldr	w1, [x0, #:lo12:.LANCHOR136]
+	mov	w0, 19539
+	movk	w0, 0x4654, lsl 16
+	cmp	w1, w0
+	bne	.L1799
+	mov	w0, 71
+	mov	w1, 1
+	movk	w0, 0x5000, lsl 16
+	str	w0, [x2, 4]
+	adrp	x0, .LANCHOR216
+	ldr	w0, [x0, #:lo12:.LANCHOR216]
+	str	w0, [x2, 88]
+	adrp	x0, .LANCHOR217
+	ldr	w0, [x0, #:lo12:.LANCHOR217]
+	str	w0, [x2, 92]
+	adrp	x0, .LANCHOR159
+	ldr	w0, [x0, #:lo12:.LANCHOR159]
+	str	w0, [x2, 8]
+	adrp	x0, .LANCHOR160
+	ldr	w0, [x0, #:lo12:.LANCHOR160]
+	str	w0, [x2, 12]
+	adrp	x0, .LANCHOR164
+	ldr	w0, [x0, #:lo12:.LANCHOR164]
+	str	w0, [x2, 16]
+	adrp	x0, .LANCHOR163
+	ldr	w0, [x0, #:lo12:.LANCHOR163]
+	str	w0, [x2, 20]
+	adrp	x0, .LANCHOR166
+	ldr	w0, [x0, #:lo12:.LANCHOR166]
+	str	w0, [x2, 28]
+	adrp	x0, .LANCHOR78
+	ldr	w0, [x0, #:lo12:.LANCHOR78]
+	str	w0, [x2, 32]
+	adrp	x0, .LANCHOR161
+	ldr	w0, [x0, #:lo12:.LANCHOR161]
+	str	w0, [x2, 36]
+	adrp	x0, .LANCHOR162
+	ldr	w0, [x0, #:lo12:.LANCHOR162]
+	str	w0, [x2, 40]
+	adrp	x0, .LANCHOR167
+	ldr	w0, [x0, #:lo12:.LANCHOR167]
+	str	w0, [x2, 44]
+	adrp	x0, .LANCHOR168
+	ldr	w0, [x0, #:lo12:.LANCHOR168]
+	str	w0, [x2, 48]
+	adrp	x0, .LANCHOR156
+	ldr	w0, [x0, #:lo12:.LANCHOR156]
+	str	w0, [x2, 60]
+	adrp	x0, .LANCHOR155
+	ldr	w0, [x0, #:lo12:.LANCHOR155]
+	str	w0, [x2, 64]
+	mov	w0, 0
+	b	FtlVendorPartWrite
+.L1799:
+	ret
+	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
+	.section	.text.FtlEctTblFlush,"ax",@progbits
+	.align	2
+	.global	FtlEctTblFlush
+	.type	FtlEctTblFlush, %function
+FtlEctTblFlush:
+	adrp	x1, .LANCHOR101
+	ldr	w1, [x1, #:lo12:.LANCHOR101]
+	cbz	w1, .L1806
+	adrp	x1, .LANCHOR168
+	mov	w2, 4
+	ldr	w1, [x1, #:lo12:.LANCHOR168]
+	cmp	w1, 29
+	mov	w1, 32
+	csel	w1, w1, w2, hi
+.L1802:
+	adrp	x3, .LANCHOR218
+	ldrh	w2, [x3, #:lo12:.LANCHOR218]
+	cmp	w2, 31
+	bhi	.L1803
+	add	w2, w2, 1
+	mov	w1, 1
+	strh	w2, [x3, #:lo12:.LANCHOR218]
+.L1803:
+	adrp	x2, .LANCHOR188
+	cbnz	w0, .L1804
+	ldr	x0, [x2, #:lo12:.LANCHOR188]
+	ldr	w3, [x0, 20]
+	ldr	w0, [x0, 16]
+	add	w1, w1, w3
+	cmp	w0, w1
+	bcc	.L1809
+.L1804:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	ldr	x2, [x2, #:lo12:.LANCHOR188]
+	ldr	w0, [x2, 16]
+	str	w0, [x2, 20]
+	mov	w0, 17221
+	str	wzr, [x2, 4]
+	movk	w0, 0x4254, lsl 16
+	str	w0, [x2]
+	adrp	x0, .LANCHOR187
+	ldrh	w1, [x0, #:lo12:.LANCHOR187]
+	lsl	w0, w1, 9
+	str	w0, [x2, 12]
+	ldr	w0, [x2, 8]
+	add	w0, w0, 1
+	str	w0, [x2, 8]
+	mov	w0, 64
+	bl	FtlVendorPartWrite
+	bl	Ftl_save_ext_data
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+.L1806:
+	mov	w1, 32
+	b	.L1802
+.L1809:
+	mov	w0, 0
+	ret
+	.size	FtlEctTblFlush, .-FtlEctTblFlush
+	.section	.text.allocate_new_data_superblock,"ax",@progbits
+	.align	2
+	.global	allocate_new_data_superblock
+	.type	allocate_new_data_superblock, %function
+allocate_new_data_superblock:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	ldrh	w20, [x0]
+	adrp	x0, .LANCHOR38
+	str	x21, [sp, 32]
+	ldrh	w0, [x0, #:lo12:.LANCHOR38]
+	cmp	w0, w20
+	bcs	.L1812
+	mov	w2, 2943
+	adrp	x1, .LANCHOR219
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR219
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1812:
+	adrp	x0, .LANCHOR75
+	ldr	w0, [x0, #:lo12:.LANCHOR75]
+	cbnz	w0, .L1813
+	mov	w0, 65535
+	cmp	w20, w0
+	beq	.L1814
+	adrp	x1, .LANCHOR82
+	ubfiz	x0, x20, 1, 16
+	ldr	x1, [x1, #:lo12:.LANCHOR82]
+	ldrh	w0, [x1, x0]
+	cbz	w0, .L1815
+	mov	w0, w20
+	bl	INSERT_DATA_LIST
+.L1814:
+	strb	wzr, [x19, 8]
+	adrp	x0, .LANCHOR91
+	add	x0, x0, :lo12:.LANCHOR91
+	cmp	x19, x0
+	beq	.L1816
+	adrp	x0, .LANCHOR42
+	ldrh	w1, [x0, #:lo12:.LANCHOR42]
+	cmp	w1, 1
+	beq	.L1816
+	adrp	x0, .LANCHOR8
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	cbz	w0, .L1817
+.L1816:
+	mov	w0, 1
+	strb	w0, [x19, 8]
+.L1818:
+	adrp	x1, .LANCHOR130
+	mov	w2, 65535
+	mov	x21, x1
+	ldrh	w0, [x1, #:lo12:.LANCHOR130]
+	cmp	w0, w2
+	beq	.L1823
+	cmp	w20, w0
+	bne	.L1824
+	adrp	x2, .LANCHOR82
+	ubfiz	x1, x0, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR82]
+	ldrh	w1, [x2, x1]
+	cbz	w1, .L1825
+.L1824:
+	bl	update_vpc_list
+.L1825:
+	mov	w0, -1
+	strh	w0, [x21, #:lo12:.LANCHOR130]
+.L1823:
+	mov	x0, x19
+	bl	allocate_data_superblock
+	bl	l2p_flush
+	mov	w0, 0
+	bl	FtlEctTblFlush
+	bl	FtlVpcTblFlush
+.L1813:
+	mov	w0, 0
+	ldr	x21, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+.L1815:
+	mov	w0, w20
+	bl	INSERT_FREE_LIST
+	b	.L1814
+.L1817:
+	adrp	x0, .LANCHOR90
+	add	x2, x0, :lo12:.LANCHOR90
+	cmp	x19, x2
+	bne	.L1818
+	cmp	w1, 3
+	beq	.L1820
+	adrp	x1, .LANCHOR156
+	ldr	w1, [x1, #:lo12:.LANCHOR156]
+	cmp	w1, 1
+	bne	.L1821
+.L1820:
+	add	x1, x0, :lo12:.LANCHOR90
+	mov	w2, 1
+	strb	w2, [x1, 8]
+.L1821:
+	adrp	x1, .LANCHOR101
+	ldr	w1, [x1, #:lo12:.LANCHOR101]
+	cbz	w1, .L1818
+	adrp	x1, .LANCHOR168
+	ldr	w1, [x1, #:lo12:.LANCHOR168]
+	cmp	w1, 29
+	bhi	.L1818
+	add	x0, x0, :lo12:.LANCHOR90
+	mov	w1, 1
+	strb	w1, [x0, 8]
+	b	.L1818
+	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
+	.section	.text.FtlProgPages,"ax",@progbits
+	.align	2
+	.global	FtlProgPages
+	.type	FtlProgPages, %function
+FtlProgPages:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	adrp	x0, .LANCHOR8
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	mov	w21, w1
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	mov	x20, x3
+	str	x25, [sp, 64]
+	cbz	w0, .L1853
+	ldrb	w0, [x3, 8]
+	cmp	w0, 1
+	cset	w22, eq
+.L1840:
+	ldrb	w3, [x20, 9]
+	mov	w1, w21
+	mov	w2, w22
+	mov	x0, x19
+	adrp	x24, .LANCHOR51
+	adrp	x23, .LANCHOR136
+	add	x24, x24, :lo12:.LANCHOR51
+	add	x23, x23, :lo12:.LANCHOR136
+	bl	FlashProgPages
+	mov	w0, 56
+	umaddl	x21, w21, w0, x19
+.L1841:
+	cmp	x21, x19
+	beq	.L1850
+	adrp	x25, .LANCHOR82
+	b	.L1851
+.L1853:
+	mov	w22, 0
+	b	.L1840
+.L1844:
+	ldr	w0, [x19, 4]
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+	ldrh	w2, [x20]
+	cmp	w2, w0, uxth
+	bne	.L1842
+	ldr	x1, [x25, #:lo12:.LANCHOR82]
+	ubfiz	x2, x2, 1, 16
+	ldrh	w3, [x20, 4]
+	ldrh	w0, [x1, x2]
+	sub	w0, w0, w3
+	strh	w0, [x1, x2]
+	strb	wzr, [x20, 6]
+	ldrh	w0, [x24]
+	strh	w0, [x20, 2]
+	strh	wzr, [x20, 4]
+.L1842:
+	ldrh	w0, [x20, 4]
+	cbnz	w0, .L1843
+	mov	x0, x20
+	bl	allocate_new_data_superblock
+.L1843:
+	ldr	w0, [x23, 96]
+	add	w0, w0, 1
+	str	w0, [x23, 96]
+	ldr	w0, [x19, 4]
+	lsr	w0, w0, 10
+	bl	FtlGcMarkBadPhyBlk
+	mov	x0, x20
+	bl	get_new_active_ppa
+	str	w0, [x19, 4]
+	mov	w2, w22
+	str	w0, [x29, 92]
+	mov	w1, 1
+	ldrb	w3, [x20, 9]
+	mov	x0, x19
+	bl	FlashProgPages
+.L1851:
+	ldr	w0, [x19]
+	cmn	w0, #1
+	beq	.L1844
+	adrp	x0, .LANCHOR36
+	ldrb	w1, [x20, 6]
+	ldrh	w0, [x0, #:lo12:.LANCHOR36]
+	cmp	w1, w0
+	bcc	.L1845
+	mov	w2, 1552
+	adrp	x1, .LANCHOR220
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR220
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1845:
+	ldr	w0, [x19, 4]
+	cbnz	w22, .L1846
+.L1858:
+	str	w0, [x29, 92]
+	add	x1, x29, 92
+	ldr	w0, [x19, 24]
+	mov	w2, 1
+	bl	log2phys
+	ldr	x0, [x19, 16]
+	ldr	w3, [x0, 12]
+	lsr	w0, w3, 10
+	bl	P2V_block_in_plane
+	and	w1, w0, 65535
+	mov	w25, w1
+	cmn	w3, #1
+	beq	.L1848
+	adrp	x2, .LANCHOR82
+	ubfiz	x0, x1, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR82]
+	ldrh	w0, [x2, x0]
+	cbnz	w0, .L1849
+	adrp	x0, .LC38
+	mov	w2, 0
+	add	x0, x0, :lo12:.LC38
+	bl	printf
+.L1849:
+	mov	w0, w25
+	bl	decrement_vpc_count
+.L1848:
+	add	x19, x19, 56
+	b	.L1841
+.L1846:
+	orr	w0, w0, -2147483648
+	b	.L1858
+.L1850:
+	adrp	x0, .LANCHOR36
+	ldrb	w1, [x20, 6]
+	ldrh	w0, [x0, #:lo12:.LANCHOR36]
+	cmp	w1, w0
+	bcc	.L1839
+	mov	w2, 1569
+	adrp	x1, .LANCHOR220
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR220
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1839:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	ret
+	.size	FtlProgPages, .-FtlProgPages
+	.section	.text.FtlCacheWriteBack,"ax",@progbits
+	.align	2
+	.global	FtlCacheWriteBack
+	.type	FtlCacheWriteBack, %function
+FtlCacheWriteBack:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	adrp	x19, .LANCHOR129
+	ldr	x0, [x19, #:lo12:.LANCHOR129]
+	cbz	x0, .L1860
+	adrp	x1, .LANCHOR221
+	mov	w2, 0
+	ldr	x3, [x1, #:lo12:.LANCHOR221]
+	mov	w1, 1
+	bl	FtlProgPages
+	str	xzr, [x19, #:lo12:.LANCHOR129]
+.L1860:
+	mov	w0, 0
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
+	.section	.text.ftl_discard,"ax",@progbits
+	.align	2
+	.global	ftl_discard
+	.type	ftl_discard, %function
+ftl_discard:
+	stp	x29, x30, [sp, -80]!
+	adrp	x0, .LANCHOR67
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w20, w1
+	ldr	w0, [x0, #:lo12:.LANCHOR67]
+	add	w1, w1, w2
+	stp	x21, x22, [sp, 32]
+	str	x23, [sp, 48]
+	cmp	w1, w0
+	bhi	.L1873
+	mov	w19, w2
+	cmp	w2, 31
+	bhi	.L1867
+.L1881:
+	mov	w0, 0
+.L1865:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	ret
+.L1867:
+	adrp	x22, .LANCHOR54
+	bl	FtlCacheWriteBack
+	ldrh	w0, [x22, #:lo12:.LANCHOR54]
+	udiv	w21, w20, w0
+	msub	w20, w0, w21, w20
+	ands	w20, w20, 65535
+	beq	.L1868
+	sub	w0, w0, w20
+	add	w21, w21, 1
+	cmp	w0, w19
+	csel	w0, w0, w19, ls
+	sub	w19, w19, w0, uxth
+.L1868:
+	adrp	x20, .LANCHOR222
+	adrp	x23, .LANCHOR161
+	add	x20, x20, :lo12:.LANCHOR222
+	add	x23, x23, :lo12:.LANCHOR161
+	mov	w0, -1
+	str	w0, [x29, 76]
+.L1869:
+	ldrh	w0, [x22, #:lo12:.LANCHOR54]
+	cmp	w19, w0
+	bcs	.L1871
+	adrp	x0, .LANCHOR222
+	ldr	w1, [x0, #:lo12:.LANCHOR222]
+	cmp	w1, 32
+	bls	.L1881
+	str	wzr, [x0, #:lo12:.LANCHOR222]
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	b	.L1881
+.L1871:
+	mov	w2, 0
+	add	x1, x29, 72
+	mov	w0, w21
+	bl	log2phys
+	ldr	w0, [x29, 72]
+	cmn	w0, #1
+	beq	.L1870
+	ldr	w0, [x20]
+	mov	w2, 1
+	add	x1, x29, 76
+	add	w0, w0, 1
+	str	w0, [x20]
+	ldr	w0, [x23]
+	add	w0, w0, 1
+	str	w0, [x23]
+	mov	w0, w21
+	bl	log2phys
+	ldr	w0, [x29, 72]
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+	bl	decrement_vpc_count
+.L1870:
+	ldrh	w0, [x22, #:lo12:.LANCHOR54]
+	add	w21, w21, 1
+	sub	w19, w19, w0
+	b	.L1869
+.L1873:
+	mov	w0, -1
+	b	.L1865
+	.size	ftl_discard, .-ftl_discard
+	.section	.text.FtlSysFlush,"ax",@progbits
+	.align	2
+	.global	FtlSysFlush
+	.type	FtlSysFlush, %function
+FtlSysFlush:
+	adrp	x0, .LANCHOR75
+	ldr	w0, [x0, #:lo12:.LANCHOR75]
+	cbnz	w0, .L1885
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	bl	FtlCacheWriteBack
+	bl	l2p_flush
+	mov	w0, 1
+	bl	FtlEctTblFlush
+	bl	FtlVpcTblFlush
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+.L1885:
+	mov	w0, 0
+	ret
+	.size	FtlSysFlush, .-FtlSysFlush
+	.section	.text.FtlDeInit,"ax",@progbits
+	.align	2
+	.global	FtlDeInit
+	.type	FtlDeInit, %function
+FtlDeInit:
+	adrp	x0, .LANCHOR223
+	ldr	w0, [x0, #:lo12:.LANCHOR223]
+	cmp	w0, 1
+	bne	.L1891
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	bl	FtlSysFlush
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+.L1891:
+	mov	w0, 0
+	ret
+	.size	FtlDeInit, .-FtlDeInit
+	.section	.text.rk_ftl_de_init,"ax",@progbits
+	.align	2
+	.global	rk_ftl_de_init
+	.type	rk_ftl_de_init, %function
+rk_ftl_de_init:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	bl	FlashDeInit
+	bl	FtlDeInit
+	ldp	x29, x30, [sp], 16
+	b	FlashDeInit
+	.size	rk_ftl_de_init, .-rk_ftl_de_init
+	.section	.text.FtlVendorPartRead,"ax",@progbits
+	.align	2
+	.global	FtlVendorPartRead
+	.type	FtlVendorPartRead, %function
+FtlVendorPartRead:
+	stp	x29, x30, [sp, -176]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	mov	w22, w0
+	mov	w21, w1
+	add	w1, w0, w1
+	adrp	x0, .LANCHOR48
+	stp	x19, x20, [sp, 16]
+	stp	x23, x24, [sp, 48]
+	ldrh	w0, [x0, #:lo12:.LANCHOR48]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	cmp	w1, w0
+	bhi	.L1905
+	adrp	x0, .LANCHOR55
+	adrp	x26, .LANCHOR182
+	mov	x25, x2
+	mov	x28, x26
+	ldrh	w20, [x0, #:lo12:.LANCHOR55]
+	mov	w24, 0
+	adrp	x0, .LANCHOR54
+	add	x0, x0, :lo12:.LANCHOR54
+	str	x0, [x29, 104]
+	lsr	w20, w22, w20
+.L1898:
+	cbnz	w21, .L1904
+.L1896:
+	mov	w0, w24
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 176
+	ret
+.L1904:
+	adrp	x0, .LANCHOR191
+	ldr	x0, [x0, #:lo12:.LANCHOR191]
+	ldr	w3, [x0, w20, uxtw 2]
+	ldr	x0, [x29, 104]
+	ldrh	w19, [x0]
+	and	w0, w21, 65535
+	udiv	w23, w22, w19
+	msub	w23, w23, w19, w22
+	sub	w19, w19, w23
+	and	w19, w19, 65535
+	cmp	w21, w19
+	csel	w19, w0, w19, cc
+	lsl	w27, w19, 9
+	cbz	w3, .L1900
+	ldr	x0, [x26, #:lo12:.LANCHOR182]
+	mov	w2, 1
+	str	w3, [x29, 100]
+	mov	w1, w2
+	str	w3, [x29, 124]
+	stp	x0, xzr, [x29, 128]
+	add	x0, x29, 120
+	bl	FlashReadPages
+	ldr	w0, [x29, 120]
+	ldr	w3, [x29, 100]
+	cmn	w0, #1
+	adrp	x0, .LANCHOR199
+	csinv	w24, w24, wzr, ne
+	ldr	w0, [x0, #:lo12:.LANCHOR199]
+	cmp	w0, 256
+	bne	.L1902
+	mov	w2, w3
+	mov	w1, w20
+	adrp	x0, .LC39
+	add	x0, x0, :lo12:.LC39
+	bl	printf
+	ldr	x2, [x26, #:lo12:.LANCHOR182]
+	adrp	x0, .LANCHOR215
+	mov	w1, w20
+	add	x0, x0, :lo12:.LANCHOR215
+	bl	FtlMapWritePage
+.L1902:
+	ldr	x1, [x28, #:lo12:.LANCHOR182]
+	lsl	w23, w23, 7
+	mov	w2, w27
+	mov	x0, x25
+	add	x1, x1, x23, sxtw 2
+	bl	ftl_memcpy
+.L1903:
+	add	w20, w20, 1
+	sub	w21, w21, w19
+	add	w22, w22, w19
+	add	x25, x25, x27, sxtw
+	b	.L1898
+.L1900:
+	mov	w2, w27
+	mov	w1, 0
+	mov	x0, x25
+	bl	ftl_memset
+	b	.L1903
+.L1905:
+	mov	w24, -1
+	b	.L1896
+	.size	FtlVendorPartRead, .-FtlVendorPartRead
+	.section	.text.FtlLoadEctTbl,"ax",@progbits
+	.align	2
+	.global	FtlLoadEctTbl
+	.type	FtlLoadEctTbl, %function
+FtlLoadEctTbl:
+	stp	x29, x30, [sp, -32]!
+	mov	w0, 64
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR188
+	adrp	x20, .LANCHOR187
+	ldr	x2, [x19, #:lo12:.LANCHOR188]
+	ldrh	w1, [x20, #:lo12:.LANCHOR187]
+	bl	FtlVendorPartRead
+	ldr	x0, [x19, #:lo12:.LANCHOR188]
+	ldr	w1, [x0]
+	mov	w0, 17221
+	movk	w0, 0x4254, lsl 16
+	cmp	w1, w0
+	beq	.L1908
+	adrp	x1, .LC40
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC40
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+	ldr	x0, [x19, #:lo12:.LANCHOR188]
+	mov	w1, 0
+	ldrh	w2, [x20, #:lo12:.LANCHOR187]
+	lsl	w2, w2, 9
+	bl	ftl_memset
+.L1908:
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
+	.section	.text.Ftl_load_ext_data,"ax",@progbits
+	.align	2
+	.global	Ftl_load_ext_data
+	.type	Ftl_load_ext_data, %function
+Ftl_load_ext_data:
+	stp	x29, x30, [sp, -48]!
+	mov	w1, 1
+	mov	w0, 0
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR136
+	str	x21, [sp, 32]
+	add	x21, x19, :lo12:.LANCHOR136
+	mov	x2, x21
+	bl	FtlVendorPartRead
+	ldr	w0, [x19, #:lo12:.LANCHOR136]
+	mov	w20, 19539
+	movk	w20, 0x4654, lsl 16
+	cmp	w0, w20
+	beq	.L1911
+	mov	w2, 512
+	mov	w1, 0
+	mov	x0, x21
+	bl	ftl_memset
+	str	w20, [x19, #:lo12:.LANCHOR136]
+.L1911:
+	ldr	w1, [x19, #:lo12:.LANCHOR136]
+	add	x0, x19, :lo12:.LANCHOR136
+	cmp	w1, w20
+	adrp	x20, .LANCHOR166
+	bne	.L1912
+	adrp	x1, .LANCHOR216
+	ldr	w2, [x0, 88]
+	str	w2, [x1, #:lo12:.LANCHOR216]
+	adrp	x1, .LANCHOR217
+	ldr	w2, [x0, 92]
+	str	w2, [x1, #:lo12:.LANCHOR217]
+	adrp	x1, .LANCHOR159
+	ldr	w2, [x0, 8]
+	str	w2, [x1, #:lo12:.LANCHOR159]
+	adrp	x1, .LANCHOR160
+	ldr	w2, [x0, 12]
+	str	w2, [x1, #:lo12:.LANCHOR160]
+	adrp	x1, .LANCHOR164
+	ldr	w2, [x0, 16]
+	str	w2, [x1, #:lo12:.LANCHOR164]
+	adrp	x1, .LANCHOR163
+	ldr	w2, [x0, 20]
+	str	w2, [x1, #:lo12:.LANCHOR163]
+	ldp	w1, w2, [x0, 28]
+	str	w1, [x20, #:lo12:.LANCHOR166]
+	adrp	x1, .LANCHOR78
+	str	w2, [x1, #:lo12:.LANCHOR78]
+	adrp	x1, .LANCHOR161
+	ldr	w2, [x0, 36]
+	str	w2, [x1, #:lo12:.LANCHOR161]
+	adrp	x1, .LANCHOR162
+	ldr	w2, [x0, 40]
+	str	w2, [x1, #:lo12:.LANCHOR162]
+	adrp	x1, .LANCHOR167
+	ldr	w2, [x0, 44]
+	str	w2, [x1, #:lo12:.LANCHOR167]
+	adrp	x1, .LANCHOR168
+	ldr	w2, [x0, 48]
+	str	w2, [x1, #:lo12:.LANCHOR168]
+	ldr	w1, [x0, 60]
+	adrp	x0, .LANCHOR156
+	str	w1, [x0, #:lo12:.LANCHOR156]
+.L1912:
+	add	x19, x19, :lo12:.LANCHOR136
+	adrp	x0, .LANCHOR155
+	str	wzr, [x0, #:lo12:.LANCHOR155]
+	mov	w0, 34661
+	ldr	w1, [x19, 68]
+	movk	w0, 0x1234, lsl 16
+	cmp	w1, w0
+	bne	.L1913
+	adrp	x0, .LANCHOR101
+	mov	w1, 1
+	str	w1, [x0, #:lo12:.LANCHOR101]
+	adrp	x1, .LC41
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC41
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1913:
+	adrp	x1, .LANCHOR165
+	adrp	x0, .LANCHOR46
+	ldr	x21, [sp, 32]
+	ldr	w2, [x1, #:lo12:.LANCHOR165]
+	ldrh	w0, [x0, #:lo12:.LANCHOR46]
+	ldr	w1, [x20, #:lo12:.LANCHOR166]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	madd	w0, w0, w2, w1
+	adrp	x1, .LANCHOR38
+	ldrh	w1, [x1, #:lo12:.LANCHOR38]
+	udiv	w0, w0, w1
+	adrp	x1, .LANCHOR202
+	str	w0, [x1, #:lo12:.LANCHOR202]
+	ret
+	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
+	.section	.text.FtlMapBlkWriteDumpData,"ax",@progbits
+	.align	2
+	.global	FtlMapBlkWriteDumpData
+	.type	FtlMapBlkWriteDumpData, %function
+FtlMapBlkWriteDumpData:
+	ldr	w1, [x0, 56]
+	cbz	w1, .L1929
+	stp	x29, x30, [sp, -80]!
+	adrp	x1, .LANCHOR75
+	add	x29, sp, 0
+	ldr	w1, [x1, #:lo12:.LANCHOR75]
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	ldrh	w20, [x0, 6]
+	str	x25, [sp, 64]
+	str	wzr, [x0, 56]
+	ldr	x25, [x0, 40]
+	cbnz	w1, .L1915
+	mov	x19, x0
+	adrp	x0, .LANCHOR181
+	adrp	x23, .LANCHOR199
+	add	x21, x23, :lo12:.LANCHOR199
+	ldr	x0, [x0, #:lo12:.LANCHOR181]
+	mov	x22, x23
+	str	x0, [x21, 8]
+	adrp	x0, .LANCHOR185
+	ldr	x24, [x0, #:lo12:.LANCHOR185]
+	ldrh	w0, [x19, 2]
+	str	x24, [x21, 16]
+	cbz	w0, .L1919
+	adrp	x1, .LANCHOR52
+	ldrh	w1, [x1, #:lo12:.LANCHOR52]
+	sub	w1, w1, #1
+	cmp	w0, w1
+	bge	.L1919
+	ldrh	w1, [x19]
+	mov	w2, 65535
+	cmp	w1, w2
+	beq	.L1919
+	ldr	x2, [x19, 16]
+	ubfiz	x1, x1, 1, 16
+	sub	w0, w0, #1
+	ldrh	w1, [x2, x1]
+	mov	w2, 1
+	orr	w0, w0, w1, lsl 10
+	mov	w1, w2
+	str	w0, [x21, 4]
+	mov	x0, x21
+	bl	FlashReadPages
+	ldr	w0, [x23, #:lo12:.LANCHOR199]
+	cmn	w0, #1
+	beq	.L1919
+	ldrh	w1, [x24, 8]
+	ldr	x2, [x19, 40]
+	ubfiz	x0, x1, 2, 16
+	ldr	w2, [x2, x0]
+	ldr	w0, [x21, 4]
+	cmp	w2, w0
+	bne	.L1919
+	ldr	x2, [x21, 8]
+.L1932:
+	mov	x0, x19
+	ldr	x25, [sp, 64]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	b	FtlMapWritePage
+.L1919:
+	sub	w20, w20, #1
+	and	w20, w20, 65535
+	ubfiz	x0, x20, 2, 16
+	ldr	w1, [x25, x0]
+	add	x0, x22, :lo12:.LANCHOR199
+	str	w1, [x0, 4]
+	cbz	w1, .L1920
+	mov	w2, 1
+	mov	w1, w2
+	bl	FlashReadPages
+.L1921:
+	add	x22, x22, :lo12:.LANCHOR199
+	mov	w1, w20
+	ldr	x2, [x22, 8]
+	b	.L1932
+.L1920:
+	adrp	x1, .LANCHOR56
+	ldr	x0, [x0, 8]
+	ldrh	w2, [x1, #:lo12:.LANCHOR56]
+	mov	w1, 255
+	bl	ftl_memset
+	b	.L1921
+.L1915:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L1929:
+	ret
+	.size	FtlMapBlkWriteDumpData, .-FtlMapBlkWriteDumpData
+	.section	.text.FtlScanSysBlk,"ax",@progbits
+	.align	2
+	.global	FtlScanSysBlk
+	.type	FtlScanSysBlk, %function
+FtlScanSysBlk:
+	stp	x29, x30, [sp, -176]!
+	mov	w1, 0
+	add	x29, sp, 0
+	stp	x25, x26, [sp, 64]
+	adrp	x25, .LANCHOR127
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR63
+	ldr	x0, [x25, #:lo12:.LANCHOR127]
+	adrp	x22, .LANCHOR190
+	ldr	w2, [x21, #:lo12:.LANCHOR63]
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR125
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR69
+	stp	x27, x28, [sp, 80]
+	adrp	x27, .LANCHOR126
+	lsl	w2, w2, 2
+	strh	wzr, [x20, #:lo12:.LANCHOR125]
+	strh	wzr, [x23, #:lo12:.LANCHOR69]
+	bl	ftl_memset
+	ldr	x0, [x27, #:lo12:.LANCHOR126]
+	mov	w1, 0
+	ldr	w2, [x21, #:lo12:.LANCHOR63]
+	adrp	x19, .LANCHOR60
+	adrp	x28, .LANCHOR70
+	adrp	x24, .LANCHOR206
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	ldr	x0, [x22, #:lo12:.LANCHOR190]
+	mov	w1, 0
+	ldrh	w2, [x19, #:lo12:.LANCHOR60]
+	lsl	w2, w2, 2
+	bl	ftl_memset
+	ldr	x0, [x28, #:lo12:.LANCHOR70]
+	mov	w1, 0
+	ldrh	w2, [x19, #:lo12:.LANCHOR60]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	mov	w2, 12
+	mov	w1, 255
+	add	x0, x24, :lo12:.LANCHOR206
+	bl	ftl_memset
+	adrp	x0, .LANCHOR38
+	stp	x22, x25, [x29, 144]
+	str	x27, [x29, 160]
+	ldrh	w0, [x0, #:lo12:.LANCHOR38]
+	str	w0, [x29, 172]
+	adrp	x0, .LANCHOR39
+	add	x0, x0, :lo12:.LANCHOR39
+	str	x0, [x29, 120]
+	adrp	x0, .LANCHOR157
+	add	x0, x0, :lo12:.LANCHOR157
+	str	x0, [x29, 112]
+.L1934:
+	ldr	x0, [x29, 120]
+	ldr	w1, [x29, 172]
+	ldrh	w0, [x0]
+	cmp	w0, w1
+	bls	.L1975
+	adrp	x0, .LANCHOR36
+	adrp	x25, .LANCHOR178
+	adrp	x6, .LANCHOR45
+	mov	x5, 0
+	ldrh	w13, [x0, #:lo12:.LANCHOR36]
+	adrp	x0, .LANCHOR104
+	ldr	x7, [x25, #:lo12:.LANCHOR178]
+	mov	w22, 0
+	ldr	x12, [x0, #:lo12:.LANCHOR104]
+	adrp	x0, .LANCHOR105
+	add	x6, x6, :lo12:.LANCHOR45
+	mov	w8, 56
+	ldr	x11, [x0, #:lo12:.LANCHOR105]
+	adrp	x0, .LANCHOR57
+	ldrh	w10, [x0, #:lo12:.LANCHOR57]
+	b	.L1976
+.L1936:
+	ldrh	w1, [x29, 172]
+	ldrb	w0, [x6, x5]
+	bl	V2P_block
+	and	w4, w0, 65535
+	bl	FtlBbmIsBadBlock
+	cbnz	w0, .L1935
+	umaddl	x1, w22, w8, x7
+	lsl	w4, w4, 10
+	mul	w0, w22, w10
+	add	w22, w22, 1
+	and	w22, w22, 65535
+	asr	w0, w0, 2
+	str	w4, [x1, 4]
+	add	x0, x11, x0, sxtw 2
+	stp	x12, x0, [x1, 8]
+.L1935:
+	add	x5, x5, 1
+.L1976:
+	cmp	w13, w5, uxth
+	bhi	.L1936
+	cbnz	w22, .L1937
+.L1974:
+	ldr	w0, [x29, 172]
+	add	w26, w0, 1
+	and	w0, w26, 65535
+	str	w0, [x29, 172]
+	b	.L1934
+.L1937:
+	mov	w1, w22
+	mov	w2, 1
+	mov	x0, x7
+	bl	FlashReadPages
+	mov	w0, 56
+	umull	x0, w22, w0
+	mov	x22, 0
+	str	x0, [x29, 128]
+	adrp	x0, .LANCHOR224
+	add	x0, x0, :lo12:.LANCHOR224
+	str	x0, [x29, 136]
+.L1973:
+	ldr	x0, [x25, #:lo12:.LANCHOR178]
+	add	x1, x0, x22
+	ldr	w0, [x0, x22]
+	ldr	w3, [x1, 4]
+	cmn	w0, #1
+	ldr	x27, [x1, 16]
+	ubfx	x26, x3, 10, 16
+	bne	.L1940
+	mov	w5, 16
+	mov	w7, 65535
+.L1942:
+	ldr	x0, [x25, #:lo12:.LANCHOR178]
+	add	x6, x25, :lo12:.LANCHOR178
+	mov	w2, 1
+	str	w7, [x29, 100]
+	add	x0, x0, x22
+	str	x6, [x29, 104]
+	str	w5, [x29, 168]
+	ldr	w1, [x0, 4]
+	add	w1, w1, 1
+	str	w1, [x0, 4]
+	mov	w1, w2
+	bl	FlashReadPages
+	ldrh	w0, [x27]
+	ldr	w7, [x29, 100]
+	ldr	w5, [x29, 168]
+	cmp	w0, w7
+	ldr	x6, [x29, 104]
+	bne	.L1939
+	ldr	x0, [x6]
+	mov	w1, -1
+	str	w1, [x0, x22]
+	ldr	x0, [x6]
+	ldr	w0, [x0, x22]
+	cmp	w0, w1
+	beq	.L2012
+.L1940:
+	adrp	x0, .LANCHOR157
+	ldr	w1, [x0, #:lo12:.LANCHOR157]
+	ldr	w0, [x27, 4]
+	cmn	w1, #1
+	beq	.L1943
+	cmp	w1, w0
+	bhi	.L1944
+.L1943:
+	cmn	w0, #1
+	beq	.L1944
+	ldr	x2, [x29, 112]
+	add	w1, w0, 1
+	str	w1, [x2]
+.L1944:
+	ldrh	w1, [x27]
+	mov	w2, 61604
+	cmp	w1, w2
+	beq	.L1946
+	bhi	.L1947
+	mov	w0, 61574
+	cmp	w1, w0
+	beq	.L1948
+.L1945:
+	ldr	x0, [x29, 128]
+	add	x22, x22, 56
+	cmp	x0, x22
+	bne	.L1973
+	b	.L1974
+.L1939:
+	ldr	x0, [x25, #:lo12:.LANCHOR178]
+	ldr	w0, [x0, x22]
+	cmn	w0, #1
+	bne	.L1940
+	sub	w5, w5, #1
+	ands	w5, w5, 65535
+	bne	.L1942
+.L2012:
+	mov	w1, 0
+	mov	w0, w26
+	bl	FtlFreeSysBlkQueueIn
+	b	.L1945
+.L1947:
+	mov	w0, 61634
+	cmp	w1, w0
+	beq	.L1949
+	mov	w0, 65535
+	cmp	w1, w0
+	beq	.L2012
+	b	.L1945
+.L1949:
+	ldrh	w1, [x20, #:lo12:.LANCHOR125]
+	ldr	w0, [x21, #:lo12:.LANCHOR63]
+	cmp	w1, w0
+	bls	.L1951
+	ldr	x1, [x29, 136]
+	mov	w2, 1269
+	adrp	x0, .LC4
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1951:
+	ldr	w6, [x21, #:lo12:.LANCHOR63]
+	ldr	x3, [x29, 152]
+	ldrh	w1, [x20, #:lo12:.LANCHOR125]
+	and	w2, w6, 65535
+	sub	w0, w2, #1
+	sub	w2, w2, w1
+	sxth	x0, w0
+	sub	w2, w2, #1
+	ldr	x5, [x3, #:lo12:.LANCHOR127]
+	sxth	w2, w2
+.L1952:
+	cmp	w0, w2
+	bgt	.L1958
+	tbz	w0, #31, .L1993
+	b	.L1945
+.L1958:
+	sxtw	x8, w0
+	ldr	w11, [x27, 4]
+	lsl	x7, x8, 2
+	add	x10, x5, x7
+	ldr	w7, [x5, x7]
+	cmp	w11, w7
+	bls	.L1953
+	ldr	w2, [x5]
+	cbnz	w2, .L1954
+	cmp	w6, w1
+	beq	.L1954
+	add	w1, w1, 1
+	strh	w1, [x20, #:lo12:.LANCHOR125]
+.L1954:
+	ldr	x1, [x29, 160]
+	ldr	x6, [x1, #:lo12:.LANCHOR126]
+	mov	w1, 0
+.L1955:
+	cmp	w1, w0
+	bne	.L1956
+	ldr	w1, [x27, 4]
+	str	w1, [x10]
+	strh	w26, [x6, x8, lsl 1]
+	tbnz	w0, #31, .L1945
+	ldrh	w1, [x20, #:lo12:.LANCHOR125]
+	ldr	w2, [x21, #:lo12:.LANCHOR63]
+	sub	w2, w2, w1
+	sub	w2, w2, #1
+	cmp	w0, w2, sxth
+	bgt	.L1945
+.L1993:
+	add	w1, w1, 1
+	strh	w1, [x20, #:lo12:.LANCHOR125]
+	ldr	w1, [x27, 4]
+	str	w1, [x5, x0, lsl 2]
+	ldr	x1, [x29, 160]
+	ldr	x1, [x1, #:lo12:.LANCHOR126]
+.L2011:
+	strh	w26, [x1, x0, lsl 1]
+	b	.L1945
+.L1956:
+	sxtw	x2, w1
+	add	w1, w1, 1
+	lsl	x7, x2, 2
+	lsl	x2, x2, 1
+	add	x11, x5, x7
+	sxth	w1, w1
+	ldr	w11, [x11, 4]
+	str	w11, [x5, x7]
+	add	x7, x6, x2
+	ldrh	w7, [x7, 2]
+	strh	w7, [x6, x2]
+	b	.L1955
+.L1953:
+	sub	w0, w0, #1
+	sxth	x0, w0
+	b	.L1952
+.L1948:
+	ldrh	w1, [x23, #:lo12:.LANCHOR69]
+	ldrh	w0, [x19, #:lo12:.LANCHOR60]
+	cmp	w1, w0
+	bls	.L1961
+	ldr	x1, [x29, 136]
+	mov	w2, 1316
+	adrp	x0, .LC4
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1961:
+	ldrh	w6, [x19, #:lo12:.LANCHOR60]
+	ldrh	w2, [x23, #:lo12:.LANCHOR69]
+	sub	w1, w6, #1
+	sxth	x0, w1
+	sub	w5, w1, w2
+	ldr	x1, [x29, 144]
+	ldr	x1, [x1, #:lo12:.LANCHOR190]
+.L1962:
+	cmp	w0, w5
+	ble	.L1967
+	sxtw	x7, w0
+	ldr	w11, [x27, 4]
+	lsl	x8, x7, 2
+	add	x10, x1, x8
+	ldr	w8, [x1, x8]
+	cmp	w11, w8
+	bls	.L1963
+	ldr	w5, [x1]
+	cbnz	w5, .L1964
+	cmp	w6, w2
+	beq	.L1964
+	add	w2, w2, 1
+	strh	w2, [x23, #:lo12:.LANCHOR69]
+.L1964:
+	ldr	x6, [x28, #:lo12:.LANCHOR70]
+	mov	w2, 0
+.L1965:
+	cmp	w2, w0
+	bne	.L1966
+	ldr	w2, [x27, 4]
+	str	w2, [x10]
+	strh	w26, [x6, x7, lsl 1]
+.L1967:
+	tbnz	w0, #31, .L1945
+	ldrh	w2, [x19, #:lo12:.LANCHOR60]
+	ldrh	w5, [x23, #:lo12:.LANCHOR69]
+	sub	w2, w2, #1
+	sub	w2, w2, w5
+	cmp	w0, w2, sxth
+	bgt	.L1945
+	add	w5, w5, 1
+	ldr	w2, [x27, 4]
+	strh	w5, [x23, #:lo12:.LANCHOR69]
+	str	w2, [x1, x0, lsl 2]
+	ldr	x1, [x28, #:lo12:.LANCHOR70]
+	b	.L2011
+.L1966:
+	sxtw	x5, w2
+	add	w2, w2, 1
+	lsl	x8, x5, 2
+	lsl	x5, x5, 1
+	add	x11, x1, x8
+	sxth	w2, w2
+	ldr	w11, [x11, 4]
+	str	w11, [x1, x8]
+	add	x8, x6, x5
+	ldrh	w8, [x8, 2]
+	strh	w8, [x6, x5]
+	b	.L1965
+.L1963:
+	sub	w0, w0, #1
+	sxth	x0, w0
+	b	.L1962
+.L1946:
+	ldrh	w5, [x24, #:lo12:.LANCHOR206]
+	mov	w1, 65535
+	add	x2, x24, :lo12:.LANCHOR206
+	cmp	w5, w1
+	bne	.L1969
+	strh	w26, [x24, #:lo12:.LANCHOR206]
+	str	w0, [x2, 8]
+	b	.L1945
+.L1969:
+	ldrh	w0, [x2, 4]
+	cmp	w0, w1
+	beq	.L1970
+	mov	w1, 1
+	bl	FtlFreeSysBlkQueueIn
+.L1970:
+	add	x0, x24, :lo12:.LANCHOR206
+	ldr	w1, [x27, 4]
+	ldr	w2, [x0, 8]
+	cmp	w2, w1
+	bcs	.L1971
+	ldrh	w2, [x24, #:lo12:.LANCHOR206]
+	strh	w2, [x0, 4]
+	strh	w26, [x24, #:lo12:.LANCHOR206]
+	str	w1, [x0, 8]
+	b	.L1945
+.L1971:
+	strh	w26, [x0, 4]
+	b	.L1945
+.L1975:
+	ldr	x0, [x29, 160]
+	ldr	x2, [x0, #:lo12:.LANCHOR126]
+	ldrh	w0, [x2]
+	cbz	w0, .L1977
+.L1980:
+	ldr	x1, [x28, #:lo12:.LANCHOR70]
+	ldrh	w0, [x1]
+	cbz	w0, .L1978
+.L1979:
+	ldrh	w1, [x20, #:lo12:.LANCHOR125]
+	ldr	w0, [x21, #:lo12:.LANCHOR63]
+	cmp	w1, w0
+	bls	.L2009
+	mov	w2, 1450
+	adrp	x1, .LANCHOR224
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR224
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L2009:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 176
+	ret
+.L1977:
+	ldrh	w0, [x20, #:lo12:.LANCHOR125]
+	cbz	w0, .L1980
+	ldr	w1, [x21, #:lo12:.LANCHOR63]
+	mov	w0, 0
+.L1981:
+	cmp	w0, w1
+	bcs	.L1980
+	ldrh	w3, [x2, w0, sxtw 1]
+	cbz	w3, .L1982
+	ldr	x1, [x29, 152]
+	add	x7, x21, :lo12:.LANCHOR63
+	ldr	x4, [x1, #:lo12:.LANCHOR127]
+	mov	w1, w0
+.L1983:
+	ldr	w3, [x7]
+	cmp	w1, w3
+	bcs	.L1980
+	sxtw	x6, w1
+	sub	w3, w1, w0
+	lsl	x5, x6, 1
+	sxtw	x3, w3
+	add	w1, w1, 1
+	ldr	w6, [x4, x6, lsl 2]
+	sxth	w1, w1
+	ldrh	w8, [x2, x5]
+	strh	w8, [x2, x3, lsl 1]
+	str	w6, [x4, x3, lsl 2]
+	strh	wzr, [x2, x5]
+	b	.L1983
+.L1982:
+	add	w0, w0, 1
+	sxth	w0, w0
+	b	.L1981
+.L1978:
+	ldrh	w0, [x23, #:lo12:.LANCHOR69]
+	cbz	w0, .L1979
+	ldrh	w2, [x19, #:lo12:.LANCHOR60]
+	mov	w0, 0
+.L1988:
+	mov	w6, w0
+	cmp	w0, w2
+	bge	.L1979
+	ldrh	w3, [x1, w0, sxtw 1]
+	cbz	w3, .L1989
+	ldr	x2, [x29, 144]
+	add	x19, x19, :lo12:.LANCHOR60
+	ldr	x3, [x2, #:lo12:.LANCHOR190]
+.L1990:
+	ldrh	w2, [x19]
+	cmp	w0, w2
+	bge	.L1979
+	sxtw	x5, w0
+	sub	w2, w0, w6
+	lsl	x4, x5, 1
+	sxtw	x2, w2
+	add	w0, w0, 1
+	ldr	w5, [x3, x5, lsl 2]
+	sxth	w0, w0
+	ldrh	w7, [x1, x4]
+	strh	w7, [x1, x2, lsl 1]
+	str	w5, [x3, x2, lsl 2]
+	strh	wzr, [x1, x4]
+	b	.L1990
+.L1989:
+	add	w0, w0, 1
+	sxth	w0, w0
+	b	.L1988
+	.size	FtlScanSysBlk, .-FtlScanSysBlk
+	.section	.text.FtlLoadSysInfo,"ax",@progbits
+	.align	2
+	.global	FtlLoadSysInfo
+	.type	FtlLoadSysInfo, %function
+FtlLoadSysInfo:
+	stp	x29, x30, [sp, -96]!
+	mov	w1, 0
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR206
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR199
+	stp	x25, x26, [sp, 64]
+	add	x19, x23, :lo12:.LANCHOR199
+	adrp	x25, .LANCHOR185
+	adrp	x24, .LANCHOR82
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR38
+	ldr	x0, [x25, #:lo12:.LANCHOR185]
+	stp	x27, x28, [sp, 80]
+	stp	xzr, x0, [x19, 8]
+	ldr	x0, [x24, #:lo12:.LANCHOR82]
+	ldrh	w2, [x21, #:lo12:.LANCHOR38]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	ldrh	w0, [x20, #:lo12:.LANCHOR206]
+	mov	w1, 65535
+	cmp	w0, w1
+	bne	.L2014
+.L2023:
+	mov	w0, -1
+.L2013:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	ret
+.L2014:
+	add	x26, x20, :lo12:.LANCHOR206
+	mov	w27, 19539
+	mov	w1, 1
+	movk	w27, 0x4654, lsl 16
+	bl	FtlGetLastWrittenPage
+	mov	w28, 61604
+	sxth	w22, w0
+	add	w0, w0, 1
+	strh	w0, [x26, 2]
+	adrp	x26, .LANCHOR79
+.L2016:
+	tbz	w22, #31, .L2019
+	mov	w2, 1510
+	adrp	x1, .LANCHOR225
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR225
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L2018:
+	adrp	x1, .LANCHOR56
+	ldrh	w0, [x21, #:lo12:.LANCHOR38]
+	ldrh	w1, [x1, #:lo12:.LANCHOR56]
+	add	x0, x0, 24
+	cmp	x1, x0, lsl 1
+	bcs	.L2021
+	mov	w2, 1512
+	adrp	x1, .LANCHOR225
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR225
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L2021:
+	add	x23, x23, :lo12:.LANCHOR199
+	mov	w2, 48
+	adrp	x19, .LANCHOR135
+	add	x0, x19, :lo12:.LANCHOR135
+	ldr	x1, [x23, 8]
+	bl	ftl_memcpy
+	ldr	x0, [x24, #:lo12:.LANCHOR82]
+	ldrh	w2, [x21, #:lo12:.LANCHOR38]
+	ldr	x1, [x23, 8]
+	lsl	w2, w2, 1
+	add	x1, x1, 48
+	bl	ftl_memcpy
+	ldrh	w1, [x21, #:lo12:.LANCHOR38]
+	ldr	x0, [x23, 8]
+	lsr	w2, w1, 3
+	ubfiz	x1, x1, 1, 16
+	add	x1, x1, 48
+	add	w2, w2, 4
+	and	x1, x1, -4
+	add	x1, x0, x1
+	adrp	x0, .LANCHOR0
+	ldr	x0, [x0, #:lo12:.LANCHOR0]
+	bl	ftl_memcpy
+	adrp	x0, .LANCHOR68
+	ldrh	w0, [x0, #:lo12:.LANCHOR68]
+	cbz	w0, .L2022
+	ldrh	w1, [x21, #:lo12:.LANCHOR38]
+	adrp	x0, .LANCHOR65
+	ldrh	w2, [x0, #:lo12:.LANCHOR65]
+	lsr	w0, w1, 3
+	add	w1, w0, w1, lsl 1
+	ldr	x0, [x23, 8]
+	add	w1, w1, 52
+	lsl	w2, w2, 2
+	and	x1, x1, 65532
+	add	x1, x0, x1
+	adrp	x0, .LANCHOR192
+	ldr	x0, [x0, #:lo12:.LANCHOR192]
+	bl	ftl_memcpy
+.L2022:
+	ldr	w2, [x19, #:lo12:.LANCHOR135]
+	mov	w1, 19539
+	movk	w1, 0x4654, lsl 16
+	add	x0, x19, :lo12:.LANCHOR135
+	cmp	w2, w1
+	bne	.L2023
+	add	x20, x20, :lo12:.LANCHOR206
+	ldrh	w1, [x0, 8]
+	ldrb	w2, [x0, 10]
+	adrp	x0, .LANCHOR43
+	strh	w1, [x20, 6]
+	ldrh	w0, [x0, #:lo12:.LANCHOR43]
+	cmp	w2, w0
+	bne	.L2023
+	adrp	x0, .LANCHOR226
+	adrp	x2, .LANCHOR71
+	adrp	x3, .LANCHOR36
+	str	w1, [x0, #:lo12:.LANCHOR226]
+	adrp	x0, .LANCHOR51
+	ldrh	w3, [x3, #:lo12:.LANCHOR36]
+	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+	mul	w0, w0, w1
+	str	w0, [x2, #:lo12:.LANCHOR71]
+	adrp	x2, .LANCHOR54
+	ldrh	w2, [x2, #:lo12:.LANCHOR54]
+	mul	w0, w2, w0
+	adrp	x2, .LANCHOR67
+	str	w0, [x2, #:lo12:.LANCHOR67]
+	adrp	x0, .LANCHOR40
+	ldr	w2, [x0, #:lo12:.LANCHOR40]
+	adrp	x0, .LANCHOR73+6
+	ldrh	w0, [x0, #:lo12:.LANCHOR73+6]
+	cmp	w1, w2
+	sub	w0, w2, w0
+	sub	w0, w0, w1
+	udiv	w0, w0, w3
+	adrp	x3, .LANCHOR227
+	strh	w0, [x3, #:lo12:.LANCHOR227]
+	bls	.L2024
+	mov	w2, 1539
+	adrp	x1, .LANCHOR225
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR225
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L2024:
+	add	x1, x19, :lo12:.LANCHOR135
+	adrp	x0, .LANCHOR90
+	add	x3, x0, :lo12:.LANCHOR90
+	adrp	x5, .LANCHOR201
+	mov	x22, x5
+	ldrh	w2, [x1, 16]
+	ldrh	w7, [x1, 14]
+	strh	w7, [x0, #:lo12:.LANCHOR90]
+	lsr	w4, w2, 6
+	and	w2, w2, 63
+	strb	w2, [x3, 6]
+	ldrb	w2, [x1, 11]
+	strb	w2, [x3, 8]
+	add	x2, x5, :lo12:.LANCHOR201
+	strh	w4, [x3, 2]
+	mov	w3, -1
+	strh	w3, [x5, #:lo12:.LANCHOR201]
+	strh	wzr, [x2, 2]
+	strb	wzr, [x2, 6]
+	strb	wzr, [x2, 8]
+	adrp	x2, .LANCHOR91
+	ldrh	w3, [x1, 18]
+	add	x4, x2, :lo12:.LANCHOR91
+	strh	w3, [x2, #:lo12:.LANCHOR91]
+	mov	x20, x2
+	ldrh	w3, [x1, 20]
+	lsr	w6, w3, 6
+	and	w3, w3, 63
+	strb	w3, [x4, 6]
+	ldrb	w3, [x1, 12]
+	strh	w6, [x4, 2]
+	strb	w3, [x4, 8]
+	adrp	x4, .LANCHOR92
+	ldrh	w3, [x1, 22]
+	add	x6, x4, :lo12:.LANCHOR92
+	strh	w3, [x4, #:lo12:.LANCHOR92]
+	mov	x21, x4
+	ldrh	w3, [x1, 24]
+	lsr	w8, w3, 6
+	and	w3, w3, 63
+	strb	w3, [x6, 6]
+	ldrb	w3, [x1, 13]
+	strb	w3, [x6, 8]
+	adrp	x3, .LANCHOR159
+	strh	w8, [x6, 2]
+	ldr	w6, [x1, 32]
+	str	wzr, [x3, #:lo12:.LANCHOR159]
+	adrp	x3, .LANCHOR160
+	str	wzr, [x3, #:lo12:.LANCHOR160]
+	adrp	x3, .LANCHOR164
+	str	wzr, [x3, #:lo12:.LANCHOR164]
+	adrp	x3, .LANCHOR163
+	str	wzr, [x3, #:lo12:.LANCHOR163]
+	adrp	x3, .LANCHOR165
+	str	w6, [x3, #:lo12:.LANCHOR165]
+	adrp	x3, .LANCHOR166
+	str	wzr, [x3, #:lo12:.LANCHOR166]
+	adrp	x3, .LANCHOR167
+	str	wzr, [x3, #:lo12:.LANCHOR167]
+	adrp	x3, .LANCHOR162
+	str	wzr, [x3, #:lo12:.LANCHOR162]
+	ldr	w3, [x1, 40]
+	adrp	x1, .LANCHOR157
+	ldr	w6, [x1, #:lo12:.LANCHOR157]
+	cmp	w3, w6
+	bls	.L2025
+	str	w3, [x1, #:lo12:.LANCHOR157]
+.L2025:
+	add	x19, x19, :lo12:.LANCHOR135
+	adrp	x1, .LANCHOR158
+	ldr	w3, [x1, #:lo12:.LANCHOR158]
+	ldr	w2, [x19, 36]
+	cmp	w2, w3
+	bls	.L2026
+	str	w2, [x1, #:lo12:.LANCHOR158]
+.L2026:
+	mov	w1, 65535
+	cmp	w7, w1
+	beq	.L2027
+	add	x0, x0, :lo12:.LANCHOR90
+	bl	make_superblock
+.L2027:
+	ldrh	w2, [x20, #:lo12:.LANCHOR91]
+	mov	w1, 65535
+	add	x0, x20, :lo12:.LANCHOR91
+	cmp	w2, w1
+	beq	.L2028
+	bl	make_superblock
+.L2028:
+	ldrh	w2, [x21, #:lo12:.LANCHOR92]
+	mov	w1, 65535
+	add	x0, x21, :lo12:.LANCHOR92
+	cmp	w2, w1
+	beq	.L2029
+	bl	make_superblock
+.L2029:
+	ldrh	w2, [x22, #:lo12:.LANCHOR201]
+	mov	w1, 65535
+	add	x0, x22, :lo12:.LANCHOR201
+	cmp	w2, w1
+	beq	.L2030
+	bl	make_superblock
+.L2030:
+	mov	w0, 0
+	b	.L2013
+.L2019:
+	ldrh	w0, [x20, #:lo12:.LANCHOR206]
+	mov	w2, 1
+	mov	w1, w2
+	orr	w0, w22, w0, lsl 10
+	str	w0, [x19, 4]
+	ldr	x0, [x26, #:lo12:.LANCHOR79]
+	str	x0, [x19, 8]
+	mov	x0, x19
+	bl	FlashReadPages
+	ldr	w0, [x19]
+	cmn	w0, #1
+	beq	.L2017
+	ldr	x0, [x26, #:lo12:.LANCHOR79]
+	ldr	w0, [x0]
+	cmp	w0, w27
+	bne	.L2017
+	ldr	x0, [x25, #:lo12:.LANCHOR185]
+	ldrh	w0, [x0]
+	cmp	w0, w28
+	beq	.L2018
+.L2017:
+	sub	w22, w22, #1
+	sxth	w22, w22
+	b	.L2016
+	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
+	.section	.text.FtlMapTblRecovery,"ax",@progbits
+	.align	2
+	.global	FtlMapTblRecovery
+	.type	FtlMapTblRecovery, %function
+FtlMapTblRecovery:
+	stp	x29, x30, [sp, -160]!
+	mov	w1, 0
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR79
+	stp	x23, x24, [sp, 48]
+	adrp	x20, .LANCHOR199
+	ldrh	w23, [x0, 6]
+	ldr	x22, [x0, 40]
+	ldr	x0, [x0, 16]
+	str	x0, [x29, 152]
+	lsl	w2, w23, 2
+	ldr	x0, [x19, 24]
+	str	x0, [x29, 136]
+	ldrh	w0, [x19, 8]
+	stp	x25, x26, [sp, 64]
+	adrp	x25, .LANCHOR52
+	stp	x27, x28, [sp, 80]
+	mov	w26, 0
+	str	w0, [x29, 144]
+	mov	x0, x22
+	bl	ftl_memset
+	stp	wzr, wzr, [x19, 48]
+	add	x3, x20, :lo12:.LANCHOR199
+	ldr	x0, [x21, #:lo12:.LANCHOR79]
+	mov	w1, -1
+	mov	x24, x3
+	str	x0, [x3, 8]
+	adrp	x0, .LANCHOR185
+	str	x0, [x29, 128]
+	ldr	x27, [x0, #:lo12:.LANCHOR185]
+	ldr	w0, [x29, 144]
+	str	x27, [x3, 16]
+	sub	w0, w0, #1
+	strh	w1, [x19]
+	strh	w1, [x19, 2]
+	mov	w1, 1
+	str	w0, [x29, 120]
+	add	x0, x25, :lo12:.LANCHOR52
+	str	w1, [x19, 56]
+	str	x0, [x29, 112]
+.L2040:
+	ldr	w0, [x29, 144]
+	cmp	w26, w0
+	bge	.L2058
+	ldr	w0, [x29, 120]
+	sxtw	x28, w26
+	cmp	w26, w0
+	bne	.L2041
+	ldr	x2, [x29, 152]
+	lsl	x0, x28, 1
+	ldr	x1, [x29, 152]
+	mov	w25, 0
+	add	x24, x1, x0
+	mov	w1, 1
+	ldrh	w0, [x2, x0]
+	bl	FtlGetLastWrittenPage
+	sxth	w3, w0
+	add	w0, w0, 1
+	strh	w0, [x19, 2]
+	ldr	x0, [x29, 136]
+	strh	w26, [x19]
+	add	x26, x20, :lo12:.LANCHOR199
+	ldr	w0, [x0, x28, lsl 2]
+	str	w0, [x19, 48]
+.L2042:
+	cmp	w25, w3
+	ble	.L2045
+.L2058:
+	adrp	x23, .LANCHOR124
+	str	x23, [x29, 136]
+	add	x0, x23, :lo12:.LANCHOR124
+	cmp	x19, x0
+	bne	.L2047
+	adrp	x0, .LANCHOR68
+	ldrh	w0, [x0, #:lo12:.LANCHOR68]
+	cbz	w0, .L2047
+	adrp	x26, .LANCHOR125
+	add	x27, x26, :lo12:.LANCHOR125
+	adrp	x24, .LANCHOR65
+	mov	w22, 0
+	add	x0, x24, :lo12:.LANCHOR65
+	adrp	x25, .LANCHOR192
+	str	x0, [x29, 144]
+.L2061:
+	ldr	x0, [x29, 144]
+	ldrh	w0, [x0]
+	cmp	w22, w0
+	bcc	.L2067
+.L2047:
+	mov	x0, x19
+	bl	ftl_free_no_use_map_blk
+	adrp	x0, .LANCHOR52
+	ldrh	w1, [x19, 2]
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
+	cmp	w1, w0
+	bne	.L2060
+	mov	x0, x19
+	bl	ftl_map_blk_alloc_new_blk
+.L2060:
+	mov	x0, x19
+	bl	ftl_map_blk_gc
+	mov	x0, x19
+	bl	ftl_map_blk_gc
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 160
+	ret
+.L2045:
+	ldrh	w0, [x24]
+	mov	w2, 1
+	str	w3, [x29, 144]
+	mov	w1, w2
+	orr	w0, w25, w0, lsl 10
+	str	w0, [x26, 4]
+	mov	x0, x26
+	bl	FlashReadPages
+	ldr	w0, [x26]
+	ldr	w3, [x29, 144]
+	cmn	w0, #1
+	beq	.L2043
+	ldrh	w0, [x27, 8]
+	cmp	w23, w0
+	bls	.L2044
+	ldrh	w2, [x27]
+	ldrh	w1, [x19, 4]
+	cmp	w2, w1
+	bne	.L2044
+	ubfiz	x0, x0, 2, 16
+	ldr	w1, [x26, 4]
+	str	w1, [x22, x0]
+.L2044:
+	add	w25, w25, 1
+	sxth	w25, w25
+	b	.L2042
+.L2043:
+	ldrh	w0, [x24]
+	strh	w0, [x19, 60]
+	b	.L2044
+.L2041:
+	ldr	x1, [x29, 152]
+	mov	w2, 1
+	ldr	x0, [x21, #:lo12:.LANCHOR79]
+	str	x0, [x24, 8]
+	lsl	x0, x28, 1
+	add	x28, x1, x0
+	ldrh	w0, [x1, x0]
+	ldrh	w1, [x25, #:lo12:.LANCHOR52]
+	sub	w1, w1, #1
+	orr	w0, w1, w0, lsl 10
+	mov	w1, w2
+	str	w0, [x24, 4]
+	mov	x0, x24
+	bl	FlashReadPages
+	ldr	w0, [x24]
+	cmn	w0, #1
+	beq	.L2069
+	ldrh	w1, [x27]
+	ldrh	w0, [x19, 4]
+	cmp	w1, w0
+	bne	.L2069
+	ldrh	w1, [x27, 8]
+	mov	w0, 64245
+	cmp	w1, w0
+	beq	.L2049
+.L2069:
+	mov	w6, 0
+.L2050:
+	ldr	x0, [x29, 112]
+	ldrh	w0, [x0]
+	cmp	w6, w0
+	bge	.L2056
+	ldrh	w0, [x28]
+	mov	w2, 1
+	str	w6, [x29, 108]
+	mov	w1, w2
+	orr	w0, w6, w0, lsl 10
+	str	w0, [x24, 4]
+	mov	x0, x24
+	bl	FlashReadPages
+	ldr	w0, [x24]
+	ldr	w6, [x29, 108]
+	cmn	w0, #1
+	beq	.L2054
+	ldrh	w0, [x27, 8]
+	cmp	w23, w0
+	bls	.L2054
+	ldrh	w2, [x27]
+	ldrh	w1, [x19, 4]
+	cmp	w2, w1
+	bne	.L2054
+	ubfiz	x0, x0, 2, 16
+	ldr	w1, [x24, 4]
+	str	w1, [x22, x0]
+.L2054:
+	add	w6, w6, 1
+	sxth	w6, w6
+	b	.L2050
+.L2049:
+	ldrh	w6, [x25, #:lo12:.LANCHOR52]
+	mov	w0, 0
+	ldr	x10, [x21, #:lo12:.LANCHOR79]
+	sub	w6, w6, #1
+.L2051:
+	cmp	w0, w6
+	blt	.L2053
+.L2056:
+	add	w4, w26, 1
+	sxth	w26, w4
+	b	.L2040
+.L2053:
+	lsl	w2, w0, 1
+	sxtw	x2, w2
+	lsl	x1, x2, 2
+	ldrh	w1, [x10, x1]
+	cmp	w23, w1
+	bls	.L2052
+	add	x2, x2, 1
+	ubfiz	x1, x1, 2, 16
+	ldr	w2, [x10, x2, lsl 2]
+	str	w2, [x22, x1]
+.L2052:
+	add	w0, w0, 1
+	sxth	w0, w0
+	b	.L2051
+.L2067:
+	ldr	x0, [x25, #:lo12:.LANCHOR192]
+	ubfiz	x28, x22, 2, 32
+	ldr	w0, [x0, x28]
+	sub	w1, w0, #1
+	cmn	w1, #3
+	bhi	.L2063
+	adrp	x24, .LANCHOR128
+	ldr	x1, [x24, #:lo12:.LANCHOR128]
+	ldr	w1, [x1, x28]
+	cmp	w0, w1
+	beq	.L2063
+	add	x4, x20, :lo12:.LANCHOR199
+	ldr	x1, [x21, #:lo12:.LANCHOR79]
+	mov	w2, 1
+	str	x4, [x29, 120]
+	str	x1, [x4, 8]
+	ldr	x1, [x29, 128]
+	str	w0, [x4, 4]
+	mov	x0, x4
+	ldr	x23, [x1, #:lo12:.LANCHOR185]
+	mov	w1, w2
+	str	x23, [x4, 16]
+	bl	FlashReadPages
+	ldr	w0, [x20, #:lo12:.LANCHOR199]
+	cmn	w0, #1
+	beq	.L2063
+	ldr	x0, [x29, 136]
+	ldrh	w1, [x23]
+	add	x0, x0, :lo12:.LANCHOR124
+	ldr	x4, [x29, 120]
+	ldrh	w0, [x0, 4]
+	cmp	w1, w0
+	bne	.L2063
+	ldr	x0, [x24, #:lo12:.LANCHOR128]
+	mov	w2, 1
+	ldr	w3, [x23, 4]
+	mov	w1, w2
+	str	w3, [x29, 120]
+	ldr	w0, [x0, x28]
+	str	w0, [x4, 4]
+	mov	x0, x4
+	bl	FlashReadPages
+	ldr	w4, [x23, 4]
+	ldr	w3, [x29, 120]
+	cmp	w3, w4
+	bls	.L2063
+	ldr	x1, [x24, #:lo12:.LANCHOR128]
+	ldr	x0, [x25, #:lo12:.LANCHOR192]
+	ldr	w2, [x1, x28]
+	ldr	w1, [x0, x28]
+	adrp	x0, .LC42
+	add	x0, x0, :lo12:.LC42
+	bl	printf
+	ldr	x0, [x25, #:lo12:.LANCHOR192]
+	ldr	x1, [x24, #:lo12:.LANCHOR128]
+	ldr	w2, [x0, x28]
+	str	w2, [x1, x28]
+	mov	w1, 0
+	ldrh	w2, [x26, #:lo12:.LANCHOR125]
+	ldr	w0, [x0, x28]
+	ubfx	x0, x0, 10, 16
+.L2065:
+	cmp	w1, w2
+	blt	.L2066
+	adrp	x1, .LANCHOR63
+	ldr	w1, [x1, #:lo12:.LANCHOR63]
+	cmp	w2, w1
+	bcs	.L2063
+	ldr	x1, [x29, 152]
+	ubfiz	x2, x2, 1, 16
+	strh	w0, [x1, x2]
+	ldrh	w1, [x27]
+	add	w1, w1, 1
+	strh	w1, [x27]
+	bl	remove_from_free_sys_Queue
+.L2063:
+	add	w22, w22, 1
+	b	.L2061
+.L2066:
+	ldr	x3, [x29, 152]
+	ldrh	w3, [x3, w1, sxtw 1]
+	cmp	w3, w0
+	beq	.L2063
+	add	w1, w1, 1
+	sxth	w1, w1
+	b	.L2065
+	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
+	.section	.text.FtlLoadVonderInfo,"ax",@progbits
+	.align	2
+	.global	FtlLoadVonderInfo
+	.type	FtlLoadVonderInfo, %function
+FtlLoadVonderInfo:
+	stp	x29, x30, [sp, -16]!
+	adrp	x1, .LANCHOR60
+	adrp	x0, .LANCHOR215
+	add	x0, x0, :lo12:.LANCHOR215
+	add	x29, sp, 0
+	ldrh	w1, [x1, #:lo12:.LANCHOR60]
+	strh	w1, [x0, 10]
+	mov	w1, -3962
+	strh	w1, [x0, 4]
+	adrp	x1, .LANCHOR69
+	ldrh	w1, [x1, #:lo12:.LANCHOR69]
+	strh	w1, [x0, 8]
+	adrp	x1, .LANCHOR61
+	ldrh	w1, [x1, #:lo12:.LANCHOR61]
+	strh	w1, [x0, 6]
+	adrp	x1, .LANCHOR70
+	ldr	x1, [x1, #:lo12:.LANCHOR70]
+	str	x1, [x0, 16]
+	adrp	x1, .LANCHOR190
+	ldr	x1, [x1, #:lo12:.LANCHOR190]
+	str	x1, [x0, 24]
+	adrp	x1, .LANCHOR189
+	ldr	x1, [x1, #:lo12:.LANCHOR189]
+	str	x1, [x0, 32]
+	adrp	x1, .LANCHOR191
+	ldr	x1, [x1, #:lo12:.LANCHOR191]
+	str	x1, [x0, 40]
+	mov	w1, -1
+	strh	w1, [x0, 60]
+	bl	FtlMapTblRecovery
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
+	.section	.text.FtlLoadMapInfo,"ax",@progbits
+	.align	2
+	.global	FtlLoadMapInfo
+	.type	FtlLoadMapInfo, %function
+FtlLoadMapInfo:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	bl	FtlL2PDataInit
+	adrp	x0, .LANCHOR124
+	add	x0, x0, :lo12:.LANCHOR124
+	bl	FtlMapTblRecovery
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
+	.section	.text.FtlRecoverySuperblock,"ax",@progbits
+	.align	2
+	.global	FtlRecoverySuperblock
+	.type	FtlRecoverySuperblock, %function
+FtlRecoverySuperblock:
+	stp	x29, x30, [sp, -208]!
+	mov	w1, 65535
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	stp	x21, x22, [sp, 32]
+	ldrh	w0, [x0]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	cmp	w0, w1
+	stp	x27, x28, [sp, 80]
+	beq	.L2243
+	ldrb	w0, [x19, 6]
+	str	w0, [x29, 180]
+	adrp	x0, .LANCHOR51
+	ldrh	w26, [x19, 2]
+	str	x0, [x29, 144]
+	ldrh	w2, [x0, #:lo12:.LANCHOR51]
+	cmp	w2, w26
+	bne	.L2087
+	strh	wzr, [x19, 4]
+.L2250:
+	strb	wzr, [x19, 6]
+.L2243:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 208
+	ret
+.L2087:
+	ldrh	w0, [x19, 16]
+	mov	w21, 0
+.L2088:
+	cmp	w0, w1
+	beq	.L2089
+	ldrb	w1, [x19, 8]
+	cmp	w1, 1
+	bne	.L2090
+	bl	FtlGetLastWrittenPage
+	mov	w20, w0
+	cmn	w0, #1
+	beq	.L2091
+	adrp	x0, .LANCHOR8
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	cbnz	w0, .L2168
+	adrp	x0, .LANCHOR16
+	add	x0, x0, :lo12:.LANCHOR16
+	ldrh	w23, [x0, w20, sxtw 1]
+.L2092:
+	adrp	x1, .LANCHOR105
+	adrp	x2, .LANCHOR36
+	adrp	x22, .LANCHOR178
+	add	x4, x19, 16
+	ldr	x6, [x1, #:lo12:.LANCHOR105]
+	adrp	x1, .LANCHOR57
+	ldr	x0, [x22, #:lo12:.LANCHOR178]
+	mov	w27, 0
+	ldrh	w7, [x1, #:lo12:.LANCHOR57]
+	add	x1, x19, 16
+	str	x1, [x29, 184]
+	mov	w8, 65535
+	ldrh	w1, [x2, #:lo12:.LANCHOR36]
+	mov	w10, 56
+	str	x2, [x29, 160]
+	add	x1, x1, 8
+	add	x1, x19, x1, lsl 1
+.L2093:
+	cmp	x1, x4
+	bne	.L2097
+	ldrb	w1, [x19, 8]
+	cmp	w1, 1
+	bne	.L2169
+	adrp	x1, .LANCHOR8
+	ldrb	w1, [x1, #:lo12:.LANCHOR8]
+	cmp	w1, 0
+	cset	w1, ne
+	str	w1, [x29, 176]
+.L2098:
+	ldr	w2, [x29, 176]
+	mov	w1, w27
+	adrp	x24, .LC43
+	adrp	x25, .LANCHOR229
+	add	x24, x24, :lo12:.LC43
+	add	x25, x25, :lo12:.LANCHOR229
+	mov	x28, 0
+	bl	FlashReadPages
+	adrp	x0, .LANCHOR158
+	mov	w5, 65535
+	str	x0, [x29, 168]
+	ldr	w21, [x0, #:lo12:.LANCHOR158]
+	sub	w21, w21, #1
+.L2099:
+	and	w0, w28, 65535
+	cmp	w27, w0
+	bhi	.L2104
+	bne	.L2102
+	ldr	x0, [x22, #:lo12:.LANCHOR178]
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	ldr	w0, [x0, 4]
+.L2245:
+	lsr	w0, w0, 10
+	bl	P2V_plane
+	ldrb	w1, [x19, 8]
+	and	w27, w0, 65535
+	cmp	w1, 1
+	bne	.L2106
+	adrp	x0, .LANCHOR8
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	cbnz	w0, .L2106
+	adrp	x0, .LANCHOR16
+	add	x0, x0, :lo12:.LANCHOR16
+	ldrh	w20, [x0, w20, sxtw 1]
+.L2106:
+	ldr	x0, [x29, 144]
+	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+	cmp	w0, w20
+	bne	.L2107
+	strh	w20, [x19, 2]
+	strb	wzr, [x19, 6]
+	strh	wzr, [x19, 4]
+.L2107:
+	ldr	w0, [x29, 180]
+	cmp	w20, w26
+	cset	w2, eq
+	cmp	w27, w0
+	cset	w0, eq
+	tst	w2, w0
+	beq	.L2108
+.L2251:
+	mov	w2, w27
+	mov	w1, w20
+	mov	x0, x19
+	bl	ftl_sb_update_avl_pages
+	b	.L2243
+.L2089:
+	add	w21, w21, 1
+	and	w21, w21, 65535
+	add	x0, x19, x21, sxtw 1
+	ldrh	w0, [x0, 16]
+	b	.L2088
+.L2090:
+	mov	w1, 0
+	bl	FtlGetLastWrittenPage
+	mov	w20, w0
+	cmn	w0, #1
+	beq	.L2091
+.L2168:
+	mov	w23, w20
+	b	.L2092
+.L2091:
+	cbz	w26, .L2094
+	mov	w2, 1896
+	adrp	x1, .LANCHOR228
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR228
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L2094:
+	ldr	w0, [x29, 180]
+	cmp	w0, 0
+	ccmp	w21, w0, 4, ne
+	beq	.L2095
+	mov	w2, 1897
+	adrp	x1, .LANCHOR228
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR228
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L2095:
+	strh	wzr, [x19, 2]
+	b	.L2250
+.L2097:
+	ldrh	w2, [x4]
+	cmp	w2, w8
+	beq	.L2096
+	umaddl	x5, w27, w10, x0
+	orr	w2, w23, w2, lsl 10
+	add	w3, w27, 1
+	str	w2, [x5, 4]
+	mul	w2, w27, w7
+	and	w27, w3, 65535
+	str	xzr, [x5, 8]
+	asr	w2, w2, 2
+	add	x2, x6, x2, sxtw 2
+	str	x2, [x5, 16]
+.L2096:
+	add	x4, x4, 2
+	b	.L2093
+.L2169:
+	str	wzr, [x29, 176]
+	b	.L2098
+.L2104:
+	mov	x0, 56
+	ldr	x2, [x22, #:lo12:.LANCHOR178]
+	mul	x0, x28, x0
+	add	x1, x2, x0
+	ldr	w0, [x2, x0]
+	cbnz	w0, .L2100
+	ldr	x6, [x1, 16]
+	ldr	w4, [x6, 4]
+	cmn	w4, #1
+	beq	.L2101
+	ldr	x0, [x29, 168]
+	ldr	w1, [x0, #:lo12:.LANCHOR158]
+	mov	w0, w4
+	bl	ftl_cmp_data_ver
+	cbz	w0, .L2101
+	ldr	x0, [x29, 168]
+	add	w4, w4, 1
+	str	w4, [x0, #:lo12:.LANCHOR158]
+.L2101:
+	ldr	w0, [x6]
+	cmn	w0, #1
+	bne	.L2103
+.L2102:
+	ldr	x0, [x22, #:lo12:.LANCHOR178]
+	and	x28, x28, 65535
+	mov	x1, 56
+	and	w20, w20, 65535
+	madd	x28, x28, x1, x0
+	ldr	w0, [x28, 4]
+	b	.L2245
+.L2100:
+	ldr	w1, [x1, 4]
+	mov	x0, x24
+	bl	printf
+	ldrh	w0, [x19]
+	and	w5, w23, 65535
+	strh	w0, [x25]
+.L2103:
+	add	x28, x28, 1
+	b	.L2099
+.L2108:
+	mov	w0, 65535
+	cmp	w5, w0
+	bne	.L2109
+	cbnz	w1, .L2110
+.L2109:
+	adrp	x24, .LANCHOR133
+	and	w6, w23, 65535
+	ldr	w0, [x24, #:lo12:.LANCHOR133]
+	cmn	w0, #1
+	bne	.L2111
+	str	w21, [x24, #:lo12:.LANCHOR133]
+.L2111:
+	add	w0, w26, 7
+	ldr	w7, [x24, #:lo12:.LANCHOR133]
+	cmp	w0, w23, uxth
+	bge	.L2170
+	sub	w23, w6, #7
+	and	w23, w23, 65535
+.L2112:
+	mov	w3, -1
+	adrp	x5, .LANCHOR117
+	mov	w28, w3
+	add	x5, x5, :lo12:.LANCHOR117
+	mov	w4, 65535
+.L2113:
+	cmp	w23, w6
+	bhi	.L2128
+	ldr	x1, [x29, 160]
+	mov	w25, 0
+	ldr	x0, [x22, #:lo12:.LANCHOR178]
+	mov	w10, 56
+	ldr	x2, [x29, 184]
+	ldrh	w1, [x1, #:lo12:.LANCHOR36]
+	add	x1, x1, 8
+	add	x1, x19, x1, lsl 1
+	b	.L2129
+.L2170:
+	mov	w23, w26
+	b	.L2112
+.L2115:
+	ldrh	w8, [x2]
+	cmp	w8, w4
+	beq	.L2114
+	umaddl	x11, w25, w10, x0
+	add	w25, w25, 1
+	and	w25, w25, 65535
+	orr	w8, w23, w8, lsl 10
+	str	w8, [x11, 4]
+.L2114:
+	add	x2, x2, 2
+.L2129:
+	cmp	x2, x1
+	bne	.L2115
+	ldr	w2, [x29, 176]
+	mov	w1, w25
+	str	x5, [x29, 112]
+	str	w4, [x29, 120]
+	str	w7, [x29, 128]
+	str	w6, [x29, 136]
+	str	w3, [x29, 152]
+	bl	FlashReadPages
+	adrp	x1, .LANCHOR8
+	mov	w2, 56
+	ldr	w0, [x24, #:lo12:.LANCHOR133]
+	sxtw	x12, w23
+	ldrb	w10, [x1, #:lo12:.LANCHOR8]
+	mov	w11, 1
+	ldr	x1, [x22, #:lo12:.LANCHOR178]
+	ldr	w4, [x29, 120]
+	ldr	w7, [x29, 128]
+	ldr	w6, [x29, 136]
+	ldr	w3, [x29, 152]
+	nop // between mem op and mult-accumulate
+	umaddl	x25, w25, w2, x1
+	ldr	x5, [x29, 112]
+	mov	w2, 0
+.L2116:
+	cmp	x25, x1
+	bne	.L2126
+	cbz	w2, .L2127
+	str	w0, [x24, #:lo12:.LANCHOR133]
+.L2127:
+	add	w23, w23, 1
+	and	w23, w23, 65535
+	b	.L2113
+.L2126:
+	ldr	w8, [x1]
+	cbnz	w8, .L2117
+	ldr	x8, [x1, 16]
+	ldrh	w13, [x8]
+	cmp	w13, w4
+	beq	.L2172
+	ldr	w8, [x8, 4]
+	cmn	w8, #1
+	beq	.L2172
+	cmn	w3, #1
+	bne	.L2174
+	ldrh	w2, [x5, x12, lsl 1]
+	cmp	w2, w4
+	bne	.L2119
+	cbz	w10, .L2174
+.L2119:
+	cmp	w21, w0
+	mov	w2, w11
+	csel	w3, w3, w0, eq
+.L2118:
+	mov	w28, w0
+	add	x1, x1, 56
+	mov	w0, w8
+	b	.L2116
+.L2117:
+	cbz	w2, .L2120
+	str	w0, [x24, #:lo12:.LANCHOR133]
+.L2120:
+	adrp	x0, .LANCHOR229
+	ldrh	w1, [x19]
+	strh	w1, [x0, #:lo12:.LANCHOR229]
+	ldrb	w0, [x19, 8]
+	cbnz	w0, .L2110
+	adrp	x0, .LANCHOR117
+	add	x0, x0, :lo12:.LANCHOR117
+	ldrh	w1, [x0, w23, sxtw 1]
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L2122
+	cmn	w3, #1
+	beq	.L2123
+	str	w3, [x24, #:lo12:.LANCHOR133]
+.L2110:
+	mov	w1, 1
+	adrp	x0, .LANCHOR230
+	mov	w23, w26
+	adrp	x28, .LANCHOR133
+	strh	w1, [x0, #:lo12:.LANCHOR230]
+	adrp	x0, .LANCHOR124
+	add	x0, x0, :lo12:.LANCHOR124
+	bl	FtlMapBlkWriteDumpData
+	add	x0, x28, :lo12:.LANCHOR133
+	str	x0, [x29, 112]
+.L2130:
+	ldr	x2, [x29, 160]
+	adrp	x1, .LANCHOR8
+	ldr	x0, [x22, #:lo12:.LANCHOR178]
+	mov	w24, 0
+	ldrb	w5, [x1, #:lo12:.LANCHOR8]
+	mov	w6, 65535
+	ldr	x3, [x29, 184]
+	ldrh	w2, [x2, #:lo12:.LANCHOR36]
+	str	x1, [x29, 128]
+	add	x2, x2, 8
+	add	x2, x19, x2, lsl 1
+.L2131:
+	cmp	x2, x3
+	bne	.L2134
+	ldr	w2, [x29, 176]
+	mov	w1, w24
+	mov	x25, 0
+	bl	FlashReadPages
+	mov	w0, 56
+	umull	x0, w24, w0
+	str	x0, [x29, 136]
+	adrp	x0, .LANCHOR229
+	add	x0, x0, :lo12:.LANCHOR229
+	str	x0, [x29, 120]
+.L2135:
+	ldr	x0, [x29, 136]
+	cmp	x25, x0
+	bne	.L2161
+	ldrb	w0, [x19, 8]
+	add	w23, w23, 1
+	and	w23, w23, 65535
+	cmp	w0, 1
+	bne	.L2162
+	ldr	x0, [x29, 128]
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	cbz	w0, .L2162
+	adrp	x0, .LANCHOR52
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
+	cmp	w0, w23
+	bne	.L2162
+	cmp	w20, w23
+	beq	.L2137
+.L2162:
+	ldr	x0, [x29, 144]
+	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+	cmp	w0, w23
+	bne	.L2130
+	ldr	x0, [x29, 160]
+	mov	w2, 65535
+	strh	w23, [x19, 2]
+	strh	wzr, [x19, 4]
+	ldrh	w1, [x0, #:lo12:.LANCHOR36]
+	mov	w0, 0
+.L2163:
+	cmp	w0, w1
+	beq	.L2243
+	ldr	x4, [x29, 184]
+	ldrh	w3, [x4], 2
+	str	x4, [x29, 184]
+	cmp	w3, w2
+	beq	.L2164
+	strb	w0, [x19, 6]
+	b	.L2243
+.L2123:
+	cmp	w21, w7
+	beq	.L2124
+	str	w7, [x24, #:lo12:.LANCHOR133]
+	b	.L2110
+.L2124:
+	ldr	w0, [x24, #:lo12:.LANCHOR133]
+.L2252:
+	sub	w0, w0, #1
+.L2246:
+	str	w0, [x24, #:lo12:.LANCHOR133]
+	b	.L2110
+.L2122:
+	cmp	w28, w21
+	beq	.L2125
+	cmn	w28, #1
+	beq	.L2110
+	str	w28, [x24, #:lo12:.LANCHOR133]
+	b	.L2110
+.L2125:
+	ldr	w0, [x24, #:lo12:.LANCHOR133]
+	cmp	w21, w0
+	bne	.L2252
+	b	.L2110
+.L2172:
+	mov	w8, w0
+	mov	w0, w28
+	b	.L2118
+.L2174:
+	mov	w2, 1
+	b	.L2118
+.L2128:
+	mov	w0, -1
+	b	.L2246
+.L2134:
+	ldrh	w1, [x3]
+	cmp	w1, w6
+	beq	.L2132
+	mov	w4, 56
+	orr	w1, w23, w1, lsl 10
+	umaddl	x4, w24, w4, x0
+	str	w1, [x4, 4]
+	ldrb	w7, [x19, 8]
+	cmp	w7, 1
+	bne	.L2133
+	cbz	w5, .L2133
+	orr	w1, w1, -2147483648
+	str	w1, [x4, 4]
+.L2133:
+	add	w24, w24, 1
+	and	w24, w24, 65535
+.L2132:
+	add	x3, x3, 2
+	b	.L2131
+.L2161:
+	ldr	x4, [x22, #:lo12:.LANCHOR178]
+	add	x4, x4, x25
+	ldr	w5, [x4, 4]
+	str	w5, [x29, 204]
+	lsr	w0, w5, 10
+	bl	P2V_plane
+	and	w0, w0, 65535
+	cmp	w23, w26
+	bcc	.L2136
+	ldr	w1, [x29, 180]
+	ccmp	w1, w0, 0, eq
+	bhi	.L2136
+	cmp	w23, w20
+	ccmp	w27, w0, 0, eq
+	beq	.L2137
+	ldr	w0, [x4]
+	cmn	w0, #1
+	beq	.L2138
+	ldr	x3, [x4, 16]
+	mov	w0, 61589
+	ldrh	w1, [x3]
+	cmp	w1, w0
+	beq	.L2139
+.L2145:
+	ldrh	w0, [x19]
+.L2249:
+	bl	decrement_vpc_count
+.L2136:
+	add	x25, x25, 56
+	b	.L2135
+.L2139:
+	ldr	w21, [x3, 4]
+	cmn	w21, #1
+	beq	.L2140
+	ldr	x0, [x29, 168]
+	ldr	w1, [x0, #:lo12:.LANCHOR158]
+	mov	w0, w21
+	bl	ftl_cmp_data_ver
+	cbz	w0, .L2140
+	ldr	x1, [x29, 168]
+	add	w0, w21, 1
+	str	w0, [x1, #:lo12:.LANCHOR158]
+.L2140:
+	ldp	w24, w0, [x3, 8]
+	add	x1, x29, 200
+	str	w0, [x29, 196]
+	mov	w2, 0
+	mov	w0, w24
+	bl	log2phys
+	ldr	w1, [x28, #:lo12:.LANCHOR133]
+	cmn	w1, #1
+	beq	.L2141
+	mov	w0, w21
+	bl	ftl_cmp_data_ver
+	cbz	w0, .L2141
+	ldr	w1, [x29, 196]
+	cmn	w1, #1
+	beq	.L2142
+	ldr	x0, [x22, #:lo12:.LANCHOR178]
+	mov	w2, 0
+	add	x0, x0, x25
+	ldr	x3, [x0, 16]
+	str	w1, [x0, 4]
+	mov	w1, 1
+	str	x3, [x29, 152]
+	bl	FlashReadPages
+	ldr	x0, [x22, #:lo12:.LANCHOR178]
+	ldr	x3, [x29, 152]
+	add	x4, x0, x25
+	ldr	w0, [x0, x25]
+	cmn	w0, #1
+	bne	.L2143
+.L2144:
+	mov	w0, -1
+	str	w0, [x29, 196]
+	ldrh	w0, [x19]
+	bl	decrement_vpc_count
+.L2152:
+	ldr	w3, [x29, 196]
+	cmn	w3, #1
+	beq	.L2136
+.L2167:
+	lsr	w0, w3, 10
+	bl	P2V_block_in_plane
+	and	w24, w0, 65535
+	adrp	x0, .LANCHOR38
+	mov	w3, w24
+	ldrh	w0, [x0, #:lo12:.LANCHOR38]
+	cmp	w0, w24
+	bhi	.L2157
+	mov	w2, 2179
+	adrp	x1, .LANCHOR228
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR228
+	add	x0, x0, :lo12:.LC4
+	str	w24, [x29, 152]
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+	ldr	w3, [x29, 152]
+.L2157:
+	adrp	x1, .LANCHOR82
+	ubfiz	x0, x24, 1, 16
+	ldr	x1, [x1, #:lo12:.LANCHOR82]
+	ldrh	w0, [x1, x0]
+	cbz	w0, .L2158
+	mov	w0, w3
+	b	.L2249
+.L2142:
+	ldp	w1, w0, [x29, 200]
+	cmp	w1, w0
+	bne	.L2145
+	mov	w2, 1
+	add	x1, x29, 196
+	mov	w0, w24
+	bl	log2phys
+	b	.L2145
+.L2143:
+	ldr	w0, [x3, 8]
+	cmp	w24, w0
+	bne	.L2144
+	ldr	w0, [x3, 4]
+	str	w0, [x29, 152]
+	str	x3, [x29, 104]
+	uxtw	x1, w0
+	ldr	w0, [x28, #:lo12:.LANCHOR133]
+	bl	ftl_cmp_data_ver
+	cbz	w0, .L2144
+	ldp	w0, w1, [x29, 200]
+	ldr	x3, [x29, 104]
+	cmp	w0, w1
+	ldr	w1, [x29, 196]
+	bne	.L2147
+.L2247:
+	mov	w0, w24
+	bl	FtlReUsePrevPpa
+	b	.L2144
+.L2147:
+	cmp	w0, w1
+	beq	.L2144
+	cmn	w0, #1
+	beq	.L2148
+	ldr	x3, [x4, 16]
+	mov	w2, 0
+	str	w0, [x4, 4]
+	mov	w1, 1
+	str	x3, [x29, 104]
+	mov	x0, x4
+	bl	FlashReadPages
+	ldr	x3, [x29, 104]
+.L2149:
+	ldr	x0, [x22, #:lo12:.LANCHOR178]
+	ldr	w0, [x0, x25]
+	cmn	w0, #1
+	beq	.L2150
+	ldr	x0, [x29, 112]
+	ldr	w3, [x3, 4]
+	mov	w1, w3
+	ldr	w0, [x0]
+	bl	ftl_cmp_data_ver
+	cbz	w0, .L2150
+	ldr	w0, [x29, 152]
+	mov	w1, w3
+	bl	ftl_cmp_data_ver
+	cbz	w0, .L2144
+.L2150:
+	ldr	w1, [x29, 196]
+	b	.L2247
+.L2148:
+	str	w0, [x4]
+	b	.L2149
+.L2141:
+	ldp	w1, w0, [x29, 200]
+	cmp	w1, w0
+	beq	.L2152
+	mov	w2, 1
+	add	x1, x29, 204
+	mov	w0, w24
+	bl	log2phys
+	ldr	w3, [x29, 200]
+	cmn	w3, #1
+	beq	.L2152
+	ldr	w0, [x29, 196]
+	cmp	w3, w0
+	beq	.L2167
+	lsr	w0, w3, 10
+	bl	P2V_block_in_plane
+	adrp	x1, .LANCHOR90
+	and	w0, w0, 65535
+	ldrh	w1, [x1, #:lo12:.LANCHOR90]
+	cmp	w1, w0
+	beq	.L2156
+	adrp	x1, .LANCHOR91
+	ldrh	w1, [x1, #:lo12:.LANCHOR91]
+	cmp	w1, w0
+	beq	.L2156
+	adrp	x1, .LANCHOR92
+	ldrh	w1, [x1, #:lo12:.LANCHOR92]
+	cmp	w1, w0
+	bne	.L2152
+.L2156:
+	ldr	x0, [x22, #:lo12:.LANCHOR178]
+	mov	w2, 0
+	mov	w1, 1
+	ldr	x4, [x0, 16]
+	str	w3, [x0, 4]
+	str	x4, [x29, 152]
+	bl	FlashReadPages
+	ldr	x0, [x22, #:lo12:.LANCHOR178]
+	ldr	w0, [x0]
+	cmn	w0, #1
+	beq	.L2152
+	ldr	x4, [x29, 152]
+	mov	w0, w21
+	ldr	w1, [x4, 4]
+	bl	ftl_cmp_data_ver
+	cbnz	w0, .L2152
+	mov	w2, 1
+	add	x1, x29, 200
+	mov	w0, w24
+	bl	log2phys
+	b	.L2152
+.L2158:
+	mov	w1, w24
+	adrp	x0, .LC44
+	add	x0, x0, :lo12:.LC44
+	bl	printf
+	b	.L2136
+.L2138:
+	ldr	x1, [x29, 120]
+	mov	w2, w21
+	ldrh	w0, [x19]
+	strh	w0, [x1]
+	mov	w1, w5
+	adrp	x0, .LC45
+	add	x0, x0, :lo12:.LC45
+	bl	printf
+	adrp	x2, .LANCHOR231
+	ldr	w0, [x2, #:lo12:.LANCHOR231]
+	cmp	w0, 31
+	bhi	.L2159
+	adrp	x1, .LANCHOR232
+	add	x1, x1, :lo12:.LANCHOR232
+	ldr	w3, [x29, 204]
+	str	w3, [x1, w0, uxtw 2]
+	add	w0, w0, 1
+	str	w0, [x2, #:lo12:.LANCHOR231]
+.L2159:
+	ldrh	w0, [x19]
+	bl	decrement_vpc_count
+	ldr	w0, [x28, #:lo12:.LANCHOR133]
+	cmn	w0, #1
+	bne	.L2160
+.L2248:
+	str	w21, [x28, #:lo12:.LANCHOR133]
+	b	.L2136
+.L2160:
+	cmp	w21, w0
+	bcs	.L2136
+	b	.L2248
+.L2164:
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	b	.L2163
+.L2137:
+	strb	w27, [x19, 6]
+	strh	w20, [x19, 2]
+	b	.L2251
+	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
+	.section	.text.FtlGcScanTempBlk,"ax",@progbits
+	.align	2
+	.global	FtlGcScanTempBlk
+	.type	FtlGcScanTempBlk, %function
+FtlGcScanTempBlk:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR233
+	stp	x19, x20, [sp, 16]
+	mov	x20, x0
+	ldrh	w19, [x23, #:lo12:.LANCHOR233]
+	mov	w0, 65535
+	stp	x21, x22, [sp, 32]
+	stp	x25, x26, [sp, 64]
+	cmp	w19, w0
+	stp	x27, x28, [sp, 80]
+	beq	.L2271
+	cbnz	w19, .L2254
+.L2255:
+	bl	FtlGcPageVarInit
+	b	.L2256
+.L2271:
+	mov	w19, 0
+.L2254:
+	adrp	x0, .LANCHOR51
+	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+	cmp	w0, w1
+	beq	.L2255
+.L2256:
+	adrp	x25, .LANCHOR57
+	add	x25, x25, :lo12:.LANCHOR57
+	mov	w26, -1
+	mov	w24, 65535
+.L2268:
+	ldrh	w0, [x20]
+	strb	wzr, [x20, 8]
+	cmp	w0, w24
+	beq	.L2272
+	mov	w27, 56
+.L2270:
+	adrp	x1, .LANCHOR105
+	adrp	x22, .LANCHOR178
+	ldrh	w6, [x25]
+	add	x3, x20, 16
+	ldr	x5, [x1, #:lo12:.LANCHOR105]
+	adrp	x1, .LANCHOR36
+	ldr	x0, [x22, #:lo12:.LANCHOR178]
+	mov	w21, 0
+	ldrh	w1, [x1, #:lo12:.LANCHOR36]
+	add	x1, x1, 8
+	add	x1, x20, x1, lsl 1
+.L2258:
+	cmp	x3, x1
+	bne	.L2260
+	mov	w1, w21
+	umull	x21, w21, w27
+	mov	x28, 0
+	mov	w2, 0
+	bl	FlashReadPages
+.L2261:
+	cmp	x28, x21
+	bne	.L2269
+	adrp	x0, .LANCHOR51
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+	cmp	w0, w19
+	bhi	.L2270
+.L2272:
+	mov	w2, 0
+	b	.L2257
+.L2260:
+	ldrh	w2, [x3]
+	cmp	w2, w24
+	beq	.L2259
+	umaddl	x4, w21, w27, x0
+	orr	w2, w19, w2, lsl 10
+	str	w2, [x4, 4]
+	mul	w2, w21, w6
+	add	w21, w21, 1
+	str	xzr, [x4, 8]
+	and	w21, w21, 65535
+	asr	w2, w2, 2
+	add	x2, x5, x2, sxtw 2
+	str	x2, [x4, 16]
+.L2259:
+	add	x3, x3, 2
+	b	.L2258
+.L2269:
+	ldr	x6, [x22, #:lo12:.LANCHOR178]
+	add	x5, x6, x28
+	ldr	w4, [x5, 4]
+	lsr	w0, w4, 10
+	bl	P2V_plane
+	and	w2, w0, 65535
+	ldr	w0, [x6, x28]
+	cbnz	w0, .L2262
+	ldr	x0, [x5, 16]
+	add	x28, x28, 56
+	ldrh	w1, [x0]
+	cmp	w1, w24
+	bne	.L2263
+	adrp	x0, .LANCHOR132
+	mov	w1, 1
+	str	w1, [x0, #:lo12:.LANCHOR132]
+.L2257:
+	strb	w2, [x20, 6]
+	mov	w0, -1
+	strh	w19, [x20, 2]
+	mov	w1, w19
+	strh	w0, [x23, #:lo12:.LANCHOR233]
+	mov	x0, x20
+	bl	ftl_sb_update_avl_pages
+	mov	w0, w26
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	ret
+.L2263:
+	ldp	w2, w0, [x0, 8]
+	mov	w1, w4
+	bl	FtlGcUpdatePage
+	b	.L2261
+.L2262:
+	ldrh	w1, [x20]
+	mov	w2, w4
+	adrp	x0, .LC46
+	add	x0, x0, :lo12:.LC46
+	bl	printf
+	adrp	x0, .LANCHOR101
+	ldr	w1, [x0, #:lo12:.LANCHOR101]
+	ldrh	w0, [x20]
+	cbnz	w1, .L2264
+	adrp	x1, .LANCHOR8
+	ldrb	w1, [x1, #:lo12:.LANCHOR8]
+	cbz	w1, .L2265
+.L2264:
+	adrp	x2, .LANCHOR77
+	ubfiz	x1, x0, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR77]
+	ldrh	w1, [x2, x1]
+	cmp	w1, 119
+	bls	.L2266
+.L2265:
+	ldr	x1, [x22, #:lo12:.LANCHOR178]
+	ldr	w1, [x1, x28]
+	cmn	w1, #1
+	bne	.L2267
+.L2266:
+	ldr	x1, [x22, #:lo12:.LANCHOR178]
+	add	x28, x1, x28
+	ldr	w26, [x28, 4]
+.L2267:
+	adrp	x1, .LANCHOR82
+	ubfiz	x0, x0, 1, 16
+	mov	w19, 0
+	ldr	x1, [x1, #:lo12:.LANCHOR82]
+	strh	wzr, [x1, x0]
+	ldrh	w0, [x20]
+	bl	INSERT_FREE_LIST
+	mov	w0, -1
+	strh	w0, [x20]
+	bl	FtlGcPageVarInit
+	b	.L2268
+	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
+	.section	.text.FtlGcFreeTempBlock,"ax",@progbits
+	.align	2
+	.global	FtlGcFreeTempBlock
+	.type	FtlGcFreeTempBlock, %function
+FtlGcFreeTempBlock:
+	adrp	x0, .LANCHOR75
+	ldr	w0, [x0, #:lo12:.LANCHOR75]
+	cbz	w0, .L2282
+	mov	w0, 0
+	ret
+.L2282:
+	stp	x29, x30, [sp, -112]!
+	mov	w1, 65535
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR92
+	stp	x21, x22, [sp, 32]
+	add	x0, x19, :lo12:.LANCHOR92
+	ldrh	w20, [x19, #:lo12:.LANCHOR92]
+	adrp	x21, .LANCHOR132
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	cmp	w20, w1
+	str	x27, [sp, 80]
+	beq	.L2284
+	adrp	x1, .LANCHOR51
+	ldrh	w1, [x1, #:lo12:.LANCHOR51]
+	bl	FtlGcScanTempBlk
+	str	w0, [x29, 108]
+	cmn	w0, #1
+	beq	.L2284
+	adrp	x0, .LANCHOR77
+	ubfiz	x20, x20, 1, 16
+	ldr	x1, [x0, #:lo12:.LANCHOR77]
+	ldrh	w0, [x1, x20]
+	cmp	w0, 4
+	bls	.L2285
+	sub	w0, w0, #5
+	strh	w0, [x1, x20]
+	mov	w0, 1
+	bl	FtlEctTblFlush
+.L2285:
+	ldr	w0, [x21, #:lo12:.LANCHOR132]
+	cbnz	w0, .L2286
+	adrp	x0, .LANCHOR136
+	add	x0, x0, :lo12:.LANCHOR136
+	ldr	w1, [x0, 96]
+	add	w1, w1, 1
+	str	w1, [x0, 96]
+	ldr	w0, [x29, 108]
+	lsr	w0, w0, 10
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+.L2286:
+	str	wzr, [x21, #:lo12:.LANCHOR132]
+	mov	w0, 1
+.L2281:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L2284:
+	str	wzr, [x21, #:lo12:.LANCHOR132]
+	mov	w0, 65535
+	ldrh	w1, [x19, #:lo12:.LANCHOR92]
+	add	x21, x19, :lo12:.LANCHOR92
+	cmp	w1, w0
+	beq	.L2307
+	bl	FtlCacheWriteBack
+	adrp	x20, .LANCHOR110
+	adrp	x0, .LANCHOR51
+	ldrb	w1, [x21, 7]
+	ldrh	w2, [x20, #:lo12:.LANCHOR110]
+	mov	x21, x0
+	ldrh	w3, [x0, #:lo12:.LANCHOR51]
+	mul	w1, w1, w3
+	cmp	w2, w1
+	beq	.L2288
+	mov	w2, 163
+	adrp	x1, .LANCHOR234
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR234
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L2288:
+	add	x0, x19, :lo12:.LANCHOR92
+	adrp	x23, .LANCHOR82
+	ldrh	w3, [x21, #:lo12:.LANCHOR51]
+	adrp	x25, .LANCHOR71
+	ldrh	w2, [x19, #:lo12:.LANCHOR92]
+	adrp	x26, .LANCHOR234
+	ldrb	w0, [x0, 7]
+	add	x25, x25, :lo12:.LANCHOR71
+	ldr	x1, [x23, #:lo12:.LANCHOR82]
+	add	x26, x26, :lo12:.LANCHOR234
+	mov	w21, 0
+	mul	w0, w0, w3
+	strh	w0, [x1, x2, lsl 1]
+	adrp	x1, .LANCHOR159
+	ldrh	w0, [x20, #:lo12:.LANCHOR110]
+	ldr	w2, [x1, #:lo12:.LANCHOR159]
+	add	w0, w0, w2
+	str	w0, [x1, #:lo12:.LANCHOR159]
+.L2289:
+	ldrh	w0, [x20, #:lo12:.LANCHOR110]
+	cmp	w0, w21
+	bhi	.L2293
+	mov	w0, -1
+	bl	decrement_vpc_count
+	adrp	x0, .LANCHOR8
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	cbz	w0, .L2294
+	ldrh	w1, [x19, #:lo12:.LANCHOR92]
+	adrp	x0, .LC47
+	add	x0, x0, :lo12:.LC47
+	bl	printf
+.L2294:
+	ldrh	w0, [x19, #:lo12:.LANCHOR92]
+	ldr	x2, [x23, #:lo12:.LANCHOR82]
+	ubfiz	x1, x0, 1, 16
+	ldrh	w1, [x2, x1]
+	cbz	w1, .L2295
+	bl	INSERT_DATA_LIST
+.L2296:
+	adrp	x0, .LANCHOR108
+	mov	w21, -1
+	strh	wzr, [x20, #:lo12:.LANCHOR110]
+	strh	w21, [x19, #:lo12:.LANCHOR92]
+	strh	wzr, [x0, #:lo12:.LANCHOR108]
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	adrp	x0, .LANCHOR87
+	ldrh	w1, [x0, #:lo12:.LANCHOR87]
+	adrp	x0, .LANCHOR227
+	ldrh	w0, [x0, #:lo12:.LANCHOR227]
+	add	w0, w0, w0, lsl 1
+	cmp	w1, w0, lsr 2
+	ble	.L2307
+	adrp	x0, .LANCHOR201
+	mov	w1, 20
+	strh	w21, [x0, #:lo12:.LANCHOR201]
+	adrp	x0, .LANCHOR174
+	strh	w1, [x0, #:lo12:.LANCHOR174]
+.L2307:
+	mov	w0, 0
+	b	.L2281
+.L2293:
+	adrp	x0, .LANCHOR111
+	mov	w24, 12
+	ldr	x27, [x0, #:lo12:.LANCHOR111]
+	umull	x24, w21, w24
+	ldr	w0, [x25]
+	add	x22, x27, x24
+	ldr	w1, [x22, 8]
+	cmp	w1, w0
+	bcc	.L2290
+	mov	w2, 168
+	mov	x1, x26
+	adrp	x0, .LC4
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L2290:
+	ldr	w0, [x22, 8]
+	add	x1, x29, 108
+	mov	w2, 0
+	bl	log2phys
+	ldr	w0, [x27, x24]
+	ldr	w1, [x29, 108]
+	cmp	w0, w1
+	bne	.L2291
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+	mov	w24, w0
+	ldr	w0, [x22, 8]
+	mov	w2, 1
+	add	x1, x22, 4
+	bl	log2phys
+	mov	w0, w24
+.L2306:
+	bl	decrement_vpc_count
+.L2292:
+	add	w21, w21, 1
+	and	w21, w21, 65535
+	b	.L2289
+.L2291:
+	ldr	w0, [x22, 4]
+	cmp	w1, w0
+	beq	.L2292
+	ldrh	w0, [x19, #:lo12:.LANCHOR92]
+	b	.L2306
+.L2295:
+	bl	INSERT_FREE_LIST
+	b	.L2296
+	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
+	.section	.text.Ftl_get_new_temp_ppa,"ax",@progbits
+	.align	2
+	.global	Ftl_get_new_temp_ppa
+	.type	Ftl_get_new_temp_ppa, %function
+Ftl_get_new_temp_ppa:
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR92
+	mov	w2, 65535
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	mov	x19, x0
+	ldrh	w3, [x0, #:lo12:.LANCHOR92]
+	cmp	w3, w2
+	beq	.L2309
+	add	x1, x0, :lo12:.LANCHOR92
+	ldrh	w0, [x1, 4]
+	cbnz	w0, .L2310
+.L2309:
+	bl	FtlCacheWriteBack
+	mov	w0, 0
+	bl	FtlGcFreeTempBlock
+	add	x0, x19, :lo12:.LANCHOR92
+	strb	wzr, [x0, 8]
+	bl	allocate_data_superblock
+	adrp	x0, .LANCHOR108
+	strh	wzr, [x0, #:lo12:.LANCHOR108]
+	adrp	x0, .LANCHOR110
+	strh	wzr, [x0, #:lo12:.LANCHOR110]
+	bl	l2p_flush
+	mov	w0, 0
+	bl	FtlEctTblFlush
+	bl	FtlVpcTblFlush
+.L2310:
+	add	x0, x19, :lo12:.LANCHOR92
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	b	get_new_active_ppa
+	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
+	.section	.text.Ftl_gc_temp_data_write_back,"ax",@progbits
+	.align	2
+	.global	Ftl_gc_temp_data_write_back
+	.type	Ftl_gc_temp_data_write_back, %function
+Ftl_gc_temp_data_write_back:
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR8
+	add	x29, sp, 0
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR102
+	cbz	w0, .L2313
+	ldr	w0, [x19, #:lo12:.LANCHOR102]
+	tbz	x0, 0, .L2313
+	adrp	x0, .LANCHOR92+4
+	ldrh	w0, [x0, #:lo12:.LANCHOR92+4]
+	cbz	w0, .L2313
+.L2318:
+	mov	w0, 0
+.L2312:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L2313:
+	adrp	x20, .LANCHOR179
+	ldr	w1, [x19, #:lo12:.LANCHOR102]
+	mov	w3, 0
+	mov	w2, 0
+	ldr	x0, [x20, #:lo12:.LANCHOR179]
+	add	x19, x19, :lo12:.LANCHOR102
+	bl	FlashProgPages
+	mov	w11, 0
+	mov	w12, 56
+.L2315:
+	ldr	w1, [x19]
+	cmp	w11, w1
+	bcc	.L2317
+	ldr	x0, [x20, #:lo12:.LANCHOR179]
+	bl	FtlGcBufFree
+	str	wzr, [x19]
+	adrp	x0, .LANCHOR92+4
+	ldrh	w0, [x0, #:lo12:.LANCHOR92+4]
+	cbnz	w0, .L2318
+	mov	w0, 1
+	bl	FtlGcFreeTempBlock
+	b	.L2329
+.L2317:
+	umull	x0, w11, w12
+	ldr	x2, [x20, #:lo12:.LANCHOR179]
+	add	x1, x2, x0
+	ldr	w2, [x2, x0]
+	cmn	w2, #1
+	bne	.L2316
+	adrp	x0, .LANCHOR92
+	adrp	x3, .LANCHOR82
+	ldrh	w4, [x0, #:lo12:.LANCHOR92]
+	ldr	x3, [x3, #:lo12:.LANCHOR82]
+	strh	wzr, [x3, x4, lsl 1]
+	strh	w2, [x0, #:lo12:.LANCHOR92]
+	adrp	x0, .LANCHOR136
+	add	x0, x0, :lo12:.LANCHOR136
+	ldr	w2, [x0, 96]
+	add	w2, w2, 1
+	str	w2, [x0, 96]
+	ldr	w0, [x1, 4]
+	lsr	w0, w0, 10
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	bl	FtlGcPageVarInit
+.L2329:
+	mov	w0, 1
+	b	.L2312
+.L2316:
+	ldr	x0, [x1, 16]
+	ldr	w1, [x1, 4]
+	ldp	w2, w0, [x0, 8]
+	bl	FtlGcUpdatePage
+	add	w11, w11, 1
+	and	w11, w11, 65535
+	b	.L2315
+	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
+	.section	.text.FtlGcPageRecovery,"ax",@progbits
+	.align	2
+	.global	FtlGcPageRecovery
+	.type	FtlGcPageRecovery, %function
+FtlGcPageRecovery:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR51
+	adrp	x19, .LANCHOR92
+	add	x19, x19, :lo12:.LANCHOR92
+	ldrh	w1, [x20, #:lo12:.LANCHOR51]
+	mov	x0, x19
+	bl	FtlGcScanTempBlk
+	ldrh	w1, [x19, 2]
+	ldrh	w0, [x20, #:lo12:.LANCHOR51]
+	cmp	w1, w0
+	bcc	.L2330
+	adrp	x0, .LANCHOR124
+	add	x0, x0, :lo12:.LANCHOR124
+	bl	FtlMapBlkWriteDumpData
+	mov	w0, 0
+	bl	FtlGcFreeTempBlock
+	adrp	x0, .LANCHOR132
+	str	wzr, [x0, #:lo12:.LANCHOR132]
+.L2330:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
+	.section	.text.FtlPowerLostRecovery,"ax",@progbits
+	.align	2
+	.global	FtlPowerLostRecovery
+	.type	FtlPowerLostRecovery, %function
+FtlPowerLostRecovery:
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR231
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	adrp	x19, .LANCHOR90
+	add	x19, x19, :lo12:.LANCHOR90
+	str	wzr, [x0, #:lo12:.LANCHOR231]
+	mov	x0, x19
+	bl	FtlRecoverySuperblock
+	mov	x0, x19
+	adrp	x19, .LANCHOR91
+	bl	FtlSlcSuperblockCheck
+	add	x19, x19, :lo12:.LANCHOR91
+	mov	x0, x19
+	bl	FtlRecoverySuperblock
+	mov	x0, x19
+	bl	FtlSlcSuperblockCheck
+	bl	FtlGcPageRecovery
+	mov	w0, -1
+	bl	decrement_vpc_count
+	mov	w0, 0
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
+	.section	.text.FtlSysBlkInit,"ax",@progbits
+	.align	2
+	.global	FtlSysBlkInit
+	.type	FtlSysBlkInit, %function
+FtlSysBlkInit:
+	stp	x29, x30, [sp, -64]!
+	adrp	x0, .LANCHOR229
+	mov	w1, -1
+	add	x29, sp, 0
+	strh	w1, [x0, #:lo12:.LANCHOR229]
+	adrp	x0, .LANCHOR37
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR230
+	ldrh	w0, [x0, #:lo12:.LANCHOR37]
+	stp	x21, x22, [sp, 32]
+	strh	wzr, [x19, #:lo12:.LANCHOR230]
+	str	x23, [sp, 48]
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlScanSysBlk
+	adrp	x0, .LANCHOR206
+	ldrh	w1, [x0, #:lo12:.LANCHOR206]
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L2336
+.L2338:
+	mov	w23, -1
+.L2335:
+	mov	w0, w23
+	ldr	x23, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+.L2336:
+	bl	FtlLoadSysInfo
+	mov	w23, w0
+	cbnz	w0, .L2338
+	bl	FtlLoadMapInfo
+	bl	FtlLoadVonderInfo
+	bl	Ftl_load_ext_data
+	bl	FtlLoadEctTbl
+	bl	FtlFreeSysBLkSort
+	bl	SupperBlkListInit
+	bl	FtlPowerLostRecovery
+	mov	w0, 1
+	bl	FtlUpdateVaildLpn
+	adrp	x2, .LANCHOR66
+	adrp	x0, .LANCHOR95
+	mov	x3, 4
+	ldrh	w2, [x2, #:lo12:.LANCHOR66]
+	ldr	x0, [x0, #:lo12:.LANCHOR95]
+	add	x2, x3, x2, uxtw 4
+	add	x1, x0, 4
+	add	x0, x0, x2
+.L2339:
+	cmp	x1, x0
+	bne	.L2341
+	ldrh	w0, [x19, #:lo12:.LANCHOR230]
+	cbnz	w0, .L2340
+	b	.L2335
+.L2341:
+	ldr	w2, [x1], 16
+	tbz	w2, #31, .L2339
+.L2340:
+	adrp	x22, .LANCHOR90
+	add	x20, x22, :lo12:.LANCHOR90
+	mov	x0, x20
+	adrp	x21, .LANCHOR91
+	bl	FtlSuperblockPowerLostFix
+	add	x19, x21, :lo12:.LANCHOR91
+	mov	x0, x19
+	bl	FtlSuperblockPowerLostFix
+	adrp	x0, .LANCHOR82
+	ldrh	w3, [x20, 4]
+	ldr	x1, [x0, #:lo12:.LANCHOR82]
+	ldrh	w0, [x22, #:lo12:.LANCHOR90]
+	lsl	x0, x0, 1
+	ldrh	w2, [x1, x0]
+	sub	w2, w2, w3
+	adrp	x3, .LANCHOR51
+	strh	w2, [x1, x0]
+	strb	wzr, [x20, 6]
+	ldrh	w0, [x3, #:lo12:.LANCHOR51]
+	strh	w0, [x20, 2]
+	ldrh	w0, [x21, #:lo12:.LANCHOR91]
+	strh	wzr, [x20, 4]
+	ldrh	w4, [x19, 4]
+	lsl	x0, x0, 1
+	ldrh	w2, [x1, x0]
+	sub	w2, w2, w4
+	strh	w2, [x1, x0]
+	strb	wzr, [x19, 6]
+	ldrh	w0, [x3, #:lo12:.LANCHOR51]
+	strh	w0, [x19, 2]
+	strh	wzr, [x19, 4]
+	adrp	x0, .LANCHOR124
+	add	x0, x0, :lo12:.LANCHOR124
+	bl	FtlMapBlkWriteDumpData
+	adrp	x0, .LANCHOR215
+	add	x0, x0, :lo12:.LANCHOR215
+	bl	FtlMapBlkWriteDumpData
+	adrp	x0, .LANCHOR135
+	add	x0, x0, :lo12:.LANCHOR135
+	ldrh	w1, [x0, 30]
+	add	w1, w1, 1
+	strh	w1, [x0, 30]
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	bl	FtlVpcTblFlush
+	b	.L2335
+	.size	FtlSysBlkInit, .-FtlSysBlkInit
+	.section	.text.rk_ftl_garbage_collect,"ax",@progbits
+	.align	2
+	.global	rk_ftl_garbage_collect
+	.type	rk_ftl_garbage_collect, %function
+rk_ftl_garbage_collect:
+	adrp	x1, .LANCHOR75
+	ldr	w1, [x1, #:lo12:.LANCHOR75]
+	cbnz	w1, .L2398
+	stp	x29, x30, [sp, -192]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR169
+	stp	x19, x20, [sp, 16]
+	ldr	w1, [x21, #:lo12:.LANCHOR169]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	cbnz	w1, .L2400
+	adrp	x1, .LANCHOR84
+	ldrh	w1, [x1, #:lo12:.LANCHOR84]
+	cmp	w1, 47
+	bls	.L2400
+	adrp	x1, .LANCHOR113
+	mov	w4, 65535
+	ldrh	w3, [x1, #:lo12:.LANCHOR113]
+	cmp	w3, w4
+	beq	.L2348
+	adrp	x2, .LANCHOR112
+	ldrh	w5, [x2, #:lo12:.LANCHOR112]
+	cmp	w5, w4
+	bne	.L2348
+	strh	w3, [x2, #:lo12:.LANCHOR112]
+	mov	w2, -1
+	strh	w2, [x1, #:lo12:.LANCHOR113]
+.L2348:
+	cbnz	w0, .L2401
+	adrp	x0, .LANCHOR87
+	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	cmp	w0, 24
+	bhi	.L2402
+	adrp	x1, .LANCHOR51
+	cmp	w0, 16
+	ldrh	w20, [x1, #:lo12:.LANCHOR51]
+	bls	.L2351
+	lsr	w20, w20, 5
+.L2350:
+	adrp	x2, .LANCHOR174
+	mov	x3, x2
+	ldrh	w1, [x2, #:lo12:.LANCHOR174]
+	cmp	w1, w0
+	bcs	.L2354
+	adrp	x0, .LANCHOR92
+	mov	w1, 65535
+	ldrh	w0, [x0, #:lo12:.LANCHOR92]
+	cmp	w0, w1
+	bne	.L2355
+	adrp	x1, .LANCHOR112
+	ldrh	w1, [x1, #:lo12:.LANCHOR112]
+	cmp	w1, w0
+	bne	.L2355
+	adrp	x0, .LANCHOR235
+	ldrh	w0, [x0, #:lo12:.LANCHOR235]
+	cbnz	w0, .L2356
+	adrp	x1, .LANCHOR71
+	adrp	x4, .LANCHOR99
+	ldr	w1, [x1, #:lo12:.LANCHOR71]
+	ldr	w4, [x4, #:lo12:.LANCHOR99]
+	add	w1, w1, w1, lsl 1
+	cmp	w4, w1, lsr 2
+	bcs	.L2357
+.L2356:
+	adrp	x1, .LANCHOR227
+	ldrh	w1, [x1, #:lo12:.LANCHOR227]
+	add	w1, w1, w1, lsl 1
+	asr	w1, w1, 2
+	strh	w1, [x3, #:lo12:.LANCHOR174]
+.L2358:
+	adrp	x1, .LANCHOR170
+	str	wzr, [x1, #:lo12:.LANCHOR170]
+.L2346:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 192
+	ret
+.L2351:
+	cmp	w0, 12
+	bls	.L2352
+	lsr	w20, w20, 4
+	b	.L2350
+.L2352:
+	cmp	w0, 8
+	bls	.L2350
+	lsr	w20, w20, 2
+	b	.L2350
+.L2402:
+	mov	w20, 1
+	b	.L2350
+.L2357:
+	mov	w1, 18
+	strh	w1, [x2, #:lo12:.LANCHOR174]
+	b	.L2358
+.L2355:
+	adrp	x0, .LANCHOR227
+	ldrh	w0, [x0, #:lo12:.LANCHOR227]
+	add	w0, w0, w0, lsl 1
+	asr	w0, w0, 2
+	strh	w0, [x3, #:lo12:.LANCHOR174]
+.L2354:
+	adrp	x0, .LANCHOR114
+	ldrh	w0, [x0, #:lo12:.LANCHOR114]
+	cbz	w0, .L2349
+	add	w20, w20, 32
+	and	w20, w20, 65535
+.L2349:
+	adrp	x19, .LANCHOR201
+	mov	w0, 65535
+	ldrh	w2, [x19, #:lo12:.LANCHOR201]
+	cmp	w2, w0
+	bne	.L2361
+	adrp	x0, .LANCHOR112
+	ldrh	w1, [x0, #:lo12:.LANCHOR112]
+	cmp	w1, w2
+	beq	.L2362
+	adrp	x2, .LANCHOR82
+	ubfiz	x1, x1, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR82]
+	ldrh	w1, [x2, x1]
+	cbnz	w1, .L2363
+	mov	w1, -1
+	strh	w1, [x0, #:lo12:.LANCHOR112]
+.L2363:
+	ldrh	w1, [x0, #:lo12:.LANCHOR112]
+	strh	w1, [x19, #:lo12:.LANCHOR201]
+	mov	w1, -1
+	strh	w1, [x0, #:lo12:.LANCHOR112]
+.L2362:
+	add	x0, x19, :lo12:.LANCHOR201
+	mov	w1, 65535
+	strb	wzr, [x0, 8]
+	ldrh	w0, [x19, #:lo12:.LANCHOR201]
+	cmp	w0, w1
+	beq	.L2361
+	bl	IsBlkInGcList
+	cbz	w0, .L2365
+	mov	w0, -1
+	strh	w0, [x19, #:lo12:.LANCHOR201]
+.L2365:
+	adrp	x0, .LANCHOR8
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	cbz	w0, .L2366
+	ldrh	w0, [x19, #:lo12:.LANCHOR201]
+	add	x3, x19, :lo12:.LANCHOR201
+	bl	ftl_get_blk_mode
+	strb	w0, [x3, 8]
+.L2366:
+	ldrh	w1, [x19, #:lo12:.LANCHOR201]
+	mov	w0, 65535
+	add	x22, x19, :lo12:.LANCHOR201
+	cmp	w1, w0
+	beq	.L2361
+	mov	x0, x22
+	bl	make_superblock
+	adrp	x0, .LANCHOR236
+	ldrh	w1, [x19, #:lo12:.LANCHOR201]
+	strh	wzr, [x22, 2]
+	strh	wzr, [x0, #:lo12:.LANCHOR236]
+	adrp	x0, .LANCHOR82
+	strb	wzr, [x22, 6]
+	ldr	x0, [x0, #:lo12:.LANCHOR82]
+	ldrh	w1, [x0, x1, lsl 1]
+	adrp	x0, .LANCHOR237
+	strh	w1, [x0, #:lo12:.LANCHOR237]
+.L2361:
+	adrp	x0, .LANCHOR90
+	ldrh	w1, [x19, #:lo12:.LANCHOR201]
+	str	x0, [x29, 144]
+	ldrh	w2, [x0, #:lo12:.LANCHOR90]
+	cmp	w2, w1
+	beq	.L2367
+	adrp	x0, .LANCHOR91
+	str	x0, [x29, 136]
+	ldrh	w2, [x0, #:lo12:.LANCHOR91]
+	cmp	w2, w1
+	beq	.L2367
+	adrp	x23, .LANCHOR176
+	add	x0, x23, :lo12:.LANCHOR176
+	str	x0, [x29, 168]
+.L2368:
+	ldrh	w1, [x19, #:lo12:.LANCHOR201]
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L2369
+	adrp	x0, .LANCHOR170
+	adrp	x22, .LANCHOR51
+	add	x22, x22, :lo12:.LANCHOR51
+	str	wzr, [x0, #:lo12:.LANCHOR170]
+.L2370:
+	ldrh	w5, [x23, #:lo12:.LANCHOR176]
+	add	x7, x23, :lo12:.LANCHOR176
+	mov	w0, w5
+	bl	List_get_gc_head_node
+	and	w6, w0, 65535
+	strh	w6, [x19, #:lo12:.LANCHOR201]
+	mov	w0, 65535
+	cmp	w6, w0
+	bne	.L2371
+	strh	wzr, [x7]
+	mov	w0, 8
+	b	.L2346
+.L2401:
+	mov	w20, 1
+	b	.L2349
+.L2367:
+	mov	w0, -1
+	strh	w0, [x19, #:lo12:.LANCHOR201]
+.L2437:
+	adrp	x0, .LANCHOR235
+	ldrh	w0, [x0, #:lo12:.LANCHOR235]
+	b	.L2346
+.L2371:
+	mov	w0, w6
+	bl	IsBlkInGcList
+	add	w5, w5, 1
+	cbz	w0, .L2372
+	strh	w5, [x23, #:lo12:.LANCHOR176]
+	b	.L2370
+.L2372:
+	adrp	x24, .LANCHOR82
+	adrp	x4, .LANCHOR36
+	ldrh	w0, [x22]
+	ubfiz	x1, x6, 1, 16
+	ldr	x2, [x24, #:lo12:.LANCHOR82]
+	and	w5, w5, 65535
+	ldrh	w4, [x4, #:lo12:.LANCHOR36]
+	strh	w5, [x23, #:lo12:.LANCHOR176]
+	ldrh	w3, [x2, x1]
+	mul	w0, w0, w4
+	cmp	w3, w0, asr 1
+	bgt	.L2374
+	cmp	w5, 48
+	bls	.L2375
+	cmp	w3, 8
+	bls	.L2375
+	adrp	x3, .LANCHOR108
+	ldrh	w3, [x3, #:lo12:.LANCHOR108]
+	cmp	w3, 35
+	bhi	.L2375
+.L2374:
+	ldr	x3, [x29, 168]
+	strh	wzr, [x3]
+.L2375:
+	ldrh	w1, [x2, x1]
+	cmp	w0, w1
+	bgt	.L2376
+	mov	w0, -1
+	strh	w0, [x19, #:lo12:.LANCHOR201]
+	adrp	x0, .LANCHOR176
+	strh	wzr, [x0, #:lo12:.LANCHOR176]
+	b	.L2437
+.L2376:
+	cbnz	w1, .L2377
+	mov	w0, -1
+	bl	decrement_vpc_count
+	ldr	x0, [x29, 168]
+	ldr	x1, [x29, 168]
+	ldrh	w0, [x0]
+	add	w0, w0, 1
+	strh	w0, [x1]
+	b	.L2370
+.L2377:
+	adrp	x0, .LANCHOR8
+	add	x3, x19, :lo12:.LANCHOR201
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	strb	wzr, [x3, 8]
+	cbz	w0, .L2378
+	mov	w0, w6
+	bl	ftl_get_blk_mode
+	strb	w0, [x3, 8]
+.L2378:
+	ldr	x0, [x29, 144]
+	ldrh	w0, [x0, #:lo12:.LANCHOR90]
+	cmp	w0, w6
+	bne	.L2379
+	mov	w2, 835
+	adrp	x1, .LANCHOR238
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR238
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L2379:
+	ldr	x0, [x29, 136]
+	ldrh	w1, [x19, #:lo12:.LANCHOR201]
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	cmp	w1, w0
+	bne	.L2380
+	mov	w2, 836
+	adrp	x1, .LANCHOR238
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR238
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L2380:
+	adrp	x0, .LANCHOR92
+	ldrh	w1, [x19, #:lo12:.LANCHOR201]
+	ldrh	w0, [x0, #:lo12:.LANCHOR92]
+	cmp	w1, w0
+	bne	.L2381
+	mov	w2, 837
+	adrp	x1, .LANCHOR238
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR238
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L2381:
+	add	x22, x19, :lo12:.LANCHOR201
+	mov	x0, x22
+	bl	make_superblock
+	adrp	x0, .LANCHOR236
+	ldrh	w1, [x19, #:lo12:.LANCHOR201]
+	strh	wzr, [x0, #:lo12:.LANCHOR236]
+	ldr	x0, [x24, #:lo12:.LANCHOR82]
+	ldrh	w1, [x0, x1, lsl 1]
+	adrp	x0, .LANCHOR237
+	strh	wzr, [x22, 2]
+	strh	w1, [x0, #:lo12:.LANCHOR237]
+	strb	wzr, [x22, 6]
+.L2369:
+	mov	w0, 1
+	str	w0, [x21, #:lo12:.LANCHOR169]
+	adrp	x0, .LANCHOR8
+	adrp	x1, .LANCHOR51
+	stp	x0, x1, [x29, 120]
+	ldrb	w2, [x0, #:lo12:.LANCHOR8]
+	ldrh	w26, [x1, #:lo12:.LANCHOR51]
+	cbz	w2, .L2382
+	add	x0, x19, :lo12:.LANCHOR201
+	ldrb	w0, [x0, 8]
+	cmp	w0, 1
+	bne	.L2382
+	adrp	x0, .LANCHOR52
+	ldrh	w26, [x0, #:lo12:.LANCHOR52]
+.L2382:
+	add	x0, x19, :lo12:.LANCHOR201
+	ldrh	w0, [x0, 2]
+	add	w1, w0, w20
+	cmp	w1, w26
+	ble	.L2383
+	sub	w20, w26, w0
+	and	w20, w20, 65535
+.L2383:
+	adrp	x0, .LANCHOR236
+	mov	w27, 0
+	add	x0, x0, :lo12:.LANCHOR236
+	str	x0, [x29, 160]
+.L2384:
+	cmp	w20, w27, uxth
+	bls	.L2392
+	add	x1, x19, :lo12:.LANCHOR201
+	adrp	x0, .LANCHOR36
+	adrp	x24, .LANCHOR106
+	add	x1, x1, 16
+	ldrh	w7, [x0, #:lo12:.LANCHOR36]
+	mov	w22, 0
+	ldrh	w4, [x1, -14]
+	mov	w2, 0
+	ldr	x0, [x24, #:lo12:.LANCHOR106]
+	mov	w6, 65535
+	add	w4, w4, w27
+	mov	w5, 56
+	b	.L2393
+.L2386:
+	ldrh	w3, [x1]
+	cmp	w3, w6
+	beq	.L2385
+	umaddl	x8, w22, w5, x0
+	add	w22, w22, 1
+	and	w22, w22, 65535
+	orr	w3, w4, w3, lsl 10
+	str	w3, [x8, 4]
+.L2385:
+	add	w2, w2, 1
+	add	x1, x1, 2
+	and	w2, w2, 65535
+.L2393:
+	cmp	w2, w7
+	bne	.L2386
+	add	x1, x19, :lo12:.LANCHOR201
+	adrp	x25, .LANCHOR102
+	add	x25, x25, :lo12:.LANCHOR102
+	ldrb	w2, [x1, 8]
+	mov	w1, w22
+	bl	FlashReadPages
+	mov	w0, 56
+	umull	x0, w22, w0
+	mov	x22, 0
+	str	x0, [x29, 152]
+.L2387:
+	ldr	x0, [x29, 152]
+	cmp	x22, x0
+	bne	.L2391
+	add	w27, w27, 1
+	b	.L2384
+.L2391:
+	ldr	x0, [x24, #:lo12:.LANCHOR106]
+	add	x1, x0, x22
+	ldr	w0, [x0, x22]
+	cmn	w0, #1
+	beq	.L2388
+	ldr	x28, [x1, 16]
+	mov	w0, 61589
+	ldrh	w1, [x28]
+	cmp	w1, w0
+	bne	.L2388
+	ldr	w4, [x28, 8]
+	cmn	w4, #1
+	bne	.L2389
+	mov	w2, 876
+	str	w4, [x29, 112]
+	adrp	x1, .LANCHOR238
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR238
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+	ldr	w4, [x29, 112]
+.L2389:
+	mov	w2, 0
+	add	x1, x29, 188
+	mov	w0, w4
+	bl	log2phys
+	ldr	x0, [x24, #:lo12:.LANCHOR106]
+	ldr	w1, [x29, 188]
+	add	x0, x0, x22
+	and	w1, w1, 2147483647
+	ldr	w2, [x0, 4]
+	cmp	w1, w2
+	bne	.L2388
+	ldr	x1, [x29, 160]
+	adrp	x4, .LANCHOR179
+	ldr	x2, [x29, 160]
+	ldr	x5, [x4, #:lo12:.LANCHOR179]
+	ldr	w0, [x0, 24]
+	ldrh	w1, [x1]
+	str	x4, [x29, 96]
+	add	w1, w1, 1
+	strh	w1, [x2]
+	ldr	w2, [x25]
+	mov	w1, 56
+	str	w1, [x29, 108]
+	nop // between mem op and mult-accumulate
+	umaddl	x2, w2, w1, x5
+	str	x2, [x29, 112]
+	str	w0, [x2, 24]
+	bl	Ftl_get_new_temp_ppa
+	ldr	x4, [x29, 96]
+	ldr	x2, [x29, 112]
+	ldr	w1, [x29, 108]
+	str	w0, [x2, 4]
+	ldr	x0, [x4, #:lo12:.LANCHOR179]
+	ldr	w2, [x25]
+	umaddl	x1, w2, w1, x0
+	ldr	x0, [x24, #:lo12:.LANCHOR106]
+	add	w2, w2, 1
+	add	x0, x0, x22
+	ldr	x4, [x0, 8]
+	str	x4, [x1, 8]
+	ldr	x4, [x0, 16]
+	str	x4, [x1, 16]
+	ldr	w1, [x29, 188]
+	str	w1, [x28, 12]
+	adrp	x1, .LANCHOR92
+	add	x12, x1, :lo12:.LANCHOR92
+	ldrh	w1, [x1, #:lo12:.LANCHOR92]
+	strh	w1, [x28, 2]
+	adrp	x1, .LANCHOR158
+	str	w2, [x25]
+	ldr	w1, [x1, #:lo12:.LANCHOR158]
+	str	w1, [x28, 4]
+	mov	w1, 1
+	bl	FtlGcBufAlloc
+	ldr	x0, [x29, 120]
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	cbnz	w0, .L2390
+	ldrb	w1, [x12, 7]
+	ldr	w0, [x25]
+	cmp	w1, w0
+	beq	.L2390
+	ldrh	w0, [x12, 4]
+	cbnz	w0, .L2388
+.L2390:
+	bl	Ftl_gc_temp_data_write_back
+	cbz	w0, .L2388
+.L2438:
+	str	wzr, [x21, #:lo12:.LANCHOR169]
+	b	.L2437
+.L2388:
+	add	x22, x22, 56
+	b	.L2387
+.L2392:
+	add	x1, x19, :lo12:.LANCHOR201
+	ldrh	w0, [x1, 2]
+	add	w20, w20, w0
+	and	w20, w20, 65535
+	strh	w20, [x1, 2]
+	cmp	w26, w20
+	bhi	.L2394
+	adrp	x0, .LANCHOR102
+	ldr	w0, [x0, #:lo12:.LANCHOR102]
+	cbz	w0, .L2395
+	bl	Ftl_gc_temp_data_write_back
+	cbnz	w0, .L2438
+.L2395:
+	adrp	x0, .LANCHOR236
+	ldrh	w0, [x0, #:lo12:.LANCHOR236]
+	cbnz	w0, .L2396
+	ldrh	w0, [x19, #:lo12:.LANCHOR201]
+	adrp	x1, .LANCHOR82
+	ldr	x1, [x1, #:lo12:.LANCHOR82]
+	lsl	x0, x0, 1
+	ldrh	w2, [x1, x0]
+	cbz	w2, .L2396
+	strh	wzr, [x1, x0]
+	ldrh	w0, [x19, #:lo12:.LANCHOR201]
+	bl	update_vpc_list
+	bl	FtlCacheWriteBack
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+.L2396:
+	mov	w0, -1
+	strh	w0, [x19, #:lo12:.LANCHOR201]
+.L2394:
+	adrp	x0, .LANCHOR87
+	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	cmp	w0, 2
+	bhi	.L2397
+	ldr	x0, [x29, 128]
+	ldrh	w20, [x0, #:lo12:.LANCHOR51]
+	b	.L2368
+.L2397:
+	str	wzr, [x21, #:lo12:.LANCHOR169]
+	add	w0, w0, 1
+	b	.L2346
+.L2398:
+	mov	w0, 0
+	ret
+.L2400:
+	mov	w0, 0
+	b	.L2346
+	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
+	.section	.text.FtlInit,"ax",@progbits
+	.align	2
+	.global	FtlInit
+	.type	FtlInit, %function
+FtlInit:
+	stp	x29, x30, [sp, -32]!
+	adrp	x1, .LC48
+	add	x1, x1, :lo12:.LC48
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR223
+	mov	x20, x0
+	mov	w0, -1
+	str	w0, [x19, #:lo12:.LANCHOR223]
+	adrp	x0, .LANCHOR239
+	str	wzr, [x0, #:lo12:.LANCHOR239]
+	adrp	x0, .LANCHOR75
+	str	wzr, [x0, #:lo12:.LANCHOR75]
+	adrp	x0, .LC6
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+	mov	x0, x20
+	bl	FtlConstantsInit
+	bl	FtlMemInit
+	bl	FtlVariablesInit
+	adrp	x0, .LANCHOR37
+	ldrh	w0, [x0, #:lo12:.LANCHOR37]
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlLoadBbt
+	cbz	w0, .L2440
+	adrp	x1, .LANCHOR240
+	adrp	x0, .LC49
+	add	x1, x1, :lo12:.LANCHOR240
+	add	x0, x0, :lo12:.LC49
+.L2448:
+	bl	printf
+.L2441:
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L2440:
+	bl	FtlSysBlkInit
+	cbz	w0, .L2442
+	adrp	x1, .LANCHOR240
+	adrp	x0, .LC50
+	add	x1, x1, :lo12:.LANCHOR240
+	add	x0, x0, :lo12:.LC50
+	b	.L2448
+.L2442:
+	mov	w1, 1
+	str	w1, [x19, #:lo12:.LANCHOR223]
+	bl	rk_ftl_garbage_collect
+	adrp	x0, .LANCHOR87
+	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	cmp	w0, 15
+	bhi	.L2441
+	mov	w19, 1024
+.L2444:
+	mov	w1, 1
+	mov	w0, w1
+	bl	rk_ftl_garbage_collect
+	subs	w19, w19, #1
+	bne	.L2444
+	b	.L2441
+	.size	FtlInit, .-FtlInit
+	.section	.text.rk_ftl_init,"ax",@progbits
+	.align	2
+	.global	rk_ftl_init
+	.type	rk_ftl_init, %function
+rk_ftl_init:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	bl	FlashInit
+	mov	w19, w0
+	cbnz	w0, .L2450
+	adrp	x0, .LANCHOR15
+	add	x0, x0, :lo12:.LANCHOR15
+	bl	FtlInit
+.L2450:
+	mov	w1, w19
+	adrp	x0, .LC51
+	add	x0, x0, :lo12:.LC51
+	bl	printf
+	mov	w0, w19
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	rk_ftl_init, .-rk_ftl_init
+	.section	.text.ftl_fix_nand_power_lost_error,"ax",@progbits
+	.align	2
+	.global	ftl_fix_nand_power_lost_error
+	.type	ftl_fix_nand_power_lost_error, %function
+ftl_fix_nand_power_lost_error:
+	adrp	x0, .LANCHOR8
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	cbz	w0, .L2467
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	str	x25, [sp, 64]
+	adrp	x25, .LANCHOR229
+	stp	x23, x24, [sp, 48]
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR82
+	ldrh	w23, [x25, #:lo12:.LANCHOR229]
+	ldr	x0, [x21, #:lo12:.LANCHOR82]
+	mov	w1, w23
+	stp	x19, x20, [sp, 16]
+	ubfiz	x24, x23, 1, 16
+	adrp	x19, .LC52
+	ldrh	w2, [x0, x24]
+	add	x0, x19, :lo12:.LC52
+	bl	printf
+	adrp	x0, .LANCHOR90
+	add	x6, x0, :lo12:.LANCHOR90
+	ldrh	w0, [x0, #:lo12:.LANCHOR90]
+	bl	FtlGcRefreshBlock
+	adrp	x0, .LANCHOR91
+	add	x20, x0, :lo12:.LANCHOR91
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	bl	FtlGcRefreshBlock
+	mov	x0, x6
+	bl	allocate_new_data_superblock
+	mov	x0, x20
+	mov	w20, 4097
+	bl	allocate_new_data_superblock
+.L2454:
+	subs	w20, w20, #1
+	beq	.L2458
+	mov	w1, 1
+	mov	w0, w1
+	bl	rk_ftl_garbage_collect
+	ldr	x0, [x21, #:lo12:.LANCHOR82]
+	ldrh	w0, [x0, x24]
+	cbnz	w0, .L2454
+.L2458:
+	ldr	x0, [x21, #:lo12:.LANCHOR82]
+	mov	w1, w23
+	ldrh	w2, [x0, x24]
+	add	x0, x19, :lo12:.LC52
+	bl	printf
+	ldr	x0, [x21, #:lo12:.LANCHOR82]
+	ldrh	w19, [x0, x24]
+	cbnz	w19, .L2456
+	add	x20, x29, 128
+	adrp	x22, .LANCHOR76
+	strh	w23, [x20, -48]!
+	mov	x0, x20
+	bl	make_superblock
+	adrp	x0, .LANCHOR36
+	ldr	x4, [x22, #:lo12:.LANCHOR76]
+	add	x20, x20, 16
+	mov	w5, 65535
+	ldrh	w3, [x0, #:lo12:.LANCHOR36]
+	mov	w6, 56
+	mov	w0, 0
+.L2459:
+	cmp	w0, w3
+	bne	.L2461
+	ldr	x0, [x21, #:lo12:.LANCHOR82]
+	mov	w1, w23
+	ldrh	w2, [x0, x24]
+	adrp	x0, .LC53
+	add	x0, x0, :lo12:.LC53
+	bl	printf
+	ldr	x0, [x22, #:lo12:.LANCHOR76]
+	mov	w2, w19
+	mov	w1, 0
+	bl	FlashEraseBlocks
+	ldr	x0, [x22, #:lo12:.LANCHOR76]
+	mov	w2, w19
+	mov	w1, 1
+	bl	FlashEraseBlocks
+.L2456:
+	mov	w0, -1
+	strh	w0, [x25, #:lo12:.LANCHOR229]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 128
+	ret
+.L2461:
+	ldrh	w1, [x20]
+	cmp	w1, w5
+	beq	.L2460
+	umaddl	x2, w19, w6, x4
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	lsl	w1, w1, 10
+	stp	xzr, xzr, [x2, 8]
+	str	w1, [x2, 4]
+.L2460:
+	add	w0, w0, 1
+	add	x20, x20, 2
+	and	w0, w0, 65535
+	b	.L2459
+.L2467:
+	ret
+	.size	ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error
+	.section	.text.ftl_read,"ax",@progbits
+	.align	2
+	.global	ftl_read
+	.type	ftl_read, %function
+ftl_read:
+	stp	x29, x30, [sp, -176]!
+	and	w0, w0, 255
+	cmp	w0, 16
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w19, w1
+	stp	x23, x24, [sp, 48]
+	mov	x23, x3
+	stp	x25, x26, [sp, 64]
+	mov	w26, w2
+	stp	x21, x22, [sp, 32]
+	stp	x27, x28, [sp, 80]
+	bne	.L2471
+	mov	x2, x3
+	mov	w1, w26
+	add	w0, w19, 256
+	bl	FtlVendorPartRead
+	mov	w21, w0
+.L2470:
+	mov	w0, w21
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 176
+	ret
+.L2471:
+	add	w0, w1, w2
+	str	w0, [x29, 136]
+	adrp	x0, .LANCHOR67
+	add	w1, w1, w2
+	ldr	w0, [x0, #:lo12:.LANCHOR67]
+	cmp	w1, w0
+	bhi	.L2493
+	adrp	x0, .LANCHOR223
+	ldr	w21, [x0, #:lo12:.LANCHOR223]
+	cmn	w21, #1
+	beq	.L2470
+	adrp	x22, .LANCHOR54
+	bl	FtlCacheWriteBack
+	mov	w25, 0
+	mov	w21, 0
+	ldrh	w0, [x22, #:lo12:.LANCHOR54]
+	adrp	x27, .LANCHOR178
+	stp	wzr, wzr, [x29, 144]
+	udiv	w1, w19, w0
+	str	w1, [x29, 152]
+	add	w1, w19, w26
+	sub	w24, w1, #1
+	adrp	x1, .LANCHOR164
+	ldr	w20, [x29, 152]
+	udiv	w24, w24, w0
+	ldr	w0, [x29, 152]
+	sub	w0, w24, w0
+	add	w0, w0, 1
+	str	w0, [x29, 156]
+	ldr	w0, [x1, #:lo12:.LANCHOR164]
+	ldr	w2, [x29, 156]
+	add	w0, w0, w2
+	str	w0, [x1, #:lo12:.LANCHOR164]
+.L2473:
+	ldr	w0, [x29, 156]
+	cbnz	w0, .L2492
+	adrp	x0, .LANCHOR114
+	ldrh	w0, [x0, #:lo12:.LANCHOR114]
+	cbz	w0, .L2470
+	mov	w1, 1
+	mov	w0, 0
+	bl	rk_ftl_garbage_collect
+	b	.L2470
+.L2492:
+	add	x1, x29, 172
+	mov	w2, 0
+	mov	w0, w20
+	bl	log2phys
+	ldr	w1, [x29, 172]
+	cmn	w1, #1
+	bne	.L2474
+	add	x3, x22, :lo12:.LANCHOR54
+	mov	w28, 0
+.L2475:
+	ldrh	w0, [x3]
+	cmp	w28, w0
+	bcc	.L2477
+.L2478:
+	ldr	w0, [x29, 156]
+	add	w20, w20, 1
+	subs	w0, w0, #1
+	str	w0, [x29, 156]
+	beq	.L2482
+	adrp	x0, .LANCHOR36
+	ldrh	w0, [x0, #:lo12:.LANCHOR36]
+	cmp	w25, w0, lsl 2
+	bne	.L2473
+.L2482:
+	cbz	w25, .L2473
+	ldr	x0, [x27, #:lo12:.LANCHOR178]
+	mov	w1, w25
+	mov	w2, 0
+	bl	FlashReadPages
+	ldr	w0, [x29, 144]
+	lsl	w0, w0, 9
+	str	w0, [x29, 120]
+	ldr	w0, [x29, 140]
+	lsl	w0, w0, 9
+	str	x0, [x29, 128]
+	ldr	w0, [x29, 148]
+	lsl	w0, w0, 9
+	str	w0, [x29, 124]
+	mov	w0, 56
+	umull	x0, w25, w0
+	mov	x25, 0
+	str	x0, [x29, 104]
+	adrp	x0, .LANCHOR136
+	add	x28, x0, :lo12:.LANCHOR136
+.L2491:
+	ldr	x0, [x27, #:lo12:.LANCHOR178]
+	ldr	w2, [x29, 152]
+	add	x0, x0, x25
+	ldr	w1, [x0, 24]
+	cmp	w2, w1
+	bne	.L2484
+	ldr	x1, [x0, 8]
+	adrp	x0, .LANCHOR183
+	ldr	x0, [x0, #:lo12:.LANCHOR183]
+	cmp	x1, x0
+	bne	.L2485
+	ldr	x0, [x29, 128]
+	ldr	w2, [x29, 124]
+	add	x1, x1, x0
+	mov	x0, x23
+.L2508:
+	bl	ftl_memcpy
+.L2485:
+	ldr	x0, [x27, #:lo12:.LANCHOR178]
+	add	x1, x0, x25
+	ldr	w0, [x0, x25]
+	cmn	w0, #1
+	bne	.L2486
+	ldr	w1, [x28, 72]
+	mov	w21, w0
+	add	w1, w1, 1
+	str	w1, [x28, 72]
+.L2487:
+	ldr	x0, [x29, 104]
+	add	x25, x25, 56
+	cmp	x0, x25
+	bne	.L2491
+	mov	w25, 0
+	b	.L2473
+.L2477:
+	madd	w0, w20, w0, w28
+	cmp	w19, w0
+	bhi	.L2476
+	ldr	w1, [x29, 136]
+	cmp	w1, w0
+	bls	.L2476
+	sub	w0, w0, w19
+	str	x3, [x29, 128]
+	lsl	w0, w0, 9
+	mov	w2, 512
+	mov	w1, 0
+	add	x0, x23, x0
+	bl	ftl_memset
+	ldr	x3, [x29, 128]
+.L2476:
+	add	w28, w28, 1
+	b	.L2475
+.L2474:
+	ldr	x0, [x27, #:lo12:.LANCHOR178]
+	mov	w2, 56
+	umaddl	x0, w25, w2, x0
+	str	w1, [x0, 4]
+	ldr	w1, [x29, 152]
+	cmp	w20, w1
+	bne	.L2479
+	adrp	x1, .LANCHOR183
+	ldr	x1, [x1, #:lo12:.LANCHOR183]
+	str	x1, [x0, 8]
+	ldrh	w1, [x22, #:lo12:.LANCHOR54]
+	udiv	w2, w19, w1
+	msub	w2, w2, w1, w19
+	str	w2, [x29, 140]
+	sub	w2, w1, w2
+	cmp	w26, w2
+	csel	w2, w26, w2, ls
+	str	w2, [x29, 148]
+	cmp	w1, w2
+	bne	.L2480
+	str	x23, [x0, 8]
+.L2480:
+	adrp	x1, .LANCHOR57
+	adrp	x2, .LANCHOR186
+	str	w20, [x0, 24]
+	ldrh	w1, [x1, #:lo12:.LANCHOR57]
+	ldr	x2, [x2, #:lo12:.LANCHOR186]
+	mul	w1, w1, w25
+	add	w25, w25, 1
+	and	x1, x1, 4294967292
+	add	x1, x2, x1
+	str	x1, [x0, 16]
+	b	.L2478
+.L2479:
+	cmp	w20, w24
+	bne	.L2481
+	ldrh	w2, [x22, #:lo12:.LANCHOR54]
+	adrp	x1, .LANCHOR184
+	ldr	w3, [x29, 136]
+	ldr	x1, [x1, #:lo12:.LANCHOR184]
+	str	x1, [x0, 8]
+	mul	w1, w20, w2
+	sub	w3, w3, w1
+	str	w3, [x29, 144]
+	cmp	w2, w3
+	bne	.L2480
+.L2507:
+	sub	w1, w1, w19
+	lsl	w1, w1, 9
+	add	x1, x23, x1
+	str	x1, [x0, 8]
+	b	.L2480
+.L2481:
+	ldrh	w1, [x22, #:lo12:.LANCHOR54]
+	mul	w1, w1, w20
+	b	.L2507
+.L2484:
+	cmp	w24, w1
+	bne	.L2485
+	ldr	x1, [x0, 8]
+	adrp	x0, .LANCHOR184
+	ldr	x0, [x0, #:lo12:.LANCHOR184]
+	cmp	x1, x0
+	bne	.L2485
+	ldrh	w0, [x22, #:lo12:.LANCHOR54]
+	ldr	w2, [x29, 120]
+	mul	w0, w0, w24
+	sub	w0, w0, w19
+	lsl	w0, w0, 9
+	add	x0, x23, x0
+	b	.L2508
+.L2486:
+	cmp	w0, 256
+	bne	.L2487
+	ldr	w0, [x1, 4]
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+	and	w1, w0, 65535
+	str	w1, [x29, 116]
+	bl	FtlGcRefreshBlock
+	mov	w2, 2049
+.L2489:
+	subs	w2, w2, #1
+	bne	.L2488
+.L2490:
+	bl	FtlSysFlush
+	b	.L2487
+.L2488:
+	mov	w1, 1
+	str	w2, [x29, 112]
+	mov	w0, w1
+	bl	rk_ftl_garbage_collect
+	adrp	x0, .LANCHOR201
+	ldp	w2, w1, [x29, 112]
+	ldrh	w0, [x0, #:lo12:.LANCHOR201]
+	cmp	w0, w1
+	beq	.L2489
+	b	.L2490
+.L2493:
+	mov	w21, -1
+	b	.L2470
+	.size	ftl_read, .-ftl_read
+	.section	.text.ftl_write,"ax",@progbits
+	.align	2
+	.global	ftl_write
+	.type	ftl_write, %function
+ftl_write:
+	stp	x29, x30, [sp, -240]!
+	and	w0, w0, 255
+	cmp	w0, 16
+	add	x29, sp, 0
+	stp	x25, x26, [sp, 64]
+	mov	w25, w2
+	stp	x21, x22, [sp, 32]
+	mov	x26, x3
+	stp	x19, x20, [sp, 16]
+	mov	w22, w1
+	stp	x23, x24, [sp, 48]
+	stp	x27, x28, [sp, 80]
+	bne	.L2510
+	mov	x2, x3
+	mov	w1, w25
+	add	w0, w22, 256
+	bl	FtlVendorPartWrite
+.L2509:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 240
+	ret
+.L2510:
+	adrp	x0, .LANCHOR67
+	add	w2, w1, w2
+	ldr	w0, [x0, #:lo12:.LANCHOR67]
+	cmp	w2, w0
+	bhi	.L2544
+	adrp	x0, .LANCHOR223
+	ldr	w0, [x0, #:lo12:.LANCHOR223]
+	cmn	w0, #1
+	beq	.L2509
+	adrp	x0, .LANCHOR241
+	adrp	x3, .LANCHOR54
+	mov	w1, 2048
+	sub	w2, w2, #1
+	str	w1, [x0, #:lo12:.LANCHOR241]
+	ldrh	w1, [x3, #:lo12:.LANCHOR54]
+	str	x3, [x29, 160]
+	udiv	w0, w2, w1
+	adrp	x2, .LANCHOR160
+	udiv	w21, w22, w1
+	str	w0, [x29, 152]
+	sub	w23, w0, w21
+	ldr	w0, [x2, #:lo12:.LANCHOR160]
+	add	w24, w23, 1
+	add	w0, w0, w24
+	str	w0, [x2, #:lo12:.LANCHOR160]
+	adrp	x0, .LANCHOR129
+	str	x0, [x29, 120]
+	ldr	x2, [x0, #:lo12:.LANCHOR129]
+	cbz	x2, .L2512
+	ldr	w0, [x2, 24]
+	cmp	w21, w0
+	beq	.L2513
+	bl	FtlCacheWriteBack
+.L2512:
+	adrp	x0, .LANCHOR90
+	mov	w19, w21
+	add	x23, x0, :lo12:.LANCHOR90
+.L2514:
+	cbz	w24, .L2543
+	adrp	x0, .LANCHOR90
+	add	x0, x0, :lo12:.LANCHOR90
+	adrp	x1, .LANCHOR36
+	str	x1, [x29, 112]
+	ldrb	w2, [x0, 6]
+	ldrh	w0, [x1, #:lo12:.LANCHOR36]
+	cmp	w2, w0
+	bcc	.L2515
+	mov	w2, 1632
+	adrp	x1, .LANCHOR242
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR242
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L2515:
+	ldrh	w0, [x23, 4]
+	cbnz	w0, .L2516
+	bl	FtlCacheWriteBack
+	mov	x0, x23
+	bl	allocate_new_data_superblock
+.L2516:
+	ldrb	w0, [x23, 7]
+	ldrh	w1, [x23, 4]
+	lsl	w0, w0, 2
+	cmp	w0, w1
+	csel	w0, w0, w1, ls
+	ldrb	w1, [x23, 6]
+	cmp	w0, w24
+	csel	w0, w0, w24, ls
+	str	w0, [x29, 144]
+	ldr	x0, [x29, 112]
+	ldrh	w0, [x0, #:lo12:.LANCHOR36]
+	cmp	w1, w0
+	bcc	.L2517
+	mov	w2, 1665
+	adrp	x1, .LANCHOR242
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR242
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L2517:
+	adrp	x0, .LANCHOR57
+	adrp	x28, .LANCHOR180
+	add	x0, x0, :lo12:.LANCHOR57
+	str	xzr, [x29, 168]
+	str	x0, [x29, 104]
+.L2518:
+	ldr	w1, [x29, 144]
+	ldr	w27, [x29, 168]
+	cmp	w27, w1
+	bcc	.L2539
+	mov	x27, x1
+.L2519:
+	ldr	x0, [x29, 120]
+	ldr	x0, [x0, #:lo12:.LANCHOR129]
+	cbz	x0, .L2540
+	sub	w24, w24, #1
+	subs	w27, w27, #1
+	bne	.L2540
+.L2543:
+	ldr	w0, [x29, 152]
+	sub	w1, w0, w21
+	mov	w0, 0
+	bl	rk_ftl_garbage_collect
+.L2546:
+	mov	w0, 0
+	b	.L2509
+.L2513:
+	adrp	x3, .LANCHOR162
+	ldr	w0, [x3, #:lo12:.LANCHOR162]
+	add	w0, w0, 1
+	str	w0, [x3, #:lo12:.LANCHOR162]
+	msub	w0, w21, w1, w22
+	ldr	x3, [x2, 8]
+	sub	w1, w1, w0
+	cmp	w25, w1
+	lsl	w0, w0, 9
+	csel	w19, w25, w1, ls
+	add	x0, x3, x0
+	lsl	w20, w19, 9
+	mov	x1, x26
+	mov	w2, w20
+	bl	ftl_memcpy
+	cbz	w23, .L2546
+	sub	w25, w25, w19
+	add	w22, w22, w19
+	add	x26, x26, x20
+	add	w21, w21, 1
+	bl	FtlCacheWriteBack
+	mov	w24, w23
+	b	.L2512
+.L2539:
+	ldrh	w0, [x23, 4]
+	cbz	w0, .L2519
+	add	x1, x29, 180
+	mov	w2, 0
+	mov	w0, w19
+	bl	log2phys
+	mov	x0, x23
+	mov	x20, 56
+	bl	get_new_active_ppa
+	ldr	x1, [x29, 168]
+	mul	x20, x1, x20
+	adrp	x1, .LANCHOR180
+	ldr	x1, [x1, #:lo12:.LANCHOR180]
+	add	x1, x1, x20
+	str	w0, [x1, 4]
+	ldr	x0, [x29, 104]
+	str	w19, [x1, 24]
+	ldrh	w2, [x0]
+	mul	w27, w27, w2
+	and	x0, x27, 4294967292
+	str	x0, [x29, 136]
+	adrp	x0, .LANCHOR186
+	ldr	x3, [x29, 136]
+	ldr	x0, [x0, #:lo12:.LANCHOR186]
+	str	x0, [x29, 128]
+	add	x27, x0, x3
+	str	x27, [x1, 16]
+	mov	x0, x27
+	mov	w1, 0
+	bl	ftl_memset
+	ldr	w0, [x29, 152]
+	cmp	w19, w21
+	ccmp	w19, w0, 4, ne
+	bne	.L2520
+	cmp	w19, w21
+	bne	.L2521
+	ldr	x0, [x29, 160]
+	ldrh	w2, [x0, #:lo12:.LANCHOR54]
+	udiv	w0, w22, w2
+	msub	w0, w0, w2, w22
+	str	w0, [x29, 148]
+	sub	w2, w2, w0
+	cmp	w2, w25
+	csel	w0, w2, w25, ls
+	str	w0, [x29, 156]
+.L2522:
+	ldr	x0, [x29, 160]
+	ldr	w1, [x29, 156]
+	ldrh	w0, [x0, #:lo12:.LANCHOR54]
+	cmp	w1, w0
+	ldr	x0, [x28, #:lo12:.LANCHOR180]
+	bne	.L2523
+	add	x20, x0, x20
+	cmp	w19, w21
+	bne	.L2524
+	str	x26, [x20, 8]
+.L2525:
+	ldr	x0, [x29, 112]
+	ldrb	w1, [x23, 6]
+	ldrh	w0, [x0, #:lo12:.LANCHOR36]
+	cmp	w1, w0
+	bcc	.L2536
+	mov	w2, 1739
+	adrp	x1, .LANCHOR242
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR242
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L2536:
+	ldp	x1, x2, [x29, 128]
+	mov	w0, -3947
+	strh	w0, [x1, x2]
+	adrp	x1, .LANCHOR158
+	ldr	w0, [x1, #:lo12:.LANCHOR158]
+	stp	w0, w19, [x27, 4]
+	add	w19, w19, 1
+	add	w0, w0, 1
+	cmn	w0, #1
+	csel	w0, w0, wzr, ne
+	str	w0, [x1, #:lo12:.LANCHOR158]
+	ldr	w0, [x29, 180]
+	str	w0, [x27, 12]
+	ldrh	w0, [x23]
+	strh	w0, [x27, 2]
+	ldr	x0, [x29, 168]
+	add	x0, x0, 1
+	str	x0, [x29, 168]
+	b	.L2518
+.L2521:
+	ldr	x0, [x29, 160]
+	add	w2, w22, w25
+	str	wzr, [x29, 148]
+	ldrh	w0, [x0, #:lo12:.LANCHOR54]
+	msub	w2, w19, w0, w2
+	and	w0, w2, 65535
+	str	w0, [x29, 156]
+	b	.L2522
+.L2524:
+	ldr	w0, [x29, 156]
+.L2561:
+	mul	w0, w0, w19
+	sub	w0, w0, w22
+	lsl	w0, w0, 9
+	add	x0, x26, x0
+	str	x0, [x20, 8]
+	b	.L2525
+.L2523:
+	add	x0, x0, x20
+	cmp	w19, w21
+	bne	.L2526
+	adrp	x1, .LANCHOR183
+	ldr	x1, [x1, #:lo12:.LANCHOR183]
+.L2560:
+	str	x1, [x0, 8]
+	ldr	w0, [x29, 180]
+	cmn	w0, #1
+	beq	.L2528
+	str	w0, [x29, 188]
+	mov	w2, 0
+	ldr	x0, [x28, #:lo12:.LANCHOR180]
+	str	w19, [x29, 208]
+	add	x0, x0, x20
+	ldp	x1, x0, [x0, 8]
+	stp	x1, x0, [x29, 192]
+	mov	w1, 1
+	add	x0, x29, 184
+	bl	FlashReadPages
+	ldr	w0, [x29, 184]
+	cmn	w0, #1
+	bne	.L2529
+	adrp	x0, .LANCHOR136
+	add	x0, x0, :lo12:.LANCHOR136
+	ldr	w1, [x0, 72]
+	add	w1, w1, 1
+	str	w1, [x0, 72]
+.L2532:
+	ldr	w0, [x29, 156]
+	cmp	w19, w21
+	lsl	w2, w0, 9
+	bne	.L2533
+	ldr	x1, [x28, #:lo12:.LANCHOR180]
+	ldr	w0, [x29, 148]
+	add	x1, x1, x20
+	lsl	w0, w0, 9
+	ldr	x4, [x1, 8]
+	mov	x1, x26
+	add	x0, x4, x0
+	bl	ftl_memcpy
+	ldr	w0, [x29, 152]
+	cmp	w19, w0
+	bne	.L2525
+.L2534:
+	ldrh	w0, [x23, 4]
+	cbz	w0, .L2525
+	ldr	x0, [x28, #:lo12:.LANCHOR180]
+	add	x20, x0, x20
+	ldr	x0, [x29, 120]
+	str	x20, [x0, #:lo12:.LANCHOR129]
+	adrp	x0, .LANCHOR221
+	str	x23, [x0, #:lo12:.LANCHOR221]
+	b	.L2525
+.L2526:
+	adrp	x1, .LANCHOR184
+	ldr	x1, [x1, #:lo12:.LANCHOR184]
+	b	.L2560
+.L2529:
+	ldr	w1, [x27, 8]
+	cmp	w19, w1
+	beq	.L2531
+	adrp	x0, .LANCHOR136
+	add	x0, x0, :lo12:.LANCHOR136
+	ldr	w2, [x0, 72]
+	add	w2, w2, 1
+	str	w2, [x0, 72]
+	adrp	x0, .LC54
+	mov	w2, w19
+	add	x0, x0, :lo12:.LC54
+	bl	printf
+.L2531:
+	ldr	w0, [x27, 8]
+	cmp	w19, w0
+	beq	.L2532
+	mov	w2, 1718
+	adrp	x1, .LANCHOR242
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR242
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+	b	.L2532
+.L2528:
+	ldr	x0, [x28, #:lo12:.LANCHOR180]
+	adrp	x1, .LANCHOR56
+	add	x0, x0, x20
+	ldrh	w2, [x1, #:lo12:.LANCHOR56]
+	mov	w1, 0
+	ldr	x0, [x0, 8]
+	bl	ftl_memset
+	b	.L2532
+.L2533:
+	ldr	x0, [x29, 160]
+	ldrh	w1, [x0, #:lo12:.LANCHOR54]
+	ldr	x0, [x28, #:lo12:.LANCHOR180]
+	add	x0, x0, x20
+	mul	w1, w1, w19
+	ldr	x0, [x0, 8]
+	sub	w1, w1, w22
+	lsl	w1, w1, 9
+	add	x1, x26, x1
+	bl	ftl_memcpy
+	b	.L2534
+.L2520:
+	adrp	x0, .LANCHOR180
+	ldr	x0, [x0, #:lo12:.LANCHOR180]
+	add	x20, x0, x20
+	ldr	x0, [x29, 160]
+	ldrh	w0, [x0, #:lo12:.LANCHOR54]
+	b	.L2561
+.L2540:
+	adrp	x0, .LANCHOR180
+	mov	x3, x23
+	mov	w2, 0
+	mov	w1, w27
+	ldr	x0, [x0, #:lo12:.LANCHOR180]
+	bl	FtlProgPages
+	cmp	w24, w27
+	bcs	.L2541
+	mov	w2, 1754
+	adrp	x1, .LANCHOR242
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR242
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L2541:
+	sub	w24, w24, w27
+	b	.L2514
+.L2544:
+	mov	w0, -1
+	b	.L2509
+	.size	ftl_write, .-ftl_write
+	.section	.text.FlashReadFacBbtData,"ax",@progbits
+	.align	2
+	.global	FlashReadFacBbtData
+	.type	FlashReadFacBbtData, %function
+FlashReadFacBbtData:
+	stp	x29, x30, [sp, -160]!
+	add	x29, sp, 0
+	stp	x25, x26, [sp, 64]
+	mov	w25, w1
+	adrp	x1, .LANCHOR15
+	add	x1, x1, :lo12:.LANCHOR15
+	stp	x23, x24, [sp, 48]
+	mov	x23, x0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR145
+	ldrh	w0, [x1, 14]
+	mov	w24, w2
+	ldrh	w1, [x1, 12]
+	stp	x19, x20, [sp, 16]
+	str	x27, [sp, 80]
+	mov	w27, 61664
+	mul	w0, w0, w1
+	ldr	x1, [x21, #:lo12:.LANCHOR145]
+	str	x1, [x29, 112]
+	and	w0, w0, 65535
+	adrp	x1, .LANCHOR194
+	sub	w20, w0, #1
+	sub	w19, w0, #15
+	ldr	x2, [x1, #:lo12:.LANCHOR194]
+	and	w20, w20, 65535
+	mul	w26, w0, w25
+	mov	x22, x1
+	str	x2, [x29, 120]
+.L2563:
+	cmp	w19, w20
+	ble	.L2570
+	mov	w0, -1
+.L2562:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 160
+	ret
+.L2570:
+	add	w0, w20, w26
+	mov	w2, 1
+	lsl	w0, w0, 10
+	mov	w1, w2
+	str	w0, [x29, 108]
+	add	x0, x29, 104
+	bl	FlashReadPages
+	ldr	w0, [x29, 104]
+	cmn	w0, #1
+	beq	.L2564
+	ldr	x0, [x22, #:lo12:.LANCHOR194]
+	ldrh	w0, [x0]
+	cmp	w0, w27
+	bne	.L2564
+	cbz	x23, .L2571
+	cbz	w25, .L2566
+.L2569:
+	ldr	x1, [x21, #:lo12:.LANCHOR145]
+	mov	w2, w24
+	mov	x0, x23
+	bl	ftl_memcpy
+	mov	w3, 4
+	adrp	x0, .LC55
+	mov	w2, w3
+	mov	x1, x23
+	add	x0, x0, :lo12:.LC55
+	bl	rknand_print_hex
+.L2571:
+	mov	w0, 0
+	b	.L2562
+.L2566:
+	ldr	x5, [x21, #:lo12:.LANCHOR145]
+	adrp	x2, .LANCHOR147
+	add	x2, x2, :lo12:.LANCHOR147
+	mov	w0, 0
+	mov	w6, 1
+.L2567:
+	ldr	w1, [x2]
+	cmp	w0, w1
+	bcs	.L2569
+	ubfx	x1, x0, 5, 11
+	and	w3, w0, 31
+	lsl	x1, x1, 2
+	add	w0, w0, 1
+	lsl	w4, w6, w3
+	and	w0, w0, 65535
+	ldr	w3, [x5, x1]
+	orr	w3, w3, w4
+	str	w3, [x5, x1]
+	b	.L2567
+.L2564:
+	sub	w20, w20, #1
+	and	w20, w20, 65535
+	b	.L2563
+	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
+	.section	.text.FlashGetBadBlockList,"ax",@progbits
+	.align	2
+	.global	FlashGetBadBlockList
+	.type	FlashGetBadBlockList, %function
+FlashGetBadBlockList:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x20, x0
+	adrp	x0, .LANCHOR18
+	ldr	x0, [x0, #:lo12:.LANCHOR18]
+	ldrh	w19, [x0, 14]
+	str	x21, [sp, 32]
+	adrp	x21, .LANCHOR151
+	ldrb	w2, [x0, 13]
+	ldr	x0, [x21, #:lo12:.LANCHOR151]
+	mul	w19, w19, w2
+	and	w19, w19, 65535
+	add	w2, w19, 7
+	lsr	w2, w2, 3
+	bl	FlashReadFacBbtData
+	cmn	w0, #1
+	bne	.L2577
+.L2581:
+	mov	w0, 0
+.L2578:
+	ubfiz	x0, x0, 1, 16
+	mov	w1, -1
+	ldr	x21, [sp, 32]
+	strh	w1, [x20, x0]
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+.L2577:
+	ldr	x4, [x21, #:lo12:.LANCHOR151]
+	lsr	w5, w19, 4
+	sub	w19, w19, #1
+	mov	w1, 0
+	mov	w0, 0
+	mov	w6, 1
+.L2579:
+	cmp	w1, w19
+	bge	.L2578
+	ubfx	x3, x1, 5, 11
+	and	w2, w1, 31
+	lsl	w2, w6, w2
+	ldr	w3, [x4, x3, lsl 2]
+	tst	w2, w3
+	beq	.L2580
+	add	w2, w0, 1
+	ubfiz	x0, x0, 1, 16
+	strh	w1, [x20, x0]
+	and	w0, w2, 65535
+.L2580:
+	cmp	w0, w5
+	bcs	.L2581
+	add	w1, w1, 1
+	and	w1, w1, 65535
+	b	.L2579
+	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
+	.section	.text.FtlMakeBbt,"ax",@progbits
+	.align	2
+	.global	FtlMakeBbt
+	.type	FtlMakeBbt, %function
+FtlMakeBbt:
+	stp	x29, x30, [sp, -128]!
+	adrp	x0, .LANCHOR75
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	ldr	w21, [x0, #:lo12:.LANCHOR75]
+	stp	x19, x20, [sp, 16]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	cbnz	w21, .L2588
+	bl	FtlBbtMemInit
+	adrp	x20, .LANCHOR73
+	add	x22, x20, :lo12:.LANCHOR73
+	bl	FtlLoadFactoryBbt
+	add	x24, x22, 32
+	adrp	x28, .LANCHOR199
+	add	x22, x22, 12
+	add	x25, x28, :lo12:.LANCHOR199
+	adrp	x0, .LANCHOR43
+	add	x0, x0, :lo12:.LANCHOR43
+	str	x0, [x29, 120]
+.L2589:
+	ldr	x0, [x29, 120]
+	ldrh	w0, [x0]
+	cmp	w21, w0
+	bcc	.L2595
+	adrp	x21, .LANCHOR58
+	add	x21, x21, :lo12:.LANCHOR58
+	mov	w19, 0
+.L2596:
+	ldrh	w0, [x21]
+	cmp	w0, w19
+	bhi	.L2597
+	add	x21, x20, :lo12:.LANCHOR73
+	mov	w22, 65535
+	ldrh	w19, [x21, 12]
+	sub	w19, w19, #1
+	and	w19, w19, 65535
+.L2598:
+	ldrh	w0, [x21, 12]
+	sub	w0, w0, #47
+	cmp	w0, w19
+	bgt	.L2602
+	mov	w0, w19
+	bl	FtlBbmIsBadBlock
+	cmp	w0, 1
+	beq	.L2599
+	mov	w0, w19
+	bl	FlashTestBlk
+	cbz	w0, .L2600
+	mov	w0, w19
+	bl	FtlBbmMapBadBlock
+.L2599:
+	sub	w19, w19, #1
+	and	w19, w19, 65535
+	b	.L2598
+.L2595:
+	adrp	x2, .LANCHOR185
+	adrp	x0, .LANCHOR79
+	add	x19, x28, :lo12:.LANCHOR199
+	ldrh	w1, [x22]
+	ldr	x0, [x0, #:lo12:.LANCHOR79]
+	mov	w3, 65535
+	ldr	x26, [x2, #:lo12:.LANCHOR185]
+	cmp	w1, w3
+	stp	x0, x26, [x19, 8]
+	adrp	x23, .LANCHOR49
+	str	x2, [x29, 112]
+	beq	.L2590
+	ldrh	w4, [x23, #:lo12:.LANCHOR49]
+	mov	w2, 1
+	madd	w27, w4, w21, w1
+	mov	w1, w2
+	lsl	w0, w27, 10
+	str	w0, [x19, 4]
+	mov	x0, x19
+	bl	FlashReadPages
+	ldr	x1, [x19, 8]
+	ldr	x0, [x24]
+	ldrh	w2, [x23, #:lo12:.LANCHOR49]
+	add	w2, w2, 7
+	lsr	w2, w2, 3
+	bl	ftl_memcpy
+.L2591:
+	mov	w0, w27
+	add	w21, w21, 1
+	bl	FtlBbmMapBadBlock
+	add	x24, x24, 8
+	add	x22, x22, 2
+	b	.L2589
+.L2590:
+	mov	w1, w21
+	bl	FlashGetBadBlockList
+	ldr	x0, [x19, 8]
+	adrp	x27, .LANCHOR120
+	ldr	x1, [x24]
+	bl	FtlBbt2Bitmap
+	ldrh	w19, [x23, #:lo12:.LANCHOR49]
+	add	x23, x23, :lo12:.LANCHOR49
+	add	x0, x27, :lo12:.LANCHOR120
+	sub	w19, w19, #1
+	str	x0, [x29, 104]
+	and	w19, w19, 65535
+.L2592:
+	ldrh	w0, [x23]
+	madd	w0, w21, w0, w19
+	bl	FtlBbmIsBadBlock
+	cmp	w0, 1
+	beq	.L2593
+	ldr	x0, [x29, 112]
+	mov	w2, 16
+	strh	w19, [x22]
+	mov	w1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR185]
+	bl	ftl_memset
+	mov	w0, -3872
+	strh	w0, [x26]
+	ldrh	w4, [x23]
+	ldrh	w0, [x22]
+	strh	w0, [x26, 2]
+	ldr	x1, [x24]
+	str	wzr, [x26, 4]
+	madd	w27, w4, w21, w0
+	lsl	w0, w27, 10
+	str	w0, [x25, 4]
+	ldr	x0, [x29, 104]
+	ldrh	w2, [x0]
+	ldr	x0, [x25, 8]
+	lsl	w2, w2, 2
+	bl	ftl_memcpy
+	mov	w2, 1
+	mov	x0, x25
+	mov	w1, w2
+	bl	FlashEraseBlocks
+	mov	w3, 1
+	mov	x0, x25
+	mov	w2, w3
+	mov	w1, w3
+	bl	FlashProgPages
+	ldr	w0, [x25]
+	cmn	w0, #1
+	bne	.L2591
+	mov	w0, w27
+	bl	FtlBbmMapBadBlock
+	b	.L2592
+.L2593:
+	sub	w19, w19, #1
+	and	w19, w19, 65535
+	b	.L2592
+.L2597:
+	mov	w0, w19
+	add	w19, w19, 1
+	bl	FtlBbmMapBadBlock
+	and	w19, w19, 65535
+	b	.L2596
+.L2600:
+	ldrh	w0, [x21]
+	cmp	w0, w22
+	bne	.L2601
+	strh	w19, [x21]
+	b	.L2599
+.L2601:
+	strh	w19, [x21, 4]
+.L2602:
+	adrp	x0, .LANCHOR76
+	add	x19, x20, :lo12:.LANCHOR73
+	ldrh	w1, [x20, #:lo12:.LANCHOR73]
+	mov	w2, 2
+	ldr	x0, [x0, #:lo12:.LANCHOR76]
+	str	wzr, [x19, 8]
+	lsl	w1, w1, 10
+	strh	wzr, [x19, 2]
+	str	w1, [x0, 4]
+	ldrh	w1, [x19, 4]
+	lsl	w1, w1, 10
+	str	w1, [x0, 60]
+	mov	w1, 1
+	bl	FlashEraseBlocks
+	ldrh	w0, [x20, #:lo12:.LANCHOR73]
+	bl	FtlBbmMapBadBlock
+	ldrh	w0, [x19, 4]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	strh	wzr, [x19, 2]
+	ldr	w0, [x19, 8]
+	ldrh	w1, [x19, 4]
+	add	w0, w0, 1
+	str	w0, [x19, 8]
+	ldrh	w0, [x20, #:lo12:.LANCHOR73]
+	strh	w0, [x19, 4]
+	strh	w1, [x20, #:lo12:.LANCHOR73]
+	bl	FtlBbmTblFlush
+.L2588:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+	.size	FtlMakeBbt, .-FtlMakeBbt
+	.section	.text.FtlLowFormat,"ax",@progbits
+	.align	2
+	.global	FtlLowFormat
+	.type	FtlLowFormat, %function
+FtlLowFormat:
+	stp	x29, x30, [sp, -80]!
+	adrp	x0, .LANCHOR65
+	mov	w1, 0
+	add	x29, sp, 0
+	ldrh	w2, [x0, #:lo12:.LANCHOR65]
+	adrp	x0, .LANCHOR192
+	stp	x19, x20, [sp, 16]
+	ldr	x0, [x0, #:lo12:.LANCHOR192]
+	stp	x21, x22, [sp, 32]
+	lsl	w2, w2, 2
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	bl	ftl_memset
+	adrp	x0, .LANCHOR75
+	ldr	w0, [x0, #:lo12:.LANCHOR75]
+	cbnz	w0, .L2610
+	adrp	x0, .LANCHOR158
+	adrp	x25, .LANCHOR37
+	adrp	x20, .LANCHOR157
+	str	wzr, [x0, #:lo12:.LANCHOR158]
+	ldrh	w0, [x25, #:lo12:.LANCHOR37]
+	str	wzr, [x20, #:lo12:.LANCHOR157]
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlLoadBbt
+	cbz	w0, .L2611
+	bl	FtlMakeBbt
+.L2611:
+	adrp	x22, .LANCHOR54
+	adrp	x0, .LANCHOR183
+	mov	w6, 23752
+	ldrh	w1, [x22, #:lo12:.LANCHOR54]
+	movk	w6, 0xa0f, lsl 16
+	ldr	x4, [x0, #:lo12:.LANCHOR183]
+	adrp	x0, .LANCHOR184
+	lsl	w1, w1, 7
+	ldr	x5, [x0, #:lo12:.LANCHOR184]
+	mov	w0, 0
+.L2612:
+	cmp	w0, w1
+	blt	.L2613
+	adrp	x21, .LANCHOR38
+	adrp	x19, .LANCHOR39
+	add	x26, x19, :lo12:.LANCHOR39
+	mov	w23, 0
+	ldrh	w24, [x21, #:lo12:.LANCHOR38]
+.L2614:
+	ldrh	w0, [x26]
+	cmp	w0, w24
+	bhi	.L2615
+	adrp	x24, .LANCHOR36
+	sub	w1, w23, #2
+	ldrh	w0, [x24, #:lo12:.LANCHOR36]
+	cmp	w1, w0, lsl 1
+	bgt	.L2616
+.L2620:
+	add	x26, x21, :lo12:.LANCHOR38
+	mov	w23, 0
+	mov	w25, 0
+.L2617:
+	ldrh	w0, [x26]
+	cmp	w0, w25
+	bhi	.L2621
+	adrp	x0, .LANCHOR72
+	ldrh	w1, [x19, #:lo12:.LANCHOR39]
+	ldrh	w3, [x24, #:lo12:.LANCHOR36]
+	str	w1, [x0, #:lo12:.LANCHOR72]
+	adrp	x0, .LANCHOR40
+	adrp	x1, .LANCHOR227
+	ldr	w2, [x0, #:lo12:.LANCHOR40]
+	adrp	x0, .LANCHOR71
+	udiv	w6, w2, w3
+	ubfx	x5, x6, 5, 16
+	str	w6, [x0, #:lo12:.LANCHOR71]
+	add	w4, w5, 36
+	strh	w4, [x1, #:lo12:.LANCHOR227]
+	mov	w4, 24
+	mul	w4, w3, w4
+	cmp	w23, w4
+	ble	.L2622
+	sub	w2, w2, w23
+	udiv	w2, w2, w3
+	str	w2, [x0, #:lo12:.LANCHOR71]
+	lsr	w2, w2, 5
+	add	w2, w2, 24
+	strh	w2, [x1, #:lo12:.LANCHOR227]
+.L2622:
+	adrp	x2, .LANCHOR101
+	ldr	w2, [x2, #:lo12:.LANCHOR101]
+	cmp	w2, 1
+	bne	.L2623
+	udiv	w4, w23, w3
+	ldrh	w2, [x1, #:lo12:.LANCHOR227]
+	add	w4, w4, w2
+	add	w4, w2, w4, asr 2
+	strh	w4, [x1, #:lo12:.LANCHOR227]
+.L2623:
+	adrp	x2, .LANCHOR8
+	ldrb	w2, [x2, #:lo12:.LANCHOR8]
+	cbz	w2, .L2624
+	udiv	w4, w23, w3
+	ldrh	w2, [x1, #:lo12:.LANCHOR227]
+	add	w4, w4, w2
+	add	w4, w2, w4, asr 2
+	strh	w4, [x1, #:lo12:.LANCHOR227]
+.L2624:
+	adrp	x2, .LANCHOR47
+	ldrh	w2, [x2, #:lo12:.LANCHOR47]
+	cbz	w2, .L2626
+	ldrh	w4, [x1, #:lo12:.LANCHOR227]
+	add	w4, w4, w2, lsr 1
+	strh	w4, [x1, #:lo12:.LANCHOR227]
+	mul	w4, w2, w3
+	cmp	w23, w4
+	bge	.L2626
+	add	w2, w2, 32
+	str	w6, [x0, #:lo12:.LANCHOR71]
+	add	w2, w5, w2
+	strh	w2, [x1, #:lo12:.LANCHOR227]
+.L2626:
+	ldrh	w2, [x1, #:lo12:.LANCHOR227]
+	adrp	x25, .LANCHOR226
+	ldr	w1, [x0, #:lo12:.LANCHOR71]
+	adrp	x24, .LANCHOR82
+	mov	w23, -1
+	sub	w1, w1, w2
+	mul	w3, w1, w3
+	adrp	x1, .LANCHOR51
+	str	w3, [x25, #:lo12:.LANCHOR226]
+	ldrh	w1, [x1, #:lo12:.LANCHOR51]
+	mul	w3, w1, w3
+	str	w3, [x0, #:lo12:.LANCHOR71]
+	ldrh	w0, [x22, #:lo12:.LANCHOR54]
+	mul	w3, w0, w3
+	adrp	x0, .LANCHOR67
+	str	w3, [x0, #:lo12:.LANCHOR67]
+	bl	FtlBbmTblFlush
+	ldr	x0, [x24, #:lo12:.LANCHOR82]
+	mov	w1, 0
+	ldrh	w2, [x19, #:lo12:.LANCHOR39]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	adrp	x0, .LANCHOR99
+	adrp	x1, .LANCHOR201
+	ldrh	w2, [x21, #:lo12:.LANCHOR38]
+	str	wzr, [x0, #:lo12:.LANCHOR99]
+	add	x0, x1, :lo12:.LANCHOR201
+	strh	w23, [x1, #:lo12:.LANCHOR201]
+	mov	w1, 255
+	lsr	w2, w2, 3
+	strh	wzr, [x0, 2]
+	strb	wzr, [x0, 6]
+	strb	wzr, [x0, 8]
+	adrp	x0, .LANCHOR90
+	add	x19, x0, :lo12:.LANCHOR90
+	strh	wzr, [x0, #:lo12:.LANCHOR90]
+	mov	w0, 1
+	strb	w0, [x19, 8]
+	adrp	x0, .LANCHOR0
+	strh	wzr, [x19, 2]
+	ldr	x0, [x0, #:lo12:.LANCHOR0]
+	strb	wzr, [x19, 6]
+	bl	ftl_memset
+.L2628:
+	mov	x0, x19
+	bl	make_superblock
+	ldrb	w1, [x19, 7]
+	ldrh	w0, [x19]
+	cbnz	w1, .L2629
+	ldr	x1, [x24, #:lo12:.LANCHOR82]
+	ubfiz	x0, x0, 1, 16
+	strh	w23, [x1, x0]
+	ldrh	w0, [x19]
+	add	w0, w0, 1
+	strh	w0, [x19]
+	b	.L2628
+.L2613:
+	ubfiz	x3, x0, 2, 16
+	mvn	w2, w0
+	orr	w2, w0, w2, lsl 16
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	str	w2, [x4, x3]
+	str	w6, [x5, x3]
+	b	.L2612
+.L2615:
+	mov	w0, w24
+	mov	w1, 1
+	add	w24, w24, 1
+	bl	FtlLowFormatEraseBlock
+	add	w23, w23, w0
+	and	w24, w24, 65535
+	and	w23, w23, 65535
+	b	.L2614
+.L2616:
+	udiv	w0, w23, w0
+	adrp	x1, .LANCHOR64
+	ldr	w23, [x1, #:lo12:.LANCHOR64]
+	add	w0, w0, w23
+	bl	FtlSysBlkNumInit
+	ldrh	w0, [x25, #:lo12:.LANCHOR37]
+	add	x25, x19, :lo12:.LANCHOR39
+	bl	FtlFreeSysBlkQueueInit
+	ldrh	w23, [x21, #:lo12:.LANCHOR38]
+.L2618:
+	ldrh	w0, [x25]
+	cmp	w0, w23
+	bls	.L2620
+	mov	w0, w23
+	add	w23, w23, 1
+	mov	w1, 1
+	and	w23, w23, 65535
+	bl	FtlLowFormatEraseBlock
+	b	.L2618
+.L2621:
+	mov	w0, w25
+	mov	w1, 0
+	add	w25, w25, 1
+	bl	FtlLowFormatEraseBlock
+	add	w23, w23, w0
+	and	w25, w25, 65535
+	and	w23, w23, 65535
+	b	.L2617
+.L2629:
+	ldr	w1, [x20, #:lo12:.LANCHOR157]
+	ubfiz	x0, x0, 1, 16
+	str	w1, [x19, 12]
+	mov	w23, -1
+	add	w1, w1, 1
+	str	w1, [x20, #:lo12:.LANCHOR157]
+	ldr	x1, [x24, #:lo12:.LANCHOR82]
+	ldrh	w2, [x19, 4]
+	strh	w2, [x1, x0]
+	adrp	x2, .LANCHOR91
+	add	x0, x2, :lo12:.LANCHOR91
+	ldrh	w1, [x19]
+	mov	x19, x0
+	add	w1, w1, 1
+	strh	wzr, [x0, 2]
+	strh	w1, [x2, #:lo12:.LANCHOR91]
+	mov	w1, 1
+	strb	wzr, [x0, 6]
+	strb	w1, [x0, 8]
+.L2630:
+	mov	x0, x19
+	bl	make_superblock
+	ldrb	w1, [x19, 7]
+	ldrh	w0, [x19]
+	cbnz	w1, .L2631
+	ldr	x1, [x24, #:lo12:.LANCHOR82]
+	ubfiz	x0, x0, 1, 16
+	strh	w23, [x1, x0]
+	ldrh	w0, [x19]
+	add	w0, w0, 1
+	strh	w0, [x19]
+	b	.L2630
+.L2631:
+	ldr	w1, [x20, #:lo12:.LANCHOR157]
+	ubfiz	x0, x0, 1, 16
+	str	w1, [x19, 12]
+	add	w1, w1, 1
+	str	w1, [x20, #:lo12:.LANCHOR157]
+	ldr	x1, [x24, #:lo12:.LANCHOR82]
+	ldrh	w2, [x19, 4]
+	mov	w19, -1
+	strh	w2, [x1, x0]
+	adrp	x0, .LANCHOR92
+	strh	w19, [x0, #:lo12:.LANCHOR92]
+	bl	FtlFreeSysBlkQueueOut
+	adrp	x2, .LANCHOR206
+	add	x1, x2, :lo12:.LANCHOR206
+	strh	w0, [x2, #:lo12:.LANCHOR206]
+	ldr	w0, [x25, #:lo12:.LANCHOR226]
+	strh	w0, [x1, 6]
+	ldr	w0, [x20, #:lo12:.LANCHOR157]
+	str	w0, [x1, 8]
+	add	w0, w0, 1
+	strh	wzr, [x1, 2]
+	strh	w19, [x1, 4]
+	str	w0, [x20, #:lo12:.LANCHOR157]
+	bl	FtlVpcTblFlush
+	bl	FtlSysBlkInit
+	cbnz	w0, .L2610
+	adrp	x0, .LANCHOR223
+	mov	w1, 1
+	str	w1, [x0, #:lo12:.LANCHOR223]
+.L2610:
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+	.size	FtlLowFormat, .-FtlLowFormat
+	.global	FtlMallocOffset
+	.global	FtlMallocBuffer
+	.global	gc_ink_free_return_value
+	.global	FtlUpdateVaildLpnCount
+	.global	g_ect_tbl_power_up_flush
+	.global	power_up_flag
+	.global	g_LowFormat
+	.global	gFtlInitStatus
+	.global	DeviceCapacity
+	.global	ToshibaRefValue
+	.global	Toshiba15RefValue
+	.global	ToshibaA19RefValue
+	.global	SamsungRefValue
+	.global	refValueDefault
+	.global	random_seed
+	.global	gSlcNandParaInfo
+	.global	gNandParaInfo
+	.global	NandFlashParaTbl
+	.global	g_page_map_check_enable
+	.global	g_power_lost_ecc_error_blk
+	.global	g_power_lost_recovery_flag
+	.global	c_mlc_erase_count_value
+	.global	g_recovery_ppa_tbl
+	.global	g_recovery_page_min_ver
+	.global	g_recovery_page_num
+	.global	g_cur_erase_blk
+	.global	g_gc_skip_write_count
+	.global	g_gc_head_data_block_count
+	.global	g_gc_head_data_block
+	.global	g_ftl_nand_free_count
+	.global	g_in_swl_replace
+	.global	g_in_gc_progress
+	.global	g_all_blk_used_slc_mode
+	.global	g_max_erase_count
+	.global	g_totle_sys_slc_erase_count
+	.global	g_totle_slc_erase_count
+	.global	g_min_erase_count
+	.global	g_totle_avg_erase_count
+	.global	g_totle_mlc_erase_count
+	.global	g_totle_l2p_write_count
+	.global	g_totle_cache_write_count
+	.global	g_tmp_data_superblock_id
+	.global	g_totle_read_page_count
+	.global	g_totle_discard_page_count
+	.global	g_totle_read_sector
+	.global	g_totle_write_sector
+	.global	g_totle_write_page_count
+	.global	g_totle_gc_page_count
+	.global	g_gc_blk_index
+	.global	g_gc_merge_free_blk_threshold
+	.global	g_gc_free_blk_threshold
+	.global	g_gc_refresh_block_temp_tbl
+	.global	g_free_slc_blk_num
+	.global	g_gc_refresh_block_temp_num
+	.global	g_gc_bad_block_temp_tbl
+	.global	g_gc_bad_block_gc_index
+	.global	g_gc_bad_block_temp_num
+	.global	g_gc_next_blk_1
+	.global	g_gc_next_blk
+	.global	g_gc_cur_blk_max_valid_pages
+	.global	g_gc_cur_blk_valid_pages
+	.global	g_gc_page_offset
+	.global	g_gc_blk_num
+	.global	p_gc_blk_tbl
+	.global	p_gc_page_info
+	.global	g_sys_ext_data
+	.global	g_sys_save_data
+	.global	gp_last_act_superblock
+	.global	g_gc_superblock
+	.global	g_gc_temp_superblock
+	.global	g_buffer_superblock
+	.global	g_active_superblock
+	.global	g_num_data_superblocks
+	.global	g_num_free_superblocks
+	.global	p_data_block_list_tail
+	.global	p_data_block_list_head
+	.global	p_free_data_block_list_head
+	.global	p_data_block_list_table
+	.global	g_l2p_last_update_region_id
+	.global	p_l2p_map_buf
+	.global	p_l2p_ram_map
+	.global	g_totle_vendor_block
+	.global	p_vendor_region_ppn_table
+	.global	p_vendor_block_ver_table
+	.global	p_vendor_block_valid_page_count
+	.global	p_vendor_block_table
+	.global	g_totle_map_block
+	.global	p_map_region_ppn_check_table
+	.global	p_map_region_ppn_table
+	.global	p_map_block_ver_table
+	.global	p_map_block_valid_page_count
+	.global	p_map_block_table
+	.global	p_blk_mode_table
+	.global	p_valid_page_count_check_table
+	.global	p_valid_page_count_table
+	.global	g_totle_swl_count
+	.global	p_swl_mul_table
+	.global	p_erase_count_table
+	.global	g_ect_tbl_info_size
+	.global	gp_ect_tbl_info
+	.global	g_gc_num_req
+	.global	c_gc_page_buf_num
+	.global	gp_gc_page_buf_info
+	.global	p_gc_data_buf
+	.global	p_gc_spare_buf
+	.global	p_io_spare_buf
+	.global	p_io_data_buf_1
+	.global	p_io_data_buf_0
+	.global	p_sys_spare_buf
+	.global	p_vendor_data_buf
+	.global	p_sys_data_buf_1
+	.global	p_sys_data_buf
+	.global	p_plane_order_table
+	.global	g_req_cache
+	.global	req_gc_dst
+	.global	req_gc
+	.global	req_erase
+	.global	req_prgm
+	.global	req_read
+	.global	req_sys
+	.global	gVendorBlkInfo
+	.global	gL2pMapInfo
+	.global	gSysFreeQueue
+	.global	gSysInfo
+	.global	gBbtInfo
+	.global	g_flash_read_only_en
+	.global	g_inkDie_check_enable
+	.global	g_SlcPartLbaEndSector
+	.global	g_MaxLbn
+	.global	g_VaildLpn
+	.global	g_MaxLpn
+	.global	g_MaxLbaSector
+	.global	g_GlobalDataVersion
+	.global	g_GlobalSysVersion
+	.global	ftl_gc_temp_power_lost_recovery_flag
+	.global	c_ftl_nand_max_data_blks
+	.global	c_ftl_nand_data_op_blks_per_plane
+	.global	c_ftl_nand_data_blks_per_plane
+	.global	c_ftl_nand_max_sys_blks
+	.global	c_ftl_nand_init_sys_blks_per_plane
+	.global	c_ftl_nand_sys_blks_per_plane
+	.global	c_ftl_vendor_part_size
+	.global	c_ftl_nand_max_vendor_blks
+	.global	c_ftl_nand_max_map_blks
+	.global	c_ftl_nand_map_blks_per_plane
+	.global	c_ftl_nand_vendor_region_num
+	.global	c_ftl_nand_l2pmap_ram_region_num
+	.global	c_ftl_nand_map_region_num
+	.global	c_ftl_nand_totle_phy_blks
+	.global	c_ftl_nand_reserved_blks
+	.global	c_ftl_nand_byte_pre_oob
+	.global	c_ftl_nand_byte_pre_page
+	.global	c_ftl_nand_sec_pre_page_shift
+	.global	c_ftl_nand_sec_pre_page
+	.global	c_ftl_nand_page_pre_super_blk
+	.global	c_ftl_nand_page_pre_slc_blk
+	.global	c_ftl_nand_page_pre_blk
+	.global	c_ftl_nand_bbm_buf_size
+	.global	c_ftl_nand_ext_blk_pre_plane
+	.global	c_ftl_nand_blk_pre_plane
+	.global	c_ftl_nand_planes_num
+	.global	c_ftl_nand_blks_per_die_shift
+	.global	c_ftl_nand_blks_per_die
+	.global	c_ftl_nand_planes_per_die
+	.global	c_ftl_nand_die_num
+	.global	c_ftl_nand_type
+	.global	gMasterTempBuf
+	.global	gMasterInfo
+	.global	gNandcDumpWriteEn
+	.global	gToggleModeClkDiv
+	.global	gBootDdrMode
+	.global	gNandcEccBits
+	.global	gpNandc1
+	.global	gpNandc
+	.global	g_nandc_version_data
+	.global	gNandcVer
+	.global	gNandChipMap
+	.global	gNandIDataBuf
+	.global	FlashDdrTunningReadCount
+	.global	FlashWaitBusyScheduleEn
+	.global	gNandPhyInfo
+	.global	gFlashProgCheckSpareBuffer
+	.global	gFlashProgCheckBuffer
+	.global	gFlashSpareBuffer
+	.global	gFlashPageBuffer1
+	.global	gFlashPageBuffer0
+	.global	gpFlashSaveInfo
+	.global	gReadRetryInfo
+	.global	gpNandParaInfo
+	.global	gNandOptPara
+	.global	g_slc2KBNand
+	.global	g_maxRetryCount
+	.global	g_maxRegNum
+	.global	g_retryMode
+	.global	gNandIDBResBlkNumSaveInFlash
+	.global	gNandIDBResBlkNum
+	.global	gNandFlashResEndPageAddr
+	.global	gNandFlashInfoBlockAddr
+	.global	gNandFlashIdbBlockAddr
+	.global	gNandFlashInfoBlockEcc
+	.global	gNandFlashIDBEccBits
+	.global	gNandFlashEccBits
+	.global	gNandRandomizer
+	.global	gBlockPageAlignSize
+	.global	gTotleBlock
+	.global	gNandMaxChip
+	.global	gNandMaxDie
+	.global	gFlashInterfaceMode
+	.global	gFlashSlcMode
+	.global	gFlashOnfiModeEn
+	.global	gFlashToggleModeEn
+	.global	gFlashSdrModeEn
+	.global	gMultiPageProgEn
+	.global	gMultiPageReadEn
+	.global	gpReadRetrial
+	.global	mlcPageToSlcPageTbl
+	.global	slcPageToMlcPageTbl
+	.global	DieAddrs
+	.global	gDieOp
+	.global	DieCsIndex
+	.global	IDByte
+	.global	read_retry_cur_offset
+	.section	.bss.DeviceCapacity,"aw",@nobits
+	.align	2
+	.set	.LANCHOR59,. + 0
+	.type	DeviceCapacity, %object
+	.size	DeviceCapacity, 4
+DeviceCapacity:
+	.zero	4
+	.section	.bss.DieAddrs,"aw",@nobits
+	.align	2
+	.set	.LANCHOR17,. + 0
+	.type	DieAddrs, %object
+	.size	DieAddrs, 32
+DieAddrs:
+	.zero	32
+	.section	.bss.DieCsIndex,"aw",@nobits
+	.align	2
+	.set	.LANCHOR26,. + 0
+	.type	DieCsIndex, %object
+	.size	DieCsIndex, 8
+DieCsIndex:
+	.zero	8
+	.section	.bss.FlashDdrTunningReadCount,"aw",@nobits
+	.align	2
+	.set	.LANCHOR142,. + 0
+	.type	FlashDdrTunningReadCount, %object
+	.size	FlashDdrTunningReadCount, 4
+FlashDdrTunningReadCount:
+	.zero	4
+	.section	.bss.FlashWaitBusyScheduleEn,"aw",@nobits
+	.align	2
+	.type	FlashWaitBusyScheduleEn, %object
+	.size	FlashWaitBusyScheduleEn, 4
+FlashWaitBusyScheduleEn:
+	.zero	4
+	.section	.bss.FtlMallocBuffer,"aw",@nobits
+	.align	6
+	.type	FtlMallocBuffer, %object
+	.size	FtlMallocBuffer, 1310720
+FtlMallocBuffer:
+	.zero	1310720
+	.section	.bss.FtlUpdateVaildLpnCount,"aw",@nobits
+	.align	1
+	.set	.LANCHOR98,. + 0
+	.type	FtlUpdateVaildLpnCount, %object
+	.size	FtlUpdateVaildLpnCount, 2
+FtlUpdateVaildLpnCount:
+	.zero	2
+	.section	.bss.IDByte,"aw",@nobits
+	.align	2
+	.set	.LANCHOR22,. + 0
+	.type	IDByte, %object
+	.size	IDByte, 32
+IDByte:
+	.zero	32
+	.section	.bss.c_ftl_nand_bbm_buf_size,"aw",@nobits
+	.align	1
+	.set	.LANCHOR120,. + 0
+	.type	c_ftl_nand_bbm_buf_size, %object
+	.size	c_ftl_nand_bbm_buf_size, 2
+c_ftl_nand_bbm_buf_size:
+	.zero	2
+	.section	.bss.c_ftl_nand_blk_pre_plane,"aw",@nobits
+	.align	1
+	.set	.LANCHOR39,. + 0
+	.type	c_ftl_nand_blk_pre_plane, %object
+	.size	c_ftl_nand_blk_pre_plane, 2
+c_ftl_nand_blk_pre_plane:
+	.zero	2
+	.section	.bss.c_ftl_nand_blks_per_die,"aw",@nobits
+	.align	1
+	.set	.LANCHOR49,. + 0
+	.type	c_ftl_nand_blks_per_die, %object
+	.size	c_ftl_nand_blks_per_die, 2
+c_ftl_nand_blks_per_die:
+	.zero	2
+	.section	.bss.c_ftl_nand_blks_per_die_shift,"aw",@nobits
+	.align	1
+	.set	.LANCHOR50,. + 0
+	.type	c_ftl_nand_blks_per_die_shift, %object
+	.size	c_ftl_nand_blks_per_die_shift, 2
+c_ftl_nand_blks_per_die_shift:
+	.zero	2
+	.section	.bss.c_ftl_nand_byte_pre_oob,"aw",@nobits
+	.align	1
+	.set	.LANCHOR57,. + 0
+	.type	c_ftl_nand_byte_pre_oob, %object
+	.size	c_ftl_nand_byte_pre_oob, 2
+c_ftl_nand_byte_pre_oob:
+	.zero	2
+	.section	.bss.c_ftl_nand_byte_pre_page,"aw",@nobits
+	.align	1
+	.set	.LANCHOR56,. + 0
+	.type	c_ftl_nand_byte_pre_page, %object
+	.size	c_ftl_nand_byte_pre_page, 2
+c_ftl_nand_byte_pre_page:
+	.zero	2
+	.section	.bss.c_ftl_nand_data_blks_per_plane,"aw",@nobits
+	.align	1
+	.set	.LANCHOR38,. + 0
+	.type	c_ftl_nand_data_blks_per_plane, %object
+	.size	c_ftl_nand_data_blks_per_plane, 2
+c_ftl_nand_data_blks_per_plane:
+	.zero	2
+	.section	.bss.c_ftl_nand_data_op_blks_per_plane,"aw",@nobits
+	.align	1
+	.set	.LANCHOR227,. + 0
+	.type	c_ftl_nand_data_op_blks_per_plane, %object
+	.size	c_ftl_nand_data_op_blks_per_plane, 2
+c_ftl_nand_data_op_blks_per_plane:
+	.zero	2
+	.section	.bss.c_ftl_nand_die_num,"aw",@nobits
+	.align	1
+	.set	.LANCHOR43,. + 0
+	.type	c_ftl_nand_die_num, %object
+	.size	c_ftl_nand_die_num, 2
+c_ftl_nand_die_num:
+	.zero	2
+	.section	.bss.c_ftl_nand_ext_blk_pre_plane,"aw",@nobits
+	.align	1
+	.set	.LANCHOR47,. + 0
+	.type	c_ftl_nand_ext_blk_pre_plane, %object
+	.size	c_ftl_nand_ext_blk_pre_plane, 2
+c_ftl_nand_ext_blk_pre_plane:
+	.zero	2
+	.section	.bss.c_ftl_nand_init_sys_blks_per_plane,"aw",@nobits
+	.align	2
+	.set	.LANCHOR64,. + 0
+	.type	c_ftl_nand_init_sys_blks_per_plane, %object
+	.size	c_ftl_nand_init_sys_blks_per_plane, 4
+c_ftl_nand_init_sys_blks_per_plane:
+	.zero	4
+	.section	.bss.c_ftl_nand_l2pmap_ram_region_num,"aw",@nobits
+	.align	1
+	.set	.LANCHOR66,. + 0
+	.type	c_ftl_nand_l2pmap_ram_region_num, %object
+	.size	c_ftl_nand_l2pmap_ram_region_num, 2
+c_ftl_nand_l2pmap_ram_region_num:
+	.zero	2
+	.section	.bss.c_ftl_nand_map_blks_per_plane,"aw",@nobits
+	.align	1
+	.set	.LANCHOR62,. + 0
+	.type	c_ftl_nand_map_blks_per_plane, %object
+	.size	c_ftl_nand_map_blks_per_plane, 2
+c_ftl_nand_map_blks_per_plane:
+	.zero	2
+	.section	.bss.c_ftl_nand_map_region_num,"aw",@nobits
+	.align	1
+	.set	.LANCHOR65,. + 0
+	.type	c_ftl_nand_map_region_num, %object
+	.size	c_ftl_nand_map_region_num, 2
+c_ftl_nand_map_region_num:
+	.zero	2
+	.section	.bss.c_ftl_nand_max_data_blks,"aw",@nobits
+	.align	2
+	.set	.LANCHOR40,. + 0
+	.type	c_ftl_nand_max_data_blks, %object
+	.size	c_ftl_nand_max_data_blks, 4
+c_ftl_nand_max_data_blks:
+	.zero	4
+	.section	.bss.c_ftl_nand_max_map_blks,"aw",@nobits
+	.align	2
+	.set	.LANCHOR63,. + 0
+	.type	c_ftl_nand_max_map_blks, %object
+	.size	c_ftl_nand_max_map_blks, 4
+c_ftl_nand_max_map_blks:
+	.zero	4
+	.section	.bss.c_ftl_nand_max_sys_blks,"aw",@nobits
+	.align	2
+	.set	.LANCHOR37,. + 0
+	.type	c_ftl_nand_max_sys_blks, %object
+	.size	c_ftl_nand_max_sys_blks, 4
+c_ftl_nand_max_sys_blks:
+	.zero	4
+	.section	.bss.c_ftl_nand_max_vendor_blks,"aw",@nobits
+	.align	1
+	.set	.LANCHOR60,. + 0
+	.type	c_ftl_nand_max_vendor_blks, %object
+	.size	c_ftl_nand_max_vendor_blks, 2
+c_ftl_nand_max_vendor_blks:
+	.zero	2
+	.section	.bss.c_ftl_nand_page_pre_blk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR51,. + 0
+	.type	c_ftl_nand_page_pre_blk, %object
+	.size	c_ftl_nand_page_pre_blk, 2
+c_ftl_nand_page_pre_blk:
+	.zero	2
+	.section	.bss.c_ftl_nand_page_pre_slc_blk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR52,. + 0
+	.type	c_ftl_nand_page_pre_slc_blk, %object
+	.size	c_ftl_nand_page_pre_slc_blk, 2
+c_ftl_nand_page_pre_slc_blk:
+	.zero	2
+	.section	.bss.c_ftl_nand_page_pre_super_blk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR53,. + 0
+	.type	c_ftl_nand_page_pre_super_blk, %object
+	.size	c_ftl_nand_page_pre_super_blk, 2
+c_ftl_nand_page_pre_super_blk:
+	.zero	2
+	.section	.bss.c_ftl_nand_planes_num,"aw",@nobits
+	.align	1
+	.set	.LANCHOR36,. + 0
+	.type	c_ftl_nand_planes_num, %object
+	.size	c_ftl_nand_planes_num, 2
+c_ftl_nand_planes_num:
+	.zero	2
+	.section	.bss.c_ftl_nand_planes_per_die,"aw",@nobits
+	.align	1
+	.set	.LANCHOR44,. + 0
+	.type	c_ftl_nand_planes_per_die, %object
+	.size	c_ftl_nand_planes_per_die, 2
+c_ftl_nand_planes_per_die:
+	.zero	2
+	.section	.bss.c_ftl_nand_reserved_blks,"aw",@nobits
+	.align	1
+	.set	.LANCHOR58,. + 0
+	.type	c_ftl_nand_reserved_blks, %object
+	.size	c_ftl_nand_reserved_blks, 2
+c_ftl_nand_reserved_blks:
+	.zero	2
+	.section	.bss.c_ftl_nand_sec_pre_page,"aw",@nobits
+	.align	1
+	.set	.LANCHOR54,. + 0
+	.type	c_ftl_nand_sec_pre_page, %object
+	.size	c_ftl_nand_sec_pre_page, 2
+c_ftl_nand_sec_pre_page:
+	.zero	2
+	.section	.bss.c_ftl_nand_sec_pre_page_shift,"aw",@nobits
+	.align	1
+	.set	.LANCHOR55,. + 0
+	.type	c_ftl_nand_sec_pre_page_shift, %object
+	.size	c_ftl_nand_sec_pre_page_shift, 2
+c_ftl_nand_sec_pre_page_shift:
+	.zero	2
+	.section	.bss.c_ftl_nand_sys_blks_per_plane,"aw",@nobits
+	.align	2
+	.set	.LANCHOR35,. + 0
+	.type	c_ftl_nand_sys_blks_per_plane, %object
+	.size	c_ftl_nand_sys_blks_per_plane, 4
+c_ftl_nand_sys_blks_per_plane:
+	.zero	4
+	.section	.bss.c_ftl_nand_totle_phy_blks,"aw",@nobits
+	.align	2
+	.set	.LANCHOR41,. + 0
+	.type	c_ftl_nand_totle_phy_blks, %object
+	.size	c_ftl_nand_totle_phy_blks, 4
+c_ftl_nand_totle_phy_blks:
+	.zero	4
+	.section	.bss.c_ftl_nand_type,"aw",@nobits
+	.align	1
+	.set	.LANCHOR42,. + 0
+	.type	c_ftl_nand_type, %object
+	.size	c_ftl_nand_type, 2
+c_ftl_nand_type:
+	.zero	2
+	.section	.bss.c_ftl_nand_vendor_region_num,"aw",@nobits
+	.align	1
+	.set	.LANCHOR61,. + 0
+	.type	c_ftl_nand_vendor_region_num, %object
+	.size	c_ftl_nand_vendor_region_num, 2
+c_ftl_nand_vendor_region_num:
+	.zero	2
+	.section	.bss.c_ftl_vendor_part_size,"aw",@nobits
+	.align	1
+	.set	.LANCHOR48,. + 0
+	.type	c_ftl_vendor_part_size, %object
+	.size	c_ftl_vendor_part_size, 2
+c_ftl_vendor_part_size:
+	.zero	2
+	.section	.bss.c_gc_page_buf_num,"aw",@nobits
+	.align	2
+	.set	.LANCHOR107,. + 0
+	.type	c_gc_page_buf_num, %object
+	.size	c_gc_page_buf_num, 4
+c_gc_page_buf_num:
+	.zero	4
+	.section	.bss.c_mlc_erase_count_value,"aw",@nobits
+	.align	1
+	.set	.LANCHOR46,. + 0
+	.type	c_mlc_erase_count_value, %object
+	.size	c_mlc_erase_count_value, 2
+c_mlc_erase_count_value:
+	.zero	2
+	.section	.bss.ftl_gc_temp_power_lost_recovery_flag,"aw",@nobits
+	.align	2
+	.set	.LANCHOR132,. + 0
+	.type	ftl_gc_temp_power_lost_recovery_flag, %object
+	.size	ftl_gc_temp_power_lost_recovery_flag, 4
+ftl_gc_temp_power_lost_recovery_flag:
+	.zero	4
+	.section	.bss.gBbtInfo,"aw",@nobits
+	.align	3
+	.set	.LANCHOR73,. + 0
+	.type	gBbtInfo, %object
+	.size	gBbtInfo, 96
+gBbtInfo:
+	.zero	96
+	.section	.bss.gBlockPageAlignSize,"aw",@nobits
+	.align	2
+	.set	.LANCHOR3,. + 0
+	.type	gBlockPageAlignSize, %object
+	.size	gBlockPageAlignSize, 4
+gBlockPageAlignSize:
+	.zero	4
+	.section	.bss.gBootDdrMode,"aw",@nobits
+	.align	2
+	.set	.LANCHOR153,. + 0
+	.type	gBootDdrMode, %object
+	.size	gBootDdrMode, 4
+gBootDdrMode:
+	.zero	4
+	.section	.bss.gDieOp,"aw",@nobits
+	.align	2
+	.set	.LANCHOR23,. + 0
+	.type	gDieOp, %object
+	.size	gDieOp, 192
+gDieOp:
+	.zero	192
+	.section	.bss.gFlashInterfaceMode,"aw",@nobits
+	.set	.LANCHOR24,. + 0
+	.type	gFlashInterfaceMode, %object
+	.size	gFlashInterfaceMode, 1
+gFlashInterfaceMode:
+	.zero	1
+	.section	.bss.gFlashOnfiModeEn,"aw",@nobits
+	.type	gFlashOnfiModeEn, %object
+	.size	gFlashOnfiModeEn, 1
+gFlashOnfiModeEn:
+	.zero	1
+	.section	.bss.gFlashPageBuffer0,"aw",@nobits
+	.align	3
+	.set	.LANCHOR145,. + 0
+	.type	gFlashPageBuffer0, %object
+	.size	gFlashPageBuffer0, 8
+gFlashPageBuffer0:
+	.zero	8
+	.section	.bss.gFlashPageBuffer1,"aw",@nobits
+	.align	3
+	.set	.LANCHOR151,. + 0
+	.type	gFlashPageBuffer1, %object
+	.size	gFlashPageBuffer1, 8
+gFlashPageBuffer1:
+	.zero	8
+	.section	.bss.gFlashProgCheckBuffer,"aw",@nobits
+	.align	3
+	.set	.LANCHOR195,. + 0
+	.type	gFlashProgCheckBuffer, %object
+	.size	gFlashProgCheckBuffer, 8
+gFlashProgCheckBuffer:
+	.zero	8
+	.section	.bss.gFlashProgCheckSpareBuffer,"aw",@nobits
+	.align	3
+	.set	.LANCHOR196,. + 0
+	.type	gFlashProgCheckSpareBuffer, %object
+	.size	gFlashProgCheckSpareBuffer, 8
+gFlashProgCheckSpareBuffer:
+	.zero	8
+	.section	.bss.gFlashSdrModeEn,"aw",@nobits
+	.type	gFlashSdrModeEn, %object
+	.size	gFlashSdrModeEn, 1
+gFlashSdrModeEn:
+	.zero	1
+	.section	.bss.gFlashSlcMode,"aw",@nobits
+	.set	.LANCHOR8,. + 0
+	.type	gFlashSlcMode, %object
+	.size	gFlashSlcMode, 1
+gFlashSlcMode:
+	.zero	1
+	.section	.bss.gFlashSpareBuffer,"aw",@nobits
+	.align	3
+	.set	.LANCHOR194,. + 0
+	.type	gFlashSpareBuffer, %object
+	.size	gFlashSpareBuffer, 8
+gFlashSpareBuffer:
+	.zero	8
+	.section	.bss.gFlashToggleModeEn,"aw",@nobits
+	.set	.LANCHOR28,. + 0
+	.type	gFlashToggleModeEn, %object
+	.size	gFlashToggleModeEn, 1
+gFlashToggleModeEn:
+	.zero	1
+	.section	.bss.gL2pMapInfo,"aw",@nobits
+	.align	3
+	.set	.LANCHOR124,. + 0
+	.type	gL2pMapInfo, %object
+	.size	gL2pMapInfo, 64
+gL2pMapInfo:
+	.zero	64
+	.section	.bss.gMasterInfo,"aw",@nobits
+	.align	3
+	.set	.LANCHOR33,. + 0
+	.type	gMasterInfo, %object
+	.size	gMasterInfo, 48
+gMasterInfo:
+	.zero	48
+	.section	.bss.gMasterTempBuf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR154,. + 0
+	.type	gMasterTempBuf, %object
+	.size	gMasterTempBuf, 8
+gMasterTempBuf:
+	.zero	8
+	.section	.bss.gMultiPageProgEn,"aw",@nobits
+	.set	.LANCHOR27,. + 0
+	.type	gMultiPageProgEn, %object
+	.size	gMultiPageProgEn, 1
+gMultiPageProgEn:
+	.zero	1
+	.section	.bss.gMultiPageReadEn,"aw",@nobits
+	.set	.LANCHOR198,. + 0
+	.type	gMultiPageReadEn, %object
+	.size	gMultiPageReadEn, 1
+gMultiPageReadEn:
+	.zero	1
+	.section	.bss.gNandChipMap,"aw",@nobits
+	.align	3
+	.set	.LANCHOR6,. + 0
+	.type	gNandChipMap, %object
+	.size	gNandChipMap, 64
+gNandChipMap:
+	.zero	64
+	.section	.bss.gNandFlashEccBits,"aw",@nobits
+	.set	.LANCHOR31,. + 0
+	.type	gNandFlashEccBits, %object
+	.size	gNandFlashEccBits, 1
+gNandFlashEccBits:
+	.zero	1
+	.section	.bss.gNandFlashIDBEccBits,"aw",@nobits
+	.set	.LANCHOR150,. + 0
+	.type	gNandFlashIDBEccBits, %object
+	.size	gNandFlashIDBEccBits, 1
+gNandFlashIDBEccBits:
+	.zero	1
+	.section	.bss.gNandFlashIdbBlockAddr,"aw",@nobits
+	.align	2
+	.set	.LANCHOR147,. + 0
+	.type	gNandFlashIdbBlockAddr, %object
+	.size	gNandFlashIdbBlockAddr, 4
+gNandFlashIdbBlockAddr:
+	.zero	4
+	.section	.bss.gNandFlashInfoBlockAddr,"aw",@nobits
+	.align	2
+	.set	.LANCHOR146,. + 0
+	.type	gNandFlashInfoBlockAddr, %object
+	.size	gNandFlashInfoBlockAddr, 4
+gNandFlashInfoBlockAddr:
+	.zero	4
+	.section	.bss.gNandFlashInfoBlockEcc,"aw",@nobits
+	.type	gNandFlashInfoBlockEcc, %object
+	.size	gNandFlashInfoBlockEcc, 1
+gNandFlashInfoBlockEcc:
+	.zero	1
+	.section	.bss.gNandFlashResEndPageAddr,"aw",@nobits
+	.align	2
+	.type	gNandFlashResEndPageAddr, %object
+	.size	gNandFlashResEndPageAddr, 4
+gNandFlashResEndPageAddr:
+	.zero	4
+	.section	.bss.gNandIDBResBlkNum,"aw",@nobits
+	.set	.LANCHOR2,. + 0
+	.type	gNandIDBResBlkNum, %object
+	.size	gNandIDBResBlkNum, 1
+gNandIDBResBlkNum:
+	.zero	1
+	.section	.bss.gNandIDBResBlkNumSaveInFlash,"aw",@nobits
+	.set	.LANCHOR148,. + 0
+	.type	gNandIDBResBlkNumSaveInFlash, %object
+	.size	gNandIDBResBlkNumSaveInFlash, 1
+gNandIDBResBlkNumSaveInFlash:
+	.zero	1
+	.section	.bss.gNandIDataBuf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR139,. + 0
+	.type	gNandIDataBuf, %object
+	.size	gNandIDataBuf, 2048
+gNandIDataBuf:
+	.zero	2048
+	.section	.bss.gNandMaxChip,"aw",@nobits
+	.set	.LANCHOR118,. + 0
+	.type	gNandMaxChip, %object
+	.size	gNandMaxChip, 1
+gNandMaxChip:
+	.zero	1
+	.section	.bss.gNandMaxDie,"aw",@nobits
+	.set	.LANCHOR25,. + 0
+	.type	gNandMaxDie, %object
+	.size	gNandMaxDie, 1
+gNandMaxDie:
+	.zero	1
+	.section	.bss.gNandOptPara,"aw",@nobits
+	.align	3
+	.set	.LANCHOR7,. + 0
+	.type	gNandOptPara, %object
+	.size	gNandOptPara, 32
+gNandOptPara:
+	.zero	32
+	.section	.bss.gNandPhyInfo,"aw",@nobits
+	.align	3
+	.set	.LANCHOR15,. + 0
+	.type	gNandPhyInfo, %object
+	.size	gNandPhyInfo, 28
+gNandPhyInfo:
+	.zero	28
+	.section	.bss.gNandRandomizer,"aw",@nobits
+	.set	.LANCHOR5,. + 0
+	.type	gNandRandomizer, %object
+	.size	gNandRandomizer, 1
+gNandRandomizer:
+	.zero	1
+	.section	.bss.gNandcDumpWriteEn,"aw",@nobits
+	.align	2
+	.set	.LANCHOR34,. + 0
+	.type	gNandcDumpWriteEn, %object
+	.size	gNandcDumpWriteEn, 4
+gNandcDumpWriteEn:
+	.zero	4
+	.section	.bss.gNandcEccBits,"aw",@nobits
+	.align	2
+	.set	.LANCHOR30,. + 0
+	.type	gNandcEccBits, %object
+	.size	gNandcEccBits, 4
+gNandcEccBits:
+	.zero	4
+	.section	.bss.gNandcVer,"aw",@nobits
+	.align	2
+	.set	.LANCHOR32,. + 0
+	.type	gNandcVer, %object
+	.size	gNandcVer, 4
+gNandcVer:
+	.zero	4
+	.section	.bss.gReadRetryInfo,"aw",@nobits
+	.align	3
+	.set	.LANCHOR20,. + 0
+	.type	gReadRetryInfo, %object
+	.size	gReadRetryInfo, 852
+gReadRetryInfo:
+	.zero	852
+	.section	.bss.gSysFreeQueue,"aw",@nobits
+	.align	3
+	.set	.LANCHOR74,. + 0
+	.type	gSysFreeQueue, %object
+	.size	gSysFreeQueue, 2056
+gSysFreeQueue:
+	.zero	2056
+	.section	.bss.gSysInfo,"aw",@nobits
+	.align	3
+	.set	.LANCHOR206,. + 0
+	.type	gSysInfo, %object
+	.size	gSysInfo, 12
+gSysInfo:
+	.zero	12
+	.section	.bss.gToggleModeClkDiv,"aw",@nobits
+	.align	2
+	.type	gToggleModeClkDiv, %object
+	.size	gToggleModeClkDiv, 4
+gToggleModeClkDiv:
+	.zero	4
+	.section	.bss.gTotleBlock,"aw",@nobits
+	.align	1
+	.set	.LANCHOR119,. + 0
+	.type	gTotleBlock, %object
+	.size	gTotleBlock, 2
+gTotleBlock:
+	.zero	2
+	.section	.bss.gVendorBlkInfo,"aw",@nobits
+	.align	3
+	.set	.LANCHOR215,. + 0
+	.type	gVendorBlkInfo, %object
+	.size	gVendorBlkInfo, 64
+gVendorBlkInfo:
+	.zero	64
+	.section	.bss.g_GlobalDataVersion,"aw",@nobits
+	.align	2
+	.set	.LANCHOR158,. + 0
+	.type	g_GlobalDataVersion, %object
+	.size	g_GlobalDataVersion, 4
+g_GlobalDataVersion:
+	.zero	4
+	.section	.bss.g_GlobalSysVersion,"aw",@nobits
+	.align	2
+	.set	.LANCHOR157,. + 0
+	.type	g_GlobalSysVersion, %object
+	.size	g_GlobalSysVersion, 4
+g_GlobalSysVersion:
+	.zero	4
+	.section	.bss.g_LowFormat,"aw",@nobits
+	.align	2
+	.set	.LANCHOR239,. + 0
+	.type	g_LowFormat, %object
+	.size	g_LowFormat, 4
+g_LowFormat:
+	.zero	4
+	.section	.bss.g_MaxLbaSector,"aw",@nobits
+	.align	2
+	.set	.LANCHOR67,. + 0
+	.type	g_MaxLbaSector, %object
+	.size	g_MaxLbaSector, 4
+g_MaxLbaSector:
+	.zero	4
+	.section	.bss.g_MaxLbn,"aw",@nobits
+	.align	2
+	.set	.LANCHOR226,. + 0
+	.type	g_MaxLbn, %object
+	.size	g_MaxLbn, 4
+g_MaxLbn:
+	.zero	4
+	.section	.bss.g_MaxLpn,"aw",@nobits
+	.align	2
+	.set	.LANCHOR71,. + 0
+	.type	g_MaxLpn, %object
+	.size	g_MaxLpn, 4
+g_MaxLpn:
+	.zero	4
+	.section	.bss.g_SlcPartLbaEndSector,"aw",@nobits
+	.align	2
+	.set	.LANCHOR155,. + 0
+	.type	g_SlcPartLbaEndSector, %object
+	.size	g_SlcPartLbaEndSector, 4
+g_SlcPartLbaEndSector:
+	.zero	4
+	.section	.bss.g_VaildLpn,"aw",@nobits
+	.align	2
+	.set	.LANCHOR99,. + 0
+	.type	g_VaildLpn, %object
+	.size	g_VaildLpn, 4
+g_VaildLpn:
+	.zero	4
+	.section	.bss.g_active_superblock,"aw",@nobits
+	.align	3
+	.set	.LANCHOR90,. + 0
+	.type	g_active_superblock, %object
+	.size	g_active_superblock, 48
+g_active_superblock:
+	.zero	48
+	.section	.bss.g_all_blk_used_slc_mode,"aw",@nobits
+	.align	2
+	.set	.LANCHOR156,. + 0
+	.type	g_all_blk_used_slc_mode, %object
+	.size	g_all_blk_used_slc_mode, 4
+g_all_blk_used_slc_mode:
+	.zero	4
+	.section	.bss.g_buffer_superblock,"aw",@nobits
+	.align	3
+	.set	.LANCHOR91,. + 0
+	.type	g_buffer_superblock, %object
+	.size	g_buffer_superblock, 48
+g_buffer_superblock:
+	.zero	48
+	.section	.bss.g_cur_erase_blk,"aw",@nobits
+	.align	2
+	.set	.LANCHOR72,. + 0
+	.type	g_cur_erase_blk, %object
+	.size	g_cur_erase_blk, 4
+g_cur_erase_blk:
+	.zero	4
+	.section	.bss.g_ect_tbl_info_size,"aw",@nobits
+	.align	1
+	.set	.LANCHOR187,. + 0
+	.type	g_ect_tbl_info_size, %object
+	.size	g_ect_tbl_info_size, 2
+g_ect_tbl_info_size:
+	.zero	2
+	.section	.bss.g_ect_tbl_power_up_flush,"aw",@nobits
+	.align	1
+	.set	.LANCHOR218,. + 0
+	.type	g_ect_tbl_power_up_flush, %object
+	.size	g_ect_tbl_power_up_flush, 2
+g_ect_tbl_power_up_flush:
+	.zero	2
+	.section	.bss.g_flash_read_only_en,"aw",@nobits
+	.align	2
+	.set	.LANCHOR75,. + 0
+	.type	g_flash_read_only_en, %object
+	.size	g_flash_read_only_en, 4
+g_flash_read_only_en:
+	.zero	4
+	.section	.bss.g_free_slc_blk_num,"aw",@nobits
+	.align	1
+	.set	.LANCHOR137,. + 0
+	.type	g_free_slc_blk_num, %object
+	.size	g_free_slc_blk_num, 2
+g_free_slc_blk_num:
+	.zero	2
+	.section	.bss.g_ftl_nand_free_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR241,. + 0
+	.type	g_ftl_nand_free_count, %object
+	.size	g_ftl_nand_free_count, 4
+g_ftl_nand_free_count:
+	.zero	4
+	.section	.bss.g_gc_bad_block_gc_index,"aw",@nobits
+	.align	1
+	.set	.LANCHOR116,. + 0
+	.type	g_gc_bad_block_gc_index, %object
+	.size	g_gc_bad_block_gc_index, 2
+g_gc_bad_block_gc_index:
+	.zero	2
+	.section	.bss.g_gc_bad_block_temp_num,"aw",@nobits
+	.align	1
+	.set	.LANCHOR114,. + 0
+	.type	g_gc_bad_block_temp_num, %object
+	.size	g_gc_bad_block_temp_num, 2
+g_gc_bad_block_temp_num:
+	.zero	2
+	.section	.bss.g_gc_bad_block_temp_tbl,"aw",@nobits
+	.align	3
+	.set	.LANCHOR115,. + 0
+	.type	g_gc_bad_block_temp_tbl, %object
+	.size	g_gc_bad_block_temp_tbl, 34
+g_gc_bad_block_temp_tbl:
+	.zero	34
+	.section	.bss.g_gc_blk_index,"aw",@nobits
+	.align	1
+	.set	.LANCHOR176,. + 0
+	.type	g_gc_blk_index, %object
+	.size	g_gc_blk_index, 2
+g_gc_blk_index:
+	.zero	2
+	.section	.bss.g_gc_blk_num,"aw",@nobits
+	.align	1
+	.set	.LANCHOR108,. + 0
+	.type	g_gc_blk_num, %object
+	.size	g_gc_blk_num, 2
+g_gc_blk_num:
+	.zero	2
+	.section	.bss.g_gc_cur_blk_max_valid_pages,"aw",@nobits
+	.align	1
+	.set	.LANCHOR237,. + 0
+	.type	g_gc_cur_blk_max_valid_pages, %object
+	.size	g_gc_cur_blk_max_valid_pages, 2
+g_gc_cur_blk_max_valid_pages:
+	.zero	2
+	.section	.bss.g_gc_cur_blk_valid_pages,"aw",@nobits
+	.align	1
+	.set	.LANCHOR236,. + 0
+	.type	g_gc_cur_blk_valid_pages, %object
+	.size	g_gc_cur_blk_valid_pages, 2
+g_gc_cur_blk_valid_pages:
+	.zero	2
+	.section	.bss.g_gc_free_blk_threshold,"aw",@nobits
+	.align	1
+	.set	.LANCHOR174,. + 0
+	.type	g_gc_free_blk_threshold, %object
+	.size	g_gc_free_blk_threshold, 2
+g_gc_free_blk_threshold:
+	.zero	2
+	.section	.bss.g_gc_head_data_block,"aw",@nobits
+	.align	2
+	.set	.LANCHOR171,. + 0
+	.type	g_gc_head_data_block, %object
+	.size	g_gc_head_data_block, 4
+g_gc_head_data_block:
+	.zero	4
+	.section	.bss.g_gc_head_data_block_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR172,. + 0
+	.type	g_gc_head_data_block_count, %object
+	.size	g_gc_head_data_block_count, 4
+g_gc_head_data_block_count:
+	.zero	4
+	.section	.bss.g_gc_merge_free_blk_threshold,"aw",@nobits
+	.align	1
+	.set	.LANCHOR175,. + 0
+	.type	g_gc_merge_free_blk_threshold, %object
+	.size	g_gc_merge_free_blk_threshold, 2
+g_gc_merge_free_blk_threshold:
+	.zero	2
+	.section	.bss.g_gc_next_blk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR112,. + 0
+	.type	g_gc_next_blk, %object
+	.size	g_gc_next_blk, 2
+g_gc_next_blk:
+	.zero	2
+	.section	.bss.g_gc_next_blk_1,"aw",@nobits
+	.align	1
+	.set	.LANCHOR113,. + 0
+	.type	g_gc_next_blk_1, %object
+	.size	g_gc_next_blk_1, 2
+g_gc_next_blk_1:
+	.zero	2
+	.section	.bss.g_gc_num_req,"aw",@nobits
+	.align	2
+	.set	.LANCHOR102,. + 0
+	.type	g_gc_num_req, %object
+	.size	g_gc_num_req, 4
+g_gc_num_req:
+	.zero	4
+	.section	.bss.g_gc_page_offset,"aw",@nobits
+	.align	1
+	.set	.LANCHOR110,. + 0
+	.type	g_gc_page_offset, %object
+	.size	g_gc_page_offset, 2
+g_gc_page_offset:
+	.zero	2
+	.section	.bss.g_gc_refresh_block_temp_num,"aw",@nobits
+	.align	1
+	.set	.LANCHOR177,. + 0
+	.type	g_gc_refresh_block_temp_num, %object
+	.size	g_gc_refresh_block_temp_num, 2
+g_gc_refresh_block_temp_num:
+	.zero	2
+	.section	.bss.g_gc_refresh_block_temp_tbl,"aw",@nobits
+	.align	3
+	.type	g_gc_refresh_block_temp_tbl, %object
+	.size	g_gc_refresh_block_temp_tbl, 34
+g_gc_refresh_block_temp_tbl:
+	.zero	34
+	.section	.bss.g_gc_skip_write_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR173,. + 0
+	.type	g_gc_skip_write_count, %object
+	.size	g_gc_skip_write_count, 4
+g_gc_skip_write_count:
+	.zero	4
+	.section	.bss.g_gc_superblock,"aw",@nobits
+	.align	3
+	.set	.LANCHOR201,. + 0
+	.type	g_gc_superblock, %object
+	.size	g_gc_superblock, 48
+g_gc_superblock:
+	.zero	48
+	.section	.bss.g_gc_temp_superblock,"aw",@nobits
+	.align	3
+	.set	.LANCHOR92,. + 0
+	.type	g_gc_temp_superblock, %object
+	.size	g_gc_temp_superblock, 48
+g_gc_temp_superblock:
+	.zero	48
+	.section	.bss.g_in_gc_progress,"aw",@nobits
+	.align	2
+	.set	.LANCHOR169,. + 0
+	.type	g_in_gc_progress, %object
+	.size	g_in_gc_progress, 4
+g_in_gc_progress:
+	.zero	4
+	.section	.bss.g_in_swl_replace,"aw",@nobits
+	.align	2
+	.set	.LANCHOR170,. + 0
+	.type	g_in_swl_replace, %object
+	.size	g_in_swl_replace, 4
+g_in_swl_replace:
+	.zero	4
+	.section	.bss.g_inkDie_check_enable,"aw",@nobits
+	.align	2
+	.set	.LANCHOR101,. + 0
+	.type	g_inkDie_check_enable, %object
+	.size	g_inkDie_check_enable, 4
+g_inkDie_check_enable:
+	.zero	4
+	.section	.bss.g_l2p_last_update_region_id,"aw",@nobits
+	.align	1
+	.set	.LANCHOR96,. + 0
+	.type	g_l2p_last_update_region_id, %object
+	.size	g_l2p_last_update_region_id, 2
+g_l2p_last_update_region_id:
+	.zero	2
+	.section	.bss.g_maxRegNum,"aw",@nobits
+	.set	.LANCHOR13,. + 0
+	.type	g_maxRegNum, %object
+	.size	g_maxRegNum, 1
+g_maxRegNum:
+	.zero	1
+	.section	.bss.g_maxRetryCount,"aw",@nobits
+	.set	.LANCHOR149,. + 0
+	.type	g_maxRetryCount, %object
+	.size	g_maxRetryCount, 1
+g_maxRetryCount:
+	.zero	1
+	.section	.bss.g_max_erase_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR167,. + 0
+	.type	g_max_erase_count, %object
+	.size	g_max_erase_count, 4
+g_max_erase_count:
+	.zero	4
+	.section	.bss.g_min_erase_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR168,. + 0
+	.type	g_min_erase_count, %object
+	.size	g_min_erase_count, 4
+g_min_erase_count:
+	.zero	4
+	.section	.bss.g_nandc_version_data,"aw",@nobits
+	.align	2
+	.set	.LANCHOR152,. + 0
+	.type	g_nandc_version_data, %object
+	.size	g_nandc_version_data, 4
+g_nandc_version_data:
+	.zero	4
+	.section	.bss.g_num_data_superblocks,"aw",@nobits
+	.align	1
+	.set	.LANCHOR84,. + 0
+	.type	g_num_data_superblocks, %object
+	.size	g_num_data_superblocks, 2
+g_num_data_superblocks:
+	.zero	2
+	.section	.bss.g_num_free_superblocks,"aw",@nobits
+	.align	1
+	.set	.LANCHOR87,. + 0
+	.type	g_num_free_superblocks, %object
+	.size	g_num_free_superblocks, 2
+g_num_free_superblocks:
+	.zero	2
+	.section	.bss.g_page_map_check_enable,"aw",@nobits
+	.align	1
+	.set	.LANCHOR68,. + 0
+	.type	g_page_map_check_enable, %object
+	.size	g_page_map_check_enable, 2
+g_page_map_check_enable:
+	.zero	2
+	.section	.bss.g_power_lost_ecc_error_blk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR229,. + 0
+	.type	g_power_lost_ecc_error_blk, %object
+	.size	g_power_lost_ecc_error_blk, 2
+g_power_lost_ecc_error_blk:
+	.zero	2
+	.section	.bss.g_power_lost_recovery_flag,"aw",@nobits
+	.align	1
+	.set	.LANCHOR230,. + 0
+	.type	g_power_lost_recovery_flag, %object
+	.size	g_power_lost_recovery_flag, 2
+g_power_lost_recovery_flag:
+	.zero	2
+	.section	.bss.g_recovery_page_min_ver,"aw",@nobits
+	.align	2
+	.set	.LANCHOR133,. + 0
+	.type	g_recovery_page_min_ver, %object
+	.size	g_recovery_page_min_ver, 4
+g_recovery_page_min_ver:
+	.zero	4
+	.section	.bss.g_recovery_page_num,"aw",@nobits
+	.align	2
+	.set	.LANCHOR231,. + 0
+	.type	g_recovery_page_num, %object
+	.size	g_recovery_page_num, 4
+g_recovery_page_num:
+	.zero	4
+	.section	.bss.g_recovery_ppa_tbl,"aw",@nobits
+	.align	3
+	.set	.LANCHOR232,. + 0
+	.type	g_recovery_ppa_tbl, %object
+	.size	g_recovery_ppa_tbl, 128
+g_recovery_ppa_tbl:
+	.zero	128
+	.section	.bss.g_req_cache,"aw",@nobits
+	.align	3
+	.set	.LANCHOR129,. + 0
+	.type	g_req_cache, %object
+	.size	g_req_cache, 8
+g_req_cache:
+	.zero	8
+	.section	.bss.g_retryMode,"aw",@nobits
+	.set	.LANCHOR11,. + 0
+	.type	g_retryMode, %object
+	.size	g_retryMode, 1
+g_retryMode:
+	.zero	1
+	.section	.bss.g_slc2KBNand,"aw",@nobits
+	.set	.LANCHOR1,. + 0
+	.type	g_slc2KBNand, %object
+	.size	g_slc2KBNand, 1
+g_slc2KBNand:
+	.zero	1
+	.section	.bss.g_sys_ext_data,"aw",@nobits
+	.align	3
+	.set	.LANCHOR136,. + 0
+	.type	g_sys_ext_data, %object
+	.size	g_sys_ext_data, 512
+g_sys_ext_data:
+	.zero	512
+	.section	.bss.g_sys_save_data,"aw",@nobits
+	.align	3
+	.set	.LANCHOR135,. + 0
+	.type	g_sys_save_data, %object
+	.size	g_sys_save_data, 48
+g_sys_save_data:
+	.zero	48
+	.section	.bss.g_tmp_data_superblock_id,"aw",@nobits
+	.align	1
+	.set	.LANCHOR130,. + 0
+	.type	g_tmp_data_superblock_id, %object
+	.size	g_tmp_data_superblock_id, 2
+g_tmp_data_superblock_id:
+	.zero	2
+	.section	.bss.g_totle_avg_erase_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR202,. + 0
+	.type	g_totle_avg_erase_count, %object
+	.size	g_totle_avg_erase_count, 4
+g_totle_avg_erase_count:
+	.zero	4
+	.section	.bss.g_totle_cache_write_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR162,. + 0
+	.type	g_totle_cache_write_count, %object
+	.size	g_totle_cache_write_count, 4
+g_totle_cache_write_count:
+	.zero	4
+	.section	.bss.g_totle_discard_page_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR161,. + 0
+	.type	g_totle_discard_page_count, %object
+	.size	g_totle_discard_page_count, 4
+g_totle_discard_page_count:
+	.zero	4
+	.section	.bss.g_totle_gc_page_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR159,. + 0
+	.type	g_totle_gc_page_count, %object
+	.size	g_totle_gc_page_count, 4
+g_totle_gc_page_count:
+	.zero	4
+	.section	.bss.g_totle_l2p_write_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR163,. + 0
+	.type	g_totle_l2p_write_count, %object
+	.size	g_totle_l2p_write_count, 4
+g_totle_l2p_write_count:
+	.zero	4
+	.section	.bss.g_totle_map_block,"aw",@nobits
+	.align	1
+	.set	.LANCHOR125,. + 0
+	.type	g_totle_map_block, %object
+	.size	g_totle_map_block, 2
+g_totle_map_block:
+	.zero	2
+	.section	.bss.g_totle_mlc_erase_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR165,. + 0
+	.type	g_totle_mlc_erase_count, %object
+	.size	g_totle_mlc_erase_count, 4
+g_totle_mlc_erase_count:
+	.zero	4
+	.section	.bss.g_totle_read_page_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR164,. + 0
+	.type	g_totle_read_page_count, %object
+	.size	g_totle_read_page_count, 4
+g_totle_read_page_count:
+	.zero	4
+	.section	.bss.g_totle_read_sector,"aw",@nobits
+	.align	2
+	.set	.LANCHOR217,. + 0
+	.type	g_totle_read_sector, %object
+	.size	g_totle_read_sector, 4
+g_totle_read_sector:
+	.zero	4
+	.section	.bss.g_totle_slc_erase_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR166,. + 0
+	.type	g_totle_slc_erase_count, %object
+	.size	g_totle_slc_erase_count, 4
+g_totle_slc_erase_count:
+	.zero	4
+	.section	.bss.g_totle_swl_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR131,. + 0
+	.type	g_totle_swl_count, %object
+	.size	g_totle_swl_count, 4
+g_totle_swl_count:
+	.zero	4
+	.section	.bss.g_totle_sys_slc_erase_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR78,. + 0
+	.type	g_totle_sys_slc_erase_count, %object
+	.size	g_totle_sys_slc_erase_count, 4
+g_totle_sys_slc_erase_count:
+	.zero	4
+	.section	.bss.g_totle_vendor_block,"aw",@nobits
+	.align	1
+	.set	.LANCHOR69,. + 0
+	.type	g_totle_vendor_block, %object
+	.size	g_totle_vendor_block, 2
+g_totle_vendor_block:
+	.zero	2
+	.section	.bss.g_totle_write_page_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR160,. + 0
+	.type	g_totle_write_page_count, %object
+	.size	g_totle_write_page_count, 4
+g_totle_write_page_count:
+	.zero	4
+	.section	.bss.g_totle_write_sector,"aw",@nobits
+	.align	2
+	.set	.LANCHOR216,. + 0
+	.type	g_totle_write_sector, %object
+	.size	g_totle_write_sector, 4
+g_totle_write_sector:
+	.zero	4
+	.section	.bss.gc_discard_updated,"aw",@nobits
+	.align	2
+	.set	.LANCHOR222,. + 0
+	.type	gc_discard_updated, %object
+	.size	gc_discard_updated, 4
+gc_discard_updated:
+	.zero	4
+	.section	.bss.gc_ink_free_return_value,"aw",@nobits
+	.align	1
+	.set	.LANCHOR235,. + 0
+	.type	gc_ink_free_return_value, %object
+	.size	gc_ink_free_return_value, 2
+gc_ink_free_return_value:
+	.zero	2
+	.section	.bss.gpFlashSaveInfo,"aw",@nobits
+	.align	3
+	.set	.LANCHOR144,. + 0
+	.type	gpFlashSaveInfo, %object
+	.size	gpFlashSaveInfo, 8
+gpFlashSaveInfo:
+	.zero	8
+	.section	.bss.gpNandParaInfo,"aw",@nobits
+	.align	3
+	.set	.LANCHOR18,. + 0
+	.type	gpNandParaInfo, %object
+	.size	gpNandParaInfo, 8
+gpNandParaInfo:
+	.zero	8
+	.section	.bss.gpNandc,"aw",@nobits
+	.align	3
+	.set	.LANCHOR19,. + 0
+	.type	gpNandc, %object
+	.size	gpNandc, 8
+gpNandc:
+	.zero	8
+	.section	.bss.gpNandc1,"aw",@nobits
+	.align	3
+	.type	gpNandc1, %object
+	.size	gpNandc1, 8
+gpNandc1:
+	.zero	8
+	.section	.bss.gpReadRetrial,"aw",@nobits
+	.align	3
+	.set	.LANCHOR143,. + 0
+	.type	gpReadRetrial, %object
+	.size	gpReadRetrial, 8
+gpReadRetrial:
+	.zero	8
+	.section	.bss.gp_ect_tbl_info,"aw",@nobits
+	.align	3
+	.set	.LANCHOR188,. + 0
+	.type	gp_ect_tbl_info, %object
+	.size	gp_ect_tbl_info, 8
+gp_ect_tbl_info:
+	.zero	8
+	.section	.bss.gp_gc_page_buf_info,"aw",@nobits
+	.align	3
+	.set	.LANCHOR103,. + 0
+	.type	gp_gc_page_buf_info, %object
+	.size	gp_gc_page_buf_info, 8
+gp_gc_page_buf_info:
+	.zero	8
+	.section	.bss.gp_last_act_superblock,"aw",@nobits
+	.align	3
+	.set	.LANCHOR221,. + 0
+	.type	gp_last_act_superblock, %object
+	.size	gp_last_act_superblock, 8
+gp_last_act_superblock:
+	.zero	8
+	.section	.bss.mlcPageToSlcPageTbl,"aw",@nobits
+	.align	2
+	.set	.LANCHOR117,. + 0
+	.type	mlcPageToSlcPageTbl, %object
+	.size	mlcPageToSlcPageTbl, 1024
+mlcPageToSlcPageTbl:
+	.zero	1024
+	.section	.bss.p_blk_mode_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR0,. + 0
+	.type	p_blk_mode_table, %object
+	.size	p_blk_mode_table, 8
+p_blk_mode_table:
+	.zero	8
+	.section	.bss.p_data_block_list_head,"aw",@nobits
+	.align	3
+	.set	.LANCHOR81,. + 0
+	.type	p_data_block_list_head, %object
+	.size	p_data_block_list_head, 8
+p_data_block_list_head:
+	.zero	8
+	.section	.bss.p_data_block_list_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR80,. + 0
+	.type	p_data_block_list_table, %object
+	.size	p_data_block_list_table, 8
+p_data_block_list_table:
+	.zero	8
+	.section	.bss.p_data_block_list_tail,"aw",@nobits
+	.align	3
+	.set	.LANCHOR83,. + 0
+	.type	p_data_block_list_tail, %object
+	.size	p_data_block_list_tail, 8
+p_data_block_list_tail:
+	.zero	8
+	.section	.bss.p_erase_count_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR77,. + 0
+	.type	p_erase_count_table, %object
+	.size	p_erase_count_table, 8
+p_erase_count_table:
+	.zero	8
+	.section	.bss.p_free_data_block_list_head,"aw",@nobits
+	.align	3
+	.set	.LANCHOR86,. + 0
+	.type	p_free_data_block_list_head, %object
+	.size	p_free_data_block_list_head, 8
+p_free_data_block_list_head:
+	.zero	8
+	.section	.bss.p_gc_blk_tbl,"aw",@nobits
+	.align	3
+	.set	.LANCHOR109,. + 0
+	.type	p_gc_blk_tbl, %object
+	.size	p_gc_blk_tbl, 8
+p_gc_blk_tbl:
+	.zero	8
+	.section	.bss.p_gc_data_buf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR104,. + 0
+	.type	p_gc_data_buf, %object
+	.size	p_gc_data_buf, 8
+p_gc_data_buf:
+	.zero	8
+	.section	.bss.p_gc_page_info,"aw",@nobits
+	.align	3
+	.set	.LANCHOR111,. + 0
+	.type	p_gc_page_info, %object
+	.size	p_gc_page_info, 8
+p_gc_page_info:
+	.zero	8
+	.section	.bss.p_gc_spare_buf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR105,. + 0
+	.type	p_gc_spare_buf, %object
+	.size	p_gc_spare_buf, 8
+p_gc_spare_buf:
+	.zero	8
+	.section	.bss.p_io_data_buf_0,"aw",@nobits
+	.align	3
+	.set	.LANCHOR183,. + 0
+	.type	p_io_data_buf_0, %object
+	.size	p_io_data_buf_0, 8
+p_io_data_buf_0:
+	.zero	8
+	.section	.bss.p_io_data_buf_1,"aw",@nobits
+	.align	3
+	.set	.LANCHOR184,. + 0
+	.type	p_io_data_buf_1, %object
+	.size	p_io_data_buf_1, 8
+p_io_data_buf_1:
+	.zero	8
+	.section	.bss.p_io_spare_buf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR186,. + 0
+	.type	p_io_spare_buf, %object
+	.size	p_io_spare_buf, 8
+p_io_spare_buf:
+	.zero	8
+	.section	.bss.p_l2p_map_buf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR123,. + 0
+	.type	p_l2p_map_buf, %object
+	.size	p_l2p_map_buf, 8
+p_l2p_map_buf:
+	.zero	8
+	.section	.bss.p_l2p_ram_map,"aw",@nobits
+	.align	3
+	.set	.LANCHOR95,. + 0
+	.type	p_l2p_ram_map, %object
+	.size	p_l2p_ram_map, 8
+p_l2p_ram_map:
+	.zero	8
+	.section	.bss.p_map_block_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR126,. + 0
+	.type	p_map_block_table, %object
+	.size	p_map_block_table, 8
+p_map_block_table:
+	.zero	8
+	.section	.bss.p_map_block_valid_page_count,"aw",@nobits
+	.align	3
+	.set	.LANCHOR122,. + 0
+	.type	p_map_block_valid_page_count, %object
+	.size	p_map_block_valid_page_count, 8
+p_map_block_valid_page_count:
+	.zero	8
+	.section	.bss.p_map_block_ver_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR127,. + 0
+	.type	p_map_block_ver_table, %object
+	.size	p_map_block_ver_table, 8
+p_map_block_ver_table:
+	.zero	8
+	.section	.bss.p_map_region_ppn_check_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR192,. + 0
+	.type	p_map_region_ppn_check_table, %object
+	.size	p_map_region_ppn_check_table, 8
+p_map_region_ppn_check_table:
+	.zero	8
+	.section	.bss.p_map_region_ppn_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR128,. + 0
+	.type	p_map_region_ppn_table, %object
+	.size	p_map_region_ppn_table, 8
+p_map_region_ppn_table:
+	.zero	8
+	.section	.bss.p_plane_order_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR45,. + 0
+	.type	p_plane_order_table, %object
+	.size	p_plane_order_table, 32
+p_plane_order_table:
+	.zero	32
+	.section	.bss.p_swl_mul_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR134,. + 0
+	.type	p_swl_mul_table, %object
+	.size	p_swl_mul_table, 8
+p_swl_mul_table:
+	.zero	8
+	.section	.bss.p_sys_data_buf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR79,. + 0
+	.type	p_sys_data_buf, %object
+	.size	p_sys_data_buf, 8
+p_sys_data_buf:
+	.zero	8
+	.section	.bss.p_sys_data_buf_1,"aw",@nobits
+	.align	3
+	.set	.LANCHOR181,. + 0
+	.type	p_sys_data_buf_1, %object
+	.size	p_sys_data_buf_1, 8
+p_sys_data_buf_1:
+	.zero	8
+	.section	.bss.p_sys_spare_buf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR185,. + 0
+	.type	p_sys_spare_buf, %object
+	.size	p_sys_spare_buf, 8
+p_sys_spare_buf:
+	.zero	8
+	.section	.bss.p_valid_page_count_check_table,"aw",@nobits
+	.align	3
+	.type	p_valid_page_count_check_table, %object
+	.size	p_valid_page_count_check_table, 8
+p_valid_page_count_check_table:
+	.zero	8
+	.section	.bss.p_valid_page_count_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR82,. + 0
+	.type	p_valid_page_count_table, %object
+	.size	p_valid_page_count_table, 8
+p_valid_page_count_table:
+	.zero	8
+	.section	.bss.p_vendor_block_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR70,. + 0
+	.type	p_vendor_block_table, %object
+	.size	p_vendor_block_table, 8
+p_vendor_block_table:
+	.zero	8
+	.section	.bss.p_vendor_block_valid_page_count,"aw",@nobits
+	.align	3
+	.set	.LANCHOR189,. + 0
+	.type	p_vendor_block_valid_page_count, %object
+	.size	p_vendor_block_valid_page_count, 8
+p_vendor_block_valid_page_count:
+	.zero	8
+	.section	.bss.p_vendor_block_ver_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR190,. + 0
+	.type	p_vendor_block_ver_table, %object
+	.size	p_vendor_block_ver_table, 8
+p_vendor_block_ver_table:
+	.zero	8
+	.section	.bss.p_vendor_data_buf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR182,. + 0
+	.type	p_vendor_data_buf, %object
+	.size	p_vendor_data_buf, 8
+p_vendor_data_buf:
+	.zero	8
+	.section	.bss.p_vendor_region_ppn_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR191,. + 0
+	.type	p_vendor_region_ppn_table, %object
+	.size	p_vendor_region_ppn_table, 8
+p_vendor_region_ppn_table:
+	.zero	8
+	.section	.bss.read_retry_cur_offset,"aw",@nobits
+	.align	3
+	.set	.LANCHOR21,. + 0
+	.type	read_retry_cur_offset, %object
+	.size	read_retry_cur_offset, 4
+read_retry_cur_offset:
+	.zero	4
+	.section	.bss.req_erase,"aw",@nobits
+	.align	3
+	.set	.LANCHOR76,. + 0
+	.type	req_erase, %object
+	.size	req_erase, 8
+req_erase:
+	.zero	8
+	.section	.bss.req_gc,"aw",@nobits
+	.align	3
+	.set	.LANCHOR106,. + 0
+	.type	req_gc, %object
+	.size	req_gc, 8
+req_gc:
+	.zero	8
+	.section	.bss.req_gc_dst,"aw",@nobits
+	.align	3
+	.set	.LANCHOR179,. + 0
+	.type	req_gc_dst, %object
+	.size	req_gc_dst, 8
+req_gc_dst:
+	.zero	8
+	.section	.bss.req_prgm,"aw",@nobits
+	.align	3
+	.set	.LANCHOR180,. + 0
+	.type	req_prgm, %object
+	.size	req_prgm, 8
+req_prgm:
+	.zero	8
+	.section	.bss.req_read,"aw",@nobits
+	.align	3
+	.set	.LANCHOR178,. + 0
+	.type	req_read, %object
+	.size	req_read, 8
+req_read:
+	.zero	8
+	.section	.bss.req_sys,"aw",@nobits
+	.align	3
+	.set	.LANCHOR199,. + 0
+	.type	req_sys, %object
+	.size	req_sys, 56
+req_sys:
+	.zero	56
+	.section	.bss.slcPageToMlcPageTbl,"aw",@nobits
+	.align	2
+	.set	.LANCHOR16,. + 0
+	.type	slcPageToMlcPageTbl, %object
+	.size	slcPageToMlcPageTbl, 512
+slcPageToMlcPageTbl:
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+	.section	.data.FtlMallocOffset,"aw",@progbits
+	.align	2
+	.type	FtlMallocOffset, %object
+	.size	FtlMallocOffset, 4
+FtlMallocOffset:
+	.word	64
+	.section	.data.NandFlashParaTbl,"aw",@progbits
+	.align	3
+	.set	.LANCHOR140,. + 0
+	.type	NandFlashParaTbl, %object
+	.size	NandFlashParaTbl, 2336
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+	.hword	1038
+	.hword	281
+	.byte	2
+	.byte	0
+	.byte	24
+	.byte	36
+	.byte	3
+	.byte	1
+	.byte	3
+	.byte	0
+	.byte	0
+	.byte	0
+	.zero	4
+	.byte	6
+	.byte	-20
+	.byte	-41
+	.byte	20
+	.byte	118
+	.byte	84
+	.byte	-62
+	.byte	0
+	.byte	1
+	.byte	16
+	.hword	128
+	.byte	2
+	.byte	2
+	.hword	2076
+	.hword	1169
+	.byte	2
+	.byte	0
+	.byte	24
+	.byte	40
+	.byte	3
+	.byte	1
+	.byte	3
+	.byte	0
+	.byte	0
+	.byte	0
+	.zero	4
+	.section	.data.NandOptPara,"aw",@progbits
+	.align	3
+	.set	.LANCHOR141,. + 0
+	.type	NandOptPara, %object
+	.size	NandOptPara, 128
+NandOptPara:
+	.byte	1
+	.byte	0
+	.byte	49
+	.byte	63
+	.byte	0
+	.byte	49
+	.byte	-128
+	.byte	21
+	.byte	0
+	.byte	50
+	.byte	17
+	.byte	-128
+	.byte	112
+	.byte	120
+	.byte	120
+	.byte	3
+	.byte	1
+	.byte	0
+	.zero	14
+	.byte	2
+	.byte	0
+	.byte	49
+	.byte	63
+	.byte	0
+	.byte	49
+	.byte	-128
+	.byte	21
+	.byte	0
+	.byte	0
+	.byte	17
+	.byte	-127
+	.byte	112
+	.byte	-15
+	.byte	-14
+	.byte	0
+	.byte	0
+	.byte	0
+	.zero	14
+	.byte	3
+	.byte	0
+	.byte	49
+	.byte	63
+	.byte	0
+	.byte	49
+	.byte	-128
+	.byte	21
+	.byte	96
+	.byte	96
+	.byte	17
+	.byte	-127
+	.byte	112
+	.byte	-15
+	.byte	-14
+	.byte	0
+	.byte	0
+	.byte	0
+	.zero	14
+	.byte	4
+	.byte	0
+	.byte	49
+	.byte	63
+	.byte	0
+	.byte	49
+	.byte	-128
+	.byte	21
+	.byte	96
+	.byte	96
+	.byte	17
+	.byte	-127
+	.byte	112
+	.byte	112
+	.byte	112
+	.byte	0
+	.byte	0
+	.byte	0
+	.zero	14
+	.section	.data.SamsungRefValue,"aw",@progbits
+	.align	3
+	.set	.LANCHOR14,. + 0
+	.type	SamsungRefValue, %object
+	.size	SamsungRefValue, 64
+SamsungRefValue:
+	.byte	-89
+	.byte	-92
+	.byte	-91
+	.byte	-90
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	5
+	.byte	10
+	.byte	0
+	.byte	0
+	.byte	40
+	.byte	0
+	.byte	-20
+	.byte	-40
+	.byte	-19
+	.byte	-11
+	.byte	-19
+	.byte	-26
+	.byte	10
+	.byte	15
+	.byte	5
+	.byte	0
+	.byte	15
+	.byte	10
+	.byte	-5
+	.byte	-20
+	.byte	-24
+	.byte	-17
+	.byte	-24
+	.byte	-36
+	.byte	-15
+	.byte	-5
+	.byte	-2
+	.byte	-16
+	.byte	10
+	.byte	0
+	.byte	-5
+	.byte	-20
+	.byte	-48
+	.byte	-30
+	.byte	-48
+	.byte	-62
+	.byte	20
+	.byte	15
+	.byte	-5
+	.byte	-20
+	.byte	-24
+	.byte	-5
+	.byte	-24
+	.byte	-36
+	.byte	30
+	.byte	20
+	.byte	-5
+	.byte	-20
+	.byte	-5
+	.byte	-1
+	.byte	-5
+	.byte	-8
+	.byte	7
+	.byte	12
+	.byte	2
+	.byte	0
+	.section	.data.Toshiba15RefValue,"aw",@progbits
+	.align	3
+	.set	.LANCHOR9,. + 0
+	.type	Toshiba15RefValue, %object
+	.size	Toshiba15RefValue, 95
+Toshiba15RefValue:
+	.byte	4
+	.byte	5
+	.byte	6
+	.byte	7
+	.byte	13
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	2
+	.byte	4
+	.byte	2
+	.byte	0
+	.byte	0
+	.byte	8
+	.byte	8
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	124
+	.byte	0
+	.byte	124
+	.byte	124
+	.byte	0
+	.byte	122
+	.byte	0
+	.byte	122
+	.byte	122
+	.byte	0
+	.byte	11
+	.byte	126
+	.byte	118
+	.byte	116
+	.byte	0
+	.byte	120
+	.byte	2
+	.byte	120
+	.byte	122
+	.byte	0
+	.byte	126
+	.byte	4
+	.byte	126
+	.byte	122
+	.byte	0
+	.byte	16
+	.byte	118
+	.byte	114
+	.byte	112
+	.byte	0
+	.byte	118
+	.byte	4
+	.byte	118
+	.byte	120
+	.byte	0
+	.byte	4
+	.byte	4
+	.byte	4
+	.byte	118
+	.byte	0
+	.byte	2
+	.byte	0
+	.byte	126
+	.byte	124
+	.byte	0
+	.byte	6
+	.byte	10
+	.byte	6
+	.byte	2
+	.byte	0
+	.byte	116
+	.byte	124
+	.byte	116
+	.byte	118
+	.byte	0
+	.byte	4
+	.byte	4
+	.byte	124
+	.byte	126
+	.byte	0
+	.byte	0
+	.byte	124
+	.byte	120
+	.byte	120
+	.byte	0
+	.byte	124
+	.byte	118
+	.byte	116
+	.byte	114
+	.byte	0
+	.section	.data.ToshibaA19RefValue,"aw",@progbits
+	.align	3
+	.set	.LANCHOR10,. + 0
+	.type	ToshibaA19RefValue, %object
+	.size	ToshibaA19RefValue, 45
+ToshibaA19RefValue:
+	.byte	4
+	.byte	5
+	.byte	6
+	.byte	7
+	.byte	13
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	4
+	.byte	4
+	.byte	124
+	.byte	126
+	.byte	0
+	.byte	0
+	.byte	124
+	.byte	120
+	.byte	120
+	.byte	0
+	.byte	124
+	.byte	118
+	.byte	116
+	.byte	114
+	.byte	0
+	.byte	8
+	.byte	8
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	11
+	.byte	126
+	.byte	118
+	.byte	116
+	.byte	0
+	.byte	16
+	.byte	118
+	.byte	114
+	.byte	112
+	.byte	0
+	.byte	2
+	.byte	0
+	.byte	126
+	.byte	124
+	.byte	0
+	.section	.data.ToshibaRefValue,"aw",@progbits
+	.align	3
+	.set	.LANCHOR12,. + 0
+	.type	ToshibaRefValue, %object
+	.size	ToshibaRefValue, 8
+ToshibaRefValue:
+	.byte	0
+	.byte	4
+	.byte	124
+	.byte	120
+	.byte	116
+	.byte	8
+	.byte	12
+	.byte	112
+	.section	.data.ftl_gc_temp_block_bops_scan_page_addr,"aw",@progbits
+	.align	1
+	.set	.LANCHOR233,. + 0
+	.type	ftl_gc_temp_block_bops_scan_page_addr, %object
+	.size	ftl_gc_temp_block_bops_scan_page_addr, 2
+ftl_gc_temp_block_bops_scan_page_addr:
+	.hword	-1
+	.section	.data.gFtlInitStatus,"aw",@progbits
+	.align	2
+	.set	.LANCHOR223,. + 0
+	.type	gFtlInitStatus, %object
+	.size	gFtlInitStatus, 4
+gFtlInitStatus:
+	.word	-1
+	.section	.data.gNandParaInfo,"aw",@progbits
+	.align	3
+	.set	.LANCHOR29,. + 0
+	.type	gNandParaInfo, %object
+	.size	gNandParaInfo, 32
+gNandParaInfo:
+	.byte	0
+	.byte	0
+	.zero	5
+	.byte	0
+	.byte	1
+	.byte	8
+	.hword	128
+	.byte	2
+	.byte	1
+	.hword	2048
+	.hword	0
+	.byte	1
+	.byte	0
+	.byte	24
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.zero	4
+	.section	.data.gSlcNandParaInfo,"aw",@progbits
+	.align	3
+	.set	.LANCHOR197,. + 0
+	.type	gSlcNandParaInfo, %object
+	.size	gSlcNandParaInfo, 32
+gSlcNandParaInfo:
+	.byte	2
+	.byte	-104
+	.byte	-15
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	1
+	.byte	1
+	.byte	4
+	.hword	64
+	.byte	1
+	.byte	1
+	.hword	1024
+	.hword	256
+	.byte	0
+	.byte	0
+	.byte	16
+	.byte	40
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.zero	4
+	.section	.data.power_up_flag,"aw",@progbits
+	.align	2
+	.type	power_up_flag, %object
+	.size	power_up_flag, 4
+power_up_flag:
+	.word	1
+	.section	.data.random_seed,"aw",@progbits
+	.align	3
+	.set	.LANCHOR4,. + 0
+	.type	random_seed, %object
+	.size	random_seed, 256
+random_seed:
+	.hword	22378
+	.hword	1512
+	.hword	25245
+	.hword	17827
+	.hword	25756
+	.hword	19440
+	.hword	9026
+	.hword	10030
+	.hword	29528
+	.hword	20467
+	.hword	29676
+	.hword	24432
+	.hword	31328
+	.hword	6872
+	.hword	13426
+	.hword	13842
+	.hword	8783
+	.hword	1108
+	.hword	782
+	.hword	28837
+	.hword	30729
+	.hword	9505
+	.hword	18676
+	.hword	23085
+	.hword	18730
+	.hword	1085
+	.hword	32609
+	.hword	14697
+	.hword	20858
+	.hword	15170
+	.hword	30365
+	.hword	1607
+	.hword	32298
+	.hword	4995
+	.hword	18905
+	.hword	1976
+	.hword	9592
+	.hword	20204
+	.hword	17443
+	.hword	13615
+	.hword	23330
+	.hword	29369
+	.hword	13947
+	.hword	9398
+	.hword	32398
+	.hword	8984
+	.hword	27600
+	.hword	21785
+	.hword	6019
+	.hword	6311
+	.hword	31598
+	.hword	30210
+	.hword	19327
+	.hword	13896
+	.hword	11347
+	.hword	27545
+	.hword	3107
+	.hword	26575
+	.hword	32270
+	.hword	19852
+	.hword	20601
+	.hword	8349
+	.hword	9290
+	.hword	29819
+	.hword	13579
+	.hword	3661
+	.hword	28676
+	.hword	27331
+	.hword	32574
+	.hword	8693
+	.hword	31253
+	.hword	9081
+	.hword	5399
+	.hword	6842
+	.hword	20087
+	.hword	5537
+	.hword	1274
+	.hword	11617
+	.hword	9530
+	.hword	4866
+	.hword	8035
+	.hword	23219
+	.hword	1178
+	.hword	23272
+	.hword	7383
+	.hword	18944
+	.hword	12488
+	.hword	12871
+	.hword	29340
+	.hword	20532
+	.hword	11022
+	.hword	22514
+	.hword	228
+	.hword	22363
+	.hword	24978
+	.hword	14584
+	.hword	12138
+	.hword	3092
+	.hword	17916
+	.hword	16863
+	.hword	14554
+	.hword	31457
+	.hword	29474
+	.hword	25311
+	.hword	24121
+	.hword	3684
+	.hword	28037
+	.hword	22865
+	.hword	22839
+	.hword	25217
+	.hword	13217
+	.hword	27186
+	.hword	14938
+	.hword	11180
+	.hword	29754
+	.hword	24180
+	.hword	15150
+	.hword	32455
+	.hword	20434
+	.hword	23848
+	.hword	29983
+	.hword	16120
+	.hword	14769
+	.hword	20041
+	.hword	29803
+	.hword	28406
+	.hword	17598
+	.hword	28087
+	.section	.data.refValueDefault,"aw",@progbits
+	.align	3
+	.set	.LANCHOR193,. + 0
+	.type	refValueDefault, %object
+	.size	refValueDefault, 28
+refValueDefault:
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	6
+	.byte	10
+	.byte	6
+	.byte	0
+	.byte	-3
+	.byte	-7
+	.byte	-8
+	.byte	0
+	.byte	-6
+	.byte	-13
+	.byte	-15
+	.byte	0
+	.byte	-11
+	.byte	-20
+	.byte	-23
+	.byte	0
+	.byte	0
+	.byte	-26
+	.byte	-30
+	.byte	0
+	.byte	0
+	.byte	-32
+	.byte	-37
+	.section	.rodata.FlashDdrTunningRead.str1.1,"aMS",@progbits,1
+.LC7:
+	.string	"sdr read ok %x ecc=%d\n"
+.LC8:
+	.string	"sync para %d\n"
+.LC9:
+	.string	"TOG mode Read error %x %x\n"
+	.section	.rodata.FlashEraseSLc2KBlocks.str1.1,"aMS",@progbits,1
+.LC1:
+	.string	"FlashEraseBlocks pageAddr error %x\n"
+	.section	.rodata.FlashInit.str1.1,"aMS",@progbits,1
+.LC18:
+	.string	"No.%d FLASH ID:%x %x %x %x %x %x\n"
+.LC19:
+	.string	"FlashLoadPhyInfo fail %x!!\n"
+	.section	.rodata.FlashProgSlc2KPages.str1.1,"aMS",@progbits,1
+.LC24:
+	.string	"prog error: = %x\n"
+.LC25:
+	.string	"prog read error: = %x\n"
+.LC26:
+	.string	"prog read s error: = %x %x %x\n"
+.LC27:
+	.string	"prog read d error: = %x %x %x\n"
+	.section	.rodata.FlashReadFacBbtData.str1.1,"aMS",@progbits,1
+.LC55:
+	.string	"BBT:"
+	.section	.rodata.FlashReadIdbDataRaw.str1.1,"aMS",@progbits,1
+.LC12:
+	.string	"ECC:%d\n"
+	.section	.rodata.FlashReadPage.str1.1,"aMS",@progbits,1
+.LC10:
+	.string	"read retry status %x %x %x\n"
+	.section	.rodata.FlashReadPages.str1.1,"aMS",@progbits,1
+.LC23:
+	.string	"ReadRetry pageadd=%x ecc=%x err=%x\n"
+	.section	.rodata.FlashReadSlc2KPages.str1.1,"aMS",@progbits,1
+.LC20:
+	.string	"Read pageadd=%x  ecc=%x err=%x\n"
+.LC21:
+	.string	"data:"
+.LC22:
+	.string	"spare:"
+	.section	.rodata.FtlBbmMapBadBlock.str1.1,"aMS",@progbits,1
+.LC2:
+	.string	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\n"
+	.section	.rodata.FtlBbmTblFlush.str1.1,"aMS",@progbits,1
+.LC28:
+	.string	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\n"
+.LC29:
+	.string	"FtlBbmTblFlush error:%x\n"
+.LC30:
+	.string	"FtlBbmTblFlush error = %x error count = %d\n"
+	.section	.rodata.FtlGcFreeTempBlock.str1.1,"aMS",@progbits,1
+.LC47:
+	.string	"GC des block %x done\n"
+	.section	.rodata.FtlGcScanTempBlk.str1.1,"aMS",@progbits,1
+.LC46:
+	.string	"FtlGcScanTempBlkError ID %x %x!!!!!!!\n"
+	.section	.rodata.FtlInit.str1.1,"aMS",@progbits,1
+.LC48:
+	.string	"FTL version: 5.0.47 20180208"
+.LC49:
+	.string	"...%s: no bad block mapping table, format device\n"
+.LC50:
+	.string	"...%s FtlSysBlkInit error ,format device!\n"
+	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",@progbits,1
+.LC40:
+	.string	"no ect"
+	.section	.rodata.FtlMapTblRecovery.str1.1,"aMS",@progbits,1
+.LC42:
+	.string	"page map lost %x %x %x %x\n"
+	.section	.rodata.FtlMapWritePage.str1.1,"aMS",@progbits,1
+.LC35:
+	.string	"FtlMapWritePage error = %x\n"
+.LC36:
+	.string	"FtlMapWritePage error = %x error count = %d\n"
+	.section	.rodata.FtlProgPages.str1.1,"aMS",@progbits,1
+.LC38:
+	.string	"Ftlwrite decrement_vpc_count %x = %d\n"
+	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",@progbits,1
+.LC43:
+	.string	"RSB refresh addr %x\n"
+.LC44:
+	.string	"spuer block %x vpn is 0\n "
+.LC45:
+	.string	"g_recovery_ppa %x ver %x\n "
+	.section	.rodata.FtlVendorPartRead.str1.1,"aMS",@progbits,1
+.LC39:
+	.string	"FtlVendorPartRead refresh = %x phyAddr = %x\n"
+	.section	.rodata.FtlVpcTblFlush.str1.1,"aMS",@progbits,1
+.LC32:
+	.string	"FtlVpcTblFlush error = %x error count = %d\n"
+	.section	.rodata.Ftl_load_ext_data.str1.1,"aMS",@progbits,1
+.LC41:
+	.string	"slc mode"
+	.section	.rodata.HynixGetReadRetryDefault.str1.1,"aMS",@progbits,1
+.LC16:
+	.string	"otp error! %d"
+.LC17:
+	.string	"rr"
+	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",@progbits,1
+.LC4:
+	.string	"\n!!!!! error @ func:%s - line:%d\n"
+.LC5:
+	.string	"!!!!! FTL sys Error !!!!!"
+.LC6:
+	.string	"%s\n"
+	.section	.rodata.MicronReadRetrial.str1.1,"aMS",@progbits,1
+.LC11:
+	.string	"micron RR %d row=%x,count %d,status=%d\n"
+	.section	.rodata.__func__.10004,"a",@progbits
+	.align	3
+	.set	.LANCHOR214,. + 0
+	.type	__func__.10004, %object
+	.size	__func__.10004, 16
+__func__.10004:
+	.string	"FtlReUsePrevPpa"
+	.section	.rodata.__func__.10037,"a",@progbits
+	.align	3
+	.set	.LANCHOR228,. + 0
+	.type	__func__.10037, %object
+	.size	__func__.10037, 22
+__func__.10037:
+	.string	"FtlRecoverySuperblock"
+	.section	.rodata.__func__.10091,"a",@progbits
+	.align	3
+	.set	.LANCHOR100,. + 0
+	.type	__func__.10091, %object
+	.size	__func__.10091, 16
+__func__.10091:
+	.string	"make_superblock"
+	.section	.rodata.__func__.10111,"a",@progbits
+	.align	3
+	.set	.LANCHOR138,. + 0
+	.type	__func__.10111, %object
+	.size	__func__.10111, 18
+__func__.10111:
+	.string	"SupperBlkListInit"
+	.section	.rodata.__func__.10188,"a",@progbits
+	.align	3
+	.set	.LANCHOR200,. + 0
+	.type	__func__.10188, %object
+	.size	__func__.10188, 25
+__func__.10188:
+	.string	"allocate_data_superblock"
+	.section	.rodata.__func__.10202,"a",@progbits
+	.align	3
+	.set	.LANCHOR219,. + 0
+	.type	__func__.10202, %object
+	.size	__func__.10202, 29
+__func__.10202:
+	.string	"allocate_new_data_superblock"
+	.section	.rodata.__func__.10208,"a",@progbits
+	.align	3
+	.set	.LANCHOR205,. + 0
+	.type	__func__.10208, %object
+	.size	__func__.10208, 19
+__func__.10208:
+	.string	"get_new_active_ppa"
+	.section	.rodata.__func__.10219,"a",@progbits
+	.align	3
+	.set	.LANCHOR203,. + 0
+	.type	__func__.10219, %object
+	.size	__func__.10219, 16
+__func__.10219:
+	.string	"update_vpc_list"
+	.section	.rodata.__func__.10224,"a",@progbits
+	.align	3
+	.set	.LANCHOR204,. + 0
+	.type	__func__.10224, %object
+	.size	__func__.10224, 20
+__func__.10224:
+	.string	"decrement_vpc_count"
+	.section	.rodata.__func__.10292,"a",@progbits
+	.align	3
+	.set	.LANCHOR234,. + 0
+	.type	__func__.10292, %object
+	.size	__func__.10292, 19
+__func__.10292:
+	.string	"FtlGcFreeTempBlock"
+	.section	.rodata.__func__.10386,"a",@progbits
+	.align	3
+	.set	.LANCHOR238,. + 0
+	.type	__func__.10386, %object
+	.size	__func__.10386, 23
+__func__.10386:
+	.string	"rk_ftl_garbage_collect"
+	.section	.rodata.__func__.9318,"a",@progbits
+	.align	3
+	.set	.LANCHOR240,. + 0
+	.type	__func__.9318, %object
+	.size	__func__.9318, 8
+__func__.9318:
+	.string	"FtlInit"
+	.section	.rodata.__func__.9378,"a",@progbits
+	.align	3
+	.set	.LANCHOR220,. + 0
+	.type	__func__.9378, %object
+	.size	__func__.9378, 13
+__func__.9378:
+	.string	"FtlProgPages"
+	.section	.rodata.__func__.9404,"a",@progbits
+	.align	3
+	.set	.LANCHOR242,. + 0
+	.type	__func__.9404, %object
+	.size	__func__.9404, 10
+__func__.9404:
+	.string	"ftl_write"
+	.section	.rodata.__func__.9467,"a",@progbits
+	.align	3
+	.set	.LANCHOR121,. + 0
+	.type	__func__.9467, %object
+	.size	__func__.9467, 14
+__func__.9467:
+	.string	"FtlBbt2Bitmap"
+	.section	.rodata.__func__.9513,"a",@progbits
+	.align	3
+	.set	.LANCHOR208,. + 0
+	.type	__func__.9513, %object
+	.size	__func__.9513, 11
+__func__.9513:
+	.string	"FtlLoadBbt"
+	.section	.rodata.__func__.9622,"a",@progbits
+	.align	3
+	.set	.LANCHOR88,. + 0
+	.type	__func__.9622, %object
+	.size	__func__.9622, 17
+__func__.9622:
+	.string	"INSERT_FREE_LIST"
+	.section	.rodata.__func__.9626,"a",@progbits
+	.align	3
+	.set	.LANCHOR85,. + 0
+	.type	__func__.9626, %object
+	.size	__func__.9626, 17
+__func__.9626:
+	.string	"INSERT_DATA_LIST"
+	.section	.rodata.__func__.9656,"a",@progbits
+	.align	3
+	.set	.LANCHOR89,. + 0
+	.type	__func__.9656, %object
+	.size	__func__.9656, 17
+__func__.9656:
+	.string	"List_remove_node"
+	.section	.rodata.__func__.9686,"a",@progbits
+	.align	3
+	.set	.LANCHOR93,. + 0
+	.type	__func__.9686, %object
+	.size	__func__.9686, 22
+__func__.9686:
+	.string	"List_update_data_list"
+	.section	.rodata.__func__.9693,"a",@progbits
+	.align	3
+	.set	.LANCHOR212,. + 0
+	.type	__func__.9693, %object
+	.size	__func__.9693, 16
+__func__.9693:
+	.string	"load_l2p_region"
+	.section	.rodata.__func__.9723,"a",@progbits
+	.align	3
+	.set	.LANCHOR94,. + 0
+	.type	__func__.9723, %object
+	.size	__func__.9723, 26
+__func__.9723:
+	.string	"ftl_map_blk_alloc_new_blk"
+	.section	.rodata.__func__.9737,"a",@progbits
+	.align	3
+	.set	.LANCHOR209,. + 0
+	.type	__func__.9737, %object
+	.size	__func__.9737, 15
+__func__.9737:
+	.string	"ftl_map_blk_gc"
+	.section	.rodata.__func__.9750,"a",@progbits
+	.align	3
+	.set	.LANCHOR210,. + 0
+	.type	__func__.9750, %object
+	.size	__func__.9750, 31
+__func__.9750:
+	.string	"Ftl_write_map_blk_to_last_page"
+	.section	.rodata.__func__.9763,"a",@progbits
+	.align	3
+	.set	.LANCHOR211,. + 0
+	.type	__func__.9763, %object
+	.size	__func__.9763, 16
+__func__.9763:
+	.string	"FtlMapWritePage"
+	.section	.rodata.__func__.9783,"a",@progbits
+	.align	3
+	.set	.LANCHOR97,. + 0
+	.type	__func__.9783, %object
+	.size	__func__.9783, 22
+__func__.9783:
+	.string	"select_l2p_ram_region"
+	.section	.rodata.__func__.9799,"a",@progbits
+	.align	3
+	.set	.LANCHOR213,. + 0
+	.type	__func__.9799, %object
+	.size	__func__.9799, 9
+__func__.9799:
+	.string	"log2phys"
+	.section	.rodata.__func__.9861,"a",@progbits
+	.align	3
+	.set	.LANCHOR207,. + 0
+	.type	__func__.9861, %object
+	.size	__func__.9861, 15
+__func__.9861:
+	.string	"FtlVpcTblFlush"
+	.section	.rodata.__func__.9880,"a",@progbits
+	.align	3
+	.set	.LANCHOR224,. + 0
+	.type	__func__.9880, %object
+	.size	__func__.9880, 14
+__func__.9880:
+	.string	"FtlScanSysBlk"
+	.section	.rodata.__func__.9934,"a",@progbits
+	.align	3
+	.set	.LANCHOR225,. + 0
+	.type	__func__.9934, %object
+	.size	__func__.9934, 15
+__func__.9934:
+	.string	"FtlLoadSysInfo"
+	.section	.rodata.decrement_vpc_count.str1.1,"aMS",@progbits,1
+.LC31:
+	.string	"decrement_vpc_count %x = %d\n"
+	.section	.rodata.ftl_fix_nand_power_lost_error.str1.1,"aMS",@progbits,1
+.LC52:
+	.string	"fix power lost blk = %x vpc=%x\n"
+.LC53:
+	.string	"erase power lost blk = %x vpc=%x\n"
+	.section	.rodata.ftl_map_blk_gc.str1.1,"aMS",@progbits,1
+.LC33:
+	.string	"ftl_map_blk_gc blk info: %x %x %x\n"
+.LC34:
+	.string	"page map lost: %x %x\n"
+	.section	.rodata.ftl_write.str1.1,"aMS",@progbits,1
+.LC54:
+	.string	"FtlWrite: lpa error:%x %x\n"
+	.section	.rodata.load_l2p_region.str1.1,"aMS",@progbits,1
+.LC37:
+	.string	"load_l2p_region refresh = %x phyAddr = %x\n"
+	.section	.rodata.remove_from_free_sys_Queue.str1.1,"aMS",@progbits,1
+.LC3:
+	.string	"remove_from_free_sys_Queue %x\n"
+	.section	.rodata.rk_ftl_init.str1.1,"aMS",@progbits,1
+.LC51:
+	.string	"FtlInit %x\n"
+	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
+.LC13:
+	.string	"%s 0x%x:"
+.LC14:
+	.string	"%x "
+.LC15:
+	.string	""
+	.hidden	free
+	.ident	"GCC: (Linaro GCC 6.3-2017.05) 6.3.1 20170404"
+	.section	.note.GNU-stack,"",@progbits
diff --git a/drivers/rknand/rk_zftl_arm_v7.S b/drivers/rknand/rk_zftl_arm_v7.S
new file mode 100644
index 0000000000..2b1d874c9e
--- /dev/null
+++ b/drivers/rknand/rk_zftl_arm_v7.S
@@ -0,0 +1,24010 @@
+/*
+ * Copyright (c) 2016-2017, Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ * date: 2018-02-11
+ */
+	.arch armv7-a
+	.eabi_attribute 20, 1
+	.eabi_attribute 21, 1
+	.eabi_attribute 23, 3
+	.eabi_attribute 24, 1
+	.eabi_attribute 25, 1
+	.eabi_attribute 26, 2
+	.eabi_attribute 30, 4
+	.eabi_attribute 34, 0
+	.eabi_attribute 18, 2
+	.file	"rk_zftl_arm_v7.S"
+	.section	.text.flash_mem_cmp8,"ax",%progbits
+	.align	1
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_mem_cmp8, %function
+flash_mem_cmp8:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	movs	r3, #0
+	push	{r4, r5, lr}
+.L2:
+	cmp	r3, r2
+	bne	.L5
+	movs	r0, #0
+	pop	{r4, r5, pc}
+.L5:
+	ldrb	r5, [r0, r3]	@ zero_extendqisi2
+	ldrb	r4, [r1, r3]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	cmp	r5, r4
+	beq	.L2
+	mov	r0, r3
+	pop	{r4, r5, pc}
+	.size	flash_mem_cmp8, .-flash_mem_cmp8
+	.section	.text.nand_flash_print_info,"ax",%progbits
+	.align	1
+	.global	nand_flash_print_info
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	nand_flash_print_info, %function
+nand_flash_print_info:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	nand_flash_print_info, .-nand_flash_print_info
+	.section	.text.FlashTimingCfg,"ax",%progbits
+	.align	1
+	.global	FlashTimingCfg
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashTimingCfg, %function
+FlashTimingCfg:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	FlashTimingCfg, .-FlashTimingCfg
+	.section	.text.timer_delay_ns,"ax",%progbits
+	.align	1
+	.global	timer_delay_ns
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	timer_delay_ns, %function
+timer_delay_ns:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	lsrs	r0, r0, #4
+	sub	sp, sp, #8
+	str	r0, [sp, #4]
+.L9:
+	ldr	r3, [sp, #4]
+	subs	r2, r3, #1
+	str	r2, [sp, #4]
+	cmp	r3, #0
+	bne	.L9
+	add	sp, sp, #8
+	@ sp needed
+	bx	lr
+	.size	timer_delay_ns, .-timer_delay_ns
+	.section	.text.flash_read_status,"ax",%progbits
+	.align	1
+	.global	flash_read_status
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_read_status, %function
+flash_read_status:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	movs	r3, #112
+	mov	r1, r0
+	str	r3, [r0, #8]
+	movs	r0, #120
+	bl	timer_delay_ns
+	ldr	r0, [r1]
+	uxtb	r0, r0
+	pop	{r3, pc}
+	.size	flash_read_status, .-flash_read_status
+	.section	.text.toshiba_set_rr_para,"ax",%progbits
+	.align	1
+	.global	toshiba_set_rr_para
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	toshiba_set_rr_para, %function
+toshiba_set_rr_para:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, lr}
+	add	r6, r1, r1, lsl #2
+	ldr	r8, .L20+16
+	mov	r5, r0
+	movs	r4, #0
+	ldr	r7, .L20
+.L13:
+	ldrb	r3, [r8]	@ zero_extendqisi2
+	cmp	r4, r3
+	bcc	.L17
+	pop	{r4, r5, r6, r7, r8, pc}
+.L17:
+	movs	r3, #85
+	movs	r0, #200
+	str	r3, [r5, #8]
+	ldrsb	r3, [r4, r7]
+	str	r3, [r5, #4]
+	bl	timer_delay_ns
+	ldr	r3, .L20+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #34
+	bne	.L14
+	adds	r3, r4, r6
+	add	r3, r3, r7
+.L19:
+	ldrsb	r3, [r3, #5]
+.L18:
+	str	r3, [r5]
+	adds	r4, r4, #1
+	b	.L13
+.L14:
+	cmp	r3, #35
+	bne	.L16
+	ldr	r3, .L20+8
+	adds	r2, r4, r6
+	add	r3, r3, r2
+	b	.L19
+.L16:
+	ldr	r3, .L20+12
+	ldrsb	r3, [r3, r1]
+	b	.L18
+.L21:
+	.align	2
+.L20:
+	.word	.LANCHOR0
+	.word	.LANCHOR1
+	.word	.LANCHOR2
+	.word	.LANCHOR3
+	.word	.LANCHOR4
+	.size	toshiba_set_rr_para, .-toshiba_set_rr_para
+	.section	.text.hynix_set_rr_para,"ax",%progbits
+	.align	1
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	hynix_set_rr_para, %function
+hynix_set_rr_para:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L25
+	push	{r4, r5, r6, r7, r8, lr}
+	lsls	r7, r0, #8
+	ldr	r2, .L25+4
+	ldr	r3, [r3]
+	ldr	r5, [r2]
+	movs	r2, #54
+	ldrb	r4, [r3, #113]	@ zero_extendqisi2
+	add	r6, r3, #127
+	add	r8, r5, r7
+	str	r2, [r8, #2056]
+	movs	r2, #160
+	muls	r1, r4, r1
+	mla	r1, r2, r0, r1
+	add	r1, r1, r3
+	add	r3, r3, r4
+	adds	r1, r1, #143
+	add	r4, r3, #127
+.L23:
+	cmp	r6, r4
+	bne	.L24
+	add	r5, r5, r7
+	movs	r3, #22
+	str	r3, [r5, #2056]
+	pop	{r4, r5, r6, r7, r8, pc}
+.L24:
+	ldrb	r3, [r6, #1]!	@ zero_extendqisi2
+	movs	r0, #120
+	str	r3, [r8, #2052]
+	bl	timer_delay_ns
+	ldrsb	r3, [r1, #1]!
+	str	r3, [r8, #2048]
+	b	.L23
+.L26:
+	.align	2
+.L25:
+	.word	.LANCHOR5
+	.word	.LANCHOR6
+	.size	hynix_set_rr_para, .-hynix_set_rr_para
+	.section	.text.hynix_reconfig_rr_para,"ax",%progbits
+	.align	1
+	.global	hynix_reconfig_rr_para
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	hynix_reconfig_rr_para, %function
+hynix_reconfig_rr_para:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	mov	r4, r0
+	ldr	r3, .L32
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	subs	r3, r3, #1
+	cmp	r3, #6
+	bhi	.L27
+	ldr	r5, .L32+4
+	ldr	r3, [r5]
+	add	r3, r3, r0
+	ldrb	r3, [r3, #120]	@ zero_extendqisi2
+	cbz	r3, .L27
+	movs	r1, #0
+	bl	hynix_set_rr_para
+	ldr	r0, [r5]
+	movs	r3, #0
+	add	r0, r0, r4
+	strb	r3, [r0, #120]
+.L27:
+	pop	{r3, r4, r5, pc}
+.L33:
+	.align	2
+.L32:
+	.word	.LANCHOR1
+	.word	.LANCHOR5
+	.size	hynix_reconfig_rr_para, .-hynix_reconfig_rr_para
+	.section	.text.nandc_set_ddr_para,"ax",%progbits
+	.align	1
+	.global	nandc_set_ddr_para
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	nandc_set_ddr_para, %function
+nandc_set_ddr_para:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L37
+	ldr	r2, .L37+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	ldr	r2, [r2]
+	cmp	r3, #9
+	lsl	r3, r0, #16
+	lsl	r0, r0, #8
+	orr	r3, r3, r0
+	orr	r3, r3, #3
+	ite	eq
+	streq	r3, [r2, #80]
+	strne	r3, [r2, #304]
+	bx	lr
+.L38:
+	.align	2
+.L37:
+	.word	.LANCHOR7
+	.word	.LANCHOR6
+	.size	nandc_set_ddr_para, .-nandc_set_ddr_para
+	.section	.text.nandc_get_ddr_para,"ax",%progbits
+	.align	1
+	.global	nandc_get_ddr_para
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	nandc_get_ddr_para, %function
+nandc_get_ddr_para:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L43
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #9
+	ldr	r3, .L43+4
+	ldr	r3, [r3]
+	ite	eq
+	ldreq	r0, [r3, #80]
+	ldrne	r0, [r3, #304]
+	ubfx	r0, r0, #8, #8
+	bx	lr
+.L44:
+	.align	2
+.L43:
+	.word	.LANCHOR7
+	.word	.LANCHOR6
+	.size	nandc_get_ddr_para, .-nandc_get_ddr_para
+	.section	.text.nandc_set_if_mode,"ax",%progbits
+	.align	1
+	.global	nandc_set_if_mode
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	nandc_set_if_mode, %function
+nandc_set_if_mode:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L53
+	ands	r1, r0, #6
+	ldr	r3, [r3]
+	ldr	r2, [r3]
+	beq	.L46
+	lsls	r1, r0, #29
+	ldr	r1, .L53+4
+	orr	r2, r2, #24576
+	bfc	r2, #15, #1
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	orr	r2, r2, #196608
+	it	mi
+	orrmi	r2, r2, #32768
+	cmp	r1, #9
+	ldr	r1, .L53+8
+	bne	.L48
+	movw	r0, #8321
+	str	r0, [r3, #8]
+	str	r1, [r3, #80]
+	movs	r1, #38
+	str	r1, [r3, #84]
+	movs	r1, #39
+	str	r1, [r3, #84]
+.L49:
+	str	r2, [r3]
+	bx	lr
+.L48:
+	movw	r0, #8322
+	str	r0, [r3, #344]
+	str	r1, [r3, #304]
+	movs	r1, #38
+	str	r1, [r3, #308]
+	movs	r1, #39
+	str	r1, [r3, #308]
+	b	.L49
+.L46:
+	bfi	r2, r1, #13, #1
+	b	.L49
+.L54:
+	.align	2
+.L53:
+	.word	.LANCHOR6
+	.word	.LANCHOR7
+	.word	1052675
+	.size	nandc_set_if_mode, .-nandc_set_if_mode
+	.section	.text.nandc_cs,"ax",%progbits
+	.align	1
+	.global	nandc_cs
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	nandc_cs, %function
+nandc_cs:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L56
+	movs	r2, #1
+	lsl	r0, r2, r0
+	ldr	r1, [r3]
+	ldr	r3, [r1]
+	bfi	r3, r0, #0, #8
+	str	r3, [r1]
+	bx	lr
+.L57:
+	.align	2
+.L56:
+	.word	.LANCHOR6
+	.size	nandc_cs, .-nandc_cs
+	.section	.text.nandc_de_cs,"ax",%progbits
+	.align	1
+	.global	nandc_de_cs
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	nandc_de_cs, %function
+nandc_de_cs:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L59
+	ldr	r2, [r3]
+	ldr	r3, [r2]
+	bfc	r3, #0, #8
+	bfc	r3, #17, #1
+	str	r3, [r2]
+	bx	lr
+.L60:
+	.align	2
+.L59:
+	.word	.LANCHOR6
+	.size	nandc_de_cs, .-nandc_de_cs
+	.section	.text.flash_wait_device_ready_raw,"ax",%progbits
+	.align	1
+	.global	flash_wait_device_ready_raw
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_wait_device_ready_raw, %function
+flash_wait_device_ready_raw:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r5, r1
+	ldr	r3, .L70
+	mov	r7, r2
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r0
+	bhi	.L62
+	mov	r2, #604
+	ldr	r1, .L70+4
+	ldr	r0, .L70+8
+	bl	printf
+.L63:
+	b	.L63
+.L62:
+	ldr	r3, .L70+12
+	ldrb	r6, [r3, r0]	@ zero_extendqisi2
+	ldr	r3, .L70+16
+	mov	r0, r6
+	ldr	r4, [r3]
+	bl	nandc_cs
+	uxtb	r3, r5
+	movs	r0, #120
+	add	r4, r4, r6, lsl #8
+	str	r0, [r4, #2056]
+	str	r3, [r4, #2052]
+	lsrs	r3, r5, #8
+	lsrs	r5, r5, #16
+	str	r3, [r4, #2052]
+	str	r5, [r4, #2052]
+.L69:
+	bl	timer_delay_ns
+	ldr	r1, [r4, #2048]
+	uxtb	r1, r1
+	bics	r3, r7, r1
+	bne	.L65
+	cmp	r1, #255
+	beq	.L65
+	mov	r0, r6
+	bl	nandc_de_cs
+	mov	r0, r1
+	pop	{r3, r4, r5, r6, r7, pc}
+.L65:
+	movs	r0, #20
+	b	.L69
+.L71:
+	.align	2
+.L70:
+	.word	.LANCHOR8
+	.word	.LANCHOR9
+	.word	.LC0
+	.word	.LANCHOR10
+	.word	.LANCHOR6
+	.size	flash_wait_device_ready_raw, .-flash_wait_device_ready_raw
+	.global	__aeabi_uidiv
+	.global	__aeabi_uidivmod
+	.section	.text.flash_wait_device_ready,"ax",%progbits
+	.align	1
+	.global	flash_wait_device_ready
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_wait_device_ready, %function
+flash_wait_device_ready:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	tst	r0, #50331648
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	mov	r10, r1
+	ubfx	r4, r0, #0, #21
+	ubfx	r8, r0, #21, #3
+	bne	.L73
+	ldr	r3, .L82
+	ldr	r6, .L82+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L74
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	cbz	r3, .L73
+.L74:
+	ldr	r3, .L82+8
+	mov	r0, r4
+	ldrh	r5, [r3]
+	mov	r1, r5
+	bl	__aeabi_uidiv
+	mov	r1, r5
+	mul	r7, r5, r0
+	mov	r0, r4
+	bl	__aeabi_uidivmod
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	cbz	r3, .L75
+	add	r4, r7, r1, lsl #1
+.L73:
+	mov	r2, r10
+	mov	r1, r4
+	mov	r0, r8
+	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
+	b	flash_wait_device_ready_raw
+.L75:
+	ldr	r3, .L82+12
+	ldrh	r4, [r3, r1, lsl #1]
+	add	r4, r4, r7
+	b	.L73
+.L83:
+	.align	2
+.L82:
+	.word	.LANCHOR11
+	.word	.LANCHOR12
+	.word	.LANCHOR13
+	.word	.LANCHOR14
+	.size	flash_wait_device_ready, .-flash_wait_device_ready
+	.section	.text.nandc_wait_flash_ready,"ax",%progbits
+	.align	1
+	.global	nandc_wait_flash_ready
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	nandc_wait_flash_ready, %function
+nandc_wait_flash_ready:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, lr}
+	ldr	r1, .L89
+	ldr	r4, .L89+4
+.L86:
+	movs	r0, #100
+	bl	timer_delay_ns
+	ldr	r3, [r4]
+	ldr	r3, [r3]
+	str	r3, [sp, #4]
+	ldr	r3, [sp, #4]
+	lsls	r3, r3, #22
+	bmi	.L87
+	subs	r1, r1, #1
+	bne	.L86
+	mov	r0, #-1
+.L84:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, pc}
+.L87:
+	movs	r0, #0
+	b	.L84
+.L90:
+	.align	2
+.L89:
+	.word	100000
+	.word	.LANCHOR6
+	.size	nandc_wait_flash_ready, .-nandc_wait_flash_ready
+	.section	.text.sandisk_set_rr_para,"ax",%progbits
+	.align	1
+	.global	sandisk_set_rr_para
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sandisk_set_rr_para, %function
+sandisk_set_rr_para:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	movs	r3, #239
+	str	r3, [r0, #8]
+	movs	r3, #17
+	mov	r4, r0
+	str	r3, [r0, #4]
+	movs	r0, #200
+	bl	timer_delay_ns
+	ldr	r3, .L97
+	add	r1, r1, r1, lsl #2
+	ldr	r6, .L97+4
+	movs	r2, #0
+	ldr	r7, .L97+8
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	ldr	r3, .L97+12
+	ldrb	r5, [r3]	@ zero_extendqisi2
+.L92:
+	cmp	r2, r0
+	bcc	.L95
+	pop	{r3, r4, r5, r6, r7, lr}
+	b	nandc_wait_flash_ready
+.L95:
+	adds	r3, r2, r1
+	cmp	r5, #67
+	ite	eq
+	addeq	r3, r3, r7
+	addne	r3, r3, r6
+	ldrsb	r3, [r3, #5]
+	adds	r2, r2, #1
+	str	r3, [r4]
+	b	.L92
+.L98:
+	.align	2
+.L97:
+	.word	.LANCHOR4
+	.word	.LANCHOR2
+	.word	.LANCHOR0
+	.word	.LANCHOR1
+	.size	sandisk_set_rr_para, .-sandisk_set_rr_para
+	.section	.text.toshiba_3d_set_tlc_rr_para,"ax",%progbits
+	.align	1
+	.global	toshiba_3d_set_tlc_rr_para
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	toshiba_3d_set_tlc_rr_para, %function
+toshiba_3d_set_tlc_rr_para:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	movs	r6, #0
+	movs	r7, #213
+	mvn	r3, #118
+	adds	r1, r1, #1
+	mov	r4, r0
+	str	r7, [r0, #8]
+	rsb	r1, r1, r1, lsl #3
+	str	r6, [r0, #4]
+	str	r3, [r0, #4]
+	ldr	r3, .L100
+	adds	r5, r3, r1
+	ldrsb	r3, [r3, r1]
+	str	r3, [r0]
+	ldrsb	r3, [r5, #1]
+	str	r3, [r0]
+	ldrsb	r3, [r5, #2]
+	str	r3, [r0]
+	ldrsb	r3, [r5, #3]
+	str	r3, [r0]
+	bl	nandc_wait_flash_ready
+	mvn	r3, #117
+	str	r7, [r4, #8]
+	str	r6, [r4, #4]
+	str	r3, [r4, #4]
+	ldrsb	r3, [r5, #4]
+	str	r3, [r4]
+	ldrsb	r3, [r5, #5]
+	str	r3, [r4]
+	ldrsb	r3, [r5, #6]
+	str	r3, [r4]
+	str	r6, [r4]
+	pop	{r3, r4, r5, r6, r7, lr}
+	b	nandc_wait_flash_ready
+.L101:
+	.align	2
+.L100:
+	.word	.LANCHOR15
+	.size	toshiba_3d_set_tlc_rr_para, .-toshiba_3d_set_tlc_rr_para
+	.section	.text.toshiba_3d_set_slc_rr_para,"ax",%progbits
+	.align	1
+	.global	toshiba_3d_set_slc_rr_para
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	toshiba_3d_set_slc_rr_para, %function
+toshiba_3d_set_slc_rr_para:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	movs	r3, #213
+	mvn	r2, #116
+	str	r3, [r0, #8]
+	movs	r3, #0
+	str	r3, [r0, #4]
+	str	r2, [r0, #4]
+	ldr	r2, .L103
+	add	r1, r1, r2
+	ldrsb	r2, [r1, #1]
+	str	r2, [r0]
+	str	r3, [r0]
+	str	r3, [r0]
+	str	r3, [r0]
+	b	nandc_wait_flash_ready
+.L104:
+	.align	2
+.L103:
+	.word	.LANCHOR16
+	.size	toshiba_3d_set_slc_rr_para, .-toshiba_3d_set_slc_rr_para
+	.section	.text.toshiba_tlc_set_rr_para,"ax",%progbits
+	.align	1
+	.global	toshiba_tlc_set_rr_para
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	toshiba_tlc_set_rr_para, %function
+toshiba_tlc_set_rr_para:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	movs	r6, #239
+	mov	r4, r0
+	str	r6, [r0, #8]
+	cbz	r2, .L106
+	movs	r3, #18
+	rsb	r1, r1, r1, lsl #3
+	str	r3, [r0, #4]
+	ldr	r3, .L108
+	adds	r5, r3, r1
+	ldrb	r3, [r3, r1]	@ zero_extendqisi2
+	str	r3, [r0]
+	ldrb	r3, [r5, #1]	@ zero_extendqisi2
+	str	r3, [r0]
+	ldrb	r3, [r5, #2]	@ zero_extendqisi2
+	str	r3, [r0]
+	ldrb	r3, [r5, #3]	@ zero_extendqisi2
+	str	r3, [r0]
+	bl	nandc_wait_flash_ready
+	movs	r3, #19
+	str	r6, [r4, #8]
+	str	r3, [r4, #4]
+	ldrb	r3, [r5, #4]	@ zero_extendqisi2
+	str	r3, [r4]
+	ldrb	r3, [r5, #5]	@ zero_extendqisi2
+	str	r3, [r4]
+	ldrb	r3, [r5, #6]	@ zero_extendqisi2
+	str	r3, [r4]
+	movs	r3, #0
+	str	r3, [r4]
+.L107:
+	pop	{r4, r5, r6, lr}
+	b	nandc_wait_flash_ready
+.L106:
+	movs	r3, #20
+	str	r3, [r0, #4]
+	ldr	r3, .L108+4
+	ldrb	r3, [r3, r1]	@ zero_extendqisi2
+	str	r3, [r0]
+	str	r2, [r0]
+	str	r2, [r0]
+	str	r2, [r0]
+	b	.L107
+.L109:
+	.align	2
+.L108:
+	.word	.LANCHOR17
+	.word	.LANCHOR18
+	.size	toshiba_tlc_set_rr_para, .-toshiba_tlc_set_rr_para
+	.section	.text.flash_enter_slc_mode,"ax",%progbits
+	.align	1
+	.global	flash_enter_slc_mode
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_enter_slc_mode, %function
+flash_enter_slc_mode:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L122
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	cbz	r2, .L110
+	ldr	r3, .L122+4
+	cmp	r2, #1
+	ldr	r3, [r3]
+	bne	.L112
+	ldr	r2, .L122+8
+	ldrb	r2, [r2, #29]	@ zero_extendqisi2
+	cbz	r2, .L110
+	add	r0, r3, r0, lsl #8
+	str	r2, [r0, #2056]
+	bx	lr
+.L112:
+	cmp	r2, #2
+	bne	.L110
+	ldr	r1, .L122+12
+	ldrb	r2, [r1]	@ zero_extendqisi2
+	cbz	r2, .L110
+	add	r0, r3, r0, lsl #8
+	movs	r3, #239
+	movs	r2, #0
+	str	r3, [r0, #2056]
+	movs	r3, #145
+	str	r3, [r0, #2052]
+	movs	r3, #1
+	str	r2, [r0, #2048]
+	str	r3, [r0, #2048]
+	str	r2, [r0, #2048]
+	str	r2, [r0, #2048]
+	strb	r2, [r1]
+	b	nandc_wait_flash_ready
+.L110:
+	bx	lr
+.L123:
+	.align	2
+.L122:
+	.word	.LANCHOR11
+	.word	.LANCHOR6
+	.word	.LANCHOR19
+	.word	.LANCHOR20
+	.size	flash_enter_slc_mode, .-flash_enter_slc_mode
+	.section	.text.flash_exit_slc_mode,"ax",%progbits
+	.align	1
+	.global	flash_exit_slc_mode
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_exit_slc_mode, %function
+flash_exit_slc_mode:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L136
+	push	{r4}
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	cbz	r2, .L124
+	ldr	r3, .L136+4
+	cmp	r2, #1
+	ldr	r3, [r3]
+	bne	.L126
+	ldr	r2, .L136+8
+	ldrb	r2, [r2, #30]	@ zero_extendqisi2
+	cbz	r2, .L124
+	add	r0, r3, r0, lsl #8
+	str	r2, [r0, #2056]
+.L124:
+	pop	{r4}
+	bx	lr
+.L126:
+	cmp	r2, #2
+	bne	.L124
+	ldr	r4, .L136+12
+	ldrb	r1, [r4]	@ zero_extendqisi2
+	cmp	r1, #0
+	bne	.L124
+	ldr	r2, .L136+8
+	add	r0, r3, r0, lsl #8
+	movs	r3, #239
+	str	r3, [r0, #2056]
+	movs	r3, #145
+	ldrb	r2, [r2, #12]	@ zero_extendqisi2
+	str	r3, [r0, #2052]
+	movs	r3, #1
+	cmp	r2, #2
+	it	ne
+	movne	r2, #4
+	str	r2, [r0, #2048]
+	strb	r2, [r4]
+	str	r3, [r0, #2048]
+	pop	{r4}
+	str	r1, [r0, #2048]
+	str	r1, [r0, #2048]
+	b	nandc_wait_flash_ready
+.L137:
+	.align	2
+.L136:
+	.word	.LANCHOR11
+	.word	.LANCHOR6
+	.word	.LANCHOR19
+	.word	.LANCHOR20
+	.size	flash_exit_slc_mode, .-flash_exit_slc_mode
+	.section	.text.flash_erase_duplane_block,"ax",%progbits
+	.align	1
+	.global	flash_erase_duplane_block
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_erase_duplane_block, %function
+flash_erase_duplane_block:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	fp, r1
+	ldr	r1, .L154
+	mov	r7, r2
+	mov	r6, r3
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	cmp	r1, r0
+	bhi	.L139
+	movw	r2, #517
+	ldr	r1, .L154+4
+	ldr	r0, .L154+8
+	bl	printf
+.L140:
+	b	.L140
+.L139:
+	ldr	r1, .L154+12
+	ldrb	r4, [r1, r0]	@ zero_extendqisi2
+	ldr	r1, .L154+16
+	add	r8, r4, #8
+	ldr	r5, [r1]
+	ldr	r1, .L154+20
+	ldr	r1, [r1]
+	add	r8, r5, r8, lsl #8
+	lsls	r1, r1, #27
+	bpl	.L141
+	mov	r1, r4
+	ldr	r0, .L154+24
+	bl	printf
+.L141:
+	bl	nandc_wait_flash_ready
+	mov	r0, r4
+	bl	nandc_cs
+	mov	r0, r4
+	cmp	fp, #0
+	bne	.L142
+	bl	flash_enter_slc_mode
+.L143:
+	lsls	r2, r4, #8
+	movs	r1, #96
+	adds	r3, r5, r2
+	str	r1, [r3, #2056]
+	uxtb	r1, r7
+	str	r1, [r3, #2052]
+	lsrs	r1, r7, #8
+	str	r1, [r3, #2052]
+	lsrs	r1, r7, #16
+	str	r1, [r3, #2052]
+	ldr	r1, .L154+28
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	cmp	r1, #0
+	bne	.L147
+	movs	r1, #208
+	str	r2, [sp, #4]
+	str	r1, [r3, #2056]
+	str	r3, [sp]
+	bl	nandc_wait_flash_ready
+	mov	r0, r8
+	bl	flash_read_status
+	ldr	r3, [sp]
+	and	r10, r0, #5
+	ldr	r2, [sp, #4]
+.L144:
+	add	r5, r5, r2
+	movs	r2, #96
+	str	r2, [r5, #2056]
+	uxtb	r2, r6
+	str	r2, [r3, #2052]
+	lsrs	r2, r6, #8
+	lsrs	r6, r6, #16
+	str	r2, [r3, #2052]
+	str	r6, [r3, #2052]
+	movs	r3, #208
+	str	r3, [r5, #2056]
+	bl	nandc_wait_flash_ready
+	mov	r0, r8
+	bl	flash_read_status
+	mov	r5, r0
+	cmp	fp, #0
+	bne	.L145
+	mov	r0, r4
+	bl	flash_exit_slc_mode
+.L145:
+	mov	r0, r4
+	bl	nandc_de_cs
+	and	r0, r5, #5
+	orrs	r10, r0, r10
+	beq	.L146
+	mov	r2, r5
+	mov	r1, r7
+	ldr	r0, .L154+32
+	bl	printf
+.L146:
+	mov	r0, r10
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L142:
+	bl	flash_exit_slc_mode
+	b	.L143
+.L147:
+	mov	r10, #0
+	b	.L144
+.L155:
+	.align	2
+.L154:
+	.word	.LANCHOR8
+	.word	.LANCHOR21
+	.word	.LC0
+	.word	.LANCHOR10
+	.word	.LANCHOR6
+	.word	.LANCHOR22
+	.word	.LC1
+	.word	.LANCHOR23
+	.word	.LC2
+	.size	flash_erase_duplane_block, .-flash_erase_duplane_block
+	.section	.text.flash_erase_block_en,"ax",%progbits
+	.align	1
+	.global	flash_erase_block_en
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_erase_block_en, %function
+flash_erase_block_en:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L170
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r8, r1
+	mov	r6, r2
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r0
+	bhi	.L157
+	movw	r2, #561
+	ldr	r1, .L170+4
+	ldr	r0, .L170+8
+	bl	printf
+.L158:
+	b	.L158
+.L157:
+	ldr	r3, .L170+12
+	ldrb	r4, [r3, r0]	@ zero_extendqisi2
+	ldr	r3, .L170+16
+	add	r7, r4, #8
+	ldr	r5, [r3]
+	ldr	r3, .L170+20
+	ldr	r3, [r3]
+	add	r7, r5, r7, lsl #8
+	lsls	r3, r3, #27
+	bpl	.L159
+	mov	r1, r4
+	ldr	r0, .L170+24
+	bl	printf
+.L159:
+	bl	nandc_wait_flash_ready
+	mov	r0, r4
+	bl	nandc_cs
+	mov	r0, r4
+	cmp	r8, #0
+	bne	.L160
+	bl	flash_enter_slc_mode
+.L161:
+	add	r3, r5, r4, lsl #8
+	movs	r1, #96
+	ubfx	r2, r6, #0, #21
+	str	r1, [r3, #2056]
+	uxtb	r1, r6
+	str	r1, [r3, #2052]
+	lsrs	r1, r2, #8
+	lsrs	r2, r2, #16
+	str	r1, [r3, #2052]
+	str	r2, [r3, #2052]
+	movs	r2, #208
+	str	r2, [r3, #2056]
+	bl	nandc_wait_flash_ready
+	mov	r0, r7
+	bl	flash_read_status
+	mov	r5, r0
+	cmp	r8, #0
+	bne	.L162
+	mov	r0, r4
+	bl	flash_exit_slc_mode
+.L162:
+	mov	r0, r4
+	bl	nandc_de_cs
+	ands	r5, r5, #5
+	beq	.L163
+	ldr	r3, .L170+28
+	mov	r0, r6
+	ldrh	r1, [r3]
+	bl	__aeabi_uidiv
+	mov	r2, r5
+	mov	r1, r0
+	ldr	r0, .L170+32
+	bl	printf
+.L163:
+	mov	r0, r5
+	pop	{r4, r5, r6, r7, r8, pc}
+.L160:
+	bl	flash_exit_slc_mode
+	b	.L161
+.L171:
+	.align	2
+.L170:
+	.word	.LANCHOR8
+	.word	.LANCHOR24
+	.word	.LC0
+	.word	.LANCHOR10
+	.word	.LANCHOR6
+	.word	.LANCHOR22
+	.word	.LC3
+	.word	.LANCHOR13
+	.word	.LC4
+	.size	flash_erase_block_en, .-flash_erase_block_en
+	.section	.text.flash_erase_block,"ax",%progbits
+	.align	1
+	.global	flash_erase_block
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_erase_block, %function
+flash_erase_block:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r2, r1
+	movs	r1, #0
+	b	flash_erase_block_en
+	.size	flash_erase_block, .-flash_erase_block
+	.section	.text.flash_erase_all,"ax",%progbits
+	.align	1
+	.global	flash_erase_all
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_erase_all, %function
+flash_erase_all:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L178
+	push	{r4, r5, r6, r7, r8, lr}
+	movs	r5, #0
+	ldr	r7, .L178+4
+	ldrb	r4, [r3, #13]	@ zero_extendqisi2
+	ldrh	r3, [r3, #14]
+	smulbb	r4, r4, r3
+	uxth	r4, r4
+.L174:
+	ldr	r3, .L178+8
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	uxth	r3, r5
+	cmp	r2, r3
+	bhi	.L177
+	movs	r1, #0
+	ldr	r0, .L178+12
+	pop	{r4, r5, r6, r7, r8, lr}
+	b	printf
+.L177:
+	ldr	r2, .L178+16
+	uxth	r3, r5
+	movs	r6, #0
+	ldrb	r8, [r2, r3]	@ zero_extendqisi2
+.L175:
+	uxth	r3, r6
+	cmp	r4, r3
+	bhi	.L176
+	adds	r5, r5, #1
+	b	.L174
+.L176:
+	ldrh	r1, [r7]
+	mov	r0, r8
+	muls	r1, r6, r1
+	adds	r6, r6, #1
+	bl	flash_erase_block
+	b	.L175
+.L179:
+	.align	2
+.L178:
+	.word	.LANCHOR19
+	.word	.LANCHOR13
+	.word	.LANCHOR8
+	.word	.LC5
+	.word	.LANCHOR10
+	.size	flash_erase_all, .-flash_erase_all
+	.section	.text.flash_set_interface_mode,"ax",%progbits
+	.align	1
+	.global	flash_set_interface_mode
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_set_interface_mode, %function
+flash_set_interface_mode:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L202
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r6, #239
+	ldr	ip, .L202+8
+	movs	r7, #128
+	mov	lr, #1
+	mov	r8, #35
+	ldr	r5, [r3]
+	mov	r10, #5
+	ldr	r3, .L202+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	and	r2, r3, #4
+	and	r3, r3, #1
+	str	r3, [sp]
+	movs	r3, #0
+	str	r2, [sp, #4]
+	mov	r2, r3
+.L188:
+	ldrb	r4, [ip, r3, lsl #3]	@ zero_extendqisi2
+	cmp	r4, #152
+	beq	.L181
+	cmp	r4, #69
+	beq	.L181
+	cmp	r4, #44
+	bne	.L182
+.L181:
+	cmp	r0, #1
+	bne	.L183
+	ldr	r1, [sp]
+	cbz	r1, .L182
+	lsls	r1, r3, #8
+	cmp	r4, #44
+	add	fp, r5, r1
+	str	r6, [fp, #2056]
+	itete	eq
+	streq	r0, [fp, #2052]
+	strne	r7, [fp, #2052]
+	streq	r10, [fp, #2048]
+	strne	r0, [fp, #2048]
+.L187:
+	add	r1, r1, r5
+	str	r2, [r1, #2048]
+	str	r2, [r1, #2048]
+	str	r2, [r1, #2048]
+.L182:
+	adds	r3, r3, #1
+	cmp	r3, #4
+	bne	.L188
+	bl	nandc_wait_flash_ready
+	movs	r0, #0
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L183:
+	ldr	r1, [sp, #4]
+	cmp	r1, #0
+	beq	.L182
+	lsls	r1, r3, #8
+	cmp	r4, #44
+	add	fp, r5, r1
+	str	r6, [fp, #2056]
+	itete	eq
+	streq	lr, [fp, #2052]
+	strne	r7, [fp, #2052]
+	streq	r8, [fp, #2048]
+	strne	r2, [fp, #2048]
+	b	.L187
+.L203:
+	.align	2
+.L202:
+	.word	.LANCHOR6
+	.word	.LANCHOR25
+	.word	.LANCHOR26
+	.size	flash_set_interface_mode, .-flash_set_interface_mode
+	.section	.text.flash_reset,"ax",%progbits
+	.align	1
+	.global	flash_reset
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_reset, %function
+flash_reset:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L205
+	ldr	r3, [r3]
+	add	r0, r3, r0, lsl #8
+	movs	r3, #255
+	str	r3, [r0, #2056]
+	b	nandc_wait_flash_ready
+.L206:
+	.align	2
+.L205:
+	.word	.LANCHOR6
+	.size	flash_reset, .-flash_reset
+	.section	.text.flash_read_id,"ax",%progbits
+	.align	1
+	.global	flash_read_id
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_read_id, %function
+flash_read_id:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L208
+	push	{r4, r5, r6, lr}
+	mov	r6, r0
+	mov	r5, r1
+	ldr	r4, [r3]
+	bl	flash_reset
+	mov	r0, r6
+	bl	nandc_cs
+	add	r4, r4, r6, lsl #8
+	movs	r3, #144
+	movs	r0, #200
+	str	r3, [r4, #2056]
+	movs	r3, #0
+	str	r3, [r4, #2052]
+	bl	timer_delay_ns
+	ldr	r3, [r4, #2048]
+	mov	r0, r6
+	strb	r3, [r5]
+	ldr	r3, [r4, #2048]
+	strb	r3, [r5, #1]
+	ldr	r3, [r4, #2048]
+	strb	r3, [r5, #2]
+	ldr	r3, [r4, #2048]
+	strb	r3, [r5, #3]
+	ldr	r3, [r4, #2048]
+	strb	r3, [r5, #4]
+	ldr	r3, [r4, #2048]
+	strb	r3, [r5, #5]
+	ldr	r3, [r4, #2048]
+	strb	r3, [r5, #6]
+	ldr	r3, [r4, #2048]
+	strb	r3, [r5, #7]
+	pop	{r4, r5, r6, lr}
+	b	nandc_de_cs
+.L209:
+	.align	2
+.L208:
+	.word	.LANCHOR6
+	.size	flash_read_id, .-flash_read_id
+	.section	.text.flash_read_spare,"ax",%progbits
+	.align	1
+	.global	flash_read_spare
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_read_spare, %function
+flash_read_spare:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	mov	r5, r2
+	ldr	r3, .L211
+	ldr	r2, .L211+4
+	ldrb	r3, [r3, #9]	@ zero_extendqisi2
+	ldr	r4, [r2]
+	movs	r2, #0
+	lsls	r3, r3, #9
+	add	r4, r4, r0, lsl #8
+	str	r2, [r4, #2056]
+	str	r3, [r4, #2052]
+	lsrs	r3, r3, #8
+	str	r3, [r4, #2052]
+	uxtb	r3, r1
+	str	r3, [r4, #2052]
+	lsrs	r3, r1, #8
+	lsrs	r1, r1, #16
+	str	r3, [r4, #2052]
+	movs	r3, #48
+	str	r1, [r4, #2052]
+	str	r3, [r4, #2056]
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r4, #2048]
+	strb	r3, [r5]
+	pop	{r3, r4, r5, pc}
+.L212:
+	.align	2
+.L211:
+	.word	.LANCHOR19
+	.word	.LANCHOR6
+	.size	flash_read_spare, .-flash_read_spare
+	.section	.text.sandisk_prog_test_bad_block,"ax",%progbits
+	.align	1
+	.global	sandisk_prog_test_bad_block
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sandisk_prog_test_bad_block, %function
+sandisk_prog_test_bad_block:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	lsls	r0, r0, #8
+	ldr	r3, .L220
+	ldr	r5, .L220+4
+	ldr	r4, [r3]
+	ldrb	r3, [r5, #29]	@ zero_extendqisi2
+	cbz	r3, .L214
+	adds	r2, r4, r0
+	str	r3, [r2, #2056]
+.L215:
+	add	r4, r4, r0
+	movs	r3, #128
+	str	r3, [r4, #2056]
+	movs	r3, #0
+	str	r3, [r4, #2052]
+	str	r3, [r4, #2052]
+	uxtb	r3, r1
+	str	r3, [r4, #2052]
+	lsrs	r3, r1, #8
+	lsrs	r1, r1, #16
+	str	r3, [r4, #2052]
+	movs	r3, #16
+	str	r1, [r4, #2052]
+	str	r3, [r4, #2056]
+	bl	nandc_wait_flash_ready
+	movs	r3, #112
+	movs	r0, #80
+	str	r3, [r4, #2056]
+	bl	timer_delay_ns
+	ldrb	r3, [r5, #30]	@ zero_extendqisi2
+	ldr	r0, [r4, #2048]
+	and	r0, r0, #5
+	cbz	r3, .L213
+	str	r3, [r4, #2056]
+.L213:
+	pop	{r3, r4, r5, pc}
+.L214:
+	adds	r3, r4, r0
+	movs	r2, #162
+	str	r2, [r3, #2056]
+	b	.L215
+.L221:
+	.align	2
+.L220:
+	.word	.LANCHOR6
+	.word	.LANCHOR19
+	.size	sandisk_prog_test_bad_block, .-sandisk_prog_test_bad_block
+	.section	.text.nandc_bch_sel,"ax",%progbits
+	.align	1
+	.global	nandc_bch_sel
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	nandc_bch_sel, %function
+nandc_bch_sel:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r1, .L236
+	movs	r2, #0
+	push	{r4, lr}
+	movs	r3, #1
+	strb	r0, [r1]
+	ldr	r1, .L236+4
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	cmp	r1, #9
+	ldr	r1, .L236+8
+	ldr	r1, [r1]
+	bne	.L223
+	cmp	r0, #70
+	str	r3, [r1, #16]
+	beq	.L224
+	cmp	r0, #60
+	beq	.L231
+	cmp	r0, #40
+	ite	eq
+	moveq	r2, #2
+	movne	r2, r3
+.L224:
+	lsls	r3, r2, #25
+	orr	r3, r3, #1
+	str	r3, [r1, #32]
+	pop	{r4, pc}
+.L231:
+	movs	r2, #3
+	b	.L224
+.L223:
+	movs	r4, #16
+	str	r3, [r1, #8]
+	cmp	r0, r4
+	mov	r3, r2
+	bfi	r3, r4, #8, #8
+	bfi	r3, r2, #18, #1
+	bne	.L226
+.L229:
+	bfc	r3, #4, #1
+.L227:
+	orr	r3, r3, #1
+	str	r3, [r1, #12]
+	pop	{r4, pc}
+.L226:
+	cmp	r0, #24
+	bne	.L228
+	orr	r3, r3, #16
+	b	.L227
+.L228:
+	cmp	r0, #40
+	orr	r3, r3, #262144
+	orr	r3, r3, #16
+	bne	.L227
+	b	.L229
+.L237:
+	.align	2
+.L236:
+	.word	.LANCHOR27
+	.word	.LANCHOR7
+	.word	.LANCHOR6
+	.size	nandc_bch_sel, .-nandc_bch_sel
+	.section	.text.NandCIrqEnable,"ax",%progbits
+	.align	1
+	.global	NandCIrqEnable
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	NandCIrqEnable, %function
+NandCIrqEnable:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	NandCIrqEnable, .-NandCIrqEnable
+	.section	.text.NandCIrqDisable,"ax",%progbits
+	.align	1
+	.global	NandCIrqDisable
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	NandCIrqDisable, %function
+NandCIrqDisable:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	NandCIrqDisable, .-NandCIrqDisable
+	.section	.text.rk_nandc_get_irq_status,"ax",%progbits
+	.align	1
+	.global	rk_nandc_get_irq_status
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_nandc_get_irq_status, %function
+rk_nandc_get_irq_status:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L243
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #9
+	ite	eq
+	ldreq	r0, [r0, #296]
+	ldrne	r0, [r0, #372]
+	bx	lr
+.L244:
+	.align	2
+.L243:
+	.word	.LANCHOR7
+	.size	rk_nandc_get_irq_status, .-rk_nandc_get_irq_status
+	.section	.text.rk_nandc_flash_ready,"ax",%progbits
+	.align	1
+	.global	rk_nandc_flash_ready
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_nandc_flash_ready, %function
+rk_nandc_flash_ready:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	rk_nandc_flash_ready, .-rk_nandc_flash_ready
+	.section	.text.NandcIqrWaitFlashReady,"ax",%progbits
+	.align	1
+	.global	NandcIqrWaitFlashReady
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	NandcIqrWaitFlashReady, %function
+NandcIqrWaitFlashReady:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	NandcIqrWaitFlashReady, .-NandcIqrWaitFlashReady
+	.section	.text.rk_nandc_flash_xfer_completed,"ax",%progbits
+	.align	1
+	.global	rk_nandc_flash_xfer_completed
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_nandc_flash_xfer_completed, %function
+rk_nandc_flash_xfer_completed:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	rk_nandc_flash_xfer_completed, .-rk_nandc_flash_xfer_completed
+	.section	.text.nandc_xfer_start,"ax",%progbits
+	.align	1
+	.global	nandc_xfer_start
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	nandc_xfer_start, %function
+nandc_xfer_start:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r7, r0
+	ldr	r0, .L264
+	adds	r6, r1, #1
+	ldr	r5, .L264+4
+	ldrb	r0, [r0]	@ zero_extendqisi2
+	ldr	r10, .L264+24
+	cmp	r0, #9
+	bne	.L249
+	movs	r4, #0
+	movs	r1, #1
+	bfi	r4, r7, #1, #1
+	asrs	r6, r6, r1
+	orr	r4, r4, #8
+	bfi	r4, r1, #5, #2
+	ldr	r1, .L264+8
+	orr	r4, r4, #536870912
+	orr	r4, r4, #1024
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	bfc	r4, #4, #1
+	bfi	r4, r6, #22, #6
+	cbz	r1, .L250
+	ldr	r1, .L264+12
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	cbz	r1, .L250
+	orr	r4, r4, #512
+.L250:
+	add	r1, r2, #63
+	and	r6, r6, #63
+	bic	r1, r1, #63
+	bic	r0, r2, #63
+	add	r1, r1, r6, lsl #10
+	str	r2, [r5, #4]
+	str	r3, [r5, #8]
+	clz	r7, r7
+	str	r2, [r5, #12]
+	lsrs	r7, r7, #5
+	str	r3, [r5, #16]
+	bl	flush_dcache_range
+	ldr	r0, [r5, #8]
+	add	r1, r0, #63
+	bic	r0, r0, #63
+	bic	r1, r1, #63
+	add	r1, r1, r6, lsl #2
+	bl	flush_dcache_range
+	movs	r3, #1
+	ldr	r2, [r10]
+	str	r3, [r5, #20]
+	movs	r1, #16
+	ldr	r3, [r5, #12]
+	str	r3, [r2, #52]
+	ldr	r3, [r5, #16]
+	str	r3, [r2, #56]
+	ldr	r3, [r2, #48]
+	bfi	r3, r1, #9, #5
+	movs	r1, #2
+	orr	r3, r3, #448
+	bfi	r3, r1, #3, #3
+	ldr	r1, .L264+16
+	orr	r3, r3, #4
+	bfi	r3, r7, #1, #1
+	ldrh	r1, [r1]
+	orr	r3, r3, #1
+	bfi	r3, r1, #16, #11
+	str	r3, [r2, #48]
+	str	r4, [r2, #16]
+	orr	r4, r4, #4
+	str	r4, [r2, #16]
+.L248:
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L249:
+	ldr	r0, [r10]
+	movs	r4, #0
+	bfi	r4, r7, #1, #1
+	orr	r4, r4, #8
+	ldr	r8, [r0, #12]
+	movs	r0, #16
+	bfi	r8, r0, #8, #8
+	movs	r0, #1
+	bfi	r4, r0, #5, #2
+	asrs	r6, r6, r0
+	orr	r4, r4, #536870912
+	orr	r4, r4, #1024
+	bfc	r8, #3, #1
+	bfc	r4, #4, #1
+	bfc	r8, #5, #3
+	str	r6, [sp]
+	bfi	r4, r6, #22, #6
+	cmp	r7, #0
+	beq	.L252
+	ldr	r0, .L264+20
+	lsrs	r1, r1, #1
+	str	r1, [sp, #8]
+	ldrb	r0, [r0]	@ zero_extendqisi2
+	ldr	r1, [r5]
+	cmp	r0, #24
+	ite	hi
+	movhi	r0, #128
+	movls	r0, #64
+	str	r1, [sp, #12]
+	movs	r1, #0
+	str	r0, [sp, #4]
+	mov	r0, r1
+.L254:
+	ldr	r6, [sp, #4]
+	add	fp, r3, r0, lsl #2
+	add	lr, r6, r1
+	ldr	r6, [sp, #8]
+	cmp	r0, r6
+	blt	.L255
+.L256:
+	ldr	r3, [r5]
+	add	r1, r2, #63
+	bic	r1, r1, #63
+	bic	r0, r2, #63
+	str	r2, [r5, #4]
+	clz	r7, r7
+	str	r3, [r5, #8]
+	lsrs	r7, r7, #5
+	str	r3, [r5, #16]
+	ldr	r3, [sp]
+	str	r2, [r5, #12]
+	and	r6, r3, #63
+	add	r1, r1, r6, lsl #10
+	bl	flush_dcache_range
+	ldr	r0, [r5, #8]
+	add	r1, r0, #63
+	bic	r0, r0, #63
+	bic	r1, r1, #63
+	add	r1, r1, r6, lsl #7
+	bl	flush_dcache_range
+	movs	r3, #1
+	ldr	r2, [r10]
+	str	r3, [r5, #20]
+	movs	r1, #16
+	ldr	r3, [r5, #12]
+	str	r3, [r2, #20]
+	ldr	r3, [r5, #16]
+	str	r3, [r2, #24]
+	movs	r3, #0
+	bfi	r3, r1, #9, #5
+	movs	r1, #2
+	orr	r3, r3, #448
+	bfi	r3, r1, #3, #3
+	orr	r3, r3, #4
+	bfi	r3, r7, #1, #1
+	orr	r3, r3, #1
+	str	r3, [r2, #16]
+	str	r8, [r2, #12]
+	str	r4, [r2, #8]
+	orr	r4, r4, #4
+	str	r4, [r2, #8]
+	b	.L248
+.L255:
+	ldrh	ip, [r3, r0, lsl #2]
+	bic	r1, r1, #3
+	ldrh	fp, [fp, #2]
+	adds	r0, r0, #1
+	ldr	r6, [sp, #12]
+	orr	ip, ip, fp, lsl #16
+	str	ip, [r6, r1]
+	mov	r1, lr
+	b	.L254
+.L252:
+	ldr	r3, [r5]
+	str	r0, [r3]
+	b	.L256
+.L265:
+	.align	2
+.L264:
+	.word	.LANCHOR7
+	.word	.LANCHOR30
+	.word	.LANCHOR28
+	.word	.LANCHOR29
+	.word	.LANCHOR31
+	.word	.LANCHOR27
+	.word	.LANCHOR6
+	.size	nandc_xfer_start, .-nandc_xfer_start
+	.section	.text.nandc_set_seed,"ax",%progbits
+	.align	1
+	.global	nandc_set_seed
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	nandc_set_seed, %function
+nandc_set_seed:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r2, .L273
+	and	r0, r0, #127
+	ldr	r3, .L273+4
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	ldrh	r3, [r3, r0, lsl #1]
+	cbz	r2, .L267
+	orr	r3, r3, #-1073741824
+.L267:
+	ldr	r2, .L273+8
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r2, #9
+	ldr	r2, .L273+12
+	ldr	r2, [r2]
+	ite	eq
+	streq	r3, [r2, #520]
+	strne	r3, [r2, #336]
+	bx	lr
+.L274:
+	.align	2
+.L273:
+	.word	.LANCHOR29
+	.word	.LANCHOR32
+	.word	.LANCHOR7
+	.word	.LANCHOR6
+	.size	nandc_set_seed, .-nandc_set_seed
+	.section	.text.flash_start_page_read,"ax",%progbits
+	.align	1
+	.global	flash_start_page_read
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_start_page_read, %function
+flash_start_page_read:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	ubfx	r3, r1, #21, #3
+	ldr	r2, .L293
+	str	r0, [sp, #4]
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r2, r3
+	bhi	.L276
+	movw	r2, #738
+	ldr	r1, .L293+4
+	ldr	r0, .L293+8
+	bl	printf
+.L277:
+	b	.L277
+.L276:
+	ldr	r2, .L293+12
+	ubfx	r5, r1, #24, #2
+	ubfx	r4, r1, #0, #21
+	ldr	r10, .L293+36
+	ldrb	r7, [r2, r3]	@ zero_extendqisi2
+	ldr	r3, .L293+16
+	mov	r0, r7
+	ldr	r6, [r3]
+	lsl	fp, r7, #8
+	bl	nandc_cs
+	cmp	r5, #0
+	bne	.L278
+	ldr	r3, .L293+20
+	ldr	r2, .L293+24
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L279
+	ldrb	r3, [r2]	@ zero_extendqisi2
+	cbz	r3, .L280
+.L279:
+	ldr	r3, .L293+28
+	mov	r0, r4
+	str	r2, [sp, #12]
+	ldrh	r8, [r3]
+	mov	r1, r8
+	bl	__aeabi_uidiv
+	mul	r3, r8, r0
+	mov	r1, r8
+	mov	r0, r4
+	str	r3, [sp, #8]
+	bl	__aeabi_uidivmod
+	ldr	r2, [sp, #12]
+	ldr	r3, [sp, #8]
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbz	r2, .L281
+	add	r4, r3, r1, lsl #1
+.L280:
+	mov	r0, r7
+	bl	flash_enter_slc_mode
+	b	.L282
+.L281:
+	ldr	r2, .L293+32
+	ldrh	r4, [r2, r1, lsl #1]
+	add	r4, r4, r3
+.L282:
+	add	r6, r6, fp
+	movs	r3, #0
+	str	r3, [r6, #2056]
+	str	r3, [r6, #2052]
+	str	r3, [r6, #2052]
+	uxtb	r3, r4
+	str	r3, [r6, #2052]
+	lsrs	r3, r4, #8
+	str	r3, [r6, #2052]
+	lsrs	r3, r4, #16
+	str	r3, [r6, #2052]
+	ldr	r3, [sp, #4]
+	str	r3, [r6, #2056]
+	ldr	r3, [r10]
+	ldrb	r3, [r3, #12]	@ zero_extendqisi2
+	cmp	r3, #3
+	bne	.L284
+	cbz	r5, .L284
+	add	r4, r4, r4, lsl #1
+	subs	r5, r5, #1
+	adds	r0, r4, r5
+.L292:
+	bl	nandc_set_seed
+	movs	r0, #0
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	nandc_de_cs
+.L278:
+	ldr	r3, [r10]
+	ldrb	r3, [r3, #12]	@ zero_extendqisi2
+	cmp	r3, #3
+	bne	.L283
+	add	r3, r6, fp
+	str	r5, [r3, #2056]
+	b	.L282
+.L283:
+	mov	r0, r7
+	bl	flash_exit_slc_mode
+	b	.L282
+.L284:
+	mov	r0, r4
+	b	.L292
+.L294:
+	.align	2
+.L293:
+	.word	.LANCHOR8
+	.word	.LANCHOR33
+	.word	.LC0
+	.word	.LANCHOR10
+	.word	.LANCHOR6
+	.word	.LANCHOR11
+	.word	.LANCHOR12
+	.word	.LANCHOR13
+	.word	.LANCHOR14
+	.word	.LANCHOR34
+	.size	flash_start_page_read, .-flash_start_page_read
+	.section	.text.FlashDeInit,"ax",%progbits
+	.align	1
+	.global	FlashDeInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashDeInit, %function
+FlashDeInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, lr}
+	ldr	r4, .L307
+	bl	nandc_wait_flash_ready
+	movs	r0, #0
+	bl	hynix_reconfig_rr_para
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	cbz	r3, .L296
+	ldr	r3, .L307+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	lsls	r3, r3, #31
+	bpl	.L296
+	movs	r0, #1
+	bl	flash_set_interface_mode
+	movs	r0, #1
+	bl	nandc_set_if_mode
+	movs	r3, #0
+	strb	r3, [r4]
+.L296:
+	ldr	r1, .L307+8
+	ldrb	r3, [r1]	@ zero_extendqisi2
+	cbz	r3, .L297
+	movs	r0, #0
+	strb	r0, [r1]
+	bl	nandc_set_seed
+	movs	r3, #1
+	strb	r3, [r1]
+.L297:
+	movs	r0, #0
+	pop	{r4, pc}
+.L308:
+	.align	2
+.L307:
+	.word	.LANCHOR35
+	.word	.LANCHOR25
+	.word	.LANCHOR29
+	.size	FlashDeInit, .-FlashDeInit
+	.section	.text.nandc_randomizer_enable,"ax",%progbits
+	.align	1
+	.global	nandc_randomizer_enable
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	nandc_randomizer_enable, %function
+nandc_randomizer_enable:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L310
+	strb	r0, [r3]
+	bx	lr
+.L311:
+	.align	2
+.L310:
+	.word	.LANCHOR29
+	.size	nandc_randomizer_enable, .-nandc_randomizer_enable
+	.section	.text.nandc_get_chip_if,"ax",%progbits
+	.align	1
+	.global	nandc_get_chip_if
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	nandc_get_chip_if, %function
+nandc_get_chip_if:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L313
+	adds	r0, r0, #8
+	ldr	r3, [r3]
+	add	r0, r3, r0, lsl #8
+	bx	lr
+.L314:
+	.align	2
+.L313:
+	.word	.LANCHOR6
+	.size	nandc_get_chip_if, .-nandc_get_chip_if
+	.section	.text.buf_reinit,"ax",%progbits
+	.align	1
+	.global	buf_reinit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	buf_reinit, %function
+buf_reinit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L318
+	movs	r2, #0
+	push	{r4, r5, lr}
+	mov	r1, r2
+	mov	r4, r3
+.L316:
+	uxtb	r0, r2
+	adds	r2, r2, #1
+	cmp	r2, #32
+	strb	r1, [r3, #2]
+	add	r5, r0, #1
+	strb	r0, [r3, #1]
+	strb	r5, [r3]
+	add	r3, r3, #48
+	str	r1, [r3, #-40]
+	bne	.L316
+	movs	r3, #255
+	strb	r3, [r4, #1488]
+	ldr	r3, .L318+4
+	strb	r1, [r3]
+	ldr	r3, .L318+8
+	strb	r2, [r3]
+	pop	{r4, r5, pc}
+.L319:
+	.align	2
+.L318:
+	.word	.LANCHOR36
+	.word	.LANCHOR37
+	.word	.LANCHOR38
+	.size	buf_reinit, .-buf_reinit
+	.section	.text.buf_add_tail,"ax",%progbits
+	.align	1
+	.global	buf_add_tail
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	buf_add_tail, %function
+buf_add_tail:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	movs	r3, #255
+	push	{r4, lr}
+	strb	r3, [r1]
+	ldrb	r2, [r0]	@ zero_extendqisi2
+	cmp	r2, r3
+	bne	.L321
+	ldrb	r3, [r1, #1]	@ zero_extendqisi2
+	cmp	r3, #255
+	bne	.L322
+	movs	r2, #74
+	ldr	r1, .L329
+	ldr	r0, .L329+4
+	bl	printf
+.L323:
+	b	.L323
+.L322:
+	strb	r3, [r0]
+	pop	{r4, pc}
+.L325:
+	muls	r3, r0, r3
+	strb	r2, [r4, r3]
+	pop	{r4, pc}
+.L321:
+	ldr	r4, .L329+8
+	movs	r3, #48
+.L328:
+	mov	r0, r2
+	muls	r2, r3, r2
+	ldrb	r2, [r4, r2]	@ zero_extendqisi2
+	cmp	r2, #255
+	bne	.L328
+	ldrb	r2, [r1, #1]	@ zero_extendqisi2
+	cmp	r2, #255
+	bne	.L325
+	movs	r2, #81
+	ldr	r1, .L329
+	ldr	r0, .L329+4
+	bl	printf
+.L326:
+	b	.L326
+.L330:
+	.align	2
+.L329:
+	.word	.LANCHOR39
+	.word	.LC0
+	.word	.LANCHOR36
+	.size	buf_add_tail, .-buf_add_tail
+	.section	.text.buf_free,"ax",%progbits
+	.align	1
+	.global	buf_free
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	buf_free, %function
+buf_free:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	mov	r1, r0
+	ldrb	r3, [r0, #2]	@ zero_extendqisi2
+	and	r3, r3, #8
+	strb	r3, [r0, #2]
+	cbz	r3, .L332
+	ldr	r0, .L334
+	bl	buf_add_tail
+.L333:
+	ldr	r2, .L334+4
+	ldrb	r3, [r2]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	strb	r3, [r2]
+	pop	{r3, pc}
+.L332:
+	ldr	r3, .L334
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	strb	r2, [r0]
+	ldrb	r2, [r0, #1]	@ zero_extendqisi2
+	strb	r2, [r3]
+	b	.L333
+.L335:
+	.align	2
+.L334:
+	.word	.LANCHOR37
+	.word	.LANCHOR38
+	.size	buf_free, .-buf_free
+	.section	.text.buf_alloc,"ax",%progbits
+	.align	1
+	.global	buf_alloc
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	buf_alloc, %function
+buf_alloc:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r2, r0
+	ldr	r7, .L342
+	ldrb	r1, [r7]	@ zero_extendqisi2
+	cbnz	r1, .L337
+	movs	r2, #121
+	ldr	r1, .L342+4
+	ldr	r0, .L342+8
+	bl	printf
+.L338:
+	b	.L338
+.L337:
+	ldr	r5, .L342+12
+	ldr	r3, .L342+16
+	ldrb	r6, [r5]	@ zero_extendqisi2
+	add	r0, r6, r6, lsl #1
+	add	r0, r3, r0, lsl #4
+	cbnz	r2, .L339
+	cmp	r1, #1
+	beq	.L341
+.L339:
+	movs	r2, #48
+	subs	r1, r1, #1
+	muls	r2, r6, r2
+	strb	r1, [r7]
+	movs	r1, #1
+	adds	r4, r3, r2
+	ldrb	r6, [r3, r2]	@ zero_extendqisi2
+	strb	r1, [r4, #2]
+	movs	r1, #255
+	strb	r1, [r3, r2]
+	mov	r3, #-1
+	str	r3, [r4, #20]
+	movs	r3, #0
+	strb	r6, [r5]
+	strh	r3, [r4, #34]	@ movhi
+	str	r3, [r4, #8]
+	pop	{r3, r4, r5, r6, r7, pc}
+.L341:
+	mov	r0, r2
+	pop	{r3, r4, r5, r6, r7, pc}
+.L343:
+	.align	2
+.L342:
+	.word	.LANCHOR38
+	.word	.LANCHOR40
+	.word	.LC0
+	.word	.LANCHOR37
+	.word	.LANCHOR36
+	.size	buf_alloc, .-buf_alloc
+	.section	.text.buf_remove_buf,"ax",%progbits
+	.align	1
+	.global	buf_remove_buf
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	buf_remove_buf, %function
+buf_remove_buf:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, lr}
+	ldrb	r4, [r1, #1]	@ zero_extendqisi2
+	ldrb	r3, [r0]	@ zero_extendqisi2
+	cmp	r4, r3
+	bne	.L345
+	ldrb	r3, [r1]	@ zero_extendqisi2
+	strb	r3, [r0]
+.L350:
+	movs	r0, #1
+	pop	{r4, r5, pc}
+.L348:
+	mov	r5, r3
+	muls	r3, r2, r3
+	ldrb	r3, [r0, r3]	@ zero_extendqisi2
+	cmp	r4, r3
+	bne	.L347
+	muls	r2, r5, r2
+	ldrb	r3, [r1]	@ zero_extendqisi2
+	strb	r3, [r0, r2]
+	movs	r3, #255
+	strb	r3, [r1]
+	b	.L350
+.L345:
+	ldr	r0, .L351
+	movs	r2, #48
+.L347:
+	cmp	r3, #255
+	bne	.L348
+	movs	r0, #0
+	pop	{r4, r5, pc}
+.L352:
+	.align	2
+.L351:
+	.word	.LANCHOR36
+	.size	buf_remove_buf, .-buf_remove_buf
+	.section	.text.buf_remove_free,"ax",%progbits
+	.align	1
+	.global	buf_remove_free
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	buf_remove_free, %function
+buf_remove_free:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	mov	r4, r0
+	ldr	r5, .L357
+	ldrb	r3, [r5]	@ zero_extendqisi2
+	cbnz	r3, .L354
+	movs	r2, #170
+	ldr	r1, .L357+4
+	ldr	r0, .L357+8
+	bl	printf
+.L355:
+	b	.L355
+.L354:
+	mov	r1, r0
+	ldr	r0, .L357+12
+	bl	buf_remove_buf
+	cmp	r0, #1
+	bne	.L353
+	ldrb	r3, [r5]	@ zero_extendqisi2
+	subs	r3, r3, #1
+	strb	r3, [r5]
+	ldrb	r3, [r4, #2]	@ zero_extendqisi2
+	orr	r3, r3, #1
+	strb	r3, [r4, #2]
+.L353:
+	pop	{r3, r4, r5, pc}
+.L358:
+	.align	2
+.L357:
+	.word	.LANCHOR38
+	.word	.LANCHOR41
+	.word	.LC0
+	.word	.LANCHOR37
+	.size	buf_remove_free, .-buf_remove_free
+	.section	.text.flash_check_bad_block,"ax",%progbits
+	.align	1
+	.global	flash_check_bad_block
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_check_bad_block, %function
+flash_check_bad_block:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r2, .L360
+	push	{r4, lr}
+	lsrs	r4, r1, #5
+	and	r1, r1, #31
+	ldrb	r3, [r2, #13]	@ zero_extendqisi2
+	ldrh	r2, [r2, #14]
+	smulbb	r3, r3, r2
+	ldr	r2, .L360+4
+	uxth	r3, r3
+	ldr	r2, [r2]
+	adds	r3, r3, #31
+	asrs	r3, r3, #5
+	add	r2, r2, r4, lsl #2
+	lsls	r3, r3, #2
+	uxth	r3, r3
+	mla	r0, r0, r3, r2
+	ldr	r0, [r0, #912]
+	lsrs	r0, r0, r1
+	and	r0, r0, #1
+	pop	{r4, pc}
+.L361:
+	.align	2
+.L360:
+	.word	.LANCHOR19
+	.word	.LANCHOR5
+	.size	flash_check_bad_block, .-flash_check_bad_block
+	.section	.text.flash_mask_bad_block,"ax",%progbits
+	.align	1
+	.global	flash_mask_bad_block
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_mask_bad_block, %function
+flash_mask_bad_block:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L363
+	mov	r2, r1
+	push	{r4, r5, r6, lr}
+	mov	r5, r0
+	mov	r6, r1
+	mov	r1, r0
+	ldrb	r4, [r3, #13]	@ zero_extendqisi2
+	ldrh	r3, [r3, #14]
+	ldr	r0, .L363+4
+	smulbb	r4, r4, r3
+	bl	printf
+	uxth	r4, r4
+	ldr	r3, .L363+8
+	add	r0, r4, #31
+	asrs	r0, r0, #5
+	ldr	r2, [r3]
+	movs	r3, #1
+	lsls	r0, r0, #2
+	uxth	r0, r0
+	muls	r0, r5, r0
+	lsrs	r5, r6, #5
+	and	r6, r6, #31
+	lsl	r6, r3, r6
+	add	r0, r0, #912
+	add	r0, r0, r5, lsl #2
+	ldr	r3, [r2, r0]
+	orrs	r3, r3, r6
+	str	r3, [r2, r0]
+	pop	{r4, r5, r6, pc}
+.L364:
+	.align	2
+.L363:
+	.word	.LANCHOR19
+	.word	.LC6
+	.word	.LANCHOR5
+	.size	flash_mask_bad_block, .-flash_mask_bad_block
+	.section	.text.ftl_gc_write_buf,"ax",%progbits
+	.align	1
+	.global	ftl_gc_write_buf
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_gc_write_buf, %function
+ftl_gc_write_buf:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	mov	r1, r0
+	ldrb	r3, [r0, #2]	@ zero_extendqisi2
+	orr	r3, r3, #2
+	strb	r3, [r0, #2]
+	ldr	r0, .L366
+	bl	buf_add_tail
+	ldr	r3, .L366+4
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	adds	r0, r0, #1
+	uxtb	r0, r0
+	strb	r0, [r3]
+	pop	{r3, pc}
+.L367:
+	.align	2
+.L366:
+	.word	.LANCHOR42
+	.word	.LANCHOR43
+	.size	ftl_gc_write_buf, .-ftl_gc_write_buf
+	.section	.text.ftl_write_buf,"ax",%progbits
+	.align	1
+	.global	ftl_write_buf
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_write_buf, %function
+ftl_write_buf:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	mov	r4, r0
+	cbnz	r0, .L369
+	movw	r2, #539
+	ldr	r1, .L375
+	ldr	r0, .L375+4
+	bl	printf
+.L370:
+	b	.L370
+.L369:
+	ldr	r2, .L375+8
+	ldrb	r3, [r0, #40]	@ zero_extendqisi2
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r2, r3
+	bcs	.L371
+	mov	r2, #544
+	ldr	r1, .L375
+	ldr	r0, .L375+4
+	bl	printf
+.L372:
+	b	.L372
+.L371:
+	ldr	r5, .L375+12
+	cbnz	r3, .L373
+	bl	buf_free
+	ldrb	r0, [r5]	@ zero_extendqisi2
+	pop	{r3, r4, r5, pc}
+.L373:
+	mov	r1, r0
+	ldr	r0, .L375+16
+	bl	buf_add_tail
+	ldr	r3, .L375+20
+	ldrb	r1, [r4, #40]	@ zero_extendqisi2
+	ldrb	r0, [r5]	@ zero_extendqisi2
+	ldr	r3, [r3]
+	adds	r0, r0, #1
+	ldr	r2, [r3, #16]
+	uxtb	r0, r0
+	strb	r0, [r5]
+	add	r2, r2, r1
+	str	r2, [r3, #16]
+	ldr	r2, [r3, #32]
+	adds	r2, r2, #1
+	str	r2, [r3, #32]
+	pop	{r3, r4, r5, pc}
+.L376:
+	.align	2
+.L375:
+	.word	.LANCHOR44
+	.word	.LC0
+	.word	.LANCHOR45
+	.word	.LANCHOR43
+	.word	.LANCHOR42
+	.word	.LANCHOR46
+	.size	ftl_write_buf, .-ftl_write_buf
+	.section	.text.ftl_cache_flush,"ax",%progbits
+	.align	1
+	.global	ftl_cache_flush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_cache_flush, %function
+ftl_cache_flush:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	ftl_cache_flush, .-ftl_cache_flush
+	.section	.text.ftl_read_buf,"ax",%progbits
+	.align	1
+	.global	ftl_read_buf
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_read_buf, %function
+ftl_read_buf:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	ldr	r3, .L389
+	ldr	r3, [r3]
+	cmp	r3, r0
+	bhi	.L379
+	movw	r2, #771
+	ldr	r1, .L389+4
+	ldr	r0, .L389+8
+	bl	printf
+.L380:
+	b	.L380
+.L379:
+	ldr	r3, .L389+12
+	movs	r4, #0
+	mov	r5, r3
+.L383:
+	ldr	r2, [r3, #20]
+	cmp	r0, r2
+	bne	.L381
+	ldrb	r2, [r3, #2]	@ zero_extendqisi2
+	tst	r2, #8
+	beq	.L381
+	movs	r3, #48
+	mla	r4, r3, r4, r5
+	orr	r3, r2, #4
+	strb	r3, [r4, #2]
+	lsls	r3, r2, #31
+	bmi	.L378
+	mov	r0, r4
+	bl	buf_remove_free
+.L378:
+	mov	r0, r4
+	pop	{r3, r4, r5, pc}
+.L381:
+	adds	r4, r4, #1
+	adds	r3, r3, #48
+	cmp	r4, #32
+	bne	.L383
+	ldr	r3, .L389+16
+	movs	r4, #0
+	ldr	r2, [r3]
+	adds	r2, r2, #1
+	ittt	eq
+	streq	r0, [r3]
+	ldreq	r3, .L389+20
+	streq	r1, [r3]
+	b	.L378
+.L390:
+	.align	2
+.L389:
+	.word	.LANCHOR47
+	.word	.LANCHOR48
+	.word	.LC0
+	.word	.LANCHOR36
+	.word	.LANCHOR49
+	.word	.LANCHOR50
+	.size	ftl_read_buf, .-ftl_read_buf
+	.section	.text.ftl_read_buf_free,"ax",%progbits
+	.align	1
+	.global	ftl_read_buf_free
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_read_buf_free, %function
+ftl_read_buf_free:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, lr}
+	mov	r1, r0
+	mov	r4, r0
+	ldr	r0, .L395
+	bl	buf_remove_buf
+	ldrb	r3, [r4, #2]	@ zero_extendqisi2
+	lsls	r2, r3, #30
+	bpl	.L392
+	bic	r3, r3, #4
+	strb	r3, [r4, #2]
+	pop	{r4, pc}
+.L392:
+	mov	r0, r4
+	pop	{r4, lr}
+	b	buf_free
+.L396:
+	.align	2
+.L395:
+	.word	.LANCHOR51
+	.size	ftl_read_buf_free, .-ftl_read_buf_free
+	.section	.text.ftl_get_density,"ax",%progbits
+	.align	1
+	.global	ftl_get_density
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_get_density, %function
+ftl_get_density:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	cbnz	r0, .L398
+	ldr	r3, .L401
+	ldr	r0, [r3]
+	bx	lr
+.L398:
+	cmp	r0, #4
+	ite	cc
+	movcc	r0, #8192
+	movcs	r0, #0
+	bx	lr
+.L402:
+	.align	2
+.L401:
+	.word	.LANCHOR52
+	.size	ftl_get_density, .-ftl_get_density
+	.section	.text.gc_hook,"ax",%progbits
+	.align	1
+	.global	gc_hook
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_hook, %function
+gc_hook:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	gc_hook, .-gc_hook
+	.section	.text.FtlGetCurEraseBlock,"ax",%progbits
+	.align	1
+	.global	FtlGetCurEraseBlock
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGetCurEraseBlock, %function
+FtlGetCurEraseBlock:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L405
+	ldrh	r0, [r3]
+	bx	lr
+.L406:
+	.align	2
+.L405:
+	.word	.LANCHOR53
+	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
+	.section	.text.FtlGetAllBlockNum,"ax",%progbits
+	.align	1
+	.global	FtlGetAllBlockNum
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGetAllBlockNum, %function
+FtlGetAllBlockNum:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L408
+	ldrh	r0, [r3]
+	bx	lr
+.L409:
+	.align	2
+.L408:
+	.word	.LANCHOR54
+	.size	FtlGetAllBlockNum, .-FtlGetAllBlockNum
+	.section	.text.FtlLowFormat,"ax",%progbits
+	.align	1
+	.global	FtlLowFormat
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlLowFormat, %function
+FtlLowFormat:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	movs	r0, #0
+	bx	lr
+	.size	FtlLowFormat, .-FtlLowFormat
+	.section	.text.gc_add_sblk,"ax",%progbits
+	.align	1
+	.global	gc_add_sblk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_add_sblk, %function
+gc_add_sblk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L438
+	push	{r4, r5, r6, r7, r8, r10, lr}
+	mov	r5, r0
+	sub	sp, sp, #20
+	mov	r6, r1
+	mov	r7, r2
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bhi	.L412
+	movs	r2, #240
+	ldr	r1, .L438+4
+	ldr	r0, .L438+8
+	bl	printf
+.L413:
+	b	.L413
+.L412:
+	ldr	r3, .L438+12
+	lsl	r8, r0, #2
+	ldr	r10, .L438+36
+	ldr	r3, [r3]
+	ldrh	r4, [r3, r0, lsl #1]
+	ldr	r3, .L438+16
+	ldr	r3, [r3]
+	tst	r3, #256
+	beq	.L414
+	ldr	r2, .L438+20
+	ldr	r3, [r10]
+	ldrh	r2, [r2]
+	add	r3, r3, r8
+	ldrb	r3, [r3, #2]	@ zero_extendqisi2
+	str	r2, [sp, #8]
+	ldr	r2, .L438+24
+	lsrs	r3, r3, #5
+	ldrh	r2, [r2, #52]
+	str	r4, [sp]
+	str	r2, [sp, #4]
+	mov	r2, r1
+	mov	r1, r0
+	ldr	r0, .L438+28
+	bl	printf
+.L414:
+	ldr	r3, [r10]
+	add	r3, r3, r8
+	ldrb	r3, [r3, #2]	@ zero_extendqisi2
+	tst	r3, #224
+	bne	.L415
+	cmp	r4, #0
+	beq	.L429
+	movs	r2, #245
+	ldr	r1, .L438+4
+	ldr	r0, .L438+8
+	bl	printf
+.L417:
+	b	.L417
+.L415:
+	ldr	r3, .L438+24
+	ldrh	r2, [r3]
+	cmp	r2, r5
+	beq	.L429
+	ldr	r2, .L438+32
+	ldr	r2, [r2]
+	ldrh	r1, [r2, #48]
+	cmp	r1, r5
+	beq	.L429
+	ldrh	r1, [r2, #16]
+	cmp	r1, r5
+	beq	.L429
+	ldrh	r1, [r2, #80]
+	cmp	r1, r5
+	beq	.L429
+	ldrh	r0, [r3, #52]!
+	movs	r1, #0
+.L418:
+	cmp	r1, r0
+	bcc	.L419
+	add	r3, r2, r7, lsl #7
+	adds	r3, r3, #136
+	cbz	r6, .L420
+	add	r3, r2, #392
+.L420:
+	add	r0, r3, #128
+	movw	r4, #65535
+.L423:
+	mov	r1, r3
+	adds	r3, r3, #2
+	ldrh	ip, [r1]
+	cmp	ip, r4
+	bne	.L421
+	strh	r5, [r1]	@ movhi
+	cbz	r6, .L422
+	ldrh	r3, [r2, #124]
+	adds	r3, r3, #1
+	strh	r3, [r2, #124]	@ movhi
+.L437:
+	movs	r0, #1
+.L411:
+	add	sp, sp, #20
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.L419:
+	ldrh	r4, [r3, #2]!
+	cmp	r4, r5
+	beq	.L429
+	adds	r1, r1, #1
+	b	.L418
+.L422:
+	add	r2, r2, r7, lsl #1
+	ldrh	r3, [r2, #120]
+	adds	r3, r3, #1
+	strh	r3, [r2, #120]	@ movhi
+	b	.L437
+.L421:
+	cmp	r0, r3
+	bne	.L423
+	b	.L437
+.L429:
+	movs	r0, #0
+	b	.L411
+.L439:
+	.align	2
+.L438:
+	.word	.LANCHOR54
+	.word	.LANCHOR55
+	.word	.LC0
+	.word	.LANCHOR56
+	.word	.LANCHOR22
+	.word	.LANCHOR58
+	.word	.LANCHOR59
+	.word	.LC7
+	.word	.LANCHOR60
+	.word	.LANCHOR57
+	.size	gc_add_sblk, .-gc_add_sblk
+	.section	.text.gc_get_src_ppa_from_index,"ax",%progbits
+	.align	1
+	.global	gc_get_src_ppa_from_index
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_get_src_ppa_from_index, %function
+gc_get_src_ppa_from_index:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L441
+	ldr	r3, [r3]
+	ldr	r0, [r3, r0, lsl #2]
+	bx	lr
+.L442:
+	.align	2
+.L441:
+	.word	.LANCHOR61
+	.size	gc_get_src_ppa_from_index, .-gc_get_src_ppa_from_index
+	.section	.text.gc_write_completed,"ax",%progbits
+	.align	1
+	.global	gc_write_completed
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_write_completed, %function
+gc_write_completed:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r6, .L465
+.L444:
+	ldr	r1, .L465+4
+	ldrb	r5, [r1]	@ zero_extendqisi2
+	cmp	r5, #255
+	bne	.L457
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L457:
+	movs	r3, #48
+	muls	r3, r5, r3
+	adds	r2, r6, r3
+	ldrb	r3, [r6, r3]	@ zero_extendqisi2
+	ldrh	r4, [r2, #32]
+	strb	r3, [r1]
+	ldr	r1, [r2, #36]
+	cbz	r1, .L445
+	ldr	r3, .L465+8
+	movs	r0, #1
+	ldr	r2, [r2, #24]
+	strh	r0, [r3, #314]	@ movhi
+	ldr	r0, .L465+12
+	str	r2, [r3, #316]
+	bl	printf
+	mov	r2, #502
+	ldr	r1, .L465+16
+	ldr	r0, .L465+20
+	bl	printf
+.L446:
+	b	.L446
+.L445:
+	ldr	fp, .L465+40
+	ldr	r10, .L465+44
+	ldrb	r3, [fp]	@ zero_extendqisi2
+	cmp	r3, #3
+	itett	eq
+	ldreq	r3, .L465+24
+	movne	r7, #1
+	ldreq	r3, [r3]
+	ldrbeq	r7, [r3, #89]	@ zero_extendqisi2
+	ldr	r3, .L465+28
+	ldr	r3, [r3]
+	it	eq
+	addeq	r7, r7, r7, lsl #1
+	tst	r3, #256
+	beq	.L448
+	movs	r3, #48
+	mov	r1, r4
+	mla	r3, r3, r5, r6
+	ldr	r0, .L465+32
+	ldrb	r2, [r3, #1]	@ zero_extendqisi2
+	ldr	r3, [r10]
+	ldrb	r3, [r3, r4]	@ zero_extendqisi2
+	str	r3, [sp]
+	mov	r3, r4
+	bl	printf
+.L448:
+	movs	r2, #48
+	ldr	r3, [r10]
+	mla	r5, r2, r5, r6
+	ldrb	r1, [r3, r4]	@ zero_extendqisi2
+	adds	r0, r3, r4
+	mov	r8, r4
+	ldrb	r3, [r5, #1]	@ zero_extendqisi2
+	cmp	r1, r3
+	beq	.L449
+	movw	r2, #509
+	ldr	r1, .L465+16
+	ldr	r0, .L465+20
+	bl	printf
+.L450:
+	b	.L450
+.L449:
+	ldrb	r3, [r5, #45]	@ zero_extendqisi2
+	cmp	r3, #3
+	beq	.L451
+	ldrb	r3, [fp]	@ zero_extendqisi2
+	cmp	r3, #3
+	bne	.L451
+	ldr	r3, .L465+36
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L451
+	mov	r4, r3
+.L452:
+	uxth	r1, r3
+	cmp	r7, r1
+	bls	.L444
+	ldrb	r1, [r0, r3]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	mla	r1, r2, r1, r6
+	strb	r4, [r1, #45]
+	b	.L452
+.L451:
+	ldr	r5, .L465+8
+	mov	fp, #255
+	movs	r3, #48
+	strh	r4, [r5, #312]	@ movhi
+.L453:
+	sub	r2, r8, r4
+	uxth	r2, r2
+	cmp	r7, r2
+	bls	.L444
+	ldr	r2, [r10]
+	movs	r1, #0
+	str	r3, [sp, #12]
+	ldrb	r0, [r2, r8]	@ zero_extendqisi2
+	strb	fp, [r2, r8]
+	add	r8, r8, #1
+	mla	r2, r3, r0, r6
+	add	r0, r0, r0, lsl #1
+	strb	r1, [r2, #45]
+	add	r0, r6, r0, lsl #4
+	bl	buf_free
+	ldrb	r2, [r5, #7]	@ zero_extendqisi2
+	ldr	r3, [sp, #12]
+	subs	r2, r2, #1
+	strb	r2, [r5, #7]
+	b	.L453
+.L466:
+	.align	2
+.L465:
+	.word	.LANCHOR36
+	.word	.LANCHOR62
+	.word	.LANCHOR59
+	.word	.LC8
+	.word	.LANCHOR63
+	.word	.LC0
+	.word	.LANCHOR60
+	.word	.LANCHOR22
+	.word	.LC9
+	.word	.LANCHOR66
+	.word	.LANCHOR64
+	.word	.LANCHOR65
+	.size	gc_write_completed, .-gc_write_completed
+	.section	.text.gc_get_src_blk,"ax",%progbits
+	.align	1
+	.global	gc_get_src_blk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_get_src_blk, %function
+gc_get_src_blk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L476
+	push	{r4, r5, r6, r7, lr}
+	ldr	r2, [r3]
+	ldr	r3, .L476+4
+	ldrh	r4, [r2, #124]
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	cbz	r4, .L468
+	add	r3, r2, #392
+	movs	r4, #1
+.L469:
+	add	r6, r3, #128
+	movw	r5, #65535
+.L473:
+	mov	r7, r3
+	ldrh	r0, [r3], #2
+	cmp	r0, r5
+	beq	.L471
+	strh	r5, [r7]	@ movhi
+	cbz	r4, .L472
+	ldrh	r3, [r2, #124]
+	subs	r3, r3, #1
+	strh	r3, [r2, #124]	@ movhi
+	pop	{r4, r5, r6, r7, pc}
+.L468:
+	add	r3, r1, #60
+	ldrh	r3, [r2, r3, lsl #1]
+	cbz	r3, .L474
+	add	r3, r2, r1, lsl #7
+	adds	r3, r3, #136
+	b	.L469
+.L472:
+	add	r2, r2, r1, lsl #1
+	ldrh	r3, [r2, #120]
+	subs	r3, r3, #1
+	strh	r3, [r2, #120]	@ movhi
+	pop	{r4, r5, r6, r7, pc}
+.L471:
+	cmp	r3, r6
+	bne	.L473
+	pop	{r4, r5, r6, r7, pc}
+.L474:
+	movw	r0, #65535
+	pop	{r4, r5, r6, r7, pc}
+.L477:
+	.align	2
+.L476:
+	.word	.LANCHOR60
+	.word	.LANCHOR67
+	.size	gc_get_src_blk, .-gc_get_src_blk
+	.section	.text.gc_free_temp_buf,"ax",%progbits
+	.align	1
+	.global	gc_free_temp_buf
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_free_temp_buf, %function
+gc_free_temp_buf:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	ldr	r5, .L492
+	ldrb	r0, [r5, #7]	@ zero_extendqisi2
+	cbz	r0, .L478
+	ldr	r3, .L492+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #1
+	bhi	.L485
+	ldr	r3, .L492+8
+	movs	r7, #48
+	ldrh	r4, [r5, #312]
+	ldr	r6, .L492+12
+	ldrh	r2, [r3]
+	ldr	r3, .L492+16
+	add	r1, r4, #24
+	ldr	r0, .L492+20
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	muls	r2, r3, r2
+	cmp	r2, r1
+	it	cs
+	movcs	r2, r1
+	ldr	r1, [r6]
+.L480:
+	cmp	r4, r2
+	bcc	.L483
+.L485:
+	movs	r0, #0
+.L478:
+	pop	{r3, r4, r5, r6, r7, pc}
+.L483:
+	ldrb	r3, [r1, r4]	@ zero_extendqisi2
+	cmp	r3, #255
+	beq	.L481
+	mla	ip, r7, r3, r0
+	ldrb	ip, [ip, #45]	@ zero_extendqisi2
+	cmp	ip, #0
+	bne	.L481
+	add	r3, r3, r3, lsl #1
+	add	r0, r0, r3, lsl #4
+	bl	buf_free
+	ldr	r3, .L492+24
+	ldr	r3, [r3]
+	lsls	r3, r3, #23
+	bpl	.L482
+	ldr	r3, [r6]
+	mov	r1, r4
+	ldr	r0, .L492+28
+	ldrb	r2, [r3, r4]	@ zero_extendqisi2
+	bl	printf
+.L482:
+	ldr	r3, [r6]
+	movs	r2, #255
+	movs	r0, #1
+	strb	r2, [r3, r4]
+	ldrb	r3, [r5, #7]	@ zero_extendqisi2
+	subs	r3, r3, #1
+	strb	r3, [r5, #7]
+	pop	{r3, r4, r5, r6, r7, pc}
+.L481:
+	adds	r4, r4, #1
+	b	.L480
+.L493:
+	.align	2
+.L492:
+	.word	.LANCHOR59
+	.word	.LANCHOR38
+	.word	.LANCHOR68
+	.word	.LANCHOR65
+	.word	.LANCHOR69
+	.word	.LANCHOR36
+	.word	.LANCHOR22
+	.word	.LC10
+	.size	gc_free_temp_buf, .-gc_free_temp_buf
+	.section	.text.gc_static_wearleveling,"ax",%progbits
+	.align	1
+	.global	gc_static_wearleveling
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_static_wearleveling, %function
+gc_static_wearleveling:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r3, .L542
+	ldr	r4, [r3]
+	ldr	r3, [r4, #32]
+	cmp	r3, #20480
+	bls	.L495
+	ldr	r2, [r4, #36]
+	add	r2, r2, r3, lsr #10
+	ubfx	r3, r3, #0, #10
+	str	r3, [r4, #32]
+	str	r2, [r4, #36]
+.L495:
+	ldr	r3, .L542+4
+	ldr	r0, [r4, #36]
+	ldr	r3, [r3]
+	ldr	r2, [r3, #568]
+	ldr	r1, [r3, #12]
+	add	r2, r2, #12910592
+	add	r2, r2, #49408
+	cmp	r1, r2
+	bhi	.L496
+	ldr	r2, [r3, #572]
+	adds	r2, r2, #128
+	cmp	r0, r2
+	bls	.L494
+.L496:
+	str	r0, [r3, #572]
+	movw	r6, #65535
+	str	r1, [r3, #568]
+	movs	r0, #0
+	ldr	r3, .L542+8
+	mov	r2, r0
+	ldrh	ip, [r4, #134]
+	mov	r8, r0
+	mov	r10, r0
+	mov	fp, r0
+	ldrh	r3, [r3]
+	mov	r7, r0
+	mov	r5, r6
+	str	r3, [sp, #8]
+	ldr	r3, .L542+12
+	ldr	r3, [r3]
+	add	r3, r3, ip, lsl #2
+.L498:
+	ldr	r1, [sp, #8]
+	cmp	ip, r1
+	bcc	.L502
+	ldrh	r3, [r4, #96]
+	mov	r1, r10
+	str	r2, [sp, #12]
+	cmp	r3, fp
+	ldrh	r3, [r4, #98]
+	it	cc
+	strhcc	fp, [r4, #96]	@ movhi
+	cmp	r3, r7
+	it	cc
+	strhcc	r7, [r4, #98]	@ movhi
+	bl	__aeabi_uidiv
+	ldr	r2, [sp, #12]
+	mov	r1, r8
+	strh	r0, [r4, #88]	@ movhi
+	str	r0, [sp, #8]
+	mov	r0, r2
+	bl	__aeabi_uidiv
+	strh	r0, [r4, #90]	@ movhi
+	ldr	r4, .L542+16
+	ldr	r3, [sp, #8]
+	ldr	r2, [r4]
+	tst	r2, #256
+	beq	.L505
+	uxth	r0, r0
+	uxth	r3, r3
+	str	r0, [sp]
+	mov	r2, r8
+	mov	r1, r10
+	ldr	r0, .L542+20
+	bl	printf
+.L505:
+	ldr	r3, [r4]
+	lsls	r2, r3, #23
+	bpl	.L506
+	str	r7, [sp]
+	mov	r3, fp
+	mov	r2, r5
+	mov	r1, r6
+	ldr	r0, .L542+24
+	bl	printf
+.L506:
+	subs	r7, r7, r5
+	cmp	r7, #64
+	bgt	.L507
+.L513:
+	cmp	r5, #0
+	bne	.L508
+.L514:
+	cbz	r6, .L494
+	ldr	r3, .L542
+	ldr	r2, .L542+8
+	ldr	r1, [r3]
+	ldrh	r5, [r2]
+	ldr	r2, .L542+12
+	ldrh	r3, [r1, #134]
+	ldr	r2, [r2]
+	add	r2, r2, r3, lsl #2
+.L519:
+	cmp	r3, r5
+	bcc	.L521
+	ldrh	r3, [r1, #74]
+	add	r3, r3, r6
+	strh	r3, [r1, #74]	@ movhi
+	ldrh	r3, [r1, #96]
+	cmp	r6, r3
+	bcs	.L494
+	subs	r6, r3, r6
+	strh	r6, [r1, #96]	@ movhi
+.L494:
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L502:
+	ldrb	r1, [r3, #2]	@ zero_extendqisi2
+	tst	r1, #8
+	beq	.L499
+	ldrh	lr, [r3]
+	ldr	r1, [r3]
+	ubfx	lr, lr, #0, #11
+	ubfx	r1, r1, #11, #8
+.L500:
+	cmp	r6, lr
+	add	r0, r0, lr
+	it	cs
+	movcs	r6, lr
+	cmp	fp, lr
+	it	cc
+	movcc	fp, lr
+	movw	lr, #65535
+	cmp	r1, lr
+	add	r10, r10, #1
+	uxth	r10, r10
+	bne	.L522
+	b	.L523
+.L499:
+	tst	r1, #24
+	bne	.L501
+	ldrh	lr, [r3]
+	movw	r1, #65535
+	ubfx	lr, lr, #0, #11
+	b	.L500
+.L501:
+	ldr	r1, [r3]
+	ubfx	r1, r1, #11, #8
+.L522:
+	cmp	r5, r1
+	add	r8, r8, #1
+	it	cs
+	movcs	r5, r1
+	uxth	r8, r8
+	cmp	r7, r1
+	add	r2, r2, r1
+	it	cc
+	movcc	r7, r1
+.L523:
+	add	ip, ip, #1
+	adds	r3, r3, #4
+	uxth	ip, ip
+	b	.L498
+.L507:
+	ldr	r3, .L542
+	ldr	r7, .L542+8
+	ldr	r8, .L542+12
+	ldr	r3, [r3]
+	ldrh	r4, [r3, #134]
+.L510:
+	ldrh	r3, [r7]
+	cmp	r3, r4
+	bls	.L513
+	ldr	r1, [r8]
+	lsls	r2, r4, #2
+	adds	r3, r1, r2
+	ldrb	r3, [r3, #2]	@ zero_extendqisi2
+	tst	r3, #192
+	beq	.L511
+	and	r0, r3, #224
+	cmp	r0, #224
+	beq	.L511
+	ubfx	r3, r3, #3, #2
+	lsls	r3, r3, #30
+	bpl	.L511
+	ldr	r3, [r1, r2]
+	ubfx	r3, r3, #11, #8
+	cmp	r3, r5
+	bhi	.L511
+	movs	r2, #1
+	mov	r0, r4
+	mov	r1, r2
+	bl	gc_add_sblk
+.L511:
+	adds	r4, r4, #1
+	uxth	r4, r4
+	b	.L510
+.L508:
+	ldr	r3, .L542
+	ldr	r2, .L542+8
+	ldr	r1, [r3]
+	ldrh	r7, [r2]
+	ldr	r2, .L542+12
+	ldrh	r3, [r1, #134]
+	ldr	r2, [r2]
+	add	r2, r2, r3, lsl #2
+.L515:
+	cmp	r3, r7
+	bcc	.L517
+	ldrh	r3, [r1, #72]
+	add	r3, r3, r5
+	strh	r3, [r1, #72]	@ movhi
+	ldrh	r3, [r1, #98]
+	cmp	r5, r3
+	itt	cc
+	subcc	r5, r3, r5
+	strhcc	r5, [r1, #98]	@ movhi
+	b	.L514
+.L517:
+	ldr	r0, [r2]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	adds	r2, r2, #4
+	ubfx	r4, r0, #11, #8
+	cmp	r5, r4
+	ittt	ls
+	subls	r4, r4, r5
+	bfils	r0, r4, #11, #8
+	strls	r0, [r2, #-4]
+	b	.L515
+.L521:
+	ldrh	r0, [r2]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	adds	r2, r2, #4
+	ubfx	r4, r0, #0, #11
+	cmp	r4, r6
+	ittt	ge
+	subge	r4, r4, r6
+	bfige	r0, r4, #0, #11
+	strhge	r0, [r2, #-4]	@ movhi
+	b	.L519
+.L543:
+	.align	2
+.L542:
+	.word	.LANCHOR46
+	.word	.LANCHOR60
+	.word	.LANCHOR54
+	.word	.LANCHOR57
+	.word	.LANCHOR22
+	.word	.LC11
+	.word	.LC12
+	.size	gc_static_wearleveling, .-gc_static_wearleveling
+	.section	.text.print_gc_debug_info,"ax",%progbits
+	.align	1
+	.global	print_gc_debug_info
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	print_gc_debug_info, %function
+print_gc_debug_info:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, lr}
+	ldr	r0, .L545
+	ldrh	r3, [r0, #310]
+	ldrh	r2, [r0, #2]
+	ldrh	r1, [r0]
+	ldrb	r0, [r0, #7]	@ zero_extendqisi2
+	str	r0, [sp, #4]
+	ldr	r0, .L545+4
+	ldrb	r0, [r0]	@ zero_extendqisi2
+	str	r0, [sp]
+	ldr	r0, .L545+8
+	bl	printf
+	add	sp, sp, #12
+	@ sp needed
+	ldr	pc, [sp], #4
+.L546:
+	.align	2
+.L545:
+	.word	.LANCHOR59
+	.word	.LANCHOR38
+	.word	.LC13
+	.size	print_gc_debug_info, .-print_gc_debug_info
+	.global	__aeabi_idiv
+	.section	.text.ftl_get_blk_list_in_sblk,"ax",%progbits
+	.align	1
+	.global	ftl_get_blk_list_in_sblk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_get_blk_list_in_sblk, %function
+ftl_get_blk_list_in_sblk:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L556
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #0
+	mov	r7, r1
+	mov	r5, r4
+	ldr	r3, [r3]
+	add	r3, r3, r0, lsl #2
+	ldrb	fp, [r3, #3]	@ zero_extendqisi2
+	ldr	r3, .L556+4
+	ldrb	r10, [r3]	@ zero_extendqisi2
+	ldr	r3, .L556+8
+	ldrb	r8, [r3]	@ zero_extendqisi2
+	ldr	r3, .L556+12
+	smulbb	r0, r8, r0
+	uxth	r6, r0
+.L548:
+	cmp	r5, r10
+	blt	.L552
+	mov	r3, r4
+	movw	r2, #65535
+.L553:
+	cmp	r3, r10
+	blt	.L554
+	mov	r0, r4
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L552:
+	asr	r2, fp, r5
+	lsls	r2, r2, #31
+	bmi	.L549
+	mov	r1, r8
+	mov	r0, r5
+	str	r3, [sp, #4]
+	bl	__aeabi_idiv
+	ldr	r3, [sp, #4]
+	cmp	r8, #1
+	ldrh	r2, [r3]
+	rsb	r2, r2, #21
+	lsl	r0, r0, r2
+	it	hi
+	andhi	r2, r5, #1
+	add	r0, r0, r6
+	uxth	r0, r0
+	it	hi
+	addhi	r0, r0, r2
+	strh	r0, [r7, r4, lsl #1]	@ movhi
+	adds	r4, r4, #1
+.L549:
+	adds	r5, r5, #1
+	b	.L548
+.L554:
+	strh	r2, [r7, r3, lsl #1]	@ movhi
+	adds	r3, r3, #1
+	b	.L553
+.L557:
+	.align	2
+.L556:
+	.word	.LANCHOR57
+	.word	.LANCHOR69
+	.word	.LANCHOR70
+	.word	.LANCHOR71
+	.size	ftl_get_blk_list_in_sblk, .-ftl_get_blk_list_in_sblk
+	.section	.text.ftl_alloc_sblk,"ax",%progbits
+	.align	1
+	.global	ftl_alloc_sblk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_alloc_sblk, %function
+ftl_alloc_sblk:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+.L559:
+	ldr	r3, .L580
+	cmp	r0, #5
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #24
+	movw	r4, #65535
+	mov	r5, r0
+	mov	lr, #0
+	mov	ip, r4
+	ldrh	r3, [r3]
+	str	r3, [sp, #8]
+	ite	ne
+	movne	r3, #0
+	moveq	r3, #2
+	ldr	r8, [sp, #8]
+	str	r3, [sp, #12]
+	ite	ne
+	movne	r3, #2
+	moveq	r3, #0
+	str	r3, [sp, #20]
+	ldr	r3, .L580+4
+	ldr	r2, [r3]
+	ldr	r3, .L580+8
+	ldr	r3, [r3]
+	str	r3, [sp, #16]
+.L574:
+	ldrh	r7, [r2, #132]
+	ldr	r1, [sp, #16]
+	mov	r3, r7
+	add	r1, r1, r7, lsl #2
+.L560:
+	cmp	r3, r8
+	blt	.L572
+	subs	r3, r3, r7
+	ldr	r1, [sp, #8]
+	add	lr, lr, r3
+	ldrh	r3, [r2, #134]
+	uxth	lr, lr
+	subs	r1, r1, r3
+	cmp	lr, r1
+	blt	.L573
+	movw	r1, #65535
+	cmp	r4, r1
+	beq	.L573
+	ldr	r3, [sp, #16]
+	add	r6, r3, r4, lsl #2
+	b	.L564
+.L572:
+	ldrb	r0, [r1, #2]	@ zero_extendqisi2
+	mov	r6, r1
+	tst	r0, #224
+	bne	.L561
+	ubfx	r10, r0, #3, #2
+	ldr	r0, [sp, #20]
+	cmp	r0, r10
+	beq	.L561
+	ldr	r0, [sp, #12]
+	cbz	r0, .L562
+	ldr	r0, [r1]
+	ldrh	fp, [r2, #72]
+	ldrh	r10, [r2, #90]
+	ubfx	r0, r0, #11, #8
+	add	fp, fp, r0
+	add	r10, r10, #1
+	cmp	fp, r10
+	ble	.L563
+	uxth	r0, r0
+	cmp	ip, r0
+	bls	.L561
+	uxth	r4, r3
+	mov	ip, r0
+.L561:
+	adds	r3, r3, #1
+	adds	r1, r1, #4
+	b	.L560
+.L562:
+	ldrh	r0, [r1]
+	ldrh	fp, [r2, #74]
+	ldrh	r10, [r2, #88]
+	ubfx	r0, r0, #0, #11
+	add	fp, fp, r0
+	add	r10, r10, #1
+	cmp	fp, r10
+	ble	.L563
+	cmp	r0, ip
+	bge	.L561
+	mov	ip, r0
+	uxth	r4, r3
+	b	.L561
+.L563:
+	uxth	r4, r3
+.L564:
+	ldr	r3, .L580+12
+	ldr	r3, [r3]
+	lsls	r1, r3, #19
+	bpl	.L565
+	ldrb	r3, [r6, #2]	@ zero_extendqisi2
+	mov	r1, r4
+	ldrb	r2, [r6, #3]	@ zero_extendqisi2
+	ldr	r0, .L580+16
+	str	r2, [sp]
+	lsrs	r3, r3, #5
+	mov	r2, r5
+	bl	printf
+.L565:
+	ldrb	r3, [r6, #2]	@ zero_extendqisi2
+	ldr	r1, [sp, #12]
+	bfi	r3, r5, #5, #3
+	uxtb	r3, r3
+	ubfx	r2, r3, #3, #2
+	orrs	r2, r2, r1
+	bfi	r3, r2, #3, #2
+	lsls	r2, r2, #31
+	strb	r3, [r6, #2]
+	ldr	r3, .L580+4
+	ldr	r3, [r3]
+	strh	r4, [r3, #132]	@ movhi
+	bpl	.L566
+	ldrh	r2, [r3, #116]
+	subs	r2, r2, #1
+	strh	r2, [r3, #116]	@ movhi
+.L567:
+	cmp	r5, #5
+	bne	.L569
+	ldrh	r2, [r3, #120]
+	adds	r2, r2, #1
+	strh	r2, [r3, #120]	@ movhi
+.L576:
+	mov	r0, r4
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L566:
+	ldrb	r2, [r6, #2]	@ zero_extendqisi2
+	tst	r2, #24
+	itete	eq
+	ldrheq	r2, [r3, #114]
+	ldrhne	r2, [r3, #118]
+	addeq	r2, r2, #-1
+	addne	r2, r2, #-1
+	ite	eq
+	strheq	r2, [r3, #114]	@ movhi
+	strhne	r2, [r3, #118]	@ movhi
+	b	.L567
+.L569:
+	cmp	r5, #2
+	bne	.L571
+	ldrh	r2, [r3, #122]
+	adds	r2, r2, #1
+	strh	r2, [r3, #122]	@ movhi
+	b	.L576
+.L571:
+	cmp	r5, #3
+	bne	.L576
+	ldrh	r2, [r3, #124]
+	adds	r2, r2, #1
+	strh	r2, [r3, #124]	@ movhi
+	b	.L576
+.L573:
+	strh	r3, [r2, #132]	@ movhi
+	mov	r8, r7
+	b	.L574
+.L581:
+	.align	2
+.L580:
+	.word	.LANCHOR54
+	.word	.LANCHOR46
+	.word	.LANCHOR57
+	.word	.LANCHOR22
+	.word	.LC14
+	.size	ftl_alloc_sblk, .-ftl_alloc_sblk
+	.section	.text.ftl_free_sblk,"ax",%progbits
+	.align	1
+	.global	ftl_free_sblk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_free_sblk, %function
+ftl_free_sblk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	movw	r3, #65535
+	cmp	r0, r3
+	bne	.L583
+	movw	r2, #313
+	ldr	r1, .L593
+	ldr	r0, .L593+4
+	bl	printf
+.L584:
+	b	.L584
+.L583:
+	ldr	r3, .L593+8
+	ldr	r2, [r3]
+	add	r2, r2, r0, lsl #2
+	ldrb	r3, [r2, #2]	@ zero_extendqisi2
+	ands	r1, r3, #224
+	bne	.L585
+	mov	r2, #316
+	ldr	r1, .L593
+	ldr	r0, .L593+4
+	bl	printf
+.L586:
+	b	.L586
+.L585:
+	cmp	r1, #160
+	ubfx	r4, r3, #3, #2
+	ldr	r3, .L593+12
+	bne	.L587
+	ldr	r5, [r3]
+	ldrh	r1, [r5, #120]
+	subs	r1, r1, #1
+	strh	r1, [r5, #120]	@ movhi
+.L588:
+	ldr	r1, [r3]
+	lsls	r3, r4, #31
+	bpl	.L590
+	ldrh	r3, [r1, #116]
+	adds	r3, r3, #1
+	strh	r3, [r1, #116]	@ movhi
+.L591:
+	ldrb	r3, [r2, #2]	@ zero_extendqisi2
+	bfc	r3, #5, #3
+	strb	r3, [r2, #2]
+	movs	r2, #0
+	ldr	r3, .L593+16
+	ldr	r3, [r3]
+	strh	r2, [r3, r0, lsl #1]	@ movhi
+	pop	{r3, r4, r5, pc}
+.L587:
+	cmp	r1, #64
+	bne	.L589
+	ldr	r5, [r3]
+	ldrh	r1, [r5, #122]
+	subs	r1, r1, #1
+	strh	r1, [r5, #122]	@ movhi
+	b	.L588
+.L589:
+	cmp	r1, #96
+	itttt	eq
+	ldreq	r5, [r3]
+	ldrheq	r1, [r5, #124]
+	addeq	r1, r1, #-1
+	strheq	r1, [r5, #124]	@ movhi
+	b	.L588
+.L590:
+	cbnz	r4, .L592
+	ldrh	r3, [r1, #114]
+	adds	r3, r3, #1
+	strh	r3, [r1, #114]	@ movhi
+	b	.L591
+.L592:
+	ldrh	r3, [r1, #118]
+	adds	r3, r3, #1
+	strh	r3, [r1, #118]	@ movhi
+	b	.L591
+.L594:
+	.align	2
+.L593:
+	.word	.LANCHOR72
+	.word	.LC0
+	.word	.LANCHOR57
+	.word	.LANCHOR46
+	.word	.LANCHOR56
+	.size	ftl_free_sblk, .-ftl_free_sblk
+	.section	.text.gc_free_src_blk,"ax",%progbits
+	.align	1
+	.global	gc_free_src_blk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_free_src_blk, %function
+gc_free_src_blk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	movs	r5, #0
+	ldr	r6, .L634
+.L596:
+	uxth	r2, r5
+	ldr	r3, .L634+4
+	ldrh	r1, [r3, #52]
+	cmp	r1, r2
+	bhi	.L612
+	movs	r2, #0
+	strh	r2, [r3, #52]	@ movhi
+	pop	{r3, r4, r5, r6, r7, pc}
+.L612:
+	uxth	r2, r5
+	add	r3, r3, r2, lsl #1
+	ldrh	r4, [r3, #54]
+	ldr	r3, [r6]
+	ldrh	r2, [r3, r4, lsl #1]
+	cbz	r2, .L597
+	mov	r1, r4
+	ldr	r0, .L634+8
+	bl	printf
+.L597:
+	ldr	r3, [r6]
+	ldrh	r3, [r3, r4, lsl #1]
+	cmp	r3, #0
+	bne	.L598
+	ldr	r3, .L634+12
+	ldr	r7, [r3]
+	ldr	r3, .L634+16
+	ldr	r3, [r3]
+	add	r7, r7, r4, lsl #2
+	lsls	r3, r3, #23
+	bpl	.L599
+	ldrb	r2, [r7, #2]	@ zero_extendqisi2
+	mov	r1, r4
+	ldr	r0, .L634+20
+	lsrs	r2, r2, #5
+	bl	printf
+.L599:
+	ldrb	r3, [r7, #2]	@ zero_extendqisi2
+	and	r2, r3, #224
+	cmp	r2, #224
+	beq	.L600
+	tst	r3, #192
+	bne	.L601
+.L600:
+	movw	r2, #753
+	ldr	r1, .L634+24
+	ldr	r0, .L634+28
+	bl	printf
+.L602:
+	b	.L602
+.L601:
+	mov	r0, r4
+	bl	ftl_free_sblk
+	ldr	r3, .L634+32
+	ldr	r3, [r3]
+	ldrh	r1, [r3, #124]
+	cbz	r1, .L603
+	add	r0, r3, #392
+	movs	r2, #0
+.L605:
+	ldrh	r7, [r0], #2
+	cmp	r4, r7
+	bne	.L604
+	adds	r2, r2, #196
+	movw	r0, #65535
+	subs	r1, r1, #1
+	strh	r0, [r3, r2, lsl #1]	@ movhi
+	strh	r1, [r3, #124]	@ movhi
+.L603:
+	ldrh	r1, [r3, #120]
+	cbz	r1, .L606
+	add	r0, r3, #136
+	movs	r2, #0
+.L608:
+	ldrh	r7, [r0], #2
+	cmp	r4, r7
+	bne	.L607
+	adds	r2, r2, #68
+	movw	r0, #65535
+	subs	r1, r1, #1
+	strh	r0, [r3, r2, lsl #1]	@ movhi
+	strh	r1, [r3, #120]	@ movhi
+.L606:
+	ldrh	r1, [r3, #122]
+	cbz	r1, .L609
+	add	r0, r3, #264
+	movs	r2, #0
+.L611:
+	ldrh	r7, [r0], #2
+	cmp	r4, r7
+	bne	.L610
+	adds	r2, r2, #132
+	movw	r0, #65535
+	subs	r1, r1, #1
+	strh	r0, [r3, r2, lsl #1]	@ movhi
+	strh	r1, [r3, #122]	@ movhi
+.L609:
+	adds	r5, r5, #1
+	b	.L596
+.L604:
+	adds	r2, r2, #1
+	cmp	r2, #64
+	bne	.L605
+	b	.L603
+.L607:
+	adds	r2, r2, #1
+	cmp	r2, #64
+	bne	.L608
+	b	.L606
+.L610:
+	adds	r2, r2, #1
+	cmp	r2, #64
+	bne	.L611
+	b	.L609
+.L598:
+	movs	r2, #0
+	movs	r1, #1
+	mov	r0, r4
+	bl	gc_add_sblk
+	b	.L609
+.L635:
+	.align	2
+.L634:
+	.word	.LANCHOR56
+	.word	.LANCHOR59
+	.word	.LC15
+	.word	.LANCHOR57
+	.word	.LANCHOR22
+	.word	.LC16
+	.word	.LANCHOR73
+	.word	.LC0
+	.word	.LANCHOR60
+	.size	gc_free_src_blk, .-gc_free_src_blk
+	.section	.text.ftl_erase_phy_blk,"ax",%progbits
+	.align	1
+	.global	ftl_erase_phy_blk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_erase_phy_blk, %function
+ftl_erase_phy_blk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r6, r1
+	ldr	r3, .L641
+	ldr	r7, .L641+4
+	ldrh	r4, [r3]
+	rsb	r3, r4, #21
+	movs	r4, #1
+	asr	r5, r0, r3
+	lsls	r4, r4, r3
+	ldr	r3, .L641+8
+	subs	r4, r4, #1
+	uxtb	r5, r5
+	ands	r4, r4, r0
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	sxth	r4, r4
+	cbz	r3, .L637
+	ldrh	r2, [r7]
+	clz	r1, r1
+	lsrs	r1, r1, #5
+	mov	r0, r5
+	muls	r2, r4, r2
+	bl	flash_erase_block_en
+.L637:
+	ldrh	r2, [r7]
+	uxtb	r1, r6
+	mov	r0, r5
+	muls	r2, r4, r2
+	pop	{r3, r4, r5, r6, r7, lr}
+	b	flash_erase_block_en
+.L642:
+	.align	2
+.L641:
+	.word	.LANCHOR71
+	.word	.LANCHOR75
+	.word	.LANCHOR74
+	.size	ftl_erase_phy_blk, .-ftl_erase_phy_blk
+	.section	.text.ftl_erase_sblk,"ax",%progbits
+	.align	1
+	.global	ftl_erase_sblk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_erase_sblk, %function
+ftl_erase_sblk:
+	@ args = 0, pretend = 0, frame = 64
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r0
+	ldr	r6, .L663
+	sub	sp, sp, #64
+	mov	r7, r1
+	movs	r5, #0
+	ldr	r3, [r6]
+	add	r3, r3, r0, lsl #2
+	ldrb	r8, [r3, #3]	@ zero_extendqisi2
+.L644:
+	ldr	r3, .L663+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r5, r3
+	bge	.L651
+	ldr	r3, .L663+8
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	ldr	r3, .L663+12
+	ldrh	ip, [r3]
+	movs	r3, #0
+	mul	r10, r0, r5
+	mov	r2, r3
+	mul	lr, r0, r4
+	b	.L652
+.L646:
+	add	r1, r2, r10
+	asr	r1, r8, r1
+	lsls	r1, r1, #31
+	bmi	.L645
+	add	r1, sp, #64
+	add	fp, r1, r3, lsl #2
+	and	r1, r2, #1
+	add	r1, r1, lr
+	mul	r1, ip, r1
+	adds	r3, r3, #1
+	str	r1, [fp, #-64]
+.L645:
+	adds	r2, r2, #1
+.L652:
+	cmp	r2, r0
+	blt	.L646
+	cmp	r3, #2
+	bne	.L647
+	ldr	r3, .L663+16
+	uxtb	r10, r5
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L648
+	clz	r1, r7
+	ldm	sp, {r2, r3}
+	lsrs	r1, r1, #5
+	mov	r0, r10
+	bl	flash_erase_duplane_block
+.L648:
+	ldm	sp, {r2, r3}
+	uxtb	r1, r7
+	mov	r0, r10
+	bl	flash_erase_duplane_block
+.L649:
+	adds	r5, r5, #1
+	b	.L644
+.L647:
+	cmp	r3, #1
+	bne	.L649
+	ldr	r3, .L663+16
+	uxtb	r10, r5
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L650
+	clz	r1, r7
+	ldr	r2, [sp]
+	lsrs	r1, r1, #5
+	mov	r0, r10
+	bl	flash_erase_block_en
+.L650:
+	ldr	r2, [sp]
+	uxtb	r1, r7
+	mov	r0, r10
+	bl	flash_erase_block_en
+	b	.L649
+.L651:
+	ldr	r1, .L663+20
+	ldr	r0, [r6]
+	cbnz	r7, .L653
+	ldrh	r2, [r0, r4, lsl #2]
+	adds	r3, r2, #1
+	ubfx	r3, r3, #0, #11
+	bfi	r2, r3, #0, #11
+	strh	r2, [r0, r4, lsl #2]	@ movhi
+	ldr	r2, [r1]
+	ldr	r1, [r2, #84]
+	adds	r1, r1, #1
+	str	r1, [r2, #84]
+	ldrh	r1, [r2, #96]
+	cmp	r1, r3
+	bge	.L655
+	strh	r3, [r2, #96]	@ movhi
+.L655:
+	movs	r0, #0
+	add	sp, sp, #64
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L653:
+	ldr	r2, [r0, r4, lsl #2]
+	ubfx	r3, r2, #11, #8
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	bfi	r2, r3, #11, #8
+	uxth	r3, r3
+	str	r2, [r0, r4, lsl #2]
+	ldr	r2, [r1]
+	ldr	r1, [r2, #80]
+	adds	r1, r1, #1
+	str	r1, [r2, #80]
+	ldrh	r1, [r2, #98]
+	cmp	r1, r3
+	it	cc
+	strhcc	r3, [r2, #98]	@ movhi
+	b	.L655
+.L664:
+	.align	2
+.L663:
+	.word	.LANCHOR57
+	.word	.LANCHOR76
+	.word	.LANCHOR70
+	.word	.LANCHOR75
+	.word	.LANCHOR74
+	.word	.LANCHOR46
+	.size	ftl_erase_sblk, .-ftl_erase_sblk
+	.section	.text.ftl_alloc_sys_blk,"ax",%progbits
+	.align	1
+	.global	ftl_alloc_sys_blk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_alloc_sys_blk, %function
+ftl_alloc_sys_blk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	ldr	r3, .L675
+	ldr	r3, [r3]
+	ldrh	r2, [r3, #136]
+	ldrh	r1, [r3, #112]
+	cmp	r2, #63
+	itt	hi
+	movhi	r2, #0
+	strhhi	r2, [r3, #136]	@ movhi
+	cbnz	r1, .L667
+	mov	r2, #440
+	ldr	r1, .L675+4
+	ldr	r0, .L675+8
+	bl	printf
+.L668:
+	b	.L668
+.L667:
+	movw	r5, #65535
+	movs	r6, #0
+	mov	r7, r5
+.L673:
+	ldrh	r2, [r3, #136]
+	add	r4, r3, r2, lsl #1
+	adds	r4, r4, #158
+.L669:
+	cmp	r2, #63
+	ble	.L671
+	strh	r6, [r3, #136]	@ movhi
+	b	.L673
+.L671:
+	ldrh	r0, [r4, #2]!
+	cmp	r0, r5
+	bne	.L674
+	adds	r2, r2, #1
+	b	.L669
+.L674:
+	add	r4, r2, #80
+	subs	r1, r1, #1
+	strh	r7, [r3, r4, lsl #1]	@ movhi
+	strh	r2, [r3, #136]	@ movhi
+	strh	r1, [r3, #112]	@ movhi
+	pop	{r3, r4, r5, r6, r7, pc}
+.L676:
+	.align	2
+.L675:
+	.word	.LANCHOR46
+	.word	.LANCHOR77
+	.word	.LC0
+	.size	ftl_alloc_sys_blk, .-ftl_alloc_sys_blk
+	.section	.text.ftl_free_sys_blk,"ax",%progbits
+	.align	1
+	.global	ftl_free_sys_blk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_free_sys_blk, %function
+ftl_free_sys_blk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	ldr	r3, .L686
+	ldr	r3, [r3]
+	ldrh	r2, [r3, #138]
+	ldrh	r1, [r3, #112]
+	cmp	r2, #63
+	itt	hi
+	movhi	r2, #0
+	strhhi	r2, [r3, #138]	@ movhi
+	cmp	r1, #63
+	bls	.L679
+	mov	r2, #464
+	ldr	r1, .L686+4
+	ldr	r0, .L686+8
+	bl	printf
+.L680:
+	b	.L680
+.L679:
+	movw	r6, #65535
+	movs	r5, #0
+.L685:
+	ldrh	r2, [r3, #138]
+	add	r4, r3, r2, lsl #1
+	adds	r4, r4, #158
+.L681:
+	cmp	r2, #63
+	ble	.L683
+	strh	r5, [r3, #138]	@ movhi
+	b	.L685
+.L683:
+	ldrh	r7, [r4, #2]!
+	cmp	r7, r6
+	bne	.L682
+	add	r4, r2, #80
+	adds	r1, r1, #1
+	strh	r0, [r3, r4, lsl #1]	@ movhi
+	strh	r2, [r3, #138]	@ movhi
+	strh	r1, [r3, #112]	@ movhi
+	pop	{r3, r4, r5, r6, r7, pc}
+.L682:
+	adds	r2, r2, #1
+	b	.L681
+.L687:
+	.align	2
+.L686:
+	.word	.LANCHOR46
+	.word	.LANCHOR78
+	.word	.LC0
+	.size	ftl_free_sys_blk, .-ftl_free_sys_blk
+	.section	.text.ftl_info_data_recovery,"ax",%progbits
+	.align	1
+	.global	ftl_info_data_recovery
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_info_data_recovery, %function
+ftl_info_data_recovery:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldrh	r1, [r0]
+	movw	r3, #65535
+	push	{r4, r5, lr}
+	cmp	r1, r3
+	beq	.L688
+	ldr	r3, .L697
+	ldr	r4, [r3]
+	add	r2, r4, r1, lsl #2
+	ldrb	r3, [r2, #2]	@ zero_extendqisi2
+	tst	r3, #224
+	bne	.L688
+	ldrb	r0, [r0, #4]	@ zero_extendqisi2
+	bfi	r3, r0, #5, #3
+	strb	r3, [r2, #2]
+	uxtb	r3, r3
+	ldr	r2, .L697+4
+	tst	r3, #8
+	ldr	r5, [r2]
+	beq	.L692
+	ldrh	r0, [r5, #116]
+	subs	r0, r0, #1
+	strh	r0, [r5, #116]	@ movhi
+.L693:
+	and	r3, r3, #224
+	cmp	r3, #160
+	bne	.L695
+	ldr	r3, [r4, r1, lsl #2]
+	ldr	r2, [r2]
+	ubfx	r0, r3, #11, #8
+	adds	r0, r0, #1
+	bfi	r3, r0, #11, #8
+	str	r3, [r4, r1, lsl #2]
+	ldrh	r3, [r2, #120]
+	subs	r3, r3, #1
+	strh	r3, [r2, #120]	@ movhi
+	pop	{r4, r5, pc}
+.L692:
+	tst	r3, #24
+	itete	eq
+	ldrheq	r0, [r5, #114]
+	ldrhne	r0, [r5, #118]
+	addeq	r0, r0, #-1
+	addne	r0, r0, #-1
+	ite	eq
+	strheq	r0, [r5, #114]	@ movhi
+	strhne	r0, [r5, #118]	@ movhi
+	b	.L693
+.L695:
+	ldrh	r0, [r4, r1, lsl #2]
+	cmp	r3, #64
+	add	r5, r0, #1
+	bfi	r0, r5, #0, #11
+	strh	r0, [r4, r1, lsl #2]	@ movhi
+	bne	.L696
+	ldr	r2, [r2]
+	ldrh	r3, [r2, #122]
+	subs	r3, r3, #1
+	strh	r3, [r2, #122]	@ movhi
+	pop	{r4, r5, pc}
+.L696:
+	cmp	r3, #96
+	itttt	eq
+	ldreq	r2, [r2]
+	ldrheq	r3, [r2, #124]
+	addeq	r3, r3, #-1
+	strheq	r3, [r2, #124]	@ movhi
+.L688:
+	pop	{r4, r5, pc}
+.L698:
+	.align	2
+.L697:
+	.word	.LANCHOR57
+	.word	.LANCHOR46
+	.size	ftl_info_data_recovery, .-ftl_info_data_recovery
+	.section	.text.ftl_get_ppa_from_index,"ax",%progbits
+	.align	1
+	.global	ftl_get_ppa_from_index
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_get_ppa_from_index, %function
+ftl_get_ppa_from_index:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L704
+	push	{r4, r5, r6, lr}
+	mov	r4, r0
+	ldr	r5, [r3]
+	ldr	r3, .L704+4
+	ldrh	r2, [r3]
+	ldr	r3, .L704+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	mul	r1, r3, r2
+	cmp	r0, r1
+	itet	ge
+	smulbbge	r3, r3, r2
+	addlt	r5, r5, #16
+	addge	r5, r5, #48
+	ldrb	r6, [r5, #9]	@ zero_extendqisi2
+	itt	ge
+	subge	r4, r0, r3
+	uxthge	r4, r4
+	mov	r1, r6
+	mov	r0, r4
+	bl	__aeabi_idiv
+	smulbb	r6, r0, r6
+	movw	r2, #65535
+	subs	r4, r4, r6
+	uxth	r4, r4
+	adds	r4, r4, #8
+	ldrh	r3, [r5, r4, lsl #1]
+	cmp	r3, r2
+	bne	.L702
+	movw	r2, #837
+	ldr	r1, .L704+12
+	ldr	r0, .L704+16
+	bl	printf
+.L703:
+	b	.L703
+.L702:
+	ldr	r2, .L704+20
+	ldrh	r2, [r2]
+	mla	r0, r3, r2, r0
+	pop	{r4, r5, r6, pc}
+.L705:
+	.align	2
+.L704:
+	.word	.LANCHOR60
+	.word	.LANCHOR79
+	.word	.LANCHOR69
+	.word	.LANCHOR80
+	.word	.LC0
+	.word	.LANCHOR75
+	.size	ftl_get_ppa_from_index, .-ftl_get_ppa_from_index
+	.section	.text.lpa_hash_get_ppa,"ax",%progbits
+	.align	1
+	.global	lpa_hash_get_ppa
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	lpa_hash_get_ppa, %function
+lpa_hash_get_ppa:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L710
+	uxtb	r2, r0
+	push	{r4, r5}
+	ldrh	r3, [r3, r2, lsl #1]
+	ldr	r2, .L710+4
+	ldr	r1, [r2]
+	ldr	r2, .L710+8
+	ldr	r4, [r2]
+	movw	r2, #65535
+.L707:
+	cmp	r3, r2
+	bne	.L709
+	mov	r0, #-1
+	pop	{r4, r5}
+	bx	lr
+.L709:
+	ldr	r5, [r1, r3, lsl #2]
+	cmp	r0, r5
+	bne	.L708
+	mov	r0, r3
+	pop	{r4, r5}
+	b	ftl_get_ppa_from_index
+.L708:
+	ldrh	r3, [r4, r3, lsl #1]
+	b	.L707
+.L711:
+	.align	2
+.L710:
+	.word	.LANCHOR81
+	.word	.LANCHOR82
+	.word	.LANCHOR83
+	.size	lpa_hash_get_ppa, .-lpa_hash_get_ppa
+	.section	.text.ftl_get_new_free_page,"ax",%progbits
+	.align	1
+	.global	ftl_get_new_free_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_get_new_free_page, %function
+ftl_get_new_free_page:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldrh	r1, [r0]
+	movw	r2, #65535
+	push	{r4, r5, r6, lr}
+	mov	r3, r0
+	cmp	r1, r2
+	bne	.L713
+	mov	r2, #948
+	ldr	r1, .L723
+	ldr	r0, .L723+4
+	bl	printf
+.L714:
+	b	.L714
+.L713:
+	ldr	r1, .L723+8
+	ldrh	r0, [r0, #2]
+	ldrh	r1, [r1]
+	cmp	r0, r1
+	bne	.L715
+	movw	r2, #949
+	ldr	r1, .L723
+	ldr	r0, .L723+4
+	bl	printf
+.L716:
+	b	.L716
+.L715:
+	ldrh	r1, [r3, #6]
+	cbnz	r1, .L717
+	movw	r2, #950
+	ldr	r1, .L723
+	ldr	r0, .L723+4
+	bl	printf
+.L718:
+	b	.L718
+.L717:
+	ldrb	r0, [r3, #5]	@ zero_extendqisi2
+	movs	r6, #0
+	ldr	r4, .L723+12
+	adds	r0, r0, #8
+	ldrh	r0, [r3, r0, lsl #1]
+	ldrb	r5, [r4]	@ zero_extendqisi2
+	mov	r4, r2
+.L719:
+	cmp	r0, r4
+	ldrb	r2, [r3, #5]	@ zero_extendqisi2
+	beq	.L721
+	ldr	r6, .L723+16
+	adds	r2, r2, #1
+	uxtb	r2, r2
+	ldrh	r4, [r3, #2]
+	subs	r1, r1, #1
+	ldrh	r6, [r6]
+	cmp	r5, r2
+	strh	r1, [r3, #6]	@ movhi
+	ldrh	r1, [r3, #10]
+	strb	r2, [r3, #5]
+	it	eq
+	addeq	r2, r4, #1
+	mul	r0, r0, r6
+	it	eq
+	strheq	r2, [r3, #2]	@ movhi
+	add	r1, r1, #1
+	it	eq
+	moveq	r2, #0
+	strh	r1, [r3, #10]	@ movhi
+	it	eq
+	strbeq	r2, [r3, #5]
+	orrs	r0, r0, r4
+	pop	{r4, r5, r6, pc}
+.L721:
+	adds	r2, r2, #1
+	uxtb	r2, r2
+	cmp	r2, r5
+	strb	r2, [r3, #5]
+	itttt	eq
+	ldrheq	r2, [r3, #2]
+	strbeq	r6, [r3, #5]
+	addeq	r2, r2, #1
+	strheq	r2, [r3, #2]	@ movhi
+	ldrb	r2, [r3, #5]	@ zero_extendqisi2
+	adds	r2, r2, #8
+	ldrh	r0, [r3, r2, lsl #1]
+	b	.L719
+.L724:
+	.align	2
+.L723:
+	.word	.LANCHOR84
+	.word	.LC0
+	.word	.LANCHOR79
+	.word	.LANCHOR69
+	.word	.LANCHOR75
+	.size	ftl_get_new_free_page, .-ftl_get_new_free_page
+	.section	.text.ftl_ext_alloc_new_blk,"ax",%progbits
+	.align	1
+	.global	ftl_ext_alloc_new_blk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_ext_alloc_new_blk, %function
+ftl_ext_alloc_new_blk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	bl	ftl_alloc_sys_blk
+	subs	r3, r0, #1
+	movw	r2, #65533
+	uxth	r3, r3
+	mov	r4, r0
+	cmp	r3, r2
+	bls	.L726
+	movw	r2, #981
+	ldr	r1, .L728
+	ldr	r0, .L728+4
+	bl	printf
+.L727:
+	b	.L727
+.L726:
+	ldr	r5, .L728+8
+	movs	r1, #0
+	bl	ftl_erase_phy_blk
+	ldr	r3, [r5]
+	ldrh	r0, [r3, #130]
+	bl	ftl_free_sys_blk
+	ldr	r3, [r5]
+	movs	r0, #0
+	strh	r4, [r3, #130]	@ movhi
+	strh	r0, [r3, #140]	@ movhi
+	pop	{r3, r4, r5, pc}
+.L729:
+	.align	2
+.L728:
+	.word	.LANCHOR85
+	.word	.LC0
+	.word	.LANCHOR46
+	.size	ftl_ext_alloc_new_blk, .-ftl_ext_alloc_new_blk
+	.section	.text.ftl_total_vpn_update,"ax",%progbits
+	.align	1
+	.global	ftl_total_vpn_update
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_total_vpn_update, %function
+ftl_total_vpn_update:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r2, .L737
+	push	{r4, r5, r6, r7, lr}
+	mov	r1, r2
+	ldrh	r3, [r2]
+	cmp	r3, #4
+	bhi	.L731
+	cbnz	r0, .L731
+	adds	r3, r3, #1
+	strh	r3, [r2]	@ movhi
+	pop	{r4, r5, r6, r7, pc}
+.L731:
+	ldr	r2, .L737+4
+	movs	r3, #0
+	strh	r3, [r1]	@ movhi
+	movw	ip, #65535
+	mov	r1, r3
+	ldrh	r5, [r2]
+	ldr	r2, .L737+8
+	ldr	r6, [r2]
+	ldr	r2, .L737+12
+	ldr	r7, [r2]
+	mov	r2, r3
+.L733:
+	uxth	r0, r3
+	cmp	r5, r0
+	bhi	.L736
+	ldr	r3, .L737+16
+	ldr	r3, [r3]
+	str	r1, [r3, #524]
+	str	r2, [r3, #528]
+	pop	{r4, r5, r6, r7, pc}
+.L736:
+	ldrh	r0, [r6, r3, lsl #1]
+	cmp	r0, ip
+	beq	.L734
+	add	r4, r7, r3, lsl #2
+	ldrb	r4, [r4, #2]	@ zero_extendqisi2
+	and	r4, r4, #224
+	cmp	r4, #160
+	ite	eq
+	addeq	r2, r2, r0
+	addne	r1, r1, r0
+.L734:
+	adds	r3, r3, #1
+	b	.L733
+.L738:
+	.align	2
+.L737:
+	.word	.LANCHOR86
+	.word	.LANCHOR54
+	.word	.LANCHOR56
+	.word	.LANCHOR57
+	.word	.LANCHOR60
+	.size	ftl_total_vpn_update, .-ftl_total_vpn_update
+	.section	.text.ftl_debug_info_fill,"ax",%progbits
+	.align	1
+	.global	ftl_debug_info_fill
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_debug_info_fill, %function
+ftl_debug_info_fill:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	movs	r0, #0
+	bx	lr
+	.size	ftl_debug_info_fill, .-ftl_debug_info_fill
+	.section	.text.ftl_vpn_update,"ax",%progbits
+	.align	1
+	.global	ftl_vpn_update
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_vpn_update, %function
+ftl_vpn_update:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L741
+	ldr	r3, [r3]
+	ldrh	r0, [r3, r0, lsl #1]
+	clz	r0, r0
+	lsrs	r0, r0, #5
+	bx	lr
+.L742:
+	.align	2
+.L741:
+	.word	.LANCHOR56
+	.size	ftl_vpn_update, .-ftl_vpn_update
+	.section	.text.ftl_vpn_decrement,"ax",%progbits
+	.align	1
+	.global	ftl_vpn_decrement
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_vpn_decrement, %function
+ftl_vpn_decrement:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	movw	r3, #65535
+	push	{r4, lr}
+	cmp	r0, r3
+	mov	r1, r0
+	beq	.L744
+	ldr	r3, .L749
+	ldr	r3, [r3]
+	ldrh	r4, [r3, r0, lsl #1]
+	cbnz	r4, .L745
+	mov	r2, r4
+	ldr	r0, .L749+4
+	bl	printf
+.L748:
+	movs	r0, #0
+	pop	{r4, pc}
+.L745:
+	subs	r4, r4, #1
+	strh	r4, [r3, r0, lsl #1]	@ movhi
+.L744:
+	ldr	r2, .L749+8
+	ldrh	r0, [r2]
+	cmp	r1, r0
+	beq	.L748
+	movw	r3, #65535
+	cmp	r0, r3
+	bne	.L747
+	strh	r1, [r2]	@ movhi
+	b	.L748
+.L747:
+	bl	ftl_vpn_update
+	adds	r0, r0, #0
+	strh	r1, [r2]	@ movhi
+	it	ne
+	movne	r0, #1
+	pop	{r4, pc}
+.L750:
+	.align	2
+.L749:
+	.word	.LANCHOR56
+	.word	.LC17
+	.word	.LANCHOR87
+	.size	ftl_vpn_decrement, .-ftl_vpn_decrement
+	.section	.text.lpa_hash_update_ppa,"ax",%progbits
+	.align	1
+	.global	lpa_hash_update_ppa
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	lpa_hash_update_ppa, %function
+lpa_hash_update_ppa:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	uxtb	ip, r0
+	ldr	r4, .L762
+	movw	r6, #65535
+	mov	fp, r6
+	ldr	r5, .L762+4
+	ldr	lr, [r4]
+	ldr	r4, .L762+8
+	ldrh	r3, [r5, ip, lsl #1]
+	ldr	r4, [r4]
+.L752:
+	cmp	r3, fp
+	beq	.L756
+	ldr	r7, [lr, r3, lsl #2]
+	add	r8, lr, r3, lsl #2
+	cmp	r0, r7
+	bne	.L753
+	cmp	r6, fp
+	mov	r10, #-1
+	ite	eq
+	ldrheq	r6, [r4, r3, lsl #1]
+	ldrhne	r7, [r4, r3, lsl #1]
+	str	r10, [r8]
+	ite	eq
+	strheq	r6, [r5, ip, lsl #1]	@ movhi
+	strhne	r7, [r4, r6, lsl #1]	@ movhi
+	movw	r6, #65535
+	strh	r6, [r4, r3, lsl #1]	@ movhi
+.L756:
+	ldrh	r3, [r5, ip, lsl #1]
+	str	r0, [lr, r2, lsl #2]
+	strh	r2, [r5, ip, lsl #1]	@ movhi
+	strh	r3, [r4, r2, lsl #1]	@ movhi
+	adds	r3, r1, #1
+	beq	.L758
+	ldr	r3, .L762+12
+	ldrh	r0, [r3]
+	movs	r3, #1
+	rsb	r2, r0, #21
+	lsls	r3, r3, r2
+	ldr	r2, .L762+16
+	lsr	r0, r1, r0
+	subs	r3, r3, #1
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	ands	r0, r0, r3
+	bl	__aeabi_uidiv
+	uxth	r0, r0
+	bl	ftl_vpn_decrement
+.L758:
+	mov	r0, #-1
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L753:
+	mov	r6, r3
+	ldrh	r3, [r4, r3, lsl #1]
+	b	.L752
+.L763:
+	.align	2
+.L762:
+	.word	.LANCHOR82
+	.word	.LANCHOR81
+	.word	.LANCHOR83
+	.word	.LANCHOR71
+	.word	.LANCHOR70
+	.size	lpa_hash_update_ppa, .-lpa_hash_update_ppa
+	.section	.text.ftl_write_completed,"ax",%progbits
+	.align	1
+	.global	ftl_write_completed
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_write_completed, %function
+ftl_write_completed:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r7, .L772
+	ldr	r6, .L772+4
+.L765:
+	ldrb	r3, [r7]	@ zero_extendqisi2
+	cmp	r3, #255
+	bne	.L771
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L771:
+	movs	r2, #48
+	add	r5, r3, r3, lsl #1
+	muls	r3, r2, r3
+	add	r5, r6, r5, lsl #4
+	adds	r4, r6, r3
+	ldrb	r3, [r6, r3]	@ zero_extendqisi2
+	strb	r3, [r7]
+	ldr	r3, [r4, #36]
+	adds	r3, r3, #1
+	bne	.L766
+	ldr	r3, .L772+8
+	mov	r8, #1
+	ldr	r10, [r4, #24]
+	ldrh	r0, [r3]
+	ldr	r3, .L772+12
+	rsb	r2, r0, #21
+	lsl	r2, r8, r2
+	lsr	r0, r10, r0
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	subs	r2, r2, #1
+	ands	r0, r0, r2
+	bl	__aeabi_uidiv
+	uxth	fp, r0
+	mov	r3, r10
+	ldr	r2, [r4, #20]
+	mov	r1, fp
+	ldr	r0, .L772+16
+	bl	printf
+	movs	r2, #0
+	mov	r1, r8
+	mov	r0, fp
+	bl	gc_add_sblk
+	ldr	r3, .L772+20
+	ldr	r3, [r3]
+	ldrh	r2, [r3, #16]
+	cmp	r2, fp
+	bne	.L767
+	movs	r2, #0
+	strh	r2, [r3, #22]	@ movhi
+.L768:
+	mov	r0, r5
+	bl	ftl_write_buf
+	b	.L765
+.L767:
+	ldrh	r2, [r3, #48]
+	cmp	r2, fp
+	itt	eq
+	moveq	r2, #0
+	strheq	r2, [r3, #54]	@ movhi
+	b	.L768
+.L766:
+	ldrh	r2, [r4, #32]
+	ldr	r1, [r4, #28]
+	ldr	r0, [r4, #20]
+	bl	lpa_hash_update_ppa
+	ldrb	r3, [r4, #2]	@ zero_extendqisi2
+	lsls	r2, r3, #29
+	bpl	.L770
+	bic	r3, r3, #2
+	strb	r3, [r4, #2]
+	b	.L765
+.L770:
+	mov	r0, r5
+	bl	buf_free
+	b	.L765
+.L773:
+	.align	2
+.L772:
+	.word	.LANCHOR88
+	.word	.LANCHOR36
+	.word	.LANCHOR71
+	.word	.LANCHOR70
+	.word	.LC18
+	.word	.LANCHOR60
+	.size	ftl_write_completed, .-ftl_write_completed
+	.section	.text.ftl_mask_bad_block,"ax",%progbits
+	.align	1
+	.global	ftl_mask_bad_block
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_mask_bad_block, %function
+ftl_mask_bad_block:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	ubfx	r4, r0, #21, #3
+	ldr	r3, .L780
+	ldrh	r2, [r3]
+	movs	r3, #1
+	rsb	r1, r2, #21
+	lsls	r3, r3, r1
+	lsrs	r0, r0, r2
+	ldr	r2, .L780+4
+	subs	r3, r3, #1
+	ands	r0, r0, r3
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	ldr	r3, .L780+8
+	uxtb	r5, r0
+	ldr	r3, [r3]
+	lsls	r3, r3, #17
+	bpl	.L775
+	mov	r2, r5
+	mov	r1, r4
+	ldr	r0, .L780+12
+	bl	printf
+.L775:
+	ldr	r3, .L780+16
+	ldrh	r3, [r3]
+	cmp	r3, r5
+	bls	.L774
+	ldr	r3, .L780+20
+	ldr	r2, [r3]
+	movs	r3, #1
+	lsls	r3, r3, r4
+	add	r2, r2, r5, lsl #2
+	ldrb	r4, [r2, #3]	@ zero_extendqisi2
+	orrs	r4, r4, r3
+	strb	r4, [r2, #3]
+.L774:
+	pop	{r3, r4, r5, pc}
+.L781:
+	.align	2
+.L780:
+	.word	.LANCHOR71
+	.word	.LANCHOR70
+	.word	.LANCHOR22
+	.word	.LC19
+	.word	.LANCHOR54
+	.word	.LANCHOR57
+	.size	ftl_mask_bad_block, .-ftl_mask_bad_block
+	.section	.text.print_ftl_debug_info,"ax",%progbits
+	.align	1
+	.global	print_ftl_debug_info
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	print_ftl_debug_info, %function
+print_ftl_debug_info:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L783
+	push	{r4, r5, r6, lr}
+	sub	sp, sp, #32
+	ldr	r4, .L783+4
+	ldr	r5, [r3]
+	ldr	r0, [r4]
+	ldr	r6, [r5, #528]
+	ldrh	r3, [r0, #116]
+	ldrh	r2, [r0, #118]
+	ldrh	r1, [r0, #114]
+	str	r6, [sp, #16]
+	ldr	r5, [r5, #524]
+	str	r5, [sp, #12]
+	ldrh	r5, [r0, #120]
+	str	r5, [sp, #8]
+	ldrh	r5, [r0, #124]
+	str	r5, [sp, #4]
+	ldrh	r0, [r0, #122]
+	str	r0, [sp]
+	ldr	r0, .L783+8
+	bl	printf
+	ldr	r1, [r4]
+	ldr	r3, .L783+12
+	ldr	r0, .L783+16
+	ldr	r2, [r1, #64]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r2, [sp, #4]
+	ldr	r2, [r1, #8]
+	str	r2, [sp]
+	ldr	r2, [r1, #28]
+	ldr	r1, [r1, #20]
+	bl	printf
+	ldr	r1, [r4]
+	ldr	r0, .L783+20
+	ldr	r3, [r1, #16]
+	ldr	r2, [r1, #60]
+	ldr	r1, [r1, #52]
+	lsrs	r3, r3, #11
+	bl	printf
+	ldr	r2, [r4]
+	ldrh	r0, [r2, #98]
+	ldrh	r3, [r2, #88]
+	ldrh	r1, [r2, #74]
+	str	r0, [sp, #24]
+	ldrh	r0, [r2, #94]
+	str	r0, [sp, #20]
+	ldrh	r0, [r2, #90]
+	str	r0, [sp, #16]
+	ldr	r0, [r2, #80]
+	str	r0, [sp, #12]
+	ldrh	r0, [r2, #72]
+	str	r0, [sp, #8]
+	ldrh	r0, [r2, #96]
+	str	r0, [sp, #4]
+	ldrh	r0, [r2, #92]
+	str	r0, [sp]
+	ldr	r0, .L783+24
+	ldr	r2, [r2, #84]
+	bl	printf
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, pc}
+.L784:
+	.align	2
+.L783:
+	.word	.LANCHOR60
+	.word	.LANCHOR46
+	.word	.LC20
+	.word	.LANCHOR89
+	.word	.LC21
+	.word	.LC22
+	.word	.LC23
+	.size	print_ftl_debug_info, .-print_ftl_debug_info
+	.section	.text.sblk_init,"ax",%progbits
+	.align	1
+	.global	sblk_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sblk_init, %function
+sblk_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r2, .L786
+	movs	r3, #255
+	movs	r0, #0
+	strb	r3, [r2]
+	ldr	r2, .L786+4
+	strb	r3, [r2]
+	ldr	r2, .L786+8
+	strb	r3, [r2]
+	ldr	r2, .L786+12
+	strb	r3, [r2]
+	bx	lr
+.L787:
+	.align	2
+.L786:
+	.word	.LANCHOR90
+	.word	.LANCHOR88
+	.word	.LANCHOR51
+	.word	.LANCHOR62
+	.size	sblk_init, .-sblk_init
+	.section	.text.dump_sblk_queue,"ax",%progbits
+	.align	1
+	.global	dump_sblk_queue
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	dump_sblk_queue, %function
+dump_sblk_queue:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	ldr	r4, .L797
+	ldr	r0, .L797+4
+	ldrb	r1, [r4]	@ zero_extendqisi2
+	bl	printf
+	ldrb	r4, [r4]	@ zero_extendqisi2
+	cmp	r4, #255
+	beq	.L788
+	ldr	r5, .L797+8
+	add	r4, r4, r4, lsl #1
+	ldr	r6, .L797+12
+	add	r4, r5, r4, lsl #4
+.L790:
+	ldr	r3, [r4, #24]
+	mov	r0, r6
+	ldrb	r2, [r4, #42]	@ zero_extendqisi2
+	ldrb	r1, [r4, #1]	@ zero_extendqisi2
+	bl	printf
+	ldrb	r4, [r4]	@ zero_extendqisi2
+	cmp	r4, #255
+	beq	.L788
+	add	r4, r4, r4, lsl #1
+	add	r4, r5, r4, lsl #4
+	b	.L790
+.L788:
+	pop	{r4, r5, r6, pc}
+.L798:
+	.align	2
+.L797:
+	.word	.LANCHOR90
+	.word	.LC24
+	.word	.LANCHOR36
+	.word	.LC25
+	.size	dump_sblk_queue, .-dump_sblk_queue
+	.section	.text.queue_lun_state,"ax",%progbits
+	.align	1
+	.global	queue_lun_state
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	queue_lun_state, %function
+queue_lun_state:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L816
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	cmp	r5, #255
+	beq	.L808
+	ldr	r3, .L816+4
+	ubfx	r10, r0, #21, #3
+	ldr	lr, .L816+12
+	mov	ip, #48
+	ldrh	r7, [r3]
+	movs	r3, #1
+	mov	r8, lr
+	rsb	r2, r7, #21
+	lsls	r3, r3, r2
+	ldr	r2, .L816+8
+	subs	r3, r3, #1
+	ldrb	r6, [r2]	@ zero_extendqisi2
+	asr	r2, r0, r7
+	uxth	r3, r3
+	subs	r6, r6, #1
+	uxth	r6, r6
+	ands	r2, r2, r6
+	ands	r2, r2, r3
+.L807:
+	mla	r0, ip, r5, lr
+	ldr	r4, [r0, #24]
+	ubfx	fp, r4, #21, #3
+	cmp	r10, fp
+	bne	.L801
+	lsrs	r4, r4, r7
+	ldrb	r0, [r0, #42]	@ zero_extendqisi2
+	ands	r4, r4, r6
+	ands	r4, r4, r3
+	cmp	r2, r4
+	bne	.L802
+	cmp	r1, #1
+	bne	.L799
+	cmp	r0, #6
+	beq	.L801
+	cmp	r0, #8
+	beq	.L801
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L802:
+	cmp	r1, #3
+	bhi	.L801
+	tbb	[pc, r1]
+.L804:
+	.byte	(.L803-.L804)/2
+	.byte	(.L805-.L804)/2
+	.byte	(.L806-.L804)/2
+	.byte	(.L799-.L804)/2
+	.p2align 1
+.L803:
+	cmp	r0, #2
+	beq	.L801
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L805:
+	cmp	r0, #6
+	beq	.L801
+	cmp	r0, #8
+	beq	.L801
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L806:
+	cmp	r0, #10
+	bne	.L799
+.L801:
+	mul	r5, ip, r5
+	ldrb	r5, [r8, r5]	@ zero_extendqisi2
+	cmp	r5, #255
+	bne	.L807
+.L808:
+	movs	r0, #0
+.L799:
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L817:
+	.align	2
+.L816:
+	.word	.LANCHOR90
+	.word	.LANCHOR71
+	.word	.LANCHOR70
+	.word	.LANCHOR36
+	.size	queue_lun_state, .-queue_lun_state
+	.section	.text.queue_remove_completed_req,"ax",%progbits
+	.align	1
+	.global	queue_remove_completed_req
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	queue_remove_completed_req, %function
+queue_remove_completed_req:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, lr}
+	ldr	r5, .L834
+	ldrb	r0, [r5]	@ zero_extendqisi2
+	cmp	r0, #255
+	beq	.L818
+	movs	r1, #48
+	ldr	r2, .L834+4
+	muls	r1, r0, r1
+	adds	r3, r2, r1
+	ldrb	r4, [r3, #42]	@ zero_extendqisi2
+	subs	r4, r4, #11
+	cmp	r4, #1
+	bhi	.L818
+	ldrb	r4, [r2, r1]	@ zero_extendqisi2
+	strb	r4, [r5]
+	movs	r4, #255
+	strb	r4, [r2, r1]
+	ldrb	r1, [r3, #43]	@ zero_extendqisi2
+	cmp	r1, #1
+	bne	.L820
+	ldrh	r3, [r3, #34]
+	cbnz	r3, .L821
+	ldr	r3, .L834+8
+.L833:
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	cmp	r1, #255
+	bne	.L823
+	movs	r1, #48
+	mla	r2, r1, r0, r2
+	ldrb	r2, [r2, #1]	@ zero_extendqisi2
+	strb	r2, [r3]
+	pop	{r4, r5, pc}
+.L821:
+	ldr	r3, .L834+12
+	b	.L833
+.L820:
+	cbnz	r1, .L818
+	ldr	r3, [r3, #20]
+	adds	r3, r3, #1
+	beq	.L818
+	ldr	r3, .L834+16
+	b	.L833
+.L823:
+	movs	r3, #48
+.L826:
+	mov	r4, r1
+	muls	r1, r3, r1
+	ldrb	r1, [r2, r1]	@ zero_extendqisi2
+	cmp	r1, #255
+	bne	.L826
+	muls	r4, r3, r4
+	mla	r3, r3, r0, r2
+	ldrb	r3, [r3, #1]	@ zero_extendqisi2
+	strb	r3, [r2, r4]
+	pop	{r4, r5, pc}
+.L818:
+	pop	{r4, r5, pc}
+.L835:
+	.align	2
+.L834:
+	.word	.LANCHOR90
+	.word	.LANCHOR36
+	.word	.LANCHOR88
+	.word	.LANCHOR62
+	.word	.LANCHOR51
+	.size	queue_remove_completed_req, .-queue_remove_completed_req
+	.section	.text.pm_alloc_new_blk,"ax",%progbits
+	.align	1
+	.global	pm_alloc_new_blk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	pm_alloc_new_blk, %function
+pm_alloc_new_blk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r4, r5, r6, r7, lr}
+	ldr	r4, .L854
+	ldr	r1, .L854+4
+	ldr	r2, [r4]
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	ldrh	r3, [r2, #690]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	cmp	r1, r3
+	strh	r3, [r2, #690]	@ movhi
+	bls	.L837
+	add	r3, r3, #336
+	ldrh	r2, [r2, r3, lsl #1]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L838
+.L837:
+	ldr	r7, .L854+8
+	ldr	r6, .L854+12
+.L852:
+	movs	r0, #1
+	bl	ftl_alloc_sblk
+	movs	r1, #0
+	mov	r5, r0
+	bl	ftl_erase_sblk
+	ldr	r1, [r4]
+	mov	r0, r5
+	add	r1, r1, #672
+	bl	ftl_get_blk_list_in_sblk
+	uxth	r0, r0
+	cbnz	r0, .L839
+	mov	r1, r5
+	mov	r0, r7
+	bl	printf
+	ldr	r3, [r6]
+	add	r5, r3, r5, lsl #2
+	ldrb	r3, [r5, #2]	@ zero_extendqisi2
+	orr	r3, r3, #224
+	strb	r3, [r5, #2]
+	b	.L852
+.L839:
+	ldr	r2, [r4]
+	movs	r0, #1
+	ldr	r1, .L854+16
+	movs	r3, #0
+	strh	r3, [r2, #690]	@ movhi
+	str	r0, [r1]
+	add	r1, r2, #416
+	movw	r0, #65535
+.L841:
+	ldrh	r6, [r1], #2
+	cmp	r6, r0
+	beq	.L840
+	adds	r3, r3, #1
+	cmp	r3, #128
+	bne	.L841
+	movs	r2, #188
+	ldr	r1, .L854+20
+	ldr	r0, .L854+24
+	bl	printf
+.L843:
+	b	.L843
+.L844:
+	movs	r2, #0
+	strh	r3, [r1, #692]	@ movhi
+	strh	r2, [r1, #696]	@ movhi
+	ldr	r2, .L854+28
+	ldrh	r2, [r2]
+	rsb	r2, r2, #21
+	asr	r0, r3, r2
+	strh	r0, [r1, #694]	@ movhi
+	ldr	r1, .L854+32
+	ldr	r1, [r1]
+	lsls	r1, r1, #19
+	bpl	.L849
+	movs	r1, #1
+	uxth	r0, r0
+	lsl	r2, r1, r2
+	mov	r1, r3
+	str	r0, [sp]
+	subs	r2, r2, #1
+	ldr	r0, .L854+36
+	bl	printf
+.L849:
+	movs	r0, #0
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, r6, r7, pc}
+.L840:
+	adds	r3, r3, #208
+	strh	r5, [r2, r3, lsl #1]	@ movhi
+	ldrh	r3, [r2, #688]
+	adds	r3, r3, #1
+	strh	r3, [r2, #688]	@ movhi
+.L838:
+	ldr	r1, [r4]
+	movw	r0, #65533
+	ldrh	r3, [r1, #690]
+	add	r3, r3, #336
+	ldrh	r3, [r1, r3, lsl #1]
+	subs	r2, r3, #1
+	uxth	r2, r2
+	cmp	r2, r0
+	bls	.L844
+	movs	r2, #193
+	ldr	r1, .L854+20
+	ldr	r0, .L854+24
+	bl	printf
+.L845:
+	b	.L845
+.L855:
+	.align	2
+.L854:
+	.word	.LANCHOR46
+	.word	.LANCHOR69
+	.word	.LC26
+	.word	.LANCHOR57
+	.word	.LANCHOR91
+	.word	.LANCHOR92
+	.word	.LC0
+	.word	.LANCHOR71
+	.word	.LANCHOR22
+	.word	.LC27
+	.size	pm_alloc_new_blk, .-pm_alloc_new_blk
+	.section	.text.pm_select_ram_region,"ax",%progbits
+	.align	1
+	.global	pm_select_ram_region
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	pm_select_ram_region, %function
+pm_select_ram_region:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r2, .L867
+	push	{r3, r4, r5, r6, r7, lr}
+	movs	r3, #0
+	movw	r4, #65535
+	mov	r1, r2
+.L858:
+	ldrh	r5, [r2, r3, lsl #3]
+	uxth	r0, r3
+	cmp	r5, r4
+	beq	.L857
+	adds	r3, r3, #1
+	cmp	r3, #32
+	bne	.L858
+	movs	r2, #0
+	mov	r4, #32768
+	mov	r0, r3
+.L860:
+	add	r3, r1, r2, lsl #3
+	uxth	r5, r2
+	ldrh	r3, [r3, #2]
+	lsls	r6, r3, #16
+	bmi	.L859
+	cmp	r3, r4
+	itt	cc
+	movcc	r4, r3
+	movcc	r0, r5
+.L859:
+	adds	r2, r2, #1
+	cmp	r2, #32
+	bne	.L860
+	cmp	r0, #32
+	bne	.L857
+	ldr	r3, .L867+4
+	mov	r2, #-1
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	movs	r3, #0
+.L862:
+	add	r4, r1, r3, lsl #3
+	uxth	r6, r3
+	ldrh	r4, [r4, #2]
+	cmp	r4, r2
+	bcs	.L861
+	ldrh	r7, [r1, r3, lsl #3]
+	cmp	r7, r5
+	itt	ne
+	movne	r2, r4
+	movne	r0, r6
+.L861:
+	adds	r3, r3, #1
+	cmp	r3, #32
+	bne	.L862
+	cmp	r0, #32
+	bne	.L857
+	movw	r2, #289
+	ldr	r1, .L867+8
+	ldr	r0, .L867+12
+	bl	printf
+.L863:
+	b	.L863
+.L857:
+	pop	{r3, r4, r5, r6, r7, pc}
+.L868:
+	.align	2
+.L867:
+	.word	.LANCHOR93
+	.word	.LANCHOR94
+	.word	.LANCHOR95
+	.word	.LC0
+	.size	pm_select_ram_region, .-pm_select_ram_region
+	.section	.text.ftl_memset,"ax",%progbits
+	.align	1
+	.global	ftl_memset
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_memset, %function
+ftl_memset:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	memset
+	.size	ftl_memset, .-ftl_memset
+	.section	.text.flash_lsb_page_tbl_build,"ax",%progbits
+	.align	1
+	.global	flash_lsb_page_tbl_build
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_lsb_page_tbl_build, %function
+flash_lsb_page_tbl_build:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, lr}
+	ldr	r4, .L905
+	cbnz	r0, .L871
+.L872:
+	strh	r0, [r4, r0, lsl #1]	@ movhi
+	adds	r0, r0, #1
+	cmp	r0, #256
+	bne	.L872
+.L878:
+	movs	r1, #255
+	mov	r2, #1024
+	ldr	r0, .L905+4
+	bl	ftl_memset
+	ldr	r1, .L905+4
+	movs	r3, #0
+.L873:
+	ldrh	r2, [r4, r3, lsl #1]
+	adds	r3, r3, #1
+	cmp	r3, #256
+	strh	r2, [r1, r2, lsl #1]	@ movhi
+	bne	.L873
+	pop	{r4, pc}
+.L871:
+	cmp	r0, #1
+	bne	.L874
+	movs	r3, #0
+.L877:
+	cmp	r3, #3
+	uxth	r2, r3
+	bls	.L875
+	tst	r2, #1
+	ite	ne
+	movne	r1, #3
+	moveq	r1, #2
+	rsb	r2, r1, r2, lsl #1
+	uxth	r2, r2
+.L875:
+	strh	r2, [r4, r3, lsl #1]	@ movhi
+	adds	r3, r3, #1
+	cmp	r3, #256
+	bne	.L877
+	b	.L878
+.L874:
+	cmp	r0, #2
+	bne	.L879
+	movs	r2, #0
+.L881:
+	uxth	r3, r2
+	cmp	r2, #1
+	ittt	hi
+	lslhi	r3, r3, #1
+	addhi	r3, r3, #-1
+	uxthhi	r3, r3
+	strh	r3, [r4, r2, lsl #1]	@ movhi
+	adds	r2, r2, #1
+	cmp	r2, #256
+	bne	.L881
+	b	.L878
+.L879:
+	cmp	r0, #3
+	bne	.L882
+	movs	r3, #0
+.L885:
+	cmp	r3, #5
+	uxth	r2, r3
+	bls	.L883
+	tst	r2, #1
+	ite	ne
+	movne	r1, #5
+	moveq	r1, #4
+	rsb	r2, r1, r2, lsl #1
+	uxth	r2, r2
+.L883:
+	strh	r2, [r4, r3, lsl #1]	@ movhi
+	adds	r3, r3, #1
+	cmp	r3, #256
+	bne	.L885
+	b	.L878
+.L882:
+	cmp	r0, #4
+	mov	r3, #0
+	bne	.L886
+	strh	r3, [r4]	@ movhi
+	movs	r3, #1
+	strh	r3, [r4, #2]	@ movhi
+	movs	r3, #2
+	strh	r3, [r4, #4]	@ movhi
+	movs	r3, #3
+	strh	r3, [r4, #6]	@ movhi
+	movs	r3, #5
+	strh	r3, [r4, #10]	@ movhi
+	movs	r3, #7
+	strh	r3, [r4, #12]	@ movhi
+	mov	r2, r4
+	movs	r3, #8
+	strh	r0, [r4, #8]	@ movhi
+	strh	r3, [r2, #14]!	@ movhi
+.L888:
+	tst	r3, #1
+	ite	ne
+	movne	r1, #7
+	moveq	r1, #6
+	rsb	r1, r1, r3, lsl #1
+	adds	r3, r3, #1
+	uxth	r3, r3
+	strh	r1, [r2, #2]!	@ movhi
+	cmp	r3, #256
+	bne	.L888
+	b	.L878
+.L886:
+	cmp	r0, #5
+	bne	.L889
+.L890:
+	strh	r3, [r4, r3, lsl #1]	@ movhi
+	adds	r3, r3, #1
+	cmp	r3, #16
+	bne	.L890
+	ldr	r2, .L905+8
+.L891:
+	strh	r3, [r2, #2]!	@ movhi
+	adds	r3, r3, #2
+	uxth	r3, r3
+	cmp	r3, #496
+	bne	.L891
+	b	.L878
+.L889:
+	cmp	r0, #8
+	bne	.L878
+.L892:
+	strh	r3, [r4, r3]	@ movhi
+	adds	r3, r3, #2
+	cmp	r3, #512
+	bne	.L892
+	b	.L878
+.L906:
+	.align	2
+.L905:
+	.word	.LANCHOR14
+	.word	.LANCHOR96
+	.word	.LANCHOR14+30
+	.size	flash_lsb_page_tbl_build, .-flash_lsb_page_tbl_build
+	.section	.text.flash_die_info_init,"ax",%progbits
+	.align	1
+	.global	flash_die_info_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_die_info_init, %function
+flash_die_info_init:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r5, #0
+	ldr	r4, .L920
+	ldr	r6, .L920+4
+	ldrh	r3, [r4, #26]
+	add	r10, r4, #1
+	ldr	r7, .L920+8
+	ldrb	r1, [r4, #12]	@ zero_extendqisi2
+	ldrh	r0, [r4, #10]
+	strh	r3, [r7]	@ movhi
+	strb	r5, [r6]
+	bl	__aeabi_idiv
+	ldr	r3, .L920+12
+	movs	r2, #8
+	mov	r1, r5
+	ldr	r8, .L920+32
+	ldr	fp, .L920+20
+	strh	r0, [r3]	@ movhi
+	ldr	r0, .L920+16
+	bl	ftl_memset
+	movs	r2, #32
+	mov	r1, r5
+	ldr	r0, .L920+20
+	bl	ftl_memset
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	str	r3, [sp]
+	ldr	r3, .L920+16
+.L909:
+	ldr	r2, [sp]
+	add	r1, r8, r5, lsl #3
+	mov	r0, r10
+	str	r3, [sp, #4]
+	bl	flash_mem_cmp8
+	ldr	r3, [sp, #4]
+	cbnz	r0, .L908
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	adds	r1, r2, #1
+	str	r0, [fp, r2, lsl #2]
+	strb	r1, [r6]
+	strb	r5, [r3, r2]
+.L908:
+	adds	r5, r5, #1
+	cmp	r5, #4
+	bne	.L909
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	cmp	r3, #2
+	beq	.L910
+.L914:
+	ldrb	r2, [r4, #13]	@ zero_extendqisi2
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	smulbb	r3, r3, r2
+	ldrh	r2, [r4, #14]
+	smulbb	r3, r3, r2
+	ldr	r2, .L920+24
+	strh	r3, [r2]	@ movhi
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L910:
+	ldrh	r5, [r7]
+	movs	r7, #0
+	ldrb	r3, [r4, #13]	@ zero_extendqisi2
+	ldrb	r8, [r4, #23]	@ zero_extendqisi2
+	ldr	fp, .L920+16
+	muls	r3, r5, r3
+	ldrh	r5, [r4, #14]
+	and	r5, r5, #65280
+	muls	r5, r3, r5
+	ldr	r3, .L920+28
+	lsl	r10, r5, #1
+.L913:
+	ldr	r1, .L920+32
+	mov	r0, r3
+	ldr	r2, [sp]
+	str	r3, [sp, #4]
+	add	r1, r1, r7, lsl #3
+	bl	flash_mem_cmp8
+	ldr	r3, [sp, #4]
+	cbnz	r0, .L911
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	cmp	r8, #0
+	ite	eq
+	moveq	r1, r5
+	movne	r1, r10
+	ldr	r0, .L920+20
+	strb	r7, [fp, r2]
+	str	r1, [r0, r2, lsl #2]
+	adds	r1, r2, #1
+	strb	r1, [r6]
+.L911:
+	adds	r7, r7, #1
+	cmp	r7, #4
+	bne	.L913
+	b	.L914
+.L921:
+	.align	2
+.L920:
+	.word	.LANCHOR19
+	.word	.LANCHOR8
+	.word	.LANCHOR13
+	.word	.LANCHOR97
+	.word	.LANCHOR10
+	.word	.LANCHOR98
+	.word	.LANCHOR99
+	.word	.LANCHOR19+1
+	.word	.LANCHOR26
+	.size	flash_die_info_init, .-flash_die_info_init
+	.section	.text.FlashReadFacBbtData,"ax",%progbits
+	.align	1
+	.global	FlashReadFacBbtData
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashReadFacBbtData, %function
+FlashReadFacBbtData:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	lsrs	r2, r2, #3
+	movs	r1, #0
+	bl	ftl_memset
+	movs	r0, #0
+	pop	{r3, pc}
+	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
+	.section	.text.lpa_hash_init,"ax",%progbits
+	.align	1
+	.global	lpa_hash_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	lpa_hash_init, %function
+lpa_hash_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	mov	r2, #512
+	movs	r1, #255
+	ldr	r0, .L924
+	bl	ftl_memset
+	ldr	r3, .L924+4
+	movs	r1, #255
+	ldr	r2, .L924+8
+	ldrh	r3, [r3]
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	muls	r2, r3, r2
+	ldr	r3, .L924+12
+	ldr	r0, [r3]
+	lsls	r2, r2, #2
+	pop	{r3, lr}
+	b	ftl_memset
+.L925:
+	.align	2
+.L924:
+	.word	.LANCHOR81
+	.word	.LANCHOR79
+	.word	.LANCHOR69
+	.word	.LANCHOR83
+	.size	lpa_hash_init, .-lpa_hash_init
+	.section	.text.lpa_rebuild_hash,"ax",%progbits
+	.align	1
+	.global	lpa_rebuild_hash
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	lpa_rebuild_hash, %function
+lpa_rebuild_hash:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	ldr	r3, .L937
+	ldr	r3, [r3]
+	lsls	r3, r3, #19
+	bpl	.L927
+	movs	r3, #0
+	movs	r2, #190
+	ldr	r1, .L937+4
+	ldr	r0, .L937+8
+	bl	printf
+.L927:
+	ldr	r6, .L937+12
+	mov	r2, #512
+	ldr	r4, .L937+16
+	movs	r1, #255
+	ldr	r0, .L937+20
+	bl	ftl_memset
+	ldrh	r3, [r4]
+	movs	r1, #255
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	ldr	r5, .L937+24
+	muls	r2, r3, r2
+	ldr	r0, [r5]
+	lsls	r2, r2, #2
+	bl	ftl_memset
+	ldr	r3, .L937+28
+	movs	r2, #0
+	ldrb	r6, [r6]	@ zero_extendqisi2
+	ldr	ip, [r5]
+	ldr	r7, [r3]
+	ldr	r0, .L937+20
+.L928:
+	ldrh	r3, [r4]
+	uxth	r5, r2
+	mov	r1, r5
+	muls	r3, r6, r3
+	cmp	r5, r3, lsl #1
+	blt	.L930
+	pop	{r3, r4, r5, r6, r7, pc}
+.L930:
+	ldr	r3, [r7, r1, lsl #2]
+	adds	r2, r2, #1
+	cmp	r3, #-1
+	itttt	ne
+	uxtbne	r3, r3
+	ldrhne	lr, [r0, r3, lsl #1]
+	strhne	r5, [r0, r3, lsl #1]	@ movhi
+	strhne	lr, [ip, r1, lsl #1]	@ movhi
+	b	.L928
+.L938:
+	.align	2
+.L937:
+	.word	.LANCHOR22
+	.word	.LANCHOR100
+	.word	.LC28
+	.word	.LANCHOR69
+	.word	.LANCHOR79
+	.word	.LANCHOR81
+	.word	.LANCHOR83
+	.word	.LANCHOR82
+	.size	lpa_rebuild_hash, .-lpa_rebuild_hash
+	.section	.text.ftl_open_sblk_init,"ax",%progbits
+	.align	1
+	.global	ftl_open_sblk_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_open_sblk_init, %function
+ftl_open_sblk_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	mov	r4, r0
+	ldr	r8, .L945+12
+	mov	r6, r1
+	movs	r7, #0
+.L940:
+.L943:
+	mov	r0, r6
+	ldr	r10, .L945+16
+	bl	ftl_alloc_sblk
+	movs	r1, #0
+	mov	r5, r0
+	bl	ftl_erase_sblk
+	add	r1, r4, #16
+	mov	r0, r5
+	bl	ftl_get_blk_list_in_sblk
+	ldr	r1, .L945
+	cmp	r6, #2
+	ldrh	r2, [r8]
+	uxtb	r0, r0
+	strh	r5, [r4]	@ movhi
+	ite	eq
+	moveq	r3, #0
+	ldrbne	r3, [r1]	@ zero_extendqisi2
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	strb	r0, [r4, #9]
+	smulbb	r0, r0, r2
+	strh	r7, [r4, #2]	@ movhi
+	it	ne
+	smulbbne	r3, r3, r2
+	strb	r7, [r4, #5]
+	mul	r2, r2, r1
+	ldr	r1, .L945+4
+	strh	r0, [r4, #6]	@ movhi
+	it	ne
+	uxthne	r3, r3
+	strh	r7, [r4, #10]	@ movhi
+	ldr	r0, [r1]
+	movs	r1, #255
+	strh	r3, [r4, #12]	@ movhi
+	lsls	r2, r2, #2
+	strb	r6, [r4, #4]
+	add	r0, r0, r3, lsl #2
+	bl	ftl_memset
+	ldr	r3, [r10]
+	ldrh	r2, [r4, #6]
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	cbnz	r3, .L939
+	mov	r1, r5
+	ldr	r0, .L945+8
+	bl	printf
+	ldr	r3, [r10]
+	movw	r2, #65535
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	movs	r3, #7
+	strb	r3, [r4, #4]
+	b	.L943
+.L939:
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L946:
+	.align	2
+.L945:
+	.word	.LANCHOR69
+	.word	.LANCHOR82
+	.word	.LC26
+	.word	.LANCHOR79
+	.word	.LANCHOR56
+	.size	ftl_open_sblk_init, .-ftl_open_sblk_init
+	.section	.text.pm_free_sblk,"ax",%progbits
+	.align	1
+	.global	pm_free_sblk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	pm_free_sblk, %function
+pm_free_sblk:
+	@ args = 0, pretend = 0, frame = 280
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L962
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #280
+	ldrh	r2, [r3]
+	str	r3, [sp, #4]
+	cmp	r2, #128
+	bls	.L948
+	movs	r2, #74
+	ldr	r1, .L962+4
+	ldr	r0, .L962+8
+	bl	printf
+.L949:
+	b	.L949
+.L948:
+	mov	r2, #256
+	movs	r1, #0
+	add	r0, sp, #24
+	movs	r4, #1
+	bl	ftl_memset
+	ldr	r3, .L962+12
+	add	r10, sp, #24
+	ldr	r0, .L962+16
+	ldr	r1, .L962+20
+	ldrh	r7, [r3]
+	ldr	r6, [r0]
+	ldr	r5, [sp, #4]
+	rsb	r3, r7, #21
+	str	r0, [sp, #8]
+	lsls	r4, r4, r3
+	ldrh	r2, [r6, #698]
+	ldrb	r3, [r1]	@ zero_extendqisi2
+	add	r8, r6, #704
+	ldrh	fp, [r5]
+	subs	r4, r4, #1
+	movs	r5, #0
+	str	r1, [sp, #12]
+.L950:
+	uxth	r1, r5
+	cmp	r2, r1
+	bhi	.L954
+	ldr	r6, .L962+24
+	movs	r5, #0
+	ldr	r7, .L962+28
+	mov	r10, r5
+	ldrb	r4, [r6]	@ zero_extendqisi2
+	ldrh	r3, [r7]
+	smulbb	r4, r4, r3
+	uxth	r4, r4
+.L955:
+	ldr	r3, [sp, #4]
+	uxth	r2, r5
+	ldrh	r3, [r3]
+	cmp	r3, r2
+	bhi	.L960
+	mov	r0, r10
+	add	sp, sp, #280
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L954:
+	ldr	r0, [r8], #4
+	mov	r1, r3
+	str	r2, [sp, #20]
+	str	r3, [sp, #16]
+	lsrs	r0, r0, r7
+	ands	r0, r0, r4
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #16]
+	uxth	r0, r0
+	ldr	r2, [sp, #20]
+	add	lr, r6, #416
+	movs	r1, #0
+.L951:
+	uxth	ip, r1
+	cmp	fp, ip
+	bhi	.L953
+	adds	r5, r5, #1
+	b	.L950
+.L953:
+	ldrh	ip, [lr], #2
+	cmp	r0, ip
+	ittt	eq
+	ldrheq	ip, [r10, r1, lsl #1]
+	addeq	ip, ip, #1
+	strheq	ip, [r10, r1, lsl #1]	@ movhi
+	adds	r1, r1, #1
+	b	.L951
+.L960:
+	ldr	r3, [sp, #8]
+	str	r2, [sp, #20]
+	ldr	r0, [r3]
+	uxth	r3, r5
+	add	fp, r3, #208
+	str	r3, [sp, #16]
+	ldr	r3, [sp, #12]
+	ldrh	r8, [r0, fp, lsl #1]
+	ldrh	r0, [r0, #692]
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	bl	__aeabi_idiv
+	cmp	r0, r8
+	ldr	r3, [sp, #16]
+	ldr	r2, [sp, #20]
+	bne	.L956
+	ldrh	r0, [r7]
+	ldrb	r1, [r6]	@ zero_extendqisi2
+	smulbb	r1, r1, r0
+	add	r0, sp, #24
+	strh	r1, [r0, r3, lsl #1]	@ movhi
+.L956:
+	add	r1, sp, #24
+	ldrh	r3, [r1, r3, lsl #1]
+	cmp	r4, r3
+	bls	.L957
+	cbnz	r3, .L961
+.L959:
+	movw	r3, #65535
+	cmp	r8, r3
+	str	r3, [sp, #16]
+	beq	.L958
+	mov	r0, r8
+	bl	ftl_free_sblk
+	ldr	r3, [sp, #8]
+	ldr	r2, [r3]
+	ldr	r3, [sp, #16]
+	strh	r3, [r2, fp, lsl #1]	@ movhi
+	ldrh	r3, [r2, #688]
+	subs	r3, r3, #1
+	strh	r3, [r2, #688]	@ movhi
+	b	.L958
+.L957:
+	cmp	r3, #0
+	beq	.L959
+.L958:
+	adds	r5, r5, #1
+	b	.L955
+.L961:
+	mov	r10, r2
+	mov	r4, r3
+	b	.L958
+.L963:
+	.align	2
+.L962:
+	.word	.LANCHOR101
+	.word	.LANCHOR102
+	.word	.LC0
+	.word	.LANCHOR71
+	.word	.LANCHOR46
+	.word	.LANCHOR70
+	.word	.LANCHOR69
+	.word	.LANCHOR79
+	.size	pm_free_sblk, .-pm_free_sblk
+	.section	.text.ftl_memcpy,"ax",%progbits
+	.align	1
+	.global	ftl_memcpy
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_memcpy, %function
+ftl_memcpy:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	memcpy
+	.size	ftl_memcpy, .-ftl_memcpy
+	.section	.text.flash_into_data_init,"ax",%progbits
+	.align	1
+	.global	flash_into_data_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_into_data_init, %function
+flash_into_data_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, lr}
+	mov	r2, #2048
+	ldr	r4, .L966
+	movs	r1, #0
+	ldr	r0, [r4]
+	bl	ftl_memset
+	ldr	r0, [r4]
+	movs	r2, #32
+	ldr	r3, .L966+4
+	ldr	r1, .L966+8
+	adds	r0, r0, #80
+	str	r3, [r0, #-80]
+	mov	r3, #2032
+	str	r3, [r0, #-72]
+	movs	r3, #1
+	strh	r3, [r0, #-64]	@ movhi
+	bl	ftl_memcpy
+	ldr	r0, [r4]
+	movs	r2, #32
+	ldr	r1, .L966+12
+	pop	{r4, lr}
+	adds	r0, r0, #48
+	b	ftl_memcpy
+.L967:
+	.align	2
+.L966:
+	.word	.LANCHOR5
+	.word	1398362953
+	.word	.LANCHOR103
+	.word	.LANCHOR19
+	.size	flash_into_data_init, .-flash_into_data_init
+	.section	.text.ftl_memcpy32,"ax",%progbits
+	.align	1
+	.global	ftl_memcpy32
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_memcpy32, %function
+ftl_memcpy32:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	movs	r3, #0
+	push	{r4, lr}
+.L969:
+	cmp	r3, r2
+	bne	.L970
+	pop	{r4, pc}
+.L970:
+	ldr	r4, [r1, r3, lsl #2]
+	str	r4, [r0, r3, lsl #2]
+	adds	r3, r3, #1
+	b	.L969
+	.size	ftl_memcpy32, .-ftl_memcpy32
+	.section	.text.ftl_memcmp,"ax",%progbits
+	.align	1
+	.global	ftl_memcmp
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_memcmp, %function
+ftl_memcmp:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	memcmp
+	.size	ftl_memcmp, .-ftl_memcmp
+	.section	.text.rknand_get_clk_rate,"ax",%progbits
+	.align	1
+	.global	rknand_get_clk_rate
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rknand_get_clk_rate, %function
+rknand_get_clk_rate:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r0, .L973
+	bx	lr
+.L974:
+	.align	2
+.L973:
+	.word	148000000
+	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
+	.section	.text.ftl_malloc,"ax",%progbits
+	.align	1
+	.global	ftl_malloc
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_malloc, %function
+ftl_malloc:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	movs	r1, #0
+	b	kmalloc
+	.size	ftl_malloc, .-ftl_malloc
+	.section	.text.nandc_init,"ax",%progbits
+	.align	1
+	.global	nandc_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	nandc_init, %function
+nandc_init:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	movs	r3, #0
+	push	{r0, r1, r2, lr}
+	str	r3, [sp, #4]
+	movs	r2, #6
+	ldr	r3, .L981
+	ldr	r1, [r0, #352]
+	strb	r2, [r3]
+	ldr	r2, .L981+4
+	str	r0, [r2]
+	ldr	r2, .L981+8
+	cmp	r1, r2
+	ldr	r1, [r0, #128]
+	itt	eq
+	moveq	r2, #8
+	strbeq	r2, [r3]
+	ldr	r2, .L981+12
+	cmp	r1, r2
+	itt	eq
+	moveq	r2, #9
+	strbeq	r2, [r3]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	ldr	r2, .L981+16
+	cmp	r3, #9
+	ldr	r3, .L981+20
+	bne	.L979
+	movs	r1, #1
+	strb	r1, [r3]
+	ldr	r3, [sp, #4]
+	orr	r3, r3, #256
+	str	r3, [sp, #4]
+	ldr	r3, [sp, #4]
+	str	r3, [r0]
+	movs	r3, #0
+	str	r3, [r0, #520]
+	movw	r3, #4225
+	str	r3, [r0, #4]
+	movw	r3, #8321
+	str	r3, [r0, #8]
+	movs	r3, #38
+	str	r2, [r0, #80]
+	str	r3, [r0, #84]
+	movs	r3, #39
+	str	r3, [r0, #84]
+.L980:
+	ldr	r3, .L981+24
+	movs	r2, #1
+	strb	r2, [r3]
+	movs	r3, #0
+	ldr	r2, .L981+28
+	strh	r3, [r2]	@ movhi
+	ldr	r2, .L981+32
+	strb	r3, [r2]
+	add	sp, sp, #12
+	@ sp needed
+	ldr	pc, [sp], #4
+.L979:
+	movs	r1, #0
+	strb	r1, [r3]
+	ldr	r3, [sp, #4]
+	orr	r3, r3, #256
+	str	r3, [sp, #4]
+	ldr	r3, [sp, #4]
+	str	r3, [r0]
+	movw	r3, #4225
+	str	r1, [r0, #336]
+	str	r3, [r0, #4]
+	movw	r3, #8321
+	str	r3, [r0, #344]
+	movs	r3, #38
+	str	r2, [r0, #304]
+	str	r3, [r0, #308]
+	movs	r3, #39
+	str	r3, [r0, #308]
+	mov	r0, #2048
+	bl	ftl_malloc
+	ldr	r3, .L981+36
+	str	r0, [r3]
+	b	.L980
+.L982:
+	.align	2
+.L981:
+	.word	.LANCHOR7
+	.word	.LANCHOR6
+	.word	1446522928
+	.word	1446588464
+	.word	1052675
+	.word	.LANCHOR28
+	.word	.LANCHOR29
+	.word	.LANCHOR31
+	.word	.LANCHOR27
+	.word	.LANCHOR30
+	.size	nandc_init, .-nandc_init
+	.section	.text.buf_init,"ax",%progbits
+	.align	1
+	.global	buf_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	buf_init, %function
+buf_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, lr}
+	movs	r5, #0
+	ldr	r4, .L986
+	mov	r6, r5
+	ldr	r7, .L986+4
+	mov	r8, r4
+.L984:
+	ldrb	r0, [r7]	@ zero_extendqisi2
+	uxtb	r3, r5
+	strb	r6, [r4, #2]
+	adds	r5, r5, #1
+	adds	r2, r3, #1
+	strb	r3, [r4, #1]
+	strb	r2, [r4]
+	adds	r4, r4, #48
+	str	r6, [r4, #-40]
+	lsls	r0, r0, #9
+	bl	ftl_malloc
+	str	r0, [r4, #-44]
+	ldrb	r0, [r7]	@ zero_extendqisi2
+	lsls	r0, r0, #1
+	bl	ftl_malloc
+	cmp	r5, #32
+	str	r0, [r4, #-36]
+	bne	.L984
+	movs	r3, #255
+	strb	r3, [r8, #1488]
+	ldr	r3, .L986+8
+	strb	r6, [r3]
+	ldr	r3, .L986+12
+	strb	r5, [r3]
+	pop	{r4, r5, r6, r7, r8, pc}
+.L987:
+	.align	2
+.L986:
+	.word	.LANCHOR36
+	.word	.LANCHOR45
+	.word	.LANCHOR37
+	.word	.LANCHOR38
+	.size	buf_init, .-buf_init
+	.section	.text.gc_init,"ax",%progbits
+	.align	1
+	.global	gc_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_init, %function
+gc_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	movs	r5, #0
+	ldr	r3, .L989
+	mov	r1, r5
+	mov	r2, #320
+	ldr	r4, .L989+4
+	strb	r5, [r3]
+	ldr	r3, .L989+8
+	mov	r0, r4
+	strb	r5, [r3]
+	bl	ftl_memset
+	movw	r3, #65535
+	str	r5, [r4, #8]
+	strh	r3, [r4]	@ movhi
+	ldr	r3, .L989+12
+	ldr	r5, .L989+16
+	ldrh	r3, [r3]
+	lsrs	r2, r3, #2
+	lsrs	r1, r3, #1
+	strh	r2, [r4, #32]	@ movhi
+	strh	r1, [r4, #34]	@ movhi
+	ldr	r4, .L989+20
+	ldrb	r0, [r4]	@ zero_extendqisi2
+	smulbb	r3, r0, r3
+	subs	r3, r3, #32
+	strh	r3, [r5]	@ movhi
+	ldr	r3, .L989+24
+	ldr	r5, .L989+28
+	strh	r1, [r3]	@ movhi
+	ldr	r3, .L989+32
+	strh	r2, [r3]	@ movhi
+	ldrh	r3, [r5]
+	muls	r0, r3, r0
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L989+36
+	str	r0, [r3]
+	ldrh	r3, [r5]
+	ldrb	r0, [r4]	@ zero_extendqisi2
+	muls	r0, r3, r0
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L989+40
+	str	r0, [r3]
+	ldrh	r3, [r5]
+	ldrb	r0, [r4]	@ zero_extendqisi2
+	muls	r0, r3, r0
+	bl	ftl_malloc
+	ldr	r3, .L989+44
+	str	r0, [r3]
+	ldrh	r3, [r5]
+	ldrb	r0, [r4]	@ zero_extendqisi2
+	muls	r0, r3, r0
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L989+48
+	str	r0, [r3]
+	ldrh	r3, [r5]
+	ldrb	r0, [r4]	@ zero_extendqisi2
+	muls	r0, r3, r0
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L989+52
+	str	r0, [r3]
+	pop	{r3, r4, r5, pc}
+.L990:
+	.align	2
+.L989:
+	.word	.LANCHOR67
+	.word	.LANCHOR59
+	.word	.LANCHOR104
+	.word	.LANCHOR79
+	.word	.LANCHOR105
+	.word	.LANCHOR69
+	.word	.LANCHOR106
+	.word	.LANCHOR68
+	.word	.LANCHOR58
+	.word	.LANCHOR107
+	.word	.LANCHOR108
+	.word	.LANCHOR65
+	.word	.LANCHOR61
+	.word	.LANCHOR109
+	.size	gc_init, .-gc_init
+	.section	.text.ftl_free,"ax",%progbits
+	.align	1
+	.global	ftl_free
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_free, %function
+ftl_free:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	free
+	.size	ftl_free, .-ftl_free
+	.section	.text.js_hash,"ax",%progbits
+	.align	1
+	.global	js_hash
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	js_hash, %function
+js_hash:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L995
+	add	r1, r1, r0
+	push	{r4, lr}
+.L993:
+	cmp	r0, r1
+	bne	.L994
+	mov	r0, r3
+	pop	{r4, pc}
+.L994:
+	lsrs	r2, r3, #2
+	ldrb	r4, [r0], #1	@ zero_extendqisi2
+	add	r2, r2, r3, lsl #5
+	add	r2, r2, r4
+	eors	r3, r3, r2
+	b	.L993
+.L996:
+	.align	2
+.L995:
+	.word	1204201446
+	.size	js_hash, .-js_hash
+	.section	.text.timer_get_time,"ax",%progbits
+	.align	1
+	.global	timer_get_time
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	timer_get_time, %function
+timer_get_time:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	movs	r0, #0
+	bx	lr
+	.size	timer_get_time, .-timer_get_time
+	.section	.text.FlashCs123Init,"ax",%progbits
+	.align	1
+	.global	FlashCs123Init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashCs123Init, %function
+FlashCs123Init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	FlashCs123Init, .-FlashCs123Init
+	.section	.text.rk_nand_de_init,"ax",%progbits
+	.align	1
+	.global	rk_nand_de_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_nand_de_init, %function
+rk_nand_de_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	FlashDeInit
+	.size	rk_nand_de_init, .-rk_nand_de_init
+	.section	.text.rk_ftl_get_capacity,"ax",%progbits
+	.align	1
+	.global	rk_ftl_get_capacity
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_ftl_get_capacity, %function
+rk_ftl_get_capacity:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L1001
+	ldr	r0, [r3]
+	bx	lr
+.L1002:
+	.align	2
+.L1001:
+	.word	.LANCHOR52
+	.size	rk_ftl_get_capacity, .-rk_ftl_get_capacity
+	.section	.text.rknand_print_hex,"ax",%progbits
+	.align	1
+	.global	rknand_print_hex
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rknand_print_hex, %function
+rknand_print_hex:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r5, #0
+	ldr	r7, .L1012
+	mov	fp, r0
+	mov	r6, r1
+	mov	r8, r2
+	mov	r10, r3
+	mov	r4, r5
+.L1004:
+	cmp	r4, r10
+	bne	.L1010
+	ldr	r1, .L1012+4
+	ldr	r0, .L1012+8
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	printf
+.L1010:
+	cbnz	r5, .L1005
+	mov	r2, r4
+	mov	r1, fp
+	ldr	r0, .L1012+12
+	bl	printf
+.L1005:
+	cmp	r8, #4
+	bne	.L1006
+	ldr	r1, [r6, r4, lsl #2]
+.L1011:
+	mov	r0, r7
+	adds	r5, r5, #1
+	bl	printf
+	cmp	r5, #15
+	bls	.L1009
+	movs	r5, #0
+	ldr	r1, .L1012+4
+	ldr	r0, .L1012+8
+	bl	printf
+.L1009:
+	adds	r4, r4, #1
+	b	.L1004
+.L1006:
+	cmp	r8, #2
+	ite	eq
+	ldrsheq	r1, [r6, r4, lsl #1]
+	ldrbne	r1, [r6, r4]	@ zero_extendqisi2
+	b	.L1011
+.L1013:
+	.align	2
+.L1012:
+	.word	.LC30
+	.word	.LC31
+	.word	.LC32
+	.word	.LC29
+	.size	rknand_print_hex, .-rknand_print_hex
+	.section	.text.hynix_get_read_retry_default,"ax",%progbits
+	.align	1
+	.global	hynix_get_read_retry_default
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	hynix_get_read_retry_default, %function
+hynix_get_read_retry_default:
+	@ args = 0, pretend = 0, frame = 56
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1107
+	cmp	r0, #2
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #56
+	mov	r1, #173
+	mov	r2, #174
+	mov	r6, r0
+	ldr	r4, [r3]
+	add	r3, r4, #128
+	strb	r0, [r4, #112]
+	str	r3, [sp, #8]
+	mov	r3, #172
+	strb	r3, [r4, #128]
+	mov	r3, #175
+	strb	r1, [r4, #129]
+	strb	r2, [r4, #130]
+	strb	r3, [r4, #131]
+	bne	.L1015
+	movs	r3, #167
+	movs	r2, #247
+	strb	r3, [r4, #128]
+	ldr	r3, .L1107+4
+	strb	r2, [r3, #17]
+.L1069:
+	mov	r10, #7
+	b	.L1101
+.L1015:
+	cmp	r0, #3
+	bne	.L1017
+	add	r2, r4, #127
+	movs	r3, #176
+.L1018:
+	strb	r3, [r2, #1]!
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	cmp	r3, #184
+	bne	.L1018
+.L1102:
+	mov	r10, #8
+	mov	fp, r10
+.L1016:
+	subs	r3, r6, #1
+	cmp	r3, #1
+	bhi	.L1023
+	movs	r6, #0
+.L1024:
+	ldr	r3, .L1107+8
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	uxtb	r3, r6
+	cmp	r2, r3
+	bhi	.L1029
+.L1030:
+	strb	fp, [r4, #113]
+	strb	r10, [r4, #114]
+	add	sp, sp, #56
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1017:
+	cmp	r0, #4
+	bne	.L1019
+	movs	r0, #204
+	strb	r1, [r4, #133]
+	strb	r0, [r4, #128]
+	movs	r0, #191
+	strb	r0, [r4, #129]
+	movs	r0, #170
+	strb	r0, [r4, #130]
+	movs	r0, #171
+	strb	r0, [r4, #131]
+	movs	r0, #205
+	strb	r0, [r4, #132]
+	strb	r2, [r4, #134]
+	strb	r3, [r4, #135]
+	b	.L1102
+.L1019:
+	cmp	r0, #5
+	bne	.L1020
+	movs	r3, #56
+	mov	r10, #8
+	strb	r3, [r4, #128]
+	movs	r3, #57
+	strb	r3, [r4, #129]
+	movs	r3, #58
+	strb	r3, [r4, #130]
+	movs	r3, #59
+	strb	r3, [r4, #131]
+.L1101:
+	mov	fp, #4
+	b	.L1016
+.L1020:
+	cmp	r0, #6
+	bne	.L1021
+	movs	r3, #14
+	mov	r10, #12
+	strb	r3, [r4, #128]
+	movs	r3, #15
+	strb	r3, [r4, #129]
+	movs	r3, #16
+	strb	r3, [r4, #130]
+	movs	r3, #17
+	strb	r3, [r4, #131]
+	b	.L1101
+.L1021:
+	cmp	r0, #7
+	bne	.L1069
+	add	r2, r4, #127
+	movs	r3, #176
+.L1022:
+	strb	r3, [r2, #1]!
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	cmp	r3, #184
+	bne	.L1022
+	movs	r3, #212
+	mov	r10, #12
+	strb	r3, [r4, #136]
+	movs	r3, #213
+	strb	r3, [r4, #137]
+	mov	fp, #10
+	b	.L1016
+.L1029:
+	ldr	r2, .L1107+12
+	movs	r1, #160
+	add	r8, fp, #-1
+	add	r7, r4, #127
+	ldrb	r3, [r2, r3]	@ zero_extendqisi2
+	mla	r1, r1, r3, r4
+	add	r2, r1, #144
+	ldr	r1, [sp, #8]
+	str	r2, [sp, #4]
+	ldr	r2, .L1107+16
+	uxtab	r8, r1, r8
+	ldr	r5, [r2]
+	ldr	r2, [sp, #4]
+	add	r5, r5, r3, lsl #8
+	subs	r2, r2, #1
+	addw	r3, r5, #2056
+.L1025:
+	str	r2, [sp, #16]
+	movs	r2, #55
+	str	r2, [r3]
+	ldrb	r0, [r7, #1]!	@ zero_extendqisi2
+	str	r3, [sp, #12]
+	str	r0, [r5, #2052]
+	movs	r0, #80
+	bl	timer_delay_ns
+	ldr	r0, [r5, #2048]
+	cmp	r8, r7
+	ldr	r2, [sp, #16]
+	ldr	r3, [sp, #12]
+	strb	r0, [r2, #1]!
+	bne	.L1025
+	ldr	r0, [sp, #4]
+	movs	r2, #0
+	ldr	ip, .L1107+4
+.L1026:
+	movs	r3, #1
+	add	r7, ip, r2
+.L1027:
+	ldrb	r5, [r7, r3, lsl #2]	@ zero_extendqisi2
+	ldrb	lr, [r0]	@ zero_extendqisi2
+	add	r5, r5, lr
+	strb	r5, [r0, r3, lsl #3]
+	adds	r3, r3, #1
+	cmp	r3, #7
+	bne	.L1027
+	adds	r2, r2, #1
+	adds	r0, r0, #1
+	cmp	r2, #4
+	bne	.L1026
+	ldr	r2, [sp, #4]
+	movs	r3, #0
+	adds	r6, r6, #1
+	strb	r3, [r2, #16]
+	strb	r3, [r2, #24]
+	strb	r3, [r2, #32]
+	strb	r3, [r2, #40]
+	strb	r3, [r2, #48]
+	strb	r3, [r2, #41]
+	strb	r3, [r2, #49]
+	b	.L1024
+.L1023:
+	subs	r3, r6, #3
+	cmp	r3, #4
+	bhi	.L1030
+	smulbb	r3, r10, fp
+	asrs	r2, r3, #2
+	lsls	r3, r3, #4
+	str	r3, [sp, #48]
+	lsls	r3, r2, #3
+	str	r2, [sp, #8]
+	str	r3, [sp, #52]
+	lsls	r3, r2, #2
+	str	r3, [sp, #36]
+	movs	r3, #0
+.L1106:
+	str	r3, [sp, #24]
+	ldr	r3, .L1107+8
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	ldrb	r3, [sp, #24]	@ zero_extendqisi2
+	cmp	r2, r3
+	bls	.L1030
+	ldr	r2, .L1107+12
+	movs	r1, #160
+	movs	r7, #255
+	ldrb	r3, [r2, r3]	@ zero_extendqisi2
+	str	r3, [sp, #4]
+	mla	r1, r1, r3, r4
+	ldr	r2, [sp, #4]
+	add	r3, r1, #144
+	str	r3, [sp, #44]
+	ldr	r3, .L1107+16
+	ldr	r3, [r3]
+	str	r3, [sp, #12]
+	add	r5, r3, r2, lsl #8
+	str	r7, [r5, #2056]
+	bl	nandc_wait_flash_ready
+	cmp	r6, #4
+	mov	r3, #54
+	str	r3, [r5, #2056]
+	bne	.L1032
+	movs	r3, #64
+	str	r7, [r5, #2052]
+	str	r3, [r5, #2048]
+	movs	r3, #204
+.L1103:
+	str	r3, [r5, #2052]
+	movs	r3, #77
+	b	.L1104
+.L1032:
+	subs	r3, r6, #5
+	cmp	r3, #1
+	bhi	.L1034
+	ldrb	r3, [r4, #128]	@ zero_extendqisi2
+	str	r3, [r5, #2052]
+	movs	r3, #82
+.L1104:
+	str	r3, [r5, #2048]
+	cmp	r6, #6
+	ldr	r3, [sp, #12]
+	ldr	r2, [sp, #4]
+	add	r5, r3, r2, lsl #8
+	mov	r3, #22
+	ldr	r2, [sp, #4]
+	str	r3, [r5, #2056]
+	mov	r3, #23
+	str	r3, [r5, #2056]
+	mov	r3, #4
+	str	r3, [r5, #2056]
+	mov	r3, #25
+	str	r3, [r5, #2056]
+	mov	r3, #0
+	str	r3, [r5, #2056]
+	str	r3, [r5, #2052]
+	str	r3, [r5, #2052]
+	it	eq
+	moveq	r3, #31
+	str	r3, [r5, #2052]
+	movs	r3, #2
+	str	r3, [r5, #2052]
+	movs	r3, #0
+	str	r3, [r5, #2052]
+	ldr	r3, [sp, #12]
+	add	r3, r3, r2, lsl #8
+	movs	r2, #48
+	str	r2, [r3, #2056]
+	bl	nandc_wait_flash_ready
+	subs	r3, r6, #5
+	cmp	r3, #1
+	str	r3, [sp, #28]
+	bls	.L1070
+	cmp	r6, #7
+	ite	ne
+	movne	r2, #2
+	moveq	r2, #32
+.L1037:
+	ldr	r3, .L1107+20
+	subs	r2, r2, #1
+	ldr	r3, [r3]
+	subs	r1, r3, #1
+	uxtab	r2, r3, r2
+	mov	r0, r1
+.L1038:
+	ldr	r7, [r5, #2048]
+	strb	r7, [r0, #1]!
+	cmp	r0, r2
+	bne	.L1038
+	cmp	r6, #7
+	bne	.L1039
+	movs	r2, #0
+.L1041:
+	ldrb	r0, [r3, r2, lsl #2]	@ zero_extendqisi2
+	uxtb	r1, r2
+	cmp	r0, #12
+	beq	.L1040
+	add	r0, r3, r2, lsl #2
+	ldrb	r0, [r0, #1]	@ zero_extendqisi2
+	cmp	r0, #10
+	beq	.L1040
+	adds	r2, r2, #1
+	cmp	r2, #8
+	bne	.L1041
+.L1042:
+	movs	r1, #0
+	ldr	r0, .L1107+24
+	bl	printf
+.L1044:
+	b	.L1044
+.L1034:
+	movs	r3, #174
+	str	r3, [r5, #2052]
+	movs	r3, #0
+	str	r3, [r5, #2048]
+	movs	r3, #176
+	b	.L1103
+.L1070:
+	movs	r2, #16
+	b	.L1037
+.L1108:
+	.align	2
+.L1107:
+	.word	.LANCHOR5
+	.word	.LANCHOR110
+	.word	.LANCHOR8
+	.word	.LANCHOR10
+	.word	.LANCHOR6
+	.word	.LANCHOR111
+	.word	.LC33
+.L1040:
+	cmp	r1, #6
+	bhi	.L1042
+.L1043:
+	ldr	r3, .L1109
+	ldr	r8, [r3]
+	mov	r3, r8
+.L1048:
+	ldr	r1, [sp, #48]
+	sub	r2, r3, r8
+	cmp	r1, r2
+	bgt	.L1049
+	ldr	r3, .L1109
+	ldr	r1, [r3]
+	ldr	r3, [sp, #36]
+	adds	r0, r1, r3
+	movs	r3, #8
+.L1051:
+	mov	ip, r0
+	movs	r7, #0
+.L1050:
+	ldr	r2, [ip]
+	adds	r7, r7, #1
+	mvns	r2, r2
+	str	r2, [ip], #4
+	ldr	r2, [sp, #8]
+	cmp	r2, r7
+	bgt	.L1050
+	ldr	r2, [sp, #52]
+	subs	r3, r3, #1
+	add	r0, r0, r2
+	bne	.L1051
+	mov	ip, r1
+	str	r3, [sp, #20]
+.L1052:
+	movs	r0, #0
+	mov	r2, r0
+.L1056:
+	movs	r3, #1
+	mov	lr, #0
+	lsl	r7, r3, r2
+	movs	r3, #16
+	str	ip, [sp, #16]
+	str	r7, [sp, #32]
+	str	r3, [sp, #40]
+.L1054:
+	ldr	r3, [sp, #32]
+	mov	r7, r3
+	ldr	r3, [sp, #16]
+	ldr	r3, [r3]
+	bics	r3, r7, r3
+	ldr	r3, [sp, #36]
+	ldr	r7, [sp, #16]
+	it	eq
+	addeq	lr, lr, #1
+	add	r7, r7, r3
+	ldr	r3, [sp, #40]
+	str	r7, [sp, #16]
+	subs	r3, r3, #1
+	str	r3, [sp, #40]
+	bne	.L1054
+	cmp	lr, #8
+	add	r2, r2, #1
+	itt	hi
+	ldrhi	r3, [sp, #32]
+	orrhi	r0, r0, r3
+	cmp	r2, #32
+	bne	.L1056
+	ldr	r3, [sp, #20]
+	str	r0, [ip], #4
+	adds	r3, r3, #1
+	str	r3, [sp, #20]
+	ldr	r2, [sp, #20]
+	ldr	r3, [sp, #8]
+	cmp	r3, r2
+	bgt	.L1052
+	subs	r2, r1, #4
+	add	r0, r1, #28
+	movs	r3, #0
+.L1059:
+	ldr	r7, [r2, #4]!
+	cbnz	r7, .L1058
+	adds	r3, r3, #1
+.L1058:
+	cmp	r0, r2
+	bne	.L1059
+	cmp	r3, #7
+	ble	.L1060
+	ldr	r0, .L1109+4
+	mov	r3, #1024
+	movs	r2, #1
+	bl	rknand_print_hex
+	movs	r1, #0
+	ldr	r0, .L1109+8
+	bl	printf
+.L1061:
+	b	.L1061
+.L1039:
+	cmp	r6, #6
+	bne	.L1043
+	adds	r3, r3, #7
+.L1045:
+	ldrb	r2, [r1, #1]!	@ zero_extendqisi2
+	cmp	r2, #12
+	beq	.L1043
+	ldrb	r2, [r1, #8]	@ zero_extendqisi2
+	cmp	r2, #4
+	beq	.L1043
+	cmp	r1, r3
+	bne	.L1045
+	movs	r1, #0
+	ldr	r0, .L1109+8
+	bl	printf
+.L1047:
+	b	.L1047
+.L1049:
+	ldr	r2, [r5, #2048]
+	strb	r2, [r3], #1
+	b	.L1048
+.L1060:
+	cmp	r6, #6
+	beq	.L1072
+	cmp	r6, #7
+	ite	ne
+	movne	lr, #8
+	moveq	lr, #10
+.L1062:
+	add	r3, fp, #-1
+	ldr	r1, [sp, #44]
+	uxtb	r3, r3
+	movs	r0, #0
+	adds	r3, r3, #1
+.L1063:
+	mov	ip, r1
+	mov	r2, r8
+.L1064:
+	ldrb	r7, [r2], #1	@ zero_extendqisi2
+	strb	r7, [ip], #1
+	sub	r7, r2, r8
+	uxtb	r7, r7
+	cmp	fp, r7
+	bhi	.L1064
+	adds	r0, r0, #1
+	add	r8, r8, r3
+	cmp	r10, r0
+	add	r1, r1, lr
+	bgt	.L1063
+	ldr	r3, [sp, #12]
+	mov	r8, #255
+	ldr	r2, [sp, #4]
+	add	r7, r3, r2, lsl #8
+	str	r8, [r7, #2056]
+	bl	nandc_wait_flash_ready
+	ldr	r3, [sp, #28]
+	cmp	r3, #1
+	bhi	.L1066
+	movs	r3, #54
+	movs	r2, #22
+	str	r3, [r7, #2056]
+	ldrb	r3, [r4, #128]	@ zero_extendqisi2
+	str	r3, [r5, #2052]
+	movs	r3, #0
+	str	r3, [r5, #2048]
+	str	r2, [r7, #2056]
+	str	r3, [r7, #2056]
+	str	r3, [r5, #2052]
+	str	r3, [r5, #2052]
+	movs	r3, #48
+	str	r8, [r5, #2052]
+	str	r8, [r5, #2052]
+	str	r8, [r5, #2052]
+.L1105:
+	str	r3, [r7, #2056]
+	bl	nandc_wait_flash_ready
+	ldr	r3, [sp, #24]
+	adds	r3, r3, #1
+	b	.L1106
+.L1072:
+	mov	lr, #4
+	b	.L1062
+.L1066:
+	movs	r3, #56
+	b	.L1105
+.L1110:
+	.align	2
+.L1109:
+	.word	.LANCHOR111
+	.word	.LC34
+	.word	.LC33
+	.size	hynix_get_read_retry_default, .-hynix_get_read_retry_default
+	.section	.text.flash_get_read_retry_tbl,"ax",%progbits
+	.align	1
+	.global	flash_get_read_retry_tbl
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_get_read_retry_tbl, %function
+flash_get_read_retry_tbl:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L1113
+	ldrb	r0, [r3, #19]	@ zero_extendqisi2
+	subs	r3, r0, #1
+	cmp	r3, #6
+	bhi	.L1111
+	b	hynix_get_read_retry_default
+.L1111:
+	bx	lr
+.L1114:
+	.align	2
+.L1113:
+	.word	.LANCHOR19
+	.size	flash_get_read_retry_tbl, .-flash_get_read_retry_tbl
+	.section	.text.nandc_xfer_done,"ax",%progbits
+	.align	1
+	.global	nandc_xfer_done
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	nandc_xfer_done, %function
+nandc_xfer_done:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1149
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	ldr	r4, .L1149+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	ldr	r6, [r4]
+	cmp	r3, #9
+	bne	.L1116
+	ldr	r3, [r6, #16]
+	str	r3, [sp]
+	ldr	r5, [r6, #48]
+	ubfx	r5, r5, #1, #1
+	cbnz	r5, .L1117
+	ldr	r7, .L1149+8
+	ldr	r8, .L1149+24
+.L1118:
+	ldr	r3, [sp]
+	lsls	r0, r3, #11
+	bmi	.L1121
+	ldr	r3, [r4]
+	adds	r5, r5, #1
+	ldr	r3, [r3, #16]
+	str	r3, [sp]
+	bics	r3, r5, #-16777216
+	bne	.L1118
+	ldr	r2, [sp]
+	mov	r1, r5
+	ldr	r3, [r6, #64]
+	mov	r0, r7
+	ubfx	r3, r3, #16, #6
+	bl	printf
+	mov	r3, #256
+	movs	r2, #4
+	ldr	r1, [r4]
+	mov	r0, r8
+	bl	rknand_print_hex
+	b	.L1118
+.L1117:
+	ldr	r7, .L1149+12
+	movs	r5, #0
+	ldr	r8, .L1149+24
+.L1119:
+	ldr	r2, [r6, #64]
+	ldr	r3, [sp]
+	ubfx	r2, r2, #16, #6
+	ubfx	r3, r3, #22, #6
+	cmp	r2, r3
+	blt	.L1123
+.L1121:
+	ldr	r3, .L1149+16
+	movs	r2, #0
+	str	r2, [r3, #20]
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1123:
+	ldr	r3, [r4]
+	ldr	r3, [r3]
+	str	r3, [sp, #4]
+	ldr	r3, [sp, #4]
+	lsls	r2, r3, #18
+	bpl	.L1120
+	ldr	r3, [sp, #4]
+	lsls	r3, r3, #14
+	bmi	.L1121
+.L1120:
+	adds	r5, r5, #1
+	bics	r3, r5, #-16777216
+	bne	.L1119
+	ldr	r2, [r6, #64]
+	mov	r1, r5
+	ldr	r3, [sp]
+	mov	r0, r7
+	ubfx	r2, r2, #16, #5
+	ubfx	r3, r3, #22, #6
+	bl	printf
+	mov	r3, #256
+	movs	r2, #4
+	ldr	r1, [r4]
+	mov	r0, r8
+	bl	rknand_print_hex
+	b	.L1119
+.L1116:
+	ldr	r3, [r6, #8]
+	str	r3, [sp]
+	ldr	r5, [r6, #16]
+	ubfx	r5, r5, #1, #1
+	cbnz	r5, .L1127
+	ldr	r7, .L1149+8
+	ldr	r8, .L1149+24
+.L1128:
+	ldr	r3, [sp]
+	lsls	r3, r3, #11
+	bmi	.L1121
+	ldr	r3, [r4]
+	adds	r5, r5, #1
+	ldr	r3, [r3, #8]
+	str	r3, [sp]
+	bics	r3, r5, #-16777216
+	bne	.L1128
+	ldr	r2, [sp]
+	mov	r1, r5
+	ldr	r3, [r6, #28]
+	mov	r0, r7
+	ubfx	r3, r3, #16, #5
+	bl	printf
+	mov	r3, #256
+	movs	r2, #4
+	ldr	r1, [r4]
+	mov	r0, r8
+	bl	rknand_print_hex
+	b	.L1128
+.L1127:
+	ldr	r7, .L1149+12
+	movs	r5, #0
+	ldr	r8, .L1149+24
+.L1129:
+	ldr	r2, [r6, #28]
+	ldr	r3, [sp]
+	ubfx	r2, r2, #16, #5
+	ubfx	r3, r3, #22, #6
+	cmp	r2, r3
+	bge	.L1121
+	ldr	r3, [r4]
+	ldr	r3, [r3]
+	str	r3, [sp, #4]
+	ldr	r3, [sp, #4]
+	lsls	r1, r3, #18
+	bpl	.L1130
+	ldr	r3, [sp, #4]
+	lsls	r2, r3, #14
+	bpl	.L1130
+	ldr	r1, [sp, #4]
+	ldr	r0, .L1149+20
+	bl	printf
+	b	.L1121
+.L1130:
+	adds	r5, r5, #1
+	bics	r3, r5, #-16777216
+	bne	.L1129
+	ldr	r2, [r6, #28]
+	mov	r1, r5
+	ldr	r3, [sp]
+	mov	r0, r7
+	ubfx	r2, r2, #16, #5
+	ubfx	r3, r3, #22, #6
+	bl	printf
+	mov	r3, #256
+	movs	r2, #4
+	ldr	r1, [r4]
+	mov	r0, r8
+	bl	rknand_print_hex
+	b	.L1129
+.L1150:
+	.align	2
+.L1149:
+	.word	.LANCHOR7
+	.word	.LANCHOR6
+	.word	.LC37
+	.word	.LC35
+	.word	.LANCHOR30
+	.word	.LC38
+	.word	.LC36
+	.size	nandc_xfer_done, .-nandc_xfer_done
+	.section	.text.nandc_xfer,"ax",%progbits
+	.align	1
+	.global	nandc_xfer
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	nandc_xfer, %function
+nandc_xfer:
+	@ args = 4, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	mov	r8, r1
+	ldr	r4, [sp, #32]
+	mov	r6, r2
+	mov	r5, r3
+	mov	r1, r6
+	mov	r2, r5
+	mov	r0, r8
+	mov	r3, r4
+	bl	nandc_xfer_start
+	bl	nandc_xfer_done
+	cmp	r8, #0
+	bne	.L1169
+	ldr	r3, .L1182
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #9
+	bne	.L1153
+	ldr	r5, .L1182+4
+	lsrs	r6, r6, #2
+	movs	r2, #1
+	mov	r1, r8
+	mov	r0, r8
+	ldr	r4, [r5]
+.L1154:
+	cmp	r1, r6
+	bcc	.L1158
+	ldr	r4, [r4]
+	cmp	r2, #0
+	it	ne
+	movne	r0, #512
+	and	r3, r4, #139264
+	cmp	r3, #139264
+	bne	.L1152
+	mov	r1, r4
+	ldr	r0, .L1182+8
+	bl	printf
+	ldr	r3, [r5]
+	orr	r4, r4, #131072
+.L1181:
+	mov	r0, #-1
+	str	r4, [r3]
+.L1152:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1158:
+	add	r3, r1, #84
+	ldr	r3, [r4, r3, lsl #2]
+	str	r3, [sp, #4]
+	ldr	r7, [sp, #4]
+	ldr	r3, [sp, #4]
+	ubfx	r3, r3, #26, #1
+	and	r3, r3, r7, lsr #10
+	ands	r2, r2, r3
+	ldr	r3, [sp, #4]
+	lsls	r3, r3, #29
+	bmi	.L1171
+	ldr	r3, [sp, #4]
+	lsls	r7, r3, #13
+	bmi	.L1171
+	ldr	r7, [sp, #4]
+	ldr	r3, [sp, #4]
+	ubfx	r7, r7, #3, #7
+	ubfx	r3, r3, #19, #7
+	cmp	r7, r3
+	ldr	r3, [sp, #4]
+	ite	gt
+	ubfxgt	r3, r3, #3, #7
+	ubfxle	r3, r3, #19, #7
+	cmp	r0, r3
+	it	cc
+	movcc	r0, r3
+.L1155:
+	adds	r1, r1, #1
+	b	.L1154
+.L1171:
+	mov	r0, #-1
+	b	.L1155
+.L1153:
+	ldr	r3, .L1182+12
+	mov	r1, r8
+	mov	r0, r8
+	ldr	r8, .L1182+20
+	lsrs	r7, r6, #1
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #25
+	mov	r3, r4
+	ite	cc
+	movcc	lr, #64
+	movcs	lr, #128
+.L1161:
+	cmp	r0, r7
+	add	ip, lr, r1
+	add	r3, r3, #4
+	bcc	.L1162
+	lsrs	r7, r6, #2
+	ldr	r6, .L1182+4
+	movs	r2, #0
+	mov	r0, r2
+	ldr	r1, [r6]
+.L1163:
+	cmp	r2, r7
+	bcc	.L1167
+	movs	r3, #0
+	str	r3, [r1, #16]
+	adds	r3, r0, #1
+	beq	.L1168
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	bne	.L1168
+	ldr	r3, [r4, #4]
+	adds	r3, r3, #1
+	bne	.L1168
+	ldr	r3, [r5]
+	adds	r3, r3, #1
+	it	eq
+	moveq	r0, #512
+.L1168:
+	ldr	r4, [r1]
+	and	r3, r4, #139264
+	cmp	r3, #139264
+	bne	.L1152
+	mov	r1, r4
+	ldr	r0, .L1182+16
+	bl	printf
+	orr	r4, r4, #131072
+	ldr	r3, [r6]
+	b	.L1181
+.L1162:
+	ldr	r2, [r8]
+	bic	r1, r1, #3
+	adds	r0, r0, #1
+	ldr	r2, [r2, r1]
+	strb	r2, [r3, #-4]
+	lsrs	r1, r2, #8
+	strb	r1, [r3, #-3]
+	lsrs	r1, r2, #16
+	lsrs	r2, r2, #24
+	strb	r1, [r3, #-2]
+	mov	r1, ip
+	strb	r2, [r3, #-1]
+	b	.L1161
+.L1167:
+	add	r3, r2, #8
+	ldr	r3, [r1, r3, lsl #2]
+	str	r3, [sp, #4]
+	ldr	r3, [sp, #4]
+	lsls	r3, r3, #29
+	bmi	.L1174
+	ldr	r3, [sp, #4]
+	lsls	r3, r3, #16
+	bmi	.L1174
+	ldr	r3, [sp, #4]
+	ubfx	ip, r3, #3, #5
+	ldr	r3, [sp, #4]
+	ubfx	r8, r3, #27, #1
+	ldr	r3, [sp, #4]
+	ldr	lr, [sp, #4]
+	orr	ip, ip, r8, lsl #5
+	ubfx	r3, r3, #16, #5
+	ubfx	lr, lr, #29, #1
+	orr	r3, r3, lr, lsl #5
+	cmp	ip, r3
+	ldr	r3, [sp, #4]
+	itete	hi
+	ldrhi	ip, [sp, #4]
+	ldrls	ip, [sp, #4]
+	ubfxhi	r3, r3, #3, #5
+	ubfxls	r3, r3, #16, #5
+	ite	hi
+	ubfxhi	ip, ip, #27, #1
+	ubfxls	ip, ip, #29, #1
+	orr	r3, r3, ip, lsl #5
+	cmp	r0, r3
+	it	cc
+	movcc	r0, r3
+.L1164:
+	adds	r2, r2, #1
+	b	.L1163
+.L1174:
+	mov	r0, #-1
+	b	.L1164
+.L1169:
+	movs	r0, #0
+	b	.L1152
+.L1183:
+	.align	2
+.L1182:
+	.word	.LANCHOR7
+	.word	.LANCHOR6
+	.word	.LC39
+	.word	.LANCHOR27
+	.word	.LC40
+	.word	.LANCHOR30
+	.size	nandc_xfer, .-nandc_xfer
+	.section	.text.flash_read_page,"ax",%progbits
+	.align	1
+	.global	flash_read_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_read_page, %function
+flash_read_page:
+	@ args = 4, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #24
+	str	r3, [sp, #16]
+	mov	r5, r0
+	mov	r8, r1
+	ubfx	r4, r1, #0, #21
+	ldr	r3, .L1200
+	ubfx	r6, r1, #24, #2
+	str	r2, [sp, #12]
+	ldr	r7, [r3]
+	ldr	r3, .L1200+4
+	ldr	r3, [r3]
+	lsls	r3, r3, #27
+	bpl	.L1185
+	mov	r3, r1
+	mov	r2, r6
+	mov	r1, r0
+	ldr	r0, .L1200+8
+	bl	printf
+.L1185:
+	bl	nandc_wait_flash_ready
+	mov	r0, r5
+	lsl	r10, r5, #8
+	bl	nandc_cs
+	ldr	r1, .L1200+12
+	cbnz	r6, .L1186
+	mov	r0, r5
+	str	r1, [sp, #20]
+	bl	flash_enter_slc_mode
+.L1198:
+	ldr	r1, [sp, #20]
+	b	.L1187
+.L1186:
+	ldr	r3, [r1]
+	ldrb	r3, [r3, #12]	@ zero_extendqisi2
+	cmp	r3, #3
+	bne	.L1188
+	add	r3, r7, r10
+	str	r6, [r3, #2056]
+.L1187:
+	add	fp, r7, r10
+	movs	r2, #0
+	str	r2, [fp, #2056]
+	str	r2, [fp, #2052]
+	str	r2, [fp, #2052]
+	uxtb	r2, r8
+	str	r2, [fp, #2052]
+	lsrs	r2, r4, #8
+	str	r2, [fp, #2052]
+	lsrs	r2, r4, #16
+	str	r2, [fp, #2052]
+	movs	r2, #48
+	str	r2, [fp, #2056]
+	ldr	r2, [r1]
+	ldrb	r2, [r2, #12]	@ zero_extendqisi2
+	cmp	r2, #3
+	bne	.L1189
+	cbz	r6, .L1189
+	add	r4, r4, r4, lsl #1
+	subs	r0, r4, #1
+	add	r0, r0, r6
+.L1199:
+	bl	nandc_set_seed
+	add	r7, r7, r10
+	bl	nandc_wait_flash_ready
+	movs	r1, #0
+	movs	r2, #5
+	movs	r3, #224
+	str	r2, [r7, #2056]
+	str	r1, [fp, #2052]
+	mov	r0, r5
+	str	r1, [fp, #2052]
+	str	r3, [r7, #2056]
+	ldr	r3, [sp, #16]
+	ldrb	r2, [sp, #56]	@ zero_extendqisi2
+	str	r3, [sp]
+	ldr	r3, [sp, #12]
+	bl	nandc_xfer
+	mov	r4, r0
+	cbnz	r6, .L1191
+	mov	r0, r5
+	bl	flash_exit_slc_mode
+.L1191:
+	movs	r0, #0
+	bl	nandc_de_cs
+	mov	r0, r4
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1188:
+	mov	r0, r5
+	str	r1, [sp, #20]
+	bl	flash_exit_slc_mode
+	b	.L1198
+.L1189:
+	mov	r0, r4
+	b	.L1199
+.L1201:
+	.align	2
+.L1200:
+	.word	.LANCHOR6
+	.word	.LANCHOR22
+	.word	.LC41
+	.word	.LANCHOR34
+	.size	flash_read_page, .-flash_read_page
+	.section	.text.micron_read_retrial,"ax",%progbits
+	.align	1
+	.global	micron_read_retrial
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	micron_read_retrial, %function
+micron_read_retrial:
+	@ args = 8, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r8, r0
+	str	r3, [sp, #12]
+	mov	r7, r2
+	movs	r5, #0
+	mov	r4, #-1
+	ldr	r3, .L1215
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	asr	r10, r3, #2
+	bl	nandc_wait_flash_ready
+	ldr	r3, .L1215+4
+	ldr	r3, [r3]
+	str	r3, [sp, #8]
+.L1203:
+	ldr	r3, .L1215+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r5, r3
+	bcc	.L1207
+.L1206:
+	ldr	r3, [sp, #8]
+	movs	r0, #200
+	add	r8, r3, r8, lsl #8
+	movs	r3, #239
+	str	r3, [r8, #2056]
+	movs	r3, #137
+	str	r3, [r8, #2052]
+	bl	timer_delay_ns
+	cmp	r4, r10
+	mov	r3, #0
+	str	r3, [r8, #2048]
+	str	r3, [r8, #2048]
+	str	r3, [r8, #2048]
+	str	r3, [r8, #2048]
+	bcc	.L1202
+	adds	r3, r4, #1
+	mov	r2, r7
+	it	ne
+	movne	r4, #256
+	mov	r3, r5
+	str	r4, [sp]
+	mov	r1, r5
+	ldr	r0, .L1215+12
+	bl	printf
+.L1202:
+	mov	r0, r4
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1207:
+	ldr	r3, [sp, #8]
+	movs	r0, #200
+	add	fp, r5, #1
+	add	r1, r3, r8, lsl #8
+	movs	r3, #239
+	str	r3, [r1, #2056]
+	movs	r3, #137
+	str	r3, [r1, #2052]
+	bl	timer_delay_ns
+	movs	r3, #0
+	str	fp, [r1, #2048]
+	str	r3, [r1, #2048]
+	mov	r0, r8
+	str	r3, [r1, #2048]
+	str	r3, [r1, #2048]
+	mov	r1, r7
+	ldr	r3, [sp, #52]
+	ldr	r2, [sp, #12]
+	str	r3, [sp]
+	ldr	r3, [sp, #48]
+	bl	flash_read_page
+	mov	r2, r7
+	mov	r6, r0
+	str	r4, [sp]
+	mov	r3, r5
+	mov	r1, r5
+	ldr	r0, .L1215+16
+	bl	printf
+	adds	r2, r6, #1
+	beq	.L1204
+	ldr	r3, .L1215+20
+	cmp	r4, #-1
+	it	eq
+	moveq	r4, r6
+	cmp	r6, r10
+	ldr	r3, [r3]
+	str	r3, [sp, #12]
+	ldr	r3, .L1215+24
+	ldr	r3, [r3]
+	str	r3, [sp, #48]
+	bcc	.L1210
+.L1204:
+	mov	r5, fp
+	b	.L1203
+.L1210:
+	mov	r4, r6
+	b	.L1206
+.L1216:
+	.align	2
+.L1215:
+	.word	.LANCHOR27
+	.word	.LANCHOR6
+	.word	.LANCHOR113
+	.word	.LC43
+	.word	.LC42
+	.word	.LANCHOR111
+	.word	.LANCHOR112
+	.size	micron_read_retrial, .-micron_read_retrial
+	.section	.text.toshiba_3d_read_retrial,"ax",%progbits
+	.align	1
+	.global	toshiba_3d_read_retrial
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	toshiba_3d_read_retrial, %function
+toshiba_3d_read_retrial:
+	@ args = 8, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #24
+	mov	r10, r0
+	mov	r8, r2
+	mov	r4, r1
+	add	r7, r10, #8
+	str	r3, [sp, #12]
+	bl	nandc_wait_flash_ready
+	ldr	r3, .L1252
+	ldr	r6, [r3]
+	ldr	r3, .L1252+4
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	add	r7, r6, r7, lsl #8
+	cmp	r2, #36
+	ite	ne
+	movne	r2, #56
+	moveq	r2, #46
+	str	r2, [sp, #20]
+	ite	ne
+	movne	r2, #10
+	moveq	r2, #26
+	str	r2, [sp, #16]
+	cmp	r4, #0
+	bne	.L1219
+	mov	r4, #-1
+	movs	r5, #1
+	str	r3, [sp, #20]
+.L1225:
+	ldr	r3, [sp, #20]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #36
+	bne	.L1220
+	movs	r2, #0
+	mov	r1, r5
+	mov	r0, r7
+	bl	toshiba_tlc_set_rr_para
+	add	r3, r6, r10, lsl #8
+	movs	r2, #93
+	str	r2, [r3, #2056]
+.L1221:
+	ldr	r3, [sp, #60]
+	mov	r1, r8
+	ldr	r2, [sp, #12]
+	mov	r0, r10
+	str	r3, [sp]
+	ldr	r3, [sp, #56]
+	bl	flash_read_page
+	mov	r2, r8
+	mov	fp, r0
+	mov	r3, r0
+	mov	r1, r5
+	ldr	r0, .L1252+8
+	bl	printf
+	cmp	fp, #-1
+	beq	.L1222
+	ldr	r3, .L1252+12
+	cmp	r4, #-1
+	it	eq
+	moveq	r4, fp
+	ldr	r3, [r3]
+	str	r3, [sp, #12]
+	ldr	r3, .L1252+16
+	ldr	r3, [r3]
+	str	r3, [sp, #56]
+	ldr	r3, .L1252+20
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	fp, r3, asr #2
+	bcc	.L1238
+.L1222:
+	ldr	r3, [sp, #16]
+	adds	r5, r5, #1
+	cmp	r3, r5
+	bne	.L1225
+.L1224:
+	ldr	r3, .L1252+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #36
+	bne	.L1226
+	movs	r2, #0
+.L1251:
+	movs	r1, #0
+	mov	r0, r7
+	bl	toshiba_tlc_set_rr_para
+	b	.L1227
+.L1220:
+	uxtb	r1, r5
+	mov	r0, r7
+	bl	toshiba_3d_set_slc_rr_para
+	b	.L1221
+.L1238:
+	mov	r4, fp
+	b	.L1224
+.L1226:
+	movs	r1, #0
+	mov	r0, r7
+	bl	toshiba_3d_set_slc_rr_para
+.L1227:
+	ldr	r3, .L1252+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #36
+	bne	.L1235
+	add	r6, r6, r10, lsl #8
+	movs	r3, #85
+	str	r3, [r6, #2056]
+	movs	r3, #0
+	str	r3, [r6, #2052]
+	str	r3, [r6, #2048]
+	movs	r3, #255
+	str	r3, [r6, #2056]
+.L1235:
+	mov	r3, r5
+	str	r4, [sp]
+	mov	r2, r8
+	mov	r1, r5
+	ldr	r0, .L1252+24
+	bl	printf
+	ldr	r3, .L1252+20
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r4, r3, asr #2
+	bcc	.L1236
+	adds	r3, r4, #1
+	it	ne
+	movne	r4, #256
+.L1236:
+	bl	nandc_wait_flash_ready
+	mov	r0, r4
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1219:
+	orr	r8, r8, r4, lsl #24
+	movs	r5, #1
+	mov	r4, #-1
+	str	r3, [sp, #16]
+.L1233:
+	ldr	r3, [sp, #16]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #36
+	bne	.L1228
+	movs	r2, #1
+	mov	r1, r5
+	mov	r0, r7
+	bl	toshiba_tlc_set_rr_para
+	add	r3, r6, r10, lsl #8
+	movs	r2, #93
+.L1250:
+	str	r2, [r3, #2056]
+	mov	r1, r8
+	ldr	r3, [sp, #60]
+	mov	r0, r10
+	ldr	r2, [sp, #12]
+	str	r3, [sp]
+	ldr	r3, [sp, #56]
+	bl	flash_read_page
+	mov	r2, r8
+	mov	fp, r0
+	mov	r3, r0
+	mov	r1, r5
+	ldr	r0, .L1252+28
+	bl	printf
+	cmp	fp, #-1
+	beq	.L1230
+	ldr	r3, .L1252+12
+	cmp	r4, #-1
+	it	eq
+	moveq	r4, fp
+	ldr	r3, [r3]
+	str	r3, [sp, #12]
+	ldr	r3, .L1252+16
+	ldr	r3, [r3]
+	str	r3, [sp, #56]
+	ldr	r3, .L1252+20
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	fp, r3, asr #2
+	bcc	.L1239
+.L1230:
+	ldr	r3, [sp, #20]
+	adds	r5, r5, #1
+	cmp	r3, r5
+	bne	.L1233
+.L1232:
+	ldr	r3, .L1252+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #36
+	bne	.L1234
+	movs	r2, #1
+	b	.L1251
+.L1228:
+	uxtb	r1, r5
+	mov	r0, r7
+	bl	toshiba_3d_set_tlc_rr_para
+	add	r3, r6, r10, lsl #8
+	movs	r2, #38
+	b	.L1250
+.L1239:
+	mov	r4, fp
+	b	.L1232
+.L1234:
+	movs	r1, #0
+	mov	r0, r7
+	bl	toshiba_3d_set_tlc_rr_para
+	b	.L1227
+.L1253:
+	.align	2
+.L1252:
+	.word	.LANCHOR6
+	.word	.LANCHOR1
+	.word	.LC44
+	.word	.LANCHOR111
+	.word	.LANCHOR112
+	.word	.LANCHOR27
+	.word	.LC46
+	.word	.LC45
+	.size	toshiba_3d_read_retrial, .-toshiba_3d_read_retrial
+	.section	.text.toshiba_read_retrial,"ax",%progbits
+	.align	1
+	.global	toshiba_read_retrial
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	toshiba_read_retrial, %function
+toshiba_read_retrial:
+	@ args = 8, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #24
+	mov	r7, r0
+	str	r2, [sp, #12]
+	add	r10, r7, #8
+	str	r3, [sp, #16]
+	bl	nandc_wait_flash_ready
+	ldr	r3, .L1281
+	ldr	r2, .L1281+4
+	ldr	r6, [r3]
+	ldrb	r3, [r2]	@ zero_extendqisi2
+	str	r2, [sp, #20]
+	subs	r3, r3, #67
+	add	r10, r6, r10, lsl #8
+	cmp	r3, #1
+	bls	.L1272
+	ldr	r3, .L1281+8
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	cbz	r5, .L1256
+	movs	r5, #1
+	movs	r0, #1
+	bl	nandc_set_if_mode
+.L1256:
+	add	r3, r6, r7, lsl #8
+	movs	r2, #92
+	str	r2, [r3, #2056]
+	movs	r2, #197
+	str	r2, [r3, #2056]
+.L1255:
+	mov	r8, #1
+	mov	fp, #-1
+.L1257:
+	ldr	r3, .L1281+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	cmp	r8, r3
+	bcc	.L1266
+	mov	r4, fp
+.L1265:
+	ldr	r3, .L1281+4
+	movs	r1, #0
+	mov	r0, r10
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	subs	r3, r3, #67
+	cmp	r3, #1
+	bhi	.L1267
+	bl	sandisk_set_rr_para
+.L1268:
+	add	r6, r6, r7, lsl #8
+	movs	r3, #255
+	str	r3, [r6, #2056]
+	ldr	r3, .L1281+16
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r4, r3, asr #2
+	bcc	.L1269
+	adds	r3, r4, #1
+	ldr	r2, [sp, #12]
+	it	ne
+	movne	r4, #256
+	mov	r3, r8
+	str	r4, [sp]
+	mov	r1, r8
+	ldr	r0, .L1281+20
+	bl	printf
+.L1269:
+	bl	nandc_wait_flash_ready
+	cbz	r5, .L1254
+	movs	r0, #4
+	bl	nandc_set_if_mode
+.L1254:
+	mov	r0, r4
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1272:
+	movs	r5, #0
+	b	.L1255
+.L1266:
+	ldr	r3, [sp, #20]
+	mov	r0, r10
+	uxtb	r1, r8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	subs	r3, r3, #67
+	cmp	r3, #1
+	bhi	.L1258
+	bl	sandisk_set_rr_para
+.L1259:
+	ldr	r3, .L1281+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #34
+	bne	.L1260
+	ldr	r3, .L1281+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	subs	r3, r3, #3
+	cmp	r8, r3
+	ittt	eq
+	addeq	r3, r6, r7, lsl #8
+	moveq	r2, #179
+	streq	r2, [r3, #2056]
+.L1260:
+	add	r3, r6, r7, lsl #8
+	movs	r2, #38
+	ldr	r1, [sp, #12]
+	mov	r0, r7
+	str	r2, [r3, #2056]
+	movs	r2, #93
+	str	r2, [r3, #2056]
+	ldr	r3, [sp, #60]
+	ldr	r2, [sp, #16]
+	str	r3, [sp]
+	ldr	r3, [sp, #56]
+	bl	flash_read_page
+	adds	r2, r0, #1
+	mov	r4, r0
+	beq	.L1263
+	ldr	r3, .L1281+24
+	cmp	fp, #-1
+	it	eq
+	moveq	fp, r0
+	ldr	r3, [r3]
+	str	r3, [sp, #16]
+	ldr	r3, .L1281+28
+	ldr	r3, [r3]
+	str	r3, [sp, #56]
+	ldr	r3, .L1281+16
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r0, r3, asr #2
+	bcc	.L1265
+.L1263:
+	add	r8, r8, #1
+	b	.L1257
+.L1258:
+	bl	toshiba_set_rr_para
+	b	.L1259
+.L1267:
+	bl	toshiba_set_rr_para
+	b	.L1268
+.L1282:
+	.align	2
+.L1281:
+	.word	.LANCHOR6
+	.word	.LANCHOR1
+	.word	.LANCHOR35
+	.word	.LANCHOR113
+	.word	.LANCHOR27
+	.word	.LC46
+	.word	.LANCHOR111
+	.word	.LANCHOR112
+	.size	toshiba_read_retrial, .-toshiba_read_retrial
+	.section	.text.hynix_read_retrial,"ax",%progbits
+	.align	1
+	.global	hynix_read_retrial
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	hynix_read_retrial, %function
+hynix_read_retrial:
+	@ args = 8, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r6, #0
+	str	r3, [sp, #12]
+	mov	r4, #-1
+	mov	r7, r0
+	mov	r8, r2
+	ldr	r3, .L1297
+	ldr	r3, [r3]
+	add	fp, r3, r0
+	ldrb	r10, [r3, #114]	@ zero_extendqisi2
+	ldrb	r5, [fp, #120]	@ zero_extendqisi2
+	bl	nandc_wait_flash_ready
+.L1284:
+	cmp	r6, r10
+	bcc	.L1289
+.L1288:
+	ldr	r3, .L1297+4
+	strb	r5, [fp, #120]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r4, r3, asr #2
+	bcc	.L1283
+	adds	r3, r4, #1
+	mov	r2, r8
+	it	ne
+	movne	r4, #256
+	mov	r3, r6
+	str	r4, [sp]
+	mov	r1, r6
+	ldr	r0, .L1297+8
+	bl	printf
+.L1283:
+	mov	r0, r4
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1289:
+	adds	r5, r5, #1
+	mov	r0, r7
+	uxtb	r5, r5
+	cmp	r10, r5
+	it	ls
+	movls	r5, #0
+	mov	r1, r5
+	bl	hynix_set_rr_para
+	ldr	r3, [sp, #52]
+	mov	r1, r8
+	ldr	r2, [sp, #12]
+	mov	r0, r7
+	str	r3, [sp]
+	ldr	r3, [sp, #48]
+	bl	flash_read_page
+	adds	r2, r0, #1
+	beq	.L1286
+	ldr	r3, .L1297+12
+	cmp	r4, #-1
+	it	eq
+	moveq	r4, r0
+	ldr	r3, [r3]
+	str	r3, [sp, #12]
+	ldr	r3, .L1297+16
+	ldr	r3, [r3]
+	str	r3, [sp, #48]
+	ldr	r3, .L1297+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r0, r3, asr #2
+	bcc	.L1292
+.L1286:
+	adds	r6, r6, #1
+	b	.L1284
+.L1292:
+	mov	r4, r0
+	b	.L1288
+.L1298:
+	.align	2
+.L1297:
+	.word	.LANCHOR5
+	.word	.LANCHOR27
+	.word	.LC47
+	.word	.LANCHOR111
+	.word	.LANCHOR112
+	.size	hynix_read_retrial, .-hynix_read_retrial
+	.section	.text.flash_ddr_tunning_read,"ax",%progbits
+	.align	1
+	.global	flash_ddr_tunning_read
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_ddr_tunning_read, %function
+flash_ddr_tunning_read:
+	@ args = 4, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r8, #0
+	mov	r5, r8
+	mov	r4, r8
+	mov	r7, #1024
+	movs	r6, #6
+	mov	fp, #-1
+	sub	sp, sp, #32
+	str	r0, [sp, #16]
+	str	r1, [sp, #12]
+	str	r2, [sp, #20]
+	str	r3, [sp, #24]
+	bl	nandc_get_ddr_para
+	str	r8, [sp, #8]
+	str	r0, [sp, #28]
+.L1304:
+	uxtb	r0, r6
+	bl	nandc_set_ddr_para
+	ldr	r3, [sp, #64]
+	ldr	r2, [sp, #20]
+	ldr	r1, [sp, #12]
+	str	r3, [sp]
+	ldr	r0, [sp, #16]
+	ldr	r3, [sp, #24]
+	bl	flash_read_page
+	ldr	r2, [sp, #12]
+	mov	r3, r0
+	mov	r10, r0
+	mov	r1, r6
+	ldr	r0, .L1316
+	bl	printf
+	adds	r3, r7, #1
+	cmp	r10, r3
+	bhi	.L1300
+	ldr	r3, .L1316+4
+	cmp	r10, #2
+	ldr	r3, [r3]
+	str	r3, [sp, #20]
+	ldr	r3, .L1316+8
+	ldr	r3, [r3]
+	str	r3, [sp, #24]
+	bhi	.L1309
+	adds	r4, r4, #1
+	cmp	r4, #7
+	bls	.L1309
+	mov	r3, r5
+	mov	r7, r10
+	subs	r5, r6, r4
+	mov	fp, #0
+.L1302:
+	ldr	r2, [sp, #8]
+	cmp	r4, r2
+	it	ls
+	movls	r5, r3
+.L1303:
+	cbz	r5, .L1305
+	ldr	r3, .L1316+12
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	ldr	r3, .L1316+16
+	umull	r2, r3, r2, r3
+	ubfx	r3, r3, #1, #8
+	cmp	r3, r7
+	bls	.L1305
+	mov	r1, r5
+	ldr	r0, .L1316+20
+	bl	printf
+	uxtb	r0, r5
+.L1315:
+	bl	nandc_set_ddr_para
+	cmp	fp, #0
+	beq	.L1299
+	mov	r7, fp
+	ldr	r2, [sp, #12]
+	ldr	r1, [sp, #16]
+	ldr	r0, .L1316+24
+	bl	printf
+.L1299:
+	mov	r0, r7
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1300:
+	ldr	r3, [sp, #8]
+	cmp	r4, r3
+	bls	.L1310
+	cmp	r4, #7
+	sub	r5, r8, r4
+	bhi	.L1303
+	str	r4, [sp, #8]
+.L1310:
+	movs	r4, #0
+	b	.L1301
+.L1309:
+	mov	r8, r6
+	mov	r7, r10
+	mov	fp, #0
+.L1301:
+	adds	r6, r6, #2
+	cmp	r6, #50
+	bne	.L1304
+	mov	r3, r5
+	mov	r5, r8
+	b	.L1302
+.L1305:
+	ldrb	r0, [sp, #28]	@ zero_extendqisi2
+	b	.L1315
+.L1317:
+	.align	2
+.L1316:
+	.word	.LC48
+	.word	.LANCHOR111
+	.word	.LANCHOR112
+	.word	.LANCHOR27
+	.word	-1431655765
+	.word	.LC49
+	.word	.LC50
+	.size	flash_ddr_tunning_read, .-flash_ddr_tunning_read
+	.section	.text.flash_read_page_en,"ax",%progbits
+	.align	1
+	.global	flash_read_page_en
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_read_page_en, %function
+flash_read_page_en:
+	@ args = 4, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r8, r3
+	ldr	r3, .L1347
+	mov	r4, r1
+	mov	r7, r2
+	ldr	r10, [sp, #48]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r0
+	bhi	.L1319
+	mov	r2, #386
+	ldr	r1, .L1347+4
+	ldr	r0, .L1347+8
+	bl	printf
+.L1320:
+	b	.L1320
+.L1319:
+	ldr	r3, .L1347+12
+	ldrb	r5, [r3, r0]	@ zero_extendqisi2
+	ldr	r3, .L1347+16
+	ldr	r3, [r3]
+	lsls	r0, r3, #27
+	bpl	.L1321
+	mov	r2, r1
+	ldr	r0, .L1347+20
+	mov	r1, r5
+	bl	printf
+.L1321:
+	tst	r4, #50331648
+	bne	.L1322
+	ldr	r3, .L1347+24
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	ldr	r3, .L1347+28
+	cbz	r2, .L1323
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	cbz	r2, .L1322
+.L1323:
+	ldr	r2, .L1347+32
+	mov	r0, r4
+	str	r3, [sp, #12]
+	ldrh	r6, [r2]
+	mov	r1, r6
+	bl	__aeabi_uidiv
+	mov	r1, r6
+	mul	fp, r6, r0
+	mov	r0, r4
+	bl	__aeabi_uidivmod
+	ldr	r3, [sp, #12]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L1324
+	add	r4, fp, r1, lsl #1
+.L1322:
+	mov	r1, r4
+	str	r10, [sp]
+	mov	r3, r8
+	mov	r2, r7
+	mov	r0, r5
+	bl	flash_read_page
+	adds	r1, r0, #1
+	mov	r6, r0
+	bne	.L1318
+	ldr	fp, .L1347+40
+	ldrb	r3, [fp]	@ zero_extendqisi2
+	str	r3, [sp, #12]
+	cbnz	r3, .L1326
+.L1329:
+	ldr	r3, .L1347+36
+	ldr	fp, [r3]
+	cmp	fp, #0
+	bne	.L1327
+.L1328:
+	ldr	r3, .L1347+40
+	mov	r2, r4
+	movs	r1, #0
+	ldr	r0, .L1347+44
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r3, [sp]
+	mov	r3, #-1
+	bl	printf
+	ldr	r3, .L1347+48
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L1318
+	str	r10, [sp, #48]
+	mov	r3, r8
+	mov	r2, r7
+	mov	r1, r4
+	mov	r0, r5
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	flash_ddr_tunning_read
+.L1324:
+	ldr	r3, .L1347+52
+	ldrh	r4, [r3, r1, lsl #1]
+	add	r4, r4, fp
+	b	.L1322
+.L1326:
+	movs	r3, #0
+	mov	r2, r7
+	strb	r3, [fp]
+	mov	r1, r4
+	mov	r3, r8
+	str	r10, [sp]
+	mov	r0, r5
+	bl	flash_read_page
+	ldrb	r3, [sp, #12]	@ zero_extendqisi2
+	adds	r2, r0, #1
+	strb	r3, [fp]
+	beq	.L1329
+.L1346:
+	mov	r6, r0
+.L1318:
+	mov	r0, r6
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1327:
+	mov	r3, r7
+	stm	sp, {r8, r10}
+	mov	r2, r4
+	movs	r1, #0
+	mov	r0, r5
+	blx	fp
+	adds	r3, r0, #1
+	bne	.L1346
+	b	.L1328
+.L1348:
+	.align	2
+.L1347:
+	.word	.LANCHOR8
+	.word	.LANCHOR114
+	.word	.LC0
+	.word	.LANCHOR10
+	.word	.LANCHOR22
+	.word	.LC51
+	.word	.LANCHOR11
+	.word	.LANCHOR12
+	.word	.LANCHOR13
+	.word	.LANCHOR115
+	.word	.LANCHOR29
+	.word	.LC52
+	.word	.LANCHOR35
+	.word	.LANCHOR14
+	.size	flash_read_page_en, .-flash_read_page_en
+	.section	.text.flash_get_last_written_page,"ax",%progbits
+	.align	1
+	.global	flash_get_last_written_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_get_last_written_page, %function
+flash_get_last_written_page:
+	@ args = 4, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r8, r0
+	ldr	r4, .L1355
+	mov	r10, r2
+	mov	fp, r3
+	ldrh	r5, [r4]
+	ldr	r4, .L1355+4
+	subs	r5, r5, #1
+	ldrh	r6, [r4, #26]
+	sxth	r5, r5
+	muls	r6, r1, r6
+	ldr	r1, [sp, #40]
+	str	r1, [sp]
+	adds	r1, r5, r6
+	bl	flash_read_page_en
+	cmp	r0, #512
+	bne	.L1350
+	movs	r7, #0
+.L1351:
+	cmp	r7, r5
+	ble	.L1354
+.L1350:
+	mov	r0, r5
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1354:
+	adds	r4, r7, r5
+	ldr	r3, [sp, #40]
+	add	r4, r4, r4, lsr #31
+	mov	r2, r10
+	mov	r0, r8
+	asrs	r4, r4, #1
+	str	r3, [sp]
+	mov	r3, fp
+	sxtah	r1, r6, r4
+	bl	flash_read_page_en
+	cmp	r0, #512
+	itete	eq
+	addeq	r4, r4, #-1
+	addne	r4, r4, #1
+	sxtheq	r5, r4
+	sxthne	r7, r4
+	b	.L1351
+.L1356:
+	.align	2
+.L1355:
+	.word	.LANCHOR97
+	.word	.LANCHOR19
+	.size	flash_get_last_written_page, .-flash_get_last_written_page
+	.section	.text.flash_get_last_written_page_ext,"ax",%progbits
+	.align	1
+	.global	flash_get_last_written_page_ext
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_get_last_written_page_ext, %function
+flash_get_last_written_page_ext:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r4, r5, lr}
+	movs	r5, #1
+	ldr	r4, .L1358
+	ldrh	r4, [r4]
+	str	r3, [sp]
+	mov	r3, r2
+	mov	r2, r1
+	rsb	r4, r4, #21
+	lsls	r5, r5, r4
+	asr	r4, r0, r4
+	subs	r5, r5, #1
+	and	r1, r5, r0
+	uxtb	r0, r4
+	bl	flash_get_last_written_page
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, pc}
+.L1359:
+	.align	2
+.L1358:
+	.word	.LANCHOR71
+	.size	flash_get_last_written_page_ext, .-flash_get_last_written_page_ext
+	.section	.text.flash_info_blk_init,"ax",%progbits
+	.align	1
+	.global	flash_info_blk_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_info_blk_init, %function
+flash_info_blk_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #4
+	ldr	r10, .L1384+12
+.L1363:
+	movs	r5, #4
+	movs	r0, #0
+	ldr	r8, .L1384+16
+	ldr	fp, .L1384+20
+	ldr	r6, .L1384
+	ldrh	r1, [r8]
+	str	r5, [sp]
+	mov	r7, fp
+	ldr	r3, [r6]
+	ldr	r2, [fp]
+	muls	r1, r4, r1
+	bl	flash_read_page_en
+	adds	r0, r0, #1
+	beq	.L1361
+	ldr	r2, [fp]
+	ldr	r3, [r2]
+	cmp	r3, r10
+	beq	.L1362
+.L1361:
+	adds	r4, r4, #1
+	cmp	r4, #16
+	bne	.L1363
+.L1383:
+	mov	r0, #-1
+.L1360:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1371:
+	ldr	r3, [r7]
+	ldr	r2, [r3]
+	cmp	r2, r10
+	bne	.L1372
+	ldr	r4, [r3, #4]
+.L1365:
+	ldrb	r1, [r5, #1]	@ zero_extendqisi2
+	movs	r3, #4
+	ldrh	r0, [r8]
+	str	r3, [sp]
+	ldr	r2, [r7]
+	ldr	r3, [r6]
+	muls	r1, r0, r1
+	movs	r0, #0
+	bl	flash_read_page_en
+	adds	r0, r0, #1
+	beq	.L1366
+	ldr	r3, [r7]
+	ldr	r2, [r3]
+	cmp	r2, r10
+	bne	.L1366
+	ldr	r2, [r3, #4]
+	cmp	r4, r2
+	itttt	cc
+	ldrbcc	r2, [r3, #37]	@ zero_extendqisi2
+	ldrbcc	r3, [r3, #36]	@ zero_extendqisi2
+	strbcc	r2, [r5]
+	strbcc	r3, [r5, #1]
+.L1366:
+	mov	fp, #4
+	ldrb	r1, [r5]	@ zero_extendqisi2
+	str	fp, [sp]
+	movs	r0, #0
+	ldr	r3, [r6]
+	ldr	r2, [r7]
+	bl	flash_get_last_written_page
+	adds	r3, r0, #1
+	mov	r4, r0
+	strh	r3, [r5, #2]	@ movhi
+	ldrb	r5, [r5]	@ zero_extendqisi2
+	ldrh	r3, [r8]
+	mla	r5, r3, r5, r0
+.L1367:
+	cmp	r4, #0
+	bge	.L1369
+	adds	r4, r4, #1
+	bne	.L1370
+	ldr	r3, [r7]
+	ldr	r0, .L1384+4
+	ldr	r1, [r3]
+	bl	printf
+	b	.L1383
+.L1369:
+	str	fp, [sp]
+	mov	r1, r5
+	ldr	r3, [r6]
+	movs	r0, #0
+	ldr	r2, [r7]
+	bl	flash_read_page_en
+	adds	r0, r0, #1
+	beq	.L1368
+	ldr	r3, [r7]
+	ldr	r3, [r3]
+	cmp	r3, r10
+	bne	.L1368
+.L1370:
+	movs	r0, #0
+	b	.L1360
+.L1368:
+	subs	r4, r4, #1
+	subs	r5, r5, #1
+	sxth	r4, r4
+	b	.L1367
+.L1362:
+	ldrb	r1, [r2, #36]	@ zero_extendqisi2
+	ldrh	r0, [r8]
+	ldrb	r3, [r2, #37]	@ zero_extendqisi2
+	ldr	r4, .L1384+8
+	strb	r1, [r4]
+	muls	r1, r0, r1
+	strb	r3, [r4, #1]
+	movs	r0, #0
+	str	r5, [sp]
+	mov	r5, r4
+	ldr	r3, [r6]
+	bl	flash_read_page_en
+	adds	r0, r0, #1
+	bne	.L1371
+.L1372:
+	movs	r4, #0
+	b	.L1365
+.L1385:
+	.align	2
+.L1384:
+	.word	.LANCHOR116
+	.word	.LC53
+	.word	.LANCHOR117
+	.word	1398362953
+	.word	.LANCHOR13
+	.word	.LANCHOR5
+	.size	flash_info_blk_init, .-flash_info_blk_init
+	.section	.text.flash_ddr_para_scan,"ax",%progbits
+	.align	1
+	.global	flash_ddr_para_scan
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_ddr_para_scan, %function
+flash_ddr_para_scan:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r7, r0
+	ldr	r6, .L1392
+	movs	r5, #1
+	mov	r8, r1
+	ldr	r4, .L1392+4
+	ldr	fp, .L1392+8
+	ldr	r10, .L1392+12
+	ldrb	r0, [r6]	@ zero_extendqisi2
+	strb	r5, [r4]
+	bl	flash_set_interface_mode
+	ldrb	r0, [r6]	@ zero_extendqisi2
+	bl	nandc_set_if_mode
+	movs	r3, #4
+	ldr	r2, [r10]
+	str	r3, [sp]
+	mov	r1, r8
+	ldr	r3, [fp]
+	mov	r0, r7
+	bl	flash_ddr_tunning_read
+	movs	r3, #4
+	ldr	r2, [r10]
+	str	r3, [sp]
+	mov	r1, r8
+	ldr	r3, [fp]
+	mov	r0, r7
+	bl	flash_read_page
+	adds	r0, r0, #1
+	mov	r3, r4
+	bne	.L1387
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	lsls	r2, r2, #31
+	bpl	.L1387
+	mov	r0, r5
+	bl	flash_set_interface_mode
+	mov	r0, r5
+	bl	nandc_set_if_mode
+	movs	r3, #0
+	strb	r3, [r4]
+.L1388:
+	movs	r0, #0
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1387:
+	movs	r2, #1
+	strb	r2, [r3]
+	b	.L1388
+.L1393:
+	.align	2
+.L1392:
+	.word	.LANCHOR25
+	.word	.LANCHOR35
+	.word	.LANCHOR118
+	.word	.LANCHOR119
+	.size	flash_ddr_para_scan, .-flash_ddr_para_scan
+	.section	.text.flash_complete_page_read,"ax",%progbits
+	.align	1
+	.global	flash_complete_page_read
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_complete_page_read, %function
+flash_complete_page_read:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r7, r2
+	ldr	r2, .L1419
+	ubfx	r3, r0, #21, #3
+	sub	sp, sp, #24
+	str	r0, [sp, #12]
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	str	r1, [sp, #16]
+	cmp	r2, r3
+	bhi	.L1395
+	movw	r2, #791
+	ldr	r1, .L1419+4
+	ldr	r0, .L1419+8
+	bl	printf
+.L1396:
+	b	.L1396
+.L1395:
+	ldr	r2, [sp, #12]
+	ubfx	r4, r2, #0, #21
+	ubfx	r2, r2, #24, #2
+	str	r2, [sp, #8]
+	ldr	r2, .L1419+12
+	ldrb	r5, [r2, r3]	@ zero_extendqisi2
+	ldr	r3, .L1419+16
+	mov	r0, r5
+	ldr	r6, [r3]
+	bl	nandc_cs
+	ldr	r3, [sp, #8]
+	cbnz	r3, .L1397
+	ldr	r3, .L1419+20
+	ldr	fp, .L1419+52
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L1398
+	ldrb	r3, [fp]	@ zero_extendqisi2
+	cbz	r3, .L1397
+.L1398:
+	ldr	r3, .L1419+24
+	mov	r0, r4
+	ldrh	r8, [r3]
+	mov	r1, r8
+	bl	__aeabi_uidiv
+	mov	r1, r8
+	mul	r10, r8, r0
+	mov	r0, r4
+	bl	__aeabi_uidivmod
+	ldrb	r3, [fp]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L1399
+	add	r4, r10, r1, lsl #1
+.L1397:
+	add	r6, r6, r5, lsl #8
+	movs	r3, #5
+	mov	r8, #0
+	ldr	fp, .L1419+44
+	str	r3, [r6, #2056]
+	uxtb	r3, r4
+	str	r8, [r6, #2052]
+	mov	r1, r8
+	str	r8, [r6, #2052]
+	mov	r0, r5
+	str	r3, [r6, #2052]
+	lsrs	r3, r4, #8
+	ldrb	r2, [fp, #9]	@ zero_extendqisi2
+	str	r3, [r6, #2052]
+	lsrs	r3, r4, #16
+	str	r3, [r6, #2052]
+	movs	r3, #224
+	str	r3, [r6, #2056]
+	str	r7, [sp]
+	ldr	r3, [sp, #16]
+	bl	nandc_xfer
+	adds	r1, r0, #1
+	mov	r6, r0
+	bne	.L1394
+	ldr	r10, .L1419+32
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	str	r3, [sp, #20]
+	cbnz	r3, .L1401
+.L1404:
+	ldr	r3, .L1419+28
+	ldr	r8, [r3]
+	cmp	r8, #0
+	bne	.L1402
+.L1403:
+	ldr	r3, .L1419+32
+	movs	r1, #0
+	ldr	r2, [sp, #12]
+	ldr	r0, .L1419+36
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r3, [sp]
+	mov	r3, #-1
+	bl	printf
+	ldr	r3, .L1419+40
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L1394
+	ldr	r3, .L1419+44
+	mov	r0, r5
+	ldr	r1, [sp, #8]
+	ldr	r2, [sp, #16]
+	ldrb	r3, [r3, #9]	@ zero_extendqisi2
+	orr	r1, r4, r1, lsl #24
+	str	r3, [sp]
+	mov	r3, r7
+	bl	flash_ddr_tunning_read
+	b	.L1418
+.L1399:
+	ldr	r3, .L1419+48
+	ldrh	r4, [r3, r1, lsl #1]
+	add	r4, r4, r10
+	b	.L1397
+.L1401:
+	ldr	r1, [sp, #8]
+	mov	r0, r5
+	ldrb	r3, [fp, #9]	@ zero_extendqisi2
+	strb	r8, [r10]
+	ldr	r2, [sp, #16]
+	str	r3, [sp]
+	orr	r1, r4, r1, lsl #24
+	mov	r3, r7
+	bl	flash_read_page
+	ldrb	r3, [sp, #20]	@ zero_extendqisi2
+	adds	r2, r0, #1
+	strb	r3, [r10]
+	beq	.L1404
+.L1418:
+	mov	r6, r0
+.L1394:
+	mov	r0, r6
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1402:
+	ldr	r3, .L1419+44
+	mov	r2, r4
+	ldr	r1, [sp, #8]
+	mov	r0, r5
+	ldrb	r3, [r3, #9]	@ zero_extendqisi2
+	str	r7, [sp]
+	str	r3, [sp, #4]
+	ldr	r3, [sp, #16]
+	blx	r8
+	adds	r3, r0, #1
+	beq	.L1403
+	b	.L1418
+.L1420:
+	.align	2
+.L1419:
+	.word	.LANCHOR8
+	.word	.LANCHOR120
+	.word	.LC0
+	.word	.LANCHOR10
+	.word	.LANCHOR6
+	.word	.LANCHOR11
+	.word	.LANCHOR13
+	.word	.LANCHOR115
+	.word	.LANCHOR29
+	.word	.LC54
+	.word	.LANCHOR35
+	.word	.LANCHOR19
+	.word	.LANCHOR14
+	.word	.LANCHOR12
+	.size	flash_complete_page_read, .-flash_complete_page_read
+	.section	.text.queue_wait_first_req_completed,"ax",%progbits
+	.align	1
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	queue_wait_first_req_completed, %function
+queue_wait_first_req_completed:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1458
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	cmp	r5, #255
+	bne	.L1422
+.L1440:
+	movs	r4, #0
+	b	.L1421
+.L1422:
+	ldr	r6, .L1458+4
+	movs	r3, #48
+	mla	r3, r3, r5, r6
+	ldrb	r2, [r3, #42]	@ zero_extendqisi2
+	ldr	r4, [r3, #24]
+	subs	r3, r2, #1
+	cmp	r3, #9
+	bhi	.L1440
+	tbb	[pc, r3]
+.L1425:
+	.byte	(.L1424-.L1425)/2
+	.byte	(.L1424-.L1425)/2
+	.byte	(.L1426-.L1425)/2
+	.byte	(.L1426-.L1425)/2
+	.byte	(.L1426-.L1425)/2
+	.byte	(.L1427-.L1425)/2
+	.byte	(.L1428-.L1425)/2
+	.byte	(.L1429-.L1425)/2
+	.byte	(.L1426-.L1425)/2
+	.byte	(.L1429-.L1425)/2
+	.p2align 1
+.L1424:
+	movs	r1, #64
+	mov	r0, r4
+	bl	flash_wait_device_ready
+	lsls	r0, r0, #25
+	bpl	.L1440
+	movs	r3, #48
+	mov	r0, r4
+	mla	r5, r3, r5, r6
+	ldr	r3, [r5, #4]
+	ldr	r1, [r5, #8]
+	ldr	r2, [r5, #12]
+	cmp	r1, #0
+	it	eq
+	moveq	r1, r3
+	bl	flash_complete_page_read
+	movs	r3, #12
+	str	r0, [r5, #36]
+	strb	r3, [r5, #42]
+	ldrb	r3, [r5, #2]	@ zero_extendqisi2
+	orr	r3, r3, #8
+	strb	r3, [r5, #2]
+	b	.L1440
+.L1426:
+	movs	r1, #64
+	mov	r0, r4
+	bl	flash_wait_device_ready
+	lsls	r1, r0, #25
+	mov	r4, r0
+	bpl	.L1440
+	ands	r2, r0, #5
+	mov	r3, #48
+	mla	r5, r3, r5, r6
+	beq	.L1439
+	movs	r3, #11
+	ldrb	r1, [r5, #1]	@ zero_extendqisi2
+	strb	r3, [r5, #42]
+	ldr	r0, .L1458+8
+	str	r3, [sp]
+	ldr	r3, [r5, #24]
+	ldr	r2, [r5, #36]
+	bl	printf
+.L1457:
+	mov	r3, #-1
+	str	r3, [r5, #36]
+	b	.L1421
+.L1429:
+	add	r3, r5, r5, lsl #1
+	cmp	r2, #10
+	it	eq
+	moveq	r1, #9
+	add	r3, r6, r3, lsl #4
+	it	ne
+	movne	r1, #3
+	ubfx	r0, r4, #21, #3
+	movs	r7, #48
+.L1434:
+	ldrb	r8, [r3]	@ zero_extendqisi2
+	cmp	r8, #255
+	bne	.L1438
+	mov	r4, #-1
+	b	.L1421
+.L1438:
+	mla	r2, r7, r8, r6
+	add	r3, r8, r8, lsl #1
+	ldrb	ip, [r2, #42]	@ zero_extendqisi2
+	add	r3, r6, r3, lsl #4
+	cmp	ip, r1
+	bne	.L1434
+	ldr	r2, [r2, #24]
+	ubfx	r2, r2, #21, #3
+	cmp	r0, r2
+	bne	.L1434
+	mov	r0, r4
+	movs	r1, #64
+	bl	flash_wait_device_ready
+	ands	r4, r0, #64
+	mov	r10, r0
+	beq	.L1436
+	ands	r4, r0, #15
+	mul	r7, r7, r5
+	beq	.L1437
+	adds	r4, r6, r7
+	movs	r7, #11
+	ldrb	r1, [r4, #1]	@ zero_extendqisi2
+	ldr	r0, .L1458+8
+	str	r7, [sp]
+	ldr	r3, [r4, #24]
+	ldr	r2, [r4, #36]
+	bl	printf
+	mov	r3, #-1
+	strb	r7, [r4, #42]
+	str	r3, [r4, #36]
+	mov	r4, r10
+.L1436:
+	movs	r3, #48
+	mla	r5, r3, r5, r6
+	mla	r6, r3, r8, r6
+	ldrb	r2, [r5, #42]	@ zero_extendqisi2
+	ldr	r3, [r5, #36]
+	strb	r2, [r6, #42]
+	str	r3, [r6, #36]
+.L1421:
+	mov	r0, r4
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.L1437:
+	add	r7, r7, r6
+	movs	r3, #12
+	strb	r3, [r7, #42]
+	str	r4, [r7, #36]
+	b	.L1436
+.L1427:
+	mov	r0, r4
+	movs	r1, #32
+	bl	flash_wait_device_ready
+	lsls	r2, r0, #26
+	mov	r4, r0
+	bpl	.L1440
+	ands	r2, r0, #15
+	mov	r3, #48
+	mla	r5, r3, r5, r6
+	beq	.L1439
+	movs	r3, #11
+	strb	r3, [r5, #42]
+	b	.L1457
+.L1439:
+	movs	r3, #12
+	str	r2, [r5, #36]
+	strb	r3, [r5, #42]
+	b	.L1440
+.L1428:
+	movs	r1, #64
+	mov	r0, r4
+	bl	flash_wait_device_ready
+	lsls	r3, r0, #25
+	bpl	.L1440
+	movs	r3, #48
+	mla	r5, r3, r5, r6
+	movs	r3, #6
+	str	r0, [r5, #36]
+	strb	r3, [r5, #42]
+	b	.L1440
+.L1459:
+	.align	2
+.L1458:
+	.word	.LANCHOR90
+	.word	.LANCHOR36
+	.word	.LC55
+	.size	queue_wait_first_req_completed, .-queue_wait_first_req_completed
+	.section	.text.sblk_wait_write_queue_completed,"ax",%progbits
+	.align	1
+	.global	sblk_wait_write_queue_completed
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sblk_wait_write_queue_completed, %function
+sblk_wait_write_queue_completed:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, lr}
+	ldr	r4, .L1463
+.L1461:
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	cmp	r3, #255
+	bne	.L1462
+	pop	{r4, pc}
+.L1462:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L1461
+.L1464:
+	.align	2
+.L1463:
+	.word	.LANCHOR90
+	.size	sblk_wait_write_queue_completed, .-sblk_wait_write_queue_completed
+	.section	.text.ftl_read_page,"ax",%progbits
+	.align	1
+	.global	ftl_read_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_read_page, %function
+ftl_read_page:
+	@ args = 4, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r4, r0
+	ldr	r8, [sp, #24]
+	mov	r5, r1
+	mov	r6, r2
+	mov	r7, r3
+	bl	sblk_wait_write_queue_completed
+	str	r8, [sp, #24]
+	mov	r3, r7
+	mov	r2, r6
+	mov	r1, r5
+	mov	r0, r4
+	pop	{r4, r5, r6, r7, r8, lr}
+	b	flash_read_page_en
+	.size	ftl_read_page, .-ftl_read_page
+	.section	.text.ftl_read_ppa_page,"ax",%progbits
+	.align	1
+	.global	ftl_read_ppa_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_read_ppa_page, %function
+ftl_read_ppa_page:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r4, r5, r6, r7, lr}
+	mov	r4, r0
+	mov	r5, r1
+	mov	r6, r2
+	mov	r7, r3
+	bl	sblk_wait_write_queue_completed
+	str	r7, [sp]
+	mov	r3, r6
+	mov	r2, r5
+	mov	r1, r4
+	ubfx	r0, r4, #21, #3
+	bl	flash_read_page_en
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, r6, r7, pc}
+	.size	ftl_read_ppa_page, .-ftl_read_ppa_page
+	.section	.text.ftl_open_sblk_read_test,"ax",%progbits
+	.align	1
+	.global	ftl_open_sblk_read_test
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_open_sblk_read_test, %function
+ftl_open_sblk_read_test:
+	@ args = 0, pretend = 0, frame = 32
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, lr}
+	movs	r5, #0
+	ldr	r8, .L1477+20
+	sub	sp, sp, #32
+	mov	r4, r0
+	add	r1, sp, #16
+	bl	ftl_get_blk_list_in_sblk
+	strh	r4, [sp]	@ movhi
+	strb	r0, [sp, #9]
+.L1468:
+	ldr	r3, .L1477
+	ldrh	r2, [r3]
+	uxth	r3, r5
+	cmp	r2, r3
+	bls	.L1467
+	movs	r4, #0
+	ldr	r7, .L1477+4
+	b	.L1470
+.L1473:
+	uxth	r3, r4
+	add	r2, sp, #32
+	add	r3, r2, r3, lsl #1
+	ldrh	r0, [r3, #-16]
+	movw	r3, #65535
+	cmp	r0, r3
+	bne	.L1469
+.L1472:
+	adds	r4, r4, #1
+.L1470:
+	ldrb	r2, [r7]	@ zero_extendqisi2
+	uxth	r3, r4
+	cmp	r2, r3
+	bhi	.L1473
+	adds	r5, r5, #1
+	b	.L1468
+.L1469:
+	ldr	r3, .L1477+8
+	uxth	r6, r5
+	ldr	r2, .L1477+12
+	ldr	r1, .L1477+16
+	ldrh	ip, [r3]
+	ldrb	r3, [r8]	@ zero_extendqisi2
+	mla	r0, r0, ip, r6
+	bl	ftl_read_ppa_page
+	cmp	r0, #512
+	bne	.L1472
+.L1467:
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1478:
+	.align	2
+.L1477:
+	.word	.LANCHOR79
+	.word	.LANCHOR69
+	.word	.LANCHOR75
+	.word	.LANCHOR121
+	.word	ftl_tmp_buffer
+	.word	.LANCHOR45
+	.size	ftl_open_sblk_read_test, .-ftl_open_sblk_read_test
+	.section	.text.sblk_read_page,"ax",%progbits
+	.align	1
+	.global	sblk_read_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sblk_read_page, %function
+sblk_read_page:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r0
+	ldr	r10, .L1493
+	mov	r5, r1
+	mov	r8, r0
+	mov	r6, r1
+.L1480:
+	cbnz	r6, .L1484
+.L1492:
+	ldr	r6, .L1493
+.L1485:
+	cbnz	r5, .L1488
+	mov	r0, r5
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1484:
+	ldrb	r7, [r8]	@ zero_extendqisi2
+	ldr	fp, [r8, #24]
+.L1481:
+	movs	r1, #0
+	mov	r0, fp
+	bl	queue_lun_state
+	cbnz	r0, .L1482
+	str	r0, [sp, #4]
+	movs	r0, #48
+	ldr	r1, [r8, #24]
+	bl	flash_start_page_read
+	ldr	r2, [sp, #4]
+	movs	r1, #1
+	strb	r1, [r8, #42]
+	mov	r1, r8
+	ldr	r0, .L1493+4
+	strb	r2, [r8, #43]
+	movs	r2, #255
+	strb	r2, [r8]
+	bl	buf_add_tail
+	subs	r6, r6, #1
+	beq	.L1492
+	add	r7, r7, r7, lsl #1
+	add	r8, r10, r7, lsl #4
+	b	.L1480
+.L1482:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L1481
+.L1488:
+	ldrb	r3, [r4, #42]	@ zero_extendqisi2
+	cmp	r3, #12
+	bne	.L1486
+	ldrb	r4, [r4]	@ zero_extendqisi2
+	subs	r5, r5, #1
+	add	r4, r4, r4, lsl #1
+	add	r4, r6, r4, lsl #4
+	b	.L1485
+.L1486:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L1485
+.L1494:
+	.align	2
+.L1493:
+	.word	.LANCHOR36
+	.word	.LANCHOR90
+	.size	sblk_read_page, .-sblk_read_page
+	.section	.text.gc_check_data_one_wl,"ax",%progbits
+	.align	1
+	.global	gc_check_data_one_wl
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_check_data_one_wl, %function
+gc_check_data_one_wl:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #24
+	ldr	r3, .L1520
+	ldr	r4, .L1520+4
+	ldr	r8, [r3]
+	ldr	r3, [r4, #8]
+	cbnz	r3, .L1496
+	movs	r0, #1
+	bl	buf_alloc
+	str	r0, [r4, #8]
+.L1496:
+	ldr	r5, [r4, #8]
+	cbz	r5, .L1497
+	ldr	fp, .L1520+40
+	add	r10, r8, #96
+	movs	r7, #0
+.L1498:
+	ldrb	r3, [r8, #89]	@ zero_extendqisi2
+	cmp	r7, r3
+	bge	.L1508
+	movs	r6, #1
+	b	.L1509
+.L1497:
+	movw	r2, #333
+	ldr	r1, .L1520+8
+	ldr	r0, .L1520+12
+	bl	printf
+.L1499:
+	b	.L1499
+.L1507:
+	ldrh	r3, [fp]
+	ldrh	r2, [r10]
+	muls	r2, r3, r2
+	ldr	r3, .L1520+16
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	ldrh	r3, [r4, #12]
+	cmp	r1, #3
+	bne	.L1500
+	add	r3, r3, r2
+	orr	r3, r3, r6, lsl #24
+.L1519:
+	movs	r1, #1
+	str	r3, [r5, #24]
+	mov	r0, r5
+	bl	sblk_read_page
+	ldr	r2, [r5, #36]
+	ldr	r1, .L1520+20
+	adds	r0, r2, #1
+	beq	.L1503
+	ldr	r3, [r1]
+	ldrh	ip, [r4, #18]
+	ldr	r0, [r5, #12]
+	ldr	lr, [r3, ip, lsl #2]
+	ldr	r3, [r0, #4]
+	cmp	lr, r3
+	bne	.L1503
+	ldr	r3, .L1520+24
+	ldr	r3, [r3]
+	ldr	ip, [r3, ip, lsl #2]
+	ldr	r3, [r0, #8]
+	cmp	ip, r3
+	beq	.L1504
+.L1503:
+	ldrh	r3, [r4, #18]
+	ldr	r1, [r1]
+	lsls	r0, r3, #2
+	ldr	r3, [r1, r3, lsl #2]
+	adds	r1, r3, #1
+	beq	.L1504
+	ldr	r1, .L1520+28
+	ldr	r1, [r1]
+	lsls	r1, r1, #21
+	bpl	.L1505
+	ldr	r1, [r5, #12]
+	ldr	r4, [r1, #12]
+	str	r4, [sp, #16]
+	ldr	r4, [r1, #8]
+	str	r4, [sp, #12]
+	ldr	r4, [r1, #4]
+	str	r4, [sp, #8]
+	ldr	r1, [r1]
+	str	r1, [sp, #4]
+	ldr	r1, .L1520+24
+	ldr	r1, [r1]
+	ldr	r1, [r1, r0]
+	ldr	r0, .L1520+32
+	str	r1, [sp]
+	ldr	r1, [r5, #24]
+	bl	printf
+.L1505:
+	ldr	r3, .L1520+36
+	mov	r0, #-1
+	ldrh	r2, [r8, #80]
+	movs	r1, #0
+	ldr	r3, [r3]
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+.L1495:
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1500:
+	cmp	r1, #2
+	itett	eq
+	addeq	r3, r3, #-1
+	addne	r3, r3, r2
+	addeq	r3, r3, r2
+	addeq	r3, r3, r6
+	it	eq
+	orreq	r3, r3, #33554432
+	b	.L1519
+.L1504:
+	ldrh	r3, [r4, #18]
+	adds	r6, r6, #1
+	adds	r3, r3, #1
+	strh	r3, [r4, #18]	@ movhi
+.L1509:
+	ldrh	r3, [r4, #16]
+	cmp	r6, r3
+	ble	.L1507
+	adds	r7, r7, #1
+	add	r10, r10, #2
+	b	.L1498
+.L1508:
+.L1506:
+	ldrh	r3, [r4, #12]
+	movs	r0, #0
+	adds	r3, r3, #1
+	strh	r3, [r4, #12]	@ movhi
+	b	.L1495
+.L1521:
+	.align	2
+.L1520:
+	.word	.LANCHOR60
+	.word	.LANCHOR59
+	.word	.LANCHOR122
+	.word	.LC0
+	.word	.LANCHOR64
+	.word	.LANCHOR107
+	.word	.LANCHOR108
+	.word	.LANCHOR22
+	.word	.LC56
+	.word	.LANCHOR56
+	.word	.LANCHOR75
+	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
+	.section	.text.flash_prog_page,"ax",%progbits
+	.align	1
+	.global	flash_prog_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_prog_page, %function
+flash_prog_page:
+	@ args = 4, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	fp, r3
+	ldr	r3, .L1530
+	mov	r5, r0
+	mov	r6, r1
+	mov	r10, r2
+	ubfx	r8, r1, #0, #21
+	ubfx	r7, r1, #24, #2
+	ldr	r4, [r3]
+	add	r3, r0, #8
+	add	r3, r4, r3, lsl #8
+	str	r3, [sp, #4]
+	ldr	r3, .L1530+4
+	ldr	r3, [r3]
+	lsls	r3, r3, #27
+	bpl	.L1523
+	ldr	r3, [sp, #40]
+	mov	r2, r7
+	ldr	r0, .L1530+8
+	bl	printf
+.L1523:
+	bl	nandc_wait_flash_ready
+	mov	r0, r5
+	bl	hynix_reconfig_rr_para
+	mov	r0, r5
+	bl	nandc_cs
+	mov	r0, r5
+	cbnz	r7, .L1524
+	bl	flash_enter_slc_mode
+.L1525:
+	add	r4, r4, r5, lsl #8
+	movs	r3, #128
+	uxtb	r6, r6
+	mov	r0, r8
+	str	r3, [r4, #2056]
+	movs	r3, #0
+	str	r3, [r4, #2052]
+	str	r3, [r4, #2052]
+	lsr	r3, r8, #8
+	str	r6, [r4, #2052]
+	str	r3, [r4, #2052]
+	lsr	r3, r8, #16
+	str	r3, [r4, #2052]
+	bl	nandc_set_seed
+	ldr	r1, .L1530+12
+	mov	r2, r10
+	mov	r3, fp
+	movs	r0, #1
+	ldrb	r1, [r1, #9]	@ zero_extendqisi2
+	bl	nandc_xfer_start
+	bl	nandc_xfer_done
+	movs	r3, #16
+	str	r3, [r4, #2056]
+	bl	nandc_wait_flash_ready
+	ldr	r0, [sp, #4]
+	bl	flash_read_status
+	mov	r4, r0
+	cbnz	r7, .L1526
+	mov	r0, r5
+	bl	flash_exit_slc_mode
+.L1526:
+	mov	r0, r5
+	bl	nandc_de_cs
+	and	r0, r4, #4
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1524:
+	bl	flash_exit_slc_mode
+	b	.L1525
+.L1531:
+	.align	2
+.L1530:
+	.word	.LANCHOR6
+	.word	.LANCHOR22
+	.word	.LC57
+	.word	.LANCHOR19
+	.size	flash_prog_page, .-flash_prog_page
+	.section	.text.flash_test_blk,"ax",%progbits
+	.align	1
+	.global	flash_test_blk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_test_blk, %function
+flash_test_blk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	mov	r5, r1
+	mov	r4, r0
+	cbnz	r0, .L1533
+	ldr	r3, .L1550
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r1
+	bhi	.L1537
+.L1533:
+	ldr	r6, .L1550+4
+	movs	r2, #32
+	ldr	r7, .L1550+8
+	movs	r1, #165
+	ldr	r0, [r6]
+	bl	ftl_memset
+	movs	r2, #8
+	movs	r1, #90
+	ldr	r0, [r7]
+	bl	ftl_memset
+	ldr	r3, .L1550+12
+	mov	r0, r4
+	ldrh	r3, [r3]
+	muls	r5, r3, r5
+	mov	r1, r5
+	bl	flash_erase_block
+	adds	r0, r0, #1
+	beq	.L1535
+	ldr	r8, .L1550+16
+	mov	r1, r5
+	mov	r0, r4
+	ldrb	r3, [r8, #9]	@ zero_extendqisi2
+	str	r3, [sp]
+	ldr	r2, [r7]
+	ldr	r3, [r6]
+	bl	flash_prog_page
+	adds	r0, r0, #1
+	beq	.L1535
+	ldrb	r3, [r8, #9]	@ zero_extendqisi2
+	mov	r1, r5
+	mov	r0, r4
+	str	r3, [sp]
+	ldr	r2, [r7]
+	ldr	r3, [r6]
+	bl	flash_read_page
+	cmp	r0, #-1
+	mov	r8, r0
+	beq	.L1535
+	ldr	r3, [r7]
+	ldr	r3, [r3]
+	cmp	r3, #1515870810
+	bne	.L1535
+	ldr	r3, [r6]
+	ldr	r3, [r3]
+	cmp	r3, #-1515870811
+	beq	.L1536
+.L1535:
+	mov	r8, #-1
+.L1536:
+	mov	r1, r5
+	mov	r0, r4
+	bl	flash_erase_block
+	mov	r0, r8
+.L1532:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1537:
+	b	.L1532
+.L1551:
+	.align	2
+.L1550:
+	.word	.LANCHOR123
+	.word	.LANCHOR118
+	.word	.LANCHOR119
+	.word	.LANCHOR13
+	.word	.LANCHOR19
+	.size	flash_test_blk, .-flash_test_blk
+	.section	.text.flash_start_tlc_page_prog,"ax",%progbits
+	.align	1
+	.global	flash_start_tlc_page_prog
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_start_tlc_page_prog, %function
+flash_start_tlc_page_prog:
+	@ args = 12, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r7, r2
+	ldr	r2, .L1559
+	add	r5, sp, #40
+	mov	r4, r0
+	mov	fp, r1
+	ldm	r5, {r5, r8, r10}
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r2, r3
+	bhi	.L1553
+	movw	r2, #655
+	ldr	r1, .L1559+4
+	ldr	r0, .L1559+8
+	bl	printf
+.L1554:
+	b	.L1554
+.L1553:
+	ldr	r2, .L1559+12
+	ldrb	r6, [r2, r3]	@ zero_extendqisi2
+	ldr	r3, .L1559+16
+	mov	r0, r6
+	ldr	r2, [r3]
+	str	r2, [sp, #4]
+	bl	nandc_cs
+	lsls	r3, r6, #8
+	ldr	r2, [sp, #4]
+	cbz	r4, .L1555
+	adds	r1, r2, r3
+	str	r4, [r1, #2056]
+.L1555:
+	adds	r4, r2, r3
+	movs	r3, #128
+	str	fp, [r4, #2056]
+	str	r3, [r4, #2056]
+	movs	r3, #0
+	str	r3, [r4, #2052]
+	str	r3, [r4, #2052]
+	uxtb	r3, r5
+	str	r3, [r4, #2052]
+	lsrs	r3, r5, #8
+	str	r3, [r4, #2052]
+	lsrs	r3, r5, #16
+	add	r5, r5, r5, lsl #1
+	str	r3, [r4, #2052]
+	subs	r0, r5, #1
+	add	r0, r0, fp
+	bl	nandc_set_seed
+	ldr	r1, .L1559+20
+	mov	r3, r10
+	mov	r2, r8
+	movs	r0, #1
+	ldrb	r1, [r1, #9]	@ zero_extendqisi2
+	bl	nandc_xfer_start
+	bl	nandc_xfer_done
+	str	r7, [r4, #2056]
+	mov	r0, r6
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	nandc_de_cs
+.L1560:
+	.align	2
+.L1559:
+	.word	.LANCHOR8
+	.word	.LANCHOR124
+	.word	.LC0
+	.word	.LANCHOR10
+	.word	.LANCHOR6
+	.word	.LANCHOR19
+	.size	flash_start_tlc_page_prog, .-flash_start_tlc_page_prog
+	.section	.text.queue_tlc_prog_cmd,"ax",%progbits
+	.align	1
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	queue_tlc_prog_cmd, %function
+queue_tlc_prog_cmd:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, lr}
+	mov	r4, r0
+	ldr	r3, [r0]
+	movs	r1, #1
+	ldr	r2, [r3, #12]
+	ldr	r5, [r3, #24]
+	ldrb	r0, [r3, #44]	@ zero_extendqisi2
+	str	r2, [sp, #8]
+	movs	r2, #26
+	ldr	r3, [r3, #4]
+	ubfx	r6, r5, #0, #21
+	ubfx	r5, r5, #21, #3
+	str	r6, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r5
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldm	r4, {r2, r3}
+	movs	r1, #2
+	ldrb	r0, [r2, #44]	@ zero_extendqisi2
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	movs	r2, #26
+	ldr	r3, [r3, #4]
+	str	r6, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r5
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r4, #8]
+	movs	r1, #3
+	ldr	r2, [r4]
+	ldrb	r0, [r2, #44]	@ zero_extendqisi2
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	movs	r2, #16
+	ldr	r3, [r3, #4]
+	str	r6, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r5
+	bl	flash_start_tlc_page_prog
+	ldr	r1, [r4]
+	movs	r3, #4
+	ldr	r0, .L1562
+	strb	r3, [r1, #42]
+	movs	r3, #1
+	strb	r3, [r1, #43]
+	movs	r3, #255
+	strb	r3, [r1]
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, lr}
+	b	buf_add_tail
+.L1563:
+	.align	2
+.L1562:
+	.word	.LANCHOR90
+	.size	queue_tlc_prog_cmd, .-queue_tlc_prog_cmd
+	.section	.text.sblk_tlc_prog_one_page,"ax",%progbits
+	.align	1
+	.global	sblk_tlc_prog_one_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sblk_tlc_prog_one_page, %function
+sblk_tlc_prog_one_page:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, [r0]
+	push	{r4, r5, r6, lr}
+	mov	r5, r0
+	ldr	r6, [r3, #24]
+.L1565:
+	movs	r1, #1
+	mov	r0, r6
+	bl	queue_lun_state
+	mov	r4, r0
+	cbnz	r0, .L1566
+	mov	r0, r5
+	bl	queue_tlc_prog_cmd
+	mov	r0, r4
+	pop	{r4, r5, r6, pc}
+.L1566:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L1565
+	.size	sblk_tlc_prog_one_page, .-sblk_tlc_prog_one_page
+	.section	.text.sblk_xlc_prog_pages,"ax",%progbits
+	.align	1
+	.global	sblk_xlc_prog_pages
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sblk_xlc_prog_pages, %function
+sblk_xlc_prog_pages:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, [r0]
+	push	{r4, r5, r6, r7, r8, r10, lr}
+	mov	r4, r0
+	sub	sp, sp, #20
+	mov	r7, r1
+	mov	r10, r2
+	ldr	r5, [r3, #24]
+.L1568:
+	movs	r1, #1
+	mov	r0, r5
+	bl	queue_lun_state
+	cmp	r0, #0
+	bne	.L1569
+	cmp	r10, #2
+	bne	.L1570
+	ldr	r2, [r7]
+	movs	r1, #1
+	ldr	r3, [r4]
+	ldr	r6, [r2, #24]
+	ldr	r2, [r3, #12]
+	ldr	r5, [r3, #24]
+	ldrb	r0, [r3, #44]	@ zero_extendqisi2
+	ubfx	r6, r6, #0, #21
+	str	r2, [sp, #8]
+	movs	r2, #17
+	ldr	r3, [r3, #4]
+	ubfx	r8, r5, #0, #21
+	ubfx	r5, r5, #21, #3
+	str	r8, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r5
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r7]
+	movs	r1, #1
+	ldr	r2, [r4]
+	ldrb	r0, [r2, #44]	@ zero_extendqisi2
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	movs	r2, #26
+	ldr	r3, [r3, #4]
+	str	r6, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r5
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldm	r4, {r2, r3}
+	mov	r1, r10
+	ldrb	r0, [r2, #44]	@ zero_extendqisi2
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	movs	r2, #17
+	ldr	r3, [r3, #4]
+	str	r8, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r5
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r7, #4]
+	mov	r1, r10
+	ldr	r2, [r4]
+	ldrb	r0, [r2, #44]	@ zero_extendqisi2
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	movs	r2, #26
+	ldr	r3, [r3, #4]
+	str	r6, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r5
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r4, #8]
+	movs	r1, #3
+	ldr	r2, [r4]
+	ldrb	r0, [r2, #44]	@ zero_extendqisi2
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	movs	r2, #17
+	ldr	r3, [r3, #4]
+	str	r8, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r5
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r7, #8]
+	movs	r1, #3
+	ldr	r2, [r4]
+	ldrb	r0, [r2, #44]	@ zero_extendqisi2
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	movs	r2, #16
+	ldr	r3, [r3, #4]
+	str	r6, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r5
+	bl	flash_start_tlc_page_prog
+	ldr	r1, [r4]
+	movs	r3, #5
+	ldr	r0, .L1572
+	strb	r3, [r1, #42]
+	movs	r3, #1
+	strb	r3, [r1, #43]
+	movs	r3, #255
+	strb	r3, [r1]
+	bl	buf_add_tail
+.L1571:
+	movs	r0, #0
+	add	sp, sp, #20
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.L1569:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L1568
+.L1570:
+	mov	r0, r4
+	bl	queue_tlc_prog_cmd
+	b	.L1571
+.L1573:
+	.align	2
+.L1572:
+	.word	.LANCHOR90
+	.size	sblk_xlc_prog_pages, .-sblk_xlc_prog_pages
+	.section	.text.flash_start_page_prog,"ax",%progbits
+	.align	1
+	.global	flash_start_page_prog
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_start_page_prog, %function
+flash_start_page_prog:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r8, r2
+	ldr	r2, .L1585
+	mov	r10, r3
+	ubfx	r3, r1, #21, #3
+	mov	r7, r0
+	mov	fp, r1
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r2, r3
+	bhi	.L1575
+	mov	r2, #692
+	ldr	r1, .L1585+4
+	ldr	r0, .L1585+8
+	bl	printf
+.L1576:
+	b	.L1576
+.L1575:
+	ldr	r2, .L1585+12
+	ubfx	r4, r1, #0, #21
+	ldrb	r6, [r2, r3]	@ zero_extendqisi2
+	ldr	r3, .L1585+16
+	mov	r0, r6
+	ldr	r5, [r3]
+	bl	hynix_reconfig_rr_para
+	mov	r0, r6
+	bl	nandc_cs
+	tst	fp, #50331648
+	bne	.L1577
+	ldr	r3, .L1585+20
+	ldr	r2, .L1585+24
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L1578
+	ldrb	r3, [r2]	@ zero_extendqisi2
+	cbz	r3, .L1579
+.L1578:
+	ldr	r3, .L1585+28
+	mov	r0, r4
+	str	r2, [sp, #4]
+	ldrh	fp, [r3]
+	mov	r1, fp
+	bl	__aeabi_uidiv
+	mul	r3, fp, r0
+	mov	r1, fp
+	mov	r0, r4
+	str	r3, [sp]
+	bl	__aeabi_uidivmod
+	ldr	r2, [sp, #4]
+	ldr	r3, [sp]
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbz	r2, .L1580
+	add	r4, r3, r1, lsl #1
+.L1579:
+	mov	r0, r6
+	bl	flash_enter_slc_mode
+	b	.L1581
+.L1580:
+	ldr	r2, .L1585+32
+	ldrh	r4, [r2, r1, lsl #1]
+	add	r4, r4, r3
+.L1581:
+	add	r5, r5, r6, lsl #8
+	movs	r3, #128
+	mov	r0, r4
+	str	r3, [r5, #2056]
+	movs	r3, #0
+	str	r3, [r5, #2052]
+	str	r3, [r5, #2052]
+	uxtb	r3, r4
+	str	r3, [r5, #2052]
+	lsrs	r3, r4, #8
+	str	r3, [r5, #2052]
+	lsrs	r3, r4, #16
+	str	r3, [r5, #2052]
+	bl	nandc_set_seed
+	ldr	r1, .L1585+36
+	mov	r3, r10
+	mov	r2, r8
+	movs	r0, #1
+	ldrb	r1, [r1, #9]	@ zero_extendqisi2
+	bl	nandc_xfer_start
+	bl	nandc_xfer_done
+	str	r7, [r5, #2056]
+	mov	r0, r6
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	nandc_de_cs
+.L1577:
+	mov	r0, r6
+	bl	flash_exit_slc_mode
+	b	.L1581
+.L1586:
+	.align	2
+.L1585:
+	.word	.LANCHOR8
+	.word	.LANCHOR125
+	.word	.LC0
+	.word	.LANCHOR10
+	.word	.LANCHOR6
+	.word	.LANCHOR11
+	.word	.LANCHOR12
+	.word	.LANCHOR13
+	.word	.LANCHOR14
+	.word	.LANCHOR19
+	.size	flash_start_page_prog, .-flash_start_page_prog
+	.section	.text.queue_prog_cmd,"ax",%progbits
+	.align	1
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	queue_prog_cmd, %function
+queue_prog_cmd:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r4, r0
+	ldr	r3, [r0, #12]
+	ldr	r2, [r0, #4]
+	ldr	r1, [r0, #24]
+	movs	r0, #16
+	bl	flash_start_page_prog
+	ldr	r3, .L1595
+	ldr	r2, [r4, #24]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #255
+	beq	.L1588
+	ldr	r6, .L1595+4
+	ubfx	r2, r2, #21, #3
+	movs	r5, #48
+	mov	r7, r6
+.L1590:
+	mla	r1, r5, r3, r6
+	ldr	r0, [r1, #24]
+	ubfx	r0, r0, #21, #3
+	cmp	r2, r0
+	bne	.L1589
+	add	r0, r1, #42
+	ldrb	r1, [r1, #42]	@ zero_extendqisi2
+	cmp	r1, #6
+	bne	.L1589
+	movs	r3, #3
+	strb	r3, [r0]
+.L1588:
+	movs	r3, #3
+	mov	r1, r4
+	strb	r3, [r4, #42]
+	movs	r3, #1
+	strb	r3, [r4, #43]
+	movs	r3, #255
+	strb	r3, [r4]
+	ldr	r0, .L1595
+	pop	{r3, r4, r5, r6, r7, lr}
+	b	buf_add_tail
+.L1589:
+	muls	r3, r5, r3
+	ldrb	r3, [r7, r3]	@ zero_extendqisi2
+	cmp	r3, #255
+	bne	.L1590
+	b	.L1588
+.L1596:
+	.align	2
+.L1595:
+	.word	.LANCHOR90
+	.word	.LANCHOR36
+	.size	queue_prog_cmd, .-queue_prog_cmd
+	.section	.text.sblk_prog_page,"ax",%progbits
+	.align	1
+	.global	sblk_prog_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sblk_prog_page, %function
+sblk_prog_page:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldrh	r3, [r0, #34]
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r0
+	mov	r5, r1
+	cbz	r3, .L1598
+	ldr	r3, .L1620
+	ldr	r3, [r3]
+	lsls	r3, r3, #23
+	bpl	.L1598
+	mov	r2, r1
+	ldr	r1, [r0, #24]
+	ldr	r0, .L1620+4
+	bl	printf
+.L1598:
+	movs	r6, #0
+.L1599:
+	cbnz	r5, .L1610
+	mov	r0, r5
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1610:
+	ldrb	r7, [r4]	@ zero_extendqisi2
+	ldr	r10, [r4, #24]
+.L1600:
+	movs	r1, #1
+	mov	r0, r10
+	bl	queue_lun_state
+	mov	fp, r0
+	cbnz	r0, .L1601
+	cmp	r5, #1
+	beq	.L1602
+	ldr	r3, .L1620+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L1603
+.L1602:
+	mov	r0, r4
+	bl	queue_prog_cmd
+.L1604:
+	ldr	r3, .L1620+12
+	add	r7, r7, r7, lsl #1
+	subs	r5, r5, #1
+	add	r4, r3, r7, lsl #4
+	b	.L1599
+.L1601:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L1600
+.L1603:
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	ubfx	r2, r10, #21, #3
+	cmp	r3, #255
+	bne	.L1605
+	mov	r2, #478
+	ldr	r1, .L1620+16
+	ldr	r0, .L1620+20
+	bl	printf
+.L1606:
+	b	.L1606
+.L1605:
+	ldr	r0, .L1620+12
+	movs	r1, #48
+	mla	r3, r1, r3, r0
+	ldr	ip, [r3, #24]
+	ubfx	r3, ip, #21, #3
+	cmp	r2, r3
+	bne	.L1607
+	ldr	r3, .L1620+24
+	mov	r8, #1
+	ldrh	r1, [r3]
+	ldr	r3, .L1620+28
+	lsl	r2, r8, r1
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	rsb	r3, r1, #21
+	lsl	r3, r8, r3
+	subs	r2, r2, #1
+	uxth	r2, r2
+	subs	r0, r0, #1
+	subs	r3, r3, #1
+	ands	r3, r3, r0
+	and	lr, r2, r10
+	uxth	r3, r3
+	lsr	r10, r10, r1
+	lsr	r1, ip, r1
+	and	r10, r3, r10
+	ands	r1, r1, r3
+	and	r2, r2, ip
+	cmp	r10, r1
+	beq	.L1608
+	cmp	lr, r2
+	bne	.L1608
+	cmp	r6, r0
+	beq	.L1607
+	ldr	r3, [r4, #12]
+	movs	r0, #17
+	ldr	r2, [r4, #4]
+	add	r6, r6, r8
+	ldr	r1, [r4, #24]
+	bl	flash_start_page_prog
+	movs	r3, #8
+	strb	r8, [r4, #43]
+	strb	r3, [r4, #42]
+	movs	r3, #255
+	strb	r3, [r4]
+	mov	r1, r4
+	ldr	r0, .L1620+32
+	bl	buf_add_tail
+	b	.L1604
+.L1608:
+	mov	r0, r4
+	movs	r6, #0
+	bl	queue_prog_cmd
+	b	.L1604
+.L1607:
+	mov	r0, r4
+	mov	r6, fp
+	bl	queue_prog_cmd
+	b	.L1604
+.L1621:
+	.align	2
+.L1620:
+	.word	.LANCHOR22
+	.word	.LC58
+	.word	.LANCHOR23
+	.word	.LANCHOR36
+	.word	.LANCHOR126
+	.word	.LC0
+	.word	.LANCHOR71
+	.word	.LANCHOR70
+	.word	.LANCHOR90
+	.size	sblk_prog_page, .-sblk_prog_page
+	.section	.text.ftl_flush,"ax",%progbits
+	.align	1
+	.global	ftl_flush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_flush, %function
+ftl_flush:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	ldr	r4, .L1627
+	ldr	r5, .L1627+4
+	ldrb	r1, [r4]	@ zero_extendqisi2
+	cbz	r1, .L1623
+	ldrb	r0, [r5]	@ zero_extendqisi2
+	ldr	r3, .L1627+8
+	add	r0, r0, r0, lsl #1
+	add	r0, r3, r0, lsl #4
+	bl	sblk_prog_page
+.L1623:
+	movs	r3, #255
+	strb	r3, [r5]
+	movs	r3, #0
+	strb	r3, [r4]
+	bl	sblk_wait_write_queue_completed
+	bl	ftl_write_completed
+	movw	r0, #65535
+	pop	{r3, r4, r5, lr}
+	b	ftl_vpn_decrement
+.L1628:
+	.align	2
+.L1627:
+	.word	.LANCHOR89
+	.word	.LANCHOR127
+	.word	.LANCHOR36
+	.size	ftl_flush, .-ftl_flush
+	.section	.text.flash_prog_page_en,"ax",%progbits
+	.align	1
+	.global	flash_prog_page_en
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_prog_page_en, %function
+flash_prog_page_en:
+	@ args = 8, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r8, r3
+	ldr	r3, .L1658
+	mov	r7, r0
+	mov	r5, r1
+	mov	r10, r2
+	ldrb	r6, [sp, #52]	@ zero_extendqisi2
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r0
+	bhi	.L1630
+	mov	r2, #480
+	ldr	r1, .L1658+4
+	ldr	r0, .L1658+8
+	bl	printf
+.L1631:
+	b	.L1631
+.L1630:
+	ldr	r3, .L1658+12
+	tst	r1, #50331648
+	ldrb	fp, [r3, r0]	@ zero_extendqisi2
+	bne	.L1642
+	ldr	r3, .L1658+16
+	ldr	r2, .L1658+20
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L1633
+	ldrb	r3, [r2]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L1642
+.L1633:
+	ldr	r3, .L1658+24
+	mov	r0, r5
+	str	r2, [sp, #12]
+	ldrh	r4, [r3]
+	mov	r1, r4
+	bl	__aeabi_uidiv
+	mul	r3, r4, r0
+	mov	r1, r4
+	mov	r0, r5
+	str	r3, [sp, #8]
+	bl	__aeabi_uidivmod
+	ldr	r2, [sp, #12]
+	ldr	r3, [sp, #8]
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r2, #0
+	beq	.L1634
+	add	r4, r3, r1, lsl #1
+.L1632:
+	ldr	r3, .L1658+28
+	ldr	r3, [r3]
+	lsls	r2, r3, #27
+	bpl	.L1635
+	mov	r2, r5
+	mov	r1, fp
+	ldr	r0, .L1658+32
+	bl	printf
+.L1635:
+	ldr	r3, [sp, #48]
+	mov	r0, fp
+	mov	r2, r10
+	mov	r1, r4
+	str	r3, [sp]
+	mov	r3, r8
+	bl	flash_prog_page
+	mov	fp, r0
+	cmp	r6, #0
+	beq	.L1636
+	ldr	r3, [sp, #48]
+	mov	r1, r5
+	ldr	r6, .L1658+36
+	mov	r0, r7
+	ldr	r4, .L1658+40
+	str	r3, [sp]
+	ldr	r3, [r6]
+	ldr	r2, [r4]
+	bl	flash_read_page_en
+	adds	r3, r0, #1
+	beq	.L1637
+	cmp	r0, #512
+	beq	.L1637
+	ldr	r3, [r4]
+	ldr	r2, [r10]
+	ldr	r3, [r3]
+	cmp	r2, r3
+	bne	.L1637
+	ldr	r3, [r6]
+	ldr	r2, [r8]
+	ldr	r3, [r3]
+	cmp	r2, r3
+	beq	.L1636
+.L1637:
+	movs	r3, #4
+	ldr	r1, [r6]
+	mov	r2, r3
+	ldr	r0, .L1658+44
+	bl	rknand_print_hex
+	movs	r3, #4
+	ldr	r1, [r4]
+	mov	r2, r3
+	ldr	r0, .L1658+48
+	bl	rknand_print_hex
+.L1638:
+	mov	r1, r5
+	ldr	r0, .L1658+52
+	bl	printf
+	mov	r2, #506
+	ldr	r1, .L1658+4
+	ldr	r0, .L1658+8
+	bl	printf
+.L1640:
+	b	.L1640
+.L1634:
+	ldr	r2, .L1658+56
+	ldrh	r4, [r2, r1, lsl #1]
+	add	r4, r4, r3
+	b	.L1632
+.L1642:
+	mov	r4, r5
+	b	.L1632
+.L1636:
+	cmp	fp, #-1
+	beq	.L1638
+	mov	r0, fp
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1659:
+	.align	2
+.L1658:
+	.word	.LANCHOR8
+	.word	.LANCHOR128
+	.word	.LC0
+	.word	.LANCHOR10
+	.word	.LANCHOR11
+	.word	.LANCHOR12
+	.word	.LANCHOR13
+	.word	.LANCHOR22
+	.word	.LC59
+	.word	.LANCHOR118
+	.word	.LANCHOR119
+	.word	.LC60
+	.word	.LC61
+	.word	.LC62
+	.word	.LANCHOR14
+	.size	flash_prog_page_en, .-flash_prog_page_en
+	.section	.text.ftl_test_block,"ax",%progbits
+	.align	1
+	.global	ftl_test_block
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_test_block, %function
+ftl_test_block:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r5, #0
+	ldr	r3, .L1677
+	mov	r10, r0
+	ldr	fp, .L1677+32
+	str	r5, [r3]
+	ldr	r3, .L1677+4
+	str	r5, [r3]
+.L1661:
+	uxth	r3, r5
+	str	r3, [sp, #12]
+	ldr	r3, .L1677+8
+	ldr	r2, [sp, #12]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r2
+	bls	.L1668
+	mov	r8, #0
+	b	.L1669
+.L1667:
+	ldr	r3, .L1677+12
+	ldr	r3, [r3]
+	lsls	r3, r3, #19
+	bpl	.L1662
+	mov	r1, r10
+	ldr	r0, .L1677+16
+	bl	printf
+.L1662:
+	ldrb	r4, [fp]	@ zero_extendqisi2
+	ldr	r3, [sp, #12]
+	smulbb	r4, r4, r10
+	add	r4, r4, r6
+	uxth	r4, r4
+	cbnz	r3, .L1663
+	ldr	r3, .L1677+20
+	ldr	r3, [r3]
+	ldrb	r3, [r3, #47]	@ zero_extendqisi2
+	cmp	r3, r4
+	bcs	.L1664
+.L1663:
+	uxtb	r6, r5
+	mov	r1, r4
+	mov	r0, r6
+	bl	flash_check_bad_block
+	cbnz	r0, .L1664
+	ldr	r3, .L1677+24
+	mov	r0, r6
+	ldrh	r7, [r3]
+	muls	r7, r4, r7
+	mov	r1, r7
+	bl	flash_erase_block
+	cbz	r0, .L1666
+.L1676:
+	mov	r1, r4
+	mov	r0, r6
+	bl	flash_mask_bad_block
+	b	.L1664
+.L1666:
+	movs	r3, #1
+	ldr	r2, .L1677
+	str	r3, [sp, #4]
+	mov	r1, r7
+	ldr	r3, .L1677+28
+	mov	r0, r6
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r3, [sp]
+	ldr	r3, .L1677+4
+	bl	flash_prog_page_en
+	cmp	r0, #0
+	bne	.L1676
+.L1664:
+	add	r8, r8, #1
+.L1669:
+	ldrb	r3, [fp]	@ zero_extendqisi2
+	uxth	r6, r8
+	cmp	r3, r6
+	bhi	.L1667
+	adds	r5, r5, #1
+	b	.L1661
+.L1668:
+	movs	r0, #0
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1678:
+	.align	2
+.L1677:
+	.word	ftl_tmp_buffer
+	.word	.LANCHOR121
+	.word	.LANCHOR76
+	.word	.LANCHOR22
+	.word	.LC63
+	.word	.LANCHOR5
+	.word	.LANCHOR75
+	.word	.LANCHOR45
+	.word	.LANCHOR70
+	.size	ftl_test_block, .-ftl_test_block
+	.section	.text.ftl_prog_page,"ax",%progbits
+	.align	1
+	.global	ftl_prog_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_prog_page, %function
+ftl_prog_page:
+	@ args = 4, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r4, r5, r6, r7, lr}
+	mov	r7, r3
+	mov	r4, r0
+	mov	r5, r1
+	mov	r6, r2
+	bl	sblk_wait_write_queue_completed
+	movs	r3, #1
+	mov	r2, r6
+	str	r3, [sp, #4]
+	mov	r1, r5
+	ldr	r3, [sp, #32]
+	mov	r0, r4
+	str	r3, [sp]
+	mov	r3, r7
+	bl	flash_prog_page_en
+	adds	r3, r0, #1
+	bne	.L1679
+	movw	r2, #1414
+	ldr	r1, .L1682
+	ldr	r0, .L1682+4
+	bl	printf
+.L1681:
+	b	.L1681
+.L1679:
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, r6, r7, pc}
+.L1683:
+	.align	2
+.L1682:
+	.word	.LANCHOR129
+	.word	.LC0
+	.size	ftl_prog_page, .-ftl_prog_page
+	.section	.text.ftl_info_flush,"ax",%progbits
+	.align	1
+	.global	ftl_info_flush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_info_flush, %function
+ftl_info_flush:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r8, #0
+	ldr	r4, .L1721
+	movs	r1, #0
+	ldr	r6, .L1721+4
+	ldrb	r2, [r4]	@ zero_extendqisi2
+	mov	fp, r4
+	str	r0, [sp, #12]
+	mov	r4, r6
+	ldr	r0, .L1721+8
+	lsls	r2, r2, #1
+	bl	ftl_memset
+.L1685:
+	ldr	r7, .L1721+12
+	ldr	r1, [sp, #12]
+	ldrb	r10, [r6]	@ zero_extendqisi2
+	ldrh	r3, [r7]
+	ldrh	r5, [r6, #2]
+	str	r3, [sp, #8]
+	ldr	r3, .L1721+16
+	ldr	r2, [r3]
+	ldr	r3, [r2, #4]
+	adds	r3, r3, #1
+	str	r3, [r2, #4]
+	ldr	r2, .L1721+8
+	stm	r2, {r1, r3}
+	ldr	r2, .L1721+20
+	ldr	r2, [r2]
+	lsls	r2, r2, #19
+	bpl	.L1686
+	mov	r2, r5
+	mov	r1, r10
+	ldr	r0, .L1721+24
+	bl	printf
+.L1686:
+	ldr	r3, .L1721+28
+	ldrh	r0, [r4, #2]
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bhi	.L1687
+	ldr	r2, .L1721+32
+	movs	r0, #0
+	ldrb	r3, [r4, #1]	@ zero_extendqisi2
+	ldr	r5, [r2]
+	ldrb	r2, [r4]	@ zero_extendqisi2
+.L1694:
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	cmp	r3, #7
+	bls	.L1688
+	add	lr, r5, #40
+	movs	r1, #0
+.L1693:
+	ldrb	r8, [lr], #1	@ zero_extendqisi2
+	uxth	ip, r1
+	cmp	r8, #128
+	bls	.L1689
+	cmp	r8, #255
+	beq	.L1690
+	strb	r3, [r4, #1]
+	cbz	r0, .L1691
+	strb	r2, [r4]
+.L1691:
+	movs	r2, #156
+	ldr	r1, .L1721+36
+	ldr	r0, .L1721+40
+	bl	printf
+.L1692:
+	b	.L1692
+.L1690:
+	adds	r1, r1, #1
+	cmp	r1, #8
+	bne	.L1693
+	mov	ip, r1
+.L1689:
+	uxtb	r3, ip
+	mov	r8, #1
+.L1688:
+	adds	r2, r5, r3
+	ldrb	r2, [r2, #40]	@ zero_extendqisi2
+	movs	r0, #1
+	cmp	r2, #255
+	beq	.L1694
+	ldrh	r5, [r7]
+	movs	r0, #0
+	strb	r3, [r4, #1]
+	strb	r2, [r4]
+	muls	r5, r2, r5
+	mov	r1, r5
+	bl	flash_erase_block
+	ldrb	r3, [fp]	@ zero_extendqisi2
+	mov	r1, r5
+	ldr	r2, .L1721+44
+	movs	r0, #0
+	str	r3, [sp]
+	ldr	r3, .L1721+8
+	bl	ftl_prog_page
+	movs	r3, #1
+	add	r5, r5, r3
+	strh	r3, [r4, #2]	@ movhi
+.L1695:
+	ldrb	r3, [fp]	@ zero_extendqisi2
+	mov	r1, r5
+	ldr	r2, .L1721+44
+	movs	r0, #0
+	str	r3, [sp]
+	ldr	r3, .L1721+8
+	bl	ftl_prog_page
+	ldrh	r3, [r4, #2]
+	adds	r0, r0, #1
+	add	r3, r3, #1
+	strh	r3, [r4, #2]	@ movhi
+	beq	.L1685
+	cmp	r8, #0
+	bne	.L1696
+.L1704:
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	cmp	r3, #255
+	bne	.L1720
+	movs	r2, #191
+	ldr	r1, .L1721+36
+	ldr	r0, .L1721+40
+	bl	printf
+.L1705:
+	b	.L1705
+.L1687:
+	ldr	r3, [sp, #8]
+	mla	r5, r10, r3, r5
+	cmp	r0, #0
+	bne	.L1695
+	mov	r1, r5
+	bl	flash_erase_block
+	b	.L1695
+.L1696:
+	ldrb	r5, [r4, #1]	@ zero_extendqisi2
+	ldr	r6, .L1721+32
+	adds	r5, r5, #1
+.L1699:
+	cmp	r5, #7
+	bhi	.L1704
+	ldr	r3, [r6]
+	add	r3, r3, r5
+	ldrb	r3, [r3, #40]	@ zero_extendqisi2
+	uxth	r2, r3
+	cmp	r2, #128
+	bls	.L1700
+	cmp	r2, #255
+	beq	.L1701
+	movs	r2, #184
+	ldr	r1, .L1721+36
+	ldr	r0, .L1721+40
+	bl	printf
+.L1702:
+	b	.L1702
+.L1700:
+	ldr	r2, .L1721+12
+	movs	r0, #0
+	ldrh	r1, [r2]
+	muls	r1, r3, r1
+	bl	flash_erase_block
+.L1701:
+	adds	r5, r5, #1
+	uxth	r5, r5
+	b	.L1699
+.L1720:
+	movs	r0, #0
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1722:
+	.align	2
+.L1721:
+	.word	.LANCHOR45
+	.word	.LANCHOR131
+	.word	.LANCHOR130
+	.word	.LANCHOR75
+	.word	.LANCHOR46
+	.word	.LANCHOR22
+	.word	.LC64
+	.word	.LANCHOR79
+	.word	.LANCHOR5
+	.word	.LANCHOR132
+	.word	.LC0
+	.word	ftl_info_data_buffer
+	.size	ftl_info_flush, .-ftl_info_flush
+	.section	.text.ftl_info_blk_init,"ax",%progbits
+	.align	1
+	.global	ftl_info_blk_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_info_blk_init, %function
+ftl_info_blk_init:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #0
+	ldr	r3, .L1755
+	mov	r1, r4
+	mov	r2, #16384
+	ldr	r0, .L1755+4
+	strb	r4, [r3]
+	ldr	r3, .L1755+8
+	ldr	r5, .L1755+12
+	ldr	r6, .L1755+16
+	str	r0, [r3]
+	ldr	r3, .L1755+20
+	ldrh	r3, [r3]
+	add	r3, r0, r3, lsl #2
+	str	r3, [r5]
+	bl	ftl_memset
+	mov	r2, #16384
+	mov	r1, r4
+	ldr	r0, .L1755+24
+	bl	ftl_memset
+	ldr	r2, [r6]
+	ldr	r3, .L1755+28
+	ldrb	r2, [r2, #40]	@ zero_extendqisi2
+	strb	r4, [r3, #1]
+	strh	r4, [r3, #2]	@ movhi
+	movs	r4, #7
+	strb	r2, [r3]
+	str	r3, [sp, #12]
+.L1725:
+	ldr	r3, [r6]
+	sxth	r8, r4
+	add	r3, r3, r4
+	ldrb	r7, [r3, #40]	@ zero_extendqisi2
+	cmp	r7, #255
+	bne	.L1724
+.L1729:
+	adds	r4, r4, #-1
+	bcs	.L1725
+	mov	r8, #0
+.L1726:
+	ldr	r3, .L1755+32
+	ldr	r3, [r3]
+	lsls	r1, r3, #19
+	bpl	.L1730
+	ldr	r3, [r5]
+	mov	r2, #4800
+	mov	r1, r4
+	ldr	r0, .L1755+36
+	ldr	r3, [r3]
+	bl	printf
+.L1730:
+	adds	r2, r4, #1
+	bne	.L1731
+	mov	r2, #16384
+	movs	r1, #0
+	ldr	r0, .L1755+4
+	bl	ftl_memset
+	ldr	r3, [r5]
+	mov	r0, r4
+	ldr	r2, .L1755+40
+	str	r2, [r3]
+.L1723:
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1724:
+	ldr	r3, .L1755+44
+	movs	r0, #0
+	ldr	fp, .L1755+56
+	ldr	r2, .L1755+4
+	ldrh	r3, [r3]
+	muls	r7, r3, r7
+	ldrb	r3, [fp]	@ zero_extendqisi2
+	str	r3, [sp]
+	mov	r1, r7
+	ldr	r3, .L1755+48
+	bl	ftl_read_page
+	cmp	r0, #-1
+	mov	r10, r0
+	bne	.L1727
+	ldrb	r3, [fp]	@ zero_extendqisi2
+	adds	r1, r7, #1
+	ldr	r2, .L1755+4
+	movs	r0, #0
+	str	r3, [sp]
+	ldr	r3, .L1755+48
+	bl	ftl_read_page
+	mov	r10, r0
+.L1727:
+	ldr	r3, .L1755+32
+	ldr	r3, [r3]
+	lsls	r0, r3, #19
+	bpl	.L1728
+	ldr	r3, [r5]
+	mov	r2, r10
+	mov	r1, r4
+	ldr	r0, .L1755+52
+	ldr	r3, [r3]
+	str	r3, [sp]
+	movs	r3, #64
+	bl	printf
+.L1728:
+	cmp	r10, #-1
+	beq	.L1729
+	ldr	r3, [r5]
+	ldr	r2, .L1755+40
+	ldr	r3, [r3]
+	cmp	r3, r2
+	bne	.L1729
+	mov	r4, r8
+	b	.L1726
+.L1731:
+	ldr	r3, [r6]
+	movs	r0, #0
+	ldr	r2, .L1755+4
+	movs	r4, #0
+	ldr	r10, .L1755+40
+	add	r3, r3, r8
+	ldrb	r1, [r3, #40]	@ zero_extendqisi2
+	ldr	r3, [sp, #12]
+	strb	r8, [r3, #1]
+	strb	r1, [r3]
+	movs	r3, #4
+	str	r3, [sp]
+	ldr	r3, .L1755+48
+	bl	flash_get_last_written_page
+	uxth	r6, r0
+	mov	r7, r0
+	adds	r3, r6, #1
+	uxth	r8, r3
+	ldr	r3, [sp, #12]
+	ldrb	fp, [r3]	@ zero_extendqisi2
+	ldr	r3, .L1755+44
+	ldrh	r3, [r3]
+	mul	fp, r3, fp
+.L1733:
+	subs	r3, r6, r4
+	lsls	r3, r3, #16
+	bmi	.L1738
+	ldr	r3, .L1755+56
+	add	r1, r7, fp
+	ldr	r2, .L1755+4
+	subs	r1, r1, r4
+	movs	r0, #0
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r3, [sp]
+	ldr	r3, .L1755+48
+	bl	ftl_read_page
+	adds	r0, r0, #1
+	beq	.L1734
+	ldr	r3, [r5]
+	ldr	r3, [r3]
+	cmp	r3, r10
+	bne	.L1734
+.L1738:
+	ldr	r3, [sp, #12]
+	strh	r8, [r3, #2]	@ movhi
+	ldr	r3, [r5]
+	ldr	r2, [r3, #16]
+	cmp	r2, #2048
+	bhi	.L1735
+.L1736:
+	ldr	r2, [r3, #24]
+	cmp	r2, #2048
+	bls	.L1739
+	ldr	r1, [r3, #28]
+	add	r1, r1, r2, lsr #11
+	ubfx	r2, r2, #0, #11
+	str	r2, [r3, #24]
+	str	r1, [r3, #28]
+.L1739:
+	ldr	r2, [r3, #32]
+	cmp	r2, #1024
+	bls	.L1740
+	ldr	r1, [r3, #36]
+	add	r1, r1, r2, lsr #10
+	ubfx	r2, r2, #0, #10
+	str	r2, [r3, #32]
+	str	r1, [r3, #36]
+.L1740:
+	ldr	r2, [r3, #40]
+	cmp	r2, #1024
+	bls	.L1741
+	ldr	r1, [r3, #44]
+	add	r1, r1, r2, lsr #10
+	ubfx	r2, r2, #0, #10
+	str	r2, [r3, #40]
+	str	r1, [r3, #44]
+.L1741:
+	ldr	r2, [r3, #64]
+	movs	r0, #0
+	adds	r2, r2, #1
+	str	r2, [r3, #64]
+	bl	ftl_info_flush
+	movs	r0, #0
+	bl	ftl_info_flush
+	movs	r0, #0
+	b	.L1723
+.L1734:
+	adds	r4, r4, #1
+	b	.L1733
+.L1735:
+	ldr	r1, [r3, #20]
+	add	r1, r1, r2, lsr #11
+	ubfx	r2, r2, #0, #11
+	str	r2, [r3, #16]
+	str	r1, [r3, #20]
+	b	.L1736
+.L1756:
+	.align	2
+.L1755:
+	.word	.LANCHOR133
+	.word	ftl_info_data_buffer
+	.word	.LANCHOR57
+	.word	.LANCHOR46
+	.word	.LANCHOR5
+	.word	.LANCHOR54
+	.word	ftl_ext_info_data_buffer
+	.word	.LANCHOR131
+	.word	.LANCHOR22
+	.word	.LC66
+	.word	1229739078
+	.word	.LANCHOR75
+	.word	.LANCHOR130
+	.word	.LC65
+	.word	.LANCHOR45
+	.size	ftl_info_blk_init, .-ftl_info_blk_init
+	.section	.text.ftl_ext_info_flush,"ax",%progbits
+	.align	1
+	.global	ftl_ext_info_flush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_ext_info_flush, %function
+ftl_ext_info_flush:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1771
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r3, [r3]
+	ldr	r2, [r3, #520]
+	cbz	r2, .L1758
+	movs	r2, #0
+	str	r2, [r3, #520]
+.L1758:
+	ldr	r5, .L1771+4
+	movs	r0, #0
+	bl	ftl_total_vpn_update
+	mov	r4, r5
+.L1767:
+	ldr	r3, [r5]
+	ldr	r2, [r3, #56]
+	adds	r2, r2, #1
+	str	r2, [r3, #56]
+	ldrh	r2, [r3, #140]
+	ldr	r3, .L1771+8
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L1759
+	bl	ftl_ext_alloc_new_blk
+.L1759:
+	ldr	r0, [r4]
+	movw	r3, #65535
+	ldrh	r1, [r0, #130]
+	cmp	r1, r3
+	bne	.L1760
+	mov	r2, #1048
+	ldr	r1, .L1771+12
+	ldr	r0, .L1771+16
+	bl	printf
+.L1761:
+	b	.L1761
+.L1760:
+	ldr	r3, .L1771+20
+	movs	r7, #0
+	ldr	fp, .L1771+32
+	ldr	r10, .L1771+36
+	ldrh	r3, [r3]
+	rsb	r2, r3, #21
+	movs	r3, #1
+	asr	r6, r1, r2
+	lsls	r3, r3, r2
+	ldr	r2, .L1771+24
+	subs	r3, r3, #1
+	ands	r3, r3, r1
+	movs	r1, #0
+	ldrh	r8, [r2]
+	ldrh	r2, [r0, #140]
+	mov	r0, r10
+	smlabb	r3, r8, r3, r2
+	ldrb	r2, [fp]	@ zero_extendqisi2
+	uxth	r8, r3
+	lsls	r2, r2, #1
+	bl	ftl_memset
+	ldr	r3, [r4]
+	mov	r1, r8
+	ldr	r2, .L1771+28
+	uxtb	r0, r6
+	str	r7, [r10]
+	ldr	r3, [r3, #56]
+	str	r3, [r10, #4]
+	ldrb	r3, [fp]	@ zero_extendqisi2
+	str	r3, [sp]
+	mov	r3, r10
+	bl	ftl_prog_page
+	ldr	r2, [r4]
+	ldrh	r3, [r2, #140]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	cmp	r3, #1
+	strh	r3, [r2, #140]	@ movhi
+	beq	.L1767
+	adds	r0, r0, #1
+	beq	.L1767
+	mov	r0, r7
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1772:
+	.align	2
+.L1771:
+	.word	.LANCHOR60
+	.word	.LANCHOR46
+	.word	.LANCHOR79
+	.word	.LANCHOR134
+	.word	.LC0
+	.word	.LANCHOR71
+	.word	.LANCHOR75
+	.word	ftl_ext_info_data_buffer
+	.word	.LANCHOR45
+	.word	.LANCHOR130
+	.size	ftl_ext_info_flush, .-ftl_ext_info_flush
+	.section	.text.ftl_ext_info_init,"ax",%progbits
+	.align	1
+	.global	ftl_ext_info_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_ext_info_init, %function
+ftl_ext_info_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r2, #0
+	ldr	r3, .L1790
+	ldr	r5, .L1790+4
+	strh	r2, [r3]	@ movhi
+	ldr	r2, .L1790+8
+	ldr	r3, [r5]
+	mov	r10, r5
+	ldrh	r4, [r3, #130]
+	ldr	r3, .L1790+12
+	ubfx	r8, r4, #0, #14
+	ldrh	r3, [r3]
+	mov	r1, r8
+	rsb	r3, r3, #21
+	asrs	r4, r4, r3
+	movs	r3, #4
+	str	r3, [sp]
+	uxtb	r4, r4
+	ldr	r3, .L1790+16
+	mov	r0, r4
+	bl	flash_get_last_written_page
+	ldr	r3, .L1790+20
+	mov	r6, r0
+	ldr	r3, [r3]
+	tst	r3, #4096
+	beq	.L1774
+	mov	r3, r0
+	movw	r2, #1091
+	ldr	r1, .L1790+24
+	ldr	r0, .L1790+28
+	bl	printf
+.L1774:
+	ldr	fp, .L1790+48
+	movs	r7, #0
+.L1775:
+	uxth	r5, r6
+	subs	r3, r5, r7
+	lsls	r3, r3, #16
+	bmi	.L1780
+	ldr	r3, .L1790+32
+	subs	r1, r6, r7
+	ldr	r2, .L1790+8
+	ldrh	r0, [r3]
+	ldr	r3, .L1790+36
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	mla	r1, r8, r0, r1
+	mov	r0, r4
+	str	r3, [sp]
+	ldr	r3, .L1790+16
+	bl	flash_read_page_en
+	adds	r2, r0, #1
+	beq	.L1776
+	cmp	r0, #512
+	beq	.L1776
+	ldr	r3, .L1790+40
+	ldr	r3, [r3]
+	ldr	r3, [r3]
+	cmp	r3, fp
+	bne	.L1776
+.L1780:
+	ldr	r3, [r10]
+	ldrh	r2, [r3, #140]
+	cmp	r2, r6
+	bgt	.L1778
+	adds	r5, r5, #1
+	strh	r5, [r3, #140]	@ movhi
+	bl	ftl_ext_info_flush
+.L1778:
+	ldr	r3, .L1790+40
+	movs	r0, #0
+	movw	r2, #65535
+	ldr	r3, [r3]
+	str	r0, [r3, #520]
+	ldr	r3, .L1790+44
+	strh	r2, [r3]	@ movhi
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1776:
+	adds	r7, r7, #1
+	b	.L1775
+.L1791:
+	.align	2
+.L1790:
+	.word	.LANCHOR86
+	.word	.LANCHOR46
+	.word	ftl_ext_info_data_buffer
+	.word	.LANCHOR71
+	.word	.LANCHOR130
+	.word	.LANCHOR22
+	.word	.LANCHOR135
+	.word	.LC28
+	.word	.LANCHOR75
+	.word	.LANCHOR45
+	.word	.LANCHOR60
+	.word	.LANCHOR87
+	.word	1162432070
+	.size	ftl_ext_info_init, .-ftl_ext_info_init
+	.section	.text.ftl_low_format,"ax",%progbits
+	.align	1
+	.global	ftl_low_format
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_low_format, %function
+ftl_low_format:
+	@ args = 0, pretend = 0, frame = 32
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #8
+	ldr	r5, .L1829
+	sub	sp, sp, #40
+.L1796:
+	ldr	r3, [r5]
+	add	r3, r3, r4
+	ldrb	r3, [r3, #32]	@ zero_extendqisi2
+	cmp	r3, #128
+	ble	.L1793
+	cmp	r3, #255
+	beq	.L1794
+	movw	r2, #1228
+	ldr	r1, .L1829+4
+	ldr	r0, .L1829+8
+	bl	printf
+.L1795:
+	b	.L1795
+.L1793:
+	ldr	r2, .L1829+12
+	movs	r0, #0
+	ldrh	r1, [r2]
+	muls	r1, r3, r1
+	bl	flash_erase_block
+.L1794:
+	adds	r4, r4, #1
+	cmp	r4, #16
+	bne	.L1796
+	ldr	r4, .L1829+16
+	mov	r10, #0
+	bl	sblk_init
+	bl	ftl_info_blk_init
+	mov	r2, #16384
+	movs	r1, #0
+	ldr	r0, .L1829+20
+	bl	ftl_memset
+	ldr	r3, [r4]
+	ldr	r2, .L1829+24
+	str	r2, [r3]
+.L1797:
+	ldr	r3, .L1829+28
+	uxth	r0, r10
+	ldr	r6, .L1829+32
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bhi	.L1804
+	ldr	r7, .L1829+36
+	mov	r2, #16384
+	movs	r1, #0
+	ldr	r0, .L1829+40
+	bl	ftl_memset
+	ldr	r3, [r7]
+	ldr	r2, .L1829+44
+	str	r2, [r3]
+	ldr	r3, .L1829+48
+	ldrb	r8, [r3]	@ zero_extendqisi2
+	ldr	r3, .L1829
+	mov	r1, r8
+	ldr	r3, [r3]
+	ldrb	r0, [r3, #47]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	ldr	ip, [r6]
+	uxtb	r0, r0
+	cmp	r8, #1
+	str	r7, [sp, #8]
+	add	r5, r0, #1
+	mov	r3, #0
+	ite	eq
+	moveq	r0, #1
+	movne	r0, #3
+.L1805:
+	add	r1, ip, r3, lsl #2
+	adds	r3, r3, #1
+	ldrb	r2, [r1, #2]	@ zero_extendqisi2
+	strb	r0, [r1, #3]
+	orn	r2, r2, #31
+	bfc	r2, #3, #2
+	strb	r2, [r1, #2]
+	uxth	r2, r3
+	cmp	r5, r2
+	bhi	.L1805
+	mov	r1, r8
+	movs	r0, #16
+	bl	__aeabi_idiv
+	ldr	r3, [r4]
+	add	r0, r0, r5
+	uxth	r0, r0
+	strh	r0, [r3, #134]	@ movhi
+	ldr	r3, .L1829+52
+	ldr	r3, [r3]
+	lsls	r3, r3, #19
+	bpl	.L1806
+	str	r0, [sp]
+	mov	r3, r5
+	movs	r2, #128
+	movw	r1, #1265
+	ldr	r0, .L1829+56
+	bl	printf
+.L1806:
+	ldr	r0, [r4]
+	movs	r2, #128
+	movs	r1, #255
+	adds	r0, r0, #160
+	bl	ftl_memset
+	ldr	r3, [r6]
+	ldr	r0, [r4]
+	str	r3, [sp, #24]
+	ldr	r3, .L1829+60
+	ldrh	ip, [r0, #134]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r3, [sp, #28]
+	ldr	r3, .L1829+48
+	ldrb	fp, [r3]	@ zero_extendqisi2
+	uxth	r3, fp
+	str	r3, [sp, #16]
+	ldrh	r3, [sp, #16]
+	smulbb	r2, r5, r3
+	ldr	r3, .L1829+64
+	ldrh	r1, [r3]
+	uxth	r2, r2
+	str	r3, [sp, #36]
+	rsb	r6, r1, #21
+	movs	r1, #1
+	lsls	r1, r1, r6
+	movs	r6, #0
+	uxth	r1, r1
+	str	r1, [sp, #32]
+.L1807:
+	cmp	r5, ip
+	bcc	.L1813
+	ldr	r3, .L1829+28
+	mov	r2, ip
+	mov	lr, #1
+	ldrh	r1, [r3]
+	ldr	r3, [sp, #24]
+	add	r3, r3, ip, lsl #2
+.L1814:
+	cmp	r2, r1
+	bcc	.L1815
+	sub	ip, r1, ip
+	movs	r5, #0
+	strh	ip, [r0, #116]	@ movhi
+	strh	r6, [r0, #112]	@ movhi
+	strh	r5, [r0, #114]	@ movhi
+	strh	r5, [r0, #118]	@ movhi
+	movs	r0, #1
+	bl	ftl_alloc_sblk
+	mov	r1, r5
+	mov	r6, r0
+	bl	ftl_erase_sblk
+	ldr	r1, [r4]
+	mov	r0, r6
+	add	r1, r1, #672
+	bl	ftl_get_blk_list_in_sblk
+	ldr	r0, [r4]
+	movw	r2, #65533
+	ldrh	r8, [r0, #672]
+	strh	r5, [r0, #690]	@ movhi
+	add	r3, r8, #-1
+	uxth	r3, r3
+	cmp	r3, r2
+	bls	.L1816
+	movw	r2, #1297
+	ldr	r1, .L1829+4
+	ldr	r0, .L1829+8
+	bl	printf
+.L1817:
+	b	.L1817
+.L1804:
+	ldr	r3, .L1829+68
+	strh	r0, [r3]	@ movhi
+	bl	ftl_test_block
+	ldr	r3, .L1829+60
+	uxth	r1, r10
+	ldr	r5, [r6]
+	movs	r6, #0
+	mov	fp, r6
+	mov	r7, r6
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r5, r5, r1, lsl #2
+	str	r3, [sp, #8]
+	ldr	r3, .L1829+48
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	uxth	r2, r3
+	str	r2, [sp, #12]
+	mul	r2, r3, r1
+.L1798:
+	ldr	r0, [sp, #8]
+	uxth	r1, fp
+	cmp	r0, r1
+	bhi	.L1818
+	cbnz	r7, .L1803
+	ldrb	r3, [r5, #2]	@ zero_extendqisi2
+	orr	r3, r3, #224
+	strb	r3, [r5, #2]
+.L1803:
+	add	r10, r10, #1
+	b	.L1797
+.L1801:
+	add	r1, r8, r2
+	ldr	r0, [sp, #16]
+	str	r3, [sp, #24]
+	str	r2, [sp, #20]
+	bl	flash_check_bad_block
+	ldr	r2, [sp, #20]
+	ldr	r3, [sp, #24]
+	cbz	r0, .L1799
+	ldrb	r0, [r5, #3]	@ zero_extendqisi2
+	movs	r1, #1
+	lsl	r1, r1, r8
+	orrs	r1, r1, r0
+	strb	r1, [r5, #3]
+.L1800:
+	add	r8, r8, #1
+.L1802:
+	sub	r1, r8, r6
+	ldr	r0, [sp, #12]
+	uxth	r1, r1
+	cmp	r0, r1
+	bhi	.L1801
+	add	fp, fp, #1
+	add	r6, r6, r3
+	subs	r2, r2, r3
+	b	.L1798
+.L1799:
+	adds	r7, r7, #1
+	uxth	r7, r7
+	b	.L1800
+.L1818:
+	uxtb	r1, fp
+	mov	r8, r6
+	str	r1, [sp, #16]
+	b	.L1802
+.L1813:
+	ldr	r3, [sp, #24]
+	add	r3, r3, r5, lsl #2
+	str	r3, [sp, #12]
+	ldrb	r3, [r3, #2]	@ zero_extendqisi2
+	ldr	r1, [sp, #12]
+	orn	r3, r3, #31
+	bfc	r3, #3, #2
+	strb	r3, [r1, #2]
+	movs	r1, #0
+	mov	r8, r1
+	str	r1, [sp, #20]
+.L1808:
+	ldrh	r3, [sp, #20]
+	ldr	r7, [sp, #28]
+	cmp	r7, r3
+	bhi	.L1820
+	ldr	r3, [sp, #16]
+	adds	r5, r5, #1
+	uxth	r5, r5
+	add	r2, r2, r3
+	uxth	r2, r2
+	b	.L1807
+.L1811:
+	ldr	r7, [sp, #12]
+	ldrb	r10, [r7, #3]	@ zero_extendqisi2
+	add	r7, lr, r8
+	asr	r10, r10, r7
+	tst	r10, #1
+	bne	.L1809
+	cmp	fp, #1
+	add	r10, r6, #80
+	it	hi
+	andhi	r3, r3, #1
+	add	r6, r6, #1
+	it	hi
+	addhi	r3, r3, r2
+	uxth	r6, r6
+	ite	hi
+	uxthhi	r3, r3
+	movls	r3, r2
+	add	r3, r3, r1
+	strh	r3, [r0, r10, lsl #1]	@ movhi
+.L1809:
+	add	lr, lr, #1
+.L1812:
+	ldr	r7, [sp, #16]
+	uxth	r3, lr
+	cmp	r3, r7
+	bcc	.L1811
+	ldr	r3, [sp, #20]
+	add	r8, r8, fp
+	adds	r3, r3, #1
+	str	r3, [sp, #20]
+	ldr	r3, [sp, #32]
+	add	r1, r1, r3
+	uxth	r1, r1
+	b	.L1808
+.L1820:
+	mov	lr, #0
+	b	.L1812
+.L1815:
+	ldrb	r5, [r3, #2]	@ zero_extendqisi2
+	adds	r2, r2, #1
+	uxth	r2, r2
+	adds	r3, r3, #4
+	and	r5, r5, #31
+	bfi	r5, lr, #3, #2
+	strb	r5, [r3, #-2]
+	b	.L1814
+.L1830:
+	.align	2
+.L1829:
+	.word	.LANCHOR5
+	.word	.LANCHOR136
+	.word	.LC0
+	.word	.LANCHOR75
+	.word	.LANCHOR46
+	.word	ftl_info_data_buffer
+	.word	1229739078
+	.word	.LANCHOR54
+	.word	.LANCHOR57
+	.word	.LANCHOR60
+	.word	ftl_ext_info_data_buffer
+	.word	1162432070
+	.word	.LANCHOR70
+	.word	.LANCHOR22
+	.word	.LC67
+	.word	.LANCHOR76
+	.word	.LANCHOR71
+	.word	.LANCHOR53
+.L1816:
+	strh	r5, [r0, #696]	@ movhi
+	movs	r1, #255
+	mov	r2, #256
+	add	r0, r0, #416
+	bl	ftl_memset
+	ldr	r2, [sp, #36]
+	ldr	r3, [r4]
+	ldrh	r2, [r2]
+	strh	r8, [r3, #692]	@ movhi
+	strh	r6, [r3, #416]	@ movhi
+	rsb	r2, r2, #21
+	asr	r2, r8, r2
+	strh	r2, [r3, #694]	@ movhi
+	movs	r2, #1
+	strh	r2, [r3, #688]	@ movhi
+	ldr	r2, .L1831
+	ldrh	r2, [r2]
+	strh	r2, [r3, #698]	@ movhi
+	bl	ftl_alloc_sys_blk
+	mov	r1, r5
+	mov	r6, r0
+	bl	ftl_erase_phy_blk
+	ldr	r3, [r4]
+	movs	r1, #2
+	strh	r6, [r3, #130]	@ movhi
+	ldr	r3, [sp, #8]
+	ldr	r0, [r3]
+	adds	r0, r0, #16
+	bl	ftl_open_sblk_init
+	ldr	r3, [sp, #8]
+	movs	r1, #3
+	ldr	r0, [r3]
+	adds	r0, r0, #48
+	bl	ftl_open_sblk_init
+	ldr	r3, [sp, #8]
+	movs	r1, #255
+	ldr	r0, [r3]
+	ldr	r3, [r4]
+	adds	r0, r0, #136
+	ldrh	r2, [r3, #134]
+	strh	r5, [r0, #-12]	@ movhi
+	strh	r5, [r0, #-16]	@ movhi
+	strh	r2, [r0, #-10]	@ movhi
+	movw	r2, #65535
+	strh	r2, [r0, #-56]	@ movhi
+	strh	r2, [r0, #-6]	@ movhi
+	mov	r2, #-1
+	strh	r5, [r0, #-14]	@ movhi
+	str	r2, [r0, #408]
+	strh	r2, [r3, #126]	@ movhi
+	mov	r2, #256
+	bl	ftl_memset
+	ldr	r3, [sp, #8]
+	movs	r2, #128
+	movs	r1, #255
+	ldr	r0, [r3]
+	add	r0, r0, #392
+	bl	ftl_memset
+	bl	ftl_ext_info_flush
+	mov	r0, r5
+	bl	ftl_info_flush
+	bl	ftl_info_blk_init
+	mov	r0, r5
+	add	sp, sp, #40
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1832:
+	.align	2
+.L1831:
+	.word	.LANCHOR137
+	.size	ftl_low_format, .-ftl_low_format
+	.section	.text.ftl_re_low_format_test,"ax",%progbits
+	.align	1
+	.global	ftl_re_low_format_test
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_re_low_format_test, %function
+ftl_re_low_format_test:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, lr}
+	movs	r1, #1
+	ldr	r5, .L1841
+	ldr	r0, .L1841+4
+	bl	printf
+	bl	sblk_init
+	bl	ftl_info_blk_init
+	bl	ftl_ext_info_init
+	ldr	r2, .L1841+8
+	ldr	r3, [r5]
+	ldr	r6, .L1841+12
+	ldr	r0, [r2]
+	movs	r2, #0
+	ldrh	r1, [r3, #134]
+	mov	r7, r2
+	ldrh	lr, [r6]
+	mov	ip, r2
+	add	r0, r0, r1, lsl #2
+.L1834:
+	cmp	r1, lr
+	bcc	.L1838
+	movs	r4, #0
+	strh	r7, [r3, #118]	@ movhi
+	strh	r2, [r3, #116]	@ movhi
+	movs	r0, #1
+	strh	ip, [r3, #114]	@ movhi
+	strh	r4, [r3, #122]	@ movhi
+	strh	r4, [r3, #120]	@ movhi
+	strh	r4, [r3, #124]	@ movhi
+	bl	ftl_alloc_sblk
+	mov	r1, r4
+	mov	r8, r0
+	bl	ftl_erase_sblk
+	ldr	r1, [r5]
+	mov	r0, r8
+	add	r1, r1, #672
+	bl	ftl_get_blk_list_in_sblk
+	ldr	r0, [r5]
+	movw	r2, #65533
+	ldrh	r7, [r0, #672]
+	strh	r4, [r0, #690]	@ movhi
+	subs	r3, r7, #1
+	uxth	r3, r3
+	cmp	r3, r2
+	bls	.L1839
+	movw	r2, #1366
+	ldr	r1, .L1841+16
+	ldr	r0, .L1841+20
+	bl	printf
+.L1840:
+	b	.L1840
+.L1838:
+	ldrb	r4, [r0, #2]	@ zero_extendqisi2
+	bfc	r4, #5, #3
+	strb	r4, [r0, #2]
+	ands	r4, r4, #24
+	bne	.L1835
+	add	ip, ip, #1
+	uxth	ip, ip
+.L1836:
+	adds	r1, r1, #1
+	uxth	r1, r1
+	adds	r0, r0, #4
+	b	.L1834
+.L1835:
+	cmp	r4, #16
+	itete	eq
+	addeq	r7, r7, #1
+	addne	r2, r2, #1
+	uxtheq	r7, r7
+	uxthne	r2, r2
+	b	.L1836
+.L1839:
+	strh	r4, [r0, #696]	@ movhi
+	mov	r2, #256
+	movs	r1, #255
+	add	r0, r0, #416
+	bl	ftl_memset
+	ldr	r0, [r5]
+	mov	r1, r4
+	mov	r2, #4096
+	add	r0, r0, #704
+	bl	ftl_memset
+	ldr	r3, [r5]
+	lsrs	r2, r7, #14
+	ubfx	r7, r7, #0, #14
+	mov	r1, r4
+	strh	r2, [r3, #694]	@ movhi
+	movs	r2, #1
+	strh	r2, [r3, #688]	@ movhi
+	ldr	r2, .L1841+24
+	strh	r7, [r3, #692]	@ movhi
+	strh	r8, [r3, #416]	@ movhi
+	ldrh	r2, [r2]
+	strh	r2, [r3, #698]	@ movhi
+	ldrh	r2, [r6]
+	ldr	r3, .L1841+28
+	ldr	r6, .L1841+32
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldr	r0, [r6]
+	movs	r1, #2
+	adds	r0, r0, #16
+	bl	ftl_open_sblk_init
+	ldr	r0, [r6]
+	movs	r1, #3
+	adds	r0, r0, #48
+	bl	ftl_open_sblk_init
+	ldr	r3, [r5]
+	movs	r1, #255
+	ldr	r0, [r6]
+	ldrh	r2, [r3, #134]
+	adds	r0, r0, #136
+	strh	r4, [r0, #-12]	@ movhi
+	strh	r4, [r0, #-16]	@ movhi
+	strh	r2, [r0, #-10]	@ movhi
+	movw	r2, #65535
+	strh	r2, [r0, #-56]	@ movhi
+	strh	r2, [r0, #-6]	@ movhi
+	mov	r2, #-1
+	strh	r4, [r0, #-14]	@ movhi
+	str	r2, [r0, #408]
+	strh	r2, [r3, #126]	@ movhi
+	mov	r2, #256
+	bl	ftl_memset
+	ldr	r0, [r6]
+	movs	r2, #128
+	movs	r1, #255
+	add	r0, r0, #392
+	bl	ftl_memset
+	ldr	r3, [r6]
+	str	r4, [r3, #520]
+	str	r4, [r3, #524]
+	str	r4, [r3, #528]
+	bl	ftl_ext_info_flush
+	mov	r0, r4
+	bl	ftl_info_flush
+	bl	ftl_info_blk_init
+	mov	r0, r4
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1842:
+	.align	2
+.L1841:
+	.word	.LANCHOR46
+	.word	.LC68
+	.word	.LANCHOR57
+	.word	.LANCHOR54
+	.word	.LANCHOR138
+	.word	.LC0
+	.word	.LANCHOR137
+	.word	.LANCHOR56
+	.word	.LANCHOR60
+	.size	ftl_re_low_format_test, .-ftl_re_low_format_test
+	.section	.text.ftl_prog_ppa_page,"ax",%progbits
+	.align	1
+	.global	ftl_prog_ppa_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_prog_ppa_page, %function
+ftl_prog_ppa_page:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, lr}
+	str	r3, [sp]
+	mov	r3, r2
+	mov	r2, r1
+	ubfx	r1, r0, #0, #21
+	ubfx	r0, r0, #21, #3
+	bl	ftl_prog_page
+	add	sp, sp, #12
+	@ sp needed
+	ldr	pc, [sp], #4
+	.size	ftl_prog_ppa_page, .-ftl_prog_ppa_page
+	.section	.text.ftl_write_last_log_page,"ax",%progbits
+	.align	1
+	.global	ftl_write_last_log_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_write_last_log_page, %function
+ftl_write_last_log_page:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r5, r0
+	ldrh	r3, [r0, #6]
+	cmp	r3, #1
+	bne	.L1846
+	ldr	r3, .L1848
+	ldrh	r7, [r0, #12]
+	ldr	r4, [r3]
+	bl	ftl_get_new_free_page
+	adds	r3, r0, #1
+	mov	r6, r0
+	beq	.L1847
+	ldrh	r0, [r5]
+	add	r4, r4, r7, lsl #2
+	ldr	r5, .L1848+4
+	bl	ftl_vpn_decrement
+	ldr	r3, .L1848+8
+	mov	r0, r4
+	ldr	r2, .L1848+12
+	str	r3, [r5]
+	ldr	r3, .L1848+16
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	muls	r1, r3, r1
+	lsls	r1, r1, #2
+	bl	js_hash
+	ldr	r3, .L1848+20
+	mov	r2, r5
+	str	r0, [r5, #4]
+	mov	r1, r4
+	mov	r0, r6
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	bl	ftl_prog_ppa_page
+.L1847:
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, pc}
+.L1846:
+	mov	r0, #-1
+	pop	{r3, r4, r5, r6, r7, pc}
+.L1849:
+	.align	2
+.L1848:
+	.word	.LANCHOR82
+	.word	.LANCHOR121
+	.word	-178307901
+	.word	.LANCHOR69
+	.word	.LANCHOR79
+	.word	.LANCHOR45
+	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
+	.section	.text.ftl_open_sblk_recovery,"ax",%progbits
+	.align	1
+	.global	ftl_open_sblk_recovery
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_open_sblk_recovery, %function
+ftl_open_sblk_recovery:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1922
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #56
+	mov	r4, r0
+	str	r1, [sp, #52]
+	mov	r10, r3
+	ldr	r2, [r3]
+	tst	r2, #4096
+	beq	.L1851
+	ldrh	r1, [r0, #2]
+	ldr	r0, .L1922+4
+	bl	printf
+.L1851:
+	ldr	r3, [r10]
+	lsls	r0, r3, #19
+	bpl	.L1852
+	ldrb	r1, [r4, #5]	@ zero_extendqisi2
+	ldr	r0, .L1922+8
+	bl	printf
+.L1852:
+	ldr	r3, [r10]
+	lsls	r1, r3, #19
+	bpl	.L1853
+	ldrh	r1, [r4]
+	ldr	r0, .L1922+12
+	bl	printf
+.L1853:
+	ldr	r3, [r10]
+	lsls	r2, r3, #19
+	bpl	.L1854
+	ldrh	r2, [r4, #18]
+	ldrh	r1, [r4, #16]
+	ldr	r0, .L1922+16
+	bl	printf
+.L1854:
+	ldrh	r3, [r4, #10]
+	movs	r0, #1
+	strh	r3, [r4, #14]	@ movhi
+	bl	buf_alloc
+	ldrh	r3, [r4, #2]
+	mov	r5, r0
+	ldrb	fp, [r4, #5]	@ zero_extendqisi2
+	str	r3, [sp, #44]
+	movs	r3, #0
+	str	r3, [sp, #48]
+.L1855:
+	ldr	r3, .L1922+20
+	ldr	r2, [sp, #44]
+	ldrh	r3, [r3]
+	cmp	r3, r2
+	bhi	.L1870
+.L1858:
+	ldrh	r3, [sp, #44]
+	movs	r7, #0
+	ldr	r6, .L1922+24
+	mov	r2, r7
+	ldrh	r0, [r4, #10]
+	strh	r3, [r4, #2]	@ movhi
+	ldr	r3, [r6]
+	strb	fp, [r4, #5]
+.L1871:
+	cmp	r2, r0
+	bcc	.L1873
+	ldr	r2, .L1922+20
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	ldr	r8, .L1922+72
+	ldrh	r2, [r2]
+	smulbb	r3, r3, r2
+	subs	r3, r3, r0
+	add	r7, r7, r3
+	ldr	r3, [r10]
+	uxth	r7, r7
+	tst	r3, #4096
+	beq	.L1874
+	ldrh	r1, [r4]
+	mov	r2, r7
+	ldr	r3, [r8]
+	ldr	r0, .L1922+28
+	ldrh	r3, [r3, r1, lsl #1]
+	bl	printf
+.L1874:
+	ldrh	r2, [r4]
+	mov	r0, r5
+	ldr	r3, [r8]
+	ldr	fp, .L1922+76
+	strh	r7, [r3, r2, lsl #1]	@ movhi
+	movs	r7, #0
+	bl	buf_free
+.L1875:
+	ldr	r3, .L1922+32
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r7, r3, lsl #1
+	bcc	.L1878
+	ldr	r3, .L1922+20
+	ldrh	r2, [r4, #12]
+	ldrb	r1, [r4, #9]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	mla	r3, r1, r3, r2
+	ldr	r2, [r6]
+	add	r3, r3, #1073741824
+	subs	r3, r3, #1
+	ldr	r3, [r2, r3, lsl #2]
+	adds	r3, r3, #1
+	beq	.L1879
+	movw	r2, #811
+	ldr	r1, .L1922+36
+	ldr	r0, .L1922+40
+	bl	printf
+.L1880:
+	b	.L1880
+.L1870:
+	ldrb	fp, [r4, #5]	@ zero_extendqisi2
+.L1856:
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	cmp	r3, fp
+	bhi	.L1869
+	movs	r3, #0
+	strb	r3, [r4, #5]
+	ldr	r3, [sp, #44]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	str	r3, [sp, #44]
+	b	.L1855
+.L1869:
+	add	r3, fp, #8
+	ldrh	r8, [r4, r3, lsl #1]
+	movw	r3, #65535
+	cmp	r8, r3
+	beq	.L1857
+	ldr	r3, .L1922+44
+	ldr	r2, [r5, #12]
+	ldr	r1, [r5, #4]
+	ldrh	r6, [r3]
+	ldr	r3, [sp, #44]
+	mla	r6, r8, r6, r3
+	ldr	r3, .L1922+48
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	mov	r0, r6
+	bl	ftl_read_ppa_page
+	cmp	r0, #512
+	mov	r7, r0
+	beq	.L1858
+	ldr	r3, [r10]
+	lsls	r3, r3, #19
+	bpl	.L1859
+	ldr	r2, [r5, #12]
+	ldr	r3, [r5, #4]
+	ldr	r1, [r2, #12]
+	str	r1, [sp, #32]
+	ldr	r1, [r2, #8]
+	str	r1, [sp, #28]
+	ldr	r1, [r2, #4]
+	str	r1, [sp, #24]
+	mov	r1, r8
+	ldr	r2, [r2]
+	str	r2, [sp, #20]
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #16]
+	ldr	r2, [r3, #8]
+	str	r2, [sp, #12]
+	ldr	r2, [r3, #4]
+	str	r2, [sp, #8]
+	ldr	r3, [r3]
+	ldr	r2, [sp, #44]
+	str	r0, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r6
+	ldr	r0, .L1922+52
+	bl	printf
+.L1859:
+	ldr	r3, .L1922+56
+	mov	r8, #1
+	ldr	r2, [sp, #44]
+	ldrh	r1, [r4, #10]
+	strb	r8, [r3]
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	mla	r2, r3, r2, fp
+	cmp	r1, r2
+	beq	.L1860
+	movw	r2, #707
+	ldr	r1, .L1922+36
+	ldr	r0, .L1922+40
+	bl	printf
+.L1861:
+	b	.L1861
+.L1860:
+	ldrh	r2, [r4, #6]
+	add	r2, r2, r1
+	ldr	r1, .L1922+20
+	ldrh	r1, [r1]
+	muls	r3, r1, r3
+	cmp	r2, r3
+	beq	.L1862
+	mov	r2, #708
+	ldr	r1, .L1922+36
+	ldr	r0, .L1922+40
+	bl	printf
+.L1863:
+	b	.L1863
+.L1862:
+	adds	r7, r7, #1
+	beq	.L1865
+	ldr	r7, [r5, #12]
+	ldr	r0, [r7, #4]
+	adds	r6, r0, #1
+	beq	.L1865
+	bl	lpa_hash_get_ppa
+	ldr	r3, [sp, #52]
+	mov	r6, r0
+	cmp	r3, #0
+	beq	.L1867
+	ldr	r3, [r7, #8]
+	cmp	r0, r3
+	beq	.L1867
+	adds	r1, r0, #1
+	beq	.L1867
+	ldr	r3, .L1922+60
+	ldrh	r0, [r3]
+	rsb	r3, r0, #21
+	lsl	r8, r8, r3
+	ldr	r3, .L1922+64
+	lsr	r0, r6, r0
+	add	r8, r8, #-1
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	and	r0, r8, r0
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #52]
+	uxth	r0, r0
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bne	.L1867
+	ldr	r8, [r7]
+	mov	r0, r6
+	ldr	r7, .L1922+68
+	ldr	r3, .L1922+48
+	ldr	r1, [r5, #4]
+	mov	r2, r7
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	bl	ftl_read_ppa_page
+	ldr	r3, [r7]
+	cmp	r8, r3
+	bhi	.L1867
+	ldr	r3, [r5, #12]
+	ldr	r0, [r3, #8]
+	adds	r2, r0, #1
+	beq	.L1865
+	ldr	r3, .L1922+60
+	ldrh	r2, [r3]
+	movs	r3, #1
+	rsb	r1, r2, #21
+	lsls	r3, r3, r1
+	lsrs	r0, r0, r2
+	ldr	r2, .L1922+64
+	subs	r3, r3, #1
+	ands	r0, r0, r3
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	uxth	r0, r0
+	bl	ftl_vpn_decrement
+.L1865:
+	ldrh	r3, [r4, #6]
+	subs	r3, r3, #1
+	strh	r3, [r4, #6]	@ movhi
+	ldrh	r3, [r4, #10]
+	adds	r3, r3, #1
+	strh	r3, [r4, #10]	@ movhi
+	movs	r3, #1
+	str	r3, [sp, #48]
+.L1857:
+	add	fp, fp, #1
+	uxth	fp, fp
+	b	.L1856
+.L1873:
+	ldrh	r1, [r4, #12]
+	add	r1, r1, r2
+	adds	r2, r2, #1
+	ldr	r1, [r3, r1, lsl #2]
+	adds	r1, r1, #1
+	itt	ne
+	addne	r7, r7, #1
+	uxthne	r7, r7
+	b	.L1871
+.L1923:
+	.align	2
+.L1922:
+	.word	.LANCHOR22
+	.word	.LC69
+	.word	.LC70
+	.word	.LC71
+	.word	.LC72
+	.word	.LANCHOR79
+	.word	.LANCHOR82
+	.word	.LC74
+	.word	.LANCHOR69
+	.word	.LANCHOR139
+	.word	.LC0
+	.word	.LANCHOR75
+	.word	.LANCHOR45
+	.word	.LC73
+	.word	.LANCHOR133
+	.word	.LANCHOR71
+	.word	.LANCHOR70
+	.word	.LANCHOR130
+	.word	.LANCHOR56
+	.word	.LANCHOR46
+.L1878:
+	ldr	r3, [sp, #48]
+	cbz	r3, .L1876
+	ldrh	r3, [r4, #6]
+	cmp	r3, #1
+	bls	.L1876
+	mov	r0, r4
+	bl	ftl_get_new_free_page
+	ldr	r3, [r10]
+	mov	r8, r0
+	lsls	r3, r3, #19
+	bpl	.L1877
+	mov	r1, r0
+	ldr	r0, .L1924
+	bl	printf
+.L1877:
+	ldr	r3, [fp]
+	mov	r0, r8
+	ldr	r2, [r5, #12]
+	ldr	r1, [r5, #4]
+	ldr	r3, [r3, #8]
+	str	r3, [r2]
+	mov	r3, #-1
+	str	r3, [r2, #4]
+	str	r3, [r2, #8]
+	movs	r3, #0
+	str	r3, [r2, #12]
+	str	r3, [r1]
+	ldr	r3, .L1924+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	bl	ftl_prog_ppa_page
+	ldrh	r0, [r4]
+	bl	ftl_vpn_decrement
+.L1876:
+	adds	r7, r7, #1
+	b	.L1875
+.L1879:
+	ldrh	r3, [r4, #6]
+	cmp	r3, #1
+	bne	.L1850
+	mov	r0, r4
+	add	sp, sp, #56
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	ftl_write_last_log_page
+.L1867:
+	ldr	r0, [r5, #12]
+	ldr	r3, .L1924+8
+	ldr	r2, [r0, #4]
+	ldr	r3, [r3]
+	cmp	r2, r3
+	bcs	.L1865
+	ldr	r3, .L1924+12
+	ldrb	r1, [r4, #9]	@ zero_extendqisi2
+	ldrh	r2, [r4, #10]
+	ldrh	r3, [r3]
+	muls	r3, r1, r3
+	subs	r3, r3, #1
+	cmp	r2, r3
+	bge	.L1865
+	ldr	r3, .L1924+16
+	ldr	r6, [r0]
+	ldr	r3, [r3]
+	ldr	r1, [r3, #8]
+	cmp	r6, r1
+	it	hi
+	strhi	r6, [r3, #8]
+	ldrh	r3, [r4, #12]
+	ldr	r1, [r0, #8]
+	ldr	r0, [r0, #4]
+	add	r2, r2, r3
+	uxth	r2, r2
+	bl	lpa_hash_update_ppa
+	b	.L1865
+.L1850:
+	add	sp, sp, #56
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1925:
+	.align	2
+.L1924:
+	.word	.LC75
+	.word	.LANCHOR45
+	.word	.LANCHOR47
+	.word	.LANCHOR79
+	.word	.LANCHOR46
+	.size	ftl_open_sblk_recovery, .-ftl_open_sblk_recovery
+	.section	.text.pm_write_page,"ax",%progbits
+	.align	1
+	.global	pm_write_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	pm_write_page, %function
+pm_write_page:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
+	mov	r4, r0
+	ldr	r7, .L1937
+	mov	r8, r1
+	mov	r6, r7
+.L1932:
+	ldr	r3, [r7]
+	ldr	r2, [r3, #48]
+	ldrh	r1, [r3, #696]
+	adds	r2, r2, #1
+	str	r2, [r3, #48]
+	ldr	r2, .L1937+4
+	ldrh	r2, [r2]
+	cmp	r1, r2
+	bcs	.L1928
+	ldrh	r2, [r3, #692]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L1929
+.L1928:
+	bl	pm_alloc_new_blk
+	movs	r0, #0
+	bl	ftl_info_flush
+.L1929:
+	ldr	r2, [r6]
+	movw	r1, #65535
+	ldrh	r3, [r2, #692]
+	cmp	r3, r1
+	bne	.L1930
+	movs	r2, #224
+	ldr	r1, .L1937+8
+	ldr	r0, .L1937+12
+	bl	printf
+.L1931:
+	b	.L1931
+.L1930:
+	ldr	r1, .L1937+16
+	ldrh	r2, [r2, #696]
+	ldr	r10, .L1937+28
+	ldrh	r5, [r1]
+	movs	r1, #0
+	ldr	r0, [r10]
+	mla	r5, r3, r5, r2
+	movs	r2, #64
+	bl	ftl_memset
+	ldr	r2, [r6]
+	ldr	r3, [r10]
+	ldrb	r0, [r2, #694]	@ zero_extendqisi2
+	str	r4, [r3]
+	ldr	r1, [r2, #48]
+	ldr	r2, .L1937+20
+	str	r1, [r3, #4]
+	mov	r1, r5
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	str	r2, [sp]
+	mov	r2, r8
+	bl	ftl_prog_page
+	ldr	r2, [r6]
+	ldrh	r3, [r2, #696]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	cmp	r3, #1
+	strh	r3, [r2, #696]	@ movhi
+	beq	.L1932
+	adds	r0, r0, #1
+	bne	.L1933
+.L1927:
+	mov	r1, r5
+	ldr	r0, .L1937+24
+	bl	printf
+	b	.L1932
+.L1933:
+	ldrh	r3, [r2, #698]
+	movs	r0, #0
+	cmp	r4, r3
+	itt	cc
+	addcc	r4, r4, #176
+	strcc	r5, [r2, r4, lsl #2]
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.L1938:
+	.align	2
+.L1937:
+	.word	.LANCHOR46
+	.word	.LANCHOR79
+	.word	.LANCHOR140
+	.word	.LC0
+	.word	.LANCHOR75
+	.word	.LANCHOR45
+	.word	.LC76
+	.word	.LANCHOR141
+	.size	pm_write_page, .-pm_write_page
+	.section	.text.flash_info_flush,"ax",%progbits
+	.align	1
+	.global	flash_info_flush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_info_flush, %function
+flash_info_flush:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r2, #64
+	ldr	r5, .L1947
+	movs	r1, #0
+	movs	r7, #0
+	ldr	r6, .L1947+4
+	ldr	r0, [r5]
+	bl	ftl_memset
+	movs	r3, #16
+	movs	r2, #4
+	ldr	r1, [r6]
+	ldr	r0, .L1947+8
+	bl	rknand_print_hex
+	ldr	r4, [r6]
+	ldr	r1, [r4, #8]
+	add	r0, r4, #16
+	bl	js_hash
+	str	r5, [sp, #8]
+	ldr	r5, .L1947+12
+	str	r0, [r4, #12]
+	mov	r8, r5
+.L1940:
+	ldr	fp, .L1947+32
+	ldrb	r10, [r5]	@ zero_extendqisi2
+	ldrh	r4, [r5, #2]
+	ldrh	r3, [fp]
+	mov	r1, r10
+	ldr	r0, .L1947+16
+	mov	r2, r4
+	str	r3, [sp, #12]
+	bl	printf
+	ldr	r2, .L1947+20
+	ldrh	r0, [r5, #2]
+	ldr	r3, [sp, #12]
+	ldrh	r2, [r2]
+	subs	r2, r2, #1
+	cmp	r0, r2
+	blt	.L1941
+	ldr	r4, [r6]
+	mov	r10, #0
+	ldrb	r2, [r5]	@ zero_extendqisi2
+	strh	r10, [r5, #2]	@ movhi
+	ldr	r3, [r4, #4]
+	mov	r0, r4
+	ldr	r1, [r4, #8]
+	adds	r3, r3, #1
+	str	r3, [r4, #4]
+	ldrb	r3, [r5, #1]	@ zero_extendqisi2
+	strb	r2, [r5, #1]
+	ldrh	r2, [r4, #16]
+	strb	r3, [r5]
+	str	r3, [sp, #12]
+	adds	r2, r2, #1
+	strh	r2, [r0, #16]!	@ movhi
+	bl	js_hash
+	ldr	r3, [sp, #12]
+	str	r0, [r4, #12]
+	mov	r0, r10
+	ldrh	r4, [fp]
+	muls	r4, r3, r4
+	mov	r1, r4
+.L1946:
+	bl	flash_erase_block
+.L1942:
+	ldr	r2, [r6]
+	mov	r10, #1
+	ldr	r3, [sp, #8]
+	movs	r0, #0
+	ldr	r1, [r2, #4]
+	ldr	r3, [r3]
+	str	r1, [r3]
+	ldr	r1, .L1947+24
+	str	r1, [r3, #4]
+	movs	r1, #4
+	stm	sp, {r1, r10}
+	mov	r1, r4
+	bl	flash_prog_page_en
+	ldrh	r3, [r8, #2]
+	adds	r0, r0, #1
+	add	r3, r3, r10
+	strh	r3, [r8, #2]	@ movhi
+	bne	.L1943
+	mov	r1, r4
+	ldr	r0, .L1947+28
+	bl	printf
+	b	.L1940
+.L1945:
+	mov	r7, r10
+	b	.L1940
+.L1941:
+	mla	r4, r10, r3, r4
+	cmp	r0, #0
+	bne	.L1942
+	mov	r1, r4
+	b	.L1946
+.L1943:
+	cmp	r7, #0
+	beq	.L1945
+	movs	r0, #0
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1948:
+	.align	2
+.L1947:
+	.word	.LANCHOR116
+	.word	.LANCHOR5
+	.word	.LC77
+	.word	.LANCHOR117
+	.word	.LC78
+	.word	.LANCHOR97
+	.word	1398362953
+	.word	.LC79
+	.word	.LANCHOR13
+	.size	flash_info_flush, .-flash_info_flush
+	.section	.text.nand_flash_init,"ax",%progbits
+	.align	1
+	.global	nand_flash_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	nand_flash_init, %function
+nand_flash_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r5, #0
+	ldr	r8, .L2005+140
+	movs	r2, #2
+	ldr	r3, .L2005
+	ldr	r7, .L2005+4
+	mov	r6, r8
+	ldr	r4, .L2005+8
+	strb	r2, [r3]
+	bl	nandc_init
+	str	r4, [r7]
+.L1955:
+	lsl	r10, r5, #3
+	uxtb	r0, r5
+	add	r1, r8, r10
+	bl	flash_read_id
+	cbnz	r5, .L1950
+	ldrb	r3, [r8]	@ zero_extendqisi2
+	subs	r3, r3, #1
+	uxtb	r3, r3
+	cmp	r3, #253
+	bls	.L1951
+.L1953:
+	mvn	r0, #1
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1951:
+	ldrb	r3, [r8, #1]	@ zero_extendqisi2
+	cmp	r3, #255
+	beq	.L1953
+.L1950:
+	ldrb	r3, [r6, r10]	@ zero_extendqisi2
+	adds	r5, r5, #1
+	cmp	r3, #181
+	itt	eq
+	moveq	r3, #44
+	strbeq	r3, [r6, r10]
+	cmp	r5, #4
+	bne	.L1955
+	ldr	r5, .L2005+12
+	mov	r8, #0
+	ldr	r10, .L2005+140
+.L1958:
+	ldrb	r2, [r5, #-1]	@ zero_extendqisi2
+	mov	r1, r10
+	mov	r0, r5
+	lsl	fp, r8, #5
+	bl	flash_mem_cmp8
+	cmp	r0, #0
+	bne	.L1956
+	ldr	r5, .L2005+16
+	ldr	r3, .L2005+20
+	add	r5, r5, fp
+	ldrb	r2, [r5, #22]	@ zero_extendqisi2
+	mov	r1, r3
+.L1957:
+	lsl	ip, r0, #5
+	ldrb	ip, [ip, r3]	@ zero_extendqisi2
+	cmp	ip, r2
+	beq	.L1959
+	adds	r0, r0, #1
+	cmp	r0, #4
+	bne	.L1957
+.L1959:
+	add	r1, r1, r0, lsl #5
+	movs	r2, #32
+	ldr	r0, .L2005+24
+	bl	ftl_memcpy
+	movs	r2, #32
+	mov	r1, r5
+	ldr	r0, .L2005+8
+	bl	ftl_memcpy
+	ldr	r2, .L2005+28
+	ldrb	r3, [r2]	@ zero_extendqisi2
+	mov	r8, r2
+	cmp	r3, #8
+	bhi	.L1960
+	ldrb	r2, [r4, #20]	@ zero_extendqisi2
+	cmp	r2, #60
+	bls	.L1961
+	movs	r2, #60
+	strb	r2, [r4, #20]
+.L1961:
+	cmp	r3, #8
+	bne	.L1960
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	cmp	r3, #44
+	bne	.L1960
+	ldrb	r3, [r4, #28]	@ zero_extendqisi2
+	cmp	r3, #2
+	itt	eq
+	moveq	r3, #0
+	strbeq	r3, [r4, #28]
+.L1960:
+	mov	r0, #16384
+	ldr	r6, .L2005+32
+	bl	ftl_malloc
+	ldr	r3, .L2005+36
+	mov	r10, #0
+	str	r0, [r3]
+	mov	r0, #16384
+	bl	ftl_malloc
+	ldr	r3, .L2005+40
+	str	r0, [r3]
+	mov	r0, #2048
+	bl	ftl_malloc
+	str	r0, [r6]
+	movs	r0, #64
+	bl	ftl_malloc
+	ldr	r3, .L2005+44
+	str	r0, [r3]
+	movs	r0, #64
+	bl	ftl_malloc
+	ldr	r3, .L2005+48
+	str	r0, [r3]
+	movs	r0, #64
+	bl	ftl_malloc
+	ldr	r3, .L2005+52
+	str	r0, [r3]
+	ldr	r3, .L2005+56
+	strb	r10, [r3]
+	bl	flash_die_info_init
+	ldrb	r0, [r4, #18]	@ zero_extendqisi2
+	bl	flash_lsb_page_tbl_build
+	ldrb	r0, [r4, #20]	@ zero_extendqisi2
+	bl	nandc_bch_sel
+	ldr	r2, [r7]
+	ldr	r7, .L2005+60
+	ldrh	r3, [r2, #16]
+	ubfx	r5, r3, #3, #1
+	lsrs	r1, r3, #8
+	and	r0, r1, #7
+	strb	r0, [r7]
+	ldr	r0, .L2005+64
+	strb	r5, [r0]
+	ubfx	r5, r3, #4, #1
+	ldr	r0, .L2005+68
+	strb	r5, [r0]
+	ubfx	r5, r3, #12, #1
+	ldr	r0, .L2005+72
+	strb	r5, [r0]
+	ubfx	r5, r3, #13, #1
+	ldr	r0, .L2005+76
+	ubfx	r3, r3, #14, #1
+	strb	r5, [r0]
+	ldr	r0, .L2005+80
+	ldr	r5, .L2005+84
+	strb	r3, [r0]
+	movs	r0, #60
+	ldrb	r3, [r2, #28]	@ zero_extendqisi2
+	ldr	r2, .L2005+88
+	str	r10, [r5]
+	strb	r3, [r2]
+	ldr	r2, .L2005+92
+	strb	r0, [r2]
+	ldrb	r0, [r8]	@ zero_extendqisi2
+	cmp	r0, #9
+	itt	eq
+	moveq	r0, #70
+	strbeq	r0, [r2]
+	ldr	r2, .L2005+96
+	ldrh	r0, [r4, #16]
+	strb	r3, [r2]
+	ldrb	r3, [r4, #19]	@ zero_extendqisi2
+	tst	r0, #64
+	ldr	r2, .L2005+100
+	strb	r3, [r2]
+	mov	r4, r2
+	beq	.L1964
+	sub	r2, r3, #17
+	cmp	r2, #2
+	bhi	.L1965
+	ldr	r2, .L2005+104
+	cmp	r3, #19
+	ldr	r3, .L2005+108
+	str	r2, [r5]
+	ite	ne
+	movne	r2, #7
+	moveq	r2, #15
+.L2003:
+	strb	r2, [r3]
+.L1964:
+	ldr	r3, .L2005+112
+	tst	r1, #1
+	mov	r2, #0
+	mov	r0, #4
+	strb	r2, [r3]
+	mov	r8, r3
+	beq	.L1975
+	bl	nandc_set_if_mode
+	movs	r0, #1
+	bl	flash_set_interface_mode
+	movs	r0, #1
+.L1975:
+	bl	nandc_set_if_mode
+	bl	flash_info_blk_init
+	adds	r2, r0, #1
+	beq	.L1949
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	subs	r3, r3, #1
+	cmp	r3, #6
+	itt	ls
+	ldrls	r3, .L2005+116
+	strls	r3, [r5]
+	ldrb	r3, [r7]	@ zero_extendqisi2
+	lsls	r3, r3, #29
+	bmi	.L1978
+.L1979:
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1956:
+	add	r8, r8, #1
+	adds	r5, r5, #32
+	cmp	r8, #24
+	bne	.L1958
+	b	.L1953
+.L1965:
+	cmp	r3, #33
+	beq	.L1968
+	sub	r2, r3, #65
+	cmp	r2, #1
+	bhi	.L1969
+.L1968:
+	ldr	r3, .L2005+120
+	movs	r2, #4
+	str	r3, [r5]
+	ldr	r3, .L2005+124
+	strb	r2, [r3]
+.L2004:
+	movs	r2, #7
+	ldr	r3, .L2005+108
+	b	.L2003
+.L1969:
+	sub	r2, r3, #67
+	uxtb	r2, r2
+	cmp	r2, #1
+	bls	.L1970
+	sub	r0, r3, #34
+	cmp	r0, #1
+	bhi	.L1971
+.L1970:
+	ldr	r0, .L2005+120
+	cmp	r3, #35
+	str	r0, [r5]
+	ldr	r0, .L2005+108
+	beq	.L1972
+	cmp	r3, #68
+	beq	.L1972
+	movs	r3, #7
+.L2002:
+	cmp	r2, #1
+	strb	r3, [r0]
+	it	ls
+	movls	r2, #4
+	ldr	r3, .L2005+124
+	it	hi
+	movhi	r2, #5
+	b	.L2003
+.L1972:
+	movs	r3, #17
+	b	.L2002
+.L1971:
+	subs	r3, r3, #36
+	cmp	r3, #1
+	bhi	.L1964
+	ldr	r3, .L2005+128
+	str	r3, [r5]
+	b	.L2004
+.L1978:
+	ldr	r3, [r6]
+	ldrb	r3, [r3, #19]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L1979
+	ldr	r2, .L2005+132
+	movs	r0, #0
+	ldr	r3, .L2005+136
+	ldrh	r1, [r2]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	muls	r1, r3, r1
+	bl	flash_ddr_para_scan
+	ldrb	r4, [r8]	@ zero_extendqisi2
+	cmp	r4, #0
+	bne	.L1979
+	ldr	r3, [r6]
+	strb	r4, [r3, #19]
+	bl	flash_info_flush
+	b	.L1979
+.L1949:
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2006:
+	.align	2
+.L2005:
+	.word	.LANCHOR20
+	.word	.LANCHOR34
+	.word	.LANCHOR19
+	.word	.LANCHOR142+1
+	.word	.LANCHOR142
+	.word	.LANCHOR143
+	.word	.LANCHOR103
+	.word	.LANCHOR7
+	.word	.LANCHOR5
+	.word	.LANCHOR119
+	.word	.LANCHOR111
+	.word	.LANCHOR118
+	.word	.LANCHOR112
+	.word	.LANCHOR116
+	.word	.LANCHOR123
+	.word	.LANCHOR25
+	.word	.LANCHOR144
+	.word	.LANCHOR23
+	.word	.LANCHOR66
+	.word	.LANCHOR74
+	.word	.LANCHOR12
+	.word	.LANCHOR115
+	.word	.LANCHOR11
+	.word	.LANCHOR145
+	.word	.LANCHOR146
+	.word	.LANCHOR1
+	.word	micron_read_retrial
+	.word	.LANCHOR113
+	.word	.LANCHOR35
+	.word	hynix_read_retrial
+	.word	toshiba_read_retrial
+	.word	.LANCHOR4
+	.word	toshiba_3d_read_retrial
+	.word	.LANCHOR13
+	.word	.LANCHOR117
+	.word	.LANCHOR26
+	.size	nand_flash_init, .-nand_flash_init
+	.section	.text.ftl_sysblk_dump,"ax",%progbits
+	.align	1
+	.global	ftl_sysblk_dump
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_sysblk_dump, %function
+ftl_sysblk_dump:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	fp, r0
+	sub	sp, sp, #48
+	movs	r0, #1
+	movs	r6, #0
+	bl	buf_alloc
+	ldr	r3, [r0, #4]
+	mov	r4, r0
+	mov	r5, r6
+	str	r3, [sp, #44]
+.L2008:
+	ldr	r3, .L2015
+	ldrh	r2, [r3]
+	uxth	r3, r6
+	cmp	r2, r3
+	bhi	.L2010
+	mov	r0, r4
+	bl	buf_free
+	cmp	r5, #0
+	beq	.L2011
+	movw	r2, #655
+	ldr	r1, .L2015+4
+	ldr	r0, .L2015+8
+	bl	printf
+.L2012:
+	b	.L2012
+.L2010:
+	ldr	r3, .L2015+12
+	uxth	r7, r6
+	ldr	r2, [r4, #12]
+	ldr	r1, [r4, #4]
+	ldrh	r8, [r3]
+	ldr	r3, .L2015+16
+	mla	r8, fp, r8, r7
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	mov	r0, r8
+	bl	ftl_read_ppa_page
+	ldr	r2, [r4, #12]
+	mov	r10, r0
+	ldr	r3, [r4, #4]
+	ldr	r1, [r2, #12]
+	str	r1, [sp, #32]
+	ldr	r1, [r2, #8]
+	str	r1, [sp, #28]
+	ldr	r1, [r2, #4]
+	str	r1, [sp, #24]
+	mov	r1, fp
+	ldr	r2, [r2]
+	str	r2, [sp, #20]
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #16]
+	ldr	r2, [r3, #8]
+	str	r2, [sp, #12]
+	ldr	r2, [r3, #4]
+	str	r2, [sp, #8]
+	mov	r2, r7
+	ldr	r3, [r3]
+	str	r0, [sp]
+	ldr	r0, .L2015+20
+	str	r3, [sp, #4]
+	mov	r3, r8
+	bl	printf
+	ldr	r1, [sp, #44]
+	movs	r3, #32
+	movs	r2, #4
+	ldr	r0, .L2015+24
+	add	r1, r1, #704
+	bl	rknand_print_hex
+	cmp	r10, #-1
+	beq	.L2013
+	cmp	r10, #512
+	it	eq
+	moveq	r5, #1
+.L2009:
+	adds	r6, r6, #1
+	b	.L2008
+.L2013:
+	movs	r5, #1
+	b	.L2009
+.L2011:
+	mov	r0, r5
+	add	sp, sp, #48
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2016:
+	.align	2
+.L2015:
+	.word	.LANCHOR79
+	.word	.LANCHOR147
+	.word	.LC0
+	.word	.LANCHOR75
+	.word	.LANCHOR45
+	.word	.LC73
+	.word	.LC80
+	.size	ftl_sysblk_dump, .-ftl_sysblk_dump
+	.section	.text.dump_ftl_info,"ax",%progbits
+	.align	1
+	.global	dump_ftl_info
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	dump_ftl_info, %function
+dump_ftl_info:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r4, r5, r6, r7, lr}
+	ldr	r1, .L2018
+	ldr	r5, .L2018+4
+	ldrh	r3, [r1, #2]
+	ldrb	r2, [r1, #1]	@ zero_extendqisi2
+	ldr	r0, .L2018+8
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	bl	printf
+	ldr	r3, [r5]
+	ldr	r4, .L2018+12
+	ldr	r0, .L2018+16
+	ldrh	r2, [r3, #140]
+	ldrh	r1, [r3, #130]
+	bl	printf
+	ldr	r0, [r4]
+	ldr	r7, .L2018+20
+	ldrh	r6, [r0, #26]
+	ldrb	r3, [r0, #21]	@ zero_extendqisi2
+	ldrh	r2, [r0, #18]
+	ldrh	r1, [r0, #16]
+	str	r6, [sp, #4]
+	ldrh	r0, [r0, #22]
+	str	r0, [sp]
+	ldr	r0, .L2018+24
+	bl	printf
+	ldr	r0, [r4]
+	ldrh	r6, [r0, #58]
+	ldrb	r3, [r0, #53]	@ zero_extendqisi2
+	ldrh	r2, [r0, #50]
+	ldrh	r1, [r0, #48]
+	str	r6, [sp, #4]
+	ldrh	r0, [r0, #54]
+	ldr	r6, .L2018+28
+	str	r0, [sp]
+	ldr	r0, .L2018+32
+	bl	printf
+	ldr	r0, [r4]
+	ldrh	r4, [r0, #90]
+	ldrb	r3, [r0, #85]	@ zero_extendqisi2
+	ldrh	r2, [r0, #82]
+	ldrh	r1, [r0, #80]
+	str	r4, [sp, #4]
+	ldrh	r0, [r0, #86]
+	ldr	r4, .L2018+36
+	str	r0, [sp]
+	ldr	r0, .L2018+40
+	bl	printf
+	ldrh	r2, [r6]
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	ldr	r1, .L2018+44
+	ldr	r0, .L2018+48
+	muls	r3, r2, r3
+	ldr	r1, [r1]
+	movs	r2, #4
+	lsls	r3, r3, #1
+	bl	rknand_print_hex
+	ldr	r1, .L2018+52
+	movs	r2, #2
+	ldrh	r3, [r7]
+	ldr	r0, .L2018+56
+	ldr	r1, [r1]
+	bl	rknand_print_hex
+	ldr	r1, [r5]
+	movs	r3, #32
+	movs	r2, #4
+	ldr	r0, .L2018+60
+	add	r1, r1, #704
+	bl	rknand_print_hex
+	ldr	r1, .L2018+64
+	movs	r2, #4
+	ldrh	r3, [r7]
+	ldr	r0, .L2018+68
+	ldr	r1, [r1]
+	bl	rknand_print_hex
+	mov	r3, #256
+	movs	r2, #2
+	ldr	r1, .L2018+72
+	ldr	r0, .L2018+76
+	bl	rknand_print_hex
+	ldrh	r2, [r6]
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	ldr	r1, .L2018+80
+	ldr	r0, .L2018+84
+	muls	r3, r2, r3
+	ldr	r1, [r1]
+	movs	r2, #2
+	lsls	r3, r3, #1
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, r6, r7, lr}
+	b	rknand_print_hex
+.L2019:
+	.align	2
+.L2018:
+	.word	.LANCHOR131
+	.word	.LANCHOR46
+	.word	.LC81
+	.word	.LANCHOR60
+	.word	.LC82
+	.word	.LANCHOR54
+	.word	.LC83
+	.word	.LANCHOR79
+	.word	.LC84
+	.word	.LANCHOR69
+	.word	.LC85
+	.word	.LANCHOR82
+	.word	.LC86
+	.word	.LANCHOR56
+	.word	.LC87
+	.word	.LC80
+	.word	.LANCHOR57
+	.word	.LC88
+	.word	.LANCHOR81
+	.word	.LC89
+	.word	.LANCHOR83
+	.word	.LC90
+	.size	dump_ftl_info, .-dump_ftl_info
+	.section	.text.pm_ppa_update_check,"ax",%progbits
+	.align	1
+	.global	pm_ppa_update_check
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	pm_ppa_update_check, %function
+pm_ppa_update_check:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r5, r0
+	ldr	r3, .L2027
+	movs	r4, #1
+	mov	r6, r1
+	mov	r7, r2
+	ldrh	r0, [r3]
+	rsb	r3, r0, #21
+	lsls	r4, r4, r3
+	ldr	r3, .L2027+4
+	lsr	r0, r2, r0
+	subs	r4, r4, #1
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	ands	r0, r0, r4
+	bl	__aeabi_uidiv
+	ldr	r3, .L2027+8
+	uxth	r0, r0
+	ldr	r3, [r3]
+	add	r0, r3, r0, lsl #2
+	ldrb	r1, [r0, #2]	@ zero_extendqisi2
+	lsrs	r1, r1, #5
+	cmp	r1, #1
+	beq	.L2021
+	cmp	r1, #7
+	bne	.L2023
+.L2021:
+	mov	r3, r7
+	mov	r2, r6
+	mov	r1, r5
+	ldr	r0, .L2027+12
+	bl	printf
+	bl	dump_ftl_info
+	mov	r0, #-1
+	pop	{r3, r4, r5, r6, r7, pc}
+.L2023:
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, pc}
+.L2028:
+	.align	2
+.L2027:
+	.word	.LANCHOR71
+	.word	.LANCHOR70
+	.word	.LANCHOR57
+	.word	.LC91
+	.size	pm_ppa_update_check, .-pm_ppa_update_check
+	.section	.text.load_l2p_region,"ax",%progbits
+	.align	1
+	.global	load_l2p_region
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	load_l2p_region, %function
+load_l2p_region:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	cmp	r1, #31
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
+	mov	r4, r0
+	bls	.L2030
+	movs	r2, #30
+	ldr	r1, .L2039
+	ldr	r0, .L2039+4
+	bl	printf
+.L2031:
+	b	.L2031
+.L2030:
+	ldr	r10, .L2039+52
+	ldr	r3, [r10]
+	ldrh	r2, [r3, #698]
+	cmp	r2, r0
+	bcs	.L2032
+	mov	r1, r0
+	ldr	r0, .L2039+8
+	bl	printf
+	ldr	r3, .L2039+12
+	movs	r1, #255
+	ldrh	r2, [r3]
+	movs	r3, #0
+	ldr	r0, [r3, #4]
+	bl	ftl_memset
+	ldr	r3, [r10]
+	ldrh	r3, [r3, #698]
+	cmp	r3, r4
+	bcs	.L2036
+	movs	r2, #34
+	ldr	r1, .L2039
+	ldr	r0, .L2039+4
+	bl	printf
+.L2034:
+	b	.L2034
+.L2032:
+	ldr	r5, .L2039+16
+	add	r2, r0, #176
+	ldr	r7, [r3, r2, lsl #2]
+	mov	r8, #0
+	strh	r0, [r5, r1, lsl #3]	@ movhi
+	add	r5, r5, r1, lsl #3
+	strh	r8, [r5, #2]	@ movhi
+	cbnz	r7, .L2035
+	ldr	r3, .L2039+12
+	movs	r1, #255
+	ldr	r0, [r5, #4]
+	ldrh	r2, [r3]
+	bl	ftl_memset
+.L2036:
+	movs	r0, #0
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.L2035:
+	ldr	r6, .L2039+20
+	mov	r0, r7
+	ldr	r3, .L2039+24
+	ldr	r1, [r5, #4]
+	ldr	r2, [r6]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	bl	ftl_read_ppa_page
+	ldr	r2, [r6]
+	mov	r3, r0
+	ldr	r2, [r2]
+	cmp	r2, r4
+	beq	.L2037
+	str	r7, [sp]
+	mov	r1, r4
+	ldr	r0, .L2039+28
+	bl	printf
+	ldr	r1, [r10]
+	movs	r2, #4
+	ldr	r0, .L2039+32
+	ldrh	r3, [r1, #698]
+	add	r1, r1, #704
+	bl	rknand_print_hex
+	movs	r3, #16
+	movs	r2, #4
+	ldr	r1, [r5, #4]
+	ldr	r0, .L2039+36
+	bl	rknand_print_hex
+	movs	r3, #16
+	movs	r2, #4
+	ldr	r1, [r6]
+	ldr	r0, .L2039+40
+	bl	rknand_print_hex
+	ldr	r3, .L2039+44
+	movs	r0, #1
+	ldrh	r3, [r3]
+	rsb	r2, r3, #21
+	lsls	r0, r0, r2
+	lsrs	r7, r7, r3
+	ldr	r3, .L2039+48
+	subs	r0, r0, #1
+	ands	r0, r0, r7
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	mov	r1, r8
+	uxth	r0, r0
+	bl	ftl_sblk_dump
+.L2037:
+	ldr	r3, [r6]
+	ldr	r3, [r3]
+	cmp	r4, r3
+	beq	.L2036
+	movs	r2, #55
+	ldr	r1, .L2039
+	ldr	r0, .L2039+4
+	bl	printf
+.L2038:
+	b	.L2038
+.L2040:
+	.align	2
+.L2039:
+	.word	.LANCHOR148
+	.word	.LC0
+	.word	.LC92
+	.word	.LANCHOR149
+	.word	.LANCHOR93
+	.word	.LANCHOR141
+	.word	.LANCHOR45
+	.word	.LC93
+	.word	.LC94
+	.word	.LC95
+	.word	.LC96
+	.word	.LANCHOR71
+	.word	.LANCHOR70
+	.word	.LANCHOR46
+	.size	load_l2p_region, .-load_l2p_region
+	.section	.text.pm_gc,"ax",%progbits
+	.align	1
+	.global	pm_gc
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	pm_gc, %function
+pm_gc:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r4, .L2054
+	ldr	r5, .L2054+4
+	ldr	r3, [r4]
+	mov	r8, r4
+	ldrh	r2, [r3, #688]
+	ldrh	r3, [r5]
+	subs	r3, r3, #1
+	cmp	r2, r3
+	blt	.L2043
+	bl	pm_free_sblk
+	ldr	r2, [r4]
+	ldrh	r3, [r5]
+	ldrh	r1, [r2, #688]
+	subs	r3, r3, #1
+	cmp	r1, r3
+	blt	.L2043
+	uxth	r0, r0
+	movw	r7, #65535
+	adds	r0, r0, #208
+	ldrh	r6, [r2, r0, lsl #1]
+	cmp	r6, r7
+	bne	.L2045
+	movs	r2, #127
+	ldr	r1, .L2054+8
+	ldr	r0, .L2054+12
+	bl	printf
+.L2046:
+	b	.L2046
+.L2045:
+	ldr	r4, .L2054+16
+	bl	pm_select_ram_region
+	mov	r5, r0
+	ldrh	r0, [r4, r0, lsl #3]
+	cmp	r0, r7
+	beq	.L2047
+	add	r7, r4, r5, lsl #3
+	ldr	r1, [r7, #4]
+	cbz	r1, .L2047
+	ldrsh	r3, [r7, #2]
+	cmp	r3, #0
+	bge	.L2047
+	bl	pm_write_page
+	ldrh	r3, [r7, #2]
+	ubfx	r3, r3, #0, #15
+	strh	r3, [r7, #2]	@ movhi
+.L2047:
+	mov	fp, #0
+.L2048:
+	ldr	r1, [r8]
+	uxth	r10, fp
+	ldrh	r0, [r1, #698]
+	cmp	r0, r10
+	bhi	.L2050
+	bl	pm_free_sblk
+.L2043:
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2050:
+	ldr	r3, .L2054+20
+	uxth	r7, fp
+	add	ip, r7, #176
+	ldrh	r0, [r3]
+	ldr	r1, [r1, ip, lsl #2]
+	ldr	r3, .L2054+24
+	lsr	ip, r1, r0
+	rsb	r1, r0, #21
+	movs	r0, #1
+	lsls	r0, r0, r1
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	subs	r0, r0, #1
+	and	r0, ip, r0
+	bl	__aeabi_uidiv
+	uxth	r0, r0
+	cmp	r6, r0
+	bne	.L2049
+	mov	r1, r5
+	mov	r0, r10
+	bl	load_l2p_region
+	add	r2, r4, r5, lsl #3
+	mov	r0, r7
+	ldr	r1, [r2, #4]
+	bl	pm_write_page
+.L2049:
+	add	fp, fp, #1
+	b	.L2048
+.L2055:
+	.align	2
+.L2054:
+	.word	.LANCHOR46
+	.word	.LANCHOR101
+	.word	.LANCHOR150
+	.word	.LC0
+	.word	.LANCHOR93
+	.word	.LANCHOR71
+	.word	.LANCHOR70
+	.size	pm_gc, .-pm_gc
+	.section	.text.pm_flush_id,"ax",%progbits
+	.align	1
+	.global	pm_flush_id
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	pm_flush_id, %function
+pm_flush_id:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2061
+	push	{r4, lr}
+	add	r4, r3, r0, lsl #3
+	ldrh	r0, [r3, r0, lsl #3]
+	ldr	r1, [r4, #4]
+	bl	pm_write_page
+	ldrh	r3, [r4, #2]
+	ubfx	r3, r3, #0, #15
+	strh	r3, [r4, #2]	@ movhi
+	ldr	r4, .L2061+4
+	ldr	r3, [r4]
+	cbz	r3, .L2057
+	bl	pm_gc
+	movs	r3, #0
+	str	r3, [r4]
+.L2057:
+	movs	r0, #0
+	pop	{r4, pc}
+.L2062:
+	.align	2
+.L2061:
+	.word	.LANCHOR93
+	.word	.LANCHOR91
+	.size	pm_flush_id, .-pm_flush_id
+	.section	.text.pm_flush,"ax",%progbits
+	.align	1
+	.global	pm_flush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	pm_flush, %function
+pm_flush:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	movs	r4, #0
+	ldr	r5, .L2067
+.L2065:
+	add	r3, r5, r4, lsl #3
+	uxth	r0, r4
+	ldrsh	r3, [r3, #2]
+	cmp	r3, #0
+	bge	.L2064
+	bl	pm_flush_id
+.L2064:
+	adds	r4, r4, #1
+	cmp	r4, #32
+	bne	.L2065
+	movs	r0, #0
+	pop	{r3, r4, r5, pc}
+.L2068:
+	.align	2
+.L2067:
+	.word	.LANCHOR93
+	.size	pm_flush, .-pm_flush
+	.section	.text.flt_sys_flush,"ax",%progbits
+	.align	1
+	.global	flt_sys_flush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flt_sys_flush, %function
+flt_sys_flush:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	bl	ftl_flush
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	movs	r0, #0
+	pop	{r3, lr}
+	b	ftl_info_flush
+	.size	flt_sys_flush, .-flt_sys_flush
+	.section	.text.rk_ftl_de_init,"ax",%progbits
+	.align	1
+	.global	rk_ftl_de_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_ftl_de_init, %function
+rk_ftl_de_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	bl	FlashDeInit
+	bl	flt_sys_flush
+	pop	{r3, lr}
+	b	FlashDeInit
+	.size	rk_ftl_de_init, .-rk_ftl_de_init
+	.section	.text.pm_init,"ax",%progbits
+	.align	1
+	.global	pm_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	pm_init, %function
+pm_init:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r8, r0
+	ldr	r5, .L2088
+	movs	r4, #0
+	movs	r0, #64
+	ldr	r3, .L2088+4
+	ldr	r7, .L2088+8
+	mov	r10, r5
+	str	r4, [r3]
+	bl	ftl_malloc
+	str	r0, [r7]
+.L2073:
+	movw	r3, #65535
+	adds	r6, r5, r4
+	strh	r3, [r4, r5]	@ movhi
+	movs	r3, #0
+	strh	r3, [r6, #2]	@ movhi
+	cmp	r8, #0
+	beq	.L2072
+	ldr	r3, .L2088+12
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	lsls	r0, r0, #9
+	bl	ftl_malloc
+	str	r0, [r6, #4]
+.L2072:
+	adds	r4, r4, #8
+	cmp	r4, #256
+	bne	.L2073
+	ldr	r3, [r10, #4]
+	ldr	r4, .L2088+16
+	ldr	r8, [r7]
+	str	r3, [sp, #12]
+	ldr	r3, [r4]
+	ldr	r2, [sp, #12]
+	ldrh	r1, [r3, #692]
+	ldrb	r0, [r3, #694]	@ zero_extendqisi2
+	movs	r3, #4
+	str	r3, [sp]
+	mov	r3, r8
+	bl	flash_get_last_written_page
+	ldr	r1, [r4]
+	mov	r5, r0
+	ldrh	r2, [r1, #696]
+	cmp	r2, r0
+	bgt	.L2074
+	mov	r3, r0
+	ldrh	r1, [r1, #692]
+	ldr	r0, .L2088+20
+	bl	printf
+	ldr	r3, [r4]
+	ldrsh	r6, [r3, #696]
+.L2075:
+	cmp	r6, r5
+	ble	.L2077
+	ldr	r3, .L2088+24
+	movs	r2, #1
+	add	r5, r5, r2
+	strb	r2, [r3]
+	ldr	r3, [r4]
+	strh	r5, [r3, #696]	@ movhi
+	bl	pm_free_sblk
+	ldr	r1, [r10, #4]
+	mov	r0, #-1
+	bl	pm_write_page
+	ldr	r1, [r10, #4]
+	mov	r0, #-1
+	bl	pm_write_page
+.L2074:
+	bl	pm_free_sblk
+	bl	pm_gc
+	movs	r0, #0
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2077:
+	ldr	r3, [r4]
+	ldr	r2, .L2088+28
+	ldrh	r7, [r3, #692]
+	ldrh	r2, [r2]
+	ldrb	r0, [r3, #694]	@ zero_extendqisi2
+	ldr	r3, .L2088+12
+	mla	r7, r2, r7, r6
+	ldr	r2, [sp, #12]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	mov	r1, r7
+	str	r3, [sp]
+	mov	r3, r8
+	bl	flash_read_page_en
+	ldr	r3, [r4]
+	mov	fp, r0
+	ldr	r0, .L2088+32
+	ldr	r2, [r3, #48]
+	adds	r2, r2, #1
+	str	r2, [r3, #48]
+	mov	r2, r7
+	ldrh	r3, [r3, #694]
+	ldr	r1, [r8]
+	bl	printf
+	cmp	fp, #-1
+	beq	.L2076
+	cmp	fp, #512
+	beq	.L2076
+	ldr	r2, [r4]
+	ldr	r3, [r8]
+	ldrh	r1, [r2, #698]
+	cmp	r3, r1
+	itt	cc
+	addcc	r3, r3, #176
+	strcc	r7, [r2, r3, lsl #2]
+.L2076:
+	adds	r6, r6, #1
+	sxth	r6, r6
+	b	.L2075
+.L2089:
+	.align	2
+.L2088:
+	.word	.LANCHOR93
+	.word	.LANCHOR91
+	.word	.LANCHOR141
+	.word	.LANCHOR45
+	.word	.LANCHOR46
+	.word	.LC97
+	.word	.LANCHOR133
+	.word	.LANCHOR75
+	.word	.LC98
+	.size	pm_init, .-pm_init
+	.section	.text.pm_log2phys,"ax",%progbits
+	.align	1
+	.global	pm_log2phys
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	pm_log2phys, %function
+pm_log2phys:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2104
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r7, r1
+	mov	r4, r0
+	mov	r8, r2
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	lsls	r1, r5, #7
+	lsls	r5, r5, #7
+	bl	__aeabi_uidiv
+	ldr	r3, .L2104+4
+	uxth	r10, r0
+	mov	r6, r0
+	smulbb	r5, r5, r10
+	ldr	r2, [r3]
+	subs	r5, r4, r5
+	cmp	r4, r2
+	uxth	r5, r5
+	bcc	.L2091
+	mov	r1, r4
+	ldr	r0, .L2104+8
+	bl	printf
+	mov	r0, #-1
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2091:
+	ldr	r2, .L2104+12
+	movs	r3, #0
+	mov	fp, r2
+.L2097:
+	add	r1, r2, r3, lsl #3
+	uxth	r4, r3
+	ldr	r1, [r1, #4]
+	cbz	r1, .L2093
+	ldrh	r1, [r2, r3, lsl #3]
+	cmp	r1, r10
+	bne	.L2093
+.L2094:
+	lsls	r4, r4, #3
+	cmp	r8, #0
+	bne	.L2095
+	add	r3, fp, r4
+	ldr	r3, [r3, #4]
+	ldr	r3, [r3, r5, lsl #2]
+	str	r3, [r7]
+.L2096:
+	add	r4, r4, fp
+	movw	r2, #32767
+	ldrh	r3, [r4, #2]
+	ubfx	r1, r3, #0, #15
+	cmp	r1, r2
+	beq	.L2099
+	adds	r3, r3, #1
+	strh	r3, [r4, #2]	@ movhi
+.L2099:
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2095:
+	add	r2, fp, r4
+	ldr	r1, [r7]
+	ldr	r3, [r2, #4]
+	str	r1, [r3, r5, lsl #2]
+	ldrh	r3, [r2, #2]
+	mvn	r3, r3, lsl #17
+	mvn	r3, r3, lsr #17
+	strh	r3, [r2, #2]	@ movhi
+	ldr	r3, .L2104+16
+	strb	r6, [r3]
+	b	.L2096
+.L2093:
+	adds	r3, r3, #1
+	cmp	r3, #32
+	bne	.L2097
+	bl	pm_select_ram_region
+	ldrh	r2, [fp, r0, lsl #3]
+	movw	r3, #65535
+	mov	r4, r0
+	cmp	r2, r3
+	beq	.L2098
+	add	r3, fp, r0, lsl #3
+	ldrsh	r3, [r3, #2]
+	cmp	r3, #0
+	bge	.L2098
+	bl	pm_flush_id
+.L2098:
+	ldr	r3, .L2104+20
+	mov	r1, r4
+	mov	r0, r10
+	strb	r4, [r3]
+	bl	load_l2p_region
+	b	.L2094
+.L2105:
+	.align	2
+.L2104:
+	.word	.LANCHOR45
+	.word	.LANCHOR47
+	.word	.LC99
+	.word	.LANCHOR93
+	.word	.LANCHOR94
+	.word	.LANCHOR151
+	.size	pm_log2phys, .-pm_log2phys
+	.section	.text.ftl_read_ahead,"ax",%progbits
+	.align	1
+	.global	ftl_read_ahead
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_read_ahead, %function
+ftl_read_ahead:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, lr}
+	sub	sp, sp, #28
+	ldr	r6, .L2119
+	ldr	r3, [r6]
+	adds	r3, r3, #1
+	beq	.L2107
+	movs	r0, #0
+	bl	buf_alloc
+	mov	r4, r0
+	mov	r0, #-1
+	cbz	r4, .L2106
+	ldr	r5, [r6]
+	str	r0, [r6]
+	ldr	r7, [r4, #4]
+	str	r5, [r4, #20]
+	mov	r0, r5
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #20]
+	adds	r0, r0, #1
+	ldr	r6, [r4, #12]
+	bne	.L2109
+	movs	r2, #0
+	add	r1, sp, #20
+	mov	r0, r5
+	bl	pm_log2phys
+.L2109:
+	ldr	r3, [sp, #20]
+	str	r3, [r4, #24]
+	str	r3, [r4, #28]
+	adds	r3, r3, #1
+	bne	.L2110
+	ldr	r3, .L2119+4
+	movs	r1, #0
+	mov	r0, r7
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	lsls	r2, r2, #9
+	bl	ftl_memset
+	ldrb	r3, [r4, #2]	@ zero_extendqisi2
+	orr	r3, r3, #8
+	strb	r3, [r4, #2]
+.L2107:
+	movs	r0, #0
+.L2106:
+	add	sp, sp, #28
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.L2110:
+	movs	r1, #1
+	mov	r0, r4
+	bl	sblk_read_page
+	ldr	r7, [r4, #36]
+	cmp	r7, #256
+	bne	.L2111
+	ldr	r3, .L2119+8
+	mov	r8, #1
+	ldr	r0, [sp, #20]
+	ldrh	r2, [r3]
+	rsb	r3, r2, #21
+	lsrs	r0, r0, r2
+	lsl	r3, r8, r3
+	ldr	r2, .L2119+12
+	subs	r3, r3, #1
+	ands	r0, r0, r3
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	ldr	r2, [r4, #20]
+	uxth	r1, r0
+	mov	r10, r0
+	ldr	r3, [r4, #24]
+	ldr	r0, .L2119+16
+	bl	printf
+	movs	r2, #0
+	mov	r1, r8
+	uxth	r0, r10
+	bl	gc_add_sblk
+.L2111:
+	ldr	r3, [r6, #4]
+	cmp	r5, r3
+	beq	.L2112
+	ldr	r2, [r6, #12]
+	ldrb	r1, [r4, #1]	@ zero_extendqisi2
+	ldr	r0, .L2119+20
+	str	r2, [sp, #12]
+	ldr	r2, [r6, #8]
+	str	r3, [sp, #4]
+	str	r2, [sp, #8]
+	mov	r2, r5
+	ldr	r3, [r6]
+	str	r3, [sp]
+	ldr	r3, [sp, #20]
+	bl	printf
+.L2112:
+	ldr	r3, [r6, #4]
+	cmp	r5, r3
+	bne	.L2113
+	adds	r7, r7, #1
+	bne	.L2107
+.L2113:
+	movw	r2, #758
+	ldr	r1, .L2119+24
+	ldr	r0, .L2119+28
+	bl	printf
+.L2114:
+	b	.L2114
+.L2120:
+	.align	2
+.L2119:
+	.word	.LANCHOR49
+	.word	.LANCHOR45
+	.word	.LANCHOR71
+	.word	.LANCHOR70
+	.word	.LC100
+	.word	.LC101
+	.word	.LANCHOR152
+	.word	.LC0
+	.size	ftl_read_ahead, .-ftl_read_ahead
+	.section	.text.gc_update_l2p_map,"ax",%progbits
+	.align	1
+	.global	gc_update_l2p_map
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_update_l2p_map, %function
+gc_update_l2p_map:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2138
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r5, #0
+	sub	sp, sp, #24
+	mov	r4, r5
+	mov	r8, r5
+	ldr	fp, [r3]
+.L2122:
+	ldr	r3, .L2138+4
+	ldrh	r3, [r3]
+	cmp	r4, r3
+	bge	.L2132
+	lsls	r3, r4, #1
+	movs	r7, #0
+	subs	r3, r3, #1
+	str	r3, [sp, #8]
+	b	.L2133
+.L2129:
+	ldr	r3, .L2138+8
+	ldr	r3, [r3]
+	ldr	r10, [r3, r8, lsl #2]
+	cmp	r10, #-1
+	beq	.L2123
+	ldr	r2, .L2138+12
+	mov	r0, r10
+	ldr	r2, [r2]
+	ldr	r3, [r2, r8, lsl #2]
+	str	r3, [sp, #4]
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #20]
+	adds	r0, r0, #1
+	bne	.L2124
+	movs	r2, #0
+	add	r1, sp, #20
+	mov	r0, r10
+	bl	pm_log2phys
+.L2124:
+	ldr	r2, [sp, #20]
+	ldr	r3, [sp, #4]
+	cmp	r3, r2
+	bne	.L2125
+	ldr	r3, [sp, #12]
+	ldr	r2, .L2138+16
+	ldrh	r1, [r3, #96]
+	ldrh	r2, [r2]
+	ldr	r3, .L2138+20
+	muls	r2, r1, r2
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	cmp	r1, #3
+	bne	.L2126
+	add	r2, r2, r4
+	orr	r2, r2, r6, lsl #24
+.L2137:
+	str	r2, [sp, #16]
+	add	r1, sp, #16
+	movs	r2, #1
+	mov	r0, r10
+	bl	pm_log2phys
+	ldr	r3, .L2138+24
+	adds	r5, r5, #1
+	ldrh	r0, [r3]
+	movs	r3, #1
+	rsb	r2, r0, #21
+	lsls	r3, r3, r2
+	ldr	r2, [sp, #4]
+	subs	r3, r3, #1
+	lsrs	r2, r2, r0
+	mov	r0, r2
+	ldr	r2, .L2138+28
+	ands	r0, r0, r3
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	uxth	r0, r0
+	bl	ftl_vpn_decrement
+.L2125:
+	add	r8, r8, #1
+.L2123:
+	adds	r6, r6, #1
+.L2131:
+	ldr	r3, .L2138+20
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r6, r3
+	ble	.L2129
+	adds	r7, r7, #1
+.L2133:
+	ldrb	r3, [fp, #89]	@ zero_extendqisi2
+	cmp	r7, r3
+	bge	.L2130
+	add	r3, fp, r7, lsl #1
+	movs	r6, #1
+	str	r3, [sp, #12]
+	b	.L2131
+.L2126:
+	cmp	r1, #2
+	itett	eq
+	ldreq	r3, [sp, #8]
+	addne	r2, r2, r4
+	addeq	r2, r2, r3
+	addeq	r2, r2, r6
+	it	eq
+	orreq	r2, r2, #33554432
+	b	.L2137
+.L2130:
+	adds	r4, r4, #1
+	b	.L2122
+.L2132:
+	ldr	r3, .L2138+32
+	ldrh	r2, [fp, #80]
+	ldr	r3, [r3]
+	strh	r5, [r3, r2, lsl #1]	@ movhi
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2139:
+	.align	2
+.L2138:
+	.word	.LANCHOR60
+	.word	.LANCHOR79
+	.word	.LANCHOR107
+	.word	.LANCHOR108
+	.word	.LANCHOR75
+	.word	.LANCHOR64
+	.word	.LANCHOR71
+	.word	.LANCHOR70
+	.word	.LANCHOR56
+	.size	gc_update_l2p_map, .-gc_update_l2p_map
+	.section	.text.gc_update_l2p_map_new,"ax",%progbits
+	.align	1
+	.global	gc_update_l2p_map_new
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_update_l2p_map_new, %function
+gc_update_l2p_map_new:
+	@ args = 0, pretend = 0, frame = 32
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2177
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #32
+	ldr	r2, .L2177+4
+	ldr	r4, [r3]
+	ldrh	r2, [r2]
+	str	r3, [sp, #16]
+	ldrb	r1, [r4, #89]	@ zero_extendqisi2
+	muls	r2, r1, r2
+	str	r2, [sp, #4]
+	ldr	r2, .L2177+8
+	ldr	r2, [r2]
+	tst	r2, #256
+	beq	.L2141
+	ldrh	r1, [r4, #80]
+	ldr	r0, .L2177+12
+	bl	printf
+.L2141:
+	ldr	r3, .L2177+16
+	movs	r7, #0
+	ldr	r1, [sp, #4]
+	mov	r5, r7
+	ldrh	r2, [r4, #80]
+	ldr	r3, [r3]
+	subs	r1, r1, #1
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+.L2142:
+	ldr	r3, [sp, #4]
+	cmp	r5, r3
+	bne	.L2151
+	ldr	r3, .L2177+8
+	ldr	r5, .L2177+16
+	ldr	r3, [r3]
+	tst	r3, #256
+	beq	.L2152
+	ldr	r3, [sp, #16]
+	ldrh	r0, [r4, #80]
+	ldr	r2, [r5]
+	ldr	r1, [r3]
+	mov	r3, r7
+	ldrh	r2, [r2, r0, lsl #1]
+	ldrh	r1, [r1, #80]
+	ldr	r0, .L2177+20
+	bl	printf
+.L2152:
+	ldrh	r2, [r4, #80]
+	ldr	r3, [r5]
+	ldrh	r1, [r3, r2, lsl #1]
+	cmp	r7, r1
+	beq	.L2153
+	mov	r2, #448
+	ldr	r1, .L2177+24
+	ldr	r0, .L2177+28
+	bl	printf
+.L2154:
+	b	.L2154
+.L2151:
+	ldr	r3, .L2177+32
+	lsl	r8, r5, #2
+	ldr	r3, [r3]
+	ldr	r6, [r3, r5, lsl #2]
+	adds	r2, r6, #1
+	beq	.L2143
+	ldr	r3, .L2177+36
+	mov	r0, r6
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	lsls	r1, r1, #7
+	bl	__aeabi_uidiv
+	uxth	r3, r0
+	str	r3, [sp, #12]
+	ldr	r3, .L2177+8
+	ldr	r3, [r3]
+	lsls	r3, r3, #23
+	bpl	.L2144
+	mov	r3, r5
+	mov	r2, r6
+	ldr	r1, [sp, #12]
+	ldr	r0, .L2177+40
+	bl	printf
+.L2144:
+	ldr	fp, .L2177+32
+	str	r5, [sp, #8]
+.L2150:
+	ldr	r3, [fp]
+	ldr	r6, [r3, r8]
+	adds	r0, r6, #1
+	beq	.L2145
+	ldr	r3, .L2177+36
+	mov	r0, r6
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	lsls	r1, r1, #7
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #12]
+	uxth	r0, r0
+	cmp	r3, r0
+	bne	.L2145
+	ldr	r3, .L2177+44
+	mov	r0, r6
+	ldr	r3, [r3]
+	ldr	r10, [r3, r8]
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #28]
+	adds	r0, r0, #1
+	bne	.L2146
+	movs	r2, #0
+	add	r1, sp, #28
+	mov	r0, r6
+	bl	pm_log2phys
+.L2146:
+	ldr	r3, [sp, #28]
+	cmp	r10, r3
+	bne	.L2147
+	ldr	r3, .L2177+48
+	add	r1, sp, #32
+	movs	r2, #1
+	mov	r0, r6
+	adds	r7, r7, #1
+	ldr	r3, [r3]
+	ldr	r3, [r3, r8]
+	str	r3, [r1, #-8]!
+	bl	pm_log2phys
+	ldr	r3, .L2177+52
+	ldrh	r0, [r3]
+	movs	r3, #1
+	rsb	r2, r0, #21
+	lsls	r3, r3, r2
+	ldr	r2, .L2177+56
+	lsr	r0, r10, r0
+	subs	r3, r3, #1
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	ands	r0, r0, r3
+	bl	__aeabi_uidiv
+	uxth	r3, r0
+	mov	r0, r3
+	str	r3, [sp, #20]
+	bl	ftl_vpn_decrement
+	ldrh	r2, [r4, #80]
+	ldr	r3, [sp, #20]
+	cmp	r2, r3
+	bne	.L2148
+	ldr	r3, .L2177+8
+	ldr	r3, [r3]
+	lsls	r1, r3, #23
+	bpl	.L2148
+	ldr	r3, [sp, #28]
+	mov	r2, r10
+	mov	r1, r6
+	ldr	r0, .L2177+60
+	bl	printf
+.L2148:
+	ldr	r3, [fp]
+	mov	r2, #-1
+	str	r2, [r3, r8]
+.L2145:
+	ldr	r3, [sp, #8]
+	add	r8, r8, #4
+	adds	r3, r3, #1
+	str	r3, [sp, #8]
+	ldr	r2, [sp, #8]
+	ldr	r3, [sp, #4]
+	cmp	r3, r2
+	bne	.L2150
+.L2143:
+	adds	r5, r5, #1
+	b	.L2142
+.L2147:
+	ldr	r2, .L2177+8
+	ldr	r2, [r2]
+	lsls	r2, r2, #23
+	bpl	.L2149
+	mov	r2, r10
+	mov	r1, r6
+	ldr	r0, .L2177+64
+	bl	printf
+.L2149:
+	ldrh	r0, [r4, #80]
+	bl	ftl_vpn_decrement
+	b	.L2148
+.L2153:
+	strh	r7, [r3, r2, lsl #1]	@ movhi
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2178:
+	.align	2
+.L2177:
+	.word	.LANCHOR60
+	.word	.LANCHOR68
+	.word	.LANCHOR22
+	.word	.LC102
+	.word	.LANCHOR56
+	.word	.LC106
+	.word	.LANCHOR153
+	.word	.LC0
+	.word	.LANCHOR107
+	.word	.LANCHOR45
+	.word	.LC103
+	.word	.LANCHOR108
+	.word	.LANCHOR109
+	.word	.LANCHOR71
+	.word	.LANCHOR70
+	.word	.LC104
+	.word	.LC105
+	.size	gc_update_l2p_map_new, .-gc_update_l2p_map_new
+	.section	.text.gc_scan_src_blk_one_page,"ax",%progbits
+	.align	1
+	.global	gc_scan_src_blk_one_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_scan_src_blk_one_page, %function
+gc_scan_src_blk_one_page:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r0, #0
+	ldr	r4, .L2214
+	mov	r6, r0
+	movw	r7, #65535
+	ldrb	r3, [r4, #4]	@ zero_extendqisi2
+	add	r2, r4, r3, lsl #1
+	ldrh	r5, [r2, #36]
+	ldr	r2, .L2214+4
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	ldrh	r2, [r4, #2]
+.L2180:
+	cmp	r5, r7
+	beq	.L2182
+	cbz	r6, .L2183
+	strb	r3, [r4, #4]
+.L2183:
+	cbz	r0, .L2184
+	strh	r2, [r4, #2]	@ movhi
+.L2184:
+	ldr	r3, .L2214+8
+	ldrh	r3, [r3]
+	muls	r5, r3, r5
+	ldr	r3, .L2214+12
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	mov	r8, r3
+	cmp	r2, #2
+	bne	.L2185
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L2185
+	ldrh	r3, [r4, #2]
+	add	r5, r5, r3, lsl #1
+.L2186:
+	ldrb	r3, [r4, #4]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	cmp	r1, r3
+	strb	r3, [r4, #4]
+	bne	.L2187
+	ldrh	r3, [r4, #2]
+	adds	r3, r3, #1
+	strh	r3, [r4, #2]	@ movhi
+	movs	r3, #0
+	strb	r3, [r4, #4]
+.L2187:
+	ldr	r10, .L2214+16
+	movs	r0, #1
+	bl	buf_alloc
+	movs	r6, #0
+	mov	r7, r0
+.L2197:
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	cmp	r3, #3
+	bne	.L2188
+	cmp	r6, #0
+	beq	.L2189
+.L2188:
+	cmp	r3, r6
+	bgt	.L2190
+.L2198:
+	mov	r0, r7
+	bl	buf_free
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2182:
+	adds	r3, r3, #1
+	movs	r6, #1
+	uxtb	r3, r3
+	cmp	r3, r1
+	itt	eq
+	moveq	r3, #0
+	addeq	r2, r2, #1
+	add	r5, r4, r3, lsl #1
+	itt	eq
+	uxtheq	r2, r2
+	moveq	r0, #1
+	ldrh	r5, [r5, #36]
+	b	.L2180
+.L2185:
+	ldrh	r3, [r4, #2]
+	add	r5, r5, r3
+	b	.L2186
+.L2190:
+	ldrb	r2, [r8]	@ zero_extendqisi2
+	cmp	r2, #2
+	bne	.L2191
+	cbnz	r3, .L2191
+	adds	r3, r6, r5
+	orr	r3, r3, #33554432
+.L2213:
+	str	r3, [r7, #24]
+	movs	r1, #1
+	mov	r0, r7
+	bl	sblk_read_page
+	ldr	r3, [r7, #36]
+	adds	r2, r3, #1
+	beq	.L2194
+	cmp	r3, #512
+	beq	.L2194
+	ldr	r3, [r7, #12]
+	ldr	fp, [r3, #4]
+	mov	r0, fp
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #4]
+	adds	r0, r0, #1
+	bne	.L2196
+	movs	r2, #0
+	add	r1, sp, #4
+	mov	r0, fp
+	bl	pm_log2phys
+.L2196:
+	ldr	r3, [sp, #4]
+	cmp	r5, r3
+	bne	.L2194
+	ldrh	r3, [r4, #20]
+	ldr	r2, [r10]
+	str	r5, [r2, r3, lsl #2]
+	adds	r3, r3, #1
+	strh	r3, [r4, #20]	@ movhi
+.L2194:
+	ldrh	r3, [r4, #22]
+	adds	r3, r3, #1
+	strh	r3, [r4, #22]	@ movhi
+.L2189:
+	adds	r6, r6, #1
+	cmp	r6, #4
+	bne	.L2197
+	b	.L2198
+.L2191:
+	orr	r3, r5, r6, lsl #24
+	b	.L2213
+.L2215:
+	.align	2
+.L2214:
+	.word	.LANCHOR59
+	.word	.LANCHOR69
+	.word	.LANCHOR75
+	.word	.LANCHOR64
+	.word	.LANCHOR61
+	.size	gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page
+	.section	.text.gc_scan_static_data,"ax",%progbits
+	.align	1
+	.global	gc_scan_static_data
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_scan_static_data, %function
+gc_scan_static_data:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
+	ldr	r4, .L2234
+	ldr	r3, [r4]
+	ldr	r2, [r3, #544]
+	adds	r2, r2, #1
+	beq	.L2217
+	ldr	r6, .L2234+4
+	movs	r5, #11
+	ldr	r7, .L2234+8
+.L2226:
+	ldr	r3, [r4]
+	movs	r2, #0
+	add	r1, sp, #4
+	ldr	r0, [r3, #544]
+	bl	pm_log2phys
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #1
+	beq	.L2218
+	movs	r0, #1
+	bl	buf_alloc
+	ldr	r3, [sp, #4]
+	mov	r8, r0
+	movs	r1, #1
+	str	r3, [r0, #24]
+	bl	sblk_read_page
+	ldr	r3, [r8, #36]
+	cmp	r3, #256
+	bne	.L2219
+	ldrh	r2, [r6]
+	mov	r10, #1
+	ldr	r0, [sp, #4]
+	ldrb	r1, [r7]	@ zero_extendqisi2
+	rsb	r3, r2, #21
+	lsl	r3, r10, r3
+	lsrs	r0, r0, r2
+	subs	r3, r3, #1
+	ands	r0, r0, r3
+	bl	__aeabi_uidiv
+	movs	r2, #0
+	mov	r1, r10
+	uxth	r0, r0
+	bl	gc_add_sblk
+.L2219:
+	ldr	r2, [r8, #12]
+	ldr	r3, [r4]
+	ldr	r2, [r2, #4]
+	ldr	r3, [r3, #544]
+	cmp	r2, r3
+	beq	.L2220
+	movw	r2, #1149
+	ldr	r1, .L2234+12
+	ldr	r0, .L2234+16
+	bl	printf
+.L2221:
+	b	.L2221
+.L2220:
+	mov	r0, r8
+	bl	buf_free
+.L2218:
+	ldr	r3, [r4]
+	ldr	r1, .L2234+20
+	ldr	r2, [r3, #544]
+	ldr	r1, [r1]
+	adds	r2, r2, #1
+	cmp	r2, r1
+	str	r2, [r3, #544]
+	bcc	.L2222
+	mov	r2, #-1
+	str	r2, [r3, #544]
+	ldr	r2, [r3, #548]
+	adds	r2, r2, #1
+	str	r2, [r3, #548]
+	bl	ftl_flush
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	movs	r0, #0
+	bl	ftl_info_flush
+.L2216:
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.L2222:
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #1
+	bne	.L2216
+	subs	r5, r5, #1
+	uxth	r5, r5
+	cmp	r5, #0
+	bne	.L2226
+	b	.L2216
+.L2217:
+	ldr	r2, .L2234+24
+	ldr	r2, [r2]
+	ldr	r1, [r2, #40]
+	cmp	r1, #20480
+	bls	.L2228
+	ldr	r0, [r2, #44]
+	add	r0, r0, r1, lsr #10
+	ubfx	r1, r1, #0, #10
+	str	r1, [r2, #40]
+	str	r0, [r2, #44]
+.L2228:
+	ldr	r1, [r3, #536]
+	ldr	r0, [r3, #12]
+	add	r1, r1, #12910592
+	add	r1, r1, #49408
+	cmp	r0, r1
+	ldr	r1, [r2, #44]
+	bhi	.L2229
+	ldr	r2, [r3, #540]
+	add	r2, r2, #99840
+	adds	r2, r2, #160
+	cmp	r1, r2
+	bls	.L2216
+.L2229:
+	movs	r2, #0
+	str	r1, [r3, #540]
+	str	r0, [r3, #536]
+	str	r2, [r3, #544]
+	b	.L2216
+.L2235:
+	.align	2
+.L2234:
+	.word	.LANCHOR60
+	.word	.LANCHOR71
+	.word	.LANCHOR70
+	.word	.LANCHOR154
+	.word	.LC0
+	.word	.LANCHOR47
+	.word	.LANCHOR46
+	.size	gc_scan_static_data, .-gc_scan_static_data
+	.section	.text.ftl_sblk_dump,"ax",%progbits
+	.align	1
+	.global	ftl_sblk_dump
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_sblk_dump, %function
+ftl_sblk_dump:
+	@ args = 0, pretend = 0, frame = 80
+	@ frame_needed = 0, uses_anonymous_args = 0
+	movw	r3, #65535
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	cmp	r0, r3
+	sub	sp, sp, #120
+	mov	r7, r0
+	str	r1, [sp, #64]
+	beq	.L2258
+	ldr	r5, .L2286
+	lsls	r4, r0, #2
+	add	r1, sp, #104
+	strh	r0, [sp, #88]	@ movhi
+	ldr	r3, [r5]
+	add	r3, r3, r4
+	ldrb	r3, [r3, #2]	@ zero_extendqisi2
+	and	r3, r3, #224
+	cmp	r3, #160
+	itet	eq
+	ldreq	r3, .L2286+4
+	movne	r3, #1
+	ldrbeq	r3, [r3]	@ zero_extendqisi2
+	str	r3, [sp, #44]
+	bl	ftl_get_blk_list_in_sblk
+	ldr	r3, .L2286+8
+	uxtb	r0, r0
+	movs	r2, #0
+	strb	r0, [sp, #97]
+	ldrh	r1, [r3]
+	ldr	r3, .L2286+12
+	strh	r2, [sp, #90]	@ movhi
+	strb	r2, [sp, #93]
+	ldr	r3, [r3]
+	smulbb	r1, r1, r0
+	strh	r2, [sp, #98]	@ movhi
+	lsls	r6, r3, #19
+	strh	r1, [sp, #94]	@ movhi
+	bpl	.L2239
+	ldr	r3, [r5]
+	mov	r1, r7
+	add	r3, r3, r4
+	ldrb	r2, [r3, #2]	@ zero_extendqisi2
+	str	r0, [sp]
+	ldr	r3, [sp, #44]
+	ldr	r0, .L2286+16
+	lsrs	r2, r2, #5
+	bl	printf
+.L2239:
+	movs	r6, #0
+	movs	r0, #1
+	bl	buf_alloc
+	mov	fp, r6
+	mov	r5, r0
+	str	r6, [sp, #52]
+	str	r6, [sp, #48]
+.L2240:
+	ldr	r3, .L2286+8
+	ldrh	r2, [r3]
+	uxth	r3, r6
+	cmp	r2, r3
+	bls	.L2255
+	str	r3, [sp, #68]
+	lsls	r3, r3, #1
+	ldr	r8, .L2286+12
+	subs	r3, r3, #1
+	str	r3, [sp, #72]
+	movs	r3, #0
+	str	r3, [sp, #56]
+	b	.L2256
+.L2252:
+	ldr	r3, [sp, #76]
+	add	r2, sp, #120
+	add	r3, r2, r3, lsl #1
+	ldrh	r10, [r3, #-32]
+	movw	r3, #65535
+	cmp	r10, r3
+	beq	.L2241
+	ldr	r3, .L2286+20
+	ldrh	r4, [r3]
+	ldr	r3, [sp, #44]
+	cmp	r3, #3
+	mul	r4, r10, r4
+	bne	.L2242
+	ldr	r3, [sp, #40]
+	uxtah	r4, r4, r6
+.L2284:
+	orr	r4, r4, r3, lsl #24
+.L2243:
+	movs	r1, #1
+	str	r4, [r5, #24]
+	mov	r0, r5
+	bl	sblk_read_page
+	ldr	r3, [r5, #36]
+	str	r3, [sp, #60]
+	ldr	r3, [r8]
+	lsls	r1, r3, #19
+	bpl	.L2245
+	ldr	r2, [r5, #12]
+	ldr	r3, [r5, #4]
+	ldr	r0, .L2286+24
+	ldr	r1, [r2, #12]
+	str	r1, [sp, #32]
+	ldr	r1, [r2, #8]
+	str	r1, [sp, #28]
+	ldr	r1, [r2, #4]
+	str	r1, [sp, #24]
+	mov	r1, r10
+	ldr	r2, [r2]
+	str	r2, [sp, #20]
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #16]
+	ldr	r2, [r3, #8]
+	str	r2, [sp, #12]
+	ldr	r2, [r3, #4]
+	str	r2, [sp, #8]
+	ldr	r3, [r3]
+	ldr	r2, [sp, #68]
+	str	r3, [sp, #4]
+	ldr	r3, [sp, #60]
+	str	r3, [sp]
+	mov	r3, r4
+	bl	printf
+.L2245:
+	ldr	r3, [sp, #60]
+	adds	r2, r3, #1
+	beq	.L2260
+	cmp	r3, #512
+	ldr	r3, [sp, #48]
+	it	eq
+	moveq	r3, #1
+.L2285:
+	str	r3, [sp, #48]
+	ldr	r3, [r5, #12]
+	ldr	r10, [r3, #4]
+	mov	r0, r10
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #84]
+	adds	r0, r0, #1
+	bne	.L2247
+	movs	r2, #0
+	add	r1, sp, #84
+	mov	r0, r10
+	bl	pm_log2phys
+.L2247:
+	ldr	r3, [sp, #84]
+	cmp	r4, r3
+	bne	.L2248
+	ldr	r3, [sp, #52]
+	adds	r3, r3, #1
+	str	r3, [sp, #52]
+	ldr	r3, [r8]
+	lsls	r0, r3, #19
+	bpl	.L2248
+	ldr	r2, [r5, #12]
+	mov	r1, r4
+	ldr	r3, [sp, #52]
+	ldr	r0, .L2286+28
+	ldr	r2, [r2, #4]
+	bl	printf
+.L2248:
+	ldr	r3, [sp, #64]
+	cbz	r3, .L2249
+	ldr	r2, [r3, fp, lsl #2]
+	lsl	r4, fp, #2
+	ldr	r3, [r5, #12]
+	ldr	r3, [r3, #4]
+	cmp	r3, r2
+	beq	.L2250
+	ldr	r3, [r8]
+	lsls	r1, r3, #19
+	bpl	.L2250
+	mov	r1, fp
+	ldr	r0, .L2286+32
+	bl	printf
+.L2250:
+	ldr	r3, [sp, #64]
+	ldr	r2, [r5, #12]
+	ldr	r3, [r3, r4]
+	ldr	r2, [r2, #4]
+	cmp	r2, r3
+	beq	.L2249
+	adds	r3, r3, #1
+	beq	.L2249
+	mov	r2, #616
+	ldr	r1, .L2286+36
+	ldr	r0, .L2286+40
+	bl	printf
+.L2251:
+	b	.L2251
+.L2242:
+	ldr	r3, [sp, #44]
+	cmp	r3, #2
+	bne	.L2244
+	ldr	r3, [sp, #72]
+	add	r4, r4, r3
+	ldr	r3, [sp, #40]
+	add	r4, r4, r3
+	ldr	r3, .L2286+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	b	.L2284
+.L2244:
+	uxtah	r4, r4, r6
+	b	.L2243
+.L2260:
+	movs	r3, #1
+	b	.L2285
+.L2249:
+	add	fp, fp, #1
+.L2241:
+	ldr	r3, [sp, #40]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	str	r3, [sp, #40]
+.L2254:
+	ldr	r3, [sp, #44]
+	ldr	r2, [sp, #40]
+	cmp	r3, r2
+	bcs	.L2252
+	ldr	r3, [sp, #56]
+	adds	r3, r3, #1
+	str	r3, [sp, #56]
+.L2256:
+	ldrb	r2, [sp, #97]	@ zero_extendqisi2
+	ldrh	r3, [sp, #56]
+	cmp	r2, r3
+	bls	.L2253
+	movs	r3, #1
+	str	r3, [sp, #40]
+	ldrh	r3, [sp, #56]
+	adds	r3, r3, #8
+	str	r3, [sp, #76]
+	b	.L2254
+.L2253:
+	adds	r6, r6, #1
+	b	.L2240
+.L2255:
+	mov	r0, r5
+	bl	buf_free
+	ldr	r3, .L2286+12
+	ldr	r3, [r3]
+	lsls	r3, r3, #19
+	bpl	.L2257
+	ldr	r3, .L2286+44
+	mov	r1, r7
+	ldr	r0, .L2286+48
+	ldr	r2, [r3]
+	ldr	r3, [sp, #52]
+	ldrh	r2, [r2, r7, lsl #1]
+	bl	printf
+.L2257:
+	ldr	r0, [sp, #48]
+.L2236:
+	add	sp, sp, #120
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2258:
+	movs	r0, #0
+	b	.L2236
+.L2287:
+	.align	2
+.L2286:
+	.word	.LANCHOR57
+	.word	.LANCHOR64
+	.word	.LANCHOR79
+	.word	.LANCHOR22
+	.word	.LC107
+	.word	.LANCHOR75
+	.word	.LC73
+	.word	.LC108
+	.word	.LC109
+	.word	.LANCHOR155
+	.word	.LC0
+	.word	.LANCHOR56
+	.word	.LC110
+	.size	ftl_sblk_dump, .-ftl_sblk_dump
+	.section	.text.gc_search_src_blk,"ax",%progbits
+	.align	1
+	.global	gc_search_src_blk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_search_src_blk, %function
+gc_search_src_blk:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2360
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #24
+	str	r2, [sp, #12]
+	mov	r7, r0
+	mov	fp, r3
+	ldr	r2, [r3]
+	str	r1, [sp, #16]
+	add	r1, r0, #60
+	ldrh	r5, [r2, r1, lsl #1]
+	cmp	r5, #0
+	bne	.L2288
+	ldr	r3, .L2360+4
+	ldr	r6, .L2360+8
+	ldr	r2, [r3]
+	mov	r10, r3
+	ldrh	r4, [r2, #134]
+	ldr	r2, [r6]
+	tst	r2, #256
+	beq	.L2291
+	mov	r1, r0
+	ldr	r3, [sp, #12]
+	ldr	r2, [sp, #16]
+	ldr	r0, .L2360+12
+	bl	printf
+.L2291:
+	ldr	r3, [r6]
+	lsls	r2, r3, #23
+	bpl	.L2292
+	ldr	r2, [fp]
+	ldr	r1, [r10]
+	ldr	r3, .L2360+16
+	ldrh	r2, [r2, #126]
+	ldrh	r1, [r1, #134]
+	ldrh	r3, [r3]
+	ldr	r0, .L2360+12
+	bl	printf
+.L2292:
+	ldr	r3, [sp, #12]
+	cmp	r3, #64
+	bls	.L2293
+	movw	r2, #1028
+	ldr	r1, .L2360+20
+	ldr	r0, .L2360+24
+	bl	printf
+.L2294:
+	b	.L2294
+.L2293:
+	ldr	r3, .L2360+28
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	ldr	r3, .L2360+32
+	ldrh	r6, [r3]
+	ldr	r3, .L2360+36
+	ldrh	r3, [r3]
+	smulbb	r6, r6, r2
+	uxth	r6, r6
+	smulbb	r3, r3, r2
+	uxth	r3, r3
+	str	r3, [sp, #8]
+	ldr	r3, [r10]
+	ldrh	r3, [r3, #134]
+.L2357:
+	str	r3, [sp, #4]
+	ldr	r3, .L2360+40
+	ldr	r0, [sp, #4]
+	ldrh	r2, [r3]
+	ldr	r3, [r10]
+	ldrh	r3, [r3, #134]
+	subs	r1, r2, r3
+	cmp	r0, r1
+	blt	.L2307
+.L2304:
+	ldr	r3, [r10]
+	ldr	r2, [sp, #4]
+	ldrh	r1, [r3, #134]
+	ldr	r3, .L2360+40
+	ldrh	r3, [r3]
+	subs	r3, r3, r1
+	cmp	r2, r3
+	ldr	r2, .L2360+32
+	ldr	r3, [fp]
+	blt	.L2308
+	strh	r1, [r3, #126]	@ movhi
+	cmp	r7, #0
+	bne	.L2309
+	ldr	r3, .L2360+16
+	ldrh	r2, [r2]
+	ldrh	r1, [r3]
+	rsb	r0, r2, r2, lsl #3
+	cmp	r1, r6
+	it	cc
+	strhcc	r6, [r3]	@ movhi
+	ldrh	r1, [r3]
+	cmp	r1, r0, asr #3
+	bge	.L2312
+	add	r1, r1, r2, lsr #3
+	strh	r1, [r3]	@ movhi
+.L2312:
+	ldr	r3, .L2360+8
+	ldr	r3, [r3]
+	lsls	r3, r3, #23
+	bpl	.L2318
+	mov	r1, r5
+	ldr	r0, .L2360+44
+	bl	printf
+.L2318:
+	bl	print_ftl_debug_info
+.L2288:
+	mov	r0, r5
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2307:
+	ldr	r1, [fp]
+	ldrh	r4, [r1, #126]
+	ldr	r1, [sp, #4]
+	add	r4, r4, r1
+	uxth	r4, r4
+	cmp	r2, r4
+	bhi	.L2296
+	subs	r3, r3, r2
+	add	r4, r4, r3
+	uxth	r4, r4
+	cmp	r2, r4
+	bhi	.L2296
+	movw	r2, #1038
+	ldr	r1, .L2360+20
+	ldr	r0, .L2360+24
+	bl	printf
+.L2297:
+	b	.L2297
+.L2296:
+	ldr	r3, .L2360+48
+	ldr	r3, [r3]
+	add	r3, r3, r4, lsl #2
+	ldrb	r8, [r3, #2]	@ zero_extendqisi2
+	and	r8, r8, #224
+	cmp	r8, #32
+	beq	.L2298
+	cmp	r8, #224
+	beq	.L2298
+	ldr	r3, .L2360+52
+	cmp	r8, #0
+	bne	.L2299
+	lsls	r2, r4, #1
+	str	r2, [sp, #20]
+	ldr	r2, [r3]
+	ldrh	r1, [r2, r4, lsl #1]
+	cbz	r1, .L2300
+	mov	r2, r4
+	ldr	r0, .L2360+56
+	str	r3, [sp, #20]
+	bl	printf
+	mov	r1, r8
+	mov	r0, r4
+	bl	ftl_sblk_dump
+	ldr	r3, [sp, #20]
+.L2300:
+	ldr	r2, [r3]
+	lsls	r3, r4, #1
+	ldrh	r3, [r2, r3]
+	cmp	r3, #0
+	beq	.L2298
+	movw	r2, #1047
+	ldr	r1, .L2360+20
+	ldr	r0, .L2360+24
+	bl	printf
+.L2301:
+	b	.L2301
+.L2299:
+	ldr	r3, [r3]
+	movw	r2, #65535
+	ldrh	r3, [r3, r4, lsl #1]
+	cmp	r3, r2
+	beq	.L2298
+	ldr	r1, [sp, #16]
+	cmp	r8, #160
+	ite	ne
+	movne	r2, #1
+	moveq	r2, #2
+	ands	r2, r2, r1
+	cbnz	r7, .L2303
+	cmp	r6, r3
+	it	cs
+	movcs	r6, r3
+	cbz	r2, .L2298
+	ldr	r2, .L2360+16
+	ldrh	r2, [r2]
+	cmp	r2, r3
+	bls	.L2298
+	mov	r2, r7
+	mov	r1, r7
+	mov	r0, r4
+	bl	gc_add_sblk
+	cbz	r0, .L2298
+.L2356:
+	adds	r5, r5, #1
+	uxth	r5, r5
+	b	.L2305
+.L2303:
+	cbz	r2, .L2305
+	cmp	r8, #160
+	bne	.L2306
+	ldr	r2, [sp, #8]
+	cmp	r2, r3
+	it	cs
+	movcs	r2, r3
+	str	r2, [sp, #8]
+	ldr	r2, .L2360+60
+	ldrh	r2, [r2]
+	cmp	r2, r3
+	bls	.L2305
+.L2359:
+	mov	r2, r7
+	movs	r1, #0
+	mov	r0, r4
+	bl	gc_add_sblk
+	cbz	r0, .L2305
+	b	.L2356
+.L2306:
+	ldr	r2, .L2360+64
+	cmp	r6, r3
+	it	cs
+	movcs	r6, r3
+	ldrh	r2, [r2]
+	cmp	r2, r3
+	bls	.L2359
+.L2305:
+	ldr	r3, [sp, #12]
+	cmp	r5, r3
+	bhi	.L2304
+.L2298:
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	b	.L2357
+.L2309:
+	ldr	r3, .L2360+36
+	ldrh	r1, [r3]
+	ldr	r3, .L2360+68
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	muls	r3, r1, r3
+	ldr	r1, [sp, #8]
+	cmp	r1, r3
+	ldr	r1, .L2360+60
+	beq	.L2313
+	ldrh	r0, [r1]
+	ldr	r4, [sp, #8]
+	cmp	r0, r4
+	itt	cc
+	ldrhcc	r0, [sp, #8]
+	strhcc	r0, [r1]	@ movhi
+.L2313:
+	ldrh	r4, [r2]
+	ldrh	r0, [r1]
+	lsrs	r2, r4, #3
+	subs	r3, r3, r2
+	cmp	r0, r3
+	itt	lt
+	addlt	r0, r0, r2
+	strhlt	r0, [r1]	@ movhi
+	ldr	r1, .L2360+64
+	ldrh	r3, [r1]
+	cmp	r3, r4, lsr #1
+	bls	.L2312
+	subs	r3, r3, r2
+	strh	r3, [r1]	@ movhi
+	b	.L2312
+.L2308:
+	strh	r4, [r3, #126]	@ movhi
+	cbnz	r7, .L2316
+	ldrh	r1, [r2]
+	ldr	r2, .L2360+16
+	ldrh	r3, [r2]
+	cmp	r3, r1, lsr #2
+	bls	.L2312
+	sub	r3, r3, r1, lsr #3
+	strh	r3, [r2]	@ movhi
+	b	.L2312
+.L2316:
+	ldr	r1, .L2360+60
+	ldrh	r3, [r2]
+	ldr	r0, .L2360+68
+	ldrh	r2, [r1]
+	ldrb	r0, [r0]	@ zero_extendqisi2
+	cmp	r2, r3, lsr #1
+	it	hi
+	subhi	r2, r2, r3, lsr #3
+	mul	r3, r3, r0
+	it	hi
+	strhhi	r2, [r1]	@ movhi
+	ldr	r1, .L2360+64
+	subs	r3, r3, #32
+	ldrh	r2, [r1]
+	cmp	r2, r3
+	itt	lt
+	addlt	r2, r2, #32
+	strhlt	r2, [r1]	@ movhi
+	b	.L2312
+.L2361:
+	.align	2
+.L2360:
+	.word	.LANCHOR60
+	.word	.LANCHOR46
+	.word	.LANCHOR22
+	.word	.LC111
+	.word	.LANCHOR58
+	.word	.LANCHOR156
+	.word	.LC0
+	.word	.LANCHOR69
+	.word	.LANCHOR79
+	.word	.LANCHOR68
+	.word	.LANCHOR54
+	.word	.LC113
+	.word	.LANCHOR57
+	.word	.LANCHOR56
+	.word	.LC112
+	.word	.LANCHOR106
+	.word	.LANCHOR105
+	.word	.LANCHOR70
+	.size	gc_search_src_blk, .-gc_search_src_blk
+	.section	.text.ftl_read,"ax",%progbits
+	.align	1
+	.global	ftl_read
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_read, %function
+ftl_read:
+	@ args = 0, pretend = 0, frame = 48
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r10, r2
+	sub	sp, sp, #64
+	mov	r7, r3
+	cmp	r0, #0
+	bne	.L2363
+	ldr	r3, .L2395
+	mov	r0, #24576
+	ldr	r3, [r3]
+.L2364:
+	add	r2, r1, r10
+	cmp	r3, r2
+	bcc	.L2388
+	ldr	r4, .L2395+4
+	add	fp, r0, r1
+	ldr	r5, .L2395+8
+	mov	r0, fp
+	ldr	r2, [r4]
+	ldrb	r6, [r5]	@ zero_extendqisi2
+	ldr	r3, [r2, #24]
+	mov	r1, r6
+	add	r3, r3, r10
+	str	r3, [r2, #24]
+	bl	__aeabi_uidiv
+	add	r3, r10, fp
+	str	r0, [sp, #28]
+	mov	r1, r6
+	subs	r0, r3, #1
+	str	r3, [sp, #40]
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #28]
+	ldr	r6, [sp, #28]
+	str	r0, [sp, #44]
+	rsb	r3, r3, #1
+	str	r5, [sp, #32]
+	add	r3, r3, r0
+	str	r4, [sp, #52]
+	str	r3, [sp, #24]
+	movs	r3, #0
+	str	r3, [sp, #36]
+.L2366:
+	ldr	r3, [sp, #24]
+	cbnz	r3, .L2386
+	ldr	r0, [sp, #36]
+.L2362:
+	add	sp, sp, #64
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2363:
+	cmp	r0, #3
+	bhi	.L2388
+	lsls	r0, r0, #13
+	mov	r3, #8192
+	b	.L2364
+.L2386:
+	ldr	r3, [sp, #32]
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	ldr	r3, [sp, #28]
+	cmp	r6, r3
+	uxth	r5, r1
+	bne	.L2367
+	mov	r0, fp
+	bl	__aeabi_uidivmod
+	uxth	r8, r1
+	sub	r5, r5, r8
+	uxth	r5, r5
+	cmp	r10, r5
+	bcs	.L2368
+	uxth	r5, r10
+.L2368:
+	ldr	r2, .L2395+12
+	movs	r3, #0
+.L2371:
+	ldr	r1, [r2, #20]
+	cmp	r6, r1
+	bne	.L2369
+	ldrb	r1, [r2, #2]	@ zero_extendqisi2
+	lsls	r1, r1, #28
+	bpl	.L2369
+	ldr	r1, .L2395+12
+	movs	r2, #48
+	lsls	r5, r5, #9
+	mov	r0, r7
+	add	r7, r7, r5
+	mla	r3, r2, r3, r1
+	mov	r2, r5
+	ldr	r1, [r3, #4]
+	add	r1, r1, r8, lsl #9
+	bl	ftl_memcpy
+.L2370:
+	ldr	r3, [sp, #24]
+	adds	r6, r6, #1
+	subs	r3, r3, #1
+	str	r3, [sp, #24]
+	b	.L2366
+.L2367:
+	ldr	r3, [sp, #44]
+	mov	r8, #0
+	cmp	r6, r3
+	ittt	eq
+	addeq	r5, fp, r10
+	mlseq	r1, r6, r1, r5
+	uxtbeq	r5, r1
+	b	.L2368
+.L2369:
+	adds	r3, r3, #1
+	adds	r2, r2, #48
+	cmp	r3, #32
+	bne	.L2371
+	mov	r0, r6
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #60]
+	adds	r0, r0, #1
+	bne	.L2372
+	movs	r2, #0
+	add	r1, sp, #60
+	mov	r0, r6
+	bl	pm_log2phys
+.L2372:
+	ldr	r3, [sp, #60]
+	adds	r3, r3, #1
+	bne	.L2373
+	movs	r4, #0
+.L2374:
+	ldr	r3, [sp, #32]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r4, r3
+	bcs	.L2370
+	mla	r3, r3, r6, r4
+	cmp	fp, r3
+	bhi	.L2375
+	ldr	r2, [sp, #40]
+	cmp	r2, r3
+	bls	.L2375
+	mov	r0, r7
+	add	r7, r7, #512
+	mov	r2, #512
+	movs	r1, #0
+	bl	ftl_memset
+.L2375:
+	adds	r4, r4, #1
+	b	.L2374
+.L2373:
+	movs	r0, #0
+	bl	buf_alloc
+	mov	r4, r0
+	cbnz	r0, .L2377
+	bl	ftl_read_ahead
+	b	.L2366
+.L2377:
+	ldr	r3, [sp, #52]
+	movs	r1, #1
+	ldr	r2, [r3]
+	ldr	r3, [r2, #40]
+	adds	r3, r3, #1
+	str	r3, [r2, #40]
+	ldr	r3, [sp, #60]
+	str	r3, [r0, #24]
+	str	r3, [r0, #28]
+	ldr	r3, [sp, #32]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r5
+	it	eq
+	streq	r7, [r0, #8]
+	bl	sblk_read_page
+	ldr	r3, [r4, #36]
+	adds	r2, r3, #1
+	str	r3, [sp, #20]
+	beq	.L2390
+	cmp	r3, #256
+	bne	.L2380
+	ldr	r3, .L2395+16
+	movs	r1, #1
+	ldr	r0, [sp, #60]
+	ldrh	r2, [r3]
+	rsb	r3, r2, #21
+	lsl	r3, r1, r3
+	lsrs	r0, r0, r2
+	ldr	r2, .L2395+20
+	subs	r3, r3, #1
+	ands	r0, r0, r3
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	ldr	r2, [r4, #20]
+	str	r0, [sp, #48]
+	ldr	r3, [r4, #24]
+	ldrh	r1, [sp, #48]
+	ldr	r0, .L2395+24
+	bl	printf
+	movs	r2, #0
+	movs	r1, #1
+	ldrh	r0, [sp, #48]
+	bl	gc_add_sblk
+.L2380:
+	ldr	r3, [r4, #12]
+	ldr	r2, [r3, #4]
+	cmp	r6, r2
+	beq	.L2381
+	ldr	r0, [r3, #12]
+	ldrb	r1, [r4, #1]	@ zero_extendqisi2
+	str	r0, [sp, #12]
+	ldr	r0, [r3, #8]
+	str	r2, [sp, #4]
+	mov	r2, r6
+	str	r0, [sp, #8]
+	ldr	r3, [r3]
+	ldr	r0, .L2395+28
+	str	r3, [sp]
+	ldr	r3, [sp, #60]
+	bl	printf
+	ldr	r3, .L2395+16
+	ldrh	r2, [r3]
+	movs	r3, #1
+	rsb	r0, r2, #21
+	lsls	r3, r3, r0
+	ldr	r0, [sp, #60]
+	subs	r3, r3, #1
+	lsrs	r0, r0, r2
+	ldr	r2, .L2395+20
+	ands	r0, r0, r3
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	movs	r1, #0
+	uxth	r0, r0
+	bl	ftl_sblk_dump
+.L2381:
+	ldr	r3, [r4, #12]
+	ldr	r3, [r3, #4]
+	cmp	r6, r3
+	bne	.L2382
+	ldr	r3, [sp, #20]
+	adds	r3, r3, #1
+	bne	.L2383
+.L2382:
+	movw	r2, #911
+	ldr	r1, .L2395+32
+	ldr	r0, .L2395+36
+	bl	printf
+.L2384:
+	b	.L2384
+.L2390:
+	ldr	r3, [sp, #20]
+	str	r3, [sp, #36]
+	b	.L2380
+.L2383:
+	ldr	r3, [r4, #8]
+	cbnz	r3, .L2385
+	ldr	r1, [r4, #4]
+	lsls	r2, r5, #9
+	mov	r0, r7
+	add	r1, r1, r8, lsl #9
+	bl	ftl_memcpy
+.L2385:
+	mov	r0, r4
+	add	r7, r7, r5, lsl #9
+	bl	buf_free
+	b	.L2370
+.L2388:
+	mov	r0, #-1
+	b	.L2362
+.L2396:
+	.align	2
+.L2395:
+	.word	.LANCHOR52
+	.word	.LANCHOR46
+	.word	.LANCHOR45
+	.word	.LANCHOR36
+	.word	.LANCHOR71
+	.word	.LANCHOR70
+	.word	.LC114
+	.word	.LC101
+	.word	.LANCHOR157
+	.word	.LC0
+	.size	ftl_read, .-ftl_read
+	.section	.text.FtlRead,"ax",%progbits
+	.align	1
+	.global	FtlRead
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlRead, %function
+FtlRead:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	ftl_read
+	.size	FtlRead, .-FtlRead
+	.section	.text.StorageSysDataLoad,"ax",%progbits
+	.align	1
+	.global	StorageSysDataLoad
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	StorageSysDataLoad, %function
+StorageSysDataLoad:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	mov	r4, r1
+	mov	r5, r0
+	mov	r2, #512
+	movs	r1, #0
+	mov	r0, r4
+	bl	ftl_memset
+	mov	r3, r4
+	mov	r1, r5
+	movs	r2, #1
+	movs	r0, #2
+	pop	{r4, r5, r6, lr}
+	b	ftl_read
+	.size	StorageSysDataLoad, .-StorageSysDataLoad
+	.section	.text.vpn_check,"ax",%progbits
+	.align	1
+	.global	vpn_check
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	vpn_check, %function
+vpn_check:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, lr}
+	ldr	r5, .L2430
+	bl	dump_ftl_info
+	ldr	r1, [r5]
+	ldr	r0, .L2430+4
+	ldr	r4, .L2430+8
+	ldrh	r3, [r1, #80]
+	ldrh	r2, [r1, #48]
+	ldrh	r1, [r1, #16]
+	bl	printf
+	ldr	r3, [r5]
+	ldr	r6, .L2430+12
+	ldrh	r1, [r3, #16]
+	ldrh	r2, [r3, #22]
+	ldr	r3, [r4]
+	ldrh	r3, [r3, r1, lsl #1]
+	subs	r0, r3, r2
+	str	r0, [sp]
+	ldr	r0, .L2430+16
+	bl	printf
+	ldr	r3, [r5]
+	movs	r5, #0
+	ldrh	r1, [r3, #48]
+	ldrh	r2, [r3, #54]
+	ldr	r3, [r4]
+	ldrh	r3, [r3, r1, lsl #1]
+	subs	r0, r3, r2
+	str	r0, [sp]
+	ldr	r0, .L2430+20
+	bl	printf
+	mov	r2, #4352
+	movs	r1, #0
+	ldr	r0, .L2430+24
+	bl	ftl_memset
+.L2400:
+	ldr	r3, .L2430+28
+	ldr	r3, [r3]
+	cmp	r5, r3
+	bcc	.L2408
+	ldr	r6, .L2430+12
+	movs	r5, #0
+	mov	r7, r6
+.L2409:
+	ldrh	r2, [r6]
+	uxth	r3, r5
+	cmp	r2, r3
+	bhi	.L2411
+	ldr	r8, .L2430+24
+	movs	r6, #0
+.L2412:
+	ldrh	r2, [r7]
+	uxth	r3, r6
+	cmp	r2, r3
+	bhi	.L2417
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L2408:
+	mov	r0, r5
+	bl	lpa_hash_get_ppa
+	adds	r2, r0, #1
+	str	r0, [sp, #12]
+	bne	.L2401
+	movs	r2, #0
+	add	r1, sp, #12
+	mov	r0, r5
+	bl	pm_log2phys
+.L2402:
+	ldr	r7, [sp, #12]
+	adds	r3, r7, #1
+	beq	.L2404
+	ldr	r3, .L2430+32
+	ldrh	r0, [r3]
+	movs	r3, #1
+	rsb	r2, r0, #21
+	lsls	r3, r3, r2
+	ldr	r2, .L2430+36
+	lsr	r0, r7, r0
+	subs	r3, r3, #1
+	ands	r0, r0, r3
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	ldrh	r3, [r6]
+	uxth	r8, r0
+	cmp	r3, r8
+	mov	r3, r8
+	bls	.L2405
+	ldr	r1, .L2430+24
+	ldrh	r2, [r1, r8, lsl #1]
+	adds	r2, r2, #1
+	strh	r2, [r1, r8, lsl #1]	@ movhi
+.L2406:
+	ldrh	r3, [r6]
+	cmp	r3, r8
+	bhi	.L2404
+	movw	r2, #1111
+	ldr	r1, .L2430+40
+	ldr	r0, .L2430+44
+	bl	printf
+.L2407:
+	b	.L2407
+.L2401:
+	ldr	r3, .L2430+32
+	ldrh	r2, [r3]
+	movs	r3, #1
+	rsb	r1, r2, #21
+	lsls	r3, r3, r1
+	lsrs	r0, r0, r2
+	ldr	r2, .L2430+36
+	subs	r3, r3, #1
+	ands	r0, r0, r3
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	ldrh	r3, [r6]
+	uxth	r0, r0
+	cmp	r3, r0
+	bhi	.L2402
+	movw	r2, #1101
+	ldr	r1, .L2430+40
+	ldr	r0, .L2430+44
+	bl	printf
+.L2403:
+	b	.L2403
+.L2405:
+	mov	r2, r7
+	mov	r1, r5
+	ldr	r0, .L2430+48
+	bl	printf
+	ldr	r3, .L2430+52
+	movs	r2, #4
+	ldr	r1, .L2430+56
+	ldr	r0, .L2430+60
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	ldr	r1, [r1, #4]
+	lsls	r3, r3, #7
+	bl	rknand_print_hex
+	b	.L2406
+.L2404:
+	adds	r5, r5, #1
+	b	.L2400
+.L2411:
+	ldr	r3, [r4]
+	uxth	r1, r5
+	ldr	r2, .L2430+24
+	ldrh	r3, [r3, r1, lsl #1]
+	ldrh	r2, [r2, r1, lsl #1]
+	cmp	r3, r2
+	beq	.L2410
+	ldr	r0, .L2430+64
+	ldr	r0, [r0]
+	add	r0, r0, r1, lsl #2
+	ldrb	r0, [r0, #2]	@ zero_extendqisi2
+	lsrs	r0, r0, #5
+	str	r0, [sp]
+	ldr	r0, .L2430+68
+	bl	printf
+.L2410:
+	adds	r5, r5, #1
+	b	.L2409
+.L2417:
+	ldr	r3, .L2430+64
+	uxth	r5, r6
+	ldr	r3, [r3]
+	add	r3, r3, r5, lsl #2
+	ldrb	r3, [r3, #2]	@ zero_extendqisi2
+	tst	r3, #224
+	bne	.L2413
+	ldrh	r3, [r8, r5, lsl #1]
+	cbnz	r3, .L2414
+	ldr	r3, [r4]
+	ldrh	r3, [r3, r5, lsl #1]
+	cbz	r3, .L2415
+	mov	r1, r5
+	ldr	r0, .L2430+72
+	bl	printf
+.L2415:
+	ldr	r3, [r4]
+	movs	r2, #0
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+.L2414:
+	ldr	r3, [r4]
+	ldrh	r3, [r3, r5, lsl #1]
+	cbz	r3, .L2413
+	ldrh	r3, [r8, r5, lsl #1]
+	cbz	r3, .L2413
+	movw	r2, #1143
+	ldr	r1, .L2430+40
+	ldr	r0, .L2430+44
+	bl	printf
+.L2416:
+	b	.L2416
+.L2413:
+	adds	r6, r6, #1
+	b	.L2412
+.L2431:
+	.align	2
+.L2430:
+	.word	.LANCHOR60
+	.word	.LC115
+	.word	.LANCHOR56
+	.word	.LANCHOR54
+	.word	.LC116
+	.word	.LC117
+	.word	check_vpc_tbl
+	.word	.LANCHOR47
+	.word	.LANCHOR71
+	.word	.LANCHOR70
+	.word	.LANCHOR158
+	.word	.LC0
+	.word	.LC118
+	.word	.LANCHOR45
+	.word	.LANCHOR93
+	.word	.LC119
+	.word	.LANCHOR57
+	.word	.LC120
+	.word	.LC121
+	.size	vpn_check, .-vpn_check
+	.section	.text.ftl_info_check,"ax",%progbits
+	.align	1
+	.global	ftl_info_check
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_info_check, %function
+ftl_info_check:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r5, #0
+	ldr	r3, .L2467
+	mov	r8, r5
+	mov	r10, r5
+	mov	r6, r5
+	ldr	fp, .L2467+44
+	mov	r7, r5
+	ldr	r2, [r3]
+	str	r5, [sp, #4]
+	str	r3, [sp, #8]
+	ldrh	r4, [r2, #134]
+.L2433:
+	ldr	r2, .L2467+4
+	ldrh	r2, [r2]
+	cmp	r2, r4
+	bhi	.L2448
+	ldr	r3, [sp, #4]
+	mov	r2, r6
+	mov	r1, r7
+	ldr	r0, .L2467+8
+	bl	printf
+	mov	r3, r5
+	mov	r2, r8
+	mov	r1, r10
+	ldr	r0, .L2467+12
+	bl	printf
+	ldr	r3, [sp, #8]
+	ldr	r1, [sp, #4]
+	ldr	r3, [r3]
+	ldrh	r2, [r3, #114]
+	cmp	r2, r10
+	ldrh	r2, [r3, #118]
+	it	ne
+	strhne	r10, [r3, #114]	@ movhi
+	cmp	r2, r8
+	ldrh	r2, [r3, #116]
+	it	ne
+	strhne	r8, [r3, #118]	@ movhi
+	cmp	r2, r5
+	ldrh	r2, [r3, #122]
+	it	ne
+	strhne	r5, [r3, #116]	@ movhi
+	cmp	r2, r7
+	ldrh	r2, [r3, #120]
+	it	ne
+	strhne	r7, [r3, #122]	@ movhi
+	cmp	r2, r6
+	ldrh	r2, [r3, #124]
+	it	ne
+	strhne	r6, [r3, #120]	@ movhi
+	cmp	r2, r1
+	itt	ne
+	ldrhne	r2, [sp, #4]
+	strhne	r2, [r3, #124]	@ movhi
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2448:
+	ldr	r2, .L2467+16
+	ldr	r3, [r2]
+	add	r3, r3, r4, lsl #2
+	ldrb	r2, [r3, #2]	@ zero_extendqisi2
+	and	r1, r2, #224
+	cmp	r1, #64
+	bne	.L2434
+	adds	r7, r7, #1
+	uxth	r7, r7
+.L2466:
+	ldr	r2, [fp]
+	ldrh	r1, [r2, r4, lsl #1]
+	cmp	r1, #15
+	bls	.L2440
+	ldr	r2, .L2467+20
+.L2463:
+	ldrh	r0, [r2]
+	ldr	r2, .L2467+24
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	muls	r2, r0, r2
+	cmp	r1, r2
+	bne	.L2436
+.L2440:
+	movs	r2, #0
+	movs	r1, #1
+	mov	r0, r4
+	bl	gc_add_sblk
+.L2436:
+	adds	r4, r4, #1
+	uxth	r4, r4
+	b	.L2433
+.L2434:
+	cmp	r1, #96
+	bne	.L2437
+	ldr	r2, [sp, #4]
+	adds	r2, r2, #1
+	uxth	r3, r2
+	str	r3, [sp, #4]
+	b	.L2466
+.L2437:
+	cmp	r1, #160
+	bne	.L2439
+	ldr	r2, [fp]
+	adds	r6, r6, #1
+	uxth	r6, r6
+	ldrh	r1, [r2, r4, lsl #1]
+	cmp	r1, #15
+	bls	.L2440
+	ldr	r2, .L2467+28
+	b	.L2463
+.L2439:
+	cmp	r1, #0
+	bne	.L2436
+	ands	r2, r2, #24
+	bne	.L2441
+	add	r10, r10, #1
+	uxth	r10, r10
+.L2442:
+	lsls	r2, r4, #1
+	str	r2, [sp, #12]
+	ldr	r2, [fp]
+	ldrh	r2, [r2, r4, lsl #1]
+	cbz	r2, .L2444
+	mov	r1, r4
+	ldr	r0, .L2467+32
+	str	r3, [sp, #12]
+	bl	printf
+	ldr	r3, [sp, #12]
+	mov	r0, r4
+	ldrb	r2, [r3, #2]	@ zero_extendqisi2
+	lsls	r1, r2, #27
+	ite	mi
+	movmi	r1, #5
+	movpl	r1, #2
+	bfi	r2, r1, #5, #3
+	movs	r1, #1
+	strb	r2, [r3, #2]
+	movs	r2, #0
+	bl	gc_add_sblk
+	bl	vpn_check
+.L2444:
+	ldr	r2, [fp]
+	lsls	r3, r4, #1
+	ldrh	r2, [r2, r3]
+	cmp	r2, #0
+	beq	.L2436
+	movw	r2, #1202
+	ldr	r1, .L2467+36
+	ldr	r0, .L2467+40
+	bl	printf
+.L2447:
+	b	.L2447
+.L2441:
+	cmp	r2, #16
+	itete	eq
+	addeq	r8, r8, #1
+	addne	r5, r5, #1
+	uxtheq	r8, r8
+	uxthne	r5, r5
+	b	.L2442
+.L2468:
+	.align	2
+.L2467:
+	.word	.LANCHOR46
+	.word	.LANCHOR54
+	.word	.LC123
+	.word	.LC124
+	.word	.LANCHOR57
+	.word	.LANCHOR79
+	.word	.LANCHOR69
+	.word	.LANCHOR68
+	.word	.LC122
+	.word	.LANCHOR159
+	.word	.LC0
+	.word	.LANCHOR56
+	.size	ftl_info_check, .-ftl_info_check
+	.section	.text.gc_scan_src_blk,"ax",%progbits
+	.align	1
+	.global	gc_scan_src_blk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_scan_src_blk, %function
+gc_scan_src_blk:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	movw	r3, #65535
+	ldr	r4, .L2511
+	ldrh	r1, [r4]
+	cmp	r1, r3
+	bne	.L2470
+	mov	r2, #880
+	ldr	r1, .L2511+4
+	ldr	r0, .L2511+8
+	bl	printf
+.L2471:
+	b	.L2471
+.L2470:
+	ldr	r3, .L2511+12
+	ldr	r3, [r3]
+	lsls	r0, r3, #23
+	bpl	.L2472
+	ldr	r3, .L2511+16
+	ldr	r0, .L2511+20
+	ldr	r3, [r3]
+	ldrh	r2, [r3, r1, lsl #1]
+	bl	printf
+.L2472:
+	ldr	r1, .L2511+24
+	ldrh	r0, [r4]
+	bl	ftl_get_blk_list_in_sblk
+	uxtb	r0, r0
+	strb	r0, [r4, #5]
+	cbnz	r0, .L2473
+	movw	r3, #65535
+	strh	r3, [r4]	@ movhi
+.L2469:
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2473:
+	ldr	r2, .L2511+28
+	ldrh	r3, [r4]
+	ldr	r2, [r2]
+	add	r2, r2, r3, lsl #2
+	ldrb	r2, [r2, #2]	@ zero_extendqisi2
+	and	r2, r2, #224
+	cmp	r2, #32
+	beq	.L2475
+	cmp	r2, #224
+	beq	.L2475
+	cbz	r2, .L2476
+	ldr	r1, .L2511+32
+	ldr	r1, [r1]
+	ldrh	r5, [r1, #16]
+	cmp	r5, r3
+	beq	.L2475
+	ldrh	r5, [r1, #48]
+	cmp	r5, r3
+	beq	.L2475
+	ldrh	r1, [r1, #80]
+	cmp	r1, r3
+	bne	.L2510
+.L2475:
+	movw	r3, #65535
+	movs	r0, #0
+	strh	r3, [r4]	@ movhi
+	strh	r0, [r4, #20]	@ movhi
+	b	.L2469
+.L2476:
+	ldr	r2, .L2511+16
+	ldr	r2, [r2]
+	ldrh	r3, [r2, r3, lsl #1]
+	cmp	r3, #0
+	beq	.L2475
+	mov	r2, #900
+	ldr	r1, .L2511+4
+	ldr	r0, .L2511+8
+	bl	printf
+.L2478:
+	b	.L2478
+.L2510:
+	add	r0, r4, r0, lsl #1
+	movw	r3, #65535
+	ldrh	r7, [r0, #34]
+	cmp	r7, r3
+	bne	.L2479
+	mov	r2, #908
+	ldr	r1, .L2511+4
+	ldr	r0, .L2511+8
+	bl	printf
+.L2480:
+	b	.L2480
+.L2479:
+	ldr	r1, .L2511+36
+	cmp	r2, #160
+	ldr	r0, .L2511+40
+	ldr	r8, .L2511+64
+	ldrh	r3, [r1]
+	mov	r10, r1
+	ldrh	r0, [r0]
+	add	r3, r3, #-1
+	uxth	r3, r3
+	mul	r7, r7, r0
+	bne	.L2494
+	ldr	r2, .L2511+44
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r2, #2
+	uxth	fp, r2
+	orr	r7, r7, r2, lsl #24
+	bne	.L2481
+	ldrh	r3, [r8]
+	mov	fp, #2
+	subs	r3, r3, #1
+	uxth	r3, r3
+.L2481:
+	orrs	r7, r7, r3
+	strb	fp, [r4, #6]
+	movs	r5, #0
+	movs	r0, #1
+	strh	r5, [r4, #2]	@ movhi
+	strb	r5, [r4, #4]
+	strh	r5, [r4, #22]	@ movhi
+	bl	buf_alloc
+	str	r7, [r0, #24]
+	movs	r1, #1
+	ldr	r7, .L2511+48
+	mov	r6, r0
+	bl	sblk_read_page
+	ldrh	r3, [r8]
+	movs	r1, #255
+	ldrb	r2, [r7]	@ zero_extendqisi2
+	ldr	r8, .L2511+68
+	muls	r2, r3, r2
+	ldr	r0, [r8]
+	lsls	r2, r2, #2
+	bl	ftl_memset
+	ldr	r3, [r6, #36]
+	strh	r5, [r4, #20]	@ movhi
+	adds	r2, r3, #1
+	bne	.L2482
+.L2483:
+	mov	r0, #-1
+	b	.L2469
+.L2494:
+	mov	fp, #1
+	b	.L2481
+.L2482:
+	cmp	r3, #512
+	beq	.L2483
+	ldr	r2, [r6, #12]
+	ldr	r3, .L2511+52
+	ldr	r2, [r2]
+	str	r3, [sp, #4]
+	cmp	r2, r3
+	beq	.L2484
+	mov	r1, r5
+	ldrh	r0, [r4]
+	bl	ftl_sblk_dump
+	ldr	r2, [r6, #12]
+	ldr	r3, [sp, #4]
+	ldr	r2, [r2]
+	cmp	r2, r3
+	beq	.L2483
+	movw	r2, #937
+	ldr	r1, .L2511+4
+	ldr	r0, .L2511+8
+	bl	printf
+.L2485:
+	b	.L2485
+.L2484:
+	ldrb	r3, [r7]	@ zero_extendqisi2
+	ldrh	r2, [r10]
+	ldr	r7, [r6, #4]
+	ldr	r10, .L2511+72
+	smulbb	r3, r3, r2
+	subs	r7, r7, #4
+	smulbb	fp, r3, fp
+	uxth	fp, fp
+.L2486:
+	cmp	r5, fp
+	blt	.L2491
+	ldr	r5, .L2511+16
+	mov	r0, r6
+	bl	buf_free
+	ldrh	r1, [r4]
+	ldr	r3, [r5]
+	ldrh	r2, [r3, r1, lsl #1]
+	ldrh	r3, [r4, #20]
+	cmp	r2, r3
+	beq	.L2492
+	ldr	r0, .L2511+56
+	bl	printf
+.L2492:
+	ldr	r3, [r5]
+	ldrh	r2, [r4]
+	ldrh	r2, [r3, r2, lsl #1]
+	ldrh	r3, [r4, #20]
+	cmp	r2, r3
+	bcs	.L2493
+	bl	vpn_check
+.L2493:
+	ldr	r3, [r5]
+	ldrh	r1, [r4, #20]
+	ldrh	r2, [r4]
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	movs	r3, #0
+	strh	r3, [r4, #24]	@ movhi
+	ldrh	r0, [r4, #20]
+	b	.L2469
+.L2491:
+	ldr	r0, [r7, #4]!
+	adds	r3, r0, #1
+	beq	.L2488
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #12]
+	adds	r0, r0, #1
+	bne	.L2489
+	movs	r2, #0
+	add	r1, sp, #12
+	ldr	r0, [r7]
+	bl	pm_log2phys
+.L2489:
+	ldr	r2, [sp, #12]
+	movs	r3, #1
+	ldrh	r0, [r10]
+	str	r2, [sp, #4]
+	rsb	r1, r0, #21
+	lsls	r3, r3, r1
+	lsr	r0, r2, r0
+	ldr	r2, .L2511+60
+	subs	r3, r3, #1
+	ands	r0, r0, r3
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	ldrh	r3, [r4]
+	ldr	r2, [sp, #4]
+	cmp	r0, r3
+	bne	.L2488
+	ldrh	r3, [r4, #20]
+	ldr	r1, [r8]
+	str	r2, [r1, r3, lsl #2]
+	adds	r3, r3, #1
+	strh	r3, [r4, #20]	@ movhi
+.L2488:
+	adds	r5, r5, #1
+	b	.L2486
+.L2512:
+	.align	2
+.L2511:
+	.word	.LANCHOR59
+	.word	.LANCHOR160
+	.word	.LC0
+	.word	.LANCHOR22
+	.word	.LANCHOR56
+	.word	.LC125
+	.word	.LANCHOR59+36
+	.word	.LANCHOR57
+	.word	.LANCHOR60
+	.word	.LANCHOR79
+	.word	.LANCHOR75
+	.word	.LANCHOR64
+	.word	.LANCHOR69
+	.word	-178307901
+	.word	.LC126
+	.word	.LANCHOR70
+	.word	.LANCHOR68
+	.word	.LANCHOR61
+	.word	.LANCHOR71
+	.size	gc_scan_src_blk, .-gc_scan_src_blk
+	.section	.text.ftl_scan_all_data,"ax",%progbits
+	.align	1
+	.global	ftl_scan_all_data
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_scan_all_data, %function
+ftl_scan_all_data:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r0, #0
+	ldr	r8, .L2542+20
+	sub	sp, sp, #40
+	movs	r5, #0
+	bl	buf_alloc
+	movs	r1, #0
+	mov	r4, r0
+	ldr	r0, .L2542
+	bl	printf
+.L2514:
+	ldr	r3, [r8]
+	cmp	r5, r3
+	bcc	.L2527
+	mov	r0, r4
+	bl	buf_free
+	add	sp, sp, #40
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2527:
+	mov	r3, #-1
+	str	r3, [r4, #20]
+	ubfx	r3, r5, #0, #12
+	cbnz	r3, .L2515
+	ldr	r2, [sp, #36]
+	mov	r1, r5
+	ldr	r0, .L2542+4
+	bl	printf
+.L2515:
+	mov	r0, r5
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #36]
+	adds	r0, r0, #1
+	bne	.L2516
+	movs	r2, #0
+	add	r1, sp, #36
+	mov	r0, r5
+	bl	pm_log2phys
+.L2516:
+	ldr	r3, [sp, #36]
+	str	r3, [r4, #24]
+	str	r3, [r4, #28]
+	adds	r3, r3, #1
+	bne	.L2517
+.L2519:
+	adds	r5, r5, #1
+	b	.L2514
+.L2517:
+	movs	r1, #1
+	mov	r0, r4
+	bl	sblk_read_page
+	ldr	r3, [r4, #36]
+	ldr	r2, [r4, #12]
+	cmp	r3, #256
+	beq	.L2518
+	adds	r0, r3, #1
+	beq	.L2518
+	ldr	r1, [r2, #4]
+	cmp	r5, r1
+	beq	.L2519
+.L2518:
+	ldr	r1, [r4, #4]
+	ldr	r10, .L2542+24
+	ldr	r7, .L2542+8
+	ldr	r0, [r1, #4]
+	str	r0, [sp, #20]
+	ldr	r1, [r1]
+	ldr	r0, .L2542+12
+	str	r1, [sp, #16]
+	ldr	r1, [r2, #12]
+	str	r1, [sp, #12]
+	ldr	r1, [r2, #8]
+	str	r1, [sp, #8]
+	ldr	r1, [r2, #4]
+	str	r1, [sp, #4]
+	mov	r1, r5
+	ldr	r2, [r2]
+	str	r2, [sp]
+	ldr	r2, [r4, #24]
+	bl	printf
+	ldr	r2, [r4, #12]
+	ldr	r3, [r2, #8]
+	adds	r1, r3, #1
+	bne	.L2520
+.L2522:
+	ldrb	r6, [r10]	@ zero_extendqisi2
+	mov	r0, r5
+	ldr	fp, .L2542+28
+	lsls	r1, r6, #7
+	bl	__aeabi_idiv
+	uxth	r10, r0
+	mov	r0, r5
+	bl	lpa_hash_get_ppa
+	lsls	r3, r6, #7
+	str	r0, [sp]
+	mov	r2, r10
+	ldr	r0, .L2542+16
+	subs	r3, r3, #1
+	mov	r1, r5
+	ands	r3, r3, r5
+	movs	r6, #0
+	uxth	r3, r3
+	bl	printf
+	movs	r2, #0
+	add	r1, sp, #36
+	mov	r0, r5
+	bl	pm_log2phys
+.L2521:
+	adds	r3, r7, r6
+	ldr	r1, [r3, #4]
+	cbz	r1, .L2526
+	ldrh	r3, [r7, r6]
+	cmp	r3, r10
+	bne	.L2526
+	mov	r3, #4096
+	movs	r2, #4
+	mov	r0, fp
+	bl	rknand_print_hex
+.L2526:
+	adds	r6, r6, #8
+	cmp	r6, #256
+	bne	.L2521
+	b	.L2519
+.L2520:
+	ldr	r6, [r2, #4]
+	ldr	r2, .L2542+20
+	ldr	r2, [r2]
+	cmp	r6, r2
+	bcs	.L2522
+	str	r3, [r4, #24]
+	movs	r1, #1
+	mov	r0, r4
+	bl	sblk_read_page
+	ldr	r2, [r4, #4]
+	ldr	r3, [r4, #12]
+	ldr	r0, .L2542+12
+	ldr	r1, [r2, #4]
+	str	r1, [sp, #20]
+	mov	r1, r5
+	ldr	r2, [r2]
+	str	r2, [sp, #16]
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #12]
+	ldr	r2, [r3, #8]
+	str	r2, [sp, #8]
+	ldr	r2, [r3, #4]
+	str	r2, [sp, #4]
+	ldr	r3, [r3]
+	str	r3, [sp]
+	ldr	r3, [r4, #36]
+	ldr	r2, [r4, #24]
+	bl	printf
+	mov	r0, r6
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #36]
+	adds	r0, r0, #1
+	bne	.L2523
+	movs	r2, #0
+	add	r1, sp, #36
+	mov	r0, r6
+	bl	pm_log2phys
+.L2523:
+	ldr	r3, [sp, #36]
+	movs	r1, #1
+	mov	r0, r4
+	str	r3, [r4, #24]
+	bl	sblk_read_page
+	ldr	r2, [r4, #4]
+	ldr	r3, [r4, #12]
+	ldr	r0, .L2542+12
+	ldr	r1, [r2, #4]
+	str	r1, [sp, #20]
+	mov	r1, r6
+	ldr	r2, [r2]
+	str	r2, [sp, #16]
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #12]
+	ldr	r2, [r3, #8]
+	str	r2, [sp, #8]
+	ldr	r2, [r3, #4]
+	str	r2, [sp, #4]
+	ldr	r3, [r3]
+	str	r3, [sp]
+	ldr	r2, [r4, #24]
+	ldr	r3, [r4, #36]
+	bl	printf
+	ldrb	fp, [r10]	@ zero_extendqisi2
+	mov	r0, r6
+	lsl	r1, fp, #7
+	bl	__aeabi_uidiv
+	uxth	r3, r0
+	str	r0, [sp, #28]
+	mov	r0, r6
+	str	r3, [sp, #24]
+	bl	lpa_hash_get_ppa
+	lsl	r3, fp, #7
+	ldr	r2, [sp, #28]
+	ldr	fp, .L2542+32
+	mov	r1, r6
+	subs	r3, r3, #1
+	str	r0, [sp]
+	ands	r3, r3, r6
+	ldr	r0, .L2542+16
+	uxth	r3, r3
+	uxth	r2, r2
+	bl	printf
+	mov	r0, r6
+	movs	r6, #0
+	movs	r2, #0
+	add	r1, sp, #36
+	bl	pm_log2phys
+.L2525:
+	adds	r3, r7, r6
+	ldr	r1, [r3, #4]
+	cbz	r1, .L2524
+	ldrh	r3, [r7, r6]
+	ldr	r2, [sp, #24]
+	cmp	r3, r2
+	bne	.L2524
+	mov	r3, #4096
+	movs	r2, #4
+	mov	r0, fp
+	bl	rknand_print_hex
+.L2524:
+	adds	r6, r6, #8
+	cmp	r6, #256
+	bne	.L2525
+	b	.L2522
+.L2543:
+	.align	2
+.L2542:
+	.word	.LC127
+	.word	.LC128
+	.word	.LANCHOR93
+	.word	.LC129
+	.word	.LC130
+	.word	.LANCHOR47
+	.word	.LANCHOR45
+	.word	.LC132
+	.word	.LC131
+	.size	ftl_scan_all_data, .-ftl_scan_all_data
+	.section	.text.gc_recovery,"ax",%progbits
+	.align	1
+	.global	gc_recovery
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_recovery, %function
+gc_recovery:
+	@ args = 0, pretend = 0, frame = 32
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #0
+	ldr	r3, .L2603
+	sub	sp, sp, #64
+	ldr	r7, .L2603+4
+	strb	r4, [r3]
+	ldr	r3, .L2603+8
+	ldr	r5, [r7]
+	strb	r4, [r3]
+	bl	gc_init
+	ldrh	r6, [r5, #80]
+	movw	r3, #65535
+	cmp	r6, r3
+	beq	.L2545
+	ldr	r2, [r7]
+	movs	r0, #1
+	ldr	r6, .L2603+12
+	strh	r3, [r2, #130]	@ movhi
+	bl	buf_alloc
+	ldrb	r3, [r5, #89]	@ zero_extendqisi2
+	mov	r4, r0
+	add	r3, r5, r3, lsl #1
+	ldrh	r2, [r3, #94]
+	ldr	r3, .L2603+16
+	ldrh	r3, [r3]
+	muls	r3, r2, r3
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	cmp	r2, #3
+	str	r3, [sp, #56]
+	bne	.L2546
+	ldr	r2, .L2603+20
+	ldrh	r2, [r2]
+	subs	r2, r2, #1
+	add	r3, r3, r2
+	orr	r3, r3, #50331648
+.L2598:
+	str	r3, [r4, #24]
+.L2547:
+	movs	r1, #1
+	mov	r0, r4
+	bl	sblk_read_page
+	ldr	r3, [r4, #36]
+	adds	r2, r3, #1
+	beq	.L2548
+	cmp	r3, #512
+	beq	.L2548
+	ldr	r3, [r4, #12]
+	ldr	r2, [r3]
+	ldr	r3, .L2603+24
+	cmp	r2, r3
+	beq	.L2549
+.L2548:
+	mov	r0, r4
+	bl	buf_free
+	ldr	r2, [r4, #12]
+	ldr	r3, [r4, #4]
+	ldr	r0, .L2603+28
+	ldr	r1, [r2, #12]
+	str	r1, [sp, #24]
+	ldr	r1, [r2, #8]
+	str	r1, [sp, #20]
+	ldr	r1, [r2, #4]
+	str	r1, [sp, #16]
+	ldr	r2, [r2]
+	str	r2, [sp, #12]
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	ldr	r2, [r3, #8]
+	str	r2, [sp, #4]
+	ldr	r2, [r3, #4]
+	str	r2, [sp]
+	ldr	r2, [r4, #36]
+	ldr	r3, [r3]
+	ldr	r1, [r4, #24]
+	movs	r4, #0
+	bl	printf
+	ldr	r3, .L2603+32
+	ldrh	r2, [r5, #80]
+	ldr	r3, [r3]
+	strh	r4, [r3, r2, lsl #1]	@ movhi
+	ldr	r3, [r7]
+.L2602:
+	ldrh	r2, [r5, #80]
+	strh	r2, [r3, #130]	@ movhi
+.L2550:
+	mov	r2, r4
+	ldrh	r1, [r5, #80]
+	movw	r4, #65535
+	ldr	r0, .L2603+36
+	bl	printf
+	strh	r4, [r5, #80]	@ movhi
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	ldr	r3, .L2603+4
+	ldr	r2, [r3]
+	ldrh	r0, [r2, #130]
+	cmp	r0, r4
+	mov	r4, r3
+	beq	.L2579
+	bl	ftl_free_sblk
+.L2579:
+	ldr	r3, .L2603+40
+	movs	r0, #0
+	ldr	r2, [r3]
+	movw	r3, #65535
+	strh	r3, [r2, #126]	@ movhi
+	ldr	r2, [r4]
+	strh	r3, [r2, #130]	@ movhi
+	bl	ftl_info_flush
+.L2544:
+	add	sp, sp, #64
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2546:
+	cmp	r2, #2
+	bne	.L2547
+	ldr	r2, .L2603+20
+	ldrh	r2, [r2]
+	add	r3, r3, r2, lsl #1
+	subs	r3, r3, #1
+	orr	r3, r3, #33554432
+	b	.L2598
+.L2549:
+	ldr	r8, .L2603+68
+	ldr	r7, .L2603+44
+	ldr	fp, .L2603+56
+	ldrh	r3, [r8]
+	ldrb	r2, [r7]	@ zero_extendqisi2
+	ldr	r1, [r4, #4]
+	ldr	r0, [fp]
+	ldr	r10, .L2603+60
+	muls	r2, r3, r2
+	lsls	r2, r2, #2
+	bl	ftl_memcpy
+	ldrh	r3, [r8]
+	ldrb	r2, [r7]	@ zero_extendqisi2
+	ldr	r1, [r4, #4]
+	ldr	r0, [r10]
+	muls	r2, r3, r2
+	lsls	r2, r2, #2
+	add	r1, r1, r2
+	bl	ftl_memcpy
+	ldrb	r2, [r7]	@ zero_extendqisi2
+	ldrh	r3, [r8]
+	ldr	r1, [fp]
+	ldr	r0, .L2603+48
+	muls	r3, r2, r3
+	movs	r2, #4
+	bl	rknand_print_hex
+	ldrb	r2, [r7]	@ zero_extendqisi2
+	ldrh	r3, [r8]
+	ldr	r1, [r10]
+	ldr	r0, .L2603+52
+	muls	r3, r2, r3
+	movs	r2, #4
+	bl	rknand_print_hex
+	ldr	r3, .L2603+20
+	ldrh	fp, [r3]
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	cmp	r3, #2
+	itt	eq
+	moveq	r3, #1
+	lsleq	fp, fp, #1
+	str	r3, [sp, #44]
+	movs	r3, #0
+	mov	r10, r3
+	str	r3, [sp, #36]
+.L2553:
+	ldr	r3, [sp, #36]
+	cmp	r3, fp
+	beq	.L2562
+	mov	r8, #0
+	b	.L2563
+.L2559:
+	ldr	r3, [sp, #40]
+	ldrh	r2, [r3, #96]
+	ldr	r3, .L2603+16
+	ldrh	r3, [r3]
+	muls	r3, r2, r3
+	ldr	r2, .L2603+12
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	str	r3, [sp, #56]
+	cmp	r2, #3
+	bne	.L2554
+	ldr	r2, [sp, #36]
+	add	r3, r3, r2
+	orr	r3, r3, r7, lsl #24
+.L2600:
+	str	r3, [r4, #24]
+	movs	r1, #1
+	mov	r0, r4
+	bl	sblk_read_page
+	ldr	r3, .L2603+56
+	ldr	r2, [r4, #12]
+	ldr	r3, [r3]
+	ldr	r1, [r2, #4]
+	ldr	r3, [r3, r6]
+	cmp	r3, r1
+	bne	.L2557
+	ldr	r0, .L2603+60
+	ldr	r0, [r0]
+	ldr	ip, [r0, r6]
+	ldr	r0, [r2, #8]
+	cmp	ip, r0
+	beq	.L2558
+.L2557:
+	ldr	r0, [r2, #12]
+	str	r0, [sp, #16]
+	ldr	r0, [r2, #8]
+	str	r1, [sp, #8]
+	str	r0, [sp, #12]
+	ldr	r2, [r2]
+	ldr	r0, .L2603+64
+	str	r2, [sp, #4]
+	ldr	r2, .L2603+60
+	ldr	r2, [r2]
+	ldr	r2, [r2, r6]
+	str	r2, [sp]
+	ldr	r2, [r4, #36]
+	ldr	r1, [r4, #24]
+	bl	printf
+	ldr	r3, .L2603+56
+	ldr	r3, [r3]
+	ldr	r3, [r3, r6]
+	adds	r3, r3, #1
+	beq	.L2558
+	mov	r0, r4
+	movs	r4, #0
+	bl	buf_free
+	ldr	r3, .L2603+32
+	ldrh	r2, [r5, #80]
+	ldr	r3, [r3]
+	strh	r4, [r3, r2, lsl #1]	@ movhi
+	ldr	r3, .L2603+4
+	ldr	r3, [r3]
+	b	.L2602
+.L2554:
+	cmp	r2, #2
+	ldr	r2, [sp, #36]
+	itett	eq
+	addeq	r2, r2, #-1
+	addne	r3, r3, r2
+	addeq	r3, r3, r2
+	addeq	r3, r3, r7
+	it	eq
+	orreq	r3, r3, #33554432
+	b	.L2600
+.L2558:
+	add	r10, r10, #1
+	adds	r7, r7, #1
+	adds	r6, r6, #4
+.L2561:
+	ldr	r3, [sp, #44]
+	cmp	r3, r7
+	bcs	.L2559
+	add	r8, r8, #1
+.L2563:
+	ldrb	r3, [r5, #89]	@ zero_extendqisi2
+	cmp	r8, r3
+	bge	.L2560
+	add	r3, r5, r8, lsl #1
+	lsl	r6, r10, #2
+	str	r3, [sp, #40]
+	movs	r7, #1
+	b	.L2561
+.L2560:
+	ldr	r3, [sp, #36]
+	adds	r3, r3, #1
+	str	r3, [sp, #36]
+	b	.L2553
+.L2562:
+	mov	r0, r4
+	movs	r4, #0
+	bl	buf_free
+	ldr	r3, .L2603+32
+	mov	r6, r4
+	ldr	r0, .L2603+68
+	ldrh	r1, [r5, #80]
+	ldr	r2, [r3]
+	ldrh	r0, [r0]
+	ldrb	r3, [r5, #89]	@ zero_extendqisi2
+	str	r4, [sp, #40]
+	smulbb	r3, r3, r0
+	strh	r3, [r2, r1, lsl #1]	@ movhi
+.L2564:
+	ldr	r3, [sp, #36]
+	cmp	r3, r6
+	beq	.L2577
+	mov	fp, #0
+	b	.L2578
+.L2604:
+	.align	2
+.L2603:
+	.word	.LANCHOR67
+	.word	.LANCHOR60
+	.word	.LANCHOR104
+	.word	.LANCHOR64
+	.word	.LANCHOR75
+	.word	.LANCHOR79
+	.word	-178307901
+	.word	.LC133
+	.word	.LANCHOR56
+	.word	.LC138
+	.word	.LANCHOR46
+	.word	.LANCHOR69
+	.word	.LC134
+	.word	.LC135
+	.word	.LANCHOR107
+	.word	.LANCHOR108
+	.word	.LC136
+	.word	.LANCHOR68
+.L2574:
+	ldr	r3, .L2605
+	ldr	r2, [sp, #40]
+	ldr	r3, [r3]
+	ldr	r10, [r3, r2, lsl #2]
+	cmp	r10, #-1
+	beq	.L2565
+	ldr	r3, .L2605+4
+	mov	r0, r10
+	ldr	r3, [r3]
+	ldr	r3, [r3, r2, lsl #2]
+	str	r3, [sp, #48]
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #60]
+	adds	r0, r0, #1
+	bne	.L2566
+	movs	r2, #0
+	add	r1, sp, #60
+	mov	r0, r10
+	bl	pm_log2phys
+.L2566:
+	ldr	r3, [sp, #52]
+	ldrh	r2, [r3, #96]
+	ldr	r3, .L2605+8
+	ldrh	r3, [r3]
+	muls	r3, r2, r3
+	ldr	r2, .L2605+12
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r2, #3
+	bne	.L2567
+	add	r3, r3, r6
+	orr	r3, r3, r8, lsl #24
+.L2601:
+	str	r3, [sp, #56]
+	movs	r2, #1
+	ldr	r3, .L2605+16
+	ldrh	r0, [r3]
+	rsb	r3, r0, #21
+	lsl	r3, r2, r3
+	ldr	r2, [sp, #48]
+	subs	r3, r3, #1
+	lsr	r0, r2, r0
+	ldr	r2, .L2605+20
+	ands	r0, r0, r3
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	ldr	r2, [sp, #48]
+	mov	r7, r0
+	ldr	r3, [sp, #60]
+	cmp	r2, r3
+	ldr	r2, [sp, #56]
+	bne	.L2570
+	mov	r1, r10
+	ldr	r0, .L2605+24
+	bl	pm_ppa_update_check
+	cbz	r0, .L2571
+.L2597:
+	b	.L2597
+.L2567:
+	cmp	r2, #2
+	itett	eq
+	addeq	r2, r6, #-1
+	addne	r3, r3, r6
+	addeq	r3, r3, r2
+	addeq	r3, r3, r8
+	it	eq
+	orreq	r3, r3, #33554432
+	b	.L2601
+.L2571:
+	movs	r2, #1
+	add	r1, sp, #56
+	mov	r0, r10
+	adds	r4, r4, #1
+	bl	pm_log2phys
+	uxth	r0, r7
+	bl	ftl_vpn_decrement
+.L2573:
+	ldr	r3, [sp, #40]
+	uxth	r7, r7
+	adds	r3, r3, #1
+	str	r3, [sp, #40]
+	ldr	r3, .L2605+28
+	ldr	r3, [r3]
+	add	r3, r3, r7, lsl #2
+	ldrb	r3, [r3, #2]	@ zero_extendqisi2
+	ands	r3, r3, #224
+	bne	.L2565
+	ldr	r2, .L2605+32
+	ldr	r2, [r2]
+	ldrh	r1, [r2, r7, lsl #1]
+	cbz	r1, .L2565
+	strh	r3, [r2, r7, lsl #1]	@ movhi
+.L2565:
+	add	r8, r8, #1
+.L2576:
+	ldr	r3, [sp, #44]
+	cmp	r3, r8
+	bcs	.L2574
+	add	fp, fp, #1
+.L2578:
+	ldrb	r3, [r5, #89]	@ zero_extendqisi2
+	cmp	fp, r3
+	bge	.L2575
+	add	r3, r5, fp, lsl #1
+	mov	r8, #1
+	str	r3, [sp, #52]
+	b	.L2576
+.L2570:
+	cmp	r3, r2
+	it	eq
+	addeq	r4, r4, #1
+	b	.L2573
+.L2575:
+	adds	r6, r6, #1
+	b	.L2564
+.L2577:
+	ldr	r3, .L2605+32
+	ldrh	r2, [r5, #80]
+	ldr	r3, [r3]
+	strh	r4, [r3, r2, lsl #1]	@ movhi
+	b	.L2550
+.L2545:
+	ldr	r3, [r7]
+	ldrh	r3, [r3, #130]
+	cmp	r3, r6
+	beq	.L2544
+	ldr	r5, .L2605+36
+	ldr	r2, [r5]
+	ldrh	r2, [r2, #126]
+	cmp	r2, r3
+	bne	.L2581
+	bl	pm_flush
+	ldr	r3, [r7]
+	ldrh	r0, [r3, #130]
+	bl	ftl_free_sblk
+	ldr	r3, [r5]
+	mov	r0, r4
+	strh	r6, [r3, #126]	@ movhi
+	bl	ftl_info_flush
+.L2581:
+	ldr	r3, [r7]
+	movw	r2, #65535
+	strh	r2, [r3, #130]	@ movhi
+	b	.L2544
+.L2606:
+	.align	2
+.L2605:
+	.word	.LANCHOR107
+	.word	.LANCHOR108
+	.word	.LANCHOR75
+	.word	.LANCHOR64
+	.word	.LANCHOR71
+	.word	.LANCHOR70
+	.word	.LC137
+	.word	.LANCHOR57
+	.word	.LANCHOR56
+	.word	.LANCHOR46
+	.size	gc_recovery, .-gc_recovery
+	.section	.text.ftl_init,"ax",%progbits
+	.align	1
+	.global	ftl_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_init, %function
+ftl_init:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r3, #255
+	ldr	r2, .L2619
+	movs	r5, #0
+	ldr	r6, .L2619+4
+	strb	r3, [r2]
+	ldr	r2, .L2619+8
+	ldr	r1, .L2619+12
+	ldr	r0, .L2619+16
+	strb	r5, [r2]
+	ldr	r2, .L2619+20
+	ldr	r8, .L2619+144
+	ldr	r7, .L2619+24
+	strb	r3, [r2]
+	mov	r2, #-1
+	ldr	r3, .L2619+28
+	strb	r5, [r3]
+	ldr	r3, .L2619+32
+	str	r2, [r3]
+	bl	printf
+	ldrb	r1, [r6, #12]	@ zero_extendqisi2
+	ldr	r3, .L2619+36
+	ldrb	r2, [r6, #9]	@ zero_extendqisi2
+	ldrh	r10, [r6, #10]
+	strb	r1, [r3]
+	ldr	r3, .L2619+40
+	mov	r0, r10
+	str	r2, [sp, #4]
+	strb	r2, [r3]
+	ldr	r3, .L2619+44
+	strh	r10, [r3]	@ movhi
+	bl	__aeabi_idiv
+	ldr	r1, .L2619+48
+	mov	r3, r0
+	strh	r0, [r8]	@ movhi
+	ldr	r0, .L2619+52
+	ldrb	r4, [r1]	@ zero_extendqisi2
+	ldr	r1, .L2619+56
+	ldr	r2, [sp, #4]
+	ldr	ip, .L2619+148
+	strb	r4, [r1]
+	ldrb	r1, [r6, #13]	@ zero_extendqisi2
+	lsl	fp, r2, #9
+	ldrh	r6, [r6, #14]
+	str	ip, [sp, #4]
+	strb	r1, [r0]
+	uxth	fp, fp
+	smulbb	r4, r4, r1
+	ldr	r1, .L2619+60
+	ldr	r0, .L2619+64
+	strh	r6, [ip]	@ movhi
+	ldrh	lr, [r1]
+	uxtb	r4, r4
+	ldr	r1, .L2619+68
+	strb	r4, [r7]
+	strh	fp, [r0]	@ movhi
+	strh	lr, [r1]	@ movhi
+	movs	r1, #1
+	str	r0, [sp, #8]
+.L2608:
+	cmp	lr, r1
+	uxth	r0, r5
+	add	r5, r5, #1
+	bcs	.L2609
+	mul	r10, r10, r2
+	subs	r1, r0, #1
+	ldr	r0, .L2619+72
+	mov	r5, #1892352
+	muls	r5, r4, r5
+	str	r3, [sp, #12]
+	strh	r1, [r0]	@ movhi
+	mul	r1, r6, r10
+	lsrs	r0, r1, #21
+	muls	r1, r4, r1
+	muls	r5, r0, r5
+	ldr	r0, .L2619+76
+	str	r5, [r0]
+	add	r5, r5, #24576
+	ldr	r0, .L2619+80
+	str	r1, [r0]
+	mov	r0, r5
+	ldr	r1, .L2619+84
+	str	r5, [r1]
+	mov	r1, r2
+	bl	__aeabi_uidiv
+	ldr	r2, .L2619+88
+	mov	r1, fp
+	str	r0, [r2]
+	add	r2, fp, #-1
+	add	r0, r2, r0, lsl #2
+	ldr	fp, .L2619+152
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #12]
+	strh	r0, [fp]	@ movhi
+	uxth	r0, r0
+	lsls	r0, r0, #4
+	mul	r1, r4, r3
+	bl	__aeabi_idiv
+	ldr	r3, .L2619+92
+	mul	r1, r4, r10
+	strh	r0, [r3]	@ movhi
+	mov	r0, r5
+	bl	__aeabi_uidiv
+	ldr	r3, .L2619+96
+	adds	r0, r0, #2
+	ldr	r2, .L2619+100
+	ldr	r5, .L2619+104
+	strh	r0, [r3]	@ movhi
+	add	r3, r6, r6, lsl #1
+	lsrs	r6, r6, #4
+	asrs	r3, r3, #2
+	strh	r3, [r2]	@ movhi
+	ldr	r3, .L2619+108
+	strh	r6, [r3]	@ movhi
+	bl	buf_init
+	ldrh	r3, [r8]
+	ldrb	r0, [r7]	@ zero_extendqisi2
+	muls	r0, r3, r0
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L2619+112
+	ldrb	r1, [r7]	@ zero_extendqisi2
+	ldr	r2, .L2619+116
+	str	r0, [r3]
+	ldrh	r0, [r8]
+	ldr	r3, .L2619+120
+	muls	r0, r1, r0
+	ldr	r1, .L2619+124
+	str	r2, [r3]
+	add	r3, r2, r0, lsl #3
+	str	r3, [r1]
+	ldr	r1, [sp, #4]
+	ldrh	r1, [r1]
+	lsrs	r1, r1, #1
+	add	r1, r1, r0, lsl #1
+	ldr	r0, .L2619+128
+	add	r1, r2, r1, lsl #2
+	str	r1, [r5]
+	bl	printf
+	ldrh	r2, [r8]
+	ldrb	r4, [r7]	@ zero_extendqisi2
+	ldr	r3, [sp, #4]
+	ldr	r0, .L2619+132
+	ldrh	r3, [r3]
+	muls	r4, r2, r4
+	ldrh	r2, [fp]
+	add	r4, r3, r4, lsl #2
+	lsls	r6, r3, #2
+	ldr	r3, [sp, #8]
+	add	r6, r6, r2, lsl #2
+	lsls	r4, r4, #1
+	add	r6, r6, #704
+	add	r4, r4, #600
+	ldrh	r3, [r3]
+	mov	r2, r6
+	mov	r1, r4
+	bl	printf
+	ldr	r3, [sp, #8]
+	ldrh	r3, [r3]
+	cmp	r4, r3
+	bhi	.L2610
+	cmp	r6, r3
+	bls	.L2611
+.L2610:
+.L2618:
+	b	.L2618
+.L2609:
+	lsls	r1, r1, #1
+	b	.L2608
+.L2611:
+	bl	sblk_init
+	bl	ftl_info_blk_init
+	adds	r3, r0, #1
+	beq	.L2607
+	bl	ftl_ext_info_init
+	movs	r0, #1
+	ldr	r4, .L2619+136
+	bl	pm_init
+	bl	lpa_rebuild_hash
+	ldr	r0, [r5]
+	movs	r1, #0
+	adds	r0, r0, #16
+	bl	ftl_open_sblk_recovery
+	ldr	r0, [r5]
+	add	r1, r0, #16
+	adds	r0, r0, #48
+	bl	ftl_open_sblk_recovery
+	ldr	r2, [r4]
+	ldr	r0, [r5]
+	ldr	r3, [r2, #8]
+	adds	r0, r0, #16
+	adds	r3, r3, #16
+	str	r3, [r2, #8]
+	bl	ftl_info_data_recovery
+	ldr	r0, [r5]
+	adds	r0, r0, #48
+	bl	ftl_info_data_recovery
+	ldr	r0, [r5]
+	adds	r0, r0, #80
+	bl	ftl_info_data_recovery
+	bl	gc_recovery
+	bl	ftl_info_check
+	bl	pm_flush
+	movs	r0, #1
+	bl	ftl_total_vpn_update
+	ldr	r3, .L2619+140
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2613
+	ldr	r2, [r4]
+	ldr	r3, [r2, #68]
+	adds	r3, r3, #1
+	str	r3, [r2, #68]
+.L2613:
+	bl	ftl_ext_info_flush
+	movs	r0, #0
+	bl	ftl_info_flush
+	bl	print_ftl_debug_info
+	movs	r0, #0
+.L2607:
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2620:
+	.align	2
+.L2619:
+	.word	.LANCHOR42
+	.word	.LANCHOR19
+	.word	.LANCHOR43
+	.word	.LC139
+	.word	.LC32
+	.word	.LANCHOR127
+	.word	.LANCHOR69
+	.word	.LANCHOR89
+	.word	.LANCHOR49
+	.word	.LANCHOR64
+	.word	.LANCHOR45
+	.word	.LANCHOR68
+	.word	.LANCHOR8
+	.word	.LANCHOR70
+	.word	.LANCHOR76
+	.word	.LANCHOR13
+	.word	.LANCHOR149
+	.word	.LANCHOR75
+	.word	.LANCHOR71
+	.word	.LANCHOR52
+	.word	.LANCHOR161
+	.word	.LANCHOR162
+	.word	.LANCHOR47
+	.word	.LANCHOR101
+	.word	.LANCHOR163
+	.word	.LANCHOR164
+	.word	.LANCHOR60
+	.word	.LANCHOR165
+	.word	.LANCHOR83
+	.word	ftl_ext_info_data_buffer
+	.word	.LANCHOR82
+	.word	.LANCHOR56
+	.word	.LC140
+	.word	.LC141
+	.word	.LANCHOR46
+	.word	.LANCHOR133
+	.word	.LANCHOR79
+	.word	.LANCHOR54
+	.word	.LANCHOR137
+	.size	ftl_init, .-ftl_init
+	.section	.text.rk_ftl_init,"ax",%progbits
+	.align	1
+	.global	rk_ftl_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_ftl_init, %function
+rk_ftl_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, lr}
+	bl	nand_flash_init
+	mov	r4, r0
+	cbnz	r0, .L2622
+	bl	ftl_init
+	mov	r4, r0
+.L2622:
+	mov	r1, r4
+	ldr	r0, .L2623
+	bl	printf
+	mov	r0, r4
+	pop	{r4, pc}
+.L2624:
+	.align	2
+.L2623:
+	.word	.LC142
+	.size	rk_ftl_init, .-rk_ftl_init
+	.global	__aeabi_idivmod
+	.section	.text.ftl_update_l2p_map,"ax",%progbits
+	.align	1
+	.global	ftl_update_l2p_map
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_update_l2p_map, %function
+ftl_update_l2p_map:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2650
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #24
+	ldrb	r7, [r0, #9]	@ zero_extendqisi2
+	mov	r6, r0
+	ldrh	r3, [r3]
+	ldr	r2, .L2650+4
+	muls	r7, r3, r7
+	ldr	r4, [r2]
+	ldrh	r3, [r0, #12]
+	str	r2, [sp, #4]
+	add	r4, r4, r3, lsl #2
+	add	r3, r7, #1073741824
+	subs	r3, r3, #1
+	ldr	r3, [r4, r3, lsl #2]
+	adds	r3, r3, #1
+	bne	.L2626
+	movs	r5, #0
+	subs	r4, r4, #4
+	mov	r10, r5
+.L2627:
+	cmp	r10, r7
+	bne	.L2635
+	ldr	r3, .L2650+8
+	ldr	r4, .L2650+12
+	ldr	r3, [r3]
+	tst	r3, #4096
+	beq	.L2636
+	ldrh	r1, [r6]
+	mov	r2, r5
+	ldr	r3, [r4]
+	ldr	r0, .L2650+16
+	ldrh	r3, [r3, r1, lsl #1]
+	bl	printf
+.L2636:
+	ldrh	r2, [r6]
+	ldr	r3, [r4]
+	strh	r5, [r3, r2, lsl #1]	@ movhi
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2626:
+	movw	r2, #882
+	ldr	r1, .L2650+20
+	ldr	r0, .L2650+24
+	bl	printf
+.L2628:
+	b	.L2628
+.L2635:
+	ldr	r8, [r4, #4]!
+	cmp	r8, #-1
+	beq	.L2629
+	ldr	r3, .L2650+28
+	mov	r0, r8
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	lsls	r1, r1, #7
+	bl	__aeabi_uidiv
+	uxth	r3, r0
+	str	r3, [sp]
+	ldr	r3, .L2650+8
+	ldr	r3, [r3]
+	lsls	r2, r3, #19
+	bpl	.L2630
+	mov	r3, r10
+	mov	r2, r8
+	ldr	r1, [sp]
+	ldr	r0, .L2650+32
+	bl	printf
+.L2630:
+	mov	r8, r4
+	mov	fp, r10
+.L2634:
+	ldr	r0, [r8]
+	adds	r3, r0, #1
+	beq	.L2631
+	ldr	r3, .L2650+28
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	lsls	r1, r1, #7
+	bl	__aeabi_uidiv
+	ldr	r3, [sp]
+	uxth	r0, r0
+	cmp	r3, r0
+	bne	.L2631
+	ldrb	r3, [r6, #9]	@ zero_extendqisi2
+	mov	r0, fp
+	mov	r1, r3
+	str	r3, [sp, #12]
+	bl	__aeabi_idivmod
+	ldr	r3, .L2650+36
+	adds	r1, r1, #8
+	ldrh	r0, [r6, r1, lsl #1]
+	ldrh	r2, [r3]
+	ldr	r3, [sp, #12]
+	muls	r2, r0, r2
+	mov	r1, r3
+	mov	r0, fp
+	str	r2, [sp, #8]
+	bl	__aeabi_idiv
+	ldr	r2, [sp, #8]
+	add	r2, r2, r0
+	ldr	r0, .L2650+40
+	str	r2, [sp, #20]
+	ldr	r1, [r8]
+	bl	pm_ppa_update_check
+	cbz	r0, .L2632
+	ldr	r1, [sp, #4]
+	mov	r3, r7
+	movs	r2, #4
+	ldr	r0, .L2650+44
+	ldr	r1, [r1]
+	bl	rknand_print_hex
+.L2633:
+	b	.L2633
+.L2632:
+	adds	r5, r5, #1
+	movs	r2, #1
+	uxth	r5, r5
+	add	r1, sp, #20
+	ldr	r0, [r8]
+	bl	pm_log2phys
+	mov	r3, #-1
+	str	r3, [r8]
+.L2631:
+	add	fp, fp, #1
+	add	r8, r8, #4
+	cmp	r7, fp
+	bne	.L2634
+.L2629:
+	add	r10, r10, #1
+	b	.L2627
+.L2651:
+	.align	2
+.L2650:
+	.word	.LANCHOR79
+	.word	.LANCHOR82
+	.word	.LANCHOR22
+	.word	.LANCHOR56
+	.word	.LC146
+	.word	.LANCHOR166
+	.word	.LC0
+	.word	.LANCHOR45
+	.word	.LC143
+	.word	.LANCHOR75
+	.word	.LC144
+	.word	.LC145
+	.size	ftl_update_l2p_map, .-ftl_update_l2p_map
+	.section	.text.ftl_alloc_new_data_sblk,"ax",%progbits
+	.align	1
+	.global	ftl_alloc_new_data_sblk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_alloc_new_data_sblk, %function
+ftl_alloc_new_data_sblk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, lr}
+	mov	r4, r0
+	bl	ftl_update_l2p_map
+	bl	pm_flush
+	ldr	r3, .L2655
+	mov	r0, r4
+	ldr	r1, [r3]
+	adds	r1, r1, #16
+	cmp	r4, r1
+	ite	eq
+	moveq	r1, #2
+	movne	r1, #3
+	bl	ftl_open_sblk_init
+	bl	ftl_ext_info_flush
+	movs	r0, #0
+	bl	ftl_info_flush
+	bl	lpa_rebuild_hash
+	movs	r0, #0
+	pop	{r4, pc}
+.L2656:
+	.align	2
+.L2655:
+	.word	.LANCHOR60
+	.size	ftl_alloc_new_data_sblk, .-ftl_alloc_new_data_sblk
+	.section	.text.ftl_write_commit,"ax",%progbits
+	.align	1
+	.global	ftl_write_commit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_write_commit, %function
+ftl_write_commit:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #32
+	ldr	r8, .L2717+24
+.L2658:
+	ldr	r0, .L2717
+	ldrb	r2, [r0]	@ zero_extendqisi2
+	cmp	r2, #0
+	beq	.L2660
+	ldr	r4, .L2717+4
+	movs	r1, #48
+	subs	r2, r2, #1
+	strb	r2, [r0]
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	ldr	r2, .L2717+8
+	str	r3, [sp, #16]
+	add	r3, r3, r3, lsl #1
+	ldr	r2, [r2]
+	add	r3, r8, r3, lsl #4
+	str	r3, [sp, #20]
+	ldr	r3, [sp, #16]
+	muls	r1, r3, r1
+	add	r3, r8, r1
+	ldrb	r1, [r8, r1]	@ zero_extendqisi2
+	ldr	r7, [r3, #20]
+	strb	r1, [r4]
+	cmp	r7, r2
+	bcc	.L2662
+	ldr	r0, [sp, #20]
+	bl	buf_free
+	mov	r0, #-1
+.L2657:
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2662:
+	ldr	r2, [r3, #12]
+	ldr	fp, [r3, #4]
+	ldrb	r4, [r3, #41]	@ zero_extendqisi2
+	ldrb	r3, [r3, #40]	@ zero_extendqisi2
+	str	r2, [sp, #8]
+	str	r3, [sp, #12]
+	ldr	r3, .L2717+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2664
+	ldr	r3, .L2717+16
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	add	r3, r8, r3, lsl #4
+.L2665:
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	cmp	r2, #255
+	bne	.L2666
+	ldr	r2, [r3, #20]
+	cmp	r7, r2
+	bne	.L2664
+	ldr	r0, [r3, #4]
+	lsls	r4, r4, #9
+	ldr	r3, [sp, #12]
+	add	r1, fp, r4
+	add	r0, r0, r4
+	lsls	r2, r3, #9
+	bl	ftl_memcpy
+	ldr	r0, [sp, #20]
+	bl	buf_free
+	b	.L2658
+.L2666:
+	add	r2, r2, r2, lsl #1
+	add	r3, r8, r2, lsl #4
+	b	.L2665
+.L2664:
+	mov	r0, r7
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #28]
+	adds	r0, r0, #1
+	bne	.L2668
+	movs	r2, #0
+	add	r1, sp, #28
+	mov	r0, r7
+	bl	pm_log2phys
+.L2668:
+	ldr	r3, .L2717+20
+	ldr	r2, .L2717+24
+	ldr	r0, [r3]
+	movs	r3, #0
+.L2671:
+	ldr	r1, [r2, #20]
+	cmp	r7, r1
+	bne	.L2669
+	ldrb	r1, [r2, #2]	@ zero_extendqisi2
+	lsls	r5, r1, #28
+	bpl	.L2669
+	movs	r2, #48
+	bic	r1, r1, #8
+	mla	r3, r2, r3, r8
+	strb	r1, [r3, #2]
+	ldr	r5, [r3, #4]
+	ldr	r3, [r3, #24]
+	str	r3, [sp, #28]
+.L2670:
+	ldr	r6, .L2717+28
+	ldr	r2, [sp, #12]
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	cmp	r2, r3
+	bcc	.L2672
+	add	r6, r0, #16
+.L2716:
+	mov	r10, #0
+.L2673:
+	ldrh	r3, [r6, #6]
+	cbnz	r3, .L2688
+	bl	ftl_flush
+	mov	r0, r6
+	bl	ftl_alloc_new_data_sblk
+.L2688:
+	mov	r0, r6
+	ldr	r5, .L2717+12
+	bl	ftl_get_new_free_page
+	ldr	r2, [sp, #16]
+	movs	r3, #48
+	ldr	r4, [sp, #8]
+	muls	r3, r2, r3
+	add	r2, r8, r3
+	ldr	r1, [r2, #16]
+	str	r7, [r4, #4]
+	str	r10, [r4, #12]
+	str	r1, [r4]
+	ldr	r1, [sp, #28]
+	str	r1, [r4, #8]
+	str	r1, [r2, #28]
+	movs	r1, #255
+	strb	r1, [r8, r3]
+	ldrb	r3, [r2, #2]	@ zero_extendqisi2
+	ldrh	r1, [r6, #12]
+	str	r0, [r2, #24]
+	orr	r3, r3, #10
+	ldr	r0, .L2717+16
+	strb	r3, [r2, #2]
+	ldrh	r3, [r6, #10]
+	add	r3, r3, r1
+	ldr	r1, [sp, #20]
+	subs	r3, r3, #1
+	strh	r3, [r2, #32]	@ movhi
+	bl	buf_add_tail
+	ldrb	r3, [r5]	@ zero_extendqisi2
+	movs	r1, #0
+	ldr	r2, .L2717+32
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	str	r1, [r2]
+	ldrh	r2, [r6, #6]
+	cmp	r3, #2
+	strb	r3, [r5]
+	bhi	.L2689
+	cmp	r2, #1
+	bne	.L2661
+.L2689:
+	ldr	r7, .L2717+16
+	mov	ip, #48
+	ldrb	r1, [r6, #5]	@ zero_extendqisi2
+	ldrb	r0, [r7]	@ zero_extendqisi2
+	cmp	r1, #0
+	mov	r1, #0
+	ite	ne
+	movne	r4, #2
+	moveq	r4, #1
+	cmp	r2, #1
+	it	eq
+	moveq	r4, r3
+	mov	r2, r0
+.L2693:
+	cmp	r1, r4
+	bne	.L2694
+	uxtb	r1, r1
+	add	r0, r0, r0, lsl #1
+	strb	r2, [r7]
+	subs	r3, r3, r1
+	add	r0, r8, r0, lsl #4
+	strb	r3, [r5]
+	bl	sblk_prog_page
+	ldrh	r3, [r6, #6]
+	cmp	r3, #1
+	bne	.L2661
+	bl	sblk_wait_write_queue_completed
+	bl	ftl_write_completed
+	mov	r0, r6
+	bl	ftl_write_last_log_page
+	mov	r0, r6
+	bl	ftl_alloc_new_data_sblk
+.L2661:
+	ldr	r3, .L2717
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L2658
+.L2660:
+	bl	ftl_write_completed
+	movs	r0, #0
+	b	.L2657
+.L2669:
+	adds	r3, r3, #1
+	adds	r2, r2, #48
+	cmp	r3, #32
+	bne	.L2671
+	movs	r5, #0
+	b	.L2670
+.L2672:
+	cbz	r5, .L2674
+	cbz	r4, .L2675
+	lsls	r2, r4, #9
+	mov	r1, r5
+	mov	r0, fp
+	bl	ftl_memcpy
+.L2675:
+	ldr	r2, [sp, #12]
+	ldr	r3, .L2717+20
+	add	r4, r4, r2
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	ldr	r3, [r3]
+	cmp	r4, r2
+	bcc	.L2676
+	add	r6, r3, #16
+	b	.L2716
+.L2676:
+	lsls	r0, r4, #9
+	subs	r2, r2, r4
+	lsls	r2, r2, #9
+	add	r6, r3, #48
+	adds	r1, r5, r0
+	add	r0, r0, fp
+	bl	ftl_memcpy
+	b	.L2716
+.L2674:
+	ldr	r3, [sp, #28]
+	adds	r3, r3, #1
+	beq	.L2677
+	movs	r0, #1
+	bl	buf_alloc
+	ldr	r3, [sp, #28]
+	mov	r5, r0
+	str	r7, [r0, #20]
+	movs	r1, #1
+	str	r3, [r0, #24]
+	bl	sblk_read_page
+	ldr	r3, [r5, #12]
+	ldr	r2, [r3, #12]
+	ldr	r3, [r3, #4]
+	add	r10, r2, #1
+	cmp	r7, r3
+	ldr	r3, [r5, #36]
+	bne	.L2678
+	adds	r2, r3, #1
+	bne	.L2679
+.L2678:
+	ldrb	r1, [r5, #1]	@ zero_extendqisi2
+	ldr	r2, [sp, #28]
+	str	r3, [sp]
+	mov	r3, r7
+	ldr	r0, .L2717+36
+	bl	printf
+	movs	r3, #4
+	ldr	r1, [r5, #12]
+	mov	r2, r3
+	ldr	r0, .L2717+40
+	bl	rknand_print_hex
+	ldr	r3, .L2717+44
+	ldrh	r2, [r3]
+	movs	r3, #1
+	rsb	r0, r2, #21
+	lsls	r3, r3, r0
+	ldr	r0, [sp, #28]
+	subs	r3, r3, #1
+	lsrs	r0, r0, r2
+	ldr	r2, .L2717+48
+	ands	r0, r0, r3
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	movs	r1, #0
+	uxth	r0, r0
+	bl	ftl_sblk_dump
+.L2679:
+	ldr	r3, [r5, #12]
+	ldr	r3, [r3, #4]
+	cmp	r7, r3
+	bne	.L2680
+	ldr	r3, [r5, #36]
+	adds	r3, r3, #1
+	bne	.L2681
+.L2680:
+	movw	r2, #445
+	ldr	r1, .L2717+52
+	ldr	r0, .L2717+56
+	bl	printf
+.L2682:
+	b	.L2682
+.L2718:
+	.align	2
+.L2717:
+	.word	.LANCHOR43
+	.word	.LANCHOR42
+	.word	.LANCHOR47
+	.word	.LANCHOR89
+	.word	.LANCHOR127
+	.word	.LANCHOR60
+	.word	.LANCHOR36
+	.word	.LANCHOR45
+	.word	.LANCHOR168
+	.word	.LC147
+	.word	.LC96
+	.word	.LANCHOR71
+	.word	.LANCHOR70
+	.word	.LANCHOR167
+	.word	.LC0
+.L2681:
+	cbz	r4, .L2683
+	ldr	r3, [sp, #28]
+	lsls	r2, r4, #9
+	adds	r3, r3, #1
+	beq	.L2684
+	ldr	r1, [r5, #4]
+	mov	r0, fp
+	bl	ftl_memcpy
+.L2683:
+	ldr	r2, [sp, #12]
+	ldr	r3, .L2719
+	add	r4, r4, r2
+	ldr	r2, .L2719+4
+	ldr	r3, [r3]
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	add	r6, r3, #48
+	cmp	r4, r2
+	bcc	.L2685
+	add	r6, r3, #16
+.L2686:
+	cmp	r5, #0
+	beq	.L2673
+	ldrb	r3, [r5, #2]	@ zero_extendqisi2
+	mov	r1, r5
+	ldr	r0, .L2719+8
+	bic	r3, r3, #8
+	strb	r3, [r5, #2]
+	bl	buf_remove_buf
+	mov	r0, r5
+	bl	buf_free
+	b	.L2673
+.L2685:
+	ldr	r3, [sp, #28]
+	subs	r2, r2, r4
+	lsls	r2, r2, #9
+	lsls	r0, r4, #9
+	adds	r3, r3, #1
+	beq	.L2687
+	ldr	r1, [r5, #4]
+	add	r1, r1, r0
+	add	r0, r0, fp
+	bl	ftl_memcpy
+	b	.L2686
+.L2687:
+	movs	r1, #0
+	add	r0, r0, fp
+	bl	ftl_memset
+	b	.L2686
+.L2694:
+	mul	r2, ip, r2
+	adds	r1, r1, #1
+	ldrb	r2, [r8, r2]	@ zero_extendqisi2
+	b	.L2693
+.L2695:
+	lsls	r2, r4, #9
+	mov	r10, r5
+.L2684:
+	movs	r1, #0
+	mov	r0, fp
+	bl	ftl_memset
+	b	.L2683
+.L2677:
+	cmp	r4, #0
+	bne	.L2695
+	mov	r10, r4
+	mov	r5, r4
+	b	.L2683
+.L2720:
+	.align	2
+.L2719:
+	.word	.LANCHOR60
+	.word	.LANCHOR45
+	.word	.LANCHOR51
+	.size	ftl_write_commit, .-ftl_write_commit
+	.section	.text.ftl_discard,"ax",%progbits
+	.align	1
+	.global	ftl_discard
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_discard, %function
+ftl_discard:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r5, r2
+	sub	sp, sp, #32
+	mov	r10, r3
+	cmp	r0, #0
+	bne	.L2722
+	ldr	r3, .L2773
+	mov	fp, #24576
+	ldr	r3, [r3]
+.L2723:
+	adds	r2, r1, r5
+	cmp	r3, r2
+	bcc	.L2744
+	ldr	r3, .L2773+4
+	add	fp, fp, r1
+	ldr	r3, [r3]
+	lsls	r3, r3, #19
+	bpl	.L2725
+	mov	r1, r0
+	str	r10, [sp]
+	mov	r3, r5
+	mov	r2, fp
+	ldr	r0, .L2773+8
+	bl	printf
+.L2725:
+	ldr	r6, .L2773+12
+	mov	r0, fp
+	ldr	r7, .L2773+16
+	ldr	r3, [r6]
+	ldrb	r8, [r7]	@ zero_extendqisi2
+	ldr	r2, [r3, #8]
+	mov	r1, r8
+	str	r2, [sp, #12]
+	adds	r2, r2, #1
+	str	r2, [r3, #8]
+	bl	__aeabi_uidiv
+	mov	r1, r8
+	mov	r4, r0
+	mov	r0, fp
+	bl	__aeabi_uidivmod
+	mov	fp, r1
+	cmp	r1, #0
+	beq	.L2726
+	sub	r3, r8, r1
+	cmp	r3, r5
+	it	cs
+	movcs	r3, r5
+	cmp	r10, #1
+	mov	r8, r3
+	uxth	r3, r3
+	str	r3, [sp, #16]
+	bhi	.L2728
+	mov	r0, r4
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #24]
+	adds	r0, r0, #1
+	bne	.L2729
+	movs	r2, #0
+	add	r1, sp, #24
+	mov	r0, r4
+	bl	pm_log2phys
+.L2729:
+	ldr	r3, [sp, #24]
+	adds	r3, r3, #1
+	beq	.L2728
+	movs	r0, #0
+	bl	buf_alloc
+	mov	r3, r0
+	cbz	r0, .L2728
+	ldr	r2, [sp, #12]
+	movs	r1, #0
+	str	r4, [r0, #20]
+	strb	fp, [r0, #41]
+	str	r3, [sp, #20]
+	strb	r8, [r3, #40]
+	str	r2, [r0, #16]
+	ldr	r3, [sp, #16]
+	ldr	r0, [r0, #4]
+	lsls	r2, r3, #9
+	add	r0, r0, fp, lsl #9
+	bl	ftl_memset
+	ldr	r3, [sp, #20]
+	mov	r0, r3
+	bl	ftl_write_buf
+	bl	ftl_write_commit
+	ldr	r2, [r6]
+	ldr	r3, [r2, #76]
+	adds	r3, r3, #1
+	str	r3, [r2, #76]
+.L2728:
+	ldr	r3, [sp, #16]
+	adds	r4, r4, #1
+	subs	r5, r5, r3
+.L2726:
+	cbz	r5, .L2731
+	bl	ftl_flush
+.L2731:
+	ldr	fp, .L2773+32
+	mov	r3, #-1
+	str	r3, [sp, #28]
+.L2732:
+	ldrb	r3, [r7]	@ zero_extendqisi2
+	cmp	r5, r3
+	bcs	.L2737
+	cmp	r10, #1
+	bls	.L2738
+.L2739:
+	movs	r0, #0
+.L2721:
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2722:
+	cmp	r0, #3
+	bhi	.L2744
+	lsl	fp, r0, #13
+	mov	r3, #8192
+	b	.L2723
+.L2737:
+	mov	r0, r4
+	bl	lpa_hash_get_ppa
+	add	r1, sp, #32
+	movs	r2, #0
+	str	r0, [r1, #-8]!
+	adds	r0, r0, #1
+	mov	r0, r4
+	beq	.L2733
+	bl	pm_log2phys
+	ldr	r3, [sp, #24]
+	adds	r3, r3, #1
+	beq	.L2735
+	movs	r2, #1
+	add	r1, sp, #28
+	mov	r0, r4
+	bl	pm_log2phys
+.L2772:
+	ldr	r2, [r6]
+	ldr	r3, [r2, #76]
+	adds	r3, r3, #1
+	str	r3, [r2, #76]
+.L2735:
+	ldrb	r3, [r7]	@ zero_extendqisi2
+	adds	r4, r4, #1
+	subs	r5, r5, r3
+	b	.L2732
+.L2733:
+	bl	pm_log2phys
+	ldr	r3, [sp, #24]
+	adds	r3, r3, #1
+	beq	.L2735
+	add	r1, sp, #28
+	movs	r2, #1
+	mov	r0, r4
+	bl	pm_log2phys
+	ldr	r3, .L2773+20
+	ldrb	r1, [fp]	@ zero_extendqisi2
+	ldrh	r2, [r3]
+	movs	r3, #1
+	rsb	r0, r2, #21
+	lsls	r3, r3, r0
+	ldr	r0, [sp, #24]
+	subs	r3, r3, #1
+	lsrs	r0, r0, r2
+	ands	r0, r0, r3
+	bl	__aeabi_uidiv
+	uxth	r0, r0
+	bl	ftl_vpn_decrement
+	b	.L2772
+.L2738:
+	cmp	r5, #0
+	beq	.L2739
+	mov	r0, r4
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #24]
+	adds	r0, r0, #1
+	bne	.L2740
+	movs	r2, #0
+	add	r1, sp, #24
+	mov	r0, r4
+	bl	pm_log2phys
+.L2740:
+	ldr	r3, [sp, #24]
+	adds	r3, r3, #1
+	beq	.L2739
+	movs	r0, #0
+	bl	buf_alloc
+	mov	r10, r0
+	cmp	r0, #0
+	beq	.L2739
+	ldr	r3, [sp, #12]
+	str	r4, [r0, #20]
+	movs	r4, #0
+	strb	r4, [r0, #41]
+	str	r3, [r0, #16]
+	ldrb	r3, [r7]	@ zero_extendqisi2
+	strb	r5, [r0, #40]
+	cmp	r5, r3
+	bcc	.L2741
+	mov	r2, #1048
+	ldr	r1, .L2773+24
+	ldr	r0, .L2773+28
+	bl	printf
+.L2742:
+	b	.L2742
+.L2741:
+	lsls	r2, r5, #9
+	mov	r1, r4
+	ldr	r0, [r0, #4]
+	bl	ftl_memset
+	mov	r0, r10
+	bl	ftl_write_buf
+	bl	ftl_write_commit
+	ldr	r2, [r6]
+	ldr	r3, [r2, #76]
+	adds	r3, r3, #1
+	str	r3, [r2, #76]
+	b	.L2739
+.L2744:
+	mov	r0, #-1
+	b	.L2721
+.L2774:
+	.align	2
+.L2773:
+	.word	.LANCHOR52
+	.word	.LANCHOR22
+	.word	.LC148
+	.word	.LANCHOR46
+	.word	.LANCHOR45
+	.word	.LANCHOR71
+	.word	.LANCHOR169
+	.word	.LC0
+	.word	.LANCHOR70
+	.size	ftl_discard, .-ftl_discard
+	.section	.text.FtlDiscard,"ax",%progbits
+	.align	1
+	.global	FtlDiscard
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlDiscard, %function
+FtlDiscard:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	movs	r3, #0
+	mov	r2, r1
+	mov	r1, r0
+	mov	r0, r3
+	b	ftl_discard
+	.size	FtlDiscard, .-FtlDiscard
+	.section	.text.gc_do_copy_back,"ax",%progbits
+	.align	1
+	.global	gc_do_copy_back
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_do_copy_back, %function
+gc_do_copy_back:
+	@ args = 0, pretend = 0, frame = 48
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2877
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #72
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	cmp	r0, #0
+	bne	.L2777
+	bl	buf_alloc
+	mov	r4, r0
+	cmp	r0, #0
+	beq	.L2776
+	ldr	r6, .L2877+4
+	ldrh	r2, [r6, #22]
+	mov	r0, r2
+	bl	gc_get_src_ppa_from_index
+	movs	r1, #1
+	adds	r2, r2, #1
+	str	r0, [r4, #24]
+	mov	r7, r0
+	mov	r0, r4
+	strh	r2, [r6, #22]	@ movhi
+	bl	sblk_read_page
+	ldr	r3, [r4, #36]
+	adds	r0, r3, #1
+	beq	.L2779
+	cmp	r3, #512
+	bne	.L2780
+.L2779:
+	ldr	r3, .L2877+8
+	ldrh	r0, [r3]
+	movs	r3, #1
+	rsb	r2, r0, #21
+	lsls	r3, r3, r2
+	ldr	r2, .L2877+12
+	lsr	r0, r7, r0
+	subs	r3, r3, #1
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	ands	r0, r0, r3
+	bl	__aeabi_uidiv
+	movs	r1, #0
+	uxth	r0, r0
+	bl	ftl_sblk_dump
+.L2780:
+	ldr	r3, [r4, #36]
+	adds	r1, r3, #1
+	beq	.L2781
+	cmp	r3, #512
+	bne	.L2782
+.L2781:
+	mov	r2, #556
+	ldr	r1, .L2877+16
+	ldr	r0, .L2877+20
+	bl	printf
+.L2783:
+	b	.L2783
+.L2782:
+	ldr	r3, [r4, #12]
+	ldr	r5, [r3, #4]
+	mov	r0, r5
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #48]
+	adds	r0, r0, #1
+	bne	.L2784
+	movs	r2, #0
+	add	r1, sp, #48
+	mov	r0, r5
+	bl	pm_log2phys
+.L2784:
+	ldr	r8, [sp, #48]
+	cmp	r7, r8
+	bne	.L2785
+	ldr	r0, .L2877+24
+	movs	r3, #0
+.L2788:
+	adds	r2, r0, r3
+	ldr	r1, [r2, #20]
+	cmp	r5, r1
+	bne	.L2786
+	ldrb	r2, [r2, #2]	@ zero_extendqisi2
+	lsls	r2, r2, #30
+	bpl	.L2786
+	mov	r0, r4
+	bl	buf_free
+	ldr	r3, .L2877+28
+	ldr	r3, [r3]
+	lsls	r1, r3, #23
+	bpl	.L2776
+	ldrh	r3, [r6, #22]
+	mov	r2, r7
+	mov	r1, r5
+	ldr	r0, .L2877+32
+	bl	printf
+.L2776:
+	add	sp, sp, #72
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2786:
+	adds	r3, r3, #48
+	cmp	r3, #1536
+	bne	.L2788
+	movs	r3, #0
+	str	r5, [r4, #20]
+	strb	r3, [r4, #41]
+	ldr	r3, .L2877+36
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	strb	r3, [r4, #40]
+	ldrb	r3, [r4, #2]	@ zero_extendqisi2
+	orr	r3, r3, #10
+	strb	r3, [r4, #2]
+	ldr	r3, [r4, #12]
+	ldr	r3, [r3]
+	str	r3, [r4, #16]
+	ldr	r3, .L2877+28
+	ldr	r3, [r3]
+	lsls	r2, r3, #23
+	bpl	.L2789
+	mov	r0, r5
+	bl	lpa_hash_get_ppa
+	ldrh	r3, [r6, #22]
+	mov	r2, r8
+	str	r7, [sp]
+	mov	r1, r5
+	str	r3, [sp, #4]
+	mov	r3, r0
+	ldr	r0, .L2877+40
+	bl	printf
+.L2789:
+	mov	r0, r4
+	bl	ftl_gc_write_buf
+	bl	ftl_write_commit
+	ldr	r3, .L2877+44
+	ldr	r2, [r3]
+	ldr	r3, [r2, #60]
+	adds	r3, r3, #1
+	str	r3, [r2, #60]
+	ldrh	r3, [r6, #24]
+	adds	r3, r3, #1
+	strh	r3, [r6, #24]	@ movhi
+	b	.L2776
+.L2785:
+	ldr	r3, .L2877+28
+	ldr	r3, [r3]
+	lsls	r3, r3, #23
+	bpl	.L2790
+	mov	r0, r5
+	bl	lpa_hash_get_ppa
+	ldrh	r3, [r6, #22]
+	mov	r2, r8
+	str	r7, [sp]
+	mov	r1, r5
+	str	r3, [sp, #4]
+	mov	r3, r0
+	ldr	r0, .L2877+40
+	bl	printf
+.L2790:
+	mov	r0, r4
+	bl	buf_free
+	b	.L2776
+.L2777:
+	ldr	r3, .L2877+48
+	ldr	r5, .L2877+4
+	ldr	r3, [r3]
+	str	r3, [sp, #28]
+	ldr	r3, .L2877+52
+	ldrb	r8, [r3]	@ zero_extendqisi2
+	ldr	r3, [sp, #28]
+	cmp	r8, #3
+	ldrb	r7, [r3, #89]	@ zero_extendqisi2
+	bne	.L2791
+	ldr	r3, .L2877+56
+	ldrh	r4, [r5, #310]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2792
+	add	r1, r7, r7, lsl #1
+	mov	r0, r4
+	bl	__aeabi_idiv
+	uxth	r10, r0
+	sub	r0, r7, r7, lsl #2
+	str	r8, [sp, #32]
+	smulbb	r0, r0, r10
+	add	r0, r0, r4
+	uxth	fp, r0
+.L2793:
+	ldr	r3, [sp, #32]
+	muls	r3, r7, r3
+	str	r3, [sp, #36]
+	ldr	r3, .L2877+60
+	ldrh	r1, [r3]
+	ldr	r3, .L2877+64
+	ldr	r8, [r3]
+	muls	r1, r7, r1
+	ldrh	r3, [r5, #20]
+	movs	r7, #0
+	str	r3, [sp, #40]
+	subs	r1, r1, #1
+	ldr	r3, .L2877+4
+.L2796:
+	ldr	r0, [sp, #36]
+	uxth	r2, r7
+	cmp	r2, r0
+	blt	.L2798
+.L2829:
+	movs	r6, #1
+	b	.L2794
+.L2792:
+	mov	r0, r4
+	mov	r1, r7
+	bl	__aeabi_idiv
+	ldr	r3, .L2877+68
+	str	r8, [sp, #32]
+	ldrh	r6, [r3, r0, lsl #1]
+	smulbb	r0, r0, r7
+	subs	r0, r4, r0
+	lsr	r10, r6, #3
+	uxth	fp, r0
+	mla	r4, r7, r10, fp
+	and	r6, r6, #7
+	cmp	r6, #1
+	add	r4, r4, r4, lsl #1
+	uxth	r4, r4
+	beq	.L2793
+.L2794:
+	ldr	r3, .L2877+28
+	ldr	r3, [r3]
+	lsls	r0, r3, #23
+	bpl	.L2799
+	ldr	r3, .L2877+64
+	mov	r2, r6
+	str	r4, [sp, #8]
+	mov	r1, r10
+	ldr	r0, .L2877+72
+	ldr	r3, [r3]
+	ldr	r3, [r3, r4, lsl #2]
+	str	r3, [sp, #4]
+	ldrh	r3, [r5, #310]
+	str	r3, [sp]
+	mov	r3, fp
+	bl	printf
+.L2799:
+	movs	r3, #0
+.L2875:
+	str	r3, [sp, #40]
+	ldrh	r3, [sp, #40]
+	mov	r8, r3
+	str	r3, [sp, #36]
+	ldr	r3, [sp, #28]
+	ldrb	r2, [r3, #89]	@ zero_extendqisi2
+	ldr	r3, [sp, #32]
+	muls	r3, r2, r3
+	cmp	r8, r3
+	blt	.L2816
+	ldr	r1, .L2877+52
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	cmp	r1, #3
+	beq	.L2817
+	movs	r0, #0
+	subs	r3, r3, #1
+.L2818:
+	uxth	r1, r0
+	adds	r0, r0, #1
+	cmp	r1, r3
+	blt	.L2824
+	add	r1, sp, #72
+	add	r3, r1, r3, lsl #2
+	movs	r1, #255
+	ldr	r3, [r3, #-24]
+	strb	r1, [r3]
+	ldrh	r3, [sp, #32]
+	ldr	r0, [sp, #48]
+	smulbb	r1, r3, r2
+	uxtb	r1, r1
+	bl	sblk_prog_page
+	b	.L2823
+.L2791:
+	ldr	r3, .L2877+76
+	mov	r1, r7
+	ldrh	r4, [r5, #310]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	mov	r0, r4
+	cbnz	r3, .L2795
+	bl	__aeabi_idiv
+	uxth	r10, r0
+	movs	r3, #1
+	smulbb	r0, r7, r10
+	subs	r0, r4, r0
+	uxth	fp, r0
+.L2873:
+	str	r3, [sp, #32]
+	b	.L2793
+.L2795:
+	bl	__aeabi_idiv
+	uxth	r10, r0
+	movs	r3, #2
+	smulbb	r0, r7, r10
+	subs	r0, r4, r0
+	uxth	fp, r0
+	b	.L2873
+.L2878:
+	.align	2
+.L2877:
+	.word	.LANCHOR67
+	.word	.LANCHOR59
+	.word	.LANCHOR71
+	.word	.LANCHOR70
+	.word	.LANCHOR170
+	.word	.LC0
+	.word	.LANCHOR36
+	.word	.LANCHOR22
+	.word	.LC149
+	.word	.LANCHOR45
+	.word	.LC150
+	.word	.LANCHOR46
+	.word	.LANCHOR60
+	.word	.LANCHOR64
+	.word	.LANCHOR66
+	.word	.LANCHOR68
+	.word	.LANCHOR108
+	.word	.LANCHOR171
+	.word	.LC151
+	.word	.LANCHOR74
+.L2798:
+	add	r2, r2, r4
+	cmp	r2, r1
+	beq	.L2829
+	ldr	r0, [r8, r2, lsl #2]
+	adds	r0, r0, #1
+	bne	.L2797
+	ldrh	r6, [r3, #22]
+	str	r3, [sp, #44]
+	ldr	r3, [sp, #40]
+	cmp	r6, r3
+	bcs	.L2776
+	mov	r0, r6
+	adds	r6, r6, #1
+	bl	gc_get_src_ppa_from_index
+	ldr	r3, [sp, #44]
+	strh	r6, [r3, #22]	@ movhi
+	str	r0, [r8, r2, lsl #2]
+.L2797:
+	adds	r7, r7, #1
+	b	.L2796
+.L2816:
+	ldr	r3, .L2879
+	add	r7, r4, r8
+	ldr	r3, [r3]
+	ldrb	r3, [r3, r7]	@ zero_extendqisi2
+	cmp	r3, #255
+	bne	.L2801
+	movs	r0, #0
+	bl	buf_alloc
+	mov	r5, r0
+	cbnz	r0, .L2802
+	bl	sblk_wait_write_queue_completed
+	bl	ftl_write_completed
+	bl	gc_write_completed
+	bl	gc_free_temp_buf
+	mov	r0, r5
+	bl	buf_alloc
+	mov	r5, r0
+	cmp	r0, #0
+	beq	.L2776
+.L2802:
+	ldr	r3, .L2879
+	ldrb	r2, [r5, #1]	@ zero_extendqisi2
+	ldr	r3, [r3]
+	strb	r2, [r3, r7]
+	ldr	r2, .L2879+4
+	strb	r6, [r5, #45]
+	ldrb	r3, [r2, #7]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	strb	r3, [r2, #7]
+	ldr	r3, [sp, #36]
+	add	r3, r3, r4
+	strh	r3, [r5, #32]	@ movhi
+	ldr	r3, .L2879+8
+	ldrh	r2, [r3]
+	ldr	r3, [sp, #28]
+	ldrb	r3, [r3, #89]	@ zero_extendqisi2
+	muls	r3, r2, r3
+	subs	r3, r3, #1
+	cmp	r7, r3
+	bne	.L2803
+	ldr	r3, .L2879+12
+	ldr	r0, [r5, #4]
+	ldr	r1, [r3]
+	mov	r3, #-1
+	str	r3, [r1, r7, lsl #2]
+	ldr	r3, .L2879+16
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	muls	r2, r3, r2
+	lsls	r2, r2, #2
+	bl	ftl_memcpy
+	ldr	r3, .L2879+8
+	ldr	r2, .L2879+16
+	ldr	r0, [r5, #4]
+	ldrh	r3, [r3]
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	muls	r2, r3, r2
+	ldr	r3, .L2879+20
+	ldr	r1, [r3]
+	lsls	r2, r2, #2
+	add	r0, r0, r2
+	bl	ftl_memcpy
+	ldr	r3, .L2879+24
+	movs	r1, #0
+	ldr	r0, [r5, #12]
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	lsls	r2, r2, #1
+	bl	ftl_memset
+	ldr	r3, [r5, #12]
+	ldr	r2, .L2879+28
+	ldr	r0, [r5, #4]
+	str	r3, [sp, #44]
+	str	r2, [r3]
+	ldr	r3, .L2879+8
+	ldrh	r2, [r3]
+	ldr	r3, .L2879+16
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	muls	r1, r2, r1
+	lsls	r1, r1, #2
+	bl	js_hash
+	ldr	r2, .L2879+32
+	ldr	r3, [sp, #44]
+	ldr	r2, [r2]
+	str	r0, [r3, #4]
+	ldr	r2, [r2, #132]
+.L2874:
+	str	r2, [r3, #8]
+.L2801:
+	ldr	r3, .L2879
+	ldr	r2, .L2879+36
+	ldr	ip, [r3]
+	add	r3, sp, #72
+	add	r1, r3, r8, lsl #2
+	ldrb	r5, [ip, r7]	@ zero_extendqisi2
+	add	r3, r5, r5, lsl #1
+	add	r3, r2, r3, lsl #4
+	str	r3, [r1, #-24]
+	movs	r3, #48
+	mla	r2, r3, r5, r2
+	movs	r3, #1
+	strh	r3, [r2, #34]	@ movhi
+	ldr	r3, .L2879+40
+	strb	r6, [r2, #45]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #3
+	bne	.L2811
+	ldr	r3, [sp, #36]
+	ldr	r0, .L2879+44
+	umull	r0, r1, r3, r0
+	ldr	r0, [sp, #28]
+	lsrs	r3, r1, #1
+	uxtah	r1, fp, r3
+	add	r3, r3, r3, lsl #1
+	add	r1, r0, r1, lsl #1
+	ldrh	r0, [r1, #96]
+	ldr	r1, .L2879+48
+	ldrh	r1, [r1]
+	muls	r1, r0, r1
+	ldrh	r0, [r2, #32]
+	orr	r1, r1, r10
+	str	r1, [r2, #24]
+	ldr	r2, .L2879+52
+	ldr	lr, [r2]
+	ldr	r2, [sp, #36]
+	subs	r3, r2, r3
+	lsls	r3, r3, #24
+	add	r3, r3, #16777216
+	orrs	r1, r1, r3
+	str	r1, [lr, r0, lsl #2]
+.L2812:
+	ldr	r3, .L2879+56
+	ldr	r3, [r3]
+	lsls	r3, r3, #23
+	bpl	.L2815
+	ldr	r3, .L2879+4
+	movs	r2, #48
+	ldr	r0, .L2879+60
+	ldrb	r1, [r3, #6]	@ zero_extendqisi2
+	ldr	r3, .L2879+36
+	mla	r5, r2, r5, r3
+	ldr	r2, .L2879+44
+	ldr	r3, [r5, #12]
+	ldr	r3, [r3, #4]
+	str	r3, [sp, #20]
+	ldr	r3, [sp, #36]
+	umull	r2, r3, r3, r2
+	mov	r2, r6
+	ubfx	r3, r3, #1, #16
+	add	r3, r3, fp
+	str	r3, [sp, #16]
+	ldrb	r3, [r5, #1]	@ zero_extendqisi2
+	str	r3, [sp, #12]
+	ldrh	r3, [r5, #32]
+	str	r3, [sp, #8]
+	ldr	r3, [r5, #24]
+	str	r3, [sp, #4]
+	ldrb	r3, [ip, r7]	@ zero_extendqisi2
+	str	r3, [sp]
+	mov	r3, r1
+	mov	r1, r8
+	bl	printf
+.L2815:
+	ldr	r3, [sp, #40]
+	adds	r3, r3, #1
+	b	.L2875
+.L2803:
+	ldr	r3, .L2879+20
+	movs	r1, #1
+	mov	r0, r5
+	ldr	r3, [r3]
+	ldr	r3, [r3, r7, lsl #2]
+	str	r3, [r5, #24]
+	bl	sblk_read_page
+	ldr	r3, [r5, #36]
+	adds	r1, r3, #1
+	beq	.L2804
+	cmp	r3, #512
+	bne	.L2808
+.L2804:
+	ldr	r3, .L2879+64
+	ldrh	r2, [r3]
+	movs	r3, #1
+	rsb	r0, r2, #21
+	lsls	r3, r3, r0
+	ldr	r0, [r5, #24]
+	subs	r3, r3, #1
+	lsrs	r0, r0, r2
+	ldr	r2, .L2879+68
+	ands	r0, r0, r3
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	movs	r1, #0
+	uxth	r0, r0
+	bl	ftl_sblk_dump
+	ldr	r3, [r5, #36]
+	adds	r2, r3, #1
+	beq	.L2806
+	cmp	r3, #512
+	bne	.L2808
+.L2806:
+	ldr	r3, [r5, #12]
+	mov	r2, #-1
+	str	r2, [r3, #4]
+	ldr	r3, [r5, #36]
+	cmp	r3, r2
+	beq	.L2807
+	cmp	r3, #512
+	bne	.L2808
+.L2807:
+	movw	r2, #671
+	ldr	r1, .L2879+72
+	ldr	r0, .L2879+76
+	bl	printf
+.L2809:
+	b	.L2809
+.L2808:
+	ldr	r3, [r5, #12]
+	ldr	r2, .L2879+80
+	ldr	r1, [r3, #4]
+	ldr	r2, [r2]
+	cmp	r1, r2
+	itt	cs
+	movcs	r2, #-1
+	strcs	r2, [r3, #4]
+	ldr	r2, .L2879+12
+	ldr	r1, [r3, #4]
+	ldr	r2, [r2]
+	str	r1, [r2, r7, lsl #2]
+	ldr	r2, [r5, #24]
+	b	.L2874
+.L2811:
+	cmp	r3, #2
+	bne	.L2813
+	ldr	r3, .L2879+84
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L2814
+	ldr	r1, [sp, #28]
+	add	r3, r8, fp
+	add	r3, r1, r3, lsl #1
+	ldr	r1, .L2879+48
+	ldrh	r3, [r3, #96]
+	ldrh	r1, [r1]
+	mla	r3, r1, r3, r10
+.L2876:
+	orr	r3, r3, #33554432
+	str	r3, [r2, #24]
+.L2813:
+	ldr	r2, .L2879+36
+	movs	r3, #48
+	mla	r3, r3, r5, r2
+	ldr	r2, [r3, #24]
+	ldrh	r1, [r3, #32]
+	ldr	r3, .L2879+52
+	ldr	r3, [r3]
+	str	r2, [r3, r1, lsl #2]
+	b	.L2812
+.L2814:
+	ldr	r3, [sp, #36]
+	ldr	r1, [sp, #28]
+	add	r3, fp, r3, lsr #1
+	add	r3, r1, r3, lsl #1
+	ldr	r1, .L2879+48
+	ldrh	r3, [r3, #96]
+	ldrh	r1, [r1]
+	mla	r3, r1, r3, r10
+	ldr	r1, [sp, #36]
+	and	r1, r1, #1
+	add	r3, r3, r1
+	b	.L2876
+.L2880:
+	.align	2
+.L2879:
+	.word	.LANCHOR65
+	.word	.LANCHOR59
+	.word	.LANCHOR68
+	.word	.LANCHOR107
+	.word	.LANCHOR69
+	.word	.LANCHOR108
+	.word	.LANCHOR45
+	.word	-178307901
+	.word	.LANCHOR60
+	.word	.LANCHOR36
+	.word	.LANCHOR64
+	.word	-1431655765
+	.word	.LANCHOR75
+	.word	.LANCHOR109
+	.word	.LANCHOR22
+	.word	.LC152
+	.word	.LANCHOR71
+	.word	.LANCHOR70
+	.word	.LANCHOR170
+	.word	.LC0
+	.word	.LANCHOR47
+	.word	.LANCHOR74
+.L2817:
+	ldr	r3, .L2881
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	ldr	r3, [sp, #48]
+	cbz	r1, .L2819
+	movs	r1, #0
+.L2822:
+	strb	r1, [r3, #44]
+	add	r0, sp, #48
+	add	r1, sp, #60
+	bl	sblk_xlc_prog_pages
+.L2823:
+	ldr	r3, [sp, #28]
+	ldr	r1, .L2881
+	ldrb	r2, [r3, #89]	@ zero_extendqisi2
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	uxth	r3, r2
+	cmp	r1, #0
+	beq	.L2825
+	add	r3, r3, r3, lsl #1
+.L2826:
+	ldr	r1, .L2881+4
+	ldr	r0, [r1]
+	ldr	r1, [r0, #52]
+	add	r1, r1, r3
+	str	r1, [r0, #52]
+	ldr	r1, .L2881+8
+	ldrh	r0, [r1, #310]
+	add	r3, r3, r0
+	uxth	r3, r3
+	strh	r3, [r1, #310]	@ movhi
+	ldr	r1, .L2881+12
+	ldrh	r1, [r1]
+	muls	r2, r1, r2
+	cmp	r3, r2
+	itttt	ge
+	ldrge	r3, .L2881+16
+	movge	r2, #0
+	ldrge	r3, [r3]
+	strhge	r2, [r3, #86]	@ movhi
+	bl	gc_write_completed
+	b	.L2776
+.L2819:
+	cmp	r6, #1
+	bne	.L2821
+	movs	r1, #9
+	b	.L2822
+.L2821:
+	cmp	r6, #2
+	it	eq
+	moveq	r1, #13
+	b	.L2822
+.L2824:
+	add	r4, sp, #72
+	add	r5, sp, #72
+	add	r4, r4, r1, lsl #2
+	add	r1, r5, r1, lsl #2
+	ldr	r1, [r1, #-20]
+	ldr	r4, [r4, #-24]
+	ldrb	r1, [r1, #1]	@ zero_extendqisi2
+	strb	r1, [r4]
+	b	.L2818
+.L2825:
+	ldr	r1, .L2881+20
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	cmp	r1, #0
+	beq	.L2826
+	lsls	r3, r3, #1
+	uxth	r3, r3
+	b	.L2826
+.L2882:
+	.align	2
+.L2881:
+	.word	.LANCHOR66
+	.word	.LANCHOR46
+	.word	.LANCHOR59
+	.word	.LANCHOR68
+	.word	.LANCHOR60
+	.word	.LANCHOR74
+	.size	gc_do_copy_back, .-gc_do_copy_back
+	.section	.text.do_gc,"ax",%progbits
+	.align	1
+	.global	do_gc
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	do_gc, %function
+do_gc:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r1, .L3019
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #24
+	ldr	r5, .L3019+4
+	mov	r10, r1
+	ldr	r3, [r1]
+	ldr	r7, .L3019+8
+	ldrb	r2, [r5]	@ zero_extendqisi2
+	ldrh	r4, [r3, #116]
+	ldrh	r6, [r3, #114]
+	mov	r8, r7
+	ldr	fp, [r7]
+	add	r6, r6, r4
+	uxth	r6, r6
+	cmp	r2, #6
+	bhi	.L2883
+	tbh	[pc, r2, lsl #1]
+.L2886:
+	.2byte	(.L2885-.L2886)/2
+	.2byte	(.L2887-.L2886)/2
+	.2byte	(.L2888-.L2886)/2
+	.2byte	(.L2889-.L2886)/2
+	.2byte	(.L2890-.L2886)/2
+	.2byte	(.L2891-.L2886)/2
+	.2byte	(.L2892-.L2886)/2
+	.p2align 1
+.L2885:
+	ldrh	r2, [r3, #118]
+	ldrh	r1, [fp, #80]
+	ldr	r7, .L3019+12
+	add	r4, r4, r2
+	movw	r2, #65535
+	cmp	r1, r2
+	uxth	r4, r4
+	beq	.L2893
+	ldr	r3, .L3019+16
+	cmp	r4, #7
+	ite	hi
+	movhi	r8, #3
+	movls	r8, #1
+	ldr	r3, [r3]
+	lsls	r3, r3, #23
+	bpl	.L2895
+	ldrh	r3, [fp, #122]
+	movw	r1, #1348
+	ldrb	r2, [r7]	@ zero_extendqisi2
+	ldr	r0, .L3019+20
+	str	r3, [sp, #12]
+	ldrh	r3, [fp, #120]
+	str	r3, [sp, #8]
+	ldrh	r3, [fp, #124]
+	str	r4, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r6
+	bl	printf
+.L2895:
+	movs	r2, #1
+	mov	r1, r8
+	ldrb	r0, [r7]	@ zero_extendqisi2
+	bl	gc_search_src_blk
+	cmp	r0, #0
+	ble	.L2883
+.L2896:
+	movs	r3, #1
+.L3014:
+	strb	r3, [r5]
+	b	.L2883
+.L2893:
+	ldrh	r2, [r3, #122]
+	cmp	r0, #1
+	ldrh	r3, [r3, #124]
+	str	r3, [sp, #16]
+	bne	.L2897
+	str	r2, [sp, #20]
+	bl	gc_scan_static_data
+	bl	gc_static_wearleveling
+	ldr	r2, [sp, #20]
+.L2897:
+	ldr	r1, [r8]
+	movs	r3, #1
+	strb	r3, [r7]
+	ldrh	fp, [r1, #124]
+	cmp	fp, #0
+	beq	.L2898
+	strb	r3, [r5]
+	movs	r2, #0
+	ldr	r3, .L3019+16
+	strb	r2, [r7]
+	ldr	r3, [r3]
+	lsls	r0, r3, #23
+	bpl	.L2883
+	ldrh	r3, [r1, #122]
+	ldr	r0, .L3019+20
+	str	r3, [sp, #12]
+	ldrh	r3, [r1, #120]
+	movw	r1, #1373
+	stm	sp, {r4, fp}
+	str	r3, [sp, #8]
+	mov	r3, r6
+	bl	printf
+.L2883:
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2898:
+	cmp	r6, #47
+	bhi	.L2900
+	cmp	r4, #1
+	bls	.L2901
+	cmp	r4, #16
+	bhi	.L2902
+	ldr	r2, [r10]
+	ldrh	r2, [r2, #120]
+	cmp	r2, #127
+	bhi	.L2903
+.L2902:
+	movs	r2, #16
+	movs	r1, #3
+.L3018:
+	movs	r0, #1
+.L3012:
+	bl	gc_search_src_blk
+	uxth	r0, r0
+.L2904:
+	cmp	r0, #0
+	bne	.L2896
+	b	.L2883
+.L2903:
+	movs	r2, #8
+	movs	r1, #2
+	b	.L3018
+.L2901:
+	ldr	r3, .L3019+16
+	strb	fp, [r7]
+	ldr	r3, [r3]
+	lsls	r3, r3, #23
+	bpl	.L2905
+	ldrh	r3, [r1, #122]
+	mov	r2, fp
+	ldr	r0, .L3019+20
+	str	r3, [sp, #12]
+	ldrh	r3, [r1, #120]
+	movw	r1, #1386
+	stm	sp, {r4, fp}
+	str	r3, [sp, #8]
+	mov	r3, r6
+	bl	printf
+.L2905:
+	cmp	r6, #16
+	bls	.L2906
+	movs	r2, #1
+.L3017:
+	movs	r1, #2
+.L3011:
+	ldrb	r0, [r7]	@ zero_extendqisi2
+	b	.L3012
+.L2906:
+	movs	r2, #16
+.L2920:
+	movs	r1, #1
+	b	.L3011
+.L2900:
+	ldr	r1, [sp, #16]
+	cmp	r6, #127
+	add	r2, r2, r1
+	uxth	r2, r2
+	str	r2, [sp, #16]
+	bhi	.L2907
+	subs	r2, r4, #2
+	cmp	r2, #13
+	bhi	.L2908
+	movs	r2, #8
+	movs	r1, #2
+	mov	r0, r3
+	bl	gc_search_src_blk
+	uxth	r0, r0
+	cmp	r0, #0
+	bne	.L2896
+.L2911:
+	ldr	r3, .L3019+24
+	ldr	fp, .L3019+36
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #2
+	ldr	r3, .L3019+16
+	bne	.L3009
+	cmp	r4, #1
+	mov	r2, #0
+	strh	r2, [fp, #30]	@ movhi
+	bls	.L2912
+.L2915:
+	ldr	r3, [r3]
+	movs	r2, #1
+	strb	r2, [r7]
+	lsls	r0, r3, #23
+	bpl	.L2914
+	ldr	r3, [r8]
+	ldr	r0, .L3019+20
+	ldrh	r1, [r3, #122]
+	str	r1, [sp, #12]
+	ldrh	r1, [r3, #120]
+	str	r1, [sp, #8]
+	movw	r1, #1411
+	ldrh	r3, [r3, #124]
+	str	r4, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r6
+	bl	printf
+.L2914:
+	ldrh	r3, [fp, #30]
+	movs	r2, #16
+	movs	r1, #1
+	ldrb	r0, [r7]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	strh	r3, [fp, #30]	@ movhi
+	movs	r3, #0
+	strh	r3, [fp, #28]	@ movhi
+	bl	gc_search_src_blk
+	uxth	r0, r0
+	cmp	r0, #7
+	bhi	.L2916
+	cmp	r4, #31
+	bls	.L2917
+.L2916:
+	ldr	r3, [r10]
+	ldrh	r2, [r3, #120]
+	ldr	r3, .L3019+28
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bls	.L2904
+.L2917:
+	ldr	r3, [sp, #16]
+	cmp	r3, #63
+	bhi	.L2918
+	movs	r2, #8
+	b	.L3017
+.L2908:
+	ldr	r3, .L3019+32
+	ldr	r2, [sp, #16]
+	ldrh	r3, [r3]
+	cmp	r2, r3, lsr #1
+	bcs	.L2911
+	b	.L2883
+.L3009:
+	cmp	r4, #1
+	bls	.L2912
+	ldrh	r2, [fp, #30]
+	cmp	r2, #3
+	bls	.L2915
+.L2912:
+	ldr	r3, [r3]
+	movs	r2, #0
+	strh	r2, [fp, #30]	@ movhi
+	strb	r2, [r7]
+	lsls	r1, r3, #23
+	bpl	.L2919
+	ldr	r3, [r8]
+	ldr	r0, .L3019+20
+	ldrh	r1, [r3, #122]
+	str	r1, [sp, #12]
+	ldrh	r1, [r3, #120]
+	str	r1, [sp, #8]
+	movw	r1, #1426
+	ldrh	r3, [r3, #124]
+	str	r4, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r6
+	bl	printf
+.L2919:
+	ldr	r3, .L3019+32
+	ldr	r2, [sp, #16]
+	ldrh	r3, [r3]
+	cmp	r2, r3, lsr #1
+	bls	.L2883
+	cmp	r4, #31
+	mov	r2, #16
+	bhi	.L2920
+	b	.L3013
+.L2918:
+	movs	r2, #16
+.L3013:
+	movs	r1, #3
+	b	.L3011
+.L2907:
+	cmp	r6, #255
+	bhi	.L2921
+	ldr	r2, .L3019+32
+	ldr	r1, [sp, #16]
+	ldrh	r2, [r2]
+	cmp	r1, r2
+	bls	.L2921
+	cmp	r1, r2, lsr #1
+	bcc	.L2883
+	movs	r2, #16
+	mov	r1, r3
+	mov	r0, fp
+	strb	fp, [r7]
+	str	r3, [sp, #16]
+	bl	gc_search_src_blk
+	uxth	r0, r0
+	cmp	r0, #7
+	bhi	.L2896
+	cmp	r4, #4
+	bls	.L2904
+	ldr	r0, [r8]
+	movs	r2, #128
+	movs	r1, #255
+	strh	fp, [r0, #120]	@ movhi
+	adds	r0, r0, #136
+	bl	ftl_memset
+	ldr	r3, [sp, #16]
+	strb	r3, [r7]
+	ldr	r3, [r10]
+	ldrh	r2, [r3, #120]
+	ldr	r3, .L3019+28
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bls	.L2923
+	cmp	r4, #16
+	bls	.L2924
+.L2926:
+	movs	r2, #8
+	movs	r1, #2
+.L3010:
+	movs	r0, #1
+	bl	gc_search_src_blk
+	movs	r3, #1
+	uxth	r0, r0
+	strb	r3, [r5]
+	b	.L2904
+.L3020:
+	.align	2
+.L3019:
+	.word	.LANCHOR46
+	.word	.LANCHOR104
+	.word	.LANCHOR60
+	.word	.LANCHOR67
+	.word	.LANCHOR22
+	.word	.LC153
+	.word	.LANCHOR64
+	.word	.LANCHOR163
+	.word	.LANCHOR165
+	.word	.LANCHOR59
+.L2923:
+	cmp	r4, #32
+	bls	.L2924
+	movs	r2, #16
+	movs	r1, #1
+	b	.L3010
+.L2924:
+	cmp	r4, #7
+	bls	.L2926
+	movs	r2, #16
+	movs	r1, #3
+	b	.L3010
+.L2921:
+	subs	r4, r4, #2
+	cmp	r4, #5
+	bhi	.L2883
+	ldr	r3, .L3021
+	ldr	r2, [sp, #16]
+	ldrh	r3, [r3]
+	cmp	r2, r3, lsr #1
+	bls	.L2883
+	movs	r2, #16
+	movs	r1, #2
+	movs	r0, #1
+	bl	gc_search_src_blk
+	uxth	r0, r0
+	cmp	r0, #15
+	bhi	.L2896
+	ldrb	r0, [r7]	@ zero_extendqisi2
+	movs	r1, #0
+	ldr	r3, [r8]
+	add	r2, r0, #60
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	movs	r2, #128
+	mla	r0, r2, r0, r3
+	movs	r1, #255
+	adds	r0, r0, #136
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	ftl_memset
+.L2887:
+	ldr	r4, .L3021+4
+	movw	r3, #65535
+	ldrh	r2, [r4]
+	cmp	r2, r3
+	bne	.L2928
+	bl	gc_get_src_blk
+	strh	r0, [r4]	@ movhi
+.L2928:
+	ldrh	r3, [r4]
+	movw	r2, #65535
+	cmp	r3, r2
+	beq	.L2929
+	ldrh	r1, [r4, #52]
+	cbz	r1, .L2930
+	ldr	r0, .L3021+8
+	movs	r2, #0
+.L2931:
+	uxth	r4, r2
+	cmp	r1, r4
+	bhi	.L2932
+.L2930:
+	ldr	r2, .L3021+12
+	ldr	r2, [r2]
+	add	r2, r2, r3, lsl #2
+	ldrb	r2, [r2, #2]	@ zero_extendqisi2
+	and	r1, r2, #224
+	cmp	r1, #224
+	beq	.L2933
+	tst	r2, #192
+	bne	.L2934
+.L2933:
+	ldr	r2, .L3021+16
+	ldr	r2, [r2]
+	ldrh	r3, [r2, r3, lsl #1]
+	cbz	r3, .L2935
+	movw	r2, #1497
+	ldr	r1, .L3021+20
+	ldr	r0, .L3021+24
+	bl	printf
+.L2936:
+	b	.L2936
+.L2932:
+	ldrh	r4, [r0, #2]!
+	adds	r2, r2, #1
+	cmp	r4, r3
+	bne	.L2931
+.L2935:
+	ldr	r3, .L3021+4
+	movw	r2, #65535
+	strh	r2, [r3]	@ movhi
+	b	.L2883
+.L2934:
+	movs	r3, #2
+	b	.L3014
+.L2929:
+	movs	r3, #0
+	b	.L3014
+.L2888:
+	bl	gc_scan_src_blk
+	adds	r0, r0, #1
+	bne	.L2937
+	movs	r3, #3
+	b	.L3014
+.L2937:
+	ldr	r4, .L3021+4
+	movw	r3, #65535
+	ldrh	r0, [r4]
+	cmp	r0, r3
+	beq	.L2896
+	ldrh	r3, [r4, #20]
+	cbz	r3, .L2938
+	movs	r3, #4
+	strb	r3, [r5]
+	movs	r3, #0
+	strh	r3, [r4, #22]	@ movhi
+	b	.L2883
+.L2938:
+	ldr	r6, .L3021+16
+	movs	r3, #1
+	strb	r3, [r5]
+	ldr	r3, [r6]
+	ldrh	r5, [r3, r0, lsl #1]
+	cbz	r5, .L2939
+	movw	r2, #1525
+	ldr	r1, .L3021+20
+	ldr	r0, .L3021+24
+	bl	printf
+.L2940:
+	b	.L2940
+.L2939:
+	bl	ftl_free_sblk
+	ldr	r3, [r6]
+	ldrh	r2, [r4]
+	strh	r5, [r3, r2, lsl #1]	@ movhi
+	ldrh	r3, [r4, #26]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	cmp	r3, #8
+	strh	r3, [r4, #26]	@ movhi
+	bls	.L2935
+	strh	r5, [r4, #26]	@ movhi
+	bl	ftl_flush
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	mov	r0, r5
+	bl	ftl_info_flush
+	b	.L2935
+.L2889:
+	bl	gc_scan_src_blk_one_page
+	ldr	r4, .L3021+4
+	ldr	r3, .L3021+28
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L2883
+	ldrh	r3, [r4, #20]
+	ldr	r2, .L3021+32
+	cbz	r3, .L2941
+	ldr	r2, [r2]
+	movs	r1, #4
+	strb	r1, [r5]
+	movs	r1, #0
+	strh	r1, [r4, #22]	@ movhi
+	tst	r2, #256
+	ldr	r5, .L3021+16
+	beq	.L2942
+	ldrh	r1, [r4]
+	ldr	r2, [r5]
+	ldr	r0, .L3021+36
+	ldrh	r2, [r2, r1, lsl #1]
+	bl	printf
+.L2942:
+	ldr	r3, [r5]
+	ldrh	r2, [r4]
+	ldrh	r2, [r3, r2, lsl #1]
+	ldrh	r3, [r4, #20]
+	cmp	r2, r3
+	beq	.L2883
+	movw	r2, #1555
+	ldr	r1, .L3021+20
+	ldr	r0, .L3021+24
+	bl	printf
+.L2943:
+	b	.L2943
+.L2941:
+	ldr	r3, .L3021+12
+	ldrh	r1, [r4]
+	ldr	r6, [r3]
+	movs	r3, #1
+	strb	r3, [r5]
+	ldr	r3, [r2]
+	add	r6, r6, r1, lsl #2
+	lsls	r2, r3, #23
+	bpl	.L2944
+	ldrb	r2, [r6, #2]	@ zero_extendqisi2
+	ldr	r0, .L3021+40
+	lsrs	r2, r2, #5
+	bl	printf
+.L2944:
+	ldrb	r3, [r6, #2]	@ zero_extendqisi2
+	and	r2, r3, #224
+	cmp	r2, #224
+	beq	.L2945
+	tst	r3, #192
+	bne	.L2946
+.L2945:
+	movw	r2, #1565
+	ldr	r1, .L3021+20
+	ldr	r0, .L3021+24
+	bl	printf
+.L2947:
+	b	.L2947
+.L2946:
+	ldrh	r0, [r4]
+	bl	ftl_free_sblk
+	movw	r3, #65535
+	strh	r3, [r4]	@ movhi
+	ldrh	r3, [r4, #26]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	cmp	r3, #8
+	strh	r3, [r4, #26]	@ movhi
+	bls	.L2883
+	movs	r3, #0
+	strh	r3, [r4, #26]	@ movhi
+.L3016:
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	flt_sys_flush
+.L2890:
+	ldrh	r7, [fp, #80]
+	movw	r3, #65535
+	cmp	r7, r3
+	bne	.L2948
+	ldr	r3, .L3021+44
+	ldrb	r4, [r3]	@ zero_extendqisi2
+	cmp	r4, #1
+	bne	.L2948
+	bl	ftl_flush
+	movs	r0, #5
+	bl	ftl_alloc_sblk
+	cmp	r0, r7
+	mov	r5, r0
+	bne	.L2949
+	movw	r2, #1581
+	ldr	r1, .L3021+20
+	ldr	r0, .L3021+24
+	bl	printf
+.L2950:
+	b	.L2950
+.L2949:
+	mov	r1, r4
+	movs	r4, #0
+	bl	ftl_erase_sblk
+	movs	r3, #5
+	add	r1, fp, #96
+	strb	r3, [fp, #84]
+	mov	r0, r5
+	bl	ftl_get_blk_list_in_sblk
+	ldr	r3, .L3021+28
+	uxtb	r0, r0
+	ldr	r6, .L3021+48
+	movs	r1, #255
+	strb	r0, [fp, #89]
+	ldrh	r3, [r3]
+	strh	r5, [fp, #80]	@ movhi
+	strh	r4, [fp, #82]	@ movhi
+	strb	r4, [fp, #85]
+	smulbb	r0, r3, r0
+	strh	r4, [fp, #90]	@ movhi
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	strh	r0, [fp, #86]	@ movhi
+	ldr	fp, .L3021+64
+	ldrh	r3, [fp]
+	muls	r2, r3, r2
+	ldr	r3, .L3021+52
+	ldr	r0, [r3]
+	lsls	r2, r2, #2
+	bl	ftl_memset
+	ldrh	r3, [fp]
+	movs	r1, #255
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	muls	r2, r3, r2
+	ldr	r3, .L3021+56
+	ldr	r0, [r3]
+	lsls	r2, r2, #2
+	bl	ftl_memset
+	ldrh	r3, [fp]
+	movs	r1, #255
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	muls	r2, r3, r2
+	ldr	r3, .L3021+60
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldr	r3, [r8]
+	strh	r7, [r3, #128]	@ movhi
+	strh	r7, [r3, #130]	@ movhi
+	str	r5, [r3, #132]
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	ldr	r3, [r10]
+	mov	r2, #-1
+	mov	r0, r4
+	strh	r5, [r3, #126]	@ movhi
+	ldr	r3, .L3021+4
+	strh	r4, [r3, #310]	@ movhi
+	strh	r4, [r3, #52]	@ movhi
+	strh	r4, [r3, #312]	@ movhi
+	strh	r4, [r3, #314]	@ movhi
+	str	r2, [r3, #316]
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	ftl_info_flush
+.L3022:
+	.align	2
+.L3021:
+	.word	.LANCHOR165
+	.word	.LANCHOR59
+	.word	.LANCHOR59+52
+	.word	.LANCHOR57
+	.word	.LANCHOR56
+	.word	.LANCHOR172
+	.word	.LC0
+	.word	.LANCHOR79
+	.word	.LANCHOR22
+	.word	.LC154
+	.word	.LC155
+	.word	.LANCHOR67
+	.word	.LANCHOR69
+	.word	.LANCHOR107
+	.word	.LANCHOR108
+	.word	.LANCHOR65
+	.word	.LANCHOR68
+.L2948:
+	cmp	r6, #31
+	bls	.L2968
+	cmp	r6, #63
+	bls	.L2969
+	cmp	r6, #127
+	bls	.L2970
+	cmp	r6, #255
+	ite	hi
+	movhi	r6, #1
+	movls	r6, #2
+.L2951:
+	ldr	r7, .L3023
+	ldr	r4, .L3023+4
+.L2952:
+	subs	r6, r6, #1
+	uxtb	r6, r6
+	cmp	r6, #255
+	beq	.L2883
+	bl	gc_do_copy_back
+	ldrb	r3, [r7]	@ zero_extendqisi2
+	cbnz	r3, .L2953
+	ldr	r3, .L3023+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #3
+	bhi	.L2954
+	bl	ftl_write_commit
+.L2954:
+	ldrh	r2, [r4, #22]
+	ldrh	r3, [r4, #20]
+	cmp	r2, r3
+	bcc	.L2952
+	movs	r3, #1
+	strb	r3, [r5]
+	bl	ftl_write_commit
+	bl	ftl_flush
+	ldr	r3, .L3023+12
+	ldrh	r0, [r4]
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r0, lsl #1]
+	cbz	r3, .L2956
+	movw	r2, #1638
+	ldr	r1, .L3023+16
+	ldr	r0, .L3023+20
+	bl	printf
+.L2957:
+	b	.L2957
+.L2968:
+	movs	r6, #9
+	b	.L2951
+.L2969:
+	movs	r6, #5
+	b	.L2951
+.L2970:
+	movs	r6, #3
+	b	.L2951
+.L2956:
+	bl	ftl_free_sblk
+.L3015:
+	movw	r3, #65535
+	strh	r3, [r4]	@ movhi
+	b	.L2883
+.L2953:
+	ldrh	r3, [r4, #314]
+	cbz	r3, .L2958
+	ldr	r0, [r4, #316]
+	movs	r6, #0
+	strh	r6, [r4, #314]	@ movhi
+	adds	r3, r0, #1
+	beq	.L2959
+	bl	ftl_mask_bad_block
+.L2959:
+	ldr	r3, [r8]
+	str	r6, [r4, #316]
+	strh	r6, [r4, #52]	@ movhi
+	ldrh	r0, [r3, #80]
+	bl	ftl_free_sblk
+	ldr	r0, [r4, #8]
+	movw	r3, #65535
+	ldr	r2, [r8]
+	ldr	r1, [r10]
+	strh	r3, [r2, #80]	@ movhi
+	strh	r3, [r1, #126]	@ movhi
+	strh	r3, [r2, #130]	@ movhi
+	cbz	r0, .L2960
+	bl	buf_free
+.L2960:
+	movs	r6, #0
+	str	r6, [r4, #8]
+	bl	flt_sys_flush
+	movw	r2, #1671
+	ldr	r1, .L3023+16
+	ldr	r0, .L3023+20
+	strb	r6, [r5]
+	bl	printf
+.L2961:
+	b	.L2961
+.L2958:
+	ldrh	r3, [fp, #86]
+	ldrh	r2, [r4, #22]
+	cmp	r3, #1
+	ldrh	r3, [r4, #20]
+	bls	.L2962
+	cmp	r2, r3
+	bcc	.L2952
+	movs	r3, #1
+	strb	r3, [r5]
+	ldrh	r3, [r4, #52]
+	adds	r2, r3, #1
+	strh	r2, [r4, #52]	@ movhi
+	add	r3, r4, r3, lsl #1
+	ldrh	r2, [r4]
+	strh	r2, [r3, #54]	@ movhi
+	b	.L3015
+.L2962:
+	cmp	r2, r3
+	mov	r1, #5
+	strb	r1, [r5]
+	bcc	.L2963
+	ldrh	r3, [r4, #52]
+	adds	r2, r3, #1
+	strh	r2, [r4, #52]	@ movhi
+	add	r3, r4, r3, lsl #1
+	ldrh	r2, [r4]
+	strh	r2, [r3, #54]	@ movhi
+	movw	r3, #65535
+	strh	r3, [r4]	@ movhi
+.L2963:
+	bl	ftl_flush
+	bl	sblk_wait_write_queue_completed
+	bl	gc_write_completed
+	ldr	r3, [r8]
+	ldrh	r2, [fp, #80]
+	strh	r2, [r3, #128]	@ movhi
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	movs	r3, #0
+	ldr	r2, .L3023+24
+	strh	r3, [r4, #12]	@ movhi
+	ldr	r3, .L3023+28
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	cmp	r2, #2
+	strh	r2, [r4, #16]	@ movhi
+	strh	r3, [r4, #14]	@ movhi
+	itttt	eq
+	lsleq	r3, r3, #1
+	strheq	r3, [r4, #14]	@ movhi
+	moveq	r3, #1
+	strheq	r3, [r4, #16]	@ movhi
+	movs	r3, #0
+	strh	r3, [r4, #18]	@ movhi
+	b	.L2883
+.L2891:
+	bl	gc_check_data_one_wl
+	ldr	r4, .L3023+4
+	mov	r6, r0
+	cbz	r0, .L2966
+	ldr	r3, [r7]
+	movs	r6, #0
+	strh	r6, [r4, #52]	@ movhi
+	ldrh	r0, [r3, #80]
+	bl	ftl_free_sblk
+	ldr	r2, [r7]
+	movw	r3, #65535
+	ldr	r1, [r10]
+	ldr	r0, [r4, #8]
+	strh	r3, [r2, #80]	@ movhi
+	strh	r3, [r1, #126]	@ movhi
+	strh	r3, [r2, #130]	@ movhi
+	bl	buf_free
+	str	r6, [r4, #8]
+	strb	r6, [r5]
+	b	.L3016
+.L2966:
+	ldrh	r2, [r4, #12]
+	ldrh	r3, [r4, #14]
+	cmp	r2, r3
+	bcc	.L2883
+	movs	r3, #6
+	ldr	r0, [r4, #8]
+	strb	r3, [r5]
+	bl	buf_free
+	str	r6, [r4, #8]
+	b	.L2883
+.L2892:
+	movw	r4, #65535
+	bl	gc_update_l2p_map_new
+	bl	gc_free_src_blk
+	bl	ftl_flush
+	bl	pm_flush
+	strh	r4, [fp, #80]	@ movhi
+	bl	ftl_ext_info_flush
+	ldr	r3, [r10]
+	movs	r0, #0
+	strh	r4, [r3, #126]	@ movhi
+	bl	ftl_info_flush
+	movs	r3, #0
+	strb	r3, [r5]
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	print_ftl_debug_info
+.L3024:
+	.align	2
+.L3023:
+	.word	.LANCHOR67
+	.word	.LANCHOR59
+	.word	.LANCHOR38
+	.word	.LANCHOR56
+	.word	.LANCHOR172
+	.word	.LC0
+	.word	.LANCHOR64
+	.word	.LANCHOR79
+	.size	do_gc, .-do_gc
+	.section	.text.ftl_write,"ax",%progbits
+	.align	1
+	.global	ftl_write
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_write, %function
+ftl_write:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r7, r2
+	mov	r10, r3
+	cbnz	r0, .L3026
+	mov	r0, #24576
+	ldr	r3, .L3039
+	ldr	r3, [r3]
+.L3027:
+	adds	r2, r1, r7
+	cmp	r3, r2
+	bcc	.L3038
+	ldr	fp, .L3039+8
+	adds	r5, r0, r1
+	mov	r0, r5
+	ldrb	r4, [fp]	@ zero_extendqisi2
+	mov	r1, r4
+	bl	__aeabi_uidiv
+	mov	r8, r0
+	subs	r0, r7, #1
+	mov	r1, r4
+	add	r0, r0, r5
+	bl	__aeabi_uidiv
+	sub	r4, r0, r8
+	mov	r6, r8
+	adds	r4, r4, #1
+	str	r0, [sp, #4]
+	str	fp, [sp, #8]
+.L3029:
+	cbnz	r4, .L3036
+	bl	ftl_write_commit
+	mov	r0, r4
+	movs	r1, #1
+	bl	do_gc
+	mov	r0, r4
+.L3025:
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3026:
+	cmp	r0, #3
+	bhi	.L3038
+	lsls	r0, r0, #13
+	mov	r3, #8192
+	b	.L3027
+.L3036:
+	movs	r0, #0
+	bl	buf_alloc
+	mov	fp, r0
+	cbnz	r0, .L3030
+	bl	ftl_write_commit
+	b	.L3029
+.L3030:
+	mov	r3, #0
+	cmp	r6, r8
+	strb	r3, [r0, #41]
+	ldr	r3, [sp, #8]
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	strb	r2, [r0, #40]
+	bne	.L3032
+	mov	r1, r2
+	mov	r0, r5
+	str	r2, [sp, #12]
+	bl	__aeabi_uidivmod
+	ldr	r2, [sp, #12]
+	uxtb	r1, r1
+	strb	r1, [fp, #41]
+	subs	r1, r2, r1
+	uxtb	r1, r1
+	cmp	r7, r1
+	ite	cs
+	strbcs	r1, [fp, #40]
+	strbcc	r7, [fp, #40]
+.L3034:
+	ldrb	ip, [fp, #41]	@ zero_extendqisi2
+	mov	r1, r10
+	ldrb	r2, [fp, #40]	@ zero_extendqisi2
+	subs	r4, r4, #1
+	ldr	r0, [fp, #4]
+	lsls	r2, r2, #9
+	add	r0, r0, ip, lsl #9
+	bl	ftl_memcpy
+	ldr	r3, .L3039+4
+	str	r6, [fp, #20]
+	adds	r6, r6, #1
+	ldr	r1, [r3]
+	ldr	r2, [r1, #8]
+	adds	r0, r2, #1
+	str	r0, [r1, #8]
+	mov	r0, fp
+	str	r2, [fp, #16]
+	bl	ftl_write_buf
+	ldrb	r3, [fp, #40]	@ zero_extendqisi2
+	add	r10, r10, r3, lsl #9
+	b	.L3029
+.L3032:
+	ldr	r3, [sp, #4]
+	cmp	r6, r3
+	itttt	eq
+	smulbbeq	r2, r6, r2
+	addeq	r1, r5, r7
+	subeq	r2, r1, r2
+	strbeq	r2, [r0, #40]
+	b	.L3034
+.L3038:
+	mov	r0, #-1
+	b	.L3025
+.L3040:
+	.align	2
+.L3039:
+	.word	.LANCHOR52
+	.word	.LANCHOR46
+	.word	.LANCHOR45
+	.size	ftl_write, .-ftl_write
+	.section	.text.FtlWrite,"ax",%progbits
+	.align	1
+	.global	FtlWrite
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlWrite, %function
+FtlWrite:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	ftl_write
+	.size	FtlWrite, .-FtlWrite
+	.section	.text.StorageSysDataStore,"ax",%progbits
+	.align	1
+	.global	StorageSysDataStore
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	StorageSysDataStore, %function
+StorageSysDataStore:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r3, r1
+	movs	r2, #1
+	mov	r1, r0
+	movs	r0, #2
+	b	ftl_write
+	.size	StorageSysDataStore, .-StorageSysDataStore
+	.global	g_pm_spare
+	.global	pm_gc_enable
+	.global	pm_last_load_ram_id
+	.global	pm_last_update_ram_id
+	.global	pm_ram_info
+	.global	sblk_gc_write_completed_queue_head
+	.global	sblk_read_completed_queue_head
+	.global	sblk_write_completed_queue_head
+	.global	sblk_queue_head
+	.global	ftl_low_format_cur_blk
+	.global	ftl_power_lost_flag
+	.global	ftl_vpn_update_count
+	.global	ftl_sblk_vpn_update_id
+	.global	ftl_sblk_lpa_tbl
+	.global	ftl_sblk_vpn
+	.global	gp_ftl_ext_info
+	.global	gp_ftl_info
+	.global	gp_blk_info
+	.global	ftl_tmp_spare
+	.global	ftl_info_spare
+	.global	ftl_ext_info_data_buffer
+	.global	ftl_info_data_buffer
+	.global	ftl_tmp_buffer
+	.global	g_ftl_info_blk
+	.global	tlc_prog_order
+	.global	gc_des_ppa_tbl
+	.global	gc_valid_page_ppa
+	.global	gc_page_buf_id
+	.global	gc_pre_ppa_tbl
+	.global	gc_lpa_tbl
+	.global	g_gc_info
+	.global	gc_slc_mode_vpn_th
+	.global	gc_tlc_mode_tlc_vpn_th
+	.global	gc_tlc_mode_slc_vpn_th
+	.global	gc_state
+	.global	gc_mode
+	.global	check_vpc_tbl
+	.global	p_read_ahead_ext_buf
+	.global	read_ahead_lpa
+	.global	write_commit_count
+	.global	write_commit_head
+	.global	write_buf_count
+	.global	write_buf_head
+	.global	ftl_flush_jiffies
+	.global	lpa_hash
+	.global	lpa_hash_index
+	.global	_min_slc_super_block
+	.global	_max_slc_super_block
+	.global	_max_xlc_super_block
+	.global	_c_max_pm_sblk
+	.global	_c_ftl_pm_page_num
+	.global	_c_totle_log_page
+	.global	_c_totle_data_density
+	.global	_c_user_data_density
+	.global	_c_totle_phy_density
+	.global	_c_ftl_block_addr_log2
+	.global	_c_ftl_block_align_addr
+	.global	_c_ftl_byte_pre_page
+	.global	_c_ftl_nand_blks_per_die
+	.global	_c_ftl_page_pre_slc_blk
+	.global	_c_ftl_page_pre_blk
+	.global	_c_ftl_blk_pre_plane
+	.global	_c_ftl_nand_planes_num
+	.global	_c_ftl_planes_per_die
+	.global	_c_ftl_sec_per_page
+	.global	_c_ftl_nand_die_num
+	.global	_c_ftl_nand_type
+	.global	zftl_debug
+	.global	g_flash_blk_info
+	.global	gp_flash_info
+	.global	p_free_buf_head
+	.global	free_buf_count
+	.global	g_buf
+	.global	g_nandc_v6_master_info
+	.global	nandc_randomizer_en
+	.global	nandc_hw_seed
+	.global	fill_spare_size
+	.global	g_nandc_ecc_bits
+	.global	g_nandc_ver
+	.global	gp_nandc
+	.global	hy_f26_ref_value
+	.global	sd15_tlc_rr
+	.global	sd15_slc_rr
+	.global	gNandParaInfo
+	.global	NandFlashParaTbl
+	.global	gpNandParaInfo
+	.global	gNandOptPara
+	.global	g_msb_page_tbl
+	.global	g_lsb_page_tbl
+	.global	g_die_addr
+	.global	g_die_cs_idx
+	.global	IDByte
+	.global	flash_read_retry
+	.global	g_maxRetryCount
+	.global	g_maxRegNum
+	.global	g_retryMode
+	.global	g_flash_toggle_mode_en
+	.global	g_flash_3d_mlc_flag
+	.global	g_flash_3d_tlc_flag
+	.global	g_flash_multi_page_prog_en
+	.global	g_flash_multi_page_read_en
+	.global	g_flash_interface_mode
+	.global	g_idb_ecc_bits
+	.global	g_idb_slc_mode_enable
+	.global	g_slc_mode_addr2
+	.global	g_slc_mode_enable
+	.global	g_flash_cur_mode
+	.global	g_flash_slc_mode
+	.global	g_slc_page_num
+	.global	g_totle_phy_block
+	.global	g_block_align_addr
+	.global	g_flash_reversd_blks
+	.global	g_nand_max_die
+	.global	g_flash_tmp_spare_buffer
+	.global	g_flash_tmp_page_buffer
+	.global	g_flash_sys_spare_buffer
+	.global	g_flash_spare_buffer
+	.global	g_flash_page_buffer
+	.section	.bss.IDByte,"aw",%nobits
+	.align	2
+	.set	.LANCHOR26,. + 0
+	.type	IDByte, %object
+	.size	IDByte, 32
+IDByte:
+	.space	32
+	.section	.bss._c_ftl_blk_pre_plane,"aw",%nobits
+	.align	1
+	.set	.LANCHOR54,. + 0
+	.type	_c_ftl_blk_pre_plane, %object
+	.size	_c_ftl_blk_pre_plane, 2
+_c_ftl_blk_pre_plane:
+	.space	2
+	.section	.bss._c_ftl_block_addr_log2,"aw",%nobits
+	.align	1
+	.set	.LANCHOR71,. + 0
+	.type	_c_ftl_block_addr_log2, %object
+	.size	_c_ftl_block_addr_log2, 2
+_c_ftl_block_addr_log2:
+	.space	2
+	.section	.bss._c_ftl_block_align_addr,"aw",%nobits
+	.align	1
+	.set	.LANCHOR75,. + 0
+	.type	_c_ftl_block_align_addr, %object
+	.size	_c_ftl_block_align_addr, 2
+_c_ftl_block_align_addr:
+	.space	2
+	.section	.bss._c_ftl_byte_pre_page,"aw",%nobits
+	.align	1
+	.set	.LANCHOR149,. + 0
+	.type	_c_ftl_byte_pre_page, %object
+	.size	_c_ftl_byte_pre_page, 2
+_c_ftl_byte_pre_page:
+	.space	2
+	.section	.bss._c_ftl_nand_blks_per_die,"aw",%nobits
+	.align	1
+	.type	_c_ftl_nand_blks_per_die, %object
+	.size	_c_ftl_nand_blks_per_die, 2
+_c_ftl_nand_blks_per_die:
+	.space	2
+	.section	.bss._c_ftl_nand_die_num,"aw",%nobits
+	.set	.LANCHOR76,. + 0
+	.type	_c_ftl_nand_die_num, %object
+	.size	_c_ftl_nand_die_num, 1
+_c_ftl_nand_die_num:
+	.space	1
+	.section	.bss._c_ftl_nand_planes_num,"aw",%nobits
+	.set	.LANCHOR69,. + 0
+	.type	_c_ftl_nand_planes_num, %object
+	.size	_c_ftl_nand_planes_num, 1
+_c_ftl_nand_planes_num:
+	.space	1
+	.section	.bss._c_ftl_nand_type,"aw",%nobits
+	.set	.LANCHOR64,. + 0
+	.type	_c_ftl_nand_type, %object
+	.size	_c_ftl_nand_type, 1
+_c_ftl_nand_type:
+	.space	1
+	.section	.bss._c_ftl_page_pre_blk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR68,. + 0
+	.type	_c_ftl_page_pre_blk, %object
+	.size	_c_ftl_page_pre_blk, 2
+_c_ftl_page_pre_blk:
+	.space	2
+	.section	.bss._c_ftl_page_pre_slc_blk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR79,. + 0
+	.type	_c_ftl_page_pre_slc_blk, %object
+	.size	_c_ftl_page_pre_slc_blk, 2
+_c_ftl_page_pre_slc_blk:
+	.space	2
+	.section	.bss._c_ftl_planes_per_die,"aw",%nobits
+	.set	.LANCHOR70,. + 0
+	.type	_c_ftl_planes_per_die, %object
+	.size	_c_ftl_planes_per_die, 1
+_c_ftl_planes_per_die:
+	.space	1
+	.section	.bss._c_ftl_pm_page_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR137,. + 0
+	.type	_c_ftl_pm_page_num, %object
+	.size	_c_ftl_pm_page_num, 2
+_c_ftl_pm_page_num:
+	.space	2
+	.section	.bss._c_ftl_sec_per_page,"aw",%nobits
+	.set	.LANCHOR45,. + 0
+	.type	_c_ftl_sec_per_page, %object
+	.size	_c_ftl_sec_per_page, 1
+_c_ftl_sec_per_page:
+	.space	1
+	.section	.bss._c_max_pm_sblk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR101,. + 0
+	.type	_c_max_pm_sblk, %object
+	.size	_c_max_pm_sblk, 2
+_c_max_pm_sblk:
+	.space	2
+	.section	.bss._c_totle_data_density,"aw",%nobits
+	.align	2
+	.set	.LANCHOR162,. + 0
+	.type	_c_totle_data_density, %object
+	.size	_c_totle_data_density, 4
+_c_totle_data_density:
+	.space	4
+	.section	.bss._c_totle_log_page,"aw",%nobits
+	.align	2
+	.set	.LANCHOR47,. + 0
+	.type	_c_totle_log_page, %object
+	.size	_c_totle_log_page, 4
+_c_totle_log_page:
+	.space	4
+	.section	.bss._c_totle_phy_density,"aw",%nobits
+	.align	2
+	.set	.LANCHOR161,. + 0
+	.type	_c_totle_phy_density, %object
+	.size	_c_totle_phy_density, 4
+_c_totle_phy_density:
+	.space	4
+	.section	.bss._c_user_data_density,"aw",%nobits
+	.align	2
+	.set	.LANCHOR52,. + 0
+	.type	_c_user_data_density, %object
+	.size	_c_user_data_density, 4
+_c_user_data_density:
+	.space	4
+	.section	.bss._max_slc_super_block,"aw",%nobits
+	.align	1
+	.set	.LANCHOR164,. + 0
+	.type	_max_slc_super_block, %object
+	.size	_max_slc_super_block, 2
+_max_slc_super_block:
+	.space	2
+	.section	.bss._max_xlc_super_block,"aw",%nobits
+	.align	1
+	.set	.LANCHOR163,. + 0
+	.type	_max_xlc_super_block, %object
+	.size	_max_xlc_super_block, 2
+_max_xlc_super_block:
+	.space	2
+	.section	.bss._min_slc_super_block,"aw",%nobits
+	.align	1
+	.set	.LANCHOR165,. + 0
+	.type	_min_slc_super_block, %object
+	.size	_min_slc_super_block, 2
+_min_slc_super_block:
+	.space	2
+	.section	.bss.check_vpc_tbl,"aw",%nobits
+	.align	1
+	.type	check_vpc_tbl, %object
+	.size	check_vpc_tbl, 4352
+check_vpc_tbl:
+	.space	4352
+	.section	.bss.fill_spare_size,"aw",%nobits
+	.align	1
+	.set	.LANCHOR31,. + 0
+	.type	fill_spare_size, %object
+	.size	fill_spare_size, 2
+fill_spare_size:
+	.space	2
+	.section	.bss.flash_read_retry,"aw",%nobits
+	.align	2
+	.set	.LANCHOR115,. + 0
+	.type	flash_read_retry, %object
+	.size	flash_read_retry, 4
+flash_read_retry:
+	.space	4
+	.section	.bss.free_buf_count,"aw",%nobits
+	.set	.LANCHOR38,. + 0
+	.type	free_buf_count, %object
+	.size	free_buf_count, 1
+free_buf_count:
+	.space	1
+	.section	.bss.ftl_ext_info_data_buffer,"aw",%nobits
+	.align	6
+	.type	ftl_ext_info_data_buffer, %object
+	.size	ftl_ext_info_data_buffer, 16384
+ftl_ext_info_data_buffer:
+	.space	16384
+	.section	.bss.ftl_flush_jiffies,"aw",%nobits
+	.align	2
+	.set	.LANCHOR168,. + 0
+	.type	ftl_flush_jiffies, %object
+	.size	ftl_flush_jiffies, 4
+ftl_flush_jiffies:
+	.space	4
+	.section	.bss.ftl_info_data_buffer,"aw",%nobits
+	.align	6
+	.type	ftl_info_data_buffer, %object
+	.size	ftl_info_data_buffer, 16384
+ftl_info_data_buffer:
+	.space	16384
+	.section	.bss.ftl_info_spare,"aw",%nobits
+	.align	6
+	.set	.LANCHOR130,. + 0
+	.type	ftl_info_spare, %object
+	.size	ftl_info_spare, 256
+ftl_info_spare:
+	.space	256
+	.section	.bss.ftl_low_format_cur_blk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR53,. + 0
+	.type	ftl_low_format_cur_blk, %object
+	.size	ftl_low_format_cur_blk, 2
+ftl_low_format_cur_blk:
+	.space	2
+	.section	.bss.ftl_power_lost_flag,"aw",%nobits
+	.set	.LANCHOR133,. + 0
+	.type	ftl_power_lost_flag, %object
+	.size	ftl_power_lost_flag, 1
+ftl_power_lost_flag:
+	.space	1
+	.section	.bss.ftl_sblk_lpa_tbl,"aw",%nobits
+	.align	2
+	.set	.LANCHOR82,. + 0
+	.type	ftl_sblk_lpa_tbl, %object
+	.size	ftl_sblk_lpa_tbl, 4
+ftl_sblk_lpa_tbl:
+	.space	4
+	.section	.bss.ftl_sblk_vpn,"aw",%nobits
+	.align	2
+	.set	.LANCHOR56,. + 0
+	.type	ftl_sblk_vpn, %object
+	.size	ftl_sblk_vpn, 4
+ftl_sblk_vpn:
+	.space	4
+	.section	.bss.ftl_sblk_vpn_update_id,"aw",%nobits
+	.align	1
+	.set	.LANCHOR87,. + 0
+	.type	ftl_sblk_vpn_update_id, %object
+	.size	ftl_sblk_vpn_update_id, 2
+ftl_sblk_vpn_update_id:
+	.space	2
+	.section	.bss.ftl_tmp_buffer,"aw",%nobits
+	.align	6
+	.type	ftl_tmp_buffer, %object
+	.size	ftl_tmp_buffer, 16384
+ftl_tmp_buffer:
+	.space	16384
+	.section	.bss.ftl_tmp_spare,"aw",%nobits
+	.align	6
+	.set	.LANCHOR121,. + 0
+	.type	ftl_tmp_spare, %object
+	.size	ftl_tmp_spare, 256
+ftl_tmp_spare:
+	.space	256
+	.section	.bss.ftl_vpn_update_count,"aw",%nobits
+	.align	1
+	.set	.LANCHOR86,. + 0
+	.type	ftl_vpn_update_count, %object
+	.size	ftl_vpn_update_count, 2
+ftl_vpn_update_count:
+	.space	2
+	.section	.bss.gNandOptPara,"aw",%nobits
+	.set	.LANCHOR103,. + 0
+	.type	gNandOptPara, %object
+	.size	gNandOptPara, 32
+gNandOptPara:
+	.space	32
+	.section	.bss.g_block_align_addr,"aw",%nobits
+	.align	1
+	.set	.LANCHOR13,. + 0
+	.type	g_block_align_addr, %object
+	.size	g_block_align_addr, 2
+g_block_align_addr:
+	.space	2
+	.section	.bss.g_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR36,. + 0
+	.type	g_buf, %object
+	.size	g_buf, 1536
+g_buf:
+	.space	1536
+	.section	.bss.g_die_addr,"aw",%nobits
+	.align	2
+	.set	.LANCHOR98,. + 0
+	.type	g_die_addr, %object
+	.size	g_die_addr, 32
+g_die_addr:
+	.space	32
+	.section	.bss.g_die_cs_idx,"aw",%nobits
+	.align	2
+	.set	.LANCHOR10,. + 0
+	.type	g_die_cs_idx, %object
+	.size	g_die_cs_idx, 8
+g_die_cs_idx:
+	.space	8
+	.section	.bss.g_flash_3d_mlc_flag,"aw",%nobits
+	.set	.LANCHOR74,. + 0
+	.type	g_flash_3d_mlc_flag, %object
+	.size	g_flash_3d_mlc_flag, 1
+g_flash_3d_mlc_flag:
+	.space	1
+	.section	.bss.g_flash_3d_tlc_flag,"aw",%nobits
+	.set	.LANCHOR66,. + 0
+	.type	g_flash_3d_tlc_flag, %object
+	.size	g_flash_3d_tlc_flag, 1
+g_flash_3d_tlc_flag:
+	.space	1
+	.section	.bss.g_flash_blk_info,"aw",%nobits
+	.align	1
+	.set	.LANCHOR117,. + 0
+	.type	g_flash_blk_info, %object
+	.size	g_flash_blk_info, 4
+g_flash_blk_info:
+	.space	4
+	.section	.bss.g_flash_cur_mode,"aw",%nobits
+	.set	.LANCHOR20,. + 0
+	.type	g_flash_cur_mode, %object
+	.size	g_flash_cur_mode, 1
+g_flash_cur_mode:
+	.space	1
+	.section	.bss.g_flash_interface_mode,"aw",%nobits
+	.set	.LANCHOR25,. + 0
+	.type	g_flash_interface_mode, %object
+	.size	g_flash_interface_mode, 1
+g_flash_interface_mode:
+	.space	1
+	.section	.bss.g_flash_multi_page_prog_en,"aw",%nobits
+	.set	.LANCHOR23,. + 0
+	.type	g_flash_multi_page_prog_en, %object
+	.size	g_flash_multi_page_prog_en, 1
+g_flash_multi_page_prog_en:
+	.space	1
+	.section	.bss.g_flash_multi_page_read_en,"aw",%nobits
+	.set	.LANCHOR144,. + 0
+	.type	g_flash_multi_page_read_en, %object
+	.size	g_flash_multi_page_read_en, 1
+g_flash_multi_page_read_en:
+	.space	1
+	.section	.bss.g_flash_page_buffer,"aw",%nobits
+	.align	2
+	.set	.LANCHOR119,. + 0
+	.type	g_flash_page_buffer, %object
+	.size	g_flash_page_buffer, 4
+g_flash_page_buffer:
+	.space	4
+	.section	.bss.g_flash_reversd_blks,"aw",%nobits
+	.set	.LANCHOR123,. + 0
+	.type	g_flash_reversd_blks, %object
+	.size	g_flash_reversd_blks, 1
+g_flash_reversd_blks:
+	.space	1
+	.section	.bss.g_flash_slc_mode,"aw",%nobits
+	.set	.LANCHOR11,. + 0
+	.type	g_flash_slc_mode, %object
+	.size	g_flash_slc_mode, 1
+g_flash_slc_mode:
+	.space	1
+	.section	.bss.g_flash_spare_buffer,"aw",%nobits
+	.align	2
+	.set	.LANCHOR118,. + 0
+	.type	g_flash_spare_buffer, %object
+	.size	g_flash_spare_buffer, 4
+g_flash_spare_buffer:
+	.space	4
+	.section	.bss.g_flash_sys_spare_buffer,"aw",%nobits
+	.align	2
+	.set	.LANCHOR116,. + 0
+	.type	g_flash_sys_spare_buffer, %object
+	.size	g_flash_sys_spare_buffer, 4
+g_flash_sys_spare_buffer:
+	.space	4
+	.section	.bss.g_flash_tmp_page_buffer,"aw",%nobits
+	.align	2
+	.set	.LANCHOR111,. + 0
+	.type	g_flash_tmp_page_buffer, %object
+	.size	g_flash_tmp_page_buffer, 4
+g_flash_tmp_page_buffer:
+	.space	4
+	.section	.bss.g_flash_tmp_spare_buffer,"aw",%nobits
+	.align	2
+	.set	.LANCHOR112,. + 0
+	.type	g_flash_tmp_spare_buffer, %object
+	.size	g_flash_tmp_spare_buffer, 4
+g_flash_tmp_spare_buffer:
+	.space	4
+	.section	.bss.g_flash_toggle_mode_en,"aw",%nobits
+	.set	.LANCHOR35,. + 0
+	.type	g_flash_toggle_mode_en, %object
+	.size	g_flash_toggle_mode_en, 1
+g_flash_toggle_mode_en:
+	.space	1
+	.section	.bss.g_ftl_info_blk,"aw",%nobits
+	.align	6
+	.set	.LANCHOR131,. + 0
+	.type	g_ftl_info_blk, %object
+	.size	g_ftl_info_blk, 4
+g_ftl_info_blk:
+	.space	4
+	.section	.bss.g_gc_info,"aw",%nobits
+	.align	2
+	.set	.LANCHOR59,. + 0
+	.type	g_gc_info, %object
+	.size	g_gc_info, 320
+g_gc_info:
+	.space	320
+	.section	.bss.g_idb_ecc_bits,"aw",%nobits
+	.set	.LANCHOR145,. + 0
+	.type	g_idb_ecc_bits, %object
+	.size	g_idb_ecc_bits, 1
+g_idb_ecc_bits:
+	.space	1
+	.section	.bss.g_idb_slc_mode_enable,"aw",%nobits
+	.set	.LANCHOR146,. + 0
+	.type	g_idb_slc_mode_enable, %object
+	.size	g_idb_slc_mode_enable, 1
+g_idb_slc_mode_enable:
+	.space	1
+	.section	.bss.g_lsb_page_tbl,"aw",%nobits
+	.align	2
+	.set	.LANCHOR14,. + 0
+	.type	g_lsb_page_tbl, %object
+	.size	g_lsb_page_tbl, 512
+g_lsb_page_tbl:
+	.space	512
+	.section	.bss.g_maxRegNum,"aw",%nobits
+	.set	.LANCHOR4,. + 0
+	.type	g_maxRegNum, %object
+	.size	g_maxRegNum, 1
+g_maxRegNum:
+	.space	1
+	.section	.bss.g_maxRetryCount,"aw",%nobits
+	.set	.LANCHOR113,. + 0
+	.type	g_maxRetryCount, %object
+	.size	g_maxRetryCount, 1
+g_maxRetryCount:
+	.space	1
+	.section	.bss.g_msb_page_tbl,"aw",%nobits
+	.align	2
+	.set	.LANCHOR96,. + 0
+	.type	g_msb_page_tbl, %object
+	.size	g_msb_page_tbl, 1024
+g_msb_page_tbl:
+	.space	1024
+	.section	.bss.g_nand_max_die,"aw",%nobits
+	.set	.LANCHOR8,. + 0
+	.type	g_nand_max_die, %object
+	.size	g_nand_max_die, 1
+g_nand_max_die:
+	.space	1
+	.section	.bss.g_nandc_ecc_bits,"aw",%nobits
+	.set	.LANCHOR27,. + 0
+	.type	g_nandc_ecc_bits, %object
+	.size	g_nandc_ecc_bits, 1
+g_nandc_ecc_bits:
+	.space	1
+	.section	.bss.g_nandc_v6_master_info,"aw",%nobits
+	.align	2
+	.set	.LANCHOR30,. + 0
+	.type	g_nandc_v6_master_info, %object
+	.size	g_nandc_v6_master_info, 28
+g_nandc_v6_master_info:
+	.space	28
+	.section	.bss.g_nandc_ver,"aw",%nobits
+	.set	.LANCHOR7,. + 0
+	.type	g_nandc_ver, %object
+	.size	g_nandc_ver, 1
+g_nandc_ver:
+	.space	1
+	.section	.bss.g_pm_spare,"aw",%nobits
+	.align	2
+	.set	.LANCHOR141,. + 0
+	.type	g_pm_spare, %object
+	.size	g_pm_spare, 4
+g_pm_spare:
+	.space	4
+	.section	.bss.g_retryMode,"aw",%nobits
+	.set	.LANCHOR1,. + 0
+	.type	g_retryMode, %object
+	.size	g_retryMode, 1
+g_retryMode:
+	.space	1
+	.section	.bss.g_slc_mode_addr2,"aw",%nobits
+	.set	.LANCHOR12,. + 0
+	.type	g_slc_mode_addr2, %object
+	.size	g_slc_mode_addr2, 1
+g_slc_mode_addr2:
+	.space	1
+	.section	.bss.g_slc_mode_enable,"aw",%nobits
+	.type	g_slc_mode_enable, %object
+	.size	g_slc_mode_enable, 1
+g_slc_mode_enable:
+	.space	1
+	.section	.bss.g_slc_page_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR97,. + 0
+	.type	g_slc_page_num, %object
+	.size	g_slc_page_num, 2
+g_slc_page_num:
+	.space	2
+	.section	.bss.g_totle_phy_block,"aw",%nobits
+	.align	1
+	.set	.LANCHOR99,. + 0
+	.type	g_totle_phy_block, %object
+	.size	g_totle_phy_block, 2
+g_totle_phy_block:
+	.space	2
+	.section	.bss.gc_des_ppa_tbl,"aw",%nobits
+	.align	2
+	.set	.LANCHOR109,. + 0
+	.type	gc_des_ppa_tbl, %object
+	.size	gc_des_ppa_tbl, 4
+gc_des_ppa_tbl:
+	.space	4
+	.section	.bss.gc_lpa_tbl,"aw",%nobits
+	.align	2
+	.set	.LANCHOR107,. + 0
+	.type	gc_lpa_tbl, %object
+	.size	gc_lpa_tbl, 4
+gc_lpa_tbl:
+	.space	4
+	.section	.bss.gc_mode,"aw",%nobits
+	.set	.LANCHOR67,. + 0
+	.type	gc_mode, %object
+	.size	gc_mode, 1
+gc_mode:
+	.space	1
+	.section	.bss.gc_page_buf_id,"aw",%nobits
+	.align	2
+	.set	.LANCHOR65,. + 0
+	.type	gc_page_buf_id, %object
+	.size	gc_page_buf_id, 4
+gc_page_buf_id:
+	.space	4
+	.section	.bss.gc_pre_ppa_tbl,"aw",%nobits
+	.align	2
+	.set	.LANCHOR108,. + 0
+	.type	gc_pre_ppa_tbl, %object
+	.size	gc_pre_ppa_tbl, 4
+gc_pre_ppa_tbl:
+	.space	4
+	.section	.bss.gc_slc_mode_vpn_th,"aw",%nobits
+	.align	1
+	.set	.LANCHOR58,. + 0
+	.type	gc_slc_mode_vpn_th, %object
+	.size	gc_slc_mode_vpn_th, 2
+gc_slc_mode_vpn_th:
+	.space	2
+	.section	.bss.gc_state,"aw",%nobits
+	.set	.LANCHOR104,. + 0
+	.type	gc_state, %object
+	.size	gc_state, 1
+gc_state:
+	.space	1
+	.section	.bss.gc_tlc_mode_slc_vpn_th,"aw",%nobits
+	.align	1
+	.set	.LANCHOR105,. + 0
+	.type	gc_tlc_mode_slc_vpn_th, %object
+	.size	gc_tlc_mode_slc_vpn_th, 2
+gc_tlc_mode_slc_vpn_th:
+	.space	2
+	.section	.bss.gc_tlc_mode_tlc_vpn_th,"aw",%nobits
+	.align	1
+	.set	.LANCHOR106,. + 0
+	.type	gc_tlc_mode_tlc_vpn_th, %object
+	.size	gc_tlc_mode_tlc_vpn_th, 2
+gc_tlc_mode_tlc_vpn_th:
+	.space	2
+	.section	.bss.gc_valid_page_ppa,"aw",%nobits
+	.align	2
+	.set	.LANCHOR61,. + 0
+	.type	gc_valid_page_ppa, %object
+	.size	gc_valid_page_ppa, 4
+gc_valid_page_ppa:
+	.space	4
+	.section	.bss.gpNandParaInfo,"aw",%nobits
+	.align	2
+	.set	.LANCHOR34,. + 0
+	.type	gpNandParaInfo, %object
+	.size	gpNandParaInfo, 4
+gpNandParaInfo:
+	.space	4
+	.section	.bss.gp_blk_info,"aw",%nobits
+	.align	2
+	.set	.LANCHOR57,. + 0
+	.type	gp_blk_info, %object
+	.size	gp_blk_info, 4
+gp_blk_info:
+	.space	4
+	.section	.bss.gp_flash_info,"aw",%nobits
+	.align	2
+	.set	.LANCHOR5,. + 0
+	.type	gp_flash_info, %object
+	.size	gp_flash_info, 4
+gp_flash_info:
+	.space	4
+	.section	.bss.gp_ftl_ext_info,"aw",%nobits
+	.align	2
+	.set	.LANCHOR60,. + 0
+	.type	gp_ftl_ext_info, %object
+	.size	gp_ftl_ext_info, 4
+gp_ftl_ext_info:
+	.space	4
+	.section	.bss.gp_ftl_info,"aw",%nobits
+	.align	2
+	.set	.LANCHOR46,. + 0
+	.type	gp_ftl_info, %object
+	.size	gp_ftl_info, 4
+gp_ftl_info:
+	.space	4
+	.section	.bss.gp_nandc,"aw",%nobits
+	.align	2
+	.set	.LANCHOR6,. + 0
+	.type	gp_nandc, %object
+	.size	gp_nandc, 4
+gp_nandc:
+	.space	4
+	.section	.bss.lpa_hash,"aw",%nobits
+	.align	1
+	.set	.LANCHOR81,. + 0
+	.type	lpa_hash, %object
+	.size	lpa_hash, 512
+lpa_hash:
+	.space	512
+	.section	.bss.lpa_hash_index,"aw",%nobits
+	.align	2
+	.set	.LANCHOR83,. + 0
+	.type	lpa_hash_index, %object
+	.size	lpa_hash_index, 4
+lpa_hash_index:
+	.space	4
+	.section	.bss.nandc_hw_seed,"aw",%nobits
+	.set	.LANCHOR28,. + 0
+	.type	nandc_hw_seed, %object
+	.size	nandc_hw_seed, 1
+nandc_hw_seed:
+	.space	1
+	.section	.bss.nandc_randomizer_en,"aw",%nobits
+	.set	.LANCHOR29,. + 0
+	.type	nandc_randomizer_en, %object
+	.size	nandc_randomizer_en, 1
+nandc_randomizer_en:
+	.space	1
+	.section	.bss.p_free_buf_head,"aw",%nobits
+	.set	.LANCHOR37,. + 0
+	.type	p_free_buf_head, %object
+	.size	p_free_buf_head, 1
+p_free_buf_head:
+	.space	1
+	.section	.bss.p_read_ahead_ext_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR50,. + 0
+	.type	p_read_ahead_ext_buf, %object
+	.size	p_read_ahead_ext_buf, 4
+p_read_ahead_ext_buf:
+	.space	4
+	.section	.bss.pm_gc_enable,"aw",%nobits
+	.align	2
+	.set	.LANCHOR91,. + 0
+	.type	pm_gc_enable, %object
+	.size	pm_gc_enable, 4
+pm_gc_enable:
+	.space	4
+	.section	.bss.pm_last_load_ram_id,"aw",%nobits
+	.set	.LANCHOR151,. + 0
+	.type	pm_last_load_ram_id, %object
+	.size	pm_last_load_ram_id, 1
+pm_last_load_ram_id:
+	.space	1
+	.section	.bss.pm_last_update_ram_id,"aw",%nobits
+	.set	.LANCHOR94,. + 0
+	.type	pm_last_update_ram_id, %object
+	.size	pm_last_update_ram_id, 1
+pm_last_update_ram_id:
+	.space	1
+	.section	.bss.pm_ram_info,"aw",%nobits
+	.align	2
+	.set	.LANCHOR93,. + 0
+	.type	pm_ram_info, %object
+	.size	pm_ram_info, 256
+pm_ram_info:
+	.space	256
+	.section	.bss.read_ahead_lpa,"aw",%nobits
+	.align	2
+	.set	.LANCHOR49,. + 0
+	.type	read_ahead_lpa, %object
+	.size	read_ahead_lpa, 4
+read_ahead_lpa:
+	.space	4
+	.section	.bss.sblk_gc_write_completed_queue_head,"aw",%nobits
+	.set	.LANCHOR62,. + 0
+	.type	sblk_gc_write_completed_queue_head, %object
+	.size	sblk_gc_write_completed_queue_head, 1
+sblk_gc_write_completed_queue_head:
+	.space	1
+	.section	.bss.sblk_queue_head,"aw",%nobits
+	.set	.LANCHOR90,. + 0
+	.type	sblk_queue_head, %object
+	.size	sblk_queue_head, 1
+sblk_queue_head:
+	.space	1
+	.section	.bss.sblk_read_completed_queue_head,"aw",%nobits
+	.set	.LANCHOR51,. + 0
+	.type	sblk_read_completed_queue_head, %object
+	.size	sblk_read_completed_queue_head, 1
+sblk_read_completed_queue_head:
+	.space	1
+	.section	.bss.sblk_write_completed_queue_head,"aw",%nobits
+	.set	.LANCHOR88,. + 0
+	.type	sblk_write_completed_queue_head, %object
+	.size	sblk_write_completed_queue_head, 1
+sblk_write_completed_queue_head:
+	.space	1
+	.section	.bss.write_buf_count,"aw",%nobits
+	.set	.LANCHOR43,. + 0
+	.type	write_buf_count, %object
+	.size	write_buf_count, 1
+write_buf_count:
+	.space	1
+	.section	.bss.write_buf_head,"aw",%nobits
+	.set	.LANCHOR42,. + 0
+	.type	write_buf_head, %object
+	.size	write_buf_head, 1
+write_buf_head:
+	.space	1
+	.section	.bss.write_commit_count,"aw",%nobits
+	.set	.LANCHOR89,. + 0
+	.type	write_commit_count, %object
+	.size	write_commit_count, 1
+write_commit_count:
+	.space	1
+	.section	.bss.write_commit_head,"aw",%nobits
+	.set	.LANCHOR127,. + 0
+	.type	write_commit_head, %object
+	.size	write_commit_head, 1
+write_commit_head:
+	.space	1
+	.section	.data.NandFlashParaTbl,"aw",%progbits
+	.align	1
+	.set	.LANCHOR142,. + 0
+	.type	NandFlashParaTbl, %object
+	.size	NandFlashParaTbl, 768
+NandFlashParaTbl:
+	.byte	6
+	.byte	-104
+	.byte	58
+	.byte	-104
+	.byte	-77
+	.byte	118
+	.byte	114
+	.byte	1
+	.byte	1
+	.byte	32
+	.short	768
+	.byte	3
+	.byte	2
+	.short	758
+	.short	5593
+	.byte	0
+	.byte	37
+	.byte	60
+	.byte	32
+	.byte	2
+	.byte	1
+	.byte	4
+	.byte	0
+	.short	256
+	.byte	1
+	.byte	-94
+	.byte	0
+	.byte	0
+	.byte	6
+	.byte	-104
+	.byte	60
+	.byte	-104
+	.byte	-77
+	.byte	118
+	.byte	114
+	.byte	1
+	.byte	1
+	.byte	32
+	.short	768
+	.byte	3
+	.byte	2
+	.short	1478
+	.short	5593
+	.byte	0
+	.byte	37
+	.byte	60
+	.byte	32
+	.byte	2
+	.byte	1
+	.byte	4
+	.byte	0
+	.short	256
+	.byte	1
+	.byte	-94
+	.byte	0
+	.byte	0
+	.byte	6
+	.byte	-104
+	.byte	58
+	.byte	-104
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+	.section	.rodata.__func__.11562,"a",%progbits
+	.set	.LANCHOR126,. + 0
+	.type	__func__.11562, %object
+	.size	__func__.11562, 15
+__func__.11562:
+	.ascii	"sblk_prog_page\000"
+	.section	.rodata.__func__.11621,"a",%progbits
+	.set	.LANCHOR148,. + 0
+	.type	__func__.11621, %object
+	.size	__func__.11621, 16
+__func__.11621:
+	.ascii	"load_l2p_region\000"
+	.section	.rodata.__func__.11635,"a",%progbits
+	.set	.LANCHOR102,. + 0
+	.type	__func__.11635, %object
+	.size	__func__.11635, 13
+__func__.11635:
+	.ascii	"pm_free_sblk\000"
+	.section	.rodata.__func__.11655,"a",%progbits
+	.set	.LANCHOR150,. + 0
+	.type	__func__.11655, %object
+	.size	__func__.11655, 6
+__func__.11655:
+	.ascii	"pm_gc\000"
+	.section	.rodata.__func__.11671,"a",%progbits
+	.set	.LANCHOR92,. + 0
+	.type	__func__.11671, %object
+	.size	__func__.11671, 17
+__func__.11671:
+	.ascii	"pm_alloc_new_blk\000"
+	.section	.rodata.__func__.11681,"a",%progbits
+	.set	.LANCHOR140,. + 0
+	.type	__func__.11681, %object
+	.size	__func__.11681, 14
+__func__.11681:
+	.ascii	"pm_write_page\000"
+	.section	.rodata.__func__.11699,"a",%progbits
+	.set	.LANCHOR95,. + 0
+	.type	__func__.11699, %object
+	.size	__func__.11699, 21
+__func__.11699:
+	.ascii	"pm_select_ram_region\000"
+	.section	.rodata.__func__.9485,"a",%progbits
+	.set	.LANCHOR114,. + 0
+	.type	__func__.9485, %object
+	.size	__func__.9485, 19
+__func__.9485:
+	.ascii	"flash_read_page_en\000"
+	.section	.rodata.__func__.9514,"a",%progbits
+	.set	.LANCHOR128,. + 0
+	.type	__func__.9514, %object
+	.size	__func__.9514, 19
+__func__.9514:
+	.ascii	"flash_prog_page_en\000"
+	.section	.rodata.__func__.9529,"a",%progbits
+	.set	.LANCHOR21,. + 0
+	.type	__func__.9529, %object
+	.size	__func__.9529, 26
+__func__.9529:
+	.ascii	"flash_erase_duplane_block\000"
+	.section	.rodata.__func__.9540,"a",%progbits
+	.set	.LANCHOR24,. + 0
+	.type	__func__.9540, %object
+	.size	__func__.9540, 21
+__func__.9540:
+	.ascii	"flash_erase_block_en\000"
+	.section	.rodata.__func__.9554,"a",%progbits
+	.set	.LANCHOR9,. + 0
+	.type	__func__.9554, %object
+	.size	__func__.9554, 28
+__func__.9554:
+	.ascii	"flash_wait_device_ready_raw\000"
+	.section	.rodata.__func__.9579,"a",%progbits
+	.set	.LANCHOR124,. + 0
+	.type	__func__.9579, %object
+	.size	__func__.9579, 26
+__func__.9579:
+	.ascii	"flash_start_tlc_page_prog\000"
+	.section	.rodata.__func__.9592,"a",%progbits
+	.set	.LANCHOR125,. + 0
+	.type	__func__.9592, %object
+	.size	__func__.9592, 22
+__func__.9592:
+	.ascii	"flash_start_page_prog\000"
+	.section	.rodata.__func__.9605,"a",%progbits
+	.set	.LANCHOR33,. + 0
+	.type	__func__.9605, %object
+	.size	__func__.9605, 22
+__func__.9605:
+	.ascii	"flash_start_page_read\000"
+	.section	.rodata.__func__.9620,"a",%progbits
+	.set	.LANCHOR120,. + 0
+	.type	__func__.9620, %object
+	.size	__func__.9620, 25
+__func__.9620:
+	.ascii	"flash_complete_page_read\000"
+	.section	.rodata.do_gc.str1.1,"aMS",%progbits,1
+.LC153:
+	.ascii	"gc %d: %d %d %d %d %d %d\012\000"
+.LC154:
+	.ascii	"GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\012"
+	.ascii	"\000"
+.LC155:
+	.ascii	"gc free %x, %d\012\000"
+	.section	.rodata.dump_ftl_info.str1.1,"aMS",%progbits,1
+.LC81:
+	.ascii	"g_ftl_info_blk blk:0x%x, index:0x%x, page:0x%x\012\000"
+.LC82:
+	.ascii	"ftl_ext_info_blk blk:0x%x, page:0x%x\012\000"
+.LC83:
+	.ascii	"ac_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page"
+	.ascii	"_index:0x%x\012\000"
+.LC84:
+	.ascii	"tmp_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, pag"
+	.ascii	"e_index:0x%x\012\000"
+.LC85:
+	.ascii	"gc_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page"
+	.ascii	"_index:0x%x\012\000"
+.LC86:
+	.ascii	"lpa:\000"
+.LC87:
+	.ascii	"vpn:\000"
+.LC88:
+	.ascii	"sblk:\000"
+.LC89:
+	.ascii	"lpa_hash:\000"
+.LC90:
+	.ascii	"lpa_hash_index:\000"
+	.section	.rodata.dump_sblk_queue.str1.1,"aMS",%progbits,1
+.LC24:
+	.ascii	"dump_sblk_queue: %d\012\000"
+.LC25:
+	.ascii	"buf id= %d state = %d ppa = %x\012\000"
+	.section	.rodata.flash_complete_page_read.str1.1,"aMS",%progbits,1
+.LC54:
+	.ascii	"flash_complete_page_read %x %x error_ecc %d %d\012\000"
+	.section	.rodata.flash_ddr_tunning_read.str1.1,"aMS",%progbits,1
+.LC48:
+	.ascii	"%d flash_ddr_tunning_read %x ecc=%d\012\000"
+.LC49:
+	.ascii	"sync para %d\012\000"
+.LC50:
+	.ascii	"DDR mode Read error %x %x\012\000"
+	.section	.rodata.flash_erase_all.str1.1,"aMS",%progbits,1
+.LC5:
+	.ascii	"erase done: %x\012\000"
+	.section	.rodata.flash_erase_block_en.str1.1,"aMS",%progbits,1
+.LC3:
+	.ascii	"flash_erase_block %x %x\012\000"
+.LC4:
+	.ascii	"flash_erase_block block = %x status = %x\012\000"
+	.section	.rodata.flash_erase_duplane_block.str1.1,"aMS",%progbits,1
+.LC1:
+	.ascii	"flash_erase_duplane_block %x %x %x\012\000"
+.LC2:
+	.ascii	"flash_erase_duplane_block pageadd = %x status = %x\012"
+	.ascii	"\000"
+	.section	.rodata.flash_info_blk_init.str1.1,"aMS",%progbits,1
+.LC53:
+	.ascii	"no sys info %x\012\000"
+	.section	.rodata.flash_info_flush.str1.1,"aMS",%progbits,1
+.LC77:
+	.ascii	"finfo:\000"
+.LC78:
+	.ascii	"flash_info_flush id = %x, page = %x\012\000"
+.LC79:
+	.ascii	"sys_info_flush error:%x\012\000"
+	.section	.rodata.flash_mask_bad_block.str1.1,"aMS",%progbits,1
+.LC6:
+	.ascii	"flash_mask_bad_block %d %d\012\000"
+	.section	.rodata.flash_prog_page.str1.1,"aMS",%progbits,1
+.LC57:
+	.ascii	"flash_prog_page %x %x %x\012\000"
+	.section	.rodata.flash_prog_page_en.str1.1,"aMS",%progbits,1
+.LC59:
+	.ascii	"flash_prog_page_en:%x %x\012\000"
+.LC60:
+	.ascii	"spare\000"
+.LC61:
+	.ascii	"data\000"
+.LC62:
+	.ascii	"write error: %x\012\000"
+	.section	.rodata.flash_read_page.str1.1,"aMS",%progbits,1
+.LC41:
+	.ascii	"flash_read_page %x %x %x\012\000"
+	.section	.rodata.flash_read_page_en.str1.1,"aMS",%progbits,1
+.LC51:
+	.ascii	"flash_read_page_en %x %x\012\000"
+.LC52:
+	.ascii	"flash_read_page_en %x %x error_ecc %d %d\012\000"
+	.section	.rodata.flash_wait_device_ready_raw.str1.1,"aMS",%progbits,1
+.LC0:
+	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
+	.section	.rodata.ftl_alloc_sblk.str1.1,"aMS",%progbits,1
+.LC14:
+	.ascii	"ftl_alloc_sblk %x, %d %d %d\012\000"
+	.section	.rodata.ftl_discard.str1.1,"aMS",%progbits,1
+.LC148:
+	.ascii	"ftl_discard:(%x, %x, %x, %x)\012\000"
+	.section	.rodata.ftl_info_blk_init.str1.1,"aMS",%progbits,1
+.LC65:
+	.ascii	"%d %x @%d %x\012\000"
+.LC66:
+	.ascii	"ftl_info_blk_init %d %d %x\012\000"
+	.section	.rodata.ftl_info_check.str1.1,"aMS",%progbits,1
+.LC122:
+	.ascii	"free blk vpn error: %x %x\012\000"
+.LC123:
+	.ascii	"data blk: %d %d %d\012\000"
+.LC124:
+	.ascii	"free blk: %d %d %d\012\000"
+	.section	.rodata.ftl_info_flush.str1.1,"aMS",%progbits,1
+.LC64:
+	.ascii	"g_ftl_info_blk blk = %x, page = %x version = %d\012"
+	.ascii	"\000"
+	.section	.rodata.ftl_init.str1.1,"aMS",%progbits,1
+.LC139:
+	.ascii	"FTL version: 6.0.3 20180211\000"
+.LC140:
+	.ascii	"gp_ftl_ext_info %p %p %p\012\000"
+.LC141:
+	.ascii	"flash info size: %d %d %d\012\000"
+	.section	.rodata.ftl_low_format.str1.1,"aMS",%progbits,1
+.LC67:
+	.ascii	"low format %d %d %d %d\012\000"
+	.section	.rodata.ftl_mask_bad_block.str1.1,"aMS",%progbits,1
+.LC19:
+	.ascii	"mask bad block:cs %x block: %x\012\000"
+	.section	.rodata.ftl_open_sblk_recovery.str1.1,"aMS",%progbits,1
+.LC69:
+	.ascii	"saved_active_page  = %x\012\000"
+.LC70:
+	.ascii	"saved_active_plane = %x\012\000"
+.LC71:
+	.ascii	"sblk = %x\012\000"
+.LC72:
+	.ascii	"phy_blk = %x %x\012\000"
+.LC73:
+	.ascii	"blk= %x, page=%x, ppa = %x, status = %x, data:%x %x"
+	.ascii	" %x %x, spare: %x %x %x %x\012\000"
+.LC74:
+	.ascii	"sblk = %x, vpn0 = %d, vpn1 = %d\012\000"
+.LC75:
+	.ascii	"dump write = %x\012\000"
+	.section	.rodata.ftl_re_low_format_test.str1.1,"aMS",%progbits,1
+.LC68:
+	.ascii	"re low formaet %d\012\000"
+	.section	.rodata.ftl_read.str1.1,"aMS",%progbits,1
+.LC114:
+	.ascii	"ftl_read refresh =%x, lpa = %x, ppa= %x\012\000"
+	.section	.rodata.ftl_read_ahead.str1.1,"aMS",%progbits,1
+.LC100:
+	.ascii	"ftl_read_ahead refresh =%x, lpa = %x, ppa= %x\012\000"
+.LC101:
+	.ascii	"id=%d, lpa = %x, ppa = %x spare = %x %x %x %x\012\000"
+	.section	.rodata.ftl_sblk_dump.str1.1,"aMS",%progbits,1
+.LC107:
+	.ascii	"ftl_sblk_dump = %x %x %x %x\012\000"
+.LC108:
+	.ascii	"page_addr = %x, lpa=%x vpn = %d\012\000"
+.LC109:
+	.ascii	"index= %x, lpa=%x\012\000"
+.LC110:
+	.ascii	"block = %x, vpn=%x check vpn = %d\012\000"
+	.section	.rodata.ftl_scan_all_data.str1.1,"aMS",%progbits,1
+.LC127:
+	.ascii	"ftl_scan_all_data = %x\012\000"
+.LC128:
+	.ascii	"scan lpa = %x ppa= %x\012\000"
+.LC129:
+	.ascii	"lba = %x,addr= %x, ststus = %x, spare= %x %x %x %x "
+	.ascii	"data=%x %x\012\000"
+.LC130:
+	.ascii	"lba = %x, id= %x, index = %x hash ppa = %x\012\000"
+.LC131:
+	.ascii	"0pm:\000"
+.LC132:
+	.ascii	"1pm:\000"
+	.section	.rodata.ftl_sysblk_dump.str1.1,"aMS",%progbits,1
+.LC80:
+	.ascii	"l2p:\000"
+	.section	.rodata.ftl_test_block.str1.1,"aMS",%progbits,1
+.LC63:
+	.ascii	"low format %d\012\000"
+	.section	.rodata.ftl_update_l2p_map.str1.1,"aMS",%progbits,1
+.LC143:
+	.ascii	"ftl_update_l2p_map: %x %x %x\012\000"
+.LC144:
+	.ascii	"ftl_update_l2p_map\000"
+.LC145:
+	.ascii	"lpa_tbl:\000"
+.LC146:
+	.ascii	"sblk %x vpn: %d %d\012\000"
+	.section	.rodata.ftl_vpn_decrement.str1.1,"aMS",%progbits,1
+.LC17:
+	.ascii	"ftl_vpn_decrement %x = %d\012\000"
+	.section	.rodata.ftl_write_commit.str1.1,"aMS",%progbits,1
+.LC147:
+	.ascii	"%d read error: ppa:%x, lpa:%x, status:%x\012\000"
+	.section	.rodata.ftl_write_completed.str1.1,"aMS",%progbits,1
+.LC18:
+	.ascii	"ftl prog error =%x, lpa = %x, ppa= %x\012\000"
+	.section	.rodata.gc_add_sblk.str1.1,"aMS",%progbits,1
+.LC7:
+	.ascii	"gc_add_sblk = %d, %d, %d, %d, %d, %d\012\000"
+	.section	.rodata.gc_check_data_one_wl.str1.1,"aMS",%progbits,1
+.LC56:
+	.ascii	"1ppa = %x, status = %x, %x %x spare: %x %x %x %x\012"
+	.ascii	"\000"
+	.section	.rodata.gc_do_copy_back.str1.1,"aMS",%progbits,1
+.LC149:
+	.ascii	"gc page in buf: lpa %x ppa = %x pageindex= %x\012\000"
+.LC150:
+	.ascii	"gc_do_copy_back: lpa %x des_ppa = %x %x gc_ppa= %x "
+	.ascii	"page_index= %d\012\000"
+.LC151:
+	.ascii	"gc_do_copy_back: %x %x %x %x gc_ppa:%x %x\012\000"
+.LC152:
+	.ascii	"%d prog_step: %x %x buf id= %x ppa = %x hash=%x id "
+	.ascii	"= %x plane = %x lpa=%x\012\000"
+	.section	.rodata.gc_free_src_blk.str1.1,"aMS",%progbits,1
+.LC15:
+	.ascii	"gc_free_src_blk = %x, vpn = %d\012\000"
+.LC16:
+	.ascii	"gc_free_src_blk %x, %d\012\000"
+	.section	.rodata.gc_free_temp_buf.str1.1,"aMS",%progbits,1
+.LC10:
+	.ascii	"%d gc_free_temp_buf buf id= %x\012\000"
+	.section	.rodata.gc_recovery.str1.1,"aMS",%progbits,1
+.LC133:
+	.ascii	"ppa = %x, status = %x, data:%x %x %x %x, spare: %x "
+	.ascii	"%x %x %x\012\000"
+.LC134:
+	.ascii	"gc_lpa:\000"
+.LC135:
+	.ascii	"gc_ppa:\000"
+.LC136:
+	.ascii	"ppa = %x, status = %x, %x %x spare: %x %x %x %x\012"
+	.ascii	"\000"
+.LC137:
+	.ascii	"gc_recovery\000"
+.LC138:
+	.ascii	"gc_recovery: %x vpn = %x\012\000"
+	.section	.rodata.gc_scan_src_blk.str1.1,"aMS",%progbits,1
+.LC125:
+	.ascii	"gc_scan_src_blk = %x, vpn = %d\012\000"
+.LC126:
+	.ascii	"gc_scan_src_blk = %x, s vpn0 = %d, c vpn1 = %d\012\000"
+	.section	.rodata.gc_search_src_blk.str1.1,"aMS",%progbits,1
+.LC111:
+	.ascii	"gc_search_src_blk = %d, %d, %d\012\000"
+.LC112:
+	.ascii	"vpn gc = %d, id = %d\012\000"
+.LC113:
+	.ascii	"gc_search_src_blk count= %d\012\000"
+	.section	.rodata.gc_static_wearleveling.str1.1,"aMS",%progbits,1
+.LC11:
+	.ascii	"gc_static_wearleveling: slc blk: %d, tlc blk: %d av"
+	.ascii	"g slc ec: %d, avg tlc ec: %d \012\000"
+.LC12:
+	.ascii	"gc_static_wearleveling: min slc ec: %d, min tlc ec:"
+	.ascii	" %d max slc ec: %d, max tlc ec: %d \012\000"
+	.section	.rodata.gc_update_l2p_map_new.str1.1,"aMS",%progbits,1
+.LC102:
+	.ascii	"gc_update_l2p_map_new sblk %x\012\000"
+.LC103:
+	.ascii	"gc_update_l2p_map_new: %x %x %x\012\000"
+.LC104:
+	.ascii	"0lpa: %x %x %x\012\000"
+.LC105:
+	.ascii	"lpa: %x %x %x\012\000"
+.LC106:
+	.ascii	"gc_update_l2p_map_new: %x vpn = %x vpn1 = %x done\012"
+	.ascii	"\000"
+	.section	.rodata.gc_write_completed.str1.1,"aMS",%progbits,1
+.LC8:
+	.ascii	"status: %x, ppa: %x\012\000"
+.LC9:
+	.ascii	"gc_write_completed: %x  %x  %x %x\012\000"
+	.section	.rodata.hynix_get_read_retry_default.str1.1,"aMS",%progbits,1
+.LC33:
+	.ascii	"otp error! %d\000"
+.LC34:
+	.ascii	"rr\000"
+	.section	.rodata.hynix_read_retrial.str1.1,"aMS",%progbits,1
+.LC47:
+	.ascii	"hynix RR %d row=%x, count %d, status=%d\012\000"
+	.section	.rodata.load_l2p_region.str1.1,"aMS",%progbits,1
+.LC92:
+	.ascii	"region_id = %d, pm_max_region = %d\012\000"
+.LC93:
+	.ascii	"load_l2p_region = %x,%x,%x, %x\012\000"
+.LC94:
+	.ascii	"pm_ppa:\000"
+.LC95:
+	.ascii	"data:\000"
+.LC96:
+	.ascii	"spare:\000"
+	.section	.rodata.lpa_rebuild_hash.str1.1,"aMS",%progbits,1
+.LC28:
+	.ascii	"%s %d %d\012\000"
+	.section	.rodata.micron_read_retrial.str1.1,"aMS",%progbits,1
+.LC42:
+	.ascii	"micron %d row=%x,count %d,status=%d\012\000"
+.LC43:
+	.ascii	"micron RR %d row=%x,count %d,status=%d\012\000"
+	.section	.rodata.nandc_xfer.str1.1,"aMS",%progbits,1
+.LC39:
+	.ascii	"dqs data abort %x\012\000"
+.LC40:
+	.ascii	"xfer error %x\012\000"
+	.section	.rodata.nandc_xfer_done.str1.1,"aMS",%progbits,1
+.LC35:
+	.ascii	"%d mtrans_cnt = %d page_num = %d\012\000"
+.LC36:
+	.ascii	"nandc:\000"
+.LC37:
+	.ascii	"%d flReg.d32=%x %x\012\000"
+.LC38:
+	.ascii	"nandc_xfer_done read error %x\012\000"
+	.section	.rodata.pm_alloc_new_blk.str1.1,"aMS",%progbits,1
+.LC26:
+	.ascii	"blk %x is bad block\012\000"
+.LC27:
+	.ascii	"pm_alloc_new_blk: %x %x %x %x\012\000"
+	.section	.rodata.pm_init.str1.1,"aMS",%progbits,1
+.LC97:
+	.ascii	"pm_init posr %x %x %x\012\000"
+.LC98:
+	.ascii	"pm_init recovery %x %x %x\012\000"
+	.section	.rodata.pm_log2phys.str1.1,"aMS",%progbits,1
+.LC99:
+	.ascii	"pm_log2phys  lpn = %d, max lpn = %d\012\000"
+	.section	.rodata.pm_ppa_update_check.str1.1,"aMS",%progbits,1
+.LC91:
+	.ascii	"%s w error lpn = %x, max ppa = %d\012\000"
+	.section	.rodata.pm_write_page.str1.1,"aMS",%progbits,1
+.LC76:
+	.ascii	"pm_write_page write error: %x\012\000"
+	.section	.rodata.print_ftl_debug_info.str1.1,"aMS",%progbits,1
+.LC20:
+	.ascii	"free blk: s:%x,t:%x,m:%x, data blk:s:%x,%x,t%x vpn:"
+	.ascii	" s:%x t:%x\012\000"
+.LC21:
+	.ascii	"totle w: %d MB,r: %d MB %d dv:0x%X,poc:%d\012\000"
+.LC22:
+	.ascii	"gc xlc page: %d,gc slc page: %d, tmp w: %d MB\012\000"
+.LC23:
+	.ascii	"slc ec: %d,%d,%d,%d,%d,tlc ec: %d,%d,%d,%d,%d\012\000"
+	.section	.rodata.print_gc_debug_info.str1.1,"aMS",%progbits,1
+.LC13:
+	.ascii	"gc: b:%x,p:%x,i:%x; free buf=%d %d\012\000"
+	.section	.rodata.queue_wait_first_req_completed.str1.1,"aMS",%progbits,1
+.LC55:
+	.ascii	"set buf %d,status = %x, ppa = %x lun state = %d\012"
+	.ascii	"\000"
+	.section	.rodata.random_seed,"a",%progbits
+	.align	1
+	.set	.LANCHOR32,. + 0
+	.type	random_seed, %object
+	.size	random_seed, 256
+random_seed:
+	.short	22378
+	.short	1512
+	.short	25245
+	.short	17827
+	.short	25756
+	.short	19440
+	.short	9026
+	.short	10030
+	.short	29528
+	.short	20467
+	.short	29676
+	.short	24432
+	.short	31328
+	.short	6872
+	.short	13426
+	.short	13842
+	.short	8783
+	.short	1108
+	.short	782
+	.short	28837
+	.short	30729
+	.short	9505
+	.short	18676
+	.short	23085
+	.short	18730
+	.short	1085
+	.short	32609
+	.short	14697
+	.short	20858
+	.short	15170
+	.short	30365
+	.short	1607
+	.short	32298
+	.short	4995
+	.short	18905
+	.short	1976
+	.short	9592
+	.short	20204
+	.short	17443
+	.short	13615
+	.short	23330
+	.short	29369
+	.short	13947
+	.short	9398
+	.short	32398
+	.short	8984
+	.short	27600
+	.short	21785
+	.short	6019
+	.short	6311
+	.short	31598
+	.short	30210
+	.short	19327
+	.short	13896
+	.short	11347
+	.short	27545
+	.short	3107
+	.short	26575
+	.short	32270
+	.short	19852
+	.short	20601
+	.short	8349
+	.short	9290
+	.short	29819
+	.short	13579
+	.short	3661
+	.short	28676
+	.short	27331
+	.short	32574
+	.short	8693
+	.short	31253
+	.short	9081
+	.short	5399
+	.short	6842
+	.short	20087
+	.short	5537
+	.short	1274
+	.short	11617
+	.short	9530
+	.short	4866
+	.short	8035
+	.short	23219
+	.short	1178
+	.short	23272
+	.short	7383
+	.short	18944
+	.short	12488
+	.short	12871
+	.short	29340
+	.short	20532
+	.short	11022
+	.short	22514
+	.short	228
+	.short	22363
+	.short	24978
+	.short	14584
+	.short	12138
+	.short	3092
+	.short	17916
+	.short	16863
+	.short	14554
+	.short	31457
+	.short	29474
+	.short	25311
+	.short	24121
+	.short	3684
+	.short	28037
+	.short	22865
+	.short	22839
+	.short	25217
+	.short	13217
+	.short	27186
+	.short	14938
+	.short	11180
+	.short	29754
+	.short	24180
+	.short	15150
+	.short	32455
+	.short	20434
+	.short	23848
+	.short	29983
+	.short	16120
+	.short	14769
+	.short	20041
+	.short	29803
+	.short	28406
+	.short	17598
+	.short	28087
+	.section	.rodata.rk_ftl_init.str1.1,"aMS",%progbits,1
+.LC142:
+	.ascii	"ftl_init %x\012\000"
+	.section	.rodata.rknand_print_hex.str1.1,"aMS",%progbits,1
+.LC29:
+	.ascii	"%s 0x%x:\000"
+.LC30:
+	.ascii	"%x \000"
+.LC31:
+	.ascii	"\000"
+.LC32:
+	.ascii	"%s\012\000"
+	.section	.rodata.sblk_prog_page.str1.1,"aMS",%progbits,1
+.LC58:
+	.ascii	"sblk_prog_page ppa = %x, count = %d\012\000"
+	.section	.rodata.toshiba_15ref_value,"a",%progbits
+	.set	.LANCHOR2,. + 0
+	.type	toshiba_15ref_value, %object
+	.size	toshiba_15ref_value, 95
+toshiba_15ref_value:
+	.byte	4
+	.byte	5
+	.byte	6
+	.byte	7
+	.byte	13
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	2
+	.byte	4
+	.byte	2
+	.byte	0
+	.byte	0
+	.byte	8
+	.byte	8
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	124
+	.byte	0
+	.byte	124
+	.byte	124
+	.byte	0
+	.byte	122
+	.byte	0
+	.byte	122
+	.byte	122
+	.byte	0
+	.byte	11
+	.byte	126
+	.byte	118
+	.byte	116
+	.byte	0
+	.byte	120
+	.byte	2
+	.byte	120
+	.byte	122
+	.byte	0
+	.byte	126
+	.byte	4
+	.byte	126
+	.byte	122
+	.byte	0
+	.byte	16
+	.byte	118
+	.byte	114
+	.byte	112
+	.byte	0
+	.byte	118
+	.byte	4
+	.byte	118
+	.byte	120
+	.byte	0
+	.byte	4
+	.byte	4
+	.byte	4
+	.byte	118
+	.byte	0
+	.byte	2
+	.byte	0
+	.byte	126
+	.byte	124
+	.byte	0
+	.byte	6
+	.byte	10
+	.byte	6
+	.byte	2
+	.byte	0
+	.byte	116
+	.byte	124
+	.byte	116
+	.byte	118
+	.byte	0
+	.byte	4
+	.byte	4
+	.byte	124
+	.byte	126
+	.byte	0
+	.byte	0
+	.byte	124
+	.byte	120
+	.byte	120
+	.byte	0
+	.byte	124
+	.byte	118
+	.byte	116
+	.byte	114
+	.byte	0
+	.section	.rodata.toshiba_3D_slc_value,"a",%progbits
+	.set	.LANCHOR16,. + 0
+	.type	toshiba_3D_slc_value, %object
+	.size	toshiba_3D_slc_value, 11
+toshiba_3D_slc_value:
+	.byte	-117
+	.byte	0
+	.byte	-8
+	.byte	8
+	.byte	-16
+	.byte	-24
+	.byte	24
+	.byte	-40
+	.byte	40
+	.byte	-56
+	.byte	56
+	.section	.rodata.toshiba_3D_tlc_value,"a",%progbits
+	.set	.LANCHOR15,. + 0
+	.type	toshiba_3D_tlc_value, %object
+	.size	toshiba_3D_tlc_value, 399
+toshiba_3D_tlc_value:
+	.byte	-119
+	.byte	-119
+	.byte	-119
+	.byte	-119
+	.byte	-118
+	.byte	-118
+	.byte	-118
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	-9
+	.byte	-12
+	.byte	-9
+	.byte	-7
+	.byte	-13
+	.byte	-12
+	.byte	-7
+	.byte	5
+	.byte	-2
+	.byte	-1
+	.byte	0
+	.byte	-3
+	.byte	-2
+	.byte	6
+	.byte	-6
+	.byte	-15
+	.byte	-15
+	.byte	-2
+	.byte	-12
+	.byte	-16
+	.byte	-6
+	.byte	-2
+	.byte	-19
+	.byte	-19
+	.byte	-6
+	.byte	-4
+	.byte	-12
+	.byte	-14
+	.byte	-2
+	.byte	-11
+	.byte	-23
+	.byte	-34
+	.byte	-4
+	.byte	-20
+	.byte	-22
+	.byte	-2
+	.byte	-7
+	.byte	-31
+	.byte	-30
+	.byte	-12
+	.byte	-20
+	.byte	-18
+	.byte	2
+	.byte	-15
+	.byte	-19
+	.byte	-36
+	.byte	-12
+	.byte	-28
+	.byte	-34
+	.byte	-6
+	.byte	-15
+	.byte	-11
+	.byte	2
+	.byte	-12
+	.byte	-8
+	.byte	-2
+	.byte	2
+	.byte	-3
+	.byte	-7
+	.byte	-10
+	.byte	-4
+	.byte	-8
+	.byte	-6
+	.byte	-6
+	.byte	-11
+	.byte	-27
+	.byte	-38
+	.byte	-16
+	.byte	-12
+	.byte	-2
+	.byte	2
+	.byte	-7
+	.byte	-31
+	.byte	-22
+	.byte	-4
+	.byte	-16
+	.byte	-22
+	.byte	-7
+	.byte	-31
+	.byte	-23
+	.byte	-22
+	.byte	-28
+	.byte	-28
+	.byte	-26
+	.byte	2
+	.byte	-7
+	.byte	-11
+	.byte	-14
+	.byte	-8
+	.byte	-12
+	.byte	-10
+	.byte	-10
+	.byte	-27
+	.byte	-25
+	.byte	-22
+	.byte	-20
+	.byte	-28
+	.byte	-22
+	.byte	-7
+	.byte	-23
+	.byte	-29
+	.byte	-34
+	.byte	-24
+	.byte	-32
+	.byte	-22
+	.byte	-10
+	.byte	-11
+	.byte	-29
+	.byte	-18
+	.byte	-12
+	.byte	-24
+	.byte	-22
+	.byte	6
+	.byte	1
+	.byte	-3
+	.byte	-6
+	.byte	0
+	.byte	-4
+	.byte	-2
+	.byte	10
+	.byte	-3
+	.byte	-7
+	.byte	-6
+	.byte	4
+	.byte	-4
+	.byte	-2
+	.byte	-10
+	.byte	-23
+	.byte	-39
+	.byte	-22
+	.byte	-19
+	.byte	-24
+	.byte	-18
+	.byte	-14
+	.byte	-23
+	.byte	-29
+	.byte	-30
+	.byte	-15
+	.byte	-30
+	.byte	-30
+	.byte	-7
+	.byte	-27
+	.byte	-35
+	.byte	-26
+	.byte	-15
+	.byte	-24
+	.byte	-26
+	.byte	6
+	.byte	-11
+	.byte	5
+	.byte	-2
+	.byte	-16
+	.byte	-16
+	.byte	-2
+	.byte	-2
+	.byte	-15
+	.byte	-15
+	.byte	-20
+	.byte	-8
+	.byte	-16
+	.byte	-18
+	.byte	6
+	.byte	5
+	.byte	-15
+	.byte	-2
+	.byte	-24
+	.byte	-28
+	.byte	-22
+	.byte	10
+	.byte	-15
+	.byte	-3
+	.byte	-30
+	.byte	-8
+	.byte	-24
+	.byte	-30
+	.byte	-10
+	.byte	-27
+	.byte	-19
+	.byte	-30
+	.byte	-12
+	.byte	-16
+	.byte	-10
+	.byte	14
+	.byte	-19
+	.byte	-3
+	.byte	-30
+	.byte	4
+	.byte	4
+	.byte	6
+	.byte	2
+	.byte	1
+	.byte	-3
+	.byte	-10
+	.byte	-8
+	.byte	-4
+	.byte	-6
+	.byte	-2
+	.byte	-15
+	.byte	-11
+	.byte	-26
+	.byte	-8
+	.byte	-20
+	.byte	-30
+	.byte	6
+	.byte	-19
+	.byte	-3
+	.byte	-46
+	.byte	0
+	.byte	0
+	.byte	2
+	.byte	6
+	.byte	9
+	.byte	5
+	.byte	2
+	.byte	4
+	.byte	8
+	.byte	6
+	.byte	8
+	.byte	9
+	.byte	9
+	.byte	6
+	.byte	8
+	.byte	8
+	.byte	6
+	.byte	10
+	.byte	13
+	.byte	9
+	.byte	6
+	.byte	8
+	.byte	12
+	.byte	10
+	.byte	2
+	.byte	5
+	.byte	1
+	.byte	-2
+	.byte	0
+	.byte	0
+	.byte	6
+	.byte	12
+	.byte	1
+	.byte	13
+	.byte	2
+	.byte	12
+	.byte	12
+	.byte	14
+	.byte	-12
+	.byte	-14
+	.byte	-20
+	.byte	-18
+	.byte	-16
+	.byte	-16
+	.byte	-14
+	.byte	-12
+	.byte	-10
+	.byte	-21
+	.byte	-14
+	.byte	-12
+	.byte	-12
+	.byte	-10
+	.byte	-12
+	.byte	-18
+	.byte	-22
+	.byte	-24
+	.byte	-18
+	.byte	-18
+	.byte	-18
+	.byte	-12
+	.byte	-14
+	.byte	-23
+	.byte	-20
+	.byte	-20
+	.byte	-20
+	.byte	-20
+	.byte	-12
+	.byte	-24
+	.byte	-24
+	.byte	-30
+	.byte	-24
+	.byte	-28
+	.byte	-28
+	.byte	-12
+	.byte	-26
+	.byte	-25
+	.byte	-34
+	.byte	-24
+	.byte	-24
+	.byte	-24
+	.byte	-12
+	.byte	-13
+	.byte	-26
+	.byte	-20
+	.byte	-14
+	.byte	-18
+	.byte	-18
+	.byte	-12
+	.byte	-15
+	.byte	-27
+	.byte	-22
+	.byte	-20
+	.byte	-24
+	.byte	-22
+	.byte	-12
+	.byte	-21
+	.byte	-28
+	.byte	-28
+	.byte	-24
+	.byte	-26
+	.byte	-24
+	.byte	20
+	.byte	16
+	.byte	6
+	.byte	10
+	.byte	16
+	.byte	12
+	.byte	12
+	.byte	16
+	.byte	16
+	.byte	8
+	.byte	8
+	.byte	12
+	.byte	12
+	.byte	12
+	.byte	18
+	.byte	18
+	.byte	10
+	.byte	8
+	.byte	14
+	.byte	14
+	.byte	14
+	.byte	16
+	.byte	14
+	.byte	6
+	.byte	6
+	.byte	12
+	.byte	14
+	.byte	8
+	.byte	20
+	.byte	18
+	.byte	8
+	.byte	6
+	.byte	14
+	.byte	14
+	.byte	10
+	.byte	20
+	.byte	20
+	.byte	6
+	.byte	10
+	.byte	10
+	.byte	12
+	.byte	12
+	.byte	10
+	.byte	13
+	.byte	5
+	.byte	2
+	.byte	14
+	.byte	8
+	.byte	6
+	.byte	6
+	.byte	13
+	.byte	9
+	.byte	4
+	.byte	14
+	.byte	10
+	.byte	10
+	.byte	10
+	.byte	13
+	.byte	9
+	.byte	6
+	.byte	8
+	.byte	12
+	.byte	10
+	.byte	2
+	.byte	5
+	.byte	1
+	.byte	-2
+	.byte	0
+	.byte	0
+	.byte	6
+	.byte	12
+	.byte	1
+	.byte	13
+	.byte	2
+	.byte	12
+	.byte	12
+	.byte	14
+	.section	.rodata.toshiba_3d_read_retrial.str1.1,"aMS",%progbits,1
+.LC44:
+	.ascii	"toshiba SRR %d row=%x, status=%d\012\000"
+.LC45:
+	.ascii	"toshiba TRR %d row=%x, status=%d\012\000"
+.LC46:
+	.ascii	"toshiba RR %d row=%x,count %d,status=%d\012\000"
+	.section	.rodata.toshiba_A19ref_value,"a",%progbits
+	.set	.LANCHOR0,. + 0
+	.type	toshiba_A19ref_value, %object
+	.size	toshiba_A19ref_value, 45
+toshiba_A19ref_value:
+	.byte	4
+	.byte	5
+	.byte	6
+	.byte	7
+	.byte	13
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	4
+	.byte	4
+	.byte	124
+	.byte	126
+	.byte	0
+	.byte	0
+	.byte	124
+	.byte	120
+	.byte	120
+	.byte	0
+	.byte	124
+	.byte	118
+	.byte	116
+	.byte	114
+	.byte	0
+	.byte	8
+	.byte	8
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	11
+	.byte	126
+	.byte	118
+	.byte	116
+	.byte	0
+	.byte	16
+	.byte	118
+	.byte	114
+	.byte	112
+	.byte	0
+	.byte	2
+	.byte	0
+	.byte	126
+	.byte	124
+	.byte	0
+	.section	.rodata.toshiba_ref_value,"a",%progbits
+	.set	.LANCHOR3,. + 0
+	.type	toshiba_ref_value, %object
+	.size	toshiba_ref_value, 8
+toshiba_ref_value:
+	.byte	0
+	.byte	4
+	.byte	124
+	.byte	120
+	.byte	116
+	.byte	8
+	.byte	12
+	.byte	112
+	.section	.rodata.vpn_check.str1.1,"aMS",%progbits,1
+.LC115:
+	.ascii	"acblk = %x, tempblk = %x, gc_des = %x\012\000"
+.LC116:
+	.ascii	"acblk = %x, free page = %x, vpn = %x %x\012\000"
+.LC117:
+	.ascii	"tmp_blk = %x, free page = %x, vpn = %x %x\012\000"
+.LC118:
+	.ascii	"vpn_check lpa = %x, ppa = %x, blk = %x\012\000"
+.LC119:
+	.ascii	"l2p\000"
+.LC120:
+	.ascii	"vpn_check %x = c %x  s %x function: %x\012\000"
+.LC121:
+	.ascii	"vpn_check blk = %x fix vpc\012\000"
+	.hidden	free
diff --git a/drivers/rknand/rk_zftl_arm_v8.S b/drivers/rknand/rk_zftl_arm_v8.S
new file mode 100644
index 0000000000..856443654f
--- /dev/null
+++ b/drivers/rknand/rk_zftl_arm_v8.S
@@ -0,0 +1,22081 @@
+/*
+ * Copyright (c) 2016-2017, Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ * date: 2018-02-11
+ */
+	.arch armv8-a
+	.file	"rk_zftl_arm_v8.S"
+	.section	.text.flash_mem_cmp8,"ax",@progbits
+	.align	2
+	.type	flash_mem_cmp8, %function
+flash_mem_cmp8:
+	mov	x3, 0
+.L2:
+	mov	w4, w3
+	cmp	w3, w2
+	bcc	.L4
+	mov	w0, 0
+	ret
+.L4:
+	ldrb	w5, [x0, x3]
+	add	x3, x3, 1
+	add	x6, x1, x3
+	ldrb	w6, [x6, -1]
+	cmp	w6, w5
+	beq	.L2
+	add	w0, w4, 1
+	ret
+	.size	flash_mem_cmp8, .-flash_mem_cmp8
+	.section	.text.nand_flash_print_info,"ax",@progbits
+	.align	2
+	.global	nand_flash_print_info
+	.type	nand_flash_print_info, %function
+nand_flash_print_info:
+	ret
+	.size	nand_flash_print_info, .-nand_flash_print_info
+	.section	.text.FlashTimingCfg,"ax",@progbits
+	.align	2
+	.global	FlashTimingCfg
+	.type	FlashTimingCfg, %function
+FlashTimingCfg:
+	ret
+	.size	FlashTimingCfg, .-FlashTimingCfg
+	.section	.text.timer_delay_ns,"ax",@progbits
+	.align	2
+	.global	timer_delay_ns
+	.type	timer_delay_ns, %function
+timer_delay_ns:
+	sub	sp, sp, #16
+	lsr	w0, w0, 4
+	str	w0, [sp, 12]
+.L9:
+	ldr	w0, [sp, 12]
+	sub	w1, w0, #1
+	str	w1, [sp, 12]
+	cbnz	w0, .L9
+	add	sp, sp, 16
+	ret
+	.size	timer_delay_ns, .-timer_delay_ns
+	.section	.text.flash_read_status,"ax",@progbits
+	.align	2
+	.global	flash_read_status
+	.type	flash_read_status, %function
+flash_read_status:
+	stp	x29, x30, [sp, -16]!
+	mov	x2, x0
+	mov	w0, 112
+	add	x29, sp, 0
+	str	w0, [x2, 8]
+	mov	w0, 120
+	bl	timer_delay_ns
+	ldr	w0, [x2]
+	ldp	x29, x30, [sp], 16
+	and	w0, w0, 255
+	ret
+	.size	flash_read_status, .-flash_read_status
+	.section	.text.toshiba_set_rr_para,"ax",@progbits
+	.align	2
+	.global	toshiba_set_rr_para
+	.type	toshiba_set_rr_para, %function
+toshiba_set_rr_para:
+	and	w11, w1, 255
+	mov	x4, x0
+	add	w2, w11, 1
+	mov	w0, 5
+	adrp	x6, .LANCHOR4
+	add	x6, x6, :lo12:.LANCHOR4
+	adrp	x3, .LANCHOR0
+	add	x3, x3, :lo12:.LANCHOR0
+	umull	x2, w2, w0
+	adrp	x0, .LANCHOR1
+	add	x7, x0, :lo12:.LANCHOR1
+	mov	x5, x0
+	ldrb	w0, [x6]
+	add	x3, x3, x2
+	add	x7, x7, x2
+	adrp	x8, .LANCHOR2
+	mov	x2, 0
+	adrp	x10, .LANCHOR3
+	add	x8, x8, :lo12:.LANCHOR2
+	add	x10, x10, :lo12:.LANCHOR3
+	cmp	w0, w2
+	bhi	.L22
+	ret
+.L16:
+	cmp	w0, 35
+	bne	.L18
+	ldrsb	w0, [x3, x2]
+	b	.L23
+.L18:
+	ldrsb	w0, [x10, w11, sxtw]
+	b	.L23
+.L22:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+.L19:
+	mov	w0, 85
+	str	w0, [x4, 8]
+	add	x0, x5, :lo12:.LANCHOR1
+	ldrsb	w0, [x2, x0]
+	str	w0, [x4, 4]
+	mov	w0, 200
+	bl	timer_delay_ns
+	ldrb	w0, [x8]
+	cmp	w0, 34
+	bne	.L16
+	ldrsb	w0, [x7, x2]
+.L23:
+	str	w0, [x4]
+	add	x2, x2, 1
+	ldrb	w0, [x6]
+	cmp	w0, w2
+	bhi	.L19
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	toshiba_set_rr_para, .-toshiba_set_rr_para
+	.section	.text.hynix_set_rr_para,"ax",@progbits
+	.align	2
+	.type	hynix_set_rr_para, %function
+hynix_set_rr_para:
+	adrp	x2, .LANCHOR5
+	and	w1, w1, 255
+	mov	x3, 32
+	and	w0, w0, 255
+	ldr	x2, [x2, #:lo12:.LANCHOR5]
+	mov	x4, 0
+	add	x6, x2, 128
+	add	x2, x2, 112
+	ldrb	w5, [x2, 1]
+	cmp	w5, w4, uxtb
+	umaddl	x3, w1, w5, x3
+	mov	w1, 160
+	umaddl	x1, w1, w0, x3
+	ubfiz	x0, x0, 8, 8
+	add	x2, x2, x1
+	adrp	x1, .LANCHOR6
+	ldr	x3, [x1, #:lo12:.LANCHOR6]
+	add	x3, x3, x0
+	mov	w0, 54
+	str	w0, [x3, 2056]
+	bhi	.L30
+	mov	w0, 22
+	str	w0, [x3, 2056]
+	ret
+.L30:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+.L26:
+	ldrb	w0, [x6, x4]
+	str	w0, [x3, 2052]
+	mov	w0, 120
+	bl	timer_delay_ns
+	ldrsb	w0, [x2, x4]
+	str	w0, [x3, 2048]
+	add	x4, x4, 1
+	cmp	w5, w4, uxtb
+	bhi	.L26
+	mov	w0, 22
+	str	w0, [x3, 2056]
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	hynix_set_rr_para, .-hynix_set_rr_para
+	.section	.text.hynix_reconfig_rr_para,"ax",@progbits
+	.align	2
+	.global	hynix_reconfig_rr_para
+	.type	hynix_reconfig_rr_para, %function
+hynix_reconfig_rr_para:
+	adrp	x1, .LANCHOR2
+	ldrb	w1, [x1, #:lo12:.LANCHOR2]
+	sub	w1, w1, #1
+	and	w1, w1, 255
+	cmp	w1, 6
+	bhi	.L37
+	adrp	x8, .LANCHOR5
+	and	w0, w0, 255
+	sxtw	x7, w0
+	ldr	x1, [x8, #:lo12:.LANCHOR5]
+	add	x1, x1, x7
+	ldrb	w1, [x1, 120]
+	cbz	w1, .L37
+	stp	x29, x30, [sp, -16]!
+	mov	w1, 0
+	add	x29, sp, 0
+	bl	hynix_set_rr_para
+	ldr	x0, [x8, #:lo12:.LANCHOR5]
+	add	x0, x0, x7
+	strb	wzr, [x0, 120]
+	ldp	x29, x30, [sp], 16
+	ret
+.L37:
+	ret
+	.size	hynix_reconfig_rr_para, .-hynix_reconfig_rr_para
+	.section	.text.nandc_set_ddr_para,"ax",@progbits
+	.align	2
+	.global	nandc_set_ddr_para
+	.type	nandc_set_ddr_para, %function
+nandc_set_ddr_para:
+	adrp	x1, .LANCHOR7
+	and	w0, w0, 255
+	adrp	x2, .LANCHOR6
+	ldrb	w1, [x1, #:lo12:.LANCHOR7]
+	ldr	x2, [x2, #:lo12:.LANCHOR6]
+	cmp	w1, 9
+	lsl	w1, w0, 16
+	lsl	w0, w0, 8
+	orr	w1, w1, w0
+	orr	w1, w1, 3
+	bne	.L41
+	str	w1, [x2, 80]
+	ret
+.L41:
+	str	w1, [x2, 304]
+	ret
+	.size	nandc_set_ddr_para, .-nandc_set_ddr_para
+	.section	.text.nandc_get_ddr_para,"ax",@progbits
+	.align	2
+	.global	nandc_get_ddr_para
+	.type	nandc_get_ddr_para, %function
+nandc_get_ddr_para:
+	adrp	x0, .LANCHOR7
+	ldrb	w0, [x0, #:lo12:.LANCHOR7]
+	cmp	w0, 9
+	adrp	x0, .LANCHOR6
+	ldr	x0, [x0, #:lo12:.LANCHOR6]
+	bne	.L44
+	ldr	w0, [x0, 80]
+.L46:
+	ubfx	x0, x0, 8, 8
+	ret
+.L44:
+	ldr	w0, [x0, 304]
+	b	.L46
+	.size	nandc_get_ddr_para, .-nandc_get_ddr_para
+	.section	.text.nandc_set_if_mode,"ax",@progbits
+	.align	2
+	.global	nandc_set_if_mode
+	.type	nandc_set_if_mode, %function
+nandc_set_if_mode:
+	adrp	x1, .LANCHOR6
+	and	w0, w0, 255
+	tst	w0, 6
+	ldr	x2, [x1, #:lo12:.LANCHOR6]
+	ldr	w1, [x2]
+	beq	.L48
+	tst	x0, 4
+	orr	w1, w1, 24576
+	adrp	x0, .LANCHOR7
+	and	w1, w1, -32769
+	orr	w1, w1, 196608
+	ldrb	w0, [x0, #:lo12:.LANCHOR7]
+	orr	w3, w1, 32768
+	csel	w1, w3, w1, ne
+	cmp	w0, 9
+	mov	w0, 4099
+	movk	w0, 0x10, lsl 16
+	bne	.L50
+	mov	w3, 8321
+	str	w3, [x2, 8]
+	str	w0, [x2, 80]
+	mov	w0, 38
+	str	w0, [x2, 84]
+	mov	w0, 39
+	str	w0, [x2, 84]
+.L51:
+	str	w1, [x2]
+	ret
+.L50:
+	mov	w3, 8322
+	str	w3, [x2, 344]
+	str	w0, [x2, 304]
+	mov	w0, 38
+	str	w0, [x2, 308]
+	mov	w0, 39
+	str	w0, [x2, 308]
+	b	.L51
+.L48:
+	and	w1, w1, -8193
+	b	.L51
+	.size	nandc_set_if_mode, .-nandc_set_if_mode
+	.section	.text.nandc_cs,"ax",@progbits
+	.align	2
+	.global	nandc_cs
+	.type	nandc_cs, %function
+nandc_cs:
+	adrp	x1, .LANCHOR6
+	mov	w2, 1
+	lsl	w0, w2, w0
+	ldr	x3, [x1, #:lo12:.LANCHOR6]
+	ldr	w1, [x3]
+	bfi	w1, w0, 0, 8
+	str	w1, [x3]
+	ret
+	.size	nandc_cs, .-nandc_cs
+	.section	.text.nandc_de_cs,"ax",@progbits
+	.align	2
+	.global	nandc_de_cs
+	.type	nandc_de_cs, %function
+nandc_de_cs:
+	adrp	x0, .LANCHOR6
+	ldr	x1, [x0, #:lo12:.LANCHOR6]
+	ldr	w0, [x1]
+	and	w0, w0, -256
+	and	w0, w0, -131073
+	str	w0, [x1]
+	ret
+	.size	nandc_de_cs, .-nandc_de_cs
+	.section	.text.flash_wait_device_ready_raw,"ax",@progbits
+	.align	2
+	.global	flash_wait_device_ready_raw
+	.type	flash_wait_device_ready_raw, %function
+flash_wait_device_ready_raw:
+	stp	x29, x30, [sp, -16]!
+	mov	w5, w1
+	adrp	x1, .LANCHOR8
+	and	w0, w0, 255
+	add	x29, sp, 0
+	ldrb	w1, [x1, #:lo12:.LANCHOR8]
+	cmp	w1, w0
+	bhi	.L57
+	adrp	x1, .LANCHOR9
+	adrp	x0, .LC0
+	mov	w2, 604
+	add	x1, x1, :lo12:.LANCHOR9
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L58:
+	b	.L58
+.L57:
+	adrp	x1, .LANCHOR10
+	add	x1, x1, :lo12:.LANCHOR10
+	mov	w7, w2
+	ldrb	w6, [x1, w0, sxtw]
+	adrp	x0, .LANCHOR6
+	ldr	x4, [x0, #:lo12:.LANCHOR6]
+	mov	w0, w6
+	bl	nandc_cs
+	ubfiz	x3, x6, 8, 8
+	add	x3, x4, x3
+	mov	w0, 120
+	and	w1, w5, 255
+	str	w0, [x3, 2056]
+	str	w1, [x3, 2052]
+	lsr	w1, w5, 8
+	str	w1, [x3, 2052]
+	lsr	w5, w5, 16
+	str	w5, [x3, 2052]
+.L65:
+	bl	timer_delay_ns
+	ldr	w2, [x3, 2048]
+	and	w2, w2, 255
+	bics	wzr, w7, w2
+	bne	.L60
+	cmp	w2, 255
+	beq	.L60
+	mov	w0, w6
+	bl	nandc_de_cs
+	ldp	x29, x30, [sp], 16
+	mov	w0, w2
+	ret
+.L60:
+	mov	w0, 20
+	b	.L65
+	.size	flash_wait_device_ready_raw, .-flash_wait_device_ready_raw
+	.section	.text.flash_wait_device_ready,"ax",@progbits
+	.align	2
+	.global	flash_wait_device_ready
+	.type	flash_wait_device_ready, %function
+flash_wait_device_ready:
+	mov	w2, w1
+	ubfx	x6, x0, 21, 3
+	and	w1, w0, 2097151
+	tst	x0, 50331648
+	bne	.L67
+	adrp	x0, .LANCHOR11
+	adrp	x5, .LANCHOR12
+	ldrb	w0, [x0, #:lo12:.LANCHOR11]
+	cbz	w0, .L68
+	ldrb	w0, [x5, #:lo12:.LANCHOR12]
+	cbz	w0, .L67
+.L68:
+	adrp	x0, .LANCHOR13
+	ldrh	w3, [x0, #:lo12:.LANCHOR13]
+	ldrb	w0, [x5, #:lo12:.LANCHOR12]
+	udiv	w4, w1, w3
+	mul	w4, w4, w3
+	sub	w3, w1, w4
+	cbz	w0, .L69
+	add	w1, w4, w3, lsl 1
+.L67:
+	mov	w0, w6
+	b	flash_wait_device_ready_raw
+.L69:
+	adrp	x5, .LANCHOR14
+	add	x5, x5, :lo12:.LANCHOR14
+	ldrh	w3, [x5, w3, uxtw 1]
+	add	w1, w3, w4
+	b	.L67
+	.size	flash_wait_device_ready, .-flash_wait_device_ready
+	.section	.text.nandc_wait_flash_ready,"ax",@progbits
+	.align	2
+	.global	nandc_wait_flash_ready
+	.type	nandc_wait_flash_ready, %function
+nandc_wait_flash_ready:
+	mov	w2, 34464
+	stp	x29, x30, [sp, -32]!
+	movk	w2, 0x1, lsl 16
+	adrp	x3, .LANCHOR6
+	add	x29, sp, 0
+.L78:
+	mov	w0, 100
+	bl	timer_delay_ns
+	ldr	x0, [x3, #:lo12:.LANCHOR6]
+	ldr	w0, [x0]
+	str	w0, [x29, 24]
+	ldr	w0, [x29, 24]
+	tbnz	x0, 9, .L79
+	subs	w2, w2, #1
+	bne	.L78
+	mov	w0, -1
+.L76:
+	ldp	x29, x30, [sp], 32
+	ret
+.L79:
+	mov	w0, 0
+	b	.L76
+	.size	nandc_wait_flash_ready, .-nandc_wait_flash_ready
+	.section	.text.sandisk_set_rr_para,"ax",@progbits
+	.align	2
+	.global	sandisk_set_rr_para
+	.type	sandisk_set_rr_para, %function
+sandisk_set_rr_para:
+	stp	x29, x30, [sp, -16]!
+	mov	x3, x0
+	and	w2, w1, 255
+	mov	w0, 239
+	add	x29, sp, 0
+	str	w0, [x3, 8]
+	mov	w0, 17
+	str	w0, [x3, 4]
+	mov	w0, 200
+	bl	timer_delay_ns
+	add	w1, w2, 1
+	adrp	x0, .LANCHOR4
+	adrp	x2, .LANCHOR0
+	add	x2, x2, :lo12:.LANCHOR0
+	ldrb	w4, [x0, #:lo12:.LANCHOR4]
+	adrp	x0, .LANCHOR2
+	ldrb	w5, [x0, #:lo12:.LANCHOR2]
+	mov	w0, 5
+	umull	x1, w1, w0
+	adrp	x0, .LANCHOR1
+	add	x0, x0, :lo12:.LANCHOR1
+	add	x2, x2, x1
+	add	x1, x0, x1
+	mov	x0, 0
+.L83:
+	cmp	w4, w0
+	bhi	.L86
+	ldp	x29, x30, [sp], 16
+	b	nandc_wait_flash_ready
+.L86:
+	cmp	w5, 67
+	bne	.L84
+	ldrsb	w6, [x1, x0]
+.L88:
+	add	x0, x0, 1
+	str	w6, [x3]
+	b	.L83
+.L84:
+	ldrsb	w6, [x2, x0]
+	b	.L88
+	.size	sandisk_set_rr_para, .-sandisk_set_rr_para
+	.section	.text.toshiba_3d_set_tlc_rr_para,"ax",@progbits
+	.align	2
+	.global	toshiba_3d_set_tlc_rr_para
+	.type	toshiba_3d_set_tlc_rr_para, %function
+toshiba_3d_set_tlc_rr_para:
+	mov	x4, x0
+	stp	x29, x30, [sp, -16]!
+	and	x2, x1, 255
+	mov	x1, 7
+	add	x29, sp, 0
+	mov	w6, 213
+	str	w6, [x4, 8]
+	str	wzr, [x4, 4]
+	nop // between mem op and mult-accumulate
+	madd	x1, x2, x1, x1
+	mov	w0, -119
+	str	w0, [x4, 4]
+	adrp	x0, .LANCHOR15
+	add	x0, x0, :lo12:.LANCHOR15
+	add	x5, x0, x1
+	ldrsb	w0, [x0, x1]
+	str	w0, [x4]
+	ldrsb	w0, [x5, 1]
+	str	w0, [x4]
+	ldrsb	w0, [x5, 2]
+	str	w0, [x4]
+	ldrsb	w0, [x5, 3]
+	str	w0, [x4]
+	bl	nandc_wait_flash_ready
+	ldp	x29, x30, [sp], 16
+	str	w6, [x4, 8]
+	str	wzr, [x4, 4]
+	mov	w0, -118
+	str	w0, [x4, 4]
+	ldrsb	w0, [x5, 4]
+	str	w0, [x4]
+	ldrsb	w0, [x5, 5]
+	str	w0, [x4]
+	ldrsb	w0, [x5, 6]
+	str	w0, [x4]
+	str	wzr, [x4]
+	b	nandc_wait_flash_ready
+	.size	toshiba_3d_set_tlc_rr_para, .-toshiba_3d_set_tlc_rr_para
+	.section	.text.toshiba_3d_set_slc_rr_para,"ax",@progbits
+	.align	2
+	.global	toshiba_3d_set_slc_rr_para
+	.type	toshiba_3d_set_slc_rr_para, %function
+toshiba_3d_set_slc_rr_para:
+	mov	w2, 213
+	str	w2, [x0, 8]
+	str	wzr, [x0, 4]
+	mov	w2, -117
+	str	w2, [x0, 4]
+	adrp	x2, .LANCHOR16
+	add	x2, x2, :lo12:.LANCHOR16
+	add	x1, x2, x1, uxtb
+	ldrsb	w1, [x1, 1]
+	str	w1, [x0]
+	str	wzr, [x0]
+	str	wzr, [x0]
+	str	wzr, [x0]
+	b	nandc_wait_flash_ready
+	.size	toshiba_3d_set_slc_rr_para, .-toshiba_3d_set_slc_rr_para
+	.section	.text.toshiba_tlc_set_rr_para,"ax",@progbits
+	.align	2
+	.global	toshiba_tlc_set_rr_para
+	.type	toshiba_tlc_set_rr_para, %function
+toshiba_tlc_set_rr_para:
+	mov	w6, 239
+	uxtw	x1, w1
+	cbz	w2, .L93
+	stp	x29, x30, [sp, -16]!
+	mov	x4, x0
+	mov	x2, 7
+	mov	w0, 18
+	add	x29, sp, 0
+	str	w6, [x4, 8]
+	mul	x1, x1, x2
+	str	w0, [x4, 4]
+	adrp	x0, .LANCHOR17
+	add	x0, x0, :lo12:.LANCHOR17
+	add	x5, x0, x1
+	ldrb	w0, [x0, x1]
+	str	w0, [x4]
+	ldrb	w0, [x5, 1]
+	str	w0, [x4]
+	ldrb	w0, [x5, 2]
+	str	w0, [x4]
+	ldrb	w0, [x5, 3]
+	str	w0, [x4]
+	bl	nandc_wait_flash_ready
+	str	w6, [x4, 8]
+	mov	w0, 19
+	str	w0, [x4, 4]
+	ldrb	w0, [x5, 4]
+	str	w0, [x4]
+	ldrb	w0, [x5, 5]
+	str	w0, [x4]
+	ldrb	w0, [x5, 6]
+	str	w0, [x4]
+	str	wzr, [x4]
+	ldp	x29, x30, [sp], 16
+.L96:
+	b	nandc_wait_flash_ready
+.L93:
+	str	w6, [x0, 8]
+	mov	w2, 20
+	str	w2, [x0, 4]
+	adrp	x2, .LANCHOR18
+	add	x2, x2, :lo12:.LANCHOR18
+	ldrb	w1, [x2, x1]
+	str	w1, [x0]
+	str	wzr, [x0]
+	str	wzr, [x0]
+	str	wzr, [x0]
+	b	.L96
+	.size	toshiba_tlc_set_rr_para, .-toshiba_tlc_set_rr_para
+	.section	.text.flash_enter_slc_mode,"ax",@progbits
+	.align	2
+	.global	flash_enter_slc_mode
+	.type	flash_enter_slc_mode, %function
+flash_enter_slc_mode:
+	adrp	x1, .LANCHOR11
+	and	x0, x0, 255
+	ldrb	w2, [x1, #:lo12:.LANCHOR11]
+	cbz	w2, .L99
+	adrp	x1, .LANCHOR6
+	cmp	w2, 1
+	ldr	x1, [x1, #:lo12:.LANCHOR6]
+	bne	.L101
+	adrp	x2, .LANCHOR19+29
+	ldrb	w2, [x2, #:lo12:.LANCHOR19+29]
+	cbz	w2, .L99
+	add	x0, x0, 8
+	add	x0, x1, x0, lsl 8
+	str	w2, [x0, 8]
+	ret
+.L101:
+	cmp	w2, 2
+	bne	.L99
+	adrp	x2, .LANCHOR20
+	ldrb	w3, [x2, #:lo12:.LANCHOR20]
+	cbz	w3, .L99
+	ubfiz	x0, x0, 8, 8
+	strb	wzr, [x2, #:lo12:.LANCHOR20]
+	add	x0, x1, x0
+	mov	w1, 239
+	str	w1, [x0, 2056]
+	mov	w1, 145
+	str	w1, [x0, 2052]
+	mov	w1, 1
+	str	wzr, [x0, 2048]
+	str	w1, [x0, 2048]
+	str	wzr, [x0, 2048]
+	str	wzr, [x0, 2048]
+	b	nandc_wait_flash_ready
+.L99:
+	ret
+	.size	flash_enter_slc_mode, .-flash_enter_slc_mode
+	.section	.text.flash_exit_slc_mode,"ax",@progbits
+	.align	2
+	.global	flash_exit_slc_mode
+	.type	flash_exit_slc_mode, %function
+flash_exit_slc_mode:
+	adrp	x1, .LANCHOR11
+	and	x0, x0, 255
+	ldrb	w2, [x1, #:lo12:.LANCHOR11]
+	cbz	w2, .L111
+	adrp	x1, .LANCHOR6
+	cmp	w2, 1
+	ldr	x1, [x1, #:lo12:.LANCHOR6]
+	bne	.L113
+	adrp	x2, .LANCHOR19+30
+	ldrb	w2, [x2, #:lo12:.LANCHOR19+30]
+	cbz	w2, .L111
+	add	x0, x0, 8
+	add	x0, x1, x0, lsl 8
+	str	w2, [x0, 8]
+	ret
+.L113:
+	cmp	w2, 2
+	bne	.L111
+	adrp	x3, .LANCHOR20
+	ldrb	w2, [x3, #:lo12:.LANCHOR20]
+	cbnz	w2, .L111
+	ubfiz	x0, x0, 8, 8
+	adrp	x2, .LANCHOR19+12
+	add	x0, x1, x0
+	mov	w1, 239
+	ldrb	w2, [x2, #:lo12:.LANCHOR19+12]
+	mov	w4, 4
+	str	w1, [x0, 2056]
+	cmp	w2, 2
+	mov	w1, 145
+	str	w1, [x0, 2052]
+	csel	w2, w2, w4, eq
+	str	w2, [x0, 2048]
+	mov	w1, 1
+	str	w1, [x0, 2048]
+	str	wzr, [x0, 2048]
+	str	wzr, [x0, 2048]
+	strb	w2, [x3, #:lo12:.LANCHOR20]
+	b	nandc_wait_flash_ready
+.L111:
+	ret
+	.size	flash_exit_slc_mode, .-flash_exit_slc_mode
+	.section	.text.flash_erase_duplane_block,"ax",@progbits
+	.align	2
+	.global	flash_erase_duplane_block
+	.type	flash_erase_duplane_block, %function
+flash_erase_duplane_block:
+	stp	x29, x30, [sp, -80]!
+	and	w0, w0, 255
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	and	w24, w1, 255
+	adrp	x1, .LANCHOR8
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	ldrb	w1, [x1, #:lo12:.LANCHOR8]
+	str	x25, [sp, 64]
+	cmp	w1, w0
+	bhi	.L124
+	adrp	x1, .LANCHOR21
+	adrp	x0, .LC0
+	mov	w2, 517
+	add	x1, x1, :lo12:.LANCHOR21
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L125:
+	b	.L125
+.L124:
+	adrp	x1, .LANCHOR10
+	add	x1, x1, :lo12:.LANCHOR10
+	mov	w22, w2
+	mov	w21, w3
+	ldrb	w20, [x1, w0, sxtw]
+	adrp	x0, .LANCHOR6
+	ldr	x25, [x0, #:lo12:.LANCHOR6]
+	adrp	x0, .LANCHOR22
+	and	x19, x20, 255
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	add	x23, x19, 8
+	add	x23, x25, x23, lsl 8
+	tbz	x0, 4, .L126
+	adrp	x0, .LC1
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L126:
+	bl	nandc_wait_flash_ready
+	mov	w0, w20
+	bl	nandc_cs
+	mov	w0, w20
+	cbnz	w24, .L127
+	bl	flash_enter_slc_mode
+.L128:
+	add	x25, x25, x19, lsl 8
+	mov	w0, 96
+	str	w0, [x25, 2056]
+	and	w0, w22, 255
+	str	w0, [x25, 2052]
+	lsr	w0, w22, 8
+	str	w0, [x25, 2052]
+	lsr	w0, w22, 16
+	str	w0, [x25, 2052]
+	adrp	x0, .LANCHOR23
+	ldrb	w0, [x0, #:lo12:.LANCHOR23]
+	cbnz	w0, .L132
+	mov	w0, 208
+	str	w0, [x25, 2056]
+	mov	w19, 5
+	bl	nandc_wait_flash_ready
+	mov	x0, x23
+	bl	flash_read_status
+	and	w5, w0, w19
+.L129:
+	mov	w0, 96
+	str	w0, [x25, 2056]
+	and	w0, w21, 255
+	str	w0, [x25, 2052]
+	lsr	w0, w21, 8
+	str	w0, [x25, 2052]
+	lsr	w21, w21, 16
+	str	w21, [x25, 2052]
+	mov	w0, 208
+	str	w0, [x25, 2056]
+	bl	nandc_wait_flash_ready
+	mov	x0, x23
+	bl	flash_read_status
+	mov	w6, w0
+	cbnz	w24, .L130
+	mov	w0, w20
+	bl	flash_exit_slc_mode
+.L130:
+	mov	w0, w20
+	mov	w19, 5
+	bl	nandc_de_cs
+	and	w19, w6, w19
+	orr	w19, w19, w5
+	cbz	w19, .L131
+	adrp	x0, .LC2
+	mov	w2, w6
+	mov	w1, w22
+	add	x0, x0, :lo12:.LC2
+	bl	printf
+.L131:
+	mov	w0, w19
+	ldr	x25, [sp, 64]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	ret
+.L127:
+	bl	flash_exit_slc_mode
+	b	.L128
+.L132:
+	mov	w5, 0
+	b	.L129
+	.size	flash_erase_duplane_block, .-flash_erase_duplane_block
+	.section	.text.flash_erase_block_en,"ax",@progbits
+	.align	2
+	.global	flash_erase_block_en
+	.type	flash_erase_block_en, %function
+flash_erase_block_en:
+	stp	x29, x30, [sp, -64]!
+	and	w0, w0, 255
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	and	w23, w1, 255
+	adrp	x1, .LANCHOR8
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	ldrb	w1, [x1, #:lo12:.LANCHOR8]
+	cmp	w1, w0
+	bhi	.L141
+	adrp	x1, .LANCHOR24
+	adrp	x0, .LC0
+	mov	w2, 561
+	add	x1, x1, :lo12:.LANCHOR24
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L142:
+	b	.L142
+.L141:
+	adrp	x1, .LANCHOR10
+	add	x1, x1, :lo12:.LANCHOR10
+	mov	w21, w2
+	ldrb	w20, [x1, w0, sxtw]
+	adrp	x0, .LANCHOR6
+	ldr	x24, [x0, #:lo12:.LANCHOR6]
+	adrp	x0, .LANCHOR22
+	and	x19, x20, 255
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	add	x22, x19, 8
+	add	x22, x24, x22, lsl 8
+	tbz	x0, 4, .L143
+	adrp	x0, .LC3
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC3
+	bl	printf
+.L143:
+	bl	nandc_wait_flash_ready
+	mov	w0, w20
+	bl	nandc_cs
+	mov	w0, w20
+	cbnz	w23, .L144
+	bl	flash_enter_slc_mode
+.L145:
+	add	x0, x24, x19, lsl 8
+	mov	w2, 96
+	and	w1, w21, 2097151
+	str	w2, [x0, 2056]
+	and	w2, w21, 255
+	str	w2, [x0, 2052]
+	lsr	w2, w1, 8
+	str	w2, [x0, 2052]
+	lsr	w1, w1, 16
+	str	w1, [x0, 2052]
+	mov	w1, 208
+	str	w1, [x0, 2056]
+	bl	nandc_wait_flash_ready
+	mov	x0, x22
+	bl	flash_read_status
+	mov	w5, w0
+	cbnz	w23, .L146
+	mov	w0, w20
+	bl	flash_exit_slc_mode
+.L146:
+	mov	w0, w20
+	mov	w19, 5
+	bl	nandc_de_cs
+	ands	w19, w5, w19
+	beq	.L147
+	adrp	x0, .LANCHOR13
+	mov	w2, w19
+	ldrh	w1, [x0, #:lo12:.LANCHOR13]
+	adrp	x0, .LC4
+	add	x0, x0, :lo12:.LC4
+	udiv	w1, w21, w1
+	bl	printf
+.L147:
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	ret
+.L144:
+	bl	flash_exit_slc_mode
+	b	.L145
+	.size	flash_erase_block_en, .-flash_erase_block_en
+	.section	.text.flash_erase_block,"ax",@progbits
+	.align	2
+	.global	flash_erase_block
+	.type	flash_erase_block, %function
+flash_erase_block:
+	mov	w2, w1
+	mov	w1, 0
+	b	flash_erase_block_en
+	.size	flash_erase_block, .-flash_erase_block
+	.section	.text.flash_erase_all,"ax",@progbits
+	.align	2
+	.global	flash_erase_all
+	.type	flash_erase_all, %function
+flash_erase_all:
+	stp	x29, x30, [sp, -80]!
+	adrp	x0, .LANCHOR19
+	add	x0, x0, :lo12:.LANCHOR19
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w19, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR13
+	stp	x21, x22, [sp, 32]
+	add	x23, x23, :lo12:.LANCHOR13
+	ldrh	w20, [x0, 14]
+	adrp	x22, .LANCHOR8
+	str	x25, [sp, 64]
+	add	x22, x22, :lo12:.LANCHOR8
+	adrp	x24, .LANCHOR10
+	ldrb	w1, [x0, 13]
+	mul	w20, w20, w1
+	and	w20, w20, 65535
+.L157:
+	ldrb	w0, [x22]
+	cmp	w0, w19
+	bhi	.L160
+	ldp	x19, x20, [sp, 16]
+	mov	w1, 0
+	ldp	x21, x22, [sp, 32]
+	adrp	x0, .LC5
+	ldp	x23, x24, [sp, 48]
+	add	x0, x0, :lo12:.LC5
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	b	printf
+.L160:
+	add	x0, x24, :lo12:.LANCHOR10
+	mov	w21, 0
+	ldrb	w25, [x0, w19, sxtw]
+.L158:
+	cmp	w20, w21, uxth
+	bhi	.L159
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L157
+.L159:
+	ldrh	w1, [x23]
+	mov	w0, w25
+	mul	w1, w1, w21
+	add	w21, w21, 1
+	bl	flash_erase_block
+	b	.L158
+	.size	flash_erase_all, .-flash_erase_all
+	.section	.text.flash_set_interface_mode,"ax",@progbits
+	.align	2
+	.global	flash_set_interface_mode
+	.type	flash_set_interface_mode, %function
+flash_set_interface_mode:
+	stp	x29, x30, [sp, -16]!
+	adrp	x1, .LANCHOR6
+	adrp	x5, .LANCHOR26
+	add	x5, x5, :lo12:.LANCHOR26
+	add	x29, sp, 0
+	ldr	x6, [x1, #:lo12:.LANCHOR6]
+	adrp	x1, .LANCHOR25
+	mov	x2, 0
+	mov	w11, 69
+	ldrb	w1, [x1, #:lo12:.LANCHOR25]
+	mov	w7, 239
+	mov	w8, 128
+	mov	w12, 1
+	and	w10, w1, 4
+	and	w4, w1, 1
+	mov	w13, 35
+	mov	w14, 5
+.L170:
+	lsl	x1, x2, 3
+	ldrb	w3, [x1, x5]
+	cmp	w3, 152
+	ccmp	w3, w11, 4, ne
+	beq	.L163
+	cmp	w3, 44
+	bne	.L164
+.L163:
+	cmp	w0, 1
+	bne	.L165
+	cbz	w4, .L164
+	add	x1, x6, x2, lsl 8
+	cmp	w3, 44
+	str	w7, [x1, 2056]
+	bne	.L166
+	str	w0, [x1, 2052]
+	str	w14, [x1, 2048]
+.L169:
+	str	wzr, [x1, 2048]
+	str	wzr, [x1, 2048]
+	str	wzr, [x1, 2048]
+.L164:
+	add	x2, x2, 1
+	cmp	x2, 4
+	bne	.L170
+	bl	nandc_wait_flash_ready
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+.L166:
+	str	w8, [x1, 2052]
+	str	w0, [x1, 2048]
+	b	.L169
+.L165:
+	cbz	w10, .L164
+	add	x1, x6, x2, lsl 8
+	cmp	w3, 44
+	str	w7, [x1, 2056]
+	bne	.L168
+	str	w12, [x1, 2052]
+	str	w13, [x1, 2048]
+	b	.L169
+.L168:
+	str	w8, [x1, 2052]
+	str	wzr, [x1, 2048]
+	b	.L169
+	.size	flash_set_interface_mode, .-flash_set_interface_mode
+	.section	.text.flash_reset,"ax",@progbits
+	.align	2
+	.global	flash_reset
+	.type	flash_reset, %function
+flash_reset:
+	adrp	x1, .LANCHOR6
+	ubfiz	x0, x0, 8, 8
+	add	x0, x0, 2048
+	ldr	x1, [x1, #:lo12:.LANCHOR6]
+	add	x1, x1, x0
+	mov	w0, 255
+	str	w0, [x1, 8]
+	b	nandc_wait_flash_ready
+	.size	flash_reset, .-flash_reset
+	.section	.text.flash_read_id,"ax",@progbits
+	.align	2
+	.global	flash_read_id
+	.type	flash_read_id, %function
+flash_read_id:
+	and	w6, w0, 255
+	stp	x29, x30, [sp, -16]!
+	adrp	x0, .LANCHOR6
+	mov	x5, x1
+	add	x29, sp, 0
+	ldr	x4, [x0, #:lo12:.LANCHOR6]
+	mov	w0, w6
+	bl	flash_reset
+	mov	w0, w6
+	bl	nandc_cs
+	ubfiz	x2, x6, 8, 8
+	add	x2, x4, x2
+	mov	w0, 144
+	str	w0, [x2, 2056]
+	mov	w0, 200
+	str	wzr, [x2, 2052]
+	bl	timer_delay_ns
+	ldr	w0, [x2, 2048]
+	ldp	x29, x30, [sp], 16
+	strb	w0, [x5]
+	ldr	w0, [x2, 2048]
+	strb	w0, [x5, 1]
+	ldr	w0, [x2, 2048]
+	strb	w0, [x5, 2]
+	ldr	w0, [x2, 2048]
+	strb	w0, [x5, 3]
+	ldr	w0, [x2, 2048]
+	strb	w0, [x5, 4]
+	ldr	w0, [x2, 2048]
+	strb	w0, [x5, 5]
+	ldr	w0, [x2, 2048]
+	strb	w0, [x5, 6]
+	ldr	w0, [x2, 2048]
+	strb	w0, [x5, 7]
+	mov	w0, w6
+	b	nandc_de_cs
+	.size	flash_read_id, .-flash_read_id
+	.section	.text.flash_read_spare,"ax",@progbits
+	.align	2
+	.global	flash_read_spare
+	.type	flash_read_spare, %function
+flash_read_spare:
+	stp	x29, x30, [sp, -16]!
+	mov	x5, x2
+	adrp	x2, .LANCHOR19+9
+	ubfiz	x0, x0, 8, 8
+	add	x29, sp, 0
+	ldrb	w3, [x2, #:lo12:.LANCHOR19+9]
+	adrp	x2, .LANCHOR6
+	ldr	x4, [x2, #:lo12:.LANCHOR6]
+	lsl	w3, w3, 9
+	add	x4, x4, x0
+	and	w0, w1, 255
+	str	wzr, [x4, 2056]
+	str	w3, [x4, 2052]
+	lsr	w3, w3, 8
+	str	w3, [x4, 2052]
+	str	w0, [x4, 2052]
+	lsr	w0, w1, 8
+	str	w0, [x4, 2052]
+	lsr	w1, w1, 16
+	str	w1, [x4, 2052]
+	mov	w0, 48
+	str	w0, [x4, 2056]
+	bl	nandc_wait_flash_ready
+	ldr	w0, [x4, 2048]
+	ldp	x29, x30, [sp], 16
+	strb	w0, [x5]
+	ret
+	.size	flash_read_spare, .-flash_read_spare
+	.section	.text.sandisk_prog_test_bad_block,"ax",@progbits
+	.align	2
+	.global	sandisk_prog_test_bad_block
+	.type	sandisk_prog_test_bad_block, %function
+sandisk_prog_test_bad_block:
+	stp	x29, x30, [sp, -16]!
+	adrp	x2, .LANCHOR6
+	and	w0, w0, 255
+	add	x29, sp, 0
+	ldr	x4, [x2, #:lo12:.LANCHOR6]
+	adrp	x2, .LANCHOR19
+	add	x3, x2, :lo12:.LANCHOR19
+	mov	x5, x2
+	sxtw	x2, w0
+	add	x2, x2, 8
+	ldrb	w3, [x3, 29]
+	add	x2, x4, x2, lsl 8
+	cbz	w3, .L185
+.L192:
+	ubfiz	x0, x0, 8, 8
+	str	w3, [x2, 8]
+	add	x4, x4, x0
+	mov	w0, 128
+	str	w0, [x4, 2056]
+	and	w0, w1, 255
+	str	wzr, [x4, 2052]
+	str	wzr, [x4, 2052]
+	str	w0, [x4, 2052]
+	lsr	w0, w1, 8
+	str	w0, [x4, 2052]
+	lsr	w1, w1, 16
+	str	w1, [x4, 2052]
+	mov	w0, 16
+	str	w0, [x4, 2056]
+	bl	nandc_wait_flash_ready
+	mov	w0, 112
+	str	w0, [x4, 2056]
+	mov	w0, 80
+	bl	timer_delay_ns
+	add	x2, x5, :lo12:.LANCHOR19
+	ldr	w0, [x4, 2048]
+	mov	w1, 5
+	and	w0, w0, w1
+	ldrb	w1, [x2, 30]
+	cbz	w1, .L184
+	str	w1, [x4, 2056]
+.L184:
+	ldp	x29, x30, [sp], 16
+	ret
+.L185:
+	mov	w3, 162
+	b	.L192
+	.size	sandisk_prog_test_bad_block, .-sandisk_prog_test_bad_block
+	.section	.text.nandc_bch_sel,"ax",@progbits
+	.align	2
+	.global	nandc_bch_sel
+	.type	nandc_bch_sel, %function
+nandc_bch_sel:
+	adrp	x2, .LANCHOR27
+	mov	w1, 1
+	strb	w0, [x2, #:lo12:.LANCHOR27]
+	adrp	x2, .LANCHOR7
+	ldrb	w2, [x2, #:lo12:.LANCHOR7]
+	cmp	w2, 9
+	adrp	x2, .LANCHOR6
+	ldr	x2, [x2, #:lo12:.LANCHOR6]
+	bne	.L194
+	str	w1, [x2, 16]
+	cmp	w0, 70
+	beq	.L201
+	cmp	w0, 60
+	beq	.L202
+	cmp	w0, 40
+	cset	w1, eq
+	add	w1, w1, 1
+.L195:
+	lsl	w1, w1, 25
+	orr	w1, w1, 1
+	str	w1, [x2, 32]
+	ret
+.L201:
+	mov	w1, 0
+	b	.L195
+.L202:
+	mov	w1, 3
+	b	.L195
+.L194:
+	str	w1, [x2, 8]
+	cmp	w0, 16
+	mov	w1, 4096
+	bne	.L197
+.L200:
+	and	w1, w1, -17
+.L198:
+	orr	w1, w1, 1
+	str	w1, [x2, 12]
+	ret
+.L197:
+	cmp	w0, 24
+	bne	.L199
+	orr	w1, w1, 16
+	b	.L198
+.L199:
+	orr	w1, w1, 262144
+	cmp	w0, 40
+	orr	w1, w1, 16
+	bne	.L198
+	b	.L200
+	.size	nandc_bch_sel, .-nandc_bch_sel
+	.section	.text.NandCIrqEnable,"ax",@progbits
+	.align	2
+	.global	NandCIrqEnable
+	.type	NandCIrqEnable, %function
+NandCIrqEnable:
+	ret
+	.size	NandCIrqEnable, .-NandCIrqEnable
+	.section	.text.NandCIrqDisable,"ax",@progbits
+	.align	2
+	.global	NandCIrqDisable
+	.type	NandCIrqDisable, %function
+NandCIrqDisable:
+	ret
+	.size	NandCIrqDisable, .-NandCIrqDisable
+	.section	.text.rk_nandc_get_irq_status,"ax",@progbits
+	.align	2
+	.global	rk_nandc_get_irq_status
+	.type	rk_nandc_get_irq_status, %function
+rk_nandc_get_irq_status:
+	adrp	x1, .LANCHOR7
+	ldrb	w1, [x1, #:lo12:.LANCHOR7]
+	cmp	w1, 9
+	bne	.L210
+	ldr	w0, [x0, 296]
+	ret
+.L210:
+	ldr	w0, [x0, 372]
+	ret
+	.size	rk_nandc_get_irq_status, .-rk_nandc_get_irq_status
+	.section	.text.rk_nandc_flash_ready,"ax",@progbits
+	.align	2
+	.global	rk_nandc_flash_ready
+	.type	rk_nandc_flash_ready, %function
+rk_nandc_flash_ready:
+	ret
+	.size	rk_nandc_flash_ready, .-rk_nandc_flash_ready
+	.section	.text.NandcIqrWaitFlashReady,"ax",@progbits
+	.align	2
+	.global	NandcIqrWaitFlashReady
+	.type	NandcIqrWaitFlashReady, %function
+NandcIqrWaitFlashReady:
+	ret
+	.size	NandcIqrWaitFlashReady, .-NandcIqrWaitFlashReady
+	.section	.text.rk_nandc_flash_xfer_completed,"ax",@progbits
+	.align	2
+	.global	rk_nandc_flash_xfer_completed
+	.type	rk_nandc_flash_xfer_completed, %function
+rk_nandc_flash_xfer_completed:
+	ret
+	.size	rk_nandc_flash_xfer_completed, .-rk_nandc_flash_xfer_completed
+	.section	.text.nandc_xfer_start,"ax",@progbits
+	.align	2
+	.global	nandc_xfer_start
+	.type	nandc_xfer_start, %function
+nandc_xfer_start:
+	stp	x29, x30, [sp, -64]!
+	and	w1, w1, 255
+	adrp	x4, .LANCHOR30
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	and	w23, w0, 255
+	adrp	x0, .LANCHOR7
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	add	w20, w1, 1
+	ldrb	w0, [x0, #:lo12:.LANCHOR7]
+	adrp	x24, .LANCHOR6
+	cmp	w0, 9
+	bne	.L216
+	ubfiz	w19, w23, 1, 1
+	mov	w0, 1
+	orr	w19, w19, 8
+	asr	w20, w20, 1
+	bfi	w19, w0, 5, 2
+	adrp	x0, .LANCHOR28
+	orr	w19, w19, 536870912
+	ldrb	w0, [x0, #:lo12:.LANCHOR28]
+	orr	w19, w19, 1024
+	and	w19, w19, -17
+	bfi	w19, w20, 22, 6
+	cbz	w0, .L217
+	adrp	x0, .LANCHOR29
+	ldrb	w1, [x0, #:lo12:.LANCHOR29]
+	orr	w0, w19, 512
+	cmp	w1, 0
+	csel	w19, w0, w19, ne
+.L217:
+	add	x21, x4, :lo12:.LANCHOR30
+	add	x0, x2, 63
+	and	w20, w20, 63
+	and	x0, x0, -64
+	ubfiz	x1, x20, 10, 6
+	ubfiz	x20, x20, 2, 6
+	add	x1, x0, x1
+	stp	x2, x3, [x21, 8]
+	and	x0, x2, -64
+	stp	w2, w3, [x21, 24]
+	bl	flush_dcache_range
+	ldr	x0, [x21, 16]
+	add	x1, x0, 63
+	and	x0, x0, -64
+	and	x1, x1, -64
+	add	x1, x1, x20
+	bl	flush_dcache_range
+	ldr	x1, [x24, #:lo12:.LANCHOR6]
+	mov	w0, 1
+	str	w0, [x21, 32]
+	mov	w2, 16
+	ldr	w0, [x21, 24]
+	cmp	w23, 0
+	str	w0, [x1, 52]
+	ldr	w0, [x21, 28]
+	str	w0, [x1, 56]
+	ldr	w0, [x1, 48]
+	bfi	w0, w2, 9, 5
+	mov	w2, 2
+	orr	w0, w0, 448
+	bfi	w0, w2, 3, 3
+	cset	w2, eq
+	orr	w0, w0, 4
+	bfi	w0, w2, 1, 1
+	adrp	x2, .LANCHOR31
+	orr	w0, w0, 1
+	ldrh	w2, [x2, #:lo12:.LANCHOR31]
+	bfi	w0, w2, 16, 11
+	str	w0, [x1, 48]
+	str	w19, [x1, 16]
+	orr	w19, w19, 4
+	str	w19, [x1, 16]
+.L215:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	ret
+.L216:
+	ldr	x0, [x24, #:lo12:.LANCHOR6]
+	ubfiz	w19, w23, 1, 1
+	orr	w19, w19, 8
+	asr	w20, w20, 1
+	ldr	w22, [x0, 12]
+	mov	w0, 16
+	bfi	w22, w0, 8, 8
+	mov	w0, 1
+	bfi	w19, w0, 5, 2
+	and	w22, w22, -9
+	orr	w19, w19, 536870912
+	and	w22, w22, -225
+	orr	w19, w19, 1024
+	and	w19, w19, -17
+	bfi	w19, w20, 22, 6
+	cbz	w23, .L219
+	adrp	x0, .LANCHOR27
+	ubfx	x1, x1, 1, 7
+	ldr	x8, [x4, #:lo12:.LANCHOR30]
+	add	x1, x3, x1, lsl 2
+	ldrb	w0, [x0, #:lo12:.LANCHOR27]
+	mov	w5, 128
+	cmp	w0, 24
+	mov	w0, 64
+	csel	w5, w5, w0, hi
+	mov	w0, 0
+.L221:
+	add	w7, w5, w0
+	cmp	x3, x1
+	bne	.L222
+.L223:
+	add	x21, x4, :lo12:.LANCHOR30
+	ldr	x0, [x4, #:lo12:.LANCHOR30]
+	and	w20, w20, 63
+	ubfiz	x1, x20, 10, 6
+	ubfiz	x20, x20, 7, 6
+	stp	x2, x0, [x21, 8]
+	stp	w2, w0, [x21, 24]
+	add	x0, x2, 63
+	and	x0, x0, -64
+	add	x1, x0, x1
+	and	x0, x2, -64
+	bl	flush_dcache_range
+	ldr	x0, [x21, 16]
+	add	x1, x0, 63
+	and	x0, x0, -64
+	and	x1, x1, -64
+	add	x1, x1, x20
+	bl	flush_dcache_range
+	ldr	x1, [x24, #:lo12:.LANCHOR6]
+	mov	w0, 1
+	str	w0, [x21, 32]
+	cmp	w23, 0
+	ldr	w0, [x21, 24]
+	cset	w2, eq
+	str	w0, [x1, 20]
+	ldr	w0, [x21, 28]
+	str	w0, [x1, 24]
+	mov	w0, 8660
+	bfi	w0, w2, 1, 1
+	orr	w0, w0, 1
+	str	w0, [x1, 16]
+	str	w22, [x1, 12]
+	str	w19, [x1, 8]
+	orr	w19, w19, 4
+	str	w19, [x1, 8]
+	b	.L215
+.L222:
+	ldrh	w10, [x3]
+	and	x0, x0, 4294967292
+	ldrh	w6, [x3, 2]
+	add	x3, x3, 4
+	orr	x6, x10, x6, lsl 16
+	str	w6, [x8, x0]
+	mov	w0, w7
+	b	.L221
+.L219:
+	ldr	x1, [x4, #:lo12:.LANCHOR30]
+	str	w0, [x1]
+	b	.L223
+	.size	nandc_xfer_start, .-nandc_xfer_start
+	.section	.text.nandc_set_seed,"ax",@progbits
+	.align	2
+	.global	nandc_set_seed
+	.type	nandc_set_seed, %function
+nandc_set_seed:
+	and	x0, x0, 127
+	adrp	x1, .LANCHOR32
+	add	x1, x1, :lo12:.LANCHOR32
+	ldrh	w0, [x1, x0, lsl 1]
+	adrp	x1, .LANCHOR29
+	ldrb	w2, [x1, #:lo12:.LANCHOR29]
+	orr	w1, w0, -1073741824
+	cmp	w2, 0
+	csel	w0, w1, w0, ne
+	adrp	x1, .LANCHOR7
+	ldrb	w1, [x1, #:lo12:.LANCHOR7]
+	cmp	w1, 9
+	adrp	x1, .LANCHOR6
+	ldr	x1, [x1, #:lo12:.LANCHOR6]
+	bne	.L233
+	str	w0, [x1, 520]
+	ret
+.L233:
+	str	w0, [x1, 336]
+	ret
+	.size	nandc_set_seed, .-nandc_set_seed
+	.section	.text.flash_start_page_read,"ax",@progbits
+	.align	2
+	.global	flash_start_page_read
+	.type	flash_start_page_read, %function
+flash_start_page_read:
+	stp	x29, x30, [sp, -16]!
+	and	w10, w0, 255
+	adrp	x0, .LANCHOR8
+	ubfx	x2, x1, 21, 3
+	add	x29, sp, 0
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	cmp	w0, w2
+	bhi	.L238
+	adrp	x1, .LANCHOR33
+	adrp	x0, .LC0
+	mov	w2, 738
+	add	x1, x1, :lo12:.LANCHOR33
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L239:
+	b	.L239
+.L238:
+	adrp	x0, .LANCHOR10
+	add	x0, x0, :lo12:.LANCHOR10
+	and	w5, w1, 2097151
+	ubfx	x8, x1, 24, 2
+	ldrb	w7, [x0, w2, sxtw]
+	adrp	x0, .LANCHOR6
+	ldr	x6, [x0, #:lo12:.LANCHOR6]
+	mov	w0, w7
+	bl	nandc_cs
+	adrp	x11, .LANCHOR34
+	cbnz	w8, .L240
+	adrp	x0, .LANCHOR11
+	ldrb	w1, [x0, #:lo12:.LANCHOR11]
+	adrp	x0, .LANCHOR12
+	cbz	w1, .L241
+	ldrb	w1, [x0, #:lo12:.LANCHOR12]
+	cbz	w1, .L242
+.L241:
+	adrp	x1, .LANCHOR13
+	ldrb	w0, [x0, #:lo12:.LANCHOR12]
+	ldrh	w1, [x1, #:lo12:.LANCHOR13]
+	udiv	w2, w5, w1
+	mul	w2, w2, w1
+	sub	w5, w5, w2
+	cbz	w0, .L243
+	add	w5, w2, w5, lsl 1
+.L242:
+	mov	w0, w7
+	bl	flash_enter_slc_mode
+	b	.L244
+.L243:
+	adrp	x3, .LANCHOR14
+	add	x3, x3, :lo12:.LANCHOR14
+	ldrh	w5, [x3, w5, uxtw 1]
+	add	w5, w5, w2
+.L244:
+	ubfiz	x2, x7, 8, 8
+	and	w0, w5, 255
+	add	x2, x6, x2
+	str	wzr, [x2, 2056]
+	str	wzr, [x2, 2052]
+	str	wzr, [x2, 2052]
+	str	w0, [x2, 2052]
+	lsr	w0, w5, 8
+	str	w0, [x2, 2052]
+	lsr	w0, w5, 16
+	str	w0, [x2, 2052]
+	ldr	x0, [x11, #:lo12:.LANCHOR34]
+	str	w10, [x2, 2056]
+	ldrb	w0, [x0, 12]
+	cmp	w0, 3
+	bne	.L246
+	cbz	w8, .L246
+	add	w5, w5, w5, lsl 1
+	sub	w0, w8, #1
+	add	w0, w5, w0
+.L255:
+	bl	nandc_set_seed
+	ldp	x29, x30, [sp], 16
+	mov	w0, 0
+	b	nandc_de_cs
+.L240:
+	ldr	x0, [x11, #:lo12:.LANCHOR34]
+	ldrb	w0, [x0, 12]
+	cmp	w0, 3
+	bne	.L245
+	sxtw	x0, w7
+	add	x0, x0, 8
+	add	x0, x6, x0, lsl 8
+	str	w8, [x0, 8]
+	b	.L244
+.L245:
+	mov	w0, w7
+	bl	flash_exit_slc_mode
+	b	.L244
+.L246:
+	mov	w0, w5
+	b	.L255
+	.size	flash_start_page_read, .-flash_start_page_read
+	.section	.text.FlashDeInit,"ax",@progbits
+	.align	2
+	.global	FlashDeInit
+	.type	FlashDeInit, %function
+FlashDeInit:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	bl	nandc_wait_flash_ready
+	mov	w0, 0
+	bl	hynix_reconfig_rr_para
+	adrp	x15, .LANCHOR35
+	ldrb	w0, [x15, #:lo12:.LANCHOR35]
+	cbz	w0, .L257
+	adrp	x0, .LANCHOR25
+	ldrb	w0, [x0, #:lo12:.LANCHOR25]
+	tbz	x0, 0, .L257
+	mov	w0, 1
+	bl	flash_set_interface_mode
+	mov	w0, 1
+	bl	nandc_set_if_mode
+	strb	wzr, [x15, #:lo12:.LANCHOR35]
+.L257:
+	adrp	x3, .LANCHOR29
+	ldrb	w0, [x3, #:lo12:.LANCHOR29]
+	cbz	w0, .L258
+	mov	w0, 0
+	strb	wzr, [x3, #:lo12:.LANCHOR29]
+	bl	nandc_set_seed
+	mov	w0, 1
+	strb	w0, [x3, #:lo12:.LANCHOR29]
+.L258:
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	FlashDeInit, .-FlashDeInit
+	.section	.text.nandc_randomizer_enable,"ax",@progbits
+	.align	2
+	.global	nandc_randomizer_enable
+	.type	nandc_randomizer_enable, %function
+nandc_randomizer_enable:
+	adrp	x1, .LANCHOR29
+	strb	w0, [x1, #:lo12:.LANCHOR29]
+	ret
+	.size	nandc_randomizer_enable, .-nandc_randomizer_enable
+	.section	.text.nandc_get_chip_if,"ax",@progbits
+	.align	2
+	.global	nandc_get_chip_if
+	.type	nandc_get_chip_if, %function
+nandc_get_chip_if:
+	adrp	x1, .LANCHOR6
+	ubfiz	x0, x0, 8, 8
+	add	x0, x0, 2048
+	ldr	x1, [x1, #:lo12:.LANCHOR6]
+	add	x0, x1, x0
+	ret
+	.size	nandc_get_chip_if, .-nandc_get_chip_if
+	.section	.text.buf_reinit,"ax",@progbits
+	.align	2
+	.global	buf_reinit
+	.type	buf_reinit, %function
+buf_reinit:
+	adrp	x0, .LANCHOR36
+	add	x1, x0, :lo12:.LANCHOR36
+	mov	w2, 0
+.L272:
+	and	w3, w2, 255
+	strb	wzr, [x1, 2]
+	add	w4, w3, 1
+	strb	w3, [x1, 1]
+	strb	w4, [x1]
+	add	w2, w2, 1
+	str	xzr, [x1, 16]
+	cmp	w2, 32
+	add	x1, x1, 64
+	bne	.L272
+	add	x0, x0, :lo12:.LANCHOR36
+	mov	w1, -1
+	strb	w1, [x0, 1984]
+	adrp	x0, .LANCHOR37
+	strb	wzr, [x0, #:lo12:.LANCHOR37]
+	adrp	x0, .LANCHOR38
+	strb	w2, [x0, #:lo12:.LANCHOR38]
+	ret
+	.size	buf_reinit, .-buf_reinit
+	.section	.text.buf_add_tail,"ax",@progbits
+	.align	2
+	.global	buf_add_tail
+	.type	buf_add_tail, %function
+buf_add_tail:
+	stp	x29, x30, [sp, -16]!
+	mov	w2, -1
+	add	x29, sp, 0
+	strb	w2, [x1]
+	ldrb	w3, [x0]
+	cmp	w3, 255
+	bne	.L282
+	ldrb	w1, [x1, 1]
+	cmp	w1, 255
+	bne	.L276
+	adrp	x1, .LANCHOR39
+	adrp	x0, .LC0
+	mov	w2, 74
+	add	x1, x1, :lo12:.LANCHOR39
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L277:
+	b	.L277
+.L276:
+	strb	w1, [x0]
+.L274:
+	ldp	x29, x30, [sp], 16
+	ret
+.L279:
+	sbfiz	x0, x0, 6, 32
+	strb	w1, [x2, x0]
+	b	.L274
+.L282:
+	adrp	x2, .LANCHOR36
+	add	x2, x2, :lo12:.LANCHOR36
+.L283:
+	mov	w0, w3
+	sbfiz	x3, x3, 6, 32
+	ldrb	w3, [x2, x3]
+	cmp	w3, 255
+	bne	.L283
+	ldrb	w1, [x1, 1]
+	cmp	w1, 255
+	bne	.L279
+	adrp	x1, .LANCHOR39
+	adrp	x0, .LC0
+	mov	w2, 81
+	add	x1, x1, :lo12:.LANCHOR39
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L280:
+	b	.L280
+	.size	buf_add_tail, .-buf_add_tail
+	.section	.text.buf_free,"ax",@progbits
+	.align	2
+	.global	buf_free
+	.type	buf_free, %function
+buf_free:
+	ldrb	w1, [x0, 2]
+	adrp	x2, .LANCHOR37
+	and	w1, w1, 8
+	strb	w1, [x0, 2]
+	cbz	w1, .L286
+	stp	x29, x30, [sp, -16]!
+	mov	x1, x0
+	add	x0, x2, :lo12:.LANCHOR37
+	add	x29, sp, 0
+	bl	buf_add_tail
+	adrp	x1, .LANCHOR38
+	ldp	x29, x30, [sp], 16
+	ldrb	w0, [x1, #:lo12:.LANCHOR38]
+	add	w0, w0, 1
+	strb	w0, [x1, #:lo12:.LANCHOR38]
+	ret
+.L286:
+	ldrb	w1, [x2, #:lo12:.LANCHOR37]
+	strb	w1, [x0]
+	adrp	x1, .LANCHOR38
+	ldrb	w0, [x0, 1]
+	strb	w0, [x2, #:lo12:.LANCHOR37]
+	ldrb	w0, [x1, #:lo12:.LANCHOR38]
+	add	w0, w0, 1
+	strb	w0, [x1, #:lo12:.LANCHOR38]
+	ret
+	.size	buf_free, .-buf_free
+	.section	.text.buf_alloc,"ax",@progbits
+	.align	2
+	.global	buf_alloc
+	.type	buf_alloc, %function
+buf_alloc:
+	adrp	x1, .LANCHOR38
+	ldrb	w3, [x1, #:lo12:.LANCHOR38]
+	cbnz	w3, .L293
+	stp	x29, x30, [sp, -16]!
+	adrp	x1, .LANCHOR40
+	adrp	x0, .LC0
+	mov	w2, 121
+	add	x29, sp, 0
+	add	x1, x1, :lo12:.LANCHOR40
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L294:
+	b	.L294
+.L293:
+	adrp	x6, .LANCHOR37
+	and	w7, w0, 255
+	mov	x5, x1
+	adrp	x1, .LANCHOR36
+	ldrb	w2, [x6, #:lo12:.LANCHOR37]
+	add	x4, x1, :lo12:.LANCHOR36
+	ubfiz	x0, x2, 6, 8
+	add	x0, x4, x0
+	cbnz	w7, .L295
+	cmp	w3, 1
+	beq	.L297
+.L295:
+	add	x1, x1, :lo12:.LANCHOR36
+	sbfiz	x2, x2, 6, 32
+	add	x4, x1, x2
+	sub	w3, w3, #1
+	strb	w3, [x5, #:lo12:.LANCHOR38]
+	mov	w3, 1
+	ldrb	w7, [x1, x2]
+	strb	w3, [x4, 2]
+	mov	w3, -1
+	strb	w7, [x6, #:lo12:.LANCHOR37]
+	strb	w3, [x1, x2]
+	mov	w1, -1
+	strh	wzr, [x4, 50]
+	str	xzr, [x4, 16]
+	str	w1, [x4, 36]
+.L292:
+	ret
+.L297:
+	mov	x0, 0
+	b	.L292
+	.size	buf_alloc, .-buf_alloc
+	.section	.text.buf_remove_buf,"ax",@progbits
+	.align	2
+	.global	buf_remove_buf
+	.type	buf_remove_buf, %function
+buf_remove_buf:
+	ldrb	w4, [x1, 1]
+	ldrb	w2, [x0]
+	cmp	w4, w2
+	bne	.L304
+	ldrb	w1, [x1]
+	strb	w1, [x0]
+.L308:
+	mov	w0, 1
+	ret
+.L305:
+	mov	w3, w2
+	sbfiz	x2, x2, 6, 32
+	ldrb	w2, [x0, x2]
+	cmp	w4, w2
+	bne	.L306
+	sbfiz	x3, x3, 6, 32
+	ldrb	w2, [x1]
+	strb	w2, [x0, x3]
+	mov	w0, -1
+	strb	w0, [x1]
+	b	.L308
+.L304:
+	adrp	x0, .LANCHOR36
+	add	x0, x0, :lo12:.LANCHOR36
+.L306:
+	cmp	w2, 255
+	bne	.L305
+	mov	w0, 0
+	ret
+	.size	buf_remove_buf, .-buf_remove_buf
+	.section	.text.buf_remove_free,"ax",@progbits
+	.align	2
+	.global	buf_remove_free
+	.type	buf_remove_free, %function
+buf_remove_free:
+	stp	x29, x30, [sp, -16]!
+	adrp	x6, .LANCHOR38
+	mov	x5, x0
+	add	x29, sp, 0
+	ldrb	w0, [x6, #:lo12:.LANCHOR38]
+	cbnz	w0, .L310
+	adrp	x1, .LANCHOR41
+	adrp	x0, .LC0
+	mov	w2, 170
+	add	x1, x1, :lo12:.LANCHOR41
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L311:
+	b	.L311
+.L310:
+	mov	x1, x5
+	adrp	x0, .LANCHOR37
+	add	x0, x0, :lo12:.LANCHOR37
+	bl	buf_remove_buf
+	cmp	w0, 1
+	bne	.L309
+	ldrb	w0, [x6, #:lo12:.LANCHOR38]
+	sub	w0, w0, #1
+	strb	w0, [x6, #:lo12:.LANCHOR38]
+	ldrb	w0, [x5, 2]
+	orr	w0, w0, 1
+	strb	w0, [x5, 2]
+.L309:
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	buf_remove_free, .-buf_remove_free
+	.section	.text.flash_check_bad_block,"ax",@progbits
+	.align	2
+	.global	flash_check_bad_block
+	.type	flash_check_bad_block, %function
+flash_check_bad_block:
+	adrp	x3, .LANCHOR19
+	add	x3, x3, :lo12:.LANCHOR19
+	and	w5, w0, 255
+	lsr	w4, w1, 5
+	and	w1, w1, 31
+	ldrb	w0, [x3, 13]
+	ldrh	w2, [x3, 14]
+	mul	w2, w2, w0
+	mov	x0, 912
+	and	w2, w2, 65535
+	add	w2, w2, 31
+	asr	w2, w2, 5
+	lsl	w2, w2, 2
+	umaddl	x0, w2, w5, x0
+	adrp	x2, .LANCHOR5
+	ldr	x2, [x2, #:lo12:.LANCHOR5]
+	add	x0, x0, x4, uxtw 2
+	ldr	w0, [x2, x0]
+	lsr	w0, w0, w1
+	and	w0, w0, 1
+	ret
+	.size	flash_check_bad_block, .-flash_check_bad_block
+	.section	.text.flash_mask_bad_block,"ax",@progbits
+	.align	2
+	.global	flash_mask_bad_block
+	.type	flash_mask_bad_block, %function
+flash_mask_bad_block:
+	stp	x29, x30, [sp, -48]!
+	mov	w2, w1
+	add	x29, sp, 0
+	str	x21, [sp, 32]
+	and	w21, w0, 255
+	adrp	x0, .LANCHOR19
+	add	x0, x0, :lo12:.LANCHOR19
+	stp	x19, x20, [sp, 16]
+	mov	w20, w1
+	ldrh	w19, [x0, 14]
+	ldrb	w1, [x0, 13]
+	adrp	x0, .LC6
+	add	x0, x0, :lo12:.LC6
+	mul	w19, w19, w1
+	mov	w1, w21
+	bl	printf
+	and	w19, w19, 65535
+	lsr	w0, w20, 5
+	add	w1, w19, 31
+	mov	x19, 912
+	asr	w1, w1, 5
+	and	w20, w20, 31
+	lsl	w1, w1, 2
+	umaddl	x1, w1, w21, x19
+	ldr	x21, [sp, 32]
+	add	x1, x1, x0, uxtw 2
+	adrp	x0, .LANCHOR5
+	ldr	x2, [x0, #:lo12:.LANCHOR5]
+	mov	w0, 1
+	lsl	w0, w0, w20
+	ldr	w20, [x2, x1]
+	orr	w20, w20, w0
+	str	w20, [x2, x1]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+	.size	flash_mask_bad_block, .-flash_mask_bad_block
+	.section	.text.ftl_gc_write_buf,"ax",@progbits
+	.align	2
+	.global	ftl_gc_write_buf
+	.type	ftl_gc_write_buf, %function
+ftl_gc_write_buf:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	ldrb	w1, [x0, 2]
+	orr	w1, w1, 2
+	strb	w1, [x0, 2]
+	mov	x1, x0
+	adrp	x0, .LANCHOR42
+	add	x0, x0, :lo12:.LANCHOR42
+	bl	buf_add_tail
+	adrp	x1, .LANCHOR43
+	ldp	x29, x30, [sp], 16
+	ldrb	w0, [x1, #:lo12:.LANCHOR43]
+	add	w0, w0, 1
+	and	w0, w0, 255
+	strb	w0, [x1, #:lo12:.LANCHOR43]
+	ret
+	.size	ftl_gc_write_buf, .-ftl_gc_write_buf
+	.section	.text.ftl_write_buf,"ax",@progbits
+	.align	2
+	.global	ftl_write_buf
+	.type	ftl_write_buf, %function
+ftl_write_buf:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	cbnz	x0, .L320
+	adrp	x1, .LANCHOR44
+	adrp	x0, .LC0
+	mov	w2, 539
+	add	x1, x1, :lo12:.LANCHOR44
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L321:
+	b	.L321
+.L320:
+	adrp	x2, .LANCHOR45
+	ldrb	w1, [x0, 56]
+	mov	x19, x0
+	ldrb	w2, [x2, #:lo12:.LANCHOR45]
+	cmp	w2, w1
+	bcs	.L322
+	adrp	x1, .LANCHOR44
+	adrp	x0, .LC0
+	mov	w2, 544
+	add	x1, x1, :lo12:.LANCHOR44
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L323:
+	b	.L323
+.L322:
+	adrp	x20, .LANCHOR43
+	cbnz	w1, .L324
+	bl	buf_free
+	ldrb	w0, [x20, #:lo12:.LANCHOR43]
+.L319:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L324:
+	mov	x1, x0
+	adrp	x0, .LANCHOR42
+	add	x0, x0, :lo12:.LANCHOR42
+	bl	buf_add_tail
+	adrp	x1, .LANCHOR46
+	ldrb	w3, [x19, 56]
+	ldrb	w0, [x20, #:lo12:.LANCHOR43]
+	ldr	x1, [x1, #:lo12:.LANCHOR46]
+	add	w0, w0, 1
+	and	w0, w0, 255
+	strb	w0, [x20, #:lo12:.LANCHOR43]
+	ldr	w2, [x1, 16]
+	add	w2, w2, w3
+	str	w2, [x1, 16]
+	ldr	w2, [x1, 32]
+	add	w2, w2, 1
+	str	w2, [x1, 32]
+	b	.L319
+	.size	ftl_write_buf, .-ftl_write_buf
+	.section	.text.ftl_cache_flush,"ax",@progbits
+	.align	2
+	.global	ftl_cache_flush
+	.type	ftl_cache_flush, %function
+ftl_cache_flush:
+	ret
+	.size	ftl_cache_flush, .-ftl_cache_flush
+	.section	.text.ftl_read_buf,"ax",@progbits
+	.align	2
+	.global	ftl_read_buf
+	.type	ftl_read_buf, %function
+ftl_read_buf:
+	stp	x29, x30, [sp, -32]!
+	adrp	x2, .LANCHOR47
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	ldr	w2, [x2, #:lo12:.LANCHOR47]
+	cmp	w2, w0
+	bhi	.L329
+	adrp	x1, .LANCHOR48
+	adrp	x0, .LC0
+	mov	w2, 771
+	add	x1, x1, :lo12:.LANCHOR48
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L330:
+	b	.L330
+.L329:
+	adrp	x19, .LANCHOR36
+	add	x3, x19, :lo12:.LANCHOR36
+	add	x3, x3, 2
+	mov	w2, 0
+.L333:
+	ldr	w4, [x3, 34]
+	cmp	w0, w4
+	bne	.L331
+	ldrb	w4, [x3]
+	tbz	x4, 3, .L331
+	add	x19, x19, :lo12:.LANCHOR36
+	ubfiz	x2, x2, 6, 32
+	add	x19, x19, x2
+	orr	w0, w4, 4
+	strb	w0, [x19, 2]
+	tbnz	x4, 0, .L328
+	mov	x0, x19
+	bl	buf_remove_free
+.L328:
+	mov	x0, x19
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L331:
+	add	w2, w2, 1
+	add	x3, x3, 64
+	cmp	w2, 32
+	bne	.L333
+	adrp	x2, .LANCHOR49
+	ldr	w3, [x2, #:lo12:.LANCHOR49]
+	cmn	w3, #1
+	bne	.L334
+	str	w0, [x2, #:lo12:.LANCHOR49]
+	adrp	x0, .LANCHOR50
+	str	x1, [x0, #:lo12:.LANCHOR50]
+.L334:
+	mov	x19, 0
+	b	.L328
+	.size	ftl_read_buf, .-ftl_read_buf
+	.section	.text.ftl_read_buf_free,"ax",@progbits
+	.align	2
+	.global	ftl_read_buf_free
+	.type	ftl_read_buf_free, %function
+ftl_read_buf_free:
+	mov	x5, x0
+	stp	x29, x30, [sp, -16]!
+	mov	x1, x0
+	adrp	x0, .LANCHOR51
+	add	x29, sp, 0
+	add	x0, x0, :lo12:.LANCHOR51
+	bl	buf_remove_buf
+	ldrb	w0, [x5, 2]
+	tbz	x0, 1, .L341
+	and	w0, w0, -5
+	strb	w0, [x5, 2]
+	ldp	x29, x30, [sp], 16
+	ret
+.L341:
+	ldp	x29, x30, [sp], 16
+	mov	x0, x5
+	b	buf_free
+	.size	ftl_read_buf_free, .-ftl_read_buf_free
+	.section	.text.ftl_get_density,"ax",@progbits
+	.align	2
+	.global	ftl_get_density
+	.type	ftl_get_density, %function
+ftl_get_density:
+	cbnz	w0, .L346
+	adrp	x0, .LANCHOR52
+	ldr	w0, [x0, #:lo12:.LANCHOR52]
+	ret
+.L346:
+	cmp	w0, 4
+	cset	w0, cc
+	lsl	w0, w0, 13
+	ret
+	.size	ftl_get_density, .-ftl_get_density
+	.section	.text.gc_hook,"ax",@progbits
+	.align	2
+	.global	gc_hook
+	.type	gc_hook, %function
+gc_hook:
+	ret
+	.size	gc_hook, .-gc_hook
+	.section	.text.FtlGetCurEraseBlock,"ax",@progbits
+	.align	2
+	.global	FtlGetCurEraseBlock
+	.type	FtlGetCurEraseBlock, %function
+FtlGetCurEraseBlock:
+	adrp	x0, .LANCHOR53
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+	ret
+	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
+	.section	.text.FtlGetAllBlockNum,"ax",@progbits
+	.align	2
+	.global	FtlGetAllBlockNum
+	.type	FtlGetAllBlockNum, %function
+FtlGetAllBlockNum:
+	adrp	x0, .LANCHOR54
+	ldrh	w0, [x0, #:lo12:.LANCHOR54]
+	ret
+	.size	FtlGetAllBlockNum, .-FtlGetAllBlockNum
+	.section	.text.FtlLowFormat,"ax",@progbits
+	.align	2
+	.global	FtlLowFormat
+	.type	FtlLowFormat, %function
+FtlLowFormat:
+	mov	w0, 0
+	ret
+	.size	FtlLowFormat, .-FtlLowFormat
+	.section	.text.gc_add_sblk,"ax",@progbits
+	.align	2
+	.global	gc_add_sblk
+	.type	gc_add_sblk, %function
+gc_add_sblk:
+	stp	x29, x30, [sp, -64]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w19, w0, 65535
+	adrp	x0, .LANCHOR54
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	ldrh	w0, [x0, #:lo12:.LANCHOR54]
+	cmp	w0, w19
+	bhi	.L354
+	adrp	x1, .LANCHOR55
+	adrp	x0, .LC0
+	mov	w2, 240
+	add	x1, x1, :lo12:.LANCHOR55
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L355:
+	b	.L355
+.L354:
+	adrp	x0, .LANCHOR56
+	uxtw	x20, w19
+	and	w21, w1, 65535
+	and	w22, w2, 65535
+	ldr	x0, [x0, #:lo12:.LANCHOR56]
+	adrp	x24, .LANCHOR59
+	ldrh	w23, [x0, x20, lsl 1]
+	adrp	x0, .LANCHOR22
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	tbz	x0, 8, .L356
+	ldr	x0, [x24, #:lo12:.LANCHOR59]
+	mov	w4, w23
+	mov	w2, w21
+	mov	w1, w19
+	add	x0, x0, x20, lsl 2
+	ldrb	w3, [x0, 2]
+	adrp	x0, .LANCHOR57
+	ldrh	w6, [x0, #:lo12:.LANCHOR57]
+	adrp	x0, .LANCHOR58+56
+	ubfx	x3, x3, 5, 3
+	ldrh	w5, [x0, #:lo12:.LANCHOR58+56]
+	adrp	x0, .LC7
+	add	x0, x0, :lo12:.LC7
+	bl	printf
+.L356:
+	ldr	x0, [x24, #:lo12:.LANCHOR59]
+	add	x20, x0, x20, lsl 2
+	ldrb	w0, [x20, 2]
+	tst	w0, 224
+	bne	.L357
+	cbz	w23, .L371
+	adrp	x1, .LANCHOR55
+	adrp	x0, .LC0
+	mov	w2, 245
+	add	x1, x1, :lo12:.LANCHOR55
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L359:
+	b	.L359
+.L357:
+	adrp	x1, .LANCHOR58
+	add	x0, x1, :lo12:.LANCHOR58
+	ldrh	w1, [x1, #:lo12:.LANCHOR58]
+	cmp	w1, w19
+	beq	.L371
+	adrp	x1, .LANCHOR60
+	ldr	x2, [x1, #:lo12:.LANCHOR60]
+	ldrh	w1, [x2, 48]
+	cmp	w1, w19
+	beq	.L371
+	ldrh	w1, [x2, 16]
+	cmp	w1, w19
+	beq	.L371
+	ldrh	w1, [x2, 80]
+	cmp	w1, w19
+	beq	.L371
+	ldrh	w3, [x0, 56]
+	add	x0, x0, 58
+	mov	w1, 0
+.L360:
+	cmp	w1, w3
+	bcc	.L361
+	ubfiz	x1, x22, 7, 16
+	add	x0, x2, 392
+	add	x1, x1, 136
+	cmp	w21, 0
+	add	x1, x2, x1
+	mov	w3, 65535
+	csel	x0, x1, x0, eq
+	add	x1, x0, 128
+.L365:
+	ldrh	w4, [x0]
+	cmp	w4, w3
+	bne	.L363
+	strh	w19, [x0]
+	cbz	w21, .L364
+	ldrh	w0, [x2, 124]
+	add	w0, w0, 1
+	strh	w0, [x2, 124]
+.L379:
+	mov	w0, 1
+.L353:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	ret
+.L361:
+	ldrh	w4, [x0], 2
+	cmp	w4, w19
+	beq	.L371
+	add	w1, w1, 1
+	b	.L360
+.L364:
+	add	x2, x2, x22, uxth 1
+	ldrh	w0, [x2, 120]
+	add	w0, w0, 1
+	strh	w0, [x2, 120]
+	b	.L379
+.L363:
+	add	x0, x0, 2
+	cmp	x1, x0
+	bne	.L365
+	b	.L379
+.L371:
+	mov	w0, 0
+	b	.L353
+	.size	gc_add_sblk, .-gc_add_sblk
+	.section	.text.gc_get_src_ppa_from_index,"ax",@progbits
+	.align	2
+	.global	gc_get_src_ppa_from_index
+	.type	gc_get_src_ppa_from_index, %function
+gc_get_src_ppa_from_index:
+	adrp	x1, .LANCHOR61
+	ubfiz	x0, x0, 2, 16
+	ldr	x1, [x1, #:lo12:.LANCHOR61]
+	ldr	w0, [x1, x0]
+	ret
+	.size	gc_get_src_ppa_from_index, .-gc_get_src_ppa_from_index
+	.section	.text.gc_write_completed,"ax",@progbits
+	.align	2
+	.global	gc_write_completed
+	.type	gc_write_completed, %function
+gc_write_completed:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR36
+	stp	x21, x22, [sp, 32]
+	add	x24, x23, :lo12:.LANCHOR36
+	adrp	x22, .LANCHOR62
+	add	x22, x22, :lo12:.LANCHOR62
+	stp	x19, x20, [sp, 16]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+.L382:
+	ldrb	w19, [x22]
+	cmp	w19, 255
+	bne	.L395
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	ret
+.L395:
+	lsl	x1, x19, 6
+	add	x0, x23, :lo12:.LANCHOR36
+	add	x2, x0, x1
+	ldrb	w0, [x0, x1]
+	ldr	w1, [x2, 52]
+	strb	w0, [x22]
+	ldrh	w26, [x2, 48]
+	cbz	w1, .L383
+	ldr	w2, [x2, 40]
+	adrp	x0, .LANCHOR58
+	add	x0, x0, :lo12:.LANCHOR58
+	mov	w3, 1
+	str	w2, [x0, 320]
+	strh	w3, [x0, 318]
+	adrp	x0, .LC8
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+	adrp	x1, .LANCHOR63
+	adrp	x0, .LC0
+	mov	w2, 502
+	add	x1, x1, :lo12:.LANCHOR63
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L384:
+	b	.L384
+.L383:
+	adrp	x0, .LANCHOR64
+	mov	x28, x0
+	ldrb	w1, [x0, #:lo12:.LANCHOR64]
+	cmp	w1, 3
+	bne	.L396
+	adrp	x0, .LANCHOR60
+	ldr	x0, [x0, #:lo12:.LANCHOR60]
+	ldrb	w20, [x0, 89]
+	add	w20, w20, w20, lsl 1
+	and	w20, w20, 1023
+.L385:
+	adrp	x0, .LANCHOR22
+	adrp	x27, .LANCHOR65
+	and	x21, x26, 65535
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	tbz	x0, 8, .L386
+	ldr	x1, [x27, #:lo12:.LANCHOR65]
+	add	x0, x24, x19, lsl 6
+	mov	w3, w26
+	ldrb	w2, [x0, 1]
+	adrp	x0, .LC9
+	ldrb	w4, [x1, x21]
+	add	x0, x0, :lo12:.LC9
+	mov	w1, w26
+	bl	printf
+.L386:
+	ldr	x0, [x27, #:lo12:.LANCHOR65]
+	add	x19, x24, x19, lsl 6
+	mov	x25, x21
+	add	x2, x0, x21
+	ldrb	w1, [x0, x21]
+	ldrb	w0, [x19, 1]
+	cmp	w1, w0
+	beq	.L387
+	adrp	x1, .LANCHOR63
+	adrp	x0, .LC0
+	mov	w2, 509
+	add	x1, x1, :lo12:.LANCHOR63
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L388:
+	b	.L388
+.L396:
+	mov	w20, 1
+	b	.L385
+.L387:
+	ldrb	w0, [x19, 61]
+	cmp	w0, 3
+	beq	.L389
+	ldrb	w0, [x28, #:lo12:.LANCHOR64]
+	cmp	w0, 3
+	bne	.L389
+	adrp	x0, .LANCHOR66
+	ldrb	w0, [x0, #:lo12:.LANCHOR66]
+	cbnz	w0, .L389
+	mov	x0, 0
+.L390:
+	cmp	w20, w0, uxth
+	bls	.L382
+	ldrb	w1, [x2, x0]
+	add	x0, x0, 1
+	add	x1, x24, x1, lsl 6
+	strb	wzr, [x1, 61]
+	b	.L390
+.L389:
+	adrp	x19, .LANCHOR58
+	add	x19, x19, :lo12:.LANCHOR58
+	add	x20, x21, x20, uxth
+	mov	w21, -1
+	strh	w26, [x19, 316]
+.L391:
+	cmp	x25, x20
+	beq	.L382
+	ldr	x1, [x27, #:lo12:.LANCHOR65]
+	ldrb	w0, [x1, x25]
+	strb	w21, [x1, x25]
+	add	x25, x25, 1
+	sbfiz	x1, x0, 6, 32
+	ubfiz	x0, x0, 6, 8
+	add	x1, x24, x1
+	add	x0, x24, x0
+	strb	wzr, [x1, 61]
+	bl	buf_free
+	ldrb	w0, [x19, 7]
+	sub	w0, w0, #1
+	strb	w0, [x19, 7]
+	b	.L391
+	.size	gc_write_completed, .-gc_write_completed
+	.section	.text.gc_get_src_blk,"ax",@progbits
+	.align	2
+	.global	gc_get_src_blk
+	.type	gc_get_src_blk, %function
+gc_get_src_blk:
+	adrp	x0, .LANCHOR60
+	ldr	x2, [x0, #:lo12:.LANCHOR60]
+	adrp	x0, .LANCHOR67
+	ldrb	w3, [x0, #:lo12:.LANCHOR67]
+	ldrh	w0, [x2, 124]
+	cbz	w0, .L405
+	add	x1, x2, 392
+	mov	w4, 1
+.L406:
+	add	x5, x1, 128
+	mov	w6, 65535
+.L410:
+	ldrh	w0, [x1]
+	cmp	w0, w6
+	beq	.L408
+	mov	w5, -1
+	strh	w5, [x1]
+	cbz	w4, .L409
+	ldrh	w1, [x2, 124]
+	sub	w1, w1, #1
+	strh	w1, [x2, 124]
+	ret
+.L405:
+	add	x0, x2, x3, sxtw 1
+	ldrh	w0, [x0, 120]
+	cbz	w0, .L411
+	ubfiz	x1, x3, 7, 8
+	mov	w4, 0
+	add	x1, x1, 136
+	add	x1, x2, x1
+	b	.L406
+.L409:
+	add	x2, x2, x3, uxtb 1
+	ldrh	w1, [x2, 120]
+	sub	w1, w1, #1
+	strh	w1, [x2, 120]
+	ret
+.L408:
+	add	x1, x1, 2
+	cmp	x1, x5
+	bne	.L410
+	ret
+.L411:
+	mov	w0, 65535
+	ret
+	.size	gc_get_src_blk, .-gc_get_src_blk
+	.section	.text.gc_free_temp_buf,"ax",@progbits
+	.align	2
+	.global	gc_free_temp_buf
+	.type	gc_free_temp_buf, %function
+gc_free_temp_buf:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR58
+	add	x0, x20, :lo12:.LANCHOR58
+	stp	x21, x22, [sp, 32]
+	ldrb	w1, [x0, 7]
+	cbz	w1, .L420
+	adrp	x1, .LANCHOR38
+	ldrb	w1, [x1, #:lo12:.LANCHOR38]
+	cmp	w1, 1
+	bhi	.L420
+	ldrh	w19, [x0, 316]
+	adrp	x2, .LANCHOR69
+	adrp	x0, .LANCHOR68
+	adrp	x21, .LANCHOR65
+	ldrb	w2, [x2, #:lo12:.LANCHOR69]
+	add	w1, w19, 24
+	ldrh	w0, [x0, #:lo12:.LANCHOR68]
+	ldr	x4, [x21, #:lo12:.LANCHOR65]
+	mul	w0, w0, w2
+	cmp	w0, w1
+	csel	w1, w0, w1, ls
+	adrp	x0, .LANCHOR36
+	add	x0, x0, :lo12:.LANCHOR36
+.L415:
+	cmp	w19, w1
+	bcc	.L418
+.L420:
+	mov	w0, 0
+	b	.L413
+.L418:
+	uxtw	x22, w19
+	ldrb	w2, [x4, x22]
+	cmp	w2, 255
+	beq	.L416
+	sbfiz	x3, x2, 6, 32
+	add	x3, x0, x3
+	ldrb	w3, [x3, 61]
+	cbnz	w3, .L416
+	ubfiz	x2, x2, 6, 8
+	add	x0, x0, x2
+	bl	buf_free
+	adrp	x0, .LANCHOR22
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	tbz	x0, 8, .L417
+	ldr	x0, [x21, #:lo12:.LANCHOR65]
+	mov	w1, w19
+	ldrb	w2, [x0, x22]
+	adrp	x0, .LC10
+	add	x0, x0, :lo12:.LC10
+	bl	printf
+.L417:
+	ldr	x0, [x21, #:lo12:.LANCHOR65]
+	add	x20, x20, :lo12:.LANCHOR58
+	mov	w1, -1
+	strb	w1, [x0, x22]
+	ldrb	w0, [x20, 7]
+	sub	w0, w0, #1
+	strb	w0, [x20, 7]
+	mov	w0, 1
+.L413:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
+.L416:
+	add	w19, w19, 1
+	b	.L415
+	.size	gc_free_temp_buf, .-gc_free_temp_buf
+	.section	.text.gc_static_wearleveling,"ax",@progbits
+	.align	2
+	.global	gc_static_wearleveling
+	.type	gc_static_wearleveling, %function
+gc_static_wearleveling:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR46
+	stp	x19, x20, [sp, 16]
+	ldr	x5, [x21, #:lo12:.LANCHOR46]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	ldr	w0, [x5, 32]
+	cmp	w0, 20480
+	bls	.L429
+	ldr	w1, [x5, 36]
+	add	w1, w1, w0, lsr 10
+	and	w0, w0, 1023
+	stp	w0, w1, [x5, 32]
+.L429:
+	adrp	x0, .LANCHOR60
+	ldr	w3, [x5, 36]
+	ldr	x0, [x0, #:lo12:.LANCHOR60]
+	ldr	w1, [x0, 568]
+	ldr	w2, [x0, 12]
+	add	w1, w1, 12959744
+	add	w1, w1, 256
+	cmp	w2, w1
+	bhi	.L430
+	ldr	w1, [x0, 572]
+	add	w1, w1, 128
+	cmp	w3, w1
+	bls	.L428
+.L430:
+	adrp	x23, .LANCHOR59
+	ldrh	w10, [x5, 134]
+	adrp	x22, .LANCHOR54
+	mov	w20, 65535
+	ldr	x8, [x23, #:lo12:.LANCHOR59]
+	mov	w19, w20
+	ldrh	w11, [x22, #:lo12:.LANCHOR54]
+	mov	w12, w20
+	str	w2, [x0, 568]
+	mov	w4, 0
+	add	x8, x8, x10, uxth 2
+	str	w3, [x0, 572]
+	mov	w1, 0
+	mov	w25, 0
+	mov	w24, 0
+	mov	w3, 0
+	mov	w2, 0
+.L432:
+	cmp	w10, w11
+	bcc	.L436
+	ldrh	w0, [x5, 96]
+	cmp	w0, w25
+	bcs	.L437
+	strh	w25, [x5, 96]
+.L437:
+	ldrh	w0, [x5, 98]
+	cmp	w0, w24
+	bcs	.L438
+	strh	w24, [x5, 98]
+.L438:
+	udiv	w3, w3, w1
+	adrp	x0, .LANCHOR22
+	mov	x26, x0
+	udiv	w4, w4, w2
+	strh	w3, [x5, 88]
+	strh	w4, [x5, 90]
+	ldr	w5, [x0, #:lo12:.LANCHOR22]
+	tbz	x5, 8, .L439
+	adrp	x0, .LC11
+	and	w4, w4, 65535
+	and	w3, w3, 65535
+	add	x0, x0, :lo12:.LC11
+	bl	printf
+.L439:
+	ldr	w0, [x26, #:lo12:.LANCHOR22]
+	tbz	x0, 8, .L440
+	adrp	x0, .LC12
+	mov	w4, w24
+	mov	w3, w25
+	mov	w2, w19
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC12
+	bl	printf
+.L440:
+	sub	w0, w24, w19
+	cmp	w0, 64
+	bgt	.L441
+.L447:
+	cbnz	w19, .L442
+.L448:
+	cbz	w20, .L428
+	ldr	x2, [x21, #:lo12:.LANCHOR46]
+	ldr	x1, [x23, #:lo12:.LANCHOR59]
+	ldrh	w5, [x22, #:lo12:.LANCHOR54]
+	ldrh	w0, [x2, 134]
+	add	x1, x1, x0, uxth 2
+.L453:
+	cmp	w0, w5
+	bcc	.L455
+	ldrh	w0, [x2, 74]
+	add	w0, w20, w0
+	strh	w0, [x2, 74]
+	ldrh	w0, [x2, 96]
+	cmp	w20, w0
+	bcs	.L428
+	sub	w20, w0, w20
+	strh	w20, [x2, 96]
+.L428:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L436:
+	ldrb	w0, [x8, 2]
+	tbz	x0, 3, .L433
+	ldr	w0, [x8]
+	ldrh	w7, [x8]
+	ubfx	x0, x0, 11, 8
+	and	w6, w7, 2047
+.L434:
+	cmp	w6, w20
+	add	w1, w1, 1
+	csel	w20, w6, w20, cc
+	cmp	w6, w25
+	add	w3, w3, w6
+	csel	w6, w6, w25, hi
+	and	w1, w1, 65535
+	and	w20, w20, 65535
+	and	w25, w6, 65535
+	cmp	w0, w12
+	bne	.L456
+	b	.L457
+.L433:
+	tst	w0, 24
+	bne	.L435
+	ldrh	w7, [x8]
+	mov	w0, 65535
+	and	w6, w7, 2047
+	b	.L434
+.L435:
+	ldr	w0, [x8]
+	ubfx	x0, x0, 11, 8
+.L456:
+	cmp	w0, w19
+	add	w2, w2, 1
+	csel	w19, w0, w19, cc
+	cmp	w0, w24
+	add	w4, w4, w0
+	csel	w0, w0, w24, hi
+	and	w2, w2, 65535
+	and	w19, w19, 65535
+	and	w24, w0, 65535
+.L457:
+	add	w10, w10, 1
+	add	x8, x8, 4
+	and	w10, w10, 65535
+	b	.L432
+.L441:
+	ldr	x0, [x21, #:lo12:.LANCHOR46]
+	add	x25, x22, :lo12:.LANCHOR54
+	ldrh	w24, [x0, 134]
+.L444:
+	ldrh	w0, [x25]
+	cmp	w0, w24
+	bls	.L447
+	ldr	x2, [x23, #:lo12:.LANCHOR59]
+	ubfiz	x1, x24, 2, 16
+	add	x0, x2, x1
+	ldrb	w0, [x0, 2]
+	tst	w0, 192
+	beq	.L445
+	and	w3, w0, 224
+	cmp	w3, 224
+	beq	.L445
+	tbz	x0, 4, .L445
+	ldr	w0, [x2, x1]
+	ubfx	x0, x0, 11, 8
+	cmp	w0, w19
+	bhi	.L445
+	mov	w2, 1
+	mov	w0, w24
+	mov	w1, w2
+	bl	gc_add_sblk
+.L445:
+	add	w24, w24, 1
+	and	w24, w24, 65535
+	b	.L444
+.L442:
+	ldr	x2, [x21, #:lo12:.LANCHOR46]
+	ldr	x1, [x23, #:lo12:.LANCHOR59]
+	ldrh	w5, [x22, #:lo12:.LANCHOR54]
+	ldrh	w0, [x2, 134]
+	add	x1, x1, x0, uxth 2
+.L449:
+	cmp	w0, w5
+	bcc	.L451
+	ldrh	w0, [x2, 72]
+	add	w0, w19, w0
+	strh	w0, [x2, 72]
+	ldrh	w0, [x2, 98]
+	cmp	w19, w0
+	bcs	.L448
+	sub	w19, w0, w19
+	strh	w19, [x2, 98]
+	b	.L448
+.L451:
+	ldr	w3, [x1]
+	ubfx	x4, x3, 11, 8
+	cmp	w19, w4
+	bhi	.L450
+	sub	w4, w4, w19
+	bfi	w3, w4, 11, 8
+	str	w3, [x1]
+.L450:
+	add	w0, w0, 1
+	add	x1, x1, 4
+	and	w0, w0, 65535
+	b	.L449
+.L455:
+	ldrh	w3, [x1]
+	and	w4, w3, 2047
+	cmp	w4, w20
+	blt	.L454
+	sub	w4, w4, w20
+	bfi	w3, w4, 0, 11
+	strh	w3, [x1]
+.L454:
+	add	w0, w0, 1
+	add	x1, x1, 4
+	and	w0, w0, 65535
+	b	.L453
+	.size	gc_static_wearleveling, .-gc_static_wearleveling
+	.section	.text.print_gc_debug_info,"ax",@progbits
+	.align	2
+	.global	print_gc_debug_info
+	.type	print_gc_debug_info, %function
+print_gc_debug_info:
+	adrp	x1, .LANCHOR58
+	add	x0, x1, :lo12:.LANCHOR58
+	adrp	x2, .LANCHOR38
+	ldrh	w1, [x1, #:lo12:.LANCHOR58]
+	ldrb	w5, [x0, 7]
+	ldrb	w4, [x2, #:lo12:.LANCHOR38]
+	ldrh	w3, [x0, 314]
+	ldrh	w2, [x0, 2]
+	adrp	x0, .LC13
+	add	x0, x0, :lo12:.LC13
+	b	printf
+	.size	print_gc_debug_info, .-print_gc_debug_info
+	.section	.text.ftl_get_blk_list_in_sblk,"ax",@progbits
+	.align	2
+	.global	ftl_get_blk_list_in_sblk
+	.type	ftl_get_blk_list_in_sblk, %function
+ftl_get_blk_list_in_sblk:
+	adrp	x2, .LANCHOR59
+	and	w0, w0, 65535
+	adrp	x6, .LANCHOR71
+	add	x6, x6, :lo12:.LANCHOR71
+	ldr	x2, [x2, #:lo12:.LANCHOR59]
+	mov	w3, 0
+	mov	w12, 21
+	add	x2, x2, x0, uxth 2
+	ldrb	w11, [x2, 3]
+	adrp	x2, .LANCHOR69
+	ldrb	w8, [x2, #:lo12:.LANCHOR69]
+	adrp	x2, .LANCHOR70
+	ldrb	w5, [x2, #:lo12:.LANCHOR70]
+	mul	w0, w0, w5
+	and	w4, w0, 65535
+	mov	w0, 0
+.L479:
+	cmp	w3, w8
+	blt	.L483
+	sxtw	x2, w0
+	mov	w3, -1
+.L484:
+	cmp	w8, w2
+	bgt	.L485
+	ret
+.L483:
+	asr	w2, w11, w3
+	tbnz	x2, 0, .L480
+	sdiv	w2, w3, w5
+	ldrh	w7, [x6]
+	sbfiz	x10, x0, 1, 32
+	cmp	w5, 1
+	sub	w7, w12, w7
+	lsl	w2, w2, w7
+	add	w2, w4, w2
+	and	w2, w2, 65535
+	bhi	.L481
+.L486:
+	add	w0, w0, 1
+	strh	w2, [x1, x10]
+.L480:
+	add	w3, w3, 1
+	b	.L479
+.L481:
+	and	w7, w3, 1
+	add	w2, w2, w7
+	b	.L486
+.L485:
+	strh	w3, [x1, x2, lsl 1]
+	add	x2, x2, 1
+	b	.L484
+	.size	ftl_get_blk_list_in_sblk, .-ftl_get_blk_list_in_sblk
+	.section	.text.ftl_alloc_sblk,"ax",@progbits
+	.align	2
+	.global	ftl_alloc_sblk
+	.type	ftl_alloc_sblk, %function
+ftl_alloc_sblk:
+.L488:
+	stp	x29, x30, [sp, -64]!
+	mov	w6, 2
+	mov	w7, 0
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w20, w0
+	adrp	x0, .LANCHOR54
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR46
+	cmp	w20, 5
+	ldrh	w11, [x0, #:lo12:.LANCHOR54]
+	adrp	x0, .LANCHOR59
+	ldr	x1, [x22, #:lo12:.LANCHOR46]
+	mov	w19, 65535
+	ldr	x12, [x0, #:lo12:.LANCHOR59]
+	mov	w14, w11
+	str	x23, [sp, 48]
+	mov	w5, w19
+	csel	w23, wzr, w6, ne
+	mov	w13, w19
+	csel	w6, w6, wzr, ne
+.L503:
+	ldrh	w4, [x1, 132]
+	mov	w0, w4
+	add	x3, x12, x4, uxth 2
+.L489:
+	cmp	w0, w14
+	blt	.L501
+	sub	w0, w0, w4
+	add	w0, w7, w0
+	and	w7, w0, 65535
+	ldrh	w0, [x1, 134]
+	sub	w2, w11, w0
+	cmp	w7, w2
+	blt	.L502
+	cmp	w19, w13
+	beq	.L502
+	add	x21, x12, x19, uxth 2
+	b	.L493
+.L501:
+	ldrb	w2, [x3, 2]
+	mov	x21, x3
+	tst	w2, 224
+	bne	.L490
+	ubfx	x2, x2, 3, 2
+	cmp	w6, w2
+	beq	.L490
+	cbz	w23, .L491
+	ldr	w2, [x3]
+	ldrh	w10, [x1, 72]
+	ldrh	w8, [x1, 90]
+	ubfx	x2, x2, 11, 8
+	add	w8, w8, 1
+	add	w10, w10, w2
+	cmp	w10, w8
+	ble	.L492
+	and	w2, w2, 65535
+	cmp	w5, w2
+	bls	.L490
+	and	w19, w0, 65535
+	mov	w5, w2
+.L490:
+	add	w0, w0, 1
+	add	x3, x3, 4
+	b	.L489
+.L491:
+	ldrh	w2, [x3]
+	ldrh	w10, [x1, 74]
+	ldrh	w8, [x1, 88]
+	and	w2, w2, 2047
+	add	w10, w10, w2
+	add	w8, w8, 1
+	cmp	w10, w8
+	ble	.L492
+	cmp	w2, w5
+	bge	.L490
+	mov	w5, w2
+	and	w19, w0, 65535
+	b	.L490
+.L492:
+	and	w19, w0, 65535
+.L493:
+	adrp	x0, .LANCHOR22
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	tbz	x0, 12, .L494
+	ldrb	w4, [x21, 3]
+	adrp	x0, .LC14
+	ldrb	w3, [x21, 2]
+	mov	w2, w20
+	mov	w1, w19
+	add	x0, x0, :lo12:.LC14
+	ubfx	x3, x3, 5, 3
+	bl	printf
+.L494:
+	ldrb	w0, [x21, 2]
+	bfi	w0, w20, 5, 3
+	ubfx	x1, x0, 3, 2
+	orr	w1, w1, w23
+	bfi	w0, w1, 3, 2
+	strb	w0, [x21, 2]
+	ldr	x0, [x22, #:lo12:.LANCHOR46]
+	strh	w19, [x0, 132]
+	tbz	x1, 0, .L495
+	ldrh	w1, [x0, 116]
+	sub	w1, w1, #1
+	strh	w1, [x0, 116]
+.L496:
+	cmp	w20, 5
+	bne	.L498
+	ldrh	w1, [x0, 120]
+	add	w1, w1, 1
+	strh	w1, [x0, 120]
+.L506:
+	mov	w0, w19
+	ldr	x23, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+.L495:
+	ldrb	w1, [x21, 2]
+	tst	w1, 24
+	bne	.L497
+	ldrh	w1, [x0, 114]
+	sub	w1, w1, #1
+	strh	w1, [x0, 114]
+	b	.L496
+.L497:
+	ldrh	w1, [x0, 118]
+	sub	w1, w1, #1
+	strh	w1, [x0, 118]
+	b	.L496
+.L498:
+	cmp	w20, 2
+	bne	.L500
+	ldrh	w1, [x0, 122]
+	add	w1, w1, 1
+	strh	w1, [x0, 122]
+	b	.L506
+.L500:
+	cmp	w20, 3
+	bne	.L506
+	ldrh	w1, [x0, 124]
+	add	w1, w1, 1
+	strh	w1, [x0, 124]
+	b	.L506
+.L502:
+	strh	w0, [x1, 132]
+	mov	w14, w4
+	b	.L503
+	.size	ftl_alloc_sblk, .-ftl_alloc_sblk
+	.section	.text.ftl_free_sblk,"ax",@progbits
+	.align	2
+	.global	ftl_free_sblk
+	.type	ftl_free_sblk, %function
+ftl_free_sblk:
+	stp	x29, x30, [sp, -16]!
+	and	x0, x0, 65535
+	mov	w1, 65535
+	cmp	w0, w1
+	add	x29, sp, 0
+	bne	.L511
+	adrp	x1, .LANCHOR72
+	adrp	x0, .LC0
+	mov	w2, 313
+	add	x1, x1, :lo12:.LANCHOR72
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L512:
+	b	.L512
+.L511:
+	adrp	x1, .LANCHOR59
+	ldr	x3, [x1, #:lo12:.LANCHOR59]
+	add	x3, x3, x0, lsl 2
+	ldrb	w1, [x3, 2]
+	ands	w4, w1, 224
+	bne	.L513
+	adrp	x1, .LANCHOR72
+	adrp	x0, .LC0
+	mov	w2, 316
+	add	x1, x1, :lo12:.LANCHOR72
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L514:
+	b	.L514
+.L513:
+	ubfx	x2, x1, 3, 2
+	cmp	w4, 160
+	adrp	x1, .LANCHOR46
+	bne	.L515
+	ldr	x5, [x1, #:lo12:.LANCHOR46]
+	ldrh	w4, [x5, 120]
+	sub	w4, w4, #1
+	strh	w4, [x5, 120]
+.L516:
+	tbz	x2, 0, .L518
+	ldr	x2, [x1, #:lo12:.LANCHOR46]
+	ldrh	w1, [x2, 116]
+	add	w1, w1, 1
+	strh	w1, [x2, 116]
+.L519:
+	ldrb	w1, [x3, 2]
+	and	w1, w1, 31
+	strb	w1, [x3, 2]
+	adrp	x1, .LANCHOR56
+	ldr	x1, [x1, #:lo12:.LANCHOR56]
+	strh	wzr, [x1, x0, lsl 1]
+	ldp	x29, x30, [sp], 16
+	ret
+.L515:
+	cmp	w4, 64
+	bne	.L517
+	ldr	x5, [x1, #:lo12:.LANCHOR46]
+	ldrh	w4, [x5, 122]
+	sub	w4, w4, #1
+	strh	w4, [x5, 122]
+	b	.L516
+.L517:
+	cmp	w4, 96
+	bne	.L516
+	ldr	x5, [x1, #:lo12:.LANCHOR46]
+	ldrh	w4, [x5, 124]
+	sub	w4, w4, #1
+	strh	w4, [x5, 124]
+	b	.L516
+.L518:
+	cbnz	w2, .L520
+	ldr	x2, [x1, #:lo12:.LANCHOR46]
+	ldrh	w1, [x2, 114]
+	add	w1, w1, 1
+	strh	w1, [x2, 114]
+	b	.L519
+.L520:
+	ldr	x2, [x1, #:lo12:.LANCHOR46]
+	ldrh	w1, [x2, 118]
+	add	w1, w1, 1
+	strh	w1, [x2, 118]
+	b	.L519
+	.size	ftl_free_sblk, .-ftl_free_sblk
+	.section	.text.gc_free_src_blk,"ax",@progbits
+	.align	2
+	.global	gc_free_src_blk
+	.type	gc_free_src_blk, %function
+gc_free_src_blk:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR58
+	stp	x23, x24, [sp, 48]
+	adrp	x22, .LC15
+	adrp	x23, .LANCHOR56
+	add	x21, x21, :lo12:.LANCHOR58
+	mov	x24, x23
+	add	x22, x22, :lo12:.LC15
+	stp	x19, x20, [sp, 16]
+	mov	w20, 0
+	stp	x25, x26, [sp, 64]
+.L523:
+	ldrh	w0, [x21, 56]
+	cmp	w0, w20
+	bhi	.L539
+	strh	wzr, [x21, 56]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L539:
+	add	x0, x21, x20, sxtw 1
+	ldrh	w25, [x0, 58]
+	ldr	x0, [x23, #:lo12:.LANCHOR56]
+	mov	x19, x25
+	lsl	x26, x25, 1
+	ldrh	w2, [x0, x26]
+	cbz	w2, .L524
+	mov	w1, w25
+	mov	x0, x22
+	bl	printf
+.L524:
+	ldr	x0, [x24, #:lo12:.LANCHOR56]
+	ldrh	w0, [x0, x26]
+	cbnz	w0, .L525
+	adrp	x0, .LANCHOR59
+	ldr	x0, [x0, #:lo12:.LANCHOR59]
+	add	x25, x0, x25, lsl 2
+	adrp	x0, .LANCHOR22
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	tbz	x0, 8, .L526
+	ldrb	w2, [x25, 2]
+	adrp	x0, .LC16
+	mov	w1, w19
+	add	x0, x0, :lo12:.LC16
+	ubfx	x2, x2, 5, 3
+	bl	printf
+.L526:
+	ldrb	w0, [x25, 2]
+	and	w1, w0, 224
+	cmp	w1, 224
+	beq	.L527
+	tst	w0, 192
+	bne	.L528
+.L527:
+	adrp	x1, .LANCHOR73
+	adrp	x0, .LC0
+	mov	w2, 753
+	add	x1, x1, :lo12:.LANCHOR73
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L529:
+	b	.L529
+.L528:
+	mov	w0, w19
+	bl	ftl_free_sblk
+	adrp	x0, .LANCHOR60
+	ldr	x0, [x0, #:lo12:.LANCHOR60]
+	ldrh	w2, [x0, 124]
+	cbz	w2, .L530
+	add	x3, x0, 392
+	mov	w1, 0
+.L532:
+	ldrh	w4, [x3]
+	cmp	w4, w19
+	bne	.L531
+	add	x1, x0, x1, sxtw 1
+	mov	w3, -1
+	sub	w2, w2, #1
+	strh	w3, [x1, 392]
+	strh	w2, [x0, 124]
+.L530:
+	ldrh	w2, [x0, 120]
+	cbz	w2, .L533
+	add	x3, x0, 136
+	mov	w1, 0
+.L535:
+	ldrh	w4, [x3]
+	cmp	w4, w19
+	bne	.L534
+	add	x1, x0, x1, sxtw 1
+	mov	w3, -1
+	sub	w2, w2, #1
+	strh	w3, [x1, 136]
+	strh	w2, [x0, 120]
+.L533:
+	ldrh	w2, [x0, 122]
+	cbz	w2, .L536
+	add	x3, x0, 264
+	mov	w1, 0
+.L538:
+	ldrh	w4, [x3]
+	cmp	w4, w19
+	bne	.L537
+	add	x1, x0, x1, sxtw 1
+	mov	w3, -1
+	sub	w2, w2, #1
+	strh	w3, [x1, 264]
+	strh	w2, [x0, 122]
+.L536:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L523
+.L531:
+	add	w1, w1, 1
+	add	x3, x3, 2
+	cmp	w1, 64
+	bne	.L532
+	b	.L530
+.L534:
+	add	w1, w1, 1
+	add	x3, x3, 2
+	cmp	w1, 64
+	bne	.L535
+	b	.L533
+.L537:
+	add	w1, w1, 1
+	add	x3, x3, 2
+	cmp	w1, 64
+	bne	.L538
+	b	.L536
+.L525:
+	mov	w2, 0
+	mov	w1, 1
+	mov	w0, w19
+	bl	gc_add_sblk
+	b	.L536
+	.size	gc_free_src_blk, .-gc_free_src_blk
+	.section	.text.ftl_erase_phy_blk,"ax",@progbits
+	.align	2
+	.global	ftl_erase_phy_blk
+	.type	ftl_erase_phy_blk, %function
+ftl_erase_phy_blk:
+	stp	x29, x30, [sp, -48]!
+	and	w0, w0, 65535
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	mov	w21, w1
+	adrp	x1, .LANCHOR71
+	stp	x19, x20, [sp, 16]
+	mov	w19, 21
+	adrp	x22, .LANCHOR75
+	ldrh	w1, [x1, #:lo12:.LANCHOR71]
+	sub	w1, w19, w1
+	mov	w19, 1
+	lsl	w19, w19, w1
+	sub	w19, w19, #1
+	and	w19, w19, w0
+	asr	w20, w0, w1
+	adrp	x0, .LANCHOR74
+	sxth	w19, w19
+	ldrb	w0, [x0, #:lo12:.LANCHOR74]
+	cbz	w0, .L563
+	ldrh	w2, [x22, #:lo12:.LANCHOR75]
+	cmp	w21, 0
+	cset	w1, eq
+	mov	w0, w20
+	mul	w2, w2, w19
+	bl	flash_erase_block_en
+.L563:
+	ldrh	w2, [x22, #:lo12:.LANCHOR75]
+	mov	w1, w21
+	mov	w0, w20
+	ldp	x21, x22, [sp, 32]
+	mul	w2, w2, w19
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	b	flash_erase_block_en
+	.size	ftl_erase_phy_blk, .-ftl_erase_phy_blk
+	.section	.text.ftl_erase_sblk,"ax",@progbits
+	.align	2
+	.global	ftl_erase_sblk
+	.type	ftl_erase_sblk, %function
+ftl_erase_sblk:
+	stp	x29, x30, [sp, -160]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR59
+	stp	x25, x26, [sp, 64]
+	and	w25, w0, 65535
+	ldr	x0, [x21, #:lo12:.LANCHOR59]
+	mov	w22, w1
+	stp	x19, x20, [sp, 16]
+	ubfiz	x20, x25, 2, 16
+	add	x0, x0, x20
+	stp	x23, x24, [sp, 48]
+	adrp	x24, .LANCHOR76
+	adrp	x23, .LANCHOR70
+	add	x24, x24, :lo12:.LANCHOR76
+	add	x23, x23, :lo12:.LANCHOR70
+	ldrb	w26, [x0, 3]
+	mov	w19, 0
+	str	x27, [sp, 80]
+	add	x27, x29, 96
+.L569:
+	ldrb	w0, [x24]
+	cmp	w19, w0
+	bge	.L576
+	ldrb	w3, [x23]
+	adrp	x0, .LANCHOR75
+	mov	w1, 0
+	ldrh	w4, [x0, #:lo12:.LANCHOR75]
+	mov	w0, 0
+	mul	w6, w19, w3
+	mul	w5, w25, w3
+	b	.L577
+.L571:
+	add	w2, w0, w6
+	asr	w2, w26, w2
+	tbnz	x2, 0, .L570
+	and	w2, w0, 1
+	add	w2, w2, w5
+	mul	w2, w2, w4
+	str	w2, [x27, w1, sxtw 2]
+	add	w1, w1, 1
+.L570:
+	add	w0, w0, 1
+.L577:
+	cmp	w0, w3
+	blt	.L571
+	cmp	w1, 2
+	bne	.L572
+	adrp	x0, .LANCHOR74
+	ldrb	w0, [x0, #:lo12:.LANCHOR74]
+	cbz	w0, .L573
+	ldp	w2, w3, [x29, 96]
+	cmp	w22, 0
+	cset	w1, eq
+	mov	w0, w19
+	bl	flash_erase_duplane_block
+.L573:
+	ldp	w2, w3, [x29, 96]
+	mov	w1, w22
+	mov	w0, w19
+	bl	flash_erase_duplane_block
+.L574:
+	add	w19, w19, 1
+	b	.L569
+.L572:
+	cmp	w1, 1
+	bne	.L574
+	adrp	x0, .LANCHOR74
+	ldrb	w0, [x0, #:lo12:.LANCHOR74]
+	cbz	w0, .L575
+	ldr	w2, [x29, 96]
+	cmp	w22, 0
+	cset	w1, eq
+	mov	w0, w19
+	bl	flash_erase_block_en
+.L575:
+	ldr	w2, [x29, 96]
+	mov	w1, w22
+	mov	w0, w19
+	bl	flash_erase_block_en
+	b	.L574
+.L576:
+	adrp	x2, .LANCHOR46
+	ldr	x3, [x21, #:lo12:.LANCHOR59]
+	cbnz	w22, .L578
+	ldrh	w1, [x3, x20]
+	add	w0, w1, 1
+	and	w0, w0, 2047
+	bfi	w1, w0, 0, 11
+	strh	w1, [x3, x20]
+	ldr	x1, [x2, #:lo12:.LANCHOR46]
+	ldr	w2, [x1, 84]
+	add	w2, w2, 1
+	str	w2, [x1, 84]
+	ldrh	w2, [x1, 96]
+	cmp	w2, w0
+	bge	.L580
+	strh	w0, [x1, 96]
+.L580:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 160
+	ret
+.L578:
+	ldr	w1, [x3, x20]
+	ubfx	x0, x1, 11, 8
+	add	w0, w0, 1
+	and	w0, w0, 255
+	bfi	w1, w0, 11, 8
+	str	w1, [x3, x20]
+	and	w0, w0, 65535
+	ldr	x1, [x2, #:lo12:.LANCHOR46]
+	ldr	w2, [x1, 80]
+	add	w2, w2, 1
+	str	w2, [x1, 80]
+	ldrh	w2, [x1, 98]
+	cmp	w2, w0
+	bcs	.L580
+	strh	w0, [x1, 98]
+	b	.L580
+	.size	ftl_erase_sblk, .-ftl_erase_sblk
+	.section	.text.ftl_alloc_sys_blk,"ax",@progbits
+	.align	2
+	.global	ftl_alloc_sys_blk
+	.type	ftl_alloc_sys_blk, %function
+ftl_alloc_sys_blk:
+	adrp	x0, .LANCHOR46
+	ldr	x1, [x0, #:lo12:.LANCHOR46]
+	ldrh	w0, [x1, 136]
+	cmp	w0, 63
+	bls	.L590
+	strh	wzr, [x1, 136]
+.L590:
+	ldrh	w3, [x1, 112]
+	cbnz	w3, .L591
+	stp	x29, x30, [sp, -16]!
+	adrp	x1, .LANCHOR77
+	adrp	x0, .LC0
+	mov	w2, 440
+	add	x29, sp, 0
+	add	x1, x1, :lo12:.LANCHOR77
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L592:
+	b	.L592
+.L591:
+	mov	w6, 65535
+.L597:
+	ldrh	w2, [x1, 136]
+.L593:
+	mov	w4, w2
+	cmp	w2, 63
+	ble	.L594
+	strh	wzr, [x1, 136]
+	b	.L597
+.L594:
+	add	x5, x2, 1
+	add	x0, x1, x5, lsl 1
+	ldrh	w0, [x0, 158]
+	cmp	w0, w6
+	bne	.L598
+	mov	x2, x5
+	b	.L593
+.L598:
+	add	x4, x1, x4, sxtw 1
+	mov	w5, -1
+	sub	w3, w3, #1
+	strh	w5, [x4, 160]
+	strh	w2, [x1, 136]
+	strh	w3, [x1, 112]
+	ret
+	.size	ftl_alloc_sys_blk, .-ftl_alloc_sys_blk
+	.section	.text.ftl_free_sys_blk,"ax",@progbits
+	.align	2
+	.global	ftl_free_sys_blk
+	.type	ftl_free_sys_blk, %function
+ftl_free_sys_blk:
+	adrp	x1, .LANCHOR46
+	and	w0, w0, 65535
+	ldr	x1, [x1, #:lo12:.LANCHOR46]
+	ldrh	w2, [x1, 138]
+	cmp	w2, 63
+	bls	.L603
+	strh	wzr, [x1, 138]
+.L603:
+	ldrh	w3, [x1, 112]
+	cmp	w3, 63
+	bls	.L604
+	stp	x29, x30, [sp, -16]!
+	adrp	x1, .LANCHOR78
+	adrp	x0, .LC0
+	mov	w2, 464
+	add	x29, sp, 0
+	add	x1, x1, :lo12:.LANCHOR78
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L605:
+	b	.L605
+.L604:
+	mov	w6, 65535
+.L610:
+	ldrh	w2, [x1, 138]
+.L606:
+	mov	w4, w2
+	cmp	w2, 63
+	ble	.L607
+	strh	wzr, [x1, 138]
+	b	.L610
+.L607:
+	add	x5, x2, 1
+	add	x7, x1, x5, lsl 1
+	ldrh	w7, [x7, 158]
+	cmp	w7, w6
+	bne	.L608
+	add	x4, x1, x4, sxtw 1
+	add	w3, w3, 1
+	strh	w0, [x4, 160]
+	strh	w2, [x1, 138]
+	strh	w3, [x1, 112]
+	ret
+.L608:
+	mov	x2, x5
+	b	.L606
+	.size	ftl_free_sys_blk, .-ftl_free_sys_blk
+	.section	.text.ftl_info_data_recovery,"ax",@progbits
+	.align	2
+	.global	ftl_info_data_recovery
+	.type	ftl_info_data_recovery, %function
+ftl_info_data_recovery:
+	ldrh	w1, [x0]
+	mov	w2, 65535
+	cmp	w1, w2
+	beq	.L614
+	adrp	x2, .LANCHOR59
+	ubfiz	x1, x1, 2, 16
+	ldr	x3, [x2, #:lo12:.LANCHOR59]
+	add	x4, x3, x1
+	ldrb	w2, [x4, 2]
+	tst	w2, 224
+	bne	.L614
+	ldrb	w0, [x0, 4]
+	bfi	w2, w0, 5, 3
+	adrp	x0, .LANCHOR46
+	strb	w2, [x4, 2]
+	ldr	x5, [x0, #:lo12:.LANCHOR46]
+	tbz	x2, 3, .L618
+	ldrh	w2, [x5, 116]
+	sub	w2, w2, #1
+	strh	w2, [x5, 116]
+.L619:
+	ldrb	w2, [x4, 2]
+	and	w2, w2, 224
+	cmp	w2, 160
+	bne	.L621
+	ldr	w2, [x3, x1]
+	ubfx	x4, x2, 11, 8
+	add	w4, w4, 1
+	bfi	w2, w4, 11, 8
+	str	w2, [x3, x1]
+	ldr	x1, [x0, #:lo12:.LANCHOR46]
+	ldrh	w0, [x1, 120]
+	sub	w0, w0, #1
+	strh	w0, [x1, 120]
+	ret
+.L618:
+	tst	w2, 24
+	bne	.L620
+	ldrh	w2, [x5, 114]
+	sub	w2, w2, #1
+	strh	w2, [x5, 114]
+	b	.L619
+.L620:
+	ldrh	w2, [x5, 118]
+	sub	w2, w2, #1
+	strh	w2, [x5, 118]
+	b	.L619
+.L621:
+	ldrh	w4, [x3, x1]
+	cmp	w2, 64
+	add	w5, w4, 1
+	bfi	w4, w5, 0, 11
+	strh	w4, [x3, x1]
+	bne	.L622
+	ldr	x1, [x0, #:lo12:.LANCHOR46]
+	ldrh	w0, [x1, 122]
+	sub	w0, w0, #1
+	strh	w0, [x1, 122]
+	ret
+.L622:
+	cmp	w2, 96
+	bne	.L614
+	ldr	x1, [x0, #:lo12:.LANCHOR46]
+	ldrh	w0, [x1, 124]
+	sub	w0, w0, #1
+	strh	w0, [x1, 124]
+.L614:
+	ret
+	.size	ftl_info_data_recovery, .-ftl_info_data_recovery
+	.section	.text.ftl_get_ppa_from_index,"ax",@progbits
+	.align	2
+	.global	ftl_get_ppa_from_index
+	.type	ftl_get_ppa_from_index, %function
+ftl_get_ppa_from_index:
+	and	w1, w0, 65535
+	adrp	x0, .LANCHOR60
+	adrp	x2, .LANCHOR69
+	ldr	x3, [x0, #:lo12:.LANCHOR60]
+	adrp	x0, .LANCHOR79
+	ldrb	w2, [x2, #:lo12:.LANCHOR69]
+	ldrh	w0, [x0, #:lo12:.LANCHOR79]
+	mul	w0, w0, w2
+	cmp	w1, w0
+	bge	.L624
+	add	x3, x3, 16
+.L625:
+	ldrb	w2, [x3, 9]
+	sdiv	w4, w1, w2
+	msub	w1, w4, w2, w1
+	add	x1, x3, x1, uxth 1
+	ldrh	w0, [x1, 16]
+	mov	w1, 65535
+	cmp	w0, w1
+	bne	.L626
+	stp	x29, x30, [sp, -16]!
+	adrp	x1, .LANCHOR80
+	adrp	x0, .LC0
+	mov	w2, 837
+	add	x29, sp, 0
+	add	x1, x1, :lo12:.LANCHOR80
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L627:
+	b	.L627
+.L624:
+	sub	w1, w1, w0
+	add	x3, x3, 48
+	and	w1, w1, 65535
+	b	.L625
+.L626:
+	adrp	x1, .LANCHOR75
+	ldrh	w1, [x1, #:lo12:.LANCHOR75]
+	madd	w0, w1, w0, w4
+	ret
+	.size	ftl_get_ppa_from_index, .-ftl_get_ppa_from_index
+	.section	.text.lpa_hash_get_ppa,"ax",@progbits
+	.align	2
+	.global	lpa_hash_get_ppa
+	.type	lpa_hash_get_ppa, %function
+lpa_hash_get_ppa:
+	and	x2, x0, 255
+	adrp	x1, .LANCHOR81
+	add	x1, x1, :lo12:.LANCHOR81
+	mov	w3, 65535
+	ldrh	w1, [x1, x2, lsl 1]
+	adrp	x2, .LANCHOR82
+	ldr	x4, [x2, #:lo12:.LANCHOR82]
+	adrp	x2, .LANCHOR83
+	ldr	x5, [x2, #:lo12:.LANCHOR83]
+.L632:
+	cmp	w1, w3
+	bne	.L634
+	mov	w0, -1
+	ret
+.L634:
+	uxtw	x2, w1
+	ldr	w6, [x4, x2, lsl 2]
+	cmp	w0, w6
+	bne	.L633
+	mov	w0, w1
+	b	ftl_get_ppa_from_index
+.L633:
+	ldrh	w1, [x5, x2, lsl 1]
+	b	.L632
+	.size	lpa_hash_get_ppa, .-lpa_hash_get_ppa
+	.section	.text.ftl_get_new_free_page,"ax",@progbits
+	.align	2
+	.global	ftl_get_new_free_page
+	.type	ftl_get_new_free_page, %function
+ftl_get_new_free_page:
+	stp	x29, x30, [sp, -16]!
+	mov	x1, x0
+	mov	w2, 65535
+	add	x29, sp, 0
+	ldrh	w0, [x0]
+	cmp	w0, w2
+	bne	.L636
+	adrp	x1, .LANCHOR84
+	adrp	x0, .LC0
+	mov	w2, 948
+	add	x1, x1, :lo12:.LANCHOR84
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L637:
+	b	.L637
+.L636:
+	adrp	x0, .LANCHOR79
+	ldrh	w3, [x1, 2]
+	ldrh	w0, [x0, #:lo12:.LANCHOR79]
+	cmp	w3, w0
+	bne	.L638
+	adrp	x1, .LANCHOR84
+	adrp	x0, .LC0
+	mov	w2, 949
+	add	x1, x1, :lo12:.LANCHOR84
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L639:
+	b	.L639
+.L638:
+	ldrh	w4, [x1, 6]
+	cbnz	w4, .L640
+	adrp	x1, .LANCHOR84
+	adrp	x0, .LC0
+	mov	w2, 950
+	add	x1, x1, :lo12:.LANCHOR84
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L641:
+	b	.L641
+.L640:
+	ldrb	w0, [x1, 5]
+	mov	w3, w2
+	add	x0, x0, 8
+	ldrh	w5, [x1, x0, lsl 1]
+	adrp	x0, .LANCHOR69
+	ldrb	w6, [x0, #:lo12:.LANCHOR69]
+.L642:
+	cmp	w5, w3
+	ldrb	w2, [x1, 5]
+	beq	.L644
+	adrp	x0, .LANCHOR75
+	sub	w4, w4, #1
+	strh	w4, [x1, 6]
+	add	w2, w2, 1
+	ldrh	w0, [x0, #:lo12:.LANCHOR75]
+	and	w2, w2, 255
+	ldrh	w4, [x1, 10]
+	cmp	w6, w2
+	ldrh	w3, [x1, 2]
+	add	w4, w4, 1
+	strb	w2, [x1, 5]
+	mul	w0, w0, w5
+	strh	w4, [x1, 10]
+	orr	w0, w0, w3
+	bne	.L635
+	add	w3, w3, 1
+	strb	wzr, [x1, 5]
+	strh	w3, [x1, 2]
+.L635:
+	ldp	x29, x30, [sp], 16
+	ret
+.L644:
+	add	w2, w2, 1
+	and	w2, w2, 255
+	strb	w2, [x1, 5]
+	cmp	w2, w6
+	bne	.L643
+	ldrh	w0, [x1, 2]
+	strb	wzr, [x1, 5]
+	add	w0, w0, 1
+	strh	w0, [x1, 2]
+.L643:
+	ldrb	w0, [x1, 5]
+	add	x0, x0, 8
+	ldrh	w5, [x1, x0, lsl 1]
+	b	.L642
+	.size	ftl_get_new_free_page, .-ftl_get_new_free_page
+	.section	.text.ftl_ext_alloc_new_blk,"ax",@progbits
+	.align	2
+	.global	ftl_ext_alloc_new_blk
+	.type	ftl_ext_alloc_new_blk, %function
+ftl_ext_alloc_new_blk:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	bl	ftl_alloc_sys_blk
+	and	w1, w0, 65535
+	mov	w2, 65533
+	mov	w19, w1
+	sub	w1, w1, #1
+	cmp	w2, w1, uxth
+	bcs	.L648
+	adrp	x1, .LANCHOR85
+	adrp	x0, .LC0
+	mov	w2, 981
+	add	x1, x1, :lo12:.LANCHOR85
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L649:
+	b	.L649
+.L648:
+	adrp	x20, .LANCHOR46
+	mov	w1, 0
+	bl	ftl_erase_phy_blk
+	ldr	x0, [x20, #:lo12:.LANCHOR46]
+	ldrh	w0, [x0, 130]
+	bl	ftl_free_sys_blk
+	ldr	x0, [x20, #:lo12:.LANCHOR46]
+	strh	w19, [x0, 130]
+	strh	wzr, [x0, 140]
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	ftl_ext_alloc_new_blk, .-ftl_ext_alloc_new_blk
+	.section	.text.ftl_total_vpn_update,"ax",@progbits
+	.align	2
+	.global	ftl_total_vpn_update
+	.type	ftl_total_vpn_update, %function
+ftl_total_vpn_update:
+	adrp	x2, .LANCHOR86
+	mov	x3, x2
+	ldrh	w1, [x2, #:lo12:.LANCHOR86]
+	cmp	w1, 4
+	bhi	.L652
+	cbnz	w0, .L652
+	add	w1, w1, 1
+	strh	w1, [x2, #:lo12:.LANCHOR86]
+	ret
+.L652:
+	adrp	x0, .LANCHOR54
+	strh	wzr, [x3, #:lo12:.LANCHOR86]
+	mov	w1, 0
+	mov	w2, 0
+	ldrh	w5, [x0, #:lo12:.LANCHOR54]
+	adrp	x0, .LANCHOR56
+	mov	w8, 65535
+	ldr	x6, [x0, #:lo12:.LANCHOR56]
+	adrp	x0, .LANCHOR59
+	ldr	x7, [x0, #:lo12:.LANCHOR59]
+	mov	x0, 0
+.L654:
+	cmp	w5, w0, uxth
+	bhi	.L657
+	adrp	x0, .LANCHOR60
+	ldr	x0, [x0, #:lo12:.LANCHOR60]
+	str	w2, [x0, 524]
+	str	w1, [x0, 528]
+	ret
+.L657:
+	ldrh	w3, [x6, x0, lsl 1]
+	cmp	w3, w8
+	beq	.L655
+	add	x4, x7, x0, lsl 2
+	ldrb	w4, [x4, 2]
+	and	w4, w4, 224
+	cmp	w4, 160
+	bne	.L656
+	add	w1, w1, w3
+.L655:
+	add	x0, x0, 1
+	b	.L654
+.L656:
+	add	w2, w2, w3
+	b	.L655
+	.size	ftl_total_vpn_update, .-ftl_total_vpn_update
+	.section	.text.ftl_debug_info_fill,"ax",@progbits
+	.align	2
+	.global	ftl_debug_info_fill
+	.type	ftl_debug_info_fill, %function
+ftl_debug_info_fill:
+	mov	w0, 0
+	ret
+	.size	ftl_debug_info_fill, .-ftl_debug_info_fill
+	.section	.text.ftl_vpn_update,"ax",@progbits
+	.align	2
+	.global	ftl_vpn_update
+	.type	ftl_vpn_update, %function
+ftl_vpn_update:
+	adrp	x1, .LANCHOR56
+	ubfiz	x0, x0, 1, 16
+	ldr	x1, [x1, #:lo12:.LANCHOR56]
+	ldrh	w0, [x1, x0]
+	cmp	w0, 0
+	cset	w0, eq
+	ret
+	.size	ftl_vpn_update, .-ftl_vpn_update
+	.section	.text.ftl_vpn_decrement,"ax",@progbits
+	.align	2
+	.global	ftl_vpn_decrement
+	.type	ftl_vpn_decrement, %function
+ftl_vpn_decrement:
+	stp	x29, x30, [sp, -16]!
+	and	w3, w0, 65535
+	mov	w0, 65535
+	cmp	w3, w0
+	add	x29, sp, 0
+	beq	.L661
+	adrp	x0, .LANCHOR56
+	ubfiz	x1, x3, 1, 16
+	ldr	x2, [x0, #:lo12:.LANCHOR56]
+	ldrh	w0, [x2, x1]
+	cbnz	w0, .L662
+	adrp	x0, .LC17
+	mov	w2, 0
+	mov	w1, w3
+	add	x0, x0, :lo12:.LC17
+	bl	printf
+.L665:
+	mov	w0, 0
+	b	.L660
+.L662:
+	sub	w0, w0, #1
+	strh	w0, [x2, x1]
+.L661:
+	adrp	x2, .LANCHOR87
+	ldrh	w0, [x2, #:lo12:.LANCHOR87]
+	cmp	w3, w0
+	beq	.L665
+	mov	w1, 65535
+	cmp	w0, w1
+	bne	.L664
+	strh	w3, [x2, #:lo12:.LANCHOR87]
+	b	.L665
+.L664:
+	bl	ftl_vpn_update
+	cmp	w0, 0
+	cset	w0, ne
+	strh	w3, [x2, #:lo12:.LANCHOR87]
+.L660:
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	ftl_vpn_decrement, .-ftl_vpn_decrement
+	.section	.text.lpa_hash_update_ppa,"ax",@progbits
+	.align	2
+	.global	lpa_hash_update_ppa
+	.type	lpa_hash_update_ppa, %function
+lpa_hash_update_ppa:
+	adrp	x3, .LANCHOR81
+	and	x5, x0, 255
+	add	x4, x3, :lo12:.LANCHOR81
+	mov	w7, 65535
+	and	w2, w2, 65535
+	mov	w12, w7
+	ldrh	w6, [x4, x5, lsl 1]
+	adrp	x4, .LANCHOR82
+	ldr	x8, [x4, #:lo12:.LANCHOR82]
+	adrp	x4, .LANCHOR83
+	ldr	x4, [x4, #:lo12:.LANCHOR83]
+.L668:
+	cmp	w6, w12
+	beq	.L672
+	uxtw	x11, w6
+	lsl	x10, x11, 2
+	add	x13, x8, x10
+	ldr	w10, [x8, x10]
+	cmp	w0, w10
+	lsl	x10, x11, 1
+	bne	.L669
+	mov	w6, -1
+	str	w6, [x13]
+	cmp	w7, w12
+	bne	.L670
+	add	x6, x3, :lo12:.LANCHOR81
+	ldrh	w7, [x4, x10]
+	strh	w7, [x6, x5, lsl 1]
+.L671:
+	mov	w6, -1
+	strh	w6, [x4, x11, lsl 1]
+.L672:
+	uxtw	x6, w2
+	add	x3, x3, :lo12:.LANCHOR81
+	cmn	w1, #1
+	str	w0, [x8, x6, lsl 2]
+	ldrh	w0, [x3, x5, lsl 1]
+	strh	w2, [x3, x5, lsl 1]
+	strh	w0, [x4, x6, lsl 1]
+	beq	.L679
+	stp	x29, x30, [sp, -16]!
+	adrp	x0, .LANCHOR71
+	add	x29, sp, 0
+	ldrh	w3, [x0, #:lo12:.LANCHOR71]
+	mov	w0, 21
+	sub	w2, w0, w3
+	mov	w0, 1
+	lsr	w1, w1, w3
+	lsl	w0, w0, w2
+	sub	w0, w0, #1
+	and	w1, w0, w1
+	adrp	x0, .LANCHOR70
+	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	udiv	w0, w1, w0
+	bl	ftl_vpn_decrement
+	mov	w0, -1
+	ldp	x29, x30, [sp], 16
+	ret
+.L670:
+	ldrh	w6, [x4, x10]
+	strh	w6, [x4, w7, uxtw 1]
+	b	.L671
+.L669:
+	mov	w7, w6
+	ldrh	w6, [x4, x10]
+	b	.L668
+.L679:
+	mov	w0, -1
+	ret
+	.size	lpa_hash_update_ppa, .-lpa_hash_update_ppa
+	.section	.text.ftl_write_completed,"ax",@progbits
+	.align	2
+	.global	ftl_write_completed
+	.type	ftl_write_completed, %function
+ftl_write_completed:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR88
+	stp	x21, x22, [sp, 32]
+	adrp	x19, .LANCHOR36
+	adrp	x22, .LANCHOR71
+	add	x20, x20, :lo12:.LANCHOR88
+	add	x19, x19, :lo12:.LANCHOR36
+	add	x22, x22, :lo12:.LANCHOR71
+	stp	x23, x24, [sp, 48]
+	str	x25, [sp, 64]
+.L683:
+	ldrb	w0, [x20]
+	cmp	w0, 255
+	bne	.L689
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L689:
+	ubfiz	x21, x0, 6, 8
+	sbfiz	x0, x0, 6, 32
+	add	x23, x19, x0
+	add	x21, x19, x21
+	ldrb	w0, [x19, x0]
+	strb	w0, [x20]
+	ldr	w0, [x23, 52]
+	cmn	w0, #1
+	bne	.L684
+	ldp	w2, w3, [x23, 36]
+	mov	w1, 21
+	ldrh	w0, [x22]
+	mov	w25, 1
+	sub	w1, w1, w0
+	lsr	w0, w3, w0
+	lsl	w1, w25, w1
+	sub	w1, w1, #1
+	and	w1, w1, w0
+	adrp	x0, .LANCHOR70
+	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	udiv	w1, w1, w0
+	adrp	x0, .LC18
+	add	x0, x0, :lo12:.LC18
+	and	w24, w1, 65535
+	mov	w1, w24
+	bl	printf
+	mov	w1, w25
+	mov	w2, 0
+	mov	w0, w24
+	bl	gc_add_sblk
+	adrp	x0, .LANCHOR60
+	ldr	x0, [x0, #:lo12:.LANCHOR60]
+	ldrh	w1, [x0, 16]
+	cmp	w1, w24
+	bne	.L685
+	strh	wzr, [x0, 22]
+.L686:
+	mov	x0, x21
+	bl	ftl_write_buf
+	b	.L683
+.L685:
+	ldrh	w1, [x0, 48]
+	cmp	w1, w24
+	bne	.L686
+	strh	wzr, [x0, 54]
+	b	.L686
+.L684:
+	ldrh	w2, [x23, 48]
+	ldr	w0, [x23, 36]
+	ldr	w1, [x23, 44]
+	bl	lpa_hash_update_ppa
+	ldrb	w0, [x23, 2]
+	tbz	x0, 2, .L688
+	and	w0, w0, -3
+	strb	w0, [x23, 2]
+	b	.L683
+.L688:
+	mov	x0, x21
+	bl	buf_free
+	b	.L683
+	.size	ftl_write_completed, .-ftl_write_completed
+	.section	.text.ftl_mask_bad_block,"ax",@progbits
+	.align	2
+	.global	ftl_mask_bad_block
+	.type	ftl_mask_bad_block, %function
+ftl_mask_bad_block:
+	stp	x29, x30, [sp, -32]!
+	adrp	x1, .LANCHOR71
+	mov	w2, 21
+	add	x29, sp, 0
+	ldrh	w3, [x1, #:lo12:.LANCHOR71]
+	stp	x19, x20, [sp, 16]
+	ubfx	x20, x0, 21, 3
+	sub	w1, w2, w3
+	mov	w2, 1
+	lsr	w0, w0, w3
+	lsl	w2, w2, w1
+	sub	w2, w2, #1
+	and	w2, w2, w0
+	adrp	x0, .LANCHOR70
+	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	udiv	w2, w2, w0
+	adrp	x0, .LANCHOR22
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	and	w19, w2, 255
+	tbz	x0, 14, .L692
+	adrp	x0, .LC19
+	mov	w2, w19
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC19
+	bl	printf
+.L692:
+	adrp	x0, .LANCHOR54
+	ldrh	w0, [x0, #:lo12:.LANCHOR54]
+	cmp	w0, w19
+	bls	.L691
+	adrp	x0, .LANCHOR59
+	mov	w1, 1
+	lsl	w1, w1, w20
+	ldr	x0, [x0, #:lo12:.LANCHOR59]
+	add	x19, x0, x19, uxtb 2
+	ldrb	w0, [x19, 3]
+	orr	w1, w1, w0
+	strb	w1, [x19, 3]
+.L691:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	ftl_mask_bad_block, .-ftl_mask_bad_block
+	.section	.text.print_ftl_debug_info,"ax",@progbits
+	.align	2
+	.global	print_ftl_debug_info
+	.type	print_ftl_debug_info, %function
+print_ftl_debug_info:
+	sub	sp, sp, #64
+	adrp	x1, .LANCHOR60
+	stp	x29, x30, [sp, 32]
+	add	x29, sp, 32
+	ldr	x7, [x1, #:lo12:.LANCHOR60]
+	str	x19, [sp, 48]
+	adrp	x19, .LANCHOR46
+	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	ldrh	w6, [x0, 120]
+	ldrh	w5, [x0, 124]
+	ldrh	w4, [x0, 122]
+	ldrh	w3, [x0, 116]
+	ldrh	w2, [x0, 118]
+	ldrh	w1, [x0, 114]
+	ldr	w0, [x7, 528]
+	str	w0, [sp]
+	adrp	x0, .LC20
+	add	x0, x0, :lo12:.LC20
+	ldr	w7, [x7, 524]
+	bl	printf
+	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	adrp	x1, .LANCHOR89
+	ldrb	w3, [x1, #:lo12:.LANCHOR89]
+	ldr	w4, [x0, 8]
+	ldr	w5, [x0, 64]
+	ldr	w1, [x0, 20]
+	ldr	w2, [x0, 28]
+	adrp	x0, .LC21
+	add	x0, x0, :lo12:.LC21
+	bl	printf
+	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	ldr	w1, [x0, 52]
+	ldr	w2, [x0, 60]
+	ldr	w3, [x0, 16]
+	adrp	x0, .LC22
+	add	x0, x0, :lo12:.LC22
+	lsr	w3, w3, 11
+	bl	printf
+	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	ldrh	w2, [x0, 98]
+	ldrh	w6, [x0, 72]
+	ldrh	w5, [x0, 96]
+	ldrh	w4, [x0, 92]
+	ldrh	w3, [x0, 88]
+	ldrh	w1, [x0, 74]
+	str	w2, [sp, 16]
+	ldrh	w2, [x0, 94]
+	str	w2, [sp, 8]
+	ldrh	w2, [x0, 90]
+	str	w2, [sp]
+	ldp	w7, w2, [x0, 80]
+	adrp	x0, .LC23
+	add	x0, x0, :lo12:.LC23
+	bl	printf
+	ldr	x19, [sp, 48]
+	ldp	x29, x30, [sp, 32]
+	add	sp, sp, 64
+	ret
+	.size	print_ftl_debug_info, .-print_ftl_debug_info
+	.section	.text.sblk_init,"ax",@progbits
+	.align	2
+	.global	sblk_init
+	.type	sblk_init, %function
+sblk_init:
+	adrp	x1, .LANCHOR90
+	mov	w0, -1
+	strb	w0, [x1, #:lo12:.LANCHOR90]
+	adrp	x1, .LANCHOR88
+	strb	w0, [x1, #:lo12:.LANCHOR88]
+	adrp	x1, .LANCHOR51
+	strb	w0, [x1, #:lo12:.LANCHOR51]
+	adrp	x1, .LANCHOR62
+	strb	w0, [x1, #:lo12:.LANCHOR62]
+	mov	w0, 0
+	ret
+	.size	sblk_init, .-sblk_init
+	.section	.text.dump_sblk_queue,"ax",@progbits
+	.align	2
+	.global	dump_sblk_queue
+	.type	dump_sblk_queue, %function
+dump_sblk_queue:
+	stp	x29, x30, [sp, -48]!
+	adrp	x0, .LC24
+	add	x0, x0, :lo12:.LC24
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR90
+	str	x21, [sp, 32]
+	ldrb	w1, [x19, #:lo12:.LANCHOR90]
+	bl	printf
+	ldrb	w19, [x19, #:lo12:.LANCHOR90]
+	cmp	w19, 255
+	beq	.L701
+	adrp	x1, .LANCHOR36
+	ubfiz	x19, x19, 6, 8
+	add	x1, x1, :lo12:.LANCHOR36
+	adrp	x21, .LC25
+	add	x19, x1, x19
+	add	x21, x21, :lo12:.LC25
+	mov	x20, x1
+.L703:
+	ldrb	w2, [x19, 58]
+	mov	x0, x21
+	ldrb	w1, [x19, 1]
+	ldr	w3, [x19, 40]
+	bl	printf
+	ldrb	w19, [x19]
+	cmp	w19, 255
+	beq	.L701
+	ubfiz	x19, x19, 6, 8
+	add	x19, x20, x19
+	b	.L703
+.L701:
+	ldp	x19, x20, [sp, 16]
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
+	.size	dump_sblk_queue, .-dump_sblk_queue
+	.section	.text.queue_lun_state,"ax",@progbits
+	.align	2
+	.global	queue_lun_state
+	.type	queue_lun_state, %function
+queue_lun_state:
+	adrp	x2, .LANCHOR90
+	ldrb	w2, [x2, #:lo12:.LANCHOR90]
+	cmp	w2, 255
+	beq	.L720
+	adrp	x3, .LANCHOR71
+	adrp	x7, .LANCHOR36
+	add	x7, x7, :lo12:.LANCHOR36
+	adrp	x10, .L716
+	ldrh	w8, [x3, #:lo12:.LANCHOR71]
+	mov	w3, 21
+	ubfx	x11, x0, 21, 3
+	add	x10, x10, :lo12:.L716
+	sub	w4, w3, w8
+	mov	w3, 1
+	mov	x12, x7
+	lsl	w3, w3, w4
+	adrp	x4, .LANCHOR70
+	sub	w3, w3, #1
+	ldrb	w6, [x4, #:lo12:.LANCHOR70]
+	and	w3, w3, 65535
+	asr	w4, w0, w8
+	sub	w6, w6, #1
+	and	w6, w6, 65535
+	and	w4, w4, w6
+	and	w4, w4, w3
+.L719:
+	add	x0, x7, x2, lsl 6
+	ldr	w5, [x0, 40]
+	ubfx	x13, x5, 21, 3
+	cmp	w11, w13
+	bne	.L713
+	lsr	w5, w5, w8
+	and	w5, w6, w5
+	and	w5, w3, w5
+	ldrb	w0, [x0, 58]
+	cmp	w4, w5
+	bne	.L714
+	cmp	w1, 1
+	bne	.L711
+	cmp	w0, 6
+	ccmp	w0, 8, 4, ne
+	beq	.L713
+	ret
+.L714:
+	cmp	w1, 3
+	bhi	.L713
+	ldrb	w5, [x10,w1,uxtw]
+	adr	x13, .Lrtx716
+	add	x5, x13, w5, sxtb #2
+	br	x5
+.Lrtx716:
+	.section	.rodata.queue_lun_state,"a",@progbits
+	.align	0
+	.align	2
+.L716:
+	.byte	(.L715 - .Lrtx716) / 4
+	.byte	(.L717 - .Lrtx716) / 4
+	.byte	(.L718 - .Lrtx716) / 4
+	.byte	(.L711 - .Lrtx716) / 4
+	.section	.text.queue_lun_state
+.L715:
+	cmp	w0, 2
+	beq	.L713
+	ret
+.L717:
+	cmp	w0, 6
+	ccmp	w0, 8, 4, ne
+	beq	.L713
+	ret
+.L718:
+	cmp	w0, 10
+	bne	.L711
+.L713:
+	lsl	x2, x2, 6
+	ldrb	w2, [x12, x2]
+	cmp	w2, 255
+	bne	.L719
+.L720:
+	mov	w0, 0
+.L711:
+	ret
+	.size	queue_lun_state, .-queue_lun_state
+	.section	.text.queue_remove_completed_req,"ax",@progbits
+	.align	2
+	.global	queue_remove_completed_req
+	.type	queue_remove_completed_req, %function
+queue_remove_completed_req:
+	adrp	x6, .LANCHOR90
+	ldrb	w2, [x6, #:lo12:.LANCHOR90]
+	cmp	w2, 255
+	beq	.L722
+	adrp	x0, .LANCHOR36
+	lsl	x4, x2, 6
+	add	x5, x0, :lo12:.LANCHOR36
+	add	x3, x5, x4
+	ldrb	w1, [x3, 58]
+	sub	w1, w1, #11
+	and	w1, w1, 255
+	cmp	w1, 1
+	mov	x1, x0
+	bhi	.L722
+	ldrb	w0, [x5, x4]
+	strb	w0, [x6, #:lo12:.LANCHOR90]
+	mov	w0, -1
+	strb	w0, [x5, x4]
+	ldrb	w0, [x3, 59]
+	cmp	w0, 1
+	bne	.L724
+	ldrh	w0, [x3, 50]
+	cbnz	w0, .L725
+	adrp	x0, .LANCHOR88
+	ldrb	w3, [x0, #:lo12:.LANCHOR88]
+	add	x0, x0, :lo12:.LANCHOR88
+.L726:
+	cmp	w3, 255
+	bne	.L730
+	add	x1, x1, :lo12:.LANCHOR36
+	add	x1, x1, x2, lsl 6
+	ldrb	w1, [x1, 1]
+	strb	w1, [x0]
+	ret
+.L725:
+	adrp	x0, .LANCHOR62
+	ldrb	w3, [x0, #:lo12:.LANCHOR62]
+	add	x0, x0, :lo12:.LANCHOR62
+	b	.L726
+.L724:
+	cbnz	w0, .L722
+	ldr	w0, [x3, 36]
+	cmn	w0, #1
+	beq	.L722
+	adrp	x0, .LANCHOR51
+	ldrb	w3, [x0, #:lo12:.LANCHOR51]
+	add	x0, x0, :lo12:.LANCHOR51
+	b	.L726
+.L730:
+	add	x0, x1, :lo12:.LANCHOR36
+.L737:
+	mov	w1, w3
+	sbfiz	x3, x3, 6, 32
+	ldrb	w3, [x0, x3]
+	cmp	w3, 255
+	bne	.L737
+	add	x2, x0, x2, lsl 6
+	sbfiz	x1, x1, 6, 32
+	ldrb	w2, [x2, 1]
+	strb	w2, [x0, x1]
+	ret
+.L722:
+	ret
+	.size	queue_remove_completed_req, .-queue_remove_completed_req
+	.section	.text.pm_alloc_new_blk,"ax",@progbits
+	.align	2
+	.global	pm_alloc_new_blk
+	.type	pm_alloc_new_blk, %function
+pm_alloc_new_blk:
+	stp	x29, x30, [sp, -64]!
+	adrp	x2, .LANCHOR69
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR46
+	stp	x21, x22, [sp, 32]
+	ldr	x1, [x20, #:lo12:.LANCHOR46]
+	ldrb	w2, [x2, #:lo12:.LANCHOR69]
+	ldrh	w0, [x1, 690]
+	str	x23, [sp, 48]
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	strh	w0, [x1, 690]
+	cmp	w2, w0
+	bls	.L739
+	add	x0, x1, x0, sxtw 1
+	ldrh	w1, [x0, 672]
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L740
+.L739:
+	adrp	x21, .LC26
+	add	x21, x21, :lo12:.LC26
+	adrp	x23, .LANCHOR59
+.L754:
+	mov	w0, 1
+	bl	ftl_alloc_sblk
+	mov	w1, 0
+	and	w19, w0, 65535
+	bl	ftl_erase_sblk
+	add	x13, x20, :lo12:.LANCHOR46
+	ldr	x1, [x20, #:lo12:.LANCHOR46]
+	mov	w0, w19
+	add	x1, x1, 672
+	bl	ftl_get_blk_list_in_sblk
+	tst	w0, 65535
+	bne	.L741
+	mov	w1, w19
+	mov	x0, x21
+	bl	printf
+	ldr	x0, [x23, #:lo12:.LANCHOR59]
+	add	x19, x0, x19, uxth 2
+	ldrb	w0, [x19, 2]
+	orr	w0, w0, -32
+	strb	w0, [x19, 2]
+	b	.L754
+.L741:
+	ldr	x1, [x13]
+	adrp	x0, .LANCHOR91
+	mov	w2, 1
+	mov	w3, 65535
+	str	w2, [x0, #:lo12:.LANCHOR91]
+	add	x2, x1, 416
+	mov	w0, 0
+	strh	wzr, [x1, 690]
+.L743:
+	ldrh	w4, [x2]
+	cmp	w4, w3
+	beq	.L742
+	add	w0, w0, 1
+	add	x2, x2, 2
+	cmp	w0, 128
+	bne	.L743
+	adrp	x1, .LANCHOR92
+	adrp	x0, .LC0
+	mov	w2, 188
+	add	x1, x1, :lo12:.LANCHOR92
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L745:
+	b	.L745
+.L746:
+	adrp	x1, .LANCHOR71
+	mov	w2, 21
+	strh	wzr, [x0, 696]
+	ldrh	w1, [x1, #:lo12:.LANCHOR71]
+	strh	w3, [x0, 692]
+	sub	w2, w2, w1
+	asr	w4, w3, w2
+	strh	w4, [x0, 694]
+	adrp	x0, .LANCHOR22
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	tbz	x0, 12, .L750
+	mov	w0, 1
+	and	w4, w4, 65535
+	lsl	w2, w0, w2
+	mov	w1, w3
+	adrp	x0, .LC27
+	sub	w2, w2, #1
+	add	x0, x0, :lo12:.LC27
+	bl	printf
+.L750:
+	mov	w0, 0
+	ldr	x23, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+.L742:
+	add	x0, x1, x0, sxtw 1
+	strh	w19, [x0, 416]
+	ldrh	w0, [x1, 688]
+	add	w0, w0, 1
+	strh	w0, [x1, 688]
+.L740:
+	ldr	x0, [x20, #:lo12:.LANCHOR46]
+	ldrh	w1, [x0, 690]
+	add	x1, x1, 336
+	ldrh	w3, [x0, x1, lsl 1]
+	mov	w1, 65533
+	sub	w2, w3, #1
+	cmp	w1, w2, uxth
+	bcs	.L746
+	adrp	x1, .LANCHOR92
+	adrp	x0, .LC0
+	mov	w2, 193
+	add	x1, x1, :lo12:.LANCHOR92
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L747:
+	b	.L747
+	.size	pm_alloc_new_blk, .-pm_alloc_new_blk
+	.section	.text.pm_select_ram_region,"ax",@progbits
+	.align	2
+	.global	pm_select_ram_region
+	.type	pm_select_ram_region, %function
+pm_select_ram_region:
+	adrp	x1, .LANCHOR93
+	add	x1, x1, :lo12:.LANCHOR93
+	mov	x2, 0
+	mov	w3, 65535
+.L759:
+	lsl	x4, x2, 4
+	and	w0, w2, 65535
+	ldrh	w4, [x4, x1]
+	cmp	w4, w3
+	beq	.L758
+	add	x2, x2, 1
+	cmp	x2, 32
+	bne	.L759
+	add	x1, x1, 2
+	mov	w0, w2
+	mov	x3, x1
+	mov	w5, 32768
+	mov	w2, 0
+.L761:
+	ldrh	w4, [x3]
+	tbnz	x4, 15, .L760
+	cmp	w4, w5
+	bcs	.L760
+	mov	w5, w4
+	mov	w0, w2
+.L760:
+	add	w2, w2, 1
+	add	x3, x3, 16
+	and	w2, w2, 65535
+	cmp	w2, 32
+	bne	.L761
+	cmp	w0, 32
+	bne	.L758
+	adrp	x2, .LANCHOR94
+	mov	w3, -1
+	ldrb	w4, [x2, #:lo12:.LANCHOR94]
+	mov	w2, 0
+.L763:
+	ldrh	w6, [x1]
+	cmp	w6, w3
+	bcs	.L762
+	ldrh	w5, [x1, -2]
+	cmp	w5, w4
+	csel	w3, w3, w6, eq
+	csel	w0, w0, w2, eq
+.L762:
+	add	w2, w2, 1
+	add	x1, x1, 16
+	and	w2, w2, 65535
+	cmp	w2, 32
+	bne	.L763
+	cmp	w0, 32
+	bne	.L758
+	stp	x29, x30, [sp, -16]!
+	adrp	x1, .LANCHOR95
+	adrp	x0, .LC0
+	mov	w2, 289
+	add	x29, sp, 0
+	add	x1, x1, :lo12:.LANCHOR95
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L764:
+	b	.L764
+.L758:
+	ret
+	.size	pm_select_ram_region, .-pm_select_ram_region
+	.section	.text.ftl_memset,"ax",@progbits
+	.align	2
+	.global	ftl_memset
+	.type	ftl_memset, %function
+ftl_memset:
+	uxtw	x2, w2
+	b	memset
+	.size	ftl_memset, .-ftl_memset
+	.section	.text.flash_lsb_page_tbl_build,"ax",@progbits
+	.align	2
+	.global	flash_lsb_page_tbl_build
+	.type	flash_lsb_page_tbl_build, %function
+flash_lsb_page_tbl_build:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR14
+	cbnz	w0, .L773
+	add	x1, x19, :lo12:.LANCHOR14
+	mov	x0, 0
+.L774:
+	strh	w0, [x1, x0, lsl 1]
+	add	x0, x0, 1
+	cmp	x0, 256
+	bne	.L774
+.L780:
+	adrp	x20, .LANCHOR96
+	add	x20, x20, :lo12:.LANCHOR96
+	mov	w2, 1024
+	mov	w1, 255
+	mov	x0, x20
+	add	x19, x19, :lo12:.LANCHOR14
+	bl	ftl_memset
+	mov	x0, 0
+.L775:
+	ldrh	w1, [x0, x19]
+	add	x0, x0, 2
+	cmp	x0, 512
+	strh	w1, [x20, w1, sxtw 1]
+	bne	.L775
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L773:
+	cmp	w0, 1
+	bne	.L776
+	add	x3, x19, :lo12:.LANCHOR14
+	mov	x1, 0
+.L779:
+	and	w0, w1, 65535
+	cmp	x1, 3
+	bls	.L777
+	ubfiz	w2, w0, 1, 15
+	and	w0, w0, 1
+	add	w0, w0, 2
+	sub	w0, w2, w0
+	and	w0, w0, 65535
+.L777:
+	strh	w0, [x3, x1, lsl 1]
+	add	x1, x1, 1
+	cmp	x1, 256
+	bne	.L779
+	b	.L780
+.L776:
+	cmp	w0, 2
+	bne	.L781
+	add	x3, x19, :lo12:.LANCHOR14
+	mov	w1, 65535
+	mov	x0, 0
+.L783:
+	cmp	x0, 2
+	and	w2, w0, 65535
+	csel	w2, w2, w1, cc
+	strh	w2, [x3, x0, lsl 1]
+	add	w1, w1, 2
+	add	x0, x0, 1
+	and	w1, w1, 65535
+	cmp	x0, 256
+	bne	.L783
+	b	.L780
+.L781:
+	cmp	w0, 3
+	bne	.L784
+	add	x3, x19, :lo12:.LANCHOR14
+	mov	x1, 0
+.L787:
+	and	w0, w1, 65535
+	cmp	x1, 5
+	bls	.L785
+	ubfiz	w2, w0, 1, 15
+	and	w0, w0, 1
+	add	w0, w0, 4
+	sub	w0, w2, w0
+	and	w0, w0, 65535
+.L785:
+	strh	w0, [x3, x1, lsl 1]
+	add	x1, x1, 1
+	cmp	x1, 256
+	bne	.L787
+	b	.L780
+.L784:
+	cmp	w0, 4
+	bne	.L788
+	add	x1, x19, :lo12:.LANCHOR14
+	mov	w2, 1
+	add	x1, x1, 16
+	strh	wzr, [x19, #:lo12:.LANCHOR14]
+	strh	w0, [x1, -8]
+	mov	w0, 5
+	strh	w2, [x1, -14]
+	mov	w2, 2
+	strh	w0, [x1, -6]
+	mov	w0, 7
+	strh	w2, [x1, -12]
+	mov	w2, 3
+	strh	w0, [x1, -4]
+	mov	w0, 8
+	strh	w2, [x1, -10]
+	strh	w0, [x1, -2]
+	mov	w0, 8
+.L790:
+	and	w3, w0, 1
+	ubfiz	w2, w0, 1, 15
+	add	w3, w3, 6
+	add	w0, w0, 1
+	sub	w2, w2, w3
+	strh	w2, [x1], 2
+	and	w0, w0, 65535
+	cmp	w0, 256
+	bne	.L790
+	b	.L780
+.L788:
+	cmp	w0, 5
+	bne	.L791
+	add	x1, x19, :lo12:.LANCHOR14
+	mov	x0, 0
+.L792:
+	strh	w0, [x1, x0, lsl 1]
+	add	x0, x0, 1
+	cmp	x0, 16
+	bne	.L792
+	add	x1, x1, 32
+.L793:
+	strh	w0, [x1], 2
+	add	w0, w0, 2
+	and	w0, w0, 65535
+	cmp	w0, 496
+	bne	.L793
+	b	.L780
+.L791:
+	cmp	w0, 8
+	bne	.L780
+	add	x1, x19, :lo12:.LANCHOR14
+	mov	x0, 0
+.L794:
+	strh	w0, [x0, x1]
+	add	x0, x0, 2
+	cmp	x0, 512
+	bne	.L794
+	b	.L780
+	.size	flash_lsb_page_tbl_build, .-flash_lsb_page_tbl_build
+	.section	.text.flash_die_info_init,"ax",@progbits
+	.align	2
+	.global	flash_die_info_init
+	.type	flash_die_info_init, %function
+flash_die_info_init:
+	stp	x29, x30, [sp, -80]!
+	mov	w2, 8
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR19
+	add	x19, x23, :lo12:.LANCHOR19
+	stp	x21, x22, [sp, 32]
+	stp	x25, x26, [sp, 64]
+	adrp	x25, .LANCHOR13
+	adrp	x26, .LANCHOR8
+	adrp	x22, .LANCHOR10
+	ldrh	w0, [x19, 26]
+	add	x21, x22, :lo12:.LANCHOR10
+	ldrb	w1, [x19, 12]
+	adrp	x24, .LANCHOR98
+	strh	w0, [x25, #:lo12:.LANCHOR13]
+	add	x20, x24, :lo12:.LANCHOR98
+	ldrh	w0, [x19, 10]
+	add	x19, x19, 1
+	strb	wzr, [x26, #:lo12:.LANCHOR8]
+	sdiv	w0, w0, w1
+	adrp	x1, .LANCHOR97
+	strh	w0, [x1, #:lo12:.LANCHOR97]
+	mov	w1, 0
+	mov	x0, x21
+	bl	ftl_memset
+	mov	w2, 32
+	mov	w1, 0
+	mov	x0, x20
+	bl	ftl_memset
+	ldrb	w13, [x23, #:lo12:.LANCHOR19]
+	mov	x7, x23
+	adrp	x14, .LANCHOR26
+	add	x11, x26, :lo12:.LANCHOR8
+	add	x23, x14, :lo12:.LANCHOR26
+	mov	x8, 0
+.L811:
+	mov	w2, w13
+	add	x1, x23, x8, lsl 3
+	mov	x0, x19
+	bl	flash_mem_cmp8
+	cbnz	w0, .L810
+	ldrb	w1, [x11]
+	add	w0, w1, 1
+	strb	w0, [x11]
+	str	wzr, [x20, x1, lsl 2]
+	strb	w8, [x21, x1]
+.L810:
+	add	x8, x8, 1
+	cmp	x8, 4
+	bne	.L811
+	add	x0, x7, :lo12:.LANCHOR19
+	ldrb	w1, [x0, 8]
+	cmp	w1, 2
+	beq	.L812
+.L816:
+	add	x7, x7, :lo12:.LANCHOR19
+	ldrb	w0, [x26, #:lo12:.LANCHOR8]
+	ldp	x19, x20, [sp, 16]
+	ldrb	w1, [x7, 13]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	mul	w0, w0, w1
+	ldrh	w1, [x7, 14]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	mul	w0, w0, w1
+	adrp	x1, .LANCHOR99
+	strh	w0, [x1, #:lo12:.LANCHOR99]
+	ret
+.L812:
+	ldrh	w1, [x25, #:lo12:.LANCHOR13]
+	add	x14, x14, :lo12:.LANCHOR26
+	ldrb	w11, [x0, 13]
+	add	x8, x0, 1
+	ldrb	w20, [x0, 23]
+	add	x19, x26, :lo12:.LANCHOR8
+	add	x15, x24, :lo12:.LANCHOR98
+	add	x22, x22, :lo12:.LANCHOR10
+	mov	x12, 0
+	mul	w11, w11, w1
+	ldrh	w1, [x0, 14]
+	and	w1, w1, 65280
+	mul	w11, w11, w1
+	lsl	w21, w11, 1
+.L815:
+	mov	w2, w13
+	add	x1, x14, x12, lsl 3
+	mov	x0, x8
+	bl	flash_mem_cmp8
+	cbnz	w0, .L813
+	ldrb	w1, [x19]
+	cmp	w20, 0
+	csel	w2, w11, w21, eq
+	add	w0, w1, 1
+	strb	w0, [x19]
+	str	w2, [x15, x1, lsl 2]
+	strb	w12, [x22, x1]
+.L813:
+	add	x12, x12, 1
+	cmp	x12, 4
+	bne	.L815
+	b	.L816
+	.size	flash_die_info_init, .-flash_die_info_init
+	.section	.text.FlashReadFacBbtData,"ax",@progbits
+	.align	2
+	.global	FlashReadFacBbtData
+	.type	FlashReadFacBbtData, %function
+FlashReadFacBbtData:
+	stp	x29, x30, [sp, -16]!
+	lsr	w2, w2, 3
+	mov	w1, 0
+	add	x29, sp, 0
+	bl	ftl_memset
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
+	.section	.text.lpa_hash_init,"ax",@progbits
+	.align	2
+	.global	lpa_hash_init
+	.type	lpa_hash_init, %function
+lpa_hash_init:
+	stp	x29, x30, [sp, -16]!
+	mov	w2, 512
+	mov	w1, 255
+	adrp	x0, .LANCHOR81
+	add	x29, sp, 0
+	add	x0, x0, :lo12:.LANCHOR81
+	bl	ftl_memset
+	adrp	x0, .LANCHOR79
+	mov	w1, 255
+	ldp	x29, x30, [sp], 16
+	ldrh	w2, [x0, #:lo12:.LANCHOR79]
+	adrp	x0, .LANCHOR69
+	ldrb	w0, [x0, #:lo12:.LANCHOR69]
+	mul	w2, w2, w0
+	adrp	x0, .LANCHOR83
+	ldr	x0, [x0, #:lo12:.LANCHOR83]
+	lsl	w2, w2, 2
+	b	ftl_memset
+	.size	lpa_hash_init, .-lpa_hash_init
+	.section	.text.lpa_rebuild_hash,"ax",@progbits
+	.align	2
+	.global	lpa_rebuild_hash
+	.type	lpa_rebuild_hash, %function
+lpa_rebuild_hash:
+	stp	x29, x30, [sp, -48]!
+	adrp	x0, .LANCHOR22
+	add	x29, sp, 0
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	tbz	x0, 12, .L828
+	adrp	x1, .LANCHOR100
+	adrp	x0, .LC28
+	mov	w3, 0
+	mov	w2, 190
+	add	x1, x1, :lo12:.LANCHOR100
+	add	x0, x0, :lo12:.LC28
+	bl	printf
+.L828:
+	adrp	x20, .LANCHOR79
+	adrp	x22, .LANCHOR69
+	adrp	x19, .LANCHOR81
+	add	x19, x19, :lo12:.LANCHOR81
+	mov	w2, 512
+	mov	w1, 255
+	mov	x0, x19
+	bl	ftl_memset
+	ldrh	w2, [x20, #:lo12:.LANCHOR79]
+	adrp	x21, .LANCHOR83
+	ldrb	w0, [x22, #:lo12:.LANCHOR69]
+	mov	w1, 255
+	add	x20, x20, :lo12:.LANCHOR79
+	mul	w2, w2, w0
+	ldr	x0, [x21, #:lo12:.LANCHOR83]
+	lsl	w2, w2, 2
+	bl	ftl_memset
+	adrp	x0, .LANCHOR82
+	ldrb	w3, [x22, #:lo12:.LANCHOR69]
+	ldr	x5, [x21, #:lo12:.LANCHOR83]
+	mov	w1, 0
+	ldr	x4, [x0, #:lo12:.LANCHOR82]
+.L829:
+	ldrh	w0, [x20]
+	mul	w0, w0, w3
+	cmp	w1, w0, lsl 1
+	blt	.L831
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
+.L831:
+	uxtw	x2, w1
+	ldr	w0, [x4, x2, lsl 2]
+	cmn	w0, #1
+	beq	.L830
+	and	x0, x0, 255
+	ldrh	w6, [x19, x0, lsl 1]
+	strh	w1, [x19, x0, lsl 1]
+	strh	w6, [x5, x2, lsl 1]
+.L830:
+	add	w1, w1, 1
+	and	w1, w1, 65535
+	b	.L829
+	.size	lpa_rebuild_hash, .-lpa_rebuild_hash
+	.section	.text.ftl_open_sblk_init,"ax",@progbits
+	.align	2
+	.global	ftl_open_sblk_init
+	.type	ftl_open_sblk_init, %function
+ftl_open_sblk_init:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR69
+	stp	x21, x22, [sp, 32]
+	mov	x19, x0
+	stp	x23, x24, [sp, 48]
+	adrp	x21, .LC26
+	adrp	x23, .LANCHOR79
+	mov	w22, w1
+	add	x23, x23, :lo12:.LANCHOR79
+	add	x20, x20, :lo12:.LANCHOR69
+	add	x21, x21, :lo12:.LC26
+	stp	x25, x26, [sp, 64]
+.L840:
+.L843:
+	mov	w0, w22
+	bl	ftl_alloc_sblk
+	mov	w1, 0
+	and	w24, w0, 65535
+	bl	ftl_erase_sblk
+	add	x1, x19, 16
+	mov	w0, w24
+	bl	ftl_get_blk_list_in_sblk
+	and	w0, w0, 255
+	ldrh	w1, [x23]
+	cmp	w22, 2
+	strb	w0, [x19, 9]
+	strh	w24, [x19]
+	strh	wzr, [x19, 2]
+	mul	w0, w1, w0
+	strb	wzr, [x19, 5]
+	strh	w0, [x19, 6]
+	strh	wzr, [x19, 10]
+	strb	w22, [x19, 4]
+	beq	.L844
+	ldrb	w0, [x20]
+	mul	w0, w1, w0
+	and	w0, w0, 65535
+.L841:
+	ldrb	w2, [x20]
+	adrp	x26, .LANCHOR56
+	strh	w0, [x19, 12]
+	ubfiz	x25, x24, 1, 16
+	mul	w2, w2, w1
+	adrp	x1, .LANCHOR82
+	ldr	x3, [x1, #:lo12:.LANCHOR82]
+	mov	w1, 255
+	lsl	w2, w2, 2
+	add	x0, x3, x0, uxth 2
+	bl	ftl_memset
+	ldr	x0, [x26, #:lo12:.LANCHOR56]
+	ldrh	w1, [x19, 6]
+	strh	w1, [x0, x25]
+	ldrb	w0, [x19, 9]
+	cbnz	w0, .L839
+	mov	w1, w24
+	mov	x0, x21
+	bl	printf
+	ldr	x0, [x26, #:lo12:.LANCHOR56]
+	mov	w1, -1
+	strh	w1, [x0, x25]
+	mov	w0, 7
+	strb	w0, [x19, 4]
+	b	.L843
+.L844:
+	mov	w0, 0
+	b	.L841
+.L839:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+	.size	ftl_open_sblk_init, .-ftl_open_sblk_init
+	.section	.text.pm_free_sblk,"ax",@progbits
+	.align	2
+	.global	pm_free_sblk
+	.type	pm_free_sblk, %function
+pm_free_sblk:
+	stp	x29, x30, [sp, -368]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR101
+	stp	x21, x22, [sp, 32]
+	ldrh	w0, [x20, #:lo12:.LANCHOR101]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	cmp	w0, 128
+	stp	x27, x28, [sp, 80]
+	bls	.L847
+	adrp	x1, .LANCHOR102
+	adrp	x0, .LC0
+	mov	w2, 74
+	add	x1, x1, :lo12:.LANCHOR102
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L848:
+	b	.L848
+.L847:
+	add	x23, x29, 112
+	mov	w2, 256
+	mov	w1, 0
+	mov	x0, x23
+	bl	ftl_memset
+	adrp	x24, .LANCHOR46
+	adrp	x0, .LANCHOR71
+	mov	w2, 21
+	ldr	x5, [x24, #:lo12:.LANCHOR46]
+	ldrh	w8, [x0, #:lo12:.LANCHOR71]
+	ldrh	w11, [x20, #:lo12:.LANCHOR101]
+	add	x4, x5, 704
+	sub	w0, w2, w8
+	mov	w2, 1
+	ldrh	w1, [x5, 698]
+	lsl	w2, w2, w0
+	adrp	x0, .LANCHOR70
+	add	x1, x1, 176
+	sub	w2, w2, #1
+	ldrb	w10, [x0, #:lo12:.LANCHOR70]
+	add	x1, x5, x1, lsl 2
+	mov	x27, x0
+.L849:
+	cmp	x4, x1
+	bne	.L853
+	adrp	x1, .LANCHOR69
+	adrp	x0, .LANCHOR79
+	add	x20, x20, :lo12:.LANCHOR101
+	add	x27, x27, :lo12:.LANCHOR70
+	ldrh	w2, [x0, #:lo12:.LANCHOR79]
+	add	x26, x1, :lo12:.LANCHOR69
+	ldrb	w21, [x1, #:lo12:.LANCHOR69]
+	add	x25, x0, :lo12:.LANCHOR79
+	mov	w28, 0
+	mov	w19, 0
+	mul	w21, w21, w2
+	mov	w2, 65535
+	and	w21, w21, 65535
+.L854:
+	ldrh	w0, [x20]
+	cmp	w0, w19
+	bhi	.L859
+	mov	w0, w28
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 368
+	ret
+.L853:
+	ldr	w0, [x4]
+	add	x6, x5, 416
+	mov	x3, 0
+	lsr	w0, w0, w8
+	and	w0, w0, w2
+	udiv	w0, w0, w10
+	and	w0, w0, 65535
+.L850:
+	cmp	w11, w3, uxth
+	bhi	.L852
+	add	x4, x4, 4
+	b	.L849
+.L852:
+	ldrh	w7, [x6]
+	cmp	w7, w0
+	bne	.L851
+	ldrh	w7, [x23, x3, lsl 1]
+	add	w7, w7, 1
+	strh	w7, [x23, x3, lsl 1]
+.L851:
+	add	x3, x3, 1
+	add	x6, x6, 2
+	b	.L850
+.L859:
+	ldr	x1, [x24, #:lo12:.LANCHOR46]
+	sxtw	x22, w19
+	add	x0, x22, 208
+	ldrb	w3, [x27]
+	ldrh	w0, [x1, x0, lsl 1]
+	ldrh	w1, [x1, 692]
+	sdiv	w1, w1, w3
+	cmp	w1, w0
+	bne	.L855
+	ldrb	w1, [x26]
+	ldrh	w3, [x25]
+	mul	w1, w1, w3
+	strh	w1, [x23, x22, lsl 1]
+.L855:
+	ldrh	w1, [x23, x22, lsl 1]
+	cmp	w21, w1
+	bls	.L856
+	cbnz	w1, .L860
+.L858:
+	cmp	w0, w2
+	beq	.L857
+	str	w2, [x29, 108]
+	bl	ftl_free_sblk
+	ldr	x0, [x24, #:lo12:.LANCHOR46]
+	add	x22, x22, 208
+	mov	w1, -1
+	ldr	w2, [x29, 108]
+	strh	w1, [x0, x22, lsl 1]
+	ldrh	w1, [x0, 688]
+	sub	w1, w1, #1
+	strh	w1, [x0, 688]
+	b	.L857
+.L856:
+	cbz	w1, .L858
+.L857:
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L854
+.L860:
+	mov	w28, w19
+	mov	w21, w1
+	b	.L857
+	.size	pm_free_sblk, .-pm_free_sblk
+	.section	.text.ftl_memcpy,"ax",@progbits
+	.align	2
+	.global	ftl_memcpy
+	.type	ftl_memcpy, %function
+ftl_memcpy:
+	uxtw	x2, w2
+	b	memcpy
+	.size	ftl_memcpy, .-ftl_memcpy
+	.section	.text.flash_into_data_init,"ax",@progbits
+	.align	2
+	.global	flash_into_data_init
+	.type	flash_into_data_init, %function
+flash_into_data_init:
+	stp	x29, x30, [sp, -32]!
+	mov	w2, 2048
+	mov	w1, 0
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	adrp	x19, .LANCHOR5
+	ldr	x0, [x19, #:lo12:.LANCHOR5]
+	bl	ftl_memset
+	ldr	x0, [x19, #:lo12:.LANCHOR5]
+	mov	w1, 21321
+	movk	w1, 0x5359, lsl 16
+	mov	w2, 32
+	add	x0, x0, 80
+	str	w1, [x0, -80]
+	mov	w1, 2032
+	str	w1, [x0, -72]
+	mov	w1, 1
+	strh	w1, [x0, -64]
+	adrp	x1, .LANCHOR103
+	add	x1, x1, :lo12:.LANCHOR103
+	bl	ftl_memcpy
+	ldr	x0, [x19, #:lo12:.LANCHOR5]
+	mov	w2, 32
+	ldr	x19, [sp, 16]
+	adrp	x1, .LANCHOR19
+	ldp	x29, x30, [sp], 32
+	add	x1, x1, :lo12:.LANCHOR19
+	add	x0, x0, 48
+	b	ftl_memcpy
+	.size	flash_into_data_init, .-flash_into_data_init
+	.section	.text.ftl_memcpy32,"ax",@progbits
+	.align	2
+	.global	ftl_memcpy32
+	.type	ftl_memcpy32, %function
+ftl_memcpy32:
+	mov	x3, 0
+.L866:
+	cmp	w2, w3
+	bhi	.L867
+	ret
+.L867:
+	ldr	w4, [x1, x3, lsl 2]
+	str	w4, [x0, x3, lsl 2]
+	add	x3, x3, 1
+	b	.L866
+	.size	ftl_memcpy32, .-ftl_memcpy32
+	.section	.text.ftl_memcmp,"ax",@progbits
+	.align	2
+	.global	ftl_memcmp
+	.type	ftl_memcmp, %function
+ftl_memcmp:
+	uxtw	x2, w2
+	b	memcmp
+	.size	ftl_memcmp, .-ftl_memcmp
+	.section	.text.rknand_get_clk_rate,"ax",@progbits
+	.align	2
+	.global	rknand_get_clk_rate
+	.type	rknand_get_clk_rate, %function
+rknand_get_clk_rate:
+	mov	w0, 19712
+	movk	w0, 0x8d2, lsl 16
+	ret
+	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
+	.section	.text.ftl_malloc,"ax",@progbits
+	.align	2
+	.global	ftl_malloc
+	.type	ftl_malloc, %function
+ftl_malloc:
+	mov	w1, 0
+	sxtw	x0, w0
+	b	kmalloc
+	.size	ftl_malloc, .-ftl_malloc
+	.section	.text.nandc_init,"ax",@progbits
+	.align	2
+	.global	nandc_init
+	.type	nandc_init, %function
+nandc_init:
+	stp	x29, x30, [sp, -32]!
+	adrp	x1, .LANCHOR7
+	mov	w2, 6
+	add	x29, sp, 0
+	strb	w2, [x1, #:lo12:.LANCHOR7]
+	adrp	x2, .LANCHOR6
+	str	wzr, [x29, 24]
+	str	x0, [x2, #:lo12:.LANCHOR6]
+	mov	w2, 12336
+	ldr	w3, [x0, 352]
+	movk	w2, 0x5638, lsl 16
+	cmp	w3, w2
+	bne	.L872
+	mov	w2, 8
+	strb	w2, [x1, #:lo12:.LANCHOR7]
+.L872:
+	ldr	w3, [x0, 128]
+	mov	w2, 12336
+	movk	w2, 0x5639, lsl 16
+	cmp	w3, w2
+	bne	.L873
+	mov	w2, 9
+	strb	w2, [x1, #:lo12:.LANCHOR7]
+.L873:
+	ldrb	w1, [x1, #:lo12:.LANCHOR7]
+	cmp	w1, 9
+	adrp	x1, .LANCHOR28
+	bne	.L874
+	mov	w2, 1
+	strb	w2, [x1, #:lo12:.LANCHOR28]
+	ldr	w1, [x29, 24]
+	orr	w1, w1, 256
+	str	w1, [x29, 24]
+	ldr	w1, [x29, 24]
+	str	w1, [x0]
+	str	wzr, [x0, 520]
+	mov	w1, 4225
+	str	w1, [x0, 4]
+	mov	w1, 8321
+	str	w1, [x0, 8]
+	mov	w1, 4099
+	movk	w1, 0x10, lsl 16
+	str	w1, [x0, 80]
+	mov	w1, 38
+	str	w1, [x0, 84]
+	mov	w1, 39
+	str	w1, [x0, 84]
+.L875:
+	adrp	x0, .LANCHOR29
+	mov	w1, 1
+	strb	w1, [x0, #:lo12:.LANCHOR29]
+	adrp	x0, .LANCHOR31
+	strh	wzr, [x0, #:lo12:.LANCHOR31]
+	adrp	x0, .LANCHOR27
+	strb	wzr, [x0, #:lo12:.LANCHOR27]
+	ldp	x29, x30, [sp], 32
+	ret
+.L874:
+	strb	wzr, [x1, #:lo12:.LANCHOR28]
+	ldr	w1, [x29, 24]
+	orr	w1, w1, 256
+	str	w1, [x29, 24]
+	ldr	w1, [x29, 24]
+	str	w1, [x0]
+	str	wzr, [x0, 336]
+	mov	w1, 4225
+	str	w1, [x0, 4]
+	mov	w1, 8321
+	str	w1, [x0, 344]
+	mov	w1, 4099
+	movk	w1, 0x10, lsl 16
+	str	w1, [x0, 304]
+	mov	w1, 38
+	str	w1, [x0, 308]
+	mov	w1, 39
+	str	w1, [x0, 308]
+	mov	w0, 2048
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR30
+	str	x0, [x1, #:lo12:.LANCHOR30]
+	b	.L875
+	.size	nandc_init, .-nandc_init
+	.section	.text.buf_init,"ax",@progbits
+	.align	2
+	.global	buf_init
+	.type	buf_init, %function
+buf_init:
+	stp	x29, x30, [sp, -48]!
+	adrp	x0, .LANCHOR36
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	add	x19, x0, :lo12:.LANCHOR36
+	stp	x21, x22, [sp, 32]
+	mov	x20, x0
+	adrp	x22, .LANCHOR45
+	add	x22, x22, :lo12:.LANCHOR45
+	mov	w21, 0
+.L878:
+	and	w0, w21, 255
+	strb	w0, [x19, 1]
+	add	w1, w0, 1
+	ldrb	w0, [x22]
+	strb	w1, [x19]
+	add	w21, w21, 1
+	strb	wzr, [x19, 2]
+	add	x19, x19, 64
+	str	xzr, [x19, -48]
+	lsl	w0, w0, 9
+	bl	ftl_malloc
+	str	x0, [x19, -56]
+	ldrb	w0, [x22]
+	lsl	w0, w0, 1
+	bl	ftl_malloc
+	str	x0, [x19, -40]
+	cmp	w21, 32
+	bne	.L878
+	add	x0, x20, :lo12:.LANCHOR36
+	mov	w1, -1
+	strb	w1, [x0, 1984]
+	adrp	x0, .LANCHOR37
+	strb	wzr, [x0, #:lo12:.LANCHOR37]
+	adrp	x0, .LANCHOR38
+	ldp	x19, x20, [sp, 16]
+	strb	w21, [x0, #:lo12:.LANCHOR38]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
+	.size	buf_init, .-buf_init
+	.section	.text.gc_init,"ax",@progbits
+	.align	2
+	.global	gc_init
+	.type	gc_init, %function
+gc_init:
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR67
+	mov	w2, 328
+	mov	w1, 0
+	add	x29, sp, 0
+	strb	wzr, [x0, #:lo12:.LANCHOR67]
+	adrp	x0, .LANCHOR104
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR58
+	add	x19, x20, :lo12:.LANCHOR58
+	strb	wzr, [x0, #:lo12:.LANCHOR104]
+	mov	x0, x19
+	bl	ftl_memset
+	mov	w0, -1
+	strh	w0, [x20, #:lo12:.LANCHOR58]
+	adrp	x0, .LANCHOR79
+	str	xzr, [x19, 8]
+	adrp	x4, .LANCHOR105
+	adrp	x20, .LANCHOR68
+	ldrh	w1, [x0, #:lo12:.LANCHOR79]
+	lsr	w3, w1, 1
+	lsr	w0, w1, 2
+	strh	w3, [x19, 38]
+	strh	w0, [x19, 36]
+	adrp	x19, .LANCHOR69
+	ldrb	w2, [x19, #:lo12:.LANCHOR69]
+	mul	w1, w1, w2
+	sub	w1, w1, #32
+	strh	w1, [x4, #:lo12:.LANCHOR105]
+	adrp	x1, .LANCHOR106
+	strh	w3, [x1, #:lo12:.LANCHOR106]
+	adrp	x1, .LANCHOR57
+	strh	w0, [x1, #:lo12:.LANCHOR57]
+	ldrh	w0, [x20, #:lo12:.LANCHOR68]
+	mul	w0, w0, w2
+	lsl	w0, w0, 2
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR107
+	str	x0, [x1, #:lo12:.LANCHOR107]
+	ldrb	w1, [x19, #:lo12:.LANCHOR69]
+	ldrh	w0, [x20, #:lo12:.LANCHOR68]
+	mul	w0, w0, w1
+	lsl	w0, w0, 2
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR108
+	str	x0, [x1, #:lo12:.LANCHOR108]
+	ldrh	w1, [x20, #:lo12:.LANCHOR68]
+	ldrb	w0, [x19, #:lo12:.LANCHOR69]
+	mul	w0, w1, w0
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR65
+	str	x0, [x1, #:lo12:.LANCHOR65]
+	ldrb	w1, [x19, #:lo12:.LANCHOR69]
+	ldrh	w0, [x20, #:lo12:.LANCHOR68]
+	mul	w0, w0, w1
+	lsl	w0, w0, 2
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR61
+	str	x0, [x1, #:lo12:.LANCHOR61]
+	ldrb	w1, [x19, #:lo12:.LANCHOR69]
+	ldrh	w0, [x20, #:lo12:.LANCHOR68]
+	mul	w0, w0, w1
+	lsl	w0, w0, 2
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR109
+	ldp	x19, x20, [sp, 16]
+	str	x0, [x1, #:lo12:.LANCHOR109]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	gc_init, .-gc_init
+	.section	.text.ftl_free,"ax",@progbits
+	.align	2
+	.global	ftl_free
+	.type	ftl_free, %function
+ftl_free:
+	b	free
+	.size	ftl_free, .-ftl_free
+	.section	.text.js_hash,"ax",@progbits
+	.align	2
+	.global	js_hash
+	.type	js_hash, %function
+js_hash:
+	mov	x4, x0
+	mov	w0, 42982
+	mov	x3, 0
+	movk	w0, 0x47c6, lsl 16
+.L885:
+	cmp	w1, w3
+	bhi	.L886
+	ret
+.L886:
+	lsr	w2, w0, 2
+	ldrb	w5, [x4, x3]
+	add	w2, w2, w0, lsl 5
+	add	x3, x3, 1
+	add	w2, w2, w5
+	eor	w0, w0, w2
+	b	.L885
+	.size	js_hash, .-js_hash
+	.section	.text.timer_get_time,"ax",@progbits
+	.align	2
+	.global	timer_get_time
+	.type	timer_get_time, %function
+timer_get_time:
+	mov	w0, 0
+	ret
+	.size	timer_get_time, .-timer_get_time
+	.section	.text.FlashCs123Init,"ax",@progbits
+	.align	2
+	.global	FlashCs123Init
+	.type	FlashCs123Init, %function
+FlashCs123Init:
+	ret
+	.size	FlashCs123Init, .-FlashCs123Init
+	.section	.text.rk_nand_de_init,"ax",@progbits
+	.align	2
+	.global	rk_nand_de_init
+	.type	rk_nand_de_init, %function
+rk_nand_de_init:
+	b	FlashDeInit
+	.size	rk_nand_de_init, .-rk_nand_de_init
+	.section	.text.rk_ftl_get_capacity,"ax",@progbits
+	.align	2
+	.global	rk_ftl_get_capacity
+	.type	rk_ftl_get_capacity, %function
+rk_ftl_get_capacity:
+	adrp	x0, .LANCHOR52
+	ldr	w0, [x0, #:lo12:.LANCHOR52]
+	ret
+	.size	rk_ftl_get_capacity, .-rk_ftl_get_capacity
+	.section	.text.rknand_print_hex,"ax",@progbits
+	.align	2
+	.global	rknand_print_hex
+	.type	rknand_print_hex, %function
+rknand_print_hex:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LC30
+	stp	x23, x24, [sp, 48]
+	mov	x22, x1
+	stp	x25, x26, [sp, 64]
+	adrp	x23, .LC29
+	mov	x26, x0
+	mov	w24, w2
+	uxtw	x25, w3
+	add	x23, x23, :lo12:.LC29
+	add	x21, x21, :lo12:.LC30
+	stp	x19, x20, [sp, 16]
+	str	x27, [sp, 80]
+	mov	x19, 0
+	mov	w20, 0
+	adrp	x27, .LC31
+.L892:
+	cmp	x25, x19
+	bne	.L898
+	ldp	x19, x20, [sp, 16]
+	adrp	x1, .LC31
+	ldp	x21, x22, [sp, 32]
+	add	x1, x1, :lo12:.LC31
+	ldp	x23, x24, [sp, 48]
+	adrp	x0, .LC32
+	ldp	x25, x26, [sp, 64]
+	add	x0, x0, :lo12:.LC32
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	b	printf
+.L898:
+	cbnz	w20, .L893
+	mov	w2, w19
+	mov	x1, x26
+	mov	x0, x23
+	bl	printf
+.L893:
+	cmp	w24, 4
+	bne	.L894
+	ldr	w1, [x22, x19, lsl 2]
+.L900:
+	mov	x0, x21
+	add	w20, w20, 1
+	bl	printf
+	cmp	w20, 15
+	bls	.L897
+	mov	w20, 0
+	add	x1, x27, :lo12:.LC31
+	adrp	x0, .LC32
+	add	x0, x0, :lo12:.LC32
+	bl	printf
+.L897:
+	add	x19, x19, 1
+	b	.L892
+.L894:
+	cmp	w24, 2
+	bne	.L896
+	ldrsh	w1, [x22, x19, lsl 1]
+	b	.L900
+.L896:
+	ldrb	w1, [x22, x19]
+	b	.L900
+	.size	rknand_print_hex, .-rknand_print_hex
+	.section	.text.hynix_get_read_retry_default,"ax",@progbits
+	.align	2
+	.global	hynix_get_read_retry_default
+	.type	hynix_get_read_retry_default, %function
+hynix_get_read_retry_default:
+	stp	x29, x30, [sp, -144]!
+	mov	w2, -83
+	mov	w1, -82
+	add	x29, sp, 0
+	stp	x27, x28, [sp, 80]
+	stp	x21, x22, [sp, 32]
+	str	w0, [x29, 140]
+	adrp	x0, .LANCHOR5
+	stp	x19, x20, [sp, 16]
+	ldr	x28, [x0, #:lo12:.LANCHOR5]
+	stp	x23, x24, [sp, 48]
+	add	x0, x28, 112
+	str	x0, [x29, 112]
+	ldrb	w0, [x29, 140]
+	add	x22, x28, 128
+	stp	x25, x26, [sp, 64]
+	strb	w0, [x28, 112]
+	mov	w0, -84
+	ldr	w3, [x29, 140]
+	strb	w0, [x28, 128]
+	mov	w0, -81
+	strb	w2, [x28, 129]
+	cmp	w3, 2
+	strb	w1, [x28, 130]
+	strb	w0, [x28, 131]
+	bne	.L902
+	mov	w0, -89
+	strb	w0, [x28, 128]
+	adrp	x0, .LANCHOR110+17
+	mov	w1, -9
+	strb	w1, [x0, #:lo12:.LANCHOR110+17]
+.L957:
+	mov	w0, 7
+	b	.L992
+.L902:
+	ldr	w3, [x29, 140]
+	cmp	w3, 3
+	bne	.L904
+	mov	x6, 0
+.L905:
+	sub	w0, w6, #80
+	strb	w0, [x22, x6]
+	add	x6, x6, 1
+	cmp	x6, 8
+	bne	.L905
+	stp	w6, w6, [x29, 132]
+.L903:
+	ldr	w0, [x29, 140]
+	sub	w0, w0, #1
+	cmp	w0, 1
+	bhi	.L910
+	adrp	x7, .LANCHOR8
+	adrp	x11, .LANCHOR10
+	add	x24, x7, :lo12:.LANCHOR8
+	add	x25, x11, :lo12:.LANCHOR10
+	mov	w20, 0
+	mov	w26, 55
+.L911:
+	ldrb	w0, [x24]
+	cmp	w0, w20
+	bhi	.L917
+.L918:
+	ldr	x0, [x29, 112]
+	ldrb	w1, [x29, 136]
+	strb	w1, [x0, 1]
+	ldrb	w1, [x29, 132]
+	strb	w1, [x0, 2]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 144
+	ret
+.L904:
+	ldr	w3, [x29, 140]
+	cmp	w3, 4
+	bne	.L906
+	mov	w3, -52
+	strb	w3, [x28, 128]
+	mov	w3, -65
+	strb	w3, [x28, 129]
+	mov	w3, -86
+	strb	w3, [x28, 130]
+	mov	w3, -85
+	strb	w0, [x28, 135]
+	strb	w3, [x28, 131]
+	mov	w0, 8
+	mov	w3, -51
+	strb	w2, [x28, 133]
+	strb	w3, [x28, 132]
+	strb	w1, [x28, 134]
+	str	w0, [x29, 132]
+.L993:
+	str	w0, [x29, 136]
+	b	.L903
+.L906:
+	ldr	w0, [x29, 140]
+	cmp	w0, 5
+	bne	.L907
+	mov	w0, 56
+	strb	w0, [x28, 128]
+	mov	w0, 57
+	strb	w0, [x28, 129]
+	mov	w0, 58
+	strb	w0, [x28, 130]
+	mov	w0, 59
+	strb	w0, [x28, 131]
+	mov	w0, 8
+.L992:
+	str	w0, [x29, 132]
+	mov	w0, 4
+	b	.L993
+.L907:
+	ldr	w0, [x29, 140]
+	cmp	w0, 6
+	bne	.L908
+	mov	w0, 14
+	strb	w0, [x28, 128]
+	mov	w0, 15
+	strb	w0, [x28, 129]
+	mov	w0, 16
+	strb	w0, [x28, 130]
+	mov	w0, 17
+	strb	w0, [x28, 131]
+	mov	w0, 12
+	b	.L992
+.L908:
+	ldr	w0, [x29, 140]
+	cmp	w0, 7
+	bne	.L957
+	mov	x0, 0
+.L909:
+	sub	w1, w0, #80
+	strb	w1, [x22, x0]
+	add	x0, x0, 1
+	cmp	x0, 8
+	bne	.L909
+	mov	w0, -44
+	strb	w0, [x28, 136]
+	mov	w0, -43
+	strb	w0, [x28, 137]
+	mov	w0, 12
+	str	w0, [x29, 132]
+	mov	w0, 10
+	b	.L993
+.L917:
+	ldrb	w0, [x25, w20, sxtw]
+	mov	x1, 32
+	mov	w2, 160
+	mov	x21, 0
+	umaddl	x2, w2, w0, x1
+	ldr	x1, [x29, 112]
+	ubfiz	x0, x0, 8, 8
+	add	x19, x1, x2
+	adrp	x1, .LANCHOR6
+	ldr	x4, [x1, #:lo12:.LANCHOR6]
+	add	x23, x4, x0
+.L912:
+	str	w26, [x23, 2056]
+	ldrb	w0, [x22, x21]
+	str	w0, [x23, 2052]
+	mov	w0, 80
+	bl	timer_delay_ns
+	ldr	w0, [x23, 2048]
+	strb	w0, [x19, x21]
+	add	x21, x21, 1
+	ldr	w0, [x29, 136]
+	cmp	w0, w21, uxtb
+	bhi	.L912
+	adrp	x3, .LANCHOR110
+	add	x3, x3, :lo12:.LANCHOR110
+	mov	x0, 0
+.L915:
+	add	x15, x19, x0
+	add	x14, x3, x0
+	mov	x1, 1
+.L914:
+	lsl	x4, x1, 2
+	lsl	x16, x1, 3
+	ldrb	w17, [x19, x0]
+	add	x1, x1, 1
+	cmp	x1, 7
+	ldrb	w4, [x14, x4]
+	add	w4, w4, w17
+	strb	w4, [x15, x16]
+	bne	.L914
+	add	x0, x0, 1
+	cmp	x0, 4
+	bne	.L915
+	add	w5, w20, 1
+	strb	wzr, [x19, 16]
+	strb	wzr, [x19, 24]
+	and	w20, w5, 255
+	strb	wzr, [x19, 32]
+	strb	wzr, [x19, 40]
+	strb	wzr, [x19, 48]
+	strb	wzr, [x19, 41]
+	strb	wzr, [x19, 49]
+	b	.L911
+.L910:
+	ldr	w0, [x29, 140]
+	sub	w0, w0, #3
+	cmp	w0, 4
+	bhi	.L918
+	ldp	w0, w1, [x29, 132]
+	adrp	x19, .LANCHOR8
+	add	x19, x19, :lo12:.LANCHOR8
+	sub	w13, w1, #1
+	mul	w15, w0, w1
+	and	x13, x13, 255
+	asr	w0, w15, 2
+	stp	w0, wzr, [x29, 124]
+	lsl	w0, w15, 4
+	str	w0, [x29, 120]
+	ldr	w0, [x29, 124]
+	lsl	w22, w0, 1
+	sbfiz	x21, x0, 2, 32
+	ldr	w0, [x29, 140]
+	sub	w20, w0, #5
+	add	x0, x13, 1
+	str	x0, [x29, 96]
+.L919:
+	ldrb	w0, [x19]
+	ldr	w1, [x29, 128]
+	cmp	w0, w1
+	bls	.L918
+	ldr	w1, [x29, 128]
+	adrp	x0, .LANCHOR10
+	add	x0, x0, :lo12:.LANCHOR10
+	mov	w10, 160
+	mov	w23, 255
+	ldrb	w4, [x0, w1, sxtw]
+	mov	x0, 32
+	umaddl	x10, w10, w4, x0
+	ldr	x0, [x29, 112]
+	ubfiz	x4, x4, 8, 8
+	add	x0, x0, x10
+	str	x0, [x29, 104]
+	adrp	x0, .LANCHOR6
+	ldr	x0, [x0, #:lo12:.LANCHOR6]
+	add	x27, x0, x4
+	str	w23, [x27, 2056]
+	bl	nandc_wait_flash_ready
+	mov	w0, 54
+	str	w0, [x27, 2056]
+	ldr	w0, [x29, 140]
+	cmp	w0, 4
+	bne	.L920
+	mov	w0, 64
+	str	w23, [x27, 2052]
+	str	w0, [x27, 2048]
+	mov	w0, 204
+.L994:
+	str	w0, [x27, 2052]
+	mov	w0, 77
+	b	.L995
+.L920:
+	cmp	w20, 1
+	bhi	.L922
+	ldrb	w0, [x28, 128]
+	str	w0, [x27, 2052]
+	mov	w0, 82
+.L995:
+	str	w0, [x27, 2048]
+	mov	w0, 22
+	str	w0, [x27, 2056]
+	mov	w0, 23
+	str	w0, [x27, 2056]
+	mov	w0, 4
+	str	w0, [x27, 2056]
+	mov	w0, 25
+	str	w0, [x27, 2056]
+	str	wzr, [x27, 2056]
+	str	wzr, [x27, 2052]
+	ldr	w0, [x29, 140]
+	str	wzr, [x27, 2052]
+	cmp	w0, 6
+	bne	.L923
+	mov	w0, 31
+	str	w0, [x27, 2052]
+.L924:
+	mov	w23, 2
+	str	w23, [x27, 2052]
+	str	wzr, [x27, 2052]
+	mov	w0, 48
+	str	w0, [x27, 2056]
+	bl	nandc_wait_flash_ready
+	cmp	w20, 1
+	bls	.L958
+	ldr	w0, [x29, 140]
+	cmp	w0, 7
+	mov	w0, 32
+	csel	w23, w23, w0, ne
+.L925:
+	adrp	x3, .LANCHOR111
+	mov	x1, 0
+	ldr	x0, [x3, #:lo12:.LANCHOR111]
+.L926:
+	ldr	w2, [x27, 2048]
+	strb	w2, [x0, x1]
+	add	x1, x1, 1
+	cmp	w23, w1, uxtb
+	bhi	.L926
+	ldr	w1, [x29, 140]
+	cmp	w1, 7
+	bne	.L927
+	mov	w1, 0
+.L929:
+	ldrb	w2, [x0]
+	cmp	w2, 12
+	beq	.L928
+	ldrb	w2, [x0, 1]
+	cmp	w2, 10
+	beq	.L928
+	add	w1, w1, 1
+	add	x0, x0, 4
+	and	w1, w1, 255
+	cmp	w1, 8
+	bne	.L929
+.L930:
+	adrp	x0, .LC33
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC33
+	bl	printf
+.L932:
+	b	.L932
+.L922:
+	mov	w0, 174
+	str	w0, [x27, 2052]
+	str	wzr, [x27, 2048]
+	mov	w0, 176
+	b	.L994
+.L923:
+	str	wzr, [x27, 2052]
+	b	.L924
+.L958:
+	mov	w23, 16
+	b	.L925
+.L928:
+	cmp	w1, 6
+	bhi	.L930
+.L931:
+	ldr	x2, [x3, #:lo12:.LANCHOR111]
+	mov	x0, 0
+.L936:
+	ldr	w1, [x29, 120]
+	cmp	w1, w0
+	bgt	.L937
+	ldr	x1, [x3, #:lo12:.LANCHOR111]
+	mov	w16, 8
+	add	x3, x1, x21
+.L939:
+	mov	x0, 0
+.L938:
+	ldr	w17, [x3, x0, lsl 2]
+	ldr	w4, [x29, 124]
+	mvn	w17, w17
+	str	w17, [x3, x0, lsl 2]
+	add	x0, x0, 1
+	cmp	w4, w0
+	bgt	.L938
+	add	x3, x3, x22, uxtw 2
+	subs	w16, w16, #1
+	bne	.L939
+	mov	x17, x1
+	mov	w23, 0
+	mov	w26, 1
+.L940:
+	mov	w3, 0
+	mov	w0, 0
+.L944:
+	mov	x25, x17
+	lsl	w16, w26, w0
+	mov	w24, 16
+	mov	w30, 0
+.L942:
+	ldr	w4, [x25]
+	add	x25, x25, x21
+	bics	wzr, w16, w4
+	cinc	w30, w30, eq
+	subs	w24, w24, #1
+	bne	.L942
+	cmp	w30, 9
+	orr	w16, w3, w16
+	add	w0, w0, 1
+	csel	w3, w16, w3, cs
+	cmp	w0, 32
+	bne	.L944
+	ldr	w0, [x29, 124]
+	add	w23, w23, 1
+	str	w3, [x17], 4
+	cmp	w0, w23
+	bgt	.L940
+	mov	x0, 0
+	mov	w3, 0
+.L947:
+	ldr	w16, [x1, x0]
+	add	x0, x0, 4
+	cmp	w16, 0
+	cinc	w3, w3, eq
+	cmp	x0, 32
+	bne	.L947
+	cmp	w3, 7
+	ble	.L948
+	mov	w3, 1024
+	mov	w2, 1
+	adrp	x0, .LC34
+	add	x0, x0, :lo12:.LC34
+	bl	rknand_print_hex
+	adrp	x0, .LC33
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC33
+	bl	printf
+.L949:
+	b	.L949
+.L927:
+	ldr	w1, [x29, 140]
+	cmp	w1, 6
+	bne	.L931
+	mov	x1, 0
+.L933:
+	ldrb	w2, [x0, x1]
+	cmp	w2, 12
+	beq	.L931
+	add	x2, x0, x1
+	ldrb	w2, [x2, 8]
+	cmp	w2, 4
+	beq	.L931
+	add	x1, x1, 1
+	cmp	x1, 8
+	bne	.L933
+	adrp	x0, .LC33
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC33
+	bl	printf
+.L935:
+	b	.L935
+.L937:
+	ldr	w1, [x27, 2048]
+	strb	w1, [x2, x0]
+	add	x0, x0, 1
+	b	.L936
+.L948:
+	ldr	w0, [x29, 140]
+	cmp	w0, 6
+	beq	.L960
+	cmp	w0, 7
+	mov	x1, 10
+	mov	x0, 8
+	csel	x0, x0, x1, ne
+.L950:
+	ldr	x10, [x29, 104]
+	mov	w3, 0
+.L951:
+	mov	x1, 0
+.L952:
+	ldrb	w16, [x2, x1]
+	ldr	w4, [x29, 136]
+	strb	w16, [x10, x1]
+	add	x1, x1, 1
+	cmp	w4, w1, uxtb
+	bhi	.L952
+	ldr	x1, [x29, 96]
+	add	w3, w3, 1
+	add	x10, x10, x0
+	add	x2, x2, x1
+	ldr	w1, [x29, 132]
+	cmp	w1, w3
+	bgt	.L951
+	mov	w23, 255
+	str	w23, [x27, 2056]
+	bl	nandc_wait_flash_ready
+	cmp	w20, 1
+	bhi	.L954
+	mov	w0, 54
+	str	w0, [x27, 2056]
+	ldrb	w0, [x28, 128]
+	str	w0, [x27, 2052]
+	str	wzr, [x27, 2048]
+	mov	w0, 22
+	str	w0, [x27, 2056]
+	mov	w0, 48
+	str	wzr, [x27, 2056]
+	str	wzr, [x27, 2052]
+	str	wzr, [x27, 2052]
+	str	w23, [x27, 2052]
+	str	w23, [x27, 2052]
+	str	w23, [x27, 2052]
+.L996:
+	str	w0, [x27, 2056]
+	bl	nandc_wait_flash_ready
+	ldr	w0, [x29, 128]
+	add	w11, w0, 1
+	and	w0, w11, 255
+	str	w0, [x29, 128]
+	b	.L919
+.L960:
+	mov	x0, 4
+	b	.L950
+.L954:
+	mov	w0, 56
+	b	.L996
+	.size	hynix_get_read_retry_default, .-hynix_get_read_retry_default
+	.section	.text.flash_get_read_retry_tbl,"ax",@progbits
+	.align	2
+	.global	flash_get_read_retry_tbl
+	.type	flash_get_read_retry_tbl, %function
+flash_get_read_retry_tbl:
+	adrp	x0, .LANCHOR19+19
+	ldrb	w0, [x0, #:lo12:.LANCHOR19+19]
+	sub	w1, w0, #1
+	and	w1, w1, 255
+	cmp	w1, 6
+	bhi	.L997
+	b	hynix_get_read_retry_default
+.L997:
+	ret
+	.size	flash_get_read_retry_tbl, .-flash_get_read_retry_tbl
+	.section	.text.nandc_xfer_done,"ax",@progbits
+	.align	2
+	.global	nandc_xfer_done
+	.type	nandc_xfer_done, %function
+nandc_xfer_done:
+	stp	x29, x30, [sp, -80]!
+	adrp	x0, .LANCHOR7
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR6
+	ldrb	w0, [x0, #:lo12:.LANCHOR7]
+	stp	x21, x22, [sp, 32]
+	str	x23, [sp, 48]
+	cmp	w0, 9
+	ldr	x20, [x19, #:lo12:.LANCHOR6]
+	bne	.L1000
+	ldr	w0, [x20, 16]
+	mov	w21, 0
+	str	w0, [x29, 64]
+	ldr	w0, [x20, 48]
+	tbnz	x0, 1, .L1001
+	adrp	x22, .LC37
+	adrp	x23, .LC36
+	add	x22, x22, :lo12:.LC37
+	add	x23, x23, :lo12:.LC36
+.L1002:
+	ldr	w0, [x29, 64]
+	tbnz	x0, 20, .L1005
+	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	add	w21, w21, 1
+	tst	x21, 16777215
+	ldr	w0, [x0, 16]
+	str	w0, [x29, 64]
+	bne	.L1002
+	ldr	w2, [x29, 64]
+	mov	w1, w21
+	ldr	w3, [x20, 64]
+	mov	x0, x22
+	ubfx	x3, x3, 16, 6
+	bl	printf
+	ldr	x1, [x19, #:lo12:.LANCHOR6]
+	mov	w3, 256
+	mov	w2, 4
+	mov	x0, x23
+	bl	rknand_print_hex
+	b	.L1002
+.L1001:
+	adrp	x22, .LC35
+	adrp	x23, .LC36
+	add	x22, x22, :lo12:.LC35
+	add	x23, x23, :lo12:.LC36
+.L1003:
+	ldr	w1, [x20, 64]
+	ldr	w0, [x29, 64]
+	ubfx	x1, x1, 16, 6
+	ubfx	x0, x0, 22, 6
+	cmp	w1, w0
+	blt	.L1007
+.L1005:
+	adrp	x0, .LANCHOR30+32
+	ldr	x23, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	str	wzr, [x0, #:lo12:.LANCHOR30+32]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 80
+	ret
+.L1007:
+	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	ldr	w0, [x0]
+	str	w0, [x29, 72]
+	ldr	w0, [x29, 72]
+	tbz	x0, 13, .L1004
+	ldr	w0, [x29, 72]
+	tbnz	x0, 17, .L1005
+.L1004:
+	add	w21, w21, 1
+	tst	x21, 16777215
+	bne	.L1003
+	ldr	w2, [x20, 64]
+	mov	w1, w21
+	ldr	w3, [x29, 64]
+	mov	x0, x22
+	ubfx	x2, x2, 16, 5
+	ubfx	x3, x3, 22, 6
+	bl	printf
+	ldr	x1, [x19, #:lo12:.LANCHOR6]
+	mov	w3, 256
+	mov	w2, 4
+	mov	x0, x23
+	bl	rknand_print_hex
+	b	.L1003
+.L1000:
+	ldr	w0, [x20, 8]
+	mov	w21, 0
+	str	w0, [x29, 64]
+	ldr	w0, [x20, 16]
+	tbnz	x0, 1, .L1011
+	adrp	x22, .LC37
+	adrp	x23, .LC36
+	add	x22, x22, :lo12:.LC37
+	add	x23, x23, :lo12:.LC36
+.L1012:
+	ldr	w0, [x29, 64]
+	tbnz	x0, 20, .L1005
+	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	add	w21, w21, 1
+	tst	x21, 16777215
+	ldr	w0, [x0, 8]
+	str	w0, [x29, 64]
+	bne	.L1012
+	ldr	w2, [x29, 64]
+	mov	w1, w21
+	ldr	w3, [x20, 28]
+	mov	x0, x22
+	ubfx	x3, x3, 16, 5
+	bl	printf
+	ldr	x1, [x19, #:lo12:.LANCHOR6]
+	mov	w3, 256
+	mov	w2, 4
+	mov	x0, x23
+	bl	rknand_print_hex
+	b	.L1012
+.L1011:
+	adrp	x22, .LC35
+	adrp	x23, .LC36
+	add	x22, x22, :lo12:.LC35
+	add	x23, x23, :lo12:.LC36
+.L1013:
+	ldr	w1, [x20, 28]
+	ldr	w0, [x29, 64]
+	ubfx	x1, x1, 16, 5
+	ubfx	x0, x0, 22, 6
+	cmp	w1, w0
+	bge	.L1005
+	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	ldr	w0, [x0]
+	str	w0, [x29, 72]
+	ldr	w0, [x29, 72]
+	tbz	x0, 13, .L1014
+	ldr	w0, [x29, 72]
+	tbz	x0, 17, .L1014
+	ldr	w1, [x29, 72]
+	adrp	x0, .LC38
+	add	x0, x0, :lo12:.LC38
+	bl	printf
+	b	.L1005
+.L1014:
+	add	w21, w21, 1
+	tst	x21, 16777215
+	bne	.L1013
+	ldr	w2, [x20, 28]
+	mov	w1, w21
+	ldr	w3, [x29, 64]
+	mov	x0, x22
+	ubfx	x2, x2, 16, 5
+	ubfx	x3, x3, 22, 6
+	bl	printf
+	ldr	x1, [x19, #:lo12:.LANCHOR6]
+	mov	w3, 256
+	mov	w2, 4
+	mov	x0, x23
+	bl	rknand_print_hex
+	b	.L1013
+	.size	nandc_xfer_done, .-nandc_xfer_done
+	.section	.text.nandc_xfer,"ax",@progbits
+	.align	2
+	.global	nandc_xfer
+	.type	nandc_xfer, %function
+nandc_xfer:
+	stp	x29, x30, [sp, -64]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w19, w2, 255
+	stp	x21, x22, [sp, 32]
+	and	w22, w1, 255
+	mov	x21, x3
+	mov	w1, w19
+	mov	x3, x4
+	mov	x2, x21
+	mov	w0, w22
+	mov	x20, x4
+	bl	nandc_xfer_start
+	bl	nandc_xfer_done
+	cbnz	w22, .L1052
+	adrp	x0, .LANCHOR7
+	ldrb	w0, [x0, #:lo12:.LANCHOR7]
+	cmp	w0, 9
+	bne	.L1036
+	adrp	x1, .LANCHOR6
+	lsr	w19, w19, 2
+	mov	x20, x1
+	mov	w3, 1
+	ldr	x5, [x1, #:lo12:.LANCHOR6]
+	mov	w2, 0
+	mov	w0, 0
+.L1037:
+	cmp	w2, w19
+	bcc	.L1041
+	ldr	w19, [x5]
+	cmp	w3, 0
+	mov	w1, 512
+	csel	w0, w0, w1, eq
+	mov	w1, 8192
+	movk	w1, 0x2, lsl 16
+	and	w1, w19, w1
+	cmp	w1, 139264
+	bne	.L1035
+	mov	w1, w19
+	adrp	x0, .LC39
+	add	x0, x0, :lo12:.LC39
+	bl	printf
+	ldr	x0, [x20, #:lo12:.LANCHOR6]
+	orr	w19, w19, 131072
+.L1065:
+	str	w19, [x0]
+	mov	w0, -1
+.L1035:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+.L1041:
+	uxtw	x1, w2
+	add	x1, x1, 84
+	ldr	w1, [x5, x1, lsl 2]
+	str	w1, [x29, 56]
+	ldr	w1, [x29, 56]
+	ldr	w4, [x29, 56]
+	ubfx	x4, x4, 26, 1
+	and	w1, w4, w1, lsr 10
+	and	w3, w3, w1
+	ldr	w1, [x29, 56]
+	tbnz	x1, 2, .L1054
+	ldr	w1, [x29, 56]
+	tbnz	x1, 18, .L1054
+	ldr	w4, [x29, 56]
+	ldr	w1, [x29, 56]
+	ubfx	x4, x4, 3, 7
+	ubfx	x1, x1, 19, 7
+	cmp	w4, w1
+	ldr	w1, [x29, 56]
+	ble	.L1039
+	ubfx	x1, x1, 3, 7
+.L1040:
+	cmp	w0, w1
+	csel	w0, w0, w1, cs
+.L1038:
+	add	w2, w2, 1
+	b	.L1037
+.L1039:
+	ubfx	x1, x1, 19, 7
+	b	.L1040
+.L1054:
+	mov	w0, -1
+	b	.L1038
+.L1036:
+	adrp	x0, .LANCHOR27
+	lsr	w4, w19, 1
+	mov	w3, 64
+	mov	w1, 1
+	ldrb	w0, [x0, #:lo12:.LANCHOR27]
+	mov	w2, 0
+	adrp	x6, .LANCHOR30
+	cmp	w0, 25
+	mov	w0, 128
+	csel	w3, w3, w0, cc
+	mov	w0, 0
+.L1044:
+	add	w5, w3, w0
+	cmp	w2, w4
+	bcc	.L1045
+	adrp	x22, .LANCHOR6
+	lsr	w19, w19, 2
+	mov	w3, 0
+	mov	w0, 0
+	ldr	x4, [x22, #:lo12:.LANCHOR6]
+.L1046:
+	cmp	w3, w19
+	bcc	.L1050
+	str	wzr, [x4, 16]
+	cmn	w0, #1
+	beq	.L1051
+	ldr	w1, [x20]
+	cmn	w1, #1
+	bne	.L1051
+	ldr	w1, [x20, 4]
+	cmn	w1, #1
+	bne	.L1051
+	ldr	w1, [x21]
+	cmn	w1, #1
+	mov	w1, 512
+	csel	w0, w0, w1, ne
+.L1051:
+	ldr	w19, [x4]
+	mov	w1, 8192
+	movk	w1, 0x2, lsl 16
+	and	w1, w19, w1
+	cmp	w1, 139264
+	bne	.L1035
+	mov	w1, w19
+	adrp	x0, .LC40
+	add	x0, x0, :lo12:.LC40
+	bl	printf
+	orr	w19, w19, 131072
+	ldr	x0, [x22, #:lo12:.LANCHOR6]
+	b	.L1065
+.L1045:
+	ldr	x7, [x6, #:lo12:.LANCHOR30]
+	and	x0, x0, 4294967292
+	ldr	w0, [x7, x0]
+	lsl	w7, w2, 2
+	add	w2, w2, 1
+	strb	w0, [x20, x7]
+	lsr	w7, w0, 8
+	strb	w7, [x20, w1, uxtw]
+	add	w7, w1, 1
+	lsr	w8, w0, 16
+	lsr	w0, w0, 24
+	strb	w8, [x20, x7]
+	add	w7, w1, 2
+	add	w1, w1, 4
+	strb	w0, [x20, x7]
+	mov	w0, w5
+	b	.L1044
+.L1050:
+	uxtw	x1, w3
+	add	x1, x1, 8
+	ldr	w1, [x4, x1, lsl 2]
+	str	w1, [x29, 56]
+	ldr	w1, [x29, 56]
+	tbnz	x1, 2, .L1057
+	ldr	w1, [x29, 56]
+	tbnz	x1, 15, .L1057
+	ldr	w2, [x29, 56]
+	ubfx	x6, x2, 3, 5
+	ldr	w2, [x29, 56]
+	ldr	w1, [x29, 56]
+	ubfx	x2, x2, 27, 1
+	ubfx	x5, x1, 16, 5
+	ldr	w1, [x29, 56]
+	orr	w2, w6, w2, lsl 5
+	ubfx	x1, x1, 29, 1
+	orr	w1, w5, w1, lsl 5
+	cmp	w2, w1
+	ldr	w1, [x29, 56]
+	bls	.L1048
+	ubfx	x2, x1, 3, 5
+	ldr	w1, [x29, 56]
+	ubfx	x1, x1, 27, 1
+.L1064:
+	orr	w1, w2, w1, lsl 5
+	cmp	w0, w1
+	csel	w0, w0, w1, cs
+.L1047:
+	add	w3, w3, 1
+	b	.L1046
+.L1048:
+	ubfx	x2, x1, 16, 5
+	ldr	w1, [x29, 56]
+	ubfx	x1, x1, 29, 1
+	b	.L1064
+.L1057:
+	mov	w0, -1
+	b	.L1047
+.L1052:
+	mov	w0, 0
+	b	.L1035
+	.size	nandc_xfer, .-nandc_xfer
+	.section	.text.flash_read_page,"ax",@progbits
+	.align	2
+	.global	flash_read_page
+	.type	flash_read_page, %function
+flash_read_page:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	and	w21, w0, 255
+	adrp	x0, .LANCHOR6
+	stp	x19, x20, [sp, 16]
+	stp	x23, x24, [sp, 48]
+	mov	w23, w1
+	ldr	x19, [x0, #:lo12:.LANCHOR6]
+	adrp	x0, .LANCHOR22
+	stp	x25, x26, [sp, 64]
+	mov	w24, w4
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	mov	x25, x2
+	mov	x26, x3
+	and	w20, w1, 2097151
+	ubfx	x22, x23, 24, 2
+	tbz	x0, 4, .L1067
+	mov	w3, w1
+	adrp	x0, .LC41
+	mov	w2, w22
+	mov	w1, w21
+	add	x0, x0, :lo12:.LC41
+	bl	printf
+.L1067:
+	bl	nandc_wait_flash_ready
+	mov	w0, w21
+	bl	nandc_cs
+	adrp	x5, .LANCHOR34
+	cbnz	w22, .L1068
+	mov	w0, w21
+	bl	flash_enter_slc_mode
+.L1069:
+	ubfiz	x4, x21, 8, 8
+	lsr	w0, w20, 8
+	add	x4, x19, x4
+	and	w23, w23, 255
+	str	wzr, [x4, 2056]
+	str	wzr, [x4, 2052]
+	str	wzr, [x4, 2052]
+	str	w23, [x4, 2052]
+	str	w0, [x4, 2052]
+	lsr	w0, w20, 16
+	str	w0, [x4, 2052]
+	mov	w0, 48
+	str	w0, [x4, 2056]
+	ldr	x0, [x5, #:lo12:.LANCHOR34]
+	ldrb	w0, [x0, 12]
+	cmp	w0, 3
+	bne	.L1071
+	cbz	w22, .L1071
+	add	w20, w20, w20, lsl 1
+	sub	w0, w20, #1
+	add	w0, w0, w22
+.L1081:
+	bl	nandc_set_seed
+	bl	nandc_wait_flash_ready
+	mov	w0, 5
+	str	w0, [x4, 2056]
+	str	wzr, [x4, 2052]
+	mov	w0, 224
+	str	wzr, [x4, 2052]
+	mov	x3, x25
+	str	w0, [x4, 2056]
+	mov	w2, w24
+	mov	w1, 0
+	mov	x4, x26
+	mov	w0, w21
+	bl	nandc_xfer
+	mov	w5, w0
+	cbnz	w22, .L1073
+	mov	w0, w21
+	bl	flash_exit_slc_mode
+.L1073:
+	mov	w0, 0
+	bl	nandc_de_cs
+	ldp	x19, x20, [sp, 16]
+	mov	w0, w5
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L1068:
+	ldr	x0, [x5, #:lo12:.LANCHOR34]
+	ldrb	w0, [x0, 12]
+	cmp	w0, 3
+	bne	.L1070
+	sxtw	x0, w21
+	add	x0, x0, 8
+	add	x0, x19, x0, lsl 8
+	str	w22, [x0, 8]
+	b	.L1069
+.L1070:
+	mov	w0, w21
+	bl	flash_exit_slc_mode
+	b	.L1069
+.L1071:
+	mov	w0, w20
+	b	.L1081
+	.size	flash_read_page, .-flash_read_page
+	.section	.text.micron_read_retrial,"ax",@progbits
+	.align	2
+	.global	micron_read_retrial
+	.type	micron_read_retrial, %function
+micron_read_retrial:
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x25, x26, [sp, 64]
+	and	w25, w0, 255
+	adrp	x0, .LANCHOR27
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	mov	x26, x3
+	stp	x23, x24, [sp, 48]
+	mov	w23, w2
+	stp	x27, x28, [sp, 80]
+	mov	x27, x4
+	ldrb	w21, [x0, #:lo12:.LANCHOR27]
+	and	x20, x25, 255
+	str	w5, [x29, 124]
+	bl	nandc_wait_flash_ready
+	adrp	x0, .LANCHOR6
+	adrp	x24, .LC42
+	add	w21, w21, w21, lsl 1
+	adrp	x7, .LANCHOR113
+	ldr	x8, [x0, #:lo12:.LANCHOR6]
+	asr	w21, w21, 2
+	add	x24, x24, :lo12:.LC42
+	add	x7, x7, :lo12:.LANCHOR113
+	mov	w22, 0
+	mov	w19, -1
+	add	x28, x8, x20, lsl 8
+.L1083:
+	ldrb	w0, [x7]
+	cmp	w22, w0
+	bcc	.L1087
+.L1086:
+	add	x8, x8, x20, lsl 8
+	mov	w0, 239
+	str	w0, [x8, 2056]
+	mov	w0, 137
+	str	w0, [x8, 2052]
+	mov	w0, 200
+	bl	timer_delay_ns
+	str	wzr, [x8, 2048]
+	str	wzr, [x8, 2048]
+	cmp	w19, w21
+	str	wzr, [x8, 2048]
+	str	wzr, [x8, 2048]
+	bcc	.L1088
+	cmn	w19, #1
+	mov	w0, 256
+	csel	w19, w19, w0, eq
+.L1088:
+	cmp	w19, 256
+	ccmn	w19, #1, 4, ne
+	bne	.L1082
+	adrp	x0, .LC43
+	mov	w4, w19
+	mov	w3, w22
+	mov	w2, w23
+	mov	w1, w22
+	add	x0, x0, :lo12:.LC43
+	bl	printf
+.L1082:
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+.L1087:
+	mov	w0, 239
+	str	w0, [x28, 2056]
+	mov	w0, 137
+	str	w0, [x28, 2052]
+	stp	x7, x8, [x29, 96]
+	mov	w0, 200
+	bl	timer_delay_ns
+	add	w10, w22, 1
+	str	w10, [x28, 2048]
+	str	wzr, [x28, 2048]
+	mov	x3, x27
+	ldr	w4, [x29, 124]
+	mov	x2, x26
+	str	wzr, [x28, 2048]
+	mov	w1, w23
+	str	wzr, [x28, 2048]
+	mov	w0, w25
+	str	w10, [x29, 116]
+	bl	flash_read_page
+	mov	w6, w0
+	mov	w4, w19
+	str	w6, [x29, 120]
+	mov	w3, w22
+	mov	w2, w23
+	mov	w1, w22
+	mov	x0, x24
+	bl	printf
+	ldp	w10, w6, [x29, 116]
+	ldp	x7, x8, [x29, 96]
+	cmn	w6, #1
+	beq	.L1084
+	adrp	x0, .LANCHOR111
+	cmn	w19, #1
+	csel	w19, w19, w6, ne
+	cmp	w6, w21
+	ldr	x26, [x0, #:lo12:.LANCHOR111]
+	adrp	x0, .LANCHOR112
+	ldr	x27, [x0, #:lo12:.LANCHOR112]
+	bcc	.L1090
+.L1084:
+	mov	w22, w10
+	b	.L1083
+.L1090:
+	mov	w19, w6
+	b	.L1086
+	.size	micron_read_retrial, .-micron_read_retrial
+	.section	.text.toshiba_3d_read_retrial,"ax",@progbits
+	.align	2
+	.global	toshiba_3d_read_retrial
+	.type	toshiba_3d_read_retrial, %function
+toshiba_3d_read_retrial:
+	stp	x29, x30, [sp, -128]!
+	and	w6, w1, 255
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR2
+	stp	x25, x26, [sp, 64]
+	and	w25, w0, 255
+	stp	x27, x28, [sp, 80]
+	mov	x27, x3
+	stp	x23, x24, [sp, 48]
+	mov	x28, x4
+	mov	w23, w2
+	stp	x19, x20, [sp, 16]
+	str	w5, [x29, 124]
+	bl	nandc_wait_flash_ready
+	adrp	x0, .LANCHOR6
+	mov	w1, 46
+	mov	w2, 56
+	ldr	x26, [x0, #:lo12:.LANCHOR6]
+	and	x0, x25, 255
+	add	x21, x0, 8
+	str	x0, [x29, 112]
+	ldrb	w0, [x22, #:lo12:.LANCHOR2]
+	add	x21, x26, x21, lsl 8
+	cmp	w0, 36
+	mov	w0, 26
+	csel	w1, w2, w1, ne
+	str	w1, [x29, 96]
+	mov	w1, 10
+	csel	w0, w1, w0, ne
+	str	w0, [x29, 104]
+	cbnz	w6, .L1102
+	sxtw	x24, w25
+	adrp	x0, .LC44
+	add	x24, x24, 8
+	add	x0, x0, :lo12:.LC44
+	add	x24, x26, x24, lsl 8
+	mov	w19, -1
+	mov	w20, 1
+	str	x0, [x29, 96]
+.L1108:
+	ldrb	w0, [x22, #:lo12:.LANCHOR2]
+	cmp	w0, 36
+	bne	.L1103
+	mov	x0, x21
+	mov	w2, 0
+	mov	w1, w20
+	bl	toshiba_tlc_set_rr_para
+	mov	w0, 93
+	str	w0, [x24, 8]
+.L1104:
+	ldr	w4, [x29, 124]
+	mov	x3, x28
+	mov	x2, x27
+	mov	w1, w23
+	mov	w0, w25
+	bl	flash_read_page
+	mov	w4, w0
+	mov	w3, w0
+	ldr	x0, [x29, 96]
+	str	w4, [x29, 120]
+	mov	w2, w23
+	mov	w1, w20
+	bl	printf
+	ldr	w4, [x29, 120]
+	cmn	w4, #1
+	beq	.L1105
+	adrp	x0, .LANCHOR111
+	cmn	w19, #1
+	csel	w19, w19, w4, ne
+	ldr	x27, [x0, #:lo12:.LANCHOR111]
+	adrp	x0, .LANCHOR112
+	ldr	x28, [x0, #:lo12:.LANCHOR112]
+	adrp	x0, .LANCHOR27
+	ldrb	w0, [x0, #:lo12:.LANCHOR27]
+	add	w0, w0, w0, lsl 1
+	cmp	w4, w0, lsr 2
+	bcc	.L1121
+.L1105:
+	ldr	w0, [x29, 104]
+	add	w20, w20, 1
+	cmp	w0, w20
+	bne	.L1108
+.L1107:
+	ldrb	w0, [x22, #:lo12:.LANCHOR2]
+	cmp	w0, 36
+	bne	.L1109
+	mov	w2, 0
+.L1135:
+	mov	w1, 0
+	mov	x0, x21
+	bl	toshiba_tlc_set_rr_para
+	b	.L1110
+.L1103:
+	mov	w1, w20
+	mov	x0, x21
+	bl	toshiba_3d_set_slc_rr_para
+	b	.L1104
+.L1121:
+	mov	w19, w4
+	b	.L1107
+.L1109:
+	mov	w1, 0
+	mov	x0, x21
+	bl	toshiba_3d_set_slc_rr_para
+.L1110:
+	ldrb	w0, [x22, #:lo12:.LANCHOR2]
+	cmp	w0, 36
+	bne	.L1118
+	ldr	x0, [x29, 112]
+	add	x26, x26, x0, lsl 8
+	mov	w0, 85
+	str	w0, [x26, 2056]
+	mov	w0, 255
+	str	wzr, [x26, 2052]
+	str	wzr, [x26, 2048]
+	str	w0, [x26, 2056]
+.L1118:
+	mov	w4, w19
+	mov	w3, w20
+	mov	w2, w23
+	mov	w1, w20
+	adrp	x0, .LC46
+	add	x0, x0, :lo12:.LC46
+	bl	printf
+	adrp	x0, .LANCHOR27
+	ldrb	w0, [x0, #:lo12:.LANCHOR27]
+	add	w0, w0, w0, lsl 1
+	cmp	w19, w0, lsr 2
+	bcc	.L1119
+	cmn	w19, #1
+	mov	w0, 256
+	csel	w19, w19, w0, eq
+.L1119:
+	bl	nandc_wait_flash_ready
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+.L1102:
+	sxtw	x24, w25
+	orr	w23, w23, w6, lsl 24
+	add	x24, x24, 8
+	adrp	x0, .LC45
+	add	x24, x26, x24, lsl 8
+	add	x0, x0, :lo12:.LC45
+	mov	w19, -1
+	mov	w20, 1
+	str	x0, [x29, 104]
+.L1116:
+	ldrb	w0, [x22, #:lo12:.LANCHOR2]
+	cmp	w0, 36
+	bne	.L1111
+	mov	x0, x21
+	mov	w2, 1
+	mov	w1, w20
+	bl	toshiba_tlc_set_rr_para
+	mov	w0, 93
+.L1134:
+	str	w0, [x24, 8]
+	mov	x3, x28
+	mov	x2, x27
+	mov	w1, w23
+	ldr	w4, [x29, 124]
+	mov	w0, w25
+	bl	flash_read_page
+	mov	w4, w0
+	mov	w3, w0
+	ldr	x0, [x29, 104]
+	str	w4, [x29, 120]
+	mov	w2, w23
+	mov	w1, w20
+	bl	printf
+	ldr	w4, [x29, 120]
+	cmn	w4, #1
+	beq	.L1113
+	adrp	x0, .LANCHOR111
+	cmn	w19, #1
+	csel	w19, w19, w4, ne
+	ldr	x27, [x0, #:lo12:.LANCHOR111]
+	adrp	x0, .LANCHOR112
+	ldr	x28, [x0, #:lo12:.LANCHOR112]
+	adrp	x0, .LANCHOR27
+	ldrb	w0, [x0, #:lo12:.LANCHOR27]
+	add	w0, w0, w0, lsl 1
+	cmp	w4, w0, lsr 2
+	bcc	.L1122
+.L1113:
+	ldr	w0, [x29, 96]
+	add	w20, w20, 1
+	cmp	w0, w20
+	bne	.L1116
+.L1115:
+	ldrb	w0, [x22, #:lo12:.LANCHOR2]
+	cmp	w0, 36
+	bne	.L1117
+	mov	w2, 1
+	b	.L1135
+.L1111:
+	mov	x0, x21
+	mov	w1, w20
+	bl	toshiba_3d_set_tlc_rr_para
+	mov	w0, 38
+	b	.L1134
+.L1122:
+	mov	w19, w4
+	b	.L1115
+.L1117:
+	mov	w1, 0
+	mov	x0, x21
+	bl	toshiba_3d_set_tlc_rr_para
+	b	.L1110
+	.size	toshiba_3d_read_retrial, .-toshiba_3d_read_retrial
+	.section	.text.toshiba_read_retrial,"ax",@progbits
+	.align	2
+	.global	toshiba_read_retrial
+	.type	toshiba_read_retrial, %function
+toshiba_read_retrial:
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	stp	x27, x28, [sp, 80]
+	mov	x27, x3
+	stp	x19, x20, [sp, 16]
+	mov	x28, x4
+	stp	x25, x26, [sp, 64]
+	and	w19, w0, 255
+	stp	x23, x24, [sp, 48]
+	and	x26, x19, 255
+	stp	w5, w2, [x29, 120]
+	bl	nandc_wait_flash_ready
+	adrp	x0, .LANCHOR6
+	adrp	x1, .LANCHOR2
+	str	x1, [x29, 112]
+	add	x21, x26, 8
+	ldr	x22, [x0, #:lo12:.LANCHOR6]
+	ldrb	w0, [x1, #:lo12:.LANCHOR2]
+	sub	w0, w0, #67
+	add	x21, x22, x21, lsl 8
+	and	w0, w0, 255
+	cmp	w0, 1
+	bls	.L1154
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbz	w0, .L1155
+	mov	w23, 1
+	mov	w0, 1
+	bl	nandc_set_if_mode
+.L1138:
+	add	x0, x22, x26, lsl 8
+	mov	w1, 92
+	str	w1, [x0, 2056]
+	mov	w1, 197
+	str	w1, [x0, 2056]
+.L1137:
+	sxtw	x0, w19
+	mov	w20, 1
+	add	x0, x0, 8
+	mov	w24, -1
+	add	x0, x22, x0, lsl 8
+	str	x0, [x29, 104]
+.L1139:
+	adrp	x0, .LANCHOR113
+	ldrb	w0, [x0, #:lo12:.LANCHOR113]
+	add	w0, w0, 1
+	cmp	w20, w0
+	bcc	.L1148
+	mov	w25, w24
+.L1147:
+	ldr	x0, [x29, 112]
+	mov	w1, 0
+	ldrb	w0, [x0, #:lo12:.LANCHOR2]
+	sub	w0, w0, #67
+	and	w0, w0, 255
+	cmp	w0, 1
+	mov	x0, x21
+	bhi	.L1149
+	bl	sandisk_set_rr_para
+.L1150:
+	sxtw	x19, w19
+	mov	w0, 255
+	add	x19, x19, 8
+	add	x22, x22, x19, lsl 8
+	str	w0, [x22, 8]
+	adrp	x0, .LANCHOR27
+	ldrb	w0, [x0, #:lo12:.LANCHOR27]
+	add	w0, w0, w0, lsl 1
+	cmp	w25, w0, lsr 2
+	bcc	.L1151
+	cmn	w25, #1
+	mov	w0, 256
+	csel	w25, w25, w0, eq
+.L1151:
+	cmp	w25, 256
+	ccmn	w25, #1, 4, ne
+	bne	.L1152
+	ldr	w2, [x29, 124]
+	adrp	x0, .LC46
+	mov	w4, w25
+	mov	w3, w20
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC46
+	bl	printf
+.L1152:
+	bl	nandc_wait_flash_ready
+	cbz	w23, .L1136
+	mov	w0, 4
+	bl	nandc_set_if_mode
+.L1136:
+	mov	w0, w25
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+.L1155:
+	mov	w23, 0
+	b	.L1138
+.L1154:
+	mov	w23, 0
+	b	.L1137
+.L1148:
+	ldr	x0, [x29, 112]
+	mov	w1, w20
+	ldrb	w0, [x0, #:lo12:.LANCHOR2]
+	sub	w0, w0, #67
+	and	w0, w0, 255
+	cmp	w0, 1
+	mov	x0, x21
+	bhi	.L1140
+	bl	sandisk_set_rr_para
+.L1141:
+	ldr	x0, [x29, 112]
+	ldrb	w0, [x0, #:lo12:.LANCHOR2]
+	cmp	w0, 34
+	bne	.L1142
+	adrp	x0, .LANCHOR113
+	ldrb	w0, [x0, #:lo12:.LANCHOR113]
+	sub	w0, w0, #3
+	cmp	w20, w0
+	bne	.L1142
+	ldr	x1, [x29, 104]
+	mov	w0, 179
+	str	w0, [x1, 8]
+.L1142:
+	add	x0, x22, x26, lsl 8
+	mov	w1, 38
+	ldr	w4, [x29, 120]
+	mov	x3, x28
+	mov	x2, x27
+	str	w1, [x0, 2056]
+	mov	w1, 93
+	str	w1, [x0, 2056]
+	mov	w0, w19
+	ldr	w1, [x29, 124]
+	bl	flash_read_page
+	mov	w25, w0
+	cmn	w0, #1
+	beq	.L1145
+	cmn	w24, #1
+	csel	w24, w24, w0, ne
+	adrp	x0, .LANCHOR111
+	ldr	x27, [x0, #:lo12:.LANCHOR111]
+	adrp	x0, .LANCHOR112
+	ldr	x28, [x0, #:lo12:.LANCHOR112]
+	adrp	x0, .LANCHOR27
+	ldrb	w0, [x0, #:lo12:.LANCHOR27]
+	add	w0, w0, w0, lsl 1
+	cmp	w25, w0, lsr 2
+	bcc	.L1147
+.L1145:
+	add	w20, w20, 1
+	b	.L1139
+.L1140:
+	bl	toshiba_set_rr_para
+	b	.L1141
+.L1149:
+	bl	toshiba_set_rr_para
+	b	.L1150
+	.size	toshiba_read_retrial, .-toshiba_read_retrial
+	.section	.text.hynix_read_retrial,"ax",@progbits
+	.align	2
+	.global	hynix_read_retrial
+	.type	hynix_read_retrial, %function
+hynix_read_retrial:
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	and	x23, x0, 255
+	adrp	x0, .LANCHOR5
+	stp	x27, x28, [sp, 80]
+	stp	x21, x22, [sp, 32]
+	mov	w27, w5
+	ldr	x28, [x0, #:lo12:.LANCHOR5]
+	mov	w22, w2
+	stp	x25, x26, [sp, 64]
+	mov	x25, x3
+	add	x28, x28, 112
+	stp	x19, x20, [sp, 16]
+	add	x0, x28, x23
+	mov	x26, x4
+	mov	x21, x23
+	mov	w19, -1
+	ldrb	w24, [x28, 2]
+	ldrb	w20, [x0, 8]
+	bl	nandc_wait_flash_ready
+	adrp	x6, .LANCHOR27
+	add	x6, x6, :lo12:.LANCHOR27
+	mov	w5, 0
+	adrp	x7, .LANCHOR111
+	adrp	x8, .LANCHOR112
+.L1169:
+	cmp	w5, w24
+	bcc	.L1174
+.L1173:
+	adrp	x0, .LANCHOR27
+	add	x23, x28, x23
+	ldrb	w0, [x0, #:lo12:.LANCHOR27]
+	strb	w20, [x23, 8]
+	add	w0, w0, w0, lsl 1
+	cmp	w19, w0, lsr 2
+	bcc	.L1175
+	cmn	w19, #1
+	mov	w0, 256
+	csel	w19, w19, w0, eq
+.L1175:
+	cmp	w19, 256
+	ccmn	w19, #1, 4, ne
+	bne	.L1168
+	adrp	x0, .LC47
+	mov	w4, w19
+	mov	w3, w5
+	mov	w2, w22
+	mov	w1, w5
+	add	x0, x0, :lo12:.LC47
+	bl	printf
+.L1168:
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+.L1174:
+	add	w20, w20, 1
+	stp	x6, x8, [x29, 96]
+	and	w20, w20, 255
+	str	x7, [x29, 112]
+	cmp	w24, w20
+	str	w5, [x29, 124]
+	csel	w20, w20, wzr, hi
+	mov	w0, w21
+	mov	w1, w20
+	bl	hynix_set_rr_para
+	mov	w4, w27
+	mov	x3, x26
+	mov	x2, x25
+	mov	w1, w22
+	mov	w0, w21
+	bl	flash_read_page
+	ldr	w5, [x29, 124]
+	cmn	w0, #1
+	ldp	x6, x8, [x29, 96]
+	ldr	x7, [x29, 112]
+	beq	.L1171
+	ldrb	w1, [x6]
+	cmn	w19, #1
+	csel	w19, w19, w0, ne
+	ldr	x25, [x7, #:lo12:.LANCHOR111]
+	ldr	x26, [x8, #:lo12:.LANCHOR112]
+	add	w1, w1, w1, lsl 1
+	cmp	w0, w1, lsr 2
+	bcc	.L1177
+.L1171:
+	add	w5, w5, 1
+	b	.L1169
+.L1177:
+	mov	w19, w0
+	b	.L1173
+	.size	hynix_read_retrial, .-hynix_read_retrial
+	.section	.text.flash_ddr_tunning_read,"ax",@progbits
+	.align	2
+	.global	flash_ddr_tunning_read
+	.type	flash_ddr_tunning_read, %function
+flash_ddr_tunning_read:
+	stp	x29, x30, [sp, -144]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w20, 0
+	stp	x21, x22, [sp, 32]
+	mov	w19, 0
+	stp	x23, x24, [sp, 48]
+	mov	w23, w1
+	stp	x25, x26, [sp, 64]
+	adrp	x24, .LC48
+	stp	x27, x28, [sp, 80]
+	and	w25, w0, 255
+	mov	x26, x2
+	mov	x27, x3
+	str	w4, [x29, 140]
+	add	x24, x24, :lo12:.LC48
+	bl	nandc_get_ddr_para
+	mov	w8, w0
+	mov	w28, 1024
+	mov	w21, 6
+	mov	w22, -1
+	mov	w6, 0
+	mov	w7, 0
+	adrp	x10, .LANCHOR111
+	adrp	x11, .LANCHOR112
+.L1192:
+	stp	x11, x10, [x29, 104]
+	mov	w0, w21
+	stp	w8, w6, [x29, 124]
+	str	w7, [x29, 132]
+	bl	nandc_set_ddr_para
+	ldr	w4, [x29, 140]
+	mov	x3, x27
+	mov	x2, x26
+	mov	w1, w23
+	mov	w0, w25
+	bl	flash_read_page
+	mov	w4, w0
+	mov	w3, w0
+	str	w4, [x29, 136]
+	mov	w2, w23
+	mov	w1, w21
+	mov	x0, x24
+	bl	printf
+	ldp	w7, w4, [x29, 132]
+	add	w0, w28, 1
+	ldp	w8, w6, [x29, 124]
+	cmp	w4, w0
+	ldp	x11, x10, [x29, 104]
+	bhi	.L1188
+	ldr	x26, [x10, #:lo12:.LANCHOR111]
+	cmp	w4, 2
+	ldr	x27, [x11, #:lo12:.LANCHOR112]
+	bhi	.L1197
+	add	w19, w19, 1
+	cmp	w19, 7
+	bls	.L1197
+	mov	w0, w20
+	mov	w28, w4
+	sub	w20, w21, w19
+	mov	w22, 0
+.L1190:
+	cmp	w19, w7
+	csel	w20, w20, w0, hi
+.L1191:
+	cbz	w20, .L1193
+	adrp	x0, .LANCHOR27
+	mov	w1, 3
+	ldrb	w0, [x0, #:lo12:.LANCHOR27]
+	udiv	w0, w0, w1
+	cmp	w0, w28
+	bls	.L1193
+	mov	w1, w20
+	adrp	x0, .LC49
+	add	x0, x0, :lo12:.LC49
+	bl	printf
+	mov	w0, w20
+.L1204:
+	bl	nandc_set_ddr_para
+	cbz	w22, .L1187
+	mov	w28, w22
+	mov	w2, w23
+	mov	w1, w25
+	adrp	x0, .LC50
+	add	x0, x0, :lo12:.LC50
+	bl	printf
+.L1187:
+	mov	w0, w28
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 144
+	ret
+.L1188:
+	cmp	w19, w7
+	bls	.L1198
+	sub	w20, w6, w19
+	cmp	w19, 7
+	bhi	.L1191
+	mov	w7, w19
+.L1198:
+	mov	w19, 0
+	b	.L1189
+.L1197:
+	mov	w6, w21
+	mov	w28, w4
+	mov	w22, 0
+.L1189:
+	add	w21, w21, 2
+	cmp	w21, 50
+	bne	.L1192
+	mov	w0, w20
+	mov	w20, w6
+	b	.L1190
+.L1193:
+	mov	w0, w8
+	b	.L1204
+	.size	flash_ddr_tunning_read, .-flash_ddr_tunning_read
+	.section	.text.flash_read_page_en,"ax",@progbits
+	.align	2
+	.global	flash_read_page_en
+	.type	flash_read_page_en, %function
+flash_read_page_en:
+	stp	x29, x30, [sp, -96]!
+	and	w0, w0, 255
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w19, w1
+	adrp	x1, .LANCHOR8
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	ldrb	w1, [x1, #:lo12:.LANCHOR8]
+	stp	x25, x26, [sp, 64]
+	str	x27, [sp, 80]
+	cmp	w1, w0
+	bhi	.L1206
+	adrp	x1, .LANCHOR114
+	adrp	x0, .LC0
+	mov	w2, 386
+	add	x1, x1, :lo12:.LANCHOR114
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1207:
+	b	.L1207
+.L1206:
+	adrp	x1, .LANCHOR10
+	add	x1, x1, :lo12:.LANCHOR10
+	mov	x22, x2
+	mov	x23, x3
+	mov	w24, w4
+	ldrb	w20, [x1, w0, sxtw]
+	adrp	x0, .LANCHOR22
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	tbz	x0, 4, .L1208
+	adrp	x0, .LC51
+	mov	w2, w19
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC51
+	bl	printf
+.L1208:
+	tst	x19, 50331648
+	bne	.L1209
+	adrp	x0, .LANCHOR11
+	adrp	x1, .LANCHOR12
+	ldrb	w0, [x0, #:lo12:.LANCHOR11]
+	cbz	w0, .L1210
+	ldrb	w0, [x1, #:lo12:.LANCHOR12]
+	cbz	w0, .L1209
+.L1210:
+	adrp	x0, .LANCHOR13
+	ldrb	w1, [x1, #:lo12:.LANCHOR12]
+	ldrh	w2, [x0, #:lo12:.LANCHOR13]
+	udiv	w0, w19, w2
+	mul	w0, w0, w2
+	sub	w19, w19, w0
+	cbz	w1, .L1211
+	add	w19, w0, w19, lsl 1
+.L1209:
+	mov	w4, w24
+	mov	x3, x23
+	mov	x2, x22
+	mov	w1, w19
+	mov	w0, w20
+	bl	flash_read_page
+	mov	w21, w0
+	cmn	w0, #1
+	bne	.L1205
+	adrp	x25, .LANCHOR29
+	mov	x26, x25
+	ldrb	w27, [x25, #:lo12:.LANCHOR29]
+	cbnz	w27, .L1213
+.L1216:
+	adrp	x0, .LANCHOR115
+	ldr	x6, [x0, #:lo12:.LANCHOR115]
+	cbnz	x6, .L1214
+.L1215:
+	ldrb	w4, [x26, #:lo12:.LANCHOR29]
+	mov	w3, -1
+	mov	w2, w19
+	mov	w1, 0
+	adrp	x0, .LC52
+	add	x0, x0, :lo12:.LC52
+	bl	printf
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbz	w0, .L1205
+	mov	w4, w24
+	mov	x3, x23
+	mov	x2, x22
+	mov	w1, w19
+	mov	w0, w20
+	ldr	x27, [sp, 80]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	b	flash_ddr_tunning_read
+.L1211:
+	adrp	x1, .LANCHOR14
+	add	x1, x1, :lo12:.LANCHOR14
+	ldrh	w19, [x1, w19, uxtw 1]
+	add	w19, w19, w0
+	b	.L1209
+.L1213:
+	strb	wzr, [x25, #:lo12:.LANCHOR29]
+	mov	w4, w24
+	mov	x3, x23
+	mov	x2, x22
+	mov	w1, w19
+	mov	w0, w20
+	bl	flash_read_page
+	strb	w27, [x25, #:lo12:.LANCHOR29]
+	cmn	w0, #1
+	beq	.L1216
+.L1234:
+	mov	w21, w0
+.L1205:
+	mov	w0, w21
+	ldr	x27, [sp, 80]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	ret
+.L1214:
+	mov	w5, w24
+	mov	x4, x23
+	mov	x3, x22
+	mov	w2, w19
+	mov	w1, 0
+	mov	w0, w20
+	blr	x6
+	cmn	w0, #1
+	bne	.L1234
+	b	.L1215
+	.size	flash_read_page_en, .-flash_read_page_en
+	.section	.text.flash_get_last_written_page,"ax",@progbits
+	.align	2
+	.global	flash_get_last_written_page
+	.type	flash_get_last_written_page, %function
+flash_get_last_written_page:
+	stp	x29, x30, [sp, -96]!
+	and	w1, w1, 65535
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	and	w21, w0, 255
+	adrp	x0, .LANCHOR97
+	stp	x19, x20, [sp, 16]
+	stp	x25, x26, [sp, 64]
+	mov	x22, x2
+	ldrh	w19, [x0, #:lo12:.LANCHOR97]
+	adrp	x0, .LANCHOR19+26
+	stp	x23, x24, [sp, 48]
+	mov	x23, x3
+	ldrh	w25, [x0, #:lo12:.LANCHOR19+26]
+	sub	w19, w19, #1
+	sxth	w19, w19
+	mov	w24, w4
+	mov	w0, w21
+	str	x27, [sp, 80]
+	mul	w25, w25, w1
+	add	w1, w19, w25
+	bl	flash_read_page_en
+	cmp	w0, 512
+	bne	.L1236
+	mov	w26, 0
+	mov	w27, 2
+.L1237:
+	cmp	w26, w19
+	ble	.L1240
+.L1236:
+	mov	w0, w19
+	ldr	x27, [sp, 80]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	ret
+.L1240:
+	add	w20, w26, w19
+	mov	w4, w24
+	mov	x3, x23
+	mov	x2, x22
+	mov	w0, w21
+	sdiv	w20, w20, w27
+	add	w1, w25, w20, sxth
+	bl	flash_read_page_en
+	cmp	w0, 512
+	bne	.L1238
+	sub	w19, w20, #1
+	sxth	w19, w19
+	b	.L1237
+.L1238:
+	add	w20, w20, 1
+	sxth	w26, w20
+	b	.L1237
+	.size	flash_get_last_written_page, .-flash_get_last_written_page
+	.section	.text.flash_get_last_written_page_ext,"ax",@progbits
+	.align	2
+	.global	flash_get_last_written_page_ext
+	.type	flash_get_last_written_page_ext, %function
+flash_get_last_written_page_ext:
+	adrp	x4, .LANCHOR71
+	mov	w6, 21
+	and	w0, w0, 65535
+	mov	w5, 1
+	ldrh	w4, [x4, #:lo12:.LANCHOR71]
+	sub	w6, w6, w4
+	mov	w4, w3
+	mov	x3, x2
+	mov	x2, x1
+	lsl	w5, w5, w6
+	sub	w5, w5, #1
+	and	w1, w5, w0
+	asr	w0, w0, w6
+	b	flash_get_last_written_page
+	.size	flash_get_last_written_page_ext, .-flash_get_last_written_page_ext
+	.section	.text.flash_info_blk_init,"ax",@progbits
+	.align	2
+	.global	flash_info_blk_init
+	.type	flash_info_blk_init, %function
+flash_info_blk_init:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR13
+	stp	x23, x24, [sp, 48]
+	mov	w24, 21321
+	stp	x25, x26, [sp, 64]
+	adrp	x26, .LANCHOR116
+	stp	x27, x28, [sp, 80]
+	mov	x21, x26
+	add	x27, x22, :lo12:.LANCHOR13
+	stp	x19, x20, [sp, 16]
+	movk	w24, 0x5359, lsl 16
+	mov	w19, 4
+.L1246:
+	ldrh	w1, [x27]
+	adrp	x20, .LANCHOR5
+	ldr	x3, [x26, #:lo12:.LANCHOR116]
+	mov	w4, 4
+	ldr	x2, [x20, #:lo12:.LANCHOR5]
+	mov	w0, 0
+	add	x28, x26, :lo12:.LANCHOR116
+	add	x25, x20, :lo12:.LANCHOR5
+	mul	w1, w1, w19
+	mov	x23, x20
+	bl	flash_read_page_en
+	cmn	w0, #1
+	beq	.L1244
+	ldr	x2, [x20, #:lo12:.LANCHOR5]
+	ldr	w0, [x2]
+	cmp	w0, w24
+	beq	.L1245
+.L1244:
+	add	w19, w19, 1
+	cmp	w19, 16
+	bne	.L1246
+.L1267:
+	mov	w0, -1
+.L1243:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	ret
+.L1254:
+	ldr	x0, [x25]
+	ldr	w1, [x0]
+	cmp	w1, w24
+	bne	.L1255
+	ldr	w19, [x0, 4]
+.L1248:
+	add	x24, x20, :lo12:.LANCHOR117
+	ldrh	w0, [x22, #:lo12:.LANCHOR13]
+	ldr	x3, [x21, #:lo12:.LANCHOR116]
+	mov	w4, 4
+	ldr	x2, [x23, #:lo12:.LANCHOR5]
+	ldrb	w1, [x24, 1]
+	mul	w1, w1, w0
+	mov	w0, 0
+	bl	flash_read_page_en
+	cmn	w0, #1
+	beq	.L1249
+	ldr	x0, [x23, #:lo12:.LANCHOR5]
+	mov	w1, 21321
+	movk	w1, 0x5359, lsl 16
+	ldr	w2, [x0]
+	cmp	w2, w1
+	bne	.L1249
+	ldr	w1, [x0, 4]
+	cmp	w19, w1
+	bcs	.L1249
+	ldrb	w1, [x0, 37]
+	ldrb	w0, [x0, 36]
+	strb	w1, [x20, #:lo12:.LANCHOR117]
+	strb	w0, [x24, 1]
+.L1249:
+	ldrb	w1, [x20, #:lo12:.LANCHOR117]
+	add	x24, x20, :lo12:.LANCHOR117
+	ldr	x3, [x21, #:lo12:.LANCHOR116]
+	mov	w4, 4
+	ldr	x2, [x23, #:lo12:.LANCHOR5]
+	mov	w0, 0
+	bl	flash_get_last_written_page
+	sxth	w19, w0
+	add	w0, w0, 1
+	ldrb	w20, [x20, #:lo12:.LANCHOR117]
+	strh	w0, [x24, 2]
+	ldrh	w0, [x22, #:lo12:.LANCHOR13]
+	mov	w22, 21321
+	movk	w22, 0x5359, lsl 16
+	madd	w20, w20, w0, w19
+.L1250:
+	tbz	w19, #31, .L1252
+	cmn	w19, #1
+	bne	.L1253
+	ldr	x0, [x23, #:lo12:.LANCHOR5]
+	ldr	w1, [x0]
+	adrp	x0, .LC53
+	add	x0, x0, :lo12:.LC53
+	bl	printf
+	b	.L1267
+.L1252:
+	ldr	x3, [x21, #:lo12:.LANCHOR116]
+	mov	w4, 4
+	ldr	x2, [x23, #:lo12:.LANCHOR5]
+	mov	w1, w20
+	mov	w0, 0
+	bl	flash_read_page_en
+	cmn	w0, #1
+	beq	.L1251
+	ldr	x0, [x23, #:lo12:.LANCHOR5]
+	ldr	w0, [x0]
+	cmp	w0, w22
+	bne	.L1251
+.L1253:
+	mov	w0, 0
+	b	.L1243
+.L1251:
+	sub	w19, w19, #1
+	sub	w20, w20, #1
+	sxth	w19, w19
+	b	.L1250
+.L1245:
+	adrp	x20, .LANCHOR117
+	add	x1, x20, :lo12:.LANCHOR117
+	ldrb	w3, [x2, 37]
+	mov	w4, 4
+	ldrb	w0, [x2, 36]
+	strb	w3, [x1, 1]
+	ldrh	w1, [x27]
+	ldr	x3, [x28]
+	strb	w0, [x20, #:lo12:.LANCHOR117]
+	mul	w1, w1, w0
+	mov	w0, 0
+	bl	flash_read_page_en
+	cmn	w0, #1
+	bne	.L1254
+.L1255:
+	mov	w19, 0
+	b	.L1248
+	.size	flash_info_blk_init, .-flash_info_blk_init
+	.section	.text.flash_ddr_para_scan,"ax",@progbits
+	.align	2
+	.global	flash_ddr_para_scan
+	.type	flash_ddr_para_scan, %function
+flash_ddr_para_scan:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR25
+	stp	x21, x22, [sp, 32]
+	and	w22, w0, 255
+	ldrb	w0, [x20, #:lo12:.LANCHOR25]
+	adrp	x19, .LANCHOR35
+	stp	x23, x24, [sp, 48]
+	mov	w21, 1
+	mov	w23, w1
+	str	x25, [sp, 64]
+	strb	w21, [x19, #:lo12:.LANCHOR35]
+	adrp	x24, .LANCHOR119
+	bl	flash_set_interface_mode
+	adrp	x25, .LANCHOR118
+	ldrb	w0, [x20, #:lo12:.LANCHOR25]
+	bl	nandc_set_if_mode
+	ldr	x3, [x25, #:lo12:.LANCHOR118]
+	mov	w4, 4
+	ldr	x2, [x24, #:lo12:.LANCHOR119]
+	mov	w1, w23
+	mov	w0, w22
+	bl	flash_ddr_tunning_read
+	ldr	x3, [x25, #:lo12:.LANCHOR118]
+	mov	w4, 4
+	ldr	x2, [x24, #:lo12:.LANCHOR119]
+	mov	w1, w23
+	mov	w0, w22
+	bl	flash_read_page
+	cmn	w0, #1
+	mov	x0, x19
+	bne	.L1269
+	ldrb	w1, [x20, #:lo12:.LANCHOR25]
+	tbz	x1, 0, .L1269
+	mov	w0, 1
+	bl	flash_set_interface_mode
+	mov	w0, w21
+	bl	nandc_set_if_mode
+	strb	wzr, [x19, #:lo12:.LANCHOR35]
+.L1270:
+	mov	w0, 0
+	ldr	x25, [sp, 64]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	ret
+.L1269:
+	mov	w1, 1
+	strb	w1, [x0, #:lo12:.LANCHOR35]
+	b	.L1270
+	.size	flash_ddr_para_scan, .-flash_ddr_para_scan
+	.section	.text.flash_complete_page_read,"ax",@progbits
+	.align	2
+	.global	flash_complete_page_read
+	.type	flash_complete_page_read, %function
+flash_complete_page_read:
+	stp	x29, x30, [sp, -112]!
+	add	x29, sp, 0
+	stp	x25, x26, [sp, 64]
+	mov	w25, w0
+	adrp	x0, .LANCHOR8
+	stp	x23, x24, [sp, 48]
+	stp	x19, x20, [sp, 16]
+	mov	x23, x1
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	ubfx	x1, x25, 21, 3
+	stp	x21, x22, [sp, 32]
+	stp	x27, x28, [sp, 80]
+	cmp	w0, w1
+	bhi	.L1276
+	adrp	x1, .LANCHOR120
+	adrp	x0, .LC0
+	mov	w2, 791
+	add	x1, x1, :lo12:.LANCHOR120
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1277:
+	b	.L1277
+.L1276:
+	adrp	x0, .LANCHOR10
+	add	x0, x0, :lo12:.LANCHOR10
+	ubfx	x22, x25, 24, 2
+	mov	x24, x2
+	and	w19, w25, 2097151
+	ldrb	w21, [x0, w1, sxtw]
+	adrp	x0, .LANCHOR6
+	ldr	x4, [x0, #:lo12:.LANCHOR6]
+	mov	w0, w21
+	bl	nandc_cs
+	cbnz	w22, .L1278
+	adrp	x0, .LANCHOR11
+	adrp	x1, .LANCHOR12
+	ldrb	w0, [x0, #:lo12:.LANCHOR11]
+	cbz	w0, .L1279
+	ldrb	w0, [x1, #:lo12:.LANCHOR12]
+	cbz	w0, .L1278
+.L1279:
+	adrp	x0, .LANCHOR13
+	ldrb	w1, [x1, #:lo12:.LANCHOR12]
+	ldrh	w2, [x0, #:lo12:.LANCHOR13]
+	udiv	w0, w19, w2
+	mul	w0, w0, w2
+	sub	w19, w19, w0
+	cbz	w1, .L1280
+	add	w19, w0, w19, lsl 1
+.L1278:
+	ubfiz	x0, x21, 8, 8
+	mov	w1, 5
+	add	x0, x4, x0
+	adrp	x20, .LANCHOR19
+	add	x6, x20, :lo12:.LANCHOR19
+	mov	x4, x24
+	str	x6, [x29, 104]
+	mov	x3, x23
+	str	w1, [x0, 2056]
+	and	w1, w19, 255
+	str	wzr, [x0, 2052]
+	str	wzr, [x0, 2052]
+	str	w1, [x0, 2052]
+	lsr	w1, w19, 8
+	ldrb	w2, [x6, 9]
+	str	w1, [x0, 2052]
+	lsr	w1, w19, 16
+	str	w1, [x0, 2052]
+	mov	w1, 224
+	str	w1, [x0, 2056]
+	mov	w1, 0
+	mov	w0, w21
+	bl	nandc_xfer
+	mov	w26, w0
+	cmn	w0, #1
+	ldr	x6, [x29, 104]
+	bne	.L1275
+	adrp	x27, .LANCHOR29
+	mov	x28, x27
+	ldrb	w5, [x27, #:lo12:.LANCHOR29]
+	cbnz	w5, .L1282
+.L1285:
+	adrp	x0, .LANCHOR115
+	ldr	x6, [x0, #:lo12:.LANCHOR115]
+	cbnz	x6, .L1283
+.L1284:
+	ldrb	w4, [x28, #:lo12:.LANCHOR29]
+	mov	w3, -1
+	mov	w2, w25
+	mov	w1, 0
+	adrp	x0, .LC54
+	add	x0, x0, :lo12:.LC54
+	bl	printf
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbz	w0, .L1275
+	add	x20, x20, :lo12:.LANCHOR19
+	orr	w1, w19, w22, lsl 24
+	ldp	x25, x26, [sp, 64]
+	mov	x3, x24
+	ldrb	w4, [x20, 9]
+	mov	x2, x23
+	ldp	x19, x20, [sp, 16]
+	mov	w0, w21
+	ldp	x23, x24, [sp, 48]
+	ldp	x21, x22, [sp, 32]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	b	flash_ddr_tunning_read
+.L1280:
+	adrp	x1, .LANCHOR14
+	add	x1, x1, :lo12:.LANCHOR14
+	ldrh	w19, [x1, w19, uxtw 1]
+	add	w19, w19, w0
+	b	.L1278
+.L1282:
+	ldrb	w4, [x6, 9]
+	mov	x3, x24
+	str	w5, [x29, 104]
+	mov	x2, x23
+	strb	wzr, [x27, #:lo12:.LANCHOR29]
+	orr	w1, w19, w22, lsl 24
+	mov	w0, w21
+	bl	flash_read_page
+	cmn	w0, #1
+	ldr	w5, [x29, 104]
+	strb	w5, [x27, #:lo12:.LANCHOR29]
+	beq	.L1285
+.L1300:
+	mov	w26, w0
+.L1275:
+	mov	w0, w26
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L1283:
+	add	x0, x20, :lo12:.LANCHOR19
+	mov	x4, x24
+	mov	x3, x23
+	mov	w2, w19
+	mov	w1, w22
+	ldrb	w5, [x0, 9]
+	mov	w0, w21
+	blr	x6
+	cmn	w0, #1
+	beq	.L1284
+	b	.L1300
+	.size	flash_complete_page_read, .-flash_complete_page_read
+	.section	.text.queue_wait_first_req_completed,"ax",@progbits
+	.align	2
+	.type	queue_wait_first_req_completed, %function
+queue_wait_first_req_completed:
+	stp	x29, x30, [sp, -64]!
+	adrp	x0, .LANCHOR90
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	ldrb	w0, [x0, #:lo12:.LANCHOR90]
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	cmp	w0, 255
+	bne	.L1302
+.L1320:
+	mov	w21, 0
+	b	.L1301
+.L1302:
+	adrp	x19, .LANCHOR36
+	sxtw	x22, w0
+	add	x1, x19, :lo12:.LANCHOR36
+	add	x1, x1, x22, lsl 6
+	ldrb	w2, [x1, 58]
+	ldr	w21, [x1, 40]
+	sub	w3, w2, #1
+	cmp	w3, 9
+	bhi	.L1320
+	adrp	x1, .L1305
+	add	x1, x1, :lo12:.L1305
+	ldrb	w1, [x1,w3,uxtw]
+	adr	x3, .Lrtx1305
+	add	x1, x3, w1, sxtb #2
+	br	x1
+.Lrtx1305:
+	.section	.rodata.queue_wait_first_req_completed,"a",@progbits
+	.align	0
+	.align	2
+.L1305:
+	.byte	(.L1304 - .Lrtx1305) / 4
+	.byte	(.L1304 - .Lrtx1305) / 4
+	.byte	(.L1306 - .Lrtx1305) / 4
+	.byte	(.L1306 - .Lrtx1305) / 4
+	.byte	(.L1306 - .Lrtx1305) / 4
+	.byte	(.L1307 - .Lrtx1305) / 4
+	.byte	(.L1308 - .Lrtx1305) / 4
+	.byte	(.L1309 - .Lrtx1305) / 4
+	.byte	(.L1306 - .Lrtx1305) / 4
+	.byte	(.L1309 - .Lrtx1305) / 4
+	.section	.text.queue_wait_first_req_completed
+.L1304:
+	mov	w1, 64
+	mov	w0, w21
+	bl	flash_wait_device_ready
+	tbz	x0, 6, .L1320
+	add	x19, x19, :lo12:.LANCHOR36
+	add	x19, x19, x22, lsl 6
+	ldp	x1, x0, [x19, 8]
+	ldr	x2, [x19, 24]
+	cmp	x0, 0
+	csel	x1, x0, x1, ne
+	mov	w0, w21
+	bl	flash_complete_page_read
+	str	w0, [x19, 52]
+	mov	w0, 12
+	strb	w0, [x19, 58]
+	ldrb	w0, [x19, 2]
+	orr	w0, w0, 8
+	strb	w0, [x19, 2]
+	b	.L1320
+.L1306:
+	mov	w0, w21
+	mov	w1, 64
+	bl	flash_wait_device_ready
+	mov	w21, w0
+	tbz	x21, 6, .L1320
+	add	x19, x19, :lo12:.LANCHOR36
+	mov	w0, 5
+	add	x19, x19, x22, lsl 6
+	tst	w21, w0
+	beq	.L1319
+	ldrb	w1, [x19, 1]
+	mov	w0, 11
+	ldr	w3, [x19, 40]
+	mov	w4, 11
+	ldr	w2, [x19, 52]
+	strb	w0, [x19, 58]
+	adrp	x0, .LC55
+	add	x0, x0, :lo12:.LC55
+	bl	printf
+.L1338:
+	mov	w0, -1
+	str	w0, [x19, 52]
+	b	.L1301
+.L1309:
+	cmp	w2, 10
+	add	x20, x19, :lo12:.LANCHOR36
+	ubfiz	x0, x0, 6, 8
+	mov	w1, 3
+	mov	w2, 9
+	add	x0, x20, x0
+	csel	w2, w2, w1, eq
+	ubfx	x3, x21, 21, 3
+.L1314:
+	ldrb	w1, [x0]
+	cmp	w1, 255
+	bne	.L1318
+	mov	w21, -1
+	b	.L1301
+.L1318:
+	sxtw	x23, w1
+	ubfiz	x0, x1, 6, 8
+	add	x1, x20, x23, lsl 6
+	add	x0, x20, x0
+	ldrb	w4, [x1, 58]
+	cmp	w4, w2
+	bne	.L1314
+	ldr	w1, [x1, 40]
+	ubfx	x1, x1, 21, 3
+	cmp	w3, w1
+	bne	.L1314
+	mov	w0, w21
+	mov	w1, 64
+	bl	flash_wait_device_ready
+	mov	w24, w0
+	and	w21, w0, 64
+	tbz	x24, 6, .L1316
+	add	x20, x20, x22, lsl 6
+	ands	w21, w0, 15
+	beq	.L1317
+	ldrb	w1, [x20, 1]
+	mov	w4, 11
+	ldr	w3, [x20, 40]
+	adrp	x0, .LC55
+	ldr	w2, [x20, 52]
+	add	x0, x0, :lo12:.LC55
+	mov	w21, w24
+	bl	printf
+	mov	w0, 11
+	strb	w0, [x20, 58]
+	mov	w0, -1
+	str	w0, [x20, 52]
+.L1316:
+	add	x1, x19, :lo12:.LANCHOR36
+	add	x22, x1, x22, lsl 6
+	add	x1, x1, x23, lsl 6
+	ldrb	w0, [x22, 58]
+	strb	w0, [x1, 58]
+	ldr	w0, [x22, 52]
+	str	w0, [x1, 52]
+.L1301:
+	mov	w0, w21
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	ret
+.L1317:
+	mov	w0, 12
+	str	wzr, [x20, 52]
+	strb	w0, [x20, 58]
+	b	.L1316
+.L1307:
+	mov	w0, w21
+	mov	w1, 32
+	bl	flash_wait_device_ready
+	mov	w21, w0
+	tbz	x21, 5, .L1320
+	add	x19, x19, :lo12:.LANCHOR36
+	tst	x21, 15
+	add	x19, x19, x22, lsl 6
+	beq	.L1319
+	mov	w0, 11
+	strb	w0, [x19, 58]
+	b	.L1338
+.L1319:
+	mov	w0, 12
+	str	wzr, [x19, 52]
+	strb	w0, [x19, 58]
+	b	.L1320
+.L1308:
+	mov	w1, 64
+	mov	w0, w21
+	bl	flash_wait_device_ready
+	tbz	x0, 6, .L1320
+	add	x19, x19, :lo12:.LANCHOR36
+	add	x19, x19, x22, lsl 6
+	str	w0, [x19, 52]
+	mov	w0, 6
+	strb	w0, [x19, 58]
+	b	.L1320
+	.size	queue_wait_first_req_completed, .-queue_wait_first_req_completed
+	.section	.text.sblk_wait_write_queue_completed,"ax",@progbits
+	.align	2
+	.global	sblk_wait_write_queue_completed
+	.type	sblk_wait_write_queue_completed, %function
+sblk_wait_write_queue_completed:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	adrp	x19, .LANCHOR90
+	add	x19, x19, :lo12:.LANCHOR90
+.L1340:
+	ldrb	w0, [x19]
+	cmp	w0, 255
+	bne	.L1341
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L1341:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L1340
+	.size	sblk_wait_write_queue_completed, .-sblk_wait_write_queue_completed
+	.section	.text.ftl_read_page,"ax",@progbits
+	.align	2
+	.global	ftl_read_page
+	.type	ftl_read_page, %function
+ftl_read_page:
+	stp	x29, x30, [sp, -64]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w19, w0, 255
+	stp	x21, x22, [sp, 32]
+	mov	w20, w1
+	mov	x21, x2
+	mov	x22, x3
+	str	x23, [sp, 48]
+	mov	w23, w4
+	bl	sblk_wait_write_queue_completed
+	mov	w4, w23
+	mov	x3, x22
+	mov	x2, x21
+	mov	w1, w20
+	mov	w0, w19
+	ldr	x23, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	b	flash_read_page_en
+	.size	ftl_read_page, .-ftl_read_page
+	.section	.text.ftl_read_ppa_page,"ax",@progbits
+	.align	2
+	.global	ftl_read_ppa_page
+	.type	ftl_read_ppa_page, %function
+ftl_read_ppa_page:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w19, w0
+	stp	x21, x22, [sp, 32]
+	mov	x20, x1
+	mov	x21, x2
+	mov	w22, w3
+	bl	sblk_wait_write_queue_completed
+	ubfx	x0, x19, 21, 3
+	mov	w4, w22
+	mov	x3, x21
+	mov	x2, x20
+	mov	w1, w19
+	ldp	x21, x22, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	b	flash_read_page_en
+	.size	ftl_read_ppa_page, .-ftl_read_ppa_page
+	.section	.text.ftl_open_sblk_read_test,"ax",@progbits
+	.align	2
+	.global	ftl_open_sblk_read_test
+	.type	ftl_open_sblk_read_test, %function
+ftl_open_sblk_read_test:
+	stp	x29, x30, [sp, -96]!
+	and	w13, w0, 65535
+	mov	w0, w13
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR79
+	adrp	x24, .LANCHOR45
+	add	x23, x23, :lo12:.LANCHOR79
+	add	x24, x24, :lo12:.LANCHOR45
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	add	x1, x29, 80
+	mov	w20, 0
+	bl	ftl_get_blk_list_in_sblk
+	strb	w0, [x29, 73]
+	strh	w13, [x29, 64]
+.L1348:
+	ldrh	w0, [x23]
+	cmp	w0, w20
+	bls	.L1347
+	adrp	x22, .LANCHOR69
+	adrp	x21, .LANCHOR121
+	mov	w19, 0
+	add	x22, x22, :lo12:.LANCHOR69
+	add	x21, x21, :lo12:.LANCHOR121
+	b	.L1350
+.L1353:
+	add	x0, x29, 64
+	mov	w1, 65535
+	add	x0, x0, x19, sxtw 1
+	ldrh	w0, [x0, 16]
+	cmp	w0, w1
+	bne	.L1349
+.L1352:
+	add	w19, w19, 1
+	and	w19, w19, 65535
+.L1350:
+	ldrb	w0, [x22]
+	cmp	w0, w19
+	bhi	.L1353
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L1348
+.L1349:
+	adrp	x1, .LANCHOR75
+	ldrb	w3, [x24]
+	mov	x2, x21
+	ldrh	w4, [x1, #:lo12:.LANCHOR75]
+	adrp	x1, ftl_tmp_buffer
+	add	x1, x1, :lo12:ftl_tmp_buffer
+	madd	w0, w4, w0, w20
+	bl	ftl_read_ppa_page
+	cmp	w0, 512
+	bne	.L1352
+.L1347:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 96
+	ret
+	.size	ftl_open_sblk_read_test, .-ftl_open_sblk_read_test
+	.section	.text.sblk_read_page,"ax",@progbits
+	.align	2
+	.global	sblk_read_page
+	.type	sblk_read_page, %function
+sblk_read_page:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	and	w21, w1, 255
+	stp	x19, x20, [sp, 16]
+	mov	w22, w21
+	stp	x23, x24, [sp, 48]
+	mov	x20, x0
+	adrp	x23, .LANCHOR90
+	adrp	x24, .LANCHOR36
+	mov	x19, x0
+	add	x23, x23, :lo12:.LANCHOR90
+	add	x24, x24, :lo12:.LANCHOR36
+	stp	x25, x26, [sp, 64]
+.L1359:
+	cbnz	w22, .L1363
+.L1371:
+	adrp	x19, .LANCHOR36
+	add	x19, x19, :lo12:.LANCHOR36
+.L1364:
+	cbnz	w21, .L1367
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L1363:
+	ldrb	w25, [x19]
+	ldr	w26, [x19, 40]
+.L1360:
+	mov	w1, 0
+	mov	w0, w26
+	bl	queue_lun_state
+	cbnz	w0, .L1361
+	ldr	w1, [x19, 40]
+	mov	w0, 48
+	bl	flash_start_page_read
+	strb	wzr, [x19, 59]
+	mov	w0, 1
+	strb	w0, [x19, 58]
+	mov	w0, -1
+	strb	w0, [x19]
+	mov	x1, x19
+	mov	x0, x23
+	bl	buf_add_tail
+	subs	w22, w22, #1
+	beq	.L1371
+	ubfiz	x19, x25, 6, 8
+	add	x19, x24, x19
+	b	.L1359
+.L1361:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L1360
+.L1367:
+	ldrb	w0, [x20, 58]
+	cmp	w0, 12
+	bne	.L1365
+	ldrb	w20, [x20]
+	sub	w21, w21, #1
+	add	x20, x19, x20, lsl 6
+	b	.L1364
+.L1365:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L1364
+	.size	sblk_read_page, .-sblk_read_page
+	.section	.text.gc_check_data_one_wl,"ax",@progbits
+	.align	2
+	.global	gc_check_data_one_wl
+	.type	gc_check_data_one_wl, %function
+gc_check_data_one_wl:
+	sub	sp, sp, #112
+	adrp	x0, .LANCHOR60
+	stp	x29, x30, [sp, 16]
+	add	x29, sp, 16
+	stp	x19, x20, [sp, 32]
+	adrp	x19, .LANCHOR58
+	stp	x21, x22, [sp, 48]
+	add	x21, x19, :lo12:.LANCHOR58
+	ldr	x20, [x0, #:lo12:.LANCHOR60]
+	stp	x23, x24, [sp, 64]
+	ldr	x0, [x21, 8]
+	stp	x25, x26, [sp, 80]
+	str	x27, [sp, 96]
+	cbnz	x0, .L1374
+	mov	w0, 1
+	bl	buf_alloc
+	str	x0, [x21, 8]
+.L1374:
+	add	x0, x19, :lo12:.LANCHOR58
+	ldr	x21, [x0, 8]
+	cbz	x21, .L1375
+	adrp	x26, .LANCHOR75
+	adrp	x27, .LANCHOR64
+	add	x25, x20, 96
+	add	x26, x26, :lo12:.LANCHOR75
+	add	x27, x27, :lo12:.LANCHOR64
+	mov	w24, 0
+.L1376:
+	ldrb	w0, [x20, 89]
+	cmp	w24, w0
+	bge	.L1386
+	mov	w23, 1
+	add	x22, x19, :lo12:.LANCHOR58
+	b	.L1387
+.L1375:
+	adrp	x1, .LANCHOR122
+	adrp	x0, .LC0
+	mov	w2, 333
+	add	x1, x1, :lo12:.LANCHOR122
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1377:
+	b	.L1377
+.L1385:
+	ldrh	w0, [x25]
+	ldrh	w1, [x26]
+	ldrb	w2, [x27]
+	cmp	w2, 3
+	mul	w1, w0, w1
+	ldrh	w0, [x22, 16]
+	bne	.L1378
+	add	w0, w0, w1
+	orr	w0, w0, w23, lsl 24
+.L1398:
+	str	w0, [x21, 40]
+	mov	w1, 1
+	mov	x0, x21
+	bl	sblk_read_page
+	ldr	w2, [x21, 52]
+	adrp	x1, .LANCHOR107
+	cmn	w2, #1
+	beq	.L1381
+	ldrh	w0, [x22, 22]
+	ldr	x4, [x1, #:lo12:.LANCHOR107]
+	ldr	x3, [x21, 24]
+	lsl	x0, x0, 2
+	ldr	w5, [x4, x0]
+	ldr	w4, [x3, 4]
+	cmp	w5, w4
+	bne	.L1381
+	adrp	x4, .LANCHOR108
+	ldr	x4, [x4, #:lo12:.LANCHOR108]
+	ldr	w4, [x4, x0]
+	ldr	w0, [x3, 8]
+	cmp	w4, w0
+	beq	.L1382
+.L1381:
+	ldrh	w0, [x22, 22]
+	ldr	x1, [x1, #:lo12:.LANCHOR107]
+	lsl	x0, x0, 2
+	ldr	w3, [x1, x0]
+	cmn	w3, #1
+	beq	.L1382
+	adrp	x1, .LANCHOR22
+	ldr	w1, [x1, #:lo12:.LANCHOR22]
+	tbz	x1, 10, .L1383
+	ldr	x1, [x21, 24]
+	adrp	x4, .LANCHOR108
+	ldr	x4, [x4, #:lo12:.LANCHOR108]
+	ldr	w5, [x1, 12]
+	str	w5, [sp]
+	ldr	w4, [x4, x0]
+	adrp	x0, .LC56
+	ldp	w5, w6, [x1]
+	add	x0, x0, :lo12:.LC56
+	ldr	w7, [x1, 8]
+	ldr	w1, [x21, 40]
+	bl	printf
+.L1383:
+	adrp	x0, .LANCHOR56
+	ldrh	w1, [x20, 80]
+	ldr	x0, [x0, #:lo12:.LANCHOR56]
+	strh	wzr, [x0, x1, lsl 1]
+	mov	w0, -1
+.L1373:
+	ldp	x19, x20, [sp, 32]
+	ldp	x21, x22, [sp, 48]
+	ldp	x23, x24, [sp, 64]
+	ldp	x25, x26, [sp, 80]
+	ldp	x29, x30, [sp, 16]
+	ldr	x27, [sp, 96]
+	add	sp, sp, 112
+	ret
+.L1378:
+	cmp	w2, 2
+	bne	.L1380
+	sub	w0, w0, #1
+	add	w1, w23, w1
+	add	w0, w0, w1
+	orr	w0, w0, 33554432
+	b	.L1398
+.L1380:
+	add	w0, w0, w1
+	b	.L1398
+.L1382:
+	ldrh	w0, [x22, 22]
+	add	w23, w23, 1
+	add	w0, w0, 1
+	strh	w0, [x22, 22]
+.L1387:
+	ldrh	w0, [x22, 20]
+	cmp	w23, w0
+	ble	.L1385
+	add	w24, w24, 1
+	add	x25, x25, 2
+	b	.L1376
+.L1386:
+.L1384:
+	add	x19, x19, :lo12:.LANCHOR58
+	ldrh	w0, [x19, 16]
+	add	w0, w0, 1
+	strh	w0, [x19, 16]
+	mov	w0, 0
+	b	.L1373
+	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
+	.section	.text.flash_prog_page,"ax",@progbits
+	.align	2
+	.global	flash_prog_page
+	.type	flash_prog_page, %function
+flash_prog_page:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w20, w0, 255
+	adrp	x0, .LANCHOR6
+	str	x27, [sp, 80]
+	stp	x21, x22, [sp, 32]
+	and	x19, x20, 255
+	ldr	x27, [x0, #:lo12:.LANCHOR6]
+	adrp	x0, .LANCHOR22
+	stp	x23, x24, [sp, 48]
+	mov	w21, w1
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	add	x23, x19, 8
+	stp	x25, x26, [sp, 64]
+	and	w24, w1, 2097151
+	mov	x25, x2
+	mov	x26, x3
+	ubfx	x22, x21, 24, 2
+	add	x23, x27, x23, lsl 8
+	tbz	x0, 4, .L1400
+	adrp	x0, .LC57
+	mov	w3, w4
+	mov	w2, w22
+	add	x0, x0, :lo12:.LC57
+	bl	printf
+.L1400:
+	bl	nandc_wait_flash_ready
+	mov	w0, w20
+	bl	hynix_reconfig_rr_para
+	mov	w0, w20
+	bl	nandc_cs
+	mov	w0, w20
+	cbnz	w22, .L1401
+	bl	flash_enter_slc_mode
+.L1402:
+	add	x19, x27, x19, lsl 8
+	mov	w0, 128
+	and	w21, w21, 255
+	str	w0, [x19, 2056]
+	lsr	w0, w24, 8
+	str	wzr, [x19, 2052]
+	str	wzr, [x19, 2052]
+	str	w21, [x19, 2052]
+	str	w0, [x19, 2052]
+	lsr	w0, w24, 16
+	str	w0, [x19, 2052]
+	mov	w0, w24
+	bl	nandc_set_seed
+	adrp	x0, .LANCHOR19+9
+	mov	x3, x26
+	mov	x2, x25
+	ldrb	w1, [x0, #:lo12:.LANCHOR19+9]
+	mov	w0, 1
+	bl	nandc_xfer_start
+	bl	nandc_xfer_done
+	mov	w0, 16
+	str	w0, [x19, 2056]
+	bl	nandc_wait_flash_ready
+	mov	x0, x23
+	bl	flash_read_status
+	mov	w5, w0
+	cbnz	w22, .L1403
+	mov	w0, w20
+	bl	flash_exit_slc_mode
+.L1403:
+	mov	w0, w20
+	bl	nandc_de_cs
+	ldp	x19, x20, [sp, 16]
+	and	w0, w5, 4
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	ret
+.L1401:
+	bl	flash_exit_slc_mode
+	b	.L1402
+	.size	flash_prog_page, .-flash_prog_page
+	.section	.text.flash_test_blk,"ax",@progbits
+	.align	2
+	.global	flash_test_blk
+	.type	flash_test_blk, %function
+flash_test_blk:
+	stp	x29, x30, [sp, -64]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w19, w1, 65535
+	stp	x21, x22, [sp, 32]
+	ands	w21, w0, 255
+	str	x23, [sp, 48]
+	bne	.L1409
+	adrp	x0, .LANCHOR123
+	ldrb	w0, [x0, #:lo12:.LANCHOR123]
+	cmp	w0, w19
+	bhi	.L1413
+.L1409:
+	adrp	x22, .LANCHOR118
+	adrp	x23, .LANCHOR119
+	mov	w2, 32
+	mov	w1, 165
+	ldr	x0, [x22, #:lo12:.LANCHOR118]
+	bl	ftl_memset
+	ldr	x0, [x23, #:lo12:.LANCHOR119]
+	mov	w2, 8
+	mov	w1, 90
+	bl	ftl_memset
+	adrp	x0, .LANCHOR13
+	ldrh	w20, [x0, #:lo12:.LANCHOR13]
+	mov	w0, w21
+	mul	w20, w20, w19
+	mov	w1, w20
+	bl	flash_erase_block
+	cmn	w0, #1
+	beq	.L1411
+	adrp	x19, .LANCHOR19
+	add	x19, x19, :lo12:.LANCHOR19
+	ldr	x3, [x22, #:lo12:.LANCHOR118]
+	mov	w1, w20
+	ldr	x2, [x23, #:lo12:.LANCHOR119]
+	mov	w0, w21
+	ldrb	w4, [x19, 9]
+	bl	flash_prog_page
+	cmn	w0, #1
+	beq	.L1411
+	ldrb	w4, [x19, 9]
+	mov	w1, w20
+	ldr	x3, [x22, #:lo12:.LANCHOR118]
+	mov	w0, w21
+	ldr	x2, [x23, #:lo12:.LANCHOR119]
+	bl	flash_read_page
+	mov	w19, w0
+	cmn	w0, #1
+	beq	.L1411
+	ldr	x0, [x23, #:lo12:.LANCHOR119]
+	ldr	w1, [x0]
+	mov	w0, 23130
+	movk	w0, 0x5a5a, lsl 16
+	cmp	w1, w0
+	bne	.L1411
+	ldr	x0, [x22, #:lo12:.LANCHOR118]
+	ldr	w1, [x0]
+	mov	w0, 42405
+	movk	w0, 0xa5a5, lsl 16
+	cmp	w1, w0
+	beq	.L1412
+.L1411:
+	mov	w19, -1
+.L1412:
+	mov	w1, w20
+	mov	w0, w21
+	bl	flash_erase_block
+	mov	w0, w19
+.L1408:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	ret
+.L1413:
+	mov	w0, 0
+	b	.L1408
+	.size	flash_test_blk, .-flash_test_blk
+	.section	.text.flash_start_tlc_page_prog,"ax",@progbits
+	.align	2
+	.global	flash_start_tlc_page_prog
+	.type	flash_start_tlc_page_prog, %function
+flash_start_tlc_page_prog:
+	stp	x29, x30, [sp, -48]!
+	and	w8, w0, 255
+	adrp	x0, .LANCHOR8
+	and	w3, w3, 255
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	str	x21, [sp, 32]
+	cmp	w0, w3
+	bhi	.L1425
+	adrp	x1, .LANCHOR124
+	adrp	x0, .LC0
+	mov	w2, 655
+	add	x1, x1, :lo12:.LANCHOR124
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1426:
+	b	.L1426
+.L1425:
+	adrp	x0, .LANCHOR10
+	add	x0, x0, :lo12:.LANCHOR10
+	and	w7, w1, 255
+	and	w21, w2, 255
+	ldrb	w20, [x0, w3, sxtw]
+	adrp	x0, .LANCHOR6
+	ldr	x19, [x0, #:lo12:.LANCHOR6]
+	mov	w0, w20
+	bl	nandc_cs
+	cbz	w8, .L1427
+	sxtw	x0, w20
+	add	x0, x0, 8
+	add	x0, x19, x0, lsl 8
+	str	w8, [x0, 8]
+.L1427:
+	ubfiz	x0, x20, 8, 8
+	add	x19, x19, x0
+	mov	w0, 128
+	str	w7, [x19, 2056]
+	str	w0, [x19, 2056]
+	and	w0, w4, 255
+	str	wzr, [x19, 2052]
+	str	wzr, [x19, 2052]
+	str	w0, [x19, 2052]
+	lsr	w0, w4, 8
+	str	w0, [x19, 2052]
+	lsr	w0, w4, 16
+	add	w4, w4, w4, lsl 1
+	str	w0, [x19, 2052]
+	sub	w0, w4, #1
+	add	w0, w0, w7
+	bl	nandc_set_seed
+	mov	x3, x6
+	adrp	x0, .LANCHOR19+9
+	mov	x2, x5
+	ldrb	w1, [x0, #:lo12:.LANCHOR19+9]
+	mov	w0, 1
+	bl	nandc_xfer_start
+	bl	nandc_xfer_done
+	str	w21, [x19, 2056]
+	mov	w0, w20
+	ldr	x21, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	b	nandc_de_cs
+	.size	flash_start_tlc_page_prog, .-flash_start_tlc_page_prog
+	.section	.text.queue_tlc_prog_cmd,"ax",@progbits
+	.align	2
+	.type	queue_tlc_prog_cmd, %function
+queue_tlc_prog_cmd:
+	stp	x29, x30, [sp, -48]!
+	mov	w2, 26
+	mov	w1, 1
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	ldr	x0, [x0]
+	ldr	w20, [x0, 40]
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	str	x21, [sp, 32]
+	and	w21, w20, 2097151
+	ubfx	x20, x20, 21, 3
+	mov	w4, w21
+	ldrb	w0, [x0, 60]
+	mov	w3, w20
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldp	x7, x0, [x19]
+	mov	w4, w21
+	mov	w3, w20
+	mov	w2, 26
+	mov	w1, 2
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x0, [x19, 16]
+	mov	w4, w21
+	ldr	x7, [x19]
+	mov	w3, w20
+	mov	w2, 16
+	mov	w1, 3
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
+	ldr	x1, [x19]
+	mov	w0, 4
+	strb	w0, [x1, 58]
+	mov	w0, 1
+	strb	w0, [x1, 59]
+	mov	w0, -1
+	strb	w0, [x1]
+	adrp	x0, .LANCHOR90
+	add	x0, x0, :lo12:.LANCHOR90
+	ldp	x19, x20, [sp, 16]
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	b	buf_add_tail
+	.size	queue_tlc_prog_cmd, .-queue_tlc_prog_cmd
+	.section	.text.sblk_tlc_prog_one_page,"ax",@progbits
+	.align	2
+	.global	sblk_tlc_prog_one_page
+	.type	sblk_tlc_prog_one_page, %function
+sblk_tlc_prog_one_page:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	ldr	x0, [x0]
+	ldr	w20, [x0, 40]
+.L1435:
+	mov	w1, 1
+	mov	w0, w20
+	bl	queue_lun_state
+	cbnz	w0, .L1436
+	mov	x0, x19
+	bl	queue_tlc_prog_cmd
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L1436:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L1435
+	.size	sblk_tlc_prog_one_page, .-sblk_tlc_prog_one_page
+	.section	.text.sblk_xlc_prog_pages,"ax",@progbits
+	.align	2
+	.global	sblk_xlc_prog_pages
+	.type	sblk_xlc_prog_pages, %function
+sblk_xlc_prog_pages:
+	stp	x29, x30, [sp, -64]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	ldr	x0, [x0]
+	stp	x21, x22, [sp, 32]
+	mov	x22, x1
+	stp	x23, x24, [sp, 48]
+	mov	w24, w2
+	ldr	w20, [x0, 40]
+.L1439:
+	mov	w1, 1
+	mov	w0, w20
+	bl	queue_lun_state
+	cbnz	w0, .L1440
+	cmp	w24, 2
+	bne	.L1441
+	ldr	x0, [x19]
+	mov	w2, 17
+	ldr	x1, [x22]
+	ldr	w20, [x0, 40]
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	and	w23, w20, 2097151
+	ldrb	w0, [x0, 60]
+	ubfx	x20, x20, 21, 3
+	mov	w4, w23
+	mov	w3, w20
+	ldr	w21, [x1, 40]
+	mov	w1, 1
+	bl	flash_start_tlc_page_prog
+	and	w21, w21, 2097151
+	bl	nandc_wait_flash_ready
+	ldr	x7, [x19]
+	mov	w4, w21
+	ldr	x0, [x22]
+	mov	w3, w20
+	mov	w2, 26
+	mov	w1, 1
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldp	x7, x0, [x19]
+	mov	w4, w23
+	mov	w3, w20
+	mov	w1, w24
+	mov	w2, 17
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x7, [x19]
+	mov	w4, w21
+	ldr	x0, [x22, 8]
+	mov	w3, w20
+	mov	w1, w24
+	mov	w2, 26
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x7, [x19]
+	mov	w4, w23
+	ldr	x0, [x19, 16]
+	mov	w3, w20
+	mov	w2, 17
+	mov	w1, 3
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x0, [x22, 16]
+	mov	w1, 3
+	ldr	x7, [x19]
+	mov	w4, w21
+	mov	w3, w20
+	mov	w2, 16
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
+	ldr	x1, [x19]
+	mov	w0, 5
+	strb	w0, [x1, 58]
+	mov	w0, 1
+	strb	w0, [x1, 59]
+	mov	w0, -1
+	strb	w0, [x1]
+	adrp	x0, .LANCHOR90
+	add	x0, x0, :lo12:.LANCHOR90
+	bl	buf_add_tail
+.L1442:
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	ret
+.L1440:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L1439
+.L1441:
+	mov	x0, x19
+	bl	queue_tlc_prog_cmd
+	b	.L1442
+	.size	sblk_xlc_prog_pages, .-sblk_xlc_prog_pages
+	.section	.text.flash_start_page_prog,"ax",@progbits
+	.align	2
+	.global	flash_start_page_prog
+	.type	flash_start_page_prog, %function
+flash_start_page_prog:
+	stp	x29, x30, [sp, -48]!
+	mov	w11, w1
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w20, w0, 255
+	adrp	x0, .LANCHOR8
+	str	x21, [sp, 32]
+	ubfx	x1, x11, 21, 3
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	cmp	w0, w1
+	bhi	.L1445
+	adrp	x1, .LANCHOR125
+	adrp	x0, .LC0
+	mov	w2, 692
+	add	x1, x1, :lo12:.LANCHOR125
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1446:
+	b	.L1446
+.L1445:
+	adrp	x0, .LANCHOR10
+	add	x0, x0, :lo12:.LANCHOR10
+	mov	x12, x2
+	mov	x13, x3
+	and	w10, w11, 2097151
+	ldrb	w21, [x0, w1, sxtw]
+	adrp	x0, .LANCHOR6
+	ldr	x19, [x0, #:lo12:.LANCHOR6]
+	mov	w0, w21
+	bl	hynix_reconfig_rr_para
+	mov	w0, w21
+	bl	nandc_cs
+	tst	x11, 50331648
+	bne	.L1447
+	adrp	x0, .LANCHOR11
+	adrp	x1, .LANCHOR12
+	ldrb	w0, [x0, #:lo12:.LANCHOR11]
+	cbz	w0, .L1448
+	ldrb	w0, [x1, #:lo12:.LANCHOR12]
+	cbz	w0, .L1449
+.L1448:
+	adrp	x0, .LANCHOR13
+	ldrb	w1, [x1, #:lo12:.LANCHOR12]
+	ldrh	w2, [x0, #:lo12:.LANCHOR13]
+	udiv	w0, w10, w2
+	mul	w0, w0, w2
+	sub	w10, w10, w0
+	cbz	w1, .L1450
+	add	w10, w0, w10, lsl 1
+.L1449:
+	mov	w0, w21
+	bl	flash_enter_slc_mode
+	b	.L1451
+.L1450:
+	adrp	x1, .LANCHOR14
+	add	x1, x1, :lo12:.LANCHOR14
+	ldrh	w10, [x1, w10, uxtw 1]
+	add	w10, w10, w0
+.L1451:
+	ubfiz	x0, x21, 8, 8
+	add	x19, x19, x0
+	mov	w0, 128
+	str	w0, [x19, 2056]
+	and	w0, w10, 255
+	str	wzr, [x19, 2052]
+	str	wzr, [x19, 2052]
+	str	w0, [x19, 2052]
+	lsr	w0, w10, 8
+	str	w0, [x19, 2052]
+	lsr	w0, w10, 16
+	str	w0, [x19, 2052]
+	mov	w0, w10
+	bl	nandc_set_seed
+	mov	x3, x13
+	adrp	x0, .LANCHOR19+9
+	mov	x2, x12
+	ldrb	w1, [x0, #:lo12:.LANCHOR19+9]
+	mov	w0, 1
+	bl	nandc_xfer_start
+	bl	nandc_xfer_done
+	mov	w0, w21
+	ldr	x21, [sp, 32]
+	str	w20, [x19, 2056]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	b	nandc_de_cs
+.L1447:
+	mov	w0, w21
+	bl	flash_exit_slc_mode
+	b	.L1451
+	.size	flash_start_page_prog, .-flash_start_page_prog
+	.section	.text.queue_prog_cmd,"ax",@progbits
+	.align	2
+	.type	queue_prog_cmd, %function
+queue_prog_cmd:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	ldr	w1, [x0, 40]
+	ldr	x3, [x0, 24]
+	ldr	x2, [x0, 8]
+	str	x19, [sp, 16]
+	mov	x19, x0
+	mov	w0, 16
+	bl	flash_start_page_prog
+	adrp	x0, .LANCHOR90
+	ldr	w3, [x19, 40]
+	ldrb	w1, [x0, #:lo12:.LANCHOR90]
+	cmp	w1, 255
+	beq	.L1457
+	adrp	x2, .LANCHOR36
+	add	x2, x2, :lo12:.LANCHOR36
+	ubfx	x3, x3, 21, 3
+	mov	x6, x2
+.L1459:
+	add	x4, x2, x1, lsl 6
+	ldr	w5, [x4, 40]
+	ubfx	x5, x5, 21, 3
+	cmp	w3, w5
+	bne	.L1458
+	ldrb	w5, [x4, 58]
+	cmp	w5, 6
+	bne	.L1458
+	mov	w1, 3
+	strb	w1, [x4, 58]
+.L1457:
+	mov	w1, 3
+	strb	w1, [x19, 58]
+	mov	w1, 1
+	strb	w1, [x19, 59]
+	mov	w1, -1
+	strb	w1, [x19]
+	mov	x1, x19
+	add	x0, x0, :lo12:.LANCHOR90
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	b	buf_add_tail
+.L1458:
+	lsl	x1, x1, 6
+	ldrb	w1, [x6, x1]
+	cmp	w1, 255
+	bne	.L1459
+	b	.L1457
+	.size	queue_prog_cmd, .-queue_prog_cmd
+	.section	.text.sblk_prog_page,"ax",@progbits
+	.align	2
+	.global	sblk_prog_page
+	.type	sblk_prog_page, %function
+sblk_prog_page:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	ldrh	w0, [x0, 50]
+	and	w20, w1, 255
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	cbz	w0, .L1466
+	adrp	x0, .LANCHOR22
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	tbz	x0, 8, .L1466
+	ldr	w1, [x19, 40]
+	adrp	x0, .LC58
+	mov	w2, w20
+	add	x0, x0, :lo12:.LC58
+	bl	printf
+.L1466:
+	adrp	x24, .LANCHOR23
+	adrp	x22, .LANCHOR36
+	add	x24, x24, :lo12:.LANCHOR23
+	add	x22, x22, :lo12:.LANCHOR36
+	mov	w21, 0
+	mov	w23, 1
+.L1467:
+	cbnz	w20, .L1478
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L1478:
+	ldrb	w25, [x19]
+	ldr	w26, [x19, 40]
+.L1468:
+	mov	w1, 1
+	mov	w0, w26
+	bl	queue_lun_state
+	cbnz	w0, .L1469
+	cmp	w20, 1
+	beq	.L1470
+	ldrb	w0, [x24]
+	cbnz	w0, .L1471
+.L1470:
+	mov	x0, x19
+	bl	queue_prog_cmd
+.L1472:
+	ubfiz	x19, x25, 6, 8
+	sub	w20, w20, #1
+	add	x19, x22, x19
+	b	.L1467
+.L1469:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L1468
+.L1471:
+	ldrb	w0, [x19]
+	ubfx	x1, x26, 21, 3
+	cmp	w0, 255
+	bne	.L1473
+	adrp	x1, .LANCHOR126
+	adrp	x0, .LC0
+	mov	w2, 478
+	add	x1, x1, :lo12:.LANCHOR126
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1474:
+	b	.L1474
+.L1473:
+	sbfiz	x0, x0, 6, 32
+	add	x0, x22, x0
+	ldr	w5, [x0, 40]
+	ubfx	x0, x5, 21, 3
+	cmp	w1, w0
+	bne	.L1475
+	adrp	x0, .LANCHOR71
+	ldrh	w2, [x0, #:lo12:.LANCHOR71]
+	adrp	x0, .LANCHOR70
+	ldrb	w3, [x0, #:lo12:.LANCHOR70]
+	mov	w0, 21
+	sub	w0, w0, w2
+	lsl	w1, w23, w2
+	sub	w3, w3, #1
+	sub	w1, w1, #1
+	lsl	w0, w23, w0
+	sub	w0, w0, #1
+	and	w0, w0, w3
+	lsr	w4, w26, w2
+	and	w0, w0, 65535
+	and	w1, w1, 65535
+	and	w4, w0, w4
+	lsr	w2, w5, w2
+	and	w0, w0, w2
+	and	w26, w1, w26
+	cmp	w4, w0
+	and	w1, w1, w5
+	ccmp	w26, w1, 0, ne
+	bne	.L1475
+	cmp	w21, w3
+	beq	.L1475
+	ldr	w1, [x19, 40]
+	mov	w0, 17
+	ldr	x2, [x19, 8]
+	add	w21, w21, 1
+	ldr	x3, [x19, 24]
+	bl	flash_start_page_prog
+	strb	w23, [x19, 59]
+	mov	w0, 8
+	strb	w0, [x19, 58]
+	mov	w0, -1
+	strb	w0, [x19]
+	mov	x1, x19
+	adrp	x0, .LANCHOR90
+	add	x0, x0, :lo12:.LANCHOR90
+	bl	buf_add_tail
+	b	.L1472
+.L1475:
+	mov	x0, x19
+	mov	w21, 0
+	bl	queue_prog_cmd
+	b	.L1472
+	.size	sblk_prog_page, .-sblk_prog_page
+	.section	.text.ftl_flush,"ax",@progbits
+	.align	2
+	.global	ftl_flush
+	.type	ftl_flush, %function
+ftl_flush:
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR89
+	add	x29, sp, 0
+	ldrb	w1, [x0, #:lo12:.LANCHOR89]
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	adrp	x20, .LANCHOR127
+	cbz	w1, .L1490
+	ldrb	w2, [x20, #:lo12:.LANCHOR127]
+	adrp	x0, .LANCHOR36
+	add	x0, x0, :lo12:.LANCHOR36
+	add	x0, x0, x2, lsl 6
+	bl	sblk_prog_page
+.L1490:
+	mov	w0, -1
+	strb	wzr, [x19, #:lo12:.LANCHOR89]
+	strb	w0, [x20, #:lo12:.LANCHOR127]
+	bl	sblk_wait_write_queue_completed
+	bl	ftl_write_completed
+	ldp	x19, x20, [sp, 16]
+	mov	w0, -1
+	ldp	x29, x30, [sp], 32
+	b	ftl_vpn_decrement
+	.size	ftl_flush, .-ftl_flush
+	.section	.text.flash_prog_page_en,"ax",@progbits
+	.align	2
+	.global	flash_prog_page_en
+	.type	flash_prog_page_en, %function
+flash_prog_page_en:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	and	w24, w0, 255
+	adrp	x0, .LANCHOR8
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	stp	x25, x26, [sp, 64]
+	cmp	w0, w24
+	bhi	.L1496
+	adrp	x1, .LANCHOR128
+	adrp	x0, .LC0
+	mov	w2, 480
+	add	x1, x1, :lo12:.LANCHOR128
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1497:
+	b	.L1497
+.L1496:
+	adrp	x0, .LANCHOR10
+	add	x0, x0, :lo12:.LANCHOR10
+	mov	w20, w1
+	mov	x23, x2
+	mov	x22, x3
+	mov	w25, w4
+	and	w21, w5, 255
+	ldrb	w26, [x0, w24, sxtw]
+	tst	x20, 50331648
+	bne	.L1508
+	adrp	x0, .LANCHOR11
+	ldrb	w1, [x0, #:lo12:.LANCHOR11]
+	adrp	x0, .LANCHOR12
+	cbz	w1, .L1499
+	ldrb	w1, [x0, #:lo12:.LANCHOR12]
+	cbz	w1, .L1508
+.L1499:
+	adrp	x1, .LANCHOR13
+	ldrb	w0, [x0, #:lo12:.LANCHOR12]
+	ldrh	w1, [x1, #:lo12:.LANCHOR13]
+	udiv	w19, w20, w1
+	mul	w19, w19, w1
+	sub	w1, w20, w19
+	cbz	w0, .L1500
+	add	w19, w19, w1, lsl 1
+.L1498:
+	adrp	x0, .LANCHOR22
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	tbz	x0, 4, .L1501
+	adrp	x0, .LC59
+	mov	w2, w20
+	mov	w1, w26
+	add	x0, x0, :lo12:.LC59
+	bl	printf
+.L1501:
+	mov	w0, w26
+	mov	w4, w25
+	mov	x3, x22
+	mov	x2, x23
+	mov	w1, w19
+	bl	flash_prog_page
+	mov	w26, w0
+	cbz	w21, .L1502
+	adrp	x21, .LANCHOR118
+	adrp	x19, .LANCHOR119
+	mov	w4, w25
+	mov	w1, w20
+	ldr	x3, [x21, #:lo12:.LANCHOR118]
+	mov	w0, w24
+	ldr	x2, [x19, #:lo12:.LANCHOR119]
+	bl	flash_read_page_en
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	beq	.L1503
+	ldr	x0, [x19, #:lo12:.LANCHOR119]
+	ldr	w1, [x23]
+	ldr	w0, [x0]
+	cmp	w1, w0
+	bne	.L1503
+	ldr	x0, [x21, #:lo12:.LANCHOR118]
+	ldr	w1, [x22]
+	ldr	w0, [x0]
+	cmp	w1, w0
+	beq	.L1502
+.L1503:
+	ldr	x1, [x21, #:lo12:.LANCHOR118]
+	mov	w3, 4
+	adrp	x0, .LC60
+	mov	w2, w3
+	add	x0, x0, :lo12:.LC60
+	bl	rknand_print_hex
+	ldr	x1, [x19, #:lo12:.LANCHOR119]
+	mov	w3, 4
+	adrp	x0, .LC61
+	mov	w2, w3
+	add	x0, x0, :lo12:.LC61
+	bl	rknand_print_hex
+.L1504:
+	mov	w1, w20
+	adrp	x0, .LC62
+	add	x0, x0, :lo12:.LC62
+	bl	printf
+	adrp	x1, .LANCHOR128
+	adrp	x0, .LC0
+	mov	w2, 506
+	add	x1, x1, :lo12:.LANCHOR128
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1506:
+	b	.L1506
+.L1500:
+	adrp	x0, .LANCHOR14
+	add	x0, x0, :lo12:.LANCHOR14
+	ldrh	w0, [x0, w1, uxtw 1]
+	add	w19, w0, w19
+	b	.L1498
+.L1508:
+	mov	w19, w20
+	b	.L1498
+.L1502:
+	cmn	w26, #1
+	beq	.L1504
+	mov	w0, w26
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+	.size	flash_prog_page_en, .-flash_prog_page_en
+	.section	.text.ftl_test_block,"ax",@progbits
+	.align	2
+	.global	ftl_test_block
+	.type	ftl_test_block, %function
+ftl_test_block:
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, ftl_tmp_buffer
+	adrp	x22, .LANCHOR121
+	stp	x23, x24, [sp, 48]
+	adrp	x24, .LANCHOR76
+	add	x24, x24, :lo12:.LANCHOR76
+	stp	x25, x26, [sp, 64]
+	and	w26, w0, 65535
+	stp	x19, x20, [sp, 16]
+	adrp	x25, .LANCHOR70
+	stp	x27, x28, [sp, 80]
+	add	x0, x25, :lo12:.LANCHOR70
+	str	wzr, [x21, #:lo12:ftl_tmp_buffer]
+	mov	w19, 0
+	str	wzr, [x22, #:lo12:.LANCHOR121]
+	str	x0, [x29, 112]
+.L1520:
+	ldrb	w0, [x24]
+	cmp	w0, w19
+	bls	.L1527
+	add	x0, x25, :lo12:.LANCHOR70
+	adrp	x23, .LANCHOR22
+	mov	w20, 0
+	add	x23, x23, :lo12:.LANCHOR22
+	str	x0, [x29, 120]
+	b	.L1528
+.L1526:
+	ldr	w0, [x23]
+	tbz	x0, 12, .L1521
+	adrp	x0, .LC63
+	mov	w1, w26
+	add	x0, x0, :lo12:.LC63
+	bl	printf
+.L1521:
+	ldr	x0, [x29, 112]
+	ldrb	w6, [x0]
+	madd	w6, w26, w6, w20
+	and	w28, w6, 65535
+	cbnz	w19, .L1522
+	adrp	x0, .LANCHOR5
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	ldrb	w0, [x0, 47]
+	cmp	w0, w28
+	bcs	.L1523
+.L1522:
+	and	w27, w19, 255
+	mov	w1, w28
+	mov	w0, w27
+	bl	flash_check_bad_block
+	cbnz	w0, .L1523
+	adrp	x0, .LANCHOR75
+	ldrh	w8, [x0, #:lo12:.LANCHOR75]
+	mov	w0, w27
+	mul	w8, w8, w28
+	str	w8, [x29, 108]
+	mov	w1, w8
+	bl	flash_erase_block
+	ldr	w8, [x29, 108]
+	cbz	w0, .L1525
+.L1536:
+	mov	w1, w28
+	mov	w0, w27
+	bl	flash_mask_bad_block
+	b	.L1523
+.L1525:
+	adrp	x0, .LANCHOR45
+	mov	w5, 1
+	add	x3, x22, :lo12:.LANCHOR121
+	add	x2, x21, :lo12:ftl_tmp_buffer
+	ldrb	w4, [x0, #:lo12:.LANCHOR45]
+	mov	w1, w8
+	mov	w0, w27
+	bl	flash_prog_page_en
+	cbnz	w0, .L1536
+.L1523:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+.L1528:
+	ldr	x0, [x29, 120]
+	ldrb	w0, [x0]
+	cmp	w0, w20
+	bhi	.L1526
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L1520
+.L1527:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+	.size	ftl_test_block, .-ftl_test_block
+	.section	.text.ftl_prog_page,"ax",@progbits
+	.align	2
+	.global	ftl_prog_page
+	.type	ftl_prog_page, %function
+ftl_prog_page:
+	stp	x29, x30, [sp, -64]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w19, w0, 255
+	stp	x21, x22, [sp, 32]
+	mov	w20, w1
+	mov	x21, x2
+	mov	x22, x3
+	str	x23, [sp, 48]
+	mov	w23, w4
+	bl	sblk_wait_write_queue_completed
+	mov	w5, 1
+	mov	w4, w23
+	mov	x3, x22
+	mov	x2, x21
+	mov	w1, w20
+	mov	w0, w19
+	bl	flash_prog_page_en
+	cmn	w0, #1
+	bne	.L1537
+	adrp	x1, .LANCHOR129
+	adrp	x0, .LC0
+	mov	w2, 1414
+	add	x1, x1, :lo12:.LANCHOR129
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1539:
+	b	.L1539
+.L1537:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	ret
+	.size	ftl_prog_page, .-ftl_prog_page
+	.section	.text.ftl_info_flush,"ax",@progbits
+	.align	2
+	.global	ftl_info_flush
+	.type	ftl_info_flush, %function
+ftl_info_flush:
+	stp	x29, x30, [sp, -112]!
+	mov	w1, 0
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR45
+	stp	x23, x24, [sp, 48]
+	adrp	x22, .LANCHOR131
+	ldrb	w2, [x21, #:lo12:.LANCHOR45]
+	mov	x23, x22
+	stp	x25, x26, [sp, 64]
+	adrp	x25, .LANCHOR75
+	stp	x27, x28, [sp, 80]
+	mov	w26, 0
+	stp	x19, x20, [sp, 16]
+	lsl	w2, w2, 1
+	adrp	x20, .LANCHOR130
+	str	w0, [x29, 108]
+	mov	x24, x25
+	add	x27, x22, :lo12:.LANCHOR131
+	add	x28, x25, :lo12:.LANCHOR75
+	add	x0, x20, :lo12:.LANCHOR130
+	bl	ftl_memset
+.L1542:
+	add	x0, x22, :lo12:.LANCHOR131
+	ldr	w1, [x29, 108]
+	ldrb	w6, [x22, #:lo12:.LANCHOR131]
+	ldrh	w19, [x25, #:lo12:.LANCHOR75]
+	ldrh	w4, [x0, 2]
+	adrp	x0, .LANCHOR46
+	ldr	x0, [x0, #:lo12:.LANCHOR46]
+	ldr	w3, [x0, 4]
+	add	w3, w3, 1
+	str	w3, [x0, 4]
+	add	x0, x20, :lo12:.LANCHOR130
+	str	w1, [x20, #:lo12:.LANCHOR130]
+	str	w3, [x0, 4]
+	adrp	x0, .LANCHOR22
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	tbz	x0, 12, .L1543
+	mov	w2, w4
+	mov	w1, w6
+	stp	w4, w6, [x29, 100]
+	adrp	x0, .LC64
+	add	x0, x0, :lo12:.LC64
+	bl	printf
+	ldp	w4, w6, [x29, 100]
+.L1543:
+	adrp	x1, .LANCHOR79
+	ldrh	w0, [x27, 2]
+	ldrh	w1, [x1, #:lo12:.LANCHOR79]
+	cmp	w1, w0
+	bhi	.L1544
+	adrp	x1, .LANCHOR5
+	ldrb	w0, [x27, 1]
+	ldrb	w2, [x27]
+	mov	w4, 0
+	ldr	x6, [x1, #:lo12:.LANCHOR5]
+.L1551:
+	add	w0, w0, 1
+	and	w0, w0, 255
+	cmp	w0, 7
+	bls	.L1545
+	mov	x1, 0
+.L1550:
+	add	x3, x6, x1
+	and	w7, w1, 65535
+	ldrb	w8, [x3, 40]
+	add	w3, w8, 127
+	and	w3, w3, 255
+	cmp	w3, 125
+	bhi	.L1546
+	add	x1, x23, :lo12:.LANCHOR131
+	strb	w0, [x1, 1]
+	cbz	w4, .L1547
+	strb	w2, [x23, #:lo12:.LANCHOR131]
+.L1547:
+	adrp	x1, .LANCHOR132
+	adrp	x0, .LC0
+	mov	w2, 156
+	add	x1, x1, :lo12:.LANCHOR132
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1548:
+	b	.L1548
+.L1546:
+	cmp	w8, 255
+	bne	.L1549
+	add	x1, x1, 1
+	cmp	x1, 8
+	bne	.L1550
+	mov	w7, w1
+.L1549:
+	and	w0, w7, 255
+	mov	w26, 1
+.L1545:
+	add	w1, w0, 8
+	mov	w4, 1
+	add	x1, x6, x1, sxtw
+	ldrb	w2, [x1, 32]
+	cmp	w2, 255
+	beq	.L1551
+	ldrh	w19, [x28]
+	strb	w0, [x27, 1]
+	mov	w0, 0
+	strb	w2, [x27]
+	mul	w19, w19, w2
+	mov	w1, w19
+	bl	flash_erase_block
+	ldrb	w4, [x21, #:lo12:.LANCHOR45]
+	mov	w1, w19
+	add	x3, x20, :lo12:.LANCHOR130
+	adrp	x2, ftl_info_data_buffer
+	mov	w0, 0
+	add	x2, x2, :lo12:ftl_info_data_buffer
+	bl	ftl_prog_page
+	mov	w0, 1
+	add	w19, w19, w0
+	strh	w0, [x27, 2]
+.L1552:
+	ldrb	w4, [x21, #:lo12:.LANCHOR45]
+	mov	w1, w19
+	add	x3, x20, :lo12:.LANCHOR130
+	adrp	x2, ftl_info_data_buffer
+	mov	w0, 0
+	add	x2, x2, :lo12:ftl_info_data_buffer
+	bl	ftl_prog_page
+	cmn	w0, #1
+	ldrh	w1, [x27, 2]
+	add	w1, w1, 1
+	strh	w1, [x27, 2]
+	beq	.L1542
+	cbnz	w26, .L1553
+.L1561:
+	ldrb	w0, [x23, #:lo12:.LANCHOR131]
+	cmp	w0, 255
+	bne	.L1577
+	adrp	x1, .LANCHOR132
+	adrp	x0, .LC0
+	mov	w2, 191
+	add	x1, x1, :lo12:.LANCHOR132
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1562:
+	b	.L1562
+.L1544:
+	madd	w19, w19, w6, w4
+	cbnz	w0, .L1552
+	mov	w1, w19
+	bl	flash_erase_block
+	b	.L1552
+.L1553:
+	ldrb	w19, [x27, 1]
+	add	x24, x24, :lo12:.LANCHOR75
+	adrp	x20, .LANCHOR5
+	add	w19, w19, 1
+.L1556:
+	cmp	w19, 7
+	bhi	.L1561
+	ldr	x1, [x20, #:lo12:.LANCHOR5]
+	add	w0, w19, 8
+	add	x0, x1, x0, sxtw
+	ldrb	w0, [x0, 32]
+	add	w1, w0, 127
+	and	w1, w1, 255
+	cmp	w1, 125
+	bhi	.L1557
+	adrp	x1, .LANCHOR132
+	adrp	x0, .LC0
+	mov	w2, 184
+	add	x1, x1, :lo12:.LANCHOR132
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1558:
+	b	.L1558
+.L1557:
+	cmp	w0, 255
+	beq	.L1559
+	ldrh	w1, [x24]
+	mul	w1, w1, w0
+	mov	w0, 0
+	bl	flash_erase_block
+.L1559:
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L1556
+.L1577:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+	.size	ftl_info_flush, .-ftl_info_flush
+	.section	.text.ftl_info_blk_init,"ax",@progbits
+	.align	2
+	.global	ftl_info_blk_init
+	.type	ftl_info_blk_init, %function
+ftl_info_blk_init:
+	stp	x29, x30, [sp, -128]!
+	adrp	x0, .LANCHOR133
+	adrp	x1, .LANCHOR59
+	mov	w2, 16384
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, ftl_info_data_buffer
+	strb	wzr, [x0, #:lo12:.LANCHOR133]
+	add	x0, x20, :lo12:ftl_info_data_buffer
+	str	x0, [x1, #:lo12:.LANCHOR59]
+	adrp	x1, .LANCHOR54
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR46
+	ldrh	w1, [x1, #:lo12:.LANCHOR54]
+	adrp	x21, .LANCHOR131
+	stp	x25, x26, [sp, 64]
+	adrp	x26, .LANCHOR75
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR5
+	add	x1, x0, x1, lsl 2
+	stp	x27, x28, [sp, 80]
+	str	x1, [x22, #:lo12:.LANCHOR46]
+	mov	w1, 0
+	bl	ftl_memset
+	adrp	x25, .LANCHOR45
+	mov	w1, 0
+	mov	w2, 16384
+	adrp	x0, ftl_ext_info_data_buffer
+	add	x0, x0, :lo12:ftl_ext_info_data_buffer
+	bl	ftl_memset
+	mov	w27, 21574
+	ldr	x1, [x23, #:lo12:.LANCHOR5]
+	add	x0, x21, :lo12:.LANCHOR131
+	add	x26, x26, :lo12:.LANCHOR75
+	add	x25, x25, :lo12:.LANCHOR45
+	mov	x19, 7
+	movk	w27, 0x494c, lsl 16
+	strb	wzr, [x0, 1]
+	ldrb	w1, [x1, 40]
+	strb	w1, [x21, #:lo12:.LANCHOR131]
+	strh	wzr, [x0, 2]
+.L1581:
+	ldr	x1, [x23, #:lo12:.LANCHOR5]
+	add	w0, w19, 8
+	sxth	w24, w19
+	mov	w28, w19
+	add	x0, x1, x0, sxtw
+	ldrb	w0, [x0, 32]
+	cmp	w0, 255
+	bne	.L1580
+.L1585:
+	sub	x19, x19, #1
+	cmn	x19, #1
+	bne	.L1581
+	mov	w24, 0
+.L1582:
+	adrp	x0, .LANCHOR22
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	tbz	x0, 12, .L1586
+	ldr	x0, [x22, #:lo12:.LANCHOR46]
+	mov	w2, 4800
+	mov	w1, w19
+	ldr	w3, [x0]
+	adrp	x0, .LC66
+	add	x0, x0, :lo12:.LC66
+	bl	printf
+.L1586:
+	cmn	w19, #1
+	bne	.L1587
+	mov	w1, 0
+	mov	w2, 16384
+	add	x0, x20, :lo12:ftl_info_data_buffer
+	bl	ftl_memset
+	ldr	x0, [x22, #:lo12:.LANCHOR46]
+	mov	w1, 21574
+	movk	w1, 0x494c, lsl 16
+	str	w1, [x0]
+	mov	w0, w19
+.L1579:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+.L1580:
+	ldrh	w6, [x26]
+	add	x8, x20, :lo12:ftl_info_data_buffer
+	ldrb	w4, [x25]
+	adrp	x7, .LANCHOR130
+	add	x7, x7, :lo12:.LANCHOR130
+	mov	x2, x8
+	mov	x3, x7
+	stp	x7, x8, [x29, 104]
+	mul	w6, w6, w0
+	mov	w0, 0
+	str	w6, [x29, 124]
+	mov	w1, w6
+	bl	ftl_read_page
+	mov	w5, w0
+	cmn	w0, #1
+	ldr	w6, [x29, 124]
+	ldp	x7, x8, [x29, 104]
+	bne	.L1583
+	ldrb	w4, [x25]
+	mov	x3, x7
+	mov	x2, x8
+	add	w1, w6, 1
+	mov	w0, 0
+	bl	ftl_read_page
+	mov	w5, w0
+.L1583:
+	adrp	x0, .LANCHOR22
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	tbz	x0, 12, .L1584
+	ldr	x0, [x22, #:lo12:.LANCHOR46]
+	mov	w2, w5
+	str	w5, [x29, 124]
+	mov	w3, 64
+	mov	w1, w28
+	ldr	w4, [x0]
+	adrp	x0, .LC65
+	add	x0, x0, :lo12:.LC65
+	bl	printf
+	ldr	w5, [x29, 124]
+.L1584:
+	cmn	w5, #1
+	beq	.L1585
+	ldr	x0, [x22, #:lo12:.LANCHOR46]
+	ldr	w0, [x0]
+	cmp	w0, w27
+	bne	.L1585
+	mov	w19, w24
+	b	.L1582
+.L1587:
+	ldr	x1, [x23, #:lo12:.LANCHOR5]
+	add	w0, w24, 8
+	add	x20, x20, :lo12:ftl_info_data_buffer
+	mov	w4, 4
+	mov	x2, x20
+	adrp	x26, .LANCHOR45
+	add	x0, x1, x0, sxtw
+	mov	w27, 21574
+	add	x26, x26, :lo12:.LANCHOR45
+	movk	w27, 0x494c, lsl 16
+	ldrb	w1, [x0, 32]
+	add	x0, x21, :lo12:.LANCHOR131
+	strb	w1, [x21, #:lo12:.LANCHOR131]
+	strb	w24, [x0, 1]
+	adrp	x24, .LANCHOR130
+	add	x24, x24, :lo12:.LANCHOR130
+	mov	w0, 0
+	mov	x3, x24
+	bl	flash_get_last_written_page
+	sxth	w23, w0
+	add	w0, w0, 1
+	and	w19, w0, 65535
+	adrp	x0, .LANCHOR75
+	ldrb	w25, [x21, #:lo12:.LANCHOR131]
+	ldrh	w0, [x0, #:lo12:.LANCHOR75]
+	madd	w25, w25, w0, w23
+.L1589:
+	tbnz	w23, #31, .L1594
+	ldrb	w4, [x26]
+	mov	x3, x24
+	mov	x2, x20
+	mov	w1, w25
+	mov	w0, 0
+	bl	ftl_read_page
+	cmn	w0, #1
+	beq	.L1590
+	ldr	x0, [x22, #:lo12:.LANCHOR46]
+	ldr	w0, [x0]
+	cmp	w0, w27
+	bne	.L1590
+.L1594:
+	ldr	x0, [x22, #:lo12:.LANCHOR46]
+	add	x21, x21, :lo12:.LANCHOR131
+	strh	w19, [x21, 2]
+	ldr	w1, [x0, 16]
+	cmp	w1, 2048
+	bhi	.L1591
+.L1592:
+	ldr	w1, [x0, 24]
+	cmp	w1, 2048
+	bls	.L1595
+	ldr	w2, [x0, 28]
+	add	w2, w2, w1, lsr 11
+	and	w1, w1, 2047
+	stp	w1, w2, [x0, 24]
+.L1595:
+	ldr	w1, [x0, 32]
+	cmp	w1, 1024
+	bls	.L1596
+	ldr	w2, [x0, 36]
+	add	w2, w2, w1, lsr 10
+	and	w1, w1, 1023
+	stp	w1, w2, [x0, 32]
+.L1596:
+	ldr	w1, [x0, 40]
+	cmp	w1, 1024
+	bls	.L1597
+	ldr	w2, [x0, 44]
+	add	w2, w2, w1, lsr 10
+	and	w1, w1, 1023
+	stp	w1, w2, [x0, 40]
+.L1597:
+	ldr	w1, [x0, 64]
+	add	w1, w1, 1
+	str	w1, [x0, 64]
+	mov	w0, 0
+	bl	ftl_info_flush
+	mov	w0, 0
+	bl	ftl_info_flush
+	mov	w0, 0
+	b	.L1579
+.L1590:
+	sub	w23, w23, #1
+	sub	w25, w25, #1
+	sxth	w23, w23
+	b	.L1589
+.L1591:
+	ldr	w2, [x0, 20]
+	add	w2, w2, w1, lsr 11
+	and	w1, w1, 2047
+	stp	w1, w2, [x0, 16]
+	b	.L1592
+	.size	ftl_info_blk_init, .-ftl_info_blk_init
+	.section	.text.ftl_ext_info_flush,"ax",@progbits
+	.align	2
+	.global	ftl_ext_info_flush
+	.type	ftl_ext_info_flush, %function
+ftl_ext_info_flush:
+	stp	x29, x30, [sp, -96]!
+	adrp	x0, .LANCHOR60
+	add	x29, sp, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR60]
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	ldr	w1, [x0, 520]
+	stp	x25, x26, [sp, 64]
+	str	x27, [sp, 80]
+	cbz	w1, .L1613
+	str	wzr, [x0, 520]
+.L1613:
+	adrp	x24, .LANCHOR46
+	adrp	x20, .LANCHOR79
+	adrp	x21, .LANCHOR71
+	add	x20, x20, :lo12:.LANCHOR79
+	mov	x22, x24
+	add	x21, x21, :lo12:.LANCHOR71
+	mov	w0, 0
+	bl	ftl_total_vpn_update
+.L1622:
+	ldr	x0, [x24, #:lo12:.LANCHOR46]
+	ldr	w1, [x0, 56]
+	add	w1, w1, 1
+	str	w1, [x0, 56]
+	ldrh	w1, [x0, 140]
+	ldrh	w0, [x20]
+	cmp	w1, w0
+	bcc	.L1614
+	bl	ftl_ext_alloc_new_blk
+.L1614:
+	ldr	x2, [x22, #:lo12:.LANCHOR46]
+	mov	w0, 65535
+	ldrh	w1, [x2, 130]
+	cmp	w1, w0
+	bne	.L1615
+	adrp	x1, .LANCHOR134
+	adrp	x0, .LC0
+	mov	w2, 1048
+	add	x1, x1, :lo12:.LANCHOR134
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1616:
+	b	.L1616
+.L1615:
+	ldrh	w0, [x21]
+	mov	w19, 21
+	adrp	x25, .LANCHOR45
+	adrp	x26, .LANCHOR130
+	sub	w0, w19, w0
+	mov	w19, 1
+	add	x23, x26, :lo12:.LANCHOR130
+	asr	w27, w1, w0
+	lsl	w19, w19, w0
+	adrp	x0, .LANCHOR75
+	sub	w19, w19, #1
+	and	w19, w19, w1
+	ldrh	w1, [x0, #:lo12:.LANCHOR75]
+	ldrh	w0, [x2, 140]
+	ldrb	w2, [x25, #:lo12:.LANCHOR45]
+	madd	w19, w19, w1, w0
+	lsl	w2, w2, 1
+	mov	w1, 0
+	mov	x0, x23
+	bl	ftl_memset
+	and	w19, w19, 65535
+	ldr	x0, [x22, #:lo12:.LANCHOR46]
+	mov	w1, w19
+	ldrb	w4, [x25, #:lo12:.LANCHOR45]
+	mov	x3, x23
+	str	wzr, [x26, #:lo12:.LANCHOR130]
+	adrp	x2, ftl_ext_info_data_buffer
+	add	x2, x2, :lo12:ftl_ext_info_data_buffer
+	ldr	w0, [x0, 56]
+	str	w0, [x23, 4]
+	mov	w0, w27
+	bl	ftl_prog_page
+	ldr	x2, [x22, #:lo12:.LANCHOR46]
+	ldrh	w1, [x2, 140]
+	add	w1, w1, 1
+	and	w1, w1, 65535
+	strh	w1, [x2, 140]
+	cmp	w1, 1
+	beq	.L1622
+	cmn	w0, #1
+	beq	.L1622
+	mov	w0, 0
+	ldr	x27, [sp, 80]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	ret
+	.size	ftl_ext_info_flush, .-ftl_ext_info_flush
+	.section	.text.ftl_ext_info_init,"ax",@progbits
+	.align	2
+	.global	ftl_ext_info_init
+	.type	ftl_ext_info_init, %function
+ftl_ext_info_init:
+	stp	x29, x30, [sp, -112]!
+	adrp	x0, .LANCHOR86
+	mov	w4, 4
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR46
+	strh	wzr, [x0, #:lo12:.LANCHOR86]
+	ldr	x0, [x22, #:lo12:.LANCHOR46]
+	stp	x19, x20, [sp, 16]
+	stp	x25, x26, [sp, 64]
+	adrp	x25, ftl_ext_info_data_buffer
+	stp	x23, x24, [sp, 48]
+	add	x2, x25, :lo12:ftl_ext_info_data_buffer
+	ldrh	w19, [x0, 130]
+	adrp	x0, .LANCHOR71
+	stp	x27, x28, [sp, 80]
+	adrp	x24, .LANCHOR130
+	ldrh	w1, [x0, #:lo12:.LANCHOR71]
+	mov	w0, 21
+	and	w26, w19, 16383
+	add	x3, x24, :lo12:.LANCHOR130
+	sub	w0, w0, w1
+	mov	w1, w26
+	asr	w19, w19, w0
+	and	w19, w19, 255
+	mov	w0, w19
+	bl	flash_get_last_written_page
+	sxth	w21, w0
+	adrp	x0, .LANCHOR22
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	tbz	x0, 12, .L1628
+	adrp	x1, .LANCHOR135
+	adrp	x0, .LC28
+	mov	w3, w21
+	mov	w2, 1091
+	add	x1, x1, :lo12:.LANCHOR135
+	add	x0, x0, :lo12:.LC28
+	bl	printf
+.L1628:
+	adrp	x27, .LANCHOR45
+	adrp	x28, .LANCHOR75
+	mov	w5, 20038
+	add	x27, x27, :lo12:.LANCHOR45
+	add	x28, x28, :lo12:.LANCHOR75
+	mov	w23, 0
+	movk	w5, 0x4549, lsl 16
+.L1629:
+	and	w20, w21, 65535
+	sub	w0, w20, w23
+	tbnz	x0, 15, .L1634
+	ldrh	w0, [x28]
+	sub	w1, w21, w23
+	ldrb	w4, [x27]
+	add	x3, x24, :lo12:.LANCHOR130
+	str	w5, [x29, 108]
+	add	x2, x25, :lo12:ftl_ext_info_data_buffer
+	madd	w1, w0, w26, w1
+	mov	w0, w19
+	bl	flash_read_page_en
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	ldr	w5, [x29, 108]
+	beq	.L1630
+	adrp	x0, .LANCHOR60
+	ldr	x0, [x0, #:lo12:.LANCHOR60]
+	ldr	w0, [x0]
+	cmp	w0, w5
+	bne	.L1630
+.L1634:
+	ldr	x0, [x22, #:lo12:.LANCHOR46]
+	ldrh	w1, [x0, 140]
+	cmp	w1, w21
+	bgt	.L1632
+	add	w20, w20, 1
+	strh	w20, [x0, 140]
+	bl	ftl_ext_info_flush
+.L1632:
+	adrp	x0, .LANCHOR60
+	mov	w1, -1
+	ldp	x19, x20, [sp, 16]
+	ldr	x0, [x0, #:lo12:.LANCHOR60]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	str	wzr, [x0, 520]
+	adrp	x0, .LANCHOR87
+	strh	w1, [x0, #:lo12:.LANCHOR87]
+	mov	w0, 0
+	ldp	x29, x30, [sp], 112
+	ret
+.L1630:
+	add	w23, w23, 1
+	b	.L1629
+	.size	ftl_ext_info_init, .-ftl_ext_info_init
+	.section	.text.ftl_low_format,"ax",@progbits
+	.align	2
+	.global	ftl_low_format
+	.type	ftl_low_format, %function
+ftl_low_format:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR75
+	stp	x21, x22, [sp, 32]
+	add	x20, x20, :lo12:.LANCHOR75
+	stp	x23, x24, [sp, 48]
+	adrp	x21, .LANCHOR5
+	mov	x24, x21
+	stp	x25, x26, [sp, 64]
+	mov	w19, 8
+.L1646:
+	ldr	x0, [x21, #:lo12:.LANCHOR5]
+	add	x0, x0, x19, sxtw
+	ldrb	w0, [x0, 32]
+	add	w1, w0, 127
+	and	w1, w1, 255
+	cmp	w1, 125
+	bhi	.L1643
+	adrp	x1, .LANCHOR136
+	adrp	x0, .LC0
+	mov	w2, 1228
+	add	x1, x1, :lo12:.LANCHOR136
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1644:
+	b	.L1644
+.L1643:
+	cmp	w0, 255
+	beq	.L1645
+	ldrh	w1, [x20]
+	mul	w1, w1, w0
+	mov	w0, 0
+	bl	flash_erase_block
+.L1645:
+	add	w19, w19, 1
+	cmp	w19, 16
+	bne	.L1646
+	bl	sblk_init
+	adrp	x19, .LANCHOR46
+	bl	ftl_info_blk_init
+	adrp	x20, .LANCHOR54
+	mov	w1, 0
+	mov	w2, 16384
+	adrp	x0, ftl_info_data_buffer
+	add	x0, x0, :lo12:ftl_info_data_buffer
+	bl	ftl_memset
+	add	x25, x20, :lo12:.LANCHOR54
+	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	mov	w1, 21574
+	movk	w1, 0x494c, lsl 16
+	mov	w21, 0
+	mov	w26, 1
+	str	w1, [x0]
+.L1647:
+	ldrh	w0, [x25]
+	adrp	x22, .LANCHOR70
+	adrp	x23, .LANCHOR59
+	cmp	w0, w21
+	bhi	.L1655
+	adrp	x21, .LANCHOR60
+	mov	w1, 0
+	mov	w2, 16384
+	adrp	x0, ftl_ext_info_data_buffer
+	add	x0, x0, :lo12:ftl_ext_info_data_buffer
+	bl	ftl_memset
+	ldr	x0, [x21, #:lo12:.LANCHOR60]
+	mov	w1, 20038
+	movk	w1, 0x4549, lsl 16
+	mov	w3, 3
+	str	w1, [x0]
+	ldr	x0, [x24, #:lo12:.LANCHOR5]
+	ldrb	w5, [x22, #:lo12:.LANCHOR70]
+	ldr	x1, [x23, #:lo12:.LANCHOR59]
+	cmp	w5, 1
+	ldrb	w0, [x0, 47]
+	csinc	w3, w3, wzr, ne
+	and	w3, w3, 255
+	udiv	w0, w0, w5
+	add	w24, w0, 1
+	ubfiz	x0, x0, 2, 8
+	add	x0, x0, 4
+	add	x0, x1, x0
+.L1656:
+	ldrb	w2, [x1, 2]
+	add	x1, x1, 4
+	strb	w3, [x1, -1]
+	orr	w2, w2, -32
+	and	w2, w2, -25
+	strb	w2, [x1, -2]
+	cmp	x1, x0
+	bne	.L1656
+	mov	w4, 16
+	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	sdiv	w4, w4, w5
+	add	w4, w24, w4
+	and	w4, w4, 65535
+	strh	w4, [x0, 134]
+	adrp	x0, .LANCHOR22
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	tbz	x0, 12, .L1657
+	adrp	x0, .LC67
+	mov	w3, w24
+	mov	w2, 128
+	mov	w1, 1265
+	add	x0, x0, :lo12:.LC67
+	bl	printf
+.L1657:
+	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	mov	w2, 128
+	mov	w1, 255
+	add	x0, x0, 160
+	bl	ftl_memset
+	ldrb	w11, [x22, #:lo12:.LANCHOR70]
+	adrp	x0, .LANCHOR76
+	adrp	x22, .LANCHOR71
+	ldr	x3, [x19, #:lo12:.LANCHOR46]
+	and	w13, w11, 65535
+	ldrb	w12, [x0, #:lo12:.LANCHOR76]
+	ldrh	w0, [x22, #:lo12:.LANCHOR71]
+	mov	w5, 21
+	ldr	x2, [x23, #:lo12:.LANCHOR59]
+	mov	w4, 0
+	sub	w0, w5, w0
+	mul	w1, w24, w13
+	mov	w5, 1
+	ldrh	w7, [x3, 134]
+	lsl	w5, w5, w0
+	and	w1, w1, 65535
+	and	w5, w5, 65535
+.L1658:
+	cmp	w24, w7
+	bcc	.L1664
+	ldrh	w5, [x20, #:lo12:.LANCHOR54]
+	add	x0, x2, x7, uxth 2
+	mov	w1, w7
+	mov	w6, 1
+.L1665:
+	cmp	w1, w5
+	bcc	.L1666
+	sub	w5, w5, w7
+	strh	w4, [x3, 112]
+	strh	w5, [x3, 116]
+	mov	w0, 1
+	strh	wzr, [x3, 114]
+	strh	wzr, [x3, 118]
+	bl	ftl_alloc_sblk
+	mov	w23, w0
+	mov	w1, 0
+	bl	ftl_erase_sblk
+	ldr	x1, [x19, #:lo12:.LANCHOR46]
+	mov	w0, w23
+	add	x1, x1, 672
+	bl	ftl_get_blk_list_in_sblk
+	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	mov	w1, 65533
+	ldrh	w20, [x0, 672]
+	strh	wzr, [x0, 690]
+	sub	w2, w20, #1
+	cmp	w1, w2, uxth
+	bcs	.L1667
+	adrp	x1, .LANCHOR136
+	adrp	x0, .LC0
+	mov	w2, 1297
+	add	x1, x1, :lo12:.LANCHOR136
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1668:
+	b	.L1668
+.L1655:
+	adrp	x0, .LANCHOR53
+	strh	w21, [x0, #:lo12:.LANCHOR53]
+	mov	w0, w21
+	bl	ftl_test_block
+	ldrb	w11, [x22, #:lo12:.LANCHOR70]
+	adrp	x0, .LANCHOR76
+	ldr	x6, [x23, #:lo12:.LANCHOR59]
+	mov	w8, 0
+	ldrb	w13, [x0, #:lo12:.LANCHOR76]
+	mov	w7, 1
+	mov	w10, 0
+	mul	w12, w21, w11
+	add	x6, x6, x21, uxth 2
+	add	w13, w13, 1
+.L1648:
+	cmp	w7, w13
+	beq	.L1652
+	add	w15, w11, w8
+	sub	w14, w7, #1
+	b	.L1653
+.L1651:
+	add	w1, w8, w12
+	mov	w0, w14
+	bl	flash_check_bad_block
+	cbz	w0, .L1649
+	ldrb	w1, [x6, 3]
+	lsl	w0, w26, w8
+	orr	w0, w0, w1
+	strb	w0, [x6, 3]
+.L1650:
+	add	w8, w8, 1
+.L1653:
+	cmp	w8, w15
+	bne	.L1651
+	add	w7, w7, 1
+	sub	w12, w12, w11
+	and	w7, w7, 65535
+	b	.L1648
+.L1649:
+	add	w10, w10, 1
+	and	w10, w10, 65535
+	b	.L1650
+.L1652:
+	cbnz	w10, .L1654
+	ldrb	w0, [x6, 2]
+	orr	w0, w0, -32
+	strb	w0, [x6, 2]
+.L1654:
+	add	w21, w21, 1
+	and	w21, w21, 65535
+	b	.L1647
+.L1664:
+	add	x14, x2, x24, uxth 2
+	mov	w15, 0
+	mov	w16, 0
+	mov	w6, 0
+	ldrb	w0, [x14, 2]
+	orr	w0, w0, -32
+	and	w0, w0, -25
+	strb	w0, [x14, 2]
+.L1659:
+	cmp	w6, w12
+	bcc	.L1670
+	add	w24, w24, 1
+	add	w1, w13, w1
+	and	w24, w24, 65535
+	and	w1, w1, 65535
+	b	.L1658
+.L1662:
+	ldrb	w10, [x14, 3]
+	add	w17, w16, w8
+	asr	w10, w10, w17
+	tbnz	x10, 0, .L1660
+	cmp	w11, 1
+	bls	.L1669
+	and	w0, w0, 1
+	add	w0, w1, w0
+	and	w0, w0, 65535
+.L1661:
+	add	x10, x3, x4, sxtw 1
+	add	w4, w4, 1
+	and	w4, w4, 65535
+	add	w0, w0, w15
+	strh	w0, [x10, 160]
+.L1660:
+	add	x8, x8, 1
+.L1663:
+	and	w0, w8, 65535
+	cmp	w0, w13
+	bcc	.L1662
+	add	w6, w6, 1
+	add	w0, w5, w15
+	and	w6, w6, 65535
+	add	w16, w16, w11
+	and	w15, w0, 65535
+	b	.L1659
+.L1669:
+	mov	w0, w1
+	b	.L1661
+.L1670:
+	mov	x8, 0
+	b	.L1663
+.L1666:
+	ldrb	w2, [x0, 2]
+	add	w1, w1, 1
+	and	w1, w1, 65535
+	add	x0, x0, 4
+	and	w2, w2, 31
+	bfi	w2, w6, 3, 2
+	strb	w2, [x0, -2]
+	b	.L1665
+.L1667:
+	strh	wzr, [x0, 696]
+	mov	w2, 256
+	mov	w1, 255
+	add	x0, x0, 416
+	bl	ftl_memset
+	ldrh	w2, [x22, #:lo12:.LANCHOR71]
+	mov	w1, 21
+	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	sub	w1, w1, w2
+	asr	w1, w20, w1
+	strh	w1, [x0, 694]
+	mov	w1, 1
+	strh	w1, [x0, 688]
+	adrp	x1, .LANCHOR137
+	strh	w20, [x0, 692]
+	ldrh	w1, [x1, #:lo12:.LANCHOR137]
+	strh	w23, [x0, 416]
+	strh	w1, [x0, 698]
+	bl	ftl_alloc_sys_blk
+	mov	w20, w0
+	mov	w1, 0
+	bl	ftl_erase_phy_blk
+	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	mov	w1, 2
+	strh	w20, [x0, 130]
+	ldr	x0, [x21, #:lo12:.LANCHOR60]
+	add	x0, x0, 16
+	bl	ftl_open_sblk_init
+	ldr	x0, [x21, #:lo12:.LANCHOR60]
+	mov	w1, 3
+	add	x0, x0, 48
+	bl	ftl_open_sblk_init
+	ldr	x1, [x19, #:lo12:.LANCHOR46]
+	ldr	x0, [x21, #:lo12:.LANCHOR60]
+	add	x0, x0, 136
+	ldrh	w2, [x1, 134]
+	strh	w2, [x0, -10]
+	mov	w2, -1
+	strh	wzr, [x0, -12]
+	strh	w2, [x0, -56]
+	strh	w2, [x0, -6]
+	mov	w2, -1
+	strh	wzr, [x0, -16]
+	str	w2, [x0, 408]
+	strh	wzr, [x0, -14]
+	strh	w2, [x1, 126]
+	mov	w2, 256
+	mov	w1, 255
+	bl	ftl_memset
+	ldr	x0, [x21, #:lo12:.LANCHOR60]
+	mov	w2, 128
+	mov	w1, 255
+	add	x0, x0, 392
+	bl	ftl_memset
+	bl	ftl_ext_info_flush
+	mov	w0, 0
+	bl	ftl_info_flush
+	bl	ftl_info_blk_init
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+	.size	ftl_low_format, .-ftl_low_format
+	.section	.text.ftl_re_low_format_test,"ax",@progbits
+	.align	2
+	.global	ftl_re_low_format_test
+	.type	ftl_re_low_format_test, %function
+ftl_re_low_format_test:
+	stp	x29, x30, [sp, -48]!
+	mov	w1, 1
+	adrp	x0, .LC68
+	add	x0, x0, :lo12:.LC68
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR46
+	stp	x21, x22, [sp, 32]
+	bl	printf
+	bl	sblk_init
+	adrp	x21, .LANCHOR54
+	bl	ftl_info_blk_init
+	bl	ftl_ext_info_init
+	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	adrp	x2, .LANCHOR59
+	ldrh	w7, [x21, #:lo12:.LANCHOR54]
+	mov	w3, 0
+	ldr	x2, [x2, #:lo12:.LANCHOR59]
+	mov	w4, 0
+	mov	w5, 0
+	ldrh	w1, [x0, 134]
+	add	x2, x2, x1, uxth 2
+.L1681:
+	cmp	w1, w7
+	bcc	.L1685
+	strh	w5, [x0, 114]
+	strh	w4, [x0, 118]
+	strh	w3, [x0, 116]
+	strh	wzr, [x0, 122]
+	strh	wzr, [x0, 120]
+	strh	wzr, [x0, 124]
+	mov	w0, 1
+	bl	ftl_alloc_sblk
+	mov	w22, w0
+	mov	w1, 0
+	bl	ftl_erase_sblk
+	ldr	x1, [x19, #:lo12:.LANCHOR46]
+	mov	w0, w22
+	add	x1, x1, 672
+	bl	ftl_get_blk_list_in_sblk
+	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	mov	w1, 65533
+	ldrh	w20, [x0, 672]
+	strh	wzr, [x0, 690]
+	sub	w2, w20, #1
+	cmp	w1, w2, uxth
+	bcs	.L1686
+	adrp	x1, .LANCHOR138
+	adrp	x0, .LC0
+	mov	w2, 1366
+	add	x1, x1, :lo12:.LANCHOR138
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1687:
+	b	.L1687
+.L1685:
+	ldrb	w6, [x2, 2]
+	and	w8, w6, 31
+	strb	w8, [x2, 2]
+	ands	w6, w6, 24
+	bne	.L1682
+	add	w5, w5, 1
+	and	w5, w5, 65535
+.L1683:
+	add	w1, w1, 1
+	add	x2, x2, 4
+	and	w1, w1, 65535
+	b	.L1681
+.L1682:
+	cmp	w6, 16
+	bne	.L1684
+	add	w4, w4, 1
+	and	w4, w4, 65535
+	b	.L1683
+.L1684:
+	add	w3, w3, 1
+	and	w3, w3, 65535
+	b	.L1683
+.L1686:
+	strh	wzr, [x0, 696]
+	mov	w2, 256
+	mov	w1, 255
+	add	x0, x0, 416
+	bl	ftl_memset
+	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	mov	w2, 4096
+	mov	w1, 0
+	add	x0, x0, 704
+	bl	ftl_memset
+	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	lsr	w1, w20, 14
+	and	w20, w20, 16383
+	ldrh	w2, [x21, #:lo12:.LANCHOR54]
+	strh	w1, [x0, 694]
+	mov	w1, 1
+	strh	w1, [x0, 688]
+	adrp	x1, .LANCHOR137
+	strh	w20, [x0, 692]
+	adrp	x20, .LANCHOR60
+	ldrh	w1, [x1, #:lo12:.LANCHOR137]
+	lsl	w2, w2, 1
+	strh	w22, [x0, 416]
+	strh	w1, [x0, 698]
+	adrp	x0, .LANCHOR56
+	mov	w1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR56]
+	bl	ftl_memset
+	ldr	x0, [x20, #:lo12:.LANCHOR60]
+	mov	w1, 2
+	add	x0, x0, 16
+	bl	ftl_open_sblk_init
+	ldr	x0, [x20, #:lo12:.LANCHOR60]
+	mov	w1, 3
+	add	x0, x0, 48
+	bl	ftl_open_sblk_init
+	ldr	x1, [x19, #:lo12:.LANCHOR46]
+	ldr	x0, [x20, #:lo12:.LANCHOR60]
+	add	x0, x0, 136
+	ldrh	w2, [x1, 134]
+	strh	w2, [x0, -10]
+	mov	w2, -1
+	strh	wzr, [x0, -12]
+	strh	w2, [x0, -56]
+	strh	w2, [x0, -6]
+	mov	w2, -1
+	strh	wzr, [x0, -16]
+	str	w2, [x0, 408]
+	strh	wzr, [x0, -14]
+	strh	w2, [x1, 126]
+	mov	w2, 256
+	mov	w1, 255
+	bl	ftl_memset
+	ldr	x0, [x20, #:lo12:.LANCHOR60]
+	mov	w2, 128
+	mov	w1, 255
+	add	x0, x0, 392
+	bl	ftl_memset
+	ldr	x0, [x20, #:lo12:.LANCHOR60]
+	str	wzr, [x0, 520]
+	str	wzr, [x0, 524]
+	str	wzr, [x0, 528]
+	bl	ftl_ext_info_flush
+	mov	w0, 0
+	bl	ftl_info_flush
+	bl	ftl_info_blk_init
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
+	.size	ftl_re_low_format_test, .-ftl_re_low_format_test
+	.section	.text.ftl_prog_ppa_page,"ax",@progbits
+	.align	2
+	.global	ftl_prog_ppa_page
+	.type	ftl_prog_ppa_page, %function
+ftl_prog_ppa_page:
+	ubfx	x5, x0, 21, 3
+	mov	w4, w3
+	mov	x3, x2
+	mov	x2, x1
+	and	w1, w0, 2097151
+	mov	w0, w5
+	b	ftl_prog_page
+	.size	ftl_prog_ppa_page, .-ftl_prog_ppa_page
+	.section	.text.ftl_write_last_log_page,"ax",@progbits
+	.align	2
+	.global	ftl_write_last_log_page
+	.type	ftl_write_last_log_page, %function
+ftl_write_last_log_page:
+	ldrh	w1, [x0, 6]
+	cmp	w1, 1
+	bne	.L1692
+	stp	x29, x30, [sp, -48]!
+	adrp	x1, .LANCHOR82
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	stp	x21, x22, [sp, 32]
+	ldr	x20, [x1, #:lo12:.LANCHOR82]
+	ldrh	w22, [x0, 12]
+	bl	ftl_get_new_free_page
+	mov	w21, w0
+	cmn	w0, #1
+	beq	.L1693
+	ldrh	w0, [x19]
+	add	x20, x20, x22, uxth 2
+	bl	ftl_vpn_decrement
+	adrp	x0, .LANCHOR121
+	mov	w1, 15555
+	add	x6, x0, :lo12:.LANCHOR121
+	movk	w1, 0xf55f, lsl 16
+	str	w1, [x0, #:lo12:.LANCHOR121]
+	adrp	x0, .LANCHOR79
+	ldrh	w1, [x0, #:lo12:.LANCHOR79]
+	adrp	x0, .LANCHOR69
+	ldrb	w0, [x0, #:lo12:.LANCHOR69]
+	mul	w1, w1, w0
+	mov	x0, x20
+	lsl	w1, w1, 2
+	bl	js_hash
+	str	w0, [x6, 4]
+	adrp	x0, .LANCHOR45
+	mov	x2, x6
+	mov	x1, x20
+	ldrb	w3, [x0, #:lo12:.LANCHOR45]
+	mov	w0, w21
+	bl	ftl_prog_ppa_page
+.L1693:
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
+.L1692:
+	mov	w0, -1
+	ret
+	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
+	.section	.text.ftl_open_sblk_recovery,"ax",@progbits
+	.align	2
+	.global	ftl_open_sblk_recovery
+	.type	ftl_open_sblk_recovery, %function
+ftl_open_sblk_recovery:
+	sub	sp, sp, #176
+	stp	x29, x30, [sp, 48]
+	add	x29, sp, 48
+	stp	x21, x22, [sp, 80]
+	adrp	x22, .LANCHOR22
+	stp	x27, x28, [sp, 128]
+	mov	x28, x0
+	ldr	w0, [x22, #:lo12:.LANCHOR22]
+	stp	x25, x26, [sp, 112]
+	mov	x25, x1
+	stp	x19, x20, [sp, 64]
+	stp	x23, x24, [sp, 96]
+	tbz	x0, 12, .L1699
+	ldrh	w1, [x28, 2]
+	adrp	x0, .LC69
+	add	x0, x0, :lo12:.LC69
+	bl	printf
+.L1699:
+	ldr	w0, [x22, #:lo12:.LANCHOR22]
+	tbz	x0, 12, .L1700
+	ldrb	w1, [x28, 5]
+	adrp	x0, .LC70
+	add	x0, x0, :lo12:.LC70
+	bl	printf
+.L1700:
+	ldr	w0, [x22, #:lo12:.LANCHOR22]
+	tbz	x0, 12, .L1701
+	ldrh	w1, [x28]
+	adrp	x0, .LC71
+	add	x0, x0, :lo12:.LC71
+	bl	printf
+.L1701:
+	ldr	w0, [x22, #:lo12:.LANCHOR22]
+	tbz	x0, 12, .L1702
+	ldrh	w2, [x28, 18]
+	adrp	x0, .LC72
+	ldrh	w1, [x28, 16]
+	add	x0, x0, :lo12:.LC72
+	bl	printf
+.L1702:
+	ldrh	w0, [x28, 10]
+	adrp	x26, .LANCHOR45
+	strh	w0, [x28, 14]
+	mov	w27, 0
+	mov	w0, 1
+	adrp	x23, .LANCHOR79
+	bl	buf_alloc
+	ldrb	w20, [x28, 5]
+	ldrh	w21, [x28, 2]
+	mov	x19, x0
+	add	x0, x26, :lo12:.LANCHOR45
+	str	x0, [x29, 120]
+.L1703:
+	ldrh	w0, [x23, #:lo12:.LANCHOR79]
+	cmp	w0, w21
+	bhi	.L1718
+.L1706:
+	strh	w21, [x28, 2]
+	adrp	x21, .LANCHOR82
+	strb	w20, [x28, 5]
+	mov	w0, 0
+	ldrh	w3, [x28, 10]
+	mov	w1, 0
+	ldr	x4, [x21, #:lo12:.LANCHOR82]
+.L1719:
+	cmp	w1, w3
+	bcc	.L1721
+	ldrb	w20, [x28, 9]
+	adrp	x24, .LANCHOR56
+	ldrh	w1, [x23, #:lo12:.LANCHOR79]
+	madd	w20, w20, w1, w0
+	ldr	w0, [x22, #:lo12:.LANCHOR22]
+	sub	w20, w20, w3
+	and	w20, w20, 65535
+	tbz	x0, 12, .L1722
+	ldrh	w1, [x28]
+	ldr	x2, [x24, #:lo12:.LANCHOR56]
+	ubfiz	x0, x1, 1, 16
+	ldrh	w3, [x2, x0]
+	adrp	x0, .LC74
+	mov	w2, w20
+	add	x0, x0, :lo12:.LC74
+	bl	printf
+.L1722:
+	ldr	x0, [x24, #:lo12:.LANCHOR56]
+	adrp	x25, .LANCHOR45
+	ldrh	w1, [x28]
+	adrp	x24, .LANCHOR69
+	adrp	x26, .LC75
+	add	x24, x24, :lo12:.LANCHOR69
+	add	x25, x25, :lo12:.LANCHOR45
+	add	x26, x26, :lo12:.LC75
+	strh	w20, [x0, x1, lsl 1]
+	mov	w20, 0
+	mov	x0, x19
+	bl	buf_free
+.L1723:
+	ldrb	w0, [x24]
+	cmp	w20, w0, lsl 1
+	bcc	.L1726
+	ldrh	w1, [x28, 12]
+	ldrh	w0, [x23, #:lo12:.LANCHOR79]
+	ldrb	w2, [x28, 9]
+	madd	w0, w0, w2, w1
+	mov	x1, -4
+	add	x0, x1, x0, sxtw 2
+	ldr	x1, [x21, #:lo12:.LANCHOR82]
+	ldr	w0, [x1, x0]
+	cmn	w0, #1
+	beq	.L1727
+	adrp	x1, .LANCHOR139
+	adrp	x0, .LC0
+	mov	w2, 811
+	add	x1, x1, :lo12:.LANCHOR139
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1728:
+	b	.L1728
+.L1718:
+	ldrb	w20, [x28, 5]
+	adrp	x24, .LANCHOR75
+	add	x24, x24, :lo12:.LANCHOR75
+.L1704:
+	ldrb	w0, [x28, 9]
+	cmp	w0, w20
+	bhi	.L1717
+	add	w21, w21, 1
+	strb	wzr, [x28, 5]
+	and	w21, w21, 65535
+	b	.L1703
+.L1717:
+	add	x0, x28, x20, sxtw 1
+	ldrh	w12, [x0, 16]
+	mov	w0, 65535
+	cmp	w12, w0
+	beq	.L1705
+	ldrh	w10, [x24]
+	ldrb	w3, [x26, #:lo12:.LANCHOR45]
+	ldr	x1, [x19, 8]
+	ldr	x2, [x19, 24]
+	madd	w10, w10, w12, w21
+	stp	w12, w10, [x29, 108]
+	mov	w0, w10
+	bl	ftl_read_ppa_page
+	mov	w11, w0
+	cmp	w0, 512
+	beq	.L1706
+	ldr	w0, [x22, #:lo12:.LANCHOR22]
+	ldp	w12, w10, [x29, 108]
+	tbz	x0, 12, .L1707
+	ldr	x1, [x19, 24]
+	mov	w4, w11
+	ldr	x0, [x19, 8]
+	mov	w3, w10
+	str	w11, [x29, 112]
+	ldr	w2, [x1, 12]
+	str	w2, [sp, 32]
+	ldr	w2, [x1, 8]
+	str	w2, [sp, 24]
+	ldr	w2, [x1, 4]
+	str	w2, [sp, 16]
+	mov	w2, w21
+	ldr	w1, [x1]
+	str	w1, [sp, 8]
+	ldr	w1, [x0, 12]
+	str	w1, [sp]
+	mov	w1, w12
+	ldp	w5, w6, [x0]
+	ldr	w7, [x0, 8]
+	adrp	x0, .LC73
+	add	x0, x0, :lo12:.LC73
+	bl	printf
+	ldr	w11, [x29, 112]
+.L1707:
+	ldrb	w2, [x28, 9]
+	adrp	x0, .LANCHOR133
+	mov	w1, 1
+	strb	w1, [x0, #:lo12:.LANCHOR133]
+	ldrh	w0, [x28, 10]
+	madd	w1, w21, w2, w20
+	cmp	w0, w1
+	beq	.L1708
+	adrp	x1, .LANCHOR139
+	adrp	x0, .LC0
+	mov	w2, 707
+	add	x1, x1, :lo12:.LANCHOR139
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1709:
+	b	.L1709
+.L1708:
+	ldrh	w1, [x28, 6]
+	add	w1, w1, w0
+	ldrh	w0, [x23, #:lo12:.LANCHOR79]
+	mul	w0, w0, w2
+	cmp	w1, w0
+	beq	.L1710
+	adrp	x1, .LANCHOR139
+	adrp	x0, .LC0
+	mov	w2, 708
+	add	x1, x1, :lo12:.LANCHOR139
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1711:
+	b	.L1711
+.L1710:
+	cmn	w11, #1
+	beq	.L1713
+	ldr	x5, [x19, 24]
+	str	x5, [x29, 112]
+	ldr	w0, [x5, 4]
+	cmn	w0, #1
+	beq	.L1713
+	bl	lpa_hash_get_ppa
+	cbz	x25, .L1715
+	ldr	x5, [x29, 112]
+	ldr	w1, [x5, 8]
+	cmp	w0, w1
+	beq	.L1715
+	cmn	w0, #1
+	beq	.L1715
+	adrp	x3, .LANCHOR71
+	mov	w1, 21
+	adrp	x27, .LANCHOR70
+	ldrh	w6, [x3, #:lo12:.LANCHOR71]
+	sub	w4, w1, w6
+	mov	w1, 1
+	lsr	w2, w0, w6
+	lsl	w1, w1, w4
+	sub	w1, w1, #1
+	and	w1, w1, w2
+	ldrb	w2, [x27, #:lo12:.LANCHOR70]
+	mov	x4, x3
+	udiv	w1, w1, w2
+	ldrh	w2, [x25]
+	cmp	w2, w1, uxth
+	bne	.L1715
+	ldr	x1, [x29, 120]
+	ldr	w6, [x5]
+	adrp	x5, .LANCHOR130
+	str	w6, [x29, 108]
+	add	x2, x5, :lo12:.LANCHOR130
+	str	x5, [x29, 112]
+	ldrb	w3, [x1]
+	ldr	x1, [x19, 8]
+	str	x4, [x29, 96]
+	bl	ftl_read_ppa_page
+	ldr	x5, [x29, 112]
+	ldr	w6, [x29, 108]
+	ldr	w0, [x5, #:lo12:.LANCHOR130]
+	cmp	w6, w0
+	bhi	.L1715
+	ldr	x0, [x19, 24]
+	ldr	w1, [x0, 8]
+	cmn	w1, #1
+	beq	.L1713
+	ldr	x4, [x29, 96]
+	mov	w0, 21
+	ldrh	w3, [x4, #:lo12:.LANCHOR71]
+	sub	w2, w0, w3
+	mov	w0, 1
+	lsr	w1, w1, w3
+	lsl	w0, w0, w2
+	sub	w0, w0, #1
+	and	w0, w0, w1
+	ldrb	w1, [x27, #:lo12:.LANCHOR70]
+	udiv	w0, w0, w1
+	bl	ftl_vpn_decrement
+.L1713:
+	ldrh	w0, [x28, 6]
+	mov	w27, 1
+	sub	w0, w0, #1
+	strh	w0, [x28, 6]
+	ldrh	w0, [x28, 10]
+	add	w0, w0, 1
+	strh	w0, [x28, 10]
+.L1705:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L1704
+.L1721:
+	ldrh	w2, [x28, 12]
+	add	w2, w2, w1
+	ldr	w2, [x4, x2, lsl 2]
+	cmn	w2, #1
+	beq	.L1720
+	add	w20, w0, 1
+	and	w0, w20, 65535
+.L1720:
+	add	w1, w1, 1
+	b	.L1719
+.L1726:
+	cbz	w27, .L1724
+	ldrh	w0, [x28, 6]
+	cmp	w0, 1
+	bls	.L1724
+	mov	x0, x28
+	bl	ftl_get_new_free_page
+	mov	w4, w0
+	ldr	w0, [x22, #:lo12:.LANCHOR22]
+	tbz	x0, 12, .L1725
+	mov	w1, w4
+	str	w4, [x29, 120]
+	mov	x0, x26
+	bl	printf
+	ldr	w4, [x29, 120]
+.L1725:
+	adrp	x0, .LANCHOR46
+	ldr	x2, [x19, 24]
+	ldr	x1, [x19, 8]
+	ldr	x0, [x0, #:lo12:.LANCHOR46]
+	ldr	w0, [x0, 8]
+	str	w0, [x2]
+	str	wzr, [x2, 12]
+	mov	w0, -1
+	stp	w0, w0, [x2, 4]
+	mov	w0, w4
+	str	wzr, [x1]
+	ldrb	w3, [x25]
+	bl	ftl_prog_ppa_page
+	ldrh	w0, [x28]
+	bl	ftl_vpn_decrement
+.L1724:
+	add	w20, w20, 1
+	b	.L1723
+.L1727:
+	ldrh	w0, [x28, 6]
+	cmp	w0, 1
+	bne	.L1698
+	ldp	x19, x20, [sp, 64]
+	mov	x0, x28
+	ldp	x21, x22, [sp, 80]
+	ldp	x23, x24, [sp, 96]
+	ldp	x25, x26, [sp, 112]
+	ldp	x27, x28, [sp, 128]
+	ldp	x29, x30, [sp, 48]
+	add	sp, sp, 176
+	b	ftl_write_last_log_page
+.L1715:
+	ldr	x3, [x19, 24]
+	adrp	x0, .LANCHOR47
+	ldr	w0, [x0, #:lo12:.LANCHOR47]
+	ldr	w1, [x3, 4]
+	cmp	w1, w0
+	bcs	.L1713
+	ldrb	w0, [x28, 9]
+	ldrh	w1, [x23, #:lo12:.LANCHOR79]
+	ldrh	w2, [x28, 10]
+	mul	w0, w0, w1
+	sub	w0, w0, #1
+	cmp	w2, w0
+	bge	.L1713
+	adrp	x0, .LANCHOR46
+	ldr	w1, [x3]
+	ldr	x0, [x0, #:lo12:.LANCHOR46]
+	ldr	w4, [x0, 8]
+	cmp	w1, w4
+	bls	.L1716
+	str	w1, [x0, 8]
+.L1716:
+	ldrh	w0, [x28, 12]
+	add	w2, w2, w0
+	ldp	w0, w1, [x3, 4]
+	bl	lpa_hash_update_ppa
+	b	.L1713
+.L1698:
+	ldp	x19, x20, [sp, 64]
+	ldp	x21, x22, [sp, 80]
+	ldp	x23, x24, [sp, 96]
+	ldp	x25, x26, [sp, 112]
+	ldp	x27, x28, [sp, 128]
+	ldp	x29, x30, [sp, 48]
+	add	sp, sp, 176
+	ret
+	.size	ftl_open_sblk_recovery, .-ftl_open_sblk_recovery
+	.section	.text.pm_write_page,"ax",@progbits
+	.align	2
+	.global	pm_write_page
+	.type	pm_write_page, %function
+pm_write_page:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR79
+	stp	x21, x22, [sp, 32]
+	mov	w19, w0
+	stp	x23, x24, [sp, 48]
+	adrp	x22, .LANCHOR46
+	mov	x24, x1
+	add	x20, x20, :lo12:.LANCHOR79
+	mov	x21, x22
+	stp	x25, x26, [sp, 64]
+	mov	w23, 65535
+	str	x27, [sp, 80]
+.L1772:
+	adrp	x25, .LANCHOR75
+.L1777:
+	ldr	x0, [x22, #:lo12:.LANCHOR46]
+	ldr	w1, [x0, 48]
+	ldrh	w2, [x0, 696]
+	add	w1, w1, 1
+	str	w1, [x0, 48]
+	ldrh	w1, [x20]
+	cmp	w2, w1
+	bcs	.L1773
+	ldrh	w0, [x0, 692]
+	cmp	w0, w23
+	bne	.L1774
+.L1773:
+	bl	pm_alloc_new_blk
+	mov	w0, 0
+	bl	ftl_info_flush
+.L1774:
+	ldr	x1, [x21, #:lo12:.LANCHOR46]
+	ldrh	w0, [x1, 692]
+	cmp	w0, w23
+	bne	.L1775
+	adrp	x1, .LANCHOR140
+	adrp	x0, .LC0
+	mov	w2, 224
+	add	x1, x1, :lo12:.LANCHOR140
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1776:
+	b	.L1776
+.L1775:
+	ldrh	w1, [x1, 696]
+	adrp	x27, .LANCHOR141
+	ldrh	w26, [x25, #:lo12:.LANCHOR75]
+	mov	w2, 64
+	madd	w26, w26, w0, w1
+	ldr	x0, [x27, #:lo12:.LANCHOR141]
+	mov	w1, 0
+	bl	ftl_memset
+	ldr	x3, [x27, #:lo12:.LANCHOR141]
+	mov	x2, x24
+	ldr	x0, [x21, #:lo12:.LANCHOR46]
+	str	w19, [x3]
+	ldr	w1, [x0, 48]
+	ldrb	w0, [x0, 694]
+	str	w1, [x3, 4]
+	adrp	x1, .LANCHOR45
+	ldrb	w4, [x1, #:lo12:.LANCHOR45]
+	mov	w1, w26
+	bl	ftl_prog_page
+	ldr	x2, [x21, #:lo12:.LANCHOR46]
+	ldrh	w1, [x2, 696]
+	add	w1, w1, 1
+	and	w1, w1, 65535
+	strh	w1, [x2, 696]
+	cmp	w1, 1
+	beq	.L1777
+	cmn	w0, #1
+	bne	.L1778
+	mov	w1, w26
+	adrp	x0, .LC76
+	add	x0, x0, :lo12:.LC76
+	bl	printf
+	b	.L1772
+.L1778:
+	ldrh	w0, [x2, 698]
+	cmp	w19, w0
+	bcs	.L1779
+	add	x19, x2, x19, uxtw 2
+	str	w26, [x19, 704]
+.L1779:
+	mov	w0, 0
+	ldr	x27, [sp, 80]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	ret
+	.size	pm_write_page, .-pm_write_page
+	.section	.text.flash_info_flush,"ax",@progbits
+	.align	2
+	.global	flash_info_flush
+	.type	flash_info_flush, %function
+flash_info_flush:
+	stp	x29, x30, [sp, -112]!
+	mov	w2, 64
+	mov	w1, 0
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR116
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR5
+	ldr	x0, [x23, #:lo12:.LANCHOR116]
+	adrp	x24, .LC78
+	stp	x21, x22, [sp, 32]
+	add	x24, x24, :lo12:.LC78
+	stp	x25, x26, [sp, 64]
+	adrp	x21, .LANCHOR117
+	stp	x27, x28, [sp, 80]
+	adrp	x22, .LANCHOR13
+	bl	ftl_memset
+	adrp	x25, .LANCHOR97
+	ldr	x1, [x20, #:lo12:.LANCHOR5]
+	mov	w3, 16
+	mov	w2, 4
+	adrp	x0, .LC77
+	add	x0, x0, :lo12:.LC77
+	add	x22, x22, :lo12:.LANCHOR13
+	add	x25, x25, :lo12:.LANCHOR97
+	add	x27, x21, :lo12:.LANCHOR117
+	bl	rknand_print_hex
+	mov	w26, 0
+	ldr	x6, [x20, #:lo12:.LANCHOR5]
+	add	x0, x6, 16
+	ldr	w1, [x6, 8]
+	bl	js_hash
+	str	w0, [x6, 12]
+.L1784:
+	add	x28, x21, :lo12:.LANCHOR117
+	ldrb	w4, [x21, #:lo12:.LANCHOR117]
+	ldrh	w19, [x22]
+	mov	x0, x24
+	mov	w1, w4
+	ldrh	w3, [x28, 2]
+	stp	w3, w4, [x29, 104]
+	mov	w2, w3
+	bl	printf
+	ldrh	w0, [x25]
+	ldrh	w1, [x28, 2]
+	sub	w0, w0, #1
+	cmp	w1, w0
+	ldp	w3, w4, [x29, 104]
+	blt	.L1785
+	ldr	x6, [x20, #:lo12:.LANCHOR5]
+	ldrb	w7, [x28, 1]
+	strh	wzr, [x28, 2]
+	ldr	w0, [x6, 4]
+	ldrh	w1, [x6, 16]
+	add	w0, w0, 1
+	str	w0, [x6, 4]
+	ldrb	w0, [x21, #:lo12:.LANCHOR117]
+	add	w1, w1, 1
+	strb	w0, [x28, 1]
+	mov	x0, x6
+	strb	w7, [x21, #:lo12:.LANCHOR117]
+	strh	w1, [x0, 16]!
+	ldr	w1, [x6, 8]
+	bl	js_hash
+	ldrh	w19, [x22]
+	str	w0, [x6, 12]
+	mul	w19, w19, w7
+.L1791:
+	mov	w1, w19
+	mov	w0, 0
+	bl	flash_erase_block
+	b	.L1786
+.L1789:
+	mov	w26, 1
+	b	.L1784
+.L1785:
+	madd	w19, w19, w4, w3
+	cbz	w1, .L1791
+.L1786:
+	ldr	x2, [x20, #:lo12:.LANCHOR5]
+	mov	w1, w19
+	ldr	x3, [x23, #:lo12:.LANCHOR116]
+	mov	w5, 1
+	mov	w4, 4
+	ldr	w0, [x2, 4]
+	str	w0, [x3]
+	mov	w0, 21321
+	movk	w0, 0x5359, lsl 16
+	str	w0, [x3, 4]
+	mov	w0, 0
+	bl	flash_prog_page_en
+	cmn	w0, #1
+	ldrh	w1, [x27, 2]
+	add	w1, w1, 1
+	strh	w1, [x27, 2]
+	bne	.L1787
+	mov	w1, w19
+	adrp	x0, .LC79
+	add	x0, x0, :lo12:.LC79
+	bl	printf
+	b	.L1784
+.L1787:
+	cbz	w26, .L1789
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+	.size	flash_info_flush, .-flash_info_flush
+	.section	.text.nand_flash_init,"ax",@progbits
+	.align	2
+	.global	nand_flash_init
+	.type	nand_flash_init, %function
+nand_flash_init:
+	stp	x29, x30, [sp, -64]!
+	mov	w2, 2
+	adrp	x1, .LANCHOR20
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR26
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR34
+	stp	x23, x24, [sp, 48]
+	adrp	x19, .LANCHOR19
+	strb	w2, [x1, #:lo12:.LANCHOR20]
+	bl	nandc_init
+	add	x8, x20, :lo12:.LANCHOR26
+	add	x0, x19, :lo12:.LANCHOR19
+	mov	x10, x8
+	str	x0, [x21, #:lo12:.LANCHOR34]
+	mov	w7, 0
+	mov	w11, 44
+.L1798:
+	mov	x1, x8
+	mov	w0, w7
+	bl	flash_read_id
+	cbnz	w7, .L1793
+	ldrb	w0, [x10]
+	sub	w0, w0, #1
+	and	w0, w0, 255
+	cmp	w0, 253
+	bls	.L1794
+.L1796:
+	mov	w0, -2
+.L1792:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	ret
+.L1794:
+	ldrb	w0, [x10, 1]
+	cmp	w0, 255
+	beq	.L1796
+.L1793:
+	ldrb	w0, [x8]
+	cmp	w0, 181
+	bne	.L1797
+	strb	w11, [x8]
+.L1797:
+	add	w7, w7, 1
+	add	x8, x8, 8
+	and	w7, w7, 255
+	cmp	w7, 4
+	bne	.L1798
+	adrp	x0, .LANCHOR142
+	add	x8, x0, :lo12:.LANCHOR142
+	add	x8, x8, 1
+	mov	x7, x0
+	add	x12, x20, :lo12:.LANCHOR26
+	mov	x10, 0
+.L1801:
+	ldrb	w2, [x8, -1]
+	mov	w11, w10
+	lsl	x23, x10, 5
+	mov	x1, x12
+	mov	x0, x8
+	bl	flash_mem_cmp8
+	cbnz	w0, .L1799
+	add	x0, x7, :lo12:.LANCHOR142
+	ubfiz	x11, x11, 5, 32
+	add	x23, x0, x23
+	add	x0, x0, x11
+	adrp	x1, .LANCHOR143
+	add	x4, x1, :lo12:.LANCHOR143
+	ldrb	w3, [x0, 22]
+	mov	x0, 0
+.L1800:
+	lsl	x5, x0, 5
+	mov	w2, w0
+	ldrb	w5, [x5, x4]
+	cmp	w5, w3
+	beq	.L1802
+	add	x0, x0, 1
+	cmp	x0, 4
+	bne	.L1800
+	mov	w2, w0
+.L1802:
+	ubfiz	x0, x2, 5, 32
+	add	x1, x1, :lo12:.LANCHOR143
+	add	x1, x1, x0
+	mov	w2, 32
+	adrp	x0, .LANCHOR103
+	add	x22, x19, :lo12:.LANCHOR19
+	add	x0, x0, :lo12:.LANCHOR103
+	bl	ftl_memcpy
+	mov	x1, x23
+	mov	w2, 32
+	mov	x0, x22
+	bl	ftl_memcpy
+	adrp	x1, .LANCHOR7
+	mov	x24, x1
+	ldrb	w0, [x1, #:lo12:.LANCHOR7]
+	cmp	w0, 8
+	bhi	.L1803
+	ldrb	w1, [x22, 20]
+	cmp	w1, 60
+	bls	.L1804
+	mov	w1, 60
+	strb	w1, [x22, 20]
+.L1804:
+	cmp	w0, 8
+	bne	.L1803
+	ldrb	w0, [x20, #:lo12:.LANCHOR26]
+	cmp	w0, 44
+	bne	.L1803
+	add	x0, x19, :lo12:.LANCHOR19
+	ldrb	w1, [x0, 28]
+	cmp	w1, 2
+	bne	.L1803
+	strb	wzr, [x0, 28]
+.L1803:
+	mov	w0, 16384
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR119
+	adrp	x23, .LANCHOR5
+	add	x20, x19, :lo12:.LANCHOR19
+	adrp	x22, .LANCHOR25
+	str	x0, [x1, #:lo12:.LANCHOR119]
+	mov	w0, 16384
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR111
+	str	x0, [x1, #:lo12:.LANCHOR111]
+	mov	w0, 2048
+	bl	ftl_malloc
+	str	x0, [x23, #:lo12:.LANCHOR5]
+	mov	w0, 64
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR118
+	str	x0, [x1, #:lo12:.LANCHOR118]
+	mov	w0, 64
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR112
+	str	x0, [x1, #:lo12:.LANCHOR112]
+	mov	w0, 64
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR116
+	str	x0, [x1, #:lo12:.LANCHOR116]
+	adrp	x0, .LANCHOR123
+	strb	wzr, [x0, #:lo12:.LANCHOR123]
+	bl	flash_die_info_init
+	ldrb	w0, [x20, 18]
+	bl	flash_lsb_page_tbl_build
+	ldrb	w0, [x20, 20]
+	adrp	x20, .LANCHOR115
+	bl	nandc_bch_sel
+	str	xzr, [x20, #:lo12:.LANCHOR115]
+	ldr	x1, [x21, #:lo12:.LANCHOR34]
+	mov	x21, x23
+	ldrh	w0, [x1, 16]
+	lsr	w3, w0, 8
+	ubfx	x4, x0, 3, 1
+	and	w2, w3, 7
+	strb	w2, [x22, #:lo12:.LANCHOR25]
+	adrp	x2, .LANCHOR144
+	strb	w4, [x2, #:lo12:.LANCHOR144]
+	adrp	x2, .LANCHOR23
+	ubfx	x4, x0, 4, 1
+	strb	w4, [x2, #:lo12:.LANCHOR23]
+	adrp	x2, .LANCHOR66
+	ubfx	x4, x0, 12, 1
+	strb	w4, [x2, #:lo12:.LANCHOR66]
+	adrp	x2, .LANCHOR74
+	ubfx	x4, x0, 13, 1
+	ubfx	x0, x0, 14, 1
+	strb	w4, [x2, #:lo12:.LANCHOR74]
+	adrp	x2, .LANCHOR12
+	strb	w0, [x2, #:lo12:.LANCHOR12]
+	mov	w2, 60
+	ldrb	w0, [x1, 28]
+	adrp	x1, .LANCHOR11
+	strb	w0, [x1, #:lo12:.LANCHOR11]
+	adrp	x1, .LANCHOR145
+	strb	w2, [x1, #:lo12:.LANCHOR145]
+	ldrb	w2, [x24, #:lo12:.LANCHOR7]
+	cmp	w2, 9
+	bne	.L1805
+	mov	w2, 70
+	strb	w2, [x1, #:lo12:.LANCHOR145]
+.L1805:
+	add	x19, x19, :lo12:.LANCHOR19
+	adrp	x1, .LANCHOR146
+	adrp	x23, .LANCHOR2
+	strb	w0, [x1, #:lo12:.LANCHOR146]
+	ldrh	w1, [x19, 16]
+	ldrb	w0, [x19, 19]
+	strb	w0, [x23, #:lo12:.LANCHOR2]
+	tbz	x1, 6, .L1807
+	sub	w1, w0, #17
+	and	w1, w1, 255
+	cmp	w1, 2
+	bhi	.L1808
+	adrp	x1, micron_read_retrial
+	add	x1, x1, :lo12:micron_read_retrial
+	str	x1, [x20, #:lo12:.LANCHOR115]
+	cmp	w0, 19
+	adrp	x0, .LANCHOR113
+	beq	.L1809
+	mov	w1, 7
+.L1836:
+	strb	w1, [x0, #:lo12:.LANCHOR113]
+	b	.L1807
+.L1799:
+	add	x10, x10, 1
+	add	x8, x8, 32
+	cmp	x10, 24
+	bne	.L1801
+	b	.L1796
+.L1809:
+	mov	w1, 15
+	b	.L1836
+.L1808:
+	sub	w1, w0, #65
+	cmp	w0, 33
+	and	w1, w1, 255
+	ccmp	w1, 1, 0, ne
+	bhi	.L1811
+	adrp	x0, toshiba_read_retrial
+	add	x0, x0, :lo12:toshiba_read_retrial
+	str	x0, [x20, #:lo12:.LANCHOR115]
+	adrp	x0, .LANCHOR4
+	mov	w1, 4
+	strb	w1, [x0, #:lo12:.LANCHOR4]
+.L1838:
+	mov	w1, 7
+	adrp	x0, .LANCHOR113
+	b	.L1836
+.L1811:
+	sub	w2, w0, #34
+	sub	w1, w0, #67
+	and	w2, w2, 255
+	and	w1, w1, 255
+	cmp	w2, 1
+	ccmp	w1, 1, 0, hi
+	bhi	.L1812
+	adrp	x2, toshiba_read_retrial
+	add	x2, x2, :lo12:toshiba_read_retrial
+	str	x2, [x20, #:lo12:.LANCHOR115]
+	cmp	w0, 35
+	mov	w2, 68
+	ccmp	w0, w2, 4, ne
+	adrp	x0, .LANCHOR113
+	beq	.L1813
+	mov	w2, 7
+.L1835:
+	strb	w2, [x0, #:lo12:.LANCHOR113]
+	cmp	w1, 1
+	adrp	x0, .LANCHOR4
+	bhi	.L1815
+	mov	w1, 4
+.L1837:
+	strb	w1, [x0, #:lo12:.LANCHOR4]
+.L1807:
+	adrp	x19, .LANCHOR35
+	mov	w0, 4
+	strb	wzr, [x19, #:lo12:.LANCHOR35]
+	tbz	x3, 0, .L1816
+	bl	nandc_set_if_mode
+	mov	w0, 1
+	bl	flash_set_interface_mode
+	mov	w0, 1
+.L1816:
+	bl	nandc_set_if_mode
+	bl	flash_info_blk_init
+	cmn	w0, #1
+	beq	.L1792
+	ldrb	w0, [x23, #:lo12:.LANCHOR2]
+	sub	w0, w0, #1
+	and	w0, w0, 255
+	cmp	w0, 6
+	bhi	.L1818
+	adrp	x0, hynix_read_retrial
+	add	x0, x0, :lo12:hynix_read_retrial
+	str	x0, [x20, #:lo12:.LANCHOR115]
+.L1818:
+	ldrb	w0, [x22, #:lo12:.LANCHOR25]
+	tbnz	x0, 2, .L1819
+.L1839:
+	mov	w0, 0
+	b	.L1792
+.L1813:
+	mov	w2, 17
+	b	.L1835
+.L1815:
+	mov	w1, 5
+	b	.L1837
+.L1812:
+	sub	w0, w0, #36
+	and	w0, w0, 255
+	cmp	w0, 1
+	bhi	.L1807
+	adrp	x0, toshiba_3d_read_retrial
+	add	x0, x0, :lo12:toshiba_3d_read_retrial
+	str	x0, [x20, #:lo12:.LANCHOR115]
+	b	.L1838
+.L1819:
+	ldr	x0, [x21, #:lo12:.LANCHOR5]
+	ldrb	w0, [x0, 19]
+	cbz	w0, .L1839
+	adrp	x0, .LANCHOR117
+	ldrb	w1, [x0, #:lo12:.LANCHOR117]
+	adrp	x0, .LANCHOR13
+	ldrh	w0, [x0, #:lo12:.LANCHOR13]
+	mul	w1, w1, w0
+	mov	w0, 0
+	bl	flash_ddr_para_scan
+	ldrb	w0, [x19, #:lo12:.LANCHOR35]
+	cbnz	w0, .L1839
+	ldr	x0, [x21, #:lo12:.LANCHOR5]
+	strb	wzr, [x0, 19]
+	bl	flash_info_flush
+	b	.L1839
+	.size	nand_flash_init, .-nand_flash_init
+	.section	.text.ftl_sysblk_dump,"ax",@progbits
+	.align	2
+	.global	ftl_sysblk_dump
+	.type	ftl_sysblk_dump, %function
+ftl_sysblk_dump:
+	sub	sp, sp, #144
+	stp	x29, x30, [sp, 48]
+	add	x29, sp, 48
+	stp	x23, x24, [sp, 96]
+	stp	x25, x26, [sp, 112]
+	adrp	x26, .LANCHOR79
+	stp	x27, x28, [sp, 128]
+	add	x26, x26, :lo12:.LANCHOR79
+	stp	x19, x20, [sp, 64]
+	adrp	x27, .LANCHOR75
+	stp	x21, x22, [sp, 80]
+	and	w22, w0, 65535
+	mov	w0, 1
+	bl	buf_alloc
+	ldr	x23, [x0, 8]
+	adrp	x28, .LANCHOR45
+	mov	x24, x0
+	add	x27, x27, :lo12:.LANCHOR75
+	add	x28, x28, :lo12:.LANCHOR45
+	mov	w25, 0
+	mov	w19, 0
+.L1841:
+	ldrh	w0, [x26]
+	cmp	w0, w19
+	bhi	.L1843
+	mov	x0, x24
+	bl	buf_free
+	cbz	w25, .L1844
+	adrp	x1, .LANCHOR147
+	adrp	x0, .LC0
+	mov	w2, 655
+	add	x1, x1, :lo12:.LANCHOR147
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1845:
+	b	.L1845
+.L1843:
+	ldrh	w20, [x27]
+	ldrb	w3, [x28]
+	ldr	x1, [x24, 8]
+	ldr	x2, [x24, 24]
+	madd	w20, w20, w22, w19
+	mov	w0, w20
+	bl	ftl_read_ppa_page
+	mov	w21, w0
+	ldr	x1, [x24, 24]
+	mov	w4, w0
+	ldr	x0, [x24, 8]
+	mov	w3, w20
+	ldr	w2, [x1, 12]
+	str	w2, [sp, 32]
+	ldr	w2, [x1, 8]
+	str	w2, [sp, 24]
+	ldr	w2, [x1, 4]
+	str	w2, [sp, 16]
+	mov	w2, w19
+	add	w19, w19, 1
+	ldr	w1, [x1]
+	and	w19, w19, 65535
+	str	w1, [sp, 8]
+	ldr	w1, [x0, 12]
+	str	w1, [sp]
+	mov	w1, w22
+	ldp	w5, w6, [x0]
+	ldr	w7, [x0, 8]
+	adrp	x0, .LC73
+	add	x0, x0, :lo12:.LC73
+	bl	printf
+	mov	w3, 32
+	mov	w2, 4
+	add	x1, x23, 704
+	adrp	x0, .LC80
+	add	x0, x0, :lo12:.LC80
+	bl	rknand_print_hex
+	cmp	w21, 512
+	ccmn	w21, #1, 4, ne
+	csinc	w25, w25, wzr, ne
+	b	.L1841
+.L1844:
+	mov	w0, 0
+	ldp	x19, x20, [sp, 64]
+	ldp	x21, x22, [sp, 80]
+	ldp	x23, x24, [sp, 96]
+	ldp	x25, x26, [sp, 112]
+	ldp	x27, x28, [sp, 128]
+	ldp	x29, x30, [sp, 48]
+	add	sp, sp, 144
+	ret
+	.size	ftl_sysblk_dump, .-ftl_sysblk_dump
+	.section	.text.dump_ftl_info,"ax",@progbits
+	.align	2
+	.global	dump_ftl_info
+	.type	dump_ftl_info, %function
+dump_ftl_info:
+	stp	x29, x30, [sp, -48]!
+	adrp	x0, .LANCHOR131
+	add	x1, x0, :lo12:.LANCHOR131
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR60
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR46
+	ldrh	w3, [x1, 2]
+	adrp	x20, .LANCHOR79
+	ldrb	w2, [x1, 1]
+	adrp	x21, .LANCHOR54
+	ldrb	w1, [x0, #:lo12:.LANCHOR131]
+	adrp	x0, .LC81
+	add	x0, x0, :lo12:.LC81
+	bl	printf
+	ldr	x0, [x22, #:lo12:.LANCHOR46]
+	ldrh	w2, [x0, 140]
+	ldrh	w1, [x0, 130]
+	adrp	x0, .LC82
+	add	x0, x0, :lo12:.LC82
+	bl	printf
+	ldr	x1, [x19, #:lo12:.LANCHOR60]
+	adrp	x0, .LC83
+	add	x0, x0, :lo12:.LC83
+	ldrh	w5, [x1, 26]
+	ldrh	w4, [x1, 22]
+	ldrb	w3, [x1, 21]
+	ldrh	w2, [x1, 18]
+	ldrh	w1, [x1, 16]
+	bl	printf
+	ldr	x1, [x19, #:lo12:.LANCHOR60]
+	adrp	x0, .LC84
+	add	x0, x0, :lo12:.LC84
+	ldrh	w5, [x1, 58]
+	ldrh	w4, [x1, 54]
+	ldrb	w3, [x1, 53]
+	ldrh	w2, [x1, 50]
+	ldrh	w1, [x1, 48]
+	bl	printf
+	ldr	x1, [x19, #:lo12:.LANCHOR60]
+	adrp	x19, .LANCHOR69
+	adrp	x0, .LC85
+	add	x0, x0, :lo12:.LC85
+	ldrh	w5, [x1, 90]
+	ldrh	w4, [x1, 86]
+	ldrb	w3, [x1, 85]
+	ldrh	w2, [x1, 82]
+	ldrh	w1, [x1, 80]
+	bl	printf
+	ldrb	w0, [x19, #:lo12:.LANCHOR69]
+	mov	w2, 4
+	ldrh	w3, [x20, #:lo12:.LANCHOR79]
+	mul	w3, w3, w0
+	adrp	x0, .LANCHOR82
+	ldr	x1, [x0, #:lo12:.LANCHOR82]
+	adrp	x0, .LC86
+	lsl	w3, w3, 1
+	add	x0, x0, :lo12:.LC86
+	bl	rknand_print_hex
+	adrp	x0, .LANCHOR56
+	ldrh	w3, [x21, #:lo12:.LANCHOR54]
+	mov	w2, 2
+	ldr	x1, [x0, #:lo12:.LANCHOR56]
+	adrp	x0, .LC87
+	add	x0, x0, :lo12:.LC87
+	bl	rknand_print_hex
+	ldr	x1, [x22, #:lo12:.LANCHOR46]
+	mov	w3, 32
+	mov	w2, 4
+	adrp	x0, .LC80
+	add	x1, x1, 704
+	add	x0, x0, :lo12:.LC80
+	bl	rknand_print_hex
+	adrp	x0, .LANCHOR59
+	ldrh	w3, [x21, #:lo12:.LANCHOR54]
+	mov	w2, 4
+	ldr	x1, [x0, #:lo12:.LANCHOR59]
+	adrp	x0, .LC88
+	add	x0, x0, :lo12:.LC88
+	bl	rknand_print_hex
+	mov	w3, 256
+	mov	w2, 2
+	adrp	x1, .LANCHOR81
+	adrp	x0, .LC89
+	add	x1, x1, :lo12:.LANCHOR81
+	add	x0, x0, :lo12:.LC89
+	bl	rknand_print_hex
+	ldrb	w0, [x19, #:lo12:.LANCHOR69]
+	mov	w2, 2
+	ldrh	w3, [x20, #:lo12:.LANCHOR79]
+	ldp	x21, x22, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	mul	w3, w3, w0
+	adrp	x0, .LANCHOR83
+	ldp	x29, x30, [sp], 48
+	lsl	w3, w3, 1
+	ldr	x1, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LC90
+	add	x0, x0, :lo12:.LC90
+	b	rknand_print_hex
+	.size	dump_ftl_info, .-dump_ftl_info
+	.section	.text.pm_ppa_update_check,"ax",@progbits
+	.align	2
+	.global	pm_ppa_update_check
+	.type	pm_ppa_update_check, %function
+pm_ppa_update_check:
+	adrp	x3, .LANCHOR71
+	mov	w4, 21
+	ldrh	w3, [x3, #:lo12:.LANCHOR71]
+	sub	w5, w4, w3
+	mov	w4, 1
+	lsr	w3, w2, w3
+	lsl	w4, w4, w5
+	sub	w4, w4, #1
+	and	w4, w4, w3
+	adrp	x3, .LANCHOR70
+	ldrb	w3, [x3, #:lo12:.LANCHOR70]
+	udiv	w4, w4, w3
+	adrp	x3, .LANCHOR59
+	ldr	x3, [x3, #:lo12:.LANCHOR59]
+	add	x4, x3, x4, uxth 2
+	ldrb	w3, [x4, 2]
+	ubfx	x3, x3, 5, 3
+	cmp	w3, 1
+	ccmp	w3, 7, 4, ne
+	bne	.L1853
+	stp	x29, x30, [sp, -16]!
+	mov	w3, w2
+	mov	w2, w1
+	mov	x1, x0
+	add	x29, sp, 0
+	adrp	x0, .LC91
+	add	x0, x0, :lo12:.LC91
+	bl	printf
+	bl	dump_ftl_info
+	mov	w0, -1
+	ldp	x29, x30, [sp], 16
+	ret
+.L1853:
+	mov	w0, 0
+	ret
+	.size	pm_ppa_update_check, .-pm_ppa_update_check
+	.section	.text.load_l2p_region,"ax",@progbits
+	.align	2
+	.global	load_l2p_region
+	.type	load_l2p_region, %function
+load_l2p_region:
+	stp	x29, x30, [sp, -64]!
+	and	w1, w1, 65535
+	cmp	w1, 31
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	str	x23, [sp, 48]
+	bls	.L1859
+	adrp	x1, .LANCHOR148
+	adrp	x0, .LC0
+	mov	w2, 30
+	add	x1, x1, :lo12:.LANCHOR148
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1860:
+	b	.L1860
+.L1859:
+	adrp	x23, .LANCHOR46
+	and	w19, w0, 65535
+	ldr	x0, [x23, #:lo12:.LANCHOR46]
+	ldrh	w2, [x0, 698]
+	cmp	w2, w19
+	bcs	.L1861
+	mov	w1, w19
+	adrp	x0, .LC92
+	add	x0, x0, :lo12:.LC92
+	bl	printf
+	adrp	x0, .LANCHOR149
+	mov	w1, 255
+	ldrh	w2, [x0, #:lo12:.LANCHOR149]
+	mov	x0, 0
+	ldr	x0, [x0, 8]
+	bl	ftl_memset
+	ldr	x0, [x23, #:lo12:.LANCHOR46]
+	ldrh	w0, [x0, 698]
+	cmp	w0, w19
+	bcs	.L1865
+	adrp	x1, .LANCHOR148
+	adrp	x0, .LC0
+	mov	w2, 34
+	add	x1, x1, :lo12:.LANCHOR148
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1863:
+	b	.L1863
+.L1861:
+	add	x0, x0, x19, sxtw 2
+	sbfiz	x1, x1, 4, 32
+	ldr	w21, [x0, 704]
+	adrp	x0, .LANCHOR93
+	add	x0, x0, :lo12:.LANCHOR93
+	add	x22, x0, x1
+	strh	w19, [x0, x1]
+	strh	wzr, [x22, 2]
+	cbnz	w21, .L1864
+	adrp	x0, .LANCHOR149
+	mov	w1, 255
+	ldrh	w2, [x0, #:lo12:.LANCHOR149]
+	ldr	x0, [x22, 8]
+	bl	ftl_memset
+.L1865:
+	mov	w0, 0
+	ldr	x23, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+.L1864:
+	adrp	x20, .LANCHOR141
+	adrp	x0, .LANCHOR45
+	ldr	x1, [x22, 8]
+	ldrb	w3, [x0, #:lo12:.LANCHOR45]
+	mov	w0, w21
+	ldr	x2, [x20, #:lo12:.LANCHOR141]
+	bl	ftl_read_ppa_page
+	ldr	x1, [x20, #:lo12:.LANCHOR141]
+	ldr	w2, [x1]
+	cmp	w2, w19
+	beq	.L1866
+	mov	w4, w21
+	mov	w3, w0
+	mov	w1, w19
+	adrp	x0, .LC93
+	add	x0, x0, :lo12:.LC93
+	bl	printf
+	ldr	x1, [x23, #:lo12:.LANCHOR46]
+	mov	w2, 4
+	adrp	x0, .LC94
+	add	x0, x0, :lo12:.LC94
+	add	x1, x1, 704
+	ldrh	w3, [x1, -6]
+	bl	rknand_print_hex
+	ldr	x1, [x22, 8]
+	mov	w3, 16
+	mov	w2, 4
+	adrp	x0, .LC95
+	add	x0, x0, :lo12:.LC95
+	bl	rknand_print_hex
+	ldr	x1, [x20, #:lo12:.LANCHOR141]
+	mov	w2, 4
+	mov	w3, 16
+	adrp	x0, .LC96
+	add	x0, x0, :lo12:.LC96
+	bl	rknand_print_hex
+	adrp	x0, .LANCHOR71
+	ldrh	w2, [x0, #:lo12:.LANCHOR71]
+	mov	w0, 21
+	sub	w1, w0, w2
+	mov	w0, 1
+	lsr	w21, w21, w2
+	lsl	w0, w0, w1
+	adrp	x1, .LANCHOR70
+	sub	w0, w0, #1
+	ldrb	w2, [x1, #:lo12:.LANCHOR70]
+	and	w0, w0, w21
+	mov	x1, 0
+	udiv	w0, w0, w2
+	bl	ftl_sblk_dump
+.L1866:
+	ldr	x0, [x20, #:lo12:.LANCHOR141]
+	ldr	w0, [x0]
+	cmp	w19, w0
+	beq	.L1865
+	adrp	x1, .LANCHOR148
+	adrp	x0, .LC0
+	mov	w2, 55
+	add	x1, x1, :lo12:.LANCHOR148
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1867:
+	b	.L1867
+	.size	load_l2p_region, .-load_l2p_region
+	.section	.text.pm_gc,"ax",@progbits
+	.align	2
+	.global	pm_gc
+	.type	pm_gc, %function
+pm_gc:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR46
+	adrp	x20, .LANCHOR101
+	stp	x21, x22, [sp, 32]
+	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	stp	x23, x24, [sp, 48]
+	ldrh	w1, [x0, 688]
+	ldrh	w0, [x20, #:lo12:.LANCHOR101]
+	str	x25, [sp, 64]
+	sub	w0, w0, #1
+	cmp	w1, w0
+	blt	.L1871
+	bl	pm_free_sblk
+	ldr	x2, [x19, #:lo12:.LANCHOR46]
+	ldrh	w1, [x20, #:lo12:.LANCHOR101]
+	sub	w1, w1, #1
+	ldrh	w3, [x2, 688]
+	cmp	w3, w1
+	blt	.L1871
+	add	x0, x2, x0, uxth 1
+	mov	w23, 65535
+	ldrh	w20, [x0, 416]
+	cmp	w20, w23
+	bne	.L1873
+	adrp	x1, .LANCHOR150
+	adrp	x0, .LC0
+	mov	w2, 127
+	add	x1, x1, :lo12:.LANCHOR150
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1874:
+	b	.L1874
+.L1873:
+	bl	pm_select_ram_region
+	and	x24, x0, 65535
+	adrp	x1, .LANCHOR93
+	lsl	x0, x24, 4
+	add	x2, x1, :lo12:.LANCHOR93
+	mov	x22, x19
+	add	x19, x2, x0
+	mov	x21, x24
+	ldrh	w0, [x2, x0]
+	cmp	w0, w23
+	mov	x23, x1
+	beq	.L1875
+	ldr	x1, [x19, 8]
+	cbz	x1, .L1875
+	ldrsh	w2, [x19, 2]
+	tbz	w2, #31, .L1875
+	bl	pm_write_page
+	ldrh	w0, [x19, 2]
+	and	w0, w0, 32767
+	strh	w0, [x19, 2]
+.L1875:
+	add	x1, x23, :lo12:.LANCHOR93
+	adrp	x25, .LANCHOR71
+	add	x24, x1, x24, lsl 4
+	add	x25, x25, :lo12:.LANCHOR71
+	mov	w19, 0
+.L1876:
+	ldr	x1, [x22, #:lo12:.LANCHOR46]
+	ldrh	w0, [x1, 698]
+	cmp	w0, w19
+	bhi	.L1878
+	bl	pm_free_sblk
+.L1871:
+	mov	w0, 0
+	ldr	x25, [sp, 64]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	ret
+.L1878:
+	add	x1, x1, x19, sxtw 2
+	ldrh	w3, [x25]
+	mov	w0, 21
+	sub	w2, w0, w3
+	mov	w0, 1
+	ldr	w1, [x1, 704]
+	lsl	w0, w0, w2
+	sub	w0, w0, #1
+	lsr	w1, w1, w3
+	and	w0, w0, w1
+	adrp	x1, .LANCHOR70
+	ldrb	w1, [x1, #:lo12:.LANCHOR70]
+	udiv	w0, w0, w1
+	cmp	w20, w0, uxth
+	bne	.L1877
+	mov	w1, w21
+	mov	w0, w19
+	bl	load_l2p_region
+	ldr	x1, [x24, 8]
+	mov	w0, w19
+	bl	pm_write_page
+.L1877:
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L1876
+	.size	pm_gc, .-pm_gc
+	.section	.text.pm_flush_id,"ax",@progbits
+	.align	2
+	.global	pm_flush_id
+	.type	pm_flush_id, %function
+pm_flush_id:
+	stp	x29, x30, [sp, -32]!
+	ubfiz	x0, x0, 4, 16
+	adrp	x2, .LANCHOR93
+	add	x2, x2, :lo12:.LANCHOR93
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	add	x19, x2, x0
+	ldrh	w0, [x2, x0]
+	ldr	x1, [x19, 8]
+	bl	pm_write_page
+	ldrh	w0, [x19, 2]
+	and	w0, w0, 32767
+	strh	w0, [x19, 2]
+	adrp	x19, .LANCHOR91
+	ldr	w0, [x19, #:lo12:.LANCHOR91]
+	cbz	w0, .L1884
+	bl	pm_gc
+	str	wzr, [x19, #:lo12:.LANCHOR91]
+.L1884:
+	mov	w0, 0
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	pm_flush_id, .-pm_flush_id
+	.section	.text.pm_flush,"ax",@progbits
+	.align	2
+	.global	pm_flush
+	.type	pm_flush, %function
+pm_flush:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR93
+	add	x19, x19, :lo12:.LANCHOR93
+	mov	w20, 0
+	add	x19, x19, 2
+.L1891:
+	ldrsh	w0, [x19]
+	tbz	w0, #31, .L1890
+	mov	w0, w20
+	bl	pm_flush_id
+.L1890:
+	add	w20, w20, 1
+	add	x19, x19, 16
+	and	w20, w20, 65535
+	cmp	w20, 32
+	bne	.L1891
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	pm_flush, .-pm_flush
+	.section	.text.flt_sys_flush,"ax",@progbits
+	.align	2
+	.global	flt_sys_flush
+	.type	flt_sys_flush, %function
+flt_sys_flush:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	bl	ftl_flush
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	ldp	x29, x30, [sp], 16
+	mov	w0, 0
+	b	ftl_info_flush
+	.size	flt_sys_flush, .-flt_sys_flush
+	.section	.text.rk_ftl_de_init,"ax",@progbits
+	.align	2
+	.global	rk_ftl_de_init
+	.type	rk_ftl_de_init, %function
+rk_ftl_de_init:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	bl	FlashDeInit
+	bl	flt_sys_flush
+	ldp	x29, x30, [sp], 16
+	b	FlashDeInit
+	.size	rk_ftl_de_init, .-rk_ftl_de_init
+	.section	.text.pm_init,"ax",@progbits
+	.align	2
+	.global	pm_init
+	.type	pm_init, %function
+pm_init:
+	stp	x29, x30, [sp, -112]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	mov	w24, w0
+	adrp	x0, .LANCHOR91
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	adrp	x20, .LANCHOR93
+	stp	x25, x26, [sp, 64]
+	add	x19, x20, :lo12:.LANCHOR93
+	str	wzr, [x0, #:lo12:.LANCHOR91]
+	mov	w0, 64
+	stp	x27, x28, [sp, 80]
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR141
+	adrp	x22, .LANCHOR45
+	add	x23, x19, 512
+	mov	x21, x1
+	add	x22, x22, :lo12:.LANCHOR45
+	str	x0, [x1, #:lo12:.LANCHOR141]
+	mov	w25, -1
+.L1900:
+	strh	w25, [x19]
+	strh	wzr, [x19, 2]
+	cbz	w24, .L1899
+	ldrb	w0, [x22]
+	lsl	w0, w0, 9
+	bl	ftl_malloc
+	str	x0, [x19, 8]
+.L1899:
+	add	x19, x19, 16
+	cmp	x19, x23
+	bne	.L1900
+	add	x0, x20, :lo12:.LANCHOR93
+	adrp	x19, .LANCHOR46
+	ldr	x24, [x21, #:lo12:.LANCHOR141]
+	mov	w4, 4
+	ldr	x25, [x0, 8]
+	mov	x3, x24
+	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	mov	x2, x25
+	ldrh	w1, [x0, 692]
+	ldrb	w0, [x0, 694]
+	bl	flash_get_last_written_page
+	sxth	w26, w0
+	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	mov	w23, w26
+	ldrh	w2, [x0, 696]
+	cmp	w2, w26
+	bgt	.L1901
+	ldrh	w1, [x0, 692]
+	mov	w3, w26
+	adrp	x0, .LC97
+	add	x0, x0, :lo12:.LC97
+	adrp	x27, .LANCHOR75
+	adrp	x28, .LANCHOR45
+	add	x27, x27, :lo12:.LANCHOR75
+	add	x28, x28, :lo12:.LANCHOR45
+	bl	printf
+	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	ldrsh	w21, [x0, 696]
+.L1902:
+	cmp	w21, w26
+	ble	.L1904
+	adrp	x0, .LANCHOR133
+	mov	w1, 1
+	add	x20, x20, :lo12:.LANCHOR93
+	add	w23, w23, 1
+	strb	w1, [x0, #:lo12:.LANCHOR133]
+	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	strh	w23, [x0, 696]
+	bl	pm_free_sblk
+	ldr	x1, [x20, 8]
+	mov	w0, -1
+	bl	pm_write_page
+	ldr	x1, [x20, 8]
+	mov	w0, -1
+	bl	pm_write_page
+.L1901:
+	bl	pm_free_sblk
+	bl	pm_gc
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L1904:
+	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	mov	x3, x24
+	ldrh	w1, [x27]
+	mov	x2, x25
+	ldrb	w4, [x28]
+	ldrh	w22, [x0, 692]
+	ldrb	w0, [x0, 694]
+	madd	w22, w22, w1, w21
+	mov	w1, w22
+	bl	flash_read_page_en
+	mov	w4, w0
+	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	str	w4, [x29, 108]
+	mov	w2, w22
+	ldr	w1, [x0, 48]
+	ldrh	w3, [x0, 694]
+	add	w1, w1, 1
+	str	w1, [x0, 48]
+	adrp	x0, .LC98
+	add	x0, x0, :lo12:.LC98
+	ldr	w1, [x24]
+	bl	printf
+	ldr	w4, [x29, 108]
+	cmp	w4, 512
+	ccmn	w4, #1, 4, ne
+	beq	.L1903
+	ldr	x1, [x19, #:lo12:.LANCHOR46]
+	ldr	w0, [x24]
+	ldrh	w2, [x1, 698]
+	cmp	w0, w2
+	bcs	.L1903
+	add	x0, x1, x0, uxtw 2
+	str	w22, [x0, 704]
+.L1903:
+	add	w21, w21, 1
+	sxth	w21, w21
+	b	.L1902
+	.size	pm_init, .-pm_init
+	.section	.text.pm_log2phys,"ax",@progbits
+	.align	2
+	.global	pm_log2phys
+	.type	pm_log2phys, %function
+pm_log2phys:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	mov	x22, x1
+	adrp	x1, .LANCHOR45
+	stp	x19, x20, [sp, 16]
+	stp	x25, x26, [sp, 64]
+	ldrb	w1, [x1, #:lo12:.LANCHOR45]
+	stp	x23, x24, [sp, 48]
+	mov	w23, w2
+	lsl	w21, w1, 7
+	ubfiz	w20, w1, 7, 9
+	adrp	x1, .LANCHOR47
+	udiv	w21, w0, w21
+	ldr	w2, [x1, #:lo12:.LANCHOR47]
+	cmp	w0, w2
+	and	w25, w21, 65535
+	msub	w20, w25, w20, w0
+	bcc	.L1914
+	mov	w1, w0
+	adrp	x0, .LC99
+	add	x0, x0, :lo12:.LC99
+	bl	printf
+	mov	w0, -1
+.L1913:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L1914:
+	adrp	x24, .LANCHOR93
+	add	x0, x24, :lo12:.LANCHOR93
+	and	x20, x20, 65535
+	add	x0, x0, 8
+	mov	x19, 0
+.L1920:
+	ldr	x1, [x0]
+	cbz	x1, .L1916
+	ldrh	w1, [x0, -8]
+	cmp	w1, w25
+	bne	.L1916
+.L1917:
+	cbnz	w23, .L1918
+	add	x0, x24, :lo12:.LANCHOR93
+	add	x0, x0, x19, lsl 4
+	ldr	x0, [x0, 8]
+	ldr	w0, [x0, x20, lsl 2]
+	str	w0, [x22]
+.L1919:
+	add	x24, x24, :lo12:.LANCHOR93
+	add	x19, x24, x19, lsl 4
+	ldrh	w0, [x19, 2]
+	mvn	x1, x0
+	tst	x1, 32767
+	beq	.L1922
+	add	w0, w0, 1
+	strh	w0, [x19, 2]
+.L1922:
+	mov	w0, 0
+	b	.L1913
+.L1918:
+	add	x0, x24, :lo12:.LANCHOR93
+	ldr	w2, [x22]
+	add	x0, x0, x19, lsl 4
+	ldr	x1, [x0, 8]
+	str	w2, [x1, x20, lsl 2]
+	ldrh	w1, [x0, 2]
+	orr	w1, w1, -32768
+	strh	w1, [x0, 2]
+	adrp	x0, .LANCHOR94
+	strb	w21, [x0, #:lo12:.LANCHOR94]
+	b	.L1919
+.L1916:
+	add	w19, w19, 1
+	add	x0, x0, 16
+	and	x19, x19, 65535
+	cmp	w19, 32
+	bne	.L1920
+	bl	pm_select_ram_region
+	and	x19, x0, 65535
+	sbfiz	x1, x19, 4, 32
+	add	x2, x24, :lo12:.LANCHOR93
+	add	x3, x2, x1
+	mov	w26, w0
+	ldrh	w2, [x2, x1]
+	mov	w1, 65535
+	cmp	w2, w1
+	beq	.L1921
+	ldrsh	w1, [x3, 2]
+	tbz	w1, #31, .L1921
+	bl	pm_flush_id
+.L1921:
+	adrp	x0, .LANCHOR151
+	mov	w1, w26
+	strb	w19, [x0, #:lo12:.LANCHOR151]
+	mov	w0, w25
+	bl	load_l2p_region
+	b	.L1917
+	.size	pm_log2phys, .-pm_log2phys
+	.section	.text.ftl_read_ahead,"ax",@progbits
+	.align	2
+	.global	ftl_read_ahead
+	.type	ftl_read_ahead, %function
+ftl_read_ahead:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR49
+	stp	x21, x22, [sp, 32]
+	ldr	w0, [x20, #:lo12:.LANCHOR49]
+	stp	x23, x24, [sp, 48]
+	cmn	w0, #1
+	beq	.L1929
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x19, x0
+	mov	w0, -1
+	cbz	x19, .L1928
+	ldr	w21, [x20, #:lo12:.LANCHOR49]
+	str	w21, [x19, 36]
+	str	w0, [x20, #:lo12:.LANCHOR49]
+	mov	w0, w21
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 76]
+	ldr	x20, [x19, 8]
+	cmn	w0, #1
+	ldr	x22, [x19, 24]
+	bne	.L1931
+	mov	w2, 0
+	add	x1, x29, 76
+	mov	w0, w21
+	bl	pm_log2phys
+.L1931:
+	ldr	w0, [x29, 76]
+	stp	w0, w0, [x19, 40]
+	cmn	w0, #1
+	bne	.L1932
+	adrp	x0, .LANCHOR45
+	mov	w1, 0
+	ldrb	w2, [x0, #:lo12:.LANCHOR45]
+	mov	x0, x20
+	lsl	w2, w2, 9
+	bl	ftl_memset
+	ldrb	w0, [x19, 2]
+	orr	w0, w0, 8
+	strb	w0, [x19, 2]
+.L1929:
+	mov	w0, 0
+.L1928:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	ret
+.L1932:
+	mov	w1, 1
+	mov	x0, x19
+	bl	sblk_read_page
+	ldr	w23, [x19, 52]
+	cmp	w23, 256
+	bne	.L1933
+	adrp	x0, .LANCHOR71
+	mov	w20, 21
+	mov	w24, 1
+	ldrh	w1, [x0, #:lo12:.LANCHOR71]
+	ldr	w0, [x29, 76]
+	sub	w20, w20, w1
+	ldp	w2, w3, [x19, 36]
+	lsr	w0, w0, w1
+	lsl	w20, w24, w20
+	sub	w20, w20, #1
+	and	w20, w20, w0
+	adrp	x0, .LANCHOR70
+	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	udiv	w20, w20, w0
+	adrp	x0, .LC100
+	add	x0, x0, :lo12:.LC100
+	and	w1, w20, 65535
+	bl	printf
+	mov	w2, 0
+	mov	w1, w24
+	mov	w0, w20
+	bl	gc_add_sblk
+.L1933:
+	ldr	w5, [x22, 4]
+	cmp	w21, w5
+	beq	.L1934
+	ldrb	w1, [x19, 1]
+	adrp	x0, .LC101
+	ldr	w4, [x22]
+	mov	w2, w21
+	ldp	w6, w7, [x22, 8]
+	add	x0, x0, :lo12:.LC101
+	ldr	w3, [x29, 76]
+	bl	printf
+.L1934:
+	ldr	w0, [x22, 4]
+	cmp	w21, w0
+	bne	.L1935
+	cmn	w23, #1
+	bne	.L1929
+.L1935:
+	adrp	x1, .LANCHOR152
+	adrp	x0, .LC0
+	mov	w2, 758
+	add	x1, x1, :lo12:.LANCHOR152
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1936:
+	b	.L1936
+	.size	ftl_read_ahead, .-ftl_read_ahead
+	.section	.text.gc_update_l2p_map,"ax",@progbits
+	.align	2
+	.global	gc_update_l2p_map
+	.type	gc_update_l2p_map, %function
+gc_update_l2p_map:
+	stp	x29, x30, [sp, -144]!
+	adrp	x0, .LANCHOR60
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	mov	w21, 0
+	stp	x23, x24, [sp, 48]
+	mov	w24, 0
+	stp	x25, x26, [sp, 64]
+	adrp	x26, .LANCHOR64
+	stp	x27, x28, [sp, 80]
+	mov	w27, 0
+	ldr	x22, [x0, #:lo12:.LANCHOR60]
+	add	x0, x26, :lo12:.LANCHOR64
+	stp	x19, x20, [sp, 16]
+	str	x0, [x29, 104]
+.L1943:
+	adrp	x0, .LANCHOR79
+	ldrh	w0, [x0, #:lo12:.LANCHOR79]
+	cmp	w27, w0
+	bge	.L1953
+	lsl	w23, w27, 1
+	mov	x19, 0
+	sub	w0, w23, #1
+	str	w0, [x29, 124]
+	b	.L1954
+.L1950:
+	adrp	x1, .LANCHOR107
+	sbfiz	x0, x24, 2, 32
+	ldr	x1, [x1, #:lo12:.LANCHOR107]
+	ldr	w23, [x1, x0]
+	cmn	w23, #1
+	beq	.L1944
+	adrp	x1, .LANCHOR108
+	ldr	x1, [x1, #:lo12:.LANCHOR108]
+	ldr	w20, [x1, x0]
+	mov	w0, w23
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 140]
+	cmn	w0, #1
+	bne	.L1945
+	mov	w2, 0
+	add	x1, x29, 140
+	mov	w0, w23
+	bl	pm_log2phys
+.L1945:
+	ldr	w0, [x29, 140]
+	cmp	w20, w0
+	bne	.L1946
+	ldr	x0, [x29, 112]
+	ldrh	w1, [x25]
+	ldrh	w0, [x0, 96]
+	mul	w0, w0, w1
+	ldr	x1, [x29, 104]
+	ldrb	w1, [x1]
+	cmp	w1, 3
+	bne	.L1947
+	add	w0, w0, w27
+	orr	w0, w0, w28, lsl 24
+.L1959:
+	mov	w2, 1
+	add	x1, x29, 136
+	str	w0, [x29, 136]
+	mov	w0, w23
+	bl	pm_log2phys
+	add	w21, w21, 1
+	adrp	x0, .LANCHOR71
+	ldrh	w2, [x0, #:lo12:.LANCHOR71]
+	mov	w0, 21
+	sub	w1, w0, w2
+	mov	w0, 1
+	lsr	w20, w20, w2
+	lsl	w0, w0, w1
+	sub	w0, w0, #1
+	and	w20, w0, w20
+	adrp	x0, .LANCHOR70
+	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	udiv	w0, w20, w0
+	bl	ftl_vpn_decrement
+.L1946:
+	add	w24, w24, 1
+.L1944:
+	add	w28, w28, 1
+.L1952:
+	ldrb	w0, [x26, #:lo12:.LANCHOR64]
+	cmp	w28, w0
+	ble	.L1950
+	add	x19, x19, 1
+.L1954:
+	ldrb	w0, [x22, 89]
+	cmp	w0, w19
+	ble	.L1951
+	add	x0, x22, x19, lsl 1
+	adrp	x25, .LANCHOR75
+	mov	w28, 1
+	add	x25, x25, :lo12:.LANCHOR75
+	str	x0, [x29, 112]
+	b	.L1952
+.L1947:
+	cmp	w1, 2
+	bne	.L1949
+	ldr	w1, [x29, 124]
+	add	w0, w0, w1
+	add	w0, w0, w28
+	orr	w0, w0, 33554432
+	b	.L1959
+.L1949:
+	add	w0, w0, w27
+	b	.L1959
+.L1951:
+	add	w27, w27, 1
+	b	.L1943
+.L1953:
+	adrp	x0, .LANCHOR56
+	ldrh	w1, [x22, 80]
+	ldp	x19, x20, [sp, 16]
+	ldr	x0, [x0, #:lo12:.LANCHOR56]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	strh	w21, [x0, x1, lsl 1]
+	ldp	x27, x28, [sp, 80]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 144
+	ret
+	.size	gc_update_l2p_map, .-gc_update_l2p_map
+	.section	.text.gc_update_l2p_map_new,"ax",@progbits
+	.align	2
+	.global	gc_update_l2p_map_new
+	.type	gc_update_l2p_map_new, %function
+gc_update_l2p_map_new:
+	stp	x29, x30, [sp, -176]!
+	adrp	x0, .LANCHOR60
+	adrp	x1, .LANCHOR68
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	ldr	x24, [x0, #:lo12:.LANCHOR60]
+	stp	x25, x26, [sp, 64]
+	ldrh	w25, [x1, #:lo12:.LANCHOR68]
+	add	x1, x24, 80
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR22
+	stp	x21, x22, [sp, 32]
+	stp	x27, x28, [sp, 80]
+	str	x1, [x29, 144]
+	ldrb	w1, [x1, 9]
+	str	x0, [x29, 128]
+	mul	w25, w25, w1
+	ldr	w1, [x20, #:lo12:.LANCHOR22]
+	tbz	x1, 8, .L1961
+	ldrh	w1, [x24, 80]
+	adrp	x0, .LC102
+	add	x0, x0, :lo12:.LC102
+	bl	printf
+.L1961:
+	adrp	x23, .LANCHOR56
+	ldrh	w1, [x24, 80]
+	sub	w2, w25, #1
+	mov	x21, 0
+	ldr	x0, [x23, #:lo12:.LANCHOR56]
+	mov	w22, 0
+	strh	w2, [x0, x1, lsl 1]
+	adrp	x0, .LANCHOR45
+	add	x0, x0, :lo12:.LANCHOR45
+	str	x0, [x29, 104]
+.L1962:
+	mov	w27, w21
+	cmp	w25, w21
+	bhi	.L1972
+	ldr	w0, [x20, #:lo12:.LANCHOR22]
+	tbz	x0, 8, .L1973
+	ldr	x0, [x29, 128]
+	mov	w3, w22
+	ldr	x1, [x23, #:lo12:.LANCHOR56]
+	ldrh	w2, [x24, 80]
+	ldr	x0, [x0, #:lo12:.LANCHOR60]
+	ldrh	w2, [x1, x2, lsl 1]
+	ldrh	w1, [x0, 80]
+	adrp	x0, .LC106
+	add	x0, x0, :lo12:.LC106
+	bl	printf
+.L1973:
+	ldrh	w0, [x24, 80]
+	ldr	x1, [x23, #:lo12:.LANCHOR56]
+	lsl	x0, x0, 1
+	ldrh	w2, [x1, x0]
+	cmp	w22, w2
+	beq	.L1974
+	adrp	x1, .LANCHOR153
+	adrp	x0, .LC0
+	mov	w2, 448
+	add	x1, x1, :lo12:.LANCHOR153
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1975:
+	b	.L1975
+.L1972:
+	adrp	x26, .LANCHOR107
+	lsl	x19, x21, 2
+	ldr	x0, [x26, #:lo12:.LANCHOR107]
+	ldr	w2, [x0, x19]
+	cmn	w2, #1
+	beq	.L1963
+	adrp	x0, .LANCHOR45
+	ldrb	w0, [x0, #:lo12:.LANCHOR45]
+	lsl	w0, w0, 7
+	udiv	w0, w2, w0
+	and	w0, w0, 65535
+	str	w0, [x29, 156]
+	ldr	w0, [x20, #:lo12:.LANCHOR22]
+	tbz	x0, 8, .L1964
+	ldr	w1, [x29, 156]
+	adrp	x0, .LC103
+	mov	w3, w21
+	add	x0, x0, :lo12:.LC103
+	bl	printf
+.L1964:
+	sub	w27, w25, w27
+	add	x27, x27, x21
+	lsl	x0, x27, 2
+	str	x0, [x29, 136]
+	adrp	x0, .LC105
+	add	x0, x0, :lo12:.LC105
+	str	x0, [x29, 120]
+	adrp	x0, .LANCHOR71
+	add	x0, x0, :lo12:.LANCHOR71
+	str	x0, [x29, 112]
+.L1965:
+	ldr	x0, [x29, 136]
+	cmp	x0, x19
+	bne	.L1971
+.L1963:
+	add	x21, x21, 1
+	b	.L1962
+.L1971:
+	ldr	x0, [x26, #:lo12:.LANCHOR107]
+	ldr	w28, [x0, x19]
+	cmn	w28, #1
+	beq	.L1966
+	ldr	x0, [x29, 104]
+	ldr	w1, [x29, 156]
+	ldrb	w0, [x0]
+	lsl	w0, w0, 7
+	udiv	w0, w28, w0
+	cmp	w1, w0, uxth
+	bne	.L1966
+	adrp	x0, .LANCHOR108
+	ldr	x0, [x0, #:lo12:.LANCHOR108]
+	ldr	w27, [x0, x19]
+	mov	w0, w28
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 172]
+	cmn	w0, #1
+	bne	.L1967
+	mov	w2, 0
+	add	x1, x29, 172
+	mov	w0, w28
+	bl	pm_log2phys
+.L1967:
+	ldr	w3, [x29, 172]
+	cmp	w27, w3
+	bne	.L1968
+	adrp	x0, .LANCHOR109
+	mov	w2, 1
+	add	x1, x29, 168
+	add	w22, w22, 1
+	ldr	x0, [x0, #:lo12:.LANCHOR109]
+	ldr	w0, [x0, x19]
+	str	w0, [x29, 168]
+	mov	w0, w28
+	bl	pm_log2phys
+	ldr	x0, [x29, 112]
+	mov	w1, 21
+	ldrh	w0, [x0]
+	sub	w2, w1, w0
+	mov	w1, 1
+	lsr	w0, w27, w0
+	lsl	w1, w1, w2
+	sub	w1, w1, #1
+	and	w1, w1, w0
+	adrp	x0, .LANCHOR70
+	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	udiv	w1, w1, w0
+	and	w1, w1, 65535
+	str	w1, [x29, 152]
+	mov	w0, w1
+	bl	ftl_vpn_decrement
+	ldr	x0, [x29, 144]
+	ldr	w1, [x29, 152]
+	ldrh	w0, [x0]
+	cmp	w0, w1
+	bne	.L1969
+	ldr	w0, [x20, #:lo12:.LANCHOR22]
+	tbz	x0, 8, .L1969
+	ldr	w3, [x29, 172]
+	adrp	x0, .LC104
+	mov	w2, w27
+	mov	w1, w28
+	add	x0, x0, :lo12:.LC104
+	bl	printf
+.L1969:
+	ldr	x0, [x26, #:lo12:.LANCHOR107]
+	mov	w1, -1
+	str	w1, [x0, x19]
+.L1966:
+	add	x19, x19, 4
+	b	.L1965
+.L1968:
+	ldr	w0, [x20, #:lo12:.LANCHOR22]
+	tbz	x0, 8, .L1970
+	ldr	x0, [x29, 120]
+	mov	w2, w27
+	mov	w1, w28
+	bl	printf
+.L1970:
+	ldr	x0, [x29, 144]
+	ldrh	w0, [x0]
+	bl	ftl_vpn_decrement
+	b	.L1969
+.L1974:
+	strh	w22, [x1, x0]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 176
+	ret
+	.size	gc_update_l2p_map_new, .-gc_update_l2p_map_new
+	.section	.text.gc_scan_src_blk_one_page,"ax",@progbits
+	.align	2
+	.global	gc_scan_src_blk_one_page
+	.type	gc_scan_src_blk_one_page, %function
+gc_scan_src_blk_one_page:
+	stp	x29, x30, [sp, -96]!
+	mov	w5, 0
+	mov	w6, 0
+	mov	w7, 65535
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR58
+	add	x1, x19, :lo12:.LANCHOR58
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	str	x25, [sp, 64]
+	ldrb	w0, [x1, 4]
+	add	x2, x1, x0, sxtw 1
+	ldrh	w3, [x2, 40]
+	adrp	x2, .LANCHOR69
+	ldrb	w4, [x2, #:lo12:.LANCHOR69]
+	ldrh	w2, [x1, 2]
+.L1999:
+	cmp	w3, w7
+	beq	.L2001
+	cbz	w6, .L2002
+	add	x1, x19, :lo12:.LANCHOR58
+	strb	w0, [x1, 4]
+.L2002:
+	cbz	w5, .L2003
+	add	x0, x19, :lo12:.LANCHOR58
+	strh	w2, [x0, 2]
+.L2003:
+	adrp	x0, .LANCHOR75
+	ldrh	w22, [x0, #:lo12:.LANCHOR75]
+	adrp	x0, .LANCHOR64
+	mov	x23, x0
+	ldrb	w1, [x0, #:lo12:.LANCHOR64]
+	mul	w22, w22, w3
+	cmp	w1, 2
+	bne	.L2004
+	add	x0, x19, :lo12:.LANCHOR58
+	ldrb	w1, [x0, 6]
+	cbnz	w1, .L2004
+	ldrh	w0, [x0, 2]
+	add	w22, w22, w0, lsl 1
+.L2005:
+	add	x1, x19, :lo12:.LANCHOR58
+	ldrb	w0, [x1, 4]
+	add	w0, w0, 1
+	and	w0, w0, 255
+	strb	w0, [x1, 4]
+	cmp	w4, w0
+	bne	.L2006
+	ldrh	w0, [x1, 2]
+	strb	wzr, [x1, 4]
+	add	w0, w0, 1
+	strh	w0, [x1, 2]
+.L2006:
+	mov	w0, 1
+	add	x19, x19, :lo12:.LANCHOR58
+	bl	buf_alloc
+	add	x23, x23, :lo12:.LANCHOR64
+	mov	x21, x0
+	mov	w20, 0
+	adrp	x24, .LANCHOR61
+.L2016:
+	ldrb	w0, [x19, 6]
+	cmp	w0, 3
+	bne	.L2007
+	cbz	w20, .L2008
+.L2007:
+	cmp	w0, w20
+	bgt	.L2009
+.L2017:
+	mov	x0, x21
+	bl	buf_free
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	ret
+.L2001:
+	add	w0, w0, 1
+	and	w0, w0, 255
+	cmp	w0, w4
+	bne	.L2000
+	add	w2, w2, 1
+	mov	w5, 1
+	and	w2, w2, 65535
+	mov	w0, 0
+.L2000:
+	add	x3, x1, x0, sxtw 1
+	mov	w6, 1
+	ldrh	w3, [x3, 40]
+	b	.L1999
+.L2004:
+	add	x0, x19, :lo12:.LANCHOR58
+	ldrh	w0, [x0, 2]
+	add	w22, w0, w22
+	b	.L2005
+.L2009:
+	ldrb	w1, [x23]
+	cmp	w1, 2
+	bne	.L2010
+	cbnz	w0, .L2010
+	add	w0, w20, w22
+	orr	w0, w0, 33554432
+.L2030:
+	str	w0, [x21, 40]
+	mov	w1, 1
+	mov	x0, x21
+	bl	sblk_read_page
+	ldr	w0, [x21, 52]
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	beq	.L2013
+	ldr	x0, [x21, 24]
+	ldr	w25, [x0, 4]
+	mov	w0, w25
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 92]
+	cmn	w0, #1
+	bne	.L2014
+	mov	w2, 0
+	add	x1, x29, 92
+	mov	w0, w25
+	bl	pm_log2phys
+.L2014:
+	ldr	w0, [x29, 92]
+	cmp	w22, w0
+	bne	.L2013
+	ldrh	w0, [x19, 24]
+	ldr	x2, [x24, #:lo12:.LANCHOR61]
+	ubfiz	x1, x0, 2, 16
+	add	w0, w0, 1
+	str	w22, [x2, x1]
+	strh	w0, [x19, 24]
+.L2013:
+	ldrh	w0, [x19, 26]
+	add	w0, w0, 1
+	strh	w0, [x19, 26]
+.L2008:
+	add	w20, w20, 1
+	cmp	w20, 4
+	bne	.L2016
+	b	.L2017
+.L2010:
+	orr	w0, w22, w20, lsl 24
+	b	.L2030
+	.size	gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page
+	.section	.text.gc_scan_static_data,"ax",@progbits
+	.align	2
+	.global	gc_scan_static_data
+	.type	gc_scan_static_data, %function
+gc_scan_static_data:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR60
+	stp	x21, x22, [sp, 32]
+	ldr	x0, [x19, #:lo12:.LANCHOR60]
+	ldr	w1, [x0, 544]
+	str	x23, [sp, 48]
+	cmn	w1, #1
+	beq	.L2032
+	adrp	x21, .LANCHOR71
+	adrp	x22, .LANCHOR70
+	add	x21, x21, :lo12:.LANCHOR71
+	add	x22, x22, :lo12:.LANCHOR70
+	mov	w20, 11
+.L2041:
+	ldr	x0, [x19, #:lo12:.LANCHOR60]
+	mov	w2, 0
+	add	x1, x29, 76
+	ldr	w0, [x0, 544]
+	bl	pm_log2phys
+	ldr	w0, [x29, 76]
+	cmn	w0, #1
+	beq	.L2033
+	mov	w0, 1
+	bl	buf_alloc
+	ldr	w1, [x29, 76]
+	mov	x23, x0
+	str	w1, [x0, 40]
+	mov	w1, 1
+	bl	sblk_read_page
+	ldr	w0, [x23, 52]
+	cmp	w0, 256
+	bne	.L2034
+	ldrh	w3, [x21]
+	mov	w0, 21
+	ldr	w2, [x29, 76]
+	mov	w1, 1
+	sub	w0, w0, w3
+	lsr	w2, w2, w3
+	ldrb	w3, [x22]
+	lsl	w0, w1, w0
+	sub	w0, w0, #1
+	and	w0, w0, w2
+	mov	w2, 0
+	udiv	w0, w0, w3
+	bl	gc_add_sblk
+.L2034:
+	ldr	x0, [x19, #:lo12:.LANCHOR60]
+	ldr	x1, [x23, 24]
+	ldr	w0, [x0, 544]
+	ldr	w1, [x1, 4]
+	cmp	w1, w0
+	beq	.L2035
+	adrp	x1, .LANCHOR154
+	adrp	x0, .LC0
+	mov	w2, 1149
+	add	x1, x1, :lo12:.LANCHOR154
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2036:
+	b	.L2036
+.L2035:
+	mov	x0, x23
+	bl	buf_free
+.L2033:
+	ldr	x0, [x19, #:lo12:.LANCHOR60]
+	adrp	x2, .LANCHOR47
+	ldr	w2, [x2, #:lo12:.LANCHOR47]
+	ldr	w1, [x0, 544]
+	add	w1, w1, 1
+	str	w1, [x0, 544]
+	cmp	w1, w2
+	bcc	.L2037
+	mov	w1, -1
+	str	w1, [x0, 544]
+	ldr	w1, [x0, 548]
+	add	w1, w1, 1
+	str	w1, [x0, 548]
+	bl	ftl_flush
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	mov	w0, 0
+	bl	ftl_info_flush
+.L2031:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	ret
+.L2037:
+	ldr	w0, [x29, 76]
+	cmn	w0, #1
+	bne	.L2031
+	sub	w20, w20, #1
+	ands	w20, w20, 65535
+	bne	.L2041
+	b	.L2031
+.L2032:
+	adrp	x1, .LANCHOR46
+	ldr	x1, [x1, #:lo12:.LANCHOR46]
+	ldr	w2, [x1, 40]
+	cmp	w2, 20480
+	bls	.L2043
+	ldr	w3, [x1, 44]
+	add	w3, w3, w2, lsr 10
+	and	w2, w2, 1023
+	stp	w2, w3, [x1, 40]
+.L2043:
+	ldr	w2, [x0, 536]
+	ldr	w3, [x0, 12]
+	add	w2, w2, 12959744
+	add	w2, w2, 256
+	cmp	w3, w2
+	ldr	w2, [x1, 44]
+	bhi	.L2044
+	ldr	w1, [x0, 540]
+	add	w1, w1, 98304
+	add	w1, w1, 1696
+	cmp	w2, w1
+	bls	.L2031
+.L2044:
+	str	w3, [x0, 536]
+	str	w2, [x0, 540]
+	str	wzr, [x0, 544]
+	b	.L2031
+	.size	gc_scan_static_data, .-gc_scan_static_data
+	.section	.text.ftl_sblk_dump,"ax",@progbits
+	.align	2
+	.global	ftl_sblk_dump
+	.type	ftl_sblk_dump, %function
+ftl_sblk_dump:
+	sub	sp, sp, #256
+	stp	x29, x30, [sp, 48]
+	add	x29, sp, 48
+	stp	x23, x24, [sp, 96]
+	and	w23, w0, 65535
+	stp	x19, x20, [sp, 64]
+	mov	w0, 65535
+	stp	x21, x22, [sp, 80]
+	cmp	w23, w0
+	stp	x25, x26, [sp, 112]
+	stp	x27, x28, [sp, 128]
+	beq	.L2072
+	uxtw	x0, w23
+	str	x0, [x29, 128]
+	lsl	x14, x0, 2
+	adrp	x0, .LANCHOR59
+	mov	x13, x0
+	ldr	x2, [x0, #:lo12:.LANCHOR59]
+	add	x2, x2, x14
+	ldrb	w2, [x2, 2]
+	and	w2, w2, 224
+	cmp	w2, 160
+	bne	.L2073
+	adrp	x0, .LANCHOR64
+	ldrb	w25, [x0, #:lo12:.LANCHOR64]
+.L2052:
+	add	x28, x29, 208
+	str	x1, [x29, 144]
+	mov	w0, w23
+	adrp	x21, .LANCHOR22
+	strh	w23, [x28, -32]!
+	add	x1, x28, 16
+	bl	ftl_get_blk_list_in_sblk
+	adrp	x2, .LANCHOR79
+	and	w1, w0, 255
+	strb	w1, [x29, 185]
+	ldrh	w3, [x2, #:lo12:.LANCHOR79]
+	strh	wzr, [x29, 178]
+	strb	wzr, [x29, 181]
+	strh	wzr, [x29, 186]
+	mul	w1, w1, w3
+	str	x2, [x29, 120]
+	strh	w1, [x29, 182]
+	ldr	w1, [x21, #:lo12:.LANCHOR22]
+	tbz	x1, 12, .L2053
+	ldr	x1, [x13, #:lo12:.LANCHOR59]
+	and	w4, w0, 255
+	mov	w3, w25
+	adrp	x0, .LC107
+	add	x1, x1, x14
+	add	x0, x0, :lo12:.LC107
+	ldrb	w2, [x1, 2]
+	mov	w1, w23
+	ubfx	x2, x2, 5, 3
+	bl	printf
+.L2053:
+	mov	w0, 1
+	bl	buf_alloc
+	mov	w27, 0
+	mov	x26, x0
+	mov	w20, 0
+	adrp	x0, .LANCHOR75
+	stp	wzr, wzr, [x29, 152]
+	add	x0, x0, :lo12:.LANCHOR75
+	str	x0, [x29, 96]
+.L2054:
+	ldr	x0, [x29, 120]
+	ldrh	w0, [x0, #:lo12:.LANCHOR79]
+	cmp	w0, w20
+	bls	.L2069
+	lsl	w0, w20, 1
+	mov	w24, 0
+	sub	w0, w0, #1
+	str	w0, [x29, 140]
+	adrp	x0, .LC109
+	add	x0, x0, :lo12:.LC109
+	str	x0, [x29, 104]
+	b	.L2070
+.L2073:
+	mov	w25, 1
+	b	.L2052
+.L2066:
+	ldr	x0, [x29, 112]
+	ldrh	w10, [x28, x0]
+	mov	w0, 65535
+	cmp	w10, w0
+	beq	.L2055
+	ldr	x0, [x29, 96]
+	cmp	w25, 3
+	ldrh	w19, [x0]
+	mul	w19, w19, w10
+	bne	.L2056
+	add	w19, w20, w19
+	orr	w19, w19, w22, lsl 24
+.L2057:
+	str	w19, [x26, 40]
+	mov	w1, 1
+	str	w10, [x29, 136]
+	mov	x0, x26
+	bl	sblk_read_page
+	ldr	w0, [x21, #:lo12:.LANCHOR22]
+	ldr	w11, [x26, 52]
+	ldr	w10, [x29, 136]
+	tbz	x0, 12, .L2059
+	ldr	x1, [x26, 24]
+	mov	w4, w11
+	ldr	x0, [x26, 8]
+	mov	w3, w19
+	str	w11, [x29, 136]
+	ldr	w2, [x1, 12]
+	str	w2, [sp, 32]
+	ldr	w2, [x1, 8]
+	str	w2, [sp, 24]
+	ldr	w2, [x1, 4]
+	str	w2, [sp, 16]
+	mov	w2, w20
+	ldr	w1, [x1]
+	str	w1, [sp, 8]
+	ldr	w1, [x0, 12]
+	str	w1, [sp]
+	mov	w1, w10
+	ldp	w5, w6, [x0]
+	ldr	w7, [x0, 8]
+	adrp	x0, .LC73
+	add	x0, x0, :lo12:.LC73
+	bl	printf
+	ldr	w11, [x29, 136]
+.L2059:
+	cmp	w11, 512
+	ldr	w0, [x29, 152]
+	ccmn	w11, #1, 4, ne
+	csinc	w0, w0, wzr, ne
+	str	w0, [x29, 152]
+	ldr	x0, [x26, 24]
+	ldr	w3, [x0, 4]
+	str	w3, [x29, 136]
+	mov	w0, w3
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 172]
+	cmn	w0, #1
+	ldr	w3, [x29, 136]
+	bne	.L2061
+	mov	w2, 0
+	add	x1, x29, 172
+	mov	w0, w3
+	bl	pm_log2phys
+.L2061:
+	ldr	w0, [x29, 172]
+	cmp	w19, w0
+	bne	.L2062
+	ldr	w0, [x29, 156]
+	add	w0, w0, 1
+	str	w0, [x29, 156]
+	ldr	w0, [x21, #:lo12:.LANCHOR22]
+	tbz	x0, 12, .L2062
+	ldr	x0, [x26, 24]
+	mov	w1, w19
+	ldr	w3, [x29, 156]
+	ldr	w2, [x0, 4]
+	adrp	x0, .LC108
+	add	x0, x0, :lo12:.LC108
+	bl	printf
+.L2062:
+	ldr	x0, [x29, 144]
+	cbz	x0, .L2063
+	ubfiz	x19, x27, 2, 32
+	ldr	w2, [x0, x19]
+	ldr	x0, [x26, 24]
+	ldr	w0, [x0, 4]
+	cmp	w0, w2
+	beq	.L2064
+	ldr	w0, [x21, #:lo12:.LANCHOR22]
+	tbz	x0, 12, .L2064
+	ldr	x0, [x29, 104]
+	mov	w1, w27
+	bl	printf
+.L2064:
+	ldr	x1, [x26, 24]
+	ldr	x0, [x29, 144]
+	ldr	w1, [x1, 4]
+	ldr	w0, [x0, x19]
+	cmp	w1, w0
+	beq	.L2063
+	cmn	w0, #1
+	beq	.L2063
+	adrp	x1, .LANCHOR155
+	adrp	x0, .LC0
+	mov	w2, 616
+	add	x1, x1, :lo12:.LANCHOR155
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2065:
+	b	.L2065
+.L2056:
+	cmp	w25, 2
+	bne	.L2058
+	ldr	w0, [x29, 140]
+	add	w19, w19, w0
+	adrp	x0, .LANCHOR64
+	add	w19, w19, w22
+	ldrb	w0, [x0, #:lo12:.LANCHOR64]
+	orr	w19, w19, w0, lsl 24
+	b	.L2057
+.L2058:
+	add	w19, w20, w19
+	b	.L2057
+.L2063:
+	add	w27, w27, 1
+.L2055:
+	add	w22, w22, 1
+	and	w22, w22, 65535
+.L2068:
+	cmp	w25, w22
+	bcs	.L2066
+	add	w24, w24, 1
+	and	w24, w24, 65535
+.L2070:
+	ldrb	w0, [x29, 185]
+	cmp	w0, w24
+	bls	.L2067
+	sxtw	x0, w24
+	mov	w22, 1
+	add	x0, x0, 8
+	lsl	x0, x0, 1
+	str	x0, [x29, 112]
+	b	.L2068
+.L2067:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L2054
+.L2069:
+	mov	x0, x26
+	bl	buf_free
+	ldr	w0, [x21, #:lo12:.LANCHOR22]
+	tbz	x0, 12, .L2071
+	adrp	x0, .LANCHOR56
+	ldr	x1, [x29, 128]
+	ldr	w3, [x29, 156]
+	ldr	x0, [x0, #:lo12:.LANCHOR56]
+	ldrh	w2, [x0, x1, lsl 1]
+	adrp	x0, .LC110
+	mov	w1, w23
+	add	x0, x0, :lo12:.LC110
+	bl	printf
+.L2071:
+	ldr	w0, [x29, 152]
+.L2050:
+	ldp	x19, x20, [sp, 64]
+	ldp	x21, x22, [sp, 80]
+	ldp	x23, x24, [sp, 96]
+	ldp	x25, x26, [sp, 112]
+	ldp	x27, x28, [sp, 128]
+	ldp	x29, x30, [sp, 48]
+	add	sp, sp, 256
+	ret
+.L2072:
+	mov	w0, 0
+	b	.L2050
+	.size	ftl_sblk_dump, .-ftl_sblk_dump
+	.section	.text.gc_search_src_blk,"ax",@progbits
+	.align	2
+	.global	gc_search_src_blk
+	.type	gc_search_src_blk, %function
+gc_search_src_blk:
+	stp	x29, x30, [sp, -160]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x24, .LANCHOR60
+	and	w23, w0, 255
+	and	w0, w1, 255
+	str	w0, [x29, 156]
+	ldr	x0, [x24, #:lo12:.LANCHOR60]
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	add	x0, x0, x23, sxtw 1
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	ldrh	w19, [x0, 120]
+	cbnz	w19, .L2098
+	adrp	x26, .LANCHOR46
+	and	w27, w2, 255
+	ldr	x0, [x26, #:lo12:.LANCHOR46]
+	ldrh	w20, [x0, 134]
+	adrp	x0, .LANCHOR22
+	str	x0, [x29, 144]
+	ldr	w1, [x0, #:lo12:.LANCHOR22]
+	tbz	x1, 8, .L2101
+	ldr	w2, [x29, 156]
+	adrp	x0, .LC111
+	mov	w3, w27
+	mov	w1, w23
+	add	x0, x0, :lo12:.LC111
+	bl	printf
+.L2101:
+	ldr	x0, [x29, 144]
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	tbz	x0, 8, .L2102
+	ldr	x1, [x24, #:lo12:.LANCHOR60]
+	adrp	x2, .LANCHOR57
+	ldr	x0, [x26, #:lo12:.LANCHOR46]
+	ldrh	w3, [x2, #:lo12:.LANCHOR57]
+	ldrh	w2, [x1, 126]
+	ldrh	w1, [x0, 134]
+	adrp	x0, .LC111
+	add	x0, x0, :lo12:.LC111
+	bl	printf
+.L2102:
+	cmp	w27, 64
+	bls	.L2103
+	adrp	x1, .LANCHOR156
+	adrp	x0, .LC0
+	mov	w2, 1028
+	add	x1, x1, :lo12:.LANCHOR156
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2104:
+	b	.L2104
+.L2103:
+	adrp	x0, .LANCHOR69
+	adrp	x22, .LANCHOR79
+	ldrb	w21, [x0, #:lo12:.LANCHOR69]
+	adrp	x0, .LANCHOR68
+	ldrh	w3, [x22, #:lo12:.LANCHOR79]
+	ldrh	w1, [x0, #:lo12:.LANCHOR68]
+	str	x0, [x29, 128]
+	adrp	x0, .LANCHOR54
+	str	x0, [x29, 120]
+	mul	w3, w21, w3
+	mul	w21, w21, w1
+	ldr	x1, [x26, #:lo12:.LANCHOR46]
+	and	w28, w3, 65535
+	and	w21, w21, 65535
+	ldrh	w25, [x1, 134]
+	add	x1, x0, :lo12:.LANCHOR54
+	adrp	x0, .LANCHOR105
+	str	x1, [x29, 136]
+	add	x0, x0, :lo12:.LANCHOR105
+	str	x0, [x29, 112]
+.L2105:
+	ldr	x0, [x29, 136]
+	ldrh	w1, [x0]
+	ldr	x0, [x26, #:lo12:.LANCHOR46]
+	ldrh	w0, [x0, 134]
+	sub	w2, w1, w0
+	cmp	w25, w2
+	blt	.L2117
+.L2114:
+	ldr	x0, [x26, #:lo12:.LANCHOR46]
+	ldrh	w1, [x0, 134]
+	ldr	x0, [x29, 120]
+	ldrh	w0, [x0, #:lo12:.LANCHOR54]
+	sub	w0, w0, w1
+	cmp	w25, w0
+	ldr	x0, [x24, #:lo12:.LANCHOR60]
+	blt	.L2118
+	strh	w1, [x0, 126]
+	cbnz	w23, .L2119
+	adrp	x0, .LANCHOR57
+	ldrh	w1, [x0, #:lo12:.LANCHOR57]
+	cmp	w1, w28
+	bcs	.L2120
+	strh	w28, [x0, #:lo12:.LANCHOR57]
+.L2120:
+	ldrh	w1, [x22, #:lo12:.LANCHOR79]
+	mov	w2, 7
+	ldrh	w3, [x0, #:lo12:.LANCHOR57]
+	mul	w2, w1, w2
+	cmp	w3, w2, lsr 3
+	bge	.L2122
+	add	w1, w3, w1, lsr 3
+	strh	w1, [x0, #:lo12:.LANCHOR57]
+.L2122:
+	ldr	x0, [x29, 144]
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	tbz	x0, 8, .L2128
+	adrp	x0, .LC113
+	mov	w1, w19
+	add	x0, x0, :lo12:.LC113
+	bl	printf
+.L2128:
+	bl	print_ftl_debug_info
+.L2098:
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 160
+	ret
+.L2117:
+	ldr	x2, [x24, #:lo12:.LANCHOR60]
+	ldrh	w20, [x2, 126]
+	add	w20, w25, w20
+	and	w20, w20, 65535
+	cmp	w1, w20
+	bhi	.L2106
+	sub	w0, w0, w1
+	add	w20, w20, w0
+	and	w20, w20, 65535
+	cmp	w1, w20
+	bhi	.L2106
+	adrp	x1, .LANCHOR156
+	adrp	x0, .LC0
+	mov	w2, 1038
+	add	x1, x1, :lo12:.LANCHOR156
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2107:
+	b	.L2107
+.L2106:
+	adrp	x0, .LANCHOR59
+	uxtw	x4, w20
+	ldr	x0, [x0, #:lo12:.LANCHOR59]
+	add	x0, x0, x4, lsl 2
+	ldrb	w1, [x0, 2]
+	mov	w0, 224
+	and	w1, w1, 224
+	cmp	w1, 32
+	ccmp	w1, w0, 4, ne
+	beq	.L2108
+	adrp	x5, .LANCHOR56
+	lsl	x4, x4, 1
+	ldr	x0, [x5, #:lo12:.LANCHOR56]
+	cbnz	w1, .L2109
+	ldrh	w1, [x0, x4]
+	cbz	w1, .L2110
+	mov	w2, w20
+	stp	x5, x4, [x29, 96]
+	adrp	x0, .LC112
+	add	x0, x0, :lo12:.LC112
+	bl	printf
+	mov	x1, 0
+	mov	w0, w20
+	bl	ftl_sblk_dump
+	ldp	x5, x4, [x29, 96]
+.L2110:
+	ldr	x0, [x5, #:lo12:.LANCHOR56]
+	ldrh	w0, [x0, x4]
+	cbz	w0, .L2108
+	adrp	x1, .LANCHOR156
+	adrp	x0, .LC0
+	mov	w2, 1047
+	add	x1, x1, :lo12:.LANCHOR156
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2111:
+	b	.L2111
+.L2109:
+	ldrh	w0, [x0, x4]
+	mov	w2, 65535
+	cmp	w0, w2
+	beq	.L2108
+	cmp	w1, 160
+	ldr	w3, [x29, 156]
+	cset	w2, eq
+	add	w2, w2, 1
+	and	w2, w3, w2
+	cbnz	w23, .L2113
+	cmp	w0, w28
+	csel	w3, w0, w28, cc
+	and	w28, w3, 65535
+	cbz	w2, .L2108
+	adrp	x1, .LANCHOR57
+	ldrh	w1, [x1, #:lo12:.LANCHOR57]
+	cmp	w1, w0
+	bls	.L2108
+	mov	w2, 0
+	mov	w1, 0
+	mov	w0, w20
+	bl	gc_add_sblk
+	cbz	w0, .L2108
+.L2161:
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L2115
+.L2113:
+	cbz	w2, .L2115
+	bne	.L2116
+	adrp	x1, .LANCHOR106
+	cmp	w0, w21
+	csel	w21, w0, w21, cc
+	ldrh	w1, [x1, #:lo12:.LANCHOR106]
+	and	w21, w21, 65535
+	cmp	w1, w0
+	bls	.L2115
+.L2163:
+	mov	w2, w23
+	mov	w1, 0
+	mov	w0, w20
+	bl	gc_add_sblk
+	cbz	w0, .L2115
+	b	.L2161
+.L2116:
+	ldr	x1, [x29, 112]
+	cmp	w0, w28
+	csel	w3, w0, w28, cc
+	and	w28, w3, 65535
+	ldrh	w1, [x1]
+	cmp	w1, w0
+	bls	.L2163
+.L2115:
+	cmp	w19, w27
+	bhi	.L2114
+.L2108:
+	add	w25, w25, 1
+	and	w25, w25, 65535
+	b	.L2105
+.L2119:
+	ldr	x0, [x29, 128]
+	adrp	x1, .LANCHOR70
+	ldrb	w1, [x1, #:lo12:.LANCHOR70]
+	ldrh	w0, [x0, #:lo12:.LANCHOR68]
+	mul	w0, w0, w1
+	adrp	x1, .LANCHOR106
+	cmp	w21, w0
+	beq	.L2123
+	ldrh	w2, [x1, #:lo12:.LANCHOR106]
+	cmp	w2, w21
+	bcs	.L2123
+	strh	w21, [x1, #:lo12:.LANCHOR106]
+.L2123:
+	ldrh	w4, [x22, #:lo12:.LANCHOR79]
+	ldrh	w2, [x1, #:lo12:.LANCHOR106]
+	lsr	w3, w4, 3
+	sub	w0, w0, w3
+	cmp	w2, w0
+	bge	.L2124
+	add	w2, w2, w3
+	strh	w2, [x1, #:lo12:.LANCHOR106]
+.L2124:
+	adrp	x1, .LANCHOR105
+	ldrh	w0, [x1, #:lo12:.LANCHOR105]
+	cmp	w0, w4, lsr 1
+	bls	.L2122
+	sub	w0, w0, w3
+	strh	w0, [x1, #:lo12:.LANCHOR105]
+	b	.L2122
+.L2118:
+	strh	w20, [x0, 126]
+	cbnz	w23, .L2126
+	adrp	x1, .LANCHOR57
+	ldrh	w0, [x22, #:lo12:.LANCHOR79]
+	ldrh	w2, [x1, #:lo12:.LANCHOR57]
+	cmp	w2, w0, lsr 2
+	bls	.L2122
+	sub	w0, w2, w0, lsr 3
+	strh	w0, [x1, #:lo12:.LANCHOR57]
+	b	.L2122
+.L2126:
+	adrp	x0, .LANCHOR106
+	ldrh	w2, [x22, #:lo12:.LANCHOR79]
+	ldrh	w1, [x0, #:lo12:.LANCHOR106]
+	cmp	w1, w2, lsr 1
+	bls	.L2127
+	sub	w1, w1, w2, lsr 3
+	strh	w1, [x0, #:lo12:.LANCHOR106]
+.L2127:
+	adrp	x0, .LANCHOR70
+	adrp	x3, .LANCHOR105
+	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	ldrh	w1, [x3, #:lo12:.LANCHOR105]
+	mul	w0, w0, w2
+	sub	w0, w0, #32
+	cmp	w1, w0
+	bge	.L2122
+	add	w1, w1, 32
+	strh	w1, [x3, #:lo12:.LANCHOR105]
+	b	.L2122
+	.size	gc_search_src_blk, .-gc_search_src_blk
+	.section	.text.ftl_read,"ax",@progbits
+	.align	2
+	.global	ftl_read
+	.type	ftl_read, %function
+ftl_read:
+	stp	x29, x30, [sp, -160]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	mov	x23, x3
+	stp	x25, x26, [sp, 64]
+	mov	w26, w2
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	stp	x27, x28, [sp, 80]
+	cbnz	w0, .L2165
+	adrp	x0, .LANCHOR52
+	ldr	w2, [x0, #:lo12:.LANCHOR52]
+	mov	w0, 24576
+.L2166:
+	add	w3, w1, w26
+	cmp	w2, w3
+	bcc	.L2190
+	add	w22, w0, w1
+	adrp	x1, .LANCHOR46
+	adrp	x24, .LANCHOR45
+	str	x1, [x29, 120]
+	ldr	x2, [x1, #:lo12:.LANCHOR46]
+	ldr	w0, [x2, 24]
+	add	w0, w0, w26
+	str	w0, [x2, 24]
+	ldrb	w0, [x24, #:lo12:.LANCHOR45]
+	add	w2, w26, w22
+	stp	w2, wzr, [x29, 136]
+	sub	w2, w2, #1
+	udiv	w27, w22, w0
+	udiv	w0, w2, w0
+	mov	w20, w27
+	sub	w25, w0, w27
+	str	w0, [x29, 132]
+	add	w25, w25, 1
+	adrp	x0, .LC101
+	add	x0, x0, :lo12:.LC101
+	str	x0, [x29, 112]
+	adrp	x0, .LANCHOR36
+	add	x0, x0, :lo12:.LANCHOR36
+	str	x0, [x29, 104]
+.L2168:
+	cbnz	w25, .L2188
+	ldr	w0, [x29, 140]
+.L2164:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 160
+	ret
+.L2165:
+	cmp	w0, 3
+	bhi	.L2190
+	lsl	w0, w0, 13
+	mov	w2, 8192
+	b	.L2166
+.L2188:
+	ldrb	w1, [x24, #:lo12:.LANCHOR45]
+	cmp	w20, w27
+	ldr	w0, [x29, 132]
+	and	w19, w1, 65535
+	ccmp	w20, w0, 4, ne
+	bne	.L2191
+	cmp	w20, w27
+	bne	.L2170
+	udiv	w21, w22, w1
+	and	w0, w26, 65535
+	msub	w1, w21, w1, w22
+	and	w21, w1, 65535
+	sub	w19, w19, w21
+	and	w19, w19, 65535
+	cmp	w26, w19
+	csel	w19, w0, w19, cc
+.L2169:
+	adrp	x0, .LANCHOR36
+	add	x1, x0, :lo12:.LANCHOR36
+	add	x1, x1, 2
+	mov	w0, 0
+.L2173:
+	ldr	w2, [x1, 34]
+	cmp	w20, w2
+	bne	.L2171
+	ldrb	w2, [x1]
+	tbz	x2, 3, .L2171
+	ldr	x1, [x29, 104]
+	ubfiz	x0, x0, 6, 32
+	lsl	w2, w19, 9
+	ubfiz	x19, x19, 9, 16
+	add	x0, x1, x0
+	ubfiz	x21, x21, 9, 16
+	ldr	x1, [x0, 8]
+	mov	x0, x23
+	add	x23, x23, x19
+	add	x1, x1, x21
+	bl	ftl_memcpy
+.L2172:
+	add	w20, w20, 1
+	sub	w25, w25, #1
+	b	.L2168
+.L2170:
+	ldr	w0, [x29, 136]
+	msub	w19, w1, w20, w0
+	and	w19, w19, 255
+.L2191:
+	mov	w21, 0
+	b	.L2169
+.L2171:
+	add	w0, w0, 1
+	add	x1, x1, 64
+	cmp	w0, 32
+	bne	.L2173
+	mov	w0, w20
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 156]
+	cmn	w0, #1
+	bne	.L2174
+	mov	w2, 0
+	add	x1, x29, 156
+	mov	w0, w20
+	bl	pm_log2phys
+.L2174:
+	ldr	w0, [x29, 156]
+	cmn	w0, #1
+	bne	.L2175
+	add	x21, x24, :lo12:.LANCHOR45
+	mov	w19, 0
+.L2176:
+	ldrb	w0, [x21]
+	cmp	w19, w0
+	bcs	.L2172
+	madd	w0, w20, w0, w19
+	cmp	w22, w0
+	bhi	.L2177
+	ldr	w1, [x29, 136]
+	cmp	w1, w0
+	bls	.L2177
+	mov	x0, x23
+	add	x23, x23, 512
+	mov	w2, 512
+	mov	w1, 0
+	bl	ftl_memset
+.L2177:
+	add	w19, w19, 1
+	b	.L2176
+.L2175:
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x28, x0
+	cbnz	x0, .L2179
+	bl	ftl_read_ahead
+	b	.L2168
+.L2179:
+	ldr	x0, [x29, 120]
+	ldr	x1, [x0, #:lo12:.LANCHOR46]
+	ldr	w0, [x1, 40]
+	add	w0, w0, 1
+	str	w0, [x1, 40]
+	ldr	w0, [x29, 156]
+	stp	w0, w0, [x28, 40]
+	ldrb	w0, [x24, #:lo12:.LANCHOR45]
+	cmp	w0, w19
+	bne	.L2181
+	str	x23, [x28, 16]
+.L2181:
+	mov	w1, 1
+	mov	x0, x28
+	bl	sblk_read_page
+	ldr	w10, [x28, 52]
+	cmn	w10, #1
+	beq	.L2192
+	cmp	w10, 256
+	bne	.L2182
+	adrp	x0, .LANCHOR71
+	mov	w4, 21
+	mov	w5, 1
+	stp	w10, w5, [x29, 96]
+	ldrh	w1, [x0, #:lo12:.LANCHOR71]
+	ldr	w0, [x29, 156]
+	sub	w4, w4, w1
+	ldp	w2, w3, [x28, 36]
+	lsl	w4, w5, w4
+	lsr	w0, w0, w1
+	sub	w4, w4, #1
+	and	w4, w4, w0
+	adrp	x0, .LANCHOR70
+	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	udiv	w4, w4, w0
+	adrp	x0, .LC114
+	add	x0, x0, :lo12:.LC114
+	and	w1, w4, 65535
+	str	w4, [x29, 128]
+	bl	printf
+	ldr	w5, [x29, 100]
+	mov	w2, 0
+	ldr	w4, [x29, 128]
+	mov	w1, w5
+	mov	w0, w4
+	bl	gc_add_sblk
+	ldr	w10, [x29, 96]
+.L2182:
+	ldr	x0, [x28, 24]
+	ldr	w5, [x0, 4]
+	cmp	w20, w5
+	beq	.L2183
+	ldr	w4, [x0]
+	mov	w2, w20
+	ldp	w6, w7, [x0, 8]
+	str	w10, [x29, 128]
+	ldrb	w1, [x28, 1]
+	ldr	w3, [x29, 156]
+	ldr	x0, [x29, 112]
+	bl	printf
+	adrp	x0, .LANCHOR71
+	ldr	w1, [x29, 156]
+	ldrh	w3, [x0, #:lo12:.LANCHOR71]
+	mov	w0, 21
+	sub	w2, w0, w3
+	mov	w0, 1
+	lsr	w1, w1, w3
+	lsl	w0, w0, w2
+	sub	w0, w0, #1
+	and	w0, w0, w1
+	adrp	x1, .LANCHOR70
+	ldrb	w2, [x1, #:lo12:.LANCHOR70]
+	mov	x1, 0
+	udiv	w0, w0, w2
+	bl	ftl_sblk_dump
+	ldr	w10, [x29, 128]
+.L2183:
+	ldr	x0, [x28, 24]
+	ldr	w0, [x0, 4]
+	cmp	w20, w0
+	bne	.L2184
+	cmn	w10, #1
+	bne	.L2185
+.L2184:
+	adrp	x1, .LANCHOR157
+	adrp	x0, .LC0
+	mov	w2, 911
+	add	x1, x1, :lo12:.LANCHOR157
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2186:
+	b	.L2186
+.L2192:
+	str	w10, [x29, 140]
+	b	.L2182
+.L2185:
+	ldr	x0, [x28, 16]
+	cbnz	x0, .L2187
+	ldr	x1, [x28, 8]
+	ubfiz	x21, x21, 9, 16
+	lsl	w2, w19, 9
+	mov	x0, x23
+	add	x1, x1, x21
+	bl	ftl_memcpy
+.L2187:
+	ubfiz	x19, x19, 9, 16
+	mov	x0, x28
+	add	x23, x23, x19
+	bl	buf_free
+	b	.L2172
+.L2190:
+	mov	w0, -1
+	b	.L2164
+	.size	ftl_read, .-ftl_read
+	.section	.text.FtlRead,"ax",@progbits
+	.align	2
+	.global	FtlRead
+	.type	FtlRead, %function
+FtlRead:
+	and	w0, w0, 255
+	b	ftl_read
+	.size	FtlRead, .-FtlRead
+	.section	.text.StorageSysDataLoad,"ax",@progbits
+	.align	2
+	.global	StorageSysDataLoad
+	.type	StorageSysDataLoad, %function
+StorageSysDataLoad:
+	stp	x29, x30, [sp, -32]!
+	mov	w2, 512
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x1
+	mov	w20, w0
+	mov	w1, 0
+	mov	x0, x19
+	bl	ftl_memset
+	mov	x3, x19
+	mov	w1, w20
+	ldp	x19, x20, [sp, 16]
+	mov	w2, 1
+	ldp	x29, x30, [sp], 32
+	mov	w0, 2
+	b	ftl_read
+	.size	StorageSysDataLoad, .-StorageSysDataLoad
+	.section	.text.vpn_check,"ax",@progbits
+	.align	2
+	.global	vpn_check
+	.type	vpn_check, %function
+vpn_check:
+	stp	x29, x30, [sp, -112]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR60
+	stp	x21, x22, [sp, 32]
+	adrp	x20, .LANCHOR56
+	stp	x23, x24, [sp, 48]
+	adrp	x21, .LANCHOR47
+	stp	x25, x26, [sp, 64]
+	adrp	x22, .LANCHOR54
+	str	x27, [sp, 80]
+	bl	dump_ftl_info
+	ldr	x0, [x19, #:lo12:.LANCHOR60]
+	mov	w24, 0
+	add	x21, x21, :lo12:.LANCHOR47
+	add	x23, x22, :lo12:.LANCHOR54
+	ldrh	w3, [x0, 80]
+	ldrh	w2, [x0, 48]
+	ldrh	w1, [x0, 16]
+	adrp	x0, .LC115
+	add	x0, x0, :lo12:.LC115
+	bl	printf
+	ldr	x0, [x19, #:lo12:.LANCHOR60]
+	ldr	x3, [x20, #:lo12:.LANCHOR56]
+	ldrh	w1, [x0, 16]
+	ldrh	w2, [x0, 22]
+	ubfiz	x0, x1, 1, 16
+	ldrh	w3, [x3, x0]
+	adrp	x0, .LC116
+	add	x0, x0, :lo12:.LC116
+	sub	w4, w3, w2
+	bl	printf
+	ldr	x0, [x19, #:lo12:.LANCHOR60]
+	adrp	x19, check_vpc_tbl
+	ldr	x3, [x20, #:lo12:.LANCHOR56]
+	ldrh	w1, [x0, 48]
+	ldrh	w2, [x0, 54]
+	ubfiz	x0, x1, 1, 16
+	ldrh	w3, [x3, x0]
+	adrp	x0, .LC117
+	add	x0, x0, :lo12:.LC117
+	sub	w4, w3, w2
+	bl	printf
+	mov	w2, 4352
+	mov	w1, 0
+	add	x0, x19, :lo12:check_vpc_tbl
+	bl	ftl_memset
+.L2202:
+	ldr	w0, [x21]
+	cmp	w24, w0
+	bcc	.L2210
+	adrp	x0, .LANCHOR54
+	adrp	x23, .LC120
+	add	x24, x0, :lo12:.LANCHOR54
+	mov	x22, x0
+	add	x23, x23, :lo12:.LC120
+	mov	w21, 0
+.L2211:
+	ldrh	w0, [x24]
+	cmp	w0, w21
+	bhi	.L2213
+	adrp	x23, .LC121
+	add	x22, x22, :lo12:.LANCHOR54
+	add	x19, x19, :lo12:check_vpc_tbl
+	add	x23, x23, :lo12:.LC121
+	mov	w21, 0
+	adrp	x27, .LANCHOR59
+.L2214:
+	ldrh	w0, [x22]
+	cmp	w0, w21
+	bhi	.L2219
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L2210:
+	mov	w0, w24
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 108]
+	cmn	w0, #1
+	bne	.L2203
+	mov	w2, 0
+	add	x1, x29, 108
+	mov	w0, w24
+	bl	pm_log2phys
+.L2204:
+	ldr	w2, [x29, 108]
+	cmn	w2, #1
+	beq	.L2206
+	adrp	x0, .LANCHOR71
+	mov	w3, 21
+	ldrh	w0, [x0, #:lo12:.LANCHOR71]
+	sub	w1, w3, w0
+	mov	w3, 1
+	lsr	w0, w2, w0
+	lsl	w3, w3, w1
+	sub	w3, w3, #1
+	and	w3, w3, w0
+	adrp	x0, .LANCHOR70
+	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	udiv	w3, w3, w0
+	ldrh	w0, [x22, #:lo12:.LANCHOR54]
+	and	w25, w3, 65535
+	and	w3, w3, 65535
+	cmp	w0, w25
+	bls	.L2207
+	add	x0, x19, :lo12:check_vpc_tbl
+	sxtw	x3, w3
+	ldrh	w1, [x0, x3, lsl 1]
+	add	w1, w1, 1
+	strh	w1, [x0, x3, lsl 1]
+.L2208:
+	ldrh	w0, [x23]
+	cmp	w0, w25
+	bhi	.L2206
+	adrp	x1, .LANCHOR158
+	adrp	x0, .LC0
+	mov	w2, 1111
+	add	x1, x1, :lo12:.LANCHOR158
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2209:
+	b	.L2209
+.L2203:
+	adrp	x1, .LANCHOR71
+	ldrh	w3, [x1, #:lo12:.LANCHOR71]
+	mov	w1, 21
+	sub	w2, w1, w3
+	mov	w1, 1
+	lsr	w0, w0, w3
+	lsl	w1, w1, w2
+	sub	w1, w1, #1
+	and	w0, w1, w0
+	adrp	x1, .LANCHOR70
+	ldrb	w1, [x1, #:lo12:.LANCHOR70]
+	udiv	w0, w0, w1
+	ldrh	w1, [x22, #:lo12:.LANCHOR54]
+	cmp	w1, w0, uxth
+	bhi	.L2204
+	adrp	x1, .LANCHOR158
+	adrp	x0, .LC0
+	mov	w2, 1101
+	add	x1, x1, :lo12:.LANCHOR158
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2205:
+	b	.L2205
+.L2207:
+	mov	w1, w24
+	adrp	x0, .LC118
+	add	x0, x0, :lo12:.LC118
+	bl	printf
+	adrp	x0, .LANCHOR45
+	mov	w2, 4
+	ldrb	w3, [x0, #:lo12:.LANCHOR45]
+	adrp	x0, .LANCHOR93+8
+	ldr	x1, [x0, #:lo12:.LANCHOR93+8]
+	adrp	x0, .LC119
+	lsl	w3, w3, 7
+	add	x0, x0, :lo12:.LC119
+	bl	rknand_print_hex
+	b	.L2208
+.L2206:
+	add	w24, w24, 1
+	b	.L2202
+.L2213:
+	ldr	x1, [x20, #:lo12:.LANCHOR56]
+	uxtw	x0, w21
+	ldrh	w3, [x1, x0, lsl 1]
+	add	x1, x19, :lo12:check_vpc_tbl
+	ldrh	w2, [x1, w21, sxtw 1]
+	cmp	w3, w2
+	beq	.L2212
+	adrp	x1, .LANCHOR59
+	ldr	x1, [x1, #:lo12:.LANCHOR59]
+	add	x0, x1, x0, lsl 2
+	mov	w1, w21
+	ldrb	w4, [x0, 2]
+	mov	x0, x23
+	ubfx	x4, x4, 5, 3
+	bl	printf
+.L2212:
+	add	w21, w21, 1
+	and	w21, w21, 65535
+	b	.L2211
+.L2219:
+	ldr	x0, [x27, #:lo12:.LANCHOR59]
+	uxtw	x24, w21
+	add	x0, x0, x24, lsl 2
+	ldrb	w0, [x0, 2]
+	tst	w0, 224
+	bne	.L2215
+	sxtw	x25, w21
+	ldrh	w0, [x19, x25, lsl 1]
+	cbnz	w0, .L2216
+	ldr	x0, [x20, #:lo12:.LANCHOR56]
+	lsl	x26, x24, 1
+	ldrh	w0, [x0, x26]
+	cbz	w0, .L2217
+	mov	w1, w21
+	mov	x0, x23
+	bl	printf
+.L2217:
+	ldr	x0, [x20, #:lo12:.LANCHOR56]
+	strh	wzr, [x0, x26]
+.L2216:
+	ldr	x0, [x20, #:lo12:.LANCHOR56]
+	ldrh	w0, [x0, x24, lsl 1]
+	cbz	w0, .L2215
+	ldrh	w0, [x19, x25, lsl 1]
+	cbz	w0, .L2215
+	adrp	x1, .LANCHOR158
+	adrp	x0, .LC0
+	mov	w2, 1143
+	add	x1, x1, :lo12:.LANCHOR158
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2218:
+	b	.L2218
+.L2215:
+	add	w21, w21, 1
+	and	w21, w21, 65535
+	b	.L2214
+	.size	vpn_check, .-vpn_check
+	.section	.text.ftl_info_check,"ax",@progbits
+	.align	2
+	.global	ftl_info_check
+	.type	ftl_info_check, %function
+ftl_info_check:
+	stp	x29, x30, [sp, -128]!
+	adrp	x0, .LANCHOR46
+	add	x29, sp, 0
+	ldr	x1, [x0, #:lo12:.LANCHOR46]
+	stp	x27, x28, [sp, 80]
+	adrp	x27, .LC122
+	stp	x25, x26, [sp, 64]
+	add	x27, x27, :lo12:.LC122
+	adrp	x26, .LANCHOR54
+	stp	x21, x22, [sp, 32]
+	ldrh	w28, [x1, 134]
+	mov	w25, 0
+	stp	x23, x24, [sp, 48]
+	mov	w21, 0
+	stp	x19, x20, [sp, 16]
+	mov	w23, 0
+	str	x0, [x29, 112]
+	mov	w24, 0
+	add	x0, x26, :lo12:.LANCHOR54
+	mov	w20, 0
+	mov	w22, 0
+	adrp	x26, .LANCHOR56
+	str	x0, [x29, 120]
+.L2234:
+	ldr	x0, [x29, 120]
+	ldrh	w0, [x0]
+	cmp	w0, w28
+	bhi	.L2249
+	mov	w3, w20
+	mov	w2, w21
+	mov	w1, w22
+	adrp	x0, .LC123
+	add	x0, x0, :lo12:.LC123
+	bl	printf
+	mov	w1, w25
+	mov	w3, w23
+	mov	w2, w24
+	adrp	x0, .LC124
+	add	x0, x0, :lo12:.LC124
+	bl	printf
+	ldr	x0, [x29, 112]
+	ldr	x0, [x0, #:lo12:.LANCHOR46]
+	ldrh	w1, [x0, 114]
+	cmp	w1, w25
+	beq	.L2250
+	strh	w25, [x0, 114]
+.L2250:
+	ldrh	w1, [x0, 118]
+	cmp	w1, w24
+	beq	.L2251
+	strh	w24, [x0, 118]
+.L2251:
+	ldrh	w1, [x0, 116]
+	cmp	w1, w23
+	beq	.L2252
+	strh	w23, [x0, 116]
+.L2252:
+	ldrh	w1, [x0, 122]
+	cmp	w1, w22
+	beq	.L2253
+	strh	w22, [x0, 122]
+.L2253:
+	ldrh	w1, [x0, 120]
+	cmp	w1, w21
+	beq	.L2254
+	strh	w21, [x0, 120]
+.L2254:
+	ldrh	w1, [x0, 124]
+	cmp	w1, w20
+	beq	.L2233
+	strh	w20, [x0, 124]
+.L2233:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+.L2249:
+	adrp	x0, .LANCHOR59
+	uxtw	x19, w28
+	ldr	x4, [x0, #:lo12:.LANCHOR59]
+	add	x4, x4, x19, lsl 2
+	ldrb	w0, [x4, 2]
+	and	w1, w0, 224
+	cmp	w1, 64
+	bne	.L2235
+	add	w22, w22, 1
+	and	w22, w22, 65535
+.L2268:
+	ldr	x0, [x26, #:lo12:.LANCHOR56]
+	ldrh	w1, [x0, x19, lsl 1]
+	cmp	w1, 15
+	bls	.L2241
+	adrp	x0, .LANCHOR79
+	ldrh	w0, [x0, #:lo12:.LANCHOR79]
+.L2265:
+	adrp	x2, .LANCHOR69
+	ldrb	w2, [x2, #:lo12:.LANCHOR69]
+	mul	w0, w0, w2
+	cmp	w1, w0
+	bne	.L2237
+.L2241:
+	mov	w2, 0
+	mov	w1, 1
+	mov	w0, w28
+	bl	gc_add_sblk
+.L2237:
+	add	w3, w28, 1
+	and	w28, w3, 65535
+	b	.L2234
+.L2235:
+	cmp	w1, 96
+	bne	.L2238
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L2268
+.L2238:
+	cmp	w1, 160
+	bne	.L2240
+	ldr	x0, [x26, #:lo12:.LANCHOR56]
+	add	w21, w21, 1
+	and	w21, w21, 65535
+	ldrh	w1, [x0, x19, lsl 1]
+	cmp	w1, 15
+	bls	.L2241
+	adrp	x0, .LANCHOR68
+	ldrh	w0, [x0, #:lo12:.LANCHOR68]
+	b	.L2265
+.L2240:
+	cbnz	w1, .L2237
+	ands	w0, w0, 24
+	bne	.L2242
+	add	w25, w25, 1
+	and	w25, w25, 65535
+.L2243:
+	ldr	x0, [x26, #:lo12:.LANCHOR56]
+	lsl	x19, x19, 1
+	ldrh	w2, [x0, x19]
+	cbz	w2, .L2245
+	str	x4, [x29, 104]
+	mov	w1, w28
+	mov	x0, x27
+	bl	printf
+	ldr	x4, [x29, 104]
+	ldrb	w0, [x4, 2]
+	tbz	x0, 4, .L2246
+	mov	w1, 5
+.L2263:
+	bfi	w0, w1, 5, 3
+	strb	w0, [x4, 2]
+	mov	w2, 0
+	mov	w1, 1
+	mov	w0, w28
+	bl	gc_add_sblk
+	bl	vpn_check
+.L2245:
+	adrp	x0, .LANCHOR56
+	ldr	x0, [x0, #:lo12:.LANCHOR56]
+	ldrh	w0, [x0, x19]
+	cbz	w0, .L2237
+	adrp	x1, .LANCHOR159
+	adrp	x0, .LC0
+	mov	w2, 1202
+	add	x1, x1, :lo12:.LANCHOR159
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2248:
+	b	.L2248
+.L2242:
+	cmp	w0, 16
+	bne	.L2244
+	add	w24, w24, 1
+	and	w24, w24, 65535
+	b	.L2243
+.L2244:
+	add	w23, w23, 1
+	and	w23, w23, 65535
+	b	.L2243
+.L2246:
+	mov	w1, 2
+	b	.L2263
+	.size	ftl_info_check, .-ftl_info_check
+	.section	.text.gc_scan_src_blk,"ax",@progbits
+	.align	2
+	.global	gc_scan_src_blk
+	.type	gc_scan_src_blk, %function
+gc_scan_src_blk:
+	stp	x29, x30, [sp, -96]!
+	mov	w0, 65535
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR58
+	stp	x21, x22, [sp, 32]
+	ldrh	w1, [x19, #:lo12:.LANCHOR58]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	cmp	w1, w0
+	bne	.L2270
+	adrp	x1, .LANCHOR160
+	adrp	x0, .LC0
+	mov	w2, 880
+	add	x1, x1, :lo12:.LANCHOR160
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2271:
+	b	.L2271
+.L2270:
+	adrp	x0, .LANCHOR22
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	tbz	x0, 8, .L2272
+	adrp	x2, .LANCHOR56
+	ubfiz	x0, x1, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR56]
+	ldrh	w2, [x2, x0]
+	adrp	x0, .LC125
+	add	x0, x0, :lo12:.LC125
+	bl	printf
+.L2272:
+	ldrh	w0, [x19, #:lo12:.LANCHOR58]
+	add	x13, x19, :lo12:.LANCHOR58
+	add	x1, x13, 40
+	bl	ftl_get_blk_list_in_sblk
+	and	w1, w0, 255
+	strb	w1, [x13, 5]
+	cbnz	w1, .L2273
+	mov	w0, -1
+	strh	w0, [x19, #:lo12:.LANCHOR58]
+.L2309:
+	mov	w0, 0
+.L2269:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	ret
+.L2273:
+	adrp	x1, .LANCHOR59
+	ldrh	w3, [x19, #:lo12:.LANCHOR58]
+	ldr	x1, [x1, #:lo12:.LANCHOR59]
+	mov	x2, x3
+	add	x1, x1, x3, lsl 2
+	ldrb	w1, [x1, 2]
+	and	w1, w1, 224
+	cmp	w1, 32
+	beq	.L2275
+	cmp	w1, 224
+	beq	.L2275
+	cbz	w1, .L2276
+	adrp	x3, .LANCHOR60
+	ldr	x3, [x3, #:lo12:.LANCHOR60]
+	ldrh	w4, [x3, 16]
+	cmp	w4, w2
+	beq	.L2275
+	ldrh	w4, [x3, 48]
+	cmp	w4, w2
+	beq	.L2275
+	ldrh	w3, [x3, 80]
+	cmp	w3, w2
+	bne	.L2307
+.L2275:
+	add	x0, x19, :lo12:.LANCHOR58
+	mov	w1, -1
+	strh	w1, [x19, #:lo12:.LANCHOR58]
+	strh	wzr, [x0, 24]
+	b	.L2309
+.L2276:
+	adrp	x0, .LANCHOR56
+	ldr	x0, [x0, #:lo12:.LANCHOR56]
+	ldrh	w0, [x0, x3, lsl 1]
+	cbz	w0, .L2275
+	adrp	x1, .LANCHOR160
+	adrp	x0, .LC0
+	mov	w2, 900
+	add	x1, x1, :lo12:.LANCHOR160
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2278:
+	b	.L2278
+.L2307:
+	and	w0, w0, 255
+	sub	w0, w0, #1
+	add	x0, x13, x0, sxtw 1
+	ldrh	w3, [x0, 40]
+	mov	w0, 65535
+	cmp	w3, w0
+	bne	.L2279
+	adrp	x1, .LANCHOR160
+	adrp	x0, .LC0
+	mov	w2, 908
+	add	x1, x1, :lo12:.LANCHOR160
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2280:
+	b	.L2280
+.L2279:
+	adrp	x4, .LANCHOR75
+	adrp	x2, .LANCHOR79
+	cmp	w1, 160
+	mov	x24, x2
+	ldrh	w20, [x4, #:lo12:.LANCHOR75]
+	adrp	x21, .LANCHOR68
+	ldrh	w0, [x2, #:lo12:.LANCHOR79]
+	sub	w0, w0, #1
+	and	w0, w0, 65535
+	mul	w20, w20, w3
+	bne	.L2294
+	adrp	x1, .LANCHOR64
+	ldrb	w1, [x1, #:lo12:.LANCHOR64]
+	and	w22, w1, 65535
+	cmp	w1, 2
+	orr	w20, w20, w1, lsl 24
+	bne	.L2281
+	ldrh	w0, [x21, #:lo12:.LANCHOR68]
+	mov	w22, 2
+	sub	w0, w0, #1
+	and	w0, w0, 65535
+.L2281:
+	add	x23, x19, :lo12:.LANCHOR58
+	orr	w20, w0, w20
+	mov	w0, 1
+	strb	w22, [x23, 6]
+	strh	wzr, [x23, 2]
+	strb	wzr, [x23, 4]
+	strh	wzr, [x23, 26]
+	bl	buf_alloc
+	str	w20, [x0, 40]
+	adrp	x20, .LANCHOR69
+	mov	x25, x0
+	mov	w1, 1
+	bl	sblk_read_page
+	ldrh	w2, [x21, #:lo12:.LANCHOR68]
+	adrp	x21, .LANCHOR61
+	ldrb	w0, [x20, #:lo12:.LANCHOR69]
+	mov	w1, 255
+	mul	w2, w2, w0
+	ldr	x0, [x21, #:lo12:.LANCHOR61]
+	lsl	w2, w2, 2
+	bl	ftl_memset
+	strh	wzr, [x23, 24]
+	ldr	w0, [x25, 52]
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	bne	.L2282
+.L2284:
+	mov	w0, -1
+	b	.L2269
+.L2294:
+	mov	w22, 1
+	b	.L2281
+.L2282:
+	ldr	x0, [x25, 24]
+	mov	w23, 15555
+	movk	w23, 0xf55f, lsl 16
+	ldr	w0, [x0]
+	cmp	w0, w23
+	beq	.L2283
+	ldrh	w0, [x19, #:lo12:.LANCHOR58]
+	mov	x1, 0
+	bl	ftl_sblk_dump
+	ldr	x0, [x25, 24]
+	ldr	w0, [x0]
+	cmp	w0, w23
+	beq	.L2284
+	adrp	x1, .LANCHOR160
+	adrp	x0, .LC0
+	mov	w2, 937
+	add	x1, x1, :lo12:.LANCHOR160
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2285:
+	b	.L2285
+.L2283:
+	ldrh	w0, [x24, #:lo12:.LANCHOR79]
+	adrp	x23, .LANCHOR70
+	ldrb	w20, [x20, #:lo12:.LANCHOR69]
+	add	x23, x23, :lo12:.LANCHOR70
+	ldr	x24, [x25, 8]
+	mov	x26, 0
+	mul	w20, w20, w0
+	mul	w20, w22, w20
+	adrp	x22, .LANCHOR71
+	add	x22, x22, :lo12:.LANCHOR71
+	and	w20, w20, 65535
+.L2286:
+	cmp	w20, w26
+	bgt	.L2291
+	mov	x0, x25
+	bl	buf_free
+	ldrh	w1, [x19, #:lo12:.LANCHOR58]
+	adrp	x20, .LANCHOR56
+	add	x0, x19, :lo12:.LANCHOR58
+	ldr	x3, [x20, #:lo12:.LANCHOR56]
+	ubfiz	x2, x1, 1, 16
+	ldrh	w2, [x3, x2]
+	ldrh	w3, [x0, 24]
+	cmp	w2, w3
+	beq	.L2292
+	adrp	x0, .LC126
+	add	x0, x0, :lo12:.LC126
+	bl	printf
+.L2292:
+	ldrh	w2, [x19, #:lo12:.LANCHOR58]
+	add	x0, x19, :lo12:.LANCHOR58
+	ldr	x1, [x20, #:lo12:.LANCHOR56]
+	ldrh	w0, [x0, 24]
+	ldrh	w1, [x1, x2, lsl 1]
+	cmp	w1, w0
+	bcs	.L2293
+	bl	vpn_check
+.L2293:
+	add	x0, x19, :lo12:.LANCHOR58
+	ldrh	w2, [x19, #:lo12:.LANCHOR58]
+	ldr	x1, [x20, #:lo12:.LANCHOR56]
+	ldrh	w3, [x0, 24]
+	strh	w3, [x1, x2, lsl 1]
+	strh	wzr, [x0, 28]
+	ldrh	w0, [x0, 24]
+	b	.L2269
+.L2291:
+	ldr	w0, [x24, x26, lsl 2]
+	cmn	w0, #1
+	beq	.L2288
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 92]
+	cmn	w0, #1
+	bne	.L2289
+	ldr	w0, [x24, x26, lsl 2]
+	mov	w2, 0
+	add	x1, x29, 92
+	bl	pm_log2phys
+.L2289:
+	ldrh	w1, [x22]
+	mov	w0, 21
+	ldr	w3, [x29, 92]
+	sub	w2, w0, w1
+	mov	w0, 1
+	lsl	w0, w0, w2
+	sub	w0, w0, #1
+	lsr	w1, w3, w1
+	and	w0, w0, w1
+	ldrb	w1, [x23]
+	ldrh	w2, [x19, #:lo12:.LANCHOR58]
+	udiv	w0, w0, w1
+	add	x1, x19, :lo12:.LANCHOR58
+	cmp	w0, w2
+	bne	.L2288
+	ldrh	w0, [x1, 24]
+	ldr	x4, [x21, #:lo12:.LANCHOR61]
+	ubfiz	x2, x0, 2, 16
+	add	w0, w0, 1
+	str	w3, [x4, x2]
+	strh	w0, [x1, 24]
+.L2288:
+	add	x26, x26, 1
+	b	.L2286
+	.size	gc_scan_src_blk, .-gc_scan_src_blk
+	.section	.text.ftl_scan_all_data,"ax",@progbits
+	.align	2
+	.global	ftl_scan_all_data
+	.type	ftl_scan_all_data, %function
+ftl_scan_all_data:
+	sub	sp, sp, #160
+	mov	w0, 0
+	stp	x29, x30, [sp, 16]
+	add	x29, sp, 16
+	stp	x19, x20, [sp, 32]
+	mov	w20, 0
+	stp	x23, x24, [sp, 64]
+	adrp	x23, .LANCHOR47
+	stp	x27, x28, [sp, 96]
+	add	x28, x23, :lo12:.LANCHOR47
+	stp	x21, x22, [sp, 48]
+	adrp	x24, .LC129
+	stp	x25, x26, [sp, 80]
+	bl	buf_alloc
+	mov	w1, 0
+	mov	x19, x0
+	adrp	x0, .LC127
+	add	x0, x0, :lo12:.LC127
+	bl	printf
+	add	x0, x24, :lo12:.LC129
+	str	x0, [x29, 120]
+.L2311:
+	ldr	w0, [x23, #:lo12:.LANCHOR47]
+	cmp	w20, w0
+	bcc	.L2324
+	mov	x0, x19
+	bl	buf_free
+	ldp	x29, x30, [sp, 16]
+	ldp	x19, x20, [sp, 32]
+	ldp	x21, x22, [sp, 48]
+	ldp	x23, x24, [sp, 64]
+	ldp	x25, x26, [sp, 80]
+	ldp	x27, x28, [sp, 96]
+	add	sp, sp, 160
+	ret
+.L2324:
+	mov	w0, -1
+	str	w0, [x19, 36]
+	tst	x20, 4095
+	bne	.L2312
+	ldr	w2, [x29, 140]
+	adrp	x0, .LC128
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC128
+	bl	printf
+.L2312:
+	mov	w0, w20
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 140]
+	cmn	w0, #1
+	bne	.L2313
+	mov	w2, 0
+	add	x1, x29, 140
+	mov	w0, w20
+	bl	pm_log2phys
+.L2313:
+	ldr	w0, [x29, 140]
+	stp	w0, w0, [x19, 40]
+	cmn	w0, #1
+	bne	.L2314
+.L2316:
+	add	w20, w20, 1
+	b	.L2311
+.L2314:
+	mov	w1, 1
+	mov	x0, x19
+	bl	sblk_read_page
+	ldr	w3, [x19, 52]
+	ldr	x0, [x19, 24]
+	cmp	w3, 256
+	ccmn	w3, #1, 4, ne
+	beq	.L2315
+	ldr	w1, [x0, 4]
+	cmp	w20, w1
+	beq	.L2316
+.L2315:
+	ldr	x1, [x19, 8]
+	add	x27, x24, :lo12:.LC129
+	adrp	x25, .LANCHOR45
+	adrp	x26, .LC130
+	adrp	x22, .LANCHOR93
+	ldr	w2, [x1, 4]
+	str	w2, [sp, 8]
+	ldr	w1, [x1]
+	str	w1, [sp]
+	mov	w1, w20
+	ldp	w4, w5, [x0]
+	ldp	w6, w7, [x0, 8]
+	mov	x0, x27
+	ldr	w2, [x19, 40]
+	bl	printf
+	ldr	x1, [x19, 24]
+	ldr	w0, [x1, 8]
+	cmn	w0, #1
+	bne	.L2317
+.L2319:
+	ldrb	w21, [x25, #:lo12:.LANCHOR45]
+	mov	w0, w20
+	bl	lpa_hash_get_ppa
+	add	x22, x22, :lo12:.LANCHOR93
+	mov	w4, w0
+	add	x0, x26, :lo12:.LC130
+	lsl	w27, w21, 7
+	ubfiz	w3, w21, 7, 9
+	sub	w3, w3, #1
+	add	x21, x22, 8
+	and	w3, w3, w20
+	adrp	x26, .LC132
+	sdiv	w27, w20, w27
+	and	w3, w3, 65535
+	add	x22, x22, 520
+	add	x26, x26, :lo12:.LC132
+	mov	w1, w20
+	and	w25, w27, 65535
+	mov	w2, w25
+	bl	printf
+	mov	w2, 0
+	add	x1, x29, 140
+	mov	w0, w20
+	bl	pm_log2phys
+.L2318:
+	ldr	x1, [x21]
+	cbz	x1, .L2323
+	ldrh	w0, [x21, -8]
+	cmp	w0, w25
+	bne	.L2323
+	mov	w3, 4096
+	mov	w2, 4
+	mov	x0, x26
+	bl	rknand_print_hex
+.L2323:
+	add	x21, x21, 16
+	cmp	x22, x21
+	bne	.L2318
+	b	.L2316
+.L2317:
+	ldr	w21, [x1, 4]
+	ldr	w1, [x28]
+	cmp	w21, w1
+	bcs	.L2319
+	str	w0, [x19, 40]
+	mov	w1, 1
+	mov	x0, x19
+	bl	sblk_read_page
+	ldr	x1, [x19, 8]
+	ldr	x0, [x19, 24]
+	ldr	w2, [x1, 4]
+	str	w2, [sp, 8]
+	ldr	w1, [x1]
+	str	w1, [sp]
+	mov	w1, w20
+	ldp	w4, w5, [x0]
+	ldp	w6, w7, [x0, 8]
+	mov	x0, x27
+	ldr	w2, [x19, 40]
+	ldr	w3, [x19, 52]
+	bl	printf
+	mov	w0, w21
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 140]
+	cmn	w0, #1
+	bne	.L2320
+	mov	w2, 0
+	add	x1, x29, 140
+	mov	w0, w21
+	bl	pm_log2phys
+.L2320:
+	ldr	w0, [x29, 140]
+	mov	w1, 1
+	str	w0, [x19, 40]
+	mov	x0, x19
+	bl	sblk_read_page
+	ldr	x1, [x19, 8]
+	ldr	x0, [x19, 24]
+	ldr	w2, [x1, 4]
+	str	w2, [sp, 8]
+	ldr	w1, [x1]
+	str	w1, [sp]
+	mov	w1, w21
+	ldp	w4, w5, [x0]
+	ldp	w6, w7, [x0, 8]
+	ldr	w2, [x19, 40]
+	ldr	w3, [x19, 52]
+	ldr	x0, [x29, 120]
+	bl	printf
+	ldrb	w3, [x25, #:lo12:.LANCHOR45]
+	mov	w0, w21
+	str	w3, [x29, 104]
+	lsl	w2, w3, 7
+	udiv	w2, w21, w2
+	and	w27, w2, 65535
+	str	w2, [x29, 112]
+	bl	lpa_hash_get_ppa
+	mov	w4, w0
+	ldr	w3, [x29, 104]
+	mov	w1, w21
+	ldr	w2, [x29, 112]
+	add	x0, x26, :lo12:.LC130
+	ubfiz	w3, w3, 7, 9
+	and	w2, w2, 65535
+	sub	w3, w3, #1
+	and	w3, w3, w21
+	and	w3, w3, 65535
+	bl	printf
+	mov	w0, w21
+	mov	w2, 0
+	add	x1, x29, 140
+	bl	pm_log2phys
+	add	x0, x22, :lo12:.LANCHOR93
+	adrp	x5, .LC131
+	add	x21, x0, 8
+	add	x4, x0, 520
+	add	x5, x5, :lo12:.LC131
+.L2322:
+	ldr	x1, [x21]
+	cbz	x1, .L2321
+	ldrh	w0, [x21, -8]
+	cmp	w0, w27
+	bne	.L2321
+	mov	x0, x5
+	stp	x4, x5, [x29, 104]
+	mov	w3, 4096
+	mov	w2, 4
+	bl	rknand_print_hex
+	ldp	x4, x5, [x29, 104]
+.L2321:
+	add	x21, x21, 16
+	cmp	x4, x21
+	bne	.L2322
+	b	.L2319
+	.size	ftl_scan_all_data, .-ftl_scan_all_data
+	.section	.text.gc_recovery,"ax",@progbits
+	.align	2
+	.global	gc_recovery
+	.type	gc_recovery, %function
+gc_recovery:
+	sub	sp, sp, #240
+	adrp	x0, .LANCHOR67
+	stp	x29, x30, [sp, 32]
+	add	x29, sp, 32
+	stp	x21, x22, [sp, 64]
+	adrp	x21, .LANCHOR60
+	stp	x19, x20, [sp, 48]
+	ldr	x20, [x21, #:lo12:.LANCHOR60]
+	strb	wzr, [x0, #:lo12:.LANCHOR67]
+	adrp	x0, .LANCHOR104
+	stp	x23, x24, [sp, 80]
+	strb	wzr, [x0, #:lo12:.LANCHOR104]
+	stp	x25, x26, [sp, 96]
+	stp	x27, x28, [sp, 112]
+	bl	gc_init
+	add	x0, x20, 80
+	ldrh	w1, [x20, 80]
+	str	x0, [x29, 168]
+	mov	w0, 65535
+	cmp	w1, w0
+	ldr	x0, [x21, #:lo12:.LANCHOR60]
+	beq	.L2335
+	mov	w1, -1
+	strh	w1, [x0, 130]
+	mov	w0, 1
+	bl	buf_alloc
+	mov	x27, x0
+	ldrb	w0, [x20, 89]
+	add	x1, x20, 80
+	adrp	x3, .LANCHOR75
+	adrp	x2, .LANCHOR64
+	sub	w0, w0, #1
+	str	x3, [x29, 128]
+	add	x0, x1, x0, sxtw 1
+	ldrh	w1, [x3, #:lo12:.LANCHOR75]
+	str	x2, [x29, 160]
+	ldrh	w0, [x0, 16]
+	mul	w1, w0, w1
+	ldrb	w0, [x2, #:lo12:.LANCHOR64]
+	str	w1, [x29, 200]
+	cmp	w0, 3
+	bne	.L2336
+	adrp	x0, .LANCHOR79
+	ldrh	w0, [x0, #:lo12:.LANCHOR79]
+	sub	w0, w0, #1
+	add	w0, w0, w1
+	orr	w0, w0, 50331648
+.L2383:
+	str	w0, [x27, 40]
+.L2337:
+	mov	w1, 1
+	mov	x0, x27
+	bl	sblk_read_page
+	ldr	w0, [x27, 52]
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	beq	.L2338
+	ldr	x0, [x27, 24]
+	ldr	w1, [x0]
+	mov	w0, 15555
+	movk	w0, 0xf55f, lsl 16
+	cmp	w1, w0
+	beq	.L2339
+.L2338:
+	mov	x0, x27
+	bl	buf_free
+	ldr	x1, [x27, 24]
+	ldr	x0, [x27, 8]
+	ldr	w2, [x1, 12]
+	str	w2, [sp, 16]
+	ldr	w2, [x1, 8]
+	str	w2, [sp, 8]
+	ldr	w2, [x1, 4]
+	str	w2, [sp]
+	ldp	w3, w4, [x0]
+	ldp	w5, w6, [x0, 8]
+	adrp	x0, .LC133
+	ldr	w7, [x1]
+	add	x0, x0, :lo12:.LC133
+	ldr	w1, [x27, 40]
+	ldr	w2, [x27, 52]
+	bl	printf
+.L2387:
+	adrp	x0, .LANCHOR56
+	ldrh	w1, [x20, 80]
+	mov	w22, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR56]
+	strh	wzr, [x0, x1, lsl 1]
+	ldr	x0, [x21, #:lo12:.LANCHOR60]
+	ldrh	w1, [x20, 80]
+	strh	w1, [x0, 130]
+.L2340:
+	ldrh	w1, [x20, 80]
+	mov	w2, w22
+	adrp	x0, .LC138
+	add	x0, x0, :lo12:.LC138
+	bl	printf
+	mov	w0, -1
+	strh	w0, [x20, 80]
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	ldr	x0, [x21, #:lo12:.LANCHOR60]
+	mov	w1, 65535
+	ldrh	w0, [x0, 130]
+	cmp	w0, w1
+	beq	.L2369
+	bl	ftl_free_sblk
+.L2369:
+	adrp	x0, .LANCHOR46
+	ldr	x1, [x0, #:lo12:.LANCHOR46]
+	mov	w0, -1
+	strh	w0, [x1, 126]
+	ldr	x1, [x21, #:lo12:.LANCHOR60]
+	strh	w0, [x1, 130]
+	mov	w0, 0
+	bl	ftl_info_flush
+.L2334:
+	ldp	x19, x20, [sp, 48]
+	ldp	x21, x22, [sp, 64]
+	ldp	x23, x24, [sp, 80]
+	ldp	x25, x26, [sp, 96]
+	ldp	x27, x28, [sp, 112]
+	ldp	x29, x30, [sp, 32]
+	add	sp, sp, 240
+	ret
+.L2336:
+	cmp	w0, 2
+	bne	.L2337
+	adrp	x0, .LANCHOR79
+	ldrh	w0, [x0, #:lo12:.LANCHOR79]
+	add	w0, w1, w0, lsl 1
+	sub	w0, w0, #1
+	orr	w0, w0, 33554432
+	b	.L2383
+.L2339:
+	adrp	x26, .LANCHOR68
+	adrp	x19, .LANCHOR69
+	adrp	x23, .LANCHOR107
+	ldr	x1, [x27, 8]
+	ldrb	w0, [x19, #:lo12:.LANCHOR69]
+	adrp	x22, .LANCHOR108
+	ldrh	w2, [x26, #:lo12:.LANCHOR68]
+	mul	w2, w2, w0
+	ldr	x0, [x23, #:lo12:.LANCHOR107]
+	lsl	w2, w2, 2
+	bl	ftl_memcpy
+	ldrb	w1, [x19, #:lo12:.LANCHOR69]
+	ldrh	w0, [x26, #:lo12:.LANCHOR68]
+	mul	w0, w0, w1
+	ldr	x1, [x27, 8]
+	lsl	w2, w0, 2
+	add	x1, x1, x0, sxtw 2
+	ldr	x0, [x22, #:lo12:.LANCHOR108]
+	bl	ftl_memcpy
+	ldrb	w0, [x19, #:lo12:.LANCHOR69]
+	mov	w2, 4
+	ldrh	w3, [x26, #:lo12:.LANCHOR68]
+	ldr	x1, [x23, #:lo12:.LANCHOR107]
+	mul	w3, w3, w0
+	adrp	x0, .LC134
+	add	x0, x0, :lo12:.LC134
+	bl	rknand_print_hex
+	ldrb	w0, [x19, #:lo12:.LANCHOR69]
+	mov	w2, 4
+	ldrh	w3, [x26, #:lo12:.LANCHOR68]
+	ldr	x1, [x22, #:lo12:.LANCHOR108]
+	mul	w3, w3, w0
+	adrp	x0, .LC135
+	add	x0, x0, :lo12:.LC135
+	bl	rknand_print_hex
+	str	x26, [x29, 120]
+	adrp	x0, .LANCHOR79
+	stp	x22, x23, [x29, 144]
+	ldrh	w24, [x0, #:lo12:.LANCHOR79]
+	ldr	x0, [x29, 160]
+	ldrb	w0, [x0, #:lo12:.LANCHOR64]
+	cmp	w0, 2
+	beq	.L2341
+.L2384:
+	str	w0, [x29, 180]
+	adrp	x23, .LC136
+	ldr	x0, [x29, 128]
+	add	x23, x23, :lo12:.LC136
+	mov	w26, 0
+	mov	w22, 0
+	add	x0, x0, :lo12:.LANCHOR75
+	str	x0, [x29, 104]
+.L2343:
+	sub	w0, w26, #1
+	str	w0, [x29, 184]
+	cmp	w26, w24
+	beq	.L2352
+	mov	x19, 0
+	b	.L2353
+.L2341:
+	lsl	w24, w24, 1
+	mov	w0, 1
+	b	.L2384
+.L2349:
+	ldr	x1, [x29, 104]
+	ldr	x0, [x29, 136]
+	ldrh	w1, [x1]
+	ldrh	w0, [x0, 96]
+	mul	w0, w0, w1
+	ldr	x1, [x29, 112]
+	str	w0, [x29, 200]
+	ldrb	w1, [x1]
+	cmp	w1, 3
+	bne	.L2344
+	add	w0, w26, w0
+	orr	w0, w0, w25, lsl 24
+.L2385:
+	str	w0, [x27, 40]
+	mov	w1, 1
+	mov	x0, x27
+	bl	sblk_read_page
+	ldr	x0, [x29, 152]
+	ldr	x0, [x0, #:lo12:.LANCHOR107]
+	ldr	w3, [x0, x28]
+	ldr	x0, [x27, 24]
+	ldr	w6, [x0, 4]
+	cmp	w3, w6
+	bne	.L2347
+	ldr	x1, [x29, 144]
+	ldr	x1, [x1, #:lo12:.LANCHOR108]
+	ldr	w2, [x1, x28]
+	ldr	w1, [x0, 8]
+	cmp	w2, w1
+	beq	.L2348
+.L2347:
+	ldr	x1, [x29, 144]
+	ldr	w2, [x0, 12]
+	str	w2, [sp]
+	ldr	x1, [x1, #:lo12:.LANCHOR108]
+	ldr	w5, [x0]
+	ldr	w7, [x0, 8]
+	mov	x0, x23
+	ldr	w2, [x27, 52]
+	ldr	w4, [x1, x28]
+	ldr	w1, [x27, 40]
+	bl	printf
+	ldr	x0, [x29, 152]
+	ldr	x0, [x0, #:lo12:.LANCHOR107]
+	ldr	w0, [x0, x28]
+	cmn	w0, #1
+	beq	.L2348
+	mov	x0, x27
+	bl	buf_free
+	b	.L2387
+.L2344:
+	cmp	w1, 2
+	bne	.L2346
+	ldr	w1, [x29, 184]
+	add	w0, w0, w1
+	add	w0, w0, w25
+	orr	w0, w0, 33554432
+	b	.L2385
+.L2346:
+	add	w0, w26, w0
+	b	.L2385
+.L2348:
+	add	w22, w22, 1
+	add	w25, w25, 1
+	add	x28, x28, 4
+.L2351:
+	ldr	w0, [x29, 180]
+	cmp	w0, w25
+	bcs	.L2349
+	add	x19, x19, 1
+.L2353:
+	ldr	x0, [x29, 168]
+	ldrb	w0, [x0, 9]
+	cmp	w0, w19
+	ble	.L2350
+	add	x0, x20, x19, lsl 1
+	str	x0, [x29, 136]
+	ldr	x0, [x29, 160]
+	sbfiz	x28, x22, 2, 32
+	mov	w25, 1
+	add	x0, x0, :lo12:.LANCHOR64
+	str	x0, [x29, 112]
+	b	.L2351
+.L2350:
+	add	w26, w26, 1
+	b	.L2343
+.L2352:
+	mov	x0, x27
+	bl	buf_free
+	ldr	x3, [x29, 120]
+	adrp	x24, .LANCHOR56
+	ldr	x0, [x29, 168]
+	mov	w22, 0
+	ldrh	w2, [x20, 80]
+	mov	w23, 0
+	ldr	x1, [x24, #:lo12:.LANCHOR56]
+	mov	w27, 0
+	ldrh	w3, [x3, #:lo12:.LANCHOR68]
+	ldrb	w0, [x0, 9]
+	mul	w0, w0, w3
+	strh	w0, [x1, x2, lsl 1]
+	adrp	x0, .LANCHOR71
+	add	x0, x0, :lo12:.LANCHOR71
+	str	x0, [x29, 96]
+.L2354:
+	sub	w0, w23, #1
+	str	w0, [x29, 120]
+	cmp	w26, w23
+	beq	.L2367
+	str	xzr, [x29, 184]
+	b	.L2368
+.L2364:
+	ldr	x1, [x29, 152]
+	sbfiz	x0, x27, 2, 32
+	ldr	x1, [x1, #:lo12:.LANCHOR107]
+	ldr	w28, [x1, x0]
+	cmn	w28, #1
+	beq	.L2355
+	ldr	x1, [x29, 144]
+	ldr	x1, [x1, #:lo12:.LANCHOR108]
+	ldr	w0, [x1, x0]
+	str	w0, [x29, 136]
+	mov	w0, w28
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 204]
+	cmn	w0, #1
+	bne	.L2356
+	mov	w2, 0
+	add	x1, x29, 204
+	mov	w0, w28
+	bl	pm_log2phys
+.L2356:
+	ldr	x0, [x29, 112]
+	ldr	x1, [x29, 128]
+	ldrh	w0, [x0, 96]
+	ldrh	w1, [x1, #:lo12:.LANCHOR75]
+	mul	w0, w0, w1
+	ldr	x1, [x29, 160]
+	ldrb	w1, [x1, #:lo12:.LANCHOR64]
+	cmp	w1, 3
+	bne	.L2357
+	add	w0, w23, w0
+	orr	w0, w0, w25, lsl 24
+.L2386:
+	str	w0, [x29, 200]
+	mov	w19, 21
+	ldr	x0, [x29, 96]
+	mov	w4, 1
+	ldr	w1, [x29, 136]
+	ldrh	w0, [x0]
+	sub	w19, w19, w0
+	lsr	w0, w1, w0
+	lsl	w19, w4, w19
+	sub	w19, w19, #1
+	and	w19, w19, w0
+	ldr	x0, [x29, 104]
+	ldrb	w0, [x0]
+	udiv	w19, w19, w0
+	ldr	w0, [x29, 204]
+	cmp	w1, w0
+	and	x19, x19, 65535
+	bne	.L2360
+	ldr	w2, [x29, 200]
+	mov	w1, w28
+	str	w4, [x29, 136]
+	adrp	x0, .LC137
+	add	x0, x0, :lo12:.LC137
+	bl	pm_ppa_update_check
+	ldr	w4, [x29, 136]
+	cbz	w0, .L2361
+.L2381:
+	b	.L2381
+.L2357:
+	cmp	w1, 2
+	bne	.L2359
+	ldr	w1, [x29, 120]
+	add	w0, w0, w1
+	add	w0, w0, w25
+	orr	w0, w0, 33554432
+	b	.L2386
+.L2359:
+	add	w0, w23, w0
+	b	.L2386
+.L2361:
+	mov	w2, w4
+	add	x1, x29, 200
+	mov	w0, w28
+	bl	pm_log2phys
+	add	w22, w22, 1
+	mov	w0, w19
+	bl	ftl_vpn_decrement
+.L2363:
+	adrp	x0, .LANCHOR59
+	add	w27, w27, 1
+	ldr	x0, [x0, #:lo12:.LANCHOR59]
+	add	x0, x0, x19, lsl 2
+	ldrb	w0, [x0, 2]
+	tst	w0, 224
+	bne	.L2355
+	ldr	x0, [x24, #:lo12:.LANCHOR56]
+	lsl	x19, x19, 1
+	ldrh	w1, [x0, x19]
+	cbz	w1, .L2355
+	strh	wzr, [x0, x19]
+.L2355:
+	add	w25, w25, 1
+.L2366:
+	ldr	w0, [x29, 180]
+	cmp	w0, w25
+	bcs	.L2364
+	ldr	x0, [x29, 184]
+	add	x0, x0, 1
+	str	x0, [x29, 184]
+.L2368:
+	ldr	x0, [x29, 168]
+	ldr	w1, [x29, 184]
+	ldrb	w0, [x0, 9]
+	cmp	w0, w1
+	ble	.L2365
+	ldr	x0, [x29, 184]
+	mov	w25, 1
+	add	x0, x20, x0, lsl 1
+	str	x0, [x29, 112]
+	adrp	x0, .LANCHOR70
+	add	x0, x0, :lo12:.LANCHOR70
+	str	x0, [x29, 104]
+	b	.L2366
+.L2360:
+	ldr	w1, [x29, 200]
+	cmp	w0, w1
+	cinc	w22, w22, eq
+	b	.L2363
+.L2365:
+	add	w23, w23, 1
+	b	.L2354
+.L2367:
+	ldrh	w1, [x20, 80]
+	ldr	x0, [x24, #:lo12:.LANCHOR56]
+	strh	w22, [x0, x1, lsl 1]
+	b	.L2340
+.L2335:
+	ldrh	w0, [x0, 130]
+	cmp	w0, w1
+	beq	.L2334
+	adrp	x19, .LANCHOR46
+	ldr	x1, [x19, #:lo12:.LANCHOR46]
+	ldrh	w1, [x1, 126]
+	cmp	w1, w0
+	bne	.L2371
+	bl	pm_flush
+	ldr	x0, [x21, #:lo12:.LANCHOR60]
+	ldrh	w0, [x0, 130]
+	bl	ftl_free_sblk
+	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	mov	w1, -1
+	strh	w1, [x0, 126]
+	mov	w0, 0
+	bl	ftl_info_flush
+.L2371:
+	ldr	x0, [x21, #:lo12:.LANCHOR60]
+	mov	w1, -1
+	strh	w1, [x0, 130]
+	b	.L2334
+	.size	gc_recovery, .-gc_recovery
+	.section	.text.ftl_init,"ax",@progbits
+	.align	2
+	.global	ftl_init
+	.type	ftl_init, %function
+ftl_init:
+	stp	x29, x30, [sp, -64]!
+	adrp	x1, .LANCHOR42
+	mov	w0, -1
+	add	x29, sp, 0
+	strb	w0, [x1, #:lo12:.LANCHOR42]
+	adrp	x1, .LANCHOR43
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR79
+	strb	wzr, [x1, #:lo12:.LANCHOR43]
+	adrp	x1, .LANCHOR127
+	stp	x21, x22, [sp, 32]
+	adrp	x19, .LANCHOR69
+	strb	w0, [x1, #:lo12:.LANCHOR127]
+	adrp	x0, .LANCHOR89
+	mov	w1, -1
+	stp	x23, x24, [sp, 48]
+	strb	wzr, [x0, #:lo12:.LANCHOR89]
+	adrp	x0, .LANCHOR49
+	adrp	x22, .LANCHOR54
+	adrp	x21, .LANCHOR149
+	str	w1, [x0, #:lo12:.LANCHOR49]
+	adrp	x1, .LC139
+	adrp	x0, .LC32
+	add	x1, x1, :lo12:.LC139
+	add	x0, x0, :lo12:.LC32
+	bl	printf
+	adrp	x3, .LANCHOR19
+	add	x3, x3, :lo12:.LANCHOR19
+	adrp	x0, .LANCHOR64
+	adrp	x1, .LANCHOR45
+	adrp	x2, .LANCHOR68
+	adrp	x5, .LANCHOR70
+	ldrb	w7, [x3, 12]
+	strb	w7, [x0, #:lo12:.LANCHOR64]
+	ldrb	w0, [x3, 9]
+	strb	w0, [x1, #:lo12:.LANCHOR45]
+	ldrh	w1, [x3, 10]
+	strh	w1, [x2, #:lo12:.LANCHOR68]
+	adrp	x2, .LANCHOR8
+	ubfiz	w8, w0, 9, 7
+	strh	w8, [x21, #:lo12:.LANCHOR149]
+	ldrb	w4, [x2, #:lo12:.LANCHOR8]
+	adrp	x2, .LANCHOR76
+	sdiv	w7, w1, w7
+	strb	w4, [x2, #:lo12:.LANCHOR76]
+	ldrb	w2, [x3, 13]
+	strb	w2, [x5, #:lo12:.LANCHOR70]
+	ldrh	w5, [x3, 14]
+	adrp	x3, .LANCHOR13
+	strh	w7, [x20, #:lo12:.LANCHOR79]
+	mul	w4, w4, w2
+	ldrh	w6, [x3, #:lo12:.LANCHOR13]
+	adrp	x3, .LANCHOR75
+	strh	w5, [x22, #:lo12:.LANCHOR54]
+	and	w2, w4, 255
+	mov	w4, 1
+	strh	w6, [x3, #:lo12:.LANCHOR75]
+	mov	w3, 0
+	strb	w2, [x19, #:lo12:.LANCHOR69]
+.L2389:
+	cmp	w6, w4
+	bcs	.L2390
+	mul	w6, w0, w1
+	adrp	x4, .LANCHOR71
+	mov	w1, 57344
+	sub	w3, w3, #1
+	movk	w1, 0x1c, lsl 16
+	strh	w3, [x4, #:lo12:.LANCHOR71]
+	adrp	x24, .LANCHOR137
+	adrp	x23, .LANCHOR60
+	mul	w4, w6, w5
+	mul	w1, w2, w1
+	lsr	w3, w4, 21
+	mul	w4, w4, w2
+	mul	w1, w1, w3
+	adrp	x3, .LANCHOR52
+	str	w1, [x3, #:lo12:.LANCHOR52]
+	add	w1, w1, 24576
+	adrp	x3, .LANCHOR161
+	udiv	w0, w1, w0
+	str	w4, [x3, #:lo12:.LANCHOR161]
+	adrp	x3, .LANCHOR162
+	str	w1, [x3, #:lo12:.LANCHOR162]
+	adrp	x3, .LANCHOR47
+	str	w0, [x3, #:lo12:.LANCHOR47]
+	sub	w3, w8, #1
+	add	w0, w3, w0, lsl 2
+	mul	w3, w7, w2
+	mul	w2, w6, w2
+	udiv	w0, w0, w8
+	udiv	w1, w1, w2
+	strh	w0, [x24, #:lo12:.LANCHOR137]
+	ubfiz	w0, w0, 4, 16
+	add	w1, w1, 2
+	sdiv	w0, w0, w3
+	adrp	x3, .LANCHOR101
+	strh	w0, [x3, #:lo12:.LANCHOR101]
+	adrp	x0, .LANCHOR163
+	strh	w1, [x0, #:lo12:.LANCHOR163]
+	add	w0, w5, w5, lsl 1
+	adrp	x1, .LANCHOR164
+	asr	w0, w0, 2
+	strh	w0, [x1, #:lo12:.LANCHOR164]
+	lsr	w0, w5, 4
+	adrp	x1, .LANCHOR165
+	strh	w0, [x1, #:lo12:.LANCHOR165]
+	bl	buf_init
+	ldrb	w1, [x19, #:lo12:.LANCHOR69]
+	ldrh	w0, [x20, #:lo12:.LANCHOR79]
+	mul	w0, w0, w1
+	lsl	w0, w0, 2
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR83
+	adrp	x2, ftl_ext_info_data_buffer
+	add	x2, x2, :lo12:ftl_ext_info_data_buffer
+	str	x0, [x1, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR82
+	ldrh	w1, [x20, #:lo12:.LANCHOR79]
+	str	x2, [x0, #:lo12:.LANCHOR82]
+	ldrb	w0, [x19, #:lo12:.LANCHOR69]
+	mul	w1, w1, w0
+	lsl	w0, w1, 1
+	adrp	x1, .LANCHOR56
+	add	x3, x2, x0, sxtw 2
+	str	x3, [x1, #:lo12:.LANCHOR56]
+	ldrh	w1, [x22, #:lo12:.LANCHOR54]
+	add	w1, w0, w1, lsr 1
+	adrp	x0, .LC140
+	add	x1, x2, x1, sxtw 2
+	add	x0, x0, :lo12:.LC140
+	str	x1, [x23, #:lo12:.LANCHOR60]
+	bl	printf
+	ldrh	w0, [x20, #:lo12:.LANCHOR79]
+	ldrb	w19, [x19, #:lo12:.LANCHOR69]
+	ldrh	w1, [x22, #:lo12:.LANCHOR54]
+	ldrh	w20, [x24, #:lo12:.LANCHOR137]
+	ldrh	w3, [x21, #:lo12:.LANCHOR149]
+	mul	w19, w0, w19
+	adrp	x0, .LC141
+	add	x0, x0, :lo12:.LC141
+	add	w19, w1, w19, lsl 2
+	lsl	w1, w1, 2
+	add	w20, w1, w20, lsl 2
+	lsl	w19, w19, 1
+	add	w19, w19, 600
+	add	w20, w20, 704
+	mov	w2, w20
+	mov	w1, w19
+	bl	printf
+	ldrh	w0, [x21, #:lo12:.LANCHOR149]
+	cmp	w19, w0
+	bhi	.L2391
+	cmp	w20, w0
+	bls	.L2392
+.L2391:
+.L2399:
+	b	.L2399
+.L2390:
+	add	w3, w3, 1
+	lsl	w4, w4, 1
+	and	w3, w3, 65535
+	b	.L2389
+.L2392:
+	bl	sblk_init
+	bl	ftl_info_blk_init
+	cmn	w0, #1
+	beq	.L2388
+	bl	ftl_ext_info_init
+	adrp	x19, .LANCHOR46
+	mov	w0, 1
+	bl	pm_init
+	bl	lpa_rebuild_hash
+	ldr	x0, [x23, #:lo12:.LANCHOR60]
+	mov	x1, 0
+	add	x0, x0, 16
+	bl	ftl_open_sblk_recovery
+	ldr	x0, [x23, #:lo12:.LANCHOR60]
+	add	x1, x0, 16
+	add	x0, x0, 48
+	bl	ftl_open_sblk_recovery
+	ldr	x1, [x19, #:lo12:.LANCHOR46]
+	ldr	w0, [x1, 8]
+	add	w0, w0, 16
+	str	w0, [x1, 8]
+	ldr	x0, [x23, #:lo12:.LANCHOR60]
+	add	x0, x0, 16
+	bl	ftl_info_data_recovery
+	ldr	x0, [x23, #:lo12:.LANCHOR60]
+	add	x0, x0, 48
+	bl	ftl_info_data_recovery
+	ldr	x0, [x23, #:lo12:.LANCHOR60]
+	add	x0, x0, 80
+	bl	ftl_info_data_recovery
+	bl	gc_recovery
+	bl	ftl_info_check
+	bl	pm_flush
+	mov	w0, 1
+	bl	ftl_total_vpn_update
+	adrp	x0, .LANCHOR133
+	ldrb	w0, [x0, #:lo12:.LANCHOR133]
+	cbz	w0, .L2394
+	ldr	x1, [x19, #:lo12:.LANCHOR46]
+	ldr	w0, [x1, 68]
+	add	w0, w0, 1
+	str	w0, [x1, 68]
+.L2394:
+	bl	ftl_ext_info_flush
+	mov	w0, 0
+	bl	ftl_info_flush
+	bl	print_ftl_debug_info
+	mov	w0, 0
+.L2388:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	ret
+	.size	ftl_init, .-ftl_init
+	.section	.text.rk_ftl_init,"ax",@progbits
+	.align	2
+	.global	rk_ftl_init
+	.type	rk_ftl_init, %function
+rk_ftl_init:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	bl	nand_flash_init
+	cbnz	w0, .L2403
+	bl	ftl_init
+.L2403:
+	mov	w19, w0
+	mov	w1, w0
+	adrp	x0, .LC142
+	add	x0, x0, :lo12:.LC142
+	bl	printf
+	mov	w0, w19
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	rk_ftl_init, .-rk_ftl_init
+	.section	.text.ftl_update_l2p_map,"ax",@progbits
+	.align	2
+	.global	ftl_update_l2p_map
+	.type	ftl_update_l2p_map, %function
+ftl_update_l2p_map:
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	mov	x22, x0
+	stp	x23, x24, [sp, 48]
+	adrp	x0, .LANCHOR79
+	stp	x19, x20, [sp, 16]
+	adrp	x24, .LANCHOR82
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	ldrh	w23, [x0, #:lo12:.LANCHOR79]
+	ldrb	w0, [x22, 9]
+	ldrh	w19, [x22, 12]
+	str	x24, [x29, 104]
+	mul	w23, w23, w0
+	ldr	x0, [x24, #:lo12:.LANCHOR82]
+	add	x19, x0, x19, lsl 2
+	add	x0, x19, x23, sxtw 2
+	ldr	w0, [x0, -4]
+	cmn	w0, #1
+	bne	.L2406
+	adrp	x27, .LANCHOR45
+	mov	x28, 0
+	add	x0, x27, :lo12:.LANCHOR45
+	mov	w21, 0
+	str	x0, [x29, 96]
+.L2407:
+	cmp	w28, w23
+	blt	.L2415
+	adrp	x0, .LANCHOR22
+	adrp	x19, .LANCHOR56
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	tbz	x0, 12, .L2416
+	ldrh	w1, [x22]
+	ldr	x2, [x19, #:lo12:.LANCHOR56]
+	ubfiz	x0, x1, 1, 16
+	ldrh	w3, [x2, x0]
+	adrp	x0, .LC146
+	mov	w2, w21
+	add	x0, x0, :lo12:.LC146
+	bl	printf
+.L2416:
+	ldrh	w1, [x22]
+	ldr	x0, [x19, #:lo12:.LANCHOR56]
+	ldp	x23, x24, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	strh	w21, [x0, x1, lsl 1]
+	ldp	x25, x26, [sp, 64]
+	ldp	x21, x22, [sp, 32]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+.L2406:
+	adrp	x1, .LANCHOR166
+	adrp	x0, .LC0
+	mov	w2, 882
+	add	x1, x1, :lo12:.LANCHOR166
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2408:
+	b	.L2408
+.L2415:
+	ldr	w2, [x19, x28, lsl 2]
+	cmn	w2, #1
+	beq	.L2409
+	ldrb	w20, [x27, #:lo12:.LANCHOR45]
+	adrp	x0, .LANCHOR22
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	lsl	w20, w20, 7
+	udiv	w20, w2, w20
+	and	w20, w20, 65535
+	tbz	x0, 12, .L2410
+	adrp	x0, .LC143
+	mov	w3, w28
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC143
+	bl	printf
+.L2410:
+	adrp	x25, .LANCHOR75
+	adrp	x26, .LC144
+	mov	x24, x28
+	add	x25, x25, :lo12:.LANCHOR75
+	add	x26, x26, :lo12:.LC144
+.L2414:
+	ldr	w1, [x19, x24, lsl 2]
+	cmn	w1, #1
+	beq	.L2411
+	ldr	x0, [x29, 96]
+	ldrb	w2, [x0]
+	lsl	w2, w2, 7
+	udiv	w1, w1, w2
+	cmp	w20, w1, uxth
+	bne	.L2411
+	ldrb	w0, [x22, 9]
+	sdiv	w1, w24, w0
+	msub	w0, w1, w0, w24
+	add	x0, x22, x0, sxtw 1
+	ldrh	w2, [x0, 16]
+	ldrh	w0, [x25]
+	madd	w2, w2, w0, w1
+	mov	x0, x26
+	str	w2, [x29, 124]
+	ldr	w1, [x19, x24, lsl 2]
+	bl	pm_ppa_update_check
+	cbz	w0, .L2412
+	ldr	x0, [x29, 104]
+	mov	w3, w23
+	mov	w2, 4
+	ldr	x1, [x0, #:lo12:.LANCHOR82]
+	adrp	x0, .LC145
+	add	x0, x0, :lo12:.LC145
+	bl	rknand_print_hex
+.L2413:
+	b	.L2413
+.L2412:
+	ldr	w0, [x19, x24, lsl 2]
+	add	w21, w21, 1
+	mov	w2, 1
+	add	x1, x29, 124
+	and	w21, w21, 65535
+	bl	pm_log2phys
+	mov	w0, -1
+	str	w0, [x19, x24, lsl 2]
+.L2411:
+	add	x24, x24, 1
+	cmp	w23, w24
+	bgt	.L2414
+.L2409:
+	add	x28, x28, 1
+	b	.L2407
+	.size	ftl_update_l2p_map, .-ftl_update_l2p_map
+	.section	.text.ftl_alloc_new_data_sblk,"ax",@progbits
+	.align	2
+	.global	ftl_alloc_new_data_sblk
+	.type	ftl_alloc_new_data_sblk, %function
+ftl_alloc_new_data_sblk:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	mov	x19, x0
+	bl	ftl_update_l2p_map
+	bl	pm_flush
+	adrp	x0, .LANCHOR60
+	ldr	x0, [x0, #:lo12:.LANCHOR60]
+	add	x0, x0, 16
+	cmp	x19, x0
+	mov	x0, x19
+	cset	w1, ne
+	add	w1, w1, 2
+	bl	ftl_open_sblk_init
+	bl	ftl_ext_info_flush
+	mov	w0, 0
+	bl	ftl_info_flush
+	bl	lpa_rebuild_hash
+	ldr	x19, [sp, 16]
+	mov	w0, 0
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	ftl_alloc_new_data_sblk, .-ftl_alloc_new_data_sblk
+	.section	.text.ftl_write_commit,"ax",@progbits
+	.align	2
+	.global	ftl_write_commit
+	.type	ftl_write_commit, %function
+ftl_write_commit:
+	stp	x29, x30, [sp, -144]!
+	adrp	x0, .LANCHOR36
+	add	x29, sp, 0
+	stp	x25, x26, [sp, 64]
+	add	x25, x0, :lo12:.LANCHOR36
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	stp	x27, x28, [sp, 80]
+.L2436:
+	adrp	x3, .LANCHOR43
+	ldrb	w1, [x3, #:lo12:.LANCHOR43]
+	cbz	w1, .L2438
+	adrp	x4, .LANCHOR42
+	adrp	x2, .LANCHOR36
+	add	x2, x2, :lo12:.LANCHOR36
+	sub	w1, w1, #1
+	ldrb	w0, [x4, #:lo12:.LANCHOR42]
+	strb	w1, [x3, #:lo12:.LANCHOR43]
+	adrp	x1, .LANCHOR47
+	ubfiz	x27, x0, 6, 8
+	ldr	w1, [x1, #:lo12:.LANCHOR47]
+	add	x5, x2, x27
+	stp	x0, x5, [x29, 112]
+	lsl	x5, x0, 6
+	add	x0, x2, x5
+	ldrb	w5, [x2, x5]
+	ldr	w22, [x0, 36]
+	strb	w5, [x4, #:lo12:.LANCHOR42]
+	cmp	w22, w1
+	bcc	.L2440
+	ldr	x0, [x29, 120]
+	bl	buf_free
+	mov	w0, -1
+.L2435:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 144
+	ret
+.L2440:
+	adrp	x26, .LANCHOR89
+	ldrb	w21, [x0, 57]
+	ldrb	w20, [x0, 56]
+	ldr	x24, [x0, 8]
+	ldr	x28, [x0, 24]
+	ldrb	w0, [x26, #:lo12:.LANCHOR89]
+	cbz	w0, .L2442
+	adrp	x0, .LANCHOR127
+	ldrb	w1, [x0, #:lo12:.LANCHOR127]
+	add	x1, x2, x1, lsl 6
+.L2443:
+	ldrb	w0, [x1]
+	cmp	w0, 255
+	bne	.L2444
+	ldr	w0, [x1, 36]
+	cmp	w22, w0
+	bne	.L2442
+	ldr	x0, [x1, 8]
+	ubfiz	x21, x21, 9, 8
+	lsl	w2, w20, 9
+	add	x1, x24, x21
+	add	x0, x0, x21
+	bl	ftl_memcpy
+	ldr	x0, [x29, 120]
+	bl	buf_free
+	b	.L2436
+.L2444:
+	ubfiz	x1, x0, 6, 8
+	add	x1, x25, x1
+	b	.L2443
+.L2442:
+	mov	w0, w22
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 140]
+	cmn	w0, #1
+	bne	.L2446
+	mov	w2, 0
+	add	x1, x29, 140
+	mov	w0, w22
+	bl	pm_log2phys
+.L2446:
+	adrp	x19, .LANCHOR60
+	add	x1, x25, 2
+	mov	w0, 0
+	ldr	x3, [x19, #:lo12:.LANCHOR60]
+.L2449:
+	ldr	w2, [x1, 34]
+	cmp	w22, w2
+	bne	.L2447
+	ldrb	w2, [x1]
+	tbz	x2, 3, .L2447
+	ubfiz	x0, x0, 6, 32
+	and	w2, w2, -9
+	add	x0, x25, x0
+	strb	w2, [x0, 2]
+	ldr	x23, [x0, 8]
+	ldr	w0, [x0, 40]
+	str	w0, [x29, 140]
+.L2448:
+	adrp	x0, .LANCHOR45
+	str	x0, [x29, 104]
+	ldrb	w1, [x0, #:lo12:.LANCHOR45]
+	cmp	w20, w1
+	bcc	.L2450
+	add	x19, x3, 16
+.L2495:
+	mov	w23, 0
+.L2451:
+	ldrh	w0, [x19, 6]
+	cbnz	w0, .L2466
+	bl	ftl_flush
+	mov	x0, x19
+	bl	ftl_alloc_new_data_sblk
+.L2466:
+	mov	x0, x19
+	bl	ftl_get_new_free_page
+	ldr	x1, [x29, 112]
+	adrp	x20, .LANCHOR127
+	lsl	x2, x1, 6
+	add	x1, x25, x2
+	ldr	w3, [x1, 32]
+	stp	w3, w22, [x28]
+	str	w23, [x28, 12]
+	ldr	w3, [x29, 140]
+	str	w3, [x28, 8]
+	stp	w0, w3, [x1, 40]
+	mov	w0, -1
+	strb	w0, [x25, x2]
+	mov	w2, 10
+	ldrb	w0, [x1, 2]
+	orr	w0, w0, w2
+	ldrh	w2, [x19, 12]
+	strb	w0, [x1, 2]
+	ldrh	w0, [x19, 10]
+	add	w0, w0, w2
+	sub	w0, w0, #1
+	strh	w0, [x1, 48]
+	ldr	x1, [x29, 120]
+	add	x0, x20, :lo12:.LANCHOR127
+	bl	buf_add_tail
+	ldrb	w2, [x26, #:lo12:.LANCHOR89]
+	adrp	x0, .LANCHOR168
+	add	w2, w2, 1
+	str	wzr, [x0, #:lo12:.LANCHOR168]
+	and	w2, w2, 255
+	strb	w2, [x26, #:lo12:.LANCHOR89]
+	cmp	w2, 2
+	ldrh	w0, [x19, 6]
+	bhi	.L2467
+	cmp	w0, 1
+	bne	.L2439
+.L2467:
+	ldrb	w1, [x19, 5]
+	cmp	w1, 0
+	mov	w1, 0
+	cset	w4, ne
+	cmp	w0, 1
+	ldrb	w0, [x20, #:lo12:.LANCHOR127]
+	csinc	w4, w2, w4, eq
+	mov	w3, w0
+.L2471:
+	cmp	w1, w4
+	bne	.L2472
+	and	w1, w1, 255
+	ubfiz	x0, x0, 6, 8
+	sub	w2, w2, w1
+	strb	w3, [x20, #:lo12:.LANCHOR127]
+	strb	w2, [x26, #:lo12:.LANCHOR89]
+	add	x0, x25, x0
+	bl	sblk_prog_page
+	ldrh	w0, [x19, 6]
+	cmp	w0, 1
+	bne	.L2439
+	bl	sblk_wait_write_queue_completed
+	bl	ftl_write_completed
+	mov	x0, x19
+	bl	ftl_write_last_log_page
+	mov	x0, x19
+	bl	ftl_alloc_new_data_sblk
+.L2439:
+	adrp	x0, .LANCHOR43
+	ldrb	w0, [x0, #:lo12:.LANCHOR43]
+	cbnz	w0, .L2436
+.L2438:
+	bl	ftl_write_completed
+	mov	w0, 0
+	b	.L2435
+.L2447:
+	add	w0, w0, 1
+	add	x1, x1, 64
+	cmp	w0, 32
+	bne	.L2449
+	mov	x23, 0
+	b	.L2448
+.L2450:
+	cbz	x23, .L2452
+	cbz	w21, .L2453
+	lsl	w2, w21, 9
+	mov	x1, x23
+	mov	x0, x24
+	bl	ftl_memcpy
+.L2453:
+	ldr	x0, [x29, 104]
+	add	w20, w21, w20
+	ldr	x19, [x19, #:lo12:.LANCHOR60]
+	ldrb	w2, [x0, #:lo12:.LANCHOR45]
+	cmp	w20, w2
+	bcc	.L2454
+	add	x19, x19, 16
+	b	.L2495
+.L2454:
+	ubfiz	x0, x20, 9, 9
+	sub	w2, w2, w20
+	add	x1, x23, x0
+	add	x19, x19, 48
+	lsl	w2, w2, 9
+	add	x0, x24, x0
+	bl	ftl_memcpy
+	b	.L2495
+.L2452:
+	ldr	w0, [x29, 140]
+	cmn	w0, #1
+	beq	.L2455
+	mov	w0, 1
+	bl	buf_alloc
+	ldr	w1, [x29, 140]
+	mov	x27, x0
+	stp	w22, w1, [x0, 36]
+	mov	w1, 1
+	bl	sblk_read_page
+	ldr	x0, [x27, 24]
+	ldr	w23, [x0, 12]
+	ldr	w0, [x0, 4]
+	add	w23, w23, 1
+	cmp	w22, w0
+	bne	.L2456
+	ldr	w0, [x27, 52]
+	cmn	w0, #1
+	bne	.L2457
+.L2456:
+	ldrb	w1, [x27, 1]
+	mov	w3, w22
+	ldr	w4, [x27, 52]
+	adrp	x0, .LC147
+	ldr	w2, [x29, 140]
+	add	x0, x0, :lo12:.LC147
+	bl	printf
+	ldr	x1, [x27, 24]
+	mov	w3, 4
+	adrp	x0, .LC96
+	mov	w2, w3
+	add	x0, x0, :lo12:.LC96
+	bl	rknand_print_hex
+	adrp	x0, .LANCHOR71
+	ldr	w1, [x29, 140]
+	ldrh	w3, [x0, #:lo12:.LANCHOR71]
+	mov	w0, 21
+	sub	w2, w0, w3
+	mov	w0, 1
+	lsr	w1, w1, w3
+	lsl	w0, w0, w2
+	sub	w0, w0, #1
+	and	w0, w0, w1
+	adrp	x1, .LANCHOR70
+	ldrb	w2, [x1, #:lo12:.LANCHOR70]
+	mov	x1, 0
+	udiv	w0, w0, w2
+	bl	ftl_sblk_dump
+.L2457:
+	ldr	x0, [x27, 24]
+	ldr	w0, [x0, 4]
+	cmp	w22, w0
+	bne	.L2458
+	ldr	w0, [x27, 52]
+	cmn	w0, #1
+	bne	.L2459
+.L2458:
+	adrp	x1, .LANCHOR167
+	adrp	x0, .LC0
+	mov	w2, 445
+	add	x1, x1, :lo12:.LANCHOR167
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2460:
+	b	.L2460
+.L2459:
+	cbz	w21, .L2461
+	ldr	w0, [x29, 140]
+	lsl	w2, w21, 9
+	cmn	w0, #1
+	beq	.L2462
+	ldr	x1, [x27, 8]
+	mov	x0, x24
+	bl	ftl_memcpy
+.L2461:
+	ldr	x1, [x29, 104]
+	add	w20, w21, w20
+	ldr	x0, [x19, #:lo12:.LANCHOR60]
+	add	x19, x0, 48
+	ldrb	w2, [x1, #:lo12:.LANCHOR45]
+	cmp	w20, w2
+	bcc	.L2463
+	add	x19, x0, 16
+.L2464:
+	cbz	x27, .L2451
+	ldrb	w0, [x27, 2]
+	mov	x1, x27
+	and	w0, w0, -9
+	strb	w0, [x27, 2]
+	adrp	x0, .LANCHOR51
+	add	x0, x0, :lo12:.LANCHOR51
+	bl	buf_remove_buf
+	mov	x0, x27
+	bl	buf_free
+	b	.L2451
+.L2463:
+	ldr	w0, [x29, 140]
+	sub	w2, w2, w20
+	lsl	w2, w2, 9
+	ubfiz	x20, x20, 7, 9
+	cmn	w0, #1
+	beq	.L2465
+	ldr	x1, [x27, 8]
+	lsl	x20, x20, 2
+	add	x0, x24, x20
+	add	x1, x1, x20
+	bl	ftl_memcpy
+	b	.L2464
+.L2465:
+	mov	w1, 0
+	add	x0, x24, x20, lsl 2
+	bl	ftl_memset
+	b	.L2464
+.L2472:
+	ubfiz	x3, x3, 6, 8
+	add	w1, w1, 1
+	ldrb	w3, [x25, x3]
+	b	.L2471
+.L2473:
+	lsl	w2, w21, 9
+	mov	x27, 0
+	mov	w23, 0
+.L2462:
+	mov	w1, 0
+	mov	x0, x24
+	bl	ftl_memset
+	b	.L2461
+.L2455:
+	cbnz	w21, .L2473
+	mov	w23, 0
+	mov	x27, 0
+	b	.L2461
+	.size	ftl_write_commit, .-ftl_write_commit
+	.section	.text.ftl_discard,"ax",@progbits
+	.align	2
+	.global	ftl_discard
+	.type	ftl_discard, %function
+ftl_discard:
+	stp	x29, x30, [sp, -112]!
+	ands	w0, w0, 255
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w20, w2
+	stp	x25, x26, [sp, 64]
+	mov	w26, w3
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	stp	x27, x28, [sp, 80]
+	bne	.L2497
+	adrp	x2, .LANCHOR52
+	mov	w21, 24576
+	ldr	w2, [x2, #:lo12:.LANCHOR52]
+.L2498:
+	add	w3, w1, w20
+	cmp	w2, w3
+	bcc	.L2519
+	add	w21, w21, w1
+	adrp	x1, .LANCHOR22
+	ldr	w1, [x1, #:lo12:.LANCHOR22]
+	tbz	x1, 12, .L2500
+	mov	w1, w0
+	mov	w4, w26
+	adrp	x0, .LC148
+	mov	w3, w20
+	mov	w2, w21
+	add	x0, x0, :lo12:.LC148
+	bl	printf
+.L2500:
+	adrp	x22, .LANCHOR46
+	adrp	x23, .LANCHOR45
+	cmp	w26, 1
+	ldr	x0, [x22, #:lo12:.LANCHOR46]
+	cset	w25, ls
+	ldr	w24, [x0, 8]
+	add	w1, w24, 1
+	str	w1, [x0, 8]
+	ldrb	w0, [x23, #:lo12:.LANCHOR45]
+	udiv	w19, w21, w0
+	msub	w21, w19, w0, w21
+	cbz	w21, .L2501
+	sub	w0, w0, w21
+	cmp	w0, w20
+	csel	w28, w0, w20, ls
+	cmp	w26, 1
+	and	w27, w28, 65535
+	bhi	.L2503
+	mov	w0, w19
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 104]
+	cmn	w0, #1
+	bne	.L2504
+	mov	w2, 0
+	add	x1, x29, 104
+	mov	w0, w19
+	bl	pm_log2phys
+.L2504:
+	ldr	w0, [x29, 104]
+	cmn	w0, #1
+	beq	.L2503
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x26, x0
+	cbz	x0, .L2503
+	strb	w21, [x0, 57]
+	lsl	w2, w27, 9
+	strb	w28, [x0, 56]
+	mov	w1, 0
+	ldr	x0, [x0, 8]
+	ubfiz	x21, x21, 9, 25
+	stp	w24, w19, [x26, 32]
+	add	x0, x0, x21
+	bl	ftl_memset
+	mov	x0, x26
+	bl	ftl_write_buf
+	bl	ftl_write_commit
+	ldr	x1, [x22, #:lo12:.LANCHOR46]
+	ldr	w0, [x1, 76]
+	add	w0, w0, 1
+	str	w0, [x1, 76]
+.L2503:
+	add	w19, w19, 1
+	sub	w20, w20, w27
+.L2501:
+	cbz	w20, .L2506
+	bl	ftl_flush
+.L2506:
+	adrp	x21, .LANCHOR71
+	add	x26, x23, :lo12:.LANCHOR45
+	add	x21, x21, :lo12:.LANCHOR71
+	mov	w0, -1
+	str	w0, [x29, 108]
+.L2507:
+	ldrb	w0, [x26]
+	cmp	w20, w0
+	bcs	.L2512
+	cmp	w20, 0
+	cset	w0, ne
+	tst	w25, w0
+	bne	.L2513
+.L2546:
+	mov	w0, 0
+.L2496:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L2497:
+	cmp	w0, 3
+	bhi	.L2519
+	lsl	w21, w0, 13
+	mov	w2, 8192
+	b	.L2498
+.L2512:
+	mov	w0, w19
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 104]
+	cmn	w0, #1
+	mov	w2, 0
+	add	x1, x29, 104
+	mov	w0, w19
+	beq	.L2508
+	bl	pm_log2phys
+	ldr	w0, [x29, 104]
+	cmn	w0, #1
+	beq	.L2510
+	mov	w2, 1
+	add	x1, x29, 108
+	mov	w0, w19
+	bl	pm_log2phys
+.L2545:
+	ldr	x1, [x22, #:lo12:.LANCHOR46]
+	ldr	w0, [x1, 76]
+	add	w0, w0, 1
+	str	w0, [x1, 76]
+.L2510:
+	ldrb	w0, [x26]
+	add	w19, w19, 1
+	sub	w20, w20, w0
+	b	.L2507
+.L2508:
+	bl	pm_log2phys
+	ldr	w0, [x29, 104]
+	cmn	w0, #1
+	beq	.L2510
+	add	x1, x29, 108
+	mov	w2, 1
+	mov	w0, w19
+	bl	pm_log2phys
+	ldrh	w3, [x21]
+	mov	w0, 21
+	ldr	w1, [x29, 104]
+	sub	w2, w0, w3
+	mov	w0, 1
+	lsr	w1, w1, w3
+	lsl	w0, w0, w2
+	sub	w0, w0, #1
+	and	w0, w0, w1
+	adrp	x1, .LANCHOR70
+	ldrb	w1, [x1, #:lo12:.LANCHOR70]
+	udiv	w0, w0, w1
+	bl	ftl_vpn_decrement
+	b	.L2545
+.L2513:
+	mov	w0, w19
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 104]
+	cmn	w0, #1
+	bne	.L2514
+	mov	w2, 0
+	add	x1, x29, 104
+	mov	w0, w19
+	bl	pm_log2phys
+.L2514:
+	ldr	w0, [x29, 104]
+	cmn	w0, #1
+	beq	.L2546
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x21, x0
+	cbz	x0, .L2546
+	strb	wzr, [x0, 57]
+	strb	w20, [x0, 56]
+	stp	w24, w19, [x21, 32]
+	ldrb	w0, [x23, #:lo12:.LANCHOR45]
+	cmp	w20, w0
+	bcc	.L2516
+	adrp	x1, .LANCHOR169
+	adrp	x0, .LC0
+	mov	w2, 1048
+	add	x1, x1, :lo12:.LANCHOR169
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2517:
+	b	.L2517
+.L2516:
+	ldr	x0, [x21, 8]
+	lsl	w2, w20, 9
+	mov	w1, 0
+	bl	ftl_memset
+	mov	x0, x21
+	bl	ftl_write_buf
+	bl	ftl_write_commit
+	ldr	x1, [x22, #:lo12:.LANCHOR46]
+	ldr	w0, [x1, 76]
+	add	w0, w0, 1
+	str	w0, [x1, 76]
+	b	.L2546
+.L2519:
+	mov	w0, -1
+	b	.L2496
+	.size	ftl_discard, .-ftl_discard
+	.section	.text.FtlDiscard,"ax",@progbits
+	.align	2
+	.global	FtlDiscard
+	.type	FtlDiscard, %function
+FtlDiscard:
+	mov	w2, w1
+	mov	w3, 0
+	mov	w1, w0
+	mov	w0, 0
+	b	ftl_discard
+	.size	FtlDiscard, .-FtlDiscard
+	.section	.text.gc_do_copy_back,"ax",@progbits
+	.align	2
+	.global	gc_do_copy_back
+	.type	gc_do_copy_back, %function
+gc_do_copy_back:
+	sub	sp, sp, #224
+	adrp	x0, .LANCHOR67
+	stp	x29, x30, [sp, 16]
+	add	x29, sp, 16
+	ldrb	w0, [x0, #:lo12:.LANCHOR67]
+	stp	x19, x20, [sp, 32]
+	stp	x21, x22, [sp, 48]
+	stp	x23, x24, [sp, 64]
+	stp	x25, x26, [sp, 80]
+	stp	x27, x28, [sp, 96]
+	cbnz	w0, .L2549
+	bl	buf_alloc
+	mov	x19, x0
+	cbz	x0, .L2548
+	adrp	x20, .LANCHOR58
+	add	x3, x20, :lo12:.LANCHOR58
+	ldrh	w2, [x3, 26]
+	mov	w0, w2
+	bl	gc_get_src_ppa_from_index
+	add	w2, w2, 1
+	mov	w22, w0
+	str	w22, [x19, 40]
+	strh	w2, [x3, 26]
+	mov	w1, 1
+	mov	x0, x19
+	bl	sblk_read_page
+	ldr	w0, [x19, 52]
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	bne	.L2551
+	adrp	x0, .LANCHOR71
+	ldrh	w1, [x0, #:lo12:.LANCHOR71]
+	mov	w0, 21
+	sub	w2, w0, w1
+	mov	w0, 1
+	lsr	w1, w22, w1
+	lsl	w0, w0, w2
+	sub	w0, w0, #1
+	and	w0, w0, w1
+	adrp	x1, .LANCHOR70
+	ldrb	w2, [x1, #:lo12:.LANCHOR70]
+	mov	x1, 0
+	udiv	w0, w0, w2
+	bl	ftl_sblk_dump
+.L2551:
+	ldr	w0, [x19, 52]
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	bne	.L2552
+	adrp	x1, .LANCHOR170
+	adrp	x0, .LC0
+	mov	w2, 556
+	add	x1, x1, :lo12:.LANCHOR170
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2553:
+	b	.L2553
+.L2552:
+	ldr	x0, [x19, 24]
+	ldr	w21, [x0, 4]
+	mov	w0, w21
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 160]
+	cmn	w0, #1
+	bne	.L2554
+	mov	w2, 0
+	add	x1, x29, 160
+	mov	w0, w21
+	bl	pm_log2phys
+.L2554:
+	ldr	w23, [x29, 160]
+	cmp	w22, w23
+	bne	.L2555
+	adrp	x0, .LANCHOR36
+	add	x0, x0, :lo12:.LANCHOR36
+	add	x1, x0, 2
+	add	x0, x0, 2050
+.L2558:
+	ldr	w2, [x1, 34]
+	cmp	w21, w2
+	bne	.L2556
+	ldrb	w2, [x1]
+	tbz	x2, 1, .L2556
+	mov	x0, x19
+	bl	buf_free
+	adrp	x0, .LANCHOR22
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	tbz	x0, 8, .L2548
+	add	x20, x20, :lo12:.LANCHOR58
+	adrp	x0, .LC149
+	mov	w2, w22
+	mov	w1, w21
+	add	x0, x0, :lo12:.LC149
+	ldrh	w3, [x20, 26]
+	bl	printf
+.L2548:
+	ldp	x19, x20, [sp, 32]
+	ldp	x21, x22, [sp, 48]
+	ldp	x23, x24, [sp, 64]
+	ldp	x25, x26, [sp, 80]
+	ldp	x27, x28, [sp, 96]
+	ldp	x29, x30, [sp, 16]
+	add	sp, sp, 224
+	ret
+.L2556:
+	add	x1, x1, 64
+	cmp	x0, x1
+	bne	.L2558
+	adrp	x0, .LANCHOR45
+	mov	w1, 10
+	strb	wzr, [x19, 57]
+	ldrb	w0, [x0, #:lo12:.LANCHOR45]
+	strb	w0, [x19, 56]
+	ldrb	w0, [x19, 2]
+	str	w21, [x19, 36]
+	orr	w0, w0, w1
+	strb	w0, [x19, 2]
+	ldr	x0, [x19, 24]
+	ldr	w0, [x0]
+	str	w0, [x19, 32]
+	adrp	x0, .LANCHOR22
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	tbz	x0, 8, .L2559
+	mov	w0, w21
+	bl	lpa_hash_get_ppa
+	add	x1, x20, :lo12:.LANCHOR58
+	mov	w3, w0
+	mov	w4, w22
+	adrp	x0, .LC150
+	mov	w2, w23
+	add	x0, x0, :lo12:.LC150
+	ldrh	w5, [x1, 26]
+	mov	w1, w21
+	bl	printf
+.L2559:
+	mov	x0, x19
+	bl	ftl_gc_write_buf
+	bl	ftl_write_commit
+	add	x20, x20, :lo12:.LANCHOR58
+	adrp	x0, .LANCHOR46
+	ldr	x1, [x0, #:lo12:.LANCHOR46]
+	ldr	w0, [x1, 60]
+	add	w0, w0, 1
+	str	w0, [x1, 60]
+	ldrh	w0, [x20, 28]
+	add	w0, w0, 1
+	strh	w0, [x20, 28]
+	b	.L2548
+.L2555:
+	adrp	x0, .LANCHOR22
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	tbz	x0, 8, .L2560
+	add	x20, x20, :lo12:.LANCHOR58
+	mov	w0, w21
+	bl	lpa_hash_get_ppa
+	mov	w3, w0
+	mov	w4, w22
+	adrp	x0, .LC150
+	ldrh	w5, [x20, 26]
+	mov	w2, w23
+	mov	w1, w21
+	add	x0, x0, :lo12:.LC150
+	bl	printf
+.L2560:
+	mov	x0, x19
+	bl	buf_free
+	b	.L2548
+.L2549:
+	adrp	x1, .LANCHOR60
+	adrp	x0, .LANCHOR64
+	stp	x0, x1, [x29, 128]
+	adrp	x24, .LANCHOR58
+	ldr	x22, [x1, #:lo12:.LANCHOR60]
+	ldrb	w25, [x0, #:lo12:.LANCHOR64]
+	add	x22, x22, 80
+	cmp	w25, 3
+	bne	.L2561
+	adrp	x0, .LANCHOR66
+	ldrb	w0, [x0, #:lo12:.LANCHOR66]
+	cbz	w0, .L2562
+	add	x0, x24, :lo12:.LANCHOR58
+	ldrb	w19, [x22, 9]
+	ldrh	w20, [x0, 314]
+	add	w21, w19, w19, lsl 1
+	sub	w19, w19, w19, lsl 2
+	sdiv	w21, w20, w21
+	madd	w19, w21, w19, w20
+	and	w19, w19, 65535
+.L2563:
+	adrp	x1, .LANCHOR68
+	ldrb	w0, [x22, 9]
+	add	x4, x24, :lo12:.LANCHOR58
+	mov	w2, 0
+	ldrh	w3, [x1, #:lo12:.LANCHOR68]
+	mul	w8, w25, w0
+	ldrh	w10, [x4, 24]
+	mul	w3, w3, w0
+	adrp	x0, .LANCHOR108
+	ldr	x7, [x0, #:lo12:.LANCHOR108]
+	sub	w3, w3, #1
+.L2566:
+	cmp	w2, w8
+	blt	.L2568
+.L2596:
+	mov	w23, 1
+	b	.L2564
+.L2562:
+	add	x0, x24, :lo12:.LANCHOR58
+	ldrb	w20, [x22, 9]
+	ldrh	w1, [x0, 314]
+	adrp	x0, .LANCHOR171
+	add	x0, x0, :lo12:.LANCHOR171
+	sdiv	w19, w1, w20
+	ldrh	w23, [x0, w19, sxtw 1]
+	msub	w19, w19, w20, w1
+	and	w19, w19, 65535
+	lsr	w21, w23, 3
+	and	w23, w23, 7
+	cmp	w23, 1
+	madd	w20, w21, w20, w19
+	add	w20, w20, w20, lsl 1
+	and	w20, w20, 65535
+	beq	.L2563
+.L2564:
+	adrp	x0, .LANCHOR22
+	str	x0, [x29, 112]
+	ldr	w1, [x0, #:lo12:.LANCHOR22]
+	tbz	x1, 8, .L2569
+	adrp	x0, .LANCHOR108
+	ubfiz	x1, x20, 2, 16
+	mov	w6, w20
+	mov	w3, w19
+	ldr	x2, [x0, #:lo12:.LANCHOR108]
+	add	x0, x24, :lo12:.LANCHOR58
+	ldrh	w4, [x0, 314]
+	adrp	x0, .LC151
+	ldr	w5, [x2, x1]
+	add	x0, x0, :lo12:.LC151
+	mov	w2, w23
+	mov	w1, w21
+	bl	printf
+.L2569:
+	adrp	x0, .LANCHOR36
+	str	wzr, [x29, 152]
+	add	x0, x0, :lo12:.LANCHOR36
+	str	x0, [x29, 120]
+.L2570:
+	ldrb	w2, [x22, 9]
+	ldr	w0, [x29, 152]
+	ldrh	w26, [x29, 152]
+	and	w0, w0, 65535
+	str	w0, [x29, 156]
+	mul	w1, w25, w2
+	cmp	w0, w1
+	blt	.L2583
+	ldr	x0, [x29, 128]
+	ldrb	w0, [x0, #:lo12:.LANCHOR64]
+	cmp	w0, 3
+	add	x0, x29, 160
+	beq	.L2584
+	sub	w3, w1, #1
+	mov	w2, 0
+.L2585:
+	cmp	w2, w3
+	blt	.L2591
+	ldr	x0, [x0, w3, sxtw 3]
+	mov	w2, -1
+	strb	w2, [x0]
+	ldr	x0, [x29, 160]
+	bl	sblk_prog_page
+	b	.L2590
+.L2561:
+	adrp	x0, .LANCHOR74
+	ldrb	w0, [x0, #:lo12:.LANCHOR74]
+	cbnz	w0, .L2565
+	add	x0, x24, :lo12:.LANCHOR58
+	ldrb	w19, [x22, 9]
+	mov	w25, 1
+	ldrh	w20, [x0, 314]
+	sdiv	w21, w20, w19
+	msub	w19, w21, w19, w20
+	and	w19, w19, 65535
+	b	.L2563
+.L2565:
+	add	x0, x24, :lo12:.LANCHOR58
+	ldrb	w19, [x22, 9]
+	mov	w25, 2
+	ldrh	w20, [x0, 314]
+	sdiv	w21, w20, w19
+	msub	w19, w21, w19, w20
+	and	w19, w19, 65535
+	b	.L2563
+.L2568:
+	add	w5, w20, w2
+	cmp	w5, w3
+	beq	.L2596
+	sbfiz	x5, x5, 2, 32
+	ldr	w0, [x7, x5]
+	cmn	w0, #1
+	bne	.L2567
+	ldrh	w6, [x4, 26]
+	cmp	w6, w10
+	bcs	.L2548
+	mov	w0, w6
+	bl	gc_get_src_ppa_from_index
+	add	w6, w6, 1
+	strh	w6, [x4, 26]
+	str	w0, [x7, x5]
+.L2567:
+	add	w2, w2, 1
+	and	w2, w2, 65535
+	b	.L2566
+.L2583:
+	ldr	w0, [x29, 156]
+	add	w0, w20, w0
+	str	w0, [x29, 144]
+	sxtw	x27, w0
+	adrp	x0, .LANCHOR65
+	ldr	x0, [x0, #:lo12:.LANCHOR65]
+	ldrb	w0, [x0, x27]
+	cmp	w0, 255
+	bne	.L2571
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x28, x0
+	cbnz	x0, .L2572
+	bl	sblk_wait_write_queue_completed
+	bl	ftl_write_completed
+	bl	gc_write_completed
+	bl	gc_free_temp_buf
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x28, x0
+	cbz	x0, .L2548
+.L2572:
+	adrp	x0, .LANCHOR65
+	ldrb	w1, [x28, 1]
+	adrp	x5, .LANCHOR68
+	adrp	x6, .LANCHOR108
+	ldr	x0, [x0, #:lo12:.LANCHOR65]
+	strb	w1, [x0, x27]
+	add	x1, x24, :lo12:.LANCHOR58
+	strb	w23, [x28, 61]
+	ldrh	w7, [x5, #:lo12:.LANCHOR68]
+	ldrb	w0, [x1, 7]
+	add	w0, w0, 1
+	strb	w0, [x1, 7]
+	add	w0, w26, w20
+	strh	w0, [x28, 48]
+	ldr	w1, [x29, 144]
+	ldrb	w0, [x22, 9]
+	mul	w0, w0, w7
+	sub	w0, w0, #1
+	cmp	w1, w0
+	bne	.L2573
+	adrp	x0, .LANCHOR107
+	adrp	x4, .LANCHOR69
+	stp	x6, x5, [x29, 96]
+	ldr	x1, [x0, #:lo12:.LANCHOR107]
+	mov	w0, -1
+	str	x4, [x29, 144]
+	str	w0, [x1, x27, lsl 2]
+	ldr	x0, [x28, 8]
+	ldrb	w2, [x4, #:lo12:.LANCHOR69]
+	mul	w2, w2, w7
+	lsl	w2, w2, 2
+	bl	ftl_memcpy
+	ldp	x6, x5, [x29, 96]
+	ldr	x4, [x29, 144]
+	ldr	x7, [x28, 8]
+	ldrh	w0, [x5, #:lo12:.LANCHOR68]
+	ldrb	w1, [x4, #:lo12:.LANCHOR69]
+	mul	w0, w0, w1
+	ldr	x1, [x6, #:lo12:.LANCHOR108]
+	lsl	w2, w0, 2
+	add	x0, x7, x0, sxtw 2
+	bl	ftl_memcpy
+	adrp	x0, .LANCHOR45
+	mov	w1, 0
+	ldrb	w2, [x0, #:lo12:.LANCHOR45]
+	ldr	x0, [x28, 24]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	ldr	x6, [x28, 24]
+	mov	w0, 15555
+	ldr	x5, [x29, 104]
+	movk	w0, 0xf55f, lsl 16
+	ldr	x4, [x29, 144]
+	ldrh	w1, [x5, #:lo12:.LANCHOR68]
+	str	w0, [x6]
+	ldrb	w0, [x4, #:lo12:.LANCHOR69]
+	mul	w1, w1, w0
+	ldr	x0, [x28, 8]
+	lsl	w1, w1, 2
+	bl	js_hash
+	str	w0, [x6, 4]
+	ldr	x0, [x29, 136]
+	ldr	x0, [x0, #:lo12:.LANCHOR60]
+	ldr	w0, [x0, 132]
+	str	w0, [x6, 8]
+.L2571:
+	adrp	x0, .LANCHOR65
+	ldr	w5, [x29, 156]
+	add	x3, x29, 160
+	ldr	x4, [x0, #:lo12:.LANCHOR65]
+	adrp	x0, .LANCHOR36
+	add	x2, x0, :lo12:.LANCHOR36
+	ldrb	w1, [x4, x27]
+	ubfiz	x0, x1, 6, 8
+	add	x0, x2, x0
+	add	x2, x2, x1, lsl 6
+	str	x0, [x3, w5, sxtw 3]
+	mov	w0, 1
+	adrp	x5, .LANCHOR109
+	strh	w0, [x2, 50]
+	ldr	x0, [x29, 128]
+	strb	w23, [x2, 61]
+	ldrb	w0, [x0, #:lo12:.LANCHOR64]
+	cmp	w0, 3
+	bne	.L2578
+	udiv	w0, w26, w0
+	adrp	x6, .LANCHOR75
+	ldrh	w6, [x6, #:lo12:.LANCHOR75]
+	add	w3, w0, w19
+	add	w0, w0, w0, lsl 1
+	add	x3, x22, x3, sxtw 1
+	sub	w0, w26, w0
+	and	w0, w0, 65535
+	add	w0, w0, 1
+	ldrh	w3, [x3, 16]
+	mul	w3, w3, w6
+	ldrh	w6, [x2, 48]
+	orr	w3, w3, w21
+	str	w3, [x2, 40]
+	ldr	x2, [x5, #:lo12:.LANCHOR109]
+	orr	w0, w3, w0, lsl 24
+	str	w0, [x2, x6, lsl 2]
+.L2579:
+	ldr	x0, [x29, 112]
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	tbz	x0, 8, .L2582
+	ldr	x0, [x29, 120]
+	mov	w2, w23
+	ldrb	w4, [x4, x27]
+	add	x1, x0, x1, lsl 6
+	add	x0, x24, :lo12:.LANCHOR58
+	ldrb	w3, [x0, 6]
+	ldr	x0, [x1, 24]
+	ldrb	w7, [x1, 1]
+	ldrh	w6, [x1, 48]
+	ldr	w0, [x0, 4]
+	str	w0, [sp, 8]
+	mov	w0, 3
+	udiv	w26, w26, w0
+	adrp	x0, .LC152
+	add	x0, x0, :lo12:.LC152
+	add	w26, w26, w19
+	str	w26, [sp]
+	ldr	w5, [x1, 40]
+	ldr	w1, [x29, 156]
+	bl	printf
+.L2582:
+	ldr	w0, [x29, 152]
+	add	w0, w0, 1
+	str	w0, [x29, 152]
+	b	.L2570
+.L2573:
+	ldr	x0, [x6, #:lo12:.LANCHOR108]
+	lsl	x4, x27, 2
+	mov	w1, 1
+	str	x4, [x29, 144]
+	ldr	w0, [x0, x4]
+	str	w0, [x28, 40]
+	mov	x0, x28
+	bl	sblk_read_page
+	ldr	w0, [x28, 52]
+	ldr	x4, [x29, 144]
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	bne	.L2575
+	adrp	x0, .LANCHOR71
+	ldr	w1, [x28, 40]
+	ldrh	w5, [x0, #:lo12:.LANCHOR71]
+	mov	w0, 21
+	sub	w2, w0, w5
+	mov	w0, 1
+	lsr	w1, w1, w5
+	lsl	w0, w0, w2
+	sub	w0, w0, #1
+	and	w0, w0, w1
+	adrp	x1, .LANCHOR70
+	ldrb	w2, [x1, #:lo12:.LANCHOR70]
+	mov	x1, 0
+	udiv	w0, w0, w2
+	bl	ftl_sblk_dump
+	ldr	w0, [x28, 52]
+	ldr	x4, [x29, 144]
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	bne	.L2575
+	ldr	x0, [x28, 24]
+	mov	w1, -1
+	str	w1, [x0, 4]
+	ldr	w0, [x28, 52]
+	cmp	w0, 512
+	ccmp	w0, w1, 4, ne
+	bne	.L2575
+	adrp	x1, .LANCHOR170
+	adrp	x0, .LC0
+	mov	w2, 671
+	add	x1, x1, :lo12:.LANCHOR170
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2576:
+	b	.L2576
+.L2575:
+	ldr	x0, [x28, 24]
+	adrp	x1, .LANCHOR47
+	ldr	w1, [x1, #:lo12:.LANCHOR47]
+	ldr	w2, [x0, 4]
+	cmp	w2, w1
+	bcc	.L2577
+	mov	w1, -1
+	str	w1, [x0, 4]
+.L2577:
+	adrp	x1, .LANCHOR107
+	ldr	w2, [x0, 4]
+	ldr	x1, [x1, #:lo12:.LANCHOR107]
+	str	w2, [x1, x4]
+	ldr	w1, [x28, 40]
+	str	w1, [x0, 8]
+	b	.L2571
+.L2578:
+	cmp	w0, 2
+	bne	.L2580
+	adrp	x0, .LANCHOR74
+	adrp	x3, .LANCHOR75
+	ldrb	w0, [x0, #:lo12:.LANCHOR74]
+	cbnz	w0, .L2581
+	ldr	w0, [x29, 156]
+	ldrh	w3, [x3, #:lo12:.LANCHOR75]
+	add	w0, w19, w0
+	add	x0, x22, x0, sxtw 1
+	ldrh	w0, [x0, 16]
+	madd	w0, w0, w3, w21
+.L2639:
+	orr	w0, w0, 33554432
+	str	w0, [x2, 40]
+.L2580:
+	ldr	x0, [x29, 120]
+	add	x0, x0, x1, lsl 6
+	ldrh	w2, [x0, 48]
+	ldr	w3, [x0, 40]
+	ldr	x0, [x5, #:lo12:.LANCHOR109]
+	str	w3, [x0, x2, lsl 2]
+	b	.L2579
+.L2581:
+	add	w0, w19, w26, lsr 1
+	ldrh	w3, [x3, #:lo12:.LANCHOR75]
+	add	x0, x22, x0, sxtw 1
+	ldrh	w0, [x0, 16]
+	madd	w0, w0, w3, w21
+	and	w3, w26, 1
+	add	w0, w0, w3
+	b	.L2639
+.L2584:
+	adrp	x1, .LANCHOR66
+	ldrb	w3, [x1, #:lo12:.LANCHOR66]
+	ldr	x1, [x29, 160]
+	cbz	w3, .L2586
+.L2589:
+	strb	wzr, [x1, 60]
+	b	.L2587
+.L2586:
+	cmp	w23, 1
+	bne	.L2588
+	mov	w3, 9
+.L2638:
+	strb	w3, [x1, 60]
+.L2587:
+	add	x1, x0, 24
+	bl	sblk_xlc_prog_pages
+.L2590:
+	adrp	x1, .LANCHOR66
+	ldrb	w3, [x22, 9]
+	ldrb	w1, [x1, #:lo12:.LANCHOR66]
+	and	w0, w3, 65535
+	cbz	w1, .L2592
+	add	w0, w0, w0, lsl 1
+.L2593:
+	adrp	x1, .LANCHOR46
+	add	x24, x24, :lo12:.LANCHOR58
+	ldr	x1, [x1, #:lo12:.LANCHOR46]
+	ldr	w2, [x1, 52]
+	add	w2, w2, w0
+	str	w2, [x1, 52]
+	ldrh	w1, [x24, 314]
+	add	w0, w0, w1
+	adrp	x1, .LANCHOR68
+	and	w0, w0, 65535
+	strh	w0, [x24, 314]
+	ldrh	w1, [x1, #:lo12:.LANCHOR68]
+	mul	w1, w1, w3
+	cmp	w0, w1
+	blt	.L2594
+	ldr	x0, [x29, 136]
+	ldr	x0, [x0, #:lo12:.LANCHOR60]
+	strh	wzr, [x0, 86]
+.L2594:
+	bl	gc_write_completed
+	b	.L2548
+.L2588:
+	cmp	w23, 2
+	bne	.L2589
+	mov	w3, 13
+	b	.L2638
+.L2591:
+	ldr	x4, [x0, w2, sxtw 3]
+	add	w2, w2, 1
+	ldr	x5, [x0, w2, sxtw 3]
+	and	w2, w2, 65535
+	ldrb	w5, [x5, 1]
+	strb	w5, [x4]
+	b	.L2585
+.L2592:
+	adrp	x1, .LANCHOR74
+	ldrb	w2, [x1, #:lo12:.LANCHOR74]
+	mov	w1, w0
+	ubfiz	w0, w0, 1, 15
+	cmp	w2, 0
+	csel	w0, w0, w1, ne
+	b	.L2593
+	.size	gc_do_copy_back, .-gc_do_copy_back
+	.section	.text.do_gc,"ax",@progbits
+	.align	2
+	.global	do_gc
+	.type	do_gc, %function
+do_gc:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x24, .LANCHOR46
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR104
+	ldr	x1, [x24, #:lo12:.LANCHOR46]
+	adrp	x23, .LANCHOR60
+	stp	x21, x22, [sp, 32]
+	stp	x25, x26, [sp, 64]
+	ldrb	w3, [x20, #:lo12:.LANCHOR104]
+	ldrh	w19, [x1, 116]
+	ldrh	w21, [x1, 114]
+	cmp	w3, 6
+	stp	x27, x28, [sp, 80]
+	ldr	x25, [x23, #:lo12:.LANCHOR60]
+	add	w21, w19, w21
+	bhi	.L2640
+	adrp	x2, .L2643
+	and	w21, w21, 65535
+	add	x2, x2, :lo12:.L2643
+	ldrh	w2, [x2,w3,uxtw #1]
+	adr	x3, .Lrtx2643
+	add	x2, x3, w2, sxth #2
+	br	x2
+.Lrtx2643:
+	.section	.rodata.do_gc,"a",@progbits
+	.align	0
+	.align	2
+.L2643:
+	.2byte	(.L2642 - .Lrtx2643) / 4
+	.2byte	(.L2644 - .Lrtx2643) / 4
+	.2byte	(.L2645 - .Lrtx2643) / 4
+	.2byte	(.L2646 - .Lrtx2643) / 4
+	.2byte	(.L2647 - .Lrtx2643) / 4
+	.2byte	(.L2648 - .Lrtx2643) / 4
+	.2byte	(.L2649 - .Lrtx2643) / 4
+	.section	.text.do_gc
+.L2642:
+	ldrh	w2, [x1, 118]
+	adrp	x22, .LANCHOR67
+	ldrh	w3, [x25, 80]
+	add	w19, w19, w2
+	mov	w2, 65535
+	and	w19, w19, 65535
+	cmp	w3, w2
+	beq	.L2650
+	adrp	x0, .LANCHOR22
+	cmp	w19, 7
+	mov	w23, 3
+	csinc	w23, w23, wzr, hi
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	tbz	x0, 8, .L2652
+	ldrh	w7, [x25, 122]
+	adrp	x0, .LC153
+	ldrh	w6, [x25, 120]
+	mov	w4, w19
+	ldrh	w5, [x25, 124]
+	mov	w3, w21
+	ldrb	w2, [x22, #:lo12:.LANCHOR67]
+	mov	w1, 1348
+	add	x0, x0, :lo12:.LC153
+	bl	printf
+.L2652:
+	ldrb	w0, [x22, #:lo12:.LANCHOR67]
+	mov	w2, 1
+	mov	w1, w23
+	bl	gc_search_src_blk
+	cmp	w0, 0
+	ble	.L2640
+.L2653:
+	mov	w0, 1
+.L2774:
+	strb	w0, [x20, #:lo12:.LANCHOR104]
+	b	.L2640
+.L2650:
+	ldrh	w25, [x1, 122]
+	cmp	w0, 1
+	ldrh	w27, [x1, 124]
+	bne	.L2654
+	bl	gc_scan_static_data
+	bl	gc_static_wearleveling
+.L2654:
+	ldr	x0, [x23, #:lo12:.LANCHOR60]
+	mov	w26, 1
+	strb	w26, [x22, #:lo12:.LANCHOR67]
+	ldrh	w5, [x0, 124]
+	cbz	w5, .L2655
+	adrp	x1, .LANCHOR22
+	strb	wzr, [x22, #:lo12:.LANCHOR67]
+	strb	w26, [x20, #:lo12:.LANCHOR104]
+	ldr	w1, [x1, #:lo12:.LANCHOR22]
+	tbz	x1, 8, .L2640
+	ldrh	w7, [x0, 122]
+	mov	w4, w19
+	ldrh	w6, [x0, 120]
+	mov	w3, w21
+	ldp	x19, x20, [sp, 16]
+	mov	w2, 0
+	ldp	x21, x22, [sp, 32]
+	mov	w1, 1373
+	ldp	x23, x24, [sp, 48]
+	adrp	x0, .LC153
+	ldp	x25, x26, [sp, 64]
+	add	x0, x0, :lo12:.LC153
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	b	printf
+.L2655:
+	cmp	w21, 47
+	bhi	.L2657
+	cmp	w19, 1
+	bls	.L2658
+	cmp	w19, 16
+	bhi	.L2659
+	ldr	x0, [x24, #:lo12:.LANCHOR46]
+	ldrh	w0, [x0, 120]
+	cmp	w0, 127
+	bhi	.L2660
+.L2659:
+	mov	w2, 16
+	mov	w1, 3
+.L2779:
+	mov	w0, 1
+.L2772:
+	bl	gc_search_src_blk
+	and	w0, w0, 65535
+.L2661:
+	cbnz	w0, .L2653
+	b	.L2640
+.L2660:
+	mov	w2, 8
+	mov	w1, 2
+	b	.L2779
+.L2658:
+	adrp	x1, .LANCHOR22
+	strb	wzr, [x22, #:lo12:.LANCHOR67]
+	ldr	w1, [x1, #:lo12:.LANCHOR22]
+	tbz	x1, 8, .L2662
+	ldrh	w7, [x0, 122]
+	mov	w5, 0
+	ldrh	w6, [x0, 120]
+	mov	w4, w19
+	adrp	x0, .LC153
+	mov	w3, w21
+	mov	w2, 0
+	mov	w1, 1386
+	add	x0, x0, :lo12:.LC153
+	bl	printf
+.L2662:
+	cmp	w21, 16
+	bls	.L2663
+	mov	w2, 1
+.L2777:
+	mov	w1, 2
+	b	.L2771
+.L2663:
+	mov	w2, 16
+.L2773:
+	mov	w1, 1
+.L2771:
+	ldrb	w0, [x22, #:lo12:.LANCHOR67]
+	b	.L2772
+.L2657:
+	add	w25, w25, w27
+	cmp	w21, 127
+	and	w25, w25, 65535
+	bhi	.L2664
+	sub	w0, w19, #2
+	and	w0, w0, 65535
+	cmp	w0, 13
+	bhi	.L2665
+	mov	w2, 8
+	mov	w1, 2
+	mov	w0, w26
+	bl	gc_search_src_blk
+	tst	w0, 65535
+	bne	.L2653
+.L2668:
+	adrp	x0, .LANCHOR64
+	adrp	x26, .LANCHOR58
+	ldrb	w0, [x0, #:lo12:.LANCHOR64]
+	cmp	w0, 2
+	adrp	x0, .LANCHOR22
+	bne	.L2768
+	add	x1, x26, :lo12:.LANCHOR58
+	cmp	w19, 1
+	strh	wzr, [x1, 34]
+	bls	.L2669
+.L2672:
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	mov	w1, 1
+	strb	w1, [x22, #:lo12:.LANCHOR67]
+	tbz	x0, 8, .L2671
+	ldr	x0, [x23, #:lo12:.LANCHOR60]
+	mov	w4, w19
+	mov	w3, w21
+	mov	w2, 1
+	mov	w1, 1411
+	ldrh	w7, [x0, 122]
+	ldrh	w6, [x0, 120]
+	ldrh	w5, [x0, 124]
+	adrp	x0, .LC153
+	add	x0, x0, :lo12:.LC153
+	bl	printf
+.L2671:
+	add	x26, x26, :lo12:.LANCHOR58
+	mov	w2, 16
+	mov	w1, 1
+	ldrh	w0, [x26, 34]
+	strh	wzr, [x26, 32]
+	add	w0, w0, 1
+	strh	w0, [x26, 34]
+	ldrb	w0, [x22, #:lo12:.LANCHOR67]
+	bl	gc_search_src_blk
+	and	w0, w0, 65535
+	cmp	w0, 7
+	ccmp	w19, 31, 2, ls
+	bls	.L2673
+	ldr	x1, [x24, #:lo12:.LANCHOR46]
+	ldrh	w2, [x1, 120]
+	adrp	x1, .LANCHOR163
+	ldrh	w1, [x1, #:lo12:.LANCHOR163]
+	cmp	w2, w1
+	bls	.L2661
+.L2673:
+	cmp	w25, 63
+	bhi	.L2674
+	mov	w2, 8
+	b	.L2777
+.L2665:
+	adrp	x0, .LANCHOR165
+	ldrh	w0, [x0, #:lo12:.LANCHOR165]
+	cmp	w25, w0, lsr 1
+	bcs	.L2668
+.L2640:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	ret
+.L2768:
+	cmp	w19, 1
+	bls	.L2669
+	add	x1, x26, :lo12:.LANCHOR58
+	ldrh	w1, [x1, 34]
+	cmp	w1, 3
+	bls	.L2672
+.L2669:
+	add	x26, x26, :lo12:.LANCHOR58
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	strb	wzr, [x22, #:lo12:.LANCHOR67]
+	strh	wzr, [x26, 34]
+	tbz	x0, 8, .L2675
+	ldr	x0, [x23, #:lo12:.LANCHOR60]
+	mov	w4, w19
+	mov	w3, w21
+	mov	w2, 0
+	mov	w1, 1426
+	ldrh	w7, [x0, 122]
+	ldrh	w6, [x0, 120]
+	ldrh	w5, [x0, 124]
+	adrp	x0, .LC153
+	add	x0, x0, :lo12:.LC153
+	bl	printf
+.L2675:
+	adrp	x0, .LANCHOR165
+	ldrh	w0, [x0, #:lo12:.LANCHOR165]
+	cmp	w25, w0, lsr 1
+	bls	.L2640
+	mov	w2, 16
+	cmp	w19, 31
+	bhi	.L2773
+	b	.L2778
+.L2674:
+	mov	w2, 16
+.L2778:
+	mov	w1, 3
+	b	.L2771
+.L2664:
+	cmp	w21, 255
+	bhi	.L2677
+	adrp	x0, .LANCHOR165
+	ldrh	w0, [x0, #:lo12:.LANCHOR165]
+	cmp	w25, w0
+	bls	.L2677
+	cmp	w25, w0, lsr 1
+	bcc	.L2640
+	strb	wzr, [x22, #:lo12:.LANCHOR67]
+	mov	w2, 16
+	mov	w1, w26
+	mov	w0, 0
+	bl	gc_search_src_blk
+	and	w0, w0, 65535
+	cmp	w0, 7
+	ccmp	w19, 4, 0, ls
+	bls	.L2661
+	ldr	x0, [x23, #:lo12:.LANCHOR60]
+	mov	w1, 255
+	mov	w2, 128
+	add	x0, x0, 136
+	strh	wzr, [x0, -16]
+	bl	ftl_memset
+	strb	w26, [x22, #:lo12:.LANCHOR67]
+	ldr	x0, [x24, #:lo12:.LANCHOR46]
+	ldrh	w1, [x0, 120]
+	adrp	x0, .LANCHOR163
+	ldrh	w0, [x0, #:lo12:.LANCHOR163]
+	cmp	w1, w0
+	bls	.L2678
+	cmp	w19, 16
+	bls	.L2679
+.L2681:
+	mov	w2, 8
+	mov	w1, 2
+.L2770:
+	mov	w0, 1
+	bl	gc_search_src_blk
+	mov	w1, 1
+	and	w0, w0, 65535
+	strb	w1, [x20, #:lo12:.LANCHOR104]
+	b	.L2661
+.L2678:
+	cmp	w19, 32
+	bls	.L2679
+	mov	w2, 16
+	mov	w1, w26
+	b	.L2770
+.L2679:
+	cmp	w19, 7
+	bls	.L2681
+	mov	w2, 16
+	mov	w1, 3
+	b	.L2770
+.L2677:
+	sub	w19, w19, #2
+	and	w19, w19, 65535
+	cmp	w19, 5
+	bhi	.L2640
+	adrp	x0, .LANCHOR165
+	ldrh	w0, [x0, #:lo12:.LANCHOR165]
+	cmp	w25, w0, lsr 1
+	bls	.L2640
+	mov	w2, 16
+	mov	w1, 2
+	mov	w0, 1
+	bl	gc_search_src_blk
+	and	w0, w0, 65535
+	cmp	w0, 15
+	bhi	.L2653
+	ldr	x3, [x23, #:lo12:.LANCHOR60]
+	mov	w2, 128
+	ldrb	w1, [x22, #:lo12:.LANCHOR67]
+	ldp	x19, x20, [sp, 16]
+	add	x0, x3, x1, sxtw 1
+	ubfiz	x1, x1, 7, 8
+	ldp	x21, x22, [sp, 32]
+	strh	wzr, [x0, 120]
+	add	x0, x1, 136
+	ldp	x23, x24, [sp, 48]
+	mov	w1, 255
+	ldp	x25, x26, [sp, 64]
+	add	x0, x3, x0
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	b	ftl_memset
+.L2644:
+	adrp	x7, .LANCHOR58
+	mov	w0, 65535
+	ldrh	w1, [x7, #:lo12:.LANCHOR58]
+	cmp	w1, w0
+	bne	.L2684
+	bl	gc_get_src_blk
+	strh	w0, [x7, #:lo12:.LANCHOR58]
+.L2684:
+	ldrh	w0, [x7, #:lo12:.LANCHOR58]
+	mov	w1, 65535
+	add	x2, x7, :lo12:.LANCHOR58
+	cmp	w0, w1
+	beq	.L2685
+	ldrh	w3, [x2, 56]
+	cbz	w3, .L2686
+	add	x2, x2, 58
+	mov	w1, 0
+.L2688:
+	ldrh	w4, [x2], 2
+	cmp	w4, w0
+	bne	.L2687
+.L2691:
+	adrp	x0, .LANCHOR58
+	mov	w1, -1
+	strh	w1, [x0, #:lo12:.LANCHOR58]
+	b	.L2640
+.L2687:
+	add	w1, w1, 1
+	and	w1, w1, 65535
+	cmp	w3, w1
+	bne	.L2688
+.L2686:
+	adrp	x1, .LANCHOR59
+	ldr	x1, [x1, #:lo12:.LANCHOR59]
+	add	x1, x1, x0, lsl 2
+	ldrb	w1, [x1, 2]
+	and	w2, w1, 224
+	cmp	w2, 224
+	beq	.L2689
+	tst	w1, 192
+	bne	.L2690
+.L2689:
+	adrp	x1, .LANCHOR56
+	ldr	x1, [x1, #:lo12:.LANCHOR56]
+	ldrh	w0, [x1, x0, lsl 1]
+	cbz	w0, .L2691
+	adrp	x1, .LANCHOR172
+	adrp	x0, .LC0
+	mov	w2, 1497
+	add	x1, x1, :lo12:.LANCHOR172
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2692:
+	b	.L2692
+.L2690:
+	mov	w0, 2
+	b	.L2774
+.L2685:
+	strb	wzr, [x20, #:lo12:.LANCHOR104]
+	b	.L2640
+.L2645:
+	bl	gc_scan_src_blk
+	cmn	w0, #1
+	bne	.L2693
+	mov	w0, 3
+	b	.L2774
+.L2693:
+	adrp	x21, .LANCHOR58
+	mov	w1, 65535
+	add	x19, x21, :lo12:.LANCHOR58
+	ldrh	w0, [x21, #:lo12:.LANCHOR58]
+	cmp	w0, w1
+	beq	.L2653
+	ldrh	w1, [x19, 24]
+	cbz	w1, .L2694
+	mov	w0, 4
+	strh	wzr, [x19, 26]
+	strb	w0, [x20, #:lo12:.LANCHOR104]
+	b	.L2640
+.L2694:
+	mov	w1, 1
+	strb	w1, [x20, #:lo12:.LANCHOR104]
+	adrp	x20, .LANCHOR56
+	ubfiz	x1, x0, 1, 16
+	ldr	x2, [x20, #:lo12:.LANCHOR56]
+	ldrh	w1, [x2, x1]
+	cbz	w1, .L2695
+	adrp	x1, .LANCHOR172
+	adrp	x0, .LC0
+	mov	w2, 1525
+	add	x1, x1, :lo12:.LANCHOR172
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2696:
+	b	.L2696
+.L2695:
+	bl	ftl_free_sblk
+	ldr	x0, [x20, #:lo12:.LANCHOR56]
+	ldrh	w1, [x21, #:lo12:.LANCHOR58]
+	strh	wzr, [x0, x1, lsl 1]
+	ldrh	w0, [x19, 30]
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	strh	w0, [x19, 30]
+	cmp	w0, 8
+	bls	.L2691
+	strh	wzr, [x19, 30]
+	bl	ftl_flush
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	mov	w0, 0
+	bl	ftl_info_flush
+	b	.L2691
+.L2646:
+	bl	gc_scan_src_blk_one_page
+	adrp	x19, .LANCHOR58
+	add	x0, x19, :lo12:.LANCHOR58
+	adrp	x1, .LANCHOR79
+	ldrh	w1, [x1, #:lo12:.LANCHOR79]
+	ldrh	w2, [x0, 2]
+	cmp	w2, w1
+	bcc	.L2640
+	ldrh	w3, [x0, 24]
+	adrp	x2, .LANCHOR22
+	cbz	w3, .L2697
+	strh	wzr, [x0, 26]
+	mov	w1, 4
+	ldr	w0, [x2, #:lo12:.LANCHOR22]
+	strb	w1, [x20, #:lo12:.LANCHOR104]
+	adrp	x20, .LANCHOR56
+	tbz	x0, 8, .L2698
+	ldrh	w1, [x19, #:lo12:.LANCHOR58]
+	ldr	x2, [x20, #:lo12:.LANCHOR56]
+	ubfiz	x0, x1, 1, 16
+	ldrh	w2, [x2, x0]
+	adrp	x0, .LC154
+	add	x0, x0, :lo12:.LC154
+	bl	printf
+.L2698:
+	ldrh	w2, [x19, #:lo12:.LANCHOR58]
+	add	x0, x19, :lo12:.LANCHOR58
+	ldr	x1, [x20, #:lo12:.LANCHOR56]
+	ldrh	w0, [x0, 24]
+	ldrh	w1, [x1, x2, lsl 1]
+	cmp	w1, w0
+	beq	.L2640
+	adrp	x1, .LANCHOR172
+	adrp	x0, .LC0
+	mov	w2, 1555
+	add	x1, x1, :lo12:.LANCHOR172
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2699:
+	b	.L2699
+.L2697:
+	adrp	x0, .LANCHOR59
+	ldrh	w1, [x19, #:lo12:.LANCHOR58]
+	ldr	x21, [x0, #:lo12:.LANCHOR59]
+	mov	w0, 1
+	strb	w0, [x20, #:lo12:.LANCHOR104]
+	ldr	w0, [x2, #:lo12:.LANCHOR22]
+	add	x21, x21, x1, uxth 2
+	tbz	x0, 8, .L2700
+	ldrb	w2, [x21, 2]
+	adrp	x0, .LC155
+	add	x0, x0, :lo12:.LC155
+	ubfx	x2, x2, 5, 3
+	bl	printf
+.L2700:
+	ldrb	w0, [x21, 2]
+	and	w1, w0, 224
+	cmp	w1, 224
+	beq	.L2701
+	tst	w0, 192
+	bne	.L2702
+.L2701:
+	adrp	x1, .LANCHOR172
+	adrp	x0, .LC0
+	mov	w2, 1565
+	add	x1, x1, :lo12:.LANCHOR172
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2703:
+	b	.L2703
+.L2702:
+	ldrh	w0, [x19, #:lo12:.LANCHOR58]
+	add	x20, x19, :lo12:.LANCHOR58
+	bl	ftl_free_sblk
+	mov	w0, -1
+	strh	w0, [x19, #:lo12:.LANCHOR58]
+	ldrh	w0, [x20, 30]
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	strh	w0, [x20, 30]
+	cmp	w0, 8
+	bls	.L2640
+	strh	wzr, [x20, 30]
+.L2776:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	b	flt_sys_flush
+.L2647:
+	ldrh	w27, [x25, 80]
+	mov	w0, 65535
+	add	x26, x25, 80
+	cmp	w27, w0
+	bne	.L2704
+	adrp	x0, .LANCHOR67
+	ldrb	w22, [x0, #:lo12:.LANCHOR67]
+	cmp	w22, 1
+	bne	.L2704
+	bl	ftl_flush
+	mov	w0, 5
+	bl	ftl_alloc_sblk
+	and	w28, w0, 65535
+	cmp	w28, w27
+	bne	.L2705
+	adrp	x1, .LANCHOR172
+	adrp	x0, .LC0
+	mov	w2, 1581
+	add	x1, x1, :lo12:.LANCHOR172
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2706:
+	b	.L2706
+.L2705:
+	mov	w1, w22
+	bl	ftl_erase_sblk
+	mov	w0, 5
+	strb	w0, [x26, 4]
+	add	x1, x25, 96
+	mov	w0, w28
+	bl	ftl_get_blk_list_in_sblk
+	and	w0, w0, 255
+	adrp	x1, .LANCHOR79
+	strb	w0, [x26, 9]
+	adrp	x21, .LANCHOR68
+	adrp	x20, .LANCHOR69
+	ldrh	w1, [x1, #:lo12:.LANCHOR79]
+	strh	w28, [x25, 80]
+	ldrh	w2, [x21, #:lo12:.LANCHOR68]
+	strh	wzr, [x26, 2]
+	mul	w0, w0, w1
+	strb	wzr, [x26, 5]
+	strh	w0, [x26, 6]
+	mov	w1, 255
+	ldrb	w0, [x20, #:lo12:.LANCHOR69]
+	strh	wzr, [x26, 10]
+	mul	w2, w2, w0
+	adrp	x0, .LANCHOR107
+	ldr	x0, [x0, #:lo12:.LANCHOR107]
+	lsl	w2, w2, 2
+	bl	ftl_memset
+	ldrb	w0, [x20, #:lo12:.LANCHOR69]
+	mov	w1, 255
+	ldrh	w2, [x21, #:lo12:.LANCHOR68]
+	mul	w2, w2, w0
+	adrp	x0, .LANCHOR108
+	ldr	x0, [x0, #:lo12:.LANCHOR108]
+	lsl	w2, w2, 2
+	bl	ftl_memset
+	ldrb	w0, [x20, #:lo12:.LANCHOR69]
+	mov	w1, 255
+	ldrh	w2, [x21, #:lo12:.LANCHOR68]
+	mul	w2, w2, w0
+	adrp	x0, .LANCHOR65
+	ldr	x0, [x0, #:lo12:.LANCHOR65]
+	bl	ftl_memset
+	ldr	x0, [x23, #:lo12:.LANCHOR60]
+	mov	w1, -1
+	str	w28, [x0, 132]
+	strh	w1, [x0, 128]
+	strh	w1, [x0, 130]
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	ldr	x0, [x24, #:lo12:.LANCHOR46]
+	mov	w1, -1
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	strh	w28, [x0, 126]
+	adrp	x0, .LANCHOR58
+	add	x0, x0, :lo12:.LANCHOR58
+	ldp	x23, x24, [sp, 48]
+	strh	wzr, [x0, 314]
+	strh	wzr, [x0, 56]
+	strh	wzr, [x0, 316]
+	strh	wzr, [x0, 318]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	str	w1, [x0, 320]
+	mov	w0, 0
+	ldp	x29, x30, [sp], 96
+	b	ftl_info_flush
+.L2704:
+	cmp	w21, 31
+	bls	.L2724
+	cmp	w21, 63
+	bls	.L2725
+	cmp	w21, 127
+	bls	.L2726
+	cmp	w21, 255
+	cset	w21, ls
+	add	w21, w21, 1
+.L2707:
+	adrp	x27, .LANCHOR67
+	adrp	x22, .LANCHOR58
+	add	x27, x27, :lo12:.LANCHOR67
+	add	x19, x22, :lo12:.LANCHOR58
+	adrp	x28, .LANCHOR38
+.L2708:
+	sub	w21, w21, #1
+	and	w21, w21, 255
+	cmp	w21, 255
+	beq	.L2640
+	bl	gc_do_copy_back
+	ldrb	w0, [x27]
+	cbnz	w0, .L2709
+	ldrb	w0, [x28, #:lo12:.LANCHOR38]
+	cmp	w0, 3
+	bhi	.L2710
+	bl	ftl_write_commit
+.L2710:
+	ldrh	w1, [x19, 26]
+	ldrh	w0, [x19, 24]
+	cmp	w1, w0
+	bcc	.L2708
+	mov	w0, 1
+	strb	w0, [x20, #:lo12:.LANCHOR104]
+	bl	ftl_write_commit
+	bl	ftl_flush
+	ldrh	w0, [x19]
+	adrp	x2, .LANCHOR56
+	ldr	x2, [x2, #:lo12:.LANCHOR56]
+	ubfiz	x1, x0, 1, 16
+	ldrh	w1, [x2, x1]
+	cbz	w1, .L2712
+	adrp	x1, .LANCHOR172
+	adrp	x0, .LC0
+	mov	w2, 1638
+	add	x1, x1, :lo12:.LANCHOR172
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2713:
+	b	.L2713
+.L2724:
+	mov	w21, 9
+	b	.L2707
+.L2725:
+	mov	w21, 5
+	b	.L2707
+.L2726:
+	mov	w21, 3
+	b	.L2707
+.L2712:
+	bl	ftl_free_sblk
+.L2775:
+	mov	w0, -1
+	strh	w0, [x19]
+	b	.L2640
+.L2709:
+	ldrh	w0, [x19, 318]
+	cbz	w0, .L2714
+	ldr	w0, [x19, 320]
+	strh	wzr, [x19, 318]
+	cmn	w0, #1
+	beq	.L2715
+	bl	ftl_mask_bad_block
+.L2715:
+	ldr	x0, [x23, #:lo12:.LANCHOR60]
+	add	x19, x22, :lo12:.LANCHOR58
+	strh	wzr, [x19, 56]
+	ldrh	w0, [x0, 80]
+	str	wzr, [x19, 320]
+	bl	ftl_free_sblk
+	ldr	x1, [x23, #:lo12:.LANCHOR60]
+	mov	w0, -1
+	ldr	x2, [x24, #:lo12:.LANCHOR46]
+	strh	w0, [x1, 80]
+	strh	w0, [x2, 126]
+	strh	w0, [x1, 130]
+	ldr	x0, [x19, 8]
+	cbz	x0, .L2716
+	bl	buf_free
+.L2716:
+	add	x22, x22, :lo12:.LANCHOR58
+	str	xzr, [x22, 8]
+	bl	flt_sys_flush
+	adrp	x1, .LANCHOR172
+	adrp	x0, .LC0
+	strb	wzr, [x20, #:lo12:.LANCHOR104]
+	mov	w2, 1671
+	add	x1, x1, :lo12:.LANCHOR172
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2717:
+	b	.L2717
+.L2714:
+	ldrh	w0, [x26, 6]
+	ldrh	w1, [x19, 26]
+	cmp	w0, 1
+	ldrh	w0, [x19, 24]
+	bls	.L2718
+	cmp	w1, w0
+	bcc	.L2708
+	mov	w0, 1
+	strb	w0, [x20, #:lo12:.LANCHOR104]
+	ldrh	w0, [x19, 56]
+	add	w1, w0, 1
+	strh	w1, [x19, 56]
+	add	x0, x19, x0, sxtw 1
+	ldrh	w1, [x19]
+	strh	w1, [x0, 58]
+	b	.L2775
+.L2718:
+	mov	w2, 5
+	strb	w2, [x20, #:lo12:.LANCHOR104]
+	cmp	w1, w0
+	bcc	.L2719
+	ldrh	w0, [x19, 56]
+	add	w1, w0, 1
+	strh	w1, [x19, 56]
+	add	x0, x19, x0, sxtw 1
+	ldrh	w1, [x19]
+	strh	w1, [x0, 58]
+	mov	w0, -1
+	strh	w0, [x19]
+.L2719:
+	bl	ftl_flush
+	bl	sblk_wait_write_queue_completed
+	bl	gc_write_completed
+	ldr	x0, [x23, #:lo12:.LANCHOR60]
+	ldrh	w1, [x25, 80]
+	strh	w1, [x0, 128]
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	add	x0, x22, :lo12:.LANCHOR58
+	adrp	x1, .LANCHOR79
+	adrp	x2, .LANCHOR64
+	ldrh	w1, [x1, #:lo12:.LANCHOR79]
+	ldrb	w2, [x2, #:lo12:.LANCHOR64]
+	strh	wzr, [x0, 16]
+	strh	w1, [x0, 18]
+	cmp	w2, 2
+	strh	w2, [x0, 20]
+	bne	.L2720
+	ubfiz	w1, w1, 1, 15
+	strh	w1, [x0, 18]
+	mov	w1, 1
+	strh	w1, [x0, 20]
+.L2720:
+	add	x22, x22, :lo12:.LANCHOR58
+	strh	wzr, [x22, 22]
+	b	.L2640
+.L2648:
+	adrp	x19, .LANCHOR58
+	bl	gc_check_data_one_wl
+	add	x19, x19, :lo12:.LANCHOR58
+	cbz	w0, .L2722
+	ldr	x0, [x23, #:lo12:.LANCHOR60]
+	strh	wzr, [x19, 56]
+	ldrh	w0, [x0, 80]
+	bl	ftl_free_sblk
+	ldr	x1, [x23, #:lo12:.LANCHOR60]
+	mov	w0, -1
+	ldr	x2, [x24, #:lo12:.LANCHOR46]
+	strh	w0, [x1, 80]
+	strh	w0, [x2, 126]
+	strh	w0, [x1, 130]
+	ldr	x0, [x19, 8]
+	bl	buf_free
+	strb	wzr, [x20, #:lo12:.LANCHOR104]
+	str	xzr, [x19, 8]
+	b	.L2776
+.L2722:
+	ldrh	w1, [x19, 16]
+	ldrh	w0, [x19, 18]
+	cmp	w1, w0
+	bcc	.L2640
+	mov	w0, 6
+	strb	w0, [x20, #:lo12:.LANCHOR104]
+	ldr	x0, [x19, 8]
+	bl	buf_free
+	str	xzr, [x19, 8]
+	b	.L2640
+.L2649:
+	bl	gc_update_l2p_map_new
+	mov	w19, -1
+	bl	gc_free_src_blk
+	bl	ftl_flush
+	bl	pm_flush
+	strh	w19, [x25, 80]
+	bl	ftl_ext_info_flush
+	ldr	x0, [x24, #:lo12:.LANCHOR46]
+	strh	w19, [x0, 126]
+	mov	w0, 0
+	bl	ftl_info_flush
+	strb	wzr, [x20, #:lo12:.LANCHOR104]
+	ldp	x21, x22, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	b	print_ftl_debug_info
+	.size	do_gc, .-do_gc
+	.section	.text.ftl_write,"ax",@progbits
+	.align	2
+	.global	ftl_write
+	.type	ftl_write, %function
+ftl_write:
+	stp	x29, x30, [sp, -112]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	mov	x23, x3
+	stp	x25, x26, [sp, 64]
+	mov	w25, w2
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	stp	x27, x28, [sp, 80]
+	cbnz	w0, .L2781
+	adrp	x0, .LANCHOR52
+	ldr	w2, [x0, #:lo12:.LANCHOR52]
+	mov	w0, 24576
+.L2782:
+	add	w3, w1, w25
+	cmp	w2, w3
+	bcc	.L2794
+	adrp	x22, .LANCHOR45
+	add	w27, w0, w1
+	sub	w19, w25, #1
+	adrp	x24, .LANCHOR46
+	ldrb	w0, [x22, #:lo12:.LANCHOR45]
+	add	w19, w19, w27
+	add	x22, x22, :lo12:.LANCHOR45
+	udiv	w21, w27, w0
+	udiv	w19, w19, w0
+	add	w0, w27, w25
+	str	w0, [x29, 108]
+	mov	w28, w21
+	sub	w20, w19, w21
+	add	w20, w20, 1
+.L2784:
+	cbnz	w20, .L2792
+	bl	ftl_write_commit
+	mov	w0, 0
+	mov	w1, 1
+	bl	do_gc
+	mov	w0, 0
+.L2780:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L2781:
+	cmp	w0, 3
+	bhi	.L2794
+	lsl	w0, w0, 13
+	mov	w2, 8192
+	b	.L2782
+.L2792:
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x26, x0
+	cbnz	x0, .L2785
+	bl	ftl_write_commit
+	b	.L2784
+.L2785:
+	strb	wzr, [x0, 57]
+	cmp	w28, w21
+	ldrb	w0, [x22]
+	ccmp	w28, w19, 4, ne
+	strb	w0, [x26, 56]
+	bne	.L2788
+	cmp	w28, w21
+	bne	.L2789
+	udiv	w1, w27, w0
+	msub	w1, w1, w0, w27
+	and	w1, w1, 255
+	strb	w1, [x26, 57]
+	sub	w0, w0, w1
+	and	w0, w0, 255
+	cmp	w25, w0
+	csel	w0, w25, w0, cc
+.L2796:
+	strb	w0, [x26, 56]
+.L2788:
+	ldr	x3, [x26, 8]
+	mov	x1, x23
+	ldrb	w0, [x26, 57]
+	sub	w20, w20, #1
+	ldrb	w2, [x26, 56]
+	ubfiz	x0, x0, 9, 8
+	lsl	w2, w2, 9
+	add	x0, x3, x0
+	bl	ftl_memcpy
+	ldr	x1, [x24, #:lo12:.LANCHOR46]
+	ldr	w0, [x1, 8]
+	str	w28, [x26, 36]
+	add	w28, w28, 1
+	add	w2, w0, 1
+	str	w2, [x1, 8]
+	str	w0, [x26, 32]
+	mov	x0, x26
+	bl	ftl_write_buf
+	ldrb	w0, [x26, 56]
+	ubfiz	x0, x0, 9, 8
+	add	x23, x23, x0
+	b	.L2784
+.L2789:
+	ldr	w1, [x29, 108]
+	msub	w0, w0, w28, w1
+	b	.L2796
+.L2794:
+	mov	w0, -1
+	b	.L2780
+	.size	ftl_write, .-ftl_write
+	.section	.text.FtlWrite,"ax",@progbits
+	.align	2
+	.global	FtlWrite
+	.type	FtlWrite, %function
+FtlWrite:
+	and	w0, w0, 255
+	b	ftl_write
+	.size	FtlWrite, .-FtlWrite
+	.section	.text.StorageSysDataStore,"ax",@progbits
+	.align	2
+	.global	StorageSysDataStore
+	.type	StorageSysDataStore, %function
+StorageSysDataStore:
+	mov	x3, x1
+	mov	w2, 1
+	mov	w1, w0
+	mov	w0, 2
+	b	ftl_write
+	.size	StorageSysDataStore, .-StorageSysDataStore
+	.global	g_pm_spare
+	.global	pm_gc_enable
+	.global	pm_last_load_ram_id
+	.global	pm_last_update_ram_id
+	.global	pm_ram_info
+	.global	sblk_gc_write_completed_queue_head
+	.global	sblk_read_completed_queue_head
+	.global	sblk_write_completed_queue_head
+	.global	sblk_queue_head
+	.global	ftl_low_format_cur_blk
+	.global	ftl_power_lost_flag
+	.global	ftl_vpn_update_count
+	.global	ftl_sblk_vpn_update_id
+	.global	ftl_sblk_lpa_tbl
+	.global	ftl_sblk_vpn
+	.global	gp_ftl_ext_info
+	.global	gp_ftl_info
+	.global	gp_blk_info
+	.global	ftl_tmp_spare
+	.global	ftl_info_spare
+	.global	ftl_ext_info_data_buffer
+	.global	ftl_info_data_buffer
+	.global	ftl_tmp_buffer
+	.global	g_ftl_info_blk
+	.global	tlc_prog_order
+	.global	gc_des_ppa_tbl
+	.global	gc_valid_page_ppa
+	.global	gc_page_buf_id
+	.global	gc_pre_ppa_tbl
+	.global	gc_lpa_tbl
+	.global	g_gc_info
+	.global	gc_slc_mode_vpn_th
+	.global	gc_tlc_mode_tlc_vpn_th
+	.global	gc_tlc_mode_slc_vpn_th
+	.global	gc_state
+	.global	gc_mode
+	.global	check_vpc_tbl
+	.global	p_read_ahead_ext_buf
+	.global	read_ahead_lpa
+	.global	write_commit_count
+	.global	write_commit_head
+	.global	write_buf_count
+	.global	write_buf_head
+	.global	ftl_flush_jiffies
+	.global	lpa_hash
+	.global	lpa_hash_index
+	.global	_min_slc_super_block
+	.global	_max_slc_super_block
+	.global	_max_xlc_super_block
+	.global	_c_max_pm_sblk
+	.global	_c_ftl_pm_page_num
+	.global	_c_totle_log_page
+	.global	_c_totle_data_density
+	.global	_c_user_data_density
+	.global	_c_totle_phy_density
+	.global	_c_ftl_block_addr_log2
+	.global	_c_ftl_block_align_addr
+	.global	_c_ftl_byte_pre_page
+	.global	_c_ftl_nand_blks_per_die
+	.global	_c_ftl_page_pre_slc_blk
+	.global	_c_ftl_page_pre_blk
+	.global	_c_ftl_blk_pre_plane
+	.global	_c_ftl_nand_planes_num
+	.global	_c_ftl_planes_per_die
+	.global	_c_ftl_sec_per_page
+	.global	_c_ftl_nand_die_num
+	.global	_c_ftl_nand_type
+	.global	zftl_debug
+	.global	g_flash_blk_info
+	.global	gp_flash_info
+	.global	p_free_buf_head
+	.global	free_buf_count
+	.global	g_buf
+	.global	g_nandc_v6_master_info
+	.global	nandc_randomizer_en
+	.global	nandc_hw_seed
+	.global	fill_spare_size
+	.global	g_nandc_ecc_bits
+	.global	g_nandc_ver
+	.global	gp_nandc
+	.global	hy_f26_ref_value
+	.global	sd15_tlc_rr
+	.global	sd15_slc_rr
+	.global	gNandParaInfo
+	.global	NandFlashParaTbl
+	.global	gpNandParaInfo
+	.global	gNandOptPara
+	.global	g_msb_page_tbl
+	.global	g_lsb_page_tbl
+	.global	g_die_addr
+	.global	g_die_cs_idx
+	.global	IDByte
+	.global	flash_read_retry
+	.global	g_maxRetryCount
+	.global	g_maxRegNum
+	.global	g_retryMode
+	.global	g_flash_toggle_mode_en
+	.global	g_flash_3d_mlc_flag
+	.global	g_flash_3d_tlc_flag
+	.global	g_flash_multi_page_prog_en
+	.global	g_flash_multi_page_read_en
+	.global	g_flash_interface_mode
+	.global	g_idb_ecc_bits
+	.global	g_idb_slc_mode_enable
+	.global	g_slc_mode_addr2
+	.global	g_slc_mode_enable
+	.global	g_flash_cur_mode
+	.global	g_flash_slc_mode
+	.global	g_slc_page_num
+	.global	g_totle_phy_block
+	.global	g_block_align_addr
+	.global	g_flash_reversd_blks
+	.global	g_nand_max_die
+	.global	g_flash_tmp_spare_buffer
+	.global	g_flash_tmp_page_buffer
+	.global	g_flash_sys_spare_buffer
+	.global	g_flash_spare_buffer
+	.global	g_flash_page_buffer
+	.section	.bss.IDByte,"aw",@nobits
+	.align	2
+	.set	.LANCHOR26,. + 0
+	.type	IDByte, %object
+	.size	IDByte, 32
+IDByte:
+	.zero	32
+	.section	.bss._c_ftl_blk_pre_plane,"aw",@nobits
+	.align	1
+	.set	.LANCHOR54,. + 0
+	.type	_c_ftl_blk_pre_plane, %object
+	.size	_c_ftl_blk_pre_plane, 2
+_c_ftl_blk_pre_plane:
+	.zero	2
+	.section	.bss._c_ftl_block_addr_log2,"aw",@nobits
+	.align	1
+	.set	.LANCHOR71,. + 0
+	.type	_c_ftl_block_addr_log2, %object
+	.size	_c_ftl_block_addr_log2, 2
+_c_ftl_block_addr_log2:
+	.zero	2
+	.section	.bss._c_ftl_block_align_addr,"aw",@nobits
+	.align	1
+	.set	.LANCHOR75,. + 0
+	.type	_c_ftl_block_align_addr, %object
+	.size	_c_ftl_block_align_addr, 2
+_c_ftl_block_align_addr:
+	.zero	2
+	.section	.bss._c_ftl_byte_pre_page,"aw",@nobits
+	.align	1
+	.set	.LANCHOR149,. + 0
+	.type	_c_ftl_byte_pre_page, %object
+	.size	_c_ftl_byte_pre_page, 2
+_c_ftl_byte_pre_page:
+	.zero	2
+	.section	.bss._c_ftl_nand_blks_per_die,"aw",@nobits
+	.align	1
+	.type	_c_ftl_nand_blks_per_die, %object
+	.size	_c_ftl_nand_blks_per_die, 2
+_c_ftl_nand_blks_per_die:
+	.zero	2
+	.section	.bss._c_ftl_nand_die_num,"aw",@nobits
+	.set	.LANCHOR76,. + 0
+	.type	_c_ftl_nand_die_num, %object
+	.size	_c_ftl_nand_die_num, 1
+_c_ftl_nand_die_num:
+	.zero	1
+	.section	.bss._c_ftl_nand_planes_num,"aw",@nobits
+	.set	.LANCHOR69,. + 0
+	.type	_c_ftl_nand_planes_num, %object
+	.size	_c_ftl_nand_planes_num, 1
+_c_ftl_nand_planes_num:
+	.zero	1
+	.section	.bss._c_ftl_nand_type,"aw",@nobits
+	.set	.LANCHOR64,. + 0
+	.type	_c_ftl_nand_type, %object
+	.size	_c_ftl_nand_type, 1
+_c_ftl_nand_type:
+	.zero	1
+	.section	.bss._c_ftl_page_pre_blk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR68,. + 0
+	.type	_c_ftl_page_pre_blk, %object
+	.size	_c_ftl_page_pre_blk, 2
+_c_ftl_page_pre_blk:
+	.zero	2
+	.section	.bss._c_ftl_page_pre_slc_blk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR79,. + 0
+	.type	_c_ftl_page_pre_slc_blk, %object
+	.size	_c_ftl_page_pre_slc_blk, 2
+_c_ftl_page_pre_slc_blk:
+	.zero	2
+	.section	.bss._c_ftl_planes_per_die,"aw",@nobits
+	.set	.LANCHOR70,. + 0
+	.type	_c_ftl_planes_per_die, %object
+	.size	_c_ftl_planes_per_die, 1
+_c_ftl_planes_per_die:
+	.zero	1
+	.section	.bss._c_ftl_pm_page_num,"aw",@nobits
+	.align	1
+	.set	.LANCHOR137,. + 0
+	.type	_c_ftl_pm_page_num, %object
+	.size	_c_ftl_pm_page_num, 2
+_c_ftl_pm_page_num:
+	.zero	2
+	.section	.bss._c_ftl_sec_per_page,"aw",@nobits
+	.set	.LANCHOR45,. + 0
+	.type	_c_ftl_sec_per_page, %object
+	.size	_c_ftl_sec_per_page, 1
+_c_ftl_sec_per_page:
+	.zero	1
+	.section	.bss._c_max_pm_sblk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR101,. + 0
+	.type	_c_max_pm_sblk, %object
+	.size	_c_max_pm_sblk, 2
+_c_max_pm_sblk:
+	.zero	2
+	.section	.bss._c_totle_data_density,"aw",@nobits
+	.align	2
+	.set	.LANCHOR162,. + 0
+	.type	_c_totle_data_density, %object
+	.size	_c_totle_data_density, 4
+_c_totle_data_density:
+	.zero	4
+	.section	.bss._c_totle_log_page,"aw",@nobits
+	.align	2
+	.set	.LANCHOR47,. + 0
+	.type	_c_totle_log_page, %object
+	.size	_c_totle_log_page, 4
+_c_totle_log_page:
+	.zero	4
+	.section	.bss._c_totle_phy_density,"aw",@nobits
+	.align	2
+	.set	.LANCHOR161,. + 0
+	.type	_c_totle_phy_density, %object
+	.size	_c_totle_phy_density, 4
+_c_totle_phy_density:
+	.zero	4
+	.section	.bss._c_user_data_density,"aw",@nobits
+	.align	2
+	.set	.LANCHOR52,. + 0
+	.type	_c_user_data_density, %object
+	.size	_c_user_data_density, 4
+_c_user_data_density:
+	.zero	4
+	.section	.bss._max_slc_super_block,"aw",@nobits
+	.align	1
+	.set	.LANCHOR164,. + 0
+	.type	_max_slc_super_block, %object
+	.size	_max_slc_super_block, 2
+_max_slc_super_block:
+	.zero	2
+	.section	.bss._max_xlc_super_block,"aw",@nobits
+	.align	1
+	.set	.LANCHOR163,. + 0
+	.type	_max_xlc_super_block, %object
+	.size	_max_xlc_super_block, 2
+_max_xlc_super_block:
+	.zero	2
+	.section	.bss._min_slc_super_block,"aw",@nobits
+	.align	1
+	.set	.LANCHOR165,. + 0
+	.type	_min_slc_super_block, %object
+	.size	_min_slc_super_block, 2
+_min_slc_super_block:
+	.zero	2
+	.section	.bss.check_vpc_tbl,"aw",@nobits
+	.align	3
+	.type	check_vpc_tbl, %object
+	.size	check_vpc_tbl, 4352
+check_vpc_tbl:
+	.zero	4352
+	.section	.bss.fill_spare_size,"aw",@nobits
+	.align	1
+	.set	.LANCHOR31,. + 0
+	.type	fill_spare_size, %object
+	.size	fill_spare_size, 2
+fill_spare_size:
+	.zero	2
+	.section	.bss.flash_read_retry,"aw",@nobits
+	.align	3
+	.set	.LANCHOR115,. + 0
+	.type	flash_read_retry, %object
+	.size	flash_read_retry, 8
+flash_read_retry:
+	.zero	8
+	.section	.bss.free_buf_count,"aw",@nobits
+	.set	.LANCHOR38,. + 0
+	.type	free_buf_count, %object
+	.size	free_buf_count, 1
+free_buf_count:
+	.zero	1
+	.section	.bss.ftl_ext_info_data_buffer,"aw",@nobits
+	.align	6
+	.type	ftl_ext_info_data_buffer, %object
+	.size	ftl_ext_info_data_buffer, 16384
+ftl_ext_info_data_buffer:
+	.zero	16384
+	.section	.bss.ftl_flush_jiffies,"aw",@nobits
+	.align	2
+	.set	.LANCHOR168,. + 0
+	.type	ftl_flush_jiffies, %object
+	.size	ftl_flush_jiffies, 4
+ftl_flush_jiffies:
+	.zero	4
+	.section	.bss.ftl_info_data_buffer,"aw",@nobits
+	.align	6
+	.type	ftl_info_data_buffer, %object
+	.size	ftl_info_data_buffer, 16384
+ftl_info_data_buffer:
+	.zero	16384
+	.section	.bss.ftl_info_spare,"aw",@nobits
+	.align	6
+	.set	.LANCHOR130,. + 0
+	.type	ftl_info_spare, %object
+	.size	ftl_info_spare, 256
+ftl_info_spare:
+	.zero	256
+	.section	.bss.ftl_low_format_cur_blk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR53,. + 0
+	.type	ftl_low_format_cur_blk, %object
+	.size	ftl_low_format_cur_blk, 2
+ftl_low_format_cur_blk:
+	.zero	2
+	.section	.bss.ftl_power_lost_flag,"aw",@nobits
+	.set	.LANCHOR133,. + 0
+	.type	ftl_power_lost_flag, %object
+	.size	ftl_power_lost_flag, 1
+ftl_power_lost_flag:
+	.zero	1
+	.section	.bss.ftl_sblk_lpa_tbl,"aw",@nobits
+	.align	3
+	.set	.LANCHOR82,. + 0
+	.type	ftl_sblk_lpa_tbl, %object
+	.size	ftl_sblk_lpa_tbl, 8
+ftl_sblk_lpa_tbl:
+	.zero	8
+	.section	.bss.ftl_sblk_vpn,"aw",@nobits
+	.align	3
+	.set	.LANCHOR56,. + 0
+	.type	ftl_sblk_vpn, %object
+	.size	ftl_sblk_vpn, 8
+ftl_sblk_vpn:
+	.zero	8
+	.section	.bss.ftl_sblk_vpn_update_id,"aw",@nobits
+	.align	1
+	.set	.LANCHOR87,. + 0
+	.type	ftl_sblk_vpn_update_id, %object
+	.size	ftl_sblk_vpn_update_id, 2
+ftl_sblk_vpn_update_id:
+	.zero	2
+	.section	.bss.ftl_tmp_buffer,"aw",@nobits
+	.align	6
+	.type	ftl_tmp_buffer, %object
+	.size	ftl_tmp_buffer, 16384
+ftl_tmp_buffer:
+	.zero	16384
+	.section	.bss.ftl_tmp_spare,"aw",@nobits
+	.align	6
+	.set	.LANCHOR121,. + 0
+	.type	ftl_tmp_spare, %object
+	.size	ftl_tmp_spare, 256
+ftl_tmp_spare:
+	.zero	256
+	.section	.bss.ftl_vpn_update_count,"aw",@nobits
+	.align	1
+	.set	.LANCHOR86,. + 0
+	.type	ftl_vpn_update_count, %object
+	.size	ftl_vpn_update_count, 2
+ftl_vpn_update_count:
+	.zero	2
+	.section	.bss.gNandOptPara,"aw",@nobits
+	.align	3
+	.set	.LANCHOR103,. + 0
+	.type	gNandOptPara, %object
+	.size	gNandOptPara, 32
+gNandOptPara:
+	.zero	32
+	.section	.bss.g_block_align_addr,"aw",@nobits
+	.align	1
+	.set	.LANCHOR13,. + 0
+	.type	g_block_align_addr, %object
+	.size	g_block_align_addr, 2
+g_block_align_addr:
+	.zero	2
+	.section	.bss.g_buf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR36,. + 0
+	.type	g_buf, %object
+	.size	g_buf, 2048
+g_buf:
+	.zero	2048
+	.section	.bss.g_die_addr,"aw",@nobits
+	.align	2
+	.set	.LANCHOR98,. + 0
+	.type	g_die_addr, %object
+	.size	g_die_addr, 32
+g_die_addr:
+	.zero	32
+	.section	.bss.g_die_cs_idx,"aw",@nobits
+	.align	2
+	.set	.LANCHOR10,. + 0
+	.type	g_die_cs_idx, %object
+	.size	g_die_cs_idx, 8
+g_die_cs_idx:
+	.zero	8
+	.section	.bss.g_flash_3d_mlc_flag,"aw",@nobits
+	.set	.LANCHOR74,. + 0
+	.type	g_flash_3d_mlc_flag, %object
+	.size	g_flash_3d_mlc_flag, 1
+g_flash_3d_mlc_flag:
+	.zero	1
+	.section	.bss.g_flash_3d_tlc_flag,"aw",@nobits
+	.set	.LANCHOR66,. + 0
+	.type	g_flash_3d_tlc_flag, %object
+	.size	g_flash_3d_tlc_flag, 1
+g_flash_3d_tlc_flag:
+	.zero	1
+	.section	.bss.g_flash_blk_info,"aw",@nobits
+	.align	3
+	.set	.LANCHOR117,. + 0
+	.type	g_flash_blk_info, %object
+	.size	g_flash_blk_info, 4
+g_flash_blk_info:
+	.zero	4
+	.section	.bss.g_flash_cur_mode,"aw",@nobits
+	.set	.LANCHOR20,. + 0
+	.type	g_flash_cur_mode, %object
+	.size	g_flash_cur_mode, 1
+g_flash_cur_mode:
+	.zero	1
+	.section	.bss.g_flash_interface_mode,"aw",@nobits
+	.set	.LANCHOR25,. + 0
+	.type	g_flash_interface_mode, %object
+	.size	g_flash_interface_mode, 1
+g_flash_interface_mode:
+	.zero	1
+	.section	.bss.g_flash_multi_page_prog_en,"aw",@nobits
+	.set	.LANCHOR23,. + 0
+	.type	g_flash_multi_page_prog_en, %object
+	.size	g_flash_multi_page_prog_en, 1
+g_flash_multi_page_prog_en:
+	.zero	1
+	.section	.bss.g_flash_multi_page_read_en,"aw",@nobits
+	.set	.LANCHOR144,. + 0
+	.type	g_flash_multi_page_read_en, %object
+	.size	g_flash_multi_page_read_en, 1
+g_flash_multi_page_read_en:
+	.zero	1
+	.section	.bss.g_flash_page_buffer,"aw",@nobits
+	.align	3
+	.set	.LANCHOR119,. + 0
+	.type	g_flash_page_buffer, %object
+	.size	g_flash_page_buffer, 8
+g_flash_page_buffer:
+	.zero	8
+	.section	.bss.g_flash_reversd_blks,"aw",@nobits
+	.set	.LANCHOR123,. + 0
+	.type	g_flash_reversd_blks, %object
+	.size	g_flash_reversd_blks, 1
+g_flash_reversd_blks:
+	.zero	1
+	.section	.bss.g_flash_slc_mode,"aw",@nobits
+	.set	.LANCHOR11,. + 0
+	.type	g_flash_slc_mode, %object
+	.size	g_flash_slc_mode, 1
+g_flash_slc_mode:
+	.zero	1
+	.section	.bss.g_flash_spare_buffer,"aw",@nobits
+	.align	3
+	.set	.LANCHOR118,. + 0
+	.type	g_flash_spare_buffer, %object
+	.size	g_flash_spare_buffer, 8
+g_flash_spare_buffer:
+	.zero	8
+	.section	.bss.g_flash_sys_spare_buffer,"aw",@nobits
+	.align	3
+	.set	.LANCHOR116,. + 0
+	.type	g_flash_sys_spare_buffer, %object
+	.size	g_flash_sys_spare_buffer, 8
+g_flash_sys_spare_buffer:
+	.zero	8
+	.section	.bss.g_flash_tmp_page_buffer,"aw",@nobits
+	.align	3
+	.set	.LANCHOR111,. + 0
+	.type	g_flash_tmp_page_buffer, %object
+	.size	g_flash_tmp_page_buffer, 8
+g_flash_tmp_page_buffer:
+	.zero	8
+	.section	.bss.g_flash_tmp_spare_buffer,"aw",@nobits
+	.align	3
+	.set	.LANCHOR112,. + 0
+	.type	g_flash_tmp_spare_buffer, %object
+	.size	g_flash_tmp_spare_buffer, 8
+g_flash_tmp_spare_buffer:
+	.zero	8
+	.section	.bss.g_flash_toggle_mode_en,"aw",@nobits
+	.set	.LANCHOR35,. + 0
+	.type	g_flash_toggle_mode_en, %object
+	.size	g_flash_toggle_mode_en, 1
+g_flash_toggle_mode_en:
+	.zero	1
+	.section	.bss.g_ftl_info_blk,"aw",@nobits
+	.align	6
+	.set	.LANCHOR131,. + 0
+	.type	g_ftl_info_blk, %object
+	.size	g_ftl_info_blk, 4
+g_ftl_info_blk:
+	.zero	4
+	.section	.bss.g_gc_info,"aw",@nobits
+	.align	3
+	.set	.LANCHOR58,. + 0
+	.type	g_gc_info, %object
+	.size	g_gc_info, 328
+g_gc_info:
+	.zero	328
+	.section	.bss.g_idb_ecc_bits,"aw",@nobits
+	.set	.LANCHOR145,. + 0
+	.type	g_idb_ecc_bits, %object
+	.size	g_idb_ecc_bits, 1
+g_idb_ecc_bits:
+	.zero	1
+	.section	.bss.g_idb_slc_mode_enable,"aw",@nobits
+	.set	.LANCHOR146,. + 0
+	.type	g_idb_slc_mode_enable, %object
+	.size	g_idb_slc_mode_enable, 1
+g_idb_slc_mode_enable:
+	.zero	1
+	.section	.bss.g_lsb_page_tbl,"aw",@nobits
+	.align	2
+	.set	.LANCHOR14,. + 0
+	.type	g_lsb_page_tbl, %object
+	.size	g_lsb_page_tbl, 512
+g_lsb_page_tbl:
+	.zero	512
+	.section	.bss.g_maxRegNum,"aw",@nobits
+	.set	.LANCHOR4,. + 0
+	.type	g_maxRegNum, %object
+	.size	g_maxRegNum, 1
+g_maxRegNum:
+	.zero	1
+	.section	.bss.g_maxRetryCount,"aw",@nobits
+	.set	.LANCHOR113,. + 0
+	.type	g_maxRetryCount, %object
+	.size	g_maxRetryCount, 1
+g_maxRetryCount:
+	.zero	1
+	.section	.bss.g_msb_page_tbl,"aw",@nobits
+	.align	2
+	.set	.LANCHOR96,. + 0
+	.type	g_msb_page_tbl, %object
+	.size	g_msb_page_tbl, 1024
+g_msb_page_tbl:
+	.zero	1024
+	.section	.bss.g_nand_max_die,"aw",@nobits
+	.set	.LANCHOR8,. + 0
+	.type	g_nand_max_die, %object
+	.size	g_nand_max_die, 1
+g_nand_max_die:
+	.zero	1
+	.section	.bss.g_nandc_ecc_bits,"aw",@nobits
+	.set	.LANCHOR27,. + 0
+	.type	g_nandc_ecc_bits, %object
+	.size	g_nandc_ecc_bits, 1
+g_nandc_ecc_bits:
+	.zero	1
+	.section	.bss.g_nandc_v6_master_info,"aw",@nobits
+	.align	3
+	.set	.LANCHOR30,. + 0
+	.type	g_nandc_v6_master_info, %object
+	.size	g_nandc_v6_master_info, 40
+g_nandc_v6_master_info:
+	.zero	40
+	.section	.bss.g_nandc_ver,"aw",@nobits
+	.set	.LANCHOR7,. + 0
+	.type	g_nandc_ver, %object
+	.size	g_nandc_ver, 1
+g_nandc_ver:
+	.zero	1
+	.section	.bss.g_pm_spare,"aw",@nobits
+	.align	3
+	.set	.LANCHOR141,. + 0
+	.type	g_pm_spare, %object
+	.size	g_pm_spare, 8
+g_pm_spare:
+	.zero	8
+	.section	.bss.g_retryMode,"aw",@nobits
+	.set	.LANCHOR2,. + 0
+	.type	g_retryMode, %object
+	.size	g_retryMode, 1
+g_retryMode:
+	.zero	1
+	.section	.bss.g_slc_mode_addr2,"aw",@nobits
+	.set	.LANCHOR12,. + 0
+	.type	g_slc_mode_addr2, %object
+	.size	g_slc_mode_addr2, 1
+g_slc_mode_addr2:
+	.zero	1
+	.section	.bss.g_slc_mode_enable,"aw",@nobits
+	.type	g_slc_mode_enable, %object
+	.size	g_slc_mode_enable, 1
+g_slc_mode_enable:
+	.zero	1
+	.section	.bss.g_slc_page_num,"aw",@nobits
+	.align	1
+	.set	.LANCHOR97,. + 0
+	.type	g_slc_page_num, %object
+	.size	g_slc_page_num, 2
+g_slc_page_num:
+	.zero	2
+	.section	.bss.g_totle_phy_block,"aw",@nobits
+	.align	1
+	.set	.LANCHOR99,. + 0
+	.type	g_totle_phy_block, %object
+	.size	g_totle_phy_block, 2
+g_totle_phy_block:
+	.zero	2
+	.section	.bss.gc_des_ppa_tbl,"aw",@nobits
+	.align	3
+	.set	.LANCHOR109,. + 0
+	.type	gc_des_ppa_tbl, %object
+	.size	gc_des_ppa_tbl, 8
+gc_des_ppa_tbl:
+	.zero	8
+	.section	.bss.gc_lpa_tbl,"aw",@nobits
+	.align	3
+	.set	.LANCHOR107,. + 0
+	.type	gc_lpa_tbl, %object
+	.size	gc_lpa_tbl, 8
+gc_lpa_tbl:
+	.zero	8
+	.section	.bss.gc_mode,"aw",@nobits
+	.set	.LANCHOR67,. + 0
+	.type	gc_mode, %object
+	.size	gc_mode, 1
+gc_mode:
+	.zero	1
+	.section	.bss.gc_page_buf_id,"aw",@nobits
+	.align	3
+	.set	.LANCHOR65,. + 0
+	.type	gc_page_buf_id, %object
+	.size	gc_page_buf_id, 8
+gc_page_buf_id:
+	.zero	8
+	.section	.bss.gc_pre_ppa_tbl,"aw",@nobits
+	.align	3
+	.set	.LANCHOR108,. + 0
+	.type	gc_pre_ppa_tbl, %object
+	.size	gc_pre_ppa_tbl, 8
+gc_pre_ppa_tbl:
+	.zero	8
+	.section	.bss.gc_slc_mode_vpn_th,"aw",@nobits
+	.align	1
+	.set	.LANCHOR57,. + 0
+	.type	gc_slc_mode_vpn_th, %object
+	.size	gc_slc_mode_vpn_th, 2
+gc_slc_mode_vpn_th:
+	.zero	2
+	.section	.bss.gc_state,"aw",@nobits
+	.set	.LANCHOR104,. + 0
+	.type	gc_state, %object
+	.size	gc_state, 1
+gc_state:
+	.zero	1
+	.section	.bss.gc_tlc_mode_slc_vpn_th,"aw",@nobits
+	.align	1
+	.set	.LANCHOR105,. + 0
+	.type	gc_tlc_mode_slc_vpn_th, %object
+	.size	gc_tlc_mode_slc_vpn_th, 2
+gc_tlc_mode_slc_vpn_th:
+	.zero	2
+	.section	.bss.gc_tlc_mode_tlc_vpn_th,"aw",@nobits
+	.align	1
+	.set	.LANCHOR106,. + 0
+	.type	gc_tlc_mode_tlc_vpn_th, %object
+	.size	gc_tlc_mode_tlc_vpn_th, 2
+gc_tlc_mode_tlc_vpn_th:
+	.zero	2
+	.section	.bss.gc_valid_page_ppa,"aw",@nobits
+	.align	3
+	.set	.LANCHOR61,. + 0
+	.type	gc_valid_page_ppa, %object
+	.size	gc_valid_page_ppa, 8
+gc_valid_page_ppa:
+	.zero	8
+	.section	.bss.gpNandParaInfo,"aw",@nobits
+	.align	3
+	.set	.LANCHOR34,. + 0
+	.type	gpNandParaInfo, %object
+	.size	gpNandParaInfo, 8
+gpNandParaInfo:
+	.zero	8
+	.section	.bss.gp_blk_info,"aw",@nobits
+	.align	3
+	.set	.LANCHOR59,. + 0
+	.type	gp_blk_info, %object
+	.size	gp_blk_info, 8
+gp_blk_info:
+	.zero	8
+	.section	.bss.gp_flash_info,"aw",@nobits
+	.align	3
+	.set	.LANCHOR5,. + 0
+	.type	gp_flash_info, %object
+	.size	gp_flash_info, 8
+gp_flash_info:
+	.zero	8
+	.section	.bss.gp_ftl_ext_info,"aw",@nobits
+	.align	3
+	.set	.LANCHOR60,. + 0
+	.type	gp_ftl_ext_info, %object
+	.size	gp_ftl_ext_info, 8
+gp_ftl_ext_info:
+	.zero	8
+	.section	.bss.gp_ftl_info,"aw",@nobits
+	.align	3
+	.set	.LANCHOR46,. + 0
+	.type	gp_ftl_info, %object
+	.size	gp_ftl_info, 8
+gp_ftl_info:
+	.zero	8
+	.section	.bss.gp_nandc,"aw",@nobits
+	.align	3
+	.set	.LANCHOR6,. + 0
+	.type	gp_nandc, %object
+	.size	gp_nandc, 8
+gp_nandc:
+	.zero	8
+	.section	.bss.lpa_hash,"aw",@nobits
+	.align	3
+	.set	.LANCHOR81,. + 0
+	.type	lpa_hash, %object
+	.size	lpa_hash, 512
+lpa_hash:
+	.zero	512
+	.section	.bss.lpa_hash_index,"aw",@nobits
+	.align	3
+	.set	.LANCHOR83,. + 0
+	.type	lpa_hash_index, %object
+	.size	lpa_hash_index, 8
+lpa_hash_index:
+	.zero	8
+	.section	.bss.nandc_hw_seed,"aw",@nobits
+	.set	.LANCHOR28,. + 0
+	.type	nandc_hw_seed, %object
+	.size	nandc_hw_seed, 1
+nandc_hw_seed:
+	.zero	1
+	.section	.bss.nandc_randomizer_en,"aw",@nobits
+	.set	.LANCHOR29,. + 0
+	.type	nandc_randomizer_en, %object
+	.size	nandc_randomizer_en, 1
+nandc_randomizer_en:
+	.zero	1
+	.section	.bss.p_free_buf_head,"aw",@nobits
+	.set	.LANCHOR37,. + 0
+	.type	p_free_buf_head, %object
+	.size	p_free_buf_head, 1
+p_free_buf_head:
+	.zero	1
+	.section	.bss.p_read_ahead_ext_buf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR50,. + 0
+	.type	p_read_ahead_ext_buf, %object
+	.size	p_read_ahead_ext_buf, 8
+p_read_ahead_ext_buf:
+	.zero	8
+	.section	.bss.pm_gc_enable,"aw",@nobits
+	.align	2
+	.set	.LANCHOR91,. + 0
+	.type	pm_gc_enable, %object
+	.size	pm_gc_enable, 4
+pm_gc_enable:
+	.zero	4
+	.section	.bss.pm_last_load_ram_id,"aw",@nobits
+	.set	.LANCHOR151,. + 0
+	.type	pm_last_load_ram_id, %object
+	.size	pm_last_load_ram_id, 1
+pm_last_load_ram_id:
+	.zero	1
+	.section	.bss.pm_last_update_ram_id,"aw",@nobits
+	.set	.LANCHOR94,. + 0
+	.type	pm_last_update_ram_id, %object
+	.size	pm_last_update_ram_id, 1
+pm_last_update_ram_id:
+	.zero	1
+	.section	.bss.pm_ram_info,"aw",@nobits
+	.align	3
+	.set	.LANCHOR93,. + 0
+	.type	pm_ram_info, %object
+	.size	pm_ram_info, 512
+pm_ram_info:
+	.zero	512
+	.section	.bss.read_ahead_lpa,"aw",@nobits
+	.align	2
+	.set	.LANCHOR49,. + 0
+	.type	read_ahead_lpa, %object
+	.size	read_ahead_lpa, 4
+read_ahead_lpa:
+	.zero	4
+	.section	.bss.sblk_gc_write_completed_queue_head,"aw",@nobits
+	.set	.LANCHOR62,. + 0
+	.type	sblk_gc_write_completed_queue_head, %object
+	.size	sblk_gc_write_completed_queue_head, 1
+sblk_gc_write_completed_queue_head:
+	.zero	1
+	.section	.bss.sblk_queue_head,"aw",@nobits
+	.set	.LANCHOR90,. + 0
+	.type	sblk_queue_head, %object
+	.size	sblk_queue_head, 1
+sblk_queue_head:
+	.zero	1
+	.section	.bss.sblk_read_completed_queue_head,"aw",@nobits
+	.set	.LANCHOR51,. + 0
+	.type	sblk_read_completed_queue_head, %object
+	.size	sblk_read_completed_queue_head, 1
+sblk_read_completed_queue_head:
+	.zero	1
+	.section	.bss.sblk_write_completed_queue_head,"aw",@nobits
+	.set	.LANCHOR88,. + 0
+	.type	sblk_write_completed_queue_head, %object
+	.size	sblk_write_completed_queue_head, 1
+sblk_write_completed_queue_head:
+	.zero	1
+	.section	.bss.write_buf_count,"aw",@nobits
+	.set	.LANCHOR43,. + 0
+	.type	write_buf_count, %object
+	.size	write_buf_count, 1
+write_buf_count:
+	.zero	1
+	.section	.bss.write_buf_head,"aw",@nobits
+	.set	.LANCHOR42,. + 0
+	.type	write_buf_head, %object
+	.size	write_buf_head, 1
+write_buf_head:
+	.zero	1
+	.section	.bss.write_commit_count,"aw",@nobits
+	.set	.LANCHOR89,. + 0
+	.type	write_commit_count, %object
+	.size	write_commit_count, 1
+write_commit_count:
+	.zero	1
+	.section	.bss.write_commit_head,"aw",@nobits
+	.set	.LANCHOR127,. + 0
+	.type	write_commit_head, %object
+	.size	write_commit_head, 1
+write_commit_head:
+	.zero	1
+	.section	.data.NandFlashParaTbl,"aw",@progbits
+	.align	3
+	.set	.LANCHOR142,. + 0
+	.type	NandFlashParaTbl, %object
+	.size	NandFlashParaTbl, 768
+NandFlashParaTbl:
+	.byte	6
+	.byte	-104
+	.byte	58
+	.byte	-104
+	.byte	-77
+	.byte	118
+	.byte	114
+	.byte	1
+	.byte	1
+	.byte	32
+	.hword	768
+	.byte	3
+	.byte	2
+	.hword	758
+	.hword	5593
+	.byte	0
+	.byte	37
+	.byte	60
+	.byte	32
+	.byte	2
+	.byte	1
+	.byte	4
+	.byte	0
+	.hword	256
+	.byte	1
+	.byte	-94
+	.byte	0
+	.byte	0
+	.byte	6
+	.byte	-104
+	.byte	60
+	.byte	-104
+	.byte	-77
+	.byte	118
+	.byte	114
+	.byte	1
+	.byte	1
+	.byte	32
+	.hword	768
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+__func__.8526:
+	.string	"flash_start_page_read"
+	.section	.rodata.__func__.8541,"a",@progbits
+	.align	3
+	.set	.LANCHOR120,. + 0
+	.type	__func__.8541, %object
+	.size	__func__.8541, 25
+__func__.8541:
+	.string	"flash_complete_page_read"
+	.section	.rodata.__func__.9099,"a",@progbits
+	.align	3
+	.set	.LANCHOR39,. + 0
+	.type	__func__.9099, %object
+	.size	__func__.9099, 13
+__func__.9099:
+	.string	"buf_add_tail"
+	.section	.rodata.__func__.9112,"a",@progbits
+	.align	3
+	.set	.LANCHOR40,. + 0
+	.type	__func__.9112, %object
+	.size	__func__.9112, 10
+__func__.9112:
+	.string	"buf_alloc"
+	.section	.rodata.__func__.9126,"a",@progbits
+	.align	3
+	.set	.LANCHOR41,. + 0
+	.type	__func__.9126, %object
+	.size	__func__.9126, 16
+__func__.9126:
+	.string	"buf_remove_free"
+	.section	.rodata.__func__.9234,"a",@progbits
+	.align	3
+	.set	.LANCHOR100,. + 0
+	.type	__func__.9234, %object
+	.size	__func__.9234, 17
+__func__.9234:
+	.string	"lpa_rebuild_hash"
+	.section	.rodata.__func__.9286,"a",@progbits
+	.align	3
+	.set	.LANCHOR167,. + 0
+	.type	__func__.9286, %object
+	.size	__func__.9286, 17
+__func__.9286:
+	.string	"ftl_write_commit"
+	.section	.rodata.__func__.9297,"a",@progbits
+	.align	3
+	.set	.LANCHOR44,. + 0
+	.type	__func__.9297, %object
+	.size	__func__.9297, 14
+__func__.9297:
+	.string	"ftl_write_buf"
+	.section	.rodata.__func__.9345,"a",@progbits
+	.align	3
+	.set	.LANCHOR152,. + 0
+	.type	__func__.9345, %object
+	.size	__func__.9345, 15
+__func__.9345:
+	.string	"ftl_read_ahead"
+	.section	.rodata.__func__.9353,"a",@progbits
+	.align	3
+	.set	.LANCHOR48,. + 0
+	.type	__func__.9353, %object
+	.size	__func__.9353, 13
+__func__.9353:
+	.string	"ftl_read_buf"
+	.section	.rodata.__func__.9391,"a",@progbits
+	.align	3
+	.set	.LANCHOR157,. + 0
+	.type	__func__.9391, %object
+	.size	__func__.9391, 9
+__func__.9391:
+	.string	"ftl_read"
+	.section	.rodata.__func__.9417,"a",@progbits
+	.align	3
+	.set	.LANCHOR169,. + 0
+	.type	__func__.9417, %object
+	.size	__func__.9417, 12
+__func__.9417:
+	.string	"ftl_discard"
+	.section	.rodata.__func__.9438,"a",@progbits
+	.align	3
+	.set	.LANCHOR158,. + 0
+	.type	__func__.9438, %object
+	.size	__func__.9438, 10
+__func__.9438:
+	.string	"vpn_check"
+	.section	.rodata.__func__.9463,"a",@progbits
+	.align	3
+	.set	.LANCHOR159,. + 0
+	.type	__func__.9463, %object
+	.size	__func__.9463, 15
+__func__.9463:
+	.string	"ftl_info_check"
+	.section	.rodata.__func__.9572,"a",@progbits
+	.align	3
+	.set	.LANCHOR55,. + 0
+	.type	__func__.9572, %object
+	.size	__func__.9572, 12
+__func__.9572:
+	.string	"gc_add_sblk"
+	.section	.rodata.__func__.9615,"a",@progbits
+	.align	3
+	.set	.LANCHOR122,. + 0
+	.type	__func__.9615, %object
+	.size	__func__.9615, 21
+__func__.9615:
+	.string	"gc_check_data_one_wl"
+	.section	.rodata.__func__.9649,"a",@progbits
+	.align	3
+	.set	.LANCHOR153,. + 0
+	.type	__func__.9649, %object
+	.size	__func__.9649, 22
+__func__.9649:
+	.string	"gc_update_l2p_map_new"
+	.section	.rodata.__func__.9662,"a",@progbits
+	.align	3
+	.set	.LANCHOR63,. + 0
+	.type	__func__.9662, %object
+	.size	__func__.9662, 19
+__func__.9662:
+	.string	"gc_write_completed"
+	.section	.rodata.__func__.9691,"a",@progbits
+	.align	3
+	.set	.LANCHOR170,. + 0
+	.type	__func__.9691, %object
+	.size	__func__.9691, 16
+__func__.9691:
+	.string	"gc_do_copy_back"
+	.section	.rodata.__func__.9713,"a",@progbits
+	.align	3
+	.set	.LANCHOR73,. + 0
+	.type	__func__.9713, %object
+	.size	__func__.9713, 16
+__func__.9713:
+	.string	"gc_free_src_blk"
+	.section	.rodata.__func__.9758,"a",@progbits
+	.align	3
+	.set	.LANCHOR160,. + 0
+	.type	__func__.9758, %object
+	.size	__func__.9758, 16
+__func__.9758:
+	.string	"gc_scan_src_blk"
+	.section	.rodata.__func__.9790,"a",@progbits
+	.align	3
+	.set	.LANCHOR156,. + 0
+	.type	__func__.9790, %object
+	.size	__func__.9790, 18
+__func__.9790:
+	.string	"gc_search_src_blk"
+	.section	.rodata.__func__.9806,"a",@progbits
+	.align	3
+	.set	.LANCHOR154,. + 0
+	.type	__func__.9806, %object
+	.size	__func__.9806, 20
+__func__.9806:
+	.string	"gc_scan_static_data"
+	.section	.rodata.__func__.9867,"a",@progbits
+	.align	3
+	.set	.LANCHOR172,. + 0
+	.type	__func__.9867, %object
+	.size	__func__.9867, 6
+__func__.9867:
+	.string	"do_gc"
+	.section	.rodata.__func__.9928,"a",@progbits
+	.align	3
+	.set	.LANCHOR132,. + 0
+	.type	__func__.9928, %object
+	.size	__func__.9928, 15
+__func__.9928:
+	.string	"ftl_info_flush"
+	.section	.rodata.__func__.9977,"a",@progbits
+	.align	3
+	.set	.LANCHOR72,. + 0
+	.type	__func__.9977, %object
+	.size	__func__.9977, 14
+__func__.9977:
+	.string	"ftl_free_sblk"
+	.section	.rodata.do_gc.str1.1,"aMS",@progbits,1
+.LC153:
+	.string	"gc %d: %d %d %d %d %d %d\n"
+.LC154:
+	.string	"GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\n"
+.LC155:
+	.string	"gc free %x, %d\n"
+	.section	.rodata.dump_ftl_info.str1.1,"aMS",@progbits,1
+.LC81:
+	.string	"g_ftl_info_blk blk:0x%x, index:0x%x, page:0x%x\n"
+.LC82:
+	.string	"ftl_ext_info_blk blk:0x%x, page:0x%x\n"
+.LC83:
+	.string	"ac_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
+.LC84:
+	.string	"tmp_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
+.LC85:
+	.string	"gc_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
+.LC86:
+	.string	"lpa:"
+.LC87:
+	.string	"vpn:"
+.LC88:
+	.string	"sblk:"
+.LC89:
+	.string	"lpa_hash:"
+.LC90:
+	.string	"lpa_hash_index:"
+	.section	.rodata.dump_sblk_queue.str1.1,"aMS",@progbits,1
+.LC24:
+	.string	"dump_sblk_queue: %d\n"
+.LC25:
+	.string	"buf id= %d state = %d ppa = %x\n"
+	.section	.rodata.flash_complete_page_read.str1.1,"aMS",@progbits,1
+.LC54:
+	.string	"flash_complete_page_read %x %x error_ecc %d %d\n"
+	.section	.rodata.flash_ddr_tunning_read.str1.1,"aMS",@progbits,1
+.LC48:
+	.string	"%d flash_ddr_tunning_read %x ecc=%d\n"
+.LC49:
+	.string	"sync para %d\n"
+.LC50:
+	.string	"DDR mode Read error %x %x\n"
+	.section	.rodata.flash_erase_all.str1.1,"aMS",@progbits,1
+.LC5:
+	.string	"erase done: %x\n"
+	.section	.rodata.flash_erase_block_en.str1.1,"aMS",@progbits,1
+.LC3:
+	.string	"flash_erase_block %x %x\n"
+.LC4:
+	.string	"flash_erase_block block = %x status = %x\n"
+	.section	.rodata.flash_erase_duplane_block.str1.1,"aMS",@progbits,1
+.LC1:
+	.string	"flash_erase_duplane_block %x %x %x\n"
+.LC2:
+	.string	"flash_erase_duplane_block pageadd = %x status = %x\n"
+	.section	.rodata.flash_info_blk_init.str1.1,"aMS",@progbits,1
+.LC53:
+	.string	"no sys info %x\n"
+	.section	.rodata.flash_info_flush.str1.1,"aMS",@progbits,1
+.LC77:
+	.string	"finfo:"
+.LC78:
+	.string	"flash_info_flush id = %x, page = %x\n"
+.LC79:
+	.string	"sys_info_flush error:%x\n"
+	.section	.rodata.flash_mask_bad_block.str1.1,"aMS",@progbits,1
+.LC6:
+	.string	"flash_mask_bad_block %d %d\n"
+	.section	.rodata.flash_prog_page.str1.1,"aMS",@progbits,1
+.LC57:
+	.string	"flash_prog_page %x %x %x\n"
+	.section	.rodata.flash_prog_page_en.str1.1,"aMS",@progbits,1
+.LC59:
+	.string	"flash_prog_page_en:%x %x\n"
+.LC60:
+	.string	"spare"
+.LC61:
+	.string	"data"
+.LC62:
+	.string	"write error: %x\n"
+	.section	.rodata.flash_read_page.str1.1,"aMS",@progbits,1
+.LC41:
+	.string	"flash_read_page %x %x %x\n"
+	.section	.rodata.flash_read_page_en.str1.1,"aMS",@progbits,1
+.LC51:
+	.string	"flash_read_page_en %x %x\n"
+.LC52:
+	.string	"flash_read_page_en %x %x error_ecc %d %d\n"
+	.section	.rodata.flash_wait_device_ready_raw.str1.1,"aMS",@progbits,1
+.LC0:
+	.string	"\n!!!!! error @ func:%s - line:%d\n"
+	.section	.rodata.ftl_alloc_sblk.str1.1,"aMS",@progbits,1
+.LC14:
+	.string	"ftl_alloc_sblk %x, %d %d %d\n"
+	.section	.rodata.ftl_discard.str1.1,"aMS",@progbits,1
+.LC148:
+	.string	"ftl_discard:(%x, %x, %x, %x)\n"
+	.section	.rodata.ftl_info_blk_init.str1.1,"aMS",@progbits,1
+.LC65:
+	.string	"%d %x @%d %x\n"
+.LC66:
+	.string	"ftl_info_blk_init %d %d %x\n"
+	.section	.rodata.ftl_info_check.str1.1,"aMS",@progbits,1
+.LC122:
+	.string	"free blk vpn error: %x %x\n"
+.LC123:
+	.string	"data blk: %d %d %d\n"
+.LC124:
+	.string	"free blk: %d %d %d\n"
+	.section	.rodata.ftl_info_flush.str1.1,"aMS",@progbits,1
+.LC64:
+	.string	"g_ftl_info_blk blk = %x, page = %x version = %d\n"
+	.section	.rodata.ftl_init.str1.1,"aMS",@progbits,1
+.LC139:
+	.string	"FTL version: 6.0.3 20180211"
+.LC140:
+	.string	"gp_ftl_ext_info %p %p %p\n"
+.LC141:
+	.string	"flash info size: %d %d %d\n"
+	.section	.rodata.ftl_low_format.str1.1,"aMS",@progbits,1
+.LC67:
+	.string	"low format %d %d %d %d\n"
+	.section	.rodata.ftl_mask_bad_block.str1.1,"aMS",@progbits,1
+.LC19:
+	.string	"mask bad block:cs %x block: %x\n"
+	.section	.rodata.ftl_open_sblk_recovery.str1.1,"aMS",@progbits,1
+.LC69:
+	.string	"saved_active_page  = %x\n"
+.LC70:
+	.string	"saved_active_plane = %x\n"
+.LC71:
+	.string	"sblk = %x\n"
+.LC72:
+	.string	"phy_blk = %x %x\n"
+.LC73:
+	.string	"blk= %x, page=%x, ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
+.LC74:
+	.string	"sblk = %x, vpn0 = %d, vpn1 = %d\n"
+.LC75:
+	.string	"dump write = %x\n"
+	.section	.rodata.ftl_re_low_format_test.str1.1,"aMS",@progbits,1
+.LC68:
+	.string	"re low formaet %d\n"
+	.section	.rodata.ftl_read.str1.1,"aMS",@progbits,1
+.LC114:
+	.string	"ftl_read refresh =%x, lpa = %x, ppa= %x\n"
+	.section	.rodata.ftl_read_ahead.str1.1,"aMS",@progbits,1
+.LC100:
+	.string	"ftl_read_ahead refresh =%x, lpa = %x, ppa= %x\n"
+.LC101:
+	.string	"id=%d, lpa = %x, ppa = %x spare = %x %x %x %x\n"
+	.section	.rodata.ftl_sblk_dump.str1.1,"aMS",@progbits,1
+.LC107:
+	.string	"ftl_sblk_dump = %x %x %x %x\n"
+.LC108:
+	.string	"page_addr = %x, lpa=%x vpn = %d\n"
+.LC109:
+	.string	"index= %x, lpa=%x\n"
+.LC110:
+	.string	"block = %x, vpn=%x check vpn = %d\n"
+	.section	.rodata.ftl_scan_all_data.str1.1,"aMS",@progbits,1
+.LC127:
+	.string	"ftl_scan_all_data = %x\n"
+.LC128:
+	.string	"scan lpa = %x ppa= %x\n"
+.LC129:
+	.string	"lba = %x,addr= %x, ststus = %x, spare= %x %x %x %x data=%x %x\n"
+.LC130:
+	.string	"lba = %x, id= %x, index = %x hash ppa = %x\n"
+.LC131:
+	.string	"0pm:"
+.LC132:
+	.string	"1pm:"
+	.section	.rodata.ftl_sysblk_dump.str1.1,"aMS",@progbits,1
+.LC80:
+	.string	"l2p:"
+	.section	.rodata.ftl_test_block.str1.1,"aMS",@progbits,1
+.LC63:
+	.string	"low format %d\n"
+	.section	.rodata.ftl_update_l2p_map.str1.1,"aMS",@progbits,1
+.LC143:
+	.string	"ftl_update_l2p_map: %x %x %x\n"
+.LC144:
+	.string	"ftl_update_l2p_map"
+.LC145:
+	.string	"lpa_tbl:"
+.LC146:
+	.string	"sblk %x vpn: %d %d\n"
+	.section	.rodata.ftl_vpn_decrement.str1.1,"aMS",@progbits,1
+.LC17:
+	.string	"ftl_vpn_decrement %x = %d\n"
+	.section	.rodata.ftl_write_commit.str1.1,"aMS",@progbits,1
+.LC147:
+	.string	"%d read error: ppa:%x, lpa:%x, status:%x\n"
+	.section	.rodata.ftl_write_completed.str1.1,"aMS",@progbits,1
+.LC18:
+	.string	"ftl prog error =%x, lpa = %x, ppa= %x\n"
+	.section	.rodata.gc_add_sblk.str1.1,"aMS",@progbits,1
+.LC7:
+	.string	"gc_add_sblk = %d, %d, %d, %d, %d, %d\n"
+	.section	.rodata.gc_check_data_one_wl.str1.1,"aMS",@progbits,1
+.LC56:
+	.string	"1ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
+	.section	.rodata.gc_do_copy_back.str1.1,"aMS",@progbits,1
+.LC149:
+	.string	"gc page in buf: lpa %x ppa = %x pageindex= %x\n"
+.LC150:
+	.string	"gc_do_copy_back: lpa %x des_ppa = %x %x gc_ppa= %x page_index= %d\n"
+.LC151:
+	.string	"gc_do_copy_back: %x %x %x %x gc_ppa:%x %x\n"
+.LC152:
+	.string	"%d prog_step: %x %x buf id= %x ppa = %x hash=%x id = %x plane = %x lpa=%x\n"
+	.section	.rodata.gc_free_src_blk.str1.1,"aMS",@progbits,1
+.LC15:
+	.string	"gc_free_src_blk = %x, vpn = %d\n"
+.LC16:
+	.string	"gc_free_src_blk %x, %d\n"
+	.section	.rodata.gc_free_temp_buf.str1.1,"aMS",@progbits,1
+.LC10:
+	.string	"%d gc_free_temp_buf buf id= %x\n"
+	.section	.rodata.gc_recovery.str1.1,"aMS",@progbits,1
+.LC133:
+	.string	"ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
+.LC134:
+	.string	"gc_lpa:"
+.LC135:
+	.string	"gc_ppa:"
+.LC136:
+	.string	"ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
+.LC137:
+	.string	"gc_recovery"
+.LC138:
+	.string	"gc_recovery: %x vpn = %x\n"
+	.section	.rodata.gc_scan_src_blk.str1.1,"aMS",@progbits,1
+.LC125:
+	.string	"gc_scan_src_blk = %x, vpn = %d\n"
+.LC126:
+	.string	"gc_scan_src_blk = %x, s vpn0 = %d, c vpn1 = %d\n"
+	.section	.rodata.gc_search_src_blk.str1.1,"aMS",@progbits,1
+.LC111:
+	.string	"gc_search_src_blk = %d, %d, %d\n"
+.LC112:
+	.string	"vpn gc = %d, id = %d\n"
+.LC113:
+	.string	"gc_search_src_blk count= %d\n"
+	.section	.rodata.gc_static_wearleveling.str1.1,"aMS",@progbits,1
+.LC11:
+	.string	"gc_static_wearleveling: slc blk: %d, tlc blk: %d avg slc ec: %d, avg tlc ec: %d \n"
+.LC12:
+	.string	"gc_static_wearleveling: min slc ec: %d, min tlc ec: %d max slc ec: %d, max tlc ec: %d \n"
+	.section	.rodata.gc_update_l2p_map_new.str1.1,"aMS",@progbits,1
+.LC102:
+	.string	"gc_update_l2p_map_new sblk %x\n"
+.LC103:
+	.string	"gc_update_l2p_map_new: %x %x %x\n"
+.LC104:
+	.string	"0lpa: %x %x %x\n"
+.LC105:
+	.string	"lpa: %x %x %x\n"
+.LC106:
+	.string	"gc_update_l2p_map_new: %x vpn = %x vpn1 = %x done\n"
+	.section	.rodata.gc_write_completed.str1.1,"aMS",@progbits,1
+.LC8:
+	.string	"status: %x, ppa: %x\n"
+.LC9:
+	.string	"gc_write_completed: %x  %x  %x %x\n"
+	.section	.rodata.hynix_get_read_retry_default.str1.1,"aMS",@progbits,1
+.LC33:
+	.string	"otp error! %d"
+.LC34:
+	.string	"rr"
+	.section	.rodata.hynix_read_retrial.str1.1,"aMS",@progbits,1
+.LC47:
+	.string	"hynix RR %d row=%x, count %d, status=%d\n"
+	.section	.rodata.load_l2p_region.str1.1,"aMS",@progbits,1
+.LC92:
+	.string	"region_id = %d, pm_max_region = %d\n"
+.LC93:
+	.string	"load_l2p_region = %x,%x,%x, %x\n"
+.LC94:
+	.string	"pm_ppa:"
+.LC95:
+	.string	"data:"
+.LC96:
+	.string	"spare:"
+	.section	.rodata.lpa_rebuild_hash.str1.1,"aMS",@progbits,1
+.LC28:
+	.string	"%s %d %d\n"
+	.section	.rodata.micron_read_retrial.str1.1,"aMS",@progbits,1
+.LC42:
+	.string	"micron %d row=%x,count %d,status=%d\n"
+.LC43:
+	.string	"micron RR %d row=%x,count %d,status=%d\n"
+	.section	.rodata.nandc_xfer.str1.1,"aMS",@progbits,1
+.LC39:
+	.string	"dqs data abort %x\n"
+.LC40:
+	.string	"xfer error %x\n"
+	.section	.rodata.nandc_xfer_done.str1.1,"aMS",@progbits,1
+.LC35:
+	.string	"%d mtrans_cnt = %d page_num = %d\n"
+.LC36:
+	.string	"nandc:"
+.LC37:
+	.string	"%d flReg.d32=%x %x\n"
+.LC38:
+	.string	"nandc_xfer_done read error %x\n"
+	.section	.rodata.pm_alloc_new_blk.str1.1,"aMS",@progbits,1
+.LC26:
+	.string	"blk %x is bad block\n"
+.LC27:
+	.string	"pm_alloc_new_blk: %x %x %x %x\n"
+	.section	.rodata.pm_init.str1.1,"aMS",@progbits,1
+.LC97:
+	.string	"pm_init posr %x %x %x\n"
+.LC98:
+	.string	"pm_init recovery %x %x %x\n"
+	.section	.rodata.pm_log2phys.str1.1,"aMS",@progbits,1
+.LC99:
+	.string	"pm_log2phys  lpn = %d, max lpn = %d\n"
+	.section	.rodata.pm_ppa_update_check.str1.1,"aMS",@progbits,1
+.LC91:
+	.string	"%s w error lpn = %x, max ppa = %d\n"
+	.section	.rodata.pm_write_page.str1.1,"aMS",@progbits,1
+.LC76:
+	.string	"pm_write_page write error: %x\n"
+	.section	.rodata.print_ftl_debug_info.str1.1,"aMS",@progbits,1
+.LC20:
+	.string	"free blk: s:%x,t:%x,m:%x, data blk:s:%x,%x,t%x vpn: s:%x t:%x\n"
+.LC21:
+	.string	"totle w: %d MB,r: %d MB %d dv:0x%X,poc:%d\n"
+.LC22:
+	.string	"gc xlc page: %d,gc slc page: %d, tmp w: %d MB\n"
+.LC23:
+	.string	"slc ec: %d,%d,%d,%d,%d,tlc ec: %d,%d,%d,%d,%d\n"
+	.section	.rodata.print_gc_debug_info.str1.1,"aMS",@progbits,1
+.LC13:
+	.string	"gc: b:%x,p:%x,i:%x; free buf=%d %d\n"
+	.section	.rodata.queue_wait_first_req_completed.str1.1,"aMS",@progbits,1
+.LC55:
+	.string	"set buf %d,status = %x, ppa = %x lun state = %d\n"
+	.section	.rodata.random_seed,"a",@progbits
+	.align	3
+	.set	.LANCHOR32,. + 0
+	.type	random_seed, %object
+	.size	random_seed, 256
+random_seed:
+	.hword	22378
+	.hword	1512
+	.hword	25245
+	.hword	17827
+	.hword	25756
+	.hword	19440
+	.hword	9026
+	.hword	10030
+	.hword	29528
+	.hword	20467
+	.hword	29676
+	.hword	24432
+	.hword	31328
+	.hword	6872
+	.hword	13426
+	.hword	13842
+	.hword	8783
+	.hword	1108
+	.hword	782
+	.hword	28837
+	.hword	30729
+	.hword	9505
+	.hword	18676
+	.hword	23085
+	.hword	18730
+	.hword	1085
+	.hword	32609
+	.hword	14697
+	.hword	20858
+	.hword	15170
+	.hword	30365
+	.hword	1607
+	.hword	32298
+	.hword	4995
+	.hword	18905
+	.hword	1976
+	.hword	9592
+	.hword	20204
+	.hword	17443
+	.hword	13615
+	.hword	23330
+	.hword	29369
+	.hword	13947
+	.hword	9398
+	.hword	32398
+	.hword	8984
+	.hword	27600
+	.hword	21785
+	.hword	6019
+	.hword	6311
+	.hword	31598
+	.hword	30210
+	.hword	19327
+	.hword	13896
+	.hword	11347
+	.hword	27545
+	.hword	3107
+	.hword	26575
+	.hword	32270
+	.hword	19852
+	.hword	20601
+	.hword	8349
+	.hword	9290
+	.hword	29819
+	.hword	13579
+	.hword	3661
+	.hword	28676
+	.hword	27331
+	.hword	32574
+	.hword	8693
+	.hword	31253
+	.hword	9081
+	.hword	5399
+	.hword	6842
+	.hword	20087
+	.hword	5537
+	.hword	1274
+	.hword	11617
+	.hword	9530
+	.hword	4866
+	.hword	8035
+	.hword	23219
+	.hword	1178
+	.hword	23272
+	.hword	7383
+	.hword	18944
+	.hword	12488
+	.hword	12871
+	.hword	29340
+	.hword	20532
+	.hword	11022
+	.hword	22514
+	.hword	228
+	.hword	22363
+	.hword	24978
+	.hword	14584
+	.hword	12138
+	.hword	3092
+	.hword	17916
+	.hword	16863
+	.hword	14554
+	.hword	31457
+	.hword	29474
+	.hword	25311
+	.hword	24121
+	.hword	3684
+	.hword	28037
+	.hword	22865
+	.hword	22839
+	.hword	25217
+	.hword	13217
+	.hword	27186
+	.hword	14938
+	.hword	11180
+	.hword	29754
+	.hword	24180
+	.hword	15150
+	.hword	32455
+	.hword	20434
+	.hword	23848
+	.hword	29983
+	.hword	16120
+	.hword	14769
+	.hword	20041
+	.hword	29803
+	.hword	28406
+	.hword	17598
+	.hword	28087
+	.section	.rodata.rk_ftl_init.str1.1,"aMS",@progbits,1
+.LC142:
+	.string	"ftl_init %x\n"
+	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
+.LC29:
+	.string	"%s 0x%x:"
+.LC30:
+	.string	"%x "
+.LC31:
+	.string	""
+.LC32:
+	.string	"%s\n"
+	.section	.rodata.sblk_prog_page.str1.1,"aMS",@progbits,1
+.LC58:
+	.string	"sblk_prog_page ppa = %x, count = %d\n"
+	.section	.rodata.toshiba_15ref_value,"a",@progbits
+	.align	3
+	.set	.LANCHOR0,. + 0
+	.type	toshiba_15ref_value, %object
+	.size	toshiba_15ref_value, 95
+toshiba_15ref_value:
+	.byte	4
+	.byte	5
+	.byte	6
+	.byte	7
+	.byte	13
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	2
+	.byte	4
+	.byte	2
+	.byte	0
+	.byte	0
+	.byte	8
+	.byte	8
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	124
+	.byte	0
+	.byte	124
+	.byte	124
+	.byte	0
+	.byte	122
+	.byte	0
+	.byte	122
+	.byte	122
+	.byte	0
+	.byte	11
+	.byte	126
+	.byte	118
+	.byte	116
+	.byte	0
+	.byte	120
+	.byte	2
+	.byte	120
+	.byte	122
+	.byte	0
+	.byte	126
+	.byte	4
+	.byte	126
+	.byte	122
+	.byte	0
+	.byte	16
+	.byte	118
+	.byte	114
+	.byte	112
+	.byte	0
+	.byte	118
+	.byte	4
+	.byte	118
+	.byte	120
+	.byte	0
+	.byte	4
+	.byte	4
+	.byte	4
+	.byte	118
+	.byte	0
+	.byte	2
+	.byte	0
+	.byte	126
+	.byte	124
+	.byte	0
+	.byte	6
+	.byte	10
+	.byte	6
+	.byte	2
+	.byte	0
+	.byte	116
+	.byte	124
+	.byte	116
+	.byte	118
+	.byte	0
+	.byte	4
+	.byte	4
+	.byte	124
+	.byte	126
+	.byte	0
+	.byte	0
+	.byte	124
+	.byte	120
+	.byte	120
+	.byte	0
+	.byte	124
+	.byte	118
+	.byte	116
+	.byte	114
+	.byte	0
+	.section	.rodata.toshiba_3D_slc_value,"a",@progbits
+	.align	3
+	.set	.LANCHOR16,. + 0
+	.type	toshiba_3D_slc_value, %object
+	.size	toshiba_3D_slc_value, 11
+toshiba_3D_slc_value:
+	.byte	-117
+	.byte	0
+	.byte	-8
+	.byte	8
+	.byte	-16
+	.byte	-24
+	.byte	24
+	.byte	-40
+	.byte	40
+	.byte	-56
+	.byte	56
+	.section	.rodata.toshiba_3D_tlc_value,"a",@progbits
+	.align	3
+	.set	.LANCHOR15,. + 0
+	.type	toshiba_3D_tlc_value, %object
+	.size	toshiba_3D_tlc_value, 399
+toshiba_3D_tlc_value:
+	.byte	-119
+	.byte	-119
+	.byte	-119
+	.byte	-119
+	.byte	-118
+	.byte	-118
+	.byte	-118
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	-9
+	.byte	-12
+	.byte	-9
+	.byte	-7
+	.byte	-13
+	.byte	-12
+	.byte	-7
+	.byte	5
+	.byte	-2
+	.byte	-1
+	.byte	0
+	.byte	-3
+	.byte	-2
+	.byte	6
+	.byte	-6
+	.byte	-15
+	.byte	-15
+	.byte	-2
+	.byte	-12
+	.byte	-16
+	.byte	-6
+	.byte	-2
+	.byte	-19
+	.byte	-19
+	.byte	-6
+	.byte	-4
+	.byte	-12
+	.byte	-14
+	.byte	-2
+	.byte	-11
+	.byte	-23
+	.byte	-34
+	.byte	-4
+	.byte	-20
+	.byte	-22
+	.byte	-2
+	.byte	-7
+	.byte	-31
+	.byte	-30
+	.byte	-12
+	.byte	-20
+	.byte	-18
+	.byte	2
+	.byte	-15
+	.byte	-19
+	.byte	-36
+	.byte	-12
+	.byte	-28
+	.byte	-34
+	.byte	-6
+	.byte	-15
+	.byte	-11
+	.byte	2
+	.byte	-12
+	.byte	-8
+	.byte	-2
+	.byte	2
+	.byte	-3
+	.byte	-7
+	.byte	-10
+	.byte	-4
+	.byte	-8
+	.byte	-6
+	.byte	-6
+	.byte	-11
+	.byte	-27
+	.byte	-38
+	.byte	-16
+	.byte	-12
+	.byte	-2
+	.byte	2
+	.byte	-7
+	.byte	-31
+	.byte	-22
+	.byte	-4
+	.byte	-16
+	.byte	-22
+	.byte	-7
+	.byte	-31
+	.byte	-23
+	.byte	-22
+	.byte	-28
+	.byte	-28
+	.byte	-26
+	.byte	2
+	.byte	-7
+	.byte	-11
+	.byte	-14
+	.byte	-8
+	.byte	-12
+	.byte	-10
+	.byte	-10
+	.byte	-27
+	.byte	-25
+	.byte	-22
+	.byte	-20
+	.byte	-28
+	.byte	-22
+	.byte	-7
+	.byte	-23
+	.byte	-29
+	.byte	-34
+	.byte	-24
+	.byte	-32
+	.byte	-22
+	.byte	-10
+	.byte	-11
+	.byte	-29
+	.byte	-18
+	.byte	-12
+	.byte	-24
+	.byte	-22
+	.byte	6
+	.byte	1
+	.byte	-3
+	.byte	-6
+	.byte	0
+	.byte	-4
+	.byte	-2
+	.byte	10
+	.byte	-3
+	.byte	-7
+	.byte	-6
+	.byte	4
+	.byte	-4
+	.byte	-2
+	.byte	-10
+	.byte	-23
+	.byte	-39
+	.byte	-22
+	.byte	-19
+	.byte	-24
+	.byte	-18
+	.byte	-14
+	.byte	-23
+	.byte	-29
+	.byte	-30
+	.byte	-15
+	.byte	-30
+	.byte	-30
+	.byte	-7
+	.byte	-27
+	.byte	-35
+	.byte	-26
+	.byte	-15
+	.byte	-24
+	.byte	-26
+	.byte	6
+	.byte	-11
+	.byte	5
+	.byte	-2
+	.byte	-16
+	.byte	-16
+	.byte	-2
+	.byte	-2
+	.byte	-15
+	.byte	-15
+	.byte	-20
+	.byte	-8
+	.byte	-16
+	.byte	-18
+	.byte	6
+	.byte	5
+	.byte	-15
+	.byte	-2
+	.byte	-24
+	.byte	-28
+	.byte	-22
+	.byte	10
+	.byte	-15
+	.byte	-3
+	.byte	-30
+	.byte	-8
+	.byte	-24
+	.byte	-30
+	.byte	-10
+	.byte	-27
+	.byte	-19
+	.byte	-30
+	.byte	-12
+	.byte	-16
+	.byte	-10
+	.byte	14
+	.byte	-19
+	.byte	-3
+	.byte	-30
+	.byte	4
+	.byte	4
+	.byte	6
+	.byte	2
+	.byte	1
+	.byte	-3
+	.byte	-10
+	.byte	-8
+	.byte	-4
+	.byte	-6
+	.byte	-2
+	.byte	-15
+	.byte	-11
+	.byte	-26
+	.byte	-8
+	.byte	-20
+	.byte	-30
+	.byte	6
+	.byte	-19
+	.byte	-3
+	.byte	-46
+	.byte	0
+	.byte	0
+	.byte	2
+	.byte	6
+	.byte	9
+	.byte	5
+	.byte	2
+	.byte	4
+	.byte	8
+	.byte	6
+	.byte	8
+	.byte	9
+	.byte	9
+	.byte	6
+	.byte	8
+	.byte	8
+	.byte	6
+	.byte	10
+	.byte	13
+	.byte	9
+	.byte	6
+	.byte	8
+	.byte	12
+	.byte	10
+	.byte	2
+	.byte	5
+	.byte	1
+	.byte	-2
+	.byte	0
+	.byte	0
+	.byte	6
+	.byte	12
+	.byte	1
+	.byte	13
+	.byte	2
+	.byte	12
+	.byte	12
+	.byte	14
+	.byte	-12
+	.byte	-14
+	.byte	-20
+	.byte	-18
+	.byte	-16
+	.byte	-16
+	.byte	-14
+	.byte	-12
+	.byte	-10
+	.byte	-21
+	.byte	-14
+	.byte	-12
+	.byte	-12
+	.byte	-10
+	.byte	-12
+	.byte	-18
+	.byte	-22
+	.byte	-24
+	.byte	-18
+	.byte	-18
+	.byte	-18
+	.byte	-12
+	.byte	-14
+	.byte	-23
+	.byte	-20
+	.byte	-20
+	.byte	-20
+	.byte	-20
+	.byte	-12
+	.byte	-24
+	.byte	-24
+	.byte	-30
+	.byte	-24
+	.byte	-28
+	.byte	-28
+	.byte	-12
+	.byte	-26
+	.byte	-25
+	.byte	-34
+	.byte	-24
+	.byte	-24
+	.byte	-24
+	.byte	-12
+	.byte	-13
+	.byte	-26
+	.byte	-20
+	.byte	-14
+	.byte	-18
+	.byte	-18
+	.byte	-12
+	.byte	-15
+	.byte	-27
+	.byte	-22
+	.byte	-20
+	.byte	-24
+	.byte	-22
+	.byte	-12
+	.byte	-21
+	.byte	-28
+	.byte	-28
+	.byte	-24
+	.byte	-26
+	.byte	-24
+	.byte	20
+	.byte	16
+	.byte	6
+	.byte	10
+	.byte	16
+	.byte	12
+	.byte	12
+	.byte	16
+	.byte	16
+	.byte	8
+	.byte	8
+	.byte	12
+	.byte	12
+	.byte	12
+	.byte	18
+	.byte	18
+	.byte	10
+	.byte	8
+	.byte	14
+	.byte	14
+	.byte	14
+	.byte	16
+	.byte	14
+	.byte	6
+	.byte	6
+	.byte	12
+	.byte	14
+	.byte	8
+	.byte	20
+	.byte	18
+	.byte	8
+	.byte	6
+	.byte	14
+	.byte	14
+	.byte	10
+	.byte	20
+	.byte	20
+	.byte	6
+	.byte	10
+	.byte	10
+	.byte	12
+	.byte	12
+	.byte	10
+	.byte	13
+	.byte	5
+	.byte	2
+	.byte	14
+	.byte	8
+	.byte	6
+	.byte	6
+	.byte	13
+	.byte	9
+	.byte	4
+	.byte	14
+	.byte	10
+	.byte	10
+	.byte	10
+	.byte	13
+	.byte	9
+	.byte	6
+	.byte	8
+	.byte	12
+	.byte	10
+	.byte	2
+	.byte	5
+	.byte	1
+	.byte	-2
+	.byte	0
+	.byte	0
+	.byte	6
+	.byte	12
+	.byte	1
+	.byte	13
+	.byte	2
+	.byte	12
+	.byte	12
+	.byte	14
+	.section	.rodata.toshiba_3d_read_retrial.str1.1,"aMS",@progbits,1
+.LC44:
+	.string	"toshiba SRR %d row=%x, status=%d\n"
+.LC45:
+	.string	"toshiba TRR %d row=%x, status=%d\n"
+.LC46:
+	.string	"toshiba RR %d row=%x,count %d,status=%d\n"
+	.section	.rodata.toshiba_A19ref_value,"a",@progbits
+	.align	3
+	.set	.LANCHOR1,. + 0
+	.type	toshiba_A19ref_value, %object
+	.size	toshiba_A19ref_value, 45
+toshiba_A19ref_value:
+	.byte	4
+	.byte	5
+	.byte	6
+	.byte	7
+	.byte	13
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	4
+	.byte	4
+	.byte	124
+	.byte	126
+	.byte	0
+	.byte	0
+	.byte	124
+	.byte	120
+	.byte	120
+	.byte	0
+	.byte	124
+	.byte	118
+	.byte	116
+	.byte	114
+	.byte	0
+	.byte	8
+	.byte	8
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	11
+	.byte	126
+	.byte	118
+	.byte	116
+	.byte	0
+	.byte	16
+	.byte	118
+	.byte	114
+	.byte	112
+	.byte	0
+	.byte	2
+	.byte	0
+	.byte	126
+	.byte	124
+	.byte	0
+	.section	.rodata.toshiba_ref_value,"a",@progbits
+	.align	3
+	.set	.LANCHOR3,. + 0
+	.type	toshiba_ref_value, %object
+	.size	toshiba_ref_value, 8
+toshiba_ref_value:
+	.byte	0
+	.byte	4
+	.byte	124
+	.byte	120
+	.byte	116
+	.byte	8
+	.byte	12
+	.byte	112
+	.section	.rodata.vpn_check.str1.1,"aMS",@progbits,1
+.LC115:
+	.string	"acblk = %x, tempblk = %x, gc_des = %x\n"
+.LC116:
+	.string	"acblk = %x, free page = %x, vpn = %x %x\n"
+.LC117:
+	.string	"tmp_blk = %x, free page = %x, vpn = %x %x\n"
+.LC118:
+	.string	"vpn_check lpa = %x, ppa = %x, blk = %x\n"
+.LC119:
+	.string	"l2p"
+.LC120:
+	.string	"vpn_check %x = c %x  s %x function: %x\n"
+.LC121:
+	.string	"vpn_check blk = %x fix vpc\n"
+	.hidden	free

commit fe23c529d1c7de4a88edb5b41300b0b0e30c69f5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Feb 9 17:22:00 2018 +0800

    configs: evb-rk3126: enable adc and pmic keys
    
    Change-Id: I46e2a21d4afa3f07e50e78dbeb22d8758ce066ab
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-rk3126_defconfig b/configs/evb-rk3126_defconfig
index 8cb856bc1d..9f55b4c675 100644
--- a/configs/evb-rk3126_defconfig
+++ b/configs/evb-rk3126_defconfig
@@ -81,3 +81,5 @@ CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_ERRNO_STR=y
 CONFIG_TEST_ROCKCHIP=y
+CONFIG_ADC_KEY=y
+CONFIG_RK8XX_PWRKEY=y

commit e87597928cd5aa636a1a4cda66fbe8da41ff872d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Feb 10 18:00:19 2018 +0800

    image-fdt: print reserved-memory node name
    
    Change-Id: Ib7d4d7d4ae8355877b45eccc93deb03298f1e138
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/image-fdt.c b/common/image-fdt.c
index d64763eb86..9f87829f24 100644
--- a/common/image-fdt.c
+++ b/common/image-fdt.c
@@ -111,7 +111,8 @@ void boot_fdt_add_mem_rsv_regions(struct lmb *lmb, void *fdt_blob)
 							      &rsv_size, false);
 		if (rsv_addr == FDT_ADDR_T_NONE || !rsv_size)
 			continue;
-		printf("  'reserved-memory' region: addr=%llx size=%llx\n",
+		printf("  'reserved-memory' %s: addr=%llx size=%llx\n",
+			fdt_get_name(fdt_blob, offset, NULL),
 			(unsigned long long)rsv_addr, (unsigned long long)rsv_size);
 		lmb_reserve(lmb, rsv_addr, rsv_size);
 	}

commit 1cd698aefc59b10c9d15dae44afda5a9f35b344a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Feb 10 17:46:26 2018 +0800

    armv8: sleep.S: move data to data section
    
    Change-Id: Ib70cd8afb937882de9a067f3424fc4b6a399a22e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/cpu/armv8/sleep.S b/arch/arm/cpu/armv8/sleep.S
index 74ddbeda3e..a0232739d2 100644
--- a/arch/arm/cpu/armv8/sleep.S
+++ b/arch/arm/cpu/armv8/sleep.S
@@ -189,6 +189,7 @@ ENTRY(cpu_do_resume)
 	b	suspend_return
 ENDPROC(cpu_do_resume)
 
-.align 8
+.data
+.align 3
 _suspend_gd:
-	.long	0x0
+	.long	0x0
\ No newline at end of file

commit 26e9b49cf8b24a80c43be906d18eed8be27886e3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Feb 10 16:26:24 2018 +0800

    ARMv8: Makefile: apply -nosimd
    
    If not apply -nosimd, gcc would compile with SMID structure which
    enables float register usage. During U-Boot charge, cpu will system
    suspend to ATF for low power, and cpu maybe lose power. But float
    register are not saved and restore, so we don't wan't to enable them.
    
    Change-Id: I17e89794712a5976d9c1f6461a9da03e57f00f9f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 0e0ae77822..65a493d580 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -18,7 +18,7 @@ arch-$(CONFIG_CPU_ARM1136)	=-march=armv5
 arch-$(CONFIG_CPU_ARM1176)	=-march=armv5t
 arch-$(CONFIG_CPU_V7)		=$(call cc-option, -march=armv7-a, \
 				 $(call cc-option, -march=armv7, -march=armv5))
-arch-$(CONFIG_ARM64)		=-march=armv8-a
+arch-$(CONFIG_ARM64)		=-march=armv8-a+nosimd
 
 # On Tegra systems we must build SPL for the armv4 core on the device
 # but otherwise we can use the value in CONFIG_SYS_ARM_ARCH

commit 07de173ac272fb3e70e9a7c1c1a0a2776e7dc7c8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Feb 10 09:43:05 2018 +0800

    make.sh: add subcomand "map" and ".config"
    
    Example:
            ./make.sh evb-px30 map          ---- edit System.map
            ./make.sh evb-px30 .config      ---- edit .config
    
    Change-Id: Iba731a07a4da9cd56c2099237620358dc4967315
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index d08025be87..0779c4e9c2 100755
--- a/make.sh
+++ b/make.sh
@@ -100,7 +100,7 @@ sub_commands()
 	if [ "$SUBCMD" = 'clean' -o "$SUBCMD" = 'distclean' -o "$SUBCMD" = 'mrproper' ]; then
 		make $SUBCMD O=${DSTDIR}/out
 		exit 0
-	elif [ ${elf} = 'elf' ]; then
+	elif [ "$elf" = 'elf' ]; then
 		if [ ! -f ${DSTDIR}/out/u-boot ]; then
 			echo "Can't find elf file: ${DSTDIR}/out/u-boot"
 			exit 1
@@ -113,6 +113,22 @@ sub_commands()
 			${TOOLCHAIN_OBJDUMP} -${opt} ${DSTDIR}/out/u-boot | less
 			exit 0
 		fi
+	elif [ "$SUBCMD" = 'map' ]; then
+		if [ ! -f ${DSTDIR}/out/System.map ]; then
+			echo "Can't find map file: ${DSTDIR}/out/System.map"
+			exit 1
+		else
+			vim ${DSTDIR}/out/System.map
+			exit 0
+		fi
+	elif [ "$SUBCMD" = '.config' ]; then
+		if [ ! -f ${DSTDIR}/out/.config ]; then
+			echo "Can't find .config file: ${DSTDIR}/out/.config"
+			exit 1
+		else
+			vim ${DSTDIR}/out/.config
+			exit 0
+		fi
 	fi
 }
 

commit d8540eac213b7101de3570c0b99a2d28e687472c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Feb 9 16:25:03 2018 +0800

    make.sh: update gcc toolchain to version 6.3.1
    
    32-bit: gcc-linaro-6.3.1-2017.05-x86_64_arm-linux-gnueabihf
    64-bit: gcc-linaro-6.3.1-2017.05-x86_64_aarch64-linux-gnu
    
    Change-Id: Iafe288a640ed61362fda4845ca169b677c6b7e35
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 9324abe09f..d08025be87 100755
--- a/make.sh
+++ b/make.sh
@@ -17,13 +17,13 @@ RKBIN_TOOLS=../rkbin/tools
 TOOLCHAIN_GCC=./
 TOOLCHAIN_OBJDUMP=./
 # GCC toolchain
-GCC_ARM32=arm-linux-androideabi-
-GCC_ARM64=aarch64-linux-android-
-TOOLCHAIN_ARM32=../prebuilts/gcc/linux-x86/arm/arm-linux-androideabi-4.9/bin
-TOOLCHAIN_ARM64=../prebuilts/gcc/linux-x86/aarch64/aarch64-linux-android-4.9/bin
+GCC_ARM32=arm-linux-gnueabihf-
+GCC_ARM64=aarch64-linux-gnu-
+TOOLCHAIN_ARM32=../prebuilts/gcc/linux-x86/arm/gcc-linaro-6.3.1-2017.05-x86_64_arm-linux-gnueabihf/bin
+TOOLCHAIN_ARM64=../prebuilts/gcc/linux-x86/aarch64/gcc-linaro-6.3.1-2017.05-x86_64_aarch64-linux-gnu/bin
 # OBJDMP
-OBJ_ARM32=arm-linux-androideabi-objdump
-OBJ_ARM64=aarch64-linux-android-objdump
+OBJ_ARM32=arm-linux-gnueabihf-objdump
+OBJ_ARM64=aarch64-linux-gnu-objdump
 
 prepare()
 {

commit 0291804aa731f13afa5d74caa30ffaeccc3b181c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Feb 9 17:03:16 2018 +0800

    bootm-fdt: fix compile warning
    
    Change-Id: Idc1af16d966d19921cf19c233bab0cd35337e8ae
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/lib/bootm-fdt.c b/arch/arm/lib/bootm-fdt.c
index d6bb3031d7..39c0c8d566 100644
--- a/arch/arm/lib/bootm-fdt.c
+++ b/arch/arm/lib/bootm-fdt.c
@@ -42,10 +42,10 @@ int arch_fixup_fdt(void *blob)
 	u64 size[CONFIG_NR_DRAM_BANKS];
 
 	for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
-		if (size[bank] == 0)
-			continue;
 		start[bank] = bd->bi_dram[bank].start;
 		size[bank] = bd->bi_dram[bank].size;
+		if (size[bank] == 0)
+			continue;
 		printf("Adding bank: start=0x%08lx, size=0x%08lx\n",
 		       gd->bd->bi_dram[bank].start, gd->bd->bi_dram[bank].size);
 

commit 9af1ce3cfadb95a1396c0d7205ba2d6a1e5cfea7
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sun Feb 11 11:21:38 2018 +0800

    rockchip: dts: px30: enable nandc in pre-reloc
    
    Change-Id: I78224188bc2a54a5a0fc11d2c002f4600e6a8d9c
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/px30-u-boot.dtsi b/arch/arm/dts/px30-u-boot.dtsi
index be9e5e23d2..bcd74f8240 100644
--- a/arch/arm/dts/px30-u-boot.dtsi
+++ b/arch/arm/dts/px30-u-boot.dtsi
@@ -11,6 +11,11 @@
 	status = "okay";
 };
 
+&nandc0 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 &emmc {
 	u-boot,dm-pre-reloc;
 };

commit 5e5c11fefa1a470efc05c24ae53775d63a35cb56
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sun Feb 11 10:48:32 2018 +0800

    rockchip: px30: defconfig: clean config with make savedefconfig
    
    Change-Id: Id032b304c4b071c10c841a9b4af4244bd3c2dafe
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 117ae87e64..5e33d6f9be 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -1,81 +1,58 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
-CONFIG_ROCKCHIP_RESOURCE_IMAGE=y
-CONFIG_RKIMG_BOOTLOADER=y
-CONFIG_CMD_BOOT_ROCKCHIP=y
-CONFIG_RKPARM_PARTITION=y
-CONFIG_SPL_LIBCOMMON_SUPPORT=y
-CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
-CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 CONFIG_ROCKCHIP_PX30=y
-CONFIG_TARGET_EVB_PX30=y
-CONFIG_TPL_SERIAL_PRESENT=y
-CONFIG_TPL_LIBCOMMON_SUPPORT=y
-CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
-CONFIG_SPL_STACK_R_ADDR=0x600000
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_TARGET_EVB_PX30=y
 CONFIG_DEFAULT_DEVICE_TREE="px30-evb"
 CONFIG_DEBUG_UART=y
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 # CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
-CONFIG_SPL_LOAD_FIT=y
+CONFIG_BOOTDELAY=5
 # CONFIG_DISPLAY_CPUINFO is not set
-CONFIG_ANDROID_BOOTLOADER=y
-CONFIG_TPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_ATF_SUPPORT=y
-CONFIG_TPL=y
-CONFIG_TPL_BOOTROM_SUPPORT=y
-CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_TPL_SERIAL_PRESENT=y
-CONFIG_FASTBOOT=y
-CONFIG_USB_FUNCTION_FASTBOOT=y
-CONFIG_CMD_FASTBOOT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_BUF_SIZE=0x08000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
-CONFIG_CMD_LOAD_ANDROID=y
-CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 # CONFIG_CMD_SETEXPR is not set
-CONFIG_SPL_OF_CONTROL=y
-CONFIG_TPL_OF_CONTROL=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
-CONFIG_TPL_OF_PLATDATA=y
-CONFIG_TPL_DM=y
+CONFIG_RKPARM_PARTITION=y
 CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_REGMAP=y
-CONFIG_SPL_REGMAP=y
-CONFIG_TPL_REGMAP=y
 CONFIG_SYSCON=y
-CONFIG_SPL_SYSCON=y
-CONFIG_TPL_SYSCON=y
 CONFIG_CLK=y
-CONFIG_SPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_RK8XX_PWRKEY=y
+CONFIG_ADC_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PINCTRL=y
+CONFIG_DM_FUEL_GAUGE=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_DM_CHARGE_DISPLAY=y
 CONFIG_RAM=y
 CONFIG_DM_RESET=y
-CONFIG_SPL_RAM=y
-CONFIG_TPL_RAM=y
-CONFIG_BOOTDELAY=0
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF160000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_DEBUG_UART_SKIP_INIT=y
-CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
-CONFIG_SPL_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
@@ -86,19 +63,3 @@ CONFIG_G_DNL_PRODUCT_NUM=0x330d
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
-CONFIG_SARADC_ROCKCHIP=y
-CONFIG_DM_KEY=y
-CONFIG_ADC_KEY=y
-CONFIG_ROCKCHIP_GPIO=y
-CONFIG_SYS_I2C_ROCKCHIP=y
-CONFIG_PINCTRL=y
-CONFIG_RK8XX_PWRKEY=y
-CONFIG_DM_PMIC=y
-CONFIG_PMIC_RK8XX=y
-CONFIG_REGULATOR_PWM=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_REGULATOR_RK8XX=y
-CONFIG_DM_REGULATOR=y
-CONFIG_DM_CHARGE_DISPLAY=y
-CONFIG_CHARGE_ANIMATION=y
-CONFIG_DM_FUEL_GAUGE=y

commit f4b2e9588321c290fa147358d844a175285949cb
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Feb 10 16:44:45 2018 +0800

    serial: ns16550: work around for rockchip kernel dtb support
    
    With kernel dtb support, serial ofnode not able to get cru phandle,
    do not return err because rockchip uart always get 24MHz clock.
    
    Change-Id: Ibd76eb553570cdf73a151c038432c0801cd3230f
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index c702304e79..89843cedd7 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -443,6 +443,10 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
 			plat->clock = err;
 	} else if (err != -ENOENT && err != -ENODEV && err != -ENOSYS) {
 		debug("ns16550 failed to get clock\n");
+#ifdef CONFIG_USING_KERNEL_DTB
+/* With kernel dtb support, serial ofnode not able to get cru phandle */
+		if(err != -EINVAL)
+#endif
 		return err;
 	}
 

commit 1e6866ec0b718be1c96e289041b05d7df72b9ac2
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Feb 10 16:43:19 2018 +0800

    rockchip: px30: fix grf reg base
    
    fix base addr to correct grf reg base.
    
    Change-Id: I71b1fc8c5ea9ea246290f79b73d3c6055b7ea017
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c
index 71cf3ce7f7..1655bf7726 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -31,18 +31,15 @@ static struct mm_region px30_mem_map[] = {
 
 struct mm_region *mem_map = px30_mem_map;
 
-#define SGRF_DDR_CON0 0x10150000
-
 int arch_cpu_init(void)
 {
 #ifdef CONFIG_SPL_BUILD
 	/* We do some SoC one time setting here. */
 	/* Disable the ddr secure region setting to make it non-secure */
-	rk_clrreg(SGRF_DDR_CON0, 0x4000);
 #endif
 	return 0;
 }
-#define GRF_BASE	0x11000000
+#define GRF_BASE	0xff140000
 void board_debug_uart_init(void)
 {
 static struct px30_grf * const grf = (void *)GRF_BASE;

commit 575777c587fdb37716bd5b31299cb252c65b89df
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Feb 10 16:41:01 2018 +0800

    rockchip: board: init uart iomux in board_init if no SPL support
    
    Rockchip may use miniloader instead of SPL, in this case, the iomux
    for uart intput is setting, we need to init it in boart_init().
    
    Change-Id: I1ad4fc8cef1aeb222c284dfaf5c2d34a3f1625dd
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 6cffaefe75..b1521e88b5 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <clk.h>
 #include <dm.h>
+#include <debug_uart.h>
 #include <ram.h>
 #include <syscon.h>
 #include <asm/io.h>
@@ -157,6 +158,9 @@ int board_init(void)
 {
 	int ret;
 
+#if !defined(CONFIG_SUPPORT_SPL)
+	board_debug_uart_init();
+#endif
 #ifdef CONFIG_USING_KERNEL_DTB
 	init_kernel_dtb();
 #endif

commit 15a7587bba2ffa33a2e08d02a707fe54b7e24d94
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Feb 10 17:43:12 2018 +0800

    rockchip: rk3128: add a dummy board_debug_uart_init()
    
    Change-Id: Ibb9698b52ee0926eed33198a62d111538022434e
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3128/rk3128.c b/arch/arm/mach-rockchip/rk3128/rk3128.c
index ef0ed3bcd4..3e5f6f6a47 100644
--- a/arch/arm/mach-rockchip/rk3128/rk3128.c
+++ b/arch/arm/mach-rockchip/rk3128/rk3128.c
@@ -37,3 +37,7 @@ int arch_cpu_init(void)
 
 	return 0;
 }
+
+void board_debug_uart_init(void)
+{
+}

commit 33f9288d653252c075c5d388b4903600773acc37
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Feb 10 15:28:38 2018 +0800

    rockchip: px30: defconfig: enable live dt
    
    Enable CONFIG_OF_LIVE for px30.
    Remove ENV_IS_IN_EMMC for we use ENV_IS_NOWHERE.
    
    Change-Id: I98d0372433e42e56b3c303d0a4b18c81f4103c37
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 4047cae04d..117ae87e64 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -50,8 +50,8 @@ CONFIG_SPL_OF_CONTROL=y
 CONFIG_TPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_TPL_OF_PLATDATA=y
-CONFIG_ENV_IS_IN_MMC=y
 CONFIG_TPL_DM=y
+CONFIG_OF_LIVE=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_TPL_REGMAP=y

commit 4203970b721d90b11cce0a33231b9538ef7d9f2d
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Feb 10 15:27:48 2018 +0800

    rockchip: clk: px30: convert to live dt api
    
    use live dt api to get cru base addr.
    
    Change-Id: I4abbcea1bc47c4e238898fb12181e44acf6ae310
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 9d8757bc8e..91c91fcea5 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -649,7 +649,7 @@ static int px30_clk_ofdata_to_platdata(struct udevice *dev)
 {
 	struct px30_clk_priv *priv = dev_get_priv(dev);
 
-	priv->cru = (struct px30_cru *)devfdt_get_addr(dev);
+	priv->cru = dev_read_addr_ptr(dev);
 
 	return 0;
 }

commit bfa332729442d7b79a980eff8760414c60754d80
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Feb 10 15:26:44 2018 +0800

    rockchip: dts: px30: enable cru in pre-relocate
    
    We need cru in pre-relocate for serial/mmc driver.
    
    Change-Id: I59eb8c27a9033838a52079e27c133c5b3d48c367
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/px30-u-boot.dtsi b/arch/arm/dts/px30-u-boot.dtsi
index 83b7f11bb7..be9e5e23d2 100644
--- a/arch/arm/dts/px30-u-boot.dtsi
+++ b/arch/arm/dts/px30-u-boot.dtsi
@@ -18,3 +18,7 @@
 &pmugrf {
 	u-boot,dm-pre-reloc;
 };
+
+&cru {
+	u-boot,dm-pre-reloc;
+};

commit f9bf27e6a5708e63cf19b5dbb2988d46adb9782a
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Feb 10 15:20:54 2018 +0800

    disk: part: add error handle for get partition fail
    
    System may fail to get partition table, return directly in this case.
    
    Change-Id: Ib61f800302aee23fbc362d0d68a5f42ab353a2f0
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/disk/part.c b/disk/part.c
index 1903a31abc..49cda42e09 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -650,6 +650,8 @@ int part_get_info_by_name(struct blk_desc *dev_desc, const char *name,
 	int i;
 
 	part_drv = part_driver_lookup_type(dev_desc);
+	if (!part_drv)
+		return -1;
 	for (i = 1; i < part_drv->max_entries; i++) {
 		ret = part_drv->get_info(dev_desc, i, info);
 		if (ret != 0) {

commit c4867301edbafedefb393d86b1d4281d6cd9f45f
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Feb 10 11:52:05 2018 +0800

    rockchip: clk: px30: fix compile warning
    
    Change-Id: Ib1b2821c507dc61699ef7744d74001e98e536631
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index d79833341f..9d8757bc8e 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -32,9 +32,7 @@ enum {
 	.refdiv = _refdiv,\
 	.fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ),\
 	.postdiv1 = _postdiv1, .postdiv2 = _postdiv2};
-static const struct pll_div apll_init_cfg = PLL_DIVISORS(APLL_HZ, 1, 3, 1);
 static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 1, 4, 1);
-static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 2, 2, 1);
 
 static const struct pll_div apll_816_cfg = PLL_DIVISORS(816 * MHz, 1, 2, 1);
 static const struct pll_div apll_600_cfg = PLL_DIVISORS(600 * MHz, 1, 3, 1);
@@ -113,7 +111,7 @@ static void rkclk_init(struct px30_cru *cru)
 		     PLLMUX_FROM_XIN24M << GPLL_MODE_SHIFT);
 
 	/* init pll */
-	rkclk_set_pll(&cru->pll[0] , &apll_816_cfg);
+	rkclk_set_pll(&cru->pll[0] , apll_cfgs[APLL_816_MHZ]);
 	rkclk_set_pll(&cru->gpll, &gpll_init_cfg);
 
 	/*
@@ -274,7 +272,7 @@ static ulong px30_mmc_set_clk(struct px30_cru *cru,
 	int src_clk_div;
 	u32 con_id;
 
-	debug("%s %d %d\n", __func__, clk_id, set_rate);
+	debug("%s %ld %ld\n", __func__, clk_id, set_rate);
 	switch (clk_id) {
 	case HCLK_SDMMC:
 	case SCLK_SDMMC:
@@ -478,7 +476,7 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate)
 	struct px30_clk_priv *priv = dev_get_priv(clk->dev);
 	ulong ret = 0;
 
-	debug("%s %d %d\n", __func__, clk->id, rate);
+	debug("%s %ld %ld\n", __func__, clk->id, rate);
 	switch (clk->id) {
 	case 0 ... 15:
 		return 0;
@@ -509,7 +507,6 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate)
 		return -ENOENT;
 	}
 
-	debug("%s %d\n", __func__, ret);
 	return ret;
 }
 

commit 6d284848847f3c4179d96bc6b6cd1672a9590ca8
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Sat Feb 10 09:48:03 2018 +0800

    rockchip: rk3229: config: boot_android suport ab and avb
    
    add these configs:
    1,CONFIG_RK_AVB_LIBAVB_USER
    2,CONFIG_ANDROID_AB
    3,CONFIG_ANDROID_AVB
    
    Change-Id: I707780021b90ab6386cf39939f45be6fdb11ceaf
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/gva-rk3229_defconfig b/configs/gva-rk3229_defconfig
index ac9dd3c4ed..d54c2028db 100644
--- a/configs/gva-rk3229_defconfig
+++ b/configs/gva-rk3229_defconfig
@@ -80,4 +80,7 @@ CONFIG_AVB_LIBAVB=y
 CONFIG_AVB_LIBAVB_AB=y
 CONFIG_AVB_LIBAVB_ATX=y
 CONFIG_AVB_LIBAVB_USER=y
+CONFIG_RK_AVB_LIBAVB_USER=y
 CONFIG_OPTEE_CLIENT=y
+CONFIG_ANDROID_AB=y
+CONFIG_ANDROID_AVB=y

commit 99ff1ad0c6b513340aca706087f84771ec4e683c
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jan 29 19:51:59 2018 +0800

    lib: avb: fix compile warning
    
    Change-Id: I0cdddc0da44a839371fd8b6d6402053e505976fd
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/lib/avb/rk_avb_user/rk_avb_ops_user.c b/lib/avb/rk_avb_user/rk_avb_ops_user.c
index 64ff648ed1..9b04ecbd98 100644
--- a/lib/avb/rk_avb_user/rk_avb_ops_user.c
+++ b/lib/avb/rk_avb_user/rk_avb_ops_user.c
@@ -167,8 +167,8 @@ int rk_avb_read_flash_lock_state(uint8_t *flash_lock_state)
 		}
 
 		ret = trusty_read_flash_lock_state(flash_lock_state);
-		if (ret == 0)
-			return 0;
+
+		return ret;
 	} else if (ret == 0) {
 		return 0;
 	} else {
@@ -222,8 +222,8 @@ int rk_avb_read_lock_state(uint8_t *lock_state)
 		}
 
 		ret = trusty_read_lock_state(lock_state);
-		if (ret == 0)
-			return 0;
+
+		return ret;
 	} else if (ret == 0) {
 		return 0;
 	} else {
@@ -263,8 +263,8 @@ int rk_avb_read_perm_attr_flag(uint8_t *flag)
 		}
 
 		ret = trusty_read_permanent_attributes_flag(flag);
-		if (ret == 0)
-			return 0;
+
+		return ret;
 	} else if (ret == 0) {
 		return 0;
 	} else {

commit b666ac0523ace7caf88c8ef462e9583767b0a05c
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jan 29 15:36:21 2018 +0800

    android: support android verified boot(AVB)
    
    Define CONFIG_ANDROID_AVB to open avb.
    
    Change-Id: Iae0306391e403b25aa454205dd5a70a578752aba
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/Kconfig b/common/Kconfig
index 20f97ed8bc..5172bb3346 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -583,6 +583,15 @@ config ANDROID_AB
 	  allows a bootloader to try a new version of the system but roll back
 	  to previous version if the new one didn't boot all the way.
 
+config ANDROID_AVB
+	bool"Support Android Verified Boot"
+	default n
+	help
+	  If enabled, adds support the android verified boot. The avb get the
+	  digital signature and key from vemeta. Then use the RSA2048 and sha256
+	  to verify the boot images. The vbmeta must be matched with images,
+	  if not, verify failed.
+
 config ANDROID_BOOT_IMAGE
 	bool "Enable support for Android Boot Images"
 	help
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index a6e9591923..2d9adec2d6 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -6,6 +6,7 @@
 
 #include <android_bootloader.h>
 #include <android_bootloader_message.h>
+#include <android_avb/avb_slot_verify.h>
 #include <android_avb/avb_ops_user.h>
 #include <android_avb/rk_avb_ops_user.h>
 
@@ -354,11 +355,96 @@ char *android_assemble_cmdline(const char *slot_suffix,
 	return cmdline;
 }
 
+static void slot_set_unbootable(AvbABSlotData* slot)
+{
+	slot->priority = 0;
+	slot->tries_remaining = 0;
+	slot->successful_boot = 0;
+}
+
+#ifdef CONFIG_ANDROID_AVB
+static AvbSlotVerifyResult android_slot_verify(char *boot_partname,
+			       unsigned long load_address,
+			       char *slot_suffix)
+{
+	const char *requested_partitions[1] = {NULL};
+	uint8_t unlocked = true;
+	AvbOps *ops;
+	AvbSlotVerifyFlags flags;
+	AvbSlotVerifyData *slot_data[1] = {NULL};
+	AvbSlotVerifyResult verify_result;
+	AvbABData ab_data, ab_data_orig;
+	size_t slot_index_to_boot = 0;
+
+	requested_partitions[0] = boot_partname;
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+	}
+
+	if (ops->read_is_device_unlocked(ops, (bool *)&unlocked) != AVB_IO_RESULT_OK)
+		printf("Error determining whether device is unlocked.\n");
+
+	printf("read_is_device_unlocked() ops returned that device is %s\n",
+	       (unlocked & LOCK_MASK)? "UNLOCKED" : "LOCKED");
+
+	flags = AVB_SLOT_VERIFY_FLAGS_NONE;
+	if (unlocked & LOCK_MASK)
+		flags |= AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR;
+
+	if(load_metadata(ops->ab_ops, &ab_data, &ab_data_orig)) {
+		printf("Can not load metadata\n");
+		return AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+	}
+
+	if (strncmp(slot_suffix, "_a", 2))
+		slot_index_to_boot = 0;
+	else if(strncmp(slot_suffix, "_b", 2))
+		slot_index_to_boot = 1;
+	else
+		slot_index_to_boot = 0;
+
+	verify_result =
+	avb_slot_verify(ops,
+			requested_partitions,
+			slot_suffix,
+			flags,
+			AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE,
+			&slot_data[0]);
+
+	if (verify_result != AVB_SLOT_VERIFY_RESULT_OK) {
+		slot_set_unbootable(&ab_data.slots[slot_index_to_boot]);
+		goto out;
+	}
+
+	memcpy((uint8_t*)load_address,
+	       slot_data[0]->loaded_partitions->data,
+	       slot_data[0]->loaded_partitions->data_size);
+	env_set("bootargs", slot_data[0]->cmdline);
+
+	/* ... and decrement tries remaining, if applicable. */
+	if (!ab_data.slots[slot_index_to_boot].successful_boot &&
+		ab_data.slots[slot_index_to_boot].tries_remaining > 0) {
+		ab_data.slots[slot_index_to_boot].tries_remaining -= 1;
+	}
+out:
+	if (save_metadata_if_changed(ops->ab_ops, &ab_data, &ab_data_orig)) {
+		printf("Can not save metadata\n");
+		verify_result = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+	}
+
+	if (slot_data[0] != NULL)
+		avb_slot_verify_data_free(slot_data[0]);
+
+	return verify_result;
+}
+#endif
+
 int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 				 unsigned long load_address)
 {
 	enum android_boot_mode mode;
-	disk_partition_t boot_part_info;
 	disk_partition_t misc_part_info;
 	int part_num;
 	int ret;
@@ -416,10 +502,15 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	}
 #endif
 
+#ifdef CONFIG_ANDROID_AVB
+	if (android_slot_verify(boot_partname, load_address, slot_suffix))
+		return -1;
+#else
 	/*
 	 * 2. Load the boot/recovery from the desired "boot" partition.
 	 * Determine if this is an AOSP image.
 	 */
+	disk_partition_t boot_part_info;
 	part_num =
 	    android_part_get_info_by_name_suffix(dev_desc,
 						 boot_partname,
@@ -438,6 +529,7 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 		printf("%s %s part load fail\n", __func__, boot_part_info.name);
 		return ret;
 	}
+#endif
 
 	/* Set Android root variables. */
 	env_set_ulong("android_root_devnum", dev_desc->devnum);
@@ -445,7 +537,7 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 
 	/* Assemble the command line */
 	command_line = android_assemble_cmdline(slot_suffix, mode_cmdline);
-	env_set("bootargs", command_line);
+	env_update("bootargs", command_line);
 
 	debug("ANDROID: bootargs: \"%s\"\n", command_line);
 

commit 187a5bc522f5681becdd2016168e441e21b6ed32
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jan 29 15:25:44 2018 +0800

    lib: avb: declare some functions externally
    
    1. extern load_metadata
    2. extern save_metadata_if_changed
    
    Change-Id: I3afe604c39a5f7cf31a0a28d7cc939da51295c10
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/android_avb/avb_ab_flow.h b/include/android_avb/avb_ab_flow.h
index f6aca9b0fa..0ba5ccd47c 100644
--- a/include/android_avb/avb_ab_flow.h
+++ b/include/android_avb/avb_ab_flow.h
@@ -256,6 +256,20 @@ AvbIOResult avb_ab_mark_slot_unbootable(AvbABOps* ab_ops,
 AvbIOResult avb_ab_mark_slot_successful(AvbABOps* ab_ops,
                                         unsigned int slot_number);
 
+/*
+ * Load metadata.
+ */
+AvbIOResult load_metadata(AvbABOps* ab_ops,
+			  AvbABData* ab_data,
+			  AvbABData* ab_data_orig);
+
+/* Writes A/B metadata to disk only if it has changed - returns
+ * AVB_IO_RESULT_OK on success, error code otherwise.
+ */
+AvbIOResult save_metadata_if_changed(AvbABOps* ab_ops,
+				     AvbABData* ab_data,
+				     AvbABData* ab_data_orig);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/lib/avb/libavb_ab/avb_ab_flow.c b/lib/avb/libavb_ab/avb_ab_flow.c
index 55f0a04065..7ed1ab9107 100644
--- a/lib/avb/libavb_ab/avb_ab_flow.c
+++ b/lib/avb/libavb_ab/avb_ab_flow.c
@@ -168,7 +168,7 @@ static const char* slot_suffixes[2] = {"_a", "_b"};
 /* Helper function to load metadata - returns AVB_IO_RESULT_OK on
  * success, error code otherwise.
  */
-static AvbIOResult load_metadata(AvbABOps* ab_ops,
+AvbIOResult load_metadata(AvbABOps* ab_ops,
                                  AvbABData* ab_data,
                                  AvbABData* ab_data_orig) {
   AvbIOResult io_ret;
@@ -192,7 +192,7 @@ static AvbIOResult load_metadata(AvbABOps* ab_ops,
 /* Writes A/B metadata to disk only if it has changed - returns
  * AVB_IO_RESULT_OK on success, error code otherwise.
  */
-static AvbIOResult save_metadata_if_changed(AvbABOps* ab_ops,
+AvbIOResult save_metadata_if_changed(AvbABOps* ab_ops,
                                             AvbABData* ab_data,
                                             AvbABData* ab_data_orig) {
   if (avb_safe_memcmp(ab_data, ab_data_orig, sizeof(AvbABData)) != 0) {

commit 8f254cea36a5cc9746af8c913137ab2778f39bbc
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jan 26 17:34:33 2018 +0800

    android: change enter recovery and a/b mode
    
    Choose which partition to enter recovery and a/b depend
    on CONFIG_ANDROID_AB.
    
    Change-Id: I10d03f1c592702f857e6224566deea3a4d607788
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index b0b26987ff..a6e9591923 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -393,7 +393,7 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 		/* In recovery mode we still boot the kernel from "boot" but
 		 * don't skip the initramfs so it boots to recovery.
 		 */
-#ifndef CONFIG_RK_AVB_LIBAVB_USER
+#ifndef CONFIG_ANDROID_AB
 		boot_partname = ANDROID_PARTITION_RECOVERY;
 #endif
 		break;
@@ -405,10 +405,15 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 		return android_bootloader_boot_bootloader();
 	}
 
-#ifdef CONFIG_RK_AVB_LIBAVB_USER
+#ifdef CONFIG_ANDROID_AB
 	/*TODO: get from pre-loader or misc partition*/
 	if (rk_avb_get_current_slot(slot_suffix))
 		return -1;
+
+	if (slot_suffix[0] != '_') {
+		printf("There is no bootable slot!\n");
+		return -1;
+	}
 #endif
 
 	/*

commit 459bc93392ed13d7d5ee9fe03bb3e4dab27f6ce4
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jan 26 17:27:15 2018 +0800

    lib: avb: get the dev_desc by function rockchip_get_bootdev
    
    Change-Id: I62211b54b0efc11e232d9473a9f566c9fa82b3d8
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/lib/avb/libavb_user/avb_ops_user.c b/lib/avb/libavb_user/avb_ops_user.c
index 959044a931..c7263be901 100644
--- a/lib/avb/libavb_user/avb_ops_user.c
+++ b/lib/avb/libavb_user/avb_ops_user.c
@@ -40,6 +40,7 @@
 #include <optee_include/tee_api_defines.h>
 #include <android_avb/avb_vbmeta_image.h>
 #include <android_avb/avb_atx_validate.h>
+#include <boot_rkimg.h>
 
 static void byte_to_block(int64_t *offset,
 			  size_t *num_bytes,
@@ -74,16 +75,14 @@ static AvbIOResult read_from_partition(AvbOps* ops,
                                        void* buffer,
                                        size_t* out_num_read)
 {
-	char *dev_iface = "mmc";
-	int dev_num = 0;
 	struct blk_desc *dev_desc;
 	lbaint_t offset_blk, blkcnt;
 	disk_partition_t part_info;
 
 	byte_to_block(&offset, &num_bytes, &offset_blk, &blkcnt);
-	dev_desc = blk_get_dev(dev_iface, dev_num);
+	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {
-		printf("Could not find %s %d\n", dev_iface, dev_num);
+		printf("%s: Could not find device\n", __func__);
 		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
 	}
 
@@ -117,8 +116,6 @@ static AvbIOResult write_to_partition(AvbOps* ops,
                                       size_t num_bytes,
                                       const void* buffer)
 {
-	const char *dev_iface = "mmc";
-	int dev_num = 0;
 	struct blk_desc *dev_desc;
 	char *buffer_temp;
 	disk_partition_t part_info;
@@ -131,9 +128,9 @@ static AvbIOResult write_to_partition(AvbOps* ops,
 		return AVB_IO_RESULT_ERROR_OOM;
 	}
 	memset(buffer_temp, 0, 512 * blkcnt);
-	dev_desc = blk_get_dev(dev_iface, dev_num);
+	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {
-		printf("Could not find %s %d\n", dev_iface, dev_num);
+		printf("%s: Could not find device\n", __func__);
 		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
 	}
 
@@ -270,14 +267,12 @@ static AvbIOResult get_size_of_partition(AvbOps *ops,
                                          const char *partition,
                                          uint64_t *out_size_in_bytes)
 {
-	const char *dev_iface = "mmc";
-	int dev_num = 0;
 	struct blk_desc *dev_desc;
 	disk_partition_t part_info;
 
-	dev_desc = blk_get_dev(dev_iface, dev_num);
+	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {
-		printf("Could not find %s %d\n", dev_iface, dev_num);
+		printf("%s: Could not find device\n", __func__);
 		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
 	}
 
@@ -294,13 +289,11 @@ static AvbIOResult get_unique_guid_for_partition(AvbOps *ops,
                                                  char *guid_buf,
                                                  size_t guid_buf_size)
 {
-	const char *dev_iface = "mmc";
-	int dev_num = 0;
 	struct blk_desc *dev_desc;
 	disk_partition_t part_info;
-	dev_desc = blk_get_dev(dev_iface, dev_num);
+	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {
-		printf("Could not find %s %d\n", dev_iface, dev_num);
+		printf("%s: Could not find device\n", __func__);
 		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
 	}
 
diff --git a/lib/avb/rk_avb_user/rk_avb_ops_user.c b/lib/avb/rk_avb_user/rk_avb_ops_user.c
index f4a7559ec5..64ff648ed1 100644
--- a/lib/avb/rk_avb_user/rk_avb_ops_user.c
+++ b/lib/avb/rk_avb_user/rk_avb_ops_user.c
@@ -23,6 +23,7 @@
 #include <android_avb/avb_vbmeta_image.h>
 #include <android_avb/avb_atx_validate.h>
 #include <android_avb/rk_avb_ops_user.h>
+#include <boot_rkimg.h>
 
 /* rk used */
 int rk_avb_read_slot_count(char *slot_count)
@@ -634,14 +635,12 @@ int rk_avb_get_part_has_slot_info(const char *base_name)
 	int part_num;
 	size_t part_name_len;
 	disk_partition_t part_info;
-	const char *dev_iface = "mmc";
 	struct blk_desc *dev_desc;
-	int dev_num = 0;
 	const char *slot_suffix = "_a";
 
-	dev_desc = blk_get_dev(dev_iface, dev_num);
+	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {
-		printf("Could not find %s %d\n", dev_iface, dev_num);
+		printf("%s: Could not find device!\n", __func__);
 		return -1;
 	}
 

commit 37a7bc39c0a3beca986e8c1c85d1dd6b9921e313
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jan 26 16:38:05 2018 +0800

    lib: avb: update and modify the avb library
    
    The commit point is updated to google external/avb/
    which commit point is cf8c56208d2d9643804a7f123b196c7ebc9af276.
    
    Change-Id: I5a10a8a45d3e9e2c9d20d9b3d44946073c9a49ff
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/cmd/boot_android.c b/cmd/boot_android.c
index a9c195ae0b..5df2e9b270 100644
--- a/cmd/boot_android.c
+++ b/cmd/boot_android.c
@@ -14,6 +14,7 @@
 #include <bootm.h>
 #include <command.h>
 #include <android_bootloader_message.h>
+#include <android_avb/rk_avb_ops_user.h>
 
 static int do_boot_android(cmd_tbl_t *cmdtp, int flag, int argc,
 			   char * const argv[])
@@ -73,7 +74,7 @@ U_BOOT_CMD(
 	"      the partition table. This is commonly the \"misc\" partition.\n"
 );
 
-#ifdef CONFIG_AVB_LIBAVB_USER
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
 static int bootloader_message_read(struct android_bootloader_message *data)
 {
 	AvbOps *ops;
@@ -145,8 +146,7 @@ int do_avb_init_ab_metadata(cmd_tbl_t *cmdtp, int flag,
 		return CMD_RET_FAILURE;
 	}
 
-	ops->ab_ops->init_ab_metadata(&ab_data);
-	debug("init");
+	avb_ab_data_init(&ab_data);
 	if (ops->ab_ops->write_ab_metadata(ops->ab_ops, &ab_data) != 0) {
 		printf("do_avb_init_ab_metadata error!\n");
 		avb_ops_user_free(ops);
@@ -516,38 +516,6 @@ int do_avb_write(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return CMD_RET_SUCCESS;
 }
 
-int do_avb_load_ab_metadata(cmd_tbl_t *cmdtp, int flag,
-			    int argc, char * const argv[])
-{
-	AvbOps *ops;
-	AvbABData ab_data, ab_data_orig;
-	char *data;
-	int i;
-
-	if (argc != 1)
-		return CMD_RET_USAGE;
-
-	ops = avb_ops_user_new();
-	if (ops == NULL) {
-		printf("avb_ops_user_new() failed!\n");
-		return CMD_RET_FAILURE;
-	}
-
-	if (load_metadata(ops->ab_ops, &ab_data, &ab_data_orig) != 0) {
-		printf("do_avb_write_ab_metadata error!\n");
-		avb_ops_user_free(ops);
-		return CMD_RET_FAILURE;
-	}
-
-	data = (char *)&ab_data;
-	for (i = 0; i < 33; i++)
-		printf("%d\n", data[i]);
-
-	avb_ops_user_free(ops);
-
-	return CMD_RET_SUCCESS;
-}
-
 int do_avb_read_ab_metadata(cmd_tbl_t *cmdtp, int flag,
 			    int argc, char * const argv[])
 {
@@ -643,9 +611,10 @@ int do_avb_flow(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	AvbSlotVerifyFlags flags;
 	const char *requested_partitions[] = {"boot", "system", NULL};
 	char *command_line;
-	bool unlocked = true;
+	bool unlocked;
 	const char *mode_cmdline = NULL;
 	char root_data[70] = "root=PARTUUID=";
+	char *vboot_state = "androidboot.verifiedbootstate=";
 	char avb_root_data[2000] = {0};
 	size_t guid_buf_size = 37;
 	char guid_buf[37];
@@ -653,6 +622,7 @@ int do_avb_flow(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	char boot_slot_select[5];
 	struct android_bootloader_message data;
 	const char *fastboot_cmd = env_get("fastbootcmd");
+	AvbABFlowResult ab_result;
 
 	if (argc != 2)
 		return CMD_RET_USAGE;
@@ -666,7 +636,7 @@ int do_avb_flow(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 			return run_command(fastboot_cmd, CMD_FLAG_ENV);
 		} else {
 			printf("The fastbootcmd is NULL!\n");
-			return CMD_RET_SUCCESS;
+			goto fail;
 		}
 	} else if (!strcmp("boot-recovery", data.command)) {
 		printf("Enter boot-recovery!\n");
@@ -691,11 +661,23 @@ int do_avb_flow(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	avb_version = avb_version_string();
 	printf("Android avb version is %s.\n", avb_version);
 	ops = avb_ops_user_new();
-	if (ops == NULL)
+	if (ops == NULL) {
 		printf("avb_ops_user_new() failed!\n");
+		goto fail;
+	}
 
-	if (ops->read_is_device_unlocked(ops, &unlocked) != 0)
+	if (ops->read_is_device_unlocked(ops, &unlocked) != 0) {
 		printf("Error determining whether device is unlocked.\n");
+		unlocked = ANDROID_VBOOT_UNLOCK;
+		if (ops->write_is_device_unlocked(ops, &unlocked) != 0) {
+			printf("Can not write lock state!\n");
+			unlocked = ANDROID_VBOOT_LOCK;
+		}
+		if (ops->read_is_device_unlocked(ops, &unlocked) != 0) {
+			printf("Can not read lock state!\n");
+			unlocked = ANDROID_VBOOT_LOCK;
+		}
+	}
 
 	printf("read_is_device_unlocked() ops returned that device is %s\n",
 	       unlocked ? "UNLOCKED" : "LOCKED");
@@ -707,15 +689,27 @@ int do_avb_flow(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	verify_flag = argv[1][0];
 	if (verify_flag == 'v') {
 		debug("start with verify!\n");
-		if (avb_ab_flow(ops->ab_ops,
+		ab_result =
+		    avb_ab_flow(ops->ab_ops,
 				requested_partitions,
 				flags,
 				AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE,
-				&slot_data)) {
-			avb_slot_verify_data_free(slot_data);
-			avb_ops_user_free(ops);
+				&slot_data);
+		if ((ab_result != AVB_AB_FLOW_RESULT_OK) &&
+		    (ab_result !=
+		    AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR)) {
 			printf("avb_ab_flow() error!\n");
-			return CMD_RET_FAILURE;
+			avb_ops_user_free(ops);
+			goto fail;
+		}
+
+		if (ab_result ==\
+		    AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR) {
+			strcat(avb_root_data, vboot_state);
+			strcat(avb_root_data, "orange");
+		} else if (ab_result == AVB_AB_FLOW_RESULT_OK) {
+			strcat(avb_root_data, vboot_state);
+			strcat(avb_root_data, "green");
 		}
 
 		command_line = android_assemble_cmdline(slot_data->ab_suffix,
@@ -726,16 +720,17 @@ int do_avb_flow(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 		strcat(avb_root_data, slot_data->cmdline);
 		env_set("bootargs", avb_root_data);
 		load_address = CONFIG_SYS_LOAD_ADDR;
-		if (avb_close_optee_client())
+		if (rk_avb_close_optee_client())
 			printf("Can not close optee client!\n");
 
 		memcpy((uint8_t*)load_address,
 		       slot_data->loaded_partitions->data,
 		       slot_data->loaded_partitions->data_size);
 		android_bootloader_boot_kernel(load_address);
+		avb_ops_user_free(ops);
 	} else if (verify_flag == 'n') {
 		load_address = CONFIG_SYS_LOAD_ADDR;
-		avb_ab_slot_select(ops->ab_ops, boot_slot_select);
+		rk_avb_ab_slot_select(ops->ab_ops, boot_slot_select);
 		strcat(slot_partition[1], requested_partitions[1]);
 		strcat(slot_partition[1], boot_slot_select);
 		printf("%s\n", slot_partition[1]);
@@ -749,7 +744,12 @@ int do_avb_flow(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 		strcat(root_data, " ");
 		strcat(root_data, command_line);
 		env_set("bootargs", root_data);
-		android_avb_boot_flow(boot_slot_select, load_address);
+		if (android_avb_boot_flow(boot_slot_select, load_address)) {
+			printf("Cannot boot the system, goto the fastboot!\n");
+			avb_ops_user_free(ops);
+			goto fail;
+		}
+		avb_ops_user_free(ops);
 	} else if (verify_flag == 'o') {
 		load_address = CONFIG_SYS_LOAD_ADDR;
 		strcat(slot_partition[1], requested_partitions[1]);
@@ -763,12 +763,24 @@ int do_avb_flow(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 		strcat(root_data, " ");
 		strcat(root_data, command_line);
 		env_set("bootargs", root_data);
-		android_boot_flow(load_address);
+		if (android_boot_flow(load_address)) {
+			printf("Cannot boot the system, goto the fastboot!\n");
+			avb_ops_user_free(ops);
+			goto fail;
+		}
+		avb_ops_user_free(ops);
 	} else {
 		return CMD_RET_USAGE;
 	}
 
 	return CMD_RET_SUCCESS;
+fail:
+	if (fastboot_cmd == NULL) {
+		printf("fastboot_cmd is null, run default fastboot_cmd!\n");
+		fastboot_cmd = "fastboot usb 0";
+	}
+
+	return run_command(fastboot_cmd, CMD_FLAG_ENV);
 }
 
 static cmd_tbl_t cmd_avb[] = {
@@ -794,7 +806,6 @@ static cmd_tbl_t cmd_avb[] = {
 			 do_avb_get_get_unique_guid_for_partition, "", ""),
 	U_BOOT_CMD_MKENT(read, 4, 1, do_avb_read, "", ""),
 	U_BOOT_CMD_MKENT(write, 4, 1, do_avb_write, "", ""),
-	U_BOOT_CMD_MKENT(loadabmisc, 1, 1, do_avb_load_ab_metadata, "", ""),
 	U_BOOT_CMD_MKENT(readabmisc, 1, 1, do_avb_read_ab_metadata, "", ""),
 	U_BOOT_CMD_MKENT(writeabmisc, 1, 1, do_avb_write_ab_metadata, "", ""),
 	U_BOOT_CMD_MKENT(verify, 3, 1, do_avb_verify_partition, "", ""),
@@ -837,7 +848,6 @@ U_BOOT_CMD(
 	"bootavb part_guid partitions_name\n"
 	"bootavb read partition offset_blk cnt\n"
 	"bootavb write partition offset_blk cnt\n"
-	"bootavb loadabmisc\n"
 	"bootavb readabmisc\n"
 	"bootavb writeabmisc\n"
 	"bootavb verify partition slot_cnt;partion name without '_a' or '_b'\n"
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 1295e0215c..b0b26987ff 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -7,6 +7,7 @@
 #include <android_bootloader.h>
 #include <android_bootloader_message.h>
 #include <android_avb/avb_ops_user.h>
+#include <android_avb/rk_avb_ops_user.h>
 
 #include <cli.h>
 #include <common.h>
@@ -202,8 +203,8 @@ static int android_bootloader_get_fdt(const char *part_name,
 
 	memset(&boot_part_info, 0, sizeof(boot_part_info));
 
-#ifdef CONFIG_AVB_LIBAVB_USER
-	if (avb_get_current_slot(slot_suffix)) {
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
+	if (rk_avb_get_current_slot(slot_suffix)) {
 		printf("ANDROID: Get Current Slot error.\n");
 		return -1;
 	}
@@ -392,7 +393,7 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 		/* In recovery mode we still boot the kernel from "boot" but
 		 * don't skip the initramfs so it boots to recovery.
 		 */
-#ifndef CONFIG_AVB_LIBAVB_USER
+#ifndef CONFIG_RK_AVB_LIBAVB_USER
 		boot_partname = ANDROID_PARTITION_RECOVERY;
 #endif
 		break;
@@ -404,9 +405,9 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 		return android_bootloader_boot_bootloader();
 	}
 
-#ifdef CONFIG_AVB_LIBAVB_USER
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
 	/*TODO: get from pre-loader or misc partition*/
-	if (avb_get_current_slot(slot_suffix))
+	if (rk_avb_get_current_slot(slot_suffix))
 		return -1;
 #endif
 
diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 0bf1908a4b..007cdc3b3f 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -22,6 +22,7 @@
 #include <version.h>
 #include <g_dnl.h>
 #include <android_avb/avb_ops_user.h>
+#include <android_avb/rk_avb_ops_user.h>
 #ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV
 #include <fb_mmc.h>
 #endif
@@ -468,12 +469,12 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req)
 
 		strncat(response, uuid, chars_left);
 	} else if (!strcmp_l1("slot-count", cmd)) {
-#ifdef CONFIG_AVB_LIBAVB_USER
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
 		char slot_count[2];
 		char temp;
 
 		slot_count[1] = '\0';
-		avb_read_slot_count(&temp);
+		rk_avb_read_slot_count(&temp);
 		slot_count[0] = temp + 0x30;
 		strncat(response, slot_count, chars_left);
 #else
@@ -481,10 +482,10 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req)
 		return;
 #endif
 	} else if (!strcmp_l1("current-slot", cmd)) {
-#ifdef CONFIG_AVB_LIBAVB_USER
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
 		char slot_surrent[8] = {0};
 
-		if (!avb_get_current_slot(slot_surrent))
+		if (!rk_avb_get_current_slot(slot_surrent))
 			strncat(response, slot_surrent+1, chars_left);
 		else
 			strcpy(response, "FAILgeterror");
@@ -493,14 +494,14 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req)
 		return;
 #endif
 	} else if (!strcmp_l1("slot-suffixes", cmd)) {
-#ifdef CONFIG_AVB_LIBAVB_USER
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
 		char slot_suffixes_temp[4];
 		char slot_suffixes[9];
 		int slot_cnt = 0;
 
 		memset(slot_suffixes_temp, 0, 4);
 		memset(slot_suffixes, 0, 9);
-		avb_read_slot_suffixes(slot_suffixes_temp);
+		rk_avb_read_slot_suffixes(slot_suffixes_temp);
 		while (slot_suffixes_temp[slot_cnt] != '\0') {
 			slot_suffixes[slot_cnt * 2]
 				= slot_suffixes_temp[slot_cnt];
@@ -513,7 +514,7 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req)
 		return;
 #endif
 	} else if (!strncmp("has-slot", cmd, 8)) {
-#ifdef CONFIG_AVB_LIBAVB_USER
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
 		char *part_name = cmd;
 
 		cmd = strsep(&part_name, ":");
@@ -531,7 +532,7 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req)
 		return;
 #endif
 	} else if (!strncmp("slot-unbootable", cmd, 15)) {
-#ifdef CONFIG_AVB_LIBAVB_USER
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
 		char *slot_name = cmd;
 
 		cmd = strsep(&slot_name, ":");
@@ -546,7 +547,7 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req)
 		return;
 #endif
 	} else if (!strncmp("slot-successful", cmd, 15)) {
-#ifdef CONFIG_AVB_LIBAVB_USER
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
 		char *slot_name = cmd;
 
 		cmd = strsep(&slot_name, ":");
@@ -561,7 +562,7 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req)
 		return;
 #endif
 	} else if (!strncmp("slot-retry-count", cmd, 16)) {
-#ifdef CONFIG_AVB_LIBAVB_USER
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
 		char *slot_name = cmd;
 		char count[10] = {0};
 		static int cnt[2] = {0};
@@ -841,14 +842,14 @@ static void cb_set_active(struct usb_ep *ep, struct usb_request *req)
 		fastboot_tx_write_str("FAIL: missing slot name");
 		return;
 	}
-#ifdef CONFIG_AVB_LIBAVB_USER
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
 	unsigned int slot_number;
 	if (strncmp("a", cmd, 1) == 0) {
 		slot_number = 0;
-		avb_set_slot_active(&slot_number);
+		rk_avb_set_slot_active(&slot_number);
 	} else if (strncmp("b", cmd, 1) == 0) {
 		slot_number = 1;
-		avb_set_slot_active(&slot_number);
+		rk_avb_set_slot_active(&slot_number);
 	} else {
 		fastboot_tx_write_str("FAIL: unkown slot name");
 		return;
@@ -867,10 +868,10 @@ static void cb_flash(struct usb_ep *ep, struct usb_request *req)
 {
 	char *cmd = req->buf;
 	char response[FASTBOOT_RESPONSE_LEN] = {0};
-#ifdef CONFIG_AVB_LIBAVB_USER
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
 	uint8_t flash_lock_state;
 
-	if (avb_read_flash_lock_state(&flash_lock_state)) {
+	if (rk_avb_read_flash_lock_state(&flash_lock_state)) {
 		fastboot_tx_write_str("FAIL");
 		return;
 	}
@@ -905,10 +906,10 @@ static void cb_flashing(struct usb_ep *ep, struct usb_request *req)
 	char *cmd = req->buf;
 
 	if (strncmp("lock", cmd + 9, 4) == 0) {
-#ifdef CONFIG_AVB_LIBAVB_USER
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
 		uint8_t flash_lock_state;
 		flash_lock_state = 0;
-		if (avb_write_flash_lock_state(flash_lock_state))
+		if (rk_avb_write_flash_lock_state(flash_lock_state))
 			fastboot_tx_write_str("FAIL");
 		else
 			fastboot_tx_write_str("OKAY");
@@ -916,10 +917,10 @@ static void cb_flashing(struct usb_ep *ep, struct usb_request *req)
 		fastboot_tx_write_str("FAILnot implemented");
 #endif
 	} else if (strncmp("unlock", cmd + 9, 6) == 0) {
-#ifdef CONFIG_AVB_LIBAVB_USER
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
 		uint8_t flash_lock_state;
 		flash_lock_state = 1;
-		if (avb_write_flash_lock_state(flash_lock_state))
+		if (rk_avb_write_flash_lock_state(flash_lock_state))
 			fastboot_tx_write_str("FAIL");
 		else
 			fastboot_tx_write_str("OKAY");
@@ -998,10 +999,10 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 		return;
 #endif
 	} else if (strncmp("at-lock-vboot", cmd + 4, 13) == 0) {
-#ifdef CONFIG_AVB_LIBAVB_USER
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
 		uint8_t lock_state;
 		lock_state = 0;
-		if (avb_write_lock_state(lock_state))
+		if (rk_avb_write_lock_state(lock_state))
 			fastboot_tx_write_str("FAIL");
 		else
 			fastboot_tx_write_str("OKAY");
@@ -1009,15 +1010,15 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 		fastboot_tx_write_str("FAILnot implemented");
 #endif
 	} else if (strncmp("at-unlock-vboot", cmd + 4, 15) == 0) {
-#ifdef CONFIG_AVB_LIBAVB_USER
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
 		uint8_t lock_state;
-		if (avb_read_lock_state(&lock_state))
+		if (rk_avb_read_lock_state(&lock_state))
 			fastboot_tx_write_str("FAIL");
 		if (lock_state >> 1 == 1) {
 			fastboot_tx_write_str("FAILThe vboot is disable!");
 		} else {
 			lock_state = 1;
-			if (avb_write_lock_state(lock_state))
+			if (rk_avb_write_lock_state(lock_state))
 				fastboot_tx_write_str("FAIL");
 			else
 				fastboot_tx_write_str("OKAY");
@@ -1026,10 +1027,10 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 		fastboot_tx_write_str("FAILnot implemented");
 #endif
 	} else if (strncmp("at-disable-unlock-vboot", cmd + 4, 23) == 0) {
-#ifdef CONFIG_AVB_LIBAVB_USER
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
 		uint8_t lock_state;
 		lock_state = 2;
-		if (avb_write_lock_state(lock_state))
+		if (rk_avb_write_lock_state(lock_state))
 			fastboot_tx_write_str("FAIL");
 		else
 			fastboot_tx_write_str("OKAY");
@@ -1037,14 +1038,14 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 		fastboot_tx_write_str("FAILnot implemented");
 #endif
 	} else if (strncmp("fuse at-perm-attr", cmd + 4, 16) == 0) {
-#ifdef CONFIG_AVB_LIBAVB_USER
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
 		if (PERM_ATTR_TOTAL_SIZE != download_bytes) {
 			printf("Permanent attribute size is not equal!\n");
 			fastboot_tx_write_str("FAIL");
 			return;
 		}
 
-		if (avb_write_permanent_attributes((uint8_t *)
+		if (rk_avb_write_permanent_attributes((uint8_t *)
 					       CONFIG_FASTBOOT_BUF_ADDR,
 					       download_bytes
 					       - PERM_ATTR_DIGEST_SIZE)) {
@@ -1052,7 +1053,7 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 			return;
 		}
 
-		if (avb_write_attribute_hash((uint8_t *)
+		if (rk_avb_write_attribute_hash((uint8_t *)
 					     (CONFIG_FASTBOOT_BUF_ADDR
 					     + download_bytes
 					     - PERM_ATTR_DIGEST_SIZE),
@@ -1061,7 +1062,7 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 			return;
 		}
 
-		if (avb_write_perm_attr_flag(1)) {
+		if (rk_avb_write_perm_attr_flag(1)) {
 			fastboot_tx_write_str("FAIL");
 			return;
 		}
@@ -1071,13 +1072,13 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 		fastboot_tx_write_str("FAILnot implemented");
 #endif
 	} else if (strncmp("fuse at-bootloader-vboot-key", cmd + 4, 27) == 0) {
-#ifdef CONFIG_AVB_LIBAVB_USER
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
 		if (download_bytes != VBOOT_KEY_HASH_SIZE) {
 			fastboot_tx_write_str("FAIL");
 			printf("The vboot key size error!\n");
 		}
 
-		if (avb_write_vbootkey_hash((uint8_t *)
+		if (rk_avb_write_vbootkey_hash((uint8_t *)
 					    CONFIG_FASTBOOT_BUF_ADDR,
 					    VBOOT_KEY_HASH_SIZE)) {
 			fastboot_tx_write_str("FAIL");
diff --git a/include/android_avb/avb_ab_flow.h b/include/android_avb/avb_ab_flow.h
index 6b3d9e4e1c..f6aca9b0fa 100644
--- a/include/android_avb/avb_ab_flow.h
+++ b/include/android_avb/avb_ab_flow.h
@@ -1,279 +1,263 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-/*
-#if !defined(AVB_INSIDE_LIBAVB_AB_H) && !defined(AVB_COMPILATION)
-#error \
-    "Never include this file directly, include libavb_ab/libavb_ab.h instead."
-#endif
-*/
-
-#ifndef AVB_AB_FLOW_H_
-#define AVB_AB_FLOW_H_
-
-#include <android_avb/avb_ab_ops.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Magic for the A/B struct when serialized. */
-#define AVB_AB_MAGIC "\0AB0"
-#define AVB_AB_MAGIC_LEN 4
-
-/* Versioning for the on-disk A/B metadata - keep in sync with avbtool. */
-#define AVB_AB_MAJOR_VERSION 1
-#define AVB_AB_MINOR_VERSION 0
-
-/* Size of AvbABData struct. */
-#define AVB_AB_DATA_SIZE 512
-
-/* Maximum values for slot data */
-#define AVB_AB_MAX_PRIORITY 15
-#define AVB_AB_MAX_TRIES_REMAINING 7
-
-/* Struct used for recording per-slot metadata.
- *
- * When serialized, data is stored in network byte-order.
- */
-typedef struct AvbABSlotData {
-  /* Slot priority. Valid values range from 0 to AVB_AB_MAX_PRIORITY,
-   * both inclusive with 1 being the lowest and AVB_AB_MAX_PRIORITY
-   * being the highest. The special value 0 is used to indicate the
-   * slot is unbootable.
-   */
-  uint8_t priority : 4;
-
-  /* Number of times left attempting to boot this slot ranging from 0
-   * to AVB_AB_MAX_TRIES_REMAINING.
-   */
-  uint8_t tries_remaining : 3;
-
-  /* Non-zero if this slot has booted successfully, 0 otherwise. */
-  uint8_t successful_boot : 1;
-    /* 1 if this slot is corrupted from a dm-verity corruption, 0 */
-    /* otherwise. */
-    uint8_t verity_corrupted : 1;
-  /* Reserved for future use. */
-  uint8_t reserved : 7;
-} AVB_ATTR_PACKED AvbABSlotData;
-
-/* Struct used for recording A/B metadata.
- *
- * When serialized, data is stored in network byte-order.
- */
-typedef struct AvbABData
-{
-	/* NUL terminated active slot suffix. */
-	char slot_suffix[4];
-	/* Magic number used for identification - see AVB_AB_MAGIC. */
-	uint8_t magic[AVB_AB_MAGIC_LEN];
-
-	/* Version of on-disk struct - see AVB_AB_{MAJOR,MINOR}_VERSION. */
-	uint8_t version_major;
-
-	/* Number of slots being managed. */
-	uint8_t nb_slot : 3;
-	/* Number of times left attempting to boot recovery. */
-	uint8_t recovery_tries_remaining : 3;
-	/* Padding to ensure |slots| field start eight bytes in. */
-	uint8_t reserved1[2];
-
-	/* Per-slot metadata. */
-	AvbABSlotData slots[4];
-
-	/* Reserved for future use. */
-	uint8_t reserved2[8];
-	//uint8_t reserved3[480];
-
-	/* CRC32 of all 28 bytes preceding this field. */
-	uint32_t crc32;
-	uint8_t version_minor;
-} AVB_ATTR_PACKED AvbABData;
-
-/* Copies |src| to |dest|, byte-swapping fields in the
- * process. Returns false if the data is invalid (e.g. wrong magic,
- * wrong CRC32 etc.), true otherwise.
- */
-bool avb_ab_data_verify_and_byteswap(const AvbABData* src, AvbABData* dest);
-
-/* Copies |src| to |dest|, byte-swapping fields in the process. Also
- * updates the |crc32| field in |dest|.
- */
-void avb_ab_data_update_crc_and_byteswap(const AvbABData* src, AvbABData* dest);
-
-/* Initializes |data| such that it has two slots and both slots have
- * maximum tries remaining. The CRC is not set.
- */
-void avb_ab_data_init(AvbABData* data);
-
-/* Reads A/B metadata from the 'misc' partition using |ops|. Returned
- * data is properly byteswapped. Returns AVB_IO_RESULT_OK on
- * success, error code otherwise.
- *
- * If the data read from disk is invalid (e.g. wrong magic or CRC
- * checksum failure), the metadata will be reset using
- * avb_ab_data_init() and then written to disk.
- */
-AvbIOResult avb_ab_data_read(AvbABOps* ab_ops, AvbABData* data);
-
-/* Load A/B metadata, like function avb_ab_data_read*/
-AvbIOResult load_metadata(AvbABOps* ab_ops,
-                                 AvbABData* ab_data,
-                                 AvbABData* ab_data_orig);
-
-/* Writes A/B metadata to the 'misc' partition using |ops|. This will
- * byteswap and update the CRC as needed. Returns AVB_IO_RESULT_OK on
- * success, error code otherwise.
- */
-AvbIOResult avb_ab_data_write(AvbABOps* ab_ops, const AvbABData* data);
-
-/* Return codes used in avb_ab_flow(), see that function for
- * documentation of each value.
- */
-typedef enum {
-  AVB_AB_FLOW_RESULT_OK,
-  AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR,
-  AVB_AB_FLOW_RESULT_ERROR_OOM,
-  AVB_AB_FLOW_RESULT_ERROR_IO,
-  AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS,
-  AVB_AB_FLOW_RESULT_ERROR_INVALID_ARGUMENT
-} AvbABFlowResult;
-
-/* Get a textual representation of |result|. */
-const char* avb_ab_flow_result_to_string(AvbABFlowResult result);
-
-/* High-level function to select a slot to boot. The following
- * algorithm is used:
- *
- * 1. A/B metadata is loaded and validated using the
- * read_ab_metadata() operation. Typically this means it's read from
- * the 'misc' partition and if it's invalid then it's reset using
- * avb_ab_data_init() and this reset metadata is returned.
- *
- * 2. All bootable slots listed in the A/B metadata are verified using
- * avb_slot_verify(). If a slot is invalid or if it fails verification
- * (and AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR is not set, see
- * below), it will be marked as unbootable in the A/B metadata and the
- * metadata will be saved to disk before returning.
- *
- * 3. If there are no bootable slots, the value
- * AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS is returned.
- *
- * 4. For each bootable slot, the Stored Rollback Indexes are updated
- * such that for each rollback index location, the Stored Rollback
- * Index is the largest number smaller than or equal to the Rollback
- * Index of each slot.
- *
- * 5. The bootable slot with the highest priority is selected and
- * returned in |out_data|. If this slot is already marked as
- * successful, the A/B metadata is not modified. However, if the slot
- * is not marked as bootable its |tries_remaining| count is
- * decremented and the A/B metadata is saved to disk before returning.
- * In either case the value AVB_AB_FLOW_RESULT_OK is returning.
- *
- * The partitions to load is given in |requested_partitions| as a
- * NULL-terminated array of NUL-terminated strings. Typically the
- * |requested_partitions| array only contains a single item for the
- * boot partition, 'boot'.
- *
- * If the device is unlocked (and _only_ if it's unlocked), the
- * AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR flag should be set
- * in the |flags| parameter. This will allow considering slots as
- * verified even when avb_slot_verify() returns
- * AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED,
- * AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION, or
- * AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX for the slot in
- * question.
- *
- * Note that neither androidboot.slot_suffix nor androidboot.slot are
- * set in the |cmdline| field in |AvbSlotVerifyData| - you will have
- * to pass these yourself.
- *
- * If a slot was selected and it verified then AVB_AB_FLOW_RESULT_OK
- * is returned.
- *
- * If a slot was selected but it didn't verify then
- * AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR is returned. This can
- * only happen when the AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR
- * flag is set.
- *
- * If an I/O operation - such as loading/saving metadata or checking
- * rollback indexes - fail, the value AVB_AB_FLOW_RESULT_ERROR_IO is
- * returned.
- *
- * If memory allocation fails, AVB_AB_FLOW_RESULT_ERROR_OOM is
- * returned.
- *
- * If invalid arguments are passed,
- * AVB_AB_FLOW_RESULT_ERROR_INVALID_ARGUMENT is returned. For example
- * this can happen if using AVB_HASHTREE_ERROR_MODE_LOGGING without
- * AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR.
- *
- * Reasonable behavior for handling AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS
- * is to initiate device repair (which is device-dependent).
- */
-AvbABFlowResult avb_ab_flow(AvbABOps* ab_ops,
-                            const char* const* requested_partitions,
-                            AvbSlotVerifyFlags flags,
-                            AvbHashtreeErrorMode hashtree_error_mode,
-                            AvbSlotVerifyData** out_data);
-
-AvbABFlowResult avb_ab_slot_select(AvbABOps* ab_ops,char select_slot[]);
-
-/* Marks the slot with the given slot number as active. Returns
- * AVB_IO_RESULT_OK on success, error code otherwise.
- *
- * This function is typically used by the OS updater when completing
- * an update. It can also used by the firmware for implementing the
- * "set_active" command.
- */
-AvbIOResult avb_ab_mark_slot_active(AvbABOps* ab_ops, unsigned int slot_number);
-
-/* Marks the slot with the given slot number as unbootable. Returns
- * AVB_IO_RESULT_OK on success, error code otherwise.
- *
- * This function is typically used by the OS updater before writing to
- * a slot.
- */
-AvbIOResult avb_ab_mark_slot_unbootable(AvbABOps* ab_ops,
-                                        unsigned int slot_number);
-
-/* Marks the slot with the given slot number as having booted
- * successfully. Returns AVB_IO_RESULT_OK on success, error code
- * otherwise.
- *
- * Calling this on an unbootable slot is an error - AVB_IO_RESULT_OK
- * will be returned yet the function will have no side-effects.
- *
- * This function is typically used by the OS updater after having
- * confirmed that the slot works as intended.
- */
-AvbIOResult avb_ab_mark_slot_successful(AvbABOps* ab_ops,
-                                        unsigned int slot_number);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* AVB_AB_FLOW_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_AB_H) && !defined(AVB_COMPILATION)
+#error \
+    "Never include this file directly, include libavb_ab/libavb_ab.h instead."
+#endif
+*/
+
+#ifndef AVB_AB_FLOW_H_
+#define AVB_AB_FLOW_H_
+
+#include <android_avb/avb_ab_ops.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Magic for the A/B struct when serialized. */
+#define AVB_AB_MAGIC "\0AB0"
+#define AVB_AB_MAGIC_LEN 4
+
+/* Versioning for the on-disk A/B metadata - keep in sync with avbtool. */
+#define AVB_AB_MAJOR_VERSION 1
+#define AVB_AB_MINOR_VERSION 0
+
+/* Size of AvbABData struct. */
+#define AVB_AB_DATA_SIZE 32
+
+/* Maximum values for slot data */
+#define AVB_AB_MAX_PRIORITY 15
+#define AVB_AB_MAX_TRIES_REMAINING 7
+
+/* Struct used for recording per-slot metadata.
+ *
+ * When serialized, data is stored in network byte-order.
+ */
+typedef struct AvbABSlotData {
+  /* Slot priority. Valid values range from 0 to AVB_AB_MAX_PRIORITY,
+   * both inclusive with 1 being the lowest and AVB_AB_MAX_PRIORITY
+   * being the highest. The special value 0 is used to indicate the
+   * slot is unbootable.
+   */
+  uint8_t priority;
+
+  /* Number of times left attempting to boot this slot ranging from 0
+   * to AVB_AB_MAX_TRIES_REMAINING.
+   */
+  uint8_t tries_remaining;
+
+  /* Non-zero if this slot has booted successfully, 0 otherwise. */
+  uint8_t successful_boot;
+
+  /* Reserved for future use. */
+  uint8_t reserved[1];
+} AVB_ATTR_PACKED AvbABSlotData;
+
+/* Struct used for recording A/B metadata.
+ *
+ * When serialized, data is stored in network byte-order.
+ */
+typedef struct AvbABData {
+  /* Magic number used for identification - see AVB_AB_MAGIC. */
+  uint8_t magic[AVB_AB_MAGIC_LEN];
+
+  /* Version of on-disk struct - see AVB_AB_{MAJOR,MINOR}_VERSION. */
+  uint8_t version_major;
+  uint8_t version_minor;
+
+  /* Padding to ensure |slots| field start eight bytes in. */
+  uint8_t reserved1[2];
+
+  /* Per-slot metadata. */
+  AvbABSlotData slots[2];
+
+  /* Reserved for future use. */
+  uint8_t reserved2[12];
+
+  /* CRC32 of all 28 bytes preceding this field. */
+  uint32_t crc32;
+} AVB_ATTR_PACKED AvbABData;
+
+/* Copies |src| to |dest|, byte-swapping fields in the
+ * process. Returns false if the data is invalid (e.g. wrong magic,
+ * wrong CRC32 etc.), true otherwise.
+ */
+bool avb_ab_data_verify_and_byteswap(const AvbABData* src, AvbABData* dest);
+
+/* Copies |src| to |dest|, byte-swapping fields in the process. Also
+ * updates the |crc32| field in |dest|.
+ */
+void avb_ab_data_update_crc_and_byteswap(const AvbABData* src, AvbABData* dest);
+
+/* Initializes |data| such that it has two slots and both slots have
+ * maximum tries remaining. The CRC is not set.
+ */
+void avb_ab_data_init(AvbABData* data);
+
+/* Reads A/B metadata from the 'misc' partition using |ops|. Returned
+ * data is properly byteswapped. Returns AVB_IO_RESULT_OK on
+ * success, error code otherwise.
+ *
+ * If the data read from disk is invalid (e.g. wrong magic or CRC
+ * checksum failure), the metadata will be reset using
+ * avb_ab_data_init() and then written to disk.
+ */
+AvbIOResult avb_ab_data_read(AvbABOps* ab_ops, AvbABData* data);
+
+/* Writes A/B metadata to the 'misc' partition using |ops|. This will
+ * byteswap and update the CRC as needed. Returns AVB_IO_RESULT_OK on
+ * success, error code otherwise.
+ */
+AvbIOResult avb_ab_data_write(AvbABOps* ab_ops, const AvbABData* data);
+
+/* Return codes used in avb_ab_flow(), see that function for
+ * documentation of each value.
+ */
+typedef enum {
+  AVB_AB_FLOW_RESULT_OK,
+  AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR,
+  AVB_AB_FLOW_RESULT_ERROR_OOM,
+  AVB_AB_FLOW_RESULT_ERROR_IO,
+  AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS,
+  AVB_AB_FLOW_RESULT_ERROR_INVALID_ARGUMENT
+} AvbABFlowResult;
+
+/* Get a textual representation of |result|. */
+const char* avb_ab_flow_result_to_string(AvbABFlowResult result);
+
+/* High-level function to select a slot to boot. The following
+ * algorithm is used:
+ *
+ * 1. A/B metadata is loaded and validated using the
+ * read_ab_metadata() operation. Typically this means it's read from
+ * the 'misc' partition and if it's invalid then it's reset using
+ * avb_ab_data_init() and this reset metadata is returned.
+ *
+ * 2. All bootable slots listed in the A/B metadata are verified using
+ * avb_slot_verify(). If a slot is invalid or if it fails verification
+ * (and AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR is not set, see
+ * below), it will be marked as unbootable in the A/B metadata and the
+ * metadata will be saved to disk before returning.
+ *
+ * 3. If there are no bootable slots, the value
+ * AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS is returned.
+ *
+ * 4. For each bootable slot, the Stored Rollback Indexes are updated
+ * such that for each rollback index location, the Stored Rollback
+ * Index is the largest number smaller than or equal to the Rollback
+ * Index of each slot.
+ *
+ * 5. The bootable slot with the highest priority is selected and
+ * returned in |out_data|. If this slot is already marked as
+ * successful, the A/B metadata is not modified. However, if the slot
+ * is not marked as bootable its |tries_remaining| count is
+ * decremented and the A/B metadata is saved to disk before returning.
+ * In either case the value AVB_AB_FLOW_RESULT_OK is returning.
+ *
+ * The partitions to load is given in |requested_partitions| as a
+ * NULL-terminated array of NUL-terminated strings. Typically the
+ * |requested_partitions| array only contains a single item for the
+ * boot partition, 'boot'.
+ *
+ * If the device is unlocked (and _only_ if it's unlocked), the
+ * AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR flag should be set
+ * in the |flags| parameter. This will allow considering slots as
+ * verified even when avb_slot_verify() returns
+ * AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED,
+ * AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION, or
+ * AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX for the slot in
+ * question.
+ *
+ * Note that neither androidboot.slot_suffix nor androidboot.slot are
+ * set in the |cmdline| field in |AvbSlotVerifyData| - you will have
+ * to pass these yourself.
+ *
+ * If a slot was selected and it verified then AVB_AB_FLOW_RESULT_OK
+ * is returned.
+ *
+ * If a slot was selected but it didn't verify then
+ * AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR is returned. This can
+ * only happen when the AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR
+ * flag is set.
+ *
+ * If an I/O operation - such as loading/saving metadata or checking
+ * rollback indexes - fail, the value AVB_AB_FLOW_RESULT_ERROR_IO is
+ * returned.
+ *
+ * If memory allocation fails, AVB_AB_FLOW_RESULT_ERROR_OOM is
+ * returned.
+ *
+ * If invalid arguments are passed,
+ * AVB_AB_FLOW_RESULT_ERROR_INVALID_ARGUMENT is returned. For example
+ * this can happen if using AVB_HASHTREE_ERROR_MODE_LOGGING without
+ * AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR.
+ *
+ * Reasonable behavior for handling AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS
+ * is to initiate device repair (which is device-dependent).
+ */
+AvbABFlowResult avb_ab_flow(AvbABOps* ab_ops,
+                            const char* const* requested_partitions,
+                            AvbSlotVerifyFlags flags,
+                            AvbHashtreeErrorMode hashtree_error_mode,
+                            AvbSlotVerifyData** out_data);
+
+/* Marks the slot with the given slot number as active. Returns
+ * AVB_IO_RESULT_OK on success, error code otherwise.
+ *
+ * This function is typically used by the OS updater when completing
+ * an update. It can also used by the firmware for implementing the
+ * "set_active" command.
+ */
+AvbIOResult avb_ab_mark_slot_active(AvbABOps* ab_ops, unsigned int slot_number);
+
+/* Marks the slot with the given slot number as unbootable. Returns
+ * AVB_IO_RESULT_OK on success, error code otherwise.
+ *
+ * This function is typically used by the OS updater before writing to
+ * a slot.
+ */
+AvbIOResult avb_ab_mark_slot_unbootable(AvbABOps* ab_ops,
+                                        unsigned int slot_number);
+
+/* Marks the slot with the given slot number as having booted
+ * successfully. Returns AVB_IO_RESULT_OK on success, error code
+ * otherwise.
+ *
+ * Calling this on an unbootable slot is an error - AVB_IO_RESULT_OK
+ * will be returned yet the function will have no side-effects.
+ *
+ * This function is typically used by the OS updater after having
+ * confirmed that the slot works as intended.
+ */
+AvbIOResult avb_ab_mark_slot_successful(AvbABOps* ab_ops,
+                                        unsigned int slot_number);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_AB_FLOW_H_ */
diff --git a/include/android_avb/avb_ab_ops.h b/include/android_avb/avb_ab_ops.h
index d440e75b18..60e9a497b6 100644
--- a/include/android_avb/avb_ab_ops.h
+++ b/include/android_avb/avb_ab_ops.h
@@ -1,81 +1,81 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/*
-#if !defined(AVB_INSIDE_LIBAVB_AB_H) && !defined(AVB_COMPILATION)
-#error \
-    "Never include this file directly, include libavb_ab/libavb_ab.h instead."
-#endif
-*/
-
-#ifndef AVB_AB_OPS_H_
-#define AVB_AB_OPS_H_
-
-#include <android_avb/libavb.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-struct AvbABOps;
-typedef struct AvbABOps AvbABOps;
-
-struct AvbABData;
-
-/* High-level operations/functions/methods for A/B that are platform
- * dependent.
- */
-struct AvbABOps {
-	/* Operations from libavb. */
-	AvbOps* ops;
-
-	/* Reads A/B metadata from persistent storage. Returned data is
-	 * properly byteswapped. Returns AVB_IO_RESULT_OK on success, error
-	 * code otherwise.
-	 *
-	 * If the data read is invalid (e.g. wrong magic or CRC checksum
-	 * failure), the metadata shoule be reset using avb_ab_data_init()
-	 * and then written to persistent storage.
-	 *
-	 * Implementations will typically want to use avb_ab_data_read()
-	 * here to use the 'misc' partition for persistent storage.
-	 */
-	AvbIOResult (*read_ab_metadata)(AvbABOps *ab_ops, struct AvbABData *data);
-
-	/* Writes A/B metadata to persistent storage. This will byteswap and
-	 * update the CRC as needed. Returns AVB_IO_RESULT_OK on success,
-	 * error code otherwise.
-	 *
-	 * Implementations will typically want to use avb_ab_data_write()
-	 * here to use the 'misc' partition for persistent storage.
-	 */
-	AvbIOResult (*write_ab_metadata)(AvbABOps *ab_ops, const struct AvbABData *data);
-	void (*init_ab_metadata)(struct AvbABData *data);
-};
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* AVB_AB_OPS_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_AB_H) && !defined(AVB_COMPILATION)
+#error \
+    "Never include this file directly, include libavb_ab/libavb_ab.h instead."
+#endif
+*/
+
+#ifndef AVB_AB_OPS_H_
+#define AVB_AB_OPS_H_
+
+#include <android_avb/libavb.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct AvbABOps;
+typedef struct AvbABOps AvbABOps;
+
+struct AvbABData;
+
+/* High-level operations/functions/methods for A/B that are platform
+ * dependent.
+ */
+struct AvbABOps {
+  /* Operations from libavb. */
+  AvbOps* ops;
+
+  /* Reads A/B metadata from persistent storage. Returned data is
+   * properly byteswapped. Returns AVB_IO_RESULT_OK on success, error
+   * code otherwise.
+   *
+   * If the data read is invalid (e.g. wrong magic or CRC checksum
+   * failure), the metadata shoule be reset using avb_ab_data_init()
+   * and then written to persistent storage.
+   *
+   * Implementations will typically want to use avb_ab_data_read()
+   * here to use the 'misc' partition for persistent storage.
+   */
+  AvbIOResult (*read_ab_metadata)(AvbABOps* ab_ops, struct AvbABData* data);
+
+  /* Writes A/B metadata to persistent storage. This will byteswap and
+   * update the CRC as needed. Returns AVB_IO_RESULT_OK on success,
+   * error code otherwise.
+   *
+   * Implementations will typically want to use avb_ab_data_write()
+   * here to use the 'misc' partition for persistent storage.
+   */
+  AvbIOResult (*write_ab_metadata)(AvbABOps* ab_ops,
+                                   const struct AvbABData* data);
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_AB_OPS_H_ */
diff --git a/include/android_avb/avb_atx_ops.h b/include/android_avb/avb_atx_ops.h
index 668a4e2b5b..726dd6a8a1 100644
--- a/include/android_avb/avb_atx_ops.h
+++ b/include/android_avb/avb_atx_ops.h
@@ -1,70 +1,77 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/*
-#if !defined(AVB_INSIDE_LIBAVB_ATX_H) && !defined(AVB_COMPILATION)
-#error \
-    "Never include this file directly, include libavb_atx/libavb_atx.h instead."
-#endif
-*/
-
-#ifndef AVB_ATX_OPS_H_
-#define AVB_ATX_OPS_H_
-
-#include <android_avb/libavb.h>
-
-#include <android_avb/avb_atx_types.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-struct AvbAtxOps;
-typedef struct AvbAtxOps AvbAtxOps;
-
-/* An extension to AvbOps required by avb_atx_validate_vbmeta_public_key(). */
-struct AvbAtxOps {
-  /* Operations from libavb. */
-  AvbOps* ops;
-
-  /* Reads permanent |attributes| data. There are no restrictions on where this
-   * data is stored. On success, returns AVB_IO_RESULT_OK and populates
-   * |attributes|.
-   */
-  AvbIOResult (*read_permanent_attributes)(
-      AvbAtxOps* atx_ops, AvbAtxPermanentAttributes* attributes);
-
-  /* Reads a |hash| of permanent attributes. This hash MUST be retrieved from a
-   * permanently read-only location (e.g. fuses) when a device is LOCKED. On
-   * success, returned AVB_IO_RESULT_OK and populates |hash|.
-   */
-  AvbIOResult (*read_permanent_attributes_hash)(
-      AvbAtxOps* atx_ops, uint8_t hash[AVB_SHA256_DIGEST_SIZE]);
-};
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* AVB_ATX_OPS_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_ATX_H) && !defined(AVB_COMPILATION)
+#error \
+    "Never include this file directly, include libavb_atx/libavb_atx.h instead."
+#endif
+*/
+
+#ifndef AVB_ATX_OPS_H_
+#define AVB_ATX_OPS_H_
+
+#include <android_avb/libavb.h>
+
+#include <android_avb/avb_atx_types.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct AvbAtxOps;
+typedef struct AvbAtxOps AvbAtxOps;
+
+/* An extension to AvbOps required by avb_atx_validate_vbmeta_public_key(). */
+struct AvbAtxOps {
+  /* Operations from libavb. */
+  AvbOps* ops;
+
+  /* Reads permanent |attributes| data. There are no restrictions on where this
+   * data is stored. On success, returns AVB_IO_RESULT_OK and populates
+   * |attributes|.
+   */
+  AvbIOResult (*read_permanent_attributes)(
+      AvbAtxOps* atx_ops, AvbAtxPermanentAttributes* attributes);
+
+  /* Reads a |hash| of permanent attributes. This hash MUST be retrieved from a
+   * permanently read-only location (e.g. fuses) when a device is LOCKED. On
+   * success, returned AVB_IO_RESULT_OK and populates |hash|.
+   */
+  AvbIOResult (*read_permanent_attributes_hash)(
+      AvbAtxOps* atx_ops, uint8_t hash[AVB_SHA256_DIGEST_SIZE]);
+
+  /* Provides the key version of a key used during verification. This may be
+   * useful for managing the minimum key version.
+   */
+  void (*set_key_version)(AvbAtxOps* atx_ops,
+                          size_t rollback_index_location,
+                          uint64_t key_version);
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_ATX_OPS_H_ */
diff --git a/include/android_avb/avb_atx_types.h b/include/android_avb/avb_atx_types.h
index e52c11dfd8..9b1c36a3c3 100644
--- a/include/android_avb/avb_atx_types.h
+++ b/include/android_avb/avb_atx_types.h
@@ -1,79 +1,80 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-/*
-#if !defined(AVB_INSIDE_LIBAVB_ATX_H) && !defined(AVB_COMPILATION)
-#error \
-    "Never include this file directly, include libavb_atx/libavb_atx.h instead."
-#endif
-*/
-
-#ifndef AVB_ATX_TYPES_H_
-#define AVB_ATX_TYPES_H_
-
-#include <android_avb/libavb.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Size in bytes of an Android Things product ID. */
-#define AVB_ATX_PRODUCT_ID_SIZE 16
-
-/* Size in bytes of a serialized public key with a 4096-bit modulus. */
-#define AVB_ATX_PUBLIC_KEY_SIZE (sizeof(AvbRSAPublicKeyHeader) + 1024)
-
-/* Data structure of Android Things permanent attributes. */
-typedef struct AvbAtxPermanentAttributes {
-  uint32_t version;
-  uint8_t product_root_public_key[AVB_ATX_PUBLIC_KEY_SIZE];
-  uint8_t product_id[AVB_ATX_PRODUCT_ID_SIZE];
-} AVB_ATTR_PACKED AvbAtxPermanentAttributes;
-
-/* Data structure of signed fields in an Android Things certificate. */
-typedef struct AvbAtxCertificateSignedData {
-  uint32_t version;
-  uint8_t public_key[AVB_ATX_PUBLIC_KEY_SIZE];
-  uint8_t subject[AVB_SHA256_DIGEST_SIZE];
-  uint8_t usage[AVB_SHA256_DIGEST_SIZE];
-  uint64_t key_version;
-} AVB_ATTR_PACKED AvbAtxCertificateSignedData;
-
-/* Data structure of an Android Things certificate. */
-typedef struct AvbAtxCertificate {
-  AvbAtxCertificateSignedData signed_data;
-  uint8_t signature[AVB_RSA4096_NUM_BYTES];
-} AVB_ATTR_PACKED AvbAtxCertificate;
-
-/* Data structure of Android Things public key metadata in vbmeta. */
-typedef struct AvbAtxPublicKeyMetadata {
-  uint32_t version;
-  AvbAtxCertificate product_intermediate_key_certificate;
-  AvbAtxCertificate product_signing_key_certificate;
-} AVB_ATTR_PACKED AvbAtxPublicKeyMetadata;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* AVB_ATX_TYPES_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_ATX_H) && !defined(AVB_COMPILATION)
+#error \
+    "Never include this file directly, include libavb_atx/libavb_atx.h instead."
+#endif
+*/
+
+#ifndef AVB_ATX_TYPES_H_
+#define AVB_ATX_TYPES_H_
+
+#include <android_avb/libavb.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Size in bytes of an Android Things product ID. */
+#define AVB_ATX_PRODUCT_ID_SIZE 16
+
+/* Size in bytes of a serialized public key with a 4096-bit modulus. */
+#define AVB_ATX_PUBLIC_KEY_SIZE (sizeof(AvbRSAPublicKeyHeader) + 1024)
+
+/* Data structure of Android Things permanent attributes. */
+typedef struct AvbAtxPermanentAttributes {
+  uint32_t version;
+  uint8_t product_root_public_key[AVB_ATX_PUBLIC_KEY_SIZE];
+  uint8_t product_id[AVB_ATX_PRODUCT_ID_SIZE];
+} AVB_ATTR_PACKED AvbAtxPermanentAttributes;
+
+/* Data structure of signed fields in an Android Things certificate. */
+typedef struct AvbAtxCertificateSignedData {
+  uint32_t version;
+  uint8_t public_key[AVB_ATX_PUBLIC_KEY_SIZE];
+  uint8_t subject[AVB_SHA256_DIGEST_SIZE];
+  uint8_t usage[AVB_SHA256_DIGEST_SIZE];
+  uint64_t key_version;
+} AVB_ATTR_PACKED AvbAtxCertificateSignedData;
+
+/* Data structure of an Android Things certificate. */
+typedef struct AvbAtxCertificate {
+  AvbAtxCertificateSignedData signed_data;
+  uint8_t signature[AVB_RSA4096_NUM_BYTES];
+} AVB_ATTR_PACKED AvbAtxCertificate;
+
+/* Data structure of Android Things public key metadata in vbmeta. */
+typedef struct AvbAtxPublicKeyMetadata {
+  uint32_t version;
+  AvbAtxCertificate product_intermediate_key_certificate;
+  AvbAtxCertificate product_signing_key_certificate;
+} AVB_ATTR_PACKED AvbAtxPublicKeyMetadata;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_ATX_TYPES_H_ */
diff --git a/include/android_avb/avb_atx_validate.h b/include/android_avb/avb_atx_validate.h
index 28d5be030d..9989bb1ddb 100644
--- a/include/android_avb/avb_atx_validate.h
+++ b/include/android_avb/avb_atx_validate.h
@@ -1,104 +1,79 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/*
-#if !defined(AVB_INSIDE_LIBAVB_ATX_H) && !defined(AVB_COMPILATION)
-#error \
-    "Never include this file directly, include libavb_atx/libavb_atx.h instead."
-#endif
-*/
-
-#ifndef AVB_ATX_VALIDATE_H_
-#define AVB_ATX_VALIDATE_H_
-
-#include <android_avb/avb_atx_ops.h>
-#include <android_avb/avb_atx_types.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Rollback index locations for Android Things key versions. */
-#define AVB_ATX_PIK_VERSION_LOCATION 0x1000
-#define AVB_ATX_PSK_VERSION_LOCATION 0x1001
-
-/**
- * read permanent attributes from rpmb
- *
- * @param atx_ops
- *
- * @param attributes The attributes inclue psk_public product id,
- * 		     ref:AvbAtxPermanentAttributes.
- *
- * @return AvbIOResult
- */
-AvbIOResult avb_read_perm_attr(AvbAtxOps* atx_ops,
-				      AvbAtxPermanentAttributes* attributes);
-
-/**
- * read permanent attributes hash from efuse
- *
- * @param atx_ops
- *
- * @param attributes The attributes inclue psk_public product id,
- * 		     ref:AvbAtxPermanentAttributes.
- *
- * @return AvbIOResult
- */
-AvbIOResult avb_read_perm_attr_hash(AvbAtxOps* atx_ops,
-					   uint8_t hash[AVB_SHA256_DIGEST_SIZE]);
-/* An implementation of validate_vbmeta_public_key for Android Things. See
- * libavb/avb_ops.h for details on validate_vbmeta_public_key in general. This
- * implementation uses the metadata expected with Android Things vbmeta images
- * to perform validation on the public key. The ATX ops must be implemented.
- * That is, |ops->atx_ops| must be valid.
- *
- * There are a multiple values that need verification:
- *   - Permanent Product Attributes: A hash of these attributes is fused into
- *                                   hardware. Consistency is checked.
- *   - Product Root Key (PRK): This key is provided in permanent attributes and
- *                             is the root authority for all Android Things
- *                             products.
- *   - Product Intermediate Key (PIK): This key is a rotated intermediary. It is
- *                                     certified by the PRK.
- *   - Product Signing Key (PSK): This key is a rotated authority for a specific
- *                                Android Things product. It is certified by a
- *                                PIK and must match |public_key_data|.
- *   - Product ID: This value is provided in permanent attributes and is unique
- *                 to a specific Android Things product. This value must match
- *                 the subject of the PSK certificate.
- */
-AvbIOResult avb_atx_validate_vbmeta_public_key(
-    AvbOps* ops,
-    const uint8_t* public_key_data,
-    size_t public_key_length,
-    const uint8_t* public_key_metadata,
-    size_t public_key_metadata_length,
-    bool* out_is_trusted);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* AVB_ATX_VALIDATE_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_ATX_H) && !defined(AVB_COMPILATION)
+#error \
+    "Never include this file directly, include libavb_atx/libavb_atx.h instead."
+#endif
+*/
+
+#ifndef AVB_ATX_VALIDATE_H_
+#define AVB_ATX_VALIDATE_H_
+
+#include <android_avb/avb_atx_ops.h>
+#include <android_avb/avb_atx_types.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Rollback index locations for Android Things key versions. */
+#define AVB_ATX_PIK_VERSION_LOCATION 0x1000
+#define AVB_ATX_PSK_VERSION_LOCATION 0x1001
+
+/* An implementation of validate_vbmeta_public_key for Android Things. See
+ * libavb/avb_ops.h for details on validate_vbmeta_public_key in general. This
+ * implementation uses the metadata expected with Android Things vbmeta images
+ * to perform validation on the public key. The ATX ops must be implemented.
+ * That is, |ops->atx_ops| must be valid.
+ *
+ * There are a multiple values that need verification:
+ *   - Permanent Product Attributes: A hash of these attributes is fused into
+ *                                   hardware. Consistency is checked.
+ *   - Product Root Key (PRK): This key is provided in permanent attributes and
+ *                             is the root authority for all Android Things
+ *                             products.
+ *   - Product Intermediate Key (PIK): This key is a rotated intermediary. It is
+ *                                     certified by the PRK.
+ *   - Product Signing Key (PSK): This key is a rotated authority for a specific
+ *                                Android Things product. It is certified by a
+ *                                PIK and must match |public_key_data|.
+ *   - Product ID: This value is provided in permanent attributes and is unique
+ *                 to a specific Android Things product. This value must match
+ *                 the subject of the PSK certificate.
+ */
+AvbIOResult avb_atx_validate_vbmeta_public_key(
+    AvbOps* ops,
+    const uint8_t* public_key_data,
+    size_t public_key_length,
+    const uint8_t* public_key_metadata,
+    size_t public_key_metadata_length,
+    bool* out_is_trusted);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_ATX_VALIDATE_H_ */
diff --git a/include/android_avb/avb_chain_partition_descriptor.h b/include/android_avb/avb_chain_partition_descriptor.h
index 3e5395fec5..2c0a38d58a 100644
--- a/include/android_avb/avb_chain_partition_descriptor.h
+++ b/include/android_avb/avb_chain_partition_descriptor.h
@@ -1,74 +1,74 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/*
-#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
-#error "Never include this file directly, include libavb.h instead."
-#endif
-*/
-
-#ifndef AVB_CHAIN_PARTITION_DESCRIPTOR_H_
-#define AVB_CHAIN_PARTITION_DESCRIPTOR_H_
-
-#include <android_avb/avb_descriptor.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* A descriptor containing a pointer to signed integrity data stored
- * on another partition. The descriptor contains the partition name in
- * question (without the A/B suffix), the public key used to sign the
- * integrity data, and rollback index location to use for rollback
- * protection.
- *
- * Following this struct are |partition_name_len| bytes of the
- * partition name (UTF-8 encoded) and |public_key_len| bytes of the
- * public key.
- *
- * The |reserved| field is for future expansion and must be set to NUL
- * bytes.
- */
-typedef struct AvbChainPartitionDescriptor {
-  AvbDescriptor parent_descriptor;
-  uint32_t rollback_index_location;
-  uint32_t partition_name_len;
-  uint32_t public_key_len;
-  uint8_t reserved[64];
-} AVB_ATTR_PACKED AvbChainPartitionDescriptor;
-
-/* Copies |src| to |dest| and validates, byte-swapping fields in the
- * process if needed. Returns true if valid, false if invalid.
- *
- * Data following the struct is not validated nor copied.
- */
-bool avb_chain_partition_descriptor_validate_and_byteswap(
-    const AvbChainPartitionDescriptor* src,
-    AvbChainPartitionDescriptor* dest) AVB_ATTR_WARN_UNUSED_RESULT;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* AVB_CHAIN_PARTITION_DESCRIPTOR_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_CHAIN_PARTITION_DESCRIPTOR_H_
+#define AVB_CHAIN_PARTITION_DESCRIPTOR_H_
+
+#include <android_avb/avb_descriptor.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* A descriptor containing a pointer to signed integrity data stored
+ * on another partition. The descriptor contains the partition name in
+ * question (without the A/B suffix), the public key used to sign the
+ * integrity data, and rollback index location to use for rollback
+ * protection.
+ *
+ * Following this struct are |partition_name_len| bytes of the
+ * partition name (UTF-8 encoded) and |public_key_len| bytes of the
+ * public key.
+ *
+ * The |reserved| field is for future expansion and must be set to NUL
+ * bytes.
+ */
+typedef struct AvbChainPartitionDescriptor {
+  AvbDescriptor parent_descriptor;
+  uint32_t rollback_index_location;
+  uint32_t partition_name_len;
+  uint32_t public_key_len;
+  uint8_t reserved[64];
+} AVB_ATTR_PACKED AvbChainPartitionDescriptor;
+
+/* Copies |src| to |dest| and validates, byte-swapping fields in the
+ * process if needed. Returns true if valid, false if invalid.
+ *
+ * Data following the struct is not validated nor copied.
+ */
+bool avb_chain_partition_descriptor_validate_and_byteswap(
+    const AvbChainPartitionDescriptor* src,
+    AvbChainPartitionDescriptor* dest) AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_CHAIN_PARTITION_DESCRIPTOR_H_ */
diff --git a/include/android_avb/avb_cmdline.h b/include/android_avb/avb_cmdline.h
new file mode 100644
index 0000000000..717381a3f4
--- /dev/null
+++ b/include/android_avb/avb_cmdline.h
@@ -0,0 +1,62 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#ifdef AVB_INSIDE_LIBAVB_H
+#error "You can't include avb_sha.h in the public header libavb.h."
+#endif
+*/
+
+/*
+#ifndef AVB_COMPILATION
+#error "Never include this file, it may only be used from internal avb code."
+#endif
+*/
+
+#ifndef AVB_CMDLINE_H_
+#define AVB_CMDLINE_H_
+
+#include <android_avb/avb_ops.h>
+#include <android_avb/avb_slot_verify.h>
+
+/* Maximum allow length (in bytes) of a partition name, including
+ * ab_suffix.
+ */
+#define AVB_PART_NAME_MAX_SIZE 32
+
+/* Substitutes all variables (e.g. $(ANDROID_SYSTEM_PARTUUID)) with
+ * values. Returns NULL on OOM, otherwise the cmdline with values
+ * replaced.
+ */
+char* avb_sub_cmdline(AvbOps* ops, const char* cmdline, const char* ab_suffix,
+                      bool using_boot_for_vbmeta);
+
+AvbSlotVerifyResult avb_append_options(
+    AvbOps* ops,
+    AvbSlotVerifyData* slot_data,
+    AvbVBMetaImageHeader* toplevel_vbmeta,
+    AvbAlgorithmType algorithm_type,
+    AvbHashtreeErrorMode hashtree_error_mode);
+
+#endif
diff --git a/include/android_avb/avb_crypto.h b/include/android_avb/avb_crypto.h
index a5b790cc55..b99a905d70 100644
--- a/include/android_avb/avb_crypto.h
+++ b/include/android_avb/avb_crypto.h
@@ -1,167 +1,167 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/*
-#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
-#error "Never include this file directly, include libavb.h instead."
-#endif
-*/
-
-#ifndef AVB_CRYPTO_H_
-#define AVB_CRYPTO_H_
-
-#include <android_avb/avb_sysdeps.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Size of a RSA-2048 signature. */
-#define AVB_RSA2048_NUM_BYTES 256
-
-/* Size of a RSA-4096 signature. */
-#define AVB_RSA4096_NUM_BYTES 512
-
-/* Size of a RSA-8192 signature. */
-#define AVB_RSA8192_NUM_BYTES 1024
-
-/* Size in bytes of a SHA-256 digest. */
-#define AVB_SHA256_DIGEST_SIZE 32
-
-/* Size in bytes of a SHA-512 digest. */
-#define AVB_SHA512_DIGEST_SIZE 64
-
-/* Algorithms that can be used in the vbmeta image for
- * verification. An algorithm consists of a hash type and a signature
- * type.
- *
- * The data used to calculate the hash is the three blocks mentioned
- * in the documentation for |AvbVBMetaImageHeader| except for the data
- * in the "Authentication data" block.
- *
- * For signatures with RSA keys, PKCS v1.5 padding is used. The public
- * key data is stored in the auxiliary data block, see
- * |AvbRSAPublicKeyHeader| for the serialization format.
- *
- * Each algorithm type is described below:
- *
- * AVB_ALGORITHM_TYPE_NONE: There is no hash, no signature of the
- * data, and no public key. The data cannot be verified. The fields
- * |hash_size|, |signature_size|, and |public_key_size| must be zero.
- *
- * AVB_ALGORITHM_TYPE_SHA256_RSA2048: The hash function used is
- * SHA-256, resulting in 32 bytes of hash digest data. This hash is
- * signed with a 2048-bit RSA key. The field |hash_size| must be 32,
- * |signature_size| must be 256, and the public key data must have
- * |key_num_bits| set to 2048.
- *
- * AVB_ALGORITHM_TYPE_SHA256_RSA4096: Like above, but only with
- * a 4096-bit RSA key and |signature_size| set to 512.
- *
- * AVB_ALGORITHM_TYPE_SHA256_RSA8192: Like above, but only with
- * a 8192-bit RSA key and |signature_size| set to 1024.
- *
- * AVB_ALGORITHM_TYPE_SHA512_RSA2048: The hash function used is
- * SHA-512, resulting in 64 bytes of hash digest data. This hash is
- * signed with a 2048-bit RSA key. The field |hash_size| must be 64,
- * |signature_size| must be 256, and the public key data must have
- * |key_num_bits| set to 2048.
- *
- * AVB_ALGORITHM_TYPE_SHA512_RSA4096: Like above, but only with
- * a 4096-bit RSA key and |signature_size| set to 512.
- *
- * AVB_ALGORITHM_TYPE_SHA512_RSA8192: Like above, but only with
- * a 8192-bit RSA key and |signature_size| set to 1024.
- */
-typedef enum {
-  AVB_ALGORITHM_TYPE_NONE,
-  AVB_ALGORITHM_TYPE_SHA256_RSA2048,
-  AVB_ALGORITHM_TYPE_SHA256_RSA4096,
-  AVB_ALGORITHM_TYPE_SHA256_RSA8192,
-  AVB_ALGORITHM_TYPE_SHA512_RSA2048,
-  AVB_ALGORITHM_TYPE_SHA512_RSA4096,
-  AVB_ALGORITHM_TYPE_SHA512_RSA8192,
-  _AVB_ALGORITHM_NUM_TYPES
-} AvbAlgorithmType;
-
-/* Holds algorithm-specific data. The |padding| is needed by avb_rsa_verify. */
-typedef struct {
-  const uint8_t* padding;
-  size_t padding_len;
-  size_t hash_len;
-} AvbAlgorithmData;
-
-/* Provides algorithm-specific data for a given |algorithm|. Returns NULL if
- * |algorithm| is invalid.
- */
-const AvbAlgorithmData* avb_get_algorithm_data(AvbAlgorithmType algorithm)
-    AVB_ATTR_WARN_UNUSED_RESULT;
-
-/* The header for a serialized RSA public key.
- *
- * The size of the key is given by |key_num_bits|, for example 2048
- * for a RSA-2048 key. By definition, a RSA public key is the pair (n,
- * e) where |n| is the modulus (which can be represented in
- * |key_num_bits| bits) and |e| is the public exponent. The exponent
- * is not stored since it's assumed to always be 65537.
- *
- * To optimize verification, the key block includes two precomputed
- * values, |n0inv| (fits in 32 bits) and |rr| and can always be
- * represented in |key_num_bits|.
-
- * The value |n0inv| is the value -1/n[0] (mod 2^32). The value |rr|
- * is (2^key_num_bits)^2 (mod n).
- *
- * Following this header is |key_num_bits| bits of |n|, then
- * |key_num_bits| bits of |rr|. Both values are stored with most
- * significant bit first. Each serialized number takes up
- * |key_num_bits|/8 bytes.
- *
- * All fields in this struct are stored in network byte order when
- * serialized.  To generate a copy with fields swapped to native byte
- * order, use the function avb_rsa_public_key_header_validate_and_byteswap().
- *
- * The avb_rsa_verify() function expects a key in this serialized
- * format.
- *
- * The 'avbtool extract_public_key' command can be used to generate a
- * serialized RSA public key.
- */
-typedef struct AvbRSAPublicKeyHeader {
-  uint32_t key_num_bits;
-  uint32_t n0inv;
-} AVB_ATTR_PACKED AvbRSAPublicKeyHeader;
-
-/* Copies |src| to |dest| and validates, byte-swapping fields in the
- * process if needed. Returns true if valid, false if invalid.
- */
-bool avb_rsa_public_key_header_validate_and_byteswap(
-    const AvbRSAPublicKeyHeader* src,
-    AvbRSAPublicKeyHeader* dest) AVB_ATTR_WARN_UNUSED_RESULT;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* AVB_CRYPTO_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_CRYPTO_H_
+#define AVB_CRYPTO_H_
+
+#include <android_avb/avb_sysdeps.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Size of a RSA-2048 signature. */
+#define AVB_RSA2048_NUM_BYTES 256
+
+/* Size of a RSA-4096 signature. */
+#define AVB_RSA4096_NUM_BYTES 512
+
+/* Size of a RSA-8192 signature. */
+#define AVB_RSA8192_NUM_BYTES 1024
+
+/* Size in bytes of a SHA-256 digest. */
+#define AVB_SHA256_DIGEST_SIZE 32
+
+/* Size in bytes of a SHA-512 digest. */
+#define AVB_SHA512_DIGEST_SIZE 64
+
+/* Algorithms that can be used in the vbmeta image for
+ * verification. An algorithm consists of a hash type and a signature
+ * type.
+ *
+ * The data used to calculate the hash is the three blocks mentioned
+ * in the documentation for |AvbVBMetaImageHeader| except for the data
+ * in the "Authentication data" block.
+ *
+ * For signatures with RSA keys, PKCS v1.5 padding is used. The public
+ * key data is stored in the auxiliary data block, see
+ * |AvbRSAPublicKeyHeader| for the serialization format.
+ *
+ * Each algorithm type is described below:
+ *
+ * AVB_ALGORITHM_TYPE_NONE: There is no hash, no signature of the
+ * data, and no public key. The data cannot be verified. The fields
+ * |hash_size|, |signature_size|, and |public_key_size| must be zero.
+ *
+ * AVB_ALGORITHM_TYPE_SHA256_RSA2048: The hash function used is
+ * SHA-256, resulting in 32 bytes of hash digest data. This hash is
+ * signed with a 2048-bit RSA key. The field |hash_size| must be 32,
+ * |signature_size| must be 256, and the public key data must have
+ * |key_num_bits| set to 2048.
+ *
+ * AVB_ALGORITHM_TYPE_SHA256_RSA4096: Like above, but only with
+ * a 4096-bit RSA key and |signature_size| set to 512.
+ *
+ * AVB_ALGORITHM_TYPE_SHA256_RSA8192: Like above, but only with
+ * a 8192-bit RSA key and |signature_size| set to 1024.
+ *
+ * AVB_ALGORITHM_TYPE_SHA512_RSA2048: The hash function used is
+ * SHA-512, resulting in 64 bytes of hash digest data. This hash is
+ * signed with a 2048-bit RSA key. The field |hash_size| must be 64,
+ * |signature_size| must be 256, and the public key data must have
+ * |key_num_bits| set to 2048.
+ *
+ * AVB_ALGORITHM_TYPE_SHA512_RSA4096: Like above, but only with
+ * a 4096-bit RSA key and |signature_size| set to 512.
+ *
+ * AVB_ALGORITHM_TYPE_SHA512_RSA8192: Like above, but only with
+ * a 8192-bit RSA key and |signature_size| set to 1024.
+ */
+typedef enum {
+  AVB_ALGORITHM_TYPE_NONE,
+  AVB_ALGORITHM_TYPE_SHA256_RSA2048,
+  AVB_ALGORITHM_TYPE_SHA256_RSA4096,
+  AVB_ALGORITHM_TYPE_SHA256_RSA8192,
+  AVB_ALGORITHM_TYPE_SHA512_RSA2048,
+  AVB_ALGORITHM_TYPE_SHA512_RSA4096,
+  AVB_ALGORITHM_TYPE_SHA512_RSA8192,
+  _AVB_ALGORITHM_NUM_TYPES
+} AvbAlgorithmType;
+
+/* Holds algorithm-specific data. The |padding| is needed by avb_rsa_verify. */
+typedef struct {
+  const uint8_t* padding;
+  size_t padding_len;
+  size_t hash_len;
+} AvbAlgorithmData;
+
+/* Provides algorithm-specific data for a given |algorithm|. Returns NULL if
+ * |algorithm| is invalid.
+ */
+const AvbAlgorithmData* avb_get_algorithm_data(AvbAlgorithmType algorithm)
+    AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* The header for a serialized RSA public key.
+ *
+ * The size of the key is given by |key_num_bits|, for example 2048
+ * for a RSA-2048 key. By definition, a RSA public key is the pair (n,
+ * e) where |n| is the modulus (which can be represented in
+ * |key_num_bits| bits) and |e| is the public exponent. The exponent
+ * is not stored since it's assumed to always be 65537.
+ *
+ * To optimize verification, the key block includes two precomputed
+ * values, |n0inv| (fits in 32 bits) and |rr| and can always be
+ * represented in |key_num_bits|.
+
+ * The value |n0inv| is the value -1/n[0] (mod 2^32). The value |rr|
+ * is (2^key_num_bits)^2 (mod n).
+ *
+ * Following this header is |key_num_bits| bits of |n|, then
+ * |key_num_bits| bits of |rr|. Both values are stored with most
+ * significant bit first. Each serialized number takes up
+ * |key_num_bits|/8 bytes.
+ *
+ * All fields in this struct are stored in network byte order when
+ * serialized.  To generate a copy with fields swapped to native byte
+ * order, use the function avb_rsa_public_key_header_validate_and_byteswap().
+ *
+ * The avb_rsa_verify() function expects a key in this serialized
+ * format.
+ *
+ * The 'avbtool extract_public_key' command can be used to generate a
+ * serialized RSA public key.
+ */
+typedef struct AvbRSAPublicKeyHeader {
+  uint32_t key_num_bits;
+  uint32_t n0inv;
+} AVB_ATTR_PACKED AvbRSAPublicKeyHeader;
+
+/* Copies |src| to |dest| and validates, byte-swapping fields in the
+ * process if needed. Returns true if valid, false if invalid.
+ */
+bool avb_rsa_public_key_header_validate_and_byteswap(
+    const AvbRSAPublicKeyHeader* src,
+    AvbRSAPublicKeyHeader* dest) AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_CRYPTO_H_ */
diff --git a/include/android_avb/avb_descriptor.h b/include/android_avb/avb_descriptor.h
index 9b0ef2a46f..2af9f5a5c2 100644
--- a/include/android_avb/avb_descriptor.h
+++ b/include/android_avb/avb_descriptor.h
@@ -1,133 +1,133 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/*
-#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
-#error "Never include this file directly, include libavb.h instead."
-#endif
-*/
-
-#ifndef AVB_DESCRIPTOR_H_
-#define AVB_DESCRIPTOR_H_
-
-#include <android_avb/avb_sysdeps.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Well-known descriptor tags.
- *
- * AVB_DESCRIPTOR_TAG_PROPERTY: see |AvbPropertyDescriptor| struct.
- * AVB_DESCRIPTOR_TAG_HASHTREE: see |AvbHashtreeDescriptor| struct.
- * AVB_DESCRIPTOR_TAG_HASH: see |AvbHashDescriptor| struct.
- * AVB_DESCRIPTOR_TAG_KERNEL_CMDLINE: see |AvbKernelCmdlineDescriptor| struct.
- * AVB_DESCRIPTOR_TAG_CHAIN_PARTITION: see |AvbChainPartitionDescriptor| struct.
- */
-typedef enum {
-  AVB_DESCRIPTOR_TAG_PROPERTY,
-  AVB_DESCRIPTOR_TAG_HASHTREE,
-  AVB_DESCRIPTOR_TAG_HASH,
-  AVB_DESCRIPTOR_TAG_KERNEL_CMDLINE,
-  AVB_DESCRIPTOR_TAG_CHAIN_PARTITION,
-} AvbDescriptorTag;
-
-/* The header for a serialized descriptor.
- *
- * A descriptor always have two fields, a |tag| (denoting its type,
- * see the |AvbDescriptorTag| enumeration) and the size of the bytes
- * following, |num_bytes_following|.
- *
- * For padding, |num_bytes_following| is always a multiple of 8.
- */
-typedef struct AvbDescriptor {
-  uint64_t tag;
-  uint64_t num_bytes_following;
-} AVB_ATTR_PACKED AvbDescriptor;
-
-/* Copies |src| to |dest| and validates, byte-swapping fields in the
- * process if needed. Returns true if valid, false if invalid.
- *
- * Data following the struct is not validated nor copied.
- */
-bool avb_descriptor_validate_and_byteswap(
-    const AvbDescriptor* src, AvbDescriptor* dest) AVB_ATTR_WARN_UNUSED_RESULT;
-
-/* Signature for callback function used in avb_descriptor_foreach().
- * The passed in descriptor is given by |descriptor| and the
- * |user_data| passed to avb_descriptor_foreach() function is in
- * |user_data|. Return true to continue iterating, false to stop
- * iterating.
- *
- * Note that |descriptor| points into the image passed to
- * avb_descriptor_foreach() - all fields need to be byteswapped!
- */
-typedef bool AvbDescriptorForeachFunc(const AvbDescriptor* descriptor,
-                                      void* user_data);
-
-/* Convenience function to iterate over all descriptors in an vbmeta
- * image.
- *
- * The function given by |foreach_func| will be called for each
- * descriptor. The given function should return true to continue
- * iterating, false to stop.
- *
- * The |user_data| parameter will be passed to |foreach_func|.
- *
- * Returns false if the iteration was short-circuited, that is if
- * an invocation of |foreach_func| returned false.
- *
- * Before using this function, you MUST verify |image_data| with
- * avb_vbmeta_image_verify() and reject it unless it's signed by a known
- * good public key. Additionally, |image_data| must be word-aligned.
- */
-bool avb_descriptor_foreach(const uint8_t* image_data,
-                            size_t image_size,
-                            AvbDescriptorForeachFunc foreach_func,
-                            void* user_data);
-
-/* Gets all descriptors in a vbmeta image.
- *
- * The return value is a NULL-pointer terminated array of
- * AvbDescriptor pointers. Free with avb_free() when you are done with
- * it. If |out_num_descriptors| is non-NULL, the number of descriptors
- * will be returned there.
- *
- * Note that each AvbDescriptor pointer in the array points into
- * |image_data| - all fields need to be byteswapped!
- *
- * Before using this function, you MUST verify |image_data| with
- * avb_vbmeta_image_verify() and reject it unless it's signed by a known
- * good public key. Additionally, |image_data| must be word-aligned.
- */
-const AvbDescriptor** avb_descriptor_get_all(const uint8_t* image_data,
-                                             size_t image_size,
-                                             size_t* out_num_descriptors)
-    AVB_ATTR_WARN_UNUSED_RESULT;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* AVB_DESCRIPTOR_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_DESCRIPTOR_H_
+#define AVB_DESCRIPTOR_H_
+
+#include <android_avb/avb_sysdeps.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Well-known descriptor tags.
+ *
+ * AVB_DESCRIPTOR_TAG_PROPERTY: see |AvbPropertyDescriptor| struct.
+ * AVB_DESCRIPTOR_TAG_HASHTREE: see |AvbHashtreeDescriptor| struct.
+ * AVB_DESCRIPTOR_TAG_HASH: see |AvbHashDescriptor| struct.
+ * AVB_DESCRIPTOR_TAG_KERNEL_CMDLINE: see |AvbKernelCmdlineDescriptor| struct.
+ * AVB_DESCRIPTOR_TAG_CHAIN_PARTITION: see |AvbChainPartitionDescriptor| struct.
+ */
+typedef enum {
+  AVB_DESCRIPTOR_TAG_PROPERTY,
+  AVB_DESCRIPTOR_TAG_HASHTREE,
+  AVB_DESCRIPTOR_TAG_HASH,
+  AVB_DESCRIPTOR_TAG_KERNEL_CMDLINE,
+  AVB_DESCRIPTOR_TAG_CHAIN_PARTITION,
+} AvbDescriptorTag;
+
+/* The header for a serialized descriptor.
+ *
+ * A descriptor always have two fields, a |tag| (denoting its type,
+ * see the |AvbDescriptorTag| enumeration) and the size of the bytes
+ * following, |num_bytes_following|.
+ *
+ * For padding, |num_bytes_following| is always a multiple of 8.
+ */
+typedef struct AvbDescriptor {
+  uint64_t tag;
+  uint64_t num_bytes_following;
+} AVB_ATTR_PACKED AvbDescriptor;
+
+/* Copies |src| to |dest| and validates, byte-swapping fields in the
+ * process if needed. Returns true if valid, false if invalid.
+ *
+ * Data following the struct is not validated nor copied.
+ */
+bool avb_descriptor_validate_and_byteswap(
+    const AvbDescriptor* src, AvbDescriptor* dest) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Signature for callback function used in avb_descriptor_foreach().
+ * The passed in descriptor is given by |descriptor| and the
+ * |user_data| passed to avb_descriptor_foreach() function is in
+ * |user_data|. Return true to continue iterating, false to stop
+ * iterating.
+ *
+ * Note that |descriptor| points into the image passed to
+ * avb_descriptor_foreach() - all fields need to be byteswapped!
+ */
+typedef bool AvbDescriptorForeachFunc(const AvbDescriptor* descriptor,
+                                      void* user_data);
+
+/* Convenience function to iterate over all descriptors in an vbmeta
+ * image.
+ *
+ * The function given by |foreach_func| will be called for each
+ * descriptor. The given function should return true to continue
+ * iterating, false to stop.
+ *
+ * The |user_data| parameter will be passed to |foreach_func|.
+ *
+ * Returns false if the iteration was short-circuited, that is if
+ * an invocation of |foreach_func| returned false.
+ *
+ * Before using this function, you MUST verify |image_data| with
+ * avb_vbmeta_image_verify() and reject it unless it's signed by a known
+ * good public key. Additionally, |image_data| must be word-aligned.
+ */
+bool avb_descriptor_foreach(const uint8_t* image_data,
+                            size_t image_size,
+                            AvbDescriptorForeachFunc foreach_func,
+                            void* user_data);
+
+/* Gets all descriptors in a vbmeta image.
+ *
+ * The return value is a NULL-pointer terminated array of
+ * AvbDescriptor pointers. Free with avb_free() when you are done with
+ * it. If |out_num_descriptors| is non-NULL, the number of descriptors
+ * will be returned there.
+ *
+ * Note that each AvbDescriptor pointer in the array points into
+ * |image_data| - all fields need to be byteswapped!
+ *
+ * Before using this function, you MUST verify |image_data| with
+ * avb_vbmeta_image_verify() and reject it unless it's signed by a known
+ * good public key. Additionally, |image_data| must be word-aligned.
+ */
+const AvbDescriptor** avb_descriptor_get_all(const uint8_t* image_data,
+                                             size_t image_size,
+                                             size_t* out_num_descriptors)
+    AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_DESCRIPTOR_H_ */
diff --git a/include/android_avb/avb_footer.h b/include/android_avb/avb_footer.h
index 48f2c378d5..668d553adb 100644
--- a/include/android_avb/avb_footer.h
+++ b/include/android_avb/avb_footer.h
@@ -1,88 +1,88 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/*
-#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
-#error "Never include this file directly, include libavb.h instead."
-#endif
-*/
-
-#ifndef AVB_FOOTER_H_
-#define AVB_FOOTER_H_
-
-#include <android_avb/avb_sysdeps.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Magic for the footer. */
-#define AVB_FOOTER_MAGIC "AVBf"
-#define AVB_FOOTER_MAGIC_LEN 4
-
-/* Size of the footer. */
-#define AVB_FOOTER_SIZE 64
-
-/* The current footer version used - keep in sync with avbtool. */
-#define AVB_FOOTER_VERSION_MAJOR 1
-#define AVB_FOOTER_VERSION_MINOR 0
-
-/* The struct used as a footer used on partitions, used to find the
- * AvbVBMetaImageHeader struct. This struct is always stored at the
- * end of a partition.
- */
-typedef struct AvbFooter {
-  /*   0: Four bytes equal to "AVBf" (AVB_FOOTER_MAGIC). */
-  uint8_t magic[AVB_FOOTER_MAGIC_LEN];
-  /*   4: The major version of the footer struct. */
-  uint32_t version_major;
-  /*   8: The minor version of the footer struct. */
-  uint32_t version_minor;
-
-  /*  12: The original size of the image on the partition. */
-  uint64_t original_image_size;
-
-  /*  20: The offset of the |AvbVBMetaImageHeader| struct. */
-  uint64_t vbmeta_offset;
-
-  /*  28: The size of the vbmeta block (header + auth + aux blocks). */
-  uint64_t vbmeta_size;
-
-  /*  36: Padding to ensure struct is size AVB_FOOTER_SIZE bytes. This
-   * must be set to zeroes.
-   */
-  uint8_t reserved[28];
-} AVB_ATTR_PACKED AvbFooter;
-
-/* Copies |src| to |dest| and validates, byte-swapping fields in the
- * process if needed. Returns true if valid, false if invalid.
- */
-bool avb_footer_validate_and_byteswap(const AvbFooter* src, AvbFooter* dest)
-    AVB_ATTR_WARN_UNUSED_RESULT;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* AVB_FOOTER_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_FOOTER_H_
+#define AVB_FOOTER_H_
+
+#include <android_avb/avb_sysdeps.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Magic for the footer. */
+#define AVB_FOOTER_MAGIC "AVBf"
+#define AVB_FOOTER_MAGIC_LEN 4
+
+/* Size of the footer. */
+#define AVB_FOOTER_SIZE 64
+
+/* The current footer version used - keep in sync with avbtool. */
+#define AVB_FOOTER_VERSION_MAJOR 1
+#define AVB_FOOTER_VERSION_MINOR 0
+
+/* The struct used as a footer used on partitions, used to find the
+ * AvbVBMetaImageHeader struct. This struct is always stored at the
+ * end of a partition.
+ */
+typedef struct AvbFooter {
+  /*   0: Four bytes equal to "AVBf" (AVB_FOOTER_MAGIC). */
+  uint8_t magic[AVB_FOOTER_MAGIC_LEN];
+  /*   4: The major version of the footer struct. */
+  uint32_t version_major;
+  /*   8: The minor version of the footer struct. */
+  uint32_t version_minor;
+
+  /*  12: The original size of the image on the partition. */
+  uint64_t original_image_size;
+
+  /*  20: The offset of the |AvbVBMetaImageHeader| struct. */
+  uint64_t vbmeta_offset;
+
+  /*  28: The size of the vbmeta block (header + auth + aux blocks). */
+  uint64_t vbmeta_size;
+
+  /*  36: Padding to ensure struct is size AVB_FOOTER_SIZE bytes. This
+   * must be set to zeroes.
+   */
+  uint8_t reserved[28];
+} AVB_ATTR_PACKED AvbFooter;
+
+/* Copies |src| to |dest| and validates, byte-swapping fields in the
+ * process if needed. Returns true if valid, false if invalid.
+ */
+bool avb_footer_validate_and_byteswap(const AvbFooter* src, AvbFooter* dest)
+    AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_FOOTER_H_ */
diff --git a/include/android_avb/avb_hash_descriptor.h b/include/android_avb/avb_hash_descriptor.h
index 57333ad97a..ef3f27117a 100644
--- a/include/android_avb/avb_hash_descriptor.h
+++ b/include/android_avb/avb_hash_descriptor.h
@@ -1,75 +1,75 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/*
-#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
-#error "Never include this file directly, include libavb.h instead."
-#endif
-*/
-
-#ifndef AVB_HASH_DESCRIPTOR_H_
-#define AVB_HASH_DESCRIPTOR_H_
-
-#include <android_avb/avb_descriptor.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* A descriptor containing information about hash for an image.
- *
- * This descriptor is typically used for boot partitions to verify the
- * entire kernel+initramfs image before executing it.
- *
- * Following this struct are |partition_name_len| bytes of the
- * partition name (UTF-8 encoded), |salt_len| bytes of salt, and then
- * |digest_len| bytes of the digest.
- *
- * The |reserved| field is for future expansion and must be set to NUL
- * bytes.
- */
-typedef struct AvbHashDescriptor {
-  AvbDescriptor parent_descriptor;
-  uint64_t image_size;
-  uint8_t hash_algorithm[32];
-  uint32_t partition_name_len;
-  uint32_t salt_len;
-  uint32_t digest_len;
-  uint8_t reserved[64];
-} AVB_ATTR_PACKED AvbHashDescriptor;
-
-/* Copies |src| to |dest| and validates, byte-swapping fields in the
- * process if needed. Returns true if valid, false if invalid.
- *
- * Data following the struct is not validated nor copied.
- */
-bool avb_hash_descriptor_validate_and_byteswap(const AvbHashDescriptor* src,
-                                               AvbHashDescriptor* dest)
-    AVB_ATTR_WARN_UNUSED_RESULT;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* AVB_HASH_DESCRIPTOR_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_HASH_DESCRIPTOR_H_
+#define AVB_HASH_DESCRIPTOR_H_
+
+#include <android_avb/avb_descriptor.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* A descriptor containing information about hash for an image.
+ *
+ * This descriptor is typically used for boot partitions to verify the
+ * entire kernel+initramfs image before executing it.
+ *
+ * Following this struct are |partition_name_len| bytes of the
+ * partition name (UTF-8 encoded), |salt_len| bytes of salt, and then
+ * |digest_len| bytes of the digest.
+ *
+ * The |reserved| field is for future expansion and must be set to NUL
+ * bytes.
+ */
+typedef struct AvbHashDescriptor {
+  AvbDescriptor parent_descriptor;
+  uint64_t image_size;
+  uint8_t hash_algorithm[32];
+  uint32_t partition_name_len;
+  uint32_t salt_len;
+  uint32_t digest_len;
+  uint8_t reserved[64];
+} AVB_ATTR_PACKED AvbHashDescriptor;
+
+/* Copies |src| to |dest| and validates, byte-swapping fields in the
+ * process if needed. Returns true if valid, false if invalid.
+ *
+ * Data following the struct is not validated nor copied.
+ */
+bool avb_hash_descriptor_validate_and_byteswap(const AvbHashDescriptor* src,
+                                               AvbHashDescriptor* dest)
+    AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_HASH_DESCRIPTOR_H_ */
diff --git a/include/android_avb/avb_hashtree_descriptor.h b/include/android_avb/avb_hashtree_descriptor.h
index e4e0218c0e..d579275e73 100644
--- a/include/android_avb/avb_hashtree_descriptor.h
+++ b/include/android_avb/avb_hashtree_descriptor.h
@@ -1,85 +1,85 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/*
-#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
-#error "Never include this file directly, include libavb.h instead."
-#endif
-*/
-
-#ifndef AVB_HASHTREE_DESCRIPTOR_H_
-#define AVB_HASHTREE_DESCRIPTOR_H_
-
-#include <android_avb/avb_descriptor.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* A descriptor containing information about a dm-verity hashtree.
- *
- * Hash-trees are used to verify large partitions typically containing
- * file systems. See
- * https://gitlab.com/cryptsetup/cryptsetup/wikis/DMVerity for more
- * information about dm-verity.
- *
- * Following this struct are |partition_name_len| bytes of the
- * partition name (UTF-8 encoded), |salt_len| bytes of salt, and then
- * |root_digest_len| bytes of the root digest.
- *
- * The |reserved| field is for future expansion and must be set to NUL
- * bytes.
- */
-typedef struct AvbHashtreeDescriptor {
-  AvbDescriptor parent_descriptor;
-  uint32_t dm_verity_version;
-  uint64_t image_size;
-  uint64_t tree_offset;
-  uint64_t tree_size;
-  uint32_t data_block_size;
-  uint32_t hash_block_size;
-  uint32_t fec_num_roots;
-  uint64_t fec_offset;
-  uint64_t fec_size;
-  uint8_t hash_algorithm[32];
-  uint32_t partition_name_len;
-  uint32_t salt_len;
-  uint32_t root_digest_len;
-  uint8_t reserved[64];
-} AVB_ATTR_PACKED AvbHashtreeDescriptor;
-
-/* Copies |src| to |dest| and validates, byte-swapping fields in the
- * process if needed. Returns true if valid, false if invalid.
- *
- * Data following the struct is not validated nor copied.
- */
-bool avb_hashtree_descriptor_validate_and_byteswap(
-    const AvbHashtreeDescriptor* src,
-    AvbHashtreeDescriptor* dest) AVB_ATTR_WARN_UNUSED_RESULT;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* AVB_HASHTREE_DESCRIPTOR_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_HASHTREE_DESCRIPTOR_H_
+#define AVB_HASHTREE_DESCRIPTOR_H_
+
+#include <android_avb/avb_descriptor.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* A descriptor containing information about a dm-verity hashtree.
+ *
+ * Hash-trees are used to verify large partitions typically containing
+ * file systems. See
+ * https://gitlab.com/cryptsetup/cryptsetup/wikis/DMVerity for more
+ * information about dm-verity.
+ *
+ * Following this struct are |partition_name_len| bytes of the
+ * partition name (UTF-8 encoded), |salt_len| bytes of salt, and then
+ * |root_digest_len| bytes of the root digest.
+ *
+ * The |reserved| field is for future expansion and must be set to NUL
+ * bytes.
+ */
+typedef struct AvbHashtreeDescriptor {
+  AvbDescriptor parent_descriptor;
+  uint32_t dm_verity_version;
+  uint64_t image_size;
+  uint64_t tree_offset;
+  uint64_t tree_size;
+  uint32_t data_block_size;
+  uint32_t hash_block_size;
+  uint32_t fec_num_roots;
+  uint64_t fec_offset;
+  uint64_t fec_size;
+  uint8_t hash_algorithm[32];
+  uint32_t partition_name_len;
+  uint32_t salt_len;
+  uint32_t root_digest_len;
+  uint8_t reserved[64];
+} AVB_ATTR_PACKED AvbHashtreeDescriptor;
+
+/* Copies |src| to |dest| and validates, byte-swapping fields in the
+ * process if needed. Returns true if valid, false if invalid.
+ *
+ * Data following the struct is not validated nor copied.
+ */
+bool avb_hashtree_descriptor_validate_and_byteswap(
+    const AvbHashtreeDescriptor* src,
+    AvbHashtreeDescriptor* dest) AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_HASHTREE_DESCRIPTOR_H_ */
diff --git a/include/android_avb/avb_kernel_cmdline_descriptor.h b/include/android_avb/avb_kernel_cmdline_descriptor.h
index aee042cded..af9bba2f66 100644
--- a/include/android_avb/avb_kernel_cmdline_descriptor.h
+++ b/include/android_avb/avb_kernel_cmdline_descriptor.h
@@ -1,83 +1,83 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/*
-#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
-#error "Never include this file directly, include libavb.h instead."
-#endif
-*/
-
-#ifndef AVB_KERNEL_CMDLINE_DESCRIPTOR_H_
-#define AVB_KERNEL_CMDLINE_DESCRIPTOR_H_
-
-#include <android_avb/avb_descriptor.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Flags for kernel command-line descriptors.
- *
- * AVB_KERNEL_CMDLINE_FLAGS_USE_ONLY_IF_HASHTREE_NOT_DISABLED: The
- * cmdline will only be applied if hashtree verification is not
- * disabled (cf. AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED).
- *
- * AVB_KERNEL_CMDLINE_FLAGS_USE_ONLY_IF_HASHTREE_DISABLED: The cmdline
- * will only be applied if hashtree verification is disabled
- * (cf. AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED).
- */
-typedef enum {
-  AVB_KERNEL_CMDLINE_FLAGS_USE_ONLY_IF_HASHTREE_NOT_DISABLED = (1 << 0),
-  AVB_KERNEL_CMDLINE_FLAGS_USE_ONLY_IF_HASHTREE_DISABLED = (1 << 1)
-} AvbKernelCmdlineFlags;
-
-/* A descriptor containing information to be appended to the kernel
- * command-line.
- *
- * The |flags| field contains flags from the AvbKernelCmdlineFlags
- * enumeration.
- *
- * Following this struct are |kernel_cmdline_len| bytes with the
- * kernel command-line (UTF-8 encoded).
- */
-typedef struct AvbKernelCmdlineDescriptor {
-  AvbDescriptor parent_descriptor;
-  uint32_t flags;
-  uint32_t kernel_cmdline_length;
-} AVB_ATTR_PACKED AvbKernelCmdlineDescriptor;
-
-/* Copies |src| to |dest| and validates, byte-swapping fields in the
- * process if needed. Returns true if valid, false if invalid.
- *
- * Data following the struct is not validated nor copied.
- */
-bool avb_kernel_cmdline_descriptor_validate_and_byteswap(
-    const AvbKernelCmdlineDescriptor* src,
-    AvbKernelCmdlineDescriptor* dest) AVB_ATTR_WARN_UNUSED_RESULT;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* AVB_KERNEL_CMDLINE_DESCRIPTOR_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_KERNEL_CMDLINE_DESCRIPTOR_H_
+#define AVB_KERNEL_CMDLINE_DESCRIPTOR_H_
+
+#include <android_avb/avb_descriptor.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Flags for kernel command-line descriptors.
+ *
+ * AVB_KERNEL_CMDLINE_FLAGS_USE_ONLY_IF_HASHTREE_NOT_DISABLED: The
+ * cmdline will only be applied if hashtree verification is not
+ * disabled (cf. AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED).
+ *
+ * AVB_KERNEL_CMDLINE_FLAGS_USE_ONLY_IF_HASHTREE_DISABLED: The cmdline
+ * will only be applied if hashtree verification is disabled
+ * (cf. AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED).
+ */
+typedef enum {
+  AVB_KERNEL_CMDLINE_FLAGS_USE_ONLY_IF_HASHTREE_NOT_DISABLED = (1 << 0),
+  AVB_KERNEL_CMDLINE_FLAGS_USE_ONLY_IF_HASHTREE_DISABLED = (1 << 1)
+} AvbKernelCmdlineFlags;
+
+/* A descriptor containing information to be appended to the kernel
+ * command-line.
+ *
+ * The |flags| field contains flags from the AvbKernelCmdlineFlags
+ * enumeration.
+ *
+ * Following this struct are |kernel_cmdline_len| bytes with the
+ * kernel command-line (UTF-8 encoded).
+ */
+typedef struct AvbKernelCmdlineDescriptor {
+  AvbDescriptor parent_descriptor;
+  uint32_t flags;
+  uint32_t kernel_cmdline_length;
+} AVB_ATTR_PACKED AvbKernelCmdlineDescriptor;
+
+/* Copies |src| to |dest| and validates, byte-swapping fields in the
+ * process if needed. Returns true if valid, false if invalid.
+ *
+ * Data following the struct is not validated nor copied.
+ */
+bool avb_kernel_cmdline_descriptor_validate_and_byteswap(
+    const AvbKernelCmdlineDescriptor* src,
+    AvbKernelCmdlineDescriptor* dest) AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_KERNEL_CMDLINE_DESCRIPTOR_H_ */
diff --git a/include/android_avb/avb_ops.h b/include/android_avb/avb_ops.h
index 0900b0e0be..2a418454d4 100644
--- a/include/android_avb/avb_ops.h
+++ b/include/android_avb/avb_ops.h
@@ -1,231 +1,256 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/*
-#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
-#error "Never include this file directly, include libavb.h instead."
-#endif
-*/
-
-#ifndef AVB_OPS_H_
-#define AVB_OPS_H_
-
-#include <android_avb/avb_sysdeps.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Return codes used for I/O operations.
- *
- * AVB_IO_RESULT_OK is returned if the requested operation was
- * successful.
- *
- * AVB_IO_RESULT_ERROR_IO is returned if the underlying hardware (disk
- * or other subsystem) encountered an I/O error.
- *
- * AVB_IO_RESULT_ERROR_OOM is returned if unable to allocate memory.
- *
- * AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION is returned if the requested
- * partition does not exist.
- *
- * AVB_IO_RESULT_ERROR_RANGE_OUTSIDE_PARTITION is returned if the
- * range of bytes requested to be read or written is outside the range
- * of the partition.
- */
-typedef enum {
-	AVB_IO_RESULT_OK,
-	AVB_IO_RESULT_ERROR_OOM,
-	AVB_IO_RESULT_ERROR_IO,
-	AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION,
-	AVB_IO_RESULT_ERROR_RANGE_OUTSIDE_PARTITION
-} AvbIOResult;
-
-struct AvbOps;
-typedef struct AvbOps AvbOps;
-
-/* Forward-declaration of operations in libavb_ab. */
-struct AvbABOps;
-
-/* Forward-declaration of operations in libavb_atx. */
-struct AvbAtxOps;
-
-/* High-level operations/functions/methods that are platform
- * dependent.
- *
- * Operations may be added in the future so when implementing it
- * always make sure to zero out sizeof(AvbOps) bytes of the struct to
- * ensure that unimplemented operations are set to NULL.
- */
-struct AvbOps {
-	/* This pointer can be used by the application/bootloader using
-	 * libavb and is typically used in each operation to get a pointer
-	 * to platform-specific resources. It cannot be used by libraries.
-	 */
-	void* user_data;
-
-	/* If libavb_ab is used, this should point to the
-	 * AvbABOps. Otherwise it must be set to NULL.
-	 */
-	struct AvbABOps* ab_ops;
-
-	/* If libavb_atx is used, this should point to the
-	 * AvbAtxOps. Otherwise it must be set to NULL.
-	 */
-	struct AvbAtxOps* atx_ops;
-
-	/* Reads |num_bytes| from offset |offset| from partition with name
-	 * |partition| (NUL-terminated UTF-8 string). If |offset| is
-	 * negative, its absolute value should be interpreted as the number
-	 * of bytes from the end of the partition.
-	 *
-	 * This function returns AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION if
-	 * there is no partition with the given name,
-	 * AVB_IO_RESULT_ERROR_RANGE_OUTSIDE_PARTITION if the requested
-	 * |offset| is outside the partition, and AVB_IO_RESULT_ERROR_IO if
-	 * there was an I/O error from the underlying I/O subsystem.  If the
-	 * operation succeeds as requested AVB_IO_RESULT_OK is returned and
-	 * the data is available in |buffer|.
-	 *
-	 * The only time partial I/O may occur is if reading beyond the end
-	 * of the partition. In this case the value returned in
-	 * |out_num_read| may be smaller than |num_bytes|.
-	 */
-	AvbIOResult (*read_from_partition)(AvbOps* ops,
-                                       const char* partition,
-                                       int64_t offset,
-                                       size_t num_bytes,
-                                       void* buffer,
-                                       size_t* out_num_read);
-
-	/* Writes |num_bytes| from |bffer| at offset |offset| to partition
-	 * with name |partition| (NUL-terminated UTF-8 string). If |offset|
-	 * is negative, its absolute value should be interpreted as the
-	 * number of bytes from the end of the partition.
-	 *
-	 * This function returns AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION if
-	 * there is no partition with the given name,
-	 * AVB_IO_RESULT_ERROR_RANGE_OUTSIDE_PARTITION if the requested
-	 * byterange goes outside the partition, and AVB_IO_RESULT_ERROR_IO
-	 * if there was an I/O error from the underlying I/O subsystem.  If
-	 * the operation succeeds as requested AVB_IO_RESULT_OK is
-	 * returned.
-	 *
-	 * This function never does any partial I/O, it either transfers all
-	 * of the requested bytes or returns an error.
-	 */
-	AvbIOResult (*write_to_partition)(AvbOps* ops,
-                                      const char* partition,
-                                      int64_t offset,
-                                      size_t num_bytes,
-                                      const void* buffer);
-
-	/* Checks if the given public key used to sign the 'vbmeta'
-	 * partition is trusted. Boot loaders typically compare this with
-	 * embedded key material generated with 'avbtool
-	 * extract_public_key'.
-	 *
-	 * The public key is in the array pointed to by |public_key_data|
-	 * and is of |public_key_length| bytes.
-	 *
-	 * If there is no public key metadata (set with the avbtool option
-	 * --public_key_metadata) then |public_key_metadata| will be set to
-	 * NULL. Otherwise this field points to the data which is
-	 * |public_key_metadata_length| bytes long.
-	 *
-	 * If AVB_IO_RESULT_OK is returned then |out_is_trusted| is set -
-	 * true if trusted or false if untrusted.
-	 */
-	AvbIOResult (*validate_vbmeta_public_key)(AvbOps* ops,
-                                            	  const uint8_t* public_key_data,
-                                            	  size_t public_key_length,
-                                            	  const uint8_t* public_key_metadata,
-                                            	  size_t public_key_metadata_length,
-                                            	  bool* out_is_trusted);
-
-	/* Gets the rollback index corresponding to the location given by
-	 * |rollback_index_location|. The value is returned in
-	 * |out_rollback_index|. Returns AVB_IO_RESULT_OK if the rollback
-	 * index was retrieved, otherwise an error code.
-	 *
-	 * A device may have a limited amount of rollback index locations (say,
-	 * one or four) so may error out if |rollback_index_location| exceeds
-	 * this number.
-	 */
-	AvbIOResult (*read_rollback_index)(AvbOps* ops,
-                                     	   size_t rollback_index_location,
-                                     	   uint64_t* out_rollback_index);
-
-	/* Sets the rollback index corresponding to the location given by
-	 * |rollback_index_location| to |rollback_index|. Returns
-	 * AVB_IO_RESULT_OK if the rollback index was set, otherwise an
-	 * error code.
-	 *
-	 * A device may have a limited amount of rollback index locations (say,
-	 * one or four) so may error out if |rollback_index_location| exceeds
-	 * this number.
-	 */
-	AvbIOResult (*write_rollback_index)(AvbOps* ops,
-                                      	    size_t rollback_index_location,
-                                      	    uint64_t rollback_index);
-
-	/* Gets whether the device is unlocked. The value is returned in
-	 * |out_is_unlocked| (true if unlocked, false otherwise). Returns
-	 * AVB_IO_RESULT_OK if the state was retrieved, otherwise an error
-	 * code.
-	 */
-	AvbIOResult (*read_is_device_unlocked)(AvbOps* ops, bool* out_is_unlocked);
-	AvbIOResult (*write_is_device_unlocked)(AvbOps* ops, bool* out_is_unlocked);
-
-	/* Gets the unique partition GUID for a partition with name in
-	 * |partition| (NUL-terminated UTF-8 string). The GUID is copied as
-	 * a string into |guid_buf| of size |guid_buf_size| and will be NUL
-	 * terminated. The string must be lower-case and properly
-	 * hyphenated. For example:
-	 *
-	 *  527c1c6d-6361-4593-8842-3c78fcd39219
-	 *
-	 * Returns AVB_IO_RESULT_OK on success, otherwise an error code.
-	 */
-	 AvbIOResult (*get_unique_guid_for_partition)(AvbOps* ops,
-                                                      const char* partition,
-                                                      char* guid_buf,
-                                                      size_t guid_buf_size);
-
-	/* Gets the size of a partition with the name in |partition|
-	 * (NUL-terminated UTF-8 string). Returns the value in
-	 * |out_size_num_bytes|.
-	 *
-	 * Returns AVB_IO_RESULT_OK on success, otherwise an error code.
-	 */
-	AvbIOResult (*get_size_of_partition)(AvbOps* ops,
-                                       	     const char* partition,
-                                             uint64_t* out_size_num_bytes);
-};
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* AVB_OPS_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_OPS_H_
+#define AVB_OPS_H_
+
+#include <android_avb/avb_sysdeps.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Return codes used for I/O operations.
+ *
+ * AVB_IO_RESULT_OK is returned if the requested operation was
+ * successful.
+ *
+ * AVB_IO_RESULT_ERROR_IO is returned if the underlying hardware (disk
+ * or other subsystem) encountered an I/O error.
+ *
+ * AVB_IO_RESULT_ERROR_OOM is returned if unable to allocate memory.
+ *
+ * AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION is returned if the requested
+ * partition does not exist.
+ *
+ * AVB_IO_RESULT_ERROR_RANGE_OUTSIDE_PARTITION is returned if the
+ * range of bytes requested to be read or written is outside the range
+ * of the partition.
+ */
+typedef enum {
+  AVB_IO_RESULT_OK,
+  AVB_IO_RESULT_ERROR_OOM,
+  AVB_IO_RESULT_ERROR_IO,
+  AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION,
+  AVB_IO_RESULT_ERROR_RANGE_OUTSIDE_PARTITION
+} AvbIOResult;
+
+struct AvbOps;
+typedef struct AvbOps AvbOps;
+
+/* Forward-declaration of operations in libavb_ab. */
+struct AvbABOps;
+
+/* Forward-declaration of operations in libavb_atx. */
+struct AvbAtxOps;
+
+/* High-level operations/functions/methods that are platform
+ * dependent.
+ *
+ * Operations may be added in the future so when implementing it
+ * always make sure to zero out sizeof(AvbOps) bytes of the struct to
+ * ensure that unimplemented operations are set to NULL.
+ */
+struct AvbOps {
+  /* This pointer can be used by the application/bootloader using
+   * libavb and is typically used in each operation to get a pointer
+   * to platform-specific resources. It cannot be used by libraries.
+   */
+  void* user_data;
+
+  /* If libavb_ab is used, this should point to the
+   * AvbABOps. Otherwise it must be set to NULL.
+   */
+  struct AvbABOps* ab_ops;
+
+  /* If libavb_atx is used, this should point to the
+   * AvbAtxOps. Otherwise it must be set to NULL.
+   */
+  struct AvbAtxOps* atx_ops;
+
+  /* Reads |num_bytes| from offset |offset| from partition with name
+   * |partition| (NUL-terminated UTF-8 string). If |offset| is
+   * negative, its absolute value should be interpreted as the number
+   * of bytes from the end of the partition.
+   *
+   * This function returns AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION if
+   * there is no partition with the given name,
+   * AVB_IO_RESULT_ERROR_RANGE_OUTSIDE_PARTITION if the requested
+   * |offset| is outside the partition, and AVB_IO_RESULT_ERROR_IO if
+   * there was an I/O error from the underlying I/O subsystem.  If the
+   * operation succeeds as requested AVB_IO_RESULT_OK is returned and
+   * the data is available in |buffer|.
+   *
+   * The only time partial I/O may occur is if reading beyond the end
+   * of the partition. In this case the value returned in
+   * |out_num_read| may be smaller than |num_bytes|.
+   */
+  AvbIOResult (*read_from_partition)(AvbOps* ops,
+                                     const char* partition,
+                                     int64_t offset,
+                                     size_t num_bytes,
+                                     void* buffer,
+                                     size_t* out_num_read);
+
+  /* Gets the starting pointer of a partition that is pre-loaded in memory, and
+   * save it to |out_pointer|. The preloaded partition is expected to be
+   * |num_bytes|, where the actual preloaded byte count is returned in
+   * |out_num_bytes_preloaded|. |out_num_bytes_preloaded| must be no larger than
+   * |num_bytes|.
+   *
+   * This provides an alternative way to access a partition that is preloaded
+   * into memory without a full memory copy. When this function pointer is not
+   * set (has value NULL), or when the |out_pointer| is set to NULL as a result,
+   * |read_from_partition| will be used as the fallback. This function is mainly
+   * used for accessing the entire partition content to calculate its hash.
+   *
+   * Preloaded partition data must outlive the lifespan of the
+   * |AvbSlotVerifyData| structure that |avb_slot_verify| outputs.
+   */
+  AvbIOResult (*get_preloaded_partition)(AvbOps* ops,
+                                         const char* partition,
+                                         size_t num_bytes,
+                                         uint8_t** out_pointer,
+                                         size_t* out_num_bytes_preloaded);
+
+  /* Writes |num_bytes| from |bffer| at offset |offset| to partition
+   * with name |partition| (NUL-terminated UTF-8 string). If |offset|
+   * is negative, its absolute value should be interpreted as the
+   * number of bytes from the end of the partition.
+   *
+   * This function returns AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION if
+   * there is no partition with the given name,
+   * AVB_IO_RESULT_ERROR_RANGE_OUTSIDE_PARTITION if the requested
+   * byterange goes outside the partition, and AVB_IO_RESULT_ERROR_IO
+   * if there was an I/O error from the underlying I/O subsystem.  If
+   * the operation succeeds as requested AVB_IO_RESULT_OK is
+   * returned.
+   *
+   * This function never does any partial I/O, it either transfers all
+   * of the requested bytes or returns an error.
+   */
+  AvbIOResult (*write_to_partition)(AvbOps* ops,
+                                    const char* partition,
+                                    int64_t offset,
+                                    size_t num_bytes,
+                                    const void* buffer);
+
+  /* Checks if the given public key used to sign the 'vbmeta'
+   * partition is trusted. Boot loaders typically compare this with
+   * embedded key material generated with 'avbtool
+   * extract_public_key'.
+   *
+   * The public key is in the array pointed to by |public_key_data|
+   * and is of |public_key_length| bytes.
+   *
+   * If there is no public key metadata (set with the avbtool option
+   * --public_key_metadata) then |public_key_metadata| will be set to
+   * NULL. Otherwise this field points to the data which is
+   * |public_key_metadata_length| bytes long.
+   *
+   * If AVB_IO_RESULT_OK is returned then |out_is_trusted| is set -
+   * true if trusted or false if untrusted.
+   */
+  AvbIOResult (*validate_vbmeta_public_key)(AvbOps* ops,
+                                            const uint8_t* public_key_data,
+                                            size_t public_key_length,
+                                            const uint8_t* public_key_metadata,
+                                            size_t public_key_metadata_length,
+                                            bool* out_is_trusted);
+
+  /* Gets the rollback index corresponding to the location given by
+   * |rollback_index_location|. The value is returned in
+   * |out_rollback_index|. Returns AVB_IO_RESULT_OK if the rollback
+   * index was retrieved, otherwise an error code.
+   *
+   * A device may have a limited amount of rollback index locations (say,
+   * one or four) so may error out if |rollback_index_location| exceeds
+   * this number.
+   */
+  AvbIOResult (*read_rollback_index)(AvbOps* ops,
+                                     size_t rollback_index_location,
+                                     uint64_t* out_rollback_index);
+
+  /* Sets the rollback index corresponding to the location given by
+   * |rollback_index_location| to |rollback_index|. Returns
+   * AVB_IO_RESULT_OK if the rollback index was set, otherwise an
+   * error code.
+   *
+   * A device may have a limited amount of rollback index locations (say,
+   * one or four) so may error out if |rollback_index_location| exceeds
+   * this number.
+   */
+  AvbIOResult (*write_rollback_index)(AvbOps* ops,
+                                      size_t rollback_index_location,
+                                      uint64_t rollback_index);
+
+  /* Gets whether the device is unlocked. The value is returned in
+   * |out_is_unlocked| (true if unlocked, false otherwise). Returns
+   * AVB_IO_RESULT_OK if the state was retrieved, otherwise an error
+   * code.
+   */
+  AvbIOResult (*read_is_device_unlocked)(AvbOps* ops, bool* out_is_unlocked);
+
+  /* write the device lock flag. Returns
+   * AVB_IO_RESULT_OK if the state was retrieved, otherwise an error
+   * code.
+   */
+  AvbIOResult (*write_is_device_unlocked)(AvbOps* ops, bool* out_is_unlocked);
+  /* Gets the unique partition GUID for a partition with name in
+   * |partition| (NUL-terminated UTF-8 string). The GUID is copied as
+   * a string into |guid_buf| of size |guid_buf_size| and will be NUL
+   * terminated. The string must be lower-case and properly
+   * hyphenated. For example:
+   *
+   *  527c1c6d-6361-4593-8842-3c78fcd39219
+   *
+   * Returns AVB_IO_RESULT_OK on success, otherwise an error code.
+   */
+  AvbIOResult (*get_unique_guid_for_partition)(AvbOps* ops,
+                                               const char* partition,
+                                               char* guid_buf,
+                                               size_t guid_buf_size);
+
+  /* Gets the size of a partition with the name in |partition|
+   * (NUL-terminated UTF-8 string). Returns the value in
+   * |out_size_num_bytes|.
+   *
+   * Returns AVB_IO_RESULT_OK on success, otherwise an error code.
+   */
+  AvbIOResult (*get_size_of_partition)(AvbOps* ops,
+                                       const char* partition,
+                                       uint64_t* out_size_num_bytes);
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_OPS_H_ */
diff --git a/include/android_avb/avb_ops_user.h b/include/android_avb/avb_ops_user.h
index ad57615aa6..36a98da08e 100644
--- a/include/android_avb/avb_ops_user.h
+++ b/include/android_avb/avb_ops_user.h
@@ -1,238 +1,70 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#ifndef AVB_OPS_USER_H_
-#define AVB_OPS_USER_H_
-
-#include <android_avb/libavb.h>
-#include <android_avb/avb_ab_flow.h>
-
-#define PERM_ATTR_DIGEST_SIZE 32
-#define PERM_ATTR_TOTAL_SIZE  1084
-#define VBOOT_KEY_HASH_SIZE   32
-
-/* Allocates an AvbOps instance suitable for use in Android userspace
- * on the device. Returns NULL on OOM.
- *
- * The returned AvbOps has the following characteristics:
- *
- * - The read_from_partition(), write_to_partition(), and
- *   get_size_of_partition() operations are implemented, however for
- *   these operations to work the fstab file on the device must have a
- *   /misc entry using a by-name device file scheme and the containing
- *   by-name/ subdirectory must have files for other partitions.
- *
- * - The remaining operations are implemented and never fails and
- *   return the following values:
- *   - validate_vbmeta_public_key(): always returns |true|.
- *   - read_rollback_index(): returns 0 for any roolback index.
- *   - write_rollback_index(): no-op.
- *   - read_is_device_unlocked(): always returns |true|.
- *   - get_unique_guid_for_partition(): always returns the empty string.
- *
- * - The |ab_ops| member will point to a valid AvbABOps instance
- *   implemented via libavb_ab/. This should only be used if the AVB
- *   A/B stack is used on the device. This is what is used in
- *   bootctrl.avb boot control implementation.
- *
- * Free with avb_ops_user_free().
- */
-AvbOps* avb_ops_user_new(void);
-
-/* Frees an AvbOps instance previously allocated with avb_ops_device_new(). */
-void avb_ops_user_free(AvbOps* ops);
-
-/**
- * Provided to fastboot to read how many slot in this system.
- *
- * @param slot_count  We use parameter slot_count to obtain
- *                    how many slots in the system.
- *
- * @return 0 if the command succeeded, -1 if it failed
- */
-int avb_read_slot_count(char *slot_count);
-
-/**
- * The android things supply many slots, their name like '_a', '_b'.
- * We can use this function to read current slot is '_a' or '_b'.
- *
- * @slot_suffixes  read value '_a' or '_b'.
- *
- * @return 0 if the command succeeded, -1 if it failed
- */
-int avb_read_slot_suffixes(char *slot_suffixes);
-
-/**
- * Use this function to set which slot boot first.
- *
- * @param slot_number set '0' or '1'
- *
- * @return 0 if the command succeeded, -1 if it failed
- */
-int avb_set_slot_active(unsigned int *slot_number);
-
-/**
- * Get current slot: '_a' or '_b'.
- *
- * @param select_slot  obtain current slot.
- *
- * @return 0 if the command succeeded, -1 if it failed
- */
-int avb_get_current_slot(char *select_slot);
-
-/**
- * The android things defines permanent attributes to
- * store PSK_public, product id. We can use this function
- * to read them.
- *
- * @param attributes  PSK_public, product id....
- *
- * @param size        The size of attributes.
- *
- * @return 0 if the command succeeded, -1 if it failed
- */
-int avb_read_permanent_attributes(uint8_t *attributes, uint32_t size);
-
-/**
- * The android things defines permanent attributes to
- * store PSK_public, product id. We can use this function
- * to write them.
- *
- * @param attributes  PSK_public, product id....
- *
- * @param size        The size of attributes.
- *
- * @return 0 if the command succeeded, -1 if it failed
- */
-int avb_write_permanent_attributes(uint8_t *attributes, uint32_t size);
-
-/**
- * The funtion can be use to read the device state to judge
- * whether the device can be flash.
- *
- * @param flash_lock_state  A flag indicate the device flash state.
- *
- * @return 0 if the command succeeded, -1 if it failed
- */
-int avb_read_flash_lock_state(uint8_t *flash_lock_state);
-
-/**
- * The function is provided to write device flash state.
- *
- * @param flash_lock_state   A flag indicate the device flash state.
- *
- * @return 0 if the command succeeded, -1 if it failed
- */
-int avb_write_flash_lock_state(uint8_t flash_lock_state);
-
-/**
- * The android things use the flag of lock state to indicate
- * whether the device can be booted when verified error.
- *
- * @param lock_state  A flag indicate the device lock state.
- *
- * @return 0 if the command succeeded, -1 if it failed
- */
-int avb_read_lock_state(uint8_t *lock_state);
-
-/**
- * The android things use the flag of lock state to indicate
- * whether the device can be booted when verified error.
- *
- * @param lock_state   A flag indicate the device lock state.
- *
- * @return 0 if the command succeeded, -1 if it failed
- */
-int avb_write_lock_state(uint8_t lock_state);
-
-/**
- * The android things uses fastboot to flash the permanent attributes.
- * And if them were written, there must have a flag to indicate.
- *
- * @param flag   indicate the permanent attributes have been written
- *               or not.
- *
- * @return 0 if the command succeeded, -1 if it failed
- */
-int avb_read_perm_attr_flag(uint8_t *flag);
-
-/**
- * The android things uses fastboot to flash the permanent attributes.
- * And if them were written, there must have a flag to indicate.
- *
- * @param flag   We can call this function to write the flag '1'
- *               to indicate the permanent attributes has been
- *               written.
- *
- * @return 0 if the command succeeded, -1 if it failed
- */
-int avb_write_perm_attr_flag(uint8_t flag);
-
-/**
- * The android things require the soc-v key hash to be flashed
- * using the fastboot. So the function can be used in fastboot
- * to flash the key hash.
- *
- * @param buf    The vboot key hash data.
- *
- * @param length The length of key hash.
- *
- * @return 0 if the command succeeded, -1 if it failed
- */
-int avb_read_vbootkey_hash(uint8_t *buf, uint8_t length);
-
-/**
- * The android things require the soc-v key hash to be flashed
- * using the fastboot. So the function can be used in fastboot
- * to flash the key hash.
- *
- * @param buf    The vboot key hash data.
- *
- * @param length The length of key hash.
- *
- * @return 0 if the command succeeded, -1 if it failed
- */
-int avb_write_vbootkey_hash(uint8_t *buf, uint8_t length);
-
-/**
- * U-boot close the optee client when start kernel
- * to prevent the optee client being invoking by other
- * program.
- *
- * @return 0 if the command succeeded, -1 if it failed
- */
-int avb_close_optee_client(void);
-
-/**
- * Write the permanent attributes hash.
- *
- * @param buf    The permanent attributes hash data.
- *
- * @param length The length of permanent attributes hash.
- *
- * @return 0 if the command succeeded, -1 if it failed
- */
-int avb_write_attribute_hash(uint8_t *buf, uint8_t length);
-
-#endif
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#ifndef AVB_OPS_USER_H_
+#define AVB_OPS_USER_H_
+
+#include <android_avb/libavb.h>
+#include <android_avb/avb_ab_flow.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Allocates an AvbOps instance suitable for use in Android userspace
+ * on the device. Returns NULL on OOM.
+ *
+ * The returned AvbOps has the following characteristics:
+ *
+ * - The read_from_partition(), write_to_partition(), and
+ *   get_size_of_partition() operations are implemented, however for
+ *   these operations to work the fstab file on the device must have a
+ *   /misc entry using a by-name device file scheme and the containing
+ *   by-name/ subdirectory must have files for other partitions.
+ *
+ * - The remaining operations are implemented and never fails and
+ *   return the following values:
+ *   - validate_vbmeta_public_key(): always returns |true|.
+ *   - read_rollback_index(): returns 0 for any roolback index.
+ *   - write_rollback_index(): no-op.
+ *   - read_is_device_unlocked(): always returns |true|.
+ *   - get_unique_guid_for_partition(): always returns the empty string.
+ *
+ * - The |ab_ops| member will point to a valid AvbABOps instance
+ *   implemented via libavb_ab/. This should only be used if the AVB
+ *   A/B stack is used on the device. This is what is used in
+ *   bootctrl.avb boot control implementation.
+ *
+ * Free with avb_ops_user_free().
+ */
+AvbOps* avb_ops_user_new(void);
+
+/* Frees an AvbOps instance previously allocated with avb_ops_device_new(). */
+void avb_ops_user_free(AvbOps* ops);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_OPS_USER_H_ */
diff --git a/include/android_avb/avb_property_descriptor.h b/include/android_avb/avb_property_descriptor.h
index 08409892a9..28c35cb560 100644
--- a/include/android_avb/avb_property_descriptor.h
+++ b/include/android_avb/avb_property_descriptor.h
@@ -1,109 +1,109 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/*
-#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
-#error "Never include this file directly, include libavb.h instead."
-#endif
-*/
-
-#ifndef AVB_PROPERTY_DESCRIPTOR_H_
-#define AVB_PROPERTY_DESCRIPTOR_H_
-
-#include <android_avb/avb_descriptor.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* A descriptor for properties (free-form key/value pairs).
- *
- * Following this struct are |key_num_bytes| bytes of key data,
- * followed by a NUL byte, then |value_num_bytes| bytes of value data,
- * followed by a NUL byte and then enough padding to make the combined
- * size a multiple of 8.
- */
-typedef struct AvbPropertyDescriptor {
-  AvbDescriptor parent_descriptor;
-  uint64_t key_num_bytes;
-  uint64_t value_num_bytes;
-} AVB_ATTR_PACKED AvbPropertyDescriptor;
-
-/* Copies |src| to |dest| and validates, byte-swapping fields in the
- * process if needed. Returns true if valid, false if invalid.
- *
- * Data following the struct is not validated nor copied.
- */
-bool avb_property_descriptor_validate_and_byteswap(
-    const AvbPropertyDescriptor* src,
-    AvbPropertyDescriptor* dest) AVB_ATTR_WARN_UNUSED_RESULT;
-
-/* Convenience function for looking up the value for a property with
- * name |key| in a vbmeta image. If |key_size| is 0, |key| must be
- * NUL-terminated.
- *
- * The |image_data| parameter must be a pointer to a vbmeta image of
- * size |image_size|.
- *
- * This function returns a pointer to the value inside the passed-in
- * image or NULL if not found. Note that the value is always
- * guaranteed to be followed by a NUL byte.
- *
- * If the value was found and |out_value_size| is not NULL, the size
- * of the value is returned there.
- *
- * This function is O(n) in number of descriptors so if you need to
- * look up a lot of values, you may want to build a more efficient
- * lookup-table by manually walking all descriptors using
- * avb_descriptor_foreach().
- *
- * Before using this function, you MUST verify |image_data| with
- * avb_vbmeta_image_verify() and reject it unless it's signed by a
- * known good public key.
- */
-const char* avb_property_lookup(const uint8_t* image_data,
-                                size_t image_size,
-                                const char* key,
-                                size_t key_size,
-                                size_t* out_value_size)
-    AVB_ATTR_WARN_UNUSED_RESULT;
-
-/* Like avb_property_lookup() but parses the intial portions of the
- * value as an unsigned 64-bit integer. Both decimal and hexadecimal
- * representations (e.g. "0x2a") are supported. Returns false on
- * failure and true on success. On success, the parsed value is
- * returned in |out_value|.
- */
-bool avb_property_lookup_uint64(const uint8_t* image_data,
-                                size_t image_size,
-                                const char* key,
-                                size_t key_size,
-                                uint64_t* out_value)
-    AVB_ATTR_WARN_UNUSED_RESULT;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* AVB_PROPERTY_DESCRIPTOR_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_PROPERTY_DESCRIPTOR_H_
+#define AVB_PROPERTY_DESCRIPTOR_H_
+
+#include <android_avb/avb_descriptor.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* A descriptor for properties (free-form key/value pairs).
+ *
+ * Following this struct are |key_num_bytes| bytes of key data,
+ * followed by a NUL byte, then |value_num_bytes| bytes of value data,
+ * followed by a NUL byte and then enough padding to make the combined
+ * size a multiple of 8.
+ */
+typedef struct AvbPropertyDescriptor {
+  AvbDescriptor parent_descriptor;
+  uint64_t key_num_bytes;
+  uint64_t value_num_bytes;
+} AVB_ATTR_PACKED AvbPropertyDescriptor;
+
+/* Copies |src| to |dest| and validates, byte-swapping fields in the
+ * process if needed. Returns true if valid, false if invalid.
+ *
+ * Data following the struct is not validated nor copied.
+ */
+bool avb_property_descriptor_validate_and_byteswap(
+    const AvbPropertyDescriptor* src,
+    AvbPropertyDescriptor* dest) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Convenience function for looking up the value for a property with
+ * name |key| in a vbmeta image. If |key_size| is 0, |key| must be
+ * NUL-terminated.
+ *
+ * The |image_data| parameter must be a pointer to a vbmeta image of
+ * size |image_size|.
+ *
+ * This function returns a pointer to the value inside the passed-in
+ * image or NULL if not found. Note that the value is always
+ * guaranteed to be followed by a NUL byte.
+ *
+ * If the value was found and |out_value_size| is not NULL, the size
+ * of the value is returned there.
+ *
+ * This function is O(n) in number of descriptors so if you need to
+ * look up a lot of values, you may want to build a more efficient
+ * lookup-table by manually walking all descriptors using
+ * avb_descriptor_foreach().
+ *
+ * Before using this function, you MUST verify |image_data| with
+ * avb_vbmeta_image_verify() and reject it unless it's signed by a
+ * known good public key.
+ */
+const char* avb_property_lookup(const uint8_t* image_data,
+                                size_t image_size,
+                                const char* key,
+                                size_t key_size,
+                                size_t* out_value_size)
+    AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Like avb_property_lookup() but parses the intial portions of the
+ * value as an unsigned 64-bit integer. Both decimal and hexadecimal
+ * representations (e.g. "0x2a") are supported. Returns false on
+ * failure and true on success. On success, the parsed value is
+ * returned in |out_value|.
+ */
+bool avb_property_lookup_uint64(const uint8_t* image_data,
+                                size_t image_size,
+                                const char* key,
+                                size_t key_size,
+                                uint64_t* out_value)
+    AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_PROPERTY_DESCRIPTOR_H_ */
diff --git a/include/android_avb/avb_rsa.h b/include/android_avb/avb_rsa.h
index 728c215a31..e8b0c50e71 100644
--- a/include/android_avb/avb_rsa.h
+++ b/include/android_avb/avb_rsa.h
@@ -1,75 +1,77 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/* Copyright (c) 2011 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-#ifdef AVB_INSIDE_LIBAVB_H
-#error "You can't include avb_rsa.h in the public header libavb.h."
-#endif
-
-/*
-#ifndef AVB_COMPILATION
-#error "Never include this file, it may only be used from internal avb code."
-#endif
-*/
-
-#ifndef AVB_RSA_H_
-#define AVB_RSA_H_
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include <android_avb/avb_crypto.h>
-#include <android_avb/avb_sysdeps.h>
-
-/* Using the key given by |key|, verify a RSA signature |sig| of
- * length |sig_num_bytes| against an expected |hash| of length
- * |hash_num_bytes|. The padding to expect must be passed in using
- * |padding| of length |padding_num_bytes|.
- *
- * The data in |key| must match the format defined in
- * |AvbRSAPublicKeyHeader|, including the two large numbers
- * following. The |key_num_bytes| must be the size of the entire
- * serialized key.
- *
- * Returns false if verification fails, true otherwise.
- */
-bool avb_rsa_verify(const uint8_t* key,
-                    size_t key_num_bytes,
-                    const uint8_t* sig,
-                    size_t sig_num_bytes,
-                    const uint8_t* hash,
-                    size_t hash_num_bytes,
-                    const uint8_t* padding,
-                    size_t padding_num_bytes) AVB_ATTR_WARN_UNUSED_RESULT;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* AVB_RSA_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/* Copyright (c) 2011 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/*
+#ifdef AVB_INSIDE_LIBAVB_H
+#error "You can't include avb_rsa.h in the public header libavb.h."
+#endif
+*/
+
+/*
+#ifndef AVB_COMPILATION
+#error "Never include this file, it may only be used from internal avb code."
+#endif
+*/
+
+#ifndef AVB_RSA_H_
+#define AVB_RSA_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <android_avb/avb_crypto.h>
+#include <android_avb/avb_sysdeps.h>
+
+/* Using the key given by |key|, verify a RSA signature |sig| of
+ * length |sig_num_bytes| against an expected |hash| of length
+ * |hash_num_bytes|. The padding to expect must be passed in using
+ * |padding| of length |padding_num_bytes|.
+ *
+ * The data in |key| must match the format defined in
+ * |AvbRSAPublicKeyHeader|, including the two large numbers
+ * following. The |key_num_bytes| must be the size of the entire
+ * serialized key.
+ *
+ * Returns false if verification fails, true otherwise.
+ */
+bool avb_rsa_verify(const uint8_t* key,
+                    size_t key_num_bytes,
+                    const uint8_t* sig,
+                    size_t sig_num_bytes,
+                    const uint8_t* hash,
+                    size_t hash_num_bytes,
+                    const uint8_t* padding,
+                    size_t padding_num_bytes) AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_RSA_H_ */
diff --git a/include/android_avb/avb_sha.h b/include/android_avb/avb_sha.h
index 94ac339a2d..c4b7c7705e 100644
--- a/include/android_avb/avb_sha.h
+++ b/include/android_avb/avb_sha.h
@@ -1,92 +1,92 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#ifdef AVB_INSIDE_LIBAVB_H
-#error "You can't include avb_sha.h in the public header libavb.h."
-#endif
-
-/*
-#ifndef AVB_COMPILATION
-#error "Never include this file, it may only be used from internal avb code."
-#endif
-*/
-
-#ifndef AVB_SHA_H_
-#define AVB_SHA_H_
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include <android_avb/avb_crypto.h>
-#include <android_avb/avb_sysdeps.h>
-
-/* Block size in bytes of a SHA-256 digest. */
-#define AVB_SHA256_BLOCK_SIZE 64
-
-
-/* Block size in bytes of a SHA-512 digest. */
-#define AVB_SHA512_BLOCK_SIZE 128
-
-/* Data structure used for SHA-256. */
-typedef struct {
-  uint32_t h[8];
-  uint32_t tot_len;
-  uint32_t len;
-  uint8_t block[2 * AVB_SHA256_BLOCK_SIZE];
-  uint8_t buf[AVB_SHA256_DIGEST_SIZE]; /* Used for storing the final digest. */
-} AvbSHA256Ctx;
-
-/* Data structure used for SHA-512. */
-typedef struct {
-  uint64_t h[8];
-  uint32_t tot_len;
-  uint32_t len;
-  uint8_t block[2 * AVB_SHA512_BLOCK_SIZE];
-  uint8_t buf[AVB_SHA512_DIGEST_SIZE]; /* Used for storing the final digest. */
-} AvbSHA512Ctx;
-
-/* Initializes the SHA-256 context. */
-void avb_sha256_init(AvbSHA256Ctx* ctx);
-
-/* Updates the SHA-256 context with |len| bytes from |data|. */
-void avb_sha256_update(AvbSHA256Ctx* ctx, const uint8_t* data, uint32_t len);
-
-/* Returns the SHA-256 digest. */
-uint8_t* avb_sha256_final(AvbSHA256Ctx* ctx) AVB_ATTR_WARN_UNUSED_RESULT;
-
-/* Initializes the SHA-512 context. */
-void avb_sha512_init(AvbSHA512Ctx* ctx);
-
-/* Updates the SHA-512 context with |len| bytes from |data|. */
-void avb_sha512_update(AvbSHA512Ctx* ctx, const uint8_t* data, uint32_t len);
-
-/* Returns the SHA-512 digest. */
-uint8_t* avb_sha512_final(AvbSHA512Ctx* ctx) AVB_ATTR_WARN_UNUSED_RESULT;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* AVB_SHA_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#ifdef AVB_INSIDE_LIBAVB_H
+#error "You can't include avb_sha.h in the public header libavb.h."
+#endif
+
+#ifndef AVB_COMPILATION
+#error "Never include this file, it may only be used from internal avb code."
+#endif
+*/
+
+#ifndef AVB_SHA_H_
+#define AVB_SHA_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <android_avb/avb_crypto.h>
+#include <android_avb/avb_sysdeps.h>
+
+/* Block size in bytes of a SHA-256 digest. */
+#define AVB_SHA256_BLOCK_SIZE 64
+
+
+/* Block size in bytes of a SHA-512 digest. */
+#define AVB_SHA512_BLOCK_SIZE 128
+
+/* Data structure used for SHA-256. */
+typedef struct {
+  uint32_t h[8];
+  uint32_t tot_len;
+  uint32_t len;
+  uint8_t block[2 * AVB_SHA256_BLOCK_SIZE];
+  uint8_t buf[AVB_SHA256_DIGEST_SIZE]; /* Used for storing the final digest. */
+} AvbSHA256Ctx;
+
+/* Data structure used for SHA-512. */
+typedef struct {
+  uint64_t h[8];
+  uint32_t tot_len;
+  uint32_t len;
+  uint8_t block[2 * AVB_SHA512_BLOCK_SIZE];
+  uint8_t buf[AVB_SHA512_DIGEST_SIZE]; /* Used for storing the final digest. */
+} AvbSHA512Ctx;
+
+/* Initializes the SHA-256 context. */
+void avb_sha256_init(AvbSHA256Ctx* ctx);
+
+/* Updates the SHA-256 context with |len| bytes from |data|. */
+void avb_sha256_update(AvbSHA256Ctx* ctx, const uint8_t* data, uint32_t len);
+
+/* Returns the SHA-256 digest. */
+uint8_t* avb_sha256_final(AvbSHA256Ctx* ctx) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Initializes the SHA-512 context. */
+void avb_sha512_init(AvbSHA512Ctx* ctx);
+
+/* Updates the SHA-512 context with |len| bytes from |data|. */
+void avb_sha512_update(AvbSHA512Ctx* ctx, const uint8_t* data, uint32_t len);
+
+/* Returns the SHA-512 digest. */
+uint8_t* avb_sha512_final(AvbSHA512Ctx* ctx) AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_SHA_H_ */
diff --git a/include/android_avb/avb_slot_verify.h b/include/android_avb/avb_slot_verify.h
index a34a872a6f..1b7932496c 100644
--- a/include/android_avb/avb_slot_verify.h
+++ b/include/android_avb/avb_slot_verify.h
@@ -1,341 +1,352 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/*
-#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
-#error "Never include this file directly, include libavb.h instead."
-#endif
-*/
-
-#ifndef AVB_SLOT_VERIFY_H_
-#define AVB_SLOT_VERIFY_H_
-
-#include <android_avb/avb_ops.h>
-#include <android_avb/avb_vbmeta_image.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Return codes used in avb_slot_verify(), see that function for
- * documentation for each field.
- *
- * Use avb_slot_verify_result_to_string() to get a textual
- * representation usable for error/debug output.
- */
-typedef enum {
-  AVB_SLOT_VERIFY_RESULT_OK,
-  AVB_SLOT_VERIFY_RESULT_ERROR_OOM,
-  AVB_SLOT_VERIFY_RESULT_ERROR_IO,
-  AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION,
-  AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX,
-  AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED,
-  AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA,
-  AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION,
-  AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT
-} AvbSlotVerifyResult;
-
-/* Various error handling modes for when verification fails using a
- * hashtree at runtime inside the HLOS.
- *
- * AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE means that the OS
- * will invalidate the current slot and restart.
- *
- * AVB_HASHTREE_ERROR_MODE_RESTART means that the OS will restart.
- *
- * AVB_HASHTREE_ERROR_MODE_EIO means that an EIO error will be
- * returned to applications.
- *
- * AVB_HASHTREE_ERROR_MODE_LOGGING means that errors will be logged
- * and corrupt data may be returned to applications. This mode should
- * be used ONLY for diagnostics and debugging. It cannot be used
- * unless AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR is also
- * used.
- */
-typedef enum {
-  AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE,
-  AVB_HASHTREE_ERROR_MODE_RESTART,
-  AVB_HASHTREE_ERROR_MODE_EIO,
-  AVB_HASHTREE_ERROR_MODE_LOGGING
-} AvbHashtreeErrorMode;
-
-/* Flags that influence how avb_slot_verify() works.
- *
- * If AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR is NOT set then
- * avb_slot_verify() will bail out as soon as an error is encountered
- * and |out_data| is set only if AVB_SLOT_VERIFY_RESULT_OK is
- * returned.
- *
- * Otherwise if AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR is set
- * avb_slot_verify() will continue verification efforts and |out_data|
- * is also set if AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED,
- * AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION, or
- * AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX is returned. It is
- * undefined which error is returned if more than one distinct error
- * is encountered. It is guaranteed that AVB_SLOT_VERIFY_RESULT_OK is
- * returned if, and only if, there are no errors. This mode is needed
- * to boot valid but unverified slots when the device is unlocked.
- *
- * Also, if AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR is set the
- * contents loaded from |requested_partition| will be the contents of
- * the entire partition instead of just the size specified in the hash
- * descriptor.
- */
-typedef enum {
-  AVB_SLOT_VERIFY_FLAGS_NONE = 0,
-  AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR = (1 << 0)
-} AvbSlotVerifyFlags;
-
-/* Get a textual representation of |result|. */
-const char* avb_slot_verify_result_to_string(AvbSlotVerifyResult result);
-
-/* Maximum number of rollback index locations supported. */
-#define AVB_MAX_NUMBER_OF_ROLLBACK_INDEX_LOCATIONS 32
-
-/* AvbPartitionData contains data loaded from partitions when using
- * avb_slot_verify(). The |partition_name| field contains the name of
- * the partition (without A/B suffix), |data| points to the loaded
- * data which is |data_size| bytes long.
- *
- * Note that this is strictly less than the partition size - it's only
- * the image stored there, not the entire partition nor any of the
- * metadata.
- */
-typedef struct {
-  char* partition_name;
-  uint8_t* data;
-  size_t data_size;
-} AvbPartitionData;
-
-/* AvbVBMetaData contains a vbmeta struct loaded from a partition when
- * using avb_slot_verify(). The |partition_name| field contains the
- * name of the partition (without A/B suffix), |vbmeta_data| points to
- * the loaded data which is |vbmeta_size| bytes long.
- *
- * The |verify_result| field contains the result of
- * avb_vbmeta_image_verify() on the data. This is guaranteed to be
- * AVB_VBMETA_VERIFY_RESULT_OK for all vbmeta images if
- * avb_slot_verify() returns AVB_SLOT_VERIFY_RESULT_OK.
- *
- * You can use avb_descriptor_get_all(), avb_descriptor_foreach(), and
- * avb_vbmeta_image_header_to_host_byte_order() with this data.
- */
-typedef struct {
-  char* partition_name;
-  uint8_t* vbmeta_data;
-  size_t vbmeta_size;
-  AvbVBMetaVerifyResult verify_result;
-} AvbVBMetaData;
-
-/* AvbSlotVerifyData contains data needed to boot a particular slot
- * and is returned by avb_slot_verify() if partitions in a slot are
- * successfully verified.
- *
- * All data pointed to by this struct - including data in each item in
- * the |partitions| array - will be freed when the
- * avb_slot_verify_data_free() function is called.
- *
- * The |ab_suffix| field is the copy of the of |ab_suffix| field
- * passed to avb_slot_verify(). It is the A/B suffix of the slot. This
- * value includes the leading underscore - typical values are "" (if
- * no slots are in use), "_a" (for the first slot), and "_b" (for the
- * second slot).
- *
- * The VBMeta images that were checked are available in the
- * |vbmeta_images| field. The field |num_vbmeta_images| contains the
- * number of elements in this array. The first element -
- * vbmeta_images[0] - is guaranteed to be from the partition with the
- * top-level vbmeta struct. This is usually the "vbmeta" partition in
- * the requested slot but if there is no "vbmeta" partition it can
- * also be the "boot" partition.
- *
- * The partitions loaded and verified from from the slot are
- * accessible in the |loaded_partitions| array. The field
- * |num_loaded_partitions| contains the number of elements in this
- * array. The order of partitions in this array may not necessarily be
- * the same order as in the passed-in |requested_partitions| array.
- *
- * Rollback indexes for the verified slot are stored in the
- * |rollback_indexes| field. Note that avb_slot_verify() will NEVER
- * modify stored_rollback_index[n] locations e.g. it will never use
- * the write_rollback_index() AvbOps operation. Instead it is the job
- * of the caller of avb_slot_verify() to do this based on e.g. A/B
- * policy and other factors. See libavb_ab/avb_ab_flow.c for an
- * example of how to do this.
- *
- * The |cmdline| field is a NUL-terminated string in UTF-8 resulting
- * from concatenating all |AvbKernelCmdlineDescriptor| and then
- * performing proper substitution of the variables
- * $(ANDROID_SYSTEM_PARTUUID), $(ANDROID_BOOT_PARTUUID), and
- * $(ANDROID_VBMETA_PARTUUID) using the
- * get_unique_guid_for_partition() operation in |AvbOps|. Additionally
- * $(ANDROID_VERITY_MODE) will be replaced with the proper dm-verity
- * option depending on the value of |hashtree_error_mode|.
- *
- * Additionally, the |cmdline| field will have the following kernel
- * command-line options set:
- *
- *   androidboot.veritymode: This is set to 'disabled' if the
- *   AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED flag is set in top-level
- *   vbmeta struct. Otherwise it is set to 'enforcing' if the
- *   passed-in hashtree error mode is AVB_HASHTREE_ERROR_MODE_RESTART
- *   or AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE, 'eio' if it's
- *   set to AVB_HASHTREE_ERROR_MODE_EIO, and 'logging' if it's set to
- *   AVB_HASHTREE_ERROR_MODE_LOGGING.
- *
- *   androidboot.vbmeta.invalidate_on_error: This is set to 'yes' only
- *   if hashtree validation isn't disabled and the passed-in hashtree
- *   error mode is AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE.
- *
- *   androidboot.vbmeta.device_state: set to "locked" or "unlocked"
- *   depending on the result of the result of AvbOps's
- *   read_is_unlocked() function.
- *
- *   androidboot.vbmeta.{hash_alg, size, digest}: Will be set to
- *   the digest of all images in |vbmeta_images|.
- *
- *   androidboot.vbmeta.device: This is set to the value
- *   PARTUUID=$(ANDROID_VBMETA_PARTUUID) before substitution so it
- *   will end up pointing to the vbmeta partition for the verified
- *   slot. If there is no vbmeta partition it will point to the boot
- *   partition of the verified slot.
- *
- *   androidboot.vbmeta.avb_version: This is set to the decimal value
- *   of AVB_VERSION_MAJOR followed by a dot followed by the decimal
- *   value of AVB_VERSION_MINOR, for example "1.0" or "1.4". This
- *   version number represents the vbmeta file format version
- *   supported by libavb copy used in the boot loader. This is not
- *   necessarily the same version number of the on-disk metadata for
- *   the slot that was verified.
- *
- * Note that neither androidboot.slot_suffix nor androidboot.slot are
- * set in the |cmdline| field in |AvbSlotVerifyData| - you will have
- * to pass these yourself.
- *
- * Also note that androidboot.veritymode is set by libavb and since
- * AVB only supports 'enforcing' and 'disabled' values, the boot
- * loader is relieved of managing any state related to dm-verity or
- * setting this cmdline parameter.
- *
- * This struct may grow in the future without it being considered an
- * ABI break.
- */
-typedef struct {
-  char* ab_suffix;
-  AvbVBMetaData* vbmeta_images;
-  size_t num_vbmeta_images;
-  AvbPartitionData* loaded_partitions;
-  size_t num_loaded_partitions;
-  char* cmdline;
-  uint64_t rollback_indexes[AVB_MAX_NUMBER_OF_ROLLBACK_INDEX_LOCATIONS];
-} AvbSlotVerifyData;
-
-/* Frees a |AvbSlotVerifyData| including all data it points to. */
-void avb_slot_verify_data_free(AvbSlotVerifyData* data);
-
-/* Performs a full verification of the slot identified by |ab_suffix|
- * and load and verify the contents of the partitions whose name is in
- * the NULL-terminated string array |requested_partitions| (each
- * partition must use hash verification). If not using A/B, pass an
- * empty string (e.g. "", not NULL) for |ab_suffix|. This parameter
- * must include the leading underscore, for example "_a" should be
- * used to refer to the first slot.
- *
- * Typically the |requested_partitions| array only contains a single
- * item for the boot partition, 'boot'.
- *
- * Verification includes loading and verifying data from the 'vbmeta',
- * the requested hash partitions, and possibly other partitions (with
- * |ab_suffix| appended), inspecting rollback indexes, and checking if
- * the public key used to sign the data is acceptable. The functions
- * in |ops| will be used to do this.
- *
- * If |out_data| is not NULL, it will be set to a newly allocated
- * |AvbSlotVerifyData| struct containing all the data needed to
- * actually boot the slot. This data structure should be freed with
- * avb_slot_verify_data_free() when you are done with it. See below
- * for when this is returned.
- *
- * The |flags| parameter is used to influence the semantics of
- * avb_slot_verify() - for example the
- * AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR flag can be used to
- * ignore verification errors which is something needed in the
- * UNLOCKED state. See the AvbSlotVerifyFlags enumeration for details.
- *
- * The |hashtree_error_mode| parameter should be set to the desired
- * error handling mode when hashtree validation fails inside the
- * HLOS. This value isn't used by libavb per se - it is forwarded to
- * the HLOS through the androidboot.veritymode and
- * androidboot.vbmeta.invalidate_on_error cmdline parameters. See the
- * AvbHashtreeErrorMode enumeration for details.
- *
- * Also note that |out_data| is never set if
- * AVB_SLOT_VERIFY_RESULT_ERROR_OOM, AVB_SLOT_VERIFY_RESULT_ERROR_IO,
- * or AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA is returned.
- *
- * AVB_SLOT_VERIFY_RESULT_OK is returned if everything is verified
- * correctly and all public keys are accepted.
- *
- * AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED is returned if
- * everything is verified correctly out but one or more public keys
- * are not accepted. This includes the case where integrity data is
- * not signed.
- *
- * AVB_SLOT_VERIFY_RESULT_ERROR_OOM is returned if unable to
- * allocate memory.
- *
- * AVB_SLOT_VERIFY_RESULT_ERROR_IO is returned if an I/O error
- * occurred while trying to load data or get a rollback index.
- *
- * AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION is returned if the data
- * did not verify, e.g. the digest didn't match or signature checks
- * failed.
- *
- * AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX is returned if a
- * rollback index was less than its stored value.
- *
- * AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA is returned if some
- * of the metadata is invalid or inconsistent.
- *
- * AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION is returned if
- * some of the metadata requires a newer version of libavb than what
- * is in use.
- *
- * AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT is returned if the
- * caller passed invalid parameters, for example trying to use
- * AVB_HASHTREE_ERROR_MODE_LOGGING without
- * AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR.
- */
-AvbSlotVerifyResult avb_slot_verify(AvbOps* ops,
-                                    const char* const* requested_partitions,
-                                    const char* ab_suffix,
-                                    AvbSlotVerifyFlags flags,
-                                    AvbHashtreeErrorMode hashtree_error_mode,
-                                    AvbSlotVerifyData** out_data);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* AVB_SLOT_VERIFY_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_SLOT_VERIFY_H_
+#define AVB_SLOT_VERIFY_H_
+
+#include <android_avb/avb_ops.h>
+#include <android_avb/avb_vbmeta_image.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Return codes used in avb_slot_verify(), see that function for
+ * documentation for each field.
+ *
+ * Use avb_slot_verify_result_to_string() to get a textual
+ * representation usable for error/debug output.
+ */
+typedef enum {
+  AVB_SLOT_VERIFY_RESULT_OK,
+  AVB_SLOT_VERIFY_RESULT_ERROR_OOM,
+  AVB_SLOT_VERIFY_RESULT_ERROR_IO,
+  AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION,
+  AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX,
+  AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED,
+  AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA,
+  AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION,
+  AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT
+} AvbSlotVerifyResult;
+
+/* Various error handling modes for when verification fails using a
+ * hashtree at runtime inside the HLOS.
+ *
+ * AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE means that the OS
+ * will invalidate the current slot and restart.
+ *
+ * AVB_HASHTREE_ERROR_MODE_RESTART means that the OS will restart.
+ *
+ * AVB_HASHTREE_ERROR_MODE_EIO means that an EIO error will be
+ * returned to applications.
+ *
+ * AVB_HASHTREE_ERROR_MODE_LOGGING means that errors will be logged
+ * and corrupt data may be returned to applications. This mode should
+ * be used ONLY for diagnostics and debugging. It cannot be used
+ * unless AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR is also
+ * used.
+ */
+typedef enum {
+  AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE,
+  AVB_HASHTREE_ERROR_MODE_RESTART,
+  AVB_HASHTREE_ERROR_MODE_EIO,
+  AVB_HASHTREE_ERROR_MODE_LOGGING
+} AvbHashtreeErrorMode;
+
+/* Flags that influence how avb_slot_verify() works.
+ *
+ * If AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR is NOT set then
+ * avb_slot_verify() will bail out as soon as an error is encountered
+ * and |out_data| is set only if AVB_SLOT_VERIFY_RESULT_OK is
+ * returned.
+ *
+ * Otherwise if AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR is set
+ * avb_slot_verify() will continue verification efforts and |out_data|
+ * is also set if AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED,
+ * AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION, or
+ * AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX is returned. It is
+ * undefined which error is returned if more than one distinct error
+ * is encountered. It is guaranteed that AVB_SLOT_VERIFY_RESULT_OK is
+ * returned if, and only if, there are no errors. This mode is needed
+ * to boot valid but unverified slots when the device is unlocked.
+ *
+ * Also, if AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR is set the
+ * contents loaded from |requested_partition| will be the contents of
+ * the entire partition instead of just the size specified in the hash
+ * descriptor.
+ */
+typedef enum {
+  AVB_SLOT_VERIFY_FLAGS_NONE = 0,
+  AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR = (1 << 0)
+} AvbSlotVerifyFlags;
+
+/* Get a textual representation of |result|. */
+const char* avb_slot_verify_result_to_string(AvbSlotVerifyResult result);
+
+/* Maximum number of rollback index locations supported. */
+#define AVB_MAX_NUMBER_OF_ROLLBACK_INDEX_LOCATIONS 32
+
+/* AvbPartitionData contains data loaded from partitions when using
+ * avb_slot_verify(). The |partition_name| field contains the name of
+ * the partition (without A/B suffix), |data| points to the loaded
+ * data which is |data_size| bytes long. If |preloaded| is set to true,
+ * this structure dose not own |data|. The caller of |avb_slot_verify|
+ * needs to make sure that the preloaded data outlives this
+ * |AvbPartitionData| structure.
+ *
+ * Note that this is strictly less than the partition size - it's only
+ * the image stored there, not the entire partition nor any of the
+ * metadata.
+ */
+typedef struct {
+  char* partition_name;
+  uint8_t* data;
+  size_t data_size;
+  bool preloaded;
+} AvbPartitionData;
+
+/* AvbVBMetaData contains a vbmeta struct loaded from a partition when
+ * using avb_slot_verify(). The |partition_name| field contains the
+ * name of the partition (without A/B suffix), |vbmeta_data| points to
+ * the loaded data which is |vbmeta_size| bytes long.
+ *
+ * The |verify_result| field contains the result of
+ * avb_vbmeta_image_verify() on the data. This is guaranteed to be
+ * AVB_VBMETA_VERIFY_RESULT_OK for all vbmeta images if
+ * avb_slot_verify() returns AVB_SLOT_VERIFY_RESULT_OK.
+ *
+ * You can use avb_descriptor_get_all(), avb_descriptor_foreach(), and
+ * avb_vbmeta_image_header_to_host_byte_order() with this data.
+ */
+typedef struct {
+  char* partition_name;
+  uint8_t* vbmeta_data;
+  size_t vbmeta_size;
+  AvbVBMetaVerifyResult verify_result;
+} AvbVBMetaData;
+
+/* AvbSlotVerifyData contains data needed to boot a particular slot
+ * and is returned by avb_slot_verify() if partitions in a slot are
+ * successfully verified.
+ *
+ * All data pointed to by this struct - including data in each item in
+ * the |partitions| array - will be freed when the
+ * avb_slot_verify_data_free() function is called.
+ *
+ * The |ab_suffix| field is the copy of the of |ab_suffix| field
+ * passed to avb_slot_verify(). It is the A/B suffix of the slot. This
+ * value includes the leading underscore - typical values are "" (if
+ * no slots are in use), "_a" (for the first slot), and "_b" (for the
+ * second slot).
+ *
+ * The VBMeta images that were checked are available in the
+ * |vbmeta_images| field. The field |num_vbmeta_images| contains the
+ * number of elements in this array. The first element -
+ * vbmeta_images[0] - is guaranteed to be from the partition with the
+ * top-level vbmeta struct. This is usually the "vbmeta" partition in
+ * the requested slot but if there is no "vbmeta" partition it can
+ * also be the "boot" partition.
+ *
+ * The partitions loaded and verified from from the slot are
+ * accessible in the |loaded_partitions| array. The field
+ * |num_loaded_partitions| contains the number of elements in this
+ * array. The order of partitions in this array may not necessarily be
+ * the same order as in the passed-in |requested_partitions| array.
+ *
+ * Rollback indexes for the verified slot are stored in the
+ * |rollback_indexes| field. Note that avb_slot_verify() will NEVER
+ * modify stored_rollback_index[n] locations e.g. it will never use
+ * the write_rollback_index() AvbOps operation. Instead it is the job
+ * of the caller of avb_slot_verify() to do this based on e.g. A/B
+ * policy and other factors. See libavb_ab/avb_ab_flow.c for an
+ * example of how to do this.
+ *
+ * The |cmdline| field is a NUL-terminated string in UTF-8 resulting
+ * from concatenating all |AvbKernelCmdlineDescriptor| and then
+ * performing proper substitution of the variables
+ * $(ANDROID_SYSTEM_PARTUUID), $(ANDROID_BOOT_PARTUUID), and
+ * $(ANDROID_VBMETA_PARTUUID) using the
+ * get_unique_guid_for_partition() operation in |AvbOps|. Additionally
+ * $(ANDROID_VERITY_MODE) will be replaced with the proper dm-verity
+ * option depending on the value of |hashtree_error_mode|.
+ *
+ * Additionally, the |cmdline| field will have the following kernel
+ * command-line options set (unless verification is disabled, see
+ * below):
+ *
+ *   androidboot.veritymode: This is set to 'disabled' if the
+ *   AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED flag is set in top-level
+ *   vbmeta struct. Otherwise it is set to 'enforcing' if the
+ *   passed-in hashtree error mode is AVB_HASHTREE_ERROR_MODE_RESTART
+ *   or AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE, 'eio' if it's
+ *   set to AVB_HASHTREE_ERROR_MODE_EIO, and 'logging' if it's set to
+ *   AVB_HASHTREE_ERROR_MODE_LOGGING.
+ *
+ *   androidboot.vbmeta.invalidate_on_error: This is set to 'yes' only
+ *   if hashtree validation isn't disabled and the passed-in hashtree
+ *   error mode is AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE.
+ *
+ *   androidboot.vbmeta.device_state: set to "locked" or "unlocked"
+ *   depending on the result of the result of AvbOps's
+ *   read_is_unlocked() function.
+ *
+ *   androidboot.vbmeta.{hash_alg, size, digest}: Will be set to
+ *   the digest of all images in |vbmeta_images|.
+ *
+ *   androidboot.vbmeta.device: This is set to the value
+ *   PARTUUID=$(ANDROID_VBMETA_PARTUUID) before substitution so it
+ *   will end up pointing to the vbmeta partition for the verified
+ *   slot. If there is no vbmeta partition it will point to the boot
+ *   partition of the verified slot.
+ *
+ *   androidboot.vbmeta.avb_version: This is set to the decimal value
+ *   of AVB_VERSION_MAJOR followed by a dot followed by the decimal
+ *   value of AVB_VERSION_MINOR, for example "1.0" or "1.4". This
+ *   version number represents the vbmeta file format version
+ *   supported by libavb copy used in the boot loader. This is not
+ *   necessarily the same version number of the on-disk metadata for
+ *   the slot that was verified.
+ *
+ * Note that androidboot.slot_suffix is not set in the |cmdline| field
+ * in |AvbSlotVerifyData| - you will have to set this yourself.
+ *
+ * If the |AVB_VBMETA_IMAGE_FLAGS_VERIFICATION_DISABLED| flag is set
+ * in the top-level vbmeta struct then only the top-level vbmeta
+ * struct is verified and descriptors will not processed. The return
+ * value will be set accordingly (if this flag is set via 'avbctl
+ * disable-verification' then the return value will be
+ * |AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION|) and
+ * |AvbSlotVerifyData| is returned. Additionally all partitions in the
+ * |requested_partitions| are loaded and the |cmdline| field is set to
+ * "root=PARTUUID=$(ANDROID_SYSTEM_PARTUUID)" and the GUID for the
+ * appropriate system partition is substituted in. Note that none of
+ * the androidboot.* options mentioned above will be set.
+ *
+ * This struct may grow in the future without it being considered an
+ * ABI break.
+ */
+typedef struct {
+  char* ab_suffix;
+  AvbVBMetaData* vbmeta_images;
+  size_t num_vbmeta_images;
+  AvbPartitionData* loaded_partitions;
+  size_t num_loaded_partitions;
+  char* cmdline;
+  uint64_t rollback_indexes[AVB_MAX_NUMBER_OF_ROLLBACK_INDEX_LOCATIONS];
+} AvbSlotVerifyData;
+
+/* Frees a |AvbSlotVerifyData| including all data it points to. */
+void avb_slot_verify_data_free(AvbSlotVerifyData* data);
+
+/* Performs a full verification of the slot identified by |ab_suffix|
+ * and load and verify the contents of the partitions whose name is in
+ * the NULL-terminated string array |requested_partitions| (each
+ * partition must use hash verification). If not using A/B, pass an
+ * empty string (e.g. "", not NULL) for |ab_suffix|. This parameter
+ * must include the leading underscore, for example "_a" should be
+ * used to refer to the first slot.
+ *
+ * Typically the |requested_partitions| array only contains a single
+ * item for the boot partition, 'boot'.
+ *
+ * Verification includes loading and verifying data from the 'vbmeta',
+ * the requested hash partitions, and possibly other partitions (with
+ * |ab_suffix| appended), inspecting rollback indexes, and checking if
+ * the public key used to sign the data is acceptable. The functions
+ * in |ops| will be used to do this.
+ *
+ * If |out_data| is not NULL, it will be set to a newly allocated
+ * |AvbSlotVerifyData| struct containing all the data needed to
+ * actually boot the slot. This data structure should be freed with
+ * avb_slot_verify_data_free() when you are done with it. See below
+ * for when this is returned.
+ *
+ * The |flags| parameter is used to influence the semantics of
+ * avb_slot_verify() - for example the
+ * AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR flag can be used to
+ * ignore verification errors which is something needed in the
+ * UNLOCKED state. See the AvbSlotVerifyFlags enumeration for details.
+ *
+ * The |hashtree_error_mode| parameter should be set to the desired
+ * error handling mode when hashtree validation fails inside the
+ * HLOS. This value isn't used by libavb per se - it is forwarded to
+ * the HLOS through the androidboot.veritymode and
+ * androidboot.vbmeta.invalidate_on_error cmdline parameters. See the
+ * AvbHashtreeErrorMode enumeration for details.
+ *
+ * Also note that |out_data| is never set if
+ * AVB_SLOT_VERIFY_RESULT_ERROR_OOM, AVB_SLOT_VERIFY_RESULT_ERROR_IO,
+ * or AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA is returned.
+ *
+ * AVB_SLOT_VERIFY_RESULT_OK is returned if everything is verified
+ * correctly and all public keys are accepted.
+ *
+ * AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED is returned if
+ * everything is verified correctly out but one or more public keys
+ * are not accepted. This includes the case where integrity data is
+ * not signed.
+ *
+ * AVB_SLOT_VERIFY_RESULT_ERROR_OOM is returned if unable to
+ * allocate memory.
+ *
+ * AVB_SLOT_VERIFY_RESULT_ERROR_IO is returned if an I/O error
+ * occurred while trying to load data or get a rollback index.
+ *
+ * AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION is returned if the data
+ * did not verify, e.g. the digest didn't match or signature checks
+ * failed.
+ *
+ * AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX is returned if a
+ * rollback index was less than its stored value.
+ *
+ * AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA is returned if some
+ * of the metadata is invalid or inconsistent.
+ *
+ * AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION is returned if
+ * some of the metadata requires a newer version of libavb than what
+ * is in use.
+ *
+ * AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT is returned if the
+ * caller passed invalid parameters, for example trying to use
+ * AVB_HASHTREE_ERROR_MODE_LOGGING without
+ * AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR.
+ */
+AvbSlotVerifyResult avb_slot_verify(AvbOps* ops,
+                                    const char* const* requested_partitions,
+                                    const char* ab_suffix,
+                                    AvbSlotVerifyFlags flags,
+                                    AvbHashtreeErrorMode hashtree_error_mode,
+                                    AvbSlotVerifyData** out_data);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_SLOT_VERIFY_H_ */
diff --git a/include/android_avb/avb_sysdeps.h b/include/android_avb/avb_sysdeps.h
index df7f1d2028..b2ba7f8321 100644
--- a/include/android_avb/avb_sysdeps.h
+++ b/include/android_avb/avb_sysdeps.h
@@ -1,126 +1,130 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/*
-#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
-#error "Never include this file directly, include libavb.h instead."
-#endif
-*/
-
-#ifndef AVB_SYSDEPS_H_
-#define AVB_SYSDEPS_H_
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Change these includes to match your platform to bring in the
- * equivalent types available in a normal C runtime. At least things
- * like uint8_t, uint64_t, and bool (with |false|, |true| keywords)
- * must be present.
- */
-#include <inttypes.h>
-#include <stdbool.h>
-#include <stddef.h>
-#ifdef CONFIG_USE_STDINT
-/* Provided by gcc. */
-#include <stdint.h>
-#else
-/* Type for `void *' pointers. */
-typedef unsigned long int uintptr_t;
-#endif
-
-/* If you don't have gcc or clang, these attribute macros may need to
- * be adjusted.
- */
-#define AVB_ATTR_WARN_UNUSED_RESULT __attribute__((warn_unused_result))
-#define AVB_ATTR_PACKED __attribute__((packed))
-#define AVB_ATTR_NO_RETURN __attribute__((noreturn))
-#define AVB_ATTR_SENTINEL __attribute__((__sentinel__))
-
-/* Size in bytes used for alignment. */
-#ifdef __LP64__
-#define AVB_ALIGNMENT_SIZE 8
-#else
-#define AVB_ALIGNMENT_SIZE 4
-#endif
-
-/* Compare |n| bytes in |src1| and |src2|.
- *
- * Returns an integer less than, equal to, or greater than zero if the
- * first |n| bytes of |src1| is found, respectively, to be less than,
- * to match, or be greater than the first |n| bytes of |src2|. */
-int avb_memcmp(const void* src1,
-               const void* src2,
-               size_t n) AVB_ATTR_WARN_UNUSED_RESULT;
-
-/* Compare two strings.
- *
- * Return an integer less than, equal to, or greater than zero if |s1|
- * is found, respectively, to be less than, to match, or be greater
- * than |s2|.
- */
-int avb_strcmp(const char* s1, const char* s2);
-
-/* Copy |n| bytes from |src| to |dest|. */
-void* avb_memcpy(void* dest, const void* src, size_t n);
-
-/* Set |n| bytes starting at |s| to |c|.  Returns |dest|. */
-void* avb_memset(void* dest, const int c, size_t n);
-
-/* Prints out a message. The string passed must be a NUL-terminated
- * UTF-8 string.
- */
-void avb_print(const char* message);
-
-/* Prints out a vector of strings. Each argument must point to a
- * NUL-terminated UTF-8 string and NULL should be the last argument.
- */
-void avb_printv(const char* message, ...) AVB_ATTR_SENTINEL;
-
-/* Aborts the program or reboots the device. */
-void avb_abort(void) AVB_ATTR_NO_RETURN;
-
-/* Allocates |size| bytes. Returns NULL if no memory is available,
- * otherwise a pointer to the allocated memory.
- *
- * The memory is not initialized.
- *
- * The pointer returned is guaranteed to be word-aligned.
- *
- * The memory should be freed with avb_free() when you are done with it.
- */
-void* avb_malloc_(size_t size) AVB_ATTR_WARN_UNUSED_RESULT;
-
-/* Frees memory previously allocated with avb_malloc(). */
-void avb_free(void* ptr);
-
-/* Returns the lenght of |str|, excluding the terminating NUL-byte. */
-size_t avb_strlen(const char* str) AVB_ATTR_WARN_UNUSED_RESULT;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* AVB_SYSDEPS_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_SYSDEPS_H_
+#define AVB_SYSDEPS_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Change these includes to match your platform to bring in the
+ * equivalent types available in a normal C runtime. At least things
+ * like uint8_t, uint64_t, and bool (with |false|, |true| keywords)
+ * must be present.
+ */
+#include <inttypes.h>
+#include <stdbool.h>
+#include <stddef.h>
+#ifdef CONFIG_USE_STDINT
+/* Provided by gcc. */
+#include <stdint.h>
+#else
+/* Type for `void *' pointers. */
+typedef unsigned long int uintptr_t;
+#endif
+
+/* If you don't have gcc or clang, these attribute macros may need to
+ * be adjusted.
+ */
+#define AVB_ATTR_WARN_UNUSED_RESULT __attribute__((warn_unused_result))
+#define AVB_ATTR_PACKED __attribute__((packed))
+#define AVB_ATTR_NO_RETURN __attribute__((noreturn))
+#define AVB_ATTR_SENTINEL __attribute__((__sentinel__))
+
+/* Size in bytes used for alignment. */
+#ifdef __LP64__
+#define AVB_ALIGNMENT_SIZE 8
+#else
+#define AVB_ALIGNMENT_SIZE 4
+#endif
+
+/* Compare |n| bytes in |src1| and |src2|.
+ *
+ * Returns an integer less than, equal to, or greater than zero if the
+ * first |n| bytes of |src1| is found, respectively, to be less than,
+ * to match, or be greater than the first |n| bytes of |src2|. */
+int avb_memcmp(const void* src1,
+               const void* src2,
+               size_t n) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Compare two strings.
+ *
+ * Return an integer less than, equal to, or greater than zero if |s1|
+ * is found, respectively, to be less than, to match, or be greater
+ * than |s2|.
+ */
+int avb_strcmp(const char* s1, const char* s2);
+
+/* Copy |n| bytes from |src| to |dest|. */
+void* avb_memcpy(void* dest, const void* src, size_t n);
+
+/* Set |n| bytes starting at |s| to |c|.  Returns |dest|. */
+void* avb_memset(void* dest, const int c, size_t n);
+
+/* Prints out a message. The string passed must be a NUL-terminated
+ * UTF-8 string.
+ */
+void avb_print(const char* message);
+
+/* Prints out a vector of strings. Each argument must point to a
+ * NUL-terminated UTF-8 string and NULL should be the last argument.
+ */
+void avb_printv(const char* message, ...) AVB_ATTR_SENTINEL;
+
+/* Aborts the program or reboots the device. */
+void avb_abort(void);
+
+/* Allocates |size| bytes. Returns NULL if no memory is available,
+ * otherwise a pointer to the allocated memory.
+ *
+ * The memory is not initialized.
+ *
+ * The pointer returned is guaranteed to be word-aligned.
+ *
+ * The memory should be freed with avb_free() when you are done with it.
+ */
+void* avb_malloc_(size_t size) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Frees memory previously allocated with avb_malloc(). */
+void avb_free(void* ptr);
+
+/* Returns the lenght of |str|, excluding the terminating NUL-byte. */
+size_t avb_strlen(const char* str) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Divide the |dividend| by 10 and saves back to the pointer. Return the
+ * remainder. */
+uint32_t avb_div_by_10(uint64_t* dividend);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_SYSDEPS_H_ */
diff --git a/include/android_avb/avb_util.h b/include/android_avb/avb_util.h
index 6c04a880f0..d23c961e10 100644
--- a/include/android_avb/avb_util.h
+++ b/include/android_avb/avb_util.h
@@ -1,273 +1,279 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/*
-#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
-#error "Never include this file directly, include libavb.h instead."
-#endif
-*/
-
-#ifndef AVB_UTIL_H_
-#define AVB_UTIL_H_
-
-#include <android_avb/avb_sysdeps.h>
-
-/* Converts a 32-bit unsigned integer from big-endian to host byte order. */
-uint32_t avb_be32toh(uint32_t in) AVB_ATTR_WARN_UNUSED_RESULT;
-
-/* Converts a 64-bit unsigned integer from big-endian to host byte order. */
-uint64_t avb_be64toh(uint64_t in) AVB_ATTR_WARN_UNUSED_RESULT;
-
-/* Converts a 32-bit unsigned integer from host to big-endian byte order. */
-uint32_t avb_htobe32(uint32_t in) AVB_ATTR_WARN_UNUSED_RESULT;
-
-/* Converts a 64-bit unsigned integer from host to big-endian byte order. */
-uint64_t avb_htobe64(uint64_t in) AVB_ATTR_WARN_UNUSED_RESULT;
-
-/* Compare |n| bytes starting at |s1| with |s2| and return 0 if they
- * match, 1 if they don't.  Returns 0 if |n|==0, since no bytes
- * mismatched.
- *
- * Time taken to perform the comparison is only dependent on |n| and
- * not on the relationship of the match between |s1| and |s2|.
- *
- * Note that unlike avb_memcmp(), this only indicates inequality, not
- * whether |s1| is less than or greater than |s2|.
- */
-int avb_safe_memcmp(const void* s1,
-                    const void* s2,
-                    size_t n) AVB_ATTR_WARN_UNUSED_RESULT;
-
-/* Adds |value_to_add| to |value| with overflow protection.
- *
- * Returns false if the addition overflows, true otherwise. In either
- * case, |value| is always modified.
- */
-bool avb_safe_add_to(uint64_t* value,
-                     uint64_t value_to_add) AVB_ATTR_WARN_UNUSED_RESULT;
-
-/* Adds |a| and |b| with overflow protection, returning the value in
- * |out_result|.
- *
- * It's permissible to pass NULL for |out_result| if you just want to
- * check that the addition would not overflow.
- *
- * Returns false if the addition overflows, true otherwise.
- */
-bool avb_safe_add(uint64_t* out_result,
-                  uint64_t a,
-                  uint64_t b) AVB_ATTR_WARN_UNUSED_RESULT;
-
-/* Checks if |num_bytes| data at |data| is a valid UTF-8
- * string. Returns true if valid UTF-8, false otherwise.
- */
-bool avb_validate_utf8(const uint8_t* data,
-                       size_t num_bytes) AVB_ATTR_WARN_UNUSED_RESULT;
-
-/* Concatenates |str1| (of |str1_len| bytes) and |str2| (of |str2_len|
- * bytes) and puts the result in |buf| which holds |buf_size|
- * bytes. The result is also guaranteed to be NUL terminated. Fail if
- * there is not enough room in |buf| for the resulting string plus
- * terminating NUL byte.
- *
- * Returns true if the operation succeeds, false otherwise.
- */
-bool avb_str_concat(char* buf,
-                    size_t buf_size,
-                    const char* str1,
-                    size_t str1_len,
-                    const char* str2,
-                    size_t str2_len);
-
-/* Like avb_malloc_() but prints a error using avb_error() if memory
- * allocation fails.
- */
-void* avb_malloc(size_t size) AVB_ATTR_WARN_UNUSED_RESULT;
-
-/* Like avb_malloc() but sets the memory with zeroes. */
-void* avb_calloc(size_t size) AVB_ATTR_WARN_UNUSED_RESULT;
-
-/* Duplicates a NUL-terminated string. Returns NULL on OOM. */
-char* avb_strdup(const char* str) AVB_ATTR_WARN_UNUSED_RESULT;
-
-/* Duplicates a NULL-terminated array of NUL-terminated strings by
- * concatenating them. The returned string will be
- * NUL-terminated. Returns NULL on OOM.
- */
-char* avb_strdupv(const char* str,
-                  ...) AVB_ATTR_WARN_UNUSED_RESULT AVB_ATTR_SENTINEL;
-
-/* Finds the first occurrence of |needle| in the string |haystack|
- * where both strings are NUL-terminated strings. The terminating NUL
- * bytes are not compared.
- *
- * Returns NULL if not found, otherwise points into |haystack| for the
- * first occurrence of |needle|.
- */
-const char* avb_strstr(const char* haystack,
-                       const char* needle) AVB_ATTR_WARN_UNUSED_RESULT;
-
-/* Finds the first occurrence of |str| in the NULL-terminated string
- * array |strings|. Each element in |strings| must be
- * NUL-terminated. The string given by |str| need not be
- * NUL-terminated but its size must be given in |str_size|.
- *
- * Returns NULL if not found, otherwise points into |strings| for the
- * first occurrence of |str|.
- */
-const char* avb_strv_find_str(const char* const* strings,
-                              const char* str,
-                              size_t str_size);
-
-/* Replaces all occurrences of |search| with |replace| in |str|.
- *
- * Returns a newly allocated string or NULL if out of memory.
- */
-char* avb_replace(const char* str,
-                  const char* search,
-                  const char* replace) AVB_ATTR_WARN_UNUSED_RESULT;
-
-/* Calculates the CRC-32 for data in |buf| of size |buf_size|. */
-uint32_t avb_crc32(const uint8_t* buf, size_t buf_size);
-
-/* Returns the basename of |str|. This is defined as the last path
- * component, assuming the normal POSIX separator '/'. If there are no
- * separators, returns |str|.
- */
-const char *avb_basename(const char* str);
-
-
-
-#define AVB_STRINGIFY(x) #x
-#define AVB_TO_STRING(x) AVB_STRINGIFY(x)
-
-#ifdef AVB_ENABLE_DEBUG
-/* Aborts the program if |expr| is false.
- *
- * This has no effect unless AVB_ENABLE_DEBUG is defined.
- */
-#define avb_assert(expr)                     \
-  do {                                       \
-    if (!(expr)) {                           \
-      avb_fatal("assert fail: " #expr "\n"); \
-    }                                        \
-  } while (0)
-#else
-#define avb_assert(expr)
-#endif
-
-/* Aborts the program if reached.
- *
- * This has no effect unless AVB_ENABLE_DEBUG is defined.
- */
-#ifdef AVB_ENABLE_DEBUG
-#define avb_assert_not_reached()         \
-  do {                                   \
-    avb_fatal("assert_not_reached()\n"); \
-  } while (0)
-#else
-#define avb_assert_not_reached()
-#endif
-
-/* Aborts the program if |addr| is not word-aligned.
- *
- * This has no effect unless AVB_ENABLE_DEBUG is defined.
- */
-#define avb_assert_aligned(addr) \
-  avb_assert((((uintptr_t)addr) & (AVB_ALIGNMENT_SIZE - 1)) == 0)
-
-#ifdef AVB_ENABLE_DEBUG
-/* Print functions, used for diagnostics.
- *
- * These have no effect unless AVB_ENABLE_DEBUG is defined.
- */
-#define avb_debug(message)              \
-  do {                                  \
-    avb_printv(avb_basename(__FILE__),  \
-               ":",                     \
-               AVB_TO_STRING(__LINE__), \
-               ": DEBUG: ",             \
-               message,                 \
-               NULL);                   \
-  } while (0)
-#define avb_debugv(message, ...)        \
-  do {                                  \
-    avb_printv(avb_basename(__FILE__),  \
-               ":",                     \
-               AVB_TO_STRING(__LINE__), \
-               ": DEBUG: ",             \
-               message,                 \
-               ##__VA_ARGS__);          \
-  } while (0)
-#else
-#define avb_debug(message)
-#define avb_debugv(message, ...)
-#endif
-
-/* Prints out a message. This is typically used if a runtime-error
- * occurs.
- */
-#define avb_error(message)              \
-  do {                                  \
-    avb_printv(avb_basename(__FILE__),  \
-               ":",                     \
-               AVB_TO_STRING(__LINE__), \
-               ": ERROR: ",             \
-               message,                 \
-               NULL);                   \
-  } while (0)
-#define avb_errorv(message, ...)        \
-  do {                                  \
-    avb_printv(avb_basename(__FILE__),  \
-               ":",                     \
-               AVB_TO_STRING(__LINE__), \
-               ": ERROR: ",             \
-               message,                 \
-               ##__VA_ARGS__);          \
-  } while (0)
-
-/* Prints out a message and calls avb_abort().
- */
-#define avb_fatal(message)              \
-  do {                                  \
-    avb_printv(avb_basename(__FILE__),  \
-               ":",                     \
-               AVB_TO_STRING(__LINE__), \
-               ": FATAL: ",             \
-               message,                 \
-               NULL);                   \
-    avb_abort();                        \
-  } while (0)
-#define avb_fatalv(message, ...)        \
-  do {                                  \
-    avb_printv(avb_basename(__FILE__),  \
-               ":",                     \
-               AVB_TO_STRING(__LINE__), \
-               ": FATAL: ",             \
-               message,                 \
-               ##__VA_ARGS__);          \
-    avb_abort();                        \
-  } while (0)
-
-#endif /* AVB_UTIL_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_UTIL_H_
+#define AVB_UTIL_H_
+
+#include <android_avb/avb_sysdeps.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define AVB_STRINGIFY(x) #x
+#define AVB_TO_STRING(x) AVB_STRINGIFY(x)
+
+#ifdef AVB_ENABLE_DEBUG
+/* Aborts the program if |expr| is false.
+ *
+ * This has no effect unless AVB_ENABLE_DEBUG is defined.
+ */
+#define avb_assert(expr)                     \
+  do {                                       \
+    if (!(expr)) {                           \
+      avb_fatal("assert fail: " #expr "\n"); \
+    }                                        \
+  } while (0)
+#else
+#define avb_assert(expr)
+#endif
+
+/* Aborts the program if reached.
+ *
+ * This has no effect unless AVB_ENABLE_DEBUG is defined.
+ */
+#ifdef AVB_ENABLE_DEBUG
+#define avb_assert_not_reached()         \
+  do {                                   \
+    avb_fatal("assert_not_reached()\n"); \
+  } while (0)
+#else
+#define avb_assert_not_reached()
+#endif
+
+/* Aborts the program if |addr| is not word-aligned.
+ *
+ * This has no effect unless AVB_ENABLE_DEBUG is defined.
+ */
+#define avb_assert_aligned(addr) \
+  avb_assert((((uintptr_t)addr) & (AVB_ALIGNMENT_SIZE - 1)) == 0)
+
+#ifdef AVB_ENABLE_DEBUG
+/* Print functions, used for diagnostics.
+ *
+ * These have no effect unless AVB_ENABLE_DEBUG is defined.
+ */
+#define avb_debug(message)              \
+  do {                                  \
+    avb_printv(avb_basename(__FILE__),  \
+               ":",                     \
+               AVB_TO_STRING(__LINE__), \
+               ": DEBUG: ",             \
+               message,                 \
+               NULL);                   \
+  } while (0)
+#define avb_debugv(message, ...)        \
+  do {                                  \
+    avb_printv(avb_basename(__FILE__),  \
+               ":",                     \
+               AVB_TO_STRING(__LINE__), \
+               ": DEBUG: ",             \
+               message,                 \
+               ##__VA_ARGS__);          \
+  } while (0)
+#else
+#define avb_debug(message)
+#define avb_debugv(message, ...)
+#endif
+
+/* Prints out a message. This is typically used if a runtime-error
+ * occurs.
+ */
+#define avb_error(message)              \
+  do {                                  \
+    avb_printv(avb_basename(__FILE__),  \
+               ":",                     \
+               AVB_TO_STRING(__LINE__), \
+               ": ERROR: ",             \
+               message,                 \
+               NULL);                   \
+  } while (0)
+#define avb_errorv(message, ...)        \
+  do {                                  \
+    avb_printv(avb_basename(__FILE__),  \
+               ":",                     \
+               AVB_TO_STRING(__LINE__), \
+               ": ERROR: ",             \
+               message,                 \
+               ##__VA_ARGS__);          \
+  } while (0)
+
+/* Prints out a message and calls avb_abort().
+ */
+#define avb_fatal(message)              \
+  do {                                  \
+    avb_printv(avb_basename(__FILE__),  \
+               ":",                     \
+               AVB_TO_STRING(__LINE__), \
+               ": FATAL: ",             \
+               message,                 \
+               NULL);                   \
+    avb_abort();                        \
+  } while (0)
+#define avb_fatalv(message, ...)        \
+  do {                                  \
+    avb_printv(avb_basename(__FILE__),  \
+               ":",                     \
+               AVB_TO_STRING(__LINE__), \
+               ": FATAL: ",             \
+               message,                 \
+               ##__VA_ARGS__);          \
+    avb_abort();                        \
+  } while (0)
+
+/* Converts a 32-bit unsigned integer from big-endian to host byte order. */
+uint32_t avb_be32toh(uint32_t in) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Converts a 64-bit unsigned integer from big-endian to host byte order. */
+uint64_t avb_be64toh(uint64_t in) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Converts a 32-bit unsigned integer from host to big-endian byte order. */
+uint32_t avb_htobe32(uint32_t in) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Converts a 64-bit unsigned integer from host to big-endian byte order. */
+uint64_t avb_htobe64(uint64_t in) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Compare |n| bytes starting at |s1| with |s2| and return 0 if they
+ * match, 1 if they don't.  Returns 0 if |n|==0, since no bytes
+ * mismatched.
+ *
+ * Time taken to perform the comparison is only dependent on |n| and
+ * not on the relationship of the match between |s1| and |s2|.
+ *
+ * Note that unlike avb_memcmp(), this only indicates inequality, not
+ * whether |s1| is less than or greater than |s2|.
+ */
+int avb_safe_memcmp(const void* s1,
+                    const void* s2,
+                    size_t n) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Adds |value_to_add| to |value| with overflow protection.
+ *
+ * Returns false if the addition overflows, true otherwise. In either
+ * case, |value| is always modified.
+ */
+bool avb_safe_add_to(uint64_t* value,
+                     uint64_t value_to_add) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Adds |a| and |b| with overflow protection, returning the value in
+ * |out_result|.
+ *
+ * It's permissible to pass NULL for |out_result| if you just want to
+ * check that the addition would not overflow.
+ *
+ * Returns false if the addition overflows, true otherwise.
+ */
+bool avb_safe_add(uint64_t* out_result,
+                  uint64_t a,
+                  uint64_t b) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Checks if |num_bytes| data at |data| is a valid UTF-8
+ * string. Returns true if valid UTF-8, false otherwise.
+ */
+bool avb_validate_utf8(const uint8_t* data,
+                       size_t num_bytes) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Concatenates |str1| (of |str1_len| bytes) and |str2| (of |str2_len|
+ * bytes) and puts the result in |buf| which holds |buf_size|
+ * bytes. The result is also guaranteed to be NUL terminated. Fail if
+ * there is not enough room in |buf| for the resulting string plus
+ * terminating NUL byte.
+ *
+ * Returns true if the operation succeeds, false otherwise.
+ */
+bool avb_str_concat(char* buf,
+                    size_t buf_size,
+                    const char* str1,
+                    size_t str1_len,
+                    const char* str2,
+                    size_t str2_len);
+
+/* Like avb_malloc_() but prints a error using avb_error() if memory
+ * allocation fails.
+ */
+void* avb_malloc(size_t size) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Like avb_malloc() but sets the memory with zeroes. */
+void* avb_calloc(size_t size) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Duplicates a NUL-terminated string. Returns NULL on OOM. */
+char* avb_strdup(const char* str) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Duplicates a NULL-terminated array of NUL-terminated strings by
+ * concatenating them. The returned string will be
+ * NUL-terminated. Returns NULL on OOM.
+ */
+char* avb_strdupv(const char* str,
+                  ...) AVB_ATTR_WARN_UNUSED_RESULT AVB_ATTR_SENTINEL;
+
+/* Finds the first occurrence of |needle| in the string |haystack|
+ * where both strings are NUL-terminated strings. The terminating NUL
+ * bytes are not compared.
+ *
+ * Returns NULL if not found, otherwise points into |haystack| for the
+ * first occurrence of |needle|.
+ */
+const char* avb_strstr(const char* haystack,
+                       const char* needle) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Finds the first occurrence of |str| in the NULL-terminated string
+ * array |strings|. Each element in |strings| must be
+ * NUL-terminated. The string given by |str| need not be
+ * NUL-terminated but its size must be given in |str_size|.
+ *
+ * Returns NULL if not found, otherwise points into |strings| for the
+ * first occurrence of |str|.
+ */
+const char* avb_strv_find_str(const char* const* strings,
+                              const char* str,
+                              size_t str_size);
+
+/* Replaces all occurrences of |search| with |replace| in |str|.
+ *
+ * Returns a newly allocated string or NULL if out of memory.
+ */
+char* avb_replace(const char* str,
+                  const char* search,
+                  const char* replace) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Calculates the CRC-32 for data in |buf| of size |buf_size|. */
+uint32_t avb_crc32(const uint8_t* buf, size_t buf_size);
+
+/* Returns the basename of |str|. This is defined as the last path
+ * component, assuming the normal POSIX separator '/'. If there are no
+ * separators, returns |str|.
+ */
+const char* avb_basename(const char* str);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_UTIL_H_ */
diff --git a/include/android_avb/avb_vbmeta_image.h b/include/android_avb/avb_vbmeta_image.h
index ab78e0f4e8..fbd82ff65b 100644
--- a/include/android_avb/avb_vbmeta_image.h
+++ b/include/android_avb/avb_vbmeta_image.h
@@ -1,293 +1,296 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/*
-#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
-#error "Never include this file directly, include libavb.h instead."
-#endif
-*/
-
-#ifndef AVB_VBMETA_IMAGE_H_
-#define AVB_VBMETA_IMAGE_H_
-
-#include <android_avb/avb_sysdeps.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include <android_avb/avb_crypto.h>
-#include <android_avb/avb_descriptor.h>
-
-/* Size of the vbmeta image header. */
-#define AVB_VBMETA_IMAGE_HEADER_SIZE 256
-
-/* Magic for the vbmeta image header. */
-#define AVB_MAGIC "AVB0"
-#define AVB_MAGIC_LEN 4
-
-/* Maximum size of the release string including the terminating NUL byte. */
-#define AVB_RELEASE_STRING_SIZE 48
-
-/* Flags for the vbmeta image.
- *
- * AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED: If this flag is set,
- * hashtree image verification will be disabled.
- */
-typedef enum {
-  AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED = (1 << 0),
-  AVB_VBMETA_IMAGE_FLAGS_VERIFICATION_DISABLED = (1 << 1)
-} AvbVBMetaImageFlags;
-
-/* Binary format for header of the vbmeta image.
- *
- * The vbmeta image consists of three blocks:
- *
- *  +-----------------------------------------+
- *  | Header data - fixed size                |
- *  +-----------------------------------------+
- *  | Authentication data - variable size     |
- *  +-----------------------------------------+
- *  | Auxiliary data - variable size          |
- *  +-----------------------------------------+
- *
- * The "Header data" block is described by this struct and is always
- * |AVB_VBMETA_IMAGE_HEADER_SIZE| bytes long.
- *
- * The "Authentication data" block is |authentication_data_block_size|
- * bytes long and contains the hash and signature used to authenticate
- * the vbmeta image. The type of the hash and signature is defined by
- * the |algorithm_type| field.
- *
- * The "Auxiliary data" is |auxiliary_data_block_size| bytes long and
- * contains the auxiliary data including the public key used to make
- * the signature and descriptors.
- *
- * The public key is at offset |public_key_offset| with size
- * |public_key_size| in this block. The size of the public key data is
- * defined by the |algorithm_type| field. The format of the public key
- * data is described in the |AvbRSAPublicKeyHeader| struct.
- *
- * The descriptors starts at |descriptors_offset| from the beginning
- * of the "Auxiliary Data" block and take up |descriptors_size|
- * bytes. Each descriptor is stored as a |AvbDescriptor| with tag and
- * number of bytes following. The number of descriptors can be
- * determined by walking this data until |descriptors_size| is
- * exhausted.
- *
- * The size of each of the "Authentication data" and "Auxiliary data"
- * blocks must be divisible by 64. This is to ensure proper alignment.
- *
- * Descriptors are free-form blocks stored in a part of the vbmeta
- * image subject to the same integrity checks as the rest of the
- * image. See the documentation for |AvbDescriptor| for well-known
- * descriptors. See avb_descriptor_foreach() for a convenience
- * function to iterate over descriptors.
- *
- * This struct is versioned, see the |required_libavb_version_major|
- * and |required_libavb_version_minor| fields. This represents the
- * minimum version of libavb required to verify the header and depends
- * on the features (e.g. algorithms, descriptors) used. Note that this
- * may be 1.0 even if generated by an avbtool from 1.4 but where no
- * features introduced after 1.0 has been used. See the "Versioning
- * and compatibility" section in the README.md file for more details.
- *
- * All fields are stored in network byte order when serialized. To
- * generate a copy with fields swapped to native byte order, use the
- * function avb_vbmeta_image_header_to_host_byte_order().
- *
- * Before reading and/or using any of this data, you MUST verify it
- * using avb_vbmeta_image_verify() and reject it unless it's signed by
- * a known good public key.
- */
-typedef struct AvbVBMetaImageHeader {
-  /*   0: Four bytes equal to "AVB0" (AVB_MAGIC). */
-  uint8_t magic[AVB_MAGIC_LEN];
-
-  /*   4: The major version of libavb required for this header. */
-  uint32_t required_libavb_version_major;
-  /*   8: The minor version of libavb required for this header. */
-  uint32_t required_libavb_version_minor;
-
-  /*  12: The size of the signature block. */
-  uint64_t authentication_data_block_size;
-  /*  20: The size of the auxiliary data block. */
-  uint64_t auxiliary_data_block_size;
-
-  /*  28: The verification algorithm used, see |AvbAlgorithmType| enum. */
-  uint32_t algorithm_type;
-
-  /*  32: Offset into the "Authentication data" block of hash data. */
-  uint64_t hash_offset;
-  /*  40: Length of the hash data. */
-  uint64_t hash_size;
-
-  /*  48: Offset into the "Authentication data" block of signature data. */
-  uint64_t signature_offset;
-  /*  56: Length of the signature data. */
-  uint64_t signature_size;
-
-  /*  64: Offset into the "Auxiliary data" block of public key data. */
-  uint64_t public_key_offset;
-  /*  72: Length of the public key data. */
-  uint64_t public_key_size;
-
-  /*  80: Offset into the "Auxiliary data" block of public key metadata. */
-  uint64_t public_key_metadata_offset;
-  /*  88: Length of the public key metadata. Must be set to zero if there
-   *  is no public key metadata.
-   */
-  uint64_t public_key_metadata_size;
-
-  /*  96: Offset into the "Auxiliary data" block of descriptor data. */
-  uint64_t descriptors_offset;
-  /* 104: Length of descriptor data. */
-  uint64_t descriptors_size;
-
-  /* 112: The rollback index which can be used to prevent rollback to
-   *  older versions.
-   */
-  uint64_t rollback_index;
-
-  /* 120: Flags from the AvbVBMetaImageFlags enumeration. This must be
-   * set to zero if the vbmeta image is not a top-level image.
-   */
-  uint32_t flags;
-
-  /* 124: Reserved to ensure |release_string| start on a 16-byte
-   * boundary. Must be set to zeroes.
-   */
-  uint8_t reserved0[4];
-
-  /* 128: The release string from avbtool, e.g. "avbtool 1.0.0" or
-   * "avbtool 1.0.0 xyz_board Git-234abde89". Is guaranteed to be NUL
-   * terminated. Applications must not make assumptions about how this
-   * string is formatted.
-   */
-  uint8_t release_string[AVB_RELEASE_STRING_SIZE];
-
-  /* 176: Padding to ensure struct is size AVB_VBMETA_IMAGE_HEADER_SIZE
-   * bytes. This must be set to zeroes.
-   */
-  uint8_t reserved[80];
-} AVB_ATTR_PACKED AvbVBMetaImageHeader;
-
-/* Copies |src| to |dest|, byte-swapping fields in the process.
- *
- * Make sure you've verified |src| using avb_vbmeta_image_verify()
- * before accessing the data and/or using this function.
- */
-void avb_vbmeta_image_header_to_host_byte_order(const AvbVBMetaImageHeader* src,
-                                                AvbVBMetaImageHeader* dest);
-
-/* Return codes used in avb_vbmeta_image_verify().
- *
- * AVB_VBMETA_VERIFY_RESULT_OK is returned if the vbmeta image header
- * is valid, the hash is correct and the signature is correct. Keep in
- * mind that you still need to check that you know the public key used
- * to sign the image, see avb_vbmeta_image_verify() for details.
- *
- * AVB_VBMETA_VERIFY_RESULT_OK_NOT_SIGNED is returned if the vbmeta
- * image header is valid but there is no signature or hash.
- *
- * AVB_VBMETA_VERIFY_RESULT_INVALID_VBMETA_HEADER is returned if the
- * header of the vbmeta image is invalid, for example, invalid magic
- * or inconsistent data.
- *
- * AVB_VBMETA_VERIFY_RESULT_UNSUPPORTED_VERSION is returned if a) the
- * vbmeta image requires a minimum version of libavb which exceeds the
- * version of libavb used; or b) the vbmeta image major version
- * differs from the major version of libavb in use.
- *
- * AVB_VBMETA_VERIFY_RESULT_HASH_MISMATCH is returned if the hash
- * stored in the "Authentication data" block does not match the
- * calculated hash.
- *
- * AVB_VBMETA_VERIFY_RESULT_SIGNATURE_MISMATCH is returned if the
- * signature stored in the "Authentication data" block is invalid or
- * doesn't match the public key stored in the vbmeta image.
- */
-typedef enum {
-  AVB_VBMETA_VERIFY_RESULT_OK,
-  AVB_VBMETA_VERIFY_RESULT_OK_NOT_SIGNED,
-  AVB_VBMETA_VERIFY_RESULT_INVALID_VBMETA_HEADER,
-  AVB_VBMETA_VERIFY_RESULT_UNSUPPORTED_VERSION,
-  AVB_VBMETA_VERIFY_RESULT_HASH_MISMATCH,
-  AVB_VBMETA_VERIFY_RESULT_SIGNATURE_MISMATCH,
-} AvbVBMetaVerifyResult;
-
-/* Get a textual representation of |result|. */
-const char* avb_vbmeta_verify_result_to_string(AvbVBMetaVerifyResult result);
-
-/* Checks that vbmeta image at |data| of size |length| is a valid
- * vbmeta image. The complete contents of the vbmeta image must be
- * passed in. It's fine if |length| is bigger than the actual image,
- * typically callers of this function will load the entire contents of
- * the 'vbmeta_a' or 'vbmeta_b' partition and pass in its length (for
- * example, 1 MiB).
- *
- * See the |AvbVBMetaImageHeader| struct for information about the
- * three blocks (header, authentication, auxiliary) that make up a
- * vbmeta image.
- *
- * If the function returns |AVB_VBMETA_VERIFY_RESULT_OK| and
- * |out_public_key_data| is non-NULL, it will be set to point inside
- * |data| for where the serialized public key data is stored and
- * |out_public_key_length|, if non-NULL, will be set to the length of
- * the public key data. If there is no public key in the metadata then
- * |out_public_key_data| is set to NULL.
- *
- * See the |AvbVBMetaVerifyResult| enum for possible return values.
- *
- * VERY IMPORTANT:
- *
- *   1. Even if |AVB_VBMETA_VERIFY_RESULT_OK| is returned, you still
- *      need to check that the public key embedded in the image
- *      matches a known key! You can use 'avbtool extract_public_key'
- *      to extract the key (at build time, then store it along your
- *      code) and compare it to what is returned in
- *      |out_public_key_data|.
- *
- *   2. You need to check the |rollback_index| field against a stored
- *      value in NVRAM and reject the vbmeta image if the value in
- *      NVRAM is bigger than |rollback_index|. You must also update
- *      the value stored in NVRAM to the smallest value of
- *      |rollback_index| field from boot images in all bootable and
- *      authentic slots marked as GOOD.
- *
- * This is a low-level function to only verify the vbmeta data - you
- * are likely looking for avb_slot_verify() instead for verifying
- * integrity data for a whole set of partitions.
- */
-AvbVBMetaVerifyResult avb_vbmeta_image_verify(
-    const uint8_t* data,
-    size_t length,
-    const uint8_t** out_public_key_data,
-    size_t* out_public_key_length) AVB_ATTR_WARN_UNUSED_RESULT;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* AVB_VBMETA_IMAGE_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_VBMETA_IMAGE_H_
+#define AVB_VBMETA_IMAGE_H_
+
+#include <android_avb/avb_sysdeps.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "avb_crypto.h"
+#include "avb_descriptor.h"
+
+/* Size of the vbmeta image header. */
+#define AVB_VBMETA_IMAGE_HEADER_SIZE 256
+
+/* Magic for the vbmeta image header. */
+#define AVB_MAGIC "AVB0"
+#define AVB_MAGIC_LEN 4
+
+/* Maximum size of the release string including the terminating NUL byte. */
+#define AVB_RELEASE_STRING_SIZE 48
+
+/* Flags for the vbmeta image.
+ *
+ * AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED: If this flag is set,
+ * hashtree image verification will be disabled.
+ *
+ * AVB_VBMETA_IMAGE_FLAGS_VERIFICATION_DISABLED: If this flag is set,
+ * verification will be disabled and descriptors will not be parsed.
+ */
+typedef enum {
+  AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED = (1 << 0),
+  AVB_VBMETA_IMAGE_FLAGS_VERIFICATION_DISABLED = (1 << 1)
+} AvbVBMetaImageFlags;
+
+/* Binary format for header of the vbmeta image.
+ *
+ * The vbmeta image consists of three blocks:
+ *
+ *  +-----------------------------------------+
+ *  | Header data - fixed size                |
+ *  +-----------------------------------------+
+ *  | Authentication data - variable size     |
+ *  +-----------------------------------------+
+ *  | Auxiliary data - variable size          |
+ *  +-----------------------------------------+
+ *
+ * The "Header data" block is described by this struct and is always
+ * |AVB_VBMETA_IMAGE_HEADER_SIZE| bytes long.
+ *
+ * The "Authentication data" block is |authentication_data_block_size|
+ * bytes long and contains the hash and signature used to authenticate
+ * the vbmeta image. The type of the hash and signature is defined by
+ * the |algorithm_type| field.
+ *
+ * The "Auxiliary data" is |auxiliary_data_block_size| bytes long and
+ * contains the auxiliary data including the public key used to make
+ * the signature and descriptors.
+ *
+ * The public key is at offset |public_key_offset| with size
+ * |public_key_size| in this block. The size of the public key data is
+ * defined by the |algorithm_type| field. The format of the public key
+ * data is described in the |AvbRSAPublicKeyHeader| struct.
+ *
+ * The descriptors starts at |descriptors_offset| from the beginning
+ * of the "Auxiliary Data" block and take up |descriptors_size|
+ * bytes. Each descriptor is stored as a |AvbDescriptor| with tag and
+ * number of bytes following. The number of descriptors can be
+ * determined by walking this data until |descriptors_size| is
+ * exhausted.
+ *
+ * The size of each of the "Authentication data" and "Auxiliary data"
+ * blocks must be divisible by 64. This is to ensure proper alignment.
+ *
+ * Descriptors are free-form blocks stored in a part of the vbmeta
+ * image subject to the same integrity checks as the rest of the
+ * image. See the documentation for |AvbDescriptor| for well-known
+ * descriptors. See avb_descriptor_foreach() for a convenience
+ * function to iterate over descriptors.
+ *
+ * This struct is versioned, see the |required_libavb_version_major|
+ * and |required_libavb_version_minor| fields. This represents the
+ * minimum version of libavb required to verify the header and depends
+ * on the features (e.g. algorithms, descriptors) used. Note that this
+ * may be 1.0 even if generated by an avbtool from 1.4 but where no
+ * features introduced after 1.0 has been used. See the "Versioning
+ * and compatibility" section in the README.md file for more details.
+ *
+ * All fields are stored in network byte order when serialized. To
+ * generate a copy with fields swapped to native byte order, use the
+ * function avb_vbmeta_image_header_to_host_byte_order().
+ *
+ * Before reading and/or using any of this data, you MUST verify it
+ * using avb_vbmeta_image_verify() and reject it unless it's signed by
+ * a known good public key.
+ */
+typedef struct AvbVBMetaImageHeader {
+  /*   0: Four bytes equal to "AVB0" (AVB_MAGIC). */
+  uint8_t magic[AVB_MAGIC_LEN];
+
+  /*   4: The major version of libavb required for this header. */
+  uint32_t required_libavb_version_major;
+  /*   8: The minor version of libavb required for this header. */
+  uint32_t required_libavb_version_minor;
+
+  /*  12: The size of the signature block. */
+  uint64_t authentication_data_block_size;
+  /*  20: The size of the auxiliary data block. */
+  uint64_t auxiliary_data_block_size;
+
+  /*  28: The verification algorithm used, see |AvbAlgorithmType| enum. */
+  uint32_t algorithm_type;
+
+  /*  32: Offset into the "Authentication data" block of hash data. */
+  uint64_t hash_offset;
+  /*  40: Length of the hash data. */
+  uint64_t hash_size;
+
+  /*  48: Offset into the "Authentication data" block of signature data. */
+  uint64_t signature_offset;
+  /*  56: Length of the signature data. */
+  uint64_t signature_size;
+
+  /*  64: Offset into the "Auxiliary data" block of public key data. */
+  uint64_t public_key_offset;
+  /*  72: Length of the public key data. */
+  uint64_t public_key_size;
+
+  /*  80: Offset into the "Auxiliary data" block of public key metadata. */
+  uint64_t public_key_metadata_offset;
+  /*  88: Length of the public key metadata. Must be set to zero if there
+   *  is no public key metadata.
+   */
+  uint64_t public_key_metadata_size;
+
+  /*  96: Offset into the "Auxiliary data" block of descriptor data. */
+  uint64_t descriptors_offset;
+  /* 104: Length of descriptor data. */
+  uint64_t descriptors_size;
+
+  /* 112: The rollback index which can be used to prevent rollback to
+   *  older versions.
+   */
+  uint64_t rollback_index;
+
+  /* 120: Flags from the AvbVBMetaImageFlags enumeration. This must be
+   * set to zero if the vbmeta image is not a top-level image.
+   */
+  uint32_t flags;
+
+  /* 124: Reserved to ensure |release_string| start on a 16-byte
+   * boundary. Must be set to zeroes.
+   */
+  uint8_t reserved0[4];
+
+  /* 128: The release string from avbtool, e.g. "avbtool 1.0.0" or
+   * "avbtool 1.0.0 xyz_board Git-234abde89". Is guaranteed to be NUL
+   * terminated. Applications must not make assumptions about how this
+   * string is formatted.
+   */
+  uint8_t release_string[AVB_RELEASE_STRING_SIZE];
+
+  /* 176: Padding to ensure struct is size AVB_VBMETA_IMAGE_HEADER_SIZE
+   * bytes. This must be set to zeroes.
+   */
+  uint8_t reserved[80];
+} AVB_ATTR_PACKED AvbVBMetaImageHeader;
+
+/* Copies |src| to |dest|, byte-swapping fields in the process.
+ *
+ * Make sure you've verified |src| using avb_vbmeta_image_verify()
+ * before accessing the data and/or using this function.
+ */
+void avb_vbmeta_image_header_to_host_byte_order(const AvbVBMetaImageHeader* src,
+                                                AvbVBMetaImageHeader* dest);
+
+/* Return codes used in avb_vbmeta_image_verify().
+ *
+ * AVB_VBMETA_VERIFY_RESULT_OK is returned if the vbmeta image header
+ * is valid, the hash is correct and the signature is correct. Keep in
+ * mind that you still need to check that you know the public key used
+ * to sign the image, see avb_vbmeta_image_verify() for details.
+ *
+ * AVB_VBMETA_VERIFY_RESULT_OK_NOT_SIGNED is returned if the vbmeta
+ * image header is valid but there is no signature or hash.
+ *
+ * AVB_VBMETA_VERIFY_RESULT_INVALID_VBMETA_HEADER is returned if the
+ * header of the vbmeta image is invalid, for example, invalid magic
+ * or inconsistent data.
+ *
+ * AVB_VBMETA_VERIFY_RESULT_UNSUPPORTED_VERSION is returned if a) the
+ * vbmeta image requires a minimum version of libavb which exceeds the
+ * version of libavb used; or b) the vbmeta image major version
+ * differs from the major version of libavb in use.
+ *
+ * AVB_VBMETA_VERIFY_RESULT_HASH_MISMATCH is returned if the hash
+ * stored in the "Authentication data" block does not match the
+ * calculated hash.
+ *
+ * AVB_VBMETA_VERIFY_RESULT_SIGNATURE_MISMATCH is returned if the
+ * signature stored in the "Authentication data" block is invalid or
+ * doesn't match the public key stored in the vbmeta image.
+ */
+typedef enum {
+  AVB_VBMETA_VERIFY_RESULT_OK,
+  AVB_VBMETA_VERIFY_RESULT_OK_NOT_SIGNED,
+  AVB_VBMETA_VERIFY_RESULT_INVALID_VBMETA_HEADER,
+  AVB_VBMETA_VERIFY_RESULT_UNSUPPORTED_VERSION,
+  AVB_VBMETA_VERIFY_RESULT_HASH_MISMATCH,
+  AVB_VBMETA_VERIFY_RESULT_SIGNATURE_MISMATCH,
+} AvbVBMetaVerifyResult;
+
+/* Get a textual representation of |result|. */
+const char* avb_vbmeta_verify_result_to_string(AvbVBMetaVerifyResult result);
+
+/* Checks that vbmeta image at |data| of size |length| is a valid
+ * vbmeta image. The complete contents of the vbmeta image must be
+ * passed in. It's fine if |length| is bigger than the actual image,
+ * typically callers of this function will load the entire contents of
+ * the 'vbmeta_a' or 'vbmeta_b' partition and pass in its length (for
+ * example, 1 MiB).
+ *
+ * See the |AvbVBMetaImageHeader| struct for information about the
+ * three blocks (header, authentication, auxiliary) that make up a
+ * vbmeta image.
+ *
+ * If the function returns |AVB_VBMETA_VERIFY_RESULT_OK| and
+ * |out_public_key_data| is non-NULL, it will be set to point inside
+ * |data| for where the serialized public key data is stored and
+ * |out_public_key_length|, if non-NULL, will be set to the length of
+ * the public key data. If there is no public key in the metadata then
+ * |out_public_key_data| is set to NULL.
+ *
+ * See the |AvbVBMetaVerifyResult| enum for possible return values.
+ *
+ * VERY IMPORTANT:
+ *
+ *   1. Even if |AVB_VBMETA_VERIFY_RESULT_OK| is returned, you still
+ *      need to check that the public key embedded in the image
+ *      matches a known key! You can use 'avbtool extract_public_key'
+ *      to extract the key (at build time, then store it along your
+ *      code) and compare it to what is returned in
+ *      |out_public_key_data|.
+ *
+ *   2. You need to check the |rollback_index| field against a stored
+ *      value in NVRAM and reject the vbmeta image if the value in
+ *      NVRAM is bigger than |rollback_index|. You must also update
+ *      the value stored in NVRAM to the smallest value of
+ *      |rollback_index| field from boot images in all bootable and
+ *      authentic slots marked as GOOD.
+ *
+ * This is a low-level function to only verify the vbmeta data - you
+ * are likely looking for avb_slot_verify() instead for verifying
+ * integrity data for a whole set of partitions.
+ */
+AvbVBMetaVerifyResult avb_vbmeta_image_verify(
+    const uint8_t* data,
+    size_t length,
+    const uint8_t** out_public_key_data,
+    size_t* out_public_key_length) AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_VBMETA_IMAGE_H_ */
diff --git a/include/android_avb/avb_version.h b/include/android_avb/avb_version.h
index 3479acc484..48e11705a9 100644
--- a/include/android_avb/avb_version.h
+++ b/include/android_avb/avb_version.h
@@ -1,61 +1,61 @@
-/*
- * Copyright (C) 2017 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/*
-#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
-#error "Never include this file directly, include libavb.h instead."
-#endif
-*/
-
-#ifndef AVB_VERSION_H_
-#define AVB_VERSION_H_
-
-#include <android_avb/avb_sysdeps.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* The version number of AVB - keep in sync with avbtool. */
-#define AVB_VERSION_MAJOR 1
-#define AVB_VERSION_MINOR 0
-#define AVB_VERSION_SUB 0
-
-/* Returns a NUL-terminated string for the libavb version in use.  The
- * returned string usually looks like "%d.%d.%d". Applications must
- * not make assumptions about the content of this string.
- *
- * Boot loaders should display this string in debug/diagnostics output
- * to aid with debugging.
- *
- * This is similar to the string put in the |release_string| string
- * field in the VBMeta struct by avbtool.
- */
-const char* avb_version_string(void);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* AVB_VERSION_H_ */
+/*
+ * Copyright (C) 2017 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_VERSION_H_
+#define AVB_VERSION_H_
+
+#include <android_avb/avb_sysdeps.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* The version number of AVB - keep in sync with avbtool. */
+#define AVB_VERSION_MAJOR 1
+#define AVB_VERSION_MINOR 0
+#define AVB_VERSION_SUB 0
+
+/* Returns a NUL-terminated string for the libavb version in use.  The
+ * returned string usually looks like "%d.%d.%d". Applications must
+ * not make assumptions about the content of this string.
+ *
+ * Boot loaders should display this string in debug/diagnostics output
+ * to aid with debugging.
+ *
+ * This is similar to the string put in the |release_string| string
+ * field in the VBMeta struct by avbtool.
+ */
+const char* avb_version_string(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_VERSION_H_ */
diff --git a/include/android_avb/libavb.h b/include/android_avb/libavb.h
index 596a8b7245..0e2b9c7cac 100644
--- a/include/android_avb/libavb.h
+++ b/include/android_avb/libavb.h
@@ -1,50 +1,50 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#ifndef LIBAVB_H_
-#define LIBAVB_H_
-
-/* The AVB_INSIDE_LIBAVB_H preprocessor symbol is used to enforce
- * library users to include only this file. All public interfaces, and
- * only public interfaces, must be included here.
- */
-
-#define AVB_INSIDE_LIBAVB_H
-#include <android_avb/avb_chain_partition_descriptor.h>
-#include <android_avb/avb_crypto.h>
-#include <android_avb/avb_descriptor.h>
-#include <android_avb/avb_footer.h>
-#include <android_avb/avb_hash_descriptor.h>
-#include <android_avb/avb_hashtree_descriptor.h>
-#include <android_avb/avb_kernel_cmdline_descriptor.h>
-#include <android_avb/avb_ops.h>
-#include <android_avb/avb_property_descriptor.h>
-#include <android_avb/avb_slot_verify.h>
-#include <android_avb/avb_sysdeps.h>
-#include <android_avb/avb_util.h>
-#include <android_avb/avb_vbmeta_image.h>
-#include <android_avb/avb_version.h>
-#undef AVB_INSIDE_LIBAVB_H
-
-#endif /* LIBAVB_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#ifndef LIBAVB_H_
+#define LIBAVB_H_
+
+/* The AVB_INSIDE_LIBAVB_H preprocessor symbol is used to enforce
+ * library users to include only this file. All public interfaces, and
+ * only public interfaces, must be included here.
+ */
+
+#define AVB_INSIDE_LIBAVB_H
+#include <android_avb/avb_chain_partition_descriptor.h>
+#include <android_avb/avb_crypto.h>
+#include <android_avb/avb_descriptor.h>
+#include <android_avb/avb_footer.h>
+#include <android_avb/avb_hash_descriptor.h>
+#include <android_avb/avb_hashtree_descriptor.h>
+#include <android_avb/avb_kernel_cmdline_descriptor.h>
+#include <android_avb/avb_ops.h>
+#include <android_avb/avb_property_descriptor.h>
+#include <android_avb/avb_slot_verify.h>
+#include <android_avb/avb_sysdeps.h>
+#include <android_avb/avb_util.h>
+#include <android_avb/avb_vbmeta_image.h>
+#include <android_avb/avb_version.h>
+#undef AVB_INSIDE_LIBAVB_H
+
+#endif /* LIBAVB_H_ */
diff --git a/include/android_avb/libavb_ab.h b/include/android_avb/libavb_ab.h
index fcedfd61bf..562cee1fa7 100644
--- a/include/android_avb/libavb_ab.h
+++ b/include/android_avb/libavb_ab.h
@@ -1,40 +1,54 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#ifndef LIBAVB_AB_H_
-#define LIBAVB_AB_H_
-
-#include <android_avb/libavb.h>
-
-/* The AVB_INSIDE_LIBAVB_AB_H preprocessor symbol is used to enforce
- * library users to include only this file. All public interfaces, and
- * only public interfaces, must be included here.
- */
-
-#define AVB_INSIDE_LIBAVB_AB_H
-#include <android_avb/avb_ab_flow.h>
-#include <android_avb/avb_ab_ops.h>
-#undef AVB_INSIDE_LIBAVB_AB_H
-
-#endif /* LIBAVB_AB_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#ifndef LIBAVB_AB_H_
+#define LIBAVB_AB_H_
+
+#include <android_avb/libavb.h>
+
+/* The libavb_ab/ and boot_control/ code has been marked for some time
+ * as experimental in anticipation of being removed in the future. It
+ * is now deprecated and to continue using it you must define
+ * AVB_AB_I_UNDERSTAND_LIBAVB_AB_IS_DEPRECATED. It will be removed Jun
+ * 1 2018.
+ */
+
+/*
+#ifndef AVB_AB_I_UNDERSTAND_LIBAVB_AB_IS_DEPRECATED
+#error \
+    "You must define AVB_AB_I_UNDERSTAND_LIBAVB_AB_IS_DEPRECATED to use this library."
+#endif
+*/
+
+/* The AVB_INSIDE_LIBAVB_AB_H preprocessor symbol is used to enforce
+ * library users to include only this file. All public interfaces, and
+ * only public interfaces, must be included here.
+ */
+
+#define AVB_INSIDE_LIBAVB_AB_H
+#include <android_avb/avb_ab_flow.h>
+#include <android_avb/avb_ab_ops.h>
+#undef AVB_INSIDE_LIBAVB_AB_H
+
+#endif /* LIBAVB_AB_H_ */
diff --git a/include/android_avb/libavb_atx.h b/include/android_avb/libavb_atx.h
index fc7c876a18..36ae6daa59 100644
--- a/include/android_avb/libavb_atx.h
+++ b/include/android_avb/libavb_atx.h
@@ -1,41 +1,41 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#ifndef LIBAVB_ATX_H_
-#define LIBAVB_ATX_H_
-
-#include <android_avb/libavb.h>
-
-/* The AVB_INSIDE_LIBAVB_ATX_H preprocessor symbol is used to enforce
- * library users to include only this file. All public interfaces, and
- * only public interfaces, must be included here.
- */
-
-#define AVB_INSIDE_LIBAVB_ATX_H
-#include <android_avb/avb_atx_ops.h>
-#include <android_avb/avb_atx_types.h>
-#include <android_avb/avb_atx_validate.h>
-#undef AVB_INSIDE_LIBAVB_ATX_H
-
-#endif /* LIBAVB_ATX_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#ifndef LIBAVB_ATX_H_
+#define LIBAVB_ATX_H_
+
+#include <android_avb/libavb.h>
+
+/* The AVB_INSIDE_LIBAVB_ATX_H preprocessor symbol is used to enforce
+ * library users to include only this file. All public interfaces, and
+ * only public interfaces, must be included here.
+ */
+
+#define AVB_INSIDE_LIBAVB_ATX_H
+#include <android_avb/avb_atx_ops.h>
+#include <android_avb/avb_atx_types.h>
+#include <android_avb/avb_atx_validate.h>
+#undef AVB_INSIDE_LIBAVB_ATX_H
+
+#endif /* LIBAVB_ATX_H_ */
diff --git a/include/android_avb/libavb_user.h b/include/android_avb/libavb_user.h
index 2bca7a5dcb..aaf7fde2fc 100644
--- a/include/android_avb/libavb_user.h
+++ b/include/android_avb/libavb_user.h
@@ -25,7 +25,7 @@
 #ifndef LIBAVB_USER_H_
 #define LIBAVB_USER_H_
 
-#include <android_avb/libavb_ab.h>
+#include <android_avb/libavb.h>
 
 /* The AVB_INSIDE_LIBAVB_USER_H preprocessor symbol is used to enforce
  * library users to include only this file. All public interfaces, and
diff --git a/include/android_avb/rk_avb_ops_user.h b/include/android_avb/rk_avb_ops_user.h
new file mode 100644
index 0000000000..fff8060cb0
--- /dev/null
+++ b/include/android_avb/rk_avb_ops_user.h
@@ -0,0 +1,247 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef RK_AVB_OPS_USER_H_
+#define RK_AVB_OPS_USER_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* rk used */
+#define PERM_ATTR_DIGEST_SIZE 32
+#define PERM_ATTR_TOTAL_SIZE  1052
+#define VBOOT_KEY_HASH_SIZE   32
+#define ANDROID_VBOOT_LOCK 0
+#define ANDROID_VBOOT_UNLOCK 1
+#define SLOT_NUM 2
+#define CURR_SYSTEM_SLOT_SUFFIX "ab"
+#define VBMETA_MAX_SIZE 65536
+#define ROLLBACK_MAX_SIZE 20
+#define LOCK_MASK 0x1
+#define UNLOCK_DISABLE_MASK 0x2
+#define VBOOT_STATE_SIZE    300
+#define PERM_ATTR_SUCCESS_FLAG 1
+/* soc-v use the rsa2048 */
+#define VBOOT_KEY_SIZE   256
+
+/**
+ * Provided to fastboot to read how many slot in this system.
+ *
+ * @param slot_count  We use parameter slot_count to obtain
+ *                    how many slots in the system.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int rk_avb_read_slot_count(char *slot_count);
+
+/**
+ * The android things supply many slots, their name like '_a', '_b'.
+ * We can use this function to read current slot is '_a' or '_b'.
+ *
+ * @slot_suffixes  read value '_a' or '_b'.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int rk_avb_read_slot_suffixes(char *slot_suffixes);
+
+/**
+ * Use this function to set which slot boot first.
+ *
+ * @param slot_number set '0' or '1'
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int rk_avb_set_slot_active(unsigned int *slot_number);
+
+/**
+ * Get current slot: '_a' or '_b'.
+ *
+ * @param select_slot  obtain current slot.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int rk_avb_get_current_slot(char *select_slot);
+
+/**
+ * The android things defines permanent attributes to
+ * store PSK_public, product id. We can use this function
+ * to read them.
+ *
+ * @param attributes  PSK_public, product id....
+ *
+ * @param size        The size of attributes.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int rk_avb_read_permanent_attributes(uint8_t *attributes, uint32_t size);
+
+/**
+ * The android things defines permanent attributes to
+ * store PSK_public, product id. We can use this function
+ * to write them.
+ *
+ * @param attributes  PSK_public, product id....
+ *
+ * @param size        The size of attributes.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int rk_avb_write_permanent_attributes(uint8_t *attributes, uint32_t size);
+
+/**
+ * The funtion can be use to read the device state to judge
+ * whether the device can be flash.
+ *
+ * @param flash_lock_state  A flag indicate the device flash state.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int rk_avb_read_flash_lock_state(uint8_t *flash_lock_state);
+
+/**
+ * The function is provided to write device flash state.
+ *
+ * @param flash_lock_state   A flag indicate the device flash state.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int rk_avb_write_flash_lock_state(uint8_t flash_lock_state);
+
+/**
+ * The android things use the flag of lock state to indicate
+ * whether the device can be booted when verified error.
+ *
+ * @param lock_state  A flag indicate the device lock state.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int rk_avb_read_lock_state(uint8_t *lock_state);
+
+/**
+ * The android things use the flag of lock state to indicate
+ * whether the device can be booted when verified error.
+ *
+ * @param lock_state   A flag indicate the device lock state.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int rk_avb_write_lock_state(uint8_t lock_state);
+
+/**
+ * The android things uses fastboot to flash the permanent attributes.
+ * And if them were written, there must have a flag to indicate.
+ *
+ * @param flag   indicate the permanent attributes have been written
+ *               or not.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int rk_avb_read_perm_attr_flag(uint8_t *flag);
+
+/**
+ * The android things uses fastboot to flash the permanent attributes.
+ * And if them were written, there must have a flag to indicate.
+ *
+ * @param flag   We can call this function to write the flag '1'
+ *               to indicate the permanent attributes has been
+ *               written.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int rk_avb_write_perm_attr_flag(uint8_t flag);
+
+/**
+ * The android things require the soc-v key hash to be flashed
+ * using the fastboot. So the function can be used in fastboot
+ * to flash the key hash.
+ *
+ * @param buf    The vboot key hash data.
+ *
+ * @param length The length of key hash.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int rk_avb_read_vbootkey_hash(uint8_t *buf, uint8_t length);
+
+/**
+ * The android things require the soc-v key hash to be flashed
+ * using the fastboot. So the function can be used in fastboot
+ * to flash the key hash.
+ *
+ * @param buf    The vboot key hash data.
+ *
+ * @param length The length of key hash.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int rk_avb_write_vbootkey_hash(uint8_t *buf, uint8_t length);
+
+/**
+ * U-boot close the optee client when start kernel
+ * to prevent the optee client being invoking by other
+ * program.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int rk_avb_close_optee_client(void);
+
+/**
+ * read the permanent attributes hash.
+ *
+ * @param buf    The permanent attributes hash data.
+ *
+ * @param length The length of permanent attributes hash.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int rk_avb_read_attribute_hash(uint8_t *buf, uint8_t length);
+
+/**
+ * Write the permanent attributes hash.
+ *
+ * @param buf    The permanent attributes hash data.
+ *
+ * @param length The length of permanent attributes hash.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int rk_avb_write_attribute_hash(uint8_t *buf, uint8_t length);
+
+/**
+ * Get the avb vboot state
+ *
+ * @param buf    store the vboot state.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+void rk_avb_get_at_vboot_state(char *buf);
+
+/**
+ * Get ab information from misc partition
+ *
+ * @param ab_data    the struct of ab information
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int rk_avb_get_ab_info(AvbABData* ab_data);
+
+/**
+ * Get the information whether the partition has slot
+ *
+ * @param the partition name
+ *
+ * @return 0 if the partition has slot, -1 if not
+ */
+int rk_avb_get_part_has_slot_info(const char *base_name);
+
+AvbABFlowResult rk_avb_ab_slot_select(AvbABOps* ab_ops,char select_slot[]);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* RK_AVB_OPS_USER_H_ */
diff --git a/lib/Kconfig b/lib/Kconfig
index 78e44aca0c..0743d91360 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -298,10 +298,11 @@ endmenu
 
 source lib/efi/Kconfig
 source lib/efi_loader/Kconfig
-source lib/avb/rk_libavb/Kconfig
-source lib/avb/rk_libavb_ab/Kconfig
-source lib/avb/rk_libavb_atx/Kconfig
-source lib/avb/rk_libavb_user/Kconfig
+source lib/avb/libavb/Kconfig
+source lib/avb/libavb_ab/Kconfig
+source lib/avb/libavb_atx/Kconfig
+source lib/avb/libavb_user/Kconfig
+source lib/avb/rk_avb_user/Kconfig
 source lib/optee_clientApi/Kconfig
 
 endmenu
diff --git a/lib/Makefile b/lib/Makefile
index 6000cd15d0..fdb9f8e043 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -44,10 +44,11 @@ obj-y += list_sort.o
 obj-$(CONFIG_OPTEE_CLIENT) += optee_clientApi/
 endif
 
-obj-$(CONFIG_$(SPL_TPL_)AVB_LIBAVB) += avb/rk_libavb/
-obj-$(CONFIG_$(SPL_TPL_)AVB_LIBAVB_AB) += avb/rk_libavb_ab/
-obj-$(CONFIG_$(SPL_TPL_)AVB_LIBAVB_ATX) += avb/rk_libavb_atx/
-obj-$(CONFIG_$(SPL_TPL_)AVB_LIBAVB_USER) += avb/rk_libavb_user/
+obj-$(CONFIG_$(SPL_TPL_)AVB_LIBAVB) += avb/libavb/
+obj-$(CONFIG_$(SPL_TPL_)AVB_LIBAVB_AB) += avb/libavb_ab/
+obj-$(CONFIG_$(SPL_TPL_)AVB_LIBAVB_ATX) += avb/libavb_atx/
+obj-$(CONFIG_$(SPL_TPL_)AVB_LIBAVB_USER) += avb/libavb_user/
+obj-$(CONFIG_$(SPL_TPL_)RK_AVB_LIBAVB_USER) += avb/rk_avb_user/
 
 obj-$(CONFIG_RSA) += rsa/
 obj-$(CONFIG_SHA1) += sha1.o
diff --git a/lib/avb/rk_libavb/Kconfig b/lib/avb/libavb/Kconfig
similarity index 100%
rename from lib/avb/rk_libavb/Kconfig
rename to lib/avb/libavb/Kconfig
diff --git a/lib/avb/rk_libavb/Makefile b/lib/avb/libavb/Makefile
similarity index 95%
rename from lib/avb/rk_libavb/Makefile
rename to lib/avb/libavb/Makefile
index 07ddb0cb9a..7b3d37b052 100644
--- a/lib/avb/rk_libavb/Makefile
+++ b/lib/avb/libavb/Makefile
@@ -1,4 +1,5 @@
 obj-y	+= avb_chain_partition_descriptor.o
+obj-y	+= avb_cmdline.o
 obj-y	+= avb_crc32.o
 obj-y	+= avb_crypto.o
 obj-y	+= avb_descriptor.o
diff --git a/lib/avb/rk_libavb/avb_chain_partition_descriptor.c b/lib/avb/libavb/avb_chain_partition_descriptor.c
similarity index 97%
rename from lib/avb/rk_libavb/avb_chain_partition_descriptor.c
rename to lib/avb/libavb/avb_chain_partition_descriptor.c
index 145b01b560..c325f7daf3 100644
--- a/lib/avb/rk_libavb/avb_chain_partition_descriptor.c
+++ b/lib/avb/libavb/avb_chain_partition_descriptor.c
@@ -1,64 +1,64 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include <android_avb/avb_chain_partition_descriptor.h>
-#include <android_avb/avb_util.h>
-
-bool avb_chain_partition_descriptor_validate_and_byteswap(
-    const AvbChainPartitionDescriptor* src, AvbChainPartitionDescriptor* dest) {
-  uint64_t expected_size;
-
-  avb_memcpy(dest, src, sizeof(AvbChainPartitionDescriptor));
-
-  if (!avb_descriptor_validate_and_byteswap((const AvbDescriptor*)src,
-                                            (AvbDescriptor*)dest))
-    return false;
-
-  if (dest->parent_descriptor.tag != AVB_DESCRIPTOR_TAG_CHAIN_PARTITION) {
-    avb_error("Invalid tag for chain partition descriptor.\n");
-    return false;
-  }
-
-  dest->rollback_index_location = avb_be32toh(dest->rollback_index_location);
-  dest->partition_name_len = avb_be32toh(dest->partition_name_len);
-  dest->public_key_len = avb_be32toh(dest->public_key_len);
-
-  if (dest->rollback_index_location < 1) {
-    avb_error("Invalid rollback index location value.\n");
-    return false;
-  }
-
-  /* Check that partition_name and public_key are fully contained. */
-  expected_size = sizeof(AvbChainPartitionDescriptor) - sizeof(AvbDescriptor);
-  if (!avb_safe_add_to(&expected_size, dest->partition_name_len) ||
-      !avb_safe_add_to(&expected_size, dest->public_key_len)) {
-    avb_error("Overflow while adding up sizes.\n");
-    return false;
-  }
-  if (expected_size > dest->parent_descriptor.num_bytes_following) {
-    avb_error("Descriptor payload size overflow.\n");
-    return false;
-  }
-  return true;
-}
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_chain_partition_descriptor.h>
+#include <android_avb/avb_util.h>
+
+bool avb_chain_partition_descriptor_validate_and_byteswap(
+    const AvbChainPartitionDescriptor* src, AvbChainPartitionDescriptor* dest) {
+  uint64_t expected_size;
+
+  avb_memcpy(dest, src, sizeof(AvbChainPartitionDescriptor));
+
+  if (!avb_descriptor_validate_and_byteswap((const AvbDescriptor*)src,
+                                            (AvbDescriptor*)dest))
+    return false;
+
+  if (dest->parent_descriptor.tag != AVB_DESCRIPTOR_TAG_CHAIN_PARTITION) {
+    avb_error("Invalid tag for chain partition descriptor.\n");
+    return false;
+  }
+
+  dest->rollback_index_location = avb_be32toh(dest->rollback_index_location);
+  dest->partition_name_len = avb_be32toh(dest->partition_name_len);
+  dest->public_key_len = avb_be32toh(dest->public_key_len);
+
+  if (dest->rollback_index_location < 1) {
+    avb_error("Invalid rollback index location value.\n");
+    return false;
+  }
+
+  /* Check that partition_name and public_key are fully contained. */
+  expected_size = sizeof(AvbChainPartitionDescriptor) - sizeof(AvbDescriptor);
+  if (!avb_safe_add_to(&expected_size, dest->partition_name_len) ||
+      !avb_safe_add_to(&expected_size, dest->public_key_len)) {
+    avb_error("Overflow while adding up sizes.\n");
+    return false;
+  }
+  if (expected_size > dest->parent_descriptor.num_bytes_following) {
+    avb_error("Descriptor payload size overflow.\n");
+    return false;
+  }
+  return true;
+}
diff --git a/lib/avb/libavb/avb_cmdline.c b/lib/avb/libavb/avb_cmdline.c
new file mode 100644
index 0000000000..ecf582ebd9
--- /dev/null
+++ b/lib/avb/libavb/avb_cmdline.c
@@ -0,0 +1,371 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_cmdline.h>
+#include <android_avb/avb_sha.h>
+#include <android_avb/avb_util.h>
+#include <android_avb/avb_version.h>
+
+#define NUM_GUIDS 3
+
+/* Substitutes all variables (e.g. $(ANDROID_SYSTEM_PARTUUID)) with
+ * values. Returns NULL on OOM, otherwise the cmdline with values
+ * replaced.
+ */
+char* avb_sub_cmdline(AvbOps* ops, const char* cmdline, const char* ab_suffix,
+                      bool using_boot_for_vbmeta) {
+  const char* part_name_str[NUM_GUIDS] = {"system", "boot", "vbmeta"};
+  const char* replace_str[NUM_GUIDS] = {"$(ANDROID_SYSTEM_PARTUUID)",
+                                        "$(ANDROID_BOOT_PARTUUID)",
+                                        "$(ANDROID_VBMETA_PARTUUID)"};
+  char* ret = NULL;
+  AvbIOResult io_ret;
+  size_t n;
+
+  /* Special-case for when the top-level vbmeta struct is in the boot
+   * partition.
+   */
+  if (using_boot_for_vbmeta) {
+    part_name_str[2] = "boot";
+  }
+
+  /* Replace unique partition GUIDs */
+  for (n = 0; n < NUM_GUIDS; n++) {
+    char part_name[AVB_PART_NAME_MAX_SIZE];
+    char guid_buf[37];
+
+    if (!avb_str_concat(part_name,
+                        sizeof part_name,
+                        part_name_str[n],
+                        avb_strlen(part_name_str[n]),
+                        ab_suffix,
+                        avb_strlen(ab_suffix))) {
+      avb_error("Partition name and suffix does not fit.\n");
+      goto fail;
+    }
+
+    io_ret = ops->get_unique_guid_for_partition(
+        ops, part_name, guid_buf, sizeof guid_buf);
+    if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+      return NULL;
+    } else if (io_ret != AVB_IO_RESULT_OK) {
+      avb_error("Error getting unique GUID for partition.\n");
+      goto fail;
+    }
+
+    if (ret == NULL) {
+      ret = avb_replace(cmdline, replace_str[n], guid_buf);
+    } else {
+      char* new_ret = avb_replace(ret, replace_str[n], guid_buf);
+      avb_free(ret);
+      ret = new_ret;
+    }
+    if (ret == NULL) {
+      goto fail;
+    }
+  }
+
+  return ret;
+
+fail:
+  if (ret != NULL) {
+    avb_free(ret);
+  }
+  return NULL;
+}
+
+static int cmdline_append_option(AvbSlotVerifyData* slot_data,
+                                 const char* key,
+                                 const char* value) {
+  size_t offset, key_len, value_len;
+  char* new_cmdline;
+
+  key_len = avb_strlen(key);
+  value_len = avb_strlen(value);
+
+  offset = 0;
+  if (slot_data->cmdline != NULL) {
+    offset = avb_strlen(slot_data->cmdline);
+    if (offset > 0) {
+      offset += 1;
+    }
+  }
+
+  new_cmdline = avb_calloc(offset + key_len + value_len + 2);
+  if (new_cmdline == NULL) {
+    return 0;
+  }
+  if (offset > 0) {
+    avb_memcpy(new_cmdline, slot_data->cmdline, offset - 1);
+    new_cmdline[offset - 1] = ' ';
+  }
+  avb_memcpy(new_cmdline + offset, key, key_len);
+  new_cmdline[offset + key_len] = '=';
+  avb_memcpy(new_cmdline + offset + key_len + 1, value, value_len);
+  if (slot_data->cmdline != NULL) {
+    avb_free(slot_data->cmdline);
+  }
+  slot_data->cmdline = new_cmdline;
+
+  return 1;
+}
+
+#define AVB_MAX_DIGITS_UINT64 32
+
+/* Writes |value| to |digits| in base 10 followed by a NUL byte.
+ * Returns number of characters written excluding the NUL byte.
+ */
+static size_t uint64_to_base10(uint64_t value,
+                               char digits[AVB_MAX_DIGITS_UINT64]) {
+  char rev_digits[AVB_MAX_DIGITS_UINT64];
+  size_t n, num_digits;
+
+  for (num_digits = 0; num_digits < AVB_MAX_DIGITS_UINT64 - 1;) {
+    rev_digits[num_digits++] = avb_div_by_10(&value) + '0';
+    if (value == 0) {
+      break;
+    }
+  }
+
+  for (n = 0; n < num_digits; n++) {
+    digits[n] = rev_digits[num_digits - 1 - n];
+  }
+  digits[n] = '\0';
+  return n;
+}
+
+static int cmdline_append_version(AvbSlotVerifyData* slot_data,
+                                  const char* key,
+                                  uint64_t major_version,
+                                  uint64_t minor_version) {
+  char major_digits[AVB_MAX_DIGITS_UINT64];
+  char minor_digits[AVB_MAX_DIGITS_UINT64];
+  char combined[AVB_MAX_DIGITS_UINT64 * 2 + 1];
+  size_t num_major_digits, num_minor_digits;
+
+  num_major_digits = uint64_to_base10(major_version, major_digits);
+  num_minor_digits = uint64_to_base10(minor_version, minor_digits);
+  avb_memcpy(combined, major_digits, num_major_digits);
+  combined[num_major_digits] = '.';
+  avb_memcpy(combined + num_major_digits + 1, minor_digits, num_minor_digits);
+  combined[num_major_digits + 1 + num_minor_digits] = '\0';
+
+  return cmdline_append_option(slot_data, key, combined);
+}
+
+static int cmdline_append_uint64_base10(AvbSlotVerifyData* slot_data,
+                                        const char* key,
+                                        uint64_t value) {
+  char digits[AVB_MAX_DIGITS_UINT64];
+  uint64_to_base10(value, digits);
+  return cmdline_append_option(slot_data, key, digits);
+}
+
+static int cmdline_append_hex(AvbSlotVerifyData* slot_data,
+                              const char* key,
+                              const uint8_t* data,
+                              size_t data_len) {
+  char hex_digits[17] = "0123456789abcdef";
+  char* hex_data;
+  int ret;
+  size_t n;
+
+  hex_data = avb_malloc(data_len * 2 + 1);
+  if (hex_data == NULL) {
+    return 0;
+  }
+
+  for (n = 0; n < data_len; n++) {
+    hex_data[n * 2] = hex_digits[data[n] >> 4];
+    hex_data[n * 2 + 1] = hex_digits[data[n] & 0x0f];
+  }
+  hex_data[n * 2] = '\0';
+
+  ret = cmdline_append_option(slot_data, key, hex_data);
+  avb_free(hex_data);
+  return ret;
+}
+
+AvbSlotVerifyResult avb_append_options(
+    AvbOps* ops,
+    AvbSlotVerifyData* slot_data,
+    AvbVBMetaImageHeader* toplevel_vbmeta,
+    AvbAlgorithmType algorithm_type,
+    AvbHashtreeErrorMode hashtree_error_mode) {
+  AvbSlotVerifyResult ret;
+  const char* verity_mode = NULL;
+  bool is_device_unlocked;
+  AvbIOResult io_ret;
+
+  /* Add androidboot.vbmeta.device option. */
+  if (!cmdline_append_option(slot_data,
+                             "androidboot.vbmeta.device",
+                             "PARTUUID=$(ANDROID_VBMETA_PARTUUID)")) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto out;
+  }
+
+  /* Add androidboot.vbmeta.avb_version option. */
+  if (!cmdline_append_version(slot_data,
+                              "androidboot.vbmeta.avb_version",
+                              AVB_VERSION_MAJOR,
+                              AVB_VERSION_MINOR)) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto out;
+  }
+
+  /* Set androidboot.avb.device_state to "locked" or "unlocked". */
+  io_ret = ops->read_is_device_unlocked(ops, &is_device_unlocked);
+  if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto out;
+  } else if (io_ret != AVB_IO_RESULT_OK) {
+    avb_error("Error getting device state.\n");
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+    goto out;
+  }
+  if (!cmdline_append_option(slot_data,
+                             "androidboot.vbmeta.device_state",
+                             is_device_unlocked ? "unlocked" : "locked")) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto out;
+  }
+
+  /* Set androidboot.vbmeta.{hash_alg, size, digest} - use same hash
+   * function as is used to sign vbmeta.
+   */
+  switch (algorithm_type) {
+    /* Explicit fallthrough. */
+    case AVB_ALGORITHM_TYPE_NONE:
+    case AVB_ALGORITHM_TYPE_SHA256_RSA2048:
+    case AVB_ALGORITHM_TYPE_SHA256_RSA4096:
+    case AVB_ALGORITHM_TYPE_SHA256_RSA8192: {
+      AvbSHA256Ctx ctx;
+      size_t n, total_size = 0;
+      avb_sha256_init(&ctx);
+      for (n = 0; n < slot_data->num_vbmeta_images; n++) {
+        avb_sha256_update(&ctx,
+                          slot_data->vbmeta_images[n].vbmeta_data,
+                          slot_data->vbmeta_images[n].vbmeta_size);
+        total_size += slot_data->vbmeta_images[n].vbmeta_size;
+      }
+      if (!cmdline_append_option(
+              slot_data, "androidboot.vbmeta.hash_alg", "sha256") ||
+          !cmdline_append_uint64_base10(
+              slot_data, "androidboot.vbmeta.size", total_size) ||
+          !cmdline_append_hex(slot_data,
+                              "androidboot.vbmeta.digest",
+                              avb_sha256_final(&ctx),
+                              AVB_SHA256_DIGEST_SIZE)) {
+        ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+        goto out;
+      }
+    } break;
+    /* Explicit fallthrough. */
+    case AVB_ALGORITHM_TYPE_SHA512_RSA2048:
+    case AVB_ALGORITHM_TYPE_SHA512_RSA4096:
+    case AVB_ALGORITHM_TYPE_SHA512_RSA8192: {
+      AvbSHA512Ctx ctx;
+      size_t n, total_size = 0;
+      avb_sha512_init(&ctx);
+      for (n = 0; n < slot_data->num_vbmeta_images; n++) {
+        avb_sha512_update(&ctx,
+                          slot_data->vbmeta_images[n].vbmeta_data,
+                          slot_data->vbmeta_images[n].vbmeta_size);
+        total_size += slot_data->vbmeta_images[n].vbmeta_size;
+      }
+      if (!cmdline_append_option(
+              slot_data, "androidboot.vbmeta.hash_alg", "sha512") ||
+          !cmdline_append_uint64_base10(
+              slot_data, "androidboot.vbmeta.size", total_size) ||
+          !cmdline_append_hex(slot_data,
+                              "androidboot.vbmeta.digest",
+                              avb_sha512_final(&ctx),
+                              AVB_SHA512_DIGEST_SIZE)) {
+        ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+        goto out;
+      }
+    } break;
+    case _AVB_ALGORITHM_NUM_TYPES:
+      avb_assert_not_reached();
+      break;
+  }
+
+  /* Set androidboot.veritymode and androidboot.vbmeta.invalidate_on_error */
+  if (toplevel_vbmeta->flags & AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED) {
+    verity_mode = "disabled";
+  } else {
+    const char* dm_verity_mode = NULL;
+    char* new_ret;
+
+    switch (hashtree_error_mode) {
+      case AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE:
+        if (!cmdline_append_option(
+                slot_data, "androidboot.vbmeta.invalidate_on_error", "yes")) {
+          ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+          goto out;
+        }
+        verity_mode = "enforcing";
+        dm_verity_mode = "restart_on_corruption";
+        break;
+      case AVB_HASHTREE_ERROR_MODE_RESTART:
+        verity_mode = "enforcing";
+        dm_verity_mode = "restart_on_corruption";
+        break;
+      case AVB_HASHTREE_ERROR_MODE_EIO:
+        verity_mode = "eio";
+        /* For now there's no option to specify the EIO mode. So
+         * just use 'ignore_zero_blocks' since that's already set
+         * and dm-verity-target.c supports specifying this multiple
+         * times.
+         */
+        dm_verity_mode = "ignore_zero_blocks";
+        break;
+      case AVB_HASHTREE_ERROR_MODE_LOGGING:
+        verity_mode = "logging";
+        dm_verity_mode = "ignore_corruption";
+        break;
+    }
+    new_ret = avb_replace(
+        slot_data->cmdline, "$(ANDROID_VERITY_MODE)", dm_verity_mode);
+    avb_free(slot_data->cmdline);
+    slot_data->cmdline = new_ret;
+    if (slot_data->cmdline == NULL) {
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+      goto out;
+    }
+  }
+  if (!cmdline_append_option(
+          slot_data, "androidboot.veritymode", verity_mode)) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto out;
+  }
+
+  ret = AVB_SLOT_VERIFY_RESULT_OK;
+
+out:
+
+  return ret;
+}
+
diff --git a/lib/avb/rk_libavb/avb_crc32.c b/lib/avb/libavb/avb_crc32.c
similarity index 94%
rename from lib/avb/rk_libavb/avb_crc32.c
rename to lib/avb/libavb/avb_crc32.c
index 674dfe38c6..8629eb627b 100644
--- a/lib/avb/rk_libavb/avb_crc32.c
+++ b/lib/avb/libavb/avb_crc32.c
@@ -1,114 +1,114 @@
-/*-
- *  COPYRIGHT (C) 1986 Gary S. Brown.  You may use this program, or
- *  code or tables extracted from it, as desired without restriction.
- */
-
-/*
- *  First, the polynomial itself and its table of feedback terms.  The
- *  polynomial is
- *  X^32+X^26+X^23+X^22+X^16+X^12+X^11+X^10+X^8+X^7+X^5+X^4+X^2+X^1+X^0
- *
- *  Note that we take it "backwards" and put the highest-order term in
- *  the lowest-order bit.  The X^32 term is "implied"; the LSB is the
- *  X^31 term, etc.  The X^0 term (usually shown as "+1") results in
- *  the MSB being 1
- *
- *  Note that the usual hardware shift register implementation, which
- *  is what we're using (we're merely optimizing it by doing eight-bit
- *  chunks at a time) shifts bits into the lowest-order term.  In our
- *  implementation, that means shifting towards the right.  Why do we
- *  do it this way?  Because the calculated CRC must be transmitted in
- *  order from highest-order term to lowest-order term.  UARTs transmit
- *  characters in order from LSB to MSB.  By storing the CRC this way
- *  we hand it to the UART in the order low-byte to high-byte; the UART
- *  sends each low-bit to hight-bit; and the result is transmission bit
- *  by bit from highest- to lowest-order term without requiring any bit
- *  shuffling on our part.  Reception works similarly
- *
- *  The feedback terms table consists of 256, 32-bit entries.  Notes
- *
- *      The table can be generated at runtime if desired; code to do so
- *      is shown later.  It might not be obvious, but the feedback
- *      terms simply represent the results of eight shift/xor opera
- *      tions for all combinations of data and CRC register values
- *
- *      The values must be right-shifted by eight bits by the "updcrc
- *      logic; the shift must be unsigned (bring in zeroes).  On some
- *      hardware you could probably optimize the shift in assembler by
- *      using byte-swap instructions
- *      polynomial $edb88320
- *
- *
- * CRC32 code derived from work by Gary S. Brown.
- */
-
-#include <android_avb/avb_sysdeps.h>
-#include <android_avb/avb_util.h>
-
-/* Code taken from FreeBSD 8 */
-
-static uint32_t crc32_tab[] = {
-    0x00000000, 0x77073096, 0xee0e612c, 0x990951ba, 0x076dc419, 0x706af48f,
-    0xe963a535, 0x9e6495a3, 0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988,
-    0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91, 0x1db71064, 0x6ab020f2,
-    0xf3b97148, 0x84be41de, 0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7,
-    0x136c9856, 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec, 0x14015c4f, 0x63066cd9,
-    0xfa0f3d63, 0x8d080df5, 0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172,
-    0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b, 0x35b5a8fa, 0x42b2986c,
-    0xdbbbc9d6, 0xacbcf940, 0x32d86ce3, 0x45df5c75, 0xdcd60dcf, 0xabd13d59,
-    0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116, 0x21b4f4b5, 0x56b3c423,
-    0xcfba9599, 0xb8bda50f, 0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924,
-    0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d, 0x76dc4190, 0x01db7106,
-    0x98d220bc, 0xefd5102a, 0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433,
-    0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818, 0x7f6a0dbb, 0x086d3d2d,
-    0x91646c97, 0xe6635c01, 0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e,
-    0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457, 0x65b0d9c6, 0x12b7e950,
-    0x8bbeb8ea, 0xfcb9887c, 0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65,
-    0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2, 0x4adfa541, 0x3dd895d7,
-    0xa4d1c46d, 0xd3d6f4fb, 0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0,
-    0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9, 0x5005713c, 0x270241aa,
-    0xbe0b1010, 0xc90c2086, 0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f,
-    0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4, 0x59b33d17, 0x2eb40d81,
-    0xb7bd5c3b, 0xc0ba6cad, 0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a,
-    0xead54739, 0x9dd277af, 0x04db2615, 0x73dc1683, 0xe3630b12, 0x94643b84,
-    0x0d6d6a3e, 0x7a6a5aa8, 0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1,
-    0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe, 0xf762575d, 0x806567cb,
-    0x196c3671, 0x6e6b06e7, 0xfed41b76, 0x89d32be0, 0x10da7a5a, 0x67dd4acc,
-    0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5, 0xd6d6a3e8, 0xa1d1937e,
-    0x38d8c2c4, 0x4fdff252, 0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b,
-    0xd80d2bda, 0xaf0a1b4c, 0x36034af6, 0x41047a60, 0xdf60efc3, 0xa867df55,
-    0x316e8eef, 0x4669be79, 0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236,
-    0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f, 0xc5ba3bbe, 0xb2bd0b28,
-    0x2bb45a92, 0x5cb36a04, 0xc2d7ffa7, 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d,
-    0x9b64c2b0, 0xec63f226, 0x756aa39c, 0x026d930a, 0x9c0906a9, 0xeb0e363f,
-    0x72076785, 0x05005713, 0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38,
-    0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21, 0x86d3d2d4, 0xf1d4e242,
-    0x68ddb3f8, 0x1fda836e, 0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777,
-    0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c, 0x8f659eff, 0xf862ae69,
-    0x616bffd3, 0x166ccf45, 0xa00ae278, 0xd70dd2ee, 0x4e048354, 0x3903b3c2,
-    0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db, 0xaed16a4a, 0xd9d65adc,
-    0x40df0b66, 0x37d83bf0, 0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9,
-    0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6, 0xbad03605, 0xcdd70693,
-    0x54de5729, 0x23d967bf, 0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94,
-    0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d};
-
-/*
- * A function that calculates the CRC-32 based on the table above is
- * given below for documentation purposes. An equivalent implementation
- * of this function that's actually used in the kernel can be found
- * in sys/libkern.h, where it can be inlined.
- */
-
-static uint32_t crc32(uint32_t crc_in, const uint8_t* buf, int size) {
-  const uint8_t* p = buf;
-  uint32_t crc;
-
-  crc = crc_in ^ ~0U;
-  while (size--)
-    crc = crc32_tab[(crc ^ *p++) & 0xFF] ^ (crc >> 8);
-  return crc ^ ~0U;
-}
-
-uint32_t avb_crc32(const uint8_t* buf, size_t size) {
-  return crc32(0, buf, size);
-}
+/*-
+ *  COPYRIGHT (C) 1986 Gary S. Brown.  You may use this program, or
+ *  code or tables extracted from it, as desired without restriction.
+ */
+
+/*
+ *  First, the polynomial itself and its table of feedback terms.  The
+ *  polynomial is
+ *  X^32+X^26+X^23+X^22+X^16+X^12+X^11+X^10+X^8+X^7+X^5+X^4+X^2+X^1+X^0
+ *
+ *  Note that we take it "backwards" and put the highest-order term in
+ *  the lowest-order bit.  The X^32 term is "implied"; the LSB is the
+ *  X^31 term, etc.  The X^0 term (usually shown as "+1") results in
+ *  the MSB being 1
+ *
+ *  Note that the usual hardware shift register implementation, which
+ *  is what we're using (we're merely optimizing it by doing eight-bit
+ *  chunks at a time) shifts bits into the lowest-order term.  In our
+ *  implementation, that means shifting towards the right.  Why do we
+ *  do it this way?  Because the calculated CRC must be transmitted in
+ *  order from highest-order term to lowest-order term.  UARTs transmit
+ *  characters in order from LSB to MSB.  By storing the CRC this way
+ *  we hand it to the UART in the order low-byte to high-byte; the UART
+ *  sends each low-bit to hight-bit; and the result is transmission bit
+ *  by bit from highest- to lowest-order term without requiring any bit
+ *  shuffling on our part.  Reception works similarly
+ *
+ *  The feedback terms table consists of 256, 32-bit entries.  Notes
+ *
+ *      The table can be generated at runtime if desired; code to do so
+ *      is shown later.  It might not be obvious, but the feedback
+ *      terms simply represent the results of eight shift/xor opera
+ *      tions for all combinations of data and CRC register values
+ *
+ *      The values must be right-shifted by eight bits by the "updcrc
+ *      logic; the shift must be unsigned (bring in zeroes).  On some
+ *      hardware you could probably optimize the shift in assembler by
+ *      using byte-swap instructions
+ *      polynomial $edb88320
+ *
+ *
+ * CRC32 code derived from work by Gary S. Brown.
+ */
+
+#include <android_avb/avb_sysdeps.h>
+#include <android_avb/avb_util.h>
+
+/* Code taken from FreeBSD 8 */
+
+static uint32_t iavb_crc32_tab[] = {
+    0x00000000, 0x77073096, 0xee0e612c, 0x990951ba, 0x076dc419, 0x706af48f,
+    0xe963a535, 0x9e6495a3, 0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988,
+    0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91, 0x1db71064, 0x6ab020f2,
+    0xf3b97148, 0x84be41de, 0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7,
+    0x136c9856, 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec, 0x14015c4f, 0x63066cd9,
+    0xfa0f3d63, 0x8d080df5, 0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172,
+    0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b, 0x35b5a8fa, 0x42b2986c,
+    0xdbbbc9d6, 0xacbcf940, 0x32d86ce3, 0x45df5c75, 0xdcd60dcf, 0xabd13d59,
+    0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116, 0x21b4f4b5, 0x56b3c423,
+    0xcfba9599, 0xb8bda50f, 0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924,
+    0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d, 0x76dc4190, 0x01db7106,
+    0x98d220bc, 0xefd5102a, 0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433,
+    0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818, 0x7f6a0dbb, 0x086d3d2d,
+    0x91646c97, 0xe6635c01, 0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e,
+    0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457, 0x65b0d9c6, 0x12b7e950,
+    0x8bbeb8ea, 0xfcb9887c, 0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65,
+    0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2, 0x4adfa541, 0x3dd895d7,
+    0xa4d1c46d, 0xd3d6f4fb, 0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0,
+    0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9, 0x5005713c, 0x270241aa,
+    0xbe0b1010, 0xc90c2086, 0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f,
+    0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4, 0x59b33d17, 0x2eb40d81,
+    0xb7bd5c3b, 0xc0ba6cad, 0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a,
+    0xead54739, 0x9dd277af, 0x04db2615, 0x73dc1683, 0xe3630b12, 0x94643b84,
+    0x0d6d6a3e, 0x7a6a5aa8, 0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1,
+    0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe, 0xf762575d, 0x806567cb,
+    0x196c3671, 0x6e6b06e7, 0xfed41b76, 0x89d32be0, 0x10da7a5a, 0x67dd4acc,
+    0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5, 0xd6d6a3e8, 0xa1d1937e,
+    0x38d8c2c4, 0x4fdff252, 0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b,
+    0xd80d2bda, 0xaf0a1b4c, 0x36034af6, 0x41047a60, 0xdf60efc3, 0xa867df55,
+    0x316e8eef, 0x4669be79, 0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236,
+    0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f, 0xc5ba3bbe, 0xb2bd0b28,
+    0x2bb45a92, 0x5cb36a04, 0xc2d7ffa7, 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d,
+    0x9b64c2b0, 0xec63f226, 0x756aa39c, 0x026d930a, 0x9c0906a9, 0xeb0e363f,
+    0x72076785, 0x05005713, 0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38,
+    0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21, 0x86d3d2d4, 0xf1d4e242,
+    0x68ddb3f8, 0x1fda836e, 0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777,
+    0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c, 0x8f659eff, 0xf862ae69,
+    0x616bffd3, 0x166ccf45, 0xa00ae278, 0xd70dd2ee, 0x4e048354, 0x3903b3c2,
+    0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db, 0xaed16a4a, 0xd9d65adc,
+    0x40df0b66, 0x37d83bf0, 0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9,
+    0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6, 0xbad03605, 0xcdd70693,
+    0x54de5729, 0x23d967bf, 0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94,
+    0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d};
+
+/*
+ * A function that calculates the CRC-32 based on the table above is
+ * given below for documentation purposes. An equivalent implementation
+ * of this function that's actually used in the kernel can be found
+ * in sys/libkern.h, where it can be inlined.
+ */
+
+static uint32_t iavb_crc32(uint32_t crc_in, const uint8_t* buf, int size) {
+  const uint8_t* p = buf;
+  uint32_t crc;
+
+  crc = crc_in ^ ~0U;
+  while (size--)
+    crc = iavb_crc32_tab[(crc ^ *p++) & 0xFF] ^ (crc >> 8);
+  return crc ^ ~0U;
+}
+
+uint32_t avb_crc32(const uint8_t* buf, size_t size) {
+  return iavb_crc32(0, buf, size);
+}
diff --git a/lib/avb/rk_libavb/avb_crypto.c b/lib/avb/libavb/avb_crypto.c
similarity index 98%
rename from lib/avb/rk_libavb/avb_crypto.c
rename to lib/avb/libavb/avb_crypto.c
index 89c814803c..a99979a622 100644
--- a/lib/avb/rk_libavb/avb_crypto.c
+++ b/lib/avb/libavb/avb_crypto.c
@@ -1,373 +1,372 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include <android_avb/avb_crypto.h>
-#include <android_avb/avb_rsa.h>
-#include <android_avb/avb_sha.h>
-#include <android_avb/avb_util.h>
-
-/* NOTE: The PKC1-v1.5 padding is a blob of binary DER of ASN.1 and is
- * obtained from section 5.2.2 of RFC 4880.
- */
-
-static const uint8_t
-    padding_RSA2048_SHA256[AVB_RSA2048_NUM_BYTES - AVB_SHA256_DIGEST_SIZE] = {
-        0x00, 0x01, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0x00, 0x30, 0x31, 0x30, 0x0d, 0x06, 0x09, 0x60, 0x86, 0x48, 0x01, 0x65,
-        0x03, 0x04, 0x02, 0x01, 0x05, 0x00, 0x04, 0x20};
-
-static const uint8_t
-    padding_RSA4096_SHA256[AVB_RSA4096_NUM_BYTES - AVB_SHA256_DIGEST_SIZE] = {
-        0x00, 0x01, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0x00, 0x30, 0x31, 0x30, 0x0d, 0x06, 0x09, 0x60,
-        0x86, 0x48, 0x01, 0x65, 0x03, 0x04, 0x02, 0x01, 0x05, 0x00, 0x04, 0x20};
-
-static const uint8_t
-    padding_RSA8192_SHA256[AVB_RSA8192_NUM_BYTES - AVB_SHA256_DIGEST_SIZE] = {
-        0x00, 0x01, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0x00, 0x30, 0x31, 0x30, 0x0d, 0x06, 0x09, 0x60, 0x86, 0x48, 0x01, 0x65,
-        0x03, 0x04, 0x02, 0x01, 0x05, 0x00, 0x04, 0x20};
-
-static const uint8_t
-    padding_RSA2048_SHA512[AVB_RSA2048_NUM_BYTES - AVB_SHA512_DIGEST_SIZE] = {
-        0x00, 0x01, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0x00, 0x30, 0x51, 0x30, 0x0d, 0x06, 0x09, 0x60,
-        0x86, 0x48, 0x01, 0x65, 0x03, 0x04, 0x02, 0x03, 0x05, 0x00, 0x04, 0x40};
-
-static const uint8_t
-    padding_RSA4096_SHA512[AVB_RSA4096_NUM_BYTES - AVB_SHA512_DIGEST_SIZE] = {
-        0x00, 0x01, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x30, 0x51, 0x30,
-        0x0d, 0x06, 0x09, 0x60, 0x86, 0x48, 0x01, 0x65, 0x03, 0x04, 0x02, 0x03,
-        0x05, 0x00, 0x04, 0x40};
-
-static const uint8_t
-    padding_RSA8192_SHA512[AVB_RSA8192_NUM_BYTES - AVB_SHA512_DIGEST_SIZE] = {
-        0x00, 0x01, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0x00, 0x30, 0x51, 0x30, 0x0d, 0x06, 0x09, 0x60,
-        0x86, 0x48, 0x01, 0x65, 0x03, 0x04, 0x02, 0x03, 0x05, 0x00, 0x04, 0x40};
-
-static AvbAlgorithmData algorithm_data[_AVB_ALGORITHM_NUM_TYPES] = {
-    /* AVB_ALGORITHM_TYPE_NONE */
-    {.padding = NULL, .padding_len = 0, .hash_len = 0},
-    /* AVB_ALGORITHM_TYPE_SHA256_RSA2048 */
-    {.padding = padding_RSA2048_SHA256,
-     .padding_len = sizeof(padding_RSA2048_SHA256),
-     .hash_len = AVB_SHA256_DIGEST_SIZE},
-    /* AVB_ALGORITHM_TYPE_SHA256_RSA4096 */
-    {.padding = padding_RSA4096_SHA256,
-     .padding_len = sizeof(padding_RSA4096_SHA256),
-     .hash_len = AVB_SHA256_DIGEST_SIZE},
-    /* AVB_ALGORITHM_TYPE_SHA256_RSA8192 */
-    {.padding = padding_RSA8192_SHA256,
-     .padding_len = sizeof(padding_RSA8192_SHA256),
-     .hash_len = AVB_SHA256_DIGEST_SIZE},
-    /* AVB_ALGORITHM_TYPE_SHA512_RSA2048 */
-    {.padding = padding_RSA2048_SHA512,
-     .padding_len = sizeof(padding_RSA2048_SHA512),
-     .hash_len = AVB_SHA512_DIGEST_SIZE},
-    /* AVB_ALGORITHM_TYPE_SHA512_RSA4096 */
-    {.padding = padding_RSA4096_SHA512,
-     .padding_len = sizeof(padding_RSA4096_SHA512),
-     .hash_len = AVB_SHA512_DIGEST_SIZE},
-    /* AVB_ALGORITHM_TYPE_SHA512_RSA8192 */
-    {.padding = padding_RSA8192_SHA512,
-     .padding_len = sizeof(padding_RSA8192_SHA512),
-     .hash_len = AVB_SHA512_DIGEST_SIZE},
-};
-
-const AvbAlgorithmData* avb_get_algorithm_data(AvbAlgorithmType algorithm) {
-  if (algorithm >= AVB_ALGORITHM_TYPE_NONE &&
-      algorithm < _AVB_ALGORITHM_NUM_TYPES) {
-    return &algorithm_data[algorithm];
-  }
-  return NULL;
-}
-
-bool avb_rsa_public_key_header_validate_and_byteswap(
-    const AvbRSAPublicKeyHeader* src, AvbRSAPublicKeyHeader* dest) {
-  avb_memcpy(dest, src, sizeof(AvbRSAPublicKeyHeader));
-
-  dest->key_num_bits = avb_be32toh(dest->key_num_bits);
-  dest->n0inv = avb_be32toh(dest->n0inv);
-
-  return true;
-}
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_crypto.h>
+#include <android_avb/avb_rsa.h>
+#include <android_avb/avb_sha.h>
+#include <android_avb/avb_util.h>
+
+/* NOTE: The PKC1-v1.5 padding is a blob of binary DER of ASN.1 and is
+ * obtained from section 5.2.2 of RFC 4880.
+ */
+
+static const uint8_t
+    padding_RSA2048_SHA256[AVB_RSA2048_NUM_BYTES - AVB_SHA256_DIGEST_SIZE] = {
+        0x00, 0x01, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0x00, 0x30, 0x31, 0x30, 0x0d, 0x06, 0x09, 0x60, 0x86, 0x48, 0x01, 0x65,
+        0x03, 0x04, 0x02, 0x01, 0x05, 0x00, 0x04, 0x20};
+
+static const uint8_t
+    padding_RSA4096_SHA256[AVB_RSA4096_NUM_BYTES - AVB_SHA256_DIGEST_SIZE] = {
+        0x00, 0x01, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0x00, 0x30, 0x31, 0x30, 0x0d, 0x06, 0x09, 0x60,
+        0x86, 0x48, 0x01, 0x65, 0x03, 0x04, 0x02, 0x01, 0x05, 0x00, 0x04, 0x20};
+
+static const uint8_t
+    padding_RSA8192_SHA256[AVB_RSA8192_NUM_BYTES - AVB_SHA256_DIGEST_SIZE] = {
+        0x00, 0x01, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0x00, 0x30, 0x31, 0x30, 0x0d, 0x06, 0x09, 0x60, 0x86, 0x48, 0x01, 0x65,
+        0x03, 0x04, 0x02, 0x01, 0x05, 0x00, 0x04, 0x20};
+
+static const uint8_t
+    padding_RSA2048_SHA512[AVB_RSA2048_NUM_BYTES - AVB_SHA512_DIGEST_SIZE] = {
+        0x00, 0x01, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0x00, 0x30, 0x51, 0x30, 0x0d, 0x06, 0x09, 0x60,
+        0x86, 0x48, 0x01, 0x65, 0x03, 0x04, 0x02, 0x03, 0x05, 0x00, 0x04, 0x40};
+
+static const uint8_t
+    padding_RSA4096_SHA512[AVB_RSA4096_NUM_BYTES - AVB_SHA512_DIGEST_SIZE] = {
+        0x00, 0x01, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x30, 0x51, 0x30,
+        0x0d, 0x06, 0x09, 0x60, 0x86, 0x48, 0x01, 0x65, 0x03, 0x04, 0x02, 0x03,
+        0x05, 0x00, 0x04, 0x40};
+
+static const uint8_t
+    padding_RSA8192_SHA512[AVB_RSA8192_NUM_BYTES - AVB_SHA512_DIGEST_SIZE] = {
+        0x00, 0x01, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0x00, 0x30, 0x51, 0x30, 0x0d, 0x06, 0x09, 0x60,
+        0x86, 0x48, 0x01, 0x65, 0x03, 0x04, 0x02, 0x03, 0x05, 0x00, 0x04, 0x40};
+
+static AvbAlgorithmData algorithm_data[_AVB_ALGORITHM_NUM_TYPES] = {
+    /* AVB_ALGORITHM_TYPE_NONE */
+    {.padding = NULL, .padding_len = 0, .hash_len = 0},
+    /* AVB_ALGORITHM_TYPE_SHA256_RSA2048 */
+    {.padding = padding_RSA2048_SHA256,
+     .padding_len = sizeof(padding_RSA2048_SHA256),
+     .hash_len = AVB_SHA256_DIGEST_SIZE},
+    /* AVB_ALGORITHM_TYPE_SHA256_RSA4096 */
+    {.padding = padding_RSA4096_SHA256,
+     .padding_len = sizeof(padding_RSA4096_SHA256),
+     .hash_len = AVB_SHA256_DIGEST_SIZE},
+    /* AVB_ALGORITHM_TYPE_SHA256_RSA8192 */
+    {.padding = padding_RSA8192_SHA256,
+     .padding_len = sizeof(padding_RSA8192_SHA256),
+     .hash_len = AVB_SHA256_DIGEST_SIZE},
+    /* AVB_ALGORITHM_TYPE_SHA512_RSA2048 */
+    {.padding = padding_RSA2048_SHA512,
+     .padding_len = sizeof(padding_RSA2048_SHA512),
+     .hash_len = AVB_SHA512_DIGEST_SIZE},
+    /* AVB_ALGORITHM_TYPE_SHA512_RSA4096 */
+    {.padding = padding_RSA4096_SHA512,
+     .padding_len = sizeof(padding_RSA4096_SHA512),
+     .hash_len = AVB_SHA512_DIGEST_SIZE},
+    /* AVB_ALGORITHM_TYPE_SHA512_RSA8192 */
+    {.padding = padding_RSA8192_SHA512,
+     .padding_len = sizeof(padding_RSA8192_SHA512),
+     .hash_len = AVB_SHA512_DIGEST_SIZE},
+};
+
+const AvbAlgorithmData* avb_get_algorithm_data(AvbAlgorithmType algorithm) {
+  if ((size_t)algorithm < _AVB_ALGORITHM_NUM_TYPES) {
+    return &algorithm_data[algorithm];
+  }
+  return NULL;
+}
+
+bool avb_rsa_public_key_header_validate_and_byteswap(
+    const AvbRSAPublicKeyHeader* src, AvbRSAPublicKeyHeader* dest) {
+  avb_memcpy(dest, src, sizeof(AvbRSAPublicKeyHeader));
+
+  dest->key_num_bits = avb_be32toh(dest->key_num_bits);
+  dest->n0inv = avb_be32toh(dest->n0inv);
+
+  return true;
+}
diff --git a/lib/avb/rk_libavb/avb_descriptor.c b/lib/avb/libavb/avb_descriptor.c
similarity index 96%
rename from lib/avb/rk_libavb/avb_descriptor.c
rename to lib/avb/libavb/avb_descriptor.c
index ffe9add145..c90b2d94fd 100644
--- a/lib/avb/rk_libavb/avb_descriptor.c
+++ b/lib/avb/libavb/avb_descriptor.c
@@ -1,160 +1,160 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include <android_avb/avb_descriptor.h>
-#include <android_avb/avb_util.h>
-#include <android_avb/avb_vbmeta_image.h>
-
-bool avb_descriptor_validate_and_byteswap(const AvbDescriptor* src,
-                                          AvbDescriptor* dest) {
-  dest->tag = avb_be64toh(src->tag);
-  dest->num_bytes_following = avb_be64toh(src->num_bytes_following);
-
-  if ((dest->num_bytes_following & 0x07) != 0) {
-    avb_error("Descriptor size is not divisible by 8.\n");
-    return false;
-  }
-  return true;
-}
-
-bool avb_descriptor_foreach(const uint8_t* image_data,
-                            size_t image_size,
-                            AvbDescriptorForeachFunc foreach_func,
-                            void* user_data) {
-  const AvbVBMetaImageHeader* header = NULL;
-  bool ret = false;
-  const uint8_t* image_end;
-  const uint8_t* desc_start;
-  const uint8_t* desc_end;
-  const uint8_t* p;
-
-  if (image_data == NULL) {
-    avb_error("image_data is NULL\n.");
-    goto out;
-  }
-
-  if (foreach_func == NULL) {
-    avb_error("foreach_func is NULL\n.");
-    goto out;
-  }
-
-  if (image_size < sizeof(AvbVBMetaImageHeader)) {
-    avb_error("Length is smaller than header.\n");
-    goto out;
-  }
-
-  /* Ensure magic is correct. */
-  if (avb_memcmp(image_data, AVB_MAGIC, AVB_MAGIC_LEN) != 0) {
-    avb_error("Magic is incorrect.\n");
-    goto out;
-  }
-
-  /* Careful, not byteswapped - also ensure it's aligned properly. */
-  avb_assert_aligned(image_data);
-  header = (const AvbVBMetaImageHeader*)image_data;
-  image_end = image_data + image_size;
-
-  desc_start = image_data + sizeof(AvbVBMetaImageHeader) +
-               avb_be64toh(header->authentication_data_block_size) +
-               avb_be64toh(header->descriptors_offset);
-
-  desc_end = desc_start + avb_be64toh(header->descriptors_size);
-
-  if (desc_start < image_data || desc_start > image_end ||
-      desc_end < image_data || desc_end > image_end || desc_end < desc_start) {
-    avb_error("Descriptors not inside passed-in data.\n");
-    goto out;
-  }
-
-  for (p = desc_start; p < desc_end;) {
-    const AvbDescriptor* dh = (const AvbDescriptor*)p;
-    avb_assert_aligned(dh);
-    uint64_t nb_following = avb_be64toh(dh->num_bytes_following);
-    uint64_t nb_total = sizeof(AvbDescriptor) + nb_following;
-
-    if ((nb_total & 7) != 0) {
-      avb_error("Invalid descriptor length.\n");
-      goto out;
-    }
-
-    if (nb_total + p < desc_start || nb_total + p > desc_end) {
-      avb_error("Invalid data in descriptors array.\n");
-      goto out;
-    }
-
-    if (foreach_func(dh, user_data) == 0) {
-      goto out;
-    }
-
-    p += nb_total;
-  }
-
-  ret = true;
-
-out:
-  return ret;
-}
-
-static bool count_descriptors(const AvbDescriptor* descriptor,
-                              void* user_data) {
-  size_t* num_descriptors = user_data;
-  *num_descriptors += 1;
-  return true;
-}
-
-typedef struct {
-  size_t descriptor_number;
-  const AvbDescriptor** descriptors;
-} SetDescriptorData;
-
-static bool set_descriptors(const AvbDescriptor* descriptor, void* user_data) {
-  SetDescriptorData* data = user_data;
-  data->descriptors[data->descriptor_number++] = descriptor;
-  return true;
-}
-
-const AvbDescriptor** avb_descriptor_get_all(const uint8_t* image_data,
-                                             size_t image_size,
-                                             size_t* out_num_descriptors) {
-  size_t num_descriptors = 0;
-  SetDescriptorData data;
-
-  avb_descriptor_foreach(
-      image_data, image_size, count_descriptors, &num_descriptors);
-
-  data.descriptor_number = 0;
-  data.descriptors =
-      avb_calloc(sizeof(const AvbDescriptor*) * (num_descriptors + 1));
-  if (data.descriptors == NULL) {
-    return NULL;
-  }
-  avb_descriptor_foreach(image_data, image_size, set_descriptors, &data);
-  avb_assert(data.descriptor_number == num_descriptors);
-
-  if (out_num_descriptors != NULL) {
-    *out_num_descriptors = num_descriptors;
-  }
-
-  return data.descriptors;
-}
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_descriptor.h>
+#include <android_avb/avb_util.h>
+#include <android_avb/avb_vbmeta_image.h>
+
+bool avb_descriptor_validate_and_byteswap(const AvbDescriptor* src,
+                                          AvbDescriptor* dest) {
+  dest->tag = avb_be64toh(src->tag);
+  dest->num_bytes_following = avb_be64toh(src->num_bytes_following);
+
+  if ((dest->num_bytes_following & 0x07) != 0) {
+    avb_error("Descriptor size is not divisible by 8.\n");
+    return false;
+  }
+  return true;
+}
+
+bool avb_descriptor_foreach(const uint8_t* image_data,
+                            size_t image_size,
+                            AvbDescriptorForeachFunc foreach_func,
+                            void* user_data) {
+  const AvbVBMetaImageHeader* header = NULL;
+  bool ret = false;
+  const uint8_t* image_end;
+  const uint8_t* desc_start;
+  const uint8_t* desc_end;
+  const uint8_t* p;
+
+  if (image_data == NULL) {
+    avb_error("image_data is NULL\n.");
+    goto out;
+  }
+
+  if (foreach_func == NULL) {
+    avb_error("foreach_func is NULL\n.");
+    goto out;
+  }
+
+  if (image_size < sizeof(AvbVBMetaImageHeader)) {
+    avb_error("Length is smaller than header.\n");
+    goto out;
+  }
+
+  /* Ensure magic is correct. */
+  if (avb_memcmp(image_data, AVB_MAGIC, AVB_MAGIC_LEN) != 0) {
+    avb_error("Magic is incorrect.\n");
+    goto out;
+  }
+
+  /* Careful, not byteswapped - also ensure it's aligned properly. */
+  avb_assert_aligned(image_data);
+  header = (const AvbVBMetaImageHeader*)image_data;
+  image_end = image_data + image_size;
+
+  desc_start = image_data + sizeof(AvbVBMetaImageHeader) +
+               avb_be64toh(header->authentication_data_block_size) +
+               avb_be64toh(header->descriptors_offset);
+
+  desc_end = desc_start + avb_be64toh(header->descriptors_size);
+
+  if (desc_start < image_data || desc_start > image_end ||
+      desc_end < image_data || desc_end > image_end || desc_end < desc_start) {
+    avb_error("Descriptors not inside passed-in data.\n");
+    goto out;
+  }
+
+  for (p = desc_start; p < desc_end;) {
+    const AvbDescriptor* dh = (const AvbDescriptor*)p;
+    avb_assert_aligned(dh);
+    uint64_t nb_following = avb_be64toh(dh->num_bytes_following);
+    uint64_t nb_total = sizeof(AvbDescriptor) + nb_following;
+
+    if ((nb_total & 7) != 0) {
+      avb_error("Invalid descriptor length.\n");
+      goto out;
+    }
+
+    if (nb_total + p < desc_start || nb_total + p > desc_end) {
+      avb_error("Invalid data in descriptors array.\n");
+      goto out;
+    }
+
+    if (foreach_func(dh, user_data) == 0) {
+      goto out;
+    }
+
+    p += nb_total;
+  }
+
+  ret = true;
+
+out:
+  return ret;
+}
+
+static bool count_descriptors(const AvbDescriptor* descriptor,
+                              void* user_data) {
+  size_t* num_descriptors = user_data;
+  *num_descriptors += 1;
+  return true;
+}
+
+typedef struct {
+  size_t descriptor_number;
+  const AvbDescriptor** descriptors;
+} SetDescriptorData;
+
+static bool set_descriptors(const AvbDescriptor* descriptor, void* user_data) {
+  SetDescriptorData* data = user_data;
+  data->descriptors[data->descriptor_number++] = descriptor;
+  return true;
+}
+
+const AvbDescriptor** avb_descriptor_get_all(const uint8_t* image_data,
+                                             size_t image_size,
+                                             size_t* out_num_descriptors) {
+  size_t num_descriptors = 0;
+  SetDescriptorData data;
+
+  avb_descriptor_foreach(
+      image_data, image_size, count_descriptors, &num_descriptors);
+
+  data.descriptor_number = 0;
+  data.descriptors =
+      avb_calloc(sizeof(const AvbDescriptor*) * (num_descriptors + 1));
+  if (data.descriptors == NULL) {
+    return NULL;
+  }
+  avb_descriptor_foreach(image_data, image_size, set_descriptors, &data);
+  avb_assert(data.descriptor_number == num_descriptors);
+
+  if (out_num_descriptors != NULL) {
+    *out_num_descriptors = num_descriptors;
+  }
+
+  return data.descriptors;
+}
diff --git a/lib/avb/rk_libavb/avb_footer.c b/lib/avb/libavb/avb_footer.c
similarity index 97%
rename from lib/avb/rk_libavb/avb_footer.c
rename to lib/avb/libavb/avb_footer.c
index 31257d0949..f3fd95dcf0 100644
--- a/lib/avb/rk_libavb/avb_footer.c
+++ b/lib/avb/libavb/avb_footer.c
@@ -1,54 +1,54 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include <android_avb/avb_footer.h>
-#include <android_avb/avb_util.h>
-
-bool avb_footer_validate_and_byteswap(const AvbFooter* src, AvbFooter* dest) {
-  avb_memcpy(dest, src, sizeof(AvbFooter));
-
-  dest->version_major = avb_be32toh(dest->version_major);
-  dest->version_minor = avb_be32toh(dest->version_minor);
-
-  dest->original_image_size = avb_be64toh(dest->original_image_size);
-  dest->vbmeta_offset = avb_be64toh(dest->vbmeta_offset);
-  dest->vbmeta_size = avb_be64toh(dest->vbmeta_size);
-
-  /* Check that magic is correct. */
-  if (avb_safe_memcmp(dest->magic, AVB_FOOTER_MAGIC, AVB_FOOTER_MAGIC_LEN) !=
-      0) {
-    avb_error("Footer magic is incorrect.\n");
-    return false;
-  }
-
-  /* Ensure we don't attempt to access any fields if the footer major
-   * version is not supported.
-   */
-  if (dest->version_major > AVB_FOOTER_VERSION_MAJOR) {
-    avb_error("No support for footer version.\n");
-    return false;
-  }
-
-  return true;
-}
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_footer.h>
+#include <android_avb/avb_util.h>
+
+bool avb_footer_validate_and_byteswap(const AvbFooter* src, AvbFooter* dest) {
+  avb_memcpy(dest, src, sizeof(AvbFooter));
+
+  dest->version_major = avb_be32toh(dest->version_major);
+  dest->version_minor = avb_be32toh(dest->version_minor);
+
+  dest->original_image_size = avb_be64toh(dest->original_image_size);
+  dest->vbmeta_offset = avb_be64toh(dest->vbmeta_offset);
+  dest->vbmeta_size = avb_be64toh(dest->vbmeta_size);
+
+  /* Check that magic is correct. */
+  if (avb_safe_memcmp(dest->magic, AVB_FOOTER_MAGIC, AVB_FOOTER_MAGIC_LEN) !=
+      0) {
+    avb_error("Footer magic is incorrect.\n");
+    return false;
+  }
+
+  /* Ensure we don't attempt to access any fields if the footer major
+   * version is not supported.
+   */
+  if (dest->version_major > AVB_FOOTER_VERSION_MAJOR) {
+    avb_error("No support for footer version.\n");
+    return false;
+  }
+
+  return true;
+}
diff --git a/lib/avb/rk_libavb/avb_hash_descriptor.c b/lib/avb/libavb/avb_hash_descriptor.c
similarity index 97%
rename from lib/avb/rk_libavb/avb_hash_descriptor.c
rename to lib/avb/libavb/avb_hash_descriptor.c
index 5444ca2d6a..294f3d648e 100644
--- a/lib/avb/rk_libavb/avb_hash_descriptor.c
+++ b/lib/avb/libavb/avb_hash_descriptor.c
@@ -1,61 +1,61 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include <android_avb/avb_hash_descriptor.h>
-#include <android_avb/avb_util.h>
-
-bool avb_hash_descriptor_validate_and_byteswap(const AvbHashDescriptor* src,
-                                               AvbHashDescriptor* dest) {
-  uint64_t expected_size;
-
-  avb_memcpy(dest, src, sizeof(AvbHashDescriptor));
-
-  if (!avb_descriptor_validate_and_byteswap((const AvbDescriptor*)src,
-                                            (AvbDescriptor*)dest))
-    return false;
-
-  if (dest->parent_descriptor.tag != AVB_DESCRIPTOR_TAG_HASH) {
-    avb_error("Invalid tag for hash descriptor.\n");
-    return false;
-  }
-
-  dest->image_size = avb_be64toh(dest->image_size);
-  dest->partition_name_len = avb_be32toh(dest->partition_name_len);
-  dest->salt_len = avb_be32toh(dest->salt_len);
-  dest->digest_len = avb_be32toh(dest->digest_len);
-
-  /* Check that partition_name, salt, and digest are fully contained. */
-  expected_size = sizeof(AvbHashDescriptor) - sizeof(AvbDescriptor);
-  if (!avb_safe_add_to(&expected_size, dest->partition_name_len) ||
-      !avb_safe_add_to(&expected_size, dest->salt_len) ||
-      !avb_safe_add_to(&expected_size, dest->digest_len)) {
-    avb_error("Overflow while adding up sizes.\n");
-    return false;
-  }
-  if (expected_size > dest->parent_descriptor.num_bytes_following) {
-    avb_error("Descriptor payload size overflow.\n");
-    return false;
-  }
-  return true;
-}
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_hash_descriptor.h>
+#include <android_avb/avb_util.h>
+
+bool avb_hash_descriptor_validate_and_byteswap(const AvbHashDescriptor* src,
+                                               AvbHashDescriptor* dest) {
+  uint64_t expected_size;
+
+  avb_memcpy(dest, src, sizeof(AvbHashDescriptor));
+
+  if (!avb_descriptor_validate_and_byteswap((const AvbDescriptor*)src,
+                                            (AvbDescriptor*)dest))
+    return false;
+
+  if (dest->parent_descriptor.tag != AVB_DESCRIPTOR_TAG_HASH) {
+    avb_error("Invalid tag for hash descriptor.\n");
+    return false;
+  }
+
+  dest->image_size = avb_be64toh(dest->image_size);
+  dest->partition_name_len = avb_be32toh(dest->partition_name_len);
+  dest->salt_len = avb_be32toh(dest->salt_len);
+  dest->digest_len = avb_be32toh(dest->digest_len);
+
+  /* Check that partition_name, salt, and digest are fully contained. */
+  expected_size = sizeof(AvbHashDescriptor) - sizeof(AvbDescriptor);
+  if (!avb_safe_add_to(&expected_size, dest->partition_name_len) ||
+      !avb_safe_add_to(&expected_size, dest->salt_len) ||
+      !avb_safe_add_to(&expected_size, dest->digest_len)) {
+    avb_error("Overflow while adding up sizes.\n");
+    return false;
+  }
+  if (expected_size > dest->parent_descriptor.num_bytes_following) {
+    avb_error("Descriptor payload size overflow.\n");
+    return false;
+  }
+  return true;
+}
diff --git a/lib/avb/rk_libavb/avb_hashtree_descriptor.c b/lib/avb/libavb/avb_hashtree_descriptor.c
similarity index 97%
rename from lib/avb/rk_libavb/avb_hashtree_descriptor.c
rename to lib/avb/libavb/avb_hashtree_descriptor.c
index 2b4b03da52..0e95e8762d 100644
--- a/lib/avb/rk_libavb/avb_hashtree_descriptor.c
+++ b/lib/avb/libavb/avb_hashtree_descriptor.c
@@ -1,69 +1,69 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include <android_avb/avb_hashtree_descriptor.h>
-#include <android_avb/avb_util.h>
-
-bool avb_hashtree_descriptor_validate_and_byteswap(
-    const AvbHashtreeDescriptor* src, AvbHashtreeDescriptor* dest) {
-  uint64_t expected_size;
-
-  avb_memcpy(dest, src, sizeof(AvbHashtreeDescriptor));
-
-  if (!avb_descriptor_validate_and_byteswap((const AvbDescriptor*)src,
-                                            (AvbDescriptor*)dest))
-    return false;
-
-  if (dest->parent_descriptor.tag != AVB_DESCRIPTOR_TAG_HASHTREE) {
-    avb_error("Invalid tag for hashtree descriptor.\n");
-    return false;
-  }
-
-  dest->dm_verity_version = avb_be32toh(dest->dm_verity_version);
-  dest->image_size = avb_be64toh(dest->image_size);
-  dest->tree_offset = avb_be64toh(dest->tree_offset);
-  dest->tree_size = avb_be64toh(dest->tree_size);
-  dest->data_block_size = avb_be32toh(dest->data_block_size);
-  dest->hash_block_size = avb_be32toh(dest->hash_block_size);
-  dest->fec_num_roots = avb_be32toh(dest->fec_num_roots);
-  dest->fec_offset = avb_be64toh(dest->fec_offset);
-  dest->fec_size = avb_be64toh(dest->fec_size);
-  dest->partition_name_len = avb_be32toh(dest->partition_name_len);
-  dest->salt_len = avb_be32toh(dest->salt_len);
-  dest->root_digest_len = avb_be32toh(dest->root_digest_len);
-
-  /* Check that partition_name, salt, and root_digest are fully contained. */
-  expected_size = sizeof(AvbHashtreeDescriptor) - sizeof(AvbDescriptor);
-  if (!avb_safe_add_to(&expected_size, dest->partition_name_len) ||
-      !avb_safe_add_to(&expected_size, dest->salt_len) ||
-      !avb_safe_add_to(&expected_size, dest->root_digest_len)) {
-    avb_error("Overflow while adding up sizes.\n");
-    return false;
-  }
-  if (expected_size > dest->parent_descriptor.num_bytes_following) {
-    avb_error("Descriptor payload size overflow.\n");
-    return false;
-  }
-  return true;
-}
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_hashtree_descriptor.h>
+#include <android_avb/avb_util.h>
+
+bool avb_hashtree_descriptor_validate_and_byteswap(
+    const AvbHashtreeDescriptor* src, AvbHashtreeDescriptor* dest) {
+  uint64_t expected_size;
+
+  avb_memcpy(dest, src, sizeof(AvbHashtreeDescriptor));
+
+  if (!avb_descriptor_validate_and_byteswap((const AvbDescriptor*)src,
+                                            (AvbDescriptor*)dest))
+    return false;
+
+  if (dest->parent_descriptor.tag != AVB_DESCRIPTOR_TAG_HASHTREE) {
+    avb_error("Invalid tag for hashtree descriptor.\n");
+    return false;
+  }
+
+  dest->dm_verity_version = avb_be32toh(dest->dm_verity_version);
+  dest->image_size = avb_be64toh(dest->image_size);
+  dest->tree_offset = avb_be64toh(dest->tree_offset);
+  dest->tree_size = avb_be64toh(dest->tree_size);
+  dest->data_block_size = avb_be32toh(dest->data_block_size);
+  dest->hash_block_size = avb_be32toh(dest->hash_block_size);
+  dest->fec_num_roots = avb_be32toh(dest->fec_num_roots);
+  dest->fec_offset = avb_be64toh(dest->fec_offset);
+  dest->fec_size = avb_be64toh(dest->fec_size);
+  dest->partition_name_len = avb_be32toh(dest->partition_name_len);
+  dest->salt_len = avb_be32toh(dest->salt_len);
+  dest->root_digest_len = avb_be32toh(dest->root_digest_len);
+
+  /* Check that partition_name, salt, and root_digest are fully contained. */
+  expected_size = sizeof(AvbHashtreeDescriptor) - sizeof(AvbDescriptor);
+  if (!avb_safe_add_to(&expected_size, dest->partition_name_len) ||
+      !avb_safe_add_to(&expected_size, dest->salt_len) ||
+      !avb_safe_add_to(&expected_size, dest->root_digest_len)) {
+    avb_error("Overflow while adding up sizes.\n");
+    return false;
+  }
+  if (expected_size > dest->parent_descriptor.num_bytes_following) {
+    avb_error("Descriptor payload size overflow.\n");
+    return false;
+  }
+  return true;
+}
diff --git a/lib/avb/rk_libavb/avb_kernel_cmdline_descriptor.c b/lib/avb/libavb/avb_kernel_cmdline_descriptor.c
similarity index 97%
rename from lib/avb/rk_libavb/avb_kernel_cmdline_descriptor.c
rename to lib/avb/libavb/avb_kernel_cmdline_descriptor.c
index b33e19d997..9f3187c439 100644
--- a/lib/avb/rk_libavb/avb_kernel_cmdline_descriptor.c
+++ b/lib/avb/libavb/avb_kernel_cmdline_descriptor.c
@@ -1,58 +1,58 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include <android_avb/avb_kernel_cmdline_descriptor.h>
-#include <android_avb/avb_util.h>
-
-bool avb_kernel_cmdline_descriptor_validate_and_byteswap(
-    const AvbKernelCmdlineDescriptor* src, AvbKernelCmdlineDescriptor* dest) {
-  uint64_t expected_size;
-
-  avb_memcpy(dest, src, sizeof(AvbKernelCmdlineDescriptor));
-
-  if (!avb_descriptor_validate_and_byteswap((const AvbDescriptor*)src,
-                                            (AvbDescriptor*)dest))
-    return false;
-
-  if (dest->parent_descriptor.tag != AVB_DESCRIPTOR_TAG_KERNEL_CMDLINE) {
-    avb_error("Invalid tag for kernel cmdline descriptor.\n");
-    return false;
-  }
-
-  dest->flags = avb_be32toh(dest->flags);
-  dest->kernel_cmdline_length = avb_be32toh(dest->kernel_cmdline_length);
-
-  /* Check that kernel_cmdline is fully contained. */
-  expected_size = sizeof(AvbKernelCmdlineDescriptor) - sizeof(AvbDescriptor);
-  if (!avb_safe_add_to(&expected_size, dest->kernel_cmdline_length)) {
-    avb_error("Overflow while adding up sizes.\n");
-    return false;
-  }
-  if (expected_size > dest->parent_descriptor.num_bytes_following) {
-    avb_error("Descriptor payload size overflow.\n");
-    return false;
-  }
-
-  return true;
-}
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_kernel_cmdline_descriptor.h>
+#include <android_avb/avb_util.h>
+
+bool avb_kernel_cmdline_descriptor_validate_and_byteswap(
+    const AvbKernelCmdlineDescriptor* src, AvbKernelCmdlineDescriptor* dest) {
+  uint64_t expected_size;
+
+  avb_memcpy(dest, src, sizeof(AvbKernelCmdlineDescriptor));
+
+  if (!avb_descriptor_validate_and_byteswap((const AvbDescriptor*)src,
+                                            (AvbDescriptor*)dest))
+    return false;
+
+  if (dest->parent_descriptor.tag != AVB_DESCRIPTOR_TAG_KERNEL_CMDLINE) {
+    avb_error("Invalid tag for kernel cmdline descriptor.\n");
+    return false;
+  }
+
+  dest->flags = avb_be32toh(dest->flags);
+  dest->kernel_cmdline_length = avb_be32toh(dest->kernel_cmdline_length);
+
+  /* Check that kernel_cmdline is fully contained. */
+  expected_size = sizeof(AvbKernelCmdlineDescriptor) - sizeof(AvbDescriptor);
+  if (!avb_safe_add_to(&expected_size, dest->kernel_cmdline_length)) {
+    avb_error("Overflow while adding up sizes.\n");
+    return false;
+  }
+  if (expected_size > dest->parent_descriptor.num_bytes_following) {
+    avb_error("Descriptor payload size overflow.\n");
+    return false;
+  }
+
+  return true;
+}
diff --git a/lib/avb/rk_libavb/avb_property_descriptor.c b/lib/avb/libavb/avb_property_descriptor.c
similarity index 96%
rename from lib/avb/rk_libavb/avb_property_descriptor.c
rename to lib/avb/libavb/avb_property_descriptor.c
index f567fd7033..e039433334 100644
--- a/lib/avb/rk_libavb/avb_property_descriptor.c
+++ b/lib/avb/libavb/avb_property_descriptor.c
@@ -1,185 +1,185 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include <android_avb/avb_property_descriptor.h>
-#include <android_avb/avb_util.h>
-
-bool avb_property_descriptor_validate_and_byteswap(
-    const AvbPropertyDescriptor* src, AvbPropertyDescriptor* dest) {
-  uint64_t expected_size;
-
-  avb_memcpy(dest, src, sizeof(AvbPropertyDescriptor));
-
-  if (!avb_descriptor_validate_and_byteswap((const AvbDescriptor*)src,
-                                            (AvbDescriptor*)dest))
-    return false;
-
-  if (dest->parent_descriptor.tag != AVB_DESCRIPTOR_TAG_PROPERTY) {
-    avb_error("Invalid tag for property descriptor.\n");
-    return false;
-  }
-
-  dest->key_num_bytes = avb_be64toh(dest->key_num_bytes);
-  dest->value_num_bytes = avb_be64toh(dest->value_num_bytes);
-
-  /* Check that key and value are fully contained. */
-  expected_size = sizeof(AvbPropertyDescriptor) - sizeof(AvbDescriptor) + 2;
-  if (!avb_safe_add_to(&expected_size, dest->key_num_bytes) ||
-      !avb_safe_add_to(&expected_size, dest->value_num_bytes)) {
-    avb_error("Overflow while adding up sizes.\n");
-    return false;
-  }
-  if (expected_size > dest->parent_descriptor.num_bytes_following) {
-    avb_error("Descriptor payload size overflow.\n");
-    return false;
-  }
-
-  return true;
-}
-
-typedef struct {
-  const char* key;
-  size_t key_size;
-  const char* ret_value;
-  size_t ret_value_size;
-} PropertyIteratorData;
-
-static bool property_lookup_desc_foreach(const AvbDescriptor* header,
-                                         void* user_data) {
-  PropertyIteratorData* data = (PropertyIteratorData*)user_data;
-  AvbPropertyDescriptor prop_desc;
-  const uint8_t* p;
-  bool ret = true;
-
-  if (header->tag != AVB_DESCRIPTOR_TAG_PROPERTY) {
-    goto out;
-  }
-
-  if (!avb_property_descriptor_validate_and_byteswap(
-          (const AvbPropertyDescriptor*)header, &prop_desc)) {
-    goto out;
-  }
-
-  p = (const uint8_t*)header;
-  if (p[sizeof(AvbPropertyDescriptor) + prop_desc.key_num_bytes] != 0) {
-    avb_error("No terminating NUL byte in key.\n");
-    goto out;
-  }
-
-  if (data->key_size == prop_desc.key_num_bytes) {
-    if (avb_memcmp(p + sizeof(AvbPropertyDescriptor),
-                   data->key,
-                   data->key_size) == 0) {
-      data->ret_value = (const char*)(p + sizeof(AvbPropertyDescriptor) +
-                                      prop_desc.key_num_bytes + 1);
-      data->ret_value_size = prop_desc.value_num_bytes;
-      /* Stop iterating. */
-      ret = false;
-      goto out;
-    }
-  }
-
-out:
-  return ret;
-}
-
-const char* avb_property_lookup(const uint8_t* image_data,
-                                size_t image_size,
-                                const char* key,
-                                size_t key_size,
-                                size_t* out_value_size) {
-  PropertyIteratorData data;
-
-  if (key_size == 0) {
-    key_size = avb_strlen(key);
-  }
-
-  data.key = key;
-  data.key_size = key_size;
-
-  if (avb_descriptor_foreach(
-          image_data, image_size, property_lookup_desc_foreach, &data) == 0) {
-    if (out_value_size != NULL) {
-      *out_value_size = data.ret_value_size;
-    }
-    return data.ret_value;
-  }
-
-  if (out_value_size != NULL) {
-    *out_value_size = 0;
-  }
-  return NULL;
-}
-
-bool avb_property_lookup_uint64(const uint8_t* image_data,
-                                size_t image_size,
-                                const char* key,
-                                size_t key_size,
-                                uint64_t* out_value) {
-  const char* value;
-  bool ret = false;
-  uint64_t parsed_val;
-  int base;
-  int n;
-
-  value = avb_property_lookup(image_data, image_size, key, key_size, NULL);
-  if (value == NULL) {
-    goto out;
-  }
-
-  base = 10;
-  if (avb_memcmp(value, "0x", 2) == 0) {
-    base = 16;
-    value += 2;
-  }
-
-  parsed_val = 0;
-  for (n = 0; value[n] != '\0'; n++) {
-    int c = value[n];
-    int digit;
-
-    parsed_val *= base;
-
-    if (c >= '0' && c <= '9') {
-      digit = c - '0';
-    } else if (base == 16 && c >= 'a' && c <= 'f') {
-      digit = c - 'a' + 10;
-    } else if (base == 16 && c >= 'A' && c <= 'F') {
-      digit = c - 'A' + 10;
-    } else {
-      avb_error("Invalid digit.\n");
-      goto out;
-    }
-
-    parsed_val += digit;
-  }
-
-  ret = true;
-  if (out_value != NULL) {
-    *out_value = parsed_val;
-  }
-
-out:
-  return ret;
-}
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_property_descriptor.h>
+#include <android_avb/avb_util.h>
+
+bool avb_property_descriptor_validate_and_byteswap(
+    const AvbPropertyDescriptor* src, AvbPropertyDescriptor* dest) {
+  uint64_t expected_size;
+
+  avb_memcpy(dest, src, sizeof(AvbPropertyDescriptor));
+
+  if (!avb_descriptor_validate_and_byteswap((const AvbDescriptor*)src,
+                                            (AvbDescriptor*)dest))
+    return false;
+
+  if (dest->parent_descriptor.tag != AVB_DESCRIPTOR_TAG_PROPERTY) {
+    avb_error("Invalid tag for property descriptor.\n");
+    return false;
+  }
+
+  dest->key_num_bytes = avb_be64toh(dest->key_num_bytes);
+  dest->value_num_bytes = avb_be64toh(dest->value_num_bytes);
+
+  /* Check that key and value are fully contained. */
+  expected_size = sizeof(AvbPropertyDescriptor) - sizeof(AvbDescriptor) + 2;
+  if (!avb_safe_add_to(&expected_size, dest->key_num_bytes) ||
+      !avb_safe_add_to(&expected_size, dest->value_num_bytes)) {
+    avb_error("Overflow while adding up sizes.\n");
+    return false;
+  }
+  if (expected_size > dest->parent_descriptor.num_bytes_following) {
+    avb_error("Descriptor payload size overflow.\n");
+    return false;
+  }
+
+  return true;
+}
+
+typedef struct {
+  const char* key;
+  size_t key_size;
+  const char* ret_value;
+  size_t ret_value_size;
+} PropertyIteratorData;
+
+static bool property_lookup_desc_foreach(const AvbDescriptor* header,
+                                         void* user_data) {
+  PropertyIteratorData* data = (PropertyIteratorData*)user_data;
+  AvbPropertyDescriptor prop_desc;
+  const uint8_t* p;
+  bool ret = true;
+
+  if (header->tag != AVB_DESCRIPTOR_TAG_PROPERTY) {
+    goto out;
+  }
+
+  if (!avb_property_descriptor_validate_and_byteswap(
+          (const AvbPropertyDescriptor*)header, &prop_desc)) {
+    goto out;
+  }
+
+  p = (const uint8_t*)header;
+  if (p[sizeof(AvbPropertyDescriptor) + prop_desc.key_num_bytes] != 0) {
+    avb_error("No terminating NUL byte in key.\n");
+    goto out;
+  }
+
+  if (data->key_size == prop_desc.key_num_bytes) {
+    if (avb_memcmp(p + sizeof(AvbPropertyDescriptor),
+                   data->key,
+                   data->key_size) == 0) {
+      data->ret_value = (const char*)(p + sizeof(AvbPropertyDescriptor) +
+                                      prop_desc.key_num_bytes + 1);
+      data->ret_value_size = prop_desc.value_num_bytes;
+      /* Stop iterating. */
+      ret = false;
+      goto out;
+    }
+  }
+
+out:
+  return ret;
+}
+
+const char* avb_property_lookup(const uint8_t* image_data,
+                                size_t image_size,
+                                const char* key,
+                                size_t key_size,
+                                size_t* out_value_size) {
+  PropertyIteratorData data;
+
+  if (key_size == 0) {
+    key_size = avb_strlen(key);
+  }
+
+  data.key = key;
+  data.key_size = key_size;
+
+  if (avb_descriptor_foreach(
+          image_data, image_size, property_lookup_desc_foreach, &data) == 0) {
+    if (out_value_size != NULL) {
+      *out_value_size = data.ret_value_size;
+    }
+    return data.ret_value;
+  }
+
+  if (out_value_size != NULL) {
+    *out_value_size = 0;
+  }
+  return NULL;
+}
+
+bool avb_property_lookup_uint64(const uint8_t* image_data,
+                                size_t image_size,
+                                const char* key,
+                                size_t key_size,
+                                uint64_t* out_value) {
+  const char* value;
+  bool ret = false;
+  uint64_t parsed_val;
+  int base;
+  int n;
+
+  value = avb_property_lookup(image_data, image_size, key, key_size, NULL);
+  if (value == NULL) {
+    goto out;
+  }
+
+  base = 10;
+  if (avb_memcmp(value, "0x", 2) == 0) {
+    base = 16;
+    value += 2;
+  }
+
+  parsed_val = 0;
+  for (n = 0; value[n] != '\0'; n++) {
+    int c = value[n];
+    int digit;
+
+    parsed_val *= base;
+
+    if (c >= '0' && c <= '9') {
+      digit = c - '0';
+    } else if (base == 16 && c >= 'a' && c <= 'f') {
+      digit = c - 'a' + 10;
+    } else if (base == 16 && c >= 'A' && c <= 'F') {
+      digit = c - 'A' + 10;
+    } else {
+      avb_error("Invalid digit.\n");
+      goto out;
+    }
+
+    parsed_val += digit;
+  }
+
+  ret = true;
+  if (out_value != NULL) {
+    *out_value = parsed_val;
+  }
+
+out:
+  return ret;
+}
diff --git a/lib/avb/rk_libavb/avb_rsa.c b/lib/avb/libavb/avb_rsa.c
similarity index 88%
rename from lib/avb/rk_libavb/avb_rsa.c
rename to lib/avb/libavb/avb_rsa.c
index e2f62f113d..c018e2be39 100644
--- a/lib/avb/rk_libavb/avb_rsa.c
+++ b/lib/avb/libavb/avb_rsa.c
@@ -1,299 +1,299 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/* Copyright (c) 2011 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* Implementation of RSA signature verification which uses a pre-processed
- * key for computation. The code extends libmincrypt RSA verification code to
- * support multiple RSA key lengths and hash digest algorithms.
- */
-
-#include <android_avb/avb_rsa.h>
-#include <android_avb/avb_sha.h>
-#include <android_avb/avb_util.h>
-#include <android_avb/avb_vbmeta_image.h>
-
-typedef struct Key {
-  unsigned int len; /* Length of n[] in number of uint32_t */
-  uint32_t n0inv;   /* -1 / n[0] mod 2^32 */
-  uint32_t* n;      /* modulus as array (host-byte order) */
-  uint32_t* rr;     /* R^2 as array (host-byte order) */
-} Key;
-
-Key* parse_key_data(const uint8_t* data, size_t length) {
-  AvbRSAPublicKeyHeader h;
-  Key* key = NULL;
-  size_t expected_length;
-  unsigned int i;
-  const uint8_t* n;
-  const uint8_t* rr;
-
-  if (!avb_rsa_public_key_header_validate_and_byteswap(
-          (const AvbRSAPublicKeyHeader*)data, &h)) {
-    avb_error("Invalid key.\n");
-    goto fail;
-  }
-
-  if (!(h.key_num_bits == 2048 || h.key_num_bits == 4096 ||
-        h.key_num_bits == 8192)) {
-    avb_error("Unexpected key length.\n");
-    goto fail;
-  }
-
-  expected_length = sizeof(AvbRSAPublicKeyHeader) + 2 * h.key_num_bits / 8;
-  if (length != expected_length) {
-    avb_error("Key does not match expected length.\n");
-    goto fail;
-  }
-
-  n = data + sizeof(AvbRSAPublicKeyHeader);
-  rr = data + sizeof(AvbRSAPublicKeyHeader) + h.key_num_bits / 8;
-
-  /* Store n and rr following the key header so we only have to do one
-   * allocation.
-   */
-  key = (Key*)(avb_malloc(sizeof(Key) + 2 * h.key_num_bits / 8));
-  if (key == NULL) {
-    goto fail;
-  }
-
-  key->len = h.key_num_bits / 32;
-  key->n0inv = h.n0inv;
-  key->n = (uint32_t*)(key + 1); /* Skip ahead sizeof(Key) bytes. */
-  key->rr = key->n + key->len;
-
-  /* Crypto-code below (modpowF4() and friends) expects the key in
-   * little-endian format (rather than the format we're storing the
-   * key in), so convert it.
-   */
-  for (i = 0; i < key->len; i++) {
-    key->n[i] = avb_be32toh(((uint32_t*)n)[key->len - i - 1]);
-    key->rr[i] = avb_be32toh(((uint32_t*)rr)[key->len - i - 1]);
-  }
-  return key;
-
-fail:
-  if (key != NULL) {
-    avb_free(key);
-  }
-  return NULL;
-}
-
-void free_parsed_key(Key* key) {
-  avb_free(key);
-}
-
-/* a[] -= mod */
-static void subM(const Key* key, uint32_t* a) {
-  int64_t A = 0;
-  uint32_t i;
-  for (i = 0; i < key->len; ++i) {
-    A += (uint64_t)a[i] - key->n[i];
-    a[i] = (uint32_t)A;
-    A >>= 32;
-  }
-}
-
-/* return a[] >= mod */
-static int geM(const Key* key, uint32_t* a) {
-  uint32_t i;
-  for (i = key->len; i;) {
-    --i;
-    if (a[i] < key->n[i]) {
-      return 0;
-    }
-    if (a[i] > key->n[i]) {
-      return 1;
-    }
-  }
-  return 1; /* equal */
-}
-
-/* montgomery c[] += a * b[] / R % mod */
-static void montMulAdd(const Key* key,
-                       uint32_t* c,
-                       const uint32_t a,
-                       const uint32_t* b) {
-  uint64_t A = (uint64_t)a * b[0] + c[0];
-  uint32_t d0 = (uint32_t)A * key->n0inv;
-  uint64_t B = (uint64_t)d0 * key->n[0] + (uint32_t)A;
-  uint32_t i;
-
-  for (i = 1; i < key->len; ++i) {
-    A = (A >> 32) + (uint64_t)a * b[i] + c[i];
-    B = (B >> 32) + (uint64_t)d0 * key->n[i] + (uint32_t)A;
-    c[i - 1] = (uint32_t)B;
-  }
-
-  A = (A >> 32) + (B >> 32);
-
-  c[i - 1] = (uint32_t)A;
-
-  if (A >> 32) {
-    subM(key, c);
-  }
-}
-
-/* montgomery c[] = a[] * b[] / R % mod */
-static void montMul(const Key* key, uint32_t* c, uint32_t* a, uint32_t* b) {
-  uint32_t i;
-  for (i = 0; i < key->len; ++i) {
-    c[i] = 0;
-  }
-  for (i = 0; i < key->len; ++i) {
-    montMulAdd(key, c, a[i], b);
-  }
-}
-
-/* In-place public exponentiation. (65537}
- * Input and output big-endian byte array in inout.
- */
-static void modpowF4(const Key* key, uint8_t* inout) {
-  uint32_t* a = (uint32_t*)avb_malloc(key->len * sizeof(uint32_t));
-  uint32_t* aR = (uint32_t*)avb_malloc(key->len * sizeof(uint32_t));
-  uint32_t* aaR = (uint32_t*)avb_malloc(key->len * sizeof(uint32_t));
-  if (a == NULL || aR == NULL || aaR == NULL) {
-    goto out;
-  }
-
-  uint32_t* aaa = aaR; /* Re-use location. */
-  int i;
-
-  /* Convert from big endian byte array to little endian word array. */
-  for (i = 0; i < (int)key->len; ++i) {
-    uint32_t tmp = (inout[((key->len - 1 - i) * 4) + 0] << 24) |
-                   (inout[((key->len - 1 - i) * 4) + 1] << 16) |
-                   (inout[((key->len - 1 - i) * 4) + 2] << 8) |
-                   (inout[((key->len - 1 - i) * 4) + 3] << 0);
-    a[i] = tmp;
-  }
-
-  montMul(key, aR, a, key->rr); /* aR = a * RR / R mod M   */
-  for (i = 0; i < 16; i += 2) {
-    montMul(key, aaR, aR, aR);  /* aaR = aR * aR / R mod M */
-    montMul(key, aR, aaR, aaR); /* aR = aaR * aaR / R mod M */
-  }
-  montMul(key, aaa, aR, a); /* aaa = aR * a / R mod M */
-
-  /* Make sure aaa < mod; aaa is at most 1x mod too large. */
-  if (geM(key, aaa)) {
-    subM(key, aaa);
-  }
-
-  /* Convert to bigendian byte array */
-  for (i = (int)key->len - 1; i >= 0; --i) {
-    uint32_t tmp = aaa[i];
-    *inout++ = (uint8_t)(tmp >> 24);
-    *inout++ = (uint8_t)(tmp >> 16);
-    *inout++ = (uint8_t)(tmp >> 8);
-    *inout++ = (uint8_t)(tmp >> 0);
-  }
-
-out:
-  if (a != NULL) {
-    avb_free(a);
-  }
-  if (aR != NULL) {
-    avb_free(aR);
-  }
-  if (aaR != NULL) {
-    avb_free(aaR);
-  }
-}
-
-/* Verify a RSA PKCS1.5 signature against an expected hash.
- * Returns false on failure, true on success.
- */
-bool avb_rsa_verify(const uint8_t* key,
-                    size_t key_num_bytes,
-                    const uint8_t* sig,
-                    size_t sig_num_bytes,
-                    const uint8_t* hash,
-                    size_t hash_num_bytes,
-                    const uint8_t* padding,
-                    size_t padding_num_bytes) {
-  uint8_t* buf = NULL;
-  Key* parsed_key = NULL;
-  bool success = false;
-
-  if (key == NULL || sig == NULL || hash == NULL || padding == NULL) {
-    avb_error("Invalid input.\n");
-    goto out;
-  }
-
-  parsed_key = parse_key_data(key, key_num_bytes);
-  if (parsed_key == NULL) {
-    avb_error("Error parsing key.\n");
-    goto out;
-  }
-
-  if (sig_num_bytes != (parsed_key->len * sizeof(uint32_t))) {
-    avb_error("Signature length does not match key length.\n");
-    goto out;
-  }
-
-  if (padding_num_bytes != sig_num_bytes - hash_num_bytes) {
-    avb_error("Padding length does not match hash and signature lengths.\n");
-    goto out;
-  }
-
-  buf = (uint8_t*)avb_malloc(sig_num_bytes);
-  if (buf == NULL) {
-    avb_error("Error allocating memory.\n");
-    goto out;
-  }
-  avb_memcpy(buf, sig, sig_num_bytes);
-
-  modpowF4(parsed_key, buf);
-
-  /* Check padding bytes.
-   *
-   * Even though there are probably no timing issues here, we use
-   * avb_safe_memcmp() just to be on the safe side.
-   */
-  if (avb_safe_memcmp(buf, padding, padding_num_bytes)) {
-    avb_error("Padding check failed.\n");
-    goto out;
-  }
-
-  /* Check hash. */
-  if (avb_safe_memcmp(buf + padding_num_bytes, hash, hash_num_bytes)) {
-    avb_error("Hash check failed.\n");
-    goto out;
-  }
-
-  success = true;
-
-out:
-  if (parsed_key != NULL) {
-    free_parsed_key(parsed_key);
-  }
-  if (buf != NULL) {
-    avb_free(buf);
-  }
-  return success;
-}
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/* Copyright (c) 2011 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Implementation of RSA signature verification which uses a pre-processed
+ * key for computation. The code extends libmincrypt RSA verification code to
+ * support multiple RSA key lengths and hash digest algorithms.
+ */
+
+#include <android_avb/avb_rsa.h>
+#include <android_avb/avb_sha.h>
+#include <android_avb/avb_util.h>
+#include <android_avb/avb_vbmeta_image.h>
+
+typedef struct IAvbKey {
+  unsigned int len; /* Length of n[] in number of uint32_t */
+  uint32_t n0inv;   /* -1 / n[0] mod 2^32 */
+  uint32_t* n;      /* modulus as array (host-byte order) */
+  uint32_t* rr;     /* R^2 as array (host-byte order) */
+} IAvbKey;
+
+static IAvbKey* iavb_parse_key_data(const uint8_t* data, size_t length) {
+  AvbRSAPublicKeyHeader h;
+  IAvbKey* key = NULL;
+  size_t expected_length;
+  unsigned int i;
+  const uint8_t* n;
+  const uint8_t* rr;
+
+  if (!avb_rsa_public_key_header_validate_and_byteswap(
+          (const AvbRSAPublicKeyHeader*)data, &h)) {
+    avb_error("Invalid key.\n");
+    goto fail;
+  }
+
+  if (!(h.key_num_bits == 2048 || h.key_num_bits == 4096 ||
+        h.key_num_bits == 8192)) {
+    avb_error("Unexpected key length.\n");
+    goto fail;
+  }
+
+  expected_length = sizeof(AvbRSAPublicKeyHeader) + 2 * h.key_num_bits / 8;
+  if (length != expected_length) {
+    avb_error("Key does not match expected length.\n");
+    goto fail;
+  }
+
+  n = data + sizeof(AvbRSAPublicKeyHeader);
+  rr = data + sizeof(AvbRSAPublicKeyHeader) + h.key_num_bits / 8;
+
+  /* Store n and rr following the key header so we only have to do one
+   * allocation.
+   */
+  key = (IAvbKey*)(avb_malloc(sizeof(IAvbKey) + 2 * h.key_num_bits / 8));
+  if (key == NULL) {
+    goto fail;
+  }
+
+  key->len = h.key_num_bits / 32;
+  key->n0inv = h.n0inv;
+  key->n = (uint32_t*)(key + 1); /* Skip ahead sizeof(IAvbKey) bytes. */
+  key->rr = key->n + key->len;
+
+  /* Crypto-code below (modpowF4() and friends) expects the key in
+   * little-endian format (rather than the format we're storing the
+   * key in), so convert it.
+   */
+  for (i = 0; i < key->len; i++) {
+    key->n[i] = avb_be32toh(((uint32_t*)n)[key->len - i - 1]);
+    key->rr[i] = avb_be32toh(((uint32_t*)rr)[key->len - i - 1]);
+  }
+  return key;
+
+fail:
+  if (key != NULL) {
+    avb_free(key);
+  }
+  return NULL;
+}
+
+static void iavb_free_parsed_key(IAvbKey* key) {
+  avb_free(key);
+}
+
+/* a[] -= mod */
+static void subM(const IAvbKey* key, uint32_t* a) {
+  int64_t A = 0;
+  uint32_t i;
+  for (i = 0; i < key->len; ++i) {
+    A += (uint64_t)a[i] - key->n[i];
+    a[i] = (uint32_t)A;
+    A >>= 32;
+  }
+}
+
+/* return a[] >= mod */
+static int geM(const IAvbKey* key, uint32_t* a) {
+  uint32_t i;
+  for (i = key->len; i;) {
+    --i;
+    if (a[i] < key->n[i]) {
+      return 0;
+    }
+    if (a[i] > key->n[i]) {
+      return 1;
+    }
+  }
+  return 1; /* equal */
+}
+
+/* montgomery c[] += a * b[] / R % mod */
+static void montMulAdd(const IAvbKey* key,
+                       uint32_t* c,
+                       const uint32_t a,
+                       const uint32_t* b) {
+  uint64_t A = (uint64_t)a * b[0] + c[0];
+  uint32_t d0 = (uint32_t)A * key->n0inv;
+  uint64_t B = (uint64_t)d0 * key->n[0] + (uint32_t)A;
+  uint32_t i;
+
+  for (i = 1; i < key->len; ++i) {
+    A = (A >> 32) + (uint64_t)a * b[i] + c[i];
+    B = (B >> 32) + (uint64_t)d0 * key->n[i] + (uint32_t)A;
+    c[i - 1] = (uint32_t)B;
+  }
+
+  A = (A >> 32) + (B >> 32);
+
+  c[i - 1] = (uint32_t)A;
+
+  if (A >> 32) {
+    subM(key, c);
+  }
+}
+
+/* montgomery c[] = a[] * b[] / R % mod */
+static void montMul(const IAvbKey* key, uint32_t* c, uint32_t* a, uint32_t* b) {
+  uint32_t i;
+  for (i = 0; i < key->len; ++i) {
+    c[i] = 0;
+  }
+  for (i = 0; i < key->len; ++i) {
+    montMulAdd(key, c, a[i], b);
+  }
+}
+
+/* In-place public exponentiation. (65537}
+ * Input and output big-endian byte array in inout.
+ */
+static void modpowF4(const IAvbKey* key, uint8_t* inout) {
+  uint32_t* a = (uint32_t*)avb_malloc(key->len * sizeof(uint32_t));
+  uint32_t* aR = (uint32_t*)avb_malloc(key->len * sizeof(uint32_t));
+  uint32_t* aaR = (uint32_t*)avb_malloc(key->len * sizeof(uint32_t));
+  if (a == NULL || aR == NULL || aaR == NULL) {
+    goto out;
+  }
+
+  uint32_t* aaa = aaR; /* Re-use location. */
+  int i;
+
+  /* Convert from big endian byte array to little endian word array. */
+  for (i = 0; i < (int)key->len; ++i) {
+    uint32_t tmp = (inout[((key->len - 1 - i) * 4) + 0] << 24) |
+                   (inout[((key->len - 1 - i) * 4) + 1] << 16) |
+                   (inout[((key->len - 1 - i) * 4) + 2] << 8) |
+                   (inout[((key->len - 1 - i) * 4) + 3] << 0);
+    a[i] = tmp;
+  }
+
+  montMul(key, aR, a, key->rr); /* aR = a * RR / R mod M   */
+  for (i = 0; i < 16; i += 2) {
+    montMul(key, aaR, aR, aR);  /* aaR = aR * aR / R mod M */
+    montMul(key, aR, aaR, aaR); /* aR = aaR * aaR / R mod M */
+  }
+  montMul(key, aaa, aR, a); /* aaa = aR * a / R mod M */
+
+  /* Make sure aaa < mod; aaa is at most 1x mod too large. */
+  if (geM(key, aaa)) {
+    subM(key, aaa);
+  }
+
+  /* Convert to bigendian byte array */
+  for (i = (int)key->len - 1; i >= 0; --i) {
+    uint32_t tmp = aaa[i];
+    *inout++ = (uint8_t)(tmp >> 24);
+    *inout++ = (uint8_t)(tmp >> 16);
+    *inout++ = (uint8_t)(tmp >> 8);
+    *inout++ = (uint8_t)(tmp >> 0);
+  }
+
+out:
+  if (a != NULL) {
+    avb_free(a);
+  }
+  if (aR != NULL) {
+    avb_free(aR);
+  }
+  if (aaR != NULL) {
+    avb_free(aaR);
+  }
+}
+
+/* Verify a RSA PKCS1.5 signature against an expected hash.
+ * Returns false on failure, true on success.
+ */
+bool avb_rsa_verify(const uint8_t* key,
+                    size_t key_num_bytes,
+                    const uint8_t* sig,
+                    size_t sig_num_bytes,
+                    const uint8_t* hash,
+                    size_t hash_num_bytes,
+                    const uint8_t* padding,
+                    size_t padding_num_bytes) {
+  uint8_t* buf = NULL;
+  IAvbKey* parsed_key = NULL;
+  bool success = false;
+
+  if (key == NULL || sig == NULL || hash == NULL || padding == NULL) {
+    avb_error("Invalid input.\n");
+    goto out;
+  }
+
+  parsed_key = iavb_parse_key_data(key, key_num_bytes);
+  if (parsed_key == NULL) {
+    avb_error("Error parsing key.\n");
+    goto out;
+  }
+
+  if (sig_num_bytes != (parsed_key->len * sizeof(uint32_t))) {
+    avb_error("Signature length does not match key length.\n");
+    goto out;
+  }
+
+  if (padding_num_bytes != sig_num_bytes - hash_num_bytes) {
+    avb_error("Padding length does not match hash and signature lengths.\n");
+    goto out;
+  }
+
+  buf = (uint8_t*)avb_malloc(sig_num_bytes);
+  if (buf == NULL) {
+    avb_error("Error allocating memory.\n");
+    goto out;
+  }
+  avb_memcpy(buf, sig, sig_num_bytes);
+
+  modpowF4(parsed_key, buf);
+
+  /* Check padding bytes.
+   *
+   * Even though there are probably no timing issues here, we use
+   * avb_safe_memcmp() just to be on the safe side.
+   */
+  if (avb_safe_memcmp(buf, padding, padding_num_bytes)) {
+    avb_error("Padding check failed.\n");
+    goto out;
+  }
+
+  /* Check hash. */
+  if (avb_safe_memcmp(buf + padding_num_bytes, hash, hash_num_bytes)) {
+    avb_error("Hash check failed.\n");
+    goto out;
+  }
+
+  success = true;
+
+out:
+  if (parsed_key != NULL) {
+    iavb_free_parsed_key(parsed_key);
+  }
+  if (buf != NULL) {
+    avb_free(buf);
+  }
+  return success;
+}
diff --git a/lib/avb/rk_libavb/avb_sha256.c b/lib/avb/libavb/avb_sha256.c
similarity index 97%
rename from lib/avb/rk_libavb/avb_sha256.c
rename to lib/avb/libavb/avb_sha256.c
index b6d30c112e..b567643f9b 100644
--- a/lib/avb/rk_libavb/avb_sha256.c
+++ b/lib/avb/libavb/avb_sha256.c
@@ -1,390 +1,390 @@
-/* SHA-256 and SHA-512 implementation based on code by Oliver Gay
- * <olivier.gay@a3.epfl.ch> under a BSD-style license. See below.
- */
-
-/*
- * FIPS 180-2 SHA-224/256/384/512 implementation
- * Last update: 02/02/2007
- * Issue date:  04/30/2005
- *
- * Copyright (C) 2005, 2007 Olivier Gay <olivier.gay@a3.epfl.ch>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the project nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE PROJECT AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE PROJECT OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <android_avb/avb_sha.h>
-
-#define SHFR(x, n) (x >> n)
-#define ROTR(x, n) ((x >> n) | (x << ((sizeof(x) << 3) - n)))
-#define ROTL(x, n) ((x << n) | (x >> ((sizeof(x) << 3) - n)))
-#define CH(x, y, z) ((x & y) ^ (~x & z))
-#define MAJ(x, y, z) ((x & y) ^ (x & z) ^ (y & z))
-
-#define SHA256_F1(x) (ROTR(x, 2) ^ ROTR(x, 13) ^ ROTR(x, 22))
-#define SHA256_F2(x) (ROTR(x, 6) ^ ROTR(x, 11) ^ ROTR(x, 25))
-#define SHA256_F3(x) (ROTR(x, 7) ^ ROTR(x, 18) ^ SHFR(x, 3))
-#define SHA256_F4(x) (ROTR(x, 17) ^ ROTR(x, 19) ^ SHFR(x, 10))
-
-#define UNPACK32(x, str)                 \
-  {                                      \
-    *((str) + 3) = (uint8_t)((x));       \
-    *((str) + 2) = (uint8_t)((x) >> 8);  \
-    *((str) + 1) = (uint8_t)((x) >> 16); \
-    *((str) + 0) = (uint8_t)((x) >> 24); \
-  }
-
-#define PACK32(str, x)                                                    \
-  {                                                                       \
-    *(x) = ((uint32_t) * ((str) + 3)) | ((uint32_t) * ((str) + 2) << 8) | \
-           ((uint32_t) * ((str) + 1) << 16) |                             \
-           ((uint32_t) * ((str) + 0) << 24);                              \
-  }
-
-/* Macros used for loops unrolling */
-
-#define SHA256_SCR(i) \
-  { w[i] = SHA256_F4(w[i - 2]) + w[i - 7] + SHA256_F3(w[i - 15]) + w[i - 16]; }
-
-#define SHA256_EXP(a, b, c, d, e, f, g, h, j)                               \
-  {                                                                         \
-    t1 = wv[h] + SHA256_F2(wv[e]) + CH(wv[e], wv[f], wv[g]) + sha256_k[j] + \
-         w[j];                                                              \
-    t2 = SHA256_F1(wv[a]) + MAJ(wv[a], wv[b], wv[c]);                       \
-    wv[d] += t1;                                                            \
-    wv[h] = t1 + t2;                                                        \
-  }
-
-static const uint32_t sha256_h0[8] = {0x6a09e667,
-                                      0xbb67ae85,
-                                      0x3c6ef372,
-                                      0xa54ff53a,
-                                      0x510e527f,
-                                      0x9b05688c,
-                                      0x1f83d9ab,
-                                      0x5be0cd19};
-
-static const uint32_t sha256_k[64] = {
-    0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5, 0x3956c25b, 0x59f111f1,
-    0x923f82a4, 0xab1c5ed5, 0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3,
-    0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174, 0xe49b69c1, 0xefbe4786,
-    0x0fc19dc6, 0x240ca1cc, 0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da,
-    0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7, 0xc6e00bf3, 0xd5a79147,
-    0x06ca6351, 0x14292967, 0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13,
-    0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85, 0xa2bfe8a1, 0xa81a664b,
-    0xc24b8b70, 0xc76c51a3, 0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070,
-    0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5, 0x391c0cb3, 0x4ed8aa4a,
-    0x5b9cca4f, 0x682e6ff3, 0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208,
-    0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2};
-
-/* SHA-256 implementation */
-void avb_sha256_init(AvbSHA256Ctx* ctx) {
-#ifndef UNROLL_LOOPS
-  int i;
-  for (i = 0; i < 8; i++) {
-    ctx->h[i] = sha256_h0[i];
-  }
-#else
-  ctx->h[0] = sha256_h0[0];
-  ctx->h[1] = sha256_h0[1];
-  ctx->h[2] = sha256_h0[2];
-  ctx->h[3] = sha256_h0[3];
-  ctx->h[4] = sha256_h0[4];
-  ctx->h[5] = sha256_h0[5];
-  ctx->h[6] = sha256_h0[6];
-  ctx->h[7] = sha256_h0[7];
-#endif /* !UNROLL_LOOPS */
-
-  ctx->len = 0;
-  ctx->tot_len = 0;
-}
-
-static void SHA256_transform(AvbSHA256Ctx* ctx,
-                             const uint8_t* message,
-                             unsigned int block_nb) {
-  uint32_t w[64];
-  uint32_t wv[8];
-  uint32_t t1, t2;
-  const unsigned char* sub_block;
-  int i;
-
-#ifndef UNROLL_LOOPS
-  int j;
-#endif
-
-  for (i = 0; i < (int)block_nb; i++) {
-    sub_block = message + (i << 6);
-
-#ifndef UNROLL_LOOPS
-    for (j = 0; j < 16; j++) {
-      PACK32(&sub_block[j << 2], &w[j]);
-    }
-
-    for (j = 16; j < 64; j++) {
-      SHA256_SCR(j);
-    }
-
-    for (j = 0; j < 8; j++) {
-      wv[j] = ctx->h[j];
-    }
-
-    for (j = 0; j < 64; j++) {
-      t1 = wv[7] + SHA256_F2(wv[4]) + CH(wv[4], wv[5], wv[6]) + sha256_k[j] +
-           w[j];
-      t2 = SHA256_F1(wv[0]) + MAJ(wv[0], wv[1], wv[2]);
-      wv[7] = wv[6];
-      wv[6] = wv[5];
-      wv[5] = wv[4];
-      wv[4] = wv[3] + t1;
-      wv[3] = wv[2];
-      wv[2] = wv[1];
-      wv[1] = wv[0];
-      wv[0] = t1 + t2;
-    }
-
-    for (j = 0; j < 8; j++) {
-      ctx->h[j] += wv[j];
-    }
-#else
-    PACK32(&sub_block[0], &w[0]);
-    PACK32(&sub_block[4], &w[1]);
-    PACK32(&sub_block[8], &w[2]);
-    PACK32(&sub_block[12], &w[3]);
-    PACK32(&sub_block[16], &w[4]);
-    PACK32(&sub_block[20], &w[5]);
-    PACK32(&sub_block[24], &w[6]);
-    PACK32(&sub_block[28], &w[7]);
-    PACK32(&sub_block[32], &w[8]);
-    PACK32(&sub_block[36], &w[9]);
-    PACK32(&sub_block[40], &w[10]);
-    PACK32(&sub_block[44], &w[11]);
-    PACK32(&sub_block[48], &w[12]);
-    PACK32(&sub_block[52], &w[13]);
-    PACK32(&sub_block[56], &w[14]);
-    PACK32(&sub_block[60], &w[15]);
-
-    SHA256_SCR(16);
-    SHA256_SCR(17);
-    SHA256_SCR(18);
-    SHA256_SCR(19);
-    SHA256_SCR(20);
-    SHA256_SCR(21);
-    SHA256_SCR(22);
-    SHA256_SCR(23);
-    SHA256_SCR(24);
-    SHA256_SCR(25);
-    SHA256_SCR(26);
-    SHA256_SCR(27);
-    SHA256_SCR(28);
-    SHA256_SCR(29);
-    SHA256_SCR(30);
-    SHA256_SCR(31);
-    SHA256_SCR(32);
-    SHA256_SCR(33);
-    SHA256_SCR(34);
-    SHA256_SCR(35);
-    SHA256_SCR(36);
-    SHA256_SCR(37);
-    SHA256_SCR(38);
-    SHA256_SCR(39);
-    SHA256_SCR(40);
-    SHA256_SCR(41);
-    SHA256_SCR(42);
-    SHA256_SCR(43);
-    SHA256_SCR(44);
-    SHA256_SCR(45);
-    SHA256_SCR(46);
-    SHA256_SCR(47);
-    SHA256_SCR(48);
-    SHA256_SCR(49);
-    SHA256_SCR(50);
-    SHA256_SCR(51);
-    SHA256_SCR(52);
-    SHA256_SCR(53);
-    SHA256_SCR(54);
-    SHA256_SCR(55);
-    SHA256_SCR(56);
-    SHA256_SCR(57);
-    SHA256_SCR(58);
-    SHA256_SCR(59);
-    SHA256_SCR(60);
-    SHA256_SCR(61);
-    SHA256_SCR(62);
-    SHA256_SCR(63);
-
-    wv[0] = ctx->h[0];
-    wv[1] = ctx->h[1];
-    wv[2] = ctx->h[2];
-    wv[3] = ctx->h[3];
-    wv[4] = ctx->h[4];
-    wv[5] = ctx->h[5];
-    wv[6] = ctx->h[6];
-    wv[7] = ctx->h[7];
-
-    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 0);
-    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 1);
-    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 2);
-    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 3);
-    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 4);
-    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 5);
-    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 6);
-    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 7);
-    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 8);
-    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 9);
-    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 10);
-    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 11);
-    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 12);
-    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 13);
-    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 14);
-    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 15);
-    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 16);
-    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 17);
-    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 18);
-    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 19);
-    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 20);
-    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 21);
-    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 22);
-    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 23);
-    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 24);
-    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 25);
-    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 26);
-    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 27);
-    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 28);
-    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 29);
-    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 30);
-    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 31);
-    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 32);
-    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 33);
-    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 34);
-    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 35);
-    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 36);
-    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 37);
-    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 38);
-    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 39);
-    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 40);
-    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 41);
-    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 42);
-    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 43);
-    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 44);
-    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 45);
-    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 46);
-    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 47);
-    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 48);
-    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 49);
-    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 50);
-    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 51);
-    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 52);
-    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 53);
-    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 54);
-    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 55);
-    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 56);
-    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 57);
-    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 58);
-    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 59);
-    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 60);
-    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 61);
-    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 62);
-    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 63);
-
-    ctx->h[0] += wv[0];
-    ctx->h[1] += wv[1];
-    ctx->h[2] += wv[2];
-    ctx->h[3] += wv[3];
-    ctx->h[4] += wv[4];
-    ctx->h[5] += wv[5];
-    ctx->h[6] += wv[6];
-    ctx->h[7] += wv[7];
-#endif /* !UNROLL_LOOPS */
-  }
-}
-
-void avb_sha256_update(AvbSHA256Ctx* ctx, const uint8_t* data, uint32_t len) {
-  unsigned int block_nb;
-  unsigned int new_len, rem_len, tmp_len;
-  const uint8_t* shifted_data;
-
-  tmp_len = AVB_SHA256_BLOCK_SIZE - ctx->len;
-  rem_len = len < tmp_len ? len : tmp_len;
-
-  avb_memcpy(&ctx->block[ctx->len], data, rem_len);
-
-  if (ctx->len + len < AVB_SHA256_BLOCK_SIZE) {
-    ctx->len += len;
-    return;
-  }
-
-  new_len = len - rem_len;
-  block_nb = new_len / AVB_SHA256_BLOCK_SIZE;
-
-  shifted_data = data + rem_len;
-
-  SHA256_transform(ctx, ctx->block, 1);
-  SHA256_transform(ctx, shifted_data, block_nb);
-
-  rem_len = new_len % AVB_SHA256_BLOCK_SIZE;
-
-  avb_memcpy(ctx->block, &shifted_data[block_nb << 6], rem_len);
-
-  ctx->len = rem_len;
-  ctx->tot_len += (block_nb + 1) << 6;
-}
-
-uint8_t* avb_sha256_final(AvbSHA256Ctx* ctx) {
-  unsigned int block_nb;
-  unsigned int pm_len;
-  unsigned int len_b;
-#ifndef UNROLL_LOOPS
-  int i;
-#endif
-
-  block_nb =
-      (1 + ((AVB_SHA256_BLOCK_SIZE - 9) < (ctx->len % AVB_SHA256_BLOCK_SIZE)));
-
-  len_b = (ctx->tot_len + ctx->len) << 3;
-  pm_len = block_nb << 6;
-
-  avb_memset(ctx->block + ctx->len, 0, pm_len - ctx->len);
-  ctx->block[ctx->len] = 0x80;
-  UNPACK32(len_b, ctx->block + pm_len - 4);
-
-  SHA256_transform(ctx, ctx->block, block_nb);
-
-#ifndef UNROLL_LOOPS
-  for (i = 0; i < 8; i++) {
-    UNPACK32(ctx->h[i], &ctx->buf[i << 2]);
-  }
-#else
-  UNPACK32(ctx->h[0], &ctx->buf[0]);
-  UNPACK32(ctx->h[1], &ctx->buf[4]);
-  UNPACK32(ctx->h[2], &ctx->buf[8]);
-  UNPACK32(ctx->h[3], &ctx->buf[12]);
-  UNPACK32(ctx->h[4], &ctx->buf[16]);
-  UNPACK32(ctx->h[5], &ctx->buf[20]);
-  UNPACK32(ctx->h[6], &ctx->buf[24]);
-  UNPACK32(ctx->h[7], &ctx->buf[28]);
-#endif /* !UNROLL_LOOPS */
-
-  return ctx->buf;
-}
+/* SHA-256 and SHA-512 implementation based on code by Oliver Gay
+ * <olivier.gay@a3.epfl.ch> under a BSD-style license. See below.
+ */
+
+/*
+ * FIPS 180-2 SHA-224/256/384/512 implementation
+ * Last update: 02/02/2007
+ * Issue date:  04/30/2005
+ *
+ * Copyright (C) 2005, 2007 Olivier Gay <olivier.gay@a3.epfl.ch>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the project nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE PROJECT AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE PROJECT OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <android_avb/avb_sha.h>
+
+#define SHFR(x, n) (x >> n)
+#define ROTR(x, n) ((x >> n) | (x << ((sizeof(x) << 3) - n)))
+#define ROTL(x, n) ((x << n) | (x >> ((sizeof(x) << 3) - n)))
+#define CH(x, y, z) ((x & y) ^ (~x & z))
+#define MAJ(x, y, z) ((x & y) ^ (x & z) ^ (y & z))
+
+#define SHA256_F1(x) (ROTR(x, 2) ^ ROTR(x, 13) ^ ROTR(x, 22))
+#define SHA256_F2(x) (ROTR(x, 6) ^ ROTR(x, 11) ^ ROTR(x, 25))
+#define SHA256_F3(x) (ROTR(x, 7) ^ ROTR(x, 18) ^ SHFR(x, 3))
+#define SHA256_F4(x) (ROTR(x, 17) ^ ROTR(x, 19) ^ SHFR(x, 10))
+
+#define UNPACK32(x, str)                 \
+  {                                      \
+    *((str) + 3) = (uint8_t)((x));       \
+    *((str) + 2) = (uint8_t)((x) >> 8);  \
+    *((str) + 1) = (uint8_t)((x) >> 16); \
+    *((str) + 0) = (uint8_t)((x) >> 24); \
+  }
+
+#define PACK32(str, x)                                                    \
+  {                                                                       \
+    *(x) = ((uint32_t) * ((str) + 3)) | ((uint32_t) * ((str) + 2) << 8) | \
+           ((uint32_t) * ((str) + 1) << 16) |                             \
+           ((uint32_t) * ((str) + 0) << 24);                              \
+  }
+
+/* Macros used for loops unrolling */
+
+#define SHA256_SCR(i) \
+  { w[i] = SHA256_F4(w[i - 2]) + w[i - 7] + SHA256_F3(w[i - 15]) + w[i - 16]; }
+
+#define SHA256_EXP(a, b, c, d, e, f, g, h, j)                               \
+  {                                                                         \
+    t1 = wv[h] + SHA256_F2(wv[e]) + CH(wv[e], wv[f], wv[g]) + sha256_k[j] + \
+         w[j];                                                              \
+    t2 = SHA256_F1(wv[a]) + MAJ(wv[a], wv[b], wv[c]);                       \
+    wv[d] += t1;                                                            \
+    wv[h] = t1 + t2;                                                        \
+  }
+
+static const uint32_t sha256_h0[8] = {0x6a09e667,
+                                      0xbb67ae85,
+                                      0x3c6ef372,
+                                      0xa54ff53a,
+                                      0x510e527f,
+                                      0x9b05688c,
+                                      0x1f83d9ab,
+                                      0x5be0cd19};
+
+static const uint32_t sha256_k[64] = {
+    0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5, 0x3956c25b, 0x59f111f1,
+    0x923f82a4, 0xab1c5ed5, 0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3,
+    0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174, 0xe49b69c1, 0xefbe4786,
+    0x0fc19dc6, 0x240ca1cc, 0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da,
+    0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7, 0xc6e00bf3, 0xd5a79147,
+    0x06ca6351, 0x14292967, 0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13,
+    0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85, 0xa2bfe8a1, 0xa81a664b,
+    0xc24b8b70, 0xc76c51a3, 0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070,
+    0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5, 0x391c0cb3, 0x4ed8aa4a,
+    0x5b9cca4f, 0x682e6ff3, 0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208,
+    0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2};
+
+/* SHA-256 implementation */
+void avb_sha256_init(AvbSHA256Ctx* ctx) {
+#ifndef UNROLL_LOOPS
+  int i;
+  for (i = 0; i < 8; i++) {
+    ctx->h[i] = sha256_h0[i];
+  }
+#else
+  ctx->h[0] = sha256_h0[0];
+  ctx->h[1] = sha256_h0[1];
+  ctx->h[2] = sha256_h0[2];
+  ctx->h[3] = sha256_h0[3];
+  ctx->h[4] = sha256_h0[4];
+  ctx->h[5] = sha256_h0[5];
+  ctx->h[6] = sha256_h0[6];
+  ctx->h[7] = sha256_h0[7];
+#endif /* !UNROLL_LOOPS */
+
+  ctx->len = 0;
+  ctx->tot_len = 0;
+}
+
+static void SHA256_transform(AvbSHA256Ctx* ctx,
+                             const uint8_t* message,
+                             unsigned int block_nb) {
+  uint32_t w[64];
+  uint32_t wv[8];
+  uint32_t t1, t2;
+  const unsigned char* sub_block;
+  int i;
+
+#ifndef UNROLL_LOOPS
+  int j;
+#endif
+
+  for (i = 0; i < (int)block_nb; i++) {
+    sub_block = message + (i << 6);
+
+#ifndef UNROLL_LOOPS
+    for (j = 0; j < 16; j++) {
+      PACK32(&sub_block[j << 2], &w[j]);
+    }
+
+    for (j = 16; j < 64; j++) {
+      SHA256_SCR(j);
+    }
+
+    for (j = 0; j < 8; j++) {
+      wv[j] = ctx->h[j];
+    }
+
+    for (j = 0; j < 64; j++) {
+      t1 = wv[7] + SHA256_F2(wv[4]) + CH(wv[4], wv[5], wv[6]) + sha256_k[j] +
+           w[j];
+      t2 = SHA256_F1(wv[0]) + MAJ(wv[0], wv[1], wv[2]);
+      wv[7] = wv[6];
+      wv[6] = wv[5];
+      wv[5] = wv[4];
+      wv[4] = wv[3] + t1;
+      wv[3] = wv[2];
+      wv[2] = wv[1];
+      wv[1] = wv[0];
+      wv[0] = t1 + t2;
+    }
+
+    for (j = 0; j < 8; j++) {
+      ctx->h[j] += wv[j];
+    }
+#else
+    PACK32(&sub_block[0], &w[0]);
+    PACK32(&sub_block[4], &w[1]);
+    PACK32(&sub_block[8], &w[2]);
+    PACK32(&sub_block[12], &w[3]);
+    PACK32(&sub_block[16], &w[4]);
+    PACK32(&sub_block[20], &w[5]);
+    PACK32(&sub_block[24], &w[6]);
+    PACK32(&sub_block[28], &w[7]);
+    PACK32(&sub_block[32], &w[8]);
+    PACK32(&sub_block[36], &w[9]);
+    PACK32(&sub_block[40], &w[10]);
+    PACK32(&sub_block[44], &w[11]);
+    PACK32(&sub_block[48], &w[12]);
+    PACK32(&sub_block[52], &w[13]);
+    PACK32(&sub_block[56], &w[14]);
+    PACK32(&sub_block[60], &w[15]);
+
+    SHA256_SCR(16);
+    SHA256_SCR(17);
+    SHA256_SCR(18);
+    SHA256_SCR(19);
+    SHA256_SCR(20);
+    SHA256_SCR(21);
+    SHA256_SCR(22);
+    SHA256_SCR(23);
+    SHA256_SCR(24);
+    SHA256_SCR(25);
+    SHA256_SCR(26);
+    SHA256_SCR(27);
+    SHA256_SCR(28);
+    SHA256_SCR(29);
+    SHA256_SCR(30);
+    SHA256_SCR(31);
+    SHA256_SCR(32);
+    SHA256_SCR(33);
+    SHA256_SCR(34);
+    SHA256_SCR(35);
+    SHA256_SCR(36);
+    SHA256_SCR(37);
+    SHA256_SCR(38);
+    SHA256_SCR(39);
+    SHA256_SCR(40);
+    SHA256_SCR(41);
+    SHA256_SCR(42);
+    SHA256_SCR(43);
+    SHA256_SCR(44);
+    SHA256_SCR(45);
+    SHA256_SCR(46);
+    SHA256_SCR(47);
+    SHA256_SCR(48);
+    SHA256_SCR(49);
+    SHA256_SCR(50);
+    SHA256_SCR(51);
+    SHA256_SCR(52);
+    SHA256_SCR(53);
+    SHA256_SCR(54);
+    SHA256_SCR(55);
+    SHA256_SCR(56);
+    SHA256_SCR(57);
+    SHA256_SCR(58);
+    SHA256_SCR(59);
+    SHA256_SCR(60);
+    SHA256_SCR(61);
+    SHA256_SCR(62);
+    SHA256_SCR(63);
+
+    wv[0] = ctx->h[0];
+    wv[1] = ctx->h[1];
+    wv[2] = ctx->h[2];
+    wv[3] = ctx->h[3];
+    wv[4] = ctx->h[4];
+    wv[5] = ctx->h[5];
+    wv[6] = ctx->h[6];
+    wv[7] = ctx->h[7];
+
+    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 0);
+    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 1);
+    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 2);
+    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 3);
+    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 4);
+    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 5);
+    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 6);
+    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 7);
+    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 8);
+    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 9);
+    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 10);
+    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 11);
+    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 12);
+    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 13);
+    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 14);
+    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 15);
+    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 16);
+    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 17);
+    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 18);
+    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 19);
+    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 20);
+    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 21);
+    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 22);
+    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 23);
+    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 24);
+    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 25);
+    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 26);
+    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 27);
+    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 28);
+    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 29);
+    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 30);
+    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 31);
+    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 32);
+    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 33);
+    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 34);
+    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 35);
+    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 36);
+    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 37);
+    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 38);
+    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 39);
+    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 40);
+    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 41);
+    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 42);
+    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 43);
+    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 44);
+    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 45);
+    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 46);
+    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 47);
+    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 48);
+    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 49);
+    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 50);
+    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 51);
+    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 52);
+    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 53);
+    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 54);
+    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 55);
+    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 56);
+    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 57);
+    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 58);
+    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 59);
+    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 60);
+    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 61);
+    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 62);
+    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 63);
+
+    ctx->h[0] += wv[0];
+    ctx->h[1] += wv[1];
+    ctx->h[2] += wv[2];
+    ctx->h[3] += wv[3];
+    ctx->h[4] += wv[4];
+    ctx->h[5] += wv[5];
+    ctx->h[6] += wv[6];
+    ctx->h[7] += wv[7];
+#endif /* !UNROLL_LOOPS */
+  }
+}
+
+void avb_sha256_update(AvbSHA256Ctx* ctx, const uint8_t* data, uint32_t len) {
+  unsigned int block_nb;
+  unsigned int new_len, rem_len, tmp_len;
+  const uint8_t* shifted_data;
+
+  tmp_len = AVB_SHA256_BLOCK_SIZE - ctx->len;
+  rem_len = len < tmp_len ? len : tmp_len;
+
+  avb_memcpy(&ctx->block[ctx->len], data, rem_len);
+
+  if (ctx->len + len < AVB_SHA256_BLOCK_SIZE) {
+    ctx->len += len;
+    return;
+  }
+
+  new_len = len - rem_len;
+  block_nb = new_len / AVB_SHA256_BLOCK_SIZE;
+
+  shifted_data = data + rem_len;
+
+  SHA256_transform(ctx, ctx->block, 1);
+  SHA256_transform(ctx, shifted_data, block_nb);
+
+  rem_len = new_len % AVB_SHA256_BLOCK_SIZE;
+
+  avb_memcpy(ctx->block, &shifted_data[block_nb << 6], rem_len);
+
+  ctx->len = rem_len;
+  ctx->tot_len += (block_nb + 1) << 6;
+}
+
+uint8_t* avb_sha256_final(AvbSHA256Ctx* ctx) {
+  unsigned int block_nb;
+  unsigned int pm_len;
+  unsigned int len_b;
+#ifndef UNROLL_LOOPS
+  int i;
+#endif
+
+  block_nb =
+      (1 + ((AVB_SHA256_BLOCK_SIZE - 9) < (ctx->len % AVB_SHA256_BLOCK_SIZE)));
+
+  len_b = (ctx->tot_len + ctx->len) << 3;
+  pm_len = block_nb << 6;
+
+  avb_memset(ctx->block + ctx->len, 0, pm_len - ctx->len);
+  ctx->block[ctx->len] = 0x80;
+  UNPACK32(len_b, ctx->block + pm_len - 4);
+
+  SHA256_transform(ctx, ctx->block, block_nb);
+
+#ifndef UNROLL_LOOPS
+  for (i = 0; i < 8; i++) {
+    UNPACK32(ctx->h[i], &ctx->buf[i << 2]);
+  }
+#else
+  UNPACK32(ctx->h[0], &ctx->buf[0]);
+  UNPACK32(ctx->h[1], &ctx->buf[4]);
+  UNPACK32(ctx->h[2], &ctx->buf[8]);
+  UNPACK32(ctx->h[3], &ctx->buf[12]);
+  UNPACK32(ctx->h[4], &ctx->buf[16]);
+  UNPACK32(ctx->h[5], &ctx->buf[20]);
+  UNPACK32(ctx->h[6], &ctx->buf[24]);
+  UNPACK32(ctx->h[7], &ctx->buf[28]);
+#endif /* !UNROLL_LOOPS */
+
+  return ctx->buf;
+}
diff --git a/lib/avb/rk_libavb/avb_sha512.c b/lib/avb/libavb/avb_sha512.c
similarity index 97%
rename from lib/avb/rk_libavb/avb_sha512.c
rename to lib/avb/libavb/avb_sha512.c
index cb4a2eeb41..020e9c9019 100644
--- a/lib/avb/rk_libavb/avb_sha512.c
+++ b/lib/avb/libavb/avb_sha512.c
@@ -1,388 +1,388 @@
-/* SHA-256 and SHA-512 implementation based on code by Oliver Gay
- * <olivier.gay@a3.epfl.ch> under a BSD-style license. See below.
- */
-
-/*
- * FIPS 180-2 SHA-224/256/384/512 implementation
- * Last update: 02/02/2007
- * Issue date:  04/30/2005
- *
- * Copyright (C) 2005, 2007 Olivier Gay <olivier.gay@a3.epfl.ch>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the project nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE PROJECT AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE PROJECT OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <android_avb/avb_sha.h>
-
-#define SHFR(x, n) (x >> n)
-#define ROTR(x, n) ((x >> n) | (x << ((sizeof(x) << 3) - n)))
-#define ROTL(x, n) ((x << n) | (x >> ((sizeof(x) << 3) - n)))
-#define CH(x, y, z) ((x & y) ^ (~x & z))
-#define MAJ(x, y, z) ((x & y) ^ (x & z) ^ (y & z))
-
-#define SHA512_F1(x) (ROTR(x, 28) ^ ROTR(x, 34) ^ ROTR(x, 39))
-#define SHA512_F2(x) (ROTR(x, 14) ^ ROTR(x, 18) ^ ROTR(x, 41))
-#define SHA512_F3(x) (ROTR(x, 1) ^ ROTR(x, 8) ^ SHFR(x, 7))
-#define SHA512_F4(x) (ROTR(x, 19) ^ ROTR(x, 61) ^ SHFR(x, 6))
-
-#define UNPACK32(x, str)                 \
-  {                                      \
-    *((str) + 3) = (uint8_t)((x));       \
-    *((str) + 2) = (uint8_t)((x) >> 8);  \
-    *((str) + 1) = (uint8_t)((x) >> 16); \
-    *((str) + 0) = (uint8_t)((x) >> 24); \
-  }
-
-#define UNPACK64(x, str)                         \
-  {                                              \
-    *((str) + 7) = (uint8_t)x;                   \
-    *((str) + 6) = (uint8_t)((uint64_t)x >> 8);  \
-    *((str) + 5) = (uint8_t)((uint64_t)x >> 16); \
-    *((str) + 4) = (uint8_t)((uint64_t)x >> 24); \
-    *((str) + 3) = (uint8_t)((uint64_t)x >> 32); \
-    *((str) + 2) = (uint8_t)((uint64_t)x >> 40); \
-    *((str) + 1) = (uint8_t)((uint64_t)x >> 48); \
-    *((str) + 0) = (uint8_t)((uint64_t)x >> 56); \
-  }
-
-#define PACK64(str, x)                                                        \
-  {                                                                           \
-    *(x) =                                                                    \
-        ((uint64_t) * ((str) + 7)) | ((uint64_t) * ((str) + 6) << 8) |        \
-        ((uint64_t) * ((str) + 5) << 16) | ((uint64_t) * ((str) + 4) << 24) | \
-        ((uint64_t) * ((str) + 3) << 32) | ((uint64_t) * ((str) + 2) << 40) | \
-        ((uint64_t) * ((str) + 1) << 48) | ((uint64_t) * ((str) + 0) << 56);  \
-  }
-
-/* Macros used for loops unrolling */
-
-#define SHA512_SCR(i) \
-  { w[i] = SHA512_F4(w[i - 2]) + w[i - 7] + SHA512_F3(w[i - 15]) + w[i - 16]; }
-
-#define SHA512_EXP(a, b, c, d, e, f, g, h, j)                               \
-  {                                                                         \
-    t1 = wv[h] + SHA512_F2(wv[e]) + CH(wv[e], wv[f], wv[g]) + sha512_k[j] + \
-         w[j];                                                              \
-    t2 = SHA512_F1(wv[a]) + MAJ(wv[a], wv[b], wv[c]);                       \
-    wv[d] += t1;                                                            \
-    wv[h] = t1 + t2;                                                        \
-  }
-
-static const uint64_t sha512_h0[8] = {0x6a09e667f3bcc908ULL,
-                                      0xbb67ae8584caa73bULL,
-                                      0x3c6ef372fe94f82bULL,
-                                      0xa54ff53a5f1d36f1ULL,
-                                      0x510e527fade682d1ULL,
-                                      0x9b05688c2b3e6c1fULL,
-                                      0x1f83d9abfb41bd6bULL,
-                                      0x5be0cd19137e2179ULL};
-
-static const uint64_t sha512_k[80] = {
-    0x428a2f98d728ae22ULL, 0x7137449123ef65cdULL, 0xb5c0fbcfec4d3b2fULL,
-    0xe9b5dba58189dbbcULL, 0x3956c25bf348b538ULL, 0x59f111f1b605d019ULL,
-    0x923f82a4af194f9bULL, 0xab1c5ed5da6d8118ULL, 0xd807aa98a3030242ULL,
-    0x12835b0145706fbeULL, 0x243185be4ee4b28cULL, 0x550c7dc3d5ffb4e2ULL,
-    0x72be5d74f27b896fULL, 0x80deb1fe3b1696b1ULL, 0x9bdc06a725c71235ULL,
-    0xc19bf174cf692694ULL, 0xe49b69c19ef14ad2ULL, 0xefbe4786384f25e3ULL,
-    0x0fc19dc68b8cd5b5ULL, 0x240ca1cc77ac9c65ULL, 0x2de92c6f592b0275ULL,
-    0x4a7484aa6ea6e483ULL, 0x5cb0a9dcbd41fbd4ULL, 0x76f988da831153b5ULL,
-    0x983e5152ee66dfabULL, 0xa831c66d2db43210ULL, 0xb00327c898fb213fULL,
-    0xbf597fc7beef0ee4ULL, 0xc6e00bf33da88fc2ULL, 0xd5a79147930aa725ULL,
-    0x06ca6351e003826fULL, 0x142929670a0e6e70ULL, 0x27b70a8546d22ffcULL,
-    0x2e1b21385c26c926ULL, 0x4d2c6dfc5ac42aedULL, 0x53380d139d95b3dfULL,
-    0x650a73548baf63deULL, 0x766a0abb3c77b2a8ULL, 0x81c2c92e47edaee6ULL,
-    0x92722c851482353bULL, 0xa2bfe8a14cf10364ULL, 0xa81a664bbc423001ULL,
-    0xc24b8b70d0f89791ULL, 0xc76c51a30654be30ULL, 0xd192e819d6ef5218ULL,
-    0xd69906245565a910ULL, 0xf40e35855771202aULL, 0x106aa07032bbd1b8ULL,
-    0x19a4c116b8d2d0c8ULL, 0x1e376c085141ab53ULL, 0x2748774cdf8eeb99ULL,
-    0x34b0bcb5e19b48a8ULL, 0x391c0cb3c5c95a63ULL, 0x4ed8aa4ae3418acbULL,
-    0x5b9cca4f7763e373ULL, 0x682e6ff3d6b2b8a3ULL, 0x748f82ee5defb2fcULL,
-    0x78a5636f43172f60ULL, 0x84c87814a1f0ab72ULL, 0x8cc702081a6439ecULL,
-    0x90befffa23631e28ULL, 0xa4506cebde82bde9ULL, 0xbef9a3f7b2c67915ULL,
-    0xc67178f2e372532bULL, 0xca273eceea26619cULL, 0xd186b8c721c0c207ULL,
-    0xeada7dd6cde0eb1eULL, 0xf57d4f7fee6ed178ULL, 0x06f067aa72176fbaULL,
-    0x0a637dc5a2c898a6ULL, 0x113f9804bef90daeULL, 0x1b710b35131c471bULL,
-    0x28db77f523047d84ULL, 0x32caab7b40c72493ULL, 0x3c9ebe0a15c9bebcULL,
-    0x431d67c49c100d4cULL, 0x4cc5d4becb3e42b6ULL, 0x597f299cfc657e2aULL,
-    0x5fcb6fab3ad6faecULL, 0x6c44198c4a475817ULL};
-
-/* SHA-512 implementation */
-
-void avb_sha512_init(AvbSHA512Ctx* ctx) {
-#ifdef UNROLL_LOOPS_SHA512
-  ctx->h[0] = sha512_h0[0];
-  ctx->h[1] = sha512_h0[1];
-  ctx->h[2] = sha512_h0[2];
-  ctx->h[3] = sha512_h0[3];
-  ctx->h[4] = sha512_h0[4];
-  ctx->h[5] = sha512_h0[5];
-  ctx->h[6] = sha512_h0[6];
-  ctx->h[7] = sha512_h0[7];
-#else
-  int i;
-
-  for (i = 0; i < 8; i++)
-    ctx->h[i] = sha512_h0[i];
-#endif /* UNROLL_LOOPS_SHA512 */
-
-  ctx->len = 0;
-  ctx->tot_len = 0;
-}
-
-static void SHA512_transform(AvbSHA512Ctx* ctx,
-                             const uint8_t* message,
-                             unsigned int block_nb) {
-  uint64_t w[80];
-  uint64_t wv[8];
-  uint64_t t1, t2;
-  const uint8_t* sub_block;
-  int i, j;
-
-  for (i = 0; i < (int)block_nb; i++) {
-    sub_block = message + (i << 7);
-
-#ifdef UNROLL_LOOPS_SHA512
-    PACK64(&sub_block[0], &w[0]);
-    PACK64(&sub_block[8], &w[1]);
-    PACK64(&sub_block[16], &w[2]);
-    PACK64(&sub_block[24], &w[3]);
-    PACK64(&sub_block[32], &w[4]);
-    PACK64(&sub_block[40], &w[5]);
-    PACK64(&sub_block[48], &w[6]);
-    PACK64(&sub_block[56], &w[7]);
-    PACK64(&sub_block[64], &w[8]);
-    PACK64(&sub_block[72], &w[9]);
-    PACK64(&sub_block[80], &w[10]);
-    PACK64(&sub_block[88], &w[11]);
-    PACK64(&sub_block[96], &w[12]);
-    PACK64(&sub_block[104], &w[13]);
-    PACK64(&sub_block[112], &w[14]);
-    PACK64(&sub_block[120], &w[15]);
-
-    SHA512_SCR(16);
-    SHA512_SCR(17);
-    SHA512_SCR(18);
-    SHA512_SCR(19);
-    SHA512_SCR(20);
-    SHA512_SCR(21);
-    SHA512_SCR(22);
-    SHA512_SCR(23);
-    SHA512_SCR(24);
-    SHA512_SCR(25);
-    SHA512_SCR(26);
-    SHA512_SCR(27);
-    SHA512_SCR(28);
-    SHA512_SCR(29);
-    SHA512_SCR(30);
-    SHA512_SCR(31);
-    SHA512_SCR(32);
-    SHA512_SCR(33);
-    SHA512_SCR(34);
-    SHA512_SCR(35);
-    SHA512_SCR(36);
-    SHA512_SCR(37);
-    SHA512_SCR(38);
-    SHA512_SCR(39);
-    SHA512_SCR(40);
-    SHA512_SCR(41);
-    SHA512_SCR(42);
-    SHA512_SCR(43);
-    SHA512_SCR(44);
-    SHA512_SCR(45);
-    SHA512_SCR(46);
-    SHA512_SCR(47);
-    SHA512_SCR(48);
-    SHA512_SCR(49);
-    SHA512_SCR(50);
-    SHA512_SCR(51);
-    SHA512_SCR(52);
-    SHA512_SCR(53);
-    SHA512_SCR(54);
-    SHA512_SCR(55);
-    SHA512_SCR(56);
-    SHA512_SCR(57);
-    SHA512_SCR(58);
-    SHA512_SCR(59);
-    SHA512_SCR(60);
-    SHA512_SCR(61);
-    SHA512_SCR(62);
-    SHA512_SCR(63);
-    SHA512_SCR(64);
-    SHA512_SCR(65);
-    SHA512_SCR(66);
-    SHA512_SCR(67);
-    SHA512_SCR(68);
-    SHA512_SCR(69);
-    SHA512_SCR(70);
-    SHA512_SCR(71);
-    SHA512_SCR(72);
-    SHA512_SCR(73);
-    SHA512_SCR(74);
-    SHA512_SCR(75);
-    SHA512_SCR(76);
-    SHA512_SCR(77);
-    SHA512_SCR(78);
-    SHA512_SCR(79);
-
-    wv[0] = ctx->h[0];
-    wv[1] = ctx->h[1];
-    wv[2] = ctx->h[2];
-    wv[3] = ctx->h[3];
-    wv[4] = ctx->h[4];
-    wv[5] = ctx->h[5];
-    wv[6] = ctx->h[6];
-    wv[7] = ctx->h[7];
-
-    j = 0;
-
-    do {
-      SHA512_EXP(0, 1, 2, 3, 4, 5, 6, 7, j);
-      j++;
-      SHA512_EXP(7, 0, 1, 2, 3, 4, 5, 6, j);
-      j++;
-      SHA512_EXP(6, 7, 0, 1, 2, 3, 4, 5, j);
-      j++;
-      SHA512_EXP(5, 6, 7, 0, 1, 2, 3, 4, j);
-      j++;
-      SHA512_EXP(4, 5, 6, 7, 0, 1, 2, 3, j);
-      j++;
-      SHA512_EXP(3, 4, 5, 6, 7, 0, 1, 2, j);
-      j++;
-      SHA512_EXP(2, 3, 4, 5, 6, 7, 0, 1, j);
-      j++;
-      SHA512_EXP(1, 2, 3, 4, 5, 6, 7, 0, j);
-      j++;
-    } while (j < 80);
-
-    ctx->h[0] += wv[0];
-    ctx->h[1] += wv[1];
-    ctx->h[2] += wv[2];
-    ctx->h[3] += wv[3];
-    ctx->h[4] += wv[4];
-    ctx->h[5] += wv[5];
-    ctx->h[6] += wv[6];
-    ctx->h[7] += wv[7];
-#else
-    for (j = 0; j < 16; j++) {
-      PACK64(&sub_block[j << 3], &w[j]);
-    }
-
-    for (j = 16; j < 80; j++) {
-      SHA512_SCR(j);
-    }
-
-    for (j = 0; j < 8; j++) {
-      wv[j] = ctx->h[j];
-    }
-
-    for (j = 0; j < 80; j++) {
-      t1 = wv[7] + SHA512_F2(wv[4]) + CH(wv[4], wv[5], wv[6]) + sha512_k[j] +
-           w[j];
-      t2 = SHA512_F1(wv[0]) + MAJ(wv[0], wv[1], wv[2]);
-      wv[7] = wv[6];
-      wv[6] = wv[5];
-      wv[5] = wv[4];
-      wv[4] = wv[3] + t1;
-      wv[3] = wv[2];
-      wv[2] = wv[1];
-      wv[1] = wv[0];
-      wv[0] = t1 + t2;
-    }
-
-    for (j = 0; j < 8; j++)
-      ctx->h[j] += wv[j];
-#endif /* UNROLL_LOOPS_SHA512 */
-  }
-}
-
-void avb_sha512_update(AvbSHA512Ctx* ctx, const uint8_t* data, uint32_t len) {
-  unsigned int block_nb;
-  unsigned int new_len, rem_len, tmp_len;
-  const uint8_t* shifted_data;
-
-  tmp_len = AVB_SHA512_BLOCK_SIZE - ctx->len;
-  rem_len = len < tmp_len ? len : tmp_len;
-
-  avb_memcpy(&ctx->block[ctx->len], data, rem_len);
-
-  if (ctx->len + len < AVB_SHA512_BLOCK_SIZE) {
-    ctx->len += len;
-    return;
-  }
-
-  new_len = len - rem_len;
-  block_nb = new_len / AVB_SHA512_BLOCK_SIZE;
-
-  shifted_data = data + rem_len;
-
-  SHA512_transform(ctx, ctx->block, 1);
-  SHA512_transform(ctx, shifted_data, block_nb);
-
-  rem_len = new_len % AVB_SHA512_BLOCK_SIZE;
-
-  avb_memcpy(ctx->block, &shifted_data[block_nb << 7], rem_len);
-
-  ctx->len = rem_len;
-  ctx->tot_len += (block_nb + 1) << 7;
-}
-
-uint8_t* avb_sha512_final(AvbSHA512Ctx* ctx) {
-  unsigned int block_nb;
-  unsigned int pm_len;
-  unsigned int len_b;
-
-#ifndef UNROLL_LOOPS_SHA512
-  int i;
-#endif
-
-  block_nb =
-      1 + ((AVB_SHA512_BLOCK_SIZE - 17) < (ctx->len % AVB_SHA512_BLOCK_SIZE));
-
-  len_b = (ctx->tot_len + ctx->len) << 3;
-  pm_len = block_nb << 7;
-
-  avb_memset(ctx->block + ctx->len, 0, pm_len - ctx->len);
-  ctx->block[ctx->len] = 0x80;
-  UNPACK32(len_b, ctx->block + pm_len - 4);
-
-  SHA512_transform(ctx, ctx->block, block_nb);
-
-#ifdef UNROLL_LOOPS_SHA512
-  UNPACK64(ctx->h[0], &ctx->buf[0]);
-  UNPACK64(ctx->h[1], &ctx->buf[8]);
-  UNPACK64(ctx->h[2], &ctx->buf[16]);
-  UNPACK64(ctx->h[3], &ctx->buf[24]);
-  UNPACK64(ctx->h[4], &ctx->buf[32]);
-  UNPACK64(ctx->h[5], &ctx->buf[40]);
-  UNPACK64(ctx->h[6], &ctx->buf[48]);
-  UNPACK64(ctx->h[7], &ctx->buf[56]);
-#else
-  for (i = 0; i < 8; i++)
-    UNPACK64(ctx->h[i], &ctx->buf[i << 3]);
-#endif /* UNROLL_LOOPS_SHA512 */
-
-  return ctx->buf;
-}
+/* SHA-256 and SHA-512 implementation based on code by Oliver Gay
+ * <olivier.gay@a3.epfl.ch> under a BSD-style license. See below.
+ */
+
+/*
+ * FIPS 180-2 SHA-224/256/384/512 implementation
+ * Last update: 02/02/2007
+ * Issue date:  04/30/2005
+ *
+ * Copyright (C) 2005, 2007 Olivier Gay <olivier.gay@a3.epfl.ch>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the project nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE PROJECT AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE PROJECT OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <android_avb/avb_sha.h>
+
+#define SHFR(x, n) (x >> n)
+#define ROTR(x, n) ((x >> n) | (x << ((sizeof(x) << 3) - n)))
+#define ROTL(x, n) ((x << n) | (x >> ((sizeof(x) << 3) - n)))
+#define CH(x, y, z) ((x & y) ^ (~x & z))
+#define MAJ(x, y, z) ((x & y) ^ (x & z) ^ (y & z))
+
+#define SHA512_F1(x) (ROTR(x, 28) ^ ROTR(x, 34) ^ ROTR(x, 39))
+#define SHA512_F2(x) (ROTR(x, 14) ^ ROTR(x, 18) ^ ROTR(x, 41))
+#define SHA512_F3(x) (ROTR(x, 1) ^ ROTR(x, 8) ^ SHFR(x, 7))
+#define SHA512_F4(x) (ROTR(x, 19) ^ ROTR(x, 61) ^ SHFR(x, 6))
+
+#define UNPACK32(x, str)                 \
+  {                                      \
+    *((str) + 3) = (uint8_t)((x));       \
+    *((str) + 2) = (uint8_t)((x) >> 8);  \
+    *((str) + 1) = (uint8_t)((x) >> 16); \
+    *((str) + 0) = (uint8_t)((x) >> 24); \
+  }
+
+#define UNPACK64(x, str)                         \
+  {                                              \
+    *((str) + 7) = (uint8_t)x;                   \
+    *((str) + 6) = (uint8_t)((uint64_t)x >> 8);  \
+    *((str) + 5) = (uint8_t)((uint64_t)x >> 16); \
+    *((str) + 4) = (uint8_t)((uint64_t)x >> 24); \
+    *((str) + 3) = (uint8_t)((uint64_t)x >> 32); \
+    *((str) + 2) = (uint8_t)((uint64_t)x >> 40); \
+    *((str) + 1) = (uint8_t)((uint64_t)x >> 48); \
+    *((str) + 0) = (uint8_t)((uint64_t)x >> 56); \
+  }
+
+#define PACK64(str, x)                                                        \
+  {                                                                           \
+    *(x) =                                                                    \
+        ((uint64_t) * ((str) + 7)) | ((uint64_t) * ((str) + 6) << 8) |        \
+        ((uint64_t) * ((str) + 5) << 16) | ((uint64_t) * ((str) + 4) << 24) | \
+        ((uint64_t) * ((str) + 3) << 32) | ((uint64_t) * ((str) + 2) << 40) | \
+        ((uint64_t) * ((str) + 1) << 48) | ((uint64_t) * ((str) + 0) << 56);  \
+  }
+
+/* Macros used for loops unrolling */
+
+#define SHA512_SCR(i) \
+  { w[i] = SHA512_F4(w[i - 2]) + w[i - 7] + SHA512_F3(w[i - 15]) + w[i - 16]; }
+
+#define SHA512_EXP(a, b, c, d, e, f, g, h, j)                               \
+  {                                                                         \
+    t1 = wv[h] + SHA512_F2(wv[e]) + CH(wv[e], wv[f], wv[g]) + sha512_k[j] + \
+         w[j];                                                              \
+    t2 = SHA512_F1(wv[a]) + MAJ(wv[a], wv[b], wv[c]);                       \
+    wv[d] += t1;                                                            \
+    wv[h] = t1 + t2;                                                        \
+  }
+
+static const uint64_t sha512_h0[8] = {0x6a09e667f3bcc908ULL,
+                                      0xbb67ae8584caa73bULL,
+                                      0x3c6ef372fe94f82bULL,
+                                      0xa54ff53a5f1d36f1ULL,
+                                      0x510e527fade682d1ULL,
+                                      0x9b05688c2b3e6c1fULL,
+                                      0x1f83d9abfb41bd6bULL,
+                                      0x5be0cd19137e2179ULL};
+
+static const uint64_t sha512_k[80] = {
+    0x428a2f98d728ae22ULL, 0x7137449123ef65cdULL, 0xb5c0fbcfec4d3b2fULL,
+    0xe9b5dba58189dbbcULL, 0x3956c25bf348b538ULL, 0x59f111f1b605d019ULL,
+    0x923f82a4af194f9bULL, 0xab1c5ed5da6d8118ULL, 0xd807aa98a3030242ULL,
+    0x12835b0145706fbeULL, 0x243185be4ee4b28cULL, 0x550c7dc3d5ffb4e2ULL,
+    0x72be5d74f27b896fULL, 0x80deb1fe3b1696b1ULL, 0x9bdc06a725c71235ULL,
+    0xc19bf174cf692694ULL, 0xe49b69c19ef14ad2ULL, 0xefbe4786384f25e3ULL,
+    0x0fc19dc68b8cd5b5ULL, 0x240ca1cc77ac9c65ULL, 0x2de92c6f592b0275ULL,
+    0x4a7484aa6ea6e483ULL, 0x5cb0a9dcbd41fbd4ULL, 0x76f988da831153b5ULL,
+    0x983e5152ee66dfabULL, 0xa831c66d2db43210ULL, 0xb00327c898fb213fULL,
+    0xbf597fc7beef0ee4ULL, 0xc6e00bf33da88fc2ULL, 0xd5a79147930aa725ULL,
+    0x06ca6351e003826fULL, 0x142929670a0e6e70ULL, 0x27b70a8546d22ffcULL,
+    0x2e1b21385c26c926ULL, 0x4d2c6dfc5ac42aedULL, 0x53380d139d95b3dfULL,
+    0x650a73548baf63deULL, 0x766a0abb3c77b2a8ULL, 0x81c2c92e47edaee6ULL,
+    0x92722c851482353bULL, 0xa2bfe8a14cf10364ULL, 0xa81a664bbc423001ULL,
+    0xc24b8b70d0f89791ULL, 0xc76c51a30654be30ULL, 0xd192e819d6ef5218ULL,
+    0xd69906245565a910ULL, 0xf40e35855771202aULL, 0x106aa07032bbd1b8ULL,
+    0x19a4c116b8d2d0c8ULL, 0x1e376c085141ab53ULL, 0x2748774cdf8eeb99ULL,
+    0x34b0bcb5e19b48a8ULL, 0x391c0cb3c5c95a63ULL, 0x4ed8aa4ae3418acbULL,
+    0x5b9cca4f7763e373ULL, 0x682e6ff3d6b2b8a3ULL, 0x748f82ee5defb2fcULL,
+    0x78a5636f43172f60ULL, 0x84c87814a1f0ab72ULL, 0x8cc702081a6439ecULL,
+    0x90befffa23631e28ULL, 0xa4506cebde82bde9ULL, 0xbef9a3f7b2c67915ULL,
+    0xc67178f2e372532bULL, 0xca273eceea26619cULL, 0xd186b8c721c0c207ULL,
+    0xeada7dd6cde0eb1eULL, 0xf57d4f7fee6ed178ULL, 0x06f067aa72176fbaULL,
+    0x0a637dc5a2c898a6ULL, 0x113f9804bef90daeULL, 0x1b710b35131c471bULL,
+    0x28db77f523047d84ULL, 0x32caab7b40c72493ULL, 0x3c9ebe0a15c9bebcULL,
+    0x431d67c49c100d4cULL, 0x4cc5d4becb3e42b6ULL, 0x597f299cfc657e2aULL,
+    0x5fcb6fab3ad6faecULL, 0x6c44198c4a475817ULL};
+
+/* SHA-512 implementation */
+
+void avb_sha512_init(AvbSHA512Ctx* ctx) {
+#ifdef UNROLL_LOOPS_SHA512
+  ctx->h[0] = sha512_h0[0];
+  ctx->h[1] = sha512_h0[1];
+  ctx->h[2] = sha512_h0[2];
+  ctx->h[3] = sha512_h0[3];
+  ctx->h[4] = sha512_h0[4];
+  ctx->h[5] = sha512_h0[5];
+  ctx->h[6] = sha512_h0[6];
+  ctx->h[7] = sha512_h0[7];
+#else
+  int i;
+
+  for (i = 0; i < 8; i++)
+    ctx->h[i] = sha512_h0[i];
+#endif /* UNROLL_LOOPS_SHA512 */
+
+  ctx->len = 0;
+  ctx->tot_len = 0;
+}
+
+static void SHA512_transform(AvbSHA512Ctx* ctx,
+                             const uint8_t* message,
+                             unsigned int block_nb) {
+  uint64_t w[80];
+  uint64_t wv[8];
+  uint64_t t1, t2;
+  const uint8_t* sub_block;
+  int i, j;
+
+  for (i = 0; i < (int)block_nb; i++) {
+    sub_block = message + (i << 7);
+
+#ifdef UNROLL_LOOPS_SHA512
+    PACK64(&sub_block[0], &w[0]);
+    PACK64(&sub_block[8], &w[1]);
+    PACK64(&sub_block[16], &w[2]);
+    PACK64(&sub_block[24], &w[3]);
+    PACK64(&sub_block[32], &w[4]);
+    PACK64(&sub_block[40], &w[5]);
+    PACK64(&sub_block[48], &w[6]);
+    PACK64(&sub_block[56], &w[7]);
+    PACK64(&sub_block[64], &w[8]);
+    PACK64(&sub_block[72], &w[9]);
+    PACK64(&sub_block[80], &w[10]);
+    PACK64(&sub_block[88], &w[11]);
+    PACK64(&sub_block[96], &w[12]);
+    PACK64(&sub_block[104], &w[13]);
+    PACK64(&sub_block[112], &w[14]);
+    PACK64(&sub_block[120], &w[15]);
+
+    SHA512_SCR(16);
+    SHA512_SCR(17);
+    SHA512_SCR(18);
+    SHA512_SCR(19);
+    SHA512_SCR(20);
+    SHA512_SCR(21);
+    SHA512_SCR(22);
+    SHA512_SCR(23);
+    SHA512_SCR(24);
+    SHA512_SCR(25);
+    SHA512_SCR(26);
+    SHA512_SCR(27);
+    SHA512_SCR(28);
+    SHA512_SCR(29);
+    SHA512_SCR(30);
+    SHA512_SCR(31);
+    SHA512_SCR(32);
+    SHA512_SCR(33);
+    SHA512_SCR(34);
+    SHA512_SCR(35);
+    SHA512_SCR(36);
+    SHA512_SCR(37);
+    SHA512_SCR(38);
+    SHA512_SCR(39);
+    SHA512_SCR(40);
+    SHA512_SCR(41);
+    SHA512_SCR(42);
+    SHA512_SCR(43);
+    SHA512_SCR(44);
+    SHA512_SCR(45);
+    SHA512_SCR(46);
+    SHA512_SCR(47);
+    SHA512_SCR(48);
+    SHA512_SCR(49);
+    SHA512_SCR(50);
+    SHA512_SCR(51);
+    SHA512_SCR(52);
+    SHA512_SCR(53);
+    SHA512_SCR(54);
+    SHA512_SCR(55);
+    SHA512_SCR(56);
+    SHA512_SCR(57);
+    SHA512_SCR(58);
+    SHA512_SCR(59);
+    SHA512_SCR(60);
+    SHA512_SCR(61);
+    SHA512_SCR(62);
+    SHA512_SCR(63);
+    SHA512_SCR(64);
+    SHA512_SCR(65);
+    SHA512_SCR(66);
+    SHA512_SCR(67);
+    SHA512_SCR(68);
+    SHA512_SCR(69);
+    SHA512_SCR(70);
+    SHA512_SCR(71);
+    SHA512_SCR(72);
+    SHA512_SCR(73);
+    SHA512_SCR(74);
+    SHA512_SCR(75);
+    SHA512_SCR(76);
+    SHA512_SCR(77);
+    SHA512_SCR(78);
+    SHA512_SCR(79);
+
+    wv[0] = ctx->h[0];
+    wv[1] = ctx->h[1];
+    wv[2] = ctx->h[2];
+    wv[3] = ctx->h[3];
+    wv[4] = ctx->h[4];
+    wv[5] = ctx->h[5];
+    wv[6] = ctx->h[6];
+    wv[7] = ctx->h[7];
+
+    j = 0;
+
+    do {
+      SHA512_EXP(0, 1, 2, 3, 4, 5, 6, 7, j);
+      j++;
+      SHA512_EXP(7, 0, 1, 2, 3, 4, 5, 6, j);
+      j++;
+      SHA512_EXP(6, 7, 0, 1, 2, 3, 4, 5, j);
+      j++;
+      SHA512_EXP(5, 6, 7, 0, 1, 2, 3, 4, j);
+      j++;
+      SHA512_EXP(4, 5, 6, 7, 0, 1, 2, 3, j);
+      j++;
+      SHA512_EXP(3, 4, 5, 6, 7, 0, 1, 2, j);
+      j++;
+      SHA512_EXP(2, 3, 4, 5, 6, 7, 0, 1, j);
+      j++;
+      SHA512_EXP(1, 2, 3, 4, 5, 6, 7, 0, j);
+      j++;
+    } while (j < 80);
+
+    ctx->h[0] += wv[0];
+    ctx->h[1] += wv[1];
+    ctx->h[2] += wv[2];
+    ctx->h[3] += wv[3];
+    ctx->h[4] += wv[4];
+    ctx->h[5] += wv[5];
+    ctx->h[6] += wv[6];
+    ctx->h[7] += wv[7];
+#else
+    for (j = 0; j < 16; j++) {
+      PACK64(&sub_block[j << 3], &w[j]);
+    }
+
+    for (j = 16; j < 80; j++) {
+      SHA512_SCR(j);
+    }
+
+    for (j = 0; j < 8; j++) {
+      wv[j] = ctx->h[j];
+    }
+
+    for (j = 0; j < 80; j++) {
+      t1 = wv[7] + SHA512_F2(wv[4]) + CH(wv[4], wv[5], wv[6]) + sha512_k[j] +
+           w[j];
+      t2 = SHA512_F1(wv[0]) + MAJ(wv[0], wv[1], wv[2]);
+      wv[7] = wv[6];
+      wv[6] = wv[5];
+      wv[5] = wv[4];
+      wv[4] = wv[3] + t1;
+      wv[3] = wv[2];
+      wv[2] = wv[1];
+      wv[1] = wv[0];
+      wv[0] = t1 + t2;
+    }
+
+    for (j = 0; j < 8; j++)
+      ctx->h[j] += wv[j];
+#endif /* UNROLL_LOOPS_SHA512 */
+  }
+}
+
+void avb_sha512_update(AvbSHA512Ctx* ctx, const uint8_t* data, uint32_t len) {
+  unsigned int block_nb;
+  unsigned int new_len, rem_len, tmp_len;
+  const uint8_t* shifted_data;
+
+  tmp_len = AVB_SHA512_BLOCK_SIZE - ctx->len;
+  rem_len = len < tmp_len ? len : tmp_len;
+
+  avb_memcpy(&ctx->block[ctx->len], data, rem_len);
+
+  if (ctx->len + len < AVB_SHA512_BLOCK_SIZE) {
+    ctx->len += len;
+    return;
+  }
+
+  new_len = len - rem_len;
+  block_nb = new_len / AVB_SHA512_BLOCK_SIZE;
+
+  shifted_data = data + rem_len;
+
+  SHA512_transform(ctx, ctx->block, 1);
+  SHA512_transform(ctx, shifted_data, block_nb);
+
+  rem_len = new_len % AVB_SHA512_BLOCK_SIZE;
+
+  avb_memcpy(ctx->block, &shifted_data[block_nb << 7], rem_len);
+
+  ctx->len = rem_len;
+  ctx->tot_len += (block_nb + 1) << 7;
+}
+
+uint8_t* avb_sha512_final(AvbSHA512Ctx* ctx) {
+  unsigned int block_nb;
+  unsigned int pm_len;
+  unsigned int len_b;
+
+#ifndef UNROLL_LOOPS_SHA512
+  int i;
+#endif
+
+  block_nb =
+      1 + ((AVB_SHA512_BLOCK_SIZE - 17) < (ctx->len % AVB_SHA512_BLOCK_SIZE));
+
+  len_b = (ctx->tot_len + ctx->len) << 3;
+  pm_len = block_nb << 7;
+
+  avb_memset(ctx->block + ctx->len, 0, pm_len - ctx->len);
+  ctx->block[ctx->len] = 0x80;
+  UNPACK32(len_b, ctx->block + pm_len - 4);
+
+  SHA512_transform(ctx, ctx->block, block_nb);
+
+#ifdef UNROLL_LOOPS_SHA512
+  UNPACK64(ctx->h[0], &ctx->buf[0]);
+  UNPACK64(ctx->h[1], &ctx->buf[8]);
+  UNPACK64(ctx->h[2], &ctx->buf[16]);
+  UNPACK64(ctx->h[3], &ctx->buf[24]);
+  UNPACK64(ctx->h[4], &ctx->buf[32]);
+  UNPACK64(ctx->h[5], &ctx->buf[40]);
+  UNPACK64(ctx->h[6], &ctx->buf[48]);
+  UNPACK64(ctx->h[7], &ctx->buf[56]);
+#else
+  for (i = 0; i < 8; i++)
+    UNPACK64(ctx->h[i], &ctx->buf[i << 3]);
+#endif /* UNROLL_LOOPS_SHA512 */
+
+  return ctx->buf;
+}
diff --git a/lib/avb/libavb/avb_slot_verify.c b/lib/avb/libavb/avb_slot_verify.c
new file mode 100644
index 0000000000..972fda0e9c
--- /dev/null
+++ b/lib/avb/libavb/avb_slot_verify.c
@@ -0,0 +1,1155 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_slot_verify.h>
+#include <android_avb/avb_chain_partition_descriptor.h>
+#include <android_avb/avb_cmdline.h>
+#include <android_avb/avb_footer.h>
+#include <android_avb/avb_hash_descriptor.h>
+#include <android_avb/avb_kernel_cmdline_descriptor.h>
+#include <android_avb/avb_sha.h>
+#include <android_avb/avb_util.h>
+#include <android_avb/avb_vbmeta_image.h>
+#include <android_avb/avb_version.h>
+
+/* Maximum number of partitions that can be loaded with avb_slot_verify(). */
+#define MAX_NUMBER_OF_LOADED_PARTITIONS 32
+
+/* Maximum number of vbmeta images that can be loaded with avb_slot_verify(). */
+#define MAX_NUMBER_OF_VBMETA_IMAGES 32
+
+/* Maximum size of a vbmeta image - 64 KiB. */
+#define VBMETA_MAX_SIZE (64 * 1024)
+
+/* Helper function to see if we should continue with verification in
+ * allow_verification_error=true mode if something goes wrong. See the
+ * comments for the avb_slot_verify() function for more information.
+ */
+static inline bool result_should_continue(AvbSlotVerifyResult result) {
+  switch (result) {
+    case AVB_SLOT_VERIFY_RESULT_ERROR_OOM:
+    case AVB_SLOT_VERIFY_RESULT_ERROR_IO:
+    case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA:
+    case AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION:
+    case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT:
+      return false;
+
+    case AVB_SLOT_VERIFY_RESULT_OK:
+    case AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION:
+    case AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX:
+    case AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED:
+      return true;
+  }
+
+  return false;
+}
+
+static AvbSlotVerifyResult load_full_partition(
+    AvbOps* ops, const char* part_name,
+    uint64_t image_size, uint8_t** out_image_buf,
+    bool* out_image_preloaded) {
+  size_t part_num_read;
+  AvbIOResult io_ret;
+
+  /* Make sure that we do not overwrite existing data. */
+  avb_assert(*out_image_buf == NULL);
+  avb_assert(!*out_image_preloaded);
+
+  /* We are going to implicitly cast image_size from uint64_t to size_t in the
+   * following code, so we need to make sure that the cast is safe. */
+  if (image_size != (size_t)(image_size)) {
+    avb_errorv(part_name, ": Partition size too large to load.\n", NULL);
+    return AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+  }
+
+  /* Try use a preloaded one. */
+  if (ops->get_preloaded_partition != NULL) {
+    io_ret = ops->get_preloaded_partition(
+        ops, part_name, image_size, out_image_buf, &part_num_read);
+    if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+      return AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    } else if (io_ret != AVB_IO_RESULT_OK) {
+      avb_errorv(part_name, ": Error loading data from partition.\n", NULL);
+      return AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+    }
+
+    if (*out_image_buf != NULL) {
+      if (part_num_read != image_size) {
+        avb_errorv(part_name, ": Read incorrect number of bytes.\n", NULL);
+        return AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+      }
+      *out_image_preloaded = true;
+    }
+  }
+
+  /* Allocate and copy the partition. */
+  if (!*out_image_preloaded) {
+    *out_image_buf = avb_malloc(image_size);
+    if (*out_image_buf == NULL) {
+      return AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    }
+
+    io_ret = ops->read_from_partition(
+        ops, part_name, 0 /* offset */, image_size, *out_image_buf,
+        &part_num_read);
+    if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+      return AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    } else if (io_ret != AVB_IO_RESULT_OK) {
+      avb_errorv(part_name, ": Error loading data from partition.\n", NULL);
+      return AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+    }
+    if (part_num_read != image_size) {
+      avb_errorv(part_name, ": Read incorrect number of bytes.\n", NULL);
+      return AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+    }
+  }
+
+  return AVB_SLOT_VERIFY_RESULT_OK;
+}
+
+static AvbSlotVerifyResult load_and_verify_hash_partition(
+    AvbOps* ops,
+    const char* const* requested_partitions,
+    const char* ab_suffix,
+    bool allow_verification_error,
+    const AvbDescriptor* descriptor,
+    AvbSlotVerifyData* slot_data) {
+  AvbHashDescriptor hash_desc;
+  const uint8_t* desc_partition_name = NULL;
+  const uint8_t* desc_salt;
+  const uint8_t* desc_digest;
+  char part_name[AVB_PART_NAME_MAX_SIZE];
+  AvbSlotVerifyResult ret;
+  AvbIOResult io_ret;
+  uint8_t* image_buf = NULL;
+  bool image_preloaded = false;
+  uint8_t* digest;
+  size_t digest_len;
+  const char* found;
+  uint64_t image_size = 0;
+
+  if (!avb_hash_descriptor_validate_and_byteswap(
+          (const AvbHashDescriptor*)descriptor, &hash_desc)) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+    goto out;
+  }
+
+  desc_partition_name =
+      ((const uint8_t*)descriptor) + sizeof(AvbHashDescriptor);
+  desc_salt = desc_partition_name + hash_desc.partition_name_len;
+  desc_digest = desc_salt + hash_desc.salt_len;
+
+  if (!avb_validate_utf8(desc_partition_name, hash_desc.partition_name_len)) {
+    avb_error("Partition name is not valid UTF-8.\n");
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+    goto out;
+  }
+
+  /* Don't bother loading or validating unless the partition was
+   * requested in the first place.
+   */
+  found = avb_strv_find_str(requested_partitions,
+                            (const char*)desc_partition_name,
+                            hash_desc.partition_name_len);
+  if (found == NULL) {
+    ret = AVB_SLOT_VERIFY_RESULT_OK;
+    goto out;
+  }
+
+  if (!avb_str_concat(part_name,
+                      sizeof part_name,
+                      (const char*)desc_partition_name,
+                      hash_desc.partition_name_len,
+                      ab_suffix,
+                      avb_strlen(ab_suffix))) {
+    avb_error("Partition name and suffix does not fit.\n");
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+    goto out;
+  }
+
+  /* If we're allowing verification errors then hash_desc.image_size
+   * may no longer match what's in the partition... so in this case
+   * just load the entire partition.
+   *
+   * For example, this can happen if a developer does 'fastboot flash
+   * boot /path/to/new/and/bigger/boot.img'. We want this to work
+   * since it's such a common workflow.
+   */
+  image_size = hash_desc.image_size;
+  if (0) {
+    if (ops->get_size_of_partition == NULL) {
+      avb_errorv(part_name,
+                 ": The get_size_of_partition() operation is "
+                 "not implemented so we may not load the entire partition. "
+                 "Please implement.",
+                 NULL);
+    } else {
+      io_ret = ops->get_size_of_partition(ops, part_name, &image_size);
+      if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+        ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+        goto out;
+      } else if (io_ret != AVB_IO_RESULT_OK) {
+        avb_errorv(part_name, ": Error determining partition size.\n", NULL);
+        ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+        goto out;
+      }
+      avb_debugv(part_name, ": Loading entire partition.\n", NULL);
+    }
+  }
+
+  ret = load_full_partition(
+      ops, part_name, image_size, &image_buf, &image_preloaded);
+  if (ret != AVB_SLOT_VERIFY_RESULT_OK) {
+    goto out;
+  }
+
+  if (avb_strcmp((const char*)hash_desc.hash_algorithm, "sha256") == 0) {
+    AvbSHA256Ctx sha256_ctx;
+    avb_sha256_init(&sha256_ctx);
+    avb_sha256_update(&sha256_ctx, desc_salt, hash_desc.salt_len);
+    avb_sha256_update(&sha256_ctx, image_buf, hash_desc.image_size);
+    digest = avb_sha256_final(&sha256_ctx);
+    digest_len = AVB_SHA256_DIGEST_SIZE;
+  } else if (avb_strcmp((const char*)hash_desc.hash_algorithm, "sha512") == 0) {
+    AvbSHA512Ctx sha512_ctx;
+    avb_sha512_init(&sha512_ctx);
+    avb_sha512_update(&sha512_ctx, desc_salt, hash_desc.salt_len);
+    avb_sha512_update(&sha512_ctx, image_buf, hash_desc.image_size);
+    digest = avb_sha512_final(&sha512_ctx);
+    digest_len = AVB_SHA512_DIGEST_SIZE;
+  } else {
+    avb_errorv(part_name, ": Unsupported hash algorithm.\n", NULL);
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+    goto out;
+  }
+
+  if (digest_len != hash_desc.digest_len) {
+    avb_errorv(
+        part_name, ": Digest in descriptor not of expected size.\n", NULL);
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+    goto out;
+  }
+
+  if (avb_safe_memcmp(digest, desc_digest, digest_len) != 0) {
+    avb_errorv(part_name,
+               ": Hash of data does not match digest in descriptor.\n",
+               NULL);
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION;
+    goto out;
+  }
+
+  ret = AVB_SLOT_VERIFY_RESULT_OK;
+
+out:
+
+  /* If it worked and something was loaded, copy to slot_data. */
+  if ((ret == AVB_SLOT_VERIFY_RESULT_OK || result_should_continue(ret)) &&
+      image_buf != NULL) {
+    AvbPartitionData* loaded_partition;
+    if (slot_data->num_loaded_partitions == MAX_NUMBER_OF_LOADED_PARTITIONS) {
+      avb_errorv(part_name, ": Too many loaded partitions.\n", NULL);
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+      goto fail;
+    }
+    loaded_partition =
+        &slot_data->loaded_partitions[slot_data->num_loaded_partitions++];
+    loaded_partition->partition_name = avb_strdup(found);
+    loaded_partition->data_size = image_size;
+    loaded_partition->data = image_buf;
+    loaded_partition->preloaded = image_preloaded;
+    image_buf = NULL;
+  }
+
+fail:
+  if (image_buf != NULL && !image_preloaded) {
+    avb_free(image_buf);
+  }
+  return ret;
+}
+
+static AvbSlotVerifyResult load_requested_partitions(
+    AvbOps* ops,
+    const char* const* requested_partitions,
+    const char* ab_suffix,
+    AvbSlotVerifyData* slot_data) {
+  AvbSlotVerifyResult ret;
+  uint8_t* image_buf = NULL;
+  bool image_preloaded = false;
+  size_t n;
+
+  if (ops->get_size_of_partition == NULL) {
+    avb_error("get_size_of_partition() not implemented.\n");
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT;
+    goto out;
+  }
+
+  for (n = 0; requested_partitions[n] != NULL; n++) {
+    char part_name[AVB_PART_NAME_MAX_SIZE];
+    AvbIOResult io_ret;
+    uint64_t image_size;
+    AvbPartitionData* loaded_partition;
+
+    if (!avb_str_concat(part_name,
+                        sizeof part_name,
+                        requested_partitions[n],
+                        avb_strlen(requested_partitions[n]),
+                        ab_suffix,
+                        avb_strlen(ab_suffix))) {
+      avb_error("Partition name and suffix does not fit.\n");
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+      goto out;
+    }
+
+    io_ret = ops->get_size_of_partition(ops, part_name, &image_size);
+    if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+      goto out;
+    } else if (io_ret != AVB_IO_RESULT_OK) {
+      avb_errorv(part_name, ": Error determining partition size.\n", NULL);
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+      goto out;
+    }
+    avb_debugv(part_name, ": Loading entire partition.\n", NULL);
+
+    ret = load_full_partition(
+        ops, part_name, image_size, &image_buf, &image_preloaded);
+    if (ret != AVB_SLOT_VERIFY_RESULT_OK) {
+      goto out;
+    }
+
+    /* Move to slot_data. */
+    if (slot_data->num_loaded_partitions == MAX_NUMBER_OF_LOADED_PARTITIONS) {
+      avb_errorv(part_name, ": Too many loaded partitions.\n", NULL);
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+      goto out;
+    }
+    loaded_partition =
+        &slot_data->loaded_partitions[slot_data->num_loaded_partitions++];
+    loaded_partition->partition_name = avb_strdup(requested_partitions[n]);
+    if (loaded_partition->partition_name == NULL) {
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+      goto out;
+    }
+    loaded_partition->data_size = image_size;
+    loaded_partition->data = image_buf;  /* Transferring the owner. */
+    loaded_partition->preloaded = image_preloaded;
+    image_buf = NULL;
+    image_preloaded = false;
+  }
+
+  ret = AVB_SLOT_VERIFY_RESULT_OK;
+
+out:
+  /* Free the current buffer if any. */
+  if (image_buf != NULL && !image_preloaded) {
+    avb_free(image_buf);
+  }
+  /* Buffers that are already saved in slot_data will be handled by the caller
+   * even on failure. */
+  return ret;
+}
+
+static AvbSlotVerifyResult load_and_verify_vbmeta(
+    AvbOps* ops,
+    const char* const* requested_partitions,
+    const char* ab_suffix,
+    bool allow_verification_error,
+    AvbVBMetaImageFlags toplevel_vbmeta_flags,
+    int rollback_index_location,
+    const char* partition_name,
+    size_t partition_name_len,
+    const uint8_t* expected_public_key,
+    size_t expected_public_key_length,
+    AvbSlotVerifyData* slot_data,
+    AvbAlgorithmType* out_algorithm_type) {
+  char full_partition_name[AVB_PART_NAME_MAX_SIZE];
+  AvbSlotVerifyResult ret;
+  AvbIOResult io_ret;
+  size_t vbmeta_offset;
+  size_t vbmeta_size;
+  uint8_t* vbmeta_buf = NULL;
+  size_t vbmeta_num_read;
+  AvbVBMetaVerifyResult vbmeta_ret;
+  const uint8_t* pk_data;
+  size_t pk_len;
+  AvbVBMetaImageHeader vbmeta_header;
+  uint64_t stored_rollback_index;
+  const AvbDescriptor** descriptors = NULL;
+  size_t num_descriptors;
+  size_t n;
+  bool is_main_vbmeta;
+  bool is_vbmeta_partition;
+  AvbVBMetaData* vbmeta_image_data = NULL;
+
+  ret = AVB_SLOT_VERIFY_RESULT_OK;
+
+  avb_assert(slot_data != NULL);
+
+  /* Since we allow top-level vbmeta in 'boot', use
+   * rollback_index_location to determine whether we're the main
+   * vbmeta struct.
+   */
+  is_main_vbmeta = (rollback_index_location == 0);
+  is_vbmeta_partition = (avb_strcmp(partition_name, "vbmeta") == 0);
+
+  if (!avb_validate_utf8((const uint8_t*)partition_name, partition_name_len)) {
+    avb_error("Partition name is not valid UTF-8.\n");
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+    goto out;
+  }
+
+  /* Construct full partition name. */
+  if (!avb_str_concat(full_partition_name,
+                      sizeof full_partition_name,
+                      partition_name,
+                      partition_name_len,
+                      ab_suffix,
+                      avb_strlen(ab_suffix))) {
+    avb_error("Partition name and suffix does not fit.\n");
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+    goto out;
+  }
+
+  avb_debugv("Loading vbmeta struct from partition '",
+             full_partition_name,
+             "'.\n",
+             NULL);
+
+  /* If we're loading from the main vbmeta partition, the vbmeta
+   * struct is in the beginning. Otherwise we have to locate it via a
+   * footer.
+   */
+  if (is_vbmeta_partition) {
+    vbmeta_offset = 0;
+    vbmeta_size = VBMETA_MAX_SIZE;
+  } else {
+    uint8_t footer_buf[AVB_FOOTER_SIZE];
+    size_t footer_num_read;
+    AvbFooter footer;
+
+    io_ret = ops->read_from_partition(ops,
+                                      full_partition_name,
+                                      -AVB_FOOTER_SIZE,
+                                      AVB_FOOTER_SIZE,
+                                      footer_buf,
+                                      &footer_num_read);
+    if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+      goto out;
+    } else if (io_ret != AVB_IO_RESULT_OK) {
+      avb_errorv(full_partition_name, ": Error loading footer.\n", NULL);
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+      goto out;
+    }
+    avb_assert(footer_num_read == AVB_FOOTER_SIZE);
+
+    if (!avb_footer_validate_and_byteswap((const AvbFooter*)footer_buf,
+                                          &footer)) {
+      avb_errorv(full_partition_name, ": Error validating footer.\n", NULL);
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+      goto out;
+    }
+
+    /* Basic footer sanity check since the data is untrusted. */
+    if (footer.vbmeta_size > VBMETA_MAX_SIZE) {
+      avb_errorv(
+          full_partition_name, ": Invalid vbmeta size in footer.\n", NULL);
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+      goto out;
+    }
+
+    vbmeta_offset = footer.vbmeta_offset;
+    vbmeta_size = footer.vbmeta_size;
+  }
+
+  vbmeta_buf = avb_malloc(vbmeta_size);
+  if (vbmeta_buf == NULL) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto out;
+  }
+
+  io_ret = ops->read_from_partition(ops,
+                                    full_partition_name,
+                                    vbmeta_offset,
+                                    vbmeta_size,
+                                    vbmeta_buf,
+                                    &vbmeta_num_read);
+  if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto out;
+  } else if (io_ret != AVB_IO_RESULT_OK) {
+    /* If we're looking for 'vbmeta' but there is no such partition,
+     * go try to get it from the boot partition instead.
+     */
+    if (is_main_vbmeta && io_ret == AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION &&
+        is_vbmeta_partition) {
+      avb_debugv(full_partition_name,
+                 ": No such partition. Trying 'boot' instead.\n",
+                 NULL);
+      ret = load_and_verify_vbmeta(ops,
+                                   requested_partitions,
+                                   ab_suffix,
+                                   allow_verification_error,
+                                   0 /* toplevel_vbmeta_flags */,
+                                   0 /* rollback_index_location */,
+                                   "boot",
+                                   avb_strlen("boot"),
+                                   NULL /* expected_public_key */,
+                                   0 /* expected_public_key_length */,
+                                   slot_data,
+                                   out_algorithm_type);
+      goto out;
+    } else {
+      avb_errorv(full_partition_name, ": Error loading vbmeta data.\n", NULL);
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+      goto out;
+    }
+  }
+  avb_assert(vbmeta_num_read <= vbmeta_size);
+
+  /* Check if the image is properly signed and get the public key used
+   * to sign the image.
+   */
+  vbmeta_ret =
+      avb_vbmeta_image_verify(vbmeta_buf, vbmeta_num_read, &pk_data, &pk_len);
+  switch (vbmeta_ret) {
+    case AVB_VBMETA_VERIFY_RESULT_OK:
+      avb_assert(pk_data != NULL && pk_len > 0);
+      break;
+
+    case AVB_VBMETA_VERIFY_RESULT_OK_NOT_SIGNED:
+    case AVB_VBMETA_VERIFY_RESULT_HASH_MISMATCH:
+    case AVB_VBMETA_VERIFY_RESULT_SIGNATURE_MISMATCH:
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION;
+      avb_errorv(full_partition_name,
+                 ": Error verifying vbmeta image: ",
+                 avb_vbmeta_verify_result_to_string(vbmeta_ret),
+                 "\n",
+                 NULL);
+      if (!allow_verification_error) {
+        goto out;
+      }
+      break;
+
+    case AVB_VBMETA_VERIFY_RESULT_INVALID_VBMETA_HEADER:
+      /* No way to continue this case. */
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+      avb_errorv(full_partition_name,
+                 ": Error verifying vbmeta image: invalid vbmeta header\n",
+                 NULL);
+      goto out;
+
+    case AVB_VBMETA_VERIFY_RESULT_UNSUPPORTED_VERSION:
+      /* No way to continue this case. */
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION;
+      avb_errorv(full_partition_name,
+                 ": Error verifying vbmeta image: unsupported AVB version\n",
+                 NULL);
+      goto out;
+  }
+
+  /* Byteswap the header. */
+  avb_vbmeta_image_header_to_host_byte_order((AvbVBMetaImageHeader*)vbmeta_buf,
+                                             &vbmeta_header);
+
+  /* If we're the toplevel, assign flags so they'll be passed down. */
+  if (is_main_vbmeta) {
+    toplevel_vbmeta_flags = (AvbVBMetaImageFlags)vbmeta_header.flags;
+  } else {
+    if (vbmeta_header.flags != 0) {
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+      avb_errorv(full_partition_name,
+                 ": chained vbmeta image has non-zero flags\n",
+                 NULL);
+      goto out;
+    }
+  }
+
+  /* Check if key used to make signature matches what is expected. */
+  if (pk_data != NULL) {
+    if (expected_public_key != NULL) {
+      avb_assert(!is_main_vbmeta);
+      if (expected_public_key_length != pk_len ||
+          avb_safe_memcmp(expected_public_key, pk_data, pk_len) != 0) {
+        avb_errorv(full_partition_name,
+                   ": Public key used to sign data does not match key in chain "
+                   "partition descriptor.\n",
+                   NULL);
+        ret = AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED;
+        if (!allow_verification_error) {
+          goto out;
+        }
+      }
+    } else {
+      bool key_is_trusted = false;
+      const uint8_t* pk_metadata = NULL;
+      size_t pk_metadata_len = 0;
+
+      if (vbmeta_header.public_key_metadata_size > 0) {
+        pk_metadata = vbmeta_buf + sizeof(AvbVBMetaImageHeader) +
+                      vbmeta_header.authentication_data_block_size +
+                      vbmeta_header.public_key_metadata_offset;
+        pk_metadata_len = vbmeta_header.public_key_metadata_size;
+      }
+
+      avb_assert(is_main_vbmeta);
+      io_ret = ops->validate_vbmeta_public_key(
+          ops, pk_data, pk_len, pk_metadata, pk_metadata_len, &key_is_trusted);
+      if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+        ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+        goto out;
+      } else if (io_ret != AVB_IO_RESULT_OK) {
+        avb_errorv(full_partition_name,
+                   ": Error while checking public key used to sign data.\n",
+                   NULL);
+        ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+        goto out;
+      }
+      if (!key_is_trusted) {
+        avb_errorv(full_partition_name,
+                   ": Public key used to sign data rejected.\n",
+                   NULL);
+        ret = AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED;
+        if (!allow_verification_error) {
+          goto out;
+        }
+      }
+    }
+  }
+
+  /* Check rollback index. */
+  io_ret = ops->read_rollback_index(
+      ops, rollback_index_location, &stored_rollback_index);
+  if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto out;
+  } else if (io_ret != AVB_IO_RESULT_OK) {
+    avb_errorv(full_partition_name,
+               ": Error getting rollback index for location.\n",
+               NULL);
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+    goto out;
+  }
+  if (vbmeta_header.rollback_index < stored_rollback_index) {
+    avb_errorv(
+        full_partition_name,
+        ": Image rollback index is less than the stored rollback index.\n",
+        NULL);
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX;
+    if (!allow_verification_error) {
+      goto out;
+    }
+  }
+
+  /* Copy vbmeta to vbmeta_images before recursing. */
+  if (is_main_vbmeta) {
+    avb_assert(slot_data->num_vbmeta_images == 0);
+  } else {
+    avb_assert(slot_data->num_vbmeta_images > 0);
+  }
+  if (slot_data->num_vbmeta_images == MAX_NUMBER_OF_VBMETA_IMAGES) {
+    avb_errorv(full_partition_name, ": Too many vbmeta images.\n", NULL);
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto out;
+  }
+  vbmeta_image_data = &slot_data->vbmeta_images[slot_data->num_vbmeta_images++];
+  vbmeta_image_data->partition_name = avb_strdup(partition_name);
+  vbmeta_image_data->vbmeta_data = vbmeta_buf;
+  /* Note that |vbmeta_buf| is actually |vbmeta_num_read| bytes long
+   * and this includes data past the end of the image. Pass the
+   * actual size of the vbmeta image. Also, no need to use
+   * avb_safe_add() since the header has already been verified.
+   */
+  vbmeta_image_data->vbmeta_size =
+      sizeof(AvbVBMetaImageHeader) +
+      vbmeta_header.authentication_data_block_size +
+      vbmeta_header.auxiliary_data_block_size;
+  vbmeta_image_data->verify_result = vbmeta_ret;
+
+  /* If verification has been disabled by setting a bit in the image,
+   * we're done... except that we need to load the entirety of the
+   * requested partitions.
+   */
+  if (vbmeta_header.flags & AVB_VBMETA_IMAGE_FLAGS_VERIFICATION_DISABLED) {
+    AvbSlotVerifyResult sub_ret;
+    avb_debugv(
+        full_partition_name, ": VERIFICATION_DISABLED bit is set.\n", NULL);
+    /* If load_requested_partitions() fail it is always a fatal
+     * failure (e.g. ERROR_INVALID_ARGUMENT, ERROR_OOM, etc.) rather
+     * than recoverable (e.g. one where result_should_continue()
+     * returns true) and we want to convey that error.
+     */
+    sub_ret = load_requested_partitions(
+        ops, requested_partitions, ab_suffix, slot_data);
+    if (sub_ret != AVB_SLOT_VERIFY_RESULT_OK) {
+      ret = sub_ret;
+    }
+    goto out;
+  }
+
+  /* Now go through all descriptors and take the appropriate action:
+   *
+   * - hash descriptor: Load data from partition, calculate hash, and
+   *   checks that it matches what's in the hash descriptor.
+   *
+   * - hashtree descriptor: Do nothing since verification happens
+   *   on-the-fly from within the OS.
+   *
+   * - chained partition descriptor: Load the footer, load the vbmeta
+   *   image, verify vbmeta image (includes rollback checks, hash
+   *   checks, bail on chained partitions).
+   */
+  descriptors =
+      avb_descriptor_get_all(vbmeta_buf, vbmeta_num_read, &num_descriptors);
+  for (n = 0; n < num_descriptors; n++) {
+    AvbDescriptor desc;
+
+    if (!avb_descriptor_validate_and_byteswap(descriptors[n], &desc)) {
+      avb_errorv(full_partition_name, ": Descriptor is invalid.\n", NULL);
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+      goto out;
+    }
+
+    switch (desc.tag) {
+      case AVB_DESCRIPTOR_TAG_HASH: {
+        AvbSlotVerifyResult sub_ret;
+        sub_ret = load_and_verify_hash_partition(ops,
+                                                 requested_partitions,
+                                                 ab_suffix,
+                                                 allow_verification_error,
+                                                 descriptors[n],
+                                                 slot_data);
+        if (sub_ret != AVB_SLOT_VERIFY_RESULT_OK) {
+          ret = sub_ret;
+          if (!allow_verification_error || !result_should_continue(ret)) {
+            goto out;
+          }
+        }
+      } break;
+
+      case AVB_DESCRIPTOR_TAG_CHAIN_PARTITION: {
+        AvbSlotVerifyResult sub_ret;
+        AvbChainPartitionDescriptor chain_desc;
+        const uint8_t* chain_partition_name;
+        const uint8_t* chain_public_key;
+
+        /* Only allow CHAIN_PARTITION descriptors in the main vbmeta image. */
+        if (!is_main_vbmeta) {
+          avb_errorv(full_partition_name,
+                     ": Encountered chain descriptor not in main image.\n",
+                     NULL);
+          ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+          goto out;
+        }
+
+        if (!avb_chain_partition_descriptor_validate_and_byteswap(
+                (AvbChainPartitionDescriptor*)descriptors[n], &chain_desc)) {
+          avb_errorv(full_partition_name,
+                     ": Chain partition descriptor is invalid.\n",
+                     NULL);
+          ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+          goto out;
+        }
+
+        if (chain_desc.rollback_index_location == 0) {
+          avb_errorv(full_partition_name,
+                     ": Chain partition has invalid "
+                     "rollback_index_location field.\n",
+                     NULL);
+          ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+          goto out;
+        }
+
+        chain_partition_name = ((const uint8_t*)descriptors[n]) +
+                               sizeof(AvbChainPartitionDescriptor);
+        chain_public_key = chain_partition_name + chain_desc.partition_name_len;
+
+        sub_ret = load_and_verify_vbmeta(ops,
+                                         requested_partitions,
+                                         ab_suffix,
+                                         allow_verification_error,
+                                         toplevel_vbmeta_flags,
+                                         chain_desc.rollback_index_location,
+                                         (const char*)chain_partition_name,
+                                         chain_desc.partition_name_len,
+                                         chain_public_key,
+                                         chain_desc.public_key_len,
+                                         slot_data,
+                                         NULL /* out_algorithm_type */);
+        if (sub_ret != AVB_SLOT_VERIFY_RESULT_OK) {
+          ret = sub_ret;
+          if (!result_should_continue(ret)) {
+            goto out;
+          }
+        }
+      } break;
+
+      case AVB_DESCRIPTOR_TAG_KERNEL_CMDLINE: {
+        const uint8_t* kernel_cmdline;
+        AvbKernelCmdlineDescriptor kernel_cmdline_desc;
+        bool apply_cmdline;
+
+        if (!avb_kernel_cmdline_descriptor_validate_and_byteswap(
+                (AvbKernelCmdlineDescriptor*)descriptors[n],
+                &kernel_cmdline_desc)) {
+          avb_errorv(full_partition_name,
+                     ": Kernel cmdline descriptor is invalid.\n",
+                     NULL);
+          ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+          goto out;
+        }
+
+        kernel_cmdline = ((const uint8_t*)descriptors[n]) +
+                         sizeof(AvbKernelCmdlineDescriptor);
+
+        if (!avb_validate_utf8(kernel_cmdline,
+                               kernel_cmdline_desc.kernel_cmdline_length)) {
+          avb_errorv(full_partition_name,
+                     ": Kernel cmdline is not valid UTF-8.\n",
+                     NULL);
+          ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+          goto out;
+        }
+
+        /* Compare the flags for top-level VBMeta struct with flags in
+         * the command-line descriptor so command-line snippets only
+         * intended for a certain mode (dm-verity enabled/disabled)
+         * are skipped if applicable.
+         */
+        apply_cmdline = true;
+        if (toplevel_vbmeta_flags & AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED) {
+          if (kernel_cmdline_desc.flags &
+              AVB_KERNEL_CMDLINE_FLAGS_USE_ONLY_IF_HASHTREE_NOT_DISABLED) {
+            apply_cmdline = false;
+          }
+        } else {
+          if (kernel_cmdline_desc.flags &
+              AVB_KERNEL_CMDLINE_FLAGS_USE_ONLY_IF_HASHTREE_DISABLED) {
+            apply_cmdline = false;
+          }
+        }
+
+        if (apply_cmdline) {
+          if (slot_data->cmdline == NULL) {
+            slot_data->cmdline =
+                avb_calloc(kernel_cmdline_desc.kernel_cmdline_length + 1);
+            if (slot_data->cmdline == NULL) {
+              ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+              goto out;
+            }
+            avb_memcpy(slot_data->cmdline,
+                       kernel_cmdline,
+                       kernel_cmdline_desc.kernel_cmdline_length);
+          } else {
+            /* new cmdline is: <existing_cmdline> + ' ' + <newcmdline> + '\0' */
+            size_t orig_size = avb_strlen(slot_data->cmdline);
+            size_t new_size =
+                orig_size + 1 + kernel_cmdline_desc.kernel_cmdline_length + 1;
+            char* new_cmdline = avb_calloc(new_size);
+            if (new_cmdline == NULL) {
+              ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+              goto out;
+            }
+            avb_memcpy(new_cmdline, slot_data->cmdline, orig_size);
+            new_cmdline[orig_size] = ' ';
+            avb_memcpy(new_cmdline + orig_size + 1,
+                       kernel_cmdline,
+                       kernel_cmdline_desc.kernel_cmdline_length);
+            avb_free(slot_data->cmdline);
+            slot_data->cmdline = new_cmdline;
+          }
+        }
+      } break;
+
+      /* Explicit fall-through */
+      case AVB_DESCRIPTOR_TAG_PROPERTY:
+      case AVB_DESCRIPTOR_TAG_HASHTREE:
+        /* Do nothing. */
+        break;
+    }
+  }
+
+  if (rollback_index_location >= AVB_MAX_NUMBER_OF_ROLLBACK_INDEX_LOCATIONS) {
+    avb_errorv(
+        full_partition_name, ": Invalid rollback_index_location.\n", NULL);
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+    goto out;
+  }
+
+  slot_data->rollback_indexes[rollback_index_location] =
+      vbmeta_header.rollback_index;
+
+  if (out_algorithm_type != NULL) {
+    *out_algorithm_type = (AvbAlgorithmType)vbmeta_header.algorithm_type;
+  }
+
+out:
+  /* If |vbmeta_image_data| isn't NULL it means that it adopted
+   * |vbmeta_buf| so in that case don't free it here.
+   */
+  if (vbmeta_image_data == NULL) {
+    if (vbmeta_buf != NULL) {
+      avb_free(vbmeta_buf);
+    }
+  }
+  if (descriptors != NULL) {
+    avb_free(descriptors);
+  }
+  return ret;
+}
+
+AvbSlotVerifyResult avb_slot_verify(AvbOps* ops,
+                                    const char* const* requested_partitions,
+                                    const char* ab_suffix,
+                                    AvbSlotVerifyFlags flags,
+                                    AvbHashtreeErrorMode hashtree_error_mode,
+                                    AvbSlotVerifyData** out_data) {
+  AvbSlotVerifyResult ret;
+  AvbSlotVerifyData* slot_data = NULL;
+  AvbAlgorithmType algorithm_type = AVB_ALGORITHM_TYPE_NONE;
+  bool using_boot_for_vbmeta = false;
+  AvbVBMetaImageHeader toplevel_vbmeta;
+  bool allow_verification_error =
+      (flags & AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR);
+
+  /* Fail early if we're missing the AvbOps needed for slot verification.
+   *
+   * For now, handle get_size_of_partition() not being implemented. In
+   * a later release we may change that.
+   */
+  avb_assert(ops->read_is_device_unlocked != NULL);
+  avb_assert(ops->read_from_partition != NULL);
+  avb_assert(ops->validate_vbmeta_public_key != NULL);
+  avb_assert(ops->read_rollback_index != NULL);
+  avb_assert(ops->get_unique_guid_for_partition != NULL);
+
+  if (out_data != NULL) {
+    *out_data = NULL;
+  }
+
+  /* Allowing dm-verity errors defeats the purpose of verified boot so
+   * only allow this if set up to allow verification errors
+   * (e.g. typically only UNLOCKED mode).
+   */
+  if (hashtree_error_mode == AVB_HASHTREE_ERROR_MODE_LOGGING &&
+      !allow_verification_error) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT;
+    goto fail;
+  }
+
+  slot_data = avb_calloc(sizeof(AvbSlotVerifyData));
+  if (slot_data == NULL) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto fail;
+  }
+  slot_data->vbmeta_images =
+      avb_calloc(sizeof(AvbVBMetaData) * MAX_NUMBER_OF_VBMETA_IMAGES);
+  if (slot_data->vbmeta_images == NULL) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto fail;
+  }
+  slot_data->loaded_partitions =
+      avb_calloc(sizeof(AvbPartitionData) * MAX_NUMBER_OF_LOADED_PARTITIONS);
+  if (slot_data->loaded_partitions == NULL) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto fail;
+  }
+
+  ret = load_and_verify_vbmeta(ops,
+                               requested_partitions,
+                               ab_suffix,
+                               allow_verification_error,
+                               0 /* toplevel_vbmeta_flags */,
+                               0 /* rollback_index_location */,
+                               "vbmeta",
+                               avb_strlen("vbmeta"),
+                               NULL /* expected_public_key */,
+                               0 /* expected_public_key_length */,
+                               slot_data,
+                               &algorithm_type);
+  if (!allow_verification_error && ret != AVB_SLOT_VERIFY_RESULT_OK) {
+    goto fail;
+  }
+
+  /* If things check out, mangle the kernel command-line as needed. */
+  if (result_should_continue(ret)) {
+    if (avb_strcmp(slot_data->vbmeta_images[0].partition_name, "vbmeta") != 0) {
+      avb_assert(
+          avb_strcmp(slot_data->vbmeta_images[0].partition_name, "boot") == 0);
+      using_boot_for_vbmeta = true;
+    }
+
+    /* Byteswap top-level vbmeta header since we'll need it below. */
+    avb_vbmeta_image_header_to_host_byte_order(
+        (const AvbVBMetaImageHeader*)slot_data->vbmeta_images[0].vbmeta_data,
+        &toplevel_vbmeta);
+
+    /* Fill in |ab_suffix| field. */
+    slot_data->ab_suffix = avb_strdup(ab_suffix);
+    if (slot_data->ab_suffix == NULL) {
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+      goto fail;
+    }
+
+    /* If verification is disabled, we are done ... we specifically
+     * don't want to add any androidboot.* options since verification
+     * is disabled.
+     */
+    if (toplevel_vbmeta.flags & AVB_VBMETA_IMAGE_FLAGS_VERIFICATION_DISABLED) {
+      /* Since verification is disabled we didn't process any
+       * descriptors and thus there's no cmdline... so set root= such
+       * that the system partition is mounted.
+       */
+      avb_assert(slot_data->cmdline == NULL);
+      slot_data->cmdline =
+          avb_strdup("root=PARTUUID=$(ANDROID_SYSTEM_PARTUUID)");
+      if (slot_data->cmdline == NULL) {
+        ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+        goto fail;
+      }
+    } else {
+      /* Add options - any failure in avb_append_options() is either an
+       * I/O or OOM error.
+       */
+      AvbSlotVerifyResult sub_ret = avb_append_options(
+          ops, slot_data, &toplevel_vbmeta, algorithm_type,
+          hashtree_error_mode);
+      if (sub_ret != AVB_SLOT_VERIFY_RESULT_OK) {
+        ret = sub_ret;
+        goto fail;
+      }
+    }
+
+    /* Substitute $(ANDROID_SYSTEM_PARTUUID) and friends. */
+    if (slot_data->cmdline != NULL) {
+      char* new_cmdline;
+      new_cmdline = avb_sub_cmdline(
+          ops, slot_data->cmdline, ab_suffix, using_boot_for_vbmeta);
+      if (new_cmdline != slot_data->cmdline) {
+        if (new_cmdline == NULL) {
+          ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+          goto fail;
+        }
+        avb_free(slot_data->cmdline);
+        slot_data->cmdline = new_cmdline;
+      }
+    }
+
+    if (out_data != NULL) {
+      *out_data = slot_data;
+    } else {
+      avb_slot_verify_data_free(slot_data);
+    }
+  }
+
+  if (!allow_verification_error) {
+    avb_assert(ret == AVB_SLOT_VERIFY_RESULT_OK);
+  }
+
+  return ret;
+
+fail:
+  if (slot_data != NULL) {
+    avb_slot_verify_data_free(slot_data);
+  }
+  return ret;
+}
+
+void avb_slot_verify_data_free(AvbSlotVerifyData* data) {
+  if (data->ab_suffix != NULL) {
+    avb_free(data->ab_suffix);
+  }
+  if (data->cmdline != NULL) {
+    avb_free(data->cmdline);
+  }
+  if (data->vbmeta_images != NULL) {
+    size_t n;
+    for (n = 0; n < data->num_vbmeta_images; n++) {
+      AvbVBMetaData* vbmeta_image = &data->vbmeta_images[n];
+      if (vbmeta_image->partition_name != NULL) {
+        avb_free(vbmeta_image->partition_name);
+      }
+      if (vbmeta_image->vbmeta_data != NULL) {
+        avb_free(vbmeta_image->vbmeta_data);
+      }
+    }
+    avb_free(data->vbmeta_images);
+  }
+  if (data->loaded_partitions != NULL) {
+    size_t n;
+    for (n = 0; n < data->num_loaded_partitions; n++) {
+      AvbPartitionData* loaded_partition = &data->loaded_partitions[n];
+      if (loaded_partition->partition_name != NULL) {
+        avb_free(loaded_partition->partition_name);
+      }
+      if (loaded_partition->data != NULL && !loaded_partition->preloaded) {
+        avb_free(loaded_partition->data);
+      }
+    }
+    avb_free(data->loaded_partitions);
+  }
+  avb_free(data);
+}
+
+const char* avb_slot_verify_result_to_string(AvbSlotVerifyResult result) {
+  const char* ret = NULL;
+
+  switch (result) {
+    case AVB_SLOT_VERIFY_RESULT_OK:
+      ret = "OK";
+      break;
+    case AVB_SLOT_VERIFY_RESULT_ERROR_OOM:
+      ret = "ERROR_OOM";
+      break;
+    case AVB_SLOT_VERIFY_RESULT_ERROR_IO:
+      ret = "ERROR_IO";
+      break;
+    case AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION:
+      ret = "ERROR_VERIFICATION";
+      break;
+    case AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX:
+      ret = "ERROR_ROLLBACK_INDEX";
+      break;
+    case AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED:
+      ret = "ERROR_PUBLIC_KEY_REJECTED";
+      break;
+    case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA:
+      ret = "ERROR_INVALID_METADATA";
+      break;
+    case AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION:
+      ret = "ERROR_UNSUPPORTED_VERSION";
+      break;
+    case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT:
+      ret = "ERROR_INVALID_ARGUMENT";
+      break;
+      /* Do not add a 'default:' case here because of -Wswitch. */
+  }
+
+  if (ret == NULL) {
+    avb_error("Unknown AvbSlotVerifyResult value.\n");
+    ret = "(unknown)";
+  }
+
+  return ret;
+}
diff --git a/lib/avb/rk_libavb/avb_sysdeps_posix.c b/lib/avb/libavb/avb_sysdeps_posix.c
similarity index 91%
rename from lib/avb/rk_libavb/avb_sysdeps_posix.c
rename to lib/avb/libavb/avb_sysdeps_posix.c
index 562f9214be..9df018f7c8 100644
--- a/lib/avb/rk_libavb/avb_sysdeps_posix.c
+++ b/lib/avb/libavb/avb_sysdeps_posix.c
@@ -1,82 +1,87 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-//#include <bits/endian.h>
-#include <common.h>
-#include <stdarg.h>
-#include <stdlib.h>
-#include <malloc.h>
-#include <errno.h>
-#include <asm/io.h>
-
-#include <android_avb/avb_sysdeps.h>
-
-void abort(void);
-
-int avb_memcmp(const void* src1, const void* src2, size_t n) {
-  return memcmp(src1, src2, n);
-}
-
-void* avb_memcpy(void* dest, const void* src, size_t n) {
-  return memcpy(dest, src, n);
-}
-
-void* avb_memset(void* dest, const int c, size_t n) {
-  return memset(dest, c, n);
-}
-
-int avb_strcmp(const char* s1, const char* s2) {
-  return strcmp(s1, s2);
-}
-
-size_t avb_strlen(const char* str) {
-  return strlen(str);
-}
-
-void avb_abort(void) {
-  abort();
-}
-
-void avb_print(const char* message) {
-  fprintf(stderr, "%s", message);
-}
-
-void avb_printv(const char* message, ...) {
-  va_list ap;
-  const char* m;
-
-  va_start(ap, message);
-  for (m = message; m != NULL; m = va_arg(ap, const char*)) {
-    fprintf(stderr, "%s", m);
-  }
-  va_end(ap);
-}
-
-void* avb_malloc_(size_t size) {
-  return malloc(size);
-}
-
-void avb_free(void* ptr) {
-  free(ptr);
-}
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <common.h>
+#include <stdarg.h>
+#include <stdlib.h>
+#include <malloc.h>
+#include <errno.h>
+#include <asm/io.h>
+
+#include <android_avb/avb_sysdeps.h>
+
+void abort(void);
+
+int avb_memcmp(const void* src1, const void* src2, size_t n) {
+  return memcmp(src1, src2, n);
+}
+
+void* avb_memcpy(void* dest, const void* src, size_t n) {
+  return memcpy(dest, src, n);
+}
+
+void* avb_memset(void* dest, const int c, size_t n) {
+  return memset(dest, c, n);
+}
+
+int avb_strcmp(const char* s1, const char* s2) {
+  return strcmp(s1, s2);
+}
+
+size_t avb_strlen(const char* str) {
+  return strlen(str);
+}
+
+void avb_abort(void) {
+  abort();
+}
+
+void avb_print(const char* message) {
+  fprintf(stderr, "%s", message);
+}
+
+void avb_printv(const char* message, ...) {
+  va_list ap;
+  const char* m;
+
+  va_start(ap, message);
+  for (m = message; m != NULL; m = va_arg(ap, const char*)) {
+    fprintf(stderr, "%s", m);
+  }
+  va_end(ap);
+}
+
+void* avb_malloc_(size_t size) {
+  return malloc(size);
+}
+
+void avb_free(void* ptr) {
+  free(ptr);
+}
+
+uint32_t avb_div_by_10(uint64_t* dividend) {
+  uint32_t rem = (uint32_t)(*dividend % 10);
+  *dividend /= 10;
+  return rem;
+}
diff --git a/lib/avb/rk_libavb/avb_util.c b/lib/avb/libavb/avb_util.c
similarity index 95%
rename from lib/avb/rk_libavb/avb_util.c
rename to lib/avb/libavb/avb_util.c
index f18267a89e..434cb39e2b 100644
--- a/lib/avb/rk_libavb/avb_util.c
+++ b/lib/avb/libavb/avb_util.c
@@ -1,404 +1,403 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include <android_avb/avb_util.h>
-#include <malloc.h>
-#include <stdarg.h>
-
-uint32_t avb_be32toh(uint32_t in) {
-  uint8_t* d = (uint8_t*)&in;
-  uint32_t ret;
-  ret = ((uint32_t)d[0]) << 24;
-  ret |= ((uint32_t)d[1]) << 16;
-  ret |= ((uint32_t)d[2]) << 8;
-  ret |= ((uint32_t)d[3]);
-  return ret;
-}
-
-uint64_t avb_be64toh(uint64_t in) {
-  uint8_t* d = (uint8_t*)&in;
-  uint64_t ret;
-  ret = ((uint64_t)d[0]) << 56;
-  ret |= ((uint64_t)d[1]) << 48;
-  ret |= ((uint64_t)d[2]) << 40;
-  ret |= ((uint64_t)d[3]) << 32;
-  ret |= ((uint64_t)d[4]) << 24;
-  ret |= ((uint64_t)d[5]) << 16;
-  ret |= ((uint64_t)d[6]) << 8;
-  ret |= ((uint64_t)d[7]);
-  return ret;
-}
-
-/* Converts a 32-bit unsigned integer from host to big-endian byte order. */
-uint32_t avb_htobe32(uint32_t in) {
-  union {
-    uint32_t word;
-    uint8_t bytes[4];
-  } ret;
-  ret.bytes[0] = (in >> 24) & 0xff;
-  ret.bytes[1] = (in >> 16) & 0xff;
-  ret.bytes[2] = (in >> 8) & 0xff;
-  ret.bytes[3] = in & 0xff;
-  return ret.word;
-}
-
-/* Converts a 64-bit unsigned integer from host to big-endian byte order. */
-uint64_t avb_htobe64(uint64_t in) {
-  union {
-    uint64_t word;
-    uint8_t bytes[8];
-  } ret;
-  ret.bytes[0] = (in >> 56) & 0xff;
-  ret.bytes[1] = (in >> 48) & 0xff;
-  ret.bytes[2] = (in >> 40) & 0xff;
-  ret.bytes[3] = (in >> 32) & 0xff;
-  ret.bytes[4] = (in >> 24) & 0xff;
-  ret.bytes[5] = (in >> 16) & 0xff;
-  ret.bytes[6] = (in >> 8) & 0xff;
-  ret.bytes[7] = in & 0xff;
-  return ret.word;
-}
-
-int avb_safe_memcmp(const void* s1, const void* s2, size_t n) {
-  const unsigned char* us1 = s1;
-  const unsigned char* us2 = s2;
-  int result = 0;
-
-  if (0 == n) {
-    return 0;
-  }
-
-  /*
-   * Code snippet without data-dependent branch due to Nate Lawson
-   * (nate@root.org) of Root Labs.
-   */
-  while (n--) {
-    result |= *us1++ ^ *us2++;
-  }
-
-  return result != 0;
-}
-
-bool avb_safe_add_to(uint64_t* value, uint64_t value_to_add) {
-  uint64_t original_value;
-
-  avb_assert(value != NULL);
-
-  original_value = *value;
-
-  *value += value_to_add;
-  if (*value < original_value) {
-    avb_error("Overflow when adding values.\n");
-    return false;
-  }
-
-  return true;
-}
-
-bool avb_safe_add(uint64_t* out_result, uint64_t a, uint64_t b) {
-  uint64_t dummy;
-  if (out_result == NULL) {
-    out_result = &dummy;
-  }
-  *out_result = a;
-  return avb_safe_add_to(out_result, b);
-}
-
-bool avb_validate_utf8(const uint8_t* data, size_t num_bytes) {
-  size_t n;
-  unsigned int num_cc;
-
-  for (n = 0, num_cc = 0; n < num_bytes; n++) {
-    uint8_t c = data[n];
-
-    if (num_cc > 0) {
-      if ((c & (0x80 | 0x40)) == 0x80) {
-        /* 10xx xxxx */
-      } else {
-        goto fail;
-      }
-      num_cc--;
-    } else {
-      if (c < 0x80) {
-        num_cc = 0;
-      } else if ((c & (0x80 | 0x40 | 0x20)) == (0x80 | 0x40)) {
-        /* 110x xxxx */
-        num_cc = 1;
-      } else if ((c & (0x80 | 0x40 | 0x20 | 0x10)) == (0x80 | 0x40 | 0x20)) {
-        /* 1110 xxxx */
-        num_cc = 2;
-      } else if ((c & (0x80 | 0x40 | 0x20 | 0x10 | 0x08)) ==
-                 (0x80 | 0x40 | 0x20 | 0x10)) {
-        /* 1111 0xxx */
-        num_cc = 3;
-      } else {
-        goto fail;
-      }
-    }
-  }
-
-  if (num_cc != 0) {
-    goto fail;
-  }
-
-  return true;
-
-fail:
-  return false;
-}
-
-bool avb_str_concat(char* buf,
-                    size_t buf_size,
-                    const char* str1,
-                    size_t str1_len,
-                    const char* str2,
-                    size_t str2_len) {
-  uint64_t combined_len;
-
-  if (!avb_safe_add(&combined_len, str1_len, str2_len)) {
-    avb_error("Overflow when adding string sizes.\n");
-    return false;
-  }
-
-  if (combined_len > buf_size - 1) {
-    avb_error("Insufficient buffer space.\n");
-    return false;
-  }
-
-  avb_memcpy(buf, str1, str1_len);
-  avb_memcpy(buf + str1_len, str2, str2_len);
-  buf[combined_len] = '\0';
-
-  return true;
-}
-
-void* avb_malloc(size_t size) {
-  void* ret = avb_malloc_(size);
-  if (ret == NULL) {
-    avb_error("Failed to allocate memory.\n");
-    return NULL;
-  }
-  return ret;
-}
-
-void* avb_calloc(size_t size) {
-  void* ret = avb_malloc(size);
-  if (ret == NULL) {
-    return NULL;
-  }
-
-  avb_memset(ret, '\0', size);
-  return ret;
-}
-
-char* avb_strdup(const char* str) {
-  size_t len = avb_strlen(str);
-  char* ret = avb_malloc(len + 1);
-  if (ret == NULL) {
-    return NULL;
-  }
-
-  avb_memcpy(ret, str, len);
-  ret[len] = '\0';
-
-  return ret;
-}
-
-const char* avb_strstr(const char* haystack, const char* needle) {
-  size_t n, m;
-
-  /* Look through |haystack| and check if the first character of
-   * |needle| matches. If so, check the rest of |needle|.
-   */
-  for (n = 0; haystack[n] != '\0'; n++) {
-    if (haystack[n] != needle[0]) {
-      continue;
-    }
-
-    for (m = 1;; m++) {
-      if (needle[m] == '\0') {
-        return haystack + n;
-      }
-
-      if (haystack[n + m] != needle[m]) {
-        break;
-      }
-    }
-  }
-
-  return NULL;
-}
-
-const char* avb_strv_find_str(const char* const* strings,
-                              const char* str,
-                              size_t str_size) {
-  size_t n;
-  for (n = 0; strings[n] != NULL; n++) {
-    if (avb_strlen(strings[n]) == str_size &&
-        avb_memcmp(strings[n], str, str_size) == 0) {
-      return strings[n];
-    }
-  }
-  return NULL;
-}
-
-char* avb_replace(const char* str, const char* search, const char* replace) {
-  char* ret = NULL;
-  size_t ret_len = 0;
-  size_t search_len, replace_len;
-  const char* str_after_last_replace;
-
-  search_len = avb_strlen(search);
-  replace_len = avb_strlen(replace);
-
-  str_after_last_replace = str;
-  while (*str != '\0') {
-    const char* s;
-    size_t num_before;
-    size_t num_new;
-
-    s = avb_strstr(str, search);
-    if (s == NULL) {
-      break;
-    }
-
-    num_before = s - str;
-
-    if (ret == NULL) {
-      num_new = num_before + replace_len + 1;
-      ret = avb_malloc(num_new);
-      if (ret == NULL) {
-        goto out;
-      }
-      avb_memcpy(ret, str, num_before);
-      avb_memcpy(ret + num_before, replace, replace_len);
-      ret[num_new - 1] = '\0';
-      ret_len = num_new - 1;
-    } else {
-      char* new_str;
-      num_new = ret_len + num_before + replace_len + 1;
-      new_str = avb_malloc(num_new);
-      if (ret == NULL) {
-        goto out;
-      }
-      avb_memcpy(new_str, ret, ret_len);
-      avb_memcpy(new_str + ret_len, str, num_before);
-      avb_memcpy(new_str + ret_len + num_before, replace, replace_len);
-      new_str[num_new - 1] = '\0';
-      avb_free(ret);
-      ret = new_str;
-      ret_len = num_new - 1;
-    }
-
-    str = s + search_len;
-    str_after_last_replace = str;
-  }
-
-  if (ret == NULL) {
-    ret = avb_strdup(str_after_last_replace);
-    if (ret == NULL) {
-      goto out;
-    }
-  } else {
-    size_t num_remaining = avb_strlen(str_after_last_replace);
-    size_t num_new = ret_len + num_remaining + 1;
-    char* new_str = avb_malloc(num_new);
-    if (ret == NULL) {
-      goto out;
-    }
-    avb_memcpy(new_str, ret, ret_len);
-    avb_memcpy(new_str + ret_len, str_after_last_replace, num_remaining);
-    new_str[num_new - 1] = '\0';
-    avb_free(ret);
-    ret = new_str;
-    ret_len = num_new - 1;
-  }
-
-out:
-  return ret;
-}
-
-/* We only support a limited amount of strings in avb_strdupv(). */
-#define AVB_STRDUPV_MAX_NUM_STRINGS 32
-
-char* avb_strdupv(const char* str, ...) {
-  va_list ap;
-  const char* strings[AVB_STRDUPV_MAX_NUM_STRINGS];
-  size_t lengths[AVB_STRDUPV_MAX_NUM_STRINGS];
-  size_t num_strings, n;
-  uint64_t total_length;
-  char *ret = NULL, *dest;
-
-  num_strings = 0;
-  total_length = 0;
-  va_start(ap, str);
-  do {
-    size_t str_len = avb_strlen(str);
-    strings[num_strings] = str;
-    lengths[num_strings] = str_len;
-    if (!avb_safe_add_to(&total_length, str_len)) {
-      avb_fatal("Overflow while determining total length.\n");
-      break;
-    }
-    num_strings++;
-    if (num_strings == AVB_STRDUPV_MAX_NUM_STRINGS) {
-      avb_fatal("Too many strings passed.\n");
-      break;
-    }
-    str = va_arg(ap, const char*);
-  } while (str != NULL);
-  va_end(ap);
-
-  ret = avb_malloc(total_length + 1);
-  if (ret == NULL) {
-    goto out;
-  }
-
-  dest = ret;
-  for (n = 0; n < num_strings; n++) {
-    avb_memcpy(dest, strings[n], lengths[n]);
-    dest += lengths[n];
-  }
-  *dest = '\0';
-  avb_assert(dest == ret + total_length);
-
-out:
-  return ret;
-}
-
-const char* avb_basename(const char* str) {
-  int64_t n;
-  size_t len;
-
-  len = avb_strlen(str);
-  if (len >= 2) {
-    for (n = len - 2; n >= 0; n--) {
-      if (str[n] == '/') {
-        return str + n + 1;
-      }
-    }
-  }
-  return str;
-}
-
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_util.h>
+
+#include <stdarg.h>
+
+uint32_t avb_be32toh(uint32_t in) {
+  uint8_t* d = (uint8_t*)&in;
+  uint32_t ret;
+  ret = ((uint32_t)d[0]) << 24;
+  ret |= ((uint32_t)d[1]) << 16;
+  ret |= ((uint32_t)d[2]) << 8;
+  ret |= ((uint32_t)d[3]);
+  return ret;
+}
+
+uint64_t avb_be64toh(uint64_t in) {
+  uint8_t* d = (uint8_t*)&in;
+  uint64_t ret;
+  ret = ((uint64_t)d[0]) << 56;
+  ret |= ((uint64_t)d[1]) << 48;
+  ret |= ((uint64_t)d[2]) << 40;
+  ret |= ((uint64_t)d[3]) << 32;
+  ret |= ((uint64_t)d[4]) << 24;
+  ret |= ((uint64_t)d[5]) << 16;
+  ret |= ((uint64_t)d[6]) << 8;
+  ret |= ((uint64_t)d[7]);
+  return ret;
+}
+
+/* Converts a 32-bit unsigned integer from host to big-endian byte order. */
+uint32_t avb_htobe32(uint32_t in) {
+  union {
+    uint32_t word;
+    uint8_t bytes[4];
+  } ret;
+  ret.bytes[0] = (in >> 24) & 0xff;
+  ret.bytes[1] = (in >> 16) & 0xff;
+  ret.bytes[2] = (in >> 8) & 0xff;
+  ret.bytes[3] = in & 0xff;
+  return ret.word;
+}
+
+/* Converts a 64-bit unsigned integer from host to big-endian byte order. */
+uint64_t avb_htobe64(uint64_t in) {
+  union {
+    uint64_t word;
+    uint8_t bytes[8];
+  } ret;
+  ret.bytes[0] = (in >> 56) & 0xff;
+  ret.bytes[1] = (in >> 48) & 0xff;
+  ret.bytes[2] = (in >> 40) & 0xff;
+  ret.bytes[3] = (in >> 32) & 0xff;
+  ret.bytes[4] = (in >> 24) & 0xff;
+  ret.bytes[5] = (in >> 16) & 0xff;
+  ret.bytes[6] = (in >> 8) & 0xff;
+  ret.bytes[7] = in & 0xff;
+  return ret.word;
+}
+
+int avb_safe_memcmp(const void* s1, const void* s2, size_t n) {
+  const unsigned char* us1 = s1;
+  const unsigned char* us2 = s2;
+  int result = 0;
+
+  if (0 == n) {
+    return 0;
+  }
+
+  /*
+   * Code snippet without data-dependent branch due to Nate Lawson
+   * (nate@root.org) of Root Labs.
+   */
+  while (n--) {
+    result |= *us1++ ^ *us2++;
+  }
+
+  return result != 0;
+}
+
+bool avb_safe_add_to(uint64_t* value, uint64_t value_to_add) {
+  uint64_t original_value;
+
+  avb_assert(value != NULL);
+
+  original_value = *value;
+
+  *value += value_to_add;
+  if (*value < original_value) {
+    avb_error("Overflow when adding values.\n");
+    return false;
+  }
+
+  return true;
+}
+
+bool avb_safe_add(uint64_t* out_result, uint64_t a, uint64_t b) {
+  uint64_t dummy;
+  if (out_result == NULL) {
+    out_result = &dummy;
+  }
+  *out_result = a;
+  return avb_safe_add_to(out_result, b);
+}
+
+bool avb_validate_utf8(const uint8_t* data, size_t num_bytes) {
+  size_t n;
+  unsigned int num_cc;
+
+  for (n = 0, num_cc = 0; n < num_bytes; n++) {
+    uint8_t c = data[n];
+
+    if (num_cc > 0) {
+      if ((c & (0x80 | 0x40)) == 0x80) {
+        /* 10xx xxxx */
+      } else {
+        goto fail;
+      }
+      num_cc--;
+    } else {
+      if (c < 0x80) {
+        num_cc = 0;
+      } else if ((c & (0x80 | 0x40 | 0x20)) == (0x80 | 0x40)) {
+        /* 110x xxxx */
+        num_cc = 1;
+      } else if ((c & (0x80 | 0x40 | 0x20 | 0x10)) == (0x80 | 0x40 | 0x20)) {
+        /* 1110 xxxx */
+        num_cc = 2;
+      } else if ((c & (0x80 | 0x40 | 0x20 | 0x10 | 0x08)) ==
+                 (0x80 | 0x40 | 0x20 | 0x10)) {
+        /* 1111 0xxx */
+        num_cc = 3;
+      } else {
+        goto fail;
+      }
+    }
+  }
+
+  if (num_cc != 0) {
+    goto fail;
+  }
+
+  return true;
+
+fail:
+  return false;
+}
+
+bool avb_str_concat(char* buf,
+                    size_t buf_size,
+                    const char* str1,
+                    size_t str1_len,
+                    const char* str2,
+                    size_t str2_len) {
+  uint64_t combined_len;
+
+  if (!avb_safe_add(&combined_len, str1_len, str2_len)) {
+    avb_error("Overflow when adding string sizes.\n");
+    return false;
+  }
+
+  if (combined_len > buf_size - 1) {
+    avb_error("Insufficient buffer space.\n");
+    return false;
+  }
+
+  avb_memcpy(buf, str1, str1_len);
+  avb_memcpy(buf + str1_len, str2, str2_len);
+  buf[combined_len] = '\0';
+
+  return true;
+}
+
+void* avb_malloc(size_t size) {
+  void* ret = avb_malloc_(size);
+  if (ret == NULL) {
+    avb_error("Failed to allocate memory.\n");
+    return NULL;
+  }
+  return ret;
+}
+
+void* avb_calloc(size_t size) {
+  void* ret = avb_malloc(size);
+  if (ret == NULL) {
+    return NULL;
+  }
+
+  avb_memset(ret, '\0', size);
+  return ret;
+}
+
+char* avb_strdup(const char* str) {
+  size_t len = avb_strlen(str);
+  char* ret = avb_malloc(len + 1);
+  if (ret == NULL) {
+    return NULL;
+  }
+
+  avb_memcpy(ret, str, len);
+  ret[len] = '\0';
+
+  return ret;
+}
+
+const char* avb_strstr(const char* haystack, const char* needle) {
+  size_t n, m;
+
+  /* Look through |haystack| and check if the first character of
+   * |needle| matches. If so, check the rest of |needle|.
+   */
+  for (n = 0; haystack[n] != '\0'; n++) {
+    if (haystack[n] != needle[0]) {
+      continue;
+    }
+
+    for (m = 1;; m++) {
+      if (needle[m] == '\0') {
+        return haystack + n;
+      }
+
+      if (haystack[n + m] != needle[m]) {
+        break;
+      }
+    }
+  }
+
+  return NULL;
+}
+
+const char* avb_strv_find_str(const char* const* strings,
+                              const char* str,
+                              size_t str_size) {
+  size_t n;
+  for (n = 0; strings[n] != NULL; n++) {
+    if (avb_strlen(strings[n]) == str_size &&
+        avb_memcmp(strings[n], str, str_size) == 0) {
+      return strings[n];
+    }
+  }
+  return NULL;
+}
+
+char* avb_replace(const char* str, const char* search, const char* replace) {
+  char* ret = NULL;
+  size_t ret_len = 0;
+  size_t search_len, replace_len;
+  const char* str_after_last_replace;
+
+  search_len = avb_strlen(search);
+  replace_len = avb_strlen(replace);
+
+  str_after_last_replace = str;
+  while (*str != '\0') {
+    const char* s;
+    size_t num_before;
+    size_t num_new;
+
+    s = avb_strstr(str, search);
+    if (s == NULL) {
+      break;
+    }
+
+    num_before = s - str;
+
+    if (ret == NULL) {
+      num_new = num_before + replace_len + 1;
+      ret = avb_malloc(num_new);
+      if (ret == NULL) {
+        goto out;
+      }
+      avb_memcpy(ret, str, num_before);
+      avb_memcpy(ret + num_before, replace, replace_len);
+      ret[num_new - 1] = '\0';
+      ret_len = num_new - 1;
+    } else {
+      char* new_str;
+      num_new = ret_len + num_before + replace_len + 1;
+      new_str = avb_malloc(num_new);
+      if (new_str == NULL) {
+        goto out;
+      }
+      avb_memcpy(new_str, ret, ret_len);
+      avb_memcpy(new_str + ret_len, str, num_before);
+      avb_memcpy(new_str + ret_len + num_before, replace, replace_len);
+      new_str[num_new - 1] = '\0';
+      avb_free(ret);
+      ret = new_str;
+      ret_len = num_new - 1;
+    }
+
+    str = s + search_len;
+    str_after_last_replace = str;
+  }
+
+  if (ret == NULL) {
+    ret = avb_strdup(str_after_last_replace);
+    if (ret == NULL) {
+      goto out;
+    }
+  } else {
+    size_t num_remaining = avb_strlen(str_after_last_replace);
+    size_t num_new = ret_len + num_remaining + 1;
+    char* new_str = avb_malloc(num_new);
+    if (new_str == NULL) {
+      goto out;
+    }
+    avb_memcpy(new_str, ret, ret_len);
+    avb_memcpy(new_str + ret_len, str_after_last_replace, num_remaining);
+    new_str[num_new - 1] = '\0';
+    avb_free(ret);
+    ret = new_str;
+    ret_len = num_new - 1;
+  }
+
+out:
+  return ret;
+}
+
+/* We only support a limited amount of strings in avb_strdupv(). */
+#define AVB_STRDUPV_MAX_NUM_STRINGS 32
+
+char* avb_strdupv(const char* str, ...) {
+  va_list ap;
+  const char* strings[AVB_STRDUPV_MAX_NUM_STRINGS];
+  size_t lengths[AVB_STRDUPV_MAX_NUM_STRINGS];
+  size_t num_strings, n;
+  uint64_t total_length;
+  char *ret = NULL, *dest;
+
+  num_strings = 0;
+  total_length = 0;
+  va_start(ap, str);
+  do {
+    size_t str_len = avb_strlen(str);
+    strings[num_strings] = str;
+    lengths[num_strings] = str_len;
+    if (!avb_safe_add_to(&total_length, str_len)) {
+      avb_fatal("Overflow while determining total length.\n");
+      break;
+    }
+    num_strings++;
+    if (num_strings == AVB_STRDUPV_MAX_NUM_STRINGS) {
+      avb_fatal("Too many strings passed.\n");
+      break;
+    }
+    str = va_arg(ap, const char*);
+  } while (str != NULL);
+  va_end(ap);
+
+  ret = avb_malloc(total_length + 1);
+  if (ret == NULL) {
+    goto out;
+  }
+
+  dest = ret;
+  for (n = 0; n < num_strings; n++) {
+    avb_memcpy(dest, strings[n], lengths[n]);
+    dest += lengths[n];
+  }
+  *dest = '\0';
+  avb_assert(dest == ret + total_length);
+
+out:
+  return ret;
+}
+
+const char* avb_basename(const char* str) {
+  int64_t n;
+  size_t len;
+
+  len = avb_strlen(str);
+  if (len >= 2) {
+    for (n = len - 2; n >= 0; n--) {
+      if (str[n] == '/') {
+        return str + n + 1;
+      }
+    }
+  }
+  return str;
+}
diff --git a/lib/avb/libavb/avb_vbmeta_image.c b/lib/avb/libavb/avb_vbmeta_image.c
new file mode 100644
index 0000000000..3f6d33e90b
--- /dev/null
+++ b/lib/avb/libavb/avb_vbmeta_image.c
@@ -0,0 +1,308 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_vbmeta_image.h>
+#include <android_avb/avb_crypto.h>
+#include <android_avb/avb_rsa.h>
+#include <android_avb/avb_sha.h>
+#include <android_avb/avb_util.h>
+#include <android_avb/avb_version.h>
+
+AvbVBMetaVerifyResult avb_vbmeta_image_verify(
+    const uint8_t* data,
+    size_t length,
+    const uint8_t** out_public_key_data,
+    size_t* out_public_key_length) {
+  AvbVBMetaVerifyResult ret;
+  AvbVBMetaImageHeader h;
+  uint8_t* computed_hash;
+  const AvbAlgorithmData* algorithm;
+  AvbSHA256Ctx sha256_ctx;
+  AvbSHA512Ctx sha512_ctx;
+  const uint8_t* header_block;
+  const uint8_t* authentication_block;
+  const uint8_t* auxiliary_block;
+  int verification_result;
+
+  ret = AVB_VBMETA_VERIFY_RESULT_INVALID_VBMETA_HEADER;
+
+  if (out_public_key_data != NULL) {
+    *out_public_key_data = NULL;
+  }
+  if (out_public_key_length != NULL) {
+    *out_public_key_length = 0;
+  }
+
+  /* Ensure magic is correct. */
+  if (avb_safe_memcmp(data, AVB_MAGIC, AVB_MAGIC_LEN) != 0) {
+    avb_error("Magic is incorrect.\n");
+    goto out;
+  }
+
+  /* Before we byteswap, ensure length is long enough. */
+  if (length < sizeof(AvbVBMetaImageHeader)) {
+    avb_error("Length is smaller than header.\n");
+    goto out;
+  }
+  avb_vbmeta_image_header_to_host_byte_order((const AvbVBMetaImageHeader*)data,
+                                             &h);
+
+  /* Ensure we don't attempt to access any fields if we do not meet
+   * the specified minimum version of libavb.
+   */
+  if ((h.required_libavb_version_major != AVB_VERSION_MAJOR) ||
+      (h.required_libavb_version_minor > AVB_VERSION_MINOR)) {
+    avb_error("Mismatch between image version and libavb version.\n");
+    ret = AVB_VBMETA_VERIFY_RESULT_UNSUPPORTED_VERSION;
+    goto out;
+  }
+
+  /* Ensure |release_string| ends with a NUL byte. */
+  if (h.release_string[AVB_RELEASE_STRING_SIZE - 1] != '\0') {
+    avb_error("Release string does not end with a NUL byte.\n");
+    goto out;
+  }
+
+  /* Ensure inner block sizes are multiple of 64. */
+  if ((h.authentication_data_block_size & 0x3f) != 0 ||
+      (h.auxiliary_data_block_size & 0x3f) != 0) {
+    avb_error("Block size is not a multiple of 64.\n");
+    goto out;
+  }
+
+  /* Ensure block sizes all add up to at most |length|. */
+  uint64_t block_total = sizeof(AvbVBMetaImageHeader);
+  if (!avb_safe_add_to(&block_total, h.authentication_data_block_size) ||
+      !avb_safe_add_to(&block_total, h.auxiliary_data_block_size)) {
+    avb_error("Overflow while computing size of boot image.\n");
+    goto out;
+  }
+  if (block_total > length) {
+    avb_error("Block sizes add up to more than given length.\n");
+    goto out;
+  }
+
+  uintptr_t data_ptr = (uintptr_t)data;
+  /* Ensure passed in memory doesn't wrap. */
+  if (!avb_safe_add(NULL, (uint64_t)data_ptr, length)) {
+    avb_error("Boot image location and length mismatch.\n");
+    goto out;
+  }
+
+  /* Ensure hash and signature are entirely in the Authentication data block. */
+  uint64_t hash_end;
+  if (!avb_safe_add(&hash_end, h.hash_offset, h.hash_size) ||
+      hash_end > h.authentication_data_block_size) {
+    avb_error("Hash is not entirely in its block.\n");
+    goto out;
+  }
+  uint64_t signature_end;
+  if (!avb_safe_add(&signature_end, h.signature_offset, h.signature_size) ||
+      signature_end > h.authentication_data_block_size) {
+    avb_error("Signature is not entirely in its block.\n");
+    goto out;
+  }
+
+  /* Ensure public key is entirely in the Auxiliary data block. */
+  uint64_t pubkey_end;
+  if (!avb_safe_add(&pubkey_end, h.public_key_offset, h.public_key_size) ||
+      pubkey_end > h.auxiliary_data_block_size) {
+    avb_error("Public key is not entirely in its block.\n");
+    goto out;
+  }
+
+  /* Ensure public key metadata (if set) is entirely in the Auxiliary
+   * data block. */
+  if (h.public_key_metadata_size > 0) {
+    uint64_t pubkey_md_end;
+    if (!avb_safe_add(&pubkey_md_end,
+                      h.public_key_metadata_offset,
+                      h.public_key_metadata_size) ||
+        pubkey_md_end > h.auxiliary_data_block_size) {
+      avb_error("Public key metadata is not entirely in its block.\n");
+      goto out;
+    }
+  }
+
+  /* Bail early if there's no hash or signature. */
+  if (h.algorithm_type == AVB_ALGORITHM_TYPE_NONE) {
+    ret = AVB_VBMETA_VERIFY_RESULT_OK_NOT_SIGNED;
+    goto out;
+  }
+
+  /* Ensure algorithm field is supported. */
+  algorithm = avb_get_algorithm_data(h.algorithm_type);
+  if (!algorithm) {
+    avb_error("Invalid or unknown algorithm.\n");
+    goto out;
+  }
+
+  /* Bail if the embedded hash size doesn't match the chosen algorithm. */
+  if (h.hash_size != algorithm->hash_len) {
+    avb_error("Embedded hash has wrong size.\n");
+    goto out;
+  }
+
+  /* No overflow checks needed from here-on after since all block
+   * sizes and offsets have been verified above.
+   */
+
+  header_block = data;
+  authentication_block = header_block + sizeof(AvbVBMetaImageHeader);
+  auxiliary_block = authentication_block + h.authentication_data_block_size;
+
+  switch (h.algorithm_type) {
+    /* Explicit fall-through: */
+    case AVB_ALGORITHM_TYPE_SHA256_RSA2048:
+    case AVB_ALGORITHM_TYPE_SHA256_RSA4096:
+    case AVB_ALGORITHM_TYPE_SHA256_RSA8192:
+      avb_sha256_init(&sha256_ctx);
+      avb_sha256_update(
+          &sha256_ctx, header_block, sizeof(AvbVBMetaImageHeader));
+      avb_sha256_update(
+          &sha256_ctx, auxiliary_block, h.auxiliary_data_block_size);
+      computed_hash = avb_sha256_final(&sha256_ctx);
+      break;
+    /* Explicit fall-through: */
+    case AVB_ALGORITHM_TYPE_SHA512_RSA2048:
+    case AVB_ALGORITHM_TYPE_SHA512_RSA4096:
+    case AVB_ALGORITHM_TYPE_SHA512_RSA8192:
+      avb_sha512_init(&sha512_ctx);
+      avb_sha512_update(
+          &sha512_ctx, header_block, sizeof(AvbVBMetaImageHeader));
+      avb_sha512_update(
+          &sha512_ctx, auxiliary_block, h.auxiliary_data_block_size);
+      computed_hash = avb_sha512_final(&sha512_ctx);
+      break;
+    default:
+      avb_error("Unknown algorithm.\n");
+      goto out;
+  }
+
+  if (avb_safe_memcmp(authentication_block + h.hash_offset,
+                      computed_hash,
+                      h.hash_size) != 0) {
+    avb_error("Hash does not match!\n");
+    ret = AVB_VBMETA_VERIFY_RESULT_HASH_MISMATCH;
+    goto out;
+  }
+
+  verification_result =
+      avb_rsa_verify(auxiliary_block + h.public_key_offset,
+                     h.public_key_size,
+                     authentication_block + h.signature_offset,
+                     h.signature_size,
+                     authentication_block + h.hash_offset,
+                     h.hash_size,
+                     algorithm->padding,
+                     algorithm->padding_len);
+
+  if (verification_result == 0) {
+    ret = AVB_VBMETA_VERIFY_RESULT_SIGNATURE_MISMATCH;
+    goto out;
+  }
+
+  if (h.public_key_size > 0) {
+    if (out_public_key_data != NULL) {
+      *out_public_key_data = auxiliary_block + h.public_key_offset;
+    }
+    if (out_public_key_length != NULL) {
+      *out_public_key_length = h.public_key_size;
+    }
+  }
+
+  ret = AVB_VBMETA_VERIFY_RESULT_OK;
+
+out:
+  return ret;
+}
+
+void avb_vbmeta_image_header_to_host_byte_order(const AvbVBMetaImageHeader* src,
+                                                AvbVBMetaImageHeader* dest) {
+  avb_memcpy(dest, src, sizeof(AvbVBMetaImageHeader));
+
+  dest->required_libavb_version_major =
+      avb_be32toh(dest->required_libavb_version_major);
+  dest->required_libavb_version_minor =
+      avb_be32toh(dest->required_libavb_version_minor);
+
+  dest->authentication_data_block_size =
+      avb_be64toh(dest->authentication_data_block_size);
+  dest->auxiliary_data_block_size =
+      avb_be64toh(dest->auxiliary_data_block_size);
+
+  dest->algorithm_type = avb_be32toh(dest->algorithm_type);
+
+  dest->hash_offset = avb_be64toh(dest->hash_offset);
+  dest->hash_size = avb_be64toh(dest->hash_size);
+
+  dest->signature_offset = avb_be64toh(dest->signature_offset);
+  dest->signature_size = avb_be64toh(dest->signature_size);
+
+  dest->public_key_offset = avb_be64toh(dest->public_key_offset);
+  dest->public_key_size = avb_be64toh(dest->public_key_size);
+
+  dest->public_key_metadata_offset =
+      avb_be64toh(dest->public_key_metadata_offset);
+  dest->public_key_metadata_size = avb_be64toh(dest->public_key_metadata_size);
+
+  dest->descriptors_offset = avb_be64toh(dest->descriptors_offset);
+  dest->descriptors_size = avb_be64toh(dest->descriptors_size);
+
+  dest->rollback_index = avb_be64toh(dest->rollback_index);
+  dest->flags = avb_be32toh(dest->flags);
+}
+
+const char* avb_vbmeta_verify_result_to_string(AvbVBMetaVerifyResult result) {
+  const char* ret = NULL;
+
+  switch (result) {
+    case AVB_VBMETA_VERIFY_RESULT_OK:
+      ret = "OK";
+      break;
+    case AVB_VBMETA_VERIFY_RESULT_OK_NOT_SIGNED:
+      ret = "OK_NOT_SIGNED";
+      break;
+    case AVB_VBMETA_VERIFY_RESULT_INVALID_VBMETA_HEADER:
+      ret = "INVALID_VBMETA_HEADER";
+      break;
+    case AVB_VBMETA_VERIFY_RESULT_UNSUPPORTED_VERSION:
+      ret = "UNSUPPORTED_VERSION";
+      break;
+    case AVB_VBMETA_VERIFY_RESULT_HASH_MISMATCH:
+      ret = "HASH_MISMATCH";
+      break;
+    case AVB_VBMETA_VERIFY_RESULT_SIGNATURE_MISMATCH:
+      ret = "SIGNATURE_MISMATCH";
+      break;
+      /* Do not add a 'default:' case here because of -Wswitch. */
+  }
+
+  if (ret == NULL) {
+    avb_error("Unknown AvbVBMetaVerifyResult value.\n");
+    ret = "(unknown)";
+  }
+
+  return ret;
+}
diff --git a/lib/avb/rk_libavb/avb_version.c b/lib/avb/libavb/avb_version.c
similarity index 95%
rename from lib/avb/rk_libavb/avb_version.c
rename to lib/avb/libavb/avb_version.c
index 8137a7201a..915e3c8388 100644
--- a/lib/avb/rk_libavb/avb_version.c
+++ b/lib/avb/libavb/avb_version.c
@@ -1,34 +1,34 @@
-/*
- * Copyright (C) 2017 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include <android_avb/libavb.h>
-
-#define AVB_QUOTE(str) #str
-#define AVB_EXPAND_AND_QUOTE(str) AVB_QUOTE(str)
-
-/* Keep in sync with get_release_string() in avbtool. */
-const char* avb_version_string(void) {
-  return AVB_EXPAND_AND_QUOTE(AVB_VERSION_MAJOR) "." AVB_EXPAND_AND_QUOTE(
-      AVB_VERSION_MINOR) "." AVB_EXPAND_AND_QUOTE(AVB_VERSION_SUB);
-}
+/*
+ * Copyright (C) 2017 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_version.h>
+
+#define AVB_QUOTE(str) #str
+#define AVB_EXPAND_AND_QUOTE(str) AVB_QUOTE(str)
+
+/* Keep in sync with get_release_string() in avbtool. */
+const char* avb_version_string(void) {
+  return AVB_EXPAND_AND_QUOTE(AVB_VERSION_MAJOR) "." AVB_EXPAND_AND_QUOTE(
+      AVB_VERSION_MINOR) "." AVB_EXPAND_AND_QUOTE(AVB_VERSION_SUB);
+}
diff --git a/lib/avb/rk_libavb_ab/Kconfig b/lib/avb/libavb_ab/Kconfig
similarity index 100%
rename from lib/avb/rk_libavb_ab/Kconfig
rename to lib/avb/libavb_ab/Kconfig
diff --git a/lib/avb/rk_libavb_ab/Makefile b/lib/avb/libavb_ab/Makefile
similarity index 100%
rename from lib/avb/rk_libavb_ab/Makefile
rename to lib/avb/libavb_ab/Makefile
diff --git a/lib/avb/libavb_ab/avb_ab_flow.c b/lib/avb/libavb_ab/avb_ab_flow.c
new file mode 100644
index 0000000000..55f0a04065
--- /dev/null
+++ b/lib/avb/libavb_ab/avb_ab_flow.c
@@ -0,0 +1,531 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_ab_flow.h>
+
+bool avb_ab_data_verify_and_byteswap(const AvbABData* src, AvbABData* dest) {
+  /* Ensure magic is correct. */
+  if (avb_safe_memcmp(src->magic, AVB_AB_MAGIC, AVB_AB_MAGIC_LEN) != 0) {
+    avb_error("Magic is incorrect.\n");
+    return false;
+  }
+
+  avb_memcpy(dest, src, sizeof(AvbABData));
+  dest->crc32 = avb_be32toh(dest->crc32);
+
+  /* Ensure we don't attempt to access any fields if the major version
+   * is not supported.
+   */
+  if (dest->version_major > AVB_AB_MAJOR_VERSION) {
+    avb_error("No support for given major version.\n");
+    return false;
+  }
+
+  /* Bail if CRC32 doesn't match. */
+  if (dest->crc32 !=
+      avb_crc32((const uint8_t*)dest, sizeof(AvbABData) - sizeof(uint32_t))) {
+    avb_error("CRC32 does not match.\n");
+    return false;
+  }
+
+  return true;
+}
+
+void avb_ab_data_update_crc_and_byteswap(const AvbABData* src,
+                                         AvbABData* dest) {
+  avb_memcpy(dest, src, sizeof(AvbABData));
+  dest->crc32 = avb_htobe32(
+      avb_crc32((const uint8_t*)dest, sizeof(AvbABData) - sizeof(uint32_t)));
+}
+
+void avb_ab_data_init(AvbABData* data) {
+  avb_memset(data, '\0', sizeof(AvbABData));
+  avb_memcpy(data->magic, AVB_AB_MAGIC, AVB_AB_MAGIC_LEN);
+  data->version_major = AVB_AB_MAJOR_VERSION;
+  data->version_minor = AVB_AB_MINOR_VERSION;
+  data->slots[0].priority = AVB_AB_MAX_PRIORITY;
+  data->slots[0].tries_remaining = AVB_AB_MAX_TRIES_REMAINING;
+  data->slots[0].successful_boot = 0;
+  data->slots[1].priority = AVB_AB_MAX_PRIORITY - 1;
+  data->slots[1].tries_remaining = AVB_AB_MAX_TRIES_REMAINING;
+  data->slots[1].successful_boot = 0;
+}
+
+/* The AvbABData struct is stored 2048 bytes into the 'misc' partition
+ * following the 'struct bootloader_message' field. The struct is
+ * compatible with the guidelines in bootable/recovery/bootloader.h -
+ * e.g. it is stored in the |slot_suffix| field, starts with a
+ * NUL-byte, and is 32 bytes long.
+ */
+#define AB_METADATA_MISC_PARTITION_OFFSET 2048
+
+AvbIOResult avb_ab_data_read(AvbABOps* ab_ops, AvbABData* data) {
+  AvbOps* ops = ab_ops->ops;
+  AvbABData serialized;
+  AvbIOResult io_ret;
+  size_t num_bytes_read;
+
+  io_ret = ops->read_from_partition(ops,
+                                    "misc",
+                                    AB_METADATA_MISC_PARTITION_OFFSET,
+                                    sizeof(AvbABData),
+                                    &serialized,
+                                    &num_bytes_read);
+  if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+    return AVB_IO_RESULT_ERROR_OOM;
+  } else if (io_ret != AVB_IO_RESULT_OK ||
+             num_bytes_read != sizeof(AvbABData)) {
+    avb_error("Error reading A/B metadata.\n");
+    return AVB_IO_RESULT_ERROR_IO;
+  }
+
+  if (!avb_ab_data_verify_and_byteswap(&serialized, data)) {
+    avb_error(
+        "Error validating A/B metadata from disk. "
+        "Resetting and writing new A/B metadata to disk.\n");
+    avb_ab_data_init(data);
+    return avb_ab_data_write(ab_ops, data);
+  }
+
+  return AVB_IO_RESULT_OK;
+}
+
+AvbIOResult avb_ab_data_write(AvbABOps* ab_ops, const AvbABData* data) {
+  AvbOps* ops = ab_ops->ops;
+  AvbABData serialized;
+  AvbIOResult io_ret;
+
+  avb_ab_data_update_crc_and_byteswap(data, &serialized);
+  io_ret = ops->write_to_partition(ops,
+                                   "misc",
+                                   AB_METADATA_MISC_PARTITION_OFFSET,
+                                   sizeof(AvbABData),
+                                   &serialized);
+  if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+    return AVB_IO_RESULT_ERROR_OOM;
+  } else if (io_ret != AVB_IO_RESULT_OK) {
+    avb_error("Error writing A/B metadata.\n");
+    return AVB_IO_RESULT_ERROR_IO;
+  }
+  return AVB_IO_RESULT_OK;
+}
+
+static bool slot_is_bootable(AvbABSlotData* slot) {
+  return slot->priority > 0 &&
+         (slot->successful_boot || (slot->tries_remaining > 0));
+}
+
+static void slot_set_unbootable(AvbABSlotData* slot) {
+  slot->priority = 0;
+  slot->tries_remaining = 0;
+  slot->successful_boot = 0;
+}
+
+/* Ensure all unbootable and/or illegal states are marked as the
+ * canonical 'unbootable' state, e.g. priority=0, tries_remaining=0,
+ * and successful_boot=0.
+ */
+static void slot_normalize(AvbABSlotData* slot) {
+  if (slot->priority > 0) {
+    if (slot->tries_remaining == 0 && !slot->successful_boot) {
+      /* We've exhausted all tries -> unbootable. */
+      slot_set_unbootable(slot);
+    }
+    if (slot->tries_remaining > 0 && slot->successful_boot) {
+      /* Illegal state - avb_ab_mark_slot_successful() will clear
+       * tries_remaining when setting successful_boot.
+       */
+      slot_set_unbootable(slot);
+    }
+  } else {
+    slot_set_unbootable(slot);
+  }
+}
+
+static const char* slot_suffixes[2] = {"_a", "_b"};
+
+/* Helper function to load metadata - returns AVB_IO_RESULT_OK on
+ * success, error code otherwise.
+ */
+static AvbIOResult load_metadata(AvbABOps* ab_ops,
+                                 AvbABData* ab_data,
+                                 AvbABData* ab_data_orig) {
+  AvbIOResult io_ret;
+
+  io_ret = ab_ops->read_ab_metadata(ab_ops, ab_data);
+  if (io_ret != AVB_IO_RESULT_OK) {
+    avb_error("I/O error while loading A/B metadata.\n");
+    return io_ret;
+  }
+  *ab_data_orig = *ab_data;
+
+  /* Ensure data is normalized, e.g. illegal states will be marked as
+   * unbootable and all unbootable states are represented with
+   * (priority=0, tries_remaining=0, successful_boot=0).
+   */
+  slot_normalize(&ab_data->slots[0]);
+  slot_normalize(&ab_data->slots[1]);
+  return AVB_IO_RESULT_OK;
+}
+
+/* Writes A/B metadata to disk only if it has changed - returns
+ * AVB_IO_RESULT_OK on success, error code otherwise.
+ */
+static AvbIOResult save_metadata_if_changed(AvbABOps* ab_ops,
+                                            AvbABData* ab_data,
+                                            AvbABData* ab_data_orig) {
+  if (avb_safe_memcmp(ab_data, ab_data_orig, sizeof(AvbABData)) != 0) {
+    avb_debug("Writing A/B metadata to disk.\n");
+    return ab_ops->write_ab_metadata(ab_ops, ab_data);
+  }
+  return AVB_IO_RESULT_OK;
+}
+
+AvbABFlowResult avb_ab_flow(AvbABOps* ab_ops,
+                            const char* const* requested_partitions,
+                            AvbSlotVerifyFlags flags,
+                            AvbHashtreeErrorMode hashtree_error_mode,
+                            AvbSlotVerifyData** out_data) {
+  AvbOps* ops = ab_ops->ops;
+  AvbSlotVerifyData* slot_data[2] = {NULL, NULL};
+  AvbSlotVerifyData* data = NULL;
+  AvbABFlowResult ret;
+  AvbABData ab_data, ab_data_orig;
+  size_t slot_index_to_boot, n;
+  AvbIOResult io_ret;
+  bool saw_and_allowed_verification_error = false;
+
+  io_ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
+  if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+    ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
+    goto out;
+  } else if (io_ret != AVB_IO_RESULT_OK) {
+    ret = AVB_AB_FLOW_RESULT_ERROR_IO;
+    goto out;
+  }
+
+  /* Validate all bootable slots. */
+  for (n = 0; n < 2; n++) {
+    if (slot_is_bootable(&ab_data.slots[n])) {
+      AvbSlotVerifyResult verify_result;
+      bool set_slot_unbootable = false;
+
+      verify_result = avb_slot_verify(ops,
+                                      requested_partitions,
+                                      slot_suffixes[n],
+                                      flags,
+                                      hashtree_error_mode,
+                                      &slot_data[n]);
+      switch (verify_result) {
+        case AVB_SLOT_VERIFY_RESULT_ERROR_OOM:
+          ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
+          goto out;
+
+        case AVB_SLOT_VERIFY_RESULT_ERROR_IO:
+          ret = AVB_AB_FLOW_RESULT_ERROR_IO;
+          goto out;
+
+        case AVB_SLOT_VERIFY_RESULT_OK:
+          break;
+
+        case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA:
+        case AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION:
+          /* Even with AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR
+           * these mean game over.
+           */
+          set_slot_unbootable = true;
+          break;
+
+        /* explicit fallthrough. */
+        case AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION:
+        case AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX:
+        case AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED:
+          if (flags & AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR) {
+            /* Do nothing since we allow this. */
+            avb_debugv("Allowing slot ",
+                       slot_suffixes[n],
+                       " which verified "
+                       "with result ",
+                       avb_slot_verify_result_to_string(verify_result),
+                       " because "
+                       "AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR "
+                       "is set.\n",
+                       NULL);
+            saw_and_allowed_verification_error = true;
+          } else {
+            set_slot_unbootable = true;
+          }
+          break;
+
+        case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT:
+          ret = AVB_AB_FLOW_RESULT_ERROR_INVALID_ARGUMENT;
+          goto out;
+          /* Do not add a 'default:' case here because of -Wswitch. */
+      }
+
+      if (set_slot_unbootable) {
+        avb_errorv("Error verifying slot ",
+                   slot_suffixes[n],
+                   " with result ",
+                   avb_slot_verify_result_to_string(verify_result),
+                   " - setting unbootable.\n",
+                   NULL);
+        slot_set_unbootable(&ab_data.slots[n]);
+      }
+    }
+  }
+
+  if (slot_is_bootable(&ab_data.slots[0]) &&
+      slot_is_bootable(&ab_data.slots[1])) {
+    if (ab_data.slots[1].priority > ab_data.slots[0].priority) {
+      slot_index_to_boot = 1;
+    } else {
+      slot_index_to_boot = 0;
+    }
+  } else if (slot_is_bootable(&ab_data.slots[0])) {
+    slot_index_to_boot = 0;
+  } else if (slot_is_bootable(&ab_data.slots[1])) {
+    slot_index_to_boot = 1;
+  } else {
+    /* No bootable slots! */
+    avb_error("No bootable slots found.\n");
+    ret = AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS;
+    goto out;
+  }
+
+  /* Update stored rollback index such that the stored rollback index
+   * is the largest value supporting all currently bootable slots. Do
+   * this for every rollback index location.
+   */
+  for (n = 0; n < AVB_MAX_NUMBER_OF_ROLLBACK_INDEX_LOCATIONS; n++) {
+    uint64_t rollback_index_value = 0;
+
+    if (slot_data[0] != NULL && slot_data[1] != NULL) {
+      uint64_t a_rollback_index = slot_data[0]->rollback_indexes[n];
+      uint64_t b_rollback_index = slot_data[1]->rollback_indexes[n];
+      rollback_index_value =
+          (a_rollback_index < b_rollback_index ? a_rollback_index
+                                               : b_rollback_index);
+    } else if (slot_data[0] != NULL) {
+      rollback_index_value = slot_data[0]->rollback_indexes[n];
+    } else if (slot_data[1] != NULL) {
+      rollback_index_value = slot_data[1]->rollback_indexes[n];
+    }
+
+    if (rollback_index_value != 0) {
+      uint64_t current_rollback_index_value;
+      io_ret = ops->read_rollback_index(ops, n, &current_rollback_index_value);
+      if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+        ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
+        goto out;
+      } else if (io_ret != AVB_IO_RESULT_OK) {
+        avb_error("Error getting rollback index for slot.\n");
+        ret = AVB_AB_FLOW_RESULT_ERROR_IO;
+        goto out;
+      }
+      if (current_rollback_index_value != rollback_index_value) {
+        io_ret = ops->write_rollback_index(ops, n, rollback_index_value);
+        if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+          ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
+          goto out;
+        } else if (io_ret != AVB_IO_RESULT_OK) {
+          avb_error("Error setting stored rollback index.\n");
+          ret = AVB_AB_FLOW_RESULT_ERROR_IO;
+          goto out;
+        }
+      }
+    }
+  }
+
+  /* Finally, select this slot. */
+  avb_assert(slot_data[slot_index_to_boot] != NULL);
+  data = slot_data[slot_index_to_boot];
+  slot_data[slot_index_to_boot] = NULL;
+  if (saw_and_allowed_verification_error) {
+    avb_assert(flags & AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR);
+    ret = AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR;
+  } else {
+    ret = AVB_AB_FLOW_RESULT_OK;
+  }
+
+  /* ... and decrement tries remaining, if applicable. */
+  if (!ab_data.slots[slot_index_to_boot].successful_boot &&
+      ab_data.slots[slot_index_to_boot].tries_remaining > 0) {
+    ab_data.slots[slot_index_to_boot].tries_remaining -= 1;
+  }
+
+out:
+  io_ret = save_metadata_if_changed(ab_ops, &ab_data, &ab_data_orig);
+  if (io_ret != AVB_IO_RESULT_OK) {
+    if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+      ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
+    } else {
+      ret = AVB_AB_FLOW_RESULT_ERROR_IO;
+    }
+    if (data != NULL) {
+      avb_slot_verify_data_free(data);
+      data = NULL;
+    }
+  }
+
+  for (n = 0; n < 2; n++) {
+    if (slot_data[n] != NULL) {
+      avb_slot_verify_data_free(slot_data[n]);
+    }
+  }
+
+  if (out_data != NULL) {
+    *out_data = data;
+  } else {
+    if (data != NULL) {
+      avb_slot_verify_data_free(data);
+    }
+  }
+
+  return ret;
+}
+
+AvbIOResult avb_ab_mark_slot_active(AvbABOps* ab_ops,
+                                    unsigned int slot_number) {
+  AvbABData ab_data, ab_data_orig;
+  unsigned int other_slot_number;
+  AvbIOResult ret;
+
+  avb_assert(slot_number < 2);
+
+  ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
+  if (ret != AVB_IO_RESULT_OK) {
+    goto out;
+  }
+
+  /* Make requested slot top priority, unsuccessful, and with max tries. */
+  ab_data.slots[slot_number].priority = AVB_AB_MAX_PRIORITY;
+  ab_data.slots[slot_number].tries_remaining = AVB_AB_MAX_TRIES_REMAINING;
+  ab_data.slots[slot_number].successful_boot = 0;
+
+  /* Ensure other slot doesn't have as high a priority. */
+  other_slot_number = 1 - slot_number;
+  if (ab_data.slots[other_slot_number].priority == AVB_AB_MAX_PRIORITY) {
+    ab_data.slots[other_slot_number].priority = AVB_AB_MAX_PRIORITY - 1;
+  }
+
+  ret = AVB_IO_RESULT_OK;
+
+out:
+  if (ret == AVB_IO_RESULT_OK) {
+    ret = save_metadata_if_changed(ab_ops, &ab_data, &ab_data_orig);
+  }
+  return ret;
+}
+
+AvbIOResult avb_ab_mark_slot_unbootable(AvbABOps* ab_ops,
+                                        unsigned int slot_number) {
+  AvbABData ab_data, ab_data_orig;
+  AvbIOResult ret;
+
+  avb_assert(slot_number < 2);
+
+  ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
+  if (ret != AVB_IO_RESULT_OK) {
+    goto out;
+  }
+
+  slot_set_unbootable(&ab_data.slots[slot_number]);
+
+  ret = AVB_IO_RESULT_OK;
+
+out:
+  if (ret == AVB_IO_RESULT_OK) {
+    ret = save_metadata_if_changed(ab_ops, &ab_data, &ab_data_orig);
+  }
+  return ret;
+}
+
+AvbIOResult avb_ab_mark_slot_successful(AvbABOps* ab_ops,
+                                        unsigned int slot_number) {
+  AvbABData ab_data, ab_data_orig;
+  AvbIOResult ret;
+
+  avb_assert(slot_number < 2);
+
+  ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
+  if (ret != AVB_IO_RESULT_OK) {
+    goto out;
+  }
+
+  if (!slot_is_bootable(&ab_data.slots[slot_number])) {
+    avb_error("Cannot mark unbootable slot as successful.\n");
+    ret = AVB_IO_RESULT_OK;
+    goto out;
+  }
+
+  ab_data.slots[slot_number].tries_remaining = 0;
+  ab_data.slots[slot_number].successful_boot = 1;
+
+  ret = AVB_IO_RESULT_OK;
+
+out:
+  if (ret == AVB_IO_RESULT_OK) {
+    ret = save_metadata_if_changed(ab_ops, &ab_data, &ab_data_orig);
+  }
+  return ret;
+}
+
+const char* avb_ab_flow_result_to_string(AvbABFlowResult result) {
+  const char* ret = NULL;
+
+  switch (result) {
+    case AVB_AB_FLOW_RESULT_OK:
+      ret = "OK";
+      break;
+
+    case AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR:
+      ret = "OK_WITH_VERIFICATION_ERROR";
+      break;
+
+    case AVB_AB_FLOW_RESULT_ERROR_OOM:
+      ret = "ERROR_OOM";
+      break;
+
+    case AVB_AB_FLOW_RESULT_ERROR_IO:
+      ret = "ERROR_IO";
+      break;
+
+    case AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS:
+      ret = "ERROR_NO_BOOTABLE_SLOTS";
+      break;
+
+    case AVB_AB_FLOW_RESULT_ERROR_INVALID_ARGUMENT:
+      ret = "ERROR_INVALID_ARGUMENT";
+      break;
+      /* Do not add a 'default:' case here because of -Wswitch. */
+  }
+
+  if (ret == NULL) {
+    avb_error("Unknown AvbABFlowResult value.\n");
+    ret = "(unknown)";
+  }
+
+  return ret;
+}
diff --git a/lib/avb/rk_libavb_atx/Kconfig b/lib/avb/libavb_atx/Kconfig
similarity index 100%
rename from lib/avb/rk_libavb_atx/Kconfig
rename to lib/avb/libavb_atx/Kconfig
diff --git a/lib/avb/rk_libavb_atx/Makefile b/lib/avb/libavb_atx/Makefile
similarity index 100%
rename from lib/avb/rk_libavb_atx/Makefile
rename to lib/avb/libavb_atx/Makefile
diff --git a/lib/avb/rk_libavb_atx/avb_atx_validate.c b/lib/avb/libavb_atx/avb_atx_validate.c
similarity index 92%
rename from lib/avb/rk_libavb_atx/avb_atx_validate.c
rename to lib/avb/libavb_atx/avb_atx_validate.c
index 4002038273..e0f205a728 100644
--- a/lib/avb/rk_libavb_atx/avb_atx_validate.c
+++ b/lib/avb/libavb_atx/avb_atx_validate.c
@@ -1,275 +1,256 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include <android_avb/avb_atx_validate.h>
-#include <android_avb/avb_rsa.h>
-#include <android_avb/avb_sha.h>
-#include <android_avb/avb_sysdeps.h>
-#include <android_avb/avb_util.h>
-#include <optee_include/OpteeClientInterface.h>
-
-/* read permanent attributes from rpmb */
-AvbIOResult avb_read_perm_attr(AvbAtxOps* atx_ops,
-				      AvbAtxPermanentAttributes* attributes)
-{
-	if (attributes != NULL) {
-#ifdef CONFIG_OPTEE_CLIENT
-		trusty_read_permanent_attributes((uint8_t *)attributes,
-						 sizeof(struct AvbAtxPermanentAttributes));
-		return AVB_IO_RESULT_OK;
-#endif
-	}
-
-	return -1;
-}
-
-/*read permanent attributes hash from efuse */
-AvbIOResult avb_read_perm_attr_hash(AvbAtxOps* atx_ops,
-					   uint8_t hash[AVB_SHA256_DIGEST_SIZE])
-{
-#ifdef CONFIG_OPTEE_CLIENT
-	if (trusty_read_attribute_hash((uint32_t *)hash, AVB_SHA256_DIGEST_SIZE / 4))
-		return -1;
-#else
-	avb_error("Please open the macro!\n");
-	return -1;
-#endif
-	return AVB_IO_RESULT_OK;
-}
-
-/* Computes the SHA256 |hash| of |length| bytes of |data|. */
-static void sha256(const uint8_t* data,
-                   uint32_t length,
-                   uint8_t hash[AVB_SHA256_DIGEST_SIZE]) {
-  AvbSHA256Ctx context;
-  avb_sha256_init(&context);
-  avb_sha256_update(&context, data, length);
-  uint8_t* tmp = avb_sha256_final(&context);
-  avb_memcpy(hash, tmp, AVB_SHA256_DIGEST_SIZE);
-}
-
-/* Computes the SHA512 |hash| of |length| bytes of |data|. */
-static void sha512(const uint8_t* data,
-                   uint32_t length,
-                   uint8_t hash[AVB_SHA512_DIGEST_SIZE]) {
-  AvbSHA512Ctx context;
-  avb_sha512_init(&context);
-  avb_sha512_update(&context, data, length);
-  uint8_t* tmp = avb_sha512_final(&context);
-  avb_memcpy(hash, tmp, AVB_SHA512_DIGEST_SIZE);
-}
-
-/* Computes the SHA256 |hash| of a NUL-terminated |str|. */
-static void sha256_str(const char* str, uint8_t hash[AVB_SHA256_DIGEST_SIZE]) {
-  sha256((const uint8_t*)str, avb_strlen(str), hash);
-}
-
-/* Verifies structure and |expected_hash| of permanent |attributes|. */
-static bool verify_permanent_attributes(
-    const AvbAtxPermanentAttributes* attributes,
-    uint8_t expected_hash[AVB_SHA256_DIGEST_SIZE]) {
-  uint8_t hash[AVB_SHA256_DIGEST_SIZE];
-
-  if (attributes->version != 1) {
-    avb_error("Unsupported permanent attributes version.\n");
-    return false;
-  }
-  sha256((const uint8_t*)attributes, sizeof(AvbAtxPermanentAttributes), hash);
-  if (0 != avb_safe_memcmp(hash, expected_hash, AVB_SHA256_DIGEST_SIZE)) {
-    avb_error("Invalid permanent attributes.\n");
-    return false;
-  }
-  return true;
-}
-
-/* Verifies the format, key version, usage, and signature of a certificate. */
-static bool verify_certificate(AvbAtxCertificate* certificate,
-                               uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
-                               uint64_t minimum_key_version,
-                               uint8_t expected_usage[AVB_SHA256_DIGEST_SIZE]) {
-  const AvbAlgorithmData* algorithm_data;
-  uint8_t certificate_hash[AVB_SHA512_DIGEST_SIZE];
-
-  if (certificate->signed_data.version != 1) {
-    avb_error("Unsupported certificate format.\n");
-    return false;
-  }
-  algorithm_data = avb_get_algorithm_data(AVB_ALGORITHM_TYPE_SHA512_RSA4096);
-  sha512((const uint8_t*)&certificate->signed_data,
-         sizeof(AvbAtxCertificateSignedData),
-         certificate_hash);
-  if (!avb_rsa_verify(authority,
-                      AVB_ATX_PUBLIC_KEY_SIZE,
-                      certificate->signature,
-                      AVB_RSA4096_NUM_BYTES,
-                      certificate_hash,
-                      AVB_SHA512_DIGEST_SIZE,
-                      algorithm_data->padding,
-                      algorithm_data->padding_len)) {
-    avb_error("Invalid certificate signature.\n");
-    return false;
-  }
-  if (certificate->signed_data.key_version < minimum_key_version) {
-    avb_error("Key rollback detected.\n");
-    return false;
-  }
-  if (0 != avb_safe_memcmp(certificate->signed_data.usage,
-                           expected_usage,
-                           AVB_SHA256_DIGEST_SIZE)) {
-    avb_error("Invalid certificate usage.\n");
-    return false;
-  }
-  return true;
-}
-
-/* Verifies signature and fields of a PIK certificate. */
-static bool verify_pik_certificate(AvbAtxCertificate* certificate,
-                                   uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
-                                   uint64_t minimum_version) {
-  uint8_t expected_usage[AVB_SHA256_DIGEST_SIZE];
-
-  sha256_str("com.google.android.things.vboot.ca", expected_usage);
-  if (!verify_certificate(
-          certificate, authority, minimum_version, expected_usage)) {
-    avb_error("Invalid PIK certificate.\n");
-    return false;
-  }
-  return true;
-}
-
-/* Verifies signature and fields of a PSK certificate. */
-static bool verify_psk_certificate(
-    AvbAtxCertificate* certificate,
-    uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
-    uint64_t minimum_version,
-    uint8_t product_id[AVB_ATX_PRODUCT_ID_SIZE]) {
-  uint8_t expected_subject[AVB_SHA256_DIGEST_SIZE];
-  uint8_t expected_usage[AVB_SHA256_DIGEST_SIZE];
-
-  sha256_str("com.google.android.things.vboot", expected_usage);
-  if (!verify_certificate(
-          certificate, authority, minimum_version, expected_usage)) {
-    avb_error("Invalid PSK certificate.\n");
-    return false;
-  }
-  sha256(product_id, AVB_ATX_PRODUCT_ID_SIZE, expected_subject);
-  if (0 != avb_safe_memcmp(certificate->signed_data.subject,
-                           expected_subject,
-                           AVB_SHA256_DIGEST_SIZE)) {
-    avb_error("Product ID mismatch.\n");
-    return false;
-  }
-  return true;
-}
-
-AvbIOResult avb_atx_validate_vbmeta_public_key(
-    AvbOps* ops,
-    const uint8_t* public_key_data,
-    size_t public_key_length,
-    const uint8_t* public_key_metadata,
-    size_t public_key_metadata_length,
-    bool* out_is_trusted) {
-  AvbIOResult result = AVB_IO_RESULT_OK;
-  AvbAtxPermanentAttributes permanent_attributes;
-  uint8_t permanent_attributes_hash[AVB_SHA256_DIGEST_SIZE];
-  AvbAtxPublicKeyMetadata metadata;
-  uint64_t minimum_version;
-
-  /* Be pessimistic so we can exit early without having to remember to clear.
-   */
-  *out_is_trusted = false;
-
-  /* Read and verify permanent attributes. */
-  result = ops->atx_ops->read_permanent_attributes(ops->atx_ops,
-                                                   &permanent_attributes);
-  if (result != AVB_IO_RESULT_OK) {
-    avb_error("Failed to read permanent attributes.\n");
-    return result;
-  }
-  result = ops->atx_ops->read_permanent_attributes_hash(
-      ops->atx_ops, permanent_attributes_hash);
-  if (result != AVB_IO_RESULT_OK) {
-    avb_error("Failed to read permanent attributes hash.\n");
-    return result;
-  }
-  if (!verify_permanent_attributes(&permanent_attributes,
-                                   permanent_attributes_hash)) {
-    return AVB_IO_RESULT_OK;
-  }
-
-  /* Sanity check public key metadata. */
-  if (public_key_metadata_length != sizeof(AvbAtxPublicKeyMetadata)) {
-    avb_error("Invalid public key metadata.\n");
-    return AVB_IO_RESULT_OK;
-  }
-  avb_memcpy(&metadata, public_key_metadata, sizeof(AvbAtxPublicKeyMetadata));
-  if (metadata.version != 1) {
-    avb_error("Unsupported public key metadata.\n");
-    return AVB_IO_RESULT_OK;
-  }
-
-  /* Verify the PIK certificate. */
-  result = ops->read_rollback_index(
-      ops, AVB_ATX_PIK_VERSION_LOCATION, &minimum_version);
-  if (result != AVB_IO_RESULT_OK) {
-    avb_error("Failed to read PIK minimum version.\n");
-    return result;
-  }
-  if (!verify_pik_certificate(&metadata.product_intermediate_key_certificate,
-                              permanent_attributes.product_root_public_key,
-                              minimum_version)) {
-    return AVB_IO_RESULT_OK;
-  }
-
-  /* Verify the PSK certificate. */
-  result = ops->read_rollback_index(
-      ops, AVB_ATX_PSK_VERSION_LOCATION, &minimum_version);
-  if (result != AVB_IO_RESULT_OK) {
-    avb_error("Failed to read PSK minimum version.\n");
-    return result;
-  }
-  if (!verify_psk_certificate(
-          &metadata.product_signing_key_certificate,
-          metadata.product_intermediate_key_certificate.signed_data.public_key,
-          minimum_version,
-          permanent_attributes.product_id)) {
-    return AVB_IO_RESULT_OK;
-  }
-
-  /* Verify the PSK is the same key that verified vbmeta. */
-  if (public_key_length != AVB_ATX_PUBLIC_KEY_SIZE) {
-    avb_error("Public key length mismatch.\n");
-    return AVB_IO_RESULT_OK;
-  }
-  if (0 != avb_safe_memcmp(
-               metadata.product_signing_key_certificate.signed_data.public_key,
-               public_key_data,
-               AVB_ATX_PUBLIC_KEY_SIZE)) {
-    avb_error("Public key mismatch.\n");
-    return AVB_IO_RESULT_OK;
-  }
-
-  *out_is_trusted = true;
-  return AVB_IO_RESULT_OK;
-}
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_atx_validate.h>
+
+#include <android_avb/avb_rsa.h>
+#include <android_avb/avb_sha.h>
+#include <android_avb/avb_sysdeps.h>
+#include <android_avb/avb_util.h>
+
+/* Computes the SHA256 |hash| of |length| bytes of |data|. */
+static void sha256(const uint8_t* data,
+                   uint32_t length,
+                   uint8_t hash[AVB_SHA256_DIGEST_SIZE]) {
+  AvbSHA256Ctx context;
+  avb_sha256_init(&context);
+  avb_sha256_update(&context, data, length);
+  uint8_t* tmp = avb_sha256_final(&context);
+  avb_memcpy(hash, tmp, AVB_SHA256_DIGEST_SIZE);
+}
+
+/* Computes the SHA512 |hash| of |length| bytes of |data|. */
+static void sha512(const uint8_t* data,
+                   uint32_t length,
+                   uint8_t hash[AVB_SHA512_DIGEST_SIZE]) {
+  AvbSHA512Ctx context;
+  avb_sha512_init(&context);
+  avb_sha512_update(&context, data, length);
+  uint8_t* tmp = avb_sha512_final(&context);
+  avb_memcpy(hash, tmp, AVB_SHA512_DIGEST_SIZE);
+}
+
+/* Computes the SHA256 |hash| of a NUL-terminated |str|. */
+static void sha256_str(const char* str, uint8_t hash[AVB_SHA256_DIGEST_SIZE]) {
+  sha256((const uint8_t*)str, avb_strlen(str), hash);
+}
+
+/* Verifies structure and |expected_hash| of permanent |attributes|. */
+static bool verify_permanent_attributes(
+    const AvbAtxPermanentAttributes* attributes,
+    uint8_t expected_hash[AVB_SHA256_DIGEST_SIZE]) {
+  uint8_t hash[AVB_SHA256_DIGEST_SIZE];
+
+  if (attributes->version != 1) {
+    avb_error("Unsupported permanent attributes version.\n");
+    return false;
+  }
+  sha256((const uint8_t*)attributes, sizeof(AvbAtxPermanentAttributes), hash);
+  if (0 != avb_safe_memcmp(hash, expected_hash, AVB_SHA256_DIGEST_SIZE)) {
+    avb_error("Invalid permanent attributes.\n");
+    return false;
+  }
+  return true;
+}
+
+/* Verifies the format, key version, usage, and signature of a certificate. */
+static bool verify_certificate(AvbAtxCertificate* certificate,
+                               uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
+                               uint64_t minimum_key_version,
+                               uint8_t expected_usage[AVB_SHA256_DIGEST_SIZE]) {
+  const AvbAlgorithmData* algorithm_data;
+  uint8_t certificate_hash[AVB_SHA512_DIGEST_SIZE];
+
+  if (certificate->signed_data.version != 1) {
+    avb_error("Unsupported certificate format.\n");
+    return false;
+  }
+  algorithm_data = avb_get_algorithm_data(AVB_ALGORITHM_TYPE_SHA512_RSA4096);
+  sha512((const uint8_t*)&certificate->signed_data,
+         sizeof(AvbAtxCertificateSignedData),
+         certificate_hash);
+  if (!avb_rsa_verify(authority,
+                      AVB_ATX_PUBLIC_KEY_SIZE,
+                      certificate->signature,
+                      AVB_RSA4096_NUM_BYTES,
+                      certificate_hash,
+                      AVB_SHA512_DIGEST_SIZE,
+                      algorithm_data->padding,
+                      algorithm_data->padding_len)) {
+    avb_error("Invalid certificate signature.\n");
+    return false;
+  }
+  if (certificate->signed_data.key_version < minimum_key_version) {
+    avb_error("Key rollback detected.\n");
+    return false;
+  }
+  if (0 != avb_safe_memcmp(certificate->signed_data.usage,
+                           expected_usage,
+                           AVB_SHA256_DIGEST_SIZE)) {
+    avb_error("Invalid certificate usage.\n");
+    return false;
+  }
+  return true;
+}
+
+/* Verifies signature and fields of a PIK certificate. */
+static bool verify_pik_certificate(AvbAtxCertificate* certificate,
+                                   uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
+                                   uint64_t minimum_version) {
+  uint8_t expected_usage[AVB_SHA256_DIGEST_SIZE];
+
+  sha256_str("com.google.android.things.vboot.ca", expected_usage);
+  if (!verify_certificate(
+          certificate, authority, minimum_version, expected_usage)) {
+    avb_error("Invalid PIK certificate.\n");
+    return false;
+  }
+  return true;
+}
+
+/* Verifies signature and fields of a PSK certificate. */
+static bool verify_psk_certificate(
+    AvbAtxCertificate* certificate,
+    uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
+    uint64_t minimum_version,
+    uint8_t product_id[AVB_ATX_PRODUCT_ID_SIZE]) {
+  uint8_t expected_subject[AVB_SHA256_DIGEST_SIZE];
+  uint8_t expected_usage[AVB_SHA256_DIGEST_SIZE];
+
+  sha256_str("com.google.android.things.vboot", expected_usage);
+  if (!verify_certificate(
+          certificate, authority, minimum_version, expected_usage)) {
+    avb_error("Invalid PSK certificate.\n");
+    return false;
+  }
+  sha256(product_id, AVB_ATX_PRODUCT_ID_SIZE, expected_subject);
+  if (0 != avb_safe_memcmp(certificate->signed_data.subject,
+                           expected_subject,
+                           AVB_SHA256_DIGEST_SIZE)) {
+    avb_error("Product ID mismatch.\n");
+    return false;
+  }
+  return true;
+}
+
+AvbIOResult avb_atx_validate_vbmeta_public_key(
+    AvbOps* ops,
+    const uint8_t* public_key_data,
+    size_t public_key_length,
+    const uint8_t* public_key_metadata,
+    size_t public_key_metadata_length,
+    bool* out_is_trusted) {
+  AvbIOResult result = AVB_IO_RESULT_OK;
+  AvbAtxPermanentAttributes permanent_attributes;
+  uint8_t permanent_attributes_hash[AVB_SHA256_DIGEST_SIZE];
+  AvbAtxPublicKeyMetadata metadata;
+  uint64_t minimum_version;
+
+  /* Be pessimistic so we can exit early without having to remember to clear.
+   */
+  *out_is_trusted = false;
+
+  /* Read and verify permanent attributes. */
+  result = ops->atx_ops->read_permanent_attributes(ops->atx_ops,
+                                                   &permanent_attributes);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to read permanent attributes.\n");
+    return result;
+  }
+  result = ops->atx_ops->read_permanent_attributes_hash(
+      ops->atx_ops, permanent_attributes_hash);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to read permanent attributes hash.\n");
+    return result;
+  }
+  if (!verify_permanent_attributes(&permanent_attributes,
+                                   permanent_attributes_hash)) {
+    return AVB_IO_RESULT_OK;
+  }
+
+  /* Sanity check public key metadata. */
+  if (public_key_metadata_length != sizeof(AvbAtxPublicKeyMetadata)) {
+    avb_error("Invalid public key metadata.\n");
+    return AVB_IO_RESULT_OK;
+  }
+  avb_memcpy(&metadata, public_key_metadata, sizeof(AvbAtxPublicKeyMetadata));
+  if (metadata.version != 1) {
+    avb_error("Unsupported public key metadata.\n");
+    return AVB_IO_RESULT_OK;
+  }
+
+  /* Verify the PIK certificate. */
+  result = ops->read_rollback_index(
+      ops, AVB_ATX_PIK_VERSION_LOCATION, &minimum_version);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to read PIK minimum version.\n");
+    return result;
+  }
+  if (!verify_pik_certificate(&metadata.product_intermediate_key_certificate,
+                              permanent_attributes.product_root_public_key,
+                              minimum_version)) {
+    return AVB_IO_RESULT_OK;
+  }
+
+  /* Verify the PSK certificate. */
+  result = ops->read_rollback_index(
+      ops, AVB_ATX_PSK_VERSION_LOCATION, &minimum_version);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to read PSK minimum version.\n");
+    return result;
+  }
+  if (!verify_psk_certificate(
+          &metadata.product_signing_key_certificate,
+          metadata.product_intermediate_key_certificate.signed_data.public_key,
+          minimum_version,
+          permanent_attributes.product_id)) {
+    return AVB_IO_RESULT_OK;
+  }
+
+  /* Verify the PSK is the same key that verified vbmeta. */
+  if (public_key_length != AVB_ATX_PUBLIC_KEY_SIZE) {
+    avb_error("Public key length mismatch.\n");
+    return AVB_IO_RESULT_OK;
+  }
+  if (0 != avb_safe_memcmp(
+               metadata.product_signing_key_certificate.signed_data.public_key,
+               public_key_data,
+               AVB_ATX_PUBLIC_KEY_SIZE)) {
+    avb_error("Public key mismatch.\n");
+    return AVB_IO_RESULT_OK;
+  }
+
+  /* Report the key versions used during verification. */
+  ops->atx_ops->set_key_version(
+      ops->atx_ops,
+      AVB_ATX_PIK_VERSION_LOCATION,
+      metadata.product_intermediate_key_certificate.signed_data.key_version);
+  ops->atx_ops->set_key_version(
+      ops->atx_ops,
+      AVB_ATX_PSK_VERSION_LOCATION,
+      metadata.product_signing_key_certificate.signed_data.key_version);
+
+  *out_is_trusted = true;
+  return AVB_IO_RESULT_OK;
+}
diff --git a/lib/avb/rk_libavb_user/Kconfig b/lib/avb/libavb_user/Kconfig
similarity index 100%
rename from lib/avb/rk_libavb_user/Kconfig
rename to lib/avb/libavb_user/Kconfig
diff --git a/lib/avb/rk_libavb_user/Makefile b/lib/avb/libavb_user/Makefile
similarity index 100%
rename from lib/avb/rk_libavb_user/Makefile
rename to lib/avb/libavb_user/Makefile
diff --git a/lib/avb/rk_libavb_user/avb_ops_user.c b/lib/avb/libavb_user/avb_ops_user.c
similarity index 58%
rename from lib/avb/rk_libavb_user/avb_ops_user.c
rename to lib/avb/libavb_user/avb_ops_user.c
index 887bb6b274..959044a931 100644
--- a/lib/avb/rk_libavb_user/avb_ops_user.c
+++ b/lib/avb/libavb_user/avb_ops_user.c
@@ -1,489 +1,395 @@
-/*
- * Copyright (C) 2017 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include <common.h>
-#include <image.h>
-#include <android_image.h>
-#include <malloc.h>
-#include <mapmem.h>
-#include <errno.h>
-#include <command.h>
-#include <mmc.h>
-#include <blk.h>
-#include <part.h>
-#include <android_avb/avb_ops_user.h>
-#include <android_avb/libavb_ab.h>
-#include <android_avb/avb_atx_validate.h>
-#include <optee_include/OpteeClientInterface.h>
-
-static void byte_to_block(int64_t *offset,
-			  size_t *num_bytes,
-			  lbaint_t *offset_blk,
-			  lbaint_t *blkcnt)
-{
-	*offset_blk = (lbaint_t)(*offset / 512);
-	if (*num_bytes % 512 == 0) {
-		if (*offset % 512 == 0) {
-			*blkcnt = (lbaint_t)(*num_bytes / 512);
-		} else {
-			*blkcnt = (lbaint_t)(*num_bytes / 512) + 1;
-		}
-	} else {
-		if (*offset % 512 == 0) {
-			*blkcnt = (lbaint_t)(*num_bytes / 512) + 1;
-		} else {
-			if ((*offset % 512) + (*num_bytes % 512) < 512 ||
-			    (*offset % 512) + (*num_bytes % 512) == 512) {
-				*blkcnt = (lbaint_t)(*num_bytes / 512) + 1;
-			} else {
-				*blkcnt = (lbaint_t)(*num_bytes / 512) + 2;
-			}
-			
-		}
-	}
-}
-
-static AvbIOResult read_from_partition(AvbOps* ops,
-                                       const char* partition,
-                                       int64_t offset,
-                                       size_t num_bytes,
-                                       void* buffer,
-                                       size_t* out_num_read)
-{
-	char *dev_iface = "mmc";
-	int dev_num = 0;
-	struct blk_desc *dev_desc;
-	lbaint_t offset_blk, blkcnt;
-	disk_partition_t part_info;
-
-	byte_to_block(&offset, &num_bytes, &offset_blk, &blkcnt);
-	dev_desc = blk_get_dev(dev_iface, dev_num);
-	if (!dev_desc) {
-		printf("Could not find %s %d\n", dev_iface, dev_num);
-		return -1;
-	}
-
-	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0) {
-		printf("Could not find \"%s\" partition\n", partition);
-		return -1;
-	}
-
-	if((offset % 512 == 0) && (num_bytes % 512 == 0)) {
-		blk_dread(dev_desc, part_info.start + offset_blk, blkcnt, buffer);
-		*out_num_read = blkcnt * 512;
-	} else {
-		char *buffer_temp;
-		buffer_temp = malloc(512 * blkcnt);
-		if (buffer_temp == NULL) {
-			printf("malloc error!\n");
-			return -1;
-		}
-		blk_dread(dev_desc, part_info.start + offset_blk, blkcnt, buffer_temp);
-		memcpy(buffer, buffer_temp + (offset % 512), num_bytes);
-		*out_num_read = num_bytes;
-		free(buffer_temp);
-	}
-
-	return AVB_IO_RESULT_OK;
-}
-
-static AvbIOResult write_to_partition(AvbOps* ops,
-                                      const char* partition,
-                                      int64_t offset,
-                                      size_t num_bytes,
-                                      const void* buffer)
-{
-	const char *dev_iface = "mmc";
-	int dev_num = 0;
-	struct blk_desc *dev_desc;
-	char *buffer_temp;
-	disk_partition_t part_info;
-	lbaint_t offset_blk, blkcnt;
-
-	byte_to_block(&offset, &num_bytes, &offset_blk, &blkcnt);
-	buffer_temp = malloc(512 * blkcnt);
-	if (buffer_temp == NULL) {
-		printf("malloc error!\n");
-		return -1;
-	}
-	memset(buffer_temp, 0, 512 * blkcnt);
-	dev_desc = blk_get_dev(dev_iface, dev_num);
-	if (!dev_desc) {
-		printf("Could not find %s %d\n", dev_iface, dev_num);
-		return -1;
-	}
-
-	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0) {
-		printf("Could not find \"%s\" partition\n", partition);
-		return -1;
-	}
-
-	if ((offset % 512 != 0) && (num_bytes % 512) != 0) {
-		blk_dread(dev_desc, part_info.start + offset_blk, blkcnt, buffer_temp);
-	}
-
-	memcpy(buffer_temp, buffer + (offset % 512), num_bytes);
-	blk_dwrite(dev_desc, part_info.start + offset_blk, blkcnt, buffer);
-	free(buffer_temp);
-
-	return AVB_IO_RESULT_OK;
-}
-
-static AvbIOResult validate_vbmeta_public_key(
-	AvbOps *ops,
-	const uint8_t *public_key_data,
-	size_t public_key_length,
-	const uint8_t *public_key_metadata,
-	size_t public_key_metadata_length,
-	bool *out_is_trusted)
-{
-#ifdef AVB_VBMETA_PUBLIC_KEY_VALIDATE
-	if (out_is_trusted != NULL) {
-		avb_atx_validate_vbmeta_public_key(ops,
-						   public_key_data,
-						   public_key_length,
-						   public_key_metadata,
-						   public_key_metadata_length,
-						   out_is_trusted);
-	}
-#else
-	if (out_is_trusted != NULL) {
-		*out_is_trusted = true;
-	}
-#endif
-	return AVB_IO_RESULT_OK;
-}
-
-
-static AvbIOResult read_rollback_index(AvbOps *ops,
-                                       size_t rollback_index_location,
-                                       uint64_t *out_rollback_index)
-{
-	if (out_rollback_index != NULL) {
-#ifdef CONFIG_OPTEE_CLIENT
-		trusty_read_rollback_index(rollback_index_location, out_rollback_index);
-#endif
-	}
-	return AVB_IO_RESULT_OK;
-}
-
-static AvbIOResult write_rollback_index(AvbOps *ops,
-                                        size_t rollback_index_location,
-                                        uint64_t rollback_index)
-{
-#ifdef CONFIG_OPTEE_CLIENT
-	trusty_write_rollback_index(rollback_index_location, rollback_index);
-#endif
-	return AVB_IO_RESULT_OK;
-}
-
-static AvbIOResult read_is_device_unlocked(AvbOps *ops, bool *out_is_unlocked)
-{
-	if (out_is_unlocked != NULL) {
-#ifdef CONFIG_OPTEE_CLIENT
-		trusty_read_lock_state((uint8_t *)out_is_unlocked);
-#endif
-	}
-	return AVB_IO_RESULT_OK;
-}
-
-static AvbIOResult write_is_device_unlocked(AvbOps *ops, bool *out_is_unlocked)
-{
-	if (out_is_unlocked != NULL) {
-#ifdef CONFIG_OPTEE_CLIENT
-		trusty_write_lock_state(*out_is_unlocked);
-#endif
-	}
-	return AVB_IO_RESULT_OK;
-}
-
-static AvbIOResult get_size_of_partition(AvbOps *ops,
-                                         const char *partition,
-                                         uint64_t *out_size_in_bytes)
-{
-	const char *dev_iface = "mmc";
-	int dev_num = 0;
-	struct blk_desc *dev_desc;
-	disk_partition_t part_info;
-
-	dev_desc = blk_get_dev(dev_iface, dev_num);
-	if (!dev_desc) {
-		printf("Could not find %s %d\n", dev_iface, dev_num);
-		return -1;
-	}
-
-	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0) {
-		printf("Could not find \"%s\" partition\n", partition);
-		return -1;
-	}
-	*out_size_in_bytes = (part_info.size) * 512;
-	return AVB_IO_RESULT_OK;
-}
-
-static AvbIOResult get_unique_guid_for_partition(AvbOps *ops,
-                                                 const char *partition,
-                                                 char *guid_buf,
-                                                 size_t guid_buf_size)
-{
-	const char *dev_iface = "mmc";
-	int dev_num = 0;
-	struct blk_desc *dev_desc;
-	disk_partition_t part_info;
-	dev_desc = blk_get_dev(dev_iface, dev_num);
-	if (!dev_desc) {
-		printf("Could not find %s %d\n", dev_iface, dev_num);
-		return -1;
-	}
-
-	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0) {
-		printf("Could not find \"%s\" partition\n", partition);
-		return -1;
-	}
-	if (guid_buf != NULL && guid_buf_size > 0) {
-		memcpy(guid_buf, part_info.uuid, guid_buf_size);
-	}
-	return AVB_IO_RESULT_OK;
-}
-
-AvbOps* avb_ops_user_new(void)
-{
-	AvbOps* ops;
-
-	ops = calloc(1, sizeof(AvbOps));
-	if (ops == NULL) {
-		avb_error("Error allocating memory for AvbOps.\n");
-		goto out;
-	}
-
-	ops->ab_ops = calloc(1, sizeof(AvbABOps));
-	if (ops->ab_ops == NULL) {
-		avb_error("Error allocating memory for AvbABOps.\n");
-		free(ops);
-		goto out;
-	}
-	ops->atx_ops = calloc(1, sizeof(AvbAtxOps));
-	if (ops->atx_ops == NULL) {
-		avb_error("Error allocating memory for AvbAtxOps.\n");
-		free(ops->ab_ops);
-		free(ops);
-		goto out;
-	}
-	ops->ab_ops->ops = ops;
-	ops->atx_ops->ops = ops;
-
-	ops->read_from_partition = read_from_partition;
-	ops->write_to_partition = write_to_partition;
-	ops->validate_vbmeta_public_key = validate_vbmeta_public_key;
-	ops->read_rollback_index = read_rollback_index;
-	ops->write_rollback_index = write_rollback_index;
-	ops->read_is_device_unlocked = read_is_device_unlocked;
-	ops->write_is_device_unlocked = write_is_device_unlocked;
-	ops->get_unique_guid_for_partition = get_unique_guid_for_partition;
-	ops->get_size_of_partition = get_size_of_partition;
-	ops->ab_ops->read_ab_metadata = avb_ab_data_read;
-	ops->ab_ops->write_ab_metadata = avb_ab_data_write;
-	ops->ab_ops->init_ab_metadata = avb_ab_data_init;
-	ops->atx_ops->read_permanent_attributes = avb_read_perm_attr;
-	ops->atx_ops->read_permanent_attributes_hash = avb_read_perm_attr_hash;
-out:
-	return ops;
-}
-
-void avb_ops_user_free(AvbOps *ops)
-{
-	free(ops->ab_ops);
-	free(ops->atx_ops);
-	free(ops);
-}
-
-
-int avb_read_slot_count(char *slot_count)
-{
-	AvbOps* ops;
-	AvbABData ab_data;
-	memset(&ab_data,0,sizeof(AvbABData));
-	ops = avb_ops_user_new();
-	printf("read_slot_count\n");
-	if (ops == NULL) {
-		printf("avb_ops_user_new() failed!\n");
-		return -1;
-	}
-	if (ops->ab_ops->read_ab_metadata(ops->ab_ops,&ab_data) != 0) {
-		printf("read_slot_count error!\n");
-		avb_ops_user_free(ops);
-		return -1;
-	}
-	*slot_count = ab_data.nb_slot;
-	avb_ops_user_free(ops);
-	return 0;
-}
-
-int avb_read_slot_suffixes(char *slot_suffixes)
-{
-	AvbOps* ops;
-	AvbABData ab_data;
-	memset(&ab_data,0,sizeof(AvbABData));
-	ops = avb_ops_user_new();
-	printf("read_slot_suffixes\n");
-	if (ops == NULL) {
-		printf("avb_ops_user_new() failed!\n");
-		return -1;
-	}
-	if (ops->ab_ops->read_ab_metadata(ops->ab_ops,&ab_data) != 0) {
-		printf("read_slot_suffixes error!\n");
-		avb_ops_user_free(ops);
-		return -1;
-	}
-	memcpy(slot_suffixes,ab_data.slot_suffix,4);
-	avb_ops_user_free(ops);
-	return 0;
-}
-
-int avb_set_slot_active(unsigned int *slot_number)
-{
-	AvbOps* ops;
-	ops = avb_ops_user_new();
-	if (ops == NULL) {
-		printf("avb_ops_user_new() failed!\n");
-		return -1;
-	}
-	printf("set_slot_active\n");
-	if (avb_ab_mark_slot_active(ops->ab_ops, *slot_number) != 0) {
-		printf("set_slot_active error!\n");
-		avb_ops_user_free(ops);
-		return -1;
-	}
-
-	avb_ops_user_free(ops);
-	return 0;
-}
-
-int avb_get_current_slot(char *select_slot)
-{
-	AvbOps* ops;
-	ops = avb_ops_user_new();
-	if (ops == NULL) {
-		printf("avb_ops_user_new() failed!\n");
-		return -1;
-	}
-	if (avb_ab_slot_select(ops->ab_ops, select_slot) != 0) {
-		printf("get_current_slot error!\n");
-		avb_ops_user_free(ops);
-		return -1;
-	}
-
-	avb_ops_user_free(ops);
-	return 0;
-}
-
-int avb_read_permanent_attributes(uint8_t *attributes, uint32_t size)
-{
-	if(trusty_read_permanent_attributes(attributes, size) != 0) {
-		return -1;
-	}
-
-	return 0;
-}
-
-int avb_write_permanent_attributes(uint8_t *attributes, uint32_t size)
-{
-	if(trusty_write_permanent_attributes(attributes, size) != 0) {
-		return -1;
-	}
-
-	return 0;
-}
-
-int avb_read_flash_lock_state(uint8_t *flash_lock_state)
-{
-	if (trusty_read_flash_lock_state(flash_lock_state))
-		return -1;
-	return 0;
-}
-
-int avb_write_flash_lock_state(uint8_t flash_lock_state)
-{
-	if (trusty_write_flash_lock_state(flash_lock_state))
-		return -1;
-	return 0;
-}
-
-int avb_read_lock_state(uint8_t *lock_state)
-{
-	if (trusty_read_lock_state(lock_state))
-		return -1;
-	return 0;
-}
-
-int avb_write_lock_state(uint8_t lock_state)
-{
-	if (trusty_write_lock_state(lock_state))
-		return -1;
-	return 0;
-}
-
-int avb_read_perm_attr_flag(uint8_t *flag)
-{
-	if (trusty_read_permanent_attributes_flag(flag))
-		return -1;
-	return 0;
-}
-
-int avb_write_perm_attr_flag(uint8_t flag)
-{
-	if (trusty_write_permanent_attributes_flag(flag))
-		return -1;
-	return 0;
-}
-
-int avb_read_vbootkey_hash(uint8_t *buf, uint8_t length)
-{
-	if (trusty_read_vbootkey_hash((uint32_t *)buf,
-				      (uint32_t)length / sizeof(uint32_t)))
-		return -1;
-	return 0;
-}
-
-int avb_write_vbootkey_hash(uint8_t *buf, uint8_t length)
-{
-	if (trusty_write_vbootkey_hash((uint32_t *)buf,
-				       (uint32_t)length / sizeof(uint32_t)))
-		return -1;
-	return 0;
-}
-
-int avb_close_optee_client(void)
-{
-	if(trusty_notify_optee_uboot_end())
-		return -1;
-	return 0;
-}
-
-int avb_write_attribute_hash(uint8_t *buf, uint8_t length)
-{
-	if (trusty_write_attribute_hash((uint32_t *)buf,
-	    (uint32_t)(length/sizeof(uint32_t))))
-		return -1;
-	return 0;
-}
+/*
+ * Copyright (C) 2017 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <common.h>
+#include <image.h>
+#include <android_image.h>
+#include <malloc.h>
+#include <mapmem.h>
+#include <errno.h>
+#include <command.h>
+#include <mmc.h>
+#include <blk.h>
+#include <part.h>
+#include <android_avb/avb_ops_user.h>
+#include <android_avb/libavb_ab.h>
+#include <android_avb/avb_atx_validate.h>
+#include <android_avb/avb_atx_types.h>
+#include <optee_include/OpteeClientInterface.h>
+#include <optee_include/tee_api_defines.h>
+#include <android_avb/avb_vbmeta_image.h>
+#include <android_avb/avb_atx_validate.h>
+
+static void byte_to_block(int64_t *offset,
+			  size_t *num_bytes,
+			  lbaint_t *offset_blk,
+			  lbaint_t *blkcnt)
+{
+	*offset_blk = (lbaint_t)(*offset / 512);
+	if (*num_bytes % 512 == 0) {
+		if (*offset % 512 == 0) {
+			*blkcnt = (lbaint_t)(*num_bytes / 512);
+		} else {
+			*blkcnt = (lbaint_t)(*num_bytes / 512) + 1;
+		}
+	} else {
+		if (*offset % 512 == 0) {
+			*blkcnt = (lbaint_t)(*num_bytes / 512) + 1;
+		} else {
+			if ((*offset % 512) + (*num_bytes % 512) < 512 ||
+			    (*offset % 512) + (*num_bytes % 512) == 512) {
+				*blkcnt = (lbaint_t)(*num_bytes / 512) + 1;
+			} else {
+				*blkcnt = (lbaint_t)(*num_bytes / 512) + 2;
+			}
+		}
+	}
+}
+
+static AvbIOResult read_from_partition(AvbOps* ops,
+                                       const char* partition,
+                                       int64_t offset,
+                                       size_t num_bytes,
+                                       void* buffer,
+                                       size_t* out_num_read)
+{
+	char *dev_iface = "mmc";
+	int dev_num = 0;
+	struct blk_desc *dev_desc;
+	lbaint_t offset_blk, blkcnt;
+	disk_partition_t part_info;
+
+	byte_to_block(&offset, &num_bytes, &offset_blk, &blkcnt);
+	dev_desc = blk_get_dev(dev_iface, dev_num);
+	if (!dev_desc) {
+		printf("Could not find %s %d\n", dev_iface, dev_num);
+		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
+	}
+
+	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0) {
+		printf("Could not find \"%s\" partition\n", partition);
+		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
+	}
+
+	if((offset % 512 == 0) && (num_bytes % 512 == 0)) {
+		blk_dread(dev_desc, part_info.start + offset_blk, blkcnt, buffer);
+		*out_num_read = blkcnt * 512;
+	} else {
+		char *buffer_temp;
+		buffer_temp = malloc(512 * blkcnt);
+		if (buffer_temp == NULL) {
+			printf("malloc error!\n");
+			return AVB_IO_RESULT_ERROR_OOM;
+		}
+		blk_dread(dev_desc, part_info.start + offset_blk, blkcnt, buffer_temp);
+		memcpy(buffer, buffer_temp + (offset % 512), num_bytes);
+		*out_num_read = num_bytes;
+		free(buffer_temp);
+	}
+
+	return AVB_IO_RESULT_OK;
+}
+
+static AvbIOResult write_to_partition(AvbOps* ops,
+                                      const char* partition,
+                                      int64_t offset,
+                                      size_t num_bytes,
+                                      const void* buffer)
+{
+	const char *dev_iface = "mmc";
+	int dev_num = 0;
+	struct blk_desc *dev_desc;
+	char *buffer_temp;
+	disk_partition_t part_info;
+	lbaint_t offset_blk, blkcnt;
+
+	byte_to_block(&offset, &num_bytes, &offset_blk, &blkcnt);
+	buffer_temp = malloc(512 * blkcnt);
+	if (buffer_temp == NULL) {
+		printf("malloc error!\n");
+		return AVB_IO_RESULT_ERROR_OOM;
+	}
+	memset(buffer_temp, 0, 512 * blkcnt);
+	dev_desc = blk_get_dev(dev_iface, dev_num);
+	if (!dev_desc) {
+		printf("Could not find %s %d\n", dev_iface, dev_num);
+		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
+	}
+
+	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0) {
+		printf("Could not find \"%s\" partition\n", partition);
+		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
+	}
+
+	if ((offset % 512 != 0) && (num_bytes % 512) != 0) {
+		blk_dread(dev_desc, part_info.start + offset_blk, blkcnt, buffer_temp);
+	}
+
+	memcpy(buffer_temp, buffer + (offset % 512), num_bytes);
+	blk_dwrite(dev_desc, part_info.start + offset_blk, blkcnt, buffer);
+	free(buffer_temp);
+
+	return AVB_IO_RESULT_OK;
+}
+
+static AvbIOResult validate_vbmeta_public_key(
+	AvbOps *ops,
+	const uint8_t *public_key_data,
+	size_t public_key_length,
+	const uint8_t *public_key_metadata,
+	size_t public_key_metadata_length,
+	bool *out_is_trusted)
+{
+#ifdef AVB_VBMETA_PUBLIC_KEY_VALIDATE
+	if (out_is_trusted != NULL) {
+		avb_atx_validate_vbmeta_public_key(ops,
+						   public_key_data,
+						   public_key_length,
+						   public_key_metadata,
+						   public_key_metadata_length,
+						   out_is_trusted);
+	}
+#else
+	if (out_is_trusted != NULL) {
+		*out_is_trusted = true;
+	}
+#endif
+	return AVB_IO_RESULT_OK;
+}
+
+static AvbIOResult read_rollback_index(AvbOps *ops,
+                                       size_t rollback_index_location,
+                                       uint64_t *out_rollback_index)
+{
+	if (out_rollback_index != NULL) {
+#ifdef CONFIG_OPTEE_CLIENT
+		int ret;
+		ret = trusty_read_rollback_index(rollback_index_location,
+						 out_rollback_index);
+		if (ret == TEE_ERROR_GENERIC) {
+			*out_rollback_index = 0;
+			ret = trusty_write_rollback_index(rollback_index_location,
+							  *out_rollback_index);
+			if (ret != 0) {
+				printf("%s: init rollback index error\n", __FILE__);
+				return AVB_IO_RESULT_ERROR_IO;
+			}
+			ret = trusty_read_rollback_index(rollback_index_location,
+							 out_rollback_index);
+			if (ret == 0)
+				return AVB_IO_RESULT_OK;
+		} else if (ret == 0) {
+			return AVB_IO_RESULT_OK;
+		} else {
+			printf("trusty_read_rollback_index ret = %x\n", ret);
+			return AVB_IO_RESULT_ERROR_IO;
+		}
+#endif
+	}
+	return AVB_IO_RESULT_ERROR_IO;
+}
+
+static AvbIOResult write_rollback_index(AvbOps *ops,
+                                        size_t rollback_index_location,
+                                        uint64_t rollback_index)
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	if (trusty_write_rollback_index(rollback_index_location, rollback_index)) {
+		printf("%s: Fail to write rollback index\n", __FILE__);
+		return AVB_IO_RESULT_ERROR_IO;
+	}
+	return AVB_IO_RESULT_OK;
+#endif
+	return AVB_IO_RESULT_ERROR_IO;
+}
+
+static AvbIOResult read_is_device_unlocked(AvbOps *ops, bool *out_is_unlocked)
+{
+	if (out_is_unlocked != NULL) {
+#ifdef CONFIG_OPTEE_CLIENT
+		int ret;
+
+		ret = trusty_read_lock_state((uint8_t *)out_is_unlocked);
+		if (ret == TEE_ERROR_GENERIC) {
+			*out_is_unlocked = 1;
+			if (trusty_write_lock_state(*out_is_unlocked)) {
+				printf("%s: init lock state error\n", __FILE__);
+				return AVB_IO_RESULT_ERROR_IO;
+			}
+
+			ret = trusty_read_lock_state((uint8_t *)out_is_unlocked);
+			if(ret == 0)
+				return 0;
+		} else if (ret == 0) {
+			return AVB_IO_RESULT_OK;
+		} else {
+			printf("read_is_device_unlocked ret = %x\n", ret);
+			return AVB_IO_RESULT_ERROR_IO;
+		}
+#endif
+	}
+	return AVB_IO_RESULT_ERROR_IO;
+}
+
+static AvbIOResult write_is_device_unlocked(AvbOps *ops, bool *out_is_unlocked)
+{
+	if (out_is_unlocked != NULL) {
+#ifdef CONFIG_OPTEE_CLIENT
+		if (trusty_write_lock_state(*out_is_unlocked)) {
+			printf("%s: Fail to write lock state\n", __FILE__);
+			return AVB_IO_RESULT_ERROR_IO;
+		}
+		return AVB_IO_RESULT_OK;
+#endif
+	}
+	return AVB_IO_RESULT_ERROR_IO;
+}
+
+static AvbIOResult get_size_of_partition(AvbOps *ops,
+                                         const char *partition,
+                                         uint64_t *out_size_in_bytes)
+{
+	const char *dev_iface = "mmc";
+	int dev_num = 0;
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+
+	dev_desc = blk_get_dev(dev_iface, dev_num);
+	if (!dev_desc) {
+		printf("Could not find %s %d\n", dev_iface, dev_num);
+		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
+	}
+
+	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0) {
+		printf("Could not find \"%s\" partition\n", partition);
+		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
+	}
+	*out_size_in_bytes = (part_info.size) * 512;
+	return AVB_IO_RESULT_OK;
+}
+
+static AvbIOResult get_unique_guid_for_partition(AvbOps *ops,
+                                                 const char *partition,
+                                                 char *guid_buf,
+                                                 size_t guid_buf_size)
+{
+	const char *dev_iface = "mmc";
+	int dev_num = 0;
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+	dev_desc = blk_get_dev(dev_iface, dev_num);
+	if (!dev_desc) {
+		printf("Could not find %s %d\n", dev_iface, dev_num);
+		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
+	}
+
+	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0) {
+		printf("Could not find \"%s\" partition\n", partition);
+		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
+	}
+	if (guid_buf != NULL && guid_buf_size > 0) {
+		memcpy(guid_buf, part_info.uuid, guid_buf_size);
+	}
+	return AVB_IO_RESULT_OK;
+}
+
+/* read permanent attributes from rpmb */
+AvbIOResult avb_read_perm_attr(AvbAtxOps* atx_ops,
+			       AvbAtxPermanentAttributes* attributes)
+{
+	if (attributes != NULL) {
+#ifdef CONFIG_OPTEE_CLIENT
+		trusty_read_permanent_attributes((uint8_t *)attributes,
+						 sizeof(struct AvbAtxPermanentAttributes));
+		return AVB_IO_RESULT_OK;
+#endif
+	}
+
+	return -1;
+}
+
+/*read permanent attributes hash from efuse */
+AvbIOResult avb_read_perm_attr_hash(AvbAtxOps* atx_ops,
+				    uint8_t hash[AVB_SHA256_DIGEST_SIZE])
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	if (trusty_read_attribute_hash((uint32_t *)hash, AVB_SHA256_DIGEST_SIZE / 4))
+		return -1;
+#else
+	avb_error("Please open the macro!\n");
+	return -1;
+#endif
+	return AVB_IO_RESULT_OK;
+}
+
+AvbOps* avb_ops_user_new(void) {
+  AvbOps* ops;
+
+  ops = calloc(1, sizeof(AvbOps));
+  if (ops == NULL) {
+    avb_error("Error allocating memory for AvbOps.\n");
+    goto out;
+  }
+
+  ops->ab_ops = calloc(1, sizeof(AvbABOps));
+  if (ops->ab_ops == NULL) {
+    avb_error("Error allocating memory for AvbABOps.\n");
+    free(ops);
+    goto out;
+  }
+
+  ops->atx_ops = calloc(1, sizeof(AvbAtxOps));
+  if (ops->atx_ops == NULL) {
+    avb_error("Error allocating memory for AvbAtxOps.\n");
+    free(ops->ab_ops);
+    free(ops);
+    goto out;
+  }
+  ops->ab_ops->ops = ops;
+  ops->atx_ops->ops = ops;
+
+  ops->read_from_partition = read_from_partition;
+  ops->write_to_partition = write_to_partition;
+  ops->validate_vbmeta_public_key = validate_vbmeta_public_key;
+  ops->read_rollback_index = read_rollback_index;
+  ops->write_rollback_index = write_rollback_index;
+  ops->read_is_device_unlocked = read_is_device_unlocked;
+  ops->write_is_device_unlocked = write_is_device_unlocked;
+  ops->get_unique_guid_for_partition = get_unique_guid_for_partition;
+  ops->get_size_of_partition = get_size_of_partition;
+  ops->ab_ops->read_ab_metadata = avb_ab_data_read;
+  ops->ab_ops->write_ab_metadata = avb_ab_data_write;
+  ops->atx_ops->read_permanent_attributes = avb_read_perm_attr;
+  ops->atx_ops->read_permanent_attributes_hash = avb_read_perm_attr_hash;
+
+out:
+  return ops;
+}
+
+
+void avb_ops_user_free(AvbOps* ops) {
+  free(ops->ab_ops);
+  free(ops->atx_ops);
+  free(ops);
+}
diff --git a/lib/avb/rk_libavb_user/avb_user_verification.c b/lib/avb/libavb_user/avb_user_verification.c
similarity index 100%
rename from lib/avb/rk_libavb_user/avb_user_verification.c
rename to lib/avb/libavb_user/avb_user_verification.c
diff --git a/lib/avb/rk_libavb_user/avb_user_verity.c b/lib/avb/libavb_user/avb_user_verity.c
similarity index 100%
rename from lib/avb/rk_libavb_user/avb_user_verity.c
rename to lib/avb/libavb_user/avb_user_verity.c
diff --git a/lib/avb/rk_avb_user/Kconfig b/lib/avb/rk_avb_user/Kconfig
new file mode 100644
index 0000000000..b183bfcc72
--- /dev/null
+++ b/lib/avb/rk_avb_user/Kconfig
@@ -0,0 +1,22 @@
+config RK_AVB_LIBAVB_USER
+	bool "Rockchip AVB support"
+	help
+	  This config support the android things system to
+	  read/write hardware image, like vbmeta, misc, and
+	  so on. And it can provide some a/b and avb information
+	  to fastboot and kernel.
+
+config SPL_RK_AVB_LIBAVB_USER
+	bool "Rockchip AVB support for spl"
+	help
+	  This config support the android things system to
+	  read/write hardware image, like vbmeta, misc, and
+	  so on. And it can provide some a/b and avb information
+	  to fastboot and kernel.
+
+config TPL_RK_AVB_LIBAVB_USER
+	bool "Rockchip AVB support for tpl"
+	help
+	  This config support the android things system to
+	  read/write hardware image, like vbmeta, misc, and
+	  so on. And it can provide some a/b and avb information
diff --git a/lib/avb/rk_avb_user/Makefile b/lib/avb/rk_avb_user/Makefile
new file mode 100644
index 0000000000..c636ea7eb3
--- /dev/null
+++ b/lib/avb/rk_avb_user/Makefile
@@ -0,0 +1 @@
+obj-y	+= rk_avb_ops_user.o
diff --git a/lib/avb/rk_avb_user/rk_avb_ops_user.c b/lib/avb/rk_avb_user/rk_avb_ops_user.c
new file mode 100644
index 0000000000..f4a7559ec5
--- /dev/null
+++ b/lib/avb/rk_avb_user/rk_avb_ops_user.c
@@ -0,0 +1,671 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <image.h>
+#include <android_image.h>
+#include <malloc.h>
+#include <mapmem.h>
+#include <errno.h>
+#include <command.h>
+#include <mmc.h>
+#include <blk.h>
+#include <part.h>
+#include <android_avb/avb_ops_user.h>
+#include <android_avb/libavb_ab.h>
+#include <android_avb/avb_atx_validate.h>
+#include <android_avb/avb_atx_types.h>
+#include <optee_include/OpteeClientInterface.h>
+#include <optee_include/tee_api_defines.h>
+#include <android_avb/avb_vbmeta_image.h>
+#include <android_avb/avb_atx_validate.h>
+#include <android_avb/rk_avb_ops_user.h>
+
+/* rk used */
+int rk_avb_read_slot_count(char *slot_count)
+{
+	*slot_count = SLOT_NUM;
+
+	return 0;
+}
+
+int rk_avb_read_slot_suffixes(char *slot_suffixes)
+{
+	memcpy(slot_suffixes, CURR_SYSTEM_SLOT_SUFFIX,
+	       strlen(CURR_SYSTEM_SLOT_SUFFIX));
+
+	return 0;
+}
+
+int rk_avb_set_slot_active(unsigned int *slot_number)
+{
+	AvbOps* ops;
+	ops = avb_ops_user_new();
+	int ret = 0;
+
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return -1;
+	}
+
+	debug("set_slot_active\n");
+	if (avb_ab_mark_slot_active(ops->ab_ops, *slot_number) != 0) {
+		printf("set_slot_active error!\n");
+		ret = -1;
+	}
+
+	avb_ops_user_free(ops);
+	return ret;
+}
+
+static bool slot_is_bootable(AvbABSlotData* slot) {
+	return (slot->priority > 0) && 
+	       (slot->successful_boot || (slot->tries_remaining > 0));
+}
+
+AvbABFlowResult rk_avb_ab_slot_select(AvbABOps* ab_ops,char* select_slot)
+{
+	AvbABFlowResult ret = AVB_AB_FLOW_RESULT_OK;
+	AvbIOResult io_ret = AVB_IO_RESULT_OK;
+	AvbABData ab_data;
+	size_t slot_index_to_boot;
+
+	io_ret = ab_ops->read_ab_metadata(ab_ops, &ab_data);
+	if (io_ret != AVB_IO_RESULT_OK) {
+		avb_error("I/O error while loading A/B metadata.\n");
+		ret = AVB_AB_FLOW_RESULT_ERROR_IO;
+		goto out;
+	}
+	if (slot_is_bootable(&ab_data.slots[0]) && slot_is_bootable(&ab_data.slots[1])) {
+		if (ab_data.slots[1].priority > ab_data.slots[0].priority) {
+			slot_index_to_boot = 1;
+		} else {
+			slot_index_to_boot = 0;
+		}
+	} else if(slot_is_bootable(&ab_data.slots[0])) {
+		slot_index_to_boot = 0;
+	} else if(slot_is_bootable(&ab_data.slots[1])) {
+		slot_index_to_boot = 1;
+	} else {
+		avb_error("No bootable slots found.\n");
+		ret = AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS;
+		goto out;
+	}
+
+	if (slot_index_to_boot == 0) {
+		strcpy(select_slot, "_a");
+	} else if(slot_index_to_boot == 1) {
+		strcpy(select_slot, "_b");
+	}
+out:
+	return ret;
+}
+
+int rk_avb_get_current_slot(char *select_slot)
+{
+	AvbOps* ops;
+	int ret = 0;
+
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return -1;
+	}
+
+	if (rk_avb_ab_slot_select(ops->ab_ops, select_slot) != 0) {
+		printf("get_current_slot error!\n");
+		ret = -1;
+	}
+
+	avb_ops_user_free(ops);
+	return ret;
+}
+
+int rk_avb_read_permanent_attributes(uint8_t *attributes, uint32_t size)
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	if(trusty_read_permanent_attributes(attributes, size) != 0) {
+		printf("trusty_read_permanent_attributes failed!\n");
+		return -1;
+	}
+
+	return 0;
+#else
+	return -1;
+#endif
+}
+
+int rk_avb_write_permanent_attributes(uint8_t *attributes, uint32_t size)
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	if(trusty_write_permanent_attributes(attributes, size) != 0) {
+		printf("trusty_write_permanent_attributes failed!\n");
+		return -1;
+	}
+
+	return 0;
+#else
+	return -1;
+#endif
+}
+
+int rk_avb_read_flash_lock_state(uint8_t *flash_lock_state)
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	int ret;
+
+	ret = trusty_read_flash_lock_state(flash_lock_state);
+	if (ret == TEE_ERROR_GENERIC) {
+		*flash_lock_state = 1;
+		if (trusty_write_flash_lock_state(*flash_lock_state)) {
+			printf("trusty_write_flash_lock_state error!\n");
+			return -1;
+		}
+
+		ret = trusty_read_flash_lock_state(flash_lock_state);
+		if (ret == 0)
+			return 0;
+	} else if (ret == 0) {
+		return 0;
+	} else {
+		printf("avb_read_flash_lock_state ret = %x\n", ret);
+		return -1;
+	}
+#else
+	return -1;
+#endif
+}
+
+int rk_avb_write_flash_lock_state(uint8_t flash_lock_state)
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	if (trusty_write_flash_lock_state(flash_lock_state)) {
+		printf("trusty_write_flash_lock_state error!\n");
+		return -1;
+	}
+
+	return 0;
+#else
+	return -1;
+#endif
+}
+
+int rk_avb_write_lock_state(uint8_t lock_state)
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	if (trusty_write_lock_state(lock_state)) {
+		printf("trusty_write_lock_state error!\n");
+		return -1;
+	}
+
+	return 0;
+#else
+	return -1;
+#endif
+}
+
+int rk_avb_read_lock_state(uint8_t *lock_state)
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	int ret;
+
+	ret = trusty_read_lock_state(lock_state);
+	if (ret == TEE_ERROR_GENERIC) {
+		*lock_state = 1;
+		if (rk_avb_write_lock_state(*lock_state)) {
+			printf("avb_write_lock_state error!\n");
+			return -1;
+		}
+
+		ret = trusty_read_lock_state(lock_state);
+		if (ret == 0)
+			return 0;
+	} else if (ret == 0) {
+		return 0;
+	} else {
+		printf("avb_read_lock_state ret = %x\n", ret);
+		return -1;
+	}
+#else
+	return -1;
+#endif
+}
+
+int rk_avb_write_perm_attr_flag(uint8_t flag)
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	if (trusty_write_permanent_attributes_flag(flag)) {
+		printf("trusty_write_permanent_attributes_flag error!\n");
+		return -1;
+	}
+
+	return 0;
+#else
+	return -1;
+#endif
+}
+
+int rk_avb_read_perm_attr_flag(uint8_t *flag)
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	int ret;
+
+	ret = trusty_read_permanent_attributes_flag(flag);
+	if (ret != TEE_SUCCESS) {
+		*flag = 0;
+		if (rk_avb_write_perm_attr_flag(*flag)) {
+			printf("avb_write_perm_attr_flag error!\n");
+			return -1;
+		}
+
+		ret = trusty_read_permanent_attributes_flag(flag);
+		if (ret == 0)
+			return 0;
+	} else if (ret == 0) {
+		return 0;
+	} else {
+		printf("avb_read_perm_attr_flag ret = %x\n", ret);
+		return -1;
+	}
+#else
+	return -1;
+#endif
+}
+
+int rk_avb_read_vbootkey_hash(uint8_t *buf, uint8_t length)
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	if (trusty_read_vbootkey_hash((uint32_t *)buf,
+				      (uint32_t)length / sizeof(uint32_t))) {
+		printf("trusty_read_vbootkey_hash error!\n");
+		return -1;
+	}
+
+	return 0;
+#else
+	return -1;
+#endif
+}
+
+int rk_avb_write_vbootkey_hash(uint8_t *buf, uint8_t length)
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	if (trusty_write_vbootkey_hash((uint32_t *)buf,
+				       (uint32_t)length / sizeof(uint32_t))) {
+		printf("trusty_write_vbootkey_hash error!\n");
+		return -1;
+	}
+
+	return 0;
+#else
+	return -1;
+#endif
+}
+
+int rk_avb_close_optee_client(void)
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	if(trusty_notify_optee_uboot_end()) {
+		printf("trusty_notify_optee_uboot_end error!\n");
+		return -1;
+	}
+
+	return 0;
+#else
+	return -1;
+#endif
+}
+
+int rk_avb_read_attribute_hash(uint8_t *buf, uint8_t length)
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	if (trusty_read_attribute_hash((uint32_t *)buf,
+	    (uint32_t)(length/sizeof(uint32_t)))) {
+		printf("trusty_read_attribute_hash error!\n");
+		return -1;
+	}
+
+	return 0;
+#else
+	return -1;
+#endif
+}
+
+int rk_avb_write_attribute_hash(uint8_t *buf, uint8_t length)
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	if (trusty_write_attribute_hash((uint32_t *)buf,
+	    (uint32_t)(length/sizeof(uint32_t)))) {
+		printf("trusty_write_attribute_hash error!\n");
+		return -1;
+	}
+
+	return 0;
+#else
+	return -1;
+#endif
+}
+
+static const char* slot_suffixes[2] = {"_a", "_b"};
+
+int rk_avb_read_all_rollback_index(char *buffer)
+{
+	AvbOps* ops;
+	AvbVBMetaImageHeader vbmeta_header;
+	uint64_t stored_rollback_index = 0;
+	uint64_t pik_rollback_index = 0;
+	uint64_t psk_rollback_index = 0;
+	AvbSlotVerifyFlags flags;
+	AvbIOResult io_ret;
+	char temp[ROLLBACK_MAX_SIZE] = {0};
+	AvbAtxPublicKeyMetadata *metadata;
+	int n;
+	bool unlocked;
+	AvbSlotVerifyResult verify_result;
+	AvbSlotVerifyData *slot_data[SLOT_NUM] = {NULL, NULL};
+	const char *requested_partitions[1] = {"vbmeta"};
+
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return -1;
+	}
+
+	if (ops->read_is_device_unlocked(ops, &unlocked) != 0) {
+		printf("Error determining whether device is unlocked.\n");
+		unlocked = ANDROID_VBOOT_UNLOCK;
+		if (ops->write_is_device_unlocked(ops, &unlocked) != 0) {
+			printf("Can not write lock state!\n");
+			unlocked = ANDROID_VBOOT_LOCK;
+		}
+		if (ops->read_is_device_unlocked(ops, &unlocked) != 0) {
+			printf("Can not read lock state!\n");
+			unlocked = ANDROID_VBOOT_LOCK;
+		}
+	}
+
+	flags = AVB_SLOT_VERIFY_FLAGS_NONE;
+	if (unlocked)
+		flags |= AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR;
+
+	for (n = 0; n < SLOT_NUM; n++) {
+		verify_result = avb_slot_verify(ops,
+						requested_partitions,
+						slot_suffixes[n],
+						flags,
+						AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE,
+						&slot_data[n]);
+		switch (verify_result) {
+		case AVB_SLOT_VERIFY_RESULT_OK:
+			break;
+
+		case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA:
+		case AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION:
+		/* Even with AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR
+		 * these mean game over.
+		 */
+			printf("Invalid metadata!\n");
+			goto out;
+
+		/* explicit fallthrough. */
+		case AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION:
+			printf("Error verify!\n");
+			goto out;
+		case AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX:
+			printf("error rollback index!\n");
+			goto out;
+		case AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED:
+			printf("error key!\n");
+			goto out;
+		default:
+			printf("Some abnormal condition occur!\n");
+			goto out;
+		}
+	}
+	debug("partition_name = %s\n", slot_data[0]->vbmeta_images->partition_name);
+	debug("vbmeta_size = %d\n", slot_data[0]->vbmeta_images->vbmeta_size);
+
+	for (n = 0; n < AVB_MAX_NUMBER_OF_ROLLBACK_INDEX_LOCATIONS; n++) {
+		uint64_t rollback_index_value = 0;
+		if (slot_data[0] != NULL && slot_data[1] != NULL) {
+			uint64_t a_rollback_index = slot_data[0]->rollback_indexes[n];
+			uint64_t b_rollback_index = slot_data[1]->rollback_indexes[n];
+			rollback_index_value =
+				(a_rollback_index < b_rollback_index ? a_rollback_index
+								: b_rollback_index);
+		} else if (slot_data[0] != NULL) {
+			rollback_index_value = slot_data[0]->rollback_indexes[n];
+		} else if (slot_data[1] != NULL) {
+			rollback_index_value = slot_data[1]->rollback_indexes[n];
+		}
+
+		io_ret = ops->read_rollback_index(
+			ops, n, &stored_rollback_index);
+		if (io_ret != AVB_IO_RESULT_OK)
+			goto out;
+		snprintf(temp, sizeof(uint64_t) + 1, "%lld",
+			 stored_rollback_index);
+		strncat(buffer, temp, ROLLBACK_MAX_SIZE);
+		strncat(buffer, ":", 1);
+		snprintf(temp, sizeof(uint64_t) + 1, "%lld",
+			 rollback_index_value);
+		strncat(buffer, temp, ROLLBACK_MAX_SIZE);
+		strncat(buffer, ",", 1);
+	}
+
+	for (n = 0; n < SLOT_NUM; n++) {
+		avb_vbmeta_image_header_to_host_byte_order((AvbVBMetaImageHeader *)
+							   slot_data[n]->vbmeta_images->\
+							   vbmeta_data,
+							   &vbmeta_header);
+		if (vbmeta_header.public_key_metadata_size > 0) {
+			metadata = (AvbAtxPublicKeyMetadata *)(slot_data[n]->\
+				vbmeta_images->vbmeta_data +
+			   	sizeof(AvbVBMetaImageHeader) +
+			   	vbmeta_header.authentication_data_block_size +
+			   	vbmeta_header.public_key_metadata_offset);
+			if (n == 0) {
+				pik_rollback_index =
+					metadata->product_intermediate_key_certificate.\
+					signed_data.key_version;
+				psk_rollback_index =
+					metadata->product_signing_key_certificate.\
+					signed_data.key_version;
+			}
+
+			if (pik_rollback_index > metadata->\
+				product_intermediate_key_certificate.\
+				signed_data.key_version) {
+				pik_rollback_index = metadata->\
+				product_intermediate_key_certificate.\
+				signed_data.key_version;
+			}
+
+			if (psk_rollback_index > metadata->\
+				product_signing_key_certificate.\
+				signed_data.key_version) {
+				psk_rollback_index = metadata->\
+				product_signing_key_certificate.\
+				signed_data.key_version;
+			}
+		}
+	}
+	io_ret =
+		ops->read_rollback_index(ops,
+					 AVB_ATX_PIK_VERSION_LOCATION,
+					 &stored_rollback_index);
+	if (io_ret != AVB_IO_RESULT_OK) {
+		avb_error("Failed to read PIK minimum version.\n");
+		goto out;
+	}
+	/* PIK rollback index */
+	snprintf(temp, sizeof(uint64_t) + 1, "%lld", stored_rollback_index);
+	strncat(buffer, temp, ROLLBACK_MAX_SIZE);
+	strncat(buffer, ":", 1);
+	snprintf(temp, sizeof(uint64_t) + 1, "%lld", pik_rollback_index);
+	strncat(buffer, temp, ROLLBACK_MAX_SIZE);
+	strncat(buffer, ",", 1);
+	io_ret = ops->read_rollback_index(ops,
+					  AVB_ATX_PSK_VERSION_LOCATION,
+					  &stored_rollback_index);
+	if (io_ret != AVB_IO_RESULT_OK) {
+		avb_error("Failed to read PSK minimum version.\n");
+		goto out;
+	}
+	/* PSK rollback index */
+	snprintf(temp, sizeof(uint64_t) + 1, "%lld", stored_rollback_index);
+	strncat(buffer, temp, ROLLBACK_MAX_SIZE);
+	strncat(buffer, ":", 1);
+	snprintf(temp, sizeof(uint64_t) + 1, "%lld", psk_rollback_index);
+	strncat(buffer, temp, ROLLBACK_MAX_SIZE);
+	debug("%s\n", buffer);
+
+	for (n = 0; n < SLOT_NUM; n++) {
+		if (slot_data[n] != NULL) {
+			avb_slot_verify_data_free(slot_data[n]);
+		}
+	}
+	avb_ops_user_free(ops);
+
+	return 0;
+out:
+	for (n = 0; n < SLOT_NUM; n++) {
+		if (slot_data[n] != NULL) {
+			avb_slot_verify_data_free(slot_data[n]);
+		}
+	}
+	avb_ops_user_free(ops);
+
+	return -1;
+}
+
+int rk_avb_read_bootloader_locked_flag(uint8_t *flag)
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	if (trusty_read_vbootkey_enable_flag(flag)) {
+		return -1;
+	}
+	return 0;
+#else
+	return -1;
+#endif
+}
+
+void rk_avb_get_at_vboot_state(char *buf)
+{
+	char temp_buffer[150] = {0};
+	char temp_flag = 0;
+	char crlf[2] = {'\n', 0};
+	char *lock_val = NULL;
+	char *unlocK_dis_val = NULL;
+	char *perm_attr_flag = NULL;
+	char *bootloader_locked_flag = NULL;
+	char *lock_state = "bootloader-locked=";
+	char *btld_min_ver = "bootloader-min-versions=";
+	char *avb_perm_attr_set = "avb-perm-attr-set=";
+	char *avb_lock = "avb-locked=";
+	char *avb_unlock_dis = "avb-unlock-disabled=";
+	char *avb_min_ver = "avb-min-versions=";
+
+	if (rk_avb_read_perm_attr_flag((uint8_t *)&temp_flag)) {
+		printf("Can not read perm_attr_flag!\n");
+		perm_attr_flag = "";
+	} else {
+		perm_attr_flag = temp_flag ? "1" : "0";
+	}
+	sprintf(buf, "%s%s%s%s", buf, avb_perm_attr_set, perm_attr_flag, crlf);
+
+	if (rk_avb_read_lock_state((uint8_t *)&temp_flag)) {
+		printf("Can not read lock state!\n");
+		lock_val = "";
+		unlocK_dis_val = "";
+	} else {
+		lock_val = (temp_flag & LOCK_MASK) ? "0" : "1";
+		unlocK_dis_val = (temp_flag & UNLOCK_DISABLE_MASK) ? "1" : "0";
+	}
+	sprintf(buf, "%s%s%s%s%s%s%s", buf, avb_lock, lock_val, crlf,
+		avb_unlock_dis, unlocK_dis_val, crlf);
+
+	if (rk_avb_read_bootloader_locked_flag((uint8_t *)&temp_flag)) {
+		printf("Can not read bootloader locked flag!\n");
+		bootloader_locked_flag = "";
+	} else {
+		bootloader_locked_flag = temp_flag ? "1" : "0";
+	}
+	sprintf(buf, "%s%s%s%s", buf, lock_state, bootloader_locked_flag, crlf);
+
+	if (rk_avb_read_all_rollback_index(temp_buffer))
+		printf("Can not avb_min_ver!\n");
+	sprintf(buf, "%s%s%s%s", buf, avb_min_ver, temp_buffer, crlf);
+
+	/* miniloader is not ready, bootloader-min-versions=-1 */
+	sprintf(buf, "%s%s%d%s", buf, btld_min_ver, -1, crlf);
+}
+
+int rk_avb_get_ab_info(AvbABData* ab_data)
+{
+	AvbOps* ops;
+	AvbIOResult io_ret = AVB_IO_RESULT_OK;
+	int ret = 0;
+
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("%s: avb_ops_user_new() failed!\n", __FILE__);
+		return -1;
+	}
+
+	io_ret = ops->ab_ops->read_ab_metadata(ops->ab_ops, ab_data);
+	if (io_ret != AVB_IO_RESULT_OK) {
+		avb_error("I/O error while loading A/B metadata.\n");
+		ret = -1;
+	}
+
+	avb_ops_user_free(ops);
+
+	return ret;
+}
+
+int rk_avb_get_part_has_slot_info(const char *base_name)
+{
+	char *part_name;
+	int part_num;
+	size_t part_name_len;
+	disk_partition_t part_info;
+	const char *dev_iface = "mmc";
+	struct blk_desc *dev_desc;
+	int dev_num = 0;
+	const char *slot_suffix = "_a";
+
+	dev_desc = blk_get_dev(dev_iface, dev_num);
+	if (!dev_desc) {
+		printf("Could not find %s %d\n", dev_iface, dev_num);
+		return -1;
+	}
+
+	if (base_name == NULL) {
+		printf("The base_name is NULL!\n");
+		return -1;
+	}
+
+	part_name_len = strlen(base_name) + 1;
+	part_name_len += strlen(slot_suffix);
+	part_name = malloc(part_name_len);
+	if (!part_name) {
+		printf("%s can not malloc a buffer!\n", __FILE__);
+		return -1;
+	}
+
+	memset(part_name, 0, part_name_len);
+	snprintf(part_name, part_name_len, "%s%s", base_name, slot_suffix);
+	part_num = part_get_info_by_name(dev_desc, part_name, &part_info);
+	if (part_num < 0) {
+		printf("Could not find partition \"%s\"\n", part_name);
+		part_num = -1;
+	}
+
+	free(part_name);
+	return part_num;
+}
diff --git a/lib/avb/rk_libavb/avb_slot_verify.c b/lib/avb/rk_libavb/avb_slot_verify.c
deleted file mode 100644
index 342144f290..0000000000
--- a/lib/avb/rk_libavb/avb_slot_verify.c
+++ /dev/null
@@ -1,1465 +0,0 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include <android_avb/avb_slot_verify.h>
-#include <android_avb/avb_chain_partition_descriptor.h>
-#include <android_avb/avb_footer.h>
-#include <android_avb/avb_hash_descriptor.h>
-#include <android_avb/avb_kernel_cmdline_descriptor.h>
-#include <android_avb/avb_sha.h>
-#include <android_avb/avb_util.h>
-#include <android_avb/avb_vbmeta_image.h>
-#include <android_avb/avb_version.h>
-
-/* Maximum allow length (in bytes) of a partition name, including
- * ab_suffix.
- */
-#define PART_NAME_MAX_SIZE 32
-
-/* Maximum number of partitions that can be loaded with avb_slot_verify(). */
-#define MAX_NUMBER_OF_LOADED_PARTITIONS 32
-
-/* Maximum number of vbmeta images that can be loaded with avb_slot_verify(). */
-#define MAX_NUMBER_OF_VBMETA_IMAGES 32
-
-/* Maximum size of a vbmeta image - 64 KiB. */
-#define VBMETA_MAX_SIZE (64 * 1024)
-
-/* Helper function to see if we should continue with verification in
- * allow_verification_error=true mode if something goes wrong. See the
- * comments for the avb_slot_verify() function for more information.
- */
-static inline bool result_should_continue(AvbSlotVerifyResult result)
-{
-	switch (result) {
-	case AVB_SLOT_VERIFY_RESULT_ERROR_OOM:
-	case AVB_SLOT_VERIFY_RESULT_ERROR_IO:
-	case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA:
-	case AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION:
-	case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT:
-		return false;
-
-	case AVB_SLOT_VERIFY_RESULT_OK:
-	case AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION:
-	case AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX:
-	case AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED:
-		return true;
-  }
-
-  return false;
-}
-
-static AvbSlotVerifyResult load_and_verify_hash_partition(
-    AvbOps* ops,
-    const char* const* requested_partitions,
-    const char* ab_suffix,
-    bool allow_verification_error,
-    const AvbDescriptor* descriptor,
-    AvbSlotVerifyData* slot_data)
-{
-	AvbHashDescriptor hash_desc;
-	const uint8_t* desc_partition_name = NULL;
-	const uint8_t* desc_salt;
-	const uint8_t* desc_digest;
-	char part_name[PART_NAME_MAX_SIZE];
-	AvbSlotVerifyResult ret;
-	AvbIOResult io_ret;
-	uint8_t* image_buf = NULL;
-	size_t part_num_read;
-	uint8_t* digest;
-	size_t digest_len;
-	const char* found;
-	uint64_t image_size;
-
-	if (!avb_hash_descriptor_validate_and_byteswap(
-		(const AvbHashDescriptor*)descriptor, &hash_desc)) {
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-		goto out;
-	}
-	desc_partition_name = ((const uint8_t*)descriptor) + sizeof(AvbHashDescriptor);
-	desc_salt = desc_partition_name + hash_desc.partition_name_len;
-	desc_digest = desc_salt + hash_desc.salt_len;
-
-	if (!avb_validate_utf8(desc_partition_name, hash_desc.partition_name_len)) {
-		avb_error("Partition name is not valid UTF-8.\n");
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-		goto out;
-	}
-	/* Don't bother loading or validating unless the partition was
-	 * requested in the first place.
-	 */
-	found = avb_strv_find_str(requested_partitions,
-                            (const char*)desc_partition_name,
-                            hash_desc.partition_name_len);
-	if (found == NULL) {
-		ret = AVB_SLOT_VERIFY_RESULT_OK;
-		goto out;
-	}
-	if (!avb_str_concat(part_name,
-                      sizeof part_name,
-                      (const char*)desc_partition_name,
-                      hash_desc.partition_name_len,
-                      ab_suffix,
-                      avb_strlen(ab_suffix))) {
-		avb_error("Partition name and suffix does not fit.\n");
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-		goto out;
-	}
-	/* If we're allowing verification errors then hash_desc.image_size
-	 * may no longer match what's in the partition... so in this case
-	 * just load the entire partition.
-	 *
-	 * For example, this can happen if a developer does 'fastboot flash
-	 * boot /path/to/new/and/bigger/boot.img'. We want this to work
-	 * since it's such a common workflow.
-	 */
-	image_size = hash_desc.image_size;
-	if (0) {
-		if (ops->get_size_of_partition == NULL) {
-			avb_errorv(part_name,
-			": The get_size_of_partition() operation is "
-			"not implemented so we may not load the entire partition. "
-			"Please implement.",
-			NULL);
-		} else {
-			io_ret = ops->get_size_of_partition(ops, part_name, &image_size);
-			if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-				ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-				goto out;
-			} else if (io_ret != AVB_IO_RESULT_OK) {
-				avb_errorv(part_name, ": Error determining partition size.\n", NULL);
-				ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
-				goto out;
-			}
-			avb_debugv(part_name, ": Loading entire partition.\n", NULL);
-		}
-	}
-	image_buf = avb_malloc(image_size);
-	if (image_buf == NULL) {
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-		goto out;
-	}
-	io_ret = ops->read_from_partition(ops, part_name, 0 /* offset */, 
-					image_size, image_buf, &part_num_read);
-	if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-		goto out;
-	} else if (io_ret != AVB_IO_RESULT_OK) {
-		avb_errorv(part_name, ": Error loading data from partition.\n", NULL);
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
-		goto out;
-	}
-	if (part_num_read != image_size) {
-		avb_errorv(part_name, ": Read fewer than requested bytes.\n", NULL);
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
-		goto out;
-	}
-
-	if (avb_strcmp((const char*)hash_desc.hash_algorithm, "sha256") == 0) {
-		AvbSHA256Ctx sha256_ctx;
-		avb_sha256_init(&sha256_ctx);
-		avb_sha256_update(&sha256_ctx, desc_salt, hash_desc.salt_len);
-		avb_sha256_update(&sha256_ctx, image_buf, hash_desc.image_size);
-		digest = avb_sha256_final(&sha256_ctx);
-		digest_len = AVB_SHA256_DIGEST_SIZE;
-	} else if (avb_strcmp((const char*)hash_desc.hash_algorithm, "sha512") == 0) {
-		AvbSHA512Ctx sha512_ctx;
-		avb_sha512_init(&sha512_ctx);
-		avb_sha512_update(&sha512_ctx, desc_salt, hash_desc.salt_len);
-		avb_sha512_update(&sha512_ctx, image_buf, hash_desc.image_size);
-		digest = avb_sha512_final(&sha512_ctx);
-		digest_len = AVB_SHA512_DIGEST_SIZE;
-	} else {
-		avb_errorv(part_name, ": Unsupported hash algorithm.\n", NULL);
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-		goto out;
-	}
-
-	if (digest_len != hash_desc.digest_len) {
-		avb_errorv(
-			part_name, ": Digest in descriptor not of expected size.\n", NULL);
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-		goto out;
-	}
-
-	if (avb_safe_memcmp(digest, desc_digest, digest_len) != 0) {
-		avb_errorv(part_name,
-			": Hash of data does not match digest in descriptor.\n",
-			NULL);
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION;
-		goto out;
-	}
-
-	ret = AVB_SLOT_VERIFY_RESULT_OK;
-
-out:
-	/* If it worked and something was loaded, copy to slot_data. */
-	if ((ret == AVB_SLOT_VERIFY_RESULT_OK || result_should_continue(ret)) &&
-		image_buf != NULL) {
-		AvbPartitionData* loaded_partition;
-		if (slot_data->num_loaded_partitions == MAX_NUMBER_OF_LOADED_PARTITIONS) {
-			avb_errorv(part_name, ": Too many loaded partitions.\n", NULL);
-			ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-			goto fail;
-		}
-		loaded_partition = &slot_data->loaded_partitions[slot_data->num_loaded_partitions++];
-		loaded_partition->partition_name = avb_strdup(found);
-		loaded_partition->data_size = image_size;
-		loaded_partition->data = image_buf;
-		image_buf = NULL;
-	}
-
-fail:
-	if (image_buf != NULL) {
-		avb_free(image_buf);
-	}
-	return ret;
-}
-
-static AvbSlotVerifyResult load_requested_partitions(
-	AvbOps* ops,
-	const char* const* requested_partitions,
-	const char* ab_suffix,
-	AvbSlotVerifyData* slot_data)
-{
-	AvbSlotVerifyResult ret;
-	uint8_t* image_buf = NULL;
-	size_t n;
-
-	if (ops->get_size_of_partition == NULL) {
-		avb_error("get_size_of_partition() not implemented.\n");
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT;
-		goto out;
-	}
-
-	for (n = 0; requested_partitions[n] != NULL; n++) {
-		char part_name[PART_NAME_MAX_SIZE];
-		AvbIOResult io_ret;
-		uint64_t image_size;
-		size_t part_num_read;
-		AvbPartitionData* loaded_partition;
-
-		if (!avb_str_concat(part_name,
-                        sizeof part_name,
-                        requested_partitions[n],
-                        avb_strlen(requested_partitions[n]),
-                        ab_suffix,
-                        avb_strlen(ab_suffix))) {
- 			avb_error("Partition name and suffix does not fit.\n");
-			ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-			goto out;
-		}
-
-		io_ret = ops->get_size_of_partition(ops, part_name, &image_size);
-		if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-			ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-			goto out;
-		} else if (io_ret != AVB_IO_RESULT_OK) {
-			avb_errorv(part_name, ": Error determining partition size.\n", NULL);
-			ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
-			goto out;
-		}
-		avb_debugv(part_name, ": Loading entire partition.\n", NULL);
-
-		image_buf = avb_malloc(image_size);
-		if (image_buf == NULL) {
-			ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-			goto out;
-		}
-
-		io_ret = ops->read_from_partition(
-		ops, part_name, 0 /* offset */, image_size, image_buf, &part_num_read);
-		if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-			ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-			goto out;
-		} else if (io_ret != AVB_IO_RESULT_OK) {
-			avb_errorv(part_name, ": Error loading data from partition.\n", NULL);
-			ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
-			goto out;
-		}
-		if (part_num_read != image_size) {
-			avb_errorv(part_name, ": Read fewer than requested bytes.\n", NULL);
-			ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
-			goto out;
-		}
-
-		/* Move to slot_data. */
-		if (slot_data->num_loaded_partitions == MAX_NUMBER_OF_LOADED_PARTITIONS) {
-			avb_errorv(part_name, ": Too many loaded partitions.\n", NULL);
-			ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-			goto out;
-		}
-		loaded_partition =
-			&slot_data->loaded_partitions[slot_data->num_loaded_partitions++];
-		loaded_partition->partition_name = avb_strdup(requested_partitions[n]);
-		if (loaded_partition->partition_name == NULL) {
-			ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-			goto out;
-		}
-		loaded_partition->data_size = image_size;
-		loaded_partition->data = image_buf;
-		image_buf = NULL;
-	}
-
-	ret = AVB_SLOT_VERIFY_RESULT_OK;
-
-out:
-	if (image_buf != NULL) {
-		avb_free(image_buf);
-	}
-	return ret;
-}
-
-static AvbSlotVerifyResult load_and_verify_vbmeta
-(
-	AvbOps* ops,
-	const char* const* requested_partitions,
-	const char* ab_suffix,
-	bool allow_verification_error,
-	AvbVBMetaImageFlags toplevel_vbmeta_flags,
-	int rollback_index_location,
-	const char* partition_name,
-	size_t partition_name_len,
-	const uint8_t* expected_public_key,
-	size_t expected_public_key_length,
-	AvbSlotVerifyData* slot_data,
-	AvbAlgorithmType* out_algorithm_type)
-{
-	char full_partition_name[PART_NAME_MAX_SIZE];
-	AvbSlotVerifyResult ret;
-	AvbIOResult io_ret;
-	size_t vbmeta_offset;
-	size_t vbmeta_size;
-	uint8_t* vbmeta_buf = NULL;
-	size_t vbmeta_num_read;
-	AvbVBMetaVerifyResult vbmeta_ret;
-	const uint8_t* pk_data;
-	size_t pk_len;
-	AvbVBMetaImageHeader vbmeta_header;
-	uint64_t stored_rollback_index;
-	const AvbDescriptor** descriptors = NULL;
-	size_t num_descriptors;
-	size_t n;
-	bool is_main_vbmeta;
-	bool is_vbmeta_partition;
-	AvbVBMetaData* vbmeta_image_data = NULL;
-
-	ret = AVB_SLOT_VERIFY_RESULT_OK;
-
-	avb_assert(slot_data != NULL);
-
-	/* Since we allow top-level vbmeta in 'boot', use
-	 * rollback_index_location to determine whether we're the main
-	 * vbmeta struct.
-	 */
-	is_main_vbmeta = (rollback_index_location == 0);
-	is_vbmeta_partition = (avb_strcmp(partition_name, "vbmeta") == 0);
-
-	if (!avb_validate_utf8((const uint8_t*)partition_name, partition_name_len)) {
-		avb_error("Partition name is not valid UTF-8.\n");
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-		goto out;
-	}
-
-	/* Construct full partition name. */
-	if (!avb_str_concat(full_partition_name,
-		sizeof full_partition_name,
-		partition_name,
-		partition_name_len,
-		ab_suffix,
-		avb_strlen(ab_suffix))) {
-		avb_error("Partition name and suffix does not fit.\n");
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-		goto out;
-	}
-
-	avb_debugv("Loading vbmeta struct from partition '",
-		full_partition_name,
-		"'.\n",
-		NULL);
-
-	/* If we're loading from the main vbmeta partition, the vbmeta
-	 * struct is in the beginning. Otherwise we have to locate it via a
-	 * footer.
-	 */
-	if (is_vbmeta_partition) {
-		vbmeta_offset = 0;
-		vbmeta_size = VBMETA_MAX_SIZE;
-	} else {
-		uint8_t footer_buf[AVB_FOOTER_SIZE];
-		size_t footer_num_read;
-		AvbFooter footer;
-
-		io_ret = ops->read_from_partition(ops,
-					full_partition_name,
-					-AVB_FOOTER_SIZE,
-					AVB_FOOTER_SIZE,
-					footer_buf,
-					&footer_num_read);
-		if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-			ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-			goto out;
-		} else if (io_ret != AVB_IO_RESULT_OK) {
-			avb_errorv(full_partition_name, ": Error loading footer.\n", NULL);
-			ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
-			goto out;
-		}
-		avb_assert(footer_num_read == AVB_FOOTER_SIZE);
-
-		if (!avb_footer_validate_and_byteswap((const AvbFooter*)footer_buf,&footer)) {
-			avb_errorv(full_partition_name, ": Error validating footer.\n", NULL);
-			ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-			goto out;
-		}
-
-		/* Basic footer sanity check since the data is untrusted. */
-		if (footer.vbmeta_size > VBMETA_MAX_SIZE) {
-			avb_errorv(full_partition_name, ": Invalid vbmeta size in footer.\n", NULL);
-			ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-			goto out;
-		}
-
-		vbmeta_offset = footer.vbmeta_offset;
-		vbmeta_size = footer.vbmeta_size;
-	}
-
-	vbmeta_buf = avb_malloc(vbmeta_size);
-	if (vbmeta_buf == NULL) {
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-		goto out;
-	}
-	io_ret = ops->read_from_partition(ops,
-					full_partition_name,
-					vbmeta_offset,
-					vbmeta_size,
-					vbmeta_buf,
-					&vbmeta_num_read);
-	if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-		goto out;
-	} else if (io_ret != AVB_IO_RESULT_OK) {
-		/* If we're looking for 'vbmeta' but there is no such partition,
-		* go try to get it from the boot partition instead.
-		*/
-		if (is_main_vbmeta && io_ret == AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION && is_vbmeta_partition) {
-			avb_debugv(full_partition_name,
-			": No such partition. Trying 'boot' instead.\n",
-			NULL);
-			ret = load_and_verify_vbmeta(ops,
-					requested_partitions,
-					ab_suffix,
-					allow_verification_error,
-					0 /* toplevel_vbmeta_flags */,
-					0 /* rollback_index_location */,
-					"boot",
-					avb_strlen("boot"),
-					NULL /* expected_public_key */,
-					0 /* expected_public_key_length */,
-					slot_data,
-					out_algorithm_type);
-			goto out;
-		} else {
-			avb_errorv(full_partition_name, ": Error loading vbmeta data.\n", NULL);
-			ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
-			goto out;
-		}
-	}
-	avb_assert(vbmeta_num_read <= vbmeta_size);
-	/* Check if the image is properly signed and get the public key used
-	 * to sign the image.
-	 */
-	vbmeta_ret = avb_vbmeta_image_verify(vbmeta_buf, vbmeta_num_read, &pk_data, &pk_len);
-	switch (vbmeta_ret) {
-	case AVB_VBMETA_VERIFY_RESULT_OK:
-		avb_assert(pk_data != NULL && pk_len > 0);
-		break;
-
-	case AVB_VBMETA_VERIFY_RESULT_OK_NOT_SIGNED:
-	case AVB_VBMETA_VERIFY_RESULT_HASH_MISMATCH:
-	case AVB_VBMETA_VERIFY_RESULT_SIGNATURE_MISMATCH:
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION;
-		avb_errorv(full_partition_name,
-			": Error verifying vbmeta image: ",
-			avb_vbmeta_verify_result_to_string(vbmeta_ret),
-			"\n",
-			NULL);
-		if (!allow_verification_error) {
-			goto out;
-		}
-		break;
-
-	case AVB_VBMETA_VERIFY_RESULT_INVALID_VBMETA_HEADER:
-		/* No way to continue this case. */
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-		avb_errorv(full_partition_name,
-			": Error verifying vbmeta image: invalid vbmeta header\n",
-			NULL);
-		goto out;
-
-	case AVB_VBMETA_VERIFY_RESULT_UNSUPPORTED_VERSION:
-		/* No way to continue this case. */
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION;
-		avb_errorv(full_partition_name,
-			": Error verifying vbmeta image: unsupported AVB version\n",
-			NULL);
-		goto out;
-	}
-
-	/* Byteswap the header. */
-	avb_vbmeta_image_header_to_host_byte_order((AvbVBMetaImageHeader*)vbmeta_buf,
-                                             &vbmeta_header);
-
-	/* If we're the toplevel, assign flags so they'll be passed down. */
-	if (is_main_vbmeta) {
-		toplevel_vbmeta_flags = (AvbVBMetaImageFlags)vbmeta_header.flags;
-	} else {
-		if (vbmeta_header.flags != 0) {
-			ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-			avb_errorv(full_partition_name,
-				": chained vbmeta image has non-zero flags\n",
-				NULL);
-			goto out;
-		}
-	}
-
-	/* Check if key used to make signature matches what is expected. */
-	if (pk_data != NULL) {
-		if (expected_public_key != NULL) {
-			avb_assert(!is_main_vbmeta);
-			if (expected_public_key_length != pk_len ||
-			avb_safe_memcmp(expected_public_key, pk_data, pk_len) != 0) {
-				avb_errorv(full_partition_name,
-					": Public key used to sign data does not match key in chain "
-					"partition descriptor.\n",
-					NULL);
-				ret = AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED;
-				if (!allow_verification_error) {
-					goto out;
-				}
-			}
-		} else {
-			bool key_is_trusted = false;
-			const uint8_t* pk_metadata = NULL;
-			size_t pk_metadata_len = 0;
-
-			if (vbmeta_header.public_key_metadata_size > 0) {
-				pk_metadata = vbmeta_buf + sizeof(AvbVBMetaImageHeader) +
-				vbmeta_header.authentication_data_block_size +
-				vbmeta_header.public_key_metadata_offset;
-				pk_metadata_len = vbmeta_header.public_key_metadata_size;
-			}
-
-			avb_assert(is_main_vbmeta);
-			io_ret = ops->validate_vbmeta_public_key(
-				ops, pk_data, pk_len, pk_metadata, pk_metadata_len, &key_is_trusted);
-			if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-				ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-				goto out;
-			} else if (io_ret != AVB_IO_RESULT_OK) {
-				avb_errorv(full_partition_name,
-				": Error while checking public key used to sign data.\n",
-				NULL);
-				ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
-				goto out;
-			}
-			if (!key_is_trusted) {
-				avb_errorv(full_partition_name,
-				": Public key used to sign data rejected.\n",
-				NULL);
-				ret = AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED;
-				if (!allow_verification_error) {
-					goto out;
-				}
-			}
-		}
-	}
-
-	/* Check rollback index. */
-	io_ret = ops->read_rollback_index(
-		ops, rollback_index_location, &stored_rollback_index);
-	if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-		goto out;
-	} else if (io_ret != AVB_IO_RESULT_OK) {
-		avb_errorv(full_partition_name,
-			": Error getting rollback index for location.\n",
-			NULL);
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
-		goto out;
-	}
-	if (vbmeta_header.rollback_index < stored_rollback_index) {
-		avb_errorv(
-			full_partition_name,
-			": Image rollback index is less than the stored rollback index.\n",
-			NULL);
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX;
-		if (!allow_verification_error) {
-			goto out;
-		}
-	}
-
-	/* Copy vbmeta to vbmeta_images before recursing. */
-	if (is_main_vbmeta) {
-		avb_assert(slot_data->num_vbmeta_images == 0);
-	} else {
-		avb_assert(slot_data->num_vbmeta_images > 0);
-	}
-	if (slot_data->num_vbmeta_images == MAX_NUMBER_OF_VBMETA_IMAGES) {
-		avb_errorv(full_partition_name, ": Too many vbmeta images.\n", NULL);
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-		goto out;
-	}
-	vbmeta_image_data = &slot_data->vbmeta_images[slot_data->num_vbmeta_images++];
-	vbmeta_image_data->partition_name = avb_strdup(partition_name);
-	vbmeta_image_data->vbmeta_data = vbmeta_buf;
-	/* Note that |vbmeta_buf| is actually |vbmeta_num_read| bytes long
-	 * and this includes data past the end of the image. Pass the
-	 * actual size of the vbmeta image. Also, no need to use
-	 * avb_safe_add() since the header has already been verified.
-	 */
-	vbmeta_image_data->vbmeta_size =
-	sizeof(AvbVBMetaImageHeader) +
-	vbmeta_header.authentication_data_block_size +
-	vbmeta_header.auxiliary_data_block_size;
-	vbmeta_image_data->verify_result = vbmeta_ret;
-  /* If verification has been disabled by setting a bit in the image,
-   * we're done... except that we need to load the entirety of the
-   * requested partitions.
-   */
-  if (vbmeta_header.flags & AVB_VBMETA_IMAGE_FLAGS_VERIFICATION_DISABLED) {
-    AvbSlotVerifyResult sub_ret;
-    avb_debugv(
-        full_partition_name, ": VERIFICATION_DISABLED bit is set.\n", NULL);
-    /* If load_requested_partitions() fail it is always a fatal
-     * failure (e.g. ERROR_INVALID_ARGUMENT, ERROR_OOM, etc.) rather
-     * than recoverable (e.g. one where result_should_continue()
-     * returns true) and we want to convey that error.
-     */
-    sub_ret = load_requested_partitions(
-        ops, requested_partitions, ab_suffix, slot_data);
-    if (sub_ret != AVB_SLOT_VERIFY_RESULT_OK) {
-      ret = sub_ret;
-    }
-    goto out;
-  }
-	/* Now go through all descriptors and take the appropriate action:
-	 *
-	 * - hash descriptor: Load data from partition, calculate hash, and
-	 *   checks that it matches what's in the hash descriptor.
-	 *
-	 * - hashtree descriptor: Do nothing since verification happens
-	 *   on-the-fly from within the OS.
-	 *
-	 * - chained partition descriptor: Load the footer, load the vbmeta
-	 *   image, verify vbmeta image (includes rollback checks, hash
-	 *   checks, bail on chained partitions).
-	 */
-	descriptors =
-	avb_descriptor_get_all(vbmeta_buf, vbmeta_num_read, &num_descriptors);
-	for (n = 0; n < num_descriptors; n++) {
-		AvbDescriptor desc;
-
-		if (!avb_descriptor_validate_and_byteswap(descriptors[n], &desc)) {
-			avb_errorv(full_partition_name, ": Descriptor is invalid.\n", NULL);
-			ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-			goto out;
-		}
-
-		switch (desc.tag) {
-		case AVB_DESCRIPTOR_TAG_HASH: {
-			AvbSlotVerifyResult sub_ret;
-			sub_ret = load_and_verify_hash_partition(ops,
-                                                 requested_partitions,
-                                                 ab_suffix,
-                                                 allow_verification_error,
-                                                 descriptors[n],
-                                                 slot_data);
-			if (sub_ret != AVB_SLOT_VERIFY_RESULT_OK) {
-				ret = sub_ret;
-				if (!allow_verification_error || !result_should_continue(ret)) {
-					goto out;
-				}
-			}
-		} break;
-
-		case AVB_DESCRIPTOR_TAG_CHAIN_PARTITION: {
-			AvbSlotVerifyResult sub_ret;
-			AvbChainPartitionDescriptor chain_desc;
-			const uint8_t* chain_partition_name;
-			const uint8_t* chain_public_key;
-
-			/* Only allow CHAIN_PARTITION descriptors in the main vbmeta image. */
-			if (!is_main_vbmeta) {
-				avb_errorv(full_partition_name,
-                     			": Encountered chain descriptor not in main image.\n",
-                     			NULL);
-				ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-				goto out;
-			}
-
-			if (!avb_chain_partition_descriptor_validate_and_byteswap(
-				(AvbChainPartitionDescriptor*)descriptors[n], &chain_desc)) {
-				avb_errorv(full_partition_name,
-                    			 ": Chain partition descriptor is invalid.\n",
-                    			 NULL);
-				ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-				goto out;
-			}
-
-			if (chain_desc.rollback_index_location == 0) {
-				avb_errorv(full_partition_name,
-                     			": Chain partition has invalid "
-                     			"rollback_index_location field.\n",
-                    			 NULL);
-				ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-				goto out;
-			}
-
-			chain_partition_name = ((const uint8_t*)descriptors[n]) +
-                               sizeof(AvbChainPartitionDescriptor);
-			chain_public_key = chain_partition_name + chain_desc.partition_name_len;
-
-			sub_ret = load_and_verify_vbmeta(ops,
-                                         requested_partitions,
-                                         ab_suffix,
-                                         allow_verification_error,
-                                         toplevel_vbmeta_flags,
-                                         chain_desc.rollback_index_location,
-                                         (const char*)chain_partition_name,
-                                         chain_desc.partition_name_len,
-                                         chain_public_key,
-                                         chain_desc.public_key_len,
-                                         slot_data,
-                                         NULL /* out_algorithm_type */);
-			if (sub_ret != AVB_SLOT_VERIFY_RESULT_OK) {
-				ret = sub_ret;
-				if (!result_should_continue(ret)) {
-					goto out;
-				}
-			}
-		} break;
-
-		case AVB_DESCRIPTOR_TAG_KERNEL_CMDLINE: {
-			const uint8_t* kernel_cmdline;
-			AvbKernelCmdlineDescriptor kernel_cmdline_desc;
-			bool apply_cmdline;
-
-			if (!avb_kernel_cmdline_descriptor_validate_and_byteswap(
-				(AvbKernelCmdlineDescriptor*)descriptors[n],
-				&kernel_cmdline_desc)) {
-				avb_errorv(full_partition_name,
-                     			": Kernel cmdline descriptor is invalid.\n",
-                     			NULL);
-				ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-				goto out;
-			}
-
-			kernel_cmdline = ((const uint8_t*)descriptors[n]) +
-				sizeof(AvbKernelCmdlineDescriptor);
-
-			if (!avb_validate_utf8(kernel_cmdline,
-                               kernel_cmdline_desc.kernel_cmdline_length)) {
-				avb_errorv(full_partition_name,
-                     			": Kernel cmdline is not valid UTF-8.\n",
-                     			NULL);
-				ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-				goto out;
-			}
-
-			/* Compare the flags for top-level VBMeta struct with flags in
-			 * the command-line descriptor so command-line snippets only
-			 * intended for a certain mode (dm-verity enabled/disabled)
-			 * are skipped if applicable.
-			 */
-			apply_cmdline = true;
-			if (toplevel_vbmeta_flags & AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED) {
-				if (kernel_cmdline_desc.flags &
-  					AVB_KERNEL_CMDLINE_FLAGS_USE_ONLY_IF_HASHTREE_NOT_DISABLED) {
-					apply_cmdline = false;
-				}
-			} else {
-				if (kernel_cmdline_desc.flags &
-					AVB_KERNEL_CMDLINE_FLAGS_USE_ONLY_IF_HASHTREE_DISABLED) {
-					apply_cmdline = false;
-				}
-			}
-
-			if (apply_cmdline) {
-				if (slot_data->cmdline == NULL) {
-					slot_data->cmdline =
-					avb_calloc(kernel_cmdline_desc.kernel_cmdline_length + 1);
-					if (slot_data->cmdline == NULL) {
-						ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-						goto out;
-					}
-					avb_memcpy(slot_data->cmdline,
-                       				kernel_cmdline,
-                       				kernel_cmdline_desc.kernel_cmdline_length);
-					} else {
-					/* new cmdline is: <existing_cmdline> + ' ' + <newcmdline> + '\0' */
-					size_t orig_size = avb_strlen(slot_data->cmdline);
-					size_t new_size =
-                				orig_size + 1 + kernel_cmdline_desc.kernel_cmdline_length + 1;
-					char* new_cmdline = avb_calloc(new_size);
-					if (new_cmdline == NULL) {
-						ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-						goto out;
-					}
-					avb_memcpy(new_cmdline, slot_data->cmdline, orig_size);
-					new_cmdline[orig_size] = ' ';
-					avb_memcpy(new_cmdline + orig_size + 1,
- 					kernel_cmdline,
-					kernel_cmdline_desc.kernel_cmdline_length);
-					avb_free(slot_data->cmdline);
-					slot_data->cmdline = new_cmdline;
-				}
-			}
-		} break;
-
-		/* Explicit fall-through */
-		case AVB_DESCRIPTOR_TAG_PROPERTY:
-		case AVB_DESCRIPTOR_TAG_HASHTREE:
-		/* Do nothing. */
-		break;
-		}
-	}
-
-	if (rollback_index_location >= AVB_MAX_NUMBER_OF_ROLLBACK_INDEX_LOCATIONS) {
-		avb_errorv(
-		full_partition_name, ": Invalid rollback_index_location.\n", NULL);
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-		goto out;
-	}
-
-	slot_data->rollback_indexes[rollback_index_location] =
-		vbmeta_header.rollback_index;
-
-	if (out_algorithm_type != NULL) {
-		*out_algorithm_type = (AvbAlgorithmType)vbmeta_header.algorithm_type;
-	}
-
-out:
-	/* If |vbmeta_image_data| isn't NULL it means that it adopted
-	 * |vbmeta_buf| so in that case don't free it here.
-	 */
-	if (vbmeta_image_data == NULL) {
-		if (vbmeta_buf != NULL) {
-			avb_free(vbmeta_buf);
-		}
-	}
-	if (descriptors != NULL) {
-		avb_free(descriptors);
-	}
-	return ret;
-}
-
-#define NUM_GUIDS 3
-
-/* Substitutes all variables (e.g. $(ANDROID_SYSTEM_PARTUUID)) with
- * values. Returns NULL on OOM, otherwise the cmdline with values
- * replaced.
- */
-static char* sub_cmdline(AvbOps* ops,
-                         const char* cmdline,
-                         const char* ab_suffix,
-                         bool using_boot_for_vbmeta)
-{
-	const char* part_name_str[NUM_GUIDS] = {"system", "boot", "vbmeta"};
-	const char* replace_str[NUM_GUIDS] = {"$(ANDROID_SYSTEM_PARTUUID)",
-                                        "$(ANDROID_BOOT_PARTUUID)",
-                                        "$(ANDROID_VBMETA_PARTUUID)"};
-	char* ret = NULL;
-	AvbIOResult io_ret;
-	size_t n;
-
-	/* Special-case for when the top-level vbmeta struct is in the boot
-	 * partition.
-	 */
-	if (using_boot_for_vbmeta) {
-		part_name_str[2] = "boot";
-	}
-
-	/* Replace unique partition GUIDs */
-	for (n = 0; n < NUM_GUIDS; n++) {
-		char part_name[PART_NAME_MAX_SIZE];
-		char guid_buf[37];
-
-		if (!avb_str_concat(part_name,
-                        	sizeof part_name,
-                        	part_name_str[n],
-                        	avb_strlen(part_name_str[n]),
-                        	ab_suffix,
-                        	avb_strlen(ab_suffix))) {
-			avb_error("Partition name and suffix does not fit.\n");
-			goto fail;
-		}
-
-		io_ret = ops->get_unique_guid_for_partition(
-			ops, part_name, guid_buf, sizeof guid_buf);
-		if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-			return NULL;
-		} else if (io_ret != AVB_IO_RESULT_OK) {
-			avb_error("Error getting unique GUID for partition.\n");
-			goto fail;
-		}
-
-		if (ret == NULL) {
-			ret = avb_replace(cmdline, replace_str[n], guid_buf);
-		} else {
-			char* new_ret = avb_replace(ret, replace_str[n], guid_buf);
-			avb_free(ret);
- 			ret = new_ret;
-		}
-		if (ret == NULL) {
-			goto fail;
-		}
-	}
-
-	return ret;
-
-fail:
-	if (ret != NULL) {
-		avb_free(ret);
-	}
-	return NULL;
-}
-
-static int cmdline_append_option(AvbSlotVerifyData* slot_data,
-                                 const char* key,
-                                 const char* value)
-{
-	size_t offset, key_len, value_len;
-	char* new_cmdline;
-
-	key_len = avb_strlen(key);
-	value_len = avb_strlen(value);
-
-	offset = 0;
-	if (slot_data->cmdline != NULL) {
-		offset = avb_strlen(slot_data->cmdline);
-		if (offset > 0) {
-			offset += 1;
-		}
-	}
-
-	new_cmdline = avb_calloc(offset + key_len + value_len + 2);
-	if (new_cmdline == NULL) {
-		return 0;
-	}
-	if (offset > 0) {
-		avb_memcpy(new_cmdline, slot_data->cmdline, offset - 1);
-		new_cmdline[offset - 1] = ' ';
-	}
-	avb_memcpy(new_cmdline + offset, key, key_len);
-	new_cmdline[offset + key_len] = '=';
-	avb_memcpy(new_cmdline + offset + key_len + 1, value, value_len);
-	if (slot_data->cmdline != NULL) {
-		avb_free(slot_data->cmdline);
-	}
-	slot_data->cmdline = new_cmdline;
-
-	return 1;
-}
-
-#define AVB_MAX_DIGITS_UINT64 32
-
-/* Writes |value| to |digits| in base 10 followed by a NUL byte.
- * Returns number of characters written excluding the NUL byte.
- */
-static size_t uint64_to_base10(uint64_t value,
-                               char digits[AVB_MAX_DIGITS_UINT64])
-{
-	char rev_digits[AVB_MAX_DIGITS_UINT64];
-	size_t n, num_digits;
-
-	for (num_digits = 0; num_digits < AVB_MAX_DIGITS_UINT64 - 1;) {
-		rev_digits[num_digits++] = (value % 10) + '0';
-		value /= 10;
-		if (value == 0) {
-			break;
-		}
-	}
-
-	for (n = 0; n < num_digits; n++) {
-		digits[n] = rev_digits[num_digits - 1 - n];
-	}
-	digits[n] = '\0';
-	return n;
-}
-
-static int cmdline_append_version(AvbSlotVerifyData* slot_data,
-                                  const char* key,
-                                  uint64_t major_version,
-                                  uint64_t minor_version)
-{
-	char major_digits[AVB_MAX_DIGITS_UINT64];
-	char minor_digits[AVB_MAX_DIGITS_UINT64];
-	char combined[AVB_MAX_DIGITS_UINT64 * 2 + 1];
-	size_t num_major_digits, num_minor_digits;
-
-	num_major_digits = uint64_to_base10(major_version, major_digits);
-	num_minor_digits = uint64_to_base10(minor_version, minor_digits);
-	avb_memcpy(combined, major_digits, num_major_digits);
-	combined[num_major_digits] = '.';
-	avb_memcpy(combined + num_major_digits + 1, minor_digits, num_minor_digits);
-	combined[num_major_digits + 1 + num_minor_digits] = '\0';
-
-	return cmdline_append_option(slot_data, key, combined);
-}
-
-static int cmdline_append_uint64_base10(AvbSlotVerifyData* slot_data,
-                                        const char* key,
-                                        uint64_t value)
-{
-	char digits[AVB_MAX_DIGITS_UINT64];
-	uint64_to_base10(value, digits);
-	return cmdline_append_option(slot_data, key, digits);
-}
-
-static int cmdline_append_hex(AvbSlotVerifyData* slot_data,
-                              const char* key,
-                              const uint8_t* data,
-                              size_t data_len)
-{
-	char hex_digits[17] = "0123456789abcdef";
-	char* hex_data;
-	int ret;
-	size_t n;
-
-	hex_data = avb_malloc(data_len * 2 + 1);
-	if (hex_data == NULL) {
-		return 0;
-	}
-
-	for (n = 0; n < data_len; n++) {
-		hex_data[n * 2] = hex_digits[data[n] >> 4];
-		hex_data[n * 2 + 1] = hex_digits[data[n] & 0x0f];
-	}
-	hex_data[n * 2] = '\0';
-
-	ret = cmdline_append_option(slot_data, key, hex_data);
-	avb_free(hex_data);
-	return ret;
-}
-
-static AvbSlotVerifyResult append_options(
-    AvbOps* ops,
-    AvbSlotVerifyData* slot_data,
-    AvbVBMetaImageHeader* toplevel_vbmeta,
-    AvbAlgorithmType algorithm_type,
-    AvbHashtreeErrorMode hashtree_error_mode) {
-  AvbSlotVerifyResult ret;
-  const char* verity_mode = NULL;
-  bool is_device_unlocked;
-  AvbIOResult io_ret;
-
-  /* Add androidboot.vbmeta.device option. */
-  if (!cmdline_append_option(slot_data,
-                             "androidboot.vbmeta.device",
-                             "PARTUUID=$(ANDROID_VBMETA_PARTUUID)")) {
-    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-    goto out;
-  }
-
-  /* Add androidboot.vbmeta.avb_version option. */
-  if (!cmdline_append_version(slot_data,
-                              "androidboot.vbmeta.avb_version",
-                              AVB_VERSION_MAJOR,
-                              AVB_VERSION_MINOR)) {
-    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-    goto out;
-  }
-
-  /* Set androidboot.avb.device_state to "locked" or "unlocked". */
-  io_ret = ops->read_is_device_unlocked(ops, &is_device_unlocked);
-  if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-    goto out;
-  } else if (io_ret != AVB_IO_RESULT_OK) {
-    avb_error("Error getting device state.\n");
-    ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
-    goto out;
-  }
-  if (!cmdline_append_option(slot_data,
-                             "androidboot.vbmeta.device_state",
-                             is_device_unlocked ? "unlocked" : "locked")) {
-    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-    goto out;
-  }
-
-  /* Set androidboot.vbmeta.{hash_alg, size, digest} - use same hash
-   * function as is used to sign vbmeta.
-   */
-  switch (algorithm_type) {
-    /* Explicit fallthrough. */
-    case AVB_ALGORITHM_TYPE_NONE:
-    case AVB_ALGORITHM_TYPE_SHA256_RSA2048:
-    case AVB_ALGORITHM_TYPE_SHA256_RSA4096:
-    case AVB_ALGORITHM_TYPE_SHA256_RSA8192: {
-      AvbSHA256Ctx ctx;
-      size_t n, total_size = 0;
-      avb_sha256_init(&ctx);
-      for (n = 0; n < slot_data->num_vbmeta_images; n++) {
-        avb_sha256_update(&ctx,
-                          slot_data->vbmeta_images[n].vbmeta_data,
-                          slot_data->vbmeta_images[n].vbmeta_size);
-        total_size += slot_data->vbmeta_images[n].vbmeta_size;
-      }
-      if (!cmdline_append_option(
-              slot_data, "androidboot.vbmeta.hash_alg", "sha256") ||
-          !cmdline_append_uint64_base10(
-              slot_data, "androidboot.vbmeta.size", total_size) ||
-          !cmdline_append_hex(slot_data,
-                              "androidboot.vbmeta.digest",
-                              avb_sha256_final(&ctx),
-                              AVB_SHA256_DIGEST_SIZE)) {
-        ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-        goto out;
-      }
-    } break;
-    /* Explicit fallthrough. */
-    case AVB_ALGORITHM_TYPE_SHA512_RSA2048:
-    case AVB_ALGORITHM_TYPE_SHA512_RSA4096:
-    case AVB_ALGORITHM_TYPE_SHA512_RSA8192: {
-      AvbSHA512Ctx ctx;
-      size_t n, total_size = 0;
-      avb_sha512_init(&ctx);
-      for (n = 0; n < slot_data->num_vbmeta_images; n++) {
-        avb_sha512_update(&ctx,
-                          slot_data->vbmeta_images[n].vbmeta_data,
-                          slot_data->vbmeta_images[n].vbmeta_size);
-        total_size += slot_data->vbmeta_images[n].vbmeta_size;
-      }
-      if (!cmdline_append_option(
-              slot_data, "androidboot.vbmeta.hash_alg", "sha512") ||
-          !cmdline_append_uint64_base10(
-              slot_data, "androidboot.vbmeta.size", total_size) ||
-          !cmdline_append_hex(slot_data,
-                              "androidboot.vbmeta.digest",
-                              avb_sha512_final(&ctx),
-                              AVB_SHA512_DIGEST_SIZE)) {
-        ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-        goto out;
-      }
-    } break;
-    case _AVB_ALGORITHM_NUM_TYPES:
-      avb_assert_not_reached();
-      break;
-  }
-
-  /* Set androidboot.veritymode and androidboot.vbmeta.invalidate_on_error */
-  if (toplevel_vbmeta->flags & AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED) {
-    verity_mode = "disabled";
-  } else {
-    const char* dm_verity_mode = NULL;
-    char* new_ret;
-
-    switch (hashtree_error_mode) {
-      case AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE:
-        if (!cmdline_append_option(
-                slot_data, "androidboot.vbmeta.invalidate_on_error", "yes")) {
-          ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-          goto out;
-        }
-        verity_mode = "enforcing";
-        dm_verity_mode = "restart_on_corruption";
-        break;
-      case AVB_HASHTREE_ERROR_MODE_RESTART:
-        verity_mode = "enforcing";
-        dm_verity_mode = "restart_on_corruption";
-        break;
-      case AVB_HASHTREE_ERROR_MODE_EIO:
-        verity_mode = "eio";
-        /* For now there's no option to specify the EIO mode. So
-         * just use 'ignore_zero_blocks' since that's already set
-         * and dm-verity-target.c supports specifying this multiple
-         * times.
-         */
-        dm_verity_mode = "ignore_zero_blocks";
-        break;
-      case AVB_HASHTREE_ERROR_MODE_LOGGING:
-        verity_mode = "logging";
-        dm_verity_mode = "ignore_corruption";
-        break;
-    }
-    new_ret = avb_replace(
-        slot_data->cmdline, "$(ANDROID_VERITY_MODE)", dm_verity_mode);
-    avb_free(slot_data->cmdline);
-    slot_data->cmdline = new_ret;
-    if (slot_data->cmdline == NULL) {
-      ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-      goto out;
-    }
-  }
-  if (!cmdline_append_option(
-          slot_data, "androidboot.veritymode", verity_mode)) {
-    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-    goto out;
-  }
-
-  ret = AVB_SLOT_VERIFY_RESULT_OK;
-
-out:
-
-  return ret;
-}
-
-AvbSlotVerifyResult avb_slot_verify(AvbOps* ops,
-                                    const char* const* requested_partitions,
-                                    const char* ab_suffix,
-                                    AvbSlotVerifyFlags flags,
-                                    AvbHashtreeErrorMode hashtree_error_mode,
-                                    AvbSlotVerifyData** out_data)
-{
-	AvbSlotVerifyResult ret;
-	AvbSlotVerifyData* slot_data = NULL;
-	AvbAlgorithmType algorithm_type = AVB_ALGORITHM_TYPE_SHA256_RSA4096;
-	bool using_boot_for_vbmeta = false;
-	AvbVBMetaImageHeader toplevel_vbmeta;
-	bool allow_verification_error =
-		(flags & AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR);
-
-	/* Fail early if we're missing the AvbOps needed for slot verification.
-	 *
-	 * For now, handle get_size_of_partition() not being implemented. In
-	 * a later release we may change that.
-	 */
-	avb_assert(ops->read_is_device_unlocked != NULL);
-	avb_assert(ops->read_from_partition != NULL);
-	avb_assert(ops->validate_vbmeta_public_key != NULL);
-	avb_assert(ops->read_rollback_index != NULL);
-	avb_assert(ops->get_unique_guid_for_partition != NULL);
-	/* avb_assert(ops->get_size_of_partition != NULL); */
-
-	if (out_data != NULL) {
-		*out_data = NULL;
-	}
-
-	/* Allowing dm-verity errors defeats the purpose of verified boot so
-	 * only allow this if set up to allow verification errors
-	 * (e.g. typically only UNLOCKED mode).
-	 */
-	if (hashtree_error_mode == AVB_HASHTREE_ERROR_MODE_LOGGING &&
-		!allow_verification_error) {
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT;
-		goto fail;
-	}
-
-	slot_data = avb_calloc(sizeof(AvbSlotVerifyData));
-	if (slot_data == NULL) {
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-		goto fail;
-	}
-	slot_data->vbmeta_images =
-		avb_calloc(sizeof(AvbVBMetaData) * MAX_NUMBER_OF_VBMETA_IMAGES);
-	if (slot_data->vbmeta_images == NULL) {
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-		goto fail;
-	}
-	slot_data->loaded_partitions =
-		avb_calloc(sizeof(AvbPartitionData) * MAX_NUMBER_OF_LOADED_PARTITIONS);
-	if (slot_data->loaded_partitions == NULL) {
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-		goto fail;
-	}
-
-	ret = load_and_verify_vbmeta(ops,
-                               requested_partitions,
-                               ab_suffix,
-                               allow_verification_error,
-                               0 /* toplevel_vbmeta_flags */,
-                               0 /* rollback_index_location */,
-                               "vbmeta",
-                               avb_strlen("vbmeta"),
-                               NULL /* expected_public_key */,
-                               0 /* expected_public_key_length */,
-                               slot_data,
-                               &algorithm_type);
-	if (!allow_verification_error && ret != AVB_SLOT_VERIFY_RESULT_OK) {
-		goto fail;
-	}
-
-	/* If things check out, mangle the kernel command-line as needed. */
-	if (result_should_continue(ret)) {
-		if (avb_strcmp(slot_data->vbmeta_images[0].partition_name, "vbmeta") != 0) {
-		avb_assert(
-  			avb_strcmp(slot_data->vbmeta_images[0].partition_name, "boot") == 0);
-			using_boot_for_vbmeta = true;
-		}
-
-		/* Byteswap top-level vbmeta header since we'll need it below. */
-		avb_vbmeta_image_header_to_host_byte_order(
-        		(const AvbVBMetaImageHeader*)slot_data->vbmeta_images[0].vbmeta_data,
-        		&toplevel_vbmeta);
-
-		/* Fill in |ab_suffix| field. */
-		slot_data->ab_suffix = avb_strdup(ab_suffix);
-		if (slot_data->ab_suffix == NULL) {
-			ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-			goto fail;
-		}
-
-    /* If verification is disabled, we are done ... we specifically
-     * don't want to add any androidboot.* options since verification
-     * is disabled.
-     */
-    if (toplevel_vbmeta.flags & AVB_VBMETA_IMAGE_FLAGS_VERIFICATION_DISABLED) {
-      /* Since verification is disabled we didn't process any
-       * descriptors and thus there's no cmdline... so set root= such
-       * that the system partition is mounted.
-       */
-      avb_assert(slot_data->cmdline == NULL);
-      slot_data->cmdline =
-          avb_strdup("root=PARTUUID=$(ANDROID_SYSTEM_PARTUUID)");
-      if (slot_data->cmdline == NULL) {
-        ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-        goto fail;
-      }
-    } else {
-      /* Add options - any failure in append_options() is either an
-       * I/O or OOM error.
-       */
-      AvbSlotVerifyResult sub_ret = append_options(ops,
-                                                   slot_data,
-                                                   &toplevel_vbmeta,
-                                                   algorithm_type,
-                                                   hashtree_error_mode);
-      if (sub_ret != AVB_SLOT_VERIFY_RESULT_OK) {
-        ret = sub_ret;
-        goto fail;
-      }
-    }
-
-		/* Substitute $(ANDROID_SYSTEM_PARTUUID) and friends. */
-		if (slot_data->cmdline != NULL) {
-			char* new_cmdline;
-			new_cmdline = sub_cmdline(
-			ops, slot_data->cmdline, ab_suffix, using_boot_for_vbmeta);
-			if (new_cmdline == NULL) {
-				ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-				goto fail;
-			}
-			avb_free(slot_data->cmdline);
-			slot_data->cmdline = new_cmdline;
-		}
-
-		if (out_data != NULL) {
-			*out_data = slot_data;
-		} else {
-			avb_slot_verify_data_free(slot_data);
-		}
-	}
-
-	if (!allow_verification_error) {
-		avb_assert(ret == AVB_SLOT_VERIFY_RESULT_OK);
-	}
-
-	return ret;
-
-fail:
-	if (slot_data != NULL) {
-		avb_slot_verify_data_free(slot_data);
-	}
-	return ret;
-}
-
-void avb_slot_verify_data_free(AvbSlotVerifyData* data)
-{
-	if (data->ab_suffix != NULL) {
-		avb_free(data->ab_suffix);
-	}
-	if (data->cmdline != NULL) {
-		avb_free(data->cmdline);
-	}
-	if (data->vbmeta_images != NULL) {
-		size_t n;
-		for (n = 0; n < data->num_vbmeta_images; n++) {
-			AvbVBMetaData* vbmeta_image = &data->vbmeta_images[n];
-			if (vbmeta_image->partition_name != NULL) {
-				avb_free(vbmeta_image->partition_name);
-			}
-			if (vbmeta_image->vbmeta_data != NULL) {
-				avb_free(vbmeta_image->vbmeta_data);
-			}
-		}
-		avb_free(data->vbmeta_images);
-	}
-	if (data->loaded_partitions != NULL) {
-		size_t n;
-		for (n = 0; n < data->num_loaded_partitions; n++) {
-			AvbPartitionData* loaded_partition = &data->loaded_partitions[n];
-			if (loaded_partition->partition_name != NULL) {
-				avb_free(loaded_partition->partition_name);
-			}
-			if (loaded_partition->data != NULL) {
-				avb_free(loaded_partition->data);
-			}
-		}
-		avb_free(data->loaded_partitions);
-	}
-	avb_free(data);
-}
-
-const char* avb_slot_verify_result_to_string(AvbSlotVerifyResult result)
-{
-	const char* ret = NULL;
-
-	switch (result) {
-	case AVB_SLOT_VERIFY_RESULT_OK:
-		ret = "OK";
-		break;
-	case AVB_SLOT_VERIFY_RESULT_ERROR_OOM:
-		ret = "ERROR_OOM";
- 		break;
-	case AVB_SLOT_VERIFY_RESULT_ERROR_IO:
-		ret = "ERROR_IO";
-		break;
-	case AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION:
-		ret = "ERROR_VERIFICATION";
-		break;
-	case AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX:
-		ret = "ERROR_ROLLBACK_INDEX";
-		break;
-	case AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED:
-		ret = "ERROR_PUBLIC_KEY_REJECTED";
-		break;
-	case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA:
-		ret = "ERROR_INVALID_METADATA";
-		break;
-	case AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION:
-		ret = "ERROR_UNSUPPORTED_VERSION";
-		break;
-	case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT:
-		ret = "ERROR_INVALID_ARGUMENT";
-		break;
-	/* Do not add a 'default:' case here because of -Wswitch. */
-	}
-
-	if (ret == NULL) {
-		avb_error("Unknown AvbSlotVerifyResult value.\n");
-		ret = "(unknown)";
-	}
-
-	return ret;
-}
diff --git a/lib/avb/rk_libavb/avb_vbmeta_image.c b/lib/avb/rk_libavb/avb_vbmeta_image.c
deleted file mode 100644
index 76ea3ad230..0000000000
--- a/lib/avb/rk_libavb/avb_vbmeta_image.c
+++ /dev/null
@@ -1,310 +0,0 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include <android_avb/avb_vbmeta_image.h>
-#include <android_avb/avb_crypto.h>
-#include <android_avb/avb_rsa.h>
-#include <android_avb/avb_sha.h>
-#include <android_avb/avb_util.h>
-#include <android_avb/avb_version.h>
-
-AvbVBMetaVerifyResult avb_vbmeta_image_verify(
-    const uint8_t* data,
-    size_t length,
-    const uint8_t** out_public_key_data,
-    size_t* out_public_key_length)
-{
-	AvbVBMetaVerifyResult ret;
-	AvbVBMetaImageHeader h;
-	uint8_t* computed_hash;
-	const AvbAlgorithmData* algorithm;
-	AvbSHA256Ctx sha256_ctx;
-	AvbSHA512Ctx sha512_ctx;
-	const uint8_t* header_block;
-	const uint8_t* authentication_block;
-	const uint8_t* auxiliary_block;
-	int verification_result;
-
-	ret = AVB_VBMETA_VERIFY_RESULT_INVALID_VBMETA_HEADER;
-
-	if (out_public_key_data != NULL) {
-		*out_public_key_data = NULL;
-	}
-	if (out_public_key_length != NULL) {
-		*out_public_key_length = 0;
-	}
-
-	/* Ensure magic is correct. */
-	if (avb_safe_memcmp(data, AVB_MAGIC, AVB_MAGIC_LEN) != 0) {
-		avb_error("Magic is incorrect.\n");
-		goto out;
-	}
-
-	/* Before we byteswap, ensure length is long enough. */
-	if (length < sizeof(AvbVBMetaImageHeader)) {
-		avb_error("Length is smaller than header.\n");
-		goto out;
-	}
-	avb_vbmeta_image_header_to_host_byte_order((const AvbVBMetaImageHeader*)data,
-                                             &h);
-
-	/* Ensure we don't attempt to access any fields if we do not meet
-	 * the specified minimum version of libavb.
-	 */
-	if ((h.required_libavb_version_major != AVB_VERSION_MAJOR) ||
-		(h.required_libavb_version_minor > AVB_VERSION_MINOR)) {
-		avb_error("Mismatch between image version and libavb version.\n");
-		ret = AVB_VBMETA_VERIFY_RESULT_UNSUPPORTED_VERSION;
-		goto out;
-	}
-
-	/* Ensure |release_string| ends with a NUL byte. */
-	if (h.release_string[AVB_RELEASE_STRING_SIZE - 1] != '\0') {
-		avb_error("Release string does not end with a NUL byte.\n");
-		goto out;
-	}
-
-	/* Ensure inner block sizes are multiple of 64. */
-	if ((h.authentication_data_block_size & 0x3f) != 0 ||
-		(h.auxiliary_data_block_size & 0x3f) != 0) {
-		avb_error("Block size is not a multiple of 64.\n");
-		goto out;
-	}
-
-	/* Ensure block sizes all add up to at most |length|. */
-	uint64_t block_total = sizeof(AvbVBMetaImageHeader);
-	if (!avb_safe_add_to(&block_total, h.authentication_data_block_size) ||
-		!avb_safe_add_to(&block_total, h.auxiliary_data_block_size)) {
-		avb_error("Overflow while computing size of boot image.\n");
-		goto out;
-	}
-	if (block_total > length) {
-		avb_error("Block sizes add up to more than given length.\n");
-		goto out;
-	}
-
-	uintptr_t data_ptr = (uintptr_t)data;
-	/* Ensure passed in memory doesn't wrap. */
-	if (!avb_safe_add(NULL, (uint64_t)data_ptr, length)) {
-		avb_error("Boot image location and length mismatch.\n");
-		goto out;
-	}
-
-	/* Ensure hash and signature are entirely in the Authentication data block. */
-	uint64_t hash_end;
-	if (!avb_safe_add(&hash_end, h.hash_offset, h.hash_size) ||
-		hash_end > h.authentication_data_block_size) {
-		avb_error("Hash is not entirely in its block.\n");
-		goto out;
-	}
-	uint64_t signature_end;
-	if (!avb_safe_add(&signature_end, h.signature_offset, h.signature_size) ||
-		signature_end > h.authentication_data_block_size) {
-		avb_error("Signature is not entirely in its block.\n");
-		goto out;
-	}
-
-	/* Ensure public key is entirely in the Auxiliary data block. */
-	uint64_t pubkey_end;
-	if (!avb_safe_add(&pubkey_end, h.public_key_offset, h.public_key_size) ||
-		pubkey_end > h.auxiliary_data_block_size) {
-		avb_error("Public key is not entirely in its block.\n");
-		goto out;
-	}
-
-	/* Ensure public key metadata (if set) is entirely in the Auxiliary
-	 * data block. */
-	if (h.public_key_metadata_size > 0) {
-		uint64_t pubkey_md_end;
-		if (!avb_safe_add(&pubkey_md_end,
-			h.public_key_metadata_offset,
-			h.public_key_metadata_size) ||
-			pubkey_md_end > h.auxiliary_data_block_size) {
-			avb_error("Public key metadata is not entirely in its block.\n");
-			goto out;
-		}
-	}
-
-	/* Bail early if there's no hash or signature. */
-	if (h.algorithm_type == AVB_ALGORITHM_TYPE_NONE) {
-		ret = AVB_VBMETA_VERIFY_RESULT_OK_NOT_SIGNED;
-		goto out;
-	}
-
-	/* Ensure algorithm field is supported. */
-	algorithm = avb_get_algorithm_data(h.algorithm_type);
-	if (!algorithm) {
-		avb_error("Invalid or unknown algorithm.\n");
-		goto out;
-	}
-
-	/* Bail if the embedded hash size doesn't match the chosen algorithm. */
-	if (h.hash_size != algorithm->hash_len) {
-		avb_error("Embedded hash has wrong size.\n");
-		goto out;
-	}
-
-	/* No overflow checks needed from here-on after since all block
-	 * sizes and offsets have been verified above.
-	 */
-
-	header_block = data;
-	authentication_block = header_block + sizeof(AvbVBMetaImageHeader);
-	auxiliary_block = authentication_block + h.authentication_data_block_size;
-
-	switch (h.algorithm_type) {
-	/* Explicit fall-through: */
-	case AVB_ALGORITHM_TYPE_SHA256_RSA2048:
-	case AVB_ALGORITHM_TYPE_SHA256_RSA4096:
-	case AVB_ALGORITHM_TYPE_SHA256_RSA8192:
-		avb_sha256_init(&sha256_ctx);
-		avb_sha256_update(
-			&sha256_ctx, header_block, sizeof(AvbVBMetaImageHeader));
-		avb_sha256_update(
-			&sha256_ctx, auxiliary_block, h.auxiliary_data_block_size);
-		computed_hash = avb_sha256_final(&sha256_ctx);
-		break;
-	/* Explicit fall-through: */
-	case AVB_ALGORITHM_TYPE_SHA512_RSA2048:
-	case AVB_ALGORITHM_TYPE_SHA512_RSA4096:
-	case AVB_ALGORITHM_TYPE_SHA512_RSA8192:
-		avb_sha512_init(&sha512_ctx);
-		avb_sha512_update(
-			&sha512_ctx, header_block, sizeof(AvbVBMetaImageHeader));
-		avb_sha512_update(
-			&sha512_ctx, auxiliary_block, h.auxiliary_data_block_size);
-		computed_hash = avb_sha512_final(&sha512_ctx);
-		break;
-	default:
-		avb_error("Unknown algorithm.\n");
-		goto out;
-	}
-
-	if (avb_safe_memcmp(authentication_block + h.hash_offset,
-                      computed_hash,
-                      h.hash_size) != 0) {
-		avb_error("Hash does not match!\n");
-		ret = AVB_VBMETA_VERIFY_RESULT_HASH_MISMATCH;
-		goto out;
-	}
-
-	verification_result = avb_rsa_verify(auxiliary_block + h.public_key_offset,
-					h.public_key_size,
-					authentication_block + h.signature_offset,
-					h.signature_size,
-					authentication_block + h.hash_offset,
-					h.hash_size,
-					algorithm->padding,
-					algorithm->padding_len);
-
-	if (verification_result == 0) {
-		ret = AVB_VBMETA_VERIFY_RESULT_SIGNATURE_MISMATCH;
-		goto out;
-	}
-
-	if (h.public_key_size > 0) {
-		if (out_public_key_data != NULL) {
-			*out_public_key_data = auxiliary_block + h.public_key_offset;
-		}
-		if (out_public_key_length != NULL) {
-			*out_public_key_length = h.public_key_size;
-		}
-	}
-
-	ret = AVB_VBMETA_VERIFY_RESULT_OK;
-
-out:
-	return ret;
-}
-
-void avb_vbmeta_image_header_to_host_byte_order(const AvbVBMetaImageHeader* src,
-                                                AvbVBMetaImageHeader* dest)
-{
-	avb_memcpy(dest, src, sizeof(AvbVBMetaImageHeader));
-
-	dest->required_libavb_version_major =
-		avb_be32toh(dest->required_libavb_version_major);
-	dest->required_libavb_version_minor =
-		avb_be32toh(dest->required_libavb_version_minor);
-
-	dest->authentication_data_block_size =
-		avb_be64toh(dest->authentication_data_block_size);
-	dest->auxiliary_data_block_size =
-		avb_be64toh(dest->auxiliary_data_block_size);
-
-	dest->algorithm_type = avb_be32toh(dest->algorithm_type);
-
-	dest->hash_offset = avb_be64toh(dest->hash_offset);
-	dest->hash_size = avb_be64toh(dest->hash_size);
-
-	dest->signature_offset = avb_be64toh(dest->signature_offset);
-	dest->signature_size = avb_be64toh(dest->signature_size);
-
-	dest->public_key_offset = avb_be64toh(dest->public_key_offset);
-	dest->public_key_size = avb_be64toh(dest->public_key_size);
-
-	dest->public_key_metadata_offset =
-		avb_be64toh(dest->public_key_metadata_offset);
-	dest->public_key_metadata_size = avb_be64toh(dest->public_key_metadata_size);
-
-	dest->descriptors_offset = avb_be64toh(dest->descriptors_offset);
-	dest->descriptors_size = avb_be64toh(dest->descriptors_size);
-
-	dest->rollback_index = avb_be64toh(dest->rollback_index);
-	dest->flags = avb_be32toh(dest->flags);
-}
-
-const char* avb_vbmeta_verify_result_to_string(AvbVBMetaVerifyResult result)
-{
-	const char* ret = NULL;
-
-	switch (result) {
-	case AVB_VBMETA_VERIFY_RESULT_OK:
-		ret = "OK";
-		break;
-	case AVB_VBMETA_VERIFY_RESULT_OK_NOT_SIGNED:
-		ret = "OK_NOT_SIGNED";
-		break;
-	case AVB_VBMETA_VERIFY_RESULT_INVALID_VBMETA_HEADER:
-		ret = "INVALID_VBMETA_HEADER";
-		break;
-	case AVB_VBMETA_VERIFY_RESULT_UNSUPPORTED_VERSION:
-		ret = "UNSUPPORTED_VERSION";
-		break;
-	case AVB_VBMETA_VERIFY_RESULT_HASH_MISMATCH:
-		ret = "HASH_MISMATCH";
-		break;
-	case AVB_VBMETA_VERIFY_RESULT_SIGNATURE_MISMATCH:
-		ret = "SIGNATURE_MISMATCH";
-		break;
-	/* Do not add a 'default:' case here because of -Wswitch. */
-	}
-
-	if (ret == NULL) {
-		avb_error("Unknown AvbVBMetaVerifyResult value.\n");
-		ret = "(unknown)";
-	}
-
-	return ret;
-}
diff --git a/lib/avb/rk_libavb_ab/avb_ab_flow.c b/lib/avb/rk_libavb_ab/avb_ab_flow.c
deleted file mode 100644
index 9f1fa6df6e..0000000000
--- a/lib/avb/rk_libavb_ab/avb_ab_flow.c
+++ /dev/null
@@ -1,603 +0,0 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-#include <common.h>
-#include <image.h>
-#include <android_image.h>
-#include <malloc.h>
-#include <memalign.h>
-#include <mapmem.h>
-#include <errno.h>
-#include <command.h>
-#include <mmc.h>
-#include <blk.h>
-#include <part.h>
-#include <android_avb/libavb_ab.h>
-#include <config.h>
-#include <command.h>
-#include <environment.h>
-#include <linux/types.h>
-#include <api_public.h>
-#include <android_avb/libavb.h>
-#include <android_avb/avb_util.h>
-#include <android_avb/avb_ab_flow.h>
-
-
-bool avb_ab_data_verify_and_byteswap(const AvbABData* src, AvbABData* dest)
-{
-	/* Ensure magic is correct. */
-	if (avb_safe_memcmp(src->magic, AVB_AB_MAGIC, AVB_AB_MAGIC_LEN) != 0) {
-		avb_error("Magic is incorrect.\n");
-		return false;
-	}
-
-	avb_memcpy(dest, src, sizeof(AvbABData));
-	dest->crc32 = avb_be32toh(dest->crc32);
-
-	/* Ensure we don't attempt to access any fields if the major version
-	* is not supported.
-	*/
-	if (dest->version_major > AVB_AB_MAJOR_VERSION) {
-		avb_error("No support for given major version.\n");
-		return false;
-	}
-
-	/* Bail if CRC32 doesn't match. */
-	if (dest->crc32 !=
-		avb_crc32((const uint8_t*)dest, sizeof(AvbABData) - sizeof(uint32_t) - 1)) {
-		avb_error("CRC32 does not match.\n");
-		return false;
-	}
-
-	return true;
-}
-
-void avb_ab_data_update_crc_and_byteswap(const AvbABData* src,
-                                         AvbABData* dest)
-{
-	avb_memcpy(dest, src, sizeof(AvbABData));
-	dest->crc32 = avb_htobe32(
-		avb_crc32((const uint8_t*)dest, sizeof(AvbABData) - sizeof(uint32_t) - 1));
-}
-
-void avb_ab_data_init(AvbABData *data)
-{
-	avb_memset(data, '\0', sizeof(AvbABData));
-	avb_memcpy(data->magic, AVB_AB_MAGIC, AVB_AB_MAGIC_LEN);
-	data->nb_slot = 2;
-	data->slot_suffix[0] = 'a';
-	data->slot_suffix[1] = 'b';
-	data->slot_suffix[2] = '\0';
-	data->slot_suffix[3] = '\0';
-	data->version_major = AVB_AB_MAJOR_VERSION;
-	data->version_minor = AVB_AB_MINOR_VERSION;
-	data->slots[0].priority = AVB_AB_MAX_PRIORITY;
-	data->slots[0].tries_remaining = AVB_AB_MAX_TRIES_REMAINING;
-	data->slots[0].successful_boot = 0;
-	data->slots[1].priority = AVB_AB_MAX_PRIORITY - 1;
-	data->slots[1].tries_remaining = AVB_AB_MAX_TRIES_REMAINING;
-	data->slots[1].successful_boot = 0;
-}
-
-/* The AvbABData struct is stored 2048 bytes into the 'misc' partition
- * following the 'struct bootloader_message' field. The struct is
- * compatible with the guidelines in bootable/recovery/bootloader.h -
- * e.g. it is stored in the |slot_suffix| field, starts with a
- * NUL-byte, and is 32 bytes long.
- */
-#define AB_METADATA_MISC_PARTITION_OFFSET 2048
-
-AvbIOResult avb_ab_data_read(AvbABOps* ab_ops, AvbABData* data)
-{
-	AvbOps* ops = ab_ops->ops;
-	ALLOC_CACHE_ALIGN_BUFFER(u8, serialized, 512);
-	size_t num_bytes_read;
-
-	memset(serialized,0,sizeof(u8) * 512);
-	ops->read_from_partition(ops,
-				"misc",
-				AB_METADATA_MISC_PARTITION_OFFSET,
-				512,
-				(AvbABData*)serialized,
-				&num_bytes_read);
-	if (!avb_ab_data_verify_and_byteswap((AvbABData*)serialized, data)) {
-	avb_error(
-		"Error validating A/B metadata from disk. "
-		"Resetting and writing new A/B metadata to disk.\n");
-		avb_ab_data_init(data);
-		return avb_ab_data_write(ab_ops, data);
-	}
-	return AVB_IO_RESULT_OK;
-}
-
-AvbIOResult avb_ab_data_write(AvbABOps* ab_ops, const AvbABData* data) {
-	AvbOps* ops = ab_ops->ops;
-	AvbIOResult io_ret;
-	ALLOC_CACHE_ALIGN_BUFFER(u8, temp, 512);
-	memset(temp,0,sizeof(u8) * 512);
-
-	avb_ab_data_update_crc_and_byteswap(data, (AvbABData*)temp);
-	io_ret = ops->write_to_partition(ops,
-                                   "misc",
-                                   AB_METADATA_MISC_PARTITION_OFFSET,
-                                   512,
-                                   temp);
-	if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-		return AVB_IO_RESULT_ERROR_OOM;
-	} else if (io_ret != AVB_IO_RESULT_OK) {
-		avb_error("Error writing A/B metadata.\n");
-		return AVB_IO_RESULT_ERROR_IO;
-	}
-	return AVB_IO_RESULT_OK;
-}
-
-static bool slot_is_bootable(AvbABSlotData* slot)
-{
-	return slot->priority > 0 &&
-		(slot->successful_boot || (slot->tries_remaining > 0));
-}
-
-static void slot_set_unbootable(AvbABSlotData* slot)
-{
-	slot->priority = 0;
-	slot->tries_remaining = 0;
-	slot->successful_boot = 0;
-}
-
-/* Ensure all unbootable and/or illegal states are marked as the
- * canonical 'unbootable' state, e.g. priority=0, tries_remaining=0,
- * and successful_boot=0.
- */
-static void slot_normalize(AvbABSlotData* slot)
-{
-	if (slot->priority > 0) {
-		if (slot->tries_remaining == 0 && !slot->successful_boot) {
-		/* We've exhausted all tries -> unbootable. */
-		slot_set_unbootable(slot);
-	}
-	if (slot->tries_remaining > 0 && slot->successful_boot) {
-		/* Illegal state - avb_ab_mark_slot_successful() will clear
-		 * tries_remaining when setting successful_boot.
-		 */
-		slot_set_unbootable(slot);
-	}
-	} else {
-		slot_set_unbootable(slot);
-	}
-}
-
-static const char* slot_suffixes[2] = {"_a", "_b"};
-
-/* Helper function to load metadata - returns AVB_IO_RESULT_OK on
- * success, error code otherwise.
- */
-AvbIOResult load_metadata(AvbABOps *ab_ops,
-				AvbABData *ab_data,
-				AvbABData *ab_data_orig)
-{
-	AvbIOResult io_ret;
-	io_ret = ab_ops->read_ab_metadata(ab_ops,ab_data);
-	if(io_ret != AVB_IO_RESULT_OK) {
-		avb_error("I/O error while loading A/B metadata.\n");
-		return io_ret;
-	}
-
-	*ab_data_orig = *ab_data;
-	slot_normalize(&ab_data->slots[0]);
-	slot_normalize(&ab_data->slots[1]);
-	return AVB_IO_RESULT_OK;
-}
-
-
-/* Writes A/B metadata to disk only if it has changed - returns
- * AVB_IO_RESULT_OK on success, error code otherwise.
- */
-static AvbIOResult save_metadata_if_changed(AvbABOps* ab_ops,
-                                            AvbABData* ab_data,
-                                            AvbABData* ab_data_orig)
-{
-	if (avb_safe_memcmp(ab_data, ab_data_orig, sizeof(AvbABData)) != 0) {
-		avb_debug("Writing A/B metadata to disk.\n");
-		return ab_ops->write_ab_metadata(ab_ops, ab_data);
-	}
-	return AVB_IO_RESULT_OK;
-}
-
-AvbABFlowResult avb_ab_flow(AvbABOps* ab_ops,
-                            const char* const* requested_partitions,
-                            AvbSlotVerifyFlags flags,
-                            AvbHashtreeErrorMode hashtree_error_mode,
-                            AvbSlotVerifyData** out_data)
-{
-	AvbOps* ops = ab_ops->ops;
-	AvbSlotVerifyData* slot_data[2] = {NULL, NULL};
-	AvbSlotVerifyData* data = NULL;
-	AvbABFlowResult ret;
-	AvbABData ab_data, ab_data_orig;
-	size_t slot_index_to_boot, n;
-	AvbIOResult io_ret;
-	bool saw_and_allowed_verification_error = false;
-	io_ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
-	if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-		ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
-		goto out;
-	} else if (io_ret != AVB_IO_RESULT_OK) {
-		ret = AVB_AB_FLOW_RESULT_ERROR_IO;
-		goto out;
-	}
-
-	/* Validate all bootable slots. */
-	for (n = 0; n < 2; n++) {
-		if (slot_is_bootable(&ab_data.slots[n])) {
-			AvbSlotVerifyResult verify_result;
-			bool set_slot_unbootable = false;
-
-			verify_result = avb_slot_verify(ops,
-                                      requested_partitions,
-                                      slot_suffixes[n],
-                                      flags,
-                                      hashtree_error_mode,
-                                      &slot_data[n]);
-			switch (verify_result) {
-			case AVB_SLOT_VERIFY_RESULT_ERROR_OOM:
-				ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
-				goto out;
-
-			case AVB_SLOT_VERIFY_RESULT_ERROR_IO:
-				ret = AVB_AB_FLOW_RESULT_ERROR_IO;
-				goto out;
-
-			case AVB_SLOT_VERIFY_RESULT_OK:
-				break;
-
-			case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA:
-			case AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION:
-			/* Even with AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR
-		 	 * these mean game over.
-		 	 */
-				set_slot_unbootable = true;
-				break;
-
-			/* explicit fallthrough. */
-			case AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION:
-			case AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX:
-			case AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED:
-				if (flags & AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR) {
-				/* Do nothing since we allow this. */
-					avb_debugv("Allowing slot ",
-					slot_suffixes[n],
-					" which verified "
-					"with result ",
-					avb_slot_verify_result_to_string(verify_result),
-					" because "
-					"AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR "
-					"is set.\n",
-					NULL);
-					saw_and_allowed_verification_error = true;
-				} else {
-					set_slot_unbootable = true;
-				}
-				break;
-
-			case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT:
-				ret = AVB_AB_FLOW_RESULT_ERROR_INVALID_ARGUMENT;
-				goto out;
-			/* Do not add a 'default:' case here because of -Wswitch. */
-			}
-
-			if (set_slot_unbootable) {
-				avb_errorv("Error verifying slot ",
-					slot_suffixes[n],
-					" with result ",
-					avb_slot_verify_result_to_string(verify_result),
-					" - setting unbootable.\n",
-					NULL);
-				slot_set_unbootable(&ab_data.slots[n]);
-			}
-		}
-	}
-
-	if (slot_is_bootable(&ab_data.slots[0]) && slot_is_bootable(&ab_data.slots[1])) {
-		if (ab_data.slots[1].priority > ab_data.slots[0].priority) {
-			slot_index_to_boot = 1;
-		} else {
-			slot_index_to_boot = 0;
-		}
-		} else if (slot_is_bootable(&ab_data.slots[0])) {
-			slot_index_to_boot = 0;
-		} else if (slot_is_bootable(&ab_data.slots[1])) {
-			slot_index_to_boot = 1;
-		} else {
-		/* No bootable slots! */
-			avb_error("No bootable slots found.\n");
-			ret = AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS;
-			goto out;
-		}
-
-		/* Update stored rollback index such that the stored rollback index
-		 * is the largest value supporting all currently bootable slots. Do
-		 * this for every rollback index location.
-		 */
-		for (n = 0; n < AVB_MAX_NUMBER_OF_ROLLBACK_INDEX_LOCATIONS; n++) {
-			uint64_t rollback_index_value = 0;
-
-			if (slot_data[0] != NULL && slot_data[1] != NULL) {
-				uint64_t a_rollback_index = slot_data[0]->rollback_indexes[n];
-				uint64_t b_rollback_index = slot_data[1]->rollback_indexes[n];
-				rollback_index_value =
-				(a_rollback_index < b_rollback_index ? a_rollback_index
-								: b_rollback_index);
-			} else if (slot_data[0] != NULL) {
-				rollback_index_value = slot_data[0]->rollback_indexes[n];
-			} else if (slot_data[1] != NULL) {
-				rollback_index_value = slot_data[1]->rollback_indexes[n];
-			}
-
-			if (rollback_index_value != 0) {
-				uint64_t current_rollback_index_value;
-				io_ret = ops->read_rollback_index(ops, n, &current_rollback_index_value);
-				if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-					ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
-					goto out;
-			} else if (io_ret != AVB_IO_RESULT_OK) {
-				avb_error("Error getting rollback index for slot.\n");
-				ret = AVB_AB_FLOW_RESULT_ERROR_IO;
-				goto out;
-			}
-			if (current_rollback_index_value != rollback_index_value) {
-				io_ret = ops->write_rollback_index(ops, n, rollback_index_value);
-				if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
- 					ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
-					goto out;
-				} else if (io_ret != AVB_IO_RESULT_OK) {
-					avb_error("Error setting stored rollback index.\n");
-          				ret = AVB_AB_FLOW_RESULT_ERROR_IO;
-          				goto out;
-				}
-			}
-		}
-	}
-
-	/* Finally, select this slot. */
-	avb_assert(slot_data[slot_index_to_boot] != NULL);
-	data = slot_data[slot_index_to_boot];
-	slot_data[slot_index_to_boot] = NULL;
-	if (saw_and_allowed_verification_error) {
-		avb_assert(flags & AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR);
-		ret = AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR;
-	} else {
-		ret = AVB_AB_FLOW_RESULT_OK;
-	}
-
-	/* ... and decrement tries remaining, if applicable. */
-	if (!ab_data.slots[slot_index_to_boot].successful_boot &&
-		ab_data.slots[slot_index_to_boot].tries_remaining > 0) {
-		ab_data.slots[slot_index_to_boot].tries_remaining -= 1;
-	}
-
-out:
-	io_ret = save_metadata_if_changed(ab_ops, &ab_data, &ab_data_orig);
-	if (io_ret != AVB_IO_RESULT_OK) {
-		if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-		ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
-	} else {
-			ret = AVB_AB_FLOW_RESULT_ERROR_IO;
-		}
-		if (data != NULL) {
-			avb_slot_verify_data_free(data);
-			data = NULL;
-		}
-	}
-
-	for (n = 0; n < 2; n++) {
-		if (slot_data[n] != NULL) {
-			avb_slot_verify_data_free(slot_data[n]);
-		}
-	}
-
-	if (out_data != NULL) {
-		*out_data = data;
-	} else {
-		if (data != NULL) {
-			avb_slot_verify_data_free(data);
-		}
-	}
-
-	return ret;
-}
-
-AvbABFlowResult avb_ab_slot_select(AvbABOps* ab_ops,char select_slot[])
-{
-	AvbABFlowResult ret = 0;
-	AvbIOResult io_ret = 0;
-	AvbABData ab_data, ab_data_orig;
-	size_t slot_index_to_boot;
-	io_ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
-	if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-		ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
-		goto out;
-	} else if (io_ret != AVB_IO_RESULT_OK) {
-		ret = AVB_AB_FLOW_RESULT_ERROR_IO;
-		goto out;
-	}
-	if (slot_is_bootable(&ab_data.slots[0]) && slot_is_bootable(&ab_data.slots[1])) {
-		if (ab_data.slots[1].priority > ab_data.slots[0].priority) {
-			slot_index_to_boot = 1;
-		} else {
-			slot_index_to_boot = 0;
-		}
-	} else if(slot_is_bootable(&ab_data.slots[0])) {
-		slot_index_to_boot = 0;
-	} else if(slot_is_bootable(&ab_data.slots[1])) {
-		slot_index_to_boot = 1;
-	} else {
-		avb_error("No bootable slots found.\n");
-		ret = AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS;
-		goto out;
-	}
-	if (slot_index_to_boot == 0) {
-		select_slot[0] = '_';
-		select_slot[1] = 'a';
-		select_slot[2] = '\0';
-	} else if(slot_index_to_boot == 1) {
-		select_slot[0] = '_';
-		select_slot[1] = 'b';
-		select_slot[2] = '\0';
-	}
-out:
-	return ret;
-}
-
-AvbIOResult avb_ab_mark_slot_active(AvbABOps *ab_ops,
-                                    unsigned int slot_number)
-{
-	AvbABData ab_data, ab_data_orig;
-	unsigned int other_slot_number;
-	AvbIOResult ret;
-
-	if( slot_number > 1) {
-		avb_error("slot_number can not > 1");
-		return -1;
-	}
-	ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
-	if (ret != AVB_IO_RESULT_OK) {
-		goto out;
-	}
-	/* Make requested slot top priority, unsuccessful, and with max tries. */
-	ab_data.slots[slot_number].priority = AVB_AB_MAX_PRIORITY;
-	ab_data.slots[slot_number].tries_remaining = AVB_AB_MAX_TRIES_REMAINING;
-	ab_data.slots[slot_number].successful_boot = 0;
-
-	/* Ensure other slot doesn't have as high a priority. */
-	other_slot_number = 1 - slot_number;
-	if (ab_data.slots[other_slot_number].priority == AVB_AB_MAX_PRIORITY) {
-		ab_data.slots[other_slot_number].priority = AVB_AB_MAX_PRIORITY - 1;
-	}
-
-	ret = AVB_IO_RESULT_OK;
-
-out:
-	if (ret == AVB_IO_RESULT_OK) {
-		ret = save_metadata_if_changed(ab_ops, &ab_data, &ab_data_orig);
-	}
-	return ret;
-}
-
-AvbIOResult avb_ab_mark_slot_unbootable(AvbABOps *ab_ops,
-                                        unsigned int slot_number)
-{
-	AvbABData ab_data, ab_data_orig;
-	AvbIOResult ret;
-
-	if( slot_number > 1) {
-		avb_error("slot_number can not > 1");
-		return -1;
-	}
-
-	ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
-	if (ret != AVB_IO_RESULT_OK) {
-		goto out;
-	}
-
-	slot_set_unbootable(&ab_data.slots[slot_number]);
-
-	ret = AVB_IO_RESULT_OK;
-
-out:
-	if (ret == AVB_IO_RESULT_OK) {
-		ret = save_metadata_if_changed(ab_ops, &ab_data, &ab_data_orig);
-	}
-	return ret;
-}
-
-AvbIOResult avb_ab_mark_slot_successful(AvbABOps *ab_ops,
-                                        unsigned int slot_number)
-{
-	AvbABData ab_data, ab_data_orig;
-	AvbIOResult ret;
-
-	if( slot_number > 1) {
-		avb_error("slot_number can not > 1");
-		return -1;
-	}
-
-	ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
-	if (ret != AVB_IO_RESULT_OK) {
-		goto out;
-	}
-
-	if (!slot_is_bootable(&ab_data.slots[slot_number])) {
-		avb_error("Cannot mark unbootable slot as successful.\n");
-		ret = AVB_IO_RESULT_OK;
-		goto out;
-	}
-
-	ab_data.slots[slot_number].tries_remaining = 0;
-	ab_data.slots[slot_number].successful_boot = 1;
-
-	ret = AVB_IO_RESULT_OK;
-
-out:
-	if (ret == AVB_IO_RESULT_OK) {
-		ret = save_metadata_if_changed(ab_ops, &ab_data, &ab_data_orig);
-	}
-	return ret;
-}
-
-const char *avb_ab_flow_result_to_string(AvbABFlowResult result)
-{
-	const char* ret = NULL;
-
-	switch (result) {
-	case AVB_AB_FLOW_RESULT_OK:
-		ret = "OK";
-		break;
-
-	case AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR:
-		ret = "OK_WITH_VERIFICATION_ERROR";
-		break;
-
-	case AVB_AB_FLOW_RESULT_ERROR_OOM:
-		ret = "ERROR_OOM";
-		break;
-
-	case AVB_AB_FLOW_RESULT_ERROR_IO:
-		ret = "ERROR_IO";
-		break;
-
-	case AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS:
-		ret = "ERROR_NO_BOOTABLE_SLOTS";
-		break;
-	case AVB_AB_FLOW_RESULT_ERROR_INVALID_ARGUMENT:
-		ret = "ERROR_INVALID_ARGUMENT";
-		break;
-	/* Do not add a 'default:' case here because of -Wswitch. */
-	}
-
-	if (ret == NULL) {
-		avb_error("Unknown AvbABFlowResult value.\n");
-		ret = "(unknown)";
-	}
-
-	return ret;
-}

commit fac2f0408a1fdd0f6aa1aa3d48951388c9b658cd
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Feb 10 09:41:12 2018 +0800

    common: board_r: init env before board_init()
    
    We need to get and update env if we need to read kernel dtb in board_init().
    Note that the env is NOWHERE now, or else we need to init emmc first if
    ENV_IS_IN_MMC.
    
    Change-Id: I22685fea77315811f3ff2bac7fb29d3b9206be34
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/board_r.c b/common/board_r.c
index 09167c13cc..582a155e98 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -704,6 +704,9 @@ static init_fnc_t init_sequence_r[] = {
 #ifdef CONFIG_DM
 	initr_dm,
 #endif
+#ifdef CONFIG_USING_KERNEL_DTB
+	initr_env,
+#endif
 #if defined(CONFIG_ARM) || defined(CONFIG_NDS32)
 	board_init,	/* Setup chipselects */
 #endif
@@ -771,7 +774,9 @@ static init_fnc_t init_sequence_r[] = {
 #ifdef CONFIG_MMC
 	initr_mmc,
 #endif
+#ifndef CONFIG_USING_KERNEL_DTB
 	initr_env,
+#endif
 #ifdef CONFIG_SYS_BOOTPARAMS_LEN
 	initr_malloc_bootparams,
 #endif

commit 7048c21cd453ddd702e51e28f12c4caf076e2bd7
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Wed Feb 7 11:05:29 2018 +0800

    ARM: dts: rockchip: fix usb-phy node for px30
    
    Fix the reference clock source for usb-phy on rockchip px30 SoC.
    
    Change-Id: I1a458acd03e21b8824eba24f128bc2fcf0ad306b
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/arch/arm/dts/px30.dtsi b/arch/arm/dts/px30.dtsi
index 560d3eebfe..793d60d0cd 100644
--- a/arch/arm/dts/px30.dtsi
+++ b/arch/arm/dts/px30.dtsi
@@ -657,7 +657,7 @@
 			compatible = "rockchip,px30-usb2phy",
 				     "rockchip,rk3328-usb2phy";
 			reg = <0x100 0x10>;
-			clocks = <&cru SCLK_USBPHY_REF>;
+			clocks = <&pmucru SCLK_USBPHY_REF>;
 			clock-names = "phyclk";
 			#clock-cells = <0>;
 			assigned-clocks = <&cru USB480M>;

commit 065655143ece0dd8f414b21b8b7f4d9c6b4dced0
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Fri Feb 9 18:17:59 2018 +0800

    phy: phy-rockchip-inno-usb2: amend dt parse api
    
    This change amend getting PHY udevice direct instead of parsing
    ofnode_path step by step.
    
    Change-Id: I145f5ef8361c471f3e69f193430e98ef8168b901
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index f6d00c7edc..2848ed2722 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -183,88 +183,6 @@ static inline bool property_enabled(void __iomem *base,
 	return tmp == reg->enable;
 }
 
-static int rockchip_usb2phy_parse(struct rockchip_usb2phy *rphy)
-{
-	const struct rockchip_usb2phy_cfg *phy_cfgs;
-	ofnode u2phy_node = ofnode_null();
-	ofnode grf_node = ofnode_null();
-	void __iomem *usbgrf_base = NULL;
-	void __iomem *grf_base = NULL;
-	struct udevice *udev;
-	fdt_size_t size;
-	u32 reg, index;
-	int ret;
-
-	memset((void *)rphy, 0, sizeof(struct rockchip_usb2phy));
-
-	u2phy_node = ofnode_path("/usb2-phy");
-	if (ofnode_valid(u2phy_node)) {
-		if (ofnode_read_bool(u2phy_node, "rockchip,grf"))
-			grf_base = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-
-		if (ofnode_read_bool(u2phy_node, "rockchip,usbgrf"))
-			usbgrf_base =
-				syscon_get_first_range(ROCKCHIP_SYSCON_USBGRF);
-		else
-			usbgrf_base = NULL;
-	} else {
-		grf_node = ofnode_path("/syscon-usb");
-		if (ofnode_valid(grf_node)) {
-			grf_base = (void __iomem *)
-				ofnode_get_addr_size(grf_node, "reg", &size);
-			u2phy_node = ofnode_find_subnode(grf_node, "usb2-phy");
-		}
-	}
-
-	if (!grf_base && !usbgrf_base) {
-		pr_err("%s: get grf/usbgrf node failed\n", __func__);
-		return -EINVAL;
-	}
-
-	if (!ofnode_valid(u2phy_node)) {
-		pr_err("%s: missing u2phy node\n", __func__);
-		return -EINVAL;
-	}
-
-	if (ofnode_read_u32(u2phy_node, "reg", &reg)) {
-		pr_err("%s: could not read reg from u2phy node\n", __func__);
-		return -EINVAL;
-	}
-
-	ret = uclass_get_device_by_ofnode(UCLASS_PHY, u2phy_node, &udev);
-	if (ret) {
-		pr_err("%s: get u2phy node failed: %d\n", __func__, ret);
-		return -ENODEV;
-	}
-
-	phy_cfgs =
-		(const struct rockchip_usb2phy_cfg *)dev_get_driver_data(udev);
-	if (!phy_cfgs) {
-		pr_err("%s: unable to get phy_cfgs\n", __func__);
-		return -EINVAL;
-	}
-
-	/* find out a proper config which can be matched with dt. */
-	index = 0;
-	while (phy_cfgs[index].reg) {
-		if (phy_cfgs[index].reg == reg) {
-			rphy->phy_cfg = &phy_cfgs[index];
-			break;
-		}
-		++index;
-	}
-
-	if (!rphy->phy_cfg) {
-		pr_err("%s: no phy-config can be matched\n", __func__);
-		return -EINVAL;
-	}
-
-	rphy->grf_base = grf_base;
-	rphy->usbgrf_base = usbgrf_base;
-
-	return 0;
-}
-
 static const char *chg_to_string(enum power_supply_type chg_type)
 {
 	switch (chg_type) {
@@ -330,57 +248,59 @@ int rockchip_chg_get_type(void)
 {
 	const struct rockchip_usb2phy_port_cfg *port_cfg;
 	enum power_supply_type chg_type;
-	struct rockchip_usb2phy rphy;
+	struct rockchip_usb2phy *rphy;
+	struct udevice *udev;
 	void __iomem *base;
 	bool is_dcd, vout;
 	int ret;
 
-	ret = rockchip_usb2phy_parse(&rphy);
-	if (ret) {
-		pr_err("%s: parse usb2phy failed %d\n", __func__, ret);
+	ret = uclass_get_device(UCLASS_PHY, 0, &udev);
+	if (ret == -ENODEV) {
+		pr_err("%s: get u2phy node failed: %d\n", __func__, ret);
 		return ret;
 	}
 
-	base = get_reg_base(&rphy);
-	port_cfg = &rphy.phy_cfg->port_cfgs[USB2PHY_PORT_OTG];
+	rphy = dev_get_priv(udev);
+	base = get_reg_base(rphy);
+	port_cfg = &rphy->phy_cfg->port_cfgs[USB2PHY_PORT_OTG];
 
 	/* Suspend USB-PHY and put the controller in non-driving mode */
 	property_enable(base, &port_cfg->phy_sus, true);
-	property_enable(base, &rphy.phy_cfg->chg_det.opmode, false);
+	property_enable(base, &rphy->phy_cfg->chg_det.opmode, false);
 
-	rphy.dcd_retries = CHG_DCD_MAX_RETRIES;
-	rphy.primary_retries = CHG_PRI_MAX_RETRIES;
+	rphy->dcd_retries = CHG_DCD_MAX_RETRIES;
+	rphy->primary_retries = CHG_PRI_MAX_RETRIES;
 
 	/* stage 1, start DCD processing stage */
-	rockchip_chg_enable_dcd(&rphy, true);
+	rockchip_chg_enable_dcd(rphy, true);
 
-	while (rphy.dcd_retries--) {
+	while (rphy->dcd_retries--) {
 		mdelay(CHG_DCD_POLL_TIME);
 
 		/* get data contact detection status */
-		is_dcd = property_enabled(rphy.grf_base,
-					  &rphy.phy_cfg->chg_det.dp_det);
+		is_dcd = property_enabled(rphy->grf_base,
+					  &rphy->phy_cfg->chg_det.dp_det);
 
-		if (is_dcd || !rphy.dcd_retries) {
+		if (is_dcd || !rphy->dcd_retries) {
 			/*
 			 * stage 2, turn off DCD circuitry, then
 			 * voltage source on DP, probe on DM.
 			 */
-			rockchip_chg_enable_dcd(&rphy, false);
-			rockchip_chg_enable_primary_det(&rphy, true);
+			rockchip_chg_enable_dcd(rphy, false);
+			rockchip_chg_enable_primary_det(rphy, true);
 			break;
 		}
 	}
 
 	mdelay(CHG_PRIMARY_DET_TIME);
-	vout = property_enabled(rphy.grf_base,
-				&rphy.phy_cfg->chg_det.cp_det);
-	rockchip_chg_enable_primary_det(&rphy, false);
+	vout = property_enabled(rphy->grf_base,
+				&rphy->phy_cfg->chg_det.cp_det);
+	rockchip_chg_enable_primary_det(rphy, false);
 	if (vout) {
 		/* stage 3, voltage source on DM, probe on DP */
-		rockchip_chg_enable_secondary_det(&rphy, true);
+		rockchip_chg_enable_secondary_det(rphy, true);
 	} else {
-		if (!rphy.dcd_retries) {
+		if (!rphy->dcd_retries) {
 			/* floating charger found */
 			chg_type = POWER_SUPPLY_TYPE_USB_FLOATING;
 			goto out;
@@ -389,10 +309,10 @@ int rockchip_chg_get_type(void)
 			 * Retry some times to make sure that it's
 			 * really a USB SDP charger.
 			 */
-			vout = rockchip_chg_primary_det_retry(&rphy);
+			vout = rockchip_chg_primary_det_retry(rphy);
 			if (vout) {
 				/* stage 3, voltage source on DM, probe on DP */
-				rockchip_chg_enable_secondary_det(&rphy, true);
+				rockchip_chg_enable_secondary_det(rphy, true);
 			} else {
 				/* USB SDP charger found */
 				chg_type = POWER_SUPPLY_TYPE_USB;
@@ -402,10 +322,10 @@ int rockchip_chg_get_type(void)
 	}
 
 	mdelay(CHG_SECONDARY_DET_TIME);
-	vout = property_enabled(rphy.grf_base,
-				&rphy.phy_cfg->chg_det.dcp_det);
+	vout = property_enabled(rphy->grf_base,
+				&rphy->phy_cfg->chg_det.dcp_det);
 	/* stage 4, turn off voltage source */
-	rockchip_chg_enable_secondary_det(&rphy, false);
+	rockchip_chg_enable_secondary_det(rphy, false);
 	if (vout)
 		chg_type = POWER_SUPPLY_TYPE_USB_DCP;
 	else
@@ -413,7 +333,7 @@ int rockchip_chg_get_type(void)
 
 out:
 	/* Resume USB-PHY and put the controller in normal mode */
-	property_enable(base, &rphy.phy_cfg->chg_det.opmode, true);
+	property_enable(base, &rphy->phy_cfg->chg_det.opmode, true);
 	property_enable(base, &port_cfg->phy_sus, false);
 
 	debug("charger is %s\n", chg_to_string(chg_type));
@@ -424,21 +344,23 @@ out:
 void otg_phy_init(struct dwc2_udc *dev)
 {
 	const struct rockchip_usb2phy_port_cfg *port_cfg;
-	struct rockchip_usb2phy rphy;
+	struct rockchip_usb2phy *rphy;
+	struct udevice *udev;
 	void __iomem *base;
 	int ret;
 
-	ret = rockchip_usb2phy_parse(&rphy);
-	if (ret) {
-		pr_err("%s: parse usb2phy failed %d\n", __func__, ret);
+	ret = uclass_get_device(UCLASS_PHY, 0, &udev);
+	if (ret == -ENODEV) {
+		pr_err("%s: get u2phy node failed: %d\n", __func__, ret);
 		return;
 	}
 
-	base = get_reg_base(&rphy);
-	port_cfg = &rphy.phy_cfg->port_cfgs[USB2PHY_PORT_OTG];
+	rphy = dev_get_priv(udev);
+	base = get_reg_base(rphy);
+	port_cfg = &rphy->phy_cfg->port_cfgs[USB2PHY_PORT_OTG];
 
 	/* Set the USB-PHY COMMONONN to 1'b0 to ensure USB's clocks */
-	property_enable(base, &rphy.phy_cfg->clkout_ctl, false);
+	property_enable(base, &rphy->phy_cfg->clkout_ctl, false);
 
 	/* Reset USB-PHY */
 	property_enable(base, &port_cfg->phy_sus, true);

commit 335adcb55f47e6021f59c77de88d48046b5e755a
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Feb 9 20:19:58 2018 +0800

    rockchip: video: fix for lvds display
    
    lvds panel do not need phy.
    add panel->node for separate panel dts node.
    
    Change-Id: I07e9e1365bd6a080f04af8e7bc4635e3c48bed06
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index c3dde0ff86..1c05de3383 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -125,9 +125,10 @@ static struct udevice *get_panel_device(struct display_state *state, ofnode conn
 							  np_to_ofnode(panel),
 							  &dev);
 			if (ret) {
-				printf("Warn: can't find crtc driver\n");
+				printf("Warn: can't find panel drv %d\n", ret);
 				continue;
 			}
+			panel_state->node = np_to_ofnode(panel);
 			return dev;
 		}
 	}
@@ -146,7 +147,7 @@ static int connector_phy_init(struct display_state *state)
 					   &dev);
 	if (ret) {
 		printf("Warn: can't find phy driver\n");
-		return ret;
+		return 0;
 	}
 	phy = (const struct rockchip_phy *)dev_get_driver_data(dev);
 	if (!phy) {
@@ -843,7 +844,7 @@ static int rockchip_display_probe(struct udevice *dev)
 						  np_to_ofnode(vop_node),
 						  &crtc_dev);
 		if (ret) {
-			printf("Warn: can't find crtc driver\n");
+			printf("Warn: can't find crtc driver %d\n", ret);
 			continue;
 		}
 		crtc = (const struct rockchip_crtc *)dev_get_driver_data(crtc_dev);

commit e18a7d002c12b3af1a2fd09b988df46582a0e732
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Feb 8 20:11:34 2018 +0800

    configs: px30_common.h: enable CONFIG_PREBOOT
    
    Change-Id: I5b2055ab20917a0ee0ef8181e23a5f3c97203c5c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index 657c5d4db4..e8d8d4cc23 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -41,7 +41,7 @@
 #define CONFIG_NR_DRAM_BANKS		2
 #define SDRAM_MAX_SIZE			0xff000000
 #define SDRAM_BANK_SIZE			(2UL << 30)
-
+#define CONFIG_PREBOOT
 
 #ifndef CONFIG_SPL_BUILD
 

commit 93f9f01933ecd59b8051642aa3391c25cc660ead
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Feb 8 11:36:21 2018 +0800

    rockchip: px30: enable ARM_SMCCC
    
    Change-Id: Ifce57bda8c40c849c85135eecb13c9c361a19363
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 6d44919b95..ad488a53b4 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -4,6 +4,7 @@ config ROCKCHIP_PX30
 	bool "Support Rockchip PX30"
 	select ARM64
 	select GICV2
+	select ARM_SMCCC
 	help
 	  The Rockchip PX30 is a ARM-based SoC with a quad-core Cortex-A35
 	  including NEON and GPU, Mali-400 graphics, several DDR3 options

commit f7df4e785970d5bd2548149f08dac3e61a68d13e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Feb 8 10:19:28 2018 +0800

    configs: evb-px30: enable charge animation
    
    Change-Id: If1955f5df956914cb30130ee0666aff98504071c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 164fd2161b..4047cae04d 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -99,3 +99,6 @@ CONFIG_REGULATOR_PWM=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_REGULATOR_RK8XX=y
 CONFIG_DM_REGULATOR=y
+CONFIG_DM_CHARGE_DISPLAY=y
+CONFIG_CHARGE_ANIMATION=y
+CONFIG_DM_FUEL_GAUGE=y

commit ac1dc0c37a5bde2bf6a399028a52c0fbe3f99d65
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Feb 3 18:02:09 2018 +0800

    charge animation: export struct charge_animation_pdata
    
    This is the most flexsible way for all fuel gauge driver to get
    fdt config info from charge animation platdata.
    
    Change-Id: I33aa52c34f2c62c10b58003a10e5a8d1d6e5d7d3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/cmd/charge.c b/cmd/charge.c
index a9ee0d4306..a06eae90c7 100644
--- a/cmd/charge.c
+++ b/cmd/charge.c
@@ -8,6 +8,7 @@
 #include <command.h>
 #include <dm.h>
 #include <power/charge_display.h>
+#include <power/charge_animation.h>
 
 static int charge_display(cmd_tbl_t *cmdtp, int flag, int argc,
 			  char *const argv[])
@@ -15,6 +16,7 @@ static int charge_display(cmd_tbl_t *cmdtp, int flag, int argc,
 	int on_soc, on_voltage, screen_voltage;
 	int ret, save[3];
 	struct udevice *dev;
+	struct charge_animation_pdata *pdata;
 
 	if (argc != 4 && argc != 1)
 		return CMD_RET_USAGE;
@@ -30,9 +32,10 @@ static int charge_display(cmd_tbl_t *cmdtp, int flag, int argc,
 	}
 
 	if (argc == 4) {
-		save[0] = charge_display_get_power_on_soc(dev);
-		save[1] = charge_display_get_power_on_voltage(dev);
-		save[2] = charge_display_get_screen_on_voltage(dev);
+		pdata = dev_get_platdata(dev);
+		save[0] = pdata->exit_charge_level;
+		save[1] = pdata->exit_charge_voltage;
+		save[2] = pdata->screen_on_voltage;
 
 		on_soc = simple_strtoul(argv[1], NULL, 0);
 		on_voltage = simple_strtoul(argv[2], NULL, 0);
@@ -40,16 +43,15 @@ static int charge_display(cmd_tbl_t *cmdtp, int flag, int argc,
 		debug("new: on_soc=%d, on_voltage=%d, screen_voltage=%d\n",
 		      on_soc, on_voltage, screen_voltage);
 
-		charge_display_set_power_on_soc(dev, on_soc);
-		charge_display_set_power_on_voltage(dev, on_voltage);
-		charge_display_set_screen_on_voltage(dev, screen_voltage);
+		pdata->exit_charge_level = on_soc;
+		pdata->exit_charge_voltage = on_voltage;
+		pdata->screen_on_voltage = screen_voltage;
 
 		charge_display_show(dev);
 
-		charge_display_set_power_on_soc(dev, save[0]);
-		charge_display_set_power_on_voltage(dev, save[1]);
-		charge_display_set_screen_on_voltage(dev, save[2]);
-
+		pdata->exit_charge_level = save[0];
+		pdata->exit_charge_voltage = save[1];
+		pdata->screen_on_voltage = save[2];
 	} else if (argc == 1) {
 		charge_display_show(dev);
 	} else {
diff --git a/drivers/power/charge-display-uclass.c b/drivers/power/charge-display-uclass.c
index d3899b972f..7d3f16457c 100644
--- a/drivers/power/charge-display-uclass.c
+++ b/drivers/power/charge-display-uclass.c
@@ -9,36 +9,6 @@
 #include <dm.h>
 #include <power/charge_display.h>
 
-int charge_display_get_power_on_soc(struct udevice *dev)
-{
-	const struct dm_charge_display_ops *ops = dev_get_driver_ops(dev);
-
-	if (!ops || !ops->get_power_on_soc)
-		return -ENOSYS;
-
-	return ops->get_power_on_soc(dev);
-}
-
-int charge_display_get_power_on_voltage(struct udevice *dev)
-{
-	const struct dm_charge_display_ops *ops = dev_get_driver_ops(dev);
-
-	if (!ops || !ops->get_power_on_voltage)
-		return -ENOSYS;
-
-	return ops->get_power_on_voltage(dev);
-}
-
-int charge_display_get_screen_on_voltage(struct udevice *dev)
-{
-	const struct dm_charge_display_ops *ops = dev_get_driver_ops(dev);
-
-	if (!ops || !ops->get_screen_on_voltage)
-		return -ENOSYS;
-
-	return ops->get_screen_on_voltage(dev);
-}
-
 int charge_display_show(struct udevice *dev)
 {
 	const struct dm_charge_display_ops *ops = dev_get_driver_ops(dev);
@@ -49,36 +19,6 @@ int charge_display_show(struct udevice *dev)
 	return ops->show(dev);
 }
 
-int charge_display_set_power_on_soc(struct udevice *dev, int val)
-{
-	const struct dm_charge_display_ops *ops = dev_get_driver_ops(dev);
-
-	if (!ops || !ops->set_power_on_soc)
-		return -ENOSYS;
-
-	return ops->set_power_on_soc(dev, val);
-}
-
-int charge_display_set_power_on_voltage(struct udevice *dev, int val)
-{
-	const struct dm_charge_display_ops *ops = dev_get_driver_ops(dev);
-
-	if (!ops || !ops->set_power_on_voltage)
-		return -ENOSYS;
-
-	return ops->set_power_on_voltage(dev, val);
-}
-
-int charge_display_set_screen_on_voltage(struct udevice *dev, int val)
-{
-	const struct dm_charge_display_ops *ops = dev_get_driver_ops(dev);
-
-	if (!ops || !ops->set_screen_on_voltage)
-		return -ENOSYS;
-
-	return ops->set_screen_on_voltage(dev, val);
-}
-
 UCLASS_DRIVER(charge_display) = {
 	.id	= UCLASS_CHARGE_DISPLAY,
 	.name	= "charge_display",
diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 597eea10e9..b462e4a84c 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -16,6 +16,7 @@
 #include <asm/suspend.h>
 #include <linux/input.h>
 #include <power/charge_display.h>
+#include <power/charge_animation.h>
 #include <power/fuel_gauge.h>
 #include <power/pmic.h>
 #include <power/rk8xx_pmic.h>
@@ -39,85 +40,6 @@ struct charge_animation_priv {
 	int image_num;
 };
 
-struct charge_animation_pdata {
-	int android_charge;
-	int uboot_charge;
-
-	int exit_charge_voltage;
-	int exit_charge_level;
-
-	int low_power_voltage;
-
-	int screen_on_voltage;
-	int system_suspend;
-};
-
-static int charge_animation_get_power_on_soc(struct udevice *dev)
-{
-	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
-
-	if (!pdata)
-		return -ENOSYS;
-
-	return pdata->exit_charge_level;
-}
-
-static int charge_animation_get_power_on_voltage(struct udevice *dev)
-{
-	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
-
-	if (!pdata)
-		return -ENOSYS;
-
-	return pdata->exit_charge_voltage;
-}
-
-static int charge_animation_get_screen_on_voltage(struct udevice *dev)
-{
-	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
-
-	if (!pdata)
-		return -ENOSYS;
-
-	return pdata->screen_on_voltage;
-}
-
-static int charge_animation_set_power_on_soc(struct udevice *dev, int val)
-{
-	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
-
-	if (!pdata)
-		return -ENOSYS;
-
-	pdata->exit_charge_level = val;
-
-	return 0;
-}
-
-static int charge_animation_set_power_on_voltage(struct udevice *dev, int val)
-{
-	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
-
-	if (!pdata)
-		return -ENOSYS;
-
-	pdata->exit_charge_voltage = val;
-
-	return 0;
-}
-
-static int charge_animation_set_screen_on_voltage(struct udevice *dev, int val)
-{
-	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
-
-	if (!pdata)
-		return -ENOSYS;
-
-	pdata->screen_on_voltage = val;
-
-	return 0;
-}
-
 /*
  * IF you want to use your own charge images, please:
  *
@@ -590,12 +512,6 @@ static int charge_animation_show(struct udevice *dev)
 }
 
 static const struct dm_charge_display_ops charge_animation_ops = {
-	.get_power_on_soc = charge_animation_get_power_on_soc,
-	.get_power_on_voltage = charge_animation_get_power_on_voltage,
-	.get_screen_on_voltage = charge_animation_get_screen_on_voltage,
-	.set_power_on_soc = charge_animation_set_power_on_soc,
-	.set_power_on_voltage = charge_animation_set_power_on_voltage,
-	.set_screen_on_voltage = charge_animation_set_screen_on_voltage,
 	.show = charge_animation_show,
 };
 
diff --git a/drivers/power/fuel_gauge/fg_rk816.c b/drivers/power/fuel_gauge/fg_rk816.c
index 91c7d74efd..84e1ee46f8 100644
--- a/drivers/power/fuel_gauge/fg_rk816.c
+++ b/drivers/power/fuel_gauge/fg_rk816.c
@@ -15,6 +15,7 @@
 #include <power/pmic.h>
 #include <dm/uclass-internal.h>
 #include <power/charge_display.h>
+#include <power/charge_animation.h>
 #include <power/fuel_gauge.h>
 #include <power/rk8xx_pmic.h>
 #include <linux/usb/phy-rockchip-inno-usb2.h>
@@ -919,22 +920,19 @@ static int rk816_bat_get_charger_type(struct battery_priv *di)
 	return rk816_bat_get_usb_state(di);
 }
 
-static bool rk816_bat_is_under_threshold(struct battery_priv *di)
+static bool rk816_bat_need_initialize(struct battery_priv *di)
 {
+	struct charge_animation_pdata *pdata;
 	bool initialize = false;
 #ifdef CONFIG_DM_CHARGE_DISPLAY
 	struct udevice *dev;
-	int soc, voltage, est_voltage;
-	int err;
+	int est_voltage;
 
-	err = uclass_find_first_device(UCLASS_CHARGE_DISPLAY, &dev);
-	if (!err) {
+	if (!uclass_find_first_device(UCLASS_CHARGE_DISPLAY, &dev)) {
+		pdata = dev_get_platdata(dev);
 		est_voltage = rk816_bat_get_avg_voltage(di);
-		soc = charge_display_get_power_on_soc(dev);
-		voltage = charge_display_get_power_on_voltage(dev);
-		DBG("threshold: %d%%, %dmv; now: %d%%, %dmv\n",
-		    soc, voltage, di->dsoc, est_voltage);
-		if ((di->dsoc <= soc) || (est_voltage <= voltage))
+		if ((pdata->uboot_charge) ||
+		    (pdata->low_power_voltage >= est_voltage))
 			initialize = true;
 	}
 #endif
@@ -952,7 +950,9 @@ void rk816_bat_init_rsoc(struct battery_priv *di)
 		initialize = true;
 	/* Only charger online and under threshold, we do initialization */
 	else if (rk816_bat_get_charger_type(di) != NO_CHARGER)
-		initialize = rk816_bat_is_under_threshold(di);
+		initialize = rk816_bat_need_initialize(di);
+
+	printf("Fuel gauge initialize = %d\n", initialize);
 
 	if (!initialize)
 		return;
diff --git a/include/power/charge_animation.h b/include/power/charge_animation.h
new file mode 100644
index 0000000000..7cbc6d9952
--- /dev/null
+++ b/include/power/charge_animation.h
@@ -0,0 +1,22 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _CHARGE_ANIMATION_H_
+#define _CHARGE_ANIMATION_H_
+
+struct charge_animation_pdata {
+	int android_charge;
+	int uboot_charge;
+
+	int exit_charge_voltage;
+	int exit_charge_level;
+	int low_power_voltage;
+	int screen_on_voltage;
+
+	int system_suspend;
+};
+
+#endif
diff --git a/include/power/charge_display.h b/include/power/charge_display.h
index 2fc9b3adec..302a277329 100644
--- a/include/power/charge_display.h
+++ b/include/power/charge_display.h
@@ -8,22 +8,9 @@
 #define _CHARGE_DISPLAY_H_
 
 struct dm_charge_display_ops {
-	int (*get_power_on_soc)(struct udevice *dev);
-	int (*get_power_on_voltage)(struct udevice *dev);
-	int (*get_screen_on_voltage)(struct udevice *dev);
-	int (*set_power_on_soc)(struct udevice *dev, int val);
-	int (*set_power_on_voltage)(struct udevice *dev, int val);
-	int (*set_screen_on_voltage)(struct udevice *dev, int val);
 	int (*show)(struct udevice *dev);
 };
 
-int charge_display_get_power_on_soc(struct udevice *dev);
-int charge_display_get_power_on_voltage(struct udevice *dev);
-int charge_display_get_screen_on_voltage(struct udevice *dev);
-int charge_display_set_power_on_soc(struct udevice *dev, int val);
-int charge_display_set_power_on_voltage(struct udevice *dev, int val);
-int charge_display_set_screen_on_voltage(struct udevice *dev, int val);
-
 int charge_display_show(struct udevice *dev);
 
 #endif

commit 037c289fda1036212ef9421bdd7b2d31c21f80ac
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Feb 3 17:27:03 2018 +0800

    fuel gauge: rk816: refactor code
    
    1. use ofdata_to_platdata() to parse fdt;
    2. clean up code.
    
    Change-Id: I75a6cb721e10fa1f30e59b101b3db0bb19df8001
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk816.c b/drivers/power/fuel_gauge/fg_rk816.c
index 812c91bf68..91c7d74efd 100644
--- a/drivers/power/fuel_gauge/fg_rk816.c
+++ b/drivers/power/fuel_gauge/fg_rk816.c
@@ -64,6 +64,7 @@ static int dbg_enable = 0;
 #define BAT_CON			(1 << 4)
 #define VOL_INSTANT		(1 << 0)
 #define VOL_AVG			(0 << 0)
+#define VOL_AVG_MASK		(1 << 0)
 
 /* TS_CTRL_REG */
 #define GG_EN			(1 << 7)
@@ -116,7 +117,8 @@ static int dbg_enable = 0;
 #define DIV(x)			((x) ? (x) : 1)
 
 /***********************************************************/
-struct battery_info {
+struct battery_priv {
+	struct udevice *dev;
 	int		chrg_type;
 	int		poffset;
 	int		bat_res;
@@ -128,9 +130,9 @@ struct battery_info {
 	int		dsoc;
 	int		rsoc;
 	int		fcc;
-	int		qmax;
+	u32		qmax;
 	int		remain_cap;
-	int		design_cap;
+	u32		design_cap;
 	int		nac;
 	u32		*ocv_table;
 	u32		ocv_size;
@@ -180,8 +182,6 @@ enum dc_type {
 	DC_TYPE_OF_ADC,
 };
 
-static struct udevice *g_pmic_dev;
-
 static const u32 CHRG_VOL_SEL[] = {
 	4050, 4100, 4150, 4200, 4250, 4300, 4350
 };
@@ -194,14 +194,14 @@ static const u32 CHRG_CUR_INPUT[] = {
 	450, 800, 850, 1000, 1250, 1500, 1750, 2000
 };
 
-static int rk816_bat_read(u8 reg)
+static int rk816_bat_read(struct battery_priv *di, u8 reg)
 {
-	return pmic_reg_read(g_pmic_dev, reg);
+	return pmic_reg_read(di->dev->parent, reg);
 }
 
-static void rk816_bat_write(u8 reg, u8 buf)
+static void rk816_bat_write(struct battery_priv *di, u8 reg, u8 buf)
 {
-	pmic_reg_write(g_pmic_dev, reg, buf);
+	pmic_reg_write(di->dev->parent, reg, buf);
 }
 
 static int rk816_bat_dwc_otg_check_dpdm(void)
@@ -214,88 +214,85 @@ static int rk816_bat_dwc_otg_check_dpdm(void)
 #endif
 }
 
-static int rk816_bat_get_rsoc(struct battery_info *di)
+static int rk816_bat_get_rsoc(struct battery_priv *di)
 {
 	return (di->remain_cap + di->fcc / 200) * 100 / DIV(di->fcc);
 }
 
-static int rk816_bat_get_dsoc(struct  battery_info *di)
+static int rk816_bat_get_dsoc(struct  battery_priv *di)
 {
-	return rk816_bat_read(SOC_REG);
+	return rk816_bat_read(di, SOC_REG);
 }
 
-static void rk816_bat_enable_gauge(struct battery_info *di)
+static void rk816_bat_enable_gauge(struct battery_priv *di)
 {
 	u8 val;
 
-	val = rk816_bat_read(TS_CTRL_REG);
+	val = rk816_bat_read(di, TS_CTRL_REG);
 	val |= GG_EN;
-	rk816_bat_write(TS_CTRL_REG, val);
+	rk816_bat_write(di, TS_CTRL_REG, val);
 }
 
-static void rk816_bat_set_vol_instant_mode(struct battery_info *di)
+static void rk816_bat_set_vol_instant_mode(struct battery_priv *di)
 {
 	u8 val;
 
-	val = rk816_bat_read(GGSTS_REG);
+	val = rk816_bat_read(di, GGSTS_REG);
 	val |= VOL_INSTANT;
-	rk816_bat_write(GGSTS_REG, val);
+	rk816_bat_write(di, GGSTS_REG, val);
 }
 
-static void rk816_bat_set_vol_avg_mode(struct battery_info *di)
+static void rk816_bat_set_vol_avg_mode(struct battery_priv *di)
 {
 	u8 val;
 
-	val = rk816_bat_read(GGSTS_REG);
-	val &= ~0x01;
+	val = rk816_bat_read(di, GGSTS_REG);
+	val &= ~VOL_AVG_MASK;
 	val |= VOL_AVG;
-	rk816_bat_write(GGSTS_REG, val);
+	rk816_bat_write(di, GGSTS_REG, val);
 }
 
-static int rk816_bat_get_vcalib0(struct battery_info *di)
+static int rk816_bat_get_vcalib0(struct battery_priv *di)
 {
 	int val = 0;
 
-	val |= rk816_bat_read(VCALIB0_REGL) << 0;
-	val |= rk816_bat_read(VCALIB0_REGH) << 8;
+	val |= rk816_bat_read(di, VCALIB0_REGL) << 0;
+	val |= rk816_bat_read(di, VCALIB0_REGH) << 8;
 
 	return val;
 }
 
-static int rk816_bat_get_vcalib1(struct battery_info *di)
+static int rk816_bat_get_vcalib1(struct battery_priv *di)
 {
 	int val = 0;
 
-	val |= rk816_bat_read(VCALIB1_REGL) << 0;
-	val |= rk816_bat_read(VCALIB1_REGH) << 8;
+	val |= rk816_bat_read(di, VCALIB1_REGL) << 0;
+	val |= rk816_bat_read(di, VCALIB1_REGH) << 8;
 
-	DBG("<%s>. coffset: 0x%x\n", __func__, val);
 	return val;
 }
 
-static void rk816_bat_set_coffset(struct battery_info *di, int val)
+static void rk816_bat_set_coffset(struct battery_priv *di, int val)
 {
 	u8 buf;
 
 	buf = (val >> 0) & 0xff;
-	rk816_bat_write(CAL_OFFSET_REGL, buf);
+	rk816_bat_write(di, CAL_OFFSET_REGL, buf);
 	buf = (val >> 8) & 0xff;
-	rk816_bat_write(CAL_OFFSET_REGH, buf);
-
-	DBG("<%s>. set coffset: 0x%x\n", __func__, val);
+	rk816_bat_write(di, CAL_OFFSET_REGH, buf);
 }
 
-static int rk816_bat_get_ioffset(struct battery_info *di)
+static int rk816_bat_get_ioffset(struct battery_priv *di)
 {
 	int val = 0;
 
-	val |= rk816_bat_read(IOFFSET_REGL) << 0;
-	val |= rk816_bat_read(IOFFSET_REGH) << 8;
+	val |= rk816_bat_read(di, IOFFSET_REGL) << 0;
+	val |= rk816_bat_read(di, IOFFSET_REGH) << 8;
 
 	return val;
 }
 
-static void rk816_bat_init_voltage_kb(struct battery_info *di)
+static void rk816_bat_init_voltage_kb(struct battery_priv *di)
 {
 	int vcalib0, vcalib1;
 
@@ -306,24 +303,24 @@ static void rk816_bat_init_voltage_kb(struct battery_info *di)
 	DBG("%s. vk=%d, vb=%d\n", __func__, di->voltage_k, di->voltage_b);
 }
 
-static int rk816_bat_get_ocv_voltage(struct battery_info *di)
+static int rk816_bat_get_ocv_voltage(struct battery_priv *di)
 {
 	int vol, val = 0;
 
-	val |= rk816_bat_read(BAT_OCV_REGL) << 0;
-	val |= rk816_bat_read(BAT_OCV_REGH) << 8;
+	val |= rk816_bat_read(di, BAT_OCV_REGL) << 0;
+	val |= rk816_bat_read(di, BAT_OCV_REGH) << 8;
 	vol = di->voltage_k * val / 1000 + di->voltage_b;
 	vol = vol * 1100 / 1000;
 
 	return vol;
 }
 
-static int rk816_bat_get_avg_current(struct battery_info *di)
+static int rk816_bat_get_avg_current(struct battery_priv *di)
 {
 	int val = 0;
 
-	val |= rk816_bat_read(BAT_CUR_AVG_REGL) << 0;
-	val |= rk816_bat_read(BAT_CUR_AVG_REGH) << 8;
+	val |= rk816_bat_read(di, BAT_CUR_AVG_REGL) << 0;
+	val |= rk816_bat_read(di, BAT_CUR_AVG_REGH) << 8;
 
 	if (val & 0x800)
 		val -= 4096;
@@ -332,19 +329,19 @@ static int rk816_bat_get_avg_current(struct battery_info *di)
 	return val;
 }
 
-static int rk816_bat_get_avg_voltage(struct battery_info *di)
+static int rk816_bat_get_avg_voltage(struct battery_priv *di)
 {
 	int vol, val = 0;
 
-	val |= rk816_bat_read(BAT_VOL_REGL) << 0;
-	val |= rk816_bat_read(BAT_VOL_REGH) << 8;
+	val |= rk816_bat_read(di, BAT_VOL_REGL) << 0;
+	val |= rk816_bat_read(di, BAT_VOL_REGH) << 8;
 	vol = di->voltage_k * val / 1000 + di->voltage_b;
 	vol = vol * 1100 / 1000;
 
 	return vol;
 }
 
-static int rk816_bat_get_est_voltage(struct battery_info *di)
+static int rk816_bat_get_est_voltage(struct battery_priv *di)
 {
 	int est_vol, vol, curr;
 
@@ -371,7 +368,7 @@ static u8 rk816_bat_finish_ma(int fcc)
 	return ma;
 }
 
-static void rk816_bat_select_chrg_cv(struct battery_info *di)
+static void rk816_bat_select_chrg_cv(struct battery_priv *di)
 {
 	int index, chrg_vol_sel, chrg_cur_sel, chrg_cur_input;
 
@@ -401,7 +398,7 @@ static void rk816_bat_select_chrg_cv(struct battery_info *di)
 	    __func__, di->chrg_vol_sel, di->chrg_cur_input, di->chrg_cur_sel);
 }
 
-static void rk816_bat_init_chrg_config(struct battery_info *di)
+static void rk816_bat_init_chrg_config(struct battery_priv *di)
 {
 	u8 chrg_ctrl1, usb_ctrl, chrg_ctrl2, chrg_ctrl3;
 	u8 sup_sts, ggcon, thermal, finish_ma;
@@ -409,12 +406,12 @@ static void rk816_bat_init_chrg_config(struct battery_info *di)
 	rk816_bat_select_chrg_cv(di);
 	finish_ma = rk816_bat_finish_ma(di->fcc);
 
-	ggcon = rk816_bat_read(GGCON_REG);
-	sup_sts = rk816_bat_read(SUP_STS_REG);
-	usb_ctrl = rk816_bat_read(USB_CTRL_REG);
-	thermal = rk816_bat_read(THERMAL_REG);
-	chrg_ctrl2 = rk816_bat_read(CHRG_CTRL_REG2);
-	chrg_ctrl3 = rk816_bat_read(CHRG_CTRL_REG3);
+	ggcon = rk816_bat_read(di, GGCON_REG);
+	sup_sts = rk816_bat_read(di, SUP_STS_REG);
+	usb_ctrl = rk816_bat_read(di, USB_CTRL_REG);
+	thermal = rk816_bat_read(di, THERMAL_REG);
+	chrg_ctrl2 = rk816_bat_read(di, CHRG_CTRL_REG2);
+	chrg_ctrl3 = rk816_bat_read(di, CHRG_CTRL_REG3);
 
 	/* set charge current and voltage */
 	usb_ctrl &= ~INPUT_CUR_MSK;
@@ -441,13 +438,13 @@ static void rk816_bat_init_chrg_config(struct battery_info *di)
 	/* adc current mode */
 	ggcon |= ADC_CUR_MODE;
 
-	rk816_bat_write(GGCON_REG, ggcon);
-	rk816_bat_write(SUP_STS_REG, sup_sts);
-	rk816_bat_write(USB_CTRL_REG, usb_ctrl);
-	rk816_bat_write(THERMAL_REG, thermal);
-	rk816_bat_write(CHRG_CTRL_REG1, chrg_ctrl1);
-	rk816_bat_write(CHRG_CTRL_REG2, chrg_ctrl2);
-	rk816_bat_write(CHRG_CTRL_REG3, chrg_ctrl3);
+	rk816_bat_write(di, GGCON_REG, ggcon);
+	rk816_bat_write(di, SUP_STS_REG, sup_sts);
+	rk816_bat_write(di, USB_CTRL_REG, usb_ctrl);
+	rk816_bat_write(di, THERMAL_REG, thermal);
+	rk816_bat_write(di, CHRG_CTRL_REG1, chrg_ctrl1);
+	rk816_bat_write(di, CHRG_CTRL_REG2, chrg_ctrl2);
+	rk816_bat_write(di, CHRG_CTRL_REG3, chrg_ctrl3);
 }
 
 static u32 interpolate(int value, u32 *table, int size)
@@ -497,7 +494,7 @@ static int32_t ab_div_c(u32 a, u32 b, u32 c)
 	return ans;
 }
 
-static int rk816_bat_vol_to_cap(struct battery_info *di, int voltage)
+static int rk816_bat_vol_to_cap(struct battery_priv *di, int voltage)
 {
 	u32 *ocv_table, tmp;
 	int ocv_size, ocv_cap;
@@ -510,7 +507,7 @@ static int rk816_bat_vol_to_cap(struct battery_info *di, int voltage)
 	return ocv_cap;
 }
 
-static int rk816_bat_vol_to_soc(struct battery_info *di, int voltage)
+static int rk816_bat_vol_to_soc(struct battery_priv *di, int voltage)
 {
 	u32 *ocv_table, tmp;
 	int ocv_size, ocv_soc;
@@ -523,40 +520,40 @@ static int rk816_bat_vol_to_soc(struct battery_info *di, int voltage)
 	return ocv_soc;
 }
 
-static int rk816_bat_get_prev_cap(struct battery_info *di)
+static int rk816_bat_get_prev_cap(struct battery_priv *di)
 {
 	int val = 0;
 
-	val |= rk816_bat_read(REMAIN_CAP_REG3) << 24;
-	val |= rk816_bat_read(REMAIN_CAP_REG2) << 16;
-	val |= rk816_bat_read(REMAIN_CAP_REG1) << 8;
-	val |= rk816_bat_read(REMAIN_CAP_REG0) << 0;
+	val |= rk816_bat_read(di, REMAIN_CAP_REG3) << 24;
+	val |= rk816_bat_read(di, REMAIN_CAP_REG2) << 16;
+	val |= rk816_bat_read(di, REMAIN_CAP_REG1) << 8;
+	val |= rk816_bat_read(di, REMAIN_CAP_REG0) << 0;
 
 	return val;
 }
 
-static void rk816_bat_save_fcc(struct battery_info *di, u32 cap)
+static void rk816_bat_save_fcc(struct battery_priv *di, u32 cap)
 {
 	u8 buf;
 
 	buf = (cap >> 24) & 0xff;
-	rk816_bat_write(NEW_FCC_REG3, buf);
+	rk816_bat_write(di, NEW_FCC_REG3, buf);
 	buf = (cap >> 16) & 0xff;
-	rk816_bat_write(NEW_FCC_REG2, buf);
+	rk816_bat_write(di, NEW_FCC_REG2, buf);
 	buf = (cap >> 8) & 0xff;
-	rk816_bat_write(NEW_FCC_REG1, buf);
+	rk816_bat_write(di, NEW_FCC_REG1, buf);
 	buf = (cap >> 0) & 0xff;
-	rk816_bat_write(NEW_FCC_REG0, buf);
+	rk816_bat_write(di, NEW_FCC_REG0, buf);
 }
 
-static int rk816_bat_get_fcc(struct battery_info *di)
+static int rk816_bat_get_fcc(struct battery_priv *di)
 {
 	int val = 0;
 
-	val |= rk816_bat_read(NEW_FCC_REG3) << 24;
-	val |= rk816_bat_read(NEW_FCC_REG2) << 16;
-	val |= rk816_bat_read(NEW_FCC_REG1) << 8;
-	val |= rk816_bat_read(NEW_FCC_REG0) << 0;
+	val |= rk816_bat_read(di, NEW_FCC_REG3) << 24;
+	val |= rk816_bat_read(di, NEW_FCC_REG2) << 16;
+	val |= rk816_bat_read(di, NEW_FCC_REG1) << 8;
+	val |= rk816_bat_read(di, NEW_FCC_REG0) << 0;
 
 	if (val < MIN_FCC)
 		val = di->design_cap;
@@ -566,31 +563,31 @@ static int rk816_bat_get_fcc(struct battery_info *di)
 	return val;
 }
 
-static u8 rk816_bat_get_pwroff_min(struct battery_info *di)
+static u8 rk816_bat_get_pwroff_min(struct battery_priv *di)
 {
 	u8 cur, last;
 
-	cur = rk816_bat_read(NON_ACT_TIMER_CNT_REG);
-	last = rk816_bat_read(NON_ACT_TIMER_CNT_SAVE_REG);
-	rk816_bat_write(NON_ACT_TIMER_CNT_SAVE_REG, cur);
+	cur = rk816_bat_read(di, NON_ACT_TIMER_CNT_REG);
+	last = rk816_bat_read(di, NON_ACT_TIMER_CNT_SAVE_REG);
+	rk816_bat_write(di, NON_ACT_TIMER_CNT_SAVE_REG, cur);
 
 	return (cur != last) ? cur : 0;
 }
 
-static int rk816_bat_get_coulomb_cap(struct battery_info *di)
+static int rk816_bat_get_coulomb_cap(struct battery_priv *di)
 {
 	int val = 0;
 
-	val |= rk816_bat_read(GASCNT_REG3) << 24;
-	val |= rk816_bat_read(GASCNT_REG2) << 16;
-	val |= rk816_bat_read(GASCNT_REG1) << 8;
-	val |= rk816_bat_read(GASCNT_REG0) << 0;
+	val |= rk816_bat_read(di, GASCNT_REG3) << 24;
+	val |= rk816_bat_read(di, GASCNT_REG2) << 16;
+	val |= rk816_bat_read(di, GASCNT_REG1) << 8;
+	val |= rk816_bat_read(di, GASCNT_REG0) << 0;
 	val /= 2390;
 
 	return val;
 }
 
-static void rk816_bat_init_capacity(struct battery_info *di, u32 capacity)
+static void rk816_bat_init_capacity(struct battery_priv *di, u32 capacity)
 {
 	u8 buf;
 	u32 cap;
@@ -602,30 +599,30 @@ static void rk816_bat_init_capacity(struct battery_info *di, u32 capacity)
 
 	cap = capacity * 2390;
 	buf = (cap >> 24) & 0xff;
-	rk816_bat_write(GASCNT_CAL_REG3, buf);
+	rk816_bat_write(di, GASCNT_CAL_REG3, buf);
 	buf = (cap >> 16) & 0xff;
-	rk816_bat_write(GASCNT_CAL_REG2, buf);
+	rk816_bat_write(di, GASCNT_CAL_REG2, buf);
 	buf = (cap >> 8) & 0xff;
-	rk816_bat_write(GASCNT_CAL_REG1, buf);
+	rk816_bat_write(di, GASCNT_CAL_REG1, buf);
 	buf = (cap >> 0) & 0xff;
-	rk816_bat_write(GASCNT_CAL_REG0, buf);
+	rk816_bat_write(di, GASCNT_CAL_REG0, buf);
 
 	di->remain_cap = rk816_bat_get_coulomb_cap(di);
 	di->rsoc = rk816_bat_get_rsoc(di);
 }
 
-static bool is_rk816_bat_ocv_valid(struct battery_info *di)
+static bool is_rk816_bat_ocv_valid(struct battery_priv *di)
 {
 	return di->pwroff_min >= 30 ? true : false;
 }
 
-static int rk816_bat_get_usb_state(struct battery_info *di)
+static int rk816_bat_get_usb_state(struct battery_priv *di)
 {
 	int charger_type;
 
 	switch (rk816_bat_dwc_otg_check_dpdm()) {
 	case 0:
-		if ((rk816_bat_read(VB_MON_REG) & PLUG_IN_STS) != 0)
+		if ((rk816_bat_read(di, VB_MON_REG) & PLUG_IN_STS) != 0)
 			charger_type = DC_CHARGER;
 		else
 			charger_type = NO_CHARGER;
@@ -644,35 +641,35 @@ static int rk816_bat_get_usb_state(struct battery_info *di)
 	return charger_type;
 }
 
-static void rk816_bat_clr_initialized_state(struct battery_info *di)
+static void rk816_bat_clr_initialized_state(struct battery_priv *di)
 {
 	u8 val;
 
-	val = rk816_bat_read(MISC_MARK_REG);
+	val = rk816_bat_read(di, MISC_MARK_REG);
 	val &= ~FG_INIT;
-	rk816_bat_write(MISC_MARK_REG, val);
+	rk816_bat_write(di, MISC_MARK_REG, val);
 }
 
-static bool rk816_bat_is_initialized(struct battery_info *di)
+static bool rk816_bat_is_initialized(struct battery_priv *di)
 {
-	return (rk816_bat_read(MISC_MARK_REG) & FG_INIT) ? true : false;
+	return (rk816_bat_read(di, MISC_MARK_REG) & FG_INIT) ? true : false;
 }
 
-static void rk816_bat_set_initialized_state(struct battery_info *di)
+static void rk816_bat_set_initialized_state(struct battery_priv *di)
 {
 	u8 val;
 
-	val = rk816_bat_read(MISC_MARK_REG);
+	val = rk816_bat_read(di, MISC_MARK_REG);
 	if (rk816_bat_get_usb_state(di) != NO_CHARGER) {
 		val |= FG_INIT;
-		rk816_bat_write(MISC_MARK_REG, val);
+		rk816_bat_write(di, MISC_MARK_REG, val);
 		BAT_INFO("fuel gauge initialized... estv=%d, ch=%d\n",
 			 rk816_bat_get_est_voltage(di),
 			 rk816_bat_get_usb_state(di));
 	}
 }
 
-static void rk816_bat_first_pwron(struct battery_info *di)
+static void rk816_bat_first_pwron(struct battery_priv *di)
 {
 	int ocv_vol;
 
@@ -688,20 +685,20 @@ static void rk816_bat_first_pwron(struct battery_info *di)
 	BAT_INFO("first power on: soc=%d\n", di->dsoc);
 }
 
-static u8 rk816_bat_get_halt_cnt(struct battery_info *di)
+static u8 rk816_bat_get_halt_cnt(struct battery_priv *di)
 {
-	return rk816_bat_read(HALT_CNT_REG);
+	return rk816_bat_read(di, HALT_CNT_REG);
 }
 
-static void rk816_bat_inc_halt_cnt(struct battery_info *di)
+static void rk816_bat_inc_halt_cnt(struct battery_priv *di)
 {
 	u8 cnt;
 
-	cnt = rk816_bat_read(HALT_CNT_REG);
-	rk816_bat_write(HALT_CNT_REG, ++cnt);
+	cnt = rk816_bat_read(di, HALT_CNT_REG);
+	rk816_bat_write(di, HALT_CNT_REG, ++cnt);
 }
 
-static bool is_rk816_bat_last_halt(struct battery_info *di)
+static bool is_rk816_bat_last_halt(struct battery_priv *di)
 {
 	int pre_cap = rk816_bat_get_prev_cap(di);
 	int now_cap = rk816_bat_get_coulomb_cap(di);
@@ -715,7 +712,7 @@ static bool is_rk816_bat_last_halt(struct battery_info *di)
 	}
 }
 
-static void rk816_bat_not_first_pwron(struct battery_info *di)
+static void rk816_bat_not_first_pwron(struct battery_priv *di)
 {
 	int pre_soc, pre_cap, ocv_cap, ocv_soc, ocv_vol, now_cap;
 
@@ -766,30 +763,30 @@ finish:
 		 );
 }
 
-static bool is_rk816_bat_first_poweron(struct battery_info *di)
+static bool is_rk816_bat_first_poweron(struct battery_priv *di)
 {
 	u8 buf;
 
-	buf = rk816_bat_read(GGSTS_REG);
+	buf = rk816_bat_read(di, GGSTS_REG);
 	if (buf & BAT_CON) {
 		buf &= ~BAT_CON;
-		rk816_bat_write(GGSTS_REG, buf);
+		rk816_bat_write(di, GGSTS_REG, buf);
 		return true;
 	}
 
 	return false;
 }
 
-static bool rk816_bat_ocv_sw_reset(struct battery_info *di)
+static bool rk816_bat_ocv_sw_reset(struct battery_priv *di)
 {
 	u8 buf;
 
-	buf = rk816_bat_read(MISC_MARK_REG);
+	buf = rk816_bat_read(di, MISC_MARK_REG);
 	if (((buf & FG_RESET_LATE) && di->pwroff_min >= 30) ||
 	    (buf & FG_RESET_NOW)) {
 		buf &= ~FG_RESET_LATE;
 		buf &= ~FG_RESET_NOW;
-		rk816_bat_write(MISC_MARK_REG, buf);
+		rk816_bat_write(di, MISC_MARK_REG, buf);
 		BAT_INFO("manual reset fuel gauge\n");
 		return true;
 	} else {
@@ -797,7 +794,7 @@ static bool rk816_bat_ocv_sw_reset(struct battery_info *di)
 	}
 }
 
-static int rk816_bat_calc_linek(struct battery_info *di)
+static int rk816_bat_calc_linek(struct battery_priv *di)
 {
 	int linek, diff, delta;
 
@@ -826,17 +823,17 @@ static int rk816_bat_calc_linek(struct battery_info *di)
 	return linek;
 }
 
-static int rk816_bat_get_coffset(struct battery_info *di)
+static int rk816_bat_get_coffset(struct battery_priv *di)
 {
 	int val = 0;
 
-	val |= rk816_bat_read(CAL_OFFSET_REGL) << 0;
-	val |= rk816_bat_read(CAL_OFFSET_REGH) << 8;
+	val |= rk816_bat_read(di, CAL_OFFSET_REGL) << 0;
+	val |= rk816_bat_read(di, CAL_OFFSET_REGH) << 8;
 
 	return val;
 }
 
-static void rk816_bat_init_poffset(struct battery_info *di)
+static void rk816_bat_init_poffset(struct battery_priv *di)
 {
 	int coffset, ioffset;
 
@@ -845,33 +842,33 @@ static void rk816_bat_init_poffset(struct battery_info *di)
 	di->poffset = coffset - ioffset;
 }
 
-static bool is_rk816_bat_exist(struct  battery_info *di)
+static bool is_rk816_bat_exist(struct  battery_priv *di)
 {
-	return (rk816_bat_read(SUP_STS_REG) & BAT_EXS) ? true : false;
+	return (rk816_bat_read(di, SUP_STS_REG) & BAT_EXS) ? true : false;
 }
 
-static void rk816_bat_set_current(int input_current)
+static void rk816_bat_set_current(struct battery_priv *di, int input_current)
 {
 	u8 usb_ctrl;
 
-	usb_ctrl = rk816_bat_read(USB_CTRL_REG);
+	usb_ctrl = rk816_bat_read(di, USB_CTRL_REG);
 	usb_ctrl &= ~INPUT_CUR_MSK;
 	usb_ctrl |= (input_current);
-	rk816_bat_write(USB_CTRL_REG, usb_ctrl);
+	rk816_bat_write(di, USB_CTRL_REG, usb_ctrl);
 }
 
-static void rk816_bat_charger_setting(struct battery_info *di, int charger)
+static void rk816_bat_charger_setting(struct battery_priv *di, int charger)
 {
 	static u8 old_charger = UNDEF_CHARGER;
 
 	/*charger changed*/
 	if (old_charger != charger) {
 		if (charger == NO_CHARGER)
-			rk816_bat_set_current(ILIM_450MA);
+			rk816_bat_set_current(di, ILIM_450MA);
 		else if (charger == USB_CHARGER)
-			rk816_bat_set_current(ILIM_450MA);
+			rk816_bat_set_current(di, ILIM_450MA);
 		else if (charger == DC_CHARGER || charger == AC_CHARGER)
-			rk816_bat_set_current(di->chrg_cur_input);
+			rk816_bat_set_current(di, di->chrg_cur_input);
 		else
 			BAT_INFO("charger setting error %d\n", charger);
 
@@ -879,7 +876,7 @@ static void rk816_bat_charger_setting(struct battery_info *di, int charger)
 	}
 }
 
-static int rk816_bat_get_dc_state(struct battery_info *di)
+static int rk816_bat_get_dc_state(struct battery_priv *di)
 {
 	/* struct adc_channel val; */
 
@@ -901,12 +898,12 @@ static int rk816_bat_get_dc_state(struct battery_info *di)
 	}
 }
 
-static int rk816_bat_get_charger_type(struct battery_info *di)
+static int rk816_bat_get_charger_type(struct battery_priv *di)
 {
 	int charger_type = NO_CHARGER;
 
 	/* check by ic hardware: this check make check work safer */
-	if ((rk816_bat_read(VB_MON_REG) & PLUG_IN_STS) == 0)
+	if ((rk816_bat_read(di, VB_MON_REG) & PLUG_IN_STS) == 0)
 		return NO_CHARGER;
 
 	/* virtual or bat not exist */
@@ -922,7 +919,7 @@ static int rk816_bat_get_charger_type(struct battery_info *di)
 	return rk816_bat_get_usb_state(di);
 }
 
-static bool rk816_bat_is_under_threshold(struct battery_info *di)
+static bool rk816_bat_is_under_threshold(struct battery_priv *di)
 {
 	bool initialize = false;
 #ifdef CONFIG_DM_CHARGE_DISPLAY
@@ -945,7 +942,7 @@ static bool rk816_bat_is_under_threshold(struct battery_info *di)
 	return initialize;
 }
 
-void rk816_bat_init_rsoc(struct battery_info *di)
+void rk816_bat_init_rsoc(struct battery_priv *di)
 {
 	bool initialize = false;
 
@@ -969,7 +966,7 @@ void rk816_bat_init_rsoc(struct battery_info *di)
 		rk816_bat_not_first_pwron(di);
 }
 
-static int rk816_fg_init(struct battery_info *di)
+static int rk816_fg_init(struct battery_priv *di)
 {
 	rk816_bat_enable_gauge(di);
 	rk816_bat_set_vol_instant_mode(di);
@@ -998,17 +995,17 @@ static int rk816_fg_init(struct battery_info *di)
 	return 0;
 }
 
-static void rk816_bat_save_dsoc(struct  battery_info *di, u8 save_soc)
+static void rk816_bat_save_dsoc(struct  battery_priv *di, u8 save_soc)
 {
 	static int old_soc = -1;
 
 	if (old_soc != save_soc) {
 		old_soc = save_soc;
-		rk816_bat_write(SOC_REG, save_soc);
+		rk816_bat_write(di, SOC_REG, save_soc);
 	}
 }
 
-static void rk816_bat_save_cap(struct battery_info *di, int cap)
+static void rk816_bat_save_cap(struct battery_priv *di, int cap)
 {
 	u8 buf;
 	static int old_cap;
@@ -1021,20 +1018,20 @@ static void rk816_bat_save_cap(struct battery_info *di, int cap)
 
 	old_cap = cap;
 	buf = (cap >> 24) & 0xff;
-	rk816_bat_write(REMAIN_CAP_REG3, buf);
+	rk816_bat_write(di, REMAIN_CAP_REG3, buf);
 	buf = (cap >> 16) & 0xff;
-	rk816_bat_write(REMAIN_CAP_REG2, buf);
+	rk816_bat_write(di, REMAIN_CAP_REG2, buf);
 	buf = (cap >> 8) & 0xff;
-	rk816_bat_write(REMAIN_CAP_REG1, buf);
+	rk816_bat_write(di, REMAIN_CAP_REG1, buf);
 	buf = (cap >> 0) & 0xff;
-	rk816_bat_write(REMAIN_CAP_REG0, buf);
+	rk816_bat_write(di, REMAIN_CAP_REG0, buf);
 }
 
-static u8 rk816_bat_get_chrg_status(struct battery_info *di)
+static u8 rk816_bat_get_chrg_status(struct battery_priv *di)
 {
 	u8 status;
 
-	status = rk816_bat_read(SUP_STS_REG) & BAT_STATUS_MSK;
+	status = rk816_bat_read(di, SUP_STS_REG) & BAT_STATUS_MSK;
 	switch (status) {
 	case CHARGE_OFF:
 		DBG("CHARGE-OFF...\n");
@@ -1073,7 +1070,7 @@ static u8 rk816_bat_get_chrg_status(struct battery_info *di)
 	return status;
 }
 
-static void rk816_bat_finish_chrg(struct battery_info *di)
+static void rk816_bat_finish_chrg(struct battery_priv *di)
 {
 	u32 tgt_sec = 0;
 
@@ -1088,7 +1085,7 @@ static void rk816_bat_finish_chrg(struct battery_info *di)
 	    get_timer(di->finish_chrg_base));
 }
 
-static void rk816_bat_debug_info(struct battery_info *di)
+static void rk816_bat_debug_info(struct battery_priv *di)
 {
 	u8 sup_sts, ggcon, ggsts, vb_mod, rtc, thermal, misc;
 	u8 usb_ctrl, chrg_ctrl1, chrg_ctrl2, chrg_ctrl3;
@@ -1096,17 +1093,17 @@ static void rk816_bat_debug_info(struct battery_info *di)
 
 	if (!dbg_enable)
 		return;
-	ggcon = rk816_bat_read(GGCON_REG);
-	ggsts = rk816_bat_read(GGSTS_REG);
-	sup_sts = rk816_bat_read(SUP_STS_REG);
-	usb_ctrl = rk816_bat_read(USB_CTRL_REG);
-	thermal = rk816_bat_read(THERMAL_REG);
-	vb_mod = rk816_bat_read(VB_MON_REG);
-	misc = rk816_bat_read(MISC_MARK_REG);
-	rtc = rk816_bat_read(SECONDS_REG);
-	chrg_ctrl1 = rk816_bat_read(CHRG_CTRL_REG1);
-	chrg_ctrl2 = rk816_bat_read(CHRG_CTRL_REG2);
-	chrg_ctrl3 = rk816_bat_read(CHRG_CTRL_REG3);
+	ggcon = rk816_bat_read(di, GGCON_REG);
+	ggsts = rk816_bat_read(di, GGSTS_REG);
+	sup_sts = rk816_bat_read(di, SUP_STS_REG);
+	usb_ctrl = rk816_bat_read(di, USB_CTRL_REG);
+	thermal = rk816_bat_read(di, THERMAL_REG);
+	vb_mod = rk816_bat_read(di, VB_MON_REG);
+	misc = rk816_bat_read(di, MISC_MARK_REG);
+	rtc = rk816_bat_read(di, SECONDS_REG);
+	chrg_ctrl1 = rk816_bat_read(di, CHRG_CTRL_REG1);
+	chrg_ctrl2 = rk816_bat_read(di, CHRG_CTRL_REG2);
+	chrg_ctrl3 = rk816_bat_read(di, CHRG_CTRL_REG3);
 
 	DBG("\n---------------------- DEBUG REGS ------------------------\n"
 	    "GGCON=0x%2x, GGSTS=0x%2x, RTC=0x%2x, SUP_STS= 0x%2x\n"
@@ -1138,7 +1135,7 @@ static void rk816_bat_debug_info(struct battery_info *di)
 	DBG("###########################################################\n");
 }
 
-static void rk816_bat_linek_algorithm(struct battery_info *di)
+static void rk816_bat_linek_algorithm(struct battery_priv *di)
 {
 	int delta_cap, ydsoc, tmp;
 	u8 chg_st = rk816_bat_get_chrg_status(di);
@@ -1176,19 +1173,19 @@ static void rk816_bat_linek_algorithm(struct battery_info *di)
 	    di->calc_dsoc, di->calc_rsoc, di->sm_meet_soc);
 }
 
-static int rk816_bat_get_iadc(struct battery_info *di)
+static int rk816_bat_get_iadc(struct battery_priv *di)
 {
 	int val = 0;
 
-	val |= rk816_bat_read(BAT_CUR_AVG_REGL) << 0;
-	val |= rk816_bat_read(BAT_CUR_AVG_REGH) << 8;
+	val |= rk816_bat_read(di, BAT_CUR_AVG_REGL) << 0;
+	val |= rk816_bat_read(di, BAT_CUR_AVG_REGH) << 8;
 	if (val > 2047)
 		val -= 4096;
 
 	return val;
 }
 
-static bool rk816_bat_adc_calib(struct battery_info *di)
+static bool rk816_bat_adc_calib(struct battery_priv *di)
 {
 	int i, ioffset, coffset, adc;
 
@@ -1205,7 +1202,7 @@ static bool rk816_bat_adc_calib(struct battery_info *di)
 			coffset = rk816_bat_get_coffset(di);
 			ioffset = rk816_bat_get_ioffset(di);
 			di->poffset = coffset - ioffset;
-			rk816_bat_write(POFFSET_REG, di->poffset);
+			rk816_bat_write(di, POFFSET_REG, di->poffset);
 			BAT_INFO("new offset:c=0x%x, i=0x%x, p=0x%x\n",
 				 coffset, ioffset, di->poffset);
 			return true;
@@ -1219,7 +1216,7 @@ static bool rk816_bat_adc_calib(struct battery_info *di)
 	return false;
 }
 
-static void rk816_bat_smooth_charge(struct battery_info *di)
+static void rk816_bat_smooth_charge(struct battery_priv *di)
 {
 	u8 chg_st = rk816_bat_get_chrg_status(di);
 
@@ -1272,7 +1269,7 @@ out:
 
 static int rk816_bat_update_get_soc(struct udevice *dev)
 {
-	struct battery_info *di = dev_get_priv(dev);
+	struct battery_priv *di = dev_get_priv(dev);
 	static ulong seconds;
 
 	/* set charge current */
@@ -1297,7 +1294,7 @@ static int rk816_bat_update_get_soc(struct udevice *dev)
 
 static int rk816_bat_update_get_voltage(struct udevice *dev)
 {
-	struct battery_info *di = dev_get_priv(dev);
+	struct battery_priv *di = dev_get_priv(dev);
 
 	if (!di->virtual_power && di->voltage_k)
 		return rk816_bat_get_est_voltage(di);
@@ -1307,7 +1304,7 @@ static int rk816_bat_update_get_voltage(struct udevice *dev)
 
 static int rk816_bat_update_get_current(struct udevice *dev)
 {
-	struct battery_info *di = dev_get_priv(dev);
+	struct battery_priv *di = dev_get_priv(dev);
 
 	if (!di->virtual_power && di->voltage_k)
 		return rk816_bat_get_avg_current(di);
@@ -1317,7 +1314,7 @@ static int rk816_bat_update_get_current(struct udevice *dev)
 
 static bool rk816_bat_update_get_chrg_online(struct udevice *dev)
 {
-	struct battery_info *di = dev_get_priv(dev);
+	struct battery_priv *di = dev_get_priv(dev);
 
 	return rk816_bat_get_charger_type(di);
 }
@@ -1329,30 +1326,23 @@ static struct dm_fuel_gauge_ops fg_ops = {
 	.get_chrg_online = rk816_bat_update_get_chrg_online,
 };
 
-static int rk816_bat_parse_dt(struct battery_info *di, void const *blob)
+static int rk816_fg_ofdata_to_platdata(struct udevice *dev)
 {
-	int node, parent, len, err;
+	struct rk8xx_priv *rk8xx = dev_get_priv(dev->parent);
+	struct battery_priv *di = dev_get_priv(dev);
 	const char *prop;
+	int len;
 
-	parent = fdt_node_offset_by_compatible(blob, 0, "rockchip,rk816");
-	if (parent < 0) {
-		printf("can't find rockchip,rk816 node\n");
-		return -ENODEV;
-	}
-
-	if (!fdtdec_get_is_enabled(blob, parent)) {
-		DBG("rk816 node disabled\n");
-		return -ENODEV;
-	}
-
-	node = fdt_subnode_offset_namelen(blob, parent, "battery", 7);
-	if (node < 0) {
-		debug("can't find battery node\n");
-		di->chrg_cur_input = ILIM_2000MA;
+	if (rk8xx->variant != 0x8160) {
+		debug("%s: Not support pmic variant: rk%x\n",
+			__func__, rk8xx->variant);
 		return -EINVAL;
+	} else {
+		di->dev = dev;
 	}
 
-	prop = fdt_getprop(blob, node, "ocv_table", &len);
+	/* Parse ocv table */
+	prop = dev_read_prop(dev, "ocv_table", &len);
 	if (!prop) {
 		printf("can't find ocv_table prop\n");
 		return -EINVAL;
@@ -1365,37 +1355,38 @@ static int rk816_bat_parse_dt(struct battery_info *di, void const *blob)
 	}
 
 	di->ocv_size = len / 4;
-	err = fdtdec_get_int_array(blob, node, "ocv_table",
-				   di->ocv_table, di->ocv_size);
-	if (err < 0) {
-		printf("read ocv_table error\n");
+	if (dev_read_u32_array(dev, "ocv_table",
+			       di->ocv_table, di->ocv_size)) {
+		printf("can't read ocv_table\n");
 		free(di->ocv_table);
 		return -EINVAL;
 	}
 
-	di->design_cap = fdtdec_get_int(blob, node, "design_capacity", -1);
+	/* Parse neccessay */
+	di->design_cap = dev_read_u32_default(dev, "design_capacity", -1);
 	if (di->design_cap < 0) {
-		printf("read design_capacity error\n");
+		printf("can't read design_capacity\n");
 		return -EINVAL;
 	}
 
-	di->qmax = fdtdec_get_int(blob, node, "design_qmax", -1);
+	di->qmax = dev_read_u32_default(dev, "design_qmax", -1);
 	if (di->qmax < 0) {
-		printf("read design_qmax error\n");
+		printf("can't read design_qmax\n");
 		return -EINVAL;
 	}
 
-	di->dts_vol_sel = fdtdec_get_int(blob, node, "max_chrg_voltage", 4200);
-	di->dts_cur_input = fdtdec_get_int(blob, node,
-					   "max_input_current", 2000);
-	di->dts_cur_sel = fdtdec_get_int(blob, node, "max_chrg_current", 1200);
-	di->max_soc_offset = fdtdec_get_int(blob, node, "max_soc_offset", 70);
-	di->virtual_power = fdtdec_get_int(blob, node, "virtual_power", 0);
-	di->bat_res = fdtdec_get_int(blob, node, "bat_res", 135);
-	di->dc_det_adc = fdtdec_get_int(blob, node, "dc_det_adc", 0);
+	/* Parse un-neccessay */
+	di->dts_vol_sel = dev_read_u32_default(dev, "max_chrg_voltage", 4200);
+	di->dts_cur_input = dev_read_u32_default(dev, "max_input_current", 2000);
+	di->dts_cur_sel = dev_read_u32_default(dev, "max_chrg_current", 1200);
+	di->max_soc_offset = dev_read_u32_default(dev, "max_soc_offset", 70);
+	di->virtual_power = dev_read_u32_default(dev, "virtual_power", 0);
+	di->bat_res = dev_read_u32_default(dev, "bat_res", 135);
+
+	/* Parse dc type */
+	di->dc_det_adc = dev_read_u32_default(dev, "dc_det_adc", 0);
 	if (di->dc_det_adc <= 0) {
-		if (!gpio_request_by_name_nodev(offset_to_ofnode(node),
-						"dc_det_gpio",
+		if (!gpio_request_by_name_nodev(dev_ofnode(dev), "dc_det_gpio",
 						0, di->dc_det, GPIOD_IS_IN)) {
 			di->dc_type = DC_TYPE_OF_GPIO;
 		} else {
@@ -1405,6 +1396,7 @@ static int rk816_bat_parse_dt(struct battery_info *di, void const *blob)
 		di->dc_type = DC_TYPE_OF_ADC;
 	}
 
+	/* Is battery attached */
 	if (!is_rk816_bat_exist(di))
 		di->virtual_power = 1;
 
@@ -1422,20 +1414,14 @@ static int rk816_bat_parse_dt(struct battery_info *di, void const *blob)
 
 static int rk816_fg_probe(struct udevice *dev)
 {
-	struct rk8xx_priv *priv = dev_get_priv(dev->parent);
-	struct battery_info *di = dev_get_priv(dev);
-	int ret;
+	struct rk8xx_priv *rk8xx = dev_get_priv(dev->parent);
+	struct battery_priv *di = dev_get_priv(dev);
 
-	if (priv->variant != 0x8160) {
-		debug("Not support pmic variant: rk%x\n", priv->variant);
+	if (rk8xx->variant != 0x8160) {
+		printf("Not support pmic variant: rk%x\n", rk8xx->variant);
 		return -EINVAL;
 	}
 
-	g_pmic_dev = dev->parent;
-	ret = rk816_bat_parse_dt(di, gd->fdt_blob);
-	if (ret)
-		return ret;
-
 	return rk816_fg_init(di);
 }
 
@@ -1444,6 +1430,6 @@ U_BOOT_DRIVER(rk816_fg) = {
 	.id = UCLASS_FG,
 	.probe = rk816_fg_probe,
 	.ops = &fg_ops,
-	.priv_auto_alloc_size = sizeof(struct battery_info),
+	.ofdata_to_platdata = rk816_fg_ofdata_to_platdata,
+	.priv_auto_alloc_size = sizeof(struct battery_priv),
 };
-

commit f23c35a88c56ad7590799e55ffe6b0aa884f7e0a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Feb 3 13:03:31 2018 +0800

    power: charge animation: optimise code
    
    1. compatible fdt node used on legacy U-Boot;
    2. clean up code.
    
    Change-Id: If9ad1df379b14d096e3310568bc39d2c5820753b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index c5471bc71e..597eea10e9 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -43,12 +43,13 @@ struct charge_animation_pdata {
 	int android_charge;
 	int uboot_charge;
 
-	int screen_on_voltage;
 	int exit_charge_voltage;
-
 	int exit_charge_level;
-	int low_power_level;
 
+	int low_power_voltage;
+
+	int screen_on_voltage;
+	int system_suspend;
 };
 
 static int charge_animation_get_power_on_soc(struct udevice *dev)
@@ -143,28 +144,27 @@ static int charge_animation_ofdata_to_platdata(struct udevice *dev)
 	pdata->android_charge =
 		dev_read_u32_default(dev, "rockchip,android-charge-on", 0);
 
-	/* level */
 	pdata->exit_charge_level =
 		dev_read_u32_default(dev, "rockchip,uboot-exit-charge-level", 0);
-	pdata->low_power_level =
-		dev_read_u32_default(dev, "rockchip,uboot-low-power-level", 0);
-
-	/* voltage */
 	pdata->exit_charge_voltage =
 		dev_read_u32_default(dev, "rockchip,uboot-exit-charge-voltage", 0);
+
+	pdata->low_power_voltage =
+		dev_read_u32_default(dev, "rockchip,uboot-low-power-voltage", 0);
+
 	pdata->screen_on_voltage =
 		dev_read_u32_default(dev, "rockchip,screen-on-voltage", 0);
+	pdata->system_suspend =
+		dev_read_u32_default(dev, "rockchip,system-suspend", 0);
 
-	if (pdata->screen_on_voltage >
-	    pdata->exit_charge_voltage)
-		pdata->screen_on_voltage =
-					pdata->exit_charge_voltage;
+	if (pdata->screen_on_voltage > pdata->exit_charge_voltage)
+		pdata->screen_on_voltage = pdata->exit_charge_voltage;
 
 	debug("mode: uboot=%d, android=%d; exit: soc=%d%%, voltage=%dmv;\n"
-	      "lp_soc=%d%%, screen_on=%dmv\n",
+	      "lp_voltage=%d%%, screen_on=%dmv\n",
 	      pdata->uboot_charge, pdata->android_charge,
 	      pdata->exit_charge_level, pdata->exit_charge_voltage,
-	      pdata->low_power_level, pdata->screen_on_voltage);
+	      pdata->low_power_voltage, pdata->screen_on_voltage);
 
 	return 0;
 }
@@ -185,15 +185,15 @@ static int check_key_press(void)
 	return state;
 }
 
-static int system_suspend_enter(void)
+static int system_suspend_enter(struct charge_animation_pdata *pdata)
 {
 	/*
 	 * TODO: enter low power mode:
 	 * 3. auto turn off screen when timout;
 	 * 4. power key wakeup;
-	 * 5. timer period wakeup for pmic fg ?
+	 * 5. timer period wakeup for pmic fg
 	 */
-	if (IS_ENABLED(CONFIG_ARM_SMCCC)) {
+	if (pdata->system_suspend && IS_ENABLED(CONFIG_ARM_SMCCC)) {
 		printf("\nSystem suspend: ");
 		putc('1');
 		local_irq_disable();
@@ -226,6 +226,75 @@ static int system_suspend_enter(void)
 	return 0;
 }
 
+#ifdef CONFIG_DRM_ROCKCHIP
+static void charge_show_bmp(const char *name)
+{
+	rockchip_show_bmp(name);
+}
+
+static void charge_show_logo(void)
+{
+	rockchip_show_logo();
+}
+#else
+static void charge_show_bmp(const char *name) {}
+static void charge_show_logo(void) {}
+#endif
+
+static int charge_extrem_low_power(struct udevice *dev)
+{
+	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
+	struct charge_animation_priv *priv = dev_get_priv(dev);
+	struct udevice *pmic = priv->pmic;
+	struct udevice *fg = priv->fg;
+	int voltage, soc, charging = 1;
+
+	voltage = fuel_gauge_get_voltage(fg);
+	if (voltage < 0)
+		return -EINVAL;
+
+	while (voltage < pdata->low_power_voltage + 50) {
+		/* Check charger online */
+		charging = fuel_gauge_get_chrg_online(fg);
+		if (charging <= 0) {
+			printf("Not charging, online=%d. Shutdown...\n",
+			       charging);
+			/* wait uart flush before shutdown */
+			mdelay(500);
+			/* PMIC shutdown */
+			pmic_shutdown(pmic);
+
+			printf("Cpu should never reach here, shutdown failed !\n");
+			continue;
+		}
+
+		/*
+		 * Just for fuel gauge to update something important,
+		 * including charge current, coulometer or other.
+		 */
+		soc = fuel_gauge_get_soc(fg);
+		if (soc < 0 || soc > 100) {
+			printf("get soc failed: %d\n", soc);
+			continue;
+		}
+
+		printf("Extrem low power, force charging... threshold=%dmv, now=%dmv\n",
+		       pdata->low_power_voltage, voltage);
+
+		/* System suspend */
+		system_suspend_enter(pdata);
+
+		/* Update voltage */
+		voltage = fuel_gauge_get_voltage(fg);
+		if (voltage < 0) {
+			printf("get voltage failed: %d\n", voltage);
+			continue;
+		}
+	}
+
+	return 0;
+}
+
 static int charge_animation_show(struct udevice *dev)
 {
 	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
@@ -241,15 +310,34 @@ static int charge_animation_show(struct udevice *dev)
 	ulong ms = 0, sec = 0;
 	int start_idx = 0, show_idx = -1;
 	int soc, voltage, current, key_state;
-	int i, charging = 1;
+	int i, charging = 1, ret;
 	int boot_mode;
 
+/*
+ * Check sequence:
+ *
+ * 1. Extrem low power charge?
+ * 2. Preboot cmd?
+ * 3. Valid boot mode?
+ * 4. U-Boot charge enabled by dts config?
+ * 5. Screen off before charge?
+ * 6. Enter charge !
+ *
+ */
+	/* Extrem low power charge */
+	ret = charge_extrem_low_power(dev);
+	if (ret < 0) {
+		printf("extrem low power charge failed, ret=%d\n", ret);
+		return ret;
+	}
+
 	/* If there is preboot command, exit */
 	if (preboot) {
 		debug("preboot: %s\n", preboot);
 		return 0;
 	}
 
+	/* Not valid charge mode, exit */
 #ifdef CONFIG_RKIMG_BOOTLOADER
 	boot_mode = rockchip_get_boot_mode();
 	if ((boot_mode != BOOT_MODE_CHARGING) &&
@@ -259,13 +347,13 @@ static int charge_animation_show(struct udevice *dev)
 	}
 #endif
 
-	/* Enter android charge */
+	/* Enter android charge, set property for kernel */
 	if (pdata->android_charge) {
 		env_update("bootargs", "androidboot.mode=charger");
 		printf("Android charge mode\n");
-		return 0;
 	}
 
+	/* Not enable U-Boot charge, exit */
 	if (!pdata->uboot_charge)
 		return 0;
 
@@ -284,7 +372,7 @@ static int charge_animation_show(struct udevice *dev)
 	if (voltage <= pdata->screen_on_voltage + 50) {
 		screen_on = false;
 		ever_lowpower_screen_off = true;
-		rockchip_show_bmp(NULL);
+		charge_show_bmp(NULL);
 	}
 
 	printf("Enter U-Boot charging mode\n");
@@ -345,7 +433,7 @@ static int charge_animation_show(struct udevice *dev)
 		}
 
 		/*
-		 * If ever lowpower screen off, force screen on false, which
+		 * If ever lowpower screen off, force screen_on=false, which
 		 * means key event can't modify screen_on, only voltage higher
 		 * then threshold can update screen_on=true;
 		 */
@@ -398,9 +486,9 @@ static int charge_animation_show(struct udevice *dev)
 		/* Step3: show images */
 		if (screen_on) {
 			debug("SHOW: %s\n", image[show_idx].name);
-			rockchip_show_bmp(image[show_idx].name);
+			charge_show_bmp(image[show_idx].name);
 		} else {
-			system_suspend_enter();
+			system_suspend_enter(pdata);
 		}
 
 		mdelay(5);
@@ -426,7 +514,7 @@ static int charge_animation_show(struct udevice *dev)
 		if (key_state == KEY_PRESS_DOWN) {
 			/* NULL means show nothing, ie. turn off screen */
 			if (screen_on)
-				rockchip_show_bmp(NULL);
+				charge_show_bmp(NULL);
 
 			/*
 			 * Clear current image index, and show image
@@ -435,7 +523,7 @@ static int charge_animation_show(struct udevice *dev)
 			show_idx = IMAGE_SHOW_RESET;
 
 			/*
-			 * We turn off screen by rockchip_show_bmp(NULL), so we
+			 * We turn off screen by charge_show_bmp(NULL), so we
 			 * should tell while loop to stop show images any more.
 			 *
 			 * If screen_on=false, means this short key pressed
@@ -472,7 +560,7 @@ static int charge_animation_show(struct udevice *dev)
 
 			/* Success exit charging */
 			printf("Exit charge animation...\n");
-			rockchip_show_logo();
+			charge_show_logo();
 			break;
 		} else {
 			/* Do nothing */
@@ -483,7 +571,7 @@ static int charge_animation_show(struct udevice *dev)
 		/* Step5: Exit by ctrl+c */
 		if (ctrlc()) {
 			if (voltage >= pdata->screen_on_voltage)
-				rockchip_show_logo();
+				charge_show_logo();
 			printf("Exit charge, due to ctrl+c\n");
 			break;
 		}
@@ -515,9 +603,9 @@ static int charge_animation_probe(struct udevice *dev)
 {
 	struct charge_animation_priv *priv = dev_get_priv(dev);
 	struct udevice *fg, *pmic;
-	int ret;
+	int ret, soc;
 
-	/* Get PMIC */
+	/* Get PMIC: used for power off system  */
 	ret = uclass_get_device(UCLASS_PMIC, 0, &pmic);
 	if (ret) {
 		printf("Get UCLASS PMIC failed: %d\n", ret);
@@ -525,7 +613,7 @@ static int charge_animation_probe(struct udevice *dev)
 	}
 	priv->pmic = pmic;
 
-	/* Get fuel gauge */
+	/* Get fuel gauge: used for charging */
 	ret = uclass_get_device(UCLASS_FG, 0, &fg);
 	if (ret) {
 		printf("Get UCLASS FG failed: %d\n", ret);
@@ -533,7 +621,21 @@ static int charge_animation_probe(struct udevice *dev)
 	}
 	priv->fg = fg;
 
-	/* Get image */
+	/* Get PWRKEY: used for wakeup and trun off/on LCD */
+	ret = platform_key_read(KEY_POWER);
+	if (ret == KEY_NOT_EXIST) {
+		printf("Can't find power key\n");
+		return -EINVAL;
+	}
+
+	/* Initialize charge current */
+	soc = fuel_gauge_get_soc(fg);
+	if (soc < 0 || soc > 100) {
+		printf("get soc failed: %d\n", soc);
+		return -EINVAL;
+	}
+
+	/* Get charge images */
 	priv->image = image;
 	priv->image_num = ARRAY_SIZE(image);
 

commit 35d17bf709a179613d65c5437d613707596b833c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Feb 8 12:00:12 2018 +0800

    input: rk8xx: support plugout interrupt for rk816 and rk817
    
    Change-Id: I474236292025f5656673191b10ad25f5362970b1
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/rk8xx_pwrkey.c b/drivers/input/rk8xx_pwrkey.c
index f9a8dd7816..9cba035e83 100644
--- a/drivers/input/rk8xx_pwrkey.c
+++ b/drivers/input/rk8xx_pwrkey.c
@@ -23,6 +23,7 @@
 #define	RK817_INT_MSK_REG2	0xfd
 #define RK817_PWRON_RISE_INT	(1 << 1)
 #define RK817_PWRON_FALL_INT	(1 << 0)
+#define RK817_PLUG_OUT_INT	(1 << 1)
 #define RK817_INT_POL_MSK	BIT(1)
 
 #define	RK816_INT_STS_REG1	0x49
@@ -33,6 +34,7 @@
 #define	RK816_INT_MSK_REG3	0x4f
 #define RK816_PWRON_RISE_INT	(1 << 6)
 #define RK816_PWRON_FALL_INT	(1 << 5)
+#define RK816_PLUG_OUT_INT	(1 << 1)
 
 #define	RK805_INT_STS_REG	0x4c
 #define	RK805_INT_MSK_REG	0x4d
@@ -45,10 +47,13 @@ struct reg_data {
 };
 
 struct rk8xx_key_priv {
-	u8 int_sts_reg;
-	u8 int_msk_reg;
+	u8 key_int_sts_reg;
+	u8 key_int_msk_reg;
+	u8 plug_int_sts_reg;
+	u8 plug_int_msk_reg;
 	u8 pwron_rise_int;
 	u8 pwron_fall_int;
+	u8 plug_out_int;
 	struct reg_data *init_reg;
 	u32 init_reg_num;
 	struct reg_data *irq_reg;
@@ -56,9 +61,9 @@ struct rk8xx_key_priv {
 };
 
 static struct reg_data rk817_init_reg[] = {
-	/* only enable rise/fall interrupt */
+	/* only enable rise/fall interrupt, plugout */
 	{ RK817_INT_MSK_REG0, 0xfc },
-	{ RK817_INT_MSK_REG1, 0xff },
+	{ RK817_INT_MSK_REG1, 0xfd },
 	{ RK817_INT_MSK_REG2, 0xff },
 	/* clear all interrupt states */
 	{ RK817_INT_STS_REG0, 0xff },
@@ -76,10 +81,10 @@ static struct reg_data rk817_irq_reg[] = {
 };
 
 static struct reg_data rk816_init_reg[] = {
-	/* only enable rise/fall interrupt */
+	/* only enable rise/fall interrupt, plugout */
 	{ RK816_INT_MSK_REG1, 0x9f },
 	{ RK816_INT_MSK_REG2, 0xff },
-	{ RK816_INT_MSK_REG3, 0xff },
+	{ RK816_INT_MSK_REG3, 0xfd },
 	/* clear all interrupt states */
 	{ RK816_INT_STS_REG1, 0xff },
 	{ RK816_INT_STS_REG2, 0xff },
@@ -151,8 +156,24 @@ static void pwrkey_irq_handler(int irq, void *data)
 
 	debug("%s: irq = %d\n", __func__, irq);
 
-	/* read status */
-	val = pmic_reg_read(dev->parent, priv->int_sts_reg);
+	/*
+	 * This plug out interrupt only used to wakeup cpu while U-Boot
+	 * charging and system suspend. Because we need to detect charger
+	 * plug out event and then shutdown system.
+	 */
+	if (priv->plug_int_sts_reg) {
+		val = pmic_reg_read(dev->parent, priv->plug_int_sts_reg);
+		if (val < 0) {
+			printf("%s: i2c read failed, ret=%d\n", __func__, val);
+			return;
+		}
+
+		if (val & priv->plug_out_int)
+			printf("Plug out interrupt\n");
+	}
+
+	/* read key status */
+	val = pmic_reg_read(dev->parent, priv->key_int_sts_reg);
 	if (val < 0) {
 		printf("%s: i2c read failed, ret=%d\n", __func__, val);
 		return;
@@ -226,8 +247,8 @@ static int rk8xx_pwrkey_probe(struct udevice *dev)
 
 	switch (rk8xx->variant) {
 	case RK805_ID:
-		priv->int_sts_reg = RK805_INT_STS_REG;
-		priv->int_msk_reg = RK805_INT_MSK_REG;
+		priv->key_int_sts_reg = RK805_INT_STS_REG;
+		priv->key_int_msk_reg = RK805_INT_MSK_REG;
 		priv->pwron_rise_int = RK805_PWRON_RISE_INT;
 		priv->pwron_fall_int = RK805_PWRON_FALL_INT;
 		priv->init_reg = rk805_init_reg;
@@ -237,20 +258,26 @@ static int rk8xx_pwrkey_probe(struct udevice *dev)
 		break;
 
 	case RK816_ID:
-		priv->int_sts_reg = RK816_INT_STS_REG1;
-		priv->int_msk_reg = RK816_INT_MSK_REG1;
+		priv->key_int_sts_reg = RK816_INT_STS_REG1;
+		priv->key_int_msk_reg = RK816_INT_MSK_REG1;
+		priv->plug_int_sts_reg = RK816_INT_STS_REG3;
+		priv->plug_int_msk_reg = RK816_INT_MSK_REG3;
 		priv->pwron_rise_int = RK816_PWRON_RISE_INT;
 		priv->pwron_fall_int = RK816_PWRON_FALL_INT;
+		priv->plug_out_int = RK816_PLUG_OUT_INT;
 		priv->init_reg = rk816_init_reg;
 		priv->init_reg_num = ARRAY_SIZE(rk816_init_reg);
 		priv->irq_reg = rk816_irq_reg;
 		priv->irq_reg_num = ARRAY_SIZE(rk816_irq_reg);
 		break;
 	case RK817_ID:
-		priv->int_sts_reg = RK817_INT_STS_REG0;
-		priv->int_msk_reg = RK817_INT_MSK_REG0;
+		priv->key_int_sts_reg = RK817_INT_STS_REG0;
+		priv->key_int_msk_reg = RK817_INT_MSK_REG0;
+		priv->plug_int_sts_reg = RK817_INT_STS_REG1;
+		priv->plug_int_msk_reg = RK817_INT_MSK_REG1;
 		priv->pwron_rise_int = RK817_PWRON_RISE_INT;
 		priv->pwron_fall_int = RK817_PWRON_FALL_INT;
+		priv->plug_out_int = RK817_PLUG_OUT_INT;
 		priv->init_reg = rk817_init_reg;
 		priv->init_reg_num = ARRAY_SIZE(rk817_init_reg);
 		priv->irq_reg = rk817_irq_reg;
@@ -260,7 +287,7 @@ static int rk8xx_pwrkey_probe(struct udevice *dev)
 		return -EINVAL;
 	}
 
-	/* mask and clear intertup */
+	/* mask and clear interrupt */
 	for (i = 0; i < priv->init_reg_num; i++) {
 		ret = pmic_reg_write(dev->parent,
 				     priv->init_reg[i].reg,

commit f7ec925b706a9b3c72a805266a9504903be94c1d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Feb 7 19:37:53 2018 +0800

    rockchip: dts: px30-evb: enable RK817 pwrkey
    
    Change-Id: Iec05e7d31596c4f84bed523f619022cdda474597
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/px30-evb.dts b/arch/arm/dts/px30-evb.dts
index c890607954..7fd0d4feb3 100644
--- a/arch/arm/dts/px30-evb.dts
+++ b/arch/arm/dts/px30-evb.dts
@@ -116,6 +116,10 @@
 			function = "gpio";
 		};
 
+		pwrkey {
+			status = "okay";
+		};
+
 		regulators {
 			vdd_arm: DCDC_REG1 {
 				regulator-always-on;
@@ -357,4 +361,4 @@
 			<0 7 RK_FUNC_GPIO &pcfg_pull_up>;
 		};
 	};
-};
\ No newline at end of file
+};

commit 3e0925058e5d0ac9c98291f9bef8c687653aa76a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Feb 7 17:21:01 2018 +0800

    regulator: add min_sel for rk816 buck and ldo
    
    This fixes get voltage error
    
    Change-Id: I8e0b6bd16b82ebdd0fe9d2d81a19bee0f8881037
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/rk8xx.c b/drivers/power/regulator/rk8xx.c
index eae5112010..edad841e13 100644
--- a/drivers/power/regulator/rk8xx.c
+++ b/drivers/power/regulator/rk8xx.c
@@ -65,13 +65,13 @@ static const struct rk8xx_reg_info rk808_buck[] = {
 
 static const struct rk8xx_reg_info rk816_buck[] = {
 	/* buck 1 */
-	{  712500,  12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, RK818_BUCK_VSEL_MASK, },
-	{ 1800000, 200000, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, RK818_BUCK_VSEL_MASK, },
-	{ 2300000,      0, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, RK818_BUCK_VSEL_MASK, },
+	{  712500,  12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, RK818_BUCK_VSEL_MASK, 0x00, },
+	{ 1800000, 200000, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, RK818_BUCK_VSEL_MASK, 0x3c, },
+	{ 2300000,      0, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, RK818_BUCK_VSEL_MASK, 0x3f, },
 	/* buck 2 */
-	{  712500,  12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, RK818_BUCK_VSEL_MASK, },
-	{ 1800000, 200000, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, RK818_BUCK_VSEL_MASK, },
-	{ 2300000,      0, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, RK818_BUCK_VSEL_MASK, },
+	{  712500,  12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, RK818_BUCK_VSEL_MASK, 0x00, },
+	{ 1800000, 200000, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, RK818_BUCK_VSEL_MASK, 0x3c, },
+	{ 2300000,      0, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, RK818_BUCK_VSEL_MASK, 0x3f, },
 	/* buck 3 */
 	{ 712500, 12500, -1, -1, RK818_BUCK_VSEL_MASK, },
 	/* buck 4 */

commit 7f18d96c7080c9ed0c4236884e6094197f250da3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Feb 7 15:08:31 2018 +0800

    pmic: add RK817 support
    
    include sub modules: pmic, regulator, pwrkey
    
    Change-Id: I3a1cbaa3c4d069cbac17124f9c0fe3b01184697c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/rk8xx_pwrkey.c b/drivers/input/rk8xx_pwrkey.c
index 68530a6fd0..f9a8dd7816 100644
--- a/drivers/input/rk8xx_pwrkey.c
+++ b/drivers/input/rk8xx_pwrkey.c
@@ -14,6 +14,17 @@
 #include <asm/arch/periph.h>
 #include <dm/pinctrl.h>
 
+#define RK817_GPIO_INT_CFG	0xfe
+#define	RK817_INT_STS_REG0	0xf8
+#define	RK817_INT_MSK_REG0	0xf9
+#define	RK817_INT_STS_REG1	0xfa
+#define	RK817_INT_MSK_REG1	0xfb
+#define	RK817_INT_STS_REG2	0xfc
+#define	RK817_INT_MSK_REG2	0xfd
+#define RK817_PWRON_RISE_INT	(1 << 1)
+#define RK817_PWRON_FALL_INT	(1 << 0)
+#define RK817_INT_POL_MSK	BIT(1)
+
 #define	RK816_INT_STS_REG1	0x49
 #define	RK816_INT_MSK_REG1	0x4a
 #define	RK816_INT_STS_REG2	0x4c
@@ -44,6 +55,26 @@ struct rk8xx_key_priv {
 	u32 irq_reg_num;
 };
 
+static struct reg_data rk817_init_reg[] = {
+	/* only enable rise/fall interrupt */
+	{ RK817_INT_MSK_REG0, 0xfc },
+	{ RK817_INT_MSK_REG1, 0xff },
+	{ RK817_INT_MSK_REG2, 0xff },
+	/* clear all interrupt states */
+	{ RK817_INT_STS_REG0, 0xff },
+	{ RK817_INT_STS_REG1, 0xff },
+	{ RK817_INT_STS_REG2, 0xff },
+	/* pmic_int active low */
+	{ RK817_GPIO_INT_CFG, 0x20 },
+};
+
+static struct reg_data rk817_irq_reg[] = {
+	/* clear all interrupt states */
+	{ RK817_INT_STS_REG0, 0xff },
+	{ RK817_INT_STS_REG1, 0xff },
+	{ RK817_INT_STS_REG2, 0xff },
+};
+
 static struct reg_data rk816_init_reg[] = {
 	/* only enable rise/fall interrupt */
 	{ RK816_INT_MSK_REG1, 0x9f },
@@ -118,6 +149,8 @@ static void pwrkey_irq_handler(int irq, void *data)
 	struct input_key *key = dev_get_platdata(dev);
 	int ret, val, i;
 
+	debug("%s: irq = %d\n", __func__, irq);
+
 	/* read status */
 	val = pmic_reg_read(dev->parent, priv->int_sts_reg);
 	if (val < 0) {
@@ -146,6 +179,9 @@ static void pwrkey_irq_handler(int irq, void *data)
 			printf("%s: i2c write reg 0x%x failed, ret=%d\n",
 			       __func__, priv->irq_reg[i].reg, ret);
 		}
+
+		debug("%s: reg[0x%x] = 0x%x\n", __func__, priv->irq_reg[i].reg,
+		      pmic_reg_read(dev->parent, priv->irq_reg[i].reg));
 	}
 }
 
@@ -210,7 +246,16 @@ static int rk8xx_pwrkey_probe(struct udevice *dev)
 		priv->irq_reg = rk816_irq_reg;
 		priv->irq_reg_num = ARRAY_SIZE(rk816_irq_reg);
 		break;
-
+	case RK817_ID:
+		priv->int_sts_reg = RK817_INT_STS_REG0;
+		priv->int_msk_reg = RK817_INT_MSK_REG0;
+		priv->pwron_rise_int = RK817_PWRON_RISE_INT;
+		priv->pwron_fall_int = RK817_PWRON_FALL_INT;
+		priv->init_reg = rk817_init_reg;
+		priv->init_reg_num = ARRAY_SIZE(rk817_init_reg);
+		priv->irq_reg = rk817_irq_reg;
+		priv->irq_reg_num = ARRAY_SIZE(rk817_irq_reg);
+		break;
 	default:
 		return -EINVAL;
 	}
@@ -225,6 +270,9 @@ static int rk8xx_pwrkey_probe(struct udevice *dev)
 			       __func__, priv->init_reg[i].reg, ret);
 			return ret;
 		}
+
+		debug("%s: reg[%x] = 0x%x\n", __func__, priv->init_reg[i].reg,
+		      pmic_reg_read(dev->parent, priv->init_reg[i].reg));
 	}
 
 	return pwrkey_interrupt_init(dev);
diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index 4aa6e64978..81bbc38891 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -27,6 +27,7 @@ static const struct pmic_child_info power_key_info[] = {
 
 static const struct pmic_child_info fuel_gauge_info[] = {
 	{ .prefix = "battery", .driver = "rk818_fg"},
+	{ .prefix = "battery", .driver = "rk817_fg"},
 	{ .prefix = "battery", .driver = "rk816_fg"},
 	{ },
 };
@@ -66,16 +67,22 @@ static int rk8xx_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
 static int rk8xx_shutdown(struct udevice *dev)
 {
 	struct rk8xx_priv *priv = dev_get_priv(dev);
-	u8 val, dev_off;
+	u8 val, dev_off, devctrl_reg;
 	int ret = 0;
 
 	switch (priv->variant) {
 	case RK808_ID:
+		devctrl_reg = REG_DEVCTRL;
 		dev_off = BIT(3);
 		break;
 	case RK805_ID:
 	case RK816_ID:
 	case RK818_ID:
+		devctrl_reg = REG_DEVCTRL;
+		dev_off = BIT(0);
+		break;
+	case RK817_ID:
+		devctrl_reg = RK817_REG_SYS_CFG3;
 		dev_off = BIT(0);
 		break;
 	default:
@@ -83,18 +90,18 @@ static int rk8xx_shutdown(struct udevice *dev)
 		return -EINVAL;
 	}
 
-	ret = dm_i2c_read(dev, REG_DEVCTRL, &val, 1);
+	ret = dm_i2c_read(dev, devctrl_reg, &val, 1);
 	if (ret) {
 		printf("read error from device: %p register: %#x!",
-		       dev, REG_DEVCTRL);
+		       dev, devctrl_reg);
 		return ret;
 	}
 
 	val |= dev_off;
-	ret = dm_i2c_write(dev, REG_DEVCTRL, &val, 1);
+	ret = dm_i2c_write(dev, devctrl_reg, &val, 1);
 	if (ret) {
 		printf("write error to device: %p register: %#x!",
-		       dev, REG_DEVCTRL);
+		       dev, devctrl_reg);
 		return ret;
 	}
 
@@ -136,14 +143,24 @@ static int rk8xx_bind(struct udevice *dev)
 static int rk8xx_probe(struct udevice *dev)
 {
 	struct rk8xx_priv *priv = dev_get_priv(dev);
-	uint8_t msb, lsb;
+	uint8_t msb, lsb, id_msb, id_lsb;
 
 	/* read Chip variant */
-	rk8xx_read(dev, ID_MSB, &msb, 1);
-	rk8xx_read(dev, ID_LSB, &lsb, 1);
+	if (device_is_compatible(dev, "rockchip,rk817")) {
+		id_msb = RK817_ID_MSB;
+		id_lsb = RK817_ID_LSB;
+	} else {
+		id_msb = ID_MSB;
+		id_lsb = ID_LSB;
+	}
+
+	rk8xx_read(dev, id_msb, &msb, 1);
+	rk8xx_read(dev, id_lsb, &lsb, 1);
 
 	priv->variant = ((msb << 8) | lsb) & RK8XX_ID_MSK;
 
+	printf("PMIC:  RK%x\n", priv->variant);
+
 	return 0;
 }
 
@@ -158,6 +175,7 @@ static const struct udevice_id rk8xx_ids[] = {
 	{ .compatible = "rockchip,rk805" },
 	{ .compatible = "rockchip,rk808" },
 	{ .compatible = "rockchip,rk816" },
+	{ .compatible = "rockchip,rk817" },
 	{ .compatible = "rockchip,rk818" },
 	{ }
 };
diff --git a/drivers/power/regulator/rk8xx.c b/drivers/power/regulator/rk8xx.c
index 9b51c243dc..eae5112010 100644
--- a/drivers/power/regulator/rk8xx.c
+++ b/drivers/power/regulator/rk8xx.c
@@ -33,12 +33,27 @@
 #define RK818_USB_ILIM_SEL_MASK		0x0f
 #define RK818_USB_CHG_SD_VSEL_MASK	0x70
 
+/* RK817 BUCK */
+#define RK817_BUCK_ON_VSEL(n)		(0xbb + 3 * (n - 1))
+#define RK817_BUCK_SLP_VSEL(n)		(0xbc + 3 * (n - 1))
+#define RK817_BUCK_VSEL_MASK		0x7f
+
+/* RK817 LDO */
+#define RK817_LDO_ON_VSEL(n)		(0xcc + 2 * (n - 1))
+#define RK817_LDO_SLP_VSEL(n)		(0xcd + 2 * (n - 1))
+#define RK817_LDO_VSEL_MASK		0x7f
+
+/* RK817 ENABLE */
+#define RK817_POWER_EN(n)		(0xb1 + (n))
+#define RK817_POWER_SLP_EN(n)		(0xb5 + (n))
+
 struct rk8xx_reg_info {
 	uint min_uv;
 	uint step_uv;
-	s8 vsel_reg;
-	s8 vsel_sleep_reg;
+	u8 vsel_reg;
+	u8 vsel_sleep_reg;
 	u8 vsel_mask;
+	u8 min_sel;
 };
 
 static const struct rk8xx_reg_info rk808_buck[] = {
@@ -63,6 +78,25 @@ static const struct rk8xx_reg_info rk816_buck[] = {
 	{  800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, RK818_BUCK4_VSEL_MASK, },
 };
 
+static const struct rk8xx_reg_info rk817_buck[] = {
+	/* buck 1 */
+	{  500000,  12500, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_VSEL_MASK, 0x00, },
+	{ 1500000, 100000, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_VSEL_MASK, 0x50, },
+	{ 2400000,	0, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_VSEL_MASK, 0x59, },
+	/* buck 2 */
+	{  500000,  12500, RK817_BUCK_ON_VSEL(2), RK817_BUCK_SLP_VSEL(2), RK817_BUCK_VSEL_MASK, 0x00, },
+	{ 1500000, 100000, RK817_BUCK_ON_VSEL(2), RK817_BUCK_SLP_VSEL(2), RK817_BUCK_VSEL_MASK, 0x50, },
+	{ 2400000,	0, RK817_BUCK_ON_VSEL(2), RK817_BUCK_SLP_VSEL(2), RK817_BUCK_VSEL_MASK, 0x59, },
+	/* buck 3 */
+	{  500000,  12500, RK817_BUCK_ON_VSEL(3), RK817_BUCK_SLP_VSEL(3), RK817_BUCK_VSEL_MASK, 0x00, },
+	{ 1500000, 100000, RK817_BUCK_ON_VSEL(3), RK817_BUCK_SLP_VSEL(3), RK817_BUCK_VSEL_MASK, 0x50, },
+	{ 2400000,	0, RK817_BUCK_ON_VSEL(3), RK817_BUCK_SLP_VSEL(3), RK817_BUCK_VSEL_MASK, 0x59, },
+	/* buck 4 */
+	{  500000,  12500, RK817_BUCK_ON_VSEL(4), RK817_BUCK_SLP_VSEL(4), RK817_BUCK_VSEL_MASK, 0x00, },
+	{ 1500000, 100000, RK817_BUCK_ON_VSEL(4), RK817_BUCK_SLP_VSEL(4), RK817_BUCK_VSEL_MASK, 0x50, },
+	{ 3400000,	0, RK817_BUCK_ON_VSEL(4), RK817_BUCK_SLP_VSEL(4), RK817_BUCK_VSEL_MASK, 0x63, },
+};
+
 static const struct rk8xx_reg_info rk818_buck[] = {
 	{ 712500,   12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, RK818_BUCK_VSEL_MASK, },
 	{ 712500,   12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, RK818_BUCK_VSEL_MASK, },
@@ -91,6 +125,36 @@ static const struct rk8xx_reg_info rk816_ldo[] = {
 	{ 800000, 100000, REG_LDO6_ON_VSEL, REG_LDO6_SLP_VSEL, RK818_LDO_VSEL_MASK, },
 };
 
+static const struct rk8xx_reg_info rk817_ldo[] = {
+	/* ldo1 */
+	{  600000, 25000, RK817_LDO_ON_VSEL(1), RK817_LDO_SLP_VSEL(1), RK817_LDO_VSEL_MASK, 0x00, },
+	{ 3400000,     0, RK817_LDO_ON_VSEL(1), RK817_LDO_SLP_VSEL(1), RK817_LDO_VSEL_MASK, 0x70, },
+	/* ldo2 */
+	{  600000, 25000, RK817_LDO_ON_VSEL(2), RK817_LDO_SLP_VSEL(2), RK817_LDO_VSEL_MASK, 0x00, },
+	{ 3400000,     0, RK817_LDO_ON_VSEL(2), RK817_LDO_SLP_VSEL(2), RK817_LDO_VSEL_MASK, 0x70, },
+	/* ldo3 */
+	{  600000, 25000, RK817_LDO_ON_VSEL(3), RK817_LDO_SLP_VSEL(3), RK817_LDO_VSEL_MASK, 0x00, },
+	{ 3400000,     0, RK817_LDO_ON_VSEL(3), RK817_LDO_SLP_VSEL(3), RK817_LDO_VSEL_MASK, 0x70, },
+	/* ldo4 */
+	{  600000, 25000, RK817_LDO_ON_VSEL(4), RK817_LDO_SLP_VSEL(4), RK817_LDO_VSEL_MASK, 0x00, },
+	{ 3400000,     0, RK817_LDO_ON_VSEL(4), RK817_LDO_SLP_VSEL(4), RK817_LDO_VSEL_MASK, 0x70, },
+	/* ldo5 */
+	{  600000, 25000, RK817_LDO_ON_VSEL(5), RK817_LDO_SLP_VSEL(5), RK817_LDO_VSEL_MASK, 0x00, },
+	{ 3400000,     0, RK817_LDO_ON_VSEL(5), RK817_LDO_SLP_VSEL(5), RK817_LDO_VSEL_MASK, 0x70, },
+	/* ldo6 */
+	{  600000, 25000, RK817_LDO_ON_VSEL(6), RK817_LDO_SLP_VSEL(6), RK817_LDO_VSEL_MASK, 0x00, },
+	{ 3400000,     0, RK817_LDO_ON_VSEL(6), RK817_LDO_SLP_VSEL(6), RK817_LDO_VSEL_MASK, 0x70, },
+	/* ldo7 */
+	{  600000, 25000, RK817_LDO_ON_VSEL(7), RK817_LDO_SLP_VSEL(7), RK817_LDO_VSEL_MASK, 0x00, },
+	{ 3400000,     0, RK817_LDO_ON_VSEL(7), RK817_LDO_SLP_VSEL(7), RK817_LDO_VSEL_MASK, 0x70, },
+	/* ldo8 */
+	{  600000, 25000, RK817_LDO_ON_VSEL(8), RK817_LDO_SLP_VSEL(8), RK817_LDO_VSEL_MASK, 0x00, },
+	{ 3400000,     0, RK817_LDO_ON_VSEL(8), RK817_LDO_SLP_VSEL(8), RK817_LDO_VSEL_MASK, 0x70, },
+	/* ldo9 */
+	{  600000, 25000, RK817_LDO_ON_VSEL(9), RK817_LDO_SLP_VSEL(9), RK817_LDO_VSEL_MASK, 0x00, },
+	{ 3400000,     0, RK817_LDO_ON_VSEL(9), RK817_LDO_SLP_VSEL(9), RK817_LDO_VSEL_MASK, 0x70, },
+};
+
 static const struct rk8xx_reg_info rk818_ldo[] = {
 	{ 1800000, 100000, REG_LDO1_ON_VSEL, REG_LDO1_SLP_VSEL, RK818_LDO_VSEL_MASK, },
 	{ 1800000, 100000, REG_LDO2_ON_VSEL, REG_LDO2_SLP_VSEL, RK818_LDO_VSEL_MASK, },
@@ -131,6 +195,24 @@ static const struct rk8xx_reg_info *get_buck_reg(struct udevice *pmic,
 		default:
 			return &rk816_buck[num + 4];
 		}
+
+	case RK817_ID:
+		switch (num) {
+		case 0 ... 2:
+			if (uvolt < 1500000)
+				return &rk817_buck[num * 3 + 0];
+			else if (uvolt < 2400000)
+				return &rk817_buck[num * 3 + 1];
+			else
+				return &rk817_buck[num * 3 + 2];
+		default:
+			if (uvolt < 1500000)
+				return &rk817_buck[num * 3 + 0];
+			else if (uvolt < 3400000)
+				return &rk817_buck[num * 3 + 1];
+			else
+				return &rk817_buck[num * 3 + 2];
+		}
 	case RK818_ID:
 		return &rk818_buck[num];
 	default:
@@ -146,9 +228,14 @@ static int _buck_set_value(struct udevice *pmic, int buck, int uvolt)
 
 	if (info->vsel_reg == -1)
 		return -ENOSYS;
-	val = (uvolt - info->min_uv) / info->step_uv;
-	debug("%s: reg=%x, mask=%x, val=%x\n", __func__, info->vsel_reg, mask,
-	      val);
+
+	if (info->step_uv == 0)	/* Fixed voltage */
+		val = info->min_sel;
+	else
+		val = ((uvolt - info->min_uv) / info->step_uv) + info->min_sel;
+
+	debug("%s: volt=%d, buck=%d, reg=0x%x, mask=0x%x, val=0x%x\n",
+	      __func__, uvolt, buck+1, info->vsel_reg, mask, val);
 
 	return pmic_clrsetbits(pmic, info->vsel_reg, mask, val);
 }
@@ -191,6 +278,13 @@ static int _buck_set_enable(struct udevice *pmic, int buck, bool enable)
 		ret = pmic_clrsetbits(pmic, REG_DCDC_EN, mask,
 				      enable ? mask : 0);
 		break;
+	case RK817_ID:
+		if (enable)
+			value = ((1 << buck) | (1 << (buck + 4)));
+		else
+			value = ((0 << buck) | (1 << (buck + 4)));
+		ret = pmic_reg_write(pmic, RK817_POWER_EN(0), value);
+		break;
 	default:
 		ret = -EINVAL;
 	}
@@ -207,9 +301,14 @@ static int _buck_set_suspend_value(struct udevice *pmic, int buck, int uvolt)
 
 	if (info->vsel_sleep_reg == -1)
 		return -ENOSYS;
-	val = (uvolt - info->min_uv) / info->step_uv;
-	debug("%s: reg=%x, mask=%x, val=%x\n", __func__, info->vsel_sleep_reg, mask,
-	      val);
+
+	if (info->step_uv == 0)
+		val = info->min_sel;
+	else
+		val = ((uvolt - info->min_uv) / info->step_uv) + info->min_sel;
+
+	debug("%s: volt=%d, buck=%d, reg=0x%x, mask=0x%x, val=0x%x\n",
+	      __func__, uvolt, buck+1, info->vsel_sleep_reg, mask, val);
 
 	return pmic_clrsetbits(pmic, info->vsel_sleep_reg, mask, val);
 }
@@ -238,6 +337,11 @@ static int _buck_get_enable(struct udevice *pmic, int buck)
 		if (ret < 0)
 			return ret;
 		break;
+	case RK817_ID:
+		mask = 1 << buck;
+		ret = pmic_reg_read(pmic, RK817_POWER_EN(0));
+			debug("%s: %s, buck=%d, en=%x\n", __func__, pmic->name, buck, ret);
+		break;
 	}
 	return ret & mask ? true : false;
 }
@@ -262,6 +366,11 @@ static int _buck_set_suspend_enable(struct udevice *pmic, int buck, bool enable)
 		ret = pmic_clrsetbits(pmic, REG_SLEEP_SET_OFF1, mask,
 				      enable ? 0 : mask);
 		break;
+	case RK817_ID:
+		mask = 1 << buck;
+		ret = pmic_clrsetbits(pmic, RK817_POWER_SLP_EN(0), mask,
+				      enable ? mask : 0);
+		break;
 	default:
 		ret = -EINVAL;
 	}
@@ -270,7 +379,7 @@ static int _buck_set_suspend_enable(struct udevice *pmic, int buck, bool enable)
 }
 
 static const struct rk8xx_reg_info *get_ldo_reg(struct udevice *pmic,
-					     int num)
+						int num, int uvolt)
 {
 	struct rk8xx_priv *priv = dev_get_priv(pmic);
 
@@ -278,6 +387,11 @@ static const struct rk8xx_reg_info *get_ldo_reg(struct udevice *pmic,
 	case RK805_ID:
 	case RK816_ID:
 		return &rk816_ldo[num];
+	case RK817_ID:
+		if (uvolt < 3400000)
+			return &rk817_ldo[num * 2 + 0];
+		else
+			return &rk817_ldo[num * 2 + 1];
 	case RK818_ID:
 		return &rk818_ldo[num];
 	default:
@@ -309,6 +423,20 @@ static int _ldo_get_enable(struct udevice *pmic, int ldo)
 		if (ret < 0)
 			return ret;
 		break;
+	case RK817_ID:
+		if (ldo < 4) {
+			mask = 1 << ldo;
+			ret = pmic_reg_read(pmic, RK817_POWER_EN(1));
+		} else if (ldo < 8) {
+			mask = 1 << (ldo - 4);
+			ret = pmic_reg_read(pmic, RK817_POWER_EN(2));
+		} else if (ldo == 8) {
+			mask = 1 << 0;
+			ret = pmic_reg_read(pmic, RK817_POWER_EN(3));
+		} else {
+			return false;
+		}
+		break;
 	}
 	return ret & mask ? true : false;
 }
@@ -341,6 +469,24 @@ static int _ldo_set_enable(struct udevice *pmic, int ldo, bool enable)
 		ret = pmic_clrsetbits(pmic, REG_LDO_EN, mask,
 				       enable ? mask : 0);
 		break;
+	case RK817_ID:
+		if (ldo < 4) {
+			en_reg = RK817_POWER_EN(1);
+		} else if (ldo < 8) {
+			ldo -= 4;
+			en_reg = RK817_POWER_EN(2);
+		} else if (ldo == 8) {
+			ldo = 0;	/* BIT 0 */
+			en_reg = RK817_POWER_EN(3);
+		} else {
+			return -EINVAL;
+		}
+		if (enable)
+			value = ((1 << ldo) | (1 << (ldo + 4)));
+		else
+			value = ((0 << ldo) | (1 << (ldo + 4)));
+		ret = pmic_reg_write(pmic, en_reg, value);
+		break;
 	}
 
 	return ret;
@@ -365,6 +511,17 @@ static int _ldo_set_suspend_enable(struct udevice *pmic, int ldo, bool enable)
 		ret = pmic_clrsetbits(pmic, REG_SLEEP_SET_OFF2, mask,
 				      enable ? 0 : mask);
 		break;
+	case RK817_ID:
+		if (ldo == 8) {
+			mask = 1 << 4;	/* LDO9 */
+			ret = pmic_clrsetbits(pmic, RK817_POWER_SLP_EN(0), mask,
+					      enable ? mask : 0);
+		} else {
+			mask = 1 << ldo;
+			ret = pmic_clrsetbits(pmic, RK817_POWER_SLP_EN(1), mask,
+					      enable ? mask : 0);
+		}
+		break;
 	}
 
 	return ret;
@@ -373,12 +530,14 @@ static int _ldo_set_suspend_enable(struct udevice *pmic, int ldo, bool enable)
 static int buck_get_value(struct udevice *dev)
 {
 	int buck = dev->driver_data - 1;
+	/* We assume level-1 voltage is enough for usage in U-Boot */
 	const struct rk8xx_reg_info *info = get_buck_reg(dev->parent, buck, 0);
 	int mask = info->vsel_mask;
 	int ret, val;
 
 	if (info->vsel_reg == -1)
 		return -ENOSYS;
+
 	ret = pmic_reg_read(dev->parent, info->vsel_reg);
 	if (ret < 0)
 		return ret;
@@ -425,7 +584,7 @@ static int buck_get_enable(struct udevice *dev)
 static int ldo_get_value(struct udevice *dev)
 {
 	int ldo = dev->driver_data - 1;
-	const struct rk8xx_reg_info *info = get_ldo_reg(dev->parent, ldo);
+	const struct rk8xx_reg_info *info = get_ldo_reg(dev->parent, ldo, 0);
 	int mask = info->vsel_mask;
 	int ret, val;
 
@@ -442,15 +601,20 @@ static int ldo_get_value(struct udevice *dev)
 static int ldo_set_value(struct udevice *dev, int uvolt)
 {
 	int ldo = dev->driver_data - 1;
-	const struct rk8xx_reg_info *info = get_ldo_reg(dev->parent, ldo);
+	const struct rk8xx_reg_info *info = get_ldo_reg(dev->parent, ldo, uvolt);
 	int mask = info->vsel_mask;
 	int val;
 
 	if (info->vsel_reg == -1)
 		return -ENOSYS;
-	val = (uvolt - info->min_uv) / info->step_uv;
-	debug("%s: reg=%x, mask=%x, val=%x\n", __func__, info->vsel_reg, mask,
-	      val);
+
+	if (info->step_uv == 0)
+		val = info->min_sel;
+	else
+		val = ((uvolt - info->min_uv) / info->step_uv) + info->min_sel;
+
+	debug("%s: volt=%d, ldo=%d, reg=0x%x, mask=0x%x, val=0x%x\n",
+	      __func__, uvolt, ldo+1, info->vsel_reg, mask, val);
 
 	return pmic_clrsetbits(dev->parent, info->vsel_reg, mask, val);
 }
@@ -458,15 +622,20 @@ static int ldo_set_value(struct udevice *dev, int uvolt)
 static int ldo_set_suspend_value(struct udevice *dev, int uvolt)
 {
 	int ldo = dev->driver_data - 1;
-	const struct rk8xx_reg_info *info = get_ldo_reg(dev->parent, ldo);
+	const struct rk8xx_reg_info *info = get_ldo_reg(dev->parent, ldo, uvolt);
 	int mask = info->vsel_mask;
 	int val;
 
 	if (info->vsel_sleep_reg == -1)
 		return -ENOSYS;
-	val = (uvolt - info->min_uv) / info->step_uv;
-	debug("%s: reg=%x, mask=%x, val=%x\n", __func__, info->vsel_sleep_reg, mask,
-	      val);
+
+	if (info->step_uv == 0)
+		val = info->min_sel;
+	else
+		val = ((uvolt - info->min_uv) / info->step_uv) + info->min_sel;
+
+	debug("%s: volt=%d, ldo=%d, reg=0x%x, mask=0x%x, val=0x%x\n",
+	      __func__, uvolt, ldo+1, info->vsel_sleep_reg, mask, val);
 
 	return pmic_clrsetbits(dev->parent, info->vsel_sleep_reg, mask, val);
 }
diff --git a/include/power/rk8xx_pmic.h b/include/power/rk8xx_pmic.h
index 699fd87dba..79c57896bd 100644
--- a/include/power/rk8xx_pmic.h
+++ b/include/power/rk8xx_pmic.h
@@ -170,6 +170,10 @@ enum {
 	RK808_NUM_OF_REGS,
 };
 
+enum {
+	RK817_REG_SYS_CFG3 = 0xf4,
+};
+
 enum {
 	RK816_REG_DCDC_EN1 = 0x23,
 	RK816_REG_DCDC_EN2,
@@ -183,9 +187,12 @@ enum {
 	RK805_ID = 0x8050,
 	RK808_ID = 0x0000,
 	RK816_ID = 0x8160,
+	RK817_ID = 0x8170,
 	RK818_ID = 0x8180,
 };
 
+#define RK817_ID_MSB	0xed
+#define RK817_ID_LSB	0xee
 #define RK8XX_ID_MSK	0xfff0
 
 struct rk8xx_reg_table {

commit 2f22a22f29a6e6bba40267116a23224891b5006d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Feb 7 20:36:23 2018 +0800

    regulator: uclass: remove suspend voltage min and max validate
    
    min and max voltage are used to limit run time voltage, suspend
    voltage should not limited by them.
    
    Change-Id: I8b3660c51992d8baec6401630e3ec093b01b1260
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/regulator-uclass.c b/drivers/power/regulator/regulator-uclass.c
index a2aab2b4cf..2c1a1854f6 100644
--- a/drivers/power/regulator/regulator-uclass.c
+++ b/drivers/power/regulator/regulator-uclass.c
@@ -58,13 +58,6 @@ int regulator_set_value(struct udevice *dev, int uV)
 int regulator_set_suspend_value(struct udevice *dev, int uV)
 {
 	const struct dm_regulator_ops *ops = dev_get_driver_ops(dev);
-	struct dm_regulator_uclass_platdata *uc_pdata;
-
-	uc_pdata = dev_get_uclass_platdata(dev);
-	if (uc_pdata->min_uV != -ENODATA && uV < uc_pdata->min_uV)
-		return -EINVAL;
-	if (uc_pdata->max_uV != -ENODATA && uV > uc_pdata->max_uV)
-		return -EINVAL;
 
 	if (!ops || !ops->set_suspend_value)
 		return -ENOSYS;
@@ -378,6 +371,11 @@ static int regulator_pre_probe(struct udevice *dev)
 	    (uc_pdata->min_uA == uc_pdata->max_uA))
 		uc_pdata->flags |= REGULATOR_FLAG_AUTOSET_UA;
 
+	debug("dev.name=%s: min_uV=%d, max_uV=%d, boot-on=%d, always-on=%d, "
+	      "off-in-suspend=%d, suspend_volt=%d\n",
+	      dev->name, uc_pdata->min_uV, uc_pdata->max_uV, uc_pdata->boot_on,
+	      uc_pdata->always_on, !uc_pdata->suspend_on, uc_pdata->suspend_uV);
+
 	return 0;
 }
 

commit 0ff0e214445925825c27fa2a904b18d08f7db6c1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Feb 8 11:21:43 2018 +0800

    make.sh: support a lot of sub commands
    
    1. make clean, make distclean and make mrproper;
    2. objdump elf file;
    
    Append 'clean', 'distclean', 'mrproper' or 'elf' to build command
    
    Example:
            ./make.sh evb-px30 clean
            ./make.sh evb-px30 distclean
            ./make.sh evb-px30 mrproper
            ./make.sh evb-px30 elf
    
    you can also use 'elf[option]', like: 'elf-D', 'elf-d', 'elf-S'...
    [option] is not necessary(default -D), it would be used as objdump
    command option.
    
    Change-Id: If6402ee9b0f9bd79aa7f18703ce0061106b11e26
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index ac8689f80b..9324abe09f 100755
--- a/make.sh
+++ b/make.sh
@@ -1,6 +1,7 @@
 #!/bin/sh
 set -e
 BOARD=$1
+SUBCMD=$2
 RKCHIP=${BOARD##*-}
 DSTDIR=rockdev/${RKCHIP}
 RKCHIP=$(echo ${RKCHIP} | tr '[a-z]' '[A-Z]')
@@ -14,11 +15,15 @@ RKBIN_TOOLS=../rkbin/tools
 
 # Declare global toolchain path for CROSS_COMPILE, updated in select_toolchain()
 TOOLCHAIN_GCC=./
+TOOLCHAIN_OBJDUMP=./
 # GCC toolchain
 GCC_ARM32=arm-linux-androideabi-
 GCC_ARM64=aarch64-linux-android-
 TOOLCHAIN_ARM32=../prebuilts/gcc/linux-x86/arm/arm-linux-androideabi-4.9/bin
 TOOLCHAIN_ARM64=../prebuilts/gcc/linux-x86/aarch64/aarch64-linux-android-4.9/bin
+# OBJDMP
+OBJ_ARM32=arm-linux-androideabi-objdump
+OBJ_ARM64=aarch64-linux-android-objdump
 
 prepare()
 {
@@ -68,6 +73,7 @@ select_toolchain()
 		if [ -d ${TOOLCHAIN_ARM64} ]; then
 			absolute_path=$(cd `dirname ${TOOLCHAIN_ARM64}`; pwd)
 			TOOLCHAIN_GCC=${absolute_path}/bin/${GCC_ARM64}
+			TOOLCHAIN_OBJDUMP=${absolute_path}/bin/${OBJ_ARM64}
 		else
 			echo "Can't find toolchain: ${TOOLCHAIN_GCC}"
 			exit 1
@@ -76,6 +82,7 @@ select_toolchain()
 		if [ -d ${TOOLCHAIN_ARM32} ]; then
 			absolute_path=$(cd `dirname ${TOOLCHAIN_ARM32}`; pwd)
 			TOOLCHAIN_GCC=${absolute_path}/bin/${GCC_ARM32}
+			TOOLCHAIN_OBJDUMP=${absolute_path}/bin/${OBJ_ARM32}
 		else
 			echo "Can't find toolchain: ${TOOLCHAIN_GCC}"
 			exit 1
@@ -85,6 +92,30 @@ select_toolchain()
 	echo "toolchain: ${TOOLCHAIN_GCC}"
 }
 
+sub_commands()
+{
+	local elf=${SUBCMD%-*} opt=${SUBCMD#*-}
+
+	# Make clean, distclean and mrproper
+	if [ "$SUBCMD" = 'clean' -o "$SUBCMD" = 'distclean' -o "$SUBCMD" = 'mrproper' ]; then
+		make $SUBCMD O=${DSTDIR}/out
+		exit 0
+	elif [ ${elf} = 'elf' ]; then
+		if [ ! -f ${DSTDIR}/out/u-boot ]; then
+			echo "Can't find elf file: ${DSTDIR}/out/u-boot"
+			exit 1
+		else
+			# default 'elf' without option, use '-D'
+			if [ "${elf}" = 'elf' -a "${opt}" = 'elf' ]; then
+				opt=D
+			fi
+
+			${TOOLCHAIN_OBJDUMP} -${opt} ${DSTDIR}/out/u-boot | less
+			exit 0
+		fi
+	fi
+}
+
 fixup_chip_name()
 {
 	if [ "$RKCHIP" = 'RK3228' -o "$RKCHIP" = 'RK3229' ]; then
@@ -176,6 +207,7 @@ prepare
 echo "make for ${BOARD}_defconfig by -j${JOB}"
 make ${BOARD}_defconfig O=${DSTDIR}/out
 select_toolchain
+sub_commands
 make CROSS_COMPILE=${TOOLCHAIN_GCC}  all --jobs=${JOB} O=${DSTDIR}/out
 fixup_chip_name
 pack_uboot_image

commit c0ae4ef9469c25a17b0b6a72c63bd90b162c9045
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Feb 8 22:02:17 2018 +0800

    rockchip: rkimg: fix compile warning
    
    Change-Id: I8988761a6504d9e7bfca3a6702266b8b69631984
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 5ace1893fe..3c58fa14db 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -147,7 +147,7 @@ err:
 int get_bootdev_type(void)
 {
 	int type = 0;
-	char *boot_media = NULL, *boot_mode = NULL;
+	char *boot_media = NULL;
 	char boot_options[128] = {0};
 	static int appended;
 

commit 5c47e3d4734d329f41880f3b6ccf76f598763980
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Feb 8 20:09:10 2018 +0800

    dts: Kconfig: always enable OF_SPL_REMOVE_PROPS macros
    
    We need this even if there is no SPL.
    
    Change-Id: Ib61f6fd08204dd68730a2d006cef75bcae07084b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/dts/Kconfig b/dts/Kconfig
index 0cef225ba9..edd5d7f830 100644
--- a/dts/Kconfig
+++ b/dts/Kconfig
@@ -226,7 +226,6 @@ config SPL_MULTI_DTB_FIT_USER_DEF_ADDR
 
 config OF_SPL_REMOVE_PROPS
 	string "List of device tree properties to drop for SPL"
-	depends on SPL_OF_CONTROL
 	default "interrupt-parent" if SPL_PINCTRL && SPL_CLK
 	default "clocks clock-names interrupt-parent" if SPL_PINCTRL
 	default "pinctrl-0 pinctrl-names interrupt-parent" if SPL_CLK

commit ca62cda2282aa664ea0ba2191734658a17947309
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Feb 8 20:07:48 2018 +0800

    pwm-backlight: make power-supply as option
    
    Some pwm backlight may not need 'power-supply', let's make it as option
    in pwm-backlight driver.
    
    Change-Id: Ie25ab972b352cd66670fdccfdee45fa1199741ed
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/video/pwm_backlight.c b/drivers/video/pwm_backlight.c
index b99d2eaf95..13c20c2f9d 100644
--- a/drivers/video/pwm_backlight.c
+++ b/drivers/video/pwm_backlight.c
@@ -32,16 +32,18 @@ static int pwm_backlight_enable(struct udevice *dev)
 	uint duty_cycle;
 	int ret;
 
-	plat = dev_get_uclass_platdata(priv->reg);
-	debug("%s: Enable '%s', regulator '%s'/'%s'\n", __func__, dev->name,
-	      priv->reg->name, plat->name);
-	ret = regulator_set_enable(priv->reg, true);
-	if (ret) {
-		debug("%s: Cannot enable regulator for PWM '%s'\n", __func__,
-		      dev->name);
-		return ret;
+	if (priv->reg) {
+		plat = dev_get_uclass_platdata(priv->reg);
+		debug("%s: Enable '%s', regulator '%s'/'%s'\n", __func__,
+		      dev->name, priv->reg->name, plat->name);
+		ret = regulator_set_enable(priv->reg, true);
+		if (ret) {
+			debug("%s: Cannot enable regulator for PWM '%s'\n",
+			      __func__, dev->name);
+			return ret;
+		}
+		mdelay(120);
 	}
-	mdelay(120);
 
 	duty_cycle = priv->period_ns * (priv->default_level - priv->min_level) /
 		(priv->max_level - priv->min_level + 1);
@@ -79,15 +81,17 @@ static int pwm_backlight_disable(struct udevice *dev)
 	mdelay(10);
 	dm_gpio_set_value(&priv->enable, 0);
 
-	plat = dev_get_uclass_platdata(priv->reg);
-	printf("%s: Disable '%s', regulator '%s'/'%s'\n", __func__, dev->name,
-	      priv->reg->name, plat->name);
-	ret = regulator_set_enable(priv->reg, false);
-	if (ret) {
-		debug("%s: Cannot enable regulator for PWM '%s'\n", __func__,
-		      dev->name);
+	if (priv->reg) {
+		plat = dev_get_uclass_platdata(priv->reg);
+		debug("%s: Disable '%s', regulator '%s'/'%s'\n", __func__,
+		      dev->name, priv->reg->name, plat->name);
+		ret = regulator_set_enable(priv->reg, false);
+		if (ret) {
+			debug("%s: Cannot enable regulator for PWM '%s'\n",
+			      __func__, dev->name);
+		}
+		mdelay(120);
 	}
-	mdelay(120);
 
 	return 0;
 }
@@ -102,10 +106,8 @@ static int pwm_backlight_ofdata_to_platdata(struct udevice *dev)
 	debug("%s: start\n", __func__);
 	ret = uclass_get_device_by_phandle(UCLASS_REGULATOR, dev,
 					   "power-supply", &priv->reg);
-	if (ret) {
+	if (ret)
 		debug("%s: Cannot get power supply: ret=%d\n", __func__, ret);
-		return ret;
-	}
 	ret = gpio_request_by_name(dev, "enable-gpios", 0, &priv->enable,
 				   GPIOD_IS_OUT);
 	if (ret) {

commit 75de74fe7377569655ee628ce5fa2c146f0ae2e6
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Feb 7 22:21:56 2018 +0800

    rockchip: dts: rk3128: sync the mipi dts compatible name with kernel
    
    Change-Id: I2d32aadbd440219471a2638be415469b1dd49eea
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3128.dtsi b/arch/arm/dts/rk3128.dtsi
index dd2b781226..9e2568f516 100644
--- a/arch/arm/dts/rk3128.dtsi
+++ b/arch/arm/dts/rk3128.dtsi
@@ -388,7 +388,7 @@
 	};
 
 	dsi: dsi@10110000 {
-		compatible = "rockchip,rk312x-mipi-dsi";
+		compatible = "rockchip,rk3128-mipi-dsi";
 		reg = <0x10110000 0x4000>;
 		interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru PCLK_MIPI>, <&cru HCLK_VIO_H2P>, <&mipi_dphy>;
@@ -541,7 +541,7 @@
 	};
 
 	mipi_dphy: mipi-dphy@20038000 {
-		compatible = "rockchip,rk312x-mipi-dphy";
+		compatible = "rockchip,rk3128-mipi-dphy";
 		reg = <0x20038000 0x4000>;
 		clocks = <&cru SCLK_MIPI_24M>, <&cru PCLK_MIPIPHY>, <&cru HCLK_VIO_H2P>;
 		clock-names = "ref", "pclk", "h2p";

commit b7e3dd5707c6ec3318d27d6236c6d7c4636e395b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Feb 7 22:20:59 2018 +0800

    rockchip: mipi: sync the rk312x compatible name with kernel
    
    Change-Id: Idc98c3caa3b1fcc318a8d24eb39fd03ca4ee4f9e
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index 8a8551e536..05175fe44c 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -1270,7 +1270,7 @@ static const struct udevice_id rockchip_mipi_dsi_ids[] = {
 	 .compatible = "rockchip,rk3399-mipi-dsi",
 	 .data = (ulong)&rk3399_mipi_dsi_data,
 	},{
-	 .compatible = "rockchip,rk312x-mipi-dsi",
+	 .compatible = "rockchip,rk3128-mipi-dsi",
 	 .data = (ulong)&rk312x_mipi_dsi_data,
 	},
 	{}
diff --git a/drivers/video/drm/rockchip_phy.c b/drivers/video/drm/rockchip_phy.c
index d1dbe05f81..4b3fd5f1a1 100644
--- a/drivers/video/drm/rockchip_phy.c
+++ b/drivers/video/drm/rockchip_phy.c
@@ -41,7 +41,7 @@ static const struct udevice_id rockchip_phy_ids[] = {
 	 .data = (ulong)&rockchip_rk3368_mipi_dphy_data,
 	},
 	{
-	 .compatible = "rockchip,rk312x-mipi-dphy",
+	 .compatible = "rockchip,rk3128-mipi-dphy",
 	 .data = (ulong)&rockchip_rk312x_mipi_dphy_data,
 	},
 #endif

commit 4851da812fe1109c28a72ebc002a364b9d408afd
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Feb 7 21:51:14 2018 +0800

    rockchip: config: bnd-rk3126: remove pinctrl name for spl dtb
    
    Change-Id: Ib9634694b3f43e91d4b10472037c03de04fdc5ee
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/bnd-d708-rk3126_defconfig b/configs/bnd-d708-rk3126_defconfig
index 55f4bc4ca7..49534e1ccf 100644
--- a/configs/bnd-d708-rk3126_defconfig
+++ b/configs/bnd-d708-rk3126_defconfig
@@ -9,6 +9,7 @@ CONFIG_RKPARM_PARTITION=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3126-bnd-d708"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_SYS_MALLOC_F_LEN=0x38000
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y

commit 764853138da44d1ed011ea794e041f20c85a1953
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Feb 7 17:58:57 2018 +0800

    rockchip: dts: rk312x: fix otg_vbus_drv pinctrl name
    
    Need to use a different name from host_vbus_drv
    
    Change-Id: Ic62d9d1ef3321367aa1fdd703034a66524df2c9b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3126-bnd-d708.dts b/arch/arm/dts/rk3126-bnd-d708.dts
index 9159edd3c5..a49504b5f1 100644
--- a/arch/arm/dts/rk3126-bnd-d708.dts
+++ b/arch/arm/dts/rk3126-bnd-d708.dts
@@ -375,7 +375,7 @@
 
 &pinctrl {
 	usb_otg {
-		otg_vbus_drv: host-vbus-drv {
+		otg_vbus_drv: otg-vbus-drv {
 			rockchip,pins = <0 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
 	};
diff --git a/arch/arm/dts/rk3126-evb.dts b/arch/arm/dts/rk3126-evb.dts
index 1ad1829464..4982b82c17 100644
--- a/arch/arm/dts/rk3126-evb.dts
+++ b/arch/arm/dts/rk3126-evb.dts
@@ -386,7 +386,7 @@
 
 &pinctrl {
 	usb_otg {
-		otg_vbus_drv: host-vbus-drv {
+		otg_vbus_drv: otg-vbus-drv {
 			rockchip,pins = <0 26 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
 	};
diff --git a/arch/arm/dts/rk3128-evb.dts b/arch/arm/dts/rk3128-evb.dts
index a3e538cd5e..9546bdad03 100644
--- a/arch/arm/dts/rk3128-evb.dts
+++ b/arch/arm/dts/rk3128-evb.dts
@@ -83,7 +83,7 @@
 
 &pinctrl {
 	usb_otg {
-		otg_vbus_drv: host-vbus-drv {
+		otg_vbus_drv: otg-vbus-drv {
 			rockchip,pins = <0 26 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
 	};

commit 89f947ecb4be33b215acca4bf00e38261d2070db
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Feb 7 11:44:27 2018 +0800

    core: device: skip bind device already there
    
    With kernel dtb support, there have two dtb and some device may the same,
    skip it if already in the list, node in u-boot dtb will be used.
    
    Change-Id: Ic9f8b73e3708a03416a9dc4ab6c72fa0184a6fdb
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/core/device.c b/drivers/core/device.c
index 9a46a7bbe5..00f8d7d13c 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -48,6 +48,15 @@ static int device_bind_common(struct udevice *parent, const struct driver *drv,
 		return ret;
 	}
 
+	list_for_each_entry(dev, &uc->dev_head, uclass_node) {
+		if (!strcmp(name, dev->name)){
+			debug("%s do not bind dev already in list %s\n",
+			        __func__, name);
+			dev->node = node;
+			return 0;
+		}
+	}
+
 	dev = calloc(1, sizeof(struct udevice));
 	if (!dev)
 		return -ENOMEM;

commit 01236d99d8d44379f3506065b7806df562dfe28d
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 29 18:03:42 2018 +0800

    rockchip: bnd-rk3126: use large buffer to support kernel dtb
    
    Change-Id: I910e1a1a8d9dc89e09e447b4abd0e37373ff240c
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/bnd-d708-rk3126_defconfig b/configs/bnd-d708-rk3126_defconfig
index 261c6c5c81..55f4bc4ca7 100644
--- a/configs/bnd-d708-rk3126_defconfig
+++ b/configs/bnd-d708-rk3126_defconfig
@@ -9,6 +9,7 @@ CONFIG_RKPARM_PARTITION=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3126-bnd-d708"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
+CONFIG_SYS_MALLOC_F_LEN=0x38000
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_FASTBOOT=y

commit e07576b3843f5f2314581dfe764a9db87195569c
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Jan 31 16:38:12 2018 +0800

    rockchip: bnd-rk3126: enable nandc in pre-relocate
    
    Change-Id: I760012fb26385e68d41fc7dc92cb7e363118d73a
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3126-bnd-d708.dts b/arch/arm/dts/rk3126-bnd-d708.dts
index 09f4b69a81..9159edd3c5 100644
--- a/arch/arm/dts/rk3126-bnd-d708.dts
+++ b/arch/arm/dts/rk3126-bnd-d708.dts
@@ -341,6 +341,7 @@
 };
 
 &nandc {
+	u-boot,dm-pre-reloc;
 	status = "okay";
 };
 

commit 26542506fbc70fb38896e5b942d5028b4600f883
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Feb 6 21:35:33 2018 +0800

    rockchip: rk3126: enable live dt
    
    Change-Id: I32398167a4e9dda749fe36d82f591d9f662d7fc9
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/bnd-d708-rk3126_defconfig b/configs/bnd-d708-rk3126_defconfig
index a94df64af9..261c6c5c81 100644
--- a/configs/bnd-d708-rk3126_defconfig
+++ b/configs/bnd-d708-rk3126_defconfig
@@ -37,6 +37,8 @@ CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y
 CONFIG_MMC_DW=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_CHECKS=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
diff --git a/configs/evb-rk3126_defconfig b/configs/evb-rk3126_defconfig
index c44891c1a4..8cb856bc1d 100644
--- a/configs/evb-rk3126_defconfig
+++ b/configs/evb-rk3126_defconfig
@@ -9,6 +9,8 @@ CONFIG_RKPARM_PARTITION=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3126-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_SYS_MALLOC_F_LEN=0x38000
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_FASTBOOT=y
@@ -36,6 +38,8 @@ CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y
 CONFIG_MMC_DW=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_CHECKS=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y

commit 9aa59efb89ea54fce279be17e1fcbf607146fdb0
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Feb 9 11:59:10 2018 +0800

    rockchip: drm: fix live dt use in lvds
    
    Change-Id: I144750e3e10180055ac02480c2ef989d44e4d7bf
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/video/drm/panel_simple.c b/drivers/video/drm/panel_simple.c
index 260b800336..6eb77b0c1c 100644
--- a/drivers/video/drm/panel_simple.c
+++ b/drivers/video/drm/panel_simple.c
@@ -13,6 +13,7 @@
 #include <linux/media-bus-format.h>
 #include <dm/uclass.h>
 #include <dm/uclass-id.h>
+#include <dm/ofnode.h>
 #include <asm/gpio.h>
 #include <backlight.h>
 #include <power/regulator.h>
@@ -27,7 +28,7 @@
 struct panel_simple {
 	struct udevice *dev;
 	const void *blob;
-	int node;
+	ofnode node;
 
 	const struct drm_display_mode *mode;
 	int bus_format;
diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index ce8004233b..45216750b2 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -10,8 +10,11 @@
 #include <malloc.h>
 #include <asm/unaligned.h>
 #include <linux/list.h>
+#include <linux/ioport.h>
 #include <asm/io.h>
 #include <dm/device.h>
+#include <dm/read.h>
+#include <dm/ofnode.h>
 #include <syscon.h>
 #include <asm/arch-rockchip/clock.h>
 #include <asm/gpio.h>
@@ -506,13 +509,12 @@ static int rockchip_lvds_init(struct display_state *state)
 	struct connector_state *conn_state = &state->conn_state;
 	const struct rockchip_connector *connector = conn_state->connector;
 	const struct rockchip_lvds_chip_data *pdata = connector->data;
-	int lvds_node = conn_state->node;
 	struct rockchip_lvds_device *lvds;
 	const char *name;
 	int i, width;
-	struct fdt_resource lvds_phy, lvds_ctrl;
+	struct resource lvds_phy, lvds_ctrl;
 	struct panel_state *panel_state = &state->panel_state;
-	int panel_node = panel_state->node;
+	ofnode panel_node = panel_state->node;
 	int ret;
 
 	lvds = malloc(sizeof(*lvds));

commit 69cea70e22adbdf882f82d4ca7b9210f09a875c1
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Feb 7 20:30:35 2018 +0800

    pwm-backlight: support rockchip invert level array
    
    Some Rockchip dts use invert level array for backligh.
    
    Change-Id: Ic6b5e22031cf570a56bb2854ed10f3e7c24029cc
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/video/pwm_backlight.c b/drivers/video/pwm_backlight.c
index 5f7ea88db8..b99d2eaf95 100644
--- a/drivers/video/pwm_backlight.c
+++ b/drivers/video/pwm_backlight.c
@@ -135,6 +135,9 @@ static int pwm_backlight_ofdata_to_platdata(struct udevice *dev)
 	if (cell && count > index) {
 		priv->default_level = fdt32_to_cpu(cell[index]);
 		priv->max_level = fdt32_to_cpu(cell[count - 1]);
+		/* Rockchip dts may use a invert sequence level array */
+		if(fdt32_to_cpu(cell[0]) > priv->max_level)
+			priv->max_level = fdt32_to_cpu(cell[0]);
 	} else {
 		priv->default_level = index;
 		priv->max_level = 255;

commit 53497b6bdd0588d4a8127494c2e194f1f7702ed9
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Feb 7 20:34:17 2018 +0800

    rockchip: dts: rk3128: sync pinctrl from kernel
    
    Some pinctrl setting are not correct for rk3128, sync from kernel.
    
    Change-Id: Ib98455ca61ca8a8b19cf2d8134d71ab358ac0a37
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3128.dtsi b/arch/arm/dts/rk3128.dtsi
index e3223b2402..dd2b781226 100644
--- a/arch/arm/dts/rk3128.dtsi
+++ b/arch/arm/dts/rk3128.dtsi
@@ -226,18 +226,14 @@
 		reg = <0x20000110 0x24>;
 		#reset-cells = <1>;
 	};
-
 	nandc: nandc@10500000 {
 		compatible = "rockchip,rk-nandc";
 		reg = <0x10500000 0x4000>;
 		interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&nandc_ale &nandc_cle &nandc_wrn &nandc_rdn &nandc_rdy &nandc_cs0 &nandc_data>;
 		nandc_id = <0>;
-		clocks = <&cru SCLK_NANDC>,
-			 <&cru HCLK_NANDC>,
-			 <&cru SRST_NANDC>;
-		clock-names = "clk_nandc", "g_clk_nandc", "hclk_nandc";
+		clocks = <&cru SCLK_NANDC>, <&cru HCLK_NANDC>;
+		clock-names = "clk_nandc", "hclk_nandc";
+		status = "disabled";
 	};
 
 	dmc: dmc@20004000 {
@@ -629,17 +625,14 @@
 		compatible = "rockchip,rk3128-spi", "rockchip,rk3288-spi";
 		reg = <0x20074000 0x1000>;
 		interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
-		#address-cells = <1>;
-		#size-cells = <0>;
 		pinctrl-names = "default";
-		pinctrl-0 = <&spi0_txd_mux0 &spi0_rxd_mux0 &spi0_clk_mux0 &spi0_cs0_mux0 &spi0_cs1_mux0>;
-		rockchip,spi-src-clk = <0>;
-		num-cs = <2>;
-		clocks =<&cru SCLK_SPI>, <&cru PCLK_SPI>;
-		clock-names = "spi","pclk_spi0";
+		pinctrl-0 = <&spi0_tx &spi0_rx &spi0_clk &spi0_cs0 &spi0_cs1>;
+		clock-names = "spiclk", "apb_pclk";
 		dmas = <&pdma 8>, <&pdma 9>;
-		#dma-cells = <2>;
 		dma-names = "tx", "rx";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
 	};
 
 	grf: syscon@20008000 {
@@ -751,66 +744,78 @@
 			};
 		};
 
-
-		nandc{
-			nandc_ale:nandc-ale {
-				rockchip,pins = <0 18 RK_FUNC_1 &pcfg_pull_none>;
-			};
-
-			nandc_cle:nandc-cle {
-				rockchip,pins = <0 18 RK_FUNC_1 &pcfg_pull_none>;
-			};
-
-			nandc_wrn:nandc-wrn {
-				rockchip,pins = <0 18 RK_FUNC_1 &pcfg_pull_none>;
-			};
-
-			nandc_rdn:nandc-rdn {
-				rockchip,pins = <0 18 RK_FUNC_1 &pcfg_pull_none>;
+		i2c0 {
+			i2c0_xfer: i2c0-xfer {
+				rockchip,pins = <0 RK_PA0 1 &pcfg_pull_none>,
+						<0 RK_PA1 1 &pcfg_pull_none>;
 			};
+		};
 
-			nandc_rdy:nandc-rdy {
-				rockchip,pins = <0 18 RK_FUNC_1 &pcfg_pull_none>;
+		i2c1 {
+			i2c1_xfer: i2c1-xfer {
+				rockchip,pins = <0 RK_PA2 1 &pcfg_pull_none>,
+						<0 RK_PA3 1 &pcfg_pull_none>;
 			};
+		};
 
-			nandc_cs0:nandc-cs0 {
-				rockchip,pins = <0 18 RK_FUNC_1 &pcfg_pull_none>;
+		i2c2 {
+			i2c2_xfer: i2c2-xfer {
+				rockchip,pins = <2 RK_PC4 3 &pcfg_pull_none>,
+						<2 RK_PC5 3 &pcfg_pull_none>;
 			};
+		};
 
-			nandc_data: nandc-data {
-				rockchip,pins = <0 18 RK_FUNC_1 &pcfg_pull_none>;
+		i2c3 {
+			i2c3_xfer: i2c3-xfer {
+				rockchip,pins = <0 RK_PA6 1 &pcfg_pull_none>,
+						<0 RK_PA7 1 &pcfg_pull_none>;
 			};
 		};
 
-
 		uart0 {
 			uart0_xfer: uart0-xfer {
-				rockchip,pins = <0 16 RK_FUNC_1 &pcfg_pull_none>,
-						<0 17 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <2 RK_PD2 2 &pcfg_pull_default>,
+						<2 RK_PD3 2 &pcfg_pull_none>;
 			};
 
 			uart0_cts: uart0-cts {
-				rockchip,pins = <0 18 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <2 RK_PD5 2 &pcfg_pull_none>;
 			};
 
 			uart0_rts: uart0-rts {
-				rockchip,pins = <0 19 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <0 RK_PC1 2 &pcfg_pull_none>;
 			};
 		};
 
 		uart1 {
 			uart1_xfer: uart1-xfer {
-				rockchip,pins = <2 22 RK_FUNC_1 &pcfg_pull_none>,
-						<2 23 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <1 RK_PB1 2 &pcfg_pull_default>,
+						<1 RK_PB2 2 &pcfg_pull_default>;
+			};
+
+			uart1_cts: uart1-cts {
+				rockchip,pins = <1 RK_PB0 2 &pcfg_pull_none>;
+			};
+
+			uart1_rts: uart1-rts {
+				rockchip,pins = <1 RK_PB3 2 &pcfg_pull_none>;
 			};
 		};
 
-                uart2 {
-                        uart2_xfer: uart2-xfer {
-                                rockchip,pins = <1 18 RK_FUNC_2 &pcfg_pull_none>,
-                                                <1 19 RK_FUNC_2 &pcfg_pull_none>;
-                        };
-                };
+		uart2 {
+			uart2_xfer: uart2-xfer {
+				rockchip,pins = <1 RK_PC2 2 &pcfg_pull_default>,
+						<1 RK_PC3 2 &pcfg_pull_none>;
+			};
+
+			uart2_cts: uart2-cts {
+				rockchip,pins = <0 RK_PD1 1 &pcfg_pull_none>;
+			};
+
+			uart2_rts: uart2-rts {
+				rockchip,pins = <0 RK_PD0 1 &pcfg_pull_none>;
+			};
+		};
 
 		sdmmc {
 			sdmmc_clk: sdmmc-clk {
@@ -818,7 +823,7 @@
 			};
 
 			sdmmc_cmd: sdmmc-cmd {
-				rockchip,pins = <1 RK_PC1 1 &pcfg_pull_default>;
+				rockchip,pins = <1 RK_PB7 1 &pcfg_pull_default>;
 			};
 
 			sdmmc_wp: sdmmc-wp {
@@ -837,79 +842,173 @@
 			};
 		};
 
+		sdio {
+			sdio_clk: sdio-clk {
+				rockchip,pins = <1 RK_PA0 2 &pcfg_pull_none>;
+			};
+
+			sdio_cmd: sdio-cmd {
+				rockchip,pins = <0 RK_PA3 2 &pcfg_pull_default>;
+			};
+
+			sdio_pwren: sdio-pwren {
+				rockchip,pins = <0 RK_PD6 1 &pcfg_pull_default>;
+			};
+
+			sdio_bus4: sdio-bus4 {
+				rockchip,pins = <1 RK_PA1 2 &pcfg_pull_default>,
+						<1 RK_PA2 2 &pcfg_pull_default>,
+						<1 RK_PA4 2 &pcfg_pull_default>,
+						<1 RK_PA5 2 &pcfg_pull_default>;
+			};
+		};
+
+		hdmi {
+			hdmii2c_xfer: hdmii2c-xfer {
+				rockchip,pins = <0 RK_PA6 2 &pcfg_pull_none>,
+						<0 RK_PA7 2 &pcfg_pull_none>;
+			};
+		};
+
+		i2s {
+			i2s_bus: i2s-bus {
+				rockchip,pins = <0 RK_PB0 1 &pcfg_pull_none>,
+						<0 RK_PB1 1 &pcfg_pull_none>,
+						<0 RK_PB3 1 &pcfg_pull_none>,
+						<0 RK_PB4 1 &pcfg_pull_none>,
+						<0 RK_PB5 1 &pcfg_pull_none>,
+						<0 RK_PB6 1 &pcfg_pull_none>;
+			};
+
+			i2s1_bus: i2s1-bus {
+				rockchip,pins = <1 RK_PA0 1 &pcfg_pull_none>,
+						<1 RK_PA1 1 &pcfg_pull_none>,
+						<1 RK_PA2 1 &pcfg_pull_none>,
+						<1 RK_PA3 1 &pcfg_pull_none>,
+						<1 RK_PA4 1 &pcfg_pull_none>,
+						<1 RK_PA5 1 &pcfg_pull_none>;
+			};
+		};
+
 		pwm0 {
 			pwm0_pin: pwm0-pin {
-				rockchip,pins = <0 0 RK_FUNC_2 &pcfg_pull_none>;
+				rockchip,pins = <0 RK_PD2 1 &pcfg_pull_none>;
 			};
 		};
 
 		pwm1 {
 			pwm1_pin: pwm1-pin {
-				rockchip,pins = <0 1 RK_FUNC_2 &pcfg_pull_none>;
+				rockchip,pins = <0 RK_PD3 1 &pcfg_pull_none>;
 			};
 		};
 
 		pwm2 {
 			pwm2_pin: pwm2-pin {
-				rockchip,pins = <0 1 2 &pcfg_pull_none>;
+				rockchip,pins = <1 RK_PD4 1 &pcfg_pull_none>;
 			};
 		};
 
 		pwm3 {
 			pwm3_pin: pwm3-pin {
-				rockchip,pins = <0 27 1 &pcfg_pull_none>;
+				rockchip,pins = <3 RK_PD2 1 &pcfg_pull_none>;
 			};
 		};
 
-		i2c0 {
-			i2c0_xfer: i2c0-xfer {
-				rockchip,pins = <0 0 RK_FUNC_1 &pcfg_pull_none>,
-						<0 1 RK_FUNC_1 &pcfg_pull_none>;
+		gmac {
+			rgmii_pins: rgmii-pins {
+				rockchip,pins = <2 RK_PB0 3 &pcfg_pull_default>,
+						<2 RK_PB1 3 &pcfg_pull_default>,
+						<2 RK_PB3 3 &pcfg_pull_default>,
+						<2 RK_PB4 3 &pcfg_pull_default>,
+						<2 RK_PB5 3 &pcfg_pull_default>,
+						<2 RK_PB6 3 &pcfg_pull_default>,
+						<2 RK_PC0 3 &pcfg_pull_default>,
+						<2 RK_PC1 3 &pcfg_pull_default>,
+						<2 RK_PC2 3 &pcfg_pull_default>,
+						<2 RK_PC3 3 &pcfg_pull_default>,
+						<2 RK_PD1 3 &pcfg_pull_default>,
+						<2 RK_PC4 4 &pcfg_pull_default>,
+						<2 RK_PC5 4 &pcfg_pull_default>,
+						<2 RK_PC6 4 &pcfg_pull_default>,
+						<2 RK_PC7 4 &pcfg_pull_default>;
 			};
-		};
 
-		i2c1 {
-			i2c1_xfer: i2c1-xfer {
-				rockchip,pins = <0 2 RK_FUNC_1 &pcfg_pull_none>,
-						<0 3 RK_FUNC_1 &pcfg_pull_none>;
+			rmii_pins: rmii-pins {
+				rockchip,pins = <2 RK_PB0 3 &pcfg_pull_default>,
+						<2 RK_PB4 3 &pcfg_pull_default>,
+						<2 RK_PB5 3 &pcfg_pull_default>,
+						<2 RK_PB6 3 &pcfg_pull_default>,
+						<2 RK_PB7 3 &pcfg_pull_default>,
+						<2 RK_PC0 3 &pcfg_pull_default>,
+						<2 RK_PC1 3 &pcfg_pull_default>,
+						<2 RK_PC3 3 &pcfg_pull_default>,
+						<2 RK_PC4 3 &pcfg_pull_default>,
+						<2 RK_PD1 3 &pcfg_pull_default>;
 			};
 		};
 
-		i2c2 {
-			i2c2_xfer: i2c2-xfer {
-				rockchip,pins = <2 20 3 &pcfg_pull_none>,
-						<2 21 3 &pcfg_pull_none>;
+		spdif {
+			spdif_tx: spdif-tx {
+				rockchip,pins = <3 RK_PD3 1 &pcfg_pull_none>;
 			};
 		};
 
-		i2c3 {
-			i2c3_xfer: i2c3-xfer {
-				rockchip,pins = <0 6 RK_FUNC_1 &pcfg_pull_none>,
-						<0 7 RK_FUNC_1 &pcfg_pull_none>;
+		spi {
+			spi0_clk: spi0-clk {
+				rockchip,pins = <1 RK_PB0 1 &pcfg_pull_default>;
 			};
-		};
 
-		spi0 {
-			spi0_txd_mux0:spi0-txd-mux0 {
-				rockchip,pins = <2 4 RK_FUNC_2 &pcfg_pull_none>;
+			spi0_cs0: spi0-cs0 {
+				rockchip,pins = <1 RK_PB3 1 &pcfg_pull_default>;
 			};
 
-			spi0_rxd_mux0:spi0-rxd-mux0 {
-				rockchip,pins = <2 4 RK_FUNC_2 &pcfg_pull_none>;
+			spi0_tx: spi0-tx {
+				rockchip,pins = <1 RK_PB1 1 &pcfg_pull_default>;
 			};
 
-			spi0_clk_mux0:spi0-clk-mux0 {
-				rockchip,pins = <2 4 RK_FUNC_2 &pcfg_pull_none>;
+			spi0_rx: spi0-rx {
+				rockchip,pins = <1 RK_PB2 1 &pcfg_pull_default>;
 			};
 
-			spi0_cs0_mux0:spi0-cs0-mux0 {
-				rockchip,pins = <2 4 RK_FUNC_2 &pcfg_pull_none>;
+			spi0_cs1: spi0-cs1 {
+				rockchip,pins = <1 RK_PB4 1 &pcfg_pull_default>;
 			};
 
-			spi0_cs1_mux0:spi0-cs1-mux0 {
-				rockchip,pins = <2 4 RK_FUNC_2 &pcfg_pull_none>;
+			spi1_clk: spi1-clk {
+				rockchip,pins = <2 RK_PA0 2 &pcfg_pull_default>;
+			};
+
+			spi1_cs0: spi1-cs0 {
+				rockchip,pins = <1 RK_PD6 3 &pcfg_pull_default>;
+			};
+
+			spi1_tx: spi1-tx {
+				rockchip,pins = <1 RK_PD5 3 &pcfg_pull_default>;
+			};
+
+			spi1_rx: spi1-rx {
+				rockchip,pins = <1 RK_PD4 3 &pcfg_pull_default>;
 			};
-		};
 
+			spi1_cs1: spi1-cs1 {
+				rockchip,pins = <1 RK_PD7 3 &pcfg_pull_default>;
+			};
+
+			spi2_clk: spi2-clk {
+				rockchip,pins = <0 RK_PB1 2 &pcfg_pull_default>;
+			};
+
+			spi2_cs0: spi2-cs0 {
+				rockchip,pins = <0 RK_PB6 2 &pcfg_pull_default>;
+			};
+
+			spi2_tx: spi2-tx {
+				rockchip,pins = <0 RK_PB3 2 &pcfg_pull_default>;
+			};
+
+			spi2_rx: spi2-rx {
+				rockchip,pins = <0 RK_PB5 2 &pcfg_pull_default>;
+			};
+		};
 	};
 };

commit 2208cfa92d0aab6f63c2f0d4334949b33f05bc2d
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Feb 7 15:40:29 2018 +0800

    rockchip: pinctrl: convert to live dt
    
    Use live dt api
    
    Change-Id: Icb7d9fe52053b7436c262fbe79007e7f4394c715
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index ad103560d4..d05a3f5630 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <dm.h>
 #include <dm/pinctrl.h>
+#include <dm/ofnode.h>
 #include <regmap.h>
 #include <syscon.h>
 
@@ -1823,21 +1824,29 @@ static int rockchip_pinctrl_set_state(struct udevice *dev,
 {
 	struct rockchip_pinctrl_priv *priv = dev_get_priv(dev);
 	struct rockchip_pin_ctrl *ctrl = priv->ctrl;
-	const void *blob = gd->fdt_blob;
-	int node = dev_of_offset(config);
 	u32 cells[MAX_ROCKCHIP_PINS_ENTRIES * 4];
 	u32 bank, pin, mux, conf, arg, default_val;
 	int ret, count, i;
 	const char *prop_name;
-	int pcfg_node, property_offset, prop_len, param;
 	const void *value;
-
-	count = fdtdec_get_int_array_count(blob, node, "rockchip,pins",
-					   cells, ARRAY_SIZE(cells));
+	int prop_len, param;
+	const u32 *data;
+	ofnode node;
+#ifdef CONFIG_OF_LIVE
+	const struct device_node *np;
+	struct property *pp;
+#else
+	int property_offset, pcfg_node;
+	const void *blob = gd->fdt_blob;
+#endif
+	data = dev_read_prop(config, "rockchip,pins", &count);
 	if (count < 0) {
 		debug("%s: bad array %d\n", __func__, count);
 		return -EINVAL;
 	}
+	count /= sizeof(u32);
+	for (i = 0; i < count; i++)
+		cells[i] = fdt32_to_cpu(data[i]);
 
 	if (count > MAX_ROCKCHIP_PINS_ENTRIES * 4) {
 		debug("%s: unsupported pins array count %d\n",
@@ -1859,16 +1868,23 @@ static int rockchip_pinctrl_set_state(struct udevice *dev,
 		if (ret)
 			return ret;
 
-		pcfg_node = fdt_node_offset_by_phandle(blob, conf);
-		if (pcfg_node < 0)
+		node = ofnode_get_by_phandle(conf);
+		if (!ofnode_valid(node))
 			return -ENODEV;
-
+#ifdef CONFIG_OF_LIVE
+		np = ofnode_to_np(node);
+		for (pp = np->properties; pp; pp = pp->next) {
+			prop_name = pp->name;
+			prop_len = pp->length;
+			value = pp->value;
+#else
+		pcfg_node = ofnode_to_offset(node);
 		fdt_for_each_property_offset(property_offset, blob, pcfg_node) {
 			value = fdt_getprop_by_offset(blob, property_offset,
 						      &prop_name, &prop_len);
 			if (!value)
 				return -ENOENT;
-
+#endif
 			param = rockchip_pinconf_prop_name_to_param(prop_name,
 								    &default_val);
 			if (param < 0)

commit df5ceb01dbc6914ca7c4e6c2288ae27e11a24500
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Feb 8 21:54:20 2018 +0800

    core: add ofnode_get_by_phandle() api
    
    We need to get ofnode from a phandle, add interface to support
    both live dt and fdt.
    
    Change-Id: I01a5241e2eced37b68ab6556cc1b16001eecbe0f
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index 0fc8bd4129..59c8ff3014 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -177,6 +177,19 @@ const char *ofnode_get_name(ofnode node)
 	return fdt_get_name(gd->fdt_blob, ofnode_to_offset(node), NULL);
 }
 
+ofnode ofnode_get_by_phandle(uint phandle)
+{
+	ofnode node;
+
+	if (of_live_active())
+		node = np_to_ofnode(of_find_node_by_phandle(phandle));
+	else
+		node.of_offset = fdt_node_offset_by_phandle(gd->fdt_blob,
+							    phandle);
+
+	return node;
+}
+
 int ofnode_read_size(ofnode node, const char *propname)
 {
 	int len;
diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index 8b9932a569..b1681e256e 100644
--- a/include/dm/ofnode.h
+++ b/include/dm/ofnode.h
@@ -309,6 +309,14 @@ ofnode ofnode_next_subnode(ofnode node);
  */
 const char *ofnode_get_name(ofnode node);
 
+/**
+ * ofnode_get_by_phandle() - get ofnode from phandle
+ *
+ * @phandle:	phandle to look up
+ * @return ofnode reference to the phandle
+ */
+ofnode ofnode_get_by_phandle(uint phandle);
+
 /**
  * ofnode_read_size() - read the size of a property
  *

commit 2d06d52c9913ecf0a43db06cb7559b56bf5d828c
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Feb 7 18:01:07 2018 +0800

    pinctrl-uclass: convert to use live dt
    
    Use live dt interface for pinctrl_select_state_full()
    
    Change-Id: I1cc892f59004a48f4f2e6adac2a17a03dbfcb81c
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/pinctrl/pinctrl-uclass.c b/drivers/pinctrl/pinctrl-uclass.c
index 114952a1da..5abfeba3bf 100644
--- a/drivers/pinctrl/pinctrl-uclass.c
+++ b/drivers/pinctrl/pinctrl-uclass.c
@@ -5,13 +5,13 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
 #include <linux/err.h>
 #include <linux/list.h>
 #include <dm.h>
 #include <dm/lists.h>
 #include <dm/pinctrl.h>
 #include <dm/util.h>
+#include <dm/of_access.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -63,16 +63,13 @@ static int pinctrl_config_one(struct udevice *config)
  */
 static int pinctrl_select_state_full(struct udevice *dev, const char *statename)
 {
-	const void *fdt = gd->fdt_blob;
-	int node = dev_of_offset(dev);
 	char propname[32]; /* long enough */
 	const fdt32_t *list;
 	uint32_t phandle;
-	int config_node;
 	struct udevice *config;
 	int state, size, i, ret;
 
-	state = fdt_stringlist_search(fdt, node, "pinctrl-names", statename);
+	state = dev_read_stringlist_search(dev, "pinctrl-names", statename);
 	if (state < 0) {
 		char *end;
 		/*
@@ -85,22 +82,15 @@ static int pinctrl_select_state_full(struct udevice *dev, const char *statename)
 	}
 
 	snprintf(propname, sizeof(propname), "pinctrl-%d", state);
-	list = fdt_getprop(fdt, node, propname, &size);
+	list = dev_read_prop(dev, propname, &size);
 	if (!list)
 		return -EINVAL;
 
 	size /= sizeof(*list);
 	for (i = 0; i < size; i++) {
 		phandle = fdt32_to_cpu(*list++);
-
-		config_node = fdt_node_offset_by_phandle(fdt, phandle);
-		if (config_node < 0) {
-			dev_err(dev, "prop %s index %d invalid phandle\n",
-				propname, i);
-			return -EINVAL;
-		}
-		ret = uclass_get_device_by_of_offset(UCLASS_PINCONFIG,
-						     config_node, &config);
+		ret = uclass_get_device_by_phandle_id(UCLASS_PINCONFIG, phandle,
+						      &config);
 		if (ret)
 			return ret;
 

commit 1d5894f27353bd22223521c82ffaebb2810d4781
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Feb 8 20:52:56 2018 +0800

    core: add uclass_get_device_by_phandle_id() api
    
    Add to api for who can not get phandle from a device property.
    
    Change-Id: I8395f02d1731a4bbb00af1e4fa9d151830fc54b0
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c
index af665361ce..197ac1c0a8 100644
--- a/drivers/core/uclass.c
+++ b/drivers/core/uclass.c
@@ -446,6 +446,34 @@ int uclass_get_device_by_ofnode(enum uclass_id id, ofnode node,
 }
 
 #if CONFIG_IS_ENABLED(OF_CONTROL)
+int uclass_get_device_by_phandle_id(enum uclass_id id, int phandle_id,
+				    struct udevice **devp)
+{
+	struct udevice *dev;
+	struct uclass *uc;
+	int ret;
+
+	*devp = NULL;
+	ret = uclass_get(id, &uc);
+	if (ret)
+		return ret;
+
+	ret = -ENODEV;
+	list_for_each_entry(dev, &uc->dev_head, uclass_node) {
+		uint phandle;
+
+		phandle = dev_read_phandle(dev);
+
+		if (phandle == phandle_id) {
+			*devp = dev;
+			ret = 0;
+			break;
+		}
+	}
+
+	return uclass_get_device_tail(dev, ret, devp);
+}
+
 int uclass_get_device_by_phandle(enum uclass_id id, struct udevice *parent,
 				 const char *name, struct udevice **devp)
 {
diff --git a/include/dm/uclass.h b/include/dm/uclass.h
index 18188497c2..f6fe785583 100644
--- a/include/dm/uclass.h
+++ b/include/dm/uclass.h
@@ -202,6 +202,22 @@ int uclass_get_device_by_of_offset(enum uclass_id id, int node,
 int uclass_get_device_by_ofnode(enum uclass_id id, ofnode node,
 				struct udevice **devp);
 
+/**
+ * uclass_get_device_by_phandle_id() - Get a uclass device by phandle id
+ *
+ * This searches the devices in the uclass for one with the given phandle id.
+ *
+ * The device is probed to activate it ready for use.
+ *
+ * @id: uclass ID to look up
+ * @phandle_id: the phandle id to look up
+ * @devp: Returns pointer to device (there is only one for each node)
+ * @return 0 if OK, -ENODEV if there is no device match the phandle, other
+ *	-ve on error
+ */
+int uclass_get_device_by_phandle_id(enum uclass_id id, int phandle_id,
+				    struct udevice **devp);
+
 /**
  * uclass_get_device_by_phandle() - Get a uclass device by phandle
  *

commit f8aaa2c25fb717c0a9063219608622ff00507c52
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Feb 7 11:10:27 2018 +0800

    rockchip: board: add kernel dtb support
    
    Load dtb from mmc/nand, rebuild live dt and scan dev.
    
    Change-Id: If079b23702d0df333b62a14fcf3f6c2c37d3d670
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 00efa6bf1e..6d44919b95 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -361,6 +361,15 @@ config ROCKCHIP_VENDOR_PARTITION
 	  This enable support to read/write vendor configuration data from/to
 	  this partition.
 
+config USING_KERNEL_DTB
+	bool "Using dtb from Kernel/resource for U-Boot"
+	depends on RKIMG_BOOTLOADER && OF_LIVE
+	default y
+	help
+	  This enable support to read dtb from resource and use it for U-Boot,
+	  the uart and emmc will still using U-Boot dtb, but other devices like
+	  regulator/pmic, display, usb will use dts node from kernel.
+
 config ROCKCHIP_CRC
 	bool "Rockchip CRC verify images"
 	help
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 4848c3ea3a..6cffaefe75 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -22,6 +22,9 @@
 #ifdef CONFIG_DRM_ROCKCHIP
 #include <video_rockchip.h>
 #endif
+#include <mmc.h>
+#include <of_live.h>
+#include <dm/root.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -97,10 +100,66 @@ int board_late_init(void)
 	return rk_board_late_init();
 }
 
+#ifdef CONFIG_USING_KERNEL_DTB
+#include <asm/arch/resource_img.h>
+#define DTB_FILE                        "rk-kernel.dtb"
+int init_kernel_dtb(void)
+{
+	int ret = 0;
+	struct mmc *mmc;
+	struct udevice *dev;
+	ulong fdt_addr = 0;
+
+	ret = mmc_initialize(gd->bd);
+	if (ret)
+		goto scan_nand;
+	mmc = find_mmc_device(0);
+	if (!mmc) {
+		printf("no mmc device at slot 0\n");
+		goto scan_nand;
+	}
+	ret = mmc_init(mmc);
+	if (!ret)
+		goto init_dtb;
+	printf("%s mmc init fail %d\n", __func__, ret);
+scan_nand:
+	ret = uclass_get_device(UCLASS_RKNAND, 0, &dev);
+	if (ret) {
+		printf("%s: Cannot find rknand device\n", __func__);
+		return -1;
+	}
+
+init_dtb:
+	fdt_addr = env_get_ulong("fdt_addr_r", 16, 0);
+	if (!fdt_addr) {
+		printf("No Found FDT Load Address.\n");
+		return -1;
+	}
+
+	ret = rockchip_read_resource_file((void *)fdt_addr, DTB_FILE, 0, 0);
+	if (ret < 0) {
+		printf("%s dtb in resource read fail\n", __func__);
+		return 0;
+	}
+
+	of_live_build((void *)fdt_addr, (struct device_node **)&gd->of_root);
+
+	dm_scan_fdt((void *)fdt_addr, false);
+
+	gd->fdt_blob = (void *)fdt_addr;
+
+	return 0;
+}
+#endif
+
+
 int board_init(void)
 {
 	int ret;
 
+#ifdef CONFIG_USING_KERNEL_DTB
+	init_kernel_dtb();
+#endif
 #ifdef CONFIG_DM_REGULATOR
 	ret = regulators_enable_boot_on(false);
 	if (ret)

commit d2e8ba4eb0c5122b72750d0fead1a52ba6234665
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Feb 7 11:14:07 2018 +0800

    Revert "rockchip: add support to load and use kernel dtb"
    
    This reverts commit af586a3812f626a0f7ff0aded53414ac6c08b15c.
    
    Change-Id: Ie1f8012b89ac810e3bc6219459127bc9ee88c674
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 6d44919b95..00efa6bf1e 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -361,15 +361,6 @@ config ROCKCHIP_VENDOR_PARTITION
 	  This enable support to read/write vendor configuration data from/to
 	  this partition.
 
-config USING_KERNEL_DTB
-	bool "Using dtb from Kernel/resource for U-Boot"
-	depends on RKIMG_BOOTLOADER && OF_LIVE
-	default y
-	help
-	  This enable support to read dtb from resource and use it for U-Boot,
-	  the uart and emmc will still using U-Boot dtb, but other devices like
-	  regulator/pmic, display, usb will use dts node from kernel.
-
 config ROCKCHIP_CRC
 	bool "Rockchip CRC verify images"
 	help
diff --git a/common/board_r.c b/common/board_r.c
index 8055c72581..09167c13cc 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -103,41 +103,6 @@ static int initr_reloc(void)
 
 	return 0;
 }
-#ifdef CONFIG_USING_KERNEL_DTB
-#include <asm/arch/resource_img.h>
-#define DTB_FILE                        "rk-kernel.dtb"
-int get_fdt_from_resource(void)
-{
-	int ret = 0;
-	struct mmc *mmc;
-	ulong fdt_addr = 0;
-
-	mmc_initialize(gd->bd);
-	mmc = find_mmc_device(0);
-	if (!mmc) {
-		printf("no mmc device at slot 0\n");
-		return -1;
-	}
-	ret = mmc_init(mmc);
-	if (ret)
-		printf("%s mmc init fail %d\n", __func__, ret);
-
-	fdt_addr = env_get_ulong("fdt_addr_r", 16, 0);
-	if (!fdt_addr) {
-		printf("No Found FDT Load Address.\n");
-		return -1;
-	}
-
-	ret = rockchip_read_resource_file((void *)fdt_addr, DTB_FILE, 0, 0);
-	if (ret < 0) {
-		printf("%s dtb in resource read fail\n", __func__);
-		return 0;
-	}
-	gd->kernel_fdt = (void *)fdt_addr;
-
-	return 0;
-}
-#endif
 
 #ifdef CONFIG_ARM
 /*
@@ -733,9 +698,6 @@ static init_fnc_t init_sequence_r[] = {
 	initr_noncached,
 #endif
 	bootstage_relocate,
-#ifdef CONFIG_USING_KERNEL_DTB
-	get_fdt_from_resource,
-#endif
 #ifdef CONFIG_OF_LIVE
 	initr_of_live,
 #endif
diff --git a/drivers/core/root.c b/drivers/core/root.c
index 5525d74bc3..976e2c4fdd 100644
--- a/drivers/core/root.c
+++ b/drivers/core/root.c
@@ -306,20 +306,8 @@ int dm_scan_fdt(const void *blob, bool pre_reloc_only)
 {
 #if CONFIG_IS_ENABLED(OF_LIVE)
 	if (of_live_active())
-#ifndef CONFIG_USING_KERNEL_DTB
 		return dm_scan_fdt_live(gd->dm_root, gd->of_root,
 					pre_reloc_only);
-#else
-	{
-		dm_scan_fdt_live(gd->dm_root, gd->of_root,
-					pre_reloc_only);
-		if (!gd->kernel_of_root)
-			return 0;
-
-		return dm_scan_fdt_live(gd->dm_root, gd->kernel_of_root,
-					pre_reloc_only);
-	}
-#endif
 	else
 #endif
 	return dm_scan_fdt_node(gd->dm_root, blob, 0, pre_reloc_only);
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index 591a431cf3..5aaa78b06a 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -81,10 +81,6 @@ typedef struct global_data {
 	unsigned long fdt_size;		/* Space reserved for relocated FDT */
 #ifdef CONFIG_OF_LIVE
 	struct device_node *of_root;
-#ifdef CONFIG_USING_KERNEL_DTB
-	void *kernel_fdt;		/* Kernel FDT */
-	struct device_node *kernel_of_root;
-#endif
 #endif
 	struct jt_funcs *jt;		/* jump table */
 	char env_buf[32];		/* buffer for env_get() before reloc. */
diff --git a/lib/of_live.c b/lib/of_live.c
index 12c9abcf89..f351483387 100644
--- a/lib/of_live.c
+++ b/lib/of_live.c
@@ -332,15 +332,6 @@ int of_live_build(const void *fdt_blob, struct device_node **rootp)
 		debug("Failed to scan live tree aliases: err=%d\n", ret);
 		return ret;
 	}
-#ifdef CONFIG_USING_KERNEL_DTB
-	ret = unflatten_device_tree(gd->kernel_fdt,
-				    (struct device_node **)&gd->kernel_of_root);
-	if (ret) {
-		printf("%s fail to build live dt from kernel dtb.\n", __func__);
-		return 0;
-	}
-	gd->fdt_blob = gd->kernel_fdt;
-#endif
 	debug("%s: stop\n", __func__);
 
 	return ret;

commit b96443cc1c591fb96264e3a6e6365f4b59216cfd
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Jan 31 16:40:25 2018 +0800

    core: break when uclass_find() get UCLASS_ROOT
    
    After reloc and before dm_scan_init again, the dm_root is broken.
    
    Change-Id: Ia5b1f762a396daa78d2498b160f89a951a4ec544
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c
index f5e4067922..af665361ce 100644
--- a/drivers/core/uclass.c
+++ b/drivers/core/uclass.c
@@ -34,6 +34,9 @@ struct uclass *uclass_find(enum uclass_id key)
 	list_for_each_entry(uc, &gd->uclass_root, sibling_node) {
 		if (uc->uc_drv->id == key)
 			return uc;
+
+		if (uc->uc_drv->id == UCLASS_ROOT)
+			break;
 	}
 
 	return NULL;

commit a49612a6a220044829b38538551d7251562c5f28
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Feb 6 21:33:47 2018 +0800

    core: do not assert if node not valid in ofnode_get_name()
    
    In some case with LIVE DT, some node always not valid.
    
    Change-Id: I20ebc530f7addfef167dd5abbab46e8da0627dd8
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index 0030ab962e..0fc8bd4129 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -167,7 +167,10 @@ ofnode ofnode_next_subnode(ofnode node)
 
 const char *ofnode_get_name(ofnode node)
 {
-	assert(ofnode_valid(node));
+	if(!ofnode_valid(node)){
+		debug("%s node not valid\n", __func__);
+		return NULL;
+	}
 	if (ofnode_is_np(node))
 		return strrchr(node.np->full_name, '/') + 1;
 

commit e2bce6e47ed7066d1c98ee2286d8ceb3443768e3
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Feb 6 21:31:18 2018 +0800

    rockchip: video: convert display driver to live dt
    
    Convert to live dt for kernel dtb, display driver will depends on
    OF_LIVE after this patch.
    
    Change-Id: I536e936d551c0320f30dca82c9cf376e77589ffc
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/video/drm/Kconfig b/drivers/video/drm/Kconfig
index 08aebd99d1..305df5c5a5 100644
--- a/drivers/video/drm/Kconfig
+++ b/drivers/video/drm/Kconfig
@@ -1,6 +1,6 @@
 menuconfig DRM_ROCKCHIP
 	bool "Rockchip DRM Support"
-	depends on DM_VIDEO
+	depends on DM_VIDEO && OF_LIVE
 	help
 	  Rockchip SoCs provide video output capabilities for High-Definition
 	  Multimedia Interface (HDMI), Low-voltage Differential Signalling
diff --git a/drivers/video/drm/dw_hdmi.c b/drivers/video/drm/dw_hdmi.c
index 746afcd0f6..5edfc2238e 100644
--- a/drivers/video/drm/dw_hdmi.c
+++ b/drivers/video/drm/dw_hdmi.c
@@ -5,12 +5,13 @@
  */
 
 #include <common.h>
-#include <fdtdec.h>
-#include <fdt_support.h>
 #include <malloc.h>
 #include <syscon.h>
 #include <asm/arch-rockchip/clock.h>
 #include <edid.h>
+#include <dm/device.h>
+#include <dm/of_node.h>
+#include <dm/read.h>
 #include <linux/hdmi.h>
 #include <linux/media-bus-format.h>
 #include <linux/dw_hdmi.h>
@@ -2087,7 +2088,7 @@ int rockchip_dw_hdmi_init(struct display_state *state)
 	struct crtc_state *crtc_state = &state->crtc_state;
 	struct dw_hdmi *hdmi;
 	struct drm_display_mode *mode_buf;
-	int hdmi_node = conn_state->node;
+	ofnode hdmi_node = conn_state->node;
 	u32 val;
 
 	hdmi = malloc(sizeof(struct dw_hdmi));
@@ -2101,10 +2102,8 @@ int rockchip_dw_hdmi_init(struct display_state *state)
 		return -ENOMEM;
 	memset(mode_buf, 0, MODE_LEN * sizeof(struct drm_display_mode));
 
-	hdmi->regs = (void *)fdtdec_get_addr_size_auto_noparent(state->blob,
-					hdmi_node, "reg", 0, NULL, false);
-	hdmi->io_width = fdtdec_get_int(state->blob, hdmi_node,
-					"reg-io-width", -1);
+	hdmi->regs = dev_read_addr_ptr(conn_state->dev);
+	hdmi->io_width = ofnode_read_s32_default(hdmi_node, "reg-io-width", -1);
 	hdmi->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 	if (hdmi->grf <= 0) {
 		printf("%s: Get syscon grf failed (ret=%p)\n",
diff --git a/drivers/video/drm/panel_simple.c b/drivers/video/drm/panel_simple.c
index 318d347098..260b800336 100644
--- a/drivers/video/drm/panel_simple.c
+++ b/drivers/video/drm/panel_simple.c
@@ -8,8 +8,6 @@
 #include <common.h>
 #include <errno.h>
 #include <malloc.h>
-#include <fdtdec.h>
-#include <fdt_support.h>
 #include <asm/unaligned.h>
 #include <linux/list.h>
 #include <linux/media-bus-format.h>
@@ -106,7 +104,7 @@ static int panel_simple_disable(struct display_state *state)
 	return 0;
 }
 
-static int panel_simple_parse_dt(const void *blob, int node,
+static int panel_simple_parse_dt(const void *blob, ofnode node,
 				 struct panel_simple *panel)
 {
 	int ret;
@@ -134,13 +132,13 @@ static int panel_simple_parse_dt(const void *blob, int node,
 		return ret;
 	}
 
-	panel->power_invert = !!fdtdec_get_int(blob, node, "power_invert", 0);
+	panel->power_invert = !!ofnode_read_s32_default(node, "power_invert", 0);
 
-	panel->delay_prepare = fdtdec_get_int(blob, node, "delay,prepare", 0);
-	panel->delay_unprepare = fdtdec_get_int(blob, node, "delay,unprepare", 0);
-	panel->delay_enable = fdtdec_get_int(blob, node, "delay,enable", 0);
-	panel->delay_disable = fdtdec_get_int(blob, node, "delay,disable", 0);
-	panel->bus_format = fdtdec_get_int(blob, node, "bus-format", MEDIA_BUS_FMT_RBG888_1X24);
+	panel->delay_prepare = ofnode_read_s32_default(node, "delay,prepare", 0);
+	panel->delay_unprepare = ofnode_read_s32_default(node, "delay,unprepare", 0);
+	panel->delay_enable = ofnode_read_s32_default(node, "delay,enable", 0);
+	panel->delay_disable = ofnode_read_s32_default(node, "delay,disable", 0);
+	panel->bus_format = ofnode_read_s32_default(node, "bus-format", MEDIA_BUS_FMT_RBG888_1X24);
 
 	printf("delay prepare[%d] unprepare[%d] enable[%d] disable[%d]\n",
 	       panel->delay_prepare, panel->delay_unprepare,
@@ -157,7 +155,7 @@ static int panel_simple_init(struct display_state *state)
 	const void *blob = state->blob;
 	struct connector_state *conn_state = &state->conn_state;
 	struct panel_state *panel_state = &state->panel_state;
-	int node = panel_state->node;
+	ofnode node = panel_state->node;
 	const struct drm_display_mode *mode = panel_state->panel->data;
 	struct panel_simple *panel;
 	int ret;
diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index 55e068a9f1..8a8551e536 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -8,12 +8,12 @@
 #include <common.h>
 #include <errno.h>
 #include <malloc.h>
-#include <fdtdec.h>
-#include <fdt_support.h>
 #include <asm/unaligned.h>
 #include <asm/io.h>
 #include <linux/list.h>
 #include <dm/device.h>
+#include <dm/read.h>
+#include <dm/of_access.h>
 #include <syscon.h>
 #include <asm/arch-rockchip/clock.h>
 
@@ -340,7 +340,7 @@ struct dw_mipi_dsi {
 	void *base;
 	void *grf;
 	const void *blob;
-	int node;
+	ofnode node;
 
 	/* dual-channel */
 	struct dw_mipi_dsi *master;
@@ -531,7 +531,7 @@ static int dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi)
 	ret = readl_poll_timeout(dsi->base + DSI_PHY_STATUS,
 				 val, val & LOCK, 1000, PHY_STATUS_TIMEOUT_US);
 	if (ret < 0) {
-		printf("failed to wait for phy lock state\n");
+		printf("failed to wait for phy lock state %p\n", dsi->base);
 		return ret;
 	}
 
@@ -554,8 +554,7 @@ static unsigned long rockchip_dsi_calc_bandwidth(struct dw_mipi_dsi *dsi)
 	int rate;
 
 	/* optional override of the desired bandwidth */
-	rate = fdt_getprop_u32_default_node(dsi->blob, dsi->node, 0,
-					     "rockchip,lane-rate", -1);
+	rate = ofnode_read_u32_default(dsi->node, "rockchip,lane-rate", -1);
 	if (rate > 0) {
 		return rate;
 	}
@@ -955,21 +954,21 @@ static int dw_mipi_dsi_clk_enable(struct dw_mipi_dsi *dsi)
 
 static int rockchip_dsi_dual_channel_probe(struct dw_mipi_dsi *master)
 {
-	int node0, node1;
+	int phandle;
+	struct device_node *np;
 	struct dw_mipi_dsi *slave = NULL;
 
-	node0 = fdt_getprop_u32_default_node(master->blob, master->node, 0,
-					       "rockchip,dual-channel", -1);
-	if (node0 < 0)
+	phandle = ofnode_read_u32_default(master->node, "rockchip,dual-channel", -1);
+	if (phandle < 0)
 		return 0;
 
-	node1 = fdt_node_offset_by_phandle(master->blob, node0);
-	if (node1 < 0) {
+	np = of_find_node_by_phandle(phandle);
+	if (ofnode_valid(np_to_ofnode(np))) {
 		printf("failed to find dsi slave node\n");
 		return -ENODEV;
 	}
 
-	if (!fdt_device_is_available(master->blob, node1)) {
+	if (!of_device_is_available(np)) {
 		printf("dsi slave node is not available\n");
 		return -ENODEV;
 	}
@@ -985,10 +984,8 @@ static int rockchip_dsi_dual_channel_probe(struct dw_mipi_dsi *master)
 	slave->master = master;
 
 	slave->blob = master->blob;
-	slave->node = node1;
-	slave->base = (void *)fdtdec_get_addr_size_auto_noparent(slave->blob,
-								 node1, "reg",
-								 0, NULL, false);
+	slave->node = np_to_ofnode(np);
+	slave->base = (u32 *)ofnode_get_addr_index(slave->node, 0);
 	slave->pdata = master->pdata;
 	slave->dphy.phy = master->dphy.phy;
 	slave->lanes = master->lanes;
@@ -1004,9 +1001,9 @@ static int rockchip_dw_mipi_dsi_init(struct display_state *state)
 	struct connector_state *conn_state = &state->conn_state;
 	const struct rockchip_connector *connector = conn_state->connector;
 	const struct dw_mipi_dsi_plat_data *pdata = connector->data;
-	int mipi_node = conn_state->node;
+	ofnode mipi_node = conn_state->node;
 	struct dw_mipi_dsi *dsi;
-	int panel;
+	ofnode panel;
 	int ret;
 
 	dsi = malloc(sizeof(*dsi));
@@ -1014,9 +1011,7 @@ static int rockchip_dw_mipi_dsi_init(struct display_state *state)
 		return -ENOMEM;
 	memset(dsi, 0, sizeof(*dsi));
 
-	dsi->base = (void *)fdtdec_get_addr_size_auto_noparent(state->blob,
-						mipi_node, "reg", 0, NULL, false);
-
+	dsi->base = dev_read_addr_ptr(conn_state->dev);
 	dsi->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 	if (dsi->grf <= 0) {
 		printf("%s: Get syscon grf failed (ret=%p)\n",
@@ -1030,14 +1025,14 @@ static int rockchip_dw_mipi_dsi_init(struct display_state *state)
 	conn_state->private = dsi;
 	conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
 
-	panel = fdt_subnode_offset(state->blob, mipi_node, "panel");
-	if (panel < 0) {
+	panel = dev_read_subnode(conn_state->dev, "panel");
+	if (!ofnode_valid(panel)) {
 		printf("failed to find panel node\n");
 		return -1;
 	}
 
 #define FDT_GET_INT(val, name) \
-	val = fdtdec_get_int(state->blob, panel, name, -1); \
+	val = ofnode_read_s32_default(panel, name, -1); \
 	if (val < 0) { \
 		printf("Can't get %s\n", name); \
 		return -1; \
diff --git a/drivers/video/drm/rockchip-inno-mipi-dphy.c b/drivers/video/drm/rockchip-inno-mipi-dphy.c
index 9b0c073e61..a808c0bcd9 100644
--- a/drivers/video/drm/rockchip-inno-mipi-dphy.c
+++ b/drivers/video/drm/rockchip-inno-mipi-dphy.c
@@ -8,8 +8,6 @@
 #include <common.h>
 #include <errno.h>
 #include <malloc.h>
-#include <fdtdec.h>
-#include <fdt_support.h>
 #include <asm/unaligned.h>
 #include <asm/io.h>
 #include <linux/list.h>
@@ -125,7 +123,7 @@ struct inno_mipi_dphy_timing {
 
 struct inno_mipi_dphy {
 	const void *blob;
-	int node;
+	ofnode node;
 	u32 regs;
 
 	unsigned int lane_mbps;
@@ -507,7 +505,7 @@ static unsigned long inno_mipi_dphy_set_pll(struct display_state *state,
 	fin = 24000000;
 	fout = inno_mipi_dphy_pll_round_rate(fin, rate, &prediv, &fbdiv);
 
-	printf("%s: fin=%lu, fout=%lu, prediv=%u, fbdiv=%u\n",
+	debug("%s: fin=%lu, fout=%lu, prediv=%u, fbdiv=%u\n",
 	       __func__, fin, fout, prediv, fbdiv);
 
 	m = FBDIV_HI_MASK | PREDIV_MASK;
@@ -523,16 +521,15 @@ static unsigned long inno_mipi_dphy_set_pll(struct display_state *state,
 	return fout;
 }
 
-static int inno_mipi_dphy_parse_dt(int panel_node, struct inno_mipi_dphy *inno)
+static int inno_mipi_dphy_parse_dt(ofnode panel_node, struct inno_mipi_dphy *inno)
 {
-	const void *blob = inno->blob;
 	int format;
 
-	inno->lanes = fdtdec_get_int(blob, panel_node, "dsi,lanes", -1);
+	inno->lanes = ofnode_read_s32_default(panel_node, "dsi,lanes", -1);
 	if (inno->lanes < 0)
 		inno->lanes = 4;
 
-	format = fdtdec_get_int(blob, panel_node, "dsi,format", -1);
+	format = ofnode_read_s32_default(panel_node, "dsi,format", -1);
 	inno->bpp = mipi_dsi_pixel_format_to_bpp(format);
 	if (inno->bpp < 0)
 		inno->bpp = 24;
@@ -545,8 +542,8 @@ static int inno_mipi_dphy_init(struct display_state *state)
 	const void *blob = state->blob;
 	struct connector_state *conn_state = &state->conn_state;
 	struct panel_state *panel_state = &state->panel_state;
-	int node = conn_state->phy_node;
-	int panel_node = panel_state->node;
+	ofnode node = conn_state->phy_node;
+	ofnode panel_node = panel_state->node;
 	struct inno_mipi_dphy *inno;
 	int ret;
 
@@ -563,8 +560,7 @@ static int inno_mipi_dphy_init(struct display_state *state)
 		return ret;
 	}
 
-	inno->regs = fdtdec_get_addr_size_auto_noparent(blob, node, "reg",
-							0, NULL, false);
+	inno->regs = (u32)ofnode_get_addr(node);
 	if (inno->regs == FDT_ADDR_T_NONE) {
 		printf("%s: failed to get mipi phy address\n", __func__);
 		return -ENOMEM;
diff --git a/drivers/video/drm/rockchip_analogix_dp.c b/drivers/video/drm/rockchip_analogix_dp.c
index 2ba56fce84..da7b1a0495 100644
--- a/drivers/video/drm/rockchip_analogix_dp.c
+++ b/drivers/video/drm/rockchip_analogix_dp.c
@@ -8,8 +8,6 @@
 #include <common.h>
 #include <errno.h>
 #include <malloc.h>
-#include <fdtdec.h>
-#include <fdt_support.h>
 #include <asm/unaligned.h>
 #include <asm/io.h>
 #include <dm/device.h>
@@ -856,8 +854,7 @@ static int rockchip_analogix_dp_init(struct display_state *state)
 	plat_data = malloc(sizeof(*pdata));
 	if (!plat_data)
 		return -ENOMEM;
-	dp->reg_base = (void *)fdtdec_get_addr_size_auto_noparent(state->blob,
-						dp_node, "reg", 0, NULL, false);
+	dp->reg_base = dev_read_addr_ptr(conn_state->dev);
 	dp->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 	if (dp->grf <= 0) {
 		printf("%s: Get syscon grf failed (ret=%p)\n",
diff --git a/drivers/video/drm/rockchip_analogix_dp_reg.c b/drivers/video/drm/rockchip_analogix_dp_reg.c
index 7e6c638972..4cdcdfd0ab 100644
--- a/drivers/video/drm/rockchip_analogix_dp_reg.c
+++ b/drivers/video/drm/rockchip_analogix_dp_reg.c
@@ -15,8 +15,6 @@
 #include <common.h>
 #include <errno.h>
 #include <malloc.h>
-#include <fdtdec.h>
-#include <fdt_support.h>
 #include <asm/unaligned.h>
 #include <linux/list.h>
 #include <dm/device.h>
diff --git a/drivers/video/drm/rockchip_crtc.c b/drivers/video/drm/rockchip_crtc.c
index 03118acc75..45d827a9ab 100644
--- a/drivers/video/drm/rockchip_crtc.c
+++ b/drivers/video/drm/rockchip_crtc.c
@@ -8,8 +8,6 @@
 #include <common.h>
 #include <errno.h>
 #include <malloc.h>
-#include <fdtdec.h>
-#include <fdt_support.h>
 #include <asm/unaligned.h>
 #include <linux/list.h>
 #include <dm/device.h>
diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 473e139118..c3dde0ff86 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -27,6 +27,9 @@
 #include "rockchip_connector.h"
 #include "rockchip_phy.h"
 #include "rockchip_panel.h"
+#include <dm.h>
+#include <dm/of_access.h>
+#include <dm/ofnode.h>
 
 #define RK_BLK_SIZE 512
 
@@ -71,68 +74,61 @@ static bool can_direct_logo(int bpp)
 	return bpp == 24 || bpp == 32;
 }
 
-static struct udevice *find_panel_device_by_node(const void *blob,
-						 int panel_node)
-{
-	struct udevice *dev;
-	int ret;
-
-	ret = uclass_find_device_by_of_offset(UCLASS_PANEL, panel_node, &dev);
-	if (ret) {
-		printf("Warn: %s: can't find panel driver\n",
-		       fdt_get_name(blob, panel_node, NULL));
-		return NULL;
-	}
 
-	return dev;
-}
-
-static struct udevice *get_panel_device(struct display_state *state, int conn_node)
+static struct udevice *get_panel_device(struct display_state *state, ofnode conn_node)
 {
 	struct panel_state *panel_state = &state->panel_state;
-	const void *blob = state->blob;
-	int panel, ports, port, ep, remote, ph, nodedepth;
 	struct udevice *dev;
+	struct connector_state *conn_state = &state->conn_state;
+	ofnode node, ports_node, port_node;
+	struct device_node *port, *panel, *ep;
+	int ph;
+	int ret;
 
-	panel = fdt_subnode_offset(blob, conn_node, "panel");
-	if (panel > 0 && fdt_device_is_available(blob, panel)) {
-		dev = find_panel_device_by_node(blob, panel);
-		if (dev) {
-			panel_state->node = panel;
+	node = dev_read_subnode(conn_state->dev, "panel");
+	if (ofnode_valid(node) &&
+	    of_device_is_available(ofnode_to_np(node))){
+		ret = uclass_get_device_by_ofnode(UCLASS_PANEL, node, &dev);
+		if(!ret) {
+			printf("%s get panel dev\n", __func__);
+			panel_state->node = node;
 			return dev;
 		}
 	}
 
-	ports = fdt_subnode_offset(blob, conn_node, "ports");
-	if (ports < 0)
+	/* TODO: this path not tested */
+	ports_node = dev_read_subnode(conn_state->dev, "ports");
+	if (!ofnode_valid(ports_node))
 		return NULL;
 
-	fdt_for_each_subnode(port, blob, ports) {
-		fdt_for_each_subnode(ep, blob, port) {
-			ph = fdt_getprop_u32_default_node(blob, ep, 0,
-							  "remote-endpoint", 0);
+	ofnode_for_each_subnode(port_node, ports_node) {
+		ofnode_for_each_subnode(node, port_node) {
+			ph = ofnode_read_u32_default(node, "remote-endpoint", -1);
 			if (!ph)
 				continue;
-
-			remote = fdt_node_offset_by_phandle(blob, ph);
-
-			nodedepth = fdt_node_depth(blob, remote);
-			if (nodedepth < 2)
+			ep = of_find_node_by_phandle(ph);
+			if (!ofnode_valid(np_to_ofnode(ep))) {
+				printf("Warn: can't find endpoint from phdl\n");
 				continue;
-
-			panel = fdt_supernode_atdepth_offset(blob, remote,
-							     nodedepth - 2,
-							     NULL);
-			if (!fdt_device_is_available(blob, panel)) {
-				debug("[%s]: panel is disabled\n",
-				      fdt_get_name(blob, panel, NULL));
+			}
+			port = of_get_parent(ep);
+			if (!ofnode_valid(np_to_ofnode(port))) {
+				printf("Warn: can't find port node\n");
 				continue;
 			}
-			dev = find_panel_device_by_node(blob, panel);
-			if (dev) {
-				panel_state->node = panel;
-				return dev;
+			panel = of_get_parent(port);
+			if (!ofnode_valid(np_to_ofnode(panel))) {
+				printf("Warn: can't find panel node\n");
+				continue;
+			}
+			ret = uclass_get_device_by_ofnode(UCLASS_PANEL,
+							  np_to_ofnode(panel),
+							  &dev);
+			if (ret) {
+				printf("Warn: can't find crtc driver\n");
+				continue;
 			}
+			return dev;
 		}
 	}
 
@@ -142,28 +138,14 @@ static struct udevice *get_panel_device(struct display_state *state, int conn_no
 static int connector_phy_init(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
-	int conn_node = conn_state->node;
-	const void *blob = state->blob;
 	const struct rockchip_phy *phy;
-	int phy_node, phandle;
 	struct udevice *dev;
 	int ret;
 
-	phandle = fdt_getprop_u32_default_node(blob, conn_node, 0,
-					       "phys", -1);
-	if (phandle < 0)
-		return 0;
-
-	phy_node = fdt_node_offset_by_phandle(blob, phandle);
-	if (phy_node < 0) {
-		printf("failed to find phy node\n");
-		return phy_node;
-	}
-
-	ret = uclass_find_device_by_of_offset(UCLASS_PHY, phy_node, &dev);
+	ret = uclass_get_device_by_phandle(UCLASS_PHY, conn_state->dev, "phys",
+					   &dev);
 	if (ret) {
-		printf("Warn: %s: can't find phy driver\n",
-		       fdt_get_name(blob, phy_node, NULL));
+		printf("Warn: can't find phy driver\n");
 		return ret;
 	}
 	phy = (const struct rockchip_phy *)dev_get_driver_data(dev);
@@ -173,7 +155,7 @@ static int connector_phy_init(struct display_state *state)
 	}
 
 	conn_state->phy_dev = dev;
-	conn_state->phy_node = phy_node;
+	conn_state->phy_node = dev->node;
 
 	if (!phy->funcs || !phy->funcs->init ||
 	    phy->funcs->init(state)) {
@@ -190,10 +172,9 @@ static int connector_panel_init(struct display_state *state)
 	struct connector_state *conn_state = &state->conn_state;
 	struct panel_state *panel_state = &state->panel_state;
 	struct udevice *dev;
-	const void *blob = state->blob;
-	int conn_node = conn_state->node;
+	ofnode conn_node = conn_state->node;
 	const struct rockchip_panel *panel;
-	int dsp_lut_node;
+	ofnode dsp_lut_node;
 	int ret, len;
 
 	dm_scan_fdt_dev(conn_state->dev);
@@ -217,19 +198,22 @@ static int connector_panel_init(struct display_state *state)
 		printf("failed to init panel driver\n");
 		return ret;
 	}
-
-	dsp_lut_node = fdt_subnode_offset(blob, panel_state->node, "dsp-lut");
-	fdt_getprop(blob, dsp_lut_node, "gamma-lut", &len);
+	dsp_lut_node = dev_read_subnode(dev, "dsp-lut");
+	if (!ofnode_valid(dsp_lut_node)) {
+		printf("%s can not find dsp-lut node\n", __func__);
+	}
+	ofnode_get_property(dsp_lut_node, "gamma-lut", &len);
 	if (len > 0) {
-		conn_state->gamma.size  = len / sizeof(u32);
+		conn_state->gamma.size = len / sizeof(u32);
 		conn_state->gamma.lut = malloc(len);
 		if (!conn_state->gamma.lut) {
 			printf("malloc gamma lut failed\n");
 			return -ENOMEM;
 		}
-		if (fdtdec_get_int_array(blob, dsp_lut_node, "gamma-lut",
-					 conn_state->gamma.lut,
-					 conn_state->gamma.size)) {
+		ret = ofnode_read_u32_array(dsp_lut_node, "gamma-lut",
+					    conn_state->gamma.lut,
+					    conn_state->gamma.size);
+		if (ret) {
 			printf("Cannot decode gamma_lut\n");
 			conn_state->gamma.lut = NULL;
 			return -EINVAL;
@@ -266,32 +250,32 @@ int drm_mode_vrefresh(const struct drm_display_mode *mode)
 	return refresh;
 }
 
-static int display_get_timing_from_dts(int panel, const void *blob,
+static int display_get_timing_from_dts(struct panel_state *panel_state,
 				       struct drm_display_mode *mode)
 {
-	int timing, phandle, native_mode;
+	int phandle;
 	int hactive, vactive, pixelclock;
 	int hfront_porch, hback_porch, hsync_len;
 	int vfront_porch, vback_porch, vsync_len;
 	int val, flags = 0;
+	ofnode timing, native_mode;
 
-	timing = fdt_subnode_offset(blob, panel, "display-timings");
-	if (timing < 0)
+	timing = dev_read_subnode(panel_state->dev, "display-timings");
+	if (!ofnode_valid(timing))
 		return -ENODEV;
 
-	native_mode = fdt_subnode_offset(blob, timing, "timing");
-	if (native_mode < 0) {
-		phandle = fdt_getprop_u32_default_node(blob, timing, 0,
-						       "native-mode", -1);
-		native_mode = fdt_node_offset_by_phandle_node(blob, timing, phandle);
-		if (native_mode <= 0) {
+	native_mode = ofnode_find_subnode(timing, "timing");
+	if (!ofnode_valid(native_mode)) {
+		phandle = ofnode_read_u32_default(timing, "native-mode", -1);
+		native_mode = np_to_ofnode(of_find_node_by_phandle(phandle));
+		if (!ofnode_valid(native_mode)) {
 			printf("failed to get display timings from DT\n");
 			return -ENXIO;
 		}
 	}
 
 #define FDT_GET_INT(val, name) \
-	val = fdtdec_get_int(blob, native_mode, name, -1); \
+	val = ofnode_read_s32_default(native_mode, name, -1); \
 	if (val < 0) { \
 		printf("Can't get %s\n", name); \
 		return -ENXIO; \
@@ -334,11 +318,10 @@ static int display_get_timing(struct display_state *state)
 	const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
 	struct drm_display_mode *mode = &conn_state->mode;
 	const struct drm_display_mode *m;
-	const void *blob = state->blob;
 	struct panel_state *panel_state = &state->panel_state;
-	int panel = panel_state->node;
+	ofnode panel = panel_state->node;
 
-	if (panel > 0 && !display_get_timing_from_dts(panel, blob, mode)) {
+	if (ofnode_valid(panel) && !display_get_timing_from_dts(panel_state, mode)) {
 		printf("Using display timing dts\n");
 		goto done;
 	}
@@ -619,18 +602,17 @@ static int display_logo(struct display_state *state)
 	return 0;
 }
 
-static int get_crtc_id(const void *blob, int connect)
+static int get_crtc_id(ofnode connect)
 {
-	int phandle, remote;
+	int phandle;
+	struct device_node *remote;
 	int val;
 
-	phandle = fdt_getprop_u32_default_node(blob, connect, 0,
-					       "remote-endpoint", -1);
+	phandle = ofnode_read_u32_default(connect, "remote-endpoint", -1);
 	if (phandle < 0)
 		goto err;
-	remote = fdt_node_offset_by_phandle(blob, phandle);
-
-	val = fdtdec_get_int(blob, remote, "reg", -1);
+	remote = of_find_node_by_phandle(phandle);
+	val = ofnode_read_u32_default(np_to_ofnode(remote), "reg", -1);
 	if (val < 0)
 		goto err;
 
@@ -640,31 +622,6 @@ err:
 	return 0;
 }
 
-static int find_crtc_node(const void *blob, int node)
-{
-	int nodedepth = fdt_node_depth(blob, node);
-
-	if (nodedepth < 2)
-		return -EINVAL;
-
-	return fdt_supernode_atdepth_offset(blob, node,
-					    nodedepth - 2, NULL);
-}
-
-static int find_connector_node(const void *blob, int node)
-{
-	int phandle, remote;
-	int nodedepth;
-
-	phandle = fdt_getprop_u32_default_node(blob, node, 0,
-					       "remote-endpoint", -1);
-	remote = fdt_node_offset_by_phandle(blob, phandle);
-	nodedepth = fdt_node_depth(blob, remote);
-
-	return fdt_supernode_atdepth_offset(blob, remote,
-					    nodedepth - 3, NULL);
-}
-
 struct rockchip_logo_cache *find_or_alloc_logo_cache(const char *bmp)
 {
 	struct rockchip_logo_cache *tmp, *logo_cache = NULL;
@@ -841,73 +798,76 @@ static int rockchip_display_probe(struct udevice *dev)
 	struct video_priv *uc_priv = dev_get_uclass_priv(dev);
 	struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
 	const void *blob = gd->fdt_blob;
-	int route, child, phandle, connect, crtc_node, conn_node;
+	int phandle;
 	struct udevice *crtc_dev, *conn_dev;
 	const struct rockchip_crtc *crtc;
 	const struct rockchip_connector *conn;
 	struct display_state *s;
 	const char *name;
 	int ret;
+	ofnode node, route_node;
+	struct device_node *port_node, *vop_node, *ep_node;
+	struct device_node *cnt_node, *p;
 
 	/* Before relocation we don't need to do anything */
 	if (!(gd->flags & GD_FLG_RELOC))
 		return 0;
-
-	route = fdt_path_offset(blob, "/display-subsystem/route");
-	if (route < 0) {
-		printf("Can't find display display route node\n");
-		return -ENODEV;
-	}
-
-	if (!fdt_device_is_available(blob, route))
-		return -ENODEV;
-
 	init_display_buffer(plat->base);
 
-	fdt_for_each_subnode(child, blob, route) {
-		if (!fdt_device_is_available(blob, child))
-			continue;
+	route_node = dev_read_subnode(dev, "route");
+	if (!ofnode_valid(route_node))
+		return -ENODEV;
 
-		phandle = fdt_getprop_u32_default_node(blob, child, 0,
-						       "connect", -1);
+	ofnode_for_each_subnode(node, route_node){
+		phandle = ofnode_read_u32_default(node, "connect", -1);
 		if (phandle < 0) {
-			printf("Warn: %s: can't find connect node's handle\n",
-			       fdt_get_name(blob, child, NULL));
+			printf("Warn: can't find connect node's handle\n");
 			continue;
 		}
-
-		connect = fdt_node_offset_by_phandle(blob, phandle);
-		if (connect < 0) {
-			printf("Warn: %s: can't find connect node\n",
-			       fdt_get_name(blob, child, NULL));
+		ep_node = of_find_node_by_phandle(phandle);
+		if (!ofnode_valid(np_to_ofnode(ep_node))) {
+			printf("Warn: can't find endpoint node from phandle\n");
 			continue;
 		}
-
-		crtc_node = find_crtc_node(blob, connect);
-		if (!fdt_device_is_available(blob, crtc_node)) {
-			printf("Warn: %s: crtc node is not available\n",
-			       fdt_get_name(blob, child, NULL));
+		port_node = of_get_parent(ep_node);
+		if (!ofnode_valid(np_to_ofnode(port_node))) {
+			printf("Warn: can't find port node from phandle\n");
 			continue;
 		}
-		ret = uclass_find_device_by_of_offset(UCLASS_VIDEO_CRTC, crtc_node, &crtc_dev);
+		vop_node = of_get_parent(port_node);
+		if (!ofnode_valid(np_to_ofnode(vop_node))) {
+			printf("Warn: can't find crtc node from phandle\n");
+			continue;
+		}
+		ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_CRTC,
+						  np_to_ofnode(vop_node),
+						  &crtc_dev);
 		if (ret) {
-			printf("Warn: %s: can't find crtc driver\n",
-			       fdt_get_name(blob, child, NULL));
+			printf("Warn: can't find crtc driver\n");
 			continue;
 		}
-
 		crtc = (const struct rockchip_crtc *)dev_get_driver_data(crtc_dev);
 
-		conn_node = find_connector_node(blob, connect);
-		if (!fdt_device_is_available(blob, conn_node)) {
-			printf("Warn: %s: connector node is not available\n",
-			       fdt_get_name(blob, child, NULL));
+		phandle = ofnode_read_u32_default(np_to_ofnode(ep_node),
+						  "remote-endpoint", -1);
+		cnt_node = of_find_node_by_phandle(phandle);
+		if (phandle < 0) {
+			printf("Warn: can't find remote-endpoint's handle\n");
 			continue;
 		}
-		ret = uclass_get_device_by_of_offset(UCLASS_DISPLAY, conn_node, &conn_dev);
+		while (cnt_node->parent){
+			p = of_get_parent(cnt_node);
+			if (!strcmp(p->full_name, "/"))
+				break;
+			cnt_node = p;
+		}
+		if (!of_device_is_available(cnt_node))
+			continue;
+		ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY,
+						  np_to_ofnode(cnt_node),
+						  &conn_dev);
 		if (ret) {
-			printf("Warn: %s: can't find connector driver\n",
-			       fdt_get_name(blob, child, NULL));
+			printf("Warn: can't find connect driver\n");
 			continue;
 		}
 		conn = (const struct rockchip_connector *)dev_get_driver_data(conn_dev);
@@ -919,43 +879,42 @@ static int rockchip_display_probe(struct udevice *dev)
 		memset(s, 0, sizeof(*s));
 
 		INIT_LIST_HEAD(&s->head);
-		s->ulogo_name = fdt_stringlist_get(blob, child, "logo,uboot", 0, NULL);
-		s->klogo_name = fdt_stringlist_get(blob, child, "logo,kernel", 0, NULL);
-		name = fdt_stringlist_get(blob, child, "logo,mode", 0, NULL);
+		ret = ofnode_read_string_index(node, "logo,uboot", 0, &s->ulogo_name);
+		ret = ofnode_read_string_index(node, "logo,kernel", 0, &s->klogo_name);
+		ret = ofnode_read_string_index(node, "logo,mode", 0, &name);
 		if (!strcmp(name, "fullscreen"))
 			s->logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN;
 		else
 			s->logo_mode = ROCKCHIP_DISPLAY_CENTER;
-		name = fdt_stringlist_get(blob, child, "charge_logo,mode", 0, NULL);
+		ret = ofnode_read_string_index(node, "charge_logo,mode", 0, &name);
 		if (!strcmp(name, "fullscreen"))
 			s->charge_logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN;
 		else
 			s->charge_logo_mode = ROCKCHIP_DISPLAY_CENTER;
 
 		s->blob = blob;
-		s->conn_state.node = conn_node;
+		s->conn_state.node = np_to_ofnode(cnt_node);
 		s->conn_state.dev = conn_dev;
 		s->conn_state.connector = conn;
-		s->crtc_state.node = crtc_node;
+		s->crtc_state.node = np_to_ofnode(vop_node);
 		s->crtc_state.dev = crtc_dev;
 		s->crtc_state.crtc = crtc;
-		s->crtc_state.crtc_id = get_crtc_id(blob, connect);
-		s->node = child;
+		s->crtc_state.crtc_id = get_crtc_id(np_to_ofnode(ep_node));
+		s->node = node;
 
-		if (connector_phy_init(s)) {
-			printf("Warn: %s: Failed to init phy drivers\n",
-			       fdt_get_name(blob, child, NULL));
+		if (connector_panel_init(s)) {
+			printf("Warn: Failed to init panel drivers\n");
 			free(s);
 			continue;
 		}
 
-		if (connector_panel_init(s)) {
-			printf("Warn: %s: Failed to init panel drivers\n",
-			       fdt_get_name(blob, child, NULL));
+		if (connector_phy_init(s)) {
+			printf("Warn: Failed to init phy drivers\n");
 			free(s);
 			continue;
 		}
 		list_add_tail(&s->head, &rockchip_display_list);
+
 	}
 
 	if (list_empty(&rockchip_display_list)) {
diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index d1826da186..0ddab1c355 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -10,6 +10,7 @@
 #include <bmp_layout.h>
 #include <drm_modes.h>
 #include <edid.h>
+#include <dm/ofnode.h>
 
 #define ROCKCHIP_OUTPUT_DSI_DUAL_CHANNEL	BIT(0)
 #define ROCKCHIP_OUTPUT_DSI_DUAL_LINK		BIT(1)
@@ -41,7 +42,7 @@ struct crtc_state {
 	struct udevice *dev;
 	const struct rockchip_crtc *crtc;
 	void *private;
-	int node;
+	ofnode node;
 	int crtc_id;
 
 	int format;
@@ -61,8 +62,8 @@ struct crtc_state {
 
 struct panel_state {
 	struct udevice *dev;
-	int node;
-	int dsp_lut_node;
+	ofnode node;
+	ofnode dsp_lut_node;
 
 	const struct rockchip_panel *panel;
 	void *private;
@@ -73,8 +74,8 @@ struct connector_state {
 	const struct rockchip_connector *connector;
 	struct udevice *phy_dev;
 	const struct rockchip_phy *phy;
-	int node;
-	int phy_node;
+	ofnode node;
+	ofnode phy_node;
 
 	void *private;
 	void *phy_private;
@@ -112,7 +113,7 @@ struct display_state {
 	struct list_head head;
 
 	const void *blob;
-	int node;
+	ofnode node;
 
 	struct crtc_state crtc_state;
 	struct connector_state conn_state;
diff --git a/drivers/video/drm/rockchip_dsi_panel.c b/drivers/video/drm/rockchip_dsi_panel.c
index fed1fbc5fb..95ffa3238e 100755
--- a/drivers/video/drm/rockchip_dsi_panel.c
+++ b/drivers/video/drm/rockchip_dsi_panel.c
@@ -8,8 +8,6 @@
 #include <common.h>
 #include <errno.h>
 #include <malloc.h>
-#include <fdtdec.h>
-#include <fdt_support.h>
 #include <asm/unaligned.h>
 #include <linux/list.h>
 #include <linux/media-bus-format.h>
@@ -51,7 +49,7 @@ struct dsi_panel_cmds {
 struct rockchip_dsi_panel {
 	struct udevice *dev;
 	const void *blob;
-	int node;
+	ofnode node;
 
 	int bus_format;
 
@@ -72,7 +70,7 @@ struct rockchip_dsi_panel {
 	struct dsi_panel_cmds *off_cmds;
 };
 
-static int rockchip_dsi_panel_parse_cmds(const void *blob, int node,
+static int rockchip_dsi_panel_parse_cmds(ofnode node,
 					 const u8 *data, int blen,
 					 struct dsi_panel_cmds *pcmds)
 {
@@ -263,27 +261,27 @@ static int rockchip_dsi_panel_disable(struct display_state *state)
 	return 0;
 }
 
-static int rockchip_dsi_panel_parse_dt(const void *blob, int node, struct rockchip_dsi_panel *panel)
+static int rockchip_dsi_panel_parse_dt(ofnode node, struct rockchip_dsi_panel *panel)
 {
 	const void *data;
 	int len = 0;
 	int ret = 0;
 
-	panel->delay_prepare = fdtdec_get_int(blob, node, "prepare-delay-ms", 0);
-	panel->delay_unprepare = fdtdec_get_int(blob, node, "unprepare-delay-ms", 0);
-	panel->delay_enable = fdtdec_get_int(blob, node, "enable-delay-ms", 0);
-	panel->delay_disable = fdtdec_get_int(blob, node, "disable-delay-ms", 0);
-	panel->delay_init = fdtdec_get_int(blob, node, "init-delay-ms", 0);
-	panel->delay_reset = fdtdec_get_int(blob, node, "reset-delay-ms", 0);
-	panel->bus_format = fdtdec_get_int(blob, node, "bus-format", MEDIA_BUS_FMT_RBG888_1X24);
+	panel->delay_prepare = ofnode_read_u32_default(node, "prepare-delay-ms", 0);
+	panel->delay_unprepare = ofnode_read_u32_default(node, "unprepare-delay-ms", 0);
+	panel->delay_enable = ofnode_read_u32_default(node, "enable-delay-ms", 0);
+	panel->delay_disable = ofnode_read_u32_default(node, "disable-delay-ms", 0);
+	panel->delay_init = ofnode_read_u32_default(node, "init-delay-ms", 0);
+	panel->delay_reset = ofnode_read_u32_default(node, "reset-delay-ms", 0);
+	panel->bus_format = ofnode_read_u32_default(node, "bus-format", MEDIA_BUS_FMT_RBG888_1X24);
 
-	data = fdt_getprop(blob, node, "panel-init-sequence", &len);
+	data = ofnode_get_property(node, "panel-init-sequence", &len);
 	if (data) {
 		panel->on_cmds = malloc(sizeof(*panel->on_cmds));
 		if (!panel->on_cmds)
 			return -ENOMEM;
 
-		ret = rockchip_dsi_panel_parse_cmds(blob, node, data, len,
+		ret = rockchip_dsi_panel_parse_cmds(node, data, len,
 						    panel->on_cmds);
 		if (ret) {
 			printf("failed to parse panel init sequence\n");
@@ -291,7 +289,7 @@ static int rockchip_dsi_panel_parse_dt(const void *blob, int node, struct rockch
 		}
 	}
 
-	data = fdt_getprop(blob, node, "panel-exit-sequence", &len);
+	data = ofnode_get_property(node, "panel-exit-sequence", &len);
 	if (data) {
 		panel->off_cmds = malloc(sizeof(*panel->off_cmds));
 		if (!panel->off_cmds) {
@@ -299,7 +297,7 @@ static int rockchip_dsi_panel_parse_dt(const void *blob, int node, struct rockch
 			goto free_on_cmds;
 		}
 
-		ret = rockchip_dsi_panel_parse_cmds(blob, node, data, len,
+		ret = rockchip_dsi_panel_parse_cmds(node, data, len,
 						    panel->off_cmds);
 		if (ret) {
 			printf("failed to parse panel exit sequence\n");
@@ -338,7 +336,7 @@ static int rockchip_dsi_panel_parse_dt(const void *blob, int node, struct rockch
 		return ret;
 	}
 
-	panel->power_invert = !!fdtdec_get_int(blob, node, "power_invert", 0);
+	panel->power_invert = !!ofnode_read_u32_default(node, "power_invert", 0);
 
 	/* keep panel blank on init. */
 	dm_gpio_set_value(&panel->enable, 0);
@@ -358,7 +356,7 @@ static int rockchip_dsi_panel_init(struct display_state *state)
 	const void *blob = state->blob;
 	struct connector_state *conn_state = &state->conn_state;
 	struct panel_state *panel_state = &state->panel_state;
-	int node = panel_state->node;
+	ofnode node = panel_state->node;
 	struct rockchip_dsi_panel *panel;
 	int ret;
 
@@ -373,7 +371,7 @@ static int rockchip_dsi_panel_init(struct display_state *state)
 	panel->dev = panel_state->dev;
 	panel_state->private = panel;
 
-	ret = rockchip_dsi_panel_parse_dt(blob, node, panel);
+	ret = rockchip_dsi_panel_parse_dt(node, panel);
 	if (ret) {
 		printf("%s: failed to parse DT\n", __func__);
 		free(panel);
diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index 48cb756f13..ce8004233b 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -8,8 +8,6 @@
 #include <common.h>
 #include <errno.h>
 #include <malloc.h>
-#include <fdtdec.h>
-#include <fdt_support.h>
 #include <asm/unaligned.h>
 #include <linux/list.h>
 #include <asm/io.h>
@@ -515,6 +513,7 @@ static int rockchip_lvds_init(struct display_state *state)
 	struct fdt_resource lvds_phy, lvds_ctrl;
 	struct panel_state *panel_state = &state->panel_state;
 	int panel_node = panel_state->node;
+	int ret;
 
 	lvds = malloc(sizeof(*lvds));
 	if (!lvds)
@@ -522,19 +521,16 @@ static int rockchip_lvds_init(struct display_state *state)
 	lvds->pdata = pdata;
 
 	if (pdata->chip_type == RK3288_LVDS) {
-		lvds->regbase = (void *)fdtdec_get_addr_size_auto_noparent(state->blob,
-						lvds_node, "reg", 0, NULL, false);
+		lvds->regbase = dev_read_addr_ptr(conn_state->dev);
 	} else {
-		i = fdt_get_named_resource(state->blob, lvds_node, "reg", "reg-names",
-					   "mipi_lvds_phy", &lvds_phy);
+		i = dev_read_resource_byname(conn_state->dev, "mipi_lvds_phy", &lvds_phy);
 		if (i) {
 			printf("can't get regs lvds_phy addresses!\n");
 			free(lvds);
 			return -ENOMEM;
 		}
 
-		i = fdt_get_named_resource(state->blob, lvds_node, "reg", "reg-names",
-					   "mipi_lvds_ctl", &lvds_ctrl);
+		i = dev_read_resource_byname(conn_state->dev, "mipi_lvds_ctl", &lvds_ctrl);
 		if (i) {
 			printf("can't get regs lvds_ctrl addresses!\n");
 			free(lvds);
@@ -544,7 +540,7 @@ static int rockchip_lvds_init(struct display_state *state)
 		lvds->regbase = (void *)lvds_phy.start;
 		lvds->ctrl_reg = (void *)lvds_ctrl.start;
 	}
-
+	printf("%s regbase %p\n", __func__, lvds->regbase);
 	lvds->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 	if (lvds->grf <= 0) {
 		printf("%s: Get syscon grf failed (ret=%p)\n",
@@ -552,8 +548,8 @@ static int rockchip_lvds_init(struct display_state *state)
 		return  -ENXIO;
 	}
 
-	name = fdt_stringlist_get(state->blob, panel_node, "rockchip,output", 0, NULL);
-	if (!name)
+	ret = dev_read_string_index(panel_state->dev, "rockchip,output", 0, &name);
+	if (ret)
 		/* default set it as output rgb */
 		lvds->output = DISPLAY_OUTPUT_RGB;
 	else
@@ -563,8 +559,8 @@ static int rockchip_lvds_init(struct display_state *state)
 		free(lvds);
 		return lvds->output;
 	}
-	name = fdt_stringlist_get(state->blob, panel_node, "rockchip,data-mapping", 0, NULL);
-	if (!name)
+	ret = dev_read_string_index(panel_state->dev, "rockchip,data-mapping", 0, &name);
+	if (ret)
 		/* default set it as format jeida */
 		lvds->format = LVDS_FORMAT_JEIDA;
 	else
@@ -575,7 +571,7 @@ static int rockchip_lvds_init(struct display_state *state)
 		free(lvds);
 		return lvds->format;
 	}
-	width = fdtdec_get_int(state->blob, panel_node, "rockchip,data-width", 24);
+	width = ofnode_read_u32_default(panel_node, "rockchip,data-width", 24);
 	if (width == 24) {
 		lvds->format |= LVDS_24BIT;
 	} else if (width == 18) {
diff --git a/drivers/video/drm/rockchip_mipi_dsi.c b/drivers/video/drm/rockchip_mipi_dsi.c
index c07d385ffa..e2bba46a34 100644
--- a/drivers/video/drm/rockchip_mipi_dsi.c
+++ b/drivers/video/drm/rockchip_mipi_dsi.c
@@ -8,8 +8,6 @@
 #include <common.h>
 #include <errno.h>
 #include <malloc.h>
-#include <fdtdec.h>
-#include <fdt_support.h>
 #include <asm/unaligned.h>
 #include <linux/list.h>
 
diff --git a/drivers/video/drm/rockchip_panel.c b/drivers/video/drm/rockchip_panel.c
index b69e263af4..5e0e85d7e1 100644
--- a/drivers/video/drm/rockchip_panel.c
+++ b/drivers/video/drm/rockchip_panel.c
@@ -9,8 +9,6 @@
 #include <common.h>
 #include <errno.h>
 #include <dm/device.h>
-#include <fdtdec.h>
-#include <fdt_support.h>
 
 #include "rockchip_display.h"
 #include "rockchip_crtc.h"
diff --git a/drivers/video/drm/rockchip_phy.c b/drivers/video/drm/rockchip_phy.c
index 2c7f146953..d1dbe05f81 100644
--- a/drivers/video/drm/rockchip_phy.c
+++ b/drivers/video/drm/rockchip_phy.c
@@ -8,8 +8,6 @@
 #include <common.h>
 #include <dm/device.h>
 #include <errno.h>
-#include <fdtdec.h>
-#include <fdt_support.h>
 #include <asm/unaligned.h>
 #include <linux/list.h>
 
diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index 7518e8c14d..8ad5c0c005 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -17,6 +17,8 @@
 #include <clk.h>
 #include <asm/arch/clock.h>
 #include <linux/err.h>
+#include <dm/device.h>
+#include <dm/read.h>
 
 #include "rockchip_display.h"
 #include "rockchip_crtc.h"
@@ -33,7 +35,6 @@ static int rockchip_vop_init_gamma(struct vop *vop, struct display_state *state)
 	struct crtc_state *crtc_state = &state->crtc_state;
 	struct connector_state *conn_state = &state->conn_state;
 	u32 *lut = conn_state->gamma.lut;
-	int node = crtc_state->node;
 	fdt_size_t lut_size;
 	int i, lut_len;
 	u32 *lut_regs;
@@ -41,14 +42,12 @@ static int rockchip_vop_init_gamma(struct vop *vop, struct display_state *state)
 	if (!conn_state->gamma.lut)
 		return 0;
 
-	i = fdt_stringlist_search(state->blob, node, "reg-names", "gamma_lut");
+	i = dev_read_stringlist_search(crtc_state->dev, "reg-names", "gamma_lut");
 	if (i < 0) {
 		printf("Warning: vop not support gamma\n");
 		return 0;
 	}
-	lut_regs = (u32 *)fdtdec_get_addr_size_auto_noparent(state->blob,
-							     node, "reg", i,
-							     &lut_size, false);
+	lut_regs = (u32 *)dev_read_addr_size(crtc_state->dev, "reg", &lut_size);
 	if (lut_regs == (u32 *)FDT_ADDR_T_NONE) {
 		printf("failed to get gamma lut register\n");
 		return 0;
@@ -111,8 +110,7 @@ static int rockchip_vop_init(struct display_state *state)
 	memset(vop, 0, sizeof(*vop));
 
 	crtc_state->private = vop;
-	vop->regs = (void *)fdtdec_get_addr_size_auto_noparent(state->blob,
-					crtc_state->node, "reg", 0, NULL, false);
+	vop->regs = dev_read_addr_ptr(crtc_state->dev);
 	vop->regsbak = malloc(vop_data->reg_len);
 	vop->win = vop_data->win;
 	vop->win_offset = vop_data->win_offset;
@@ -435,15 +433,15 @@ static int rockchip_vop_disable(struct display_state *state)
 
 static int rockchip_vop_fixup_dts(struct display_state *state, void *blob)
 {
+#if 0
 	struct crtc_state *crtc_state = &state->crtc_state;
 	struct panel_state *pstate = &state->panel_state;
 	uint32_t phandle;
 	char path[100];
 	int ret, dsp_lut_node;
 
-	if (!pstate->dsp_lut_node)
+	if (!ofnode_valid(pstate->dsp_lut_node))
 		return 0;
-
 	ret = fdt_get_path(state->blob, pstate->dsp_lut_node, path, sizeof(path));
 	if (ret < 0) {
 		printf("failed to get dsp_lut path[%s], ret=%d\n",
@@ -471,7 +469,7 @@ static int rockchip_vop_fixup_dts(struct display_state *state, void *blob)
 	}
 
 	do_fixup_by_path_u32(blob, path, "dsp-lut", phandle, 1);
-
+#endif
 	return 0;
 }
 
diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index c8730cf22c..057448c51c 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -8,8 +8,6 @@
 #include <common.h>
 #include <errno.h>
 #include <malloc.h>
-#include <fdtdec.h>
-#include <fdt_support.h>
 #include <asm/unaligned.h>
 #include <asm/io.h>
 #include <linux/list.h>

commit 3d29ee38ce97e85c997d1b78b606818af641194e
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Feb 6 21:58:38 2018 +0800

    rockchip: power: charge animation depends on DRM_ROCKCHIP
    
    charge animation need display provided by DRM_ROCKCHIP.
    
    Change-Id: I58113e81dd2899c969d1e748548a498eb04db550
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index d6fe1af5b3..febe58f6f4 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -77,7 +77,7 @@ endchoice
 
 config CHARGE_ANIMATION
 	bool "Enable charge animation"
-	depends on DM_CHARGE_DISPLAY && DM_FUEL_GAUGE
+	depends on DM_CHARGE_DISPLAY && DM_FUEL_GAUGE && DRM_ROCKCHIP
 	help
 	  This adds a simple function for charge animation display.
 

commit 9169f300ee9d4fc4c65407eb9a49534b7a1b9aab
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Feb 6 21:26:41 2018 +0800

    rockchip: pwm: convert to use live dt
    
    use live dt api to get base addr
    
    Change-Id: Ia01e6fa2ca08c336a1a767630460a956ff293c0b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/pwm/rk_pwm.c b/drivers/pwm/rk_pwm.c
index 2364c2dfdd..7d3e11d667 100644
--- a/drivers/pwm/rk_pwm.c
+++ b/drivers/pwm/rk_pwm.c
@@ -76,7 +76,7 @@ static int rk_pwm_ofdata_to_platdata(struct udevice *dev)
 {
 	struct rk_pwm_priv *priv = dev_get_priv(dev);
 
-	priv->regs = (struct rk3288_pwm *)devfdt_get_addr(dev);
+	priv->regs = (struct rk3288_pwm *)dev_read_addr(dev);
 
 	return 0;
 }

commit 2f37ae52b7fd7ebe19686a11465adbdcb89ebac1
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Feb 6 21:26:11 2018 +0800

    rockchip: video: fix compile warning
    
    Change-Id: I05dbb0cdc33f71f66feedad2033d702177b31ede
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c
index 79e9cc85d7..bef7ffea90 100644
--- a/drivers/video/video-uclass.c
+++ b/drivers/video/video-uclass.c
@@ -72,7 +72,9 @@ static ulong alloc_fb(struct udevice *dev, ulong *addrp)
 
 int video_reserve(ulong *addrp)
 {
+#ifndef CONFIG_DRM_ROCKCHIP
 	struct udevice *dev;
+#endif
 	ulong size;
 
 	gd->video_top = *addrp;

commit fb568ba04219580bdbbe656a65beab6d1f10ab9e
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Tue Feb 6 16:27:06 2018 +0800

    configs: rockchip: px30: enable rockusb and fastboot
    
    This commit adds rockusb and fastboot support for evb-px30 board.
    
    Change-Id: I0ce468a829a506f74123427c5ac3d0fe9162bcae
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 011f6b15c8..164fd2161b 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -33,6 +33,13 @@ CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_TPL_SERIAL_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_TPL_SERIAL_PRESENT=y
+CONFIG_FASTBOOT=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_CMD_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x800800
+CONFIG_FASTBOOT_BUF_SIZE=0x08000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
 CONFIG_CMD_LOAD_ANDROID=y
@@ -69,6 +76,13 @@ CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
 CONFIG_SPL_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x330d
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index f6cb4f0b95..657c5d4db4 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -45,6 +45,10 @@
 
 #ifndef CONFIG_SPL_BUILD
 
+/* usb mass storage */
+#define CONFIG_USB_FUNCTION_MASS_STORAGE
+#define CONFIG_ROCKUSB_G_DNL_PID        0x330d
+
 #define ENV_MEM_LAYOUT_SETTINGS \
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \

commit f67f522b54c0b5a249daa34aa63d01988a785ccd
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Mon Feb 5 23:02:00 2018 +0800

    rockchip: clk: px30: Add support for i2c, pwm, spi and saradc
    
    Change-Id: I81e1bf5776952da62dcdc7fdf58587ba0ddf20ae
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_px30.h b/arch/arm/include/asm/arch-rockchip/cru_px30.h
index 883cec0b79..088017d50d 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_px30.h
@@ -235,6 +235,46 @@ enum {
 	UART2_DIVNP5_SHIFT	= 0,
 	UART2_DIVNP5_MASK	= 0x1f << UART2_DIVNP5_SHIFT,
 
+	/* CRU_CLK_SEL49_CON */
+	CLK_I2C_PLL_SEL_GPLL		= 0,
+	CLK_I2C_PLL_SEL_24M,
+	CLK_I2C_DIV_CON_MASK		= 0x7f,
+	CLK_I2C_PLL_SEL_MASK		= 1,
+	CLK_I2C1_PLL_SEL_SHIFT		= 15,
+	CLK_I2C1_DIV_CON_SHIFT		= 8,
+	CLK_I2C0_PLL_SEL_SHIFT		= 7,
+	CLK_I2C0_DIV_CON_SHIFT		= 0,
+
+	/* CRU_CLK_SEL50_CON */
+	CLK_I2C3_PLL_SEL_SHIFT		= 15,
+	CLK_I2C3_DIV_CON_SHIFT		= 8,
+	CLK_I2C2_PLL_SEL_SHIFT		= 7,
+	CLK_I2C2_DIV_CON_SHIFT		= 0,
+
+	/* CRU_CLK_SEL52_CON */
+	CLK_PWM_PLL_SEL_GPLL		= 0,
+	CLK_PWM_PLL_SEL_24M,
+	CLK_PWM_DIV_CON_MASK		= 0x7f,
+	CLK_PWM_PLL_SEL_MASK		= 1,
+	CLK_PWM1_PLL_SEL_SHIFT		= 15,
+	CLK_PWM1_DIV_CON_SHIFT		= 8,
+	CLK_PWM0_PLL_SEL_SHIFT		= 7,
+	CLK_PWM0_DIV_CON_SHIFT		= 0,
+
+	/* CRU_CLK_SEL53_CON */
+	CLK_SPI_PLL_SEL_GPLL		= 0,
+	CLK_SPI_PLL_SEL_24M,
+	CLK_SPI_DIV_CON_MASK		= 0x7f,
+	CLK_SPI_PLL_SEL_MASK		= 1,
+	CLK_SPI1_PLL_SEL_SHIFT		= 15,
+	CLK_SPI1_DIV_CON_SHIFT		= 8,
+	CLK_SPI0_PLL_SEL_SHIFT		= 7,
+	CLK_SPI0_DIV_CON_SHIFT		= 0,
+
+	/* CRU_CLK_SEL55_CON */
+	CLK_SARADC_DIV_CON_SHIFT	= 0,
+	CLK_SARADC_DIV_CON_MASK		= 0x7ff,
+
 	/* CRU_PMU_MODE */
 	GPLL_MODE_SHIFT		= 0,
 	GPLL_MODE_MASK		= 3 << GPLL_MODE_SHIFT,
diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index f5a7a15d19..d79833341f 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -173,12 +173,20 @@ static ulong px30_i2c_get_clk(struct px30_cru *cru, ulong clk_id)
 
 	switch (clk_id) {
 	case SCLK_I2C0:
+		con = readl(&cru->clksel_con[49]);
+		div = con >> CLK_I2C0_DIV_CON_SHIFT & CLK_I2C_DIV_CON_MASK;
 		break;
 	case SCLK_I2C1:
+		con = readl(&cru->clksel_con[49]);
+		div = con >> CLK_I2C1_DIV_CON_SHIFT & CLK_I2C_DIV_CON_MASK;
 		break;
 	case SCLK_I2C2:
+		con = readl(&cru->clksel_con[50]);
+		div = con >> CLK_I2C2_DIV_CON_SHIFT & CLK_I2C_DIV_CON_MASK;
 		break;
 	case SCLK_I2C3:
+		con = readl(&cru->clksel_con[50]);
+		div = con >> CLK_I2C3_DIV_CON_SHIFT & CLK_I2C_DIV_CON_MASK;
 		break;
 	default:
 		printf("do not support this i2c bus\n");
@@ -197,12 +205,32 @@ static ulong px30_i2c_set_clk(struct px30_cru *cru, ulong clk_id, uint hz)
 
 	switch (clk_id) {
 	case SCLK_I2C0:
+		rk_clrsetreg(&cru->clksel_con[49],
+			     CLK_I2C_DIV_CON_MASK << CLK_I2C0_DIV_CON_SHIFT |
+			     CLK_I2C_PLL_SEL_MASK << CLK_I2C0_PLL_SEL_SHIFT,
+			     (src_clk_div - 1) << CLK_I2C0_DIV_CON_SHIFT |
+			     CLK_I2C_PLL_SEL_GPLL << CLK_I2C0_PLL_SEL_SHIFT);
 		break;
 	case SCLK_I2C1:
+		rk_clrsetreg(&cru->clksel_con[49],
+			     CLK_I2C_DIV_CON_MASK << CLK_I2C1_DIV_CON_SHIFT |
+			     CLK_I2C_PLL_SEL_MASK << CLK_I2C1_PLL_SEL_SHIFT,
+			     (src_clk_div - 1) << CLK_I2C1_DIV_CON_SHIFT |
+			     CLK_I2C_PLL_SEL_GPLL << CLK_I2C1_PLL_SEL_SHIFT);
 		break;
 	case SCLK_I2C2:
+		rk_clrsetreg(&cru->clksel_con[50],
+			     CLK_I2C_DIV_CON_MASK << CLK_I2C2_DIV_CON_SHIFT |
+			     CLK_I2C_PLL_SEL_MASK << CLK_I2C2_PLL_SEL_SHIFT,
+			     (src_clk_div - 1) << CLK_I2C2_DIV_CON_SHIFT |
+			     CLK_I2C_PLL_SEL_GPLL << CLK_I2C2_PLL_SEL_SHIFT);
 		break;
 	case SCLK_I2C3:
+		rk_clrsetreg(&cru->clksel_con[50],
+			     CLK_I2C_DIV_CON_MASK << CLK_I2C3_DIV_CON_SHIFT |
+			     CLK_I2C_PLL_SEL_MASK << CLK_I2C3_PLL_SEL_SHIFT,
+			     (src_clk_div - 1) << CLK_I2C3_DIV_CON_SHIFT |
+			     CLK_I2C_PLL_SEL_GPLL << CLK_I2C3_PLL_SEL_SHIFT);
 		break;
 	default:
 		printf("do not support this i2c bus\n");
@@ -282,23 +310,63 @@ static ulong px30_mmc_set_clk(struct px30_cru *cru,
 	return px30_mmc_get_clk(cru, clk_id);
 }
 
-static ulong px30_pwm_get_clk(struct px30_cru *cru)
+static ulong px30_pwm_get_clk(struct px30_cru *cru, ulong clk_id)
 {
 	u32 div, con;
 
+	switch (clk_id) {
+	case SCLK_PWM0:
+		con = readl(&cru->clksel_con[52]);
+		div = con >> CLK_PWM0_DIV_CON_SHIFT & CLK_PWM_DIV_CON_MASK;
+		break;
+	case SCLK_PWM1:
+		con = readl(&cru->clksel_con[52]);
+		div = con >> CLK_PWM1_DIV_CON_SHIFT & CLK_PWM_DIV_CON_MASK;
+		break;
+	default:
+		printf("do not support this pwm bus\n");
+		return -EINVAL;
+	}
+
 	return DIV_TO_RATE(GPLL_HZ, div);
 }
 
-static ulong px30_pwm_set_clk(struct px30_cru *cru, uint hz)
+static ulong px30_pwm_set_clk(struct px30_cru *cru, ulong clk_id, uint hz)
 {
-	u32 div = GPLL_HZ / hz;
+	int src_clk_div;
 
-	return DIV_TO_RATE(GPLL_HZ, div);
+	src_clk_div = GPLL_HZ / hz;
+	assert(src_clk_div - 1 < 127);
+
+	switch (clk_id) {
+	case SCLK_PWM0:
+		rk_clrsetreg(&cru->clksel_con[52],
+			     CLK_PWM_DIV_CON_MASK << CLK_PWM0_DIV_CON_SHIFT |
+			     CLK_PWM_PLL_SEL_MASK << CLK_PWM0_PLL_SEL_SHIFT,
+			     (src_clk_div - 1) << CLK_PWM0_DIV_CON_SHIFT |
+			     CLK_PWM_PLL_SEL_GPLL << CLK_PWM0_PLL_SEL_SHIFT);
+		break;
+	case SCLK_PWM1:
+		rk_clrsetreg(&cru->clksel_con[52],
+			     CLK_PWM_DIV_CON_MASK << CLK_PWM1_DIV_CON_SHIFT |
+			     CLK_PWM_PLL_SEL_MASK << CLK_PWM1_PLL_SEL_SHIFT,
+			     (src_clk_div - 1) << CLK_PWM1_DIV_CON_SHIFT |
+			     CLK_PWM_PLL_SEL_GPLL << CLK_PWM1_PLL_SEL_SHIFT);
+		break;
+	default:
+		printf("do not support this pwm bus\n");
+		return -EINVAL;
+	}
+
+	return DIV_TO_RATE(GPLL_HZ, src_clk_div);
 }
 
 static ulong px30_saradc_get_clk(struct px30_cru *cru)
 {
-	u32 div, val;
+	u32 div, con;
+
+	con = readl(&cru->clksel_con[55]);
+	div = con >> CLK_SARADC_DIV_CON_SHIFT & CLK_PWM_DIV_CON_MASK;
 
 	return DIV_TO_RATE(OSC_HZ, div);
 }
@@ -307,9 +375,65 @@ static ulong px30_saradc_set_clk(struct px30_cru *cru, uint hz)
 {
 	int src_clk_div;
 
-	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1;
+	src_clk_div = OSC_HZ / hz;
+	assert(src_clk_div - 1 < 2047);
 
-	return px30_saradc_get_clk(cru);
+	rk_clrsetreg(&cru->clksel_con[55],
+		     CLK_SARADC_DIV_CON_MASK,
+		     src_clk_div << CLK_SARADC_DIV_CON_SHIFT);
+
+	return DIV_TO_RATE(OSC_HZ, src_clk_div);
+}
+
+static ulong px30_spi_get_clk(struct px30_cru *cru, ulong clk_id)
+{
+	u32 div, con;
+
+	switch (clk_id) {
+	case SCLK_PWM0:
+		con = readl(&cru->clksel_con[53]);
+		div = con >> CLK_SPI0_DIV_CON_SHIFT & CLK_SPI_DIV_CON_MASK;
+		break;
+	case SCLK_PWM1:
+		con = readl(&cru->clksel_con[53]);
+		div = con >> CLK_SPI1_DIV_CON_SHIFT & CLK_SPI_DIV_CON_MASK;
+		break;
+	default:
+		printf("do not support this pwm bus\n");
+		return -EINVAL;
+	}
+
+	return DIV_TO_RATE(GPLL_HZ, div);
+}
+
+static ulong px30_spi_set_clk(struct px30_cru *cru, ulong clk_id, uint hz)
+{
+	int src_clk_div;
+
+	src_clk_div = GPLL_HZ / hz;
+	assert(src_clk_div - 1 < 127);
+
+	switch (clk_id) {
+	case SCLK_SPI0:
+		rk_clrsetreg(&cru->clksel_con[53],
+			     CLK_SPI_DIV_CON_MASK << CLK_SPI0_DIV_CON_SHIFT |
+			     CLK_SPI_PLL_SEL_MASK << CLK_SPI0_PLL_SEL_SHIFT,
+			     (src_clk_div - 1) << CLK_SPI0_DIV_CON_SHIFT |
+			     CLK_SPI_PLL_SEL_GPLL << CLK_SPI0_PLL_SEL_SHIFT);
+		break;
+	case SCLK_SPI1:
+		rk_clrsetreg(&cru->clksel_con[53],
+			     CLK_SPI_DIV_CON_MASK << CLK_SPI1_DIV_CON_SHIFT |
+			     CLK_SPI_PLL_SEL_MASK << CLK_SPI1_PLL_SEL_SHIFT,
+			     (src_clk_div - 1) << CLK_SPI1_DIV_CON_SHIFT |
+			     CLK_SPI_PLL_SEL_GPLL << CLK_SPI1_PLL_SEL_SHIFT);
+		break;
+	default:
+		printf("do not support this pwm bus\n");
+		return -EINVAL;
+	}
+
+	return DIV_TO_RATE(GPLL_HZ, src_clk_div);
 }
 
 static ulong px30_clk_get_rate(struct clk *clk)
@@ -333,11 +457,15 @@ static ulong px30_clk_get_rate(struct clk *clk)
 		rate = px30_i2c_get_clk(priv->cru, clk->id);
 		break;
 	case SCLK_PWM0:
-		rate = px30_pwm_get_clk(priv->cru);
+		rate = px30_pwm_get_clk(priv->cru, clk->id);
 		break;
 	case SCLK_SARADC:
 		rate = px30_saradc_get_clk(priv->cru);
 		break;
+	case SCLK_SPI0:
+	case SCLK_SPI1:
+		rate = px30_spi_get_clk(priv->cru, clk->id);
+		break;
 	default:
 		return -ENOENT;
 	}
@@ -367,11 +495,16 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate)
 		ret = px30_i2c_set_clk(priv->cru, clk->id, rate);
 		break;
 	case SCLK_PWM0:
-		ret = px30_pwm_set_clk(priv->cru, rate);
+	case SCLK_PWM1:
+		ret = px30_pwm_set_clk(priv->cru, clk->id, rate);
 		break;
 	case SCLK_SARADC:
 		ret = px30_saradc_set_clk(priv->cru, rate);
 		break;
+	case SCLK_SPI0:
+	case SCLK_SPI1:
+		ret = px30_spi_set_clk(priv->cru, clk->id, rate);
+		break;
 	default:
 		return -ENOENT;
 	}

commit 793770df466d2b0bd9abce5517173d672df21382
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Feb 6 15:24:12 2018 +0800

    pinctrl: rockchip: Fix the uart2 & uart3 route bit of px30
    
    Uart2 and uart3 both have routed bit, use their rx pin to
    switch m0 or m1.
    
    Change-Id: Iae64bb675a1f8cc8e54c7b798bffcf89d68fb64f
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 68bf30d8e6..ad103560d4 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -488,31 +488,31 @@ static struct rockchip_mux_route_data px30_mux_route_data[] = {
 	}, {
 		/* uart2-rxm0 */
 		.bank_num = 1,
-		.pin = 26,
+		.pin = 27,
 		.func = 2,
 		.route_offset = 0x184,
-		.route_val = BIT(16 + 9),
+		.route_val = BIT(16 + 10),
 	}, {
 		/* uart2-rxm1 */
 		.bank_num = 2,
 		.pin = 14,
 		.func = 2,
 		.route_offset = 0x184,
-		.route_val = BIT(16 + 9) | BIT(9),
+		.route_val = BIT(16 + 10) | BIT(10),
 	}, {
 		/* uart3-rxm0 */
 		.bank_num = 0,
 		.pin = 17,
 		.func = 2,
 		.route_offset = 0x184,
-		.route_val = BIT(16 + 10),
+		.route_val = BIT(16 + 9),
 	}, {
 		/* uart3-rxm1 */
 		.bank_num = 1,
-		.pin = 13,
+		.pin = 15,
 		.func = 2,
 		.route_offset = 0x184,
-		.route_val = BIT(16 + 10) | BIT(10),
+		.route_val = BIT(16 + 9) | BIT(9),
 	},
 };
 

commit 6e6b06ab81d3c89fe73975eaf3596c947bcc0056
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Feb 6 16:19:27 2018 +0800

    rockchip: dts: px30-evb: add rk817 node
    
    Change-Id: Ic861dabfdf84b8893d99a28c67a96e2464c0da83
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/px30-evb.dts b/arch/arm/dts/px30-evb.dts
index 7736908966..c890607954 100644
--- a/arch/arm/dts/px30-evb.dts
+++ b/arch/arm/dts/px30-evb.dts
@@ -62,6 +62,276 @@
 };
 
 
+&i2c0 {
+	status = "okay";
+
+	rk817: pmic@20 {
+		compatible = "rockchip,rk817";
+		reg = <0x20>;
+		interrupt-parent = <&gpio0>;
+		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pmic_int>;
+		rockchip,system-power-controller;
+		wakeup-source;
+		#clock-cells = <1>;
+		clock-output-names = "xin32k", "rk808-clkout2";
+
+		vcc1-supply = <&vccsys>;
+		vcc2-supply = <&vccsys>;
+		vcc3-supply = <&vccsys>;
+		vcc4-supply = <&vccsys>;
+		vcc5-supply = <&vccsys>;
+		vcc6-supply = <&vccsys>;
+		vcc7-supply = <&vcc_3v0>;
+		vcc8-supply = <&vccsys>;
+		vcc9-supply = <&dcdc_boost>;
+
+		vccsys: vccsys{
+			compatible = "regulator-fixed";
+			regulator-name = "vcc3v8_sys";
+			regulator-always-on;
+			regulator-boot-on;
+			regulator-min-microvolt = <3800000>;
+			regulator-max-microvolt = <3800000>;
+		};
+
+		rk817_pin0_ts: rk817_pin0_ts {
+			pins = "gpio0";
+			function = "pin_fun0";
+		};
+
+		rk817_pin0_gpio: rk817_pin0_gpio {
+			pins = "gpio0";
+			function = "gpio";
+		};
+
+		rk817_pin1_gt: rk817_pin1_gt {
+			pins = "gpio1";
+			function = "pin_fun0";
+		};
+
+		rk817_pin1_gpio: rk817_pin1_gpio {
+			pins = "gpio1";
+			function = "gpio";
+		};
+
+		regulators {
+			vdd_arm: DCDC_REG1 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <950000>;
+				regulator-max-microvolt = <1350000>;
+				regulator-ramp-delay = <6001>;
+				regulator-initial-mode = <0x1>;
+				regulator-name = "vdd_arm";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <700000>;
+				};
+			};
+
+			vdd_logic: DCDC_REG2 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <950000>;
+				regulator-max-microvolt = <1350000>;
+				regulator-ramp-delay = <6001>;
+				regulator-initial-mode = <0x1>;
+				regulator-name = "vdd_logic";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-suspend-microvolt = <800000>;
+				};
+			};
+
+			vcc_ddr: DCDC_REG3 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-initial-mode = <0x1>;
+				regulator-name = "vcc_ddr";
+					regulator-state-mem {
+					regulator-on-in-suspend;
+				};
+			};
+
+			vcc_3v0: DCDC_REG4 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3000000>;
+				regulator-initial-mode = <0x1>;
+				regulator-name = "vcc_3v0";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-suspend-microvolt = <3000000>;
+				};
+			};
+
+			vcc2v5_ddr: LDO_REG1 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <2500000>;
+				regulator-max-microvolt = <2500000>;
+				regulator-name = "vcc2v5_ddr";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <2500000>;
+				};
+			};
+
+			vcc1v8_soc: LDO_REG2 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+
+				regulator-name = "vcc1v8_soc";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vdd1v0_soc: LDO_REG3 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+
+				regulator-name = "vcc1v0_soc";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-suspend-microvolt = <1000000>;
+				};
+			};
+
+			vcc3v0_pmu: LDO_REG4 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3000000>;
+
+				regulator-name = "vcc3v0_pmu";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-suspend-microvolt = <3000000>;
+				};
+			};
+
+			vccio_sd: LDO_REG5 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+
+				regulator-name = "vccio_sd";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3300000>;
+				};
+			};
+
+			vcc_sd: LDO_REG6 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+
+				regulator-name = "vcc_sd";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3300000>;
+				};
+			};
+
+			vcc2v8_dvp: LDO_REG7 {
+			regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <2800000>;
+				regulator-max-microvolt = <2800000>;
+
+				regulator-name = "vcc2v8_dvp";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-suspend-microvolt = <2800000>;
+				};
+			};
+
+			vcc1v8_dvp: LDO_REG8 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+
+				regulator-name = "vcc1v8_dvp";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vdd1v5_dvp: LDO_REG9 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1500000>;
+				regulator-max-microvolt = <1500000>;
+
+				regulator-name = "vdd1v5_dvp";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-suspend-microvolt = <1500000>;
+				};
+			};
+
+			dcdc_boost: BOOST {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <4700000>;
+				regulator-max-microvolt = <5400000>;
+				regulator-name = "boost";
+			};
+
+			otg_switch: OTG_SWITCH {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-name = "otg_switch";
+			};
+		};
+
+		battery {
+			compatible = "rk817,battery";
+			ocv_table = <3500 3625 3685 3697 3718 3735 3748
+						3760 3774 3788 3802 3816 3834 3853
+						3877 3908 3946 3975 4018 4071 4106>;
+			design_capacity = <2500>;
+			design_qmax = <2750>;
+			bat_res = <100>;
+			sleep_enter_current = <300>;
+			sleep_exit_current = <300>;
+			sleep_filter_current = <100>;
+			power_off_thresd = <3500>;
+			zero_algorithm_vol = <3850>;
+			max_soc_offset = <60>;
+			monitor_sec = <5>;
+			sample_res = <10>;
+			virtual_power = <1>;
+		};
+
+		charger {
+			compatible = "rk817,charger";
+			min_input_voltage = <4500>;
+			max_input_current = <1500>;
+			max_chrg_current = <1300>;
+			max_chrg_voltage = <4200>;
+			chrg_term_mode = <1>;
+			chrg_finish_cur = <300>;
+			virtual_power = <0>;
+			dc_det_adc = <0>;
+		};
+	};
+};
+
 &emmc {
 	u-boot,dm-pre-reloc;
 	fifo-mode;
@@ -79,3 +349,12 @@
 &saradc {
 	status = "okay";
 };
+
+&pinctrl {
+	pmic {
+	pmic_int: pmic_int {
+		rockchip,pins =
+			<0 7 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+};
\ No newline at end of file

commit bd03c51b6a5edaa3af2ab5ff1a089cbf485796e7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Feb 6 15:25:08 2018 +0800

    configs: evb-px30: enable some drivers
    
    include: pmic, reguator, gpio, i2c, pinctrl
    
    Change-Id: I03490904c1a93bc0bdc9e9ab55ff5295610dd37b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 1d537d7a9c..011f6b15c8 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -75,3 +75,13 @@ CONFIG_ERRNO_STR=y
 CONFIG_SARADC_ROCKCHIP=y
 CONFIG_DM_KEY=y
 CONFIG_ADC_KEY=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_PINCTRL=y
+CONFIG_RK8XX_PWRKEY=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_DM_REGULATOR=y

commit 608481098860868d8082e0dbdc274fd1a98d04a6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Feb 6 15:21:07 2018 +0800

    rockchip: irq: enable GICv2 on px30
    
    Change-Id: I797fa071091f6856c3a7eef6ae6a9f0c4bcb377a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 7328ba467e..6d44919b95 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -3,6 +3,7 @@ if ARCH_ROCKCHIP
 config ROCKCHIP_PX30
 	bool "Support Rockchip PX30"
 	select ARM64
+	select GICV2
 	help
 	  The Rockchip PX30 is a ARM-based SoC with a quad-core Cortex-A35
 	  including NEON and GPU, Mali-400 graphics, several DDR3 options
diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index 44838774b4..f6cb4f0b95 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -29,8 +29,8 @@
 
 #define COUNTER_FREQUENCY		24000000
 
-#define GICD_BASE			0xFF811000
-#define GICC_BASE			0xFF812000
+#define GICD_BASE			0xff131000
+#define GICC_BASE			0xff132000
 
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */
 
diff --git a/include/irq-platform.h b/include/irq-platform.h
index d4269c9761..f6e1b88a29 100644
--- a/include/irq-platform.h
+++ b/include/irq-platform.h
@@ -131,6 +131,27 @@
 
 #define GPIO_BANK_NUM			5
 #define GPIO_BANK_PINS			32
+
+#elif defined(CONFIG_ROCKCHIP_PX30)
+#define GPIO0_PHYS			0xff040000
+#define GPIO1_PHYS			0xff250000
+#define GPIO2_PHYS			0xff260000
+#define GPIO3_PHYS			0xff270000
+
+#define IRQ_GPIO0			35
+#define IRQ_GPIO1			36
+#define IRQ_GPIO2			37
+#define IRQ_GPIO3			38
+#define IRQ_PWM0			56
+#define IRQ_PWM1			57
+#define IRQ_TIMER1			63	/* non-secure */
+
+#define GIC_IRQS_NR			(4 * 32)
+#define GPIO_IRQS_NR			(4 * 32)
+
+#define GPIO_BANK_NUM			4
+#define GPIO_BANK_PINS			32
+
 #else
 "Missing define RIQ relative things"
 #endif

commit 0c05cc95806ba5fcca372745e1a32db5fb450160
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Feb 6 15:19:09 2018 +0800

    clk: clk_px30: use debug instead of printf
    
    Change-Id: I12eceee41ebfb2269a90fc8dbc7ca1f6a39a1770
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 89b18a2f8e..f5a7a15d19 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -246,7 +246,7 @@ static ulong px30_mmc_set_clk(struct px30_cru *cru,
 	int src_clk_div;
 	u32 con_id;
 
-	printf("%s %d %d\n", __func__, clk_id, set_rate);
+	debug("%s %d %d\n", __func__, clk_id, set_rate);
 	switch (clk_id) {
 	case HCLK_SDMMC:
 	case SCLK_SDMMC:
@@ -350,7 +350,7 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate)
 	struct px30_clk_priv *priv = dev_get_priv(clk->dev);
 	ulong ret = 0;
 
-	printf("%s %d %d\n", __func__, clk->id, rate);
+	debug("%s %d %d\n", __func__, clk->id, rate);
 	switch (clk->id) {
 	case 0 ... 15:
 		return 0;
@@ -376,7 +376,7 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate)
 		return -ENOENT;
 	}
 
-	printf("%s %d\n", __func__, ret);
+	debug("%s %d\n", __func__, ret);
 	return ret;
 }
 

commit 26dd90f7bcaeedfc7511f018f029958f42beb920
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Feb 6 14:19:53 2018 +0800

    configs: evb-px30: enable adc keys
    
    Change-Id: I02c6d6388191cb1b23cbf5f4c5ef9f3dadc22128
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 39799afb56..1d537d7a9c 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -72,3 +72,6 @@ CONFIG_SPL_SYSRESET=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
+CONFIG_SARADC_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_ADC_KEY=y

commit 28d30d4c661e55838c624f63a22863e8d9b41b10
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Feb 6 14:11:02 2018 +0800

    input: Kconfig: do not enable key driver
    
    Change-Id: I4c32843d74039e46f629915bce16853540b6f575
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig
index 85eb573323..6a88c7918e 100644
--- a/drivers/input/Kconfig
+++ b/drivers/input/Kconfig
@@ -48,27 +48,23 @@ config I8042_KEYB
 config RK8XX_PWRKEY
 	bool "Enable RK805/816 pwrkey support"
 	depends on DM_KEY && PMIC_RK8XX
-	default y
 	help
 	  This adds a driver for the RK805/816 pwrkey support.
 
 config ADC_KEY
 	bool "Enable adc keys support"
 	depends on DM_KEY
-	default y
 	help
 	  This adds a driver for the adc keys support.
 
 config GPIO_KEY
 	bool "Enable gpio keys support"
 	depends on DM_KEY
-	default y
 	help
 	  This adds a driver for the gpio keys support.
 
 config RK_KEY
 	bool "Enable rk keys support"
 	depends on DM_KEY
-	default y
 	help
 	  This adds a driver for the rk keys support.

commit 4e1791d386b22cb49f957139f0871c96d76fa7b4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Feb 6 14:07:42 2018 +0800

    rockchip: dts: px30-evb: add adc-keys
    
    Change-Id: I5978e33200b70510380cecfe232ec47862bff588
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/px30-evb.dts b/arch/arm/dts/px30-evb.dts
index d08a19d680..7736908966 100644
--- a/arch/arm/dts/px30-evb.dts
+++ b/arch/arm/dts/px30-evb.dts
@@ -7,6 +7,7 @@
 /dts-v1/;
 #include "px30.dtsi"
 #include "px30-u-boot.dtsi"
+#include <dt-bindings/input/input.h>
 
 / {
 	model = "Rockchip PX30 EVB";
@@ -21,6 +22,43 @@
 		compatible = "rockchip,px30-dmc", "syscon";
 		reg = <0x0 0xff2a0000 0x0 0x1000>;
 	};
+
+	adc-keys {
+		compatible = "adc-keys";
+		io-channels = <&saradc 2>;
+		io-channel-names = "buttons";
+		keyup-threshold-microvolt = <1800000>;
+
+		vol-up-key {
+			linux,code = <KEY_VOLUMEUP>;
+			label = "volume up";
+			press-threshold-microvolt = <10000>;
+		};
+
+		vol-down-key {
+			linux,code = <KEY_VOLUMEDOWN>;
+			label = "volume down";
+			press-threshold-microvolt = <170000>;
+		};
+
+		home-key {
+			linux,code = <KEY_HOME>;
+			label = "home";
+			press-threshold-microvolt = <254000>;
+		};
+
+		menu-key {
+			linux,code = <KEY_MENU>;
+			label = "menu";
+			press-threshold-microvolt = <414000>;
+		};
+
+		esc-key {
+			linux,code = <KEY_ESC>;
+			label = "esc";
+			press-threshold-microvolt = <614000>;
+		};
+	};
 };
 
 
@@ -37,3 +75,7 @@
 	pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
 	status = "okay";
 };
+
+&saradc {
+	status = "okay";
+};

commit 829f2b853dd881ed5b34e91a54d6d37b01c206a3
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Mon Feb 5 16:29:47 2018 +0800

    usb: gadget: add getting chip-info command for rockusb
    
    This change adds getting chip-info command support for rockusb.
    
    Change-Id: Ie158c94eb0591e658947f3b0c47f4fc0ec0333d1
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index 250bcd4a79..586c0cd2c5 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -7,6 +7,7 @@
 
 #include <asm/io.h>
 #include <asm/arch/boot_mode.h>
+#include <asm/arch/chip_info.h>
 #include <rockusb.h>
 
 #define ROCKUSB_INTERFACE_CLASS	0xff
@@ -207,6 +208,25 @@ static int rkusb_do_read_flash_info(struct fsg_common *common,
 	return len;
 }
 
+static int rkusb_do_get_chip_info(struct fsg_common *common,
+				  struct fsg_buffhd *bh)
+{
+	u8 *buf = (u8 *)bh->buf;
+	u32 len = common->data_size;
+	u32 chip_info[4];
+
+	memset((void *)chip_info, 0, sizeof(chip_info));
+	rockchip_rockusb_get_chip_info(chip_info);
+
+	memset((void *)&buf[0], 0, len);
+	memcpy((void *)&buf[0], (void *)chip_info, len);
+
+	/* Set data xfer size */
+	common->residue = common->data_size_from_cmnd = len;
+
+	return len;
+}
+
 static int rkusb_do_lba_erase(struct fsg_common *common,
 			      struct fsg_buffhd *bh)
 {
@@ -315,6 +335,11 @@ static int rkusb_cmd_process(struct fsg_common *common,
 		rc = RKUSB_RC_FINISHED;
 		break;
 
+	case RKUSB_GET_CHIP_VER:
+		*reply = rkusb_do_get_chip_info(common, bh);
+		rc = RKUSB_RC_FINISHED;
+		break;
+
 	case RKUSB_LBA_ERASE:
 		*reply = rkusb_do_lba_erase(common, bh);
 		rc = RKUSB_RC_FINISHED;
@@ -342,7 +367,6 @@ static int rkusb_cmd_process(struct fsg_common *common,
 	case RKUSB_SDRAM_READ_10:
 	case RKUSB_SDRAM_WRITE_10:
 	case RKUSB_SDRAM_EXECUTE:
-	case RKUSB_GET_CHIP_VER:
 	case RKUSB_LOW_FORMAT:
 	case RKUSB_SET_RESET_FLAG:
 	case RKUSB_SPI_READ_10:

commit 53cb838439731ad54380bf86fa3aaa4aeadec494
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Tue Feb 6 10:39:46 2018 +0800

    board: rockchip: update README of rv1108 evb
    
    The RV1108 EVB switch to spl now, so we need
    to update the README.
    
    Change-Id: I1c300a53a8a5c76aafa4857f55956e0203df8634
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/board/rockchip/evb_rv1108/README b/board/rockchip/evb_rv1108/README
index 79a97c3138..f9df7b2b8f 100644
--- a/board/rockchip/evb_rv1108/README
+++ b/board/rockchip/evb_rv1108/README
@@ -1,12 +1,11 @@
 Here is the step-by-step to boot U-Boot on rv1108 evb.
 
-Get ddr init binary
-==============================================================================
-  > git clone  https://github.com/rockchip-linux/rkbin.git
 
 Compile  U-Boot
 ===========================
-  > make CROSS_COMPILE=arm-linux-gnueabi- evb-rv1108_defconfig  all
+  > make CROSS_COMPILE=arm-linux-gnueabihf- evb-rv1108_defconfig  all
+  > ./tools/mkimage  -n rv1108 -T rksd -d ./out/u-boot-spl.bin spl.bin
+  You can also use the ddr bin from rockchip official release [0] instead of u-boot-spl:
   > ./tools/mkimage  -n rv1108 -T rksd -d ../rkbin/rv1x/rv1108ddr_v1.00.bin spl.bin
   > cat spl.bin u-boot.bin > u-boot.img
 
@@ -19,28 +18,28 @@ Power on(or reset with RESET KEY) with MASKROM KEY preesed, and then:
   > rkdeveloptool wl 0x40 u-boot.img
   > rkdeveloptool RD
 
-You should be able to get U-Boot log message from boot console:
 
-DDR Version V1.02 20170220
-In
-400MHz
-DDR3
-Bus Width=16 Col=10 Bank=8 Row=15 CS=1 Die Bus-Width=16 Size=512MB
-mach:2
-OUT
+You should be able to get U-Boot log message from boot console with baudrate 1500000:
 
+U-Boot SPL board initReturning to boot ROM...
 
-U-Boot 2017.05-00693-g3a5b171 (Jun 01 2017 - 17:37:53 +0800)
+
+U-Boot 2017.09-01119-gc3ef4c0-dirty (Feb 06 2018 - 10:04:12 +0800)
 
 Model: Rockchip RV1108 Evaluation board
-DRAM:  128 MiB
-APLL: 600000000 DPLL:792000000 GPLL:384000000
+DRAM:  256 MiB
+APLL: 400000000 DPLL:798000000 GPLL:384000000
 MMC:
 Using default environment
 
 In:    serial@10210000
 Out:   serial@10210000
 Err:   serial@10210000
+Model: Rockchip RV1108 Evaluation board
 Net:   No ethernet found.
 Hit any key to stop autoboot:  0
 =>
+
+
+
+[0] git clone  https://github.com/rockchip-linux/rkbin.git

commit 55fe151c8c910020ab775a428f68a97da7d3a236
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Feb 6 11:42:49 2018 +0800

    bootm-fdt: printf memory bank information
    
    Change-Id: I8630ad245a301d7c1d31ce85a7b67f511cc23fd3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/lib/bootm-fdt.c b/arch/arm/lib/bootm-fdt.c
index fcc2a0e214..d6bb3031d7 100644
--- a/arch/arm/lib/bootm-fdt.c
+++ b/arch/arm/lib/bootm-fdt.c
@@ -42,8 +42,13 @@ int arch_fixup_fdt(void *blob)
 	u64 size[CONFIG_NR_DRAM_BANKS];
 
 	for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
+		if (size[bank] == 0)
+			continue;
 		start[bank] = bd->bi_dram[bank].start;
 		size[bank] = bd->bi_dram[bank].size;
+		printf("Adding bank: start=0x%08lx, size=0x%08lx\n",
+		       gd->bd->bi_dram[bank].start, gd->bd->bi_dram[bank].size);
+
 #ifdef CONFIG_ARMV7_NONSEC
 		ret = armv7_apply_memory_carveout(&start[bank], &size[bank]);
 		if (ret)

commit f60795f1552c51333cebf3bd6bee326b5f23a91c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Feb 6 11:41:54 2018 +0800

    configs: px30_common.h: set CONFIG_NR_DRAM_BANKS=2
    
    Change-Id: Ic2e299707e6885f625d101977f592bf271204881
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index e9f17dd7a9..44838774b4 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -38,7 +38,7 @@
 #define CONFIG_BOUNCE_BUFFER
 
 #define CONFIG_SYS_SDRAM_BASE		0
-#define CONFIG_NR_DRAM_BANKS		1
+#define CONFIG_NR_DRAM_BANKS		2
 #define SDRAM_MAX_SIZE			0xff000000
 #define SDRAM_BANK_SIZE			(2UL << 30)
 

commit ca5e018d11966407f38b42e3090c31b785a33ae8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Feb 6 10:45:03 2018 +0800

    common: fdt_support: add bootargs debug output
    
    Change-Id: I06636c498b015774968b3c52ce53f54637fa8525
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/fdt_support.c b/common/fdt_support.c
index 884db34119..0e8e90481d 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -315,6 +315,8 @@ int fdt_chosen(void *fdt)
 		}
 	}
 
+	debug("bootargs = %s\n", env_get("bootargs"));
+
 	return fdt_fixup_stdout(fdt, nodeoffset);
 }
 

commit 89f991f8329ff91bbacc07baebeeafc014d57e94
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Feb 6 10:43:16 2018 +0800

    rockchip: px30: fix clk and pmugrf issue
    
    Change-Id: I481abacc5f69e645b4b3ca2cc5b27bf6cc3a6ca7
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/px30-u-boot.dtsi b/arch/arm/dts/px30-u-boot.dtsi
index 1ece341901..83b7f11bb7 100644
--- a/arch/arm/dts/px30-u-boot.dtsi
+++ b/arch/arm/dts/px30-u-boot.dtsi
@@ -13,4 +13,8 @@
 
 &emmc {
 	u-boot,dm-pre-reloc;
-};
\ No newline at end of file
+};
+
+&pmugrf {
+	u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/include/asm/arch-rockchip/cru_px30.h b/arch/arm/include/asm/arch-rockchip/cru_px30.h
index d27283f192..883cec0b79 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_px30.h
@@ -12,7 +12,7 @@
 #define OSC_HZ		(24 * MHz)
 
 #define APLL_HZ		(816 * MHz)
-#define GPLL_HZ		(1200 * MHz)
+#define GPLL_HZ		(600 * MHz)
 #define CPLL_HZ		(594 * MHz)
 
 #define CORE_PERI_HZ	204000000
diff --git a/drivers/ram/rockchip/sdram_px30.c b/drivers/ram/rockchip/sdram_px30.c
index a23e220571..f98ba8cc29 100644
--- a/drivers/ram/rockchip/sdram_px30.c
+++ b/drivers/ram/rockchip/sdram_px30.c
@@ -22,7 +22,7 @@ static int px30_dmc_probe(struct udevice *dev)
 {
 	struct dram_info *priv = dev_get_priv(dev);
 
-	priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
 	debug("%s: pmugrf=%p\n", __func__, priv->pmugrf);
 	priv->info.base = CONFIG_SYS_SDRAM_BASE;
 	priv->info.size = rockchip_sdram_size(

commit a60961a3df3a145c9dbfdea22a070ae8ac7a1fcb
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 22 15:07:00 2018 +0800

    rockchip: px30: add clock driver
    
    Add basic clock for px30 which including cpu, bus, emmc clock init.
    
    Change-Id: I43a1eaee20bda330ce4ff0556b3fda14a0451681
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_px30.h b/arch/arm/include/asm/arch-rockchip/cru_px30.h
new file mode 100644
index 0000000000..d27283f192
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/cru_px30.h
@@ -0,0 +1,243 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#ifndef _ASM_ARCH_CRU_px30_H
+#define _ASM_ARCH_CRU_px30_H
+
+#include <common.h>
+
+#define MHz		1000000
+#define OSC_HZ		(24 * MHz)
+
+#define APLL_HZ		(816 * MHz)
+#define GPLL_HZ		(1200 * MHz)
+#define CPLL_HZ		(594 * MHz)
+
+#define CORE_PERI_HZ	204000000
+#define CORE_ACLK_HZ	408000000
+
+#define BUS_ACLK_HZ	148500000
+#define BUS_HCLK_HZ	148500000
+#define BUS_PCLK_HZ	74250000
+
+#define PERI_ACLK_HZ	148500000
+#define PERI_HCLK_HZ	148500000
+#define PERI_PCLK_HZ	74250000
+
+enum apll_frequencies {
+	APLL_816_MHZ,
+	APLL_600_MHZ,
+};
+
+/* Private data for the clock driver - used by rockchip_get_cru() */
+struct px30_clk_priv {
+	struct px30_cru *cru;
+	ulong rate;
+};
+
+struct px30_cru {
+	struct px30_pll {
+		unsigned int con0;
+		unsigned int con1;
+		unsigned int con2;
+		unsigned int con3;
+		unsigned int con4;
+		unsigned int reserved0[3];
+	} pll[4];
+	unsigned int reserved1[8];
+	unsigned int mode;
+	unsigned int misc;
+	unsigned int reserved2[2];
+	unsigned int glb_cnt_th;
+	unsigned int glb_rst_st;
+	unsigned int glb_srst_fst;
+	unsigned int glb_srst_snd;
+	unsigned int glb_rst_con;
+	unsigned int reserved3[7];
+	unsigned int hwffc_con0;
+	unsigned int reserved4;
+	unsigned int hwffc_th;
+	unsigned int hwffc_intst;
+	unsigned int apll_con0_s;
+	unsigned int apll_con1_s;
+	unsigned int clksel_con0_s;
+	unsigned int reserved5;
+	unsigned int clksel_con[60];
+	unsigned int reserved6[4];
+	unsigned int clkgate_con[18];
+	unsigned int reserved7[(0x280 - 0x244) / 4 - 1];
+	unsigned int ssgtbl[32];
+	unsigned int softrst_con[12];
+	unsigned int reserved8[(0x380 - 0x32c) / 4 - 1];
+	unsigned int sdmmc_con[2];
+	unsigned int sdio_con[2];
+	unsigned int emmc_con[2];
+	unsigned int reserved9[(0x400 - 0x394) / 4 - 1];
+	unsigned int autocs_con[8];
+	unsigned int reserved10[(0xc000 - 0x41c) / 4 - 1];
+	struct px30_pll gpll;
+	unsigned int pmu_mode;
+	unsigned int reserved11[7];
+	unsigned int pmu_clksel_con[6];
+	unsigned int pmu_clkgate_con[2];
+	unsigned int reserved12[(0xc0c0 - 0xc05c) / 4 - 1];
+	unsigned int pmu_autocs_con[2];
+};
+check_member(px30_cru, pmu_autocs_con[1], 0xc0c4);
+
+struct pll_div {
+	u32 refdiv;
+	u32 fbdiv;
+	u32 postdiv1;
+	u32 postdiv2;
+	u32 frac;
+};
+
+enum {
+	/* PLLCON0*/
+	PLL_BP_SHIFT		= 15,
+	PLL_POSTDIV1_SHIFT	= 12,
+	PLL_POSTDIV1_MASK	= 7 << PLL_POSTDIV1_SHIFT,
+	PLL_FBDIV_SHIFT		= 0,
+	PLL_FBDIV_MASK		= 0xfff,
+
+	/* PLLCON1 */
+	PLL_PDSEL_SHIFT		= 15,
+	PLL_PD1_SHIFT		= 14,
+	PLL_PD_SHIFT		= 13,
+	PLL_PD_MASK		= 1 << PLL_PD_SHIFT,
+	PLL_DSMPD_SHIFT		= 12,
+	PLL_DSMPD_MASK		= 1 << PLL_DSMPD_SHIFT,
+	PLL_LOCK_STATUS_SHIFT	= 10,
+	PLL_LOCK_STATUS_MASK	= 1 << PLL_LOCK_STATUS_SHIFT,
+	PLL_POSTDIV2_SHIFT	= 6,
+	PLL_POSTDIV2_MASK	= 7 << PLL_POSTDIV2_SHIFT,
+	PLL_REFDIV_SHIFT	= 0,
+	PLL_REFDIV_MASK		= 0x3f,
+
+	/* PLLCON2 */
+	PLL_FOUT4PHASEPD_SHIFT	= 27,
+	PLL_FOUTVCOPD_SHIFT	= 26,
+	PLL_FOUTPOSTDIVPD_SHIFT	= 25,
+	PLL_DACPD_SHIFT		= 24,
+	PLL_FRAC_DIV	= 0xffffff,
+
+	/* CRU_MODE */
+	PLLMUX_FROM_XIN24M	= 0,
+	PLLMUX_FROM_PLL,
+	PLLMUX_FROM_RTC32K,
+	USBPHY480M_MODE_SHIFT	= 8,
+	USBPHY480M_MODE_MASK	= 3 << USBPHY480M_MODE_SHIFT,
+	NPLL_MODE_SHIFT		= 6,
+	NPLL_MODE_MASK		= 3 << NPLL_MODE_SHIFT,
+	DPLL_MODE_SHIFT		= 4,
+	DPLL_MODE_MASK		= 3 << DPLL_MODE_SHIFT,
+	CPLL_MODE_SHIFT		= 2,
+	CPLL_MODE_MASK		= 3 << CPLL_MODE_SHIFT,
+	APLL_MODE_SHIFT		= 0,
+	APLL_MODE_MASK		= 3 << APLL_MODE_SHIFT,
+
+	/* CRU_CLK_SEL0_CON */
+	CORE_ACLK_DIV_SHIFT	= 12,
+	CORE_ACLK_DIV_MASK	= 0x07 << CORE_ACLK_DIV_SHIFT,
+	CORE_DBG_DIV_SHIFT	= 8,
+	CORE_DBG_DIV_MASK	= 0x03 << CORE_DBG_DIV_SHIFT,
+	CORE_CLK_PLL_SEL_SHIFT	= 7,
+	CORE_CLK_PLL_SEL_MASK	= 1 << CORE_CLK_PLL_SEL_SHIFT,
+	CORE_CLK_PLL_SEL_APLL	= 0,
+	CORE_CLK_PLL_SEL_GPLL,
+	CORE_DIV_CON_SHIFT	= 0,
+	CORE_DIV_CON_MASK	= 0x0f << CORE_DIV_CON_SHIFT,
+
+	/* CRU_CLK_SEL14_CON */
+	PERI_PLL_SEL_SHIFT	=15,
+	PERI_PLL_SEL_MASK	= 3 << PERI_PLL_SEL_SHIFT,
+	PERI_PLL_GPLL		= 0,
+	PERI_PLL_CPLL,
+	PERI_HCLK_DIV_SHIFT	= 8,
+	PERI_HCLK_DIV_MASK	= 0x1f << PERI_HCLK_DIV_SHIFT,
+	PERI_ACLK_DIV_SHIFT	= 0,
+	PERI_ACLK_DIV_MASK	= 0x1f << PERI_ACLK_DIV_SHIFT,
+
+	/* CRU_CLKSEL20_CON */
+	EMMC_PLL_SHIFT		= 14,
+	EMMC_PLL_MASK		= 3 << EMMC_PLL_SHIFT,
+	EMMC_SEL_GPLL		= 0,
+	EMMC_SEL_CPLL,
+	EMMC_SEL_NPLL,
+	EMMC_SEL_24M,
+	EMMC_DIV_SHIFT		= 0,
+	EMMC_DIV_MASK		= 0xff << EMMC_DIV_SHIFT,
+
+	/* CRU_CLKSEL21_CON */
+	EMMC_CLK_SEL_SHIFT	= 15,
+	EMMC_CLK_SEL_MASK	= 1 << EMMC_CLK_SEL_SHIFT,
+	EMMC_CLK_SEL_EMMC	= 0,
+	EMMC_CLK_SEL_EMMC_DIV50,
+	EMMC_DIV50_SHIFT	= 0,
+	EMMC_DIV50_MASK		= 0xff << EMMC_DIV_SHIFT,
+
+	/* CRU_CLKSEL22_CON */
+	GMAC_PLL_SEL_SHIFT	= 14,
+	GMAC_PLL_SEL_MASK	= 3 << GMAC_PLL_SEL_SHIFT,
+	GMAC_PLL_SEL_GPLL	= 0,
+	GMAC_PLL_SEL_CPLL,
+	GMAC_PLL_SEL_NPLL,
+	CLK_GMAC_DIV_SHIFT	= 8,
+	CLK_GMAC_DIV_MASK	= 0x1f << CLK_GMAC_DIV_SHIFT,
+	SFC_PLL_SEL_SHIFT	= 7,
+	SFC_PLL_SEL_MASK	= 1 << SFC_PLL_SEL_SHIFT,
+	SFC_DIV_CON_SHIFT	= 0,
+	SFC_DIV_CON_MASK	= 0x7f,
+
+	/* CRU_CLK_SEL23_CON */
+	BUS_PLL_SEL_SHIFT	=15,
+	BUS_PLL_SEL_MASK	= 3 << BUS_PLL_SEL_SHIFT,
+	BUS_PLL_SEL_GPLL	= 0,
+	BUS_PLL_SEL_CPLL,
+	BUS_ACLK_DIV_SHIFT	= 8,
+	BUS_ACLK_DIV_MASK	= 0x1f << BUS_ACLK_DIV_SHIFT,
+	RMII_CLK_SEL_SHIFT	= 7,
+	RMII_CLK_SEL_MASK	= 1 << RMII_CLK_SEL_SHIFT,
+	RMII_CLK_SEL_10M	= 0,
+	RMII_CLK_SEL_100M,
+	RMII_EXTCLK_SEL_SHIFT	= 6,
+	RMII_EXTCLK_SEL_MASK	= 1 << RMII_EXTCLK_SEL_SHIFT,
+	RMII_EXTCLK_SEL_INT	= 0,
+	RMII_EXTCLK_SEL_EXT,
+	PCLK_GMAC_DIV_SHIFT	= 0,
+	PCLK_GMAC_DIV_MASK	= 0x0f << PCLK_GMAC_DIV_SHIFT,
+
+	/* CRU_CLK_SEL24_CON */
+	BUS_PCLK_DIV_SHIFT	= 8,
+	BUS_PCLK_DIV_MASK	= 3 << BUS_PCLK_DIV_SHIFT,
+	BUS_HCLK_DIV_SHIFT	= 0,
+	BUS_HCLK_DIV_MASK	= 0x1f << BUS_HCLK_DIV_SHIFT,
+
+	/* CRU_CLK_SEL24_CON */
+	UART2_PLL_SEL_SHIFT	= 14,
+	UART2_PLL_SEL_MASK	= 3 << UART2_PLL_SEL_SHIFT,
+	UART2_PLL_SEL_GPLL	= 0,
+	UART2_PLL_SEL_24M,
+	UART2_PLL_SEL_480M,
+	UART2_PLL_SEL_NPLL,
+	UART2_DIV_CON_SHIFT	= 0,
+	UART2_DIV_CON_MASK	= 0x1f << UART2_DIV_CON_SHIFT,
+
+	/* CRU_CLK_SEL25_CON */
+	UART2_CLK_SEL_SHIFT	= 14,
+	UART2_CLK_SEL_MASK	= 3 << UART2_PLL_SEL_SHIFT,
+	UART2_CLK_SEL_UART2	= 0,
+	UART2_CLK_SEL_UART2_NP5,
+	UART2_CLK_SEL_UART2_FRAC,
+	UART2_DIVNP5_SHIFT	= 0,
+	UART2_DIVNP5_MASK	= 0x1f << UART2_DIVNP5_SHIFT,
+
+	/* CRU_PMU_MODE */
+	GPLL_MODE_SHIFT		= 0,
+	GPLL_MODE_MASK		= 3 << GPLL_MODE_SHIFT,
+	
+};
+#endif
diff --git a/drivers/clk/rockchip/Makefile b/drivers/clk/rockchip/Makefile
index c662de1230..62d318cade 100644
--- a/drivers/clk/rockchip/Makefile
+++ b/drivers/clk/rockchip/Makefile
@@ -4,6 +4,7 @@
 # SPDX-License-Identifier:      GPL-2.0+
 #
 
+obj-$(CONFIG_ROCKCHIP_PX30) += clk_px30.o
 obj-$(CONFIG_ROCKCHIP_RK3036) += clk_rk3036.o
 obj-$(CONFIG_ROCKCHIP_RK3066) += clk_rk3066.o
 obj-$(CONFIG_ROCKCHIP_RK3128) += clk_rk3128.o
diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
new file mode 100644
index 0000000000..89b18a2f8e
--- /dev/null
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -0,0 +1,577 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#include <common.h>
+#include <bitfield.h>
+#include <clk-uclass.h>
+#include <dm.h>
+#include <errno.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_px30.h>
+#include <asm/arch/hardware.h>
+#include <asm/io.h>
+#include <dm/lists.h>
+#include <dt-bindings/clock/px30-cru.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+enum {
+	VCO_MAX_HZ	= 3200U * 1000000,
+	VCO_MIN_HZ	= 800 * 1000000,
+	OUTPUT_MAX_HZ	= 3200U * 1000000,
+	OUTPUT_MIN_HZ	= 24 * 1000000,
+};
+
+#define DIV_TO_RATE(input_rate, div)    ((input_rate) / ((div) + 1))
+
+#define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\
+	.refdiv = _refdiv,\
+	.fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ),\
+	.postdiv1 = _postdiv1, .postdiv2 = _postdiv2};
+static const struct pll_div apll_init_cfg = PLL_DIVISORS(APLL_HZ, 1, 3, 1);
+static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 1, 4, 1);
+static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 2, 2, 1);
+
+static const struct pll_div apll_816_cfg = PLL_DIVISORS(816 * MHz, 1, 2, 1);
+static const struct pll_div apll_600_cfg = PLL_DIVISORS(600 * MHz, 1, 3, 1);
+
+static const struct pll_div *apll_cfgs[] = {
+	[APLL_816_MHZ] = &apll_816_cfg,
+	[APLL_600_MHZ] = &apll_600_cfg,
+};
+
+/*
+ *  the div restructions of pll in integer mode, these are defined in
+ *  * CRU_*PLL_CON0 or PMUCRU_*PLL_CON0
+ */
+#define PLL_DIV_MIN	16
+#define PLL_DIV_MAX	3200
+
+/*
+ * How to calculate the PLL(from TRM V0.3 Part 1 Page 63):
+ * Formulas also embedded within the Fractional PLL Verilog model:
+ * If DSMPD = 1 (DSM is disabled, "integer mode")
+ * FOUTVCO = FREF / REFDIV * FBDIV
+ * FOUTPOSTDIV = FOUTVCO / POSTDIV1 / POSTDIV2
+ * Where:
+ * FOUTVCO = Fractional PLL non-divided output frequency
+ * FOUTPOSTDIV = Fractional PLL divided output frequency
+ *               (output of second post divider)
+ * FREF = Fractional PLL input reference frequency, (the OSC_HZ 24MHz input)
+ * REFDIV = Fractional PLL input reference clock divider
+ * FBDIV = Integer value programmed into feedback divide
+ *
+ */
+static void rkclk_set_pll(void *pll_base, const struct pll_div *div)
+{
+	struct px30_pll *pll = (struct px30_pll *)pll_base;
+	/* All PLLs have same VCO and output frequency range restrictions. */
+	uint vco_hz = OSC_HZ / 1000 * div->fbdiv / div->refdiv * 1000;
+	uint output_hz = vco_hz / div->postdiv1 / div->postdiv2;
+
+	debug("PLL at %p: fb=%d, ref=%d, pst1=%d, pst2=%d, vco=%u Hz, output=%u Hz\n",
+	      pll, div->fbdiv, div->refdiv, div->postdiv1,
+	      div->postdiv2, vco_hz, output_hz);
+	assert(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ &&
+	       output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ);
+
+	/* use integer mode */
+	rk_setreg(&pll->con1, 1 << PLL_DSMPD_SHIFT);
+	/* Power down */
+	rk_setreg(&pll->con1, 1 << PLL_PD_SHIFT);
+
+	rk_clrsetreg(&pll->con0,
+		     PLL_POSTDIV1_MASK | PLL_FBDIV_MASK,
+		     (div->postdiv1 << PLL_POSTDIV1_SHIFT) | div->fbdiv);
+	rk_clrsetreg(&pll->con1, PLL_POSTDIV2_MASK | PLL_REFDIV_MASK,
+		     (div->postdiv2 << PLL_POSTDIV2_SHIFT |
+		     div->refdiv << PLL_REFDIV_SHIFT));
+
+	/* Power Up */
+	rk_clrreg(&pll->con1, 1 << PLL_PD_SHIFT);
+
+	/* waiting for pll lock */
+	while (readl(&pll->con1) & (1 << PLL_LOCK_STATUS_SHIFT))
+		udelay(1);
+
+	return;
+}
+
+static void rkclk_init(struct px30_cru *cru)
+{
+	u32 aclk_div;
+	u32 hclk_div;
+	u32 pclk_div;
+
+	rk_clrsetreg(&cru->mode, APLL_MODE_MASK,
+		     PLLMUX_FROM_XIN24M << APLL_MODE_SHIFT);
+	rk_clrsetreg(&cru->pmu_mode, GPLL_MODE_MASK,
+		     PLLMUX_FROM_XIN24M << GPLL_MODE_SHIFT);
+
+	/* init pll */
+	rkclk_set_pll(&cru->pll[0] , &apll_816_cfg);
+	rkclk_set_pll(&cru->gpll, &gpll_init_cfg);
+
+	/*
+	 * select apll as cpu/core clock pll source and
+	 * set up dependent divisors for PERI and ACLK clocks.
+	 * core hz : apll = 1:1
+	 */
+	aclk_div = APLL_HZ / CORE_ACLK_HZ - 1;
+	rk_clrsetreg(&cru->clksel_con[0],
+		     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK |
+		     CORE_ACLK_DIV_MASK,
+		     aclk_div << CORE_ACLK_DIV_SHIFT |
+		     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
+		     0 << CORE_DIV_CON_SHIFT);
+
+	/*
+	 * select gpll as pd_bus bus clock source and
+	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
+	 */
+	aclk_div = GPLL_HZ / BUS_ACLK_HZ - 1;
+	hclk_div = GPLL_HZ / BUS_HCLK_HZ - 1;
+	pclk_div = BUS_ACLK_HZ / BUS_PCLK_HZ - 1;
+
+	rk_clrsetreg(&cru->clksel_con[23],
+		     BUS_PLL_SEL_MASK | BUS_ACLK_DIV_MASK,
+		     BUS_PLL_SEL_GPLL << BUS_PLL_SEL_SHIFT |
+		     aclk_div << BUS_ACLK_DIV_SHIFT);
+
+	rk_clrsetreg(&cru->clksel_con[24],
+		     BUS_PCLK_DIV_MASK | BUS_HCLK_DIV_MASK,
+		     pclk_div << BUS_PCLK_DIV_SHIFT |
+		     hclk_div << BUS_HCLK_DIV_SHIFT);
+
+	/*
+	 * select gpll as pd_peri bus clock source and
+	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
+	 */
+	aclk_div = GPLL_HZ / PERI_ACLK_HZ - 1;
+	hclk_div = GPLL_HZ / PERI_HCLK_HZ - 1;
+
+	rk_clrsetreg(&cru->clksel_con[14],
+		     PERI_PLL_SEL_MASK |
+		     PERI_HCLK_DIV_MASK | PERI_ACLK_DIV_MASK,
+		     PERI_PLL_GPLL << PERI_PLL_SEL_SHIFT |
+		     hclk_div << PERI_HCLK_DIV_SHIFT |
+		     aclk_div << PERI_ACLK_DIV_SHIFT);
+
+	rk_clrsetreg(&cru->mode, APLL_MODE_MASK,
+		     PLLMUX_FROM_PLL << APLL_MODE_SHIFT);
+	rk_clrsetreg(&cru->pmu_mode, GPLL_MODE_MASK,
+		     PLLMUX_FROM_PLL << GPLL_MODE_SHIFT);
+}
+
+static ulong px30_i2c_get_clk(struct px30_cru *cru, ulong clk_id)
+{
+	u32 div, con;
+
+	switch (clk_id) {
+	case SCLK_I2C0:
+		break;
+	case SCLK_I2C1:
+		break;
+	case SCLK_I2C2:
+		break;
+	case SCLK_I2C3:
+		break;
+	default:
+		printf("do not support this i2c bus\n");
+		return -EINVAL;
+	}
+
+	return DIV_TO_RATE(GPLL_HZ, div);
+}
+
+static ulong px30_i2c_set_clk(struct px30_cru *cru, ulong clk_id, uint hz)
+{
+	int src_clk_div;
+
+	src_clk_div = GPLL_HZ / hz;
+	assert(src_clk_div - 1 < 127);
+
+	switch (clk_id) {
+	case SCLK_I2C0:
+		break;
+	case SCLK_I2C1:
+		break;
+	case SCLK_I2C2:
+		break;
+	case SCLK_I2C3:
+		break;
+	default:
+		printf("do not support this i2c bus\n");
+		return -EINVAL;
+	}
+
+	return DIV_TO_RATE(GPLL_HZ, src_clk_div);
+}
+
+static ulong px30_mmc_get_clk(struct px30_cru *cru, uint clk_id)
+{
+	u32 div, con, con_id;
+
+	switch (clk_id) {
+	case HCLK_SDMMC:
+	case SCLK_SDMMC:
+		con_id = 16;
+		break;
+	case HCLK_EMMC:
+	case SCLK_EMMC:
+		con_id = 20;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	con = readl(&cru->clksel_con[con_id]);
+	div = (con & EMMC_DIV_MASK) >> EMMC_DIV_SHIFT;
+
+	if ((con & EMMC_PLL_MASK) >> EMMC_PLL_SHIFT
+	    == EMMC_SEL_24M)
+		return DIV_TO_RATE(OSC_HZ, div) / 2;
+	else
+		return DIV_TO_RATE(GPLL_HZ, div) / 2;
+
+}
+
+static ulong px30_mmc_set_clk(struct px30_cru *cru,
+				ulong clk_id, ulong set_rate)
+{
+	int src_clk_div;
+	u32 con_id;
+
+	printf("%s %d %d\n", __func__, clk_id, set_rate);
+	switch (clk_id) {
+	case HCLK_SDMMC:
+	case SCLK_SDMMC:
+		con_id = 16;
+		break;
+	case HCLK_EMMC:
+	case SCLK_EMMC:
+		con_id = 20;
+		break;
+	default:
+		return -EINVAL;
+	}
+	/* Select clk_sdmmc/emmc source from GPLL by default */
+	/* mmc clock defaulg div 2 internal, need provide double in cru */
+	src_clk_div = DIV_ROUND_UP(GPLL_HZ / 2, set_rate);
+
+	if (src_clk_div > 127) {
+		/* use 24MHz source for 400KHz clock */
+		src_clk_div = DIV_ROUND_UP(OSC_HZ / 2, set_rate);
+		rk_clrsetreg(&cru->clksel_con[con_id],
+			     EMMC_PLL_MASK | EMMC_DIV_MASK,
+			     EMMC_SEL_24M << EMMC_PLL_SHIFT |
+			     (src_clk_div - 1) << EMMC_DIV_SHIFT);
+	} else {
+		rk_clrsetreg(&cru->clksel_con[con_id],
+			     EMMC_PLL_MASK | EMMC_DIV_MASK,
+			     EMMC_SEL_GPLL << EMMC_PLL_SHIFT |
+			     (src_clk_div - 1) << EMMC_DIV_SHIFT);
+	}
+	rk_clrsetreg(&cru->clksel_con[con_id +1], EMMC_CLK_SEL_MASK,
+		     EMMC_CLK_SEL_EMMC);
+
+	return px30_mmc_get_clk(cru, clk_id);
+}
+
+static ulong px30_pwm_get_clk(struct px30_cru *cru)
+{
+	u32 div, con;
+
+	return DIV_TO_RATE(GPLL_HZ, div);
+}
+
+static ulong px30_pwm_set_clk(struct px30_cru *cru, uint hz)
+{
+	u32 div = GPLL_HZ / hz;
+
+	return DIV_TO_RATE(GPLL_HZ, div);
+}
+
+static ulong px30_saradc_get_clk(struct px30_cru *cru)
+{
+	u32 div, val;
+
+	return DIV_TO_RATE(OSC_HZ, div);
+}
+
+static ulong px30_saradc_set_clk(struct px30_cru *cru, uint hz)
+{
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1;
+
+	return px30_saradc_get_clk(cru);
+}
+
+static ulong px30_clk_get_rate(struct clk *clk)
+{
+	struct px30_clk_priv *priv = dev_get_priv(clk->dev);
+	ulong rate = 0;
+
+	switch (clk->id) {
+	case 0 ... 15:
+		return 0;
+	case HCLK_SDMMC:
+	case HCLK_EMMC:
+	case SCLK_SDMMC:
+	case SCLK_EMMC:
+		rate = px30_mmc_get_clk(priv->cru, clk->id);
+		break;
+	case SCLK_I2C0:
+	case SCLK_I2C1:
+	case SCLK_I2C2:
+	case SCLK_I2C3:
+		rate = px30_i2c_get_clk(priv->cru, clk->id);
+		break;
+	case SCLK_PWM0:
+		rate = px30_pwm_get_clk(priv->cru);
+		break;
+	case SCLK_SARADC:
+		rate = px30_saradc_get_clk(priv->cru);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return rate;
+}
+
+static ulong px30_clk_set_rate(struct clk *clk, ulong rate)
+{
+	struct px30_clk_priv *priv = dev_get_priv(clk->dev);
+	ulong ret = 0;
+
+	printf("%s %d %d\n", __func__, clk->id, rate);
+	switch (clk->id) {
+	case 0 ... 15:
+		return 0;
+	case HCLK_SDMMC:
+	case HCLK_EMMC:
+	case SCLK_SDMMC:
+	case SCLK_EMMC:
+		ret = px30_mmc_set_clk(priv->cru, clk->id, rate);
+		break;
+	case SCLK_I2C0:
+	case SCLK_I2C1:
+	case SCLK_I2C2:
+	case SCLK_I2C3:
+		ret = px30_i2c_set_clk(priv->cru, clk->id, rate);
+		break;
+	case SCLK_PWM0:
+		ret = px30_pwm_set_clk(priv->cru, rate);
+		break;
+	case SCLK_SARADC:
+		ret = px30_saradc_set_clk(priv->cru, rate);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	printf("%s %d\n", __func__, ret);
+	return ret;
+}
+
+#define ROCKCHIP_MMC_DELAY_SEL		BIT(10)
+#define ROCKCHIP_MMC_DEGREE_MASK	0x3
+#define ROCKCHIP_MMC_DELAYNUM_OFFSET	2
+#define ROCKCHIP_MMC_DELAYNUM_MASK	(0xff << ROCKCHIP_MMC_DELAYNUM_OFFSET)
+
+#define PSECS_PER_SEC 1000000000000LL
+/*
+ * Each fine delay is between 44ps-77ps. Assume each fine delay is 60ps to
+ * simplify calculations. So 45degs could be anywhere between 33deg and 57.8deg.
+ */
+#define ROCKCHIP_MMC_DELAY_ELEMENT_PSEC 60
+
+int rockchip_mmc_get_phase(struct clk *clk)
+{
+	struct px30_clk_priv *priv = dev_get_priv(clk->dev);
+	struct px30_cru *cru = priv->cru;
+	u32 raw_value, delay_num;
+	u16 degrees = 0;
+	ulong rate;
+
+	rate = px30_clk_get_rate(clk);
+
+	if (rate < 0)
+		return rate;
+
+	if (clk->id == SCLK_EMMC_SAMPLE)
+		raw_value = readl(&cru->emmc_con[1]);
+	else
+		raw_value = readl(&cru->sdmmc_con[1]);
+
+	degrees = (raw_value & ROCKCHIP_MMC_DEGREE_MASK) * 90;
+
+	if (raw_value & ROCKCHIP_MMC_DELAY_SEL) {
+		/* degrees/delaynum * 10000 */
+		unsigned long factor = (ROCKCHIP_MMC_DELAY_ELEMENT_PSEC / 10) *
+					36 * (rate / 1000000);
+
+		delay_num = (raw_value & ROCKCHIP_MMC_DELAYNUM_MASK);
+		delay_num >>= ROCKCHIP_MMC_DELAYNUM_OFFSET;
+		degrees += DIV_ROUND_CLOSEST(delay_num * factor, 10000);
+	}
+
+	return degrees % 360;
+}
+
+int rockchip_mmc_set_phase(struct clk *clk, u32 degrees)
+{
+	struct px30_clk_priv *priv = dev_get_priv(clk->dev);
+	struct px30_cru *cru = priv->cru;
+	u8 nineties, remainder, delay_num;
+	u32 raw_value, delay;
+	ulong rate;
+
+	rate = px30_clk_get_rate(clk);
+
+	if (rate < 0)
+		return rate;
+
+	nineties = degrees / 90;
+	remainder = (degrees % 90);
+
+	/*
+	 * Convert to delay; do a little extra work to make sure we
+	 * don't overflow 32-bit / 64-bit numbers.
+	 */
+	delay = 10000000; /* PSECS_PER_SEC / 10000 / 10 */
+	delay *= remainder;
+	delay = DIV_ROUND_CLOSEST(delay, (rate / 1000) * 36 *
+				(ROCKCHIP_MMC_DELAY_ELEMENT_PSEC / 10));
+
+	delay_num = (u8)min_t(u32, delay, 255);
+
+	raw_value = delay_num ? ROCKCHIP_MMC_DELAY_SEL : 0;
+	raw_value |= delay_num << ROCKCHIP_MMC_DELAYNUM_OFFSET;
+	raw_value |= nineties;
+
+	if (clk->id == SCLK_EMMC_SAMPLE)
+		writel(raw_value | 0xffff0000, &cru->emmc_con[1]);
+	else
+		writel(raw_value | 0xffff0000, &cru->sdmmc_con[1]);
+
+	debug("mmc set_phase(%d) delay_nums=%u reg=%#x actual_degrees=%d\n",
+	      degrees, delay_num, raw_value, rockchip_mmc_get_phase(clk));
+
+	return 0;
+}
+
+static int px30_clk_get_phase(struct clk *clk)
+{
+	int ret;
+
+	switch (clk->id) {
+	case SCLK_EMMC_SAMPLE:
+	case SCLK_SDMMC_SAMPLE:
+		ret = rockchip_mmc_get_phase(clk);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+}
+
+static int px30_clk_set_phase(struct clk *clk, int degrees)
+{
+	int ret;
+
+	switch (clk->id) {
+	case SCLK_EMMC_SAMPLE:
+	case SCLK_SDMMC_SAMPLE:
+		ret = rockchip_mmc_set_phase(clk, degrees);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+}
+
+static struct clk_ops px30_clk_ops = {
+	.get_rate = px30_clk_get_rate,
+	.set_rate = px30_clk_set_rate,
+	.get_phase	= px30_clk_get_phase,
+	.set_phase	= px30_clk_set_phase,
+};
+
+static int px30_clk_probe(struct udevice *dev)
+{
+	struct px30_clk_priv *priv = dev_get_priv(dev);
+
+	rkclk_init(priv->cru);
+
+	return 0;
+}
+
+static int px30_clk_ofdata_to_platdata(struct udevice *dev)
+{
+	struct px30_clk_priv *priv = dev_get_priv(dev);
+
+	priv->cru = (struct px30_cru *)devfdt_get_addr(dev);
+
+	return 0;
+}
+
+static int px30_clk_bind(struct udevice *dev)
+{
+	int ret;
+	struct udevice *sys_child, *sf_child;
+	struct sysreset_reg *priv;
+	struct softreset_reg *sf_priv;
+
+	/* The reset driver does not have a device node, so bind it here */
+	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
+				 &sys_child);
+	if (ret) {
+		debug("Warning: No sysreset driver: ret=%d\n", ret);
+	} else {
+		priv = malloc(sizeof(struct sysreset_reg));
+		priv->glb_srst_fst_value = offsetof(struct px30_cru,
+						    glb_srst_fst);
+		priv->glb_srst_snd_value = offsetof(struct px30_cru,
+						    glb_srst_snd);
+		sys_child->priv = priv;
+	}
+
+	ret = device_bind_driver_to_node(dev, "rockchip_reset", "reset",
+					 dev_ofnode(dev), &sf_child);
+	if (ret) {
+		debug("Warning: No rockchip reset driver: ret=%d\n", ret);
+	} else {
+		sf_priv = malloc(sizeof(struct softreset_reg));
+		sf_priv->sf_reset_offset = offsetof(struct px30_cru,
+						    softrst_con[0]);
+		sf_priv->sf_reset_num = 12;
+		sf_child->priv = sf_priv;
+	}
+
+	return 0;
+}
+
+static const struct udevice_id px30_clk_ids[] = {
+	{ .compatible = "rockchip,px30-cru" },
+	{ }
+};
+
+U_BOOT_DRIVER(rockchip_px30_cru) = {
+	.name		= "rockchip_px30_cru",
+	.id		= UCLASS_CLK,
+	.of_match	= px30_clk_ids,
+	.priv_auto_alloc_size = sizeof(struct px30_clk_priv),
+	.ofdata_to_platdata = px30_clk_ofdata_to_platdata,
+	.ops		= &px30_clk_ops,
+	.bind		= px30_clk_bind,
+	.probe		= px30_clk_probe,
+};

commit d14f7e1ef9967e7b1e8b70125c0d2eb27fe5fc06
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Thu Feb 1 15:45:51 2018 +0800

    rockchip: updata the style of reporting sdram cap
    
    updata the style of reporting sdram capacity to uboot
    
    Change-Id: I6a652f233d8d26e842398edcc184cbbe89099401
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rv1108/rv1108.c b/arch/arm/mach-rockchip/rv1108/rv1108.c
index 8a1d7cd8a3..44cf33359e 100644
--- a/arch/arm/mach-rockchip/rv1108/rv1108.c
+++ b/arch/arm/mach-rockchip/rv1108/rv1108.c
@@ -6,6 +6,8 @@
 
 #include <common.h>
 #include <asm/io.h>
+#include <ram.h>
+#include <asm/arch/sdram_common.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/grf_rv1108.h>
 
@@ -32,3 +34,23 @@ void board_debug_uart_init(void)
 #endif /*CONFIG_SPL_BUILD*/
 }
 
+int dram_init(void)
+{
+	struct rv1108_grf *grf = (void *)GRF_BASE;
+
+	gd->ram_size = rockchip_sdram_size((phys_addr_t)&grf->os_reg2);
+
+	return 0;
+}
+
+int dram_init_banksize(void)
+{
+	size_t max_size = min((unsigned long)(gd->ram_size +
+			      CONFIG_SYS_SDRAM_BASE), gd->ram_top);
+
+	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+	gd->bd->bi_dram[0].size = max_size - gd->bd->bi_dram[0].start;
+
+	return 0;
+}
+
diff --git a/board/rockchip/evb_rv1108/evb_rv1108.c b/board/rockchip/evb_rv1108/evb_rv1108.c
index 3538f72046..f497615d9f 100644
--- a/board/rockchip/evb_rv1108/evb_rv1108.c
+++ b/board/rockchip/evb_rv1108/evb_rv1108.c
@@ -3,44 +3,3 @@
  * Authors: Andy Yan <andy.yan@rock-chips.com>
  * SPDX-License-Identifier:     GPL-2.0+
  */
-
-#include <common.h>
-#include <asm/io.h>
-#include <fdtdec.h>
-#include <asm/arch/grf_rv1108.h>
-#include <asm/arch/hardware.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int mach_cpu_init(void)
-{
-	int node;
-	struct rv1108_grf *grf;
-
-	node = fdt_node_offset_by_compatible(gd->fdt_blob, -1, "rockchip,rv1108-grf");
-	grf = (struct rv1108_grf *)fdtdec_get_addr(gd->fdt_blob, node, "reg");
-
-	/*evb board use UART2 m0 for debug*/
-	rk_clrsetreg(&grf->gpio2d_iomux,
-		     GPIO2D2_MASK | GPIO2D1_MASK,
-		     GPIO2D2_UART2_SOUT_M0 << GPIO2D2_SHIFT |
-		     GPIO2D1_UART2_SIN_M0 << GPIO2D1_SHIFT);
-	rk_clrreg(&grf->gpio3c_iomux, GPIO3C3_MASK | GPIO3C2_MASK);
-
-	return 0;
-}
-
-int dram_init(void)
-{
-	gd->ram_size = 0x8000000;
-
-	return 0;
-}
-
-int dram_init_banksize(void)
-{
-	gd->bd->bi_dram[0].start = 0x60000000;
-	gd->bd->bi_dram[0].size = 0x8000000;
-
-	return 0;
-}

commit 52f7b21d4bf4e380d25ecb170591495f0f6f01b3
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Thu Feb 1 15:40:55 2018 +0800

    rockchip: Add RV1108 SPL support
    
    add rv1108 spl support so we can load u-boot from SPL
    
    Change-Id: I9d36cd590a22d26a46dd84bc3ee0c761048f7b01
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 9e55d01bd0..7328ba467e 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -214,6 +214,8 @@ config ROCKCHIP_RK3399
 config ROCKCHIP_RV1108
 	bool "Support Rockchip RV1108"
 	select CPU_V7
+	select SUPPORT_SPL
+	select SPL
 	help
 	  The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
 	  and a DSP.
diff --git a/arch/arm/mach-rockchip/rv1108/clk_rv1108.c b/arch/arm/mach-rockchip/rv1108/clk_rv1108.c
index 968c356447..f65225a661 100644
--- a/arch/arm/mach-rockchip/rv1108/clk_rv1108.c
+++ b/arch/arm/mach-rockchip/rv1108/clk_rv1108.c
@@ -12,8 +12,12 @@
 
 int rockchip_get_clk(struct udevice **devp)
 {
+#ifndef CONFIG_SPL_BUILD
 	return uclass_get_device_by_driver(UCLASS_CLK,
 			DM_GET_DRIVER(clk_rv1108), devp);
+#else
+	return -1;
+#endif
 }
 
 void *rockchip_get_cru(void)
diff --git a/arch/arm/mach-rockchip/rv1108/rv1108.c b/arch/arm/mach-rockchip/rv1108/rv1108.c
index 3b6b21d4f9..8a1d7cd8a3 100644
--- a/arch/arm/mach-rockchip/rv1108/rv1108.c
+++ b/arch/arm/mach-rockchip/rv1108/rv1108.c
@@ -1,7 +1,34 @@
 /*
- * (C) Copyright 2016 Rockchip Electronics Co., Ltd
- * Author: Andy Yan <andy.yan@rock-chips.com>
- * SPDX-License-Identifier:     GPL-2.0+
+ * Copyright (C) 2018 Rockchip Electronics Co., Ltd
+ * Author: Zhihuan He <huan.he@rock-chips.com>
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <common.h>
+#include <asm/io.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/grf_rv1108.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define GRF_BASE		0x10300000
+
+void board_debug_uart_init(void)
+{
+#ifdef CONFIG_SPL_BUILD
+	struct rv1108_grf *grf = (void *)GRF_BASE;
+
+#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0x10230000)
+	rk_clrsetreg(&grf->gpio3a_iomux,	/* UART0 */
+		     GPIO3A6_MASK | GPIO3A5_MASK,
+		     GPIO3A6_UART1_SOUT << GPIO3A6_SHIFT |
+		     GPIO3A5_UART1_SIN << GPIO3A5_SHIFT);
+#else
+	rk_clrsetreg(&grf->gpio2d_iomux,	/* UART2 */
+		     GPIO2D2_MASK | GPIO2D1_MASK,
+		     GPIO2D2_UART2_SOUT_M0 << GPIO2D2_SHIFT |
+		     GPIO2D1_UART2_SIN_M0 << GPIO2D1_SHIFT);
+#endif
+#endif /*CONFIG_SPL_BUILD*/
+}
+
diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
index b1528dfd4e..cb7459e80e 100644
--- a/arch/arm/mach-rockchip/sdram_common.c
+++ b/arch/arm/mach-rockchip/sdram_common.c
@@ -40,6 +40,7 @@ struct tos_parameter_t {
 	s64 reserve[8];
 };
 
+#if defined(CONFIG_SPL_FRAMEWORK) || !defined(CONFIG_SPL_OF_PLATDATA)
 int dram_init_banksize(void)
 {
 	size_t top = min((unsigned long)(gd->ram_size + CONFIG_SYS_SDRAM_BASE),
@@ -66,6 +67,7 @@ int dram_init_banksize(void)
 
 	return 0;
 }
+#endif
 
 size_t rockchip_sdram_size(phys_addr_t reg)
 {
@@ -107,6 +109,7 @@ size_t rockchip_sdram_size(phys_addr_t reg)
 	return (size_t)size_mb << 20;
 }
 
+#if defined(CONFIG_SPL_FRAMEWORK) || !defined(CONFIG_SPL_OF_PLATDATA)
 int dram_init(void)
 {
 	struct ram_info ram;
@@ -129,6 +132,7 @@ int dram_init(void)
 
 	return 0;
 }
+#endif
 
 ulong board_get_usable_ram_top(ulong total_size)
 {
diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index cc12a2afe3..c9f91efeee 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -10,6 +10,7 @@
 #include <ram.h>
 #include <spl.h>
 #include <asm/arch/bootrom.h>
+#include <asm/arch-rockchip/sys_proto.h>
 #include <asm/io.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig
index 1df6d46d98..fe77072827 100644
--- a/configs/evb-rv1108_defconfig
+++ b/configs/evb-rv1108_defconfig
@@ -1,10 +1,18 @@
 CONFIG_ARM=y
+# CONFIG_SPL_USE_ARCH_MEMCPY is not set
+# CONFIG_SPL_USE_ARCH_MEMSET is not set
 CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ROCKCHIP_RV1108=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_TARGET_EVB_RV1108=y
+CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rv1108-evb"
 CONFIG_DEBUG_UART=y
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SPL_STACK_R=y
 CONFIG_FASTBOOT=y
 CONFIG_USB_FUNCTION_FASTBOOT=y
 CONFIG_CMD_FASTBOOT=y
@@ -19,6 +27,8 @@ CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIME=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_SPL_OF_PLATDATA=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
@@ -37,12 +47,15 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
 CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 # CONFIG_SPL_SERIAL_PRESENT is not set
 CONFIG_DEBUG_UART_BASE=0x10210000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_ROCKCHIP_SFC=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
@@ -58,4 +71,5 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Rockchip"
 CONFIG_G_DNL_VENDOR_NUM=0x2207
 CONFIG_G_DNL_PRODUCT_NUM=0x110a
+CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h
index 065ecc8193..4f3f7a0434 100644
--- a/include/configs/rv1108_common.h
+++ b/include/configs/rv1108_common.h
@@ -14,11 +14,20 @@
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
 #define CONFIG_SYS_SDRAM_BASE		0x60000000
+#define SDRAM_MAX_SIZE			0x80000000
 #define CONFIG_NR_DRAM_BANKS		1
 #define CONFIG_SYS_TEXT_BASE		CONFIG_SYS_SDRAM_BASE
 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_TEXT_BASE + 0x100000)
 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x2000000)
 
+/* SPL support */
+#define CONFIG_SPL_STACK		0x10080700
+#define CONFIG_SPL_TEXT_BASE		0x10080800
+#define CONFIG_SPL_MAX_SIZE		0x1700
+
+/* BSS setup */
+#define CONFIG_SPL_BSS_MAX_SIZE		0x100
+
 #define CONFIG_ROCKUSB_G_DNL_PID	0x110A
 
 #define CONFIG_BOUNCE_BUFFER

commit 95b95808a8fc64259adb9b191663720244e58101
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Thu Feb 1 14:44:59 2018 +0800

    rockchip: add rv1108 sdram driver
    
    add rv1108 sdram driver so we can set up sdram in SPL
    
    Change-Id: Iecc6e896921b68ec97bf7d890a61a4ff75d6876b
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rv1108.h b/arch/arm/include/asm/arch-rockchip/cru_rv1108.h
index ad2dc96467..f7b8c13d0f 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rv1108.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rv1108.h
@@ -1,8 +1,9 @@
 /*
- * (C) Copyright 2016 Rockchip Electronics Co., Ltd
- * Author: Andy Yan <andy.yan@rock-chips.com>
- * SPDX-License-Identifier:     GPL-2.0+
+ * Copyright (C) 2018 Rockchip Electronics Co., Ltd
+ * Author: Zhihuan He <huan.he@rock-chips.com>
+ * SPDX-License-Identifier:	GPL-2.0
  */
+
 #ifndef _ASM_ARCH_CRU_RV1108_H
 #define _ASM_ARCH_CRU_RV1108_H
 
@@ -56,61 +57,129 @@ struct pll_div {
 
 enum {
 	/* PLL CON0 */
-	FBDIV_MASK		= 0xfff,
-	FBDIV_SHIFT		= 0,
+	FBDIV_MASK			= 0xfff,
+	FBDIV_SHIFT			= 0,
 
 	/* PLL CON1 */
-	POSTDIV2_SHIFT          = 12,
-	POSTDIV2_MASK		= 7 << POSTDIV2_SHIFT,
-	POSTDIV1_SHIFT          = 8,
-	POSTDIV1_MASK		= 7 << POSTDIV1_SHIFT,
-	REFDIV_MASK		= 0x3f,
-	REFDIV_SHIFT		= 0,
+	POSTDIV2_SHIFT			= 12,
+	POSTDIV2_MASK			= 7 << POSTDIV2_SHIFT,
+	POSTDIV1_SHIFT			= 8,
+	POSTDIV1_MASK			= 7 << POSTDIV1_SHIFT,
+	REFDIV_MASK			= 0x3f,
+	REFDIV_SHIFT			= 0,
 
 	/* PLL CON2 */
-	LOCK_STA_SHIFT          = 31,
-	LOCK_STA_MASK		= 1 << LOCK_STA_SHIFT,
-	FRACDIV_MASK		= 0xffffff,
-	FRACDIV_SHIFT		= 0,
+	LOCK_STA_SHIFT			= 31,
+	LOCK_STA_MASK			= 1 << LOCK_STA_SHIFT,
+	FRACDIV_MASK			= 0xffffff,
+	FRACDIV_SHIFT			= 0,
 
 	/* PLL CON3 */
-	WORK_MODE_SHIFT         = 8,
-	WORK_MODE_MASK		= 1 << WORK_MODE_SHIFT,
-	WORK_MODE_SLOW		= 0,
-	WORK_MODE_NORMAL	= 1,
-	DSMPD_SHIFT             = 3,
-	DSMPD_MASK		= 1 << DSMPD_SHIFT,
+	WORK_MODE_SHIFT			= 8,
+	WORK_MODE_MASK			= 1 << WORK_MODE_SHIFT,
+	WORK_MODE_SLOW			= 0,
+	WORK_MODE_NORMAL		= 1,
+	DSMPD_SHIFT			= 3,
+	DSMPD_MASK			= 1 << DSMPD_SHIFT,
+	INTEGER_MODE			= 1,
+	GLOBAL_POWER_DOWN_SHIFT		= 0,
+	GLOBAL_POWER_DOWN_MASK		= 1 << GLOBAL_POWER_DOWN_SHIFT,
+	GLOBAL_POWER_DOWN		= 1,
+	GLOBAL_POWER_UP			= 0,
 
 	/* CLKSEL0_CON */
-	CORE_PLL_SEL_SHIFT	= 8,
-	CORE_PLL_SEL_MASK	= 3 << CORE_PLL_SEL_SHIFT,
-	CORE_PLL_SEL_APLL	= 0,
-	CORE_PLL_SEL_GPLL	= 1,
-	CORE_PLL_SEL_DPLL	= 2,
-	CORE_CLK_DIV_SHIFT	= 0,
-	CORE_CLK_DIV_MASK	= 0x1f << CORE_CLK_DIV_SHIFT,
+	CORE_PLL_SEL_SHIFT		= 8,
+	CORE_PLL_SEL_MASK		= 3 << CORE_PLL_SEL_SHIFT,
+	CORE_PLL_SEL_APLL		= 0,
+	CORE_PLL_SEL_GPLL		= 1,
+	CORE_PLL_SEL_DPLL		= 2,
+	CORE_CLK_DIV_SHIFT		= 0,
+	CORE_CLK_DIV_MASK		= 0x1f << CORE_CLK_DIV_SHIFT,
+
+	/* CLKSEL_CON1 */
+	PCLK_DBG_DIV_CON_SHIFT		= 4,
+	PCLK_DBG_DIV_CON_MASK		= 0xf << PCLK_DBG_DIV_CON_SHIFT,
+	ACLK_CORE_DIV_CON_SHIFT		= 0,
+	ACLK_CORE_DIV_CON_MASK		= 7 << ACLK_CORE_DIV_CON_SHIFT,
+
+	/* CLKSEL_CON2 */
+	ACLK_BUS_PLL_SEL_SHIFT		= 8,
+	ACLK_BUS_PLL_SEL_MASK		= 3 << ACLK_BUS_PLL_SEL_SHIFT,
+	ACLK_BUS_PLL_SEL_GPLL		= 0,
+	ACLK_BUS_PLL_SEL_APLL		= 1,
+	ACLK_BUS_PLL_SEL_DPLL		= 2,
+	ACLK_BUS_DIV_CON_SHIFT		= 0,
+	ACLK_BUS_DIV_CON_MASK		= 0x1f << ACLK_BUS_DIV_CON_SHIFT,
+
+	/* CLKSEL_CON3 */
+	PCLK_BUS_DIV_CON_SHIFT		= 8,
+	PCLK_BUS_DIV_CON_MASK		= 0x1f << PCLK_BUS_DIV_CON_SHIFT,
+	HCLK_BUS_DIV_CON_SHIFT		= 0,
+	HCLK_BUS_DIV_CON_MASK		= 0x1f,
+
+	/* CLKSEL_CON4 */
+	CLK_DDR_PLL_SEL_SHIFT		= 8,
+	CLK_DDR_PLL_SEL_MASK		= 0x3 << CLK_DDR_PLL_SEL_SHIFT,
+	CLK_DDR_DIV_CON_SHIFT		= 0,
+	CLK_DDR_DIV_CON_MASK		= 0x3 << CLK_DDR_DIV_CON_SHIFT,
 
 	/* CLKSEL_CON22 */
-	CLK_SARADC_DIV_CON_SHIFT= 0,
-	CLK_SARADC_DIV_CON_MASK	= GENMASK(9, 0),
-	CLK_SARADC_DIV_CON_WIDTH= 10,
+	CLK_SARADC_DIV_CON_SHIFT	= 0,
+	CLK_SARADC_DIV_CON_MASK		= GENMASK(9, 0),
+	CLK_SARADC_DIV_CON_WIDTH	= 10,
+
+	/* CLKSEL_CON23 */
+	ACLK_PERI_PLL_SEL_SHIFT		= 15,
+	ACLK_PERI_PLL_SEL_MASK		= 1 << ACLK_PERI_PLL_SEL_SHIFT,
+	ACLK_PERI_PLL_SEL_GPLL		= 0,
+	ACLK_PERI_PLL_SEL_DPLL		= 1,
+	PCLK_PERI_DIV_CON_SHIFT		= 10,
+	PCLK_PERI_DIV_CON_MASK		= 0x1f << PCLK_PERI_DIV_CON_SHIFT,
+	HCLK_PERI_DIV_CON_SHIFT		= 5,
+	HCLK_PERI_DIV_CON_MASK		= 0x1f << HCLK_PERI_DIV_CON_SHIFT,
+	ACLK_PERI_DIV_CON_SHIFT		= 0,
+	ACLK_PERI_DIV_CON_MASK		= 0x1f,
 
 	/* CLKSEL24_CON */
-	MAC_PLL_SEL_SHIFT	= 12,
-	MAC_PLL_SEL_MASK	= 1 << MAC_PLL_SEL_SHIFT,
-	MAC_PLL_SEL_APLL	= 0,
-	MAC_PLL_SEL_GPLL	= 1,
-	RMII_EXTCLK_SEL_SHIFT   = 8,
-	RMII_EXTCLK_SEL_MASK	= 1 << RMII_EXTCLK_SEL_SHIFT,
-	MAC_CLK_DIV_MASK	= 0x1f,
-	MAC_CLK_DIV_SHIFT	= 0,
+	MAC_PLL_SEL_SHIFT		= 12,
+	MAC_PLL_SEL_MASK		= 1 << MAC_PLL_SEL_SHIFT,
+	MAC_PLL_SEL_APLL		= 0,
+	MAC_PLL_SEL_GPLL		= 1,
+	RMII_EXTCLK_SEL_SHIFT		= 8,
+	RMII_EXTCLK_SEL_MASK		= 1 << RMII_EXTCLK_SEL_SHIFT,
+	MAC_CLK_DIV_MASK		= 0x1f,
+	MAC_CLK_DIV_SHIFT		= 0,
 
 	/* CLKSEL27_CON */
-	SFC_PLL_SEL_SHIFT	= 7,
-	SFC_PLL_SEL_MASK	= 1 << SFC_PLL_SEL_SHIFT,
-	SFC_PLL_SEL_DPLL	= 0,
-	SFC_PLL_SEL_GPLL	= 1,
-	SFC_CLK_DIV_SHIFT	= 0,
-	SFC_CLK_DIV_MASK	= 0x3f << SFC_CLK_DIV_SHIFT,
+	SFC_PLL_SEL_SHIFT		= 7,
+	SFC_PLL_SEL_MASK		= 1 << SFC_PLL_SEL_SHIFT,
+	SFC_PLL_SEL_DPLL		= 0,
+	SFC_PLL_SEL_GPLL		= 1,
+	SFC_CLK_DIV_SHIFT		= 0,
+	SFC_CLK_DIV_MASK		= 0x3f << SFC_CLK_DIV_SHIFT,
+
+	/* SOFTRST1_CON*/
+	DDRPHY_SRSTN_CLKDIV_REQ_SHIFT	= 0,
+	DDRPHY_SRSTN_CLKDIV_REQ		= 1,
+	DDRPHY_SRSTN_CLKDIV_DIS		= 0,
+	DDRPHY_SRSTN_CLKDIV_REQ_MASK	= 1 << DDRPHY_SRSTN_CLKDIV_REQ_SHIFT,
+	DDRPHY_SRSTN_REQ_SHIFT		= 1,
+	DDRPHY_SRSTN_REQ		= 1,
+	DDRPHY_SRSTN_DIS		= 0,
+	DDRPHY_SRSTN_REQ_MASK		= 1 << DDRPHY_SRSTN_REQ_SHIFT,
+	DDRPHY_PSRSTN_REQ_SHIFT		= 2,
+	DDRPHY_PSRSTN_REQ		= 1,
+	DDRPHY_PSRSTN_DIS		= 0,
+	DDRPHY_PSRSTN_REQ_MASK		= 1 << DDRPHY_PSRSTN_REQ_SHIFT,
+
+	/* SOFTRST2_CON*/
+	DDRUPCTL_PSRSTN_REQ_SHIFT	= 0,
+	DDRUPCTL_PSRSTN_REQ		= 1,
+	DDRUPCTL_PSRSTN_DIS		= 0,
+	DDRUPCTL_PSRSTN_REQ_MASK	= 1 << DDRUPCTL_PSRSTN_REQ_SHIFT,
+	DDRUPCTL_NSRSTN_REQ_SHIFT	= 1,
+	DDRUPCTL_NSRSTN_REQ		= 1,
+	DDRUPCTL_NSRSTN_DIS		= 0,
+	DDRUPCTL_NSRSTN_REQ_MASK	= 1 << DDRUPCTL_NSRSTN_REQ_SHIFT,
 };
 #endif
diff --git a/arch/arm/include/asm/arch-rockchip/grf_rv1108.h b/arch/arm/include/asm/arch-rockchip/grf_rv1108.h
index c816a5bf8f..a518b05727 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rv1108.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rv1108.h
@@ -1,8 +1,9 @@
 /*
- * (C) Copyright 2016 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
+ * Copyright (C) 2018 Rockchip Electronics Co., Ltd
+ * Author: Zhihuan He <huan.he@rock-chips.com>
+ * SPDX-License-Identifier:	GPL-2.0+
  */
+
 #ifndef _ASM_ARCH_GRF_RV1108_H
 #define _ASM_ARCH_GRF_RV1108_H
 
@@ -108,6 +109,43 @@ struct rv1108_grf {
 };
 check_member(rv1108_grf, chip_id, 0xf90);
 
+struct rv1108_pmu_grf {
+	u32 gpioa_iomux;
+	u32 gpiob_iomux;
+	u32 gpioc_iomux;
+	u32 reserved1;
+	u32 gpioa_p;
+	u32 gpiob_p;
+	u32 gpioc_p;
+	u32 reserved2;
+	u32 gpioa_e;
+	u32 gpiob_e;
+	u32 gpioc_e;
+	u32 reserved3;
+	u32 gpioa_smt;
+	u32 gpiob_smt;
+	u32 gpioc_smt;
+	u32 reserved4;
+	u32 gpio0a_sr;
+	u32 gpio0b_sr;
+	u32 gpio0c_sr;
+	u32 reserved5[(0x100-0x4c)/4];
+	u32 soc_con[4];
+	u32 reserved6[(0x180-0x110)/4];
+	u32 dll_con[2];
+	u32 reserved7[2];
+	u32 dll_status[2];
+	u32 reserved8[(0x200-0x198)/4];
+	u32 os_reg[4];
+	u32 reserved9[(0x300-0x210)/4];
+	u32 fast_boot_addr;
+	u32 reserved10[(0x380-0x304)/4];
+	u32 a7_jtag_mask;
+	u32 reserved11[(0x388-0x384)/4];
+	u32 ceva_jtag_mask;
+};
+check_member(rv1108_pmu_grf, ceva_jtag_mask, 0x388);
+
 /* GRF_GPIO1B_IOMUX */
 enum {
 	GPIO1B7_SHIFT		= 14,
@@ -211,7 +249,7 @@ enum {
 	GPIO1C1_I2S_SDI_M0,
 	GPIO1C1_PWM4,
 
-	GPIO1C0_SHIFT           = 0,
+	GPIO1C0_SHIFT		= 0,
 	GPIO1C0_MASK		= 3,
 	GPIO1C0_GPIO		= 0,
 	GPIO1C0_LCDC_D11,
@@ -285,48 +323,48 @@ enum {
 	GPIO2A6_FLASH_D6,
 	GPIO2A6_EMMC_D6,
 
-	GPIO2A5_SHIFT           = 10,
-	GPIO2A5_MASK            = 3 << GPIO2A5_SHIFT,
-	GPIO2A5_GPIO            = 0,
+	GPIO2A5_SHIFT		= 10,
+	GPIO2A5_MASK		= 3 << GPIO2A5_SHIFT,
+	GPIO2A5_GPIO		= 0,
 	GPIO2A5_FLASH_D5,
 	GPIO2A5_EMMC_D5,
 
-	GPIO2A4_SHIFT           = 8,
-	GPIO2A4_MASK            = 3 << GPIO2A4_SHIFT,
-	GPIO2A4_GPIO            = 0,
+	GPIO2A4_SHIFT		= 8,
+	GPIO2A4_MASK		= 3 << GPIO2A4_SHIFT,
+	GPIO2A4_GPIO		= 0,
 	GPIO2A4_FLASH_D4,
 	GPIO2A4_EMMC_D4,
 
-	GPIO2A3_SHIFT           = 6,
-	GPIO2A3_MASK            = 3 << GPIO2A3_SHIFT,
-	GPIO2A3_GPIO            = 0,
+	GPIO2A3_SHIFT		= 6,
+	GPIO2A3_MASK		= 3 << GPIO2A3_SHIFT,
+	GPIO2A3_GPIO		= 0,
 	GPIO2A3_FLASH_D3,
 	GPIO2A3_EMMC_D3,
 	GPIO2A3_SFC_HOLD_IO3,
 
-	GPIO2A2_SHIFT           = 4,
-	GPIO2A2_MASK            = 3 << GPIO2A2_SHIFT,
-	GPIO2A2_GPIO            = 0,
+	GPIO2A2_SHIFT		= 4,
+	GPIO2A2_MASK		= 3 << GPIO2A2_SHIFT,
+	GPIO2A2_GPIO		= 0,
 	GPIO2A2_FLASH_D2,
 	GPIO2A2_EMMC_D2,
 	GPIO2A2_SFC_WP_IO2,
 
-	GPIO2A1_SHIFT           = 2,
-	GPIO2A1_MASK            = 3 << GPIO2A1_SHIFT,
-	GPIO2A1_GPIO            = 0,
+	GPIO2A1_SHIFT		= 2,
+	GPIO2A1_MASK		= 3 << GPIO2A1_SHIFT,
+	GPIO2A1_GPIO		= 0,
 	GPIO2A1_FLASH_D1,
 	GPIO2A1_EMMC_D1,
 	GPIO2A1_SFC_SO_IO1,
 
-	GPIO2A0_SHIFT           = 0,
-	GPIO2A0_MASK            = 3 << GPIO2A0_SHIFT,
-	GPIO2A0_GPIO            = 0,
+	GPIO2A0_SHIFT		= 0,
+	GPIO2A0_MASK		= 3 << GPIO2A0_SHIFT,
+	GPIO2A0_GPIO		= 0,
 	GPIO2A0_FLASH_D0,
 	GPIO2A0_EMMC_D0,
 	GPIO2A0_SFC_SI_IO0,
 };
 
-/* GRF_GPIO2D_IOMUX */
+/* GRF_GPIO2B_IOMUX */
 enum {
 	GPIO2B7_SHIFT		= 14,
 	GPIO2B7_MASK		= 3 << GPIO2B7_SHIFT,
@@ -334,41 +372,41 @@ enum {
 	GPIO2B7_FLASH_CS1,
 	GPIO2B7_SFC_CLK,
 
-	GPIO2B6_SHIFT           = 12,
-	GPIO2B6_MASK            = 1 << GPIO2B6_SHIFT,
-	GPIO2B6_GPIO            = 0,
+	GPIO2B6_SHIFT		= 12,
+	GPIO2B6_MASK		= 1 << GPIO2B6_SHIFT,
+	GPIO2B6_GPIO		= 0,
 	GPIO2B6_EMMC_CLKO,
 
-	GPIO2B5_SHIFT           = 10,
-	GPIO2B5_MASK            = 1 << GPIO2B5_SHIFT,
-	GPIO2B5_GPIO            = 0,
+	GPIO2B5_SHIFT		= 10,
+	GPIO2B5_MASK		= 1 << GPIO2B5_SHIFT,
+	GPIO2B5_GPIO		= 0,
 	GPIO2B5_FLASH_CS0,
 
-	GPIO2B4_SHIFT           = 8,
-	GPIO2B4_MASK            = 3 << GPIO2B4_SHIFT,
-	GPIO2B4_GPIO            = 0,
+	GPIO2B4_SHIFT		= 8,
+	GPIO2B4_MASK		= 3 << GPIO2B4_SHIFT,
+	GPIO2B4_GPIO		= 0,
 	GPIO2B4_FLASH_RDY,
 	GPIO2B4_EMMC_CMD,
 	GPIO2B4_SFC_CSN0,
 
-	GPIO2B3_SHIFT           = 6,
-	GPIO2B3_MASK            = 1 << GPIO2B3_SHIFT,
-	GPIO2B3_GPIO            = 0,
+	GPIO2B3_SHIFT		= 6,
+	GPIO2B3_MASK		= 1 << GPIO2B3_SHIFT,
+	GPIO2B3_GPIO		= 0,
 	GPIO2B3_FLASH_RDN,
 
-	GPIO2B2_SHIFT           = 4,
-	GPIO2B2_MASK            = 1 << GPIO2B2_SHIFT,
-	GPIO2B2_GPIO            = 0,
+	GPIO2B2_SHIFT		= 4,
+	GPIO2B2_MASK		= 1 << GPIO2B2_SHIFT,
+	GPIO2B2_GPIO		= 0,
 	GPIO2B2_FLASH_WRN,
 
-	GPIO2B1_SHIFT           = 2,
-	GPIO2B1_MASK            = 1 << GPIO2B1_SHIFT,
-	GPIO2B1_GPIO            = 0,
+	GPIO2B1_SHIFT		= 2,
+	GPIO2B1_MASK		= 1 << GPIO2B1_SHIFT,
+	GPIO2B1_GPIO		= 0,
 	GPIO2B1_FLASH_CLE,
 
-	GPIO2B0_SHIFT           = 0,
-	GPIO2B0_MASK            = 1 << GPIO2B0_SHIFT,
-	GPIO2B0_GPIO            = 0,
+	GPIO2B0_SHIFT		= 0,
+	GPIO2B0_MASK		= 1 << GPIO2B0_SHIFT,
+	GPIO2B0_GPIO		= 0,
 	GPIO2B0_FLASH_ALE,
 };
 
@@ -427,12 +465,12 @@ enum {
 	GPIO3A7_GPIO		= 0,
 
 	GPIO3A6_SHIFT		= 12,
-	GPIO3A6_MASK		= 1 << GPIO3A6_SHIFT,
+	GPIO3A6_MASK		= 3 << GPIO3A6_SHIFT,
 	GPIO3A6_GPIO		= 0,
 	GPIO3A6_UART1_SOUT,
 
 	GPIO3A5_SHIFT		= 10,
-	GPIO3A5_MASK		= 1 << GPIO3A5_SHIFT,
+	GPIO3A5_MASK		= 3 << GPIO3A5_SHIFT,
 	GPIO3A5_GPIO		= 0,
 	GPIO3A5_UART1_SIN,
 
@@ -506,4 +544,20 @@ enum {
 	GPIO3C0_GPIO		= 0,
 	GPIO3C0_SDMMC_D3,
 };
+
+enum {
+	/* GRF_SOC_CON0 */
+	MSCH_MAINDDR3_SHIFT		= 4,
+	MSCH_MAINDDR3			= 1 << MSCH_MAINDDR3_SHIFT,
+	MSCH_MAINPARTIALPOP_SHIFT	= 5,
+	MSCH_MAINPARTIALPOP		= 1 << MSCH_MAINPARTIALPOP_SHIFT,
+	MSCH_MAINPARTIALPOP_MASK	= 1 << MSCH_MAINPARTIALPOP_SHIFT,
+};
+
+enum {
+	/* PMU_GRF_SOC_CON0 */
+	DDRPHY_BUFFEREN_CORE_SHIFT	= 2,
+	DDRPHY_BUFFEREN_CORE_MASK	= 1 << DDRPHY_BUFFEREN_CORE_SHIFT,
+	DDRPHY_BUFFEREN_CORE_EN		= 1 << DDRPHY_BUFFEREN_CORE_SHIFT,
+};
 #endif
diff --git a/arch/arm/include/asm/arch-rockchip/pmu_rv1108.h b/arch/arm/include/asm/arch-rockchip/pmu_rv1108.h
new file mode 100644
index 0000000000..f04392b0cf
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/pmu_rv1108.h
@@ -0,0 +1,39 @@
+/*
+ * Copyright (C) 2018 Rockchip Electronics Co., Ltd
+ * Author: Zhihuan He <huan.he@rock-chips.com>
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#ifndef _ASM_ARCH_PMU_RV1108_H
+#define _ASM_ARCH_PMU_RV1108_H
+
+struct rv1108_pmu {
+	u32 wakeup_cfg[3];
+	u32 reserved0[2];
+	u32 pwrmode_core_con;
+	u32 pwrmode_common_con;
+	u32 sft_con;
+	u32 reserved1[7];
+	u32 bus_idle_req;
+	u32 bus_idle_st;
+	u32 reserved2;
+	u32 osc_cnt;
+	u32 plllock_cnt;
+	u32 reserved3;
+	u32 stable_cnt;
+	u32 reserved4;
+	u32 wakeup_rst_clr_cnt;
+	u32 ddr_sref_st;
+	u32 sys_reg[4];
+	u32 timeout_cnt;
+};
+
+check_member(rv1108_pmu, timeout_cnt, 0x0074);
+
+enum { /* PMU_SFT_CON */
+	DDR_IO_RET_SHIFT		= 11,
+	DDR_IO_RET_EN			= 1 << DDR_IO_RET_SHIFT,
+};
+
+#endif
+
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rv1108.h b/arch/arm/include/asm/arch-rockchip/sdram_rv1108.h
new file mode 100644
index 0000000000..96591750ca
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/sdram_rv1108.h
@@ -0,0 +1,68 @@
+/*
+ * Copyright (C) 2018 Rockchip Electronics Co., Ltd
+ * Author: Zhihuan He <huan.he@rock-chips.com>
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _ASM_ARCH_SDRAM_RV1108_H
+#define _ASM_ARCH_SDRAM_RV1108_H
+
+#include <common.h>
+#include <ram.h>
+#include <asm/arch/cru_rv1108.h>
+#include <asm/arch/grf_rv1108.h>
+#include <asm/arch/pmu_rv1108.h>
+#include <asm/arch/sdram_rv1108_pctl_phy.h>
+
+#define SR_IDLE			3
+#define PD_IDLE			64
+#define SDRAM_BEGIN_ADDR	0x60000000
+#define SDRAM_END_ADDR		0x80000000
+#define PATTERN			(0x5aa5f00f)
+
+
+struct rv1108_service_msch {
+	u32 id_coreid;
+	u32 id_revisionid;
+	u32 ddrconf;
+	u32 ddrtiming;
+	u32 ddrmode;
+	u32 readlatency;
+	u32 reserveds1[8];
+	u32 activate;
+	u32 devtodev;
+};
+
+enum {
+	/*memory scheduler ddrtiming*/
+	BWRATIO_HALF_BW				= 0x80000000,
+	BWRATIO_HALF_BW_DIS			= 0x0,
+};
+
+struct dram_info {
+	struct rv1108_cru *cru;
+	struct rv1108_grf *grf;
+	struct rv1108_pmu *pmu;
+	struct rv1108_pmu_grf *pmu_grf;
+	struct ddr_phy *phy;
+	struct ddr_pctl *pctl;
+	struct rv1108_service_msch *service_msch;
+	struct ram_info info;
+};
+
+struct sdram_params {
+	struct ddr_config ddr_config;
+	struct pll_div dpll_init_cfg;
+	struct ddr_timing ddr_timing_t;
+};
+
+void enable_ddr_io_ret(struct dram_info *priv);
+void rkdclk_init(struct dram_info *priv,
+		 struct sdram_params *params_priv);
+void phy_pctrl_reset_cru(struct dram_info *priv);
+void set_bw_grf(struct dram_info *priv);
+void pctl_cfg_grf(struct dram_info *priv);
+int rv1108_sdram_init(struct dram_info *sdram_priv,
+		      struct sdram_params *params_priv);
+
+#endif
diff --git a/arch/arm/include/asm/arch-rockchip/sys_proto.h b/arch/arm/include/asm/arch-rockchip/sys_proto.h
index 3617ac2c60..7b7e336bda 100644
--- a/arch/arm/include/asm/arch-rockchip/sys_proto.h
+++ b/arch/arm/include/asm/arch-rockchip/sys_proto.h
@@ -7,5 +7,8 @@
 #ifndef _ASM_ARCH_SYS_PROTO_H
 #define _ASM_ARCH_SYS_PROTO_H
 
+#ifndef CONFIG_SPL_FRAMEWORK
+void sdram_init(void);
+#endif
 
 #endif /* _ASM_ARCH_SYS_PROTO_H */
diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index 071abb7725..5db731b60b 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -5,7 +5,7 @@
 #
 
 obj-$(CONFIG_ROCKCHIP_RK3368) = dmc-rk3368.o
-obj-$(CONFIG_ROCKCHIP_RV1108) = sdram_rv1108_pctl_phy.o
+obj-$(CONFIG_ROCKCHIP_RV1108) = sdram_rv1108_pctl_phy.o sdram_rv1108.o
 obj-$(CONFIG_ROCKCHIP_RK3128) = sdram_rk3128.o
 obj-$(CONFIG_ROCKCHIP_RK3188) = sdram_rk3188.o
 obj-$(CONFIG_ROCKCHIP_RK322X) = sdram_rk322x.o
diff --git a/drivers/ram/rockchip/sdram_rv1108.c b/drivers/ram/rockchip/sdram_rv1108.c
new file mode 100644
index 0000000000..f068604d3b
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_rv1108.c
@@ -0,0 +1,138 @@
+/*
+ * Copyright (C) 2018 Rockchip Electronics Co., Ltd
+ * Author: Zhihuan He <huan.he@rock-chips.com>
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#include <common.h>
+#include <dm.h>
+#include <dm/root.h>
+#include <dt-structs.h>
+#include <regmap.h>
+#include <asm/io.h>
+#include <asm/types.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/sdram_rv1108.h>
+#include <asm/arch/timer.h>
+#include <asm/arch/sdram_common.h>
+
+struct dram_info info;
+
+struct rockchip_dmc_plat {
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+	struct dtd_rockchip_rv1108_dmc dtplat;
+#else
+	struct sdram_params params;
+#endif
+	struct regmap *map;
+};
+
+void enable_ddr_io_ret(struct dram_info *priv)
+{
+	writel(DDR_IO_RET_EN, &priv->pmu->sft_con);
+	rk_clrsetreg(&priv->pmu_grf->soc_con[0],
+		     DDRPHY_BUFFEREN_CORE_MASK,
+		     DDRPHY_BUFFEREN_CORE_EN);
+}
+
+void rkdclk_init(struct dram_info *priv,
+		 struct sdram_params *params_priv)
+{
+	rk_clrsetreg(&priv->cru->pll[1].con3, WORK_MODE_MASK,
+		     WORK_MODE_SLOW << WORK_MODE_SHIFT);
+	rk_clrsetreg(&priv->cru->pll[1].con3, GLOBAL_POWER_DOWN_MASK,
+		     GLOBAL_POWER_DOWN << GLOBAL_POWER_DOWN_SHIFT);
+	rk_clrsetreg(&priv->cru->pll[1].con3, DSMPD_MASK,
+		     INTEGER_MODE << DSMPD_SHIFT);
+	rk_clrsetreg(&priv->cru->pll[1].con0, FBDIV_MASK,
+		     params_priv->dpll_init_cfg.fbdiv << FBDIV_SHIFT);
+	rk_clrsetreg(&priv->cru->pll[1].con1,
+		     POSTDIV2_MASK | POSTDIV1_MASK | REFDIV_MASK,
+		     params_priv->dpll_init_cfg.postdiv2 << POSTDIV2_SHIFT |
+		     params_priv->dpll_init_cfg.postdiv1 << POSTDIV1_SHIFT |
+		     params_priv->dpll_init_cfg.refdiv << REFDIV_SHIFT);
+	rk_clrsetreg(&priv->cru->pll[1].con3, GLOBAL_POWER_DOWN_MASK,
+		     GLOBAL_POWER_UP << GLOBAL_POWER_DOWN_SHIFT);
+	while (!(readl(&priv->cru->pll[1].con2) & (1u << LOCK_STA_SHIFT)))
+		udelay(1);
+
+	rk_clrsetreg(&priv->cru->clksel_con[4], CLK_DDR_PLL_SEL_MASK |
+		     CLK_DDR_DIV_CON_MASK, 0 << CLK_DDR_PLL_SEL_SHIFT |
+		     0 << CLK_DDR_DIV_CON_SHIFT);
+	rk_clrsetreg(&priv->cru->pll[1].con3, WORK_MODE_MASK,
+		     WORK_MODE_NORMAL << WORK_MODE_SHIFT);
+}
+
+void phy_pctrl_reset_cru(struct dram_info *priv)
+{
+	rk_clrsetreg(&priv->cru->softrst_con[2], DDRUPCTL_PSRSTN_REQ_MASK |
+		     DDRUPCTL_NSRSTN_REQ_MASK,
+		     DDRUPCTL_PSRSTN_REQ << DDRUPCTL_PSRSTN_REQ_SHIFT |
+		     DDRUPCTL_NSRSTN_REQ << DDRUPCTL_NSRSTN_REQ_SHIFT);
+	rk_clrsetreg(&priv->cru->softrst_con[1],
+		     DDRPHY_SRSTN_CLKDIV_REQ_MASK | DDRPHY_SRSTN_REQ_MASK |
+		     DDRPHY_PSRSTN_REQ_MASK,
+		     DDRPHY_SRSTN_CLKDIV_REQ << DDRPHY_SRSTN_CLKDIV_REQ_SHIFT |
+		     DDRPHY_SRSTN_REQ << DDRPHY_SRSTN_REQ_SHIFT |
+		     DDRPHY_PSRSTN_REQ << DDRPHY_PSRSTN_REQ_SHIFT);
+
+	udelay(10);
+
+	rk_clrsetreg(&priv->cru->softrst_con[1],
+		     DDRPHY_SRSTN_CLKDIV_REQ_MASK | DDRPHY_SRSTN_REQ_MASK |
+		     DDRPHY_PSRSTN_REQ_MASK,
+		     DDRPHY_SRSTN_CLKDIV_DIS << DDRPHY_SRSTN_CLKDIV_REQ_SHIFT |
+		     DDRPHY_PSRSTN_DIS << DDRPHY_PSRSTN_REQ_SHIFT |
+		     DDRPHY_SRSTN_DIS << DDRPHY_SRSTN_REQ_SHIFT);
+	udelay(10);
+
+	rk_clrsetreg(&priv->cru->softrst_con[2], DDRUPCTL_PSRSTN_REQ_MASK |
+		     DDRUPCTL_NSRSTN_REQ_MASK,
+		     DDRUPCTL_PSRSTN_DIS << DDRUPCTL_PSRSTN_REQ_SHIFT |
+		     DDRUPCTL_NSRSTN_DIS << DDRUPCTL_NSRSTN_REQ_SHIFT);
+	udelay(10);
+}
+
+void set_bw_grf(struct dram_info *priv)
+{
+	rk_clrsetreg(&priv->grf->soc_con0,
+		     MSCH_MAINPARTIALPOP_MASK,
+		     MSCH_MAINPARTIALPOP);
+}
+
+void pctl_cfg_grf(struct dram_info *priv)
+{
+	writel(RK_SETBITS(MSCH_MAINDDR3 | MSCH_MAINPARTIALPOP),
+	       &priv->grf->soc_con0);
+}
+
+void *get_base_addr(unsigned int *reg, unsigned int offset)
+{
+	u32 p = *(reg + 2 * offset);
+
+	return (void *)p;
+}
+
+void sdram_init(void)
+{
+	int ret;
+	struct dram_info *sdram_priv = &info;
+	struct driver_info *info =
+		ll_entry_start(struct driver_info, driver_info);
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+	struct dtd_rockchip_rv1108_dmc *dtplat = (void *)info->platdata;
+	struct sdram_params *params = (void *)dtplat->rockchip_sdram_params;
+
+	sdram_priv->pctl = get_base_addr((void *)dtplat->reg, 0);
+	sdram_priv->phy = get_base_addr((void *)dtplat->reg, 1);
+	sdram_priv->service_msch = get_base_addr((void *)dtplat->reg, 2);
+	sdram_priv->grf = get_base_addr((void *)dtplat->reg, 3);
+	sdram_priv->pmu_grf = get_base_addr((void *)dtplat->reg, 4);
+	sdram_priv->cru = get_base_addr((void *)dtplat->reg, 5);
+	sdram_priv->pmu = get_base_addr((void *)dtplat->reg, 6);
+#else
+	struct sdram_params *params = (void *)info->platdata;
+#endif
+	ret = rv1108_sdram_init(sdram_priv, params);
+	if (ret)
+		debug("rv1108_sdram_init() fail!");
+}

commit 24b30f4ffb1dcbcf600b79699a1d2650afcdde5f
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Thu Feb 1 14:34:09 2018 +0800

    rockchip: add rv1108 pctl and phy
    
    add rv1108 pctl and phy code
    
    Change-Id: I744b1d47e4e9ac611caeb7457f0ece57d649cdda
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rv1108_pctl_phy.h b/arch/arm/include/asm/arch-rockchip/sdram_rv1108_pctl_phy.h
new file mode 100644
index 0000000000..d8bc6883ac
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/sdram_rv1108_pctl_phy.h
@@ -0,0 +1,551 @@
+/*
+ * Copyright (C) 2018 Rockchip Electronics Co., Ltd
+ * Author: Zhihuan He <huan.he@rock-chips.com>
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _ASM_ARCH_SDRAM_RV1108_PCTL_PHY_H
+#define _ASM_ARCH_SDRAM_RV1108_PCTL_PHY_H
+
+#include <common.h>
+
+struct ddr_pctl {
+	u32 scfg;
+	u32 sctl;
+	u32 stat;
+	u32 intrstat;
+	u32 reserved0[(0x40-0x10)/4];
+	u32 mcmd;
+	u32 powctl;
+	u32 powstat;
+	u32 cmdtstat;
+	u32 cmdtstaten;
+	u32 reserved1[(0x60-0x54)/4];
+	u32 mrrcfg0;
+	u32 mrrstat0;
+	u32 mrrstat1;
+	u32 reserved2[(0x7c-0x6c)/4];
+	u32 mcfg1;
+	u32 mcfg;
+	u32 ppcfg;
+	u32 mstat;
+	u32 lpddr2zqcfg;
+	u32 reserved3;
+	u32 dtupdes;
+	u32 dtuna;
+	u32 dtune;
+	u32 dtuprd0;
+	u32 dtuprd1;
+	u32 dtuprd2;
+	u32 dtuprd3;
+	u32 dtuawdt;
+	u32 reserved4[(0xc0-0xb4)/4];
+	u32 togcnt1u;
+	u32 tinit;
+	u32 trsth;
+	u32 togcnt100n;
+	u32 trefi;
+	u32 tmrd;
+	u32 trfc;
+	u32 trp;
+	u32 trtw;
+	u32 tal;
+	u32 tcl;
+	u32 tcwl;
+	u32 tras;
+	u32 trc;
+	u32 trcd;
+	u32 trrd;
+	u32 trtp;
+	u32 twr;
+	u32 twtr;
+	u32 texsr;
+	u32 txp;
+	u32 txpdll;
+	u32 tzqcs;
+	u32 tzqcsi;
+	u32 tdqs;
+	u32 tcksre;
+	u32 tcksrx;
+	u32 tcke;
+	u32 tmod;
+	u32 trstl;
+	u32 tzqcl;
+	u32 tmrr;
+	u32 tckesr;
+	u32 tdpd;
+	u32 trefi_mem_ddr3;
+	u32 reserved5[(0x180-0x14c)/4];
+	u32 ecccfg;
+	u32 ecctst;
+	u32 eccclr;
+	u32 ecclog;
+	u32 reserved6[(0x200-0x190)/4];
+	u32 dtuwactl;
+	u32 dturactl;
+	u32 dtucfg;
+	u32 dtuectl;
+	u32 dtuwd0;
+	u32 dtuwd1;
+	u32 dtuwd2;
+	u32 dtuwd3;
+	u32 dtuwdm;
+	u32 dturd0;
+	u32 dturd1;
+	u32 dturd2;
+	u32 dturd3;
+	u32 dtulfsrwd;
+	u32 dtulfsrrd;
+	u32 dtueaf;
+	u32 dfitctrldelay;
+	u32 dfiodtcfg;
+	u32 dfiodtcfg1;
+	u32 dfiodtrankmap;
+	u32 dfitphywrdata;
+	u32 dfitphywrlat;
+	u32 dfitphywrdatalat;
+	u32 reserved7;
+	u32 dfitrddataen;
+	u32 dfitphyrdlat;
+	u32 reserved8[(0x270-0x268)/4];
+	u32 dfitphyupdtype0;
+	u32 dfitphyupdtype1;
+	u32 dfitphyupdtype2;
+	u32 dfitphyupdtype3;
+	u32 dfitctrlupdmin;
+	u32 dfitctrlupdmax;
+	u32 dfitctrlupddly;
+	u32 reserved9;
+	u32 dfiupdcfg;
+	u32 dfitrefmski;
+	u32 dfitctrlupdi;
+	u32 reserved10[(0x2ac-0x29c)/4];
+	u32 dfitrcfg0;
+	u32 dfitrstat0;
+	u32 dfitrwrlvlen;
+	u32 dfitrrdlvlen;
+	u32 dfitrrdlvlgateen;
+	u32 dfiststat0;
+	u32 dfistcfg0;
+	u32 dfistcfg1;
+	u32 reserved11;
+	u32 dfitdramclken;
+	u32 dfitdramclkdis;
+	u32 dfistcfg2;
+	u32 dfistparclr;
+	u32 dfistparlog;
+	u32 reserved12[(0x2f0-0x2e4)/4];
+	u32 dfilpcfg0;
+	u32 reserved13[(0x300-0x2f4)/4];
+	u32 dfitrwrlvlresp0;
+	u32 dfitrwrlvlresp1;
+	u32 dfitrwrlvlresp2;
+	u32 dfitrrdlvlresp0;
+	u32 dfitrrdlvlresp1;
+	u32 dfitrrdlvlresp2;
+	u32 dfitrwrlvldelay0;
+	u32 dfitrwrlvldelay1;
+	u32 dfitrwrlvldelay2;
+	u32 dfitrrdlvldelay0;
+	u32 dfitrrdlvldelay1;
+	u32 dfitrrdlvldelay2;
+	u32 dfitrrdlvlgatedelay0;
+	u32 dfitrrdlvlgatedelay1;
+	u32 dfitrrdlvlgatedelay2;
+	u32 dfitrcmd;
+	u32 reserved14[(0x3f8-0x340)/4];
+	u32 ipvr;
+	u32 iptr;
+};
+check_member(ddr_pctl, iptr, 0x03fc);
+
+struct ddr_phy {
+	u32 phy_reg0;
+	u32 phy_reg1;
+	u32 phy_reg2;
+	u32 phy_reg3;
+	u32 reserved0;
+	u32 phy_reg5;
+	u32 phy_reg6;
+	u32 reserveds1[(0x24-0x1c)/4];
+	u32 phy_reg9;
+	u32 reserveds2[(0x2c-0x28)/4];
+	u32 phy_regb;
+	u32 phy_regc;
+	u32 reserveds3[(0x44-0x34)/4];
+	u32 phy_reg11;
+	u32 phy_reg12;
+	u32 phy_reg13;
+	u32 phy_reg14;
+	u32 reserved4;
+	u32 phy_reg16;
+	u32 phy_reg17;
+	u32 phy_reg18;
+	u32 reserveds5[(0x80-0x64)/4];
+	u32 phy_reg20;
+	u32 phy_reg21;
+	u32 reserveds6[(0x98-0x88)/4];
+	u32 phy_reg26;
+	u32 phy_reg27;
+	u32 phy_reg28;
+	u32 reserveds7[(0xac-0xa4)/4];
+	u32 phy_reg2b;
+	u32 reserveds8[(0xb8-0xb0)/4];
+	u32 phy_reg2e;
+	u32 phy_reg2f;
+	u32 phy_reg30;
+	u32 phy_reg31;
+	u32 reserveds9[(0xd8-0xc8)/4];
+	u32 phy_reg36;
+	u32 phy_reg37;
+	u32 phy_reg38;
+	u32 reserveds10[(0xec-0xe4)/4];
+	u32 phy_reg3b;
+	u32 reserveds11[(0xf8-0xf0)/4];
+	u32 phy_reg3e;
+	u32 phy_reg3f;
+	u32 reserveds12[(0x1c0-0x100)/4];
+	u32 phy_reg_skew_cs0data[(0x218-0x1c0)/4];
+	u32 reserveds13[(0x28c-0x218)/4];
+	u32 phy_vref;
+	u32 phy_regdll;/*dll bypass switch reg,0x290*/
+	u32 reserveds14[(0x2c0-0x294)/4];
+	u32 phy_reg_ca_skew[(0x2f8-0x2c0)/4];
+	u32 reserveds15[(0x300-0x2f8)/4];
+	u32 phy_reg_skew_cs1data[(0x358-0x300)/4];
+	u32 reserveds16[(0x3c0-0x358)/4];
+	u32 phy_regf0;
+	u32 phy_regf1;
+	u32 reserveds17[(0x3e8-0x3c8)/4];
+	u32 phy_regfa;
+	u32 phy_regfb;
+	u32 phy_regfc;
+	u32 reserved18;
+	u32 reserved19;
+	u32 phy_regff;
+};
+check_member(ddr_phy, phy_regff, 0x03fc);
+
+struct ddr_timing {
+	u32 freq;
+	struct pctl_timing {
+		u32 togcnt1u;
+		u32 tinit;
+		u32 trsth;
+		u32 togcnt100n;
+		u32 trefi;
+		u32 tmrd;
+		u32 trfc;
+		u32 trp;
+		u32 trtw;
+		u32 tal;
+		u32 tcl;
+		u32 tcwl;
+		u32 tras;
+		u32 trc;
+		u32 trcd;
+		u32 trrd;
+		u32 trtp;
+		u32 twr;
+		u32 twtr;
+		u32 texsr;
+		u32 txp;
+		u32 txpdll;
+		u32 tzqcs;
+		u32 tzqcsi;
+		u32 tdqs;
+		u32 tcksre;
+		u32 tcksrx;
+		u32 tcke;
+		u32 tmod;
+		u32 trstl;
+		u32 tzqcl;
+		u32 tmrr;
+		u32 tckesr;
+		u32 tdpd;
+		u32 trefi_mem_ddr3;
+	} pctl_timing;
+	struct phy_timing {
+		u32 mr[4];
+		u32 bl;
+		u32 cl_al;
+	} phy_timing;
+	u32 noc_timing;
+	u32 readlatency;
+	u32 activate;
+	u32 devtodev;
+};
+
+struct ddr_config {
+	/*
+	 * 000: lpddr
+	 * 001: ddr
+	 * 010: ddr2
+	 * 011: ddr3
+	 * 100: lpddr2-s2
+	 * 101: lpddr2-s4
+	 * 110: lpddr3
+	 */
+	u32 ddr_type;
+	u32 chn_cnt;
+	u32 rank;
+	u32 cs0_row;
+	u32 cs1_row;
+
+	/* 2: 4bank, 3: 8bank */
+	u32 bank;
+	u32 col;
+	/* die buswidth, 2:32bit, 1:16bit, 0:8bit */
+	u32 dbw;
+	/* bw(0: 8bit, 1: 16bit, 2: 32bit) */
+	u32 bw;
+};
+
+enum {
+	PHY_LOW_SPEED_MHZ		= 400,
+	/* PHY_REG0 */
+	CHN_ENABLE_SHIFT		= 4,
+	DQ_16BIT_EN_MASK		= 3 << 4,
+	DQ_16BIT_EN			= 3 << 4,
+	DQ_32BIT_EN_MASK		= 0xf << 4,
+	DQ_32BIT_EN			= 0xf << 4,
+	RESET_DIGITAL_CORE_SHIFT	= 3,
+	RESET_DIGITAL_CORE_MASK		= 1 << RESET_DIGITAL_CORE_SHIFT,
+	RESET_DIGITAL_CORE_ACT		= 0,
+	RESET_DIGITAL_CORE_DIS		= 1,
+	RESET_ANALOG_LOGIC_SHIFT	= 2,
+	RESET_ANALOG_LOGIC_MASK		= 1 << RESET_ANALOG_LOGIC_SHIFT,
+	RESET_ANALOG_LOGIC_ACT		= 0,
+	RESET_ANALOG_LOGIC_DIS		= 1,
+
+	/* PHY_REG1 */
+	MEMORY_SELECT_DDR3		= 0,
+	PHY_BL_8			= 1 << 2,
+
+	/* PHY_REG2 */
+	DQS_GATE_TRAINING_SEL_CS0	= 1 << 5,
+	DQS_GATE_TRAINING_ACT		= 1,
+	DQS_GATE_TRAINING_DIS		= 0,
+
+	/* PHY_REG12 */
+	CMD_PRCOMP_SHIFT		= 3,
+	CMD_PRCOMP_MASK			= 0x1f << CMD_PRCOMP_SHIFT,
+
+	/* DDRPHY_REG13 */
+	CMD_DLL_BYPASS_SHIFT		= 4,
+	CMD_DLL_BYPASS			= 1,
+	CMD_DLL_BYPASS_MASK		= 1,
+	CMD_DLL_BYPASS_DISABLE		= 0,
+
+	/* DDRPHY_REG14 */
+	CK_DLL_BYPASS_SHIFT		= 3,
+	CK_DLL_BYPASS			= 1,
+	CK_DLL_BYPASS_DISABLE		= 0,
+
+	/* DDRPHY_REG26 */
+	LEFT_CHN_A_DQ_DLL_SHIFT		= 4,
+	LEFT_CHN_A_DQ_DLL_BYPASS	= 1,
+	LEFT_CHN_A_DQ_DLL_BYPASS_MASK	= 1,
+	LEFT_CHN_A_DQ_DLL_BYPASS_DIS	= 0,
+
+	/* DDRPHY_REG27 */
+	LEFT_CHN_A_DQS_DLL_SHIFT	= 3,
+	LEFT_CHN_A_DQS_DLL_BYPASS	= 1,
+	LEFT_CHN_A_DQS_DLL_BYPASS_DIS	= 0,
+
+	/* DDRPHY_REG28 */
+	LEFT_CHN_A_READ_DQS_45_DELAY	= 2,
+
+	/* DDRPHY_REG36 */
+	RIGHT_CHN_A_DQ_DLL_SHIFT	= 4,
+	RIGHT_CHN_A_DQ_DLL_BYPASS	= 1,
+	RIGHT_CHN_A_DQ_DLL_BYPASS_MASK	= 1,
+	RIGHT_CHN_A_DQ_DLL_BYPASS_DIS	= 0,
+
+	/* DDRPHY_REG37 */
+	RIGHT_CHN_A_DQS_DLL_SHIFT	= 3,
+	RIGHT_CHN_A_DQS_DLL_BYPASS	= 1,
+	RIGHT_CHN_A_DQS_DLL_BYPASS_DIS	= 0,
+
+	/* DDRPHY_REG38 */
+	RIGHT_CHN_A_READ_DQS_45_DELAY	= 2,
+
+	/* PHY_REGDLL */
+	RIGHT_CHN_A_TX_DQ_BYPASS_SHIFT	= 2,
+	RIGHT_CHN_A_TX_DQ_BYPASS_SET	= 1,
+	RIGHT_CHN_A_TX_DQ_BYPASS_DIS	= 0,
+	LEFT_CHN_A_TX_DQ_BYPASS_SHIFT	= 1,
+	LEFT_CHN_A_TX_DQ_BYPASS_SET	= 1,
+	LEFT_CHN_A_TX_DQ_BYPASS_DIS	= 0,
+	CMD_CK_DLL_BYPASS_SHIFT		= 0,
+	CMD_CK_DLL_BYPASS_SET		= 1,
+	CMD_CK_DLL_BYPASS_DIS		= 0,
+
+	/* PHY_REGFF */
+	CHN_A_TRAINING_DONE_MASK	= 3,
+	CHN_A_HIGH_8BIT_TRAINING_DONE	= 1 << 1,
+	CHN_A_LOW_8BIT_TRAINING_DONE	= 1,
+};
+
+/*PCTL*/
+enum {
+	/* PCTL_SCTL */
+	INIT_STATE				= 0,
+	CFG_STATE				= 1,
+	GO_STATE				= 2,
+	SLEEP_STATE				= 3,
+	WAKEUP_STATE				= 4,
+
+	/* PCTL_STAT*/
+	PCTL_CTL_STAT_MASK			= 0x7,
+	INIT_MEM				= 0,
+	CONFIG					= 1,
+	CONFIG_REQ				= 2,
+	ACCESS					= 3,
+	ACCESS_REQ				= 4,
+	LOW_POWER				= 5,
+	LOW_POWER_ENTRY_REQ			= 6,
+	LOW_POWER_EXIT_REQ			= 7,
+
+	/* PCTL_MCMD */
+	START_CMD				= 0x80000000,
+	RANK_SEL_SHIFT				= 20,
+	RANK_SEL_CS0				= 1,
+	RANK_SEL_CS1				= 2,
+	RANK_SEL_CS0_CS1			= 3,
+	BANK_ADDR_SHIFT				= 17,
+	BANK_ADDR_MASK				= 0x7,
+	CMD_ADDR_SHIFT				= 4,
+	CMD_ADDR_MASK				= 0x1fff,
+	DDR3_DLL_RESET				= 1 << 8,
+	DESELECT_CMD				= 0x0,
+	PREA_CMD				= 0x1,
+	REF_CMD					= 0x2,
+	MRS_CMD					= 0x3,
+	ZQCS_CMD				= 0x4,
+	ZQCL_CMD				= 0x5,
+	RSTL_CMD				= 0x6,
+	MPR_CMD					= 0x8,
+	DFICTRLUPD_CMD				= 0xa,
+	MR0					= 0x0,
+	MR1					= 0x1,
+	MR2					= 0x2,
+	MR3					= 0x3,
+
+	/* PCTL_POWCTL */
+	POWER_UP_START				= 1,
+	POWER_UP_START_MASK			= 1,
+
+	/* PCTL_POWSTAT */
+	POWER_UP_DONE				= 1,
+
+	/*PCTL_PPCFG*/
+	PPMEM_EN_MASK				= 1,
+	PPMEM_EN				= 1,
+	PPMEM_DIS				= 0,
+	/* PCTL_TREFI */
+	UPD_REF					= 0x80000000,
+
+	/* PCTL_DFISTCFG0 */
+	DFI_DATA_BYTE_DISABLE_EN_SHIFT		= 2,
+	DFI_DATA_BYTE_DISABLE_EN		= 1,
+	DFI_FREQ_RATIO_EN_SHIFT			= 1,
+	DFI_FREQ_RATIO_EN			= 1,
+	DFI_INIT_START_SHIFT			= 0,
+	DFI_INIT_START_EN			= 1,
+
+	/* PCTL_DFISTCFG1 */
+	DFI_DRAM_CLK_DISABLE_EN_DPD_SHIFT	= 1,
+	DFI_DRAM_CLK_DISABLE_EN_DPD		= 1,
+	DFI_DRAM_CLK_DISABLE_EN_SHIFT		= 0,
+	DFI_DRAM_CLK_DISABLE_EN			= 1,
+
+	/* PCTL_DFISTCFG2 */
+	PARITY_EN_SHIFT				= 1,
+	PARITY_EN				= 1,
+	PARITY_INTR_EN_SHIFT			= 0,
+	PARITY_INTR_EN				= 1,
+
+	/* PCTL_DFILPCFG0 */
+	DFI_LP_EN_SR_SHIFT			= 8,
+	DFI_LP_EN_SR				= 1,
+	DFI_LP_WAKEUP_SR_SHIFT			= 12,
+	DFI_LP_WAKEUP_SR_32_CYCLES		= 1,
+	DFI_TLP_RESP_SHIFT			= 16,
+	DFI_TLP_RESP				= 5,
+
+	/* PCTL_DFITPHYUPDTYPE0 */
+	TPHYUPD_TYPE0				= 1,
+
+	/* PCTL_DFITPHYRDLAT */
+	TPHY_RDLAT				= 0xd,
+
+	/* PCTL_DFITPHYWRDATA */
+	TPHY_WRDATA				= 0x0,
+
+	/* PCTL_DFIUPDCFG */
+	DFI_PHYUPD_DISABLE			= 0 << 1,
+	DFI_CTRLUPD_DISABLE			= 0,
+
+	/* PCTL_DFIODTCFG */
+	RANK0_ODT_WRITE_SEL_SHIFT		= 3,
+	RANK0_ODT_WRITE_SEL			= 1,
+	RANK1_ODT_WRITE_SEL_SHIFT		= 11,
+	RANK1_ODT_WRITE_SEL			= 1,
+
+	/* PCTL_DFIODTCFG1 */
+	ODT_LEN_BL8_W_SHIFT			= 16,
+	ODT_LEN_BL8_W				= 7,
+
+	/* PCTL_MCFG */
+	MDDR_LPDDR23_CLOCK_STOP_IDLE_DIS	= 0 << 24,
+	DDR3_EN					= 1 << 5,
+	MEM_BL_8				= 1,
+	TFAW_CFG_5_TDDR				= 1 << 18,
+	PD_EXIT_SLOW_EXIT_MODE			= 0 << 17,
+	PD_TYPE_ACT_PD				= 1 << 16,
+	PD_IDLE_DISABLE				= 0 << 8,
+	PD_IDLE_MASK				= 0xff << 8,
+	PD_IDLE_SHIFT				= 8,
+
+	/* PCTL_MCFG1 */
+	SR_IDLE_MASK				= 0xff,
+	HW_EXIT_IDLE_EN_SHIFT			= 31,
+	HW_EXIT_IDLE_EN_MASK			= 1 << HW_EXIT_IDLE_EN_SHIFT,
+	HW_EXIT_IDLE_EN				= 1 << HW_EXIT_IDLE_EN_SHIFT,
+
+	/* PCTL_SCFG */
+	HW_LOW_POWER_EN				= 1,
+};
+
+enum {
+	/* PHY_DDR3_RON_RTT */
+	PHY_RON_RTT_DISABLE			= 0,
+	PHY_RON_RTT_451OHM			= 1,
+	PHY_RON_RTT_225OHM			= 2,
+	PHY_RON_RTT_150OHM			= 3,
+	PHY_RON_RTT_112OHM			= 4,
+	PHY_RON_RTT_90OHM			= 5,
+	PHY_RON_RTT_75OHM			= 6,
+	PHY_RON_RTT_64OHM			= 7,
+
+	PHY_RON_RTT_56OHM			= 16,
+	PHY_RON_RTT_50OHM			= 17,
+	PHY_RON_RTT_45OHM			= 18,
+	PHY_RON_RTT_41OHM			= 19,
+	PHY_RON_RTT_37OHM			= 20,
+	PHY_RON_RTT_34OHM			= 21,
+	PHY_RON_RTT_33OHM			= 22,
+	PHY_RON_RTT_30OHM			= 23,
+
+	PHY_RON_RTT_28OHM			= 24,
+	PHY_RON_RTT_26OHM			= 25,
+	PHY_RON_RTT_25OHM			= 26,
+	PHY_RON_RTT_23OHM			= 27,
+	PHY_RON_RTT_22OHM			= 28,
+	PHY_RON_RTT_21OHM			= 29,
+	PHY_RON_RTT_20OHM			= 30,
+	PHY_RON_RTT_19OHM			= 31,
+};
+
+#endif
diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index 2cae3c6061..071abb7725 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -5,6 +5,7 @@
 #
 
 obj-$(CONFIG_ROCKCHIP_RK3368) = dmc-rk3368.o
+obj-$(CONFIG_ROCKCHIP_RV1108) = sdram_rv1108_pctl_phy.o
 obj-$(CONFIG_ROCKCHIP_RK3128) = sdram_rk3128.o
 obj-$(CONFIG_ROCKCHIP_RK3188) = sdram_rk3188.o
 obj-$(CONFIG_ROCKCHIP_RK322X) = sdram_rk322x.o
diff --git a/drivers/ram/rockchip/sdram_rv1108_pctl_phy.c b/drivers/ram/rockchip/sdram_rv1108_pctl_phy.c
new file mode 100644
index 0000000000..d5b6749251
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_rv1108_pctl_phy.c
@@ -0,0 +1,467 @@
+/*
+ * Copyright (C) 2018 Rockchip Electronics Co., Ltd
+ * Author: Zhihuan He <huan.he@rock-chips.com>
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#include <common.h>
+#include <dm.h>
+#include <dm/root.h>
+#include <dt-structs.h>
+#include <ram.h>
+#include <regmap.h>
+#include <asm/io.h>
+#include <asm/types.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/sdram_rv1108_pctl_phy.h>
+#include <asm/arch/timer.h>
+#include <asm/arch/sdram_common.h>
+
+#if defined(CONFIG_ROCKCHIP_RV1108)
+#include <asm/arch/sdram_rv1108.h>
+#elif defined(CONFIG_ROCKCHIP_RK3308)
+#include <asm/arch/sdram_rk3308.h>
+#endif
+
+/*
+ * we can not fit the code to access the device tree in SPL
+ * (due to 6K SRAM size limits), so these are hard-coded
+ */
+
+static void copy_to_reg(u32 *dest, const u32 *src, u32 n)
+{
+	int i;
+
+	for (i = 0; i < n / sizeof(u32); i++) {
+		writel(*src, dest);
+		src++;
+		dest++;
+	}
+}
+
+static void phy_pctrl_reset(struct dram_info *priv)
+{
+	phy_pctrl_reset_cru(priv);
+	clrsetbits_le32(&priv->phy->phy_reg0,
+			RESET_DIGITAL_CORE_MASK | RESET_ANALOG_LOGIC_MASK,
+			RESET_DIGITAL_CORE_ACT << RESET_DIGITAL_CORE_SHIFT |
+			RESET_ANALOG_LOGIC_ACT << RESET_ANALOG_LOGIC_SHIFT);
+	udelay(1);
+	clrsetbits_le32(&priv->phy->phy_reg0,
+			RESET_ANALOG_LOGIC_MASK,
+			RESET_ANALOG_LOGIC_DIS << RESET_ANALOG_LOGIC_SHIFT);
+	udelay(5);
+	clrsetbits_le32(&priv->phy->phy_reg0,
+			RESET_DIGITAL_CORE_MASK,
+			RESET_DIGITAL_CORE_DIS << RESET_DIGITAL_CORE_SHIFT);
+	udelay(1);
+}
+
+static void phy_dll_bypass_set(struct dram_info *priv, unsigned int freq)
+{
+	clrsetbits_le32(&priv->phy->phy_reg13, CMD_DLL_BYPASS_MASK,
+			CMD_DLL_BYPASS << CMD_DLL_BYPASS_SHIFT);
+
+	writel(CK_DLL_BYPASS_DISABLE << CK_DLL_BYPASS_SHIFT,
+	       &priv->phy->phy_reg14);
+
+	clrsetbits_le32(&priv->phy->phy_reg26, LEFT_CHN_A_DQ_DLL_BYPASS_MASK,
+			LEFT_CHN_A_DQ_DLL_BYPASS << LEFT_CHN_A_DQ_DLL_SHIFT);
+	writel(LEFT_CHN_A_DQS_DLL_BYPASS_DIS <<
+	       LEFT_CHN_A_DQS_DLL_SHIFT, &priv->phy->phy_reg27);
+
+	clrsetbits_le32(&priv->phy->phy_reg36, RIGHT_CHN_A_DQ_DLL_BYPASS_MASK,
+			RIGHT_CHN_A_DQ_DLL_BYPASS <<
+			RIGHT_CHN_A_DQ_DLL_SHIFT);
+	writel(RIGHT_CHN_A_DQS_DLL_BYPASS_DIS <<
+	       RIGHT_CHN_A_DQS_DLL_SHIFT, &priv->phy->phy_reg37);
+
+	if (freq <= PHY_LOW_SPEED_MHZ) {
+		writel(RIGHT_CHN_A_TX_DQ_BYPASS_SET <<
+		       RIGHT_CHN_A_TX_DQ_BYPASS_SHIFT |
+		       LEFT_CHN_A_TX_DQ_BYPASS_SET <<
+		       LEFT_CHN_A_TX_DQ_BYPASS_SHIFT |
+		       CMD_CK_DLL_BYPASS_SET << CMD_CK_DLL_BYPASS_SHIFT,
+		       &priv->phy->phy_regdll);
+	} else {
+		writel(RIGHT_CHN_A_TX_DQ_BYPASS_DIS <<
+		       RIGHT_CHN_A_TX_DQ_BYPASS_SHIFT |
+		       LEFT_CHN_A_TX_DQ_BYPASS_DIS <<
+		       LEFT_CHN_A_TX_DQ_BYPASS_SHIFT |
+		       CMD_CK_DLL_BYPASS_DIS << CMD_CK_DLL_BYPASS_SHIFT,
+				&priv->phy->phy_regdll);
+	}
+
+	/* 45 degree delay */
+	writel(LEFT_CHN_A_READ_DQS_45_DELAY, &priv->phy->phy_reg28);
+	writel(RIGHT_CHN_A_READ_DQS_45_DELAY, &priv->phy->phy_reg38);
+}
+
+static void send_command(struct dram_info *priv,
+			 u32 rank, u32 cmd, u32 arg)
+{
+	writel((START_CMD | (rank << RANK_SEL_SHIFT) | arg | cmd),
+	       &priv->pctl->mcmd);
+	while (readl(&priv->pctl->mcmd) & START_CMD)
+		;
+}
+
+static void memory_init(struct dram_info *priv,
+			struct sdram_params *params_priv)
+{
+	send_command(priv, RANK_SEL_CS0_CS1, DESELECT_CMD, 0);
+	udelay(1);
+	send_command(priv, RANK_SEL_CS0_CS1, PREA_CMD, 0);
+
+	send_command(priv, RANK_SEL_CS0_CS1, DESELECT_CMD, 0);
+	udelay(1);
+	send_command(priv, RANK_SEL_CS0_CS1, MRS_CMD,
+		     (MR2 & BANK_ADDR_MASK) << BANK_ADDR_SHIFT |
+		     (params_priv->ddr_timing_t.phy_timing.mr[2] &
+		     CMD_ADDR_MASK) << CMD_ADDR_SHIFT);
+
+	send_command(priv, RANK_SEL_CS0_CS1, MRS_CMD,
+		     (MR3 & BANK_ADDR_MASK) << BANK_ADDR_SHIFT |
+		     (params_priv->ddr_timing_t.phy_timing.mr[3] &
+		     CMD_ADDR_MASK) << CMD_ADDR_SHIFT);
+
+	send_command(priv, RANK_SEL_CS0_CS1, MRS_CMD,
+		     (MR1 & BANK_ADDR_MASK) << BANK_ADDR_SHIFT |
+		     (params_priv->ddr_timing_t.phy_timing.mr[1] &
+		     CMD_ADDR_MASK) << CMD_ADDR_SHIFT);
+
+	send_command(priv, RANK_SEL_CS0_CS1, MRS_CMD,
+		     (MR0 & BANK_ADDR_MASK) << BANK_ADDR_SHIFT |
+		     (params_priv->ddr_timing_t.phy_timing.mr[0] &
+		     CMD_ADDR_MASK) << CMD_ADDR_SHIFT | DDR3_DLL_RESET);
+
+	send_command(priv, RANK_SEL_CS0_CS1, ZQCL_CMD, 0);
+}
+
+static void set_bw(struct dram_info *priv,
+		   struct sdram_params *params_priv)
+{
+	if (readl(&params_priv->ddr_config.bw) == 1) {
+		clrsetbits_le32(&priv->pctl->ppcfg, PPMEM_EN_MASK, PPMEM_EN);
+		clrsetbits_le32(&priv->phy->phy_reg0, DQ_16BIT_EN_MASK,
+				DQ_16BIT_EN);
+		set_bw_grf(priv);
+		clrsetbits_le32(&priv->service_msch->ddrtiming,
+				BWRATIO_HALF_BW, BWRATIO_HALF_BW);
+	}
+}
+
+static void move_to_config_state(struct dram_info *priv)
+{
+	unsigned int state;
+
+	while (1) {
+		state = readl(&priv->pctl->stat) & PCTL_CTL_STAT_MASK;
+		switch (state) {
+		case LOW_POWER:
+			writel(WAKEUP_STATE, &priv->pctl->sctl);
+			while ((readl(&priv->pctl->stat) & PCTL_CTL_STAT_MASK)
+				!= ACCESS)
+				;
+			/*
+			 * If at low power state, need wakeup first, and then
+			 * enter the config, so fallthrough
+			 */
+		case ACCESS:
+		case INIT_MEM:
+			writel(CFG_STATE, &priv->pctl->sctl);
+			while ((readl(&priv->pctl->stat) & PCTL_CTL_STAT_MASK)
+				!= CONFIG)
+				;
+			break;
+		case CONFIG:
+			return;
+		default:
+			break;
+		}
+	}
+}
+
+static void move_to_access_state(struct dram_info *priv)
+{
+	unsigned int state;
+
+	while (1) {
+		state = readl(&priv->pctl->stat) & PCTL_CTL_STAT_MASK;
+		switch (state) {
+		case LOW_POWER:
+			writel(WAKEUP_STATE, &priv->pctl->sctl);
+			while ((readl(&priv->pctl->stat) &
+				PCTL_CTL_STAT_MASK) != ACCESS)
+				;
+			break;
+		case INIT_MEM:
+			writel(CFG_STATE, &priv->pctl->sctl);
+			while ((readl(&priv->pctl->stat) &
+				PCTL_CTL_STAT_MASK) != CONFIG)
+				;
+			/* fallthrough */
+		case CONFIG:
+			writel(GO_STATE, &priv->pctl->sctl);
+			while ((readl(&priv->pctl->stat) &
+				PCTL_CTL_STAT_MASK) != ACCESS)
+				;
+			break;
+		case ACCESS:
+			return;
+		default:
+			break;
+		}
+	}
+}
+
+static void pctl_cfg(struct dram_info *priv,
+		     struct sdram_params *params_priv)
+{
+	u32 reg;
+
+	/* DFI config */
+	writel(DFI_DATA_BYTE_DISABLE_EN << DFI_DATA_BYTE_DISABLE_EN_SHIFT |
+	       DFI_INIT_START_EN << DFI_INIT_START_SHIFT,
+	       &priv->pctl->dfistcfg0);
+	writel(DFI_DRAM_CLK_DISABLE_EN_DPD <<
+	       DFI_DRAM_CLK_DISABLE_EN_DPD_SHIFT |
+	       DFI_DRAM_CLK_DISABLE_EN << DFI_DRAM_CLK_DISABLE_EN_SHIFT,
+	       &priv->pctl->dfistcfg1);
+	writel(PARITY_EN << PARITY_EN_SHIFT |
+	       PARITY_INTR_EN << PARITY_INTR_EN_SHIFT, &priv->pctl->dfistcfg2);
+	writel(DFI_LP_EN_SR << DFI_LP_EN_SR_SHIFT |
+	       DFI_LP_WAKEUP_SR_32_CYCLES << DFI_LP_WAKEUP_SR_SHIFT |
+	       DFI_TLP_RESP << DFI_TLP_RESP_SHIFT,
+	       &priv->pctl->dfilpcfg0);
+
+	writel(TPHYUPD_TYPE0, &priv->pctl->dfitphyupdtype0);
+	writel(TPHY_RDLAT, &priv->pctl->dfitphyrdlat);
+	writel(TPHY_WRDATA, &priv->pctl->dfitphywrdata);
+
+	writel(DFI_PHYUPD_DISABLE | DFI_CTRLUPD_DISABLE,
+	       &priv->pctl->dfiupdcfg);
+
+	copy_to_reg(&priv->pctl->togcnt1u,
+		    &(params_priv->ddr_timing_t.pctl_timing.togcnt1u),
+		    sizeof(struct pctl_timing));
+
+	writel((RANK0_ODT_WRITE_SEL << RANK0_ODT_WRITE_SEL_SHIFT |
+	       RANK1_ODT_WRITE_SEL << RANK1_ODT_WRITE_SEL_SHIFT),
+	       &priv->pctl->dfiodtcfg);
+
+	writel(ODT_LEN_BL8_W << ODT_LEN_BL8_W_SHIFT,
+	       &priv->pctl->dfiodtcfg1);
+
+	reg = readl(&priv->pctl->tcl);
+	writel((reg - 1) / 2 - 1, &priv->pctl->dfitrddataen);
+	reg = readl(&priv->pctl->tcwl);
+	writel((reg - 1) / 2 - 1, &priv->pctl->dfitphywrlat);
+
+	writel(params_priv->ddr_timing_t.pctl_timing.trsth, &priv->pctl->trsth);
+	writel(MDDR_LPDDR23_CLOCK_STOP_IDLE_DIS | DDR3_EN | MEM_BL_8 |
+	       TFAW_CFG_5_TDDR | PD_EXIT_SLOW_EXIT_MODE |
+	       PD_TYPE_ACT_PD | PD_IDLE_DISABLE, &priv->pctl->mcfg);
+
+	pctl_cfg_grf(priv);
+	setbits_le32(&priv->pctl->scfg, HW_LOW_POWER_EN);
+}
+
+static void phy_cfg(struct dram_info *priv,
+		    struct sdram_params *params_priv)
+{
+	writel((readl(&priv->service_msch->ddrtiming) & BWRATIO_HALF_BW)|
+	       params_priv->ddr_timing_t.noc_timing,
+	       &priv->service_msch->ddrtiming);
+	writel(params_priv->ddr_timing_t.readlatency,
+	       &priv->service_msch->readlatency);
+	writel(params_priv->ddr_timing_t.activate,
+	       &priv->service_msch->activate);
+	writel(params_priv->ddr_timing_t.devtodev,
+	       &priv->service_msch->devtodev);
+
+	writel(MEMORY_SELECT_DDR3 | PHY_BL_8, &priv->phy->phy_reg1);
+
+	writel(params_priv->ddr_timing_t.phy_timing.cl_al,
+	       &priv->phy->phy_regb);
+	writel(params_priv->ddr_timing_t.pctl_timing.tcwl,
+	       &priv->phy->phy_regc);
+
+	writel(PHY_RON_RTT_34OHM, &priv->phy->phy_reg11);
+	clrsetbits_le32(&priv->phy->phy_reg12, CMD_PRCOMP_MASK,
+			PHY_RON_RTT_34OHM << CMD_PRCOMP_SHIFT);
+	writel(PHY_RON_RTT_45OHM, &priv->phy->phy_reg16);
+	writel(PHY_RON_RTT_45OHM, &priv->phy->phy_reg18);
+	writel(PHY_RON_RTT_34OHM, &priv->phy->phy_reg20);
+	writel(PHY_RON_RTT_34OHM, &priv->phy->phy_reg2f);
+	writel(PHY_RON_RTT_34OHM, &priv->phy->phy_reg30);
+	writel(PHY_RON_RTT_34OHM, &priv->phy->phy_reg3f);
+	writel(PHY_RON_RTT_225OHM, &priv->phy->phy_reg21);
+	writel(PHY_RON_RTT_225OHM, &priv->phy->phy_reg2e);
+	writel(PHY_RON_RTT_225OHM, &priv->phy->phy_reg31);
+	writel(PHY_RON_RTT_225OHM, &priv->phy->phy_reg3e);
+}
+
+static void dram_cfg_rbc(struct dram_info *priv,
+			 struct sdram_params *params_priv)
+{
+	int i = 0;
+
+	move_to_config_state(priv);
+#if defined(CONFIG_ROCKCHIP_RV1108)
+	if (params_priv->ddr_config.col == 10)
+		i = 2;
+	else
+		i = 3;
+#elif defined(CONFIG_ROCKCHIP_RK3308)
+
+#endif
+	writel(i, &priv->service_msch->ddrconf);
+	move_to_access_state(priv);
+}
+
+static void enable_low_power(struct dram_info *priv)
+{
+	move_to_config_state(priv);
+
+	clrsetbits_le32(&priv->pctl->mcfg, PD_IDLE_MASK,
+			PD_IDLE << PD_IDLE_SHIFT);
+	clrsetbits_le32(&priv->pctl->mcfg1, SR_IDLE_MASK | HW_EXIT_IDLE_EN_MASK,
+			SR_IDLE | HW_EXIT_IDLE_EN);
+
+	/* uPCTL in low_power status because of auto self-refreh */
+	writel(GO_STATE, &priv->pctl->sctl);
+}
+
+static void data_training(struct dram_info *priv)
+{
+	u32 value;
+	u32 tmp = 0;
+
+	/* disable auto refresh */
+	value = readl(&priv->pctl->trefi);
+	writel(UPD_REF, &priv->pctl->trefi);
+
+	writel(DQS_GATE_TRAINING_SEL_CS0 | DQS_GATE_TRAINING_DIS,
+	       &priv->phy->phy_reg2);
+	writel(DQS_GATE_TRAINING_SEL_CS0 | DQS_GATE_TRAINING_ACT,
+	       &priv->phy->phy_reg2);
+
+	/* delay untill data training done */
+	while (tmp != (CHN_A_HIGH_8BIT_TRAINING_DONE |
+	       CHN_A_LOW_8BIT_TRAINING_DONE)) {
+		udelay(1);
+		tmp = (readl(&priv->phy->phy_regff) & CHN_A_TRAINING_DONE_MASK);
+	}
+
+	writel(DQS_GATE_TRAINING_SEL_CS0 | DQS_GATE_TRAINING_DIS,
+	       &priv->phy->phy_reg2);
+
+	send_command(priv, RANK_SEL_CS0_CS1, PREA_CMD, 0);
+
+	writel(value | UPD_REF, &priv->pctl->trefi);
+}
+
+static u32 sdram_detect(struct dram_info *priv,
+			struct sdram_params *params_priv)
+{
+	u32 row, col, row_max, col_max;
+	u32 test_addr;
+
+	move_to_config_state(priv);
+#if defined(CONFIG_ROCKCHIP_RV1108)
+	writel(1, &priv->service_msch->ddrconf);
+	col_max = 11;
+	row_max = 16;
+#elif defined(CONFIG_ROCKCHIP_RK3308)
+
+#endif
+	move_to_access_state(priv);
+
+	/* detect col */
+	for (col = col_max; col >= 10; col--) {
+		writel(0, SDRAM_BEGIN_ADDR);
+		test_addr = SDRAM_BEGIN_ADDR + (1u << (col +
+				params_priv->ddr_config.bw - 1u));
+		writel(PATTERN, test_addr);
+		if ((readl(test_addr) == PATTERN) &&
+		    (readl(SDRAM_BEGIN_ADDR) == 0))
+				break;
+	}
+	if (col <= 8)
+		goto cap_err;
+	params_priv->ddr_config.col = col;
+
+	/* detect row */
+	col = col_max;
+	for (row = row_max; row >= 12; row--) {
+		writel(0, SDRAM_BEGIN_ADDR);
+		test_addr = SDRAM_BEGIN_ADDR + (1u << (row +
+				params_priv->ddr_config.bank + col +
+				params_priv->ddr_config.bw - 1u));
+		writel(PATTERN, test_addr);
+		if ((readl(test_addr) == PATTERN) &&
+		    (readl(SDRAM_BEGIN_ADDR) == 0))
+			break;
+	}
+	if (row <= 11)
+		goto cap_err;
+	params_priv->ddr_config.cs0_row = row;
+	return 0;
+cap_err:
+	return 1;
+}
+
+static void sdram_all_config(struct dram_info *priv,
+			     struct sdram_params *params_priv)
+{
+	u32 os_reg = 0;
+	u32 cs1_row = 0;
+
+	if (params_priv->ddr_config.rank > 1)
+		cs1_row = params_priv->ddr_config.cs1_row - 13;
+
+	os_reg = params_priv->ddr_config.ddr_type << SYS_REG_DDRTYPE_SHIFT |
+		 params_priv->ddr_config.chn_cnt << SYS_REG_NUM_CH_SHIFT |
+		 (params_priv->ddr_config.rank - 1) << SYS_REG_RANK_SHIFT(0) |
+		 (params_priv->ddr_config.col - 9) << SYS_REG_COL_SHIFT(0) |
+		 (params_priv->ddr_config.bank == 3 ? 0 : 1) <<
+		 SYS_REG_BK_SHIFT(0) |
+		 (params_priv->ddr_config.cs0_row - 13) <<
+		 SYS_REG_CS0_ROW_SHIFT(0) |
+		 cs1_row << SYS_REG_CS1_ROW_SHIFT(0) |
+		 params_priv->ddr_config.bw << SYS_REG_BW_SHIFT(0) |
+		 params_priv->ddr_config.dbw << SYS_REG_DBW_SHIFT(0);
+
+	writel(os_reg, &priv->grf->os_reg2);
+}
+
+int rv1108_sdram_init(struct dram_info *sdram_priv,
+		      struct sdram_params *params_priv)
+{
+	/* pmu enable ddr io retention */
+	enable_ddr_io_ret(sdram_priv);
+	rkdclk_init(sdram_priv, params_priv);
+	phy_pctrl_reset(sdram_priv);
+	phy_dll_bypass_set(sdram_priv, params_priv->ddr_timing_t.freq);
+	pctl_cfg(sdram_priv, params_priv);
+	phy_cfg(sdram_priv, params_priv);
+
+	writel(POWER_UP_START, &sdram_priv->pctl->powctl);
+	while (!(readl(&sdram_priv->pctl->powstat) & POWER_UP_DONE))
+		;
+
+	memory_init(sdram_priv, params_priv);
+	move_to_config_state(sdram_priv);
+	set_bw(sdram_priv, params_priv);
+	data_training(sdram_priv);
+	move_to_access_state(sdram_priv);
+	if (sdram_detect(sdram_priv, params_priv)) {
+		while (1)
+			;
+	}
+	dram_cfg_rbc(sdram_priv, params_priv);
+	sdram_all_config(sdram_priv, params_priv);
+	enable_low_power(sdram_priv);
+
+	return 0;
+}

commit a36e90ea68fd408308ce581469d287a466716850
Author: Zhihuan He <huan.he@rockchip.com>
Date:   Thu Feb 1 11:19:50 2018 +0800

    rockchip: add rv1108 sdram dts
    
    add rv1108 sdram dts,and we can transmit params through dts.
    
    Change-Id: I7d5d1de720205d746db38f69a28e6f3eddc9058d
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

diff --git a/arch/arm/dts/rv1108-evb.dts b/arch/arm/dts/rv1108-evb.dts
index ed3ebf20cf..568e082a53 100644
--- a/arch/arm/dts/rv1108-evb.dts
+++ b/arch/arm/dts/rv1108-evb.dts
@@ -7,6 +7,7 @@
 /dts-v1/;
 
 #include "rv1108.dtsi"
+#include "rv1108-sdram-ddr3-400.dtsi"
 
 / {
 	model = "Rockchip RV1108 Evaluation board";
diff --git a/arch/arm/dts/rv1108-sdram-ddr3-400.dtsi b/arch/arm/dts/rv1108-sdram-ddr3-400.dtsi
new file mode 100644
index 0000000000..220f86c5ad
--- /dev/null
+++ b/arch/arm/dts/rv1108-sdram-ddr3-400.dtsi
@@ -0,0 +1,76 @@
+/*
+ * Copyright (C) 2017 Rockchip Electronics Co., Ltd
+ * Author: zhihuan he <huan.he@rock-chips.com>
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+&dmc {
+        rockchip,sdram-params = <
+		0x3
+		0x0
+		0x1
+		0x0
+		0x0
+		0x3
+		0x0
+		0x1
+		0x1
+
+		1
+		133
+		4
+		1
+		0
+
+		0xc8
+
+		0xc8
+		0xc8
+		0x1f4
+		0x14
+		0x4e
+		0x4
+		0x78
+		0x6
+		0x3
+		0x0
+		0x6
+		0x5
+		0xf
+		0x15
+		0x6
+		0x4
+		0x4
+		0x6
+		0x4
+		0x200
+		0x3
+		0xa
+		0x40
+		0x2710
+		0x1
+		0x5
+		0x5
+		0x3
+		0xc
+		0x28
+		0x100
+		0x0
+		0x4
+		0x0
+		0x618
+
+		0x420
+		0x40
+		0x0
+		0x0
+
+		0x01
+		0x60
+
+		0x9028b18a
+		0x18
+		0x4a4
+		0x15
+	>;
+};
diff --git a/arch/arm/dts/rv1108.dtsi b/arch/arm/dts/rv1108.dtsi
index e7863e239f..7349239007 100644
--- a/arch/arm/dts/rv1108.dtsi
+++ b/arch/arm/dts/rv1108.dtsi
@@ -545,4 +545,16 @@
 			};
 		};
 	};
+
+	dmc: dmc@202b0000 {
+                u-boot,dm-pre-reloc;
+                compatible = "rockchip,rv1108-dmc";
+                reg = <0x202b0000 0x400
+		       0x20210000 0x400
+		       0x31070000 0x40
+		       0x10300000 0xf94
+		       0x20060000 0x38c
+		       0x20200000 0x1f0
+		       0x20010000 0x78>;
+        };
 };

commit f52e474fa56c54cb6f713c71291c399fcf0580f9
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jan 26 11:14:49 2018 +0800

    android: support slot suffix
    
    If the device support the AB system, must add the slot suffix
    to partition.
    
    Change-Id: Ibac54109dd937e22a76e6fa68e9fdd1c0be48cc1
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 102ed9215e..1295e0215c 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -362,7 +362,7 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	int part_num;
 	int ret;
 	char *command_line;
-	char slot_suffix[3];
+	char slot_suffix[3] = {0};
 	const char *mode_cmdline = NULL;
 	char *boot_partname = ANDROID_PARTITION_BOOT;
 	ulong fdt_addr;
@@ -404,12 +404,10 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 		return android_bootloader_boot_bootloader();
 	}
 
-	slot_suffix[0] = '\0';
 #ifdef CONFIG_AVB_LIBAVB_USER
 	/*TODO: get from pre-loader or misc partition*/
-	slot_suffix[0] = '_';
-	slot_suffix[1] = 'a';
-	slot_suffix[2] = '\0';
+	if (avb_get_current_slot(slot_suffix))
+		return -1;
 #endif
 
 	/*

commit c6d59f035ff4a9fda15b274e1948f8c12909fcf5
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Thu Feb 1 11:25:01 2018 +0800

    spi: rockchip sfc: remove header file
    
    The header file only used in sfc driver itself, so
    we can move the all definition in header file to
    the c source file.
    
    Change-Id: I255a54e2570e79caea03287d8c6c8700d30e4fdd
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/drivers/spi/rockchip_sfc.c b/drivers/spi/rockchip_sfc.c
index 67d0fc2121..f81d87b1f1 100644
--- a/drivers/spi/rockchip_sfc.c
+++ b/drivers/spi/rockchip_sfc.c
@@ -1,10 +1,10 @@
 /*
- * sfc driver for rockchip
+ * SFC driver for rockchip
  *
- * (C) Copyright 2008-2016 Rockchip Electronics
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
  * Yifeng.zhao, Software Engineering, <zhao0116@gmail.com>.
  *
- * SPDX-License-Identifier:	GPL-2.0+
+ * SPDX-License-Identifier:     GPL-2.0+
  */
 
 #include <common.h>
@@ -19,10 +19,83 @@
 #include <asm/arch/clock.h>
 #include <asm/arch/periph.h>
 #include <dm/pinctrl.h>
-#include "rockchip_sfc.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
+struct rockchip_sfc_reg {
+	u32 ctrl;
+	u32 imr;
+	u32 iclr;
+	u32 ftlr;
+	u32 rcvr;
+	u32 ax;
+	u32 abit;
+	u32 isr;
+	u32 fsr;
+	u32 sr;
+	u32 risr;
+	u32 reserved[21];
+	u32 dmatr;
+	u32 dmaaddr;
+	u32 reserved1[30];
+	u32 cmd;
+	u32 addr;
+	u32 data;
+};
+check_member(rockchip_sfc_reg, data, 0x108);
+
+/*SFC_CTRL*/
+#define SFC_DATA_WIDTH_SHIFT	12
+#define SFC_DATA_WIDTH_MASK	GENMASK(13, 12)
+#define SFC_ADDR_WIDTH_SHIFT	10
+#define SFC_ADDR_WIDTH_MASK	GENMASK(11, 10)
+#define SFC_CMD_WIDTH_SHIFT	8
+#define SFC_CMD_WIDTH_MASK	GENMASK(9, 8)
+#define SFC_DATA_SHIFT_NEGETIVE	BIT(1)
+
+/*SFC_CMD*/
+#define SFC_DUMMY_BITS_SHIFT	8
+#define SFC_RW_SHIFT		12
+#define SFC_WR			1
+#define SFC_RD			0
+#define SFC_ADDR_BITS_SHIFT	14
+#define SFC_ADDR_BITS_MASK	GENMASK(15, 14)
+#define SFC_ADDR_0BITS		0
+#define SFC_ADDR_24BITS		1
+#define SFC_ADDR_32BITS		2
+#define SFC_ADDR_XBITS		3
+#define SFC_TRB_SHIFT		(16)
+#define SFC_TRB_MASK		GENMASK(29, 16)
+
+/* Dma start trigger signal. Auto cleared after write */
+#define SFC_DMA_START		BIT(0)
+
+#define SFC_RESET		BIT(0)
+
+/*SFC_FSR*/
+#define SFC_RXLV_SHIFT		(16)
+#define SFC_RXLV_MASK		GENMASK(20, 16)
+#define SFC_TXLV_SHIFT		(8)
+#define SFC_TXLV_MASK		GENMASK(12, 8)
+#define SFC_RX_FULL		BIT(3)	/* rx fifo full */
+#define SFC_RX_EMPTY		BIT(2)	/* rx fifo empty */
+#define SFC_TX_EMPTY		BIT(1)	/* tx fifo empty */
+#define SFC_TX_FULL		BIT(0)	/* tx fifo full */
+
+#define SFC_BUSY		BIT(0)	/* sfc busy flag */
+
+/*SFC_RISR*/
+#define DMA_FINISH_INT		BIT(7)        /* dma interrupt */
+#define SPI_ERR_INT		BIT(6)        /* Nspi error interrupt */
+#define AHB_ERR_INT		BIT(5)        /* Ahb bus error interrupt */
+#define TRANS_FINISH_INT	BIT(4)        /* Transfer finish interrupt */
+#define TX_EMPTY_INT		BIT(3)        /* Tx fifo empty interrupt */
+#define TX_OF_INT		BIT(2)        /* Tx fifo overflow interrupt */
+#define RX_UF_INT		BIT(1)        /* Rx fifo underflow interrupt */
+#define RX_FULL_INT		BIT(0)        /* Rx fifo full interrupt */
+
+#define SFC_MAX_TRB		(512 * 31)
+
 enum rockchip_sfc_if_type {
 	IF_TYPE_STD,
 	IF_TYPE_DUAL,
diff --git a/drivers/spi/rockchip_sfc.h b/drivers/spi/rockchip_sfc.h
deleted file mode 100644
index 25f4937c60..0000000000
--- a/drivers/spi/rockchip_sfc.h
+++ /dev/null
@@ -1,87 +0,0 @@
-/*
- * sfc driver for rockchip
- *
- * (C) Copyright 2008-2016 Rockchip Electronics
- * Yifeng.zhao, Software Engineering, <zhao0116@gmail.com>.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef __RK_SFC_H
-#define __RK_SFC_H
-
-struct rockchip_sfc_reg {
-	u32 ctrl;
-	u32 imr;
-	u32 iclr;
-	u32 ftlr;
-	u32 rcvr;
-	u32 ax;
-	u32 abit;
-	u32 isr;
-	u32 fsr;
-	u32 sr;
-	u32 risr;
-	u32 reserved[21];
-	u32 dmatr;
-	u32 dmaaddr;
-	u32 reserved1[30];
-	u32 cmd;
-	u32 addr;
-	u32 data;
-};
-check_member(rockchip_sfc_reg, data, 0x108);
-
-/*SFC_CTRL*/
-#define SFC_DATA_WIDTH_SHIFT	12
-#define SFC_DATA_WIDTH_MASK	GENMASK(13, 12)
-#define SFC_ADDR_WIDTH_SHIFT	10
-#define SFC_ADDR_WIDTH_MASK	GENMASK(11, 10)
-#define SFC_CMD_WIDTH_SHIFT	8
-#define SFC_CMD_WIDTH_MASK	GENMASK(9, 8)
-#define SFC_DATA_SHIFT_NEGETIVE	BIT(1)
-
-/*SFC_CMD*/
-#define SFC_DUMMY_BITS_SHIFT	8
-#define SFC_RW_SHIFT		12
-#define SFC_WR			1
-#define SFC_RD			0
-#define SFC_ADDR_BITS_SHIFT	14
-#define SFC_ADDR_BITS_MASK	GENMASK(15, 14)
-#define SFC_ADDR_0BITS		0
-#define SFC_ADDR_24BITS		1
-#define SFC_ADDR_32BITS		2
-#define SFC_ADDR_XBITS		3
-#define SFC_TRB_SHIFT		(16)
-#define SFC_TRB_MASK		GENMASK(29, 16)
-
-/* Dma start trigger signal. Auto cleared after write */
-#define SFC_DMA_START		BIT(0)
-
-#define SFC_RESET		BIT(0)
-
-/*SFC_FSR*/
-#define SFC_RXLV_SHIFT		(16)
-#define SFC_RXLV_MASK		GENMASK(20, 16)
-#define SFC_TXLV_SHIFT		(8)
-#define SFC_TXLV_MASK		GENMASK(12, 8)
-#define SFC_RX_FULL		BIT(3)	/* rx fifo full */
-#define SFC_RX_EMPTY		BIT(2)	/* rx fifo empty */
-#define SFC_TX_EMPTY		BIT(1)	/* tx fifo empty */
-#define SFC_TX_FULL		BIT(0)	/* tx fifo full */
-
-#define SFC_BUSY		BIT(0)	/* sfc busy flag */
-
-/*SFC_RISR*/
-#define DMA_FINISH_INT		BIT(7)        /* dma interrupt */
-#define SPI_ERR_INT		BIT(6)        /* Nspi error interrupt */
-#define AHB_ERR_INT		BIT(5)        /* Ahb bus error interrupt */
-#define TRANS_FINISH_INT	BIT(4)        /* Transfer finish interrupt */
-#define TX_EMPTY_INT		BIT(3)        /* Tx fifo empty interrupt */
-#define TX_OF_INT		BIT(2)        /* Tx fifo overflow interrupt */
-#define RX_UF_INT		BIT(1)        /* Rx fifo underflow interrupt */
-#define RX_FULL_INT		BIT(0)        /* Rx fifo full interrupt */
-
-#define SFC_MAX_TRB		(512 * 31)
-
-#endif

commit be63f83e22b2d158da8682eda1a778327f55c9d7
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Thu Feb 1 10:57:51 2018 +0800

    arm: dts: rockchip: enable quad mode for spi-nor read
    
    Standard read/write mode:
    
    => sf test 0x8000 0x200000
    SPI flash test:
    0 erase: 14078 ticks, 145 KiB/s 1.160 Mbps
    1 check: 484 ticks, 4231 KiB/s 33.848 Mbps
    2 write: 4914 ticks, 416 KiB/s 3.328 Mbps
    3 read: 355 ticks, 5769 KiB/s 46.152 Mbps
    Test passed
    0 erase: 14078 ticks, 145 KiB/s 1.160 Mbps
    1 check: 484 ticks, 4231 KiB/s 33.848 Mbps
    2 write: 4914 ticks, 416 KiB/s 3.328 Mbps
    3 read: 355 ticks, 5769 KiB/s 46.152 Mbps
    
    Quad mode read
    Standard mode write:
    
    => sf test 0x0 0x500000
    SPI flash test:
    0 erase: 35738 ticks, 143 KiB/s 1.144 Mbps
    1 check: 555 ticks, 9225 KiB/s 73.800 Mbps
    2 write: 12291 ticks, 416 KiB/s 3.328 Mbps
    3 read: 231 ticks, 22164 KiB/s 177.312 Mbps
    Test passed
    0 erase: 35738 ticks, 143 KiB/s 1.144 Mbps
    1 check: 555 ticks, 9225 KiB/s 73.800 Mbps
    2 write: 12291 ticks, 416 KiB/s 3.328 Mbps
    3 read: 231 ticks, 22164 KiB/s 177.312 Mbps
    
    Change-Id: I39e49778dd503de9836099990fd1186771c08546
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/dts/rv1108-evb.dts b/arch/arm/dts/rv1108-evb.dts
index 71bdcd2207..ed3ebf20cf 100644
--- a/arch/arm/dts/rv1108-evb.dts
+++ b/arch/arm/dts/rv1108-evb.dts
@@ -49,7 +49,7 @@
 		compatible = "gd25q256","spi-flash";
 		reg = <0>;
 		spi-tx-bus-width = <1>;
-		spi-rx-bus-width = <1>;
+		spi-rx-bus-width = <4>;
 		spi-max-frequency = <96000000>;
 	};
 };

commit 30f161d1009a2f329748014028ac10500b5f97b9
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Thu Feb 1 10:51:33 2018 +0800

    spi: rockchip sfc: split read/write transfer
    
    The read/write mechanism of spi-nor are different:
    
    For write: upper spi flash framework will split write request
    page by page chunk, and the underlying spi nor driver must
    handle all the chunk(chunk_len <= page_size) from upper framework
    in one transfer, then the upper framework will check the flash_ready
    status, then send next chunk.
    
    For read: the upper spi flash framework will send all the
    read request in one transfer, buf the underlying spi nor driver
    may not be able to transfer them in one time(if trb > SFC_MAX_TRB),
    so the underlying spi nor controller driver need to split the read
    request at this condition.
    
    Change-Id: I0a8970c066e41bbdb997909c7fefb96829318ce4
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/drivers/spi/rockchip_sfc.c b/drivers/spi/rockchip_sfc.c
index 0c7314a170..67d0fc2121 100644
--- a/drivers/spi/rockchip_sfc.c
+++ b/drivers/spi/rockchip_sfc.c
@@ -199,7 +199,7 @@ static void rockchip_sfc_setup_xfer(struct rockchip_sfc *sfc, u32 trb)
 		writel(sfc->addr, &regs->addr);
 }
 
-static int rockchip_sfc_do_dma_xfer(struct rockchip_sfc *sfc, u32 *buffer, u32 trb)
+static int rockchip_sfc_dma_xfer(struct rockchip_sfc *sfc, void *buffer, size_t trb)
 {
 	struct rockchip_sfc_reg *regs = sfc->regbase;
 	struct bounce_buffer bb;
@@ -214,9 +214,10 @@ static int rockchip_sfc_do_dma_xfer(struct rockchip_sfc *sfc, u32 *buffer, u32 t
 	else
 		bb_flags = GEN_BB_WRITE;
 
-	ret = bounce_buffer_start(&bb, (void *)buffer, trb, bb_flags);
+	ret = bounce_buffer_start(&bb, buffer, trb, bb_flags);
 	if (ret)
 		return ret;
+
 	rockchip_sfc_setup_xfer(sfc, bb.len_aligned);
 
 	writel(0xFFFFFFFF, &regs->iclr);
@@ -241,24 +242,6 @@ static int rockchip_sfc_do_dma_xfer(struct rockchip_sfc *sfc, u32 *buffer, u32 t
 	return ret;
 }
 
-static int rockchip_sfc_dma_xfer(struct rockchip_sfc *sfc, u32 *buf, u32 len)
-{
-	u32 trb;
-	int ret = 0;
-
-	while (len) {
-		trb = min(len, (u32)SFC_MAX_TRB);
-		ret = rockchip_sfc_do_dma_xfer(sfc, buf, trb);
-		if (ret < 0)
-			break;
-		len -= trb;
-		sfc->addr += trb;
-		buf += (trb >> 2);
-	}
-
-	return ret;
-}
-
 static int rockchip_sfc_wait_fifo_ready(struct rockchip_sfc *sfc, int rw,
 					u32 timeout)
 {
@@ -343,48 +326,81 @@ static int rockchip_sfc_read_fifo(struct rockchip_sfc *sfc, u32 *buf, u32 len)
 	return 0;
 }
 
-static int rockchip_sfc_pio_xfer(struct rockchip_sfc *sfc, u32 *buf, u32 len)
+static int rockchip_sfc_pio_xfer(struct rockchip_sfc *sfc, void *buf, u32 len)
 {
 	int ret = 0;
 
 	rockchip_sfc_setup_xfer(sfc, len);
+
 	if (len) {
 		if (sfc->rw == SFC_WR)
-			ret = rockchip_sfc_write_fifo(sfc, buf, len);
+			ret = rockchip_sfc_write_fifo(sfc, (u32 *)buf, len);
 		else
-			ret = rockchip_sfc_read_fifo(sfc, buf, len);
+			ret = rockchip_sfc_read_fifo(sfc, (u32 *)buf, len);
 	}
 
 	return ret;
 }
 
-static int rockchip_sfc_do_xfer(struct rockchip_sfc *sfc, u32 *buf, u32 len)
+static int rockchip_sfc_read(struct rockchip_sfc *sfc, u32 offset,
+                             void *buf, size_t len)
 {
-	int ret = 0;
-	u32 bytes = len & 0x3;
 	u32 dma_trans;
+	u32 trb;
+	u8 bytes;
+	int ret;
 
 	if (len >= ARCH_DMA_MINALIGN) {
+		bytes = len & (ARCH_DMA_MINALIGN - 1);
 		dma_trans = len - bytes;
 	} else {
 		dma_trans = 0;
 		bytes = len;
 	}
 
-	if (dma_trans) {
-		ret = rockchip_sfc_dma_xfer(sfc, buf, dma_trans);
-		buf += (dma_trans  >> 2);
+	while (dma_trans) {
+		trb = min_t(size_t, dma_trans, SFC_MAX_TRB);
+		ret = rockchip_sfc_dma_xfer(sfc, buf, trb);
+		if (ret < 0)
+			return ret;
+		dma_trans -= trb;
+		sfc->addr += trb;
+		buf += trb;
 	}
 
 	/*
-	 * transfer the last non 4 bytes anligned byte by pio mode
-	 * there are also some commands like WREN(0x06) that execute
-	 * whth no data, we also need to handle it here.
+	 * transfer the last non dma anligned byte by pio mode
 	 */
-	if (bytes || (!bytes && !dma_trans))
+	if (bytes)
 		ret = rockchip_sfc_pio_xfer(sfc, buf, bytes);
 
-	return ret;
+	return 0;
+}
+
+static int rockchip_sfc_write(struct rockchip_sfc *sfc, u32 offset,
+                              void *buf, size_t len)
+{
+
+	if (len > SFC_MAX_TRB) {
+		printf("out of the max sfc trb");
+		return -EINVAL;
+	}
+
+	if (len && !(len & (ARCH_DMA_MINALIGN - 1)))
+		return rockchip_sfc_dma_xfer(sfc, buf, len);
+	else
+		return rockchip_sfc_pio_xfer(sfc, buf,len);
+
+	return 0;
+}
+
+static int rockchip_sfc_do_xfer(struct rockchip_sfc *sfc, void *buf, size_t len)
+{
+
+	if (sfc->rw)
+		return rockchip_sfc_write(sfc, sfc->addr, buf, len);
+	else
+		return rockchip_sfc_read(sfc, sfc->addr, buf, len);
 }
 
 static int rockchip_sfc_xfer(struct udevice *dev, unsigned int bitlen,
@@ -394,6 +410,7 @@ static int rockchip_sfc_xfer(struct udevice *dev, unsigned int bitlen,
 	struct rockchip_sfc *sfc = dev_get_priv(bus);
 	int len = bitlen >> 3;
 	u8 *pcmd = (u8 *)dout;
+	void *data_buf;
 	int ret = 0;
 
 	if (flags & SPI_XFER_BEGIN) {
@@ -409,18 +426,22 @@ static int rockchip_sfc_xfer(struct udevice *dev, unsigned int bitlen,
 		}
 	}
 
-	if (flags == (SPI_XFER_BEGIN | SPI_XFER_END))
-		len = 0;
-
 	if (flags & SPI_XFER_END) {
 
 		if (din) {
 			sfc->rw = SFC_RD;
-			ret = rockchip_sfc_do_xfer(sfc, (u32 *)din, len);
-		} else if (dout) {
+			data_buf = din;
+		} else {
 			sfc->rw = SFC_WR;
-			ret = rockchip_sfc_do_xfer(sfc, (u32 *)dout, len);
+			data_buf = (void *)dout;
 		}
+
+		if (flags == (SPI_XFER_BEGIN | SPI_XFER_END)) {
+			len = 0;
+			data_buf = NULL;
+		}
+
+		ret = rockchip_sfc_do_xfer(sfc, data_buf, len);
 	}
 
 	return ret;

commit 37911cf692cce29e3f96fb66eeee9675405e47a7
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Jan 29 14:43:51 2018 +0800

    spi: rockchip sfc: use bounce buffer to deal with data transfer between cpu and sfc in dma mode
    
    Bounce buffer implementation takes care of proper data buffer alignemt
    and correct flush/invalidation of data cache at once so we no longer
    depend on input data variety and make sure CPU and SFC controller deal
    with expected data in case of enabled data cache.
    
    Bounce buffer requires to add its definition (CONFIG_BOUNCE_BUFFER) in
    board configuration, otherwise corresponding library won't be compiled
    and linker will fail to build resulting executable.
    
    Change-Id: Idbd0499d7ce2baa9cbbb04ade97ddb5bf49952ac
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/drivers/spi/rockchip_sfc.c b/drivers/spi/rockchip_sfc.c
index 48f2457338..0c7314a170 100644
--- a/drivers/spi/rockchip_sfc.c
+++ b/drivers/spi/rockchip_sfc.c
@@ -8,6 +8,7 @@
  */
 
 #include <common.h>
+#include <bouncebuf.h>
 #include <clk.h>
 #include <dm.h>
 #include <dt-structs.h>
@@ -201,15 +202,25 @@ static void rockchip_sfc_setup_xfer(struct rockchip_sfc *sfc, u32 trb)
 static int rockchip_sfc_do_dma_xfer(struct rockchip_sfc *sfc, u32 *buffer, u32 trb)
 {
 	struct rockchip_sfc_reg *regs = sfc->regbase;
+	struct bounce_buffer bb;
+	unsigned int bb_flags;
 	int timeout = 1000;
 	int ret = 0;
 	int risr;
 	unsigned long tbase;
 
-	rockchip_sfc_setup_xfer(sfc, trb);
+	if (sfc->rw == SFC_WR)
+		bb_flags = GEN_BB_READ;
+	else
+		bb_flags = GEN_BB_WRITE;
+
+	ret = bounce_buffer_start(&bb, (void *)buffer, trb, bb_flags);
+	if (ret)
+		return ret;
+	rockchip_sfc_setup_xfer(sfc, bb.len_aligned);
 
 	writel(0xFFFFFFFF, &regs->iclr);
-	writel((u32)buffer, &regs->dmaaddr);
+	writel((u32)bb.bounce_buffer, &regs->dmaaddr);
 	writel(SFC_DMA_START, &regs->dmatr);
 
 	tbase = get_timer(0);
@@ -225,6 +236,8 @@ static int rockchip_sfc_do_dma_xfer(struct rockchip_sfc *sfc, u32 *buffer, u32 t
 
 	writel(0xFFFFFFFF, &regs->iclr);
 
+	bounce_buffer_stop(&bb);
+
 	return ret;
 }
 
@@ -351,7 +364,7 @@ static int rockchip_sfc_do_xfer(struct rockchip_sfc *sfc, u32 *buf, u32 len)
 	u32 bytes = len & 0x3;
 	u32 dma_trans;
 
-	if (len >= SFC_MAX_TRB) {
+	if (len >= ARCH_DMA_MINALIGN) {
 		dma_trans = len - bytes;
 	} else {
 		dma_trans = 0;
diff --git a/drivers/spi/rockchip_sfc.h b/drivers/spi/rockchip_sfc.h
index 2aefb0fa17..25f4937c60 100644
--- a/drivers/spi/rockchip_sfc.h
+++ b/drivers/spi/rockchip_sfc.h
@@ -82,6 +82,6 @@ check_member(rockchip_sfc_reg, data, 0x108);
 #define RX_UF_INT		BIT(1)        /* Rx fifo underflow interrupt */
 #define RX_FULL_INT		BIT(0)        /* Rx fifo full interrupt */
 
-#define SFC_MAX_TRB		(1024 << 3)
+#define SFC_MAX_TRB		(512 * 31)
 
 #endif

commit 990d8537943d9820ee726bc2a678f6d15db96af2
Author: Zhaoyifeng <zyf@rock-chips.com>
Date:   Fri Feb 2 15:42:37 2018 +0800

    driver: rknand: support 128MB SLC NAND ESMT F59L1G81LB
    
    Flash ID is:c8 d1 80 95 42 7f
    
    Change-Id: I848ca16b27da7a8186f25672ff018ead70ccbab0
    Signed-off-by: Zhaoyifeng <zyf@rock-chips.com>

diff --git a/drivers/rknand/rk_ftl_arm_v7.S b/drivers/rknand/rk_ftl_arm_v7.S
index e47273ae39..aa26ca5fe2 100644
--- a/drivers/rknand/rk_ftl_arm_v7.S
+++ b/drivers/rknand/rk_ftl_arm_v7.S
@@ -5,11 +5,10 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2017-12-21
+ * date: 2018-02-01
  */
 	.syntax unified
 	.arch armv7-a
-	.fpu softvfp
 	.eabi_attribute 20, 1
 	.eabi_attribute 21, 1
 	.eabi_attribute 23, 3
@@ -19,519 +18,566 @@
 	.eabi_attribute 30, 4
 	.eabi_attribute 34, 0
 	.eabi_attribute 18, 4
+	.file	"rk_ftl_arm_v7.S"
+	.section	.text.ftl_set_blk_mode.part.9,"ax",%progbits
+	.align	1
+	.syntax unified
 	.thumb
-	.file	"rk_ftl_arm_v7.c"
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_set_blk_mode.part.9, %function
+ftl_set_blk_mode.part.9:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L2
+	lsrs	r1, r0, #5
+	and	r0, r0, #31
+	ldr	r2, [r3]
+	movs	r3, #1
+	lsl	r0, r3, r0
+	ldr	r3, [r2, r1, lsl #2]
+	orrs	r3, r3, r0
+	str	r3, [r2, r1, lsl #2]
+	bx	lr
+.L3:
+	.align	2
+.L2:
+	.word	.LANCHOR0
+	.size	ftl_set_blk_mode.part.9, .-ftl_set_blk_mode.part.9
 	.section	.text.FlashMemCmp8,"ax",%progbits
 	.align	1
 	.global	FlashMemCmp8
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FlashMemCmp8, %function
 FlashMemCmp8:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L10
+	ldr	r3, .L12
 	push	{r4, r5, lr}
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L9
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L7
 	ldrb	r4, [r0, #1]	@ zero_extendqisi2
 	ldrb	r3, [r1, #1]	@ zero_extendqisi2
 	cmp	r4, r3
-	beq	.L8
+	beq	.L11
 	movs	r3, #0
-	b	.L9
-.L6:
+.L7:
+	cmp	r3, r2
+	bne	.L9
+.L11:
+	movs	r0, #0
+	pop	{r4, r5, pc}
+.L9:
 	ldrb	r5, [r0, r3]	@ zero_extendqisi2
 	ldrb	r4, [r1, r3]	@ zero_extendqisi2
-	add	r3, r3, #1
+	adds	r3, r3, #1
 	cmp	r5, r4
-	beq	.L9
+	beq	.L7
 	mov	r0, r3
 	pop	{r4, r5, pc}
-.L9:
-	cmp	r3, r2
-	bne	.L6
-	movs	r0, #0
-	pop	{r4, r5, pc}
-.L8:
-	movs	r0, #0
-	pop	{r4, r5, pc}
-.L11:
+.L13:
 	.align	2
-.L10:
-	.word	.LANCHOR0
+.L12:
+	.word	.LANCHOR1
 	.size	FlashMemCmp8, .-FlashMemCmp8
 	.section	.text.FlashRsvdBlkChk,"ax",%progbits
 	.align	1
 	.global	FlashRsvdBlkChk
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FlashRsvdBlkChk, %function
 FlashRsvdBlkChk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L15
-	ldr	r2, .L15+4
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	ldr	r2, [r2, #0]
+	ldr	r3, .L17
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	ldr	r3, .L17+4
+	ldr	r3, [r3]
 	muls	r3, r2, r3
-	cmp	r1, r3
-	bcs	.L14
+	cmp	r3, r1
+	bls	.L16
 	adds	r0, r0, #0
 	it	ne
 	movne	r0, #1
 	bx	lr
-.L14:
+.L16:
 	movs	r0, #1
 	bx	lr
-.L16:
+.L18:
 	.align	2
-.L15:
-	.word	.LANCHOR1
+.L17:
 	.word	.LANCHOR2
+	.word	.LANCHOR3
 	.size	FlashRsvdBlkChk, .-FlashRsvdBlkChk
 	.section	.text.FlashGetRandomizer,"ax",%progbits
 	.align	1
 	.global	FlashGetRandomizer
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FlashGetRandomizer, %function
 FlashGetRandomizer:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L19
+	ldr	r3, .L27
 	and	r2, r1, #127
 	push	{r4, lr}
 	ldrh	r4, [r3, r2, lsl #1]
-	ldr	r3, .L19+4
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L18
+	ldr	r3, .L27+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L19
 	bl	FlashRsvdBlkChk
-	cbz	r0, .L18
+	cbz	r0, .L19
 	orr	r4, r4, #-1073741824
-.L18:
+.L19:
 	mov	r0, r4
 	pop	{r4, pc}
-.L20:
+.L28:
 	.align	2
-.L19:
-	.word	.LANCHOR3
+.L27:
 	.word	.LANCHOR4
+	.word	.LANCHOR5
 	.size	FlashGetRandomizer, .-FlashGetRandomizer
 	.section	.text.FlashSetRandomizer,"ax",%progbits
 	.align	1
 	.global	FlashSetRandomizer
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FlashSetRandomizer, %function
 FlashSetRandomizer:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	and	r2, r1, #127
-	ldr	r3, .L23
+	ldr	r3, .L37
 	mov	r5, r0
 	ldrh	r4, [r3, r2, lsl #1]
-	ldr	r3, .L23+4
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L22
+	ldr	r3, .L37+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L30
 	bl	FlashRsvdBlkChk
-	cbz	r0, .L22
+	cbz	r0, .L30
 	orr	r4, r4, #-1073741824
-.L22:
-	ldr	r3, .L23+8
+.L30:
+	ldr	r3, .L37+8
 	ldr	r3, [r3, r5, lsl #3]
 	str	r4, [r3, #336]
 	pop	{r3, r4, r5, pc}
-.L24:
+.L38:
 	.align	2
-.L23:
-	.word	.LANCHOR3
+.L37:
 	.word	.LANCHOR4
 	.word	.LANCHOR5
+	.word	.LANCHOR6
 	.size	FlashSetRandomizer, .-FlashSetRandomizer
 	.section	.text.FlashReadCmd,"ax",%progbits
 	.align	1
 	.global	FlashReadCmd
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FlashReadCmd, %function
 FlashReadCmd:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, lr}
+	@ link register save eliminated.
+	push	{r4, r5}
 	lsrs	r2, r1, #16
-	ldr	r4, .L26
-	mov	r5, r0
-	ldr	r6, [r4, r0, lsl #3]
+	ldr	r4, .L40
+	ldr	r3, [r4, r0, lsl #3]
 	add	r4, r4, r0, lsl #3
-	ldrb	r3, [r4, #4]	@ zero_extendqisi2
+	ldrb	r4, [r4, #4]	@ zero_extendqisi2
+	add	r3, r3, r4, lsl #8
 	movs	r4, #0
-	adds	r3, r3, #8
-	add	r3, r6, r3, lsl #8
-	str	r4, [r3, #8]
-	str	r4, [r3, #4]
-	str	r4, [r3, #4]
+	str	r4, [r3, #2056]
+	str	r4, [r3, #2052]
+	str	r4, [r3, #2052]
 	uxtb	r4, r1
-	str	r4, [r3, #4]
+	str	r4, [r3, #2052]
 	lsrs	r4, r1, #8
-	str	r4, [r3, #4]
-	str	r2, [r3, #4]
+	str	r4, [r3, #2052]
+	str	r2, [r3, #2052]
 	movs	r2, #48
-	str	r2, [r3, #8]
-	pop	{r4, r5, r6, lr}
+	str	r2, [r3, #2056]
+	pop	{r4, r5}
 	b	FlashSetRandomizer
-.L27:
+.L41:
 	.align	2
-.L26:
-	.word	.LANCHOR5
+.L40:
+	.word	.LANCHOR6
 	.size	FlashReadCmd, .-FlashReadCmd
 	.section	.text.FlashReadDpDataOutCmd,"ax",%progbits
 	.align	1
 	.global	FlashReadDpDataOutCmd
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FlashReadDpDataOutCmd, %function
 FlashReadDpDataOutCmd:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L32
-	push	{r4, lr}
-	ldr	r4, [r2, r0, lsl #3]
+	@ link register save eliminated.
+	ldr	r2, .L46
+	push	{r4, r5, r6}
+	uxtb	r6, r1
+	ldr	r4, .L46+4
+	lsrs	r5, r1, #8
+	ldr	r3, [r2, r0, lsl #3]
 	add	r2, r2, r0, lsl #3
-	ldrb	r3, [r2, #4]	@ zero_extendqisi2
-	ldr	r2, .L32+4
-	adds	r3, r3, #8
-	ldrb	r2, [r2, #16]	@ zero_extendqisi2
-	add	r3, r4, r3, lsl #8
-	cmp	r2, #1
-	mov	r2, #0
-	bne	.L29
-	movs	r4, #6
-	str	r4, [r3, #8]
-	str	r2, [r3, #4]
-	str	r2, [r3, #4]
-	uxtb	r2, r1
-	str	r2, [r3, #4]
-	lsrs	r2, r1, #8
-	str	r2, [r3, #4]
-	lsrs	r2, r1, #16
-	b	.L31
-.L29:
-	str	r2, [r3, #8]
-	uxtb	r4, r1
-	str	r2, [r3, #4]
-	str	r2, [r3, #4]
-	str	r4, [r3, #4]
-	lsrs	r4, r1, #8
-	str	r4, [r3, #4]
-	lsrs	r4, r1, #16
-	str	r4, [r3, #4]
-	movs	r4, #5
-	str	r4, [r3, #8]
-	str	r2, [r3, #4]
-.L31:
-	str	r2, [r3, #4]
+	ldrb	r4, [r4, #16]	@ zero_extendqisi2
+	ldrb	r2, [r2, #4]	@ zero_extendqisi2
+	cmp	r4, #1
+	lsr	r4, r1, #16
+	lsl	r2, r2, #8
+	add	r3, r3, r2
+	bne	.L43
+	movs	r2, #6
+	str	r2, [r3, #2056]
+	movs	r2, #0
+	str	r2, [r3, #2052]
+	str	r2, [r3, #2052]
+	str	r6, [r3, #2052]
+	str	r5, [r3, #2052]
+	str	r4, [r3, #2052]
+.L45:
 	movs	r2, #224
-	str	r2, [r3, #8]
-	pop	{r4, lr}
+	str	r2, [r3, #2056]
+	pop	{r4, r5, r6}
 	b	FlashSetRandomizer
-.L33:
+.L43:
+	movs	r2, #0
+	str	r2, [r3, #2056]
+	str	r2, [r3, #2052]
+	str	r2, [r3, #2052]
+	str	r6, [r3, #2052]
+	str	r5, [r3, #2052]
+	str	r4, [r3, #2052]
+	movs	r4, #5
+	str	r4, [r3, #2056]
+	str	r2, [r3, #2052]
+	str	r2, [r3, #2052]
+	b	.L45
+.L47:
 	.align	2
-.L32:
-	.word	.LANCHOR5
+.L46:
 	.word	.LANCHOR6
+	.word	.LANCHOR7
 	.size	FlashReadDpDataOutCmd, .-FlashReadDpDataOutCmd
 	.section	.text.flash_enter_slc_mode,"ax",%progbits
 	.align	1
 	.global	flash_enter_slc_mode
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	flash_enter_slc_mode, %function
 flash_enter_slc_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L36
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L34
-	ldr	r3, .L36+4
+	ldr	r3, .L53
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L48
+	ldr	r3, .L53+4
 	ldr	r2, [r3, r0, lsl #3]
 	add	r3, r3, r0, lsl #3
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-	adds	r3, r3, #8
 	add	r3, r2, r3, lsl #8
 	movs	r2, #218
-	str	r2, [r3, #8]
-.L34:
+	str	r2, [r3, #2056]
+.L48:
 	bx	lr
-.L37:
+.L54:
 	.align	2
-.L36:
-	.word	.LANCHOR7
-	.word	.LANCHOR5
+.L53:
+	.word	.LANCHOR8
+	.word	.LANCHOR6
 	.size	flash_enter_slc_mode, .-flash_enter_slc_mode
 	.section	.text.flash_exit_slc_mode,"ax",%progbits
 	.align	1
 	.global	flash_exit_slc_mode
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	flash_exit_slc_mode, %function
 flash_exit_slc_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L40
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L38
-	ldr	r3, .L40+4
+	ldr	r3, .L60
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L55
+	ldr	r3, .L60+4
 	ldr	r2, [r3, r0, lsl #3]
 	add	r3, r3, r0, lsl #3
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-	adds	r3, r3, #8
 	add	r3, r2, r3, lsl #8
 	movs	r2, #223
-	str	r2, [r3, #8]
-.L38:
+	str	r2, [r3, #2056]
+.L55:
 	bx	lr
-.L41:
+.L61:
 	.align	2
-.L40:
-	.word	.LANCHOR7
-	.word	.LANCHOR5
+.L60:
+	.word	.LANCHOR8
+	.word	.LANCHOR6
 	.size	flash_exit_slc_mode, .-flash_exit_slc_mode
 	.section	.text.FlashProgFirstCmd,"ax",%progbits
 	.align	1
 	.global	FlashProgFirstCmd
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FlashProgFirstCmd, %function
 FlashProgFirstCmd:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, lr}
+	@ link register save eliminated.
+	push	{r4, r5}
 	lsrs	r2, r1, #16
-	ldr	r4, .L43
-	mov	r5, r0
-	ldr	r6, [r4, r0, lsl #3]
+	ldr	r4, .L63
+	ldr	r3, [r4, r0, lsl #3]
 	add	r4, r4, r0, lsl #3
-	ldrb	r3, [r4, #4]	@ zero_extendqisi2
+	ldrb	r4, [r4, #4]	@ zero_extendqisi2
+	add	r3, r3, r4, lsl #8
 	movs	r4, #128
-	adds	r3, r3, #8
-	add	r3, r6, r3, lsl #8
-	str	r4, [r3, #8]
+	str	r4, [r3, #2056]
 	movs	r4, #0
-	str	r4, [r3, #4]
-	str	r4, [r3, #4]
+	str	r4, [r3, #2052]
+	str	r4, [r3, #2052]
 	uxtb	r4, r1
-	str	r4, [r3, #4]
+	str	r4, [r3, #2052]
 	lsrs	r4, r1, #8
-	str	r4, [r3, #4]
-	str	r2, [r3, #4]
-	pop	{r4, r5, r6, lr}
+	str	r4, [r3, #2052]
+	str	r2, [r3, #2052]
+	pop	{r4, r5}
 	b	FlashSetRandomizer
-.L44:
+.L64:
 	.align	2
-.L43:
-	.word	.LANCHOR5
+.L63:
+	.word	.LANCHOR6
 	.size	FlashProgFirstCmd, .-FlashProgFirstCmd
 	.section	.text.FlashEraseCmd,"ax",%progbits
 	.align	1
 	.global	FlashEraseCmd
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FlashEraseCmd, %function
 FlashEraseCmd:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, lr}
-	ldr	r4, .L47
-	ldr	r5, [r4, r0, lsl #3]
-	add	r0, r4, r0, lsl #3
-	ldrb	r3, [r0, #4]	@ zero_extendqisi2
-	adds	r3, r3, #8
-	add	r3, r5, r3, lsl #8
-	cbz	r2, .L46
-	movs	r2, #96
-	str	r2, [r3, #8]
-	uxtb	r2, r1
-	str	r2, [r3, #4]
-	lsrs	r2, r1, #8
-	str	r2, [r3, #4]
-	lsrs	r2, r1, #16
-	str	r2, [r3, #4]
-	ldr	r2, .L47+4
-	ldr	r2, [r2, #0]
-	adds	r1, r1, r2
-.L46:
+	push	{r4, lr}
+	ldr	r4, .L70
+	ldr	r3, [r4, r0, lsl #3]
+	add	r4, r4, r0, lsl #3
+	ldrb	r0, [r4, #4]	@ zero_extendqisi2
+	lsls	r0, r0, #8
+	cbz	r2, .L66
+	adds	r2, r3, r0
+	movs	r4, #96
+	str	r4, [r2, #2056]
+	uxtb	r4, r1
+	str	r4, [r2, #2052]
+	lsrs	r4, r1, #8
+	str	r4, [r2, #2052]
+	lsrs	r4, r1, #16
+	str	r4, [r2, #2052]
+	ldr	r2, .L70+4
+	ldr	r2, [r2]
+	add	r1, r1, r2
+.L66:
+	add	r3, r3, r0
 	movs	r2, #96
-	str	r2, [r3, #8]
+	str	r2, [r3, #2056]
 	uxtb	r2, r1
-	str	r2, [r3, #4]
+	str	r2, [r3, #2052]
 	lsrs	r2, r1, #8
 	lsrs	r1, r1, #16
-	str	r2, [r3, #4]
+	str	r2, [r3, #2052]
 	movs	r2, #208
-	str	r1, [r3, #4]
-	str	r2, [r3, #8]
-	pop	{r4, r5, pc}
-.L48:
+	str	r1, [r3, #2052]
+	str	r2, [r3, #2056]
+	pop	{r4, pc}
+.L71:
 	.align	2
-.L47:
-	.word	.LANCHOR5
-	.word	.LANCHOR2
+.L70:
+	.word	.LANCHOR6
+	.word	.LANCHOR3
 	.size	FlashEraseCmd, .-FlashEraseCmd
 	.section	.text.FlashProgDpSecondCmd,"ax",%progbits
 	.align	1
 	.global	FlashProgDpSecondCmd
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FlashProgDpSecondCmd, %function
 FlashProgDpSecondCmd:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, lr}
+	@ link register save eliminated.
+	push	{r4, r5}
 	lsrs	r2, r1, #16
-	ldr	r4, .L50
-	mov	r5, r0
-	ldr	r6, [r4, r0, lsl #3]
+	ldr	r4, .L73
+	ldr	r3, [r4, r0, lsl #3]
 	add	r4, r4, r0, lsl #3
-	ldrb	r3, [r4, #4]	@ zero_extendqisi2
-	ldr	r4, .L50+4
-	adds	r3, r3, #8
+	ldrb	r5, [r4, #4]	@ zero_extendqisi2
+	ldr	r4, .L73+4
 	ldrb	r4, [r4, #11]	@ zero_extendqisi2
-	add	r3, r6, r3, lsl #8
-	str	r4, [r3, #8]
+	add	r3, r3, r5, lsl #8
+	str	r4, [r3, #2056]
 	movs	r4, #0
-	str	r4, [r3, #4]
-	str	r4, [r3, #4]
+	str	r4, [r3, #2052]
+	str	r4, [r3, #2052]
 	uxtb	r4, r1
-	str	r4, [r3, #4]
+	str	r4, [r3, #2052]
 	lsrs	r4, r1, #8
-	str	r4, [r3, #4]
-	str	r2, [r3, #4]
-	pop	{r4, r5, r6, lr}
+	str	r4, [r3, #2052]
+	str	r2, [r3, #2052]
+	pop	{r4, r5}
 	b	FlashSetRandomizer
-.L51:
+.L74:
 	.align	2
-.L50:
-	.word	.LANCHOR5
+.L73:
 	.word	.LANCHOR6
+	.word	.LANCHOR7
 	.size	FlashProgDpSecondCmd, .-FlashProgDpSecondCmd
 	.section	.text.FlashProgSecondCmd,"ax",%progbits
 	.align	1
 	.global	FlashProgSecondCmd
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FlashProgSecondCmd, %function
 FlashProgSecondCmd:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L53
+	ldr	r3, .L76
 	ldr	r2, [r3, r0, lsl #3]
 	add	r3, r3, r0, lsl #3
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-	adds	r3, r3, #8
 	add	r3, r2, r3, lsl #8
 	movs	r2, #16
-	str	r2, [r3, #8]
+	str	r2, [r3, #2056]
 	bx	lr
-.L54:
+.L77:
 	.align	2
-.L53:
-	.word	.LANCHOR5
+.L76:
+	.word	.LANCHOR6
 	.size	FlashProgSecondCmd, .-FlashProgSecondCmd
 	.section	.text.FlashProgDpFirstCmd,"ax",%progbits
 	.align	1
 	.global	FlashProgDpFirstCmd
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FlashProgDpFirstCmd, %function
 FlashProgDpFirstCmd:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L56
+	ldr	r3, .L79
+	ldr	r1, .L79+4
 	ldr	r2, [r3, r0, lsl #3]
 	add	r3, r3, r0, lsl #3
+	ldrb	r1, [r1, #10]	@ zero_extendqisi2
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-	adds	r3, r3, #8
 	add	r3, r2, r3, lsl #8
-	ldr	r2, .L56+4
-	ldrb	r2, [r2, #10]	@ zero_extendqisi2
-	str	r2, [r3, #8]
+	str	r1, [r3, #2056]
 	bx	lr
-.L57:
+.L80:
 	.align	2
-.L56:
-	.word	.LANCHOR5
+.L79:
 	.word	.LANCHOR6
+	.word	.LANCHOR7
 	.size	FlashProgDpFirstCmd, .-FlashProgDpFirstCmd
 	.section	.text.FlashReadStatus,"ax",%progbits
 	.align	1
 	.global	FlashReadStatus
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FlashReadStatus, %function
 FlashReadStatus:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r2, #112
-	ldr	r3, .L59
+	ldr	r3, .L82
 	ldr	r5, [r3, r0, lsl #3]
 	add	r3, r3, r0, lsl #3
 	movs	r0, #80
 	ldrb	r4, [r3, #4]	@ zero_extendqisi2
+	add	r3, r5, r4, lsl #8
 	adds	r4, r4, #8
 	lsls	r4, r4, #8
-	adds	r3, r5, r4
-	str	r2, [r3, #8]
+	str	r2, [r3, #2056]
 	bl	udelay
 	ldr	r0, [r5, r4]
 	pop	{r3, r4, r5, pc}
-.L60:
+.L83:
 	.align	2
-.L59:
-	.word	.LANCHOR5
+.L82:
+	.word	.LANCHOR6
 	.size	FlashReadStatus, .-FlashReadStatus
 	.section	.text.JSHash,"ax",%progbits
 	.align	1
 	.global	JSHash
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	JSHash, %function
 JSHash:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	mov	r3, r0
-	movs	r2, #0
-	push	{r4, r5, lr}
-	ldr	r0, .L64
-	b	.L62
-.L63:
-	lsls	r4, r0, #5
-	ldrb	r5, [r3, r2]	@ zero_extendqisi2
-	add	r4, r4, r0, lsr #2
-	adds	r2, r2, #1
-	adds	r4, r4, r5
-	eors	r0, r0, r4
-.L62:
-	cmp	r2, r1
-	bne	.L63
-	pop	{r4, r5, pc}
-.L65:
+	ldr	r3, .L87
+	add	r1, r1, r0
+	push	{r4, lr}
+.L85:
+	cmp	r0, r1
+	bne	.L86
+	mov	r0, r3
+	pop	{r4, pc}
+.L86:
+	lsrs	r2, r3, #2
+	ldrb	r4, [r0], #1	@ zero_extendqisi2
+	add	r2, r2, r3, lsl #5
+	add	r2, r2, r4
+	eors	r3, r3, r2
+	b	.L85
+.L88:
 	.align	2
-.L64:
+.L87:
 	.word	1204201446
 	.size	JSHash, .-JSHash
 	.section	.text.FlashLoadIdbInfo,"ax",%progbits
 	.align	1
 	.global	FlashLoadIdbInfo
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FlashLoadIdbInfo, %function
 FlashLoadIdbInfo:
 	@ args = 0, pretend = 0, frame = 0
@@ -540,201 +586,15 @@ FlashLoadIdbInfo:
 	movs	r0, #0
 	bx	lr
 	.size	FlashLoadIdbInfo, .-FlashLoadIdbInfo
-	.section	.text.BuildFlashLsbPageTable,"ax",%progbits
+	.section	.text.FlashPrintInfo,"ax",%progbits
 	.align	1
-	.global	BuildFlashLsbPageTable
+	.global	FlashPrintInfo
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	BuildFlashLsbPageTable, %function
-BuildFlashLsbPageTable:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, lr}
-	mov	r4, r1
-	cbnz	r0, .L68
-	ldr	r3, .L107
-.L69:
-	strh	r0, [r3, #2]!	@ movhi
-	adds	r0, r0, #1
-	uxth	r0, r0
-	cmp	r0, #256
-	bne	.L69
-	b	.L70
-.L68:
-	cmp	r0, #1
-	bne	.L71
-	movs	r2, #0
-	ldr	r0, .L107+4
-	mov	r3, r2
-.L74:
-	uxth	r1, r3
-	cmp	r1, #3
-	bls	.L72
-	tst	r3, #1
-	ite	eq
-	moveq	r1, #2
-	movne	r1, #3
-	subs	r1, r2, r1
-	uxth	r1, r1
-.L72:
-	adds	r3, r3, #1
-	strh	r1, [r2, r0]	@ movhi
-	adds	r2, r2, #2
-	cmp	r3, #256
-	bne	.L74
-	b	.L70
-.L71:
-	cmp	r0, #2
-	bne	.L75
-	movs	r3, #0
-	ldr	r0, .L107
-	movw	r2, #65535
-	mov	r1, r3
-	b	.L106
-.L78:
-	cmp	r3, #1
-	ite	ls
-	movls	r1, r3
-	movhi	r1, r2
-.L106:
-	adds	r3, r3, #1
-	adds	r2, r2, #2
-	strh	r1, [r0, #2]!	@ movhi
-	uxth	r3, r3
-	uxth	r2, r2
-	cmp	r3, #256
-	bne	.L78
-	b	.L70
-.L75:
-	cmp	r0, #3
-	mov	r2, #0
-	bne	.L79
-	ldr	r0, .L107+4
-	mov	r3, r2
-.L82:
-	uxth	r1, r2
-	cmp	r1, #5
-	bls	.L80
-	tst	r2, #1
-	ite	eq
-	moveq	r1, #4
-	movne	r1, #5
-	subs	r1, r3, r1
-	uxth	r1, r1
-.L80:
-	adds	r2, r2, #1
-	strh	r1, [r3, r0]	@ movhi
-	adds	r3, r3, #2
-	cmp	r2, #256
-	bne	.L82
-	b	.L70
-.L79:
-	cmp	r0, #4
-	bne	.L83
-	ldr	r3, .L107+4
-	movs	r1, #16
-	strh	r2, [r3, #0]	@ movhi
-	movs	r2, #1
-	strh	r0, [r3, #8]	@ movhi
-	strh	r2, [r3, #2]	@ movhi
-	movs	r2, #2
-	strh	r2, [r3, #4]	@ movhi
-	movs	r2, #3
-	strh	r2, [r3, #6]	@ movhi
-	movs	r2, #5
-	strh	r2, [r3, #10]	@ movhi
-	movs	r2, #7
-	strh	r2, [r3, #12]	@ movhi
-	movs	r2, #8
-	strh	r2, [r3, #14]!	@ movhi
-.L85:
-	tst	r2, #1
-	ite	eq
-	moveq	r0, #6
-	movne	r0, #7
-	adds	r2, r2, #1
-	subs	r0, r1, r0
-	adds	r1, r1, #2
-	cmp	r2, #256
-	strh	r0, [r3, #2]!	@ movhi
-	uxth	r1, r1
-	bne	.L85
-	b	.L70
-.L83:
-	cmp	r0, #5
-	bne	.L86
-	ldr	r1, .L107
-	mov	r3, r2
-.L87:
-	strh	r3, [r1, #2]!	@ movhi
-	adds	r3, r3, #1
-	uxth	r3, r3
-	cmp	r3, #16
-	bne	.L87
-	ldr	r2, .L107+8
-.L88:
-	strh	r3, [r2, #2]!	@ movhi
-	adds	r3, r3, #2
-	uxth	r3, r3
-	cmp	r3, #496
-	bne	.L88
-	b	.L70
-.L86:
-	cmp	r0, #6
-	bne	.L70
-	ldr	r0, .L107
-	mov	r3, r2
-.L91:
-	uxth	r1, r3
-	cmp	r1, #5
-	bls	.L89
-	tst	r3, #1
-	ite	eq
-	moveq	r1, #10
-	movne	r1, #12
-	subs	r1, r2, r1
-	uxth	r1, r1
-.L89:
-	adds	r3, r3, #1
-	adds	r2, r2, #3
-	cmp	r3, #256
-	strh	r1, [r0, #2]!	@ movhi
-	uxth	r2, r2
-	bne	.L91
-.L70:
-	mov	r2, #1024
-	ldr	r0, .L107+12
-	movs	r1, #255
-	uxth	r4, r4
-	bl	memset
-	ldr	r2, .L107
-	movs	r3, #0
-	ldr	r0, .L107+12
-	b	.L92
-.L93:
-	adds	r3, r3, #1
-	ldrh	r1, [r2, #2]!
-	uxth	r3, r3
-	strh	r1, [r0, r1, lsl #1]	@ movhi
-.L92:
-	cmp	r3, r4
-	bcc	.L93
-	pop	{r4, pc}
-.L108:
-	.align	2
-.L107:
-	.word	.LANCHOR8-2
-	.word	.LANCHOR8
-	.word	.LANCHOR8+30
-	.word	.LANCHOR9
-	.size	BuildFlashLsbPageTable, .-BuildFlashLsbPageTable
-	.section	.text.FlashPrintInfo,"ax",%progbits
-	.align	1
-	.global	FlashPrintInfo
-	.thumb
-	.thumb_func
-	.type	FlashPrintInfo, %function
-FlashPrintInfo:
+	.fpu softvfp
+	.type	FlashPrintInfo, %function
+FlashPrintInfo:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
@@ -743,569 +603,293 @@ FlashPrintInfo:
 	.section	.text.ToshibaSetRRPara,"ax",%progbits
 	.align	1
 	.global	ToshibaSetRRPara
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	ToshibaSetRRPara, %function
 ToshibaSetRRPara:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, r8, sl, lr}
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
 	add	r7, r1, r1, lsl #2
-	ldr	r3, .L118
-	mov	r4, r0
+	ldr	r10, .L99+12
+	mov	r5, r0
 	mov	r6, r1
-	movs	r5, #0
-	add	sl, r3, r7
-	b	.L111
-.L115:
-	ldr	r8, .L118+16
+	movs	r4, #0
+	ldr	r8, .L99+16
+.L92:
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	cmp	r4, r3
+	bcc	.L96
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L96:
 	movs	r3, #85
-	str	r3, [r4, #8]
 	movs	r0, #200
-	ldrsb	r3, [r5, r8]
-	str	r3, [r4, #4]
+	str	r3, [r5, #8]
+	ldrsb	r3, [r4, r8]
+	str	r3, [r5, #4]
 	bl	udelay
-	ldr	r3, .L118+4
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	ldr	r3, .L99
+	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #34
-	bne	.L112
-	add	r8, r8, r7
-	add	r3, r8, r5
-	b	.L117
-.L112:
-	cmp	r3, #35
-	bne	.L114
-	add	r3, sl, r5
-.L117:
+	bne	.L93
+	adds	r3, r4, r7
+	add	r3, r3, r8
+.L98:
 	ldrsb	r3, [r3, #5]
-	b	.L116
-.L114:
-	ldr	r3, .L118+8
+.L97:
+	str	r3, [r5]
+	adds	r4, r4, #1
+	b	.L92
+.L93:
+	cmp	r3, #35
+	bne	.L95
+	ldr	r3, .L99+4
+	adds	r2, r4, r7
+	add	r3, r3, r2
+	b	.L98
+.L95:
+	ldr	r3, .L99+8
 	ldrsb	r3, [r3, r6]
-.L116:
-	adds	r5, r5, #1
-	str	r3, [r4, #0]
-.L111:
-	ldr	r3, .L118+12
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cmp	r5, r3
-	bcc	.L115
-	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
-.L119:
+	b	.L97
+.L100:
 	.align	2
-.L118:
-	.word	.LANCHOR12
+.L99:
+	.word	.LANCHOR10
 	.word	.LANCHOR11
+	.word	.LANCHOR12
 	.word	.LANCHOR13
-	.word	.LANCHOR14
-	.word	.LANCHOR10
+	.word	.LANCHOR9
 	.size	ToshibaSetRRPara, .-ToshibaSetRRPara
 	.section	.text.SamsungSetRRPara,"ax",%progbits
 	.align	1
 	.global	SamsungSetRRPara
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	SamsungSetRRPara, %function
 SamsungSetRRPara:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, lr}
-	mov	r5, r0
-	ldr	r6, .L123
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	mov	r6, r0
+	ldr	r7, .L104
 	movs	r4, #0
-	ldr	r7, .L123+4
-	add	r8, r6, r1, lsl #2
-	b	.L121
-.L122:
-	movs	r3, #161
-	str	r3, [r5, #8]
+	mov	r10, #161
+	ldr	r8, .L104+4
+	add	r1, r7, r1, lsl #2
+	adds	r5, r1, #3
+.L102:
+	ldrb	r3, [r8]	@ zero_extendqisi2
+	cmp	r4, r3
+	bcc	.L103
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L103:
 	movs	r3, #0
-	str	r3, [r5, #0]
-	ldrsb	r3, [r4, r6]
+	str	r10, [r6, #8]
+	str	r3, [r6]
 	mov	r0, #300
-	str	r3, [r5, #0]
-	add	r3, r8, r4
+	ldrsb	r3, [r7, r4]
 	adds	r4, r4, #1
-	ldrsb	r3, [r3, #4]
-	str	r3, [r5, #0]
+	str	r3, [r6]
+	ldrsb	r3, [r5, #1]!
+	str	r3, [r6]
 	bl	udelay
-.L121:
-	ldrb	r3, [r7, #0]	@ zero_extendqisi2
-	cmp	r4, r3
-	bcc	.L122
-	pop	{r4, r5, r6, r7, r8, pc}
-.L124:
+	b	.L102
+.L105:
 	.align	2
-.L123:
-	.word	.LANCHOR15
+.L104:
 	.word	.LANCHOR14
+	.word	.LANCHOR13
 	.size	SamsungSetRRPara, .-SamsungSetRRPara
-	.section	.text.FlashDieInfoInit,"ax",%progbits
+	.global	__aeabi_uidiv
+	.global	__aeabi_uidivmod
+	.section	.text.LogAddr2PhyAddr,"ax",%progbits
 	.align	1
-	.global	FlashDieInfoInit
+	.global	LogAddr2PhyAddr
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FlashDieInfoInit, %function
-FlashDieInfoInit:
-	@ args = 0, pretend = 0, frame = 8
+	.fpu softvfp
+	.type	LogAddr2PhyAddr, %function
+LogAddr2PhyAddr:
+	@ args = 4, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L137
-	movs	r3, #0
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	strb	r3, [r2, #0]
-	ldr	r2, .L137+4
-	strb	r3, [r2, #0]
-	ldr	r3, .L137+8
-	ldrh	r2, [r3, #10]
-	ldr	r3, .L137+12
-	cmp	r2, #256
-	str	r2, [r3, #0]
-	bls	.L126
-	mov	r2, #512
-	b	.L136
-.L126:
-	cmp	r2, #128
-	bls	.L127
-	mov	r2, #256
-.L136:
-	str	r2, [r3, #0]
-.L127:
-	movs	r1, #0
-	movs	r2, #8
-	ldr	r0, .L137+16
-	movs	r5, #0
-	bl	memset
-	movs	r1, #0
-	movs	r2, #32
-	ldr	r0, .L137+20
-	bl	memset
-	ldr	r6, .L137+24
-	ldr	r0, .L137+28
-	movs	r1, #0
-	movs	r2, #128
-	ldr	sl, .L137+36
-	bl	memset
-	ldr	r8, .L137
-	ldr	r3, .L137+20
-	mov	r7, r6
-.L129:
-	ldr	r4, [sl, #0]
-	mov	r1, r7
-	mov	r0, r4
-	ldrb	fp, [r0], #1	@ zero_extendqisi2
-	str	r3, [sp, #4]
-	mov	r2, fp
-	bl	FlashMemCmp8
-	ldr	r3, [sp, #4]
-	cbnz	r0, .L128
-	ldrb	r2, [r8, #0]	@ zero_extendqisi2
-	ldr	r1, .L137+16
-	str	r0, [r3, r2, lsl #2]
-	strb	r5, [r1, r2]
-	adds	r2, r2, #1
-	strb	r2, [r8, #0]
-.L128:
-	adds	r5, r5, #1
-	adds	r7, r7, #8
-	cmp	r5, #4
-	bne	.L129
-	ldr	r2, .L137
-	ldr	r3, .L137+4
-	ldrb	r1, [r2, #0]	@ zero_extendqisi2
-	strb	r1, [r3, #0]
-	ldrb	r3, [r4, #8]	@ zero_extendqisi2
-	cmp	r3, #2
-	bne	.L130
-	ldr	r7, .L137+20
-	movs	r5, #0
-	ldr	r8, .L137+12
-	adds	r3, r4, #1
-	mov	sl, r2
-.L133:
-	mov	r0, r3
-	mov	r1, r6
-	mov	r2, fp
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r6, r3
+	ldr	r3, .L111
+	mov	r8, r1
+	mov	r7, r2
+	mov	r5, r0
+	ldrh	r4, [r3, #14]
+	ldrh	r3, [r3, #12]
+	smulbb	r4, r4, r3
+	ldr	r3, .L111+4
+	ldrh	fp, [r3]
+	uxth	r4, r4
+	ldr	r3, .L111+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #1
+	ldr	r3, [r0, #4]
+	it	eq
+	lsleq	r1, fp, #1
+	ubfx	r2, r3, #10, #16
+	it	eq
+	uxtheq	fp, r1
+	mov	r0, r2
 	str	r3, [sp, #4]
-	bl	FlashMemCmp8
+	mov	r1, r4
+	str	r2, [sp]
+	bl	__aeabi_uidiv
+	ldr	r2, [sp]
+	uxth	r10, r0
+	mov	r1, r4
+	mov	r0, r2
+	bl	__aeabi_uidivmod
 	ldr	r3, [sp, #4]
-	cbnz	r0, .L131
-	ldrb	r2, [sl, #0]	@ zero_extendqisi2
-	ldrb	r1, [r4, #13]	@ zero_extendqisi2
-	ldr	r0, [r8, #0]
-	muls	r0, r1, r0
-	ldrh	r1, [r4, #14]
-	and	r1, r1, #65280
-	muls	r1, r0, r1
-	str	r1, [r7, r2, lsl #2]
-	ldrb	r0, [r4, #23]	@ zero_extendqisi2
-	cbz	r0, .L132
-	lsls	r1, r1, #1
-	str	r1, [r7, r2, lsl #2]
-.L132:
-	ldr	r1, .L137+16
-	strb	r5, [r1, r2]
-	adds	r2, r2, #1
-	ldr	r1, .L137
-	strb	r2, [r1, #0]
-.L131:
-	adds	r5, r5, #1
-	adds	r6, r6, #8
-	cmp	r5, #4
-	bne	.L133
-.L130:
-	ldr	r3, .L137
-	ldrb	r2, [r4, #13]	@ zero_extendqisi2
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	muls	r2, r3, r2
-	ldrh	r3, [r4, #14]
-	muls	r2, r3, r2
-	ldr	r3, .L137+32
-	strh	r2, [r3, #0]	@ movhi
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L138:
+	cmp	r8, #1
+	uxth	r1, r1
+	ubfx	r3, r3, #0, #10
+	bne	.L108
+	ldr	r2, .L111+12
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbnz	r2, .L108
+	ldr	r2, .L111+16
+	ldrh	r3, [r2, r3, lsl #1]
+.L108:
+	ldr	r2, .L111+20
+	ldr	r2, [r2, r10, lsl #2]
+	mla	r1, fp, r1, r2
+	add	r1, r1, r3
+	ldrb	r3, [sp, #40]	@ zero_extendqisi2
+	str	r1, [r7]
+	str	r10, [r6]
+	cmp	r3, #1
+	bls	.L110
+	ldr	r0, [r5, #4]
+	ldr	r3, [r5, #40]
+	add	r0, r0, #1024
+	subs	r3, r0, r3
+	rsbs	r0, r3, #0
+	adcs	r0, r0, r3
+.L109:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L110:
+	movs	r0, #0
+	b	.L109
+.L112:
 	.align	2
-.L137:
+.L111:
+	.word	.LANCHOR15
+	.word	.LANCHOR3
+	.word	.LANCHOR1
+	.word	.LANCHOR8
 	.word	.LANCHOR16
 	.word	.LANCHOR17
-	.word	.LANCHOR18
-	.word	.LANCHOR2
-	.word	.LANCHOR19
-	.word	.LANCHOR20
-	.word	.LANCHOR22
-	.word	.LANCHOR21
-	.word	.LANCHOR24
-	.word	.LANCHOR23
-	.size	FlashDieInfoInit, .-FlashDieInfoInit
-	.section	.text.FlashReadIdbData,"ax",%progbits
+	.size	LogAddr2PhyAddr, .-LogAddr2PhyAddr
+	.section	.text.FlashReadStatusEN,"ax",%progbits
 	.align	1
-	.global	FlashReadIdbData
+	.global	FlashReadStatusEN
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FlashReadIdbData, %function
-FlashReadIdbData:
+	.fpu softvfp
+	.type	FlashReadStatusEN, %function
+FlashReadStatusEN:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	mov	r2, #2048
-	ldr	r1, .L140
-	bl	memcpy
-	movs	r0, #0
-	pop	{r3, pc}
-.L141:
-	.align	2
-.L140:
-	.word	.LANCHOR25
-	.size	FlashReadIdbData, .-FlashReadIdbData
-	.section	.text.FlashLoadPhyInfoInRam,"ax",%progbits
-	.align	1
-	.global	FlashLoadPhyInfoInRam
-	.thumb
-	.thumb_func
-	.type	FlashLoadPhyInfoInRam, %function
-FlashLoadPhyInfoInRam:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, lr}
-	movs	r5, #0
-	ldr	r6, .L154
-.L146:
-	lsls	r3, r5, #5
-	ldr	r1, .L154+4
-	adds	r4, r6, r3
-	adds	r0, r4, #1
-	ldrb	r2, [r6, r3]	@ zero_extendqisi2
-	bl	FlashMemCmp8
-	cbnz	r0, .L143
-	cbnz	r4, .L152
-	b	.L153
-.L143:
-	adds	r5, r5, #1
-	cmp	r5, #72
-	bne	.L146
-	mov	r0, #-1
-	pop	{r4, r5, r6, pc}
-.L152:
-	ldrb	r2, [r4, #22]	@ zero_extendqisi2
-	mov	r1, r0
-	ldr	r3, .L154+8
-.L148:
-	lsls	r0, r1, #5
-	ldrb	r0, [r0, r3]	@ zero_extendqisi2
-	cmp	r0, r2
-	beq	.L147
-	adds	r1, r1, #1
-	cmp	r1, #4
-	bne	.L148
-.L147:
-	ldr	r3, .L154+8
-	movs	r2, #32
-	ldr	r0, .L154+12
-	add	r1, r3, r1, lsl #5
-	bl	memcpy
-	ldr	r0, .L154+16
-	mov	r1, r4
-	movs	r2, #32
-	bl	memcpy
-	movs	r0, #0
-	pop	{r4, r5, r6, pc}
-.L153:
-	mov	r0, #-1
-	pop	{r4, r5, r6, pc}
-.L155:
-	.align	2
-.L154:
-	.word	.LANCHOR26
-	.word	.LANCHOR22
-	.word	.LANCHOR27
-	.word	.LANCHOR6
-	.word	.LANCHOR18
-	.size	FlashLoadPhyInfoInRam, .-FlashLoadPhyInfoInRam
-	.global	__aeabi_uidiv
-	.section	.text.LogAddr2PhyAddr,"ax",%progbits
-	.align	1
-	.global	LogAddr2PhyAddr
-	.thumb
-	.thumb_func
-	.type	LogAddr2PhyAddr, %function
-LogAddr2PhyAddr:
-	@ args = 4, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	fp, r3
-	ldr	r3, .L161
-	mov	r5, r2
-	mov	r4, r0
-	mov	ip, r1
-	ldrh	r2, [r3, #12]
-	ldrh	r8, [r3, #14]
-	ldr	r3, .L161+4
-	mul	r8, r8, r2
-	ldrh	r6, [r3, #0]
-	ldr	r3, .L161+8
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	uxth	r8, r8
-	cmp	r3, #1
-	bne	.L157
-	lsls	r6, r6, #1
-	uxth	r6, r6
-.L157:
-	ldr	r7, [r4, #4]
-	mov	r1, r8
-	str	ip, [sp, #4]
-	bic	r7, r7, #-2147483648
-	ubfx	sl, r7, #10, #16
-	mov	r0, sl
-	lsls	r7, r7, #22
-	bl	__aeabi_uidiv
-	ldr	ip, [sp, #4]
-	lsrs	r7, r7, #22
-	cmp	ip, #1
-	uxth	r0, r0
-	mls	r8, r8, r0, sl
-	uxth	r8, r8
-	bne	.L158
-	ldr	r3, .L161+12
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbnz	r3, .L158
-	ldr	r3, .L161+16
-	ldrh	r7, [r3, r7, lsl #1]
-.L158:
-	ldr	r3, .L161+20
-	ldr	r3, [r3, r0, lsl #2]
-	mla	r6, r6, r8, r3
-	ldrb	r3, [sp, #40]	@ zero_extendqisi2
-	cmp	r3, #1
-	add	r7, r6, r7
-	str	r7, [r5, #0]
-	str	r0, [fp, #0]
-	bls	.L160
-	ldr	r0, [r4, #4]
-	ldr	r3, [r4, #40]
-	add	r0, r0, #1024
-	subs	r3, r0, r3
-	rsbs	r0, r3, #0
-	adc	r0, r0, r3
-	b	.L159
-.L160:
-	movs	r0, #0
-.L159:
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L162:
-	.align	2
-.L161:
-	.word	.LANCHOR28
-	.word	.LANCHOR2
-	.word	.LANCHOR0
-	.word	.LANCHOR7
-	.word	.LANCHOR8
-	.word	.LANCHOR20
-	.size	LogAddr2PhyAddr, .-LogAddr2PhyAddr
-	.section	.text.FlashReadStatusEN,"ax",%progbits
-	.align	1
-	.global	FlashReadStatusEN
-	.thumb
-	.thumb_func
-	.type	FlashReadStatusEN, %function
-FlashReadStatusEN:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L172
+	ldr	r3, .L125
 	push	{r4, r5, r6, lr}
 	ldr	r5, [r3, r0, lsl #3]
-	add	r0, r3, r0, lsl #3
-	ldrb	r4, [r0, #4]	@ zero_extendqisi2
-	ldr	r0, .L172+4
-	adds	r4, r4, #8
-	ldr	r0, [r0, #0]
-	lsls	r4, r4, #8
-	adds	r3, r5, r4
-	ldrb	r0, [r0, #8]	@ zero_extendqisi2
-	cmp	r0, #2
-	bne	.L164
-	ldr	r0, .L172+8
-	cbnz	r2, .L165
+	add	r3, r3, r0, lsl #3
+	ldrb	r4, [r3, #4]	@ zero_extendqisi2
+	ldr	r3, .L125+4
+	ldr	r3, [r3]
+	ldrb	r3, [r3, #8]	@ zero_extendqisi2
+	cmp	r3, #2
+	lsl	r3, r4, #8
+	add	r4, r4, #8
+	bne	.L114
+	ldr	r0, .L125+8
+	cbnz	r2, .L115
 	ldrb	r2, [r0, #13]	@ zero_extendqisi2
-	b	.L171
-.L165:
-	ldrb	r2, [r0, #14]	@ zero_extendqisi2
-.L171:
-	str	r2, [r3, #8]
+.L124:
+	add	r3, r3, r5
+	str	r2, [r3, #2056]
 	ldrb	r0, [r0, #15]	@ zero_extendqisi2
-	cbnz	r0, .L170
-	b	.L168
-.L169:
-	lsls	r6, r2, #3
-	adds	r2, r2, #1
-	lsr	r6, r1, r6
-	uxtb	r6, r6
-	str	r6, [r3, #4]
-	b	.L167
-.L170:
+	cbz	r0, .L119
+	add	r6, r5, r4, lsl #8
 	movs	r2, #0
-.L167:
+.L118:
 	cmp	r2, r0
-	bcc	.L169
-	b	.L168
-.L164:
-	movs	r2, #112
-	str	r2, [r3, #8]
-.L168:
+	bcc	.L120
+.L119:
+	lsls	r4, r4, #8
 	movs	r0, #80
 	bl	udelay
 	ldr	r0, [r5, r4]
 	uxtb	r0, r0
 	pop	{r4, r5, r6, pc}
-.L173:
+.L115:
+	ldrb	r2, [r0, #14]	@ zero_extendqisi2
+	b	.L124
+.L120:
+	lsls	r3, r2, #3
+	adds	r2, r2, #1
+	lsr	r3, r1, r3
+	uxtb	r3, r3
+	str	r3, [r6, #4]
+	b	.L118
+.L114:
+	add	r3, r3, r5
+	movs	r2, #112
+	str	r2, [r3, #2056]
+	b	.L119
+.L126:
 	.align	2
-.L172:
-	.word	.LANCHOR5
-	.word	.LANCHOR23
+.L125:
 	.word	.LANCHOR6
+	.word	.LANCHOR18
+	.word	.LANCHOR7
 	.size	FlashReadStatusEN, .-FlashReadStatusEN
 	.section	.text.FlashWaitReadyEN,"ax",%progbits
 	.align	1
 	.global	FlashWaitReadyEN
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FlashWaitReadyEN, %function
 FlashWaitReadyEN:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
-	mov	r6, r0
+	mov	r4, r0
 	mov	r5, r1
-	mov	r4, r2
-.L178:
-	mov	r0, r6
+	mov	r6, r2
+.L131:
+	mov	r2, r6
 	mov	r1, r5
-	mov	r2, r4
+	mov	r0, r4
 	bl	FlashReadStatusEN
 	cmp	r0, #255
-	beq	.L178
-	lsls	r2, r0, #25
-	bpl	.L178
+	mov	r3, r0
+	beq	.L131
+	lsls	r3, r3, #25
+	bpl	.L131
 	pop	{r4, r5, r6, pc}
 	.size	FlashWaitReadyEN, .-FlashWaitReadyEN
-	.section	.text.ReadFlashInfo,"ax",%progbits
-	.align	1
-	.global	ReadFlashInfo
-	.thumb
-	.thumb_func
-	.type	ReadFlashInfo, %function
-ReadFlashInfo:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, lr}
-	movs	r1, #0
-	movs	r2, #11
-	mov	r4, r0
-	bl	memset
-	ldr	r3, .L182
-	ldr	r1, .L182+4
-	ldr	r3, [r3, #0]
-	ldr	r1, [r1, #0]
-	ldrb	r2, [r3, #9]	@ zero_extendqisi2
-	muls	r2, r1, r2
-	uxth	r2, r2
-	strb	r2, [r4, #4]
-	movs	r1, #0
-	lsrs	r0, r2, #8
-	strb	r0, [r4, #5]
-	ldr	r0, .L182+8
-	ldrb	r0, [r0, #0]	@ zero_extendqisi2
-	strb	r0, [r4, #7]
-	ldrb	r0, [r3, #13]	@ zero_extendqisi2
-	muls	r2, r0, r2
-	ldrh	r0, [r3, #14]
-	muls	r2, r0, r2
-	ldrb	r0, [r3, #8]	@ zero_extendqisi2
-	muls	r2, r0, r2
-	strb	r2, [r4, #0]
-	ubfx	r0, r2, #8, #8
-	strb	r0, [r4, #1]
-	ubfx	r0, r2, #16, #8
-	lsrs	r2, r2, #24
-	strb	r0, [r4, #2]
-	strb	r2, [r4, #3]
-	ldrb	r2, [r3, #9]	@ zero_extendqisi2
-	strb	r2, [r4, #6]
-	movs	r2, #32
-	strb	r2, [r4, #8]
-	movs	r2, #1
-	ldrb	r3, [r3, #7]	@ zero_extendqisi2
-	strb	r1, [r4, #10]
-	strb	r3, [r4, #9]
-	ldr	r3, .L182+12
-	ldrb	r0, [r3, #0]	@ zero_extendqisi2
-	mov	r3, r1
-	ldr	r1, .L182+16
-	b	.L180
-.L181:
-	ldrb	r5, [r3, r1]	@ zero_extendqisi2
-	adds	r3, r3, #1
-	ldrb	r6, [r4, #10]	@ zero_extendqisi2
-	lsl	r5, r2, r5
-	orrs	r5, r5, r6
-	strb	r5, [r4, #10]
-.L180:
-	uxtb	r5, r3
-	cmp	r5, r0
-	bcc	.L181
-	pop	{r4, r5, r6, pc}
-.L183:
-	.align	2
-.L182:
-	.word	.LANCHOR23
-	.word	.LANCHOR2
-	.word	.LANCHOR29
-	.word	.LANCHOR16
-	.word	.LANCHOR19
-	.size	ReadFlashInfo, .-ReadFlashInfo
 	.section	.text.NandcReadDontCaseBusyEn,"ax",%progbits
 	.align	1
 	.global	NandcReadDontCaseBusyEn
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	NandcReadDontCaseBusyEn, %function
 NandcReadDontCaseBusyEn:
 	@ args = 0, pretend = 0, frame = 0
@@ -1316,111 +900,123 @@ NandcReadDontCaseBusyEn:
 	.section	.text.NandcGetChipIf,"ax",%progbits
 	.align	1
 	.global	NandcGetChipIf
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	NandcGetChipIf, %function
 NandcGetChipIf:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L186
-	ldr	r2, [r3, r0, lsl #3]
-	add	r3, r3, r0, lsl #3
-	ldrb	r0, [r3, #4]	@ zero_extendqisi2
-	adds	r0, r0, #8
-	add	r0, r2, r0, lsl #8
+	ldr	r2, .L136
+	add	r3, r2, r0, lsl #3
+	ldr	r0, [r2, r0, lsl #3]
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+	adds	r3, r3, #8
+	add	r0, r0, r3, lsl #8
 	bx	lr
-.L187:
+.L137:
 	.align	2
-.L186:
-	.word	.LANCHOR5
+.L136:
+	.word	.LANCHOR6
 	.size	NandcGetChipIf, .-NandcGetChipIf
 	.section	.text.NandcSetDdrPara,"ax",%progbits
 	.align	1
 	.global	NandcSetDdrPara
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	NandcSetDdrPara, %function
 NandcSetDdrPara:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L189
-	lsls	r2, r0, #8
-	orr	r2, r2, r0, lsl #16
-	orr	r2, r2, #1
-	ldr	r3, [r3, #0]
-	str	r2, [r3, #304]
+	ldr	r3, .L139
+	ldr	r2, [r3]
+	lsls	r3, r0, #8
+	orr	r0, r3, r0, lsl #16
+	orr	r0, r0, #1
+	str	r0, [r2, #304]
 	bx	lr
-.L190:
+.L140:
 	.align	2
-.L189:
-	.word	.LANCHOR30
+.L139:
+	.word	.LANCHOR19
 	.size	NandcSetDdrPara, .-NandcSetDdrPara
 	.section	.text.NandcSetDdrDiv,"ax",%progbits
 	.align	1
 	.global	NandcSetDdrDiv
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	NandcSetDdrDiv, %function
 NandcSetDdrDiv:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L192
+	ldr	r3, .L142
 	orr	r0, r0, #16640
-	ldr	r3, [r3, #0]
+	ldr	r3, [r3]
 	str	r0, [r3, #344]
 	bx	lr
-.L193:
+.L143:
 	.align	2
-.L192:
-	.word	.LANCHOR30
+.L142:
+	.word	.LANCHOR19
 	.size	NandcSetDdrDiv, .-NandcSetDdrDiv
 	.section	.text.NandcSetDdrMode,"ax",%progbits
 	.align	1
 	.global	NandcSetDdrMode
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	NandcSetDdrMode, %function
 NandcSetDdrMode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L196
-	ldr	r2, [r3, #0]
-	ldr	r3, [r2, #0]
-	bfc	r3, #13, #1
-	cbz	r0, .L195
-	orr	r3, r3, #253952
-.L195:
-	str	r3, [r2, #0]
+	ldr	r3, .L147
+	ldr	r2, [r3]
+	ldr	r3, [r2]
+	cbnz	r0, .L145
+	bfi	r3, r0, #13, #1
+.L146:
+	str	r3, [r2]
 	bx	lr
-.L197:
+.L145:
+	orr	r3, r3, #253952
+	b	.L146
+.L148:
 	.align	2
-.L196:
-	.word	.LANCHOR30
+.L147:
+	.word	.LANCHOR19
 	.size	NandcSetDdrMode, .-NandcSetDdrMode
 	.section	.text.NandcSetMode,"ax",%progbits
 	.align	1
 	.global	NandcSetMode
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	NandcSetMode, %function
 NandcSetMode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L202
+	ldr	r3, .L156
 	ands	r1, r0, #6
-	ldr	r2, [r3, #0]
-	ldr	r3, [r2, #0]
-	beq	.L199
+	ldr	r2, [r3]
+	ldr	r3, [r2]
+	beq	.L150
 	lsls	r1, r0, #29
-	orr	r3, r3, #24576
 	movw	r1, #16641
 	str	r1, [r2, #344]
-	ldr	r1, .L202+4
+	orr	r3, r3, #24576
+	ldr	r1, .L156+4
 	bfc	r3, #15, #1
 	orr	r3, r3, #196608
 	it	mi
@@ -1430,244 +1026,260 @@ NandcSetMode:
 	str	r1, [r2, #308]
 	movs	r1, #39
 	str	r1, [r2, #308]
-	b	.L201
-.L199:
-	bfi	r3, r1, #13, #1
-.L201:
-	str	r3, [r2, #0]
+.L152:
+	str	r3, [r2]
 	movs	r0, #0
 	bx	lr
-.L203:
+.L150:
+	bfi	r3, r1, #13, #1
+	b	.L152
+.L157:
 	.align	2
-.L202:
-	.word	.LANCHOR30
+.L156:
+	.word	.LANCHOR19
 	.word	1710595
 	.size	NandcSetMode, .-NandcSetMode
 	.section	.text.NandcFlashCs,"ax",%progbits
 	.align	1
 	.global	NandcFlashCs
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	NandcFlashCs, %function
 NandcFlashCs:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L205
-	ldr	r3, [r2, r0, lsl #3]
-	add	r2, r2, r0, lsl #3
-	movs	r0, #1
-	ldrb	r1, [r2, #4]	@ zero_extendqisi2
-	ldr	r2, [r3, #0]
-	lsl	r1, r0, r1
-	bfi	r2, r1, #0, #8
-	str	r2, [r3, #0]
+	ldr	r3, .L159
+	movs	r2, #1
+	ldr	r1, [r3, r0, lsl #3]
+	add	r0, r3, r0, lsl #3
+	ldrb	r0, [r0, #4]	@ zero_extendqisi2
+	ldr	r3, [r1]
+	lsls	r2, r2, r0
+	bfi	r3, r2, #0, #8
+	str	r3, [r1]
 	bx	lr
-.L206:
+.L160:
 	.align	2
-.L205:
-	.word	.LANCHOR5
+.L159:
+	.word	.LANCHOR6
 	.size	NandcFlashCs, .-NandcFlashCs
 	.section	.text.NandcFlashDeCs,"ax",%progbits
 	.align	1
 	.global	NandcFlashDeCs
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	NandcFlashDeCs, %function
 NandcFlashDeCs:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L208
+	ldr	r3, .L162
 	ldr	r2, [r3, r0, lsl #3]
-	ldr	r3, [r2, #0]
+	ldr	r3, [r2]
 	bfc	r3, #0, #8
 	bfc	r3, #17, #1
-	str	r3, [r2, #0]
+	str	r3, [r2]
 	bx	lr
-.L209:
+.L163:
 	.align	2
-.L208:
-	.word	.LANCHOR5
+.L162:
+	.word	.LANCHOR6
 	.size	NandcFlashDeCs, .-NandcFlashDeCs
-	.section	.text.FlashWaitCmdDone,"ax",%progbits
-	.align	1
-	.global	FlashWaitCmdDone
-	.thumb
-	.thumb_func
-	.type	FlashWaitCmdDone, %function
-FlashWaitCmdDone:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L213
-	lsls	r3, r0, #4
-	push	{r4, r5, r6, lr}
-	adds	r4, r2, r3
-	ldrb	r5, [r2, r3]	@ zero_extendqisi2
-	mov	r6, r0
-	ldr	r3, [r4, #8]
-	cbz	r3, .L211
-	mov	r0, r5
-	bl	NandcFlashCs
-	ldr	r3, .L213+4
-	ldr	r1, [r4, #4]
-	mov	r0, r5
-	ldr	r2, [r3, r6, lsl #2]
-	adds	r2, r2, #0
-	it	ne
-	movne	r2, #1
-	bl	FlashWaitReadyEN
-	mov	r6, r0
-	mov	r0, r5
-	bl	NandcFlashDeCs
-	ldr	r3, [r4, #8]
-	ldr	r2, [r4, #12]
-	ands	r6, r6, #1
-	it	ne
-	movne	r6, #-1
-	str	r6, [r3, #0]
-	movs	r3, #0
-	str	r3, [r4, #8]
-	cbz	r2, .L211
-	str	r6, [r2, #0]
-	str	r3, [r4, #12]
-.L211:
-	movs	r0, #0
-	pop	{r4, r5, r6, pc}
-.L214:
-	.align	2
-.L213:
-	.word	.LANCHOR21
-	.word	.LANCHOR20
-	.size	FlashWaitCmdDone, .-FlashWaitCmdDone
-	.section	.text.HynixSetRRPara,"ax",%progbits
+	.section	.text.HynixSetRRPara,"ax",%progbits
 	.align	1
 	.global	HynixSetRRPara
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	HynixSetRRPara, %function
 HynixSetRRPara:
-	@ args = 0, pretend = 0, frame = 0
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r8, r3
-	ldr	r3, .L221
-	mov	r4, r0
-	mov	r5, r1
-	mov	r6, r2
-	sxth	fp, r0
-	ldr	r3, [r3, #0]
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r7, r3
+	ldr	r3, .L171
+	mov	r5, r0
+	mov	r6, r1
+	mov	r10, r2
+	ldr	r4, .L171+4
+	ldr	r3, [r3]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	cmp	r3, #6
-	bne	.L216
-	ldr	r3, .L221+4
-	add	fp, r3, fp, lsl #6
-	add	fp, fp, r8, lsl #2
-	b	.L217
-.L216:
-	cmp	r3, #7
-	bne	.L218
-	lsl	r3, fp, #7
-	add	fp, r3, fp, lsl #5
-	ldr	r3, .L221+8
-	add	fp, r3, fp
-	sxth	r3, r8
-	lsls	r2, r3, #3
-	add	r3, r2, r3, lsl #1
-	add	fp, fp, r3
-	b	.L217
-.L218:
-	add	fp, r8, fp, lsl #3
-	ldr	r3, .L221+4
-	add	fp, r3, fp, lsl #3
-.L217:
-	ldr	r3, .L221+12
-	mov	r0, r4
-	movs	r7, #0
-	ldr	r2, [r3, r4, lsl #3]
-	add	r3, r3, r4, lsl #3
-	ldrb	sl, [r3, #4]	@ zero_extendqisi2
-	add	sl, sl, #8
-	add	sl, r2, sl, lsl #8
+	bne	.L165
+	movs	r3, #20
+	add	r3, r3, r0, lsl #6
+	add	r3, r3, r7, lsl #2
+.L170:
+	add	r4, r4, r3
+.L166:
+	ldr	r3, .L171+8
+	mov	r0, r5
+	subs	r6, r6, #1
+	subs	r4, r4, #1
+	add	r6, r6, r10
+	ldr	r8, [r3, r5, lsl #3]
+	add	r3, r3, r5, lsl #3
+	ldrb	fp, [r3, #4]	@ zero_extendqisi2
 	bl	NandcFlashCs
 	movs	r3, #54
-	str	r3, [sl, #8]
-	b	.L219
-.L220:
-	ldrb	r3, [r6, r7]	@ zero_extendqisi2
-	movs	r0, #200
-	str	r3, [sl, #4]
-	bl	udelay
-	ldrsb	r3, [fp, r7]
-	adds	r7, r7, #1
-	str	r3, [sl, #0]
-.L219:
-	uxtb	r3, r7
-	cmp	r3, r5
-	bcc	.L220
+	lsl	fp, fp, #8
+	add	r0, r8, fp
+	str	r3, [r0, #2056]
+	add	r3, r10, #-1
+	mov	r10, r0
+.L168:
+	cmp	r3, r6
+	bne	.L169
 	movs	r3, #22
-	mov	r0, r4
-	str	r3, [sl, #8]
+	add	r8, r8, fp
+	str	r3, [r8, #2056]
+	mov	r0, r5
 	bl	NandcFlashDeCs
-	ldr	r3, .L221+16
-	strb	r8, [r3, r4]
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L222:
+	ldr	r3, .L171+12
+	strb	r7, [r3, r5]
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L165:
+	cmp	r3, #7
+	bne	.L167
+	movs	r3, #160
+	movs	r2, #28
+	smlabb	r2, r3, r0, r2
+	movs	r3, #10
+	smlabb	r3, r3, r7, r2
+	b	.L170
+.L167:
+	adds	r3, r7, #2
+	add	r3, r3, r0, lsl #3
+	add	r4, r4, r3, lsl #3
+	adds	r4, r4, #4
+	b	.L166
+.L169:
+	ldrb	r2, [r3, #1]!	@ zero_extendqisi2
+	movs	r0, #200
+	str	r2, [r10, #2052]
+	str	r3, [sp, #4]
+	bl	udelay
+	ldrsb	r2, [r4, #1]!
+	ldr	r3, [sp, #4]
+	str	r2, [r10, #2048]
+	b	.L168
+.L172:
 	.align	2
-.L221:
-	.word	.LANCHOR23
-	.word	.LANCHOR31+20
-	.word	.LANCHOR31+28
-	.word	.LANCHOR5
-	.word	.LANCHOR32
+.L171:
+	.word	.LANCHOR18
+	.word	.LANCHOR20
+	.word	.LANCHOR6
+	.word	.LANCHOR21
 	.size	HynixSetRRPara, .-HynixSetRRPara
 	.section	.text.FlashSetReadRetryDefault,"ax",%progbits
 	.align	1
 	.global	FlashSetReadRetryDefault
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FlashSetReadRetryDefault, %function
 FlashSetReadRetryDefault:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L228
+	ldr	r3, .L179
 	push	{r4, r5, r6, lr}
-	ldr	r3, [r3, #0]
+	ldr	r3, [r3]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	cmp	r3, #6
-	bhi	.L223
-	ldr	r6, .L228+4
+	bhi	.L173
+	ldr	r5, .L179+4
 	movs	r4, #0
-	ldr	r5, .L228+8
-.L226:
-	ldrb	r3, [r6, r4, lsl #3]	@ zero_extendqisi2
+	adds	r6, r5, #4
+.L176:
+	ldr	r3, .L179+8
 	uxtb	r0, r4
+	ldrb	r3, [r3, r4, lsl #3]	@ zero_extendqisi2
 	cmp	r3, #173
-	bne	.L225
-	ldrb	r1, [r5, #1]	@ zero_extendqisi2
+	bne	.L175
 	movs	r3, #0
-	ldr	r2, .L228+12
+	mov	r2, r6
+	ldrb	r1, [r5, #1]	@ zero_extendqisi2
 	bl	HynixSetRRPara
-.L225:
+.L175:
 	adds	r4, r4, #1
 	cmp	r4, #4
-	bne	.L226
-.L223:
+	bne	.L176
+.L173:
 	pop	{r4, r5, r6, pc}
-.L229:
+.L180:
 	.align	2
-.L228:
-	.word	.LANCHOR23
+.L179:
+	.word	.LANCHOR18
+	.word	.LANCHOR20
 	.word	.LANCHOR22
-	.word	.LANCHOR31
-	.word	.LANCHOR31+4
 	.size	FlashSetReadRetryDefault, .-FlashSetReadRetryDefault
+	.section	.text.FlashWaitCmdDone,"ax",%progbits
+	.align	1
+	.global	FlashWaitCmdDone
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashWaitCmdDone, %function
+FlashWaitCmdDone:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r2, .L188
+	lsls	r3, r0, #4
+	push	{r4, r5, r6, lr}
+	mov	r6, r0
+	adds	r4, r2, r3
+	ldr	r1, [r4, #8]
+	cbz	r1, .L183
+	ldrb	r5, [r2, r3]	@ zero_extendqisi2
+	mov	r0, r5
+	bl	NandcFlashCs
+	ldr	r3, .L188+4
+	mov	r0, r5
+	ldr	r1, [r4, #4]
+	ldr	r2, [r3, r6, lsl #2]
+	adds	r2, r2, #0
+	it	ne
+	movne	r2, #1
+	bl	FlashWaitReadyEN
+	mov	r1, r0
+	mov	r0, r5
+	bl	NandcFlashDeCs
+	ldr	r3, [r4, #8]
+	sbfx	r1, r1, #0, #1
+	ldr	r2, [r4, #12]
+	str	r1, [r3]
+	movs	r3, #0
+	str	r3, [r4, #8]
+	cbz	r2, .L183
+	str	r1, [r2]
+	str	r3, [r4, #12]
+.L183:
+	movs	r0, #0
+	pop	{r4, r5, r6, pc}
+.L189:
+	.align	2
+.L188:
+	.word	.LANCHOR23
+	.word	.LANCHOR17
+	.size	FlashWaitCmdDone, .-FlashWaitCmdDone
 	.section	.text.NandcDelayns,"ax",%progbits
 	.align	1
 	.global	NandcDelayns
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	NandcDelayns, %function
 NandcDelayns:
 	@ args = 0, pretend = 0, frame = 0
@@ -1680,736 +1292,765 @@ NandcDelayns:
 	.section	.text.NandcWaitFlashReady,"ax",%progbits
 	.align	1
 	.global	NandcWaitFlashReady
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	NandcWaitFlashReady, %function
 NandcWaitFlashReady:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L236
+	ldr	r3, .L196
 	push	{r0, r1, r2, r4, r5, lr}
+	ldr	r4, .L196+4
 	ldr	r5, [r3, r0, lsl #3]
-	ldr	r4, .L236+4
-.L233:
+.L193:
 	movs	r0, #100
 	bl	udelay
-	ldr	r3, [r5, #0]
+	ldr	r3, [r5]
 	str	r3, [sp, #4]
 	ldr	r3, [sp, #4]
-	lsls	r0, r3, #22
-	bmi	.L234
+	lsls	r3, r3, #22
+	bmi	.L194
 	subs	r4, r4, #1
-	bne	.L233
+	bne	.L193
 	mov	r0, #-1
-	b	.L232
-.L234:
+.L191:
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, pc}
+.L194:
 	movs	r0, #0
-.L232:
-	pop	{r1, r2, r3, r4, r5, pc}
-.L237:
+	b	.L191
+.L197:
 	.align	2
-.L236:
-	.word	.LANCHOR5
+.L196:
+	.word	.LANCHOR6
 	.word	100000
 	.size	NandcWaitFlashReady, .-NandcWaitFlashReady
-	.section	.text.FlashEraseSLc2KBlocks,"ax",%progbits
+	.section	.text.FlashReset,"ax",%progbits
 	.align	1
-	.global	FlashEraseSLc2KBlocks
+	.global	FlashReset
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FlashEraseSLc2KBlocks, %function
-FlashEraseSLc2KBlocks:
-	@ args = 0, pretend = 0, frame = 8
+	.fpu softvfp
+	.type	FlashReset, %function
+FlashReset:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r6, r1
+	ldr	r3, .L199
+	push	{r4, r5, r6, lr}
 	mov	r4, r0
-	movs	r5, #0
-	ldr	r7, .L246
-	ldr	sl, .L246+12
-	ldr	fp, .L246+16
-	b	.L239
-.L245:
-	subs	r3, r6, r5
-	movs	r1, #0
-	add	r2, sp, #8
-	mov	r0, r4
-	uxtb	r3, r3
-	str	r3, [sp, #0]
-	add	r3, sp, #12
-	bl	LogAddr2PhyAddr
-	ldr	r3, [sp, #12]
-	ldrb	r2, [r7, #0]	@ zero_extendqisi2
-	cmp	r3, r2
-	bcc	.L240
-	mov	r3, #-1
-	str	r3, [r4, #0]
-	b	.L241
-.L240:
-	ldrb	r8, [sl, r3]	@ zero_extendqisi2
-	lsls	r3, r3, #4
-	mov	r0, r8
-	strb	r8, [fp, r3]
-	bl	NandcWaitFlashReady
-	mov	r0, r8
+	ldr	r5, [r3, r0, lsl #3]
+	add	r3, r3, r0, lsl #3
+	ldrb	r6, [r3, #4]	@ zero_extendqisi2
 	bl	NandcFlashCs
-	movs	r2, #0
-	ldr	r1, [sp, #8]
-	mov	r0, r8
-	bl	FlashEraseCmd
-	mov	r0, r8
-	bl	NandcWaitFlashReady
-	ldr	r1, [sp, #8]
-	mov	r0, r8
-	bl	FlashReadStatus
-	ldr	r3, .L246+4
-	ldr	r1, [r3, #0]
-	ldr	r3, [sp, #8]
-	adds	r1, r1, r3
-	ands	r0, r0, #1
-	it	ne
-	movne	r0, #-1
-	movs	r2, #0
-	str	r0, [r4, #0]
-	mov	r0, r8
-	bl	FlashEraseCmd
-	mov	r0, r8
+	movs	r3, #255
+	mov	r0, r4
+	add	r5, r5, r6, lsl #8
+	str	r3, [r5, #2056]
 	bl	NandcWaitFlashReady
-	mov	r0, r8
-	ldr	r1, [sp, #8]
-	bl	FlashReadStatus
-	lsls	r3, r0, #31
-	itt	mi
-	movmi	r3, #-1
-	strmi	r3, [r4, #0]
-	ldr	r3, [r4, #0]
-	adds	r3, r3, #1
-	bne	.L244
-	ldr	r0, .L246+8
-	ldr	r1, [sp, #8]
-	bl	printf
-.L244:
-	mov	r0, r8
-	bl	NandcFlashDeCs
-.L241:
-	adds	r5, r5, #1
-	adds	r4, r4, #36
-.L239:
-	cmp	r5, r6
-	bne	.L245
-	movs	r0, #0
-	add	sp, sp, #16
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L247:
+	mov	r0, r4
+	pop	{r4, r5, r6, lr}
+	b	NandcFlashDeCs
+.L200:
 	.align	2
-.L246:
-	.word	.LANCHOR16
-	.word	.LANCHOR2
-	.word	.LC1
-	.word	.LANCHOR19
-	.word	.LANCHOR21
-	.size	FlashEraseSLc2KBlocks, .-FlashEraseSLc2KBlocks
-	.section	.text.FlashEraseBlocks,"ax",%progbits
+.L199:
+	.word	.LANCHOR6
+	.size	FlashReset, .-FlashReset
+	.section	.text.FlashEraseBlock,"ax",%progbits
 	.align	1
-	.global	FlashEraseBlocks
+	.global	FlashEraseBlock
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FlashEraseBlocks, %function
-FlashEraseBlocks:
-	@ args = 0, pretend = 0, frame = 16
+	.fpu softvfp
+	.type	FlashEraseBlock, %function
+FlashEraseBlock:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L264
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	sub	sp, sp, #24
-	ldrb	r4, [r3, #0]	@ zero_extendqisi2
-	mov	r5, r0
-	str	r1, [sp, #12]
+	push	{r4, r5, r6, lr}
+	mov	r4, r0
+	mov	r5, r1
 	mov	r6, r2
-	cmp	r4, #0
-	beq	.L262
-	mov	r1, r2
-	bl	FlashEraseSLc2KBlocks
-	b	.L250
-.L258:
-	rsb	r3, r4, r8
-	movs	r6, #36
-	muls	r6, r4, r6
-	add	fp, r5, r6
-	movs	r1, #0
-	uxtb	r3, r3
-	mov	r0, fp
-	str	r3, [sp, #0]
-	add	r2, sp, #16
-	add	r3, sp, #20
-	bl	LogAddr2PhyAddr
-	ldr	r1, .L264+4
-	ldrb	r3, [r1, #0]	@ zero_extendqisi2
-	mov	r7, r0
-	ldr	r0, [sp, #20]
-	cmp	r0, r3
-	bcc	.L251
-	mov	r3, #-1
-	str	r3, [r5, r6]
-	b	.L252
-.L251:
-	ldr	r3, .L264+8
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cmp	r3, #0
-	it	eq
-	moveq	r7, #0
-	add	r3, sl, r0, lsl #4
-	ldr	r3, [r3, #8]
-	cbz	r3, .L254
-	uxtb	r0, r0
-	bl	FlashWaitCmdDone
-.L254:
-	ldr	r2, [sp, #20]
-	ldr	r1, .L264+12
-	add	r3, r1, r2, lsl #4
-	movs	r1, #0
-	str	r1, [r3, #12]
-	ldr	r1, [sp, #16]
-	str	fp, [r3, #8]
-	str	r1, [r3, #4]
-	cbz	r7, .L255
-	adds	r1, r4, #1
-	movs	r0, #36
-	mla	r1, r0, r1, r5
-	str	r1, [r3, #12]
-.L255:
-	ldr	r3, .L264+16
-	ldrb	r6, [r3, r2]	@ zero_extendqisi2
-	lsls	r2, r2, #4
-	mov	r0, r6
-	strb	r6, [sl, r2]
+	bl	NandcWaitFlashReady
+	mov	r0, r4
 	bl	NandcFlashCs
-	ldr	r2, [sp, #12]
-	mov	r0, r6
-	cmp	r2, #1
-	bne	.L256
-	ldr	r3, .L264+20
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L256
-	bl	flash_enter_slc_mode
-	b	.L257
-.L256:
-	bl	flash_exit_slc_mode
-.L257:
-	ldr	r3, .L264+24
-	mov	r0, r6
-	ldr	r2, [sp, #20]
-	adds	r4, r4, r7
-	ldr	r1, [sp, #16]
-	ldr	r2, [r3, r2, lsl #2]
-	adds	r2, r2, #0
-	it	ne
-	movne	r2, #1
-	bl	FlashWaitReadyEN
-	mov	r0, r6
-	ldr	r1, [sp, #16]
-	mov	r2, r7
+	mov	r2, r6
+	mov	r1, r5
+	mov	r0, r4
 	bl	FlashEraseCmd
-	mov	r0, r6
+	mov	r0, r4
+	bl	NandcWaitFlashReady
+	mov	r1, r5
+	mov	r0, r4
+	bl	FlashReadStatus
+	mov	r1, r0
+	mov	r0, r4
 	bl	NandcFlashDeCs
-.L252:
-	adds	r4, r4, #1
-	b	.L249
-.L262:
-	ldr	sl, .L264+12
-	mov	r8, r2
-.L249:
-	cmp	r4, r8
-	bcc	.L258
-	movs	r4, #0
-	ldr	r7, .L264+4
-	ldr	r6, .L264+20
-	ldr	r5, .L264+12
-	b	.L259
-.L261:
-	uxtb	r0, r4
-	bl	FlashWaitCmdDone
-	ldr	r3, [sp, #12]
-	cmp	r3, #1
-	bne	.L260
-	ldrb	r3, [r6, #0]	@ zero_extendqisi2
-	cbz	r3, .L260
-	lsls	r3, r4, #4
-	ldrb	r0, [r5, r3]	@ zero_extendqisi2
-	bl	flash_exit_slc_mode
-.L260:
-	adds	r4, r4, #1
-.L259:
-	ldrb	r3, [r7, #0]	@ zero_extendqisi2
-	cmp	r4, r3
-	bcc	.L261
+	and	r0, r1, #1
+	pop	{r4, r5, r6, pc}
+	.size	FlashEraseBlock, .-FlashEraseBlock
+	.section	.text.FlashSetInterfaceMode,"ax",%progbits
+	.align	1
+	.global	FlashSetInterfaceMode
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashSetInterfaceMode, %function
+FlashSetInterfaceMode:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L230
+	mov	ip, #128
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r5, #0
+	movs	r7, #239
+	mov	lr, #1
+	mov	r8, #35
+	mov	r10, #32
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	and	r2, r3, #4
+	and	r3, r3, #1
+	str	r2, [sp]
+	mov	r2, r5
+	str	r3, [sp, #4]
+.L212:
+	ldr	r3, .L230+4
+	ldrb	r4, [r5, r3]	@ zero_extendqisi2
+	cmp	r4, #152
+	beq	.L203
+	cmp	r4, #69
+	beq	.L203
+	cmp	r4, #173
+	beq	.L203
+	cmp	r4, #44
+	bne	.L204
+.L203:
+	ldr	r3, .L230+8
+	cmp	r0, #1
+	ldr	r1, [r5, r3]
+	add	r3, r3, r5
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+	bne	.L205
+	ldr	r6, [sp, #4]
+	cbz	r6, .L204
+	lsls	r3, r3, #8
+	cmp	r4, #173
+	add	fp, r1, r3
+	str	r7, [fp, #2056]
+	bne	.L206
+	str	r0, [fp, #2052]
+.L229:
+	str	r2, [fp, #2048]
+	b	.L210
+.L206:
+	cmp	r4, #44
+	ittet	eq
+	moveq	r4, #5
+	streq	r0, [fp, #2052]
+	strne	ip, [fp, #2052]
+	streq	r4, [fp, #2048]
+	it	ne
+	strne	r0, [fp, #2048]
+.L210:
+	add	r3, r3, r1
+	str	r2, [r3, #2048]
+	str	r2, [r3, #2048]
+	str	r2, [r3, #2048]
+.L204:
+	adds	r5, r5, #8
+	cmp	r5, #32
+	bne	.L212
 	movs	r0, #0
-.L250:
-	add	sp, sp, #24
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L265:
+	bl	NandcWaitFlashReady
+	movs	r0, #0
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L205:
+	ldr	r6, [sp]
+	cmp	r6, #0
+	beq	.L204
+	lsls	r3, r3, #8
+	cmp	r4, #173
+	add	fp, r1, r3
+	str	r7, [fp, #2056]
+	bne	.L209
+	str	lr, [fp, #2052]
+	str	r10, [fp, #2048]
+	b	.L210
+.L209:
+	cmp	r4, #44
+	bne	.L211
+	str	lr, [fp, #2052]
+	str	r8, [fp, #2048]
+	b	.L210
+.L211:
+	str	ip, [fp, #2052]
+	b	.L229
+.L231:
 	.align	2
-.L264:
-	.word	.LANCHOR0
-	.word	.LANCHOR16
-	.word	.LANCHOR33
-	.word	.LANCHOR21
-	.word	.LANCHOR19
-	.word	.LANCHOR7
-	.word	.LANCHOR20
-	.size	FlashEraseBlocks, .-FlashEraseBlocks
+.L230:
+	.word	.LANCHOR24
+	.word	.LANCHOR22
+	.word	.LANCHOR6
+	.size	FlashSetInterfaceMode, .-FlashSetInterfaceMode
 	.section	.text.SandiskSetRRPara,"ax",%progbits
 	.align	1
 	.global	SandiskSetRRPara
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	SandiskSetRRPara, %function
 SandiskSetRRPara:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, lr}
+	push	{r3, r4, r5, r6, r7, lr}
 	movs	r3, #239
-	mov	r4, r0
 	str	r3, [r0, #8]
 	movs	r3, #17
+	mov	r5, r0
+	mov	r4, r1
 	str	r3, [r0, #4]
 	movs	r0, #200
-	mov	r5, r1
 	bl	udelay
-	ldr	r3, .L272
-	ldr	r1, .L272+4
-	add	r5, r5, r5, lsl #2
-	ldr	r2, .L272+8
-	ldrb	r6, [r3, #0]	@ zero_extendqisi2
-	adds	r1, r1, r5
-	ldr	r3, .L272+12
-	adds	r5, r2, r5
-	ldrb	r0, [r3, #0]	@ zero_extendqisi2
-	movs	r3, #0
-	b	.L267
-.L270:
-	cmp	r0, #67
-	ite	eq
-	addeq	r2, r5, r3
-	addne	r2, r1, r3
-	adds	r3, r3, #1
-	ldrsb	r2, [r2, #5]
-	str	r2, [r4, #0]
-.L267:
-	cmp	r3, r6
-	bcc	.L270
+	ldr	r3, .L238
+	add	r4, r4, r4, lsl #2
+	ldr	r6, .L238+4
+	movs	r2, #0
+	ldr	r7, .L238+8
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	ldr	r3, .L238+12
+	ldrb	r0, [r3]	@ zero_extendqisi2
+.L233:
+	cmp	r2, r1
+	bcc	.L236
 	movs	r0, #0
-	pop	{r4, r5, r6, lr}
+	pop	{r3, r4, r5, r6, r7, lr}
 	b	NandcWaitFlashReady
-.L273:
+.L236:
+	adds	r3, r2, r4
+	cmp	r0, #67
+	ite	eq
+	addeq	r3, r3, r7
+	addne	r3, r3, r6
+	ldrsb	r3, [r3, #5]
+	adds	r2, r2, #1
+	str	r3, [r5]
+	b	.L233
+.L239:
 	.align	2
-.L272:
-	.word	.LANCHOR14
-	.word	.LANCHOR12
-	.word	.LANCHOR10
+.L238:
+	.word	.LANCHOR13
 	.word	.LANCHOR11
+	.word	.LANCHOR9
+	.word	.LANCHOR10
 	.size	SandiskSetRRPara, .-SandiskSetRRPara
-	.section	.text.FlashEraseBlock,"ax",%progbits
+	.section	.text.FlashEraseSLc2KBlocks,"ax",%progbits
 	.align	1
-	.global	FlashEraseBlock
+	.global	FlashEraseSLc2KBlocks
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FlashEraseBlock, %function
-FlashEraseBlock:
-	@ args = 0, pretend = 0, frame = 0
+	.fpu softvfp
+	.type	FlashEraseSLc2KBlocks, %function
+FlashEraseSLc2KBlocks:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, lr}
-	mov	r4, r0
-	mov	r5, r1
-	mov	r6, r2
+	push	{r4, r5, r6, r7, r8, r10, lr}
+	mov	r7, r1
+	ldr	r8, .L250+12
+	sub	sp, sp, #20
+	mov	r5, r0
+	movs	r6, #0
+	ldr	r10, .L250+16
+.L241:
+	cmp	r6, r7
+	bne	.L246
+	movs	r0, #0
+	add	sp, sp, #20
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.L246:
+	subs	r3, r7, r6
+	add	r2, sp, #8
+	uxtb	r3, r3
+	movs	r1, #0
+	mov	r0, r5
+	str	r3, [sp]
+	add	r3, sp, #12
+	bl	LogAddr2PhyAddr
+	ldr	r3, [sp, #12]
+	ldrb	r2, [r8]	@ zero_extendqisi2
+	cmp	r2, r3
+	bhi	.L242
+	mov	r3, #-1
+	str	r3, [r5]
+.L243:
+	adds	r6, r6, #1
+	adds	r5, r5, #36
+	b	.L241
+.L242:
+	ldrb	r4, [r10, r3]	@ zero_extendqisi2
+	lsls	r3, r3, #4
+	ldr	r2, .L250
+	mov	r0, r4
+	strb	r4, [r2, r3]
 	bl	NandcWaitFlashReady
 	mov	r0, r4
 	bl	NandcFlashCs
-	mov	r2, r6
-	mov	r1, r5
+	movs	r2, #0
+	ldr	r1, [sp, #8]
 	mov	r0, r4
 	bl	FlashEraseCmd
 	mov	r0, r4
 	bl	NandcWaitFlashReady
-	mov	r1, r5
+	ldr	r1, [sp, #8]
 	mov	r0, r4
 	bl	FlashReadStatus
-	mov	r5, r0
+	ldr	r3, .L250+4
+	sbfx	r0, r0, #0, #1
+	str	r0, [r5]
+	movs	r2, #0
+	ldr	r1, [sp, #8]
 	mov	r0, r4
-	bl	NandcFlashDeCs
-	and	r0, r5, #1
-	pop	{r4, r5, r6, pc}
-	.size	FlashEraseBlock, .-FlashEraseBlock
-	.section	.text.FlashReset,"ax",%progbits
-	.align	1
-	.global	FlashReset
-	.thumb
-	.thumb_func
-	.type	FlashReset, %function
-FlashReset:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	mov	r4, r0
-	ldr	r3, .L276
-	ldr	r2, [r3, r0, lsl #3]
-	add	r3, r3, r0, lsl #3
-	ldrb	r5, [r3, #4]	@ zero_extendqisi2
-	adds	r5, r5, #8
-	add	r5, r2, r5, lsl #8
-	bl	NandcFlashCs
-	movs	r3, #255
+	ldr	r3, [r3]
+	add	r1, r1, r3
+	bl	FlashEraseCmd
 	mov	r0, r4
-	str	r3, [r5, #8]
 	bl	NandcWaitFlashReady
+	ldr	r1, [sp, #8]
 	mov	r0, r4
-	pop	{r3, r4, r5, lr}
-	b	NandcFlashDeCs
-.L277:
+	bl	FlashReadStatus
+	lsls	r3, r0, #31
+	itt	mi
+	movmi	r3, #-1
+	strmi	r3, [r5]
+	ldr	r3, [r5]
+	adds	r3, r3, #1
+	bne	.L245
+	ldr	r1, [sp, #8]
+	ldr	r0, .L250+8
+	bl	printf
+.L245:
+	mov	r0, r4
+	bl	NandcFlashDeCs
+	b	.L243
+.L251:
 	.align	2
-.L276:
-	.word	.LANCHOR5
-	.size	FlashReset, .-FlashReset
-	.section	.text.FlashSetInterfaceMode,"ax",%progbits
+.L250:
+	.word	.LANCHOR23
+	.word	.LANCHOR3
+	.word	.LC1
+	.word	.LANCHOR25
+	.word	.LANCHOR26
+	.size	FlashEraseSLc2KBlocks, .-FlashEraseSLc2KBlocks
+	.section	.text.FlashEraseBlocks,"ax",%progbits
 	.align	1
-	.global	FlashSetInterfaceMode
+	.global	FlashEraseBlocks
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FlashSetInterfaceMode, %function
-FlashSetInterfaceMode:
-	@ args = 0, pretend = 0, frame = 8
+	.fpu softvfp
+	.type	FlashEraseBlocks, %function
+FlashEraseBlocks:
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L292
-	mov	ip, #239
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	movs	r6, #0
-	ldr	r8, .L292+8
-	mov	r1, r6
-	ldrb	sl, [r3, #0]	@ zero_extendqisi2
-	mov	lr, #128
-	and	fp, sl, #1
-	and	sl, sl, #4
-	str	sl, [sp, #4]
-.L288:
-	add	r3, r8, r6
-	ldr	r7, .L292+4
-	ldr	r2, [r6, r8]
-	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-	ldrb	r5, [r6, r7]	@ zero_extendqisi2
-	adds	r3, r3, #8
-	lsls	r3, r3, #8
-	cmp	r5, #152
-	add	r4, r2, r3
-	beq	.L279
-	cmp	r5, #69
-	beq	.L279
-	cmp	r5, #173
-	beq	.L279
-	cmp	r5, #44
-	bne	.L280
-.L279:
-	cmp	r0, #1
-	bne	.L281
-	cmp	fp, #0
-	beq	.L280
-	cmp	r5, #173
-	str	ip, [r4, #8]
-	bne	.L282
-	str	r0, [r4, #4]
-	b	.L291
-.L282:
-	cmp	r5, #44
-	bne	.L284
-	str	r0, [r4, #4]
-	movs	r4, #5
-	str	r4, [r2, r3]
-	b	.L286
-.L284:
-	str	lr, [r4, #4]
-	str	r0, [r2, r3]
-	b	.L286
-.L281:
-	ldr	r7, [sp, #4]
-	cbz	r7, .L280
-	cmp	r5, #173
-	str	ip, [r4, #8]
-	bne	.L285
-	movs	r5, #1
-	movs	r7, #32
-	str	r5, [r4, #4]
-	b	.L290
-.L285:
-	cmp	r5, #44
-	bne	.L287
-	movs	r7, #35
-	movs	r5, #1
-	str	r5, [r4, #4]
-.L290:
-	str	r7, [r2, r3]
-	b	.L286
-.L287:
-	str	lr, [r4, #4]
-.L291:
-	str	r1, [r2, r3]
-.L286:
-	str	r1, [r2, r3]
-	str	r1, [r2, r3]
-	str	r1, [r2, r3]
-.L280:
-	adds	r6, r6, #8
-	cmp	r6, #32
-	bne	.L288
+	ldr	r3, .L279
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r8, r0
+	sub	sp, sp, #24
+	mov	fp, r1
+	mov	r7, r2
+	ldrb	r4, [r3]	@ zero_extendqisi2
+	cbnz	r4, .L253
+	ldr	r10, .L279+8
+.L254:
+	cmp	r4, r7
+	bcc	.L263
+	ldr	r5, .L279+4
+	movs	r4, #0
+	ldr	r6, .L279+8
+.L264:
+	ldr	r3, .L279+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r4, r3
+	bcc	.L266
 	movs	r0, #0
-	bl	NandcWaitFlashReady
+	b	.L252
+.L253:
+	mov	r1, r2
+	bl	FlashEraseSLc2KBlocks
+.L252:
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L263:
+	movs	r5, #36
+	add	r2, sp, #16
+	muls	r5, r4, r5
+	movs	r1, #0
+	add	r3, r8, r5
+	str	r3, [sp, #12]
+	subs	r3, r7, r4
+	uxtb	r3, r3
+	ldr	r0, [sp, #12]
+	str	r3, [sp]
+	add	r3, sp, #20
+	bl	LogAddr2PhyAddr
+	ldr	r3, .L279+12
+	mov	r6, r0
+	ldr	r0, [sp, #20]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r0
+	bhi	.L256
+	mov	r3, #-1
+	str	r3, [r8, r5]
+.L257:
+	adds	r4, r4, #1
+	b	.L254
+.L256:
+	ldr	r3, .L279+16
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	add	r3, r10, r0, lsl #4
+	it	eq
+	moveq	r6, #0
+	ldr	r3, [r3, #8]
+	cbz	r3, .L259
+	uxtb	r0, r0
+	bl	FlashWaitCmdDone
+.L259:
+	ldr	r1, [sp, #20]
+	ldr	r0, [sp, #12]
+	lsls	r2, r1, #4
+	add	r3, r10, r2
+	str	r0, [r3, #8]
 	movs	r0, #0
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L293:
+	str	r0, [r3, #12]
+	ldr	r0, [sp, #16]
+	str	r0, [r3, #4]
+	cbz	r6, .L260
+	adds	r5, r5, #36
+	add	r5, r5, r8
+	str	r5, [r3, #12]
+.L260:
+	ldr	r3, .L279+20
+	ldrb	r5, [r3, r1]	@ zero_extendqisi2
+	mov	r0, r5
+	strb	r5, [r10, r2]
+	bl	NandcFlashCs
+	cmp	fp, #1
+	mov	r0, r5
+	bne	.L261
+	ldr	r3, .L279+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L261
+	bl	flash_enter_slc_mode
+.L262:
+	ldr	r3, .L279+24
+	mov	r0, r5
+	ldr	r2, [sp, #20]
+	add	r4, r4, r6
+	ldr	r1, [sp, #16]
+	ldr	r2, [r3, r2, lsl #2]
+	adds	r2, r2, #0
+	it	ne
+	movne	r2, #1
+	bl	FlashWaitReadyEN
+	mov	r2, r6
+	ldr	r1, [sp, #16]
+	mov	r0, r5
+	bl	FlashEraseCmd
+	mov	r0, r5
+	bl	NandcFlashDeCs
+	b	.L257
+.L261:
+	bl	flash_exit_slc_mode
+	b	.L262
+.L266:
+	uxtb	r0, r4
+	bl	FlashWaitCmdDone
+	cmp	fp, #1
+	bne	.L265
+	ldrb	r3, [r5]	@ zero_extendqisi2
+	cbz	r3, .L265
+	lsls	r3, r4, #4
+	ldrb	r0, [r6, r3]	@ zero_extendqisi2
+	bl	flash_exit_slc_mode
+.L265:
+	adds	r4, r4, #1
+	b	.L264
+.L280:
 	.align	2
-.L292:
-	.word	.LANCHOR34
-	.word	.LANCHOR22
-	.word	.LANCHOR5
-	.size	FlashSetInterfaceMode, .-FlashSetInterfaceMode
+.L279:
+	.word	.LANCHOR1
+	.word	.LANCHOR8
+	.word	.LANCHOR23
+	.word	.LANCHOR25
+	.word	.LANCHOR27
+	.word	.LANCHOR26
+	.word	.LANCHOR17
+	.size	FlashEraseBlocks, .-FlashEraseBlocks
 	.section	.text.FlashReadDpCmd,"ax",%progbits
 	.align	1
 	.global	FlashReadDpCmd
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FlashReadDpCmd, %function
 FlashReadDpCmd:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L298
-	push	{r4, r5, r6, r7, r8, lr}
-	mov	r7, r2
-	ldr	r2, [r3, r0, lsl #3]
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	mov	r5, r2
+	ldr	r3, .L285
+	mov	r6, r1
+	uxtb	lr, r1
+	mov	r7, r0
+	lsrs	r1, r1, #8
+	uxtb	r8, r5
+	ldr	r10, [r3, r0, lsl #3]
 	add	r3, r3, r0, lsl #3
-	mov	r4, r0
-	mov	r5, r1
-	ldrb	r6, [r3, #4]	@ zero_extendqisi2
-	ldr	r3, .L298+4
-	adds	r6, r6, #8
-	add	r6, r2, r6, lsl #8
+	ldrb	r4, [r3, #4]	@ zero_extendqisi2
+	ldr	r3, .L285+4
 	ldrb	r2, [r3, #16]	@ zero_extendqisi2
-	cmp	r2, #1
-	ldrb	r2, [r3, #8]	@ zero_extendqisi2
-	str	r2, [r6, #8]
-	bne	.L295
-	mov	r8, #0
-	uxtb	r2, r1
-	str	r8, [r6, #4]
-	str	r8, [r6, #4]
-	str	r2, [r6, #4]
-	lsrs	r2, r1, #8
-	str	r2, [r6, #4]
-	lsrs	r2, r1, #16
-	str	r2, [r6, #4]
+	lsls	r4, r4, #8
+	ldrb	ip, [r3, #8]	@ zero_extendqisi2
+	add	r4, r4, r10
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
-	str	r3, [r6, #8]
+	cmp	r2, #1
+	lsr	r2, r6, #16
+	str	ip, [r4, #2056]
+	bne	.L282
+	mov	r10, #0
+	str	r10, [r4, #2052]
+	str	r10, [r4, #2052]
+	str	lr, [r4, #2052]
+	str	r1, [r4, #2052]
+	str	r2, [r4, #2052]
+	str	r3, [r4, #2056]
 	bl	NandcWaitFlashReady
-	str	r8, [r6, #8]
-	str	r8, [r6, #4]
-	str	r8, [r6, #4]
-	b	.L297
-.L295:
-	uxtb	r2, r1
-	str	r2, [r6, #4]
-	lsrs	r2, r1, #8
-	str	r2, [r6, #4]
-	lsrs	r2, r1, #16
-	str	r2, [r6, #4]
-	ldrb	r3, [r3, #9]	@ zero_extendqisi2
-	str	r3, [r6, #8]
-.L297:
-	uxtb	r3, r7
-	mov	r0, r4
-	str	r3, [r6, #4]
-	mov	r1, r5
-	lsrs	r3, r7, #8
-	lsrs	r7, r7, #16
-	str	r3, [r6, #4]
+	str	r10, [r4, #2056]
+	str	r10, [r4, #2052]
+	str	r10, [r4, #2052]
+.L284:
+	lsrs	r3, r5, #8
+	lsrs	r5, r5, #16
+	str	r8, [r4, #2052]
+	str	r3, [r4, #2052]
 	movs	r3, #48
-	str	r7, [r6, #4]
-	str	r3, [r6, #8]
-	pop	{r4, r5, r6, r7, r8, lr}
+	str	r5, [r4, #2052]
+	mov	r1, r6
+	str	r3, [r4, #2056]
+	mov	r0, r7
+	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
 	b	FlashSetRandomizer
-.L299:
+.L282:
+	str	lr, [r4, #2052]
+	str	r1, [r4, #2052]
+	str	r2, [r4, #2052]
+	str	r3, [r4, #2056]
+	b	.L284
+.L286:
 	.align	2
-.L298:
-	.word	.LANCHOR5
+.L285:
 	.word	.LANCHOR6
+	.word	.LANCHOR7
 	.size	FlashReadDpCmd, .-FlashReadDpCmd
 	.section	.text.FlashDeInit,"ax",%progbits
 	.align	1
 	.global	FlashDeInit
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FlashDeInit, %function
 FlashDeInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
 	movs	r0, #0
-	ldr	r4, .L302
+	ldr	r4, .L295
 	bl	NandcWaitFlashReady
 	bl	FlashSetReadRetryDefault
-	ldrb	r3, [r4, #0]	@ zero_extendqisi2
-	cbz	r3, .L301
-	ldr	r3, .L302+4
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	lsls	r2, r3, #31
-	bpl	.L301
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	cbz	r3, .L288
+	ldr	r3, .L295+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	lsls	r3, r3, #31
+	bpl	.L288
 	movs	r0, #1
 	bl	FlashSetInterfaceMode
 	movs	r0, #1
 	bl	NandcSetMode
 	movs	r3, #0
-	strb	r3, [r4, #0]
-.L301:
-	ldr	r3, .L302+8
+	strb	r3, [r4]
+.L288:
+	ldr	r3, .L295+8
 	movs	r0, #0
-	ldr	r3, [r3, #0]
+	ldr	r3, [r3]
 	str	r0, [r3, #336]
 	pop	{r4, pc}
-.L303:
+.L296:
 	.align	2
-.L302:
-	.word	.LANCHOR35
-	.word	.LANCHOR34
-	.word	.LANCHOR5
+.L295:
+	.word	.LANCHOR28
+	.word	.LANCHOR24
+	.word	.LANCHOR6
 	.size	FlashDeInit, .-FlashDeInit
 	.section	.text.NandcRandmzSel,"ax",%progbits
 	.align	1
 	.global	NandcRandmzSel
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	NandcRandmzSel, %function
 NandcRandmzSel:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L305
+	ldr	r3, .L298
 	ldr	r3, [r3, r0, lsl #3]
 	str	r1, [r3, #336]
 	bx	lr
-.L306:
+.L299:
 	.align	2
-.L305:
-	.word	.LANCHOR5
+.L298:
+	.word	.LANCHOR6
 	.size	NandcRandmzSel, .-NandcRandmzSel
 	.section	.text.NandcTimeCfg,"ax",%progbits
 	.align	1
 	.global	NandcTimeCfg
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	NandcTimeCfg, %function
 NandcTimeCfg:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L312
+	ldr	r3, .L305
 	cmp	r0, #35
-	ldr	r3, [r3, #0]
-	bhi	.L308
+	ldr	r3, [r3]
+	bhi	.L301
 	movw	r2, #4193
-	b	.L311
-.L308:
+.L304:
+	str	r2, [r3, #4]
+	bx	lr
+.L301:
 	cmp	r0, #99
 	ite	hi
 	movwhi	r2, #8322
 	movwls	r2, #4225
-.L311:
-	str	r2, [r3, #4]
-	bx	lr
-.L313:
+	b	.L304
+.L306:
 	.align	2
-.L312:
-	.word	.LANCHOR30
+.L305:
+	.word	.LANCHOR19
 	.size	NandcTimeCfg, .-NandcTimeCfg
 	.section	.text.FlashTimingCfg,"ax",%progbits
 	.align	1
 	.global	FlashTimingCfg
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FlashTimingCfg, %function
 FlashTimingCfg:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L315
+	ldr	r3, .L308
 	ldrb	r0, [r3, #21]	@ zero_extendqisi2
 	b	NandcTimeCfg
-.L316:
+.L309:
 	.align	2
-.L315:
-	.word	.LANCHOR18
+.L308:
+	.word	.LANCHOR29
 	.size	FlashTimingCfg, .-FlashTimingCfg
 	.section	.text.NandcBchSel,"ax",%progbits
 	.align	1
 	.global	NandcBchSel
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	NandcBchSel, %function
 NandcBchSel:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L322
-	movs	r1, #16
-	ldr	r2, [r3, #0]
-	movs	r3, #1
+	ldr	r3, .L318
+	movs	r1, #0
+	push	{r4, lr}
+	movs	r4, #16
+	cmp	r0, r4
+	ldr	r2, [r3]
+	mov	r3, #1
 	str	r3, [r2, #8]
-	ldr	r3, .L322+4
-	str	r0, [r3, #0]
-	movs	r3, #0
-	cmp	r0, r1
-	bfi	r3, r1, #8, #8
-	bfc	r3, #18, #1
-	beq	.L321
-.L318:
+	ldr	r3, .L318+4
+	str	r0, [r3]
+	mov	r3, r1
+	bfi	r3, r4, #8, #8
+	bfi	r3, r1, #18, #1
+	bne	.L311
+.L314:
+	bfc	r3, #4, #1
+.L312:
+	orr	r3, r3, #1
+	str	r3, [r2, #12]
+	pop	{r4, pc}
+.L311:
 	cmp	r0, #24
-	bne	.L320
+	bne	.L313
 	orr	r3, r3, #16
-	b	.L319
-.L320:
+	b	.L312
+.L313:
 	cmp	r0, #40
 	orr	r3, r3, #262144
 	orr	r3, r3, #16
-	bne	.L319
-.L321:
-	bfc	r3, #4, #1
+	bne	.L312
+	b	.L314
 .L319:
-	orr	r3, r3, #1
-	str	r3, [r2, #12]
-	bx	lr
-.L323:
 	.align	2
-.L322:
+.L318:
+	.word	.LANCHOR19
 	.word	.LANCHOR30
-	.word	.LANCHOR36
 	.size	NandcBchSel, .-NandcBchSel
 	.section	.text.FlashBchSel,"ax",%progbits
 	.align	1
 	.global	FlashBchSel
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FlashBchSel, %function
 FlashBchSel:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L325
-	strb	r0, [r3, #0]
+	ldr	r3, .L321
+	strb	r0, [r3]
 	b	NandcBchSel
-.L326:
+.L322:
 	.align	2
-.L325:
-	.word	.LANCHOR29
+.L321:
+	.word	.LANCHOR31
 	.size	FlashBchSel, .-FlashBchSel
 	.section	.text.NandCIrqEnable,"ax",%progbits
 	.align	1
 	.global	NandCIrqEnable
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	NandCIrqEnable, %function
 NandCIrqEnable:
 	@ args = 0, pretend = 0, frame = 0
@@ -2420,8 +2061,10 @@ NandCIrqEnable:
 	.section	.text.NandCIrqDisable,"ax",%progbits
 	.align	1
 	.global	NandCIrqDisable
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	NandCIrqDisable, %function
 NandCIrqDisable:
 	@ args = 0, pretend = 0, frame = 0
@@ -2432,8 +2075,10 @@ NandCIrqDisable:
 	.section	.text.rk_nandc_get_irq_status,"ax",%progbits
 	.align	1
 	.global	rk_nandc_get_irq_status
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	rk_nandc_get_irq_status, %function
 rk_nandc_get_irq_status:
 	@ args = 0, pretend = 0, frame = 0
@@ -2445,8 +2090,10 @@ rk_nandc_get_irq_status:
 	.section	.text.rk_nandc_flash_ready,"ax",%progbits
 	.align	1
 	.global	rk_nandc_flash_ready
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	rk_nandc_flash_ready, %function
 rk_nandc_flash_ready:
 	@ args = 0, pretend = 0, frame = 0
@@ -2457,8 +2104,10 @@ rk_nandc_flash_ready:
 	.section	.text.NandcIqrWaitFlashReady,"ax",%progbits
 	.align	1
 	.global	NandcIqrWaitFlashReady
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	NandcIqrWaitFlashReady, %function
 NandcIqrWaitFlashReady:
 	@ args = 0, pretend = 0, frame = 0
@@ -2469,8 +2118,10 @@ NandcIqrWaitFlashReady:
 	.section	.text.rk_nandc_flash_xfer_completed,"ax",%progbits
 	.align	1
 	.global	rk_nandc_flash_xfer_completed
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	rk_nandc_flash_xfer_completed, %function
 rk_nandc_flash_xfer_completed:
 	@ args = 0, pretend = 0, frame = 0
@@ -2481,8 +2132,10 @@ rk_nandc_flash_xfer_completed:
 	.section	.text.NandcSendDumpDataStart,"ax",%progbits
 	.align	1
 	.global	NandcSendDumpDataStart
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	NandcSendDumpDataStart, %function
 NandcSendDumpDataStart:
 	@ args = 0, pretend = 0, frame = 8
@@ -2490,7 +2143,7 @@ NandcSendDumpDataStart:
 	@ link register save eliminated.
 	ldr	r2, [r0, #16]
 	sub	sp, sp, #8
-	ldr	r3, .L334
+	ldr	r3, .L330
 	str	r2, [sp, #4]
 	ldr	r2, [sp, #4]
 	bfc	r2, #2, #1
@@ -2501,320 +2154,338 @@ NandcSendDumpDataStart:
 	orr	r3, r3, #4
 	str	r3, [r0, #8]
 	add	sp, sp, #8
+	@ sp needed
 	bx	lr
-.L335:
+.L331:
 	.align	2
-.L334:
+.L330:
 	.word	538969130
 	.size	NandcSendDumpDataStart, .-NandcSendDumpDataStart
 	.section	.text.NandcSendDumpDataDone,"ax",%progbits
 	.align	1
 	.global	NandcSendDumpDataDone
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	NandcSendDumpDataDone, %function
 NandcSendDumpDataDone:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	sub	sp, sp, #8
-.L337:
+.L333:
 	ldr	r3, [r0, #8]
 	str	r3, [sp, #4]
 	ldr	r3, [sp, #4]
-	lsls	r1, r3, #11
-	bpl	.L337
+	lsls	r3, r3, #11
+	bpl	.L333
 	add	sp, sp, #8
+	@ sp needed
 	bx	lr
 	.size	NandcSendDumpDataDone, .-NandcSendDumpDataDone
 	.section	.text.NandcXferStart,"ax",%progbits
 	.align	1
 	.global	NandcXferStart
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	NandcXferStart, %function
 NandcXferStart:
 	@ args = 8, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #24
-	mov	r4, r1
+	mov	r7, r1
 	ldr	r1, [sp, #60]
-	ldr	r8, [sp, #56]
-	cbnz	r1, .L351
-	adds	r1, r8, #0
+	str	r2, [sp, #4]
+	ldr	fp, [sp, #56]
+	cmp	r1, #0
+	bne	.L350
+	adds	r5, fp, #0
 	it	ne
-	movne	r1, #1
-	b	.L340
-.L351:
+	movne	r5, #1
+.L337:
+	ldr	r1, .L355
+	movs	r4, #0
+	ldr	r6, [r1, r0, lsl #3]
+	add	r1, r1, r0, lsl #3
+	movs	r0, #16
+	ldr	r8, [r6, #12]
+	ldrb	r1, [r1, #4]	@ zero_extendqisi2
+	bfi	r8, r0, #8, #8
+	bfi	r8, r4, #3, #1
+	bfi	r4, r7, #1, #1
+	bfi	r8, r1, #5, #3
+	orr	r4, r4, #8
 	movs	r1, #1
-.L340:
-	ldr	r5, .L354
-	mov	ip, #16
-	ldr	r6, [r5, r0, lsl #3]
-	add	r0, r5, r0, lsl #3
-	movs	r5, #0
-	ldrb	r0, [r0, #4]	@ zero_extendqisi2
-	ldr	r7, [r6, #12]
-	bfi	r7, ip, #8, #8
-	bfi	r7, r5, #3, #1
-	bfi	r5, r4, #1, #1
-	bfi	r7, r0, #5, #3
-	orr	r5, r5, #8
-	movs	r0, #1
-	bfi	r5, r0, #5, #2
-	lsr	r3, r3, r0
-	orr	r5, r5, #536870912
-	orr	r5, r5, #1024
-	bfi	r5, r3, #4, #1
-	ldr	r3, .L354+4
-	ldr	r3, [r3, #0]
+	bfi	r4, r1, #5, #2
+	lsrs	r3, r3, r1
+	orr	r4, r4, #536870912
+	orr	r4, r4, #1024
+	bfi	r4, r3, #4, #1
+	ldr	r3, .L355+4
+	ldr	r3, [r3]
 	cmp	r3, #3
-	bls	.L341
+	bls	.L338
 	ldr	r3, [r6, #16]
 	str	r3, [sp, #20]
 	ldr	r3, [sp, #20]
 	bfc	r3, #2, #1
 	str	r3, [sp, #20]
-	cmp	r1, #0
-	beq	.L342
-	cbz	r4, .L343
-	ldr	r3, .L354+8
-	str	r2, [sp, #4]
-	ldr	r3, [r3, #0]
-	cmp	r3, #24
-	ite	hi
-	movhi	r3, #128
-	movls	r3, #64
-	str	r3, [sp, #8]
-	lsr	r3, r2, r0
-	str	r3, [sp, #12]
-	ldr	r3, .L354+12
-	ldr	r0, [sp, #60]
-	ldr	lr, [r3, #4]
-	movs	r3, #0
-	mov	r1, r3
-	b	.L345
+	cmp	r5, #0
+	beq	.L339
+	ldr	r5, .L355+8
+	cmp	r7, #0
+	bne	.L340
 .L348:
-	ldr	r2, [sp, #60]
-	lsr	ip, r3, #2
-	cbz	r2, .L346
-	ldrh	fp, [r0, #2]
-	ldrh	sl, [r0], #4
-	orr	sl, sl, fp, lsl #16
-	str	sl, [lr, ip, lsl #2]
-	b	.L347
-.L346:
-	mov	r2, #-1
-	str	r2, [lr, ip, lsl #2]
-.L347:
-	ldr	r2, [sp, #8]
-	adds	r1, r1, #1
-	adds	r3, r3, r2
-.L345:
-	ldr	r2, [sp, #12]
-	cmp	r1, r2
-	bcc	.L348
 	ldr	r2, [sp, #4]
-.L343:
 	adds	r2, r2, #1
-	ldr	sl, .L354+12
 	asrs	r2, r2, #1
-	bfi	r5, r2, #22, #6
-	cmp	r8, #0
-	bne	.L353
-	ldr	r0, [sl, #0]
-	b	.L349
-.L353:
-	mov	r0, r8
-.L349:
-	ldr	r3, [sl, #4]
-	ubfx	fp, r5, #22, #5
-	str	r0, [sl, #8]
-	add	r1, r0, fp, lsl #10
-	str	r0, [sl, #16]
-	str	r3, [sl, #12]
-	str	r3, [sl, #20]
+	bfi	r4, r2, #22, #6
+	cmp	fp, #0
+	beq	.L341
+	mov	r0, fp
+.L342:
+	ldr	r3, [r5, #4]
+	ubfx	r10, r4, #22, #5
+	add	r1, r0, r10, lsl #10
+	str	r0, [r5, #8]
+	str	r0, [r5, #16]
+	clz	r7, r7
+	str	r3, [r5, #12]
+	lsrs	r7, r7, #5
+	str	r3, [r5, #20]
 	bl	flush_dcache_range
-	ldr	r0, [sl, #12]
-	add	r1, r0, fp, lsl #7
+	ldr	r0, [r5, #12]
+	add	r1, r0, r10, lsl #7
 	bl	flush_dcache_range
 	movs	r3, #1
-	str	r3, [sl, #24]
 	movs	r2, #16
-	ldr	r3, [sl, #16]
+	str	r3, [r5, #24]
+	tst	fp, #3
+	ldr	r3, [r5, #16]
 	str	r3, [r6, #20]
-	ldr	r3, [sl, #20]
+	ldr	r3, [r5, #20]
 	str	r3, [r6, #24]
-	movs	r3, #0
+	mov	r3, #0
 	str	r3, [sp, #20]
-	tst	r8, #3
 	ldr	r3, [sp, #20]
 	bfi	r3, r2, #9, #5
+	it	eq
+	moveq	r2, #2
 	str	r3, [sp, #20]
 	ldr	r3, [sp, #20]
 	orr	r3, r3, #448
 	str	r3, [sp, #20]
-	bne	.L350
-	ldr	r3, [sp, #20]
-	movs	r2, #2
-	bfi	r3, r2, #3, #3
-	str	r3, [sp, #20]
-.L350:
+	ittt	eq
+	ldreq	r3, [sp, #20]
+	bfieq	r3, r2, #3, #3
+	streq	r3, [sp, #20]
 	ldr	r3, [sp, #20]
-	rsbs	r4, r4, #1
-	it	cc
-	movcc	r4, #0
 	orr	r3, r3, #4
 	str	r3, [sp, #20]
 	ldr	r3, [sp, #20]
-	bfi	r3, r4, #1, #1
+	bfi	r3, r7, #1, #1
 	str	r3, [sp, #20]
 	ldr	r3, [sp, #20]
 	orr	r3, r3, #1
 	str	r3, [sp, #20]
-.L342:
+.L339:
 	ldr	r3, [sp, #20]
 	str	r3, [r6, #16]
-.L341:
-	str	r7, [r6, #12]
-	str	r5, [r6, #8]
-	orr	r5, r5, #4
-	str	r5, [r6, #8]
+.L338:
+	str	r8, [r6, #12]
+	str	r4, [r6, #8]
+	orr	r4, r4, #4
+	str	r4, [r6, #8]
 	add	sp, sp, #24
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L355:
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L350:
+	movs	r5, #1
+	b	.L337
+.L340:
+	ldr	r3, .L355+12
+	movs	r1, #0
+	ldr	lr, [r5, #4]
+	mov	r0, r1
+	ldr	r3, [r3]
+	cmp	r3, #25
+	ite	cc
+	movcc	r3, #64
+	movcs	r3, #128
+	str	r3, [sp, #8]
+	ldr	r3, [sp, #4]
+	lsrs	r3, r3, #1
+	str	r3, [sp, #12]
+	ldr	r3, [sp, #60]
+.L344:
+	ldr	r2, [sp, #12]
+	cmp	r0, r2
+	bcs	.L348
+	ldr	r2, [sp, #60]
+	bic	r10, r1, #3
+	cbz	r2, .L345
+	ldrh	ip, [r3]
+	adds	r3, r3, #4
+	ldrh	r2, [r3, #-2]
+	orr	ip, ip, r2, lsl #16
+	str	ip, [lr, r10]
+.L346:
+	ldr	r2, [sp, #8]
+	adds	r0, r0, #1
+	add	r1, r1, r2
+	b	.L344
+.L345:
+	mov	r2, #-1
+	str	r2, [lr, r10]
+	b	.L346
+.L341:
+	ldr	r3, .L355+8
+	ldr	r0, [r3]
+	b	.L342
+.L356:
 	.align	2
-.L354:
-	.word	.LANCHOR5
-	.word	.LANCHOR37
-	.word	.LANCHOR36
-	.word	.LANCHOR38
+.L355:
+	.word	.LANCHOR6
+	.word	.LANCHOR32
+	.word	.LANCHOR33
+	.word	.LANCHOR30
 	.size	NandcXferStart, .-NandcXferStart
 	.section	.text.NandcXferComp,"ax",%progbits
 	.align	1
 	.global	NandcXferComp
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	NandcXferComp, %function
 NandcXferComp:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L373
-	push	{r0, r1, r2, r4, r5, lr}
-	ldr	r4, [r3, r0, lsl #3]
-	ldr	r3, .L373+4
-	ldr	r3, [r3, #0]
-	cmp	r3, #3
-	bls	.L369
-	ldr	r2, [r4, #16]
-	lsls	r2, r2, #29
-	bpl	.L369
-	ldr	r2, [r4, #16]
-	lsls	r0, r2, #30
-	bpl	.L365
-	ldr	r2, [r4, #8]
-	str	r2, [sp, #0]
-	b	.L372
-.L362:
-	cmp	r3, #5
-	bls	.L372
-	ldr	r2, [r4, #0]
-	str	r2, [sp, #4]
-	ldr	r2, [sp, #4]
-	lsls	r1, r2, #18
-	bpl	.L372
-	ldr	r2, [sp, #4]
-	lsls	r2, r2, #14
-	bmi	.L361
-.L372:
-	ldr	r1, [r4, #28]
-	ldr	r2, [sp, #0]
-	ubfx	r1, r1, #16, #5
-	ubfx	r2, r2, #22, #6
-	cmp	r1, r2
-	blt	.L362
+	ldr	r3, .L387
+	push	{r0, r1, r4, lr}
+	ldr	r1, [r3, r0, lsl #3]
+	ldr	r3, .L387+4
+	ldr	r0, [r3]
+	cmp	r0, #3
+	bls	.L380
+	ldr	r3, [r1, #16]
+	lsls	r2, r3, #29
+	bpl	.L380
+	ldr	r3, [r1, #16]
+	tst	r3, #2
+	ldr	r3, [r1, #8]
+	str	r3, [sp]
+	beq	.L367
 .L361:
-	ldr	r4, .L373+8
+	ldr	r2, [r1, #28]
+	ldr	r3, [sp]
+	ubfx	r2, r2, #16, #5
+	ubfx	r3, r3, #22, #6
+	cmp	r2, r3
+	bge	.L365
+	cmp	r0, #5
+	bls	.L361
+	ldr	r3, [r1]
+	str	r3, [sp, #4]
+	ldr	r3, [sp, #4]
+	lsls	r3, r3, #18
+	bpl	.L361
+	ldr	r3, [sp, #4]
+	lsls	r4, r3, #14
+	bpl	.L361
+.L365:
+	ldr	r4, .L387+8
 	ldr	r3, [r4, #24]
-	cbz	r3, .L363
-	ldr	r1, [sp, #0]
+	cbz	r3, .L366
 	ldr	r0, [r4, #16]
+	ldr	r1, [sp]
 	ubfx	r1, r1, #22, #5
 	add	r1, r0, r1, lsl #10
 	bl	invalidate_dcache_range
-	ldr	r1, [sp, #0]
 	ldr	r0, [r4, #20]
+	ldr	r1, [sp]
 	ubfx	r1, r1, #22, #5
 	add	r1, r0, r1, lsl #7
 	bl	invalidate_dcache_range
-	b	.L363
-.L365:
-	ldr	r3, [r4, #8]
-	str	r3, [sp, #0]
-	ldr	r3, [sp, #0]
-	lsls	r5, r3, #11
-	bpl	.L365
-	ldr	r5, .L373+12
-	ldr	r3, [r5, #0]
-	cbz	r3, .L366
-	mov	r0, r4
-	bl	NandcSendDumpDataStart
 .L366:
-	ldr	r3, [r5, #0]
-	cbz	r3, .L363
-	mov	r0, r4
-	bl	NandcSendDumpDataDone
-.L363:
-	ldr	r3, .L373+8
+	ldr	r3, .L387+8
 	movs	r2, #0
 	str	r2, [r3, #24]
-	b	.L356
+.L357:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, pc}
+.L368:
+	ldr	r3, [r1, #8]
+	str	r3, [sp]
+.L367:
+	ldr	r3, [sp]
+	lsls	r2, r3, #11
+	bpl	.L368
+	ldr	r4, .L387+12
+	ldr	r2, [r4]
+	cbz	r2, .L369
+	mov	r0, r1
+	bl	NandcSendDumpDataStart
 .L369:
-	ldr	r3, [r4, #8]
-	str	r3, [sp, #0]
-	ldr	r3, [sp, #0]
-	lsls	r0, r3, #11
-	bpl	.L369
-.L356:
-	pop	{r1, r2, r3, r4, r5, pc}
-.L374:
+	ldr	r3, [r4]
+	cmp	r3, #0
+	beq	.L366
+	mov	r0, r1
+	bl	NandcSendDumpDataDone
+	b	.L366
+.L380:
+	ldr	r3, [r1, #8]
+	str	r3, [sp]
+	ldr	r3, [sp]
+	lsls	r3, r3, #11
+	bpl	.L380
+	b	.L357
+.L388:
 	.align	2
-.L373:
-	.word	.LANCHOR5
-	.word	.LANCHOR37
-	.word	.LANCHOR38
-	.word	.LANCHOR39
+.L387:
+	.word	.LANCHOR6
+	.word	.LANCHOR32
+	.word	.LANCHOR33
+	.word	.LANCHOR34
 	.size	NandcXferComp, .-NandcXferComp
 	.section	.text.Ftl_log2,"ax",%progbits
 	.align	1
 	.global	Ftl_log2
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	Ftl_log2, %function
 Ftl_log2:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+	movs	r1, #0
 	movs	r2, #1
-	movs	r3, #0
-	b	.L376
-.L377:
-	adds	r3, r3, #1
-	lsls	r2, r2, #1
-	uxth	r3, r3
-.L376:
+.L390:
 	cmp	r2, r0
-	bls	.L377
-	subs	r3, r3, #1
-	uxth	r0, r3
+	uxth	r3, r1
+	add	r1, r1, #1
+	bls	.L391
+	subs	r0, r3, #1
+	uxth	r0, r0
 	bx	lr
+.L391:
+	lsls	r2, r2, #1
+	b	.L390
 	.size	Ftl_log2, .-Ftl_log2
 	.section	.text.FtlPrintInfo,"ax",%progbits
 	.align	1
 	.global	FtlPrintInfo
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FtlPrintInfo, %function
 FtlPrintInfo:
 	@ args = 0, pretend = 0, frame = 0
@@ -2825,606 +2496,617 @@ FtlPrintInfo:
 	.section	.text.FtlSysBlkNumInit,"ax",%progbits
 	.align	1
 	.global	FtlSysBlkNumInit
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FtlSysBlkNumInit, %function
 FtlSysBlkNumInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L382
-	cmp	r0, #23
-	it	ls
-	movls	r0, #24
-	ldr	r2, .L382+4
-	str	r0, [r3, #0]
-	ldr	r3, .L382+8
-	ldrh	r3, [r3, #0]
+	ldr	r3, .L394
+	cmp	r0, #24
+	it	cc
+	movcc	r0, #24
+	ldr	r2, .L394+4
+	str	r0, [r3]
+	ldr	r3, .L394+8
+	ldrh	r3, [r3]
 	muls	r3, r0, r3
-	str	r3, [r2, #0]
-	ldr	r2, .L382+12
-	ldrh	r2, [r2, #0]
+	str	r3, [r2]
+	ldr	r2, .L394+12
+	ldrh	r2, [r2]
 	subs	r0, r2, r0
-	ldr	r2, .L382+16
-	strh	r0, [r2, #0]	@ movhi
+	ldr	r2, .L394+16
+	strh	r0, [r2]	@ movhi
 	movs	r0, #0
-	ldr	r2, .L382+20
-	ldr	r2, [r2, #0]
+	ldr	r2, .L394+20
+	ldr	r2, [r2]
 	subs	r3, r2, r3
-	ldr	r2, .L382+24
-	str	r3, [r2, #0]
+	ldr	r2, .L394+24
+	str	r3, [r2]
 	bx	lr
-.L383:
+.L395:
 	.align	2
-.L382:
-	.word	.LANCHOR40
-	.word	.LANCHOR42
+.L394:
+	.word	.LANCHOR35
+	.word	.LANCHOR37
+	.word	.LANCHOR36
+	.word	.LANCHOR39
+	.word	.LANCHOR38
 	.word	.LANCHOR41
-	.word	.LANCHOR44
-	.word	.LANCHOR43
-	.word	.LANCHOR46
-	.word	.LANCHOR45
+	.word	.LANCHOR40
 	.size	FtlSysBlkNumInit, .-FtlSysBlkNumInit
 	.global	__aeabi_idiv
 	.section	.text.FtlConstantsInit,"ax",%progbits
 	.align	1
 	.global	FtlConstantsInit
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FtlConstantsInit, %function
 FtlConstantsInit:
-	@ args = 0, pretend = 0, frame = 32
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r4, r0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r10, r0
 	ldrh	r7, [r0, #8]
-	sub	sp, sp, #32
-	ldr	r3, .L400
-	ldrh	r1, [r0, #10]
+	sub	sp, sp, #24
+	ldr	r3, .L424
+	ldr	r1, .L424+4
+	ldrh	r6, [r10, #14]
+	ldr	r2, .L424+8
+	strh	r7, [r3]	@ movhi
+	ldrh	r3, [r0, #10]
 	ldrh	r0, [r0, #12]
-	strh	r7, [r3, #0]	@ movhi
-	ldr	r3, .L400+4
-	ldrh	ip, [r4, #14]
-	ldr	r2, .L400+8
-	strh	r1, [r3, #0]	@ movhi
-	ldr	r3, .L400+12
-	strh	r0, [r3, #0]	@ movhi
-	ldr	r3, .L400+16
-	strh	ip, [r3, #0]	@ movhi
-	movs	r3, #0
-.L385:
-	strb	r3, [r3, r2]
-	adds	r3, r3, #1
-	cmp	r3, #32
-	bne	.L385
-	ldrh	r2, [r4, #14]
-	ldrh	r3, [r4, #20]
-	cmp	r3, r2, lsr #8
-	bcs	.L386
-	ldr	r3, .L400+8
-	uxtb	sl, r0
+	strh	r6, [r1]	@ movhi
+	str	r1, [sp, #20]
+	ldr	r1, .L424+12
+	ldr	r4, .L424+16
+	strh	r0, [r2]	@ movhi
 	movs	r2, #0
-	subs	r6, r3, r0
-	str	r6, [sp, #24]
-	subs	r6, r1, #1
-	lsl	r8, sl, #1
-	mla	r6, r0, r6, r3
-	uxtb	r8, r8
-	rsb	r5, r8, #0
-	uxtb	r5, r5
-	str	r6, [sp, #28]
-	b	.L387
-.L388:
-	ldr	r2, [sp, #12]
-	add	fp, r6, r5
-	add	lr, lr, #1
-	strb	fp, [r2, r3]
-	ldr	r2, [sp, #20]
-	add	fp, r6, r2
-	ldr	r2, [sp, #16]
-	strb	fp, [r2, r3]
-	b	.L389
-.L398:
-	ldr	fp, [sp, #24]
-	movs	r3, #0
-	mov	r6, r3
-	mov	lr, r3
-	add	fp, fp, r2
-	str	fp, [sp, #12]
-	ldr	fp, [sp, #28]
-	str	r2, [sp, #4]
-	add	fp, fp, r2
-	str	fp, [sp, #16]
-	add	fp, r5, sl
-	str	fp, [sp, #20]
-.L389:
-	add	r6, r6, r8
-	cmp	lr, r1
-	add	r3, r3, r0
-	uxtb	r6, r6
-	bcc	.L388
-	ldr	r2, [sp, #4]
-	adds	r5, r5, #1
+	strh	r3, [r4]	@ movhi
+	str	r4, [sp, #8]
+.L397:
+	strb	r2, [r2, r1]
 	adds	r2, r2, #1
-	uxtb	r5, r5
-.L387:
+	cmp	r2, #32
+	bne	.L397
+	ldrh	r1, [r10, #14]
+	ldrh	r2, [r10, #20]
+	cmp	r2, r1, lsr #8
+	bcs	.L398
+	uxtb	r8, r0
+	lsl	r2, r8, #1
+	uxtb	r2, r2
+	str	r2, [sp, #4]
+	subs	r2, r3, #1
+	muls	r2, r0, r2
+	str	r2, [sp, #12]
+	movs	r2, #0
+.L399:
 	cmp	r2, r0
-	bcc	.L398
-	ldr	r3, .L400+4
-	lsls	r1, r1, #1
-	lsr	ip, ip, #1
-	strh	r1, [r3, #0]	@ movhi
-	ldr	r3, .L400+16
-	strh	ip, [r3, #0]	@ movhi
-.L386:
-	ldr	r3, .L400+20
+	bcs	.L401
+	ldr	r4, [sp, #12]
+	sub	fp, r2, r0
+	uxtb	r1, r2
+	adds	r5, r2, r4
+	ldr	r4, .L424+12
+	add	r4, r4, r5
+	movs	r5, #0
+	mov	lr, r4
+	ldr	r4, .L424+12
+	mov	ip, r5
+	add	fp, fp, r4
+	b	.L402
+.L400:
+	add	r4, r8, r1
+	strb	r1, [fp, r5]
+	str	r4, [sp, #16]
+	add	ip, ip, #1
+	ldrb	r4, [sp, #16]	@ zero_extendqisi2
+	strb	r4, [lr, r5]
+	ldr	r4, [sp, #4]
+	add	r1, r1, r4
+	uxtb	r1, r1
+.L402:
+	cmp	ip, r3
+	add	r5, r5, r0
+	bcc	.L400
+	adds	r2, r2, #1
+	b	.L399
+.L401:
+	ldr	r2, [sp, #8]
+	lsls	r3, r3, #1
+	lsrs	r6, r6, #1
+	strh	r3, [r2]	@ movhi
+	ldr	r3, .L424+4
+	strh	r6, [r3]	@ movhi
+.L398:
+	ldr	r3, .L424+20
 	movs	r2, #5
-	movs	r1, #0
 	cmp	r7, #1
-	strh	r2, [r3, #0]	@ movhi
-	ldr	r2, .L400+24
+	mov	r1, #0
+	strh	r2, [r3]	@ movhi
+	ldr	r2, .L424+24
 	it	eq
-	strheq	r7, [r3, #0]	@ movhi
-	ldr	r3, .L400+28
-	strh	r1, [r2, #0]	@ movhi
-	mov	r2, #4352
-	strh	r2, [r3, #0]	@ movhi
-	ldr	r2, .L400+32
-	ldrb	r8, [r2, #0]	@ zero_extendqisi2
-	cmp	r8, #0
-	beq	.L391
-	mov	r2, #384
-	strh	r2, [r3, #0]	@ movhi
-.L391:
-	ldr	r3, .L400+4
-	ldrh	r5, [r3, #0]
-	muls	r5, r0, r5
-	ldr	r3, .L400+36
+	strheq	r7, [r3]	@ movhi
+	ldr	r3, .L424+28
+	strh	r1, [r2]	@ movhi
+	mov	r1, #4352
+	strh	r1, [r3]	@ movhi
+	ldr	r1, .L424+32
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	str	r1, [sp, #4]
+	cbz	r1, .L404
+	mov	r1, #384
+	strh	r1, [r3]	@ movhi
+.L404:
+	ldr	r3, [sp, #8]
+	str	r2, [sp, #16]
+	ldr	fp, .L424+120
+	ldrh	r5, [r3]
+	ldr	r3, .L424+36
+	ldr	r8, .L424+124
+	smulbb	r5, r5, r0
 	uxth	r5, r5
-	strh	r5, [r3, #0]	@ movhi
-	ldr	r3, .L400+16
-	ldrh	r6, [r3, #0]
-	muls	r0, r6, r0
-	ldr	r3, .L400+40
+	strh	r5, [r3]	@ movhi
+	ldr	r3, [sp, #20]
+	ldrh	r4, [r3]
+	ldr	r3, .L424+40
+	smulbb	r0, r0, r4
 	uxth	r0, r0
-	strh	r0, [r3, #0]	@ movhi
+	strh	r0, [r3]	@ movhi
 	bl	Ftl_log2
-	ldr	r3, .L400+44
-	ldrh	fp, [r4, #16]
-	ldrh	r1, [r4, #18]
-	ldrh	sl, [r4, #20]
-	mul	r2, fp, r5
-	strh	r0, [r3, #0]	@ movhi
-	mov	r0, sl
-	ldr	r3, .L400+48
-	strh	fp, [r3, #0]	@ movhi
-	ldr	r3, .L400+52
-	strh	r1, [r3, #0]	@ movhi
-	ldr	r3, .L400+56
-	strh	r2, [r3, #0]	@ movhi
-	ldr	r3, .L400+60
-	strh	sl, [r3, #0]	@ movhi
-	str	r1, [sp, #8]
+	ldr	r3, .L424+44
+	ldrh	r6, [r10, #16]
+	ldrh	r1, [r10, #18]
+	strh	r0, [r3]	@ movhi
+	ldr	r3, .L424+48
+	smulbb	r0, r5, r6
+	strh	r6, [fp]	@ movhi
+	str	r1, [sp, #12]
+	strh	r1, [r3]	@ movhi
+	ldr	r3, .L424+52
+	strh	r0, [r3]	@ movhi
+	ldrh	r3, [r10, #20]
+	mov	r0, r3
+	strh	r3, [r8]	@ movhi
+	str	r3, [sp, #8]
 	bl	Ftl_log2
-	ldr	r3, .L400+64
-	ldr	r2, .L400+68
-	ldr	r1, [sp, #8]
-	mul	r1, r1, sl
-	strh	r0, [r3, #0]	@ movhi
-	lsl	r3, sl, #9
+	ldr	r3, [sp, #8]
 	mov	r7, r0
-	uxth	r3, r3
-	strh	r3, [r2, #0]	@ movhi
-	ldr	r2, .L400+72
-	lsrs	r3, r3, #8
-	cmp	r6, #1024
-	strh	r3, [r2, #0]	@ movhi
-	ldrh	r2, [r4, #26]
-	ldr	r3, .L400+76
-	ldr	r4, .L400+28
-	strh	r2, [r3, #0]	@ movhi
-	mul	r2, r6, r5
-	ldr	r3, .L400+80
-	ldrh	r0, [r4, #0]
-	str	r2, [r3, #0]
-	it	hi
-	uxtbhi	r2, r6
-	ldr	r3, .L400+24
-	it	hi
-	strhhi	r2, [r3, #0]	@ movhi
-	lsls	r0, r0, #3
-	ldrh	r2, [r3, #0]
-	ldr	r3, .L400+84
-	subs	r2, r6, r2
+	ldr	ip, .L424+128
+	cmp	r4, #1024
+	ldr	lr, .L424+132
+	ldr	r2, [sp, #16]
+	strh	r0, [ip]	@ movhi
+	lsl	r0, r3, #9
+	ldr	r1, [sp, #12]
+	uxth	r0, r0
+	strh	r0, [lr]	@ movhi
+	lsr	r0, r0, #8
+	ldr	lr, .L424+136
+	mul	r1, r3, r1
+	strh	r0, [lr]	@ movhi
+	ldrh	lr, [r10, #26]
+	mov	r10, ip
+	ldr	r0, .L424+56
+	strh	lr, [r0]	@ movhi
+	mul	lr, r4, r5
+	ldr	r0, .L424+60
+	str	lr, [r0]
+	itt	hi
+	uxtbhi	r0, r4
+	strhhi	r0, [r2]	@ movhi
+	ldrh	r2, [r2]
+	subs	r2, r4, r2
 	muls	r2, r5, r2
-	mul	r2, sl, r2
-	mul	fp, fp, r2
-	asr	r2, fp, #11
-	str	r2, [r3, #0]
+	muls	r2, r3, r2
+	muls	r6, r2, r6
+	ldr	r2, .L424+64
+	asrs	r6, r6, #11
+	str	r6, [r2]
+	ldr	r6, .L424+28
+	ldrh	r0, [r6]
+	lsls	r0, r0, #3
 	bl	__aeabi_idiv
-	ldr	r3, .L400+88
 	uxth	r0, r0
-	strh	r0, [r3, #0]	@ movhi
+	mov	r3, r6
+	ldr	r6, .L424+68
 	cmp	r0, #4
-	bhi	.L393
-	movs	r2, #4
-	strh	r2, [r3, #0]	@ movhi
-.L393:
-	cmp	r8, #0
-	beq	.L394
-	mov	r3, #640
-	strh	r3, [r4, #0]	@ movhi
-.L394:
-	ldrh	r2, [r4, #0]
-	lsls	r6, r6, #6
-	ldr	r3, .L400+92
+	itt	ls
+	movls	r2, #4
+	strhls	r2, [r6]	@ movhi
+	ldr	r2, [sp, #4]
+	it	hi
+	strhhi	r0, [r6]	@ movhi
+	cbz	r2, .L408
+	mov	r2, #640
+	strh	r2, [r3]	@ movhi
+.L408:
+	ldrh	r3, [r3]
+	lsls	r4, r4, #6
+	ldr	r2, .L424+72
 	mov	r1, r5
-	ldr	r4, .L400+96
-	asr	r2, r2, r7
+	ldrh	r0, [r6]
+	asrs	r3, r3, r7
 	adds	r7, r7, #9
-	asr	r6, r6, r7
-	adds	r2, r2, #2
-	strh	r2, [r3, #0]	@ movhi
-	uxth	r6, r6
-	ldr	r3, .L400+100
-	mul	r2, r5, r6
-	strh	r6, [r3, #0]	@ movhi
-	ldr	r3, .L400+104
-	adds	r6, r6, #8
-	str	r2, [r3, #0]
-	ldr	r3, .L400+88
-	ldrh	r0, [r3, #0]
-	bl	__aeabi_uidiv
-	cmp	r5, #1
-	uxtah	r6, r6, r0
-	str	r6, [r4, #0]
-	bne	.L395
-	adds	r6, r6, #4
-	str	r6, [r4, #0]
-.L395:
-	ldrh	r0, [r4, #0]
+	asrs	r4, r4, r7
+	ldr	r7, .L424+76
+	adds	r3, r3, #2
+	strh	r3, [r2]	@ movhi
+	ldr	r3, .L424+80
+	strh	r4, [r3]	@ movhi
+	uxth	r4, r4
+	mul	r3, r4, r5
+	adds	r4, r4, #8
+	str	r3, [r7]
+	bl	__aeabi_uidiv
+	uxtah	r0, r4, r0
+	ldr	r4, .L424+84
+	cmp	r5, #1
+	it	eq
+	addeq	r0, r0, #4
+	str	r0, [r4]
+	ldrh	r0, [r4]
 	bl	FtlSysBlkNumInit
-	ldr	r2, [r4, #0]
-	ldr	r3, .L400+108
-	str	r2, [r3, #0]
-	movs	r2, #24
-	ldr	r3, .L400+112
-	ldr	r1, [r3, #0]
-	ldr	r3, .L400+48
-	lsls	r1, r1, #2
-	ldrh	r3, [r3, #0]
-	muls	r1, r3, r1
-	ldr	r3, .L400+64
-	ldrh	r3, [r3, #0]
-	adds	r3, r3, #9
-	lsr	r1, r1, r3
-	ldr	r3, .L400+116
-	adds	r1, r1, #2
-	uxth	r1, r1
-	strh	r1, [r3, #0]	@ movhi
-	ldr	r3, .L400+120
-	strh	r2, [r3, #0]	@ movhi
-	movs	r2, #0
-	ldr	r3, .L400+124
-	str	r2, [r3, #0]
-	ldr	r2, .L400+88
-	ldrh	r4, [r2, #0]
-	adds	r3, r4, #3
-	strh	r3, [r2, #0]	@ movhi
-	ldr	r3, .L400+104
-	ldr	r0, [r3, #0]
-	adds	r5, r0, #3
-	str	r5, [r3, #0]
-	ldr	r5, .L400+128
-	ldrb	r5, [r5, #0]	@ zero_extendqisi2
-	cbz	r5, .L396
-	adds	r4, r4, #4
-	adds	r0, r0, #5
-	strh	r4, [r2, #0]	@ movhi
-	str	r0, [r3, #0]
-.L396:
-	ldr	r3, .L400+132
+	ldr	r2, [r4]
+	movs	r0, #24
+	ldr	r3, .L424+88
+	str	r2, [r3]
+	ldr	r3, .L424+92
+	ldr	r2, [r3]
+	ldrh	r3, [fp]
+	lsls	r2, r2, #2
+	muls	r3, r2, r3
+	ldrh	r2, [r10]
+	adds	r2, r2, #9
+	lsrs	r3, r3, r2
+	ldr	r2, .L424+96
+	adds	r3, r3, #2
+	uxth	r3, r3
+	strh	r3, [r2]	@ movhi
+	ldr	r2, .L424+100
+	strh	r0, [r2]	@ movhi
+	movs	r0, #0
+	ldr	r2, .L424+104
+	str	r0, [r2]
+	ldrh	r0, [r6]
+	adds	r2, r0, #3
+	strh	r2, [r6]	@ movhi
+	ldr	r2, [r7]
+	adds	r4, r2, #3
+	str	r4, [r7]
+	ldr	r4, .L424+108
+	ldrb	r4, [r4]	@ zero_extendqisi2
+	cbz	r4, .L411
+	adds	r0, r0, #4
+	adds	r2, r2, #5
+	strh	r0, [r6]	@ movhi
+	str	r2, [r7]
+.L411:
+	ldr	r1, .L424+112
 	movs	r2, #0
-	strh	r2, [r3, #0]	@ movhi
-	ldr	r2, .L400+136
-	ldrh	r2, [r2, #0]
-	lsrs	r0, r2, #3
-	add	r2, r0, r2, lsl #1
-	adds	r2, r2, #52
-	add	r1, r2, r1, lsl #2
-	ldr	r2, .L400+60
-	ldrh	r2, [r2, #0]
-	cmp	r1, r2, lsl #9
-	bcs	.L397
-	movs	r2, #1
-	strh	r2, [r3, #0]	@ movhi
-.L397:
+	strh	r2, [r1]	@ movhi
+	ldr	r2, .L424+116
+	ldrh	r0, [r2]
+	lsrs	r2, r0, #3
+	add	r2, r2, r0, lsl #1
 	movs	r0, #0
-	add	sp, sp, #32
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L401:
+	adds	r2, r2, #52
+	add	r3, r2, r3, lsl #2
+	ldrh	r2, [r8]
+	cmp	r3, r2, lsl #9
+	itt	cc
+	movcc	r3, #1
+	strhcc	r3, [r1]	@ movhi
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L425:
 	.align	2
-.L400:
+.L424:
+	.word	.LANCHOR42
+	.word	.LANCHOR39
+	.word	.LANCHOR44
+	.word	.LANCHOR45
+	.word	.LANCHOR43
+	.word	.LANCHOR46
 	.word	.LANCHOR47
 	.word	.LANCHOR48
-	.word	.LANCHOR50
+	.word	.LANCHOR1
+	.word	.LANCHOR36
 	.word	.LANCHOR49
-	.word	.LANCHOR44
-	.word	.LANCHOR51
+	.word	.LANCHOR50
 	.word	.LANCHOR52
 	.word	.LANCHOR53
-	.word	.LANCHOR0
-	.word	.LANCHOR41
-	.word	.LANCHOR54
-	.word	.LANCHOR55
-	.word	.LANCHOR56
-	.word	.LANCHOR57
 	.word	.LANCHOR58
+	.word	.LANCHOR41
 	.word	.LANCHOR59
 	.word	.LANCHOR60
 	.word	.LANCHOR61
-	.word	.LANCHOR62
 	.word	.LANCHOR63
-	.word	.LANCHOR46
+	.word	.LANCHOR62
+	.word	.LANCHOR35
 	.word	.LANCHOR64
+	.word	.LANCHOR40
 	.word	.LANCHOR65
 	.word	.LANCHOR66
-	.word	.LANCHOR40
 	.word	.LANCHOR67
+	.word	.LANCHOR8
 	.word	.LANCHOR68
-	.word	.LANCHOR69
-	.word	.LANCHOR45
-	.word	.LANCHOR70
-	.word	.LANCHOR71
-	.word	.LANCHOR72
-	.word	.LANCHOR7
-	.word	.LANCHOR73
-	.word	.LANCHOR43
+	.word	.LANCHOR38
+	.word	.LANCHOR51
+	.word	.LANCHOR54
+	.word	.LANCHOR55
+	.word	.LANCHOR56
+	.word	.LANCHOR57
 	.size	FtlConstantsInit, .-FtlConstantsInit
 	.section	.text.IsBlkInVendorPart,"ax",%progbits
 	.align	1
 	.global	IsBlkInVendorPart
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	IsBlkInVendorPart, %function
 IsBlkInVendorPart:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L409
-	push	{r4, lr}
-	ldrh	r3, [r3, #0]
-	cbz	r3, .L407
-	ldr	r3, .L409+4
-	ldrh	r1, [r3, #0]
-	ldr	r3, .L409+8
-	ldr	r2, [r3, #0]
-	movs	r3, #0
-	b	.L404
-.L406:
-	ldrh	r4, [r2], #2
-	cmp	r4, r0
-	beq	.L408
-	adds	r3, r3, #1
-	uxth	r3, r3
-.L404:
-	cmp	r3, r1
-	bne	.L406
+	@ link register save eliminated.
+	ldr	r3, .L433
+	ldrh	r3, [r3]
+	cbz	r3, .L432
+	ldr	r3, .L433+4
+	ldr	r2, .L433+8
+	ldr	r3, [r3]
+	ldrh	r2, [r2]
+	add	r2, r3, r2, lsl #1
+.L428:
+	cmp	r3, r2
+	bne	.L429
+.L432:
 	movs	r0, #0
-	pop	{r4, pc}
-.L408:
+	bx	lr
+.L429:
+	ldrh	r1, [r3], #2
+	cmp	r0, r1
+	bne	.L428
 	movs	r0, #1
-	pop	{r4, pc}
-.L407:
-	mov	r0, r3
-	pop	{r4, pc}
-.L410:
+	bx	lr
+.L434:
 	.align	2
-.L409:
-	.word	.LANCHOR74
-	.word	.LANCHOR65
-	.word	.LANCHOR75
+.L433:
+	.word	.LANCHOR69
+	.word	.LANCHOR70
+	.word	.LANCHOR60
 	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
 	.section	.text.FtlGetCap,"ax",%progbits
 	.align	1
 	.global	FtlGetCap
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FtlGetCap, %function
 FtlGetCap:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L412
-	ldr	r0, [r3, #0]
+	ldr	r3, .L436
+	ldr	r0, [r3]
 	bx	lr
-.L413:
+.L437:
 	.align	2
-.L412:
-	.word	.LANCHOR72
+.L436:
+	.word	.LANCHOR67
 	.size	FtlGetCap, .-FtlGetCap
 	.section	.text.FtlGetCapacity,"ax",%progbits
 	.align	1
 	.global	FtlGetCapacity
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FtlGetCapacity, %function
 FtlGetCapacity:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L415
-	ldr	r0, [r3, #0]
+	ldr	r3, .L439
+	ldr	r0, [r3]
 	bx	lr
-.L416:
+.L440:
 	.align	2
-.L415:
-	.word	.LANCHOR72
+.L439:
+	.word	.LANCHOR67
 	.size	FtlGetCapacity, .-FtlGetCapacity
 	.section	.text.ftl_get_density,"ax",%progbits
 	.align	1
 	.global	ftl_get_density
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	ftl_get_density, %function
 ftl_get_density:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L418
-	ldr	r0, [r3, #0]
+	ldr	r3, .L442
+	ldr	r0, [r3]
 	bx	lr
-.L419:
+.L443:
 	.align	2
-.L418:
-	.word	.LANCHOR72
+.L442:
+	.word	.LANCHOR67
 	.size	ftl_get_density, .-ftl_get_density
 	.section	.text.FtlGetLpn,"ax",%progbits
 	.align	1
 	.global	FtlGetLpn
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FtlGetLpn, %function
 FtlGetLpn:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L421
-	ldr	r0, [r3, #0]
+	ldr	r3, .L445
+	ldr	r0, [r3]
 	bx	lr
-.L422:
+.L446:
 	.align	2
-.L421:
-	.word	.LANCHOR76
+.L445:
+	.word	.LANCHOR71
 	.size	FtlGetLpn, .-FtlGetLpn
 	.section	.text.FtlGetCurEraseBlock,"ax",%progbits
 	.align	1
 	.global	FtlGetCurEraseBlock
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FtlGetCurEraseBlock, %function
 FtlGetCurEraseBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L424
-	ldr	r3, .L424+4
-	ldr	r0, [r2, #0]
-	ldrh	r3, [r3, #0]
+	ldr	r2, .L448
+	ldr	r3, .L448+4
+	ldr	r0, [r2]
+	ldrh	r3, [r3]
 	muls	r0, r3, r0
 	bx	lr
-.L425:
+.L449:
 	.align	2
-.L424:
-	.word	.LANCHOR77
-	.word	.LANCHOR41
+.L448:
+	.word	.LANCHOR72
+	.word	.LANCHOR36
 	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
 	.section	.text.FtlGetAllBlockNum,"ax",%progbits
 	.align	1
 	.global	FtlGetAllBlockNum
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FtlGetAllBlockNum, %function
 FtlGetAllBlockNum:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L427
-	ldr	r3, .L427+4
-	ldrh	r0, [r2, #0]
-	ldrh	r3, [r3, #0]
+	ldr	r2, .L451
+	ldr	r3, .L451+4
+	ldrh	r0, [r2]
+	ldrh	r3, [r3]
 	muls	r0, r3, r0
 	bx	lr
-.L428:
+.L452:
 	.align	2
-.L427:
-	.word	.LANCHOR41
-	.word	.LANCHOR44
+.L451:
+	.word	.LANCHOR36
+	.word	.LANCHOR39
 	.size	FtlGetAllBlockNum, .-FtlGetAllBlockNum
 	.section	.text.FtlBbmMapBadBlock,"ax",%progbits
 	.align	1
 	.global	FtlBbmMapBadBlock
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FtlBbmMapBadBlock, %function
 FtlBbmMapBadBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L430
+	ldr	r3, .L454
 	push	{r0, r1, r2, r4, r5, r6, r7, lr}
 	mov	r5, r0
-	ldrh	r4, [r3, #0]
-	movs	r7, #1
+	ldrh	r4, [r3]
 	mov	r1, r4
 	bl	__aeabi_uidiv
-	uxth	r2, r0
-	mls	r3, r4, r2, r5
-	ldr	r4, .L430+4
-	add	r1, r4, r2, lsl #2
-	ldr	r0, [r1, #28]
-	uxth	r3, r3
-	and	r1, r3, #31
-	lsrs	r6, r3, #5
-	lsl	r1, r7, r1
-	ldr	r7, [r0, r6, lsl #2]
-	orrs	r1, r1, r7
-	str	r1, [r0, r6, lsl #2]
-	str	r1, [sp, #0]
+	mov	r1, r4
+	ldr	r4, .L454+4
+	uxth	r6, r0
+	mov	r0, r5
+	bl	__aeabi_uidivmod
+	add	r2, r4, r6, lsl #2
+	uxth	r3, r1
+	ldr	r2, [r2, #28]
+	lsrs	r1, r3, #5
+	and	r7, r3, #31
+	movs	r0, #1
+	lsls	r0, r0, r7
+	ldr	r7, [r2, r1, lsl #2]
+	orrs	r0, r0, r7
+	str	r0, [r2, r1, lsl #2]
+	mov	r2, r6
+	str	r0, [sp]
 	mov	r1, r5
-	ldr	r0, .L430+8
+	ldr	r0, .L454+8
 	bl	printf
 	ldrh	r3, [r4, #6]
 	movs	r0, #0
 	adds	r3, r3, #1
 	strh	r3, [r4, #6]	@ movhi
-	pop	{r1, r2, r3, r4, r5, r6, r7, pc}
-.L431:
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, r6, r7, pc}
+.L455:
 	.align	2
-.L430:
-	.word	.LANCHOR54
-	.word	.LANCHOR78
+.L454:
+	.word	.LANCHOR49
+	.word	.LANCHOR73
 	.word	.LC2
 	.size	FtlBbmMapBadBlock, .-FtlBbmMapBadBlock
-	.global	__aeabi_uidivmod
 	.section	.text.FtlBbmIsBadBlock,"ax",%progbits
 	.align	1
 	.global	FtlBbmIsBadBlock
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FtlBbmIsBadBlock, %function
 FtlBbmIsBadBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L433
+	ldr	r3, .L457
 	push	{r4, r5, r6, lr}
 	mov	r6, r0
-	ldrh	r5, [r3, #0]
+	ldrh	r5, [r3]
 	mov	r1, r5
 	bl	__aeabi_uidivmod
 	mov	r0, r6
 	uxth	r4, r1
 	mov	r1, r5
 	bl	__aeabi_uidiv
-	ldr	r3, .L433+4
+	ldr	r3, .L457+4
+	uxth	r0, r0
 	lsrs	r2, r4, #5
 	and	r4, r4, #31
-	uxth	r0, r0
 	add	r0, r3, r0, lsl #2
 	ldr	r3, [r0, #28]
 	ldr	r0, [r3, r2, lsl #2]
-	lsr	r0, r0, r4
+	lsrs	r0, r0, r4
 	and	r0, r0, #1
 	pop	{r4, r5, r6, pc}
-.L434:
+.L458:
 	.align	2
-.L433:
-	.word	.LANCHOR54
-	.word	.LANCHOR78
+.L457:
+	.word	.LANCHOR49
+	.word	.LANCHOR73
 	.size	FtlBbmIsBadBlock, .-FtlBbmIsBadBlock
 	.section	.text.FtlBbtInfoPrint,"ax",%progbits
 	.align	1
 	.global	FtlBbtInfoPrint
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FtlBbtInfoPrint, %function
 FtlBbtInfoPrint:
 	@ args = 0, pretend = 0, frame = 0
@@ -3432,194 +3114,120 @@ FtlBbtInfoPrint:
 	@ link register save eliminated.
 	bx	lr
 	.size	FtlBbtInfoPrint, .-FtlBbtInfoPrint
-	.section	.text.FtlBbt2Bitmap,"ax",%progbits
-	.align	1
-	.global	FtlBbt2Bitmap
-	.thumb
-	.thumb_func
-	.type	FtlBbt2Bitmap, %function
-FtlBbt2Bitmap:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L441
-	push	{r4, r5, r6, r7, r8, lr}
-	mov	r6, r0
-	ldrh	r2, [r3, #0]
-	mov	r0, r1
-	mov	r5, r1
-	movs	r1, #0
-	ldr	r7, .L441+4
-	movs	r4, #0
-	lsls	r2, r2, #2
-	movw	r8, #65535
-	bl	memset
-.L439:
-	ldrh	r3, [r6, r4]
-	cmp	r3, r8
-	beq	.L436
-	ldrh	r2, [r7, #0]
-	cmp	r2, r3
-	bhi	.L438
-	ldr	r1, .L441+8
-	movs	r2, #79
-	ldr	r0, .L441+12
-	bl	printf
-	ldr	r0, .L441+16
-	ldr	r1, .L441+20
-	bl	printf
-.L438:
-	ldrh	r2, [r6, r4]
-	movs	r1, #1
-	adds	r4, r4, #2
-	lsrs	r3, r2, #5
-	and	r2, r2, #31
-	lsl	r2, r1, r2
-	cmp	r4, #1024
-	ldr	r1, [r5, r3, lsl #2]
-	orr	r2, r1, r2
-	str	r2, [r5, r3, lsl #2]
-	bne	.L439
-.L436:
-	pop	{r4, r5, r6, r7, r8, pc}
-.L442:
-	.align	2
-.L441:
-	.word	.LANCHOR79
-	.word	.LANCHOR54
-	.word	.LANCHOR80
-	.word	.LC3
-	.word	.LC4
-	.word	.LC5
-	.size	FtlBbt2Bitmap, .-FtlBbt2Bitmap
-	.section	.text.FtlBbtMemInit,"ax",%progbits
-	.align	1
-	.global	FtlBbtMemInit
-	.thumb
-	.thumb_func
-	.type	FtlBbtMemInit, %function
-FtlBbtMemInit:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r0, .L444
-	movw	r3, #65535
-	movs	r1, #255
-	movs	r2, #16
-	strh	r3, [r0, #0]	@ movhi
-	movs	r3, #0
-	strh	r3, [r0, #6]	@ movhi
-	adds	r0, r0, #12
-	b	memset
-.L445:
-	.align	2
-.L444:
-	.word	.LANCHOR78
-	.size	FtlBbtMemInit, .-FtlBbtMemInit
 	.section	.text.V2P_block,"ax",%progbits
 	.align	1
 	.global	V2P_block
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	V2P_block, %function
 V2P_block:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
-	mov	r7, r1
-	ldr	r3, .L447
-	mov	r6, r0
-	ldrh	r4, [r3, #0]
-	muls	r7, r4, r7
-	mov	r1, r4
+	mov	r5, r1
+	ldr	r3, .L461
+	mov	r7, r0
+	ldrh	r6, [r3]
+	mov	r1, r6
 	bl	__aeabi_uidiv
-	ldr	r3, .L447+4
-	mov	r1, r4
-	ldrh	r5, [r3, #0]
-	mla	r5, r0, r5, r7
-	mov	r0, r6
+	ldr	r3, .L461+4
+	smulbb	r5, r6, r5
+	mov	r1, r6
+	ldrh	r4, [r3]
+	smulbb	r4, r4, r0
+	mov	r0, r7
 	bl	__aeabi_uidivmod
-	adds	r1, r5, r1
-	uxth	r0, r1
+	adds	r0, r5, r1
+	add	r0, r0, r4
+	uxth	r0, r0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L448:
+.L462:
 	.align	2
-.L447:
+.L461:
+	.word	.LANCHOR44
 	.word	.LANCHOR49
-	.word	.LANCHOR54
 	.size	V2P_block, .-V2P_block
 	.section	.text.P2V_plane,"ax",%progbits
 	.align	1
 	.global	P2V_plane
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	P2V_plane, %function
 P2V_plane:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L450
+	ldr	r3, .L464
 	push	{r4, r5, r6, lr}
 	mov	r6, r0
-	ldrh	r4, [r3, #0]
-	ldr	r3, .L450+4
-	ldrh	r1, [r3, #0]
+	ldrh	r5, [r3]
+	ldr	r3, .L464+4
+	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
-	mov	r1, r4
-	mul	r5, r0, r4
+	smulbb	r4, r0, r5
+	mov	r1, r5
 	mov	r0, r6
 	bl	__aeabi_uidivmod
-	adds	r1, r5, r1
+	add	r1, r1, r4
 	uxth	r0, r1
 	pop	{r4, r5, r6, pc}
-.L451:
+.L465:
 	.align	2
-.L450:
+.L464:
+	.word	.LANCHOR44
 	.word	.LANCHOR49
-	.word	.LANCHOR54
 	.size	P2V_plane, .-P2V_plane
 	.section	.text.P2V_block_in_plane,"ax",%progbits
 	.align	1
 	.global	P2V_block_in_plane
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	P2V_block_in_plane, %function
 P2V_block_in_plane:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L453
-	ldrh	r1, [r3, #0]
+	ldr	r3, .L467
+	ldrh	r1, [r3]
 	bl	__aeabi_uidivmod
-	ldr	r3, .L453+4
+	ldr	r3, .L467+4
 	uxth	r0, r1
-	ldrh	r1, [r3, #0]
+	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
 	uxth	r0, r0
 	pop	{r3, pc}
-.L454:
+.L468:
 	.align	2
-.L453:
-	.word	.LANCHOR54
+.L467:
 	.word	.LANCHOR49
+	.word	.LANCHOR44
 	.size	P2V_block_in_plane, .-P2V_block_in_plane
 	.section	.text.ftl_cmp_data_ver,"ax",%progbits
 	.align	1
 	.global	ftl_cmp_data_ver
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	ftl_cmp_data_ver, %function
 ftl_cmp_data_ver:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	cmp	r0, r1
-	bls	.L456
+	bls	.L470
 	subs	r0, r0, r1
 	cmp	r0, #-2147483648
 	ite	hi
 	movhi	r0, #0
 	movls	r0, #1
 	bx	lr
-.L456:
+.L470:
 	subs	r0, r1, r0
 	cmp	r0, #-2147483648
 	ite	ls
@@ -3627,2349 +3235,1871 @@ ftl_cmp_data_ver:
 	movhi	r0, #1
 	bx	lr
 	.size	ftl_cmp_data_ver, .-ftl_cmp_data_ver
-	.section	.text.FtlFreeSysBlkQueueInit,"ax",%progbits
-	.align	1
-	.global	FtlFreeSysBlkQueueInit
-	.thumb
-	.thumb_func
-	.type	FtlFreeSysBlkQueueInit, %function
-FtlFreeSysBlkQueueInit:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L459
-	mov	r2, #2048
-	push	{r4, lr}
-	movs	r4, #0
-	mov	r1, r4
-	strh	r4, [r3, #2]	@ movhi
-	strh	r4, [r3, #4]	@ movhi
-	strh	r4, [r3, #6]	@ movhi
-	strh	r0, [r3], #8	@ movhi
-	mov	r0, r3
-	bl	memset
-	mov	r0, r4
-	pop	{r4, pc}
-.L460:
-	.align	2
-.L459:
-	.word	.LANCHOR81
-	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
 	.section	.text.FtlFreeSysBlkQueueEmpty,"ax",%progbits
 	.align	1
 	.global	FtlFreeSysBlkQueueEmpty
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FtlFreeSysBlkQueueEmpty, %function
 FtlFreeSysBlkQueueEmpty:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L462
+	ldr	r3, .L473
 	ldrh	r0, [r3, #6]
-	rsbs	r0, r0, #1
-	it	cc
-	movcc	r0, #0
+	clz	r0, r0
+	lsrs	r0, r0, #5
 	bx	lr
-.L463:
+.L474:
 	.align	2
-.L462:
-	.word	.LANCHOR81
+.L473:
+	.word	.LANCHOR74
 	.size	FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty
 	.section	.text.FtlFreeSysBlkQueueFull,"ax",%progbits
 	.align	1
 	.global	FtlFreeSysBlkQueueFull
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FtlFreeSysBlkQueueFull, %function
 FtlFreeSysBlkQueueFull:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L465
+	ldr	r3, .L476
 	ldrh	r0, [r3, #6]
-	sub	r1, r0, #1024
-	rsbs	r0, r1, #0
-	adc	r0, r0, r1
+	sub	r3, r0, #1024
+	rsbs	r0, r3, #0
+	adcs	r0, r0, r3
 	bx	lr
-.L466:
+.L477:
 	.align	2
-.L465:
-	.word	.LANCHOR81
+.L476:
+	.word	.LANCHOR74
 	.size	FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull
 	.section	.text.FtlFreeSysBlkQueueIn,"ax",%progbits
 	.align	1
 	.global	FtlFreeSysBlkQueueIn
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FtlFreeSysBlkQueueIn, %function
 FtlFreeSysBlkQueueIn:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	mov	r4, r0
-	ldr	r3, .L470
-	ldrh	r3, [r3, #6]
+	push	{r4, r5, r6, lr}
+	mov	r5, r0
+	ldr	r4, .L487
+	ldrh	r3, [r4, #6]
 	cmp	r3, #1024
-	beq	.L467
-	cbz	r1, .L469
-	ldr	r3, .L470+4
-	ldr	r3, [r3, #0]
-	cbnz	r3, .L469
+	beq	.L478
+	cbz	r1, .L480
+	ldr	r3, .L487+4
+	ldr	r3, [r3]
+	cbnz	r3, .L480
 	bl	P2V_block_in_plane
-	ldr	r3, .L470+8
-	movs	r1, #1
-	mov	r2, r1
-	mov	r5, r0
-	ldr	r0, [r3, #0]
-	lsls	r3, r4, #10
+	ldr	r3, .L487+8
+	mov	r6, r0
+	movs	r2, #1
+	mov	r1, r2
+	ldr	r0, [r3]
+	lsls	r3, r5, #10
 	str	r3, [r0, #4]
 	bl	FlashEraseBlocks
-	ldr	r3, .L470+12
-	ldr	r3, [r3, #0]
-	ldrh	r2, [r3, r5, lsl #1]
-	adds	r2, r2, #1
-	strh	r2, [r3, r5, lsl #1]	@ movhi
-	ldr	r3, .L470+16
-	ldr	r2, [r3, #0]
-	adds	r2, r2, #1
-	str	r2, [r3, #0]
-.L469:
-	ldr	r3, .L470
-	ldrh	r2, [r3, #6]
-	adds	r2, r2, #1
-	strh	r2, [r3, #6]	@ movhi
-	ldrh	r2, [r3, #4]
-	adds	r1, r2, #4
-	adds	r2, r2, #1
-	bic	r2, r2, #64512
-	strh	r2, [r3, #4]	@ movhi
-	strh	r4, [r3, r1, lsl #1]	@ movhi
-.L467:
-	pop	{r3, r4, r5, pc}
-.L471:
+	ldr	r3, .L487+12
+	ldr	r2, [r3]
+	ldrh	r3, [r2, r6, lsl #1]
+	adds	r3, r3, #1
+	strh	r3, [r2, r6, lsl #1]	@ movhi
+	ldr	r2, .L487+16
+	ldr	r3, [r2]
+	adds	r3, r3, #1
+	str	r3, [r2]
+.L480:
+	ldrh	r3, [r4, #6]
+	adds	r3, r3, #1
+	strh	r3, [r4, #6]	@ movhi
+	ldrh	r3, [r4, #4]
+	adds	r2, r3, #4
+	adds	r3, r3, #1
+	ubfx	r3, r3, #0, #10
+	strh	r5, [r4, r2, lsl #1]	@ movhi
+	strh	r3, [r4, #4]	@ movhi
+.L478:
+	pop	{r4, r5, r6, pc}
+.L488:
 	.align	2
-.L470:
-	.word	.LANCHOR81
-	.word	.LANCHOR82
-	.word	.LANCHOR83
-	.word	.LANCHOR84
-	.word	.LANCHOR85
+.L487:
+	.word	.LANCHOR74
+	.word	.LANCHOR75
+	.word	.LANCHOR76
+	.word	.LANCHOR77
+	.word	.LANCHOR78
 	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
 	.section	.text.FtlFreeSysBLkSort,"ax",%progbits
 	.align	1
 	.global	FtlFreeSysBLkSort
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FtlFreeSysBLkSort, %function
 FtlFreeSysBLkSort:
-	@ args = 0, pretend = 0, frame = 0
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, r8, sl, lr}
-	movs	r4, #0
-	ldr	r5, .L482
-	ldr	r7, .L482+4
-	ldr	r6, .L482+8
-	b	.L473
-.L474:
-	add	r8, r4, r8
-	add	r8, r8, #4
-	ldrh	r0, [r5, r8, lsl #1]
-	bl	P2V_block_in_plane
-	ldr	r2, [r6, #0]
-	ldr	r3, [r7, #0]
-	ldrh	r2, [r2, r0, lsl #1]
-	str	r2, [r3, r4, lsl #2]
-	adds	r4, r4, #1
-	uxth	r4, r4
-.L473:
-	ldrh	ip, [r5, #6]
-	ldrh	r8, [r5, #2]
-	cmp	r4, ip
-	bcc	.L474
-	ldr	r3, .L482+4
-	add	r6, ip, #-1
-	ldr	r4, .L482
-	ldr	r1, [r3, #0]
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r4, .L498
+	ldr	r3, .L498+4
+	ldrh	r7, [r4, #2]
+	ldrh	r6, [r4, #6]
+	ldr	r5, [r3]
+	ldr	r3, .L498+8
+	add	r8, r4, r7, lsl #1
+	mov	r10, r5
+	ldr	r3, [r3]
+	add	fp, r5, r6, lsl #2
+	add	r8, r8, #6
+.L490:
+	cmp	r10, fp
+	bne	.L491
 	movs	r3, #0
-	b	.L475
-.L480:
-	adds	r5, r3, #1
+	add	lr, r6, #-1
+.L492:
+	cmp	r3, lr
+	blt	.L497
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L491:
+	ldrh	r0, [r8, #2]!
+	str	r3, [sp, #4]
+	bl	P2V_block_in_plane
+	ldr	r3, [sp, #4]
+	ldrh	r2, [r3, r0, lsl #1]
+	str	r2, [r10], #4
+	b	.L490
+.L497:
+	add	ip, r3, #1
 	mov	r2, r3
-	uxth	r5, r5
-	mov	r0, r5
-	b	.L476
-.L478:
-	ldr	r7, [r1, r0, lsl #2]
-	ldr	sl, [r1, r2, lsl #2]
-	cmp	sl, r7
-	it	hi
-	movhi	r2, r0
-	adds	r0, r0, #1
-	uxth	r0, r0
-.L476:
-	cmp	r0, ip
-	bcc	.L478
+	uxth	ip, ip
+	mov	r8, ip
+.L493:
+	cmp	r8, r6
+	bcc	.L495
 	cmp	r3, r2
-	beq	.L479
-	ldr	r0, [r1, r2, lsl #2]
-	ldr	r7, [r1, r3, lsl #2]
-	str	r7, [r1, r2, lsl #2]
-	add	r2, r8, r2
-	str	r0, [r1, r3, lsl #2]
-	add	r3, r8, r3
+	beq	.L496
+	ldr	r0, [r5, r2, lsl #2]
+	ldr	r1, [r5, r3, lsl #2]
+	str	r1, [r5, r2, lsl #2]
+	add	r2, r2, r7
+	str	r0, [r5, r3, lsl #2]
+	add	r3, r3, r7
 	adds	r2, r2, #4
 	adds	r3, r3, #4
-	ldrh	r0, [r4, r2, lsl #1]
-	ldrh	r7, [r4, r3, lsl #1]
-	strh	r7, [r4, r2, lsl #1]	@ movhi
-	strh	r0, [r4, r3, lsl #1]	@ movhi
-.L479:
-	mov	r3, r5
-.L475:
-	cmp	r3, r6
-	blt	.L480
-	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
-.L483:
+	ldrh	r1, [r4, r2, lsl #1]
+	ldrh	r0, [r4, r3, lsl #1]
+	strh	r0, [r4, r2, lsl #1]	@ movhi
+	strh	r1, [r4, r3, lsl #1]	@ movhi
+.L496:
+	mov	r3, ip
+	b	.L492
+.L495:
+	ldr	r1, [r5, r8, lsl #2]
+	ldr	r0, [r5, r2, lsl #2]
+	cmp	r0, r1
+	it	hi
+	movhi	r2, r8
+	add	r8, r8, #1
+	uxth	r8, r8
+	b	.L493
+.L499:
 	.align	2
-.L482:
-	.word	.LANCHOR81
-	.word	.LANCHOR86
-	.word	.LANCHOR84
+.L498:
+	.word	.LANCHOR74
+	.word	.LANCHOR79
+	.word	.LANCHOR77
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
 	.section	.text.remove_from_free_sys_Queue,"ax",%progbits
 	.align	1
 	.global	remove_from_free_sys_Queue
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	remove_from_free_sys_Queue, %function
 remove_from_free_sys_Queue:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L490
+	push	{r3, r4, r5, lr}
 	mov	r1, r0
-	push	{r4, r5, r6, lr}
-	ldrh	r0, [r3, #6]
-	cbz	r0, .L485
-	ldrh	r2, [r3, #2]
-	movs	r5, #0
-	b	.L486
-.L488:
-	adds	r6, r5, r2
-	ldr	r4, .L490
-	lsls	r6, r6, #22
-	add	r6, r3, r6, lsr #21
-	ldrh	r6, [r6, #8]
-	cmp	r6, r1
-	bne	.L487
-	ldr	r0, .L490+4
+	ldr	r5, .L507
+	ldrh	r3, [r5, #6]
+	cbz	r3, .L506
+	ldrh	r0, [r5, #2]
+	movs	r4, #0
+.L502:
+	cmp	r4, r3
+	bcc	.L504
+.L506:
+	movs	r0, #0
+	pop	{r3, r4, r5, pc}
+.L504:
+	adds	r2, r4, r0
+	ubfx	r2, r2, #0, #10
+	adds	r2, r2, #4
+	ldrh	r2, [r5, r2, lsl #1]
+	cmp	r2, r1
+	bne	.L503
+	ldr	r0, .L507+4
 	bl	printf
-	ldrh	r3, [r4, #2]
+	ldrh	r3, [r5, #2]
 	movs	r0, #1
-	adds	r5, r5, r3
 	adds	r2, r3, #4
+	add	r4, r4, r3
 	adds	r3, r3, #1
-	lsls	r5, r5, #22
-	ldrh	r2, [r4, r2, lsl #1]
-	bic	r3, r3, #64512
-	strh	r3, [r4, #2]	@ movhi
-	add	r5, r4, r5, lsr #21
-	ldrh	r3, [r4, #6]
-	strh	r2, [r5, #8]	@ movhi
+	ldrh	r2, [r5, r2, lsl #1]
+	ubfx	r3, r3, #0, #10
+	ubfx	r4, r4, #0, #10
+	strh	r3, [r5, #2]	@ movhi
+	adds	r4, r4, #4
+	ldrh	r3, [r5, #6]
+	strh	r2, [r5, r4, lsl #1]	@ movhi
 	subs	r3, r3, #1
-	strh	r3, [r4, #6]	@ movhi
-	pop	{r4, r5, r6, pc}
-.L487:
-	adds	r5, r5, #1
-.L486:
-	cmp	r5, r0
-	bcc	.L488
-	movs	r0, #0
-.L485:
-	pop	{r4, r5, r6, pc}
-.L491:
+	strh	r3, [r5, #6]	@ movhi
+	pop	{r3, r4, r5, pc}
+.L503:
+	adds	r4, r4, #1
+	b	.L502
+.L508:
 	.align	2
-.L490:
-	.word	.LANCHOR81
-	.word	.LC6
+.L507:
+	.word	.LANCHOR74
+	.word	.LC3
 	.size	remove_from_free_sys_Queue, .-remove_from_free_sys_Queue
 	.section	.text.FtlFreeSysBlkQueueOut,"ax",%progbits
 	.align	1
 	.global	FtlFreeSysBlkQueueOut
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FtlFreeSysBlkQueueOut, %function
 FtlFreeSysBlkQueueOut:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r2, .L516
 	push	{r3, r4, r5, r6, r7, lr}
-	ldr	r3, .L496
-	ldrh	r1, [r3, #6]
-	cmp	r1, #0
-	beq	.L495
-	ldrh	r2, [r3, #2]
+	ldrh	r1, [r2, #6]
+	cbz	r1, .L512
+	ldrh	r3, [r2, #2]
 	subs	r1, r1, #1
-	strh	r1, [r3, #6]	@ movhi
-	adds	r0, r2, #4
-	adds	r2, r2, #1
-	bic	r2, r2, #64512
-	strh	r2, [r3, #2]	@ movhi
-	ldrh	r4, [r3, r0, lsl #1]
-	ldr	r3, .L496+4
-	ldr	r7, [r3, #0]
-	cbnz	r7, .L493
+	strh	r1, [r2, #6]	@ movhi
+	adds	r0, r3, #4
+	adds	r3, r3, #1
+	ubfx	r3, r3, #0, #10
+	ldrh	r4, [r2, r0, lsl #1]
+	strh	r3, [r2, #2]	@ movhi
+	ldr	r3, .L516+4
+	ldr	r7, [r3]
+	cbnz	r7, .L510
+	ldr	r5, .L516+8
 	mov	r0, r4
-	ldr	r6, .L496+8
 	bl	P2V_block_in_plane
-	lsls	r3, r4, #10
-	mov	r5, r0
-	ldr	r0, [r6, #0]
-	str	r3, [r0, #4]
-	ldr	r3, .L496+12
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L494
-	mov	r1, r7
+	mov	r6, r0
+	lsls	r2, r4, #10
+	ldr	r0, [r5]
+	str	r2, [r0, #4]
+	ldr	r2, .L516+12
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbz	r2, .L511
 	movs	r2, #1
+	mov	r1, r7
 	bl	FlashEraseBlocks
-.L494:
-	movs	r1, #1
-	ldr	r0, [r6, #0]
-	mov	r2, r1
+.L511:
+	movs	r2, #1
+	ldr	r0, [r5]
+	mov	r1, r2
 	bl	FlashEraseBlocks
-	ldr	r3, .L496+16
-	ldr	r3, [r3, #0]
-	ldrh	r2, [r3, r5, lsl #1]
-	adds	r2, r2, #1
-	strh	r2, [r3, r5, lsl #1]	@ movhi
-	ldr	r3, .L496+20
-	ldr	r2, [r3, #0]
-	adds	r2, r2, #1
-	str	r2, [r3, #0]
-	b	.L493
-.L495:
-	movw	r4, #65535
-.L493:
+	ldr	r3, .L516+16
+	ldr	r2, [r3]
+	ldrh	r3, [r2, r6, lsl #1]
+	adds	r3, r3, #1
+	strh	r3, [r2, r6, lsl #1]	@ movhi
+	ldr	r2, .L516+20
+	ldr	r3, [r2]
+	adds	r3, r3, #1
+	str	r3, [r2]
+.L510:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, pc}
-.L497:
+.L512:
+	movw	r4, #65535
+	b	.L510
+.L517:
 	.align	2
-.L496:
-	.word	.LANCHOR81
-	.word	.LANCHOR82
-	.word	.LANCHOR83
-	.word	.LANCHOR7
-	.word	.LANCHOR84
-	.word	.LANCHOR85
+.L516:
+	.word	.LANCHOR74
+	.word	.LANCHOR75
+	.word	.LANCHOR76
+	.word	.LANCHOR8
+	.word	.LANCHOR77
+	.word	.LANCHOR78
 	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
 	.section	.text.insert_data_list,"ax",%progbits
 	.align	1
 	.global	insert_data_list
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	insert_data_list, %function
 insert_data_list:
-	@ args = 0, pretend = 0, frame = 24
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L514
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	sub	sp, sp, #24
-	ldrh	fp, [r3, #0]
-	cmp	r0, fp
-	bcs	.L499
-	ldr	r3, .L514+4
-	movs	r6, #6
-	muls	r6, r0, r6
-	ldr	r1, [r3, #0]
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r3, .L534
+	ldrh	lr, [r3]
+	cmp	lr, r0
+	bls	.L520
+	ldr	r3, .L534+4
+	movs	r5, #6
+	ldr	r4, [r3]
+	mul	r3, r5, r0
+	str	r3, [sp, #4]
+	adds	r1, r4, r3
+	ldr	r2, [sp, #4]
 	movw	r3, #65535
-	adds	r2, r1, r6
-	strh	r3, [r1, r6]	@ movhi
-	strh	r3, [r2, #2]	@ movhi
-	ldr	r3, .L514+8
-	ldr	r5, [r3, #0]
-	cmp	r5, #0
-	beq	.L513
-.L500:
-	ldr	r3, .L514+12
-	ldrh	r4, [r2, #4]
-	ldr	ip, [r3, #0]
-	lsls	r3, r0, #1
-	ldrh	r7, [ip, r0, lsl #1]
-	cbz	r4, .L509
-	muls	r4, r7, r4
-	b	.L512
-.L509:
-	mov	r4, #-1
-.L512:
-	str	r4, [sp, #8]
-	subs	r4, r5, r1
-	ldr	r7, .L514+16
-	mov	sl, r2
-	asrs	r4, r4, #1
-	muls	r4, r7, r4
-	ldr	r7, .L514+20
-	uxth	r4, r4
-	str	ip, [sp, #4]
-	ldr	r7, [r7, #0]
-	adds	r3, r7, r3
-	str	r3, [sp, #20]
-	str	r7, [sp, #12]
-	mov	r3, r5
-	movs	r7, #0
-.L507:
-	adds	r7, r7, #1
-	uxth	r7, r7
-	cmp	r7, fp
-	bhi	.L499
-	cmp	r0, r4
-	beq	.L499
-	ldr	r2, [sp, #4]
-	lsl	r8, r4, #1
-	str	r8, [sp, #16]
-	ldrh	r8, [r2, r4, lsl #1]
-	ldrh	r2, [r3, #4]
-	cbz	r2, .L510
-	mul	r2, r2, r8
-	b	.L502
-.L510:
-	mov	r2, #-1
-.L502:
-	ldr	r8, [sp, #8]
-	cmp	r2, r8
-	bne	.L503
-	ldr	r2, [sp, #12]
-	ldr	ip, [sp, #16]
-	ldrh	r8, [r2, ip]
-	ldr	r2, [sp, #20]
-	ldrh	ip, [r2, #0]
-	cmp	r8, ip
-	bcc	.L505
-	b	.L511
-.L503:
-	bhi	.L511
-.L505:
-	ldrh	r2, [r3, #0]
-	movw	r8, #65535
-	cmp	r2, r8
-	bne	.L506
-	mov	r2, sl
-	strh	r0, [r3, #0]	@ movhi
-	ldr	r3, .L514+24
-	strh	r4, [r2, #2]	@ movhi
-	b	.L513
-.L506:
-	mov	ip, #6
-	mov	r4, r2
-	mla	r3, ip, r2, r1
-	b	.L507
-.L511:
-	strh	r4, [r1, r6]	@ movhi
-	mov	r2, sl
-	ldrh	r4, [r3, #2]
-	cmp	r3, r5
-	strh	r4, [r2, #2]	@ movhi
-	bne	.L508
-	strh	r0, [r3, #2]	@ movhi
-	ldr	r3, .L514+8
-.L513:
-	str	r2, [r3, #0]
-	b	.L499
-.L508:
-	ldrh	r2, [r3, #2]
-	movs	r4, #6
-	strh	r0, [r3, #2]	@ movhi
-	muls	r2, r4, r2
-	strh	r0, [r1, r2]	@ movhi
-.L499:
+	strh	r3, [r1, #2]	@ movhi
+	strh	r3, [r4, r2]	@ movhi
+	ldr	r3, .L534+8
+	ldr	ip, [r3]
+	cmp	ip, #0
+	bne	.L521
+.L533:
+	str	r1, [r3]
+.L520:
 	movs	r0, #0
-	add	sp, sp, #24
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L515:
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L521:
+	ldr	r3, .L534+12
+	lsls	r2, r0, #1
+	ldr	r3, [r3]
+	str	r3, [sp, #8]
+	ldrh	r6, [r3, r0, lsl #1]
+	ldrh	r3, [r1, #4]
+	cbz	r3, .L531
+	mul	fp, r3, r6
+.L522:
+	sub	r3, ip, r4
+	asrs	r6, r3, #1
+	ldr	r3, .L534+16
+	muls	r3, r6, r3
+	ldr	r6, .L534+20
+	ldr	r8, [r6]
+	movs	r6, #0
+	uxth	r3, r3
+	add	r2, r8, r2
+	str	r2, [sp, #12]
+	mov	r2, ip
+.L529:
+	adds	r6, r6, #1
+	uxth	r6, r6
+	cmp	lr, r6
+	bcc	.L520
+	cmp	r3, r0
+	beq	.L520
+	ldr	r7, [sp, #8]
+	lsl	r10, r3, #1
+	ldrh	r7, [r7, r3, lsl #1]
+	mov	r5, r7
+	ldrh	r7, [r2, #4]
+	cbz	r7, .L532
+	muls	r7, r5, r7
+.L524:
+	cmp	fp, r7
+	bne	.L525
+	ldr	r5, [sp, #12]
+	ldrh	r10, [r8, r10]
+	ldrh	r7, [r5]
+	cmp	r10, r7
+	bcc	.L527
+.L526:
+	ldr	r5, [sp, #4]
+	cmp	r2, ip
+	strh	r3, [r4, r5]	@ movhi
+	ldrh	r3, [r2, #2]
+	strh	r3, [r1, #2]	@ movhi
+	bne	.L530
+	strh	r0, [r2, #2]	@ movhi
+	ldr	r3, .L534+8
+	b	.L533
+.L531:
+	mov	fp, #-1
+	b	.L522
+.L532:
+	mov	r7, #-1
+	b	.L524
+.L525:
+	bcc	.L526
+.L527:
+	ldrh	r7, [r2]
+	movw	r5, #65535
+	cmp	r7, r5
+	bne	.L528
+	strh	r3, [r1, #2]	@ movhi
+	strh	r0, [r2]	@ movhi
+	ldr	r3, .L534+24
+	b	.L533
+.L528:
+	movs	r3, #6
+	mla	r2, r3, r7, r4
+	mov	r3, r7
+	b	.L529
+.L530:
+	ldrh	r1, [r2, #2]
+	movs	r3, #6
+	muls	r3, r1, r3
+	strh	r0, [r4, r3]	@ movhi
+	strh	r0, [r2, #2]	@ movhi
+	b	.L520
+.L535:
 	.align	2
-.L514:
-	.word	.LANCHOR43
-	.word	.LANCHOR87
-	.word	.LANCHOR88
-	.word	.LANCHOR89
+.L534:
+	.word	.LANCHOR38
+	.word	.LANCHOR80
+	.word	.LANCHOR81
+	.word	.LANCHOR82
 	.word	-1431655765
-	.word	.LANCHOR84
-	.word	.LANCHOR90
+	.word	.LANCHOR77
+	.word	.LANCHOR83
 	.size	insert_data_list, .-insert_data_list
 	.section	.text.INSERT_DATA_LIST,"ax",%progbits
 	.align	1
 	.global	INSERT_DATA_LIST
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	INSERT_DATA_LIST, %function
 INSERT_DATA_LIST:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	insert_data_list
-	ldr	r2, .L518
-	ldrh	r3, [r2, #0]
+	ldr	r2, .L538
+	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	uxth	r3, r3
-	strh	r3, [r2, #0]	@ movhi
-	ldr	r2, .L518+4
-	ldrh	r2, [r2, #0]
+	strh	r3, [r2]	@ movhi
+	ldr	r2, .L538+4
+	ldrh	r2, [r2]
 	cmp	r2, r3
-	bcs	.L516
-	ldr	r1, .L518+8
+	bcs	.L536
+	ldr	r1, .L538+8
 	movs	r2, #205
-	ldr	r0, .L518+12
+	ldr	r0, .L538+12
 	bl	printf
-	ldr	r0, .L518+16
-	ldr	r1, .L518+20
+	ldr	r1, .L538+16
+	ldr	r0, .L538+20
 	pop	{r3, lr}
 	b	printf
-.L516:
+.L536:
 	pop	{r3, pc}
-.L519:
+.L539:
 	.align	2
-.L518:
-	.word	.LANCHOR91
-	.word	.LANCHOR43
-	.word	.LANCHOR92
-	.word	.LC3
+.L538:
+	.word	.LANCHOR84
+	.word	.LANCHOR38
+	.word	.LANCHOR85
 	.word	.LC4
 	.word	.LC5
+	.word	.LC6
 	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
 	.section	.text.insert_free_list,"ax",%progbits
 	.align	1
 	.global	insert_free_list
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	insert_free_list, %function
 insert_free_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	movw	r8, #65535
-	cmp	r0, r8
-	beq	.L521
-	ldr	r3, .L528
-	mov	fp, #6
-	mul	r6, fp, r0
-	ldr	r2, [r3, #0]
-	ldr	r3, .L528+4
-	adds	r1, r2, r6
-	ldr	r4, [r3, #0]
-	strh	r8, [r1, #2]	@ movhi
-	strh	r8, [r2, r6]	@ movhi
-	cbz	r4, .L527
-.L522:
-	ldr	r3, .L528+8
-	subs	r5, r4, r2
-	asrs	r5, r5, #1
-	ldr	ip, [r3, #0]
-	ldr	r3, .L528+12
-	muls	r5, r3, r5
-	mov	r3, r4
-	uxth	r5, r5
-	ldrh	sl, [ip, r0, lsl #1]
-.L525:
-	ldrh	r7, [ip, r5, lsl #1]
-	cmp	r7, sl
-	bcs	.L523
-	ldrh	r7, [r3, #0]
-	cmp	r7, r8
-	bne	.L524
-	strh	r5, [r1, #2]	@ movhi
-	strh	r0, [r3, #0]	@ movhi
-	b	.L521
-.L524:
-	mla	r3, fp, r7, r2
-	mov	r5, r7
-	b	.L525
-.L523:
-	ldrh	r7, [r3, #2]
-	cmp	r3, r4
-	strh	r5, [r2, r6]	@ movhi
-	strh	r7, [r1, #2]	@ movhi
-	bne	.L526
-	strh	r0, [r3, #2]	@ movhi
-	ldr	r3, .L528+4
-.L527:
-	str	r1, [r3, #0]
-	b	.L521
-.L526:
-	ldrh	r1, [r3, #2]
-	movs	r4, #6
-	strh	r0, [r3, #2]	@ movhi
-	muls	r1, r4, r1
-	strh	r0, [r2, r1]	@ movhi
-.L521:
+	movw	r1, #65535
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	cmp	r0, r1
+	beq	.L541
+	ldr	r3, .L547
+	mov	r10, #6
+	mul	r7, r10, r0
+	ldr	r4, [r3]
+	ldr	r3, .L547+4
+	adds	r5, r4, r7
+	ldr	r6, [r3]
+	mov	lr, r3
+	strh	r1, [r5, #2]	@ movhi
+	strh	r1, [r4, r7]	@ movhi
+	cbnz	r6, .L542
+	str	r5, [r3]
+.L541:
 	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L529:
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L542:
+	ldr	r3, .L547+8
+	subs	r2, r6, r4
+	mov	fp, r1
+	ldr	ip, [r3]
+	asrs	r3, r2, #1
+	ldr	r2, .L547+12
+	ldrh	r8, [ip, r0, lsl #1]
+	muls	r2, r3, r2
+	mov	r3, r6
+	uxth	r2, r2
+.L545:
+	ldrh	r1, [ip, r2, lsl #1]
+	cmp	r1, r8
+	bcs	.L543
+	ldrh	r1, [r3]
+	cmp	r1, fp
+	bne	.L544
+	strh	r2, [r5, #2]	@ movhi
+	strh	r0, [r3]	@ movhi
+	b	.L541
+.L544:
+	mla	r3, r10, r1, r4
+	mov	r2, r1
+	b	.L545
+.L543:
+	ldrh	r1, [r3, #2]
+	cmp	r3, r6
+	strh	r1, [r5, #2]	@ movhi
+	it	ne
+	ldrhne	r1, [r3, #2]
+	strh	r2, [r4, r7]	@ movhi
+	iteet	ne
+	movne	r2, #6
+	strheq	r0, [r3, #2]	@ movhi
+	streq	r5, [lr]
+	mulne	r2, r2, r1
+	itt	ne
+	strhne	r0, [r4, r2]	@ movhi
+	strhne	r0, [r3, #2]	@ movhi
+	b	.L541
+.L548:
 	.align	2
-.L528:
-	.word	.LANCHOR87
-	.word	.LANCHOR93
-	.word	.LANCHOR84
+.L547:
+	.word	.LANCHOR80
+	.word	.LANCHOR86
+	.word	.LANCHOR77
 	.word	-1431655765
 	.size	insert_free_list, .-insert_free_list
 	.section	.text.INSERT_FREE_LIST,"ax",%progbits
 	.align	1
 	.global	INSERT_FREE_LIST
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	INSERT_FREE_LIST, %function
 INSERT_FREE_LIST:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	insert_free_list
-	ldr	r2, .L532
-	ldrh	r3, [r2, #0]
+	ldr	r2, .L551
+	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	uxth	r3, r3
-	strh	r3, [r2, #0]	@ movhi
-	ldr	r2, .L532+4
-	ldrh	r2, [r2, #0]
+	strh	r3, [r2]	@ movhi
+	ldr	r2, .L551+4
+	ldrh	r2, [r2]
 	cmp	r2, r3
-	bcs	.L530
-	ldr	r1, .L532+8
+	bcs	.L549
+	ldr	r1, .L551+8
 	movs	r2, #198
-	ldr	r0, .L532+12
+	ldr	r0, .L551+12
 	bl	printf
-	ldr	r0, .L532+16
-	ldr	r1, .L532+20
+	ldr	r1, .L551+16
+	ldr	r0, .L551+20
 	pop	{r3, lr}
 	b	printf
-.L530:
+.L549:
 	pop	{r3, pc}
-.L533:
+.L552:
 	.align	2
-.L532:
-	.word	.LANCHOR94
-	.word	.LANCHOR43
-	.word	.LANCHOR95
-	.word	.LC3
+.L551:
+	.word	.LANCHOR87
+	.word	.LANCHOR38
+	.word	.LANCHOR88
 	.word	.LC4
 	.word	.LC5
+	.word	.LC6
 	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
 	.section	.text.List_remove_node,"ax",%progbits
 	.align	1
 	.global	List_remove_node
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	List_remove_node, %function
 List_remove_node:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
+	push	{r4, r5, r6, r7, r8, lr}
 	movs	r6, #6
+	ldr	r5, .L559
 	muls	r6, r1, r6
-	ldr	r3, .L540
-	mov	r5, r0
-	ldr	r7, [r3, #0]
 	movw	r3, #65535
+	mov	r8, r0
+	ldr	r7, [r5]
 	adds	r4, r7, r6
 	ldrh	r2, [r4, #2]
 	cmp	r2, r3
-	bne	.L535
-	ldr	r3, [r0, #0]
+	bne	.L554
+	ldr	r3, [r0]
 	cmp	r4, r3
-	beq	.L535
-	ldr	r1, .L540+4
+	beq	.L554
+	ldr	r1, .L559+4
 	movw	r2, #363
-	ldr	r0, .L540+8
+	ldr	r0, .L559+8
 	bl	printf
-	ldr	r0, .L540+12
-	ldr	r1, .L540+16
+	ldr	r1, .L559+12
+	ldr	r0, .L559+16
 	bl	printf
-.L535:
-	ldr	r3, [r5, #0]
-	movw	r2, #65535
+.L554:
+	ldr	r3, [r8]
+	movw	r1, #65535
 	cmp	r4, r3
 	ldrh	r3, [r7, r6]
-	bne	.L536
-	cmp	r3, r2
-	bne	.L537
-	movs	r3, #0
-	str	r3, [r5, #0]
-	b	.L538
-.L537:
-	ldr	r1, .L540
-	movs	r0, #6
-	ldr	r1, [r1, #0]
-	mla	r3, r0, r3, r1
-	str	r3, [r5, #0]
-	strh	r2, [r3, #2]	@ movhi
-	b	.L538
-.L536:
-	cmp	r3, r2
-	ldrh	r2, [r4, #2]
-	bne	.L539
-	cmp	r2, r3
-	beq	.L538
-	ldr	r1, .L540
-	movs	r0, #6
-	muls	r2, r0, r2
-	ldr	r1, [r1, #0]
-	strh	r3, [r1, r2]	@ movhi
-	b	.L538
-.L539:
-	ldr	r1, .L540
-	movs	r0, #6
-	ldr	r1, [r1, #0]
-	mla	r5, r0, r3, r1
-	strh	r2, [r5, #2]	@ movhi
-	ldrh	r2, [r4, #2]
-	muls	r0, r2, r0
-	strh	r3, [r1, r0]	@ movhi
-.L538:
+	bne	.L555
+	cmp	r3, r1
+	ittee	ne
+	ldrne	r0, [r5]
+	movne	r2, #6
+	moveq	r3, #0
+	streq	r3, [r8]
+	ittt	ne
+	mlane	r3, r2, r3, r0
+	strne	r3, [r8]
+	strhne	r1, [r3, #2]	@ movhi
+.L557:
 	movw	r3, #65535
 	movs	r0, #0
 	strh	r3, [r7, r6]	@ movhi
 	strh	r3, [r4, #2]	@ movhi
-	pop	{r3, r4, r5, r6, r7, pc}
-.L541:
+	pop	{r4, r5, r6, r7, r8, pc}
+.L555:
+	cmp	r3, r1
+	ldrh	r1, [r4, #2]
+	bne	.L558
+	cmp	r1, r3
+	beq	.L557
+	movs	r2, #6
+	ldr	r0, [r5]
+	muls	r1, r2, r1
+	strh	r3, [r0, r1]	@ movhi
+	b	.L557
+.L558:
+	ldr	r0, [r5]
+	movs	r2, #6
+	mla	r5, r2, r3, r0
+	strh	r1, [r5, #2]	@ movhi
+	ldrh	r1, [r4, #2]
+	muls	r2, r1, r2
+	strh	r3, [r0, r2]	@ movhi
+	b	.L557
+.L560:
 	.align	2
-.L540:
-	.word	.LANCHOR87
-	.word	.LANCHOR96
-	.word	.LC3
+.L559:
+	.word	.LANCHOR80
+	.word	.LANCHOR89
 	.word	.LC4
 	.word	.LC5
+	.word	.LC6
 	.size	List_remove_node, .-List_remove_node
 	.section	.text.List_pop_index_node,"ax",%progbits
 	.align	1
 	.global	List_pop_index_node
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	List_pop_index_node, %function
 List_pop_index_node:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, [r0, #0]
+	ldr	r3, [r0]
 	push	{r4, r5, r6, lr}
-	cbz	r3, .L547
-	ldr	r2, .L548
-	movw	r6, #65535
-	movs	r5, #6
-	ldr	r4, [r2, #0]
-	b	.L544
-.L546:
-	mla	r3, r5, r2, r4
-	subs	r1, r1, #1
-	uxth	r1, r1
-.L544:
-	cbz	r1, .L545
-	ldrh	r2, [r3, #0]
-	cmp	r2, r6
-	bne	.L546
-.L545:
-	subs	r4, r3, r4
-	ldr	r3, .L548+4
-	asrs	r4, r4, #1
+	cbz	r3, .L567
+	ldr	r2, .L568
+	movw	r5, #65535
+	movs	r6, #6
+	ldr	r2, [r2]
+.L563:
+	cbnz	r1, .L564
+.L566:
+	ldr	r4, .L568+4
+	subs	r3, r3, r2
+	asrs	r3, r3, #1
 	muls	r4, r3, r4
-	uxth	r4, r4
-	mov	r1, r4
+	uxth	r1, r4
 	bl	List_remove_node
-	mov	r0, r4
+	uxth	r0, r4
 	pop	{r4, r5, r6, pc}
-.L547:
+.L564:
+	ldrh	r4, [r3]
+	cmp	r4, r5
+	beq	.L566
+	subs	r1, r1, #1
+	mla	r3, r6, r4, r2
+	uxth	r1, r1
+	b	.L563
+.L567:
 	movw	r0, #65535
 	pop	{r4, r5, r6, pc}
-.L549:
+.L569:
 	.align	2
-.L548:
-	.word	.LANCHOR87
+.L568:
+	.word	.LANCHOR80
 	.word	-1431655765
 	.size	List_pop_index_node, .-List_pop_index_node
 	.section	.text.List_get_gc_head_node,"ax",%progbits
 	.align	1
 	.global	List_get_gc_head_node
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	List_get_gc_head_node, %function
 List_get_gc_head_node:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L556
+	ldr	r3, .L576
 	push	{r4, lr}
-	ldr	r3, [r3, #0]
-	cbz	r3, .L555
-	ldr	r2, .L556+4
-	movw	r1, #65535
+	ldr	r3, [r3]
+	cbz	r3, .L575
+	ldr	r2, .L576+4
 	movs	r4, #6
-	ldr	r2, [r2, #0]
-	b	.L552
-.L554:
-	mla	r3, r4, r3, r2
+	ldr	r1, [r2]
+	movw	r2, #65535
+.L572:
+	cbz	r0, .L573
+	ldrh	r3, [r3]
+	cmp	r3, r2
+	bne	.L574
+.L575:
+	movw	r0, #65535
+	pop	{r4, pc}
+.L574:
 	subs	r0, r0, #1
+	mla	r3, r4, r3, r1
 	uxth	r0, r0
-.L552:
-	cbz	r0, .L553
-	ldrh	r3, [r3, #0]
-	cmp	r3, r1
-	bne	.L554
-	mov	r0, r1
-	pop	{r4, pc}
-.L553:
-	subs	r3, r3, r2
-	ldr	r0, .L556+8
+	b	.L572
+.L573:
+	ldr	r0, .L576+8
+	subs	r3, r3, r1
 	asrs	r3, r3, #1
-	muls	r0, r3, r0
-	uxth	r0, r0
-	pop	{r4, pc}
-.L555:
-	movw	r0, #65535
+	muls	r3, r0, r3
+	uxth	r0, r3
 	pop	{r4, pc}
-.L557:
+.L577:
 	.align	2
-.L556:
-	.word	.LANCHOR88
-	.word	.LANCHOR87
+.L576:
+	.word	.LANCHOR81
+	.word	.LANCHOR80
 	.word	-1431655765
 	.size	List_get_gc_head_node, .-List_get_gc_head_node
 	.section	.text.List_update_data_list,"ax",%progbits
 	.align	1
 	.global	List_update_data_list
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	List_update_data_list, %function
 List_update_data_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L567
-	push	{r4, r5, r6, r7, r8, lr}
+	ldr	r3, .L587
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-	ldrh	r3, [r3, #0]
+	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L559
-	ldr	r3, .L567+4
-	ldrh	r3, [r3, #0]
+	beq	.L580
+	ldr	r3, .L587+4
+	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L559
-	ldr	r3, .L567+8
-	ldrh	r3, [r3, #0]
+	beq	.L580
+	ldr	r3, .L587+8
+	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L559
-	ldr	r3, .L567+12
-	movs	r7, #6
-	muls	r7, r0, r7
-	ldr	r8, [r3, #0]
-	ldr	r3, .L567+16
-	add	r5, r8, r7
-	ldr	r3, [r3, #0]
-	cmp	r5, r3
-	beq	.L559
-	ldr	r3, .L567+20
+	beq	.L580
+	ldr	r7, .L587+12
+	movs	r6, #6
+	ldr	r3, .L587+16
+	muls	r6, r0, r6
+	ldr	fp, [r7]
+	ldr	r3, [r3]
+	add	r10, fp, r6
+	cmp	r10, r3
+	beq	.L580
+	ldr	r2, .L587+20
+	ldrh	r5, [r10, #4]
+	ldr	r3, [r2]
+	mov	r8, r2
 	movw	r2, #65535
-	ldrh	r6, [r5, #4]
-	ldr	r3, [r3, #0]
 	ldrh	r3, [r3, r0, lsl #1]
-	muls	r6, r3, r6
-	ldrh	r3, [r5, #2]
+	muls	r5, r3, r5
+	ldrh	r3, [r10, #2]
 	it	eq
-	moveq	r6, #-1
+	moveq	r5, #-1
 	cmp	r3, r2
-	bne	.L561
-	ldrh	r2, [r8, r7]
+	bne	.L583
+	ldrh	r2, [fp, r6]
 	cmp	r2, r3
-	bne	.L561
-	ldr	r1, .L567+24
+	bne	.L583
+	ldr	r1, .L587+24
 	movw	r2, #481
-	ldr	r0, .L567+28
+	ldr	r0, .L587+28
 	bl	printf
-	ldr	r0, .L567+32
-	ldr	r1, .L567+36
+	ldr	r1, .L587+32
+	ldr	r0, .L587+36
 	bl	printf
-.L561:
-	ldrh	r3, [r5, #2]
+.L583:
+	ldrh	r3, [r10, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L562
-	ldrh	r2, [r8, r7]
+	bne	.L584
+	ldrh	r2, [fp, r6]
 	cmp	r2, r3
-	beq	.L559
-.L562:
-	ldr	r2, .L567+12
-	movs	r1, #6
-	ldr	r2, [r2, #0]
-	mla	r3, r1, r3, r2
-	ldr	r1, .L567+40
-	subs	r2, r3, r2
-	asrs	r2, r2, #1
-	muls	r2, r1, r2
-	ldr	r1, .L567+20
-	uxth	r2, r2
-	ldrh	r3, [r3, #4]
-	ldr	r1, [r1, #0]
-	ldrh	r2, [r1, r2, lsl #1]
-	muls	r3, r2, r3
+	beq	.L580
+.L584:
+	movs	r2, #6
+	muls	r2, r3, r2
+	ldr	r3, .L587+40
+	asrs	r1, r2, #1
+	muls	r3, r1, r3
+	ldr	r1, [r8]
+	ldrh	r0, [r1, r3, lsl #1]
+	ldr	r1, [r7]
+	add	r2, r2, r1
+	ldrh	r3, [r2, #4]
+	muls	r3, r0, r3
 	it	eq
 	moveq	r3, #-1
-	cmp	r6, r3
-	bcs	.L559
-	ldr	r5, .L567+44
+	cmp	r5, r3
+	bcs	.L580
+	ldr	r5, .L587+44
 	mov	r1, r4
-	ldr	r0, .L567+16
+	ldr	r0, .L587+16
 	bl	List_remove_node
-	ldrh	r3, [r5, #0]
-	cbnz	r3, .L564
-	ldr	r1, .L567+24
+	ldrh	r3, [r5]
+	cbnz	r3, .L586
+	ldr	r1, .L587+24
 	mov	r2, #492
-	ldr	r0, .L567+28
+	ldr	r0, .L587+28
 	bl	printf
-	ldr	r0, .L567+32
-	ldr	r1, .L567+36
+	ldr	r1, .L587+32
+	ldr	r0, .L587+36
 	bl	printf
-.L564:
-	ldrh	r3, [r5, #0]
+.L586:
+	ldrh	r3, [r5]
 	mov	r0, r4
 	subs	r3, r3, #1
-	strh	r3, [r5, #0]	@ movhi
+	strh	r3, [r5]	@ movhi
 	bl	INSERT_DATA_LIST
-.L559:
+.L580:
 	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, pc}
-.L568:
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L588:
 	.align	2
-.L567:
-	.word	.LANCHOR97
-	.word	.LANCHOR98
-	.word	.LANCHOR99
-	.word	.LANCHOR87
-	.word	.LANCHOR88
-	.word	.LANCHOR89
-	.word	.LANCHOR100
-	.word	.LC3
+.L587:
+	.word	.LANCHOR90
+	.word	.LANCHOR91
+	.word	.LANCHOR92
+	.word	.LANCHOR80
+	.word	.LANCHOR81
+	.word	.LANCHOR82
+	.word	.LANCHOR93
 	.word	.LC4
 	.word	.LC5
+	.word	.LC6
 	.word	-1431655765
-	.word	.LANCHOR91
+	.word	.LANCHOR84
 	.size	List_update_data_list, .-List_update_data_list
-	.section	.text.ftl_free_no_use_map_blk,"ax",%progbits
-	.align	1
-	.global	ftl_free_no_use_map_blk
-	.thumb
-	.thumb_func
-	.type	ftl_free_no_use_map_blk, %function
-ftl_free_no_use_map_blk:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldrh	r2, [r0, #10]
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r4, r0
-	ldr	r5, [r0, #20]
-	lsls	r2, r2, #1
-	ldr	r6, [r0, #12]
-	movs	r1, #0
-	ldr	r7, [r0, #24]
-	mov	r0, r5
-	bl	memset
-	movs	r2, #0
-	b	.L570
-.L574:
-	ldr	r1, [r7, r2, lsl #2]
-	movs	r3, #0
-	ubfx	r1, r1, #10, #16
-	b	.L571
-.L573:
-	ldrh	r0, [r6, r3, lsl #1]
-	cmp	r0, r1
-	bne	.L572
-	ldrh	r0, [r5, r3, lsl #1]
-	adds	r0, r0, #1
-	strh	r0, [r5, r3, lsl #1]	@ movhi
-.L572:
-	adds	r3, r3, #1
-	uxth	r3, r3
-.L571:
-	ldrh	r0, [r4, #10]
-	cmp	r0, r3
-	bhi	.L573
-	adds	r2, r2, #1
-	uxth	r2, r2
-.L570:
-	ldrh	r3, [r4, #6]
-	cmp	r3, r2
-	bhi	.L574
-	mov	sl, #0
-	ldrh	r3, [r5, #0]
-	mov	r7, sl
-	ldr	r2, .L580
-	b	.L575
-.L579:
-	ldrh	r1, [r4, #0]
-	cmp	r1, r7
-	bne	.L576
-	ldrh	r1, [r2, #0]
-	ldrh	r0, [r4, #2]
-	cmp	r0, r1
-	it	cc
-	strhcc	r1, [r5, r7, lsl #1]	@ movhi
-.L576:
-	ldrh	r8, [r5, r7, lsl #1]
-	lsl	fp, r7, #1
-	cmp	r3, r8
-	itt	hi
-	movhi	sl, r7
-	movhi	r3, r8
-	cmp	r8, #0
-	bne	.L578
-	ldrh	r0, [r6, fp]
-	cbz	r0, .L578
-	movs	r1, #1
-	stmia	sp, {r2, r3}
-	bl	FtlFreeSysBlkQueueIn
-	ldmia	sp, {r2, r3}
-	strh	r8, [r6, fp]	@ movhi
-	ldrh	r1, [r4, #8]
-	subs	r1, r1, #1
-	strh	r1, [r4, #8]	@ movhi
-.L578:
-	adds	r7, r7, #1
-	uxth	r7, r7
-.L575:
-	ldrh	r1, [r4, #10]
-	cmp	r1, r7
-	bhi	.L579
-	mov	r0, sl
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L581:
-	.align	2
-.L580:
-	.word	.LANCHOR57
-	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.section	.text.ftl_map_blk_alloc_new_blk,"ax",%progbits
 	.align	1
 	.global	ftl_map_blk_alloc_new_blk
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	ftl_map_blk_alloc_new_blk, %function
 ftl_map_blk_alloc_new_blk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+	ldrh	r1, [r0, #10]
+	ldr	r2, [r0, #12]
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r4, r0
-	ldrh	r2, [r0, #10]
-	movs	r5, #0
-	ldr	r3, [r0, #12]
-	b	.L583
-.L586:
-	mov	r7, r3
-	adds	r3, r3, #2
-	ldrh	r6, [r7, #0]
-	cbnz	r6, .L584
+	movs	r3, #0
+.L590:
+	uxth	r5, r3
+	cmp	r5, r1
+	bcc	.L592
+.L593:
+	movw	r2, #594
+	ldr	r1, .L599
+	ldr	r0, .L599+4
+	bl	printf
+	ldr	r1, .L599+8
+	ldr	r0, .L599+12
+	bl	printf
+	b	.L594
+.L592:
+	mov	r7, r2
+	adds	r3, r3, #1
+	ldrh	r6, [r7]
+	adds	r2, r2, #2
+	cmp	r6, #0
+	bne	.L590
 	bl	FtlFreeSysBlkQueueOut
-	strh	r0, [r7, #0]	@ movhi
-	cbz	r0, .L585
+	strh	r0, [r7]	@ movhi
+	cbz	r0, .L591
 	ldr	r3, [r4, #28]
 	strh	r6, [r4, #2]	@ movhi
+	strh	r5, [r4]	@ movhi
 	adds	r3, r3, #1
 	str	r3, [r4, #28]
 	ldrh	r3, [r4, #8]
-	strh	r5, [r4, #0]	@ movhi
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	b	.L585
-.L584:
-	adds	r5, r5, #1
-	uxth	r5, r5
-.L583:
-	cmp	r5, r2
-	bne	.L586
-.L585:
+.L591:
 	ldrh	r3, [r4, #10]
 	cmp	r3, r5
-	bhi	.L587
-	ldr	r1, .L588
-	movw	r2, #594
-	ldr	r0, .L588+4
-	bl	printf
-	ldr	r0, .L588+8
-	ldr	r1, .L588+12
-	bl	printf
-.L587:
+	bls	.L593
+.L594:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L589:
+.L600:
 	.align	2
-.L588:
-	.word	.LANCHOR101
-	.word	.LC3
+.L599:
+	.word	.LANCHOR94
 	.word	.LC4
 	.word	.LC5
+	.word	.LC6
 	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
 	.section	.text.select_l2p_ram_region,"ax",%progbits
 	.align	1
 	.global	select_l2p_ram_region
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	select_l2p_ram_region, %function
 select_l2p_ram_region:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L602
-	movw	r1, #65535
 	push	{r3, r4, r5, r6, r7, lr}
-	ldr	r3, .L602+4
-	ldr	r0, [r2, #0]
-	movs	r2, #0
+	movs	r1, #0
+	ldr	r3, .L611
+	movs	r0, #12
+	movw	r5, #65535
+	ldrh	r2, [r3]
+	ldr	r3, .L611+4
+	ldr	r3, [r3]
+.L602:
+	uxth	r4, r1
+	cmp	r4, r2
+	bcc	.L604
 	mov	r4, r2
-	ldrh	r3, [r3, #0]
-	b	.L591
-.L593:
-	adds	r2, r2, #12
-	adds	r5, r0, r2
-	ldrh	r5, [r5, #-12]
-	cmp	r5, r1
-	beq	.L592
-	adds	r4, r4, #1
-	uxth	r4, r4
-.L591:
-	cmp	r4, r3
-	bne	.L593
 	movs	r1, #0
-	mov	r4, r3
 	mov	r6, #-2147483648
-	mov	r2, r1
-	b	.L594
-.L596:
-	adds	r5, r0, r1
-	ldr	r5, [r5, #4]
-	cmp	r5, #0
-	blt	.L595
-	cmp	r5, r6
-	itt	cc
-	movcc	r6, r5
-	movcc	r4, r2
-.L595:
-	adds	r2, r2, #1
-	adds	r1, r1, #12
-	uxth	r2, r2
-.L594:
-	cmp	r2, r3
-	bne	.L596
-	cmp	r4, r3
-	bcc	.L592
-	ldr	r2, .L602+8
+	movs	r7, #12
+.L605:
+	uxth	r5, r1
+	cmp	r5, r2
+	bcc	.L607
+	cmp	r4, r2
+	bcc	.L603
+	ldr	r1, .L611+8
+	mov	r4, r2
+	mov	r0, #-1
+	ldrh	r7, [r1]
 	movs	r1, #0
-	mov	r4, r3
-	mov	r5, #-1
-	ldrh	r7, [r2, #0]
-	mov	r2, r1
-	b	.L597
-.L599:
-	adds	r6, r0, r1
-	ldr	r6, [r6, #4]
-	cmp	r6, r5
-	bcs	.L598
-	ldrh	ip, [r0, r1]
-	cmp	ip, r7
-	it	ne
-	movne	r5, r6
-	it	ne
-	movne	r4, r2
-.L598:
-	adds	r2, r2, #1
-	adds	r1, r1, #12
-	uxth	r2, r2
-.L597:
-	cmp	r2, r3
-	bne	.L599
+.L608:
+	uxth	r5, r1
+	cmp	r5, r2
+	bcc	.L610
 	cmp	r4, r2
-	bcc	.L592
-	ldr	r1, .L602+12
+	bcc	.L603
 	movw	r2, #826
-	ldr	r0, .L602+16
+	ldr	r1, .L611+12
+	ldr	r0, .L611+16
 	bl	printf
-	ldr	r0, .L602+20
-	ldr	r1, .L602+24
+	ldr	r1, .L611+20
+	ldr	r0, .L611+24
 	bl	printf
-.L592:
+	b	.L603
+.L604:
+	adds	r1, r1, #1
+	mla	r6, r0, r1, r3
+	ldrh	r6, [r6, #-12]
+	cmp	r6, r5
+	bne	.L602
+.L603:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, pc}
-.L603:
+.L607:
+	mla	r0, r7, r1, r3
+	ldr	r0, [r0, #4]
+	cmp	r0, #0
+	blt	.L606
+	cmp	r6, r0
+	itt	hi
+	movhi	r6, r0
+	movhi	r4, r5
+.L606:
+	adds	r1, r1, #1
+	b	.L605
+.L610:
+	ldr	r6, [r3, #4]
+	cmp	r0, r6
+	bls	.L609
+	ldrh	ip, [r3]
+	cmp	ip, r7
+	itt	ne
+	movne	r0, r6
+	movne	r4, r5
+.L609:
+	adds	r1, r1, #1
+	adds	r3, r3, #12
+	b	.L608
+.L612:
 	.align	2
-.L602:
-	.word	.LANCHOR102
-	.word	.LANCHOR71
-	.word	.LANCHOR103
-	.word	.LANCHOR104
-	.word	.LC3
+.L611:
+	.word	.LANCHOR66
+	.word	.LANCHOR95
+	.word	.LANCHOR96
+	.word	.LANCHOR97
 	.word	.LC4
 	.word	.LC5
+	.word	.LC6
 	.size	select_l2p_ram_region, .-select_l2p_ram_region
 	.section	.text.FtlUpdateVaildLpn,"ax",%progbits
 	.align	1
 	.global	FtlUpdateVaildLpn
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FtlUpdateVaildLpn, %function
 FtlUpdateVaildLpn:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L610
-	push	{r4, r5, lr}
-	ldrh	r2, [r3, #0]
-	adds	r1, r2, #1
-	cmp	r2, #4
-	strh	r1, [r3, #0]	@ movhi
-	mov	r2, r3
-	bhi	.L605
-	cbz	r0, .L604
-.L605:
+	ldr	r2, .L623
+	push	{r4, r5, r6, lr}
+	mov	r1, r2
+	ldrh	r3, [r2]
+	cmp	r3, #4
+	bhi	.L614
+	cbnz	r0, .L614
+	adds	r3, r3, #1
+	strh	r3, [r2]	@ movhi
+	pop	{r4, r5, r6, pc}
+.L614:
 	movs	r3, #0
-	strh	r3, [r2, #0]	@ movhi
-	ldr	r2, .L610+4
-	movw	r4, #65535
-	ldrh	r5, [r2, #0]
-	ldr	r2, .L610+8
-	ldr	r1, [r2, #0]
-	mov	r2, r3
-	b	.L607
-.L609:
-	ldrh	r0, [r1], #2
-	cmp	r0, r4
-	it	ne
-	addne	r3, r3, r0
-	adds	r2, r2, #1
-	uxth	r2, r2
-.L607:
-	cmp	r2, r5
-	bne	.L609
-	ldr	r2, .L610+12
-	str	r3, [r2, #0]
-.L604:
-	pop	{r4, r5, pc}
-.L611:
+	ldr	r0, .L623+4
+	strh	r3, [r1]	@ movhi
+	movw	r6, #65535
+	ldr	r1, .L623+8
+	ldrh	r4, [r0]
+	mov	r0, r3
+	ldr	r2, .L623+12
+	ldr	r1, [r1]
+	str	r3, [r2]
+	add	r4, r1, r4, lsl #1
+.L615:
+	cmp	r1, r4
+	bne	.L617
+	cbz	r3, .L613
+	str	r0, [r2]
+.L613:
+	pop	{r4, r5, r6, pc}
+.L617:
+	ldrh	r5, [r1], #2
+	cmp	r5, r6
+	itt	ne
+	addne	r0, r0, r5
+	movne	r3, #1
+	b	.L615
+.L624:
 	.align	2
-.L610:
-	.word	.LANCHOR105
-	.word	.LANCHOR43
-	.word	.LANCHOR89
-	.word	.LANCHOR106
+.L623:
+	.word	.LANCHOR98
+	.word	.LANCHOR38
+	.word	.LANCHOR82
+	.word	.LANCHOR99
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
 	.section	.text.ftl_set_blk_mode,"ax",%progbits
 	.align	1
 	.global	ftl_set_blk_mode
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	ftl_set_blk_mode, %function
 ftl_set_blk_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L616
-	lsrs	r2, r0, #5
-	and	r0, r0, #31
-	uxth	r2, r2
-	ldr	r3, [r3, #0]
-	cbz	r1, .L613
-	movs	r1, #1
-	lsl	r0, r1, r0
-	ldr	r1, [r3, r2, lsl #2]
-	orrs	r0, r0, r1
-	b	.L615
-.L613:
-	movs	r1, #1
-	lsl	r0, r1, r0
-	ldr	r1, [r3, r2, lsl #2]
-	bic	r0, r1, r0
-.L615:
-	str	r0, [r3, r2, lsl #2]
+	mov	r3, r0
+	cbz	r1, .L626
+	b	ftl_set_blk_mode.part.9
+.L626:
+	ldr	r2, .L627
+	lsrs	r0, r0, #5
+	and	r3, r3, #31
+	ldr	r1, [r2]
+	movs	r2, #1
+	lsl	r3, r2, r3
+	ldr	r2, [r1, r0, lsl #2]
+	bic	r2, r2, r3
+	str	r2, [r1, r0, lsl #2]
 	bx	lr
-.L617:
+.L628:
 	.align	2
-.L616:
-	.word	.LANCHOR107
+.L627:
+	.word	.LANCHOR0
 	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
 	.section	.text.ftl_get_blk_mode,"ax",%progbits
 	.align	1
 	.global	ftl_get_blk_mode
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	ftl_get_blk_mode, %function
 ftl_get_blk_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L619
+	ldr	r3, .L630
 	lsrs	r2, r0, #5
 	and	r0, r0, #31
-	ldr	r3, [r3, #0]
+	ldr	r3, [r3]
 	ldr	r3, [r3, r2, lsl #2]
 	lsr	r0, r3, r0
 	and	r0, r0, #1
 	bx	lr
-.L620:
+.L631:
 	.align	2
-.L619:
-	.word	.LANCHOR107
+.L630:
+	.word	.LANCHOR0
 	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
-	.section	.text.FtlL2PDataInit,"ax",%progbits
-	.align	1
-	.global	FtlL2PDataInit
-	.thumb
-	.thumb_func
-	.type	FtlL2PDataInit, %function
-FtlL2PDataInit:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L624
-	movs	r1, #0
-	push	{r4, r5, r6, r7, r8, lr}
-	ldr	r2, [r3, #0]
-	ldr	r3, .L624+4
-	ldr	r5, .L624+8
-	ldr	r4, .L624+12
-	lsls	r2, r2, #1
-	ldr	r6, .L624+16
-	ldr	r0, [r3, #0]
-	bl	memset
-	ldrh	r3, [r4, #0]
-	ldrh	r2, [r6, #0]
-	movs	r1, #255
-	muls	r2, r3, r2
-	ldr	r0, [r5, #0]
-	bl	memset
-	ldr	r3, .L624+20
-	ldrh	r7, [r6, #0]
-	ldr	ip, [r5, #0]
-	movw	r5, #65535
-	ldr	r2, [r3, #0]
-	movs	r3, #0
-	ldrh	r6, [r4, #0]
-	mov	r0, r3
-	mov	r4, r3
-	b	.L622
-.L623:
-	adds	r0, r0, #1
-	bic	r3, r3, #3
-	add	r3, ip, r3
-	str	r3, [r2, #-4]
-	uxth	r0, r0
-	mov	r3, r8
-	str	r4, [r2, #-8]
-	strh	r5, [r2, #-12]	@ movhi
-.L622:
-	adds	r2, r2, #12
-	cmp	r0, r7
-	add	r8, r3, r6
-	movw	r1, #65535
-	bne	.L623
-	ldr	r2, .L624
-	ldr	r3, .L624+24
-	ldr	r2, [r2, #0]
-	strh	r1, [r3, #2]	@ movhi
-	strh	r1, [r3, #0]	@ movhi
-	strh	r2, [r3, #10]	@ movhi
-	movw	r2, #61634
-	strh	r2, [r3, #4]	@ movhi
-	ldr	r2, .L624+28
-	strh	r1, [r3, #40]	@ movhi
-	ldrh	r2, [r2, #0]
-	strh	r2, [r3, #8]	@ movhi
-	ldr	r2, .L624+32
-	ldrh	r2, [r2, #0]
-	strh	r2, [r3, #6]	@ movhi
-	ldr	r2, .L624+36
-	ldr	r2, [r2, #0]
-	str	r2, [r3, #12]
-	ldr	r2, .L624+40
-	ldr	r2, [r2, #0]
-	str	r2, [r3, #16]
-	ldr	r2, .L624+4
-	ldr	r2, [r2, #0]
-	str	r2, [r3, #20]
-	ldr	r2, .L624+44
-	ldr	r2, [r2, #0]
-	str	r2, [r3, #24]
-	pop	{r4, r5, r6, r7, r8, pc}
-.L625:
-	.align	2
-.L624:
-	.word	.LANCHOR68
-	.word	.LANCHOR108
-	.word	.LANCHOR109
-	.word	.LANCHOR61
-	.word	.LANCHOR71
-	.word	.LANCHOR102
-	.word	.LANCHOR110
-	.word	.LANCHOR111
-	.word	.LANCHOR70
-	.word	.LANCHOR112
-	.word	.LANCHOR113
-	.word	.LANCHOR114
-	.size	FtlL2PDataInit, .-FtlL2PDataInit
 	.section	.text.ftl_sb_update_avl_pages,"ax",%progbits
 	.align	1
 	.global	ftl_sb_update_avl_pages
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	ftl_sb_update_avl_pages, %function
 ftl_sb_update_avl_pages:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	movs	r3, #0
+	push	{r4, r5, r6, lr}
 	strh	r3, [r0, #4]	@ movhi
-	ldr	r3, .L633
-	push	{r4, r5, r6, r7, lr}
-	movw	r4, #65535
-	ldrh	r3, [r3, #0]
-	b	.L627
-.L629:
-	add	r5, r2, #8
-	ldrh	r5, [r0, r5, lsl #1]
-	cmp	r5, r4
-	beq	.L628
-	ldrh	r5, [r0, #4]
-	adds	r5, r5, #1
-	strh	r5, [r0, #4]	@ movhi
-.L628:
-	adds	r2, r2, #1
-	uxth	r2, r2
-.L627:
-	cmp	r2, r3
-	bcc	.L629
-	ldr	r2, .L633+4
-	mov	r4, r0
-	movw	r5, #65535
-	mvns	r1, r1
-	ldrh	r6, [r2, #0]
-	movs	r2, #0
-	b	.L630
-.L632:
-	ldrh	r7, [r4, #16]
-	cmp	r7, r5
-	beq	.L631
-	ldrh	r7, [r0, #4]
-	adds	r7, r6, r7
-	adds	r7, r7, r1
-	strh	r7, [r0, #4]	@ movhi
-.L631:
+	movw	r6, #65535
+	ldr	r3, .L639
+	ldrh	r4, [r3]
+	add	r3, r0, r2, lsl #1
+	adds	r3, r3, #14
+.L633:
+	cmp	r2, r4
+	bcc	.L635
+	ldr	r3, .L639+4
+	add	r5, r0, #16
+	movw	r6, #65535
+	ldrh	r3, [r3]
+	subs	r3, r3, #1
+	subs	r1, r3, r1
+	movs	r3, #0
+	uxth	r1, r1
+.L636:
+	uxth	r2, r3
+	cmp	r4, r2
+	bhi	.L638
+	pop	{r4, r5, r6, pc}
+.L635:
+	ldrh	r5, [r3, #2]!
 	adds	r2, r2, #1
-	adds	r4, r4, #2
 	uxth	r2, r2
-.L630:
-	cmp	r2, r3
-	bne	.L632
-	pop	{r4, r5, r6, r7, pc}
-.L634:
+	cmp	r5, r6
+	ittt	ne
+	ldrhne	r5, [r0, #4]
+	addne	r5, r5, #1
+	strhne	r5, [r0, #4]	@ movhi
+	b	.L633
+.L638:
+	ldrh	r2, [r5], #2
+	adds	r3, r3, #1
+	cmp	r2, r6
+	ittt	ne
+	ldrhne	r2, [r0, #4]
+	addne	r2, r2, r1
+	strhne	r2, [r0, #4]	@ movhi
+	b	.L636
+.L640:
 	.align	2
-.L633:
-	.word	.LANCHOR41
-	.word	.LANCHOR56
+.L639:
+	.word	.LANCHOR36
+	.word	.LANCHOR51
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
 	.section	.text.make_superblock,"ax",%progbits
 	.align	1
 	.global	make_superblock
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	make_superblock, %function
 make_superblock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L642
-	ldrh	r2, [r0, #0]
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	ldr	r3, .L654
+	ldrh	r2, [r0]
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-	ldrh	r3, [r3, #0]
+	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L636
-	ldr	r1, .L642+4
+	bcc	.L642
+	ldr	r1, .L654+4
 	movw	r2, #2296
-	ldr	r0, .L642+8
+	ldr	r0, .L654+8
 	bl	printf
-	ldr	r0, .L642+12
-	ldr	r1, .L642+16
+	ldr	r1, .L654+12
+	ldr	r0, .L654+16
 	bl	printf
-.L636:
+.L642:
+	ldr	r3, .L654+20
+	add	r6, r4, #16
+	ldr	r10, .L654+40
+	movw	r7, #65535
 	movs	r5, #0
-	ldr	r8, .L642+40
+	ldrh	r8, [r3]
 	strh	r5, [r4, #4]	@ movhi
-	movw	r6, #65535
 	strb	r5, [r4, #7]
-	ldr	r7, .L642+20
-	b	.L637
-.L639:
-	ldrb	r0, [r7, r5]	@ zero_extendqisi2
-	add	sl, r5, #8
-	ldrh	r1, [r4, #0]
-	bl	V2P_block
-	strh	r6, [r4, sl, lsl #1]	@ movhi
-	mov	fp, r0
-	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L638
-	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	strh	fp, [r4, sl, lsl #1]	@ movhi
-	adds	r3, r3, #1
-	strb	r3, [r4, #7]
-.L638:
-	adds	r5, r5, #1
-	uxth	r5, r5
-.L637:
-	ldrh	r3, [r8, #0]
-	cmp	r3, r5
-	bhi	.L639
-	ldr	r2, .L642+24
+.L643:
+	uxth	r3, r5
+	cmp	r8, r3
+	bhi	.L645
+	ldr	r2, .L654+24
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	ldrh	r2, [r2, #0]
-	muls	r3, r2, r3
+	ldrh	r2, [r2]
+	smulbb	r3, r3, r2
 	strh	r3, [r4, #4]	@ movhi
 	movs	r3, #0
 	strb	r3, [r4, #9]
-	ldr	r3, .L642+28
-	ldr	r3, [r3, #0]
-	cbz	r3, .L640
-	ldr	r3, .L642+32
-	ldrh	r2, [r4, #0]
-	ldr	r3, [r3, #0]
+	ldr	r3, .L654+28
+	ldr	r3, [r3]
+	cbz	r3, .L646
+	ldr	r3, .L654+32
+	ldrh	r2, [r4]
+	ldr	r3, [r3]
 	ldrh	r3, [r3, r2, lsl #1]
 	cmp	r3, #59
-	bhi	.L640
-	movs	r3, #1
-	strb	r3, [r4, #9]
-.L640:
-	ldr	r3, .L642+36
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L641
+	itt	ls
+	movls	r3, #1
+	strbls	r3, [r4, #9]
+.L646:
+	ldr	r3, .L654+36
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L647
 	movs	r3, #1
 	strb	r3, [r4, #9]
-.L641:
+.L647:
 	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L643:
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L645:
+	ldrh	r1, [r4]
+	ldrb	r0, [r10, r5]	@ zero_extendqisi2
+	bl	V2P_block
+	strh	r7, [r6]	@ movhi
+	mov	fp, r0
+	bl	FtlBbmIsBadBlock
+	cbnz	r0, .L644
+	strh	fp, [r6]	@ movhi
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	strb	r3, [r4, #7]
+.L644:
+	adds	r5, r5, #1
+	adds	r6, r6, #2
+	b	.L643
+.L655:
 	.align	2
-.L642:
-	.word	.LANCHOR43
-	.word	.LANCHOR115
-	.word	.LC3
+.L654:
+	.word	.LANCHOR38
+	.word	.LANCHOR100
 	.word	.LC4
 	.word	.LC5
-	.word	.LANCHOR50
-	.word	.LANCHOR56
-	.word	.LANCHOR116
-	.word	.LANCHOR84
-	.word	.LANCHOR0
-	.word	.LANCHOR41
+	.word	.LC6
+	.word	.LANCHOR36
+	.word	.LANCHOR51
+	.word	.LANCHOR101
+	.word	.LANCHOR77
+	.word	.LANCHOR1
+	.word	.LANCHOR45
 	.size	make_superblock, .-make_superblock
-	.section	.text.SupperBlkListInit,"ax",%progbits
+	.section	.text.update_multiplier_value,"ax",%progbits
 	.align	1
-	.global	SupperBlkListInit
+	.global	update_multiplier_value
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	SupperBlkListInit, %function
-SupperBlkListInit:
-	@ args = 0, pretend = 0, frame = 8
+	.fpu softvfp
+	.type	update_multiplier_value, %function
+update_multiplier_value:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L655
-	ldr	r3, .L655+4
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	movs	r1, #0
-	ldrh	r3, [r3, #0]
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
 	movs	r5, #0
-	ldr	r0, [r2, #0]
-	movs	r2, #6
-	muls	r2, r3, r2
+	ldr	r3, .L662
+	mov	r6, r0
 	mov	r4, r5
-	bl	memset
-	ldr	r3, .L655+8
-	mov	r8, r5
-	mov	sl, r5
-	str	r5, [r3, #0]
-	ldr	r3, .L655+12
-	str	r5, [r3, #0]
-	ldr	r3, .L655+16
-	str	r5, [r3, #0]
-	ldr	r3, .L655+20
-	strh	r5, [r3, #0]	@ movhi
-	ldr	r3, .L655+24
-	strh	r5, [r3, #0]	@ movhi
-	ldr	r3, .L655+28
-	strh	r5, [r3, #0]	@ movhi
-	b	.L645
-.L647:
-	ldr	r2, .L655+32
+	ldr	r10, .L662+12
+	ldrh	r7, [r3]
+	ldr	r3, .L662+4
+	ldrh	r8, [r3]
+.L657:
+	uxth	r3, r5
+	cmp	r7, r3
+	bhi	.L659
+	cbz	r4, .L661
 	mov	r1, r4
-	ldrb	r0, [r2, r7]	@ zero_extendqisi2
-	str	ip, [sp, #4]
-	bl	V2P_block
-	bl	FtlBbmIsBadBlock
-	ldr	ip, [sp, #4]
-	cbnz	r0, .L646
-	ldrh	r2, [fp, #0]
-	adds	r6, r6, r2
-	uxth	r6, r6
-.L646:
-	adds	r7, r7, #1
-	b	.L652
-.L654:
-	movs	r7, #0
-	uxth	r3, r4
-	ldr	fp, .L655+76
-	mov	ip, r4
-	mov	r6, r7
-	mov	r4, r3
-.L652:
-	ldr	r3, .L655+36
-	ldrh	r2, [r3, #0]
-	cmp	r7, r2
-	blt	.L647
-	mov	r4, ip
-	cbz	r6, .L648
-	sxth	r1, r6
 	mov	r0, #32768
 	bl	__aeabi_idiv
-	uxth	r6, r0
-	b	.L649
-.L648:
-	ldr	r3, .L655+40
-	movw	r2, #65535
-	ldr	r3, [r3, #0]
-	strh	r2, [r3, ip, lsl #1]	@ movhi
-.L649:
-	ldr	r3, .L655
-	ldr	r3, [r3, #0]
-	adds	r3, r3, r5
-	strh	r6, [r3, #4]	@ movhi
-	ldr	r3, .L655+44
-	ldrh	r3, [r3, #0]
-	cmp	r4, r3
-	beq	.L650
-	ldr	r3, .L655+48
-	ldrh	r3, [r3, #0]
-	cmp	r4, r3
-	beq	.L650
-	ldr	r3, .L655+52
-	ldrh	r3, [r3, #0]
-	cmp	r4, r3
-	beq	.L650
-	ldr	r3, .L655+40
-	uxth	r0, r4
-	ldr	r3, [r3, #0]
-	ldrh	r3, [r3, r4, lsl #1]
-	cbnz	r3, .L651
-	add	r8, r8, #1
-	uxth	r8, r8
-	bl	INSERT_FREE_LIST
-	b	.L650
-.L651:
-	add	sl, sl, #1
-	uxth	sl, sl
-	bl	INSERT_DATA_LIST
-.L650:
-	adds	r4, r4, #1
-	adds	r5, r5, #6
-.L645:
-	ldr	r2, .L655+56
-	ldrh	r3, [r2, #0]
-	cmp	r4, r3
-	blt	.L654
-	ldr	r2, .L655+20
-	strh	sl, [r2, #0]	@ movhi
-	ldr	r2, .L655+24
-	strh	r8, [r2, #0]	@ movhi
-	add	r8, sl, r8
-	cmp	r8, r3
-	ble	.L653
-	ldr	r1, .L655+60
-	movw	r2, #2366
-	ldr	r0, .L655+64
-	bl	printf
-	ldr	r0, .L655+68
-	ldr	r1, .L655+72
-	bl	printf
-.L653:
-	movs	r0, #0
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L656:
-	.align	2
-.L655:
-	.word	.LANCHOR87
-	.word	.LANCHOR44
-	.word	.LANCHOR93
-	.word	.LANCHOR88
-	.word	.LANCHOR90
-	.word	.LANCHOR91
-	.word	.LANCHOR94
-	.word	.LANCHOR117
-	.word	.LANCHOR50
-	.word	.LANCHOR41
-	.word	.LANCHOR89
-	.word	.LANCHOR97
-	.word	.LANCHOR98
-	.word	.LANCHOR99
-	.word	.LANCHOR43
-	.word	.LANCHOR118
-	.word	.LC3
-	.word	.LC4
-	.word	.LC5
-	.word	.LANCHOR56
-	.size	SupperBlkListInit, .-SupperBlkListInit
-	.section	.text.update_multiplier_value,"ax",%progbits
-	.align	1
-	.global	update_multiplier_value
-	.thumb
-	.thumb_func
-	.type	update_multiplier_value, %function
-update_multiplier_value:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, r8, sl, lr}
-	movs	r4, #0
-	mov	r6, r0
-	mov	r5, r4
-	ldr	sl, .L662+8
-	ldr	r8, .L662+12
-	ldr	r7, .L662
-	b	.L658
 .L660:
+	ldr	r3, .L662+8
+	movs	r2, #6
+	ldr	r3, [r3]
+	mla	r6, r2, r6, r3
+	strh	r0, [r6, #4]	@ movhi
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L659:
 	mov	r1, r6
-	ldrb	r0, [r8, r5]	@ zero_extendqisi2
+	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L659
-	ldrh	r3, [r7, #0]
-	adds	r4, r4, r3
+	cbnz	r0, .L658
+	add	r4, r4, r8
 	uxth	r4, r4
-.L659:
-	adds	r5, r5, #1
-	uxth	r5, r5
 .L658:
-	ldrh	r3, [sl, #0]
-	cmp	r3, r5
-	bhi	.L660
-	cbz	r4, .L661
-	mov	r1, r4
-	mov	r0, #32768
-	bl	__aeabi_idiv
-	uxth	r4, r0
+	adds	r5, r5, #1
+	b	.L657
 .L661:
-	ldr	r3, .L662+4
-	movs	r2, #6
-	movs	r0, #0
-	ldr	r3, [r3, #0]
-	mla	r6, r2, r6, r3
-	strh	r4, [r6, #4]	@ movhi
-	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
+	mov	r0, r4
+	b	.L660
 .L663:
 	.align	2
 .L662:
-	.word	.LANCHOR56
-	.word	.LANCHOR87
-	.word	.LANCHOR41
-	.word	.LANCHOR50
+	.word	.LANCHOR36
+	.word	.LANCHOR51
+	.word	.LANCHOR80
+	.word	.LANCHOR45
 	.size	update_multiplier_value, .-update_multiplier_value
 	.section	.text.GetFreeBlockMinEraseCount,"ax",%progbits
 	.align	1
 	.global	GetFreeBlockMinEraseCount
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	GetFreeBlockMinEraseCount, %function
 GetFreeBlockMinEraseCount:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	ldr	r3, .L667
-	ldr	r0, [r3, #0]
+	ldr	r0, [r3]
 	cbz	r0, .L665
 	ldr	r3, .L667+4
-	ldr	r3, [r3, #0]
+	ldr	r3, [r3]
 	subs	r0, r0, r3
 	ldr	r3, .L667+8
 	asrs	r0, r0, #1
 	muls	r0, r3, r0
 	ldr	r3, .L667+12
+	ldr	r3, [r3]
 	uxth	r0, r0
-	ldr	r3, [r3, #0]
 	ldrh	r0, [r3, r0, lsl #1]
 .L665:
 	bx	lr
 .L668:
 	.align	2
 .L667:
-	.word	.LANCHOR93
-	.word	.LANCHOR87
+	.word	.LANCHOR86
+	.word	.LANCHOR80
 	.word	-1431655765
-	.word	.LANCHOR84
+	.word	.LANCHOR77
 	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
 	.section	.text.GetFreeBlockMaxEraseCount,"ax",%progbits
 	.align	1
 	.global	GetFreeBlockMaxEraseCount
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	GetFreeBlockMaxEraseCount, %function
 GetFreeBlockMaxEraseCount:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L676
+	ldr	r3, .L677
 	push	{r4, r5, r6, lr}
-	ldr	r3, [r3, #0]
+	ldr	r3, [r3]
 	cbz	r3, .L675
-	ldr	r2, .L676+4
-	movs	r1, #7
-	movw	r5, #65535
-	ldrh	r2, [r2, #0]
-	muls	r2, r1, r2
+	ldr	r2, .L677+4
+	movs	r5, #6
+	movw	r6, #65535
+	ldrh	r2, [r2]
+	rsb	r2, r2, r2, lsl #3
 	asrs	r2, r2, #3
 	cmp	r0, r2
 	it	gt
 	uxthgt	r0, r2
-	ldr	r2, .L676+8
-	movs	r6, #6
-	ldr	r1, [r2, #0]
-	ldr	r2, .L676+12
+	ldr	r2, .L677+8
+	ldr	r1, [r2]
+	ldr	r2, .L677+12
 	subs	r3, r3, r1
 	asrs	r3, r3, #1
 	muls	r3, r2, r3
 	movs	r2, #0
 	uxth	r3, r3
-	b	.L672
-.L674:
-	mul	r4, r6, r3
-	ldrh	r4, [r1, r4]
-	cmp	r4, r5
-	beq	.L673
-	adds	r2, r2, #1
-	mov	r3, r4
-	uxth	r2, r2
 .L672:
-	cmp	r2, r0
-	bne	.L674
-.L673:
-	ldr	r2, .L676+16
-	ldr	r2, [r2, #0]
+	uxth	r4, r2
+	cmp	r0, r4
+	bls	.L674
+	mul	r4, r5, r3
+	adds	r2, r2, #1
+	ldrh	r4, [r1, r4]
+	cmp	r4, r6
+	bne	.L676
+.L674:
+	ldr	r2, .L677+16
+	ldr	r2, [r2]
 	ldrh	r0, [r2, r3, lsl #1]
 	pop	{r4, r5, r6, pc}
+.L676:
+	mov	r3, r4
+	b	.L672
 .L675:
 	mov	r0, r3
 	pop	{r4, r5, r6, pc}
-.L677:
+.L678:
 	.align	2
-.L676:
-	.word	.LANCHOR93
-	.word	.LANCHOR94
+.L677:
+	.word	.LANCHOR86
 	.word	.LANCHOR87
+	.word	.LANCHOR80
 	.word	-1431655765
-	.word	.LANCHOR84
+	.word	.LANCHOR77
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
 	.section	.text.free_data_superblock,"ax",%progbits
 	.align	1
 	.global	free_data_superblock
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	free_data_superblock, %function
 free_data_superblock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	movw	r2, #65535
-	cmp	r0, r2
 	push	{r3, lr}
-	beq	.L679
-	ldr	r2, .L680
+	cmp	r0, r2
+	beq	.L680
+	ldr	r2, .L681
 	movs	r1, #0
-	ldr	r2, [r2, #0]
+	ldr	r2, [r2]
 	strh	r1, [r2, r0, lsl #1]	@ movhi
 	bl	INSERT_FREE_LIST
-.L679:
+.L680:
 	movs	r0, #0
 	pop	{r3, pc}
-.L681:
+.L682:
 	.align	2
-.L680:
-	.word	.LANCHOR89
+.L681:
+	.word	.LANCHOR82
 	.size	free_data_superblock, .-free_data_superblock
 	.section	.text.FtlGcBufInit,"ax",%progbits
 	.align	1
 	.global	FtlGcBufInit
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FtlGcBufInit, %function
 FtlGcBufInit:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L687
-	movs	r2, #0
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r4, r2
-	str	r2, [r3, #0]
-	ldr	r3, .L687+4
-	ldrh	ip, [r3, #0]
-	ldr	r3, .L687+8
-	ldr	r7, [r3, #0]
-	ldr	r3, .L687+12
-	ldr	r6, [r3, #0]
-	ldr	r3, .L687+16
-	ldr	r1, [r3, #0]
-	ldr	r3, .L687+20
-	ldrh	r5, [r3, #0]
-	ldr	r3, .L687+24
-	str	r5, [sp, #4]
-	ldrh	fp, [r3, #0]
-	ldr	r3, .L687+28
-	ldr	r0, [r3, #0]
-	mov	r3, r2
-	b	.L683
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r3, #0
+	ldr	r1, .L688
+	mov	fp, #1
+	ldr	r2, .L688+4
+	ldr	r5, [r1]
+	ldr	r1, .L688+8
+	str	r3, [r2]
+	ldr	r2, .L688+12
+	mov	r0, r5
+	ldr	r1, [r1]
+	ldrh	r2, [r2]
+	str	r1, [sp, #4]
+	ldr	r1, .L688+16
+	ldrh	r1, [r1]
+	str	r1, [sp]
+	ldr	r1, .L688+20
+	ldr	r10, [r1]
+	ldr	r1, .L688+24
+	ldrh	r7, [r1]
+	ldr	r1, .L688+28
+	ldr	r4, [r1]
+	movs	r1, #12
+	mla	r1, r2, r1, r1
+	adds	r4, r4, #8
+	add	r8, r5, r1
+	mov	r1, r3
 .L684:
-	movs	r5, #1
-	bic	r4, r4, #3
-	adds	r3, r3, r5
-	bic	r2, r2, #3
-	adds	r4, r7, r4
-	adds	r2, r6, r2
-	str	r4, [r1, #-12]
-	uxth	r3, r3
-	str	r2, [r1, #-8]
-	str	r5, [r1, #-4]
-	str	r4, [r0, #-28]
-	mov	r4, r8
-	str	r2, [r0, #-24]
-	mov	r2, sl
-.L683:
-	adds	r1, r1, #12
-	ldr	r5, [sp, #4]
-	adds	r0, r0, #36
-	cmp	r3, ip
-	add	r8, r4, r5
-	add	sl, r2, fp
-	bne	.L684
-	ldr	r1, .L687+8
-	movs	r4, #12
-	ldr	r2, .L687+32
-	mov	fp, #0
-	ldr	ip, [r1, #0]
-	ldr	r1, .L687+20
-	ldr	r8, [r2, #0]
-	ldr	r2, .L687+16
-	ldrh	r7, [r1, #0]
-	ldr	r1, .L687+12
-	ldr	r2, [r2, #0]
-	ldr	r6, [r1, #0]
-	ldr	r1, .L687+24
-	ldrh	r5, [r1, #0]
-	b	.L685
+	adds	r0, r0, #12
+	ldr	r6, [sp]
+	cmp	r0, r8
+	add	ip, r3, r7
+	add	r4, r4, #36
+	add	lr, r1, r6
+	bne	.L685
+	ldr	r3, .L688+32
+	mov	lr, #12
+	mov	r8, #0
+	ldr	r0, [r3]
+	ldr	r3, .L688+8
+	ldr	r4, [r3]
+	ldr	r3, .L688+20
+	ldr	ip, [r3]
 .L686:
-	mul	r1, r4, r3
-	mul	r0, r7, r3
-	add	sl, r2, r1
-	bic	r0, r0, #3
-	str	fp, [sl, #8]
-	add	r0, ip, r0
-	str	r0, [r2, r1]
-	mul	r1, r5, r3
-	adds	r3, r3, #1
-	uxth	r3, r3
-	bic	r1, r1, #3
-	adds	r1, r6, r1
-	str	r1, [sl, #4]
+	cmp	r2, r0
+	bcc	.L687
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
 .L685:
-	cmp	r3, r8
-	bcc	.L686
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L688:
-	.align	2
+	bic	r1, r1, #3
+	bic	r3, r3, #3
+	mov	r6, r1
+	ldr	r1, [sp, #4]
+	add	r3, r3, r10
+	str	fp, [r0, #-4]
+	str	r3, [r0, #-8]
+	add	r6, r6, r1
+	mov	r1, lr
+	str	r6, [r0, #-12]
+	str	r3, [r4, #-32]
+	mov	r3, ip
+	str	r6, [r4, #-36]
+	b	.L684
 .L687:
-	.word	.LANCHOR119
-	.word	.LANCHOR41
-	.word	.LANCHOR120
-	.word	.LANCHOR121
-	.word	.LANCHOR122
-	.word	.LANCHOR61
-	.word	.LANCHOR62
-	.word	.LANCHOR123
-	.word	.LANCHOR124
+	ldr	r3, [sp]
+	mul	r10, lr, r2
+	muls	r3, r2, r3
+	add	r1, r5, r10
+	str	r8, [r1, #8]
+	bic	r3, r3, #3
+	add	r3, r3, r4
+	str	r3, [r5, r10]
+	mul	r3, r2, r7
+	adds	r2, r2, #1
+	uxth	r2, r2
+	bic	r3, r3, #3
+	add	r3, r3, ip
+	str	r3, [r1, #4]
+	b	.L686
+.L689:
+	.align	2
+.L688:
+	.word	.LANCHOR103
+	.word	.LANCHOR102
+	.word	.LANCHOR104
+	.word	.LANCHOR36
+	.word	.LANCHOR56
+	.word	.LANCHOR105
+	.word	.LANCHOR57
+	.word	.LANCHOR106
+	.word	.LANCHOR107
 	.size	FtlGcBufInit, .-FtlGcBufInit
-	.section	.text.FtlVariablesInit,"ax",%progbits
+	.section	.text.FtlGcBufFree,"ax",%progbits
 	.align	1
-	.global	FtlVariablesInit
+	.global	FtlGcBufFree
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlVariablesInit, %function
-FtlVariablesInit:
+	.fpu softvfp
+	.type	FtlGcBufFree, %function
+FtlGcBufFree:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
+	ldr	r3, .L697
+	mov	ip, #12
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r3, .L690
-	movw	r2, #65535
-	ldr	r5, .L690+4
-	mov	r1, r4
-	str	r4, [r3, #0]
-	ldr	r3, .L690+8
-	strh	r2, [r3, #0]	@ movhi
-	mov	r2, #-1
-	ldr	r3, .L690+12
-	str	r4, [r3, #0]
-	ldr	r3, .L690+16
-	str	r4, [r3, #0]
-	ldr	r3, .L690+20
-	str	r2, [r3, #0]
-	ldr	r3, .L690+24
-	str	r4, [r3, #0]
-	ldr	r3, .L690+28
-	strh	r4, [r3, #0]	@ movhi
-	ldr	r3, .L690+32
-	ldrh	r2, [r3, #0]
-	ldr	r3, .L690+36
-	lsls	r2, r2, #1
-	ldr	r0, [r3, #0]
-	bl	memset
-	ldrh	r2, [r5, #0]
-	ldr	r3, .L690+40
-	mov	r1, r4
-	lsls	r2, r2, #1
-	ldr	r0, [r3, #0]
-	bl	memset
-	ldr	r3, .L690+44
-	ldrh	r2, [r5, #0]
-	mov	r1, r4
-	ldr	r0, [r3, #0]
-	lsls	r2, r2, #1
-	bl	memset
-	mov	r1, r4
-	movs	r2, #48
-	ldr	r0, .L690+48
-	bl	memset
-	mov	r1, r4
-	mov	r2, #512
-	ldr	r0, .L690+52
-	bl	memset
-	bl	FtlGcBufInit
-	bl	FtlL2PDataInit
-	mov	r0, r4
-	pop	{r3, r4, r5, pc}
+	mov	fp, #36
+	mov	lr, r4
+	ldr	r7, [r3]
+	ldr	r3, .L697+4
+	ldr	r5, [r3]
 .L691:
-	.align	2
+	uxth	r3, r4
+	cmp	r1, r3
+	bls	.L690
+	mla	r8, fp, r3, r0
+	movs	r2, #0
+.L692:
+	uxth	r3, r2
+	cmp	r7, r3
+	bls	.L693
+	mul	r3, ip, r3
+	ldr	r6, [r8, #8]
+	adds	r2, r2, #1
+	add	r10, r5, r3
+	ldr	r3, [r5, r3]
+	cmp	r3, r6
+	bne	.L692
+	str	lr, [r10, #8]
+.L693:
+	adds	r4, r4, #1
+	b	.L691
 .L690:
-	.word	.LANCHOR125
-	.word	.LANCHOR44
-	.word	.LANCHOR126
-	.word	.LANCHOR127
-	.word	.LANCHOR128
-	.word	.LANCHOR129
-	.word	.LANCHOR116
-	.word	.LANCHOR74
-	.word	.LANCHOR65
-	.word	.LANCHOR75
-	.word	.LANCHOR84
-	.word	.LANCHOR130
-	.word	.LANCHOR131
-	.word	.LANCHOR132
-	.size	FtlVariablesInit, .-FtlVariablesInit
-	.section	.text.FtlGcBufFree,"ax",%progbits
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L698:
+	.align	2
+.L697:
+	.word	.LANCHOR107
+	.word	.LANCHOR103
+	.size	FtlGcBufFree, .-FtlGcBufFree
+	.section	.text.FtlGcBufAlloc,"ax",%progbits
 	.align	1
-	.global	FtlGcBufFree
+	.global	FtlGcBufAlloc
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlGcBufFree, %function
-FtlGcBufFree:
+	.fpu softvfp
+	.type	FtlGcBufAlloc, %function
+FtlGcBufAlloc:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L699
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	movs	r5, #36
-	ldr	r6, [r3, #0]
-	ldr	r3, .L699+4
-	ldr	r4, [r3, #0]
-	movs	r3, #0
-	mov	fp, r3
-	b	.L693
-.L696:
+	ldr	r3, .L706
+	movs	r2, #0
+	push	{r4, r5, r6, r7, r8, r10, lr}
 	mov	ip, #12
-	mul	r3, ip, r2
-	add	sl, r4, r3
-	ldr	ip, [r4, r3]
-	ldr	r3, [r7, #8]
-	cmp	ip, r3
-	bne	.L694
-	mov	r3, r8
-	str	fp, [sl, #8]
-	b	.L695
-.L694:
-	adds	r2, r2, #1
-	uxth	r2, r2
-.L698:
-	cmp	r2, r6
-	bcc	.L696
-	mov	r3, r8
-.L695:
-	adds	r3, r3, #1
-	uxth	r3, r3
-.L693:
-	cmp	r3, r1
-	bcs	.L692
-	mla	r7, r5, r3, r0
-	movs	r2, #0
-	mov	r8, r3
-	b	.L698
-.L692:
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+	movs	r7, #1
+	mov	lr, #36
+	ldr	r4, [r3]
+	ldr	r3, .L706+4
+	ldr	r5, [r3]
 .L700:
-	.align	2
-.L699:
-	.word	.LANCHOR124
-	.word	.LANCHOR122
-	.size	FtlGcBufFree, .-FtlGcBufFree
-	.section	.text.FtlGcBufAlloc,"ax",%progbits
-	.align	1
-	.global	FtlGcBufAlloc
-	.thumb
-	.thumb_func
-	.type	FtlGcBufAlloc, %function
-FtlGcBufAlloc:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L708
-	push	{r4, r5, r6, r7, r8, sl, lr}
-	movs	r7, #12
-	ldr	r8, [r3, #0]
-	movs	r6, #1
-	ldr	r3, .L708+4
-	movs	r5, #36
-	ldr	ip, [r3, #0]
-	movs	r3, #0
-	b	.L702
-.L705:
-	mla	r4, r7, r2, ip
-	ldr	sl, [r4, #8]
-	cmp	sl, #0
-	bne	.L703
-	mla	r2, r5, r3, r0
-	str	r6, [r4, #8]
-	ldr	sl, [r4, #0]
-	ldr	r4, [r4, #4]
-	str	sl, [r2, #8]
-	str	r4, [r2, #12]
-	b	.L704
-.L703:
-	adds	r2, r2, #1
-	uxth	r2, r2
-	b	.L706
-.L707:
-	movs	r2, #0
-.L706:
-	cmp	r2, r8
-	bcc	.L705
+	uxth	r8, r2
+	cmp	r1, r8
+	bhi	.L704
+	pop	{r4, r5, r6, r7, r8, r10, pc}
 .L704:
-	adds	r3, r3, #1
-	uxth	r3, r3
+	mov	r10, #0
+.L701:
+	uxth	r3, r10
+	cmp	r4, r3
+	bls	.L702
+	mla	r3, ip, r3, r5
+	add	r10, r10, #1
+	ldr	r6, [r3, #8]
+	cmp	r6, #0
+	bne	.L701
+	mla	r8, lr, r8, r0
+	str	r7, [r3, #8]
+	ldr	r6, [r3]
+	ldr	r3, [r3, #4]
+	str	r6, [r8, #8]
+	str	r3, [r8, #12]
 .L702:
-	cmp	r3, r1
-	bcc	.L707
-	pop	{r4, r5, r6, r7, r8, sl, pc}
-.L709:
+	adds	r2, r2, #1
+	b	.L700
+.L707:
 	.align	2
-.L708:
-	.word	.LANCHOR124
-	.word	.LANCHOR122
+.L706:
+	.word	.LANCHOR107
+	.word	.LANCHOR103
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
 	.section	.text.IsBlkInGcList,"ax",%progbits
 	.align	1
 	.global	IsBlkInGcList
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	IsBlkInGcList, %function
 IsBlkInGcList:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L715
-	push	{r4, lr}
-	ldrh	r1, [r3, #0]
-	ldr	r3, .L715+4
-	ldr	r2, [r3, #0]
-	movs	r3, #0
-	b	.L711
-.L713:
-	ldrh	r4, [r2], #2
-	cmp	r4, r0
-	beq	.L714
-	adds	r3, r3, #1
-	uxth	r3, r3
-.L711:
-	cmp	r3, r1
-	bne	.L713
+	@ link register save eliminated.
+	ldr	r3, .L713
+	ldr	r2, .L713+4
+	ldr	r3, [r3]
+	ldrh	r2, [r2]
+	add	r2, r3, r2, lsl #1
+.L709:
+	cmp	r3, r2
+	bne	.L711
 	movs	r0, #0
-	pop	{r4, pc}
-.L714:
+	bx	lr
+.L711:
+	ldrh	r1, [r3], #2
+	cmp	r1, r0
+	bne	.L709
 	movs	r0, #1
-	pop	{r4, pc}
-.L716:
+	bx	lr
+.L714:
 	.align	2
-.L715:
-	.word	.LANCHOR133
-	.word	.LANCHOR134
+.L713:
+	.word	.LANCHOR108
+	.word	.LANCHOR109
 	.size	IsBlkInGcList, .-IsBlkInGcList
 	.section	.text.FtlGcUpdatePage,"ax",%progbits
 	.align	1
 	.global	FtlGcUpdatePage
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FtlGcUpdatePage, %function
 FtlGcUpdatePage:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
-	mov	r4, r0
+	mov	r5, r0
+	ldr	r4, .L719
 	ubfx	r0, r0, #10, #16
-	mov	r5, r1
-	mov	r6, r2
+	mov	r6, r1
+	mov	r7, r2
 	bl	P2V_block_in_plane
-	ldr	r3, .L721
-	ldrh	r7, [r3, #0]
-	ldr	r3, .L721+4
-	ldr	r2, [r3, #0]
+	ldr	r3, .L719+4
+	ldrh	r1, [r4]
+	ldr	r2, [r3]
 	movs	r3, #0
-	mov	r1, r2
-	b	.L718
-.L720:
-	ldrh	ip, [r1], #2
-	cmp	ip, r0
-	beq	.L719
+.L716:
+	uxth	ip, r3
+	cmp	ip, r1
+	bcc	.L718
+	bne	.L717
+	strh	r0, [r2, ip, lsl #1]	@ movhi
+	ldrh	r3, [r4]
 	adds	r3, r3, #1
-	uxth	r3, r3
+	strh	r3, [r4]	@ movhi
+	b	.L717
 .L718:
-	cmp	r3, r7
-	bne	.L720
-	strh	r0, [r2, r3, lsl #1]	@ movhi
-	ldr	r3, .L721
-	ldrh	r2, [r3, #0]
-	adds	r2, r2, #1
-	strh	r2, [r3, #0]	@ movhi
-.L719:
-	ldr	r0, .L721+8
-	movs	r1, #12
-	ldr	r3, .L721+12
-	ldr	r0, [r0, #0]
-	ldrh	r2, [r3, #0]
-	muls	r1, r2, r1
-	adds	r7, r0, r1
-	str	r4, [r0, r1]
-	adds	r2, r2, #1
-	str	r5, [r7, #4]
-	str	r6, [r7, #8]
-	strh	r2, [r3, #0]	@ movhi
+	adds	r3, r3, #1
+	add	ip, r2, r3, lsl #1
+	ldrh	ip, [ip, #-2]
+	cmp	ip, r0
+	bne	.L716
+.L717:
+	ldr	r2, .L719+8
+	movs	r0, #12
+	ldr	r1, .L719+12
+	ldrh	r3, [r2]
+	ldr	r1, [r1]
+	muls	r0, r3, r0
+	adds	r3, r3, #1
+	adds	r4, r1, r0
+	str	r6, [r4, #4]
+	str	r7, [r4, #8]
+	str	r5, [r1, r0]
+	strh	r3, [r2]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.L722:
+.L720:
 	.align	2
-.L721:
-	.word	.LANCHOR133
-	.word	.LANCHOR134
-	.word	.LANCHOR136
-	.word	.LANCHOR135
+.L719:
+	.word	.LANCHOR109
+	.word	.LANCHOR108
+	.word	.LANCHOR110
+	.word	.LANCHOR111
 	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
-	.section	.text.FtlGcPageVarInit,"ax",%progbits
+	.section	.text.FtlGcRefreshBlock,"ax",%progbits
 	.align	1
-	.global	FtlGcPageVarInit
+	.global	FtlGcRefreshBlock
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlGcPageVarInit, %function
-FtlGcPageVarInit:
+	.fpu softvfp
+	.type	FtlGcRefreshBlock, %function
+FtlGcRefreshBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L724
-	movs	r3, #0
-	push	{r4, lr}
-	movs	r1, #255
-	strh	r3, [r2, #0]	@ movhi
-	ldr	r4, .L724+4
-	ldr	r2, .L724+8
-	strh	r3, [r2, #0]	@ movhi
-	ldrh	r2, [r4, #0]
-	ldr	r3, .L724+12
-	lsls	r2, r2, #1
-	ldr	r0, [r3, #0]
-	bl	memset
-	ldr	r2, .L724+16
-	ldrh	r3, [r4, #0]
-	movs	r1, #255
-	ldr	r0, [r2, #0]
-	movs	r2, #12
-	muls	r2, r3, r2
-	bl	memset
-	pop	{r4, lr}
-	b	FtlGcBufInit
+	push	{r4, r5, lr}
+	ldr	r4, .L724
+	ldrh	r5, [r4]
+	cmp	r5, r0
+	beq	.L722
+	ldr	r3, .L724+4
+	ldrh	r1, [r3]
+	cmp	r0, r1
+	beq	.L722
+	movw	r2, #65535
+	cmp	r5, r2
+	bne	.L723
+	strh	r0, [r4]	@ movhi
+.L722:
+	movs	r0, #0
+	pop	{r4, r5, pc}
+.L723:
+	cmp	r1, r2
+	it	eq
+	strheq	r0, [r3]	@ movhi
+	b	.L722
 .L725:
 	.align	2
 .L724:
-	.word	.LANCHOR133
-	.word	.LANCHOR58
-	.word	.LANCHOR135
-	.word	.LANCHOR134
-	.word	.LANCHOR136
-	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
+	.word	.LANCHOR112
+	.word	.LANCHOR113
+	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
 	.section	.text.FtlGcRefreshOpenBlock,"ax",%progbits
 	.align	1
 	.global	FtlGcRefreshOpenBlock
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FtlGcRefreshOpenBlock, %function
 FtlGcRefreshOpenBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, lr}
-	ldr	r4, .L729
-	ldrh	r5, [r4, #0]
-	cmp	r5, r0
-	beq	.L727
-	ldr	r3, .L729+4
-	ldrh	r1, [r3, #0]
-	cmp	r1, r0
-	beq	.L727
-	movw	r2, #65535
-	cmp	r5, r2
-	bne	.L728
-	strh	r0, [r4, #0]	@ movhi
-	b	.L727
-.L728:
-	cmp	r1, r2
-	it	eq
-	strheq	r0, [r3, #0]	@ movhi
-.L727:
-	movs	r0, #0
-	pop	{r4, r5, pc}
-.L730:
-	.align	2
-.L729:
-	.word	.LANCHOR137
-	.word	.LANCHOR138
+	@ link register save eliminated.
+	b	FtlGcRefreshBlock
 	.size	FtlGcRefreshOpenBlock, .-FtlGcRefreshOpenBlock
-	.section	.text.FtlGcRefreshBlock,"ax",%progbits
-	.align	1
-	.global	FtlGcRefreshBlock
-	.thumb
-	.thumb_func
-	.type	FtlGcRefreshBlock, %function
-FtlGcRefreshBlock:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, lr}
-	ldr	r4, .L734
-	ldrh	r5, [r4, #0]
-	cmp	r5, r0
-	beq	.L732
-	ldr	r3, .L734+4
-	ldrh	r1, [r3, #0]
-	cmp	r1, r0
-	beq	.L732
-	movw	r2, #65535
-	cmp	r5, r2
-	bne	.L733
-	strh	r0, [r4, #0]	@ movhi
-	b	.L732
-.L733:
-	cmp	r1, r2
-	it	eq
-	strheq	r0, [r3, #0]	@ movhi
-.L732:
-	movs	r0, #0
-	pop	{r4, r5, pc}
-.L735:
-	.align	2
-.L734:
-	.word	.LANCHOR137
-	.word	.LANCHOR138
-	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
 	.section	.text.FtlGcMarkBadPhyBlk,"ax",%progbits
 	.align	1
 	.global	FtlGcMarkBadPhyBlk
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FtlGcMarkBadPhyBlk, %function
 FtlGcMarkBadPhyBlk:
 	@ args = 0, pretend = 0, frame = 0
@@ -5979,99 +5109,101 @@ FtlGcMarkBadPhyBlk:
 	bl	P2V_block_in_plane
 	mov	r5, r0
 	bl	FtlGcRefreshBlock
-	ldr	r3, .L741
-	ldr	r3, [r3, #0]
-	cbz	r3, .L737
-	ldr	r3, .L741+4
-	ldr	r3, [r3, #0]
-	ldrh	r2, [r3, r5, lsl #1]
-	cmp	r2, #29
-	bls	.L737
-	subs	r2, r2, #30
-	strh	r2, [r3, r5, lsl #1]	@ movhi
-.L737:
-	ldr	r3, .L741+8
-	ldr	r2, .L741+12
-	ldrh	r1, [r3, #0]
-	movs	r3, #0
-	b	.L738
-.L740:
-	ldrh	r0, [r2, #2]!
-	cmp	r0, r4
-	beq	.L739
-	adds	r3, r3, #1
-	uxth	r3, r3
-.L738:
-	cmp	r3, r1
-	bne	.L740
+	ldr	r3, .L735
+	ldr	r3, [r3]
+	cbz	r3, .L728
+	ldr	r3, .L735+4
+	ldr	r2, [r3]
+	ldrh	r3, [r2, r5, lsl #1]
+	cmp	r3, #29
+	itt	hi
+	subhi	r3, r3, #30
+	strhhi	r3, [r2, r5, lsl #1]	@ movhi
+.L728:
+	ldr	r2, .L735+8
+	movs	r1, #0
+	ldr	r5, .L735+12
+	ldrh	r3, [r2]
+.L729:
+	uxth	r0, r1
+	cmp	r3, r0
+	bhi	.L731
 	cmp	r3, #15
-	bhi	.L739
-	ldr	r2, .L741+16
-	strh	r4, [r2, r3, lsl #1]	@ movhi
-	adds	r3, r3, #1
-	ldr	r2, .L741+8
-	strh	r3, [r2, #0]	@ movhi
-.L739:
+	itttt	ls
+	addls	r1, r3, #1
+	strhls	r1, [r2]	@ movhi
+	ldrls	r2, .L735+12
+	strhls	r4, [r2, r3, lsl #1]	@ movhi
+	b	.L730
+.L731:
+	adds	r1, r1, #1
+	add	r0, r5, r1, lsl #1
+	ldrh	r0, [r0, #-2]
+	cmp	r0, r4
+	bne	.L729
+.L730:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L742:
+.L736:
 	.align	2
-.L741:
-	.word	.LANCHOR116
-	.word	.LANCHOR84
-	.word	.LANCHOR139
-	.word	.LANCHOR140-2
-	.word	.LANCHOR140
+.L735:
+	.word	.LANCHOR101
+	.word	.LANCHOR77
+	.word	.LANCHOR114
+	.word	.LANCHOR115
 	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
 	.section	.text.FtlGcReFreshBadBlk,"ax",%progbits
 	.align	1
 	.global	FtlGcReFreshBadBlk
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FtlGcReFreshBadBlk, %function
 FtlGcReFreshBadBlk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L746
+	ldr	r3, .L743
 	push	{r4, lr}
-	ldrh	r3, [r3, #0]
-	cbz	r3, .L744
-	ldr	r2, .L746+4
-	ldrh	r1, [r2, #0]
+	ldrh	r3, [r3]
+	cbz	r3, .L738
+	ldr	r2, .L743+4
+	ldrh	r1, [r2]
 	movw	r2, #65535
 	cmp	r1, r2
-	bne	.L744
-	ldr	r4, .L746+8
-	ldrh	r2, [r4, #0]
+	bne	.L738
+	ldr	r4, .L743+8
+	ldrh	r2, [r4]
 	cmp	r2, r3
-	bcc	.L745
-	movs	r3, #0
-	strh	r3, [r4, #0]	@ movhi
-.L745:
-	ldr	r3, .L746+12
-	ldrh	r2, [r4, #0]
+	itt	cs
+	movcs	r3, #0
+	strhcs	r3, [r4]	@ movhi
+	ldr	r3, .L743+12
+	ldrh	r2, [r4]
 	ldrh	r0, [r3, r2, lsl #1]
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-	ldrh	r3, [r4, #0]
+	ldrh	r3, [r4]
 	adds	r3, r3, #1
-	strh	r3, [r4, #0]	@ movhi
-.L744:
+	strh	r3, [r4]	@ movhi
+.L738:
 	movs	r0, #0
 	pop	{r4, pc}
-.L747:
+.L744:
 	.align	2
-.L746:
-	.word	.LANCHOR139
-	.word	.LANCHOR137
-	.word	.LANCHOR141
-	.word	.LANCHOR140
+.L743:
+	.word	.LANCHOR114
+	.word	.LANCHOR112
+	.word	.LANCHOR116
+	.word	.LANCHOR115
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
 	.section	.text.ftl_memset,"ax",%progbits
 	.align	1
 	.global	ftl_memset
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	ftl_memset, %function
 ftl_memset:
 	@ args = 0, pretend = 0, frame = 0
@@ -6079,14314 +5211,15316 @@ ftl_memset:
 	@ link register save eliminated.
 	b	memset
 	.size	ftl_memset, .-ftl_memset
-	.section	.text.ftl_memcpy,"ax",%progbits
+	.section	.text.BuildFlashLsbPageTable,"ax",%progbits
 	.align	1
-	.global	ftl_memcpy
+	.global	BuildFlashLsbPageTable
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	ftl_memcpy, %function
-ftl_memcpy:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	memcpy
-	.size	ftl_memcpy, .-ftl_memcpy
-	.section	.text.ftl_memcpy32,"ax",%progbits
-	.align	1
-	.global	ftl_memcpy32
-	.thumb
-	.thumb_func
-	.type	ftl_memcpy32, %function
-ftl_memcpy32:
+	.fpu softvfp
+	.type	BuildFlashLsbPageTable, %function
+BuildFlashLsbPageTable:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, lr}
+	mov	r4, r1
+	cbnz	r0, .L747
+	ldr	r3, .L784
+.L748:
+	strh	r0, [r3, r0, lsl #1]	@ movhi
+	adds	r0, r0, #1
+	cmp	r0, #256
+	bne	.L748
+.L754:
+	movs	r1, #255
+	mov	r2, #1024
+	ldr	r0, .L784+4
+	uxth	r4, r4
+	bl	ftl_memset
+	ldr	r1, .L784
 	movs	r3, #0
-	push	{r4, r5, lr}
-	mov	r4, r3
-	b	.L751
-.L752:
-	ldr	r5, [r1, r3]
-	adds	r4, r4, #1
-	str	r5, [r0, r3]
-	adds	r3, r3, #4
-.L751:
+	ldr	r0, .L784+4
+.L749:
+	uxth	r2, r3
 	cmp	r4, r2
-	bne	.L752
-	pop	{r4, r5, pc}
-	.size	ftl_memcpy32, .-ftl_memcpy32
-	.section	.text.NandcCopy1KB,"ax",%progbits
-	.align	1
-	.global	NandcCopy1KB
-	.thumb
-	.thumb_func
-	.type	NandcCopy1KB, %function
-NandcCopy1KB:
-	@ args = 4, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, lr}
-	cmp	r1, #1
-	mov	r4, r2
-	add	r2, r0, #4096
-	ldr	r5, [sp, #16]
-	add	r6, r0, #512
-	add	r2, r2, r4, lsl #9
-	bne	.L754
-	cbz	r3, .L755
-	mov	r0, r2
-	lsls	r2, r3, #30
-	mov	r1, r3
-	bne	.L756
-	mov	r2, #256
-	bl	ftl_memcpy32
-	b	.L755
-.L756:
-	mov	r2, #1024
-	bl	memcpy
+	bhi	.L771
+	pop	{r4, pc}
+.L747:
+	cmp	r0, #1
+	bne	.L750
+	ldr	r1, .L784
+	movs	r3, #0
+.L753:
+	cmp	r3, #3
+	uxth	r2, r3
+	bls	.L751
+	tst	r2, #1
+	ite	ne
+	movne	r0, #3
+	moveq	r0, #2
+	rsb	r2, r0, r2, lsl #1
+	uxth	r2, r2
+.L751:
+	strh	r2, [r1, r3, lsl #1]	@ movhi
+	adds	r3, r3, #1
+	cmp	r3, #256
+	bne	.L753
+	b	.L754
+.L750:
+	cmp	r0, #2
+	bne	.L755
+	ldr	r1, .L784
+	movs	r2, #0
+.L757:
+	uxth	r3, r2
+	cmp	r2, #1
+	ittt	hi
+	lslhi	r3, r3, #1
+	addhi	r3, r3, #-1
+	uxthhi	r3, r3
+	strh	r3, [r1, r2, lsl #1]	@ movhi
+	adds	r2, r2, #1
+	cmp	r2, #256
+	bne	.L757
+	b	.L754
 .L755:
-	cbz	r5, .L753
-	lsrs	r4, r4, #1
-	ldrb	r2, [r5, #1]	@ zero_extendqisi2
-	lsls	r3, r4, #4
-	lsls	r4, r4, #6
-	subs	r4, r4, r3
-	ldrb	r3, [r5, #2]	@ zero_extendqisi2
-	lsls	r3, r3, #16
-	orr	r3, r3, r2, lsl #8
-	ldrb	r2, [r5, #0]	@ zero_extendqisi2
-	orrs	r3, r3, r2
-	ldrb	r2, [r5, #3]	@ zero_extendqisi2
-	orr	r3, r3, r2, lsl #24
-	str	r3, [r6, r4]
-	pop	{r4, r5, r6, pc}
-.L754:
-	cbz	r3, .L758
-	mov	r0, r3
-	lsls	r3, r3, #30
-	mov	r1, r2
-	bne	.L759
-	mov	r2, #256
-	bl	ftl_memcpy32
-	b	.L758
+	cmp	r0, #3
+	bne	.L758
+	ldr	r1, .L784
+	movs	r3, #0
+.L761:
+	cmp	r3, #5
+	uxth	r2, r3
+	bls	.L759
+	tst	r2, #1
+	ite	ne
+	movne	r0, #5
+	moveq	r0, #4
+	rsb	r2, r0, r2, lsl #1
+	uxth	r2, r2
 .L759:
-	mov	r2, #1024
-	bl	memcpy
-.L758:
-	cbz	r5, .L753
-	lsrs	r4, r4, #1
-	lsls	r3, r4, #4
-	lsls	r4, r4, #6
-	subs	r4, r4, r3
-	ldr	r3, [r6, r4]
-	lsrs	r2, r3, #8
-	strb	r3, [r5, #0]
-	strb	r2, [r5, #1]
-	lsrs	r2, r3, #16
-	lsrs	r3, r3, #24
-	strb	r2, [r5, #2]
-	strb	r3, [r5, #3]
-.L753:
-	pop	{r4, r5, r6, pc}
-	.size	NandcCopy1KB, .-NandcCopy1KB
-	.section	.text.NandcXferData,"ax",%progbits
-	.align	1
-	.global	NandcXferData
-	.thumb
-	.thumb_func
-	.type	NandcXferData, %function
-NandcXferData:
-	@ args = 4, pretend = 0, frame = 80
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	sub	sp, sp, #88
-	mov	r4, r3
-	mov	fp, r3
-	ldr	r3, .L798
-	mov	r6, r0
-	str	r1, [sp, #12]
-	lsls	r1, r4, #26
-	mov	sl, r2
-	ldr	r5, [sp, #120]
-	ldr	r8, [r3, r0, lsl #3]
+	strh	r2, [r1, r3, lsl #1]	@ movhi
+	adds	r3, r3, #1
+	cmp	r3, #256
 	bne	.L761
-	cbnz	r5, .L762
-	add	r0, sp, #20
-	movs	r1, #255
-	movs	r2, #64
-	add	r5, sp, #20
-	bl	memset
+	b	.L754
+.L758:
+	cmp	r0, #4
+	mov	r3, #0
+	bne	.L762
+	ldr	r2, .L784
+	strh	r3, [r2]	@ movhi
+	movs	r3, #1
+	strh	r3, [r2, #2]	@ movhi
+	movs	r3, #2
+	strh	r3, [r2, #4]	@ movhi
+	movs	r3, #3
+	strh	r3, [r2, #6]	@ movhi
+	movs	r3, #5
+	strh	r3, [r2, #10]	@ movhi
+	movs	r3, #7
+	strh	r3, [r2, #12]	@ movhi
+	movs	r3, #8
+	strh	r0, [r2, #8]	@ movhi
+	strh	r3, [r2, #14]!	@ movhi
+.L764:
+	tst	r3, #1
+	ite	ne
+	movne	r1, #7
+	moveq	r1, #6
+	rsb	r1, r1, r3, lsl #1
+	adds	r3, r3, #1
+	uxth	r3, r3
+	strh	r1, [r2, #2]!	@ movhi
+	cmp	r3, #256
+	bne	.L764
+	b	.L754
 .L762:
-	movs	r3, #0
-	mov	r0, r6
-	ldr	r1, [sp, #12]
-	mov	r2, sl
-	stmia	sp, {r4, r5}
-	bl	NandcXferStart
-	mov	r0, r6
-	bl	NandcXferComp
-	ldr	r3, [sp, #12]
-	cmp	r3, #0
-	bne	.L785
-	ldr	r3, .L798+4
-	lsr	r0, sl, #1
-	ldr	r1, .L798+8
-	ldr	r4, [r3, #0]
-	ldr	r3, [sp, #12]
-	cmp	r4, #24
-	ite	hi
-	movhi	r4, #128
-	movls	r4, #64
-	mov	r2, r3
-	b	.L765
+	cmp	r0, #5
+	bne	.L765
+	ldr	r2, .L784
 .L766:
-	ldr	r7, [r1, #4]
-	lsrs	r3, r3, #2
-	adds	r2, r2, #1
-	ldr	r3, [r7, r3, lsl #2]
-	lsrs	r7, r3, #8
-	strb	r3, [r5, #0]
-	strb	r7, [r5, #1]
-	lsrs	r7, r3, #16
-	lsrs	r3, r3, #24
-	strb	r7, [r5, #2]
-	strb	r3, [r5, #3]
-	adds	r5, r5, #4
-	mov	r3, r6
+	strh	r3, [r2, r3, lsl #1]	@ movhi
+	adds	r3, r3, #1
+	cmp	r3, #16
+	bne	.L766
+	ldr	r2, .L784+8
+.L767:
+	strh	r3, [r2, #2]!	@ movhi
+	adds	r3, r3, #2
+	uxth	r3, r3
+	cmp	r3, #496
+	bne	.L767
+	b	.L754
 .L765:
-	cmp	r2, r0
-	add	r6, r3, r4
-	bcc	.L766
-	ldr	r3, .L798+4
-	lsr	sl, sl, #2
-	ldr	r0, [r3, #0]
-	ldr	r3, .L798+12
-	ldr	r1, [r3, #0]
-	movs	r3, #0
-	mov	r4, r3
-	b	.L767
-.L773:
-	add	r2, r3, #8
-	ldr	r2, [r8, r2, lsl #2]
-	str	r2, [sp, #84]
-	ldr	r2, [sp, #84]
-	lsls	r2, r2, #29
-	bmi	.L788
-	ldr	r2, [sp, #84]
-	ands	r2, r2, #32768
-	bne	.L788
-	cmp	r1, #5
-	bls	.L769
-	ldr	r7, [sp, #84]
-	ldr	r5, [sp, #84]
-	ldr	r6, [sp, #84]
-	ubfx	r7, r7, #3, #5
-	ldr	r2, [sp, #84]
-	ubfx	r5, r5, #27, #1
-	ubfx	r6, r6, #16, #5
-	ubfx	r2, r2, #29, #1
-	orr	r5, r7, r5, lsl #5
-	orr	r2, r6, r2, lsl #5
-	cmp	r5, r2
-	ldr	r5, [sp, #84]
-	bls	.L770
-	ldr	r2, [sp, #84]
-	ubfx	r5, r5, #3, #5
-	ubfx	r2, r2, #27, #1
-	b	.L797
+	cmp	r0, #6
+	bne	.L754
+	ldr	r0, .L784
+	mov	r1, r3
 .L770:
-	ldr	r2, [sp, #84]
-	ubfx	r5, r5, #16, #5
-	ubfx	r2, r2, #29, #1
-	b	.L797
-.L769:
-	cmp	r1, #3
-	bls	.L771
-	ldr	r7, [sp, #84]
-	ldr	r5, [sp, #84]
-	ldr	r6, [sp, #84]
-	ubfx	r7, r7, #3, #5
-	ldr	r2, [sp, #84]
-	ubfx	r5, r5, #28, #1
-	ubfx	r6, r6, #16, #5
-	ubfx	r2, r2, #30, #1
-	orr	r5, r7, r5, lsl #5
-	orr	r2, r6, r2, lsl #5
-	cmp	r5, r2
-	ldr	r5, [sp, #84]
-	bls	.L772
-	ldr	r2, [sp, #84]
-	ubfx	r5, r5, #3, #5
-	ubfx	r2, r2, #28, #1
-	b	.L797
-.L772:
-	ldr	r2, [sp, #84]
-	ubfx	r5, r5, #16, #5
-	ubfx	r2, r2, #30, #1
-.L797:
-	orr	r2, r5, r2, lsl #5
-.L771:
-	cmp	r4, r2
-	it	cc
-	movcc	r4, r2
-	b	.L768
-.L788:
-	mov	r4, #-1
+	cmp	r1, #5
+	uxth	r2, r1
+	bls	.L768
+	tst	r2, #1
+	ite	ne
+	movne	r2, #12
+	moveq	r2, #10
+	subs	r2, r3, r2
+	uxth	r2, r2
 .L768:
+	strh	r2, [r0, r1, lsl #1]	@ movhi
+	adds	r1, r1, #1
+	cmp	r1, #256
+	add	r3, r3, #3
+	uxth	r3, r3
+	bne	.L770
+	b	.L754
+.L771:
+	ldrh	r2, [r1, r3, lsl #1]
 	adds	r3, r3, #1
-.L767:
-	cmp	r3, sl
-	bcs	.L763
-	cmp	r0, #0
-	bne	.L773
-	b	.L763
+	strh	r2, [r0, r2, lsl #1]	@ movhi
+	b	.L749
 .L785:
-	movs	r4, #0
-.L763:
-	movs	r3, #0
-	str	r3, [r8, #16]
-	b	.L774
-.L761:
-	ldr	r3, [sp, #12]
-	mov	r7, #0
-	cmp	r3, #1
-	bne	.L795
-	b	.L775
-.L778:
-	cmp	r5, #0
-	ite	ne
-	movne	r3, #2
-	moveq	r3, #0
-	and	r4, r7, #3
-	mov	r0, r8
-	movs	r1, #1
-	mla	r3, r7, r3, r5
-	mov	r2, r4
-	adds	r7, r7, #2
-	str	r3, [sp, #0]
-	mov	r3, fp
-	bl	NandcCopy1KB
-	movs	r3, #0
-	mov	r0, r6
-	str	r3, [sp, #0]
-	str	r3, [sp, #4]
-	movs	r1, #1
-	movs	r2, #2
-	mov	r3, r4
-	bl	NandcXferStart
-	mov	r0, r6
-	bl	NandcXferComp
-	add	fp, fp, #1024
-.L775:
-	cmp	r7, sl
-	bcc	.L778
-	movs	r4, #0
-	b	.L774
-.L795:
-	mov	r1, r7
-	movs	r2, #2
-	mov	r3, r7
-	str	r7, [sp, #0]
-	str	r7, [sp, #4]
-	mov	r4, r7
-	bl	NandcXferStart
-	b	.L779
-.L783:
-	mov	r0, r6
-	bl	NandcXferComp
-	ldr	r3, [r8, #32]
-	add	ip, r7, #2
-	cmp	ip, sl
-	str	r3, [sp, #84]
-	bcs	.L780
-	movs	r3, #0
-	mov	r0, r6
-	str	r3, [sp, #0]
-	mov	r1, r3
-	str	r3, [sp, #4]
-	movs	r2, #2
-	and	r3, ip, #3
-	str	ip, [sp, #8]
-	bl	NandcXferStart
-	ldr	ip, [sp, #8]
-.L780:
-	ldr	r3, [sp, #84]
-	lsls	r1, r3, #29
-	bmi	.L792
-	ldr	r2, [sp, #84]
-	ldr	r3, [sp, #84]
-	ubfx	r2, r2, #3, #5
-	ubfx	r3, r3, #27, #1
-	orr	r3, r2, r3, lsl #5
-	cmp	r4, r3
-	it	cc
-	movcc	r4, r3
-	b	.L781
-.L792:
-	mov	r4, #-1
-.L781:
-	cmp	r5, #0
-	ite	ne
-	movne	r3, #2
-	moveq	r3, #0
-	sub	r2, ip, #2
-	mov	r0, r8
-	movs	r1, #0
-	mla	r7, r7, r3, r5
-	and	r2, r2, #3
-	mov	r3, fp
-	str	ip, [sp, #8]
-	add	fp, fp, #1024
-	str	r7, [sp, #0]
-	bl	NandcCopy1KB
-	ldr	ip, [sp, #8]
-	mov	r7, ip
-.L779:
-	cmp	r7, sl
-	bcc	.L783
-.L774:
-	ldr	r3, .L798+12
-	ldr	r3, [r3, #0]
-	cmp	r3, #5
-	bls	.L784
-	ldr	r3, [sp, #12]
-	cbnz	r3, .L784
-	ldr	r3, [r8, #0]
-	and	r2, r3, #139264
-	cmp	r2, #139264
-	bne	.L784
-	mov	r4, #-1
-	orr	r3, r3, #131072
-	str	r3, [r8, #0]
-.L784:
-	mov	r0, r4
-	add	sp, sp, #88
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L799:
 	.align	2
-.L798:
-	.word	.LANCHOR5
-	.word	.LANCHOR36
-	.word	.LANCHOR38
-	.word	.LANCHOR37
-	.size	NandcXferData, .-NandcXferData
-	.section	.text.FlashProgPage,"ax",%progbits
+.L784:
+	.word	.LANCHOR16
+	.word	.LANCHOR117
+	.word	.LANCHOR16+30
+	.size	BuildFlashLsbPageTable, .-BuildFlashLsbPageTable
+	.section	.text.FlashDieInfoInit,"ax",%progbits
 	.align	1
-	.global	FlashProgPage
+	.global	FlashDieInfoInit
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FlashProgPage, %function
-FlashProgPage:
-	@ args = 0, pretend = 0, frame = 0
+	.fpu softvfp
+	.type	FlashDieInfoInit, %function
+FlashDieInfoInit:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	mov	r8, r3
-	ldr	r3, .L803
-	mov	r5, r1
-	mov	r6, r2
-	mov	r4, r0
-	ldrb	r7, [r3, #9]	@ zero_extendqisi2
-	cbnz	r0, .L801
-	ldr	r3, .L803+4
-	ldr	r2, .L803+8
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	ldr	r2, [r2, #0]
-	muls	r3, r2, r3
-	cmp	r1, r3
-	bcs	.L801
-	ldr	r3, .L803+12
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbnz	r3, .L802
-	subs	r7, r7, #2
-	b	.L801
-.L802:
-	movs	r7, #4
-.L801:
-	mov	r0, r4
-	bl	NandcWaitFlashReady
-	mov	r0, r4
-	bl	NandcFlashCs
-	mov	r0, r4
-	mov	r1, r5
-	bl	FlashProgFirstCmd
-	uxtb	r2, r7
-	mov	r3, r6
-	movs	r1, #1
-	mov	r0, r4
-	str	r8, [sp, #0]
-	bl	NandcXferData
-	mov	r1, r5
-	mov	r0, r4
-	bl	FlashProgSecondCmd
-	mov	r0, r4
-	bl	NandcWaitFlashReady
-	mov	r1, r5
-	mov	r0, r4
-	bl	FlashReadStatus
-	mov	r5, r0
-	mov	r0, r4
-	bl	NandcFlashDeCs
-	and	r0, r5, #1
-	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
-.L804:
-	.align	2
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r3, #0
+	ldr	r2, .L804
+	ldr	r4, .L804+4
+	strb	r3, [r2]
+	str	r2, [sp]
+	strb	r3, [r4]
+	ldr	r3, .L804+8
+	ldr	r7, .L804+12
+	ldrh	r3, [r3, #10]
+	cmp	r3, #256
+	bls	.L787
+	mov	r3, #512
 .L803:
+	movs	r2, #8
+	movs	r1, #0
+	ldr	r0, .L804+16
+	movs	r6, #0
+	str	r3, [r7]
+	bl	ftl_memset
+	movs	r2, #32
+	movs	r1, #0
+	ldr	r0, .L804+20
+	bl	ftl_memset
+	movs	r2, #128
+	movs	r1, #0
+	ldr	r0, .L804+24
+	bl	ftl_memset
+	ldr	r3, .L804+28
+	ldr	fp, .L804+36
+	ldr	r5, [r3]
+	ldr	r3, .L804+16
+	ldrb	r10, [r5]	@ zero_extendqisi2
+	add	r8, r5, #1
+.L791:
+	mov	r2, r10
+	add	r1, fp, r6, lsl #3
+	mov	r0, r8
+	str	r3, [sp, #4]
+	bl	FlashMemCmp8
+	ldr	r3, [sp, #4]
+	cbnz	r0, .L790
+	ldrb	r2, [r4]	@ zero_extendqisi2
+	ldr	r1, .L804+20
+	strb	r6, [r3, r2]
+	str	r0, [r1, r2, lsl #2]
+	adds	r1, r2, #1
+	strb	r1, [r4]
+.L790:
+	adds	r6, r6, #1
+	cmp	r6, #4
+	bne	.L791
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	ldr	r2, [sp]
+	strb	r3, [r2]
+	ldrb	r3, [r5, #8]	@ zero_extendqisi2
+	cmp	r3, #2
+	beq	.L792
+.L796:
+	ldrh	r2, [r5, #14]
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	smulbb	r3, r3, r2
+	ldrb	r2, [r5, #13]	@ zero_extendqisi2
+	smulbb	r3, r3, r2
+	ldr	r2, .L804+32
+	strh	r3, [r2]	@ movhi
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L787:
+	cmp	r3, #128
+	it	hi
+	movhi	r3, #256
+	b	.L803
+.L792:
+	ldr	fp, [r7]
+	movs	r6, #0
+	ldr	r7, .L804+20
+	ldr	r3, .L804+16
+.L795:
+	str	r3, [sp]
+	mov	r2, r10
+	ldr	r3, .L804+36
+	mov	r0, r8
+	add	r1, r3, r6, lsl #3
+	bl	FlashMemCmp8
+	ldr	r3, [sp]
+	cbnz	r0, .L793
+	ldrh	r2, [r5, #14]
+	ldrb	r1, [r4]	@ zero_extendqisi2
+	and	r0, r2, #65280
+	ldrb	r2, [r5, #13]	@ zero_extendqisi2
+	mul	r2, fp, r2
+	muls	r2, r0, r2
+	str	r2, [r7, r1, lsl #2]
+	ldrb	r0, [r5, #23]	@ zero_extendqisi2
+	cbz	r0, .L794
+	lsls	r2, r2, #1
+	str	r2, [r7, r1, lsl #2]
+.L794:
+	adds	r2, r1, #1
+	strb	r6, [r3, r1]
+	strb	r2, [r4]
+.L793:
+	adds	r6, r6, #1
+	cmp	r6, #4
+	bne	.L795
+	b	.L796
+.L805:
+	.align	2
+.L804:
+	.word	.LANCHOR118
+	.word	.LANCHOR25
+	.word	.LANCHOR29
+	.word	.LANCHOR3
+	.word	.LANCHOR26
+	.word	.LANCHOR17
+	.word	.LANCHOR23
 	.word	.LANCHOR18
-	.word	.LANCHOR1
-	.word	.LANCHOR2
-	.word	.LANCHOR0
-	.size	FlashProgPage, .-FlashProgPage
-	.section	.text.FlashPageProgMsbFFData,"ax",%progbits
+	.word	.LANCHOR119
+	.word	.LANCHOR22
+	.size	FlashDieInfoInit, .-FlashDieInfoInit
+	.section	.text.ReadFlashInfo,"ax",%progbits
 	.align	1
-	.global	FlashPageProgMsbFFData
+	.global	ReadFlashInfo
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FlashPageProgMsbFFData, %function
-FlashPageProgMsbFFData:
+	.fpu softvfp
+	.type	ReadFlashInfo, %function
+ReadFlashInfo:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L813
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r4, r2
-	ldr	r2, .L813+4
-	mov	r8, r0
-	ldr	r3, [r3, #0]
-	mov	r7, r1
-	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	ldrb	r3, [r3, #19]	@ zero_extendqisi2
-	cbz	r2, .L806
-	ldr	r2, .L813+8
-	ldr	r1, [r2, #0]
-	ldr	r2, .L813+12
-	cmp	r1, r2
-	beq	.L805
-.L806:
-	subs	r2, r3, #5
-	cmp	r2, #2
-	bls	.L810
-	cmp	r3, #68
-	beq	.L810
-	cmp	r3, #35
-	beq	.L810
-	cmp	r3, #19
-	bne	.L805
-	b	.L810
-.L811:
-	ldrh	r3, [sl, r4, lsl #1]
-	cmp	r3, fp
-	bne	.L805
-	movs	r1, #255
-	mov	r2, #32768
-	ldr	r0, [r5, #0]
-	bl	memset
-	adds	r1, r4, r7
-	adds	r4, r4, #1
-	mov	r0, r8
-	ldr	r2, [r5, #0]
-	movs	r3, #0
-	bl	FlashProgPage
-	uxth	r4, r4
-	b	.L812
+	push	{r4, r5, r6, lr}
+	movs	r1, #0
+	ldr	r6, .L809
+	movs	r2, #11
+	mov	r4, r0
+	movs	r5, #0
+	bl	ftl_memset
+	ldr	r3, [r6]
+	mov	r0, r5
+	ldr	r2, .L809+4
+	ldrb	r3, [r3, #9]	@ zero_extendqisi2
+	ldr	r2, [r2]
+	smulbb	r3, r3, r2
+	uxth	r3, r3
+	strb	r3, [r4, #4]
+	lsrs	r3, r3, #8
+	strb	r3, [r4, #5]
+	ldr	r3, .L809+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	strb	r3, [r4, #7]
+	bl	FlashBootGetCapacity
+	ubfx	r3, r0, #8, #8
+	strb	r0, [r4]
+	strb	r3, [r4, #1]
+	ubfx	r3, r0, #16, #8
+	strb	r3, [r4, #2]
+	lsrs	r0, r0, #24
+	ldr	r3, [r6]
+	strb	r0, [r4, #3]
+	mov	r0, r5
+	ldr	r1, .L809+12
+	ldrb	r2, [r3, #9]	@ zero_extendqisi2
+	strb	r2, [r4, #6]
+	movs	r2, #32
+	strb	r2, [r4, #8]
+	ldrb	r3, [r3, #7]	@ zero_extendqisi2
+	strb	r5, [r4, #10]
+	movs	r5, #1
+	strb	r3, [r4, #9]
+	ldr	r3, .L809+16
+	ldrb	r2, [r3]	@ zero_extendqisi2
+.L807:
+	uxtb	r3, r0
+	cmp	r2, r3
+	bhi	.L808
+	pop	{r4, r5, r6, pc}
+.L808:
+	ldrb	r3, [r0, r1]	@ zero_extendqisi2
+	adds	r0, r0, #1
+	ldrb	r6, [r4, #10]	@ zero_extendqisi2
+	lsl	r3, r5, r3
+	orrs	r3, r3, r6
+	strb	r3, [r4, #10]
+	b	.L807
 .L810:
-	ldr	r6, .L813
-	movw	fp, #65535
-	ldr	sl, .L813+20
-	ldr	r5, .L813+16
-.L812:
-	ldr	r3, [r6, #0]
-	ldrh	r3, [r3, #10]
-	cmp	r3, r4
-	bhi	.L811
-.L805:
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L814:
 	.align	2
-.L813:
-	.word	.LANCHOR23
-	.word	.LANCHOR7
-	.word	.LANCHOR142
-	.word	1446522928
-	.word	.LANCHOR143
-	.word	.LANCHOR9
-	.size	FlashPageProgMsbFFData, .-FlashPageProgMsbFFData
-	.section	.text.FlashReadRawPage,"ax",%progbits
+.L809:
+	.word	.LANCHOR18
+	.word	.LANCHOR3
+	.word	.LANCHOR31
+	.word	.LANCHOR26
+	.word	.LANCHOR25
+	.size	ReadFlashInfo, .-ReadFlashInfo
+	.section	.text.FtlBbt2Bitmap,"ax",%progbits
 	.align	1
-	.global	FlashReadRawPage
+	.global	FtlBbt2Bitmap
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FlashReadRawPage, %function
-FlashReadRawPage:
+	.fpu softvfp
+	.type	FtlBbt2Bitmap, %function
+FtlBbt2Bitmap:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	mov	r8, r3
-	ldr	r3, .L818
+	ldr	r3, .L817
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r5, r0
+	ldr	r7, .L817+4
 	mov	r6, r1
-	mov	r5, r2
-	mov	r4, r0
-	ldrb	r7, [r3, #9]	@ zero_extendqisi2
-	cbnz	r0, .L816
-	ldr	r3, .L818+4
-	ldr	r2, .L818+8
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	ldr	r2, [r2, #0]
-	muls	r3, r2, r3
-	cmp	r1, r3
-	it	cc
-	movcc	r7, #4
-.L816:
-	mov	r0, r4
-	bl	NandcWaitFlashReady
-	mov	r0, r4
-	bl	NandcFlashCs
-	mov	r1, r6
-	mov	r0, r4
-	bl	FlashReadCmd
-	mov	r0, r4
-	bl	NandcWaitFlashReady
-	mov	r3, r5
+	subs	r4, r5, #2
+	addw	r5, r5, #1022
+	ldrh	r2, [r3]
 	movs	r1, #0
-	mov	r2, r7
-	mov	r0, r4
-	str	r8, [sp, #0]
-	bl	NandcXferData
-	mov	r5, r0
-	mov	r0, r4
-	bl	NandcFlashDeCs
-	mov	r0, r5
-	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
-.L819:
-	.align	2
+	ldr	r8, .L817+20
+	mov	r0, r6
+	lsls	r2, r2, #2
+	bl	ftl_memset
+.L814:
+	ldrh	r3, [r4, #2]
+	movw	r2, #65535
+	cmp	r3, r2
+	beq	.L811
+	ldrh	r2, [r7]
+	cmp	r2, r3
+	bhi	.L813
+	mov	r1, r8
+	movs	r2, #79
+	ldr	r0, .L817+8
+	bl	printf
+	ldr	r1, .L817+12
+	ldr	r0, .L817+16
+	bl	printf
+.L813:
+	ldrh	r3, [r4, #2]!
+	movs	r2, #1
+	cmp	r5, r4
+	lsr	r1, r3, #5
+	and	r3, r3, #31
+	lsl	r3, r2, r3
+	ldr	r2, [r6, r1, lsl #2]
+	orr	r2, r2, r3
+	str	r2, [r6, r1, lsl #2]
+	bne	.L814
+.L811:
+	pop	{r4, r5, r6, r7, r8, pc}
 .L818:
-	.word	.LANCHOR18
-	.word	.LANCHOR1
-	.word	.LANCHOR2
-	.size	FlashReadRawPage, .-FlashReadRawPage
-	.section	.text.HynixReadRetrial,"ax",%progbits
+	.align	2
+.L817:
+	.word	.LANCHOR120
+	.word	.LANCHOR49
+	.word	.LC4
+	.word	.LC5
+	.word	.LC6
+	.word	.LANCHOR121
+	.size	FtlBbt2Bitmap, .-FtlBbt2Bitmap
+	.section	.text.FtlBbtMemInit,"ax",%progbits
 	.align	1
-	.global	HynixReadRetrial
+	.global	FtlBbtMemInit
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	HynixReadRetrial, %function
-HynixReadRetrial:
-	@ args = 0, pretend = 0, frame = 8
+	.fpu softvfp
+	.type	FtlBbtMemInit, %function
+FtlBbtMemInit:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	sl, r2
-	ldr	r2, .L835
-	mov	r7, r3
-	mov	r6, r0
-	str	r1, [sp, #4]
-	adds	r3, r2, r0
-	mov	r8, #0
-	ldrb	fp, [r2, #2]	@ zero_extendqisi2
-	mov	r5, #-1
-	ldr	r2, .L835+4
-	ldrb	r4, [r3, #12]	@ zero_extendqisi2
-	ldr	r2, [r2, #0]
-	ldrb	r2, [r2, #19]	@ zero_extendqisi2
-	cmp	r2, #7
-	it	eq
-	ldrbeq	r4, [r3, #20]	@ zero_extendqisi2
-	bl	NandcWaitFlashReady
-	b	.L822
-.L827:
-	adds	r4, r4, #1
-	ldr	r2, .L835
-	mov	r0, r6
-	uxtb	r4, r4
-	cmp	r4, fp
-	it	cs
-	movcs	r4, #0
-	ldrb	r1, [r2, #1]	@ zero_extendqisi2
-	mov	r3, r4
-	adds	r2, r2, #4
-	bl	HynixSetRRPara
-	mov	r3, r7
-	mov	r0, r6
-	ldr	r1, [sp, #4]
-	mov	r2, sl
-	bl	FlashReadRawPage
-	adds	r3, r0, #1
-	beq	.L824
-	ldr	r2, .L835+8
-	cmp	r5, #-1
-	it	eq
-	moveq	r5, r0
-	ldrb	r3, [r2, #0]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	r0, r3, lsr #2
-	bcc	.L833
-	movs	r7, #0
-	mov	sl, r7
-.L824:
-	add	r8, r8, #1
-.L822:
-	cmp	r8, fp
-	bcc	.L827
-	b	.L826
-.L833:
-	mov	r5, r0
-.L826:
-	ldr	r3, .L835+4
-	ldr	r3, [r3, #0]
-	ldrb	r3, [r3, #19]	@ zero_extendqisi2
-	cmp	r3, #7
-	ldr	r3, .L835
-	add	r6, r3, r6
-	ldr	r3, .L835+8
-	it	eq
-	strbeq	r4, [r6, #20]
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	it	ne
-	strbne	r4, [r6, #12]
-	add	r3, r3, r3, lsl #1
-	cmp	r5, r3, lsr #2
-	bcc	.L830
-	cmp	r5, #-1
-	ite	eq
-	moveq	r5, #-1
-	movne	r5, #256
-.L830:
-	mov	r0, r5
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L836:
+	@ link register save eliminated.
+	ldr	r0, .L820
+	movw	r3, #65535
+	movs	r2, #16
+	movs	r1, #255
+	strh	r3, [r0]	@ movhi
+	movs	r3, #0
+	strh	r3, [r0, #6]	@ movhi
+	adds	r0, r0, #12
+	b	ftl_memset
+.L821:
 	.align	2
-.L835:
-	.word	.LANCHOR31
-	.word	.LANCHOR23
-	.word	.LANCHOR29
-	.size	HynixReadRetrial, .-HynixReadRetrial
-	.section	.text.MicronReadRetrial,"ax",%progbits
+.L820:
+	.word	.LANCHOR73
+	.size	FtlBbtMemInit, .-FtlBbtMemInit
+	.section	.text.FtlFreeSysBlkQueueInit,"ax",%progbits
 	.align	1
-	.global	MicronReadRetrial
+	.global	FtlFreeSysBlkQueueInit
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	MicronReadRetrial, %function
-MicronReadRetrial:
-	@ args = 0, pretend = 0, frame = 16
+	.fpu softvfp
+	.type	FtlFreeSysBlkQueueInit, %function
+FtlFreeSysBlkQueueInit:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	fp, r3
-	ldr	r3, .L851
-	mov	sl, r0
-	sub	sp, sp, #24
-	ldrb	r0, [r3, #0]	@ zero_extendqisi2
-	ldr	r3, .L851+4
-	str	r1, [sp, #16]
-	str	r2, [sp, #20]
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbnz	r3, .L838
-	add	r0, r0, r0, lsl #1
-	ubfx	r0, r0, #2, #8
-	b	.L850
-.L838:
-	movs	r1, #3
-	bl	__aeabi_idiv
-	uxtb	r0, r0
-.L850:
-	str	r0, [sp, #12]
-	mov	r0, sl
-	bl	NandcWaitFlashReady
-	ldr	r3, .L851+8
-	mov	r8, #0
-	mov	r4, #-1
-	ldr	r6, [r3, sl, lsl #3]
-	add	r3, r3, sl, lsl #3
-	ldrb	r7, [r3, #4]	@ zero_extendqisi2
-	adds	r7, r7, #8
-	lsls	r7, r7, #8
-	adds	r5, r6, r7
-	b	.L840
-.L844:
-	movs	r2, #239
-	movs	r3, #137
-	str	r2, [r5, #8]
-	movs	r0, #200
-	str	r3, [r5, #4]
-	bl	udelay
-	movs	r2, #0
-	add	ip, r8, #1
-	mov	r0, sl
-	str	ip, [r5, #0]
-	mov	r3, fp
-	str	r2, [r5, #0]
-	ldr	r1, [sp, #16]
-	str	r2, [r5, #0]
-	str	r2, [r5, #0]
-	ldr	r2, [sp, #20]
-	str	ip, [sp, #8]
-	bl	FlashReadRawPage
-	ldr	ip, [sp, #8]
-	adds	r2, r0, #1
-	beq	.L841
-	ldr	r3, [sp, #12]
-	cmp	r4, #-1
-	it	eq
-	moveq	r4, r0
-	cmp	r0, r3
-	bcc	.L848
-	mov	fp, #0
-	str	fp, [sp, #20]
-.L841:
-	mov	r8, ip
-.L840:
-	ldr	r2, .L851+12
-	ldrb	r3, [r2, #0]	@ zero_extendqisi2
-	cmp	r8, r3
-	bcc	.L844
-	b	.L843
-.L848:
-	mov	r4, r0
-.L843:
-	movs	r3, #239
-	movs	r0, #200
-	str	r3, [r5, #8]
-	movs	r3, #137
-	str	r3, [r5, #4]
-	bl	udelay
-	movs	r3, #0
-	str	r3, [r6, r7]
-	str	r3, [r6, r7]
-	str	r3, [r6, r7]
-	str	r3, [r6, r7]
-	ldr	r3, [sp, #12]
-	cmp	r4, r3
-	bcc	.L845
-	ldr	r0, .L851+16
-	mov	r1, r8
-	ldr	r2, [sp, #16]
-	mov	r3, r8
-	cmp	r4, #-1
-	ite	eq
-	moveq	r4, #-1
-	movne	r4, #256
-	str	r4, [sp, #0]
-	bl	printf
-.L845:
+	ldr	r3, .L823
+	mov	r2, #2048
+	push	{r4, lr}
+	movs	r4, #0
+	mov	r1, r4
+	strh	r4, [r3, #2]	@ movhi
+	strh	r4, [r3, #4]	@ movhi
+	strh	r4, [r3, #6]	@ movhi
+	strh	r0, [r3], #8	@ movhi
+	mov	r0, r3
+	bl	ftl_memset
 	mov	r0, r4
-	add	sp, sp, #24
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L852:
+	pop	{r4, pc}
+.L824:
 	.align	2
-.L851:
-	.word	.LANCHOR29
-	.word	.LANCHOR7
-	.word	.LANCHOR5
-	.word	.LANCHOR144
-	.word	.LC7
-	.size	MicronReadRetrial, .-MicronReadRetrial
-	.section	.text.SamsungReadRetrial,"ax",%progbits
+.L823:
+	.word	.LANCHOR74
+	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
+	.section	.text.ftl_free_no_use_map_blk,"ax",%progbits
 	.align	1
-	.global	SamsungReadRetrial
+	.global	ftl_free_no_use_map_blk
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	SamsungReadRetrial, %function
-SamsungReadRetrial:
-	@ args = 0, pretend = 0, frame = 0
+	.fpu softvfp
+	.type	ftl_free_no_use_map_blk, %function
+ftl_free_no_use_map_blk:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r7, r0
-	mov	r8, r2
-	mov	r6, r3
-	mov	fp, r1
-	bl	NandcWaitFlashReady
-	ldr	r3, .L863
-	movs	r5, #1
-	mov	r4, #-1
-	ldr	r2, [r3, r7, lsl #3]
-	add	r3, r3, r7, lsl #3
-	ldrb	sl, [r3, #4]	@ zero_extendqisi2
-	add	sl, sl, #8
-	add	sl, r2, sl, lsl #8
-	b	.L854
-.L858:
-	mov	r0, sl
-	uxtb	r1, r5
-	bl	SamsungSetRRPara
-	mov	r1, fp
-	mov	r0, r7
-	mov	r2, r8
-	mov	r3, r6
-	bl	FlashReadRawPage
-	adds	r1, r0, #1
-	beq	.L855
-	ldr	r2, .L863+4
-	cmp	r4, #-1
-	it	eq
-	moveq	r4, r0
-	ldrb	r3, [r2, #0]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	r0, r3, lsr #2
-	bcc	.L861
-	movs	r6, #0
-	mov	r8, r6
-.L855:
-	adds	r5, r5, #1
-.L854:
-	ldr	r2, .L863+8
-	ldrb	r3, [r2, #0]	@ zero_extendqisi2
-	adds	r3, r3, #1
-	cmp	r5, r3
-	bcc	.L858
-	b	.L857
-.L861:
+	ldrh	r2, [r0, #10]
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-.L857:
+	ldr	r5, [r0, #20]
 	movs	r1, #0
-	mov	r0, sl
-	bl	SamsungSetRRPara
-	ldr	r3, .L863+4
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	r4, r3, lsr #2
-	bcc	.L859
-	cmp	r4, #-1
-	ite	eq
-	moveq	r4, #-1
-	movne	r4, #256
-.L859:
-	mov	r0, r4
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L864:
+	ldr	r10, [r0, #12]
+	lsls	r2, r2, #1
+	ldr	r6, [r0, #24]
+	mov	r0, r5
+	bl	ftl_memset
+	movs	r3, #0
+.L826:
+	ldrh	r1, [r4, #6]
+	uxth	r2, r3
+	cmp	r1, r2
+	bhi	.L830
+	ldrh	r3, [r5]
+	movs	r6, #0
+	ldr	r2, .L839
+	mov	fp, r6
+.L831:
+	ldrh	r0, [r4, #10]
+	uxth	r1, r6
+	cmp	r0, r1
+	bhi	.L835
+	mov	r0, fp
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L830:
+	uxth	r2, r3
+	ldr	r1, [r6, r2, lsl #2]
+	movs	r2, #0
+	ubfx	r1, r1, #10, #16
+.L827:
+	ldrh	r7, [r4, #10]
+	uxth	r0, r2
+	cmp	r7, r0
+	bhi	.L829
+	adds	r3, r3, #1
+	b	.L826
+.L829:
+	uxth	r0, r2
+	adds	r2, r2, #1
+	ldrh	r7, [r10, r0, lsl #1]
+	cmp	r7, r1
+	ittt	eq
+	ldrheq	r7, [r5, r0, lsl #1]
+	addeq	r7, r7, #1
+	strheq	r7, [r5, r0, lsl #1]	@ movhi
+	b	.L827
+.L835:
+	ldrh	r0, [r4]
+	uxth	r7, r6
+	cmp	r0, r1
+	bne	.L832
+	ldrh	r0, [r2]
+	ldrh	ip, [r4, #2]
+	cmp	ip, r0
+	it	cc
+	strhcc	r0, [r5, r7, lsl #1]	@ movhi
+.L832:
+	ldrh	r8, [r5, r7, lsl #1]
+	cmp	r3, r8
+	itt	hi
+	movhi	fp, r1
+	movhi	r3, r8
+	cmp	r8, #0
+	bne	.L834
+	ldrh	r0, [r10, r7, lsl #1]
+	cbz	r0, .L834
+	movs	r1, #1
+	str	r2, [sp, #4]
+	str	r3, [sp]
+	bl	FtlFreeSysBlkQueueIn
+	strh	r8, [r10, r7, lsl #1]	@ movhi
+	ldr	r2, [sp, #4]
+	ldrh	r1, [r4, #8]
+	ldr	r3, [sp]
+	subs	r1, r1, #1
+	strh	r1, [r4, #8]	@ movhi
+.L834:
+	adds	r6, r6, #1
+	b	.L831
+.L840:
 	.align	2
-.L863:
-	.word	.LANCHOR5
-	.word	.LANCHOR29
-	.word	.LANCHOR144
-	.size	SamsungReadRetrial, .-SamsungReadRetrial
-	.section	.text.ToshibaReadRetrial,"ax",%progbits
+.L839:
+	.word	.LANCHOR52
+	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
+	.section	.text.FtlL2PDataInit,"ax",%progbits
 	.align	1
-	.global	ToshibaReadRetrial
+	.global	FtlL2PDataInit
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	ToshibaReadRetrial, %function
-ToshibaReadRetrial:
-	@ args = 0, pretend = 0, frame = 8
+	.fpu softvfp
+	.type	FtlL2PDataInit, %function
+FtlL2PDataInit:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r7, r0
-	mov	fp, r2
-	mov	r8, r3
-	str	r1, [sp, #4]
-	bl	NandcWaitFlashReady
-	ldr	r3, .L887
-	ldr	r2, [r3, r7, lsl #3]
-	add	r3, r3, r7, lsl #3
-	ldrb	r4, [r3, #4]	@ zero_extendqisi2
-	ldr	r3, .L887+4
-	adds	r4, r4, #8
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	add	r4, r2, r4, lsl #8
-	subs	r3, r3, #67
-	cmp	r3, #1
-	bls	.L882
-	ldr	r3, .L887+8
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L883
-	movs	r0, #0
-	mov	sl, #1
-	bl	NandcSetDdrMode
-	b	.L867
-.L883:
-	mov	sl, r3
-.L867:
-	movs	r3, #92
-	str	r3, [r4, #8]
-	movs	r3, #197
-	str	r3, [r4, #8]
-	b	.L866
-.L882:
-	mov	sl, #0
-.L866:
-	movs	r6, #1
-	mov	r5, #-1
-	b	.L868
-.L877:
-	ldr	r1, .L887+4
-	mov	r0, r4
-	ldrb	r3, [r1, #0]	@ zero_extendqisi2
-	uxtb	r1, r6
-	subs	r3, r3, #67
-	cmp	r3, #1
-	bhi	.L869
-	bl	SandiskSetRRPara
-	b	.L870
-.L869:
-	bl	ToshibaSetRRPara
-.L870:
-	ldr	r2, .L887+4
-	ldrb	r3, [r2, #0]	@ zero_extendqisi2
-	cmp	r3, #34
-	bne	.L871
-	ldr	r1, .L887+12
-	ldrb	r3, [r1, #0]	@ zero_extendqisi2
-	subs	r3, r3, #3
-	cmp	r6, r3
-	bne	.L871
-	movs	r2, #179
-	str	r2, [r4, #8]
-.L871:
-	movs	r3, #38
-	str	r3, [r4, #8]
-	movs	r3, #93
-	str	r3, [r4, #8]
-	cmp	sl, #0
-	beq	.L872
-	movs	r0, #4
-	bl	NandcSetDdrMode
-	ldr	r1, [sp, #4]
-	mov	r2, fp
-	mov	r3, r8
-	mov	r0, r7
-	bl	FlashReadRawPage
-	mov	r3, r0
-	movs	r0, #0
-	str	r3, [sp, #0]
-	bl	NandcSetDdrMode
-	ldr	r3, [sp, #0]
-	b	.L873
-.L872:
-	mov	r3, r8
-	mov	r0, r7
-	ldr	r1, [sp, #4]
-	mov	r2, fp
-	bl	FlashReadRawPage
-	mov	r3, r0
-.L873:
-	adds	r0, r3, #1
-	beq	.L874
-	ldr	r1, .L887+16
-	cmp	r5, #-1
-	it	eq
-	moveq	r5, r3
-	ldrb	r2, [r1, #0]	@ zero_extendqisi2
-	add	r2, r2, r2, lsl #1
-	cmp	r3, r2, lsr #2
-	bcc	.L885
-	mov	r8, #0
-	mov	fp, r8
-.L874:
-	adds	r6, r6, #1
-.L868:
-	ldr	r2, .L887+12
-	ldrb	r3, [r2, #0]	@ zero_extendqisi2
-	adds	r3, r3, #1
-	cmp	r6, r3
-	bcc	.L877
-	b	.L876
-.L885:
-	mov	r5, r3
-.L876:
-	ldr	r3, .L887+4
+	push	{r4, r5, r6, r7, r8, lr}
 	movs	r1, #0
-	mov	r0, r4
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	subs	r3, r3, #67
-	cmp	r3, #1
-	bhi	.L878
-	bl	SandiskSetRRPara
-	b	.L879
-.L878:
-	bl	ToshibaSetRRPara
-.L879:
-	movs	r3, #255
-	str	r3, [r4, #8]
-	ldr	r3, .L887+16
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	r5, r3, lsr #2
-	bcc	.L880
-	cmp	r5, #-1
-	ite	eq
-	moveq	r5, #-1
-	movne	r5, #256
-.L880:
-	mov	r0, r7
-	bl	NandcWaitFlashReady
-	cmp	sl, #0
-	beq	.L881
-	movs	r0, #4
-	bl	NandcSetDdrMode
-.L881:
-	mov	r0, r5
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L888:
+	ldr	r5, .L844
+	ldr	r4, .L844+4
+	ldr	r2, [r5]
+	ldr	r7, .L844+8
+	ldr	r6, .L844+12
+	ldr	r0, [r4]
+	lsls	r2, r2, #1
+	ldr	r8, .L844+44
+	bl	ftl_memset
+	ldrh	r3, [r7]
+	movs	r1, #255
+	ldrh	r2, [r6]
+	ldr	r0, [r8]
+	muls	r2, r3, r2
+	bl	ftl_memset
+	ldr	r3, .L844+16
+	movw	r0, #65535
+	ldrh	r1, [r6]
+	ldr	ip, [r8]
+	ldr	r2, [r3]
+	movs	r3, #12
+	ldrh	r7, [r7]
+	mla	r3, r1, r3, r3
+	adds	r1, r2, r3
+	movs	r3, #0
+	mov	lr, r3
+.L842:
+	adds	r2, r2, #12
+	adds	r6, r3, r7
+	cmp	r2, r1
+	bne	.L843
+	ldr	r3, .L844+20
+	ldr	r2, [r5]
+	strh	r0, [r3, #2]	@ movhi
+	strh	r2, [r3, #10]	@ movhi
+	movw	r2, #61634
+	strh	r2, [r3, #4]	@ movhi
+	ldr	r2, .L844+24
+	strh	r0, [r3]	@ movhi
+	strh	r0, [r3, #40]	@ movhi
+	ldrh	r2, [r2]
+	strh	r2, [r3, #8]	@ movhi
+	ldr	r2, .L844+28
+	ldrh	r2, [r2]
+	strh	r2, [r3, #6]	@ movhi
+	ldr	r2, .L844+32
+	ldr	r2, [r2]
+	str	r2, [r3, #12]
+	ldr	r2, .L844+36
+	ldr	r2, [r2]
+	str	r2, [r3, #16]
+	ldr	r2, [r4]
+	str	r2, [r3, #20]
+	ldr	r2, .L844+40
+	ldr	r2, [r2]
+	str	r2, [r3, #24]
+	pop	{r4, r5, r6, r7, r8, pc}
+.L843:
+	bic	r3, r3, #3
+	str	lr, [r2, #-8]
+	add	r3, r3, ip
+	strh	r0, [r2, #-12]	@ movhi
+	str	r3, [r2, #-4]
+	mov	r3, r6
+	b	.L842
+.L845:
 	.align	2
-.L887:
-	.word	.LANCHOR5
-	.word	.LANCHOR11
-	.word	.LANCHOR35
-	.word	.LANCHOR144
-	.word	.LANCHOR29
-	.size	ToshibaReadRetrial, .-ToshibaReadRetrial
-	.section	.text.FlashSavePhyInfo,"ax",%progbits
+.L844:
+	.word	.LANCHOR63
+	.word	.LANCHOR122
+	.word	.LANCHOR56
+	.word	.LANCHOR66
+	.word	.LANCHOR95
+	.word	.LANCHOR124
+	.word	.LANCHOR125
+	.word	.LANCHOR65
+	.word	.LANCHOR126
+	.word	.LANCHOR127
+	.word	.LANCHOR128
+	.word	.LANCHOR123
+	.size	FtlL2PDataInit, .-FtlL2PDataInit
+	.section	.text.FtlVariablesInit,"ax",%progbits
 	.align	1
-	.global	FlashSavePhyInfo
+	.global	FtlVariablesInit
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FlashSavePhyInfo, %function
-FlashSavePhyInfo:
+	.fpu softvfp
+	.type	FtlVariablesInit, %function
+FtlVariablesInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	movs	r5, #0
-	ldr	r7, .L896
-	ldr	r8, .L896+60
-	ldr	sl, .L896+64
-	ldr	r3, [r7, #0]
-	ldr	fp, .L896+48
-	ldr	r6, .L896+4
-	str	r3, [r8, #0]
-	ldr	r3, .L896+8
-	ldrb	r0, [r3, #0]	@ zero_extendqisi2
-	bl	FlashBchSel
-	movs	r1, #0
-	mov	r2, #2048
-	ldr	r0, [r7, #0]
-	bl	memset
-	ldr	r0, [r8, #0]
-	ldr	r3, .L896+12
-	movs	r2, #32
-	ldr	r1, .L896+16
-	str	sl, [r0, #0]
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	strh	r3, [r0, #12]	@ movhi
-	ldr	r3, .L896+20
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	strh	r3, [r0, #14]	@ movhi
-	ldr	r3, .L896+24
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	str	r3, [r0, #1076]
-	adds	r0, r0, #16
-	bl	memcpy
-	ldr	r0, [r8, #0]
-	ldr	r1, .L896+28
-	movs	r2, #8
-	adds	r0, r0, #80
-	bl	memcpy
-	ldr	r0, [r8, #0]
-	ldr	r1, .L896+32
-	movs	r2, #32
-	adds	r0, r0, #96
-	bl	memcpy
-	ldr	r0, [r8, #0]
-	ldr	r1, .L896+36
-	movs	r2, #32
-	adds	r0, r0, #160
-	bl	memcpy
-	ldr	r0, [r8, #0]
-	ldr	r1, .L896+40
-	movs	r2, #32
-	adds	r0, r0, #192
-	bl	memcpy
-	ldr	r0, [r8, #0]
-	mov	r2, #852
-	ldr	r1, .L896+44
-	adds	r0, r0, #224
-	bl	memcpy
-	ldr	r4, [r8, #0]
-	movw	r1, #2036
-	add	r0, r4, #12
-	bl	JSHash
-	mov	r3, #1592
-	str	r3, [r4, #4]
-	ldr	r3, [fp, #0]
-	str	r3, [r8, #0]
-	str	r0, [r4, #8]
-	movs	r0, #0
-	bl	flash_enter_slc_mode
-	mov	r4, r5
-.L892:
-	movs	r0, #0
-	ldr	r1, [r6, #0]
-	mov	r2, r0
-	muls	r1, r4, r1
-	bl	FlashEraseBlock
-	movs	r0, #0
-	ldr	r1, [r6, #0]
-	mov	r3, r0
-	muls	r1, r4, r1
-	ldr	r2, [r7, #0]
-	bl	FlashProgPage
-	movs	r0, #0
-	ldr	r1, [r6, #0]
-	mov	r3, r0
-	muls	r1, r4, r1
-	ldr	r2, [r7, #0]
-	adds	r1, r1, #1
-	bl	FlashProgPage
-	ldr	r3, .L896+48
-	movs	r0, #0
-	ldr	r1, [r6, #0]
-	muls	r1, r4, r1
-	ldr	r2, [r3, #0]
-	mov	r3, r0
-	bl	FlashReadRawPage
-	adds	r0, r0, #1
-	beq	.L890
-	ldr	fp, [r8, #0]
-	ldr	r3, [fp, #0]
-	cmp	r3, sl
-	bne	.L890
-	add	r0, fp, #12
-	movw	r1, #2036
-	bl	JSHash
-	ldr	r3, [fp, #8]
-	cmp	r3, r0
-	bne	.L890
-	ldr	r3, .L896+52
-	adds	r2, r4, #1
-	adds	r5, r5, #1
-	str	r2, [r3, #0]
-	ldr	r3, .L896+56
-	ldr	r2, [r6, #0]
-	muls	r2, r4, r2
-	cmp	r5, #1
-	str	r2, [r3, #0]
-	bhi	.L891
-.L890:
-	adds	r4, r4, #1
-	cmp	r4, #4
-	bne	.L892
-.L891:
-	movs	r0, #0
-	bl	flash_exit_slc_mode
-	cmp	r5, #0
-	ite	eq
-	moveq	r0, #-1
-	movne	r0, #0
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L897:
+	push	{r3, r4, r5, lr}
+	movs	r4, #0
+	ldr	r3, .L847
+	movw	r2, #65535
+	mov	r1, r4
+	ldr	r5, .L847+4
+	str	r4, [r3]
+	ldr	r3, .L847+8
+	strh	r2, [r3]	@ movhi
+	mov	r2, #-1
+	ldr	r3, .L847+12
+	str	r4, [r3]
+	ldr	r3, .L847+16
+	str	r4, [r3]
+	ldr	r3, .L847+20
+	str	r2, [r3]
+	ldr	r3, .L847+24
+	str	r4, [r3]
+	ldr	r3, .L847+28
+	strh	r4, [r3]	@ movhi
+	ldr	r3, .L847+32
+	ldrh	r2, [r3]
+	ldr	r3, .L847+36
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldrh	r2, [r5]
+	mov	r1, r4
+	ldr	r3, .L847+40
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldrh	r2, [r5]
+	mov	r1, r4
+	ldr	r3, .L847+44
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+	mov	r1, r4
+	movs	r2, #48
+	ldr	r0, .L847+48
+	bl	ftl_memset
+	mov	r2, #512
+	mov	r1, r4
+	ldr	r0, .L847+52
+	bl	ftl_memset
+	bl	FtlGcBufInit
+	bl	FtlL2PDataInit
+	mov	r0, r4
+	pop	{r3, r4, r5, pc}
+.L848:
 	.align	2
-.L896:
-	.word	.LANCHOR146
-	.word	.LANCHOR2
-	.word	.LANCHOR147
-	.word	.LANCHOR16
-	.word	.LANCHOR22
-	.word	.LANCHOR1
-	.word	.LANCHOR35
-	.word	.LANCHOR19
-	.word	.LANCHOR20
-	.word	.LANCHOR18
-	.word	.LANCHOR6
-	.word	.LANCHOR31
-	.word	.LANCHOR143
-	.word	.LANCHOR148
-	.word	.LANCHOR149
-	.word	.LANCHOR145
-	.word	1312902724
-	.size	FlashSavePhyInfo, .-FlashSavePhyInfo
-	.section	.text.FlashReadIdbDataRaw,"ax",%progbits
+.L847:
+	.word	.LANCHOR129
+	.word	.LANCHOR39
+	.word	.LANCHOR130
+	.word	.LANCHOR131
+	.word	.LANCHOR132
+	.word	.LANCHOR133
+	.word	.LANCHOR101
+	.word	.LANCHOR69
+	.word	.LANCHOR60
+	.word	.LANCHOR70
+	.word	.LANCHOR77
+	.word	.LANCHOR134
+	.word	.LANCHOR135
+	.word	.LANCHOR136
+	.size	FtlVariablesInit, .-FtlVariablesInit
+	.section	.text.SupperBlkListInit,"ax",%progbits
 	.align	1
-	.global	FlashReadIdbDataRaw
+	.global	SupperBlkListInit
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FlashReadIdbDataRaw, %function
-FlashReadIdbDataRaw:
-	@ args = 0, pretend = 0, frame = 16
+	.fpu softvfp
+	.type	SupperBlkListInit, %function
+SupperBlkListInit:
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, lr}
-	movs	r2, #4
-	mov	r8, r0
-	ldr	r1, .L909
-	add	r0, sp, #12
-	bl	memcpy
-	ldr	r3, .L909+4
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	str	r3, [sp, #4]
-	ldr	r3, .L909+8
-	ldr	r2, [r3, #0]
-	ldr	r3, .L909+12
-	cmp	r2, r3
-	bne	.L899
-	movs	r0, #0
-	bl	flash_enter_slc_mode
-.L899:
-	mov	r0, r8
+	ldr	r3, .L860
+	movs	r2, #6
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r1, #0
-	mov	r2, #2048
-	mov	r7, #-1
-	bl	memset
-	movs	r4, #2
-	ldr	sl, .L909+32
-	ldr	fp, .L909+36
-	ldr	r6, .L909+16
-	b	.L900
-.L907:
-	movs	r5, #0
-.L902:
-	add	r3, sp, #12
-	ldrb	r0, [r3, r5]	@ zero_extendqisi2
-	bl	FlashBchSel
-	ldr	r3, .L909+16
-	movs	r0, #0
-	ldr	r1, [fp, #0]
-	muls	r1, r4, r1
-	ldr	r2, [r3, #0]
-	mov	r3, r0
-	bl	FlashReadRawPage
-	adds	r0, r0, #1
-	bne	.L901
+	ldr	r6, .L860+4
+	sub	sp, sp, #24
+	movs	r4, #0
+	ldrh	r3, [r3]
+	mov	r8, r4
+	ldr	r0, [r6]
+	mov	r5, r4
+	mov	r10, r6
+	muls	r2, r3, r2
+	bl	ftl_memset
+	ldr	r3, .L860+8
+	ldr	r2, .L860+12
+	ldr	r1, .L860+16
+	str	r4, [r3]
+	ldr	r3, .L860+20
+	strh	r4, [r2]	@ movhi
+	strh	r4, [r1]	@ movhi
+	str	r4, [r3]
+	ldr	r3, .L860+24
+	str	r2, [sp, #8]
+	str	r4, [r3]
+	ldr	r3, .L860+28
+	mov	fp, r3
+	strh	r4, [r3]	@ movhi
+.L850:
+	ldr	r3, .L860+32
+	sxth	r7, r4
+	ldrh	r3, [r3]
+	cmp	r7, r3
+	bge	.L857
+	ldr	r3, .L860+36
+	uxth	r1, r4
+	str	r1, [sp, #12]
+	ldrh	r2, [r3]
+	ldr	r3, .L860+40
+	ldrh	r3, [r3]
+	str	r3, [sp, #4]
+	movs	r3, #0
+	mov	r6, r3
+	b	.L858
+.L852:
+	str	r3, [sp, #20]
+	ldr	r3, .L860+44
+	ldr	r1, [sp, #12]
+	str	r2, [sp, #16]
+	ldrb	r0, [r3, r0]	@ zero_extendqisi2
+	bl	V2P_block
+	bl	FtlBbmIsBadBlock
+	ldr	r2, [sp, #16]
+	ldr	r3, [sp, #20]
+	cbnz	r0, .L851
+	ldr	r1, [sp, #4]
+	add	r6, r6, r1
+	sxth	r6, r6
+.L851:
+	adds	r3, r3, #1
+.L858:
+	sxth	r0, r3
+	cmp	r0, r2
+	blt	.L852
+	lsls	r3, r7, #1
+	cbz	r6, .L853
+	mov	r1, r6
+	str	r3, [sp, #4]
+	mov	r0, #32768
+	bl	__aeabi_idiv
+	ldr	r3, [sp, #4]
+	sxth	r6, r0
+.L854:
+	ldr	r2, [r10]
+	add	r3, r3, r7
+	add	r2, r2, r3, lsl #1
+	ldr	r3, .L860+48
+	strh	r6, [r2, #4]	@ movhi
+	ldrh	r3, [r3]
+	cmp	r7, r3
+	beq	.L855
+	ldr	r3, .L860+52
+	ldrh	r3, [r3]
+	cmp	r7, r3
+	beq	.L855
+	ldr	r3, .L860+56
+	ldrh	r3, [r3]
+	cmp	r7, r3
+	beq	.L855
+	ldr	r3, .L860+60
+	uxth	r0, r4
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r7, lsl #1]
+	cbnz	r3, .L856
+	add	r8, r8, #1
+	uxth	r8, r8
+	bl	INSERT_FREE_LIST
+.L855:
+	adds	r4, r4, #1
+	b	.L850
+.L853:
+	ldr	r2, .L860+60
+	movw	r1, #65535
+	ldr	r2, [r2]
+	strh	r1, [r2, r7, lsl #1]	@ movhi
+	b	.L854
+.L856:
 	adds	r5, r5, #1
-	cmp	r5, #4
-	bne	.L902
-	b	.L903
-.L901:
-	ldr	r3, [r6, #0]
-	ldr	r2, [r3, #0]
-	ldr	r3, .L909+20
-	cmp	r2, r3
-	bne	.L903
-	add	r3, sp, #16
-	ldr	r0, .L909+24
-	adds	r5, r3, r5
-	ldrb	r1, [r5, #-4]	@ zero_extendqisi2
+	uxth	r5, r5
+	bl	INSERT_DATA_LIST
+	b	.L855
+.L857:
+	ldr	r2, [sp, #8]
+	strh	r8, [fp]	@ movhi
+	strh	r5, [r2]	@ movhi
+	add	r5, r5, r8
+	cmp	r3, r5
+	bge	.L859
+	ldr	r1, .L860+64
+	movw	r2, #2366
+	ldr	r0, .L860+68
 	bl	printf
-	mov	r2, #2048
-	mov	r0, r8
-	ldr	r1, [r6, #0]
-	bl	memcpy
-	ldr	r3, [r6, #0]
-	ldr	r3, [r3, #512]
-	strb	r3, [sl, #0]
-	ldr	r3, .L909+28
-	ldr	r2, [r3, #0]
-	cmp	r2, r4
-	bls	.L906
-	str	r4, [r3, #0]
-	movs	r7, #0
-	bl	FlashSavePhyInfo
-.L903:
-	adds	r4, r4, #1
-.L900:
-	ldrb	r3, [sl, #0]	@ zero_extendqisi2
-	cmp	r4, r3
-	bcc	.L907
-	b	.L904
-.L906:
-	movs	r7, #0
-.L904:
-	ldr	r0, [sp, #4]
-	bl	FlashBchSel
-	ldr	r3, .L909+8
-	ldr	r2, [r3, #0]
-	ldr	r3, .L909+12
-	cmp	r2, r3
-	bne	.L905
+	ldr	r1, .L860+72
+	ldr	r0, .L860+76
+	bl	printf
+.L859:
 	movs	r0, #0
-	bl	flash_exit_slc_mode
-.L905:
-	mov	r0, r7
-	add	sp, sp, #16
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L910:
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L861:
 	.align	2
-.L909:
-	.word	.LANCHOR150
-	.word	.LANCHOR29
-	.word	.LANCHOR142
-	.word	1446522928
-	.word	.LANCHOR146
-	.word	-52655045
-	.word	.LC8
-	.word	.LANCHOR148
-	.word	.LANCHOR1
-	.word	.LANCHOR2
-	.size	FlashReadIdbDataRaw, .-FlashReadIdbDataRaw
-	.section	.text.FlashLoadPhyInfo,"ax",%progbits
+.L860:
+	.word	.LANCHOR39
+	.word	.LANCHOR80
+	.word	.LANCHOR86
+	.word	.LANCHOR84
+	.word	.LANCHOR137
+	.word	.LANCHOR81
+	.word	.LANCHOR83
+	.word	.LANCHOR87
+	.word	.LANCHOR38
+	.word	.LANCHOR36
+	.word	.LANCHOR51
+	.word	.LANCHOR45
+	.word	.LANCHOR90
+	.word	.LANCHOR91
+	.word	.LANCHOR92
+	.word	.LANCHOR82
+	.word	.LANCHOR138
+	.word	.LC4
+	.word	.LC5
+	.word	.LC6
+	.size	SupperBlkListInit, .-SupperBlkListInit
+	.section	.text.FtlGcPageVarInit,"ax",%progbits
 	.align	1
-	.global	FlashLoadPhyInfo
+	.global	FtlGcPageVarInit
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FlashLoadPhyInfo, %function
-FlashLoadPhyInfo:
-	@ args = 0, pretend = 0, frame = 16
+	.fpu softvfp
+	.type	FtlGcPageVarInit, %function
+FtlGcPageVarInit:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, lr}
-	movs	r2, #4
-	ldr	sl, .L923+40
-	add	r0, sp, #12
-	ldr	r1, .L923
-	movs	r4, #0
-	bl	memcpy
-	ldr	r5, .L923+4
-	ldr	r3, [sl, #0]
-	mov	r0, r4
-	ldr	r6, .L923+8
-	mov	r8, #4
-	mov	r7, #-1
-	str	r3, [r5, #0]
-	ldr	r3, .L923+12
-	ldrh	r2, [r6, #10]
-	str	r4, [r3, #0]
-	str	r2, [sp, #4]
-	bl	flash_enter_slc_mode
-	b	.L912
-.L914:
-	add	r3, sp, #12
-	ldrb	r0, [r3, r6]	@ zero_extendqisi2
-	bl	FlashBchSel
-	movs	r0, #0
-	mov	r1, r4
-	ldr	r2, [sl, #0]
-	mov	r3, r0
-	bl	FlashReadRawPage
-	adds	r0, r0, #1
-	bne	.L913
-	movs	r0, #0
-	mov	r1, fp
-	ldr	r2, [sl, #0]
-	mov	r3, r0
-	bl	FlashReadRawPage
-	adds	r0, r0, #1
-	bne	.L913
-	adds	r6, r6, #1
-	cmp	r6, #4
-	beq	.L915
-	b	.L914
-.L913:
-	ldr	r6, [r5, #0]
-	ldr	r2, .L923+16
-	ldr	r3, [r6, #0]
-	cmp	r3, r2
-	bne	.L915
-	cbnz	r7, .L916
-	ldr	r3, .L923+8
-	mov	r0, r4
-	ldrh	r1, [r3, #10]
-	bl	__aeabi_uidiv
-	ldr	r3, .L923+20
-	adds	r0, r0, #1
-	str	r0, [r3, #0]
-	mov	r0, r7
-	b	.L922
-.L916:
-	add	r0, r6, #12
-	movw	r1, #2036
-	bl	JSHash
-	ldr	r3, [r6, #8]
-	cmp	r3, r0
-	bne	.L915
-	add	r1, r6, #160
-	movs	r2, #32
-	ldr	r0, .L923+8
-	bl	memcpy
-	ldr	r1, [r5, #0]
-	movs	r2, #32
-	ldr	r0, .L923+24
-	adds	r1, r1, #192
-	bl	memcpy
-	ldr	r1, [r5, #0]
-	mov	r2, #852
-	ldr	r0, .L923+28
-	adds	r1, r1, #224
-	bl	memcpy
-	ldr	r6, [r5, #0]
-	ldr	r3, .L923+32
-	mov	r0, r4
-	ldr	r2, [r6, #1076]
-	strb	r2, [r3, #0]
-	ldr	r3, .L923+12
-	str	r4, [r3, #0]
-	ldr	r3, .L923+8
-	ldrh	r1, [r3, #10]
-	bl	__aeabi_uidiv
-	ldr	r3, .L923+20
-	adds	r0, r0, #1
-	str	r0, [r3, #0]
-	cmp	r0, #1
-	bne	.L918
-	movs	r2, #2
-	str	r2, [r3, #0]
-.L918:
-	ldrh	r2, [r6, #14]
-	movs	r7, #0
-	ldr	r3, .L923+36
-	strb	r2, [r3, #0]
-.L915:
-	ldr	r2, [sp, #4]
-	subs	r8, r8, #1
-	add	r4, r4, r2
-	beq	.L919
-.L912:
-	add	fp, r4, #1
-	movs	r6, #0
-	b	.L914
-.L919:
-	mov	r0, r8
-.L922:
-	bl	flash_exit_slc_mode
-	mov	r0, r7
-	add	sp, sp, #16
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L924:
+	ldr	r2, .L863
+	movs	r3, #0
+	push	{r4, lr}
+	movs	r1, #255
+	ldr	r4, .L863+4
+	strh	r3, [r2]	@ movhi
+	ldr	r2, .L863+8
+	strh	r3, [r2]	@ movhi
+	ldrh	r2, [r4]
+	ldr	r3, .L863+12
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldrh	r3, [r4]
+	movs	r2, #12
+	movs	r1, #255
+	muls	r2, r3, r2
+	ldr	r3, .L863+16
+	ldr	r0, [r3]
+	bl	ftl_memset
+	pop	{r4, lr}
+	b	FtlGcBufInit
+.L864:
 	.align	2
-.L923:
-	.word	.LANCHOR150
-	.word	.LANCHOR145
-	.word	.LANCHOR18
-	.word	.LANCHOR149
-	.word	1312902724
-	.word	.LANCHOR148
-	.word	.LANCHOR6
-	.word	.LANCHOR31
-	.word	.LANCHOR35
-	.word	.LANCHOR151
-	.word	.LANCHOR146
-	.size	FlashLoadPhyInfo, .-FlashLoadPhyInfo
-	.section	.text.FlashDdrTunningRead,"ax",%progbits
+.L863:
+	.word	.LANCHOR109
+	.word	.LANCHOR53
+	.word	.LANCHOR110
+	.word	.LANCHOR108
+	.word	.LANCHOR111
+	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
+	.section	.text.ftl_memcpy,"ax",%progbits
 	.align	1
-	.global	FlashDdrTunningRead
+	.global	ftl_memcpy
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FlashDdrTunningRead, %function
-FlashDdrTunningRead:
-	@ args = 4, pretend = 0, frame = 24
+	.fpu softvfp
+	.type	ftl_memcpy, %function
+ftl_memcpy:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	sl, r3
-	ldr	r3, .L945
-	sub	sp, sp, #24
-	mov	fp, r2
-	str	r0, [sp, #8]
-	ldr	r3, [r3, #0]
-	str	r1, [sp, #12]
-	ldr	r3, [r3, #304]
-	str	r3, [sp, #20]
-	ldr	r3, .L945+4
-	ldr	r7, [r3, #0]
-	ldr	r3, [sp, #56]
-	cmp	r7, #7
-	ite	hi
-	movhi	r7, #12
-	movls	r7, #6
-	cbz	r3, .L937
-	movs	r0, #1
-	ldr	r4, .L945+8
-	bl	FlashSetInterfaceMode
-	movs	r0, #1
-	bl	NandcSetMode
-	ldr	r0, [sp, #8]
-	bl	FlashReset
-	ldr	r1, [sp, #12]
-	mov	r2, fp
-	mov	r3, sl
-	ldr	r0, [sp, #8]
-	bl	FlashReadRawPage
-	mov	r8, r0
-	ldrb	r0, [r4, #0]	@ zero_extendqisi2
-	bl	FlashSetInterfaceMode
-	ldrb	r0, [r4, #0]	@ zero_extendqisi2
-	bl	NandcSetMode
-	cmp	r8, #-1
-	beq	.L928
-	mov	r2, r8
-	ldr	r0, .L945+12
-	ldr	r1, [sp, #12]
-	bl	printf
-	ldr	r3, .L945+16
-	ldr	r2, [r3, #0]
-	adds	r2, r2, #1
-	str	r2, [r3, #0]
-	cmp	r2, #2048
-	bcc	.L928
-	movs	r2, #0
-	str	r2, [r3, #0]
-	mov	sl, r2
-	mov	fp, r2
-	b	.L927
-.L937:
-	mov	r8, #1024
-.L927:
-	movs	r4, #0
-	mov	r6, #-1
-	mov	ip, r4
-	mov	r5, r4
-	str	r4, [sp, #16]
-.L933:
-	uxtb	r0, r7
-	str	ip, [sp, #4]
-	bl	NandcSetDdrPara
-	mov	r3, sl
-	ldr	r0, [sp, #8]
-	mov	r2, fp
-	ldr	r1, [sp, #12]
-	bl	FlashReadRawPage
-	add	r3, r8, #1
-	ldr	ip, [sp, #4]
-	cmp	r0, r3
-	bhi	.L929
-	cmp	r0, #2
-	bhi	.L939
-	adds	r5, r5, #1
-	cmp	r5, #9
-	bls	.L939
-	subs	r4, r7, r5
-	mov	r8, r0
-	movs	r6, #0
-	b	.L931
-.L929:
-	cmp	ip, r5
-	bcs	.L940
-	cmp	r5, #7
-	rsb	r3, r5, r4
-	str	r3, [sp, #16]
-	bhi	.L932
-	mov	ip, r5
-	b	.L940
-.L939:
-	movs	r6, #0
-	mov	r4, r7
-	mov	r8, r0
-	mov	sl, r6
-	mov	fp, r6
-	b	.L930
-.L940:
-	movs	r5, #0
-.L930:
-	adds	r7, r7, #2
-	cmp	r7, #69
-	bls	.L933
-.L931:
-	cmp	ip, r5
-	bcc	.L934
-.L932:
-	ldr	r4, [sp, #16]
-.L934:
-	cbz	r4, .L935
-	ldr	r0, .L945+20
-	mov	r1, r4
-	bl	printf
-	uxtb	r0, r4
-	bl	NandcSetDdrPara
-.L935:
-	cbz	r6, .L928
-	ldr	r0, .L945+24
-	ldr	r1, [sp, #8]
-	ldr	r2, [sp, #12]
-	bl	printf
-	ldr	r3, [sp, #56]
-	cbz	r3, .L942
-	ldr	r3, [sp, #20]
-	ubfx	r0, r3, #8, #8
-	bl	NandcSetDdrPara
-	b	.L928
-.L942:
-	mov	r8, r6
-.L928:
-	mov	r0, r8
-	add	sp, sp, #24
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L946:
-	.align	2
-.L945:
-	.word	.LANCHOR30
-	.word	.LANCHOR37
-	.word	.LANCHOR34
-	.word	.LC9
-	.word	.LANCHOR152
-	.word	.LC10
-	.word	.LC11
-	.size	FlashDdrTunningRead, .-FlashDdrTunningRead
-	.section	.text.FlashDdrParaScan,"ax",%progbits
+	@ link register save eliminated.
+	b	memcpy
+	.size	ftl_memcpy, .-ftl_memcpy
+	.section	.text.FlashReadIdbData,"ax",%progbits
 	.align	1
-	.global	FlashDdrParaScan
+	.global	FlashReadIdbData
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FlashDdrParaScan, %function
-FlashDdrParaScan:
+	.fpu softvfp
+	.type	FlashReadIdbData, %function
+FlashReadIdbData:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	mov	r6, r0
-	ldr	r5, .L952
-	movs	r4, #0
-	mov	r7, r1
-	ldrb	r0, [r5, #0]	@ zero_extendqisi2
-	bl	FlashSetInterfaceMode
-	ldrb	r0, [r5, #0]	@ zero_extendqisi2
-	bl	NandcSetMode
-	mov	r1, r7
-	mov	r2, r4
-	mov	r3, r4
-	mov	r0, r6
-	str	r4, [sp, #0]
-	bl	FlashDdrTunningRead
-	mov	r1, r7
-	mov	r2, r4
-	mov	r3, r4
-	mov	r8, r0
-	mov	r0, r6
-	bl	FlashReadRawPage
-	adds	r0, r0, #1
-	beq	.L948
-	cmp	r8, #-1
-	bne	.L949
-.L948:
-	ldrb	r3, [r5, #0]	@ zero_extendqisi2
-	lsls	r3, r3, #31
-	bpl	.L949
-	movs	r0, #1
-	bl	FlashSetInterfaceMode
-	movs	r0, #1
-	bl	NandcSetMode
-	movs	r2, #0
-	b	.L951
-.L949:
-	movs	r2, #1
-.L951:
-	ldr	r3, .L952+4
+	push	{r3, lr}
+	mov	r2, #2048
+	ldr	r1, .L867
+	bl	ftl_memcpy
 	movs	r0, #0
-	strb	r2, [r3, #0]
-	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
-.L953:
+	pop	{r3, pc}
+.L868:
 	.align	2
-.L952:
-	.word	.LANCHOR34
-	.word	.LANCHOR35
-	.size	FlashDdrParaScan, .-FlashDdrParaScan
-	.section	.text.FlashReadPage,"ax",%progbits
+.L867:
+	.word	.LANCHOR139
+	.size	FlashReadIdbData, .-FlashReadIdbData
+	.section	.text.FlashLoadPhyInfoInRam,"ax",%progbits
 	.align	1
-	.global	FlashReadPage
+	.global	FlashLoadPhyInfoInRam
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FlashReadPage, %function
-FlashReadPage:
+	.fpu softvfp
+	.type	FlashLoadPhyInfoInRam, %function
+FlashLoadPhyInfoInRam:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	sl, r3
-	mov	r5, r0
-	mov	r7, r1
-	mov	r8, r2
-	bl	FlashReadRawPage
-	adds	r3, r0, #1
-	mov	r4, r0
-	bne	.L955
-	ldr	r6, .L960
-	ldrb	fp, [r6, #0]	@ zero_extendqisi2
-	cmp	fp, #0
-	beq	.L956
-	movs	r3, #0
-	mov	r0, r5
-	strb	r3, [r6, #0]
-	mov	r1, r7
-	mov	r2, r8
-	mov	r3, sl
-	bl	FlashReadRawPage
-	strb	fp, [r6, #0]
-	adds	r6, r0, #1
-	bne	.L959
-.L956:
-	ldr	r3, .L960+4
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L955
-	ldr	r3, .L960+8
-	mov	r0, r5
-	mov	r1, r7
-	mov	r2, r8
-	ldr	r3, [r3, #0]
-	ldr	r6, [r3, #304]
-	movs	r3, #1
-	str	r3, [sp, #0]
-	mov	r3, sl
-	bl	FlashDdrTunningRead
-	mov	r4, r0
-	adds	r0, r0, #1
-	beq	.L957
-	ldr	r3, .L960+12
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cmp	r4, r3, lsr #1
-	bls	.L955
-.L957:
-	ubfx	r0, r6, #8, #8
-	bl	NandcSetDdrPara
-	b	.L955
-.L959:
-	mov	r4, r0
-.L955:
-	ldr	fp, .L960+24
-	ldr	r6, [fp, #0]
-	cbz	r6, .L958
-	adds	r1, r4, #1
-	bne	.L958
-	mov	r1, r7
-	mov	r2, r8
-	mov	r3, sl
-	mov	r0, r5
-	blx	r6
-	mov	r2, r5
-	mov	r3, r7
-	mov	r4, r0
-	ldr	r0, .L960+16
-	mov	r1, r4
-	bl	printf
-	adds	r2, r4, #1
-	bne	.L958
-	ldr	r3, .L960+20
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L958
-	mov	r0, r5
-	bl	flash_enter_slc_mode
-	ldr	r4, [fp, #0]
-	mov	r0, r5
-	mov	r1, r7
-	mov	r2, r8
-	mov	r3, sl
-	blx	r4
+	push	{r4, r5, r6, r7, r8, lr}
+	movs	r6, #0
+	ldr	r7, .L877
+	ldr	r5, .L877+4
+.L872:
+	ldrb	r2, [r7, #-1]	@ zero_extendqisi2
+	mov	r1, r5
+	mov	r0, r7
+	lsl	r8, r6, #5
+	bl	FlashMemCmp8
 	mov	r4, r0
-	mov	r0, r5
-	bl	flash_exit_slc_mode
-.L958:
+	cbnz	r0, .L870
+	ldr	r5, .L877+8
+	mov	r3, r4
+	ldr	r2, .L877+12
+	add	r5, r5, r8
+	ldrb	r0, [r5, #22]	@ zero_extendqisi2
+	mov	r1, r2
+.L871:
+	lsls	r6, r3, #5
+	ldrb	r6, [r6, r2]	@ zero_extendqisi2
+	cmp	r6, r0
+	beq	.L874
+	adds	r3, r3, #1
+	cmp	r3, #4
+	bne	.L871
+.L874:
+	add	r1, r1, r3, lsl #5
+	movs	r2, #32
+	ldr	r0, .L877+16
+	bl	ftl_memcpy
+	movs	r2, #32
+	mov	r1, r5
+	ldr	r0, .L877+20
+	bl	ftl_memcpy
+	b	.L869
+.L870:
+	adds	r6, r6, #1
+	adds	r7, r7, #32
+	cmp	r6, #73
+	bne	.L872
+	mov	r4, #-1
+.L869:
 	mov	r0, r4
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L961:
+	pop	{r4, r5, r6, r7, r8, pc}
+.L878:
 	.align	2
-.L960:
-	.word	.LANCHOR4
-	.word	.LANCHOR35
-	.word	.LANCHOR30
-	.word	.LANCHOR29
-	.word	.LC12
+.L877:
+	.word	.LANCHOR140+1
+	.word	.LANCHOR22
+	.word	.LANCHOR140
+	.word	.LANCHOR141
 	.word	.LANCHOR7
-	.word	.LANCHOR153
-	.size	FlashReadPage, .-FlashReadPage
-	.section	.text.ftl_memcmp,"ax",%progbits
+	.word	.LANCHOR29
+	.size	FlashLoadPhyInfoInRam, .-FlashLoadPhyInfoInRam
+	.section	.text.ftl_memcpy32,"ax",%progbits
 	.align	1
-	.global	ftl_memcmp
+	.global	ftl_memcpy32
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	ftl_memcmp, %function
-ftl_memcmp:
+	.fpu softvfp
+	.type	ftl_memcpy32, %function
+ftl_memcpy32:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	memcmp
-	.size	ftl_memcmp, .-ftl_memcmp
-	.section	.text.rknand_get_clk_rate,"ax",%progbits
+	movs	r3, #0
+	push	{r4, lr}
+.L880:
+	cmp	r3, r2
+	bne	.L881
+	pop	{r4, pc}
+.L881:
+	ldr	r4, [r1, r3, lsl #2]
+	str	r4, [r0, r3, lsl #2]
+	adds	r3, r3, #1
+	b	.L880
+	.size	ftl_memcpy32, .-ftl_memcpy32
+	.section	.text.NandcCopy1KB,"ax",%progbits
 	.align	1
-	.global	rknand_get_clk_rate
+	.global	NandcCopy1KB
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	rknand_get_clk_rate, %function
-rknand_get_clk_rate:
-	@ args = 0, pretend = 0, frame = 0
+	.fpu softvfp
+	.type	NandcCopy1KB, %function
+NandcCopy1KB:
+	@ args = 4, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r0, .L964
-	bx	lr
-.L965:
-	.align	2
-.L964:
-	.word	148000000
-	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
-	.section	.text.ftl_malloc,"ax",%progbits
+	cmp	r1, #1
+	push	{r4, r5, r6, lr}
+	mov	r4, r2
+	add	r2, r0, #4096
+	add	r6, r0, #512
+	add	r0, r2, r4, lsl #9
+	ldr	r5, [sp, #16]
+	bne	.L883
+	cbz	r3, .L884
+	lsls	r1, r3, #30
+	bne	.L885
+	mov	r2, #256
+	mov	r1, r3
+	bl	ftl_memcpy32
+.L884:
+	cbz	r5, .L882
+	ldrb	r2, [r5, #1]	@ zero_extendqisi2
+	lsrs	r4, r4, #1
+	ldrb	r3, [r5]	@ zero_extendqisi2
+	add	r4, r4, r4, lsl #1
+	lsls	r4, r4, #4
+	orr	r3, r3, r2, lsl #8
+	ldrb	r2, [r5, #2]	@ zero_extendqisi2
+	orr	r3, r3, r2, lsl #16
+	ldrb	r2, [r5, #3]	@ zero_extendqisi2
+	orr	r3, r3, r2, lsl #24
+	str	r3, [r6, r4]
+	pop	{r4, r5, r6, pc}
+.L885:
+	mov	r2, #1024
+	mov	r1, r3
+	bl	ftl_memcpy
+	b	.L884
+.L883:
+	cbz	r3, .L888
+	lsls	r2, r3, #30
+	bne	.L889
+	mov	r1, r0
+	mov	r2, #256
+	mov	r0, r3
+	bl	ftl_memcpy32
+.L888:
+	cbz	r5, .L882
+	lsrs	r4, r4, #1
+	add	r4, r4, r4, lsl #1
+	lsls	r4, r4, #4
+	ldr	r3, [r6, r4]
+	strb	r3, [r5]
+	lsrs	r2, r3, #8
+	strb	r2, [r5, #1]
+	lsrs	r2, r3, #16
+	lsrs	r3, r3, #24
+	strb	r2, [r5, #2]
+	strb	r3, [r5, #3]
+.L882:
+	pop	{r4, r5, r6, pc}
+.L889:
+	mov	r1, r0
+	mov	r2, #1024
+	mov	r0, r3
+	bl	ftl_memcpy
+	b	.L888
+	.size	NandcCopy1KB, .-NandcCopy1KB
+	.section	.text.NandcXferData,"ax",%progbits
 	.align	1
-	.global	ftl_malloc
+	.global	NandcXferData
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	ftl_malloc, %function
-ftl_malloc:
-	@ args = 0, pretend = 0, frame = 0
+	.fpu softvfp
+	.type	NandcXferData, %function
+NandcXferData:
+	@ args = 4, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r7, r3
+	ldr	r3, .L936
+	sub	sp, sp, #96
+	mov	r6, r0
+	mov	r10, r2
+	str	r1, [sp, #12]
+	ldr	r5, [r3, r0, lsl #3]
+	lsls	r3, r7, #26
+	ldr	r4, [sp, #128]
+	bne	.L901
+	cbnz	r4, .L902
+	add	r4, sp, #32
+	movs	r2, #64
+	movs	r1, #255
+	add	r0, sp, #32
+	bl	ftl_memset
+.L902:
+	movs	r3, #0
+	mov	r2, r10
+	ldr	r1, [sp, #12]
+	mov	r0, r6
+	str	r4, [sp, #4]
+	str	r7, [sp]
+	bl	NandcXferStart
+	mov	r0, r6
+	bl	NandcXferComp
+	ldr	r3, [sp, #12]
+	cmp	r3, #0
+	bne	.L926
+	ldr	r2, .L936+4
+	lsr	r0, r10, #1
+	ldr	ip, .L936+12
+	ldr	r3, [r2]
+	cmp	r3, #25
+	ldr	r3, [sp, #12]
+	ite	cc
+	movcc	r7, #64
+	movcs	r7, #128
+	mov	r1, r3
+.L905:
+	cmp	r1, r0
+	add	r4, r4, #4
+	add	r6, r7, r3
+	bcc	.L906
+	ldr	r3, .L936+8
+	lsr	r4, r10, #2
+	ldr	r0, [r2]
+	movs	r2, #0
+	mov	r8, r2
+	ldr	r1, [r3]
+.L907:
+	cmp	r2, r4
+	bcs	.L903
+	cbnz	r0, .L913
+.L903:
+	movs	r3, #0
+	str	r3, [r5, #16]
+.L914:
+	ldr	r3, .L936+8
+	ldr	r3, [r3]
+	cmp	r3, #5
+	bls	.L900
+	ldr	r3, [sp, #12]
+	cbnz	r3, .L900
+	ldr	r3, [r5]
+	and	r2, r3, #139264
+	cmp	r2, #139264
+	ittt	eq
+	moveq	r8, #-1
+	orreq	r3, r3, #131072
+	streq	r3, [r5]
+.L900:
+	mov	r0, r8
+	add	sp, sp, #96
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L906:
+	bic	lr, r3, #3
+	ldr	r3, [ip, #4]
+	adds	r1, r1, #1
+	ldr	r3, [r3, lr]
+	strb	r3, [r4, #-4]
+	lsr	lr, r3, #8
+	strb	lr, [r4, #-3]
+	lsr	lr, r3, #16
+	lsrs	r3, r3, #24
+	strb	lr, [r4, #-2]
+	strb	r3, [r4, #-1]
+	mov	r3, r6
+	b	.L905
+.L913:
+	add	r3, r2, #8
+	ldr	r3, [r5, r3, lsl #2]
+	str	r3, [sp, #28]
+	ldr	r3, [sp, #28]
+	lsls	r6, r3, #29
+	bmi	.L929
+	ldr	r3, [sp, #28]
+	ubfx	r3, r3, #15, #1
+	cmp	r3, #0
+	bne	.L929
+	cmp	r1, #5
+	bls	.L909
+	ldr	r6, [sp, #28]
+	ldr	r3, [sp, #28]
+	ubfx	r6, r6, #3, #5
+	ubfx	ip, r3, #27, #1
+	ldr	r3, [sp, #28]
+	ldr	r7, [sp, #28]
+	orr	r6, r6, ip, lsl #5
+	ubfx	r3, r3, #16, #5
+	ubfx	r7, r7, #29, #1
+	orr	r3, r3, r7, lsl #5
+	cmp	r6, r3
+	ldr	r3, [sp, #28]
+	itete	hi
+	ldrhi	r6, [sp, #28]
+	ldrls	r6, [sp, #28]
+	ubfxhi	r3, r3, #3, #5
+	ubfxls	r3, r3, #16, #5
+	ite	hi
+	ubfxhi	r6, r6, #27, #1
+	ubfxls	r6, r6, #29, #1
+.L935:
+	orr	r3, r3, r6, lsl #5
+.L911:
+	cmp	r8, r3
+	it	cc
+	movcc	r8, r3
+.L908:
+	adds	r2, r2, #1
+	b	.L907
+.L909:
+	cmp	r1, #3
+	bls	.L911
+	ldr	r6, [sp, #28]
+	ldr	r3, [sp, #28]
+	ubfx	r6, r6, #3, #5
+	ubfx	ip, r3, #28, #1
+	ldr	r3, [sp, #28]
+	ldr	r7, [sp, #28]
+	orr	r6, r6, ip, lsl #5
+	ubfx	r3, r3, #16, #5
+	ubfx	r7, r7, #30, #1
+	orr	r3, r3, r7, lsl #5
+	cmp	r6, r3
+	ldr	r3, [sp, #28]
+	itete	hi
+	ldrhi	r6, [sp, #28]
+	ldrls	r6, [sp, #28]
+	ubfxhi	r3, r3, #3, #5
+	ubfxls	r3, r3, #16, #5
+	ite	hi
+	ubfxhi	r6, r6, #28, #1
+	ubfxls	r6, r6, #30, #1
+	b	.L935
+.L929:
+	mov	r8, #-1
+	b	.L908
+.L926:
+	mov	r8, #0
+	b	.L903
+.L901:
+	ldr	r3, [sp, #12]
+	cmp	r3, #1
+	bne	.L915
+	cmp	r4, #0
+	mov	r8, #0
+	ite	ne
+	movne	r3, #4
+	moveq	r3, #0
+	str	r3, [sp, #16]
+.L916:
+	cmp	r8, r10
+	bcc	.L918
+	mov	r8, #0
+	b	.L914
+.L918:
+	and	fp, r8, #3
+	cbz	r7, .L931
+	add	r3, r7, r8, lsl #9
+.L917:
+	str	r4, [sp]
+	mov	r2, fp
+	movs	r1, #1
+	mov	r0, r5
+	bl	NandcCopy1KB
+	movs	r3, #0
+	movs	r2, #2
+	str	r3, [sp, #4]
+	movs	r1, #1
+	str	r3, [sp]
+	mov	r0, r6
+	mov	r3, fp
+	add	r8, r8, #2
+	bl	NandcXferStart
+	mov	r0, r6
+	bl	NandcXferComp
+	ldr	r3, [sp, #16]
+	add	r4, r4, r3
+	b	.L916
+.L931:
+	mov	r3, r7
+	b	.L917
+.L915:
+	mov	r8, #0
+	movs	r2, #2
+	mov	r3, r8
+	str	r8, [sp, #4]
+	str	r8, [sp]
+	mov	r1, r8
+	bl	NandcXferStart
+	mov	fp, r7
+	cmp	r4, r8
+	str	r4, [sp, #16]
+	mov	r4, r8
+	ite	ne
+	movne	r3, #4
+	moveq	r3, r8
+	str	r3, [sp, #20]
+.L919:
+	cmp	r4, r10
+	bcs	.L914
+	mov	r0, r6
+	adds	r4, r4, #2
+	bl	NandcXferComp
+	ldr	r3, [r5, #32]
+	cmp	r10, r4
+	str	r3, [sp, #28]
+	bls	.L920
+	movs	r3, #0
+	movs	r2, #2
+	str	r3, [sp, #4]
 	movs	r1, #0
-	b	kmalloc
-	.size	ftl_malloc, .-ftl_malloc
-	.section	.text.FtlMemInit,"ax",%progbits
+	str	r3, [sp]
+	mov	r0, r6
+	and	r3, r4, #3
+	bl	NandcXferStart
+.L920:
+	ldr	r3, [sp, #28]
+	lsls	r3, r3, #29
+	bmi	.L932
+	ldr	r3, [sp, #28]
+	ldr	r2, [sp, #28]
+	ubfx	r3, r3, #3, #5
+	ubfx	r2, r2, #27, #1
+	orr	r3, r3, r2, lsl #5
+	cmp	r8, r3
+	it	cc
+	movcc	r8, r3
+.L921:
+	ldr	r3, [sp, #16]
+	cmp	r7, #0
+	sub	r2, r4, #2
+	mov	r1, #0
+	and	r2, r2, #3
+	mov	r0, r5
+	str	r3, [sp]
+	ite	ne
+	movne	r3, fp
+	moveq	r3, #0
+	add	fp, fp, #1024
+	bl	NandcCopy1KB
+	ldr	r3, [sp, #16]
+	ldr	r2, [sp, #20]
+	add	r3, r3, r2
+	str	r3, [sp, #16]
+	b	.L919
+.L932:
+	mov	r8, #-1
+	b	.L921
+.L937:
+	.align	2
+.L936:
+	.word	.LANCHOR6
+	.word	.LANCHOR30
+	.word	.LANCHOR32
+	.word	.LANCHOR33
+	.size	NandcXferData, .-NandcXferData
+	.section	.text.FlashReadRawPage,"ax",%progbits
 	.align	1
-	.global	FtlMemInit
+	.global	FlashReadRawPage
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlMemInit, %function
-FtlMemInit:
-	@ args = 0, pretend = 0, frame = 8
+	.fpu softvfp
+	.type	FlashReadRawPage, %function
+FlashReadRawPage:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L972
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	movs	r1, #0
-	strh	r1, [r3, #0]	@ movhi
-	movs	r5, #12
-	ldr	r3, .L972+4
-	ldr	r2, .L972+8
-	ldr	r4, .L972+12
-	str	r1, [r3, #0]
-	ldr	r3, .L972+16
-	ldrh	r0, [r4, #0]
-	ldr	r8, .L972+304
-	str	r1, [r3, #0]
-	ldr	r3, .L972+20
-	lsls	r0, r0, #1
-	ldr	r7, .L972+24
-	str	r1, [r3, #0]
-	ldr	r3, .L972+28
-	str	r1, [r3, #0]
-	ldr	r3, .L972+32
-	str	r1, [r3, #0]
-	ldr	r3, .L972+36
-	str	r1, [r3, #0]
-	ldr	r3, .L972+40
-	str	r1, [r3, #0]
-	ldr	r3, .L972+44
-	str	r1, [r3, #0]
-	ldr	r3, .L972+48
-	str	r1, [r3, #0]
-	ldr	r3, .L972+52
-	str	r1, [r3, #0]
-	ldr	r3, .L972+56
-	str	r1, [r3, #0]
-	ldr	r3, .L972+60
-	str	r1, [r3, #0]
-	ldr	r3, .L972+64
-	str	r1, [r3, #0]
-	ldr	r3, .L972+68
-	str	r1, [r3, #0]
-	ldr	r3, .L972+72
-	str	r1, [r3, #0]
-	ldr	r3, .L972+76
-	str	r1, [r3, #0]
-	ldr	r3, .L972+80
-	str	r1, [r3, #0]
-	movw	r3, #65535
-	str	r3, [r2, #0]
-	ldr	r2, .L972+84
-	str	r1, [r2, #0]
-	ldr	r2, .L972+88
-	str	r1, [r2, #0]
-	ldr	r2, .L972+92
-	str	r1, [r2, #0]
-	ldr	r2, .L972+96
-	strh	r3, [r2, #0]	@ movhi
-	ldr	r2, .L972+100
-	strh	r3, [r2, #0]	@ movhi
-	movs	r2, #32
-	ldr	r3, .L972+104
-	strh	r2, [r3, #0]	@ movhi
-	movs	r2, #128
-	ldr	r3, .L972+108
-	strh	r2, [r3, #0]	@ movhi
-	ldr	r3, .L972+112
-	strh	r1, [r3, #0]	@ movhi
-	ldr	r3, .L972+116
-	strh	r1, [r3, #0]	@ movhi
-	ldr	r3, .L972+120
-	strh	r1, [r3, #0]	@ movhi
-	ldr	r3, .L972+124
-	strh	r1, [r3, #0]	@ movhi
-	str	r1, [sp, #4]
-	bl	ftl_malloc
-	ldr	r3, .L972+128
-	str	r0, [r3, #0]
-	ldrh	r0, [r4, #0]
-	muls	r0, r5, r0
-	bl	ftl_malloc
-	ldr	r3, .L972+132
-	movs	r4, #36
-	str	r0, [r3, #0]
-	ldrh	r3, [r8, #0]
-	muls	r4, r3, r4
-	lsls	r6, r4, #2
-	mov	r0, r6
-	bl	ftl_malloc
-	ldr	r3, .L972+136
-	str	r0, [r3, #0]
-	mov	r0, r4
-	bl	ftl_malloc
-	ldr	r3, .L972+140
-	str	r0, [r3, #0]
-	mov	r0, r6
-	bl	ftl_malloc
-	ldr	r3, .L972+144
-	ldr	r6, .L972+148
-	str	r0, [r3, #0]
-	mov	r0, r4
-	bl	ftl_malloc
-	ldr	r3, .L972+152
-	str	r0, [r3, #0]
+	mov	r8, r3
+	ldr	r3, .L940
+	mov	r6, r1
+	mov	r7, r2
+	mov	r4, r0
+	ldrb	r5, [r3, #9]	@ zero_extendqisi2
+	cbnz	r0, .L939
+	ldr	r3, .L940+4
+	ldr	r2, .L940+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	ldr	r0, [r2]
+	muls	r0, r3, r0
+	cmp	r0, r1
+	it	hi
+	movhi	r5, #4
+.L939:
 	mov	r0, r4
-	bl	ftl_malloc
-	ldr	r3, .L972+156
-	ldrh	r4, [r6, #0]
-	str	r0, [r3, #0]
+	bl	NandcWaitFlashReady
 	mov	r0, r4
-	ldrh	r3, [r8, #0]
-	lsls	r3, r3, #1
-	adds	r3, r3, #1
-	str	r3, [r7, #0]
-	bl	ftl_malloc
-	ldr	r3, .L972+160
-	str	r0, [r3, #0]
+	bl	NandcFlashCs
+	mov	r1, r6
 	mov	r0, r4
-	bl	ftl_malloc
-	ldr	r3, .L972+164
-	str	r0, [r3, #0]
+	bl	FlashReadCmd
 	mov	r0, r4
-	bl	ftl_malloc
-	ldr	r3, .L972+168
-	str	r0, [r3, #0]
-	ldr	r0, [r7, #0]
-	muls	r0, r4, r0
-	bl	ftl_malloc
-	ldr	r3, .L972+172
-	str	r0, [r3, #0]
+	bl	NandcWaitFlashReady
+	mov	r3, r7
+	mov	r2, r5
+	str	r8, [sp]
+	movs	r1, #0
 	mov	r0, r4
-	bl	ftl_malloc
-	ldr	r3, .L972+176
-	str	r0, [r3, #0]
+	bl	NandcXferData
+	mov	r1, r0
 	mov	r0, r4
-	bl	ftl_malloc
-	ldr	r3, .L972+180
-	ldr	r4, .L972+184
-	str	r0, [r3, #0]
-	ldr	r0, [r7, #0]
-	muls	r0, r5, r0
-	bl	ftl_malloc
-	ldr	r3, .L972+188
-	ldrh	r8, [r8, #0]
-	str	r0, [r3, #0]
-	ldrh	r3, [r4, #0]
-	mul	r8, r8, r3
-	mov	r0, r8
-	bl	ftl_malloc
-	ldr	r3, .L972+192
-	str	r0, [r3, #0]
-	lsl	r0, r8, #2
-	bl	ftl_malloc
-	ldr	r3, .L972+196
-	str	r0, [r3, #0]
-	ldrh	r3, [r4, #0]
-	ldr	r0, [r7, #0]
-	muls	r0, r3, r0
-	bl	ftl_malloc
-	ldr	r4, .L972+200
-	ldr	r3, .L972+204
-	ldr	r7, .L972+208
-	str	r0, [r3, #0]
-	ldrh	r0, [r4, #0]
-	lsls	r0, r0, #1
-	uxth	r0, r0
-	strh	r0, [r7, #0]	@ movhi
-	bl	ftl_malloc
-	ldr	r3, .L972+212
-	str	r0, [r3, #0]
-	ldrh	r0, [r7, #0]
-	addw	r0, r0, #547
-	lsrs	r0, r0, #9
-	strh	r0, [r7, #0]	@ movhi
-	ldr	r7, .L972+216
-	lsls	r0, r0, #9
-	bl	ftl_malloc
-	ldr	r3, .L972+220
-	str	r0, [r3, #0]
-	adds	r0, r0, #32
-	ldr	r3, .L972+224
-	str	r0, [r3, #0]
-	ldrh	r0, [r4, #0]
-	lsls	r0, r0, #1
-	bl	ftl_malloc
-	ldr	r3, .L972+228
-	str	r0, [r3, #0]
-	ldr	r3, [r7, #0]
-	lsl	r8, r3, #1
-	mov	r0, r8
-	bl	ftl_malloc
-	ldr	r3, .L972+232
-	str	r0, [r3, #0]
-	mov	r0, r8
-	bl	ftl_malloc
-	ldr	r3, .L972+236
-	ldr	r8, .L972+308
-	str	r0, [r3, #0]
-	ldrh	r0, [r4, #0]
-	lsrs	r0, r0, #3
-	adds	r0, r0, #4
-	bl	ftl_malloc
-	ldr	r3, .L972+240
-	str	r0, [r3, #0]
-	ldrh	r0, [r8, #0]
-	lsls	r0, r0, #1
-	bl	ftl_malloc
-	ldr	r3, .L972+244
-	str	r0, [r3, #0]
-	ldrh	r0, [r8, #0]
-	lsls	r0, r0, #1
-	bl	ftl_malloc
-	ldr	r3, .L972+248
-	str	r0, [r3, #0]
-	ldrh	r0, [r8, #0]
-	ldr	r8, .L972+312
-	lsls	r0, r0, #2
-	bl	ftl_malloc
-	ldr	r3, .L972+252
-	str	r0, [r3, #0]
-	ldrh	r0, [r8, #0]
-	lsls	r0, r0, #2
-	bl	ftl_malloc
-	ldr	r3, .L972+256
-	ldrh	r2, [r8, #0]
-	ldr	r1, [sp, #4]
-	lsls	r2, r2, #2
-	str	r0, [r3, #0]
-	bl	memset
-	ldr	r3, .L972+260
-	ldrh	r8, [r3, #0]
-	lsl	r8, r8, #2
-	mov	r0, r8
-	bl	ftl_malloc
-	ldr	r3, .L972+264
-	str	r0, [r3, #0]
-	mov	r0, r8
-	bl	ftl_malloc
-	ldr	r3, .L972+268
-	str	r0, [r3, #0]
-	ldr	r0, [r7, #0]
-	ldr	r7, .L972+272
-	lsls	r0, r0, #2
-	bl	ftl_malloc
-	ldr	r3, .L972+276
-	str	r0, [r3, #0]
-	ldrh	r0, [r7, #0]
-	muls	r0, r5, r0
-	bl	ftl_malloc
-	ldr	r3, .L972+280
-	ldr	r5, .L972+284
-	str	r0, [r3, #0]
-	ldrh	r3, [r7, #0]
-	ldrh	r0, [r6, #0]
-	muls	r0, r3, r0
-	bl	ftl_malloc
-	ldr	r3, .L972+288
-	str	r0, [r3, #0]
-	movs	r0, #6
-	ldrh	r3, [r4, #0]
-	muls	r0, r3, r0
-	bl	ftl_malloc
-	ldr	r3, .L972+292
-	ldr	r4, .L972+296
-	ldrh	r2, [r5, #0]
-	str	r0, [r3, #0]
-	ldr	r3, .L972+300
-	ldrh	r3, [r3, #0]
-	adds	r3, r3, #31
-	lsrs	r3, r3, #5
-	strh	r3, [r4, #0]	@ movhi
-	muls	r3, r2, r3
-	lsls	r0, r3, #2
-	bl	ftl_malloc
-	b	.L973
-.L974:
-	.align	2
-.L972:
-	.word	.LANCHOR117
-	.word	.LANCHOR154
-	.word	.LANCHOR170
-	.word	.LANCHOR58
-	.word	.LANCHOR155
-	.word	.LANCHOR156
-	.word	.LANCHOR124
-	.word	.LANCHOR157
-	.word	.LANCHOR158
-	.word	.LANCHOR159
-	.word	.LANCHOR160
-	.word	.LANCHOR161
-	.word	.LANCHOR162
-	.word	.LANCHOR163
-	.word	.LANCHOR164
-	.word	.LANCHOR165
-	.word	.LANCHOR85
-	.word	.LANCHOR166
-	.word	.LANCHOR167
-	.word	.LANCHOR168
-	.word	.LANCHOR169
-	.word	.LANCHOR171
-	.word	.LANCHOR172
-	.word	.LANCHOR77
-	.word	.LANCHOR137
-	.word	.LANCHOR138
-	.word	.LANCHOR173
-	.word	.LANCHOR174
-	.word	.LANCHOR175
-	.word	.LANCHOR139
-	.word	.LANCHOR176
-	.word	.LANCHOR141
-	.word	.LANCHOR134
-	.word	.LANCHOR136
-	.word	.LANCHOR177
-	.word	.LANCHOR178
-	.word	.LANCHOR179
-	.word	.LANCHOR61
-	.word	.LANCHOR83
-	.word	.LANCHOR123
-	.word	.LANCHOR86
-	.word	.LANCHOR180
-	.word	.LANCHOR181
-	.word	.LANCHOR120
-	.word	.LANCHOR182
-	.word	.LANCHOR183
-	.word	.LANCHOR62
-	.word	.LANCHOR122
-	.word	.LANCHOR184
-	.word	.LANCHOR185
-	.word	.LANCHOR44
-	.word	.LANCHOR121
-	.word	.LANCHOR186
-	.word	.LANCHOR130
-	.word	.LANCHOR68
-	.word	.LANCHOR187
-	.word	.LANCHOR84
-	.word	.LANCHOR89
-	.word	.LANCHOR112
-	.word	.LANCHOR108
-	.word	.LANCHOR107
-	.word	.LANCHOR75
-	.word	.LANCHOR188
-	.word	.LANCHOR189
-	.word	.LANCHOR190
-	.word	.LANCHOR70
-	.word	.LANCHOR114
-	.word	.LANCHOR191
-	.word	.LANCHOR71
-	.word	.LANCHOR113
-	.word	.LANCHOR102
-	.word	.LANCHOR48
-	.word	.LANCHOR109
-	.word	.LANCHOR87
-	.word	.LANCHOR79
-	.word	.LANCHOR54
-	.word	.LANCHOR41
-	.word	.LANCHOR65
-	.word	.LANCHOR66
-.L973:
-	ldr	r2, .L975
-	ldrh	r4, [r4, #0]
-	movs	r1, #1
-	mov	r3, r2
-	ldrh	r5, [r5, #0]
-	lsls	r4, r4, #2
-	str	r0, [r3, #28]!
-	mov	r0, r4
-	b	.L968
-.L969:
-	ldr	r6, [r2, #28]
-	adds	r1, r1, #1
-	adds	r6, r6, r0
-	adds	r0, r0, r4
-	str	r6, [r3, #4]!
-.L968:
-	cmp	r1, r5
-	bcc	.L969
-	ldr	r0, .L975
-	movs	r3, #0
-	mov	r2, r3
-	add	r0, r0, r1, lsl #2
-	b	.L970
-.L971:
-	adds	r4, r0, r3
-	adds	r1, r1, #1
-	adds	r3, r3, #4
-	str	r2, [r4, #28]
-.L970:
-	cmp	r1, #7
-	bls	.L971
-	movs	r0, #0
-	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
-.L976:
+	bl	NandcFlashDeCs
+	mov	r0, r1
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L941:
 	.align	2
-.L975:
-	.word	.LANCHOR78
-	.size	FtlMemInit, .-FtlMemInit
-	.section	.text.NandcInit,"ax",%progbits
+.L940:
+	.word	.LANCHOR29
+	.word	.LANCHOR2
+	.word	.LANCHOR3
+	.size	FlashReadRawPage, .-FlashReadRawPage
+	.section	.text.FlashLoadPhyInfo,"ax",%progbits
 	.align	1
-	.global	NandcInit
+	.global	FlashLoadPhyInfo
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	NandcInit, %function
-NandcInit:
-	@ args = 0, pretend = 0, frame = 0
+	.fpu softvfp
+	.type	FlashLoadPhyInfo, %function
+FlashLoadPhyInfo:
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	movs	r2, #1
-	ldr	r3, .L978
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r3, #60
+	sub	sp, sp, #24
+	ldr	fp, .L957+8
 	movs	r4, #0
-	ldr	r5, .L978+4
-	stmia	r3, {r0, r4}
-	str	r2, [r3, #12]
+	movs	r7, #4
+	strb	r3, [sp, #20]
+	movs	r3, #40
+	strb	r3, [sp, #21]
+	movs	r3, #24
+	strb	r3, [sp, #22]
+	movs	r3, #16
+	ldr	r1, .L957
+	mov	r0, r4
+	strb	r3, [sp, #23]
+	mov	r6, #-1
+	ldrh	r3, [fp, #10]
+	ldr	r8, .L957+36
+	ldr	r5, .L957+4
+	str	r3, [sp, #4]
+	ldr	r3, [r1]
+	str	r4, [r8]
+	str	r3, [r5]
+	bl	flash_enter_slc_mode
+	mov	r10, r1
+	str	r8, [sp, #12]
+.L943:
+	mov	r8, #0
+	adds	r3, r4, #1
+	str	r3, [sp, #8]
+.L945:
+	add	r3, sp, #20
+	ldrb	r0, [r3, r8]	@ zero_extendqisi2
+	bl	FlashBchSel
+	movs	r3, #0
+	ldr	r2, [r10]
+	mov	r1, r4
+	mov	r0, r3
+	bl	FlashReadRawPage
+	adds	r0, r0, #1
+	bne	.L944
+	movs	r3, #0
+	ldr	r2, [r10]
+	ldr	r1, [sp, #8]
+	mov	r0, r3
+	bl	FlashReadRawPage
+	adds	r0, r0, #1
+	bne	.L944
+	add	r8, r8, #1
+	cmp	r8, #4
+	bne	.L945
+.L946:
+	ldr	r3, [sp, #4]
+	subs	r7, r7, #1
+	add	r4, r4, r3
+	bne	.L943
+	mov	r0, r7
+	b	.L956
+.L947:
+	movw	r1, #2036
+	add	r0, r8, #12
+	bl	JSHash
+	ldr	r3, [r8, #8]
+	cmp	r3, r0
+	bne	.L953
+	movs	r2, #32
+	add	r1, r8, #160
+	ldr	r0, .L957+8
+	bl	ftl_memcpy
+	ldr	r1, [r5]
+	movs	r2, #32
+	ldr	r0, .L957+12
+	adds	r1, r1, #192
+	bl	ftl_memcpy
+	ldr	r1, [r5]
+	mov	r2, #852
+	ldr	r0, .L957+16
+	adds	r1, r1, #224
+	bl	ftl_memcpy
+	ldr	r6, [r5]
+	mov	r0, r4
+	ldr	r3, .L957+20
+	ldrh	r1, [fp, #10]
+	ldr	r2, [r6, #1076]
+	strb	r2, [r3]
+	ldr	r3, [sp, #12]
+	str	r4, [r3]
+	bl	__aeabi_uidiv
+	ldr	r3, .L957+24
+	adds	r2, r0, #1
+	cbz	r0, .L949
+.L955:
+	str	r2, [r3]
+	ldrh	r2, [r6, #14]
+	movs	r6, #0
+	ldr	r3, .L957+28
+	strb	r2, [r3]
+	b	.L946
+.L949:
 	movs	r2, #2
-	str	r0, [r3, #8]
-	str	r2, [r3, #20]
-	movs	r2, #3
-	str	r0, [r3, #16]
-	str	r2, [r3, #28]
-	str	r0, [r3, #24]
-	str	r0, [r5, #0]
-	ldr	r2, .L978+8
-	ldr	r3, [r0, #0]
-	and	r3, r3, #253952
-	ubfx	r1, r3, #13, #1
-	str	r1, [r2, #0]
-	ldr	r2, .L978+12
-	and	r3, r3, #245760
-	ldr	r1, [r0, #352]
-	orr	r3, r3, #256
-	ubfx	r1, r1, #16, #4
-	str	r1, [r2, #0]
-	ldr	r1, [r0, #352]
-	ldr	r2, .L978+16
-	str	r1, [r2, #0]
-	str	r3, [r0, #0]
-	str	r4, [r0, #336]
-	movs	r0, #40
-	bl	NandcTimeCfg
-	ldr	r3, [r5, #0]
-	movw	r2, #8322
-	mov	r0, #36864
-	str	r2, [r3, #344]
-	ldr	r2, .L978+20
-	str	r2, [r3, #304]
-	bl	ftl_malloc
-	ldr	r3, .L978+24
-	str	r0, [r3, #0]
-	ldr	r3, .L978+28
-	str	r0, [r3, #0]
-	add	r0, r0, #32768
-	str	r4, [r3, #24]
-	str	r0, [r3, #4]
-	ldr	r3, .L978+32
-	str	r4, [r3, #0]
-	pop	{r3, r4, r5, pc}
-.L979:
+	b	.L955
+.L953:
+	mov	r6, #-1
+	b	.L946
+.L944:
+	ldr	r8, [r5]
+	ldr	r2, .L957+32
+	ldr	r3, [r8]
+	cmp	r3, r2
+	bne	.L946
+	cmp	r6, #0
+	bne	.L947
+	ldrh	r1, [fp, #10]
+	mov	r0, r4
+	bl	__aeabi_uidiv
+	ldr	r3, .L957+24
+	adds	r0, r0, #1
+	str	r0, [r3]
+	mov	r0, r6
+.L956:
+	bl	flash_exit_slc_mode
+	mov	r0, r6
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L958:
 	.align	2
-.L978:
-	.word	.LANCHOR5
-	.word	.LANCHOR30
-	.word	.LANCHOR192
-	.word	.LANCHOR37
+.L957:
+	.word	.LANCHOR143
 	.word	.LANCHOR142
-	.word	1710593
-	.word	.LANCHOR193
-	.word	.LANCHOR38
-	.word	.LANCHOR39
-	.size	NandcInit, .-NandcInit
-	.section	.text.ftl_free,"ax",%progbits
-	.align	1
-	.global	ftl_free
-	.thumb
-	.thumb_func
-	.type	ftl_free, %function
-ftl_free:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	free
-	.size	ftl_free, .-ftl_free
-	.section	.text.StorageSysDataLoad,"ax",%progbits
-	.align	1
-	.global	StorageSysDataLoad
-	.thumb
-	.thumb_func
-	.type	StorageSysDataLoad, %function
-StorageSysDataLoad:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, lr}
-	mov	r2, #512
-	mov	r5, r0
-	mov	r4, r1
-	mov	r0, r1
-	movs	r1, #0
-	bl	memset
-	movs	r0, #16
-	add	r1, r5, #256
-	movs	r2, #1
-	mov	r3, r4
-	pop	{r4, r5, r6, lr}
-	b	FtlRead
-	.size	StorageSysDataLoad, .-StorageSysDataLoad
-	.section	.text.StorageSysDataStore,"ax",%progbits
-	.align	1
-	.global	StorageSysDataStore
-	.thumb
-	.thumb_func
-	.type	StorageSysDataStore, %function
-StorageSysDataStore:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	mov	r3, r1
-	movs	r2, #1
-	add	r1, r0, #256
-	movs	r0, #16
-	b	FtlWrite
-	.size	StorageSysDataStore, .-StorageSysDataStore
-	.section	.text.FlashCs123Init,"ax",%progbits
-	.align	1
-	.global	FlashCs123Init
-	.thumb
-	.thumb_func
-	.type	FlashCs123Init, %function
-FlashCs123Init:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	bx	lr
-	.size	FlashCs123Init, .-FlashCs123Init
-	.section	.text.rk_nand_de_init,"ax",%progbits
-	.align	1
-	.global	rk_nand_de_init
-	.thumb
-	.thumb_func
-	.type	rk_nand_de_init, %function
-rk_nand_de_init:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	FlashDeInit
-	.size	rk_nand_de_init, .-rk_nand_de_init
-	.section	.text.rk_ftl_get_capacity,"ax",%progbits
+	.word	.LANCHOR29
+	.word	.LANCHOR7
+	.word	.LANCHOR20
+	.word	.LANCHOR28
+	.word	.LANCHOR145
+	.word	.LANCHOR146
+	.word	1312902724
+	.word	.LANCHOR144
+	.size	FlashLoadPhyInfo, .-FlashLoadPhyInfo
+	.section	.text.ToshibaReadRetrial,"ax",%progbits
 	.align	1
-	.global	rk_ftl_get_capacity
+	.global	ToshibaReadRetrial
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	rk_ftl_get_capacity, %function
-rk_ftl_get_capacity:
-	@ args = 0, pretend = 0, frame = 0
+	.fpu softvfp
+	.type	ToshibaReadRetrial, %function
+ToshibaReadRetrial:
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #24
+	mov	r6, r0
+	str	r2, [sp, #12]
+	mov	fp, r3
+	str	r1, [sp, #20]
+	bl	NandcWaitFlashReady
 	ldr	r3, .L986
-	ldr	r0, [r3, #0]
-	bx	lr
+	ldr	r2, .L986+4
+	ldr	r4, [r3, r6, lsl #3]
+	add	r3, r3, r6, lsl #3
+	str	r2, [sp, #16]
+	ldrb	r7, [r3, #4]	@ zero_extendqisi2
+	ldrb	r3, [r2]	@ zero_extendqisi2
+	add	r5, r7, #8
+	subs	r3, r3, #67
+	add	r5, r4, r5, lsl #8
+	cmp	r3, #1
+	bls	.L976
+	ldr	r3, .L986+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L977
+	movs	r0, #0
+	bl	NandcSetDdrMode
+	movs	r3, #1
+.L977:
+	str	r3, [sp, #8]
+	add	r3, r4, r7, lsl #8
+	movs	r2, #92
+	str	r2, [r3, #2056]
+	movs	r2, #197
+	str	r2, [r3, #2056]
+.L960:
+	mov	r8, #1
+	mov	r3, #-1
+	str	r3, [sp, #4]
+.L962:
+	ldr	r3, .L986+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	cmp	r8, r3
+	bcc	.L971
+	ldr	r10, [sp, #4]
+.L970:
+	ldr	r3, [sp, #16]
+	movs	r1, #0
+	mov	r0, r5
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	subs	r2, r2, #67
+	cmp	r2, #1
+	bhi	.L972
+	bl	SandiskSetRRPara
+.L973:
+	add	r4, r4, r7, lsl #8
+	movs	r2, #255
+	str	r2, [r4, #2056]
+	ldr	r2, .L986+16
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	add	r2, r2, r2, lsl #1
+	cmp	r10, r2, asr #2
+	bcc	.L974
+	cmp	r10, #-1
+	it	ne
+	movne	r10, #256
+.L974:
+	mov	r0, r6
+	bl	NandcWaitFlashReady
+	ldr	r3, [sp, #8]
+	cbz	r3, .L959
+	movs	r0, #4
+	bl	NandcSetDdrMode
+.L959:
+	mov	r0, r10
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L976:
+	movs	r3, #0
+	str	r3, [sp, #8]
+	b	.L960
+.L971:
+	ldr	r3, [sp, #16]
+	mov	r0, r5
+	uxtb	r1, r8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	subs	r3, r3, #67
+	cmp	r3, #1
+	bhi	.L963
+	bl	SandiskSetRRPara
+.L964:
+	ldr	r3, [sp, #16]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #34
+	bne	.L965
+	ldr	r3, .L986+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	subs	r3, r3, #3
+	cmp	r8, r3
+	ittt	eq
+	addeq	r3, r4, r7, lsl #8
+	moveq	r2, #179
+	streq	r2, [r3, #2056]
+.L965:
+	add	r3, r4, r7, lsl #8
+	movs	r2, #38
+	str	r2, [r3, #2056]
+	movs	r2, #93
+	str	r2, [r3, #2056]
+	ldr	r3, [sp, #8]
+	cbz	r3, .L966
+	movs	r0, #4
+	bl	NandcSetDdrMode
+	mov	r3, fp
+	ldr	r2, [sp, #12]
+	ldr	r1, [sp, #20]
+	mov	r0, r6
+	bl	FlashReadRawPage
+	mov	r10, r0
+	movs	r0, #0
+	bl	NandcSetDdrMode
+.L967:
+	cmp	r10, #-1
+	beq	.L968
+	ldr	r2, .L986+16
+	ldr	r3, [sp, #4]
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r3, #-1
+	it	eq
+	moveq	r3, r10
+	str	r3, [sp, #4]
+	add	r2, r2, r2, lsl #1
+	cmp	r10, r2, asr #2
+	bcc	.L970
+	mov	fp, #0
+	str	fp, [sp, #12]
+.L968:
+	add	r8, r8, #1
+	b	.L962
+.L963:
+	bl	ToshibaSetRRPara
+	b	.L964
+.L966:
+	mov	r3, fp
+	ldr	r2, [sp, #12]
+	ldr	r1, [sp, #20]
+	mov	r0, r6
+	bl	FlashReadRawPage
+	mov	r10, r0
+	b	.L967
+.L972:
+	bl	ToshibaSetRRPara
+	b	.L973
 .L987:
 	.align	2
 .L986:
-	.word	.LANCHOR72
-	.size	rk_ftl_get_capacity, .-rk_ftl_get_capacity
-	.section	.text.rknand_print_hex,"ax",%progbits
+	.word	.LANCHOR6
+	.word	.LANCHOR10
+	.word	.LANCHOR28
+	.word	.LANCHOR147
+	.word	.LANCHOR31
+	.size	ToshibaReadRetrial, .-ToshibaReadRetrial
+	.section	.text.SamsungReadRetrial,"ax",%progbits
 	.align	1
-	.global	rknand_print_hex
+	.global	SamsungReadRetrial
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	rknand_print_hex, %function
-rknand_print_hex:
+	.fpu softvfp
+	.type	SamsungReadRetrial, %function
+SamsungReadRetrial:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, r8, sl, lr}
-	movs	r7, #0
-	mov	sl, r0
-	mov	r4, r1
-	mov	r5, r2
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r7, r0
+	mov	r10, r2
 	mov	r8, r3
-	mov	r6, r7
-	b	.L989
-.L995:
-	cbnz	r7, .L990
-	ldr	r0, .L997
-	mov	r1, sl
-	mov	r2, r6
-	bl	printf
+	mov	fp, r1
+	movs	r6, #1
+	bl	NandcWaitFlashReady
+	ldr	r2, .L1001
+	mov	r4, #-1
+	add	r3, r2, r7, lsl #3
+	ldrb	r5, [r3, #4]	@ zero_extendqisi2
+	add	r3, r5, #8
+	ldr	r5, [r2, r7, lsl #3]
+	add	r5, r5, r3, lsl #8
+.L989:
+	ldr	r3, .L1001+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	cmp	r6, r3
+	bcc	.L993
+.L992:
+	movs	r1, #0
+	mov	r0, r5
+	bl	SamsungSetRRPara
+	ldr	r3, .L1001+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r4, r3, asr #2
+	bcc	.L988
+	adds	r3, r4, #1
+	it	ne
+	movne	r4, #256
+.L988:
+	mov	r0, r4
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L993:
+	uxtb	r1, r6
+	mov	r0, r5
+	bl	SamsungSetRRPara
+	mov	r2, r10
+	mov	r3, r8
+	mov	r1, fp
+	mov	r0, r7
+	bl	FlashReadRawPage
+	adds	r2, r0, #1
+	beq	.L990
+	ldr	r3, .L1001+8
+	cmp	r4, #-1
+	it	eq
+	moveq	r4, r0
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r0, r3, asr #2
+	bcc	.L996
+	mov	r8, #0
+	mov	r10, r8
 .L990:
-	cmp	r5, #4
-	ldr	r0, .L997+4
-	bne	.L991
-	ldr	r1, [r4, r6, lsl #2]
-	b	.L996
-.L991:
-	cmp	r5, #2
-	ite	eq
-	ldrsheq	r1, [r4, r6, lsl #1]
-	ldrbne	r1, [r4, r6]	@ zero_extendqisi2
-.L996:
-	adds	r7, r7, #1
-	bl	printf
-	cmp	r7, #15
-	bls	.L994
-	ldr	r0, .L997+8
-	movs	r7, #0
-	ldr	r1, .L997+12
-	bl	printf
-.L994:
 	adds	r6, r6, #1
-.L989:
-	cmp	r6, r8
-	bne	.L995
-	ldr	r0, .L997+8
-	ldr	r1, .L997+12
-	pop	{r3, r4, r5, r6, r7, r8, sl, lr}
-	b	printf
-.L998:
+	b	.L989
+.L996:
+	mov	r4, r0
+	b	.L992
+.L1002:
 	.align	2
-.L997:
-	.word	.LC13
-	.word	.LC14
-	.word	.LC4
-	.word	.LC15
-	.size	rknand_print_hex, .-rknand_print_hex
-	.section	.text.FlashReadSlc2KPages,"ax",%progbits
+.L1001:
+	.word	.LANCHOR6
+	.word	.LANCHOR147
+	.word	.LANCHOR31
+	.size	SamsungReadRetrial, .-SamsungReadRetrial
+	.section	.text.MicronReadRetrial,"ax",%progbits
 	.align	1
-	.global	FlashReadSlc2KPages
+	.global	MicronReadRetrial
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FlashReadSlc2KPages, %function
-FlashReadSlc2KPages:
-	@ args = 0, pretend = 0, frame = 16
+	.fpu softvfp
+	.type	MicronReadRetrial, %function
+MicronReadRetrial:
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1013
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	sub	sp, sp, #24
-	mov	r7, r1
-	ldrb	r8, [r3, #9]	@ zero_extendqisi2
-	str	r2, [sp, #12]
-	mov	r4, r0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r10, r3
+	ldr	r3, .L1018
+	sub	sp, sp, #32
+	mov	r7, r0
+	mov	fp, r2
+	str	r1, [sp, #16]
+	ldrb	r4, [r3]	@ zero_extendqisi2
+	ldr	r3, .L1018+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L1004
+	add	r4, r4, r4, lsl #1
+	asrs	r4, r4, #2
+.L1005:
+	mov	r0, r7
+	bl	NandcWaitFlashReady
+	ldr	r3, .L1018+8
 	movs	r6, #0
-	ldr	sl, .L1013+28
-	b	.L1000
+	mov	r5, #-1
+	ldr	r2, [r3, r7, lsl #3]
+	add	r3, r3, r7, lsl #3
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+	str	r2, [sp, #8]
+	str	r3, [sp, #12]
+	lsls	r3, r3, #8
+	str	r3, [sp, #24]
+.L1006:
+	ldr	r3, .L1018+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r6, r3
+	bcc	.L1010
 .L1009:
-	subs	r3, r7, r6
-	ldr	r1, [sp, #12]
-	add	r2, sp, #20
-	mov	r0, r4
-	uxtb	r3, r3
-	str	r3, [sp, #0]
-	add	r3, sp, #16
-	bl	LogAddr2PhyAddr
-	ldr	r1, .L1013+4
-	ldr	r3, [sp, #16]
-	ldrb	r2, [r1, #0]	@ zero_extendqisi2
-	cmp	r3, r2
-	bcc	.L1001
-	mov	r3, #-1
-	str	r3, [r4, #0]
-	b	.L1002
-.L1001:
-	ldr	r2, .L1013+8
-	ldrb	r5, [r2, r3]	@ zero_extendqisi2
-	mov	r0, r5
-	bl	NandcWaitFlashReady
-	mov	r0, r5
-	bl	NandcFlashCs
-	ldr	r1, [sp, #20]
-	mov	r0, r5
-	bl	FlashReadCmd
-	mov	r0, r5
-	bl	NandcWaitFlashReady
-	ldr	r3, [r4, #12]
-	movs	r1, #0
-	mov	r2, r8
-	mov	r0, r5
-	str	r3, [sp, #0]
-	ldr	r3, [r4, #8]
-	bl	NandcXferData
-	ldr	r3, [sp, #20]
-	ldr	r1, [sl, #0]
-	adds	r1, r1, r3
-	mov	fp, r0
-	mov	r0, r5
-	bl	FlashReadCmd
-	ldr	r3, [r4, #8]
-	cbz	r3, .L1003
-	add	r3, r3, #2048
+	ldr	r3, [sp, #8]
+	movs	r0, #200
+	ldr	r2, [sp, #12]
+	add	r7, r3, r2, lsl #8
+	movs	r3, #239
+	str	r3, [r7, #2056]
+	movs	r3, #137
+	str	r3, [r7, #2052]
+	bl	udelay
+	cmp	r5, r4
+	mov	r3, #0
+	str	r3, [r7, #2048]
+	str	r3, [r7, #2048]
+	str	r3, [r7, #2048]
+	str	r3, [r7, #2048]
+	bcc	.L1003
+	adds	r3, r5, #1
+	ldr	r2, [sp, #16]
+	it	ne
+	movne	r5, #256
+	mov	r3, r6
+	str	r5, [sp]
+	mov	r1, r6
+	ldr	r0, .L1018+16
+	bl	printf
 .L1003:
-	ldr	r2, [r4, #12]
-	cbz	r2, .L1004
-	adds	r2, r2, #8
-.L1004:
-	movs	r1, #0
-	str	r2, [sp, #0]
 	mov	r0, r5
-	mov	r2, r8
-	bl	NandcXferData
-	mov	r3, r0
-	mov	r0, r5
-	str	r3, [sp, #8]
-	bl	NandcFlashDeCs
-	ldr	r2, .L1013+12
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1004:
+	ldr	r3, .L1018+20
+	smull	r4, r5, r4, r3
+	mov	r4, r5
+	b	.L1005
+.L1010:
+	ldr	r2, [sp, #24]
+	movs	r0, #200
 	ldr	r3, [sp, #8]
-	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	cmp	r3, fp
-	it	cc
-	movcc	r3, fp
-	add	r2, r2, r2, lsl #1
-	cmp	r3, r2, lsr #2
-	bls	.L1005
-	cmp	r3, #-1
-	ite	eq
-	moveq	r3, #-1
-	movne	r3, #256
-.L1005:
-	adds	r0, r3, #1
-	str	r3, [r4, #0]
-	beq	.L1006
-	cmp	r3, #256
-	beq	.L1006
-	movs	r3, #0
-	str	r3, [r4, #0]
-.L1006:
-	ldr	r3, [r4, #12]
-	cbz	r3, .L1007
-	ldr	r2, [r3, #8]
-	adds	r1, r2, #1
-	bne	.L1007
-	ldr	r3, [r3, #0]
-	adds	r3, r3, #1
-	it	ne
-	strne	r2, [r4, #0]
+	mov	r8, #0
+	add	r3, r3, r2
+	movs	r2, #239
+	str	r2, [r3, #2056]
+	movs	r2, #137
+	str	r2, [r3, #2052]
+	str	r3, [sp, #28]
+	bl	udelay
+	adds	r3, r6, #1
+	ldr	r1, [sp, #16]
+	mov	r2, r3
+	str	r3, [sp, #20]
+	ldr	r3, [sp, #28]
+	mov	r0, r7
+	str	r2, [r3, #2048]
+	mov	r2, fp
+	str	r8, [r3, #2048]
+	str	r8, [r3, #2048]
+	str	r8, [r3, #2048]
+	mov	r3, r10
+	bl	FlashReadRawPage
+	adds	r2, r0, #1
+	beq	.L1007
+	cmp	r5, #-1
+	it	eq
+	moveq	r5, r0
+	cmp	r0, r4
+	bcc	.L1013
+	mov	r10, r8
+	mov	fp, r8
 .L1007:
-	ldr	r3, [r4, #0]
-	adds	r2, r3, #1
-	bne	.L1002
-	ldr	r2, .L1013+12
-	ldr	r1, [r4, #4]
-	ldr	r0, .L1013+16
-	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	bl	printf
-	ldr	r1, [r4, #8]
-	cbz	r1, .L1008
-	ldr	r0, .L1013+20
-	movs	r2, #4
-	movs	r3, #8
-	bl	rknand_print_hex
-.L1008:
-	ldr	r1, [r4, #12]
-	cbz	r1, .L1002
-	movs	r2, #4
-	ldr	r0, .L1013+24
-	mov	r3, r2
-	bl	rknand_print_hex
-.L1002:
-	adds	r6, r6, #1
-	adds	r4, r4, #36
-.L1000:
-	cmp	r6, r7
-	bne	.L1009
-	movs	r0, #0
-	add	sp, sp, #24
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1014:
-	.align	2
+	ldr	r6, [sp, #20]
+	b	.L1006
 .L1013:
-	.word	.LANCHOR18
-	.word	.LANCHOR16
-	.word	.LANCHOR19
-	.word	.LANCHOR29
-	.word	.LC16
-	.word	.LC17
-	.word	.LC18
-	.word	.LANCHOR2
-	.size	FlashReadSlc2KPages, .-FlashReadSlc2KPages
-	.section	.text.FlashReadPages,"ax",%progbits
+	mov	r5, r0
+	b	.L1009
+.L1019:
+	.align	2
+.L1018:
+	.word	.LANCHOR31
+	.word	.LANCHOR8
+	.word	.LANCHOR6
+	.word	.LANCHOR147
+	.word	.LC7
+	.word	1431655766
+	.size	MicronReadRetrial, .-MicronReadRetrial
+	.section	.text.HynixReadRetrial,"ax",%progbits
 	.align	1
-	.global	FlashReadPages
+	.global	HynixReadRetrial
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FlashReadPages, %function
-FlashReadPages:
-	@ args = 0, pretend = 0, frame = 40
+	.fpu softvfp
+	.type	HynixReadRetrial, %function
+HynixReadRetrial:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1063
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	sub	sp, sp, #48
-	ldrb	r3, [r3, #9]	@ zero_extendqisi2
-	str	r0, [sp, #12]
-	str	r1, [sp, #32]
-	str	r3, [sp, #28]
-	ldr	r3, .L1063+4
-	str	r2, [sp, #20]
-	ldrb	r4, [r3, #0]	@ zero_extendqisi2
-	str	r4, [sp, #36]
-	ldr	r4, .L1063+8
-	ldrb	r4, [r4, #0]	@ zero_extendqisi2
-	cmp	r4, #0
-	beq	.L1049
-	bl	FlashReadSlc2KPages
-	b	.L1017
-.L1048:
-	movs	r3, #36
-	ldr	r4, [sp, #12]
-	add	r2, sp, #44
-	ldr	r1, [sp, #20]
-	mul	r3, r3, fp
-	adds	r7, r4, r3
-	ldr	r4, [sp, #32]
-	mov	r0, r7
-	str	r3, [sp, #16]
-	rsb	r3, fp, r4
-	ldr	r5, [r7, #4]
-	uxtb	r3, r3
-	str	r3, [sp, #0]
-	add	r3, sp, #40
-	bl	LogAddr2PhyAddr
-	ldr	r2, .L1063+12
-	ldr	r3, [sp, #40]
-	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	cmp	r3, r2
-	mov	r8, r0
-	bcc	.L1018
-	ldr	r1, [sp, #12]
-	mov	r3, #-1
-	ldr	r4, [sp, #16]
-	str	r3, [r1, r4]
-	b	.L1019
-.L1018:
-	ldr	r2, .L1063+16
-	ldrb	r4, [r2, r3]	@ zero_extendqisi2
-	ldr	r3, .L1063+20
-	mov	r0, r4
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cmp	r3, #0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	fp, r2
+	ldr	r4, .L1037
+	mov	r8, #0
+	mov	r6, #-1
+	mov	r10, r3
+	mov	r7, r0
+	str	r1, [sp, #4]
+	ldrb	r2, [r4, #2]	@ zero_extendqisi2
+	adds	r3, r4, r0
+	ldrb	r5, [r3, #12]	@ zero_extendqisi2
+	str	r2, [sp]
+	ldr	r2, .L1037+4
+	ldr	r2, [r2]
+	ldrb	r2, [r2, #19]	@ zero_extendqisi2
+	cmp	r2, #7
 	it	eq
-	moveq	r8, #0
+	ldrbeq	r5, [r3, #20]	@ zero_extendqisi2
 	bl	NandcWaitFlashReady
-	ldr	r3, .L1063+24
-	ldr	r3, [r3, #0]
-	ldrb	r0, [r3, #19]	@ zero_extendqisi2
-	subs	r3, r0, #1
-	cmp	r3, #6
-	bhi	.L1021
-	ldr	r2, .L1063+28
-	cmp	r0, #7
-	add	r1, r2, r4
-	ldrb	r3, [r1, #12]	@ zero_extendqisi2
-	it	eq
-	ldrbeq	r3, [r1, #20]	@ zero_extendqisi2
-	ldr	r1, .L1063+32
-	ldrb	r1, [r1, r4]	@ zero_extendqisi2
-	cmp	r1, r3
-	beq	.L1021
-	ldrb	r1, [r2, #1]	@ zero_extendqisi2
-	mov	r0, r4
-	ldr	r2, .L1063+36
+.L1022:
+	ldr	r3, [sp]
+	cmp	r8, r3
+	bcc	.L1027
+.L1026:
+	ldr	r3, .L1037+4
+	add	r4, r4, r7
+	ldr	r3, [r3]
+	ldrb	r3, [r3, #19]	@ zero_extendqisi2
+	cmp	r3, #7
+	ldr	r3, .L1037+8
+	ite	eq
+	strbeq	r5, [r4, #20]
+	strbne	r5, [r4, #12]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r6, r3, asr #2
+	bcc	.L1020
+	adds	r3, r6, #1
+	it	ne
+	movne	r6, #256
+.L1020:
+	mov	r0, r6
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1027:
+	ldr	r3, [sp]
+	adds	r5, r5, #1
+	uxtb	r5, r5
+	ldr	r2, .L1037+12
+	ldrb	r1, [r4, #1]	@ zero_extendqisi2
+	mov	r0, r7
+	cmp	r3, r5
+	it	ls
+	movls	r5, #0
+	mov	r3, r5
 	bl	HynixSetRRPara
-.L1021:
-	mov	r0, r4
-	and	r5, r5, #-2147483648
-	str	r5, [sp, #24]
-	bl	NandcFlashCs
-	ldr	r2, [sp, #20]
-	cmp	r2, #1
-	beq	.L1023
-	ldr	r5, [sp, #24]
-	cbz	r5, .L1024
-.L1023:
-	ldr	r3, .L1063+40
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1024
-	mov	r0, r4
-	bl	flash_enter_slc_mode
-	b	.L1025
+	mov	r2, fp
+	mov	r3, r10
+	ldr	r1, [sp, #4]
+	mov	r0, r7
+	bl	FlashReadRawPage
+	adds	r2, r0, #1
+	beq	.L1024
+	ldr	r3, .L1037+8
+	cmp	r6, #-1
+	it	eq
+	moveq	r6, r0
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r0, r3, asr #2
+	bcc	.L1031
+	mov	r10, #0
+	mov	fp, r10
 .L1024:
-	mov	r0, r4
-	bl	flash_exit_slc_mode
-.L1025:
-	mov	r5, r7
-	movs	r6, #0
-	mov	r7, r8
-.L1062:
-	ldr	r1, [sp, #44]
-	adds	r2, r1, #1
-	bne	.L1027
-	cmp	r4, #255
-	beq	.L1051
-.L1027:
-	cbz	r7, .L1029
-	ldr	r3, .L1063+44
-	mov	r0, r4
-	ldr	r2, [r3, #0]
-	adds	r2, r1, r2
-	bl	FlashReadDpCmd
-	b	.L1030
-.L1029:
-	mov	r0, r4
-	bl	FlashReadCmd
-.L1030:
-	mov	r0, r4
-	bl	NandcWaitFlashReady
-	cbz	r7, .L1028
-	mov	r0, r4
-	ldr	r1, [sp, #44]
-	bl	FlashReadDpDataOutCmd
-	b	.L1028
+	add	r8, r8, #1
+	b	.L1022
+.L1031:
+	mov	r6, r0
+	b	.L1026
+.L1038:
+	.align	2
+.L1037:
+	.word	.LANCHOR20
+	.word	.LANCHOR18
+	.word	.LANCHOR31
+	.word	.LANCHOR20+4
+	.size	HynixReadRetrial, .-HynixReadRetrial
+	.section	.text.FlashDdrTunningRead,"ax",%progbits
+	.align	1
+	.global	FlashDdrTunningRead
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashDdrTunningRead, %function
+FlashDdrTunningRead:
+	@ args = 4, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r7, r3
+	ldr	r3, .L1064
+	sub	sp, sp, #24
+	str	r0, [sp, #8]
+	ldr	r3, [r3]
+	str	r1, [sp, #12]
+	str	r2, [sp, #4]
+	ldr	r3, [r3, #304]
+	str	r3, [sp, #20]
+	ldr	r3, .L1064+4
+	ldr	r3, [r3]
+	cmp	r3, #8
+	ldr	r3, [sp, #56]
+	ite	cc
+	movcc	fp, #6
+	movcs	fp, #12
+	cmp	r3, #0
+	beq	.L1053
+	movs	r0, #1
+	ldr	r4, .L1064+8
+	bl	FlashSetInterfaceMode
+	movs	r0, #1
+	bl	NandcSetMode
+	ldr	r0, [sp, #8]
+	bl	FlashReset
+	mov	r3, r7
+	ldr	r2, [sp, #4]
+	ldr	r1, [sp, #12]
+	ldr	r0, [sp, #8]
+	bl	FlashReadRawPage
+	mov	r6, r0
+	ldrb	r0, [r4]	@ zero_extendqisi2
+	bl	FlashSetInterfaceMode
+	ldrb	r0, [r4]	@ zero_extendqisi2
+	bl	NandcSetMode
+	adds	r3, r6, #1
+	bne	.L1042
 .L1051:
+	mov	r6, #-1
+.L1039:
+	mov	r0, r6
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1042:
+	mov	r2, r6
+	ldr	r1, [sp, #12]
+	ldr	r0, .L1064+12
+	bl	printf
+	ldr	r2, .L1064+16
+	ldr	r3, [r2]
+	adds	r3, r3, #1
+	cmp	r3, #2048
+	bcs	.L1044
+	str	r3, [r2]
+	b	.L1039
+.L1044:
 	movs	r7, #0
-.L1028:
-	ldr	r3, [r5, #12]
-	movs	r1, #0
-	mov	r0, r4
-	ldr	r2, [sp, #28]
-	str	r3, [sp, #0]
-	ldr	r3, [r5, #8]
-	bl	NandcXferData
-	ldr	r1, .L1063+4
-	ldrb	r3, [r1, #0]	@ zero_extendqisi2
-	cbz	r3, .L1053
-	adds	r3, r0, #1
-	bne	.L1053
-	strb	r6, [r1, #0]
-	movs	r7, #0
-	b	.L1062
+	str	r7, [r2]
+	str	r7, [sp, #4]
+.L1041:
+	mov	r10, #0
+	mov	r8, #-1
+	mov	r5, r10
+	mov	r4, r10
+	str	r10, [sp, #16]
+.L1049:
+	uxtb	r0, fp
+	bl	NandcSetDdrPara
+	mov	r3, r7
+	ldr	r2, [sp, #4]
+	ldr	r1, [sp, #12]
+	ldr	r0, [sp, #8]
+	bl	FlashReadRawPage
+	adds	r3, r6, #1
+	cmp	r0, r3
+	bhi	.L1045
+	cmp	r0, #2
+	bhi	.L1055
+	adds	r4, r4, #1
+	cmp	r4, #9
+	bls	.L1055
+	mov	r3, r5
+	mov	r6, r0
+	sub	r5, fp, r4
+	mov	r8, #0
+.L1047:
+	ldr	r2, [sp, #16]
+	cmp	r4, r2
+	it	ls
+	movls	r5, r3
+.L1048:
+	cbz	r5, .L1050
+	mov	r1, r5
+	ldr	r0, .L1064+20
+	bl	printf
+	uxtb	r0, r5
+	bl	NandcSetDdrPara
+.L1050:
+	cmp	r8, #0
+	beq	.L1039
+	ldr	r2, [sp, #12]
+	ldr	r1, [sp, #8]
+	ldr	r0, .L1064+24
+	bl	printf
+	ldr	r3, [sp, #56]
+	cmp	r3, #0
+	beq	.L1051
+	ldr	r3, [sp, #20]
+	ubfx	r0, r3, #8, #8
+	bl	NandcSetDdrPara
+	b	.L1039
 .L1053:
-	mov	r8, r7
-	mov	r7, r5
-	mov	r6, r8
+	mov	r6, #1024
+	b	.L1041
+.L1045:
+	ldr	r3, [sp, #16]
+	cmp	r4, r3
+	bls	.L1056
+	cmp	r4, #7
+	sub	r5, r10, r4
+	bhi	.L1048
+	str	r4, [sp, #16]
+.L1056:
+	movs	r4, #0
+	b	.L1046
+.L1055:
+	mov	r8, #0
+	mov	r10, fp
+	mov	r6, r0
+	mov	r7, r8
+	str	r8, [sp, #4]
+.L1046:
+	add	fp, fp, #2
+	cmp	fp, #69
+	bls	.L1049
+	mov	r3, r5
+	mov	r5, r10
+	b	.L1047
+.L1065:
+	.align	2
+.L1064:
+	.word	.LANCHOR19
+	.word	.LANCHOR32
+	.word	.LANCHOR24
+	.word	.LC8
+	.word	.LANCHOR148
+	.word	.LC9
+	.word	.LC10
+	.size	FlashDdrTunningRead, .-FlashDdrTunningRead
+	.section	.text.FlashReadPage,"ax",%progbits
+	.align	1
+	.global	FlashReadPage
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashReadPage, %function
+FlashReadPage:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r7, r2
 	mov	r5, r0
-	cmp	r8, #0
-	beq	.L1032
-	ldr	r2, .L1063+44
-	mov	r0, r4
-	ldr	r3, [sp, #44]
-	ldr	r1, [r2, #0]
-	adds	r1, r1, r3
-	bl	FlashReadDpDataOutCmd
-	ldr	r1, [sp, #12]
-	movs	r2, #36
-	add	r3, fp, #1
-	mov	r0, r4
-	mla	r3, r2, r3, r1
-	movs	r1, #0
-	ldr	r2, [r3, #12]
-	str	r2, [sp, #0]
-	ldr	r2, [sp, #28]
-	ldr	r3, [r3, #8]
-	bl	NandcXferData
-	mov	sl, r0
-	cmp	r0, #-1
-	ite	ne
-	movne	r6, r8
-	moveq	r6, #0
-.L1032:
-	mov	r0, r4
-	bl	NandcFlashDeCs
-	ldr	r3, [sp, #36]
-	ldr	r2, .L1063+4
-	adds	r0, r5, #1
-	strb	r3, [r2, #0]
-	bne	.L1036
-	ldr	r3, .L1063+48
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1034
-	ldr	r3, .L1063+52
-	mov	r0, r4
-	ldr	r1, [sp, #44]
-	ldr	r3, [r3, #0]
-	ldr	r6, [r3, #304]
+	mov	r6, r1
+	mov	r8, r3
+	bl	FlashReadRawPage
+	adds	r2, r0, #1
+	mov	r4, r0
+	bne	.L1067
+	ldr	r10, .L1085+20
+	ldrb	fp, [r10]	@ zero_extendqisi2
+	cmp	fp, #0
+	bne	.L1068
+.L1070:
+	ldr	r3, .L1085
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L1067
+	ldr	r3, .L1085+4
+	mov	r1, r6
+	mov	r2, r7
+	mov	r0, r5
+	ldr	r3, [r3]
+	ldr	r10, [r3, #304]
 	movs	r3, #1
-	str	r3, [sp, #0]
-	ldr	r2, [r7, #8]
-	ldr	r3, [r7, #12]
+	str	r3, [sp]
+	mov	r3, r8
 	bl	FlashDdrTunningRead
 	adds	r1, r0, #1
-	mov	r5, r0
-	beq	.L1035
-	ldr	r3, .L1063+56
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	mov	r4, r0
+	beq	.L1071
+	ldr	r3, .L1085+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r0, r3, lsr #1
-	bls	.L1056
-.L1035:
-	ubfx	r0, r6, #8, #8
+	bls	.L1067
+.L1071:
+	ubfx	r0, r10, #8, #8
 	bl	NandcSetDdrPara
-	adds	r2, r5, #1
-	bne	.L1056
-.L1034:
-	ldr	r3, .L1063+60
-	mov	r0, r4
-	ldr	r1, [sp, #44]
-	ldr	r2, [r7, #8]
-	ldr	r6, [r3, #0]
-	ldr	r3, [r7, #12]
-	cmp	r6, #0
-	beq	.L1037
-	blx	r6
-	adds	r3, r0, #1
-	mov	r5, r0
-	bne	.L1058
-	ldr	r3, .L1063+24
-	ldr	r3, [r3, #0]
-	ldrb	r3, [r3, #19]	@ zero_extendqisi2
-	subs	r3, r3, #1
-	cmp	r3, #6
-	bhi	.L1039
-	ldr	r2, .L1063+28
-	mov	r0, r4
+	b	.L1067
+.L1068:
 	movs	r3, #0
-	ldrb	r1, [r2, #1]	@ zero_extendqisi2
-	adds	r2, r2, #4
-	bl	HynixSetRRPara
-.L1039:
-	ldr	r1, [sp, #44]
-	mov	r0, r4
-	ldr	r2, [r7, #8]
-	ldr	r3, [r7, #12]
+	mov	r2, r7
+	strb	r3, [r10]
+	mov	r1, r6
+	mov	r3, r8
+	mov	r0, r5
 	bl	FlashReadRawPage
-	ldr	r3, .L1063+56
-	ldr	r1, [r7, #4]
-	ldrb	r2, [r3, #0]	@ zero_extendqisi2
-	mov	r5, r0
-	ldr	r0, .L1063+64
-	mov	r3, r5
+	adds	r3, r0, #1
+	strb	fp, [r10]
+	beq	.L1070
+	mov	r4, r0
+.L1067:
+	ldr	r10, .L1085+24
+	ldr	fp, [r10]
+	cmp	fp, #0
+	beq	.L1066
+	adds	r2, r4, #1
+	bne	.L1066
+	mov	r3, r8
+	mov	r2, r7
+	mov	r1, r6
+	mov	r0, r5
+	blx	fp
+	mov	r3, r6
+	mov	r4, r0
+	mov	r1, r0
+	mov	r2, r5
+	ldr	r0, .L1085+12
 	bl	printf
-	adds	r6, r5, #1
-	bne	.L1058
-	ldr	r3, .L1063+40
-	ldrb	r6, [r3, #0]	@ zero_extendqisi2
-	cmp	r6, #0
-	beq	.L1038
-	ldr	r1, [sp, #20]
-	mov	r0, r4
-	cmp	r1, #1
-	beq	.L1040
-	ldr	r2, [sp, #24]
-	cbz	r2, .L1041
-.L1040:
+	adds	r3, r4, #1
+	bne	.L1066
+	ldr	r3, .L1085+16
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L1066
+	mov	r0, r5
 	bl	flash_enter_slc_mode
-	b	.L1042
-.L1041:
+	ldr	r4, [r10]
+	mov	r3, r8
+	mov	r2, r7
+	mov	r1, r6
+	mov	r0, r5
+	blx	r4
+	mov	r4, r0
+	mov	r0, r5
 	bl	flash_exit_slc_mode
-.L1042:
-	ldr	r3, .L1063+60
+.L1066:
 	mov	r0, r4
-	ldr	r1, [sp, #44]
-	ldr	r2, [r7, #8]
-	ldr	r5, [r3, #0]
-	ldr	r3, [r7, #12]
-	blx	r5
-	mov	r5, r0
-	b	.L1058
-.L1037:
-	bl	FlashReadRawPage
-	mov	r5, r0
-	b	.L1038
-.L1064:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1086:
 	.align	2
-.L1063:
-	.word	.LANCHOR18
-	.word	.LANCHOR4
-	.word	.LANCHOR0
-	.word	.LANCHOR16
+.L1085:
+	.word	.LANCHOR28
 	.word	.LANCHOR19
-	.word	.LANCHOR194
-	.word	.LANCHOR23
 	.word	.LANCHOR31
-	.word	.LANCHOR32
-	.word	.LANCHOR31+4
-	.word	.LANCHOR7
-	.word	.LANCHOR2
-	.word	.LANCHOR35
-	.word	.LANCHOR30
-	.word	.LANCHOR29
-	.word	.LANCHOR153
-	.word	.LC19
-.L1056:
-	movs	r6, #0
-.L1036:
-	ldr	r3, .L1065
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	r5, r3, lsr #2
-	bls	.L1038
-	ldr	r3, .L1065+4
-	ldr	r3, [r3, #0]
-	cmp	r3, #0
-	it	eq
-	moveq	r5, #256
-	b	.L1038
-.L1058:
-	movs	r6, #0
-.L1038:
-	ldr	r1, [sp, #12]
-	adds	r0, r5, #1
-	ldr	r3, [sp, #16]
-	str	r5, [r1, r3]
-	beq	.L1043
-	cmp	r5, #256
-	beq	.L1043
-	ldr	r2, [sp, #16]
-	movs	r3, #0
-	str	r3, [r1, r2]
-.L1043:
-	ldr	r2, [sp, #12]
-	ldr	r1, [sp, #16]
-	ldr	r3, [r2, r1]
-	adds	r2, r3, #1
-	bne	.L1044
-	ldr	r2, .L1065
-	ldr	r1, [r7, #4]
-	ldr	r0, .L1065+8
-	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	bl	printf
-	ldr	r1, [r7, #12]
-	cbz	r1, .L1044
-	movs	r2, #4
-	ldr	r0, .L1065+12
-	mov	r3, r2
-	bl	rknand_print_hex
-.L1044:
-	cbz	r6, .L1045
-	ldr	r3, .L1065
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	sl, r3, lsr #2
-	bls	.L1046
-	ldr	r3, .L1065+4
-	ldr	r3, [r3, #0]
-	cmp	r3, #0
-	it	eq
-	moveq	sl, #256
-.L1046:
-	ldr	r1, [sp, #12]
-	movs	r2, #36
-	add	r3, fp, #1
-	muls	r3, r2, r3
-	cmp	sl, #-1
-	str	sl, [r1, r3]
-	beq	.L1045
-	cmp	sl, #256
-	beq	.L1045
-	movs	r2, #0
-	str	r2, [r1, r3]
-.L1045:
-	ldr	r2, [sp, #20]
-	add	fp, fp, r6
-	cmp	r2, #1
-	beq	.L1047
-	ldr	r3, [sp, #24]
-	cbz	r3, .L1019
-.L1047:
-	ldr	r3, .L1065+16
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1019
-	mov	r0, r4
-	bl	flash_exit_slc_mode
-.L1019:
-	add	fp, fp, #1
-	b	.L1016
-.L1049:
-	mov	sl, r4
-	mov	fp, r4
-.L1016:
-	ldr	r4, [sp, #32]
-	cmp	fp, r4
-	bcc	.L1048
-	movs	r0, #0
-.L1017:
-	add	sp, sp, #48
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1066:
-	.align	2
-.L1065:
-	.word	.LANCHOR29
-	.word	.LANCHOR153
-	.word	.LC16
-	.word	.LC18
-	.word	.LANCHOR7
-	.size	FlashReadPages, .-FlashReadPages
-	.section	.text.FtlGcScanTempBlk,"ax",%progbits
+	.word	.LC11
+	.word	.LANCHOR8
+	.word	.LANCHOR5
+	.word	.LANCHOR149
+	.size	FlashReadPage, .-FlashReadPage
+	.section	.text.FlashDdrParaScan,"ax",%progbits
 	.align	1
-	.global	FtlGcScanTempBlk
+	.global	FlashDdrParaScan
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlGcScanTempBlk, %function
-FtlGcScanTempBlk:
-	@ args = 0, pretend = 0, frame = 24
+	.fpu softvfp
+	.type	FlashDdrParaScan, %function
+FlashDdrParaScan:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1090
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r4, r0
-	ldrh	r5, [r3, #0]
-	movw	r3, #65535
-	sub	sp, sp, #24
-	cmp	r5, r3
-	beq	.L1086
-	cbnz	r5, .L1068
-	b	.L1069
-.L1086:
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	mov	r6, r0
+	ldr	r4, .L1098
 	movs	r5, #0
-.L1068:
-	ldr	r3, .L1090+4
-	ldrh	r3, [r3, #0]
-	cmp	r1, r3
-	bne	.L1070
-.L1069:
-	bl	FtlGcPageVarInit
-.L1070:
-	ldr	r8, .L1090+44
-	movw	sl, #65535
-	mov	r3, #-1
-	str	r3, [sp, #20]
-.L1083:
-	ldrh	r3, [r4, #0]
-	movs	r2, #0
-	strb	r2, [r4, #8]
-	cmp	r3, sl
-	beq	.L1071
-.L1072:
-	mov	r7, r4
+	mov	r7, r1
+	ldrb	r0, [r4]	@ zero_extendqisi2
+	bl	FlashSetInterfaceMode
+	ldrb	r0, [r4]	@ zero_extendqisi2
+	bl	NandcSetMode
+	mov	r3, r5
+	mov	r2, r5
+	str	r5, [sp]
+	mov	r1, r7
+	mov	r0, r6
+	bl	FlashDdrTunningRead
+	mov	r3, r5
+	mov	r2, r5
+	mov	r8, r0
+	mov	r1, r7
+	mov	r0, r6
+	ldr	r5, .L1098+4
+	bl	FlashReadRawPage
+	adds	r0, r0, #1
+	beq	.L1088
+	cmp	r8, #-1
+	bne	.L1089
 .L1088:
-	ldr	r3, .L1090+8
-	mov	r2, r7
-	ldr	r6, .L1090+12
-	ldr	ip, [r8, #0]
-	ldr	lr, [r3, #0]
-	ldr	r3, .L1090+16
-	ldrh	fp, [r6, #0]
-	ldrh	r6, [r3, #0]
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	lsls	r3, r3, #31
+	bpl	.L1089
+	movs	r0, #1
+	bl	FlashSetInterfaceMode
+	movs	r0, #1
+	bl	NandcSetMode
 	movs	r3, #0
-	mov	r4, r3
-	stmia	sp, {r6, ip}
-	b	.L1073
-.L1075:
-	ldrh	r0, [r2, #16]
-	cmp	r0, sl
-	beq	.L1074
-	ldr	r6, [sp, #4]
-	mov	ip, #36
-	orr	r0, r5, r0, lsl #10
-	mla	r1, ip, r4, r6
-	ldr	r6, [sp, #0]
-	str	r0, [r1, #4]
+.L1097:
 	movs	r0, #0
-	str	r0, [r1, #8]
-	mul	r0, r6, r4
-	adds	r4, r4, #1
-	uxth	r4, r4
-	bic	r0, r0, #3
-	add	r0, lr, r0
-	str	r0, [r1, #12]
-.L1074:
-	adds	r3, r3, #1
-	adds	r2, r2, #2
-	uxth	r3, r3
-.L1073:
-	cmp	r3, fp
-	bne	.L1075
-	ldr	r0, [r8, #0]
-	mov	r1, r4
-	movs	r2, #0
-	movs	r6, #0
-	bl	FlashReadPages
-	mov	fp, r6
-	b	.L1076
-.L1084:
-	ldr	r3, [r8, #0]
-	adds	r2, r3, r6
-	ldr	r1, [r2, #4]
-	str	r2, [sp, #16]
-	ubfx	r0, r1, #10, #16
-	str	r3, [sp, #12]
-	str	r1, [sp, #8]
-	bl	P2V_plane
-	ldr	r3, [sp, #12]
-	ldr	r1, [sp, #8]
-	ldr	r2, [sp, #16]
-	ldr	r3, [r3, r6]
-	cbnz	r3, .L1077
-	ldr	r3, [r2, #12]
-	adds	r6, r6, #36
-	ldrh	r2, [r3, #0]
-	cmp	r2, sl
-	bne	.L1078
-	ldr	r3, .L1090+20
+	strb	r3, [r5]
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1089:
+	movs	r3, #1
+	b	.L1097
+.L1099:
+	.align	2
+.L1098:
+	.word	.LANCHOR24
+	.word	.LANCHOR28
+	.size	FlashDdrParaScan, .-FlashDdrParaScan
+	.section	.text.FlashProgPage,"ax",%progbits
+	.align	1
+	.global	FlashProgPage
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashProgPage, %function
+FlashProgPage:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	mov	r8, r3
+	ldr	r3, .L1103
+	mov	r5, r1
+	mov	r7, r2
+	mov	r4, r0
+	ldrb	r6, [r3, #9]	@ zero_extendqisi2
+	cbnz	r0, .L1101
+	ldr	r3, .L1103+4
+	ldr	r2, .L1103+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	ldr	r1, [r2]
+	muls	r1, r3, r1
+	cmp	r1, r5
+	bls	.L1101
+	ldr	r3, .L1103+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L1102
+	subs	r6, r6, #2
+.L1101:
+	mov	r0, r4
+	bl	NandcWaitFlashReady
+	mov	r0, r4
+	bl	NandcFlashCs
+	mov	r1, r5
+	mov	r0, r4
+	bl	FlashProgFirstCmd
+	mov	r3, r7
+	uxtb	r2, r6
+	str	r8, [sp]
 	movs	r1, #1
-	mov	r2, r0
-	mov	r4, r7
-	str	r1, [r3, #0]
-	b	.L1071
-.L1078:
-	add	fp, fp, #1
-	ldr	r0, [r3, #12]
-	ldr	r2, [r3, #8]
-	bl	FtlGcUpdatePage
-	uxth	fp, fp
-	b	.L1076
-.L1077:
-	mov	fp, r1
-	ldr	r0, .L1090+24
-	ldrh	r1, [r7, #0]
-	mov	r2, fp
-	bl	printf
-	ldr	r3, .L1090+28
-	mov	r4, r7
-	ldr	r3, [r3, #0]
-	cbnz	r3, .L1079
-	ldr	r3, .L1090+32
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1080
-.L1079:
-	ldr	r3, .L1090+36
-	ldrh	r2, [r4, #0]
-	ldr	r3, [r3, #0]
-	ldrh	r3, [r3, r2, lsl #1]
-	cmp	r3, #119
-	bls	.L1081
-.L1080:
-	ldr	r3, [r8, #0]
-	ldr	r3, [r3, r6]
-	adds	r3, r3, #1
-	bne	.L1082
-.L1081:
-	ldr	r3, [r8, #0]
-	adds	r6, r3, r6
-	ldr	r6, [r6, #4]
-	str	r6, [sp, #20]
-.L1082:
-	ldr	r3, .L1090+40
-	movs	r5, #0
-	ldrh	r2, [r4, #0]
-	ldr	r3, [r3, #0]
-	strh	r5, [r3, r2, lsl #1]	@ movhi
-	ldrh	r0, [r4, #0]
-	bl	INSERT_FREE_LIST
-	strh	sl, [r4, #0]	@ movhi
-	bl	FtlGcPageVarInit
-	b	.L1083
-.L1076:
-	cmp	fp, r4
-	bne	.L1084
-	ldr	r3, .L1090+4
-	adds	r5, r5, #1
-	uxth	r5, r5
-	ldrh	r3, [r3, #0]
-	cmp	r3, r5
-	bhi	.L1088
-	mov	r4, r7
-	movs	r2, #0
-.L1071:
-	ldr	r3, .L1090
 	mov	r0, r4
-	movw	r1, #65535
-	strh	r5, [r4, #2]	@ movhi
-	strb	r2, [r4, #6]
-	strh	r1, [r3, #0]	@ movhi
+	bl	NandcXferData
 	mov	r1, r5
-	bl	ftl_sb_update_avl_pages
-	ldr	r0, [sp, #20]
-	add	sp, sp, #24
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1091:
+	mov	r0, r4
+	bl	FlashProgSecondCmd
+	mov	r0, r4
+	bl	NandcWaitFlashReady
+	mov	r1, r5
+	mov	r0, r4
+	bl	FlashReadStatus
+	mov	r1, r0
+	mov	r0, r4
+	bl	NandcFlashDeCs
+	and	r0, r1, #1
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1102:
+	movs	r6, #4
+	b	.L1101
+.L1104:
 	.align	2
-.L1090:
-	.word	.LANCHOR195
-	.word	.LANCHOR56
-	.word	.LANCHOR121
-	.word	.LANCHOR41
-	.word	.LANCHOR62
-	.word	.LANCHOR128
-	.word	.LC20
-	.word	.LANCHOR116
-	.word	.LANCHOR7
-	.word	.LANCHOR84
-	.word	.LANCHOR89
-	.word	.LANCHOR177
-	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
-	.section	.text.FtlScanSysBlk,"ax",%progbits
+.L1103:
+	.word	.LANCHOR29
+	.word	.LANCHOR2
+	.word	.LANCHOR3
+	.word	.LANCHOR1
+	.size	FlashProgPage, .-FlashProgPage
+	.section	.text.FlashSavePhyInfo,"ax",%progbits
 	.align	1
-	.global	FtlScanSysBlk
+	.global	FlashSavePhyInfo
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlScanSysBlk, %function
-FtlScanSysBlk:
-	@ args = 0, pretend = 0, frame = 40
+	.fpu softvfp
+	.type	FlashSavePhyInfo, %function
+FlashSavePhyInfo:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1152
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	movs	r4, #0
-	ldr	r5, .L1152+4
-	sub	sp, sp, #40
-	strh	r4, [r3, #0]	@ movhi
-	mov	r1, r4
-	ldr	r3, .L1152+8
-	ldr	r2, [r5, #0]
-	ldr	r7, .L1152+12
-	strh	r4, [r3, #0]	@ movhi
-	ldr	r3, .L1152+16
-	lsls	r2, r2, #2
-	ldr	r0, [r3, #0]
-	bl	memset
-	ldr	r2, [r5, #0]
-	ldr	r3, .L1152+20
-	mov	r1, r4
-	ldr	r5, .L1152+24
-	lsls	r2, r2, #1
-	ldr	r0, [r3, #0]
-	bl	memset
-	ldr	r3, .L1152+28
-	ldrh	r2, [r5, #0]
-	mov	r1, r4
-	ldr	r0, [r3, #0]
-	lsls	r2, r2, #2
-	bl	memset
-	ldr	r3, .L1152+32
-	ldrh	r2, [r5, #0]
-	mov	r1, r4
-	ldr	r0, [r3, #0]
-	lsls	r2, r2, #1
-	bl	memset
-	ldr	r0, .L1152+36
-	movs	r1, #255
-	movs	r2, #12
-	bl	memset
-	ldr	r3, .L1152+40
-	ldrh	r3, [r3, #0]
-	str	r3, [sp, #24]
-	b	.L1093
-.L1095:
-	ldrb	r0, [fp, r4]	@ zero_extendqisi2
-	ldr	r1, [sp, #24]
-	str	r3, [sp, #4]
-	bl	V2P_block
-	str	r0, [sp, #8]
-	bl	FtlBbmIsBadBlock
-	ldr	r2, [sp, #8]
-	ldr	r3, [sp, #4]
-	cbnz	r0, .L1094
-	ldr	r1, [r7, #0]
-	lsls	r2, r2, #10
-	ldr	r0, [r6, #0]
-	mla	r1, sl, r3, r1
-	str	r2, [r1, #4]
-	ldr	r2, [r8, #0]
-	str	r2, [r1, #8]
-	ldrh	r2, [r5, #0]
-	muls	r2, r3, r2
-	adds	r3, r3, #1
-	bic	r2, r2, #3
-	adds	r2, r0, r2
-	str	r2, [r1, #12]
-	uxth	r3, r3
-.L1094:
-	adds	r4, r4, #1
-	uxth	r4, r4
-	b	.L1130
-.L1142:
-	movs	r3, #0
-	ldr	fp, .L1152+76
-	ldr	r8, .L1152+80
-	mov	r4, r3
-	ldr	r6, .L1152+44
-	mov	sl, #36
-	ldr	r5, .L1152+48
-	str	r3, [sp, #20]
-.L1130:
-	ldr	r1, .L1152+52
-	ldrh	r2, [r1, #0]
-	cmp	r2, r4
-	bhi	.L1095
-	str	r3, [sp, #20]
-	cmp	r3, #0
-	beq	.L1096
-	ldr	r0, [r7, #0]
-	mov	r1, r3
-	movs	r2, #1
-	movs	r6, #0
-	bl	FlashReadPages
-	str	r6, [sp, #32]
-.L1129:
-	ldr	r3, [r7, #0]
-	adds	r2, r3, r6
-	ldr	r3, [r3, r6]
-	ldr	r5, [r2, #4]
-	adds	r3, r3, #1
-	ldr	r4, [r2, #12]
-	ubfx	r5, r5, #10, #16
-	bne	.L1097
-	mov	r8, #16
-.L1099:
-	ldr	r0, [r7, #0]
-	movs	r1, #1
-	mov	r2, r1
-	adds	r0, r0, r6
-	ldr	r3, [r0, #4]
-	adds	r3, r3, #1
-	str	r3, [r0, #4]
-	bl	FlashReadPages
-	ldrh	r3, [r4, #0]
-	movw	r2, #65535
-	cmp	r3, r2
-	bne	.L1098
-	ldr	r1, .L1152+12
-	mov	r2, #-1
-	ldr	r3, [r1, #0]
-	str	r2, [r3, r6]
-	b	.L1097
-.L1098:
-	ldr	r3, [r7, #0]
-	ldr	r3, [r3, r6]
-	adds	r3, r3, #1
-	bne	.L1097
-	add	r8, r8, #-1
-	uxth	r8, r8
-	cmp	r8, #0
-	bne	.L1099
-.L1097:
-	ldr	r3, [r7, #0]
-	ldr	r3, [r3, r6]
-	adds	r3, r3, #1
-	beq	.L1100
-	ldr	r2, .L1152+56
-	ldr	r3, [r4, #4]
-	ldr	r1, [r2, #0]
-	adds	r0, r1, #1
-	beq	.L1101
-	cmp	r1, r3
-	bhi	.L1102
-.L1101:
-	adds	r1, r3, #1
-	beq	.L1102
-	adds	r3, r3, #1
-	str	r3, [r2, #0]
-.L1102:
-	ldrh	r3, [r4, #0]
-	movw	r2, #61604
-	cmp	r3, r2
-	beq	.L1105
-	bhi	.L1108
-	movw	r2, #61574
-	cmp	r3, r2
-	bne	.L1103
-	b	.L1150
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r7, .L1114
+	ldr	r4, .L1114+4
+	ldr	r3, [r7]
+	ldr	r10, .L1114+60
+	ldr	r8, .L1114+64
+	str	r3, [r4]
+	ldr	r3, .L1114+8
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	bl	FlashBchSel
+	mov	r2, #2048
+	movs	r1, #0
+	ldr	r0, [r7]
+	bl	ftl_memset
+	ldr	r0, [r4]
+	movs	r2, #32
+	ldr	r3, .L1114+12
+	ldr	r1, .L1114+16
+	str	r10, [r0]
+	adds	r0, r0, #16
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	strh	r3, [r0, #-4]	@ movhi
+	ldr	r3, .L1114+20
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	strh	r3, [r0, #-2]	@ movhi
+	ldr	r3, .L1114+24
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r3, [r0, #1060]
+	bl	ftl_memcpy
+	ldr	r0, [r4]
+	movs	r2, #8
+	ldr	r1, .L1114+28
+	adds	r0, r0, #80
+	bl	ftl_memcpy
+	ldr	r0, [r4]
+	movs	r2, #32
+	ldr	r1, .L1114+32
+	adds	r0, r0, #96
+	bl	ftl_memcpy
+	ldr	r0, [r4]
+	movs	r2, #32
+	ldr	r1, .L1114+36
+	adds	r0, r0, #160
+	bl	ftl_memcpy
+	ldr	r0, [r4]
+	movs	r2, #32
+	ldr	r1, .L1114+40
+	adds	r0, r0, #192
+	bl	ftl_memcpy
+	ldr	r0, [r4]
+	mov	r2, #852
+	ldr	r1, .L1114+44
+	adds	r0, r0, #224
+	bl	ftl_memcpy
+	ldr	r5, [r4]
+	movw	r1, #2036
+	add	r0, r5, #12
+	bl	JSHash
+	ldr	r1, .L1114+48
+	mov	r3, #1592
+	str	r3, [r5, #4]
+	str	r0, [r5, #8]
+	movs	r0, #0
+	ldr	r3, [r1]
+	movs	r5, #0
+	mov	r6, r5
+	str	r3, [r4]
+	bl	flash_enter_slc_mode
+	mov	fp, r1
 .L1108:
-	movw	r2, #61634
-	cmp	r3, r2
+	ldr	r1, [r8]
+	movs	r2, #0
+	mov	r0, r2
+	muls	r1, r6, r1
+	bl	FlashEraseBlock
+	ldr	r1, [r8]
+	movs	r3, #0
+	ldr	r2, [r7]
+	mov	r0, r3
+	muls	r1, r6, r1
+	bl	FlashProgPage
+	ldr	r1, [r8]
+	movs	r3, #0
+	ldr	r2, [r7]
+	mov	r0, r3
+	muls	r1, r6, r1
+	adds	r1, r1, #1
+	bl	FlashProgPage
+	ldr	r1, [r8]
+	movs	r3, #0
+	ldr	r2, [fp]
+	mov	r0, r3
+	muls	r1, r6, r1
+	bl	FlashReadRawPage
+	adds	r0, r0, #1
+	add	r2, r6, #1
 	beq	.L1106
-	movw	r2, #65535
-	cmp	r3, r2
-	bne	.L1103
-	b	.L1151
+	ldr	r3, [r4]
+	ldr	r1, [r3]
+	cmp	r1, r10
+	bne	.L1106
+	add	r0, r3, #12
+	movw	r1, #2036
+	str	r2, [sp, #4]
+	str	r3, [sp]
+	bl	JSHash
+	ldr	r3, [sp]
+	ldr	r2, [sp, #4]
+	ldr	r3, [r3, #8]
+	cmp	r3, r0
+	bne	.L1106
+	ldr	r3, .L1114+52
+	cmp	r5, #1
+	str	r2, [r3]
+	ldr	r3, [r8]
+	mul	r6, r6, r3
+	ldr	r3, .L1114+56
+	str	r6, [r3]
+	beq	.L1109
+	movs	r5, #1
 .L1106:
-	ldr	r3, .L1152
-	ldr	r8, .L1152+4
-	ldrh	r2, [r3, #0]
-	ldr	r3, [r8, #0]
-	cmp	r2, r3
-	bls	.L1109
-	ldr	r1, .L1152+60
-	movw	r2, #1269
-	ldr	r0, .L1152+64
-	bl	printf
-	ldr	r0, .L1152+68
-	ldr	r1, .L1152+72
-	bl	printf
+	cmp	r2, #4
+	mov	r6, r2
+	bne	.L1108
+.L1107:
+	movs	r0, #0
+	bl	flash_exit_slc_mode
+	clz	r0, r5
+	lsrs	r0, r0, #5
+	negs	r0, r0
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
 .L1109:
-	ldr	r3, [r8, #0]
-	mov	ip, #0
-	ldr	r1, .L1152
-	uxth	r2, r3
+	movs	r5, #2
+	b	.L1107
+.L1115:
+	.align	2
+.L1114:
+	.word	.LANCHOR143
+	.word	.LANCHOR142
+	.word	.LANCHOR150
+	.word	.LANCHOR25
+	.word	.LANCHOR22
+	.word	.LANCHOR2
+	.word	.LANCHOR28
+	.word	.LANCHOR26
+	.word	.LANCHOR17
+	.word	.LANCHOR29
+	.word	.LANCHOR7
+	.word	.LANCHOR20
+	.word	.LANCHOR151
+	.word	.LANCHOR145
+	.word	.LANCHOR144
+	.word	1312902724
+	.word	.LANCHOR3
+	.size	FlashSavePhyInfo, .-FlashSavePhyInfo
+	.section	.text.FlashReadIdbDataRaw,"ax",%progbits
+	.align	1
+	.global	FlashReadIdbDataRaw
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashReadIdbDataRaw, %function
+FlashReadIdbDataRaw:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r3, #60
+	sub	sp, sp, #24
+	ldr	r2, .L1128
+	mov	r10, r0
+	strb	r3, [sp, #20]
+	movs	r3, #40
+	strb	r3, [sp, #21]
+	movs	r3, #24
+	strb	r3, [sp, #22]
+	movs	r3, #16
+	strb	r3, [sp, #23]
+	ldr	r3, .L1128+4
+	ldr	r1, [r2]
+	str	r2, [sp, #8]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r3, [sp, #4]
+	ldr	r3, .L1128+8
+	cmp	r1, r3
 	str	r3, [sp, #12]
-	subs	r3, r2, #1
-	ldrh	r0, [r1, #0]
-	ldr	r1, .L1152+16
-	uxth	r3, r3
-	subs	r2, r2, r0
-	subs	r2, r2, #1
-	ldr	r1, [r1, #0]
-	sxth	fp, r3
-	sxth	r2, r2
-	str	r2, [sp, #36]
-	add	sl, r1, fp, lsl #2
-	str	sl, [sp, #16]
-	mov	sl, r5
-	b	.L1110
-.L1116:
-	rsb	r2, ip, fp
-	str	r2, [sp, #28]
-	ldr	r2, [sp, #16]
-	add	ip, ip, #1
-	ldr	r8, [r4, #4]
-	subs	r5, r2, #4
-	str	r5, [sp, #16]
-	ldr	r5, [r2, #0]
-	cmp	r8, r5
-	bls	.L1111
-	ldr	ip, [r1, #0]
-	mov	r5, sl
-	str	r2, [sp, #16]
-	cmp	ip, #0
-	bne	.L1112
+	bne	.L1117
+	movs	r0, #0
+	bl	flash_enter_slc_mode
+.L1117:
+	mov	r7, #-1
+	movs	r4, #2
+	mov	r2, #2048
+	movs	r1, #0
+	mov	r0, r10
+	bl	ftl_memset
+.L1118:
+	ldr	r3, .L1128+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r4, r3
+	bcc	.L1123
+.L1122:
+	ldr	r0, [sp, #4]
+	bl	FlashBchSel
+	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #12]
-	cmp	r0, r2
-	beq	.L1112
-	add	ip, r0, #1
-	ldr	r0, .L1152
-	strh	ip, [r0, #0]	@ movhi
-.L1112:
-	ldr	r0, .L1152+20
-	sxth	sl, r3
-	mov	fp, r3
-	str	sl, [sp, #12]
-	mov	r3, r1
-	ldr	ip, [r0, #0]
+	ldr	r3, [r3]
+	cmp	r3, r2
+	bne	.L1116
 	movs	r0, #0
-	mov	r8, ip
-	b	.L1113
-.L1114:
-	ldr	sl, [r1, #4]!
+	bl	flash_exit_slc_mode
+.L1116:
+	mov	r0, r7
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1123:
+	ldr	r5, .L1128+16
+	movs	r6, #0
+	ldr	fp, .L1128+32
+.L1120:
+	add	r3, sp, #20
+	ldrb	r8, [r6, r3]	@ zero_extendqisi2
+	mov	r0, r8
+	bl	FlashBchSel
+	ldr	r1, [fp]
+	movs	r3, #0
+	ldr	r2, [r5]
+	mov	r0, r3
+	muls	r1, r4, r1
+	bl	FlashReadRawPage
 	adds	r0, r0, #1
-	uxth	r0, r0
-	str	sl, [r3], #4
-	ldrh	sl, [ip, #2]!
-	strh	sl, [r8], #2	@ movhi
-.L1113:
-	ldr	r2, [sp, #12]
-	sxth	sl, r0
-	cmp	sl, r2
-	bne	.L1114
-	ldr	r1, [r4, #4]
-	mov	r3, fp
-	ldr	r2, [sp, #16]
-	ldr	sl, [sp, #28]
-	str	r1, [r2, #0]
-	ldr	r2, .L1152+20
-	ldr	r2, [r2, #0]
-	strh	r5, [r2, sl, lsl #1]	@ movhi
-	b	.L1115
-.L1111:
-	subs	r3, r3, #1
-	uxth	r3, r3
-.L1110:
-	ldr	r5, [sp, #36]
-	sxth	r2, r3
-	cmp	r2, r5
-	bgt	.L1116
-	mov	r5, sl
-.L1115:
-	sxth	r3, r3
-	cmp	r3, #0
-	blt	.L1103
-	ldr	r2, .L1152
-	ldr	r0, .L1152+4
-	ldrh	r1, [r2, #0]
-	ldr	r0, [r0, #0]
-	subs	r0, r0, r1
-	subs	r0, r0, #1
-	sxth	r0, r0
-	cmp	r3, r0
-	bgt	.L1103
-	adds	r1, r1, #1
-	strh	r1, [r2, #0]	@ movhi
-	ldr	r2, .L1152+16
-	ldr	r1, [r4, #4]
-	ldr	r2, [r2, #0]
-	str	r1, [r2, r3, lsl #2]
-	ldr	r2, .L1152+20
-	b	.L1148
-.L1153:
+	bne	.L1119
+	adds	r6, r6, #1
+	cmp	r6, #4
+	bne	.L1120
+.L1121:
+	adds	r4, r4, #1
+	b	.L1118
+.L1126:
+	movs	r7, #0
+	b	.L1122
+.L1119:
+	ldr	r3, [r5]
+	ldr	r2, [r3]
+	ldr	r3, .L1128+20
+	cmp	r2, r3
+	bne	.L1121
+	mov	r1, r8
+	ldr	r0, .L1128+24
+	bl	printf
+	mov	r2, #2048
+	ldr	r1, [r5]
+	mov	r0, r10
+	bl	ftl_memcpy
+	ldr	r3, [r5]
+	ldr	r2, .L1128+12
+	ldr	r3, [r3, #512]
+	strb	r3, [r2]
+	ldr	r3, .L1128+28
+	ldr	r2, [r3]
+	cmp	r4, r2
+	bcs	.L1126
+	str	r4, [r3]
+	movs	r7, #0
+	bl	FlashSavePhyInfo
+	b	.L1121
+.L1129:
 	.align	2
-.L1152:
-	.word	.LANCHOR111
-	.word	.LANCHOR68
-	.word	.LANCHOR74
-	.word	.LANCHOR177
-	.word	.LANCHOR113
-	.word	.LANCHOR112
-	.word	.LANCHOR65
-	.word	.LANCHOR189
-	.word	.LANCHOR75
-	.word	.LANCHOR196
-	.word	.LANCHOR43
-	.word	.LANCHOR121
-	.word	.LANCHOR62
-	.word	.LANCHOR41
-	.word	.LANCHOR156
-	.word	.LANCHOR197
-	.word	.LC3
-	.word	.LC4
-	.word	.LC5
-	.word	.LANCHOR50
-	.word	.LANCHOR120
-.L1150:
-	ldr	r3, .L1154
-	ldr	r8, .L1154+28
-	ldrh	r2, [r3, #0]
-	ldrh	r3, [r8, #0]
-	cmp	r2, r3
-	bls	.L1117
-	ldr	r1, .L1154+4
-	movw	r2, #1316
-	ldr	r0, .L1154+8
-	bl	printf
-	ldr	r0, .L1154+12
-	ldr	r1, .L1154+16
-	bl	printf
-.L1117:
-	ldr	r1, .L1154
-	mov	ip, #0
-	ldrh	r8, [r8, #0]
-	ldrh	r0, [r1, #0]
-	add	r2, r8, #-1
-	str	r8, [sp, #16]
-	uxth	r3, r2
-	subs	r2, r2, r0
-	str	r2, [sp, #36]
-	ldr	r2, .L1154+20
-	sxth	fp, r3
-	ldr	r1, [r2, #0]
-	add	sl, r1, fp, lsl #2
-	str	sl, [sp, #28]
-	mov	sl, r5
-	b	.L1118
-.L1124:
-	ldr	r2, [sp, #28]
-	add	ip, ip, #1
-	ldr	r8, [r4, #4]
-	subs	r5, r2, #4
-	str	r5, [sp, #28]
-	ldr	r5, [r2, #0]
-	cmp	r8, r5
-	bls	.L1119
-	ldr	ip, [r1, #0]
-	mov	r5, sl
-	cmp	ip, #0
-	bne	.L1120
-	ldr	sl, [sp, #16]
-	cmp	r0, sl
-	beq	.L1120
-	add	ip, r0, #1
-	ldr	r0, .L1154
-	strh	ip, [r0, #0]	@ movhi
-.L1120:
-	ldr	r0, .L1154+24
-	sxth	sl, r3
-	mov	fp, r3
-	str	sl, [sp, #16]
-	str	r2, [sp, #28]
-	mov	r3, r1
-	ldr	ip, [r0, #0]
-	movs	r0, #0
-	mov	r8, ip
-	b	.L1121
-.L1122:
-	ldr	sl, [r1, #4]!
-	adds	r0, r0, #1
-	uxth	r0, r0
-	str	sl, [r3], #4
-	ldrh	sl, [r8, #2]!
-	strh	sl, [ip], #2	@ movhi
-.L1121:
-	ldr	r2, [sp, #16]
-	sxth	sl, r0
-	cmp	sl, r2
-	bne	.L1122
-	ldr	r2, [sp, #28]
-	mov	r3, fp
-	ldr	r1, [r4, #4]
-	ldr	sl, [sp, #12]
-	str	r1, [r2, #0]
-	ldr	r2, .L1154+24
-	ldr	r2, [r2, #0]
-	strh	r5, [r2, sl, lsl #1]	@ movhi
-	b	.L1123
-.L1119:
-	subs	r3, r3, #1
-	uxth	r3, r3
-.L1118:
-	ldr	r5, [sp, #36]
-	rsb	r2, ip, fp
-	str	r2, [sp, #12]
-	cmp	r2, r5
-	bgt	.L1124
-	mov	r5, sl
-.L1123:
-	sxth	r3, r3
-	cmp	r3, #0
-	blt	.L1103
-	ldr	r0, .L1154+28
-	ldr	r2, .L1154
-	ldrh	r0, [r0, #0]
-	ldrh	r1, [r2, #0]
-	subs	r0, r0, #1
-	subs	r0, r0, r1
-	sxth	r0, r0
-	cmp	r3, r0
-	bgt	.L1103
-	adds	r1, r1, #1
-	strh	r1, [r2, #0]	@ movhi
-	ldr	r2, .L1154+20
-	ldr	r1, [r4, #4]
-	ldr	r2, [r2, #0]
-	str	r1, [r2, r3, lsl #2]
-	ldr	r2, .L1154+24
-.L1148:
-	ldr	r2, [r2, #0]
-	strh	r5, [r2, r3, lsl #1]	@ movhi
-	b	.L1103
-.L1105:
-	ldr	r8, .L1154+32
-	movw	sl, #65535
-	ldrh	r3, [r8, #0]
-	cmp	r3, sl
-	bne	.L1125
-	ldr	r3, [r4, #4]
-	strh	r5, [r8, #0]	@ movhi
-	str	r3, [r8, #8]
-	b	.L1103
-.L1125:
-	ldrh	r0, [r8, #4]
-	movw	ip, #65535
-	cmp	r0, ip
-	beq	.L1126
-	movs	r1, #1
-	bl	FtlFreeSysBlkQueueIn
-.L1126:
-	ldr	r2, [r4, #4]
-	ldr	r1, [r8, #8]
-	ldr	r3, .L1154+32
-	cmp	r1, r2
-	bcs	.L1127
-	ldrh	r1, [r3, #0]
-	str	r2, [r3, #8]
-	strh	r5, [r3, #0]	@ movhi
-	strh	r1, [r3, #4]	@ movhi
-	b	.L1103
-.L1127:
-	strh	r5, [r3, #4]	@ movhi
-	b	.L1103
-.L1151:
-	mov	r0, r5
-	b	.L1149
-.L1100:
-	ldr	r2, .L1154+36
-	mov	r0, r5
-	ldrb	r1, [r2, #0]	@ zero_extendqisi2
-	cbz	r1, .L1128
-.L1149:
-	movs	r1, #0
 .L1128:
-	bl	FtlFreeSysBlkQueueIn
-.L1103:
-	ldr	r5, [sp, #32]
-	adds	r6, r6, #36
-	adds	r3, r5, #1
-	ldr	r5, [sp, #20]
-	uxth	r3, r3
-	str	r3, [sp, #32]
-	cmp	r3, r5
-	bne	.L1129
-.L1096:
-	ldr	sl, [sp, #24]
-	add	r3, sl, #1
-	uxth	r3, r3
-	str	r3, [sp, #24]
-.L1093:
-	ldr	r3, .L1154+40
-	ldr	ip, [sp, #24]
-	ldrh	r3, [r3, #0]
-	cmp	r3, ip
-	bhi	.L1142
-	ldr	r3, .L1154+44
-	ldr	r1, [r3, #0]
-	ldrh	r3, [r1, #0]
-	cbnz	r3, .L1131
-	ldr	r2, .L1154+48
-	ldrh	r2, [r2, #0]
-	cbz	r2, .L1131
-	ldr	r2, .L1154+52
-	ldr	r4, [r2, #0]
-	mov	r2, r1
-	b	.L1132
+	.word	.LANCHOR152
+	.word	.LANCHOR31
+	.word	1446522928
+	.word	.LANCHOR2
+	.word	.LANCHOR143
+	.word	-52655045
+	.word	.LC12
+	.word	.LANCHOR145
+	.word	.LANCHOR3
+	.size	FlashReadIdbDataRaw, .-FlashReadIdbDataRaw
+	.section	.text.FlashPageProgMsbFFData,"ax",%progbits
+	.align	1
+	.global	FlashPageProgMsbFFData
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashPageProgMsbFFData, %function
+FlashPageProgMsbFFData:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	mov	r4, r2
+	ldr	r5, .L1140
+	mov	r6, r0
+	mov	r7, r1
+	ldr	r3, [r5]
+	ldrb	r2, [r3, #19]	@ zero_extendqisi2
+	ldr	r3, .L1140+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L1131
+	ldr	r3, .L1140+8
+	ldr	r1, [r3]
+	ldr	r3, .L1140+12
+	cmp	r1, r3
+	beq	.L1130
+.L1131:
+	subs	r3, r2, #5
+	uxtb	r3, r3
+	cmp	r3, #30
+	bhi	.L1132
+	ldr	r2, .L1140+16
+	lsr	r3, r2, r3
+	lsls	r3, r3, #31
+	bmi	.L1134
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
 .L1135:
-	ldrh	r5, [r2], #2
-	adds	r3, r3, #1
-	cbz	r5, .L1132
-	ldr	r3, .L1154+56
-	sxth	r0, r0
-	ldr	ip, .L1154+52
-	mov	sl, r1
-	add	r6, r1, r0, lsl #1
-	ldr	r5, [r3, #0]
-	movs	r3, #0
-	mov	r2, r3
-	mov	r4, r3
-	add	r7, r5, r0, lsl #2
-	mov	fp, r3
-	b	.L1133
-.L1134:
-	ldrh	r1, [r6, r2]
-	strh	r1, [sl, r2]	@ movhi
-	ldr	r1, [r7, r3]
-	str	r1, [r5, r3]
-	adds	r3, r3, #4
-	strh	fp, [r6, r2]	@ movhi
-	adds	r2, r2, #2
-.L1133:
-	ldr	r1, [ip, #0]
-	add	r8, r4, r0
+	ldrh	r2, [r10, r4, lsl #1]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L1130
+	mov	r2, #32768
+	movs	r1, #255
+	ldr	r0, [r8]
+	bl	ftl_memset
+	adds	r1, r4, r7
 	adds	r4, r4, #1
-	cmp	r8, r1
-	bcc	.L1134
-	b	.L1131
-.L1132:
-	cmp	r3, r4
-	uxth	r0, r3
-	bne	.L1135
-.L1131:
-	ldr	r3, .L1154+24
-	ldr	r0, [r3, #0]
-	ldrh	r3, [r0, #0]
-	cmp	r3, #0
-	bne	.L1136
-	ldr	r2, .L1154
-	ldrh	r2, [r2, #0]
-	cmp	r2, #0
-	beq	.L1136
-	ldr	r2, .L1154+28
-	ldrh	r4, [r2, #0]
-	mov	r2, r0
-	b	.L1137
-.L1140:
-	ldrh	r5, [r2], #2
-	adds	r3, r3, #1
-	cmp	r5, #0
-	beq	.L1137
-	ldr	r3, .L1154+20
-	sxth	r1, r1
-	subs	r6, r1, r6
-	add	r7, r0, r1, lsl #1
-	ldr	r5, [r3, #0]
+	uxth	r4, r4
 	movs	r3, #0
-	mov	r2, r3
-	mov	r4, r3
-	add	r0, r0, r6, lsl #1
-	add	ip, r5, r1, lsl #2
-	b	.L1138
-.L1139:
-	ldrh	r8, [r7, r2]
-	ldr	sl, [ip, r3]
-	strh	r8, [r0, r2]	@ movhi
-	add	r8, r5, r6, lsl #2
-	str	sl, [r8, r3]
-	mov	r8, #0
-	adds	r3, r3, #4
-	strh	r8, [r7, r2]	@ movhi
-	adds	r2, r2, #2
-.L1138:
-	ldr	r8, .L1154+28
-	add	sl, r4, r1
-	adds	r4, r4, #1
-	ldrh	r8, [r8, #0]
-	cmp	sl, r8
-	blt	.L1139
-	b	.L1136
-.L1155:
-	.align	2
-.L1154:
-	.word	.LANCHOR74
-	.word	.LANCHOR197
-	.word	.LC3
-	.word	.LC4
-	.word	.LC5
-	.word	.LANCHOR189
-	.word	.LANCHOR75
-	.word	.LANCHOR65
-	.word	.LANCHOR196
-	.word	.LANCHOR7
-	.word	.LANCHOR44
-	.word	.LANCHOR112
-	.word	.LANCHOR111
-	.word	.LANCHOR68
-	.word	.LANCHOR113
-.L1137:
-	cmp	r3, r4
-	uxth	r1, r3
-	mov	r6, r3
-	blt	.L1140
+	ldr	r2, [r8]
+	mov	r0, r6
+	bl	FlashProgPage
 .L1136:
-	ldr	r3, .L1156
-	ldrh	r2, [r3, #0]
-	ldr	r3, .L1156+4
-	ldr	r3, [r3, #0]
-	cmp	r2, r3
-	bls	.L1141
-	ldr	r1, .L1156+8
-	movw	r2, #1450
-	ldr	r0, .L1156+12
-	bl	printf
-	ldr	r0, .L1156+16
-	ldr	r1, .L1156+20
-	bl	printf
+	ldr	r3, [r5]
+	ldrh	r3, [r3, #10]
+	cmp	r3, r4
+	bhi	.L1135
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L1132:
+	cmp	r2, #68
+	bne	.L1130
+.L1134:
+	ldr	r10, .L1140+20
+	ldr	r8, .L1140+24
+	b	.L1136
+.L1130:
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
 .L1141:
-	movs	r0, #0
-	add	sp, sp, #40
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1157:
 	.align	2
-.L1156:
-	.word	.LANCHOR111
-	.word	.LANCHOR68
-	.word	.LANCHOR197
-	.word	.LC3
-	.word	.LC4
-	.word	.LC5
-	.size	FtlScanSysBlk, .-FtlScanSysBlk
-	.section	.text.FtlGetLastWrittenPage,"ax",%progbits
+.L1140:
+	.word	.LANCHOR18
+	.word	.LANCHOR8
+	.word	.LANCHOR152
+	.word	1446522928
+	.word	1073758215
+	.word	.LANCHOR117
+	.word	.LANCHOR151
+	.size	FlashPageProgMsbFFData, .-FlashPageProgMsbFFData
+	.section	.text.ftl_memcmp,"ax",%progbits
 	.align	1
-	.global	FtlGetLastWrittenPage
+	.global	ftl_memcmp
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlGetLastWrittenPage, %function
-FtlGetLastWrittenPage:
-	@ args = 0, pretend = 0, frame = 104
+	.fpu softvfp
+	.type	ftl_memcmp, %function
+ftl_memcmp:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	cmp	r1, #1
-	push	{r4, r5, r6, r7, r8, sl, lr}
-	sub	sp, sp, #108
-	it	eq
-	ldreq	r3, .L1169
-	mov	r5, r1
-	it	ne
-	ldrne	r3, .L1169+4
-	add	sl, sp, #68
-	lsl	r8, r0, #10
-	movs	r1, #1
-	mov	r0, sl
-	mov	r2, r5
-	ldrh	r4, [r3, #0]
-	add	r3, sp, #4
-	str	r3, [sp, #80]
-	movs	r7, #0
-	subs	r4, r4, #1
-	str	r7, [sp, #76]
-	uxth	r4, r4
-	sxth	r3, r4
-	orr	r3, r3, r8
-	str	r3, [sp, #72]
-	bl	FlashReadPages
-	ldr	r3, [sp, #4]
-	adds	r3, r3, #1
-	bne	.L1162
-	b	.L1167
-.L1165:
-	adds	r6, r6, r3
-	movs	r1, #1
-	mov	r0, sl
-	mov	r2, r5
-	add	r6, r6, r6, lsr #31
-	ubfx	r6, r6, #1, #16
-	sxth	r3, r6
-	orr	r3, r3, r8
-	str	r3, [sp, #72]
-	bl	FlashReadPages
-	ldr	r3, [sp, #4]
-	adds	r3, r3, #1
-	bne	.L1163
-	ldr	r3, [sp, #8]
-	adds	r3, r3, #1
-	bne	.L1163
-	ldr	r3, [sp, #68]
-	adds	r3, r3, #1
-	beq	.L1163
-	subs	r4, r6, #1
-	uxth	r4, r4
-	b	.L1167
-.L1163:
-	adds	r6, r6, #1
-	uxth	r7, r6
-.L1167:
-	sxth	r6, r7
-	sxth	r3, r4
-	cmp	r6, r3
-	ble	.L1165
-.L1162:
-	sxth	r0, r4
-	add	sp, sp, #108
-	pop	{r4, r5, r6, r7, r8, sl, pc}
-.L1170:
-	.align	2
-.L1169:
-	.word	.LANCHOR57
-	.word	.LANCHOR56
-	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
-	.section	.text.FtlLoadSysInfo,"ax",%progbits
-	.align	1
-	.global	FtlLoadSysInfo
+	@ link register save eliminated.
+	b	memcmp
+	.size	ftl_memcmp, .-ftl_memcmp
+	.section	.text.rknand_get_clk_rate,"ax",%progbits
+	.align	1
+	.global	rknand_get_clk_rate
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlLoadSysInfo, %function
-FtlLoadSysInfo:
-	@ args = 0, pretend = 0, frame = 8
+	.fpu softvfp
+	.type	rknand_get_clk_rate, %function
+rknand_get_clk_rate:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r0, .L1144
+	bx	lr
+.L1145:
+	.align	2
+.L1144:
+	.word	148000000
+	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
+	.section	.text.ftl_malloc,"ax",%progbits
+	.align	1
+	.global	ftl_malloc
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_malloc, %function
+ftl_malloc:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	movs	r1, #0
+	b	kmalloc
+	.size	ftl_malloc, .-ftl_malloc
+	.section	.text.NandcInit,"ax",%progbits
+	.align	1
+	.global	NandcInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	NandcInit, %function
+NandcInit:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	ldr	r3, .L1148
+	movs	r2, #1
+	push	{r4, lr}
 	movs	r4, #0
-	ldr	r6, .L1192
-	mov	r1, r4
-	ldr	r5, .L1192+4
-	ldr	r8, .L1192+60
-	ldr	r3, [r6, #0]
-	str	r4, [r5, #8]
-	str	r3, [r5, #12]
-	ldr	r3, .L1192+8
-	ldrh	r2, [r3, #0]
-	ldr	r3, .L1192+12
-	lsls	r2, r2, #1
-	ldr	r0, [r3, #0]
-	bl	memset
-	ldrh	r0, [r8, #0]
-	movw	r3, #65535
-	cmp	r0, r3
-	beq	.L1188
-	movs	r1, #1
-	mov	fp, r8
-	bl	FtlGetLastWrittenPage
-	uxth	sl, r0
-	mov	r7, r0
-	add	r3, sl, #1
-	strh	r3, [r8, #2]	@ movhi
-	ldr	r8, .L1192+160
-	ldr	r3, .L1192+16
-	b	.L1173
-.L1176:
-	ldrh	r1, [fp, #0]
-	sxth	r2, sl
-	subs	r2, r2, r4
-	ldr	r0, .L1192+4
-	orr	r2, r2, r1, lsl #10
-	str	r2, [r5, #4]
-	ldr	r2, [r8, #0]
-	movs	r1, #1
-	str	r2, [r5, #8]
-	mov	r2, r1
-	str	r3, [sp, #4]
-	bl	FlashReadPages
-	ldr	r2, [r5, #0]
-	ldr	r3, [sp, #4]
-	adds	r2, r2, #1
-	beq	.L1174
-	ldr	r2, [r8, #0]
-	ldr	r2, [r2, #0]
-	cmp	r2, r3
-	bne	.L1174
-	ldr	r2, [r6, #0]
-	ldrh	r1, [r2, #0]
-	movw	r2, #61604
-	cmp	r1, r2
-	beq	.L1175
-.L1174:
-	adds	r4, r4, #1
-.L1173:
-	subs	r2, r7, r4
-	lsls	r2, r2, #16
-	bpl	.L1176
-	b	.L1191
-.L1175:
-	ldr	r3, .L1192+8
-	ldrh	r2, [r3, #0]
-	ldr	r3, .L1192+20
-	adds	r2, r2, #24
-	ldrh	r3, [r3, #0]
-	cmp	r3, r2, lsl #1
-	bcs	.L1178
-	ldr	r1, .L1192+24
-	mov	r2, #1512
-	ldr	r0, .L1192+28
-	bl	printf
-	ldr	r0, .L1192+32
-	ldr	r1, .L1192+36
-	bl	printf
-.L1178:
-	ldr	r4, .L1192+4
-	movs	r2, #48
-	ldr	r5, .L1192+8
-	ldr	r0, .L1192+40
-	ldr	r1, [r4, #8]
-	bl	memcpy
-	ldr	r3, .L1192+12
-	ldrh	r2, [r5, #0]
-	ldr	r1, [r4, #8]
-	ldr	r0, [r3, #0]
-	adds	r1, r1, #48
-	lsls	r2, r2, #1
-	bl	memcpy
-	ldrh	r2, [r5, #0]
-	ldr	r0, .L1192+44
-	add	r1, r2, #24
-	ldr	r3, [r4, #8]
-	lsrs	r2, r2, #3
-	lsrs	r1, r1, #1
-	ldr	r0, [r0, #0]
-	adds	r2, r2, #4
-	add	r1, r3, r1, lsl #2
-	bl	memcpy
-	ldr	r3, .L1192+48
-	ldrh	r3, [r3, #0]
-	cbz	r3, .L1179
-	ldrh	r3, [r5, #0]
-	ldr	r2, .L1192+52
-	ldr	r0, .L1192+56
-	lsrs	r1, r3, #3
-	add	r1, r1, r3, lsl #1
-	ldrh	r2, [r2, #0]
-	adds	r1, r1, #52
-	ldr	r3, [r4, #8]
-	ubfx	r1, r1, #2, #14
-	ldr	r0, [r0, #0]
-	lsls	r2, r2, #2
-	add	r1, r3, r1, lsl #2
-	bl	memcpy
-.L1179:
-	ldr	r3, .L1192+40
-	ldr	r2, .L1192+16
-	ldr	r1, [r3, #0]
-	cmp	r1, r2
-	bne	.L1188
-	ldrh	r4, [r3, #8]
-	ldr	r2, .L1192+60
-	strh	r4, [r2, #6]	@ movhi
-	ldrb	r2, [r3, #10]	@ zero_extendqisi2
-	ldr	r3, .L1192+64
-	ldrh	r3, [r3, #0]
-	cmp	r2, r3
-	bne	.L1188
-	ldr	r3, .L1192+68
-	ldr	r2, .L1192+72
-	str	r4, [r3, #0]
-	ldr	r3, .L1192+76
-	ldrh	r3, [r3, #0]
-	muls	r3, r4, r3
-	str	r3, [r2, #0]
-	ldr	r2, .L1192+80
-	ldrh	r2, [r2, #0]
-	muls	r3, r2, r3
-	ldr	r2, .L1192+84
-	str	r3, [r2, #0]
-	ldr	r3, .L1192+88
-	ldr	r5, [r3, #0]
-	ldr	r3, .L1192+92
-	ldrh	r0, [r3, #6]
-	ldr	r3, .L1192+96
-	subs	r0, r5, r0
-	subs	r0, r0, r4
-	ldrh	r1, [r3, #0]
-	bl	__aeabi_uidiv
-	ldr	r3, .L1192+100
-	cmp	r4, r5
-	strh	r0, [r3, #0]	@ movhi
-	bls	.L1180
-	ldr	r1, .L1192+24
-	movw	r2, #1539
-	ldr	r0, .L1192+28
-	bl	printf
-	ldr	r0, .L1192+32
-	ldr	r1, .L1192+36
-	bl	printf
-.L1180:
-	ldr	r3, .L1192+40
-	ldr	r2, .L1192+104
-	ldrh	r1, [r3, #16]
-	ldrh	r0, [r3, #14]
-	ldrh	r5, [r3, #18]
-	lsrs	r4, r1, #6
-	and	r1, r1, #63
-	strb	r1, [r2, #6]
-	ldrb	r1, [r3, #11]	@ zero_extendqisi2
-	strh	r4, [r2, #2]	@ movhi
-	movw	r4, #65535
-	strh	r0, [r2, #0]	@ movhi
-	strb	r1, [r2, #8]
-	movs	r2, #0
-	ldr	r1, .L1192+108
-	strh	r2, [r1, #2]	@ movhi
-	strh	r4, [r1, #0]	@ movhi
-	strb	r2, [r1, #6]
-	strb	r2, [r1, #8]
-	ldr	r1, .L1192+112
-	strh	r5, [r1, #0]	@ movhi
-	ldrh	r5, [r3, #20]
-	lsrs	r6, r5, #6
-	and	r5, r5, #63
-	strb	r5, [r1, #6]
-	ldrb	r5, [r3, #12]	@ zero_extendqisi2
-	strh	r6, [r1, #2]	@ movhi
-	strb	r5, [r1, #8]
-	ldr	r1, .L1192+116
-	ldrh	r5, [r3, #22]
-	strh	r5, [r1, #0]	@ movhi
-	ldrh	r5, [r3, #24]
-	lsrs	r6, r5, #6
-	and	r5, r5, #63
-	strb	r5, [r1, #6]
-	ldrb	r5, [r3, #13]	@ zero_extendqisi2
-	strh	r6, [r1, #2]	@ movhi
-	strb	r5, [r1, #8]
-	ldr	r1, .L1192+120
-	ldr	r5, [r3, #32]
-	str	r2, [r1, #0]
-	ldr	r1, .L1192+124
-	str	r2, [r1, #0]
-	ldr	r1, .L1192+128
-	str	r2, [r1, #0]
-	ldr	r1, .L1192+132
-	str	r2, [r1, #0]
-	ldr	r1, .L1192+136
-	str	r5, [r1, #0]
-	ldr	r1, .L1192+140
-	str	r2, [r1, #0]
-	ldr	r1, .L1192+144
-	str	r2, [r1, #0]
-	ldr	r1, .L1192+148
-	str	r2, [r1, #0]
-	ldr	r2, .L1192+152
-	ldr	r1, [r3, #40]
-	ldr	r5, [r2, #0]
-	cmp	r1, r5
-	it	hi
-	strhi	r1, [r2, #0]
-	ldr	r2, [r3, #36]
-	ldr	r3, .L1192+156
-	ldr	r1, [r3, #0]
-	cmp	r2, r1
-	it	hi
-	strhi	r2, [r3, #0]
-	cmp	r0, r4
-	beq	.L1183
-	ldr	r0, .L1192+104
-	bl	make_superblock
-.L1183:
-	ldr	r0, .L1192+112
-	movw	r4, #65535
-	ldrh	r3, [r0, #0]
-	cmp	r3, r4
-	beq	.L1184
-	bl	make_superblock
-.L1184:
-	ldr	r0, .L1192+116
-	ldrh	r3, [r0, #0]
-	cmp	r3, r4
-	beq	.L1185
-	bl	make_superblock
-.L1185:
-	ldr	r0, .L1192+108
-	movw	r3, #65535
-	ldrh	r2, [r0, #0]
-	cmp	r2, r3
-	beq	.L1189
-	bl	make_superblock
-	b	.L1189
-.L1188:
-	mov	r0, #-1
-	b	.L1172
-.L1189:
-	movs	r0, #0
-.L1172:
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1191:
-	ldr	r1, .L1192+24
-	movw	r2, #1510
-	ldr	r0, .L1192+28
-	bl	printf
-	ldr	r1, .L1192+36
-	ldr	r0, .L1192+32
-	bl	printf
-	b	.L1175
-.L1193:
+	str	r2, [r3, #12]
+	movs	r2, #2
+	str	r2, [r3, #20]
+	movs	r2, #3
+	stm	r3, {r0, r4}
+	str	r0, [r3, #8]
+	str	r0, [r3, #16]
+	str	r2, [r3, #28]
+	str	r0, [r3, #24]
+	ldr	r3, .L1148+4
+	ldr	r2, .L1148+8
+	str	r0, [r3]
+	ldr	r3, [r0]
+	and	r3, r3, #253952
+	ubfx	r1, r3, #13, #1
+	and	r3, r3, #245760
+	str	r1, [r2]
+	orr	r3, r3, #256
+	ldr	r2, [r0, #352]
+	ldr	r1, .L1148+12
+	ubfx	r2, r2, #16, #4
+	str	r2, [r1]
+	ldr	r1, [r0, #352]
+	ldr	r2, .L1148+16
+	str	r1, [r2]
+	str	r3, [r0]
+	movw	r3, #4225
+	str	r4, [r0, #336]
+	str	r3, [r0, #4]
+	movw	r3, #8322
+	str	r3, [r0, #344]
+	ldr	r3, .L1148+20
+	str	r3, [r0, #304]
+	mov	r0, #36864
+	bl	ftl_malloc
+	ldr	r3, .L1148+24
+	str	r0, [r3]
+	ldr	r3, .L1148+28
+	str	r0, [r3]
+	add	r0, r0, #32768
+	str	r0, [r3, #4]
+	str	r4, [r3, #24]
+	ldr	r3, .L1148+32
+	str	r4, [r3]
+	pop	{r4, pc}
+.L1149:
 	.align	2
-.L1192:
-	.word	.LANCHOR184
-	.word	.LANCHOR198
-	.word	.LANCHOR43
-	.word	.LANCHOR89
-	.word	1179929683
-	.word	.LANCHOR61
-	.word	.LANCHOR199
-	.word	.LC3
-	.word	.LC4
-	.word	.LC5
-	.word	.LANCHOR131
-	.word	.LANCHOR107
-	.word	.LANCHOR73
-	.word	.LANCHOR70
-	.word	.LANCHOR191
-	.word	.LANCHOR196
-	.word	.LANCHOR48
-	.word	.LANCHOR200
-	.word	.LANCHOR76
-	.word	.LANCHOR56
-	.word	.LANCHOR59
-	.word	.LANCHOR72
-	.word	.LANCHOR45
-	.word	.LANCHOR78
-	.word	.LANCHOR41
-	.word	.LANCHOR201
-	.word	.LANCHOR97
-	.word	.LANCHOR202
-	.word	.LANCHOR98
-	.word	.LANCHOR99
-	.word	.LANCHOR158
-	.word	.LANCHOR159
-	.word	.LANCHOR163
-	.word	.LANCHOR162
-	.word	.LANCHOR164
-	.word	.LANCHOR165
-	.word	.LANCHOR166
-	.word	.LANCHOR161
-	.word	.LANCHOR156
-	.word	.LANCHOR157
-	.word	.LANCHOR86
-	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
-	.section	.text.FtlLoadBbt,"ax",%progbits
+.L1148:
+	.word	.LANCHOR6
+	.word	.LANCHOR19
+	.word	.LANCHOR153
+	.word	.LANCHOR32
+	.word	.LANCHOR152
+	.word	1710593
+	.word	.LANCHOR154
+	.word	.LANCHOR33
+	.word	.LANCHOR34
+	.size	NandcInit, .-NandcInit
+	.section	.text.FtlMemInit,"ax",%progbits
 	.align	1
-	.global	FtlLoadBbt
+	.global	FtlMemInit
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlLoadBbt, %function
-FtlLoadBbt:
-	@ args = 0, pretend = 0, frame = 8
+	.fpu softvfp
+	.type	FtlMemInit, %function
+FtlMemInit:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	movs	r3, #0
-	ldr	r6, .L1213
-	movw	sl, #61649
-	str	r3, [r6, #8]
-	ldr	r3, .L1213+4
-	ldr	r4, [r3, #0]
-	str	r4, [r6, #12]
-	bl	FtlBbtMemInit
-	ldr	r3, .L1213+8
-	mov	r8, r3
-	ldrh	r5, [r3, #0]
-	subs	r5, r5, #1
-	uxth	r5, r5
-	b	.L1195
-.L1199:
-	movs	r1, #1
-	ldr	r0, .L1213
-	mov	r2, r1
-	lsls	r3, r5, #10
-	str	r3, [r6, #4]
-	bl	FlashReadPages
-	ldr	r3, [r6, #0]
-	ldr	r7, .L1213
-	adds	r3, r3, #1
-	bne	.L1196
-	ldr	r3, [r6, #4]
-	movs	r1, #1
-	mov	r0, r7
-	mov	r2, r1
-	adds	r3, r3, #1
-	str	r3, [r6, #4]
-	bl	FlashReadPages
-.L1196:
-	ldr	r3, [r7, #0]
-	adds	r3, r3, #1
-	beq	.L1197
-	ldrh	r3, [r4, #0]
-	cmp	r3, sl
-	bne	.L1197
-	ldr	r3, .L1213+12
-	ldr	r2, [r4, #4]
-	strh	r5, [r3, #0]	@ movhi
-	str	r2, [r3, #8]
-	ldrh	r2, [r4, #8]
-	strh	r2, [r3, #4]	@ movhi
-	b	.L1198
-.L1197:
-	subs	r5, r5, #1
-	uxth	r5, r5
-.L1195:
-	ldrh	r3, [r8, #0]
-	subs	r3, r3, #47
-	cmp	r3, r5
-	ble	.L1199
-.L1198:
-	ldr	r5, .L1213+12
+	ldr	r3, .L1155
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #0
+	ldr	r2, .L1155+4
+	movs	r6, #12
+	strh	r4, [r3]	@ movhi
+	ldr	r3, .L1155+8
+	ldr	r5, .L1155+12
+	ldr	r10, .L1155+296
+	str	r4, [r3]
+	ldr	r3, .L1155+16
+	ldrh	r0, [r5]
+	ldr	r8, .L1155+300
+	str	r4, [r3]
+	ldr	r3, .L1155+20
+	lsls	r0, r0, #1
+	ldr	fp, .L1155+304
+	str	r4, [r3]
+	ldr	r3, .L1155+24
+	str	r4, [r3]
+	ldr	r3, .L1155+28
+	str	r4, [r3]
+	ldr	r3, .L1155+32
+	str	r4, [r3]
+	ldr	r3, .L1155+36
+	str	r4, [r3]
+	ldr	r3, .L1155+40
+	str	r4, [r3]
+	ldr	r3, .L1155+44
+	str	r4, [r3]
+	ldr	r3, .L1155+48
+	str	r4, [r3]
+	ldr	r3, .L1155+52
+	str	r4, [r3]
+	ldr	r3, .L1155+56
+	str	r4, [r3]
+	ldr	r3, .L1155+60
+	str	r4, [r3]
+	ldr	r3, .L1155+64
+	str	r4, [r3]
+	ldr	r3, .L1155+68
+	str	r4, [r3]
+	ldr	r3, .L1155+72
+	str	r4, [r3]
+	ldr	r3, .L1155+76
+	str	r4, [r3]
 	movw	r3, #65535
-	ldrh	r2, [r5, #0]
-	cmp	r2, r3
-	beq	.L1210
-	ldrh	r2, [r5, #4]
-	cmp	r2, r3
-	beq	.L1201
-	ldr	r6, .L1213
-	movs	r1, #1
-	lsls	r2, r2, #10
-	mov	r0, r6
-	str	r2, [r6, #4]
-	mov	r2, r1
-	bl	FlashReadPages
-	ldr	r3, [r6, #0]
+	str	r3, [r2]
+	ldr	r2, .L1155+80
+	str	r4, [r2]
+	ldr	r2, .L1155+84
+	str	r4, [r2]
+	ldr	r2, .L1155+88
+	str	r4, [r2]
+	ldr	r2, .L1155+92
+	strh	r3, [r2]	@ movhi
+	ldr	r2, .L1155+96
+	strh	r3, [r2]	@ movhi
+	movs	r2, #32
+	ldr	r3, .L1155+100
+	strh	r2, [r3]	@ movhi
+	movs	r2, #128
+	ldr	r3, .L1155+104
+	strh	r2, [r3]	@ movhi
+	ldr	r3, .L1155+108
+	strh	r4, [r3]	@ movhi
+	ldr	r3, .L1155+112
+	strh	r4, [r3]	@ movhi
+	ldr	r3, .L1155+116
+	strh	r4, [r3]	@ movhi
+	ldr	r3, .L1155+120
+	strh	r4, [r3]	@ movhi
+	bl	ftl_malloc
+	ldr	r3, .L1155+124
+	str	r0, [r3]
+	ldrh	r0, [r5]
+	movs	r5, #36
+	muls	r0, r6, r0
+	bl	ftl_malloc
+	ldr	r3, .L1155+128
+	str	r0, [r3]
+	ldrh	r3, [r10]
+	muls	r5, r3, r5
+	lsls	r7, r5, #2
+	mov	r0, r7
+	bl	ftl_malloc
+	ldr	r3, .L1155+132
+	str	r0, [r3]
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L1155+136
+	str	r0, [r3]
+	mov	r0, r7
+	bl	ftl_malloc
+	ldr	r3, .L1155+140
+	ldr	r7, .L1155+144
+	str	r0, [r3]
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L1155+148
+	str	r0, [r3]
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L1155+152
+	ldrh	r5, [r7]
+	str	r0, [r3]
+	ldrh	r3, [r10]
+	mov	r0, r5
+	lsls	r3, r3, #1
 	adds	r3, r3, #1
-	beq	.L1201
-	ldrh	r2, [r4, #0]
-	movw	r3, #61649
-	cmp	r2, r3
-	bne	.L1201
-	ldr	r3, [r4, #4]
-	ldr	r2, [r5, #8]
-	cmp	r3, r2
-	bls	.L1201
-	ldrh	r2, [r5, #4]
-	str	r3, [r5, #8]
-	ldrh	r3, [r4, #8]
-	strh	r2, [r5, #0]	@ movhi
-	strh	r3, [r5, #4]	@ movhi
-.L1201:
-	ldr	fp, .L1213+12
-	movs	r1, #1
-	movs	r5, #0
-	ldr	r6, .L1213
-	ldr	r8, .L1213+48
-	ldrh	r0, [fp, #0]
-	bl	FtlGetLastWrittenPage
-	uxth	sl, r0
-	mov	r7, r0
-	add	r3, sl, #1
-	strh	r3, [fp, #2]	@ movhi
-	sxth	sl, sl
-	movw	r3, #61649
-	b	.L1202
-.L1205:
-	ldrh	r1, [fp, #0]
-	rsb	r2, r5, sl
-	ldr	r0, .L1213
-	orr	r2, r2, r1, lsl #10
-	str	r2, [r6, #4]
-	ldr	r2, [r8, #0]
-	movs	r1, #1
-	str	r3, [sp, #4]
-	str	r2, [r6, #8]
-	mov	r2, r1
-	bl	FlashReadPages
-	ldr	r2, [r6, #0]
-	ldr	r3, [sp, #4]
-	adds	r2, r2, #1
-	beq	.L1203
-	ldrh	r2, [r4, #0]
-	cmp	r2, r3
-	beq	.L1204
-.L1203:
-	adds	r5, r5, #1
-.L1202:
-	subs	r2, r7, r5
-	lsls	r1, r2, #16
-	bpl	.L1205
-	b	.L1212
-.L1204:
-	ldr	r3, .L1213+12
-	ldrh	r2, [r4, #10]
-	ldrh	r0, [r4, #12]
-	strh	r2, [r3, #6]	@ movhi
-	movw	r3, #65535
-	cmp	r0, r3
-	beq	.L1207
-	ldr	r3, .L1213+16
-	ldr	r2, [r3, #0]
-	cmp	r0, r2
-	beq	.L1207
-	ldr	r3, .L1213+20
-	ldrh	r3, [r3, #0]
-	lsrs	r3, r3, #2
-	cmp	r2, r3
-	bcs	.L1207
-	cmp	r0, r3
-	bcs	.L1207
-	bl	FtlSysBlkNumInit
-.L1207:
-	ldr	r5, .L1213+24
-	movs	r4, #0
-	ldr	r8, .L1213+52
-	ldr	r7, .L1213+28
-	ldr	r6, .L1213
-	b	.L1208
-.L1209:
-	ldrh	r2, [r7, #0]
-	ldr	r1, [r6, #8]
-	ldr	r0, [r5, #4]!
+	str	r3, [r8]
+	bl	ftl_malloc
+	ldr	r3, .L1155+156
+	str	r0, [r3]
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L1155+160
+	str	r0, [r3]
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L1155+164
+	str	r0, [r3]
+	ldr	r0, [r8]
+	muls	r0, r5, r0
+	bl	ftl_malloc
+	ldr	r3, .L1155+168
+	str	r0, [r3]
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L1155+172
+	str	r0, [r3]
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L1155+176
+	str	r0, [r3]
+	ldr	r0, [r8]
+	muls	r0, r6, r0
+	bl	ftl_malloc
+	ldr	r3, .L1155+180
+	ldrh	r5, [r10]
+	ldr	r10, .L1155+308
+	str	r0, [r3]
+	ldrh	r3, [fp]
+	muls	r5, r3, r5
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L1155+184
+	str	r0, [r3]
+	lsls	r0, r5, #2
+	ldr	r5, .L1155+188
+	bl	ftl_malloc
+	ldr	r3, .L1155+192
+	str	r0, [r3]
+	ldrh	r3, [fp]
+	ldr	r0, [r8]
+	ldr	r8, .L1155+312
+	muls	r0, r3, r0
+	bl	ftl_malloc
+	ldr	r3, .L1155+196
+	str	r0, [r3]
+	ldrh	r0, [r5]
+	lsls	r0, r0, #1
+	uxth	r0, r0
+	strh	r0, [r8]	@ movhi
+	bl	ftl_malloc
+	ldr	r3, .L1155+200
+	str	r0, [r3]
+	ldrh	r3, [r8]
+	ldr	r0, .L1155+204
+	addw	r3, r3, #547
+	lsrs	r3, r3, #9
+	and	r0, r0, r3, lsl #9
+	strh	r3, [r8]	@ movhi
+	bl	ftl_malloc
+	ldr	r3, .L1155+208
+	str	r0, [r3]
+	adds	r0, r0, #32
+	ldr	r3, .L1155+212
+	str	r0, [r3]
+	ldrh	r0, [r5]
+	lsls	r0, r0, #1
+	bl	ftl_malloc
+	ldr	r3, .L1155+216
+	str	r0, [r3]
+	ldr	r3, [r10]
+	lsl	r8, r3, #1
+	mov	r0, r8
+	bl	ftl_malloc
+	ldr	r3, .L1155+220
+	str	r0, [r3]
+	mov	r0, r8
+	bl	ftl_malloc
+	ldr	r3, .L1155+224
+	ldr	r8, .L1155+316
+	str	r0, [r3]
+	ldrh	r0, [r5]
+	lsrs	r0, r0, #3
+	adds	r0, r0, #4
+	bl	ftl_malloc
+	ldr	r3, .L1155+228
+	str	r0, [r3]
+	ldrh	r0, [r8]
+	lsls	r0, r0, #1
+	bl	ftl_malloc
+	ldr	r3, .L1155+232
+	str	r0, [r3]
+	ldrh	r0, [r8]
+	lsls	r0, r0, #1
+	bl	ftl_malloc
+	ldr	r3, .L1155+236
+	str	r0, [r3]
+	ldrh	r0, [r8]
+	ldr	r8, .L1155+320
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L1155+240
+	str	r0, [r3]
+	ldrh	r0, [r8]
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldrh	r2, [r8]
+	mov	r1, r4
+	ldr	r3, .L1155+244
 	lsls	r2, r2, #2
-	mla	r1, r4, r2, r1
-	bl	memcpy
-	adds	r4, r4, #1
-.L1208:
-	ldrh	r3, [r8, #0]
-	cmp	r4, r3
-	bcc	.L1209
-	movs	r0, #0
-	b	.L1200
-.L1210:
-	mov	r0, #-1
-.L1200:
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1212:
-	ldr	r1, .L1213+32
-	mov	r2, #336
-	ldr	r0, .L1213+36
-	bl	printf
-	ldr	r1, .L1213+40
-	ldr	r0, .L1213+44
-	bl	printf
-	b	.L1204
-.L1214:
+	str	r0, [r3]
+	bl	ftl_memset
+	ldr	r3, .L1155+248
+	ldrh	r4, [r3]
+	lsls	r4, r4, #2
+	mov	r0, r4
+	bl	ftl_malloc
+	ldr	r3, .L1155+252
+	str	r0, [r3]
+	mov	r0, r4
+	bl	ftl_malloc
+	ldr	r3, .L1155+256
+	ldr	r4, .L1155+260
+	str	r0, [r3]
+	ldr	r0, [r10]
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L1155+264
+	str	r0, [r3]
+	ldrh	r0, [r4]
+	muls	r0, r6, r0
+	ldr	r6, .L1155+268
+	bl	ftl_malloc
+	ldr	r3, .L1155+272
+	str	r0, [r3]
+	ldrh	r3, [r4]
+	ldrh	r0, [r7]
+	muls	r0, r3, r0
+	bl	ftl_malloc
+	ldr	r3, .L1155+276
+	str	r0, [r3]
+	movs	r0, #6
+	ldrh	r3, [r5]
+	ldr	r5, .L1155+280
+	muls	r0, r3, r0
+	bl	ftl_malloc
+	ldr	r3, .L1155+284
+	str	r0, [r3]
+	ldr	r3, .L1155+288
+	ldrh	r0, [r3]
+	ldrh	r3, [r6]
+	adds	r0, r0, #31
+	asrs	r0, r0, #5
+	strh	r0, [r5]	@ movhi
+	muls	r0, r3, r0
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldrh	r1, [r5]
+	movs	r2, #1
+	ldr	r3, .L1155+292
+	ldrh	r6, [r6]
+	lsls	r1, r1, #2
+	mov	r4, r3
+	str	r0, [r4, #28]!
+	mov	r0, r1
+	b	.L1156
+.L1157:
 	.align	2
-.L1213:
-	.word	.LANCHOR198
-	.word	.LANCHOR184
-	.word	.LANCHOR54
+.L1155:
+	.word	.LANCHOR137
+	.word	.LANCHOR171
+	.word	.LANCHOR155
+	.word	.LANCHOR53
+	.word	.LANCHOR156
+	.word	.LANCHOR157
+	.word	.LANCHOR158
+	.word	.LANCHOR159
+	.word	.LANCHOR160
+	.word	.LANCHOR161
+	.word	.LANCHOR162
+	.word	.LANCHOR163
+	.word	.LANCHOR164
+	.word	.LANCHOR165
+	.word	.LANCHOR166
 	.word	.LANCHOR78
-	.word	.LANCHOR40
-	.word	.LANCHOR44
-	.word	.LANCHOR78+24
+	.word	.LANCHOR167
+	.word	.LANCHOR168
+	.word	.LANCHOR169
+	.word	.LANCHOR170
+	.word	.LANCHOR172
+	.word	.LANCHOR173
+	.word	.LANCHOR72
+	.word	.LANCHOR112
+	.word	.LANCHOR113
+	.word	.LANCHOR174
+	.word	.LANCHOR175
+	.word	.LANCHOR176
+	.word	.LANCHOR114
+	.word	.LANCHOR177
+	.word	.LANCHOR116
+	.word	.LANCHOR108
+	.word	.LANCHOR111
+	.word	.LANCHOR178
+	.word	.LANCHOR179
+	.word	.LANCHOR180
+	.word	.LANCHOR56
+	.word	.LANCHOR76
+	.word	.LANCHOR106
 	.word	.LANCHOR79
-	.word	.LANCHOR203
-	.word	.LC3
-	.word	.LC5
-	.word	.LC4
-	.word	.LANCHOR86
-	.word	.LANCHOR48
-	.size	FtlLoadBbt, .-FtlLoadBbt
-	.section	.text.FtlLoadFactoryBbt,"ax",%progbits
+	.word	.LANCHOR181
+	.word	.LANCHOR182
+	.word	.LANCHOR104
+	.word	.LANCHOR183
+	.word	.LANCHOR184
+	.word	.LANCHOR103
+	.word	.LANCHOR185
+	.word	.LANCHOR39
+	.word	.LANCHOR186
+	.word	.LANCHOR105
+	.word	.LANCHOR134
+	.word	33553920
+	.word	.LANCHOR188
+	.word	.LANCHOR77
+	.word	.LANCHOR82
+	.word	.LANCHOR126
+	.word	.LANCHOR122
+	.word	.LANCHOR0
+	.word	.LANCHOR70
+	.word	.LANCHOR189
+	.word	.LANCHOR190
+	.word	.LANCHOR191
+	.word	.LANCHOR65
+	.word	.LANCHOR128
+	.word	.LANCHOR192
+	.word	.LANCHOR66
+	.word	.LANCHOR127
+	.word	.LANCHOR43
+	.word	.LANCHOR95
+	.word	.LANCHOR123
+	.word	.LANCHOR120
+	.word	.LANCHOR80
+	.word	.LANCHOR49
+	.word	.LANCHOR73
+	.word	.LANCHOR36
+	.word	.LANCHOR107
+	.word	.LANCHOR57
+	.word	.LANCHOR63
+	.word	.LANCHOR187
+	.word	.LANCHOR60
+	.word	.LANCHOR61
+.L1156:
+.L1151:
+	cmp	r2, r6
+	bcc	.L1152
+	add	r3, r3, r2, lsl #2
+	ldr	r2, .L1158
+	movs	r1, #0
+	adds	r3, r3, #24
+.L1153:
+	cmp	r3, r2
+	bne	.L1154
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1152:
+	ldr	r5, [r3, #28]
+	adds	r2, r2, #1
+	add	r5, r5, r0
+	add	r0, r0, r1
+	str	r5, [r4, #4]!
+	b	.L1151
+.L1154:
+	str	r1, [r3, #4]!
+	b	.L1153
+.L1159:
+	.align	2
+.L1158:
+	.word	.LANCHOR73+56
+	.size	FtlMemInit, .-FtlMemInit
+	.section	.text.ftl_free,"ax",%progbits
 	.align	1
-	.global	FtlLoadFactoryBbt
+	.global	ftl_free
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlLoadFactoryBbt, %function
-FtlLoadFactoryBbt:
-	@ args = 0, pretend = 0, frame = 8
+	.fpu softvfp
+	.type	ftl_free, %function
+ftl_free:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1222
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	movs	r5, #0
-	ldr	r7, .L1222+4
-	ldr	r3, [r3, #0]
-	ldr	r6, .L1222+8
-	ldr	r8, .L1222+20
-	str	r3, [r7, #8]
-	ldr	r3, .L1222+12
-	ldr	sl, [r3, #0]
-	ldr	r3, .L1222+16
-	str	sl, [r7, #12]
-	b	.L1216
-.L1221:
-	ldrh	r4, [r8, #0]
-	movw	r2, #65535
-	movw	fp, #61664
-	strh	r2, [r6], #2	@ movhi
-	subs	r4, r4, #1
-	uxth	r4, r4
-	b	.L1217
-.L1220:
-	mla	r2, r2, r5, r4
-	movs	r1, #1
-	ldr	r0, .L1222+4
-	lsls	r2, r2, #10
-	str	r2, [r7, #4]
-	mov	r2, r1
-	str	r3, [sp, #4]
-	bl	FlashReadPages
-	ldr	r2, [r7, #0]
-	ldr	r3, [sp, #4]
-	adds	r2, r2, #1
-	beq	.L1218
-	ldrh	r2, [sl, #0]
-	cmp	r2, fp
-	bne	.L1218
-	strh	r4, [r6, #-2]	@ movhi
-	b	.L1219
-.L1218:
-	subs	r4, r4, #1
-	uxth	r4, r4
-.L1217:
-	ldrh	r2, [r8, #0]
-	sub	r1, r2, #15
-	cmp	r1, r4
-	ble	.L1220
-.L1219:
-	adds	r5, r5, #1
-.L1216:
-	ldrh	r2, [r3, #0]
-	cmp	r5, r2
-	bcc	.L1221
-	movs	r0, #0
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1223:
-	.align	2
-.L1222:
-	.word	.LANCHOR86
-	.word	.LANCHOR198
-	.word	.LANCHOR78+12
-	.word	.LANCHOR184
-	.word	.LANCHOR48
-	.word	.LANCHOR54
-	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
-	.section	.text.FlashProgSlc2KPages,"ax",%progbits
+	@ link register save eliminated.
+	b	free
+	.size	ftl_free, .-ftl_free
+	.section	.text.StorageSysDataLoad,"ax",%progbits
 	.align	1
-	.global	FlashProgSlc2KPages
+	.global	StorageSysDataLoad
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FlashProgSlc2KPages, %function
-FlashProgSlc2KPages:
-	@ args = 0, pretend = 0, frame = 56
+	.fpu softvfp
+	.type	StorageSysDataLoad, %function
+StorageSysDataLoad:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	sub	sp, sp, #64
-	mov	sl, r0
-	mov	fp, r1
-	str	r3, [sp, #12]
+	push	{r4, r5, r6, lr}
+	mov	r4, r1
 	mov	r5, r0
-	ldr	r3, .L1242
-	movs	r6, #0
-	str	r2, [sp, #8]
-	ldr	r7, .L1242+4
-	ldrb	r8, [r3, #9]	@ zero_extendqisi2
-	b	.L1225
-.L1232:
-	rsb	r3, r6, fp
-	ldr	r1, [sp, #8]
-	add	r2, sp, #56
-	mov	r0, r5
-	uxtb	r3, r3
-	str	r3, [sp, #0]
-	add	r3, sp, #60
-	bl	LogAddr2PhyAddr
-	ldr	r1, .L1242+8
-	ldr	r3, [sp, #60]
-	ldrb	r2, [r1, #0]	@ zero_extendqisi2
-	cmp	r3, r2
-	bcc	.L1226
-	mov	r3, #-1
-	str	r3, [r5, #0]
-	b	.L1227
-.L1226:
-	ldr	r2, .L1242+12
-	ldrb	r4, [r2, r3]	@ zero_extendqisi2
-	mov	r0, r4
-	bl	NandcWaitFlashReady
-	mov	r0, r4
-	bl	NandcFlashCs
-	mov	r0, r4
-	ldr	r1, [sp, #56]
-	bl	FlashProgFirstCmd
-	ldr	r3, [r5, #12]
-	mov	r2, r8
-	movs	r1, #1
-	mov	r0, r4
-	str	r3, [sp, #0]
-	ldr	r3, [r5, #8]
-	bl	NandcXferData
-	ldr	r1, [sp, #56]
-	mov	r0, r4
-	bl	FlashProgSecondCmd
-	mov	r0, r4
-	bl	NandcWaitFlashReady
-	ldr	r1, [sp, #56]
-	mov	r0, r4
-	bl	FlashReadStatus
-	ldr	r3, [sp, #56]
-	ldr	r1, [r7, #0]
-	adds	r1, r1, r3
-	ands	r0, r0, #1
-	it	ne
-	movne	r0, #-1
-	str	r0, [r5, #0]
-	mov	r0, r4
-	bl	FlashProgFirstCmd
-	ldr	r3, [r5, #8]
-	cbz	r3, .L1229
-	add	r3, r3, #2048
-.L1229:
-	ldr	r2, [r5, #12]
-	cbz	r2, .L1230
-	adds	r2, r2, #8
-.L1230:
-	movs	r1, #1
-	str	r2, [sp, #0]
-	mov	r0, r4
-	mov	r2, r8
-	bl	NandcXferData
-	ldr	r3, [sp, #56]
-	ldr	r1, [r7, #0]
-	mov	r0, r4
-	adds	r1, r1, r3
-	bl	FlashProgSecondCmd
-	mov	r0, r4
-	bl	NandcWaitFlashReady
-	mov	r0, r4
-	ldr	r1, [sp, #56]
-	bl	FlashReadStatus
-	lsls	r3, r0, #31
+	mov	r2, #512
+	movs	r1, #0
 	mov	r0, r4
-	itt	mi
-	movmi	r3, #-1
-	strmi	r3, [r5, #0]
-	bl	NandcFlashDeCs
-.L1227:
-	adds	r6, r6, #1
-	adds	r5, r5, #36
-.L1225:
-	cmp	r6, fp
-	bne	.L1232
-	ldr	r3, [sp, #12]
-	cmp	r3, #0
-	beq	.L1233
+	bl	memset
+	mov	r3, r4
+	add	r1, r5, #256
+	movs	r2, #1
+	movs	r0, #16
+	pop	{r4, r5, r6, lr}
+	b	FtlRead
+	.size	StorageSysDataLoad, .-StorageSysDataLoad
+	.section	.text.StorageSysDataStore,"ax",%progbits
+	.align	1
+	.global	StorageSysDataStore
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	StorageSysDataStore, %function
+StorageSysDataStore:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r3, r1
+	movs	r2, #1
+	add	r1, r0, #256
+	movs	r0, #16
+	b	FtlWrite
+	.size	StorageSysDataStore, .-StorageSysDataStore
+	.section	.text.FlashCs123Init,"ax",%progbits
+	.align	1
+	.global	FlashCs123Init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashCs123Init, %function
+FlashCs123Init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	FlashCs123Init, .-FlashCs123Init
+	.section	.text.rk_nand_de_init,"ax",%progbits
+	.align	1
+	.global	rk_nand_de_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_nand_de_init, %function
+rk_nand_de_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	FlashDeInit
+	.size	rk_nand_de_init, .-rk_nand_de_init
+	.section	.text.rk_ftl_get_capacity,"ax",%progbits
+	.align	1
+	.global	rk_ftl_get_capacity
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_ftl_get_capacity, %function
+rk_ftl_get_capacity:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L1166
+	ldr	r0, [r3]
+	bx	lr
+.L1167:
+	.align	2
+.L1166:
+	.word	.LANCHOR67
+	.size	rk_ftl_get_capacity, .-rk_ftl_get_capacity
+	.section	.text.rknand_print_hex,"ax",%progbits
+	.align	1
+	.global	rknand_print_hex
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rknand_print_hex, %function
+rknand_print_hex:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r5, #0
-	add	r4, sl, #8
-	ldr	r6, .L1242+16
-	mov	sl, r5
-	ldr	r8, .L1242+36
-	b	.L1234
-.L1239:
-	ldr	r3, [r4, #-8]
-	sub	r7, r4, #8
-	adds	r3, r3, #1
-	bne	.L1235
-	ldr	r1, [r4, #-4]
-	ldr	r0, .L1242+20
+	ldr	r7, .L1177
+	mov	fp, r0
+	mov	r6, r1
+	mov	r8, r2
+	mov	r10, r3
+	mov	r4, r5
+.L1169:
+	cmp	r4, r10
+	bne	.L1175
+	ldr	r1, .L1177+4
+	ldr	r0, .L1177+8
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	printf
+.L1175:
+	cbnz	r5, .L1170
+	mov	r2, r4
+	mov	r1, fp
+	ldr	r0, .L1177+12
 	bl	printf
-	b	.L1236
-.L1235:
-	rsb	r3, sl, fp
+.L1170:
+	cmp	r8, #4
+	bne	.L1171
+	ldr	r1, [r6, r4, lsl #2]
+.L1176:
 	mov	r0, r7
-	ldr	r1, [sp, #8]
-	add	r2, sp, #56
-	uxtb	r3, r3
-	str	r3, [sp, #0]
-	add	r3, sp, #60
-	add	r5, sp, #20
-	bl	LogAddr2PhyAddr
-	ldr	lr, [r6, #0]
-	ldr	ip, [r8, #0]
-	movs	r3, #0
-	str	r3, [lr, #0]
-	str	r3, [ip, #0]
-	ldmia	r7!, {r0, r1, r2, r3}
-	stmia	r5!, {r0, r1, r2, r3}
-	ldmia	r7!, {r0, r1, r2, r3}
-	str	lr, [sp, #28]
-	str	ip, [sp, #32]
-	stmia	r5!, {r0, r1, r2, r3}
-	movs	r1, #1
-	ldr	r3, [r7, #0]
-	add	r0, sp, #20
-	ldr	r2, [sp, #8]
-	str	r3, [r5, #0]
-	bl	FlashReadPages
-	ldr	r5, [sp, #20]
-	adds	r0, r5, #1
-	bne	.L1237
-	ldr	r0, .L1242+24
-	ldr	r1, [r4, #-4]
-	bl	printf
-	str	r5, [r4, #-8]
-.L1237:
-	ldr	r3, [r4, #4]
-	cbz	r3, .L1238
-	ldr	r2, [r3, #0]
-	ldr	r3, [r8, #0]
-	ldr	r3, [r3, #0]
-	cmp	r2, r3
-	beq	.L1238
-	ldr	r0, .L1242+28
-	ldr	r1, [r4, #-4]
+	adds	r5, r5, #1
 	bl	printf
-	mov	r3, #-1
-	str	r3, [r4, #-8]
-.L1238:
-	ldr	r3, [r4, #0]
-	cbz	r3, .L1236
-	ldr	r2, [r3, #0]
-	ldr	r3, [r6, #0]
-	ldr	r3, [r3, #0]
-	cmp	r2, r3
-	beq	.L1236
-	ldr	r0, .L1242+32
-	ldr	r1, [r4, #-4]
+	cmp	r5, #15
+	bls	.L1174
+	movs	r5, #0
+	ldr	r1, .L1177+4
+	ldr	r0, .L1177+8
 	bl	printf
-	mov	r3, #-1
-	str	r3, [r4, #-8]
-.L1236:
-	add	sl, sl, #1
-	adds	r4, r4, #36
-.L1234:
-	cmp	sl, fp
-	bne	.L1239
-.L1233:
-	movs	r0, #0
-	add	sp, sp, #64
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1243:
+.L1174:
+	adds	r4, r4, #1
+	b	.L1169
+.L1171:
+	cmp	r8, #2
+	ite	eq
+	ldrsheq	r1, [r6, r4, lsl #1]
+	ldrbne	r1, [r6, r4]	@ zero_extendqisi2
+	b	.L1176
+.L1178:
 	.align	2
-.L1242:
-	.word	.LANCHOR18
-	.word	.LANCHOR2
-	.word	.LANCHOR16
-	.word	.LANCHOR19
-	.word	.LANCHOR204
-	.word	.LC21
-	.word	.LC22
-	.word	.LC23
-	.word	.LC24
-	.word	.LANCHOR205
-	.size	FlashProgSlc2KPages, .-FlashProgSlc2KPages
-	.section	.text.FlashProgPages,"ax",%progbits
+.L1177:
+	.word	.LC14
+	.word	.LC15
+	.word	.LC6
+	.word	.LC13
+	.size	rknand_print_hex, .-rknand_print_hex
+	.section	.text.HynixGetReadRetryDefault,"ax",%progbits
 	.align	1
-	.global	FlashProgPages
+	.global	HynixGetReadRetryDefault
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FlashProgPages, %function
-FlashProgPages:
-	@ args = 0, pretend = 0, frame = 64
+	.fpu softvfp
+	.type	HynixGetReadRetryDefault, %function
+HynixGetReadRetryDefault:
+	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	sub	sp, sp, #72
-	ldr	r4, .L1271
-	mov	r8, r0
-	str	r1, [sp, #8]
-	mov	fp, r2
-	str	r3, [sp, #16]
-	ldr	r4, [r4, #0]
-	ldrb	r4, [r4, #19]	@ zero_extendqisi2
-	str	r4, [sp, #20]
-	ldr	r4, .L1271+4
-	ldrb	r4, [r4, #9]	@ zero_extendqisi2
-	str	r4, [sp, #12]
-	ldr	r4, .L1271+8
-	ldrb	r5, [r4, #0]	@ zero_extendqisi2
-	cmp	r5, #0
-	beq	.L1268
-	bl	FlashProgSlc2KPages
-	b	.L1246
-.L1258:
-	ldr	r1, [sp, #8]
-	movs	r4, #36
-	muls	r4, r5, r4
-	add	r6, r8, r4
-	subs	r3, r1, r5
-	mov	r0, r6
-	mov	r1, fp
-	add	r2, sp, #64
-	uxtb	r3, r3
-	str	r3, [sp, #0]
-	add	r3, sp, #68
-	bl	LogAddr2PhyAddr
-	ldr	r3, .L1271+12
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	mov	r7, r0
-	ldr	r0, [sp, #68]
-	cmp	r0, r3
-	bcc	.L1247
-	mov	r3, #-1
-	str	r3, [r8, r4]
-	b	.L1248
-.L1247:
-	ldr	r3, .L1271+16
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cmp	r3, #0
-	it	eq
-	moveq	r7, #0
-	add	r3, sl, r0, lsl #4
-	ldr	r3, [r3, #8]
-	cbz	r3, .L1250
-	uxtb	r0, r0
-	bl	FlashWaitCmdDone
-.L1250:
-	ldr	r2, [sp, #68]
-	ldr	r1, .L1271+20
-	add	r3, r1, r2, lsl #4
-	movs	r1, #0
-	str	r1, [r3, #12]
-	ldr	r1, [sp, #64]
-	str	r6, [r3, #8]
-	str	r1, [r3, #4]
-	cbz	r7, .L1251
-	adds	r1, r5, #1
-	movs	r0, #36
-	mla	r1, r0, r1, r8
-	str	r1, [r3, #12]
-.L1251:
-	ldr	r3, .L1271+24
-	ldrb	r4, [r3, r2]	@ zero_extendqisi2
-	lsls	r2, r2, #4
-	ldr	r3, .L1271+12
-	mov	r0, r4
-	strb	r4, [sl, r2]
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r3, #172
+	ldr	r5, .L1278
+	cmp	r0, #2
+	mov	r1, #173
+	mov	r2, #174
+	sub	sp, sp, #56
+	mov	r4, r0
+	strb	r3, [r5, #4]
+	mov	r3, #175
+	strb	r0, [r5]
+	strb	r1, [r5, #5]
+	strb	r2, [r5, #6]
+	strb	r3, [r5, #7]
+	bne	.L1180
+	movs	r3, #167
+	movs	r2, #247
+	strb	r3, [r5, #4]
+	ldr	r3, .L1278+4
+	strb	r2, [r3, #17]
+.L1236:
+	mov	r10, #7
+	b	.L1272
+.L1180:
+	cmp	r0, #3
+	bne	.L1182
+	movs	r3, #176
+	strb	r3, [r5, #4]
+	movs	r3, #177
+	strb	r3, [r5, #5]
+	movs	r3, #178
+	strb	r3, [r5, #6]
+	movs	r3, #179
+	strb	r3, [r5, #7]
+	movs	r3, #180
+	strb	r3, [r5, #8]
+	movs	r3, #181
+	strb	r3, [r5, #9]
+	movs	r3, #182
+	strb	r3, [r5, #10]
+	movs	r3, #183
+.L1273:
+	mov	r10, #8
+	strb	r3, [r5, #11]
+	mov	fp, r10
+.L1181:
+	subs	r3, r4, #1
 	cmp	r3, #1
-	bne	.L1252
-	bl	NandcWaitFlashReady
-	b	.L1253
-.L1252:
-	bl	NandcFlashCs
-	ldr	r2, [sp, #68]
-	ldr	r3, .L1271+28
-	mov	r0, r4
-	ldr	r1, [sp, #64]
-	ldr	r2, [r3, r2, lsl #2]
-	adds	r2, r2, #0
-	it	ne
-	movne	r2, #1
-	bl	FlashWaitReadyEN
-	mov	r0, r4
-	bl	NandcFlashDeCs
-.L1253:
-	ldr	r2, [sp, #20]
-	subs	r3, r2, #1
-	cmp	r3, #6
-	bhi	.L1254
-	ldr	r3, .L1271+32
-	ldrb	r3, [r3, r4]	@ zero_extendqisi2
-	cbz	r3, .L1254
-	ldr	r3, .L1271+36
-	mov	r0, r4
-	adds	r2, r3, #4
-	ldrb	r1, [r3, #1]	@ zero_extendqisi2
+	bhi	.L1186
+	mov	r8, #0
+.L1187:
+	ldr	r3, .L1278+8
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	uxtb	r3, r8
+	cmp	r2, r3
+	bhi	.L1193
+.L1194:
+	ldr	r3, .L1278
+	strb	fp, [r3, #1]
+	strb	r10, [r3, #2]
+	add	sp, sp, #56
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1182:
+	cmp	r0, #4
+	bne	.L1183
+	movs	r0, #204
+	strb	r1, [r5, #9]
+	strb	r0, [r5, #4]
+	movs	r0, #191
+	strb	r0, [r5, #5]
+	movs	r0, #170
+	strb	r0, [r5, #6]
+	movs	r0, #171
+	strb	r0, [r5, #7]
+	movs	r0, #205
+	strb	r0, [r5, #8]
+	strb	r2, [r5, #10]
+	b	.L1273
+.L1183:
+	cmp	r0, #5
+	bne	.L1184
+	movs	r3, #56
+	mov	r10, #8
+	strb	r3, [r5, #4]
+	movs	r3, #57
+	strb	r3, [r5, #5]
+	movs	r3, #58
+	strb	r3, [r5, #6]
+	movs	r3, #59
+	strb	r3, [r5, #7]
+.L1272:
+	mov	fp, #4
+	b	.L1181
+.L1184:
+	cmp	r0, #6
+	bne	.L1185
+	movs	r3, #14
+	mov	r10, #12
+	strb	r3, [r5, #4]
+	movs	r3, #15
+	strb	r3, [r5, #5]
+	movs	r3, #16
+	strb	r3, [r5, #6]
+	movs	r3, #17
+	strb	r3, [r5, #7]
+	b	.L1272
+.L1185:
+	cmp	r0, #7
+	bne	.L1236
+	movs	r3, #176
+	mov	r10, #12
+	strb	r3, [r5, #4]
+	movs	r3, #177
+	strb	r3, [r5, #5]
+	movs	r3, #178
+	strb	r3, [r5, #6]
+	movs	r3, #179
+	strb	r3, [r5, #7]
+	movs	r3, #180
+	strb	r3, [r5, #8]
+	movs	r3, #181
+	strb	r3, [r5, #9]
+	movs	r3, #182
+	strb	r3, [r5, #10]
+	movs	r3, #183
+	strb	r3, [r5, #11]
+	movs	r3, #212
+	strb	r3, [r5, #12]
+	movs	r3, #213
+	strb	r3, [r5, #13]
+	mov	fp, #10
+	b	.L1181
+.L1193:
+	ldr	r2, .L1278+12
+	movs	r6, #0
+	ldrb	r2, [r2, r3]	@ zero_extendqisi2
+	ldr	r3, .L1278+16
+	ldr	r7, [r3, r2, lsl #3]
+	add	r4, r5, r2, lsl #6
+	add	r3, r3, r2, lsl #3
+	movs	r2, #55
+	adds	r4, r4, #20
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+	add	r7, r7, r3, lsl #8
+	addw	r3, r7, #2056
+.L1188:
+	adds	r1, r5, r6
+	str	r2, [r3]
+	ldrb	r1, [r1, #4]	@ zero_extendqisi2
+	movs	r0, #80
+	str	r2, [sp, #8]
+	str	r3, [sp, #4]
+	str	r1, [r7, #2052]
+	bl	udelay
+	ldr	r1, [r7, #2048]
+	ldr	r3, [sp, #4]
+	ldr	r2, [sp, #8]
+	strb	r1, [r4, r6]
+	adds	r6, r6, #1
+	uxtb	r1, r6
+	cmp	fp, r1
+	bhi	.L1188
+	ldr	r7, .L1278+4
+	mov	r1, r4
+	movs	r2, #0
+.L1191:
+	movs	r3, #1
+	adds	r6, r7, r2
+.L1190:
+	ldrb	r0, [r6, r3, lsl #2]	@ zero_extendqisi2
+	ldrb	ip, [r1]	@ zero_extendqisi2
+	add	r0, r0, ip
+	strb	r0, [r1, r3, lsl #3]
+	adds	r3, r3, #1
+	cmp	r3, #7
+	bne	.L1190
+	adds	r2, r2, #1
+	adds	r1, r1, #1
+	cmp	r2, #4
+	bne	.L1191
 	movs	r3, #0
-	bl	HynixSetRRPara
-.L1254:
-	mov	r0, r4
-	bl	NandcFlashCs
-	cmp	fp, #1
-	mov	r0, r4
-	bne	.L1255
-	ldr	r3, .L1271+40
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1255
-	bl	flash_enter_slc_mode
-	b	.L1256
-.L1255:
-	bl	flash_exit_slc_mode
-.L1256:
-	mov	r0, r4
-	ldr	r1, [sp, #64]
-	bl	FlashProgFirstCmd
-	ldr	r3, [r6, #12]
-	mov	r0, r4
-	movs	r1, #1
-	ldr	r2, [sp, #12]
-	str	r3, [sp, #0]
-	ldr	r3, [r6, #8]
-	bl	NandcXferData
-	cbz	r7, .L1257
-	mov	r0, r4
-	ldr	r1, [sp, #64]
-	bl	FlashProgDpFirstCmd
-	ldr	r3, .L1271+28
-	ldr	r2, [sp, #68]
-	mov	r0, r4
-	ldr	r1, [sp, #64]
-	ldr	r2, [r3, r2, lsl #2]
-	adds	r2, r2, #0
-	it	ne
-	movne	r2, #1
-	bl	FlashWaitReadyEN
-	ldr	r3, .L1271+44
-	mov	r0, r4
-	ldr	r1, [r3, #0]
-	ldr	r3, [sp, #64]
-	adds	r1, r1, r3
-	bl	FlashProgDpSecondCmd
-	movs	r2, #36
-	adds	r3, r5, #1
-	mov	r0, r4
-	movs	r1, #1
-	mla	r3, r2, r3, r8
-	ldr	r2, [r3, #12]
-	str	r2, [sp, #0]
-	ldr	r2, [sp, #12]
-	ldr	r3, [r3, #8]
-	bl	NandcXferData
-.L1257:
-	mov	r0, r4
-	ldr	r1, [sp, #64]
-	bl	FlashProgSecondCmd
-	mov	r0, r4
-	bl	NandcFlashDeCs
-	adds	r5, r5, r7
-.L1248:
-	adds	r5, r5, #1
-	b	.L1245
-.L1268:
-	ldr	sl, .L1271+20
-.L1245:
-	ldr	r1, [sp, #8]
-	cmp	r5, r1
-	bcc	.L1258
-	movs	r4, #0
-	ldr	r7, .L1271+12
-	ldr	r6, .L1271+40
-	ldr	r5, .L1271+20
-	b	.L1259
-.L1261:
-	uxtb	r0, r4
-	bl	FlashWaitCmdDone
-	cmp	fp, #1
-	bne	.L1260
-	ldrb	r3, [r6, #0]	@ zero_extendqisi2
-	cbz	r3, .L1260
-	lsls	r3, r4, #4
-	ldrb	r0, [r5, r3]	@ zero_extendqisi2
-	bl	flash_exit_slc_mode
-.L1260:
-	adds	r4, r4, #1
-.L1259:
-	ldrb	r3, [r7, #0]	@ zero_extendqisi2
-	cmp	r4, r3
-	bcc	.L1261
+	add	r8, r8, #1
+	strb	r3, [r4, #16]
+	strb	r3, [r4, #24]
+	strb	r3, [r4, #32]
+	strb	r3, [r4, #40]
+	strb	r3, [r4, #48]
+	strb	r3, [r4, #41]
+	strb	r3, [r4, #49]
+	b	.L1187
+.L1186:
+	subs	r3, r4, #3
+	cmp	r3, #4
+	bhi	.L1194
+	smulbb	r3, r10, fp
+	asrs	r2, r3, #2
+	lsls	r3, r3, #4
+	str	r3, [sp, #52]
+	lsls	r3, r2, #3
+	str	r2, [sp, #12]
+	str	r3, [sp, #48]
+	lsls	r3, r2, #2
+	str	r3, [sp, #32]
+	movs	r3, #0
+.L1277:
+	str	r3, [sp, #28]
+	ldrb	r3, [sp, #28]	@ zero_extendqisi2
+	str	r3, [sp, #16]
+	ldr	r3, .L1278+8
 	ldr	r2, [sp, #16]
-	cmp	r2, #0
-	beq	.L1270
-	movs	r5, #0
-	add	r4, r8, #8
-	ldr	r6, .L1271+48
-	mov	sl, r5
-	ldr	r8, .L1271+68
-	b	.L1262
-.L1267:
-	ldr	r3, [r4, #-8]
-	sub	r7, r4, #8
-	adds	r3, r3, #1
-	bne	.L1263
-	ldr	r1, [r4, #-4]
-	ldr	r0, .L1271+52
-	bl	printf
-	b	.L1264
-.L1263:
-	ldr	r1, [sp, #8]
-	mov	r0, r7
-	add	r2, sp, #64
-	add	r5, sp, #28
-	rsb	r3, sl, r1
-	mov	r1, fp
-	uxtb	r3, r3
-	str	r3, [sp, #0]
-	add	r3, sp, #68
-	bl	LogAddr2PhyAddr
-	ldr	lr, [r6, #0]
-	ldr	ip, [r8, #0]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r2
+	bls	.L1194
+	ldr	r2, [sp, #16]
+	ldr	r3, .L1278+12
+	ldrb	r8, [r3, r2]	@ zero_extendqisi2
+	ldr	r3, .L1278+16
+	mov	r0, r8
+	ldr	r2, [r3, r8, lsl #3]
+	add	r3, r3, r8, lsl #3
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+	str	r2, [sp, #4]
+	str	r3, [sp, #8]
+	mov	r3, r2
+	ldr	r2, [sp, #8]
+	add	r3, r3, r2, lsl #8
+	movs	r2, #255
+	str	r2, [r3, #2056]
+	bl	NandcWaitFlashReady
+	ldr	r1, .L1278
+	cmp	r4, #7
+	it	eq
+	moveq	r3, #160
+	ldr	r2, [sp, #8]
+	itete	eq
+	mlaeq	r1, r3, r8, r1
+	addne	r1, r1, r8, lsl #6
+	addeq	r3, r1, #28
+	addne	r3, r1, #20
+	str	r3, [sp, #36]
+	cmp	r4, #4
+	ldr	r3, [sp, #4]
+	add	r3, r3, r2, lsl #8
+	mov	r2, #54
+	str	r2, [r3, #2056]
+	bne	.L1198
+	movs	r2, #255
+	str	r2, [r3, #2052]
+	movs	r2, #64
+	str	r2, [r3, #2048]
+	movs	r2, #204
+.L1275:
+	str	r2, [r3, #2052]
+	movs	r2, #77
+	b	.L1276
+.L1198:
+	subs	r2, r4, #5
+	cmp	r2, #1
+	bhi	.L1200
+	ldr	r2, .L1278
+	ldrb	r2, [r2, #4]	@ zero_extendqisi2
+	str	r2, [r3, #2052]
+	movs	r2, #82
+.L1276:
+	str	r2, [r3, #2048]
+	cmp	r4, #6
+	ldr	r3, [sp, #4]
+	mov	r0, r8
+	ldr	r2, [sp, #8]
+	add	r5, r3, r2, lsl #8
+	mov	r3, #22
+	ldr	r2, [sp, #8]
+	str	r3, [r5, #2056]
+	mov	r3, #23
+	str	r3, [r5, #2056]
+	mov	r3, #4
+	str	r3, [r5, #2056]
+	mov	r3, #25
+	str	r3, [r5, #2056]
+	mov	r3, #0
+	str	r3, [r5, #2056]
+	str	r3, [r5, #2052]
+	str	r3, [r5, #2052]
+	it	eq
+	moveq	r3, #31
+	str	r3, [r5, #2052]
+	movs	r3, #2
+	str	r3, [r5, #2052]
 	movs	r3, #0
-	str	r3, [lr, #0]
-	str	r3, [ip, #0]
-	ldmia	r7!, {r0, r1, r2, r3}
-	stmia	r5!, {r0, r1, r2, r3}
-	ldmia	r7!, {r0, r1, r2, r3}
-	stmia	r5!, {r0, r1, r2, r3}
-	movs	r1, #1
-	ldr	r3, [r7, #0]
-	mov	r2, fp
-	add	r0, sp, #28
-	str	lr, [sp, #36]
-	str	ip, [sp, #40]
-	str	r3, [r5, #0]
-	bl	FlashReadPages
-	ldr	r5, [sp, #28]
-	adds	r2, r5, #1
-	bne	.L1265
-	ldr	r0, .L1271+56
-	ldr	r1, [r4, #-4]
-	bl	printf
-	str	r5, [r4, #-8]
-.L1265:
-	ldr	r3, [r4, #4]
-	cbz	r3, .L1266
-	ldr	r2, [r3, #0]
-	ldr	r3, [r8, #0]
-	ldr	r3, [r3, #0]
-	cmp	r2, r3
-	beq	.L1266
-	ldr	r0, .L1271+60
-	ldr	r1, [r4, #-4]
-	bl	printf
-	mov	r3, #-1
-	str	r3, [r4, #-8]
-.L1266:
-	ldr	r3, [r4, #0]
-	cbz	r3, .L1264
-	ldr	r2, [r3, #0]
-	ldr	r3, [r6, #0]
-	ldr	r3, [r3, #0]
-	cmp	r2, r3
-	beq	.L1264
-	ldr	r0, .L1271+64
-	ldr	r1, [r4, #-4]
+	str	r3, [r5, #2052]
+	ldr	r3, [sp, #4]
+	add	r3, r3, r2, lsl #8
+	movs	r2, #48
+	str	r2, [r3, #2056]
+	bl	NandcWaitFlashReady
+	subs	r3, r4, #5
+	cmp	r3, #1
+	str	r3, [sp, #40]
+	bls	.L1237
+	cmp	r4, #7
+	ite	eq
+	moveq	r2, #32
+	movne	r2, #2
+.L1203:
+	ldr	r3, .L1278+20
+	subs	r2, r2, #1
+	ldr	r3, [r3]
+	subs	r1, r3, #1
+	uxtab	r2, r3, r2
+	mov	r0, r1
+.L1204:
+	ldr	r6, [r5, #2048]
+	strb	r6, [r0, #1]!
+	cmp	r2, r0
+	bne	.L1204
+	cmp	r4, #7
+	bne	.L1205
+	movs	r2, #0
+.L1207:
+	ldrb	r0, [r3, r2, lsl #2]	@ zero_extendqisi2
+	uxtb	r1, r2
+	cmp	r0, #12
+	beq	.L1206
+	add	r0, r3, r2, lsl #2
+	ldrb	r0, [r0, #1]	@ zero_extendqisi2
+	cmp	r0, #10
+	beq	.L1206
+	adds	r2, r2, #1
+	cmp	r2, #8
+	bne	.L1207
+.L1208:
+	movs	r1, #0
+	ldr	r0, .L1278+24
 	bl	printf
-	mov	r3, #-1
-	str	r3, [r4, #-8]
-.L1264:
-	add	sl, sl, #1
-	adds	r4, r4, #36
-.L1262:
-	ldr	r2, [sp, #8]
-	cmp	sl, r2
-	bne	.L1267
-	movs	r0, #0
-	b	.L1246
-.L1272:
+.L1210:
+	b	.L1210
+.L1200:
+	movs	r2, #174
+	str	r2, [r3, #2052]
+	movs	r2, #0
+	str	r2, [r3, #2048]
+	movs	r2, #176
+	b	.L1275
+.L1237:
+	movs	r2, #16
+	b	.L1203
+.L1279:
 	.align	2
-.L1271:
-	.word	.LANCHOR23
-	.word	.LANCHOR18
-	.word	.LANCHOR0
-	.word	.LANCHOR16
-	.word	.LANCHOR33
-	.word	.LANCHOR21
-	.word	.LANCHOR19
+.L1278:
 	.word	.LANCHOR20
-	.word	.LANCHOR32
-	.word	.LANCHOR31
-	.word	.LANCHOR7
-	.word	.LANCHOR2
-	.word	.LANCHOR204
-	.word	.LC21
-	.word	.LC22
-	.word	.LC23
-	.word	.LC24
-	.word	.LANCHOR205
-.L1270:
-	ldr	r0, [sp, #16]
-.L1246:
-	add	sp, sp, #72
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-	.size	FlashProgPages, .-FlashProgPages
-	.section	.text.FtlVpcTblFlush,"ax",%progbits
-	.align	1
-	.global	FtlVpcTblFlush
-	.thumb
-	.thumb_func
-	.type	FtlVpcTblFlush, %function
-FtlVpcTblFlush:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1285
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	ldr	r3, [r3, #0]
-	cmp	r3, #0
-	bne	.L1274
-	ldr	r2, .L1285+4
-	ldr	r6, .L1285+8
-	ldr	r4, .L1285+12
-	ldr	r0, [r2, #0]
-	ldr	r2, .L1285+16
-	ldr	r7, .L1285+20
-	str	r0, [r6, #8]
-	ldr	r5, [r2, #0]
-	ldr	r2, .L1285+24
-	str	r5, [r6, #12]
-	ldrh	r1, [r2, #0]
-	str	r3, [r5, #12]
-	strh	r1, [r5, #2]	@ movhi
-	movw	r1, #61604
-	strh	r1, [r5, #0]	@ movhi
-	ldr	r1, [r2, #8]
-	str	r3, [r5, #8]
-	ldr	r3, .L1285+28
-	str	r1, [r5, #4]
-	stmia	r4, {r3, r7}
-	ldrh	r3, [r2, #6]
-	strh	r3, [r4, #8]	@ movhi
-	ldr	r3, .L1285+32
-	ldrh	r3, [r3, #0]
-	strb	r3, [r4, #10]
-	ldr	r3, .L1285+36
-	ldrh	r2, [r3, #0]
-	ldrh	r1, [r3, #2]
-	strh	r2, [r4, #14]	@ movhi
-	ldrb	r2, [r3, #6]	@ zero_extendqisi2
-	ldrb	r3, [r3, #8]	@ zero_extendqisi2
-	orr	r2, r2, r1, lsl #6
-	strh	r2, [r4, #16]	@ movhi
-	strb	r3, [r4, #11]
-	ldr	r3, .L1285+40
-	ldrh	r2, [r3, #0]
-	ldrh	r1, [r3, #2]
-	strh	r2, [r4, #18]	@ movhi
-	ldrb	r2, [r3, #6]	@ zero_extendqisi2
-	ldrb	r3, [r3, #8]	@ zero_extendqisi2
-	orr	r2, r2, r1, lsl #6
-	strh	r2, [r4, #20]	@ movhi
-	strb	r3, [r4, #12]
-	ldr	r3, .L1285+44
-	ldrh	r2, [r3, #0]
-	ldrh	r1, [r3, #2]
-	strh	r2, [r4, #22]	@ movhi
-	ldrb	r2, [r3, #6]	@ zero_extendqisi2
-	orr	r2, r2, r1, lsl #6
-	strh	r2, [r4, #24]	@ movhi
-	ldrb	r3, [r3, #8]	@ zero_extendqisi2
-	movs	r1, #255
-	strb	r3, [r4, #13]
-	ldr	r3, .L1285+48
-	ldr	r3, [r3, #0]
-	str	r3, [r4, #32]
-	ldr	r3, .L1285+52
-	ldr	r3, [r3, #0]
-	str	r3, [r4, #40]
-	ldr	r3, .L1285+56
-	ldr	r3, [r3, #0]
-	str	r3, [r4, #36]
-	ldr	r3, .L1285+60
-	ldrh	r2, [r3, #0]
-	bl	memset
-	mov	r1, r4
-	ldr	r4, .L1285+64
-	movs	r2, #48
-	ldr	r0, [r6, #8]
-	bl	memcpy
-	ldr	r3, .L1285+68
-	ldrh	r2, [r4, #0]
-	ldr	r0, [r6, #8]
-	ldr	r1, [r3, #0]
-	lsls	r2, r2, #1
-	adds	r0, r0, #48
-	bl	memcpy
-	ldrh	r2, [r4, #0]
-	ldr	r3, [r6, #8]
-	add	r0, r2, #24
-	lsrs	r2, r2, #3
-	lsrs	r0, r0, #1
-	adds	r2, r2, #4
-	add	r0, r3, r0, lsl #2
-	ldr	r3, .L1285+72
-	ldr	r1, [r3, #0]
-	bl	memcpy
-	ldr	r3, .L1285+76
-	ldrh	r3, [r3, #0]
-	cbz	r3, .L1275
-	ldrh	r3, [r4, #0]
-	ldr	r1, [r6, #8]
-	lsrs	r0, r3, #3
-	add	r0, r0, r3, lsl #1
-	ldr	r3, .L1285+80
-	adds	r0, r0, #52
-	ubfx	r0, r0, #2, #14
-	ldrh	r2, [r3, #0]
-	ldr	r3, .L1285+84
-	add	r0, r1, r0, lsl #2
-	lsls	r2, r2, #2
-	ldr	r1, [r3, #0]
-	bl	memcpy
-.L1275:
+	.word	.LANCHOR193
+	.word	.LANCHOR25
+	.word	.LANCHOR26
+	.word	.LANCHOR6
+	.word	.LANCHOR143
+	.word	.LC16
+.L1206:
+	cmp	r1, #6
+	bhi	.L1208
+.L1209:
+	ldr	r3, .L1280
+	ldr	lr, [r3]
+	mov	r3, lr
+.L1214:
+	ldr	r1, [sp, #52]
+	sub	r2, r3, lr
+	cmp	r1, r2
+	bgt	.L1215
+	ldr	r3, .L1280
+	ldr	r1, [r3]
+	ldr	r3, [sp, #32]
+	adds	r0, r1, r3
+	movs	r3, #8
+.L1217:
+	mov	r7, r0
+	movs	r6, #0
+.L1216:
+	ldr	r2, [r7]
+	adds	r6, r6, #1
+	mvns	r2, r2
+	str	r2, [r7], #4
+	ldr	r2, [sp, #12]
+	cmp	r2, r6
+	bgt	.L1216
+	ldr	r2, [sp, #48]
+	subs	r3, r3, #1
+	add	r0, r0, r2
+	bne	.L1217
+	str	r1, [sp, #20]
+	str	r3, [sp, #24]
+.L1223:
 	movs	r0, #0
-	ldr	r6, .L1285+8
-	bl	FtlUpdateVaildLpn
-	ldr	sl, .L1285+4
-	ldr	fp, .L1285+16
-	movs	r7, #0
-	ldr	r4, .L1285+24
-	movw	r8, #65535
-.L1284:
-	ldr	r3, [sl, #0]
-	movs	r1, #1
-	ldrh	r2, [r4, #0]
-	ldr	r0, .L1285+8
-	str	r3, [r6, #8]
-	ldr	r3, [fp, #0]
-	str	r3, [r6, #12]
-	ldrh	r3, [r4, #2]
-	orr	r3, r3, r2, lsl #10
-	mov	r2, r1
-	str	r3, [r6, #4]
-	mov	r3, r1
-	bl	FlashProgPages
-	ldr	r3, .L1285+88
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r3, #0]
+	mov	r2, r0
+.L1222:
+	movs	r3, #1
+	mov	ip, #0
+	lsl	r7, r3, r2
+	movs	r3, #16
+	str	r3, [sp, #44]
+	mov	r6, r7
+	ldr	r7, [sp, #20]
+.L1220:
+	ldr	r3, [r7]
+	bics	r3, r6, r3
+	ldr	r3, [sp, #32]
+	it	eq
+	addeq	ip, ip, #1
+	add	r7, r7, r3
+	ldr	r3, [sp, #44]
 	subs	r3, r3, #1
-	cmp	r2, r3
-	blt	.L1277
-	ldrh	r3, [r4, #0]
-	ldrh	r8, [r4, #4]
-	strh	r3, [r4, #4]	@ movhi
+	str	r3, [sp, #44]
+	bne	.L1220
+	cmp	ip, #8
+	add	r2, r2, #1
+	itt	hi
+	movhi	r3, r6
+	orrhi	r0, r0, r3
+	cmp	r2, #32
+	bne	.L1222
+	ldr	r3, [sp, #20]
+	str	r0, [r3], #4
+	str	r3, [sp, #20]
+	ldr	r3, [sp, #24]
+	adds	r3, r3, #1
+	str	r3, [sp, #24]
+	ldr	r2, [sp, #24]
+	ldr	r3, [sp, #12]
+	cmp	r3, r2
+	bgt	.L1223
+	subs	r2, r1, #4
+	add	r0, r1, #28
 	movs	r3, #0
-	strh	r3, [r4, #2]	@ movhi
-	bl	FtlFreeSysBlkQueueOut
-	ldr	r2, .L1285+52
-	ldr	r3, [r2, #0]
-	adds	r1, r3, #1
-	str	r1, [r2, #0]
-	movs	r1, #1
-	str	r3, [r4, #8]
-	lsls	r2, r0, #10
-	strh	r0, [r4, #0]	@ movhi
-	str	r2, [r6, #4]
-	mov	r2, r1
-	str	r3, [r5, #4]
-	mov	r3, r1
-	strh	r0, [r5, #2]	@ movhi
-	ldr	r0, .L1285+8
-	bl	FlashProgPages
-.L1277:
-	ldrh	r3, [r4, #2]
-	ldr	r2, [r6, #0]
+.L1226:
+	ldr	r6, [r2, #4]!
+	cbnz	r6, .L1225
 	adds	r3, r3, #1
-	adds	r1, r2, #1
-	uxth	r3, r3
-	strh	r3, [r4, #2]	@ movhi
-	bne	.L1278
-	cmp	r3, #1
-	bne	.L1279
-	ldr	r1, .L1285+92
-	movw	r2, #1180
-	ldr	r0, .L1285+96
-	bl	printf
-	ldr	r0, .L1285+100
-	ldr	r1, .L1285+104
+.L1225:
+	cmp	r0, r2
+	bne	.L1226
+	cmp	r3, #7
+	ble	.L1227
+	ldr	r0, .L1280+4
+	mov	r3, #1024
+	movs	r2, #1
+	bl	rknand_print_hex
+	movs	r1, #0
+	ldr	r0, .L1280+8
 	bl	printf
-.L1279:
-	ldr	r2, .L1285+24
-	ldrh	r3, [r2, #2]
-	cmp	r3, #1
-	bne	.L1280
-	ldr	r3, .L1285+88
-	ldrh	r3, [r3, #0]
-	subs	r3, r3, #1
-	strh	r3, [r4, #2]	@ movhi
-.L1280:
-	adds	r7, r7, #1
-	uxth	r7, r7
-	cmp	r7, #3
-	bls	.L1284
-	ldr	r3, .L1285+8
-	mov	r2, r7
-	ldr	r0, .L1285+108
-	ldr	r1, [r3, #4]
+.L1228:
+	b	.L1228
+.L1205:
+	cmp	r4, #6
+	bne	.L1209
+	adds	r3, r3, #7
+.L1211:
+	ldrb	r2, [r1, #1]!	@ zero_extendqisi2
+	cmp	r2, #12
+	beq	.L1209
+	ldrb	r2, [r1, #8]	@ zero_extendqisi2
+	cmp	r2, #4
+	beq	.L1209
+	cmp	r3, r1
+	bne	.L1211
+	movs	r1, #0
+	ldr	r0, .L1280+8
 	bl	printf
-	ldr	r3, .L1285
-	movs	r2, #1
-	str	r2, [r3, #0]
-	b	.L1274
-.L1278:
+.L1213:
+	b	.L1213
+.L1215:
+	ldr	r2, [r5, #2048]
+	strb	r2, [r3], #1
+	b	.L1214
+.L1227:
+	cmp	r4, #6
+	beq	.L1239
+	cmp	r4, #7
+	ite	eq
+	moveq	ip, #10
+	movne	ip, #8
+.L1229:
+	add	r3, fp, #-1
+	ldr	r1, [sp, #36]
+	uxtb	r3, r3
+	movs	r0, #0
+	adds	r3, r3, #1
+.L1230:
+	mov	r7, r1
+	mov	r2, lr
+.L1231:
+	ldrb	r6, [r2], #1	@ zero_extendqisi2
+	strb	r6, [r7], #1
+	sub	r6, r2, lr
+	uxtb	r6, r6
+	cmp	fp, r6
+	bhi	.L1231
+	adds	r0, r0, #1
+	add	lr, lr, r3
+	cmp	r10, r0
+	add	r1, r1, ip
+	bgt	.L1230
+	ldr	r3, [sp, #4]
+	mov	r0, r8
+	ldr	r2, [sp, #8]
+	add	r6, r3, r2, lsl #8
+	movs	r3, #255
+	str	r3, [r6, #2056]
+	bl	NandcWaitFlashReady
+	ldr	r3, [sp, #40]
 	cmp	r3, #1
-	beq	.L1284
-	cmp	r2, #256
-	beq	.L1284
-	movw	r3, #65535
-	cmp	r8, r3
-	beq	.L1274
+	bhi	.L1233
+	movs	r3, #54
+	mov	r1, #-1
+	str	r3, [r6, #2056]
+	ldr	r3, .L1280+12
+	ldr	r0, [sp, #16]
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+	str	r3, [r5, #2052]
+	movs	r3, #0
+	str	r3, [r5, #2048]
+	movs	r3, #22
+	str	r3, [r6, #2056]
+	bl	FlashReadCmd
+.L1234:
 	mov	r0, r8
-	movs	r1, #1
-	bl	FtlFreeSysBlkQueueIn
-.L1274:
-	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1286:
+	bl	NandcWaitFlashReady
+	ldr	r3, [sp, #28]
+	adds	r3, r3, #1
+	b	.L1277
+.L1239:
+	mov	ip, #4
+	b	.L1229
+.L1233:
+	movs	r3, #56
+	str	r3, [r6, #2056]
+	b	.L1234
+.L1281:
 	.align	2
-.L1285:
-	.word	.LANCHOR82
-	.word	.LANCHOR86
-	.word	.LANCHOR198
-	.word	.LANCHOR131
-	.word	.LANCHOR184
-	.word	1342177351
-	.word	.LANCHOR196
-	.word	1179929683
-	.word	.LANCHOR48
-	.word	.LANCHOR97
-	.word	.LANCHOR98
-	.word	.LANCHOR99
-	.word	.LANCHOR164
-	.word	.LANCHOR156
-	.word	.LANCHOR157
-	.word	.LANCHOR61
-	.word	.LANCHOR43
-	.word	.LANCHOR89
-	.word	.LANCHOR107
-	.word	.LANCHOR73
-	.word	.LANCHOR70
-	.word	.LANCHOR114
-	.word	.LANCHOR57
-	.word	.LANCHOR206
-	.word	.LC3
-	.word	.LC4
-	.word	.LC5
-	.word	.LC25
-	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
-	.section	.text.FtlBbmTblFlush,"ax",%progbits
+.L1280:
+	.word	.LANCHOR143
+	.word	.LC17
+	.word	.LC16
+	.word	.LANCHOR20
+	.size	HynixGetReadRetryDefault, .-HynixGetReadRetryDefault
+	.section	.text.FlashGetReadRetryDefault,"ax",%progbits
 	.align	1
-	.global	FtlBbmTblFlush
-	.thumb
-	.thumb_func
-	.type	FtlBbmTblFlush, %function
-FtlBbmTblFlush:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1299
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	ldr	r4, [r3, #0]
-	cmp	r4, #0
-	bne	.L1288
-	ldr	r3, .L1299+4
-	mov	r1, r4
-	ldr	r7, .L1299+8
-	ldr	r5, .L1299+12
-	ldr	r0, [r3, #0]
-	ldr	r3, .L1299+16
-	ldr	r8, .L1299+52
-	str	r0, [r7, #8]
-	ldr	r3, [r3, #0]
-	ldr	sl, .L1299+56
-	str	r3, [r7, #12]
-	ldr	r3, .L1299+20
-	ldrh	r2, [r3, #0]
-	bl	memset
-	b	.L1289
-.L1290:
-	ldrh	r2, [sl, #0]
-	ldr	r3, [r7, #8]
-	ldr	r1, [r5, #4]!
-	mul	r0, r2, r4
-	lsls	r2, r2, #2
-	adds	r4, r4, #1
-	add	r0, r3, r0, lsl #2
-	bl	memcpy
-.L1289:
-	ldrh	r3, [r8, #0]
-	ldr	r6, .L1299+8
-	cmp	r4, r3
-	blt	.L1290
-	ldr	r5, [r6, #12]
-	movs	r2, #16
-	movs	r1, #255
-	movs	r7, #0
-	mov	r0, r5
-	mov	r8, r7
-	bl	memset
-	movw	r3, #61649
-	strh	r3, [r5, #0]	@ movhi
-	ldr	r3, .L1299+24
-	ldr	sl, .L1299+4
-	ldr	fp, .L1299+16
-	ldr	r2, [r3, #8]
-	str	r2, [r5, #4]
-	ldrh	r2, [r3, #0]
-	strh	r2, [r5, #2]	@ movhi
-	ldrh	r2, [r3, #4]
-	ldrh	r3, [r3, #6]
-	strh	r2, [r5, #8]	@ movhi
-	strh	r3, [r5, #10]	@ movhi
-	ldr	r3, .L1299+28
-	ldr	r3, [r3, #0]
-	strh	r3, [r5, #12]	@ movhi
-	b	.L1298
-.L1295:
-	mov	r8, #1
-.L1298:
-	ldr	r3, [sl, #0]
-	movs	r1, #0
-	ldr	r4, .L1299+24
-	ldrh	r0, [r5, #10]
-	str	r3, [r6, #8]
-	str	r1, [r6, #0]
-	ldr	r3, [fp, #0]
-	ldrh	r1, [r4, #0]
-	ldrh	r2, [r4, #2]
-	str	r3, [r6, #12]
-	orr	r3, r2, r1, lsl #10
-	str	r3, [r6, #4]
-	ldrh	r3, [r4, #4]
-	str	r0, [sp, #0]
-	ldr	r0, .L1299+32
-	bl	printf
-	movs	r1, #1
-	mov	r2, r1
-	mov	r3, r1
-	ldr	r0, .L1299+8
-	bl	FlashProgPages
-	ldr	r3, .L1299+36
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r3, #0]
-	subs	r3, r3, #1
-	cmp	r2, r3
-	blt	.L1292
-	ldrh	r2, [r4, #0]
-	movs	r1, #0
-	ldr	r3, [r4, #8]
-	strh	r1, [r4, #2]	@ movhi
-	movs	r1, #1
-	adds	r3, r3, #1
-	str	r3, [r4, #8]
-	str	r3, [r5, #4]
-	strh	r2, [r5, #8]	@ movhi
-	ldrh	r3, [r4, #4]
-	strh	r2, [r4, #4]	@ movhi
-	ldr	r2, .L1299+40
-	strh	r3, [r4, #0]	@ movhi
-	lsls	r3, r3, #10
-	str	r3, [r6, #4]
-	ldr	r0, [r2, #0]
-	mov	r2, r1
-	str	r3, [r0, #4]
-	bl	FlashEraseBlocks
-	movs	r1, #1
-	ldr	r0, .L1299+8
-	mov	r2, r1
-	mov	r3, r1
-	bl	FlashProgPages
-.L1292:
-	ldr	r3, .L1299+24
-	ldrh	r2, [r3, #2]
-	adds	r2, r2, #1
-	strh	r2, [r3, #2]	@ movhi
-	ldr	r3, [r6, #0]
-	adds	r3, r3, #1
-	bne	.L1293
-	adds	r7, r7, #1
-	ldr	r0, .L1299+44
-	ldr	r1, [r6, #4]
-	uxth	r7, r7
-	bl	printf
-	cmp	r7, #3
-	bls	.L1298
-	ldr	r3, .L1299+8
-	mov	r2, r7
-	ldr	r0, .L1299+48
-	ldr	r1, [r3, #4]
-	bl	printf
-	ldr	r3, .L1299
-	movs	r2, #1
-	str	r2, [r3, #0]
-	b	.L1288
-.L1293:
-	cmp	r8, #0
-	beq	.L1295
-.L1288:
-	movs	r0, #0
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1300:
-	.align	2
-.L1299:
-	.word	.LANCHOR82
-	.word	.LANCHOR86
-	.word	.LANCHOR198
-	.word	.LANCHOR78+24
-	.word	.LANCHOR184
-	.word	.LANCHOR61
-	.word	.LANCHOR78
-	.word	.LANCHOR40
-	.word	.LC26
-	.word	.LANCHOR57
-	.word	.LANCHOR83
-	.word	.LC27
-	.word	.LC28
-	.word	.LANCHOR48
-	.word	.LANCHOR79
-	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
-	.section	.text.FtlGcFreeBadSuperBlk,"ax",%progbits
-	.align	1
-	.global	FtlGcFreeBadSuperBlk
+	.global	FlashGetReadRetryDefault
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlGcFreeBadSuperBlk, %function
-FtlGcFreeBadSuperBlk:
-	@ args = 0, pretend = 0, frame = 8
+	.fpu softvfp
+	.type	FlashGetReadRetryDefault, %function
+FlashGetReadRetryDefault:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	sl, r0
-	ldr	r5, .L1311
-	ldrh	r3, [r5, #0]
-	cbnz	r3, .L1310
-	b	.L1303
-.L1309:
-	ldr	r3, .L1311+4
-	mov	r1, sl
-	mov	fp, #0
-	ldrb	r0, [r3, r4]	@ zero_extendqisi2
-	bl	V2P_block
+	@ link register save eliminated.
 	mov	r3, r0
+	cbz	r0, .L1282
+	subs	r2, r0, #1
+	cmp	r2, #6
+	bhi	.L1284
+	b	HynixGetReadRetryDefault
+.L1284:
+	cmp	r0, #49
+	bne	.L1285
+	ldr	r0, .L1305
+	movs	r2, #64
+	ldr	r1, .L1305+4
+	strb	r3, [r0]
+	movs	r3, #4
+	strb	r3, [r0, #1]
+	movs	r3, #15
+	strb	r3, [r0, #2]
+.L1303:
+	adds	r0, r0, #4
+	b	ftl_memcpy
+.L1285:
+	cmp	r0, #33
+	beq	.L1286
+	sub	r2, r0, #65
+	cmp	r2, #1
+	bhi	.L1287
+.L1286:
+	ldr	r0, .L1305
+	strb	r3, [r0]
+	movs	r3, #4
+.L1304:
+	strb	r3, [r0, #1]
+	movs	r3, #7
+	strb	r3, [r0, #2]
+	movs	r2, #45
+	ldr	r1, .L1305+8
+	b	.L1303
+.L1287:
+	cmp	r0, #34
+	beq	.L1288
+	cmp	r0, #67
+	bne	.L1289
+.L1288:
+	ldr	r0, .L1305
+	strb	r3, [r0]
+	movs	r3, #5
 	b	.L1304
-.L1308:
-	ldrh	r2, [r7, fp, lsl #1]
-	cmp	r2, r3
-	bne	.L1305
-	mov	r0, r3
-	str	r3, [sp, #4]
-	bl	FtlBbmMapBadBlock
-	bl	FtlBbmTblFlush
-	ldrh	r1, [r5, #0]
-	mov	r2, fp
-	ldr	r3, [sp, #4]
-	b	.L1306
-.L1307:
-	adds	r0, r2, #1
-	ldrh	lr, [r6, r0, lsl #1]
-	strh	lr, [r6, r2, lsl #1]	@ movhi
-	uxth	r2, r0
+.L1289:
+	cmp	r0, #35
+	beq	.L1290
+	cmp	r0, #68
+	bne	.L1282
+.L1290:
+	ldr	r0, .L1305
+	movs	r2, #95
+	ldr	r1, .L1305+12
+	strb	r3, [r0]
+	movs	r3, #5
+	strb	r3, [r0, #1]
+	movs	r3, #17
+	strb	r3, [r0, #2]
+	b	.L1303
+.L1282:
+	bx	lr
 .L1306:
-	cmp	r2, r1
-	bcc	.L1307
-	subs	r1, r1, #1
-	strh	r1, [r5, #0]	@ movhi
-.L1305:
-	add	fp, fp, #1
-	uxth	fp, fp
-.L1304:
-	ldrh	r2, [r5, #0]
-	cmp	r2, fp
-	bhi	.L1308
-	adds	r4, r4, #1
-	uxth	r4, r4
-	b	.L1302
-.L1310:
-	ldr	r7, .L1311+8
-	movs	r4, #0
-	ldr	r8, .L1311+12
-	mov	r6, r7
-.L1302:
-	ldrh	r3, [r8, #0]
-	cmp	r3, r4
-	bhi	.L1309
-	bl	FtlGcReFreshBadBlk
-.L1303:
-	movs	r0, #0
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1312:
 	.align	2
-.L1311:
-	.word	.LANCHOR139
-	.word	.LANCHOR50
-	.word	.LANCHOR140
-	.word	.LANCHOR41
-	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
-	.section	.text.update_vpc_list,"ax",%progbits
+.L1305:
+	.word	.LANCHOR20
+	.word	.LANCHOR14
+	.word	.LANCHOR9
+	.word	.LANCHOR11
+	.size	FlashGetReadRetryDefault, .-FlashGetReadRetryDefault
+	.section	.text.FlashInit,"ax",%progbits
 	.align	1
-	.global	update_vpc_list
+	.global	FlashInit
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	update_vpc_list, %function
-update_vpc_list:
-	@ args = 0, pretend = 0, frame = 0
+	.fpu softvfp
+	.type	FlashInit, %function
+FlashInit:
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-	ldr	r3, .L1323
-	ldr	r3, [r3, #0]
-	ldrh	r3, [r3, r0, lsl #1]
-	cmp	r3, #0
-	bne	.L1314
-	ldr	r2, .L1323+4
-	ldrh	r1, [r2, #0]
-	cmp	r1, r0
-	bne	.L1315
-	movw	r3, #65535
-	strh	r3, [r2, #0]	@ movhi
-	b	.L1316
-.L1315:
-	ldr	r2, .L1323+8
-	ldrh	r2, [r2, #0]
-	cmp	r2, r0
-	beq	.L1317
-	ldr	r2, .L1323+12
-	ldrh	r2, [r2, #0]
-	cmp	r2, r0
-	beq	.L1317
-	ldr	r2, .L1323+16
-	ldrh	r2, [r2, #0]
-	cmp	r2, r0
-	beq	.L1317
-.L1316:
-	ldr	r5, .L1323+20
-	mov	r1, r4
-	ldr	r0, .L1323+24
-	bl	List_remove_node
-	ldrh	r3, [r5, #0]
-	cbnz	r3, .L1318
-	ldr	r1, .L1323+28
-	movw	r2, #3042
-	ldr	r0, .L1323+32
-	bl	printf
-	ldr	r0, .L1323+36
-	ldr	r1, .L1323+40
-	bl	printf
-.L1318:
-	ldrh	r3, [r5, #0]
-	mov	r0, r4
-	subs	r3, r3, #1
-	strh	r3, [r5, #0]	@ movhi
-	bl	free_data_superblock
+	sub	sp, sp, #32
+	mov	r0, #32768
+	movs	r5, #0
+	bl	ftl_malloc
+	ldr	r3, .L1399
+	ldr	r10, .L1399+132
+	ldr	r8, .L1399+136
+	str	r0, [r3]
+	mov	r0, #32768
+	bl	ftl_malloc
+	ldr	r3, .L1399+4
+	ldr	r6, .L1399+8
+	ldr	r7, .L1399+12
+	str	r0, [r3]
+	mov	r0, #4096
+	bl	ftl_malloc
+	ldr	r3, .L1399+16
+	str	r0, [r3]
+	mov	r0, #32768
+	bl	ftl_malloc
+	ldr	r3, .L1399+20
+	str	r0, [r3]
+	mov	r0, #4096
+	bl	ftl_malloc
+	ldr	r3, .L1399+24
+	ldr	r2, .L1399+28
+	strb	r5, [r8]
+	str	r0, [r3]
+	movs	r3, #50
+	strb	r3, [r10]
 	mov	r0, r4
-	bl	FtlGcFreeBadSuperBlk
-	ldr	r3, .L1323+44
-	ldrh	r2, [r3, #0]
-	ldrh	r3, [r5, #0]
-	adds	r2, r2, r3
-	ldr	r3, .L1323+48
-	ldrh	r3, [r3, #0]
-	cmp	r2, r3
-	ble	.L1322
-	ldr	r1, .L1323+28
-	movw	r2, #3045
-	ldr	r0, .L1323+32
-	bl	printf
-	ldr	r1, .L1323+40
-	ldr	r0, .L1323+36
-	bl	printf
-	b	.L1322
-.L1314:
-	bl	List_update_data_list
-	movs	r3, #0
-	b	.L1317
-.L1322:
-	movs	r3, #1
-.L1317:
-	mov	r0, r3
-	pop	{r3, r4, r5, pc}
-.L1324:
-	.align	2
-.L1323:
-	.word	.LANCHOR89
-	.word	.LANCHOR202
-	.word	.LANCHOR97
-	.word	.LANCHOR98
-	.word	.LANCHOR99
-	.word	.LANCHOR91
-	.word	.LANCHOR88
-	.word	.LANCHOR207
-	.word	.LC3
-	.word	.LC4
-	.word	.LC5
-	.word	.LANCHOR94
-	.word	.LANCHOR43
-	.size	update_vpc_list, .-update_vpc_list
-	.section	.text.decrement_vpc_count,"ax",%progbits
-	.align	1
-	.global	decrement_vpc_count
-	.thumb
-	.thumb_func
-	.type	decrement_vpc_count, %function
-decrement_vpc_count:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	movw	r3, #65535
-	cmp	r0, r3
-	push	{r4, r5, r6, lr}
-	mov	r4, r0
-	beq	.L1326
-	ldr	r6, .L1332
-	ldr	r3, [r6, #0]
-	ldrh	r5, [r3, r0, lsl #1]
-	cbnz	r5, .L1327
-	mov	r1, r4
-	ldr	r0, .L1332+4
-	mov	r2, r5
-	bl	printf
-	ldr	r3, [r6, #0]
-	ldrh	r4, [r3, r4, lsl #1]
-	cmp	r4, #0
-	bne	.L1328
-	ldr	r1, .L1332+8
-	movw	r2, #3060
-	ldr	r0, .L1332+12
-	mov	r5, r4
+	strb	r3, [r2]
+	movs	r2, #128
+	ldr	r3, .L1399+32
+	ldr	r4, .L1399+36
+	strb	r5, [r7]
+	str	r5, [r3]
+	ldr	r3, .L1399+40
+	str	r2, [r3]
+	ldr	r3, .L1399+44
+	str	r5, [r3]
+	movs	r3, #60
+	strb	r3, [r6]
+	bl	NandcInit
+	str	r10, [sp, #20]
+	ldr	r10, .L1399+140
+	str	r8, [sp, #16]
+	mov	r8, r6
+	mov	r6, r4
+.L1312:
+	uxtb	fp, r5
+	mov	r0, fp
+	bl	FlashReset
+	add	r1, r10, r5, lsl #3
+	ldr	r3, [r10, r5, lsl #3]
+	mov	r0, fp
+	ldrb	r1, [r1, #4]	@ zero_extendqisi2
+	str	r3, [sp, #28]
+	str	r1, [sp, #24]
+	bl	NandcFlashCs
+	ldr	r1, [sp, #24]
+	movs	r0, #200
+	ldr	r3, [sp, #28]
+	add	r3, r3, r1, lsl #8
+	movs	r1, #144
+	str	r1, [r3, #2056]
+	movs	r1, #0
+	str	r1, [r3, #2052]
+	str	r3, [sp, #24]
+	bl	udelay
+	ldr	r3, [sp, #24]
+	mov	r0, fp
+	ldr	r1, [r3, #2048]
+	strb	r1, [r4]
+	ldr	r1, [r3, #2048]
+	strb	r1, [r4, #1]
+	ldr	r1, [r3, #2048]
+	strb	r1, [r4, #2]
+	ldr	r1, [r3, #2048]
+	strb	r1, [r4, #3]
+	ldr	r1, [r3, #2048]
+	strb	r1, [r4, #4]
+	ldr	r3, [r3, #2048]
+	strb	r3, [r4, #5]
+	bl	NandcFlashDeCs
+	ldrb	r2, [r4]	@ zero_extendqisi2
+	subs	r3, r2, #1
+	uxtb	r3, r3
+	cmp	r3, #253
+	bhi	.L1308
+	ldrb	r1, [r4, #5]	@ zero_extendqisi2
+	ldrb	r3, [r4, #1]	@ zero_extendqisi2
+	ldr	r0, .L1399+48
+	str	r1, [sp, #12]
+	ldrb	r1, [r4, #4]	@ zero_extendqisi2
+	str	r1, [sp, #8]
+	ldrb	r1, [r4, #3]	@ zero_extendqisi2
+	str	r1, [sp, #4]
+	ldrb	r1, [r4, #2]	@ zero_extendqisi2
+	str	r1, [sp]
+	adds	r1, r5, #1
 	bl	printf
-	ldr	r0, .L1332+16
-	ldr	r1, .L1332+20
+.L1308:
+	cbnz	r5, .L1309
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	subs	r3, r3, #1
+	uxtb	r3, r3
+	cmp	r3, #253
+	bhi	.L1352
+	ldrb	r3, [r6, #1]	@ zero_extendqisi2
+	cmp	r3, #255
+	beq	.L1352
+.L1309:
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	adds	r5, r5, #1
+	adds	r4, r4, #8
+	cmp	r3, #181
+	itt	eq
+	moveq	r3, #44
+	strbeq	r3, [r4, #-8]
+	cmp	r5, #4
+	bne	.L1312
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	cmp	r3, #173
+	beq	.L1313
+	ldr	r3, .L1399+52
+	ldr	r0, [r3]
+	bl	NandcSetDdrMode
+.L1313:
+	mov	r2, #852
+	movs	r1, #0
+	ldr	r0, .L1399+56
+	bl	ftl_memset
+	ldr	r4, .L1399+60
+	ldr	r3, .L1399+64
+	ldr	r5, .L1399+68
+	str	r3, [r4]
+	movs	r3, #0
+	strb	r3, [r5]
+	ldrb	r3, [r6, #1]	@ zero_extendqisi2
+	cmp	r3, #161
+	beq	.L1314
+	cmp	r3, #218
+	beq	.L1314
+	and	r2, r3, #223
+	cmp	r2, #209
+	beq	.L1314
+	cmp	r3, #220
+	bne	.L1315
+	ldrb	r2, [r6, #3]	@ zero_extendqisi2
+	cmp	r2, #149
+	bne	.L1315
+.L1314:
+	ldr	r1, [sp, #16]
+	movs	r2, #1
+	strb	r2, [r1]
+	movs	r2, #16
+	ldr	r1, [sp, #20]
+	strb	r2, [r8]
+	strb	r2, [r1]
+	ldrb	r1, [r6]	@ zero_extendqisi2
+	ldr	r2, .L1399+72
+	cmp	r1, #152
+	strb	r1, [r2, #1]
+	strb	r3, [r2, #2]
+	bne	.L1316
+	ldrsb	r1, [r6, #4]
+	cmp	r1, #0
+	itt	ge
+	movge	r1, #24
+	strbge	r1, [r8]
+.L1316:
+	ldr	r1, .L1399+76
+	ldr	r0, [r1]
+	ldr	r1, .L1399+80
+	cmp	r0, r1
+	itt	eq
+	moveq	r1, #16
+	strbeq	r1, [r8]
+	cmp	r3, #218
+	bne	.L1318
+	mov	r1, #2048
+.L1395:
+	strh	r1, [r2, #14]	@ movhi
+	strb	r3, [r2, #2]
+.L1319:
+	movs	r2, #32
+	ldr	r1, .L1399+84
+	ldr	r0, .L1399+88
+	bl	ftl_memcpy
+	movs	r2, #32
+	ldr	r1, .L1399+72
+	ldr	r0, .L1399+64
+	bl	ftl_memcpy
+.L1315:
+	ldr	r3, [sp, #16]
+	ldr	r8, .L1399+144
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L1321
+	bl	FlashLoadPhyInfoInRam
+	cbnz	r0, .L1323
+	ldr	r3, [r4]
+	ldr	r10, .L1399+100
+	ldrh	r3, [r3, #16]
+	lsrs	r3, r3, #8
+	lsls	r1, r3, #31
+	and	r0, r3, #7
+	strb	r0, [r10]
+	bmi	.L1323
+	movs	r3, #1
+	strb	r3, [r7]
+	bl	FlashSetInterfaceMode
+	ldrb	r0, [r10]	@ zero_extendqisi2
+	bl	NandcSetMode
+.L1323:
+	ldr	r3, [r4]
+	ldrb	r3, [r3, #26]	@ zero_extendqisi2
+	strb	r3, [r8]
+	bl	FlashLoadPhyInfo
+	cmp	r0, #0
+	beq	.L1321
+	ldr	r3, [r4]
+	ldr	r0, .L1399+92
+	ldrh	r1, [r3, #14]
 	bl	printf
-	b	.L1328
-.L1327:
-	subs	r5, r5, #1
-	strh	r5, [r3, r0, lsl #1]	@ movhi
+	bl	FlashLoadPhyInfoInRam
+	adds	r2, r0, #1
+	beq	.L1307
+	bl	FlashDieInfoInit
+	ldr	r3, [r4]
+	ldrb	r0, [r3, #19]	@ zero_extendqisi2
+	bl	FlashGetReadRetryDefault
+	ldr	r3, [r4]
+	ldr	r2, .L1399+96
+	ldrb	r1, [r3, #9]	@ zero_extendqisi2
+	ldrh	r2, [r2]
+	addw	r2, r2, #4095
+	cmp	r1, r2, asr #12
+	blt	.L1326
+	ldrh	r2, [r3, #14]
+	adds	r2, r2, #255
+	cmp	r1, r2, asr #8
+	bge	.L1327
 .L1326:
-	ldr	r6, .L1332+24
-	movw	r3, #65535
-	ldrh	r0, [r6, #0]
-	cmp	r0, r3
-	bne	.L1329
-	strh	r4, [r6, #0]	@ movhi
-	b	.L1331
-.L1329:
-	cmp	r0, r4
-	beq	.L1331
-	bl	update_vpc_list
-	ldr	r3, .L1332+28
-	strh	r4, [r6, #0]	@ movhi
-	ldr	r2, [r3, #0]
-	ldr	r3, .L1332+32
-	ldr	r3, [r3, #0]
-	subs	r3, r2, r3
-	ldr	r2, .L1332+36
-	adds	r5, r0, #0
-	it	ne
-	movne	r5, #1
-	asrs	r3, r3, #1
-	muls	r3, r2, r3
-	ldr	r2, .L1332
-	uxth	r3, r3
-	ldr	r2, [r2, #0]
-	ldrh	r2, [r2, r3, lsl #1]
-	cbnz	r2, .L1328
-	cmp	r4, r3
+	ldrh	r2, [r3, #14]
+	bic	r2, r2, #255
+	strh	r2, [r3, #14]	@ movhi
+.L1327:
+	ldr	r3, .L1399+100
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	tst	r3, #6
 	beq	.L1328
-	ldr	r1, .L1332+8
-	movw	r2, #3082
-	ldr	r0, .L1332+12
-	bl	printf
-	ldr	r1, .L1332+20
-	ldr	r0, .L1332+16
-	bl	printf
-	b	.L1328
-.L1331:
-	movs	r5, #0
+	bl	FlashSavePhyInfo
+	ldr	r3, .L1399+104
+	movs	r0, #0
+	ldr	r1, [r3]
+	bl	FlashDdrParaScan
 .L1328:
-	mov	r0, r5
-	pop	{r4, r5, r6, pc}
-.L1333:
+	bl	FlashSavePhyInfo
+.L1321:
+	ldr	fp, [r4]
+	ldr	r10, .L1399+100
+	ldrb	r3, [fp, #26]	@ zero_extendqisi2
+	ldrh	r0, [fp, #10]
+	strb	r3, [r8]
+	ldrh	r3, [fp, #16]
+	ubfx	r2, r3, #7, #1
+	ubfx	r1, r3, #3, #1
+	strb	r2, [r5]
+	ldr	r2, .L1399+108
+	ldr	r5, .L1399+112
+	strb	r1, [r2]
+	ubfx	r1, r3, #4, #1
+	ldr	r2, .L1399+116
+	ubfx	r3, r3, #8, #3
+	strb	r3, [r10]
+	movs	r3, #0
+	str	r3, [r5]
+	strb	r1, [r2]
+	ldrb	r1, [fp, #12]	@ zero_extendqisi2
+	bl	__aeabi_idiv
+	mov	r1, r0
+	ldrb	r0, [fp, #18]	@ zero_extendqisi2
+	bl	BuildFlashLsbPageTable
+	bl	FlashDieInfoInit
+	ldr	r3, [r4]
+	mov	ip, r5
+	ldrh	r2, [r3, #16]
+	tst	r2, #64
+	beq	.L1330
+	ldrb	r0, [r3, #19]	@ zero_extendqisi2
+	ldr	r3, .L1399+120
+	ldr	r2, .L1399+124
+	strb	r0, [r3]
+	ldr	r3, .L1399+56
+	ldrb	r1, [r3, #1]	@ zero_extendqisi2
+	ldrb	lr, [r3, #2]	@ zero_extendqisi2
+	strb	r1, [r2]
+	ldr	r1, .L1399+128
+	strb	lr, [r1]
+	add	lr, r0, #-1
+	cmp	lr, #6
+	b	.L1400
+.L1401:
 	.align	2
-.L1332:
-	.word	.LANCHOR89
-	.word	.LC29
-	.word	.LANCHOR208
-	.word	.LC3
-	.word	.LC4
-	.word	.LC5
-	.word	.LANCHOR126
-	.word	.LANCHOR88
-	.word	.LANCHOR87
-	.word	-1431655765
-	.size	decrement_vpc_count, .-decrement_vpc_count
-	.section	.text.get_new_active_ppa,"ax",%progbits
-	.align	1
-	.global	get_new_active_ppa
-	.thumb
-	.thumb_func
-	.type	get_new_active_ppa, %function
-get_new_active_ppa:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldrh	r2, [r0, #0]
-	push	{r3, r4, r5, r6, r7, r8, sl, lr}
-	movw	r3, #65535
-	cmp	r2, r3
-	mov	r4, r0
-	bne	.L1335
-	ldr	r1, .L1350
-	movw	r2, #2982
-	ldr	r0, .L1350+4
-	bl	printf
-	ldr	r0, .L1350+8
-	ldr	r1, .L1350+12
-	bl	printf
+.L1399:
+	.word	.LANCHOR143
+	.word	.LANCHOR151
+	.word	.LANCHOR150
+	.word	.LANCHOR28
+	.word	.LANCHOR194
+	.word	.LANCHOR195
+	.word	.LANCHOR196
+	.word	.LANCHOR146
+	.word	.LANCHOR145
+	.word	.LANCHOR22
+	.word	.LANCHOR3
+	.word	.LANCHOR148
+	.word	.LC18
+	.word	.LANCHOR153
+	.word	.LANCHOR20
+	.word	.LANCHOR18
+	.word	.LANCHOR29
+	.word	.LANCHOR5
+	.word	.LANCHOR197
+	.word	.LANCHOR152
+	.word	1446522928
+	.word	.LANCHOR141+32
+	.word	.LANCHOR7
+	.word	.LC19
+	.word	.LANCHOR119
+	.word	.LANCHOR24
+	.word	.LANCHOR144
+	.word	.LANCHOR198
+	.word	.LANCHOR149
+	.word	.LANCHOR27
+	.word	.LANCHOR10
+	.word	.LANCHOR13
+	.word	.LANCHOR147
+	.word	.LANCHOR2
+	.word	.LANCHOR1
+	.word	.LANCHOR6
+	.word	.LANCHOR8
+.L1400:
+	mov	lr, r1
+	bhi	.L1331
+	ldr	r2, .L1402
+	str	r2, [r5]
+	subs	r2, r0, #5
+	cmp	r2, #1
+	bhi	.L1332
+	ldr	r2, .L1402+4
+	adds	r3, r3, #20
+	movs	r1, #1
+	str	r1, [r2]
+.L1333:
+	subs	r1, r3, #1
+	movs	r2, #0
+	adds	r3, r3, #31
 .L1335:
-	ldr	r3, .L1350+16
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r3, #0]
-	cmp	r2, r3
-	bne	.L1336
-	ldr	r1, .L1350
-	movw	r2, #2983
-	ldr	r0, .L1350+4
-	bl	printf
-	ldr	r0, .L1350+8
-	ldr	r1, .L1350+12
-	bl	printf
-.L1336:
-	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1337
-	ldr	r1, .L1350
-	movw	r2, #2984
-	ldr	r0, .L1350+4
-	bl	printf
-	ldr	r0, .L1350+8
-	ldr	r1, .L1350+12
-	bl	printf
-.L1337:
-	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	movs	r7, #0
-	movw	r6, #65535
-	strb	r7, [r4, #10]
-	adds	r3, r3, #8
-	ldr	sl, .L1350+24
-	ldr	r8, .L1350+28
-	ldrh	r3, [r4, r3, lsl #1]
-	ldr	r5, .L1350+20
-	b	.L1338
-.L1339:
-	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	ldrh	r2, [r5, #0]
-	adds	r3, r3, #1
-	uxtb	r3, r3
-	strb	r3, [r4, #6]
+	ldrsb	r5, [r1, #1]!
+	cbnz	r5, .L1334
+	adds	r2, r2, #1
+.L1334:
+	cmp	r3, r1
+	bne	.L1335
+	cmp	r2, #27
+	bls	.L1330
+	bl	FlashGetReadRetryDefault
+	bl	FlashSavePhyInfo
+.L1330:
+	ldr	r3, .L1402+8
+	ldr	r2, [r3]
+	ldr	r3, .L1402+12
 	cmp	r2, r3
-	bne	.L1340
-	ldrh	r3, [r4, #2]
-	strb	r7, [r4, #6]
-	adds	r3, r3, #1
-	strh	r3, [r4, #2]	@ movhi
-.L1340:
-	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	adds	r3, r3, #8
-	ldrh	r3, [r4, r3, lsl #1]
-.L1338:
-	cmp	r3, r6
-	beq	.L1339
-	ldrb	r2, [r4, #8]	@ zero_extendqisi2
-	cmp	r2, #1
-	bne	.L1341
-	ldrb	r2, [sl, #0]	@ zero_extendqisi2
-	cbnz	r2, .L1341
-	ldrh	r2, [r4, #2]
-	ldrh	r2, [r8, r2, lsl #1]
-	cmp	r2, r6
-	bne	.L1341
-	ldrh	r3, [r4, #4]
-	ldrh	r0, [r4, #0]
-	subs	r3, r3, #1
-	strh	r3, [r4, #4]	@ movhi
-	bl	decrement_vpc_count
-	b	.L1339
-.L1341:
-	ldrh	r5, [r4, #2]
-	movw	r6, #65535
-	ldr	sl, .L1350+20
-	mov	r8, r6
-	ldr	r7, .L1350+24
-	orr	r5, r5, r3, lsl #10
-	ldrh	r3, [r4, #4]
-	subs	r3, r3, #1
-	strh	r3, [r4, #4]	@ movhi
+	bne	.L1346
+	ldrb	r3, [r8]	@ zero_extendqisi2
+	cbz	r3, .L1346
+	ldr	r3, [r4]
+	movs	r2, #0
+	strb	r2, [r3, #18]
 .L1346:
-	ldrh	r2, [sl, #0]
-	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-.L1343:
-	adds	r3, r3, #1
-	uxtb	r3, r3
-	cmp	r3, r2
-	bne	.L1342
-	ldrh	r3, [r4, #2]
-	adds	r3, r3, #1
-	strh	r3, [r4, #2]	@ movhi
-	movs	r3, #0
-.L1342:
-	add	r1, r3, #8
-	ldrh	r1, [r4, r1, lsl #1]
-	cmp	r1, r6
-	beq	.L1343
-	strb	r3, [r4, #6]
-	ldrb	r3, [r4, #8]	@ zero_extendqisi2
-	cmp	r3, #1
-	bne	.L1344
-	ldrb	r2, [r7, #0]	@ zero_extendqisi2
-	ldrh	r3, [r4, #2]
-	cbnz	r2, .L1348
-	ldr	r2, .L1350+28
-	ldrh	r3, [r2, r3, lsl #1]
-	cmp	r3, r8
-	bne	.L1344
-	ldrh	r3, [r4, #4]
-	cbz	r3, .L1344
-	subs	r3, r3, #1
-	ldrh	r0, [r4, #0]
-	strh	r3, [r4, #4]	@ movhi
-	bl	decrement_vpc_count
-	b	.L1346
-.L1348:
-	ldr	r2, .L1350+32
-	ldrh	r2, [r2, #0]
-	cmp	r3, r2
-	bcc	.L1344
-	ldr	r3, .L1350+36
-	ldrh	r2, [r4, #0]
-	ldrh	r1, [r4, #4]
-	ldr	r3, [r3, #0]
-	ldrh	r0, [r3, r2, lsl #1]
-	subs	r1, r0, r1
-	strh	r1, [r3, r2, lsl #1]	@ movhi
-	movs	r3, #0
-	strh	r3, [r4, #4]	@ movhi
-	mov	r2, r3	@ movhi
-	ldr	r3, .L1350+16
-	strb	r2, [r4, #6]
-	ldrh	r3, [r3, #0]
-	strh	r3, [r4, #2]	@ movhi
-.L1344:
-	ldr	r3, .L1350+16
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r3, #0]
-	cmp	r2, r3
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	cmp	r3, #44
 	bne	.L1347
-	ldrh	r3, [r4, #4]
+	ldrb	r3, [r7]	@ zero_extendqisi2
 	cbz	r3, .L1347
-	ldr	r1, .L1350
-	movw	r2, #3028
-	ldr	r0, .L1350+4
-	bl	printf
-	ldr	r0, .L1350+8
-	ldr	r1, .L1350+12
-	bl	printf
+	movs	r3, #0
+	movs	r0, #1
+	strb	r3, [r7]
+	bl	FlashSetInterfaceMode
+	movs	r0, #1
+	bl	NandcSetMode
 .L1347:
+	movs	r0, #0
+	bl	flash_enter_slc_mode
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	tst	r3, #6
+	beq	.L1348
+	ldrb	r2, [r7]	@ zero_extendqisi2
+	cbnz	r2, .L1349
+	lsls	r3, r3, #31
+	bmi	.L1348
+.L1349:
+	ldr	r3, .L1402+16
+	movs	r0, #0
+	ldr	r1, [r3]
+	bl	FlashDdrParaScan
+.L1348:
+	movs	r0, #0
+	movs	r7, #16
+	bl	flash_exit_slc_mode
+	ldr	r3, [r4]
+	ldrb	r0, [r3, #20]	@ zero_extendqisi2
+	bl	FlashBchSel
+	ldr	r0, .L1402+20
+	bl	FlashReadIdbDataRaw
+	ldr	r8, [r4]
+	ldr	r3, [sp, #20]
+	ldr	r4, .L1402+24
+	ldrb	r1, [r8, #12]	@ zero_extendqisi2
+	strb	r7, [r3]
+	ldrh	r5, [r8, #10]
+	strh	r1, [r4, #8]	@ movhi
+	ldrb	r3, [r8, #7]	@ zero_extendqisi2
 	mov	r0, r5
-	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
-.L1351:
-	.align	2
+	str	r3, [r4, #4]
+	ldr	r3, [r6]
+	ldrh	r6, [r8, #14]
+	str	r3, [r4]
+	ldr	r3, .L1402+28
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	strh	r3, [r4, #10]	@ movhi
+	ldrb	r3, [r8, #13]	@ zero_extendqisi2
+	strh	r5, [r4, #16]	@ movhi
+	strh	r6, [r4, #14]	@ movhi
+	strh	r3, [r4, #12]	@ movhi
+	bl	__aeabi_idiv
+	mov	r2, #512
+	strh	r0, [r4, #18]	@ movhi
+	ldrb	r3, [r8, #9]	@ zero_extendqisi2
+	strh	r2, [r4, #24]	@ movhi
+	ldr	r2, [sp, #16]
+	strh	r3, [r4, #20]	@ movhi
+	smulbb	r5, r5, r3
+	strh	r7, [r4, #26]	@ movhi
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	uxth	r5, r5
+	cmp	r2, #1
+	strh	r5, [r4, #22]	@ movhi
+	bne	.L1350
+	lsls	r3, r3, #1
+	lsrs	r2, r6, #1
+	lsls	r5, r5, #1
+	strh	r3, [r4, #20]	@ movhi
+	movs	r3, #8
+	strh	r2, [r4, #14]	@ movhi
+	strh	r5, [r4, #22]	@ movhi
+	strh	r3, [r4, #26]	@ movhi
 .L1350:
-	.word	.LANCHOR209
-	.word	.LC3
-	.word	.LC4
-	.word	.LC5
-	.word	.LANCHOR56
-	.word	.LANCHOR41
-	.word	.LANCHOR7
-	.word	.LANCHOR9
-	.word	.LANCHOR57
-	.word	.LANCHOR89
-	.size	get_new_active_ppa, .-get_new_active_ppa
-	.section	.text.FtlSlcSuperblockCheck,"ax",%progbits
-	.align	1
-	.global	FtlSlcSuperblockCheck
-	.thumb
-	.thumb_func
-	.type	FtlSlcSuperblockCheck, %function
-FtlSlcSuperblockCheck:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, r8, sl, lr}
-	mov	r4, r0
-	ldrh	r3, [r0, #4]
-	cmp	r3, #0
-	beq	.L1352
-	ldrh	r3, [r0, #0]
-	movw	r5, #65535
-	cmp	r3, r5
-	beq	.L1352
-	ldrb	r3, [r0, #6]	@ zero_extendqisi2
-	movs	r6, #0
-	ldr	sl, .L1358+4
-	adds	r3, r3, #8
-	ldr	r8, .L1358+20
-	ldr	r7, .L1358
-	ldrh	r3, [r0, r3, lsl #1]
-	b	.L1354
-.L1355:
-	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	ldrh	r2, [r7, #0]
-	adds	r3, r3, #1
+	ldrb	r0, [r8, #20]	@ zero_extendqisi2
+	bl	FlashBchSel
+	movs	r0, #0
+.L1307:
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1318:
+	cmp	r3, #220
+	bne	.L1319
+	mov	r1, #4096
+	b	.L1395
+.L1332:
+	add	r2, r3, #28
+	adds	r3, r3, #20
+	cmp	r0, #7
+	it	eq
+	moveq	r3, r2
+	b	.L1333
+.L1331:
+	sub	r3, r0, #17
+	cmp	r3, #2
+	bhi	.L1337
+	ldr	r3, .L1402+32
+	cmp	r0, #19
+	str	r3, [r5]
+	ite	ne
+	movne	r3, #7
+	moveq	r3, #15
+	strb	r3, [r1]
+	b	.L1330
+.L1337:
+	cmp	r0, #33
+	beq	.L1339
+	sub	r3, r0, #65
+	cmp	r3, #1
+	bhi	.L1340
+.L1339:
+	ldr	r3, .L1402+36
+	str	r3, [ip]
+	movs	r3, #4
+	strb	r3, [r2]
+	movs	r3, #7
+	strb	r3, [lr]
+	b	.L1330
+.L1340:
+	sub	r3, r0, #67
 	uxtb	r3, r3
-	strb	r3, [r4, #6]
-	cmp	r2, r3
-	bne	.L1356
-	ldrh	r3, [r4, #2]
-	strb	r6, [r4, #6]
-	adds	r3, r3, #1
-	strh	r3, [r4, #2]	@ movhi
-.L1356:
-	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	adds	r3, r3, #8
-	ldrh	r3, [r4, r3, lsl #1]
-.L1354:
-	cmp	r3, r5
-	beq	.L1355
-	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1357
-	ldrb	r2, [sl, #0]	@ zero_extendqisi2
-	cbnz	r2, .L1357
-	ldrh	r2, [r4, #2]
-	ldrh	r2, [r8, r2, lsl #1]
-	cmp	r2, r5
-	bne	.L1357
-	ldrh	r3, [r4, #4]
-	ldrh	r0, [r4, #0]
-	subs	r3, r3, #1
-	strh	r3, [r4, #4]	@ movhi
-	bl	decrement_vpc_count
-	ldrh	r3, [r4, #4]
-	cmp	r3, #0
-	bne	.L1355
-	ldrh	r2, [r4, #2]
-	strb	r3, [r4, #6]
-	adds	r2, r2, #1
-	strh	r2, [r4, #2]	@ movhi
-	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
-.L1357:
-	ldr	r2, .L1358+4
-	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	cbz	r2, .L1352
+	bls	.L1341
+	sub	r1, r0, #34
+	cmp	r1, #1
+	bhi	.L1342
+.L1341:
+	ldr	r1, .L1402+36
+	cmp	r0, #35
+	str	r1, [ip]
+	ldr	r1, .L1402+40
+	beq	.L1343
+	cmp	r0, #68
+	beq	.L1343
+	movs	r0, #7
+.L1396:
 	cmp	r3, #1
-	bne	.L1352
-	ldr	r3, .L1358+8
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r3, #0]
-	cmp	r2, r3
-	bcc	.L1352
-	ldr	r3, .L1358+12
-	ldrh	r2, [r4, #0]
-	ldrh	r1, [r4, #4]
-	ldr	r3, [r3, #0]
-	ldrh	r0, [r3, r2, lsl #1]
-	subs	r1, r0, r1
-	strh	r1, [r3, r2, lsl #1]	@ movhi
-	movs	r3, #0
-	strh	r3, [r4, #4]	@ movhi
-	mov	r2, r3	@ movhi
-	ldr	r3, .L1358+16
-	strb	r2, [r4, #6]
-	ldrh	r3, [r3, #0]
-	strh	r3, [r4, #2]	@ movhi
+	strb	r0, [r1]
+	ite	ls
+	movls	r3, #4
+	movhi	r3, #5
+	strb	r3, [r2]
+	b	.L1330
+.L1343:
+	movs	r0, #17
+	b	.L1396
+.L1342:
+	cmp	r0, #49
+	itt	eq
+	ldreq	r3, .L1402+44
+	streq	r3, [r5]
+	b	.L1330
 .L1352:
-	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
-.L1359:
+	mvn	r0, #1
+	b	.L1307
+.L1403:
 	.align	2
-.L1358:
-	.word	.LANCHOR41
-	.word	.LANCHOR7
-	.word	.LANCHOR57
-	.word	.LANCHOR89
-	.word	.LANCHOR56
-	.word	.LANCHOR9
-	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
-	.section	.text.allocate_data_superblock,"ax",%progbits
+.L1402:
+	.word	HynixReadRetrial
+	.word	.LANCHOR34
+	.word	.LANCHOR152
+	.word	1446522928
+	.word	.LANCHOR144
+	.word	.LANCHOR139
+	.word	.LANCHOR15
+	.word	.LANCHOR25
+	.word	MicronReadRetrial
+	.word	ToshibaReadRetrial
+	.word	.LANCHOR147
+	.word	SamsungReadRetrial
+	.size	FlashInit, .-FlashInit
+	.section	.text.FlashReadSlc2KPages,"ax",%progbits
 	.align	1
-	.global	allocate_data_superblock
+	.global	FlashReadSlc2KPages
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	allocate_data_superblock, %function
-allocate_data_superblock:
-	@ args = 0, pretend = 0, frame = 24
+	.fpu softvfp
+	.type	FlashReadSlc2KPages, %function
+FlashReadSlc2KPages:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1405
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r8, r1
+	ldr	r3, .L1433
+	mov	fp, r2
 	mov	r4, r0
-	ldr	r3, [r3, #0]
-	sub	sp, sp, #24
-	cmp	r3, #0
-	bne	.L1361
-	ldr	r7, .L1405+4
-	ldr	r8, .L1405+104
-.L1401:
-	ldr	r1, .L1405+8
-	ldrh	r2, [r7, #0]
-	ldrh	r3, [r1, #0]
-	adds	r2, r2, r3
-	ldr	r3, .L1405+12
-	ldrh	r3, [r3, #0]
+	movs	r7, #0
+	ldrb	r10, [r3, #9]	@ zero_extendqisi2
+.L1405:
+	cmp	r7, r8
+	bne	.L1418
+	movs	r0, #0
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1418:
+	sub	r3, r8, r7
+	add	r2, sp, #12
+	uxtb	r3, r3
+	mov	r1, fp
+	mov	r0, r4
+	str	r3, [sp]
+	add	r3, sp, #8
+	bl	LogAddr2PhyAddr
+	ldr	r2, .L1433+4
+	ldr	r3, [sp, #8]
+	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, r3
-	ble	.L1363
-	ldr	r1, .L1405+16
-	movw	r2, #2818
-	ldr	r0, .L1405+20
-	bl	printf
-	ldr	r0, .L1405+24
-	ldr	r1, .L1405+28
-	bl	printf
-.L1363:
-	ldr	r3, .L1405+32
-	cmp	r4, r3
-	bne	.L1364
-	ldr	r3, .L1405+36
-	ldrh	r2, [r7, #0]
-	ldr	r3, [r3, #0]
-	lsrs	r1, r2, #1
-	adds	r0, r1, #1
-	mul	r5, r3, r2
-	add	r0, r0, r5, lsr #2
-	ldr	r5, .L1405+40
-	uxth	r0, r0
-	ldr	r5, [r5, #0]
-	cbz	r5, .L1393
-	ldr	r5, .L1405+44
-	ldr	r5, [r5, #0]
-	cmp	r5, #29
-	bhi	.L1393
-	cmp	r5, #2
-	bls	.L1398
-	lsls	r0, r2, #31
-	bpl	.L1365
-	cbz	r3, .L1395
-	b	.L1365
-.L1364:
-	ldrb	r3, [r4, #8]	@ zero_extendqisi2
-	cmp	r3, #1
-	bne	.L1398
-	ldr	r3, .L1405+48
-	ldrh	r3, [r3, #0]
-	cmp	r3, #1
-	beq	.L1398
-	ldr	r3, .L1405+52
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbnz	r3, .L1398
-	ldr	r2, .L1405+40
-	ldrh	r3, [r7, #0]
-	ldr	r2, [r2, #0]
-	lsrs	r1, r3, #3
-	cbz	r2, .L1365
-	ldr	r2, .L1405+44
-	ldr	r2, [r2, #0]
-	cmp	r2, #1
-	bhi	.L1365
-	movs	r1, #7
-	muls	r1, r3, r1
-	lsrs	r1, r1, #3
-	b	.L1365
-.L1393:
-	mov	r1, r0
-.L1365:
-	cbz	r1, .L1366
-	subs	r1, r1, #1
-	uxth	r1, r1
-	b	.L1366
-.L1395:
-	mov	r1, r3
-	b	.L1366
-.L1398:
-	movs	r1, #0
-.L1366:
-	ldr	r0, .L1405+56
-	ldrb	r2, [r4, #8]	@ zero_extendqisi2
-	bl	List_pop_index_node
-	ldrh	r3, [r7, #0]
-	uxth	r5, r0
-	cbnz	r3, .L1367
-	ldr	r1, .L1405+16
-	movw	r2, #2838
-	ldr	r0, .L1405+20
-	bl	printf
-	ldr	r0, .L1405+24
-	ldr	r1, .L1405+28
-	bl	printf
-.L1367:
-	ldr	r2, .L1405+4
-	mov	r0, r4
-	ldrh	r3, [r2, #0]
-	subs	r3, r3, #1
-	strh	r3, [r2, #0]	@ movhi
-	strh	r5, [r4, #0]	@ movhi
-	bl	make_superblock
-	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1368
-	ldr	r3, .L1405+60
-	movw	r2, #65535
-	ldr	r1, .L1405+8
-	ldr	r3, [r3, #0]
-	strh	r2, [r3, r5, lsl #1]	@ movhi
-	ldrh	r3, [r1, #0]
-	ldrh	r2, [r7, #0]
-	adds	r2, r2, r3
-	ldr	r3, .L1405+12
-	ldrh	r3, [r3, #0]
-	cmp	r2, r3
-	ble	.L1401
-	ldr	r1, .L1405+16
-	movw	r2, #2850
-	ldr	r0, .L1405+20
-	bl	printf
-	ldr	r1, .L1405+28
-	ldr	r0, .L1405+24
-	bl	printf
-	b	.L1401
-.L1368:
-	ldr	r1, .L1405+8
-	ldrh	r2, [r7, #0]
-	ldrh	r3, [r1, #0]
-	adds	r2, r2, r3
-	ldr	r3, .L1405+12
-	ldrh	r3, [r3, #0]
-	cmp	r2, r3
-	ble	.L1370
-	ldr	r1, .L1405+16
-	movw	r2, #2853
-	ldr	r0, .L1405+20
-	bl	printf
-	ldr	r0, .L1405+24
-	ldr	r1, .L1405+28
-	bl	printf
-.L1370:
-	ldr	r3, .L1405+64
-	movs	r6, #0
-	ldr	lr, [r8, #0]
-	mov	sl, r4
-	mov	r1, r4
-	mov	r2, r6
-	ldrh	r3, [r3, #0]
-	mov	r0, r6
-	stmia	sp, {r4, lr}
-	str	r3, [sp, #20]
-	mov	r3, lr
-	b	.L1371
-.L1373:
-	str	r0, [r3, #8]
-	movw	r4, #65535
-	str	r0, [r3, #12]
-	ldrh	ip, [r1, #16]
-	cmp	ip, r4
-	beq	.L1372
-	ldr	r4, [sp, #4]
-	mov	lr, #36
-	lsl	ip, ip, #10
-	mla	fp, lr, r6, r4
-	adds	r6, r6, #1
-	uxth	r6, r6
-	str	ip, [fp, #4]
-.L1372:
-	adds	r2, r2, #1
-	adds	r3, r3, #36
-	adds	r1, r1, #2
-	uxth	r2, r2
-.L1371:
-	ldr	r4, [sp, #20]
-	cmp	r2, r4
-	bne	.L1373
-	ldr	r4, [sp, #0]
-	cbnz	r6, .L1374
-	ldr	r1, .L1405+16
-	movw	r2, #2865
-	ldr	r0, .L1405+20
-	bl	printf
-	ldr	r0, .L1405+24
-	ldr	r1, .L1405+28
-	bl	printf
-.L1374:
-	ldr	r3, .L1405+40
-	ldr	r3, [r3, #0]
-	cbz	r3, .L1375
-	ldr	r3, .L1405+68
-	cmp	r4, r3
-	bne	.L1375
-	ldr	r3, .L1405+72
-	ldr	r3, [r3, #0]
-	ldrh	r3, [r3, r5, lsl #1]
-	cmp	r3, #30
-	bls	.L1375
-	movs	r3, #0
-	strb	r3, [r4, #8]
-.L1375:
-	ldr	r3, .L1405+76
-	ldrh	r3, [r3, #0]
-	cmp	r3, r5
-	bne	.L1376
-	ldr	r1, .L1405+16
-	movw	r2, #2872
-	ldr	r0, .L1405+20
-	bl	printf
-	ldr	r0, .L1405+24
-	ldr	r1, .L1405+28
-	bl	printf
-.L1376:
-	ldr	r3, .L1405+72
-	ldrb	r2, [r4, #8]	@ zero_extendqisi2
-	ldr	r3, [r3, #0]
-	cbnz	r2, .L1377
-	ldrh	r2, [r3, r5, lsl #1]
-	cbz	r2, .L1378
-	ldr	r1, .L1405+80
-	ldrh	r1, [r1, #0]
-	adds	r2, r2, r1
-	b	.L1402
-.L1378:
-	movs	r2, #2
-.L1402:
-	strh	r2, [r3, r5, lsl #1]	@ movhi
+	bhi	.L1406
+	mov	r3, #-1
+	str	r3, [r4]
+.L1407:
+	adds	r7, r7, #1
+	adds	r4, r4, #36
+	b	.L1405
+.L1406:
+	ldr	r2, .L1433+8
+	ldrb	r5, [r2, r3]	@ zero_extendqisi2
+	mov	r0, r5
+	bl	NandcWaitFlashReady
+	mov	r0, r5
+	bl	NandcFlashCs
+	ldr	r1, [sp, #12]
 	mov	r0, r5
-	ldr	r3, .L1405+84
+	bl	FlashReadCmd
+	mov	r0, r5
+	bl	NandcWaitFlashReady
+	ldr	r3, [r4, #12]
+	mov	r2, r10
 	movs	r1, #0
-	ldr	r2, [r3, #0]
-	adds	r2, r2, #1
-	str	r2, [r3, #0]
-	b	.L1403
-.L1377:
-	ldrh	r2, [r3, r5, lsl #1]
 	mov	r0, r5
-	movs	r1, #1
-	adds	r2, r2, #1
-	strh	r2, [r3, r5, lsl #1]	@ movhi
-	ldr	r3, .L1405+88
-	ldr	r2, [r3, #0]
-	adds	r2, r2, #1
-	str	r2, [r3, #0]
-.L1403:
-	bl	ftl_set_blk_mode
-	ldr	r3, .L1405+72
-	lsl	fp, r5, #1
-	str	fp, [sp, #20]
-	ldr	r3, [r3, #0]
-	ldrh	r2, [r3, r5, lsl #1]
-	ldr	r3, .L1405+92
-	ldr	r1, [r3, #0]
-	cmp	r2, r1
-	it	hi
-	strhi	r2, [r3, #0]
-	ldr	r3, .L1405+80
-	ldrh	r2, [r3, #0]
-	ldr	r3, .L1405+84
-	ldr	r0, [r3, #0]
-	ldr	r3, .L1405+88
-	ldr	r3, [r3, #0]
-	mla	r0, r0, r2, r3
-	ldr	r3, .L1405+12
-	ldrh	r1, [r3, #0]
-	bl	__aeabi_uidiv
-	ldr	r3, .L1405+96
-	str	r0, [r3, #0]
-	ldr	r3, .L1405+100
-	ldr	r3, [r3, #0]
-	ldr	r2, [r3, #16]
-	adds	r2, r2, #1
-	str	r2, [r3, #16]
-	ldr	r3, [r8, #0]
-	movs	r2, #0
-	b	.L1382
-.L1406:
-	.align	2
-.L1405:
-	.word	.LANCHOR82
-	.word	.LANCHOR94
-	.word	.LANCHOR91
-	.word	.LANCHOR43
-	.word	.LANCHOR210
-	.word	.LC3
-	.word	.LC4
-	.word	.LC5
-	.word	.LANCHOR99
-	.word	.LANCHOR169
-	.word	.LANCHOR116
-	.word	.LANCHOR167
-	.word	.LANCHOR47
-	.word	.LANCHOR7
-	.word	.LANCHOR93
-	.word	.LANCHOR89
-	.word	.LANCHOR41
-	.word	.LANCHOR97
-	.word	.LANCHOR84
-	.word	.LANCHOR202
-	.word	.LANCHOR51
-	.word	.LANCHOR164
-	.word	.LANCHOR165
-	.word	.LANCHOR166
-	.word	.LANCHOR211
-	.word	.LANCHOR187
-	.word	.LANCHOR83
-.L1383:
-	adds	r2, r2, #1
-	ldr	r1, [r3, #-32]
-	uxth	r2, r2
-	bic	r1, r1, #1020
-	bic	r1, r1, #3
-	str	r1, [r3, #-32]
-.L1382:
-	adds	r3, r3, #36
-	cmp	r2, r6
-	bne	.L1383
-	ldr	r3, .L1407
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1384
-	ldrb	r3, [r4, #8]	@ zero_extendqisi2
-	ldr	r0, [r8, #0]
-	cmp	r3, #1
-	bne	.L1385
+	str	r3, [sp]
+	ldr	r3, [r4, #8]
+	bl	NandcXferData
+	ldr	r3, .L1433+12
+	mov	r6, r0
+	ldr	r1, [sp, #12]
+	mov	r0, r5
+	ldr	r3, [r3]
+	add	r1, r1, r3
+	bl	FlashReadCmd
+	ldr	r3, [r4, #8]
+	cbz	r3, .L1408
+	add	r3, r3, #2048
+.L1408:
+	ldr	r2, [r4, #12]
+	cbz	r2, .L1409
+	adds	r2, r2, #8
+.L1409:
+	str	r2, [sp]
 	movs	r1, #0
-	b	.L1404
-.L1385:
-	movs	r1, #1
-.L1404:
-	mov	r2, r6
-	bl	FlashEraseBlocks
-.L1384:
-	ldrb	r1, [r4, #8]	@ zero_extendqisi2
-	mov	r2, r6
-	mov	fp, #0
-	ldr	r0, [r8, #0]
-	bl	FlashEraseBlocks
-	mov	ip, r5
-	mov	r3, r6
-	mov	r5, fp
-	mov	r6, r4
-	mov	r4, fp
-	b	.L1386
-.L1388:
-	ldr	r1, [r8, #0]
-	add	r0, r1, fp
-	ldr	r1, [r1, fp]
-	adds	r2, r1, #1
-	bne	.L1387
-	ldr	r0, [r0, #4]
-	adds	r5, r5, #1
-	str	r1, [sp, #16]
-	ubfx	r0, r0, #10, #16
-	str	r3, [sp, #8]
-	str	ip, [sp, #12]
-	bl	FtlBbmMapBadBlock
-	ldr	r1, [sp, #16]
-	strh	r1, [sl, #16]	@ movhi
-	ldrb	r1, [r6, #7]	@ zero_extendqisi2
-	subs	r1, r1, #1
-	strb	r1, [r6, #7]
-	ldr	ip, [sp, #12]
-	ldr	r3, [sp, #8]
-.L1387:
-	adds	r4, r4, #1
-	add	fp, fp, #36
-	add	sl, sl, #2
-	uxth	r4, r4
-.L1386:
-	cmp	r4, r3
-	bne	.L1388
-	mov	r3, r5
-	mov	r4, r6
-	mov	r5, ip
-	cbz	r3, .L1389
-	mov	r0, ip
-	bl	update_multiplier_value
-	bl	FtlBbmTblFlush
-.L1389:
-	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1390
-	ldr	r3, .L1407+4
-	movw	r2, #65535
-	ldr	r3, [r3, #0]
-	strh	r2, [r3, r5, lsl #1]	@ movhi
-	b	.L1401
-.L1390:
-	ldr	r2, .L1407+8
-	ldr	fp, [sp, #20]
-	ldrh	r2, [r2, #0]
-	muls	r3, r2, r3
-	movs	r2, #0
-	strh	r2, [r4, #2]	@ movhi
-	strb	r2, [r4, #6]
-	uxth	r3, r3
-	ldr	r2, .L1407+12
-	strh	r5, [r4, #0]	@ movhi
-	strh	r3, [r4, #4]	@ movhi
-	ldr	r1, [r2, #0]
-	str	r1, [r4, #12]
-	adds	r1, r1, #1
-	str	r1, [r2, #0]
-	ldr	r2, .L1407+4
-	ldr	r2, [r2, #0]
-	strh	r3, [r2, fp]	@ movhi
-	ldrh	r3, [r4, #4]
-	cbz	r3, .L1391
-	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1361
-.L1391:
-	ldr	r1, .L1407+16
-	movw	r2, #2931
-	ldr	r0, .L1407+20
-	bl	printf
-	ldr	r0, .L1407+24
-	ldr	r1, .L1407+28
+	mov	r2, r10
+	mov	r0, r5
+	bl	NandcXferData
+	mov	r1, r0
+	mov	r0, r5
+	bl	NandcFlashDeCs
+	ldr	r3, .L1433+16
+	cmp	r6, r1
+	it	cc
+	movcc	r6, r1
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	add	r3, r2, r2, lsl #1
+	cmp	r6, r3, asr #2
+	bls	.L1410
+	adds	r5, r6, #1
+	it	ne
+	movne	r6, #256
+	str	r6, [r4]
+.L1413:
+	ldr	r3, [r4, #12]
+	cbz	r3, .L1414
+	ldr	r1, [r3, #8]
+	adds	r0, r1, #1
+	bne	.L1414
+	ldr	r3, [r3]
+	adds	r3, r3, #1
+	it	ne
+	strne	r1, [r4]
+.L1414:
+	ldr	r3, [r4]
+	adds	r1, r3, #1
+	bne	.L1407
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1433+20
 	bl	printf
-.L1361:
-	movs	r0, #0
-	add	sp, sp, #24
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1408:
+	ldr	r1, [r4, #8]
+	cbz	r1, .L1416
+	movs	r3, #8
+	movs	r2, #4
+	ldr	r0, .L1433+24
+	bl	rknand_print_hex
+.L1416:
+	ldr	r1, [r4, #12]
+	cmp	r1, #0
+	beq	.L1407
+	movs	r3, #4
+	ldr	r0, .L1433+28
+	mov	r2, r3
+	bl	rknand_print_hex
+	b	.L1407
+.L1410:
+	movs	r3, #0
+	str	r3, [r4]
+	b	.L1413
+.L1434:
 	.align	2
-.L1407:
-	.word	.LANCHOR7
-	.word	.LANCHOR89
-	.word	.LANCHOR56
-	.word	.LANCHOR156
-	.word	.LANCHOR210
-	.word	.LC3
-	.word	.LC4
-	.word	.LC5
-	.size	allocate_data_superblock, .-allocate_data_superblock
-	.section	.text.FtlSuperblockPowerLostFix,"ax",%progbits
+.L1433:
+	.word	.LANCHOR29
+	.word	.LANCHOR25
+	.word	.LANCHOR26
+	.word	.LANCHOR3
+	.word	.LANCHOR31
+	.word	.LC20
+	.word	.LC21
+	.word	.LC22
+	.size	FlashReadSlc2KPages, .-FlashReadSlc2KPages
+	.section	.text.FlashReadPages,"ax",%progbits
 	.align	1
-	.global	FtlSuperblockPowerLostFix
+	.global	FlashReadPages
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlSuperblockPowerLostFix, %function
-FtlSuperblockPowerLostFix:
-	@ args = 0, pretend = 0, frame = 40
+	.fpu softvfp
+	.type	FlashReadPages, %function
+FlashReadPages:
+	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1418
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r4, r0
-	ldrb	r6, [r3, #0]	@ zero_extendqisi2
+	ldr	r3, .L1526
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #40
-	cbz	r6, .L1417
-	ldrb	r6, [r0, #8]	@ zero_extendqisi2
-	cmp	r6, #1
-	bne	.L1416
-	ldrh	r5, [r0, #4]
-	b	.L1410
-.L1416:
-	movs	r6, #0
-.L1417:
-	movs	r5, #12
-.L1410:
-	mov	r7, #-1
-	ldr	sl, .L1418+12
-	ldr	fp, .L1418+16
-	ldr	r8, .L1418+20
-	b	.L1411
-.L1414:
-	ldrh	r3, [r4, #4]
-	cbz	r3, .L1412
-	mov	r0, r4
-	bl	get_new_active_ppa
-	str	r0, [sp, #8]
-	adds	r0, r0, #1
-	beq	.L1412
-	ldr	r3, [sl, #0]
-	add	r0, sp, #4
-	ldr	r2, [fp, #0]
-	subs	r5, r5, #1
-	ldr	r1, [r8, #0]
-	str	r3, [sp, #12]
-	ldrh	r3, [r4, #0]
-	str	r2, [sp, #16]
-	str	r7, [sp, #20]
-	strh	r3, [r2, #2]	@ movhi
-	movs	r3, #0
-	str	r1, [r2, #4]
-	strh	r3, [r2, #0]	@ movhi
-	str	r7, [r2, #8]
-	str	r7, [r2, #12]
-	adds	r2, r1, #1
-	cmp	r2, #-1
-	it	eq
-	moveq	r2, r3
-	movs	r1, #1
-	str	r2, [r8, #0]
-	mov	r2, r6
-	bl	FlashProgPages
-	ldrh	r0, [r4, #0]
-	bl	decrement_vpc_count
-.L1411:
-	cmp	r5, #0
-	bne	.L1414
-.L1412:
-	ldr	r3, .L1418+4
-	ldrh	r2, [r4, #0]
-	ldrh	r1, [r4, #4]
-	ldr	r3, [r3, #0]
-	ldrh	r0, [r3, r2, lsl #1]
-	subs	r1, r0, r1
-	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L1418+8
-	ldrh	r3, [r3, #0]
-	strh	r3, [r4, #2]	@ movhi
-	movs	r3, #0
-	strb	r3, [r4, #6]
-	strh	r3, [r4, #4]	@ movhi
-	add	sp, sp, #40
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1419:
-	.align	2
-.L1418:
-	.word	.LANCHOR7
-	.word	.LANCHOR89
-	.word	.LANCHOR56
-	.word	.LANCHOR86
-	.word	.LANCHOR184
-	.word	.LANCHOR157
-	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
-	.section	.text.FtlLowFormatEraseBlock,"ax",%progbits
-	.align	1
-	.global	FtlLowFormatEraseBlock
-	.thumb
-	.thumb_func
-	.type	FtlLowFormatEraseBlock, %function
-FtlLowFormatEraseBlock:
-	@ args = 0, pretend = 0, frame = 24
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1451
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	sub	sp, sp, #24
-	ldr	r6, [r3, #0]
-	mov	r8, r1
-	str	r0, [sp, #12]
-	cmp	r6, #0
-	bne	.L1444
-	ldr	r3, .L1451+4
-	mov	r5, r6
-	mov	r4, r6
-	ldr	sl, .L1451+28
-	movs	r7, #36
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	mov	r10, r0
+	str	r1, [sp, #24]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r2, [sp, #12]
+	cbnz	r3, .L1436
+	ldr	r2, .L1526+4
+	mov	r8, r3
 	str	r3, [sp, #8]
-	ldr	r3, .L1451+8
-	str	r0, [r3, #0]
-	b	.L1422
-.L1426:
-	mul	r3, r7, r6
-	ldr	r1, .L1451+12
-	ldr	fp, [sl, #0]
+	ldrb	r2, [r2, #9]	@ zero_extendqisi2
+	str	r2, [sp, #20]
+	ldr	r2, .L1526+8
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	str	r2, [sp, #28]
+.L1437:
+	ldr	r3, [sp, #8]
+	ldr	r2, [sp, #24]
+	cmp	r3, r2
+	bcc	.L1475
 	movs	r0, #0
-	str	r0, [fp, r3]
-	ldrb	r0, [r1, r6]	@ zero_extendqisi2
-	ldr	r1, [sp, #12]
-	bl	V2P_block
-	str	r0, [sp, #4]
-	cmp	r8, #0
-	beq	.L1423
-	bl	IsBlkInVendorPart
-	cbnz	r0, .L1424
-.L1423:
-	ldr	r0, [sp, #4]
-	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L1425
-	mul	r3, r7, r5
-	ldr	r2, [sl, #0]
-	ldr	ip, [sp, #4]
-	adds	r2, r2, r3
-	add	r3, fp, r3
-	lsl	r1, ip, #10
-	str	r0, [r3, #8]
-	ldr	r0, .L1451+16
-	str	r1, [r2, #4]
-	ldrh	r2, [r0, #0]
-	muls	r2, r5, r2
-	ldr	r0, .L1451+20
-	adds	r5, r5, #1
-	bic	r2, r2, #3
-	uxth	r5, r5
-	ldr	r1, [r0, #0]
-	adds	r2, r1, r2
-	str	r2, [r3, #12]
-	b	.L1424
-.L1425:
-	adds	r4, r4, #1
-	uxth	r4, r4
-.L1424:
-	adds	r6, r6, #1
-	uxth	r6, r6
-.L1422:
-	ldr	r1, .L1451+24
-	ldrh	r3, [r1, #0]
-	cmp	r3, r6
-	bhi	.L1426
-	cmp	r5, #0
-	beq	.L1421
-	ldr	r2, [sp, #8]
-	mov	sl, #0
-	ldr	r7, .L1451+28
-	mov	fp, sl
-	adds	r6, r2, #0
-	mov	r2, r5
-	it	ne
-	movne	r6, #1
-	ldr	r0, [r7, #0]
-	mov	r1, r6
-	bl	FlashEraseBlocks
-.L1430:
-	ldr	r3, [r7, #0]
-	add	r2, r3, sl
-	ldr	r3, [r3, sl]
-	adds	r3, r3, #1
-	bne	.L1429
-	ldr	r0, [r2, #4]
-	adds	r4, r4, #1
-	ubfx	r0, r0, #10, #16
-	uxth	r4, r4
-	bl	FtlBbmMapBadBlock
-.L1429:
-	add	fp, fp, #1
-	add	sl, sl, #36
-	uxth	fp, fp
-	cmp	fp, r5
-	bne	.L1430
-	cmp	r8, #0
-	beq	.L1445
-	ldr	r3, .L1451+32
-	ldrh	r3, [r3, #0]
-	str	r3, [sp, #4]
-	ldr	r3, .L1451+4
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbnz	r3, .L1446
-	ldr	ip, [sp, #4]
-	movs	r6, #1
-	lsr	ip, ip, #2
-	str	ip, [sp, #8]
-	b	.L1431
-.L1445:
-	mov	ip, #6
-	str	ip, [sp, #8]
-	mov	ip, #1
-	str	ip, [sp, #4]
-	b	.L1431
-.L1446:
-	movs	r6, #1
-	str	r6, [sp, #8]
-.L1431:
-	ldr	sl, .L1451+28
-	movs	r7, #0
-.L1439:
-	mov	fp, #0
-	mov	r5, fp
-	b	.L1432
+	b	.L1435
+.L1436:
+	bl	FlashReadSlc2KPages
 .L1435:
-	mov	ip, #36
-	ldr	r2, [sl, #0]
-	ldr	r1, .L1451+12
-	movs	r0, #0
-	mul	r3, ip, fp
-	str	r2, [sp, #16]
-	str	r0, [r2, r3]
-	ldrb	r0, [r1, fp]	@ zero_extendqisi2
+	add	sp, sp, #40
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1475:
+	ldr	r2, [sp, #8]
+	movs	r3, #36
 	ldr	r1, [sp, #12]
-	bl	V2P_block
-	str	r0, [sp, #20]
-	cmp	r8, #0
-	beq	.L1433
-	bl	IsBlkInVendorPart
-	cbnz	r0, .L1434
-.L1433:
-	ldr	r0, [sp, #20]
-	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L1434
-	ldr	r2, [sp, #16]
-	mov	ip, #36
-	ldr	r1, [sp, #20]
-	ldr	r0, .L1451+36
-	mla	r3, ip, r5, r2
-	add	r2, r7, r1, lsl #10
-	ldr	r1, .L1451+16
-	str	r2, [r3, #4]
-	ldr	r2, [r0, #0]
-	ldr	r0, .L1451+40
-	str	r2, [r3, #8]
-	ldrh	r2, [r1, #0]
-	muls	r2, r5, r2
-	adds	r5, r5, #1
-	ldr	r1, [r0, #0]
-	bic	r2, r2, #3
-	uxth	r5, r5
-	adds	r2, r1, r2
-	str	r2, [r3, #12]
-.L1434:
-	add	fp, fp, #1
-	uxth	fp, fp
-.L1432:
-	ldr	r1, .L1451+24
-	ldrh	r3, [r1, #0]
-	cmp	r3, fp
-	bhi	.L1435
-	cmp	r5, #0
-	beq	.L1421
-	mov	r1, r5
-	mov	r2, r6
-	ldr	r0, [sl, #0]
-	movs	r3, #1
-	mov	fp, #0
-	bl	FlashProgPages
-	mov	ip, r8
-	mov	r8, r7
-	mov	r7, r6
-	mov	r6, r5
-	mov	r5, fp
-.L1438:
-	ldr	r2, [sl, #0]
-	add	r1, r2, fp
-	ldr	r2, [r2, fp]
-	cbz	r2, .L1437
-	ldr	r0, [r1, #4]
-	adds	r4, r4, #1
-	str	ip, [sp, #0]
-	ubfx	r0, r0, #10, #16
-	uxth	r4, r4
-	bl	FtlBbmMapBadBlock
-	ldr	ip, [sp, #0]
-.L1437:
-	adds	r5, r5, #1
-	add	fp, fp, #36
-	uxth	r5, r5
-	cmp	r5, r6
-	bne	.L1438
-	mov	r5, r6
-	mov	r6, r7
-	mov	r7, r8
-	mov	r8, ip
-	ldr	ip, [sp, #8]
-	add	r7, r7, ip
-	ldr	ip, [sp, #4]
-	uxth	r7, r7
-	cmp	r7, ip
-	bcc	.L1439
-	movs	r7, #0
-	ldr	fp, .L1451+28
-	mov	sl, r7
-.L1441:
-	cmp	r8, #0
-	beq	.L1440
-	ldr	r3, [fp, #0]
-	adds	r2, r3, r7
-	ldr	r3, [r3, r7]
-	cbnz	r3, .L1440
-	ldr	r0, [r2, #4]
-	movs	r1, #1
-	ubfx	r0, r0, #10, #16
-	bl	FtlFreeSysBlkQueueIn
+	mul	fp, r3, r2
+	add	r7, r10, fp
+	ldr	r3, [r7, #4]
+	mov	r0, r7
+	str	r3, [sp, #16]
+	ldr	r3, [sp, #24]
+	subs	r3, r3, r2
+	add	r2, sp, #36
+	uxtb	r3, r3
+	str	r3, [sp]
+	add	r3, sp, #32
+	bl	LogAddr2PhyAddr
+	ldr	r2, .L1526+12
+	mov	r5, r0
+	ldr	r3, [sp, #32]
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r2, r3
+	bhi	.L1439
+	mov	r3, #-1
+	str	r3, [r10, fp]
 .L1440:
-	add	sl, sl, #1
-	adds	r7, r7, #36
-	uxth	sl, sl
-	cmp	sl, r5
-	bne	.L1441
-	ldr	r0, [sp, #12]
-	cmp	r0, #63
-	bls	.L1442
-	cmp	r8, #0
-	beq	.L1421
+	ldr	r3, [sp, #8]
+	adds	r3, r3, #1
+	str	r3, [sp, #8]
+	b	.L1437
+.L1439:
+	ldr	r2, .L1526+16
+	ldrb	r4, [r2, r3]	@ zero_extendqisi2
+	ldr	r3, .L1526+20
+	mov	r0, r4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	it	eq
+	moveq	r5, #0
+	bl	NandcWaitFlashReady
+	ldr	r3, .L1526+24
+	ldr	r3, [r3]
+	ldrb	r1, [r3, #19]	@ zero_extendqisi2
+	subs	r3, r1, #1
+	cmp	r3, #6
+	bhi	.L1442
+	ldr	r3, .L1526+28
+	cmp	r1, #7
+	add	r2, r3, r4
+	ldrb	r3, [r2, #12]	@ zero_extendqisi2
+	it	eq
+	ldrbeq	r3, [r2, #20]	@ zero_extendqisi2
+	ldr	r2, .L1526+32
+	ldrb	r2, [r2, r4]	@ zero_extendqisi2
+	cmp	r2, r3
+	beq	.L1442
+	ldr	r2, .L1526+36
+	mov	r0, r4
+	ldrb	r1, [r2, #-3]	@ zero_extendqisi2
+	bl	HynixSetRRPara
 .L1442:
-	ldr	r3, .L1451+28
-	mov	r1, r6
-	mov	r2, r5
-	ldr	r0, [r3, #0]
-	bl	FlashEraseBlocks
-	b	.L1421
+	mov	r0, r4
+	bl	NandcFlashCs
+	ldr	r3, [sp, #12]
+	cmp	r3, #1
+	beq	.L1444
+	ldr	r3, [sp, #16]
+	cmp	r3, #0
+	bge	.L1445
 .L1444:
-	movs	r4, #0
-.L1421:
+	ldr	r3, .L1526+40
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L1445
 	mov	r0, r4
-	add	sp, sp, #24
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+	bl	flash_enter_slc_mode
 .L1452:
-	.align	2
-.L1451:
-	.word	.LANCHOR82
-	.word	.LANCHOR7
-	.word	.LANCHOR77
-	.word	.LANCHOR50
-	.word	.LANCHOR62
-	.word	.LANCHOR185
-	.word	.LANCHOR41
-	.word	.LANCHOR83
-	.word	.LANCHOR57
-	.word	.LANCHOR182
-	.word	.LANCHOR183
-	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
-	.section	.text.FlashTestBlk,"ax",%progbits
-	.align	1
-	.global	FlashTestBlk
-	.thumb
-	.thumb_func
-	.type	FlashTestBlk, %function
-FlashTestBlk:
-	@ args = 0, pretend = 0, frame = 104
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1458
-	push	{r4, r5, lr}
-	mov	r4, r0
-	ldr	r3, [r3, #0]
-	sub	sp, sp, #108
-	cmp	r0, r3
-	bcc	.L1456
-.L1455:
-	ldr	r5, .L1458+4
-	add	r0, sp, #4
-	movs	r1, #165
-	movs	r2, #32
-	str	r0, [sp, #80]
-	lsls	r4, r4, #10
-	ldr	r3, [r5, #0]
-	str	r3, [sp, #76]
-	bl	memset
-	movs	r1, #90
-	movs	r2, #8
-	ldr	r0, [r5, #0]
-	bl	memset
-	movs	r1, #1
-	mov	r2, r1
-	add	r0, sp, #68
-	str	r4, [sp, #72]
-	bl	FlashEraseBlocks
-	movs	r1, #1
-	add	r0, sp, #68
-	mov	r2, r1
-	mov	r3, r1
-	bl	FlashProgPages
-	ldr	r4, [sp, #68]
-	add	r0, sp, #68
-	movs	r1, #0
-	movs	r2, #1
-	cmp	r4, #0
-	ite	ne
-	movne	r4, #-1
-	moveq	r4, #0
-	bl	FlashEraseBlocks
-	b	.L1454
-.L1456:
-	movs	r4, #0
-.L1454:
+	ldr	r1, [sp, #36]
+	adds	r6, r1, #1
+	bne	.L1447
+	cmp	r4, #255
+	beq	.L1477
+.L1447:
+	cbz	r5, .L1449
+	ldr	r3, .L1526+44
 	mov	r0, r4
-	add	sp, sp, #108
-	pop	{r4, r5, pc}
-.L1459:
-	.align	2
+	ldr	r2, [r3]
+	add	r2, r2, r1
+	bl	FlashReadDpCmd
+.L1450:
+	mov	r0, r4
+	bl	NandcWaitFlashReady
+	cbz	r5, .L1448
+	ldr	r1, [sp, #36]
+	mov	r0, r4
+	bl	FlashReadDpDataOutCmd
+.L1448:
+	ldr	r3, [r7, #12]
+	movs	r1, #0
+	ldr	r2, [sp, #20]
+	mov	r0, r4
+	str	r3, [sp]
+	ldr	r3, [r7, #8]
+	bl	NandcXferData
+	ldr	r3, .L1526+8
+	mov	r6, r0
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L1451
+	adds	r0, r0, #1
+	bne	.L1451
+	ldr	r3, .L1526+8
+	movs	r5, #0
+	strb	r5, [r3]
+	b	.L1452
+.L1445:
+	mov	r0, r4
+	bl	flash_exit_slc_mode
+	b	.L1452
+.L1449:
+	mov	r0, r4
+	bl	FlashReadCmd
+	b	.L1450
+.L1477:
+	movs	r5, #0
+	b	.L1448
+.L1451:
+	cbz	r5, .L1453
+	ldr	r3, .L1526+44
+	mov	r0, r4
+	ldr	r1, [sp, #36]
+	ldr	r3, [r3]
+	add	r1, r1, r3
+	bl	FlashReadDpDataOutCmd
+	add	r3, fp, #36
+	movs	r1, #0
+	add	r3, r3, r10
+	mov	r0, r4
+	ldr	r2, [r3, #12]
+	str	r2, [sp]
+	ldr	r2, [sp, #20]
+	ldr	r3, [r3, #8]
+	bl	NandcXferData
+	cmp	r0, #-1
+	mov	r8, r0
+	it	eq
+	moveq	r5, #0
+.L1453:
+	mov	r0, r4
+	bl	NandcFlashDeCs
+	ldr	r3, .L1526+8
+	adds	r1, r6, #1
+	ldrb	r2, [sp, #28]	@ zero_extendqisi2
+	strb	r2, [r3]
+	bne	.L1454
+	ldr	r3, .L1526+48
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L1455
+.L1459:
+	ldr	r3, .L1526+52
+	ldr	r5, [r3]
+	cmp	r5, #0
+	bne	.L1456
+	ldr	r3, [r7, #12]
+	mov	r0, r4
+	ldr	r2, [r7, #8]
+	ldr	r1, [sp, #36]
+	bl	FlashReadRawPage
+	b	.L1525
+.L1455:
+	ldr	r3, .L1526+56
+	mov	r0, r4
+	ldr	r1, [sp, #36]
+	ldr	r3, [r3]
+	ldr	r5, [r3, #304]
+	movs	r3, #1
+	str	r3, [sp]
+	ldr	r2, [r7, #8]
+	ldr	r3, [r7, #12]
+	bl	FlashDdrTunningRead
+	adds	r2, r0, #1
+	mov	r6, r0
+	beq	.L1458
+	ldr	r3, .L1526+60
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r0, r3, lsr #1
+	bls	.L1478
 .L1458:
-	.word	.LANCHOR148
-	.word	.LANCHOR143
-	.size	FlashTestBlk, .-FlashTestBlk
-	.section	.text.ftl_map_blk_gc,"ax",%progbits
-	.align	1
-	.global	ftl_map_blk_gc
-	.thumb
-	.thumb_func
-	.type	ftl_map_blk_gc, %function
-ftl_map_blk_gc:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r4, r0
-	ldr	r5, [r0, #12]
-	ldr	fp, [r0, #24]
-	bl	ftl_free_no_use_map_blk
-	ldrh	r7, [r4, #10]
-	ldrh	r2, [r4, #8]
-	subs	r3, r7, #4
-	cmp	r2, r3
-	bge	.L1461
-	ldrh	r2, [r4, #40]
-	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L1462
-	ldr	r3, .L1475
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r3, #0]
-	cmp	r2, r3
-	bcc	.L1462
-.L1461:
-	ldrh	r1, [r4, #40]
-	movw	r3, #65535
-	uxth	r6, r0
-	cmp	r1, r3
-	beq	.L1463
-	ldr	r2, .L1475
-	ldrh	r3, [r4, #2]
-	ldrh	r2, [r2, #0]
-	cmp	r2, r3
-	bhi	.L1463
-	mov	r0, r5
-	movs	r2, #0
-	b	.L1464
-.L1466:
-	ldrh	lr, [r0], #2
-	cmp	lr, r1
-	beq	.L1474
-	adds	r2, r2, #1
-	uxth	r2, r2
-.L1464:
-	cmp	r2, r7
-	bne	.L1466
-	b	.L1465
-.L1474:
-	mov	r6, r2
-.L1465:
-	ldr	r0, .L1475+4
-	ldrh	r2, [r5, r2, lsl #1]
-	bl	printf
-	movw	r3, #65535
-	strh	r3, [r4, #40]	@ movhi
-.L1463:
-	ldrh	r7, [r5, r6, lsl #1]
-	lsls	r2, r6, #1
-	cmp	r7, #0
-	beq	.L1462
-	ldr	r3, [r4, #32]
+	ubfx	r0, r5, #8, #8
+	bl	NandcSetDdrPara
+	adds	r3, r6, #1
+	beq	.L1459
+.L1478:
+	movs	r5, #0
+.L1454:
+	ldr	r3, .L1526+60
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r6, r3, asr #2
+	bls	.L1467
+	ldr	r3, .L1526+52
+	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L1462
-	movs	r1, #1
-	str	r1, [r4, #32]
-	strh	r3, [r5, r2]	@ movhi
-	ldrh	r3, [r4, #8]
-	ldrh	r2, [r4, #2]
+	bne	.L1467
+	mov	r6, #256
+	b	.L1462
+.L1527:
+	.align	2
+.L1526:
+	.word	.LANCHOR1
+	.word	.LANCHOR29
+	.word	.LANCHOR5
+	.word	.LANCHOR25
+	.word	.LANCHOR26
+	.word	.LANCHOR198
+	.word	.LANCHOR18
+	.word	.LANCHOR20
+	.word	.LANCHOR21
+	.word	.LANCHOR20+4
+	.word	.LANCHOR8
+	.word	.LANCHOR3
+	.word	.LANCHOR28
+	.word	.LANCHOR149
+	.word	.LANCHOR19
+	.word	.LANCHOR31
+.L1456:
+	ldr	r3, [r7, #12]
+	mov	r0, r4
+	ldr	r2, [r7, #8]
+	ldr	r1, [sp, #36]
+	blx	r5
+	adds	r5, r0, #1
+	mov	r6, r0
+	bne	.L1460
+	ldr	r3, .L1528
+	ldr	r3, [r3]
+	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r3, #1
-	strh	r3, [r4, #8]	@ movhi
-	ldr	r3, .L1475
-	ldrh	r3, [r3, #0]
-	cmp	r2, r3
-	bcc	.L1467
+	cmp	r3, #6
+	bhi	.L1461
+	ldr	r2, .L1528+4
+	movs	r3, #0
 	mov	r0, r4
-	bl	ftl_map_blk_alloc_new_blk
-.L1467:
-	movs	r5, #0
-	ldr	r6, .L1475+8
-	ldr	sl, .L1475+40
-	b	.L1468
-.L1472:
-	lsls	r3, r5, #2
-	str	r3, [sp, #4]
-	ldr	r3, [fp, r5, lsl #2]
-	cmp	r7, r3, lsr #10
-	bne	.L1469
-	ldr	r2, [sl, #0]
-	movs	r1, #1
-	str	r3, [r6, #4]
-	ldr	r0, .L1475+8
-	str	r2, [r6, #8]
-	ldr	r2, .L1475+12
-	ldr	r8, [r2, #0]
-	mov	r2, r1
-	str	r8, [r6, #12]
-	bl	FlashReadPages
-	ldrh	r3, [r8, #8]
-	cmp	r3, r5
-	beq	.L1470
-	ldr	r1, .L1475+16
-	movw	r2, #638
-	ldr	r0, .L1475+20
+	ldrb	r1, [r2, #-3]	@ zero_extendqisi2
+	bl	HynixSetRRPara
+.L1461:
+	ldr	r3, [r7, #12]
+	mov	r0, r4
+	ldr	r2, [r7, #8]
+	ldr	r1, [sp, #36]
+	bl	FlashReadRawPage
+	ldr	r2, .L1528+8
+	mov	r6, r0
+	mov	r3, r0
+	ldr	r1, [r7, #4]
+	ldr	r0, .L1528+12
+	ldrb	r2, [r2]	@ zero_extendqisi2
 	bl	printf
-	ldr	r0, .L1475+24
-	ldr	r1, .L1475+28
+	adds	r0, r6, #1
+	bne	.L1460
+	ldr	r3, .L1528+16
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	cbz	r5, .L1462
+	ldr	r3, [sp, #12]
+	mov	r0, r4
+	cmp	r3, #1
+	beq	.L1463
+	ldr	r3, [sp, #16]
+	cmp	r3, #0
+	bge	.L1464
+.L1463:
+	bl	flash_enter_slc_mode
+.L1465:
+	ldr	r3, .L1528+20
+	mov	r0, r4
+	ldr	r2, [r7, #8]
+	ldr	r1, [sp, #36]
+	ldr	r5, [r3]
+	ldr	r3, [r7, #12]
+	blx	r5
+.L1525:
+	adds	r1, r0, #1
+	mov	r6, r0
+	mov	r5, #0
+	bne	.L1467
+.L1462:
+	str	r6, [r10, fp]
+.L1468:
+	ldr	r3, [r10, fp]
+	adds	r2, r3, #1
+	bne	.L1470
+	ldr	r2, .L1528+8
+	ldr	r1, [r7, #4]
+	ldr	r0, .L1528+24
+	ldrb	r2, [r2]	@ zero_extendqisi2
 	bl	printf
+	ldr	r1, [r7, #12]
+	cbz	r1, .L1470
+	movs	r3, #4
+	ldr	r0, .L1528+28
+	mov	r2, r3
+	bl	rknand_print_hex
 .L1470:
-	ldr	r3, .L1475+8
-	ldr	r3, [r3, #0]
-	adds	r3, r3, #1
-	bne	.L1471
-	ldr	r2, [sp, #4]
-	movs	r3, #0
-	ldr	r0, .L1475+32
-	str	r3, [fp, r2]
-	ldrh	r2, [r8, #8]
-	ldr	r1, [r6, #4]
-	bl	printf
-	ldr	r2, .L1475+36
-	movs	r3, #1
-	str	r3, [r2, #0]
-	b	.L1469
-.L1471:
+	cbz	r5, .L1472
+	ldr	r3, .L1528+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r8, r3, asr #2
+	bls	.L1473
+	ldr	r3, .L1528+20
+	ldr	r3, [r3]
+	cmp	r3, #0
+	it	eq
+	moveq	r8, #256
+.L1473:
+	cmp	r8, #-1
+	add	r3, fp, #36
+	str	r8, [r10, r3]
+	beq	.L1472
+	cmp	r8, #256
+	itt	ne
+	movne	r2, #0
+	strne	r2, [r10, r3]
+.L1472:
+	ldr	r3, [sp, #8]
+	add	r3, r3, r5
+	str	r3, [sp, #8]
+	ldr	r3, [sp, #12]
+	cmp	r3, #1
+	beq	.L1474
+	ldr	r3, [sp, #16]
+	cmp	r3, #0
+	bge	.L1440
+.L1474:
+	ldr	r3, .L1528+16
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L1440
 	mov	r0, r4
-	mov	r1, r5
-	ldr	r2, [r6, #8]
-	bl	FtlMapWritePage
-.L1469:
-	adds	r5, r5, #1
-	uxth	r5, r5
-.L1468:
-	ldrh	r3, [r4, #6]
-	cmp	r3, r5
-	bhi	.L1472
-	mov	r0, r7
-	movs	r1, #1
-	bl	FtlFreeSysBlkQueueIn
+	bl	flash_exit_slc_mode
+	b	.L1440
+.L1464:
+	bl	flash_exit_slc_mode
+	b	.L1465
+.L1460:
+	movs	r5, #0
+.L1467:
+	cmp	r6, #256
+	beq	.L1462
 	movs	r3, #0
-	str	r3, [r4, #32]
-.L1462:
-	ldr	r3, .L1475
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r3, #0]
-	cmp	r2, r3
-	bcc	.L1473
-	mov	r0, r4
-	bl	ftl_map_blk_alloc_new_blk
-.L1473:
-	movs	r0, #0
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1476:
+	str	r3, [r10, fp]
+	b	.L1468
+.L1529:
 	.align	2
-.L1475:
-	.word	.LANCHOR57
-	.word	.LC30
-	.word	.LANCHOR198
-	.word	.LANCHOR184
-	.word	.LANCHOR212
-	.word	.LC3
-	.word	.LC4
-	.word	.LC5
-	.word	.LC31
-	.word	.LANCHOR82
-	.word	.LANCHOR180
-	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
-	.section	.text.Ftl_write_map_blk_to_last_page,"ax",%progbits
+.L1528:
+	.word	.LANCHOR18
+	.word	.LANCHOR20+4
+	.word	.LANCHOR31
+	.word	.LC23
+	.word	.LANCHOR8
+	.word	.LANCHOR149
+	.word	.LC20
+	.word	.LC22
+	.size	FlashReadPages, .-FlashReadPages
+	.section	.text.FlashProgSlc2KPages,"ax",%progbits
 	.align	1
-	.global	Ftl_write_map_blk_to_last_page
+	.global	FlashProgSlc2KPages
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	Ftl_write_map_blk_to_last_page, %function
-Ftl_write_map_blk_to_last_page:
-	@ args = 0, pretend = 0, frame = 0
+	.fpu softvfp
+	.type	FlashProgSlc2KPages, %function
+FlashProgSlc2KPages:
+	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1484
-	push	{r4, r5, r6, r7, r8, lr}
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #64
+	str	r3, [sp, #12]
+	mov	r8, r1
 	mov	r4, r0
-	ldr	r6, [r3, #0]
-	ldr	r5, [r0, #12]
-	ldr	r8, [r0, #24]
-	cmp	r6, #0
-	bne	.L1478
-	ldrh	r3, [r0, #0]
-	movw	r2, #65535
-	cmp	r3, r2
-	bne	.L1479
-	ldrh	r3, [r0, #8]
-	cbz	r3, .L1480
-	ldr	r1, .L1484+4
-	movw	r2, #670
-	ldr	r0, .L1484+8
-	bl	printf
-	ldr	r0, .L1484+12
-	ldr	r1, .L1484+16
-	bl	printf
-.L1480:
-	ldrh	r3, [r4, #8]
+	mov	r6, r0
+	ldr	r3, .L1559
+	movs	r7, #0
+	ldr	fp, .L1559+28
+	str	r2, [sp, #8]
+	ldrb	r10, [r3, #9]	@ zero_extendqisi2
+.L1531:
+	cmp	r7, r8
+	bne	.L1537
+	ldr	r3, [sp, #12]
+	cmp	r3, #0
+	bne	.L1548
+.L1558:
+	movs	r0, #0
+	add	sp, sp, #64
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1537:
+	sub	r3, r8, r7
+	add	r2, sp, #20
+	uxtb	r3, r3
+	ldr	r1, [sp, #8]
+	mov	r0, r6
+	str	r3, [sp]
+	add	r3, sp, #24
+	bl	LogAddr2PhyAddr
+	ldr	r2, .L1559+4
+	ldr	r3, [sp, #24]
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r2, r3
+	bhi	.L1532
+	mov	r3, #-1
+	str	r3, [r6]
+.L1533:
+	adds	r7, r7, #1
+	adds	r6, r6, #36
+	b	.L1531
+.L1532:
+	ldr	r2, .L1559+8
+	ldrb	r5, [r2, r3]	@ zero_extendqisi2
+	mov	r0, r5
+	bl	NandcWaitFlashReady
+	mov	r0, r5
+	bl	NandcFlashCs
+	ldr	r1, [sp, #20]
+	mov	r0, r5
+	bl	FlashProgFirstCmd
+	ldr	r3, [r6, #12]
+	mov	r2, r10
+	movs	r1, #1
+	mov	r0, r5
+	str	r3, [sp]
+	ldr	r3, [r6, #8]
+	bl	NandcXferData
+	ldr	r1, [sp, #20]
+	mov	r0, r5
+	bl	FlashProgSecondCmd
+	mov	r0, r5
+	bl	NandcWaitFlashReady
+	ldr	r1, [sp, #20]
+	mov	r0, r5
+	bl	FlashReadStatus
+	sbfx	r0, r0, #0, #1
+	ldr	r1, [sp, #20]
+	str	r0, [r6]
+	mov	r0, r5
+	ldr	r3, [fp]
+	add	r1, r1, r3
+	bl	FlashProgFirstCmd
+	ldr	r3, [r6, #8]
+	cbz	r3, .L1534
+	add	r3, r3, #2048
+.L1534:
+	ldr	r2, [r6, #12]
+	cbz	r2, .L1535
+	adds	r2, r2, #8
+.L1535:
+	str	r2, [sp]
+	movs	r1, #1
+	mov	r2, r10
+	mov	r0, r5
+	bl	NandcXferData
+	ldr	r3, [fp]
+	mov	r0, r5
+	ldr	r1, [sp, #20]
+	add	r1, r1, r3
+	bl	FlashProgSecondCmd
+	mov	r0, r5
+	bl	NandcWaitFlashReady
+	ldr	r1, [sp, #20]
+	mov	r0, r5
+	bl	FlashReadStatus
+	lsls	r2, r0, #31
+	mov	r0, r5
+	itt	mi
+	movmi	r3, #-1
+	strmi	r3, [r6]
+	bl	NandcFlashDeCs
+	b	.L1533
+.L1544:
+	ldr	r3, [r4]
 	adds	r3, r3, #1
-	strh	r3, [r4, #8]	@ movhi
-	bl	FtlFreeSysBlkQueueOut
+	bne	.L1539
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1559+12
+	bl	printf
+.L1540:
+	add	r8, r8, #1
+	adds	r4, r4, #36
+.L1538:
+	cmp	r7, r8
+	bne	.L1544
+	b	.L1558
+.L1539:
+	sub	r3, r7, r8
+	ldr	fp, .L1559+32
+	uxtb	r3, r3
+	add	r2, sp, #20
+	ldr	r1, [sp, #8]
+	mov	r0, r4
+	str	r3, [sp]
+	add	r3, sp, #24
+	bl	LogAddr2PhyAddr
+	ldr	lr, [r10]
 	movs	r3, #0
-	strh	r0, [r5, #0]	@ movhi
-	strh	r3, [r4, #2]	@ movhi
-	strh	r3, [r4, #0]	@ movhi
-	ldr	r3, [r4, #28]
-	adds	r3, r3, #1
-	str	r3, [r4, #28]
-	b	.L1478
-.L1479:
-	ldrh	r5, [r5, r3, lsl #1]
-	movs	r1, #255
-	ldr	r2, .L1484+20
-	ldrh	r3, [r0, #2]
-	ldr	r7, .L1484+24
-	orr	r3, r3, r5, lsl #10
-	str	r3, [r2, #4]
-	ldr	r3, .L1484+28
-	ldr	r0, [r7, #0]
-	ldr	r3, [r3, #0]
-	str	r0, [r2, #8]
-	str	r3, [r2, #12]
-	ldr	r2, [r4, #28]
-	str	r2, [r3, #4]
-	movw	r2, #64245
-	strh	r2, [r3, #8]	@ movhi
-	ldrh	r2, [r4, #4]
-	strh	r5, [r3, #2]	@ movhi
-	strh	r2, [r3, #0]	@ movhi
-	ldr	r3, .L1484+32
-	ldrh	r2, [r3, #0]
-	lsls	r2, r2, #3
-	bl	memset
-	ldrh	r0, [r4, #6]
-	ldr	r1, [r7, #0]
-	mov	r2, r8
-	mov	r3, r6
-	b	.L1481
-.L1483:
-	ldr	r7, [r2], #4
-	cmp	r5, r7, lsr #10
-	bne	.L1482
-	adds	r3, r3, #1
-	uxth	r3, r3
-	str	r6, [r1, r3, lsl #3]
-	add	r7, r1, r3, lsl #3
-	ldr	lr, [r2, #-4]
-	str	lr, [r7, #4]
-.L1482:
-	adds	r6, r6, #1
-.L1481:
-	uxth	r7, r6
-	cmp	r7, r0
-	bcc	.L1483
+	ldr	ip, [fp]
+	mov	r6, r4
+	add	r5, sp, #28
+	str	r3, [lr]
+	str	r3, [ip]
+	ldmia	r6!, {r0, r1, r2, r3}
+	stmia	r5!, {r0, r1, r2, r3}
+	str	lr, [sp, #36]
+	ldmia	r6!, {r0, r1, r2, r3}
+	str	ip, [sp, #40]
+	stmia	r5!, {r0, r1, r2, r3}
 	movs	r1, #1
-	movs	r3, #0
-	ldr	r0, .L1484+20
-	mov	r2, r1
-	bl	FlashProgPages
-	ldrh	r3, [r4, #2]
-	mov	r0, r4
-	adds	r3, r3, #1
-	strh	r3, [r4, #2]	@ movhi
-	bl	ftl_map_blk_gc
-.L1478:
-	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, pc}
-.L1485:
+	ldr	r3, [r6]
+	add	r0, sp, #28
+	ldr	r2, [sp, #8]
+	str	r3, [r5]
+	bl	FlashReadPages
+	ldr	r5, [sp, #28]
+	adds	r3, r5, #1
+	bne	.L1541
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1559+16
+	bl	printf
+	str	r5, [r4]
+.L1541:
+	ldr	r3, [r4, #12]
+	cbz	r3, .L1542
+	ldr	r2, [r3]
+	ldr	r3, [fp]
+	ldr	r3, [r3]
+	cmp	r2, r3
+	beq	.L1542
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1559+20
+	bl	printf
+	mov	r3, #-1
+	str	r3, [r4]
+.L1542:
+	ldr	r3, [r4, #8]
+	cmp	r3, #0
+	beq	.L1540
+	ldr	r2, [r3]
+	ldr	r3, [r10]
+	ldr	r3, [r3]
+	cmp	r2, r3
+	beq	.L1540
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1559+24
+	bl	printf
+	mov	r3, #-1
+	str	r3, [r4]
+	b	.L1540
+.L1548:
+	mov	r8, #0
+	ldr	r10, .L1559+36
+	b	.L1538
+.L1560:
 	.align	2
-.L1484:
-	.word	.LANCHOR82
-	.word	.LANCHOR213
-	.word	.LC3
-	.word	.LC4
-	.word	.LC5
-	.word	.LANCHOR198
-	.word	.LANCHOR86
-	.word	.LANCHOR184
-	.word	.LANCHOR57
-	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
-	.section	.text.FtlMapWritePage,"ax",%progbits
+.L1559:
+	.word	.LANCHOR29
+	.word	.LANCHOR25
+	.word	.LANCHOR26
+	.word	.LC24
+	.word	.LC25
+	.word	.LC26
+	.word	.LC27
+	.word	.LANCHOR3
+	.word	.LANCHOR196
+	.word	.LANCHOR195
+	.size	FlashProgSlc2KPages, .-FlashProgSlc2KPages
+	.section	.text.FlashProgPages,"ax",%progbits
 	.align	1
-	.global	FtlMapWritePage
+	.global	FlashProgPages
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlMapWritePage, %function
-FtlMapWritePage:
-	@ args = 0, pretend = 0, frame = 8
+	.fpu softvfp
+	.type	FlashProgPages, %function
+FlashProgPages:
+	@ args = 0, pretend = 0, frame = 64
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1500
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #72
+	ldr	r5, .L1613
 	mov	r4, r0
-	ldr	r6, [r3, #0]
-	stmia	sp, {r1, r2}
-	cmp	r6, #0
-	bne	.L1487
-	ldr	r8, .L1500+32
-	ldr	sl, .L1500+36
-	ldr	r5, .L1500+4
-	ldr	fp, .L1500+40
-.L1499:
-	ldr	r3, [r8, #0]
-	ldrh	r2, [r4, #2]
-	adds	r3, r3, #1
-	str	r3, [r8, #0]
-	ldrh	r3, [sl, #0]
-	subs	r3, r3, #1
-	cmp	r2, r3
-	bge	.L1489
-	ldrh	r3, [r4, #0]
-	movw	r1, #65535
-	cmp	r3, r1
-	bne	.L1490
-.L1489:
-	mov	r0, r4
-	bl	Ftl_write_map_blk_to_last_page
-.L1490:
-	ldrh	r2, [r4, #0]
-	ldr	r3, [r4, #12]
-	ldrh	r3, [r3, r2, lsl #1]
-	cbnz	r3, .L1491
-	ldr	r1, .L1500+8
-	movw	r2, #731
-	ldr	r0, .L1500+12
-	bl	printf
-	ldr	r0, .L1500+16
-	ldr	r1, .L1500+20
-	bl	printf
-.L1491:
-	ldrh	r2, [r4, #0]
-	ldrh	r3, [r4, #10]
-	cmp	r2, r3
-	bcc	.L1492
-	ldr	r1, .L1500+8
-	mov	r2, #732
-	ldr	r0, .L1500+12
-	bl	printf
-	ldr	r0, .L1500+16
-	ldr	r1, .L1500+20
-	bl	printf
-.L1492:
-	ldrh	r2, [r4, #0]
-	movs	r1, #0
-	ldr	r3, [r4, #12]
-	ldr	r0, [fp, #0]
-	ldrh	r7, [r3, r2, lsl #1]
-	ldr	r2, [sp, #4]
-	ldrh	r3, [r4, #2]
-	str	r0, [r5, #12]
-	str	r2, [r5, #8]
-	movs	r2, #16
-	orr	r3, r3, r7, lsl #10
-	str	r3, [r5, #4]
-	bl	memset
-	ldr	r3, [r5, #12]
-	ldr	r2, [r4, #28]
-	ldr	r1, [sp, #0]
-	ldr	r0, .L1500+4
-	str	r2, [r3, #4]
-	ldrh	r2, [r4, #4]
-	strh	r1, [r3, #8]	@ movhi
-	movs	r1, #1
-	strh	r7, [r3, #2]	@ movhi
-	strh	r2, [r3, #0]	@ movhi
-	mov	r2, r1
-	mov	r3, r1
-	bl	FlashProgPages
-	ldrh	r2, [r4, #2]
-	ldr	r3, [r5, #0]
-	adds	r2, r2, #1
-	adds	r1, r3, #1
-	uxth	r2, r2
-	strh	r2, [r4, #2]	@ movhi
-	bne	.L1493
-	ldr	r0, .L1500+24
-	adds	r6, r6, #1
-	ldr	r1, [r5, #4]
-	bl	printf
-	ldrh	r3, [r4, #2]
-	uxth	r6, r6
-	cmp	r3, #2
-	bhi	.L1494
-	ldrh	r3, [sl, #0]
-	subs	r3, r3, #1
-	strh	r3, [r4, #2]	@ movhi
-.L1494:
-	cmp	r6, #3
-	bls	.L1499
-	ldr	r3, .L1500+4
-	mov	r2, r6
-	ldr	r0, .L1500+28
-	ldr	r1, [r3, #4]
-	bl	printf
-	ldr	r3, .L1500
-	movs	r2, #1
-	str	r2, [r3, #0]
-	b	.L1487
-.L1493:
-	cbz	r3, .L1496
-	strh	r7, [r4, #40]	@ movhi
-.L1496:
-	cmp	r2, #1
-	beq	.L1499
-	cmp	r3, #256
-	beq	.L1499
-	ldr	r3, .L1500+4
-	ldr	r1, [sp, #0]
-	ldr	r2, [r3, #4]
-	ldr	r3, [r4, #24]
-	str	r2, [r3, r1, lsl #2]
-.L1487:
+	mov	r8, r2
+	str	r1, [sp, #8]
+	ldr	r5, [r5]
+	str	r3, [sp, #20]
+	ldrb	r5, [r5, #19]	@ zero_extendqisi2
+	str	r5, [sp, #16]
+	ldr	r5, .L1613+4
+	ldrb	r7, [r5]	@ zero_extendqisi2
+	cbnz	r7, .L1562
+	ldr	r3, .L1613+8
+	ldrb	r3, [r3, #9]	@ zero_extendqisi2
+	str	r3, [sp, #12]
+.L1563:
+	ldr	r3, [sp, #8]
+	cmp	r7, r3
+	bcc	.L1576
+	ldr	r6, .L1613+12
+	movs	r5, #0
+	ldr	r7, .L1613+16
+.L1577:
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	cmp	r5, r3
+	bcc	.L1579
+	ldr	r3, [sp, #20]
+	cmp	r3, #0
+	bne	.L1580
+.L1588:
 	movs	r0, #0
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1501:
-	.align	2
-.L1500:
-	.word	.LANCHOR82
-	.word	.LANCHOR198
-	.word	.LANCHOR214
-	.word	.LC3
-	.word	.LC4
-	.word	.LC5
-	.word	.LC32
-	.word	.LC33
-	.word	.LANCHOR162
-	.word	.LANCHOR57
-	.word	.LANCHOR184
-	.size	FtlMapWritePage, .-FtlMapWritePage
-	.section	.text.FtlMapBlkWriteDumpData,"ax",%progbits
-	.align	1
-	.global	FtlMapBlkWriteDumpData
-	.thumb
-	.thumb_func
-	.type	FtlMapBlkWriteDumpData, %function
-FtlMapBlkWriteDumpData:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, [r0, #36]
-	push	{r4, r5, r6, r7, r8, lr}
-	mov	r4, r0
-	ldrh	r6, [r0, #6]
-	ldr	r8, [r0, #24]
+	b	.L1561
+.L1562:
+	bl	FlashProgSlc2KPages
+.L1561:
+	add	sp, sp, #72
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1576:
+	ldr	r3, [sp, #8]
+	movs	r6, #36
+	muls	r6, r7, r6
+	add	r2, sp, #28
+	mov	r1, r8
+	subs	r3, r3, r7
+	uxtb	r3, r3
+	add	fp, r4, r6
+	str	r3, [sp]
+	mov	r0, fp
+	add	r3, sp, #32
+	bl	LogAddr2PhyAddr
+	ldr	r3, .L1613+12
+	mov	r10, r0
+	ldr	r0, [sp, #32]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r0
+	bhi	.L1565
+	mov	r3, #-1
+	str	r3, [r4, r6]
+.L1566:
+	adds	r7, r7, #1
+	b	.L1563
+.L1565:
+	ldr	r3, .L1613+20
+	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1502
+	ldr	r3, .L1613+24
+	it	eq
+	moveq	r10, #0
+	add	r3, r3, r0, lsl #4
+	ldr	r3, [r3, #8]
+	cbz	r3, .L1568
+	uxtb	r0, r0
+	bl	FlashWaitCmdDone
+.L1568:
+	ldr	r3, [sp, #32]
+	movs	r1, #0
+	ldr	r2, .L1613+24
+	add	r2, r2, r3, lsl #4
+	str	r1, [r2, #12]
+	ldr	r1, [sp, #28]
+	str	fp, [r2, #8]
+	str	r1, [r2, #4]
+	cmp	r10, #0
+	beq	.L1569
+	add	r1, r6, #36
+	add	r1, r1, r4
+	str	r1, [r2, #12]
+.L1569:
+	ldr	r2, .L1613+28
+	ldrb	r5, [r2, r3]	@ zero_extendqisi2
+	lsls	r3, r3, #4
+	ldr	r2, .L1613+24
+	mov	r0, r5
+	strb	r5, [r2, r3]
+	ldr	r3, .L1613+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #1
+	bne	.L1570
+	bl	NandcWaitFlashReady
+.L1571:
+	ldr	r3, [sp, #16]
+	subs	r3, r3, #1
+	cmp	r3, #6
+	bhi	.L1572
+	ldr	r3, .L1613+32
+	ldrb	r3, [r3, r5]	@ zero_extendqisi2
+	cbz	r3, .L1572
+	ldr	r1, .L1613+36
 	movs	r3, #0
-	str	r3, [r0, #36]
-	ldr	r3, .L1508
-	ldr	r3, [r3, #0]
+	mov	r0, r5
+	adds	r2, r1, #4
+	ldrb	r1, [r1, #1]	@ zero_extendqisi2
+	bl	HynixSetRRPara
+.L1572:
+	mov	r0, r5
+	bl	NandcFlashCs
+	cmp	r8, #1
+	mov	r0, r5
+	bne	.L1573
+	ldr	r3, .L1613+16
+	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1502
-	ldr	r3, .L1508+4
-	ldr	r5, .L1508+8
-	ldr	r3, [r3, #0]
-	str	r3, [r5, #8]
-	ldr	r3, .L1508+12
-	ldr	r7, [r3, #0]
-	ldrh	r3, [r0, #2]
-	str	r7, [r5, #12]
-	cbz	r3, .L1504
-	ldr	r2, .L1508+16
-	ldrh	r2, [r2, #0]
-	subs	r2, r2, #1
-	cmp	r3, r2
-	bge	.L1504
-	ldrh	r2, [r0, #0]
-	movw	r1, #65535
-	cmp	r2, r1
-	beq	.L1504
-	ldr	r1, [r0, #12]
-	subs	r3, r3, #1
+	beq	.L1573
+	bl	flash_enter_slc_mode
+.L1574:
+	ldr	r1, [sp, #28]
 	mov	r0, r5
-	ldrh	r2, [r1, r2, lsl #1]
+	bl	FlashProgFirstCmd
+	ldr	r3, [fp, #12]
 	movs	r1, #1
-	orr	r3, r3, r2, lsl #10
-	mov	r2, r1
-	str	r3, [r5, #4]
-	bl	FlashReadPages
-	ldr	r3, [r5, #0]
-	adds	r3, r3, #1
-	beq	.L1504
-	ldr	r3, [r4, #24]
-	ldrh	r1, [r7, #8]
-	ldr	r2, [r3, r1, lsl #2]
-	ldr	r3, [r5, #4]
-	cmp	r2, r3
-	bne	.L1504
-	mov	r0, r4
-	b	.L1507
-.L1504:
-	subs	r6, r6, #1
-	ldr	r5, .L1508+8
-	uxth	r6, r6
-	ldr	r3, [r8, r6, lsl #2]
-	str	r3, [r5, #4]
-	cbz	r3, .L1505
+	ldr	r2, [sp, #12]
+	mov	r0, r5
+	str	r3, [sp]
+	ldr	r3, [fp, #8]
+	bl	NandcXferData
+	cmp	r10, #0
+	beq	.L1575
+	ldr	r1, [sp, #28]
+	mov	r0, r5
+	bl	FlashProgDpFirstCmd
+	ldr	r3, .L1613+40
+	mov	r0, r5
+	ldr	r2, [sp, #32]
+	adds	r6, r6, #36
+	ldr	r1, [sp, #28]
+	add	r6, r6, r4
+	ldr	r2, [r3, r2, lsl #2]
+	adds	r2, r2, #0
+	it	ne
+	movne	r2, #1
+	bl	FlashWaitReadyEN
+	ldr	r3, .L1613+44
+	mov	r0, r5
+	ldr	r1, [sp, #28]
+	ldr	r3, [r3]
+	add	r1, r1, r3
+	bl	FlashProgDpSecondCmd
+	ldr	r3, [r6, #12]
 	movs	r1, #1
+	ldr	r2, [sp, #12]
 	mov	r0, r5
-	mov	r2, r1
-	bl	FlashReadPages
-	b	.L1506
-.L1505:
-	ldr	r3, .L1508+20
-	movs	r1, #255
-	ldr	r0, [r5, #8]
-	ldrh	r2, [r3, #0]
-	bl	memset
-.L1506:
+	str	r3, [sp]
+	ldr	r3, [r6, #8]
+	bl	NandcXferData
+.L1575:
+	ldr	r1, [sp, #28]
+	mov	r0, r5
+	bl	FlashProgSecondCmd
+	mov	r0, r5
+	add	r7, r7, r10
+	bl	NandcFlashDeCs
+	b	.L1566
+.L1570:
+	bl	NandcFlashCs
+	ldr	r2, [sp, #32]
+	mov	r0, r5
+	ldr	r3, .L1613+40
+	ldr	r1, [sp, #28]
+	ldr	r2, [r3, r2, lsl #2]
+	adds	r2, r2, #0
+	it	ne
+	movne	r2, #1
+	bl	FlashWaitReadyEN
+	mov	r0, r5
+	bl	NandcFlashDeCs
+	b	.L1571
+.L1573:
+	bl	flash_exit_slc_mode
+	b	.L1574
+.L1579:
+	uxtb	r0, r5
+	bl	FlashWaitCmdDone
+	cmp	r8, #1
+	bne	.L1578
+	ldrb	r3, [r7]	@ zero_extendqisi2
+	cbz	r3, .L1578
+	ldr	r2, .L1613+24
+	lsls	r3, r5, #4
+	ldrb	r0, [r2, r3]	@ zero_extendqisi2
+	bl	flash_exit_slc_mode
+.L1578:
+	adds	r5, r5, #1
+	b	.L1577
+.L1580:
+	ldr	r10, .L1613+64
+	movs	r7, #0
+.L1581:
+	ldr	r3, [sp, #8]
+	cmp	r7, r3
+	beq	.L1588
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	bne	.L1582
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1613+48
+	bl	printf
+.L1583:
+	adds	r7, r7, #1
+	adds	r4, r4, #36
+	b	.L1581
+.L1582:
+	ldr	r3, [sp, #8]
+	add	r2, sp, #28
+	ldr	fp, .L1613+68
+	mov	r1, r8
 	mov	r0, r4
-	mov	r1, r6
-.L1507:
-	ldr	r2, [r5, #8]
-	pop	{r4, r5, r6, r7, r8, lr}
-	b	FtlMapWritePage
-.L1502:
-	pop	{r4, r5, r6, r7, r8, pc}
-.L1509:
-	.align	2
-.L1508:
-	.word	.LANCHOR82
-	.word	.LANCHOR180
-	.word	.LANCHOR198
-	.word	.LANCHOR184
-	.word	.LANCHOR57
-	.word	.LANCHOR61
-	.size	FtlMapBlkWriteDumpData, .-FtlMapBlkWriteDumpData
-	.section	.text.FtlVendorPartRead,"ax",%progbits
-	.align	1
-	.global	FtlVendorPartRead
-	.thumb
-	.thumb_func
-	.type	FtlVendorPartRead, %function
-FtlVendorPartRead:
-	@ args = 0, pretend = 0, frame = 56
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1521
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	fp, r2
-	ldrh	r6, [r3, #0]
-	adds	r2, r1, r0
-	ldr	r3, .L1521+4
-	sub	sp, sp, #56
-	mov	r7, r0
-	mov	r5, r1
-	ldrh	r3, [r3, #0]
-	cmp	r2, r3
-	bhi	.L1519
-	lsr	r6, r0, r6
-	ldr	r8, .L1521+28
-	lsls	r3, r6, #2
-	str	r3, [sp, #8]
+	mov	r6, r4
+	subs	r3, r3, r7
+	add	r5, sp, #36
+	uxtb	r3, r3
+	str	r3, [sp]
+	add	r3, sp, #32
+	bl	LogAddr2PhyAddr
+	ldr	lr, [r10]
 	movs	r3, #0
-	str	r3, [sp, #4]
-	b	.L1512
-.L1518:
-	ldr	r2, .L1521+8
-	mov	r0, r7
-	ldr	r3, [r2, #0]
-	ldr	r2, [sp, #8]
-	ldr	sl, [r3, r2]
-	ldr	r3, .L1521+12
-	ldrh	r4, [r3, #0]
-	mov	r1, r4
-	bl	__aeabi_uidivmod
-	uxth	r1, r1
-	str	r1, [sp, #12]
-	subs	r4, r4, r1
-	uxth	r4, r4
-	cmp	r4, r5
-	it	hi
-	uxthhi	r4, r5
-	cmp	sl, #0
-	beq	.L1514
-	ldr	r3, [r8, #0]
+	ldr	ip, [fp]
+	str	r3, [lr]
+	str	r3, [ip]
+	ldmia	r6!, {r0, r1, r2, r3}
+	stmia	r5!, {r0, r1, r2, r3}
+	str	lr, [sp, #44]
+	ldmia	r6!, {r0, r1, r2, r3}
+	str	ip, [sp, #48]
+	stmia	r5!, {r0, r1, r2, r3}
+	mov	r2, r8
+	ldr	r3, [r6]
 	movs	r1, #1
-	mov	r2, r1
-	add	r0, sp, #20
-	str	sl, [sp, #24]
-	str	r3, [sp, #28]
-	movs	r3, #0
-	str	r3, [sp, #32]
+	add	r0, sp, #36
+	str	r3, [r5]
 	bl	FlashReadPages
-	ldr	r3, [sp, #20]
-	ldr	r2, [sp, #4]
-	cmp	r3, #-1
-	it	eq
-	moveq	r2, #-1
-	str	r2, [sp, #4]
-	ldr	r2, .L1521+16
-	ldr	r3, [r2, #0]
-	cmp	r3, #256
-	bne	.L1516
-	mov	r1, r6
-	mov	r2, sl
-	ldr	r0, .L1521+20
+	ldr	r5, [sp, #36]
+	adds	r3, r5, #1
+	bne	.L1584
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1613+52
+	bl	printf
+	str	r5, [r4]
+.L1584:
+	ldr	r3, [r4, #12]
+	cbz	r3, .L1585
+	ldr	r2, [r3]
+	ldr	r3, [fp]
+	ldr	r3, [r3]
+	cmp	r2, r3
+	beq	.L1585
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1613+56
 	bl	printf
-	ldr	r0, .L1521+24
-	mov	r1, r6
-	ldr	r2, [r8, #0]
-	bl	FtlMapWritePage
-.L1516:
-	ldr	r3, [sp, #12]
-	mov	r0, fp
-	ldr	r1, [r8, #0]
-	lsls	r2, r4, #9
-	add	r1, r1, r3, lsl #9
-	bl	memcpy
-	b	.L1517
-.L1514:
-	mov	r0, fp
-	mov	r1, sl
-	lsls	r2, r4, #9
-	bl	memset
-.L1517:
-	ldr	r3, [sp, #8]
-	adds	r6, r6, #1
-	subs	r5, r5, r4
-	adds	r7, r7, r4
-	add	fp, fp, r4, lsl #9
-	adds	r3, r3, #4
-	str	r3, [sp, #8]
-.L1512:
-	cmp	r5, #0
-	bne	.L1518
-	b	.L1511
-.L1519:
 	mov	r3, #-1
-	str	r3, [sp, #4]
-.L1511:
-	ldr	r0, [sp, #4]
-	add	sp, sp, #56
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1522:
-	.align	2
-.L1521:
-	.word	.LANCHOR60
-	.word	.LANCHOR53
-	.word	.LANCHOR190
-	.word	.LANCHOR59
-	.word	.LANCHOR198
-	.word	.LC34
-	.word	.LANCHOR215
-	.word	.LANCHOR181
-	.size	FtlVendorPartRead, .-FtlVendorPartRead
-	.section	.text.Ftl_load_ext_data,"ax",%progbits
-	.align	1
-	.global	Ftl_load_ext_data
-	.thumb
-	.thumb_func
-	.type	Ftl_load_ext_data, %function
-Ftl_load_ext_data:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	movs	r0, #0
-	ldr	r4, .L1527
-	movs	r1, #1
-	ldr	r5, .L1527+4
-	mov	r2, r4
-	bl	FtlVendorPartRead
-	ldr	r3, [r4, #0]
-	cmp	r3, r5
-	beq	.L1524
-	mov	r0, r4
-	movs	r1, #0
-	mov	r2, #512
-	bl	memset
-	str	r5, [r4, #0]
-.L1524:
-	ldr	r2, [r4, #0]
-	ldr	r3, .L1527
-	cmp	r2, r5
-	bne	.L1525
-	ldr	r1, [r3, #88]
-	ldr	r2, .L1527+8
-	str	r1, [r2, #0]
-	ldr	r1, [r3, #92]
-	ldr	r2, .L1527+12
-	str	r1, [r2, #0]
-	ldr	r1, [r3, #8]
-	ldr	r2, .L1527+16
-	str	r1, [r2, #0]
-	ldr	r1, [r3, #12]
-	ldr	r2, .L1527+20
-	str	r1, [r2, #0]
-	ldr	r1, [r3, #16]
-	ldr	r2, .L1527+24
-	str	r1, [r2, #0]
-	ldr	r1, [r3, #20]
-	ldr	r2, .L1527+28
-	str	r1, [r2, #0]
-	ldr	r1, [r3, #28]
-	ldr	r2, .L1527+32
-	str	r1, [r2, #0]
-	ldr	r1, [r3, #32]
-	ldr	r2, .L1527+36
-	str	r1, [r2, #0]
-	ldr	r1, [r3, #36]
-	ldr	r2, .L1527+40
-	str	r1, [r2, #0]
-	ldr	r1, [r3, #40]
-	ldr	r2, .L1527+44
-	str	r1, [r2, #0]
-	ldr	r1, [r3, #44]
-	ldr	r2, .L1527+48
-	str	r1, [r2, #0]
-	ldr	r1, [r3, #48]
-	ldr	r2, .L1527+52
-	str	r1, [r2, #0]
-	ldr	r2, [r3, #60]
-	ldr	r3, .L1527+56
-	str	r2, [r3, #0]
-.L1525:
-	ldr	r3, .L1527+60
-	movs	r2, #0
-	str	r2, [r3, #0]
-	ldr	r3, .L1527
-	ldr	r2, [r3, #68]
-	ldr	r3, .L1527+64
+	str	r3, [r4]
+.L1585:
+	ldr	r3, [r4, #8]
+	cmp	r3, #0
+	beq	.L1583
+	ldr	r2, [r3]
+	ldr	r3, [r10]
+	ldr	r3, [r3]
 	cmp	r2, r3
-	bne	.L1526
-	ldr	r3, .L1527+68
-	movs	r2, #1
-	ldr	r0, .L1527+72
-	ldr	r1, .L1527+76
-	str	r2, [r3, #0]
+	beq	.L1583
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1613+60
 	bl	printf
-.L1526:
-	ldr	r3, .L1527+80
-	ldrh	r2, [r3, #0]
-	ldr	r3, .L1527+84
-	ldr	r0, [r3, #0]
-	ldr	r3, .L1527+32
-	ldr	r3, [r3, #0]
-	mla	r0, r0, r2, r3
-	ldr	r3, .L1527+88
-	ldrh	r1, [r3, #0]
-	bl	__aeabi_uidiv
-	ldr	r3, .L1527+92
-	str	r0, [r3, #0]
-	pop	{r3, r4, r5, pc}
-.L1528:
+	mov	r3, #-1
+	str	r3, [r4]
+	b	.L1583
+.L1614:
 	.align	2
-.L1527:
-	.word	.LANCHOR132
-	.word	1179929683
-	.word	.LANCHOR216
-	.word	.LANCHOR217
-	.word	.LANCHOR158
-	.word	.LANCHOR159
-	.word	.LANCHOR163
-	.word	.LANCHOR162
-	.word	.LANCHOR165
-	.word	.LANCHOR85
-	.word	.LANCHOR160
-	.word	.LANCHOR161
-	.word	.LANCHOR166
-	.word	.LANCHOR167
-	.word	.LANCHOR155
-	.word	.LANCHOR154
-	.word	305432421
-	.word	.LANCHOR116
-	.word	.LC4
-	.word	.LC35
-	.word	.LANCHOR51
-	.word	.LANCHOR164
-	.word	.LANCHOR43
-	.word	.LANCHOR211
-	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
-	.section	.text.FtlLoadEctTbl,"ax",%progbits
+.L1613:
+	.word	.LANCHOR18
+	.word	.LANCHOR1
+	.word	.LANCHOR29
+	.word	.LANCHOR25
+	.word	.LANCHOR8
+	.word	.LANCHOR27
+	.word	.LANCHOR23
+	.word	.LANCHOR26
+	.word	.LANCHOR21
+	.word	.LANCHOR20
+	.word	.LANCHOR17
+	.word	.LANCHOR3
+	.word	.LC24
+	.word	.LC25
+	.word	.LC26
+	.word	.LC27
+	.word	.LANCHOR195
+	.word	.LANCHOR196
+	.size	FlashProgPages, .-FlashProgPages
+	.section	.text.FlashTestBlk,"ax",%progbits
 	.align	1
-	.global	FtlLoadEctTbl
+	.global	FlashTestBlk
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlLoadEctTbl, %function
-FtlLoadEctTbl:
-	@ args = 0, pretend = 0, frame = 0
+	.fpu softvfp
+	.type	FlashTestBlk, %function
+FlashTestBlk:
+	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	movs	r0, #64
-	ldr	r4, .L1531
-	ldr	r5, .L1531+4
-	ldr	r2, [r4, #0]
-	ldrh	r1, [r5, #0]
-	bl	FtlVendorPartRead
-	ldr	r3, [r4, #0]
-	ldr	r2, [r3, #0]
-	ldr	r3, .L1531+8
-	cmp	r2, r3
-	beq	.L1530
-	ldr	r1, .L1531+12
-	ldr	r0, .L1531+16
-	bl	printf
-	ldrh	r2, [r5, #0]
-	ldr	r0, [r4, #0]
+	ldr	r3, .L1618
+	push	{r4, r5, lr}
+	mov	r4, r0
+	sub	sp, sp, #108
+	ldr	r3, [r3]
+	cmp	r0, r3
+	bcc	.L1617
+	ldr	r5, .L1618+4
+	add	r0, sp, #40
+	movs	r2, #32
+	movs	r1, #165
+	str	r0, [sp, #16]
+	lsls	r4, r4, #10
+	ldr	r3, [r5]
+	str	r3, [sp, #12]
+	bl	ftl_memset
+	movs	r2, #8
+	movs	r1, #90
+	ldr	r0, [r5]
+	bl	ftl_memset
+	movs	r2, #1
+	add	r0, sp, #4
+	mov	r1, r2
+	str	r4, [sp, #8]
+	bl	FlashEraseBlocks
+	movs	r3, #1
+	add	r0, sp, #4
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+	ldr	r4, [sp, #4]
+	movs	r2, #1
 	movs	r1, #0
-	lsls	r2, r2, #9
-	bl	memset
-.L1530:
-	movs	r0, #0
-	pop	{r3, r4, r5, pc}
-.L1532:
+	add	r0, sp, #4
+	adds	r4, r4, #0
+	it	ne
+	movne	r4, #1
+	negs	r4, r4
+	bl	FlashEraseBlocks
+.L1615:
+	mov	r0, r4
+	add	sp, sp, #108
+	@ sp needed
+	pop	{r4, r5, pc}
+.L1617:
+	movs	r4, #0
+	b	.L1615
+.L1619:
 	.align	2
-.L1531:
-	.word	.LANCHOR187
-	.word	.LANCHOR186
-	.word	1112818501
-	.word	.LC36
-	.word	.LC4
-	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
-	.section	.text.FtlVendorPartWrite,"ax",%progbits
+.L1618:
+	.word	.LANCHOR145
+	.word	.LANCHOR151
+	.size	FlashTestBlk, .-FlashTestBlk
+	.section	.text.FtlLowFormatEraseBlock,"ax",%progbits
 	.align	1
-	.global	FtlVendorPartWrite
+	.global	FtlLowFormatEraseBlock
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlVendorPartWrite, %function
-FtlVendorPartWrite:
-	@ args = 0, pretend = 0, frame = 56
+	.fpu softvfp
+	.type	FtlLowFormatEraseBlock, %function
+FtlLowFormatEraseBlock:
+	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1543
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	sub	sp, sp, #56
-	ldrh	sl, [r3, #0]
-	mov	r6, r0
-	ldr	r3, .L1543+4
-	mov	r4, r1
+	ldr	r3, .L1665
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #32
+	str	r0, [sp, #4]
+	ldr	r3, [r3]
+	str	r1, [sp]
+	cmp	r3, #0
+	bne	.L1647
+	ldr	r2, .L1665+4
+	mov	fp, r3
+	ldr	r7, .L1665+8
+	mov	r5, r3
+	mov	r4, r3
+	mov	r10, #36
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	ldr	r8, [r7]
 	str	r2, [sp, #8]
-	adds	r2, r1, r0
-	ldrh	r3, [r3, #0]
-	cmp	r2, r3
-	bhi	.L1541
-	lsr	sl, r0, sl
-	mov	fp, #0
-	ldr	r7, .L1543+8
-	lsl	r3, sl, #2
-	str	r3, [sp, #4]
-	b	.L1535
-.L1540:
-	ldr	r2, .L1543+12
-	mov	r0, r6
-	ldr	r3, [r2, #0]
-	ldr	r2, [sp, #4]
-	ldr	r3, [r3, r2]
-	ldr	r2, .L1543+16
-	ldrh	r8, [r2, #0]
-	str	r3, [sp, #0]
-	mov	r1, r8
-	bl	__aeabi_uidivmod
-	ldr	r3, [sp, #0]
-	uxth	r1, r1
-	str	r1, [sp, #12]
-	rsb	r5, r1, r8
-	uxth	r5, r5
-	cmp	r5, r4
-	it	hi
-	uxthhi	r5, r4
-	cbz	r3, .L1537
-	cmp	r5, r8
-	beq	.L1537
-	str	r3, [sp, #24]
-	movs	r1, #1
-	ldr	r3, [r7, #0]
-	add	r0, sp, #20
-	mov	r2, r1
-	str	r3, [sp, #28]
-	movs	r3, #0
-	str	r3, [sp, #32]
-	bl	FlashReadPages
-	b	.L1538
-.L1537:
-	ldr	r3, .L1543+20
-	movs	r1, #0
-	ldr	r0, [r7, #0]
-	ldrh	r2, [r3, #0]
-	bl	memset
-.L1538:
-	ldr	r3, [sp, #12]
-	lsl	r8, r5, #9
-	ldr	r0, [r7, #0]
-	mov	r2, r8
-	ldr	r1, [sp, #8]
-	subs	r4, r4, r5
-	add	r0, r0, r3, lsl #9
-	adds	r6, r6, r5
-	bl	memcpy
-	mov	r1, sl
-	ldr	r0, .L1543+24
-	add	sl, sl, #1
-	ldr	r2, [r7, #0]
-	bl	FtlMapWritePage
+	ldr	r2, .L1665+12
+	str	r0, [r2]
+	ldr	r2, .L1665+16
+	ldrh	r2, [r2]
+	str	r2, [sp, #20]
+	ldr	r2, .L1665+20
+	ldr	r2, [r2]
+	str	r2, [sp, #12]
+	ldr	r2, .L1665+24
+	ldrh	r2, [r2]
+	str	r2, [sp, #16]
+.L1622:
+	ldr	r3, [sp, #20]
+	uxth	r2, fp
+	cmp	r3, r2
+	bhi	.L1626
+	cmp	r5, #0
+	beq	.L1620
 	ldr	r3, [sp, #8]
-	add	r3, r3, r8
-	str	r3, [sp, #8]
-	ldr	r3, [sp, #4]
-	adds	r3, r3, #4
-	str	r3, [sp, #4]
-	cmp	r0, #-1
-	it	eq
-	moveq	fp, #-1
-.L1535:
-	cmp	r4, #0
-	bne	.L1540
-	b	.L1534
-.L1541:
-	mov	fp, #-1
-.L1534:
+	mov	r0, r8
+	mov	r10, #36
+	mov	r8, #0
+	mov	r2, r5
+	adds	r6, r3, #0
+	it	ne
+	movne	r6, #1
+	mov	r1, r6
+	bl	FlashEraseBlocks
+.L1628:
+	uxth	r3, r8
+	cmp	r5, r3
+	bhi	.L1630
+	ldr	r3, [sp]
+	cmp	r3, #0
+	bne	.L1631
+	uxth	r6, r6
+	mov	r10, #6
+	movs	r3, #1
+	str	r3, [sp, #8]
+.L1632:
+	movs	r7, #0
+.L1641:
+	ldr	r3, .L1665+16
+	mov	r8, #0
+	mov	r5, r8
+	ldrh	r3, [r3]
+	str	r3, [sp, #28]
+	ldr	r3, .L1665+8
+	ldr	fp, [r3]
+	ldr	r3, .L1665+28
+	ldr	r3, [r3]
+	str	r3, [sp, #16]
+	ldr	r3, .L1665+32
+	ldr	r3, [r3]
+	str	r3, [sp, #20]
+	ldr	r3, .L1665+24
+	ldrh	r3, [r3]
+	str	r3, [sp, #24]
+.L1633:
+	ldr	r3, [sp, #28]
+	uxth	r2, r8
+	cmp	r3, r2
+	bhi	.L1636
+	cbz	r5, .L1620
 	mov	r0, fp
-	add	sp, sp, #56
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1544:
-	.align	2
-.L1543:
-	.word	.LANCHOR60
-	.word	.LANCHOR53
-	.word	.LANCHOR181
-	.word	.LANCHOR190
-	.word	.LANCHOR59
-	.word	.LANCHOR61
-	.word	.LANCHOR215
-	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
-	.section	.text.Ftl_save_ext_data,"ax",%progbits
-	.align	1
-	.global	Ftl_save_ext_data
-	.thumb
-	.thumb_func
-	.type	Ftl_save_ext_data, %function
-Ftl_save_ext_data:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r2, .L1547
-	ldr	r3, .L1547+4
-	ldr	r1, [r2, #0]
-	cmp	r1, r3
-	bne	.L1545
-	ldr	r3, .L1547+8
-	movs	r0, #0
-	movs	r1, #1
-	str	r3, [r2, #4]
-	ldr	r3, .L1547+12
-	ldr	r3, [r3, #0]
-	str	r3, [r2, #88]
-	ldr	r3, .L1547+16
-	ldr	r3, [r3, #0]
-	str	r3, [r2, #92]
-	ldr	r3, .L1547+20
-	ldr	r3, [r3, #0]
-	str	r3, [r2, #8]
-	ldr	r3, .L1547+24
-	ldr	r3, [r3, #0]
-	str	r3, [r2, #12]
-	ldr	r3, .L1547+28
-	ldr	r3, [r3, #0]
-	str	r3, [r2, #16]
-	ldr	r3, .L1547+32
-	ldr	r3, [r3, #0]
-	str	r3, [r2, #20]
-	ldr	r3, .L1547+36
-	ldr	r3, [r3, #0]
-	str	r3, [r2, #28]
-	ldr	r3, .L1547+40
-	ldr	r3, [r3, #0]
-	str	r3, [r2, #32]
-	ldr	r3, .L1547+44
-	ldr	r3, [r3, #0]
-	str	r3, [r2, #36]
-	ldr	r3, .L1547+48
-	ldr	r3, [r3, #0]
-	str	r3, [r2, #40]
-	ldr	r3, .L1547+52
-	ldr	r3, [r3, #0]
-	str	r3, [r2, #44]
-	ldr	r3, .L1547+56
-	ldr	r3, [r3, #0]
-	str	r3, [r2, #48]
-	ldr	r3, .L1547+60
-	ldr	r3, [r3, #0]
-	str	r3, [r2, #60]
-	ldr	r3, .L1547+64
-	ldr	r3, [r3, #0]
-	str	r3, [r2, #64]
-	b	FtlVendorPartWrite
-.L1545:
-	bx	lr
-.L1548:
-	.align	2
-.L1547:
-	.word	.LANCHOR132
-	.word	1179929683
-	.word	1342177351
-	.word	.LANCHOR216
-	.word	.LANCHOR217
-	.word	.LANCHOR158
-	.word	.LANCHOR159
-	.word	.LANCHOR163
-	.word	.LANCHOR162
-	.word	.LANCHOR165
-	.word	.LANCHOR85
-	.word	.LANCHOR160
-	.word	.LANCHOR161
-	.word	.LANCHOR166
-	.word	.LANCHOR167
-	.word	.LANCHOR155
-	.word	.LANCHOR154
-	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
-	.section	.text.FtlEctTblFlush,"ax",%progbits
-	.align	1
-	.global	FtlEctTblFlush
-	.thumb
-	.thumb_func
-	.type	FtlEctTblFlush, %function
-FtlEctTblFlush:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	ldr	r3, .L1556
-	ldr	r3, [r3, #0]
-	cbz	r3, .L1554
-	ldr	r3, .L1556+4
-	ldr	r3, [r3, #0]
-	cmp	r3, #29
-	ite	ls
-	movls	r3, #4
-	movhi	r3, #32
-	b	.L1550
-.L1554:
-	movs	r3, #32
-.L1550:
-	ldr	r2, .L1556+8
-	ldrh	r1, [r2, #0]
-	cmp	r1, #31
-	bhi	.L1551
+	ldr	fp, .L1665+8
 	movs	r3, #1
-	adds	r1, r1, #1
-	strh	r1, [r2, #0]	@ movhi
-.L1551:
-	ldr	r2, .L1556+12
-	cbnz	r0, .L1552
-	ldr	r1, [r2, #0]
-	ldr	r0, [r1, #20]
-	ldr	r1, [r1, #16]
-	adds	r3, r3, r0
-	cmp	r1, r3
-	bcc	.L1553
-.L1552:
-	ldr	r2, [r2, #0]
-	movs	r0, #64
-	ldr	r3, [r2, #16]
-	str	r3, [r2, #20]
-	ldr	r3, .L1556+16
-	str	r3, [r2, #0]
-	ldr	r3, .L1556+20
-	ldrh	r1, [r3, #0]
-	lsls	r3, r1, #9
-	str	r3, [r2, #12]
-	ldr	r3, [r2, #8]
+	mov	r2, r6
+	mov	r1, r5
+	mov	r8, #0
+	bl	FlashProgPages
+	movs	r3, #36
+.L1638:
+	uxth	r2, r8
+	cmp	r5, r2
+	bhi	.L1640
+	add	r7, r7, r10
+	ldr	r3, [sp, #8]
+	uxth	r7, r7
+	cmp	r7, r3
+	bcc	.L1641
+	ldr	r8, .L1665+8
+	movs	r7, #0
+	mov	r10, #36
+.L1642:
+	uxth	r3, r7
+	cmp	r5, r3
+	bhi	.L1644
+	ldr	r3, [sp, #4]
+	cmp	r3, #63
+	bls	.L1645
+	ldr	r3, [sp]
+	cbz	r3, .L1620
+.L1645:
+	ldr	r3, .L1665+8
+	mov	r2, r5
+	mov	r1, r6
+	ldr	r0, [r3]
+	bl	FlashEraseBlocks
+.L1620:
+	mov	r0, r4
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1626:
+	mul	r2, r10, fp
+	movs	r3, #0
+	ldr	r1, [sp, #4]
+	str	r3, [r8, r2]
+	ldr	r3, .L1665+36
+	ldrb	r0, [r3, fp]	@ zero_extendqisi2
+	bl	V2P_block
+	ldr	r3, [sp]
+	mov	r6, r0
+	cbz	r3, .L1623
+	bl	IsBlkInVendorPart
+	cbnz	r0, .L1624
+.L1623:
+	mov	r0, r6
+	bl	FtlBbmIsBadBlock
+	cbnz	r0, .L1625
+	ldr	r3, [sp, #16]
+	mla	r1, r10, r5, r8
+	lsls	r6, r6, #10
+	mul	r2, r3, r5
+	ldr	r3, [sp, #12]
+	adds	r5, r5, #1
+	str	r6, [r1, #4]
+	uxth	r5, r5
+	str	r0, [r1, #8]
+	bic	r2, r2, #3
+	add	r2, r2, r3
+	str	r2, [r1, #12]
+.L1624:
+	add	fp, fp, #1
+	b	.L1622
+.L1625:
+	adds	r4, r4, #1
+	uxth	r4, r4
+	b	.L1624
+.L1630:
+	mul	r3, r10, r8
+	ldr	r2, [r7]
+	adds	r1, r2, r3
+	ldr	r3, [r2, r3]
 	adds	r3, r3, #1
-	str	r3, [r2, #8]
+	bne	.L1629
+	ldr	r0, [r1, #4]
+	adds	r4, r4, #1
+	uxth	r4, r4
+	ubfx	r0, r0, #10, #16
+	bl	FtlBbmMapBadBlock
+.L1629:
+	add	r8, r8, #1
+	b	.L1628
+.L1631:
+	ldr	r3, .L1665+40
+	ldrh	r3, [r3]
+	str	r3, [sp, #8]
+	ldr	r3, .L1665+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L1648
+	ldr	r3, [sp, #8]
+	movs	r6, #1
+	lsr	r10, r3, #2
+	b	.L1632
+.L1648:
+	movs	r6, #1
+	mov	r10, r6
+	b	.L1632
+.L1636:
+	movs	r3, #36
+	ldr	r1, [sp, #4]
+	mul	r2, r3, r8
 	movs	r3, #0
-	str	r3, [r2, #4]
-	bl	FtlVendorPartWrite
-	bl	Ftl_save_ext_data
-.L1553:
-	movs	r0, #0
-	pop	{r3, pc}
-.L1557:
+	str	r3, [fp, r2]
+	ldr	r3, .L1665+36
+	ldrb	r0, [r3, r8]	@ zero_extendqisi2
+	bl	V2P_block
+	ldr	r3, [sp]
+	str	r0, [sp, #12]
+	cbz	r3, .L1634
+	bl	IsBlkInVendorPart
+	cbnz	r0, .L1635
+.L1634:
+	ldr	r0, [sp, #12]
+	bl	FtlBbmIsBadBlock
+	cbnz	r0, .L1635
+	movs	r3, #36
+	mla	r1, r3, r5, fp
+	ldr	r3, [sp, #12]
+	add	r2, r7, r3, lsl #10
+	ldr	r3, [sp, #16]
+	str	r2, [r1, #4]
+	str	r3, [r1, #8]
+	ldr	r3, [sp, #24]
+	mul	r2, r3, r5
+	ldr	r3, [sp, #20]
+	adds	r5, r5, #1
+	uxth	r5, r5
+	bic	r2, r2, #3
+	add	r2, r2, r3
+	str	r2, [r1, #12]
+.L1635:
+	add	r8, r8, #1
+	b	.L1633
+.L1640:
+	mul	r2, r3, r8
+	ldr	r1, [fp]
+	add	ip, r1, r2
+	ldr	r2, [r1, r2]
+	cbz	r2, .L1639
+	ldr	r0, [ip, #4]
+	adds	r4, r4, #1
+	str	r3, [sp, #12]
+	uxth	r4, r4
+	ubfx	r0, r0, #10, #16
+	bl	FtlBbmMapBadBlock
+	ldr	r3, [sp, #12]
+.L1639:
+	add	r8, r8, #1
+	b	.L1638
+.L1644:
+	ldr	r3, [sp]
+	cbz	r3, .L1643
+	mul	r3, r10, r7
+	ldr	r2, [r8]
+	adds	r1, r2, r3
+	ldr	r3, [r2, r3]
+	cbnz	r3, .L1643
+	ldr	r0, [r1, #4]
+	movs	r1, #1
+	ubfx	r0, r0, #10, #16
+	bl	FtlFreeSysBlkQueueIn
+.L1643:
+	adds	r7, r7, #1
+	b	.L1642
+.L1647:
+	movs	r4, #0
+	b	.L1620
+.L1666:
 	.align	2
-.L1556:
-	.word	.LANCHOR116
-	.word	.LANCHOR167
-	.word	.LANCHOR218
-	.word	.LANCHOR187
-	.word	1112818501
+.L1665:
+	.word	.LANCHOR75
+	.word	.LANCHOR8
+	.word	.LANCHOR76
+	.word	.LANCHOR72
+	.word	.LANCHOR36
 	.word	.LANCHOR186
-	.size	FtlEctTblFlush, .-FtlEctTblFlush
-	.section	.text.flush_l2p_region,"ax",%progbits
+	.word	.LANCHOR57
+	.word	.LANCHOR183
+	.word	.LANCHOR184
+	.word	.LANCHOR45
+	.word	.LANCHOR52
+	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
+	.section	.text.FtlBbmTblFlush,"ax",%progbits
 	.align	1
-	.global	flush_l2p_region
+	.global	FtlBbmTblFlush
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	flush_l2p_region, %function
-flush_l2p_region:
-	@ args = 0, pretend = 0, frame = 0
+	.fpu softvfp
+	.type	FtlBbmTblFlush, %function
+FtlBbmTblFlush:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	movs	r4, #12
-	muls	r4, r0, r4
-	ldr	r5, .L1559
-	ldr	r0, .L1559+4
-	ldr	r2, [r5, #0]
-	adds	r3, r2, r4
-	ldrh	r1, [r2, r4]
-	ldr	r2, [r3, #8]
-	bl	FtlMapWritePage
-	ldr	r3, [r5, #0]
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r3, .L1678
+	ldr	r4, [r3]
+	str	r3, [sp, #12]
+	cmp	r4, #0
+	bne	.L1669
+	ldr	r3, .L1678+4
+	mov	r1, r4
+	ldr	r7, .L1678+8
+	ldr	r5, .L1678+12
+	ldr	r3, [r3]
+	ldr	r0, [r7]
+	mov	r8, r7
+	ldr	r6, .L1678+16
+	str	r3, [r5, #12]
+	ldr	r7, .L1678+20
+	ldr	r3, .L1678+24
+	ldr	r10, .L1678+56
+	str	r0, [r5, #8]
+	ldrh	r2, [r3]
+	bl	ftl_memset
+.L1670:
+	ldrh	r3, [r7]
+	cmp	r4, r3
+	blt	.L1671
+	ldr	r6, [r5, #12]
+	movs	r2, #16
+	ldr	r4, .L1678+28
+	movs	r1, #255
+	movs	r7, #0
+	mov	r0, r6
+	bl	ftl_memset
+	movw	r3, #61649
+	mov	r10, r4
+	strh	r3, [r6]	@ movhi
+	ldr	r3, [r4, #8]
+	str	r7, [sp, #8]
+	str	r3, [r6, #4]
+	ldrh	r3, [r4]
+	strh	r3, [r6, #2]	@ movhi
+	ldrh	r3, [r4, #4]
+	strh	r3, [r6, #8]	@ movhi
+	ldrh	r3, [r4, #6]
+	strh	r3, [r6, #10]	@ movhi
+	ldr	r3, .L1678+32
+	ldr	r3, [r3]
+	strh	r3, [r6, #12]	@ movhi
+.L1672:
+	ldr	r3, [r8]
+	mov	fp, #0
+	ldrh	r1, [r4]
+	ldrh	r2, [r4, #2]
+	str	r3, [r5, #8]
+	ldr	r3, .L1678+4
+	ldrh	r0, [r6, #10]
+	str	fp, [r5]
+	ldr	r3, [r3]
+	str	r3, [r5, #12]
+	orr	r3, r2, r1, lsl #10
+	str	r3, [r5, #4]
+	ldrh	r3, [r4, #4]
+	str	r0, [sp]
+	ldr	r0, .L1678+36
+	bl	printf
+	movs	r3, #1
+	ldr	r0, .L1678+12
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+	ldr	r3, .L1678+40
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3]
+	subs	r3, r3, #1
+	cmp	r2, r3
+	blt	.L1673
+	ldr	r3, [r4, #8]
+	ldrh	r2, [r4]
+	strh	fp, [r4, #2]	@ movhi
+	adds	r3, r3, #1
+	str	r3, [r4, #8]
+	str	r3, [r6, #4]
+	strh	r2, [r6, #8]	@ movhi
+	ldrh	r3, [r4, #4]
+	strh	r2, [r4, #4]	@ movhi
+	ldr	r2, .L1678+44
+	strh	r3, [r4]	@ movhi
+	lsls	r3, r3, #10
+	ldr	r0, [r2]
+	movs	r2, #1
+	str	r3, [r5, #4]
+	mov	r1, r2
+	str	r3, [r0, #4]
+	bl	FlashEraseBlocks
+	movs	r3, #1
+	ldr	r0, .L1678+12
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+.L1673:
+	ldrh	r3, [r10, #2]
+	adds	r3, r3, #1
+	strh	r3, [r10, #2]	@ movhi
+	ldr	r3, [r5]
+	adds	r3, r3, #1
+	bne	.L1674
+	adds	r7, r7, #1
+	ldr	r1, [r5, #4]
+	uxth	r7, r7
+	ldr	r0, .L1678+48
+	bl	printf
+	cmp	r7, #3
+	bls	.L1672
+	mov	r2, r7
+	ldr	r1, [r5, #4]
+	ldr	r0, .L1678+52
+	bl	printf
+	ldr	r2, [sp, #12]
+	movs	r3, #1
+	str	r3, [r2]
+.L1669:
 	movs	r0, #0
-	adds	r4, r3, r4
-	ldr	r3, [r4, #4]
-	bic	r3, r3, #-2147483648
-	str	r3, [r4, #4]
-	pop	{r3, r4, r5, pc}
-.L1560:
-	.align	2
-.L1559:
-	.word	.LANCHOR102
-	.word	.LANCHOR110
-	.size	flush_l2p_region, .-flush_l2p_region
-	.section	.text.l2p_flush,"ax",%progbits
-	.align	1
-	.global	l2p_flush
-	.thumb
-	.thumb_func
-	.type	l2p_flush, %function
-l2p_flush:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	movs	r4, #0
-	ldr	r7, .L1565
-	movs	r5, #12
-	ldr	r6, .L1565+4
-	b	.L1562
-.L1564:
-	ldr	r3, [r6, #0]
-	mla	r3, r5, r4, r3
-	ldr	r3, [r3, #4]
-	cmp	r3, #0
-	bge	.L1563
-	mov	r0, r4
-	bl	flush_l2p_region
-.L1563:
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1671:
+	ldrh	r2, [r10]
+	ldr	r3, [r5, #8]
+	ldr	r1, [r6, #4]!
+	mul	r0, r4, r2
+	lsls	r2, r2, #2
 	adds	r4, r4, #1
-	uxth	r4, r4
-.L1562:
-	ldrh	r3, [r7, #0]
-	cmp	r3, r4
-	bhi	.L1564
-	movs	r0, #0
-	pop	{r3, r4, r5, r6, r7, pc}
-.L1566:
+	add	r0, r3, r0, lsl #2
+	bl	ftl_memcpy
+	b	.L1670
+.L1674:
+	ldr	r3, [sp, #8]
+	cmp	r3, #0
+	bne	.L1669
+	movs	r3, #1
+	str	r3, [sp, #8]
+	b	.L1672
+.L1679:
 	.align	2
-.L1565:
-	.word	.LANCHOR71
-	.word	.LANCHOR102
-	.size	l2p_flush, .-l2p_flush
-	.section	.text.allocate_new_data_superblock,"ax",%progbits
+.L1678:
+	.word	.LANCHOR75
+	.word	.LANCHOR185
+	.word	.LANCHOR79
+	.word	.LANCHOR199
+	.word	.LANCHOR73+24
+	.word	.LANCHOR43
+	.word	.LANCHOR56
+	.word	.LANCHOR73
+	.word	.LANCHOR35
+	.word	.LC28
+	.word	.LANCHOR52
+	.word	.LANCHOR76
+	.word	.LC29
+	.word	.LC30
+	.word	.LANCHOR120
+	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
+	.section	.text.allocate_data_superblock,"ax",%progbits
 	.align	1
-	.global	allocate_new_data_superblock
+	.global	allocate_data_superblock
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	allocate_new_data_superblock, %function
-allocate_new_data_superblock:
-	@ args = 0, pretend = 0, frame = 0
+	.fpu softvfp
+	.type	allocate_data_superblock, %function
+allocate_data_superblock:
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1580
-	push	{r4, r5, r6, lr}
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-	ldrh	r5, [r0, #0]
-	ldrh	r3, [r3, #0]
-	cmp	r3, r5
-	bcs	.L1568
-	ldr	r1, .L1580+4
-	movw	r2, #2939
-	ldr	r0, .L1580+8
+	ldr	r3, .L1743
+	ldr	r3, [r3]
+	cmp	r3, #0
+	bne	.L1682
+	ldr	r7, .L1743+4
+.L1681:
+	ldr	r3, .L1743+4
+	ldr	r6, .L1743+8
+	ldrh	r3, [r3]
+	ldrh	r2, [r6]
+	add	r3, r3, r2
+	ldr	r2, .L1743+12
+	ldrh	r2, [r2]
+	cmp	r3, r2
+	ble	.L1683
+	ldr	r1, .L1743+16
+	movw	r2, #2818
+	ldr	r0, .L1743+20
 	bl	printf
-	ldr	r0, .L1580+12
-	ldr	r1, .L1580+16
+	ldr	r1, .L1743+24
+	ldr	r0, .L1743+28
 	bl	printf
-.L1568:
-	ldr	r3, .L1580+20
-	ldr	r3, [r3, #0]
-	cmp	r3, #0
-	bne	.L1569
-	movw	r3, #65535
-	cmp	r5, r3
-	beq	.L1570
-	ldr	r3, .L1580+24
-	mov	r0, r5
-	ldr	r3, [r3, #0]
-	ldrh	r3, [r3, r5, lsl #1]
-	cbz	r3, .L1571
-	bl	INSERT_DATA_LIST
-	b	.L1570
-.L1571:
-	bl	INSERT_FREE_LIST
-.L1570:
-	movs	r3, #0
-	strb	r3, [r4, #8]
-	ldr	r3, .L1580+28
+.L1683:
+	ldr	r3, .L1743+32
+	ldrb	r2, [r4, #8]	@ zero_extendqisi2
 	cmp	r4, r3
-	beq	.L1572
-	ldr	r3, .L1580+32
-	ldrh	r3, [r3, #0]
-	cmp	r3, #1
-	beq	.L1572
-	ldr	r2, .L1580+36
-	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	cbz	r2, .L1573
-.L1572:
-	movs	r3, #1
-	strb	r3, [r4, #8]
-	b	.L1574
-.L1573:
-	ldr	r2, .L1580+40
-	cmp	r4, r2
-	bne	.L1574
-	cmp	r3, #3
-	beq	.L1575
-	ldr	r3, .L1580+44
-	ldr	r3, [r3, #0]
+	bne	.L1684
+	ldr	r3, .L1743+36
+	ldrh	r5, [r7]
+	ldr	r3, [r3]
+	lsrs	r0, r5, #1
+	mul	ip, r3, r5
+	adds	r1, r0, #1
+	add	r1, r1, ip, lsr #2
+	ldr	ip, .L1743+48
+	uxth	r1, r1
+	ldr	ip, [ip]
+	cmp	ip, #0
+	beq	.L1685
+	ldr	ip, .L1743+52
+	ldr	ip, [ip]
+	cmp	ip, #29
+	bhi	.L1685
+	cmp	ip, #2
+	bls	.L1718
+	lsls	r5, r5, #31
+	bpl	.L1714
+	cmp	r3, #0
+	beq	.L1718
+.L1714:
+	mov	r1, r0
+	b	.L1685
+.L1684:
+	cmp	r2, #1
+	bne	.L1718
+	ldr	r3, .L1743+40
+	ldrh	r3, [r3]
 	cmp	r3, #1
-	bne	.L1576
-.L1575:
-	movs	r3, #1
-	strb	r3, [r2, #8]
-.L1576:
-	ldr	r3, .L1580+48
-	ldr	r3, [r3, #0]
-	cbz	r3, .L1574
-	ldr	r3, .L1580+52
-	ldr	r3, [r3, #0]
-	cmp	r3, #29
-	bhi	.L1574
-	ldr	r3, .L1580+40
-	movs	r2, #1
-	strb	r2, [r3, #8]
-.L1574:
-	ldr	r6, .L1580+56
-	movw	r3, #65535
-	ldrh	r0, [r6, #0]
-	cmp	r0, r3
-	beq	.L1577
-	cmp	r5, r0
-	bne	.L1578
-	ldr	r3, .L1580+24
-	ldr	r3, [r3, #0]
-	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L1579
-.L1578:
-	bl	update_vpc_list
-.L1579:
-	movw	r3, #65535
-	strh	r3, [r6, #0]	@ movhi
-.L1577:
+	beq	.L1718
+	ldr	r3, .L1743+44
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L1718
+	ldr	r0, .L1743+48
+	ldrh	r3, [r7]
+	ldr	r0, [r0]
+	lsrs	r1, r3, #3
+	cbz	r0, .L1685
+	ldr	r0, .L1743+52
+	ldr	r0, [r0]
+	cmp	r0, #1
+	bhi	.L1685
+	rsb	r3, r3, r3, lsl #3
+	ubfx	r1, r3, #3, #16
+.L1685:
+	cbz	r1, .L1686
+	subs	r1, r1, #1
+	uxth	r1, r1
+.L1686:
+	ldr	r0, .L1743+56
+	bl	List_pop_index_node
+	ldrh	r3, [r7]
+	mov	r5, r0
+	uxth	r8, r0
+	cbnz	r3, .L1687
+	ldr	r1, .L1743+16
+	movw	r2, #2838
+	ldr	r0, .L1743+20
+	bl	printf
+	ldr	r1, .L1743+24
+	ldr	r0, .L1743+28
+	bl	printf
+.L1687:
+	ldrh	r3, [r7]
 	mov	r0, r4
-	bl	allocate_data_superblock
-	bl	l2p_flush
-	movs	r0, #0
-	bl	FtlEctTblFlush
-	bl	FtlVpcTblFlush
-.L1569:
-	movs	r0, #0
-	pop	{r4, r5, r6, pc}
-.L1581:
-	.align	2
-.L1580:
-	.word	.LANCHOR43
-	.word	.LANCHOR219
-	.word	.LC3
-	.word	.LC4
-	.word	.LC5
-	.word	.LANCHOR82
-	.word	.LANCHOR89
-	.word	.LANCHOR98
-	.word	.LANCHOR47
-	.word	.LANCHOR7
-	.word	.LANCHOR97
-	.word	.LANCHOR155
-	.word	.LANCHOR116
-	.word	.LANCHOR167
-	.word	.LANCHOR126
-	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
-	.section	.text.FtlMapTblRecovery,"ax",%progbits
-	.align	1
-	.global	FtlMapTblRecovery
-	.thumb
-	.thumb_func
-	.type	FtlMapTblRecovery, %function
-FtlMapTblRecovery:
-	@ args = 0, pretend = 0, frame = 16
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r4, r0
-	sub	sp, sp, #24
-	ldr	fp, [r0, #24]
-	ldr	r3, [r4, #16]
+	subs	r3, r3, #1
+	strh	r3, [r7]	@ movhi
+	strh	r8, [r4]	@ movhi
+	bl	make_superblock
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	cbnz	r3, .L1688
+	ldr	r3, .L1743+60
+	uxth	r5, r5
+	movw	r2, #65535
+	ldr	r3, [r3]
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	ldrh	r2, [r6]
+	ldrh	r3, [r7]
+	add	r3, r3, r2
+	ldr	r2, .L1743+12
+	ldrh	r2, [r2]
+	cmp	r3, r2
+	ble	.L1681
+	movw	r2, #2850
+	ldr	r1, .L1743+16
+	ldr	r0, .L1743+20
+	bl	printf
+	ldr	r1, .L1743+24
+	ldr	r0, .L1743+28
+	bl	printf
+	b	.L1681
+.L1718:
 	movs	r1, #0
-	ldrh	sl, [r4, #6]
-	ldr	r0, [r0, #12]
-	str	r3, [sp, #20]
-	ldrh	r3, [r4, #8]
-	lsl	r2, sl, #2
-	str	r0, [sp, #12]
-	mov	r0, fp
-	ldr	r6, .L1619
-	str	r3, [sp, #16]
-	bl	memset
-	ldr	r1, .L1619+4
-	movs	r2, #0
-	mov	r8, r2
-	str	r2, [r4, #32]
-	str	r2, [r4, #28]
-	ldr	r3, [r1, #0]
-	str	r3, [r6, #8]
-	ldr	r3, .L1619+8
-	ldr	r5, [r3, #0]
-	movw	r3, #65535
-	str	r5, [r6, #12]
-	strh	r3, [r4, #0]	@ movhi
-	strh	r3, [r4, #2]	@ movhi
-	movs	r3, #1
-	str	r3, [r4, #36]
-	ldr	r3, [sp, #12]
-	mov	r7, r3
-	mov	r3, fp
-	mov	fp, sl
-	mov	sl, r4
-	b	.L1583
-.L1597:
-	ldr	r0, [sp, #16]
-	subs	r2, r0, #1
-	cmp	r8, r2
-	bne	.L1584
-	sxth	r6, r1
-	mov	r7, r1
-	ldr	r1, [sp, #12]
-	mov	r4, sl
-	mov	sl, fp
-	mov	fp, r3
-	add	r8, r1, r6, lsl #1
-	ldrh	r0, [r1, r6, lsl #1]
-	movs	r1, #1
-	bl	FtlGetLastWrittenPage
-	strh	r7, [r4, #0]	@ movhi
-	ldr	r7, .L1619
-	uxth	r3, r0
-	ldr	r0, [sp, #20]
-	adds	r2, r3, #1
-	strh	r2, [r4, #2]	@ movhi
-	sxth	r3, r3
-	ldr	r2, [r0, r6, lsl #2]
-	movs	r6, #0
-	str	r2, [r4, #28]
-	b	.L1585
-.L1588:
-	ldrh	r2, [r8, #0]
-	movs	r1, #1
-	ldr	r0, .L1619
-	orr	r2, r6, r2, lsl #10
-	str	r2, [r7, #4]
-	mov	r2, r1
-	str	r3, [sp, #8]
-	bl	FlashReadPages
-	ldr	r2, [r7, #0]
-	ldr	r3, [sp, #8]
-	adds	r2, r2, #1
-	beq	.L1586
-	ldrh	r2, [r5, #8]
-	cmp	r2, sl
-	bcs	.L1587
-	ldrh	r0, [r5, #0]
-	ldrh	r1, [r4, #4]
-	cmp	r0, r1
-	bne	.L1587
-	ldr	r1, [r7, #4]
-	str	r1, [fp, r2, lsl #2]
-	b	.L1587
-.L1586:
-	ldrh	r2, [r8, #0]
-	strh	r2, [r4, #40]	@ movhi
-.L1587:
-	adds	r6, r6, #1
-.L1585:
-	sxth	r2, r6
+	b	.L1686
+.L1688:
+	ldrh	r2, [r6]
+	ldrh	r3, [r7]
+	add	r3, r3, r2
+	ldr	r2, .L1743+12
+	ldrh	r2, [r2]
 	cmp	r3, r2
-	bge	.L1588
-	b	.L1589
-.L1584:
-	ldr	r1, .L1619+4
-	ldr	r0, .L1619+12
-	ldr	r2, [r1, #0]
-	ldrh	r1, [r7], #2
-	str	r2, [r6, #8]
-	ldrh	r2, [r0, #0]
-	ldr	r0, .L1619
-	subs	r2, r2, #1
-	orr	r2, r2, r1, lsl #10
-	movs	r1, #1
-	str	r2, [r6, #4]
-	mov	r2, r1
-	str	r3, [sp, #8]
-	bl	FlashReadPages
-	ldr	r2, [r6, #0]
-	ldr	r3, [sp, #8]
-	adds	r2, r2, #1
-	beq	.L1610
-	ldrh	r1, [r5, #0]
-	ldrh	r2, [sl, #4]
-	cmp	r1, r2
-	bne	.L1610
-	ldrh	r2, [r5, #8]
-	movw	r1, #64245
-	cmp	r2, r1
-	bne	.L1610
-	ldr	r2, .L1619+12
+	ble	.L1690
+	ldr	r1, .L1743+16
+	movw	r2, #2853
+	ldr	r0, .L1743+20
+	bl	printf
+	ldr	r1, .L1743+24
+	ldr	r0, .L1743+28
+	bl	printf
+.L1690:
+	ldr	r2, .L1743+64
+	movs	r6, #0
+	ldr	fp, .L1743+100
+	add	ip, r4, #16
+	mov	lr, r6
+	movw	r10, #65535
+	ldrh	r1, [r2]
+	movs	r2, #36
+	ldr	r0, [fp]
+	str	r2, [sp, #4]
+	mov	r3, r0
+	mla	r1, r2, r1, r0
+	str	r1, [sp]
+.L1691:
+	ldr	r2, [sp]
+	cmp	r2, r3
+	bne	.L1693
+	cbnz	r6, .L1694
+	ldr	r1, .L1743+16
+	movw	r2, #2865
+	ldr	r0, .L1743+20
+	bl	printf
+	ldr	r1, .L1743+24
+	ldr	r0, .L1743+28
+	bl	printf
+.L1694:
+	ldr	r3, .L1743+48
+	uxth	r5, r5
+	ldr	r10, .L1743+104
+	ldr	r3, [r3]
+	cbz	r3, .L1695
+	ldr	r3, .L1743+68
+	cmp	r4, r3
+	bne	.L1695
+	ldr	r3, [r10]
+	ldrh	r3, [r3, r5, lsl #1]
+	cmp	r3, #30
+	itt	hi
+	movhi	r3, #0
+	strbhi	r3, [r4, #8]
+.L1695:
+	ldr	r3, .L1743+72
+	ldrh	r3, [r3]
+	cmp	r3, r8
+	bne	.L1696
+	ldr	r1, .L1743+16
+	movw	r2, #2872
+	ldr	r0, .L1743+20
+	bl	printf
+	ldr	r1, .L1743+24
+	ldr	r0, .L1743+28
+	bl	printf
+.L1696:
+	ldrb	r1, [r4, #8]	@ zero_extendqisi2
+	ldr	r2, .L1743+76
+	ldr	r3, .L1743+80
+	cmp	r1, #0
+	bne	.L1697
+	ldr	r0, [r10]
+	ldrh	lr, [r0, r5, lsl #1]
+	cmp	lr, #0
+	beq	.L1698
+	ldr	r1, .L1743+84
+	ldrh	ip, [r1]
+	add	r1, lr, ip
+.L1741:
+	strh	r1, [r0, r5, lsl #1]	@ movhi
+	mov	r0, r8
+	ldr	r1, [r2]
+	str	r3, [sp, #4]
+	str	r2, [sp]
+	adds	r1, r1, #1
+	str	r1, [r2]
 	movs	r1, #0
-	ldr	r0, .L1619+4
-	mov	lr, r3
-	ldrh	r4, [r2, #0]
-	ldr	r2, [r0, #0]
-	subs	r4, r4, #1
-	b	.L1591
-.L1593:
-	ldrh	r0, [r2, #0]
-	cmp	r0, fp
-	itt	cc
-	ldrcc	r3, [r2, #4]
-	strcc	r3, [lr, r0, lsl #2]
+	bl	ftl_set_blk_mode
+	ldm	sp, {r2, r3}
+.L1700:
+	lsls	r1, r5, #1
+	ldr	r3, [r3]
+	ldr	r2, [r2]
+	str	r1, [sp]
+	ldr	r1, [r10]
+	ldrh	ip, [r1, r5, lsl #1]
+	ldr	r1, .L1743+88
+	ldr	r0, [r1]
+	cmp	ip, r0
+	it	hi
+	strhi	ip, [r1]
+	ldr	r1, .L1743+84
+	ldrh	r0, [r1]
+	ldr	r1, .L1743+12
+	mla	r0, r2, r0, r3
+	ldrh	r1, [r1]
+	bl	__aeabi_uidiv
+	ldr	r3, .L1743+92
+	ldr	ip, .L1743+108
+	str	r0, [r3]
+	ldr	r3, .L1743+96
+	ldr	r0, [fp]
+	ldr	r2, [r3]
+	adds	r1, r0, #4
+	ldr	r3, [r2, #16]
+	adds	r3, r3, #1
+	str	r3, [r2, #16]
+	movs	r3, #36
+	mla	r3, r3, r6, r0
+	adds	r3, r3, #40
+.L1702:
+	adds	r1, r1, #36
+	cmp	r3, r1
+	bne	.L1703
+	ldr	r3, .L1743+44
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L1704
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	mov	r2, r6
+	cmp	r3, #1
+	ite	eq
+	moveq	r1, #0
+	movne	r1, #1
+	bl	FlashEraseBlocks
+.L1704:
+	ldrb	r1, [r4, #8]	@ zero_extendqisi2
+	mov	r2, r6
+	ldr	r0, [fp]
+	mov	r10, #0
+	bl	FlashEraseBlocks
+	mov	r3, r10
+	movs	r1, #36
+.L1706:
+	uxth	r2, r10
+	cmp	r6, r2
+	bhi	.L1708
+	cbz	r3, .L1709
+	mov	r0, r8
+	bl	update_multiplier_value
+	bl	FtlBbmTblFlush
+.L1709:
+	ldrb	r2, [r4, #7]	@ zero_extendqisi2
+	ldr	r1, .L1743+60
+	cmp	r2, #0
+	bne	.L1710
+	ldr	r3, [r1]
+	movw	r2, #65535
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	b	.L1681
+.L1744:
+	.align	2
+.L1743:
+	.word	.LANCHOR75
+	.word	.LANCHOR87
+	.word	.LANCHOR84
+	.word	.LANCHOR38
+	.word	.LANCHOR200
+	.word	.LC4
+	.word	.LC5
+	.word	.LC6
+	.word	.LANCHOR92
+	.word	.LANCHOR170
+	.word	.LANCHOR42
+	.word	.LANCHOR8
+	.word	.LANCHOR101
+	.word	.LANCHOR168
+	.word	.LANCHOR86
+	.word	.LANCHOR82
+	.word	.LANCHOR36
+	.word	.LANCHOR90
+	.word	.LANCHOR201
+	.word	.LANCHOR165
+	.word	.LANCHOR166
+	.word	.LANCHOR46
+	.word	.LANCHOR167
+	.word	.LANCHOR202
+	.word	.LANCHOR188
+	.word	.LANCHOR76
+	.word	.LANCHOR77
+	.word	-1024
+.L1693:
+	ldrh	r1, [ip], #2
+	str	lr, [r3, #8]
+	str	lr, [r3, #12]
+	cmp	r1, r10
+	beq	.L1692
+	ldr	r2, [sp, #4]
+	lsls	r1, r1, #10
+	mla	r2, r2, r6, r0
+	adds	r6, r6, #1
+	uxth	r6, r6
+	str	r1, [r2, #4]
+.L1692:
+	adds	r3, r3, #36
+	b	.L1691
+.L1698:
+	movs	r1, #2
+	b	.L1741
+.L1697:
+	ldr	r0, [r10]
+	str	r2, [sp, #4]
+	str	r3, [sp]
+	ldrh	r1, [r0, r5, lsl #1]
 	adds	r1, r1, #1
-	adds	r2, r2, #8
-.L1591:
-	cmp	r1, r4
-	blt	.L1593
-	mov	r3, lr
-	b	.L1594
-.L1596:
-	ldrh	r2, [r7, #-2]
-	movs	r1, #1
-	ldr	r0, .L1619
-	orr	r2, r4, r2, lsl #10
-	str	r2, [r6, #4]
-	mov	r2, r1
-	str	ip, [sp, #8]
-	bl	FlashReadPages
-	ldr	r2, [r6, #0]
-	ldr	ip, [sp, #8]
-	adds	r2, r2, #1
-	beq	.L1595
-	ldrh	r2, [r5, #8]
-	cmp	r2, fp
-	bcs	.L1595
-	ldrh	r1, [sl, #4]
-	ldrh	r0, [r5, #0]
-	cmp	r0, r1
-	itt	eq
-	ldreq	r1, [r6, #4]
-	streq	r1, [r8, r2, lsl #2]
-.L1595:
-	adds	r4, r4, #1
-	b	.L1614
-.L1610:
-	mov	ip, r8
-	movs	r4, #0
-	mov	r8, r3
-.L1614:
-	ldr	r1, .L1619+12
-	ldrh	r2, [r1, #0]
-	cmp	r4, r2
-	blt	.L1596
-	mov	r3, r8
-	mov	r8, ip
-.L1594:
-	add	r8, r8, #1
-.L1583:
-	ldr	r2, [sp, #16]
-	uxth	r1, r8
-	cmp	r8, r2
-	blt	.L1597
-	mov	r4, sl
-.L1589:
-	ldr	r3, .L1619+16
-	cmp	r4, r3
-	bne	.L1598
-	ldr	r3, .L1619+20
-	ldrh	r3, [r3, #0]
-	cmp	r3, #0
-	bne	.L1611
-	b	.L1598
-.L1605:
-	ldr	r3, [r8, #0]
-	lsls	r4, r7, #2
-	ldr	r3, [r3, r7, lsl #2]
-	subs	r2, r3, #1
-	adds	r2, r2, #3
-	bhi	.L1600
-	ldr	r2, [r6, #0]
-	ldr	r2, [r2, r7, lsl #2]
-	cmp	r3, r2
-	beq	.L1600
-	ldr	r0, .L1619+4
-	movs	r1, #1
-	str	r3, [sl, #4]
-	ldr	r2, [r0, #0]
-	ldr	r0, .L1619
-	str	r2, [sl, #8]
-	ldr	r2, .L1619+8
-	ldr	r5, [r2, #0]
-	mov	r2, r1
-	str	r5, [sl, #12]
-	bl	FlashReadPages
-	ldr	r3, [sl, #0]
+	strh	r1, [r0, r5, lsl #1]	@ movhi
+	mov	r0, r8
+	ldr	r1, [r3]
+	adds	r1, r1, #1
+	str	r1, [r3]
+	bl	ftl_set_blk_mode.part.9
+	ldr	r2, [sp, #4]
+	ldr	r3, [sp]
+	b	.L1700
+.L1703:
+	ldr	r2, [r1, #-36]
+	and	r2, r2, ip
+	str	r2, [r1, #-36]
+	b	.L1702
+.L1708:
+	ldr	r0, .L1745
+	mul	r2, r1, r10
+	ldr	r0, [r0]
+	add	ip, r0, r2
+	ldr	r2, [r0, r2]
+	adds	r0, r2, #1
+	bne	.L1707
+	ldr	r0, [ip, #4]
 	adds	r3, r3, #1
-	beq	.L1613
-	ldr	r3, .L1619+16
-	ldrh	r2, [r5, #0]
-	ldrh	r3, [r3, #4]
-	cmp	r2, r3
-	bne	.L1613
-	ldr	fp, [r5, #4]
-	b	.L1601
-.L1613:
-	mov	fp, #0
-.L1601:
-	ldr	r3, [r6, #0]
-	movs	r1, #1
-	mov	r2, r1
-	ldr	r0, .L1619
-	ldr	r3, [r3, r4]
-	str	r3, [sl, #4]
-	bl	FlashReadPages
-	ldr	r1, [r5, #4]
-	cmp	fp, r1
-	bls	.L1600
-	ldr	r2, [r8, #0]
-	ldr	r3, [r6, #0]
-	ldr	r0, .L1619+24
-	str	r1, [sp, #0]
-	ldr	r1, [r2, r4]
-	ldr	r2, [r3, r4]
-	mov	r3, fp
-	bl	printf
-	ldr	r3, [r8, #0]
-	ldr	r2, [r6, #0]
-	ldr	r1, [r3, r4]
-	str	r1, [r2, r4]
-	movs	r2, #0
-	ldr	r0, [r3, r4]
-	ldr	r3, .L1619+28
+	str	r1, [sp, #12]
+	str	r2, [sp, #8]
 	ubfx	r0, r0, #10, #16
+	str	r3, [sp, #4]
+	bl	FtlBbmMapBadBlock
+	ldr	r2, [sp, #8]
+	add	r0, r4, r10, lsl #1
 	ldr	r1, [sp, #12]
-	ldrh	r3, [r3, #0]
-	b	.L1602
-.L1603:
-	ldrh	r4, [r1], #2
-	adds	r2, r2, #1
-	cmp	r4, r0
-	beq	.L1600
-.L1602:
-	cmp	r2, r3
-	blt	.L1603
-	b	.L1617
-.L1618:
-	ldr	r1, [sp, #12]
-	strh	r0, [r1, r3, lsl #1]	@ movhi
-	ldr	r3, .L1619+28
-	ldrh	r2, [r3, #0]
+	ldr	r3, [sp, #4]
+	strh	r2, [r0, #16]	@ movhi
+	ldrb	r2, [r4, #7]	@ zero_extendqisi2
+	subs	r2, r2, #1
+	strb	r2, [r4, #7]
+.L1707:
+	add	r10, r10, #1
+	b	.L1706
+.L1710:
+	ldr	r3, .L1745+4
+	ldr	r0, .L1745+8
+	ldrh	r3, [r3]
+	strh	r8, [r4]	@ movhi
+	smulbb	r3, r3, r2
+	movs	r2, #0
+	strh	r2, [r4, #2]	@ movhi
+	strb	r2, [r4, #6]
+	ldr	r2, [r0]
+	uxth	r3, r3
+	strh	r3, [r4, #4]	@ movhi
+	str	r2, [r4, #12]
 	adds	r2, r2, #1
-	strh	r2, [r3, #0]	@ movhi
-	bl	remove_from_free_sys_Queue
-.L1600:
-	adds	r7, r7, #1
-	b	.L1599
-.L1620:
+	str	r2, [r0]
+	ldr	r2, [r1]
+	ldr	r1, [sp]
+	strh	r3, [r2, r1]	@ movhi
+	ldrh	r3, [r4, #4]
+	cbz	r3, .L1711
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	cbnz	r3, .L1682
+.L1711:
+	ldr	r1, .L1745+12
+	movw	r2, #2931
+	ldr	r0, .L1745+16
+	bl	printf
+	ldr	r1, .L1745+20
+	ldr	r0, .L1745+24
+	bl	printf
+.L1682:
+	movs	r0, #0
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1746:
 	.align	2
-.L1619:
-	.word	.LANCHOR198
-	.word	.LANCHOR86
-	.word	.LANCHOR184
-	.word	.LANCHOR57
-	.word	.LANCHOR110
-	.word	.LANCHOR73
-	.word	.LC37
-	.word	.LANCHOR111
-.L1611:
-	ldr	r8, .L1621+16
-	movs	r7, #0
-	ldr	r6, .L1621
-	ldr	sl, .L1621+20
-	str	r4, [sp, #16]
-.L1599:
-	ldr	r2, .L1621+4
-	ldrh	r3, [r2, #0]
-	cmp	r7, r3
-	bcc	.L1605
-	ldr	r4, [sp, #16]
-.L1598:
-	mov	r0, r4
-	bl	ftl_free_no_use_map_blk
-	ldr	r3, .L1621+8
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r3, #0]
-	cmp	r2, r3
-	bne	.L1606
-	mov	r0, r4
-	bl	ftl_map_blk_alloc_new_blk
-.L1606:
-	mov	r0, r4
-	bl	ftl_map_blk_gc
-	mov	r0, r4
-	bl	ftl_map_blk_gc
-	movs	r0, #0
-	add	sp, sp, #24
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1617:
-	ldr	r2, .L1621+12
-	ldr	r2, [r2, #0]
-	cmp	r3, r2
-	bcs	.L1600
-	b	.L1618
-.L1622:
-	.align	2
-.L1621:
-	.word	.LANCHOR114
-	.word	.LANCHOR70
-	.word	.LANCHOR57
-	.word	.LANCHOR68
-	.word	.LANCHOR191
-	.word	.LANCHOR198
-	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
-	.section	.text.FtlLoadMapInfo,"ax",%progbits
-	.align	1
-	.global	FtlLoadMapInfo
-	.thumb
-	.thumb_func
-	.type	FtlLoadMapInfo, %function
-FtlLoadMapInfo:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	bl	FtlL2PDataInit
-	ldr	r0, .L1624
-	bl	FtlMapTblRecovery
-	movs	r0, #0
-	pop	{r3, pc}
-.L1625:
-	.align	2
-.L1624:
-	.word	.LANCHOR110
-	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
-	.section	.text.FtlLoadVonderInfo,"ax",%progbits
+.L1745:
+	.word	.LANCHOR76
+	.word	.LANCHOR51
+	.word	.LANCHOR157
+	.word	.LANCHOR200
+	.word	.LC4
+	.word	.LC5
+	.word	.LC6
+	.size	allocate_data_superblock, .-allocate_data_superblock
+	.section	.text.FtlGcFreeBadSuperBlk,"ax",%progbits
 	.align	1
-	.global	FtlLoadVonderInfo
+	.global	FtlGcFreeBadSuperBlk
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlLoadVonderInfo, %function
-FtlLoadVonderInfo:
-	@ args = 0, pretend = 0, frame = 0
+	.fpu softvfp
+	.type	FtlGcFreeBadSuperBlk, %function
+FtlGcFreeBadSuperBlk:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	ldr	r3, .L1627
-	ldr	r0, .L1627+4
-	ldrh	r3, [r3, #0]
-	strh	r3, [r0, #10]	@ movhi
-	movw	r3, #61574
-	strh	r3, [r0, #4]	@ movhi
-	ldr	r3, .L1627+8
-	ldrh	r3, [r3, #0]
-	strh	r3, [r0, #8]	@ movhi
-	ldr	r3, .L1627+12
-	ldrh	r3, [r3, #0]
-	strh	r3, [r0, #6]	@ movhi
-	ldr	r3, .L1627+16
-	ldr	r3, [r3, #0]
-	str	r3, [r0, #12]
-	ldr	r3, .L1627+20
-	ldr	r3, [r3, #0]
-	str	r3, [r0, #16]
-	ldr	r3, .L1627+24
-	ldr	r3, [r3, #0]
-	str	r3, [r0, #20]
-	ldr	r3, .L1627+28
-	ldr	r3, [r3, #0]
-	str	r3, [r0, #24]
-	movw	r3, #65535
-	strh	r3, [r0, #40]	@ movhi
-	bl	FtlMapTblRecovery
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r10, r0
+	ldr	r4, .L1759
+	ldrh	r3, [r4]
+	cbz	r3, .L1748
+	ldr	r8, .L1759+12
+	movs	r7, #0
+.L1749:
+	ldr	r3, .L1759+4
+	ldrh	r2, [r3]
+	uxth	r3, r7
+	cmp	r2, r3
+	bhi	.L1755
+	bl	FtlGcReFreshBadBlk
+.L1748:
 	movs	r0, #0
-	pop	{r3, pc}
-.L1628:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1755:
+	ldr	r2, .L1759+8
+	uxth	r3, r7
+	mov	r1, r10
+	mov	fp, #0
+	ldrb	r0, [r2, r3]	@ zero_extendqisi2
+	bl	V2P_block
+	mov	r1, r0
+.L1750:
+	ldrh	r3, [r4]
+	uxth	r5, fp
+	cmp	r3, r5
+	bhi	.L1754
+	adds	r7, r7, #1
+	b	.L1749
+.L1754:
+	uxth	r6, fp
+	ldrh	r3, [r8, r6, lsl #1]
+	cmp	r3, r1
+	bne	.L1751
+	mov	r0, r1
+	str	r1, [sp, #4]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	ldrh	r2, [r4]
+	add	r3, r8, r6, lsl #1
+	ldr	r1, [sp, #4]
+.L1752:
+	cmp	r5, r2
+	bcc	.L1753
+	subs	r2, r2, #1
+	strh	r2, [r4]	@ movhi
+.L1751:
+	add	fp, fp, #1
+	b	.L1750
+.L1753:
+	ldrh	r0, [r3, #2]!
+	adds	r5, r5, #1
+	uxth	r5, r5
+	strh	r0, [r3, #-2]	@ movhi
+	b	.L1752
+.L1760:
 	.align	2
-.L1627:
-	.word	.LANCHOR65
-	.word	.LANCHOR215
-	.word	.LANCHOR74
-	.word	.LANCHOR66
-	.word	.LANCHOR75
-	.word	.LANCHOR189
-	.word	.LANCHOR188
-	.word	.LANCHOR190
-	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
-	.section	.text.load_l2p_region,"ax",%progbits
+.L1759:
+	.word	.LANCHOR114
+	.word	.LANCHOR36
+	.word	.LANCHOR45
+	.word	.LANCHOR115
+	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
+	.section	.text.update_vpc_list,"ax",%progbits
 	.align	1
-	.global	load_l2p_region
+	.global	update_vpc_list
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	load_l2p_region, %function
-load_l2p_region:
+	.fpu softvfp
+	.type	update_vpc_list, %function
+update_vpc_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, r8, sl, lr}
+	push	{r3, r4, r5, lr}
 	mov	r4, r0
-	ldr	r3, .L1635
-	mov	r7, r1
-	ldrh	r3, [r3, #0]
-	cmp	r3, r0
-	bcs	.L1630
-	ldr	r1, .L1635+4
-	movw	r2, #503
-	ldr	r0, .L1635+8
-	bl	printf
-	ldr	r0, .L1635+12
-	ldr	r1, .L1635+16
-	bl	printf
-.L1630:
-	ldr	r3, .L1635+20
-	ldr	r8, .L1635+44
-	ldr	r3, [r3, #0]
-	ldr	r6, [r3, r4, lsl #2]
-	movs	r3, #12
-	cbnz	r6, .L1631
-	muls	r7, r3, r7
-	ldr	r3, [r8, #0]
-	movs	r1, #255
-	adds	r3, r3, r7
-	ldr	r0, [r3, #8]
-	ldr	r3, .L1635+24
-	ldrh	r2, [r3, #0]
-	bl	memset
-	ldr	r3, [r8, #0]
-	adds	r2, r3, r7
-	strh	r4, [r3, r7]	@ movhi
-	str	r6, [r2, #4]
-	b	.L1632
-.L1631:
-	muls	r7, r3, r7
-	ldr	r3, [r8, #0]
-	ldr	r5, .L1635+28
-	movs	r1, #1
-	adds	r3, r3, r7
-	mov	r2, r1
-	mov	r0, r5
-	ldr	r3, [r3, #8]
-	str	r6, [r5, #4]
-	str	r3, [r5, #8]
-	ldr	r3, .L1635+32
-	ldr	r3, [r3, #0]
-	str	r3, [r5, #12]
-	bl	FlashReadPages
-	ldr	r3, [r5, #0]
-	ldr	sl, [r5, #12]
-	cmp	r3, #256
-	bne	.L1633
-	mov	r2, r6
+	ldr	r3, .L1771
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r0, lsl #1]
+	cmp	r3, #0
+	bne	.L1762
+	ldr	r2, .L1771+4
+	ldrh	r1, [r2]
+	cmp	r1, r0
+	bne	.L1763
+	movw	r3, #65535
+	strh	r3, [r2]	@ movhi
+.L1764:
+	ldr	r5, .L1771+8
 	mov	r1, r4
-	ldr	r0, .L1635+36
-	lsrs	r6, r6, #10
+	ldr	r0, .L1771+12
+	bl	List_remove_node
+	ldrh	r3, [r5]
+	cbnz	r3, .L1766
+	ldr	r1, .L1771+16
+	movw	r2, #3042
+	ldr	r0, .L1771+20
 	bl	printf
-	ldr	r3, [r8, #0]
-	ldr	r0, .L1635+40
-	mov	r1, r4
-	adds	r3, r3, r7
-	strh	r6, [r0, #40]	@ movhi
-	ldr	r2, [r3, #8]
-	bl	FtlMapWritePage
-.L1633:
-	ldrh	r3, [sl, #8]
-	cmp	r3, r4
-	beq	.L1634
-	ldr	r1, .L1635+4
-	movw	r2, #529
-	ldr	r0, .L1635+8
+	ldr	r1, .L1771+24
+	ldr	r0, .L1771+28
 	bl	printf
-	ldr	r0, .L1635+12
-	ldr	r1, .L1635+16
+.L1766:
+	ldrh	r3, [r5]
+	mov	r0, r4
+	subs	r3, r3, #1
+	strh	r3, [r5]	@ movhi
+	bl	free_data_superblock
+	mov	r0, r4
+	bl	FtlGcFreeBadSuperBlk
+	ldr	r3, .L1771+32
+	ldrh	r2, [r5]
+	ldrh	r3, [r3]
+	add	r3, r3, r2
+	ldr	r2, .L1771+36
+	ldrh	r2, [r2]
+	cmp	r3, r2
+	ble	.L1770
+	ldr	r1, .L1771+16
+	movw	r2, #3045
+	ldr	r0, .L1771+20
 	bl	printf
-.L1634:
-	ldr	r3, .L1635+44
-	movs	r1, #0
-	ldr	r3, [r3, #0]
-	adds	r2, r3, r7
-	strh	r4, [r3, r7]	@ movhi
-	str	r1, [r2, #4]
-.L1632:
-	movs	r0, #0
-	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
-.L1636:
+	ldr	r1, .L1771+24
+	ldr	r0, .L1771+28
+	bl	printf
+.L1770:
+	movs	r3, #1
+	b	.L1761
+.L1763:
+	ldr	r2, .L1771+40
+	ldrh	r2, [r2]
+	cmp	r2, r0
+	beq	.L1761
+	ldr	r2, .L1771+44
+	ldrh	r2, [r2]
+	cmp	r2, r0
+	beq	.L1761
+	ldr	r2, .L1771+48
+	ldrh	r2, [r2]
+	cmp	r2, r0
+	bne	.L1764
+.L1761:
+	mov	r0, r3
+	pop	{r3, r4, r5, pc}
+.L1762:
+	bl	List_update_data_list
+	movs	r3, #0
+	b	.L1761
+.L1772:
 	.align	2
-.L1635:
-	.word	.LANCHOR70
-	.word	.LANCHOR220
-	.word	.LC3
+.L1771:
+	.word	.LANCHOR82
+	.word	.LANCHOR201
+	.word	.LANCHOR84
+	.word	.LANCHOR81
+	.word	.LANCHOR203
 	.word	.LC4
 	.word	.LC5
-	.word	.LANCHOR114
-	.word	.LANCHOR61
-	.word	.LANCHOR198
-	.word	.LANCHOR184
-	.word	.LC38
-	.word	.LANCHOR110
-	.word	.LANCHOR102
-	.size	load_l2p_region, .-load_l2p_region
-	.section	.text.log2phys,"ax",%progbits
+	.word	.LC6
+	.word	.LANCHOR87
+	.word	.LANCHOR38
+	.word	.LANCHOR90
+	.word	.LANCHOR91
+	.word	.LANCHOR92
+	.size	update_vpc_list, .-update_vpc_list
+	.section	.text.decrement_vpc_count,"ax",%progbits
 	.align	1
-	.global	log2phys
+	.global	decrement_vpc_count
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	log2phys, %function
-log2phys:
+	.fpu softvfp
+	.type	decrement_vpc_count, %function
+decrement_vpc_count:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1647
-	push	{r4, r5, r6, r7, r8, lr}
-	movs	r5, #1
-	ldrh	r3, [r3, #0]
-	mov	r6, r1
-	mov	r7, r2
-	adds	r3, r3, #7
-	lsr	r4, r0, r3
-	lsl	r5, r5, r3
-	ldr	r3, .L1647+4
-	subs	r5, r5, #1
-	ands	r5, r5, r0
-	uxth	r4, r4
-	ldr	r3, [r3, #0]
-	uxth	r5, r5
+	movw	r3, #65535
+	push	{r4, r5, r6, lr}
 	cmp	r0, r3
-	bcc	.L1638
-	ldr	r1, .L1647+8
-	movw	r2, #851
-	ldr	r0, .L1647+12
+	mov	r4, r0
+	beq	.L1774
+	ldr	r5, .L1782
+	ldr	r3, [r5]
+	ldrh	r2, [r3, r0, lsl #1]
+	cbnz	r2, .L1775
+	mov	r1, r0
+	ldr	r0, .L1782+4
 	bl	printf
-	ldr	r0, .L1647+16
-	ldr	r1, .L1647+20
+	ldr	r3, [r5]
+	ldrh	r5, [r3, r4, lsl #1]
+	cbz	r5, .L1776
+.L1780:
+	movs	r5, #0
+.L1773:
+	mov	r0, r5
+	pop	{r4, r5, r6, pc}
+.L1776:
+	movw	r2, #3060
+.L1781:
+	ldr	r1, .L1782+8
+	ldr	r0, .L1782+12
 	bl	printf
-.L1638:
-	ldr	r3, .L1647+24
-	ldrh	r1, [r3, #0]
-	ldr	r3, .L1647+28
-	ldr	r2, [r3, #0]
-	movs	r3, #0
-	mov	r8, r3
-	b	.L1639
-.L1645:
-	adds	r3, r3, #12
-	adds	r0, r2, r3
-	ldrh	r0, [r0, #-12]
-	cmp	r0, r4
-	bne	.L1640
-.L1641:
-	ldr	r2, .L1647+28
-	movs	r3, #12
-	ldr	r2, [r2, #0]
-	mla	r3, r3, r8, r2
-	cbnz	r7, .L1642
-	ldr	r3, [r3, #8]
-	ldr	r3, [r3, r5, lsl #2]
-	str	r3, [r6, #0]
-	b	.L1643
-.L1642:
-	ldr	r1, [r6, #0]
-	ldr	r2, [r3, #8]
-	str	r1, [r2, r5, lsl #2]
-	ldr	r2, [r3, #4]
-	orr	r2, r2, #-2147483648
-	str	r2, [r3, #4]
-	ldr	r3, .L1647+32
-	strh	r4, [r3, #0]	@ movhi
-.L1643:
-	ldr	r3, .L1647+28
-	movs	r2, #12
-	ldr	r3, [r3, #0]
-	mla	r3, r2, r8, r3
-	ldr	r2, [r3, #4]
-	adds	r0, r2, #1
-	beq	.L1644
-	adds	r2, r2, #1
-	str	r2, [r3, #4]
-.L1644:
-	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, pc}
-.L1640:
-	add	r8, r8, #1
-	uxth	r8, r8
-.L1639:
-	cmp	r8, r1
-	bne	.L1645
-	bl	select_l2p_ram_region
-	movs	r3, #12
-	ldr	r2, .L1647+28
-	ldr	r2, [r2, #0]
-	mul	r3, r3, r0
-	mov	r8, r0
-	adds	r1, r2, r3
-	ldrh	r2, [r2, r3]
+	ldr	r1, .L1782+16
+	ldr	r0, .L1782+20
+	bl	printf
+	b	.L1773
+.L1775:
+	subs	r2, r2, #1
+	strh	r2, [r3, r0, lsl #1]	@ movhi
+.L1774:
+	ldr	r6, .L1782+24
 	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L1646
-	ldr	r3, [r1, #4]
-	cmp	r3, #0
-	bge	.L1646
-	bl	flush_l2p_region
-.L1646:
-	mov	r0, r4
-	mov	r1, r8
-	bl	load_l2p_region
-	b	.L1641
-.L1648:
+	ldrh	r0, [r6]
+	cmp	r0, r3
+	bne	.L1778
+	strh	r4, [r6]	@ movhi
+	b	.L1780
+.L1778:
+	cmp	r4, r0
+	beq	.L1780
+	bl	update_vpc_list
+	ldr	r3, .L1782+28
+	adds	r5, r0, #0
+	ldr	r2, .L1782+32
+	it	ne
+	movne	r5, #1
+	strh	r4, [r6]	@ movhi
+	ldr	r3, [r3]
+	ldr	r2, [r2]
+	subs	r3, r3, r2
+	asrs	r2, r3, #1
+	ldr	r3, .L1782+36
+	muls	r3, r2, r3
+	ldr	r2, .L1782
+	ldr	r2, [r2]
+	uxth	r1, r3
+	ldrh	r2, [r2, r1, lsl #1]
+	cmp	r2, #0
+	bne	.L1773
+	cmp	r4, r1
+	beq	.L1773
+	movw	r2, #3082
+	b	.L1781
+.L1783:
 	.align	2
-.L1647:
-	.word	.LANCHOR60
-	.word	.LANCHOR76
-	.word	.LANCHOR221
-	.word	.LC3
+.L1782:
+	.word	.LANCHOR82
+	.word	.LC31
+	.word	.LANCHOR204
 	.word	.LC4
 	.word	.LC5
-	.word	.LANCHOR71
-	.word	.LANCHOR102
-	.word	.LANCHOR103
-	.size	log2phys, .-log2phys
-	.section	.text.FtlReUsePrevPpa,"ax",%progbits
+	.word	.LC6
+	.word	.LANCHOR130
+	.word	.LANCHOR81
+	.word	.LANCHOR80
+	.word	-1431655765
+	.size	decrement_vpc_count, .-decrement_vpc_count
+	.section	.text.FtlSlcSuperblockCheck,"ax",%progbits
 	.align	1
-	.global	FtlReUsePrevPpa
+	.global	FtlSlcSuperblockCheck
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlReUsePrevPpa, %function
-FtlReUsePrevPpa:
-	@ args = 0, pretend = 0, frame = 8
+	.fpu softvfp
+	.type	FtlSlcSuperblockCheck, %function
+FtlSlcSuperblockCheck:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r4, r5, r6, r7, lr}
-	mov	r6, r0
-	ubfx	r0, r1, #10, #16
-	str	r1, [sp, #4]
-	bl	P2V_block_in_plane
-	ldr	r3, .L1656
-	ldr	r3, [r3, #0]
-	ldrh	r2, [r3, r0, lsl #1]
+	ldrh	r3, [r0, #4]
+	push	{r4, r5, r6, lr}
 	mov	r4, r0
-	cmp	r2, #0
-	bne	.L1650
-	ldr	r3, .L1656+4
-	ldr	r3, [r3, #0]
 	cmp	r3, #0
-	beq	.L1651
-	ldr	r1, .L1656+8
-	movs	r5, #6
-	ldr	r0, .L1656+12
-	ldrh	r7, [r1, #0]
-	ldr	r1, .L1656+16
-	ldr	r1, [r1, #0]
-	subs	r3, r3, r1
-	asrs	r3, r3, #1
-	muls	r3, r0, r3
-	movw	r0, #65535
-	uxth	r3, r3
-	b	.L1652
-.L1655:
-	cmp	r3, r4
-	bne	.L1653
-	ldr	r5, .L1656+8
-	mov	r1, r4
-	ldr	r0, .L1656+4
-	bl	List_remove_node
-	ldrh	r3, [r5, #0]
-	cbnz	r3, .L1654
-	ldr	r1, .L1656+20
-	movw	r2, #1823
-	ldr	r0, .L1656+24
-	bl	printf
-	ldr	r0, .L1656+28
-	ldr	r1, .L1656+32
-	bl	printf
-.L1654:
-	ldrh	r3, [r5, #0]
-	mov	r0, r4
+	beq	.L1784
+	ldrh	r2, [r0]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L1784
+	ldrb	r3, [r0, #6]	@ zero_extendqisi2
+	ldr	r5, .L1795
+	ldr	r6, .L1795+4
+	adds	r3, r3, #8
+	ldrh	r3, [r0, r3, lsl #1]
+.L1788:
+	movw	r2, #65535
+	cmp	r3, r2
+	beq	.L1790
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	cmp	r3, #1
+	bne	.L1791
+	ldrb	r1, [r5]	@ zero_extendqisi2
+	cbnz	r1, .L1791
+	ldrh	r1, [r4, #2]
+	ldrh	r1, [r6, r1, lsl #1]
+	cmp	r1, r2
+	bne	.L1791
+	ldrh	r3, [r4, #4]
+	ldrh	r0, [r4]
 	subs	r3, r3, #1
-	strh	r3, [r5, #0]	@ movhi
-	bl	INSERT_DATA_LIST
-	ldr	r3, .L1656
-	ldr	r3, [r3, #0]
-	ldrh	r2, [r3, r4, lsl #1]
-	b	.L1650
-.L1653:
-	muls	r3, r5, r3
-	ldrh	r3, [r1, r3]
-	cmp	r3, r0
-	beq	.L1651
-	adds	r2, r2, #1
-	uxth	r2, r2
-.L1652:
-	cmp	r2, r7
-	bne	.L1655
-	b	.L1651
-.L1650:
-	adds	r2, r2, #1
-	strh	r2, [r3, r4, lsl #1]	@ movhi
-.L1651:
-	mov	r0, r6
-	add	r1, sp, #4
-	movs	r2, #1
-	bl	log2phys
-	pop	{r1, r2, r3, r4, r5, r6, r7, pc}
-.L1657:
+	strh	r3, [r4, #4]	@ movhi
+	bl	decrement_vpc_count
+	ldrh	r2, [r4, #4]
+	cbnz	r2, .L1790
+	ldrh	r3, [r4, #2]
+	strb	r2, [r4, #6]
+	adds	r3, r3, #1
+	strh	r3, [r4, #2]	@ movhi
+	pop	{r4, r5, r6, pc}
+.L1790:
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	ldr	r2, .L1795+8
+	adds	r3, r3, #1
+	ldrh	r2, [r2]
+	uxtb	r3, r3
+	strb	r3, [r4, #6]
+	cmp	r2, r3
+	bne	.L1789
+	ldrh	r3, [r4, #2]
+	adds	r3, r3, #1
+	strh	r3, [r4, #2]	@ movhi
+	movs	r3, #0
+	strb	r3, [r4, #6]
+.L1789:
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	adds	r3, r3, #8
+	ldrh	r3, [r4, r3, lsl #1]
+	b	.L1788
+.L1791:
+	ldrb	r2, [r5]	@ zero_extendqisi2
+	cbz	r2, .L1784
+	cmp	r3, #1
+	bne	.L1784
+	ldr	r3, .L1795+12
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L1784
+	ldr	r3, .L1795+16
+	ldrh	r1, [r4]
+	ldrh	r0, [r4, #4]
+	ldr	r2, [r3]
+	ldrh	r3, [r2, r1, lsl #1]
+	subs	r3, r3, r0
+	strh	r3, [r2, r1, lsl #1]	@ movhi
+	movs	r3, #0
+	ldr	r2, .L1795+20
+	strh	r3, [r4, #4]	@ movhi
+	strb	r3, [r4, #6]
+	ldrh	r2, [r2]
+	strh	r2, [r4, #2]	@ movhi
+.L1784:
+	pop	{r4, r5, r6, pc}
+.L1796:
 	.align	2
-.L1656:
-	.word	.LANCHOR89
-	.word	.LANCHOR93
-	.word	.LANCHOR94
-	.word	-1431655765
-	.word	.LANCHOR87
-	.word	.LANCHOR222
-	.word	.LC3
-	.word	.LC4
-	.word	.LC5
-	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
-	.section	.text.FtlProgPages,"ax",%progbits
+.L1795:
+	.word	.LANCHOR8
+	.word	.LANCHOR117
+	.word	.LANCHOR36
+	.word	.LANCHOR52
+	.word	.LANCHOR82
+	.word	.LANCHOR51
+	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
+	.section	.text.get_new_active_ppa,"ax",%progbits
 	.align	1
-	.global	FtlProgPages
+	.global	get_new_active_ppa
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlProgPages, %function
-FtlProgPages:
-	@ args = 0, pretend = 0, frame = 16
+	.fpu softvfp
+	.type	get_new_active_ppa, %function
+get_new_active_ppa:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r4, r3
-	ldr	r3, .L1674
-	mov	r5, r0
-	str	r1, [sp, #4]
-	ldrb	r7, [r3, #0]	@ zero_extendqisi2
-	cbz	r7, .L1659
-	ldrb	r7, [r4, #8]	@ zero_extendqisi2
-	sub	r2, r7, #1
-	rsbs	r7, r2, #0
-	adc	r7, r7, r2
-.L1659:
-	mov	r0, r5
-	ldr	r1, [sp, #4]
-	mov	r2, r7
-	ldrb	r3, [r4, #9]	@ zero_extendqisi2
-	bl	FlashProgPages
-	mov	sl, #0
-	ldr	r6, .L1674+4
-	ldr	fp, .L1674+36
-	b	.L1660
-.L1663:
-	ldr	r0, [r5, #4]
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-	ldrh	r3, [r4, #0]
-	cmp	r3, r0
-	bne	.L1661
-	ldr	r2, [r6, #0]
-	ldrh	r1, [r4, #4]
-	ldrh	r0, [r2, r3, lsl #1]
-	subs	r1, r0, r1
-	strh	r1, [r2, r3, lsl #1]	@ movhi
-	ldr	r2, .L1674+8
-	strb	r8, [r4, #6]
-	strh	r8, [r4, #4]	@ movhi
-	ldrh	r3, [r2, #0]
-	strh	r3, [r4, #2]	@ movhi
-.L1661:
+	ldrh	r2, [r0]
+	movw	r3, #65535
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r4, r0
+	cmp	r2, r3
+	bne	.L1798
+	ldr	r1, .L1819
+	movw	r2, #2982
+	ldr	r0, .L1819+4
+	bl	printf
+	ldr	r1, .L1819+8
+	ldr	r0, .L1819+12
+	bl	printf
+.L1798:
+	ldr	r5, .L1819+16
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r5]
+	cmp	r2, r3
+	bne	.L1799
+	ldr	r1, .L1819
+	movw	r2, #2983
+	ldr	r0, .L1819+4
+	bl	printf
+	ldr	r1, .L1819+8
+	ldr	r0, .L1819+12
+	bl	printf
+.L1799:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1662
-	mov	r0, r4
-	bl	allocate_new_data_superblock
-.L1662:
-	ldr	r0, [r5, #4]
-	ldr	r3, [fp, #96]
-	ubfx	r0, r0, #10, #16
-	adds	r3, r3, #1
-	str	r3, [fp, #96]
-	bl	FtlGcMarkBadPhyBlk
-	mov	r0, r4
-	bl	get_new_active_ppa
-	movs	r1, #1
-	mov	r2, r7
-	str	r0, [r5, #4]
-	str	r0, [sp, #12]
-	mov	r0, r5
-	ldrb	r3, [r4, #9]	@ zero_extendqisi2
-	bl	FlashProgPages
-	b	.L1672
-.L1673:
-	mov	r8, #0
-.L1672:
-	ldr	r3, [r5, #0]
-	adds	r3, r3, #1
-	beq	.L1663
-	ldr	r3, .L1674+12
-	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-	ldrh	r3, [r3, #0]
-	cmp	r2, r3
-	bcc	.L1664
-	ldr	r1, .L1674+16
-	movw	r2, #1550
-	ldr	r0, .L1674+20
-	bl	printf
-	ldr	r0, .L1674+24
-	ldr	r1, .L1674+28
+	cbnz	r3, .L1800
+	ldr	r1, .L1819
+	movw	r2, #2984
+	ldr	r0, .L1819+4
 	bl	printf
-.L1664:
-	ldr	r3, [r5, #4]
-	str	r3, [sp, #12]
-	cbz	r7, .L1665
-	orr	r3, r3, #-2147483648
-	str	r3, [sp, #12]
-.L1665:
-	movs	r2, #1
-	ldr	r0, [r5, #16]
-	add	r1, sp, #12
-	bl	log2phys
-	ldr	r3, [r5, #12]
-	ldr	r0, [r3, #12]
-	adds	r3, r0, #1
-	beq	.L1666
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-	ldr	r3, [r6, #0]
-	ldrh	r2, [r3, r0, lsl #1]
-	mov	r8, r0
-	cbnz	r2, .L1667
-	ldr	r0, .L1674+32
-	mov	r1, r8
+	ldr	r1, .L1819+8
+	ldr	r0, .L1819+12
 	bl	printf
-.L1667:
-	mov	r0, r8
+.L1800:
+	movs	r3, #0
+	ldr	r7, .L1819+20
+	strb	r3, [r4, #10]
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	ldr	r6, .L1819+24
+	adds	r3, r3, #8
+	ldrh	r2, [r4, r3, lsl #1]
+.L1801:
+	movw	r0, #65535
+	cmp	r2, r0
+	beq	.L1802
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	ldrh	r1, [r4, #2]
+	cmp	r3, #1
+	ldrh	r3, [r4, #4]
+	bne	.L1804
+	ldrb	ip, [r6]	@ zero_extendqisi2
+	cmp	ip, #0
+	bne	.L1804
+	ldr	ip, .L1819+28
+	ldrh	ip, [ip, r1, lsl #1]
+	cmp	ip, r0
+	bne	.L1804
+	subs	r3, r3, #1
+	ldrh	r0, [r4]
+	strh	r3, [r4, #4]	@ movhi
 	bl	decrement_vpc_count
-.L1666:
-	add	sl, sl, #1
-	adds	r5, r5, #36
-.L1660:
-	ldr	r3, [sp, #4]
-	cmp	sl, r3
-	bne	.L1673
-	ldr	r3, .L1674+12
-	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-	ldrh	r3, [r3, #0]
+.L1802:
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	ldrh	r2, [r7]
+	adds	r3, r3, #1
+	uxtb	r3, r3
 	cmp	r2, r3
-	bcc	.L1658
-	ldr	r1, .L1674+16
-	movw	r2, #1567
-	ldr	r0, .L1674+20
+	strb	r3, [r4, #6]
+	bne	.L1803
+	ldrh	r3, [r4, #2]
+	adds	r3, r3, #1
+	strh	r3, [r4, #2]	@ movhi
+	movs	r3, #0
+	strb	r3, [r4, #6]
+.L1803:
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	adds	r3, r3, #8
+	ldrh	r2, [r4, r3, lsl #1]
+	b	.L1801
+.L1804:
+	ldr	r8, .L1819+24
+	orr	r6, r1, r2, lsl #10
+	subs	r3, r3, #1
+	strh	r3, [r4, #4]	@ movhi
+.L1805:
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	movw	r2, #65535
+	ldrh	r0, [r7]
+.L1807:
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	cmp	r3, r0
+	itttt	eq
+	ldrheq	r3, [r4, #2]
+	addeq	r3, r3, #1
+	strheq	r3, [r4, #2]	@ movhi
+	moveq	r3, #0
+	add	r1, r3, #8
+	ldrh	r1, [r4, r1, lsl #1]
+	cmp	r1, r2
+	beq	.L1807
+	strb	r3, [r4, #6]
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	cmp	r3, #1
+	bne	.L1808
+	ldrb	r1, [r8]	@ zero_extendqisi2
+	ldrh	r3, [r4, #2]
+	cbnz	r1, .L1809
+	ldr	r1, .L1819+28
+	ldrh	r3, [r1, r3, lsl #1]
+	cmp	r3, r2
+	bne	.L1808
+	ldrh	r3, [r4, #4]
+	cbz	r3, .L1808
+	subs	r3, r3, #1
+	ldrh	r0, [r4]
+	strh	r3, [r4, #4]	@ movhi
+	bl	decrement_vpc_count
+	b	.L1805
+.L1809:
+	ldr	r2, .L1819+32
+	ldrh	r2, [r2]
+	cmp	r3, r2
+	bcc	.L1808
+	ldr	r3, .L1819+36
+	ldrh	r1, [r4]
+	ldrh	r0, [r4, #4]
+	ldr	r2, [r3]
+	ldrh	r3, [r2, r1, lsl #1]
+	subs	r3, r3, r0
+	strh	r3, [r2, r1, lsl #1]	@ movhi
+	movs	r3, #0
+	ldrh	r2, [r5]
+	strh	r3, [r4, #4]	@ movhi
+	strb	r3, [r4, #6]
+	strh	r2, [r4, #2]	@ movhi
+.L1808:
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r5]
+	cmp	r2, r3
+	bne	.L1797
+	ldrh	r3, [r4, #4]
+	cbz	r3, .L1797
+	ldr	r1, .L1819
+	movw	r2, #3028
+	ldr	r0, .L1819+4
 	bl	printf
-	ldr	r0, .L1674+24
-	ldr	r1, .L1674+28
+	ldr	r1, .L1819+8
+	ldr	r0, .L1819+12
 	bl	printf
-.L1658:
-	pop	{r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1675:
+.L1797:
+	mov	r0, r6
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1820:
 	.align	2
-.L1674:
-	.word	.LANCHOR7
-	.word	.LANCHOR89
-	.word	.LANCHOR56
-	.word	.LANCHOR41
-	.word	.LANCHOR223
-	.word	.LC3
+.L1819:
+	.word	.LANCHOR205
 	.word	.LC4
 	.word	.LC5
-	.word	.LC39
-	.word	.LANCHOR132
-	.size	FtlProgPages, .-FtlProgPages
-	.section	.text.FtlCacheWriteBack,"ax",%progbits
+	.word	.LC6
+	.word	.LANCHOR51
+	.word	.LANCHOR36
+	.word	.LANCHOR8
+	.word	.LANCHOR117
+	.word	.LANCHOR52
+	.word	.LANCHOR82
+	.size	get_new_active_ppa, .-get_new_active_ppa
+	.section	.text.FtlVpcTblFlush,"ax",%progbits
 	.align	1
-	.global	FtlCacheWriteBack
+	.global	FtlVpcTblFlush
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlCacheWriteBack, %function
-FtlCacheWriteBack:
-	@ args = 0, pretend = 0, frame = 0
+	.fpu softvfp
+	.type	FtlVpcTblFlush, %function
+FtlVpcTblFlush:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, lr}
-	ldr	r4, .L1678
-	ldr	r0, [r4, #0]
-	cbz	r0, .L1677
-	ldr	r3, .L1678+4
-	movs	r1, #1
-	movs	r2, #0
-	ldr	r3, [r3, #0]
-	bl	FtlProgPages
+	ldr	r3, .L1841
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r1, [r3]
+	str	r3, [sp]
+	cmp	r1, #0
+	bne	.L1823
+	ldr	r3, .L1841+4
+	ldr	r7, .L1841+8
+	ldr	r8, .L1841+104
+	ldr	r4, .L1841+12
+	ldr	r6, [r7]
+	ldr	r0, [r8]
+	ldrh	r2, [r3]
+	str	r6, [r4, #12]
+	str	r0, [r4, #8]
+	strh	r2, [r6, #2]	@ movhi
+	movw	r2, #61604
+	ldr	r5, .L1841+16
+	strh	r2, [r6]	@ movhi
+	ldr	r2, [r3, #8]
+	ldrh	r3, [r3, #6]
+	str	r1, [r6, #8]
+	str	r2, [r6, #4]
+	strh	r3, [r5, #8]	@ movhi
+	ldr	r3, .L1841+20
+	ldr	ip, .L1841+108
+	ldr	r2, .L1841+24
+	ldrh	r3, [r3]
+	str	r1, [r6, #12]
+	stm	r5, {r2, ip}
+	strb	r3, [r5, #10]
+	ldr	r3, .L1841+28
+	ldrh	r2, [r3]
+	ldrh	r1, [r3, #2]
+	strh	r2, [r5, #14]	@ movhi
+	ldrb	r2, [r3, #6]	@ zero_extendqisi2
+	ldrb	r3, [r3, #8]	@ zero_extendqisi2
+	strb	r3, [r5, #11]
+	orr	r2, r2, r1, lsl #6
+	ldr	r3, .L1841+32
+	strh	r2, [r5, #16]	@ movhi
+	ldrh	r2, [r3]
+	ldrh	r1, [r3, #2]
+	strh	r2, [r5, #18]	@ movhi
+	ldrb	r2, [r3, #6]	@ zero_extendqisi2
+	ldrb	r3, [r3, #8]	@ zero_extendqisi2
+	strb	r3, [r5, #12]
+	orr	r2, r2, r1, lsl #6
+	ldr	r3, .L1841+36
+	strh	r2, [r5, #20]	@ movhi
+	ldrh	r2, [r3]
+	strh	r2, [r5, #22]	@ movhi
+	ldrh	r1, [r3, #2]
+	ldrb	r2, [r3, #6]	@ zero_extendqisi2
+	ldrb	r3, [r3, #8]	@ zero_extendqisi2
+	strb	r3, [r5, #13]
+	orr	r2, r2, r1, lsl #6
+	ldr	r3, .L1841+40
+	movs	r1, #255
+	strh	r2, [r5, #24]	@ movhi
+	ldr	r3, [r3]
+	str	r3, [r5, #32]
+	ldr	r3, .L1841+44
+	ldr	r3, [r3]
+	str	r3, [r5, #40]
+	ldr	r3, .L1841+48
+	ldr	r3, [r3]
+	str	r3, [r5, #36]
+	ldr	r3, .L1841+52
+	ldrh	r2, [r3]
+	bl	ftl_memset
+	mov	r1, r5
+	ldr	r5, .L1841+56
+	movs	r2, #48
+	ldr	r0, [r4, #8]
+	bl	ftl_memcpy
+	ldrh	r2, [r5]
+	ldr	r3, .L1841+60
+	ldr	r0, [r4, #8]
+	ldr	r1, [r3]
+	lsls	r2, r2, #1
+	adds	r0, r0, #48
+	bl	ftl_memcpy
+	ldrh	r0, [r5]
+	ldr	r3, [r4, #8]
+	ldr	r1, .L1841+64
+	lsrs	r2, r0, #3
+	adds	r0, r0, #24
+	lsls	r0, r0, #1
+	ldr	r1, [r1]
+	adds	r2, r2, #4
+	bic	r0, r0, #3
+	add	r0, r0, r3
+	bl	ftl_memcpy
+	ldr	r3, .L1841+68
+	str	r7, [sp, #4]
+	ldrh	r3, [r3]
+	cbz	r3, .L1824
+	ldrh	r0, [r5]
+	ldr	r3, .L1841+72
+	ldr	r1, .L1841+76
+	ldrh	r2, [r3]
+	lsrs	r3, r0, #3
+	ldr	r1, [r1]
+	add	r3, r3, r0, lsl #1
+	ldr	r0, [r4, #8]
+	adds	r3, r3, #52
+	lsls	r2, r2, #2
+	ubfx	r3, r3, #2, #14
+	add	r0, r0, r3, lsl #2
+	bl	ftl_memcpy
+.L1824:
+	ldr	r5, .L1841+4
+	movs	r7, #0
+	movw	fp, #65535
+	movs	r0, #0
+	bl	FtlUpdateVaildLpn
+	mov	r10, r5
+.L1825:
+	ldr	r3, [r8]
+	ldrh	r2, [r5]
+	ldr	r0, .L1841+12
+	str	r3, [r4, #8]
+	ldr	r3, [sp, #4]
+	ldr	r3, [r3]
+	str	r3, [r4, #12]
+	ldrh	r3, [r5, #2]
+	orr	r3, r3, r2, lsl #10
+	str	r3, [r4, #4]
+	movs	r3, #1
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+	ldr	r3, .L1841+80
+	ldrh	r2, [r5, #2]
+	ldrh	r3, [r3]
+	subs	r3, r3, #1
+	cmp	r2, r3
+	blt	.L1826
+	ldrh	r3, [r5]
+	ldrh	fp, [r5, #4]
+	strh	r3, [r5, #4]	@ movhi
 	movs	r3, #0
-	str	r3, [r4, #0]
-.L1677:
+	strh	r3, [r5, #2]	@ movhi
+	bl	FtlFreeSysBlkQueueOut
+	ldr	r2, .L1841+44
+	strh	r0, [r5]	@ movhi
+	ldr	r3, [r2]
+	adds	r1, r3, #1
+	str	r3, [r5, #8]
+	str	r1, [r2]
+	lsls	r2, r0, #10
+	str	r2, [r4, #4]
+	str	r3, [r6, #4]
+	movs	r3, #1
+	strh	r0, [r6, #2]	@ movhi
+	mov	r2, r3
+	mov	r1, r3
+	ldr	r0, .L1841+12
+	bl	FlashProgPages
+.L1826:
+	ldrh	r3, [r10, #2]
+	ldr	r2, [r4]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	adds	r1, r2, #1
+	strh	r3, [r10, #2]	@ movhi
+	bne	.L1827
+	cmp	r3, #1
+	bne	.L1828
+	ldr	r1, .L1841+84
+	movw	r2, #1180
+	ldr	r0, .L1841+88
+	bl	printf
+	ldr	r1, .L1841+92
+	ldr	r0, .L1841+96
+	bl	printf
+.L1828:
+	ldrh	r3, [r10, #2]
+	adds	r7, r7, #1
+	uxth	r7, r7
+	cmp	r3, #1
+	itttt	eq
+	ldreq	r3, .L1841+80
+	ldrheq	r3, [r3]
+	addeq	r3, r3, #-1
+	strheq	r3, [r10, #2]	@ movhi
+	cmp	r7, #3
+	bls	.L1825
+	mov	r2, r7
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1841+100
+	bl	printf
+	ldr	r2, [sp]
+	movs	r3, #1
+	str	r3, [r2]
+.L1823:
 	movs	r0, #0
-	pop	{r4, pc}
-.L1679:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1827:
+	cmp	r3, #1
+	beq	.L1825
+	cmp	r2, #256
+	beq	.L1825
+	movw	r3, #65535
+	cmp	fp, r3
+	beq	.L1823
+	movs	r1, #1
+	mov	r0, fp
+	bl	FtlFreeSysBlkQueueIn
+	b	.L1823
+.L1842:
 	.align	2
-.L1678:
-	.word	.LANCHOR125
-	.word	.LANCHOR224
-	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
-	.section	.text.FtlSysFlush,"ax",%progbits
-	.align	1
-	.global	FtlSysFlush
-	.thumb
-	.thumb_func
-	.type	FtlSysFlush, %function
-FtlSysFlush:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	ldr	r3, .L1682
-	ldr	r3, [r3, #0]
-	cbnz	r3, .L1681
-	bl	FtlCacheWriteBack
-	bl	l2p_flush
-	movs	r0, #1
-	bl	FtlEctTblFlush
-	bl	FtlVpcTblFlush
-.L1681:
-	movs	r0, #0
-	pop	{r3, pc}
-.L1683:
+.L1841:
+	.word	.LANCHOR75
+	.word	.LANCHOR206
+	.word	.LANCHOR185
+	.word	.LANCHOR199
+	.word	.LANCHOR135
+	.word	.LANCHOR43
+	.word	1179929683
+	.word	.LANCHOR90
+	.word	.LANCHOR91
+	.word	.LANCHOR92
+	.word	.LANCHOR165
+	.word	.LANCHOR157
+	.word	.LANCHOR158
+	.word	.LANCHOR56
+	.word	.LANCHOR38
+	.word	.LANCHOR82
+	.word	.LANCHOR0
+	.word	.LANCHOR68
+	.word	.LANCHOR65
+	.word	.LANCHOR128
+	.word	.LANCHOR52
+	.word	.LANCHOR207
+	.word	.LC4
+	.word	.LC5
+	.word	.LC6
+	.word	.LC32
+	.word	.LANCHOR79
+	.word	1342177351
+	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
+	.section	.text.FtlSuperblockPowerLostFix,"ax",%progbits
+	.align	1
+	.global	FtlSuperblockPowerLostFix
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlSuperblockPowerLostFix, %function
+FtlSuperblockPowerLostFix:
+	@ args = 0, pretend = 0, frame = 40
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1858
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r4, r0
+	sub	sp, sp, #40
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	cbz	r5, .L1857
+	ldrb	r5, [r0, #8]	@ zero_extendqisi2
+	cmp	r5, #1
+	bne	.L1852
+	ldrh	r6, [r0, #4]
+.L1844:
+	ldr	r7, .L1858+4
+	ldr	r8, .L1858+20
+.L1845:
+	adds	r6, r6, #-1
+	bcc	.L1847
+	ldrh	r3, [r4, #4]
+	cbnz	r3, .L1846
+.L1847:
+	ldr	r3, .L1858+8
+	ldrh	r1, [r4]
+	ldrh	r0, [r4, #4]
+	ldr	r2, [r3]
+	ldrh	r3, [r2, r1, lsl #1]
+	subs	r3, r3, r0
+	strh	r3, [r2, r1, lsl #1]	@ movhi
+	ldr	r3, .L1858+12
+	ldrh	r3, [r3]
+	strh	r3, [r4, #2]	@ movhi
+	movs	r3, #0
+	strb	r3, [r4, #6]
+	strh	r3, [r4, #4]	@ movhi
+	add	sp, sp, #40
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1852:
+	movs	r5, #0
+.L1857:
+	movs	r6, #12
+	b	.L1844
+.L1846:
+	mov	r0, r4
+	bl	get_new_active_ppa
+	str	r0, [sp, #8]
+	adds	r0, r0, #1
+	beq	.L1847
+	ldr	r1, [r8]
+	mov	r3, #-1
+	ldr	r2, [r7]
+	ldr	r0, .L1858+16
+	str	r3, [sp, #20]
+	str	r1, [sp, #16]
+	str	r2, [sp, #12]
+	str	r3, [r1, #12]
+	ldr	r2, [r0]
+	str	r3, [r1, #8]
+	ldrh	r3, [r4]
+	str	r2, [r1, #4]
+	adds	r2, r2, #1
+	strh	r3, [r1, #2]	@ movhi
+	movs	r3, #0
+	strh	r3, [r1]	@ movhi
+	adds	r1, r2, #1
+	it	eq
+	moveq	r2, r3
+	movs	r1, #1
+	str	r2, [r0]
+	mov	r2, r5
+	add	r0, sp, #4
+	bl	FlashProgPages
+	ldrh	r0, [r4]
+	bl	decrement_vpc_count
+	b	.L1845
+.L1859:
 	.align	2
-.L1682:
+.L1858:
+	.word	.LANCHOR8
+	.word	.LANCHOR79
 	.word	.LANCHOR82
-	.size	FtlSysFlush, .-FtlSysFlush
-	.section	.text.FtlDeInit,"ax",%progbits
+	.word	.LANCHOR51
+	.word	.LANCHOR158
+	.word	.LANCHOR185
+	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
+	.section	.text.FtlLoadFactoryBbt,"ax",%progbits
 	.align	1
-	.global	FtlDeInit
+	.global	FtlLoadFactoryBbt
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlDeInit, %function
-FtlDeInit:
+	.fpu softvfp
+	.type	FtlLoadFactoryBbt, %function
+FtlLoadFactoryBbt:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	ldr	r3, .L1686
-	ldr	r3, [r3, #0]
-	cmp	r3, #1
-	bne	.L1685
-	bl	FtlSysFlush
-.L1685:
+	ldr	r3, .L1870
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r6, #0
+	ldr	r5, .L1870+4
+	ldr	r3, [r3]
+	ldr	r7, .L1870+8
+	ldr	r10, .L1870+20
+	str	r3, [r5, #8]
+	ldr	r3, .L1870+12
+	ldr	r8, [r3]
+	str	r8, [r5, #12]
+.L1861:
+	ldr	r3, .L1870+16
+	ldrh	r3, [r3]
+	cmp	r6, r3
+	bcc	.L1866
 	movs	r0, #0
-	pop	{r3, pc}
-.L1687:
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1866:
+	ldrh	r4, [r10]
+	movw	r3, #65535
+	ldr	fp, .L1870+4
+	strh	r3, [r7, #2]!	@ movhi
+	subs	r4, r4, #1
+	uxth	r4, r4
+.L1862:
+	ldrh	r3, [r10]
+	sub	r2, r3, #15
+	cmp	r2, r4
+	bgt	.L1864
+	mla	r3, r6, r3, r4
+	movs	r2, #1
+	mov	r1, r2
+	mov	r0, fp
+	lsls	r3, r3, #10
+	str	r3, [r5, #4]
+	bl	FlashReadPages
+	ldr	r3, [r5]
+	adds	r3, r3, #1
+	beq	.L1863
+	ldrh	r2, [r8]
+	movw	r3, #61664
+	cmp	r2, r3
+	bne	.L1863
+	strh	r4, [r7]	@ movhi
+.L1864:
+	adds	r6, r6, #1
+	b	.L1861
+.L1863:
+	subs	r4, r4, #1
+	uxth	r4, r4
+	b	.L1862
+.L1871:
 	.align	2
-.L1686:
-	.word	.LANCHOR225
-	.size	FtlDeInit, .-FtlDeInit
-	.section	.text.rk_ftl_de_init,"ax",%progbits
+.L1870:
+	.word	.LANCHOR79
+	.word	.LANCHOR199
+	.word	.LANCHOR73+10
+	.word	.LANCHOR185
+	.word	.LANCHOR43
+	.word	.LANCHOR49
+	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
+	.section	.text.FtlGetLastWrittenPage,"ax",%progbits
 	.align	1
-	.global	rk_ftl_de_init
+	.global	FtlGetLastWrittenPage
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	rk_ftl_de_init, %function
-rk_ftl_de_init:
-	@ args = 0, pretend = 0, frame = 0
+	.fpu softvfp
+	.type	FtlGetLastWrittenPage, %function
+FtlGetLastWrittenPage:
+	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	bl	rk_nand_de_init
-	bl	FtlDeInit
-	pop	{r3, lr}
-	b	rk_nand_de_init
-	.size	rk_ftl_de_init, .-rk_ftl_de_init
-	.section	.text.FtlGcFreeTempBlock,"ax",%progbits
+	cmp	r1, #1
+	push	{r4, r5, r6, r7, r8, lr}
+	it	eq
+	ldreq	r3, .L1884
+	sub	sp, sp, #104
+	lsl	r7, r0, #10
+	mov	r2, r1
+	it	ne
+	ldrne	r3, .L1884+4
+	mov	r8, r1
+	movs	r6, #0
+	movs	r1, #1
+	add	r0, sp, #4
+	ldrh	r5, [r3]
+	add	r3, sp, #40
+	str	r3, [sp, #16]
+	str	r6, [sp, #12]
+	subs	r5, r5, #1
+	sxth	r5, r5
+	orr	r3, r5, r7
+	str	r3, [sp, #8]
+	bl	FlashReadPages
+	ldr	r3, [sp, #40]
+	adds	r3, r3, #1
+	bne	.L1875
+.L1876:
+	cmp	r6, r5
+	ble	.L1879
+.L1875:
+	mov	r0, r5
+	add	sp, sp, #104
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1879:
+	adds	r3, r6, r5
+	mov	r2, r8
+	add	r3, r3, r3, lsr #31
+	movs	r1, #1
+	add	r0, sp, #4
+	asrs	r4, r3, #1
+	sxth	r3, r4
+	orrs	r3, r3, r7
+	str	r3, [sp, #8]
+	bl	FlashReadPages
+	ldr	r3, [sp, #40]
+	adds	r3, r3, #1
+	bne	.L1877
+	ldr	r3, [sp, #44]
+	adds	r3, r3, #1
+	bne	.L1877
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #1
+	beq	.L1877
+	subs	r4, r4, #1
+	sxth	r5, r4
+	b	.L1876
+.L1877:
+	adds	r4, r4, #1
+	sxth	r6, r4
+	b	.L1876
+.L1885:
+	.align	2
+.L1884:
+	.word	.LANCHOR52
+	.word	.LANCHOR51
+	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
+	.section	.text.FtlLoadBbt,"ax",%progbits
 	.align	1
-	.global	FtlGcFreeTempBlock
+	.global	FtlLoadBbt
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlGcFreeTempBlock, %function
-FtlGcFreeTempBlock:
-	@ args = 0, pretend = 0, frame = 8
+	.fpu softvfp
+	.type	FtlLoadBbt, %function
+FtlLoadBbt:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1707
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	ldrh	r1, [r3, #0]
-	ldr	r3, .L1707+4
-	ldr	r3, [r3, #0]
-	cmp	r3, #0
-	bne	.L1703
-	ldr	r0, .L1707+8
-	movw	r3, #65535
-	ldrh	r4, [r0, #0]
-	cmp	r4, r3
-	beq	.L1691
-	bl	FtlGcScanTempBlk
-	str	r0, [sp, #4]
-	adds	r0, r0, #1
-	beq	.L1691
-	ldr	r3, .L1707+12
-	ldr	r3, [r3, #0]
-	ldrh	r2, [r3, r4, lsl #1]
-	cmp	r2, #4
-	bls	.L1692
-	subs	r2, r2, #5
-	movs	r0, #1
-	strh	r2, [r3, r4, lsl #1]	@ movhi
-	bl	FtlEctTblFlush
-.L1692:
-	ldr	r3, .L1707+16
-	ldr	r3, [r3, #0]
-	cbnz	r3, .L1693
-	ldr	r3, .L1707+20
-	ldr	r0, [sp, #4]
-	ldr	r2, [r3, #96]
-	ubfx	r0, r0, #10, #16
-	adds	r2, r2, #1
-	str	r2, [r3, #96]
-	bl	FtlBbmMapBadBlock
-	bl	FtlBbmTblFlush
-.L1693:
-	ldr	r3, .L1707+16
-	movs	r2, #0
-	movs	r4, #1
-	str	r2, [r3, #0]
-	b	.L1690
-.L1691:
-	ldr	r5, .L1707+8
-	movs	r4, #0
-	ldr	r3, .L1707+16
-	ldrh	r2, [r5, #0]
-	str	r4, [r3, #0]
-	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L1690
-	bl	FtlCacheWriteBack
-	ldr	r3, .L1707+24
-	ldr	r1, .L1707
-	ldrh	r2, [r3, #0]
-	ldrh	r1, [r1, #0]
-	ldrb	r3, [r5, #7]	@ zero_extendqisi2
-	muls	r3, r1, r3
-	cmp	r2, r3
-	beq	.L1694
-	ldr	r1, .L1707+28
-	movs	r2, #163
-	ldr	r0, .L1707+32
-	bl	printf
-	ldr	r0, .L1707+36
-	ldr	r1, .L1707+40
-	bl	printf
-.L1694:
-	ldr	r3, .L1707+8
-	movs	r5, #0
-	ldr	r2, .L1707+44
-	ldr	r4, .L1707
-	ldrh	r1, [r3, #0]
-	ldr	r2, [r2, #0]
-	ldrh	r4, [r4, #0]
-	ldrb	r0, [r3, #7]	@ zero_extendqisi2
-	muls	r0, r4, r0
-	strh	r0, [r2, r1, lsl #1]	@ movhi
-	ldr	r1, .L1707+48
-	ldr	r2, .L1707+24
-	ldr	fp, .L1707+80
-	ldr	r0, [r1, #0]
-	mov	sl, r2
-	ldrh	r4, [r2, #0]
-	ldr	r8, .L1707+84
-	adds	r0, r4, r0
-	str	r0, [r1, #0]
-	b	.L1695
-.L1699:
-	ldr	r7, [fp, #0]
-	movs	r6, #12
-	muls	r6, r5, r6
-	ldr	r3, [r8, #0]
-	adds	r4, r7, r6
-	ldr	r2, [r4, #8]
-	cmp	r2, r3
-	bcc	.L1696
-	ldr	r1, .L1707+28
-	movs	r2, #168
-	ldr	r0, .L1707+32
-	bl	printf
-	ldr	r0, .L1707+36
-	ldr	r1, .L1707+40
-	bl	printf
-.L1696:
-	movs	r2, #0
-	ldr	r0, [r4, #8]
-	add	r1, sp, #4
-	bl	log2phys
-	ldr	r0, [sp, #4]
-	ldr	r3, [r7, r6]
-	cmp	r0, r3
-	bne	.L1697
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-	adds	r1, r4, #4
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	movs	r3, #0
+	ldr	r4, .L1915
+	ldr	r7, .L1915+4
+	str	r3, [r4, #8]
+	mov	r8, r4
+	ldr	r3, .L1915+8
+	ldr	r6, [r3]
+	str	r6, [r4, #12]
+	bl	FtlBbtMemInit
+	ldrh	r5, [r7]
+	subs	r5, r5, #1
+	uxth	r5, r5
+.L1887:
+	ldrh	r3, [r7]
+	subs	r3, r3, #47
+	cmp	r3, r5
+	bgt	.L1890
+	lsls	r3, r5, #10
 	movs	r2, #1
-	mov	r6, r0
-	ldr	r0, [r4, #8]
-	bl	log2phys
-	mov	r0, r6
-	b	.L1706
-.L1697:
+	mov	r1, r2
+	mov	r0, r8
+	str	r3, [r4, #4]
+	bl	FlashReadPages
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	bne	.L1888
 	ldr	r3, [r4, #4]
+	movs	r2, #1
+	mov	r1, r2
+	mov	r0, r8
+	adds	r3, r3, #1
+	str	r3, [r4, #4]
+	bl	FlashReadPages
+.L1888:
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	beq	.L1889
+	ldrh	r2, [r6]
+	movw	r3, #61649
+	cmp	r2, r3
+	bne	.L1889
+	ldr	r3, .L1915+12
+	ldr	r2, [r6, #4]
+	strh	r5, [r3]	@ movhi
+	str	r2, [r3, #8]
+	ldrh	r2, [r6, #8]
+	strh	r2, [r3, #4]	@ movhi
+.L1890:
+	ldr	r5, .L1915+12
+	movw	r2, #65535
+	ldrh	r3, [r5]
+	cmp	r3, r2
+	beq	.L1904
+	ldrh	r3, [r5, #4]
+	cmp	r3, r2
+	beq	.L1894
+	lsls	r3, r3, #10
+	movs	r2, #1
+	mov	r1, r2
+	ldr	r0, .L1915
+	str	r3, [r4, #4]
+	bl	FlashReadPages
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	beq	.L1894
+	ldrh	r2, [r6]
+	movw	r3, #61649
+	cmp	r2, r3
+	bne	.L1894
+	ldr	r3, [r6, #4]
+	ldr	r2, [r5, #8]
+	cmp	r3, r2
+	bls	.L1894
+	ldrh	r2, [r5, #4]
+	str	r3, [r5, #8]
+	ldrh	r3, [r6, #8]
+	strh	r2, [r5]	@ movhi
+	strh	r3, [r5, #4]	@ movhi
+.L1894:
+	ldr	r8, .L1915+48
+	movs	r1, #1
+	ldr	r10, .L1915
+	ldrh	r0, [r5]
+	bl	FtlGetLastWrittenPage
+	sxth	r7, r0
+	adds	r0, r0, #1
+	strh	r0, [r5, #2]	@ movhi
+.L1896:
+	cmp	r7, #0
+	bge	.L1899
+	ldr	r1, .L1915+16
+	mov	r2, #336
+	ldr	r0, .L1915+20
+	bl	printf
+	ldr	r1, .L1915+24
+	ldr	r0, .L1915+28
+	bl	printf
+.L1898:
+	ldrh	r3, [r6, #10]
+	ldrh	r0, [r6, #12]
+	strh	r3, [r5, #6]	@ movhi
+	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1698
-	ldr	r3, .L1707+8
-	ldrh	r0, [r3, #0]
-.L1706:
-	bl	decrement_vpc_count
-.L1698:
-	adds	r5, r5, #1
+	beq	.L1901
+	ldr	r3, .L1915+32
+	ldr	r2, [r3]
+	cmp	r0, r2
+	beq	.L1901
+	ldr	r3, .L1915+36
+	ldrh	r3, [r3]
+	lsrs	r3, r3, #2
+	cmp	r2, r3
+	bcs	.L1901
+	cmp	r0, r3
+	bcs	.L1901
+	bl	FtlSysBlkNumInit
+.L1901:
+	ldr	r6, .L1915+40
+	movs	r5, #0
+	ldr	r7, .L1915+44
+	ldr	r8, .L1915+52
+.L1902:
+	ldrh	r3, [r7]
+	cmp	r5, r3
+	bcc	.L1903
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L1889:
+	subs	r5, r5, #1
 	uxth	r5, r5
-.L1695:
-	ldrh	r3, [sl, #0]
-	cmp	r3, r5
-	bhi	.L1699
-	movw	r0, #65535
-	ldr	r4, .L1707+8
-	bl	decrement_vpc_count
-	ldr	r3, .L1707+52
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1700
-	ldr	r0, .L1707+56
-	ldrh	r1, [r4, #0]
-	bl	printf
-.L1700:
-	ldr	r3, .L1707+44
-	ldrh	r0, [r4, #0]
-	ldr	r3, [r3, #0]
-	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L1701
-	bl	INSERT_DATA_LIST
-	b	.L1702
-.L1701:
-	bl	INSERT_FREE_LIST
-.L1702:
-	ldr	r3, .L1707+8
-	movw	r5, #65535
-	movs	r4, #0
-	strh	r5, [r3, #0]	@ movhi
-	ldr	r3, .L1707+24
-	strh	r4, [r3, #0]	@ movhi
-	ldr	r3, .L1707+60
-	strh	r4, [r3, #0]	@ movhi
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
-	ldr	r3, .L1707+64
-	ldr	r2, .L1707+68
-	movs	r1, #3
-	ldrh	r3, [r3, #0]
-	ldrh	r2, [r2, #0]
-	muls	r2, r1, r2
-	cmp	r3, r2, lsr #2
-	ble	.L1690
-	ldr	r3, .L1707+72
-	movs	r2, #20
-	strh	r5, [r3, #0]	@ movhi
-	ldr	r3, .L1707+76
-	strh	r2, [r3, #0]	@ movhi
-	b	.L1690
-.L1703:
-	movs	r4, #0
-.L1690:
-	mov	r0, r4
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1708:
+	b	.L1887
+.L1899:
+	ldrh	r3, [r5]
+	movs	r2, #1
+	mov	r1, r2
+	mov	r0, r10
+	orr	r3, r7, r3, lsl #10
+	str	r3, [r4, #4]
+	ldr	r3, [r8]
+	str	r3, [r4, #8]
+	bl	FlashReadPages
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	beq	.L1897
+	ldrh	r2, [r6]
+	movw	r3, #61649
+	cmp	r2, r3
+	beq	.L1898
+.L1897:
+	subs	r7, r7, #1
+	sxth	r7, r7
+	b	.L1896
+.L1903:
+	ldrh	r2, [r8]
+	ldr	r1, [r4, #8]
+	ldr	r0, [r6, #4]!
+	lsls	r2, r2, #2
+	mla	r1, r5, r2, r1
+	adds	r5, r5, #1
+	bl	ftl_memcpy
+	b	.L1902
+.L1904:
+	mov	r0, #-1
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L1916:
 	.align	2
-.L1707:
-	.word	.LANCHOR56
-	.word	.LANCHOR82
-	.word	.LANCHOR99
-	.word	.LANCHOR84
-	.word	.LANCHOR128
-	.word	.LANCHOR132
-	.word	.LANCHOR135
-	.word	.LANCHOR226
-	.word	.LC3
+.L1915:
+	.word	.LANCHOR199
+	.word	.LANCHOR49
+	.word	.LANCHOR185
+	.word	.LANCHOR73
+	.word	.LANCHOR208
 	.word	.LC4
 	.word	.LC5
-	.word	.LANCHOR89
-	.word	.LANCHOR158
-	.word	.LANCHOR7
-	.word	.LC40
-	.word	.LANCHOR133
-	.word	.LANCHOR94
-	.word	.LANCHOR201
-	.word	.LANCHOR202
-	.word	.LANCHOR173
-	.word	.LANCHOR136
-	.word	.LANCHOR76
-	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
-	.section	.text.Ftl_gc_temp_data_write_back,"ax",%progbits
-	.align	1
-	.global	Ftl_gc_temp_data_write_back
-	.thumb
-	.thumb_func
-	.type	Ftl_gc_temp_data_write_back, %function
-Ftl_gc_temp_data_write_back:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	ldr	r3, .L1718
-	ldrb	r2, [r3, #0]	@ zero_extendqisi2
-	ldr	r3, .L1718+4
-	cbz	r2, .L1710
-	ldr	r2, [r3, #0]
-	lsls	r2, r2, #31
-	bpl	.L1710
-	ldr	r2, .L1718+8
-	ldrh	r2, [r2, #4]
-	cmp	r2, #0
-	bne	.L1715
-.L1710:
-	ldr	r4, .L1718+12
-	movs	r2, #0
-	ldr	r1, [r3, #0]
-	mov	r3, r2
-	movs	r5, #0
-	ldr	r7, .L1718+4
-	ldr	r0, [r4, #0]
-	movs	r6, #36
-	bl	FlashProgPages
-	b	.L1712
-.L1714:
-	mul	r3, r6, r5
-	ldr	r1, [r4, #0]
-	adds	r2, r1, r3
-	ldr	r1, [r1, r3]
-	adds	r0, r1, #1
-	bne	.L1713
-	ldr	r3, .L1718+8
-	movs	r5, #0
-	ldr	r0, .L1718+16
-	ldrh	r4, [r3, #0]
-	ldr	r0, [r0, #0]
-	strh	r5, [r0, r4, lsl #1]	@ movhi
-	strh	r1, [r3, #0]	@ movhi
-	ldr	r3, .L1718+20
-	ldr	r0, [r2, #4]
-	ldr	r1, [r3, #96]
-	ubfx	r0, r0, #10, #16
-	adds	r1, r1, #1
-	str	r1, [r3, #96]
-	bl	FtlBbmMapBadBlock
-	bl	FtlBbmTblFlush
-	bl	FtlGcPageVarInit
-	b	.L1717
-.L1713:
-	ldr	r3, [r2, #12]
-	adds	r5, r5, #1
-	ldr	r1, [r2, #4]
-	uxth	r5, r5
-	ldr	r0, [r3, #12]
-	ldr	r2, [r3, #8]
-	bl	FtlGcUpdatePage
-.L1712:
-	ldr	r1, [r7, #0]
-	cmp	r5, r1
-	bcc	.L1714
-	ldr	r3, .L1718+12
-	ldr	r0, [r3, #0]
-	bl	FtlGcBufFree
-	ldr	r3, .L1718+4
-	movs	r0, #0
-	str	r0, [r3, #0]
-	ldr	r3, .L1718+8
-	ldrh	r3, [r3, #4]
-	cbnz	r3, .L1711
-	movs	r0, #1
-	bl	FtlGcFreeTempBlock
-.L1717:
-	movs	r0, #1
-	pop	{r3, r4, r5, r6, r7, pc}
-.L1715:
-	movs	r0, #0
-.L1711:
-	pop	{r3, r4, r5, r6, r7, pc}
-.L1719:
-	.align	2
-.L1718:
-	.word	.LANCHOR7
-	.word	.LANCHOR119
-	.word	.LANCHOR99
-	.word	.LANCHOR178
-	.word	.LANCHOR89
-	.word	.LANCHOR132
-	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
-	.section	.text.Ftl_get_new_temp_ppa,"ax",%progbits
+	.word	.LC6
+	.word	.LANCHOR35
+	.word	.LANCHOR39
+	.word	.LANCHOR73+24
+	.word	.LANCHOR43
+	.word	.LANCHOR79
+	.word	.LANCHOR120
+	.size	FtlLoadBbt, .-FtlLoadBbt
+	.section	.text.ftl_map_blk_gc,"ax",%progbits
 	.align	1
-	.global	Ftl_get_new_temp_ppa
+	.global	ftl_map_blk_gc
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	Ftl_get_new_temp_ppa, %function
-Ftl_get_new_temp_ppa:
-	@ args = 0, pretend = 0, frame = 0
+	.fpu softvfp
+	.type	ftl_map_blk_gc, %function
+ftl_map_blk_gc:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
+	ldr	r3, [r0, #24]
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r0
+	ldr	r5, [r0, #12]
+	str	r3, [sp]
+	bl	ftl_free_no_use_map_blk
+	ldrh	ip, [r4, #10]
+	ldrh	r2, [r4, #8]
+	ldrh	r1, [r4, #40]
+	sub	r3, ip, #4
+	ldr	r6, .L1937
+	cmp	r2, r3
+	bge	.L1918
 	movw	r3, #65535
-	ldr	r5, .L1723
-	ldrh	r2, [r5, #0]
+	cmp	r1, r3
+	beq	.L1920
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r6]
 	cmp	r2, r3
-	beq	.L1721
-	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1722
-.L1721:
-	bl	FtlCacheWriteBack
-	movs	r0, #0
-	bl	FtlGcFreeTempBlock
-	ldr	r0, .L1723
-	movs	r4, #0
-	strb	r4, [r5, #8]
-	bl	allocate_data_superblock
-	ldr	r3, .L1723+4
-	strh	r4, [r3, #0]	@ movhi
-	ldr	r3, .L1723+8
-	strh	r4, [r3, #0]	@ movhi
-	bl	l2p_flush
-	mov	r0, r4
-	bl	FtlEctTblFlush
-	bl	FtlVpcTblFlush
-.L1722:
-	ldr	r0, .L1723
-	pop	{r3, r4, r5, lr}
-	b	get_new_active_ppa
-.L1724:
-	.align	2
-.L1723:
-	.word	.LANCHOR99
-	.word	.LANCHOR133
-	.word	.LANCHOR135
-	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
-	.section	.text.FtlGcPageRecovery,"ax",%progbits
-	.align	1
-	.global	FtlGcPageRecovery
-	.thumb
-	.thumb_func
-	.type	FtlGcPageRecovery, %function
-FtlGcPageRecovery:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	ldr	r4, .L1727
-	ldr	r5, .L1727+4
-	ldrh	r1, [r4, #0]
-	mov	r0, r5
-	bl	FtlGcScanTempBlk
-	ldrh	r2, [r5, #2]
-	ldrh	r3, [r4, #0]
+	bcc	.L1921
+.L1918:
+	movw	r3, #65535
+	uxth	r0, r0
+	cmp	r1, r3
+	beq	.L1922
+	ldrh	r3, [r4, #2]
+	ldrh	r2, [r6]
 	cmp	r2, r3
-	bcc	.L1725
-	ldr	r0, .L1727+8
-	bl	FtlMapBlkWriteDumpData
+	bls	.L1923
+.L1922:
+	ldrh	r8, [r5, r0, lsl #1]
+	lsls	r2, r0, #1
+	cmp	r8, #0
+	beq	.L1920
+	ldr	r3, [r4, #32]
+	cbnz	r3, .L1920
+	movs	r1, #1
+	str	r1, [r4, #32]
+	strh	r3, [r5, r2]	@ movhi
+	ldrh	r3, [r4, #8]
+	ldrh	r2, [r4, #2]
+	subs	r3, r3, #1
+	strh	r3, [r4, #8]	@ movhi
+	ldrh	r3, [r6]
+	cmp	r2, r3
+	bcc	.L1928
+	mov	r0, r4
+	bl	ftl_map_blk_alloc_new_blk
+.L1928:
+	ldr	r5, .L1937+4
+	movs	r7, #0
+.L1929:
+	ldrh	r2, [r4, #6]
+	uxth	r3, r7
+	cmp	r2, r3
+	bhi	.L1933
+	movs	r1, #1
+	mov	r0, r8
+	bl	FtlFreeSysBlkQueueIn
+	movs	r3, #0
+	str	r3, [r4, #32]
+.L1920:
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r6]
+	cmp	r2, r3
+	bcc	.L1921
+	mov	r0, r4
+	bl	ftl_map_blk_alloc_new_blk
+.L1921:
 	movs	r0, #0
-	bl	FtlGcFreeTempBlock
-	ldr	r3, .L1727+12
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1926:
+	ldrh	r8, [r5, r2, lsl #1]
+	add	lr, r2, #1
+	cmp	r8, r1
+	beq	.L1924
+	mov	r2, lr
+.L1925:
+	uxth	r7, r2
+	cmp	r7, ip
+	bcc	.L1926
+	mov	r7, r0
+.L1924:
+	uxth	r2, r2
+	ldr	r0, .L1937+8
+	ldrh	r2, [r5, r2, lsl #1]
+	bl	printf
+	movw	r3, #65535
+	mov	r0, r7
+	strh	r3, [r4, #40]	@ movhi
+	b	.L1922
+.L1923:
 	movs	r2, #0
-	str	r2, [r3, #0]
-.L1725:
-	pop	{r3, r4, r5, pc}
-.L1728:
-	.align	2
-.L1727:
-	.word	.LANCHOR56
-	.word	.LANCHOR99
-	.word	.LANCHOR110
-	.word	.LANCHOR128
-	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
-	.section	.text.ftl_discard,"ax",%progbits
-	.align	1
-	.global	ftl_discard
-	.thumb
-	.thumb_func
-	.type	ftl_discard, %function
-ftl_discard:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1738
-	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	mov	r4, r2
-	ldr	r3, [r3, #0]
-	adds	r2, r2, r1
-	mov	r6, r1
-	cmp	r2, r3
-	bhi	.L1735
-	cmp	r4, #31
-	bls	.L1736
-	bl	FtlCacheWriteBack
-	ldr	r3, .L1738+4
-	mov	r0, r6
-	ldrh	r7, [r3, #0]
-	mov	r1, r7
-	bl	__aeabi_uidiv
-	mls	r6, r0, r7, r6
-	mov	r5, r0
-	uxth	r6, r6
-	cbz	r6, .L1731
-	subs	r6, r7, r6
-	adds	r5, r0, #1
-	cmp	r6, r4
-	it	cs
-	movcs	r6, r4
-	uxth	r6, r6
-	subs	r4, r4, r6
-.L1731:
-	mov	r3, #-1
-	ldr	r8, .L1738+4
+	b	.L1925
+.L1933:
+	ldr	r2, [sp]
+	uxth	r10, r7
+	ldr	r2, [r2, r10, lsl #2]
+	cmp	r8, r2, lsr #10
+	bne	.L1930
 	str	r3, [sp, #4]
-	ldr	r7, .L1738+8
-	ldr	r6, .L1738+12
-	b	.L1732
-.L1734:
-	movs	r2, #0
-	mov	r0, r5
-	mov	r1, sp
-	bl	log2phys
-	ldr	r3, [sp, #0]
-	adds	r3, r3, #1
-	beq	.L1733
-	ldr	r3, [r7, #0]
-	add	r1, sp, #4
+	ldr	r3, .L1937+12
+	str	r2, [r5, #4]
 	movs	r2, #1
-	mov	r0, r5
-	adds	r3, r3, #1
-	str	r3, [r7, #0]
-	ldr	r3, [r6, #0]
+	ldr	r0, .L1937+4
+	ldr	r1, [r3]
+	str	r1, [r5, #8]
+	ldr	r1, .L1937+16
+	ldr	fp, [r1]
+	mov	r1, r2
+	str	fp, [r5, #12]
+	bl	FlashReadPages
+	ldrh	r2, [fp, #8]
+	ldr	r3, [sp, #4]
+	cmp	r2, r3
+	beq	.L1931
+	ldr	r1, .L1937+20
+	movw	r2, #638
+	ldr	r0, .L1937+24
+	bl	printf
+	ldr	r1, .L1937+28
+	ldr	r0, .L1937+32
+	bl	printf
+.L1931:
+	ldr	r3, [r5]
 	adds	r3, r3, #1
-	str	r3, [r6, #0]
-	bl	log2phys
-	ldr	r0, [sp, #0]
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-	bl	decrement_vpc_count
-.L1733:
-	ldrh	r3, [r8, #0]
-	adds	r5, r5, #1
-	subs	r4, r4, r3
-.L1732:
-	ldrh	r3, [r8, #0]
-	cmp	r4, r3
-	bcs	.L1734
-	ldr	r3, .L1738+8
-	mov	r4, #0
-	ldr	r2, [r3, #0]
-	cmp	r2, #32
-	bls	.L1737
-	str	r4, [r3, #0]
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
-	b	.L1737
-.L1735:
-	mov	r0, #-1
-	b	.L1730
-.L1736:
-	movs	r0, #0
-	b	.L1730
-.L1737:
+	bne	.L1932
+	ldr	r2, [sp]
+	movs	r3, #0
+	ldr	r0, .L1937+36
+	str	r3, [r2, r10, lsl #2]
+	ldrh	r2, [fp, #8]
+	ldr	r1, [r5, #4]
+	bl	printf
+	ldr	r3, .L1937+40
+	movs	r2, #1
+	str	r2, [r3]
+.L1930:
+	adds	r7, r7, #1
+	b	.L1929
+.L1932:
+	ldr	r2, [r5, #8]
+	mov	r1, r10
 	mov	r0, r4
-.L1730:
-	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
-.L1739:
+	bl	FtlMapWritePage
+	b	.L1930
+.L1938:
 	.align	2
-.L1738:
-	.word	.LANCHOR72
-	.word	.LANCHOR59
-	.word	.LANCHOR227
-	.word	.LANCHOR160
-	.size	ftl_discard, .-ftl_discard
-	.section	.text.FtlRecoverySuperblock,"ax",%progbits
+.L1937:
+	.word	.LANCHOR52
+	.word	.LANCHOR199
+	.word	.LC33
+	.word	.LANCHOR181
+	.word	.LANCHOR185
+	.word	.LANCHOR209
+	.word	.LC4
+	.word	.LC5
+	.word	.LC6
+	.word	.LC34
+	.word	.LANCHOR75
+	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
+	.section	.text.Ftl_write_map_blk_to_last_page,"ax",%progbits
 	.align	1
-	.global	FtlRecoverySuperblock
+	.global	Ftl_write_map_blk_to_last_page
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlRecoverySuperblock, %function
-FtlRecoverySuperblock:
-	@ args = 0, pretend = 0, frame = 64
+	.fpu softvfp
+	.type	Ftl_write_map_blk_to_last_page, %function
+Ftl_write_map_blk_to_last_page:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldrh	r2, [r0, #0]
-	movw	r3, #65535
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	cmp	r2, r3
-	sub	sp, sp, #64
+	ldr	r3, .L1949
+	push	{r4, r5, r6, r7, r8, lr}
 	mov	r4, r0
-	beq	.L1741
-	ldrh	r5, [r0, #2]
-	ldr	r2, .L1833
-	str	r5, [sp, #20]
-	ldrb	r5, [r0, #6]	@ zero_extendqisi2
-	ldrh	r2, [r2, #0]
-	str	r5, [sp, #28]
-	ldr	r5, [sp, #20]
-	cmp	r2, r5
-	mov	r5, #0
-	bne	.L1742
-	mov	r3, r5	@ movhi
-	strh	r5, [r0, #4]	@ movhi
-	b	.L1830
-.L1742:
-	ldrh	r0, [r0, #16]
-	b	.L1743
-.L1744:
-	adds	r5, r5, #1
-	uxth	r5, r5
-	add	r2, r5, #8
-	ldrh	r0, [r4, r2, lsl #1]
-.L1743:
-	cmp	r0, r3
-	beq	.L1744
-	ldrb	r1, [r4, #8]	@ zero_extendqisi2
-	cmp	r1, #1
-	bne	.L1745
-	bl	FtlGetLastWrittenPage
-	adds	r2, r0, #1
-	mov	r6, r0
-	beq	.L1746
-	ldr	r3, .L1833+4
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbnz	r3, .L1825
-	ldr	r3, .L1833+8
-	ldrh	r7, [r3, r0, lsl #1]
-	b	.L1815
-.L1745:
-	movs	r1, #0
-	bl	FtlGetLastWrittenPage
-	adds	r3, r0, #1
-	mov	r6, r0
-	beq	.L1746
-.L1825:
-	mov	r7, r6
-.L1815:
-	ldr	r3, .L1833+12
-	movs	r5, #0
-	str	r4, [sp, #44]
-	mov	r2, r4
-	ldrh	fp, [r3, #0]
-	ldr	r3, .L1833+16
-	ldr	sl, [r3, #0]
-	ldr	r3, .L1833+20
-	ldr	r8, [r3, #0]
-	ldr	r3, .L1833+24
-	ldrh	ip, [r3, #0]
-	mov	r3, r5
-	b	.L1748
-.L1746:
-	ldr	r3, [sp, #20]
-	cbz	r3, .L1749
-	ldr	r1, .L1833+28
-	movw	r2, #1894
-	ldr	r0, .L1833+32
-	bl	printf
-	ldr	r0, .L1833+36
-	ldr	r1, .L1833+40
-	bl	printf
-.L1749:
-	ldr	r3, [sp, #28]
-	cbz	r3, .L1750
-	cmp	r3, r5
-	beq	.L1750
-	ldr	r1, .L1833+28
-	movw	r2, #1895
-	ldr	r0, .L1833+32
+	ldr	r5, [r3]
+	cbnz	r5, .L1940
+	ldrh	r3, [r0]
+	movw	r2, #65535
+	ldr	r6, [r0, #12]
+	cmp	r3, r2
+	bne	.L1941
+	ldrh	r3, [r0, #8]
+	cbz	r3, .L1942
+	ldr	r1, .L1949+4
+	movw	r2, #670
+	ldr	r0, .L1949+8
 	bl	printf
-	ldr	r0, .L1833+36
-	ldr	r1, .L1833+40
+	ldr	r1, .L1949+12
+	ldr	r0, .L1949+16
 	bl	printf
-.L1750:
+.L1942:
+	ldrh	r3, [r4, #8]
+	adds	r3, r3, #1
+	strh	r3, [r4, #8]	@ movhi
+	bl	FtlFreeSysBlkQueueOut
 	movs	r3, #0
+	strh	r0, [r6]	@ movhi
 	strh	r3, [r4, #2]	@ movhi
-	strb	r3, [r4, #6]
-	b	.L1741
-.L1752:
-	ldrh	r0, [r2, #16]
-	movw	lr, #65535
-	cmp	r0, lr
-	beq	.L1751
-	mov	lr, #36
-	orr	r0, r7, r0, lsl #10
-	mla	r1, lr, r5, sl
-	str	r0, [r1, #4]
+	strh	r3, [r4]	@ movhi
+	ldr	r3, [r4, #28]
+	adds	r3, r3, #1
+	str	r3, [r4, #28]
+.L1940:
 	movs	r0, #0
-	str	r0, [r1, #8]
-	mul	r0, ip, r5
-	adds	r5, r5, #1
-	uxth	r5, r5
-	bic	r0, r0, #3
-	add	r0, r8, r0
-	str	r0, [r1, #12]
-.L1751:
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1941:
+	ldrh	r6, [r6, r3, lsl #1]
+	movs	r1, #255
+	ldrh	r3, [r0, #2]
+	ldr	r2, .L1949+20
+	ldr	r8, .L1949+32
+	ldr	r7, [r0, #24]
+	orr	r3, r3, r6, lsl #10
+	ldr	r0, [r8]
+	str	r3, [r2, #4]
+	ldr	r3, .L1949+24
+	str	r0, [r2, #8]
+	ldr	r3, [r3]
+	str	r3, [r2, #12]
+	ldr	r2, [r4, #28]
+	str	r2, [r3, #4]
+	movw	r2, #64245
+	strh	r2, [r3, #8]	@ movhi
+	ldrh	r2, [r4, #4]
+	strh	r6, [r3, #2]	@ movhi
+	strh	r2, [r3]	@ movhi
+	ldr	r3, .L1949+28
+	ldrh	r2, [r3]
+	lsls	r2, r2, #3
+	bl	ftl_memset
+	ldrh	ip, [r4, #6]
+	mov	r3, r5
+	ldr	r1, [r8]
+	mov	r2, r5
+.L1943:
+	uxth	r0, r3
+	cmp	ip, r0
+	bhi	.L1945
+	movs	r2, #1
+	movs	r3, #0
+	mov	r1, r2
+	ldr	r0, .L1949+20
+	bl	FlashProgPages
+	ldrh	r3, [r4, #2]
+	mov	r0, r4
 	adds	r3, r3, #1
-	adds	r2, r2, #2
-	uxth	r3, r3
-.L1748:
-	cmp	r3, fp
-	bne	.L1752
-	ldrb	r3, [r4, #8]	@ zero_extendqisi2
-	cmp	r3, #1
-	bne	.L1817
-	ldr	r3, .L1833+4
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	adds	r3, r3, #0
-	it	ne
-	movne	r3, #1
-	b	.L1826
-.L1817:
-	movs	r3, #0
-.L1826:
-	ldr	r8, .L1833+16
-	mov	r1, r5
-	str	r3, [sp, #24]
-	mov	fp, #0
-	ldr	r2, [sp, #24]
-	mov	sl, fp
-	ldr	r0, [r8, #0]
-	bl	FlashReadPages
-	ldr	r3, .L1833+44
-	movw	ip, #65535
-	str	ip, [sp, #8]
-	ldr	r2, [r3, #0]
-	str	r2, [sp, #12]
-	uxth	r2, r7
-	str	r2, [sp, #16]
-	b	.L1754
-.L1759:
-	ldr	r3, .L1833+16
-	ldr	r2, [r3, #0]
-	add	r3, r2, fp
-	ldr	r2, [r2, fp]
-	cbnz	r2, .L1755
-	ldr	r3, [r3, #12]
-	ldr	r8, [r3, #4]
-	cmp	r8, #-1
-	beq	.L1756
-	ldr	r2, .L1833+44
-	mov	r0, r8
-	ldr	r1, [r2, #0]
-	str	r3, [sp, #0]
-	bl	ftl_cmp_data_ver
-	ldr	r3, [sp, #0]
-	cbz	r0, .L1756
-	ldr	r0, .L1833+44
-	add	r2, r8, #1
-	str	r2, [r0, #0]
-.L1756:
-	ldr	r3, [r3, #0]
-	adds	r3, r3, #1
-	bne	.L1757
-	ldr	r3, .L1833+16
-	movs	r2, #36
-	uxth	r6, r6
-	ldr	r3, [r3, #0]
-	mla	r3, r2, sl, r3
-	b	.L1827
-.L1755:
-	ldr	r1, [r3, #4]
-	ldr	r0, .L1833+48
-	bl	printf
-	ldr	r2, [sp, #16]
-	ldrh	r3, [r4, #0]
-	ldr	r0, .L1833+52
-	str	r2, [sp, #8]
-	strh	r3, [r0, #0]	@ movhi
-.L1757:
-	add	sl, sl, #1
-	add	fp, fp, #36
-	uxth	sl, sl
-.L1754:
-	cmp	sl, r5
-	bne	.L1759
-	ldr	r3, .L1833+16
-	adds	r6, r6, #1
-	uxth	r6, r6
-	ldr	r3, [r3, #0]
-.L1827:
-	ldr	r0, [r3, #4]
-	ubfx	r0, r0, #10, #16
-	bl	P2V_plane
-	ldrb	r3, [r4, #8]	@ zero_extendqisi2
-	cmp	r3, #1
-	str	r0, [sp, #16]
-	bne	.L1760
-	ldr	r2, .L1833+4
-	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	cbnz	r2, .L1760
-	ldr	r2, .L1833+8
-	ldrh	r6, [r2, r6, lsl #1]
-.L1760:
-	ldr	r2, .L1833
-	ldrh	r2, [r2, #0]
-	cmp	r2, r6
-	bne	.L1761
-	movs	r2, #0
-	strh	r6, [r4, #2]	@ movhi
-	strb	r2, [r4, #6]
-	strh	r2, [r4, #4]	@ movhi
-.L1761:
-	ldr	r5, [sp, #20]
-	cmp	r6, r5
-	bne	.L1762
-	ldr	r8, [sp, #16]
-	ldr	r5, [sp, #28]
-	cmp	r8, r5
-	bne	.L1762
-	mov	r0, r4
-	mov	r1, r6
-	mov	r2, r8
-	b	.L1831
-.L1762:
-	ldr	r2, [sp, #12]
-	ldr	r8, [sp, #8]
-	subs	r5, r2, #1
-	movw	r2, #65535
-	cmp	r8, r2
-	bne	.L1763
-	cmp	r3, #0
-	bne	.L1764
-.L1763:
-	ldr	r2, .L1833+56
-	uxth	r3, r7
-	ldr	r0, [sp, #20]
-	ldr	r1, [r2, #0]
-	adds	r1, r1, #1
-	it	eq
-	streq	r5, [r2, #0]
-	ldr	r2, [r2, #0]
-	str	r2, [sp, #8]
-	adds	r2, r0, #7
-	cmp	r3, r2
-	ble	.L1818
-	subs	r7, r3, #7
-	uxth	r7, r7
-	b	.L1766
-.L1818:
-	ldr	r7, [sp, #20]
-.L1766:
-	mov	fp, #-1
-	mov	r8, r3
-	mov	sl, fp
-	mov	r3, r6
-	mov	r6, r5
-	b	.L1767
-.L1769:
-	ldrh	r0, [r1, #16]
-	movw	r3, #65535
-	cmp	r0, r3
-	beq	.L1768
-	ldr	r3, [sp, #12]
-	mov	lr, #36
-	orr	r0, r7, r0, lsl #10
-	mla	ip, lr, r5, r3
-	adds	r5, r5, #1
-	uxth	r5, r5
-	str	r0, [ip, #4]
-.L1768:
+	strh	r3, [r4, #2]	@ movhi
+	bl	ftl_map_blk_gc
+	b	.L1940
+.L1945:
+	ldr	r0, [r7, r3, lsl #2]
+	cmp	r6, r0, lsr #10
+	bne	.L1944
 	adds	r2, r2, #1
-	adds	r1, r1, #2
 	uxth	r2, r2
-.L1780:
-	ldr	r0, [sp, #36]
-	cmp	r2, r0
-	bne	.L1769
-	ldr	ip, .L1833+16
-	mov	r1, r5
-	ldr	r3, [sp, #32]
-	ldr	r2, [sp, #24]
-	ldr	r0, [ip, #0]
-	stmia	sp, {r3, ip}
-	bl	FlashReadPages
-	ldr	r2, .L1833+4
-	movs	r0, #0
-	ldr	ip, [sp, #4]
-	ldr	r3, [sp, #0]
-	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	ldr	r1, [ip, #0]
-	mov	ip, r3
-	str	r5, [sp, #32]
-	str	r2, [sp, #12]
-	ldr	r2, .L1833+56
-	ldr	r2, [r2, #0]
-	b	.L1770
-.L1834:
+	str	r3, [r1, r2, lsl #3]
+	add	r5, r1, r2, lsl #3
+	ldr	r0, [r7, r3, lsl #2]
+	str	r0, [r5, #4]
+.L1944:
+	adds	r3, r3, #1
+	b	.L1943
+.L1950:
 	.align	2
-.L1833:
-	.word	.LANCHOR56
-	.word	.LANCHOR7
-	.word	.LANCHOR8
-	.word	.LANCHOR41
-	.word	.LANCHOR177
-	.word	.LANCHOR121
-	.word	.LANCHOR62
-	.word	.LANCHOR228
-	.word	.LC3
+.L1949:
+	.word	.LANCHOR75
+	.word	.LANCHOR210
 	.word	.LC4
 	.word	.LC5
-	.word	.LANCHOR157
-	.word	.LC41
-	.word	.LANCHOR229
-	.word	.LANCHOR129
-.L1778:
-	ldr	r3, [r1, #0]
-	cbnz	r3, .L1771
-	ldr	r3, [r1, #12]
-	movw	r5, #65535
-	ldrh	lr, [r3, #0]
-	cmp	lr, r5
-	beq	.L1820
-	ldr	r3, [r3, #4]
-	adds	r5, r3, #1
-	beq	.L1820
-	cmp	fp, #-1
-	bne	.L1772
-	ldr	r5, .L1835
-	ldrh	lr, [r5, r7, lsl #1]
-	movw	r5, #65535
-	cmp	lr, r5
-	bne	.L1773
-	ldr	r5, [sp, #12]
+	.word	.LC6
+	.word	.LANCHOR199
+	.word	.LANCHOR185
+	.word	.LANCHOR52
+	.word	.LANCHOR79
+	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
+	.section	.text.FtlMapWritePage,"ax",%progbits
+	.align	1
+	.global	FtlMapWritePage
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlMapWritePage, %function
+FtlMapWritePage:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1974
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r0
+	mov	r8, r1
+	str	r2, [sp]
+	ldr	r5, [r3]
+	str	r3, [sp, #4]
 	cmp	r5, #0
-	beq	.L1772
-.L1773:
-	cmp	r2, r6
-	ite	ne
-	movne	fp, r2
-	moveq	fp, #-1
-	b	.L1772
-.L1771:
-	ldr	r1, .L1835+4
-	mov	r5, r6
-	ldrh	r0, [r4, #0]
-	mov	r6, ip
-	ldr	r3, .L1835+8
-	strh	r0, [r1, #0]	@ movhi
-	ldrb	r1, [r4, #8]	@ zero_extendqisi2
-	str	r2, [r3, #0]
-	cmp	r1, #0
-	bne	.L1764
-	ldr	r1, .L1835
-	ldrh	r0, [r1, r7, lsl #1]
-	movw	r1, #65535
-	cmp	r0, r1
-	bne	.L1774
-	cmp	fp, #-1
-	beq	.L1775
-	str	fp, [r3, #0]
-	b	.L1764
-.L1775:
-	ldr	r0, [sp, #8]
-	cmp	r0, r5
-	beq	.L1832
-	str	r0, [r3, #0]
-	b	.L1764
-.L1774:
-	cmp	sl, r5
-	beq	.L1777
-	cmp	sl, #-1
-	beq	.L1764
-	str	sl, [r3, #0]
-	b	.L1764
-.L1777:
-	cmp	r2, r5
-	beq	.L1764
-.L1832:
-	subs	r2, r2, #1
-	b	.L1828
-.L1820:
-	mov	r3, r2
-	mov	r2, sl
-.L1772:
-	adds	r0, r0, #1
-	mov	sl, r2
-	adds	r1, r1, #36
-	mov	r2, r3
-	uxth	r0, r0
-.L1770:
-	ldr	r3, [sp, #32]
-	cmp	r0, r3
-	bne	.L1778
-	adds	r7, r7, #1
-	ldr	r1, .L1835+8
-	mov	r3, ip
-	uxth	r7, r7
-	str	r2, [r1, #0]
-.L1767:
-	cmp	r7, r8
-	bhi	.L1779
-	ldr	r5, .L1835+12
-	mov	r1, r4
-	ldr	r2, .L1835+16
-	str	r3, [sp, #32]
-	ldrh	lr, [r5, #0]
-	movs	r5, #0
-	ldr	r2, [r2, #0]
-	str	lr, [sp, #36]
-	str	r2, [sp, #12]
-	mov	r2, r5
-	b	.L1780
-.L1779:
-	mov	r5, r6
-	mov	r6, r3
-	ldr	r3, .L1835+8
-	mov	r2, #-1
-.L1828:
-	str	r2, [r3, #0]
-.L1764:
-	ldr	r3, .L1835+20
-	movs	r2, #1
-	ldr	r0, .L1835+24
-	ldr	r7, .L1835+16
-	strh	r2, [r3, #0]	@ movhi
-	bl	FtlMapBlkWriteDumpData
-	ldr	sl, [sp, #20]
-	str	r6, [sp, #12]
-.L1781:
-	ldr	r3, .L1835+28
-	movs	r6, #0
-	ldr	r0, .L1835+12
-	mov	r2, r4
-	ldr	lr, [r7, #0]
-	ldrb	fp, [r3, #0]	@ zero_extendqisi2
-	mov	r3, r6
-	ldrh	ip, [r0, #0]
-	b	.L1782
-.L1785:
-	ldrh	r0, [r2, #16]
-	movw	r1, #65535
-	cmp	r0, r1
-	beq	.L1783
-	mov	r8, #36
-	orr	r0, sl, r0, lsl #10
-	mla	r1, r8, r6, lr
-	str	r0, [r1, #4]
-	ldrb	r8, [r4, #8]	@ zero_extendqisi2
-	cmp	r8, #1
-	bne	.L1784
-	cmp	fp, #0
-	beq	.L1784
-	orr	r0, r0, #-2147483648
-	str	r0, [r1, #4]
-.L1784:
-	adds	r6, r6, #1
-	uxth	r6, r6
-.L1783:
-	adds	r3, r3, #1
-	adds	r2, r2, #2
-	uxth	r3, r3
-.L1782:
-	cmp	r3, ip
-	bne	.L1785
-	ldr	r0, [r7, #0]
-	mov	r1, r6
-	ldr	r2, [sp, #24]
-	mov	r8, #0
-	bl	FlashReadPages
-	movs	r3, #36
-	str	sl, [sp, #32]
-	muls	r3, r6, r3
-	str	r3, [sp, #40]
-	b	.L1786
-.L1810:
-	ldr	r3, [r7, #0]
-	add	sl, r3, r8
-	ldr	r6, [sl, #4]
-	ubfx	r0, r6, #10, #16
-	str	r6, [sp, #60]
-	bl	P2V_plane
-	ldr	ip, [sp, #32]
-	ldr	r3, [sp, #20]
-	cmp	ip, r3
-	bcc	.L1787
-	bne	.L1788
-	ldr	r3, [sp, #28]
-	cmp	r0, r3
-	bcc	.L1787
-.L1788:
-	ldr	ip, [sp, #32]
-	ldr	r3, [sp, #12]
-	cmp	ip, r3
-	bne	.L1789
-	ldr	ip, [sp, #16]
-	cmp	r0, ip
-	beq	.L1824
-.L1789:
-	ldr	r3, [sl, #0]
+	bne	.L1969
+	ldr	r10, .L1974+36
+.L1953:
+	ldr	r2, .L1974+4
+	ldr	r3, [r2]
 	adds	r3, r3, #1
-	beq	.L1791
-	ldr	r6, [sl, #12]
-	movw	r3, #61589
-	ldrh	r2, [r6, #0]
+	str	r3, [r2]
+	ldrh	r3, [r10]
+	ldrh	r2, [r4, #2]
+	subs	r3, r3, #1
 	cmp	r2, r3
-	bne	.L1798
-.L1792:
-	ldr	r5, [r6, #4]
-	adds	r3, r5, #1
-	beq	.L1793
-	ldr	sl, .L1835+32
-	mov	r0, r5
-	ldr	r1, [sl, #0]
-	bl	ftl_cmp_data_ver
-	cbz	r0, .L1793
-	adds	r3, r5, #1
-	str	r3, [sl, #0]
-.L1793:
-	ldr	sl, [r6, #8]
-	add	r1, sp, #56
-	ldr	r3, [r6, #12]
-	movs	r2, #0
-	mov	r0, sl
-	str	r3, [sp, #52]
-	bl	log2phys
-	ldr	r0, .L1835+8
-	ldr	r1, [r0, #0]
-	adds	r0, r1, #1
-	beq	.L1794
-	mov	r0, r5
-	bl	ftl_cmp_data_ver
-	cmp	r0, #0
-	beq	.L1794
-	ldr	r3, [sp, #52]
-	adds	r1, r3, #1
-	beq	.L1795
-	ldr	r0, [r7, #0]
-	movs	r2, #0
-	add	r0, r0, r8
-	ldr	r1, [r0, #12]
-	str	r3, [r0, #4]
-	str	r1, [sp, #8]
-	movs	r1, #1
-	bl	FlashReadPages
-	ldr	r3, [sp, #8]
-	ldr	r3, [r3, #4]
-	str	r3, [sp, #36]
-	ldr	r3, [r7, #0]
-	add	fp, r3, r8
-	ldr	r3, [r3, r8]
-	adds	r3, r3, #1
-	bne	.L1796
-	b	.L1797
-.L1795:
-	ldr	r3, [sp, #60]
-	ldr	r2, [sp, #56]
+	bge	.L1954
+	ldrh	r2, [r4]
+	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1798
-	mov	r0, sl
-	add	r1, sp, #52
-	movs	r2, #1
-	bl	log2phys
-.L1798:
-	ldrh	r0, [r4, #0]
-	b	.L1829
-.L1796:
-	ldr	r3, [sp, #8]
-	ldr	r6, [r3, #8]
-	cmp	r6, sl
-	bne	.L1797
-	ldr	r1, .L1835+8
-	ldr	r0, [r1, #0]
-	ldr	r1, [sp, #36]
-	bl	ftl_cmp_data_ver
-	cbz	r0, .L1797
-	ldr	r3, [sp, #56]
-	ldr	r2, [sp, #60]
-	cmp	r3, r2
-	beq	.L1802
-.L1799:
-	ldr	r2, [sp, #52]
-	cmp	r3, r2
-	beq	.L1797
-	adds	r2, r3, #1
-	beq	.L1800
-	ldr	r2, [fp, #12]
-	mov	r0, fp
-	str	r3, [fp, #4]
-	movs	r1, #1
-	str	r2, [sp, #8]
-	movs	r2, #0
-	bl	FlashReadPages
-	b	.L1801
-.L1800:
-	str	r3, [fp, #0]
-.L1801:
-	ldr	r3, [r7, #0]
-	ldr	r3, [r3, r8]
-	adds	r3, r3, #1
-	beq	.L1802
-	ldr	r3, [sp, #8]
-	ldr	r1, .L1835+8
-	ldr	sl, [r3, #4]
-	ldr	r0, [r1, #0]
-	mov	r1, sl
-	bl	ftl_cmp_data_ver
-	cbz	r0, .L1802
-	ldr	r0, [sp, #36]
-	mov	r1, sl
-	bl	ftl_cmp_data_ver
-	cbz	r0, .L1797
-.L1802:
-	mov	r0, r6
-	ldr	r1, [sp, #52]
-	bl	FtlReUsePrevPpa
-.L1797:
-	ldrh	r0, [r4, #0]
-	mov	r3, #-1
-	str	r3, [sp, #52]
-	bl	decrement_vpc_count
-	b	.L1804
-.L1836:
-	.align	2
-.L1835:
-	.word	.LANCHOR9
-	.word	.LANCHOR229
-	.word	.LANCHOR129
-	.word	.LANCHOR41
-	.word	.LANCHOR177
-	.word	.LANCHOR230
-	.word	.LANCHOR110
-	.word	.LANCHOR7
-	.word	.LANCHOR157
-.L1794:
-	ldr	r3, [sp, #60]
-	ldr	r2, [sp, #56]
+	bne	.L1955
+.L1954:
+	mov	r0, r4
+	bl	Ftl_write_map_blk_to_last_page
+.L1955:
+	ldrh	r2, [r4]
+	ldr	r3, [r4, #12]
+	ldrh	r3, [r3, r2, lsl #1]
+	cbnz	r3, .L1956
+	ldr	r1, .L1974+8
+	movw	r2, #731
+	ldr	r0, .L1974+12
+	bl	printf
+	ldr	r1, .L1974+16
+	ldr	r0, .L1974+20
+	bl	printf
+.L1956:
+	ldrh	r2, [r4]
+	ldrh	r3, [r4, #10]
 	cmp	r2, r3
-	beq	.L1804
-	movs	r2, #1
-	mov	r0, sl
-	add	r1, sp, #60
-	bl	log2phys
-	ldr	fp, [sp, #56]
-	cmp	fp, #-1
-	beq	.L1804
-	ldr	r3, [sp, #52]
-	cmp	fp, r3
-	beq	.L1804
-	ubfx	r0, fp, #10, #16
-	bl	P2V_block_in_plane
-	ldr	r3, .L1837
-	ldrh	r3, [r3, #0]
-	cmp	r3, r0
-	beq	.L1805
-	ldr	r3, .L1837+4
-	ldrh	r3, [r3, #0]
-	cmp	r3, r0
-	beq	.L1805
-	ldr	r3, .L1837+8
-	ldrh	r3, [r3, #0]
-	cmp	r3, r0
-	bne	.L1804
-.L1805:
-	ldr	r0, [r7, #0]
-	movs	r1, #1
-	movs	r2, #0
-	str	fp, [r0, #4]
-	ldr	r6, [r0, #12]
-	bl	FlashReadPages
-	ldr	r3, [r7, #0]
-	ldr	r1, [r6, #4]
-	ldr	r3, [r3, #0]
-	adds	r3, r3, #1
-	beq	.L1804
-	mov	r0, r5
-	bl	ftl_cmp_data_ver
-	cbnz	r0, .L1804
-	mov	r0, sl
-	add	r1, sp, #56
-	movs	r2, #1
-	bl	log2phys
-.L1804:
-	ldr	r0, [sp, #52]
-	adds	r3, r0, #1
-	beq	.L1787
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-	ldr	r3, .L1837+12
-	ldrh	r3, [r3, #0]
-	cmp	r3, r0
-	mov	r6, r0
-	bhi	.L1806
-	ldr	r1, .L1837+16
-	movw	r2, #2177
-	ldr	r0, .L1837+20
+	bcc	.L1957
+	ldr	r1, .L1974+8
+	mov	r2, #732
+	ldr	r0, .L1974+12
 	bl	printf
-	ldr	r0, .L1837+24
-	ldr	r1, .L1837+28
+	ldr	r1, .L1974+16
+	ldr	r0, .L1974+20
 	bl	printf
-.L1806:
-	ldr	r3, .L1837+32
-	ldr	r3, [r3, #0]
-	ldrh	r3, [r3, r6, lsl #1]
-	cbz	r3, .L1807
+.L1957:
+	ldrh	r2, [r4]
+	movs	r1, #0
+	ldr	r3, [r4, #12]
+	ldr	r6, .L1974+24
+	ldrh	r7, [r3, r2, lsl #1]
+	movs	r2, #16
+	ldrh	r3, [r4, #2]
+	mov	fp, r6
+	orr	r3, r3, r7, lsl #10
+	str	r3, [r6, #4]
+	ldr	r3, [sp]
+	str	r3, [r6, #8]
+	ldr	r3, .L1974+28
+	ldr	r0, [r3]
+	str	r0, [r6, #12]
+	bl	ftl_memset
+	ldr	r3, [r6, #12]
 	mov	r0, r6
-.L1829:
-	bl	decrement_vpc_count
-	b	.L1787
-.L1807:
-	mov	r1, r6
-	ldr	r0, .L1837+36
+	ldr	r2, [r4, #28]
+	strh	r8, [r3, #8]	@ movhi
+	str	r2, [r3, #4]
+	ldrh	r2, [r4, #4]
+	strh	r7, [r3, #2]	@ movhi
+	strh	r2, [r3]	@ movhi
+	movs	r3, #1
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+	ldrh	r2, [r4, #2]
+	ldr	r1, [r6]
+	adds	r2, r2, #1
+	uxth	r2, r2
+	adds	r3, r1, #1
+	strh	r2, [r4, #2]	@ movhi
+	bne	.L1958
+	ldr	r1, [r6, #4]
+	adds	r5, r5, #1
+	ldr	r0, .L1974+32
+	uxth	r5, r5
 	bl	printf
-	b	.L1787
-.L1791:
-	ldrh	r3, [r4, #0]
-	mov	r1, r6
-	ldr	r2, .L1837+40
-	ldr	r0, .L1837+44
-	strh	r3, [r2, #0]	@ movhi
+	ldrh	r2, [r4, #2]
+	cmp	r2, #2
+	itttt	ls
+	ldrls	r3, .L1974+36
+	ldrhls	r2, [r3]
+	addls	r2, r2, #-1
+	strhls	r2, [r4, #2]	@ movhi
+	cmp	r5, #3
+	bls	.L1953
 	mov	r2, r5
+	ldr	r1, [r6, #4]
+	ldr	r0, .L1974+40
 	bl	printf
-	ldr	r0, .L1837+48
-	ldr	r3, [r0, #0]
-	cmp	r3, #31
-	bhi	.L1808
-	ldr	r2, [sp, #60]
-	ldr	r1, .L1837+52
-	str	r2, [r1, r3, lsl #2]
-	adds	r3, r3, #1
-	str	r3, [r0, #0]
-.L1808:
-	ldrh	r0, [r4, #0]
-	bl	decrement_vpc_count
-	ldr	r2, .L1837+56
-	ldr	r3, [r2, #0]
-	adds	r1, r3, #1
-	bne	.L1809
-	str	r5, [r2, #0]
-	b	.L1787
-.L1809:
-	cmp	r3, r5
-	itt	hi
-	ldrhi	r3, .L1837+56
-	strhi	r5, [r3, #0]
-.L1787:
-	add	r8, r8, #36
-.L1786:
-	ldr	ip, [sp, #40]
-	cmp	r8, ip
-	bne	.L1810
-	ldr	sl, [sp, #32]
-	ldrb	r3, [r4, #8]	@ zero_extendqisi2
-	add	sl, sl, #1
-	cmp	r3, #1
-	uxth	sl, sl
-	bne	.L1811
-	ldr	r3, .L1837+60
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1811
-	ldr	r3, .L1837+64
-	ldrh	r3, [r3, #0]
-	cmp	r3, sl
-	bne	.L1811
-	ldr	r3, [sp, #12]
-	cmp	r3, sl
-	beq	.L1824
-.L1811:
-	ldr	r3, .L1837+68
-	ldrh	r3, [r3, #0]
-	cmp	sl, r3
-	bne	.L1781
-	ldr	r2, .L1837+72
-	movs	r3, #0
-	strh	sl, [r4, #2]	@ movhi
-	strh	r3, [r4, #4]	@ movhi
-	ldrh	r1, [r2, #0]
-	movw	r2, #65535
-	ldr	r0, [sp, #44]
-	b	.L1812
-.L1814:
-	adds	r0, r0, #2
-	ldrh	r5, [r0, #14]
-	cmp	r5, r2
-	beq	.L1813
-.L1830:
-	strb	r3, [r4, #6]
-	b	.L1741
-.L1813:
-	adds	r3, r3, #1
-	uxth	r3, r3
-.L1812:
-	cmp	r3, r1
-	bne	.L1814
-	b	.L1741
-.L1824:
-.L1790:
-	ldr	r6, [sp, #12]
-	mov	r0, r4
-	ldr	r5, [sp, #16]
-	mov	r1, r6
-	mov	r2, r5
-	strh	r6, [r4, #2]	@ movhi
-	strb	r5, [r4, #6]
-.L1831:
-	bl	ftl_sb_update_avl_pages
-.L1741:
+	ldr	r2, [sp, #4]
+	movs	r3, #1
+	str	r3, [r2]
+.L1969:
 	movs	r0, #0
-	add	sp, sp, #64
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1838:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1958:
+	cbz	r1, .L1961
+	cmp	r2, #1
+	strh	r7, [r4, #40]	@ movhi
+	beq	.L1953
+	cmp	r1, #256
+.L1973:
+	beq	.L1953
+	ldr	r2, [fp, #4]
+	ldr	r3, [r4, #24]
+	str	r2, [r3, r8, lsl #2]
+	b	.L1969
+.L1961:
+	cmp	r2, #1
+	b	.L1973
+.L1975:
 	.align	2
-.L1837:
-	.word	.LANCHOR97
-	.word	.LANCHOR98
-	.word	.LANCHOR99
-	.word	.LANCHOR43
-	.word	.LANCHOR228
-	.word	.LC3
+.L1974:
+	.word	.LANCHOR75
+	.word	.LANCHOR163
+	.word	.LANCHOR211
 	.word	.LC4
 	.word	.LC5
-	.word	.LANCHOR89
-	.word	.LC42
-	.word	.LANCHOR229
-	.word	.LC43
-	.word	.LANCHOR231
-	.word	.LANCHOR232
-	.word	.LANCHOR129
-	.word	.LANCHOR7
-	.word	.LANCHOR57
-	.word	.LANCHOR56
-	.word	.LANCHOR41
-	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
-	.section	.text.FtlPowerLostRecovery,"ax",%progbits
+	.word	.LC6
+	.word	.LANCHOR199
+	.word	.LANCHOR185
+	.word	.LC35
+	.word	.LANCHOR52
+	.word	.LC36
+	.size	FtlMapWritePage, .-FtlMapWritePage
+	.section	.text.flush_l2p_region,"ax",%progbits
 	.align	1
-	.global	FtlPowerLostRecovery
+	.global	flush_l2p_region
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlPowerLostRecovery, %function
-FtlPowerLostRecovery:
+	.fpu softvfp
+	.type	flush_l2p_region, %function
+flush_l2p_region:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	movs	r4, #0
-	ldr	r3, .L1840
-	ldr	r5, .L1840+4
-	str	r4, [r3, #0]
-	mov	r0, r5
-	bl	FtlRecoverySuperblock
-	mov	r0, r5
-	ldr	r5, .L1840+8
-	bl	FtlSlcSuperblockCheck
-	mov	r0, r5
-	bl	FtlRecoverySuperblock
-	mov	r0, r5
-	bl	FtlSlcSuperblockCheck
-	bl	FtlGcPageRecovery
-	movw	r0, #65535
-	bl	decrement_vpc_count
-	mov	r0, r4
+	movs	r4, #12
+	ldr	r5, .L1977
+	muls	r4, r0, r4
+	ldr	r0, .L1977+4
+	ldr	r3, [r5]
+	adds	r2, r3, r4
+	ldrh	r1, [r3, r4]
+	ldr	r2, [r2, #8]
+	bl	FtlMapWritePage
+	ldr	r3, [r5]
+	movs	r0, #0
+	add	r4, r4, r3
+	ldr	r3, [r4, #4]
+	bic	r3, r3, #-2147483648
+	str	r3, [r4, #4]
 	pop	{r3, r4, r5, pc}
-.L1841:
+.L1978:
 	.align	2
-.L1840:
-	.word	.LANCHOR231
-	.word	.LANCHOR97
-	.word	.LANCHOR98
-	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
-	.section	.text.FtlSysBlkInit,"ax",%progbits
+.L1977:
+	.word	.LANCHOR95
+	.word	.LANCHOR124
+	.size	flush_l2p_region, .-flush_l2p_region
+	.section	.text.l2p_flush,"ax",%progbits
 	.align	1
-	.global	FtlSysBlkInit
+	.global	l2p_flush
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlSysBlkInit, %function
-FtlSysBlkInit:
+	.fpu softvfp
+	.type	l2p_flush, %function
+l2p_flush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1852
-	movs	r2, #0
 	push	{r4, r5, r6, lr}
-	movw	r4, #65535
-	strh	r2, [r3, #0]	@ movhi
-	ldr	r3, .L1852+4
-	strh	r4, [r3, #0]	@ movhi
-	ldr	r3, .L1852+8
-	ldrh	r0, [r3, #0]
-	bl	FtlFreeSysBlkQueueInit
-	bl	FtlScanSysBlk
-	ldr	r3, .L1852+12
-	ldrh	r3, [r3, #0]
-	cmp	r3, r4
-	beq	.L1848
-	bl	FtlLoadSysInfo
-	mov	r4, r0
-	cmp	r0, #0
-	bne	.L1849
-	bl	FtlLoadMapInfo
-	bl	FtlLoadVonderInfo
-	bl	Ftl_load_ext_data
-	bl	FtlLoadEctTbl
-	bl	FtlFreeSysBLkSort
-	bl	SupperBlkListInit
-	bl	FtlPowerLostRecovery
-	movs	r0, #1
-	bl	FtlUpdateVaildLpn
-	ldr	r3, .L1852+16
-	ldrh	r1, [r3, #0]
-	ldr	r3, .L1852+20
-	ldr	r2, [r3, #0]
-	mov	r3, r4
-	b	.L1844
-.L1846:
-	adds	r0, r2, r4
-	adds	r4, r4, #12
-	ldr	r0, [r0, #4]
-	cmp	r0, #0
-	blt	.L1845
-	adds	r3, r3, #1
-.L1844:
-	cmp	r3, r1
-	blt	.L1846
-	b	.L1851
-.L1845:
-	ldr	r5, .L1852+24
-	movs	r6, #0
-	ldr	r4, .L1852+28
-	mov	r0, r5
-	bl	FtlSuperblockPowerLostFix
-	mov	r0, r4
-	bl	FtlSuperblockPowerLostFix
-	ldr	r3, .L1852+32
-	ldrh	r2, [r5, #0]
-	ldrh	r1, [r5, #4]
-	ldr	r3, [r3, #0]
-	ldrh	r0, [r3, r2, lsl #1]
-	subs	r1, r0, r1
-	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r2, .L1852+36
-	ldrh	r0, [r4, #4]
-	strb	r6, [r5, #6]
-	ldrh	r1, [r2, #0]
-	strh	r6, [r5, #4]	@ movhi
-	strh	r1, [r5, #2]	@ movhi
-	ldrh	r1, [r4, #0]
-	ldrh	r5, [r3, r1, lsl #1]
-	subs	r0, r5, r0
-	strh	r0, [r3, r1, lsl #1]	@ movhi
-	ldrh	r3, [r2, #0]
-	ldr	r0, .L1852+40
-	strb	r6, [r4, #6]
-	strh	r3, [r4, #2]	@ movhi
-	strh	r6, [r4, #4]	@ movhi
-	bl	FtlMapBlkWriteDumpData
-	ldr	r0, .L1852+44
-	bl	FtlMapBlkWriteDumpData
-	ldr	r3, .L1852+48
-	ldrh	r2, [r3, #30]
-	adds	r2, r2, #1
-	strh	r2, [r3, #30]	@ movhi
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
-	bl	FtlVpcTblFlush
-	mov	r0, r6
-	pop	{r4, r5, r6, pc}
-.L1848:
-	mov	r0, #-1
-	pop	{r4, r5, r6, pc}
-.L1849:
-	mov	r0, #-1
-	pop	{r4, r5, r6, pc}
-.L1851:
-	ldr	r3, .L1852
-	ldrh	r0, [r3, #0]
-	cmp	r0, #0
-	bne	.L1845
+	movs	r4, #0
+	ldr	r5, .L1983
+	ldr	r6, .L1983+4
+.L1980:
+	ldrh	r3, [r5]
+	uxth	r0, r4
+	cmp	r3, r0
+	bhi	.L1982
+	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L1853:
+.L1982:
+	ldr	r2, [r6]
+	uxth	r3, r4
+	movs	r1, #12
+	mla	r3, r1, r3, r2
+	ldr	r3, [r3, #4]
+	cmp	r3, #0
+	bge	.L1981
+	bl	flush_l2p_region
+.L1981:
+	adds	r4, r4, #1
+	b	.L1980
+.L1984:
 	.align	2
-.L1852:
-	.word	.LANCHOR230
-	.word	.LANCHOR229
-	.word	.LANCHOR42
-	.word	.LANCHOR196
-	.word	.LANCHOR71
-	.word	.LANCHOR102
-	.word	.LANCHOR97
-	.word	.LANCHOR98
-	.word	.LANCHOR89
+.L1983:
+	.word	.LANCHOR66
+	.word	.LANCHOR95
+	.size	l2p_flush, .-l2p_flush
+	.section	.text.load_l2p_region,"ax",%progbits
+	.align	1
+	.global	load_l2p_region
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	load_l2p_region, %function
+load_l2p_region:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	mov	r7, r0
+	ldr	r3, .L1991
+	mov	r10, r1
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bcs	.L1986
+	ldr	r1, .L1991+4
+	movw	r2, #503
+	ldr	r0, .L1991+8
+	bl	printf
+	ldr	r1, .L1991+12
+	ldr	r0, .L1991+16
+	bl	printf
+.L1986:
+	ldr	r3, .L1991+20
+	movs	r4, #12
+	ldr	r8, .L1991+44
+	ldr	r3, [r3]
+	ldr	r5, [r3, r7, lsl #2]
+	cbnz	r5, .L1987
+	mul	r4, r4, r10
+	ldr	r3, [r8]
+	ldr	r2, .L1991+24
+	movs	r1, #255
+	add	r3, r3, r4
+	ldrh	r2, [r2]
+	ldr	r0, [r3, #8]
+	bl	ftl_memset
+	ldr	r3, [r8]
+	adds	r2, r3, r4
+	strh	r7, [r3, r4]	@ movhi
+	str	r5, [r2, #4]
+.L1988:
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L1987:
+	mul	r4, r4, r10
+	ldr	r3, [r8]
+	ldr	r6, .L1991+28
+	movs	r2, #1
+	mov	r1, r2
+	add	r3, r3, r4
+	mov	r0, r6
+	ldr	r3, [r3, #8]
+	str	r5, [r6, #4]
+	str	r3, [r6, #8]
+	ldr	r3, .L1991+32
+	ldr	r3, [r3]
+	str	r3, [r6, #12]
+	bl	FlashReadPages
+	ldr	r3, [r6]
+	ldr	r10, [r6, #12]
+	cmp	r3, #256
+	bne	.L1989
+	mov	r2, r5
+	mov	r1, r7
+	ldr	r0, .L1991+36
+	lsrs	r5, r5, #10
+	bl	printf
+	ldr	r3, [r8]
+	mov	r1, r7
+	ldr	r0, .L1991+40
+	add	r3, r3, r4
+	ldr	r2, [r3, #8]
+	strh	r5, [r0, #40]	@ movhi
+	bl	FtlMapWritePage
+.L1989:
+	ldrh	r3, [r10, #8]
+	cmp	r3, r7
+	beq	.L1990
+	ldr	r1, .L1991+4
+	movw	r2, #529
+	ldr	r0, .L1991+8
+	bl	printf
+	ldr	r1, .L1991+12
+	ldr	r0, .L1991+16
+	bl	printf
+.L1990:
+	ldr	r3, [r8]
+	movs	r1, #0
+	adds	r2, r3, r4
+	str	r1, [r2, #4]
+	strh	r7, [r3, r4]	@ movhi
+	b	.L1988
+.L1992:
+	.align	2
+.L1991:
+	.word	.LANCHOR65
+	.word	.LANCHOR212
+	.word	.LC4
+	.word	.LC5
+	.word	.LC6
+	.word	.LANCHOR128
 	.word	.LANCHOR56
-	.word	.LANCHOR110
-	.word	.LANCHOR215
-	.word	.LANCHOR131
-	.size	FtlSysBlkInit, .-FtlSysBlkInit
-	.section	.text.rk_ftl_garbage_collect,"ax",%progbits
+	.word	.LANCHOR199
+	.word	.LANCHOR185
+	.word	.LC37
+	.word	.LANCHOR124
+	.word	.LANCHOR95
+	.size	load_l2p_region, .-load_l2p_region
+	.section	.text.log2phys,"ax",%progbits
 	.align	1
-	.global	rk_ftl_garbage_collect
+	.global	log2phys
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	rk_ftl_garbage_collect, %function
-rk_ftl_garbage_collect:
-	@ args = 0, pretend = 0, frame = 32
+	.fpu softvfp
+	.type	log2phys, %function
+log2phys:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1916
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	sub	sp, sp, #32
-	ldr	r2, [r3, #0]
-	cmp	r2, #0
-	bne	.L1905
-	ldr	r3, .L1916+4
-	ldr	r3, [r3, #0]
-	cmp	r3, #0
-	bne	.L1906
-	ldr	r2, .L1916+8
-	ldrh	r2, [r2, #0]
-	cmp	r2, #47
-	bls	.L1907
-	ldr	r3, .L1916+12
-	movw	r5, #65535
-	ldrh	r4, [r3, #0]
-	cmp	r4, r5
-	beq	.L1856
-	ldr	r1, .L1916+16
-	ldrh	r2, [r1, #0]
-	cmp	r2, r5
-	itt	eq
-	strheq	r4, [r1, #0]	@ movhi
-	strheq	r2, [r3, #0]	@ movhi
-.L1856:
-	cmp	r0, #0
-	bne	.L1908
-	ldr	r3, .L1916+20
-	ldrh	r3, [r3, #0]
-	cmp	r3, #24
-	bhi	.L1909
-	ldr	r2, .L1916+24
-	cmp	r3, #16
-	ldrh	r4, [r2, #0]
-	bls	.L1859
-	lsrs	r4, r4, #5
-	b	.L1858
-.L1859:
-	cmp	r3, #12
-	bls	.L1860
-	lsrs	r4, r4, #4
-	b	.L1858
-.L1860:
-	cmp	r3, #8
-	bls	.L1858
-	lsrs	r4, r4, #2
-	b	.L1858
-.L1909:
+	ldr	r3, .L2007
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r7, r1
+	mov	r10, r2
+	ldrh	r4, [r3]
+	adds	r3, r4, #7
 	movs	r4, #1
-.L1858:
-	ldr	r2, .L1916+28
-	ldrh	r1, [r2, #0]
-	cmp	r1, r3
-	mov	r1, r2
-	bcs	.L1862
-	ldr	r3, .L1916+32
-	movw	r0, #65535
-	ldrh	r3, [r3, #0]
-	cmp	r3, r0
-	bne	.L1863
-	ldr	r0, .L1916+16
-	ldrh	r0, [r0, #0]
-	cmp	r0, r3
-	bne	.L1863
-	ldr	r3, .L1916+36
-	ldrh	r0, [r3, #0]
-	cbnz	r0, .L1864
-	ldr	r3, .L1916+40
-	movs	r1, #3
-	ldr	r3, [r3, #0]
-	muls	r1, r3, r1
-	ldr	r3, .L1916+44
-	ldr	r3, [r3, #0]
-	cmp	r3, r1, lsr #2
-	bcs	.L1865
-.L1864:
-	ldr	r3, .L1916+48
-	movs	r2, #3
-	ldrh	r3, [r3, #0]
-	muls	r2, r3, r2
-	ldr	r3, .L1916+28
-	asrs	r2, r2, #2
-	strh	r2, [r3, #0]	@ movhi
-	b	.L1866
-.L1865:
-	movs	r3, #18
-	strh	r3, [r2, #0]	@ movhi
-.L1866:
-	ldr	r3, .L1916+52
-	movs	r2, #0
-	str	r2, [r3, #0]
-	b	.L1855
-.L1863:
-	ldr	r3, .L1916+48
-	movs	r2, #3
-	ldrh	r3, [r3, #0]
-	muls	r3, r2, r3
-	asrs	r3, r3, #2
-	strh	r3, [r1, #0]	@ movhi
-.L1862:
-	ldr	r3, .L1916+56
-	ldrh	r3, [r3, #0]
-	cbz	r3, .L1857
-	adds	r4, r4, #32
+	lsr	r8, r0, r3
+	lsls	r4, r4, r3
+	ldr	r3, .L2007+4
+	subs	r4, r4, #1
+	uxth	r8, r8
+	ands	r4, r4, r0
+	ldr	r3, [r3]
 	uxth	r4, r4
-	b	.L1857
-.L1908:
-	movs	r4, #1
-.L1857:
-	ldr	r3, .L1916+60
-	ldrh	r2, [r3, #0]
-	movw	r3, #65535
-	cmp	r2, r3
-	bne	.L1868
-	ldr	r3, .L1916+16
-	ldrh	r1, [r3, #0]
-	cmp	r1, r2
-	beq	.L1869
-	ldr	r0, .L1916+64
-	ldr	r0, [r0, #0]
-	ldrh	r1, [r0, r1, lsl #1]
-	cbnz	r1, .L1870
-	strh	r2, [r3, #0]	@ movhi
-.L1870:
-	ldrh	r1, [r3, #0]
-	ldr	r2, .L1916+60
-	strh	r1, [r2, #0]	@ movhi
-	movw	r2, #65535
-	strh	r2, [r3, #0]	@ movhi
-.L1869:
-	ldr	r5, .L1916+60
-	movw	r6, #65535
+	cmp	r0, r3
+	bcc	.L1994
+	ldr	r1, .L2007+8
+	movw	r2, #851
+	ldr	r0, .L2007+12
+	bl	printf
+	ldr	r1, .L2007+16
+	ldr	r0, .L2007+20
+	bl	printf
+.L1994:
+	ldr	r6, .L2007+24
+	mov	fp, #12
+	ldr	r3, .L2007+28
+	ldr	r1, [r6]
+	ldrh	r2, [r3]
 	movs	r3, #0
-	ldrh	r0, [r5, #0]
-	strb	r3, [r5, #8]
-	cmp	r0, r6
-	beq	.L1868
-	bl	IsBlkInGcList
-	cbz	r0, .L1871
-	strh	r6, [r5, #0]	@ movhi
-.L1871:
-	ldr	r3, .L1916+68
-	ldr	r6, .L1916+60
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1872
-	ldrh	r0, [r6, #0]
-	bl	ftl_get_blk_mode
-	strb	r0, [r6, #8]
-.L1872:
-	ldrh	r2, [r6, #0]
+.L1995:
+	uxth	r5, r3
+	cmp	r5, r2
+	bcc	.L2000
+	bl	select_l2p_ram_region
+	mul	fp, fp, r0
+	ldr	r3, [r6]
+	mov	r5, r0
+	ldrh	r1, [r3, fp]
+	add	r2, r3, fp
 	movw	r3, #65535
-	ldr	r5, .L1916+60
-	cmp	r2, r3
-	beq	.L1868
-	mov	r0, r5
-	bl	make_superblock
-	ldr	r2, .L1916+72
-	movs	r3, #0
-	strh	r3, [r5, #2]	@ movhi
-	strb	r3, [r5, #6]
-	strh	r3, [r2, #0]	@ movhi
-	ldr	r3, .L1916+64
-	ldrh	r2, [r5, #0]
-	ldr	r3, [r3, #0]
-	ldrh	r2, [r3, r2, lsl #1]
-	ldr	r3, .L1916+76
-	strh	r2, [r3, #0]	@ movhi
-.L1868:
-	ldr	r2, .L1916+60
-	ldr	r1, .L1916+80
-	ldrh	r3, [r2, #0]
-	ldrh	r1, [r1, #0]
 	cmp	r1, r3
-	beq	.L1873
-	ldr	r1, .L1916+84
-	ldrh	r1, [r1, #0]
-	cmp	r1, r3
-	bne	.L1910
-.L1874:
-.L1873:
-	movw	r3, #65535
-	strh	r3, [r2, #0]	@ movhi
-	b	.L1915
-.L1910:
-	ldr	r6, .L1916+88
-	ldr	r7, .L1916+92
-.L1912:
-	ldr	r3, .L1916+60
-	movw	r2, #65535
-	ldrh	r8, [r3, #0]
-	cmp	r8, r2
-	bne	.L1876
-	ldr	r2, .L1916+52
-	mov	sl, r3
-	ldr	fp, .L1916+64
-	movs	r1, #0
-	str	r1, [r2, #0]
-.L1911:
-	ldrh	r1, [r6, #0]
-	mov	r0, r1
-	str	r1, [sp, #8]
-	bl	List_get_gc_head_node
-	uxth	r5, r0
-	strh	r5, [sl, #0]	@ movhi
-	cmp	r5, r8
-	bne	.L1878
-	ldr	r3, .L1916+88
-	movs	r2, #0
-	movs	r0, #8
-	strh	r2, [r3, #0]	@ movhi
-	b	.L1855
-.L1878:
-	mov	r0, r5
-	bl	IsBlkInGcList
-	ldr	r2, [sp, #8]
-	adds	r3, r2, #1
-	cbnz	r0, .L1913
-.L1879:
-	ldr	r1, .L1916+24
-	uxth	r0, r3
-	ldr	r3, [fp, #0]
-	strh	r0, [r6, #0]	@ movhi
-	ldrh	ip, [r1, #0]
-	ldr	r1, .L1916+96
-	ldrh	r2, [r3, r5, lsl #1]
-	ldrh	r1, [r1, #0]
-	mul	r1, r1, ip
-	cmp	r2, r1, asr #1
-	bgt	.L1881
-	cmp	r0, #48
-	bls	.L1882
-	cmp	r2, #8
-	bls	.L1882
-	ldr	r2, .L1916+100
-	ldrh	r2, [r2, #0]
-	cmp	r2, #35
-	bhi	.L1882
-.L1881:
-	movs	r2, #0
-	strh	r2, [r6, #0]	@ movhi
-.L1882:
-	ldrh	r2, [r3, r5, lsl #1]
-	ldr	r3, .L1916+60
-	cmp	r2, r1
-	blt	.L1883
-	movw	r2, #65535
-	strh	r2, [r3, #0]	@ movhi
-	ldr	r3, .L1916+88
-	movs	r2, #0
-	strh	r2, [r3, #0]	@ movhi
-	b	.L1915
-.L1883:
-	cmp	r2, #0
-	bne	.L1884
-	movw	r0, #65535
-	bl	decrement_vpc_count
-	ldrh	r3, [r6, #0]
-	adds	r3, r3, #1
-.L1913:
-	strh	r3, [r6, #0]	@ movhi
-	b	.L1911
-.L1917:
-	.align	2
-.L1916:
-	.word	.LANCHOR82
-	.word	.LANCHOR168
-	.word	.LANCHOR91
-	.word	.LANCHOR138
-	.word	.LANCHOR137
-	.word	.LANCHOR94
-	.word	.LANCHOR56
-	.word	.LANCHOR173
-	.word	.LANCHOR99
-	.word	.LANCHOR233
-	.word	.LANCHOR76
-	.word	.LANCHOR106
-	.word	.LANCHOR201
-	.word	.LANCHOR169
-	.word	.LANCHOR139
-	.word	.LANCHOR202
-	.word	.LANCHOR89
-	.word	.LANCHOR7
-	.word	.LANCHOR234
-	.word	.LANCHOR235
-	.word	.LANCHOR97
-	.word	.LANCHOR98
-	.word	.LANCHOR175
-	.word	.LANCHOR123
-	.word	.LANCHOR41
-	.word	.LANCHOR133
-.L1884:
-	movs	r2, #0
-	strb	r2, [r3, #8]
-	ldr	r2, .L1918
-	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	cbz	r2, .L1885
-	mov	r0, r5
-	str	r3, [sp, #4]
-	bl	ftl_get_blk_mode
-	ldr	r3, [sp, #4]
-	strb	r0, [r3, #8]
-.L1885:
-	ldr	r5, .L1918+4
-	ldr	r3, .L1918+8
-	ldrh	r2, [r5, #0]
-	ldrh	r3, [r3, #0]
-	cmp	r2, r3
-	bne	.L1886
-	ldr	r1, .L1918+12
-	movw	r2, #835
-	ldr	r0, .L1918+16
-	bl	printf
-	ldr	r0, .L1918+20
-	ldr	r1, .L1918+24
-	bl	printf
-.L1886:
-	ldr	r3, .L1918+28
-	ldrh	r2, [r5, #0]
-	ldrh	r3, [r3, #0]
-	cmp	r2, r3
-	bne	.L1887
-	ldr	r1, .L1918+12
-	mov	r2, #836
-	ldr	r0, .L1918+16
-	bl	printf
-	ldr	r0, .L1918+20
-	ldr	r1, .L1918+24
-	bl	printf
-.L1887:
-	ldr	r5, .L1918+4
-	ldr	r3, .L1918+32
-	ldrh	r2, [r5, #0]
-	ldrh	r3, [r3, #0]
-	cmp	r2, r3
-	bne	.L1888
-	ldr	r1, .L1918+12
-	movw	r2, #837
-	ldr	r0, .L1918+16
-	bl	printf
-	ldr	r0, .L1918+20
-	ldr	r1, .L1918+24
-	bl	printf
-.L1888:
-	ldr	r0, .L1918+4
-	bl	make_superblock
-	ldr	r1, .L1918+36
-	movs	r3, #0
-	ldrh	r0, [r5, #0]
-	strh	r3, [r1, #0]	@ movhi
-	ldr	r1, .L1918+40
-	ldr	r1, [r1, #0]
-	ldrh	r0, [r1, r0, lsl #1]
-	ldr	r1, .L1918+44
-	strh	r3, [r5, #2]	@ movhi
-	strb	r3, [r5, #6]
-	strh	r0, [r1, #0]	@ movhi
-.L1876:
-	ldr	r3, .L1918+48
-	movs	r2, #1
-	str	r2, [r3, #0]
-	ldr	r3, .L1918+52
-	ldrh	r3, [r3, #0]
-	str	r3, [sp, #8]
-	ldr	r3, .L1918
-	ldrb	r2, [r3, #0]	@ zero_extendqisi2
-	ldr	r3, .L1918+4
-	cbz	r2, .L1889
-	ldrb	r2, [r3, #8]	@ zero_extendqisi2
-	cmp	r2, #1
-	bne	.L1889
-	ldr	r2, .L1918+56
-	ldrh	r2, [r2, #0]
-	str	r2, [sp, #8]
-.L1889:
-	ldrh	r3, [r3, #2]
-	ldr	r8, [sp, #8]
-	adds	r2, r3, r4
-	cmp	r2, r8
-	itt	gt
-	rsbgt	r4, r3, r8
-	uxthgt	r4, r4
-	movs	r3, #0
-	str	r4, [sp, #20]
-	str	r3, [sp, #12]
-	b	.L1891
-.L1893:
-	ldrh	r1, [r2, #2]!
-	movw	r8, #65535
-	cmp	r1, r8
-	beq	.L1892
-	mla	r8, r0, r5, lr
-	adds	r5, r5, #1
-	orr	r1, r4, r1, lsl #10
-	uxth	r5, r5
-	str	r1, [r8, #4]
-.L1892:
-	adds	r3, r3, #1
-	uxth	r3, r3
-.L1900:
-	cmp	r3, ip
-	bne	.L1893
-	ldr	r3, .L1918+4
+	beq	.L2001
+	ldr	r3, [r2, #4]
+	cmp	r3, #0
+	bge	.L2001
+	bl	flush_l2p_region
+.L2001:
 	mov	r1, r5
-	ldr	r0, [r7, #0]
-	movs	r4, #0
-	mov	sl, r5
-	ldrb	r2, [r3, #8]	@ zero_extendqisi2
-	bl	FlashReadPages
-	str	r4, [sp, #16]
-	b	.L1894
-.L1898:
-	ldr	r3, [r7, #0]
-	adds	r2, r3, r4
-	ldr	r3, [r3, r4]
-	ldr	r5, [r2, #12]
-	adds	r3, r3, #1
-	beq	.L1895
-	ldrh	r3, [r5, #0]
-	movw	r8, #61589
-	cmp	r3, r8
-	bne	.L1895
-	ldr	r8, [r5, #8]
-	cmp	r8, #-1
-	bne	.L1896
-	ldr	r1, .L1918+12
-	mov	r2, #876
-	ldr	r0, .L1918+16
-	bl	printf
-	ldr	r0, .L1918+20
-	ldr	r1, .L1918+24
-	bl	printf
-.L1896:
-	movs	r2, #0
-	add	r1, sp, #28
 	mov	r0, r8
-	bl	log2phys
-	ldr	r2, [r7, #0]
-	ldr	r1, [sp, #28]
-	adds	r2, r2, r4
-	bic	r1, r1, #-2147483648
-	ldr	r3, [r2, #4]
-	cmp	r1, r3
-	bne	.L1895
-	ldr	r0, .L1918+36
-	mov	fp, #36
-	ldr	r8, .L1918+72
-	ldr	r2, [r2, #16]
-	ldrh	r3, [r0, #0]
-	ldr	r1, [r8, #0]
+	bl	load_l2p_region
+	b	.L1996
+.L2000:
 	adds	r3, r3, #1
-	strh	r3, [r0, #0]	@ movhi
-	ldr	r0, .L1918+60
-	ldr	r3, [r0, #0]
-	mla	r3, fp, r1, r3
-	str	r2, [r3, #16]
-	str	r3, [sp, #4]
-	bl	Ftl_get_new_temp_ppa
-	ldr	r3, [sp, #4]
-	ldr	r1, .L1918+60
-	ldr	r2, [r1, #0]
-	str	r0, [r3, #4]
-	ldr	r3, [r8, #0]
-	ldr	r0, [r7, #0]
-	mla	r2, fp, r3, r2
-	adds	r0, r0, r4
-	ldr	fp, .L1918+32
+	mla	r0, fp, r3, r1
+	ldrh	r0, [r0, #-12]
+	cmp	r0, r8
+	bne	.L1995
+.L1996:
+	ldr	r2, [r6]
+	movs	r3, #12
+	mla	r3, r3, r5, r2
+	cmp	r10, #0
+	bne	.L1997
+	ldr	r3, [r3, #8]
+	ldr	r3, [r3, r4, lsl #2]
+	str	r3, [r7]
+.L1998:
+	ldr	r2, [r6]
+	movs	r3, #12
+	mla	r5, r3, r5, r2
+	ldr	r3, [r5, #4]
+	adds	r2, r3, #1
+	beq	.L2004
 	adds	r3, r3, #1
-	ldr	r1, [r0, #8]
-	str	r1, [r2, #8]
-	ldr	r1, [r0, #12]
-	str	r1, [r2, #12]
-	movs	r1, #1
-	ldr	r2, [sp, #28]
-	str	r2, [r5, #12]
-	ldrh	r2, [fp, #0]
-	strh	r2, [r5, #2]	@ movhi
-	ldr	r2, .L1918+64
-	str	r3, [r8, #0]
-	ldr	r2, [r2, #0]
-	str	r2, [r5, #4]
-	bl	FtlGcBufAlloc
-	ldr	r3, .L1918
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbnz	r3, .L1897
-	ldrb	r3, [fp, #7]	@ zero_extendqisi2
-	ldr	r2, [r8, #0]
-	cmp	r2, r3
-	beq	.L1897
-	ldrh	r3, [fp, #4]
-	cbnz	r3, .L1895
-.L1897:
-	bl	Ftl_gc_temp_data_write_back
-	cmp	r0, #0
-	bne	.L1914
-.L1895:
-	ldr	r8, [sp, #16]
-	adds	r4, r4, #36
-	add	r3, r8, #1
-	uxth	r3, r3
-	str	r3, [sp, #16]
-.L1894:
-	ldr	r3, [sp, #16]
-	cmp	r3, sl
-	bne	.L1898
-	ldr	r8, [sp, #12]
-	add	r8, r8, #1
-	str	r8, [sp, #12]
-.L1891:
-	ldr	r8, [sp, #12]
-	ldr	r2, .L1918+4
-	uxth	r3, r8
-	ldr	r8, [sp, #20]
-	cmp	r3, r8
-	bcs	.L1899
-	ldr	r3, .L1918+68
-	movs	r5, #0
-	ldrh	r4, [r2, #2]
-	movs	r0, #36
-	ldr	lr, [r7, #0]
-	adds	r2, r2, #14
-	ldrh	ip, [r3, #0]
-	ldr	r3, [sp, #12]
-	adds	r4, r4, r3
-	mov	r3, r5
-	b	.L1900
-.L1899:
-	ldrh	r3, [r2, #2]
-	ldr	r4, [sp, #20]
-	ldr	r8, [sp, #8]
-	adds	r4, r4, r3
-	uxth	r4, r4
-	strh	r4, [r2, #2]	@ movhi
-	cmp	r4, r8
-	bcc	.L1901
-	ldr	r3, .L1918+72
-	ldr	r3, [r3, #0]
-	cbz	r3, .L1902
-	bl	Ftl_gc_temp_data_write_back
-	cbz	r0, .L1902
-.L1914:
-	ldr	r3, .L1918+48
-	movs	r2, #0
-	str	r2, [r3, #0]
-.L1915:
-	ldr	r3, .L1918+76
-	ldrh	r0, [r3, #0]
-	b	.L1855
-.L1902:
-	ldr	r3, .L1918+36
-	ldrh	r0, [r3, #0]
-	cbnz	r0, .L1903
-	ldr	r3, .L1918+4
-	ldr	r2, .L1918+40
-	ldrh	r1, [r3, #0]
-	ldr	r2, [r2, #0]
-	ldrh	r4, [r2, r1, lsl #1]
-	cbz	r4, .L1903
-	strh	r0, [r2, r1, lsl #1]	@ movhi
-	ldrh	r0, [r3, #0]
-	bl	update_vpc_list
-	bl	FtlCacheWriteBack
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
-.L1903:
-	ldr	r3, .L1918+4
-	movw	r2, #65535
-	strh	r2, [r3, #0]	@ movhi
-.L1901:
-	ldr	r3, .L1918+80
-	ldrh	r0, [r3, #0]
-	cmp	r0, #2
-	bhi	.L1904
-	ldr	r3, .L1918+52
-	ldrh	r4, [r3, #0]
-	b	.L1912
-.L1904:
-	ldr	r3, .L1918+48
-	movs	r2, #0
-	adds	r0, r0, #1
-	str	r2, [r3, #0]
-	b	.L1855
-.L1919:
+	str	r3, [r5, #4]
+.L2004:
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1997:
+	ldr	r1, [r7]
+	ldr	r2, [r3, #8]
+	str	r1, [r2, r4, lsl #2]
+	ldr	r2, [r3, #4]
+	orr	r2, r2, #-2147483648
+	str	r2, [r3, #4]
+	ldr	r3, .L2007+32
+	strh	r8, [r3]	@ movhi
+	b	.L1998
+.L2008:
 	.align	2
-.L1918:
-	.word	.LANCHOR7
-	.word	.LANCHOR202
-	.word	.LANCHOR97
-	.word	.LANCHOR236
-	.word	.LC3
+.L2007:
+	.word	.LANCHOR55
+	.word	.LANCHOR71
+	.word	.LANCHOR213
 	.word	.LC4
 	.word	.LC5
-	.word	.LANCHOR98
-	.word	.LANCHOR99
-	.word	.LANCHOR234
-	.word	.LANCHOR89
-	.word	.LANCHOR235
-	.word	.LANCHOR168
-	.word	.LANCHOR56
-	.word	.LANCHOR57
-	.word	.LANCHOR178
-	.word	.LANCHOR157
-	.word	.LANCHOR41
-	.word	.LANCHOR119
-	.word	.LANCHOR233
-	.word	.LANCHOR94
-.L1905:
-	movs	r0, #0
-	b	.L1855
-.L1906:
-	mov	r0, r2
-	b	.L1855
-.L1907:
-	mov	r0, r3
-.L1855:
-	add	sp, sp, #32
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
-	.section	.text.ftl_fix_nand_power_lost_error,"ax",%progbits
+	.word	.LC6
+	.word	.LANCHOR95
+	.word	.LANCHOR66
+	.word	.LANCHOR96
+	.size	log2phys, .-log2phys
+	.section	.text.FtlReUsePrevPpa,"ax",%progbits
 	.align	1
-	.global	ftl_fix_nand_power_lost_error
+	.global	FtlReUsePrevPpa
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	ftl_fix_nand_power_lost_error, %function
-ftl_fix_nand_power_lost_error:
-	@ args = 0, pretend = 0, frame = 48
+	.fpu softvfp
+	.type	FtlReUsePrevPpa, %function
+FtlReUsePrevPpa:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1929
-	push	{r4, r5, r6, r7, r8, lr}
-	sub	sp, sp, #48
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	mov	r6, r0
+	ldr	r5, .L2019
+	ubfx	r0, r1, #10, #16
+	str	r1, [sp, #4]
+	bl	P2V_block_in_plane
+	ldr	r2, [r5]
+	mov	r7, r0
+	ldrh	r3, [r2, r0, lsl #1]
 	cmp	r3, #0
-	beq	.L1920
-	ldr	r3, .L1929+4
-	ldr	r5, .L1929+8
-	ldr	r8, .L1929+32
-	ldrh	r4, [r3, #0]
-	ldr	r3, [r5, #0]
-	ldr	r7, .L1929+12
+	bne	.L2010
+	ldr	r2, .L2019+4
+	ldr	r4, [r2]
+	cmp	r4, #0
+	beq	.L2011
+	ldr	r2, .L2019+8
+	movw	lr, #65535
+	ldr	ip, .L2019+32
+	ldr	r0, .L2019+12
+	ldr	r2, [r2]
+	ldrh	r1, [r0]
+	mov	r8, r0
+	subs	r4, r4, r2
+	asrs	r4, r4, #1
+	mul	r4, ip, r4
+	mov	ip, #6
+	uxth	r4, r4
+.L2012:
+	uxth	r0, r3
+	cmp	r1, r0
+	bls	.L2011
+	cmp	r4, r7
+	bne	.L2013
 	mov	r1, r4
-	ldr	r0, .L1929+16
-	lsls	r6, r4, #1
-	ldrh	r2, [r3, r4, lsl #1]
+	ldr	r0, .L2019+4
+	bl	List_remove_node
+	ldrh	r3, [r8]
+	cbnz	r3, .L2014
+	ldr	r1, .L2019+16
+	movw	r2, #1823
+	ldr	r0, .L2019+20
 	bl	printf
-	ldrh	r0, [r8, #0]
-	bl	FtlGcRefreshOpenBlock
-	ldrh	r0, [r7, #0]
-	bl	FtlGcRefreshOpenBlock
-	mov	r0, r8
-	bl	allocate_new_data_superblock
-	mov	r0, r7
-	bl	allocate_new_data_superblock
-	movw	r7, #4097
-	b	.L1922
-.L1924:
-	movs	r0, #1
-	mov	r1, r0
-	bl	rk_ftl_garbage_collect
-	ldr	r3, [r5, #0]
-	ldrh	r3, [r3, r6]
-	cbz	r3, .L1923
-.L1922:
-	subs	r7, r7, #1
-	bne	.L1924
-.L1923:
-	ldr	r5, .L1929+8
-	mov	r1, r4
-	ldr	r0, .L1929+16
-	ldr	r3, [r5, #0]
-	ldrh	r2, [r3, r4, lsl #1]
+	ldr	r1, .L2019+24
+	ldr	r0, .L2019+28
 	bl	printf
-	ldr	r3, [r5, #0]
-	ldrh	r5, [r3, r4, lsl #1]
-	cmp	r5, #0
-	bne	.L1925
-	add	r6, sp, #48
-	mov	r0, sp
-	movs	r7, #36
-	strh	r4, [r6, #-48]!	@ movhi
-	adds	r6, r6, #14
-	bl	make_superblock
-	ldr	r3, .L1929+20
-	movw	lr, #65535
-	mov	r1, r5
-	ldrh	r8, [r3, #0]
-	ldr	r3, .L1929+24
-	ldr	ip, [r3, #0]
-	mov	r3, r5
-	b	.L1926
-.L1928:
-	ldrh	r0, [r6, #2]!
-	cmp	r0, lr
-	beq	.L1927
-	mla	r2, r7, r5, ip
-	adds	r5, r5, #1
-	lsls	r0, r0, #10
-	uxth	r5, r5
-	str	r0, [r2, #4]
-	str	r1, [r2, #8]
-	str	r1, [r2, #12]
-.L1927:
+.L2014:
+	ldrh	r3, [r8]
+	mov	r0, r4
+	subs	r3, r3, #1
+	strh	r3, [r8]	@ movhi
+	bl	INSERT_DATA_LIST
+	ldr	r2, [r5]
+	ldrh	r3, [r2, r7, lsl #1]
+.L2010:
 	adds	r3, r3, #1
-	uxth	r3, r3
-.L1926:
-	cmp	r3, r8
-	bne	.L1928
-	ldr	r3, .L1929+8
-	mov	r1, r4
-	ldr	r0, .L1929+28
-	ldr	r3, [r3, #0]
-	ldrh	r2, [r3, r4, lsl #1]
-	ldr	r4, .L1929+24
-	bl	printf
-	movs	r1, #0
-	mov	r2, r5
-	ldr	r0, [r4, #0]
-	bl	FlashEraseBlocks
-	ldr	r0, [r4, #0]
-	movs	r1, #1
-	mov	r2, r5
-	bl	FlashEraseBlocks
-.L1925:
-	ldr	r3, .L1929+4
-	movw	r2, #65535
-	strh	r2, [r3, #0]	@ movhi
-.L1920:
-	add	sp, sp, #48
+	strh	r3, [r2, r7, lsl #1]	@ movhi
+	b	.L2011
+.L2013:
+	mul	r4, ip, r4
+	adds	r3, r3, #1
+	ldrh	r4, [r2, r4]
+	cmp	r4, lr
+	bne	.L2012
+.L2011:
+	movs	r2, #1
+	add	r1, sp, #4
+	mov	r0, r6
+	bl	log2phys
+	add	sp, sp, #8
+	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1930:
-	.align	2
-.L1929:
-	.word	.LANCHOR7
-	.word	.LANCHOR229
-	.word	.LANCHOR89
-	.word	.LANCHOR98
-	.word	.LC44
-	.word	.LANCHOR41
-	.word	.LANCHOR83
-	.word	.LC45
-	.word	.LANCHOR97
-	.size	ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error
-	.section	.text.FtlInit,"ax",%progbits
-	.align	1
-	.global	FtlInit
-	.thumb
-	.thumb_func
-	.type	FtlInit, %function
-FtlInit:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.L1932:
-	push	{r3, r4, r5, lr}
-	mov	r3, #-1
-	ldr	r2, .L1939
-	mov	r5, r0
-	ldr	r4, .L1939+4
-	ldr	r1, .L1939+8
-	ldr	r0, .L1939+12
-	str	r3, [r4, #0]
-	movs	r3, #0
-	str	r3, [r2, #0]
-	ldr	r2, .L1939+16
-	str	r3, [r2, #0]
-	bl	printf
-	mov	r0, r5
-	bl	FtlConstantsInit
-	bl	FtlMemInit
-	bl	FtlVariablesInit
-	ldr	r3, .L1939+20
-	ldrh	r0, [r3, #0]
-	bl	FtlFreeSysBlkQueueInit
-	bl	FtlLoadBbt
-	cbz	r0, .L1933
-	ldr	r0, .L1939+24
-	b	.L1938
-.L1933:
-	bl	FtlSysBlkInit
-	cbz	r0, .L1935
-	ldr	r0, .L1939+28
-.L1938:
-	ldr	r1, .L1939+32
-	bl	printf
-	b	.L1934
-.L1935:
-	movs	r1, #1
-	str	r1, [r4, #0]
-	bl	rk_ftl_garbage_collect
-	ldr	r3, .L1939+36
-	ldrh	r3, [r3, #0]
-	cmp	r3, #15
-	bhi	.L1934
-	mov	r4, #1024
-.L1936:
-	movs	r0, #1
-	mov	r1, r0
-	bl	rk_ftl_garbage_collect
-	subs	r4, r4, #1
-	bne	.L1936
-.L1934:
-	movs	r0, #0
-	pop	{r3, r4, r5, pc}
-.L1940:
+.L2020:
 	.align	2
-.L1939:
-	.word	.LANCHOR237
-	.word	.LANCHOR225
-	.word	.LC46
-	.word	.LC4
+.L2019:
 	.word	.LANCHOR82
-	.word	.LANCHOR42
-	.word	.LC47
-	.word	.LC48
-	.word	.LANCHOR238
-	.word	.LANCHOR94
-	.size	FtlInit, .-FtlInit
-	.section	.text.ftl_write,"ax",%progbits
+	.word	.LANCHOR86
+	.word	.LANCHOR80
+	.word	.LANCHOR87
+	.word	.LANCHOR214
+	.word	.LC4
+	.word	.LC5
+	.word	.LC6
+	.word	-1431655765
+	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
+	.section	.text.FtlVendorPartWrite,"ax",%progbits
 	.align	1
-	.global	ftl_write
+	.global	FtlVendorPartWrite
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	ftl_write, %function
-ftl_write:
-	@ args = 0, pretend = 0, frame = 80
+	.fpu softvfp
+	.type	FtlVendorPartWrite, %function
+FtlVendorPartWrite:
+	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	cmp	r0, #16
-	sub	sp, sp, #80
+	ldr	r3, .L2033
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #56
+	str	r2, [sp]
+	adds	r2, r0, r1
+	mov	r7, r0
 	mov	r5, r1
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bhi	.L2029
+	ldr	r3, .L2033+4
+	mov	r8, #0
+	ldrh	r6, [r3]
+	lsr	r6, r0, r6
+	lsl	fp, r6, #2
+.L2023:
+	cbnz	r5, .L2028
+.L2021:
+	mov	r0, r8
+	add	sp, sp, #56
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2028:
+	ldr	r3, .L2033+8
+	mov	r0, r7
+	ldr	r10, .L2033+24
+	ldr	r3, [r3]
+	ldr	r2, [r3, fp]
+	ldr	r3, .L2033+12
 	str	r2, [sp, #12]
-	str	r3, [sp, #4]
-	bne	.L1942
-	add	r0, r1, #256
-	mov	r1, r2
-	mov	r2, r3
-	bl	FtlVendorPartWrite
-	b	.L1943
-.L1942:
-	ldr	r3, .L1984
-	ldr	r0, [sp, #12]
-	ldr	r3, [r3, #0]
-	adds	r7, r0, r1
-	cmp	r7, r3
-	bhi	.L1974
-	ldr	r3, .L1984+4
-	ldr	r0, [r3, #0]
-	adds	r3, r0, #1
-	beq	.L1943
-	ldr	r3, .L1984+8
-	mov	r2, #2048
-	mov	r0, r1
-	str	r2, [r3, #0]
-	ldr	r3, .L1984+12
-	ldrh	r6, [r3, #0]
-	mov	r1, r6
-	bl	__aeabi_uidiv
-	mov	r1, r6
-	mov	sl, r0
-	subs	r0, r7, #1
-	bl	__aeabi_uidiv
-	ldr	r3, .L1984+16
-	ldr	r2, [r3, #0]
-	rsb	r4, sl, r0
-	str	r0, [sp, #24]
-	adds	r1, r4, #1
-	str	r1, [sp, #0]
-	adds	r2, r1, r2
-	str	r2, [r3, #0]
-	ldr	r3, .L1984+20
-	ldr	r7, [r3, #0]
-	cbz	r7, .L1944
-	ldr	r3, [r7, #16]
-	cmp	sl, r3
-	beq	.L1945
-	bl	FtlCacheWriteBack
-	b	.L1944
-.L1945:
-	ldr	r3, .L1984+24
-	mov	r1, r6
-	mov	r0, r5
-	ldr	r2, [r3, #0]
-	adds	r2, r2, #1
-	str	r2, [r3, #0]
+	ldrh	r3, [r3]
+	mov	r1, r3
+	str	r3, [sp, #8]
 	bl	__aeabi_uidivmod
+	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #12]
-	ldr	r0, [r7, #8]
-	subs	r6, r6, r1
-	add	r0, r0, r1, lsl #9
-	cmp	r6, r2
-	it	cs
-	movcs	r6, r2
-	ldr	r1, [sp, #4]
-	lsl	r8, r6, #9
-	mov	r2, r8
-	bl	memcpy
-	cmp	r4, #0
-	beq	.L1976
-	ldr	r3, [sp, #12]
-	adds	r5, r5, r6
-	ldr	r0, [sp, #4]
-	add	sl, sl, #1
-	subs	r3, r3, r6
-	str	r3, [sp, #12]
-	add	r0, r0, r8
-	str	r0, [sp, #4]
-	bl	FtlCacheWriteBack
-	str	r4, [sp, #0]
-.L1944:
-	mov	r4, sl
-	str	sl, [sp, #20]
-	ldr	r6, .L1984+28
-	mov	sl, r5
-	b	.L1946
-.L1973:
-	ldr	r1, .L1984+32
-	ldrb	r2, [r6, #6]	@ zero_extendqisi2
-	ldrh	r3, [r1, #0]
-	cmp	r2, r3
-	bcc	.L1947
-	ldr	r1, .L1984+36
-	movw	r2, #1630
-	ldr	r0, .L1984+40
-	bl	printf
-	ldr	r0, .L1984+44
-	ldr	r1, .L1984+48
-	bl	printf
-.L1947:
-	ldr	r2, .L1984+28
-	ldrh	r3, [r2, #4]
-	cbnz	r3, .L1948
-	bl	FtlCacheWriteBack
-	ldr	r0, .L1984+28
-	bl	allocate_new_data_superblock
-.L1948:
-	ldrb	r3, [r6, #7]	@ zero_extendqisi2
-	ldrh	r2, [r6, #4]
-	ldr	r1, .L1984+32
-	lsls	r3, r3, #2
-	ldr	r0, [sp, #0]
-	cmp	r3, r2
-	it	cs
-	movcs	r3, r2
-	ldrb	r2, [r6, #6]	@ zero_extendqisi2
-	cmp	r3, r0
+	str	r1, [sp, #4]
+	subs	r4, r3, r1
+	uxth	r4, r4
+	cmp	r5, r4
 	it	cc
-	movcc	r0, r3
-	ldrh	r3, [r1, #0]
-	str	r0, [sp, #8]
-	cmp	r2, r3
-	bcc	.L1949
-	ldr	r1, .L1984+36
-	movw	r2, #1663
-	ldr	r0, .L1984+40
-	bl	printf
-	ldr	r0, .L1984+44
-	ldr	r1, .L1984+48
-	bl	printf
-.L1949:
-	movs	r3, #0
-	ldr	r5, .L1984+52
-	str	r3, [sp, #16]
-	b	.L1950
-.L1969:
-	ldrh	r3, [r6, #4]
-	cmp	r3, #0
-	beq	.L1977
-	movs	r2, #0
-	add	r1, sp, #76
-	mov	r0, r4
-	movs	r7, #36
-	bl	log2phys
-	ldr	r0, .L1984+28
-	bl	get_new_active_ppa
-	ldr	r3, [sp, #16]
-	muls	r7, r3, r7
-	ldr	r3, [r5, #0]
-	adds	r3, r3, r7
-	str	r4, [r3, #16]
-	str	r0, [r3, #4]
-	ldr	r0, .L1984+56
-	ldrh	r2, [r0, #0]
-	ldr	r0, [sp, #16]
-	mul	r1, r2, r0
-	lsrs	r1, r1, #2
-	str	r1, [sp, #32]
-	ldr	r1, .L1984+60
-	ldr	r0, [sp, #32]
-	ldr	r1, [r1, #0]
-	add	r8, r1, r0, lsl #2
-	str	r8, [r3, #12]
-	str	r1, [sp, #36]
-	mov	r0, r8
-	movs	r1, #0
-	bl	memset
-	ldr	r1, [sp, #20]
-	ldr	r3, .L1984+12
-	cmp	r4, r1
-	beq	.L1952
-	ldr	r2, [sp, #24]
-	cmp	r4, r2
-	bne	.L1979
-	b	.L1983
-.L1952:
-	ldrh	fp, [r3, #0]
-	mov	r0, sl
-	mov	r1, fp
-	bl	__aeabi_uidivmod
-	ldr	r3, [sp, #12]
-	rsb	fp, r1, fp
-	str	r1, [sp, #28]
-	cmp	fp, r3
-	it	cs
-	movcs	fp, r3
-	b	.L1955
-.L1983:
-	ldr	r0, [sp, #12]
-	ldrh	fp, [r3, #0]
-	movs	r3, #0
-	add	r2, sl, r0
-	str	r3, [sp, #28]
-	mls	fp, r4, fp, r2
-	uxth	fp, fp
-.L1955:
-	ldr	r3, .L1984+12
-	ldrh	r3, [r3, #0]
-	cmp	fp, r3
-	bne	.L1956
-	ldr	r0, [sp, #20]
-	ldr	r3, [r5, #0]
-	cmp	r4, r0
-	add	r7, r3, r7
-	bne	.L1957
-	ldr	r1, [sp, #4]
-	str	r1, [r7, #8]
-	b	.L1958
-.L1957:
-	mul	r3, fp, r4
-	ldr	r2, [sp, #4]
-	rsb	r3, sl, r3
-	add	r3, r2, r3, lsl #9
-	b	.L1982
-.L1956:
-	ldr	r3, [sp, #20]
+	uxthcc	r4, r5
+	cbz	r2, .L2025
 	cmp	r4, r3
-	ldr	r3, [r5, #0]
-	it	eq
-	ldreq	r2, .L1984+64
-	add	r3, r3, r7
-	it	ne
-	ldrne	r2, .L1984+68
-	ldr	r2, [r2, #0]
-	str	r2, [r3, #8]
-	ldr	r3, [sp, #76]
-	adds	r1, r3, #1
-	beq	.L1961
-	str	r3, [sp, #44]
-	movs	r1, #1
-	ldr	r3, [r5, #0]
-	add	r0, sp, #40
-	str	r4, [sp, #56]
-	adds	r3, r3, r7
-	ldr	r2, [r3, #8]
-	ldr	r3, [r3, #12]
-	str	r2, [sp, #48]
-	movs	r2, #0
-	str	r3, [sp, #52]
+	beq	.L2025
+	ldr	r3, [r10]
+	add	r0, sp, #20
+	str	r2, [sp, #24]
+	movs	r2, #1
+	mov	r1, r2
+	str	r3, [sp, #28]
+	movs	r3, #0
+	str	r3, [sp, #32]
 	bl	FlashReadPages
-	ldr	r3, [sp, #40]
-	adds	r3, r3, #1
-	bne	.L1962
-	ldr	r3, .L1984+72
-	ldr	r2, [r3, #72]
-	adds	r2, r2, #1
-	str	r2, [r3, #72]
-	b	.L1963
-.L1962:
-	ldr	r1, [r8, #8]
-	cmp	r1, r4
-	beq	.L1964
-	ldr	r3, .L1984+72
-	ldr	r0, .L1984+76
-	ldr	r2, [r3, #72]
-	adds	r2, r2, #1
-	str	r2, [r3, #72]
-	mov	r2, r4
-	bl	printf
-.L1964:
-	ldr	r3, [r8, #8]
-	cmp	r3, r4
-	beq	.L1963
-	ldr	r1, .L1984+36
-	movw	r2, #1716
-	ldr	r0, .L1984+40
-	bl	printf
-	ldr	r1, .L1984+48
-	ldr	r0, .L1984+44
-	bl	printf
-	b	.L1963
-.L1961:
-	ldr	r3, [r5, #0]
-	movs	r1, #0
-	adds	r3, r3, r7
-	ldr	r0, [r3, #8]
-	ldr	r3, .L1984+80
-	ldrh	r2, [r3, #0]
-	bl	memset
-.L1963:
-	ldr	r0, [sp, #20]
-	ldr	r3, [r5, #0]
-	cmp	r4, r0
-	add	r3, r3, r7
-	bne	.L1965
-	ldr	r0, [r3, #8]
-	ldr	r3, [sp, #28]
-	ldr	r1, [sp, #4]
+.L2026:
+	lsls	r3, r4, #9
+	ldr	r0, [r10]
+	subs	r5, r5, r4
+	mov	r2, r3
+	str	r3, [sp, #8]
+	ldm	sp, {r1, r3}
+	add	r7, r7, r4
+	add	fp, fp, #4
 	add	r0, r0, r3, lsl #9
-	b	.L1981
-.L1985:
+	bl	ftl_memcpy
+	ldr	r2, [r10]
+	mov	r1, r6
+	ldr	r0, .L2033+16
+	adds	r6, r6, #1
+	bl	FtlMapWritePage
+	ldr	r3, [sp]
+	adds	r0, r0, #1
+	it	eq
+	moveq	r8, #-1
+	mov	r2, r3
+	ldr	r3, [sp, #8]
+	add	r2, r2, r3
+	str	r2, [sp]
+	b	.L2023
+.L2025:
+	ldr	r3, .L2033+20
+	movs	r1, #0
+	ldr	r0, [r10]
+	ldrh	r2, [r3]
+	bl	ftl_memset
+	b	.L2026
+.L2029:
+	mov	r8, #-1
+	b	.L2021
+.L2034:
 	.align	2
-.L1984:
-	.word	.LANCHOR72
-	.word	.LANCHOR225
-	.word	.LANCHOR239
-	.word	.LANCHOR59
+.L2033:
+	.word	.LANCHOR48
+	.word	.LANCHOR55
+	.word	.LANCHOR191
+	.word	.LANCHOR54
+	.word	.LANCHOR215
+	.word	.LANCHOR56
+	.word	.LANCHOR182
+	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
+	.section	.text.Ftl_save_ext_data,"ax",%progbits
+	.align	1
+	.global	Ftl_save_ext_data
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	Ftl_save_ext_data, %function
+Ftl_save_ext_data:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r2, .L2037
+	ldr	r3, .L2037+4
+	ldr	r1, [r2]
+	cmp	r1, r3
+	bne	.L2035
+	ldr	r3, .L2037+8
+	movs	r1, #1
+	movs	r0, #0
+	str	r3, [r2, #4]
+	ldr	r3, .L2037+12
+	ldr	r3, [r3]
+	str	r3, [r2, #88]
+	ldr	r3, .L2037+16
+	ldr	r3, [r3]
+	str	r3, [r2, #92]
+	ldr	r3, .L2037+20
+	ldr	r3, [r3]
+	str	r3, [r2, #8]
+	ldr	r3, .L2037+24
+	ldr	r3, [r3]
+	str	r3, [r2, #12]
+	ldr	r3, .L2037+28
+	ldr	r3, [r3]
+	str	r3, [r2, #16]
+	ldr	r3, .L2037+32
+	ldr	r3, [r3]
+	str	r3, [r2, #20]
+	ldr	r3, .L2037+36
+	ldr	r3, [r3]
+	str	r3, [r2, #28]
+	ldr	r3, .L2037+40
+	ldr	r3, [r3]
+	str	r3, [r2, #32]
+	ldr	r3, .L2037+44
+	ldr	r3, [r3]
+	str	r3, [r2, #36]
+	ldr	r3, .L2037+48
+	ldr	r3, [r3]
+	str	r3, [r2, #40]
+	ldr	r3, .L2037+52
+	ldr	r3, [r3]
+	str	r3, [r2, #44]
+	ldr	r3, .L2037+56
+	ldr	r3, [r3]
+	str	r3, [r2, #48]
+	ldr	r3, .L2037+60
+	ldr	r3, [r3]
+	str	r3, [r2, #60]
+	ldr	r3, .L2037+64
+	ldr	r3, [r3]
+	str	r3, [r2, #64]
+	b	FtlVendorPartWrite
+.L2035:
+	bx	lr
+.L2038:
+	.align	2
+.L2037:
+	.word	.LANCHOR136
+	.word	1179929683
+	.word	1342177351
+	.word	.LANCHOR216
+	.word	.LANCHOR217
 	.word	.LANCHOR159
-	.word	.LANCHOR125
+	.word	.LANCHOR160
+	.word	.LANCHOR164
+	.word	.LANCHOR163
+	.word	.LANCHOR166
+	.word	.LANCHOR78
 	.word	.LANCHOR161
-	.word	.LANCHOR97
-	.word	.LANCHOR41
-	.word	.LANCHOR240
-	.word	.LC3
-	.word	.LC4
-	.word	.LC5
-	.word	.LANCHOR179
-	.word	.LANCHOR62
-	.word	.LANCHOR185
-	.word	.LANCHOR182
-	.word	.LANCHOR183
-	.word	.LANCHOR132
-	.word	.LC49
-	.word	.LANCHOR61
-.L1965:
-	ldr	r2, .L1986
-	ldr	r0, [r3, #8]
-	ldrh	r1, [r2, #0]
-	muls	r1, r4, r1
-	ldr	r2, [sp, #4]
-	rsb	r1, sl, r1
-	add	r1, r2, r1, lsl #9
-.L1981:
-	lsl	r2, fp, #9
-	bl	memcpy
-	ldr	r3, [sp, #24]
-	cmp	r4, r3
-	bne	.L1958
-	ldrh	r3, [r6, #4]
-	cbz	r3, .L1958
-	ldr	r3, [r5, #0]
-	adds	r7, r3, r7
-	ldr	r3, .L1986+4
-	str	r7, [r3, #0]
-	ldr	r3, .L1986+8
-	str	r6, [r3, #0]
-	b	.L1958
-.L1979:
-	ldr	r2, [r5, #0]
-	ldrh	r3, [r3, #0]
-	muls	r3, r4, r3
-	ldr	r0, [sp, #4]
-	rsb	r3, sl, r3
-	adds	r7, r2, r7
-	add	r3, r0, r3, lsl #9
-.L1982:
-	str	r3, [r7, #8]
-.L1958:
-	ldr	r1, .L1986+12
-	ldrb	r2, [r6, #6]	@ zero_extendqisi2
-	ldrh	r3, [r1, #0]
-	cmp	r2, r3
-	bcc	.L1967
-	ldr	r1, .L1986+16
-	movw	r2, #1737
-	ldr	r0, .L1986+20
-	bl	printf
-	ldr	r0, .L1986+24
-	ldr	r1, .L1986+28
-	bl	printf
-.L1967:
-	ldr	r2, [sp, #36]
-	movw	r3, #61589
-	ldr	r0, [sp, #32]
-	strh	r3, [r2, r0, lsl #2]	@ movhi
-	ldr	r3, .L1986+32
-	ldr	r2, [r3, #0]
-	str	r2, [r8, #4]
-	adds	r2, r2, #1
-	str	r2, [r3, #0]
-	adds	r2, r2, #1
-	bne	.L1968
-	movs	r2, #0
-	str	r2, [r3, #0]
-.L1968:
-	ldr	r3, [sp, #76]
-	str	r4, [r8, #8]
-	adds	r4, r4, #1
-	str	r3, [r8, #12]
-	ldrh	r3, [r6, #0]
-	strh	r3, [r8, #2]	@ movhi
-	ldr	r3, [sp, #16]
+	.word	.LANCHOR162
+	.word	.LANCHOR167
+	.word	.LANCHOR168
+	.word	.LANCHOR156
+	.word	.LANCHOR155
+	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
+	.section	.text.FtlEctTblFlush,"ax",%progbits
+	.align	1
+	.global	FtlEctTblFlush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlEctTblFlush, %function
+FtlEctTblFlush:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	ldr	r3, .L2046
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L2044
+	ldr	r3, .L2046+4
+	ldr	r3, [r3]
+	cmp	r3, #29
+	ite	hi
+	movhi	r3, #32
+	movls	r3, #4
+.L2040:
+	ldr	r1, .L2046+8
+	ldrh	r2, [r1]
+	cmp	r2, #31
+	ittt	ls
+	addls	r2, r2, #1
+	movls	r3, #1
+	strhls	r2, [r1]	@ movhi
+	ldr	r2, .L2046+12
+	cbnz	r0, .L2042
+	ldr	r1, [r2]
+	ldr	r0, [r1, #20]
+	ldr	r1, [r1, #16]
+	add	r3, r3, r0
+	cmp	r1, r3
+	bcc	.L2043
+.L2042:
+	ldr	r2, [r2]
+	movs	r0, #64
+	ldr	r3, [r2, #16]
+	str	r3, [r2, #20]
+	ldr	r3, .L2046+16
+	str	r3, [r2]
+	ldr	r3, .L2046+20
+	ldrh	r1, [r3]
+	lsls	r3, r1, #9
+	str	r3, [r2, #12]
+	ldr	r3, [r2, #8]
 	adds	r3, r3, #1
-	str	r3, [sp, #16]
-.L1950:
-	ldr	r3, [sp, #16]
-	ldr	r0, [sp, #8]
-	cmp	r3, r0
-	bne	.L1969
-	b	.L1951
-.L1977:
-	ldr	r3, [sp, #16]
-	str	r3, [sp, #8]
-.L1951:
-	ldr	r3, .L1986+4
-	ldr	r3, [r3, #0]
-	cbz	r3, .L1970
-	ldr	r0, [sp, #8]
-	subs	r0, r0, #1
-	str	r0, [sp, #8]
-	beq	.L1971
-	ldr	r1, [sp, #0]
-	subs	r1, r1, #1
-	str	r1, [sp, #0]
-.L1970:
-	ldr	r3, .L1986+36
-	movs	r2, #0
-	ldr	r1, [sp, #8]
-	ldr	r0, [r3, #0]
-	ldr	r3, .L1986+40
-	bl	FtlProgPages
-	ldr	r2, [sp, #0]
-	ldr	r3, [sp, #8]
-	cmp	r2, r3
-	bcs	.L1972
-	ldr	r1, .L1986+16
-	mov	r2, #1752
-	ldr	r0, .L1986+20
-	bl	printf
-	ldr	r0, .L1986+24
-	ldr	r1, .L1986+28
-	bl	printf
-.L1972:
-	ldr	r0, [sp, #0]
-	ldr	r1, [sp, #8]
-	subs	r0, r0, r1
-	str	r0, [sp, #0]
-.L1946:
-	ldr	r2, [sp, #0]
-	cmp	r2, #0
-	bne	.L1973
-.L1971:
-	ldr	sl, [sp, #20]
-	movs	r0, #0
-	ldr	r3, [sp, #24]
-	rsb	r1, sl, r3
-	bl	rk_ftl_garbage_collect
+	str	r3, [r2, #8]
+	movs	r3, #0
+	str	r3, [r2, #4]
+	bl	FtlVendorPartWrite
+	bl	Ftl_save_ext_data
+.L2043:
 	movs	r0, #0
-	b	.L1943
-.L1974:
-	mov	r0, #-1
-	b	.L1943
-.L1976:
-	mov	r0, r4
-.L1943:
-	add	sp, sp, #80
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1987:
+	pop	{r3, pc}
+.L2044:
+	movs	r3, #32
+	b	.L2040
+.L2047:
 	.align	2
-.L1986:
-	.word	.LANCHOR59
-	.word	.LANCHOR125
-	.word	.LANCHOR224
-	.word	.LANCHOR41
-	.word	.LANCHOR240
-	.word	.LC3
-	.word	.LC4
-	.word	.LC5
-	.word	.LANCHOR157
-	.word	.LANCHOR179
-	.word	.LANCHOR97
-	.size	ftl_write, .-ftl_write
-	.section	.text.ftl_read,"ax",%progbits
+.L2046:
+	.word	.LANCHOR101
+	.word	.LANCHOR168
+	.word	.LANCHOR218
+	.word	.LANCHOR188
+	.word	1112818501
+	.word	.LANCHOR187
+	.size	FtlEctTblFlush, .-FtlEctTblFlush
+	.section	.text.allocate_new_data_superblock,"ax",%progbits
 	.align	1
-	.global	ftl_read
+	.global	allocate_new_data_superblock
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	ftl_read, %function
-ftl_read:
-	@ args = 0, pretend = 0, frame = 72
+	.fpu softvfp
+	.type	allocate_new_data_superblock, %function
+allocate_new_data_superblock:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	cmp	r0, #16
-	sub	sp, sp, #72
-	mov	r4, r1
-	mov	r7, r3
-	str	r2, [sp, #36]
-	bne	.L1989
-	add	r0, r1, #256
-	mov	r1, r2
-	mov	r2, r3
-	bl	FtlVendorPartRead
-	str	r0, [sp, #12]
-	b	.L1990
-.L1989:
-	ldr	r3, [sp, #36]
-	adds	r3, r3, r1
-	str	r3, [sp, #16]
-	ldr	r3, .L2022
-	ldr	r1, [sp, #16]
-	ldr	r3, [r3, #0]
-	cmp	r1, r3
-	bhi	.L2010
-	ldr	r3, .L2022+4
-	ldr	r3, [r3, #0]
-	adds	r2, r3, #1
-	beq	.L2011
-	ldr	fp, .L2022+48
-	bl	FtlCacheWriteBack
-	mov	r0, r4
-	mov	sl, #0
-	mov	r8, r4
-	ldrh	r5, [fp, #0]
-	mov	r1, r5
-	bl	__aeabi_uidiv
-	ldr	r3, [sp, #16]
-	mov	r1, r5
-	mov	r5, sl
-	str	r0, [sp, #20]
-	subs	r0, r3, #1
-	bl	__aeabi_uidiv
-	ldr	r1, [sp, #20]
-	ldr	r6, [sp, #20]
-	rsb	r3, r1, #1
-	str	sl, [sp, #32]
-	str	sl, [sp, #12]
-	adds	r3, r3, r0
-	str	r3, [sp, #8]
-	ldr	r3, .L2022+8
-	ldr	r1, [sp, #8]
-	str	r0, [sp, #24]
-	ldr	r2, [r3, #0]
-	adds	r2, r1, r2
-	str	r2, [r3, #0]
-	b	.L2017
-.L2009:
-	movs	r2, #0
-	mov	r0, r6
-	add	r1, sp, #68
-	bl	log2phys
-	ldr	r3, [sp, #68]
-	adds	r0, r3, #1
-	bne	.L2018
-	b	.L2021
-.L1995:
-	mla	r0, r0, r6, r4
-	cmp	r0, r8
-	bcc	.L1994
-	ldr	r3, [sp, #16]
-	cmp	r0, r3
-	bcs	.L1994
-	rsb	r0, r8, r0
-	movs	r1, #0
-	mov	r2, #512
-	add	r0, r7, r0, lsl #9
-	bl	memset
-.L1994:
-	adds	r4, r4, #1
-	b	.L1992
-.L2021:
-	movs	r4, #0
-.L1992:
-	ldrh	r0, [fp, #0]
-	cmp	r4, r0
-	bcc	.L1995
-	b	.L1996
-.L2018:
-	ldr	r2, .L2022+12
-	movs	r4, #36
-	ldr	r2, [r2, #0]
-	mla	r4, r4, r5, r2
-	str	r3, [r4, #4]
-	ldr	r3, [sp, #20]
-	cmp	r6, r3
-	bne	.L1997
-	ldr	r3, .L2022+16
-	mov	r0, r8
-	ldr	r3, [r3, #0]
-	str	r3, [r4, #8]
-	ldrh	r3, [fp, #0]
-	mov	r1, r3
-	str	r3, [sp, #4]
-	bl	__aeabi_uidivmod
-	ldr	r3, [sp, #4]
-	str	r1, [sp, #40]
-	subs	r2, r3, r1
-	ldr	r1, [sp, #36]
-	cmp	r2, r1
-	it	cc
-	movcc	r1, r2
-	str	r1, [sp, #32]
-	cmp	r1, r3
-	bne	.L1998
-	str	r7, [r4, #8]
-	b	.L1998
-.L1997:
-	ldr	r3, [sp, #24]
-	cmp	r6, r3
-	bne	.L1999
-	ldr	r3, .L2022+20
-	ldrh	r2, [fp, #0]
-	ldr	r1, [sp, #16]
-	ldr	r3, [r3, #0]
-	str	r3, [r4, #8]
-	mul	r3, r2, r6
-	rsb	sl, r3, r1
-	cmp	sl, r2
-	bne	.L1998
-	b	.L2019
-.L1999:
-	ldrh	r3, [fp, #0]
-	muls	r3, r6, r3
-.L2019:
-	rsb	r3, r8, r3
-	add	r3, r7, r3, lsl #9
-	str	r3, [r4, #8]
-.L1998:
-	ldr	r3, .L2022+24
-	ldr	r2, .L2022+28
-	str	r6, [r4, #16]
-	ldrh	r3, [r3, #0]
-	muls	r3, r5, r3
-	ldr	r2, [r2, #0]
-	adds	r5, r5, #1
-	bic	r3, r3, #3
-	adds	r3, r2, r3
-	str	r3, [r4, #12]
-.L1996:
-	ldr	r3, [sp, #8]
-	adds	r6, r6, #1
-	subs	r3, r3, #1
-	str	r3, [sp, #8]
-	beq	.L2000
-	ldr	r3, .L2022+32
-	ldrh	r3, [r3, #0]
-	cmp	r5, r3, lsl #2
-	bne	.L2017
-.L2000:
-	cmp	r5, #0
-	beq	.L2017
-	ldr	r4, .L2022+12
-	mov	r1, r5
-	movs	r2, #0
-	ldr	r0, [r4, #0]
-	bl	FlashReadPages
-	ldr	r3, [sp, #40]
-	str	r6, [sp, #60]
-	lsls	r3, r3, #9
-	str	r3, [sp, #44]
-	ldr	r3, [sp, #32]
-	lsls	r3, r3, #9
-	str	r3, [sp, #48]
-	lsl	r3, sl, #9
-	str	r3, [sp, #52]
-	movs	r3, #0
-	str	r3, [sp, #28]
-.L2008:
-	movs	r6, #36
-	ldr	r3, [sp, #28]
-	muls	r6, r3, r6
-	ldr	r3, [r4, #0]
-	ldr	r1, [sp, #20]
-	adds	r3, r3, r6
-	ldr	r2, [r3, #16]
-	cmp	r2, r1
-	bne	.L2002
-	ldr	r1, [r3, #8]
-	ldr	r3, .L2022+16
-	ldr	r3, [r3, #0]
-	cmp	r1, r3
-	bne	.L2003
-	ldr	r3, [sp, #44]
-	mov	r0, r7
-	ldr	r2, [sp, #48]
-	adds	r1, r1, r3
-	b	.L2020
-.L2002:
-	ldr	r1, [sp, #24]
-	cmp	r2, r1
-	bne	.L2003
-	ldr	r2, .L2022+20
-	ldr	r1, [r3, #8]
-	ldr	r3, [r2, #0]
-	cmp	r1, r3
-	bne	.L2003
-	ldrh	r0, [fp, #0]
-	ldr	r3, [sp, #24]
-	muls	r0, r3, r0
-	rsb	r0, r8, r0
-	ldr	r2, [sp, #52]
-	add	r0, r7, r0, lsl #9
-.L2020:
-	bl	memcpy
-.L2003:
-	ldr	r3, [r4, #0]
-	adds	r2, r3, r6
-	ldr	r3, [r3, r6]
-	adds	r1, r3, #1
-	bne	.L2004
-	ldr	r2, .L2022+36
-	str	r3, [sp, #12]
-	ldr	r1, [r2, #72]
-	adds	r1, r1, #1
-	str	r1, [r2, #72]
-	b	.L2005
-.L2004:
-	cmp	r3, #256
-	bne	.L2005
-	ldr	r0, [r2, #4]
-	movw	r6, #2049
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-	str	r0, [sp, #56]
-	bl	FtlGcRefreshBlock
-.L2007:
-	subs	r6, r6, #1
-	beq	.L2006
-	movs	r0, #1
-	mov	r1, r0
-	bl	rk_ftl_garbage_collect
-	ldr	r1, .L2022+40
-	ldr	r2, [sp, #56]
-	ldrh	r3, [r1, #0]
-	cmp	r3, r2
-	beq	.L2007
-.L2006:
-	bl	FtlSysFlush
-.L2005:
-	ldr	r3, [sp, #28]
-	adds	r3, r3, #1
-	str	r3, [sp, #28]
+	ldr	r3, .L2075
+	push	{r4, r5, r6, lr}
+	mov	r4, r0
+	ldrh	r5, [r0]
+	ldrh	r3, [r3]
 	cmp	r3, r5
-	bne	.L2008
-	ldr	r6, [sp, #60]
-	movs	r5, #0
-.L2017:
-	ldr	r3, [sp, #8]
+	bcs	.L2049
+	ldr	r1, .L2075+4
+	movw	r2, #2939
+	ldr	r0, .L2075+8
+	bl	printf
+	ldr	r1, .L2075+12
+	ldr	r0, .L2075+16
+	bl	printf
+.L2049:
+	ldr	r3, .L2075+20
+	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L2009
-	ldr	r3, .L2022+44
-	ldrh	r3, [r3, #0]
-	cbz	r3, .L1990
-	ldr	r0, [sp, #8]
-	movs	r1, #1
-	bl	rk_ftl_garbage_collect
-	b	.L1990
-.L2010:
-	mov	r3, #-1
-.L2011:
-	str	r3, [sp, #12]
-.L1990:
-	ldr	r0, [sp, #12]
-	add	sp, sp, #72
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L2023:
+	bne	.L2050
+	movw	r3, #65535
+	cmp	r5, r3
+	beq	.L2051
+	ldr	r3, .L2075+24
+	mov	r0, r5
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r5, lsl #1]
+	cbz	r3, .L2052
+	bl	INSERT_DATA_LIST
+.L2051:
+	movs	r3, #0
+	strb	r3, [r4, #8]
+	ldr	r3, .L2075+28
+	cmp	r4, r3
+	beq	.L2053
+	ldr	r3, .L2075+32
+	ldrh	r2, [r3]
+	cmp	r2, #1
+	beq	.L2053
+	ldr	r3, .L2075+36
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2054
+.L2053:
+	movs	r3, #1
+	strb	r3, [r4, #8]
+.L2055:
+	ldr	r6, .L2075+40
+	movw	r2, #65535
+	ldrh	r0, [r6]
+	cmp	r0, r2
+	beq	.L2060
+	cmp	r5, r0
+	bne	.L2061
+	ldr	r3, .L2075+24
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r0, lsl #1]
+	cbz	r3, .L2062
+.L2061:
+	bl	update_vpc_list
+.L2062:
+	movw	r3, #65535
+	strh	r3, [r6]	@ movhi
+.L2060:
+	mov	r0, r4
+	bl	allocate_data_superblock
+	bl	l2p_flush
+	movs	r0, #0
+	bl	FtlEctTblFlush
+	bl	FtlVpcTblFlush
+.L2050:
+	movs	r0, #0
+	pop	{r4, r5, r6, pc}
+.L2052:
+	bl	INSERT_FREE_LIST
+	b	.L2051
+.L2054:
+	ldr	r3, .L2075+44
+	cmp	r4, r3
+	bne	.L2055
+	cmp	r2, #3
+	beq	.L2057
+	ldr	r2, .L2075+48
+	ldr	r2, [r2]
+	cmp	r2, #1
+	bne	.L2058
+.L2057:
+	movs	r2, #1
+	strb	r2, [r3, #8]
+.L2058:
+	ldr	r2, .L2075+52
+	ldr	r2, [r2]
+	cmp	r2, #0
+	beq	.L2055
+	ldr	r2, .L2075+56
+	ldr	r2, [r2]
+	cmp	r2, #29
+	itt	ls
+	movls	r2, #1
+	strbls	r2, [r3, #8]
+	b	.L2055
+.L2076:
 	.align	2
-.L2022:
-	.word	.LANCHOR72
-	.word	.LANCHOR225
-	.word	.LANCHOR163
-	.word	.LANCHOR177
-	.word	.LANCHOR182
-	.word	.LANCHOR183
-	.word	.LANCHOR62
-	.word	.LANCHOR185
-	.word	.LANCHOR41
-	.word	.LANCHOR132
-	.word	.LANCHOR202
-	.word	.LANCHOR139
-	.word	.LANCHOR59
-	.size	ftl_read, .-ftl_read
-	.section	.text.FlashReadFacBbtData,"ax",%progbits
+.L2075:
+	.word	.LANCHOR38
+	.word	.LANCHOR219
+	.word	.LC4
+	.word	.LC5
+	.word	.LC6
+	.word	.LANCHOR75
+	.word	.LANCHOR82
+	.word	.LANCHOR91
+	.word	.LANCHOR42
+	.word	.LANCHOR8
+	.word	.LANCHOR130
+	.word	.LANCHOR90
+	.word	.LANCHOR156
+	.word	.LANCHOR101
+	.word	.LANCHOR168
+	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
+	.section	.text.FtlProgPages,"ax",%progbits
 	.align	1
-	.global	FlashReadFacBbtData
+	.global	FtlProgPages
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FlashReadFacBbtData, %function
-FlashReadFacBbtData:
-	@ args = 0, pretend = 0, frame = 48
+	.fpu softvfp
+	.type	FtlProgPages, %function
+FtlProgPages:
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	mov	r3, r2
-	ldr	r2, .L2033
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r6, r1
-	ldrh	sl, [r2, #14]
-	sub	sp, sp, #48
-	ldrh	r1, [r2, #12]
-	mov	r4, r0
-	ldr	r2, .L2033+4
-	movw	fp, #61664
-	ldr	r7, .L2033+8
-	mul	sl, sl, r1
-	ldr	r2, [r2, #0]
-	str	r2, [sp, #20]
-	ldr	r2, [r7, #0]
-	uxth	sl, sl
-	add	r5, sl, #-1
-	mul	r8, sl, r6
-	str	r2, [sp, #24]
-	uxth	r5, r5
-	sub	sl, sl, #15
-	b	.L2025
-.L2031:
-	add	r2, r5, r8
-	movs	r1, #1
-	add	r0, sp, #12
-	str	r3, [sp, #4]
-	lsls	r2, r2, #10
-	str	r2, [sp, #16]
-	mov	r2, r1
-	bl	FlashReadPages
-	ldr	r2, [sp, #12]
-	ldr	r3, [sp, #4]
-	adds	r2, r2, #1
-	beq	.L2026
-	ldr	r2, [r7, #0]
-	ldrh	r2, [r2, #0]
-	cmp	r2, fp
-	bne	.L2026
-	cbz	r4, .L2032
-	cbnz	r6, .L2028
-	ldr	r2, .L2033+4
-	movs	r0, #1
-	ldr	r5, .L2033+12
-	ldr	r2, [r2, #0]
-	b	.L2029
-.L2030:
-	ubfx	r1, r6, #5, #16
-	and	r7, r6, #31
-	adds	r6, r6, #1
-	lsl	r7, r0, r7
-	ldr	lr, [r2, r1, lsl #2]
-	uxth	r6, r6
-	orr	r7, lr, r7
-	str	r7, [r2, r1, lsl #2]
-.L2029:
-	ldr	r1, [r5, #0]
-	cmp	r6, r1
-	bcc	.L2030
-.L2028:
-	ldr	r2, .L2033+4
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r3
+	ldr	r3, .L2096
+	mov	r5, r0
+	mov	r8, r1
+	ldrb	r6, [r3]	@ zero_extendqisi2
+	cbz	r6, .L2078
+	ldrb	r6, [r4, #8]	@ zero_extendqisi2
+	subs	r3, r6, #1
+	rsbs	r6, r3, #0
+	adcs	r6, r6, r3
+.L2078:
+	ldr	r10, .L2096+32
+	movs	r7, #0
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	mov	r2, r6
+	mov	r1, r8
+	mov	r0, r5
+	bl	FlashProgPages
+.L2079:
+	cmp	r7, r8
+	beq	.L2088
+	ldr	fp, .L2096+36
+	b	.L2089
+.L2082:
+	ldr	r0, [r5, #4]
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	ldrh	r3, [r4]
+	cmp	r3, r0
+	bne	.L2080
+	ldr	r1, [r10]
+	ldrh	r0, [r4, #4]
+	ldrh	r2, [r1, r3, lsl #1]
+	subs	r2, r2, r0
+	strh	r2, [r1, r3, lsl #1]	@ movhi
+	ldrh	r3, [fp]
+	strh	r3, [r4, #2]	@ movhi
+	movs	r3, #0
+	strb	r3, [r4, #6]
+	strh	r3, [r4, #4]	@ movhi
+.L2080:
+	ldrh	r3, [r4, #4]
+	cbnz	r3, .L2081
 	mov	r0, r4
-	ldr	r1, [r2, #0]
-	mov	r2, r3
-	bl	memcpy
-	movs	r2, #4
-	ldr	r0, .L2033+16
-	mov	r1, r4
-	mov	r3, r2
-	bl	rknand_print_hex
-	movs	r0, #0
-	b	.L2027
-.L2026:
-	subs	r5, r5, #1
-	uxth	r5, r5
-.L2025:
-	cmp	sl, r5
-	ble	.L2031
-	mov	r0, #-1
-	b	.L2027
-.L2032:
+	bl	allocate_new_data_superblock
+.L2081:
+	ldr	r2, .L2096+4
+	ldr	r3, [r2, #96]
+	adds	r3, r3, #1
+	str	r3, [r2, #96]
+	ldr	r0, [r5, #4]
+	ubfx	r0, r0, #10, #16
+	bl	FtlGcMarkBadPhyBlk
 	mov	r0, r4
-.L2027:
-	add	sp, sp, #48
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L2034:
+	bl	get_new_active_ppa
+	mov	r2, r6
+	str	r0, [r5, #4]
+	str	r0, [sp, #12]
+	movs	r1, #1
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	mov	r0, r5
+	bl	FlashProgPages
+.L2089:
+	ldr	r3, [r5]
+	adds	r3, r3, #1
+	beq	.L2082
+	ldr	r3, .L2096+8
+	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L2083
+	ldr	r1, .L2096+12
+	movw	r2, #1550
+	ldr	r0, .L2096+16
+	bl	printf
+	ldr	r1, .L2096+20
+	ldr	r0, .L2096+24
+	bl	printf
+.L2083:
+	ldr	r3, [r5, #4]
+	cbnz	r6, .L2084
+.L2095:
+	movs	r2, #1
+	add	r1, sp, #12
+	ldr	r0, [r5, #16]
+	str	r3, [sp, #12]
+	bl	log2phys
+	ldr	r3, [r5, #12]
+	ldr	r3, [r3, #12]
+	ubfx	r0, r3, #10, #16
+	str	r3, [sp, #4]
+	bl	P2V_block_in_plane
+	ldr	r3, [sp, #4]
+	mov	fp, r0
+	adds	r3, r3, #1
+	beq	.L2086
+	ldr	r3, [r10]
+	ldrh	r2, [r3, r0, lsl #1]
+	cbnz	r2, .L2087
+	mov	r1, r0
+	ldr	r0, .L2096+28
+	bl	printf
+.L2087:
+	mov	r0, fp
+	bl	decrement_vpc_count
+.L2086:
+	adds	r7, r7, #1
+	adds	r5, r5, #36
+	b	.L2079
+.L2084:
+	orr	r3, r3, #-2147483648
+	b	.L2095
+.L2088:
+	ldr	r3, .L2096+8
+	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L2077
+	ldr	r1, .L2096+12
+	movw	r2, #1567
+	ldr	r0, .L2096+16
+	bl	printf
+	ldr	r1, .L2096+20
+	ldr	r0, .L2096+24
+	bl	printf
+.L2077:
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2097:
 	.align	2
-.L2033:
-	.word	.LANCHOR28
-	.word	.LANCHOR146
-	.word	.LANCHOR241
-	.word	.LANCHOR148
-	.word	.LC50
-	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
-	.section	.text.FlashGetBadBlockList,"ax",%progbits
+.L2096:
+	.word	.LANCHOR8
+	.word	.LANCHOR136
+	.word	.LANCHOR36
+	.word	.LANCHOR220
+	.word	.LC4
+	.word	.LC5
+	.word	.LC6
+	.word	.LC38
+	.word	.LANCHOR82
+	.word	.LANCHOR51
+	.size	FtlProgPages, .-FtlProgPages
+	.section	.text.FtlCacheWriteBack,"ax",%progbits
 	.align	1
-	.global	FlashGetBadBlockList
+	.global	FtlCacheWriteBack
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FlashGetBadBlockList, %function
-FlashGetBadBlockList:
+	.fpu softvfp
+	.type	FtlCacheWriteBack, %function
+FtlCacheWriteBack:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	mov	r5, r0
-	ldr	r3, .L2042
-	ldr	r6, .L2042+4
-	ldr	r3, [r3, #0]
-	ldr	r0, [r6, #0]
-	ldrb	r2, [r3, #13]	@ zero_extendqisi2
-	ldrh	r4, [r3, #14]
-	muls	r4, r2, r4
-	uxth	r4, r4
-	adds	r2, r4, #7
-	lsrs	r2, r2, #3
-	bl	FlashReadFacBbtData
-	adds	r0, r0, #1
-	beq	.L2041
+	push	{r4, lr}
+	ldr	r4, .L2103
+	ldr	r0, [r4]
+	cbz	r0, .L2099
+	ldr	r3, .L2103+4
 	movs	r2, #0
-	lsrs	r0, r4, #4
-	ldr	r6, [r6, #0]
-	mov	r3, r2
-	subs	r4, r4, #1
 	movs	r1, #1
-	b	.L2037
-.L2039:
-	lsrs	r7, r2, #5
-	and	ip, r2, #31
-	lsl	ip, r1, ip
-	ldr	r7, [r6, r7, lsl #2]
-	tst	ip, r7
-	beq	.L2038
-	strh	r2, [r5, r3, lsl #1]	@ movhi
-	adds	r3, r3, #1
-	uxth	r3, r3
-.L2038:
-	cmp	r3, r0
-	bcs	.L2041
-	adds	r2, r2, #1
-	uxth	r2, r2
-.L2037:
-	cmp	r2, r4
-	blt	.L2039
-	b	.L2036
-.L2041:
+	ldr	r3, [r3]
+	bl	FtlProgPages
 	movs	r3, #0
-.L2036:
-	movw	r2, #65535
+	str	r3, [r4]
+.L2099:
 	movs	r0, #0
-	strh	r2, [r5, r3, lsl #1]	@ movhi
-	pop	{r3, r4, r5, r6, r7, pc}
-.L2043:
+	pop	{r4, pc}
+.L2104:
 	.align	2
-.L2042:
-	.word	.LANCHOR23
-	.word	.LANCHOR143
-	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
-	.section	.text.FtlMakeBbt,"ax",%progbits
+.L2103:
+	.word	.LANCHOR129
+	.word	.LANCHOR221
+	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
+	.section	.text.ftl_discard,"ax",%progbits
 	.align	1
-	.global	FtlMakeBbt
+	.global	ftl_discard
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlMakeBbt, %function
-FtlMakeBbt:
+	.fpu softvfp
+	.type	ftl_discard, %function
+ftl_discard:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2063
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	ldr	r4, [r3, #0]
-	cmp	r4, #0
-	bne	.L2045
-	ldr	r5, .L2063+4
-	bl	FtlBbtMemInit
-	ldr	r6, .L2063+8
-	bl	FtlLoadFactoryBbt
-	add	r2, r5, #12
-	str	r2, [sp, #4]
-	b	.L2046
-.L2052:
-	ldr	r3, .L2063+12
-	ldr	r2, [sp, #4]
-	ldr	r8, .L2063+24
-	ldr	r0, [r3, #0]
-	ldr	r3, .L2063+16
-	str	r0, [r8, #8]
-	ldr	sl, [r3, #0]
-	ldrh	r3, [r2], #2
-	str	sl, [r8, #12]
-	str	r2, [sp, #4]
-	movw	r2, #65535
-	cmp	r3, r2
-	beq	.L2047
-	ldrh	r7, [r6, #0]
-	movs	r1, #1
-	mov	r2, r1
-	mov	r0, r8
-	mla	r7, r7, r4, r3
-	lsls	r3, r7, #10
-	str	r3, [r8, #4]
-	bl	FlashReadPages
-	ldrh	r2, [r6, #0]
-	ldr	r0, [r5, #28]
-	adds	r2, r2, #7
-	ldr	r1, [r8, #8]
-	lsrs	r2, r2, #3
-	bl	memcpy
-	b	.L2048
-.L2047:
+	ldr	r3, .L2120
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	mov	r5, r2
+	adds	r2, r1, r2
+	mov	r6, r1
+	ldr	r3, [r3]
+	cmp	r2, r3
+	bhi	.L2113
+	cmp	r5, #31
+	bhi	.L2107
+.L2112:
+	movs	r0, #0
+.L2105:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L2107:
+	ldr	r8, .L2120+12
+	bl	FtlCacheWriteBack
+	mov	r0, r6
+	ldrh	r4, [r8]
 	mov	r1, r4
-	bl	FlashGetBadBlockList
-	ldr	r1, [r5, #28]
-	ldr	r0, [r8, #8]
-	bl	FtlBbt2Bitmap
-	ldrh	fp, [r6, #0]
-	mov	r3, r5
-	mov	r5, r4
-	add	fp, fp, #-1
-	mov	r4, sl
-	mov	sl, r3
-	uxth	fp, fp
-	b	.L2061
-.L2050:
-	add	fp, fp, #-1
-	uxth	fp, fp
-.L2061:
-	ldrh	r0, [r6, #0]
-	mla	r0, r5, r0, fp
-	uxth	r0, r0
-	bl	FtlBbmIsBadBlock
-	cmp	r0, #1
-	beq	.L2050
-	ldr	r3, [sp, #4]
-	movs	r1, #0
-	ldr	r2, .L2063+16
-	strh	fp, [r3, #-2]	@ movhi
-	ldr	r0, [r2, #0]
-	movs	r2, #16
-	bl	memset
-	ldr	r2, [sp, #4]
-	movw	r3, 61664	@ movhi
-	ldrh	r7, [r6, #0]
-	strh	r3, [r4, #0]	@ movhi
-	movs	r3, #0
-	str	r3, [r4, #4]
-	ldrh	r3, [r2, #-2]
-	ldr	r0, [r8, #8]
-	mla	r7, r7, r5, r3
-	strh	r3, [r4, #2]	@ movhi
-	ldr	r1, [sl, #28]
-	lsls	r3, r7, #10
-	str	r3, [r8, #4]
-	ldr	r3, .L2063+20
-	ldrh	r2, [r3, #0]
-	lsls	r2, r2, #2
-	bl	memcpy
-	movs	r1, #1
-	mov	r2, r1
-	ldr	r0, .L2063+24
-	bl	FlashEraseBlocks
-	movs	r1, #1
-	mov	r3, r1
-	ldr	r0, .L2063+24
-	mov	r2, r1
-	bl	FlashProgPages
-	ldr	r3, [r8, #0]
-	adds	r3, r3, #1
-	bne	.L2062
-	uxth	r0, r7
-	bl	FtlBbmMapBadBlock
-	b	.L2061
-.L2062:
-	mov	r4, r5
-	mov	r5, sl
-.L2048:
-	uxth	r0, r7
-	adds	r4, r4, #1
-	bl	FtlBbmMapBadBlock
-	adds	r5, r5, #4
-.L2046:
-	ldr	r2, .L2063+28
-	ldrh	r3, [r2, #0]
-	cmp	r4, r3
-	bcc	.L2052
-	movs	r4, #0
-	ldr	r5, .L2063+32
-	b	.L2053
-.L2054:
-	mov	r0, r4
-	adds	r4, r4, #1
-	bl	FtlBbmMapBadBlock
-	uxth	r4, r4
-.L2053:
-	ldrh	r3, [r5, #0]
-	cmp	r3, r4
-	bhi	.L2054
-	ldr	r5, .L2063+4
-	movw	r6, #65535
-	ldrh	r4, [r5, #12]
-	subs	r4, r4, #1
-	uxth	r4, r4
-	b	.L2055
-.L2060:
-	mov	r0, r4
-	bl	FtlBbmIsBadBlock
-	cmp	r0, #1
-	beq	.L2056
-	mov	r0, r4
-	bl	FlashTestBlk
-	cbz	r0, .L2057
-	mov	r0, r4
-	bl	FtlBbmMapBadBlock
-	b	.L2056
-.L2057:
-	ldrh	r3, [r5, #0]
-	cmp	r3, r6
-	bne	.L2058
-	strh	r4, [r5, #0]	@ movhi
-	b	.L2056
-.L2058:
-	ldr	r3, .L2063+4
-	strh	r4, [r3, #4]	@ movhi
-	b	.L2059
-.L2056:
-	subs	r4, r4, #1
+	bl	__aeabi_uidiv
+	smulbb	r3, r0, r4
+	mov	r7, r0
+	subs	r6, r6, r3
+	uxth	r6, r6
+	cbz	r6, .L2108
+	subs	r4, r4, r6
+	adds	r7, r7, #1
+	cmp	r4, r5
+	it	cs
+	movcs	r4, r5
 	uxth	r4, r4
-.L2055:
-	ldrh	r3, [r5, #12]
-	subs	r3, r3, #47
-	cmp	r3, r4
-	ble	.L2060
-.L2059:
-	ldr	r4, .L2063+4
-	movs	r5, #0
-	ldr	r3, .L2063+36
-	movs	r2, #2
-	movs	r1, #1
-	str	r5, [r4, #8]
-	ldr	r0, [r3, #0]
-	ldrh	r3, [r4, #0]
-	strh	r5, [r4, #2]	@ movhi
-	lsls	r3, r3, #10
-	str	r3, [r0, #4]
-	ldrh	r3, [r4, #4]
-	lsls	r3, r3, #10
-	str	r3, [r0, #40]
-	bl	FlashEraseBlocks
-	ldrh	r0, [r4, #0]
-	bl	FtlBbmMapBadBlock
-	ldrh	r0, [r4, #4]
-	bl	FtlBbmMapBadBlock
-	bl	FtlBbmTblFlush
-	ldr	r3, [r4, #8]
-	ldrh	r2, [r4, #4]
+	subs	r5, r5, r4
+.L2108:
+	ldr	r4, .L2120+4
+	mov	r3, #-1
+	ldr	r6, .L2120+8
+	str	r3, [sp, #4]
+.L2109:
+	ldrh	r3, [r8]
+	cmp	r5, r3
+	bcs	.L2111
+	ldr	r3, .L2120+4
+	ldr	r2, [r3]
+	cmp	r2, #32
+	bls	.L2112
+	movs	r4, #0
+	str	r4, [r3]
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	b	.L2112
+.L2111:
+	movs	r2, #0
+	mov	r1, sp
+	mov	r0, r7
+	bl	log2phys
+	ldr	r3, [sp]
 	adds	r3, r3, #1
-	str	r3, [r4, #8]
-	ldrh	r3, [r4, #0]
-	strh	r5, [r4, #2]	@ movhi
-	strh	r2, [r4, #0]	@ movhi
-	strh	r3, [r4, #4]	@ movhi
-	bl	FtlBbmTblFlush
-.L2045:
-	movs	r0, #0
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L2064:
+	beq	.L2110
+	ldr	r3, [r4]
+	movs	r2, #1
+	add	r1, sp, #4
+	mov	r0, r7
+	adds	r3, r3, #1
+	str	r3, [r4]
+	ldr	r3, [r6]
+	adds	r3, r3, #1
+	str	r3, [r6]
+	bl	log2phys
+	ldr	r0, [sp]
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	bl	decrement_vpc_count
+.L2110:
+	ldrh	r3, [r8]
+	adds	r7, r7, #1
+	subs	r5, r5, r3
+	b	.L2109
+.L2113:
+	mov	r0, #-1
+	b	.L2105
+.L2121:
 	.align	2
-.L2063:
-	.word	.LANCHOR82
-	.word	.LANCHOR78
+.L2120:
+	.word	.LANCHOR67
+	.word	.LANCHOR222
+	.word	.LANCHOR161
 	.word	.LANCHOR54
-	.word	.LANCHOR86
-	.word	.LANCHOR184
-	.word	.LANCHOR79
-	.word	.LANCHOR198
-	.word	.LANCHOR48
-	.word	.LANCHOR63
-	.word	.LANCHOR83
-	.size	FtlMakeBbt, .-FtlMakeBbt
-	.section	.text.FtlLowFormat,"ax",%progbits
+	.size	ftl_discard, .-ftl_discard
+	.section	.text.FtlSysFlush,"ax",%progbits
 	.align	1
-	.global	FtlLowFormat
+	.global	FtlSysFlush
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlLowFormat, %function
-FtlLowFormat:
+	.fpu softvfp
+	.type	FtlSysFlush, %function
+FtlSysFlush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2086
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	ldr	r3, [r3, #0]
-	cmp	r3, #0
-	bne	.L2066
-	ldr	r2, .L2086+4
-	str	r3, [r2, #0]
-	ldr	r2, .L2086+8
-	str	r3, [r2, #0]
-	ldr	r3, .L2086+12
-	ldrh	r0, [r3, #0]
-	bl	FtlFreeSysBlkQueueInit
-	bl	FtlLoadBbt
-	cbz	r0, .L2067
-	bl	FtlMakeBbt
-.L2067:
-	ldr	r3, .L2086+16
-	ldr	r2, .L2086+20
-	ldrh	r4, [r3, #0]
-	ldr	r3, .L2086+24
-	lsls	r4, r4, #7
-	ldr	r0, [r3, #0]
-	ldr	r3, .L2086+28
-	ldr	r1, [r3, #0]
-	movs	r3, #0
-	b	.L2068
-.L2069:
-	mvns	r5, r3
-	orr	r5, r3, r5, lsl #16
-	str	r5, [r0, r3, lsl #2]
-	str	r2, [r1, r3, lsl #2]
-	adds	r3, r3, #1
-	uxth	r3, r3
-.L2068:
-	cmp	r3, r4
-	blt	.L2069
-	ldr	r3, .L2086+32
-	movs	r4, #0
-	ldr	r6, .L2086+36
-	ldrh	r5, [r3, #0]
-	b	.L2070
-.L2071:
-	mov	r0, r5
-	movs	r1, #1
-	bl	FtlLowFormatEraseBlock
-	adds	r5, r5, #1
-	uxth	r5, r5
-	adds	r4, r4, r0
-	uxth	r4, r4
-.L2070:
-	ldrh	r3, [r6, #0]
-	cmp	r3, r5
-	bhi	.L2071
-	ldr	r3, .L2086+40
-	ldrh	r1, [r3, #0]
-	subs	r3, r4, #2
-	cmp	r3, r1, lsl #1
-	bgt	.L2072
-.L2076:
-	movs	r4, #0
-	ldr	r6, .L2086+32
-	mov	r5, r4
-	b	.L2073
-.L2072:
-	mov	r0, r4
-	ldr	r5, .L2086+36
-	bl	__aeabi_uidiv
-	ldr	r3, .L2086+44
-	ldr	r3, [r3, #0]
-	adds	r0, r0, r3
-	uxth	r0, r0
-	bl	FtlSysBlkNumInit
-	ldr	r3, .L2086+12
-	ldrh	r0, [r3, #0]
-	bl	FtlFreeSysBlkQueueInit
-	ldr	r3, .L2086+32
-	ldrh	r4, [r3, #0]
-	b	.L2074
-.L2075:
-	mov	r0, r4
-	movs	r1, #1
-	bl	FtlLowFormatEraseBlock
-	adds	r4, r4, #1
-	uxth	r4, r4
-.L2074:
-	ldrh	r3, [r5, #0]
-	cmp	r3, r4
-	bhi	.L2075
-	b	.L2076
-.L2077:
-	mov	r0, r5
-	movs	r1, #0
-	bl	FtlLowFormatEraseBlock
-	adds	r5, r5, #1
-	uxth	r5, r5
-	adds	r4, r4, r0
-	uxth	r4, r4
-.L2073:
-	ldrh	r3, [r6, #0]
-	cmp	r3, r5
-	bhi	.L2077
-	ldr	r3, .L2086+36
-	ldr	r8, .L2086+68
-	ldr	sl, .L2086+72
-	ldrh	r2, [r3, #0]
-	ldr	r3, .L2086+48
-	str	r2, [r3, #0]
-	ldr	r3, .L2086+52
-	ldr	fp, [r3, #0]
-	ldr	r3, .L2086+40
-	mov	r0, fp
-	ldrh	r5, [r3, #0]
-	mov	r1, r5
-	bl	__aeabi_uidiv
-	ubfx	r7, r0, #5, #16
-	mov	r6, r0
-	add	r3, r7, #36
-	strh	r3, [r8, #0]	@ movhi
-	movs	r3, #24
-	muls	r3, r5, r3
-	cmp	r4, r3
-	str	r0, [sl, #0]
-	ble	.L2078
-	rsb	r0, r4, fp
-	mov	r1, r5
-	bl	__aeabi_uidiv
-	str	r0, [sl, #0]
-	lsrs	r0, r0, #5
-	adds	r0, r0, #24
-	strh	r0, [r8, #0]	@ movhi
-.L2078:
-	ldr	r3, .L2086+56
-	ldr	r3, [r3, #0]
-	cmp	r3, #1
-	bne	.L2079
-	mov	r0, r4
-	mov	r1, r5
-	bl	__aeabi_uidiv
-	ldr	r8, .L2086+68
-	ldrh	sl, [r8, #0]
-	uxtah	r0, sl, r0
-	add	sl, sl, r0, lsr #2
-	strh	sl, [r8, #0]	@ movhi
-.L2079:
-	ldr	r3, .L2086+60
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L2080
-	mov	r0, r4
-	mov	r1, r5
-	bl	__aeabi_uidiv
-	ldr	r8, .L2086+68
-	ldrh	sl, [r8, #0]
-	uxtah	r0, sl, r0
-	add	sl, sl, r0, lsr #2
-	strh	sl, [r8, #0]	@ movhi
-.L2080:
-	ldr	r3, .L2086+64
-	ldrh	r3, [r3, #0]
-	cbz	r3, .L2081
-	ldr	r2, .L2086+68
-	ldrh	r1, [r2, #0]
-	add	r1, r1, r3, lsr #1
-	strh	r1, [r2, #0]	@ movhi
-	mul	r1, r5, r3
-	cmp	r1, r4
-	ble	.L2081
-	ldr	r1, .L2086+72
-	adds	r3, r3, #32
-	adds	r7, r7, r3
-	strh	r7, [r2, #0]	@ movhi
-	str	r6, [r1, #0]
-.L2081:
-	ldr	r3, .L2086+72
-	ldr	r2, .L2086+68
-	ldr	r6, .L2086+76
-	ldr	r1, [r3, #0]
-	ldrh	r2, [r2, #0]
-	ldr	r4, .L2086+80
-	subs	r2, r1, r2
-	muls	r5, r2, r5
-	ldr	r2, .L2086+84
-	str	r5, [r2, #0]
-	ldr	r2, .L2086+88
-	ldrh	r2, [r2, #0]
-	muls	r5, r2, r5
-	str	r5, [r3, #0]
-	ldr	r3, .L2086+16
-	ldrh	r3, [r3, #0]
-	muls	r5, r3, r5
-	ldr	r3, .L2086+92
-	str	r5, [r3, #0]
-	movw	r5, #65535
-	bl	FtlBbmTblFlush
-	ldr	r3, .L2086+36
-	movs	r1, #0
-	ldr	r0, [r6, #0]
-	ldrh	r2, [r3, #0]
-	lsls	r2, r2, #1
-	bl	memset
-	ldr	r2, .L2086+96
-	movs	r3, #0
-	strh	r3, [r4, #2]	@ movhi
-	strb	r3, [r4, #6]
-	movs	r1, #255
-	str	r3, [r2, #0]
-	ldr	r2, .L2086+100
-	strh	r3, [r4, #0]	@ movhi
-	strh	r3, [r2, #2]	@ movhi
-	strb	r3, [r2, #6]
-	strb	r3, [r2, #8]
-	movs	r3, #1
-	strb	r3, [r4, #8]
-	ldr	r3, .L2086+32
-	strh	r5, [r2, #0]	@ movhi
-	ldrh	r2, [r3, #0]
-	ldr	r3, .L2086+104
-	lsrs	r2, r2, #3
-	ldr	r0, [r3, #0]
-	bl	memset
-.L2082:
-	ldr	r7, .L2086+80
-	mov	r0, r7
-	bl	make_superblock
-	ldrb	r2, [r4, #7]	@ zero_extendqisi2
-	ldr	r3, .L2086+76
-	cbnz	r2, .L2083
-	ldrh	r2, [r4, #0]
-	ldr	r3, [r6, #0]
-	strh	r5, [r3, r2, lsl #1]	@ movhi
-	ldrh	r3, [r4, #0]
-	adds	r3, r3, #1
-	strh	r3, [r4, #0]	@ movhi
-	b	.L2082
-.L2083:
-	ldr	r2, .L2086+4
-	movw	r6, #65535
-	ldr	r4, .L2086+108
-	ldrh	r0, [r7, #4]
-	ldr	r1, [r2, #0]
-	str	r1, [r7, #12]
-	adds	r1, r1, #1
-	str	r1, [r2, #0]
-	ldrh	r1, [r7, #0]
-	ldr	r2, [r3, #0]
-	strh	r0, [r2, r1, lsl #1]	@ movhi
-	movs	r2, #0
-	strh	r2, [r4, #2]	@ movhi
-	strb	r2, [r4, #6]
-	ldrh	r2, [r7, #0]
-	mov	r7, r3
-	adds	r2, r2, #1
-	strh	r2, [r4, #0]	@ movhi
-	movs	r2, #1
-	strb	r2, [r4, #8]
-.L2084:
-	ldr	r5, .L2086+108
-	mov	r0, r5
-	bl	make_superblock
-	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cmp	r3, #0
-	bne	.L2085
-	ldrh	r2, [r4, #0]
-	ldr	r3, [r7, #0]
-	strh	r6, [r3, r2, lsl #1]	@ movhi
-	ldrh	r3, [r4, #0]
-	adds	r3, r3, #1
-	strh	r3, [r4, #0]	@ movhi
-	b	.L2084
-.L2087:
-	.align	2
-.L2086:
-	.word	.LANCHOR82
-	.word	.LANCHOR156
-	.word	.LANCHOR157
-	.word	.LANCHOR42
-	.word	.LANCHOR59
-	.word	168778952
-	.word	.LANCHOR182
-	.word	.LANCHOR183
-	.word	.LANCHOR43
-	.word	.LANCHOR44
-	.word	.LANCHOR41
-	.word	.LANCHOR69
-	.word	.LANCHOR77
-	.word	.LANCHOR45
-	.word	.LANCHOR116
-	.word	.LANCHOR7
-	.word	.LANCHOR52
-	.word	.LANCHOR201
-	.word	.LANCHOR76
-	.word	.LANCHOR89
-	.word	.LANCHOR97
-	.word	.LANCHOR200
-	.word	.LANCHOR56
-	.word	.LANCHOR72
-	.word	.LANCHOR106
-	.word	.LANCHOR202
-	.word	.LANCHOR107
-	.word	.LANCHOR98
-.L2085:
-	ldr	r4, .L2088
-	ldrh	r1, [r5, #4]
-	ldrh	r2, [r5, #0]
-	ldr	r3, [r4, #0]
-	str	r3, [r5, #12]
-	adds	r3, r3, #1
-	str	r3, [r4, #0]
-	movw	r5, #65535
-	ldr	r3, .L2088+4
-	ldr	r3, [r3, #0]
-	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L2088+8
-	strh	r5, [r3, #0]	@ movhi
-	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L2088+12
-	movs	r2, #0
-	strh	r2, [r3, #2]	@ movhi
-	ldr	r2, .L2088+16
-	strh	r5, [r3, #4]	@ movhi
-	ldr	r2, [r2, #0]
-	strh	r2, [r3, #6]	@ movhi
-	ldr	r2, [r4, #0]
-	str	r2, [r3, #8]
-	adds	r2, r2, #1
-	str	r2, [r4, #0]
-	strh	r0, [r3, #0]	@ movhi
+	push	{r3, lr}
+	ldr	r3, .L2124
+	ldr	r3, [r3]
+	cbnz	r3, .L2123
+	bl	FtlCacheWriteBack
+	bl	l2p_flush
+	movs	r0, #1
+	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-	bl	FtlSysBlkInit
-	cbnz	r0, .L2066
-	ldr	r3, .L2088+20
-	movs	r2, #1
-	str	r2, [r3, #0]
-.L2066:
+.L2123:
 	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L2089:
+	pop	{r3, pc}
+.L2125:
 	.align	2
-.L2088:
-	.word	.LANCHOR156
-	.word	.LANCHOR89
-	.word	.LANCHOR99
-	.word	.LANCHOR196
-	.word	.LANCHOR200
-	.word	.LANCHOR225
-	.size	FtlLowFormat, .-FtlLowFormat
-	.section	.text.HynixGetReadRetryDefault,"ax",%progbits
+.L2124:
+	.word	.LANCHOR75
+	.size	FtlSysFlush, .-FtlSysFlush
+	.section	.text.FtlDeInit,"ax",%progbits
 	.align	1
-	.global	HynixGetReadRetryDefault
+	.global	FtlDeInit
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	HynixGetReadRetryDefault, %function
-HynixGetReadRetryDefault:
-	@ args = 0, pretend = 0, frame = 64
+	.fpu softvfp
+	.type	FtlDeInit, %function
+FtlDeInit:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2179
-	movs	r2, #172
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r4, r0
-	movs	r1, #174
-	strb	r0, [r3, #0]
-	strb	r2, [r3, #4]
-	movs	r0, #173
-	movs	r2, #175
-	cmp	r4, #2
-	sub	sp, sp, #64
-	strb	r0, [r3, #5]
-	strb	r1, [r3, #6]
-	strb	r2, [r3, #7]
-	bne	.L2091
-	movs	r2, #167
-	strb	r2, [r3, #4]
-	ldr	r3, .L2179+4
-	movs	r2, #247
-	strb	r2, [r3, #17]
-	b	.L2146
-.L2091:
-	cmp	r4, #3
-	bne	.L2093
-	movs	r2, #176
-	strb	r2, [r3, #4]
-	movs	r2, #177
-	strb	r2, [r3, #5]
-	movs	r2, #178
-	strb	r2, [r3, #6]
-	movs	r2, #179
-	strb	r2, [r3, #7]
-	movs	r2, #180
-	strb	r2, [r3, #8]
-	movs	r2, #181
-	strb	r2, [r3, #9]
-	movs	r2, #182
-	strb	r2, [r3, #10]
-	movs	r2, #183
-	b	.L2173
-.L2093:
-	cmp	r4, #4
-	bne	.L2094
-	movs	r5, #204
-	strb	r0, [r3, #9]
-	strb	r5, [r3, #4]
-	movs	r5, #191
-	strb	r1, [r3, #10]
-	strb	r5, [r3, #5]
-	movs	r5, #170
-	strb	r5, [r3, #6]
-	movs	r5, #171
-	strb	r5, [r3, #7]
-	movs	r5, #205
-	strb	r5, [r3, #8]
-.L2173:
-	movs	r6, #8
-	strb	r2, [r3, #11]
-	mov	r5, r6
-	b	.L2092
-.L2094:
-	cmp	r4, #5
-	bne	.L2095
-	movs	r2, #56
-	movs	r6, #8
-	strb	r2, [r3, #4]
-	movs	r2, #57
-	strb	r2, [r3, #5]
-	movs	r2, #58
-	strb	r2, [r3, #6]
-	movs	r2, #59
-	strb	r2, [r3, #7]
-	b	.L2172
-.L2095:
-	cmp	r4, #6
-	bne	.L2096
-	movs	r2, #14
-	movs	r6, #12
-	strb	r2, [r3, #4]
-	movs	r2, #15
-	strb	r2, [r3, #5]
-	movs	r2, #16
-	strb	r2, [r3, #6]
-	movs	r2, #17
-	strb	r2, [r3, #7]
-	b	.L2172
-.L2096:
-	cmp	r4, #7
-	bne	.L2146
-	movs	r2, #176
-	movs	r6, #12
-	strb	r2, [r3, #4]
-	movs	r5, #10
-	movs	r2, #177
-	strb	r2, [r3, #5]
-	movs	r2, #178
-	strb	r2, [r3, #6]
-	movs	r2, #179
-	strb	r2, [r3, #7]
-	movs	r2, #180
-	strb	r2, [r3, #8]
-	movs	r2, #181
-	strb	r2, [r3, #9]
-	movs	r2, #182
-	strb	r2, [r3, #10]
-	movs	r2, #183
-	strb	r2, [r3, #11]
-	movs	r2, #212
-	strb	r2, [r3, #12]
-	movs	r2, #213
-	strb	r2, [r3, #13]
-	b	.L2092
-.L2146:
-	movs	r6, #7
-.L2172:
-	movs	r5, #4
-.L2092:
-	subs	r3, r4, #1
+	push	{r3, lr}
+	ldr	r3, .L2128
+	ldr	r3, [r3]
 	cmp	r3, #1
-	bhi	.L2168
-	b	.L2177
-.L2103:
-	ldr	r3, .L2179+8
-	mov	sl, #0
-	ldr	r1, .L2179+12
-	ldr	r4, .L2179+16
-	ldrb	r2, [r3, r7]	@ zero_extendqisi2
-	ldr	r0, [r1, r2, lsl #3]
-	add	r4, r4, r2, lsl #6
-	add	r2, r1, r2, lsl #3
-	ldrb	r3, [r2, #4]	@ zero_extendqisi2
-	movs	r2, #55
-	adds	r3, r3, #8
-	add	r3, r0, r3, lsl #8
-.L2099:
-	add	r1, r8, sl
-	str	r2, [r3, #8]
-	movs	r0, #80
-	ldrb	r1, [r1, #4]	@ zero_extendqisi2
-	str	r1, [r3, #4]
+	bne	.L2127
+	bl	FtlSysFlush
+.L2127:
+	movs	r0, #0
+	pop	{r3, pc}
+.L2129:
+	.align	2
+.L2128:
+	.word	.LANCHOR223
+	.size	FtlDeInit, .-FtlDeInit
+	.section	.text.rk_ftl_de_init,"ax",%progbits
+	.align	1
+	.global	rk_ftl_de_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_ftl_de_init, %function
+rk_ftl_de_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	bl	FlashDeInit
+	bl	FtlDeInit
+	pop	{r3, lr}
+	b	FlashDeInit
+	.size	rk_ftl_de_init, .-rk_ftl_de_init
+	.section	.text.FtlVendorPartRead,"ax",%progbits
+	.align	1
+	.global	FtlVendorPartRead
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlVendorPartRead, %function
+FtlVendorPartRead:
+	@ args = 0, pretend = 0, frame = 56
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2141
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r10, r2
+	adds	r2, r0, r1
+	sub	sp, sp, #56
+	mov	r7, r0
+	mov	r6, r1
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bhi	.L2140
+	ldr	r3, .L2141+4
+	mov	r8, #0
+	ldr	fp, .L2141+28
+	ldrh	r5, [r3]
+	lsr	r5, r0, r5
+	lsls	r3, r5, #2
+	str	r3, [sp]
+.L2133:
+	cbnz	r6, .L2139
+.L2131:
+	mov	r0, r8
+	add	sp, sp, #56
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2139:
+	ldr	r3, .L2141+8
+	mov	r0, r7
+	ldr	r2, [sp]
+	ldr	r3, [r3]
+	ldr	r3, [r3, r2]
+	ldr	r2, .L2141+12
+	str	r3, [sp, #8]
+	ldrh	r4, [r2]
+	mov	r1, r4
+	bl	__aeabi_uidivmod
+	subs	r4, r4, r1
+	ldr	r3, [sp, #8]
+	uxth	r4, r4
+	str	r1, [sp, #4]
+	cmp	r6, r4
+	it	cc
+	uxthcc	r4, r6
+	lsls	r2, r4, #9
 	str	r2, [sp, #8]
+	cmp	r3, #0
+	beq	.L2135
+	ldr	r2, [fp]
+	add	r0, sp, #20
+	str	r3, [sp, #24]
 	str	r3, [sp, #12]
-	bl	udelay
+	str	r2, [sp, #28]
+	movs	r2, #0
+	str	r2, [sp, #32]
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+	ldr	r2, [sp, #20]
 	ldr	r3, [sp, #12]
-	ldr	r1, [r3, #0]
-	strb	r1, [r4, sl]
-	add	sl, sl, #1
-	ldr	r2, [sp, #8]
-	uxtb	r1, sl
-	cmp	r1, r5
-	bcc	.L2099
-	movs	r3, #0
-	b	.L2100
-.L2101:
-	ldrb	ip, [sl, r2, lsl #2]	@ zero_extendqisi2
-	ldrb	r0, [r4, r3]	@ zero_extendqisi2
-	add	r0, ip, r0
-	strb	r0, [r1, r2, lsl #3]
 	adds	r2, r2, #1
-	cmp	r2, #7
-	bne	.L2101
-	adds	r3, r3, #1
-	cmp	r3, #4
-	beq	.L2102
-.L2100:
-	movs	r2, #1
-	adds	r1, r4, r3
-	add	sl, fp, r3
-	b	.L2101
-.L2102:
-	adds	r7, r7, #1
-	movs	r3, #0
-	strb	r3, [r4, #16]
-	strb	r3, [r4, #24]
-	uxtb	r7, r7
-	strb	r3, [r4, #32]
-	strb	r3, [r4, #40]
-	strb	r3, [r4, #48]
-	strb	r3, [r4, #41]
-	strb	r3, [r4, #49]
-	b	.L2097
-.L2177:
-	ldr	r8, .L2179
-	movs	r7, #0
-	ldr	fp, .L2179+4
-.L2097:
-	ldr	r3, .L2179+20
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cmp	r3, r7
-	bhi	.L2103
-	b	.L2104
-.L2168:
-	subs	r3, r4, #3
-	cmp	r3, #4
-	bhi	.L2104
-	smulbb	r3, r5, r6
-	str	r6, [sp, #48]
-	asrs	r2, r3, #2
-	lsls	r3, r3, #4
-	str	r3, [sp, #52]
-	movs	r3, #0
-	str	r3, [sp, #20]
-	subs	r3, r5, #1
-	str	r2, [sp, #24]
-	uxtb	r3, r3
-	str	r3, [sp, #56]
-	b	.L2105
-.L2145:
-	ldr	r3, .L2179+8
-	ldr	fp, [sp, #20]
-	ldrb	r6, [r3, fp]	@ zero_extendqisi2
-	ldr	r3, .L2179+12
-	mov	r0, r6
-	ldr	sl, [r3, r6, lsl #3]
-	add	r3, r3, r6, lsl #3
-	ldrb	r8, [r3, #4]	@ zero_extendqisi2
-	movs	r3, #255
-	add	r8, r8, #8
-	lsl	r8, r8, #8
-	add	r7, sl, r8
-	str	r3, [r7, #8]
-	bl	NandcWaitFlashReady
-	cmp	r4, #7
-	sxth	r3, r6
-	beq	.L2106
-	ldr	r1, .L2179+16
-	add	r3, r1, r3, lsl #6
-	b	.L2174
-.L2106:
-	lsls	r1, r3, #7
-	add	r3, r1, r3, lsl #5
-	ldr	r1, .L2179+24
-	adds	r3, r1, r3
-.L2174:
-	str	r3, [sp, #32]
-	movs	r3, #54
-	cmp	r4, #4
-	str	r3, [r7, #8]
-	bne	.L2108
-	movs	r3, #255
-	str	r3, [r7, #4]
-	movs	r3, #64
-	str	r3, [sl, r8]
-	movs	r3, #204
-	b	.L2175
-.L2108:
-	subs	r3, r4, #5
-	cmp	r3, #1
-	bhi	.L2110
-	ldr	r3, .L2179
-	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-	str	r3, [r7, #4]
-	movs	r3, #82
-	b	.L2176
-.L2110:
-	movs	r3, #174
-	str	r3, [r7, #4]
-	movs	r3, #0
-	str	r3, [sl, r8]
-	movs	r3, #176
-.L2175:
-	str	r3, [r7, #4]
-	movs	r3, #77
-.L2176:
-	str	r3, [sl, r8]
-	movs	r3, #22
-	str	r3, [r7, #8]
-	movs	r3, #23
-	str	r3, [r7, #8]
-	movs	r3, #4
-	str	r3, [r7, #8]
-	movs	r3, #25
-	str	r3, [r7, #8]
-	movs	r3, #0
-	cmp	r4, #6
-	str	r3, [r7, #8]
-	mov	r0, r6
-	str	r3, [r7, #4]
-	str	r3, [r7, #4]
+	ldr	r2, .L2141+16
 	it	eq
-	moveq	r3, #31
-	str	r3, [r7, #4]
-	movs	r3, #2
-	str	r3, [r7, #4]
-	movs	r3, #0
-	str	r3, [r7, #4]
-	movs	r3, #48
-	str	r3, [r7, #8]
-	bl	NandcWaitFlashReady
-	sub	ip, r4, #5
-	mov	r1, ip
-	str	ip, [sp, #36]
-	cmp	r1, #1
-	bls	.L2148
-	cmp	r4, #7
-	ite	eq
-	moveq	r1, #32
-	movne	r1, #2
-	b	.L2114
-.L2148:
-	movs	r1, #16
-.L2114:
-	ldr	r3, .L2179+28
-	ldr	r2, [r3, #0]
-	movs	r3, #0
-.L2115:
-	ldr	r0, [r7, #0]
-	strb	r0, [r2, r3]
-	adds	r3, r3, #1
-	uxtb	r0, r3
-	cmp	r0, r1
-	bcc	.L2115
-	cmp	r4, #7
-	bne	.L2116
-	movs	r3, #0
-.L2118:
-	ldrb	r1, [r2, #0]	@ zero_extendqisi2
-	cmp	r1, #12
-	beq	.L2117
-	ldrb	r1, [r2, #1]	@ zero_extendqisi2
-	cmp	r1, #10
-	beq	.L2117
-	adds	r3, r3, #1
-	adds	r2, r2, #4
-	uxtb	r3, r3
-	cmp	r3, #8
-	bne	.L2118
-	b	.L2119
-.L2117:
-	cmp	r3, #6
-	bls	.L2120
-.L2119:
-	ldr	r0, .L2179+32
-	movs	r1, #0
+	moveq	r8, #-1
+	ldr	r2, [r2]
+	cmp	r2, #256
+	bne	.L2137
+	mov	r2, r3
+	mov	r1, r5
+	ldr	r0, .L2141+20
 	bl	printf
-.L2121:
-	b	.L2121
-.L2116:
-	cmp	r4, #6
-	bne	.L2120
-	movs	r3, #0
-.L2122:
-	ldrb	r1, [r2], #1	@ zero_extendqisi2
-	cmp	r1, #12
-	beq	.L2120
-	ldrb	r1, [r2, #7]	@ zero_extendqisi2
-	cmp	r1, #4
-	beq	.L2120
-	adds	r3, r3, #1
-	uxtb	r3, r3
-	cmp	r3, #8
-	bne	.L2122
-	b	.L2178
-.L2124:
-	b	.L2124
-.L2180:
-	.align	2
-.L2179:
-	.word	.LANCHOR31
-	.word	.LANCHOR242
-	.word	.LANCHOR19
-	.word	.LANCHOR5
-	.word	.LANCHOR31+20
-	.word	.LANCHOR16
-	.word	.LANCHOR31+28
-	.word	.LANCHOR146
-	.word	.LC51
-.L2120:
-	ldr	r0, .L2181
-	movs	r3, #0
-	ldr	r0, [r0, #0]
-	str	r0, [sp, #40]
-.L2125:
-	ldr	r2, [r7, #0]
-	ldr	r1, [sp, #40]
-	strb	r2, [r1, r3]
-	adds	r3, r3, #1
-	ldr	r2, [sp, #52]
-	cmp	r3, r2
-	blt	.L2125
-	ldr	r3, .L2181
-	movs	r2, #8
-	ldr	ip, [sp, #24]
-	ldr	r1, [r3, #0]
-	lsl	r0, ip, #2
-	lsl	fp, ip, #3
-	str	r0, [sp, #44]
-	adds	r0, r1, r0
-.L2127:
-	movs	r3, #0
-	mov	lr, r3
-.L2126:
-	ldr	ip, [r0, r3]
-	add	lr, lr, #1
-	mvn	ip, ip
-	str	ip, [r0, r3]
-	ldr	ip, [sp, #24]
+	ldr	r2, [fp]
+	mov	r1, r5
+	ldr	r0, .L2141+24
+	bl	FtlMapWritePage
+.L2137:
+	ldr	r1, [fp]
+	lsls	r2, r4, #9
+	ldr	r3, [sp, #4]
+	mov	r0, r10
+	add	r1, r1, r3, lsl #9
+	bl	ftl_memcpy
+.L2138:
+	ldr	r3, [sp, #8]
+	adds	r5, r5, #1
+	subs	r6, r6, r4
+	add	r7, r7, r4
+	add	r10, r10, r3
+	ldr	r3, [sp]
 	adds	r3, r3, #4
-	cmp	lr, ip
-	blt	.L2126
-	subs	r2, r2, #1
-	add	r0, r0, fp
-	bne	.L2127
-	mov	lr, r1
-	str	r2, [sp, #16]
-	str	r5, [sp, #60]
-	b	.L2128
-.L2132:
-	movs	r0, #1
-	mov	fp, #16
-	str	r3, [sp, #4]
-	lsl	r5, r0, r3
-	movs	r0, #0
-	mov	ip, r0
-	str	fp, [sp, #28]
-.L2130:
-	ldr	fp, [lr, r0]
-	ldr	r3, [sp, #44]
-	and	fp, r5, fp
-	adds	r0, r0, r3
-	ldr	r3, [sp, #28]
-	cmp	fp, r5
-	it	eq
-	addeq	ip, ip, #1
-	subs	r3, r3, #1
-	str	r3, [sp, #28]
-	bne	.L2130
-	ldr	r3, [sp, #4]
-	cmp	ip, #8
-	it	hi
-	orrhi	r2, r2, r5
-	adds	r3, r3, #1
-	cmp	r3, #32
-	bne	.L2132
-	ldr	fp, [sp, #16]
-	ldr	ip, [sp, #24]
-	add	fp, fp, #1
-	str	r2, [lr], #4
-	cmp	fp, ip
-	str	fp, [sp, #16]
-	bge	.L2150
-.L2128:
-	movs	r2, #0
-	mov	r3, r2
-	b	.L2132
-.L2150:
-	movs	r3, #0
-	ldr	r5, [sp, #60]
-	mov	r2, r3
-.L2133:
-	ldr	r0, [r1, r3]
-	cbnz	r0, .L2134
-	adds	r2, r2, #1
-.L2134:
-	adds	r3, r3, #4
-	cmp	r3, #32
-	bne	.L2133
-	cmp	r2, #7
-	ble	.L2135
-	ldr	r0, .L2181+4
-	movs	r2, #1
-	mov	r3, #1024
-	bl	rknand_print_hex
-	ldr	r0, .L2181+8
-	movs	r1, #0
-	bl	printf
-.L2136:
-	b	.L2136
+	str	r3, [sp]
+	b	.L2133
 .L2135:
-	cmp	r4, #6
-	beq	.L2151
-	cmp	r4, #7
-	ite	eq
-	moveq	r0, #10
-	movne	r0, #8
-	str	r0, [sp, #16]
-	b	.L2137
-.L2151:
-	movs	r1, #4
-	str	r1, [sp, #16]
-.L2137:
-	cbz	r5, .L2138
-	ldr	r2, [sp, #56]
-	add	lr, r2, #1
-	b	.L2139
-.L2138:
-	mov	lr, #1
-.L2139:
-	ldr	r0, [sp, #40]
-	movs	r2, #0
-	ldr	r1, [sp, #32]
-	mov	fp, r4
-	b	.L2140
-.L2141:
-	ldrb	ip, [r4], #1	@ zero_extendqisi2
-	strb	ip, [r1, r3]
-	adds	r3, r3, #1
-	uxtb	ip, r3
-	cmp	ip, r5
-	bcc	.L2141
-	ldr	ip, [sp, #48]
-	adds	r2, r2, #1
-	ldr	r3, [sp, #16]
-	add	r0, r0, lr
-	cmp	r2, ip
-	add	r1, r1, r3
-	bge	.L2142
+	lsls	r2, r4, #9
+	mov	r1, r3
+	mov	r0, r10
+	bl	ftl_memset
+	b	.L2138
 .L2140:
-	mov	r4, r0
-	movs	r3, #0
-	b	.L2141
+	mov	r8, #-1
+	b	.L2131
 .L2142:
-	movs	r3, #255
-	mov	r0, r6
-	str	r3, [r7, #8]
-	mov	r4, fp
-	bl	NandcWaitFlashReady
-	ldr	r1, [sp, #36]
-	cmp	r1, #1
-	bhi	.L2143
-	movs	r3, #54
-	str	r3, [r7, #8]
-	ldr	r3, .L2181+12
-	mov	r1, #-1
-	ldr	r0, [sp, #20]
-	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-	str	r3, [r7, #4]
-	movs	r3, #0
-	str	r3, [sl, r8]
-	movs	r3, #22
-	str	r3, [r7, #8]
-	bl	FlashReadCmd
-	b	.L2144
-.L2143:
-	movs	r3, #56
-	str	r3, [r7, #8]
-.L2144:
-	mov	r0, r6
-	bl	NandcWaitFlashReady
-	ldr	r2, [sp, #20]
-	adds	r3, r2, #1
-	uxtb	r3, r3
-	str	r3, [sp, #20]
-.L2105:
-	ldr	r0, .L2181+16
-	ldr	r2, [sp, #20]
-	ldrb	r3, [r0, #0]	@ zero_extendqisi2
-	cmp	r3, r2
-	bhi	.L2145
-	ldr	r6, [sp, #48]
-.L2104:
-	ldr	r3, .L2181+12
-	strb	r5, [r3, #1]
-	strb	r6, [r3, #2]
-	add	sp, sp, #64
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L2178:
-	movs	r1, #0
-	ldr	r0, .L2181+8
-	bl	printf
-	b	.L2124
-.L2182:
 	.align	2
-.L2181:
-	.word	.LANCHOR146
-	.word	.LC52
-	.word	.LC51
-	.word	.LANCHOR31
-	.word	.LANCHOR16
-	.size	HynixGetReadRetryDefault, .-HynixGetReadRetryDefault
-	.section	.text.FlashGetReadRetryDefault,"ax",%progbits
+.L2141:
+	.word	.LANCHOR48
+	.word	.LANCHOR55
+	.word	.LANCHOR191
+	.word	.LANCHOR54
+	.word	.LANCHOR199
+	.word	.LC39
+	.word	.LANCHOR215
+	.word	.LANCHOR182
+	.size	FtlVendorPartRead, .-FtlVendorPartRead
+	.section	.text.FtlLoadEctTbl,"ax",%progbits
 	.align	1
-	.global	FlashGetReadRetryDefault
+	.global	FtlLoadEctTbl
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FlashGetReadRetryDefault, %function
-FlashGetReadRetryDefault:
+	.fpu softvfp
+	.type	FtlLoadEctTbl, %function
+FtlLoadEctTbl:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	mov	r3, r0
-	cmp	r0, #0
-	beq	.L2183
-	subs	r2, r0, #1
-	cmp	r2, #6
-	bhi	.L2185
-	b	HynixGetReadRetryDefault
-.L2185:
-	cmp	r0, #49
-	bne	.L2186
-	ldr	r0, .L2194
-	movs	r2, #64
-	ldr	r1, .L2194+4
-	strb	r3, [r0, #0]
-	movs	r3, #4
-	strb	r3, [r0, #1]
-	movs	r3, #15
-	strb	r3, [r0, #2]
-	adds	r0, r0, #4
-	b	.L2192
-.L2186:
-	cmp	r0, #33
-	beq	.L2187
-	cmp	r0, #65
-	beq	.L2187
-	cmp	r0, #66
-	bne	.L2188
-.L2187:
-	ldr	r0, .L2194
-	strb	r3, [r0, #0]
-	movs	r3, #4
-	b	.L2193
-.L2188:
-	cmp	r0, #34
-	beq	.L2189
-	cmp	r0, #67
-	bne	.L2190
-.L2189:
-	ldr	r0, .L2194
-	strb	r3, [r0, #0]
-	movs	r3, #5
-.L2193:
-	strb	r3, [r0, #1]
-	movs	r2, #45
-	movs	r3, #7
-	ldr	r1, .L2194+8
-	strb	r3, [r0, #2]
-	adds	r0, r0, #4
-	b	.L2192
-.L2190:
-	cmp	r0, #35
-	beq	.L2191
-	cmp	r0, #68
-	bne	.L2183
-.L2191:
-	ldr	r0, .L2194
-	movs	r2, #95
-	ldr	r1, .L2194+12
-	strb	r3, [r0, #0]
-	movs	r3, #5
-	strb	r3, [r0, #1]
-	movs	r3, #17
-	strb	r3, [r0, #2]
-	adds	r0, r0, #4
-.L2192:
-	b	memcpy
-.L2183:
-	bx	lr
-.L2195:
+	push	{r3, r4, r5, lr}
+	movs	r0, #64
+	ldr	r4, .L2145
+	ldr	r5, .L2145+4
+	ldr	r2, [r4]
+	ldrh	r1, [r5]
+	bl	FtlVendorPartRead
+	ldr	r3, [r4]
+	ldr	r2, [r3]
+	ldr	r3, .L2145+8
+	cmp	r2, r3
+	beq	.L2144
+	ldr	r1, .L2145+12
+	ldr	r0, .L2145+16
+	bl	printf
+	ldrh	r2, [r5]
+	movs	r1, #0
+	ldr	r0, [r4]
+	lsls	r2, r2, #9
+	bl	ftl_memset
+.L2144:
+	movs	r0, #0
+	pop	{r3, r4, r5, pc}
+.L2146:
 	.align	2
-.L2194:
-	.word	.LANCHOR31
-	.word	.LANCHOR15
-	.word	.LANCHOR10
-	.word	.LANCHOR12
-	.size	FlashGetReadRetryDefault, .-FlashGetReadRetryDefault
-	.section	.text.FlashInit,"ax",%progbits
+.L2145:
+	.word	.LANCHOR188
+	.word	.LANCHOR187
+	.word	1112818501
+	.word	.LC40
+	.word	.LC6
+	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
+	.section	.text.Ftl_load_ext_data,"ax",%progbits
 	.align	1
-	.global	FlashInit
+	.global	Ftl_load_ext_data
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FlashInit, %function
-FlashInit:
-	@ args = 0, pretend = 0, frame = 8
+	.fpu softvfp
+	.type	Ftl_load_ext_data, %function
+Ftl_load_ext_data:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r4, r0
-	sub	sp, sp, #24
-	mov	r0, #32768
-	bl	ftl_malloc
-	ldr	r3, .L2242
-	movs	r5, #0
-	ldr	r8, .L2242+84
-	mov	r6, r5
-	str	r0, [r3, #0]
-	mov	r0, #32768
-	bl	ftl_malloc
-	ldr	r3, .L2242+4
-	str	r0, [r3, #0]
-	mov	r0, #4096
-	bl	ftl_malloc
-	ldr	r3, .L2242+8
-	str	r0, [r3, #0]
-	mov	r0, #32768
-	bl	ftl_malloc
-	ldr	r3, .L2242+12
-	str	r0, [r3, #0]
-	mov	r0, #4096
-	bl	ftl_malloc
-	ldr	r3, .L2242+16
-	ldr	r2, .L2242+20
-	str	r0, [r3, #0]
-	movs	r3, #50
-	strb	r3, [r2, #0]
-	mov	r0, r4
-	ldr	r2, .L2242+24
-	ldr	r4, .L2242+28
-	strb	r3, [r2, #0]
-	movs	r2, #128
-	ldr	r3, .L2242+32
-	mov	r7, r4
-	str	r5, [r3, #0]
-	ldr	r3, .L2242+36
-	str	r2, [r3, #0]
-	movs	r2, #60
-	ldr	r3, .L2242+40
-	strb	r5, [r3, #0]
-	ldr	r3, .L2242+44
-	str	r5, [r3, #0]
-	ldr	r3, .L2242+48
-	strb	r5, [r3, #0]
-	ldr	r3, .L2242+52
-	strb	r2, [r3, #0]
-	bl	NandcInit
-.L2201:
-	uxtb	r3, r6
-	str	r3, [sp, #16]
-	mov	r0, r3
-	bl	FlashReset
-	add	r2, r8, r5
-	ldr	r3, [sp, #16]
-	ldrb	sl, [r2, #4]	@ zero_extendqisi2
-	ldr	fp, [r5, r8]
-	mov	r0, r3
-	add	sl, sl, #8
-	lsl	sl, sl, #8
-	add	r2, fp, sl
-	str	r2, [sp, #20]
-	bl	NandcFlashCs
-	ldr	r2, [sp, #20]
-	movs	r1, #144
-	movs	r0, #200
-	str	r1, [r2, #8]
+	push	{r3, r4, r5, lr}
+	movs	r1, #1
+	ldr	r4, .L2151
+	movs	r0, #0
+	ldr	r5, .L2151+4
+	mov	r2, r4
+	bl	FtlVendorPartRead
+	ldr	r3, [r4]
+	cmp	r3, r5
+	beq	.L2148
+	mov	r2, #512
 	movs	r1, #0
-	str	r1, [r2, #4]
-	bl	udelay
-	ldr	r2, [fp, sl]
-	strb	r2, [r5, r7]
-	ldr	r2, [fp, sl]
-	strb	r2, [r4, #1]
-	ldr	r2, [fp, sl]
-	strb	r2, [r4, #2]
-	ldr	r2, [fp, sl]
-	strb	r2, [r4, #3]
-	ldr	r2, [fp, sl]
-	strb	r2, [r4, #4]
-	ldr	r2, [fp, sl]
-	strb	r2, [r4, #5]
-	ldr	r3, [sp, #16]
-	mov	r0, r3
-	bl	NandcFlashDeCs
-	ldrb	r2, [r5, r7]	@ zero_extendqisi2
-	subs	r3, r2, #1
-	uxtb	r3, r3
-	cmp	r3, #253
-	bhi	.L2197
-	ldrb	r1, [r4, #2]	@ zero_extendqisi2
-	ldrb	r3, [r4, #1]	@ zero_extendqisi2
-	ldr	r0, .L2242+56
-	str	r1, [sp, #0]
-	ldrb	r1, [r4, #3]	@ zero_extendqisi2
-	str	r1, [sp, #4]
-	ldrb	r1, [r4, #4]	@ zero_extendqisi2
-	str	r1, [sp, #8]
-	ldrb	r1, [r4, #5]	@ zero_extendqisi2
-	str	r1, [sp, #12]
-	adds	r1, r6, #1
+	mov	r0, r4
+	bl	ftl_memset
+	str	r5, [r4]
+.L2148:
+	ldr	r3, [r4]
+	cmp	r3, r5
+	ldr	r5, .L2151+8
+	bne	.L2149
+	ldr	r2, [r4, #88]
+	ldr	r3, .L2151+12
+	str	r2, [r3]
+	ldr	r2, [r4, #92]
+	ldr	r3, .L2151+16
+	str	r2, [r3]
+	ldr	r2, [r4, #8]
+	ldr	r3, .L2151+20
+	str	r2, [r3]
+	ldr	r2, [r4, #12]
+	ldr	r3, .L2151+24
+	str	r2, [r3]
+	ldr	r2, [r4, #16]
+	ldr	r3, .L2151+28
+	str	r2, [r3]
+	ldr	r2, [r4, #20]
+	ldr	r3, .L2151+32
+	str	r2, [r3]
+	ldr	r3, [r4, #28]
+	ldr	r2, [r4, #32]
+	str	r3, [r5]
+	ldr	r3, .L2151+36
+	str	r2, [r3]
+	ldr	r2, [r4, #36]
+	ldr	r3, .L2151+40
+	str	r2, [r3]
+	ldr	r2, [r4, #40]
+	ldr	r3, .L2151+44
+	str	r2, [r3]
+	ldr	r2, [r4, #44]
+	ldr	r3, .L2151+48
+	str	r2, [r3]
+	ldr	r2, [r4, #48]
+	ldr	r3, .L2151+52
+	str	r2, [r3]
+	ldr	r2, [r4, #60]
+	ldr	r3, .L2151+56
+	str	r2, [r3]
+.L2149:
+	ldr	r3, .L2151+60
+	movs	r2, #0
+	str	r2, [r3]
+	ldr	r2, [r4, #68]
+	ldr	r3, .L2151+64
+	cmp	r2, r3
+	bne	.L2150
+	ldr	r3, .L2151+68
+	movs	r2, #1
+	ldr	r1, .L2151+72
+	ldr	r0, .L2151+76
+	str	r2, [r3]
+	bl	printf
+.L2150:
+	ldr	r3, .L2151+80
+	ldr	r1, .L2151+84
+	ldrh	r2, [r3]
+	ldr	r3, .L2151+88
+	ldrh	r1, [r1]
+	ldr	r0, [r3]
+	ldr	r3, [r5]
+	mla	r0, r0, r2, r3
+	bl	__aeabi_uidiv
+	ldr	r3, .L2151+92
+	str	r0, [r3]
+	pop	{r3, r4, r5, pc}
+.L2152:
+	.align	2
+.L2151:
+	.word	.LANCHOR136
+	.word	1179929683
+	.word	.LANCHOR166
+	.word	.LANCHOR216
+	.word	.LANCHOR217
+	.word	.LANCHOR159
+	.word	.LANCHOR160
+	.word	.LANCHOR164
+	.word	.LANCHOR163
+	.word	.LANCHOR78
+	.word	.LANCHOR161
+	.word	.LANCHOR162
+	.word	.LANCHOR167
+	.word	.LANCHOR168
+	.word	.LANCHOR156
+	.word	.LANCHOR155
+	.word	305432421
+	.word	.LANCHOR101
+	.word	.LC41
+	.word	.LC6
+	.word	.LANCHOR46
+	.word	.LANCHOR38
+	.word	.LANCHOR165
+	.word	.LANCHOR202
+	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
+	.section	.text.FtlMapBlkWriteDumpData,"ax",%progbits
+	.align	1
+	.global	FtlMapBlkWriteDumpData
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlMapBlkWriteDumpData, %function
+FtlMapBlkWriteDumpData:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	mov	r4, r0
+	ldr	r3, [r0, #36]
+	cmp	r3, #0
+	beq	.L2153
+	movs	r3, #0
+	ldrh	r6, [r0, #6]
+	str	r3, [r0, #36]
+	ldr	r3, .L2167
+	ldr	r10, [r0, #24]
+	ldr	r3, [r3]
+	cmp	r3, #0
+	bne	.L2153
+	ldr	r3, .L2167+4
+	ldr	r5, .L2167+8
+	ldr	r3, [r3]
+	mov	r7, r5
+	str	r3, [r5, #8]
+	ldr	r3, .L2167+12
+	ldr	r8, [r3]
+	ldrh	r3, [r0, #2]
+	str	r8, [r5, #12]
+	cbz	r3, .L2157
+	ldr	r2, .L2167+16
+	ldrh	r2, [r2]
+	subs	r2, r2, #1
+	cmp	r3, r2
+	bge	.L2157
+	ldrh	r2, [r0]
+	movw	r1, #65535
+	cmp	r2, r1
+	beq	.L2157
+	ldr	r1, [r0, #12]
+	subs	r3, r3, #1
+	mov	r0, r5
+	ldrh	r2, [r1, r2, lsl #1]
+	orr	r3, r3, r2, lsl #10
+	movs	r2, #1
+	mov	r1, r2
+	str	r3, [r5, #4]
+	bl	FlashReadPages
+	ldr	r3, [r5]
+	adds	r3, r3, #1
+	beq	.L2157
+	ldr	r3, [r4, #24]
+	ldrh	r1, [r8, #8]
+	ldr	r2, [r3, r1, lsl #2]
+	ldr	r3, [r5, #4]
+	cmp	r2, r3
+	bne	.L2157
+	ldr	r2, [r5, #8]
+.L2166:
+	mov	r0, r4
+	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
+	b	FtlMapWritePage
+.L2157:
+	subs	r6, r6, #1
+	uxth	r6, r6
+	ldr	r3, [r10, r6, lsl #2]
+	str	r3, [r7, #4]
+	cbz	r3, .L2158
+	movs	r2, #1
+	ldr	r0, .L2167+8
+	mov	r1, r2
+	bl	FlashReadPages
+.L2159:
+	ldr	r2, [r7, #8]
+	mov	r1, r6
+	b	.L2166
+.L2158:
+	ldr	r3, .L2167+20
+	movs	r1, #255
+	ldr	r0, [r7, #8]
+	ldrh	r2, [r3]
+	bl	ftl_memset
+	b	.L2159
+.L2153:
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L2168:
+	.align	2
+.L2167:
+	.word	.LANCHOR75
+	.word	.LANCHOR181
+	.word	.LANCHOR199
+	.word	.LANCHOR185
+	.word	.LANCHOR52
+	.word	.LANCHOR56
+	.size	FtlMapBlkWriteDumpData, .-FtlMapBlkWriteDumpData
+	.section	.text.FtlScanSysBlk,"ax",%progbits
+	.align	1
+	.global	FtlScanSysBlk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlScanSysBlk, %function
+FtlScanSysBlk:
+	@ args = 0, pretend = 0, frame = 32
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #0
+	ldr	r5, .L2251
+	sub	sp, sp, #32
+	mov	r1, r4
+	ldr	r3, .L2251+4
+	ldr	r2, [r5]
+	ldr	r6, .L2251+8
+	strh	r4, [r3]	@ movhi
+	ldr	r3, .L2251+12
+	lsls	r2, r2, #2
+	strh	r4, [r6]	@ movhi
+	ldr	r7, .L2251+16
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldr	r2, [r5]
+	mov	r1, r4
+	ldr	r3, .L2251+20
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldrh	r2, [r7]
+	mov	r1, r4
+	ldr	r3, .L2251+24
+	lsls	r2, r2, #2
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldrh	r2, [r7]
+	mov	r1, r4
+	ldr	r3, .L2251+28
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+	movs	r2, #12
+	movs	r1, #255
+	ldr	r0, .L2251+32
+	bl	ftl_memset
+	ldr	r3, .L2251+36
+	str	r6, [sp, #12]
+	str	r5, [sp, #16]
+	ldrh	r3, [r3]
+	str	r3, [sp, #4]
+.L2170:
+	ldr	r3, .L2251+40
+	ldr	r2, [sp, #4]
+	ldrh	r3, [r3]
+	cmp	r3, r2
+	bls	.L2212
+	ldr	r3, .L2251+44
+	movs	r5, #0
+	ldr	r1, .L2251+48
+	mov	fp, r5
+	movs	r7, #36
+	ldrh	r8, [r3]
+	ldr	r3, .L2251+52
+	ldr	r2, [r1]
+	ldr	r1, .L2251+56
+	ldr	r6, [r3]
+	ldr	r3, .L2251+60
+	str	r2, [sp, #8]
+	ldrh	r10, [r1]
+	ldr	r3, [r3]
+	ldr	r2, .L2251+64
+	b	.L2213
+.L2172:
+	ldrb	r0, [r2, r5]	@ zero_extendqisi2
+	ldr	r1, [sp, #4]
+	str	r3, [sp, #28]
+	str	r2, [sp, #24]
+	bl	V2P_block
+	str	r0, [sp, #20]
+	bl	FtlBbmIsBadBlock
+	ldr	r2, [sp, #24]
+	ldr	r3, [sp, #28]
+	cbnz	r0, .L2171
+	ldr	r1, [sp, #20]
+	mla	r0, r7, fp, r6
+	ldr	r4, [sp, #8]
+	lsls	r1, r1, #10
+	str	r3, [r0, #8]
+	str	r1, [r0, #4]
+	mul	r1, r10, fp
+	bic	r1, r1, #3
+	add	r1, r1, r4
+	str	r1, [r0, #12]
+	add	r1, fp, #1
+	uxth	fp, r1
+.L2171:
+	adds	r5, r5, #1
+.L2213:
+	uxth	r1, r5
+	cmp	r8, r1
+	bhi	.L2172
+	cmp	fp, #0
+	bne	.L2173
+.L2211:
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	str	r3, [sp, #4]
+	b	.L2170
+.L2173:
+	movs	r7, #0
+	movs	r2, #1
+	mov	r1, fp
+	mov	r0, r6
+	bl	FlashReadPages
+.L2174:
+	uxth	r3, r7
+	cmp	fp, r3
+	bls	.L2211
+	ldr	r3, .L2251+52
+	mov	r8, #36
+	mul	r8, r8, r7
+	ldr	r3, [r3]
+	add	r2, r3, r8
+	ldr	r3, [r3, r8]
+	ldr	r5, [r2, #4]
+	ldr	r6, [r2, #12]
+	adds	r3, r3, #1
+	ubfx	r5, r5, #10, #16
+	bne	.L2177
+	mov	r10, #16
+.L2179:
+	ldr	r3, .L2251+52
+	movs	r2, #1
+	mov	r1, r2
+	ldr	r0, [r3]
+	add	r0, r0, r8
+	ldr	r3, [r0, #4]
+	adds	r3, r3, #1
+	str	r3, [r0, #4]
+	bl	FlashReadPages
+	ldrh	r2, [r6]
+	movw	r3, #65535
+	cmp	r2, r3
+	ldr	r3, .L2251+52
+	ldr	r3, [r3]
+	bne	.L2176
+	mov	r2, #-1
+	str	r2, [r3, r8]
+	ldr	r3, .L2251+52
+	ldr	r3, [r3]
+	ldr	r3, [r3, r8]
+	cmp	r3, r2
+	beq	.L2178
+.L2177:
+	ldr	r3, .L2251+68
+	ldr	r2, [r3]
+	ldr	r3, [r6, #4]
+	adds	r1, r2, #1
+	beq	.L2180
+	cmp	r2, r3
+	bhi	.L2181
+.L2180:
+	adds	r2, r3, #1
+	ittt	ne
+	ldrne	r1, .L2251+68
+	addne	r2, r3, #1
+	strne	r2, [r1]
+.L2181:
+	ldrh	r2, [r6]
+	movw	r1, #61604
+	cmp	r2, r1
+	beq	.L2183
+	bhi	.L2184
+	movw	r3, #61574
+	cmp	r2, r3
+	beq	.L2185
+.L2182:
+	adds	r7, r7, #1
+	b	.L2174
+.L2176:
+	ldr	r3, [r3, r8]
+	adds	r3, r3, #1
+	bne	.L2177
+	add	r10, r10, #-1
+	uxth	r10, r10
+	cmp	r10, #0
+	bne	.L2179
+.L2178:
+	ldr	r3, .L2251+72
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	cbnz	r1, .L2250
+.L2209:
+	mov	r0, r5
+	bl	FtlFreeSysBlkQueueIn
+	b	.L2182
+.L2184:
+	movw	r3, #61634
+	cmp	r2, r3
+	beq	.L2186
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L2182
+.L2250:
+	movs	r1, #0
+	b	.L2209
+.L2186:
+	ldr	r3, .L2251+8
+	ldrh	r2, [r3]
+	ldr	r3, .L2251
+	ldr	r3, [r3]
+	cmp	r2, r3
+	bls	.L2188
+	ldr	r1, .L2251+76
+	movw	r2, #1269
+	ldr	r0, .L2251+80
+	bl	printf
+	ldr	r1, .L2251+84
+	ldr	r0, .L2251+88
+	bl	printf
+.L2188:
+	ldr	r3, [sp, #16]
+	ldr	r2, [sp, #12]
+	ldr	r1, [r3]
+	ldrh	r0, [r2]
+	ldr	r2, .L2251+12
+	uxth	r10, r1
+	ldr	ip, [r2]
+	add	r3, r10, #-1
+	sub	r10, r10, r0
+	add	r10, r10, #-1
+	sxth	r3, r3
+	sxth	r10, r10
+.L2189:
+	cmp	r3, r10
+	bgt	.L2195
+	cmp	r3, #0
+	bge	.L2228
+	b	.L2182
+.L2195:
+	ldr	r2, [ip, r3, lsl #2]
+	add	r8, ip, r3, lsl #2
+	ldr	r4, [r6, #4]
+	cmp	r4, r2
+	bls	.L2190
+	ldr	r2, [ip]
+	cbnz	r2, .L2191
+	cmp	r1, r0
+	ittt	ne
+	ldrne	r2, .L2251+8
+	addne	r0, r0, #1
+	strhne	r0, [r2]	@ movhi
+.L2191:
+	ldr	r2, .L2251+20
+	uxth	r10, r3
+	ldr	r0, [r2]
+	movs	r2, #0
+.L2192:
+	uxth	lr, r2
+	sxth	r1, r2
+	cmp	r10, lr
+	bhi	.L2193
+	ldr	r2, [r6, #4]
+	cmp	r3, #0
+	str	r2, [r8]
+	strh	r5, [r0, r3, lsl #1]	@ movhi
+	blt	.L2182
+	ldr	r2, .L2251+8
+	ldrh	r0, [r2]
+	ldr	r2, .L2251
+	ldr	r2, [r2]
+	subs	r2, r2, r0
+	subs	r2, r2, #1
+	sxth	r2, r2
+	cmp	r3, r2
+	bgt	.L2182
+.L2228:
+	ldr	r2, .L2251+8
+	adds	r0, r0, #1
+	strh	r0, [r2]	@ movhi
+	ldr	r2, [r6, #4]
+	str	r2, [ip, r3, lsl #2]
+	ldr	r2, .L2251+20
+.L2248:
+	ldr	r2, [r2]
+	strh	r5, [r2, r3, lsl #1]	@ movhi
+	b	.L2182
+.L2193:
+	add	lr, ip, r1, lsl #2
+	adds	r2, r2, #1
+	ldr	r4, [lr, #4]
+	add	lr, r0, r1, lsl #1
+	ldrh	lr, [lr, #2]
+	str	r4, [ip, r1, lsl #2]
+	strh	lr, [r0, r1, lsl #1]	@ movhi
+	b	.L2192
+.L2190:
+	subs	r3, r3, #1
+	sxth	r3, r3
+	b	.L2189
+.L2252:
+	.align	2
+.L2251:
+	.word	.LANCHOR63
+	.word	.LANCHOR69
+	.word	.LANCHOR125
+	.word	.LANCHOR127
+	.word	.LANCHOR60
+	.word	.LANCHOR126
+	.word	.LANCHOR190
+	.word	.LANCHOR70
+	.word	.LANCHOR206
+	.word	.LANCHOR38
+	.word	.LANCHOR39
+	.word	.LANCHOR36
+	.word	.LANCHOR105
+	.word	.LANCHOR178
+	.word	.LANCHOR57
+	.word	.LANCHOR104
+	.word	.LANCHOR45
+	.word	.LANCHOR157
+	.word	.LANCHOR8
+	.word	.LANCHOR224
+	.word	.LC4
+	.word	.LC5
+	.word	.LC6
+.L2185:
+	ldr	r8, .L2253+20
+	ldr	r10, .L2253+28
+	ldrh	r2, [r8]
+	ldrh	r3, [r10]
+	cmp	r2, r3
+	bls	.L2198
+	ldr	r1, .L2253
+	movw	r2, #1316
+	ldr	r0, .L2253+4
+	bl	printf
+	ldr	r1, .L2253+8
+	ldr	r0, .L2253+12
 	bl	printf
-.L2197:
-	cbnz	r6, .L2198
-	ldrb	r3, [r7, #0]	@ zero_extendqisi2
-	subs	r3, r3, #1
-	uxtb	r3, r3
-	cmp	r3, #253
-	bhi	.L2235
-	ldrb	r3, [r7, #1]	@ zero_extendqisi2
-	cmp	r3, #255
-	beq	.L2235
 .L2198:
-	ldrb	r3, [r5, r7]	@ zero_extendqisi2
-	cmp	r3, #181
-	bne	.L2200
-	movs	r3, #44
-	strb	r3, [r5, r7]
+	ldr	r2, .L2253+16
+	ldrh	lr, [r10]
+	ldrh	ip, [r8]
+	ldr	r0, [r2]
+	add	r10, lr, #-1
+	sxth	r3, r10
+	sub	r10, r10, ip
+.L2199:
+	cmp	r3, r10
+	ble	.L2204
+	ldr	r1, [r6, #4]
+	add	r8, r0, r3, lsl #2
+	ldr	r2, [r0, r3, lsl #2]
+	cmp	r1, r2
+	bls	.L2200
+	ldr	r2, [r0]
+	cbnz	r2, .L2201
+	cmp	lr, ip
+	ittt	ne
+	ldrne	r2, .L2253+20
+	addne	ip, ip, #1
+	strhne	ip, [r2]	@ movhi
+.L2201:
+	ldr	r2, .L2253+24
+	uxth	r10, r3
+	ldr	ip, [r2]
+	movs	r2, #0
+.L2202:
+	uxth	lr, r2
+	sxth	r1, r2
+	cmp	r10, lr
+	bhi	.L2203
+	ldr	r2, [r6, #4]
+	str	r2, [r8]
+	strh	r5, [ip, r3, lsl #1]	@ movhi
+.L2204:
+	cmp	r3, #0
+	blt	.L2182
+	ldr	r2, .L2253+28
+	ldr	ip, .L2253+20
+	ldrh	r2, [r2]
+	ldrh	r1, [ip]
+	subs	r2, r2, #1
+	subs	r2, r2, r1
+	sxth	r2, r2
+	cmp	r3, r2
+	bgt	.L2182
+	ldr	r2, [r6, #4]
+	adds	r1, r1, #1
+	strh	r1, [ip]	@ movhi
+	str	r2, [r0, r3, lsl #2]
+	ldr	r2, .L2253+24
+	b	.L2248
+.L2203:
+	add	lr, r0, r1, lsl #2
+	adds	r2, r2, #1
+	ldr	r4, [lr, #4]
+	add	lr, ip, r1, lsl #1
+	ldrh	lr, [lr, #2]
+	str	r4, [r0, r1, lsl #2]
+	strh	lr, [ip, r1, lsl #1]	@ movhi
+	b	.L2202
 .L2200:
+	subs	r3, r3, #1
+	sxth	r3, r3
+	b	.L2199
+.L2183:
+	ldr	r8, .L2253+48
+	movw	r2, #65535
+	ldrh	r1, [r8]
+	cmp	r1, r2
+	bne	.L2206
+.L2249:
+	strh	r5, [r8]	@ movhi
+	str	r3, [r8, #8]
+	b	.L2182
+.L2206:
+	ldrh	r0, [r8, #4]
+	cmp	r0, r2
+	beq	.L2207
+	movs	r1, #1
+	bl	FtlFreeSysBlkQueueIn
+.L2207:
+	ldr	r3, [r6, #4]
+	ldr	r2, [r8, #8]
+	cmp	r2, r3
+	bcs	.L2208
+	ldrh	r2, [r8]
+	strh	r2, [r8, #4]	@ movhi
+	b	.L2249
+.L2208:
+	strh	r5, [r8, #4]	@ movhi
+	b	.L2182
+.L2212:
+	ldr	r3, .L2253+32
+	ldr	r2, [r3]
+	ldrh	r3, [r2]
+	cbz	r3, .L2214
+.L2217:
+	ldr	r3, .L2253+24
+	ldr	r4, [r3]
+	ldrh	r2, [r4]
+	cmp	r2, #0
+	beq	.L2215
+.L2216:
+	ldr	r3, .L2253+36
+	ldrh	r2, [r3]
+	ldr	r3, .L2253+40
+	ldr	r3, [r3]
+	cmp	r2, r3
+	bls	.L2247
+	ldr	r1, .L2253
+	movw	r2, #1450
+	ldr	r0, .L2253+4
+	bl	printf
+	ldr	r1, .L2253+8
+	ldr	r0, .L2253+12
+	bl	printf
+.L2247:
+	movs	r0, #0
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2214:
+	ldr	r1, .L2253+36
+	ldrh	r1, [r1]
+	cmp	r1, #0
+	beq	.L2217
+	ldr	r5, .L2253+40
+	ldr	r0, [r5]
+.L2218:
+	sxth	r1, r3
+	cmp	r1, r0
+	bcs	.L2217
+	ldrh	r4, [r2, r1, lsl #1]
+	adds	r3, r3, #1
+	cmp	r4, #0
+	beq	.L2218
+	ldr	r3, .L2253+44
+	movs	r6, #0
+	ldr	r0, [r3]
+	mov	r3, r1
+.L2219:
+	ldr	r4, [r5]
+	cmp	r3, r4
+	bcs	.L2217
+	ldrh	r7, [r2, r3, lsl #1]
+	subs	r4, r3, r1
+	strh	r7, [r2, r4, lsl #1]	@ movhi
+	ldr	r7, [r0, r3, lsl #2]
+	str	r7, [r0, r4, lsl #2]
+	strh	r6, [r2, r3, lsl #1]	@ movhi
+	adds	r3, r3, #1
+	sxth	r3, r3
+	b	.L2219
+.L2215:
+	ldr	r3, .L2253+20
+	ldrh	r3, [r3]
+	cmp	r3, #0
+	beq	.L2216
+	ldr	r5, .L2253+28
+	ldrh	r1, [r5]
+.L2224:
+	sxth	r3, r2
+	cmp	r3, r1
+	mov	r6, r3
+	bge	.L2216
+	ldrh	r0, [r4, r3, lsl #1]
+	adds	r2, r2, #1
+	cmp	r0, #0
+	beq	.L2224
+	ldr	r2, .L2253+16
+	movs	r0, #0
+	ldr	r2, [r2]
+.L2225:
+	ldrh	r1, [r5]
+	cmp	r3, r1
+	bge	.L2216
+	ldrh	r7, [r4, r3, lsl #1]
+	subs	r1, r3, r6
+	strh	r7, [r4, r1, lsl #1]	@ movhi
+	ldr	r7, [r2, r3, lsl #2]
+	str	r7, [r2, r1, lsl #2]
+	adds	r1, r3, #1
+	strh	r0, [r4, r3, lsl #1]	@ movhi
+	sxth	r3, r1
+	b	.L2225
+.L2254:
+	.align	2
+.L2253:
+	.word	.LANCHOR224
+	.word	.LC4
+	.word	.LC5
+	.word	.LC6
+	.word	.LANCHOR190
+	.word	.LANCHOR69
+	.word	.LANCHOR70
+	.word	.LANCHOR60
+	.word	.LANCHOR126
+	.word	.LANCHOR125
+	.word	.LANCHOR63
+	.word	.LANCHOR127
+	.word	.LANCHOR206
+	.size	FtlScanSysBlk, .-FtlScanSysBlk
+	.section	.text.FtlLoadSysInfo,"ax",%progbits
+	.align	1
+	.global	FtlLoadSysInfo
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlLoadSysInfo, %function
+FtlLoadSysInfo:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r1, #0
+	ldr	r6, .L2280
+	ldr	r10, .L2280+156
+	ldrh	r2, [r6]
+	ldr	r7, .L2280+4
+	ldr	r3, [r10]
+	ldr	r4, .L2280+8
+	ldr	r5, .L2280+12
+	lsls	r2, r2, #1
+	ldr	r0, [r7]
+	mov	r8, r7
+	str	r3, [r4, #12]
+	str	r1, [r4, #8]
+	bl	ftl_memset
+	ldrh	r0, [r5]
+	movw	r3, #65535
+	cmp	r0, r3
+	bne	.L2256
+.L2265:
+	mov	r0, #-1
+.L2255:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2256:
+	movs	r1, #1
+	ldr	fp, .L2280+160
+	bl	FtlGetLastWrittenPage
+	ldr	r3, .L2280+16
+	sxth	r7, r0
+	adds	r0, r0, #1
+	strh	r0, [r5, #2]	@ movhi
+.L2258:
+	cmp	r7, #0
+	bge	.L2261
+	ldr	r1, .L2280+20
+	movw	r2, #1510
+	ldr	r0, .L2280+24
+	bl	printf
+	ldr	r1, .L2280+28
+	ldr	r0, .L2280+32
+	bl	printf
+.L2260:
+	ldr	r2, .L2280+36
+	ldrh	r3, [r6]
+	ldrh	r2, [r2]
+	adds	r3, r3, #24
+	cmp	r2, r3, lsl #1
+	bcs	.L2263
+	ldr	r1, .L2280+20
+	mov	r2, #1512
+	ldr	r0, .L2280+24
+	bl	printf
+	ldr	r1, .L2280+28
+	ldr	r0, .L2280+32
+	bl	printf
+.L2263:
+	movs	r2, #48
+	ldr	r1, [r4, #8]
+	ldr	r0, .L2280+40
+	bl	ftl_memcpy
+	ldrh	r2, [r6]
+	ldr	r1, [r4, #8]
+	ldr	r0, [r8]
+	lsls	r2, r2, #1
+	adds	r1, r1, #48
+	bl	ftl_memcpy
+	ldrh	r1, [r6]
+	ldr	r3, [r4, #8]
+	lsrs	r2, r1, #3
+	adds	r1, r1, #24
+	lsls	r1, r1, #1
+	adds	r2, r2, #4
+	bic	r1, r1, #3
+	add	r1, r1, r3
+	ldr	r3, .L2280+44
+	ldr	r0, [r3]
+	bl	ftl_memcpy
+	ldr	r3, .L2280+48
+	ldrh	r3, [r3]
+	cbz	r3, .L2264
+	ldrh	r1, [r6]
+	ldr	r3, .L2280+52
+	ldrh	r2, [r3]
+	lsrs	r3, r1, #3
+	add	r3, r3, r1, lsl #1
+	ldr	r1, [r4, #8]
+	adds	r3, r3, #52
+	lsls	r2, r2, #2
+	ubfx	r3, r3, #2, #14
+	add	r1, r1, r3, lsl #2
+	ldr	r3, .L2280+56
+	ldr	r0, [r3]
+	bl	ftl_memcpy
+.L2264:
+	ldr	r4, .L2280+40
+	ldr	r3, .L2280+16
+	ldr	r2, [r4]
+	cmp	r2, r3
+	bne	.L2265
+	ldr	r3, .L2280+60
+	ldrb	r2, [r4, #10]	@ zero_extendqisi2
+	ldrh	r6, [r4, #8]
+	ldrh	r3, [r3]
+	strh	r6, [r5, #6]	@ movhi
+	cmp	r2, r3
+	bne	.L2265
+	ldr	r3, .L2280+64
+	ldr	r2, .L2280+68
+	str	r6, [r3]
+	ldr	r3, .L2280+72
+	ldrh	r3, [r3]
+	muls	r3, r6, r3
+	str	r3, [r2]
+	ldr	r2, .L2280+76
+	ldrh	r2, [r2]
+	muls	r3, r2, r3
+	ldr	r2, .L2280+80
+	str	r3, [r2]
+	ldr	r3, .L2280+84
+	ldr	r5, [r3]
+	ldr	r3, .L2280+88
+	ldrh	r0, [r3, #6]
+	ldr	r3, .L2280+92
+	subs	r0, r5, r0
+	ldrh	r1, [r3]
+	subs	r0, r0, r6
+	bl	__aeabi_uidiv
+	ldr	r3, .L2280+96
+	cmp	r6, r5
+	strh	r0, [r3]	@ movhi
+	bls	.L2266
+	ldr	r1, .L2280+20
+	movw	r2, #1539
+	ldr	r0, .L2280+24
+	bl	printf
+	ldr	r1, .L2280+28
+	ldr	r0, .L2280+32
+	bl	printf
+.L2266:
+	ldrh	r2, [r4, #16]
+	ldr	r3, .L2280+100
+	ldrh	ip, [r4, #14]
+	ldr	r7, .L2280+104
+	lsrs	r1, r2, #6
+	and	r2, r2, #63
+	strb	r2, [r3, #6]
+	ldrb	r2, [r4, #11]	@ zero_extendqisi2
+	strh	r1, [r3, #2]	@ movhi
+	ldr	r1, .L2280+108
+	strb	r2, [r3, #8]
+	ldrh	r2, [r4, #18]
+	strh	ip, [r3]	@ movhi
+	movw	r3, #65535
+	strh	r3, [r7]	@ movhi
+	movs	r3, #0
+	strh	r2, [r1]	@ movhi
+	ldrh	r2, [r4, #20]
+	strh	r3, [r7, #2]	@ movhi
+	strb	r3, [r7, #6]
+	strb	r3, [r7, #8]
+	lsrs	r5, r2, #6
+	and	r2, r2, #63
+	strb	r2, [r1, #6]
+	ldrb	r2, [r4, #12]	@ zero_extendqisi2
+	strh	r5, [r1, #2]	@ movhi
+	ldrh	r5, [r4, #22]
+	strb	r2, [r1, #8]
+	ldr	r2, .L2280+112
+	strh	r5, [r2]	@ movhi
+	ldrh	r5, [r4, #24]
+	lsrs	r6, r5, #6
+	and	r5, r5, #63
+	strb	r5, [r2, #6]
+	ldrb	r5, [r4, #13]	@ zero_extendqisi2
+	strh	r6, [r2, #2]	@ movhi
+	ldr	r6, [r4, #32]
+	strb	r5, [r2, #8]
+	ldr	r5, .L2280+116
+	str	r3, [r5]
+	ldr	r5, .L2280+120
+	str	r3, [r5]
+	ldr	r5, .L2280+124
+	str	r3, [r5]
+	ldr	r5, .L2280+128
+	str	r3, [r5]
+	ldr	r5, .L2280+132
+	str	r6, [r5]
+	mov	r6, r1
+	ldr	r5, .L2280+136
+	str	r3, [r5]
+	ldr	r5, .L2280+140
+	str	r3, [r5]
+	ldr	r5, .L2280+144
+	ldr	lr, [r4, #40]
+	str	r3, [r5]
+	ldr	r3, .L2280+148
+	ldr	r5, [r3]
+	cmp	lr, r5
+	mov	r5, r2
+	it	hi
+	strhi	lr, [r3]
+	ldr	r3, .L2280+152
+	ldr	r2, [r4, #36]
+	ldr	r1, [r3]
+	cmp	r2, r1
+	it	hi
+	strhi	r2, [r3]
+	movw	r3, #65535
+	cmp	ip, r3
+	beq	.L2269
+	ldr	r0, .L2280+100
+	bl	make_superblock
+.L2269:
+	ldrh	r2, [r6]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L2270
+	ldr	r0, .L2280+108
+	bl	make_superblock
+.L2270:
+	ldrh	r2, [r5]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L2271
+	ldr	r0, .L2280+112
+	bl	make_superblock
+.L2271:
+	ldrh	r2, [r7]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L2272
+	ldr	r0, .L2280+104
+	bl	make_superblock
+.L2272:
+	movs	r0, #0
+	b	.L2255
+.L2261:
+	ldrh	r2, [r5]
+	ldr	r0, .L2280+8
+	str	r3, [sp, #4]
+	orr	r2, r7, r2, lsl #10
+	str	r2, [r4, #4]
+	ldr	r2, [fp]
+	str	r2, [r4, #8]
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+	ldr	r2, [r4]
+	ldr	r3, [sp, #4]
+	adds	r2, r2, #1
+	beq	.L2259
+	ldr	r2, [fp]
+	ldr	r2, [r2]
+	cmp	r2, r3
+	bne	.L2259
+	ldr	r2, [r10]
+	ldrh	r1, [r2]
+	movw	r2, #61604
+	cmp	r1, r2
+	beq	.L2260
+.L2259:
+	subs	r7, r7, #1
+	sxth	r7, r7
+	b	.L2258
+.L2281:
+	.align	2
+.L2280:
+	.word	.LANCHOR38
+	.word	.LANCHOR82
+	.word	.LANCHOR199
+	.word	.LANCHOR206
+	.word	1179929683
+	.word	.LANCHOR225
+	.word	.LC4
+	.word	.LC5
+	.word	.LC6
+	.word	.LANCHOR56
+	.word	.LANCHOR135
+	.word	.LANCHOR0
+	.word	.LANCHOR68
+	.word	.LANCHOR65
+	.word	.LANCHOR192
+	.word	.LANCHOR43
+	.word	.LANCHOR226
+	.word	.LANCHOR71
+	.word	.LANCHOR51
+	.word	.LANCHOR54
+	.word	.LANCHOR67
+	.word	.LANCHOR40
+	.word	.LANCHOR73
+	.word	.LANCHOR36
+	.word	.LANCHOR227
+	.word	.LANCHOR90
+	.word	.LANCHOR201
+	.word	.LANCHOR91
+	.word	.LANCHOR92
+	.word	.LANCHOR159
+	.word	.LANCHOR160
+	.word	.LANCHOR164
+	.word	.LANCHOR163
+	.word	.LANCHOR165
+	.word	.LANCHOR166
+	.word	.LANCHOR167
+	.word	.LANCHOR162
+	.word	.LANCHOR157
+	.word	.LANCHOR158
+	.word	.LANCHOR185
+	.word	.LANCHOR79
+	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
+	.section	.text.FtlMapTblRecovery,"ax",%progbits
+	.align	1
+	.global	FtlMapTblRecovery
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlMapTblRecovery, %function
+FtlMapTblRecovery:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, [r0, #24]
+	movs	r1, #0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #32
+	ldrh	fp, [r0, #6]
+	mov	r7, r0
+	movs	r4, #0
+	str	r3, [sp, #12]
+	ldr	r3, [r0, #12]
+	lsl	r2, fp, #2
+	str	r3, [sp, #8]
+	ldr	r3, [r0, #16]
+	str	r3, [sp, #20]
+	ldrh	r3, [r0, #8]
+	ldr	r0, [sp, #12]
+	str	r3, [sp, #16]
+	bl	ftl_memset
+	ldr	r2, .L2322
+	ldr	r3, .L2322+4
+	str	r4, [r7, #32]
+	ldr	r1, [r2]
+	mov	r10, r2
+	mov	r8, r3
+	str	r4, [r7, #28]
+	str	r1, [r3, #8]
+	ldr	r1, .L2322+8
+	ldr	r5, [r1]
+	movw	r1, #65535
+	str	r5, [r3, #12]
+	strh	r1, [r7]	@ movhi
+	strh	r1, [r7, #2]	@ movhi
+	movs	r1, #1
+	str	r1, [r7, #36]
+.L2283:
+	ldr	r2, [sp, #16]
+	sxth	r3, r4
+	cmp	r3, r2
+	bge	.L2301
+	ldr	r2, [sp, #16]
+	lsls	r6, r3, #1
+	subs	r2, r2, #1
+	cmp	r3, r2
+	bne	.L2284
+	ldr	r2, [sp, #8]
+	movs	r1, #1
+	str	r3, [sp, #16]
+	ldr	r10, .L2322+4
+	ldrh	r0, [r2, r3, lsl #1]
+	add	r6, r6, r2
+	bl	FtlGetLastWrittenPage
+	ldr	r3, [sp, #20]
+	sxth	r8, r0
+	strh	r4, [r7]	@ movhi
+	movs	r4, #0
+	adds	r0, r0, #1
+	mov	r2, r3
+	ldr	r3, [sp, #16]
+	strh	r0, [r7, #2]	@ movhi
+	ldr	r3, [r2, r3, lsl #2]
+	str	r3, [r7, #28]
+.L2285:
+	sxth	r3, r4
+	cmp	r3, r8
+	ble	.L2288
+.L2301:
+	ldr	r3, .L2322+12
+	cmp	r7, r3
+	str	r3, [sp, #12]
+	bne	.L2290
+	ldr	r3, .L2322+16
+	ldrh	r3, [r3]
+	cbz	r3, .L2290
+	ldr	fp, .L2322+40
+	movs	r4, #0
+.L2304:
+	ldr	r3, .L2322+20
+	ldrh	r3, [r3]
+	cmp	r4, r3
+	bcc	.L2311
+.L2290:
+	mov	r0, r7
+	bl	ftl_free_no_use_map_blk
+	ldr	r3, .L2322+24
+	ldrh	r2, [r7, #2]
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bne	.L2303
+	mov	r0, r7
+	bl	ftl_map_blk_alloc_new_blk
+.L2303:
+	mov	r0, r7
+	bl	ftl_map_blk_gc
+	mov	r0, r7
+	bl	ftl_map_blk_gc
+	movs	r0, #0
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2288:
+	ldrh	r2, [r6]
+	ldr	r0, .L2322+4
+	orr	r3, r3, r2, lsl #10
+	movs	r2, #1
+	mov	r1, r2
+	str	r3, [r10, #4]
+	bl	FlashReadPages
+	ldr	r3, [r10]
+	adds	r3, r3, #1
+	beq	.L2286
+	ldrh	r3, [r5, #8]
+	cmp	fp, r3
+	bls	.L2287
+	ldrh	r1, [r5]
+	ldrh	r2, [r7, #4]
+	cmp	r1, r2
+	bne	.L2287
+	ldr	r2, [r10, #4]
+	ldr	r1, [sp, #12]
+	str	r2, [r1, r3, lsl #2]
+.L2287:
+	adds	r4, r4, #1
+	b	.L2285
+.L2286:
+	ldrh	r3, [r6]
+	strh	r3, [r7, #40]	@ movhi
+	b	.L2287
+.L2284:
+	ldr	r2, [r10]
+	ldr	r0, .L2322+4
+	str	r2, [r8, #8]
+	ldr	r2, [sp, #8]
+	add	r2, r2, r6
+	ldr	r6, .L2322+24
+	str	r2, [sp, #24]
+	ldr	r2, [sp, #8]
+	ldrh	r2, [r2, r3, lsl #1]
+	ldrh	r3, [r6]
+	subs	r3, r3, #1
+	orr	r3, r3, r2, lsl #10
+	movs	r2, #1
+	mov	r1, r2
+	str	r3, [r8, #4]
+	bl	FlashReadPages
+	ldr	r3, [r8]
+	adds	r3, r3, #1
+	beq	.L2313
+	ldrh	r2, [r5]
+	ldrh	r3, [r7, #4]
+	cmp	r2, r3
+	bne	.L2313
+	ldrh	r2, [r5, #8]
+	movw	r3, #64245
+	cmp	r2, r3
+	beq	.L2292
+.L2313:
+	ldr	r3, .L2322+24
+	movs	r6, #0
+.L2293:
+	ldrh	r1, [r3]
+	sxth	r2, r6
+	cmp	r2, r1
+	bge	.L2299
+	str	r3, [sp, #28]
+	ldr	r3, [sp, #24]
+	ldr	r0, .L2322+4
+	ldrh	r1, [r3]
+	orr	r2, r2, r1, lsl #10
+	str	r2, [r8, #4]
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+	ldr	r2, [r8]
+	ldr	r3, [sp, #28]
+	adds	r2, r2, #1
+	beq	.L2297
+	ldrh	r2, [r5, #8]
+	cmp	fp, r2
+	bls	.L2297
+	ldrh	r0, [r5]
+	ldrh	r1, [r7, #4]
+	cmp	r0, r1
+	ittt	eq
+	ldreq	r1, [r8, #4]
+	ldreq	r0, [sp, #12]
+	streq	r1, [r0, r2, lsl #2]
+.L2297:
+	adds	r6, r6, #1
+	b	.L2293
+.L2292:
+	ldrh	r2, [r6]
+	movs	r1, #0
+	ldr	r6, [r10]
+	subs	r2, r2, #1
+.L2294:
+	sxth	r3, r1
+	cmp	r3, r2
+	blt	.L2296
+.L2299:
+	adds	r4, r4, #1
+	b	.L2283
+.L2296:
+	lsls	r0, r3, #3
+	ldr	r3, [r6, r3, lsl #3]
+	adds	r1, r1, #1
+	uxth	ip, r3
+	cmp	fp, ip
+	itttt	hi
+	addhi	r0, r0, r6
+	ldrhi	r3, [sp, #12]
+	ldrhi	r0, [r0, #4]
+	strhi	r0, [r3, ip, lsl #2]
+	b	.L2294
+.L2311:
+	ldr	r3, [fp]
+	lsls	r5, r4, #2
+	ldr	r2, [r3, r4, lsl #2]
+	subs	r3, r2, #1
+	adds	r3, r3, #3
+	bhi	.L2306
+	ldr	r8, .L2322+44
+	ldr	r3, [r8]
+	ldr	r3, [r3, r4, lsl #2]
+	cmp	r2, r3
+	beq	.L2306
+	ldr	r3, .L2322
+	ldr	r6, .L2322+4
+	ldr	r3, [r3]
+	str	r2, [r6, #4]
+	movs	r2, #1
+	mov	r1, r2
+	mov	r0, r6
+	str	r3, [r6, #8]
+	ldr	r3, .L2322+8
+	ldr	r3, [r3]
+	str	r3, [r6, #12]
+	str	r3, [sp, #16]
+	bl	FlashReadPages
+	ldr	r2, [r6]
+	ldr	r3, [sp, #16]
+	adds	r2, r2, #1
+	beq	.L2315
+	ldr	r2, [sp, #12]
+	ldrh	r1, [r3]
+	ldrh	r2, [r2, #4]
+	cmp	r1, r2
+	bne	.L2315
+	ldr	r10, [r3, #4]
+.L2308:
+	ldr	r2, [r8]
+	ldr	r0, .L2322+4
+	str	r3, [sp, #16]
+	ldr	r2, [r2, r5]
+	str	r2, [r6, #4]
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+	ldr	r3, [sp, #16]
+	ldr	r3, [r3, #4]
+	cmp	r10, r3
+	bls	.L2306
+	ldr	r2, [r8]
+	ldr	r1, [fp]
+	ldr	r0, .L2322+28
+	str	r3, [sp]
+	mov	r3, r10
+	ldr	r2, [r2, r5]
+	ldr	r1, [r1, r5]
+	bl	printf
+	ldr	r3, [fp]
+	ldr	r2, [r8]
+	ldr	r1, [r3, r5]
+	str	r1, [r2, r5]
+	movs	r1, #0
+	ldr	r0, [r3, r5]
+	ldr	r3, .L2322+32
+	ubfx	r0, r0, #10, #16
+	ldrh	r2, [r3]
+.L2309:
+	sxth	r5, r1
+	cmp	r5, r2
+	blt	.L2310
+	ldr	r1, .L2322+36
+	ldr	r1, [r1]
+	cmp	r2, r1
+	bcs	.L2306
+	ldr	r1, [sp, #8]
+	strh	r0, [r1, r2, lsl #1]	@ movhi
+	ldrh	r2, [r3]
+	adds	r2, r2, #1
+	strh	r2, [r3]	@ movhi
+	bl	remove_from_free_sys_Queue
+	b	.L2306
+.L2315:
+	mov	r10, #0
+	b	.L2308
+.L2310:
+	ldr	r6, [sp, #8]
+	adds	r1, r1, #1
+	ldrh	r5, [r6, r5, lsl #1]
+	cmp	r5, r0
+	bne	.L2309
+.L2306:
+	adds	r4, r4, #1
+	b	.L2304
+.L2323:
+	.align	2
+.L2322:
+	.word	.LANCHOR79
+	.word	.LANCHOR199
+	.word	.LANCHOR185
+	.word	.LANCHOR124
+	.word	.LANCHOR68
+	.word	.LANCHOR65
+	.word	.LANCHOR52
+	.word	.LC42
+	.word	.LANCHOR125
+	.word	.LANCHOR63
+	.word	.LANCHOR192
+	.word	.LANCHOR128
+	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
+	.section	.text.FtlLoadVonderInfo,"ax",%progbits
+	.align	1
+	.global	FtlLoadVonderInfo
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlLoadVonderInfo, %function
+FtlLoadVonderInfo:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	ldr	r3, .L2325
+	ldr	r0, .L2325+4
+	ldrh	r3, [r3]
+	strh	r3, [r0, #10]	@ movhi
+	movw	r3, #61574
+	strh	r3, [r0, #4]	@ movhi
+	ldr	r3, .L2325+8
+	ldrh	r3, [r3]
+	strh	r3, [r0, #8]	@ movhi
+	ldr	r3, .L2325+12
+	ldrh	r3, [r3]
+	strh	r3, [r0, #6]	@ movhi
+	ldr	r3, .L2325+16
+	ldr	r3, [r3]
+	str	r3, [r0, #12]
+	ldr	r3, .L2325+20
+	ldr	r3, [r3]
+	str	r3, [r0, #16]
+	ldr	r3, .L2325+24
+	ldr	r3, [r3]
+	str	r3, [r0, #20]
+	ldr	r3, .L2325+28
+	ldr	r3, [r3]
+	str	r3, [r0, #24]
+	movw	r3, #65535
+	strh	r3, [r0, #40]	@ movhi
+	bl	FtlMapTblRecovery
+	movs	r0, #0
+	pop	{r3, pc}
+.L2326:
+	.align	2
+.L2325:
+	.word	.LANCHOR60
+	.word	.LANCHOR215
+	.word	.LANCHOR69
+	.word	.LANCHOR61
+	.word	.LANCHOR70
+	.word	.LANCHOR190
+	.word	.LANCHOR189
+	.word	.LANCHOR191
+	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
+	.section	.text.FtlLoadMapInfo,"ax",%progbits
+	.align	1
+	.global	FtlLoadMapInfo
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlLoadMapInfo, %function
+FtlLoadMapInfo:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	bl	FtlL2PDataInit
+	ldr	r0, .L2328
+	bl	FtlMapTblRecovery
+	movs	r0, #0
+	pop	{r3, pc}
+.L2329:
+	.align	2
+.L2328:
+	.word	.LANCHOR124
+	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
+	.section	.text.FtlRecoverySuperblock,"ax",%progbits
+	.align	1
+	.global	FtlRecoverySuperblock
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlRecoverySuperblock, %function
+FtlRecoverySuperblock:
+	@ args = 0, pretend = 0, frame = 56
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldrh	r3, [r0]
+	movw	r2, #65535
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r10, r0
+	sub	sp, sp, #56
+	cmp	r3, r2
+	beq	.L2491
+	ldrh	r3, [r0, #2]
+	str	r3, [sp, #12]
+	ldrb	r3, [r0, #6]	@ zero_extendqisi2
+	ldr	r1, [sp, #12]
+	str	r3, [sp, #28]
+	ldr	r3, .L2500
+	ldrh	r3, [r3]
+	cmp	r3, r1
+	mov	r3, #0
+	bne	.L2333
+	strh	r3, [r0, #4]	@ movhi
+.L2498:
+	strb	r3, [r10, #6]
+.L2491:
+	movs	r0, #0
+	add	sp, sp, #56
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2333:
+	ldrh	r0, [r0, #16]
+.L2334:
+	cmp	r0, r2
+	uxth	r5, r3
+	add	r3, r3, #1
+	beq	.L2335
+	ldrb	r1, [r10, #8]	@ zero_extendqisi2
+	cmp	r1, #1
+	bne	.L2336
+	bl	FtlGetLastWrittenPage
+	adds	r6, r0, #1
+	mov	r4, r0
+	beq	.L2337
+	ldr	r3, .L2500+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L2415
+	ldr	r3, .L2500+8
+	ldrh	r6, [r3, r0, lsl #1]
+.L2338:
+	ldr	r3, .L2500+12
+	movw	lr, #65535
+	mov	r8, #36
+	ldrh	fp, [r3]
+	ldr	r3, .L2500+16
+	ldr	r0, [r3]
+	ldr	r3, .L2500+20
+	ldr	r3, [r3]
+	str	r3, [sp, #8]
+	ldr	r3, .L2500+24
+	ldrh	ip, [r3]
+	add	r3, r10, #16
+	str	r3, [sp, #20]
+	str	r3, [sp, #4]
+	movs	r3, #0
+	mov	r7, r3
+.L2339:
+	uxth	r2, r3
+	cmp	fp, r2
+	bhi	.L2343
+	ldrb	r3, [r10, #8]	@ zero_extendqisi2
+	cmp	r3, #1
+	bne	.L2416
+	ldr	r3, .L2500+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	adds	r3, r3, #0
+	it	ne
+	movne	r3, #1
+.L2492:
+	str	r3, [sp, #36]
+	mov	r1, r7
+	ldr	r2, [sp, #36]
+	movs	r5, #0
+	bl	FlashReadPages
+	ldr	r3, .L2500+28
+	movw	fp, #65535
+	ldr	r8, .L2500+16
+	ldr	r3, [r3]
+	subs	r3, r3, #1
+	str	r3, [sp, #4]
+.L2345:
+	uxth	r3, r5
+	cmp	r7, r3
+	bhi	.L2350
+	bne	.L2348
+	adds	r4, r4, #1
+	uxth	r3, r4
+	str	r3, [sp, #8]
+	ldr	r3, [r8]
+	ldr	r0, [r3, #4]
+.L2493:
+	ubfx	r0, r0, #10, #16
+	bl	P2V_plane
+	ldrb	r3, [r10, #8]	@ zero_extendqisi2
+	str	r0, [sp, #16]
+	cmp	r3, #1
+	bne	.L2352
+	ldr	r2, .L2500+4
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbnz	r2, .L2352
+	ldr	r1, [sp, #8]
+	ldr	r2, .L2500+8
+	ldrh	r2, [r2, r1, lsl #1]
+	str	r2, [sp, #8]
+.L2352:
+	ldr	r2, .L2500
+	ldr	r1, [sp, #8]
+	ldrh	r2, [r2]
+	cmp	r2, r1
+	bne	.L2353
+	ldrh	r2, [sp, #8]
+	strh	r2, [r10, #2]	@ movhi
+	movs	r2, #0
+	strb	r2, [r10, #6]
+	strh	r2, [r10, #4]	@ movhi
+.L2353:
+	ldr	r2, [sp, #8]
+	ldr	r1, [sp, #12]
+	cmp	r2, r1
+	bne	.L2354
+	ldr	r2, [sp, #16]
+	ldr	r1, [sp, #28]
+	cmp	r2, r1
+	bne	.L2354
+.L2499:
+	ldr	r1, [sp, #8]
+	mov	r0, r10
+	bl	ftl_sb_update_avl_pages
+	b	.L2491
+.L2335:
+	uxth	r1, r3
+	adds	r1, r1, #8
+	ldrh	r0, [r10, r1, lsl #1]
+	b	.L2334
+.L2336:
+	movs	r1, #0
+	bl	FtlGetLastWrittenPage
+	mov	r4, r0
+	adds	r0, r0, #1
+	beq	.L2337
+.L2415:
+	mov	r6, r4
+	b	.L2338
+.L2337:
+	ldr	r3, [sp, #12]
+	cbz	r3, .L2340
+	ldr	r1, .L2500+32
+	movw	r2, #1894
+	ldr	r0, .L2500+36
+	bl	printf
+	ldr	r1, .L2500+40
+	ldr	r0, .L2500+44
+	bl	printf
+.L2340:
+	ldr	r3, [sp, #28]
+	cbz	r3, .L2341
+	cmp	r5, r3
+	beq	.L2341
+	ldr	r1, .L2500+32
+	movw	r2, #1895
+	ldr	r0, .L2500+36
+	bl	printf
+	ldr	r1, .L2500+40
+	ldr	r0, .L2500+44
+	bl	printf
+.L2341:
+	movs	r3, #0
+	strh	r3, [r10, #2]	@ movhi
+	b	.L2498
+.L2343:
+	ldr	r1, [sp, #4]
+	ldrh	r2, [r1], #2
+	cmp	r2, lr
+	str	r1, [sp, #4]
+	beq	.L2342
+	mla	r1, r8, r7, r0
+	orr	r2, r6, r2, lsl #10
+	str	r2, [r1, #4]
+	movs	r2, #0
+	str	r2, [r1, #8]
+	mul	r2, ip, r7
+	adds	r7, r7, #1
+	uxth	r7, r7
+	bic	r2, r2, #3
+	mov	r5, r2
+	ldr	r2, [sp, #8]
+	add	r5, r5, r2
+	str	r5, [r1, #12]
+.L2342:
+	adds	r3, r3, #1
+	b	.L2339
+.L2416:
+	movs	r3, #0
+	b	.L2492
+.L2350:
+	movs	r3, #36
+	ldr	r1, [r8]
+	muls	r3, r5, r3
+	adds	r2, r1, r3
+	ldr	r3, [r1, r3]
+	cbnz	r3, .L2346
+	ldr	r2, [r2, #12]
+	ldr	r3, [r2, #4]
+	adds	r1, r3, #1
+	beq	.L2347
+	ldr	r1, .L2500+28
+	mov	r0, r3
+	ldr	r1, [r1]
+	bl	ftl_cmp_data_ver
+	cbz	r0, .L2347
+	ldr	r1, .L2500+28
+	adds	r3, r3, #1
+	str	r3, [r1]
+.L2347:
+	ldr	r3, [r2]
+	adds	r3, r3, #1
+	bne	.L2349
+.L2348:
+	uxth	r3, r4
+	uxth	r5, r5
+	str	r3, [sp, #8]
+	movs	r2, #36
+	ldr	r3, [r8]
+	mla	r5, r2, r5, r3
+	ldr	r0, [r5, #4]
+	b	.L2493
+.L2346:
+	ldr	r1, [r2, #4]
+	uxth	fp, r6
+	ldr	r0, .L2500+48
+	bl	printf
+	ldrh	r2, [r10]
+	ldr	r3, .L2500+52
+	strh	r2, [r3]	@ movhi
+.L2349:
+	adds	r5, r5, #1
+	b	.L2345
+.L2354:
+	movw	r2, #65535
+	cmp	fp, r2
+	bne	.L2355
+	cmp	r3, #0
+	bne	.L2356
+.L2355:
+	ldr	r3, .L2500+56
+	uxth	fp, r6
+	uxth	r6, r6
+	mov	r7, #-1
+	ldr	r2, [r3]
+	adds	r2, r2, #1
+	itt	eq
+	ldreq	r2, [sp, #4]
+	streq	r2, [r3]
+	ldr	r3, [r3]
+	str	r3, [sp, #24]
+	ldr	r3, [sp, #12]
+	adds	r3, r3, #7
+	cmp	r6, r3
+	mov	r6, r7
+	itet	gt
+	subgt	r4, fp, #7
+	ldrle	r4, [sp, #12]
+	uxthgt	r4, r4
+.L2359:
+	cmp	r4, fp
+	bhi	.L2374
+	ldr	r3, .L2500+12
+	movw	lr, #65535
+	mov	ip, #36
+	ldrh	r8, [r3]
+	ldr	r3, .L2500+16
+	ldr	r0, [r3]
+	ldr	r3, [sp, #20]
+	str	r3, [sp, #32]
+	movs	r3, #0
+	mov	r5, r3
+	b	.L2375
+.L2361:
+	ldr	r1, [sp, #32]
+	ldrh	r2, [r1], #2
+	cmp	r2, lr
+	str	r1, [sp, #32]
+	beq	.L2360
+	mla	r1, ip, r5, r0
+	adds	r5, r5, #1
+	orr	r2, r4, r2, lsl #10
+	uxth	r5, r5
+	str	r2, [r1, #4]
+.L2360:
+	adds	r3, r3, #1
+.L2375:
+	uxth	r2, r3
+	cmp	r8, r2
+	bhi	.L2361
+	mov	r1, r5
+	ldr	r2, [sp, #36]
+	bl	FlashReadPages
+	ldr	r2, .L2500+4
+	movs	r1, #36
+	ldr	r3, .L2500+56
+	movs	r0, #0
+	movw	ip, #65535
+	ldrb	lr, [r2]	@ zero_extendqisi2
+	ldr	r2, .L2500+16
+	ldr	r3, [r3]
+	ldr	r2, [r2]
+	mla	r5, r1, r5, r2
+.L2362:
+	cmp	r2, r5
+	bne	.L2372
+	cbz	r0, .L2373
+	ldr	r2, .L2500+56
+	str	r3, [r2]
+.L2373:
+	adds	r4, r4, #1
+	uxth	r4, r4
+	b	.L2359
+.L2501:
+	.align	2
+.L2500:
+	.word	.LANCHOR51
+	.word	.LANCHOR8
+	.word	.LANCHOR16
+	.word	.LANCHOR36
+	.word	.LANCHOR178
+	.word	.LANCHOR105
+	.word	.LANCHOR57
+	.word	.LANCHOR158
+	.word	.LANCHOR228
+	.word	.LC4
+	.word	.LC5
+	.word	.LC6
+	.word	.LC43
+	.word	.LANCHOR229
+	.word	.LANCHOR133
+.L2372:
+	ldr	r1, [r2]
+	cbnz	r1, .L2363
+	ldr	r1, [r2, #12]
+	ldrh	r8, [r1]
+	cmp	r8, ip
+	beq	.L2419
+	ldr	r1, [r1, #4]
+	cmp	r1, #-1
+	beq	.L2419
+	adds	r0, r7, #1
+	bne	.L2421
+	ldr	r0, .L2502
+	ldrh	r0, [r0, r4, lsl #1]
+	cmp	r0, ip
+	bne	.L2365
+	cmp	lr, #0
+	beq	.L2421
+.L2365:
+	ldr	r0, [sp, #4]
+	cmp	r0, r3
+	it	ne
+	movne	r7, r3
+.L2421:
+	movs	r0, #1
+	b	.L2364
+.L2363:
+	cbz	r0, .L2366
+	ldr	r2, .L2502+4
+	str	r3, [r2]
+.L2366:
+	ldr	r3, .L2502+8
+	ldrh	r2, [r10]
+	strh	r2, [r3]	@ movhi
+	ldrb	r3, [r10, #8]	@ zero_extendqisi2
+	cbnz	r3, .L2356
+	ldr	r3, .L2502
+	ldrh	r2, [r3, r4, lsl #1]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L2368
+	adds	r1, r7, #1
+	ldr	r3, .L2502+4
+	beq	.L2369
+	str	r7, [r3]
+.L2356:
+	ldr	r3, .L2502+12
+	movs	r2, #1
+	ldr	r0, .L2502+16
+	ldr	r6, .L2502+20
+	strh	r2, [r3]	@ movhi
+	bl	FtlMapBlkWriteDumpData
+	ldr	fp, [sp, #12]
+.L2376:
+	ldr	r3, .L2502+24
+	movw	ip, #65535
+	ldr	r0, [r6]
+	mov	lr, #36
+	ldr	r1, [sp, #20]
+	movs	r2, #0
+	ldrh	r5, [r3]
+	ldr	r3, .L2502+28
+	str	r2, [sp, #24]
+	ldrb	r7, [r3]	@ zero_extendqisi2
+.L2377:
+	uxth	r3, r2
+	cmp	r3, r5
+	bcc	.L2380
+	ldr	r2, [sp, #36]
+	ldr	r1, [sp, #24]
+	bl	FlashReadPages
+	movs	r3, #0
+.L2497:
+	str	r3, [sp, #32]
+	ldr	r2, [sp, #24]
+	ldrh	r3, [sp, #32]
+	cmp	r2, r3
+	bhi	.L2409
+	ldrb	r3, [r10, #8]	@ zero_extendqisi2
+	add	fp, fp, #1
+	uxth	fp, fp
+	cmp	r3, #1
+	bne	.L2410
+	ldr	r3, .L2502+28
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2410
+	ldr	r3, .L2502+32
+	ldrh	r3, [r3]
+	cmp	r3, fp
+	bne	.L2410
+	ldr	r3, [sp, #8]
+	cmp	r3, fp
+	beq	.L2385
+.L2410:
+	ldr	r3, .L2502+36
+	ldrh	r3, [r3]
+	cmp	r3, fp
+	bne	.L2376
+	ldr	r2, .L2502+24
+	movw	r0, #65535
+	movs	r3, #0
+	strh	fp, [r10, #2]	@ movhi
+	strh	r3, [r10, #4]	@ movhi
+	ldrh	r2, [r2]
+.L2411:
+	uxth	r1, r3
+	cmp	r1, r2
+	bcs	.L2491
+	ldr	r1, [sp, #20]
+	ldrh	r4, [r1], #2
+	cmp	r4, r0
+	str	r1, [sp, #20]
+	add	r1, r3, #1
+	bne	.L2498
+	mov	r3, r1
+	b	.L2411
+.L2369:
+	ldr	r2, [sp, #4]
+	ldr	r1, [sp, #24]
+	cmp	r2, r1
+	itet	eq
+	ldreq	r2, [r3]
+	movne	r2, r1
+	addeq	r2, r2, #-1
+.L2494:
+	str	r2, [r3]
+	b	.L2356
+.L2368:
+	ldr	r3, [sp, #4]
+	cmp	r6, r3
+	beq	.L2371
+	adds	r2, r6, #1
+	beq	.L2356
+	ldr	r3, .L2502+4
+	str	r6, [r3]
+	b	.L2356
+.L2371:
+	ldr	r2, .L2502+4
+	ldr	r1, [sp, #4]
+	ldr	r3, [r2]
+	cmp	r1, r3
+	beq	.L2356
+	subs	r3, r3, #1
+	str	r3, [r2]
+	b	.L2356
+.L2419:
+	mov	r1, r3
+	mov	r3, r6
+.L2364:
+	mov	r6, r3
+	adds	r2, r2, #36
+	mov	r3, r1
+	b	.L2362
+.L2374:
+	mov	r2, #-1
+	ldr	r3, .L2502+4
+	b	.L2494
+.L2380:
+	ldrh	r3, [r1], #2
+	cmp	r3, ip
+	beq	.L2378
+	ldr	r4, [sp, #24]
+	orr	r3, fp, r3, lsl #10
+	mla	r4, lr, r4, r0
+	str	r3, [r4, #4]
+	ldrb	r8, [r10, #8]	@ zero_extendqisi2
+	cmp	r8, #1
+	bne	.L2379
+	cbz	r7, .L2379
+	orr	r3, r3, #-2147483648
+	str	r3, [r4, #4]
+.L2379:
+	ldr	r3, [sp, #24]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	str	r3, [sp, #24]
+.L2378:
+	adds	r2, r2, #1
+	b	.L2377
+.L2409:
+	ldr	r3, [sp, #32]
+	movs	r5, #36
+	ldr	r8, [r6]
+	muls	r5, r3, r5
+	add	r7, r8, r5
+	ldr	r4, [r7, #4]
+	ubfx	r0, r4, #10, #16
+	str	r4, [sp, #52]
+	bl	P2V_plane
+	ldr	r3, [sp, #12]
+	cmp	fp, r3
+	bcc	.L2382
+	bne	.L2383
+	ldr	r3, [sp, #28]
+	cmp	r3, r0
+	bhi	.L2382
+.L2383:
+	ldr	r3, [sp, #8]
+	cmp	fp, r3
+	bne	.L2384
+	ldr	r3, [sp, #16]
+	cmp	r3, r0
+	beq	.L2385
+.L2384:
+	ldr	r3, [r8, r5]
+	adds	r3, r3, #1
+	beq	.L2386
+	ldr	r3, [r7, #12]
+	movw	r2, #61589
+	ldrh	r1, [r3]
+	cmp	r1, r2
+	beq	.L2387
+.L2393:
+	ldrh	r0, [r10]
+.L2496:
+	bl	decrement_vpc_count
+.L2382:
+	ldr	r3, [sp, #32]
+	adds	r3, r3, #1
+	b	.L2497
+.L2387:
+	ldr	r2, [r3, #4]
+	str	r2, [sp, #4]
+	adds	r2, r2, #1
+	beq	.L2388
+	ldr	r2, .L2502+40
+	ldr	r0, [sp, #4]
+	ldr	r1, [r2]
+	bl	ftl_cmp_data_ver
+	cbz	r0, .L2388
+	ldr	r1, [sp, #4]
+	adds	r1, r1, #1
+	str	r1, [r2]
+.L2388:
+	ldr	r4, [r3, #8]
+	add	r1, sp, #48
+	ldr	r3, [r3, #12]
+	movs	r2, #0
+	mov	r0, r4
+	str	r3, [sp, #44]
+	bl	log2phys
+	ldr	r3, .L2502+4
+	ldr	r1, [r3]
+	adds	r3, r1, #1
+	beq	.L2389
+	ldr	r0, [sp, #4]
+	bl	ftl_cmp_data_ver
+	cmp	r0, #0
+	beq	.L2389
+	ldr	r3, [sp, #44]
+	adds	r7, r3, #1
+	beq	.L2390
+	ldr	r0, [r6]
+	movs	r2, #0
+	movs	r1, #1
+	add	r0, r0, r5
+	str	r3, [r0, #4]
+	ldr	r7, [r0, #12]
+	bl	FlashReadPages
+	ldr	r2, [r6]
+	ldr	r1, [r2, r5]
+	adds	r3, r2, r5
+	adds	r1, r1, #1
+	bne	.L2391
+.L2392:
+	mov	r3, #-1
+	ldrh	r0, [r10]
+	str	r3, [sp, #44]
+	bl	decrement_vpc_count
+.L2400:
+	ldr	r7, [sp, #44]
+	adds	r0, r7, #1
+	beq	.L2382
+.L2414:
+	ubfx	r0, r7, #10, #16
+	bl	P2V_block_in_plane
+	ldr	r3, .L2502+44
+	mov	r4, r0
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bhi	.L2405
+	ldr	r1, .L2502+48
+	movw	r2, #2177
+	ldr	r0, .L2502+52
+	bl	printf
+	ldr	r1, .L2502+56
+	ldr	r0, .L2502+60
+	bl	printf
+.L2405:
+	ldr	r3, .L2502+64
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r4, lsl #1]
+	cmp	r3, #0
+	beq	.L2406
+	mov	r0, r4
+	b	.L2496
+.L2390:
+	ldr	r3, [sp, #52]
+	ldr	r2, [sp, #48]
+	cmp	r2, r3
+	bne	.L2393
+	movs	r2, #1
+	add	r1, sp, #44
+	mov	r0, r4
+	bl	log2phys
+	b	.L2393
+.L2503:
+	.align	2
+.L2502:
+	.word	.LANCHOR117
+	.word	.LANCHOR133
+	.word	.LANCHOR229
+	.word	.LANCHOR230
+	.word	.LANCHOR124
+	.word	.LANCHOR178
+	.word	.LANCHOR36
+	.word	.LANCHOR8
+	.word	.LANCHOR52
+	.word	.LANCHOR51
+	.word	.LANCHOR158
+	.word	.LANCHOR38
+	.word	.LANCHOR228
+	.word	.LC4
+	.word	.LC5
+	.word	.LC6
+	.word	.LANCHOR82
+.L2391:
+	ldr	r1, [r7, #8]
+	cmp	r4, r1
+	bne	.L2392
+	ldr	r8, [r7, #4]
+	ldr	r0, .L2504
+	mov	r1, r8
+	ldr	r0, [r0]
+	bl	ftl_cmp_data_ver
+	cmp	r0, #0
+	beq	.L2392
+	ldr	r1, [sp, #48]
+	ldr	r0, [sp, #52]
+	cmp	r1, r0
+	bne	.L2395
+.L2398:
+	ldr	r1, [sp, #44]
+	mov	r0, r4
+	bl	FtlReUsePrevPpa
+	b	.L2392
+.L2395:
+	ldr	r0, [sp, #44]
+	cmp	r1, r0
+	beq	.L2392
+	adds	r0, r1, #1
+	beq	.L2396
+	str	r1, [r3, #4]
+	movs	r2, #0
+	movs	r1, #1
+	mov	r0, r3
+	ldr	r7, [r3, #12]
+	bl	FlashReadPages
+.L2397:
+	ldr	r3, [r6]
+	ldr	r3, [r3, r5]
+	adds	r3, r3, #1
+	beq	.L2398
+	ldr	r3, [r7, #4]
+	ldr	r2, .L2504
+	mov	r1, r3
+	ldr	r0, [r2]
+	bl	ftl_cmp_data_ver
+	cmp	r0, #0
+	beq	.L2398
+	mov	r1, r3
+	mov	r0, r8
+	bl	ftl_cmp_data_ver
+	cmp	r0, #0
+	beq	.L2392
+	b	.L2398
+.L2396:
+	str	r1, [r2, r5]
+	b	.L2397
+.L2389:
+	ldr	r3, [sp, #52]
+	ldr	r2, [sp, #48]
+	cmp	r2, r3
+	beq	.L2400
+	movs	r2, #1
+	add	r1, sp, #52
+	mov	r0, r4
+	bl	log2phys
+	ldr	r7, [sp, #48]
+	adds	r5, r7, #1
+	beq	.L2400
+	ldr	r3, [sp, #44]
+	cmp	r7, r3
+	beq	.L2414
+	ubfx	r0, r7, #10, #16
+	bl	P2V_block_in_plane
+	ldr	r3, .L2504+4
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	beq	.L2404
+	ldr	r3, .L2504+8
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	beq	.L2404
+	ldr	r3, .L2504+12
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bne	.L2400
+.L2404:
+	ldr	r0, [r6]
+	movs	r2, #0
+	movs	r1, #1
+	str	r7, [r0, #4]
+	ldr	r5, [r0, #12]
+	bl	FlashReadPages
+	ldr	r3, [r6]
+	ldr	r3, [r3]
+	adds	r3, r3, #1
+	beq	.L2400
+	ldr	r1, [r5, #4]
+	ldr	r0, [sp, #4]
+	bl	ftl_cmp_data_ver
+	cmp	r0, #0
+	bne	.L2400
+	movs	r2, #1
+	add	r1, sp, #48
+	mov	r0, r4
+	bl	log2phys
+	b	.L2400
+.L2406:
+	mov	r1, r4
+	ldr	r0, .L2504+16
+	bl	printf
+	b	.L2382
+.L2386:
+	ldrh	r3, [r10]
+	mov	r1, r4
+	ldr	r2, .L2504+20
+	ldr	r0, .L2504+24
+	strh	r3, [r2]	@ movhi
+	ldr	r2, [sp, #4]
+	bl	printf
+	ldr	r2, .L2504+28
+	ldr	r3, [r2]
+	cmp	r3, #31
+	bhi	.L2407
+	ldr	r0, [sp, #52]
+	ldr	r1, .L2504+32
+	str	r0, [r1, r3, lsl #2]
+	adds	r3, r3, #1
+	str	r3, [r2]
+.L2407:
+	ldrh	r0, [r10]
+	bl	decrement_vpc_count
+	ldr	r3, .L2504
+	ldr	r2, [r3]
+	adds	r1, r2, #1
+	bne	.L2408
+	ldr	r2, [sp, #4]
+.L2495:
+	str	r2, [r3]
+	b	.L2382
+.L2408:
+	ldr	r1, [sp, #4]
+	cmp	r1, r2
+	bcs	.L2382
+	mov	r2, r1
+	b	.L2495
+.L2385:
+	ldrb	r3, [sp, #16]	@ zero_extendqisi2
+	ldr	r2, [sp, #16]
+	strb	r3, [r10, #6]
+	ldrh	r3, [sp, #8]
+	strh	r3, [r10, #2]	@ movhi
+	b	.L2499
+.L2505:
+	.align	2
+.L2504:
+	.word	.LANCHOR133
+	.word	.LANCHOR90
+	.word	.LANCHOR91
+	.word	.LANCHOR92
+	.word	.LC44
+	.word	.LANCHOR229
+	.word	.LC45
+	.word	.LANCHOR231
+	.word	.LANCHOR232
+	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
+	.section	.text.FtlGcScanTempBlk,"ax",%progbits
+	.align	1
+	.global	FtlGcScanTempBlk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcScanTempBlk, %function
+FtlGcScanTempBlk:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2533
+	movw	r2, #65535
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #24
+	mov	r5, r0
+	ldrh	r4, [r3]
+	str	r3, [sp, #16]
+	cmp	r4, r2
+	beq	.L2524
+	cbnz	r4, .L2507
+.L2508:
+	bl	FtlGcPageVarInit
+	b	.L2509
+.L2524:
+	movs	r4, #0
+.L2507:
+	ldr	r3, .L2533+4
+	ldrh	r3, [r3]
+	cmp	r3, r1
+	beq	.L2508
+.L2509:
+	ldr	fp, .L2533+44
+	mov	r3, #-1
+	str	r3, [sp, #8]
+.L2521:
+	ldrh	r2, [r5]
+	movw	r3, #65535
+	movs	r0, #0
+	strb	r0, [r5, #8]
+	cmp	r2, r3
+	beq	.L2510
+.L2523:
+	ldr	r3, .L2533+8
+	movw	ip, #65535
+	ldr	r0, [fp]
+	mov	lr, #36
+	ldrh	r8, [r3]
+	ldr	r3, .L2533+12
+	ldr	r3, [r3]
+	str	r3, [sp, #12]
+	ldr	r3, .L2533+16
+	ldrh	r10, [r3]
+	add	r3, r5, #16
+	str	r3, [sp, #4]
+	movs	r3, #0
+	mov	r6, r3
+.L2511:
+	uxth	r2, r3
+	cmp	r8, r2
+	bhi	.L2513
+	movs	r7, #0
+	mov	r10, #36
+	movs	r2, #0
+	mov	r1, r6
+	bl	FlashReadPages
+.L2514:
+	uxth	r3, r7
+	cmp	r6, r3
+	bhi	.L2522
+	ldr	r3, .L2533+4
+	adds	r4, r4, #1
+	uxth	r4, r4
+	ldrh	r3, [r3]
+	cmp	r3, r4
+	bhi	.L2523
+	movs	r0, #0
+	b	.L2510
+.L2513:
+	ldr	r1, [sp, #4]
+	ldrh	r2, [r1], #2
+	cmp	r2, ip
+	str	r1, [sp, #4]
+	beq	.L2512
+	mla	r1, lr, r6, r0
+	orr	r2, r4, r2, lsl #10
+	str	r2, [r1, #4]
+	movs	r2, #0
+	str	r2, [r1, #8]
+	mul	r2, r10, r6
 	adds	r6, r6, #1
-	adds	r5, r5, #8
-	adds	r4, r4, #8
-	cmp	r6, #4
-	bne	.L2201
-	ldr	r3, .L2242+28
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cmp	r3, #173
-	beq	.L2202
-	ldr	r3, .L2242+60
-	ldr	r0, [r3, #0]
-	bl	NandcSetDdrMode
-.L2202:
+	uxth	r6, r6
+	bic	r2, r2, #3
+	mov	r7, r2
+	ldr	r2, [sp, #12]
+	add	r7, r7, r2
+	str	r7, [r1, #12]
+.L2512:
+	adds	r3, r3, #1
+	b	.L2511
+.L2522:
+	mul	r8, r10, r7
+	ldr	r2, [fp]
+	str	r2, [sp, #20]
+	add	r3, r2, r8
+	ldr	r1, [r3, #4]
+	str	r3, [sp, #12]
+	ubfx	r0, r1, #10, #16
+	str	r1, [sp, #4]
+	bl	P2V_plane
+	ldr	r2, [sp, #20]
+	ldr	r1, [sp, #4]
+	ldr	r2, [r2, r8]
+	cbnz	r2, .L2515
+	ldr	r3, [sp, #12]
+	movw	ip, #65535
+	adds	r7, r7, #1
+	ldr	r3, [r3, #12]
+	ldrh	r2, [r3]
+	cmp	r2, ip
+	bne	.L2516
+	ldr	r3, .L2533+20
+	movs	r2, #1
+	str	r2, [r3]
+.L2510:
+	ldr	r2, [sp, #16]
+	movw	r3, #65535
+	strb	r0, [r5, #6]
+	mov	r1, r4
+	strh	r4, [r5, #2]	@ movhi
+	strh	r3, [r2]	@ movhi
+	mov	r2, r0
+	mov	r0, r5
+	bl	ftl_sb_update_avl_pages
+	ldr	r0, [sp, #8]
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2516:
+	ldr	r2, [r3, #8]
+	ldr	r0, [r3, #12]
+	bl	FtlGcUpdatePage
+	b	.L2514
+.L2515:
+	mov	r2, r1
+	ldr	r0, .L2533+24
+	ldrh	r1, [r5]
+	bl	printf
+	ldr	r3, .L2533+28
+	ldrh	r2, [r5]
+	ldr	r3, [r3]
+	cbnz	r3, .L2517
+	ldr	r3, .L2533+32
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2518
+.L2517:
+	ldr	r3, .L2533+36
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r2, lsl #1]
+	cmp	r3, #119
+	bls	.L2519
+.L2518:
+	ldr	r3, [fp]
+	ldr	r3, [r3, r8]
+	adds	r3, r3, #1
+	bne	.L2520
+.L2519:
+	ldr	r3, [fp]
+	add	r3, r3, r8
+	ldr	r3, [r3, #4]
+	str	r3, [sp, #8]
+.L2520:
+	ldr	r3, .L2533+40
+	movs	r4, #0
+	ldr	r3, [r3]
+	strh	r4, [r3, r2, lsl #1]	@ movhi
+	ldrh	r0, [r5]
+	bl	INSERT_FREE_LIST
+	movw	r3, #65535
+	strh	r3, [r5]	@ movhi
+	bl	FtlGcPageVarInit
+	b	.L2521
+.L2534:
+	.align	2
+.L2533:
+	.word	.LANCHOR233
+	.word	.LANCHOR51
+	.word	.LANCHOR36
+	.word	.LANCHOR105
+	.word	.LANCHOR57
+	.word	.LANCHOR132
+	.word	.LC46
+	.word	.LANCHOR101
+	.word	.LANCHOR8
+	.word	.LANCHOR77
+	.word	.LANCHOR82
+	.word	.LANCHOR178
+	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
+	.section	.text.FtlGcFreeTempBlock,"ax",%progbits
+	.align	1
+	.global	FtlGcFreeTempBlock
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcFreeTempBlock, %function
+FtlGcFreeTempBlock:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r3, .L2558
+	ldr	r3, [r3]
+	cbz	r3, .L2536
+.L2541:
+	movs	r0, #0
+.L2535:
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2536:
+	ldr	r0, .L2558+4
+	movw	r3, #65535
+	ldr	r5, .L2558+8
+	ldrh	r6, [r0]
+	mov	r4, r0
+	cmp	r6, r3
+	beq	.L2538
+	ldr	r3, .L2558+12
+	ldrh	r1, [r3]
+	bl	FtlGcScanTempBlk
+	str	r0, [sp, #12]
+	adds	r0, r0, #1
+	beq	.L2538
+	ldr	r3, .L2558+16
+	ldr	r2, [r3]
+	ldrh	r3, [r2, r6, lsl #1]
+	cmp	r3, #4
+	bls	.L2539
+	subs	r3, r3, #5
+	movs	r0, #1
+	strh	r3, [r2, r6, lsl #1]	@ movhi
+	bl	FtlEctTblFlush
+.L2539:
+	ldr	r3, [r5]
+	cbnz	r3, .L2540
+	ldr	r2, .L2558+20
+	ldr	r0, [sp, #12]
+	ldr	r3, [r2, #96]
+	ubfx	r0, r0, #10, #16
+	adds	r3, r3, #1
+	str	r3, [r2, #96]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+.L2540:
+	movs	r3, #0
+	movs	r0, #1
+	str	r3, [r5]
+	b	.L2535
+.L2538:
+	ldrh	r2, [r4]
+	movs	r3, #0
+	str	r3, [r5]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L2541
+	ldr	r6, .L2558+12
+	bl	FtlCacheWriteBack
+	ldrb	r0, [r4, #7]	@ zero_extendqisi2
+	ldrh	r2, [r6]
+	ldr	r5, .L2558+24
+	muls	r2, r0, r2
+	ldrh	r1, [r5]
+	cmp	r1, r2
+	beq	.L2542
+	ldr	r1, .L2558+28
+	movs	r2, #163
+	ldr	r0, .L2558+32
+	bl	printf
+	ldr	r1, .L2558+36
+	ldr	r0, .L2558+40
+	bl	printf
+.L2542:
+	ldrh	r6, [r6]
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	ldr	r2, .L2558+44
+	ldrh	r0, [r4]
+	ldr	fp, .L2558+84
+	smulbb	r3, r3, r6
+	ldr	r1, [r2]
+	movs	r6, #0
+	str	r2, [sp, #4]
+	strh	r3, [r1, r0, lsl #1]	@ movhi
+	ldr	r1, .L2558+48
+	ldrh	r3, [r5]
+	ldr	r0, [r1]
+	add	r3, r3, r0
+	str	r3, [r1]
+.L2543:
+	ldrh	r2, [r5]
+	uxth	r3, r6
+	cmp	r2, r3
+	bhi	.L2547
+	movw	r0, #65535
+	bl	decrement_vpc_count
+	ldr	r3, .L2558+52
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2548
+	ldrh	r1, [r4]
+	ldr	r0, .L2558+56
+	bl	printf
+.L2548:
+	ldr	r3, [sp, #4]
+	ldrh	r0, [r4]
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r0, lsl #1]
+	cmp	r3, #0
+	beq	.L2549
+	bl	INSERT_DATA_LIST
+.L2550:
+	ldr	r3, .L2558+60
+	movw	r6, #65535
+	strh	r6, [r4]	@ movhi
+	movs	r4, #0
+	strh	r4, [r5]	@ movhi
+	strh	r4, [r3]	@ movhi
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	ldr	r3, .L2558+64
+	ldrh	r2, [r3]
+	ldr	r3, .L2558+68
+	ldrh	r3, [r3]
+	add	r3, r3, r3, lsl #1
+	cmp	r2, r3, asr #2
+	ble	.L2541
+	ldr	r3, .L2558+72
+	movs	r2, #20
+	mov	r0, r4
+	strh	r6, [r3]	@ movhi
+	ldr	r3, .L2558+76
+	strh	r2, [r3]	@ movhi
+	b	.L2535
+.L2547:
+	uxth	r3, r6
+	movs	r7, #12
+	ldr	r2, [fp]
+	muls	r7, r3, r7
+	ldr	r3, .L2558+80
+	ldr	r8, [r3]
+	add	r10, r8, r7
+	ldr	r1, [r10, #8]
+	cmp	r1, r2
+	bcc	.L2544
+	ldr	r1, .L2558+28
+	movs	r2, #168
+	ldr	r0, .L2558+32
+	bl	printf
+	ldr	r1, .L2558+36
+	ldr	r0, .L2558+40
+	bl	printf
+.L2544:
+	movs	r2, #0
+	add	r1, sp, #12
+	ldr	r0, [r10, #8]
+	bl	log2phys
+	ldr	r2, [sp, #12]
+	ldr	r0, [r8, r7]
+	cmp	r0, r2
+	bne	.L2545
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	movs	r2, #1
+	mov	r7, r0
+	add	r1, r10, #4
+	ldr	r0, [r10, #8]
+	bl	log2phys
+	mov	r0, r7
+.L2557:
+	bl	decrement_vpc_count
+.L2546:
+	adds	r6, r6, #1
+	b	.L2543
+.L2545:
+	ldr	r3, [r10, #4]
+	cmp	r2, r3
+	beq	.L2546
+	ldrh	r0, [r4]
+	b	.L2557
+.L2549:
+	bl	INSERT_FREE_LIST
+	b	.L2550
+.L2559:
+	.align	2
+.L2558:
+	.word	.LANCHOR75
+	.word	.LANCHOR92
+	.word	.LANCHOR132
+	.word	.LANCHOR51
+	.word	.LANCHOR77
+	.word	.LANCHOR136
+	.word	.LANCHOR110
+	.word	.LANCHOR234
+	.word	.LC4
+	.word	.LC5
+	.word	.LC6
+	.word	.LANCHOR82
+	.word	.LANCHOR159
+	.word	.LANCHOR8
+	.word	.LC47
+	.word	.LANCHOR109
+	.word	.LANCHOR87
+	.word	.LANCHOR227
+	.word	.LANCHOR201
+	.word	.LANCHOR174
+	.word	.LANCHOR111
+	.word	.LANCHOR71
+	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
+	.section	.text.Ftl_get_new_temp_ppa,"ax",%progbits
+	.align	1
+	.global	Ftl_get_new_temp_ppa
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	Ftl_get_new_temp_ppa, %function
+Ftl_get_new_temp_ppa:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	movw	r3, #65535
+	ldr	r4, .L2563
+	ldrh	r2, [r4]
+	cmp	r2, r3
+	beq	.L2561
+	ldrh	r3, [r4, #4]
+	cbnz	r3, .L2562
+.L2561:
+	bl	FtlCacheWriteBack
+	movs	r0, #0
+	movs	r5, #0
+	bl	FtlGcFreeTempBlock
+	ldr	r0, .L2563
+	strb	r5, [r4, #8]
+	bl	allocate_data_superblock
+	ldr	r3, .L2563+4
+	strh	r5, [r3]	@ movhi
+	ldr	r3, .L2563+8
+	strh	r5, [r3]	@ movhi
+	bl	l2p_flush
+	mov	r0, r5
+	bl	FtlEctTblFlush
+	bl	FtlVpcTblFlush
+.L2562:
+	ldr	r0, .L2563
+	pop	{r3, r4, r5, lr}
+	b	get_new_active_ppa
+.L2564:
+	.align	2
+.L2563:
+	.word	.LANCHOR92
+	.word	.LANCHOR109
+	.word	.LANCHOR110
+	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
+	.section	.text.Ftl_gc_temp_data_write_back,"ax",%progbits
+	.align	1
+	.global	Ftl_gc_temp_data_write_back
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	Ftl_gc_temp_data_write_back, %function
+Ftl_gc_temp_data_write_back:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	ldr	r3, .L2582
+	ldr	r5, .L2582+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2566
+	ldr	r3, [r5]
+	lsls	r2, r3, #31
+	bpl	.L2566
+	ldr	r3, .L2582+8
+	ldrh	r3, [r3, #4]
+	cbz	r3, .L2566
+.L2571:
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, pc}
+.L2566:
+	ldr	r4, .L2582+12
+	movs	r3, #0
+	movs	r6, #0
+	movs	r7, #36
+	mov	r2, r3
+	ldr	r1, [r5]
+	ldr	r0, [r4]
+	bl	FlashProgPages
+.L2568:
+	ldr	r1, [r5]
+	uxth	r3, r6
+	cmp	r3, r1
+	bcc	.L2570
+	ldr	r0, [r4]
+	bl	FtlGcBufFree
+	movs	r3, #0
+	str	r3, [r5]
+	ldr	r3, .L2582+8
+	ldrh	r3, [r3, #4]
+	cmp	r3, #0
+	bne	.L2571
+	movs	r0, #1
+	bl	FtlGcFreeTempBlock
+	b	.L2581
+.L2570:
+	muls	r3, r7, r3
+	ldr	r2, [r4]
+	adds	r6, r6, #1
+	adds	r1, r2, r3
+	ldr	r2, [r2, r3]
+	adds	r3, r2, #1
+	bne	.L2569
+	ldr	r3, .L2582+8
+	movs	r5, #0
+	ldr	r0, .L2582+16
+	ldrh	r4, [r3]
+	ldr	r0, [r0]
+	strh	r5, [r0, r4, lsl #1]	@ movhi
+	strh	r2, [r3]	@ movhi
+	ldr	r2, .L2582+20
+	ldr	r0, [r1, #4]
+	ldr	r3, [r2, #96]
+	ubfx	r0, r0, #10, #16
+	adds	r3, r3, #1
+	str	r3, [r2, #96]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	bl	FtlGcPageVarInit
+.L2581:
+	movs	r0, #1
+	pop	{r3, r4, r5, r6, r7, pc}
+.L2569:
+	ldr	r3, [r1, #12]
+	ldr	r1, [r1, #4]
+	ldr	r2, [r3, #8]
+	ldr	r0, [r3, #12]
+	bl	FtlGcUpdatePage
+	b	.L2568
+.L2583:
+	.align	2
+.L2582:
+	.word	.LANCHOR8
+	.word	.LANCHOR102
+	.word	.LANCHOR92
+	.word	.LANCHOR179
+	.word	.LANCHOR82
+	.word	.LANCHOR136
+	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
+	.section	.text.FtlGcPageRecovery,"ax",%progbits
+	.align	1
+	.global	FtlGcPageRecovery
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcPageRecovery, %function
+FtlGcPageRecovery:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	ldr	r4, .L2586
+	ldr	r5, .L2586+4
+	ldrh	r1, [r4]
+	mov	r0, r5
+	bl	FtlGcScanTempBlk
+	ldrh	r2, [r5, #2]
+	ldrh	r3, [r4]
+	cmp	r2, r3
+	bcc	.L2584
+	ldr	r0, .L2586+8
+	bl	FtlMapBlkWriteDumpData
+	movs	r0, #0
+	bl	FtlGcFreeTempBlock
+	ldr	r3, .L2586+12
+	movs	r2, #0
+	str	r2, [r3]
+.L2584:
+	pop	{r3, r4, r5, pc}
+.L2587:
+	.align	2
+.L2586:
+	.word	.LANCHOR51
+	.word	.LANCHOR92
+	.word	.LANCHOR124
+	.word	.LANCHOR132
+	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
+	.section	.text.FtlPowerLostRecovery,"ax",%progbits
+	.align	1
+	.global	FtlPowerLostRecovery
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlPowerLostRecovery, %function
+FtlPowerLostRecovery:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	movs	r4, #0
+	ldr	r5, .L2589
+	ldr	r3, .L2589+4
+	mov	r0, r5
+	str	r4, [r3]
+	bl	FtlRecoverySuperblock
+	mov	r0, r5
+	ldr	r5, .L2589+8
+	bl	FtlSlcSuperblockCheck
+	mov	r0, r5
+	bl	FtlRecoverySuperblock
+	mov	r0, r5
+	bl	FtlSlcSuperblockCheck
+	bl	FtlGcPageRecovery
+	movw	r0, #65535
+	bl	decrement_vpc_count
+	mov	r0, r4
+	pop	{r3, r4, r5, pc}
+.L2590:
+	.align	2
+.L2589:
+	.word	.LANCHOR90
+	.word	.LANCHOR231
+	.word	.LANCHOR91
+	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
+	.section	.text.FtlSysBlkInit,"ax",%progbits
+	.align	1
+	.global	FtlSysBlkInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlSysBlkInit, %function
+FtlSysBlkInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	movs	r3, #0
+	ldr	r4, .L2601
+	movw	r5, #65535
+	strh	r3, [r4]	@ movhi
+	ldr	r3, .L2601+4
+	strh	r5, [r3]	@ movhi
+	ldr	r3, .L2601+8
+	ldrh	r0, [r3]
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlScanSysBlk
+	ldr	r3, .L2601+12
+	ldrh	r3, [r3]
+	cmp	r3, r5
+	bne	.L2592
+.L2594:
+	mov	r6, #-1
+.L2591:
+	mov	r0, r6
+	pop	{r3, r4, r5, r6, r7, pc}
+.L2592:
+	bl	FtlLoadSysInfo
+	mov	r6, r0
+	cmp	r0, #0
+	bne	.L2594
+	bl	FtlLoadMapInfo
+	bl	FtlLoadVonderInfo
+	bl	Ftl_load_ext_data
+	bl	FtlLoadEctTbl
+	bl	FtlFreeSysBLkSort
+	bl	SupperBlkListInit
+	bl	FtlPowerLostRecovery
+	movs	r0, #1
+	bl	FtlUpdateVaildLpn
+	ldr	r3, .L2601+16
+	movs	r0, #12
+	ldrh	r2, [r3]
+	ldr	r3, .L2601+20
+	ldr	r1, [r3]
+	mov	r3, r6
+.L2595:
+	cmp	r3, r2
+	blt	.L2597
+	ldrh	r3, [r4]
+	cmp	r3, #0
+	beq	.L2591
+.L2596:
+	ldr	r5, .L2601+24
+	ldr	r4, .L2601+28
+	mov	r0, r5
+	bl	FtlSuperblockPowerLostFix
+	mov	r0, r4
+	bl	FtlSuperblockPowerLostFix
+	ldr	r3, .L2601+32
+	ldrh	r1, [r5]
+	ldrh	r0, [r5, #4]
+	ldr	r2, [r3]
+	ldrh	r3, [r2, r1, lsl #1]
+	subs	r3, r3, r0
+	ldr	r0, .L2601+36
+	strh	r3, [r2, r1, lsl #1]	@ movhi
+	ldrh	r7, [r4, #4]
+	ldrh	r3, [r0]
+	strh	r3, [r5, #2]	@ movhi
+	movs	r3, #0
+	strb	r3, [r5, #6]
+	strh	r3, [r5, #4]	@ movhi
+	ldrh	r5, [r4]
+	ldrh	r1, [r2, r5, lsl #1]
+	subs	r1, r1, r7
+	strh	r1, [r2, r5, lsl #1]	@ movhi
+	ldrh	r2, [r0]
+	ldr	r0, .L2601+40
+	strb	r3, [r4, #6]
+	strh	r2, [r4, #2]	@ movhi
+	strh	r3, [r4, #4]	@ movhi
+	bl	FtlMapBlkWriteDumpData
+	ldr	r0, .L2601+44
+	bl	FtlMapBlkWriteDumpData
+	ldr	r2, .L2601+48
+	ldrh	r3, [r2, #30]
+	adds	r3, r3, #1
+	strh	r3, [r2, #30]	@ movhi
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	bl	FtlVpcTblFlush
+	b	.L2591
+.L2597:
+	mla	r5, r0, r3, r1
+	ldr	r5, [r5, #4]
+	cmp	r5, #0
+	blt	.L2596
+	adds	r3, r3, #1
+	b	.L2595
+.L2602:
+	.align	2
+.L2601:
+	.word	.LANCHOR230
+	.word	.LANCHOR229
+	.word	.LANCHOR37
+	.word	.LANCHOR206
+	.word	.LANCHOR66
+	.word	.LANCHOR95
+	.word	.LANCHOR90
+	.word	.LANCHOR91
+	.word	.LANCHOR82
+	.word	.LANCHOR51
+	.word	.LANCHOR124
+	.word	.LANCHOR215
+	.word	.LANCHOR135
+	.size	FtlSysBlkInit, .-FtlSysBlkInit
+	.section	.text.rk_ftl_garbage_collect,"ax",%progbits
+	.align	1
+	.global	rk_ftl_garbage_collect
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_ftl_garbage_collect, %function
+rk_ftl_garbage_collect:
+	@ args = 0, pretend = 0, frame = 32
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2693
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #32
+	ldr	r2, [r3]
+	cmp	r2, #0
+	bne	.L2655
+	ldr	r3, .L2693+4
+	ldr	r3, [r3]
+	cmp	r3, #0
+	bne	.L2655
+	ldr	r2, .L2693+8
+	ldrh	r2, [r2]
+	cmp	r2, #47
+	bls	.L2657
+	ldr	r3, .L2693+12
+	movw	r5, #65535
+	ldrh	r4, [r3]
+	cmp	r4, r5
+	beq	.L2605
+	ldr	r1, .L2693+16
+	ldrh	r2, [r1]
+	cmp	r2, r5
+	itt	eq
+	strheq	r4, [r1]	@ movhi
+	strheq	r2, [r3]	@ movhi
+.L2605:
+	cmp	r0, #0
+	bne	.L2658
+	ldr	r3, .L2693+20
+	ldrh	r3, [r3]
+	cmp	r3, #24
+	bhi	.L2659
+	ldr	r2, .L2693+24
+	cmp	r3, #16
+	ldrh	r4, [r2]
+	bls	.L2608
+	lsrs	r4, r4, #5
+.L2607:
+	ldr	r2, .L2693+28
+	ldrh	r1, [r2]
+	cmp	r1, r3
+	mov	r1, r2
+	bcs	.L2611
+	ldr	r3, .L2693+32
+	movw	r0, #65535
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bne	.L2612
+	ldr	r0, .L2693+16
+	ldrh	r0, [r0]
+	cmp	r0, r3
+	bne	.L2612
+	ldr	r3, .L2693+36
+	ldrh	r0, [r3]
+	cbnz	r0, .L2613
+	ldr	r3, .L2693+40
+	ldr	r4, .L2693+44
+	ldr	r3, [r3]
+	ldr	r4, [r4]
+	add	r3, r3, r3, lsl #1
+	cmp	r4, r3, lsr #2
+	bcs	.L2614
+.L2613:
+	ldr	r3, .L2693+48
+	ldrh	r3, [r3]
+	add	r3, r3, r3, lsl #1
+	asrs	r3, r3, #2
+	strh	r3, [r1]	@ movhi
+.L2615:
+	ldr	r3, .L2693+52
+	movs	r2, #0
+	str	r2, [r3]
+.L2603:
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2608:
+	cmp	r3, #12
+	bls	.L2609
+	lsrs	r4, r4, #4
+	b	.L2607
+.L2609:
+	cmp	r3, #8
+	bls	.L2607
+	lsrs	r4, r4, #2
+	b	.L2607
+.L2659:
+	movs	r4, #1
+	b	.L2607
+.L2614:
+	movs	r3, #18
+	strh	r3, [r2]	@ movhi
+	b	.L2615
+.L2612:
+	ldr	r3, .L2693+48
+	ldrh	r3, [r3]
+	add	r3, r3, r3, lsl #1
+	asrs	r3, r3, #2
+	strh	r3, [r1]	@ movhi
+.L2611:
+	ldr	r3, .L2693+56
+	ldrh	r3, [r3]
+	cbz	r3, .L2606
+	adds	r4, r4, #32
+	uxth	r4, r4
+.L2606:
+	ldr	r5, .L2693+60
+	movw	r3, #65535
+	ldrh	r2, [r5]
+	cmp	r2, r3
+	bne	.L2618
+	ldr	r3, .L2693+16
+	ldrh	r1, [r3]
+	cmp	r1, r2
+	beq	.L2619
+	ldr	r0, .L2693+64
+	ldr	r0, [r0]
+	ldrh	r1, [r0, r1, lsl #1]
+	cbnz	r1, .L2620
+	strh	r2, [r3]	@ movhi
+.L2620:
+	ldrh	r2, [r3]
+	strh	r2, [r5]	@ movhi
+	movw	r2, #65535
+	strh	r2, [r3]	@ movhi
+.L2619:
+	ldrh	r0, [r5]
+	movw	r6, #65535
+	movs	r3, #0
+	strb	r3, [r5, #8]
+	cmp	r0, r6
+	beq	.L2618
+	bl	IsBlkInGcList
+	cbz	r0, .L2622
+	strh	r6, [r5]	@ movhi
+.L2622:
+	ldr	r3, .L2693+68
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2623
+	ldrh	r0, [r5]
+	bl	ftl_get_blk_mode
+	strb	r0, [r5, #8]
+.L2623:
+	ldrh	r2, [r5]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L2618
+	ldr	r0, .L2693+60
+	bl	make_superblock
+	ldr	r2, .L2693+72
+	movs	r3, #0
+	strh	r3, [r5, #2]	@ movhi
+	strb	r3, [r5, #6]
+	strh	r3, [r2]	@ movhi
+	ldr	r3, .L2693+64
+	ldrh	r2, [r5]
+	ldr	r3, [r3]
+	ldrh	r2, [r3, r2, lsl #1]
+	ldr	r3, .L2693+76
+	strh	r2, [r3]	@ movhi
+.L2618:
+	ldr	r2, .L2693+80
+	ldrh	r3, [r5]
+	ldrh	r2, [r2]
+	cmp	r2, r3
+	beq	.L2624
+	ldr	r2, .L2693+84
+	ldrh	r2, [r2]
+	cmp	r2, r3
+	beq	.L2624
+	ldr	r6, .L2693+60
+	mov	r5, r6
+.L2625:
+	ldrh	r2, [r6]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L2626
+	ldr	r10, .L2693+92
+	movs	r2, #0
+	ldr	r3, .L2693+52
+	mov	r7, r10
+	str	r2, [r3]
+.L2627:
+	ldrh	r8, [r10]
+	mov	r0, r8
+	bl	List_get_gc_head_node
+	uxth	fp, r0
+	movw	r3, #65535
+	cmp	fp, r3
+	strh	fp, [r5]	@ movhi
+	bne	.L2628
+	movs	r3, #0
+	movs	r0, #8
+	strh	r3, [r10]	@ movhi
+	b	.L2603
+.L2658:
+	movs	r4, #1
+	b	.L2606
+.L2624:
+	movw	r3, #65535
+	strh	r3, [r5]	@ movhi
+.L2691:
+	ldr	r3, .L2693+36
+	ldrh	r0, [r3]
+	b	.L2603
+.L2628:
+	str	r0, [sp]
+	mov	r0, fp
+	bl	IsBlkInGcList
+	add	r3, r8, #1
+	ldr	r2, [sp]
+	cbz	r0, .L2629
+	strh	r3, [r10]	@ movhi
+	b	.L2627
+.L2629:
+	ldr	r1, .L2693+24
+	uxth	r3, r3
+	ldr	lr, .L2693+96
+	uxth	r2, r2
+	ldr	r8, .L2693+64
+	ldrh	r1, [r1]
+	ldrh	lr, [lr]
+	ldr	r0, [r8]
+	strh	r3, [r10]	@ movhi
+	mul	r1, lr, r1
+	ldrh	ip, [r0, r2, lsl #1]
+	cmp	ip, r1, asr #1
+	bgt	.L2631
+	cmp	r3, #48
+	bls	.L2632
+	cmp	ip, #8
+	bls	.L2632
+	ldr	r3, .L2693+88
+	ldrh	r3, [r3]
+	cmp	r3, #35
+	bhi	.L2632
+.L2631:
+	movs	r3, #0
+	strh	r3, [r7]	@ movhi
+.L2632:
+	ldrh	r3, [r0, r2, lsl #1]
+	cmp	r1, r3
+	bgt	.L2633
+	movw	r3, #65535
+	strh	r3, [r5]	@ movhi
+	movs	r3, #0
+	strh	r3, [r7]	@ movhi
+	b	.L2691
+.L2633:
+	cbnz	r3, .L2634
+	movw	r0, #65535
+	bl	decrement_vpc_count
+	ldrh	r3, [r7]
+	adds	r3, r3, #1
+	strh	r3, [r7]	@ movhi
+	b	.L2627
+.L2694:
+	.align	2
+.L2693:
+	.word	.LANCHOR75
+	.word	.LANCHOR169
+	.word	.LANCHOR84
+	.word	.LANCHOR113
+	.word	.LANCHOR112
+	.word	.LANCHOR87
+	.word	.LANCHOR51
+	.word	.LANCHOR174
+	.word	.LANCHOR92
+	.word	.LANCHOR235
+	.word	.LANCHOR71
+	.word	.LANCHOR99
+	.word	.LANCHOR227
+	.word	.LANCHOR170
+	.word	.LANCHOR114
+	.word	.LANCHOR201
+	.word	.LANCHOR82
+	.word	.LANCHOR8
+	.word	.LANCHOR236
+	.word	.LANCHOR237
+	.word	.LANCHOR90
+	.word	.LANCHOR91
+	.word	.LANCHOR109
+	.word	.LANCHOR176
+	.word	.LANCHOR36
+.L2634:
+	movs	r3, #0
+	strb	r3, [r5, #8]
+	ldr	r3, .L2695
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2635
+	mov	r0, fp
+	bl	ftl_get_blk_mode
+	strb	r0, [r5, #8]
+.L2635:
+	ldr	r3, .L2695+4
+	ldrh	r3, [r3]
+	cmp	r3, fp
+	bne	.L2636
+	ldr	r1, .L2695+8
+	movw	r2, #835
+	ldr	r0, .L2695+12
+	bl	printf
+	ldr	r1, .L2695+16
+	ldr	r0, .L2695+20
+	bl	printf
+.L2636:
+	ldr	r3, .L2695+24
+	ldrh	r2, [r5]
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bne	.L2637
+	ldr	r1, .L2695+8
+	mov	r2, #836
+	ldr	r0, .L2695+12
+	bl	printf
+	ldr	r1, .L2695+16
+	ldr	r0, .L2695+20
+	bl	printf
+.L2637:
+	ldr	r3, .L2695+28
+	ldrh	r2, [r5]
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bne	.L2638
+	ldr	r1, .L2695+8
+	movw	r2, #837
+	ldr	r0, .L2695+12
+	bl	printf
+	ldr	r1, .L2695+16
+	ldr	r0, .L2695+20
+	bl	printf
+.L2638:
+	mov	r0, r6
+	bl	make_superblock
+	ldr	r2, .L2695+32
+	movs	r3, #0
+	ldrh	r1, [r5]
+	strh	r3, [r2]	@ movhi
+	ldr	r2, [r8]
+	ldrh	r1, [r2, r1, lsl #1]
+	ldr	r2, .L2695+36
+	strh	r3, [r5, #2]	@ movhi
+	strb	r3, [r5, #6]
+	strh	r1, [r2]	@ movhi
+.L2626:
+	ldr	r3, .L2695+40
+	movs	r2, #1
+	str	r2, [r3]
+	ldr	r3, .L2695+44
+	ldrh	r3, [r3]
+	str	r3, [sp, #4]
+	ldr	r3, .L2695
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2639
+	ldrb	r3, [r5, #8]	@ zero_extendqisi2
+	cmp	r3, r2
+	ittt	eq
+	ldreq	r3, .L2695+48
+	ldrheq	r3, [r3]
+	streq	r3, [sp, #4]
+.L2639:
+	ldrh	r3, [r5, #2]
+	ldr	r1, [sp, #4]
+	ldr	fp, .L2695+80
+	adds	r2, r3, r4
+	cmp	r2, r1
+	itt	gt
+	movgt	r2, r1
+	subgt	r4, r2, r3
+	mov	r3, #0
+	it	gt
+	uxthgt	r4, r4
+	str	r3, [sp, #12]
+.L2641:
+	ldrh	r3, [sp, #12]
+	cmp	r4, r3
+	bls	.L2649
+	ldr	r3, .L2695+52
+	movw	r8, #65535
+	ldrh	lr, [r6, #2]
+	mov	r10, #36
+	ldr	r0, [fp]
+	ldrh	r7, [r3]
+	ldr	r3, [sp, #12]
+	add	lr, lr, r3
+	ldr	r3, .L2695+56
+	str	r3, [sp, #8]
+	movs	r3, #0
+	str	r3, [sp]
+	b	.L2650
+.L2643:
+	ldr	r1, [sp, #8]
+	ldrh	r2, [r1, #2]!
+	cmp	r2, r8
+	str	r1, [sp, #8]
+	beq	.L2642
+	ldr	r1, [sp]
+	orr	r2, lr, r2, lsl #10
+	mla	ip, r10, r1, r0
+	str	r2, [ip, #4]
+	mov	r2, r1
+	adds	r2, r2, #1
+	uxth	r2, r2
+	str	r2, [sp]
+.L2642:
+	adds	r3, r3, #1
+.L2650:
+	uxth	r2, r3
+	cmp	r2, r7
+	bcc	.L2643
+	ldrb	r2, [r6, #8]	@ zero_extendqisi2
+	ldr	r1, [sp]
+	bl	FlashReadPages
+	movs	r3, #0
+.L2690:
+	str	r3, [sp, #8]
+	ldr	r2, [sp]
+	ldrh	r3, [sp, #8]
+	cmp	r2, r3
+	bhi	.L2648
+	ldr	r3, [sp, #12]
+	adds	r3, r3, #1
+	str	r3, [sp, #12]
+	b	.L2641
+.L2648:
+	ldr	r3, [sp, #8]
+	movs	r7, #36
+	muls	r7, r3, r7
+	ldr	r3, [fp]
+	adds	r2, r3, r7
+	ldr	r3, [r3, r7]
+	adds	r3, r3, #1
+	beq	.L2645
+	ldr	r8, [r2, #12]
+	movw	r3, #61589
+	ldrh	r2, [r8]
+	cmp	r2, r3
+	bne	.L2645
+	ldr	r10, [r8, #8]
+	cmp	r10, #-1
+	bne	.L2646
+	ldr	r1, .L2695+8
+	mov	r2, #876
+	ldr	r0, .L2695+12
+	bl	printf
+	ldr	r1, .L2695+16
+	ldr	r0, .L2695+20
+	bl	printf
+.L2646:
+	movs	r2, #0
+	add	r1, sp, #28
+	mov	r0, r10
+	bl	log2phys
+	ldr	r0, [fp]
+	ldr	r3, [sp, #28]
+	add	r0, r0, r7
+	ldr	r2, [r0, #4]
+	bic	r3, r3, #-2147483648
+	cmp	r3, r2
+	bne	.L2645
+	ldr	r2, .L2695+32
+	ldr	r1, .L2695+60
+	ldr	r10, .L2695+68
+	ldrh	r3, [r2]
+	str	r1, [sp, #20]
+	adds	r3, r3, #1
+	strh	r3, [r2]	@ movhi
+	ldr	r2, [r1]
+	movs	r1, #36
+	ldr	r3, [r10]
+	mla	r3, r1, r3, r2
+	ldr	r2, [r0, #16]
+	str	r2, [r3, #16]
+	str	r3, [sp, #16]
+	bl	Ftl_get_new_temp_ppa
+	ldr	r3, [sp, #16]
+	ldr	r1, [sp, #20]
+	str	r0, [r3, #4]
+	ldr	r2, [r1]
+	movs	r1, #36
+	ldr	r3, [r10]
+	ldr	r0, [fp]
+	mla	r2, r1, r3, r2
+	add	r0, r0, r7
+	ldr	r7, .L2695+28
+	ldr	r1, [r0, #8]
+	adds	r3, r3, #1
+	str	r1, [r2, #8]
+	ldr	r1, [r0, #12]
+	str	r1, [r2, #12]
+	movs	r1, #1
+	ldr	r2, [sp, #28]
+	str	r2, [r8, #12]
+	ldrh	r2, [r7]
+	strh	r2, [r8, #2]	@ movhi
+	ldr	r2, .L2695+64
+	str	r3, [r10]
+	ldr	r2, [r2]
+	str	r2, [r8, #4]
+	bl	FtlGcBufAlloc
+	ldr	r3, .L2695
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L2647
+	ldrb	r2, [r7, #7]	@ zero_extendqisi2
+	ldr	r3, [r10]
+	cmp	r2, r3
+	beq	.L2647
+	ldrh	r3, [r7, #4]
+	cbnz	r3, .L2645
+.L2647:
+	bl	Ftl_gc_temp_data_write_back
+	cbz	r0, .L2645
+.L2692:
+	ldr	r3, .L2695+40
+	movs	r2, #0
+	str	r2, [r3]
+	b	.L2691
+.L2645:
+	ldr	r3, [sp, #8]
+	adds	r3, r3, #1
+	b	.L2690
+.L2649:
+	ldrh	r3, [r6, #2]
+	add	r4, r4, r3
+	ldr	r3, [sp, #4]
+	uxth	r4, r4
+	cmp	r3, r4
+	strh	r4, [r6, #2]	@ movhi
+	bhi	.L2651
+	ldr	r3, .L2695+68
+	ldr	r3, [r3]
+	cbz	r3, .L2652
+	bl	Ftl_gc_temp_data_write_back
+	cmp	r0, #0
+	bne	.L2692
+.L2652:
+	ldr	r3, .L2695+32
+	ldrh	r1, [r3]
+	cbnz	r1, .L2653
+	ldr	r3, .L2695+72
+	ldrh	r2, [r6]
+	ldr	r3, [r3]
+	ldrh	r0, [r3, r2, lsl #1]
+	cbz	r0, .L2653
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	ldrh	r0, [r6]
+	bl	update_vpc_list
+	bl	FtlCacheWriteBack
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+.L2653:
+	movw	r3, #65535
+	strh	r3, [r6]	@ movhi
+.L2651:
+	ldr	r3, .L2695+76
+	ldrh	r0, [r3]
+	cmp	r0, #2
+	bhi	.L2654
+	ldr	r3, .L2695+44
+	ldrh	r4, [r3]
+	b	.L2625
+.L2654:
+	ldr	r3, .L2695+40
+	movs	r2, #0
+	adds	r0, r0, #1
+	str	r2, [r3]
+	b	.L2603
+.L2655:
+	movs	r0, #0
+	b	.L2603
+.L2657:
+	mov	r0, r3
+	b	.L2603
+.L2696:
+	.align	2
+.L2695:
+	.word	.LANCHOR8
+	.word	.LANCHOR90
+	.word	.LANCHOR238
+	.word	.LC4
+	.word	.LC5
+	.word	.LC6
+	.word	.LANCHOR91
+	.word	.LANCHOR92
+	.word	.LANCHOR236
+	.word	.LANCHOR237
+	.word	.LANCHOR169
+	.word	.LANCHOR51
+	.word	.LANCHOR52
+	.word	.LANCHOR36
+	.word	.LANCHOR201+14
+	.word	.LANCHOR179
+	.word	.LANCHOR158
+	.word	.LANCHOR102
+	.word	.LANCHOR82
+	.word	.LANCHOR87
+	.word	.LANCHOR106
+	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
+	.section	.text.FtlInit,"ax",%progbits
+	.align	1
+	.global	FtlInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlInit, %function
+FtlInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	mov	r3, #-1
+	ldr	r4, .L2706
+	mov	r5, r0
+	ldr	r2, .L2706+4
+	str	r3, [r4]
+	movs	r3, #0
+	ldr	r1, .L2706+8
+	str	r3, [r2]
+	ldr	r2, .L2706+12
+	ldr	r0, .L2706+16
+	str	r3, [r2]
+	bl	printf
+	mov	r0, r5
+	bl	FtlConstantsInit
+	bl	FtlMemInit
+	bl	FtlVariablesInit
+	ldr	r3, .L2706+20
+	ldrh	r0, [r3]
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlLoadBbt
+	cbz	r0, .L2698
+	ldr	r1, .L2706+24
+	ldr	r0, .L2706+28
+.L2705:
+	bl	printf
+.L2699:
+	movs	r0, #0
+	pop	{r3, r4, r5, pc}
+.L2698:
+	bl	FtlSysBlkInit
+	cbz	r0, .L2700
+	ldr	r1, .L2706+24
+	ldr	r0, .L2706+32
+	b	.L2705
+.L2700:
+	movs	r1, #1
+	str	r1, [r4]
+	bl	rk_ftl_garbage_collect
+	ldr	r3, .L2706+36
+	ldrh	r3, [r3]
+	cmp	r3, #15
+	bhi	.L2699
+	mov	r4, #1024
+.L2702:
+	movs	r1, #1
+	mov	r0, r1
+	bl	rk_ftl_garbage_collect
+	subs	r4, r4, #1
+	bne	.L2702
+	b	.L2699
+.L2707:
+	.align	2
+.L2706:
+	.word	.LANCHOR223
+	.word	.LANCHOR239
+	.word	.LC48
+	.word	.LANCHOR75
+	.word	.LC6
+	.word	.LANCHOR37
+	.word	.LANCHOR240
+	.word	.LC49
+	.word	.LC50
+	.word	.LANCHOR87
+	.size	FtlInit, .-FtlInit
+	.section	.text.rk_ftl_init,"ax",%progbits
+	.align	1
+	.global	rk_ftl_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_ftl_init, %function
+rk_ftl_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, lr}
+	bl	FlashInit
+	mov	r4, r0
+	cbnz	r0, .L2709
+	ldr	r0, .L2710
+	bl	FtlInit
+.L2709:
+	mov	r1, r4
+	ldr	r0, .L2710+4
+	bl	printf
+	mov	r0, r4
+	pop	{r4, pc}
+.L2711:
+	.align	2
+.L2710:
+	.word	.LANCHOR15
+	.word	.LC51
+	.size	rk_ftl_init, .-rk_ftl_init
+	.section	.text.ftl_fix_nand_power_lost_error,"ax",%progbits
+	.align	1
+	.global	ftl_fix_nand_power_lost_error
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_fix_nand_power_lost_error, %function
+ftl_fix_nand_power_lost_error:
+	@ args = 0, pretend = 0, frame = 56
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2726
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #56
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L2712
+	ldr	r7, .L2726+4
+	ldr	r6, .L2726+8
+	ldr	r10, .L2726+32
+	ldrh	r5, [r7]
+	ldr	r3, [r6]
+	ldr	r4, .L2726+12
+	mov	r1, r5
+	ldr	r0, .L2726+16
+	ldrh	r2, [r3, r5, lsl #1]
+	lsl	r8, r5, #1
+	bl	printf
+	ldrh	r0, [r10]
+	bl	FtlGcRefreshBlock
+	ldrh	r0, [r4]
+	bl	FtlGcRefreshBlock
+	mov	r0, r10
+	bl	allocate_new_data_superblock
+	mov	r0, r4
+	movw	r4, #4097
+	bl	allocate_new_data_superblock
+	str	r7, [sp, #4]
+.L2714:
+	subs	r4, r4, #1
+	beq	.L2718
+	movs	r1, #1
+	mov	r0, r1
+	bl	rk_ftl_garbage_collect
+	ldr	r3, [r6]
+	ldrh	r3, [r3, r8]
+	cmp	r3, #0
+	bne	.L2714
+.L2718:
+	ldr	r3, [r6]
+	mov	r1, r5
+	ldr	r0, .L2726+16
+	ldrh	r2, [r3, r5, lsl #1]
+	bl	printf
+	ldr	r3, [r6]
+	ldrh	r4, [r3, r5, lsl #1]
+	cbnz	r4, .L2716
+	add	r0, sp, #56
+	ldr	r7, .L2726+20
+	strh	r5, [r0, #-48]!	@ movhi
+	movw	r10, #65535
+	bl	make_superblock
+	ldr	r3, .L2726+24
+	add	r0, sp, #22
+	ldr	r8, [r7]
+	mov	r2, r4
+	mov	fp, #36
+	mov	ip, r4
+	ldrh	lr, [r3]
+.L2719:
+	uxth	r3, r2
+	cmp	lr, r3
+	bhi	.L2721
+	ldr	r3, [r6]
+	mov	r1, r5
+	ldr	r0, .L2726+28
+	ldrh	r2, [r3, r5, lsl #1]
+	bl	printf
+	mov	r2, r4
+	movs	r1, #0
+	ldr	r0, [r7]
+	bl	FlashEraseBlocks
+	mov	r2, r4
+	movs	r1, #1
+	ldr	r0, [r7]
+	bl	FlashEraseBlocks
+.L2716:
+	ldr	r2, [sp, #4]
+	movw	r3, #65535
+	strh	r3, [r2]	@ movhi
+.L2712:
+	add	sp, sp, #56
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2721:
+	ldrh	r3, [r0, #2]!
+	cmp	r3, r10
+	beq	.L2720
+	mla	r1, fp, r4, r8
+	adds	r4, r4, #1
+	lsls	r3, r3, #10
+	uxth	r4, r4
+	str	r3, [r1, #4]
+	str	ip, [r1, #8]
+	str	ip, [r1, #12]
+.L2720:
+	adds	r2, r2, #1
+	b	.L2719
+.L2727:
+	.align	2
+.L2726:
+	.word	.LANCHOR8
+	.word	.LANCHOR229
+	.word	.LANCHOR82
+	.word	.LANCHOR91
+	.word	.LC52
+	.word	.LANCHOR76
+	.word	.LANCHOR36
+	.word	.LC53
+	.word	.LANCHOR90
+	.size	ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error
+	.section	.text.ftl_read,"ax",%progbits
+	.align	1
+	.global	ftl_read
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_read, %function
+ftl_read:
+	@ args = 0, pretend = 0, frame = 64
+	@ frame_needed = 0, uses_anonymous_args = 0
+	cmp	r0, #16
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #64
+	mov	r6, r1
+	mov	r7, r3
+	str	r2, [sp, #28]
+	bne	.L2729
+	mov	r2, r3
+	ldr	r1, [sp, #28]
+	add	r0, r6, #256
+	bl	FtlVendorPartRead
+	str	r0, [sp, #8]
+.L2728:
+	ldr	r0, [sp, #8]
+	add	sp, sp, #64
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2729:
+	ldr	r3, [sp, #28]
+	adds	r3, r1, r3
+	str	r3, [sp, #12]
+	ldr	r3, .L2766
+	ldr	r2, [sp, #12]
+	ldr	r3, [r3]
+	cmp	r2, r3
+	bhi	.L2751
+	ldr	r3, .L2766+4
+	ldr	r3, [r3]
+	adds	r4, r3, #1
+	beq	.L2752
+	bl	FtlCacheWriteBack
+	ldr	r3, .L2766+8
+	mov	r0, r6
+	ldr	r8, .L2766+48
+	ldrh	r4, [r3]
+	mov	r1, r4
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #12]
+	mov	r1, r4
+	str	r0, [sp, #16]
+	subs	r0, r3, #1
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #16]
+	ldr	r2, .L2766+12
+	ldr	r4, [sp, #16]
+	rsb	r3, r3, #1
+	str	r0, [sp, #20]
+	add	r3, r3, r0
+	str	r3, [sp, #4]
+	ldr	r1, [sp, #4]
+	ldr	r3, [r2]
+	add	r3, r3, r1
+	str	r3, [r2]
+	movs	r3, #0
+	mov	r5, r3
+	str	r3, [sp]
+	str	r3, [sp, #24]
+	str	r3, [sp, #8]
+.L2731:
+	ldr	r3, [sp, #4]
+	cbnz	r3, .L2750
+	ldr	r3, .L2766+16
+	ldrh	r3, [r3]
+	cmp	r3, #0
+	beq	.L2728
+	movs	r1, #1
+	ldr	r0, [sp, #4]
+	bl	rk_ftl_garbage_collect
+	b	.L2728
+.L2750:
+	movs	r2, #0
+	add	r1, sp, #60
+	mov	r0, r4
+	bl	log2phys
+	ldr	r3, [sp, #60]
+	adds	r0, r3, #1
+	bne	.L2732
+	ldr	fp, .L2766+8
+	mov	r10, #0
+.L2733:
+	ldrh	r0, [fp]
+	cmp	r10, r0
+	bcc	.L2735
+.L2736:
+	ldr	r3, [sp, #4]
+	adds	r4, r4, #1
+	subs	r3, r3, #1
+	str	r3, [sp, #4]
+	beq	.L2740
+	ldr	r3, .L2766+20
+	ldrh	r3, [r3]
+	cmp	r5, r3, lsl #2
+	bne	.L2731
+.L2740:
+	cmp	r5, #0
+	beq	.L2731
+	movs	r2, #0
+	mov	r1, r5
+	ldr	r0, [r8]
+	mov	r10, #0
+	bl	FlashReadPages
+	ldr	r3, [sp]
+	lsls	r3, r3, #9
+	str	r3, [sp, #44]
+	ldr	r3, [sp, #32]
+	lsls	r3, r3, #9
+	str	r3, [sp, #36]
+	ldr	r3, [sp, #24]
+	lsls	r3, r3, #9
+	str	r3, [sp, #40]
+.L2749:
+	mov	fp, #36
+	ldr	r3, [r8]
+	mul	fp, fp, r10
+	ldr	r1, [sp, #16]
+	add	r3, r3, fp
+	ldr	r2, [r3, #16]
+	cmp	r1, r2
+	bne	.L2742
+	ldr	r1, [r3, #8]
+	ldr	r3, .L2766+24
+	ldr	r3, [r3]
+	cmp	r1, r3
+	bne	.L2743
+	ldr	r3, [sp, #36]
+	mov	r0, r7
+	ldr	r2, [sp, #40]
+	add	r1, r1, r3
+.L2765:
+	bl	ftl_memcpy
+.L2743:
+	ldr	r3, [r8]
+	add	r2, r3, fp
+	ldr	r3, [r3, fp]
+	adds	r1, r3, #1
+	bne	.L2744
+	ldr	r1, .L2766+28
+	str	r3, [sp, #8]
+	ldr	r2, [r1, #72]
+	adds	r2, r2, #1
+	str	r2, [r1, #72]
+.L2745:
+	add	r10, r10, #1
+	cmp	r5, r10
+	bne	.L2749
+	movs	r5, #0
+	b	.L2731
+.L2735:
+	mla	r0, r0, r4, r10
+	cmp	r6, r0
+	bhi	.L2734
+	ldr	r3, [sp, #12]
+	cmp	r3, r0
+	bls	.L2734
+	subs	r0, r0, r6
+	mov	r2, #512
+	movs	r1, #0
+	add	r0, r7, r0, lsl #9
+	bl	ftl_memset
+.L2734:
+	add	r10, r10, #1
+	b	.L2733
+.L2732:
+	ldr	r2, [r8]
+	mov	r10, #36
+	mla	r10, r10, r5, r2
+	str	r3, [r10, #4]
+	ldr	r3, [sp, #16]
+	cmp	r4, r3
+	ldr	r3, .L2766+8
+	bne	.L2737
+	ldr	r2, .L2766+24
+	mov	r0, r6
+	ldrh	fp, [r3]
+	ldr	r2, [r2]
+	mov	r1, fp
+	str	r2, [r10, #8]
+	bl	__aeabi_uidivmod
+	ldr	r2, [sp, #28]
+	sub	r3, fp, r1
+	str	r1, [sp, #32]
+	cmp	r3, r2
+	it	cs
+	movcs	r3, r2
+	cmp	fp, r3
+	str	r3, [sp, #24]
+	bne	.L2738
+	str	r7, [r10, #8]
+.L2738:
+	ldr	r3, .L2766+32
+	ldr	r2, .L2766+36
+	str	r4, [r10, #16]
+	ldrh	r3, [r3]
+	ldr	r2, [r2]
+	muls	r3, r5, r3
+	adds	r5, r5, #1
+	bic	r3, r3, #3
+	add	r3, r3, r2
+	str	r3, [r10, #12]
+	b	.L2736
+.L2737:
+	ldr	r2, [sp, #20]
+	cmp	r4, r2
+	bne	.L2739
+	ldr	r2, .L2766+40
+	ldr	r1, [sp, #12]
+	ldr	r2, [r2]
+	str	r2, [r10, #8]
+	ldrh	r2, [r3]
+	mul	r3, r2, r4
+	subs	r1, r1, r3
+	cmp	r2, r1
+	str	r1, [sp]
+	bne	.L2738
+.L2764:
+	subs	r3, r3, r6
+	add	r3, r7, r3, lsl #9
+	str	r3, [r10, #8]
+	b	.L2738
+.L2739:
+	ldrh	r3, [r3]
+	muls	r3, r4, r3
+	b	.L2764
+.L2742:
+	ldr	r1, [sp, #20]
+	cmp	r1, r2
+	bne	.L2743
+	ldr	r1, [r3, #8]
+	ldr	r3, .L2766+40
+	ldr	r3, [r3]
+	cmp	r1, r3
+	bne	.L2743
+	ldr	r3, .L2766+8
+	ldr	r2, [sp, #44]
+	ldrh	r0, [r3]
+	ldr	r3, [sp, #20]
+	muls	r0, r3, r0
+	subs	r0, r0, r6
+	add	r0, r7, r0, lsl #9
+	b	.L2765
+.L2744:
+	cmp	r3, #256
+	bne	.L2745
+	ldr	r0, [r2, #4]
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	mov	fp, r0
+	bl	FtlGcRefreshBlock
+	ldr	r2, .L2766+44
+	movw	r3, #2049
+.L2747:
+	subs	r3, r3, #1
+	bne	.L2746
+.L2748:
+	bl	FtlSysFlush
+	b	.L2745
+.L2746:
+	movs	r1, #1
+	str	r2, [sp, #52]
+	mov	r0, r1
+	str	r3, [sp, #48]
+	bl	rk_ftl_garbage_collect
+	ldr	r2, [sp, #52]
+	ldr	r3, [sp, #48]
+	ldrh	r1, [r2]
+	cmp	r1, fp
+	beq	.L2747
+	b	.L2748
+.L2751:
+	mov	r3, #-1
+.L2752:
+	str	r3, [sp, #8]
+	b	.L2728
+.L2767:
+	.align	2
+.L2766:
+	.word	.LANCHOR67
+	.word	.LANCHOR223
+	.word	.LANCHOR54
+	.word	.LANCHOR164
+	.word	.LANCHOR114
+	.word	.LANCHOR36
+	.word	.LANCHOR183
+	.word	.LANCHOR136
+	.word	.LANCHOR57
+	.word	.LANCHOR186
+	.word	.LANCHOR184
+	.word	.LANCHOR201
+	.word	.LANCHOR178
+	.size	ftl_read, .-ftl_read
+	.section	.text.ftl_write,"ax",%progbits
+	.align	1
+	.global	ftl_write
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_write, %function
+ftl_write:
+	@ args = 0, pretend = 0, frame = 80
+	@ frame_needed = 0, uses_anonymous_args = 0
+	cmp	r0, #16
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #80
+	mov	r7, r1
+	str	r2, [sp, #12]
+	str	r3, [sp, #4]
+	bne	.L2769
+	mov	r2, r3
+	ldr	r1, [sp, #12]
+	add	r0, r7, #256
+	bl	FtlVendorPartWrite
+.L2768:
+	add	sp, sp, #80
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2769:
+	ldr	r3, [sp, #12]
+	adds	r5, r1, r3
+	ldr	r3, .L2823
+	ldr	r3, [r3]
+	cmp	r5, r3
+	bhi	.L2803
+	ldr	r3, .L2823+4
+	ldr	r0, [r3]
+	adds	r4, r0, #1
+	beq	.L2768
+	ldr	r3, .L2823+8
+	mov	r2, #2048
+	mov	r0, r7
+	str	r2, [r3]
+	ldr	r3, .L2823+12
+	ldrh	r4, [r3]
+	mov	r1, r4
+	bl	__aeabi_uidiv
+	mov	r1, r4
+	mov	r10, r0
+	subs	r0, r5, #1
+	bl	__aeabi_uidiv
+	ldr	r2, .L2823+16
+	sub	r5, r0, r10
+	adds	r3, r5, #1
+	adds	r1, r5, #1
+	str	r3, [sp, #8]
+	ldr	r3, [r2]
+	str	r0, [sp, #20]
+	add	r3, r3, r1
+	str	r3, [r2]
+	ldr	r3, .L2823+20
+	ldr	r8, [r3]
+	cmp	r8, #0
+	beq	.L2771
+	ldr	r3, [r8, #16]
+	cmp	r10, r3
+	beq	.L2772
+	bl	FtlCacheWriteBack
+.L2771:
+	ldr	r5, .L2823+24
+	mov	r4, r10
+.L2773:
+	ldr	r3, [sp, #8]
+	cmp	r3, #0
+	beq	.L2802
+	ldr	r6, .L2823+28
+	ldrb	r2, [r5, #6]	@ zero_extendqisi2
+	ldrh	r3, [r6]
+	cmp	r2, r3
+	bcc	.L2774
+	ldr	r1, .L2823+32
+	movw	r2, #1630
+	ldr	r0, .L2823+36
+	bl	printf
+	ldr	r1, .L2823+40
+	ldr	r0, .L2823+44
+	bl	printf
+.L2774:
+	ldrh	r3, [r5, #4]
+	cbnz	r3, .L2775
+	bl	FtlCacheWriteBack
+	mov	r0, r5
+	bl	allocate_new_data_superblock
+.L2775:
+	ldrb	r3, [r5, #7]	@ zero_extendqisi2
+	ldrh	r2, [r5, #4]
+	lsls	r3, r3, #2
+	cmp	r3, r2
+	it	cs
+	movcs	r3, r2
+	ldr	r2, [sp, #8]
+	cmp	r3, r2
+	it	cs
+	movcs	r3, r2
+	ldrb	r2, [r5, #6]	@ zero_extendqisi2
+	str	r3, [sp, #36]
+	ldrh	r3, [r6]
+	cmp	r2, r3
+	bcc	.L2776
+	ldr	r1, .L2823+32
+	movw	r2, #1663
+	ldr	r0, .L2823+36
+	bl	printf
+	ldr	r1, .L2823+40
+	ldr	r0, .L2823+44
+	bl	printf
+.L2776:
+	mov	r8, #0
+.L2777:
+	ldr	r3, [sp, #36]
+	cmp	r8, r3
+	bne	.L2798
+.L2778:
+	ldr	r3, .L2823+20
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L2799
+	ldr	r3, [sp, #8]
+	subs	r8, r8, #1
+	add	r3, r3, #-1
+	str	r3, [sp, #8]
+	bne	.L2799
+.L2802:
+	ldr	r3, [sp, #20]
+	movs	r0, #0
+	sub	r1, r3, r10
+	bl	rk_ftl_garbage_collect
+	movs	r0, #0
+	b	.L2768
+.L2772:
+	ldr	r2, .L2823+48
+	mov	r1, r4
+	mov	r0, r7
+	ldr	r3, [r2]
+	adds	r3, r3, #1
+	str	r3, [r2]
+	bl	__aeabi_uidivmod
+	ldr	r2, [sp, #12]
+	subs	r4, r4, r1
+	ldr	r0, [r8, #8]
+	mov	r3, r1
+	ldr	r1, [sp, #4]
+	cmp	r4, r2
+	it	cs
+	movcs	r4, r2
+	lsls	r6, r4, #9
+	add	r0, r0, r3, lsl #9
+	mov	r2, r6
+	bl	ftl_memcpy
+	cmp	r5, #0
+	beq	.L2805
+	ldr	r3, [sp, #12]
+	add	r7, r7, r4
+	add	r10, r10, #1
+	subs	r3, r3, r4
+	str	r3, [sp, #12]
+	ldr	r3, [sp, #4]
+	add	r3, r3, r6
+	str	r3, [sp, #4]
+	bl	FtlCacheWriteBack
+	str	r5, [sp, #8]
+	b	.L2771
+.L2798:
+	ldrh	r3, [r5, #4]
+	cmp	r3, #0
+	beq	.L2778
+	movs	r2, #0
+	add	r1, sp, #40
+	mov	r0, r4
+	movs	r6, #36
+	bl	log2phys
+	mov	r0, r5
+	mul	r6, r6, r8
+	bl	get_new_active_ppa
+	ldr	r3, .L2823+52
+	ldr	r2, .L2823+56
+	ldr	r1, [r3]
+	ldrh	r2, [r2]
+	str	r3, [sp, #16]
+	add	r1, r1, r6
+	str	r0, [r1, #4]
+	mul	r0, r2, r8
+	str	r4, [r1, #16]
+	bic	r3, r0, #3
+	ldr	r0, .L2823+60
+	str	r3, [sp, #28]
+	ldr	r3, [r0]
+	ldr	r0, [sp, #28]
+	str	r3, [sp, #32]
+	add	fp, r3, r0
+	str	fp, [r1, #12]
+	mov	r0, fp
 	movs	r1, #0
-	mov	r2, #852
-	ldr	r0, .L2242+64
-	bl	memset
-	ldr	r2, .L2242+68
-	ldr	r3, .L2242+72
-	str	r2, [r3, #0]
-	movs	r2, #0
-	ldr	r3, .L2242+76
-	strb	r2, [r3, #0]
-	ldr	r2, .L2242+28
-	ldrb	r3, [r2, #1]	@ zero_extendqisi2
-	cmp	r3, #161
-	beq	.L2203
-	cmp	r3, #241
-	beq	.L2203
-	cmp	r3, #218
-	beq	.L2203
-	cmp	r3, #220
-	bne	.L2204
-	ldrb	r2, [r2, #3]	@ zero_extendqisi2
-	cmp	r2, #149
-	bne	.L2204
-.L2203:
-	ldr	r2, .L2242+48
-	movs	r1, #1
-	ldr	r0, .L2242+28
-	strb	r1, [r2, #0]
-	movs	r2, #16
-	ldr	r1, .L2242+20
-	ldrb	r4, [r0, #0]	@ zero_extendqisi2
-	strb	r2, [r1, #0]
-	cmp	r4, #152
-	ldr	r1, .L2242+52
-	strb	r2, [r1, #0]
-	ldr	r2, .L2242+80
-	strb	r4, [r2, #1]
-	strb	r3, [r2, #2]
-	bne	.L2205
-	ldrsb	r0, [r0, #4]
-	cmp	r0, #0
-	blt	.L2205
-	movs	r0, #24
-	strb	r0, [r1, #0]
-.L2205:
-	cmp	r3, #218
-	bne	.L2206
-	mov	r1, #2048
-	b	.L2240
-.L2243:
+	bl	ftl_memset
+	cmp	r4, r10
+	ldr	r1, .L2823+12
+	beq	.L2779
+	ldr	r3, [sp, #20]
+	cmp	r4, r3
+	ldr	r3, [sp, #16]
+	bne	.L2818
+	ldr	r3, [sp, #12]
+	adds	r2, r7, r3
+	ldrh	r3, [r1]
+	smulbb	r3, r3, r4
+	subs	r2, r2, r3
+	uxth	r3, r2
+	str	r3, [sp, #16]
+	movs	r3, #0
+	str	r3, [sp, #24]
+	b	.L2782
+.L2779:
+	ldrh	r2, [r1]
+	mov	r0, r7
+	mov	r1, r2
+	str	r2, [sp, #16]
+	bl	__aeabi_uidivmod
+	ldr	r2, [sp, #16]
+	str	r1, [sp, #24]
+	subs	r2, r2, r1
+	ldr	r1, [sp, #12]
+	mov	r3, r2
+	cmp	r2, r1
+	it	cs
+	movcs	r3, r1
+	str	r3, [sp, #16]
+.L2782:
+	ldr	r3, .L2823+12
+	ldr	r2, [sp, #16]
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	ldr	r3, .L2823+52
+	ldr	r3, [r3]
+	bne	.L2783
+	cmp	r4, r10
+	add	r6, r6, r3
+	bne	.L2784
+	ldr	r3, [sp, #4]
+.L2821:
+	str	r3, [r6, #8]
+	b	.L2785
+.L2784:
+	ldr	r2, [sp, #16]
+	ldr	r3, [sp, #4]
+	muls	r2, r4, r2
+	subs	r2, r2, r7
+	add	r2, r3, r2, lsl #9
+	str	r2, [r6, #8]
+.L2785:
+	ldr	r3, .L2823+28
+	ldrb	r2, [r5, #6]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L2795
+	ldr	r1, .L2823+32
+	movw	r2, #1737
+	ldr	r0, .L2823+36
+	bl	printf
+	ldr	r1, .L2823+40
+	ldr	r0, .L2823+44
+	bl	printf
+.L2795:
+	ldr	r2, [sp, #32]
+	movw	r3, #61589
+	ldr	r1, [sp, #28]
+	add	r8, r8, #1
+	strh	r3, [r2, r1]	@ movhi
+	ldr	r2, .L2823+64
+	str	r4, [fp, #8]
+	adds	r4, r4, #1
+	ldr	r3, [r2]
+	str	r3, [fp, #4]
+	adds	r3, r3, #1
+	adds	r1, r3, #1
+	it	eq
+	moveq	r3, #0
+	str	r3, [r2]
+	ldr	r3, [sp, #40]
+	str	r3, [fp, #12]
+	ldrh	r3, [r5]
+	strh	r3, [fp, #2]	@ movhi
+	b	.L2777
+.L2824:
 	.align	2
-.L2242:
-	.word	.LANCHOR146
-	.word	.LANCHOR143
+.L2823:
+	.word	.LANCHOR67
+	.word	.LANCHOR223
 	.word	.LANCHOR241
-	.word	.LANCHOR204
-	.word	.LANCHOR205
-	.word	.LANCHOR1
-	.word	.LANCHOR151
-	.word	.LANCHOR22
-	.word	.LANCHOR148
-	.word	.LANCHOR2
-	.word	.LANCHOR35
-	.word	.LANCHOR152
-	.word	.LANCHOR0
-	.word	.LANCHOR147
-	.word	.LC53
-	.word	.LANCHOR192
-	.word	.LANCHOR31
-	.word	.LANCHOR18
-	.word	.LANCHOR23
-	.word	.LANCHOR4
-	.word	.LANCHOR243
-	.word	.LANCHOR5
-.L2206:
-	cmp	r3, #220
-	bne	.L2207
-	mov	r1, #4096
-.L2240:
-	strh	r1, [r2, #14]	@ movhi
-	strb	r3, [r2, #2]
-.L2207:
-	ldr	r1, .L2244
-	movs	r2, #32
-	ldr	r0, .L2244+4
-	bl	memcpy
-	ldr	r0, .L2244+8
-	ldr	r1, .L2244+12
-	movs	r2, #32
-	bl	memcpy
-.L2204:
-	ldr	r3, .L2244+16
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cmp	r3, #0
-	bne	.L2208
-	bl	FlashLoadPhyInfoInRam
-	cbnz	r0, .L2209
-	ldr	r3, .L2244+20
-	ldr	r4, .L2244+24
-	ldr	r3, [r3, #0]
-	ldrh	r0, [r3, #16]
-	ubfx	r0, r0, #8, #3
-	strb	r0, [r4, #0]
-	lsls	r2, r0, #31
-	bmi	.L2209
-	ldr	r3, .L2244+28
-	movs	r2, #1
-	strb	r2, [r3, #0]
-	bl	FlashSetInterfaceMode
-	ldrb	r0, [r4, #0]	@ zero_extendqisi2
-	bl	NandcSetMode
-.L2209:
-	ldr	r4, .L2244+20
-	ldr	r3, [r4, #0]
-	ldrb	r2, [r3, #26]	@ zero_extendqisi2
-	ldr	r3, .L2244+32
-	strb	r2, [r3, #0]
-	bl	FlashLoadPhyInfo
-	cmp	r0, #0
-	beq	.L2208
-	ldr	r3, [r4, #0]
-	ldr	r0, .L2244+36
-	ldrh	r1, [r3, #14]
+	.word	.LANCHOR54
+	.word	.LANCHOR160
+	.word	.LANCHOR129
+	.word	.LANCHOR90
+	.word	.LANCHOR36
+	.word	.LANCHOR242
+	.word	.LC4
+	.word	.LC5
+	.word	.LC6
+	.word	.LANCHOR162
+	.word	.LANCHOR180
+	.word	.LANCHOR57
+	.word	.LANCHOR186
+	.word	.LANCHOR158
+.L2783:
+	cmp	r4, r10
+	add	r3, r3, r6
+	ite	eq
+	ldreq	r2, .L2825
+	ldrne	r2, .L2825+4
+	ldr	r2, [r2]
+	str	r2, [r3, #8]
+	ldr	r2, [sp, #40]
+	ldr	r3, .L2825+8
+	adds	r0, r2, #1
+	beq	.L2788
+	ldr	r3, [r3]
+	movs	r1, #1
+	str	r2, [sp, #48]
+	add	r0, sp, #44
+	str	r4, [sp, #60]
+	add	r3, r3, r6
+	ldr	r2, [r3, #8]
+	ldr	r3, [r3, #12]
+	str	r2, [sp, #52]
+	movs	r2, #0
+	str	r3, [sp, #56]
+	bl	FlashReadPages
+	ldr	r3, [sp, #44]
+	adds	r3, r3, #1
+	bne	.L2789
+	ldr	r2, .L2825+12
+	ldr	r3, [r2, #72]
+	adds	r3, r3, #1
+	str	r3, [r2, #72]
+.L2792:
+	ldr	r2, [sp, #16]
+	cmp	r4, r10
+	ldr	r3, .L2825+8
+	lsl	r2, r2, #9
+	bne	.L2793
+	ldr	r1, [r3]
+	str	r3, [sp, #16]
+	ldr	r3, [sp, #24]
+	add	r1, r1, r6
+	ldr	r0, [r1, #8]
+	ldr	r1, [sp, #4]
+	add	r0, r0, r3, lsl #9
+.L2820:
+	bl	ftl_memcpy
+	ldr	r2, [sp, #20]
+	ldr	r3, [sp, #16]
+	cmp	r4, r2
+	bne	.L2785
+	ldrh	r2, [r5, #4]
+	cmp	r2, #0
+	beq	.L2785
+	ldr	r3, [r3]
+	add	r6, r6, r3
+	ldr	r3, .L2825+16
+	str	r6, [r3]
+	ldr	r3, .L2825+20
+	str	r5, [r3]
+	b	.L2785
+.L2789:
+	ldr	r1, [fp, #8]
+	cmp	r4, r1
+	beq	.L2791
+	ldr	r2, .L2825+12
+	ldr	r0, .L2825+24
+	ldr	r3, [r2, #72]
+	adds	r3, r3, #1
+	str	r3, [r2, #72]
+	mov	r2, r4
 	bl	printf
-	bl	FlashLoadPhyInfoInRam
-	adds	r3, r0, #1
-	beq	.L2199
-	bl	FlashDieInfoInit
-	ldr	r3, [r4, #0]
-	ldrb	r0, [r3, #19]	@ zero_extendqisi2
-	bl	FlashGetReadRetryDefault
-	ldr	r1, .L2244+40
-	ldr	r3, [r4, #0]
-	ldrh	r1, [r1, #0]
-	ldrb	r2, [r3, #9]	@ zero_extendqisi2
-	addw	r1, r1, #4095
-	cmp	r2, r1, lsr #12
-	blt	.L2210
-	ldrh	r1, [r3, #14]
-	adds	r1, r1, #255
-	cmp	r2, r1, lsr #8
-	bge	.L2211
-.L2210:
-	ldrh	r2, [r3, #14]
-	bic	r2, r2, #255
-	strh	r2, [r3, #14]	@ movhi
-.L2211:
-	ldr	r3, .L2244+24
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	tst	r3, #6
-	beq	.L2212
-	bl	FlashSavePhyInfo
-	ldr	r3, .L2244+44
+.L2791:
+	ldr	r3, [fp, #8]
+	cmp	r4, r3
+	beq	.L2792
+	movw	r2, #1716
+	ldr	r1, .L2825+28
+	ldr	r0, .L2825+32
+	bl	printf
+	ldr	r1, .L2825+36
+	ldr	r0, .L2825+40
+	bl	printf
+	b	.L2792
+.L2788:
+	ldr	r3, [r3]
+	movs	r1, #0
+	ldr	r2, .L2825+44
+	add	r3, r3, r6
+	ldrh	r2, [r2]
+	ldr	r0, [r3, #8]
+	bl	ftl_memset
+	b	.L2792
+.L2793:
+	ldr	r1, .L2825+48
+	ldr	r0, [r3]
+	str	r3, [sp, #16]
+	ldrh	r1, [r1]
+	ldr	r3, [sp, #4]
+	add	r0, r0, r6
+	ldr	r0, [r0, #8]
+	muls	r1, r4, r1
+	subs	r1, r1, r7
+	add	r1, r3, r1, lsl #9
+	b	.L2820
+.L2818:
+	ldr	r3, [r3]
+	ldr	r2, [sp, #4]
+	add	r6, r6, r3
+	ldrh	r3, [r1]
+	muls	r3, r4, r3
+	subs	r3, r3, r7
+	add	r3, r2, r3, lsl #9
+	b	.L2821
+.L2799:
+	ldr	r0, .L2825+8
+	mov	r3, r5
+	movs	r2, #0
+	mov	r1, r8
+	ldr	r0, [r0]
+	bl	FtlProgPages
+	ldr	r3, [sp, #8]
+	cmp	r3, r8
+	bcs	.L2800
+	ldr	r1, .L2825+28
+	mov	r2, #1752
+	ldr	r0, .L2825+32
+	bl	printf
+	ldr	r1, .L2825+36
+	ldr	r0, .L2825+40
+	bl	printf
+.L2800:
+	ldr	r3, [sp, #8]
+	sub	r3, r3, r8
+	str	r3, [sp, #8]
+	b	.L2773
+.L2803:
+	mov	r0, #-1
+	b	.L2768
+.L2805:
+	mov	r0, r5
+	b	.L2768
+.L2826:
+	.align	2
+.L2825:
+	.word	.LANCHOR183
+	.word	.LANCHOR184
+	.word	.LANCHOR180
+	.word	.LANCHOR136
+	.word	.LANCHOR129
+	.word	.LANCHOR221
+	.word	.LC54
+	.word	.LANCHOR242
+	.word	.LC4
+	.word	.LC5
+	.word	.LC6
+	.word	.LANCHOR56
+	.word	.LANCHOR54
+	.size	ftl_write, .-ftl_write
+	.section	.text.FlashReadFacBbtData,"ax",%progbits
+	.align	1
+	.global	FlashReadFacBbtData
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashReadFacBbtData, %function
+FlashReadFacBbtData:
+	@ args = 0, pretend = 0, frame = 48
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	fp, r2
+	ldr	r2, .L2840
+	sub	sp, sp, #48
+	mov	r6, r1
+	mov	r4, r0
+	ldr	r7, .L2840+4
+	ldrh	r3, [r2, #14]
+	ldrh	r2, [r2, #12]
+	smulbb	r3, r3, r2
+	ldr	r2, [r7]
+	uxth	r3, r3
+	str	r2, [sp, #20]
+	ldr	r2, .L2840+8
+	subs	r5, r3, #1
+	mul	r10, r6, r3
+	uxth	r5, r5
+	subs	r3, r3, #15
+	ldr	r1, [r2]
+	mov	r8, r2
+	str	r1, [sp, #24]
+.L2828:
+	cmp	r3, r5
+	ble	.L2835
+	mov	r0, #-1
+	b	.L2827
+.L2835:
+	add	r2, r5, r10
+	add	r0, sp, #12
+	lsls	r2, r2, #10
+	str	r3, [sp, #4]
+	str	r2, [sp, #16]
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+	ldr	r2, [sp, #12]
+	ldr	r3, [sp, #4]
+	adds	r2, r2, #1
+	beq	.L2829
+	ldr	r2, [r8]
+	ldrh	r1, [r2]
+	movw	r2, #61664
+	cmp	r1, r2
+	bne	.L2829
+	cbz	r4, .L2836
+	cbz	r6, .L2831
+.L2834:
+	mov	r2, fp
+	ldr	r1, [r7]
+	mov	r0, r4
+	bl	ftl_memcpy
+	movs	r3, #4
+	ldr	r0, .L2840+12
+	mov	r2, r3
+	mov	r1, r4
+	bl	rknand_print_hex
+	movs	r0, #0
+.L2827:
+	add	sp, sp, #48
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2831:
+	ldr	r1, [r7]
+	mov	ip, #1
+	ldr	r5, .L2840+16
+.L2832:
+	ldr	r0, [r5]
+	uxth	r3, r6
+	adds	r6, r6, #1
+	cmp	r3, r0
+	bcs	.L2834
+	lsrs	r0, r3, #5
+	and	r3, r3, #31
+	lsl	r3, ip, r3
+	ldr	r2, [r1, r0, lsl #2]
+	orrs	r3, r3, r2
+	str	r3, [r1, r0, lsl #2]
+	b	.L2832
+.L2829:
+	subs	r5, r5, #1
+	uxth	r5, r5
+	b	.L2828
+.L2836:
+	mov	r0, r4
+	b	.L2827
+.L2841:
+	.align	2
+.L2840:
+	.word	.LANCHOR15
+	.word	.LANCHOR143
+	.word	.LANCHOR194
+	.word	.LC55
+	.word	.LANCHOR145
+	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
+	.section	.text.FlashGetBadBlockList,"ax",%progbits
+	.align	1
+	.global	FlashGetBadBlockList
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashGetBadBlockList, %function
+FlashGetBadBlockList:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r5, r0
+	ldr	r3, .L2852
+	ldr	r6, .L2852+4
+	ldr	r3, [r3]
+	ldr	r0, [r6]
+	ldrb	r4, [r3, #13]	@ zero_extendqisi2
+	ldrh	r3, [r3, #14]
+	smulbb	r4, r4, r3
+	uxth	r4, r4
+	adds	r2, r4, #7
+	asrs	r2, r2, #3
+	bl	FlashReadFacBbtData
+	adds	r0, r0, #1
+	bne	.L2843
+.L2847:
+	movs	r3, #0
+.L2844:
+	movw	r2, #65535
 	movs	r0, #0
-	ldr	r1, [r3, #0]
-	bl	FlashDdrParaScan
-.L2212:
-	bl	FlashSavePhyInfo
-.L2208:
-	ldr	r5, .L2244+20
-	ldr	r2, .L2244+32
-	ldr	r4, .L2244+48
-	ldr	r3, [r5, #0]
-	ldrb	r1, [r3, #26]	@ zero_extendqisi2
-	ldrb	r6, [r3, #18]	@ zero_extendqisi2
-	strb	r1, [r2, #0]
-	ldr	r1, .L2244+52
-	ldrh	r2, [r3, #16]
-	ubfx	r0, r2, #7, #1
-	strb	r0, [r1, #0]
-	ldr	r1, .L2244+56
-	ubfx	r0, r2, #3, #1
-	strb	r0, [r1, #0]
-	ubfx	r0, r2, #4, #1
-	ldr	r1, .L2244+60
-	ubfx	r2, r2, #8, #3
-	strb	r0, [r1, #0]
-	ldr	r1, .L2244+24
-	ldrh	r0, [r3, #10]
-	strb	r2, [r1, #0]
+	strh	r2, [r5, r3, lsl #1]	@ movhi
+	pop	{r3, r4, r5, r6, r7, pc}
+.L2843:
+	ldr	r7, [r6]
 	movs	r2, #0
-	ldrb	r1, [r3, #12]	@ zero_extendqisi2
-	str	r2, [r4, #0]
-	bl	__aeabi_idiv
-	mov	r1, r0
-	mov	r0, r6
-	bl	BuildFlashLsbPageTable
-	bl	FlashDieInfoInit
-	ldr	r3, [r5, #0]
-	ldrh	r2, [r3, #16]
-	lsls	r0, r2, #25
-	bpl	.L2213
-	ldrb	r0, [r3, #19]	@ zero_extendqisi2
-	ldr	r2, .L2244+64
-	ldr	r3, .L2244+68
-	ldrb	r1, [r2, #1]	@ zero_extendqisi2
-	strb	r0, [r3, #0]
-	ldr	r3, .L2244+72
-	strb	r1, [r3, #0]
-	ldrb	r1, [r2, #2]	@ zero_extendqisi2
-	ldr	r3, .L2244+76
-	strb	r1, [r3, #0]
-	subs	r1, r0, #1
-	cmp	r1, #6
-	bhi	.L2214
-	ldr	r3, .L2244+80
-	str	r3, [r4, #0]
-	subs	r3, r0, #5
-	cmp	r3, #1
-	bhi	.L2215
-	ldr	r3, .L2244+84
-	movs	r2, #1
-	str	r2, [r3, #0]
-	b	.L2216
-.L2215:
-	cmp	r0, #7
-	beq	.L2237
-.L2216:
-	ldr	r1, .L2244+88
-	b	.L2217
-.L2237:
-	add	r1, r2, #28
-.L2217:
-	movs	r3, #0
-	mov	r2, r3
-.L2219:
-	ldrsb	r4, [r1, r2]
-	cbnz	r4, .L2218
-	adds	r3, r3, #1
-.L2218:
+	lsr	ip, r4, #4
+	mov	r3, r2
+	subs	r4, r4, #1
+	mov	lr, #1
+.L2845:
+	uxth	r1, r2
+	cmp	r1, r4
+	bge	.L2844
+	lsrs	r6, r1, #5
+	and	r0, r1, #31
+	lsl	r0, lr, r0
 	adds	r2, r2, #1
-	cmp	r2, #32
-	bne	.L2219
-	cmp	r3, #27
-	bls	.L2213
-	bl	FlashGetReadRetryDefault
-	bl	FlashSavePhyInfo
-	b	.L2213
-.L2214:
-	sub	r2, r0, #17
-	cmp	r2, #2
-	bhi	.L2220
-	ldr	r2, .L2244+92
-	str	r2, [r4, #0]
-	movs	r2, #7
-	cmp	r0, #19
-	strb	r2, [r3, #0]
-	bne	.L2213
-	movs	r2, #15
-	b	.L2241
-.L2220:
-	cmp	r0, #33
-	beq	.L2221
-	cmp	r0, #65
-	beq	.L2221
-	cmp	r0, #66
-	bne	.L2222
-.L2221:
-	ldr	r2, .L2244+96
-	ldr	r3, .L2244+48
-	str	r2, [r3, #0]
-	movs	r2, #4
-	ldr	r3, .L2244+72
-	strb	r2, [r3, #0]
-	movs	r2, #7
-	ldr	r3, .L2244+76
-	b	.L2241
-.L2222:
-	cmp	r0, #67
-	beq	.L2223
-	cmp	r0, #34
-	beq	.L2223
-	cmp	r0, #35
-	beq	.L2223
-	cmp	r0, #68
-	bne	.L2224
-.L2223:
-	ldr	r2, .L2244+96
-	ldr	r3, .L2244+48
-	str	r2, [r3, #0]
-	movs	r2, #7
-	ldr	r3, .L2244+76
-	cmp	r0, #35
-	strb	r2, [r3, #0]
-	beq	.L2225
-	cmp	r0, #68
-	bne	.L2226
-.L2225:
-	movs	r2, #17
-	strb	r2, [r3, #0]
-.L2226:
-	subs	r0, r0, #67
-	ldr	r3, .L2244+72
-	cmp	r0, #1
-	bhi	.L2227
-	movs	r2, #4
-.L2241:
-	strb	r2, [r3, #0]
-	b	.L2213
-.L2227:
-	movs	r2, #5
-	b	.L2241
-.L2245:
+	ldr	r6, [r7, r6, lsl #2]
+	tst	r0, r6
+	ittt	ne
+	addne	r0, r3, #1
+	strhne	r1, [r5, r3, lsl #1]	@ movhi
+	uxthne	r3, r0
+	cmp	r3, ip
+	bcc	.L2845
+	b	.L2847
+.L2853:
 	.align	2
-.L2244:
-	.word	.LANCHOR27+32
-	.word	.LANCHOR6
+.L2852:
 	.word	.LANCHOR18
-	.word	.LANCHOR243
-	.word	.LANCHOR0
-	.word	.LANCHOR23
-	.word	.LANCHOR34
-	.word	.LANCHOR35
-	.word	.LANCHOR7
-	.word	.LC54
-	.word	.LANCHOR24
-	.word	.LANCHOR149
-	.word	.LANCHOR153
-	.word	.LANCHOR4
-	.word	.LANCHOR194
-	.word	.LANCHOR33
-	.word	.LANCHOR31
-	.word	.LANCHOR11
-	.word	.LANCHOR14
-	.word	.LANCHOR144
-	.word	HynixReadRetrial
-	.word	.LANCHOR39
-	.word	.LANCHOR31+20
-	.word	MicronReadRetrial
-	.word	ToshibaReadRetrial
-.L2224:
-	cmp	r0, #49
-	bne	.L2213
-	ldr	r2, .L2246
-	ldr	r3, .L2246+4
-	str	r2, [r3, #0]
-.L2213:
-	ldr	r3, .L2246+8
-	ldr	r2, [r3, #0]
-	ldr	r3, .L2246+12
-	cmp	r2, r3
-	bne	.L2228
-	ldr	r3, .L2246+16
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L2228
-	ldr	r3, .L2246+20
-	movs	r2, #0
-	ldr	r3, [r3, #0]
-	strb	r2, [r3, #18]
-.L2228:
-	ldr	r3, .L2246+24
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cmp	r3, #44
-	bne	.L2229
-	ldr	r3, .L2246+28
-	ldrb	r2, [r3, #0]	@ zero_extendqisi2
-	cbz	r2, .L2229
-	movs	r2, #0
-	movs	r0, #1
-	strb	r2, [r3, #0]
-	bl	FlashSetInterfaceMode
-	movs	r0, #1
-	bl	NandcSetMode
-.L2229:
-	movs	r0, #0
-	bl	flash_enter_slc_mode
-	ldr	r3, .L2246+32
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	tst	r3, #6
-	beq	.L2230
-	ldr	r2, .L2246+28
-	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	cbnz	r2, .L2231
-	lsls	r1, r3, #31
-	bmi	.L2230
-.L2231:
-	ldr	r3, .L2246+36
-	movs	r0, #0
-	ldr	r1, [r3, #0]
-	bl	FlashDdrParaScan
-.L2230:
-	ldr	r4, .L2246+20
-	movs	r0, #0
-	bl	flash_exit_slc_mode
-	mov	r8, #16
-	ldr	r3, [r4, #0]
-	ldrb	r0, [r3, #20]	@ zero_extendqisi2
-	bl	FlashBchSel
-	ldr	r0, .L2246+40
-	bl	FlashReadIdbDataRaw
-	ldr	r5, [r4, #0]
-	ldr	r3, .L2246+44
-	ldr	r4, .L2246+48
-	ldrb	r1, [r5, #12]	@ zero_extendqisi2
-	strb	r8, [r3, #0]
-	ldrh	r6, [r5, #10]
-	strh	r1, [r4, #8]	@ movhi
-	ldrb	r3, [r5, #7]	@ zero_extendqisi2
-	mov	r0, r6
-	ldrh	r7, [r5, #14]
+	.word	.LANCHOR151
+	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
+	.section	.text.FtlMakeBbt,"ax",%progbits
+	.align	1
+	.global	FtlMakeBbt
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlMakeBbt, %function
+FtlMakeBbt:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2874
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r7, [r3]
+	cmp	r7, #0
+	bne	.L2855
+	ldr	r8, .L2874+40
+	ldr	r4, .L2874+4
+	bl	FtlBbtMemInit
+	sub	r10, r8, #18
+	bl	FtlLoadFactoryBbt
+.L2856:
+	ldr	r3, .L2874+8
+	ldrh	r3, [r3]
+	cmp	r7, r3
+	bcc	.L2862
+	ldr	r5, .L2874+12
+	movs	r4, #0
+.L2863:
+	ldrh	r3, [r5]
+	uxth	r0, r4
+	adds	r4, r4, #1
+	cmp	r3, r0
+	bhi	.L2864
+	ldr	r4, .L2874+16
+	movw	r6, #65535
+	ldrh	r5, [r4, #12]
+	subs	r5, r5, #1
+	uxth	r5, r5
+.L2865:
+	ldrh	r3, [r4, #12]
+	subs	r3, r3, #47
+	cmp	r3, r5
+	bgt	.L2869
+	mov	r0, r5
+	bl	FtlBbmIsBadBlock
+	cmp	r0, #1
+	beq	.L2866
+	mov	r0, r5
+	bl	FlashTestBlk
+	cmp	r0, #0
+	beq	.L2867
+	mov	r0, r5
+	bl	FtlBbmMapBadBlock
+.L2866:
+	subs	r5, r5, #1
+	uxth	r5, r5
+	b	.L2865
+.L2862:
+	ldr	r3, .L2874+20
+	movw	r1, #65535
+	ldrh	r2, [r10, #2]!
+	ldr	r0, [r3]
+	ldr	r3, .L2874+24
+	cmp	r2, r1
+	str	r0, [r4, #8]
+	ldr	fp, [r3]
+	str	r3, [sp, #4]
+	ldr	r3, .L2874+28
+	str	fp, [r4, #12]
+	beq	.L2857
+	ldrh	r6, [r3]
+	mov	r0, r4
+	str	r3, [sp]
+	mla	r6, r7, r6, r2
+	lsls	r2, r6, #10
+	str	r2, [r4, #4]
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+	ldr	r3, [sp]
+	ldr	r1, [r4, #8]
+	ldr	r0, [r8]
+	ldrh	r2, [r3]
+	adds	r2, r2, #7
+	asrs	r2, r2, #3
+	bl	ftl_memcpy
+.L2858:
+	uxth	r0, r6
+	adds	r7, r7, #1
+	add	r8, r8, #4
+	bl	FtlBbmMapBadBlock
+	b	.L2856
+.L2857:
+	mov	r1, r7
+	str	r3, [sp]
+	bl	FlashGetBadBlockList
+	ldr	r1, [r8]
+	ldr	r0, [r4, #8]
+	bl	FtlBbt2Bitmap
+	ldr	r3, [sp]
+	ldrh	r5, [r3]
+.L2860:
+	subs	r5, r5, #1
+	uxth	r5, r5
+.L2859:
+	ldr	r3, [sp]
+	ldrh	r0, [r3]
+	smlabb	r0, r0, r7, r5
+	uxth	r0, r0
+	bl	FtlBbmIsBadBlock
+	cmp	r0, #1
+	beq	.L2860
+	ldr	r3, [sp, #4]
+	movs	r2, #16
+	movs	r1, #0
+	strh	r5, [r10]	@ movhi
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldr	r2, [sp]
+	movw	r3, #61664
+	strh	r3, [fp]	@ movhi
+	movs	r3, #0
+	str	r3, [fp, #4]
+	ldrh	r6, [r2]
+	ldrh	r3, [r10]
+	ldr	r1, [r8]
+	ldr	r0, [r4, #8]
+	strh	r3, [fp, #2]	@ movhi
+	mla	r6, r7, r6, r3
+	lsls	r3, r6, #10
 	str	r3, [r4, #4]
-	ldr	r3, .L2246+24
-	ldr	r3, [r3, #0]
-	str	r3, [r4, #0]
-	ldr	r3, .L2246+52
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	strh	r3, [r4, #10]	@ movhi
-	ldrb	r3, [r5, #13]	@ zero_extendqisi2
-	strh	r6, [r4, #16]	@ movhi
-	strh	r7, [r4, #14]	@ movhi
-	strh	r3, [r4, #12]	@ movhi
-	bl	__aeabi_idiv
-	mov	r2, #512
-	strh	r0, [r4, #18]	@ movhi
-	ldrb	r3, [r5, #9]	@ zero_extendqisi2
-	muls	r6, r3, r6
-	strh	r2, [r4, #24]	@ movhi
-	uxth	r6, r6
-	ldr	r2, .L2246+56
-	strh	r3, [r4, #20]	@ movhi
-	strh	r6, [r4, #22]	@ movhi
-	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	strh	r8, [r4, #26]	@ movhi
-	cmp	r2, #1
-	bne	.L2233
-	lsls	r3, r3, #1
-	lsrs	r7, r7, #1
-	strh	r3, [r4, #20]	@ movhi
-	lsls	r6, r6, #1
-	movs	r3, #8
-	strh	r7, [r4, #14]	@ movhi
-	strh	r6, [r4, #22]	@ movhi
-	strh	r3, [r4, #26]	@ movhi
-.L2233:
-	ldrb	r0, [r5, #20]	@ zero_extendqisi2
-	bl	FlashBchSel
-	movs	r0, #0
-	b	.L2199
-.L2235:
-	mvn	r0, #1
-.L2199:
-	add	sp, sp, #24
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L2247:
-	.align	2
-.L2246:
-	.word	SamsungReadRetrial
-	.word	.LANCHOR153
-	.word	.LANCHOR142
-	.word	1446522928
-	.word	.LANCHOR7
-	.word	.LANCHOR23
-	.word	.LANCHOR22
-	.word	.LANCHOR35
-	.word	.LANCHOR34
-	.word	.LANCHOR149
-	.word	.LANCHOR25
-	.word	.LANCHOR1
-	.word	.LANCHOR28
-	.word	.LANCHOR16
-	.word	.LANCHOR0
-	.size	FlashInit, .-FlashInit
-	.section	.text.rk_ftl_init,"ax",%progbits
+	ldr	r3, .L2874+32
+	ldrh	r2, [r3]
+	lsls	r2, r2, #2
+	bl	ftl_memcpy
+	movs	r2, #1
+	mov	r0, r4
+	mov	r1, r2
+	bl	FlashEraseBlocks
+	movs	r3, #1
+	mov	r0, r4
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	bne	.L2858
+	uxth	r0, r6
+	bl	FtlBbmMapBadBlock
+	b	.L2859
+.L2864:
+	bl	FtlBbmMapBadBlock
+	b	.L2863
+.L2867:
+	ldrh	r3, [r4]
+	cmp	r3, r6
+	bne	.L2868
+	strh	r5, [r4]	@ movhi
+	b	.L2866
+.L2868:
+	strh	r5, [r4, #4]	@ movhi
+.L2869:
+	ldr	r3, .L2874+36
+	movs	r5, #0
+	str	r5, [r4, #8]
+	movs	r2, #2
+	movs	r1, #1
+	strh	r5, [r4, #2]	@ movhi
+	ldr	r0, [r3]
+	ldrh	r3, [r4]
+	lsls	r3, r3, #10
+	str	r3, [r0, #4]
+	ldrh	r3, [r4, #4]
+	lsls	r3, r3, #10
+	str	r3, [r0, #40]
+	bl	FlashEraseBlocks
+	ldrh	r0, [r4]
+	bl	FtlBbmMapBadBlock
+	ldrh	r0, [r4, #4]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	ldr	r3, [r4, #8]
+	ldrh	r2, [r4, #4]
+	strh	r5, [r4, #2]	@ movhi
+	adds	r3, r3, #1
+	str	r3, [r4, #8]
+	ldrh	r3, [r4]
+	strh	r2, [r4]	@ movhi
+	strh	r3, [r4, #4]	@ movhi
+	bl	FtlBbmTblFlush
+.L2855:
+	movs	r0, #0
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2875:
+	.align	2
+.L2874:
+	.word	.LANCHOR75
+	.word	.LANCHOR199
+	.word	.LANCHOR43
+	.word	.LANCHOR58
+	.word	.LANCHOR73
+	.word	.LANCHOR79
+	.word	.LANCHOR185
+	.word	.LANCHOR49
+	.word	.LANCHOR120
+	.word	.LANCHOR76
+	.word	.LANCHOR73+28
+	.size	FtlMakeBbt, .-FtlMakeBbt
+	.section	.text.FtlLowFormat,"ax",%progbits
 	.align	1
-	.global	rk_ftl_init
+	.global	FtlLowFormat
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	rk_ftl_init, %function
-rk_ftl_init:
-	@ args = 0, pretend = 0, frame = 0
+	.fpu softvfp
+	.type	FtlLowFormat, %function
+FtlLowFormat:
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, lr}
-	bl	FlashInit
-	mov	r4, r0
-	cbnz	r0, .L2249
-	ldr	r0, .L2250
-	bl	FtlInit
-.L2249:
+	ldr	r3, .L2907
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #24
+	ldr	r3, [r3]
+	cmp	r3, #0
+	bne	.L2878
+	ldr	r6, .L2907+4
+	ldr	r2, .L2907+8
+	ldr	r5, .L2907+12
+	ldrh	r0, [r6]
+	str	r3, [r2]
+	str	r3, [r5]
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlLoadBbt
+	cbz	r0, .L2879
+	bl	FtlMakeBbt
+.L2879:
+	ldr	r3, .L2907+16
+	ldr	r2, .L2907+20
+	ldr	ip, .L2907+112
+	ldrh	r1, [r3]
+	ldr	r4, [r2]
+	ldr	r2, .L2907+24
+	str	r3, [sp, #12]
+	lsls	r1, r1, #7
+	ldr	r7, [r2]
+	movs	r2, #0
+.L2880:
+	uxth	r3, r2
+	adds	r2, r2, #1
+	cmp	r3, r1
+	blt	.L2881
+	ldr	r3, .L2907+28
+	movs	r7, #0
+	ldr	fp, .L2907+116
+	ldrh	r4, [r3]
+	mov	r8, r3
+	mov	r10, fp
+.L2882:
+	ldrh	r3, [fp]
+	cmp	r3, r4
+	bhi	.L2883
+	ldr	r4, .L2907+32
+	subs	r3, r7, #2
+	ldrh	r1, [r4]
+	cmp	r3, r1, lsl #1
+	bgt	.L2884
+.L2888:
+	movs	r7, #0
+	mov	r6, r7
+.L2885:
+	ldrh	r3, [r8]
+	uxth	r0, r7
+	adds	r7, r7, #1
+	cmp	r3, r0
+	bhi	.L2889
+	ldrh	r2, [r10]
+	ldr	r3, .L2907+36
+	ldrh	r4, [r4]
+	ldr	r7, .L2907+40
+	str	r2, [r3]
+	ldr	r3, .L2907+44
 	mov	r1, r4
-	ldr	r0, .L2250+4
-	bl	printf
+	ldr	r3, [r3]
+	mov	r0, r3
+	str	r3, [sp, #16]
+	bl	__aeabi_uidiv
+	ldr	r1, .L2907+48
+	ubfx	r3, r0, #5, #16
+	add	r2, r3, #36
+	mov	fp, r0
+	str	r0, [r7]
+	strh	r2, [r1]	@ movhi
+	movs	r2, #24
+	muls	r2, r4, r2
+	str	r3, [sp, #4]
+	str	r1, [sp, #8]
+	cmp	r6, r2
+	ble	.L2890
+	ldr	r3, [sp, #16]
+	mov	r1, r4
+	subs	r0, r3, r6
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #8]
+	str	r0, [r7]
+	lsrs	r0, r0, #5
+	adds	r0, r0, #24
+	strh	r0, [r3]	@ movhi
+.L2890:
+	ldr	r3, .L2907+52
+	ldr	r3, [r3]
+	cmp	r3, #1
+	bne	.L2891
+	ldr	r2, .L2907+48
+	mov	r1, r4
+	mov	r0, r6
+	ldrh	r3, [r2]
+	str	r2, [sp, #20]
+	str	r3, [sp, #16]
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #16]
+	ldr	r2, [sp, #20]
+	uxtah	r0, r3, r0
+	add	r3, r3, r0, asr #2
+	strh	r3, [r2]	@ movhi
+.L2891:
+	ldr	r3, .L2907+56
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2892
+	ldr	r2, .L2907+48
+	mov	r1, r4
+	mov	r0, r6
+	ldrh	r3, [r2]
+	str	r2, [sp, #20]
+	str	r3, [sp, #16]
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #16]
+	ldr	r2, [sp, #20]
+	uxtah	r0, r3, r0
+	add	r3, r3, r0, asr #2
+	strh	r3, [r2]	@ movhi
+.L2892:
+	ldr	r3, .L2907+60
+	ldrh	r3, [r3]
+	cbz	r3, .L2894
+	ldr	r2, .L2907+48
+	ldrh	r1, [r2]
+	add	r1, r1, r3, lsr #1
+	strh	r1, [r2]	@ movhi
+	mul	r1, r4, r3
+	cmp	r6, r1
+	bge	.L2894
+	ldr	r1, [sp, #4]
+	adds	r3, r3, #32
+	str	fp, [r7]
+	add	r1, r1, r3
+	strh	r1, [r2]	@ movhi
+.L2894:
+	ldr	r3, [sp, #8]
+	ldr	r6, .L2907+64
+	ldrh	r2, [r3]
+	ldr	r3, [r7]
+	subs	r3, r3, r2
+	muls	r4, r3, r4
+	ldr	r3, .L2907+68
+	ldrh	r3, [r3]
+	str	r4, [r6]
+	muls	r4, r3, r4
+	ldr	r3, [sp, #12]
+	ldrh	r3, [r3]
+	str	r4, [r7]
+	ldr	r7, .L2907+72
+	muls	r4, r3, r4
+	ldr	r3, .L2907+76
+	str	r4, [r3]
+	movw	r4, #65535
+	bl	FtlBbmTblFlush
+	ldrh	r2, [r10]
+	movs	r1, #0
+	ldr	r10, .L2907+120
+	lsls	r2, r2, #1
+	ldr	r0, [r10]
+	bl	ftl_memset
+	ldr	r2, .L2907+80
+	movs	r3, #0
+	strh	r3, [r7, #2]	@ movhi
+	movs	r1, #255
+	strb	r3, [r7, #6]
+	str	r3, [r2]
+	ldr	r2, .L2907+84
+	strh	r3, [r7]	@ movhi
+	strh	r3, [r2, #2]	@ movhi
+	strb	r3, [r2, #6]
+	strb	r3, [r2, #8]
+	movs	r3, #1
+	strh	r4, [r2]	@ movhi
+	ldrh	r2, [r8]
+	mov	r8, r10
+	strb	r3, [r7, #8]
+	mov	r10, r7
+	ldr	r3, .L2907+88
+	lsrs	r2, r2, #3
+	ldr	r0, [r3]
+	bl	ftl_memset
+.L2896:
+	mov	r0, r10
+	bl	make_superblock
+	ldrb	r3, [r7, #7]	@ zero_extendqisi2
+	ldrh	r2, [r7]
+	cmp	r3, #0
+	bne	.L2897
+	ldr	r3, [r8]
+	strh	r4, [r3, r2, lsl #1]	@ movhi
+	ldrh	r3, [r7]
+	adds	r3, r3, #1
+	strh	r3, [r7]	@ movhi
+	b	.L2896
+.L2881:
+	mvns	r0, r3
+	orr	r0, r3, r0, lsl #16
+	str	r0, [r4, r3, lsl #2]
+	str	ip, [r7, r3, lsl #2]
+	b	.L2880
+.L2883:
 	mov	r0, r4
-	pop	{r4, pc}
-.L2251:
+	movs	r1, #1
+	bl	FtlLowFormatEraseBlock
+	adds	r4, r4, #1
+	add	r7, r7, r0
+	uxth	r7, r7
+	uxth	r4, r4
+	b	.L2882
+.L2884:
+	mov	r0, r7
+	bl	__aeabi_uidiv
+	ldr	r3, .L2907+92
+	ldr	r3, [r3]
+	add	r0, r0, r3
+	uxth	r0, r0
+	bl	FtlSysBlkNumInit
+	ldrh	r0, [r6]
+	bl	FtlFreeSysBlkQueueInit
+	ldrh	r6, [r8]
+.L2886:
+	ldrh	r3, [r10]
+	cmp	r3, r6
+	bls	.L2888
+	mov	r0, r6
+	movs	r1, #1
+	adds	r6, r6, #1
+	bl	FtlLowFormatEraseBlock
+	uxth	r6, r6
+	b	.L2886
+.L2889:
+	movs	r1, #0
+	bl	FtlLowFormatEraseBlock
+	add	r6, r6, r0
+	uxth	r6, r6
+	b	.L2885
+.L2897:
+	ldr	r3, [r5]
+	ldrh	r1, [r7, #4]
+	ldr	r4, .L2907+96
+	str	r3, [r7, #12]
+	adds	r3, r3, #1
+	str	r3, [r5]
+	ldr	r3, [r8]
+	mov	r10, r4
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	movs	r3, #0
+	strh	r3, [r4, #2]	@ movhi
+	strb	r3, [r4, #6]
+	ldrh	r3, [r7]
+	movw	r7, #65535
+	adds	r3, r3, #1
+	strh	r3, [r4]	@ movhi
+	movs	r3, #1
+	strb	r3, [r4, #8]
+.L2898:
+	mov	r0, r10
+	bl	make_superblock
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	ldrh	r2, [r4]
+	cbnz	r3, .L2899
+	ldr	r3, [r8]
+	strh	r7, [r3, r2, lsl #1]	@ movhi
+	ldrh	r3, [r4]
+	adds	r3, r3, #1
+	strh	r3, [r4]	@ movhi
+	b	.L2898
+.L2899:
+	ldr	r3, [r5]
+	ldrh	r1, [r4, #4]
+	str	r3, [r4, #12]
+	adds	r3, r3, #1
+	str	r3, [r5]
+	movw	r4, #65535
+	ldr	r3, [r8]
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	ldr	r3, .L2907+100
+	strh	r4, [r3]	@ movhi
+	bl	FtlFreeSysBlkQueueOut
+	ldr	r3, .L2907+104
+	movs	r2, #0
+	strh	r2, [r3, #2]	@ movhi
+	ldr	r2, [r6]
+	strh	r0, [r3]	@ movhi
+	strh	r4, [r3, #4]	@ movhi
+	strh	r2, [r3, #6]	@ movhi
+	ldr	r2, [r5]
+	str	r2, [r3, #8]
+	adds	r2, r2, #1
+	str	r2, [r5]
+	bl	FtlVpcTblFlush
+	bl	FtlSysBlkInit
+	cbnz	r0, .L2878
+	ldr	r3, .L2907+108
+	movs	r2, #1
+	str	r2, [r3]
+.L2878:
+	movs	r0, #0
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2908:
 	.align	2
-.L2250:
-	.word	.LANCHOR28
-	.word	.LC55
-	.size	rk_ftl_init, .-rk_ftl_init
+.L2907:
+	.word	.LANCHOR75
+	.word	.LANCHOR37
+	.word	.LANCHOR158
+	.word	.LANCHOR157
+	.word	.LANCHOR54
+	.word	.LANCHOR183
+	.word	.LANCHOR184
+	.word	.LANCHOR38
+	.word	.LANCHOR36
+	.word	.LANCHOR72
+	.word	.LANCHOR71
+	.word	.LANCHOR40
+	.word	.LANCHOR227
+	.word	.LANCHOR101
+	.word	.LANCHOR8
+	.word	.LANCHOR47
+	.word	.LANCHOR226
+	.word	.LANCHOR51
+	.word	.LANCHOR90
+	.word	.LANCHOR67
+	.word	.LANCHOR99
+	.word	.LANCHOR201
+	.word	.LANCHOR0
+	.word	.LANCHOR64
+	.word	.LANCHOR91
+	.word	.LANCHOR92
+	.word	.LANCHOR206
+	.word	.LANCHOR223
+	.word	168778952
+	.word	.LANCHOR39
+	.word	.LANCHOR82
+	.size	FtlLowFormat, .-FtlLowFormat
+	.global	FtlMallocOffset
+	.global	FtlMallocBuffer
 	.global	gc_ink_free_return_value
 	.global	FtlUpdateVaildLpnCount
 	.global	g_ect_tbl_power_up_flush
@@ -20607,2245 +20741,1544 @@ rk_ftl_init:
 	.global	DieCsIndex
 	.global	IDByte
 	.global	read_retry_cur_offset
-	.section	.rodata
-.LANCHOR150 = . + 0
-.LC0:
-	.byte	60
-	.byte	40
-	.byte	24
-	.byte	16
-	.section	.bss.g_recovery_ppa_tbl,"aw",%nobits
-	.align	2
-.LANCHOR232 = . + 0
-	.type	g_recovery_ppa_tbl, %object
-	.size	g_recovery_ppa_tbl, 128
-g_recovery_ppa_tbl:
-	.space	128
-	.section	.bss.p_blk_mode_table,"aw",%nobits
-	.align	2
-.LANCHOR107 = . + 0
-	.type	p_blk_mode_table, %object
-	.size	p_blk_mode_table, 4
-p_blk_mode_table:
-	.space	4
-	.section	.rodata.__func__.7798,"a",%progbits
-.LANCHOR221 = . + 0
-	.type	__func__.7798, %object
-	.size	__func__.7798, 9
-__func__.7798:
-	.ascii	"log2phys\000"
-	.section	.bss.p_gc_blk_tbl,"aw",%nobits
+	.section	.bss.DeviceCapacity,"aw",%nobits
 	.align	2
-.LANCHOR134 = . + 0
-	.type	p_gc_blk_tbl, %object
-	.size	p_gc_blk_tbl, 4
-p_gc_blk_tbl:
-	.space	4
-	.section	.bss.g_ect_tbl_power_up_flush,"aw",%nobits
-	.align	1
-.LANCHOR218 = . + 0
-	.type	g_ect_tbl_power_up_flush, %object
-	.size	g_ect_tbl_power_up_flush, 2
-g_ect_tbl_power_up_flush:
-	.space	2
-	.section	.bss.gFlashSlcMode,"aw",%nobits
-.LANCHOR7 = . + 0
-	.type	gFlashSlcMode, %object
-	.size	gFlashSlcMode, 1
-gFlashSlcMode:
-	.space	1
-	.section	.data.gNandParaInfo,"aw",%progbits
-	.align	1
-.LANCHOR18 = . + 0
-	.type	gNandParaInfo, %object
-	.size	gNandParaInfo, 32
-gNandParaInfo:
-	.byte	0
-	.byte	0
-	.space	5
-	.byte	0
-	.byte	1
-	.byte	8
-	.short	128
-	.byte	2
-	.byte	1
-	.short	2048
-	.short	0
-	.byte	1
-	.byte	0
-	.byte	24
-	.byte	32
-	.byte	1
-	.byte	0
-	.byte	1
-	.byte	0
-	.byte	0
-	.byte	0
+	.set	.LANCHOR59,. + 0
+	.type	DeviceCapacity, %object
+	.size	DeviceCapacity, 4
+DeviceCapacity:
 	.space	4
-	.section	.bss.gNandRandomizer,"aw",%nobits
-.LANCHOR4 = . + 0
-	.type	gNandRandomizer, %object
-	.size	gNandRandomizer, 1
-gNandRandomizer:
-	.space	1
-	.section	.bss.gDieOp,"aw",%nobits
+	.section	.bss.DieAddrs,"aw",%nobits
 	.align	2
-.LANCHOR21 = . + 0
-	.type	gDieOp, %object
-	.size	gDieOp, 128
-gDieOp:
-	.space	128
-	.section	.rodata.__func__.8089,"a",%progbits
-.LANCHOR115 = . + 0
-	.type	__func__.8089, %object
-	.size	__func__.8089, 16
-__func__.8089:
-	.ascii	"make_superblock\000"
-	.section	.data.refValueDefault,"aw",%progbits
-.LANCHOR242 = . + 0
-	.type	refValueDefault, %object
-	.size	refValueDefault, 28
-refValueDefault:
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	6
-	.byte	10
-	.byte	6
-	.byte	0
-	.byte	-3
-	.byte	-7
-	.byte	-8
-	.byte	0
-	.byte	-6
-	.byte	-13
-	.byte	-15
-	.byte	0
-	.byte	-11
-	.byte	-20
-	.byte	-23
-	.byte	0
-	.byte	0
-	.byte	-26
-	.byte	-30
-	.byte	0
-	.byte	0
-	.byte	-32
-	.byte	-37
-	.section	.bss.gFlashToggleModeEn,"aw",%nobits
-.LANCHOR35 = . + 0
-	.type	gFlashToggleModeEn, %object
-	.size	gFlashToggleModeEn, 1
-gFlashToggleModeEn:
-	.space	1
-	.section	.bss.g_sys_ext_data,"aw",%nobits
+	.set	.LANCHOR17,. + 0
+	.type	DieAddrs, %object
+	.size	DieAddrs, 32
+DieAddrs:
+	.space	32
+	.section	.bss.DieCsIndex,"aw",%nobits
 	.align	2
-.LANCHOR132 = . + 0
-	.type	g_sys_ext_data, %object
-	.size	g_sys_ext_data, 512
-g_sys_ext_data:
-	.space	512
-	.section	.bss.c_ftl_nand_page_pre_super_blk,"aw",%nobits
+	.set	.LANCHOR26,. + 0
+	.type	DieCsIndex, %object
+	.size	DieCsIndex, 8
+DieCsIndex:
+	.space	8
+	.section	.bss.FlashDdrTunningReadCount,"aw",%nobits
+	.align	2
+	.set	.LANCHOR148,. + 0
+	.type	FlashDdrTunningReadCount, %object
+	.size	FlashDdrTunningReadCount, 4
+FlashDdrTunningReadCount:
+	.space	4
+	.section	.bss.FlashWaitBusyScheduleEn,"aw",%nobits
+	.align	2
+	.type	FlashWaitBusyScheduleEn, %object
+	.size	FlashWaitBusyScheduleEn, 4
+FlashWaitBusyScheduleEn:
+	.space	4
+	.section	.bss.FtlMallocBuffer,"aw",%nobits
+	.align	6
+	.type	FtlMallocBuffer, %object
+	.size	FtlMallocBuffer, 1310720
+FtlMallocBuffer:
+	.space	1310720
+	.section	.bss.FtlUpdateVaildLpnCount,"aw",%nobits
 	.align	1
-.LANCHOR58 = . + 0
-	.type	c_ftl_nand_page_pre_super_blk, %object
-	.size	c_ftl_nand_page_pre_super_blk, 2
-c_ftl_nand_page_pre_super_blk:
+	.set	.LANCHOR98,. + 0
+	.type	FtlUpdateVaildLpnCount, %object
+	.size	FtlUpdateVaildLpnCount, 2
+FtlUpdateVaildLpnCount:
 	.space	2
-	.section	.bss.g_inkDie_check_enable,"aw",%nobits
+	.section	.bss.IDByte,"aw",%nobits
 	.align	2
-.LANCHOR116 = . + 0
-	.type	g_inkDie_check_enable, %object
-	.size	g_inkDie_check_enable, 4
-g_inkDie_check_enable:
-	.space	4
-	.section	.bss.gNandFlashEccBits,"aw",%nobits
-.LANCHOR29 = . + 0
-	.type	gNandFlashEccBits, %object
-	.size	gNandFlashEccBits, 1
-gNandFlashEccBits:
-	.space	1
+	.set	.LANCHOR22,. + 0
+	.type	IDByte, %object
+	.size	IDByte, 32
+IDByte:
+	.space	32
+	.section	.bss.c_ftl_nand_bbm_buf_size,"aw",%nobits
+	.align	1
+	.set	.LANCHOR120,. + 0
+	.type	c_ftl_nand_bbm_buf_size, %object
+	.size	c_ftl_nand_bbm_buf_size, 2
+c_ftl_nand_bbm_buf_size:
+	.space	2
+	.section	.bss.c_ftl_nand_blk_pre_plane,"aw",%nobits
+	.align	1
+	.set	.LANCHOR39,. + 0
+	.type	c_ftl_nand_blk_pre_plane, %object
+	.size	c_ftl_nand_blk_pre_plane, 2
+c_ftl_nand_blk_pre_plane:
+	.space	2
+	.section	.bss.c_ftl_nand_blks_per_die,"aw",%nobits
+	.align	1
+	.set	.LANCHOR49,. + 0
+	.type	c_ftl_nand_blks_per_die, %object
+	.size	c_ftl_nand_blks_per_die, 2
+c_ftl_nand_blks_per_die:
+	.space	2
+	.section	.bss.c_ftl_nand_blks_per_die_shift,"aw",%nobits
+	.align	1
+	.set	.LANCHOR50,. + 0
+	.type	c_ftl_nand_blks_per_die_shift, %object
+	.size	c_ftl_nand_blks_per_die_shift, 2
+c_ftl_nand_blks_per_die_shift:
+	.space	2
+	.section	.bss.c_ftl_nand_byte_pre_oob,"aw",%nobits
+	.align	1
+	.set	.LANCHOR57,. + 0
+	.type	c_ftl_nand_byte_pre_oob, %object
+	.size	c_ftl_nand_byte_pre_oob, 2
+c_ftl_nand_byte_pre_oob:
+	.space	2
+	.section	.bss.c_ftl_nand_byte_pre_page,"aw",%nobits
+	.align	1
+	.set	.LANCHOR56,. + 0
+	.type	c_ftl_nand_byte_pre_page, %object
+	.size	c_ftl_nand_byte_pre_page, 2
+c_ftl_nand_byte_pre_page:
+	.space	2
+	.section	.bss.c_ftl_nand_data_blks_per_plane,"aw",%nobits
+	.align	1
+	.set	.LANCHOR38,. + 0
+	.type	c_ftl_nand_data_blks_per_plane, %object
+	.size	c_ftl_nand_data_blks_per_plane, 2
+c_ftl_nand_data_blks_per_plane:
+	.space	2
 	.section	.bss.c_ftl_nand_data_op_blks_per_plane,"aw",%nobits
 	.align	1
-.LANCHOR201 = . + 0
+	.set	.LANCHOR227,. + 0
 	.type	c_ftl_nand_data_op_blks_per_plane, %object
 	.size	c_ftl_nand_data_op_blks_per_plane, 2
 c_ftl_nand_data_op_blks_per_plane:
 	.space	2
-	.section	.rodata.__func__.7377,"a",%progbits
-.LANCHOR223 = . + 0
-	.type	__func__.7377, %object
-	.size	__func__.7377, 13
-__func__.7377:
-	.ascii	"FtlProgPages\000"
-	.section	.bss.g_in_swl_replace,"aw",%nobits
-	.align	2
-.LANCHOR169 = . + 0
-	.type	g_in_swl_replace, %object
-	.size	g_in_swl_replace, 4
-g_in_swl_replace:
-	.space	4
-	.section	.bss.g_maxRetryCount,"aw",%nobits
-.LANCHOR144 = . + 0
-	.type	g_maxRetryCount, %object
-	.size	g_maxRetryCount, 1
-g_maxRetryCount:
-	.space	1
-	.section	.bss.gMultiPageProgEn,"aw",%nobits
-.LANCHOR33 = . + 0
-	.type	gMultiPageProgEn, %object
-	.size	gMultiPageProgEn, 1
-gMultiPageProgEn:
-	.space	1
-	.section	.bss.gMasterInfo,"aw",%nobits
-	.align	2
-.LANCHOR38 = . + 0
-	.type	gMasterInfo, %object
-	.size	gMasterInfo, 32
-gMasterInfo:
-	.space	32
-	.section	.bss.gReadRetryInfo,"aw",%nobits
-.LANCHOR31 = . + 0
-	.type	gReadRetryInfo, %object
-	.size	gReadRetryInfo, 852
-gReadRetryInfo:
-	.space	852
 	.section	.bss.c_ftl_nand_die_num,"aw",%nobits
 	.align	1
-.LANCHOR48 = . + 0
+	.set	.LANCHOR43,. + 0
 	.type	c_ftl_nand_die_num, %object
 	.size	c_ftl_nand_die_num, 2
 c_ftl_nand_die_num:
 	.space	2
-	.section	.bss.g_cur_erase_blk,"aw",%nobits
-	.align	2
-.LANCHOR77 = . + 0
-	.type	g_cur_erase_blk, %object
-	.size	g_cur_erase_blk, 4
-g_cur_erase_blk:
-	.space	4
-	.section	.bss.gToggleModeClkDiv,"aw",%nobits
-	.align	2
-	.type	gToggleModeClkDiv, %object
-	.size	gToggleModeClkDiv, 4
-gToggleModeClkDiv:
-	.space	4
-	.section	.bss.p_valid_page_count_table,"aw",%nobits
-	.align	2
-.LANCHOR89 = . + 0
-	.type	p_valid_page_count_table, %object
-	.size	p_valid_page_count_table, 4
-p_valid_page_count_table:
-	.space	4
-	.section	.bss.req_erase,"aw",%nobits
-	.align	2
-.LANCHOR83 = . + 0
-	.type	req_erase, %object
-	.size	req_erase, 4
-req_erase:
-	.space	4
-	.section	.bss.c_ftl_nand_max_data_blks,"aw",%nobits
-	.align	2
-.LANCHOR45 = . + 0
-	.type	c_ftl_nand_max_data_blks, %object
-	.size	c_ftl_nand_max_data_blks, 4
-c_ftl_nand_max_data_blks:
-	.space	4
-	.section	.bss.gNandFlashInfoBlockEcc,"aw",%nobits
-	.type	gNandFlashInfoBlockEcc, %object
-	.size	gNandFlashInfoBlockEcc, 1
-gNandFlashInfoBlockEcc:
-	.space	1
-	.section	.bss.g_nandc_version_data,"aw",%nobits
-	.align	2
-.LANCHOR142 = . + 0
-	.type	g_nandc_version_data, %object
-	.size	g_nandc_version_data, 4
-g_nandc_version_data:
-	.space	4
-	.section	.bss.gNandIDBResBlkNumSaveInFlash,"aw",%nobits
-.LANCHOR151 = . + 0
-	.type	gNandIDBResBlkNumSaveInFlash, %object
-	.size	gNandIDBResBlkNumSaveInFlash, 1
-gNandIDBResBlkNumSaveInFlash:
-	.space	1
-	.section	.bss.g_MaxLbn,"aw",%nobits
+	.section	.bss.c_ftl_nand_ext_blk_pre_plane,"aw",%nobits
+	.align	1
+	.set	.LANCHOR47,. + 0
+	.type	c_ftl_nand_ext_blk_pre_plane, %object
+	.size	c_ftl_nand_ext_blk_pre_plane, 2
+c_ftl_nand_ext_blk_pre_plane:
+	.space	2
+	.section	.bss.c_ftl_nand_init_sys_blks_per_plane,"aw",%nobits
 	.align	2
-.LANCHOR200 = . + 0
-	.type	g_MaxLbn, %object
-	.size	g_MaxLbn, 4
-g_MaxLbn:
+	.set	.LANCHOR64,. + 0
+	.type	c_ftl_nand_init_sys_blks_per_plane, %object
+	.size	c_ftl_nand_init_sys_blks_per_plane, 4
+c_ftl_nand_init_sys_blks_per_plane:
 	.space	4
-	.section	.bss.g_power_lost_recovery_flag,"aw",%nobits
+	.section	.bss.c_ftl_nand_l2pmap_ram_region_num,"aw",%nobits
 	.align	1
-.LANCHOR230 = . + 0
-	.type	g_power_lost_recovery_flag, %object
-	.size	g_power_lost_recovery_flag, 2
-g_power_lost_recovery_flag:
+	.set	.LANCHOR66,. + 0
+	.type	c_ftl_nand_l2pmap_ram_region_num, %object
+	.size	c_ftl_nand_l2pmap_ram_region_num, 2
+c_ftl_nand_l2pmap_ram_region_num:
 	.space	2
-	.section	.bss.g_retryMode,"aw",%nobits
-.LANCHOR11 = . + 0
-	.type	g_retryMode, %object
-	.size	g_retryMode, 1
-g_retryMode:
-	.space	1
-	.section	.bss.g_page_map_check_enable,"aw",%nobits
+	.section	.bss.c_ftl_nand_map_blks_per_plane,"aw",%nobits
 	.align	1
-.LANCHOR73 = . + 0
-	.type	g_page_map_check_enable, %object
-	.size	g_page_map_check_enable, 2
-g_page_map_check_enable:
+	.set	.LANCHOR62,. + 0
+	.type	c_ftl_nand_map_blks_per_plane, %object
+	.size	c_ftl_nand_map_blks_per_plane, 2
+c_ftl_nand_map_blks_per_plane:
+	.space	2
+	.section	.bss.c_ftl_nand_map_region_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR65,. + 0
+	.type	c_ftl_nand_map_region_num, %object
+	.size	c_ftl_nand_map_region_num, 2
+c_ftl_nand_map_region_num:
 	.space	2
-	.section	.bss.gpFlashSaveInfo,"aw",%nobits
-	.align	2
-.LANCHOR145 = . + 0
-	.type	gpFlashSaveInfo, %object
-	.size	gpFlashSaveInfo, 4
-gpFlashSaveInfo:
-	.space	4
-	.section	.bss.g_GlobalSysVersion,"aw",%nobits
-	.align	2
-.LANCHOR156 = . + 0
-	.type	g_GlobalSysVersion, %object
-	.size	g_GlobalSysVersion, 4
-g_GlobalSysVersion:
-	.space	4
-	.section	.rodata.__func__.7466,"a",%progbits
-.LANCHOR80 = . + 0
-	.type	__func__.7466, %object
-	.size	__func__.7466, 14
-__func__.7466:
-	.ascii	"FtlBbt2Bitmap\000"
-	.section	.bss.gpReadRetrial,"aw",%nobits
+	.section	.bss.c_ftl_nand_max_data_blks,"aw",%nobits
 	.align	2
-.LANCHOR153 = . + 0
-	.type	gpReadRetrial, %object
-	.size	gpReadRetrial, 4
-gpReadRetrial:
+	.set	.LANCHOR40,. + 0
+	.type	c_ftl_nand_max_data_blks, %object
+	.size	c_ftl_nand_max_data_blks, 4
+c_ftl_nand_max_data_blks:
 	.space	4
-	.section	.rodata.str1.1,"aMS",%progbits,1
-.LC1:
-	.ascii	"FlashEraseBlocks pageAddr error %x\012\000"
-.LC2:
-	.ascii	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\012"
-	.ascii	"\000"
-.LC3:
-	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
-.LC4:
-	.ascii	"%s\012\000"
-.LC5:
-	.ascii	"!!!!! FTL sys Error !!!!!\000"
-.LC6:
-	.ascii	"remove_from_free_sys_Queue %x\012\000"
-.LC7:
-	.ascii	"micron RR %d row=%x,count %d,status=%d\012\000"
-.LC8:
-	.ascii	"ECC:%d\012\000"
-.LC9:
-	.ascii	"sdr read ok %x ecc=%d\012\000"
-.LC10:
-	.ascii	"sync para %d\012\000"
-.LC11:
-	.ascii	"TOG mode Read error %x %x\012\000"
-.LC12:
-	.ascii	"read retry status %x %x %x\012\000"
-.LC13:
-	.ascii	"%s 0x%x:\000"
-.LC14:
-	.ascii	"%x \000"
-.LC15:
-	.ascii	"\000"
-.LC16:
-	.ascii	"Read pageadd=%x  ecc=%x err=%x\012\000"
-.LC17:
-	.ascii	"data:\000"
-.LC18:
-	.ascii	"spare:\000"
-.LC19:
-	.ascii	"ReadRetry pageadd=%x ecc=%x err=%x\012\000"
-.LC20:
-	.ascii	"FtlGcScanTempBlkError ID %x %x!!!!!!!\012\000"
-.LC21:
-	.ascii	"prog error: = %x\012\000"
-.LC22:
-	.ascii	"prog read error: = %x\012\000"
-.LC23:
-	.ascii	"prog read s error: = %x %x %x\012\000"
-.LC24:
-	.ascii	"prog read d error: = %x %x %x\012\000"
-.LC25:
-	.ascii	"FtlVpcTblFlush error = %x error count = %d\012\000"
-.LC26:
-	.ascii	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\012\000"
-.LC27:
-	.ascii	"FtlBbmTblFlush error:%x\012\000"
-.LC28:
-	.ascii	"FtlBbmTblFlush error = %x error count = %d\012\000"
-.LC29:
-	.ascii	"decrement_vpc_count %x = %d\012\000"
-.LC30:
-	.ascii	"ftl_map_blk_gc blk info: %x %x %x\012\000"
-.LC31:
-	.ascii	"page map lost: %x %x\012\000"
-.LC32:
-	.ascii	"FtlMapWritePage error = %x\012\000"
-.LC33:
-	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
-.LC34:
-	.ascii	"FtlVendorPartRead refresh = %x phyAddr = %x\012\000"
-.LC35:
-	.ascii	"slc mode\000"
-.LC36:
-	.ascii	"no ect\000"
-.LC37:
-	.ascii	"page map lost %x %x %x %x\012\000"
-.LC38:
-	.ascii	"load_l2p_region refresh = %x phyAddr = %x\012\000"
-.LC39:
-	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
-.LC40:
-	.ascii	"GC des block %x done\012\000"
-.LC41:
-	.ascii	"RSB refresh addr %x\012\000"
-.LC42:
-	.ascii	"spuer block %x vpn is 0\012 \000"
-.LC43:
-	.ascii	"g_recovery_ppa %x ver %x\012 \000"
-.LC44:
-	.ascii	"fix power lost blk = %x vpc=%x\012\000"
-.LC45:
-	.ascii	"erase power lost blk = %x vpc=%x\012\000"
-.LC46:
-	.ascii	"FTL version: 5.0.47 20171221\000"
-.LC47:
-	.ascii	"...%s: no bad block mapping table, format device\012"
-	.ascii	"\000"
-.LC48:
-	.ascii	"...%s FtlSysBlkInit error ,format device!\012\000"
-.LC49:
-	.ascii	"FtlWrite: lpa error:%x %x\012\000"
-.LC50:
-	.ascii	"BBT:\000"
-.LC51:
-	.ascii	"otp error! %d\000"
-.LC52:
-	.ascii	"rr\000"
-.LC53:
-	.ascii	"No.%d FLASH ID:%x %x %x %x %x %x\012\000"
-.LC54:
-	.ascii	"FlashLoadPhyInfo fail %x!!\012\000"
-.LC55:
-	.ascii	"FtlInit %x\012\000"
-	.section	.bss.gNandFlashIdbBlockAddr,"aw",%nobits
+	.section	.bss.c_ftl_nand_max_map_blks,"aw",%nobits
 	.align	2
-.LANCHOR148 = . + 0
-	.type	gNandFlashIdbBlockAddr, %object
-	.size	gNandFlashIdbBlockAddr, 4
-gNandFlashIdbBlockAddr:
+	.set	.LANCHOR63,. + 0
+	.type	c_ftl_nand_max_map_blks, %object
+	.size	c_ftl_nand_max_map_blks, 4
+c_ftl_nand_max_map_blks:
 	.space	4
-	.section	.bss.req_sys,"aw",%nobits
-	.align	2
-.LANCHOR198 = . + 0
-	.type	req_sys, %object
-	.size	req_sys, 36
-req_sys:
-	.space	36
-	.section	.bss.gFlashSpareBuffer,"aw",%nobits
+	.section	.bss.c_ftl_nand_max_sys_blks,"aw",%nobits
 	.align	2
-.LANCHOR241 = . + 0
-	.type	gFlashSpareBuffer, %object
-	.size	gFlashSpareBuffer, 4
-gFlashSpareBuffer:
+	.set	.LANCHOR37,. + 0
+	.type	c_ftl_nand_max_sys_blks, %object
+	.size	c_ftl_nand_max_sys_blks, 4
+c_ftl_nand_max_sys_blks:
 	.space	4
+	.section	.bss.c_ftl_nand_max_vendor_blks,"aw",%nobits
+	.align	1
+	.set	.LANCHOR60,. + 0
+	.type	c_ftl_nand_max_vendor_blks, %object
+	.size	c_ftl_nand_max_vendor_blks, 2
+c_ftl_nand_max_vendor_blks:
+	.space	2
+	.section	.bss.c_ftl_nand_page_pre_blk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR51,. + 0
+	.type	c_ftl_nand_page_pre_blk, %object
+	.size	c_ftl_nand_page_pre_blk, 2
+c_ftl_nand_page_pre_blk:
+	.space	2
+	.section	.bss.c_ftl_nand_page_pre_slc_blk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR52,. + 0
+	.type	c_ftl_nand_page_pre_slc_blk, %object
+	.size	c_ftl_nand_page_pre_slc_blk, 2
+c_ftl_nand_page_pre_slc_blk:
+	.space	2
+	.section	.bss.c_ftl_nand_page_pre_super_blk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR53,. + 0
+	.type	c_ftl_nand_page_pre_super_blk, %object
+	.size	c_ftl_nand_page_pre_super_blk, 2
+c_ftl_nand_page_pre_super_blk:
+	.space	2
+	.section	.bss.c_ftl_nand_planes_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR36,. + 0
+	.type	c_ftl_nand_planes_num, %object
+	.size	c_ftl_nand_planes_num, 2
+c_ftl_nand_planes_num:
+	.space	2
+	.section	.bss.c_ftl_nand_planes_per_die,"aw",%nobits
+	.align	1
+	.set	.LANCHOR44,. + 0
+	.type	c_ftl_nand_planes_per_die, %object
+	.size	c_ftl_nand_planes_per_die, 2
+c_ftl_nand_planes_per_die:
+	.space	2
+	.section	.bss.c_ftl_nand_reserved_blks,"aw",%nobits
+	.align	1
+	.set	.LANCHOR58,. + 0
+	.type	c_ftl_nand_reserved_blks, %object
+	.size	c_ftl_nand_reserved_blks, 2
+c_ftl_nand_reserved_blks:
+	.space	2
 	.section	.bss.c_ftl_nand_sec_pre_page,"aw",%nobits
 	.align	1
-.LANCHOR59 = . + 0
+	.set	.LANCHOR54,. + 0
 	.type	c_ftl_nand_sec_pre_page, %object
 	.size	c_ftl_nand_sec_pre_page, 2
 c_ftl_nand_sec_pre_page:
 	.space	2
-	.section	.bss.p_vendor_block_ver_table,"aw",%nobits
-	.align	2
-.LANCHOR189 = . + 0
-	.type	p_vendor_block_ver_table, %object
-	.size	p_vendor_block_ver_table, 4
-p_vendor_block_ver_table:
-	.space	4
-	.section	.bss.g_gc_next_blk,"aw",%nobits
-	.align	1
-.LANCHOR137 = . + 0
-	.type	g_gc_next_blk, %object
-	.size	g_gc_next_blk, 2
-g_gc_next_blk:
-	.space	2
-	.section	.rodata.__func__.7692,"a",%progbits
-.LANCHOR220 = . + 0
-	.type	__func__.7692, %object
-	.size	__func__.7692, 16
-__func__.7692:
-	.ascii	"load_l2p_region\000"
-	.section	.bss.mlcPageToSlcPageTbl,"aw",%nobits
-	.align	2
-.LANCHOR9 = . + 0
-	.type	mlcPageToSlcPageTbl, %object
-	.size	mlcPageToSlcPageTbl, 1024
-mlcPageToSlcPageTbl:
-	.space	1024
 	.section	.bss.c_ftl_nand_sec_pre_page_shift,"aw",%nobits
 	.align	1
-.LANCHOR60 = . + 0
+	.set	.LANCHOR55,. + 0
 	.type	c_ftl_nand_sec_pre_page_shift, %object
 	.size	c_ftl_nand_sec_pre_page_shift, 2
 c_ftl_nand_sec_pre_page_shift:
 	.space	2
-	.section	.bss.g_flash_read_only_en,"aw",%nobits
+	.section	.bss.c_ftl_nand_sys_blks_per_plane,"aw",%nobits
+	.align	2
+	.set	.LANCHOR35,. + 0
+	.type	c_ftl_nand_sys_blks_per_plane, %object
+	.size	c_ftl_nand_sys_blks_per_plane, 4
+c_ftl_nand_sys_blks_per_plane:
+	.space	4
+	.section	.bss.c_ftl_nand_totle_phy_blks,"aw",%nobits
+	.align	2
+	.set	.LANCHOR41,. + 0
+	.type	c_ftl_nand_totle_phy_blks, %object
+	.size	c_ftl_nand_totle_phy_blks, 4
+c_ftl_nand_totle_phy_blks:
+	.space	4
+	.section	.bss.c_ftl_nand_type,"aw",%nobits
+	.align	1
+	.set	.LANCHOR42,. + 0
+	.type	c_ftl_nand_type, %object
+	.size	c_ftl_nand_type, 2
+c_ftl_nand_type:
+	.space	2
+	.section	.bss.c_ftl_nand_vendor_region_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR61,. + 0
+	.type	c_ftl_nand_vendor_region_num, %object
+	.size	c_ftl_nand_vendor_region_num, 2
+c_ftl_nand_vendor_region_num:
+	.space	2
+	.section	.bss.c_ftl_vendor_part_size,"aw",%nobits
+	.align	1
+	.set	.LANCHOR48,. + 0
+	.type	c_ftl_vendor_part_size, %object
+	.size	c_ftl_vendor_part_size, 2
+c_ftl_vendor_part_size:
+	.space	2
+	.section	.bss.c_gc_page_buf_num,"aw",%nobits
+	.align	2
+	.set	.LANCHOR107,. + 0
+	.type	c_gc_page_buf_num, %object
+	.size	c_gc_page_buf_num, 4
+c_gc_page_buf_num:
+	.space	4
+	.section	.bss.c_mlc_erase_count_value,"aw",%nobits
+	.align	1
+	.set	.LANCHOR46,. + 0
+	.type	c_mlc_erase_count_value, %object
+	.size	c_mlc_erase_count_value, 2
+c_mlc_erase_count_value:
+	.space	2
+	.section	.bss.ftl_gc_temp_power_lost_recovery_flag,"aw",%nobits
 	.align	2
-.LANCHOR82 = . + 0
-	.type	g_flash_read_only_en, %object
-	.size	g_flash_read_only_en, 4
-g_flash_read_only_en:
+	.set	.LANCHOR132,. + 0
+	.type	ftl_gc_temp_power_lost_recovery_flag, %object
+	.size	ftl_gc_temp_power_lost_recovery_flag, 4
+ftl_gc_temp_power_lost_recovery_flag:
 	.space	4
-	.section	.rodata.__func__.8217,"a",%progbits
-.LANCHOR207 = . + 0
-	.type	__func__.8217, %object
-	.size	__func__.8217, 16
-__func__.8217:
-	.ascii	"update_vpc_list\000"
-	.section	.bss.read_retry_cur_offset,"aw",%nobits
-.LANCHOR32 = . + 0
-	.type	read_retry_cur_offset, %object
-	.size	read_retry_cur_offset, 4
-read_retry_cur_offset:
+	.section	.bss.gBbtInfo,"aw",%nobits
+	.align	2
+	.set	.LANCHOR73,. + 0
+	.type	gBbtInfo, %object
+	.size	gBbtInfo, 60
+gBbtInfo:
+	.space	60
+	.section	.bss.gBlockPageAlignSize,"aw",%nobits
+	.align	2
+	.set	.LANCHOR3,. + 0
+	.type	gBlockPageAlignSize, %object
+	.size	gBlockPageAlignSize, 4
+gBlockPageAlignSize:
+	.space	4
+	.section	.bss.gBootDdrMode,"aw",%nobits
+	.align	2
+	.set	.LANCHOR153,. + 0
+	.type	gBootDdrMode, %object
+	.size	gBootDdrMode, 4
+gBootDdrMode:
 	.space	4
+	.section	.bss.gDieOp,"aw",%nobits
+	.align	2
+	.set	.LANCHOR23,. + 0
+	.type	gDieOp, %object
+	.size	gDieOp, 128
+gDieOp:
+	.space	128
+	.section	.bss.gFlashInterfaceMode,"aw",%nobits
+	.set	.LANCHOR24,. + 0
+	.type	gFlashInterfaceMode, %object
+	.size	gFlashInterfaceMode, 1
+gFlashInterfaceMode:
+	.space	1
 	.section	.bss.gFlashOnfiModeEn,"aw",%nobits
 	.type	gFlashOnfiModeEn, %object
 	.size	gFlashOnfiModeEn, 1
 gFlashOnfiModeEn:
 	.space	1
-	.section	.bss.p_vendor_block_valid_page_count,"aw",%nobits
+	.section	.bss.gFlashPageBuffer0,"aw",%nobits
 	.align	2
-.LANCHOR188 = . + 0
-	.type	p_vendor_block_valid_page_count, %object
-	.size	p_vendor_block_valid_page_count, 4
-p_vendor_block_valid_page_count:
+	.set	.LANCHOR143,. + 0
+	.type	gFlashPageBuffer0, %object
+	.size	gFlashPageBuffer0, 4
+gFlashPageBuffer0:
 	.space	4
-	.section	.bss.gNandcVer,"aw",%nobits
+	.section	.bss.gFlashPageBuffer1,"aw",%nobits
 	.align	2
-.LANCHOR37 = . + 0
-	.type	gNandcVer, %object
-	.size	gNandcVer, 4
-gNandcVer:
+	.set	.LANCHOR151,. + 0
+	.type	gFlashPageBuffer1, %object
+	.size	gFlashPageBuffer1, 4
+gFlashPageBuffer1:
 	.space	4
-	.section	.bss.g_num_free_superblocks,"aw",%nobits
-	.align	1
-.LANCHOR94 = . + 0
-	.type	g_num_free_superblocks, %object
-	.size	g_num_free_superblocks, 2
-g_num_free_superblocks:
-	.space	2
-	.section	.bss.p_data_block_list_table,"aw",%nobits
+	.section	.bss.gFlashProgCheckBuffer,"aw",%nobits
 	.align	2
-.LANCHOR87 = . + 0
-	.type	p_data_block_list_table, %object
-	.size	p_data_block_list_table, 4
-p_data_block_list_table:
+	.set	.LANCHOR195,. + 0
+	.type	gFlashProgCheckBuffer, %object
+	.size	gFlashProgCheckBuffer, 4
+gFlashProgCheckBuffer:
 	.space	4
-	.section	.rodata.__func__.7933,"a",%progbits
-.LANCHOR199 = . + 0
-	.type	__func__.7933, %object
-	.size	__func__.7933, 15
-__func__.7933:
-	.ascii	"FtlLoadSysInfo\000"
-	.section	.bss.g_gc_skip_write_count,"aw",%nobits
+	.section	.bss.gFlashProgCheckSpareBuffer,"aw",%nobits
 	.align	2
-.LANCHOR172 = . + 0
-	.type	g_gc_skip_write_count, %object
-	.size	g_gc_skip_write_count, 4
-g_gc_skip_write_count:
+	.set	.LANCHOR196,. + 0
+	.type	gFlashProgCheckSpareBuffer, %object
+	.size	gFlashProgCheckSpareBuffer, 4
+gFlashProgCheckSpareBuffer:
 	.space	4
-	.section	.bss.c_ftl_nand_data_blks_per_plane,"aw",%nobits
-	.align	1
-.LANCHOR43 = . + 0
-	.type	c_ftl_nand_data_blks_per_plane, %object
-	.size	c_ftl_nand_data_blks_per_plane, 2
-c_ftl_nand_data_blks_per_plane:
-	.space	2
-	.section	.bss.p_map_region_ppn_check_table,"aw",%nobits
+	.section	.bss.gFlashSdrModeEn,"aw",%nobits
+	.type	gFlashSdrModeEn, %object
+	.size	gFlashSdrModeEn, 1
+gFlashSdrModeEn:
+	.space	1
+	.section	.bss.gFlashSlcMode,"aw",%nobits
+	.set	.LANCHOR8,. + 0
+	.type	gFlashSlcMode, %object
+	.size	gFlashSlcMode, 1
+gFlashSlcMode:
+	.space	1
+	.section	.bss.gFlashSpareBuffer,"aw",%nobits
 	.align	2
-.LANCHOR191 = . + 0
-	.type	p_map_region_ppn_check_table, %object
-	.size	p_map_region_ppn_check_table, 4
-p_map_region_ppn_check_table:
+	.set	.LANCHOR194,. + 0
+	.type	gFlashSpareBuffer, %object
+	.size	gFlashSpareBuffer, 4
+gFlashSpareBuffer:
+	.space	4
+	.section	.bss.gFlashToggleModeEn,"aw",%nobits
+	.set	.LANCHOR28,. + 0
+	.type	gFlashToggleModeEn, %object
+	.size	gFlashToggleModeEn, 1
+gFlashToggleModeEn:
+	.space	1
+	.section	.bss.gL2pMapInfo,"aw",%nobits
+	.align	2
+	.set	.LANCHOR124,. + 0
+	.type	gL2pMapInfo, %object
+	.size	gL2pMapInfo, 44
+gL2pMapInfo:
+	.space	44
+	.section	.bss.gMasterInfo,"aw",%nobits
+	.align	2
+	.set	.LANCHOR33,. + 0
+	.type	gMasterInfo, %object
+	.size	gMasterInfo, 32
+gMasterInfo:
+	.space	32
+	.section	.bss.gMasterTempBuf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR154,. + 0
+	.type	gMasterTempBuf, %object
+	.size	gMasterTempBuf, 4
+gMasterTempBuf:
 	.space	4
+	.section	.bss.gMultiPageProgEn,"aw",%nobits
+	.set	.LANCHOR27,. + 0
+	.type	gMultiPageProgEn, %object
+	.size	gMultiPageProgEn, 1
+gMultiPageProgEn:
+	.space	1
 	.section	.bss.gMultiPageReadEn,"aw",%nobits
-.LANCHOR194 = . + 0
+	.set	.LANCHOR198,. + 0
 	.type	gMultiPageReadEn, %object
 	.size	gMultiPageReadEn, 1
 gMultiPageReadEn:
 	.space	1
-	.section	.bss.DieAddrs,"aw",%nobits
+	.section	.bss.gNandChipMap,"aw",%nobits
 	.align	2
-.LANCHOR20 = . + 0
-	.type	DieAddrs, %object
-	.size	DieAddrs, 32
-DieAddrs:
+	.set	.LANCHOR6,. + 0
+	.type	gNandChipMap, %object
+	.size	gNandChipMap, 32
+gNandChipMap:
 	.space	32
-	.section	.bss.g_totle_mlc_erase_count,"aw",%nobits
-	.align	2
-.LANCHOR164 = . + 0
-	.type	g_totle_mlc_erase_count, %object
-	.size	g_totle_mlc_erase_count, 4
-g_totle_mlc_erase_count:
-	.space	4
-	.section	.bss.gFlashProgCheckSpareBuffer,"aw",%nobits
+	.section	.bss.gNandFlashEccBits,"aw",%nobits
+	.set	.LANCHOR31,. + 0
+	.type	gNandFlashEccBits, %object
+	.size	gNandFlashEccBits, 1
+gNandFlashEccBits:
+	.space	1
+	.section	.bss.gNandFlashIDBEccBits,"aw",%nobits
+	.set	.LANCHOR150,. + 0
+	.type	gNandFlashIDBEccBits, %object
+	.size	gNandFlashIDBEccBits, 1
+gNandFlashIDBEccBits:
+	.space	1
+	.section	.bss.gNandFlashIdbBlockAddr,"aw",%nobits
 	.align	2
-.LANCHOR205 = . + 0
-	.type	gFlashProgCheckSpareBuffer, %object
-	.size	gFlashProgCheckSpareBuffer, 4
-gFlashProgCheckSpareBuffer:
-	.space	4
-	.section	.data.gSlcNandParaInfo,"aw",%progbits
-	.align	1
-.LANCHOR243 = . + 0
-	.type	gSlcNandParaInfo, %object
-	.size	gSlcNandParaInfo, 32
-gSlcNandParaInfo:
-	.byte	2
-	.byte	-104
-	.byte	-15
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	1
-	.byte	1
-	.byte	4
-	.short	64
-	.byte	1
-	.byte	1
-	.short	1024
-	.short	256
-	.byte	0
-	.byte	0
-	.byte	16
-	.byte	40
-	.byte	1
-	.byte	0
-	.byte	1
-	.byte	0
-	.byte	0
-	.byte	0
+	.set	.LANCHOR145,. + 0
+	.type	gNandFlashIdbBlockAddr, %object
+	.size	gNandFlashIdbBlockAddr, 4
+gNandFlashIdbBlockAddr:
 	.space	4
-	.section	.rodata.__func__.7621,"a",%progbits
-.LANCHOR95 = . + 0
-	.type	__func__.7621, %object
-	.size	__func__.7621, 17
-__func__.7621:
-	.ascii	"INSERT_FREE_LIST\000"
-	.section	.bss.p_sys_spare_buf,"aw",%nobits
+	.section	.bss.gNandFlashInfoBlockAddr,"aw",%nobits
 	.align	2
-.LANCHOR184 = . + 0
-	.type	p_sys_spare_buf, %object
-	.size	p_sys_spare_buf, 4
-p_sys_spare_buf:
+	.set	.LANCHOR144,. + 0
+	.type	gNandFlashInfoBlockAddr, %object
+	.size	gNandFlashInfoBlockAddr, 4
+gNandFlashInfoBlockAddr:
 	.space	4
-	.section	.rodata.__func__.7625,"a",%progbits
-.LANCHOR92 = . + 0
-	.type	__func__.7625, %object
-	.size	__func__.7625, 17
-__func__.7625:
-	.ascii	"INSERT_DATA_LIST\000"
+	.section	.bss.gNandFlashInfoBlockEcc,"aw",%nobits
+	.type	gNandFlashInfoBlockEcc, %object
+	.size	gNandFlashInfoBlockEcc, 1
+gNandFlashInfoBlockEcc:
+	.space	1
 	.section	.bss.gNandFlashResEndPageAddr,"aw",%nobits
 	.align	2
 	.type	gNandFlashResEndPageAddr, %object
 	.size	gNandFlashResEndPageAddr, 4
 gNandFlashResEndPageAddr:
 	.space	4
-	.section	.rodata.__func__.8290,"a",%progbits
-.LANCHOR226 = . + 0
-	.type	__func__.8290, %object
-	.size	__func__.8290, 19
-__func__.8290:
-	.ascii	"FtlGcFreeTempBlock\000"
-	.section	.bss.gp_gc_page_buf_info,"aw",%nobits
+	.section	.bss.gNandIDBResBlkNum,"aw",%nobits
+	.set	.LANCHOR2,. + 0
+	.type	gNandIDBResBlkNum, %object
+	.size	gNandIDBResBlkNum, 1
+gNandIDBResBlkNum:
+	.space	1
+	.section	.bss.gNandIDBResBlkNumSaveInFlash,"aw",%nobits
+	.set	.LANCHOR146,. + 0
+	.type	gNandIDBResBlkNumSaveInFlash, %object
+	.size	gNandIDBResBlkNumSaveInFlash, 1
+gNandIDBResBlkNumSaveInFlash:
+	.space	1
+	.section	.bss.gNandIDataBuf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR139,. + 0
+	.type	gNandIDataBuf, %object
+	.size	gNandIDataBuf, 2048
+gNandIDataBuf:
+	.space	2048
+	.section	.bss.gNandMaxChip,"aw",%nobits
+	.set	.LANCHOR118,. + 0
+	.type	gNandMaxChip, %object
+	.size	gNandMaxChip, 1
+gNandMaxChip:
+	.space	1
+	.section	.bss.gNandMaxDie,"aw",%nobits
+	.set	.LANCHOR25,. + 0
+	.type	gNandMaxDie, %object
+	.size	gNandMaxDie, 1
+gNandMaxDie:
+	.space	1
+	.section	.bss.gNandOptPara,"aw",%nobits
+	.set	.LANCHOR7,. + 0
+	.type	gNandOptPara, %object
+	.size	gNandOptPara, 32
+gNandOptPara:
+	.space	32
+	.section	.bss.gNandPhyInfo,"aw",%nobits
+	.align	2
+	.set	.LANCHOR15,. + 0
+	.type	gNandPhyInfo, %object
+	.size	gNandPhyInfo, 28
+gNandPhyInfo:
+	.space	28
+	.section	.bss.gNandRandomizer,"aw",%nobits
+	.set	.LANCHOR5,. + 0
+	.type	gNandRandomizer, %object
+	.size	gNandRandomizer, 1
+gNandRandomizer:
+	.space	1
+	.section	.bss.gNandcDumpWriteEn,"aw",%nobits
 	.align	2
-.LANCHOR122 = . + 0
-	.type	gp_gc_page_buf_info, %object
-	.size	gp_gc_page_buf_info, 4
-gp_gc_page_buf_info:
+	.set	.LANCHOR34,. + 0
+	.type	gNandcDumpWriteEn, %object
+	.size	gNandcDumpWriteEn, 4
+gNandcDumpWriteEn:
 	.space	4
-	.section	.bss.gc_ink_free_return_value,"aw",%nobits
-	.align	1
-.LANCHOR233 = . + 0
-	.type	gc_ink_free_return_value, %object
-	.size	gc_ink_free_return_value, 2
-gc_ink_free_return_value:
-	.space	2
-	.section	.bss.g_totle_write_sector,"aw",%nobits
+	.section	.bss.gNandcEccBits,"aw",%nobits
 	.align	2
-.LANCHOR216 = . + 0
-	.type	g_totle_write_sector, %object
-	.size	g_totle_write_sector, 4
-g_totle_write_sector:
+	.set	.LANCHOR30,. + 0
+	.type	gNandcEccBits, %object
+	.size	gNandcEccBits, 4
+gNandcEccBits:
 	.space	4
-	.section	.bss.c_ftl_nand_ext_blk_pre_plane,"aw",%nobits
-	.align	1
-.LANCHOR52 = . + 0
-	.type	c_ftl_nand_ext_blk_pre_plane, %object
-	.size	c_ftl_nand_ext_blk_pre_plane, 2
-c_ftl_nand_ext_blk_pre_plane:
-	.space	2
-	.section	.bss.gpNandc1,"aw",%nobits
+	.section	.bss.gNandcVer,"aw",%nobits
 	.align	2
-	.type	gpNandc1, %object
-	.size	gpNandc1, 4
-gpNandc1:
+	.set	.LANCHOR32,. + 0
+	.type	gNandcVer, %object
+	.size	gNandcVer, 4
+gNandcVer:
 	.space	4
-	.section	.bss.FlashDdrTunningReadCount,"aw",%nobits
+	.section	.bss.gReadRetryInfo,"aw",%nobits
+	.set	.LANCHOR20,. + 0
+	.type	gReadRetryInfo, %object
+	.size	gReadRetryInfo, 852
+gReadRetryInfo:
+	.space	852
+	.section	.bss.gSysFreeQueue,"aw",%nobits
+	.align	1
+	.set	.LANCHOR74,. + 0
+	.type	gSysFreeQueue, %object
+	.size	gSysFreeQueue, 2056
+gSysFreeQueue:
+	.space	2056
+	.section	.bss.gSysInfo,"aw",%nobits
 	.align	2
-.LANCHOR152 = . + 0
-	.type	FlashDdrTunningReadCount, %object
-	.size	FlashDdrTunningReadCount, 4
-FlashDdrTunningReadCount:
-	.space	4
-	.section	.bss.gBootDdrMode,"aw",%nobits
+	.set	.LANCHOR206,. + 0
+	.type	gSysInfo, %object
+	.size	gSysInfo, 12
+gSysInfo:
+	.space	12
+	.section	.bss.gToggleModeClkDiv,"aw",%nobits
 	.align	2
-.LANCHOR192 = . + 0
-	.type	gBootDdrMode, %object
-	.size	gBootDdrMode, 4
-gBootDdrMode:
+	.type	gToggleModeClkDiv, %object
+	.size	gToggleModeClkDiv, 4
+gToggleModeClkDiv:
 	.space	4
-	.section	.bss.gNandMaxChip,"aw",%nobits
-.LANCHOR17 = . + 0
-	.type	gNandMaxChip, %object
-	.size	gNandMaxChip, 1
-gNandMaxChip:
-	.space	1
-	.section	.bss.c_mlc_erase_count_value,"aw",%nobits
+	.section	.bss.gTotleBlock,"aw",%nobits
 	.align	1
-.LANCHOR51 = . + 0
-	.type	c_mlc_erase_count_value, %object
-	.size	c_mlc_erase_count_value, 2
-c_mlc_erase_count_value:
+	.set	.LANCHOR119,. + 0
+	.type	gTotleBlock, %object
+	.size	gTotleBlock, 2
+gTotleBlock:
 	.space	2
-	.section	.bss.p_map_block_table,"aw",%nobits
+	.section	.bss.gVendorBlkInfo,"aw",%nobits
 	.align	2
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-	.size	p_map_block_table, 4
-p_map_block_table:
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+	.type	gVendorBlkInfo, %object
+	.size	gVendorBlkInfo, 44
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+	.space	44
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+	.align	2
+	.set	.LANCHOR158,. + 0
+	.type	g_GlobalDataVersion, %object
+	.size	g_GlobalDataVersion, 4
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 	.space	4
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-	.type	__func__.7512, %object
-	.size	__func__.7512, 11
-__func__.7512:
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-	.section	.data.SamsungRefValue,"aw",%progbits
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-	.size	SamsungRefValue, 64
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-	.byte	7
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-	.align	1
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-g_gc_cur_blk_valid_pages:
-	.space	2
-	.section	.bss.g_totle_read_sector,"aw",%nobits
+	.section	.bss.g_GlobalSysVersion,"aw",%nobits
 	.align	2
-.LANCHOR217 = . + 0
-	.type	g_totle_read_sector, %object
-	.size	g_totle_read_sector, 4
-g_totle_read_sector:
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+	.type	g_GlobalSysVersion, %object
+	.size	g_GlobalSysVersion, 4
+g_GlobalSysVersion:
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-	.section	.bss.c_ftl_nand_max_sys_blks,"aw",%nobits
+	.section	.bss.g_LowFormat,"aw",%nobits
 	.align	2
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-	.size	c_ftl_nand_max_sys_blks, 4
-c_ftl_nand_max_sys_blks:
+	.set	.LANCHOR239,. + 0
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+	.size	g_LowFormat, 4
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-	.size	gNandFlashIDBEccBits, 1
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-	.size	Toshiba15RefValue, 95
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-	.align	1
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-	.size	g_gc_next_blk_1, 2
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-	.section	.rodata.__func__.7749,"a",%progbits
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-	.type	__func__.7749, %object
-	.size	__func__.7749, 31
-__func__.7749:
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-	.type	__func__.7403, %object
-	.size	__func__.7403, 10
-__func__.7403:
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-	.section	.rodata.__func__.8186,"a",%progbits
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-	.type	__func__.8186, %object
-	.size	__func__.8186, 25
-__func__.8186:
-	.ascii	"allocate_data_superblock\000"
-	.section	.bss.g_free_slc_blk_num,"aw",%nobits
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-	.size	g_free_slc_blk_num, 2
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-	.align	1
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-	.type	c_ftl_nand_map_region_num, %object
-	.size	c_ftl_nand_map_region_num, 2
-c_ftl_nand_map_region_num:
-	.space	2
-	.section	.bss.req_gc,"aw",%nobits
+	.section	.bss.g_MaxLbaSector,"aw",%nobits
 	.align	2
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-	.type	req_gc, %object
-	.size	req_gc, 4
-req_gc:
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+	.type	g_MaxLbaSector, %object
+	.size	g_MaxLbaSector, 4
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 	.space	4
-	.section	.bss.gpNandc,"aw",%nobits
+	.section	.bss.g_MaxLbn,"aw",%nobits
 	.align	2
-.LANCHOR30 = . + 0
-	.type	gpNandc, %object
-	.size	gpNandc, 4
-gpNandc:
+	.set	.LANCHOR226,. + 0
+	.type	g_MaxLbn, %object
+	.size	g_MaxLbn, 4
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 	.space	4
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-	.type	__func__.8035, %object
-	.size	__func__.8035, 22
-__func__.8035:
-	.ascii	"FtlRecoverySuperblock\000"
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-	.align	1
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-	.type	g_totle_vendor_block, %object
-	.size	g_totle_vendor_block, 2
-g_totle_vendor_block:
-	.space	2
-	.section	.bss.p_l2p_ram_map,"aw",%nobits
+	.section	.bss.g_MaxLpn,"aw",%nobits
 	.align	2
-.LANCHOR102 = . + 0
-	.type	p_l2p_ram_map, %object
-	.size	p_l2p_ram_map, 4
-p_l2p_ram_map:
+	.set	.LANCHOR71,. + 0
+	.type	g_MaxLpn, %object
+	.size	g_MaxLpn, 4
+g_MaxLpn:
 	.space	4
-	.section	.bss.FlashWaitBusyScheduleEn,"aw",%nobits
+	.section	.bss.g_SlcPartLbaEndSector,"aw",%nobits
 	.align	2
-	.type	FlashWaitBusyScheduleEn, %object
-	.size	FlashWaitBusyScheduleEn, 4
-FlashWaitBusyScheduleEn:
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+	.type	g_SlcPartLbaEndSector, %object
+	.size	g_SlcPartLbaEndSector, 4
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-	.type	p_plane_order_table, %object
-	.size	p_plane_order_table, 32
-p_plane_order_table:
-	.space	32
-	.section	.bss.DieCsIndex,"aw",%nobits
+	.section	.bss.g_VaildLpn,"aw",%nobits
 	.align	2
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-	.type	DieCsIndex, %object
-	.size	DieCsIndex, 8
-DieCsIndex:
-	.space	8
-	.section	.bss.g_totle_cache_write_count,"aw",%nobits
+	.set	.LANCHOR99,. + 0
+	.type	g_VaildLpn, %object
+	.size	g_VaildLpn, 4
+g_VaildLpn:
+	.space	4
+	.section	.bss.g_active_superblock,"aw",%nobits
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-	.type	g_totle_cache_write_count, %object
-	.size	g_totle_cache_write_count, 4
-g_totle_cache_write_count:
+	.set	.LANCHOR90,. + 0
+	.type	g_active_superblock, %object
+	.size	g_active_superblock, 48
+g_active_superblock:
+	.space	48
+	.section	.bss.g_all_blk_used_slc_mode,"aw",%nobits
+	.align	2
+	.set	.LANCHOR156,. + 0
+	.type	g_all_blk_used_slc_mode, %object
+	.size	g_all_blk_used_slc_mode, 4
+g_all_blk_used_slc_mode:
 	.space	4
-	.section	.bss.c_ftl_nand_byte_pre_oob,"aw",%nobits
+	.section	.bss.g_buffer_superblock,"aw",%nobits
+	.align	2
+	.set	.LANCHOR91,. + 0
+	.type	g_buffer_superblock, %object
+	.size	g_buffer_superblock, 48
+g_buffer_superblock:
+	.space	48
+	.section	.bss.g_cur_erase_blk,"aw",%nobits
+	.align	2
+	.set	.LANCHOR72,. + 0
+	.type	g_cur_erase_blk, %object
+	.size	g_cur_erase_blk, 4
+g_cur_erase_blk:
+	.space	4
+	.section	.bss.g_ect_tbl_info_size,"aw",%nobits
+	.align	1
+	.set	.LANCHOR187,. + 0
+	.type	g_ect_tbl_info_size, %object
+	.size	g_ect_tbl_info_size, 2
+g_ect_tbl_info_size:
+	.space	2
+	.section	.bss.g_ect_tbl_power_up_flush,"aw",%nobits
+	.align	1
+	.set	.LANCHOR218,. + 0
+	.type	g_ect_tbl_power_up_flush, %object
+	.size	g_ect_tbl_power_up_flush, 2
+g_ect_tbl_power_up_flush:
+	.space	2
+	.section	.bss.g_flash_read_only_en,"aw",%nobits
+	.align	2
+	.set	.LANCHOR75,. + 0
+	.type	g_flash_read_only_en, %object
+	.size	g_flash_read_only_en, 4
+g_flash_read_only_en:
+	.space	4
+	.section	.bss.g_free_slc_blk_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR137,. + 0
+	.type	g_free_slc_blk_num, %object
+	.size	g_free_slc_blk_num, 2
+g_free_slc_blk_num:
+	.space	2
+	.section	.bss.g_ftl_nand_free_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR241,. + 0
+	.type	g_ftl_nand_free_count, %object
+	.size	g_ftl_nand_free_count, 4
+g_ftl_nand_free_count:
+	.space	4
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 	.align	1
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-	.size	c_ftl_nand_byte_pre_oob, 2
-c_ftl_nand_byte_pre_oob:
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+	.size	g_gc_bad_block_gc_index, 2
+g_gc_bad_block_gc_index:
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+	.align	1
+	.set	.LANCHOR114,. + 0
+	.type	g_gc_bad_block_temp_num, %object
+	.size	g_gc_bad_block_temp_num, 2
+g_gc_bad_block_temp_num:
 	.space	2
 	.section	.bss.g_gc_bad_block_temp_tbl,"aw",%nobits
 	.align	1
-.LANCHOR140 = . + 0
+	.set	.LANCHOR115,. + 0
 	.type	g_gc_bad_block_temp_tbl, %object
 	.size	g_gc_bad_block_temp_tbl, 34
 g_gc_bad_block_temp_tbl:
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-	.size	gFlashSdrModeEn, 1
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-	.align	2
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-	.type	p_data_block_list_tail, %object
-	.size	p_data_block_list_tail, 4
-p_data_block_list_tail:
-	.space	4
-	.section	.bss.g_power_lost_ecc_error_blk,"aw",%nobits
+	.section	.bss.g_gc_blk_index,"aw",%nobits
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-	.type	g_power_lost_ecc_error_blk, %object
-	.size	g_power_lost_ecc_error_blk, 2
-g_power_lost_ecc_error_blk:
+	.set	.LANCHOR176,. + 0
+	.type	g_gc_blk_index, %object
+	.size	g_gc_blk_index, 2
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-	.size	p_map_block_ver_table, 4
-p_map_block_ver_table:
-	.space	4
-	.section	.bss.gNandcEccBits,"aw",%nobits
+	.section	.bss.g_gc_blk_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR109,. + 0
+	.type	g_gc_blk_num, %object
+	.size	g_gc_blk_num, 2
+g_gc_blk_num:
+	.space	2
+	.section	.bss.g_gc_cur_blk_max_valid_pages,"aw",%nobits
+	.align	1
+	.set	.LANCHOR237,. + 0
+	.type	g_gc_cur_blk_max_valid_pages, %object
+	.size	g_gc_cur_blk_max_valid_pages, 2
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+	.space	2
+	.section	.bss.g_gc_cur_blk_valid_pages,"aw",%nobits
+	.align	1
+	.set	.LANCHOR236,. + 0
+	.type	g_gc_cur_blk_valid_pages, %object
+	.size	g_gc_cur_blk_valid_pages, 2
+g_gc_cur_blk_valid_pages:
+	.space	2
+	.section	.bss.g_gc_free_blk_threshold,"aw",%nobits
+	.align	1
+	.set	.LANCHOR174,. + 0
+	.type	g_gc_free_blk_threshold, %object
+	.size	g_gc_free_blk_threshold, 2
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+	.space	2
+	.section	.bss.g_gc_head_data_block,"aw",%nobits
 	.align	2
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-	.type	gNandcEccBits, %object
-	.size	gNandcEccBits, 4
-gNandcEccBits:
+	.set	.LANCHOR171,. + 0
+	.type	g_gc_head_data_block, %object
+	.size	g_gc_head_data_block, 4
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-	.type	ToshibaA19RefValue, %object
-	.size	ToshibaA19RefValue, 45
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-	.byte	126
-	.byte	118
-	.byte	116
-	.byte	0
-	.byte	16
-	.byte	118
-	.byte	114
-	.byte	112
-	.byte	0
-	.byte	2
-	.byte	0
-	.byte	126
-	.byte	124
-	.byte	0
-	.section	.bss.g_totle_swl_count,"aw",%nobits
+	.section	.bss.g_gc_head_data_block_count,"aw",%nobits
 	.align	2
-.LANCHOR127 = . + 0
-	.type	g_totle_swl_count, %object
-	.size	g_totle_swl_count, 4
-g_totle_swl_count:
+	.set	.LANCHOR172,. + 0
+	.type	g_gc_head_data_block_count, %object
+	.size	g_gc_head_data_block_count, 4
+g_gc_head_data_block_count:
 	.space	4
-	.section	.bss.gBbtInfo,"aw",%nobits
-	.align	2
-.LANCHOR78 = . + 0
-	.type	gBbtInfo, %object
-	.size	gBbtInfo, 60
-gBbtInfo:
-	.space	60
-	.section	.bss.c_ftl_nand_byte_pre_page,"aw",%nobits
+	.section	.bss.g_gc_merge_free_blk_threshold,"aw",%nobits
 	.align	1
-.LANCHOR61 = . + 0
-	.type	c_ftl_nand_byte_pre_page, %object
-	.size	c_ftl_nand_byte_pre_page, 2
-c_ftl_nand_byte_pre_page:
+	.set	.LANCHOR175,. + 0
+	.type	g_gc_merge_free_blk_threshold, %object
+	.size	g_gc_merge_free_blk_threshold, 2
+g_gc_merge_free_blk_threshold:
 	.space	2
-	.section	.bss.req_gc_dst,"aw",%nobits
-	.align	2
-.LANCHOR178 = . + 0
-	.type	req_gc_dst, %object
-	.size	req_gc_dst, 4
-req_gc_dst:
-	.space	4
-	.section	.bss.gNandIDBResBlkNum,"aw",%nobits
-.LANCHOR1 = . + 0
-	.type	gNandIDBResBlkNum, %object
-	.size	gNandIDBResBlkNum, 1
-gNandIDBResBlkNum:
-	.space	1
-	.section	.bss.gNandcDumpWriteEn,"aw",%nobits
+	.section	.bss.g_gc_next_blk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR112,. + 0
+	.type	g_gc_next_blk, %object
+	.size	g_gc_next_blk, 2
+g_gc_next_blk:
+	.space	2
+	.section	.bss.g_gc_next_blk_1,"aw",%nobits
+	.align	1
+	.set	.LANCHOR113,. + 0
+	.type	g_gc_next_blk_1, %object
+	.size	g_gc_next_blk_1, 2
+g_gc_next_blk_1:
+	.space	2
+	.section	.bss.g_gc_num_req,"aw",%nobits
 	.align	2
-.LANCHOR39 = . + 0
-	.type	gNandcDumpWriteEn, %object
-	.size	gNandcDumpWriteEn, 4
-gNandcDumpWriteEn:
+	.set	.LANCHOR102,. + 0
+	.type	g_gc_num_req, %object
+	.size	g_gc_num_req, 4
+g_gc_num_req:
 	.space	4
+	.section	.bss.g_gc_page_offset,"aw",%nobits
+	.align	1
+	.set	.LANCHOR110,. + 0
+	.type	g_gc_page_offset, %object
+	.size	g_gc_page_offset, 2
+g_gc_page_offset:
+	.space	2
 	.section	.bss.g_gc_refresh_block_temp_num,"aw",%nobits
 	.align	1
-.LANCHOR176 = . + 0
+	.set	.LANCHOR177,. + 0
 	.type	g_gc_refresh_block_temp_num, %object
 	.size	g_gc_refresh_block_temp_num, 2
 g_gc_refresh_block_temp_num:
 	.space	2
-	.section	.bss.g_tmp_data_superblock_id,"aw",%nobits
+	.section	.bss.g_gc_refresh_block_temp_tbl,"aw",%nobits
 	.align	1
-.LANCHOR126 = . + 0
-	.type	g_tmp_data_superblock_id, %object
-	.size	g_tmp_data_superblock_id, 2
-g_tmp_data_superblock_id:
-	.space	2
-	.section	.bss.c_ftl_nand_totle_phy_blks,"aw",%nobits
+	.type	g_gc_refresh_block_temp_tbl, %object
+	.size	g_gc_refresh_block_temp_tbl, 34
+g_gc_refresh_block_temp_tbl:
+	.space	34
+	.section	.bss.g_gc_skip_write_count,"aw",%nobits
 	.align	2
-.LANCHOR46 = . + 0
-	.type	c_ftl_nand_totle_phy_blks, %object
-	.size	c_ftl_nand_totle_phy_blks, 4
-c_ftl_nand_totle_phy_blks:
+	.set	.LANCHOR173,. + 0
+	.type	g_gc_skip_write_count, %object
+	.size	g_gc_skip_write_count, 4
+g_gc_skip_write_count:
 	.space	4
-	.section	.data.ftl_gc_temp_block_bops_scan_page_addr,"aw",%progbits
-	.align	1
-.LANCHOR195 = . + 0
-	.type	ftl_gc_temp_block_bops_scan_page_addr, %object
-	.size	ftl_gc_temp_block_bops_scan_page_addr, 2
-ftl_gc_temp_block_bops_scan_page_addr:
-	.short	-1
-	.section	.bss.p_map_region_ppn_table,"aw",%nobits
+	.section	.bss.g_gc_superblock,"aw",%nobits
 	.align	2
-.LANCHOR114 = . + 0
-	.type	p_map_region_ppn_table, %object
-	.size	p_map_region_ppn_table, 4
-p_map_region_ppn_table:
-	.space	4
-	.section	.bss.c_ftl_nand_reserved_blks,"aw",%nobits
-	.align	1
-.LANCHOR63 = . + 0
-	.type	c_ftl_nand_reserved_blks, %object
-	.size	c_ftl_nand_reserved_blks, 2
-c_ftl_nand_reserved_blks:
-	.space	2
-	.section	.bss.p_gc_page_info,"aw",%nobits
+	.set	.LANCHOR201,. + 0
+	.type	g_gc_superblock, %object
+	.size	g_gc_superblock, 48
+g_gc_superblock:
+	.space	48
+	.section	.bss.g_gc_temp_superblock,"aw",%nobits
 	.align	2
-.LANCHOR136 = . + 0
-	.type	p_gc_page_info, %object
-	.size	p_gc_page_info, 4
-p_gc_page_info:
-	.space	4
-	.section	.bss.c_ftl_nand_l2pmap_ram_region_num,"aw",%nobits
-	.align	1
-.LANCHOR71 = . + 0
-	.type	c_ftl_nand_l2pmap_ram_region_num, %object
-	.size	c_ftl_nand_l2pmap_ram_region_num, 2
-c_ftl_nand_l2pmap_ram_region_num:
-	.space	2
-	.section	.bss.gc_discard_updated,"aw",%nobits
+	.set	.LANCHOR92,. + 0
+	.type	g_gc_temp_superblock, %object
+	.size	g_gc_temp_superblock, 48
+g_gc_temp_superblock:
+	.space	48
+	.section	.bss.g_in_gc_progress,"aw",%nobits
 	.align	2
-.LANCHOR227 = . + 0
-	.type	gc_discard_updated, %object
-	.size	gc_discard_updated, 4
-gc_discard_updated:
+	.set	.LANCHOR169,. + 0
+	.type	g_in_gc_progress, %object
+	.size	g_in_gc_progress, 4
+g_in_gc_progress:
 	.space	4
-	.section	.rodata.__func__.8384,"a",%progbits
-.LANCHOR236 = . + 0
-	.type	__func__.8384, %object
-	.size	__func__.8384, 23
-__func__.8384:
-	.ascii	"rk_ftl_garbage_collect\000"
-	.section	.bss.g_ect_tbl_info_size,"aw",%nobits
-	.align	1
-.LANCHOR186 = . + 0
-	.type	g_ect_tbl_info_size, %object
-	.size	g_ect_tbl_info_size, 2
-g_ect_tbl_info_size:
-	.space	2
-	.section	.bss.g_all_blk_used_slc_mode,"aw",%nobits
+	.section	.bss.g_in_swl_replace,"aw",%nobits
 	.align	2
-.LANCHOR155 = . + 0
-	.type	g_all_blk_used_slc_mode, %object
-	.size	g_all_blk_used_slc_mode, 4
-g_all_blk_used_slc_mode:
+	.set	.LANCHOR170,. + 0
+	.type	g_in_swl_replace, %object
+	.size	g_in_swl_replace, 4
+g_in_swl_replace:
 	.space	4
-	.section	.bss.c_ftl_nand_vendor_region_num,"aw",%nobits
-	.align	1
-.LANCHOR66 = . + 0
-	.type	c_ftl_nand_vendor_region_num, %object
-	.size	c_ftl_nand_vendor_region_num, 2
-c_ftl_nand_vendor_region_num:
-	.space	2
-	.section	.bss.g_ftl_nand_free_count,"aw",%nobits
+	.section	.bss.g_inkDie_check_enable,"aw",%nobits
 	.align	2
-.LANCHOR239 = . + 0
-	.type	g_ftl_nand_free_count, %object
-	.size	g_ftl_nand_free_count, 4
-g_ftl_nand_free_count:
+	.set	.LANCHOR101,. + 0
+	.type	g_inkDie_check_enable, %object
+	.size	g_inkDie_check_enable, 4
+g_inkDie_check_enable:
 	.space	4
-	.section	.data.ToshibaRefValue,"aw",%progbits
-.LANCHOR13 = . + 0
-	.type	ToshibaRefValue, %object
-	.size	ToshibaRefValue, 8
-ToshibaRefValue:
-	.byte	0
-	.byte	4
-	.byte	124
-	.byte	120
-	.byte	116
-	.byte	8
-	.byte	12
-	.byte	112
 	.section	.bss.g_l2p_last_update_region_id,"aw",%nobits
 	.align	1
-.LANCHOR103 = . + 0
+	.set	.LANCHOR96,. + 0
 	.type	g_l2p_last_update_region_id, %object
 	.size	g_l2p_last_update_region_id, 2
 g_l2p_last_update_region_id:
 	.space	2
-	.section	.bss.g_gc_page_offset,"aw",%nobits
-	.align	1
-.LANCHOR135 = . + 0
-	.type	g_gc_page_offset, %object
-	.size	g_gc_page_offset, 2
-g_gc_page_offset:
-	.space	2
-	.section	.bss.gMasterTempBuf,"aw",%nobits
+	.section	.bss.g_maxRegNum,"aw",%nobits
+	.set	.LANCHOR13,. + 0
+	.type	g_maxRegNum, %object
+	.size	g_maxRegNum, 1
+g_maxRegNum:
+	.space	1
+	.section	.bss.g_maxRetryCount,"aw",%nobits
+	.set	.LANCHOR147,. + 0
+	.type	g_maxRetryCount, %object
+	.size	g_maxRetryCount, 1
+g_maxRetryCount:
+	.space	1
+	.section	.bss.g_max_erase_count,"aw",%nobits
 	.align	2
-.LANCHOR193 = . + 0
-	.type	gMasterTempBuf, %object
-	.size	gMasterTempBuf, 4
-gMasterTempBuf:
+	.set	.LANCHOR167,. + 0
+	.type	g_max_erase_count, %object
+	.size	g_max_erase_count, 4
+g_max_erase_count:
 	.space	4
-	.section	.bss.gFlashProgCheckBuffer,"aw",%nobits
+	.section	.bss.g_min_erase_count,"aw",%nobits
 	.align	2
-.LANCHOR204 = . + 0
-	.type	gFlashProgCheckBuffer, %object
-	.size	gFlashProgCheckBuffer, 4
-gFlashProgCheckBuffer:
+	.set	.LANCHOR168,. + 0
+	.type	g_min_erase_count, %object
+	.size	g_min_erase_count, 4
+g_min_erase_count:
 	.space	4
-	.section	.bss.c_ftl_nand_max_map_blks,"aw",%nobits
+	.section	.bss.g_nandc_version_data,"aw",%nobits
 	.align	2
-.LANCHOR68 = . + 0
-	.type	c_ftl_nand_max_map_blks, %object
-	.size	c_ftl_nand_max_map_blks, 4
-c_ftl_nand_max_map_blks:
+	.set	.LANCHOR152,. + 0
+	.type	g_nandc_version_data, %object
+	.size	g_nandc_version_data, 4
+g_nandc_version_data:
 	.space	4
-	.section	.bss.g_totle_read_page_count,"aw",%nobits
+	.section	.bss.g_num_data_superblocks,"aw",%nobits
+	.align	1
+	.set	.LANCHOR84,. + 0
+	.type	g_num_data_superblocks, %object
+	.size	g_num_data_superblocks, 2
+g_num_data_superblocks:
+	.space	2
+	.section	.bss.g_num_free_superblocks,"aw",%nobits
+	.align	1
+	.set	.LANCHOR87,. + 0
+	.type	g_num_free_superblocks, %object
+	.size	g_num_free_superblocks, 2
+g_num_free_superblocks:
+	.space	2
+	.section	.bss.g_page_map_check_enable,"aw",%nobits
+	.align	1
+	.set	.LANCHOR68,. + 0
+	.type	g_page_map_check_enable, %object
+	.size	g_page_map_check_enable, 2
+g_page_map_check_enable:
+	.space	2
+	.section	.bss.g_power_lost_ecc_error_blk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR229,. + 0
+	.type	g_power_lost_ecc_error_blk, %object
+	.size	g_power_lost_ecc_error_blk, 2
+g_power_lost_ecc_error_blk:
+	.space	2
+	.section	.bss.g_power_lost_recovery_flag,"aw",%nobits
+	.align	1
+	.set	.LANCHOR230,. + 0
+	.type	g_power_lost_recovery_flag, %object
+	.size	g_power_lost_recovery_flag, 2
+g_power_lost_recovery_flag:
+	.space	2
+	.section	.bss.g_recovery_page_min_ver,"aw",%nobits
 	.align	2
-.LANCHOR163 = . + 0
-	.type	g_totle_read_page_count, %object
-	.size	g_totle_read_page_count, 4
-g_totle_read_page_count:
+	.set	.LANCHOR133,. + 0
+	.type	g_recovery_page_min_ver, %object
+	.size	g_recovery_page_min_ver, 4
+g_recovery_page_min_ver:
 	.space	4
-	.section	.bss.g_gc_num_req,"aw",%nobits
+	.section	.bss.g_recovery_page_num,"aw",%nobits
 	.align	2
-.LANCHOR119 = . + 0
-	.type	g_gc_num_req, %object
-	.size	g_gc_num_req, 4
-g_gc_num_req:
+	.set	.LANCHOR231,. + 0
+	.type	g_recovery_page_num, %object
+	.size	g_recovery_page_num, 4
+g_recovery_page_num:
 	.space	4
-	.section	.bss.p_swl_mul_table,"aw",%nobits
+	.section	.bss.g_recovery_ppa_tbl,"aw",%nobits
 	.align	2
-.LANCHOR130 = . + 0
-	.type	p_swl_mul_table, %object
-	.size	p_swl_mul_table, 4
-p_swl_mul_table:
-	.space	4
-	.section	.bss.ftl_gc_temp_power_lost_recovery_flag,"aw",%nobits
+	.set	.LANCHOR232,. + 0
+	.type	g_recovery_ppa_tbl, %object
+	.size	g_recovery_ppa_tbl, 128
+g_recovery_ppa_tbl:
+	.space	128
+	.section	.bss.g_req_cache,"aw",%nobits
 	.align	2
-.LANCHOR128 = . + 0
-	.type	ftl_gc_temp_power_lost_recovery_flag, %object
-	.size	ftl_gc_temp_power_lost_recovery_flag, 4
-ftl_gc_temp_power_lost_recovery_flag:
+	.set	.LANCHOR129,. + 0
+	.type	g_req_cache, %object
+	.size	g_req_cache, 4
+g_req_cache:
 	.space	4
-	.section	.bss.p_vendor_data_buf,"aw",%nobits
+	.section	.bss.g_retryMode,"aw",%nobits
+	.set	.LANCHOR10,. + 0
+	.type	g_retryMode, %object
+	.size	g_retryMode, 1
+g_retryMode:
+	.space	1
+	.section	.bss.g_slc2KBNand,"aw",%nobits
+	.set	.LANCHOR1,. + 0
+	.type	g_slc2KBNand, %object
+	.size	g_slc2KBNand, 1
+g_slc2KBNand:
+	.space	1
+	.section	.bss.g_sys_ext_data,"aw",%nobits
 	.align	2
-.LANCHOR181 = . + 0
-	.type	p_vendor_data_buf, %object
-	.size	p_vendor_data_buf, 4
-p_vendor_data_buf:
+	.set	.LANCHOR136,. + 0
+	.type	g_sys_ext_data, %object
+	.size	g_sys_ext_data, 512
+g_sys_ext_data:
+	.space	512
+	.section	.bss.g_sys_save_data,"aw",%nobits
+	.align	2
+	.set	.LANCHOR135,. + 0
+	.type	g_sys_save_data, %object
+	.size	g_sys_save_data, 48
+g_sys_save_data:
+	.space	48
+	.section	.bss.g_tmp_data_superblock_id,"aw",%nobits
+	.align	1
+	.set	.LANCHOR130,. + 0
+	.type	g_tmp_data_superblock_id, %object
+	.size	g_tmp_data_superblock_id, 2
+g_tmp_data_superblock_id:
+	.space	2
+	.section	.bss.g_totle_avg_erase_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR202,. + 0
+	.type	g_totle_avg_erase_count, %object
+	.size	g_totle_avg_erase_count, 4
+g_totle_avg_erase_count:
 	.space	4
-	.section	.rodata.__func__.8002,"a",%progbits
-.LANCHOR222 = . + 0
-	.type	__func__.8002, %object
-	.size	__func__.8002, 16
-__func__.8002:
-	.ascii	"FtlReUsePrevPpa\000"
-	.section	.rodata.__func__.7879,"a",%progbits
-.LANCHOR197 = . + 0
-	.type	__func__.7879, %object
-	.size	__func__.7879, 14
-__func__.7879:
-	.ascii	"FtlScanSysBlk\000"
-	.section	.bss.p_vendor_region_ppn_table,"aw",%nobits
+	.section	.bss.g_totle_cache_write_count,"aw",%nobits
 	.align	2
-.LANCHOR190 = . + 0
-	.type	p_vendor_region_ppn_table, %object
-	.size	p_vendor_region_ppn_table, 4
-p_vendor_region_ppn_table:
+	.set	.LANCHOR162,. + 0
+	.type	g_totle_cache_write_count, %object
+	.size	g_totle_cache_write_count, 4
+g_totle_cache_write_count:
 	.space	4
-	.section	.bss.p_map_block_valid_page_count,"aw",%nobits
+	.section	.bss.g_totle_discard_page_count,"aw",%nobits
 	.align	2
-.LANCHOR108 = . + 0
-	.type	p_map_block_valid_page_count, %object
-	.size	p_map_block_valid_page_count, 4
-p_map_block_valid_page_count:
+	.set	.LANCHOR161,. + 0
+	.type	g_totle_discard_page_count, %object
+	.size	g_totle_discard_page_count, 4
+g_totle_discard_page_count:
 	.space	4
-	.section	.bss.req_prgm,"aw",%nobits
+	.section	.bss.g_totle_gc_page_count,"aw",%nobits
 	.align	2
-.LANCHOR179 = . + 0
-	.type	req_prgm, %object
-	.size	req_prgm, 4
-req_prgm:
+	.set	.LANCHOR159,. + 0
+	.type	g_totle_gc_page_count, %object
+	.size	g_totle_gc_page_count, 4
+g_totle_gc_page_count:
 	.space	4
 	.section	.bss.g_totle_l2p_write_count,"aw",%nobits
 	.align	2
-.LANCHOR162 = . + 0
+	.set	.LANCHOR163,. + 0
 	.type	g_totle_l2p_write_count, %object
 	.size	g_totle_l2p_write_count, 4
 g_totle_l2p_write_count:
 	.space	4
-	.section	.bss.g_num_data_superblocks,"aw",%nobits
-	.align	1
-.LANCHOR91 = . + 0
-	.type	g_num_data_superblocks, %object
-	.size	g_num_data_superblocks, 2
-g_num_data_superblocks:
-	.space	2
-	.section	.bss.c_ftl_nand_blk_pre_plane,"aw",%nobits
+	.section	.bss.g_totle_map_block,"aw",%nobits
 	.align	1
-.LANCHOR44 = . + 0
-	.type	c_ftl_nand_blk_pre_plane, %object
-	.size	c_ftl_nand_blk_pre_plane, 2
-c_ftl_nand_blk_pre_plane:
+	.set	.LANCHOR125,. + 0
+	.type	g_totle_map_block, %object
+	.size	g_totle_map_block, 2
+g_totle_map_block:
 	.space	2
-	.section	.bss.g_gc_head_data_block,"aw",%nobits
+	.section	.bss.g_totle_mlc_erase_count,"aw",%nobits
 	.align	2
-.LANCHOR170 = . + 0
-	.type	g_gc_head_data_block, %object
-	.size	g_gc_head_data_block, 4
-g_gc_head_data_block:
+	.set	.LANCHOR165,. + 0
+	.type	g_totle_mlc_erase_count, %object
+	.size	g_totle_mlc_erase_count, 4
+g_totle_mlc_erase_count:
+	.space	4
+	.section	.bss.g_totle_read_page_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR164,. + 0
+	.type	g_totle_read_page_count, %object
+	.size	g_totle_read_page_count, 4
+g_totle_read_page_count:
+	.space	4
+	.section	.bss.g_totle_read_sector,"aw",%nobits
+	.align	2
+	.set	.LANCHOR217,. + 0
+	.type	g_totle_read_sector, %object
+	.size	g_totle_read_sector, 4
+g_totle_read_sector:
 	.space	4
 	.section	.bss.g_totle_slc_erase_count,"aw",%nobits
 	.align	2
-.LANCHOR165 = . + 0
+	.set	.LANCHOR166,. + 0
 	.type	g_totle_slc_erase_count, %object
 	.size	g_totle_slc_erase_count, 4
 g_totle_slc_erase_count:
 	.space	4
-	.section	.rodata.__func__.7685,"a",%progbits
-.LANCHOR100 = . + 0
-	.type	__func__.7685, %object
-	.size	__func__.7685, 22
-__func__.7685:
-	.ascii	"List_update_data_list\000"
-	.section	.bss.g_gc_blk_num,"aw",%nobits
+	.section	.bss.g_totle_swl_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR131,. + 0
+	.type	g_totle_swl_count, %object
+	.size	g_totle_swl_count, 4
+g_totle_swl_count:
+	.space	4
+	.section	.bss.g_totle_sys_slc_erase_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR78,. + 0
+	.type	g_totle_sys_slc_erase_count, %object
+	.size	g_totle_sys_slc_erase_count, 4
+g_totle_sys_slc_erase_count:
+	.space	4
+	.section	.bss.g_totle_vendor_block,"aw",%nobits
 	.align	1
-.LANCHOR133 = . + 0
-	.type	g_gc_blk_num, %object
-	.size	g_gc_blk_num, 2
-g_gc_blk_num:
+	.set	.LANCHOR69,. + 0
+	.type	g_totle_vendor_block, %object
+	.size	g_totle_vendor_block, 2
+g_totle_vendor_block:
 	.space	2
-	.section	.bss.req_read,"aw",%nobits
+	.section	.bss.g_totle_write_page_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR160,. + 0
+	.type	g_totle_write_page_count, %object
+	.size	g_totle_write_page_count, 4
+g_totle_write_page_count:
+	.space	4
+	.section	.bss.g_totle_write_sector,"aw",%nobits
 	.align	2
-.LANCHOR177 = . + 0
-	.type	req_read, %object
-	.size	req_read, 4
-req_read:
+	.set	.LANCHOR216,. + 0
+	.type	g_totle_write_sector, %object
+	.size	g_totle_write_sector, 4
+g_totle_write_sector:
 	.space	4
-	.section	.bss.g_totle_avg_erase_count,"aw",%nobits
+	.section	.bss.gc_discard_updated,"aw",%nobits
 	.align	2
-.LANCHOR211 = . + 0
-	.type	g_totle_avg_erase_count, %object
-	.size	g_totle_avg_erase_count, 4
-g_totle_avg_erase_count:
+	.set	.LANCHOR222,. + 0
+	.type	gc_discard_updated, %object
+	.size	gc_discard_updated, 4
+gc_discard_updated:
 	.space	4
-	.section	.bss.c_ftl_nand_planes_per_die,"aw",%nobits
-	.align	1
-.LANCHOR49 = . + 0
-	.type	c_ftl_nand_planes_per_die, %object
-	.size	c_ftl_nand_planes_per_die, 2
-c_ftl_nand_planes_per_die:
-	.space	2
-	.section	.bss.g_gc_merge_free_blk_threshold,"aw",%nobits
+	.section	.bss.gc_ink_free_return_value,"aw",%nobits
 	.align	1
-.LANCHOR174 = . + 0
-	.type	g_gc_merge_free_blk_threshold, %object
-	.size	g_gc_merge_free_blk_threshold, 2
-g_gc_merge_free_blk_threshold:
+	.set	.LANCHOR235,. + 0
+	.type	gc_ink_free_return_value, %object
+	.size	gc_ink_free_return_value, 2
+gc_ink_free_return_value:
 	.space	2
-	.section	.bss.g_MaxLpn,"aw",%nobits
+	.section	.bss.gpFlashSaveInfo,"aw",%nobits
 	.align	2
-.LANCHOR76 = . + 0
-	.type	g_MaxLpn, %object
-	.size	g_MaxLpn, 4
-g_MaxLpn:
+	.set	.LANCHOR142,. + 0
+	.type	gpFlashSaveInfo, %object
+	.size	gpFlashSaveInfo, 4
+gpFlashSaveInfo:
 	.space	4
 	.section	.bss.gpNandParaInfo,"aw",%nobits
 	.align	2
-.LANCHOR23 = . + 0
+	.set	.LANCHOR18,. + 0
 	.type	gpNandParaInfo, %object
 	.size	gpNandParaInfo, 4
 gpNandParaInfo:
 	.space	4
-	.section	.bss.g_LowFormat,"aw",%nobits
+	.section	.bss.gpNandc,"aw",%nobits
 	.align	2
-.LANCHOR237 = . + 0
-	.type	g_LowFormat, %object
-	.size	g_LowFormat, 4
-g_LowFormat:
+	.set	.LANCHOR19,. + 0
+	.type	gpNandc, %object
+	.size	gpNandc, 4
+gpNandc:
 	.space	4
-	.section	.bss.c_ftl_nand_type,"aw",%nobits
-	.align	1
-.LANCHOR47 = . + 0
-	.type	c_ftl_nand_type, %object
-	.size	c_ftl_nand_type, 2
-c_ftl_nand_type:
-	.space	2
-	.section	.bss.gSysFreeQueue,"aw",%nobits
-	.align	1
-.LANCHOR81 = . + 0
-	.type	gSysFreeQueue, %object
-	.size	gSysFreeQueue, 2056
-gSysFreeQueue:
-	.space	2056
-	.section	.bss.slcPageToMlcPageTbl,"aw",%nobits
+	.section	.bss.gpNandc1,"aw",%nobits
 	.align	2
-.LANCHOR8 = . + 0
-	.type	slcPageToMlcPageTbl, %object
-	.size	slcPageToMlcPageTbl, 512
-slcPageToMlcPageTbl:
-	.space	512
-	.section	.rodata.__func__.7317,"a",%progbits
-.LANCHOR238 = . + 0
-	.type	__func__.7317, %object
-	.size	__func__.7317, 8
-__func__.7317:
-	.ascii	"FtlInit\000"
-	.section	.bss.c_ftl_nand_sys_blks_per_plane,"aw",%nobits
+	.type	gpNandc1, %object
+	.size	gpNandc1, 4
+gpNandc1:
+	.space	4
+	.section	.bss.gpReadRetrial,"aw",%nobits
 	.align	2
-.LANCHOR40 = . + 0
-	.type	c_ftl_nand_sys_blks_per_plane, %object
-	.size	c_ftl_nand_sys_blks_per_plane, 4
-c_ftl_nand_sys_blks_per_plane:
+	.set	.LANCHOR149,. + 0
+	.type	gpReadRetrial, %object
+	.size	gpReadRetrial, 4
+gpReadRetrial:
 	.space	4
-	.section	.bss.g_buffer_superblock,"aw",%nobits
+	.section	.bss.gp_ect_tbl_info,"aw",%nobits
 	.align	2
-.LANCHOR98 = . + 0
-	.type	g_buffer_superblock, %object
-	.size	g_buffer_superblock, 48
-g_buffer_superblock:
-	.space	48
-	.section	.bss.p_sys_data_buf,"aw",%nobits
+	.set	.LANCHOR188,. + 0
+	.type	gp_ect_tbl_info, %object
+	.size	gp_ect_tbl_info, 4
+gp_ect_tbl_info:
+	.space	4
+	.section	.bss.gp_gc_page_buf_info,"aw",%nobits
 	.align	2
-.LANCHOR86 = . + 0
-	.type	p_sys_data_buf, %object
-	.size	p_sys_data_buf, 4
-p_sys_data_buf:
+	.set	.LANCHOR103,. + 0
+	.type	gp_gc_page_buf_info, %object
+	.size	gp_gc_page_buf_info, 4
+gp_gc_page_buf_info:
 	.space	4
-	.section	.rodata.__func__.7722,"a",%progbits
-.LANCHOR101 = . + 0
-	.type	__func__.7722, %object
-	.size	__func__.7722, 26
-__func__.7722:
-	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.section	.bss.g_maxRegNum,"aw",%nobits
-.LANCHOR14 = . + 0
-	.type	g_maxRegNum, %object
-	.size	g_maxRegNum, 1
-g_maxRegNum:
-	.space	1
-	.section	.bss.p_gc_spare_buf,"aw",%nobits
+	.section	.bss.gp_last_act_superblock,"aw",%nobits
 	.align	2
-.LANCHOR121 = . + 0
-	.type	p_gc_spare_buf, %object
-	.size	p_gc_spare_buf, 4
-p_gc_spare_buf:
+	.set	.LANCHOR221,. + 0
+	.type	gp_last_act_superblock, %object
+	.size	gp_last_act_superblock, 4
+gp_last_act_superblock:
 	.space	4
-	.section	.bss.gNandFlashInfoBlockAddr,"aw",%nobits
+	.section	.bss.mlcPageToSlcPageTbl,"aw",%nobits
 	.align	2
-.LANCHOR149 = . + 0
-	.type	gNandFlashInfoBlockAddr, %object
-	.size	gNandFlashInfoBlockAddr, 4
-gNandFlashInfoBlockAddr:
+	.set	.LANCHOR117,. + 0
+	.type	mlcPageToSlcPageTbl, %object
+	.size	mlcPageToSlcPageTbl, 1024
+mlcPageToSlcPageTbl:
+	.space	1024
+	.section	.bss.p_blk_mode_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR0,. + 0
+	.type	p_blk_mode_table, %object
+	.size	p_blk_mode_table, 4
+p_blk_mode_table:
 	.space	4
-	.section	.bss.p_valid_page_count_check_table,"aw",%nobits
+	.section	.bss.p_data_block_list_head,"aw",%nobits
 	.align	2
-	.type	p_valid_page_count_check_table, %object
-	.size	p_valid_page_count_check_table, 4
-p_valid_page_count_check_table:
+	.set	.LANCHOR81,. + 0
+	.type	p_data_block_list_head, %object
+	.size	p_data_block_list_head, 4
+p_data_block_list_head:
 	.space	4
-	.section	.bss.p_io_spare_buf,"aw",%nobits
+	.section	.bss.p_data_block_list_table,"aw",%nobits
 	.align	2
-.LANCHOR185 = . + 0
-	.type	p_io_spare_buf, %object
-	.size	p_io_spare_buf, 4
-p_io_spare_buf:
+	.set	.LANCHOR80,. + 0
+	.type	p_data_block_list_table, %object
+	.size	p_data_block_list_table, 4
+p_data_block_list_table:
 	.space	4
-	.section	.bss.c_ftl_vendor_part_size,"aw",%nobits
-	.align	1
-.LANCHOR53 = . + 0
-	.type	c_ftl_vendor_part_size, %object
-	.size	c_ftl_vendor_part_size, 2
-c_ftl_vendor_part_size:
-	.space	2
-	.section	.bss.c_ftl_nand_planes_num,"aw",%nobits
-	.align	1
-.LANCHOR41 = . + 0
-	.type	c_ftl_nand_planes_num, %object
-	.size	c_ftl_nand_planes_num, 2
-c_ftl_nand_planes_num:
-	.space	2
-	.section	.bss.p_io_data_buf_0,"aw",%nobits
+	.section	.bss.p_data_block_list_tail,"aw",%nobits
 	.align	2
-.LANCHOR182 = . + 0
-	.type	p_io_data_buf_0, %object
-	.size	p_io_data_buf_0, 4
-p_io_data_buf_0:
+	.set	.LANCHOR83,. + 0
+	.type	p_data_block_list_tail, %object
+	.size	p_data_block_list_tail, 4
+p_data_block_list_tail:
 	.space	4
-	.section	.bss.p_io_data_buf_1,"aw",%nobits
+	.section	.bss.p_erase_count_table,"aw",%nobits
 	.align	2
-.LANCHOR183 = . + 0
-	.type	p_io_data_buf_1, %object
-	.size	p_io_data_buf_1, 4
-p_io_data_buf_1:
+	.set	.LANCHOR77,. + 0
+	.type	p_erase_count_table, %object
+	.size	p_erase_count_table, 4
+p_erase_count_table:
 	.space	4
-	.section	.data.power_up_flag,"aw",%progbits
+	.section	.bss.p_free_data_block_list_head,"aw",%nobits
 	.align	2
-	.type	power_up_flag, %object
-	.size	power_up_flag, 4
-power_up_flag:
-	.word	1
-	.section	.rodata.__func__.8109,"a",%progbits
-.LANCHOR118 = . + 0
-	.type	__func__.8109, %object
-	.size	__func__.8109, 18
-__func__.8109:
-	.ascii	"SupperBlkListInit\000"
-	.section	.bss.g_totle_write_page_count,"aw",%nobits
+	.set	.LANCHOR86,. + 0
+	.type	p_free_data_block_list_head, %object
+	.size	p_free_data_block_list_head, 4
+p_free_data_block_list_head:
+	.space	4
+	.section	.bss.p_gc_blk_tbl,"aw",%nobits
 	.align	2
-.LANCHOR159 = . + 0
-	.type	g_totle_write_page_count, %object
-	.size	g_totle_write_page_count, 4
-g_totle_write_page_count:
+	.set	.LANCHOR108,. + 0
+	.type	p_gc_blk_tbl, %object
+	.size	p_gc_blk_tbl, 4
+p_gc_blk_tbl:
 	.space	4
-	.section	.bss.g_totle_gc_page_count,"aw",%nobits
+	.section	.bss.p_gc_data_buf,"aw",%nobits
 	.align	2
-.LANCHOR158 = . + 0
-	.type	g_totle_gc_page_count, %object
-	.size	g_totle_gc_page_count, 4
-g_totle_gc_page_count:
+	.set	.LANCHOR104,. + 0
+	.type	p_gc_data_buf, %object
+	.size	p_gc_data_buf, 4
+p_gc_data_buf:
 	.space	4
-	.section	.bss.g_min_erase_count,"aw",%nobits
+	.section	.bss.p_gc_page_info,"aw",%nobits
 	.align	2
-.LANCHOR167 = . + 0
-	.type	g_min_erase_count, %object
-	.size	g_min_erase_count, 4
-g_min_erase_count:
+	.set	.LANCHOR111,. + 0
+	.type	p_gc_page_info, %object
+	.size	p_gc_page_info, 4
+p_gc_page_info:
 	.space	4
-	.section	.bss.FtlUpdateVaildLpnCount,"aw",%nobits
-	.align	1
-.LANCHOR105 = . + 0
-	.type	FtlUpdateVaildLpnCount, %object
-	.size	FtlUpdateVaildLpnCount, 2
-FtlUpdateVaildLpnCount:
-	.space	2
-	.section	.rodata.__func__.7762,"a",%progbits
-.LANCHOR214 = . + 0
-	.type	__func__.7762, %object
-	.size	__func__.7762, 16
-__func__.7762:
-	.ascii	"FtlMapWritePage\000"
-	.section	.bss.p_sys_data_buf_1,"aw",%nobits
+	.section	.bss.p_gc_spare_buf,"aw",%nobits
 	.align	2
-.LANCHOR180 = . + 0
-	.type	p_sys_data_buf_1, %object
-	.size	p_sys_data_buf_1, 4
-p_sys_data_buf_1:
+	.set	.LANCHOR105,. + 0
+	.type	p_gc_spare_buf, %object
+	.size	p_gc_spare_buf, 4
+p_gc_spare_buf:
 	.space	4
-	.section	.bss.g_in_gc_progress,"aw",%nobits
+	.section	.bss.p_io_data_buf_0,"aw",%nobits
 	.align	2
-.LANCHOR168 = . + 0
-	.type	g_in_gc_progress, %object
-	.size	g_in_gc_progress, 4
-g_in_gc_progress:
+	.set	.LANCHOR183,. + 0
+	.type	p_io_data_buf_0, %object
+	.size	p_io_data_buf_0, 4
+p_io_data_buf_0:
 	.space	4
-	.section	.bss.gNandChipMap,"aw",%nobits
+	.section	.bss.p_io_data_buf_1,"aw",%nobits
 	.align	2
-.LANCHOR5 = . + 0
-	.type	gNandChipMap, %object
-	.size	gNandChipMap, 32
-gNandChipMap:
-	.space	32
-	.section	.bss.g_gc_bad_block_gc_index,"aw",%nobits
-	.align	1
-.LANCHOR141 = . + 0
-	.type	g_gc_bad_block_gc_index, %object
-	.size	g_gc_bad_block_gc_index, 2
-g_gc_bad_block_gc_index:
-	.space	2
-	.section	.bss.c_ftl_nand_init_sys_blks_per_plane,"aw",%nobits
+	.set	.LANCHOR184,. + 0
+	.type	p_io_data_buf_1, %object
+	.size	p_io_data_buf_1, 4
+p_io_data_buf_1:
+	.space	4
+	.section	.bss.p_io_spare_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR186,. + 0
+	.type	p_io_spare_buf, %object
+	.size	p_io_spare_buf, 4
+p_io_spare_buf:
+	.space	4
+	.section	.bss.p_l2p_map_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR123,. + 0
+	.type	p_l2p_map_buf, %object
+	.size	p_l2p_map_buf, 4
+p_l2p_map_buf:
+	.space	4
+	.section	.bss.p_l2p_ram_map,"aw",%nobits
 	.align	2
-.LANCHOR69 = . + 0
-	.type	c_ftl_nand_init_sys_blks_per_plane, %object
-	.size	c_ftl_nand_init_sys_blks_per_plane, 4
-c_ftl_nand_init_sys_blks_per_plane:
+	.set	.LANCHOR95,. + 0
+	.type	p_l2p_ram_map, %object
+	.size	p_l2p_ram_map, 4
+p_l2p_ram_map:
 	.space	4
-	.section	.bss.p_free_data_block_list_head,"aw",%nobits
+	.section	.bss.p_map_block_table,"aw",%nobits
 	.align	2
-.LANCHOR93 = . + 0
-	.type	p_free_data_block_list_head, %object
-	.size	p_free_data_block_list_head, 4
-p_free_data_block_list_head:
+	.set	.LANCHOR126,. + 0
+	.type	p_map_block_table, %object
+	.size	p_map_block_table, 4
+p_map_block_table:
 	.space	4
-	.section	.bss.gNandIDataBuf,"aw",%nobits
+	.section	.bss.p_map_block_valid_page_count,"aw",%nobits
 	.align	2
-.LANCHOR25 = . + 0
-	.type	gNandIDataBuf, %object
-	.size	gNandIDataBuf, 2048
-gNandIDataBuf:
-	.space	2048
-	.section	.bss.gNandPhyInfo,"aw",%nobits
+	.set	.LANCHOR122,. + 0
+	.type	p_map_block_valid_page_count, %object
+	.size	p_map_block_valid_page_count, 4
+p_map_block_valid_page_count:
+	.space	4
+	.section	.bss.p_map_block_ver_table,"aw",%nobits
 	.align	2
-.LANCHOR28 = . + 0
-	.type	gNandPhyInfo, %object
-	.size	gNandPhyInfo, 28
-gNandPhyInfo:
-	.space	28
-	.section	.bss.gSysInfo,"aw",%nobits
+	.set	.LANCHOR127,. + 0
+	.type	p_map_block_ver_table, %object
+	.size	p_map_block_ver_table, 4
+p_map_block_ver_table:
+	.space	4
+	.section	.bss.p_map_region_ppn_check_table,"aw",%nobits
 	.align	2
-.LANCHOR196 = . + 0
-	.type	gSysInfo, %object
-	.size	gSysInfo, 12
-gSysInfo:
-	.space	12
-	.section	.bss.g_gc_blk_index,"aw",%nobits
-	.align	1
-.LANCHOR175 = . + 0
-	.type	g_gc_blk_index, %object
-	.size	g_gc_blk_index, 2
-g_gc_blk_index:
-	.space	2
-	.section	.bss.g_gc_free_blk_threshold,"aw",%nobits
-	.align	1
-.LANCHOR173 = . + 0
-	.type	g_gc_free_blk_threshold, %object
-	.size	g_gc_free_blk_threshold, 2
-g_gc_free_blk_threshold:
-	.space	2
-	.section	.bss.g_max_erase_count,"aw",%nobits
+	.set	.LANCHOR192,. + 0
+	.type	p_map_region_ppn_check_table, %object
+	.size	p_map_region_ppn_check_table, 4
+p_map_region_ppn_check_table:
+	.space	4
+	.section	.bss.p_map_region_ppn_table,"aw",%nobits
 	.align	2
-.LANCHOR166 = . + 0
-	.type	g_max_erase_count, %object
-	.size	g_max_erase_count, 4
-g_max_erase_count:
+	.set	.LANCHOR128,. + 0
+	.type	p_map_region_ppn_table, %object
+	.size	p_map_region_ppn_table, 4
+p_map_region_ppn_table:
 	.space	4
-	.section	.bss.gVendorBlkInfo,"aw",%nobits
+	.section	.bss.p_plane_order_table,"aw",%nobits
+	.set	.LANCHOR45,. + 0
+	.type	p_plane_order_table, %object
+	.size	p_plane_order_table, 32
+p_plane_order_table:
+	.space	32
+	.section	.bss.p_swl_mul_table,"aw",%nobits
 	.align	2
-.LANCHOR215 = . + 0
-	.type	gVendorBlkInfo, %object
-	.size	gVendorBlkInfo, 44
-gVendorBlkInfo:
-	.space	44
-	.section	.bss.g_GlobalDataVersion,"aw",%nobits
+	.set	.LANCHOR134,. + 0
+	.type	p_swl_mul_table, %object
+	.size	p_swl_mul_table, 4
+p_swl_mul_table:
+	.space	4
+	.section	.bss.p_sys_data_buf,"aw",%nobits
 	.align	2
-.LANCHOR157 = . + 0
-	.type	g_GlobalDataVersion, %object
-	.size	g_GlobalDataVersion, 4
-g_GlobalDataVersion:
+	.set	.LANCHOR79,. + 0
+	.type	p_sys_data_buf, %object
+	.size	p_sys_data_buf, 4
+p_sys_data_buf:
 	.space	4
-	.section	.bss.gp_last_act_superblock,"aw",%nobits
+	.section	.bss.p_sys_data_buf_1,"aw",%nobits
 	.align	2
-.LANCHOR224 = . + 0
-	.type	gp_last_act_superblock, %object
-	.size	gp_last_act_superblock, 4
-gp_last_act_superblock:
+	.set	.LANCHOR181,. + 0
+	.type	p_sys_data_buf_1, %object
+	.size	p_sys_data_buf_1, 4
+p_sys_data_buf_1:
 	.space	4
-	.section	.bss.c_ftl_nand_max_vendor_blks,"aw",%nobits
-	.align	1
-.LANCHOR65 = . + 0
-	.type	c_ftl_nand_max_vendor_blks, %object
-	.size	c_ftl_nand_max_vendor_blks, 2
-c_ftl_nand_max_vendor_blks:
-	.space	2
-	.section	.data.random_seed,"aw",%progbits
-	.align	1
-.LANCHOR3 = . + 0
-	.type	random_seed, %object
-	.size	random_seed, 256
-random_seed:
-	.short	22378
-	.short	1512
-	.short	25245
-	.short	17827
-	.short	25756
-	.short	19440
-	.short	9026
-	.short	10030
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-	.short	20467
-	.short	29676
-	.short	24432
-	.short	31328
-	.short	6872
-	.short	13426
-	.short	13842
-	.short	8783
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-	.short	782
-	.short	28837
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-	.short	9505
-	.short	18676
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-	.short	18730
-	.short	1085
-	.short	32609
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-	.short	20858
-	.short	15170
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-	.short	1607
-	.short	32298
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-	.short	18905
-	.short	1976
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-	.short	20204
-	.short	17443
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-	.short	23330
-	.short	29369
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-	.short	27600
-	.short	21785
-	.short	6019
-	.short	6311
-	.short	31598
-	.short	30210
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-	.short	3107
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-	.short	19852
-	.short	20601
-	.short	8349
-	.short	9290
-	.short	29819
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-	.short	3661
-	.short	28676
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-	.short	32574
-	.short	8693
-	.short	31253
-	.short	9081
-	.short	5399
-	.short	6842
-	.short	20087
-	.short	5537
-	.short	1274
-	.short	11617
-	.short	9530
-	.short	4866
-	.short	8035
-	.short	23219
-	.short	1178
-	.short	23272
-	.short	7383
-	.short	18944
-	.short	12488
-	.short	12871
-	.short	29340
-	.short	20532
-	.short	11022
-	.short	22514
-	.short	228
-	.short	22363
-	.short	24978
-	.short	14584
-	.short	12138
-	.short	3092
-	.short	17916
-	.short	16863
-	.short	14554
-	.short	31457
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-	.short	25311
-	.short	24121
-	.short	3684
-	.short	28037
-	.short	22865
-	.short	22839
-	.short	25217
-	.short	13217
-	.short	27186
-	.short	14938
-	.short	11180
-	.short	29754
-	.short	24180
-	.short	15150
-	.short	32455
-	.short	20434
-	.short	23848
-	.short	29983
-	.short	16120
-	.short	14769
-	.short	20041
-	.short	29803
-	.short	28406
-	.short	17598
-	.short	28087
-	.section	.rodata.__func__.7655,"a",%progbits
-.LANCHOR96 = . + 0
-	.type	__func__.7655, %object
-	.size	__func__.7655, 17
-__func__.7655:
-	.ascii	"List_remove_node\000"
-	.section	.bss.gNandMaxDie,"aw",%nobits
-.LANCHOR16 = . + 0
-	.type	gNandMaxDie, %object
-	.size	gNandMaxDie, 1
-gNandMaxDie:
-	.space	1
-	.section	.bss.p_gc_data_buf,"aw",%nobits
+	.section	.bss.p_sys_spare_buf,"aw",%nobits
 	.align	2
-.LANCHOR120 = . + 0
-	.type	p_gc_data_buf, %object
-	.size	p_gc_data_buf, 4
-p_gc_data_buf:
+	.set	.LANCHOR185,. + 0
+	.type	p_sys_spare_buf, %object
+	.size	p_sys_spare_buf, 4
+p_sys_spare_buf:
 	.space	4
-	.section	.bss.g_MaxLbaSector,"aw",%nobits
+	.section	.bss.p_valid_page_count_check_table,"aw",%nobits
 	.align	2
-.LANCHOR72 = . + 0
-	.type	g_MaxLbaSector, %object
-	.size	g_MaxLbaSector, 4
-g_MaxLbaSector:
+	.type	p_valid_page_count_check_table, %object
+	.size	p_valid_page_count_check_table, 4
+p_valid_page_count_check_table:
 	.space	4
-	.section	.bss.p_erase_count_table,"aw",%nobits
+	.section	.bss.p_valid_page_count_table,"aw",%nobits
 	.align	2
-.LANCHOR84 = . + 0
-	.type	p_erase_count_table, %object
-	.size	p_erase_count_table, 4
-p_erase_count_table:
+	.set	.LANCHOR82,. + 0
+	.type	p_valid_page_count_table, %object
+	.size	p_valid_page_count_table, 4
+p_valid_page_count_table:
 	.space	4
 	.section	.bss.p_vendor_block_table,"aw",%nobits
 	.align	2
-.LANCHOR75 = . + 0
+	.set	.LANCHOR70,. + 0
 	.type	p_vendor_block_table, %object
 	.size	p_vendor_block_table, 4
 p_vendor_block_table:
 	.space	4
-	.section	.bss.p_data_block_list_head,"aw",%nobits
+	.section	.bss.p_vendor_block_valid_page_count,"aw",%nobits
 	.align	2
-.LANCHOR88 = . + 0
-	.type	p_data_block_list_head, %object
-	.size	p_data_block_list_head, 4
-p_data_block_list_head:
+	.set	.LANCHOR189,. + 0
+	.type	p_vendor_block_valid_page_count, %object
+	.size	p_vendor_block_valid_page_count, 4
+p_vendor_block_valid_page_count:
 	.space	4
-	.section	.bss.gNandOptPara,"aw",%nobits
-.LANCHOR6 = . + 0
-	.type	gNandOptPara, %object
-	.size	gNandOptPara, 32
-gNandOptPara:
-	.space	32
-	.section	.bss.g_sys_save_data,"aw",%nobits
-	.align	2
-.LANCHOR131 = . + 0
-	.type	g_sys_save_data, %object
-	.size	g_sys_save_data, 48
-g_sys_save_data:
-	.space	48
-	.section	.bss.g_VaildLpn,"aw",%nobits
+	.section	.bss.p_vendor_block_ver_table,"aw",%nobits
 	.align	2
-.LANCHOR106 = . + 0
-	.type	g_VaildLpn, %object
-	.size	g_VaildLpn, 4
-g_VaildLpn:
+	.set	.LANCHOR190,. + 0
+	.type	p_vendor_block_ver_table, %object
+	.size	p_vendor_block_ver_table, 4
+p_vendor_block_ver_table:
 	.space	4
-	.section	.bss.g_recovery_page_num,"aw",%nobits
+	.section	.bss.p_vendor_data_buf,"aw",%nobits
 	.align	2
-.LANCHOR231 = . + 0
-	.type	g_recovery_page_num, %object
-	.size	g_recovery_page_num, 4
-g_recovery_page_num:
+	.set	.LANCHOR182,. + 0
+	.type	p_vendor_data_buf, %object
+	.size	p_vendor_data_buf, 4
+p_vendor_data_buf:
 	.space	4
-	.section	.bss.gTotleBlock,"aw",%nobits
-	.align	1
-.LANCHOR24 = . + 0
-	.type	gTotleBlock, %object
-	.size	gTotleBlock, 2
-gTotleBlock:
-	.space	2
-	.section	.rodata.__func__.7782,"a",%progbits
-.LANCHOR104 = . + 0
-	.type	__func__.7782, %object
-	.size	__func__.7782, 22
-__func__.7782:
-	.ascii	"select_l2p_ram_region\000"
-	.section	.rodata.__func__.8222,"a",%progbits
-.LANCHOR208 = . + 0
-	.type	__func__.8222, %object
-	.size	__func__.8222, 20
-__func__.8222:
-	.ascii	"decrement_vpc_count\000"
-	.section	.bss.g_gc_refresh_block_temp_tbl,"aw",%nobits
-	.align	1
-	.type	g_gc_refresh_block_temp_tbl, %object
-	.size	g_gc_refresh_block_temp_tbl, 34
-g_gc_refresh_block_temp_tbl:
-	.space	34
-	.section	.bss.IDByte,"aw",%nobits
-	.align	2
-.LANCHOR22 = . + 0
-	.type	IDByte, %object
-	.size	IDByte, 32
-IDByte:
-	.space	32
-	.section	.bss.g_gc_temp_superblock,"aw",%nobits
-	.align	2
-.LANCHOR99 = . + 0
-	.type	g_gc_temp_superblock, %object
-	.size	g_gc_temp_superblock, 48
-g_gc_temp_superblock:
-	.space	48
-	.section	.bss.c_ftl_nand_page_pre_slc_blk,"aw",%nobits
-	.align	1
-.LANCHOR57 = . + 0
-	.type	c_ftl_nand_page_pre_slc_blk, %object
-	.size	c_ftl_nand_page_pre_slc_blk, 2
-c_ftl_nand_page_pre_slc_blk:
-	.space	2
-	.section	.bss.gBlockPageAlignSize,"aw",%nobits
+	.section	.bss.p_vendor_region_ppn_table,"aw",%nobits
 	.align	2
-.LANCHOR2 = . + 0
-	.type	gBlockPageAlignSize, %object
-	.size	gBlockPageAlignSize, 4
-gBlockPageAlignSize:
+	.set	.LANCHOR191,. + 0
+	.type	p_vendor_region_ppn_table, %object
+	.size	p_vendor_region_ppn_table, 4
+p_vendor_region_ppn_table:
 	.space	4
-	.section	.rodata.__func__.8200,"a",%progbits
-.LANCHOR219 = . + 0
-	.type	__func__.8200, %object
-	.size	__func__.8200, 29
-__func__.8200:
-	.ascii	"allocate_new_data_superblock\000"
-	.section	.bss.g_gc_superblock,"aw",%nobits
-	.align	2
-.LANCHOR202 = . + 0
-	.type	g_gc_superblock, %object
-	.size	g_gc_superblock, 48
-g_gc_superblock:
-	.space	48
-	.section	.bss.g_totle_sys_slc_erase_count,"aw",%nobits
-	.align	2
-.LANCHOR85 = . + 0
-	.type	g_totle_sys_slc_erase_count, %object
-	.size	g_totle_sys_slc_erase_count, 4
-g_totle_sys_slc_erase_count:
+	.section	.bss.read_retry_cur_offset,"aw",%nobits
+	.set	.LANCHOR21,. + 0
+	.type	read_retry_cur_offset, %object
+	.size	read_retry_cur_offset, 4
+read_retry_cur_offset:
 	.space	4
-	.section	.bss.c_ftl_nand_blks_per_die_shift,"aw",%nobits
-	.align	1
-.LANCHOR55 = . + 0
-	.type	c_ftl_nand_blks_per_die_shift, %object
-	.size	c_ftl_nand_blks_per_die_shift, 2
-c_ftl_nand_blks_per_die_shift:
-	.space	2
-	.section	.bss.g_SlcPartLbaEndSector,"aw",%nobits
+	.section	.bss.req_erase,"aw",%nobits
 	.align	2
-.LANCHOR154 = . + 0
-	.type	g_SlcPartLbaEndSector, %object
-	.size	g_SlcPartLbaEndSector, 4
-g_SlcPartLbaEndSector:
+	.set	.LANCHOR76,. + 0
+	.type	req_erase, %object
+	.size	req_erase, 4
+req_erase:
 	.space	4
-	.section	.rodata.__func__.8206,"a",%progbits
-.LANCHOR209 = . + 0
-	.type	__func__.8206, %object
-	.size	__func__.8206, 19
-__func__.8206:
-	.ascii	"get_new_active_ppa\000"
-	.section	.bss.g_gc_cur_blk_max_valid_pages,"aw",%nobits
-	.align	1
-.LANCHOR235 = . + 0
-	.type	g_gc_cur_blk_max_valid_pages, %object
-	.size	g_gc_cur_blk_max_valid_pages, 2
-g_gc_cur_blk_max_valid_pages:
-	.space	2
-	.section	.bss.g_totle_discard_page_count,"aw",%nobits
+	.section	.bss.req_gc,"aw",%nobits
 	.align	2
-.LANCHOR160 = . + 0
-	.type	g_totle_discard_page_count, %object
-	.size	g_totle_discard_page_count, 4
-g_totle_discard_page_count:
+	.set	.LANCHOR106,. + 0
+	.type	req_gc, %object
+	.size	req_gc, 4
+req_gc:
 	.space	4
-	.section	.bss.c_ftl_nand_bbm_buf_size,"aw",%nobits
-	.align	1
-.LANCHOR79 = . + 0
-	.type	c_ftl_nand_bbm_buf_size, %object
-	.size	c_ftl_nand_bbm_buf_size, 2
-c_ftl_nand_bbm_buf_size:
-	.space	2
-	.section	.bss.gL2pMapInfo,"aw",%nobits
-	.align	2
-.LANCHOR110 = . + 0
-	.type	gL2pMapInfo, %object
-	.size	gL2pMapInfo, 44
-gL2pMapInfo:
-	.space	44
-	.section	.bss.g_gc_head_data_block_count,"aw",%nobits
+	.section	.bss.req_gc_dst,"aw",%nobits
 	.align	2
-.LANCHOR171 = . + 0
-	.type	g_gc_head_data_block_count, %object
-	.size	g_gc_head_data_block_count, 4
-g_gc_head_data_block_count:
+	.set	.LANCHOR179,. + 0
+	.type	req_gc_dst, %object
+	.size	req_gc_dst, 4
+req_gc_dst:
 	.space	4
-	.section	.bss.gFlashPageBuffer0,"aw",%nobits
+	.section	.bss.req_prgm,"aw",%nobits
 	.align	2
-.LANCHOR146 = . + 0
-	.type	gFlashPageBuffer0, %object
-	.size	gFlashPageBuffer0, 4
-gFlashPageBuffer0:
+	.set	.LANCHOR180,. + 0
+	.type	req_prgm, %object
+	.size	req_prgm, 4
+req_prgm:
 	.space	4
-	.section	.bss.g_req_cache,"aw",%nobits
+	.section	.bss.req_read,"aw",%nobits
 	.align	2
-.LANCHOR125 = . + 0
-	.type	g_req_cache, %object
-	.size	g_req_cache, 4
-g_req_cache:
+	.set	.LANCHOR178,. + 0
+	.type	req_read, %object
+	.size	req_read, 4
+req_read:
 	.space	4
-	.section	.bss.gFlashPageBuffer1,"aw",%nobits
+	.section	.bss.req_sys,"aw",%nobits
 	.align	2
-.LANCHOR143 = . + 0
-	.type	gFlashPageBuffer1, %object
-	.size	gFlashPageBuffer1, 4
-gFlashPageBuffer1:
-	.space	4
-	.section	.data.gFtlInitStatus,"aw",%progbits
+	.set	.LANCHOR199,. + 0
+	.type	req_sys, %object
+	.size	req_sys, 36
+req_sys:
+	.space	36
+	.section	.bss.slcPageToMlcPageTbl,"aw",%nobits
 	.align	2
-.LANCHOR225 = . + 0
-	.type	gFtlInitStatus, %object
-	.size	gFtlInitStatus, 4
-gFtlInitStatus:
-	.word	-1
-	.section	.bss.c_gc_page_buf_num,"aw",%nobits
+	.set	.LANCHOR16,. + 0
+	.type	slcPageToMlcPageTbl, %object
+	.size	slcPageToMlcPageTbl, 512
+slcPageToMlcPageTbl:
+	.space	512
+	.section	.data.FtlMallocOffset,"aw",%progbits
 	.align	2
-.LANCHOR124 = . + 0
-	.type	c_gc_page_buf_num, %object
-	.size	c_gc_page_buf_num, 4
-c_gc_page_buf_num:
+	.type	FtlMallocOffset, %object
+	.size	FtlMallocOffset, 4
+FtlMallocOffset:
+	.word	64
+	.section	.data.NandFlashParaTbl,"aw",%progbits
+	.align	1
+	.set	.LANCHOR140,. + 0
+	.type	NandFlashParaTbl, %object
+	.size	NandFlashParaTbl, 2336
+NandFlashParaTbl:
+	.byte	6
+	.byte	44
+	.byte	100
+	.byte	68
+	.byte	75
+	.byte	-87
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	16
+	.short	256
+	.byte	2
+	.byte	2
+	.short	2048
+	.short	479
+	.byte	3
+	.byte	17
+	.byte	40
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	6
+	.byte	44
+	.byte	68
+	.byte	68
+	.byte	75
+	.byte	-87
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	16
+	.short	256
+	.byte	2
+	.byte	2
+	.short	1064
+	.short	479
+	.byte	3
+	.byte	17
+	.byte	40
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	6
+	.byte	44
+	.byte	104
+	.byte	4
+	.byte	74
+	.byte	-87
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	8
+	.short	256
+	.byte	2
+	.byte	2
+	.short	2048
+	.short	287
+	.byte	1
+	.byte	0
+	.byte	24
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
 	.space	4
-	.section	.data.NandFlashParaTbl,"aw",%progbits
-	.align	1
-.LANCHOR26 = . + 0
-	.type	NandFlashParaTbl, %object
-	.size	NandFlashParaTbl, 2304
-NandFlashParaTbl:
-	.byte	6
+	.byte	5
 	.byte	44
-	.byte	100
-	.byte	68
+	.byte	-120
+	.byte	4
 	.byte	75
 	.byte	-87
 	.byte	0
@@ -22856,10 +22289,10 @@ NandFlashParaTbl:
 	.byte	2
 	.byte	2
 	.short	2048
-	.short	479
-	.byte	3
-	.byte	17
-	.byte	40
+	.short	287
+	.byte	1
+	.byte	0
+	.byte	24
 	.byte	32
 	.byte	1
 	.byte	0
@@ -22870,18 +22303,96 @@ NandFlashParaTbl:
 	.space	4
 	.byte	6
 	.byte	44
-	.byte	68
-	.byte	68
-	.byte	75
+	.byte	-88
+	.byte	5
+	.byte	-53
 	.byte	-87
 	.byte	0
 	.byte	4
-	.byte	1
+	.byte	2
 	.byte	16
 	.short	256
 	.byte	2
 	.byte	2
-	.short	1064
+	.short	2048
+	.short	287
+	.byte	1
+	.byte	0
+	.byte	24
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	6
+	.byte	44
+	.byte	104
+	.byte	4
+	.byte	70
+	.byte	-119
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	8
+	.short	256
+	.byte	2
+	.byte	2
+	.short	2048
+	.short	287
+	.byte	1
+	.byte	0
+	.byte	24
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	6
+	.byte	44
+	.byte	72
+	.byte	4
+	.byte	74
+	.byte	-91
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	8
+	.short	256
+	.byte	2
+	.byte	2
+	.short	1024
+	.short	287
+	.byte	1
+	.byte	0
+	.byte	24
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	6
+	.byte	44
+	.byte	-124
+	.byte	100
+	.byte	60
+	.byte	-91
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	32
+	.short	512
+	.byte	2
+	.byte	2
+	.short	1024
 	.short	479
 	.byte	3
 	.byte	17
@@ -22894,12 +22405,64 @@ NandFlashParaTbl:
 	.byte	0
 	.byte	0
 	.space	4
+	.byte	5
+	.byte	44
+	.byte	-124
+	.byte	100
+	.byte	84
+	.byte	-87
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	32
+	.short	512
+	.byte	2
+	.byte	2
+	.short	1024
+	.short	479
+	.byte	4
+	.byte	18
+	.byte	60
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
 	.byte	6
 	.byte	44
-	.byte	104
+	.byte	-41
+	.byte	-108
+	.byte	62
+	.byte	-124
+	.byte	0
 	.byte	4
-	.byte	74
-	.byte	-87
+	.byte	1
+	.byte	8
+	.short	128
+	.byte	2
+	.byte	2
+	.short	4096
+	.short	279
+	.byte	1
+	.byte	0
+	.byte	24
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	6
+	.byte	44
+	.byte	72
+	.byte	4
+	.byte	70
+	.byte	-123
 	.byte	0
 	.byte	4
 	.byte	1
@@ -22907,9 +22470,87 @@ NandFlashParaTbl:
 	.short	256
 	.byte	2
 	.byte	2
+	.short	1024
+	.short	287
+	.byte	1
+	.byte	0
+	.byte	24
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	6
+	.byte	44
+	.byte	-120
+	.byte	5
+	.byte	-58
+	.byte	-119
+	.byte	0
+	.byte	4
+	.byte	2
+	.byte	8
+	.short	256
+	.byte	2
+	.byte	2
+	.short	2048
+	.short	287
+	.byte	1
+	.byte	0
+	.byte	24
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	5
+	.byte	44
+	.byte	-120
+	.byte	36
+	.byte	75
+	.byte	-87
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	16
+	.short	256
+	.byte	2
+	.byte	2
+	.short	2048
+	.short	287
+	.byte	1
+	.byte	0
+	.byte	24
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	6
+	.byte	44
+	.byte	104
+	.byte	0
+	.byte	39
+	.byte	-87
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	16
+	.short	128
+	.byte	1
+	.byte	2
 	.short	2048
 	.short	287
-	.byte	1
+	.byte	0
 	.byte	0
 	.byte	24
 	.byte	32
@@ -22922,22 +22563,22 @@ NandFlashParaTbl:
 	.space	4
 	.byte	5
 	.byte	44
-	.byte	-120
-	.byte	4
-	.byte	75
-	.byte	-87
+	.byte	100
+	.byte	100
+	.byte	86
+	.byte	-91
 	.byte	0
 	.byte	4
 	.byte	1
-	.byte	16
-	.short	256
+	.byte	24
+	.short	512
 	.byte	2
 	.byte	2
-	.short	2048
-	.short	287
-	.byte	1
-	.byte	0
-	.byte	24
+	.short	700
+	.short	479
+	.byte	4
+	.byte	18
+	.byte	60
 	.byte	32
 	.byte	1
 	.byte	0
@@ -22948,9 +22589,9 @@ NandFlashParaTbl:
 	.space	4
 	.byte	6
 	.byte	44
-	.byte	-88
-	.byte	5
-	.byte	-53
+	.byte	-124
+	.byte	-59
+	.byte	75
 	.byte	-87
 	.byte	0
 	.byte	4
@@ -22960,10 +22601,10 @@ NandFlashParaTbl:
 	.byte	2
 	.byte	2
 	.short	2048
-	.short	287
-	.byte	1
-	.byte	0
-	.byte	24
+	.short	479
+	.byte	3
+	.byte	17
+	.byte	40
 	.byte	32
 	.byte	1
 	.byte	0
@@ -22974,20 +22615,20 @@ NandFlashParaTbl:
 	.space	4
 	.byte	6
 	.byte	44
+	.byte	-43
+	.byte	-47
+	.byte	-90
 	.byte	104
-	.byte	4
-	.byte	70
-	.byte	-119
 	.byte	0
 	.byte	4
-	.byte	1
-	.byte	8
-	.short	256
 	.byte	2
+	.byte	8
+	.short	64
+	.byte	1
 	.byte	2
 	.short	2048
-	.short	287
-	.byte	1
+	.short	279
+	.byte	0
 	.byte	0
 	.byte	24
 	.byte	32
@@ -23000,20 +22641,20 @@ NandFlashParaTbl:
 	.space	4
 	.byte	6
 	.byte	44
-	.byte	72
-	.byte	4
-	.byte	74
-	.byte	-91
+	.byte	-36
+	.byte	-112
+	.byte	-90
+	.byte	84
 	.byte	0
 	.byte	4
 	.byte	1
 	.byte	8
-	.short	256
-	.byte	2
+	.short	64
+	.byte	1
 	.byte	2
 	.short	1024
-	.short	287
-	.byte	1
+	.short	279
+	.byte	0
 	.byte	0
 	.byte	24
 	.byte	32
@@ -23024,24 +22665,24 @@ NandFlashParaTbl:
 	.byte	0
 	.byte	0
 	.space	4
-	.byte	6
+	.byte	5
 	.byte	44
-	.byte	-124
 	.byte	100
-	.byte	60
-	.byte	-91
+	.byte	100
+	.byte	84
+	.byte	-92
 	.byte	0
 	.byte	4
 	.byte	1
 	.byte	32
 	.short	512
 	.byte	2
-	.byte	2
+	.byte	1
 	.short	1024
 	.short	479
-	.byte	3
-	.byte	17
-	.byte	40
+	.byte	4
+	.byte	18
+	.byte	60
 	.byte	32
 	.byte	1
 	.byte	0
@@ -23052,48 +22693,48 @@ NandFlashParaTbl:
 	.space	4
 	.byte	5
 	.byte	44
-	.byte	-124
 	.byte	100
-	.byte	84
-	.byte	-87
+	.byte	68
+	.byte	50
+	.byte	-91
 	.byte	0
 	.byte	4
 	.byte	1
 	.byte	32
 	.short	512
 	.byte	2
-	.byte	2
-	.short	1024
-	.short	479
-	.byte	4
-	.byte	18
+	.byte	1
+	.short	1048
+	.short	1503
+	.byte	5
+	.byte	19
 	.byte	60
 	.byte	32
 	.byte	1
 	.byte	0
 	.byte	1
 	.byte	0
-	.byte	0
+	.byte	1
 	.byte	0
 	.space	4
-	.byte	6
+	.byte	5
 	.byte	44
-	.byte	-41
-	.byte	-108
-	.byte	62
-	.byte	-124
+	.byte	100
+	.byte	100
+	.byte	60
+	.byte	-91
 	.byte	0
 	.byte	4
 	.byte	1
-	.byte	8
-	.short	128
-	.byte	2
+	.byte	32
+	.short	512
 	.byte	2
-	.short	4096
-	.short	279
 	.byte	1
-	.byte	0
-	.byte	24
+	.short	1044
+	.short	479
+	.byte	3
+	.byte	17
+	.byte	40
 	.byte	32
 	.byte	1
 	.byte	0
@@ -23103,312 +22744,312 @@ NandFlashParaTbl:
 	.byte	0
 	.space	4
 	.byte	6
-	.byte	44
-	.byte	72
-	.byte	4
-	.byte	70
-	.byte	-123
-	.byte	0
+	.byte	-83
+	.byte	-34
+	.byte	-108
+	.byte	-46
 	.byte	4
+	.byte	67
+	.byte	2
 	.byte	1
-	.byte	8
+	.byte	16
 	.short	256
 	.byte	2
 	.byte	2
-	.short	1024
-	.short	287
+	.short	2048
+	.short	473
+	.byte	1
 	.byte	1
-	.byte	0
 	.byte	24
 	.byte	32
-	.byte	1
+	.byte	4
 	.byte	0
-	.byte	1
+	.byte	3
 	.byte	0
 	.byte	0
 	.byte	0
 	.space	4
 	.byte	6
-	.byte	44
-	.byte	-120
-	.byte	5
-	.byte	-58
-	.byte	-119
-	.byte	0
-	.byte	4
+	.byte	-83
+	.byte	-41
+	.byte	-108
+	.byte	-38
+	.byte	116
+	.byte	-61
 	.byte	2
-	.byte	8
+	.byte	1
+	.byte	16
 	.short	256
 	.byte	2
 	.byte	2
-	.short	2048
-	.short	287
+	.short	1024
+	.short	473
 	.byte	1
-	.byte	0
-	.byte	24
+	.byte	2
+	.byte	40
 	.byte	32
-	.byte	1
+	.byte	4
 	.byte	0
-	.byte	1
+	.byte	3
 	.byte	0
 	.byte	0
 	.byte	0
 	.space	4
-	.byte	5
-	.byte	44
-	.byte	-120
-	.byte	36
-	.byte	75
-	.byte	-87
-	.byte	0
-	.byte	4
+	.byte	6
+	.byte	-83
+	.byte	-41
+	.byte	-108
+	.byte	-111
+	.byte	96
+	.byte	68
+	.byte	2
 	.byte	1
 	.byte	16
 	.short	256
 	.byte	2
 	.byte	2
-	.short	2048
-	.short	287
+	.short	1046
+	.short	473
 	.byte	1
-	.byte	0
-	.byte	24
+	.byte	3
+	.byte	40
 	.byte	32
+	.byte	4
 	.byte	1
-	.byte	0
-	.byte	1
+	.byte	3
 	.byte	0
 	.byte	0
 	.byte	0
 	.space	4
 	.byte	6
-	.byte	44
-	.byte	104
-	.byte	0
-	.byte	39
-	.byte	-87
-	.byte	0
-	.byte	4
+	.byte	-83
+	.byte	-34
+	.byte	-108
+	.byte	-38
+	.byte	116
+	.byte	-60
+	.byte	2
 	.byte	1
 	.byte	16
-	.short	128
-	.byte	1
+	.short	256
 	.byte	2
-	.short	2048
-	.short	287
-	.byte	0
-	.byte	0
-	.byte	24
-	.byte	32
+	.byte	2
+	.short	2090
+	.short	473
 	.byte	1
-	.byte	0
+	.byte	4
+	.byte	40
+	.byte	32
+	.byte	4
 	.byte	1
+	.byte	3
 	.byte	0
 	.byte	0
 	.byte	0
 	.space	4
-	.byte	5
-	.byte	44
-	.byte	100
-	.byte	100
-	.byte	86
-	.byte	-91
-	.byte	0
-	.byte	4
+	.byte	6
+	.byte	-83
+	.byte	-34
+	.byte	-108
+	.byte	-21
+	.byte	116
+	.byte	68
+	.byte	2
 	.byte	1
-	.byte	24
-	.short	512
+	.byte	32
+	.short	256
 	.byte	2
 	.byte	2
-	.short	700
-	.short	479
-	.byte	4
-	.byte	18
-	.byte	60
-	.byte	32
+	.short	1066
+	.short	473
 	.byte	1
-	.byte	0
+	.byte	7
+	.byte	40
+	.byte	32
+	.byte	4
 	.byte	1
+	.byte	3
 	.byte	0
 	.byte	0
 	.byte	0
 	.space	4
 	.byte	6
-	.byte	44
-	.byte	-124
-	.byte	-59
-	.byte	75
-	.byte	-87
-	.byte	0
-	.byte	4
+	.byte	-83
+	.byte	-43
+	.byte	-108
+	.byte	-38
+	.byte	116
+	.byte	-60
 	.byte	2
+	.byte	1
 	.byte	16
 	.short	256
 	.byte	2
 	.byte	2
-	.short	2048
-	.short	479
+	.short	530
+	.short	473
+	.byte	1
 	.byte	3
-	.byte	17
 	.byte	40
 	.byte	32
+	.byte	4
 	.byte	1
-	.byte	0
-	.byte	1
+	.byte	3
 	.byte	0
 	.byte	0
 	.byte	0
 	.space	4
 	.byte	6
-	.byte	44
-	.byte	-43
-	.byte	-47
-	.byte	-90
-	.byte	104
-	.byte	0
-	.byte	4
+	.byte	-83
+	.byte	-41
+	.byte	-108
+	.byte	-102
+	.byte	116
+	.byte	66
 	.byte	2
-	.byte	8
-	.short	64
 	.byte	1
+	.byte	16
+	.short	256
 	.byte	2
-	.short	2048
-	.short	279
-	.byte	0
+	.byte	2
+	.short	1024
+	.short	281
+	.byte	1
 	.byte	0
 	.byte	24
 	.byte	32
-	.byte	1
+	.byte	4
 	.byte	0
-	.byte	1
+	.byte	3
 	.byte	0
 	.byte	0
 	.byte	0
 	.space	4
 	.byte	6
-	.byte	44
-	.byte	-36
-	.byte	-112
-	.byte	-90
-	.byte	84
-	.byte	0
-	.byte	4
-	.byte	1
-	.byte	8
-	.short	64
+	.byte	-83
+	.byte	-34
+	.byte	20
+	.byte	-89
+	.byte	66
+	.byte	74
+	.byte	2
 	.byte	1
+	.byte	32
+	.short	256
 	.byte	2
-	.short	1024
-	.short	279
-	.byte	0
-	.byte	0
-	.byte	24
+	.byte	2
+	.short	1060
+	.short	473
+	.byte	2
+	.byte	5
+	.byte	40
 	.byte	32
+	.byte	4
 	.byte	1
-	.byte	0
-	.byte	1
+	.byte	3
 	.byte	0
 	.byte	0
 	.byte	0
 	.space	4
-	.byte	5
-	.byte	44
-	.byte	100
-	.byte	100
-	.byte	84
-	.byte	-92
-	.byte	0
-	.byte	4
-	.byte	1
-	.byte	32
-	.short	512
+	.byte	6
+	.byte	-83
+	.byte	-41
+	.byte	20
+	.byte	-98
+	.byte	52
+	.byte	74
 	.byte	2
 	.byte	1
-	.short	1024
-	.short	479
-	.byte	4
-	.byte	18
-	.byte	60
+	.byte	16
+	.short	256
+	.byte	2
+	.byte	2
+	.short	1056
+	.short	473
+	.byte	2
+	.byte	5
+	.byte	40
 	.byte	32
+	.byte	4
 	.byte	1
-	.byte	0
-	.byte	1
+	.byte	3
 	.byte	0
 	.byte	0
 	.byte	0
 	.space	4
-	.byte	5
-	.byte	44
-	.byte	100
-	.byte	68
-	.byte	50
-	.byte	-91
-	.byte	0
-	.byte	4
+	.byte	6
+	.byte	-83
+	.byte	-34
+	.byte	-108
+	.byte	-89
+	.byte	66
+	.byte	72
+	.byte	2
 	.byte	1
 	.byte	32
-	.short	512
+	.short	256
+	.byte	2
+	.byte	2
+	.short	1060
+	.short	473
 	.byte	2
-	.byte	1
-	.short	1048
-	.short	1503
 	.byte	5
-	.byte	19
-	.byte	60
+	.byte	40
 	.byte	32
+	.byte	4
 	.byte	1
+	.byte	3
 	.byte	0
-	.byte	1
 	.byte	0
-	.byte	1
 	.byte	0
 	.space	4
-	.byte	5
-	.byte	44
-	.byte	100
-	.byte	100
-	.byte	60
-	.byte	-91
-	.byte	0
-	.byte	4
+	.byte	6
+	.byte	-83
+	.byte	-34
+	.byte	20
+	.byte	-85
+	.byte	66
+	.byte	74
+	.byte	2
 	.byte	1
 	.byte	32
-	.short	512
+	.short	256
 	.byte	2
-	.byte	1
-	.short	1044
-	.short	479
-	.byte	3
-	.byte	17
+	.byte	2
+	.short	1056
+	.short	473
+	.byte	2
+	.byte	6
 	.byte	40
 	.byte	32
+	.byte	3
 	.byte	1
-	.byte	0
-	.byte	1
+	.byte	3
 	.byte	0
 	.byte	0
 	.byte	0
 	.space	4
 	.byte	6
 	.byte	-83
-	.byte	-34
-	.byte	-108
-	.byte	-46
-	.byte	4
-	.byte	67
+	.byte	58
+	.byte	20
+	.byte	-85
+	.byte	66
+	.byte	74
 	.byte	2
 	.byte	1
-	.byte	16
+	.byte	32
 	.short	256
 	.byte	2
 	.byte	2
-	.short	2048
+	.short	2092
 	.short	473
-	.byte	1
-	.byte	1
-	.byte	24
+	.byte	2
+	.byte	5
+	.byte	40
 	.byte	32
-	.byte	4
-	.byte	0
+	.byte	3
+	.byte	1
 	.byte	3
 	.byte	0
 	.byte	0
@@ -23416,467 +23057,467 @@ NandFlashParaTbl:
 	.space	4
 	.byte	6
 	.byte	-83
-	.byte	-41
+	.byte	-43
 	.byte	-108
-	.byte	-38
+	.byte	-102
 	.byte	116
-	.byte	-61
+	.byte	66
 	.byte	2
 	.byte	1
 	.byte	16
 	.short	256
 	.byte	2
-	.byte	2
+	.byte	1
 	.short	1024
-	.short	473
+	.short	273
 	.byte	1
-	.byte	2
-	.byte	40
+	.byte	0
+	.byte	24
 	.byte	32
 	.byte	4
-	.byte	0
+	.byte	1
 	.byte	3
 	.byte	0
 	.byte	0
 	.byte	0
 	.space	4
 	.byte	6
-	.byte	-83
-	.byte	-41
-	.byte	-108
-	.byte	-111
-	.byte	96
+	.byte	-119
+	.byte	100
 	.byte	68
-	.byte	2
+	.byte	75
+	.byte	-87
+	.byte	0
+	.byte	7
 	.byte	1
 	.byte	16
 	.short	256
 	.byte	2
 	.byte	2
-	.short	1046
-	.short	473
-	.byte	1
+	.short	2048
+	.short	479
 	.byte	3
+	.byte	17
 	.byte	40
 	.byte	32
-	.byte	4
 	.byte	1
-	.byte	3
+	.byte	0
+	.byte	1
 	.byte	0
 	.byte	0
 	.byte	0
 	.space	4
 	.byte	6
-	.byte	-83
-	.byte	-34
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-	.byte	-38
-	.byte	116
-	.byte	-60
-	.byte	2
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+	.byte	36
+	.byte	75
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+	.byte	-124
+	.byte	7
 	.byte	1
 	.byte	16
 	.short	256
 	.byte	2
 	.byte	2
-	.short	2090
-	.short	473
-	.byte	1
-	.byte	4
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+	.byte	17
 	.byte	40
 	.byte	32
-	.byte	4
 	.byte	1
-	.byte	3
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+	.byte	1
 	.byte	0
 	.byte	0
 	.byte	0
 	.space	4
 	.byte	6
-	.byte	-83
-	.byte	-34
-	.byte	-108
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-	.byte	116
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-	.byte	2
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+	.byte	75
+	.byte	-87
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 	.byte	1
-	.byte	32
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 	.short	256
 	.byte	2
 	.byte	2
-	.short	1066
-	.short	473
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+	.short	279
 	.byte	1
-	.byte	7
-	.byte	40
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 	.byte	32
-	.byte	4
 	.byte	1
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 	.byte	0
 	.byte	0
 	.space	4
 	.byte	6
-	.byte	-83
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-	.byte	116
-	.byte	-60
-	.byte	2
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+	.byte	36
+	.byte	74
+	.byte	-87
+	.byte	0
+	.byte	7
 	.byte	1
-	.byte	16
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 	.short	256
 	.byte	2
 	.byte	2
-	.short	530
-	.short	473
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+	.short	279
 	.byte	1
-	.byte	3
-	.byte	40
+	.byte	0
+	.byte	24
 	.byte	32
-	.byte	4
 	.byte	1
-	.byte	3
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 	.byte	0
 	.byte	0
 	.byte	0
 	.space	4
 	.byte	6
-	.byte	-83
-	.byte	-41
-	.byte	-108
-	.byte	-102
-	.byte	116
-	.byte	66
-	.byte	2
+	.byte	-119
+	.byte	104
+	.byte	4
+	.byte	74
+	.byte	-87
+	.byte	0
+	.byte	7
 	.byte	1
-	.byte	16
+	.byte	8
 	.short	256
 	.byte	2
 	.byte	2
-	.short	1024
-	.short	281
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+	.short	279
 	.byte	1
 	.byte	0
 	.byte	24
 	.byte	32
-	.byte	4
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 	.byte	0
-	.byte	3
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 	.byte	0
 	.byte	0
 	.byte	0
 	.space	4
 	.byte	6
-	.byte	-83
-	.byte	-34
-	.byte	20
-	.byte	-89
-	.byte	66
-	.byte	74
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+	.byte	-41
+	.byte	-108
+	.byte	62
+	.byte	-124
+	.byte	0
+	.byte	7
 	.byte	1
-	.byte	32
+	.byte	8
 	.short	256
 	.byte	2
 	.byte	2
-	.short	1060
-	.short	473
-	.byte	2
-	.byte	5
-	.byte	40
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+	.short	279
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+	.byte	0
+	.byte	24
 	.byte	32
-	.byte	4
 	.byte	1
-	.byte	3
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 	.byte	0
 	.byte	0
 	.byte	0
 	.space	4
 	.byte	6
-	.byte	-83
-	.byte	-41
-	.byte	20
-	.byte	-98
-	.byte	52
-	.byte	74
-	.byte	2
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+	.byte	104
+	.byte	4
+	.byte	70
+	.byte	-87
+	.byte	0
+	.byte	7
 	.byte	1
-	.byte	16
+	.byte	8
 	.short	256
 	.byte	2
 	.byte	2
-	.short	1056
-	.short	473
-	.byte	2
-	.byte	5
-	.byte	40
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+	.short	279
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+	.byte	0
+	.byte	24
 	.byte	32
-	.byte	4
 	.byte	1
-	.byte	3
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 	.byte	0
 	.byte	0
 	.space	4
 	.byte	6
-	.byte	-83
-	.byte	-34
-	.byte	-108
-	.byte	-89
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-	.byte	72
-	.byte	2
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+	.byte	-124
+	.byte	-109
+	.byte	114
+	.byte	87
+	.byte	1
 	.byte	1
 	.byte	32
 	.short	256
 	.byte	2
-	.byte	2
+	.byte	1
 	.short	1060
-	.short	473
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 	.byte	2
-	.byte	5
+	.byte	33
 	.byte	40
 	.byte	32
-	.byte	4
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 	.byte	1
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 	.byte	0
 	.byte	0
 	.byte	0
 	.space	4
 	.byte	6
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 	.byte	-34
-	.byte	20
-	.byte	-85
-	.byte	66
-	.byte	74
-	.byte	2
+	.byte	-124
+	.byte	-109
+	.byte	114
+	.byte	87
+	.byte	1
 	.byte	1
 	.byte	32
 	.short	256
 	.byte	2
+	.byte	1
+	.short	2092
+	.short	1473
 	.byte	2
-	.short	1056
-	.short	473
-	.byte	2
-	.byte	6
+	.byte	33
 	.byte	40
 	.byte	32
-	.byte	3
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+	.byte	1
 	.byte	1
-	.byte	3
 	.byte	0
 	.byte	0
 	.byte	0
 	.space	4
 	.byte	6
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 	.byte	58
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-	.byte	-85
-	.byte	66
-	.byte	74
-	.byte	2
+	.byte	-123
+	.byte	-109
+	.byte	118
+	.byte	87
 	.byte	1
+	.byte	2
 	.byte	32
 	.short	256
 	.byte	2
-	.byte	2
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 	.short	2092
-	.short	473
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 	.byte	2
-	.byte	5
+	.byte	33
 	.byte	40
 	.byte	32
-	.byte	3
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+	.byte	1
 	.byte	1
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 	.byte	0
 	.byte	0
 	.byte	0
 	.space	4
 	.byte	6
-	.byte	-119
-	.byte	100
-	.byte	68
-	.byte	75
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+	.byte	50
+	.byte	114
+	.byte	86
+	.byte	1
 	.byte	1
 	.byte	16
-	.short	256
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 	.byte	2
+	.byte	1
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+	.short	1473
 	.byte	2
-	.short	2048
-	.short	479
-	.byte	3
-	.byte	17
+	.byte	33
 	.byte	40
 	.byte	32
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 	.byte	1
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 	.byte	1
 	.byte	0
 	.byte	0
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 	.space	4
 	.byte	6
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-	.byte	36
-	.byte	75
-	.byte	-87
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+	.byte	50
+	.byte	118
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+	.byte	1
 	.byte	1
 	.byte	16
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 	.byte	2
 	.byte	2
-	.short	2048
-	.short	479
-	.byte	3
-	.byte	17
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+	.byte	2
+	.byte	33
 	.byte	40
 	.byte	32
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 	.byte	1
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 	.byte	1
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 	.byte	6
-	.byte	-119
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-	.byte	36
-	.byte	75
-	.byte	-87
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+	.byte	-108
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+	.byte	118
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+	.byte	1
 	.byte	1
 	.byte	16
 	.short	256
 	.byte	2
 	.byte	2
-	.short	2048
-	.short	279
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+	.short	1489
 	.byte	1
-	.byte	0
-	.byte	24
+	.byte	33
+	.byte	40
 	.byte	32
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 	.byte	1
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 	.byte	1
 	.byte	0
 	.byte	0
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 	.space	4
 	.byte	6
-	.byte	-119
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-	.byte	36
-	.byte	74
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+	.byte	-108
+	.byte	-109
+	.byte	118
+	.byte	80
 	.byte	1
-	.byte	8
+	.byte	1
+	.byte	32
 	.short	256
 	.byte	2
 	.byte	2
-	.short	2048
-	.short	279
-	.byte	1
-	.byte	0
-	.byte	24
+	.short	1066
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+	.byte	2
+	.byte	34
+	.byte	40
 	.byte	32
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 	.byte	1
-	.byte	0
 	.byte	1
 	.byte	0
 	.byte	0
 	.byte	0
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 	.byte	6
-	.byte	-119
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-	.byte	4
-	.byte	74
-	.byte	-87
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+	.byte	-109
+	.byte	122
+	.byte	80
 	.byte	1
-	.byte	8
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+	.byte	32
 	.short	256
 	.byte	2
 	.byte	2
-	.short	2048
-	.short	279
-	.byte	1
-	.byte	0
-	.byte	24
+	.short	1066
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+	.byte	2
+	.byte	34
+	.byte	40
 	.byte	32
+	.byte	3
 	.byte	1
-	.byte	0
 	.byte	1
 	.byte	0
 	.byte	0
 	.byte	0
 	.space	4
 	.byte	6
-	.byte	-119
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 	.byte	-41
 	.byte	-108
-	.byte	62
-	.byte	-124
-	.byte	0
-	.byte	7
+	.byte	50
+	.byte	118
+	.byte	85
 	.byte	1
-	.byte	8
-	.short	256
+	.byte	1
+	.byte	16
+	.short	128
 	.byte	2
 	.byte	2
-	.short	2048
-	.short	279
-	.byte	1
+	.short	2050
+	.short	401
+	.byte	2
 	.byte	0
 	.byte	24
 	.byte	32
 	.byte	1
-	.byte	0
+	.byte	1
 	.byte	1
 	.byte	0
 	.byte	0
 	.byte	0
 	.space	4
 	.byte	6
-	.byte	-119
-	.byte	104
-	.byte	4
-	.byte	70
-	.byte	-87
-	.byte	0
-	.byte	7
+	.byte	-104
+	.byte	-34
+	.byte	-108
+	.byte	-109
+	.byte	118
+	.byte	87
 	.byte	1
-	.byte	8
+	.byte	1
+	.byte	32
 	.short	256
 	.byte	2
 	.byte	2
-	.short	2048
-	.short	279
-	.byte	1
-	.byte	0
-	.byte	24
+	.short	1058
+	.short	1497
+	.byte	2
+	.byte	33
+	.byte	40
 	.byte	32
+	.byte	3
 	.byte	1
-	.byte	0
 	.byte	1
 	.byte	0
 	.byte	0
@@ -23888,7 +23529,7 @@ NandFlashParaTbl:
 	.byte	-124
 	.byte	-109
 	.byte	114
-	.byte	87
+	.byte	80
 	.byte	1
 	.byte	1
 	.byte	32
@@ -23898,10 +23539,10 @@ NandFlashParaTbl:
 	.short	1060
 	.short	1473
 	.byte	2
-	.byte	33
+	.byte	34
 	.byte	40
 	.byte	32
-	.byte	2
+	.byte	3
 	.byte	1
 	.byte	1
 	.byte	0
@@ -23911,25 +23552,25 @@ NandFlashParaTbl:
 	.byte	6
 	.byte	-104
 	.byte	-34
-	.byte	-124
+	.byte	-108
 	.byte	-109
-	.byte	114
-	.byte	87
+	.byte	118
+	.byte	81
 	.byte	1
 	.byte	1
 	.byte	32
 	.short	256
 	.byte	2
-	.byte	1
-	.short	2092
-	.short	1473
 	.byte	2
-	.byte	33
+	.short	1074
+	.short	1497
+	.byte	2
+	.byte	35
 	.byte	40
 	.byte	32
-	.byte	2
-	.byte	1
+	.byte	3
 	.byte	1
+	.byte	4
 	.byte	0
 	.byte	0
 	.byte	0
@@ -23937,49 +23578,75 @@ NandFlashParaTbl:
 	.byte	6
 	.byte	-104
 	.byte	58
-	.byte	-123
+	.byte	-108
 	.byte	-109
 	.byte	118
-	.byte	87
+	.byte	81
+	.byte	1
 	.byte	1
-	.byte	2
 	.byte	32
 	.short	256
 	.byte	2
-	.byte	1
-	.short	2092
-	.short	1505
 	.byte	2
-	.byte	33
+	.short	2106
+	.short	1497
+	.byte	2
+	.byte	35
 	.byte	40
 	.byte	32
-	.byte	2
-	.byte	1
+	.byte	3
 	.byte	1
+	.byte	4
 	.byte	0
 	.byte	0
 	.byte	0
 	.space	4
 	.byte	6
 	.byte	-104
-	.byte	-43
+	.byte	-41
 	.byte	-124
-	.byte	50
+	.byte	-109
 	.byte	114
-	.byte	86
+	.byte	81
 	.byte	1
 	.byte	1
-	.byte	16
-	.short	128
+	.byte	32
+	.short	256
 	.byte	2
 	.byte	1
-	.short	2056
-	.short	1473
+	.short	1056
+	.short	1497
 	.byte	2
-	.byte	33
+	.byte	35
+	.byte	40
+	.byte	32
+	.byte	3
+	.byte	1
+	.byte	4
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	6
+	.byte	69
+	.byte	-34
+	.byte	-108
+	.byte	-109
+	.byte	118
+	.byte	87
+	.byte	8
+	.byte	1
+	.byte	32
+	.short	256
+	.byte	2
+	.byte	2
+	.short	1058
+	.short	1497
+	.byte	2
+	.byte	66
 	.byte	40
 	.byte	32
-	.byte	2
+	.byte	3
 	.byte	1
 	.byte	1
 	.byte	0
@@ -23987,22 +23654,22 @@ NandFlashParaTbl:
 	.byte	0
 	.space	4
 	.byte	6
-	.byte	-104
+	.byte	69
 	.byte	-41
-	.byte	-108
-	.byte	50
-	.byte	118
-	.byte	86
-	.byte	1
+	.byte	-124
+	.byte	-109
+	.byte	114
+	.byte	87
+	.byte	8
 	.byte	1
-	.byte	16
-	.short	128
-	.byte	2
+	.byte	32
+	.short	256
 	.byte	2
-	.short	2058
-	.short	1489
+	.byte	1
+	.short	1060
+	.short	1473
 	.byte	2
-	.byte	33
+	.byte	66
 	.byte	40
 	.byte	32
 	.byte	2
@@ -24013,25 +23680,25 @@ NandFlashParaTbl:
 	.byte	0
 	.space	4
 	.byte	6
-	.byte	-104
+	.byte	69
 	.byte	-34
-	.byte	-108
+	.byte	-92
 	.byte	-126
 	.byte	118
 	.byte	86
-	.byte	1
+	.byte	8
 	.byte	1
 	.byte	16
 	.short	256
 	.byte	2
 	.byte	2
-	.short	2062
-	.short	1489
+	.short	2082
+	.short	473
 	.byte	1
-	.byte	33
+	.byte	65
 	.byte	40
 	.byte	32
-	.byte	2
+	.byte	3
 	.byte	1
 	.byte	1
 	.byte	0
@@ -24039,13 +23706,13 @@ NandFlashParaTbl:
 	.byte	0
 	.space	4
 	.byte	6
-	.byte	-104
+	.byte	69
 	.byte	-34
 	.byte	-108
 	.byte	-109
 	.byte	118
 	.byte	80
-	.byte	1
+	.byte	8
 	.byte	1
 	.byte	32
 	.short	256
@@ -24054,7 +23721,7 @@ NandFlashParaTbl:
 	.short	1066
 	.short	1497
 	.byte	2
-	.byte	34
+	.byte	67
 	.byte	40
 	.byte	32
 	.byte	3
@@ -24065,22 +23732,22 @@ NandFlashParaTbl:
 	.byte	0
 	.space	4
 	.byte	6
-	.byte	-104
-	.byte	58
-	.byte	-107
+	.byte	69
+	.byte	-41
+	.byte	-124
 	.byte	-109
-	.byte	122
+	.byte	114
 	.byte	80
+	.byte	8
 	.byte	1
-	.byte	2
 	.byte	32
 	.short	256
 	.byte	2
+	.byte	1
+	.short	1060
+	.short	1473
 	.byte	2
-	.short	1066
-	.short	1497
-	.byte	2
-	.byte	34
+	.byte	67
 	.byte	40
 	.byte	32
 	.byte	3
@@ -24091,25 +23758,25 @@ NandFlashParaTbl:
 	.byte	0
 	.space	4
 	.byte	6
-	.byte	-104
-	.byte	-41
-	.byte	-108
-	.byte	50
+	.byte	69
+	.byte	-34
+	.byte	-92
+	.byte	-126
 	.byte	118
-	.byte	85
-	.byte	1
+	.byte	-41
+	.byte	8
 	.byte	1
 	.byte	16
-	.short	128
-	.byte	2
+	.short	256
 	.byte	2
-	.short	2050
-	.short	401
 	.byte	2
-	.byte	0
-	.byte	24
-	.byte	32
+	.short	2090
+	.short	1241
 	.byte	1
+	.byte	66
+	.byte	40
+	.byte	32
+	.byte	3
 	.byte	1
 	.byte	1
 	.byte	0
@@ -24117,22 +23784,22 @@ NandFlashParaTbl:
 	.byte	0
 	.space	4
 	.byte	6
-	.byte	-104
+	.byte	69
 	.byte	-34
-	.byte	-108
+	.byte	-124
 	.byte	-109
-	.byte	118
+	.byte	114
 	.byte	87
-	.byte	1
+	.byte	8
 	.byte	1
 	.byte	32
 	.short	256
 	.byte	2
+	.byte	1
+	.short	2092
+	.short	1473
 	.byte	2
-	.short	1058
-	.short	1497
-	.byte	2
-	.byte	33
+	.byte	66
 	.byte	40
 	.byte	32
 	.byte	3
@@ -24143,48 +23810,48 @@ NandFlashParaTbl:
 	.byte	0
 	.space	4
 	.byte	6
-	.byte	-104
-	.byte	-41
-	.byte	-124
+	.byte	69
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 	.byte	0
-	.byte	2
-	.byte	16
-	.short	128
-	.byte	2
-	.byte	2
-	.short	2076
-	.short	441
-	.byte	2
 	.byte	0
-	.byte	40
-	.byte	36
-	.byte	3
-	.byte	1
-	.byte	3
+	.space	4
+	.section	.data.power_up_flag,"aw",%progbits
+	.align	2
+	.type	power_up_flag, %object
+	.size	power_up_flag, 4
+power_up_flag:
+	.word	1
+	.section	.data.random_seed,"aw",%progbits
+	.align	1
+	.set	.LANCHOR4,. + 0
+	.type	random_seed, %object
+	.size	random_seed, 256
+random_seed:
+	.short	22378
+	.short	1512
+	.short	25245
+	.short	17827
+	.short	25756
+	.short	19440
+	.short	9026
+	.short	10030
+	.short	29528
+	.short	20467
+	.short	29676
+	.short	24432
+	.short	31328
+	.short	6872
+	.short	13426
+	.short	13842
+	.short	8783
+	.short	1108
+	.short	782
+	.short	28837
+	.short	30729
+	.short	9505
+	.short	18676
+	.short	23085
+	.short	18730
+	.short	1085
+	.short	32609
+	.short	14697
+	.short	20858
+	.short	15170
+	.short	30365
+	.short	1607
+	.short	32298
+	.short	4995
+	.short	18905
+	.short	1976
+	.short	9592
+	.short	20204
+	.short	17443
+	.short	13615
+	.short	23330
+	.short	29369
+	.short	13947
+	.short	9398
+	.short	32398
+	.short	8984
+	.short	27600
+	.short	21785
+	.short	6019
+	.short	6311
+	.short	31598
+	.short	30210
+	.short	19327
+	.short	13896
+	.short	11347
+	.short	27545
+	.short	3107
+	.short	26575
+	.short	32270
+	.short	19852
+	.short	20601
+	.short	8349
+	.short	9290
+	.short	29819
+	.short	13579
+	.short	3661
+	.short	28676
+	.short	27331
+	.short	32574
+	.short	8693
+	.short	31253
+	.short	9081
+	.short	5399
+	.short	6842
+	.short	20087
+	.short	5537
+	.short	1274
+	.short	11617
+	.short	9530
+	.short	4866
+	.short	8035
+	.short	23219
+	.short	1178
+	.short	23272
+	.short	7383
+	.short	18944
+	.short	12488
+	.short	12871
+	.short	29340
+	.short	20532
+	.short	11022
+	.short	22514
+	.short	228
+	.short	22363
+	.short	24978
+	.short	14584
+	.short	12138
+	.short	3092
+	.short	17916
+	.short	16863
+	.short	14554
+	.short	31457
+	.short	29474
+	.short	25311
+	.short	24121
+	.short	3684
+	.short	28037
+	.short	22865
+	.short	22839
+	.short	25217
+	.short	13217
+	.short	27186
+	.short	14938
+	.short	11180
+	.short	29754
+	.short	24180
+	.short	15150
+	.short	32455
+	.short	20434
+	.short	23848
+	.short	29983
+	.short	16120
+	.short	14769
+	.short	20041
+	.short	29803
+	.short	28406
+	.short	17598
+	.short	28087
+	.section	.data.refValueDefault,"aw",%progbits
+	.set	.LANCHOR193,. + 0
+	.type	refValueDefault, %object
+	.size	refValueDefault, 28
+refValueDefault:
 	.byte	0
 	.byte	0
 	.byte	0
-	.space	4
-	.byte	6
-	.byte	-20
-	.byte	-43
-	.byte	-108
-	.byte	118
-	.byte	84
-	.byte	67
 	.byte	0
-	.byte	1
-	.byte	16
-	.short	128
-	.byte	2
-	.byte	2
-	.short	1038
-	.short	281
-	.byte	2
 	.byte	0
-	.byte	24
-	.byte	36
-	.byte	3
-	.byte	1
-	.byte	3
+	.byte	6
+	.byte	10
+	.byte	6
 	.byte	0
+	.byte	-3
+	.byte	-7
+	.byte	-8
 	.byte	0
+	.byte	-6
+	.byte	-13
+	.byte	-15
 	.byte	0
-	.space	4
-	.byte	6
+	.byte	-11
 	.byte	-20
-	.byte	-41
-	.byte	20
-	.byte	118
-	.byte	84
-	.byte	-62
-	.byte	0
-	.byte	1
-	.byte	16
-	.short	128
-	.byte	2
-	.byte	2
-	.short	2076
-	.short	1169
-	.byte	2
+	.byte	-23
 	.byte	0
-	.byte	24
-	.byte	40
-	.byte	3
-	.byte	1
-	.byte	3
 	.byte	0
+	.byte	-26
+	.byte	-30
 	.byte	0
 	.byte	0
-	.space	4
-	.section	.rodata.__func__.7736,"a",%progbits
-.LANCHOR212 = . + 0
-	.type	__func__.7736, %object
-	.size	__func__.7736, 15
-__func__.7736:
+	.byte	-32
+	.byte	-37
+	.section	.rodata.FlashDdrTunningRead.str1.1,"aMS",%progbits,1
+.LC8:
+	.ascii	"sdr read ok %x ecc=%d\012\000"
+.LC9:
+	.ascii	"sync para %d\012\000"
+.LC10:
+	.ascii	"TOG mode Read error %x %x\012\000"
+	.section	.rodata.FlashEraseSLc2KBlocks.str1.1,"aMS",%progbits,1
+.LC1:
+	.ascii	"FlashEraseBlocks pageAddr error %x\012\000"
+	.section	.rodata.FlashInit.str1.1,"aMS",%progbits,1
+.LC18:
+	.ascii	"No.%d FLASH ID:%x %x %x %x %x %x\012\000"
+.LC19:
+	.ascii	"FlashLoadPhyInfo fail %x!!\012\000"
+	.section	.rodata.FlashProgSlc2KPages.str1.1,"aMS",%progbits,1
+.LC24:
+	.ascii	"prog error: = %x\012\000"
+.LC25:
+	.ascii	"prog read error: = %x\012\000"
+.LC26:
+	.ascii	"prog read s error: = %x %x %x\012\000"
+.LC27:
+	.ascii	"prog read d error: = %x %x %x\012\000"
+	.section	.rodata.FlashReadFacBbtData.str1.1,"aMS",%progbits,1
+.LC55:
+	.ascii	"BBT:\000"
+	.section	.rodata.FlashReadIdbDataRaw.str1.1,"aMS",%progbits,1
+.LC12:
+	.ascii	"ECC:%d\012\000"
+	.section	.rodata.FlashReadPage.str1.1,"aMS",%progbits,1
+.LC11:
+	.ascii	"read retry status %x %x %x\012\000"
+	.section	.rodata.FlashReadPages.str1.1,"aMS",%progbits,1
+.LC23:
+	.ascii	"ReadRetry pageadd=%x ecc=%x err=%x\012\000"
+	.section	.rodata.FlashReadSlc2KPages.str1.1,"aMS",%progbits,1
+.LC20:
+	.ascii	"Read pageadd=%x  ecc=%x err=%x\012\000"
+.LC21:
+	.ascii	"data:\000"
+.LC22:
+	.ascii	"spare:\000"
+	.section	.rodata.FtlBbmMapBadBlock.str1.1,"aMS",%progbits,1
+.LC2:
+	.ascii	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\012"
+	.ascii	"\000"
+	.section	.rodata.FtlBbmTblFlush.str1.1,"aMS",%progbits,1
+.LC28:
+	.ascii	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\012\000"
+.LC29:
+	.ascii	"FtlBbmTblFlush error:%x\012\000"
+.LC30:
+	.ascii	"FtlBbmTblFlush error = %x error count = %d\012\000"
+	.section	.rodata.FtlGcFreeTempBlock.str1.1,"aMS",%progbits,1
+.LC47:
+	.ascii	"GC des block %x done\012\000"
+	.section	.rodata.FtlGcScanTempBlk.str1.1,"aMS",%progbits,1
+.LC46:
+	.ascii	"FtlGcScanTempBlkError ID %x %x!!!!!!!\012\000"
+	.section	.rodata.FtlInit.str1.1,"aMS",%progbits,1
+.LC48:
+	.ascii	"FTL version: 5.0.47 20171221\000"
+.LC49:
+	.ascii	"...%s: no bad block mapping table, format device\012"
+	.ascii	"\000"
+.LC50:
+	.ascii	"...%s FtlSysBlkInit error ,format device!\012\000"
+	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",%progbits,1
+.LC40:
+	.ascii	"no ect\000"
+	.section	.rodata.FtlMapTblRecovery.str1.1,"aMS",%progbits,1
+.LC42:
+	.ascii	"page map lost %x %x %x %x\012\000"
+	.section	.rodata.FtlMapWritePage.str1.1,"aMS",%progbits,1
+.LC35:
+	.ascii	"FtlMapWritePage error = %x\012\000"
+.LC36:
+	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
+	.section	.rodata.FtlProgPages.str1.1,"aMS",%progbits,1
+.LC38:
+	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
+	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",%progbits,1
+.LC43:
+	.ascii	"RSB refresh addr %x\012\000"
+.LC44:
+	.ascii	"spuer block %x vpn is 0\012 \000"
+.LC45:
+	.ascii	"g_recovery_ppa %x ver %x\012 \000"
+	.section	.rodata.FtlVendorPartRead.str1.1,"aMS",%progbits,1
+.LC39:
+	.ascii	"FtlVendorPartRead refresh = %x phyAddr = %x\012\000"
+	.section	.rodata.FtlVpcTblFlush.str1.1,"aMS",%progbits,1
+.LC32:
+	.ascii	"FtlVpcTblFlush error = %x error count = %d\012\000"
+	.section	.rodata.Ftl_load_ext_data.str1.1,"aMS",%progbits,1
+.LC41:
+	.ascii	"slc mode\000"
+	.section	.rodata.HynixGetReadRetryDefault.str1.1,"aMS",%progbits,1
+.LC16:
+	.ascii	"otp error! %d\000"
+.LC17:
+	.ascii	"rr\000"
+	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",%progbits,1
+.LC4:
+	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
+.LC5:
+	.ascii	"!!!!! FTL sys Error !!!!!\000"
+.LC6:
+	.ascii	"%s\012\000"
+	.section	.rodata.MicronReadRetrial.str1.1,"aMS",%progbits,1
+.LC7:
+	.ascii	"micron RR %d row=%x,count %d,status=%d\012\000"
+	.section	.rodata.__func__.10400,"a",%progbits
+	.set	.LANCHOR240,. + 0
+	.type	__func__.10400, %object
+	.size	__func__.10400, 8
+__func__.10400:
+	.ascii	"FtlInit\000"
+	.section	.rodata.__func__.10460,"a",%progbits
+	.set	.LANCHOR220,. + 0
+	.type	__func__.10460, %object
+	.size	__func__.10460, 13
+__func__.10460:
+	.ascii	"FtlProgPages\000"
+	.section	.rodata.__func__.10486,"a",%progbits
+	.set	.LANCHOR242,. + 0
+	.type	__func__.10486, %object
+	.size	__func__.10486, 10
+__func__.10486:
+	.ascii	"ftl_write\000"
+	.section	.rodata.__func__.10549,"a",%progbits
+	.set	.LANCHOR121,. + 0
+	.type	__func__.10549, %object
+	.size	__func__.10549, 14
+__func__.10549:
+	.ascii	"FtlBbt2Bitmap\000"
+	.section	.rodata.__func__.10595,"a",%progbits
+	.set	.LANCHOR208,. + 0
+	.type	__func__.10595, %object
+	.size	__func__.10595, 11
+__func__.10595:
+	.ascii	"FtlLoadBbt\000"
+	.section	.rodata.__func__.10704,"a",%progbits
+	.set	.LANCHOR88,. + 0
+	.type	__func__.10704, %object
+	.size	__func__.10704, 17
+__func__.10704:
+	.ascii	"INSERT_FREE_LIST\000"
+	.section	.rodata.__func__.10708,"a",%progbits
+	.set	.LANCHOR85,. + 0
+	.type	__func__.10708, %object
+	.size	__func__.10708, 17
+__func__.10708:
+	.ascii	"INSERT_DATA_LIST\000"
+	.section	.rodata.__func__.10738,"a",%progbits
+	.set	.LANCHOR89,. + 0
+	.type	__func__.10738, %object
+	.size	__func__.10738, 17
+__func__.10738:
+	.ascii	"List_remove_node\000"
+	.section	.rodata.__func__.10768,"a",%progbits
+	.set	.LANCHOR93,. + 0
+	.type	__func__.10768, %object
+	.size	__func__.10768, 22
+__func__.10768:
+	.ascii	"List_update_data_list\000"
+	.section	.rodata.__func__.10775,"a",%progbits
+	.set	.LANCHOR212,. + 0
+	.type	__func__.10775, %object
+	.size	__func__.10775, 16
+__func__.10775:
+	.ascii	"load_l2p_region\000"
+	.section	.rodata.__func__.10805,"a",%progbits
+	.set	.LANCHOR94,. + 0
+	.type	__func__.10805, %object
+	.size	__func__.10805, 26
+__func__.10805:
+	.ascii	"ftl_map_blk_alloc_new_blk\000"
+	.section	.rodata.__func__.10819,"a",%progbits
+	.set	.LANCHOR209,. + 0
+	.type	__func__.10819, %object
+	.size	__func__.10819, 15
+__func__.10819:
 	.ascii	"ftl_map_blk_gc\000"
-	.section	.bss.c_ftl_nand_page_pre_blk,"aw",%nobits
-	.align	1
-.LANCHOR56 = . + 0
-	.type	c_ftl_nand_page_pre_blk, %object
-	.size	c_ftl_nand_page_pre_blk, 2
-c_ftl_nand_page_pre_blk:
-	.space	2
-	.section	.bss.g_totle_map_block,"aw",%nobits
-	.align	1
-.LANCHOR111 = . + 0
-	.type	g_totle_map_block, %object
-	.size	g_totle_map_block, 2
-g_totle_map_block:
-	.space	2
-	.section	.bss.DeviceCapacity,"aw",%nobits
-	.align	2
-.LANCHOR64 = . + 0
-	.type	DeviceCapacity, %object
-	.size	DeviceCapacity, 4
-DeviceCapacity:
-	.space	4
-	.section	.bss.gp_ect_tbl_info,"aw",%nobits
-	.align	2
-.LANCHOR187 = . + 0
-	.type	gp_ect_tbl_info, %object
-	.size	gp_ect_tbl_info, 4
-gp_ect_tbl_info:
-	.space	4
-	.section	.bss.c_ftl_nand_map_blks_per_plane,"aw",%nobits
-	.align	1
-.LANCHOR67 = . + 0
-	.type	c_ftl_nand_map_blks_per_plane, %object
-	.size	c_ftl_nand_map_blks_per_plane, 2
-c_ftl_nand_map_blks_per_plane:
-	.space	2
-	.section	.bss.p_l2p_map_buf,"aw",%nobits
-	.align	2
-.LANCHOR109 = . + 0
-	.type	p_l2p_map_buf, %object
-	.size	p_l2p_map_buf, 4
-p_l2p_map_buf:
-	.space	4
-	.section	.bss.g_recovery_page_min_ver,"aw",%nobits
-	.align	2
-.LANCHOR129 = . + 0
-	.type	g_recovery_page_min_ver, %object
-	.size	g_recovery_page_min_ver, 4
-g_recovery_page_min_ver:
-	.space	4
-	.section	.bss.g_active_superblock,"aw",%nobits
-	.align	2
-.LANCHOR97 = . + 0
-	.type	g_active_superblock, %object
-	.size	g_active_superblock, 48
-g_active_superblock:
-	.space	48
-	.section	.bss.g_gc_bad_block_temp_num,"aw",%nobits
-	.align	1
-.LANCHOR139 = . + 0
-	.type	g_gc_bad_block_temp_num, %object
-	.size	g_gc_bad_block_temp_num, 2
-g_gc_bad_block_temp_num:
-	.space	2
+	.section	.rodata.__func__.10832,"a",%progbits
+	.set	.LANCHOR210,. + 0
+	.type	__func__.10832, %object
+	.size	__func__.10832, 31
+__func__.10832:
+	.ascii	"Ftl_write_map_blk_to_last_page\000"
+	.section	.rodata.__func__.10845,"a",%progbits
+	.set	.LANCHOR211,. + 0
+	.type	__func__.10845, %object
+	.size	__func__.10845, 16
+__func__.10845:
+	.ascii	"FtlMapWritePage\000"
+	.section	.rodata.__func__.10865,"a",%progbits
+	.set	.LANCHOR97,. + 0
+	.type	__func__.10865, %object
+	.size	__func__.10865, 22
+__func__.10865:
+	.ascii	"select_l2p_ram_region\000"
+	.section	.rodata.__func__.10881,"a",%progbits
+	.set	.LANCHOR213,. + 0
+	.type	__func__.10881, %object
+	.size	__func__.10881, 9
+__func__.10881:
+	.ascii	"log2phys\000"
+	.section	.rodata.__func__.10943,"a",%progbits
+	.set	.LANCHOR207,. + 0
+	.type	__func__.10943, %object
+	.size	__func__.10943, 15
+__func__.10943:
+	.ascii	"FtlVpcTblFlush\000"
+	.section	.rodata.__func__.10962,"a",%progbits
+	.set	.LANCHOR224,. + 0
+	.type	__func__.10962, %object
+	.size	__func__.10962, 14
+__func__.10962:
+	.ascii	"FtlScanSysBlk\000"
+	.section	.rodata.__func__.11016,"a",%progbits
+	.set	.LANCHOR225,. + 0
+	.type	__func__.11016, %object
+	.size	__func__.11016, 15
+__func__.11016:
+	.ascii	"FtlLoadSysInfo\000"
+	.section	.rodata.__func__.11085,"a",%progbits
+	.set	.LANCHOR214,. + 0
+	.type	__func__.11085, %object
+	.size	__func__.11085, 16
+__func__.11085:
+	.ascii	"FtlReUsePrevPpa\000"
+	.section	.rodata.__func__.11118,"a",%progbits
+	.set	.LANCHOR228,. + 0
+	.type	__func__.11118, %object
+	.size	__func__.11118, 22
+__func__.11118:
+	.ascii	"FtlRecoverySuperblock\000"
+	.section	.rodata.__func__.11172,"a",%progbits
+	.set	.LANCHOR100,. + 0
+	.type	__func__.11172, %object
+	.size	__func__.11172, 16
+__func__.11172:
+	.ascii	"make_superblock\000"
+	.section	.rodata.__func__.11192,"a",%progbits
+	.set	.LANCHOR138,. + 0
+	.type	__func__.11192, %object
+	.size	__func__.11192, 18
+__func__.11192:
+	.ascii	"SupperBlkListInit\000"
+	.section	.rodata.__func__.11269,"a",%progbits
+	.set	.LANCHOR200,. + 0
+	.type	__func__.11269, %object
+	.size	__func__.11269, 25
+__func__.11269:
+	.ascii	"allocate_data_superblock\000"
+	.section	.rodata.__func__.11283,"a",%progbits
+	.set	.LANCHOR219,. + 0
+	.type	__func__.11283, %object
+	.size	__func__.11283, 29
+__func__.11283:
+	.ascii	"allocate_new_data_superblock\000"
+	.section	.rodata.__func__.11289,"a",%progbits
+	.set	.LANCHOR205,. + 0
+	.type	__func__.11289, %object
+	.size	__func__.11289, 19
+__func__.11289:
+	.ascii	"get_new_active_ppa\000"
+	.section	.rodata.__func__.11300,"a",%progbits
+	.set	.LANCHOR203,. + 0
+	.type	__func__.11300, %object
+	.size	__func__.11300, 16
+__func__.11300:
+	.ascii	"update_vpc_list\000"
+	.section	.rodata.__func__.11305,"a",%progbits
+	.set	.LANCHOR204,. + 0
+	.type	__func__.11305, %object
+	.size	__func__.11305, 20
+__func__.11305:
+	.ascii	"decrement_vpc_count\000"
+	.section	.rodata.__func__.11373,"a",%progbits
+	.set	.LANCHOR234,. + 0
+	.type	__func__.11373, %object
+	.size	__func__.11373, 19
+__func__.11373:
+	.ascii	"FtlGcFreeTempBlock\000"
+	.section	.rodata.__func__.11467,"a",%progbits
+	.set	.LANCHOR238,. + 0
+	.type	__func__.11467, %object
+	.size	__func__.11467, 23
+__func__.11467:
+	.ascii	"rk_ftl_garbage_collect\000"
+	.section	.rodata.decrement_vpc_count.str1.1,"aMS",%progbits,1
+.LC31:
+	.ascii	"decrement_vpc_count %x = %d\012\000"
+	.section	.rodata.ftl_fix_nand_power_lost_error.str1.1,"aMS",%progbits,1
+.LC52:
+	.ascii	"fix power lost blk = %x vpc=%x\012\000"
+.LC53:
+	.ascii	"erase power lost blk = %x vpc=%x\012\000"
+	.section	.rodata.ftl_map_blk_gc.str1.1,"aMS",%progbits,1
+.LC33:
+	.ascii	"ftl_map_blk_gc blk info: %x %x %x\012\000"
+.LC34:
+	.ascii	"page map lost: %x %x\012\000"
+	.section	.rodata.ftl_write.str1.1,"aMS",%progbits,1
+.LC54:
+	.ascii	"FtlWrite: lpa error:%x %x\012\000"
+	.section	.rodata.load_l2p_region.str1.1,"aMS",%progbits,1
+.LC37:
+	.ascii	"load_l2p_region refresh = %x phyAddr = %x\012\000"
+	.section	.rodata.remove_from_free_sys_Queue.str1.1,"aMS",%progbits,1
+.LC3:
+	.ascii	"remove_from_free_sys_Queue %x\012\000"
+	.section	.rodata.rk_ftl_init.str1.1,"aMS",%progbits,1
+.LC51:
+	.ascii	"FtlInit %x\012\000"
+	.section	.rodata.rknand_print_hex.str1.1,"aMS",%progbits,1
+.LC13:
+	.ascii	"%s 0x%x:\000"
+.LC14:
+	.ascii	"%x \000"
+.LC15:
+	.ascii	"\000"
 	.hidden	free

commit 01051eec89b116c8f37928937600b81d2ec87b23
Author: Wu Liangqing <wlq@rock-chips.com>
Date:   Sat Feb 3 09:45:07 2018 +0800

    add .gitignore to ignore /rockdev *.img
    
    Change-Id: Id9e8cbd62e9122f09548b8aedd5c5ee64405d3bc
    Signed-off-by: Wu Liangqing <wlq@rock-chips.com>

diff --git a/.gitignore b/.gitignore
index 29757aa51e..995a023cca 100644
--- a/.gitignore
+++ b/.gitignore
@@ -20,13 +20,14 @@
 *.bin
 *.patch
 *.cfgtmp
+*.img
 
 # host programs on Cygwin
 *.exe
 
 # Build tree
 /build-*
-
+/rockdev
 #
 # Top-level generic files
 #

commit c4238552ff4f71f29df73baaccfbc3c63f5aba41
Author: Zhaoyifeng <zyf@rock-chips.com>
Date:   Mon Feb 5 09:45:57 2018 +0800

    driver: rknand: change to use dev_read_addr_ptr
    
    Change-Id: I41358d2f91238ca5100fc50c1c410cdf314cb3fd
    Signed-off-by: Zhaoyifeng <zyf@rock-chips.com>

diff --git a/drivers/rknand/rknand.c b/drivers/rknand/rknand.c
index 44fa20e1f5..533e25ab13 100644
--- a/drivers/rknand/rknand.c
+++ b/drivers/rknand/rknand.c
@@ -155,7 +155,7 @@ static int rockchip_nand_probe(struct udevice *udev)
 	int ret;
 	struct rknand_dev *ndev = dev_get_priv(udev);
 
-	ndev->ioaddr = (void *)devfdt_get_addr(udev);
+	ndev->ioaddr = dev_read_addr_ptr(udev);
 	ret = rk_ftl_init(ndev->ioaddr);
 	if (!ret) {
 		ndev->density = ftl_get_density(0);

commit 448a4b3860f22b6b5bc62fb95c92c2467abfbdcf
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 22 15:14:22 2018 +0800

    rockchip: px30: add evb_px30 board support
    
    PX30 is a rockchip evb for px30, including all harware interface
    from px30.
    
    Change-Id: I5bac5a7ebf23b5c51b3a01f51fe0404db0a1b5fc
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index cbab46e388..9e55d01bd0 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -385,6 +385,7 @@ config GICV2
 config GICV3
 	bool "ARM GICv3"
 
+source "arch/arm/mach-rockchip/px30/Kconfig"
 source "arch/arm/mach-rockchip/rk3036/Kconfig"
 source "arch/arm/mach-rockchip/rk3066/Kconfig"
 source "arch/arm/mach-rockchip/rk3128/Kconfig"
diff --git a/arch/arm/mach-rockchip/px30/Kconfig b/arch/arm/mach-rockchip/px30/Kconfig
new file mode 100644
index 0000000000..72587c7f4a
--- /dev/null
+++ b/arch/arm/mach-rockchip/px30/Kconfig
@@ -0,0 +1,18 @@
+if ROCKCHIP_PX30
+
+config TARGET_EVB_PX30
+	bool "EVB_PX30"
+	select BOARD_LATE_INIT
+
+config SYS_SOC
+	default "rockchip"
+
+config SYS_MALLOC_F_LEN
+	default 0x400
+
+config SPL_SERIAL_SUPPORT
+	default y
+
+source "board/rockchip/evb_px30/Kconfig"
+
+endif
diff --git a/board/rockchip/evb_px30/Kconfig b/board/rockchip/evb_px30/Kconfig
new file mode 100644
index 0000000000..0042c8e4db
--- /dev/null
+++ b/board/rockchip/evb_px30/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_EVB_PX30
+
+config SYS_BOARD
+	default "evb_px30"
+
+config SYS_VENDOR
+	default "rockchip"
+
+config SYS_CONFIG_NAME
+	default "evb_px30"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+
+endif
diff --git a/board/rockchip/evb_px30/MAINTAINERS b/board/rockchip/evb_px30/MAINTAINERS
new file mode 100644
index 0000000000..cf13f2419e
--- /dev/null
+++ b/board/rockchip/evb_px30/MAINTAINERS
@@ -0,0 +1,6 @@
+EVB-PX30
+M:      Kever Yang <kever.yang@rock-chips.com>
+S:      Maintained
+F:      board/rockchip/evb_px30
+F:      include/configs/evb_px30.h
+F:      configs/evb-px30_defconfig
diff --git a/board/rockchip/evb_px30/Makefile b/board/rockchip/evb_px30/Makefile
new file mode 100644
index 0000000000..74b0b9f44f
--- /dev/null
+++ b/board/rockchip/evb_px30/Makefile
@@ -0,0 +1,7 @@
+#
+# (C) Copyright 2017 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y	+= evb_px30.o
diff --git a/board/rockchip/evb_px30/evb_px30.c b/board/rockchip/evb_px30/evb_px30.c
new file mode 100644
index 0000000000..ffd78b016c
--- /dev/null
+++ b/board/rockchip/evb_px30/evb_px30.c
@@ -0,0 +1,11 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <asm/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
new file mode 100644
index 0000000000..39799afb56
--- /dev/null
+++ b/configs/evb-px30_defconfig
@@ -0,0 +1,74 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_ROCKCHIP_RESOURCE_IMAGE=y
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_RKPARM_PARTITION=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
+CONFIG_ROCKCHIP_PX30=y
+CONFIG_TARGET_EVB_PX30=y
+CONFIG_TPL_SERIAL_PRESENT=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
+CONFIG_DEFAULT_DEVICE_TREE="px30-evb"
+CONFIG_DEBUG_UART=y
+# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_TPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_ATF_SUPPORT=y
+CONFIG_TPL=y
+CONFIG_TPL_BOOTROM_SUPPORT=y
+CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_TPL_SERIAL_PRESENT=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_TPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_TPL_OF_PLATDATA=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_TPL_DM=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_TPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_TPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
+CONFIG_BOOTDELAY=0
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0xFF160000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_SYS_NS16550=y
+CONFIG_SYSRESET=y
+CONFIG_SPL_SYSRESET=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
diff --git a/include/configs/evb_px30.h b/include/configs/evb_px30.h
new file mode 100644
index 0000000000..836f60f546
--- /dev/null
+++ b/include/configs/evb_px30.h
@@ -0,0 +1,20 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __EVB_PX30_H
+#define __EVB_PX30_H
+
+#include <configs/px30_common.h>
+
+#define CONFIG_SYS_MMC_ENV_DEV 0
+
+
+#define CONFIG_CONSOLE_SCROLL_LINES		10
+
+#undef CONFIG_BOOTCOMMAND
+#define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
+
+#endif

commit 744ba6c65f7b18b46fd89eea5396d1eda5c7f7ec
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 22 15:16:20 2018 +0800

    rockchip: dts: px30: add px30-evb dts
    
    Add the dts and header file from kernel.
    
    Change-Id: Iafd91528deffd14f5b59cc3d7cabe9d0dbb576d5
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/px30-evb.dts b/arch/arm/dts/px30-evb.dts
new file mode 100644
index 0000000000..d08a19d680
--- /dev/null
+++ b/arch/arm/dts/px30-evb.dts
@@ -0,0 +1,39 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+/dts-v1/;
+#include "px30.dtsi"
+#include "px30-u-boot.dtsi"
+
+/ {
+	model = "Rockchip PX30 EVB";
+	compatible = "rockchip,px30-evb", "rockchip,px30";
+
+	chosen {
+		stdout-path = &uart2;
+	};
+
+	dmc: dmc@20004000 {
+		u-boot,dm-pre-reloc;
+		compatible = "rockchip,px30-dmc", "syscon";
+		reg = <0x0 0xff2a0000 0x0 0x1000>;
+	};
+};
+
+
+&emmc {
+	u-boot,dm-pre-reloc;
+	fifo-mode;
+	bus-width = <8>;
+	cap-mmc-highspeed;
+	supports-emmc;
+	disable-wp;
+	non-removable;
+	num-slots = <1>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
+	status = "okay";
+};
diff --git a/arch/arm/dts/px30-u-boot.dtsi b/arch/arm/dts/px30-u-boot.dtsi
new file mode 100644
index 0000000000..1ece341901
--- /dev/null
+++ b/arch/arm/dts/px30-u-boot.dtsi
@@ -0,0 +1,16 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+
+&uart2 {
+	clock-frequency = <24000000>;
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&emmc {
+	u-boot,dm-pre-reloc;
+};
\ No newline at end of file
diff --git a/arch/arm/dts/px30.dtsi b/arch/arm/dts/px30.dtsi
new file mode 100644
index 0000000000..560d3eebfe
--- /dev/null
+++ b/arch/arm/dts/px30.dtsi
@@ -0,0 +1,2251 @@
+/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+#include <dt-bindings/clock/px30-cru.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/power/px30-power.h>
+#include <dt-bindings/soc/rockchip,boot-mode.h>
+
+/ {
+	compatible = "rockchip,px30";
+
+	interrupt-parent = <&gic>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	aliases {
+		serial0 = &uart0;
+		serial1 = &uart1;
+		serial2 = &uart2;
+		i2c0 = &i2c0;
+		i2c1 = &i2c1;
+		i2c2 = &i2c2;
+		i2c3 = &i2c3;
+	};
+
+	cpus {
+		#address-cells = <2>;
+		#size-cells = <0>;
+
+		cpu0: cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a35", "arm,armv8";
+			reg = <0x0 0x0>;
+			enable-method = "psci";
+		};
+
+		cpu1: cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a35", "arm,armv8";
+			reg = <0x0 0x1>;
+			enable-method = "psci";
+		};
+		cpu2: cpu@2 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a35", "arm,armv8";
+			reg = <0x0 0x2>;
+			enable-method = "psci";
+		};
+		cpu3: cpu@3 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a35", "arm,armv8";
+			reg = <0x0 0x3>;
+			enable-method = "psci";
+		};
+	};
+
+	arm-pmu {
+		compatible = "arm,cortex-a53-pmu";
+		interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
+	};
+
+	display_subsystem: display-subsystem {
+		compatible = "rockchip,display-subsystem";
+		ports = <&vopb_out>, <&vopl_out>;
+		status = "disabled";
+	};
+
+	firmware {
+		optee {
+			compatible = "linaro,optee-tz";
+			method = "smc";
+		};
+	};
+
+	psci {
+		compatible = "arm,psci-1.0";
+		method = "smc";
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+	};
+
+	xin24m: xin24m {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <24000000>;
+		clock-output-names = "xin24m";
+	};
+
+	pmu: power-management@ff000000 {
+		compatible = "rockchip,px30-pmu", "syscon", "simple-mfd";
+		reg = <0x0 0xff000000 0x0 0x1000>;
+
+		power: power-controller {
+			compatible = "rockchip,px30-power-controller";
+			#power-domain-cells = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+
+			/* These power domains are grouped by VD_LOGIC */
+			pd_usb@PX30_PD_USB {
+				reg = <PX30_PD_USB>;
+				clocks = <&cru HCLK_HOST>,
+					 <&cru HCLK_OTG>,
+					 <&cru SCLK_OTG_ADP>;
+			};
+			pd_sdcard@PX30_PD_SDCARD {
+				reg = <PX30_PD_SDCARD>;
+				clocks = <&cru HCLK_SDMMC>,
+					 <&cru SCLK_SDMMC>;
+			};
+			pd_gmac@PX30_PD_GMAC {
+				reg = <PX30_PD_GMAC>;
+				clocks = <&cru ACLK_GMAC>,
+					 <&cru PCLK_GMAC>,
+					 <&cru SCLK_MAC_REF>,
+					 <&cru SCLK_GMAC_RX_TX>;
+			};
+			pd_mmc_nand@PX30_PD_MMC_NAND {
+				reg = <PX30_PD_MMC_NAND>;
+				clocks =  <&cru HCLK_NANDC>,
+					  <&cru HCLK_EMMC>,
+					  <&cru HCLK_SDIO>,
+					  <&cru HCLK_SFC>,
+					  <&cru SCLK_EMMC>,
+					  <&cru SCLK_NANDC>,
+					  <&cru SCLK_SDIO>,
+					  <&cru SCLK_SFC>;
+			};
+			pd_vpu@PX30_PD_VPU {
+				reg = <PX30_PD_VPU>;
+				clocks = <&cru ACLK_VPU>,
+					 <&cru HCLK_VPU>,
+					 <&cru SCLK_CORE_VPU>;
+			};
+			pd_vo@PX30_PD_VO {
+				reg = <PX30_PD_VO>;
+				clocks = <&cru ACLK_RGA>,
+					 <&cru ACLK_VOPB>,
+					 <&cru ACLK_VOPL>,
+					 <&cru DCLK_VOPB>,
+					 <&cru DCLK_VOPL>,
+					 <&cru HCLK_RGA>,
+					 <&cru HCLK_VOPB>,
+					 <&cru HCLK_VOPL>,
+					 <&cru PCLK_MIPI_DSI>,
+					 <&cru SCLK_RGA_CORE>,
+					 <&cru SCLK_VOPB_PWM>;
+			};
+			pd_vi@PX30_PD_VI {
+				reg = <PX30_PD_VI>;
+				clocks = <&cru ACLK_CIF>,
+					 <&cru ACLK_ISP>,
+					 <&cru HCLK_CIF>,
+					 <&cru HCLK_ISP>,
+					 <&cru SCLK_ISP>;
+			};
+			pd_gpu@PX30_PD_GPU {
+				reg = <PX30_PD_GPU>;
+				clocks = <&cru ACLK_GPU>;
+			};
+		};
+	};
+
+	pmugrf: syscon@ff010000 {
+		compatible = "rockchip,px30-pmugrf", "syscon", "simple-mfd";
+		reg = <0x0 0xff010000 0x0 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		pmu_io_domains: io-domains {
+			compatible = "rockchip,px30-pmu-io-voltage-domain";
+			status = "disabled";
+		};
+
+		reboot-mode {
+			compatible = "syscon-reboot-mode";
+			offset = <0x200>;
+			mode-bootloader = <BOOT_BL_DOWNLOAD>;
+			mode-charge = <BOOT_CHARGING>;
+			mode-fastboot = <BOOT_FASTBOOT>;
+			mode-loader = <BOOT_BL_DOWNLOAD>;
+			mode-normal = <BOOT_NORMAL>;
+			mode-recovery = <BOOT_RECOVERY>;
+			mode-ums = <BOOT_UMS>;
+		};
+
+		pmu_pvtm: pmu-pvtm {
+			compatible = "rockchip,px30-pmu-pvtm";
+			clocks = <&pmucru SCLK_PVTM_PMU>;
+			clock-names = "pmu";
+			status = "disabled";
+		};
+	};
+
+	uart0: serial@ff030000 {
+		compatible = "rockchip,px30-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xff030000 0x0 0x100>;
+		interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART0_PMU>, <&cru PCLK_UART0_PMU>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac 0>, <&dmac 1>;
+		#dma-cells = <2>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
+		status = "disabled";
+	};
+
+	i2s0_8ch: i2s@ff060000 {
+		compatible = "rockchip,px30-i2s", "rockchip,rk3066-i2s";
+		reg = <0x0 0xff060000 0x0 0x1000>;
+		interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_I2S0_TX>, <&cru HCLK_I2S0>;
+		clock-names = "i2s_clk", "i2s_hclk";
+		dmas = <&dmac 16>, <&dmac 17>;
+		dma-names = "tx", "rx";
+		status = "disabled";
+	};
+
+	i2s1_2ch: i2s@ff070000 {
+		compatible = "rockchip,px30-i2s", "rockchip,rk3066-i2s";
+		reg = <0x0 0xff070000 0x0 0x1000>;
+		interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_I2S1>, <&cru HCLK_I2S1>;
+		clock-names = "i2s_clk", "i2s_hclk";
+		dmas = <&dmac 18>, <&dmac 19>;
+		dma-names = "tx", "rx";
+		status = "disabled";
+	};
+
+	i2s2_2ch: i2s@ff080000 {
+		compatible = "rockchip,px30-i2s", "rockchip,rk3066-i2s";
+		reg = <0x0 0xff080000 0x0 0x1000>;
+		interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_I2S2>, <&cru HCLK_I2S2>;
+		clock-names = "i2s_clk", "i2s_hclk";
+		dmas = <&dmac 20>, <&dmac 21>;
+		dma-names = "tx", "rx";
+		status = "disabled";
+	};
+
+	pdm: pdm@ff0a0000 {
+		compatible = "rockchip,pdm";
+		reg = <0x0 0xff0a0000 0x0 0x1000>;
+		clocks = <&cru SCLK_PDM>, <&cru HCLK_PDM>;
+		clock-names = "pdm_clk", "pdm_hclk";
+		dmas = <&dmac 24>;
+		dma-names = "rx";
+		status = "disabled";
+	};
+
+	gic: interrupt-controller@ff131000 {
+		compatible = "arm,gic-400";
+		#interrupt-cells = <3>;
+		#address-cells = <0>;
+		interrupt-controller;
+		reg = <0x0 0xff131000 0 0x1000>,
+		      <0x0 0xff132000 0 0x2000>,
+		      <0x0 0xff134000 0 0x2000>,
+		      <0x0 0xff136000 0 0x2000>;
+		interrupts = <GIC_PPI 9
+		      (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+	};
+
+	grf: syscon@ff140000 {
+		compatible = "rockchip,px30-grf", "syscon", "simple-mfd";
+		reg = <0x0 0xff140000 0x0 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		io_domains: io-domains {
+			compatible = "rockchip,px30-io-voltage-domain";
+			status = "disabled";
+		};
+	};
+
+	core_grf: syscon@ff148000 {
+		compatible = "syscon", "simple-mfd";
+		reg = <0x0 0xff148000 0x0 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		pvtm: pvtm {
+			compatible = "rockchip,px30-pvtm";
+			clocks = <&cru SCLK_PVTM>;
+			clock-names = "core";
+			status = "disabled";
+		};
+	};
+
+	uart1: serial@ff158000 {
+		compatible = "rockchip,px30-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xff158000 0x0 0x100>;
+		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
+		clock-names = "sclk_uart", "pclk_uart";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac 2>, <&dmac 3>;
+		#dma-cells = <2>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart1_xfer &uart1_cts &uart1_rts>;
+		status = "disabled";
+	};
+
+	uart2: serial@ff160000 {
+		compatible = "rockchip,px30-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xff160000 0x0 0x100>;
+		interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac 4>, <&dmac 5>;
+		#dma-cells = <2>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart2m0_xfer>;
+		status = "disabled";
+	};
+
+	uart3: serial@ff168000 {
+		compatible = "rockchip,px30-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xff168000 0x0 0x100>;
+		interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac 6>, <&dmac 7>;
+		#dma-cells = <2>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart3m1_xfer &uart3m1_cts &uart3m1_rts>;
+		status = "disabled";
+	};
+
+	uart4: serial@ff170000 {
+		compatible = "rockchip,px30-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xff170000 0x0 0x100>;
+		interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac 8>, <&dmac 9>;
+		#dma-cells = <2>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart4_xfer &uart4_cts &uart4_rts>;
+		status = "disabled";
+	};
+
+	uart5: serial@ff178000 {
+		compatible = "rockchip,px30-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xff178000 0x0 0x100>;
+		interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART5>, <&cru PCLK_UART5>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac 10>, <&dmac 11>;
+		#dma-cells = <2>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart5_xfer &uart5_cts &uart5_rts>;
+		status = "disabled";
+	};
+
+	i2c0: i2c@ff180000 {
+		compatible = "rockchip,rk3399-i2c";
+		reg = <0x0 0xff180000 0x0 0x1000>;
+		clocks =  <&cru SCLK_I2C0>, <&cru PCLK_I2C0>;
+		clock-names = "i2c", "pclk";
+		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c0_xfer>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	i2c1: i2c@ff190000 {
+		compatible = "rockchip,rk3399-i2c";
+		reg = <0x0 0xff190000 0x0 0x1000>;
+		clocks = <&cru SCLK_I2C1>, <&cru PCLK_I2C1>;
+		clock-names = "i2c", "pclk";
+		interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c1_xfer>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	i2c2: i2c@ff1a0000 {
+		compatible = "rockchip,rk3399-i2c";
+		reg = <0x0 0xff1a0000 0x0 0x1000>;
+		clocks = <&cru SCLK_I2C2>, <&cru PCLK_I2C2>;
+		clock-names = "i2c", "pclk";
+		interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c2_xfer>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	i2c3: i2c@ff1b0000 {
+		compatible = "rockchip,rk3399-i2c";
+		reg = <0x0 0xff1b0000 0x0 0x1000>;
+		clocks = <&cru SCLK_I2C3>, <&cru PCLK_I2C3>;
+		clock-names = "i2c", "pclk";
+		interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c3_xfer>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	spi0: spi@ff1d0000 {
+		compatible = "rockchip,px30-spi", "rockchip,rk3066-spi";
+		reg = <0x0 0xff1d0000 0x0 0x1000>;
+		interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
+		clock-names = "spiclk", "apb_pclk";
+		dmas = <&dmac 12>, <&dmac 13>;
+		#dma-cells = <2>;
+		dma-names = "tx", "rx";
+		pinctrl-names = "default";
+		pinctrl-0 = <&spi0_clk &spi0_csn &spi0_miso &spi0_mosi>;
+		status = "disabled";
+	};
+
+	spi1: spi@ff1d8000 {
+		compatible = "rockchip,px30-spi", "rockchip,rk3066-spi";
+		reg = <0x0 0xff1d8000 0x0 0x1000>;
+		interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&cru SCLK_SPI1>, <&cru PCLK_SPI1>;
+		clock-names = "spiclk", "apb_pclk";
+		dmas = <&dmac 14>, <&dmac 15>;
+		#dma-cells = <2>;
+		dma-names = "tx", "rx";
+		pinctrl-names = "default";
+		pinctrl-0 = <&spi1_clk &spi1_csn &spi1_miso &spi1_mosi>;
+		status = "disabled";
+	};
+
+	wdt: watchdog@ff1e0000 {
+		compatible = "snps,dw-wdt";
+		reg = <0x0 0xff1e0000 0x0 0x100>;
+		interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+		status = "disabled";
+	};
+
+	pwm0: pwm@ff200000 {
+		compatible = "rockchip,px30-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff200000 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwm0_pin>;
+		clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm1: pwm@ff200010 {
+		compatible = "rockchip,px30-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff200010 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwm1_pin>;
+		clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm2: pwm@ff200020 {
+		compatible = "rockchip,px30-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff200020 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwm2_pin>;
+		clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm3: pwm@ff200030 {
+		compatible = "rockchip,px30-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff200030 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwm3_pin>;
+		clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm4: pwm@ff208000 {
+		compatible = "rockchip,px30-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff208000 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwm4_pin>;
+		clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm5: pwm@ff208010 {
+		compatible = "rockchip,px30-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff208010 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwm5_pin>;
+		clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm6: pwm@ff208020 {
+		compatible = "rockchip,px30-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff208020 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwm6_pin>;
+		clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm7: pwm@ff208030 {
+		compatible = "rockchip,px30-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff208030 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwm7_pin>;
+		clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	amba {
+		compatible = "simple-bus";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		dmac: dmac@ff240000 {
+			compatible = "arm,pl330", "arm,primecell";
+			reg = <0x0 0xff240000 0x0 0x4000>;
+			interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru ACLK_DMAC>;
+			clock-names = "apb_pclk";
+			#dma-cells = <1>;
+			peripherals-req-type-burst;
+		};
+	};
+
+	tsadc: tsadc@ff280000 {
+		compatible = "rockchip,px30-tsadc";
+		reg = <0x0 0xff280000 0x0 0x100>;
+		interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+		rockchip,grf = <&grf>;
+		clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
+		clock-names = "tsadc", "apb_pclk";
+		assigned-clocks = <&cru SCLK_TSADC>;
+		assigned-clock-rates = <50000>;
+		resets = <&cru SRST_TSADC_P>;
+		reset-names = "tsadc-apb";
+		pinctrl-names = "init", "default", "sleep";
+		pinctrl-0 = <&tsadc_otp_gpio>;
+		pinctrl-1 = <&tsadc_otp_out>;
+		pinctrl-2 = <&tsadc_otp_gpio>;
+		#thermal-sensor-cells = <1>;
+		rockchip,hw-tshut-temp = <100000>;
+		status = "disabled";
+	};
+
+	saradc: saradc@ff288000 {
+		compatible = "rockchip,px30-saradc", "rockchip,rk3399-saradc";
+		reg = <0x0 0xff288000 0x0 0x100>;
+		interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
+		#io-channel-cells = <1>;
+		clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
+		clock-names = "saradc", "apb_pclk";
+		resets = <&cru SRST_SARADC_P>;
+		reset-names = "saradc-apb";
+		status = "disabled";
+	};
+
+	cru: clock-controller@ff2b0000 {
+		compatible = "rockchip,px30-cru";
+		reg = <0x0 0xff2b0000 0x0 0x9000>;
+		rockchip,grf = <&grf>;
+		#clock-cells = <1>;
+		#reset-cells = <1>;
+
+		assigned-clocks =
+			<&cru APLL_BOOST_H>, <&cru APLL_BOOST_L>,
+			<&cru PLL_NPLL>, <&cru PLL_CPLL>,
+			<&cru ARMCLK>;
+		assigned-clock-rates =
+			<1608000000>, <1416000000>,
+			<1188000000>, <1188000000>,
+			<816000000>;
+	};
+
+	pmucru: pmu-clock-controller@ff2bc000 {
+		compatible = "rockchip,px30-pmucru";
+		reg = <0x0 0xff2bc000 0x0 0x1000>;
+		rockchip,grf = <&grf>;
+		#clock-cells = <1>;
+		#reset-cells = <1>;
+
+		assigned-clocks =
+			<&pmucru PLL_GPLL>, <&pmucru PCLK_PMU_PRE>,
+			<&pmucru SCLK_WIFI_PMU>, <&cru ACLK_BUS_PRE>,
+			<&cru ACLK_PERI_PRE>, <&cru HCLK_BUS_PRE>,
+			<&cru HCLK_PERI_PRE>, <&cru PCLK_BUS_PRE>;
+		assigned-clock-rates =
+			<1200000000>, <100000000>,
+			<26000000>, <300000000>,
+			<300000000>, <150000000>,
+			<150000000>, <75000000>;
+	};
+
+	usb2phy_grf: syscon@ff2c0000 {
+		compatible = "rockchip,px30-usb2phy-grf", "syscon",
+			     "simple-mfd";
+		reg = <0x0 0xff2c0000 0x0 0x10000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		u2phy: usb2-phy@100 {
+			compatible = "rockchip,px30-usb2phy",
+				     "rockchip,rk3328-usb2phy";
+			reg = <0x100 0x10>;
+			clocks = <&cru SCLK_USBPHY_REF>;
+			clock-names = "phyclk";
+			#clock-cells = <0>;
+			assigned-clocks = <&cru USB480M>;
+			assigned-clock-parents = <&u2phy>;
+			clock-output-names = "usb480m_phy";
+			status = "disabled";
+
+			u2phy_host: host-port {
+				#phy-cells = <0>;
+				interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
+				interrupt-names = "linestate";
+				status = "disabled";
+			};
+
+			u2phy_otg: otg-port {
+				#phy-cells = <0>;
+				interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
+					     <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
+					     <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
+				interrupt-names = "otg-bvalid", "otg-id",
+						  "linestate";
+				status = "disabled";
+			};
+		};
+	};
+
+	mipi_dphy: mipi-dphy@ff2e0000 {
+		compatible = "rockchip,px30-mipi-dphy";
+		reg = <0x0 0xff2e0000 0x0 0x10000>;
+		clocks = <&cru SCLK_MIPIDSIPHY_REF>, <&cru PCLK_MIPIDSIPHY>;
+		clock-names = "ref", "pclk";
+		clock-output-names = "mipi_dphy_pll";
+		#clock-cells = <0>;
+		resets = <&cru SRST_MIPIDSIPHY_P>;
+		reset-names = "apb";
+		power-domains = <&power PX30_PD_VO>;
+		#phy-cells = <0>;
+		rockchip,grf = <&grf>;
+		status = "disabled";
+	};
+
+	lvds: lvds@ff2e0000 {
+		compatible = "rockchip,px30-lvds";
+		reg = <0x0 0xff2e0000 0x0 0x100>, <0x0 0xff2e0100 0x0 0x100>;
+		reg-names = "mipi_lvds_phy", "mipi_lvds_ctl";
+		clocks = <&cru PCLK_MIPIDSIPHY>, <&cru PCLK_MIPI_DSI>;
+		clock-names = "pclk_lvds", "pclk_lvds_ctl";
+		power-domains = <&power PX30_PD_VO>;
+		rockchip,grf = <&grf>;
+		status = "disabled";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				lvds_in_vopl: endpoint@0 {
+					reg = <0>;
+					remote-endpoint = <&vopl_out_lvds>;
+				};
+
+				lvds_in_vopb: endpoint@1 {
+					reg = <1>;
+					remote-endpoint = <&vopb_out_lvds>;
+				};
+			};
+		};
+	};
+
+	usb20_otg: usb@ff300000 {
+		compatible = "rockchip,px30-usb", "rockchip,rk3066-usb",
+			     "snps,dwc2";
+		reg = <0x0 0xff300000 0x0 0x40000>;
+		interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_OTG>;
+		clock-names = "otg";
+		dr_mode = "otg";
+		g-np-tx-fifo-size = <16>;
+		g-rx-fifo-size = <275>;
+		g-tx-fifo-size = <256 128 128 64 64 32>;
+		g-use-dma;
+		phys = <&u2phy_otg>;
+		phy-names = "usb2-phy";
+		status = "disabled";
+	};
+
+	usb_host0_ehci: usb@ff340000 {
+		compatible = "generic-ehci";
+		reg = <0x0 0xff340000 0x0 0x10000>;
+		interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_HOST>, <&cru HCLK_HOST_ARB>,
+			 <&u2phy>;
+		clock-names = "usbhost", "arbiter", "utmi";
+		phys = <&u2phy_host>;
+		phy-names = "usb";
+		status = "disabled";
+	};
+
+	usb_host0_ohci: usb@ff350000 {
+		compatible = "generic-ohci";
+		reg = <0x0 0xff350000 0x0 0x10000>;
+		interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_HOST>, <&cru HCLK_HOST_ARB>,
+			 <&u2phy>;
+		clock-names = "usbhost", "arbiter", "utmi";
+		phys = <&u2phy_host>;
+		phy-names = "usb";
+	};
+
+	gmac: ethernet@ff360000 {
+		compatible = "rockchip,px30-gmac";
+		reg = <0x0 0xff360000 0x0 0x10000>;
+		rockchip,grf = <&grf>;
+		interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "macirq";
+		clocks = <&cru SCLK_GMAC>, <&cru SCLK_GMAC_RX_TX>,
+			 <&cru SCLK_GMAC_RX_TX>, <&cru SCLK_MAC_REF>,
+			 <&cru SCLK_MAC_REFOUT>, <&cru ACLK_GMAC>,
+			 <&cru PCLK_GMAC>, <&cru SCLK_GMAC_RMII>;
+		clock-names = "stmmaceth", "mac_clk_rx",
+			      "mac_clk_tx", "clk_mac_ref",
+			      "clk_mac_refout", "aclk_mac",
+			      "pclk_mac", "clk_mac_speed";
+		phy-mode = "rmii";
+		pinctrl-names = "default";
+		pinctrl-0 = <&rmii_pins>;
+		resets = <&cru SRST_GMAC_A>;
+		reset-names = "stmmaceth";
+		power-domains = <&power PX30_PD_GMAC>;
+		status = "disabled";
+	};
+
+	sdmmc: dwmmc@ff370000 {
+		compatible = "rockchip,px30-dw-mshc", "rockchip,rk3288-dw-mshc";
+		reg = <0x0 0xff370000 0x0 0x4000>;
+		max-frequency = <150000000>;
+		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>;
+		clock-names = "biu", "ciu";
+		fifo-depth = <0x100>;
+		interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+		status = "disabled";
+	};
+
+	sdio: dwmmc@ff380000 {
+		compatible = "rockchip,px30-dw-mshc", "rockchip,rk3288-dw-mshc";
+		reg = <0x0 0xff380000 0x0 0x4000>;
+		max-frequency = <150000000>;
+		clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
+			 <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
+		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
+		fifo-depth = <0x100>;
+		interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
+		status = "disabled";
+	};
+
+	emmc: dwmmc@ff390000 {
+		compatible = "rockchip,px30-dw-mshc", "rockchip,rk3288-dw-mshc";
+		reg = <0x0 0xff390000 0x0 0x4000>;
+		max-frequency = <150000000>;
+		clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
+			 <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
+		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
+		fifo-depth = <0x100>;
+		interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
+		status = "disabled";
+	};
+
+	nandc0: nandc@ff3b0000 {
+		compatible = "rockchip,rk-nandc";
+		reg = <0x0 0xff3b0000 0x0 0x4000>;
+		interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
+		nandc_id = <0>;
+		clocks = <&cru SCLK_NANDC>, <&cru HCLK_NANDC>;
+		clock-names = "clk_nandc", "hclk_nandc";
+		status = "disabled";
+	};
+
+	gpu: gpu@ff400000 {
+		compatible = "arm,malit602", "arm,malit60x", "arm,malit6xx", "arm,mali-midgard";
+		reg = <0x0 0xff400000 0x0 0x4000>;
+
+		interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "GPU", "MMU", "JOB";
+
+		clocks = <&cru ACLK_GPU>;
+		clock-names = "clk_mali";
+
+		status = "disabled";
+	};
+
+	hevc: hevc_service@ff440000 {
+		compatible = "rockchip,hevc_sub";
+		iommu_enabled = <1>;
+		reg = <0x0 0xff440000 0x0 0x400>;
+		interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "irq_dec";
+		dev_mode = <1>;
+		iommus = <&hevc_mmu>;
+		name = "hevc_service";
+		allocator = <1>;
+	};
+
+	vpu: vpu_service@ff442000 {
+		compatible = "rockchip,vpu_sub";
+		iommu_enabled = <1>;
+		reg = <0x0 0xff442000 0x0 0x800>;
+		interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
+			<GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "irq_enc", "irq_dec";
+		dev_mode = <0>;
+		iommus = <&vpu_mmu>;
+		name = "vpu_service";
+		allocator = <1>;
+	};
+
+	vpu_combo: vpu_combo {
+		compatible = "rockchip,vpu_combo";
+		subcnt = <2>;
+		rockchip,grf = <&grf>;
+		rockchip,sub = <&vpu>, <&hevc>;
+		clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>, <&cru SCLK_CORE_VPU>;
+		clock-names = "aclk_vcodec", "hclk_vcodec", "clk_core";
+		resets = <&cru SRST_VPU_A>, <&cru SRST_VPU_H>,
+			<&cru SRST_VPU_NIU_A>, <&cru SRST_VPU_NIU_H>,
+			<&cru SRST_VPU_CORE>;
+		reset-names = "video_a", "video_h", "niu_a", "niu_h",
+			"video_core";
+		mode_bit = <15>;
+		mode_ctrl = <0x410>;
+		name = "vpu_combo";
+		status = "disabled";
+	};
+
+	hevc_mmu: iommu@ff440440 {
+		compatible = "rockchip,iommu";
+		reg = <0x0 0xff440440 0x0 0x40>, <0x0 0xff440480 0x0 0x40>;
+		interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "hevc_mmu";
+		clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
+		clock-names = "aclk", "hclk";
+		#iommu-cells = <0>;
+	};
+
+	vpu_mmu: iommu@ff442800 {
+		compatible = "rockchip,iommu";
+		reg = <0x0 0xff442800 0x0 0x100>;
+		interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "vpu_mmu";
+		clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
+		clock-names = "aclk", "hclk";
+		#iommu-cells = <0>;
+	};
+
+	dsi: dsi@ff450000 {
+		compatible = "rockchip,px30-mipi-dsi";
+		reg = <0x0 0xff450000 0x0 0x10000>;
+		interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru PCLK_MIPI_DSI>, <&mipi_dphy>;
+		clock-names = "pclk", "hs_clk";
+		resets = <&cru SRST_MIPIDSI_HOST_P>;
+		reset-names = "apb";
+		phys = <&mipi_dphy>;
+		phy-names = "mipi_dphy";
+		power-domains = <&power PX30_PD_VO>;
+		rockchip,grf = <&grf>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+
+		ports {
+			port {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				dsi_in_vopl: endpoint@0 {
+					reg = <0>;
+					remote-endpoint = <&vopl_out_dsi>;
+				};
+
+				dsi_in_vopb: endpoint@1 {
+					reg = <1>;
+					remote-endpoint = <&vopb_out_dsi>;
+				};
+			};
+		};
+	};
+
+	vopb: vop@ff460000 {
+		compatible = "rockchip,px30-vop-big";
+		reg = <0x0 0xff460000 0x0 0x1fc>, <0x0 0xff460a00 0x0 0x400>;
+		reg-names = "regs", "gamma_lut";
+		interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_VOPB>, <&cru DCLK_VOPB>,
+			 <&cru HCLK_VOPB>;
+		clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
+		iommus = <&vopb_mmu>;
+		status = "disabled";
+
+		vopb_out: port {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			vopb_out_lvds: endpoint@0 {
+				reg = <0>;
+				remote-endpoint = <&lvds_in_vopb>;
+			};
+
+			vopb_out_dsi: endpoint@1 {
+				reg = <1>;
+				remote-endpoint = <&dsi_in_vopb>;
+			};
+		};
+	};
+
+	vopb_mmu: iommu@ff460f00 {
+		compatible = "rockchip,iommu";
+		reg = <0x0 0xff460f00 0x0 0x100>;
+		interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "vopb_mmu";
+		clocks = <&cru ACLK_VOPB>, <&cru HCLK_VOPB>;
+		clock-names = "aclk", "hclk";
+		#iommu-cells = <0>;
+		status = "disabled";
+	};
+
+	vopl: vop@ff470000 {
+		compatible = "rockchip,px30-vop-lit";
+		reg = <0x0 0xff470000 0x0 0x1fc>, <0x0 0xff470a00 0x0 0x400>;
+		reg-names = "regs", "gamma_lut";
+		interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_VOPL>, <&cru DCLK_VOPL>,
+			 <&cru HCLK_VOPL>;
+		clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
+		iommus = <&vopl_mmu>;
+		status = "disabled";
+
+		vopl_out: port {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			vopl_out_lvds: endpoint@0 {
+				reg = <0>;
+				remote-endpoint = <&lvds_in_vopl>;
+			};
+
+			vopl_out_dsi: endpoint@1 {
+				reg = <1>;
+				remote-endpoint = <&dsi_in_vopl>;
+			};
+		};
+	};
+
+	vopl_mmu: iommu@ff470f00 {
+		compatible = "rockchip,iommu";
+		reg = <0x0 0xff470f00 0x0 0x100>;
+		interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "vopl_mmu";
+		clocks = <&cru ACLK_VOPL>, <&cru HCLK_VOPL>;
+		clock-names = "aclk", "hclk";
+		#iommu-cells = <0>;
+		status = "disabled";
+	};
+
+	rk_rga: rk_rga@ff480000 {
+		compatible = "rockchip,rga2";
+		//dev_mode = <1>;
+		reg = <0x0 0xff480000 0x0 0x1000>;
+		interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>;
+		clock-names = "aclk_rga", "hclk_rga";
+		dma-coherent;
+		status = "disabled";
+	};
+
+	cif: cif@ff490000 {
+		compatible = "rockchip,cif";
+		reg = <0x0 0xff490000 0x0 0x200>;
+		interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_CIF>, <&cru HCLK_CIF>, <&cru PCLK_CIF>, <&cru SCLK_CIF_OUT>;
+		clock-names = "aclk_cif0", "hclk_cif0", "pclk_cif", "cif0_out";
+		resets = <&cru SRST_CIF_A>, <&cru SRST_CIF_H>, <&cru SRST_CIF_PCLKIN>;
+		reset-names = "rst_cif_a", "rst_cif_h", "rst_cif_pclkin";
+		pinctrl-names = "cif_pin_all";
+		pinctrl-0 = <&dvp_d2d9_m0>;
+		status = "disabled";
+	};
+
+	vip_mmu: iommu@ff490800{
+		compatible = "rockchip,iommu";
+		reg = <0x0 0xff490800 0x0 0x100>;
+		interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "vip_mmu";
+		clocks = <&cru ACLK_CIF>, <&cru HCLK_CIF>;
+		clock-names = "aclk", "hclk";
+		rk_iommu,disable_reset_quirk;
+		#iommu-cells = <0>;
+		status = "disabled";
+	};
+
+	rk_isp: rk_isp@ff4a0000 {
+		compatible = "rockchip,px30-isp", "rockchip,isp";
+		reg = <0x0 0xff4a0000 0x0 0x4000>;
+		interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>, <&cru SCLK_ISP>, <&cru SCLK_ISP>,
+			<&cru PCLK_ISP>, <&cru SCLK_CIF_OUT>, <&cru SCLK_CIF_OUT>, <&cru PCLK_MIPICSIPHY>;
+		clock-names = "aclk_isp", "hclk_isp", "clk_isp", "clk_isp_jpe",
+			"pclkin_isp", "clk_cif_pll", "clk_cif_out", "pclk_dphyrx";
+		resets = <&cru SRST_ISP>, <&cru SRST_MIPICSIPHY_P>;
+		reset-names = "rst_isp", "rst_mipicsiphy";
+		pinctrl-names = "default";
+		pinctrl-0 = <&cif_clkout_m0>;
+		rockchip,isp,mipiphy = <0>;
+		rockchip,isp,csiphy,reg = <0xff2f0000 0x4000>;
+		rockchip,grf = <&grf>;
+		rockchip,cru = <&cru>;
+		rockchip,isp,iommu-enable = <1>;
+		iommus = <&isp_mmu>;
+		status = "disabled";
+	};
+
+	isp_mmu: iommu@ff4a8000 {
+		compatible = "rockchip,iommu";
+		reg = <0x0 0xff4a8000 0x0 0x100>;
+		interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "isp_mmu";
+		clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>;
+		clock-names = "aclk", "hclk";
+		rk_iommu,disable_reset_quirk;
+		#iommu-cells = <0>;
+		status = "disabled";
+	};
+
+	qos_gmac: qos@ff518000 {
+		compatible = "syscon";
+		reg = <0x0 0xff518000 0x0 0x20>;
+	};
+
+	qos_gpu: qos@ff520000 {
+		compatible = "syscon";
+		reg = <0x0 0xff520000 0x0 0x20>;
+	};
+
+	qos_sdmmc: qos@ff52c000 {
+		compatible = "syscon";
+		reg = <0x0 0xff52c000 0x0 0x20>;
+	};
+
+	qos_emmc: qos@ff538000 {
+		compatible = "syscon";
+		reg = <0x0 0xff538000 0x0 0x20>;
+	};
+
+	qos_nand: qos@ff538080 {
+		compatible = "syscon";
+		reg = <0x0 0xff538080 0x0 0x20>;
+	};
+
+	qos_sdio: qos@ff538100 {
+		compatible = "syscon";
+		reg = <0x0 0xff538100 0x0 0x20>;
+	};
+
+	qos_sfc: qos@ff538180 {
+		compatible = "syscon";
+		reg = <0x0 0xff538180 0x0 0x20>;
+	};
+
+	qos_usb_host: qos@ff540000 {
+		compatible = "syscon";
+		reg = <0x0 0xff540000 0x0 0x20>;
+	};
+
+	qos_usb_otg: qos@ff540080 {
+		compatible = "syscon";
+		reg = <0x0 0xff540080 0x0 0x20>;
+	};
+
+	qos_isp_128: qos@ff548000 {
+		compatible = "syscon";
+		reg = <0x0 0xff548000 0x0 0x20>;
+	};
+
+	qos_isp_rd: qos@ff548080 {
+		compatible = "syscon";
+		reg = <0x0 0xff548080 0x0 0x20>;
+	};
+
+	qos_isp_wr: qos@ff548100 {
+		compatible = "syscon";
+		reg = <0x0 0xff548100 0x0 0x20>;
+	};
+
+	qos_isp_m1: qos@ff548180 {
+		compatible = "syscon";
+		reg = <0x0 0xff548180 0x0 0x20>;
+	};
+
+	qos_vip: qos@ff548200 {
+		compatible = "syscon";
+		reg = <0x0 0xff548200 0x0 0x20>;
+	};
+
+	qos_rga_rd: qos@ff550000 {
+		compatible = "syscon";
+		reg = <0x0 0xff550000 0x0 0x20>;
+	};
+
+	qos_rga_wr: qos@ff550080 {
+		compatible = "syscon";
+		reg = <0x0 0xff550080 0x0 0x20>;
+	};
+
+	qos_vop_m0: qos@ff550100 {
+		compatible = "syscon";
+		reg = <0x0 0xff550100 0x0 0x20>;
+	};
+
+	qos_vop_m1: qos@ff550180 {
+		compatible = "syscon";
+		reg = <0x0 0xff550180 0x0 0x20>;
+	};
+
+	qos_vpu: qos@ff558000 {
+		compatible = "syscon";
+		reg = <0x0 0xff558000 0x0 0x20>;
+	};
+
+	qos_vpu_r128: qos@ff558080 {
+		compatible = "syscon";
+		reg = <0x0 0xff558080 0x0 0x20>;
+	};
+
+	pinctrl: pinctrl {
+		compatible = "rockchip,px30-pinctrl";
+		rockchip,grf = <&grf>;
+		rockchip,pmu = <&pmugrf>;
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		gpio0: gpio0@ff040000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x0 0xff040000 0x0 0x100>;
+			interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru PCLK_GPIO0_PMU>;
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio1: gpio1@ff250000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x0 0xff250000 0x0 0x100>;
+			interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru PCLK_GPIO1>;
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio2: gpio2@ff260000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x0 0xff260000 0x0 0x100>;
+			interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru PCLK_GPIO2>;
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio3: gpio3@ff270000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x0 0xff270000 0x0 0x100>;
+			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru PCLK_GPIO3>;
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		pcfg_pull_up: pcfg-pull-up {
+			bias-pull-up;
+		};
+
+		pcfg_pull_down: pcfg-pull-down {
+			bias-pull-down;
+		};
+
+		pcfg_pull_none: pcfg-pull-none {
+			bias-disable;
+		};
+
+		pcfg_pull_none_2ma: pcfg-pull-none-2ma {
+			bias-disable;
+			drive-strength = <2>;
+		};
+
+		pcfg_pull_up_2ma: pcfg-pull-up-2ma {
+			bias-pull-up;
+			drive-strength = <2>;
+		};
+
+		pcfg_pull_up_4ma: pcfg-pull-up-4ma {
+			bias-pull-up;
+			drive-strength = <4>;
+		};
+
+		pcfg_pull_none_4ma: pcfg-pull-none-4ma {
+			bias-disable;
+			drive-strength = <4>;
+		};
+
+		pcfg_pull_down_4ma: pcfg-pull-down-4ma {
+			bias-pull-down;
+			drive-strength = <4>;
+		};
+
+		pcfg_pull_none_8ma: pcfg-pull-none-8ma {
+			bias-disable;
+			drive-strength = <8>;
+		};
+
+		pcfg_pull_up_8ma: pcfg-pull-up-8ma {
+			bias-pull-up;
+			drive-strength = <8>;
+		};
+
+		pcfg_pull_none_12ma: pcfg-pull-none-12ma {
+			bias-disable;
+			drive-strength = <12>;
+		};
+
+		pcfg_pull_up_12ma: pcfg-pull-up-12ma {
+			bias-pull-up;
+			drive-strength = <12>;
+		};
+
+		pcfg_pull_none_smt: pcfg-pull-none-smt {
+			bias-disable;
+			input-schmitt-enable;
+		};
+
+		pcfg_output_high: pcfg-output-high {
+			output-high;
+		};
+
+		pcfg_output_low: pcfg-output-low {
+			output-low;
+		};
+
+		pcfg_input_high: pcfg-input-high {
+			bias-pull-up;
+			input-enable;
+		};
+
+		pcfg_input: pcfg-input {
+			input-enable;
+		};
+
+		i2c0 {
+			i2c0_xfer: i2c0-xfer {
+				rockchip,pins =
+					<0 RK_PB0 RK_FUNC_1 &pcfg_pull_none_smt>,
+					<0 RK_PB1 RK_FUNC_1 &pcfg_pull_none_smt>;
+			};
+		};
+
+		i2c1 {
+			i2c1_xfer: i2c1-xfer {
+				rockchip,pins =
+					<0 RK_PC2 RK_FUNC_1 &pcfg_pull_none_smt>,
+					<0 RK_PC3 RK_FUNC_1 &pcfg_pull_none_smt>;
+			};
+		};
+
+		i2c2 {
+			i2c2_xfer: i2c2-xfer {
+				rockchip,pins =
+					<2 RK_PB7 RK_FUNC_2 &pcfg_pull_none_smt>,
+					<2 RK_PC0 RK_FUNC_2 &pcfg_pull_none_smt>;
+			};
+		};
+
+		i2c3 {
+			i2c3_xfer: i2c3-xfer {
+				rockchip,pins =
+					<1 RK_PB4 RK_FUNC_4 &pcfg_pull_none_smt>,
+					<1 RK_PB5 RK_FUNC_4 &pcfg_pull_none_smt>;
+			};
+		};
+
+		tsadc {
+			tsadc_otp_gpio: tsadc-otp-gpio {
+				rockchip,pins =
+					<0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
+			};
+
+			tsadc_otp_out: tsadc-otp-out {
+				rockchip,pins =
+					<0 RK_PA6 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		uart0 {
+			uart0_xfer: uart0-xfer {
+				rockchip,pins =
+					<0 RK_PB2 RK_FUNC_1 &pcfg_pull_up>,
+					<0 RK_PB3 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			uart0_cts: uart0-cts {
+				rockchip,pins =
+					<0 RK_PB4 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			uart0_rts: uart0-rts {
+				rockchip,pins =
+					<0 RK_PB5 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			uart0_rts_gpio: uart0-rts-gpio {
+				rockchip,pins =
+					<0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
+			};
+		};
+
+		uart1 {
+			uart1_xfer: uart1-xfer {
+				rockchip,pins =
+					<1 RK_PC1 RK_FUNC_1 &pcfg_pull_up>,
+					<1 RK_PC0 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			uart1_cts: uart1-cts {
+				rockchip,pins =
+					<1 RK_PC2 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			uart1_rts: uart1-rts {
+				rockchip,pins =
+					<1 RK_PC3 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			uart1_rts_gpio: uart1-rts-gpio {
+				rockchip,pins =
+					<1 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
+			};
+		};
+
+		uart2-m0 {
+			uart2m0_xfer: uart2m0-xfer {
+				rockchip,pins =
+					<1 RK_PD2 RK_FUNC_2 &pcfg_pull_up>,
+					<1 RK_PD3 RK_FUNC_2 &pcfg_pull_none>;
+			};
+		};
+
+		uart2-m1 {
+			uart2m1_xfer: uart2m1-xfer {
+				rockchip,pins =
+					<2 RK_PB4 RK_FUNC_2 &pcfg_pull_up>,
+					<2 RK_PB6 RK_FUNC_2 &pcfg_pull_none>;
+			};
+		};
+
+		uart3-m0 {
+			uart3m0_xfer: uart3m0-xfer {
+				rockchip,pins =
+					<0 RK_PC0 RK_FUNC_2 &pcfg_pull_up>,
+					<0 RK_PC1 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			uart3m0_cts: uart3m0-cts {
+				rockchip,pins =
+					<0 RK_PC2 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			uart3m0_rts: uart3m0-rts {
+				rockchip,pins =
+					<0 RK_PC3 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			uart3m0_rts_gpio: uart3m0-rts-gpio {
+				rockchip,pins =
+					<0 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
+			};
+		};
+
+		uart3-m1 {
+			uart3m1_xfer: uart3m1-xfer {
+				rockchip,pins =
+					<1 RK_PB6 RK_FUNC_2 &pcfg_pull_up>,
+					<1 RK_PB7 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			uart3m1_cts: uart3m1-cts {
+				rockchip,pins =
+					<1 RK_PB4 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			uart3m1_rts: uart3m1-rts {
+				rockchip,pins =
+					<1 RK_PB5 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			uart3m1_rts_gpio: uart3m1-rts-gpio {
+				rockchip,pins =
+					<1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
+			};
+		};
+
+		uart4 {
+
+			uart4_xfer: uart4-xfer {
+				rockchip,pins =
+					<1 RK_PD4 RK_FUNC_2 &pcfg_pull_up>,
+					<1 RK_PD5 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			uart4_cts: uart4-cts {
+				rockchip,pins =
+					<1 RK_PD6 RK_FUNC_2 &pcfg_pull_none>;
+
+			};
+
+			uart4_rts: uart4-rts {
+				rockchip,pins =
+					<1 RK_PD7 RK_FUNC_2 &pcfg_pull_none>;
+			};
+		};
+
+		uart5 {
+
+			uart5_xfer: uart5-xfer {
+				rockchip,pins =
+					<3 RK_PA2 RK_FUNC_4 &pcfg_pull_up>,
+					<3 RK_PA1 RK_FUNC_4 &pcfg_pull_none>;
+			};
+
+			uart5_cts: uart5-cts {
+				rockchip,pins =
+					<3 RK_PA3 RK_FUNC_4 &pcfg_pull_none>;
+
+			};
+
+			uart5_rts: uart5-rts {
+				rockchip,pins =
+					<3 RK_PA5 RK_FUNC_4 &pcfg_pull_none>;
+			};
+		};
+
+		spi0 {
+			spi0_clk: spi0-clk {
+				rockchip,pins =
+					<1 RK_PB7 RK_FUNC_3 &pcfg_pull_up>;
+			};
+
+			spi0_csn: spi0-csn {
+				rockchip,pins =
+					<1 RK_PB6 RK_FUNC_3 &pcfg_pull_up>;
+			};
+
+			spi0_miso: spi0-miso {
+				rockchip,pins =
+					<1 RK_PB5 RK_FUNC_3 &pcfg_pull_up>;
+			};
+
+			spi0_mosi: spi0-mosi {
+				rockchip,pins =
+					<1 RK_PB4 RK_FUNC_3 &pcfg_pull_up>;
+			};
+		};
+
+		spi1 {
+			spi1_clk: spi1-clk {
+				rockchip,pins =
+					<3 RK_PB7 RK_FUNC_4 &pcfg_pull_up>;
+			};
+
+			spi1_csn: spi1-csn {
+				rockchip,pins =
+					<3 RK_PB1 RK_FUNC_4 &pcfg_pull_up>;
+			};
+
+			spi1_miso: spi1-miso {
+				rockchip,pins =
+					<3 RK_PB6 RK_FUNC_4 &pcfg_pull_up>;
+			};
+
+			spi1_mosi: spi1-mosi {
+				rockchip,pins =
+					<3 RK_PB4 RK_FUNC_4 &pcfg_pull_up>;
+			};
+		};
+
+		pdm {
+			pdm_clk0m0: pdm-clk0m0 {
+				rockchip,pins =
+					<3 RK_PC6 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			pdm_clk0m1: pdm-clk0m1 {
+				rockchip,pins =
+					<2 RK_PC6 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			pdm_clk1: pdm-clk1 {
+				rockchip,pins =
+					<3 RK_PC7 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			pdm_sdi0m0: pdm-sdi0m0 {
+				rockchip,pins =
+					<3 RK_PD3 RK_FUNC_4 &pcfg_pull_none>;
+			};
+
+			pdm_sdi0m1: pdm-sdi0m1 {
+				rockchip,pins =
+					<2 RK_PC5 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			pdm_sdi1: pdm-sdi1 {
+				rockchip,pins =
+					<3 RK_PD0 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			pdm_sdi2: pdm-sdi2 {
+				rockchip,pins =
+					<3 RK_PD1 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			pdm_sdi3: pdm-sdi3 {
+				rockchip,pins =
+					<3 RK_PD2 RK_FUNC_4 &pcfg_pull_none>;
+			};
+
+			pdm_clk0m0_sleep: pdm-clk0m0-sleep {
+				rockchip,pins =
+					<3 RK_PC6 RK_FUNC_GPIO &pcfg_input_high>;
+			};
+
+			pdm_clk0m_sleep1: pdm-clk0m1-sleep {
+				rockchip,pins =
+					<2 RK_PC6 RK_FUNC_GPIO &pcfg_input_high>;
+			};
+
+			pdm_clk1_sleep: pdm-clk1-sleep {
+				rockchip,pins =
+					<3 RK_PC7 RK_FUNC_GPIO &pcfg_input_high>;
+			};
+
+			pdm_sdi0m0_sleep: pdm-sdi0m0-sleep {
+				rockchip,pins =
+					<3 RK_PD3 RK_FUNC_GPIO &pcfg_input_high>;
+			};
+
+			pdm_sdi0m1_sleep: pdm-sdi0m1-sleep {
+				rockchip,pins =
+					<2 RK_PC5 RK_FUNC_GPIO &pcfg_input_high>;
+			};
+
+			pdm_sdi1_sleep: pdm-sdi1-sleep {
+				rockchip,pins =
+					<3 RK_PD0 RK_FUNC_GPIO &pcfg_input_high>;
+			};
+
+			pdm_sdi2_sleep: pdm-sdi2-sleep {
+				rockchip,pins =
+					<3 RK_PD1 RK_FUNC_GPIO &pcfg_input_high>;
+			};
+
+			pdm_sdi3_sleep: pdm-sdi3-sleep {
+				rockchip,pins =
+					<3 RK_PD2 RK_FUNC_GPIO &pcfg_input_high>;
+			};
+		};
+
+		i2s0 {
+			i2s0_8ch_mclk: i2s0-8ch-mclk {
+				rockchip,pins =
+					<3 RK_PC1 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			i2s0_8ch_sclktx: i2s0-8ch-sclktx {
+				rockchip,pins =
+					<3 RK_PC3 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			i2s0_8ch_sclkrx: i2s0-8ch-sclkrx {
+				rockchip,pins =
+					<3 RK_PB4 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			i2s0_8ch_lrcktx: i2s0-8ch-lrcktx {
+				rockchip,pins =
+					<3 RK_PC2 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			i2s0_8ch_lrckrx: i2s0-8ch-lrckrx {
+				rockchip,pins =
+					<3 RK_PB5 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			i2s0_8ch_sdo: i2s0-8ch-sdo {
+				rockchip,pins =
+					<3 RK_PD2 RK_FUNC_3 &pcfg_pull_none>;
+			};
+
+			i2s0_8ch_sdo0: i2s0-8ch-sdo0 {
+				rockchip,pins =
+					<3 RK_PC4 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			i2s0_8ch_sdo1: i2s0-8ch-sdo1 {
+				rockchip,pins =
+					<3 RK_PC0 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			i2s0_8ch_sdo2: i2s0-8ch-sdo2 {
+				rockchip,pins =
+					<3 RK_PB7 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			i2s0_8ch_sdo3: i2s0-8ch-sdo3 {
+				rockchip,pins =
+					<3 RK_PB6 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			i2s0_8ch_sdi: i2s0-8ch-sdi {
+				rockchip,pins =
+					<3 RK_PD3 RK_FUNC_3 &pcfg_pull_none>;
+			};
+
+			i2s0_8ch_sdi0: i2s0-8ch-sdi0 {
+				rockchip,pins =
+					<3 RK_PC5 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			i2s0_8ch_sdi1: i2s0-8ch-sdi1 {
+				rockchip,pins =
+					<3 RK_PB3 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			i2s0_8ch_sdi2: i2s0-8ch-sdi2 {
+				rockchip,pins =
+					<3 RK_PB1 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			i2s0_8ch_sdi3: i2s0-8ch-sdi3 {
+				rockchip,pins =
+					<3 RK_PB0 RK_FUNC_2 &pcfg_pull_none>;
+			};
+		};
+
+		i2s1 {
+			i2s1_2ch_mclk: i2s1-2ch-mclk {
+				rockchip,pins =
+					<2 RK_PC3 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			i2s1_2ch_sclk: i2s1-2ch-sclk {
+				rockchip,pins =
+					<2 RK_PC2 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			i2s1_2ch_lrck: i2s1-2ch-lrck {
+				rockchip,pins =
+					<2 RK_PC1 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			i2s1_2ch_sdi: i2s1-2ch-sdi {
+				rockchip,pins =
+					<2 RK_PC5 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			i2s1_2ch_sdo: i2s1-2ch-sdo {
+				rockchip,pins =
+					<2 RK_PC4 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		i2s2 {
+			i2s2_2ch_mclk: i2s2-2ch-mclk {
+				rockchip,pins =
+					<3 RK_PA1 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			i2s2_2ch_sclk: i2s2-2ch-sclk {
+				rockchip,pins =
+					<3 RK_PA2 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			i2s2_2ch_lrck: i2s2-2ch-lrck {
+				rockchip,pins =
+					<3 RK_PA3 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			i2s2_2ch_sdi: i2s2-2ch-sdi {
+				rockchip,pins =
+					<3 RK_PA5 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			i2s2_2ch_sdo: i2s2-2ch-sdo {
+				rockchip,pins =
+					<3 RK_PA7 RK_FUNC_2 &pcfg_pull_none>;
+			};
+		};
+
+		sdmmc0 {
+			sdmmc0_clk: sdmmc0-clk {
+				rockchip,pins =
+					<1 RK_PD6 RK_FUNC_1 &pcfg_pull_none_4ma>;
+			};
+
+			sdmmc0_cmd: sdmmc0-cmd {
+				rockchip,pins =
+					<1 RK_PD7 RK_FUNC_1 &pcfg_pull_up_4ma>;
+			};
+
+			sdmmc0_bus1: sdmmc0-bus1 {
+				rockchip,pins =
+					<1 RK_PD2 RK_FUNC_1 &pcfg_pull_up_4ma>;
+			};
+
+			sdmmc0_bus4: sdmmc0-bus4 {
+				rockchip,pins =
+					<1 RK_PD2 RK_FUNC_1 &pcfg_pull_up_4ma>,
+					<1 RK_PD3 RK_FUNC_1 &pcfg_pull_up_4ma>,
+					<1 RK_PD4 RK_FUNC_1 &pcfg_pull_up_4ma>,
+					<1 RK_PD5 RK_FUNC_1 &pcfg_pull_up_4ma>;
+			};
+
+			sdmmc0_gpio: sdmmc0-gpio {
+				rockchip,pins =
+					<1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PD7 RK_FUNC_GPIO &pcfg_pull_up_4ma>;
+			};
+		};
+
+		sdmmc1 {
+			sdmmc1_clk: sdmmc1-clk {
+				rockchip,pins =
+					<1 RK_PC5 RK_FUNC_1 &pcfg_pull_none_8ma>;
+			};
+
+			sdmmc1_cmd: sdmmc1-cmd {
+				rockchip,pins =
+					<1 RK_PC4 RK_FUNC_1 &pcfg_pull_up_8ma>;
+			};
+
+			sdmmc1_bus1: sdmmc1-bus1 {
+				rockchip,pins =
+					<1 RK_PC6 RK_FUNC_1 &pcfg_pull_up_8ma>;
+			};
+
+			sdmmc1_bus4: sdmmc1-bus4 {
+				rockchip,pins =
+					<1 RK_PC6 RK_FUNC_1 &pcfg_pull_up_8ma>,
+					<1 RK_PC7 RK_FUNC_1 &pcfg_pull_up_8ma>,
+					<1 RK_PD0 RK_FUNC_1 &pcfg_pull_up_8ma>,
+					<1 RK_PD1 RK_FUNC_1 &pcfg_pull_up_8ma>;
+			};
+
+			sdmmc1_gpio: sdmmc1-gpio {
+				rockchip,pins =
+					<1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up_4ma>;
+			};
+		};
+
+		emmc {
+			emmc_clk: emmc-clk {
+				rockchip,pins =
+					<1 RK_PB1 RK_FUNC_2 &pcfg_pull_none_8ma>;
+			};
+
+			emmc_cmd: emmc-cmd {
+				rockchip,pins =
+					<1 RK_PB2 RK_FUNC_2 &pcfg_pull_up_8ma>;
+			};
+
+			emmc_pwren: emmc-pwren {
+				rockchip,pins =
+					<1 RK_PB0 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			emmc_rstnout: emmc-rstnout {
+				rockchip,pins =
+					<1 RK_PB3 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			emmc_bus1: emmc-bus1 {
+				rockchip,pins =
+					<1 RK_PA0 RK_FUNC_2 &pcfg_pull_up_8ma>;
+			};
+
+			emmc_bus4: emmc-bus4 {
+				rockchip,pins =
+					<1 RK_PA0 RK_FUNC_2 &pcfg_pull_up_8ma>,
+					<1 RK_PA1 RK_FUNC_2 &pcfg_pull_up_8ma>,
+					<1 RK_PA2 RK_FUNC_2 &pcfg_pull_up_8ma>,
+					<1 RK_PA3 RK_FUNC_2 &pcfg_pull_up_8ma>;
+			};
+
+			emmc_bus8: emmc-bus8 {
+				rockchip,pins =
+					<1 RK_PA0 RK_FUNC_2 &pcfg_pull_up_8ma>,
+					<1 RK_PA1 RK_FUNC_2 &pcfg_pull_up_8ma>,
+					<1 RK_PA2 RK_FUNC_2 &pcfg_pull_up_8ma>,
+					<1 RK_PA3 RK_FUNC_2 &pcfg_pull_up_8ma>,
+					<1 RK_PA4 RK_FUNC_2 &pcfg_pull_up_8ma>,
+					<1 RK_PA5 RK_FUNC_2 &pcfg_pull_up_8ma>,
+					<1 RK_PA6 RK_FUNC_2 &pcfg_pull_up_8ma>,
+					<1 RK_PA7 RK_FUNC_2 &pcfg_pull_up_8ma>;
+			};
+		};
+
+		flash {
+			flash_cs0: flash-cs0 {
+				rockchip,pins =
+					<1 RK_PB0 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			flash_rdy: flash-rdy {
+				rockchip,pins =
+					<1 RK_PB1 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			flash_dqs: flash-dqs {
+				rockchip,pins =
+					<1 RK_PB2 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			flash_ale: flash-ale {
+				rockchip,pins =
+					<1 RK_PB3 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			flash_cle: flash-cle {
+				rockchip,pins =
+					<1 RK_PB4 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			flash_wrn: flash-wrn {
+				rockchip,pins =
+					<1 RK_PB5 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			flash_csl: flash-csl {
+				rockchip,pins =
+					<1 RK_PB6 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			flash_rdn: flash-rdn {
+				rockchip,pins =
+					<1 RK_PB7 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			flash_bus8: flash-bus8 {
+				rockchip,pins =
+					<1 RK_PA0 RK_FUNC_1 &pcfg_pull_up_12ma>,
+					<1 RK_PA1 RK_FUNC_1 &pcfg_pull_up_12ma>,
+					<1 RK_PA2 RK_FUNC_1 &pcfg_pull_up_12ma>,
+					<1 RK_PA3 RK_FUNC_1 &pcfg_pull_up_12ma>,
+					<1 RK_PA4 RK_FUNC_1 &pcfg_pull_up_12ma>,
+					<1 RK_PA5 RK_FUNC_1 &pcfg_pull_up_12ma>,
+					<1 RK_PA6 RK_FUNC_1 &pcfg_pull_up_12ma>,
+					<1 RK_PA7 RK_FUNC_1 &pcfg_pull_up_12ma>;
+			};
+		};
+
+		lcdc {
+			lcdc_rgb_dclk_pin: lcdc-rgb-dclk-pin {
+				rockchip,pins =
+					<3 RK_PA0 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			lcdc_rgb_m0_hsync_pin: lcdc-rgb-m0-hsync-pin {
+				rockchip,pins =
+					<3 RK_PA1 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			lcdc_rgb_m0_vsync_pin: lcdc-rgb-m0-vsync-pin {
+				rockchip,pins =
+					<3 RK_PA2 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			lcdc_rgb_m0_den_pin: lcdc-rgb-m0-den-pin {
+				rockchip,pins =
+					<3 RK_PA3 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			lcdc_rgb888_m0_data_pins: lcdc-rgb888-m0-data-pins {
+				rockchip,pins =
+					<3 RK_PA7 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d3 */
+					<3 RK_PA6 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d2 */
+					<3 RK_PA5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d1 */
+					<3 RK_PA4 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d0 */
+					<3 RK_PB3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d7 */
+					<3 RK_PB2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d6 */
+					<3 RK_PB1 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d5 */
+					<3 RK_PB0 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d4 */
+					<3 RK_PB7 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d11 */
+					<3 RK_PB6 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d10 */
+					<3 RK_PB5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d9 */
+					<3 RK_PB4 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d8 */
+					<3 RK_PC3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d15 */
+					<3 RK_PC2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d14 */
+					<3 RK_PC1 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d13 */
+					<3 RK_PC0 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d12 */
+					<3 RK_PC7 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d19 */
+					<3 RK_PC6 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d18 */
+					<3 RK_PC5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d17 */
+					<3 RK_PC4 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d16 */
+					<3 RK_PD3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d23 */
+					<3 RK_PD2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d22 */
+					<3 RK_PD1 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d21 */
+					<3 RK_PD0 RK_FUNC_1 &pcfg_pull_none>;	/* lcdc_d20 */
+			};
+
+			lcdc_rgb666_m0_data_pins: lcdc-rgb666-m0-data-pins {
+				rockchip,pins =
+					<3 RK_PA7 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d3 */
+					<3 RK_PA6 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d2 */
+					<3 RK_PA5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d1 */
+					<3 RK_PA4 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d0 */
+					<3 RK_PB3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d7 */
+					<3 RK_PB2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d6 */
+					<3 RK_PB1 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d5 */
+					<3 RK_PB0 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d4 */
+					<3 RK_PB7 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d11 */
+					<3 RK_PB6 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d10 */
+					<3 RK_PB5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d9 */
+					<3 RK_PB4 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d8 */
+					<3 RK_PC3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d15 */
+					<3 RK_PC2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d14 */
+					<3 RK_PC1 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d13 */
+					<3 RK_PC0 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d12 */
+					<3 RK_PC5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d17 */
+					<3 RK_PC4 RK_FUNC_1 &pcfg_pull_none>;	/* lcdc_d16 */
+			};
+
+			lcdc_rgb565_m0_data_pins: lcdc-rgb565-m0-data-pins {
+				rockchip,pins =
+					<3 RK_PA7 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d3 */
+					<3 RK_PA6 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d2 */
+					<3 RK_PA5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d1 */
+					<3 RK_PA4 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d0 */
+					<3 RK_PB3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d7 */
+					<3 RK_PB2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d6 */
+					<3 RK_PB1 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d5 */
+					<3 RK_PB0 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d4 */
+					<3 RK_PB7 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d11 */
+					<3 RK_PB6 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d10 */
+					<3 RK_PB5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d9 */
+					<3 RK_PB4 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d8 */
+					<3 RK_PC3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d15 */
+					<3 RK_PC2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d14 */
+					<3 RK_PC1 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d13 */
+					<3 RK_PC0 RK_FUNC_1 &pcfg_pull_none>;	/* lcdc_d12 */
+			};
+
+			lcdc_rgb888_m1_data_pins: lcdc-rgb888-m1-data-pins {
+				rockchip,pins =
+					<3 RK_PA6 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d2 */
+					<3 RK_PA4 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d0 */
+					<3 RK_PB3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d7 */
+					<3 RK_PB2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d6 */
+					<3 RK_PB5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d9 */
+					<3 RK_PC3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d15 */
+					<3 RK_PC2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d14 */
+					<3 RK_PC1 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d13 */
+					<3 RK_PC0 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d12 */
+					<3 RK_PC7 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d19 */
+					<3 RK_PC6 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d18 */
+					<3 RK_PC5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d17 */
+					<3 RK_PC4 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d16 */
+					<3 RK_PD3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d23 */
+					<3 RK_PD2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d22 */
+					<3 RK_PD1 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d21 */
+					<3 RK_PD0 RK_FUNC_1 &pcfg_pull_none>;	/* lcdc_d20 */
+			};
+
+			lcdc_rgb666_m1_data_pins: lcdc-rgb666-m1-data-pins {
+				rockchip,pins =
+					<3 RK_PA6 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d2 */
+					<3 RK_PA4 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d0 */
+					<3 RK_PB3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d7 */
+					<3 RK_PB2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d6 */
+					<3 RK_PB5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d9 */
+					<3 RK_PC3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d15 */
+					<3 RK_PC2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d14 */
+					<3 RK_PC1 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d13 */
+					<3 RK_PC0 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d12 */
+					<3 RK_PC5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d17 */
+					<3 RK_PC4 RK_FUNC_1 &pcfg_pull_none>;	/* lcdc_d16 */
+			};
+
+			lcdc_rgb565_m1_data_pins: lcdc-rgb565-m1-data-pins {
+				rockchip,pins =
+					<3 RK_PA6 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d2 */
+					<3 RK_PA4 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d0 */
+					<3 RK_PB3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d7 */
+					<3 RK_PB2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d6 */
+					<3 RK_PB5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d9 */
+					<3 RK_PC3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d15 */
+					<3 RK_PC2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d14 */
+					<3 RK_PC1 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d13 */
+					<3 RK_PC0 RK_FUNC_1 &pcfg_pull_none>;	/* lcdc_d12 */
+			};
+		};
+
+		pwm0 {
+			pwm0_pin: pwm0-pin {
+				rockchip,pins =
+					<0 RK_PB7 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		pwm1 {
+			pwm1_pin: pwm1-pin {
+				rockchip,pins =
+					<0 RK_PC0 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		pwm2 {
+			pwm2_pin: pwm2-pin {
+				rockchip,pins =
+					<2 RK_PB5 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		pwm3 {
+			pwm3_pin: pwm3-pin {
+				rockchip,pins =
+					<0 RK_PC1 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		pwm4 {
+			pwm4_pin: pwm4-pin {
+				rockchip,pins =
+					<3 RK_PC2 RK_FUNC_3 &pcfg_pull_none>;
+			};
+		};
+
+		pwm5 {
+			pwm5_pin: pwm5-pin {
+				rockchip,pins =
+					<3 RK_PC3 RK_FUNC_3 &pcfg_pull_none>;
+			};
+		};
+
+		pwm6 {
+			pwm6_pin: pwm6-pin {
+				rockchip,pins =
+					<3 RK_PC4 RK_FUNC_3 &pcfg_pull_none>;
+			};
+		};
+
+		pwm7 {
+			pwm7_pin: pwm7-pin {
+				rockchip,pins =
+					<3 RK_PC5 RK_FUNC_3 &pcfg_pull_none>;
+			};
+		};
+
+		gmac {
+			rmii_pins: rmii-pins {
+				rockchip,pins =
+					/* mac_txen */
+					<2 RK_PA0 RK_FUNC_2 &pcfg_pull_none_12ma>,
+					/* mac_txd1 */
+					<2 RK_PA1 RK_FUNC_2 &pcfg_pull_none_12ma>,
+					/* mac_txd0 */
+					<2 RK_PA2 RK_FUNC_2 &pcfg_pull_none_12ma>,
+					/* mac_rxd0 */
+					<2 RK_PA3 RK_FUNC_2 &pcfg_pull_none>,
+					/* mac_rxd1 */
+					<2 RK_PA4 RK_FUNC_2 &pcfg_pull_none>,
+					/* mac_rxer */
+					<2 RK_PA5 RK_FUNC_2 &pcfg_pull_none>,
+					/* mac_rxdv */
+					<2 RK_PA6 RK_FUNC_2 &pcfg_pull_none>,
+					/* mac_mdio */
+					<2 RK_PA7 RK_FUNC_2 &pcfg_pull_none>,
+					/* mac_mdc */
+					<2 RK_PB1 RK_FUNC_2 &pcfg_pull_none>,
+					/* mac_clk */
+					<2 RK_PB2 RK_FUNC_2 &pcfg_pull_none>;
+			};
+		};
+
+		cif-m0 {
+			cif_clkout_m0: cif-clkout-m0 {
+				rockchip,pins = <2 RK_PB3 RK_FUNC_1 &pcfg_pull_none>;/* cif_clkout */
+			};
+
+			dvp_d2d9_m0: dvp-d2d9-m0 {
+				rockchip,pins =
+					<2 RK_PA0 RK_FUNC_1 &pcfg_pull_none>,/* cif_data2 */
+					<2 RK_PA1 RK_FUNC_1 &pcfg_pull_none>,/* cif_data3 */
+					<2 RK_PA2 RK_FUNC_1 &pcfg_pull_none>,/* cif_data4 */
+					<2 RK_PA3 RK_FUNC_1 &pcfg_pull_none>,/* cif_data5 */
+					<2 RK_PA4 RK_FUNC_1 &pcfg_pull_none>,/* cif_data6 */
+					<2 RK_PA5 RK_FUNC_1 &pcfg_pull_none>,/* cif_data7 */
+					<2 RK_PA6 RK_FUNC_1 &pcfg_pull_none>,/* cif_data8 */
+					<2 RK_PA7 RK_FUNC_1 &pcfg_pull_none>,/* cif_data9 */
+					<2 RK_PB0 RK_FUNC_1 &pcfg_pull_none>,/* cif_sync */
+					<2 RK_PB1 RK_FUNC_1 &pcfg_pull_none>,/* cif_href */
+					<2 RK_PB2 RK_FUNC_1 &pcfg_pull_none>,/* cif_clkin */
+					<2 RK_PB3 RK_FUNC_1 &pcfg_pull_none>;/* cif_clkout */
+			};
+
+			dvp_d0d1_m0: dvp-d0d1-m0 {
+				rockchip,pins =
+					<2 RK_PB4 RK_FUNC_1 &pcfg_pull_none>,/* cif_data0 */
+					<2 RK_PB6 RK_FUNC_1 &pcfg_pull_none>;/* cif_data1 */
+			};
+
+			dvp_d10d11_m0:d10-d11-m0 {
+				rockchip,pins =
+					<2 RK_PB7 RK_FUNC_1 &pcfg_pull_none>,/* cif_data10 */
+					<2 RK_PC0 RK_FUNC_1 &pcfg_pull_none>;/* cif_data11 */
+			};
+		};
+
+		cif-m1 {
+			cif_clkout_m1: cif-clkout-m1 {
+				rockchip,pins = <3 RK_PD0 RK_FUNC_3 &pcfg_pull_none>;/* cif_clkout */
+			};
+
+			dvp_d2d9_m1: dvp-d2d9-m1 {
+				rockchip,pins =
+					<3 RK_PA3 RK_FUNC_1 &pcfg_pull_none>,/* cif_data2 */
+					<3 RK_PA5 RK_FUNC_1 &pcfg_pull_none>,/* cif_data3 */
+					<3 RK_PA7 RK_FUNC_1 &pcfg_pull_none>,/* cif_data4 */
+					<3 RK_PB0 RK_FUNC_1 &pcfg_pull_none>,/* cif_data5 */
+					<3 RK_PB1 RK_FUNC_1 &pcfg_pull_none>,/* cif_data6 */
+					<3 RK_PB4 RK_FUNC_1 &pcfg_pull_none>,/* cif_data7 */
+					<3 RK_PB6 RK_FUNC_1 &pcfg_pull_none>,/* cif_data8 */
+					<3 RK_PB7 RK_FUNC_1 &pcfg_pull_none>,/* cif_data9 */
+					<3 RK_PD1 RK_FUNC_3 &pcfg_pull_none>,/* cif_sync */
+					<3 RK_PD2 RK_FUNC_2 &pcfg_pull_none>,/* cif_href */
+					<3 RK_PD3 RK_FUNC_2 &pcfg_pull_none>,/* cif_clkin */
+					<3 RK_PD0 RK_FUNC_3 &pcfg_pull_none>;/* cif_clkout */
+			};
+
+			dvp_d0d1_m1: dvp-d0d1-m1 {
+				rockchip,pins =
+					<3 RK_PA1 RK_FUNC_3 &pcfg_pull_none>,/* cif_data0 */
+					<3 RK_PA2 RK_FUNC_3 &pcfg_pull_none>;/* cif_data1 */
+			};
+
+			dvp_d10d11_m1:d10-d11-m1 {
+				rockchip,pins =
+					<3 RK_PC6 RK_FUNC_3 &pcfg_pull_none>,/* cif_data10 */
+					<3 RK_PC7 RK_FUNC_3 &pcfg_pull_none>;/* cif_data11 */
+			};
+		};
+
+		isp {
+			isp_prelight: isp-prelight {
+				rockchip,pins = <3 RK_PD1 RK_FUNC_4 &pcfg_pull_none>;/* ISP_PRELIGHTTRIG */
+			};
+		};
+	};
+};
diff --git a/include/dt-bindings/clock/px30-cru.h b/include/dt-bindings/clock/px30-cru.h
new file mode 100644
index 0000000000..0873db1498
--- /dev/null
+++ b/include/dt-bindings/clock/px30-cru.h
@@ -0,0 +1,398 @@
+/*
+ * Copyright (c) 2017 Rockchip Electronics Co. Ltd.
+ * Author: Elaine <zhangqing@rock-chips.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _DT_BINDINGS_CLK_ROCKCHIP_PX30_H
+#define _DT_BINDINGS_CLK_ROCKCHIP_PX30_H
+
+/* core clocks */
+#define PLL_APLL		1
+#define PLL_DPLL		2
+#define PLL_CPLL		3
+#define PLL_NPLL		4
+#define APLL_BOOST_H		5
+#define APLL_BOOST_L		6
+#define ARMCLK			7
+
+/* sclk gates (special clocks) */
+#define USB480M			14
+#define SCLK_PDM		15
+#define SCLK_I2S0_TX		16
+#define SCLK_I2S0_TX_OUT	17
+#define SCLK_I2S0_RX		18
+#define SCLK_I2S0_RX_OUT	19
+#define SCLK_I2S1		20
+#define SCLK_I2S1_OUT		21
+#define SCLK_I2S2		22
+#define SCLK_I2S2_OUT		23
+#define SCLK_UART1		24
+#define SCLK_UART2		25
+#define SCLK_UART3		26
+#define SCLK_UART4		27
+#define SCLK_UART5		28
+#define SCLK_I2C0		29
+#define SCLK_I2C1		30
+#define SCLK_I2C2		31
+#define SCLK_I2C3		32
+#define SCLK_I2C4		33
+#define SCLK_PWM0		34
+#define SCLK_PWM1		35
+#define SCLK_SPI0		36
+#define SCLK_SPI1		37
+#define SCLK_TIMER0		38
+#define SCLK_TIMER1		39
+#define SCLK_TIMER2		40
+#define SCLK_TIMER3		41
+#define SCLK_TIMER4		42
+#define SCLK_TIMER5		43
+#define SCLK_TSADC		44
+#define SCLK_SARADC		45
+#define SCLK_OTP		46
+#define SCLK_OTP_USR		47
+#define SCLK_CRYPTO		48
+#define SCLK_CRYPTO_APK		49
+#define SCLK_DDRC		50
+#define SCLK_ISP		51
+#define SCLK_CIF_OUT		52
+#define SCLK_RGA_CORE		53
+#define SCLK_VOPB_PWM		54
+#define SCLK_NANDC		55
+#define SCLK_SDIO		56
+#define SCLK_EMMC		57
+#define SCLK_SFC		58
+#define SCLK_SDMMC		59
+#define SCLK_OTG_ADP		60
+#define SCLK_GMAC_SRC		61
+#define SCLK_GMAC		62
+#define SCLK_GMAC_RX_TX		63
+#define SCLK_MAC_REF		64
+#define SCLK_MAC_REFOUT		65
+#define SCLK_MAC_OUT		66
+#define SCLK_SDMMC_DRV		67
+#define SCLK_SDMMC_SAMPLE	68
+#define SCLK_SDIO_DRV		69
+#define SCLK_SDIO_SAMPLE	70
+#define SCLK_EMMC_DRV		71
+#define SCLK_EMMC_SAMPLE	72
+#define SCLK_GPU		73
+#define SCLK_PVTM		74
+#define SCLK_CORE_VPU		75
+#define SCLK_GMAC_RMII		76
+#define SCLK_UART2_SRC		77
+#define SCLK_NANDC_DIV		78
+#define SCLK_NANDC_DIV50	79
+#define SCLK_SDIO_DIV		80
+#define SCLK_SDIO_DIV50		81
+#define SCLK_EMMC_DIV		82
+#define SCLK_EMMC_DIV50		83
+
+/* dclk gates */
+#define DCLK_VOPB		150
+#define DCLK_VOPL		151
+
+/* aclk gates */
+#define ACLK_GPU		170
+#define ACLK_BUS_PRE		171
+#define ACLK_CRYPTO		172
+#define ACLK_VI_PRE		173
+#define ACLK_VO_PRE		174
+#define ACLK_VPU		175
+#define ACLK_PERI_PRE		176
+#define ACLK_GMAC		178
+#define ACLK_CIF		179
+#define ACLK_ISP		180
+#define ACLK_VOPB		181
+#define ACLK_VOPL		182
+#define ACLK_RGA		183
+#define ACLK_GIC		184
+#define ACLK_DCF		186
+#define ACLK_DMAC		187
+
+/* hclk gates */
+#define HCLK_BUS_PRE		240
+#define HCLK_CRYPTO		241
+#define HCLK_VI_PRE		242
+#define HCLK_VO_PRE		243
+#define HCLK_VPU		244
+#define HCLK_PERI_PRE		245
+#define HCLK_MMC_NAND		246
+#define HCLK_SDMMC		247
+#define HCLK_USB		248
+#define HCLK_CIF		249
+#define HCLK_ISP		250
+#define HCLK_VOPB		251
+#define HCLK_VOPL		252
+#define HCLK_RGA		253
+#define HCLK_NANDC		254
+#define HCLK_SDIO		255
+#define HCLK_EMMC		256
+#define HCLK_SFC		257
+#define HCLK_OTG		258
+#define HCLK_HOST		259
+#define HCLK_HOST_ARB		260
+#define HCLK_PDM		261
+#define HCLK_I2S0		262
+#define HCLK_I2S1		263
+#define HCLK_I2S2		264
+
+/* pclk gates */
+#define PCLK_BUS_PRE		320
+#define PCLK_DDR		321
+#define PCLK_VO_PRE		322
+#define PCLK_GMAC		323
+#define PCLK_MIPI_DSI		324
+#define PCLK_MIPIDSIPHY		325
+#define PCLK_MIPICSIPHY		326
+#define PCLK_USB_GRF		327
+#define PCLK_DCF		328
+#define PCLK_UART1		329
+#define PCLK_UART2		330
+#define PCLK_UART3		331
+#define PCLK_UART4		332
+#define PCLK_UART5		333
+#define PCLK_I2C0		334
+#define PCLK_I2C1		335
+#define PCLK_I2C2		336
+#define PCLK_I2C3		337
+#define PCLK_I2C4		338
+#define PCLK_PWM0		339
+#define PCLK_PWM1		340
+#define PCLK_SPI0		341
+#define PCLK_SPI1		342
+#define PCLK_SARADC		343
+#define PCLK_TSADC		344
+#define PCLK_TIMER		345
+#define PCLK_OTP_NS		346
+#define PCLK_WDT_NS		347
+#define PCLK_GPIO1		348
+#define PCLK_GPIO2		349
+#define PCLK_GPIO3		350
+#define PCLK_ISP		351
+#define PCLK_CIF		352
+#define PCLK_OTP_PHY		353
+
+#define CLK_NR_CLKS		(PCLK_OTP_PHY + 1)
+
+/* pmu-clocks indices */
+
+#define PLL_GPLL		1
+
+#define SCLK_RTC32K_PMU		4
+#define SCLK_WIFI_PMU		5
+#define SCLK_UART0_PMU		6
+#define SCLK_PVTM_PMU		7
+#define PCLK_PMU_PRE		8
+#define SCLK_REF24M_PMU		9
+#define SCLK_USBPHY_REF		10
+#define SCLK_MIPIDSIPHY_REF	11
+
+#define XIN24M_DIV		12
+
+#define PCLK_GPIO0_PMU		20
+#define PCLK_UART0_PMU		21
+
+#define CLKPMU_NR_CLKS		(PCLK_UART0_PMU + 1)
+
+/* soft-reset indices */
+#define SRST_CORE0_PO		0
+#define SRST_CORE1_PO		1
+#define SRST_CORE2_PO		2
+#define SRST_CORE3_PO		3
+#define SRST_CORE0		4
+#define SRST_CORE1		5
+#define SRST_CORE2		6
+#define SRST_CORE3		7
+#define SRST_CORE0_DBG		8
+#define SRST_CORE1_DBG		9
+#define SRST_CORE2_DBG		10
+#define SRST_CORE3_DBG		11
+#define SRST_TOPDBG		12
+#define SRST_CORE_NOC		13
+#define SRST_STRC_A		14
+#define SRST_L2C		15
+
+#define SRST_DAP		16
+#define SRST_CORE_PVTM		17
+#define SRST_GPU		18
+#define SRST_GPU_NIU		19
+#define SRST_UPCTL2		20
+#define SRST_UPCTL2_A		21
+#define SRST_UPCTL2_P		22
+#define SRST_MSCH		23
+#define SRST_MSCH_P		24
+#define SRST_DDRMON_P		25
+#define SRST_DDRSTDBY_P		26
+#define SRST_DDRSTDBY		27
+#define SRST_DDRGRF_p		28
+#define SRST_AXI_SPLIT_A	29
+#define SRST_AXI_CMD_A		30
+#define SRST_AXI_CMD_P		31
+
+#define SRST_DDRPHY		32
+#define SRST_DDRPHYDIV		33
+#define SRST_DDRPHY_P		34
+#define SRST_VPU_A		36
+#define SRST_VPU_NIU_A		37
+#define SRST_VPU_H		38
+#define SRST_VPU_NIU_H		39
+#define SRST_VI_NIU_A		40
+#define SRST_VI_NIU_H		41
+#define SRST_ISP_H		42
+#define SRST_ISP		43
+#define SRST_CIF_A		44
+#define SRST_CIF_H		45
+#define SRST_CIF_PCLKIN		46
+#define SRST_MIPICSIPHY_P	47
+
+#define SRST_VO_NIU_A		48
+#define SRST_VO_NIU_H		49
+#define SRST_VO_NIU_P		50
+#define SRST_VOPB_A		51
+#define SRST_VOPB_H		52
+#define SRST_VOPB		53
+#define SRST_PWM_VOPB		54
+#define SRST_VOPL_A		55
+#define SRST_VOPL_H		56
+#define SRST_VOPL		57
+#define SRST_RGA_A		58
+#define SRST_RGA_H		59
+#define SRST_RGA		60
+#define SRST_MIPIDSI_HOST_P	61
+#define SRST_MIPIDSIPHY_P	62
+#define SRST_VPU_CORE		63
+
+#define SRST_PERI_NIU_A		64
+#define SRST_USB_NIU_H		65
+#define SRST_USB2OTG_H		66
+#define SRST_USB2OTG		67
+#define SRST_USB2OTG_ADP	68
+#define SRST_USB2HOST_H		69
+#define SRST_USB2HOST_ARB_H	70
+#define SRST_USB2HOST_AUX_H	71
+#define SRST_USB2HOST_EHCI	72
+#define SRST_USB2HOST		73
+#define SRST_USBPHYPOR		74
+#define SRST_USBPHY_OTG_PORT	75
+#define SRST_USBPHY_HOST_PORT	76
+#define SRST_USBPHY_GRF		77
+#define SRST_CPU_BOOST_P	78
+#define SRST_CPU_BOOST		79
+
+#define SRST_MMC_NAND_NIU_H	80
+#define SRST_SDIO_H		81
+#define SRST_EMMC_H		82
+#define SRST_SFC_H		83
+#define SRST_SFC		84
+#define SRST_SDCARD_NIU_H	85
+#define SRST_SDMMC_H		86
+#define SRST_NANDC_H		89
+#define SRST_NANDC		90
+#define SRST_GMAC_NIU_A		92
+#define SRST_GMAC_NIU_P		93
+#define SRST_GMAC_A		94
+
+#define SRST_PMU_NIU_P		96
+#define SRST_PMU_SGRF_P		97
+#define SRST_PMU_GRF_P		98
+#define SRST_PMU		99
+#define SRST_PMU_MEM_P		100
+#define SRST_PMU_GPIO0_P	101
+#define SRST_PMU_UART0_P	102
+#define SRST_PMU_CRU_P		103
+#define SRST_PMU_PVTM		104
+#define SRST_PMU_UART		105
+#define SRST_PMU_NIU_H		106
+#define SRST_PMU_DDR_FAIL_SAVE	107
+#define SRST_PMU_CORE_PERF_A	108
+#define SRST_PMU_CORE_GRF_P	109
+#define SRST_PMU_GPU_PERF_A	110
+#define SRST_PMU_GPU_GRF_P	111
+
+#define SRST_CRYPTO_NIU_A	112
+#define SRST_CRYPTO_NIU_H	113
+#define SRST_CRYPTO_A		114
+#define SRST_CRYPTO_H		115
+#define SRST_CRYPTO		116
+#define SRST_CRYPTO_APK		117
+#define SRST_BUS_NIU_H		120
+#define SRST_USB_NIU_P		121
+#define SRST_BUS_TOP_NIU_P	122
+#define SRST_INTMEM_A		123
+#define SRST_GIC_A		124
+#define SRST_ROM_H		126
+#define SRST_DCF_A		127
+
+#define SRST_DCF_P		128
+#define SRST_PDM_H		129
+#define SRST_PDM		130
+#define SRST_I2S0_H		131
+#define SRST_I2S0_TX		132
+#define SRST_I2S1_H		133
+#define SRST_I2S1		134
+#define SRST_I2S2_H		135
+#define SRST_I2S2		136
+#define SRST_UART1_P		137
+#define SRST_UART1		138
+#define SRST_UART2_P		139
+#define SRST_UART2		140
+#define SRST_UART3_P		141
+#define SRST_UART3		142
+#define SRST_UART4_P		143
+
+#define SRST_UART4		144
+#define SRST_UART5_P		145
+#define SRST_UART5		146
+#define SRST_I2C0_P		147
+#define SRST_I2C0		148
+#define SRST_I2C1_P		149
+#define SRST_I2C1		150
+#define SRST_I2C2_P		151
+#define SRST_I2C2		152
+#define SRST_I2C3_P		153
+#define SRST_I2C3		154
+#define SRST_PWM0_P		157
+#define SRST_PWM0		158
+#define SRST_PWM1_P		159
+
+#define SRST_PWM1		160
+#define SRST_SPI0_P		161
+#define SRST_SPI0		162
+#define SRST_SPI1_P		163
+#define SRST_SPI1		164
+#define SRST_SARADC_P		165
+#define SRST_SARADC		166
+#define SRST_TSADC_P		167
+#define SRST_TSADC		168
+#define SRST_TIMER_P		169
+#define SRST_TIMER0		170
+#define SRST_TIMER1		171
+#define SRST_TIMER2		172
+#define SRST_TIMER3		173
+#define SRST_TIMER4		174
+#define SRST_TIMER5		175
+
+#define SRST_OTP_NS_P		176
+#define SRST_OTP_NS_SBPI	177
+#define SRST_OTP_NS_USR		178
+#define SRST_OTP_PHY_P		179
+#define SRST_OTP_PHY		180
+#define SRST_WDT_NS_P		181
+#define SRST_GPIO1_P		182
+#define SRST_GPIO2_P		183
+#define SRST_GPIO3_P		184
+#define SRST_SGRF_P		185
+#define SRST_GRF_P		186
+#define SRST_I2S0_RX		191
+
+#endif
diff --git a/include/dt-bindings/power/px30-power.h b/include/dt-bindings/power/px30-power.h
new file mode 100644
index 0000000000..4ed482e809
--- /dev/null
+++ b/include/dt-bindings/power/px30-power.h
@@ -0,0 +1,32 @@
+/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+#ifndef __DT_BINDINGS_POWER_PX30_POWER_H__
+#define __DT_BINDINGS_POWER_PX30_POWER_H__
+
+/* VD_CORE */
+#define PX30_PD_A35_0		0
+#define PX30_PD_A35_1		1
+#define PX30_PD_A35_2		2
+#define PX30_PD_A35_3		3
+#define PX30_PD_SCU		4
+
+/* VD_LOGIC */
+#define PX30_PD_USB		5
+#define PX30_PD_DDR		6
+#define PX30_PD_SDCARD		7
+#define PX30_PD_CRYPTO		8
+#define PX30_PD_GMAC		9
+#define PX30_PD_MMC_NAND	10
+#define PX30_PD_VPU		11
+#define PX30_PD_VO		12
+#define PX30_PD_VI		13
+#define PX30_PD_GPU		14
+
+/* VD_PMU */
+#define PX30_PD_PMU		15
+
+#endif
diff --git a/include/dt-bindings/soc/rockchip,boot-mode.h b/include/dt-bindings/soc/rockchip,boot-mode.h
new file mode 100644
index 0000000000..1dfc4f4fa7
--- /dev/null
+++ b/include/dt-bindings/soc/rockchip,boot-mode.h
@@ -0,0 +1,19 @@
+#ifndef __ROCKCHIP_BOOT_MODE_H
+#define __ROCKCHIP_BOOT_MODE_H
+
+/* high 24 bits is tag, low 8 bits is type */
+#define REBOOT_FLAG		0x5242C300
+/* normal boot */
+#define BOOT_NORMAL		(REBOOT_FLAG + 0)
+/* enter bootloader rockusb mode */
+#define BOOT_BL_DOWNLOAD	(REBOOT_FLAG + 1)
+/* enter recovery */
+#define BOOT_RECOVERY		(REBOOT_FLAG + 3)
+/* enter fastboot mode */
+#define BOOT_FASTBOOT		(REBOOT_FLAG + 9)
+/* enter charging mode */
+#define BOOT_CHARGING		(REBOOT_FLAG + 11)
+/* enter usb mass storage mode */
+#define BOOT_UMS		(REBOOT_FLAG + 12)
+
+#endif

commit 10e73f7ba0a49f1989531b7f6d6876fd073f7e65
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 22 15:11:11 2018 +0800

    rockchip: px30: add new soc support
    
    The Rockchip PX30 is a ARM-based SoC with a quad-core Cortex-A35
    including NEON and GPU, Mali-400 graphics, several DDR3 options
    and video codec support. Peripherals include Gigabit Ethernet,
    USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
    
    Change-Id: I0c3c58aa654d42291ae902593285bc974cda19d5
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/grf_px30.h b/arch/arm/include/asm/arch-rockchip/grf_px30.h
new file mode 100644
index 0000000000..65d99ccbd6
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/grf_px30.h
@@ -0,0 +1,593 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#ifndef _ASM_ARCH_GRF_px30_H
+#define _ASM_ARCH_GRF_px30_H
+
+#include <common.h>
+
+struct px30_grf {
+	unsigned int gpio1al_iomux;
+	unsigned int gpio1ah_iomux;
+	unsigned int gpio1bl_iomux;
+	unsigned int gpio1bh_iomux;
+	unsigned int gpio1cl_iomux;
+	unsigned int gpio1ch_iomux;
+	unsigned int gpio1dl_iomux;
+	unsigned int gpio1dh_iomux;
+
+	unsigned int gpio2al_iomux;
+	unsigned int gpio2ah_iomux;
+	unsigned int gpio2bl_iomux;
+	unsigned int gpio2bh_iomux;
+	unsigned int gpio2cl_iomux;
+	unsigned int gpio2ch_iomux;
+	unsigned int gpio2dl_iomux;
+	unsigned int gpio2dh_iomux;
+
+	unsigned int gpio3al_iomux;
+	unsigned int gpio3ah_iomux;
+	unsigned int gpio3bl_iomux;
+	unsigned int gpio3bh_iomux;
+	unsigned int gpio3cl_iomux;
+	unsigned int gpio3ch_iomux;
+	unsigned int gpio3dl_iomux;
+	unsigned int gpio3dh_iomux;
+
+	unsigned int gpio1a_p;
+	unsigned int gpio1b_p;
+	unsigned int gpio1c_p;
+	unsigned int gpio1d_p;
+	unsigned int gpio2a_p;
+	unsigned int gpio2b_p;
+	unsigned int gpio2c_p;
+	unsigned int gpio2d_p;
+	unsigned int gpio3a_p;
+	unsigned int gpio3b_p;
+	unsigned int gpio3c_p;
+	unsigned int gpio3d_p;
+	unsigned int gpio1a_sr;
+	unsigned int gpio1b_sr;
+	unsigned int gpio1c_sr;
+	unsigned int gpio1d_sr;
+	unsigned int gpio2a_sr;
+	unsigned int gpio2b_sr;
+	unsigned int gpio2c_sr;
+	unsigned int gpio2d_sr;
+	unsigned int gpio3a_sr;
+	unsigned int gpio3b_sr;
+	unsigned int gpio3c_sr;
+	unsigned int gpio3d_sr;
+	unsigned int gpio1a_smt;
+	unsigned int gpio1b_smt;
+	unsigned int gpio1c_smt;
+	unsigned int gpio1d_smt;
+	unsigned int gpio2a_smt;
+	unsigned int gpio2b_smt;
+	unsigned int gpio2c_smt;
+	unsigned int gpio2d_smt;
+	unsigned int gpio3a_smt;
+	unsigned int gpio3b_smt;
+	unsigned int gpio3c_smt;
+	unsigned int gpio3d_smt;
+	unsigned int gpio1a_e;
+	unsigned int gpio1b_e;
+	unsigned int gpio1c_e;
+	unsigned int gpio1d_e;
+	unsigned int gpio2a_e;
+	unsigned int gpio2b_e;
+	unsigned int gpio2c_e;
+	unsigned int gpio2d_e;
+	unsigned int gpio3a_e;
+	unsigned int gpio3b_e;
+	unsigned int gpio3c_e;
+	unsigned int gpio3d_e;
+
+	unsigned int reserved0[(0x180 - 0x11C) / 4 - 1];
+	unsigned int io_vsel;
+	unsigned int iofunc_con0;
+	unsigned int reserved1[(0x400 - 0x184) / 4 - 1];
+	unsigned int soc_con[6];
+	unsigned int reserved2[(0x480 - 0x414) / 4 - 1];
+	unsigned int soc_status0;
+	unsigned int reserved3[(0x500 - 0x480) / 4 - 1];
+	unsigned int cpu_con[3];
+	unsigned int reserved4[5];
+	unsigned int cpu_status[2];
+	unsigned int reserved5[2];
+	unsigned int soc_noc_con[2];
+	unsigned int reserved6[6];
+	unsigned int ddr_bankhash[4];
+	unsigned int reserved7[(0x700 - 0x55c) / 4 - 1];
+	unsigned int host0_con[2];
+	unsigned int reserved8[(0x880 - 0x704) / 4 - 1];
+	unsigned int otg_con3;
+	unsigned int reserved9[3];
+	unsigned int host0_status4;
+	unsigned int reserved10[(0x904 - 0x890) / 4 - 1];
+	unsigned int mac_con1;
+};
+
+check_member(px30_grf, mac_con1, 0x904);
+
+struct px30_pmugrf {
+	unsigned int gpio0a_e;
+	unsigned int gpio0b_e;
+	unsigned int gpio0c_e;
+	unsigned int gpio0d_e;
+	unsigned int gpio0a_p;
+	unsigned int gpio0b_p;
+	unsigned int gpio0c_p;
+	unsigned int gpio0d_p;
+	unsigned int gpio0al_iomux;
+	unsigned int gpio0bl_iomux;
+	unsigned int gpio0cl_iomux;
+	unsigned int gpio0dl_iomux;
+	unsigned int gpio0l_sr;
+	unsigned int gpio0h_sr;
+	unsigned int gpio0l_smt;
+	unsigned int gpio0h_smt;
+	unsigned int reserved1[(0x100 - 0x3c) / 4 - 1];
+	unsigned int soc_con[4];
+	unsigned int reserved2[(0x180 - 0x10c) / 4 - 1];
+	unsigned int pvtm_con[2];
+	unsigned int reserved3[2];
+	unsigned int pvtm_status[2];
+	unsigned int reserved4[(0x200 - 0x194) / 4 - 1];
+	unsigned int os_reg[12];
+	unsigned int reset_function_status;
+};
+
+check_member(px30_pmugrf, reset_function_status, 0x230);
+
+/* GRF_GPIO0A_IOMUX */
+enum {
+	GPIO0A7_SHIFT		= 14,
+	GPIO0A7_MASK		= 3 << GPIO0A7_SHIFT,
+	GPIO0A7_GPIO		= 0,
+	GPIO0A7_I2C3_SDA,
+	GPIO0A7_HDMI_DDCSDA,
+
+	GPIO0A6_SHIFT		= 12,
+	GPIO0A6_MASK		= 3 << GPIO0A6_SHIFT,
+	GPIO0A6_GPIO		= 0,
+	GPIO0A6_I2C3_SCL,
+	GPIO0A6_HDMI_DDCSCL,
+
+	GPIO0A3_SHIFT		= 6,
+	GPIO0A3_MASK		= 3 << GPIO0A3_SHIFT,
+	GPIO0A3_GPIO		= 0,
+	GPIO0A3_I2C1_SDA,
+	GPIO0A3_SDIO_CMD,
+
+	GPIO0A2_SHIFT		= 4,
+	GPIO0A2_MASK		= 3 << GPIO0A2_SHIFT,
+	GPIO0A2_GPIO		= 0,
+	GPIO0A2_I2C1_SCL,
+
+	GPIO0A1_SHIFT		= 2,
+	GPIO0A1_MASK		= 3 << GPIO0A1_SHIFT,
+	GPIO0A1_GPIO		= 0,
+	GPIO0A1_I2C0_SDA,
+
+	GPIO0A0_SHIFT		= 0,
+	GPIO0A0_MASK		= 3 << GPIO0A0_SHIFT,
+	GPIO0A0_GPIO		= 0,
+	GPIO0A0_I2C0_SCL,
+};
+
+/* GRF_GPIO0B_IOMUX */
+enum {
+	GPIO0B7_SHIFT		= 14,
+	GPIO0B7_MASK		= 3 << GPIO0B7_SHIFT,
+	GPIO0B7_GPIO		= 0,
+	GPIO0B7_HDMI_HDP,
+
+	GPIO0B6_SHIFT		= 12,
+	GPIO0B6_MASK		= 3 << GPIO0B6_SHIFT,
+	GPIO0B6_GPIO		= 0,
+	GPIO0B6_I2S_SDI,
+	GPIO0B6_SPI_CSN0,
+
+	GPIO0B5_SHIFT		= 10,
+	GPIO0B5_MASK		= 3 << GPIO0B5_SHIFT,
+	GPIO0B5_GPIO		= 0,
+	GPIO0B5_I2S_SDO,
+	GPIO0B5_SPI_RXD,
+
+	GPIO0B3_SHIFT		= 6,
+	GPIO0B3_MASK		= 3 << GPIO0B3_SHIFT,
+	GPIO0B3_GPIO		= 0,
+	GPIO0B3_I2S1_LRCKRX,
+	GPIO0B3_SPI_TXD,
+
+	GPIO0B1_SHIFT		= 2,
+	GPIO0B1_MASK		= 3 << GPIO0B1_SHIFT,
+	GPIO0B1_GPIO		= 0,
+	GPIO0B1_I2S_SCLK,
+	GPIO0B1_SPI_CLK,
+
+	GPIO0B0_SHIFT		= 0,
+	GPIO0B0_MASK		= 3,
+	GPIO0B0_GPIO		= 0,
+	GPIO0B0_I2S_MCLK,
+};
+
+/* GRF_GPIO0C_IOMUX */
+enum {
+	GPIO0C4_SHIFT		= 8,
+	GPIO0C4_MASK		= 3 << GPIO0C4_SHIFT,
+	GPIO0C4_GPIO		= 0,
+	GPIO0C4_HDMI_CECSDA,
+
+	GPIO0C1_SHIFT		= 2,
+	GPIO0C1_MASK		= 3 << GPIO0C1_SHIFT,
+	GPIO0C1_GPIO		= 0,
+	GPIO0C1_UART0_RSTN,
+	GPIO0C1_CLK_OUT1,
+};
+
+/* GRF_GPIO0D_IOMUX */
+enum {
+	GPIO0D6_SHIFT		= 12,
+	GPIO0D6_MASK		= 3 << GPIO0D6_SHIFT,
+	GPIO0D6_GPIO		= 0,
+	GPIO0D6_SDIO_PWREN,
+	GPIO0D6_PWM11,
+
+
+	GPIO0D4_SHIFT		= 8,
+	GPIO0D4_MASK		= 3 << GPIO0D4_SHIFT,
+	GPIO0D4_GPIO		= 0,
+	GPIO0D4_PWM2,
+
+	GPIO0D3_SHIFT		= 6,
+	GPIO0D3_MASK		= 3 << GPIO0D3_SHIFT,
+	GPIO0D3_GPIO		= 0,
+	GPIO0D3_PWM1,
+
+	GPIO0D2_SHIFT		= 4,
+	GPIO0D2_MASK		= 3 << GPIO0D2_SHIFT,
+	GPIO0D2_GPIO		= 0,
+	GPIO0D2_PWM0,
+};
+
+/* GRF_GPIO1A_IOMUX */
+enum {
+	GPIO1A7_SHIFT		= 14,
+	GPIO1A7_MASK		= 1,
+	GPIO1A7_GPIO		= 0,
+	GPIO1A7_SDMMC_WRPRT,
+};
+
+/* GRF_GPIO1B_IOMUX */
+enum {
+	GPIO1B7_SHIFT		= 14,
+	GPIO1B7_MASK		= 3 << GPIO1B7_SHIFT,
+	GPIO1B7_GPIO		= 0,
+	GPIO1B7_SDMMC_CMD,
+
+	GPIO1B6_SHIFT		= 12,
+	GPIO1B6_MASK		= 3 << GPIO1B6_SHIFT,
+	GPIO1B6_GPIO		= 0,
+	GPIO1B6_SDMMC_PWREN,
+
+	GPIO1B4_SHIFT		= 8,
+	GPIO1B4_MASK		= 3 << GPIO1B4_SHIFT,
+	GPIO1B4_GPIO		= 0,
+	GPIO1B4_SPI_CSN1,
+	GPIO1B4_PWM12,
+
+	GPIO1B3_SHIFT		= 6,
+	GPIO1B3_MASK		= 3 << GPIO1B3_SHIFT,
+	GPIO1B3_GPIO		= 0,
+	GPIO1B3_UART1_RSTN,
+	GPIO1B3_PWM13,
+
+	GPIO1B2_SHIFT		= 4,
+	GPIO1B2_MASK		= 3 << GPIO1B2_SHIFT,
+	GPIO1B2_GPIO		= 0,
+	GPIO1B2_UART1_SIN,
+	GPIO1B2_UART21_SIN,
+
+	GPIO1B1_SHIFT		= 2,
+	GPIO1B1_MASK		= 3 << GPIO1B1_SHIFT,
+	GPIO1B1_GPIO		= 0,
+	GPIO1B1_UART1_SOUT,
+	GPIO1B1_UART21_SOUT,
+};
+
+/* GRF_GPIO1C_IOMUX */
+enum {
+	GPIO1C7_SHIFT		= 14,
+	GPIO1C7_MASK		= 3 << GPIO1C7_SHIFT,
+	GPIO1C7_GPIO		= 0,
+	GPIO1C7_NAND_CS3,
+	GPIO1C7_EMMC_RSTNOUT,
+
+	GPIO1C6_SHIFT		= 12,
+	GPIO1C6_MASK		= 3 << GPIO1C6_SHIFT,
+	GPIO1C6_GPIO		= 0,
+	GPIO1C6_NAND_CS2,
+	GPIO1C6_EMMC_CMD,
+
+
+	GPIO1C5_SHIFT		= 10,
+	GPIO1C5_MASK		= 3 << GPIO1C5_SHIFT,
+	GPIO1C5_GPIO		= 0,
+	GPIO1C5_SDMMC_D3,
+	GPIO1C5_JTAG_TMS,
+
+	GPIO1C4_SHIFT		= 8,
+	GPIO1C4_MASK		= 3 << GPIO1C4_SHIFT,
+	GPIO1C4_GPIO		= 0,
+	GPIO1C4_SDMMC_D2,
+	GPIO1C4_JTAG_TCK,
+
+	GPIO1C3_SHIFT		= 6,
+	GPIO1C3_MASK		= 3 << GPIO1C3_SHIFT,
+	GPIO1C3_GPIO		= 0,
+	GPIO1C3_SDMMC_D1,
+	GPIO1C3_UART2_SIN,
+
+	GPIO1C2_SHIFT		= 4,
+	GPIO1C2_MASK		= 3 << GPIO1C2_SHIFT ,
+	GPIO1C2_GPIO		= 0,
+	GPIO1C2_SDMMC_D0,
+	GPIO1C2_UART2_SOUT,
+
+	GPIO1C1_SHIFT		= 2,
+	GPIO1C1_MASK		= 3 << GPIO1C1_SHIFT,
+	GPIO1C1_GPIO		= 0,
+	GPIO1C1_SDMMC_DETN,
+
+	GPIO1C0_SHIFT		= 0,
+	GPIO1C0_MASK		= 3 << GPIO1C0_SHIFT,
+	GPIO1C0_GPIO		= 0,
+	GPIO1C0_SDMMC_CLKOUT,
+};
+
+/* GRF_GPIO1DL_IOMUX */
+enum {
+
+	GPIO1D3_SHIFT		= 12,
+	GPIO1D3_MASK		= 0xf << GPIO1D3_SHIFT,
+	GPIO1D3_GPIO		= 0,
+	GPIO1D3_SDMMC1_D1,
+	GPIO1D3_UART2_RXM0,
+
+	GPIO1D2_SHIFT		= 8,
+	GPIO1D2_MASK		= 0xf << GPIO1D2_SHIFT,
+	GPIO1D2_GPIO		= 0,
+	GPIO1D2_SDMMC1_D0,
+	GPIO1D2_UART2_TXM0,
+
+	GPIO1D1_SHIFT		= 4,
+	GPIO1D1_MASK		= 0xf << GPIO1D1_SHIFT,
+	GPIO1D1_GPIO		= 0,
+	GPIO1D1_SDMMC1_D3,
+
+	GPIO1D0_SHIFT		= 0,
+	GPIO1D0_MASK		= 0xf << GPIO1D0_SHIFT,
+	GPIO1D0_GPIO		= 0,
+	GPIO1D0_SDMMC1_D2,
+};
+/* GRF_GPIO1DH_IOMUX */
+enum {
+
+	GPIO1D7_SHIFT		= 14,
+	GPIO1D7_MASK		= 3 << GPIO1D7_SHIFT,
+	GPIO1D7_GPIO		= 0,
+	GPIO1D7_NAND_D7,
+	GPIO1D7_EMMC_D7,
+
+	GPIO1D6_SHIFT		= 12,
+	GPIO1D6_MASK		= 3 << GPIO1D6_SHIFT,
+	GPIO1D6_GPIO		= 0,
+	GPIO1D6_NAND_D6,
+	GPIO1D6_EMMC_D6,
+
+	GPIO1D5_SHIFT		= 10,
+	GPIO1D5_MASK		= 3 << GPIO1D5_SHIFT,
+	GPIO1D5_GPIO		= 0,
+	GPIO1D5_NAND_D5,
+	GPIO1D5_EMMC_D5,
+
+	GPIO1D4_SHIFT		= 8,
+	GPIO1D4_MASK		= 3 << GPIO1D4_SHIFT,
+	GPIO1D4_GPIO		= 0,
+	GPIO1D4_NAND_D4,
+	GPIO1D4_EMMC_D4,
+};
+/* GRF_GPIO2A_IOMUX */
+enum {
+	GPIO2A7_SHIFT		= 14,
+	GPIO2A7_MASK		= 3 << GPIO2A7_SHIFT,
+	GPIO2A7_GPIO		= 0,
+	GPIO2A7_NAND_DQS,
+	GPIO2A7_EMMC_CLKOUT,
+
+	GPIO2A5_SHIFT		= 10,
+	GPIO2A5_MASK		= 3 << GPIO2A5_SHIFT,
+	GPIO2A5_GPIO		= 0,
+	GPIO2A5_NAND_WP,
+	GPIO2A5_EMMC_PWREN,
+
+	GPIO2A4_SHIFT		= 8,
+	GPIO2A4_MASK		= 3 << GPIO2A4_SHIFT,
+	GPIO2A4_GPIO		= 0,
+	GPIO2A4_NAND_RDY,
+	GPIO2A4_EMMC_CMD,
+
+	GPIO2A3_SHIFT		= 6,
+	GPIO2A3_MASK		= 3 << GPIO2A3_SHIFT,
+	GPIO2A3_GPIO		= 0,
+	GPIO2A3_NAND_RDN,
+	GPIO2A4_SPI1_CSN1,
+
+	GPIO2A2_SHIFT		= 4,
+	GPIO2A2_MASK		= 3 << GPIO2A2_SHIFT,
+	GPIO2A2_GPIO		= 0,
+	GPIO2A2_NAND_WRN,
+	GPIO2A4_SPI1_CSN0,
+
+	GPIO2A1_SHIFT		= 2,
+	GPIO2A1_MASK		= 3 << GPIO2A1_SHIFT,
+	GPIO2A1_GPIO		= 0,
+	GPIO2A1_NAND_CLE,
+	GPIO2A1_SPI1_TXD,
+
+	GPIO2A0_SHIFT		= 0,
+	GPIO2A0_MASK		= 3 << GPIO2A0_SHIFT,
+	GPIO2A0_GPIO		= 0,
+	GPIO2A0_NAND_ALE,
+	GPIO2A0_SPI1_RXD,
+};
+
+/* GRF_GPIO2B_IOMUX */
+enum {
+	GPIO2B7_SHIFT		= 14,
+	GPIO2B7_MASK		= 3 << GPIO2B7_SHIFT,
+	GPIO2B7_GPIO		= 0,
+	GPIO2B7_GMAC_RXER,
+
+	GPIO2B6_SHIFT		= 12,
+	GPIO2B6_MASK		= 3 << GPIO2B6_SHIFT,
+	GPIO2B6_GPIO		= 0,
+	GPIO2B6_GMAC_CLK,
+	GPIO2B6_MAC_LINK,
+
+	GPIO2B5_SHIFT		= 10,
+	GPIO2B5_MASK		= 3 << GPIO2B5_SHIFT,
+	GPIO2B5_GPIO		= 0,
+	GPIO2B5_GMAC_TXEN,
+
+	GPIO2B4_SHIFT		= 8,
+	GPIO2B4_MASK		= 3 << GPIO2B4_SHIFT,
+	GPIO2B4_GPIO		= 0,
+	GPIO2B4_GMAC_MDIO,
+
+	GPIO2B3_SHIFT		= 6,
+	GPIO2B3_MASK		= 3 << GPIO2B3_SHIFT,
+	GPIO2B3_GPIO		= 0,
+	GPIO2B3_GMAC_RXCLK,
+
+	GPIO2B2_SHIFT		= 4,
+	GPIO2B2_MASK		= 3 << GPIO2B2_SHIFT,
+	GPIO2B2_GPIO		= 0,
+	GPIO2B2_GMAC_CRS,
+
+	GPIO2B1_SHIFT		= 2,
+	GPIO2B1_MASK		= 3 << GPIO2B1_SHIFT,
+	GPIO2B1_GPIO		= 0,
+	GPIO2B1_GMAC_TXCLK,
+
+
+	GPIO2B0_SHIFT		= 0,
+	GPIO2B0_MASK		= 3 << GPIO2B0_SHIFT,
+	GPIO2B0_GPIO		= 0,
+	GPIO2B0_GMAC_RXDV,
+	GPIO2B0_MAC_SPEED_IOUT,
+};
+
+/* GRF_GPIO2C_IOMUX */
+enum {
+	GPIO2C7_SHIFT		= 14,
+	GPIO2C7_MASK		= 3 << GPIO2C7_SHIFT,
+	GPIO2C7_GPIO		= 0,
+	GPIO2C7_GMAC_TXD3,
+
+	GPIO2C6_SHIFT		= 12,
+	GPIO2C6_MASK		= 3 << GPIO2C6_SHIFT,
+	GPIO2C6_GPIO		= 0,
+	GPIO2C6_GMAC_TXD2,
+
+	GPIO2C5_SHIFT		= 10,
+	GPIO2C5_MASK		= 3 << GPIO2C5_SHIFT,
+	GPIO2C5_GPIO		= 0,
+	GPIO2C5_I2C2_SCL,
+	GPIO2C5_GMAC_RXD2,
+
+	GPIO2C4_SHIFT		= 8,
+	GPIO2C4_MASK		= 3 << GPIO2C4_SHIFT,
+	GPIO2C4_GPIO		= 0,
+	GPIO2C4_I2C2_SDA,
+	GPIO2C4_GMAC_RXD3,
+
+	GPIO2C3_SHIFT		= 6,
+	GPIO2C3_MASK		= 3 << GPIO2C3_SHIFT,
+	GPIO2C3_GPIO		= 0,
+	GPIO2C3_GMAC_TXD0,
+
+	GPIO2C2_SHIFT		= 4,
+	GPIO2C2_MASK		= 3 << GPIO2C2_SHIFT,
+	GPIO2C2_GPIO		= 0,
+	GPIO2C2_GMAC_TXD1,
+
+	GPIO2C1_SHIFT		= 2,
+	GPIO2C1_MASK		= 3 << GPIO2C1_SHIFT,
+	GPIO2C1_GPIO		= 0,
+	GPIO2C1_GMAC_RXD0,
+
+	GPIO2C0_SHIFT		= 0,
+	GPIO2C0_MASK		= 3 << GPIO2C0_SHIFT,
+	GPIO2C0_GPIO		= 0,
+	GPIO2C0_GMAC_RXD1,
+};
+
+/* GRF_GPIO2D_IOMUX */
+enum {
+	GPIO2D1_SHIFT		= 2,
+	GPIO2D1_MASK		= 3 << GPIO2D1_SHIFT,
+	GPIO2D1_GPIO		= 0,
+	GPIO2D1_GMAC_MDC,
+
+	GPIO2D0_SHIFT		= 0,
+	GPIO2D0_MASK		= 3,
+	GPIO2D0_GPIO		= 0,
+	GPIO2D0_GMAC_COL,
+};
+
+/* GRF_GPIO3C_IOMUX */
+enum {
+	GPIO3C6_SHIFT		= 12,
+	GPIO3C6_MASK		= 3 << GPIO3C6_SHIFT,
+	GPIO3C6_GPIO		= 0,
+	GPIO3C6_DRV_VBUS1,
+
+	GPIO3C5_SHIFT		= 10,
+	GPIO3C5_MASK		= 3 << GPIO3C5_SHIFT,
+	GPIO3C5_GPIO		= 0,
+	GPIO3C5_PWM10,
+
+	GPIO3C1_SHIFT		= 2,
+	GPIO3C1_MASK		= 3 << GPIO3C1_SHIFT,
+	GPIO3C1_GPIO		= 0,
+	GPIO3C1_DRV_VBUS,
+};
+
+/* GRF_GPIO3D_IOMUX */
+enum {
+	GPIO3D2_SHIFT	= 4,
+	GPIO3D2_MASK	= 3 << GPIO3D2_SHIFT,
+	GPIO3D2_GPIO	= 0,
+	GPIO3D2_PWM3,
+};
+
+/* GRF_IOFUNC_CON0 */
+enum {
+	CON_IOMUX_UART2SEL_SHIFT	= 10,
+	CON_IOMUX_UART2SEL_MASK	= 3 << CON_IOMUX_UART2SEL_SHIFT,
+	CON_IOMUX_UART2SEL_M0	= 0,
+	CON_IOMUX_UART2SEL_M1,
+	CON_IOMUX_UART2SEL_USBPHY,
+};
+
+/* GRF_MACPHY_CON0 */
+enum {
+	MACPHY_CFG_ENABLE_SHIFT = 0,
+	MACPHY_CFG_ENABLE_MASK  = 1 << MACPHY_CFG_ENABLE_SHIFT,
+};
+#endif
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 1e2ce65842..cbab46e388 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -1,5 +1,14 @@
 if ARCH_ROCKCHIP
 
+config ROCKCHIP_PX30
+	bool "Support Rockchip PX30"
+	select ARM64
+	help
+	  The Rockchip PX30 is a ARM-based SoC with a quad-core Cortex-A35
+	  including NEON and GPU, Mali-400 graphics, several DDR3 options
+	  and video codec support. Peripherals include Gigabit Ethernet,
+	  USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
+
 config ROCKCHIP_RK3036
 	bool "Support Rockchip RK3036"
 	select CPU_V7
@@ -231,6 +240,7 @@ config TPL_ROCKCHIP_BACK_TO_BROM
 
 config ROCKCHIP_BOOT_MODE_REG
 	hex "Rockchip boot mode flag register address"
+	default 0xff010200 if ROCKCHIP_PX30
 	default 0x200081c8 if ROCKCHIP_RK3036
 	default 0x100a0038 if ROCKCHIP_RK3128
 	default 0x20004040 if ROCKCHIP_RK3188
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 51b4575e62..4452117a73 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -32,6 +32,7 @@ endif
 
 obj-$(CONFIG_$(SPL_TPL_)RAM) += sdram_common.o
 
+obj-$(CONFIG_ROCKCHIP_PX30) += px30/
 obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036/
 obj-$(CONFIG_ROCKCHIP_RK3066) += rk3066/
 obj-$(CONFIG_ROCKCHIP_RK3128) += rk3128/
diff --git a/arch/arm/mach-rockchip/px30/Makefile b/arch/arm/mach-rockchip/px30/Makefile
new file mode 100644
index 0000000000..73d159c32a
--- /dev/null
+++ b/arch/arm/mach-rockchip/px30/Makefile
@@ -0,0 +1,10 @@
+#
+# (C) Copyright 2017 Rockchip Electronics Co., Ltd.
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+
+obj-y += clk_px30.o
+obj-y += syscon_px30.o
+obj-y += px30.o
diff --git a/arch/arm/mach-rockchip/px30/clk_px30.c b/arch/arm/mach-rockchip/px30/clk_px30.c
new file mode 100644
index 0000000000..9cadffb0fd
--- /dev/null
+++ b/arch/arm/mach-rockchip/px30/clk_px30.c
@@ -0,0 +1,32 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_px30.h>
+
+int rockchip_get_clk(struct udevice **devp)
+{
+	return uclass_get_device_by_driver(UCLASS_CLK,
+			DM_GET_DRIVER(rockchip_px30_cru), devp);
+}
+
+void *rockchip_get_cru(void)
+{
+	struct px30_clk_priv *priv;
+	struct udevice *dev;
+	int ret;
+
+	ret = rockchip_get_clk(&dev);
+	if (ret)
+		return ERR_PTR(ret);
+
+	priv = dev_get_priv(dev);
+
+	return priv->cru;
+}
diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c
new file mode 100644
index 0000000000..71cf3ce7f7
--- /dev/null
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/grf_px30.h>
+#include <asm/arch/hardware.h>
+#include <asm/armv8/mmu.h>
+
+static struct mm_region px30_mem_map[] = {
+	{
+		.virt = 0x0UL,
+		.phys = 0x0UL,
+		.size = 0xff000000UL,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+			 PTE_BLOCK_INNER_SHARE
+	}, {
+		.virt = 0xff000000UL,
+		.phys = 0xff000000UL,
+		.size = 0x01000000UL,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+			 PTE_BLOCK_NON_SHARE |
+			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
+	}, {
+		/* List terminator */
+		0,
+	}
+};
+
+struct mm_region *mem_map = px30_mem_map;
+
+#define SGRF_DDR_CON0 0x10150000
+
+int arch_cpu_init(void)
+{
+#ifdef CONFIG_SPL_BUILD
+	/* We do some SoC one time setting here. */
+	/* Disable the ddr secure region setting to make it non-secure */
+	rk_clrreg(SGRF_DDR_CON0, 0x4000);
+#endif
+	return 0;
+}
+#define GRF_BASE	0x11000000
+void board_debug_uart_init(void)
+{
+static struct px30_grf * const grf = (void *)GRF_BASE;
+	/* Enable early UART2 channel m0 on the px30 */
+	rk_clrsetreg(&grf->gpio1dl_iomux,
+		     GPIO1D3_MASK | GPIO1D2_MASK,
+		     GPIO1D3_UART2_RXM0 << GPIO1D3_SHIFT |
+		     GPIO1D2_UART2_TXM0 << GPIO1D2_SHIFT);
+	/* Set channel C as UART2 input */
+	rk_clrsetreg(&grf->iofunc_con0,
+		     CON_IOMUX_UART2SEL_MASK,
+		     CON_IOMUX_UART2SEL_M0 << CON_IOMUX_UART2SEL_SHIFT);
+}
diff --git a/arch/arm/mach-rockchip/px30/syscon_px30.c b/arch/arm/mach-rockchip/px30/syscon_px30.c
new file mode 100644
index 0000000000..47a5b3ded3
--- /dev/null
+++ b/arch/arm/mach-rockchip/px30/syscon_px30.c
@@ -0,0 +1,23 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+
+static const struct udevice_id px30_syscon_ids[] = {
+	{ .compatible = "rockchip,px30-pmu", .data = ROCKCHIP_SYSCON_PMU },
+	{ .compatible = "rockchip,px30-pmugrf", .data = ROCKCHIP_SYSCON_PMUGRF },
+	{ .compatible = "rockchip,px30-grf", .data = ROCKCHIP_SYSCON_GRF },
+	{ }
+};
+
+U_BOOT_DRIVER(syscon_px30) = {
+	.name = "px30_syscon",
+	.id = UCLASS_SYSCON,
+	.of_match = px30_syscon_ids,
+};
diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
new file mode 100644
index 0000000000..e9f17dd7a9
--- /dev/null
+++ b/include/configs/px30_common.h
@@ -0,0 +1,63 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __CONFIG_PX30_COMMON_H
+#define __CONFIG_PX30_COMMON_H
+
+#include "rockchip-common.h"
+
+#define CONFIG_SYS_MALLOC_LEN		(32 << 20)
+#define CONFIG_SYS_CBSIZE		1024
+#define CONFIG_SKIP_LOWLEVEL_INIT
+
+#define CONFIG_SPL_FRAMEWORK
+
+#define CONFIG_SYS_NS16550_MEM32
+
+#define CONFIG_SYS_TEXT_BASE		0x00200000
+#define CONFIG_SYS_INIT_SP_ADDR		0x00300000
+#define CONFIG_SYS_LOAD_ADDR		0x00800800
+#define CONFIG_SPL_STACK		0x00400000
+#define CONFIG_SPL_TEXT_BASE		0x00000000
+#define CONFIG_SPL_MAX_SIZE		0x10000
+#define CONFIG_SPL_BSS_START_ADDR	0x2000000
+#define CONFIG_SPL_BSS_MAX_SIZE		0x2000
+#define CONFIG_SYS_BOOTM_LEN		(64 << 20)	/* 64M */
+
+#define COUNTER_FREQUENCY		24000000
+
+#define GICD_BASE			0xFF811000
+#define GICC_BASE			0xFF812000
+
+#define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */
+
+/* MMC/SD IP block */
+#define CONFIG_BOUNCE_BUFFER
+
+#define CONFIG_SYS_SDRAM_BASE		0
+#define CONFIG_NR_DRAM_BANKS		1
+#define SDRAM_MAX_SIZE			0xff000000
+#define SDRAM_BANK_SIZE			(2UL << 30)
+
+
+#ifndef CONFIG_SPL_BUILD
+
+#define ENV_MEM_LAYOUT_SETTINGS \
+	"scriptaddr=0x00500000\0" \
+	"pxefile_addr_r=0x00600000\0" \
+	"fdt_addr_r=0x01f00000\0" \
+	"kernel_addr_r=0x02080000\0" \
+	"ramdisk_addr_r=0x04000000\0"
+
+#include <config_distro_bootcmd.h>
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	ENV_MEM_LAYOUT_SETTINGS \
+	"partitions=" PARTS_DEFAULT \
+	BOOTENV
+
+#endif
+
+#endif

commit 5eeb396bc2d65e95bffd9db7b21e552b53009bb6
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 22 15:08:12 2018 +0800

    rockchip: px30: add sdram driver
    
    This driver only add support to ram frame work, do not have really
    dram init driver.
    
    Change-Id: I4c079bcbfea1fc1079df536cf505b8ca87848f44
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index 1a1e5578ca..2cae3c6061 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -11,3 +11,4 @@ obj-$(CONFIG_ROCKCHIP_RK322X) = sdram_rk322x.o
 obj-$(CONFIG_ROCKCHIP_RK3288) = sdram_rk3288.o
 obj-$(CONFIG_ROCKCHIP_RK3328) = sdram_rk3328.o
 obj-$(CONFIG_ROCKCHIP_RK3399) = sdram_rk3399.o
+obj-$(CONFIG_ROCKCHIP_PX30) = sdram_px30.o
diff --git a/drivers/ram/rockchip/sdram_px30.c b/drivers/ram/rockchip/sdram_px30.c
new file mode 100644
index 0000000000..a23e220571
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_px30.c
@@ -0,0 +1,60 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:     GPL-2.0
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <ram.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/grf_px30.h>
+#include <asm/arch/sdram_common.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+struct dram_info {
+	struct ram_info info;
+	struct px30_pmugrf *pmugrf;
+};
+
+static int px30_dmc_probe(struct udevice *dev)
+{
+	struct dram_info *priv = dev_get_priv(dev);
+
+	priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	debug("%s: pmugrf=%p\n", __func__, priv->pmugrf);
+	priv->info.base = CONFIG_SYS_SDRAM_BASE;
+	priv->info.size = rockchip_sdram_size(
+				(phys_addr_t)&priv->pmugrf->os_reg[2]);
+
+	return 0;
+}
+
+static int px30_dmc_get_info(struct udevice *dev, struct ram_info *info)
+{
+	struct dram_info *priv = dev_get_priv(dev);
+
+	*info = priv->info;
+
+	return 0;
+}
+
+static struct ram_ops px30_dmc_ops = {
+	.get_info = px30_dmc_get_info,
+};
+
+
+static const struct udevice_id px30_dmc_ids[] = {
+	{ .compatible = "rockchip,px30-dmc" },
+	{ }
+};
+
+U_BOOT_DRIVER(dmc_px30) = {
+	.name = "rockchip_px30_dmc",
+	.id = UCLASS_RAM,
+	.of_match = px30_dmc_ids,
+	.ops = &px30_dmc_ops,
+	.probe = px30_dmc_probe,
+	.priv_auto_alloc_size = sizeof(struct dram_info),
+};

commit c876650a87da70b4cfd38ea7728d669d700c176d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Feb 5 10:45:28 2018 +0800

    rockchip: add chip info interface
    
    Change-Id: I916ef9d22370bf464569bf400e0cab61d6107d6a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/chip_info.h b/arch/arm/include/asm/arch-rockchip/chip_info.h
new file mode 100644
index 0000000000..b3e5a8918a
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/chip_info.h
@@ -0,0 +1,6 @@
+#ifndef _ROCKCHIP_CHIP_INFO_H_
+#define _ROCKCHIP_CHIP_INFO_H_
+
+int rockchip_get_chip_info(unsigned int chip_info[]);
+int rockchip_rockusb_get_chip_info(unsigned int chip_info[]);
+#endif
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index fa640b930f..51b4575e62 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -22,6 +22,7 @@ ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
 # meaning "turn it off".
 obj-y += boot_mode.o
 obj-y += board.o
+obj-y += chip_info.o
 
 obj-$(CONFIG_ROCKCHIP_CRC) += rockchip_crc.o
 obj-$(CONFIG_ROCKCHIP_SMCCC) += rockchip_smccc.o
diff --git a/arch/arm/mach-rockchip/chip_info.c b/arch/arm/mach-rockchip/chip_info.c
new file mode 100644
index 0000000000..1bfee8ef92
--- /dev/null
+++ b/arch/arm/mach-rockchip/chip_info.c
@@ -0,0 +1,80 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/arch/chip_info.h>
+
+/*
+ * rk3066 chip info:	{0x33303041, 0x32303131, 0x31313131, 0x56313031} - 300A20111111V101
+ * rk3168 chip info:	{0x33303042, 0x32303132, 0x31303031, 0x56313030} - 300B20121011V100
+ * rk3036 chip info:	{0x33303141, 0x32303134, 0x30343231, 0x56313031} - 301A20140421V101
+ * rk3188 chip info:	{0x33313042, 0x32303132, 0x31313330, 0x56313030} - 310B20121130V100
+ * rk3188_plus chip info:{0x33313042, 0x32303133, 0x30313331, 0x56313031} - 310B20130131V101
+ * rk312x chip info:	{0x33313043, 0x32303134, 0x30343239, 0x56313030} - 310C20140429V100
+ * rk312xb chip info:	{0x33313044, 0x32303134, 0x30373330, 0x56313030} - 310D20140730V100
+ * rk3126c chip info:	{0x33313044, 0x32303137, 0x30343137, 0x56323030} - 310D20170417V200
+ * rk3288 chip info:	{0x33323041, 0x32303133, 0x31313136, 0x56313030} - 320A20131116V100
+ * rk322x chip info:	{0x33323042, 0x32303135, 0x31313136, 0x56313030} - 320B20151116V100
+ * rk3368 chip info:	{0x33333041, 0x32303134, 0x30393238, 0x56313030} - 330A20140928V100
+ * rk3366 chip info:	{0x33333042, 0x32303135, 0x30363234, 0x56313030} - 330B20150624V100
+ * rk3399 chip info:	{0x33333043, 0x32303136, 0x30313138, 0x56313030} - 330B20160118V100
+ * rk322xh chip info:	{0x33323043, 0x32303136, 0x31313031, 0x56313030} - 320C20161101V100
+ * rk3326 chip info:	{0x33333044, 0x32303137, 0x31323134, 0x56313030} - 330D20171214V100
+ */
+int rockchip_get_chip_info(unsigned int chip_info[])
+{
+	if (chip_info == NULL)
+		return -EINVAL;
+
+#if defined(CONFIG_ROCKCHIP_RK3036)
+	chip_info[0] = 0x33303041;
+#elif defined(CONFIG_ROCKCHIP_RK3188)
+	chip_info[0] = 0x33313042;
+#elif defined(CONFIG_ROCKCHIP_RK3126)
+	chip_info[0] = 0x33313044;
+#elif defined(CONFIG_ROCKCHIP_RK322X)
+	chip_info[0] = 0x33323042;
+#elif defined(CONFIG_ROCKCHIP_RK3288)
+	chip_info[0] = 0x33323041;
+#elif defined(CONFIG_ROCKCHIP_RK3328)
+	chip_info[0] = 0x33323043;
+	chip_info[3] = 0x56313030;
+#elif defined(CONFIG_ROCKCHIP_RK3368)
+	chip_info[0] = 0x33333041;
+	chip_info[3] = 0x56313030;
+#elif defined(CONFIG_ROCKCHIP_RK3399)
+	chip_info[0] = 0x33333043;
+	chip_info[3] = 0x56313030;
+#elif defined(CONFIG_ROCKCHIP_PX30)
+	chip_info[0] = 0x33333044;
+#endif
+
+	return 0;
+}
+
+
+int rockchip_rockusb_get_chip_info(unsigned int chip_info[])
+{
+	int err;
+
+	err = rockchip_get_chip_info(chip_info);
+	if (!err) {
+	/* Fixup chip info for RockUsb */
+#if defined(CONFIG_ROCKCHIP_RK3036)
+		chip_info[0] = 0x33303341;
+#elif defined(CONFIG_ROCKCHIP_RK3126) || defined(CONFIG_ROCKCHIP_RK3128)
+		chip_info[0] = 0x33313241;
+#elif defined(CONFIG_ROCKCHIP_RK322X)
+		chip_info[0] = 0x33323241;
+#elif defined(CONFIG_ROCKCHIP_RK3328)
+		chip_info[0] = 0x33323248;
+#elif defined(CONFIG_ROCKCHIP_RK3399)
+		chip_info[0] = 0x33333043;
+#endif
+	}
+
+	return err;
+}

commit 27f8f3a3f706c15f7e40073280ebbd02792f7bd3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Feb 5 15:05:27 2018 +0800

    rockchip: dts: rk312x: fix emmc and sdmmc pinctrl definition error
    
    Change-Id: Ibdf85e08d7c74d7e9880a631c8ec6d872cb276a0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3128.dtsi b/arch/arm/dts/rk3128.dtsi
index 0b42a268b0..e3223b2402 100644
--- a/arch/arm/dts/rk3128.dtsi
+++ b/arch/arm/dts/rk3128.dtsi
@@ -703,12 +703,8 @@
 			#interrupt-cells = <2>;
 		};
 
-		pcfg_pull_up: pcfg-pull-up {
-			bias-pull-up;
-		};
-
-		pcfg_pull_down: pcfg-pull-down {
-			bias-pull-down;
+		pcfg_pull_default: pcfg_pull_default {
+			bias-pull-pin-default;
 		};
 
 		pcfg_pull_none: pcfg-pull-none {
@@ -716,35 +712,46 @@
 		};
 
 		emmc {
-			/*
-			 * We run eMMC at max speed; bump up drive strength.
-			 * We also have external pulls, so disable the internal ones.
-			 */
-
 			emmc_clk: emmc-clk {
-				rockchip,pins = <2 7 RK_FUNC_2 &pcfg_pull_none>;
+				rockchip,pins = <2 RK_PA7 2 &pcfg_pull_none>;
 			};
 
 			emmc_cmd: emmc-cmd {
-				rockchip,pins = <2 4 RK_FUNC_2 &pcfg_pull_none>;
+				rockchip,pins = <1 RK_PC6 2 &pcfg_pull_default>;
+			};
+
+			emmc_cmd1: emmc-cmd1 {
+				rockchip,pins = <2 RK_PA4 2 &pcfg_pull_default>;
 			};
 
-			emmc_pwren: emmc-pwren {
-				rockchip,pins = <2 5 RK_FUNC_2 &pcfg_pull_none>;
+			emmc_pwr: emmc-pwr {
+				rockchip,pins = <2 RK_PA5 2 &pcfg_pull_default>;
+			};
+
+			emmc_bus1: emmc-bus1 {
+				rockchip,pins = <1 RK_PD0 2 &pcfg_pull_default>;
+			};
+
+			emmc_bus4: emmc-bus4 {
+				rockchip,pins = <1 RK_PD0 2 &pcfg_pull_default>,
+						<1 RK_PD1 2 &pcfg_pull_default>,
+						<1 RK_PD2 2 &pcfg_pull_default>,
+						<1 RK_PD3 2 &pcfg_pull_default>;
 			};
 
 			emmc_bus8: emmc-bus8 {
-				rockchip,pins = <1 24 RK_FUNC_2 &pcfg_pull_none>,
-						<1 25 RK_FUNC_2 &pcfg_pull_none>,
-						<1 26 RK_FUNC_2 &pcfg_pull_none>,
-						<1 27 RK_FUNC_2 &pcfg_pull_none>,
-						<1 28 RK_FUNC_2 &pcfg_pull_none>,
-						<1 29 RK_FUNC_2 &pcfg_pull_none>,
-						<1 30 RK_FUNC_2 &pcfg_pull_none>,
-						<1 31 RK_FUNC_2 &pcfg_pull_none>;
+				rockchip,pins = <1 RK_PD0 2 &pcfg_pull_default>,
+						<1 RK_PD1 2 &pcfg_pull_default>,
+						<1 RK_PD2 2 &pcfg_pull_default>,
+						<1 RK_PD3 2 &pcfg_pull_default>,
+						<1 RK_PD4 2 &pcfg_pull_default>,
+						<1 RK_PD5 2 &pcfg_pull_default>,
+						<1 RK_PD6 2 &pcfg_pull_default>,
+						<1 RK_PD7 2 &pcfg_pull_default>;
 			};
 		};
 
+
 		nandc{
 			nandc_ale:nandc-ale {
 				rockchip,pins = <0 18 RK_FUNC_1 &pcfg_pull_none>;
@@ -811,22 +818,22 @@
 			};
 
 			sdmmc_cmd: sdmmc-cmd {
-				rockchip,pins = <1 RK_PC1 1 &pcfg_pull_up>;
+				rockchip,pins = <1 RK_PC1 1 &pcfg_pull_default>;
 			};
 
 			sdmmc_wp: sdmmc-wp {
-				rockchip,pins = <1 RK_PA7 1 &pcfg_pull_up>;
+				rockchip,pins = <1 RK_PA7 1 &pcfg_pull_default>;
 			};
 
 			sdmmc_pwren: sdmmc-pwren {
-				rockchip,pins = <1 RK_PB6 1 &pcfg_pull_up>;
+				rockchip,pins = <1 RK_PB6 1 &pcfg_pull_default>;
 			};
 
 			sdmmc_bus4: sdmmc-bus4 {
-				rockchip,pins = <1 RK_PC2 1 &pcfg_pull_up>,
-						<1 RK_PC3 1 &pcfg_pull_up>,
-						<1 RK_PC4 1 &pcfg_pull_up>,
-						<1 RK_PC5 1 &pcfg_pull_up>;
+				rockchip,pins = <1 RK_PC2 1 &pcfg_pull_default>,
+						<1 RK_PC3 1 &pcfg_pull_default>,
+						<1 RK_PC4 1 &pcfg_pull_default>,
+						<1 RK_PC5 1 &pcfg_pull_default>;
 			};
 		};
 

commit 3174f32993be4e4af65421706e011ef9b9171b89
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Jan 27 18:36:16 2018 +0800

    ARM: dts: rk322x: Correct the uart2 pin configuration
    
    Change-Id: I742d6ff8ac70c3d7371d58ee0fe7c59643b97896
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/dts/rk322x.dtsi b/arch/arm/dts/rk322x.dtsi
index 246013d604..2757f93860 100644
--- a/arch/arm/dts/rk322x.dtsi
+++ b/arch/arm/dts/rk322x.dtsi
@@ -207,7 +207,7 @@
 		clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
 		clock-names = "baudclk", "apb_pclk";
 		pinctrl-names = "default";
-		pinctrl-0 = <&uart2_xfer>;
+		pinctrl-0 = <&uart21_xfer>;
 		reg-shift = <2>;
 		reg-io-width = <4>;
 		status = "disabled";
@@ -766,7 +766,7 @@
 
 		uart2 {
 			uart2_xfer: uart2-xfer {
-				rockchip,pins = <1 RK_PC2 RK_FUNC_2 &pcfg_pull_none>,
+				rockchip,pins = <1 RK_PC2 RK_FUNC_2 &pcfg_pull_up>,
 						<1 RK_PC3 RK_FUNC_2 &pcfg_pull_none>;
 			};
 
@@ -778,6 +778,13 @@
 				rockchip,pins = <0 RK_PD0 RK_FUNC_1 &pcfg_pull_none>;
 			};
 		};
+
+		uart2-1 {
+			uart21_xfer: uart21-xfer {
+				rockchip,pins = <1 10 RK_FUNC_2 &pcfg_pull_up>,
+						<1 9 RK_FUNC_2 &pcfg_pull_none>;
+			};
+		};
 	};
 
 	dmc: dmc@11200000 {

commit 0d4b0063b62714bce5a24f40c1096f907d9b2205
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Jan 27 17:19:39 2018 +0800

    pinctrl: rockchip: Clean the unused rockchip pinctrl drivers
    
    If we used the pinctrl-rockchip driver, these code is not needed,
    so remove them.
    
    Change-Id: Ie419b40664215b4b23a97138398102745f9875e6
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/pinctrl/rockchip/Makefile b/drivers/pinctrl/rockchip/Makefile
deleted file mode 100644
index f846229ab2..0000000000
--- a/drivers/pinctrl/rockchip/Makefile
+++ /dev/null
@@ -1,16 +0,0 @@
-#
-# Copyright (c) 2017 Rockchip Electronics Co., Ltd
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-obj-$(CONFIG_PINCTRL_ROCKCHIP_RK3036) += pinctrl_rk3036.o
-obj-$(CONFIG_PINCTRL_ROCKCHIP_RK3066) += pinctrl_rk3066.o
-obj-$(CONFIG_PINCTRL_ROCKCHIP_RK3128) += pinctrl_rk3128.o
-obj-$(CONFIG_PINCTRL_ROCKCHIP_RK3188) += pinctrl_rk3188.o
-obj-$(CONFIG_PINCTRL_ROCKCHIP_RK322X) += pinctrl_rk322x.o
-obj-$(CONFIG_PINCTRL_ROCKCHIP_RK3288) += pinctrl_rk3288.o
-obj-$(CONFIG_PINCTRL_ROCKCHIP_RK3328) += pinctrl_rk3328.o
-obj-$(CONFIG_PINCTRL_ROCKCHIP_RK3368) += pinctrl_rk3368.o
-obj-$(CONFIG_PINCTRL_ROCKCHIP_RK3399) += pinctrl_rk3399.o
-obj-$(CONFIG_PINCTRL_ROCKCHIP_RV1108) += pinctrl_rv1108.o
diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3036.c b/drivers/pinctrl/rockchip/pinctrl_rk3036.c
deleted file mode 100644
index 9215d6c96e..0000000000
--- a/drivers/pinctrl/rockchip/pinctrl_rk3036.c
+++ /dev/null
@@ -1,265 +0,0 @@
-/*
- * Pinctrl driver for Rockchip 3036 SoCs
- * (C) Copyright 2015 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <syscon.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/grf_rk3036.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/periph.h>
-#include <dm/pinctrl.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-struct rk3036_pinctrl_priv {
-	struct rk3036_grf *grf;
-};
-
-static void pinctrl_rk3036_pwm_config(struct rk3036_grf *grf, int pwm_id)
-{
-	switch (pwm_id) {
-	case PERIPH_ID_PWM0:
-		rk_clrsetreg(&grf->gpio0d_iomux, GPIO0D2_MASK,
-			     GPIO0D2_PWM0 << GPIO0D2_SHIFT);
-		break;
-	case PERIPH_ID_PWM1:
-		rk_clrsetreg(&grf->gpio0a_iomux, GPIO0A0_MASK,
-			     GPIO0A0_PWM1 << GPIO0A0_SHIFT);
-		break;
-	case PERIPH_ID_PWM2:
-		rk_clrsetreg(&grf->gpio0a_iomux, GPIO0A1_MASK,
-			     GPIO0A1_PWM2 << GPIO0A1_SHIFT);
-		break;
-	case PERIPH_ID_PWM3:
-		rk_clrsetreg(&grf->gpio0a_iomux, GPIO0D3_MASK,
-			     GPIO0D3_PWM3 << GPIO0D3_SHIFT);
-		break;
-	default:
-		debug("pwm id = %d iomux error!\n", pwm_id);
-		break;
-	}
-}
-
-static void pinctrl_rk3036_i2c_config(struct rk3036_grf *grf, int i2c_id)
-{
-	switch (i2c_id) {
-	case PERIPH_ID_I2C0:
-		rk_clrsetreg(&grf->gpio0a_iomux,
-			     GPIO0A1_MASK | GPIO0A0_MASK,
-			     GPIO0A1_I2C0_SDA << GPIO0A1_SHIFT |
-			     GPIO0A0_I2C0_SCL << GPIO0A0_SHIFT);
-
-		break;
-	case PERIPH_ID_I2C1:
-		rk_clrsetreg(&grf->gpio0a_iomux,
-			     GPIO0A3_MASK | GPIO0A2_MASK,
-			     GPIO0A3_I2C1_SDA << GPIO0A3_SHIFT |
-			     GPIO0A2_I2C1_SCL << GPIO0A2_SHIFT);
-		break;
-	case PERIPH_ID_I2C2:
-		rk_clrsetreg(&grf->gpio2c_iomux,
-			     GPIO2C5_MASK | GPIO2C4_MASK,
-			     GPIO2C5_I2C2_SCL << GPIO2C5_SHIFT |
-			     GPIO2C4_I2C2_SDA << GPIO2C4_SHIFT);
-
-		break;
-	}
-}
-
-static void pinctrl_rk3036_spi_config(struct rk3036_grf *grf, int cs)
-{
-	switch (cs) {
-	case 0:
-		rk_clrsetreg(&grf->gpio1d_iomux, GPIO1D6_MASK,
-			     GPIO1D6_SPI_CSN0 << GPIO1D6_SHIFT);
-		break;
-	case 1:
-		rk_clrsetreg(&grf->gpio1d_iomux, GPIO1D7_MASK,
-			     GPIO1D7_SPI_CSN1 << GPIO1D7_SHIFT);
-		break;
-	}
-	rk_clrsetreg(&grf->gpio1d_iomux,
-		     GPIO1D5_MASK | GPIO1D4_MASK,
-		     GPIO1D5_SPI_TXD << GPIO1D5_SHIFT |
-		     GPIO1D4_SPI_RXD << GPIO1D4_SHIFT);
-
-	rk_clrsetreg(&grf->gpio2a_iomux, GPIO2A0_MASK,
-		     GPIO2A0_SPI_CLK << GPIO2A0_SHIFT);
-}
-
-static void pinctrl_rk3036_uart_config(struct rk3036_grf *grf, int uart_id)
-{
-	switch (uart_id) {
-	case PERIPH_ID_UART0:
-		rk_clrsetreg(&grf->gpio0c_iomux,
-			     GPIO0C3_MASK | GPIO0C2_MASK |
-			     GPIO0C1_MASK |  GPIO0C0_MASK,
-			     GPIO0C3_UART0_CTSN << GPIO0C3_SHIFT |
-			     GPIO0C2_UART0_RTSN << GPIO0C2_SHIFT |
-			     GPIO0C1_UART0_SIN << GPIO0C1_SHIFT |
-			     GPIO0C0_UART0_SOUT << GPIO0C0_SHIFT);
-		break;
-	case PERIPH_ID_UART1:
-		rk_clrsetreg(&grf->gpio2c_iomux,
-			     GPIO2C7_MASK | GPIO2C6_MASK,
-			     GPIO2C7_UART1_SOUT << GPIO2C7_SHIFT |
-			     GPIO2C6_UART1_SIN << GPIO2C6_SHIFT);
-		break;
-	case PERIPH_ID_UART2:
-		rk_clrsetreg(&grf->gpio1c_iomux,
-			     GPIO1C3_MASK | GPIO1C2_MASK,
-			     GPIO1C3_UART2_SOUT << GPIO1C3_SHIFT |
-			     GPIO1C2_UART2_SIN << GPIO1C2_SHIFT);
-		break;
-	}
-}
-
-static void pinctrl_rk3036_sdmmc_config(struct rk3036_grf *grf, int mmc_id)
-{
-	switch (mmc_id) {
-	case PERIPH_ID_EMMC:
-		rk_clrsetreg(&grf->gpio1d_iomux, 0xffff,
-			     GPIO1D7_EMMC_D7 << GPIO1D7_SHIFT |
-			     GPIO1D6_EMMC_D6 << GPIO1D6_SHIFT |
-			     GPIO1D5_EMMC_D5 << GPIO1D5_SHIFT |
-			     GPIO1D4_EMMC_D4 << GPIO1D4_SHIFT |
-			     GPIO1D3_EMMC_D3 << GPIO1D3_SHIFT |
-			     GPIO1D2_EMMC_D2 << GPIO1D2_SHIFT |
-			     GPIO1D1_EMMC_D1 << GPIO1D1_SHIFT |
-			     GPIO1D0_EMMC_D0 << GPIO1D0_SHIFT);
-		rk_clrsetreg(&grf->gpio2a_iomux,
-			     GPIO2A4_MASK | GPIO2A1_MASK,
-			     GPIO2A4_EMMC_CMD << GPIO2A4_SHIFT |
-			     GPIO2A1_EMMC_CLKOUT << GPIO2A1_SHIFT);
-		break;
-	case PERIPH_ID_SDCARD:
-		rk_clrsetreg(&grf->gpio1c_iomux, 0xffff,
-			     GPIO1C5_MMC0_D3 << GPIO1C5_SHIFT |
-			     GPIO1C4_MMC0_D2 << GPIO1C4_SHIFT |
-			     GPIO1C3_MMC0_D1 << GPIO1C3_SHIFT |
-			     GPIO1C2_MMC0_D0 << GPIO1C2_SHIFT |
-			     GPIO1C1_MMC0_DETN << GPIO1C1_SHIFT |
-			     GPIO1C0_MMC0_CLKOUT << GPIO1C0_SHIFT);
-		break;
-	}
-}
-
-static int rk3036_pinctrl_request(struct udevice *dev, int func, int flags)
-{
-	struct rk3036_pinctrl_priv *priv = dev_get_priv(dev);
-
-	debug("%s: func=%x, flags=%x\n", __func__, func, flags);
-	switch (func) {
-	case PERIPH_ID_PWM0:
-	case PERIPH_ID_PWM1:
-	case PERIPH_ID_PWM2:
-	case PERIPH_ID_PWM3:
-		pinctrl_rk3036_pwm_config(priv->grf, func);
-		break;
-	case PERIPH_ID_I2C0:
-	case PERIPH_ID_I2C1:
-	case PERIPH_ID_I2C2:
-		pinctrl_rk3036_i2c_config(priv->grf, func);
-		break;
-	case PERIPH_ID_SPI0:
-		pinctrl_rk3036_spi_config(priv->grf, flags);
-		break;
-	case PERIPH_ID_UART0:
-	case PERIPH_ID_UART1:
-	case PERIPH_ID_UART2:
-		pinctrl_rk3036_uart_config(priv->grf, func);
-		break;
-	case PERIPH_ID_SDMMC0:
-	case PERIPH_ID_SDMMC1:
-		pinctrl_rk3036_sdmmc_config(priv->grf, func);
-		break;
-	default:
-		return -EINVAL;
-	}
-
-	return 0;
-}
-
-static int rk3036_pinctrl_get_periph_id(struct udevice *dev,
-					struct udevice *periph)
-{
-	u32 cell[3];
-	int ret;
-
-	ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(periph),
-				   "interrupts", cell, ARRAY_SIZE(cell));
-	if (ret < 0)
-		return -EINVAL;
-
-	switch (cell[1]) {
-	case 14:
-		return PERIPH_ID_SDCARD;
-	case 16:
-		return PERIPH_ID_EMMC;
-	case 20:
-		return PERIPH_ID_UART0;
-	case 21:
-		return PERIPH_ID_UART1;
-	case 22:
-		return PERIPH_ID_UART2;
-	case 23:
-		return PERIPH_ID_SPI0;
-	case 24:
-		return PERIPH_ID_I2C0;
-	case 25:
-		return PERIPH_ID_I2C1;
-	case 26:
-		return PERIPH_ID_I2C2;
-	case 30:
-		return PERIPH_ID_PWM0;
-	}
-	return -ENOENT;
-}
-
-static int rk3036_pinctrl_set_state_simple(struct udevice *dev,
-					   struct udevice *periph)
-{
-	int func;
-
-	func = rk3036_pinctrl_get_periph_id(dev, periph);
-	if (func < 0)
-		return func;
-	return rk3036_pinctrl_request(dev, func, 0);
-}
-
-static struct pinctrl_ops rk3036_pinctrl_ops = {
-	.set_state_simple	= rk3036_pinctrl_set_state_simple,
-	.request	= rk3036_pinctrl_request,
-	.get_periph_id	= rk3036_pinctrl_get_periph_id,
-};
-
-static int rk3036_pinctrl_probe(struct udevice *dev)
-{
-	struct rk3036_pinctrl_priv *priv = dev_get_priv(dev);
-
-	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	debug("%s: grf=%p\n", __func__, priv->grf);
-	return 0;
-}
-
-static const struct udevice_id rk3036_pinctrl_ids[] = {
-	{ .compatible = "rockchip,rk3036-pinctrl" },
-	{ }
-};
-
-U_BOOT_DRIVER(pinctrl_rk3036) = {
-	.name		= "pinctrl_rk3036",
-	.id		= UCLASS_PINCTRL,
-	.of_match	= rk3036_pinctrl_ids,
-	.priv_auto_alloc_size = sizeof(struct rk3036_pinctrl_priv),
-	.ops		= &rk3036_pinctrl_ops,
-	.bind		= dm_scan_fdt_dev,
-	.probe		= rk3036_pinctrl_probe,
-};
diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3066.c b/drivers/pinctrl/rockchip/pinctrl_rk3066.c
deleted file mode 100644
index 79e0a54d42..0000000000
--- a/drivers/pinctrl/rockchip/pinctrl_rk3066.c
+++ /dev/null
@@ -1,340 +0,0 @@
-/*
- * Pinctrl driver for Rockchip 3066 SoCs
- * (C) Copyright 2017 Paweł Jarosz <paweljarosz3691@gmail.com>
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <dm.h>
-#include <dm/device.h>
-#include <errno.h>
-#include <syscon.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/grf_rk3066.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/periph.h>
-#include <dm/pinctrl.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-struct rk3066_pinctrl_priv {
-	struct rk3066_grf *grf;
-};
-
-static void pinctrl_rk3066_pwm_config(struct rk3066_grf *grf, int pwm_id)
-{
-	switch (pwm_id) {
-	case PERIPH_ID_PWM0:
-		rk_clrsetreg(&grf->gpio0a_iomux, GPIO0A3_MASK,
-			     GPIO0A3_PWM0 << GPIO0A3_SHIFT);
-		break;
-	case PERIPH_ID_PWM1:
-		rk_clrsetreg(&grf->gpio0a_iomux, GPIO0A4_MASK,
-			     GPIO0A4_PWM1 << GPIO0A4_SHIFT);
-		break;
-	case PERIPH_ID_PWM2:
-		rk_clrsetreg(&grf->gpio0d_iomux, GPIO0D6_MASK,
-			     GPIO0D6_PWM2 << GPIO0D6_SHIFT);
-		break;
-	case PERIPH_ID_PWM3:
-		rk_clrsetreg(&grf->gpio0d_iomux, GPIO0D7_MASK,
-			     GPIO0D7_PWM3 << GPIO0D7_SHIFT);
-		break;
-	default:
-		debug("pwm id = %d iomux error!\n", pwm_id);
-		break;
-	}
-}
-
-static void pinctrl_rk3066_i2c_config(struct rk3066_grf *grf, int i2c_id)
-{
-	switch (i2c_id) {
-	case PERIPH_ID_I2C0:
-		rk_clrsetreg(&grf->gpio2d_iomux,
-			     GPIO2D4_MASK | GPIO2D5_MASK,
-			     GPIO2D4_I2C0_SDA << GPIO2D4_SHIFT |
-			     GPIO2D5_I2C0_SCL << GPIO2D5_SHIFT);
-		rk_clrsetreg(&grf->soc_con1, 1 << RKI2C0_SEL_SHIFT,
-					     1 << RKI2C0_SEL_SHIFT);
-		break;
-	case PERIPH_ID_I2C1:
-		rk_clrsetreg(&grf->gpio2d_iomux,
-			     GPIO2D6_MASK | GPIO2D7_MASK,
-			     GPIO2D6_I2C1_SDA << GPIO2D6_SHIFT |
-			     GPIO2D7_I2C1_SCL << GPIO2D7_SHIFT);
-		rk_clrsetreg(&grf->soc_con1, 1 << RKI2C1_SEL_SHIFT,
-					     1 << RKI2C1_SEL_SHIFT);
-		break;
-	case PERIPH_ID_I2C2:
-		rk_clrsetreg(&grf->gpio3a_iomux,
-			     GPIO3A1_MASK | GPIO3A0_MASK,
-			     GPIO3A1_I2C2_SCL << GPIO3A1_SHIFT |
-			     GPIO3A0_I2C2_SDA << GPIO3A0_SHIFT);
-		rk_clrsetreg(&grf->soc_con1, 1 << RKI2C2_SEL_SHIFT,
-					     1 << RKI2C2_SEL_SHIFT);
-	case PERIPH_ID_I2C3:
-		rk_clrsetreg(&grf->gpio3a_iomux,
-			     GPIO3A3_MASK | GPIO3A2_MASK,
-			     GPIO3A3_I2C3_SCL << GPIO3A3_SHIFT |
-			     GPIO3A2_I2C3_SDA << GPIO3A2_SHIFT);
-		rk_clrsetreg(&grf->soc_con1, 1 << RKI2C3_SEL_SHIFT,
-					     1 << RKI2C3_SEL_SHIFT);
-	case PERIPH_ID_I2C4:
-		rk_clrsetreg(&grf->gpio3a_iomux,
-			     GPIO3A5_MASK | GPIO3A4_MASK,
-			     GPIO3A5_I2C4_SCL << GPIO3A5_SHIFT |
-			     GPIO3A4_I2C4_SDA << GPIO3A4_SHIFT);
-		rk_clrsetreg(&grf->soc_con1, 1 << RKI2C4_SEL_SHIFT,
-					     1 << RKI2C4_SEL_SHIFT);
-		break;
-	}
-}
-
-static void pinctrl_rk3066_spi_config(struct rk3066_grf *grf, int spi_id, int cs)
-{
-	switch (spi_id) {
-	case PERIPH_ID_SPI0:
-		rk_clrsetreg(&grf->gpio1a_iomux,
-			     GPIO1A7_MASK | GPIO1A6_MASK | GPIO1A5_MASK,
-			     GPIO1A7_SPI0_TXD << GPIO1A7_SHIFT |
-			     GPIO1A6_SPI0_RXD << GPIO1A6_SHIFT |
-			     GPIO1A5_SPI0_CLK << GPIO1A5_SHIFT);
-		if(cs == 0)
-			rk_clrsetreg(&grf->gpio1a_iomux,
-				     GPIO1A4_MASK,
-				     GPIO1A4_SPI0_CSN0 << GPIO1A4_SHIFT);
-		else
-			rk_clrsetreg(&grf->gpio4b_iomux,
-				     GPIO4B7_MASK,
-				     GPIO4B7_SPI0_CSN1 << GPIO4B7_SHIFT);
-		break;
-	case PERIPH_ID_SPI1:
-		rk_clrsetreg(&grf->gpio2c_iomux,
-			     GPIO2C5_MASK | GPIO2C6_MASK | GPIO2C3_MASK,
-			     GPIO2C5_SPI1_TXD << GPIO2C5_SHIFT |
-			     GPIO2C6_SPI1_RXD << GPIO2C6_SHIFT |
-			     GPIO2C3_SPI1_CLK << GPIO2C3_SHIFT);
-		if(cs == 0)
-			rk_clrsetreg(&grf->gpio2c_iomux,
-				     GPIO2C4_MASK,
-				     GPIO2C4_SPI1_CSN0 << GPIO2C4_SHIFT);
-		else
-			rk_clrsetreg(&grf->gpio2c_iomux,
-				     GPIO2C7_MASK,
-				     GPIO2C7_SPI1_CSN1 << GPIO2C7_SHIFT);
-		break;
-	}
-}
-
-static void pinctrl_rk3066_uart_config(struct rk3066_grf *grf, int uart_id)
-{
-	switch (uart_id) {
-	case PERIPH_ID_UART0:
-		rk_clrsetreg(&grf->gpio1a_iomux,
-			     GPIO1A2_MASK | GPIO1A3_MASK |
-			     GPIO1A0_MASK | GPIO1A1_MASK,
-			     GPIO1A2_UART0_CTS_N << GPIO1A2_SHIFT |
-			     GPIO1A3_UART0_RTS_N << GPIO1A3_SHIFT |
-			     GPIO1A0_UART0_SIN << GPIO1A0_SHIFT |
-			     GPIO1A1_UART0_SOUT << GPIO1A1_SHIFT);
-		break;
-	case PERIPH_ID_UART1:
-		rk_clrsetreg(&grf->gpio1a_iomux,
-			     GPIO1A7_MASK | GPIO1A6_MASK |
-			     GPIO1A5_MASK | GPIO1A4_MASK,
-			     GPIO1A7_UART1_RTS_N << GPIO1A7_SHIFT |
-			     GPIO1A6_UART1_CTS_N << GPIO1A6_SHIFT |
-			     GPIO1A5_UART1_SOUT << GPIO1A5_SHIFT |
-			     GPIO1A4_UART1_SIN << GPIO1A4_SHIFT);
-		break;
-	case PERIPH_ID_UART2:
-		rk_clrsetreg(&grf->gpio1b_iomux,
-			     GPIO1B1_MASK | GPIO1B0_MASK,
-			     GPIO1B1_UART2_SOUT << GPIO1B1_SHIFT |
-			     GPIO1B0_UART2_SIN << GPIO1B0_SHIFT);
-		break;
-	case PERIPH_ID_UART3:
-		rk_clrsetreg(&grf->gpio3d_iomux,
-			     GPIO3D6_MASK | GPIO3D5_MASK |
-			     GPIO3D4_MASK | GPIO3D3_MASK,
-			     GPIO3D6_UART3_RTS_N << GPIO3D6_SHIFT |
-			     GPIO3D5_UART3_CTS_N << GPIO3D5_SHIFT |
-			     GPIO3D4_UART3_SOUT << GPIO3D4_SHIFT |
-			     GPIO3D3_UART3_SIN << GPIO3D3_SHIFT);
-		break;
-	}
-}
-
-static void pinctrl_rk3066_sdmmc_config(struct rk3066_grf *grf, int mmc_id)
-{
-	switch (mmc_id) {
-	case PERIPH_ID_EMMC:
-		rk_clrsetreg(&grf->soc_con0,
-			     EMMC_FLASH_SEL_MASK,
-			     1 << EMMC_FLASH_SEL_SHIFT);
-		rk_clrsetreg(&grf->gpio3d_iomux,
-			     GPIO3D7_MASK,
-			     GPIO3D7_EMMC_CLKOUT << GPIO3D7_SHIFT);
-		rk_clrsetreg(&grf->gpio4b_iomux,
-			     GPIO4B2_MASK | GPIO4B1_MASK,
-			     GPIO4B2_EMMC_RSTN_OUT << GPIO4B2_SHIFT |
-			     GPIO4B1_EMMC_CMD << GPIO4B1_SHIFT);
-		break;
-	case PERIPH_ID_SDCARD:
-		rk_clrsetreg(&grf->gpio3b_iomux, 0xffff,
-			     GPIO3B7_SDMMC0_WRITE_PRT << GPIO3B7_SHIFT |
-			     GPIO3B6_SDMMC0_DETECT_N << GPIO3B6_SHIFT |
-			     GPIO3B5_SDMMC0_DATA3 << GPIO3B5_SHIFT |
-			     GPIO3B4_SDMMC0_DATA2 << GPIO3B4_SHIFT |
-			     GPIO3B3_SDMMC0_DATA1 << GPIO3B3_SHIFT |
-			     GPIO3B2_SDMMC0_DATA0 << GPIO3B2_SHIFT |
-			     GPIO3B1_SDMMC0_CMD << GPIO3B1_SHIFT |
-			     GPIO3B0_SDMMC0_CLKOUT << GPIO3B0_SHIFT);
-		break;
-	}
-}
-
-static void pinctrl_rk3066_nand_config(struct rk3066_grf *grf)
-{
-	rk_clrsetreg(&grf->soc_con0,
-		     EMMC_FLASH_SEL_MASK,
-		     0 << EMMC_FLASH_SEL_SHIFT);
-	rk_clrsetreg(&grf->gpio3d_iomux,
-		     GPIO3D7_MASK,
-		     GPIO3D7_FLASH_DQS << GPIO3D7_SHIFT);
-}
-
-static int rk3066_pinctrl_request(struct udevice *dev, int func, int flags)
-{
-	struct rk3066_pinctrl_priv *priv = dev_get_priv(dev);
-
-	debug("%s: func=%x, flags=%x\n", __func__, func, flags);
-	switch (func) {
-	case PERIPH_ID_PWM0:
-	case PERIPH_ID_PWM1:
-	case PERIPH_ID_PWM2:
-	case PERIPH_ID_PWM3:
-		pinctrl_rk3066_pwm_config(priv->grf, func);
-		break;
-	case PERIPH_ID_I2C0:
-	case PERIPH_ID_I2C1:
-	case PERIPH_ID_I2C2:
-	case PERIPH_ID_I2C3:
-	case PERIPH_ID_I2C4:
-		pinctrl_rk3066_i2c_config(priv->grf, func);
-		break;
-	case PERIPH_ID_SPI0:
-	case PERIPH_ID_SPI1:
-		pinctrl_rk3066_spi_config(priv->grf, func, flags);
-		break;
-	case PERIPH_ID_UART0:
-	case PERIPH_ID_UART1:
-	case PERIPH_ID_UART2:
-	case PERIPH_ID_UART3:
-		pinctrl_rk3066_uart_config(priv->grf, func);
-		break;
-	case PERIPH_ID_EMMC:
-	case PERIPH_ID_SDCARD:
-		pinctrl_rk3066_sdmmc_config(priv->grf, func);
-		break;
-	case PERIPH_ID_NAND:
-		pinctrl_rk3066_nand_config(priv->grf);
-		break;
-	default:
-		return -EINVAL;
-	}
-
-	return 0;
-}
-
-static int rk3066_pinctrl_get_periph_id(struct udevice *dev,
-					struct udevice *periph)
-{
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
-	u32 cell[3];
-	int ret;
-
-	ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(periph),
-				   "interrupts", cell, ARRAY_SIZE(cell));
-	if (ret < 0)
-		return -EINVAL;
-
-	switch (cell[1]) {
-	case 23:
-		return PERIPH_ID_SDCARD;
-	case 25:
-		return PERIPH_ID_EMMC;
-	case 27:
-		return PERIPH_ID_NAND;
-	case 34:
-		return PERIPH_ID_UART0;
-	case 35:
-		return PERIPH_ID_UART1;
-	case 36:
-		return PERIPH_ID_UART2;
-	case 37:
-		return PERIPH_ID_UART3;
-	case 38:
-		return PERIPH_ID_SPI0;
-	case 39:
-		return PERIPH_ID_SPI1;
-	case 40:
-		return PERIPH_ID_I2C0;
-	case 41:
-		return PERIPH_ID_I2C1;
-	case 42:
-		return PERIPH_ID_I2C2;
-	case 43:
-		return PERIPH_ID_I2C3;
-	case 30:
-		return PERIPH_ID_PWM0;
-	}
-#endif
-	return -ENOENT;
-}
-
-static int rk3066_pinctrl_set_state_simple(struct udevice *dev,
-					   struct udevice *periph)
-{
-	int func;
-
-	func = rk3066_pinctrl_get_periph_id(dev, periph);
-	if (func < 0)
-		return func;
-	return rk3066_pinctrl_request(dev, func, 0);
-}
-
-static struct pinctrl_ops rk3066_pinctrl_ops = {
-	.set_state_simple	= rk3066_pinctrl_set_state_simple,
-	.request	= rk3066_pinctrl_request,
-	.get_periph_id	= rk3066_pinctrl_get_periph_id,
-};
-
-static int rk3066_pinctrl_probe(struct udevice *dev)
-{
-	struct rk3066_pinctrl_priv *priv = dev_get_priv(dev);
-
-	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	if (IS_ERR(priv->grf))
-		debug("%s: grf=%p\n", __func__, priv->grf);
-	return 0;
-}
-
-static const struct udevice_id rk3066_pinctrl_ids[] = {
-	{ .compatible = "rockchip,rk3066a-pinctrl" },
-	{ }
-};
-
-U_BOOT_DRIVER(rockchip_rk3066a_pinctrl) = {
-	.name		= "rockchip_rk3066a_pinctrl",
-	.id		= UCLASS_PINCTRL,
-	.of_match	= rk3066_pinctrl_ids,
-	.priv_auto_alloc_size = sizeof(struct rk3066_pinctrl_priv),
-	.ops		= &rk3066_pinctrl_ops,
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
-	.bind           = dm_scan_fdt_dev,
-#endif
-	.probe		= rk3066_pinctrl_probe,
-};
diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3128.c b/drivers/pinctrl/rockchip/pinctrl_rk3128.c
deleted file mode 100644
index 8b5178971a..0000000000
--- a/drivers/pinctrl/rockchip/pinctrl_rk3128.c
+++ /dev/null
@@ -1,186 +0,0 @@
-/*
- * Pinctrl driver for Rockchip 3128 SoCs
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <syscon.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/grf_rk3128.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/periph.h>
-#include <dm/pinctrl.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-struct rk3128_pinctrl_priv {
-	struct rk3128_grf *grf;
-};
-
-static void pinctrl_rk3128_i2c_config(struct rk3128_grf *grf, int i2c_id)
-{
-	switch (i2c_id) {
-	case PERIPH_ID_I2C0:
-		rk_clrsetreg(&grf->gpio0a_iomux,
-			     GPIO0A1_MASK | GPIO0A0_MASK,
-			     GPIO0A1_I2C0_SDA << GPIO0A1_SHIFT |
-			     GPIO0A0_I2C0_SCL << GPIO0A0_SHIFT);
-
-		break;
-	case PERIPH_ID_I2C1:
-		rk_clrsetreg(&grf->gpio0a_iomux,
-			     GPIO0A3_MASK | GPIO0A2_MASK,
-			     GPIO0A3_I2C1_SDA << GPIO0A3_SHIFT |
-			     GPIO0A2_I2C1_SCL << GPIO0A2_SHIFT);
-		break;
-	case PERIPH_ID_I2C2:
-		rk_clrsetreg(&grf->gpio2c_iomux2,
-			     GPIO2C5_MASK | GPIO2C4_MASK,
-			     GPIO2C5_I2C2_SCL << GPIO2C5_SHIFT |
-			     GPIO2C4_I2C2_SDA << GPIO2C4_SHIFT);
-		break;
-	case PERIPH_ID_I2C3:
-		rk_clrsetreg(&grf->gpio0a_iomux,
-			     GPIO0A7_MASK | GPIO0A6_MASK,
-			     GPIO0A7_I2C3_SDA << GPIO0A7_SHIFT |
-			     GPIO0A6_I2C3_SCL << GPIO0A6_SHIFT);
-
-		break;
-	}
-}
-
-static void pinctrl_rk3128_sdmmc_config(struct rk3128_grf *grf, int mmc_id)
-{
-	switch (mmc_id) {
-	case PERIPH_ID_EMMC:
-		rk_clrsetreg(&grf->gpio1d_iomux, 0xffff,
-			     GPIO1D7_EMMC_D7 << GPIO1D7_SHIFT |
-			     GPIO1D6_EMMC_D6 << GPIO1D6_SHIFT |
-			     GPIO1D5_EMMC_D5 << GPIO1D5_SHIFT |
-			     GPIO1D4_EMMC_D4 << GPIO1D4_SHIFT |
-			     GPIO1D3_EMMC_D3 << GPIO1D3_SHIFT |
-			     GPIO1D2_EMMC_D2 << GPIO1D2_SHIFT |
-			     GPIO1D1_EMMC_D1 << GPIO1D1_SHIFT |
-			     GPIO1D0_EMMC_D0 << GPIO1D0_SHIFT);
-		rk_clrsetreg(&grf->gpio2a_iomux,
-			     GPIO2A5_MASK | GPIO2A7_MASK,
-			     GPIO2A5_EMMC_PWREN << GPIO2A5_SHIFT |
-			     GPIO2A7_EMMC_CLKOUT << GPIO2A7_SHIFT);
-		break;
-	case PERIPH_ID_SDCARD:
-		rk_clrsetreg(&grf->gpio1c_iomux, 0x0fff,
-			     GPIO1C5_MMC0_D3 << GPIO1C5_SHIFT |
-			     GPIO1C4_MMC0_D2 << GPIO1C4_SHIFT |
-			     GPIO1C3_MMC0_D1 << GPIO1C3_SHIFT |
-			     GPIO1C2_MMC0_D0 << GPIO1C2_SHIFT |
-			     GPIO1C1_MMC0_DETN << GPIO1C1_SHIFT |
-			     GPIO1C0_MMC0_CLKOUT << GPIO1C0_SHIFT);
-		break;
-	}
-}
-
-static int rk3128_pinctrl_request(struct udevice *dev, int func, int flags)
-{
-	struct rk3128_pinctrl_priv *priv = dev_get_priv(dev);
-
-	debug("%s: func=%x, flags=%x\n", __func__, func, flags);
-	switch (func) {
-	case PERIPH_ID_I2C0:
-	case PERIPH_ID_I2C1:
-	case PERIPH_ID_I2C2:
-	case PERIPH_ID_I2C3:
-		pinctrl_rk3128_i2c_config(priv->grf, func);
-		break;
-	case PERIPH_ID_SDMMC0:
-	case PERIPH_ID_SDMMC1:
-		pinctrl_rk3128_sdmmc_config(priv->grf, func);
-		break;
-	default:
-		return -EINVAL;
-	}
-
-	return 0;
-}
-
-static int rk3128_pinctrl_get_periph_id(struct udevice *dev,
-					struct udevice *periph)
-{
-	u32 cell[3];
-	int ret;
-
-	ret = dev_read_u32_array(periph, "interrupts", cell, ARRAY_SIZE(cell));
-	if (ret < 0)
-		return -EINVAL;
-
-	switch (cell[1]) {
-	case 14:
-		return PERIPH_ID_SDCARD;
-	case 16:
-		return PERIPH_ID_EMMC;
-	case 20:
-		return PERIPH_ID_UART0;
-	case 21:
-		return PERIPH_ID_UART1;
-	case 22:
-		return PERIPH_ID_UART2;
-	case 23:
-		return PERIPH_ID_SPI0;
-	case 24:
-		return PERIPH_ID_I2C0;
-	case 25:
-		return PERIPH_ID_I2C1;
-	case 26:
-		return PERIPH_ID_I2C2;
-	case 27:
-		return PERIPH_ID_I2C3;
-	case 30:
-		return PERIPH_ID_PWM0;
-	}
-	return -ENOENT;
-}
-
-static int rk3128_pinctrl_set_state_simple(struct udevice *dev,
-					   struct udevice *periph)
-{
-	int func;
-
-	func = rk3128_pinctrl_get_periph_id(dev, periph);
-	if (func < 0)
-		return func;
-	return rk3128_pinctrl_request(dev, func, 0);
-}
-
-static struct pinctrl_ops rk3128_pinctrl_ops = {
-	.set_state_simple	= rk3128_pinctrl_set_state_simple,
-	.request	= rk3128_pinctrl_request,
-	.get_periph_id	= rk3128_pinctrl_get_periph_id,
-};
-
-static int rk3128_pinctrl_probe(struct udevice *dev)
-{
-	struct rk3128_pinctrl_priv *priv = dev_get_priv(dev);
-
-	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	debug("%s: grf=%p\n", __func__, priv->grf);
-	return 0;
-}
-
-static const struct udevice_id rk3128_pinctrl_ids[] = {
-	{ .compatible = "rockchip,rk3128-pinctrl" },
-	{ }
-};
-
-U_BOOT_DRIVER(pinctrl_rk3128) = {
-	.name		= "pinctrl_rk3128",
-	.id		= UCLASS_PINCTRL,
-	.of_match	= rk3128_pinctrl_ids,
-	.priv_auto_alloc_size = sizeof(struct rk3128_pinctrl_priv),
-	.ops		= &rk3128_pinctrl_ops,
-	.bind		= dm_scan_fdt_dev,
-	.probe		= rk3128_pinctrl_probe,
-};
diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3188.c b/drivers/pinctrl/rockchip/pinctrl_rk3188.c
deleted file mode 100644
index 65c1f665ea..0000000000
--- a/drivers/pinctrl/rockchip/pinctrl_rk3188.c
+++ /dev/null
@@ -1,611 +0,0 @@
-/*
- * Pinctrl driver for Rockchip RK3188 SoCs
- * Copyright (c) 2016 Heiko Stuebner <heiko@sntech.de>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <syscon.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/grf_rk3188.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/periph.h>
-#include <asm/arch/pmu_rk3188.h>
-#include <dm/pinctrl.h>
-#include <dm/root.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-struct rk3188_pinctrl_priv {
-	struct rk3188_grf *grf;
-	struct rk3188_pmu *pmu;
-	int num_banks;
-};
-
-/**
- * Encode variants of iomux registers into a type variable
- */
-#define IOMUX_GPIO_ONLY		BIT(0)
-
-/**
- * @type: iomux variant using IOMUX_* constants
- * @offset: if initialized to -1 it will be autocalculated, by specifying
- *	    an initial offset value the relevant source offset can be reset
- *	    to a new value for autocalculating the following iomux registers.
- */
-struct rockchip_iomux {
-	u8 type;
-	s16 offset;
-};
-
-/**
- * @reg: register offset of the gpio bank
- * @nr_pins: number of pins in this bank
- * @bank_num: number of the bank, to account for holes
- * @name: name of the bank
- * @iomux: array describing the 4 iomux sources of the bank
- */
-struct rockchip_pin_bank {
-	u16 reg;
-	u8 nr_pins;
-	u8 bank_num;
-	char *name;
-	struct rockchip_iomux iomux[4];
-};
-
-#define PIN_BANK(id, pins, label)			\
-	{						\
-		.bank_num	= id,			\
-		.nr_pins	= pins,			\
-		.name		= label,		\
-		.iomux		= {			\
-			{ .offset = -1 },		\
-			{ .offset = -1 },		\
-			{ .offset = -1 },		\
-			{ .offset = -1 },		\
-		},					\
-	}
-
-#define PIN_BANK_IOMUX_FLAGS(id, pins, label, iom0, iom1, iom2, iom3)	\
-	{								\
-		.bank_num	= id,					\
-		.nr_pins	= pins,					\
-		.name		= label,				\
-		.iomux		= {					\
-			{ .type = iom0, .offset = -1 },			\
-			{ .type = iom1, .offset = -1 },			\
-			{ .type = iom2, .offset = -1 },			\
-			{ .type = iom3, .offset = -1 },			\
-		},							\
-	}
-
-#ifndef CONFIG_SPL_BUILD
-static struct rockchip_pin_bank rk3188_pin_banks[] = {
-	PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", IOMUX_GPIO_ONLY, 0, 0, 0),
-	PIN_BANK(1, 32, "gpio1"),
-	PIN_BANK(2, 32, "gpio2"),
-	PIN_BANK(3, 32, "gpio3"),
-};
-#endif
-
-static void pinctrl_rk3188_pwm_config(struct rk3188_grf *grf, int pwm_id)
-{
-	switch (pwm_id) {
-	case PERIPH_ID_PWM0:
-		rk_clrsetreg(&grf->gpio3d_iomux, GPIO3D3_MASK << GPIO3D3_SHIFT,
-			     GPIO3D3_PWM_0 << GPIO3D3_SHIFT);
-		break;
-	case PERIPH_ID_PWM1:
-		rk_clrsetreg(&grf->gpio3d_iomux, GPIO3D4_MASK << GPIO3D4_SHIFT,
-			     GPIO3D4_PWM_1 << GPIO3D4_SHIFT);
-		break;
-	case PERIPH_ID_PWM2:
-		rk_clrsetreg(&grf->gpio3d_iomux, GPIO3D5_MASK << GPIO3D5_SHIFT,
-			     GPIO3D5_PWM_2 << GPIO3D5_SHIFT);
-		break;
-	case PERIPH_ID_PWM3:
-		rk_clrsetreg(&grf->gpio3d_iomux, GPIO3D6_MASK << GPIO3D6_SHIFT,
-			     GPIO3D6_PWM_3 << GPIO3D6_SHIFT);
-		break;
-	default:
-		debug("pwm id = %d iomux error!\n", pwm_id);
-		break;
-	}
-}
-
-static void pinctrl_rk3188_i2c_config(struct rk3188_grf *grf,
-				      struct rk3188_pmu *pmu, int i2c_id)
-{
-	switch (i2c_id) {
-	case PERIPH_ID_I2C0:
-		rk_clrsetreg(&grf->gpio1d_iomux,
-				GPIO1D1_MASK << GPIO1D1_SHIFT |
-				GPIO1D0_MASK << GPIO1D0_SHIFT,
-				GPIO1D1_I2C0_SCL << GPIO1D1_SHIFT |
-				GPIO1D0_I2C0_SDA << GPIO1D0_SHIFT);
-		/* enable new i2c controller */
-		rk_clrsetreg(&grf->soc_con1, 1 << RKI2C0_SEL_SHIFT,
-					     1 << RKI2C0_SEL_SHIFT);
-		break;
-	case PERIPH_ID_I2C1:
-		rk_clrsetreg(&grf->gpio1d_iomux,
-				GPIO1D3_MASK << GPIO1D3_SHIFT |
-				GPIO1D2_MASK << GPIO1D2_SHIFT,
-				GPIO1D3_I2C1_SCL << GPIO1D2_SHIFT |
-				GPIO1D2_I2C1_SDA << GPIO1D2_SHIFT);
-		rk_clrsetreg(&grf->soc_con1, 1 << RKI2C1_SEL_SHIFT,
-					     1 << RKI2C1_SEL_SHIFT);
-		break;
-	case PERIPH_ID_I2C2:
-		rk_clrsetreg(&grf->gpio1d_iomux,
-				GPIO1D5_MASK << GPIO1D5_SHIFT |
-				GPIO1D4_MASK << GPIO1D4_SHIFT,
-				GPIO1D5_I2C2_SCL << GPIO1D5_SHIFT |
-				GPIO1D4_I2C2_SDA << GPIO1D4_SHIFT);
-		rk_clrsetreg(&grf->soc_con1, 1 << RKI2C2_SEL_SHIFT,
-					     1 << RKI2C2_SEL_SHIFT);
-		break;
-	case PERIPH_ID_I2C3:
-		rk_clrsetreg(&grf->gpio3b_iomux,
-				GPIO3B7_MASK << GPIO3B7_SHIFT |
-				GPIO3B6_MASK << GPIO3B6_SHIFT,
-				GPIO3B7_I2C3_SCL << GPIO3B7_SHIFT |
-				GPIO3B6_I2C3_SDA << GPIO3B6_SHIFT);
-		rk_clrsetreg(&grf->soc_con1, 1 << RKI2C3_SEL_SHIFT,
-					     1 << RKI2C3_SEL_SHIFT);
-		break;
-	case PERIPH_ID_I2C4:
-		rk_clrsetreg(&grf->gpio1d_iomux,
-				GPIO1D7_MASK << GPIO1D7_SHIFT |
-				GPIO1D6_MASK << GPIO1D6_SHIFT,
-				GPIO1D7_I2C4_SCL << GPIO1D7_SHIFT |
-				GPIO1D6_I2C4_SDA << GPIO1D6_SHIFT);
-		rk_clrsetreg(&grf->soc_con1, 1 << RKI2C4_SEL_SHIFT,
-					     1 << RKI2C4_SEL_SHIFT);
-		break;
-	default:
-		debug("i2c id = %d iomux error!\n", i2c_id);
-		break;
-	}
-}
-
-static int pinctrl_rk3188_spi_config(struct rk3188_grf *grf,
-				     enum periph_id spi_id, int cs)
-{
-	switch (spi_id) {
-	case PERIPH_ID_SPI0:
-		switch (cs) {
-		case 0:
-			rk_clrsetreg(&grf->gpio1a_iomux,
-				     GPIO1A7_MASK << GPIO1A7_SHIFT,
-				     GPIO1A7_SPI0_CSN0 << GPIO1A7_SHIFT);
-			break;
-		case 1:
-			rk_clrsetreg(&grf->gpio1b_iomux,
-				     GPIO1B7_MASK << GPIO1B7_SHIFT,
-				     GPIO1B7_SPI0_CSN1 << GPIO1B7_SHIFT);
-			break;
-		default:
-			goto err;
-		}
-		rk_clrsetreg(&grf->gpio1a_iomux,
-			     GPIO1A4_MASK << GPIO1A4_SHIFT |
-			     GPIO1A5_MASK << GPIO1A5_SHIFT |
-			     GPIO1A6_MASK << GPIO1A6_SHIFT,
-			     GPIO1A4_SPI0_RXD << GPIO1A4_SHIFT |
-			     GPIO1A5_SPI0_TXD << GPIO1A5_SHIFT |
-			     GPIO1A6_SPI0_CLK << GPIO1A6_SHIFT);
-		break;
-	case PERIPH_ID_SPI1:
-		switch (cs) {
-		case 0:
-			rk_clrsetreg(&grf->gpio0d_iomux,
-				     GPIO0D7_MASK << GPIO0D7_SHIFT,
-				     GPIO0D7_SPI1_CSN0 << GPIO0D7_SHIFT);
-			break;
-		case 1:
-			rk_clrsetreg(&grf->gpio1b_iomux,
-				     GPIO1B6_MASK << GPIO1B6_SHIFT,
-				     GPIO1B6_SPI1_CSN1 << GPIO1B6_SHIFT);
-			break;
-		default:
-			goto err;
-		}
-		rk_clrsetreg(&grf->gpio0d_iomux,
-			     GPIO0D4_MASK << GPIO0D4_SHIFT |
-			     GPIO0D5_MASK << GPIO0D5_SHIFT |
-			     GPIO0D6_MASK << GPIO0D6_SHIFT,
-			     GPIO0D4_SPI0_RXD << GPIO0D4_SHIFT |
-			     GPIO0D5_SPI1_TXD << GPIO0D5_SHIFT |
-			     GPIO0D6_SPI1_CLK << GPIO0D6_SHIFT);
-		break;
-	default:
-		goto err;
-	}
-
-	return 0;
-err:
-	debug("rkspi: periph%d cs=%d not supported", spi_id, cs);
-	return -ENOENT;
-}
-
-static void pinctrl_rk3188_uart_config(struct rk3188_grf *grf, int uart_id)
-{
-	switch (uart_id) {
-	case PERIPH_ID_UART0:
-		rk_clrsetreg(&grf->gpio1a_iomux,
-			     GPIO1A3_MASK << GPIO1A3_SHIFT |
-			     GPIO1A2_MASK << GPIO1A2_SHIFT |
-			     GPIO1A1_MASK << GPIO1A1_SHIFT |
-			     GPIO1A0_MASK << GPIO1A0_SHIFT,
-			     GPIO1A3_UART0_RTS_N << GPIO1A3_SHIFT |
-			     GPIO1A2_UART0_CTS_N << GPIO1A2_SHIFT |
-			     GPIO1A1_UART0_SOUT << GPIO1A1_SHIFT |
-			     GPIO1A0_UART0_SIN << GPIO1A0_SHIFT);
-		break;
-	case PERIPH_ID_UART1:
-		rk_clrsetreg(&grf->gpio1a_iomux,
-			     GPIO1A7_MASK << GPIO1A7_SHIFT |
-			     GPIO1A6_MASK << GPIO1A6_SHIFT |
-			     GPIO1A5_MASK << GPIO1A5_SHIFT |
-			     GPIO1A4_MASK << GPIO1A4_SHIFT,
-			     GPIO1A7_UART1_RTS_N << GPIO1A7_SHIFT |
-			     GPIO1A6_UART1_CTS_N << GPIO1A6_SHIFT |
-			     GPIO1A5_UART1_SOUT << GPIO1A5_SHIFT |
-			     GPIO1A4_UART1_SIN << GPIO1A4_SHIFT);
-		break;
-	case PERIPH_ID_UART2:
-		rk_clrsetreg(&grf->gpio1b_iomux,
-			     GPIO1B1_MASK << GPIO1B1_SHIFT |
-			     GPIO1B0_MASK << GPIO1B0_SHIFT,
-			     GPIO1B1_UART2_SOUT << GPIO1B1_SHIFT |
-			     GPIO1B0_UART2_SIN << GPIO1B0_SHIFT);
-		break;
-	case PERIPH_ID_UART3:
-		rk_clrsetreg(&grf->gpio1b_iomux,
-			     GPIO1B5_MASK << GPIO1B5_SHIFT |
-			     GPIO1B4_MASK << GPIO1B4_SHIFT |
-			     GPIO1B3_MASK << GPIO1B3_SHIFT |
-			     GPIO1B2_MASK << GPIO1B2_SHIFT,
-			     GPIO1B5_UART3_RTS_N << GPIO1B5_SHIFT |
-			     GPIO1B4_UART3_CTS_N << GPIO1B4_SHIFT |
-			     GPIO1B3_UART3_SOUT << GPIO1B3_SHIFT |
-			     GPIO1B2_UART3_SIN << GPIO1B2_SHIFT);
-		break;
-	default:
-		debug("uart id = %d iomux error!\n", uart_id);
-		break;
-	}
-}
-
-static void pinctrl_rk3188_sdmmc_config(struct rk3188_grf *grf, int mmc_id)
-{
-	switch (mmc_id) {
-	case PERIPH_ID_EMMC:
-		rk_clrsetreg(&grf->soc_con0, 1 << EMMC_FLASH_SEL_SHIFT,
-					     1 << EMMC_FLASH_SEL_SHIFT);
-		rk_clrsetreg(&grf->gpio0d_iomux,
-			     GPIO0D2_MASK << GPIO0D2_SHIFT |
-			     GPIO0D0_MASK << GPIO0D0_SHIFT,
-			     GPIO0D2_EMMC_CMD << GPIO0D2_SHIFT |
-			     GPIO0D0_EMMC_CLKOUT << GPIO0D0_SHIFT);
-		break;
-	case PERIPH_ID_SDCARD:
-		rk_clrsetreg(&grf->gpio3b_iomux,
-			     GPIO3B0_MASK << GPIO3B0_SHIFT,
-			     GPIO3B0_SDMMC_DETECT_N << GPIO3B0_SHIFT);
-		rk_clrsetreg(&grf->gpio3a_iomux,
-			     GPIO3A7_MASK << GPIO3A7_SHIFT |
-			     GPIO3A6_MASK << GPIO3A6_SHIFT |
-			     GPIO3A5_MASK << GPIO3A5_SHIFT |
-			     GPIO3A4_MASK << GPIO3A4_SHIFT |
-			     GPIO3A3_MASK << GPIO3A3_SHIFT |
-			     GPIO3A3_MASK << GPIO3A2_SHIFT,
-			     GPIO3A7_SDMMC0_DATA3 << GPIO3A7_SHIFT |
-			     GPIO3A6_SDMMC0_DATA2 << GPIO3A6_SHIFT |
-			     GPIO3A5_SDMMC0_DATA1 << GPIO3A5_SHIFT |
-			     GPIO3A4_SDMMC0_DATA0 << GPIO3A4_SHIFT |
-			     GPIO3A3_SDMMC0_CMD << GPIO3A3_SHIFT |
-			     GPIO3A2_SDMMC0_CLKOUT << GPIO3A2_SHIFT);
-		break;
-	default:
-		debug("mmc id = %d iomux error!\n", mmc_id);
-		break;
-	}
-}
-
-static int rk3188_pinctrl_request(struct udevice *dev, int func, int flags)
-{
-	struct rk3188_pinctrl_priv *priv = dev_get_priv(dev);
-
-	debug("%s: func=%x, flags=%x\n", __func__, func, flags);
-	switch (func) {
-	case PERIPH_ID_PWM0:
-	case PERIPH_ID_PWM1:
-	case PERIPH_ID_PWM2:
-	case PERIPH_ID_PWM3:
-	case PERIPH_ID_PWM4:
-		pinctrl_rk3188_pwm_config(priv->grf, func);
-		break;
-	case PERIPH_ID_I2C0:
-	case PERIPH_ID_I2C1:
-	case PERIPH_ID_I2C2:
-	case PERIPH_ID_I2C3:
-	case PERIPH_ID_I2C4:
-	case PERIPH_ID_I2C5:
-		pinctrl_rk3188_i2c_config(priv->grf, priv->pmu, func);
-		break;
-	case PERIPH_ID_SPI0:
-	case PERIPH_ID_SPI1:
-	case PERIPH_ID_SPI2:
-		pinctrl_rk3188_spi_config(priv->grf, func, flags);
-		break;
-	case PERIPH_ID_UART0:
-	case PERIPH_ID_UART1:
-	case PERIPH_ID_UART2:
-	case PERIPH_ID_UART3:
-	case PERIPH_ID_UART4:
-		pinctrl_rk3188_uart_config(priv->grf, func);
-		break;
-		break;
-	case PERIPH_ID_SDMMC0:
-	case PERIPH_ID_SDMMC1:
-		pinctrl_rk3188_sdmmc_config(priv->grf, func);
-		break;
-	default:
-		return -EINVAL;
-	}
-
-	return 0;
-}
-
-static int rk3188_pinctrl_get_periph_id(struct udevice *dev,
-					struct udevice *periph)
-{
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
-	u32 cell[3];
-	int ret;
-
-	ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(periph),
-				   "interrupts", cell, ARRAY_SIZE(cell));
-	if (ret < 0)
-		return -EINVAL;
-
-	switch (cell[1]) {
-	case 44:
-		return PERIPH_ID_SPI0;
-	case 45:
-		return PERIPH_ID_SPI1;
-	case 46:
-		return PERIPH_ID_SPI2;
-	case 60:
-		return PERIPH_ID_I2C0;
-	case 62: /* Note strange order */
-		return PERIPH_ID_I2C1;
-	case 61:
-		return PERIPH_ID_I2C2;
-	case 63:
-		return PERIPH_ID_I2C3;
-	case 64:
-		return PERIPH_ID_I2C4;
-	case 65:
-		return PERIPH_ID_I2C5;
-	}
-#endif
-
-	return -ENOENT;
-}
-
-static int rk3188_pinctrl_set_state_simple(struct udevice *dev,
-					   struct udevice *periph)
-{
-	int func;
-
-	func = rk3188_pinctrl_get_periph_id(dev, periph);
-	if (func < 0)
-		return func;
-	return rk3188_pinctrl_request(dev, func, 0);
-}
-
-#ifndef CONFIG_SPL_BUILD
-int rk3188_pinctrl_get_pin_info(struct rk3188_pinctrl_priv *priv,
-				int banknum, int ind, u32 **addrp, uint *shiftp,
-				uint *maskp)
-{
-	struct rockchip_pin_bank *bank = &rk3188_pin_banks[banknum];
-	uint muxnum;
-	u32 *addr;
-
-	for (muxnum = 0; muxnum < 4; muxnum++) {
-		struct rockchip_iomux *mux = &bank->iomux[muxnum];
-
-		if (ind >= 8) {
-			ind -= 8;
-			continue;
-		}
-
-		addr = &priv->grf->gpio0c_iomux - 2;
-		addr += mux->offset;
-		*shiftp = ind & 7;
-		*maskp = 3;
-		*shiftp *= 2;
-
-		debug("%s: addr=%p, mask=%x, shift=%x\n", __func__, addr,
-		      *maskp, *shiftp);
-		*addrp = addr;
-		return 0;
-	}
-
-	return -EINVAL;
-}
-
-static int rk3188_pinctrl_get_gpio_mux(struct udevice *dev, int banknum,
-				       int index)
-{
-	struct rk3188_pinctrl_priv *priv = dev_get_priv(dev);
-	uint shift;
-	uint mask;
-	u32 *addr;
-	int ret;
-
-	ret = rk3188_pinctrl_get_pin_info(priv, banknum, index, &addr, &shift,
-					  &mask);
-	if (ret)
-		return ret;
-	return (readl(addr) & mask) >> shift;
-}
-
-static int rk3188_pinctrl_set_pins(struct udevice *dev, int banknum, int index,
-				   int muxval, int flags)
-{
-	struct rk3188_pinctrl_priv *priv = dev_get_priv(dev);
-	uint shift, ind = index;
-	uint mask;
-	u32 *addr;
-	int ret;
-
-	debug("%s: %x %x %x %x\n", __func__, banknum, index, muxval, flags);
-	ret = rk3188_pinctrl_get_pin_info(priv, banknum, index, &addr, &shift,
-					  &mask);
-	if (ret)
-		return ret;
-	rk_clrsetreg(addr, mask << shift, muxval << shift);
-
-	/* Handle pullup/pulldown */
-	if (flags) {
-		uint val = 0;
-
-		if (flags & (1 << PIN_CONFIG_BIAS_PULL_UP))
-			val = 1;
-		else if (flags & (1 << PIN_CONFIG_BIAS_PULL_DOWN))
-			val = 2;
-
-		ind = index >> 3;
-
-		if (banknum == 0 && index < 12) {
-			addr = &priv->pmu->gpio0_p[ind];
-			shift = (index & 7) * 2;
-		} else if (banknum == 0 && index >= 12) {
-			addr = &priv->grf->gpio0_p[ind - 1];
-			/*
-			 * The bits in the grf-registers have an inverse
-			 * ordering with the lowest pin being in bits 15:14
-			 * and the highest pin in bits 1:0 .
-			 */
-			shift = (7 - (index & 7)) * 2;
-		} else {
-			addr = &priv->grf->gpio1_p[banknum - 1][ind];
-			shift = (7 - (index & 7)) * 2;
-		}
-		debug("%s: addr=%p, val=%x, shift=%x\n", __func__, addr, val,
-		      shift);
-		rk_clrsetreg(addr, 3 << shift, val << shift);
-	}
-
-	return 0;
-}
-
-static int rk3188_pinctrl_set_state(struct udevice *dev, struct udevice *config)
-{
-	const void *blob = gd->fdt_blob;
-	int pcfg_node, ret, flags, count, i;
-	u32 cell[60], *ptr;
-
-	debug("%s: %s %s\n", __func__, dev->name, config->name);
-	ret = fdtdec_get_int_array_count(blob, dev_of_offset(config),
-					 "rockchip,pins", cell,
-					 ARRAY_SIZE(cell));
-	if (ret < 0) {
-		debug("%s: bad array %d\n", __func__, ret);
-		return -EINVAL;
-	}
-	count = ret;
-	for (i = 0, ptr = cell; i < count; i += 4, ptr += 4) {
-		pcfg_node = fdt_node_offset_by_phandle(blob, ptr[3]);
-		if (pcfg_node < 0)
-			return -EINVAL;
-		flags = pinctrl_decode_pin_config(blob, pcfg_node);
-		if (flags < 0)
-			return flags;
-
-		ret = rk3188_pinctrl_set_pins(dev, ptr[0], ptr[1], ptr[2],
-					      flags);
-		if (ret)
-			return ret;
-	}
-
-	return 0;
-}
-#endif
-
-static struct pinctrl_ops rk3188_pinctrl_ops = {
-#ifndef CONFIG_SPL_BUILD
-	.set_state	= rk3188_pinctrl_set_state,
-	.get_gpio_mux	= rk3188_pinctrl_get_gpio_mux,
-#endif
-	.set_state_simple	= rk3188_pinctrl_set_state_simple,
-	.request	= rk3188_pinctrl_request,
-	.get_periph_id	= rk3188_pinctrl_get_periph_id,
-};
-
-#ifndef CONFIG_SPL_BUILD
-static int rk3188_pinctrl_parse_tables(struct rk3188_pinctrl_priv *priv,
-				       struct rockchip_pin_bank *banks,
-				       int count)
-{
-	struct rockchip_pin_bank *bank;
-	uint reg, muxnum, banknum;
-
-	reg = 0;
-	for (banknum = 0; banknum < count; banknum++) {
-		bank = &banks[banknum];
-		bank->reg = reg;
-		debug("%s: bank %d, reg %x\n", __func__, banknum, reg * 4);
-		for (muxnum = 0; muxnum < 4; muxnum++) {
-			struct rockchip_iomux *mux = &bank->iomux[muxnum];
-
-			mux->offset = reg;
-			reg += 1;
-		}
-	}
-
-	return 0;
-}
-#endif
-
-static int rk3188_pinctrl_probe(struct udevice *dev)
-{
-	struct rk3188_pinctrl_priv *priv = dev_get_priv(dev);
-	int ret = 0;
-
-	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	priv->pmu = syscon_get_first_range(ROCKCHIP_SYSCON_PMU);
-	debug("%s: grf=%p, pmu=%p\n", __func__, priv->grf, priv->pmu);
-#ifndef CONFIG_SPL_BUILD
-	ret = rk3188_pinctrl_parse_tables(priv, rk3188_pin_banks,
-					  ARRAY_SIZE(rk3188_pin_banks));
-#endif
-
-	return ret;
-}
-
-static const struct udevice_id rk3188_pinctrl_ids[] = {
-	{ .compatible = "rockchip,rk3188-pinctrl" },
-	{ }
-};
-
-U_BOOT_DRIVER(pinctrl_rk3188) = {
-	.name		= "rockchip_rk3188_pinctrl",
-	.id		= UCLASS_PINCTRL,
-	.of_match	= rk3188_pinctrl_ids,
-	.priv_auto_alloc_size = sizeof(struct rk3188_pinctrl_priv),
-	.ops		= &rk3188_pinctrl_ops,
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
-	.bind		= dm_scan_fdt_dev,
-#endif
-	.probe		= rk3188_pinctrl_probe,
-};
diff --git a/drivers/pinctrl/rockchip/pinctrl_rk322x.c b/drivers/pinctrl/rockchip/pinctrl_rk322x.c
deleted file mode 100644
index d300650649..0000000000
--- a/drivers/pinctrl/rockchip/pinctrl_rk322x.c
+++ /dev/null
@@ -1,293 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <syscon.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/grf_rk322x.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/periph.h>
-#include <dm/pinctrl.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-struct rk322x_pinctrl_priv {
-	struct rk322x_grf *grf;
-};
-
-static void pinctrl_rk322x_pwm_config(struct rk322x_grf *grf, int pwm_id)
-{
-	u32 mux_con = readl(&grf->con_iomux);
-
-	switch (pwm_id) {
-	case PERIPH_ID_PWM0:
-		if (mux_con & CON_IOMUX_PWM0SEL_MASK)
-			rk_clrsetreg(&grf->gpio3c_iomux, GPIO3C5_MASK,
-				     GPIO3C5_PWM10 << GPIO3C5_SHIFT);
-		else
-			rk_clrsetreg(&grf->gpio0d_iomux, GPIO0D2_MASK,
-				     GPIO0D2_PWM0 << GPIO0D2_SHIFT);
-		break;
-	case PERIPH_ID_PWM1:
-		if (mux_con & CON_IOMUX_PWM1SEL_MASK)
-			rk_clrsetreg(&grf->gpio0d_iomux, GPIO0D6_MASK,
-				     GPIO0D6_PWM11 << GPIO0D6_SHIFT);
-		else
-			rk_clrsetreg(&grf->gpio0d_iomux, GPIO0D3_MASK,
-				     GPIO0D3_PWM1 << GPIO0D3_SHIFT);
-		break;
-	case PERIPH_ID_PWM2:
-		if (mux_con & CON_IOMUX_PWM2SEL_MASK)
-			rk_clrsetreg(&grf->gpio1b_iomux, GPIO1B4_MASK,
-				     GPIO1B4_PWM12 << GPIO1B4_SHIFT);
-		else
-			rk_clrsetreg(&grf->gpio0d_iomux, GPIO0D4_MASK,
-				     GPIO0D4_PWM2 << GPIO0D4_SHIFT);
-		break;
-	case PERIPH_ID_PWM3:
-		if (mux_con & CON_IOMUX_PWM3SEL_MASK)
-			rk_clrsetreg(&grf->gpio1b_iomux, GPIO1B3_MASK,
-				     GPIO1B3_PWM13 << GPIO1B3_SHIFT);
-		else
-			rk_clrsetreg(&grf->gpio3d_iomux, GPIO3D2_MASK,
-				     GPIO3D2_PWM3 << GPIO3D2_SHIFT);
-		break;
-	default:
-		debug("pwm id = %d iomux error!\n", pwm_id);
-		break;
-	}
-}
-
-static void pinctrl_rk322x_i2c_config(struct rk322x_grf *grf, int i2c_id)
-{
-	switch (i2c_id) {
-	case PERIPH_ID_I2C0:
-		rk_clrsetreg(&grf->gpio0a_iomux,
-			     GPIO0A1_MASK | GPIO0A0_MASK,
-			     GPIO0A1_I2C0_SDA << GPIO0A1_SHIFT |
-			     GPIO0A0_I2C0_SCL << GPIO0A0_SHIFT);
-
-		break;
-	case PERIPH_ID_I2C1:
-		rk_clrsetreg(&grf->gpio0a_iomux,
-			     GPIO0A3_MASK | GPIO0A2_MASK,
-			     GPIO0A3_I2C1_SDA << GPIO0A3_SHIFT |
-			     GPIO0A2_I2C1_SCL << GPIO0A2_SHIFT);
-		break;
-	case PERIPH_ID_I2C2:
-		rk_clrsetreg(&grf->gpio2c_iomux,
-			     GPIO2C5_MASK | GPIO2C4_MASK,
-			     GPIO2C5_I2C2_SCL << GPIO2C5_SHIFT |
-			     GPIO2C4_I2C2_SDA << GPIO2C4_SHIFT);
-		break;
-	case PERIPH_ID_I2C3:
-		rk_clrsetreg(&grf->gpio0a_iomux,
-			     GPIO0A7_MASK | GPIO0A6_MASK,
-			     GPIO0A7_I2C3_SDA << GPIO0A7_SHIFT |
-			     GPIO0A6_I2C3_SCL << GPIO0A6_SHIFT);
-
-		break;
-	}
-}
-
-static void pinctrl_rk322x_spi_config(struct rk322x_grf *grf, int cs)
-{
-	switch (cs) {
-	case 0:
-		rk_clrsetreg(&grf->gpio0b_iomux, GPIO0B6_MASK,
-			     GPIO0B6_SPI_CSN0 << GPIO0B6_SHIFT);
-		break;
-	case 1:
-		rk_clrsetreg(&grf->gpio1b_iomux, GPIO1B4_MASK,
-			     GPIO1B4_SPI_CSN1 << GPIO1B4_SHIFT);
-		break;
-	}
-	rk_clrsetreg(&grf->gpio0b_iomux,
-		     GPIO0B1_MASK | GPIO0B3_MASK | GPIO0B5_MASK,
-		     GPIO0B5_SPI_RXD << GPIO0B5_SHIFT |
-		     GPIO0B3_SPI_TXD << GPIO0B3_SHIFT |
-		     GPIO0B1_SPI_CLK << GPIO0B1_SHIFT);
-}
-
-static void pinctrl_rk322x_uart_config(struct rk322x_grf *grf, int uart_id)
-{
-	u32 mux_con = readl(&grf->con_iomux);
-
-	switch (uart_id) {
-	case PERIPH_ID_UART1:
-		if (!(mux_con & CON_IOMUX_UART1SEL_MASK))
-			rk_clrsetreg(&grf->gpio1b_iomux,
-				     GPIO1B1_MASK | GPIO1B2_MASK,
-				     GPIO1B1_UART1_SOUT << GPIO1B1_SHIFT |
-				     GPIO1B2_UART1_SIN << GPIO1B2_SHIFT);
-		break;
-	case PERIPH_ID_UART2:
-		if (mux_con & CON_IOMUX_UART2SEL_MASK)
-			rk_clrsetreg(&grf->gpio1b_iomux,
-				     GPIO1B1_MASK | GPIO1B2_MASK,
-				     GPIO1B1_UART21_SOUT << GPIO1B1_SHIFT |
-				     GPIO1B2_UART21_SIN << GPIO1B2_SHIFT);
-		else
-			rk_clrsetreg(&grf->gpio1c_iomux,
-				     GPIO1C3_MASK | GPIO1C2_MASK,
-				     GPIO1C3_UART2_SIN << GPIO1C3_SHIFT |
-				     GPIO1C2_UART2_SOUT << GPIO1C2_SHIFT);
-		break;
-	}
-}
-
-static void pinctrl_rk322x_sdmmc_config(struct rk322x_grf *grf, int mmc_id)
-{
-	switch (mmc_id) {
-	case PERIPH_ID_EMMC:
-		rk_clrsetreg(&grf->gpio1d_iomux, 0xffff,
-			     GPIO1D7_EMMC_D7 << GPIO1D7_SHIFT |
-			     GPIO1D6_EMMC_D6 << GPIO1D6_SHIFT |
-			     GPIO1D5_EMMC_D5 << GPIO1D5_SHIFT |
-			     GPIO1D4_EMMC_D4 << GPIO1D4_SHIFT |
-			     GPIO1D3_EMMC_D3 << GPIO1D3_SHIFT |
-			     GPIO1D2_EMMC_D2 << GPIO1D2_SHIFT |
-			     GPIO1D1_EMMC_D1 << GPIO1D1_SHIFT |
-			     GPIO1D0_EMMC_D0 << GPIO1D0_SHIFT);
-		rk_clrsetreg(&grf->gpio2a_iomux,
-			     GPIO2A5_MASK | GPIO2A7_MASK,
-			     GPIO2A5_EMMC_PWREN << GPIO2A5_SHIFT |
-			     GPIO2A7_EMMC_CLKOUT << GPIO2A7_SHIFT);
-		rk_clrsetreg(&grf->gpio1c_iomux,
-			     GPIO1C6_MASK | GPIO1C7_MASK,
-			     GPIO1C6_EMMC_CMD << GPIO1C6_SHIFT |
-			     GPIO1C7_EMMC_RSTNOUT << GPIO1C6_SHIFT);
-		break;
-	case PERIPH_ID_SDCARD:
-		rk_clrsetreg(&grf->gpio1b_iomux,
-			     GPIO1B6_MASK | GPIO1B7_MASK,
-			     GPIO1B6_SDMMC_PWREN << GPIO1B6_SHIFT |
-			     GPIO1B7_SDMMC_CMD << GPIO1B7_SHIFT);
-		rk_clrsetreg(&grf->gpio1c_iomux, 0xfff,
-			     GPIO1C5_SDMMC_D3 << GPIO1C5_SHIFT |
-			     GPIO1C4_SDMMC_D2 << GPIO1C4_SHIFT |
-			     GPIO1C3_SDMMC_D1 << GPIO1C3_SHIFT |
-			     GPIO1C2_SDMMC_D0 << GPIO1C2_SHIFT |
-			     GPIO1C1_SDMMC_DETN << GPIO1C1_SHIFT |
-			     GPIO1C0_SDMMC_CLKOUT << GPIO1C0_SHIFT);
-		break;
-	}
-}
-
-static int rk322x_pinctrl_request(struct udevice *dev, int func, int flags)
-{
-	struct rk322x_pinctrl_priv *priv = dev_get_priv(dev);
-
-	debug("%s: func=%x, flags=%x\n", __func__, func, flags);
-	switch (func) {
-	case PERIPH_ID_PWM0:
-	case PERIPH_ID_PWM1:
-	case PERIPH_ID_PWM2:
-	case PERIPH_ID_PWM3:
-		pinctrl_rk322x_pwm_config(priv->grf, func);
-		break;
-	case PERIPH_ID_I2C0:
-	case PERIPH_ID_I2C1:
-	case PERIPH_ID_I2C2:
-		pinctrl_rk322x_i2c_config(priv->grf, func);
-		break;
-	case PERIPH_ID_SPI0:
-		pinctrl_rk322x_spi_config(priv->grf, flags);
-		break;
-	case PERIPH_ID_UART0:
-	case PERIPH_ID_UART1:
-	case PERIPH_ID_UART2:
-		pinctrl_rk322x_uart_config(priv->grf, func);
-		break;
-	case PERIPH_ID_SDMMC0:
-	case PERIPH_ID_SDMMC1:
-		pinctrl_rk322x_sdmmc_config(priv->grf, func);
-		break;
-	default:
-		return -EINVAL;
-	}
-
-	return 0;
-}
-
-static int rk322x_pinctrl_get_periph_id(struct udevice *dev,
-					struct udevice *periph)
-{
-	u32 cell[3];
-	int ret;
-
-	ret = dev_read_u32_array(periph, "interrupts", cell, ARRAY_SIZE(cell));
-	if (ret < 0)
-		return -EINVAL;
-
-	switch (cell[1]) {
-	case 12:
-		return PERIPH_ID_SDCARD;
-	case 14:
-		return PERIPH_ID_EMMC;
-	case 36:
-		return PERIPH_ID_I2C0;
-	case 37:
-		return PERIPH_ID_I2C1;
-	case 38:
-		return PERIPH_ID_I2C2;
-	case 49:
-		return PERIPH_ID_SPI0;
-	case 50:
-		return PERIPH_ID_PWM0;
-	case 55:
-		return PERIPH_ID_UART0;
-	case 56:
-		return PERIPH_ID_UART1;
-	case 57:
-		return PERIPH_ID_UART2;
-	}
-	return -ENOENT;
-}
-
-static int rk322x_pinctrl_set_state_simple(struct udevice *dev,
-					   struct udevice *periph)
-{
-	int func;
-
-	func = rk322x_pinctrl_get_periph_id(dev, periph);
-	if (func < 0)
-		return func;
-	return rk322x_pinctrl_request(dev, func, 0);
-}
-
-static struct pinctrl_ops rk322x_pinctrl_ops = {
-	.set_state_simple	= rk322x_pinctrl_set_state_simple,
-	.request	= rk322x_pinctrl_request,
-	.get_periph_id	= rk322x_pinctrl_get_periph_id,
-};
-
-static int rk322x_pinctrl_probe(struct udevice *dev)
-{
-	struct rk322x_pinctrl_priv *priv = dev_get_priv(dev);
-
-	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	debug("%s: grf=%p\n", __func__, priv->grf);
-	return 0;
-}
-
-static const struct udevice_id rk322x_pinctrl_ids[] = {
-	{ .compatible = "rockchip,rk3228-pinctrl" },
-	{ }
-};
-
-U_BOOT_DRIVER(pinctrl_rk3228) = {
-	.name		= "pinctrl_rk3228",
-	.id		= UCLASS_PINCTRL,
-	.of_match	= rk322x_pinctrl_ids,
-	.priv_auto_alloc_size = sizeof(struct rk322x_pinctrl_priv),
-	.ops		= &rk322x_pinctrl_ops,
-	.bind		= dm_scan_fdt_dev,
-	.probe		= rk322x_pinctrl_probe,
-};
diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3288.c b/drivers/pinctrl/rockchip/pinctrl_rk3288.c
deleted file mode 100644
index 721aeab966..0000000000
--- a/drivers/pinctrl/rockchip/pinctrl_rk3288.c
+++ /dev/null
@@ -1,871 +0,0 @@
-/*
- * Pinctrl driver for Rockchip SoCs
- * Copyright (c) 2015 Google, Inc
- * Written by Simon Glass <sjg@chromium.org>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <syscon.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/grf_rk3288.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/periph.h>
-#include <asm/arch/pmu_rk3288.h>
-#include <dm/pinctrl.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-struct rk3288_pinctrl_priv {
-	struct rk3288_grf *grf;
-	struct rk3288_pmu *pmu;
-	int num_banks;
-};
-
-/**
- * Encode variants of iomux registers into a type variable
- */
-#define IOMUX_GPIO_ONLY		BIT(0)
-#define IOMUX_WIDTH_4BIT	BIT(1)
-#define IOMUX_SOURCE_PMU	BIT(2)
-#define IOMUX_UNROUTED		BIT(3)
-
-/**
- * @type: iomux variant using IOMUX_* constants
- * @offset: if initialized to -1 it will be autocalculated, by specifying
- *	    an initial offset value the relevant source offset can be reset
- *	    to a new value for autocalculating the following iomux registers.
- */
-struct rockchip_iomux {
-	u8 type;
-	s16 offset;
-};
-
-/**
- * @reg: register offset of the gpio bank
- * @nr_pins: number of pins in this bank
- * @bank_num: number of the bank, to account for holes
- * @name: name of the bank
- * @iomux: array describing the 4 iomux sources of the bank
- */
-struct rockchip_pin_bank {
-	u16 reg;
-	u8 nr_pins;
-	u8 bank_num;
-	char *name;
-	struct rockchip_iomux iomux[4];
-};
-
-#define PIN_BANK(id, pins, label)			\
-	{						\
-		.bank_num	= id,			\
-		.nr_pins	= pins,			\
-		.name		= label,		\
-		.iomux		= {			\
-			{ .offset = -1 },		\
-			{ .offset = -1 },		\
-			{ .offset = -1 },		\
-			{ .offset = -1 },		\
-		},					\
-	}
-
-#define PIN_BANK_IOMUX_FLAGS(id, pins, label, iom0, iom1, iom2, iom3)	\
-	{								\
-		.bank_num	= id,					\
-		.nr_pins	= pins,					\
-		.name		= label,				\
-		.iomux		= {					\
-			{ .type = iom0, .offset = -1 },			\
-			{ .type = iom1, .offset = -1 },			\
-			{ .type = iom2, .offset = -1 },			\
-			{ .type = iom3, .offset = -1 },			\
-		},							\
-	}
-
-#ifndef CONFIG_SPL_BUILD
-static struct rockchip_pin_bank rk3288_pin_banks[] = {
-	PIN_BANK_IOMUX_FLAGS(0, 24, "gpio0", IOMUX_SOURCE_PMU,
-					     IOMUX_SOURCE_PMU,
-					     IOMUX_SOURCE_PMU,
-					     IOMUX_UNROUTED
-			    ),
-	PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1", IOMUX_UNROUTED,
-					     IOMUX_UNROUTED,
-					     IOMUX_UNROUTED,
-					     0
-			    ),
-	PIN_BANK_IOMUX_FLAGS(2, 32, "gpio2", 0, 0, 0, IOMUX_UNROUTED),
-	PIN_BANK_IOMUX_FLAGS(3, 32, "gpio3", 0, 0, 0, IOMUX_WIDTH_4BIT),
-	PIN_BANK_IOMUX_FLAGS(4, 32, "gpio4", IOMUX_WIDTH_4BIT,
-					     IOMUX_WIDTH_4BIT,
-					     0,
-					     0
-			    ),
-	PIN_BANK_IOMUX_FLAGS(5, 32, "gpio5", IOMUX_UNROUTED,
-					     0,
-					     0,
-					     IOMUX_UNROUTED
-			    ),
-	PIN_BANK_IOMUX_FLAGS(6, 32, "gpio6", 0, 0, 0, IOMUX_UNROUTED),
-	PIN_BANK_IOMUX_FLAGS(7, 32, "gpio7", 0,
-					     0,
-					     IOMUX_WIDTH_4BIT,
-					     IOMUX_UNROUTED
-			    ),
-	PIN_BANK(8, 16, "gpio8"),
-};
-#endif
-
-static void pinctrl_rk3288_pwm_config(struct rk3288_grf *grf, int pwm_id)
-{
-	switch (pwm_id) {
-	case PERIPH_ID_PWM0:
-		rk_clrsetreg(&grf->gpio7a_iomux, GPIO7A0_MASK << GPIO7A0_SHIFT,
-			     GPIO7A0_PWM_0 << GPIO7A0_SHIFT);
-		break;
-	case PERIPH_ID_PWM1:
-		rk_clrsetreg(&grf->gpio7a_iomux, GPIO7A1_MASK << GPIO7A1_SHIFT,
-			     GPIO7A1_PWM_1 << GPIO7A1_SHIFT);
-		break;
-	case PERIPH_ID_PWM2:
-		rk_clrsetreg(&grf->gpio7a_iomux, GPIO7C6_MASK << GPIO7C6_SHIFT,
-			     GPIO7C6_PWM_2 << GPIO7C6_SHIFT);
-		break;
-	case PERIPH_ID_PWM3:
-		rk_clrsetreg(&grf->gpio7a_iomux, GPIO7C7_MASK << GPIO7C6_SHIFT,
-			     GPIO7C7_PWM_3 << GPIO7C7_SHIFT);
-		break;
-	default:
-		debug("pwm id = %d iomux error!\n", pwm_id);
-		break;
-	}
-}
-
-static void pinctrl_rk3288_i2c_config(struct rk3288_grf *grf,
-				      struct rk3288_pmu *pmu, int i2c_id)
-{
-	switch (i2c_id) {
-	case PERIPH_ID_I2C0:
-		clrsetbits_le32(&pmu->gpio0_iomux[PMU_GPIO0_B],
-				GPIO0_B7_MASK << GPIO0_B7_SHIFT,
-				GPIO0_B7_I2C0PMU_SDA << GPIO0_B7_SHIFT);
-		clrsetbits_le32(&pmu->gpio0_iomux[PMU_GPIO0_C],
-				GPIO0_C0_MASK << GPIO0_C0_SHIFT,
-				GPIO0_C0_I2C0PMU_SCL << GPIO0_C0_SHIFT);
-		break;
-#ifndef CONFIG_SPL_BUILD
-	case PERIPH_ID_I2C1:
-		rk_clrsetreg(&grf->gpio8a_iomux,
-			     GPIO8A4_MASK << GPIO8A4_SHIFT |
-			     GPIO8A5_MASK << GPIO8A5_SHIFT,
-			     GPIO8A4_I2C2SENSOR_SDA << GPIO8A4_SHIFT |
-			     GPIO8A5_I2C2SENSOR_SCL << GPIO8A5_SHIFT);
-		break;
-	case PERIPH_ID_I2C2:
-		rk_clrsetreg(&grf->gpio6b_iomux,
-			     GPIO6B1_MASK << GPIO6B1_SHIFT |
-			     GPIO6B2_MASK << GPIO6B2_SHIFT,
-			     GPIO6B1_I2C1AUDIO_SDA << GPIO6B1_SHIFT |
-			     GPIO6B2_I2C1AUDIO_SCL << GPIO6B2_SHIFT);
-		break;
-	case PERIPH_ID_I2C3:
-		rk_clrsetreg(&grf->gpio2c_iomux,
-			     GPIO2C1_MASK << GPIO2C1_SHIFT |
-			     GPIO2C0_MASK << GPIO2C0_SHIFT,
-			     GPIO2C1_I2C3CAM_SDA << GPIO2C1_SHIFT |
-			     GPIO2C0_I2C3CAM_SCL << GPIO2C0_SHIFT);
-		break;
-	case PERIPH_ID_I2C4:
-		rk_clrsetreg(&grf->gpio7cl_iomux,
-			     GPIO7C1_MASK << GPIO7C1_SHIFT |
-			     GPIO7C2_MASK << GPIO7C2_SHIFT,
-			     GPIO7C1_I2C4TP_SDA << GPIO7C1_SHIFT |
-			     GPIO7C2_I2C4TP_SCL << GPIO7C2_SHIFT);
-		break;
-	case PERIPH_ID_I2C5:
-		rk_clrsetreg(&grf->gpio7cl_iomux,
-			     GPIO7C3_MASK << GPIO7C3_SHIFT,
-			     GPIO7C3_I2C5HDMI_SDA << GPIO7C3_SHIFT);
-		rk_clrsetreg(&grf->gpio7ch_iomux,
-			     GPIO7C4_MASK << GPIO7C4_SHIFT,
-			     GPIO7C4_I2C5HDMI_SCL << GPIO7C4_SHIFT);
-		break;
-#endif
-	default:
-		debug("i2c id = %d iomux error!\n", i2c_id);
-		break;
-	}
-}
-
-#ifndef CONFIG_SPL_BUILD
-static void pinctrl_rk3288_lcdc_config(struct rk3288_grf *grf, int lcd_id)
-{
-	switch (lcd_id) {
-	case PERIPH_ID_LCDC0:
-		rk_clrsetreg(&grf->gpio1d_iomux,
-			     GPIO1D3_MASK << GPIO1D0_SHIFT |
-			     GPIO1D2_MASK << GPIO1D2_SHIFT |
-			     GPIO1D1_MASK << GPIO1D1_SHIFT |
-			     GPIO1D0_MASK << GPIO1D0_SHIFT,
-			     GPIO1D3_LCDC0_DCLK << GPIO1D3_SHIFT |
-			     GPIO1D2_LCDC0_DEN << GPIO1D2_SHIFT |
-			     GPIO1D1_LCDC0_VSYNC << GPIO1D1_SHIFT |
-			     GPIO1D0_LCDC0_HSYNC << GPIO1D0_SHIFT);
-		break;
-	default:
-		debug("lcdc id = %d iomux error!\n", lcd_id);
-		break;
-	}
-}
-#endif
-
-static int pinctrl_rk3288_spi_config(struct rk3288_grf *grf,
-				     enum periph_id spi_id, int cs)
-{
-	switch (spi_id) {
-#ifndef CONFIG_SPL_BUILD
-	case PERIPH_ID_SPI0:
-		switch (cs) {
-		case 0:
-			rk_clrsetreg(&grf->gpio5b_iomux,
-				     GPIO5B5_MASK << GPIO5B5_SHIFT,
-				     GPIO5B5_SPI0_CSN0 << GPIO5B5_SHIFT);
-			break;
-		case 1:
-			rk_clrsetreg(&grf->gpio5c_iomux,
-				     GPIO5C0_MASK << GPIO5C0_SHIFT,
-				     GPIO5C0_SPI0_CSN1 << GPIO5C0_SHIFT);
-			break;
-		default:
-			goto err;
-		}
-		rk_clrsetreg(&grf->gpio5b_iomux,
-			     GPIO5B7_MASK << GPIO5B7_SHIFT |
-			     GPIO5B6_MASK << GPIO5B6_SHIFT |
-			     GPIO5B4_MASK << GPIO5B4_SHIFT,
-			     GPIO5B7_SPI0_RXD << GPIO5B7_SHIFT |
-			     GPIO5B6_SPI0_TXD << GPIO5B6_SHIFT |
-			     GPIO5B4_SPI0_CLK << GPIO5B4_SHIFT);
-		break;
-	case PERIPH_ID_SPI1:
-		if (cs != 0)
-			goto err;
-		rk_clrsetreg(&grf->gpio7b_iomux,
-			     GPIO7B6_MASK << GPIO7B6_SHIFT |
-			     GPIO7B7_MASK << GPIO7B7_SHIFT |
-			     GPIO7B5_MASK << GPIO7B5_SHIFT |
-			     GPIO7B4_MASK << GPIO7B4_SHIFT,
-			     GPIO7B6_SPI1_RXD << GPIO7B6_SHIFT |
-			     GPIO7B7_SPI1_TXD << GPIO7B7_SHIFT |
-			     GPIO7B5_SPI1_CSN0 << GPIO7B5_SHIFT |
-			     GPIO7B4_SPI1_CLK << GPIO7B4_SHIFT);
-		break;
-#endif
-	case PERIPH_ID_SPI2:
-		switch (cs) {
-		case 0:
-			rk_clrsetreg(&grf->gpio8a_iomux,
-				     GPIO8A7_MASK << GPIO8A7_SHIFT,
-				     GPIO8A7_SPI2_CSN0 << GPIO8A7_SHIFT);
-			break;
-		case 1:
-			rk_clrsetreg(&grf->gpio8a_iomux,
-				     GPIO8A3_MASK << GPIO8A3_SHIFT,
-				     GPIO8A3_SPI2_CSN1 << GPIO8A3_SHIFT);
-			break;
-		default:
-			goto err;
-		}
-		rk_clrsetreg(&grf->gpio8b_iomux,
-			     GPIO8B1_MASK << GPIO8B1_SHIFT |
-			     GPIO8B0_MASK << GPIO8B0_SHIFT,
-			     GPIO8B1_SPI2_TXD << GPIO8B1_SHIFT |
-			     GPIO8B0_SPI2_RXD << GPIO8B0_SHIFT);
-		rk_clrsetreg(&grf->gpio8a_iomux,
-			     GPIO8A6_MASK << GPIO8A6_SHIFT,
-			     GPIO8A6_SPI2_CLK << GPIO8A6_SHIFT);
-		break;
-	default:
-		goto err;
-	}
-
-	return 0;
-err:
-	debug("rkspi: periph%d cs=%d not supported", spi_id, cs);
-	return -ENOENT;
-}
-
-static void pinctrl_rk3288_uart_config(struct rk3288_grf *grf, int uart_id)
-{
-	switch (uart_id) {
-#ifndef CONFIG_SPL_BUILD
-	case PERIPH_ID_UART_BT:
-		rk_clrsetreg(&grf->gpio4c_iomux,
-			     GPIO4C3_MASK << GPIO4C3_SHIFT |
-			     GPIO4C2_MASK << GPIO4C2_SHIFT |
-			     GPIO4C1_MASK << GPIO4C1_SHIFT |
-			     GPIO4C0_MASK << GPIO4C0_SHIFT,
-			     GPIO4C3_UART0BT_RTSN << GPIO4C3_SHIFT |
-			     GPIO4C2_UART0BT_CTSN << GPIO4C2_SHIFT |
-			     GPIO4C1_UART0BT_SOUT << GPIO4C1_SHIFT |
-			     GPIO4C0_UART0BT_SIN << GPIO4C0_SHIFT);
-		break;
-	case PERIPH_ID_UART_BB:
-		rk_clrsetreg(&grf->gpio5b_iomux,
-			     GPIO5B3_MASK << GPIO5B3_SHIFT |
-			     GPIO5B2_MASK << GPIO5B2_SHIFT |
-			     GPIO5B1_MASK << GPIO5B1_SHIFT |
-			     GPIO5B0_MASK << GPIO5B0_SHIFT,
-			     GPIO5B3_UART1BB_RTSN << GPIO5B3_SHIFT |
-			     GPIO5B2_UART1BB_CTSN << GPIO5B2_SHIFT |
-			     GPIO5B1_UART1BB_SOUT << GPIO5B1_SHIFT |
-			     GPIO5B0_UART1BB_SIN << GPIO5B0_SHIFT);
-		break;
-#endif
-	case PERIPH_ID_UART_DBG:
-		rk_clrsetreg(&grf->gpio7ch_iomux,
-			     GPIO7C7_MASK << GPIO7C7_SHIFT |
-			     GPIO7C6_MASK << GPIO7C6_SHIFT,
-			     GPIO7C7_UART2DBG_SOUT << GPIO7C7_SHIFT |
-			     GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT);
-		break;
-#ifndef CONFIG_SPL_BUILD
-	case PERIPH_ID_UART_GPS:
-		rk_clrsetreg(&grf->gpio7b_iomux,
-			     GPIO7B2_MASK << GPIO7B2_SHIFT |
-			     GPIO7B1_MASK << GPIO7B1_SHIFT |
-			     GPIO7B0_MASK << GPIO7B0_SHIFT,
-			     GPIO7B2_UART3GPS_RTSN << GPIO7B2_SHIFT |
-			     GPIO7B1_UART3GPS_CTSN << GPIO7B1_SHIFT |
-			     GPIO7B0_UART3GPS_SOUT << GPIO7B0_SHIFT);
-		rk_clrsetreg(&grf->gpio7a_iomux,
-			     GPIO7A7_MASK << GPIO7A7_SHIFT,
-			     GPIO7A7_UART3GPS_SIN << GPIO7A7_SHIFT);
-		break;
-	case PERIPH_ID_UART_EXP:
-		rk_clrsetreg(&grf->gpio5b_iomux,
-			     GPIO5B5_MASK << GPIO5B5_SHIFT |
-			     GPIO5B4_MASK << GPIO5B4_SHIFT |
-			     GPIO5B6_MASK << GPIO5B6_SHIFT |
-			     GPIO5B7_MASK << GPIO5B7_SHIFT,
-			     GPIO5B5_UART4EXP_RTSN << GPIO5B5_SHIFT |
-			     GPIO5B4_UART4EXP_CTSN << GPIO5B4_SHIFT |
-			     GPIO5B6_UART4EXP_SOUT << GPIO5B6_SHIFT |
-			     GPIO5B7_UART4EXP_SIN << GPIO5B7_SHIFT);
-		break;
-#endif
-	default:
-		debug("uart id = %d iomux error!\n", uart_id);
-		break;
-	}
-}
-
-static void pinctrl_rk3288_sdmmc_config(struct rk3288_grf *grf, int mmc_id)
-{
-	switch (mmc_id) {
-	case PERIPH_ID_EMMC:
-		rk_clrsetreg(&grf->gpio3a_iomux, 0xffff,
-			     GPIO3A7_EMMC_DATA7 << GPIO3A7_SHIFT |
-			     GPIO3A6_EMMC_DATA6 << GPIO3A6_SHIFT |
-			     GPIO3A5_EMMC_DATA5 << GPIO3A5_SHIFT |
-			     GPIO3A4_EMMC_DATA4 << GPIO3A4_SHIFT |
-			     GPIO3A3_EMMC_DATA3 << GPIO3A3_SHIFT |
-			     GPIO3A2_EMMC_DATA2 << GPIO3A2_SHIFT |
-			     GPIO3A1_EMMC_DATA1 << GPIO3A1_SHIFT |
-			     GPIO3A0_EMMC_DATA0 << GPIO3A0_SHIFT);
-		rk_clrsetreg(&grf->gpio3b_iomux, GPIO3B1_MASK << GPIO3B1_SHIFT,
-			     GPIO3B1_EMMC_PWREN << GPIO3B1_SHIFT);
-		rk_clrsetreg(&grf->gpio3c_iomux,
-			     GPIO3C0_MASK << GPIO3C0_SHIFT,
-			     GPIO3C0_EMMC_CMD << GPIO3C0_SHIFT);
-		break;
-	case PERIPH_ID_SDCARD:
-		rk_clrsetreg(&grf->gpio6c_iomux, 0xffff,
-			     GPIO6C6_SDMMC0_DECTN << GPIO6C6_SHIFT |
-			     GPIO6C5_SDMMC0_CMD << GPIO6C5_SHIFT |
-			     GPIO6C4_SDMMC0_CLKOUT << GPIO6C4_SHIFT |
-			     GPIO6C3_SDMMC0_DATA3 << GPIO6C3_SHIFT |
-			     GPIO6C2_SDMMC0_DATA2 << GPIO6C2_SHIFT |
-			     GPIO6C1_SDMMC0_DATA1 << GPIO6C1_SHIFT |
-			     GPIO6C0_SDMMC0_DATA0 << GPIO6C0_SHIFT);
-
-		/* use sdmmc0 io, disable JTAG function */
-		rk_clrsetreg(&grf->soc_con0, 1 << GRF_FORCE_JTAG_SHIFT, 0);
-		break;
-	default:
-		debug("mmc id = %d iomux error!\n", mmc_id);
-		break;
-	}
-}
-
-static void pinctrl_rk3288_gmac_config(struct rk3288_grf *grf, int gmac_id)
-{
-	switch (gmac_id) {
-	case PERIPH_ID_GMAC:
-		rk_clrsetreg(&grf->gpio3dl_iomux,
-			     GPIO3D3_MASK << GPIO3D3_SHIFT |
-			     GPIO3D2_MASK << GPIO3D2_SHIFT |
-			     GPIO3D2_MASK << GPIO3D1_SHIFT |
-			     GPIO3D0_MASK << GPIO3D0_SHIFT,
-			     GPIO3D3_MAC_RXD3 << GPIO3D3_SHIFT |
-			     GPIO3D2_MAC_RXD2 << GPIO3D2_SHIFT |
-			     GPIO3D1_MAC_TXD3 << GPIO3D1_SHIFT |
-			     GPIO3D0_MAC_TXD2 << GPIO3D0_SHIFT);
-
-		rk_clrsetreg(&grf->gpio3dh_iomux,
-			     GPIO3D7_MASK << GPIO3D7_SHIFT |
-			     GPIO3D6_MASK << GPIO3D6_SHIFT |
-			     GPIO3D5_MASK << GPIO3D5_SHIFT |
-			     GPIO3D4_MASK << GPIO3D4_SHIFT,
-			     GPIO3D7_MAC_RXD1 << GPIO3D7_SHIFT |
-			     GPIO3D6_MAC_RXD0 << GPIO3D6_SHIFT |
-			     GPIO3D5_MAC_TXD1 << GPIO3D5_SHIFT |
-			     GPIO3D4_MAC_TXD0 << GPIO3D4_SHIFT);
-
-		/* switch the Tx pins to 12ma drive-strength */
-		rk_clrsetreg(&grf->gpio1_e[2][3],
-			     GPIO_BIAS_MASK |
-			     (GPIO_BIAS_MASK << GPIO_BIAS_SHIFT(1)) |
-			     (GPIO_BIAS_MASK << GPIO_BIAS_SHIFT(4)) |
-			     (GPIO_BIAS_MASK << GPIO_BIAS_SHIFT(5)),
-			     (GPIO_BIAS_12MA << GPIO_BIAS_SHIFT(0)) |
-			     (GPIO_BIAS_12MA << GPIO_BIAS_SHIFT(1)) |
-			     (GPIO_BIAS_12MA << GPIO_BIAS_SHIFT(4)) |
-			     (GPIO_BIAS_12MA << GPIO_BIAS_SHIFT(5)));
-
-		/* Set normal pull for all GPIO3D pins */
-		rk_clrsetreg(&grf->gpio1_p[2][3],
-			     (GPIO_PULL_MASK << GPIO_PULL_SHIFT(0)) |
-			     (GPIO_PULL_MASK << GPIO_PULL_SHIFT(1)) |
-			     (GPIO_PULL_MASK << GPIO_PULL_SHIFT(2)) |
-			     (GPIO_PULL_MASK << GPIO_PULL_SHIFT(3)) |
-			     (GPIO_PULL_MASK << GPIO_PULL_SHIFT(4)) |
-			     (GPIO_PULL_MASK << GPIO_PULL_SHIFT(5)) |
-			     (GPIO_PULL_MASK << GPIO_PULL_SHIFT(5)) |
-			     (GPIO_PULL_MASK << GPIO_PULL_SHIFT(7)),
-			     (GPIO_PULL_NORMAL << GPIO_PULL_SHIFT(0)) |
-			     (GPIO_PULL_NORMAL << GPIO_PULL_SHIFT(1)) |
-			     (GPIO_PULL_NORMAL << GPIO_PULL_SHIFT(2)) |
-			     (GPIO_PULL_NORMAL << GPIO_PULL_SHIFT(3)) |
-			     (GPIO_PULL_NORMAL << GPIO_PULL_SHIFT(4)) |
-			     (GPIO_PULL_NORMAL << GPIO_PULL_SHIFT(5)) |
-			     (GPIO_PULL_NORMAL << GPIO_PULL_SHIFT(6)) |
-			     (GPIO_PULL_NORMAL << GPIO_PULL_SHIFT(7)));
-
-		rk_clrsetreg(&grf->gpio4al_iomux,
-			     GPIO4A3_MASK << GPIO4A3_SHIFT |
-			     GPIO4A1_MASK << GPIO4A1_SHIFT |
-			     GPIO4A0_MASK << GPIO4A0_SHIFT,
-			     GPIO4A3_MAC_CLK << GPIO4A3_SHIFT |
-			     GPIO4A1_MAC_TXDV << GPIO4A1_SHIFT |
-			     GPIO4A0_MAC_MDC << GPIO4A0_SHIFT);
-
-		rk_clrsetreg(&grf->gpio4ah_iomux,
-			     GPIO4A6_MASK << GPIO4A6_SHIFT |
-			     GPIO4A5_MASK << GPIO4A5_SHIFT |
-			     GPIO4A4_MASK << GPIO4A4_SHIFT,
-			     GPIO4A6_MAC_RXCLK << GPIO4A6_SHIFT |
-			     GPIO4A5_MAC_MDIO << GPIO4A5_SHIFT |
-			     GPIO4A4_MAC_TXEN << GPIO4A4_SHIFT);
-
-		/* switch GPIO4A4 to 12ma drive-strength */
-		rk_clrsetreg(&grf->gpio1_e[3][0],
-			     GPIO_BIAS_MASK << GPIO_BIAS_SHIFT(4),
-			     GPIO_BIAS_12MA << GPIO_BIAS_SHIFT(4));
-
-		/* Set normal pull for all GPIO4A pins */
-		rk_clrsetreg(&grf->gpio1_p[3][0],
-			     (GPIO_PULL_MASK << GPIO_PULL_SHIFT(0)) |
-			     (GPIO_PULL_MASK << GPIO_PULL_SHIFT(1)) |
-			     (GPIO_PULL_MASK << GPIO_PULL_SHIFT(2)) |
-			     (GPIO_PULL_MASK << GPIO_PULL_SHIFT(3)) |
-			     (GPIO_PULL_MASK << GPIO_PULL_SHIFT(4)) |
-			     (GPIO_PULL_MASK << GPIO_PULL_SHIFT(5)) |
-			     (GPIO_PULL_MASK << GPIO_PULL_SHIFT(5)) |
-			     (GPIO_PULL_MASK << GPIO_PULL_SHIFT(7)),
-			     (GPIO_PULL_NORMAL << GPIO_PULL_SHIFT(0)) |
-			     (GPIO_PULL_NORMAL << GPIO_PULL_SHIFT(1)) |
-			     (GPIO_PULL_NORMAL << GPIO_PULL_SHIFT(2)) |
-			     (GPIO_PULL_NORMAL << GPIO_PULL_SHIFT(3)) |
-			     (GPIO_PULL_NORMAL << GPIO_PULL_SHIFT(4)) |
-			     (GPIO_PULL_NORMAL << GPIO_PULL_SHIFT(5)) |
-			     (GPIO_PULL_NORMAL << GPIO_PULL_SHIFT(6)) |
-			     (GPIO_PULL_NORMAL << GPIO_PULL_SHIFT(7)));
-
-		rk_clrsetreg(&grf->gpio4bl_iomux,
-			    GPIO4B1_MASK << GPIO4B1_SHIFT,
-			    GPIO4B1_MAC_TXCLK << GPIO4B1_SHIFT);
-
-		/* switch GPIO4B1 to 12ma drive-strength */
-		rk_clrsetreg(&grf->gpio1_e[3][1],
-			     GPIO_BIAS_MASK << GPIO_BIAS_SHIFT(1),
-			     GPIO_BIAS_12MA << GPIO_BIAS_SHIFT(1));
-
-		/* Set pull normal for GPIO4B1 */
-		rk_clrsetreg(&grf->gpio1_p[3][1],
-			     (GPIO_PULL_MASK << GPIO_PULL_SHIFT(1)),
-			     (GPIO_PULL_NORMAL << GPIO_PULL_SHIFT(1)));
-
-		break;
-	default:
-		printf("gmac id = %d iomux error!\n", gmac_id);
-		break;
-	}
-}
-
-#ifndef CONFIG_SPL_BUILD
-static void pinctrl_rk3288_hdmi_config(struct rk3288_grf *grf, int hdmi_id)
-{
-	switch (hdmi_id) {
-	case PERIPH_ID_HDMI:
-		rk_clrsetreg(&grf->gpio7cl_iomux, GPIO7C3_MASK << GPIO7C3_SHIFT,
-			     GPIO7C3_EDPHDMII2C_SDA << GPIO7C3_SHIFT);
-		rk_clrsetreg(&grf->gpio7ch_iomux, GPIO7C4_MASK << GPIO7C4_SHIFT,
-			     GPIO7C4_EDPHDMII2C_SCL << GPIO7C4_SHIFT);
-		break;
-	default:
-		debug("hdmi id = %d iomux error!\n", hdmi_id);
-		break;
-	}
-}
-#endif
-
-static int rk3288_pinctrl_request(struct udevice *dev, int func, int flags)
-{
-	struct rk3288_pinctrl_priv *priv = dev_get_priv(dev);
-
-	debug("%s: func=%x, flags=%x\n", __func__, func, flags);
-	switch (func) {
-	case PERIPH_ID_PWM0:
-	case PERIPH_ID_PWM1:
-	case PERIPH_ID_PWM2:
-	case PERIPH_ID_PWM3:
-	case PERIPH_ID_PWM4:
-		pinctrl_rk3288_pwm_config(priv->grf, func);
-		break;
-	case PERIPH_ID_I2C0:
-	case PERIPH_ID_I2C1:
-	case PERIPH_ID_I2C2:
-	case PERIPH_ID_I2C3:
-	case PERIPH_ID_I2C4:
-	case PERIPH_ID_I2C5:
-		pinctrl_rk3288_i2c_config(priv->grf, priv->pmu, func);
-		break;
-	case PERIPH_ID_SPI0:
-	case PERIPH_ID_SPI1:
-	case PERIPH_ID_SPI2:
-		pinctrl_rk3288_spi_config(priv->grf, func, flags);
-		break;
-	case PERIPH_ID_UART0:
-	case PERIPH_ID_UART1:
-	case PERIPH_ID_UART2:
-	case PERIPH_ID_UART3:
-	case PERIPH_ID_UART4:
-		pinctrl_rk3288_uart_config(priv->grf, func);
-		break;
-#ifndef CONFIG_SPL_BUILD
-	case PERIPH_ID_LCDC0:
-	case PERIPH_ID_LCDC1:
-		pinctrl_rk3288_lcdc_config(priv->grf, func);
-		break;
-	case PERIPH_ID_HDMI:
-		pinctrl_rk3288_hdmi_config(priv->grf, func);
-		break;
-#endif
-	case PERIPH_ID_SDMMC0:
-	case PERIPH_ID_SDMMC1:
-		pinctrl_rk3288_sdmmc_config(priv->grf, func);
-		break;
-	case PERIPH_ID_GMAC:
-		pinctrl_rk3288_gmac_config(priv->grf, func);
-		break;
-	default:
-		return -EINVAL;
-	}
-
-	return 0;
-}
-
-static int rk3288_pinctrl_get_periph_id(struct udevice *dev,
-					struct udevice *periph)
-{
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
-	u32 cell[3];
-	int ret;
-
-	ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(periph),
-				   "interrupts", cell, ARRAY_SIZE(cell));
-	if (ret < 0)
-		return -EINVAL;
-
-	switch (cell[1]) {
-	case 27:
-		return PERIPH_ID_GMAC;
-	case 44:
-		return PERIPH_ID_SPI0;
-	case 45:
-		return PERIPH_ID_SPI1;
-	case 46:
-		return PERIPH_ID_SPI2;
-	case 60:
-		return PERIPH_ID_I2C0;
-	case 62: /* Note strange order */
-		return PERIPH_ID_I2C1;
-	case 61:
-		return PERIPH_ID_I2C2;
-	case 63:
-		return PERIPH_ID_I2C3;
-	case 64:
-		return PERIPH_ID_I2C4;
-	case 65:
-		return PERIPH_ID_I2C5;
-	case 103:
-		return PERIPH_ID_HDMI;
-	}
-#endif
-
-	return -ENOENT;
-}
-
-static int rk3288_pinctrl_set_state_simple(struct udevice *dev,
-					   struct udevice *periph)
-{
-	int func;
-
-	func = rk3288_pinctrl_get_periph_id(dev, periph);
-	if (func < 0)
-		return func;
-	return rk3288_pinctrl_request(dev, func, 0);
-}
-
-#ifndef CONFIG_SPL_BUILD
-int rk3288_pinctrl_get_pin_info(struct rk3288_pinctrl_priv *priv,
-				int banknum, int ind, u32 **addrp, uint *shiftp,
-				uint *maskp)
-{
-	struct rockchip_pin_bank *bank = &rk3288_pin_banks[banknum];
-	uint muxnum;
-	u32 *addr;
-
-	for (muxnum = 0; muxnum < 4; muxnum++) {
-		struct rockchip_iomux *mux = &bank->iomux[muxnum];
-
-		if (ind >= 8) {
-			ind -= 8;
-			continue;
-		}
-
-		if (mux->type & IOMUX_SOURCE_PMU)
-			addr = priv->pmu->gpio0_iomux;
-		else
-			addr = (u32 *)priv->grf - 4;
-		addr += mux->offset;
-		*shiftp = ind & 7;
-		if (mux->type & IOMUX_WIDTH_4BIT) {
-			*maskp = 0xf;
-			*shiftp *= 4;
-			if (*shiftp >= 16) {
-				*shiftp -= 16;
-				addr++;
-			}
-		} else {
-			*maskp = 3;
-			*shiftp *= 2;
-		}
-
-		debug("%s: addr=%p, mask=%x, shift=%x\n", __func__, addr,
-		      *maskp, *shiftp);
-		*addrp = addr;
-		return 0;
-	}
-
-	return -EINVAL;
-}
-
-static int rk3288_pinctrl_get_gpio_mux(struct udevice *dev, int banknum,
-				       int index)
-{
-	struct rk3288_pinctrl_priv *priv = dev_get_priv(dev);
-	uint shift;
-	uint mask;
-	u32 *addr;
-	int ret;
-
-	ret = rk3288_pinctrl_get_pin_info(priv, banknum, index, &addr, &shift,
-					  &mask);
-	if (ret)
-		return ret;
-	return (readl(addr) & mask) >> shift;
-}
-
-static int rk3288_pinctrl_set_pins(struct udevice *dev, int banknum, int index,
-				   int muxval, int flags)
-{
-	struct rk3288_pinctrl_priv *priv = dev_get_priv(dev);
-	uint shift, ind = index;
-	uint mask;
-	uint value;
-	u32 *addr;
-	int ret;
-
-	debug("%s: %x %x %x %x\n", __func__, banknum, index, muxval, flags);
-	ret = rk3288_pinctrl_get_pin_info(priv, banknum, index, &addr, &shift,
-					  &mask);
-	if (ret)
-		return ret;
-
-	/*
-	 * PMU_GPIO0 registers cannot be selectively written so we cannot use
-	 * rk_clrsetreg() here.  However, the upper 16 bits are reserved and
-	 * are ignored when written, so we can use the same code as for the
-	 * other GPIO banks providing that we preserve the value of the other
-	 * bits.
-	 */
-	value = readl(addr);
-	value &= ~(mask << shift);
-	value |= (mask << (shift + 16)) | (muxval << shift);
-	writel(value, addr);
-
-	/* Handle pullup/pulldown/drive-strength */
-	if (flags) {
-		uint val = 0;
-
-		if (flags & (1 << PIN_CONFIG_BIAS_PULL_UP))
-			val = 1;
-		else if (flags & (1 << PIN_CONFIG_BIAS_PULL_DOWN))
-			val = 2;
-		else if (flags & (1 << PIN_CONFIG_DRIVE_STRENGTH))
-			val = 3;
-
-		shift = (index & 7) * 2;
-		ind = index >> 3;
-		if (banknum == 0)
-			addr = &priv->pmu->gpio0pull[ind];
-		else if (flags & (1 << PIN_CONFIG_DRIVE_STRENGTH))
-			addr = &priv->grf->gpio1_e[banknum - 1][ind];
-		else
-			addr = &priv->grf->gpio1_p[banknum - 1][ind];
-		debug("%s: addr=%p, val=%x, shift=%x\n", __func__, addr, val,
-		      shift);
-
-		/* As above, rk_clrsetreg() cannot be used here. */
-		value = readl(addr);
-		value &= ~(mask << shift);
-		value |= (3 << (shift + 16)) | (val << shift);
-		writel(value, addr);
-	}
-
-	return 0;
-}
-
-static int rk3288_pinctrl_set_state(struct udevice *dev, struct udevice *config)
-{
-	const void *blob = gd->fdt_blob;
-	int pcfg_node, ret, flags, count, i;
-	u32 cell[60], *ptr;
-
-	debug("%s: %s %s\n", __func__, dev->name, config->name);
-	ret = fdtdec_get_int_array_count(blob, dev_of_offset(config),
-					 "rockchip,pins", cell,
-					 ARRAY_SIZE(cell));
-	if (ret < 0) {
-		debug("%s: bad array %d\n", __func__, ret);
-		return -EINVAL;
-	}
-	count = ret;
-	for (i = 0, ptr = cell; i < count; i += 4, ptr += 4) {
-		pcfg_node = fdt_node_offset_by_phandle(blob, ptr[3]);
-		if (pcfg_node < 0)
-			return -EINVAL;
-		flags = pinctrl_decode_pin_config(blob, pcfg_node);
-		if (flags < 0)
-			return flags;
-
-		if (fdtdec_get_int(blob, pcfg_node, "drive-strength", 0) == 12)
-			flags |= 1 << PIN_CONFIG_DRIVE_STRENGTH;
-
-		ret = rk3288_pinctrl_set_pins(dev, ptr[0], ptr[1], ptr[2],
-					      flags);
-		if (ret)
-			return ret;
-	}
-
-	return 0;
-}
-#endif
-
-static struct pinctrl_ops rk3288_pinctrl_ops = {
-#ifndef CONFIG_SPL_BUILD
-	.set_state	= rk3288_pinctrl_set_state,
-	.get_gpio_mux	= rk3288_pinctrl_get_gpio_mux,
-#endif
-	.set_state_simple	= rk3288_pinctrl_set_state_simple,
-	.request	= rk3288_pinctrl_request,
-	.get_periph_id	= rk3288_pinctrl_get_periph_id,
-};
-
-#ifndef CONFIG_SPL_BUILD
-static int rk3288_pinctrl_parse_tables(struct rk3288_pinctrl_priv *priv,
-				       struct rockchip_pin_bank *banks,
-				       int count)
-{
-	struct rockchip_pin_bank *bank;
-	uint reg, muxnum, banknum;
-
-	reg = 0;
-	for (banknum = 0; banknum < count; banknum++) {
-		bank = &banks[banknum];
-		bank->reg = reg;
-		debug("%s: bank %d, reg %x\n", __func__, banknum, reg * 4);
-		for (muxnum = 0; muxnum < 4; muxnum++) {
-			struct rockchip_iomux *mux = &bank->iomux[muxnum];
-
-			if (!(mux->type & IOMUX_UNROUTED))
-				mux->offset = reg;
-			if (mux->type & IOMUX_WIDTH_4BIT)
-				reg += 2;
-			else
-				reg += 1;
-		}
-	}
-
-	return 0;
-}
-#endif
-
-static int rk3288_pinctrl_probe(struct udevice *dev)
-{
-	struct rk3288_pinctrl_priv *priv = dev_get_priv(dev);
-	int ret = 0;
-
-	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	priv->pmu = syscon_get_first_range(ROCKCHIP_SYSCON_PMU);
-	debug("%s: grf=%p, pmu=%p\n", __func__, priv->grf, priv->pmu);
-#ifndef CONFIG_SPL_BUILD
-	ret = rk3288_pinctrl_parse_tables(priv, rk3288_pin_banks,
-					  ARRAY_SIZE(rk3288_pin_banks));
-#endif
-
-	return ret;
-}
-
-static const struct udevice_id rk3288_pinctrl_ids[] = {
-	{ .compatible = "rockchip,rk3288-pinctrl" },
-	{ }
-};
-
-U_BOOT_DRIVER(pinctrl_rk3288) = {
-	.name		= "rockchip_rk3288_pinctrl",
-	.id		= UCLASS_PINCTRL,
-	.of_match	= rk3288_pinctrl_ids,
-	.priv_auto_alloc_size = sizeof(struct rk3288_pinctrl_priv),
-	.ops		= &rk3288_pinctrl_ops,
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
-	.bind		= dm_scan_fdt_dev,
-#endif
-	.probe		= rk3288_pinctrl_probe,
-};
diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3328.c b/drivers/pinctrl/rockchip/pinctrl_rk3328.c
deleted file mode 100644
index f3e7eec9e4..0000000000
--- a/drivers/pinctrl/rockchip/pinctrl_rk3328.c
+++ /dev/null
@@ -1,321 +0,0 @@
-/*
- * (C) Copyright 2016 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <syscon.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/grf_rk3328.h>
-#include <asm/arch/periph.h>
-#include <asm/io.h>
-#include <dm/pinctrl.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-struct rk3328_pinctrl_priv {
-	struct rk3328_grf_regs *grf;
-};
-
-static void pinctrl_rk3328_pwm_config(struct rk3328_grf_regs *grf, int pwm_id)
-{
-	switch (pwm_id) {
-	case PERIPH_ID_PWM0:
-		rk_clrsetreg(&grf->gpio2a_iomux,
-			     GPIO2A4_SEL_MASK,
-			     GPIO2A4_PWM_0 << GPIO2A4_SEL_SHIFT);
-		break;
-	case PERIPH_ID_PWM1:
-		rk_clrsetreg(&grf->gpio2a_iomux,
-			     GPIO2A5_SEL_MASK,
-			     GPIO2A5_PWM_1 << GPIO2A5_SEL_SHIFT);
-		break;
-	case PERIPH_ID_PWM2:
-		rk_clrsetreg(&grf->gpio2a_iomux,
-			     GPIO2A6_SEL_MASK,
-			     GPIO2A6_PWM_2 << GPIO2A6_SEL_SHIFT);
-		break;
-	case PERIPH_ID_PWM3:
-		rk_clrsetreg(&grf->gpio2a_iomux,
-			     GPIO2A2_SEL_MASK,
-			     GPIO2A2_PWM_IR << GPIO2A2_SEL_SHIFT);
-		break;
-	default:
-		debug("pwm id = %d iomux error!\n", pwm_id);
-		break;
-	}
-}
-
-static void pinctrl_rk3328_i2c_config(struct rk3328_grf_regs *grf, int i2c_id)
-{
-	switch (i2c_id) {
-	case PERIPH_ID_I2C0:
-		rk_clrsetreg(&grf->gpio2d_iomux,
-			     GPIO2D0_SEL_MASK | GPIO2D1_SEL_MASK,
-			     GPIO2D0_I2C0_SCL << GPIO2D0_SEL_SHIFT |
-			     GPIO2D1_I2C0_SDA << GPIO2D1_SEL_SHIFT);
-		break;
-	case PERIPH_ID_I2C1:
-		rk_clrsetreg(&grf->gpio2a_iomux,
-			     GPIO2A4_SEL_MASK | GPIO2A5_SEL_MASK,
-			     GPIO2A5_I2C1_SCL << GPIO2A5_SEL_SHIFT |
-			     GPIO2A4_I2C1_SDA << GPIO2A4_SEL_SHIFT);
-		break;
-	case PERIPH_ID_I2C2:
-		rk_clrsetreg(&grf->gpio2bl_iomux,
-			     GPIO2BL5_SEL_MASK | GPIO2BL6_SEL_MASK,
-			     GPIO2BL6_I2C2_SCL << GPIO2BL6_SEL_SHIFT |
-			     GPIO2BL5_I2C2_SDA << GPIO2BL5_SEL_SHIFT);
-		break;
-	case PERIPH_ID_I2C3:
-		rk_clrsetreg(&grf->gpio0a_iomux,
-			     GPIO0A5_SEL_MASK | GPIO0A6_SEL_MASK,
-			     GPIO0A5_I2C3_SCL << GPIO0A5_SEL_SHIFT |
-			     GPIO0A6_I2C3_SDA << GPIO0A6_SEL_SHIFT);
-		break;
-	default:
-		debug("i2c id = %d iomux error!\n", i2c_id);
-		break;
-	}
-}
-
-static void pinctrl_rk3328_lcdc_config(struct rk3328_grf_regs *grf, int lcd_id)
-{
-	switch (lcd_id) {
-	case PERIPH_ID_LCDC0:
-		break;
-	default:
-		debug("lcdc id = %d iomux error!\n", lcd_id);
-		break;
-	}
-}
-
-static int pinctrl_rk3328_spi_config(struct rk3328_grf_regs *grf,
-				     enum periph_id spi_id, int cs)
-{
-	u32 com_iomux = readl(&grf->com_iomux);
-
-	if ((com_iomux & IOMUX_SEL_SPI_MASK) !=
-		IOMUX_SEL_SPI_M0 << IOMUX_SEL_SPI_SHIFT) {
-		debug("driver do not support iomux other than m0\n");
-		goto err;
-	}
-
-	switch (spi_id) {
-	case PERIPH_ID_SPI0:
-		switch (cs) {
-		case 0:
-			rk_clrsetreg(&grf->gpio2bl_iomux,
-				     GPIO2BL3_SEL_MASK,
-				     GPIO2BL3_SPI_CSN0_M0
-				     << GPIO2BL3_SEL_SHIFT);
-			break;
-		case 1:
-			rk_clrsetreg(&grf->gpio2bl_iomux,
-				     GPIO2BL4_SEL_MASK,
-				     GPIO2BL4_SPI_CSN1_M0
-				     << GPIO2BL4_SEL_SHIFT);
-			break;
-		default:
-			goto err;
-		}
-		rk_clrsetreg(&grf->gpio2bl_iomux,
-			     GPIO2BL0_SEL_MASK,
-			     GPIO2BL0_SPI_CLK_TX_RX_M0 << GPIO2BL0_SEL_SHIFT);
-		break;
-	default:
-		goto err;
-	}
-
-	return 0;
-err:
-	debug("rkspi: periph%d cs=%d not supported", spi_id, cs);
-	return -ENOENT;
-}
-
-static void pinctrl_rk3328_uart_config(struct rk3328_grf_regs *grf, int uart_id)
-{
-	u32 com_iomux = readl(&grf->com_iomux);
-
-	switch (uart_id) {
-	case PERIPH_ID_UART2:
-		break;
-		if (com_iomux & IOMUX_SEL_UART2_MASK)
-			rk_clrsetreg(&grf->gpio2a_iomux,
-				     GPIO2A0_SEL_MASK | GPIO2A1_SEL_MASK,
-				     GPIO2A0_UART2_TX_M1 << GPIO2A0_SEL_SHIFT |
-				     GPIO2A1_UART2_RX_M1 << GPIO2A1_SEL_SHIFT);
-
-		break;
-	case PERIPH_ID_UART0:
-	case PERIPH_ID_UART1:
-	case PERIPH_ID_UART3:
-	case PERIPH_ID_UART4:
-	default:
-		debug("uart id = %d iomux error!\n", uart_id);
-		break;
-	}
-}
-
-static void pinctrl_rk3328_sdmmc_config(struct rk3328_grf_regs *grf,
-					int mmc_id)
-{
-	u32 com_iomux = readl(&grf->com_iomux);
-
-	switch (mmc_id) {
-	case PERIPH_ID_EMMC:
-		rk_clrsetreg(&grf->gpio0a_iomux,
-			     GPIO0A7_SEL_MASK,
-			     GPIO0A7_EMMC_DATA0 << GPIO0A7_SEL_SHIFT);
-		rk_clrsetreg(&grf->gpio2d_iomux,
-			     GPIO2D4_SEL_MASK,
-			     GPIO2D4_EMMC_DATA1234 << GPIO2D4_SEL_SHIFT);
-		rk_clrsetreg(&grf->gpio3c_iomux,
-			     GPIO3C0_SEL_MASK,
-			     GPIO3C0_EMMC_DATA567_PWR_CLK_RSTN_CMD
-			     << GPIO3C0_SEL_SHIFT);
-		break;
-	case PERIPH_ID_SDCARD:
-		/* SDMMC_PWREN use GPIO and init as regulator-fiexed  */
-		if (com_iomux & IOMUX_SEL_SDMMC_MASK)
-			rk_clrsetreg(&grf->gpio0d_iomux,
-				     GPIO0D6_SEL_MASK,
-				     GPIO0D6_GPIO << GPIO0D6_SEL_SHIFT);
-		else
-			rk_clrsetreg(&grf->gpio2a_iomux,
-				     GPIO2A7_SEL_MASK,
-				     GPIO2A7_GPIO << GPIO2A7_SEL_SHIFT);
-		rk_clrsetreg(&grf->gpio1a_iomux,
-			     GPIO1A0_SEL_MASK,
-			     GPIO1A0_CARD_DATA_CLK_CMD_DETN
-			     << GPIO1A0_SEL_SHIFT);
-		break;
-	default:
-		debug("mmc id = %d iomux error!\n", mmc_id);
-		break;
-	}
-}
-
-static int rk3328_pinctrl_request(struct udevice *dev, int func, int flags)
-{
-	struct rk3328_pinctrl_priv *priv = dev_get_priv(dev);
-
-	debug("%s: func=%x, flags=%x\n", __func__, func, flags);
-	switch (func) {
-	case PERIPH_ID_PWM0:
-	case PERIPH_ID_PWM1:
-	case PERIPH_ID_PWM2:
-	case PERIPH_ID_PWM3:
-		pinctrl_rk3328_pwm_config(priv->grf, func);
-		break;
-	case PERIPH_ID_I2C0:
-	case PERIPH_ID_I2C1:
-	case PERIPH_ID_I2C2:
-	case PERIPH_ID_I2C3:
-		pinctrl_rk3328_i2c_config(priv->grf, func);
-		break;
-	case PERIPH_ID_SPI0:
-		pinctrl_rk3328_spi_config(priv->grf, func, flags);
-		break;
-	case PERIPH_ID_UART0:
-	case PERIPH_ID_UART1:
-	case PERIPH_ID_UART2:
-	case PERIPH_ID_UART3:
-	case PERIPH_ID_UART4:
-		pinctrl_rk3328_uart_config(priv->grf, func);
-		break;
-	case PERIPH_ID_LCDC0:
-	case PERIPH_ID_LCDC1:
-		pinctrl_rk3328_lcdc_config(priv->grf, func);
-		break;
-	case PERIPH_ID_SDMMC0:
-	case PERIPH_ID_SDMMC1:
-		pinctrl_rk3328_sdmmc_config(priv->grf, func);
-		break;
-	default:
-		return -EINVAL;
-	}
-
-	return 0;
-}
-
-static int rk3328_pinctrl_get_periph_id(struct udevice *dev,
-					struct udevice *periph)
-{
-	u32 cell[3];
-	int ret;
-
-	ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(periph),
-				   "interrupts", cell, ARRAY_SIZE(cell));
-	if (ret < 0)
-		return -EINVAL;
-
-	switch (cell[1]) {
-	case 49:
-		return PERIPH_ID_SPI0;
-	case 50:
-		return PERIPH_ID_PWM0;
-	case 36:
-		return PERIPH_ID_I2C0;
-	case 37: /* Note strange order */
-		return PERIPH_ID_I2C1;
-	case 38:
-		return PERIPH_ID_I2C2;
-	case 39:
-		return PERIPH_ID_I2C3;
-	case 12:
-		return PERIPH_ID_SDCARD;
-	case 14:
-		return PERIPH_ID_EMMC;
-	}
-
-	return -ENOENT;
-}
-
-static int rk3328_pinctrl_set_state_simple(struct udevice *dev,
-					   struct udevice *periph)
-{
-	int func;
-
-	func = rk3328_pinctrl_get_periph_id(dev, periph);
-	if (func < 0)
-		return func;
-
-	return rk3328_pinctrl_request(dev, func, 0);
-}
-
-static struct pinctrl_ops rk3328_pinctrl_ops = {
-	.set_state_simple	= rk3328_pinctrl_set_state_simple,
-	.request	= rk3328_pinctrl_request,
-	.get_periph_id	= rk3328_pinctrl_get_periph_id,
-};
-
-static int rk3328_pinctrl_probe(struct udevice *dev)
-{
-	struct rk3328_pinctrl_priv *priv = dev_get_priv(dev);
-	int ret = 0;
-
-	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	debug("%s: grf=%p\n", __func__, priv->grf);
-
-	return ret;
-}
-
-static const struct udevice_id rk3328_pinctrl_ids[] = {
-	{ .compatible = "rockchip,rk3328-pinctrl" },
-	{ }
-};
-
-U_BOOT_DRIVER(pinctrl_rk3328) = {
-	.name		= "rockchip_rk3328_pinctrl",
-	.id		= UCLASS_PINCTRL,
-	.of_match	= rk3328_pinctrl_ids,
-	.priv_auto_alloc_size = sizeof(struct rk3328_pinctrl_priv),
-	.ops		= &rk3328_pinctrl_ops,
-	.bind		= dm_scan_fdt_dev,
-	.probe		= rk3328_pinctrl_probe,
-};
diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3368.c b/drivers/pinctrl/rockchip/pinctrl_rk3368.c
deleted file mode 100644
index 25249e377a..0000000000
--- a/drivers/pinctrl/rockchip/pinctrl_rk3368.c
+++ /dev/null
@@ -1,742 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
- * Author: Andy Yan <andy.yan@rock-chips.com>
- * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <syscon.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/grf_rk3368.h>
-#include <asm/arch/periph.h>
-#include <dm/pinctrl.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/* PMUGRF_GPIO0B_IOMUX */
-enum {
-	GPIO0B5_SHIFT           = 10,
-	GPIO0B5_MASK            = GENMASK(GPIO0B5_SHIFT + 1, GPIO0B5_SHIFT),
-	GPIO0B5_GPIO            = 0,
-	GPIO0B5_SPI2_CSN0       = (2 << GPIO0B5_SHIFT),
-
-	GPIO0B4_SHIFT           = 8,
-	GPIO0B4_MASK            = GENMASK(GPIO0B4_SHIFT + 1, GPIO0B4_SHIFT),
-	GPIO0B4_GPIO            = 0,
-	GPIO0B4_SPI2_CLK        = (2 << GPIO0B4_SHIFT),
-
-	GPIO0B3_SHIFT           = 6,
-	GPIO0B3_MASK            = GENMASK(GPIO0B3_SHIFT + 1, GPIO0B3_SHIFT),
-	GPIO0B3_GPIO            = 0,
-	GPIO0B3_SPI2_TXD        = (2 << GPIO0B3_SHIFT),
-
-	GPIO0B2_SHIFT           = 4,
-	GPIO0B2_MASK            = GENMASK(GPIO0B2_SHIFT + 1, GPIO0B2_SHIFT),
-	GPIO0B2_GPIO            = 0,
-	GPIO0B2_SPI2_RXD        = (2 << GPIO0B2_SHIFT),
-};
-
-/*GRF_GPIO0C_IOMUX*/
-enum {
-	GPIO0C7_SHIFT           = 14,
-	GPIO0C7_MASK	        = GENMASK(GPIO0C7_SHIFT + 1, GPIO0C7_SHIFT),
-	GPIO0C7_GPIO	        = 0,
-	GPIO0C7_LCDC_D19        = (1 << GPIO0C7_SHIFT),
-	GPIO0C7_TRACE_D9        = (2 << GPIO0C7_SHIFT),
-	GPIO0C7_UART1_RTSN      = (3 << GPIO0C7_SHIFT),
-
-	GPIO0C6_SHIFT           = 12,
-	GPIO0C6_MASK            = GENMASK(GPIO0C6_SHIFT + 1, GPIO0C6_SHIFT),
-	GPIO0C6_GPIO            = 0,
-	GPIO0C6_LCDC_D18        = (1 << GPIO0C6_SHIFT),
-	GPIO0C6_TRACE_D8        = (2 << GPIO0C6_SHIFT),
-	GPIO0C6_UART1_CTSN      = (3 << GPIO0C6_SHIFT),
-
-	GPIO0C5_SHIFT           = 10,
-	GPIO0C5_MASK            = GENMASK(GPIO0C5_SHIFT + 1, GPIO0C5_SHIFT),
-	GPIO0C5_GPIO            = 0,
-	GPIO0C5_LCDC_D17        = (1 << GPIO0C5_SHIFT),
-	GPIO0C5_TRACE_D7        = (2 << GPIO0C5_SHIFT),
-	GPIO0C5_UART1_SOUT      = (3 << GPIO0C5_SHIFT),
-
-	GPIO0C4_SHIFT           = 8,
-	GPIO0C4_MASK            = GENMASK(GPIO0C4_SHIFT + 1, GPIO0C4_SHIFT),
-	GPIO0C4_GPIO            = 0,
-	GPIO0C4_LCDC_D16        = (1 << GPIO0C4_SHIFT),
-	GPIO0C4_TRACE_D6        = (2 << GPIO0C4_SHIFT),
-	GPIO0C4_UART1_SIN       = (3 << GPIO0C4_SHIFT),
-
-	GPIO0C3_SHIFT           = 6,
-	GPIO0C3_MASK            = GENMASK(GPIO0C3_SHIFT + 1, GPIO0C3_SHIFT),
-	GPIO0C3_GPIO            = 0,
-	GPIO0C3_LCDC_D15        = (1 << GPIO0C3_SHIFT),
-	GPIO0C3_TRACE_D5        = (2 << GPIO0C3_SHIFT),
-	GPIO0C3_MCU_JTAG_TDO    = (3 << GPIO0C3_SHIFT),
-
-	GPIO0C2_SHIFT           = 4,
-	GPIO0C2_MASK            = GENMASK(GPIO0C2_SHIFT + 1, GPIO0C2_SHIFT),
-	GPIO0C2_GPIO            = 0,
-	GPIO0C2_LCDC_D14        = (1 << GPIO0C2_SHIFT),
-	GPIO0C2_TRACE_D4        = (2 << GPIO0C2_SHIFT),
-	GPIO0C2_MCU_JTAG_TDI    = (3 << GPIO0C2_SHIFT),
-
-	GPIO0C1_SHIFT           = 2,
-	GPIO0C1_MASK            = GENMASK(GPIO0C1_SHIFT + 1, GPIO0C1_SHIFT),
-	GPIO0C1_GPIO            = 0,
-	GPIO0C1_LCDC_D13        = (1 << GPIO0C1_SHIFT),
-	GPIO0C1_TRACE_D3        = (2 << GPIO0C1_SHIFT),
-	GPIO0C1_MCU_JTAG_TRTSN  = (3 << GPIO0C1_SHIFT),
-
-	GPIO0C0_SHIFT           = 0,
-	GPIO0C0_MASK            = GENMASK(GPIO0C0_SHIFT + 1, GPIO0C0_SHIFT),
-	GPIO0C0_GPIO            = 0,
-	GPIO0C0_LCDC_D12        = (1 << GPIO0C0_SHIFT),
-	GPIO0C0_TRACE_D2        = (2 << GPIO0C0_SHIFT),
-	GPIO0C0_MCU_JTAG_TDO    = (3 << GPIO0C0_SHIFT),
-};
-
-/*GRF_GPIO0D_IOMUX*/
-enum {
-	GPIO0D7_SHIFT           = 14,
-	GPIO0D7_MASK            = GENMASK(GPIO0D7_SHIFT + 1, GPIO0D7_SHIFT),
-	GPIO0D7_GPIO            = 0,
-	GPIO0D7_LCDC_DCLK       = (1 << GPIO0D7_SHIFT),
-	GPIO0D7_TRACE_CTL       = (2 << GPIO0D7_SHIFT),
-	GPIO0D7_PMU_DEBUG5      = (3 << GPIO0D7_SHIFT),
-
-	GPIO0D6_SHIFT           = 12,
-	GPIO0D6_MASK            = GENMASK(GPIO0D6_SHIFT + 1, GPIO0D6_SHIFT),
-	GPIO0D6_GPIO            = 0,
-	GPIO0D6_LCDC_DEN        = (1 << GPIO0D6_SHIFT),
-	GPIO0D6_TRACE_CLK       = (2 << GPIO0D6_SHIFT),
-	GPIO0D6_PMU_DEBUG4      = (3 << GPIO0D6_SHIFT),
-
-	GPIO0D5_SHIFT           = 10,
-	GPIO0D5_MASK            = GENMASK(GPIO0D5_SHIFT + 1, GPIO0D5_SHIFT),
-	GPIO0D5_GPIO            = 0,
-	GPIO0D5_LCDC_VSYNC      = (1 << GPIO0D5_SHIFT),
-	GPIO0D5_TRACE_D15       = (2 << GPIO0D5_SHIFT),
-	GPIO0D5_PMU_DEBUG3      = (3 << GPIO0D5_SHIFT),
-
-	GPIO0D4_SHIFT           = 8,
-	GPIO0D4_MASK            = GENMASK(GPIO0D4_SHIFT + 1, GPIO0D4_SHIFT),
-	GPIO0D4_GPIO            = 0,
-	GPIO0D4_LCDC_HSYNC      = (1 << GPIO0D4_SHIFT),
-	GPIO0D4_TRACE_D14       = (2 << GPIO0D4_SHIFT),
-	GPIO0D4_PMU_DEBUG2      = (3 << GPIO0D4_SHIFT),
-
-	GPIO0D3_SHIFT           = 6,
-	GPIO0D3_MASK            = GENMASK(GPIO0D3_SHIFT + 1, GPIO0D3_SHIFT),
-	GPIO0D3_GPIO            = 0,
-	GPIO0D3_LCDC_D23        = (1 << GPIO0D3_SHIFT),
-	GPIO0D3_TRACE_D13       = (2 << GPIO0D3_SHIFT),
-	GPIO0D3_UART4_SIN       = (3 << GPIO0D3_SHIFT),
-
-	GPIO0D2_SHIFT           = 4,
-	GPIO0D2_MASK            = GENMASK(GPIO0D2_SHIFT + 1, GPIO0D2_SHIFT),
-	GPIO0D2_GPIO            = 0,
-	GPIO0D2_LCDC_D22        = (1 << GPIO0D2_SHIFT),
-	GPIO0D2_TRACE_D12       = (2 << GPIO0D2_SHIFT),
-	GPIO0D2_UART4_SOUT      = (3 << GPIO0D2_SHIFT),
-
-	GPIO0D1_SHIFT           = 2,
-	GPIO0D1_MASK            = GENMASK(GPIO0D1_SHIFT + 1, GPIO0D1_SHIFT),
-	GPIO0D1_GPIO            = 0,
-	GPIO0D1_LCDC_D21        = (1 << GPIO0D1_SHIFT),
-	GPIO0D1_TRACE_D11       = (2 << GPIO0D1_SHIFT),
-	GPIO0D1_UART4_RTSN      = (3 << GPIO0D1_SHIFT),
-
-	GPIO0D0_SHIFT           = 0,
-	GPIO0D0_MASK            = GENMASK(GPIO0D0_SHIFT + 1, GPIO0D0_SHIFT),
-	GPIO0D0_GPIO            = 0,
-	GPIO0D0_LCDC_D20        = (1 << GPIO0D0_SHIFT),
-	GPIO0D0_TRACE_D10       = (2 << GPIO0D0_SHIFT),
-	GPIO0D0_UART4_CTSN      = (3 << GPIO0D0_SHIFT),
-};
-
-/*GRF_GPIO2A_IOMUX*/
-enum {
-	GPIO2A7_SHIFT           = 14,
-	GPIO2A7_MASK            = GENMASK(GPIO2A7_SHIFT + 1, GPIO2A7_SHIFT),
-	GPIO2A7_GPIO            = 0,
-	GPIO2A7_SDMMC0_D2       = (1 << GPIO2A7_SHIFT),
-	GPIO2A7_JTAG_TCK        = (2 << GPIO2A7_SHIFT),
-
-	GPIO2A6_SHIFT           = 12,
-	GPIO2A6_MASK            = GENMASK(GPIO2A6_SHIFT + 1, GPIO2A6_SHIFT),
-	GPIO2A6_GPIO            = 0,
-	GPIO2A6_SDMMC0_D1       = (1 << GPIO2A6_SHIFT),
-	GPIO2A6_UART2_SIN       = (2 << GPIO2A6_SHIFT),
-
-	GPIO2A5_SHIFT           = 10,
-	GPIO2A5_MASK            = GENMASK(GPIO2A5_SHIFT + 1, GPIO2A5_SHIFT),
-	GPIO2A5_GPIO            = 0,
-	GPIO2A5_SDMMC0_D0       = (1 << GPIO2A5_SHIFT),
-	GPIO2A5_UART2_SOUT      = (2 << GPIO2A5_SHIFT),
-
-	GPIO2A4_SHIFT           = 8,
-	GPIO2A4_MASK            = GENMASK(GPIO2A4_SHIFT + 1, GPIO2A4_SHIFT),
-	GPIO2A4_GPIO            = 0,
-	GPIO2A4_FLASH_DQS       = (1 << GPIO2A4_SHIFT),
-	GPIO2A4_EMMC_CLKOUT     = (2 << GPIO2A4_SHIFT),
-
-	GPIO2A3_SHIFT           = 6,
-	GPIO2A3_MASK            = GENMASK(GPIO2A3_SHIFT + 1, GPIO2A3_SHIFT),
-	GPIO2A3_GPIO            = 0,
-	GPIO2A3_FLASH_CSN3      = (1 << GPIO2A3_SHIFT),
-	GPIO2A3_EMMC_RSTNOUT    = (2 << GPIO2A3_SHIFT),
-
-	GPIO2A2_SHIFT           = 4,
-	GPIO2A2_MASK            = GENMASK(GPIO2A2_SHIFT + 1, GPIO2A2_SHIFT),
-	GPIO2A2_GPIO            = 0,
-	GPIO2A2_FLASH_CSN2      = (1 << GPIO2A2_SHIFT),
-
-	GPIO2A1_SHIFT           = 2,
-	GPIO2A1_MASK            = GENMASK(GPIO2A1_SHIFT + 1, GPIO2A1_SHIFT),
-	GPIO2A1_GPIO            = 0,
-	GPIO2A1_FLASH_CSN1      = (1 << GPIO2A1_SHIFT),
-
-	GPIO2A0_SHIFT           = 0,
-	GPIO2A0_MASK            = GENMASK(GPIO2A0_SHIFT + 1, GPIO2A0_SHIFT),
-	GPIO2A0_GPIO            = 0,
-	GPIO2A0_FLASH_CSN0      = (1 << GPIO2A0_SHIFT),
-};
-
-/*GRF_GPIO2B_IOMUX*/
-enum {
-	GPIO2B3_SHIFT           = 6,
-	GPIO2B3_MASK            = GENMASK(GPIO2B3_SHIFT + 1, GPIO2B3_SHIFT),
-	GPIO2B3_GPIO            = 0,
-	GPIO2B3_SDMMC0_DTECTN   = (1 << GPIO2B3_SHIFT),
-
-	GPIO2B2_SHIFT           = 4,
-	GPIO2B2_MASK            = GENMASK(GPIO2B2_SHIFT + 1, GPIO2B2_SHIFT),
-	GPIO2B2_GPIO            = 0,
-	GPIO2B2_SDMMC0_CMD      = (1 << GPIO2B2_SHIFT),
-
-	GPIO2B1_SHIFT           = 2,
-	GPIO2B1_MASK            = GENMASK(GPIO2B1_SHIFT + 1, GPIO2B1_SHIFT),
-	GPIO2B1_GPIO            = 0,
-	GPIO2B1_SDMMC0_CLKOUT   = (1 << GPIO2B1_SHIFT),
-
-	GPIO2B0_SHIFT           = 0,
-	GPIO2B0_MASK            = GENMASK(GPIO2B0_SHIFT + 1, GPIO2B0_SHIFT),
-	GPIO2B0_GPIO            = 0,
-	GPIO2B0_SDMMC0_D3       = (1 << GPIO2B0_SHIFT),
-};
-
-/*GRF_GPIO2D_IOMUX*/
-enum {
-	GPIO2D7_SHIFT           = 14,
-	GPIO2D7_MASK            = GENMASK(GPIO2D7_SHIFT + 1, GPIO2D7_SHIFT),
-	GPIO2D7_GPIO            = 0,
-	GPIO2D7_SDIO0_D3        = (1 << GPIO2D7_SHIFT),
-
-	GPIO2D6_SHIFT           = 12,
-	GPIO2D6_MASK            = GENMASK(GPIO2D6_SHIFT + 1, GPIO2D6_SHIFT),
-	GPIO2D6_GPIO            = 0,
-	GPIO2D6_SDIO0_D2        = (1 << GPIO2D6_SHIFT),
-
-	GPIO2D5_SHIFT           = 10,
-	GPIO2D5_MASK            = GENMASK(GPIO2D5_SHIFT + 1, GPIO2D5_SHIFT),
-	GPIO2D5_GPIO            = 0,
-	GPIO2D5_SDIO0_D1        = (1 << GPIO2D5_SHIFT),
-
-	GPIO2D4_SHIFT           = 8,
-	GPIO2D4_MASK            = GENMASK(GPIO2D4_SHIFT + 1, GPIO2D4_SHIFT),
-	GPIO2D4_GPIO            = 0,
-	GPIO2D4_SDIO0_D0        = (1 << GPIO2D4_SHIFT),
-
-	GPIO2D3_SHIFT           = 6,
-	GPIO2D3_MASK            = GENMASK(GPIO2D3_SHIFT + 1, GPIO2D3_SHIFT),
-	GPIO2D3_GPIO            = 0,
-	GPIO2D3_UART0_RTS0      = (1 << GPIO2D3_SHIFT),
-
-	GPIO2D2_SHIFT           = 4,
-	GPIO2D2_MASK            = GENMASK(GPIO2D2_SHIFT + 1, GPIO2D2_SHIFT),
-	GPIO2D2_GPIO            = 0,
-	GPIO2D2_UART0_CTS0      = (1 << GPIO2D2_SHIFT),
-
-	GPIO2D1_SHIFT           = 2,
-	GPIO2D1_MASK            = GENMASK(GPIO2D1_SHIFT + 1, GPIO2D1_SHIFT),
-	GPIO2D1_GPIO            = 0,
-	GPIO2D1_UART0_SOUT      = (1 << GPIO2D1_SHIFT),
-
-	GPIO2D0_SHIFT           = 0,
-	GPIO2D0_MASK            = GENMASK(GPIO2D0_SHIFT + 1, GPIO2D0_SHIFT),
-	GPIO2D0_GPIO            = 0,
-	GPIO2D0_UART0_SIN       = (1 << GPIO2D0_SHIFT),
-};
-
-/* GRF_GPIO1B_IOMUX */
-enum {
-	GPIO1B7_SHIFT           = 14,
-	GPIO1B7_MASK            = GENMASK(GPIO1B7_SHIFT + 1, GPIO1B7_SHIFT),
-	GPIO1B7_GPIO            = 0,
-	GPIO1B7_SPI1_CSN0       = (2 << GPIO1B7_SHIFT),
-
-	GPIO1B6_SHIFT           = 12,
-	GPIO1B6_MASK            = GENMASK(GPIO1B6_SHIFT + 1, GPIO1B6_SHIFT),
-	GPIO1B6_GPIO            = 0,
-	GPIO1B6_SPI1_CLK        = (2 << GPIO1B6_SHIFT),
-};
-
-/* GRF_GPIO1C_IOMUX */
-enum {
-	GPIO1C7_SHIFT           = 14,
-	GPIO1C7_MASK            = GENMASK(GPIO1C7_SHIFT + 1, GPIO1C7_SHIFT),
-	GPIO1C7_GPIO            = 0,
-	GPIO1C7_EMMC_DATA5      = (2 << GPIO1C7_SHIFT),
-	GPIO1C7_SPI0_TXD        = (3 << GPIO1C7_SHIFT),
-
-	GPIO1C6_SHIFT           = 12,
-	GPIO1C6_MASK            = GENMASK(GPIO1C6_SHIFT + 1, GPIO1C6_SHIFT),
-	GPIO1C6_GPIO            = 0,
-	GPIO1C6_EMMC_DATA4      = (2 << GPIO1C6_SHIFT),
-	GPIO1C6_SPI0_RXD        = (3 << GPIO1C6_SHIFT),
-
-	GPIO1C5_SHIFT           = 10,
-	GPIO1C5_MASK            = GENMASK(GPIO1C5_SHIFT + 1, GPIO1C5_SHIFT),
-	GPIO1C5_GPIO            = 0,
-	GPIO1C5_EMMC_DATA3      = (2 << GPIO1C5_SHIFT),
-
-	GPIO1C4_SHIFT           = 8,
-	GPIO1C4_MASK            = GENMASK(GPIO1C4_SHIFT + 1, GPIO1C4_SHIFT),
-	GPIO1C4_GPIO            = 0,
-	GPIO1C4_EMMC_DATA2      = (2 << GPIO1C4_SHIFT),
-
-	GPIO1C3_SHIFT           = 6,
-	GPIO1C3_MASK            = GENMASK(GPIO1C3_SHIFT + 1, GPIO1C3_SHIFT),
-	GPIO1C3_GPIO            = 0,
-	GPIO1C3_EMMC_DATA1      = (2 << GPIO1C3_SHIFT),
-
-	GPIO1C2_SHIFT           = 4,
-	GPIO1C2_MASK            = GENMASK(GPIO1C2_SHIFT + 1, GPIO1C2_SHIFT),
-	GPIO1C2_GPIO            = 0,
-	GPIO1C2_EMMC_DATA0      = (2 << GPIO1C2_SHIFT),
-
-	GPIO1C1_SHIFT           = 2,
-	GPIO1C1_MASK            = GENMASK(GPIO1C1_SHIFT + 1, GPIO1C1_SHIFT),
-	GPIO1C1_GPIO            = 0,
-	GPIO1C1_SPI1_RXD        = (2 << GPIO1C1_SHIFT),
-
-	GPIO1C0_SHIFT           = 0,
-	GPIO1C0_MASK            = GENMASK(GPIO1C0_SHIFT + 1, GPIO1C0_SHIFT),
-	GPIO1C0_GPIO            = 0,
-	GPIO1C0_SPI1_TXD        = (2 << GPIO1C0_SHIFT),
-};
-
-/* GRF_GPIO1D_IOMUX*/
-enum {
-	GPIO1D5_SHIFT           = 10,
-	GPIO1D5_MASK            = GENMASK(GPIO1D5_SHIFT + 1, GPIO1D5_SHIFT),
-	GPIO1D5_GPIO            = 0,
-	GPIO1D5_SPI0_CLK        = (2 << GPIO1D5_SHIFT),
-
-	GPIO1D3_SHIFT           = 6,
-	GPIO1D3_MASK            = GENMASK(GPIO1D3_SHIFT + 1, GPIO1D3_SHIFT),
-	GPIO1D3_GPIO            = 0,
-	GPIO1D3_EMMC_PWREN      = (2 << GPIO1D3_SHIFT),
-
-	GPIO1D2_SHIFT           = 4,
-	GPIO1D2_MASK            = GENMASK(GPIO1D2_SHIFT + 1, GPIO1D2_SHIFT),
-	GPIO1D2_GPIO            = 0,
-	GPIO1D2_EMMC_CMD        = (2 << GPIO1D2_SHIFT),
-
-	GPIO1D1_SHIFT           = 2,
-	GPIO1D1_MASK            = GENMASK(GPIO1D1_SHIFT + 1, GPIO1D1_SHIFT),
-	GPIO1D1_GPIO            = 0,
-	GPIO1D1_EMMC_DATA7      = (2 << GPIO1D1_SHIFT),
-	GPIO1D1_SPI0_CSN1       = (3 << GPIO1D1_SHIFT),
-
-	GPIO1D0_SHIFT           = 0,
-	GPIO1D0_MASK            = GENMASK(GPIO1D0_SHIFT + 1, GPIO1D0_SHIFT),
-	GPIO1D0_GPIO            = 0,
-	GPIO1D0_EMMC_DATA6      = (2 << GPIO1D0_SHIFT),
-	GPIO1D0_SPI0_CSN0       = (3 << GPIO1D0_SHIFT),
-};
-
-
-/*GRF_GPIO3B_IOMUX*/
-enum {
-	GPIO3B7_SHIFT           = 14,
-	GPIO3B7_MASK            = GENMASK(GPIO3B7_SHIFT + 1, GPIO3B7_SHIFT),
-	GPIO3B7_GPIO            = 0,
-	GPIO3B7_MAC_RXD0        = (1 << GPIO3B7_SHIFT),
-
-	GPIO3B6_SHIFT           = 12,
-	GPIO3B6_MASK            = GENMASK(GPIO3B6_SHIFT + 1, GPIO3B6_SHIFT),
-	GPIO3B6_GPIO            = 0,
-	GPIO3B6_MAC_TXD3        = (1 << GPIO3B6_SHIFT),
-
-	GPIO3B5_SHIFT           = 10,
-	GPIO3B5_MASK            = GENMASK(GPIO3B5_SHIFT + 1, GPIO3B5_SHIFT),
-	GPIO3B5_GPIO            = 0,
-	GPIO3B5_MAC_TXEN        = (1 << GPIO3B5_SHIFT),
-
-	GPIO3B4_SHIFT           = 8,
-	GPIO3B4_MASK            = GENMASK(GPIO3B4_SHIFT + 1, GPIO3B4_SHIFT),
-	GPIO3B4_GPIO            = 0,
-	GPIO3B4_MAC_COL         = (1 << GPIO3B4_SHIFT),
-
-	GPIO3B3_SHIFT           = 6,
-	GPIO3B3_MASK            = GENMASK(GPIO3B3_SHIFT + 1, GPIO3B3_SHIFT),
-	GPIO3B3_GPIO            = 0,
-	GPIO3B3_MAC_CRS         = (1 << GPIO3B3_SHIFT),
-
-	GPIO3B2_SHIFT           = 4,
-	GPIO3B2_MASK            = GENMASK(GPIO3B2_SHIFT + 1, GPIO3B2_SHIFT),
-	GPIO3B2_GPIO            = 0,
-	GPIO3B2_MAC_TXD2        = (1 << GPIO3B2_SHIFT),
-
-	GPIO3B1_SHIFT           = 2,
-	GPIO3B1_MASK            = GENMASK(GPIO3B1_SHIFT + 1, GPIO3B1_SHIFT),
-	GPIO3B1_GPIO            = 0,
-	GPIO3B1_MAC_TXD1        = (1 << GPIO3B1_SHIFT),
-
-	GPIO3B0_SHIFT           = 0,
-	GPIO3B0_MASK            = GENMASK(GPIO3B0_SHIFT + 1, GPIO3B0_SHIFT),
-	GPIO3B0_GPIO            = 0,
-	GPIO3B0_MAC_TXD0        = (1 << GPIO3B0_SHIFT),
-	GPIO3B0_PWM0            = (2 << GPIO3B0_SHIFT),
-};
-
-/*GRF_GPIO3C_IOMUX*/
-enum {
-	GPIO3C6_SHIFT           = 12,
-	GPIO3C6_MASK            = GENMASK(GPIO3C6_SHIFT + 1, GPIO3C6_SHIFT),
-	GPIO3C6_GPIO            = 0,
-	GPIO3C6_MAC_CLK         = (1 << GPIO3C6_SHIFT),
-
-	GPIO3C5_SHIFT           = 10,
-	GPIO3C5_MASK            = GENMASK(GPIO3C5_SHIFT + 1, GPIO3C5_SHIFT),
-	GPIO3C5_GPIO            = 0,
-	GPIO3C5_MAC_RXEN        = (1 << GPIO3C5_SHIFT),
-
-	GPIO3C4_SHIFT           = 8,
-	GPIO3C4_MASK            = GENMASK(GPIO3C4_SHIFT + 1, GPIO3C4_SHIFT),
-	GPIO3C4_GPIO            = 0,
-	GPIO3C4_MAC_RXDV        = (1 << GPIO3C4_SHIFT),
-
-	GPIO3C3_SHIFT           = 6,
-	GPIO3C3_MASK            = GENMASK(GPIO3C3_SHIFT + 1, GPIO3C3_SHIFT),
-	GPIO3C3_GPIO            = 0,
-	GPIO3C3_MAC_MDC         = (1 << GPIO3C3_SHIFT),
-
-	GPIO3C2_SHIFT           = 4,
-	GPIO3C2_MASK            = GENMASK(GPIO3C2_SHIFT + 1, GPIO3C2_SHIFT),
-	GPIO3C2_GPIO            = 0,
-	GPIO3C2_MAC_RXD3        = (1 << GPIO3C2_SHIFT),
-
-	GPIO3C1_SHIFT           = 2,
-	GPIO3C1_MASK            = GENMASK(GPIO3C1_SHIFT + 1, GPIO3C1_SHIFT),
-	GPIO3C1_GPIO            = 0,
-	GPIO3C1_MAC_RXD2        = (1 << GPIO3C1_SHIFT),
-
-	GPIO3C0_SHIFT           = 0,
-	GPIO3C0_MASK            = GENMASK(GPIO3C0_SHIFT + 1, GPIO3C0_SHIFT),
-	GPIO3C0_GPIO            = 0,
-	GPIO3C0_MAC_RXD1        = (1 << GPIO3C0_SHIFT),
-};
-
-/*GRF_GPIO3D_IOMUX*/
-enum {
-	GPIO3D4_SHIFT           = 8,
-	GPIO3D4_MASK            = GENMASK(GPIO3D4_SHIFT + 1, GPIO3D4_SHIFT),
-	GPIO3D4_GPIO            = 0,
-	GPIO3D4_MAC_TXCLK       = (1 << GPIO3D4_SHIFT),
-	GPIO3D4_SPI1_CNS1       = (2 << GPIO3D4_SHIFT),
-
-	GPIO3D1_SHIFT           = 2,
-	GPIO3D1_MASK            = GENMASK(GPIO3D1_SHIFT + 1, GPIO3D1_SHIFT),
-	GPIO3D1_GPIO            = 0,
-	GPIO3D1_MAC_RXCLK       = (1 << GPIO3D1_SHIFT),
-
-	GPIO3D0_SHIFT           = 0,
-	GPIO3D0_MASK            = GENMASK(GPIO3D0_SHIFT + 1, GPIO3D0_SHIFT),
-	GPIO3D0_GPIO            = 0,
-	GPIO3D0_MAC_MDIO        = (1 << GPIO3D0_SHIFT),
-};
-
-struct rk3368_pinctrl_priv {
-	struct rk3368_grf *grf;
-	struct rk3368_pmu_grf *pmugrf;
-};
-
-static void pinctrl_rk3368_uart_config(struct rk3368_pinctrl_priv *priv,
-				       int uart_id)
-{
-	struct rk3368_grf *grf = priv->grf;
-	struct rk3368_pmu_grf *pmugrf = priv->pmugrf;
-
-	switch (uart_id) {
-	case PERIPH_ID_UART2:
-		rk_clrsetreg(&grf->gpio2a_iomux,
-			     GPIO2A6_MASK | GPIO2A5_MASK,
-			     GPIO2A6_UART2_SIN | GPIO2A5_UART2_SOUT);
-		break;
-	case PERIPH_ID_UART0:
-		break;
-	case PERIPH_ID_UART1:
-		break;
-	case PERIPH_ID_UART3:
-		break;
-	case PERIPH_ID_UART4:
-		rk_clrsetreg(&pmugrf->gpio0d_iomux,
-			     GPIO0D0_MASK | GPIO0D1_MASK |
-			     GPIO0D2_MASK | GPIO0D3_MASK,
-			     GPIO0D0_GPIO | GPIO0D1_GPIO |
-			     GPIO0D2_UART4_SOUT | GPIO0D3_UART4_SIN);
-		break;
-	default:
-		debug("uart id = %d iomux error!\n", uart_id);
-		break;
-	}
-}
-
-static void pinctrl_rk3368_spi_config(struct rk3368_pinctrl_priv *priv,
-				      int spi_id)
-{
-	struct rk3368_grf *grf = priv->grf;
-	struct rk3368_pmu_grf *pmugrf = priv->pmugrf;
-
-	switch (spi_id) {
-	case PERIPH_ID_SPI0:
-		/*
-		 * eMMC can only be connected with 4 bits, when SPI0 is used.
-		 * This is all-or-nothing, so we assume that if someone asks us
-		 * to configure SPI0, that their eMMC interface is unused or
-		 * configured appropriately.
-		 */
-		rk_clrsetreg(&grf->gpio1d_iomux,
-			     GPIO1D0_MASK | GPIO1D1_MASK |
-			     GPIO1D5_MASK,
-			     GPIO1D0_SPI0_CSN0 | GPIO1D1_SPI0_CSN1 |
-			     GPIO1D5_SPI0_CLK);
-		rk_clrsetreg(&grf->gpio1c_iomux,
-			     GPIO1C6_MASK | GPIO1C7_MASK,
-			     GPIO1C6_SPI0_RXD | GPIO1C7_SPI0_TXD);
-		break;
-	case PERIPH_ID_SPI1:
-		/*
-		 * We don't implement support for configuring SPI1_CSN#1, as it
-		 * conflicts with the GMAC (MAC TX clk-out).
-		 */
-		rk_clrsetreg(&grf->gpio1b_iomux,
-			     GPIO1B6_MASK | GPIO1B7_MASK,
-			     GPIO1B6_SPI1_CLK | GPIO1B7_SPI1_CSN0);
-		rk_clrsetreg(&grf->gpio1c_iomux,
-			     GPIO1C0_MASK | GPIO1C1_MASK,
-			     GPIO1C0_SPI1_TXD | GPIO1C1_SPI1_RXD);
-		break;
-	case PERIPH_ID_SPI2:
-		rk_clrsetreg(&pmugrf->gpio0b_iomux,
-			     GPIO0B2_MASK | GPIO0B3_MASK |
-			     GPIO0B4_MASK | GPIO0B5_MASK,
-			     GPIO0B2_SPI2_RXD | GPIO0B3_SPI2_TXD |
-			     GPIO0B4_SPI2_CLK | GPIO0B5_SPI2_CSN0);
-		break;
-	default:
-		debug("%s: spi id = %d iomux error!\n", __func__, spi_id);
-		break;
-	}
-}
-
-#if CONFIG_IS_ENABLED(GMAC_ROCKCHIP)
-static void pinctrl_rk3368_gmac_config(struct rk3368_grf *grf, int gmac_id)
-{
-	rk_clrsetreg(&grf->gpio3b_iomux,
-		     GPIO3B0_MASK | GPIO3B1_MASK |
-		     GPIO3B2_MASK | GPIO3B5_MASK |
-		     GPIO3B6_MASK | GPIO3B7_MASK,
-		     GPIO3B0_MAC_TXD0 | GPIO3B1_MAC_TXD1 |
-		     GPIO3B2_MAC_TXD2 | GPIO3B5_MAC_TXEN |
-		     GPIO3B6_MAC_TXD3 | GPIO3B7_MAC_RXD0);
-	rk_clrsetreg(&grf->gpio3c_iomux,
-		     GPIO3C0_MASK | GPIO3C1_MASK |
-		     GPIO3C2_MASK | GPIO3C3_MASK |
-		     GPIO3C4_MASK | GPIO3C5_MASK |
-		     GPIO3C6_MASK,
-		     GPIO3C0_MAC_RXD1 | GPIO3C1_MAC_RXD2 |
-		     GPIO3C2_MAC_RXD3 | GPIO3C3_MAC_MDC |
-		     GPIO3C4_MAC_RXDV | GPIO3C5_MAC_RXEN |
-		     GPIO3C6_MAC_CLK);
-	rk_clrsetreg(&grf->gpio3d_iomux,
-		     GPIO3D0_MASK | GPIO3D1_MASK |
-		     GPIO3D4_MASK,
-		     GPIO3D0_MAC_MDIO | GPIO3D1_MAC_RXCLK |
-		     GPIO3D4_MAC_TXCLK);
-}
-#endif
-
-static void pinctrl_rk3368_sdmmc_config(struct rk3368_grf *grf, int mmc_id)
-{
-	switch (mmc_id) {
-	case PERIPH_ID_EMMC:
-		debug("mmc id = %d setting registers!\n", mmc_id);
-		rk_clrsetreg(&grf->gpio1c_iomux,
-			     GPIO1C2_MASK | GPIO1C3_MASK |
-			     GPIO1C4_MASK | GPIO1C5_MASK |
-			     GPIO1C6_MASK | GPIO1C7_MASK,
-			     GPIO1C2_EMMC_DATA0 |
-			     GPIO1C3_EMMC_DATA1 |
-			     GPIO1C4_EMMC_DATA2 |
-			     GPIO1C5_EMMC_DATA3 |
-			     GPIO1C6_EMMC_DATA4 |
-			     GPIO1C7_EMMC_DATA5);
-		rk_clrsetreg(&grf->gpio1d_iomux,
-			     GPIO1D0_MASK | GPIO1D1_MASK |
-			     GPIO1D2_MASK | GPIO1D3_MASK,
-			     GPIO1D0_EMMC_DATA6 |
-			     GPIO1D1_EMMC_DATA7 |
-			     GPIO1D2_EMMC_CMD |
-			     GPIO1D3_EMMC_PWREN);
-		rk_clrsetreg(&grf->gpio2a_iomux,
-			     GPIO2A3_MASK | GPIO2A4_MASK,
-			     GPIO2A3_EMMC_RSTNOUT |
-			     GPIO2A4_EMMC_CLKOUT);
-		break;
-	case PERIPH_ID_SDCARD:
-		debug("mmc id = %d setting registers!\n", mmc_id);
-		rk_clrsetreg(&grf->gpio2a_iomux,
-			     GPIO2A5_MASK | GPIO2A7_MASK |
-			     GPIO2A7_MASK,
-			     GPIO2A5_SDMMC0_D0 | GPIO2A6_SDMMC0_D1 |
-			     GPIO2A7_SDMMC0_D2);
-		rk_clrsetreg(&grf->gpio2b_iomux,
-			     GPIO2B0_MASK | GPIO2B1_MASK |
-			     GPIO2B2_MASK | GPIO2B3_MASK,
-			     GPIO2B0_SDMMC0_D3 | GPIO2B1_SDMMC0_CLKOUT |
-			     GPIO2B2_SDMMC0_CMD | GPIO2B3_SDMMC0_DTECTN);
-		break;
-	default:
-		debug("mmc id = %d iomux error!\n", mmc_id);
-		break;
-	}
-}
-
-static int rk3368_pinctrl_request(struct udevice *dev, int func, int flags)
-{
-	struct rk3368_pinctrl_priv *priv = dev_get_priv(dev);
-
-	debug("%s: func=%d, flags=%x\n", __func__, func, flags);
-	switch (func) {
-	case PERIPH_ID_UART0:
-	case PERIPH_ID_UART1:
-	case PERIPH_ID_UART2:
-	case PERIPH_ID_UART3:
-	case PERIPH_ID_UART4:
-		pinctrl_rk3368_uart_config(priv, func);
-		break;
-	case PERIPH_ID_SPI0:
-	case PERIPH_ID_SPI1:
-	case PERIPH_ID_SPI2:
-		pinctrl_rk3368_spi_config(priv, func);
-		break;
-	case PERIPH_ID_EMMC:
-	case PERIPH_ID_SDCARD:
-		pinctrl_rk3368_sdmmc_config(priv->grf, func);
-		break;
-#if CONFIG_IS_ENABLED(GMAC_ROCKCHIP)
-	case PERIPH_ID_GMAC:
-		pinctrl_rk3368_gmac_config(priv->grf, func);
-		break;
-#endif
-	default:
-		return -EINVAL;
-	}
-
-	return 0;
-}
-
-static int rk3368_pinctrl_get_periph_id(struct udevice *dev,
-					struct udevice *periph)
-{
-	u32 cell[3];
-	int ret;
-
-	ret = dev_read_u32_array(periph, "interrupts", cell, ARRAY_SIZE(cell));
-	if (ret < 0)
-		return -EINVAL;
-
-	switch (cell[1]) {
-	case 59:
-		return PERIPH_ID_UART4;
-	case 58:
-		return PERIPH_ID_UART3;
-	case 57:
-		return PERIPH_ID_UART2;
-	case 56:
-		return PERIPH_ID_UART1;
-	case 55:
-		return PERIPH_ID_UART0;
-	case 44:
-		return PERIPH_ID_SPI0;
-	case 45:
-		return PERIPH_ID_SPI1;
-	case 41:
-		return PERIPH_ID_SPI2;
-	case 35:
-		return PERIPH_ID_EMMC;
-	case 32:
-		return PERIPH_ID_SDCARD;
-#if CONFIG_IS_ENABLED(GMAC_ROCKCHIP)
-	case 27:
-		return PERIPH_ID_GMAC;
-#endif
-	}
-
-	return -ENOENT;
-}
-
-static int rk3368_pinctrl_set_state_simple(struct udevice *dev,
-					   struct udevice *periph)
-{
-	int func;
-
-	func = rk3368_pinctrl_get_periph_id(dev, periph);
-	if (func < 0)
-		return func;
-
-	return rk3368_pinctrl_request(dev, func, 0);
-}
-
-static struct pinctrl_ops rk3368_pinctrl_ops = {
-	.set_state_simple	= rk3368_pinctrl_set_state_simple,
-	.request	= rk3368_pinctrl_request,
-	.get_periph_id	= rk3368_pinctrl_get_periph_id,
-};
-
-static int rk3368_pinctrl_probe(struct udevice *dev)
-{
-	struct rk3368_pinctrl_priv *priv = dev_get_priv(dev);
-	int ret = 0;
-
-	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
-
-	debug("%s: grf=%p pmugrf:%p\n", __func__, priv->grf, priv->pmugrf);
-
-	return ret;
-}
-
-static const struct udevice_id rk3368_pinctrl_ids[] = {
-	{ .compatible = "rockchip,rk3368-pinctrl" },
-	{ }
-};
-
-U_BOOT_DRIVER(pinctrl_rk3368) = {
-	.name		= "rockchip_rk3368_pinctrl",
-	.id		= UCLASS_PINCTRL,
-	.of_match	= rk3368_pinctrl_ids,
-	.priv_auto_alloc_size = sizeof(struct rk3368_pinctrl_priv),
-	.ops		= &rk3368_pinctrl_ops,
-	.bind		= dm_scan_fdt_dev,
-	.probe		= rk3368_pinctrl_probe,
-};
diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3399.c b/drivers/pinctrl/rockchip/pinctrl_rk3399.c
deleted file mode 100644
index 19b81e744d..0000000000
--- a/drivers/pinctrl/rockchip/pinctrl_rk3399.c
+++ /dev/null
@@ -1,458 +0,0 @@
-/*
- * (C) Copyright 2016 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <syscon.h>
-#include <asm/io.h>
-#include <asm/arch/grf_rk3399.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/periph.h>
-#include <asm/arch/clock.h>
-#include <dm/pinctrl.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-struct rk3399_pinctrl_priv {
-	struct rk3399_grf_regs *grf;
-	struct rk3399_pmugrf_regs *pmugrf;
-};
-
-static void pinctrl_rk3399_pwm_config(struct rk3399_grf_regs *grf,
-		struct rk3399_pmugrf_regs *pmugrf, int pwm_id)
-{
-	switch (pwm_id) {
-	case PERIPH_ID_PWM0:
-		rk_clrsetreg(&grf->gpio4c_iomux,
-			     GRF_GPIO4C2_SEL_MASK,
-			     GRF_PWM_0 << GRF_GPIO4C2_SEL_SHIFT);
-		break;
-	case PERIPH_ID_PWM1:
-		rk_clrsetreg(&grf->gpio4c_iomux,
-			     GRF_GPIO4C6_SEL_MASK,
-			     GRF_PWM_1 << GRF_GPIO4C6_SEL_SHIFT);
-		break;
-	case PERIPH_ID_PWM2:
-		rk_clrsetreg(&pmugrf->gpio1c_iomux,
-			     PMUGRF_GPIO1C3_SEL_MASK,
-			     PMUGRF_PWM_2 << PMUGRF_GPIO1C3_SEL_SHIFT);
-		break;
-	case PERIPH_ID_PWM3:
-		if (readl(&pmugrf->soc_con0) & (1 << 5))
-			rk_clrsetreg(&pmugrf->gpio1b_iomux,
-				     PMUGRF_GPIO1B6_SEL_MASK,
-				     PMUGRF_PWM_3B << PMUGRF_GPIO1B6_SEL_SHIFT);
-		else
-			rk_clrsetreg(&pmugrf->gpio0a_iomux,
-				     PMUGRF_GPIO0A6_SEL_MASK,
-				     PMUGRF_PWM_3A << PMUGRF_GPIO0A6_SEL_SHIFT);
-		break;
-	default:
-		debug("pwm id = %d iomux error!\n", pwm_id);
-		break;
-	}
-}
-
-static void pinctrl_rk3399_i2c_config(struct rk3399_grf_regs *grf,
-				      struct rk3399_pmugrf_regs *pmugrf,
-				      int i2c_id)
-{
-	switch (i2c_id) {
-	case PERIPH_ID_I2C0:
-		rk_clrsetreg(&pmugrf->gpio1b_iomux,
-			     PMUGRF_GPIO1B7_SEL_MASK,
-			     PMUGRF_I2C0PMU_SDA << PMUGRF_GPIO1B7_SEL_SHIFT);
-		rk_clrsetreg(&pmugrf->gpio1c_iomux,
-			     PMUGRF_GPIO1C0_SEL_MASK,
-			     PMUGRF_I2C0PMU_SCL << PMUGRF_GPIO1C0_SEL_SHIFT);
-		break;
-	case PERIPH_ID_I2C8:
-		rk_clrsetreg(&pmugrf->gpio1c_iomux,
-			     PMUGRF_GPIO1C4_SEL_MASK,
-			     PMUGRF_I2C8PMU_SDA << PMUGRF_GPIO1C4_SEL_SHIFT);
-		rk_clrsetreg(&pmugrf->gpio1c_iomux,
-			     PMUGRF_GPIO1C5_SEL_MASK,
-			     PMUGRF_I2C8PMU_SCL << PMUGRF_GPIO1C5_SEL_SHIFT);
-		break;
-	case PERIPH_ID_I2C1:
-	case PERIPH_ID_I2C2:
-	case PERIPH_ID_I2C3:
-	case PERIPH_ID_I2C4:
-	case PERIPH_ID_I2C5:
-	case PERIPH_ID_I2C6:
-	case PERIPH_ID_I2C7:
-	default:
-		debug("i2c id = %d iomux error!\n", i2c_id);
-		break;
-	}
-}
-
-static void pinctrl_rk3399_lcdc_config(struct rk3399_grf_regs *grf, int lcd_id)
-{
-	switch (lcd_id) {
-	case PERIPH_ID_LCDC0:
-		break;
-	default:
-		debug("lcdc id = %d iomux error!\n", lcd_id);
-		break;
-	}
-}
-
-static int pinctrl_rk3399_spi_config(struct rk3399_grf_regs *grf,
-				     struct rk3399_pmugrf_regs *pmugrf,
-				     enum periph_id spi_id, int cs)
-{
-	switch (spi_id) {
-	case PERIPH_ID_SPI0:
-		switch (cs) {
-		case 0:
-			rk_clrsetreg(&grf->gpio3a_iomux,
-				     GRF_GPIO3A7_SEL_MASK,
-				     GRF_SPI0NORCODEC_CSN0
-				     << GRF_GPIO3A7_SEL_SHIFT);
-			break;
-		case 1:
-			rk_clrsetreg(&grf->gpio3b_iomux,
-				     GRF_GPIO3B0_SEL_MASK,
-				     GRF_SPI0NORCODEC_CSN1
-				     << GRF_GPIO3B0_SEL_SHIFT);
-			break;
-		default:
-			goto err;
-		}
-		rk_clrsetreg(&grf->gpio3a_iomux,
-			     GRF_GPIO3A4_SEL_MASK | GRF_GPIO3A5_SEL_SHIFT
-			     | GRF_GPIO3A6_SEL_SHIFT,
-			     GRF_SPI0NORCODEC_RXD << GRF_GPIO3A4_SEL_SHIFT
-			     | GRF_SPI0NORCODEC_RXD << GRF_GPIO3A5_SEL_SHIFT
-			     | GRF_SPI0NORCODEC_RXD << GRF_GPIO3A6_SEL_SHIFT);
-		break;
-	case PERIPH_ID_SPI1:
-		if (cs != 0)
-			goto err;
-		rk_clrsetreg(&pmugrf->gpio1a_iomux,
-			     PMUGRF_GPIO1A7_SEL_MASK,
-			     PMUGRF_SPI1EC_RXD << PMUGRF_GPIO1A7_SEL_SHIFT);
-		rk_clrsetreg(&pmugrf->gpio1b_iomux,
-			     PMUGRF_GPIO1B0_SEL_MASK | PMUGRF_GPIO1B1_SEL_MASK
-			     | PMUGRF_GPIO1B2_SEL_MASK,
-			     PMUGRF_SPI1EC_TXD << PMUGRF_GPIO1B0_SEL_SHIFT
-			     | PMUGRF_SPI1EC_CLK << PMUGRF_GPIO1B1_SEL_SHIFT
-			     | PMUGRF_SPI1EC_CSN0 << PMUGRF_GPIO1B2_SEL_SHIFT);
-		break;
-	case PERIPH_ID_SPI2:
-		if (cs != 0)
-			goto err;
-		rk_clrsetreg(&grf->gpio2b_iomux,
-			     GRF_GPIO2B1_SEL_MASK | GRF_GPIO2B2_SEL_MASK
-			     | GRF_GPIO2B3_SEL_MASK | GRF_GPIO2B4_SEL_MASK,
-			     GRF_SPI2TPM_RXD << GRF_GPIO2B1_SEL_SHIFT
-			     | GRF_SPI2TPM_TXD << GRF_GPIO2B2_SEL_SHIFT
-			     | GRF_SPI2TPM_CLK << GRF_GPIO2B3_SEL_SHIFT
-			     | GRF_SPI2TPM_CSN0 << GRF_GPIO2B4_SEL_SHIFT);
-		break;
-	case PERIPH_ID_SPI5:
-		if (cs != 0)
-			goto err;
-		rk_clrsetreg(&grf->gpio2c_iomux,
-			     GRF_GPIO2C4_SEL_MASK | GRF_GPIO2C5_SEL_MASK
-			     | GRF_GPIO2C6_SEL_MASK | GRF_GPIO2C7_SEL_MASK,
-			     GRF_SPI5EXPPLUS_RXD << GRF_GPIO2C4_SEL_SHIFT
-			     | GRF_SPI5EXPPLUS_TXD << GRF_GPIO2C5_SEL_SHIFT
-			     | GRF_SPI5EXPPLUS_CLK << GRF_GPIO2C6_SEL_SHIFT
-			     | GRF_SPI5EXPPLUS_CSN0 << GRF_GPIO2C7_SEL_SHIFT);
-		break;
-	default:
-		printf("%s: spi_id %d is not supported.\n", __func__, spi_id);
-		goto err;
-	}
-
-	return 0;
-err:
-	debug("rkspi: periph%d cs=%d not supported", spi_id, cs);
-	return -ENOENT;
-}
-
-static void pinctrl_rk3399_uart_config(struct rk3399_grf_regs *grf,
-				       struct rk3399_pmugrf_regs *pmugrf,
-				       int uart_id)
-{
-	switch (uart_id) {
-	case PERIPH_ID_UART2:
-		/* Using channel-C by default */
-		rk_clrsetreg(&grf->gpio4c_iomux,
-			     GRF_GPIO4C3_SEL_MASK,
-			     GRF_UART2DGBC_SIN << GRF_GPIO4C3_SEL_SHIFT);
-		rk_clrsetreg(&grf->gpio4c_iomux,
-			     GRF_GPIO4C4_SEL_MASK,
-			     GRF_UART2DBGC_SOUT << GRF_GPIO4C4_SEL_SHIFT);
-		break;
-	case PERIPH_ID_UART0:
-	case PERIPH_ID_UART1:
-	case PERIPH_ID_UART3:
-	case PERIPH_ID_UART4:
-	default:
-		debug("uart id = %d iomux error!\n", uart_id);
-		break;
-	}
-}
-
-static void pinctrl_rk3399_sdmmc_config(struct rk3399_grf_regs *grf, int mmc_id)
-{
-	switch (mmc_id) {
-	case PERIPH_ID_EMMC:
-		break;
-	case PERIPH_ID_SDCARD:
-		rk_clrsetreg(&grf->gpio4b_iomux,
-			     GRF_GPIO4B0_SEL_MASK | GRF_GPIO4B1_SEL_MASK
-			     | GRF_GPIO4B2_SEL_MASK | GRF_GPIO4B3_SEL_MASK
-			     | GRF_GPIO4B4_SEL_MASK | GRF_GPIO4B5_SEL_MASK,
-			     GRF_SDMMC_DATA0 << GRF_GPIO4B0_SEL_SHIFT
-			     | GRF_SDMMC_DATA1 << GRF_GPIO4B1_SEL_SHIFT
-			     | GRF_SDMMC_DATA2 << GRF_GPIO4B2_SEL_SHIFT
-			     | GRF_SDMMC_DATA3 << GRF_GPIO4B3_SEL_SHIFT
-			     | GRF_SDMMC_CLKOUT << GRF_GPIO4B4_SEL_SHIFT
-			     | GRF_SDMMC_CMD << GRF_GPIO4B5_SEL_SHIFT);
-		break;
-	default:
-		debug("mmc id = %d iomux error!\n", mmc_id);
-		break;
-	}
-}
-
-#if CONFIG_IS_ENABLED(GMAC_ROCKCHIP)
-static void pinctrl_rk3399_gmac_config(struct rk3399_grf_regs *grf, int mmc_id)
-{
-	rk_clrsetreg(&grf->gpio3a_iomux,
-		     GRF_GPIO3A0_SEL_MASK | GRF_GPIO3A1_SEL_MASK |
-		     GRF_GPIO3A2_SEL_MASK | GRF_GPIO3A3_SEL_MASK |
-		     GRF_GPIO3A4_SEL_MASK | GRF_GPIO3A5_SEL_MASK |
-		     GRF_GPIO3A6_SEL_MASK | GRF_GPIO3A7_SEL_MASK,
-		     GRF_MAC_TXD2 << GRF_GPIO3A0_SEL_SHIFT |
-		     GRF_MAC_TXD3 << GRF_GPIO3A1_SEL_SHIFT |
-		     GRF_MAC_RXD2 << GRF_GPIO3A2_SEL_SHIFT |
-		     GRF_MAC_RXD3 << GRF_GPIO3A3_SEL_SHIFT |
-		     GRF_MAC_TXD0 << GRF_GPIO3A4_SEL_SHIFT |
-		     GRF_MAC_TXD1 << GRF_GPIO3A5_SEL_SHIFT |
-		     GRF_MAC_RXD0 << GRF_GPIO3A6_SEL_SHIFT |
-		     GRF_MAC_RXD1 << GRF_GPIO3A7_SEL_SHIFT);
-	rk_clrsetreg(&grf->gpio3b_iomux,
-		     GRF_GPIO3B0_SEL_MASK | GRF_GPIO3B1_SEL_MASK |
-					    GRF_GPIO3B3_SEL_MASK |
-		     GRF_GPIO3B4_SEL_MASK | GRF_GPIO3B5_SEL_MASK |
-		     GRF_GPIO3B6_SEL_MASK,
-		     GRF_MAC_MDC << GRF_GPIO3B0_SEL_SHIFT |
-		     GRF_MAC_RXDV << GRF_GPIO3B1_SEL_SHIFT |
-		     GRF_MAC_CLK << GRF_GPIO3B3_SEL_SHIFT |
-		     GRF_MAC_TXEN << GRF_GPIO3B4_SEL_SHIFT |
-		     GRF_MAC_MDIO << GRF_GPIO3B5_SEL_SHIFT |
-		     GRF_MAC_RXCLK << GRF_GPIO3B6_SEL_SHIFT);
-	rk_clrsetreg(&grf->gpio3c_iomux,
-		     GRF_GPIO3C1_SEL_MASK,
-		     GRF_MAC_TXCLK << GRF_GPIO3C1_SEL_SHIFT);
-
-	/* Set drive strength for GMAC tx io, value 3 means 13mA */
-	rk_clrsetreg(&grf->gpio3_e[0],
-		     GRF_GPIO3A0_E_MASK | GRF_GPIO3A1_E_MASK |
-		     GRF_GPIO3A4_E_MASK | GRF_GPIO3A5_E0_MASK,
-		     3 << GRF_GPIO3A0_E_SHIFT |
-		     3 << GRF_GPIO3A1_E_SHIFT |
-		     3 << GRF_GPIO3A4_E_SHIFT |
-		     1 << GRF_GPIO3A5_E0_SHIFT);
-	rk_clrsetreg(&grf->gpio3_e[1],
-		     GRF_GPIO3A5_E12_MASK,
-		     1 << GRF_GPIO3A5_E12_SHIFT);
-	rk_clrsetreg(&grf->gpio3_e[2],
-		     GRF_GPIO3B4_E_MASK,
-		     3 << GRF_GPIO3B4_E_SHIFT);
-	rk_clrsetreg(&grf->gpio3_e[4],
-		     GRF_GPIO3C1_E_MASK,
-		     3 << GRF_GPIO3C1_E_SHIFT);
-}
-#endif
-
-#if !defined(CONFIG_SPL_BUILD)
-static void pinctrl_rk3399_hdmi_config(struct rk3399_grf_regs *grf, int hdmi_id)
-{
-	switch (hdmi_id) {
-	case PERIPH_ID_HDMI:
-		rk_clrsetreg(&grf->gpio4c_iomux,
-			     GRF_GPIO4C0_SEL_MASK | GRF_GPIO4C1_SEL_MASK,
-			     (GRF_HDMII2C_SCL << GRF_GPIO4C0_SEL_SHIFT) |
-			     (GRF_HDMII2C_SDA << GRF_GPIO4C1_SEL_SHIFT));
-		break;
-	default:
-		debug("%s: hdmi_id = %d unsupported\n", __func__, hdmi_id);
-		break;
-	}
-}
-#endif
-
-static int rk3399_pinctrl_request(struct udevice *dev, int func, int flags)
-{
-	struct rk3399_pinctrl_priv *priv = dev_get_priv(dev);
-
-	debug("%s: func=%x, flags=%x\n", __func__, func, flags);
-	switch (func) {
-	case PERIPH_ID_PWM0:
-	case PERIPH_ID_PWM1:
-	case PERIPH_ID_PWM2:
-	case PERIPH_ID_PWM3:
-	case PERIPH_ID_PWM4:
-		pinctrl_rk3399_pwm_config(priv->grf, priv->pmugrf, func);
-		break;
-	case PERIPH_ID_I2C0:
-	case PERIPH_ID_I2C1:
-	case PERIPH_ID_I2C2:
-	case PERIPH_ID_I2C3:
-	case PERIPH_ID_I2C4:
-	case PERIPH_ID_I2C5:
-	case PERIPH_ID_I2C6:
-	case PERIPH_ID_I2C7:
-	case PERIPH_ID_I2C8:
-		pinctrl_rk3399_i2c_config(priv->grf, priv->pmugrf, func);
-		break;
-	case PERIPH_ID_SPI0:
-	case PERIPH_ID_SPI1:
-	case PERIPH_ID_SPI2:
-	case PERIPH_ID_SPI3:
-	case PERIPH_ID_SPI4:
-	case PERIPH_ID_SPI5:
-		pinctrl_rk3399_spi_config(priv->grf, priv->pmugrf, func, flags);
-		break;
-	case PERIPH_ID_UART0:
-	case PERIPH_ID_UART1:
-	case PERIPH_ID_UART2:
-	case PERIPH_ID_UART3:
-	case PERIPH_ID_UART4:
-		pinctrl_rk3399_uart_config(priv->grf, priv->pmugrf, func);
-		break;
-	case PERIPH_ID_LCDC0:
-	case PERIPH_ID_LCDC1:
-		pinctrl_rk3399_lcdc_config(priv->grf, func);
-		break;
-	case PERIPH_ID_SDMMC0:
-	case PERIPH_ID_SDMMC1:
-		pinctrl_rk3399_sdmmc_config(priv->grf, func);
-		break;
-#if CONFIG_IS_ENABLED(GMAC_ROCKCHIP)
-	case PERIPH_ID_GMAC:
-		pinctrl_rk3399_gmac_config(priv->grf, func);
-		break;
-#endif
-#if !defined(CONFIG_SPL_BUILD)
-	case PERIPH_ID_HDMI:
-		pinctrl_rk3399_hdmi_config(priv->grf, func);
-		break;
-#endif
-	default:
-		return -EINVAL;
-	}
-
-	return 0;
-}
-
-static int rk3399_pinctrl_get_periph_id(struct udevice *dev,
-					struct udevice *periph)
-{
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
-	u32 cell[3];
-	int ret;
-
-	ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(periph),
-				   "interrupts", cell, ARRAY_SIZE(cell));
-	if (ret < 0)
-		return -EINVAL;
-
-	switch (cell[1]) {
-	case 68:
-		return PERIPH_ID_SPI0;
-	case 53:
-		return PERIPH_ID_SPI1;
-	case 52:
-		return PERIPH_ID_SPI2;
-	case 132:
-		return PERIPH_ID_SPI5;
-	case 57:
-		return PERIPH_ID_I2C0;
-	case 59: /* Note strange order */
-		return PERIPH_ID_I2C1;
-	case 35:
-		return PERIPH_ID_I2C2;
-	case 34:
-		return PERIPH_ID_I2C3;
-	case 56:
-		return PERIPH_ID_I2C4;
-	case 38:
-		return PERIPH_ID_I2C5;
-	case 37:
-		return PERIPH_ID_I2C6;
-	case 36:
-		return PERIPH_ID_I2C7;
-	case 58:
-		return PERIPH_ID_I2C8;
-	case 65:
-		return PERIPH_ID_SDMMC1;
-#if CONFIG_IS_ENABLED(GMAC_ROCKCHIP)
-	case 12:
-		return PERIPH_ID_GMAC;
-#endif
-#if !defined(CONFIG_SPL_BUILD)
-	case 23:
-		return PERIPH_ID_HDMI;
-#endif
-	}
-#endif
-	return -ENOENT;
-}
-
-static int rk3399_pinctrl_set_state_simple(struct udevice *dev,
-					   struct udevice *periph)
-{
-	int func;
-
-	func = rk3399_pinctrl_get_periph_id(dev, periph);
-	if (func < 0)
-		return func;
-
-	return rk3399_pinctrl_request(dev, func, 0);
-}
-
-static struct pinctrl_ops rk3399_pinctrl_ops = {
-	.set_state_simple	= rk3399_pinctrl_set_state_simple,
-	.request	= rk3399_pinctrl_request,
-	.get_periph_id	= rk3399_pinctrl_get_periph_id,
-};
-
-static int rk3399_pinctrl_probe(struct udevice *dev)
-{
-	struct rk3399_pinctrl_priv *priv = dev_get_priv(dev);
-	int ret = 0;
-
-	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
-	debug("%s: grf=%p, pmugrf=%p\n", __func__, priv->grf, priv->pmugrf);
-
-	return ret;
-}
-
-static const struct udevice_id rk3399_pinctrl_ids[] = {
-	{ .compatible = "rockchip,rk3399-pinctrl" },
-	{ }
-};
-
-U_BOOT_DRIVER(pinctrl_rk3399) = {
-	.name		= "rockchip_rk3399_pinctrl",
-	.id		= UCLASS_PINCTRL,
-	.of_match	= rk3399_pinctrl_ids,
-	.priv_auto_alloc_size = sizeof(struct rk3399_pinctrl_priv),
-	.ops		= &rk3399_pinctrl_ops,
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
-	.bind		= dm_scan_fdt_dev,
-#endif
-	.probe		= rk3399_pinctrl_probe,
-};
diff --git a/drivers/pinctrl/rockchip/pinctrl_rv1108.c b/drivers/pinctrl/rockchip/pinctrl_rv1108.c
deleted file mode 100644
index bdf3910a88..0000000000
--- a/drivers/pinctrl/rockchip/pinctrl_rv1108.c
+++ /dev/null
@@ -1,184 +0,0 @@
-/*
- * (C) Copyright 2016 Rockchip Electronics Co., Ltd
- * Author: Andy Yan <andy.yan@rock-chips.com>
- * SPDX-License-Identifier:     GPL-2.0+
- */
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <syscon.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/grf_rv1108.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/periph.h>
-#include <dm/pinctrl.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-struct rv1108_pinctrl_priv {
-	struct rv1108_grf *grf;
-};
-
-static void pinctrl_rv1108_uart_config(struct rv1108_grf *grf, int uart_id)
-{
-	switch (uart_id) {
-	case PERIPH_ID_UART0:
-		rk_clrsetreg(&grf->gpio3a_iomux,
-			     GPIO3A6_MASK | GPIO3A5_MASK,
-			     GPIO3A6_UART1_SOUT << GPIO3A6_SHIFT |
-			     GPIO3A5_UART1_SIN << GPIO3A5_SHIFT);
-		break;
-	case PERIPH_ID_UART1:
-		rk_clrsetreg(&grf->gpio1d_iomux,
-			     GPIO1D3_MASK | GPIO1D2_MASK | GPIO1D1_MASK |
-			     GPIO1D0_MASK,
-			     GPIO1D3_UART0_SOUT << GPIO1D3_SHIFT |
-			     GPIO1D2_UART0_SIN << GPIO1D2_SHIFT |
-			     GPIO1D1_UART0_RTSN << GPIO1D1_SHIFT |
-			     GPIO1D0_UART0_CTSN << GPIO1D0_SHIFT);
-		break;
-	case PERIPH_ID_UART2:
-		rk_clrsetreg(&grf->gpio2d_iomux,
-			     GPIO2D2_MASK | GPIO2D1_MASK,
-			     GPIO2D2_UART2_SOUT_M0 << GPIO2D2_SHIFT |
-			     GPIO2D1_UART2_SIN_M0 << GPIO2D1_SHIFT);
-		break;
-	}
-}
-
-static void pinctrl_rv1108_gmac_config(struct rv1108_grf *grf, int func)
-{
-	rk_clrsetreg(&grf->gpio1b_iomux,
-		     GPIO1B7_MASK | GPIO1B6_MASK | GPIO1B5_MASK |
-		     GPIO1B4_MASK | GPIO1B3_MASK | GPIO1B2_MASK,
-		     GPIO1B7_GMAC_RXDV << GPIO1B7_SHIFT |
-		     GPIO1B6_GMAC_RXD1 << GPIO1B6_SHIFT |
-		     GPIO1B5_GMAC_RXD0 << GPIO1B5_SHIFT |
-		     GPIO1B4_GMAC_TXEN << GPIO1B4_SHIFT |
-		     GPIO1B3_GMAC_TXD1 << GPIO1B3_SHIFT |
-		     GPIO1B2_GMAC_TXD0 << GPIO1B2_SHIFT);
-	rk_clrsetreg(&grf->gpio1c_iomux,
-		     GPIO1C5_MASK | GPIO1C4_MASK |
-		     GPIO1C3_MASK | GPIO1C2_MASK,
-		     GPIO1C5_GMAC_CLK << GPIO1C5_SHIFT |
-		     GPIO1C4_GMAC_MDC << GPIO1C4_SHIFT |
-		     GPIO1C3_GMAC_MDIO << GPIO1C3_SHIFT |
-		     GPIO1C2_GMAC_RXER << GPIO1C2_SHIFT);
-	writel(0xffff57f5, &grf->gpio1b_drv);
-}
-
-static void pinctrl_rv1108_sfc_config(struct rv1108_grf *grf)
-{
-	rk_clrsetreg(&grf->gpio2a_iomux, GPIO2A3_MASK | GPIO2A2_MASK |
-		     GPIO2A1_MASK | GPIO2A0_MASK,
-		     GPIO2A3_SFC_HOLD_IO3 << GPIO2A3_SHIFT |
-		     GPIO2A2_SFC_WP_IO2 << GPIO2A2_SHIFT |
-		     GPIO2A1_SFC_SO_IO1 << GPIO2A1_SHIFT |
-		     GPIO2A0_SFC_SI_IO0 << GPIO2A0_SHIFT);
-	rk_clrsetreg(&grf->gpio2b_iomux, GPIO2B7_MASK | GPIO2B4_MASK,
-		     GPIO2B7_SFC_CLK << GPIO2B7_SHIFT |
-		     GPIO2B4_SFC_CSN0 << GPIO2B4_SHIFT);
-}
-
-static int rv1108_pinctrl_request(struct udevice *dev, int func, int flags)
-{
-	struct rv1108_pinctrl_priv *priv = dev_get_priv(dev);
-
-	switch (func) {
-	case PERIPH_ID_UART0:
-	case PERIPH_ID_UART1:
-	case PERIPH_ID_UART2:
-		pinctrl_rv1108_uart_config(priv->grf, func);
-		break;
-	case PERIPH_ID_GMAC:
-		pinctrl_rv1108_gmac_config(priv->grf, func);
-	case PERIPH_ID_SFC:
-		pinctrl_rv1108_sfc_config(priv->grf);
-	default:
-		return -EINVAL;
-	}
-
-	return 0;
-}
-
-static int rv1108_pinctrl_get_periph_id(struct udevice *dev,
-					struct udevice *periph)
-{
-	u32 cell[3];
-	int ret;
-
-	ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(periph),
-				   "interrupts", cell, ARRAY_SIZE(cell));
-	if (ret < 0)
-		return -EINVAL;
-
-	switch (cell[1]) {
-	case 11:
-		return PERIPH_ID_SDCARD;
-	case 13:
-		return PERIPH_ID_EMMC;
-	case 19:
-		return PERIPH_ID_GMAC;
-	case 30:
-		return PERIPH_ID_I2C0;
-	case 31:
-		return PERIPH_ID_I2C1;
-	case 32:
-		return PERIPH_ID_I2C2;
-	case 39:
-		return PERIPH_ID_PWM0;
-	case 44:
-		return PERIPH_ID_UART0;
-	case 45:
-		return PERIPH_ID_UART1;
-	case 46:
-		return PERIPH_ID_UART2;
-	case 56:
-		return PERIPH_ID_SFC;
-	}
-
-	return -ENOENT;
-}
-
-static int rv1108_pinctrl_set_state_simple(struct udevice *dev,
-					   struct udevice *periph)
-{
-	int func;
-
-	func = rv1108_pinctrl_get_periph_id(dev, periph);
-	if (func < 0)
-		return func;
-
-	return rv1108_pinctrl_request(dev, func, 0);
-}
-
-static struct pinctrl_ops rv1108_pinctrl_ops = {
-	.set_state_simple	= rv1108_pinctrl_set_state_simple,
-	.request		= rv1108_pinctrl_request,
-	.get_periph_id		= rv1108_pinctrl_get_periph_id,
-};
-
-static int rv1108_pinctrl_probe(struct udevice *dev)
-{
-	struct rv1108_pinctrl_priv *priv = dev_get_priv(dev);
-
-	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-
-	return 0;
-}
-
-static const struct udevice_id rv1108_pinctrl_ids[] = {
-	{.compatible = "rockchip,rv1108-pinctrl" },
-	{ }
-};
-
-U_BOOT_DRIVER(pinctrl_rv1108) = {
-	.name           = "pinctrl_rv1108",
-	.id             = UCLASS_PINCTRL,
-	.of_match       = rv1108_pinctrl_ids,
-	.priv_auto_alloc_size = sizeof(struct rv1108_pinctrl_priv),
-	.ops            = &rv1108_pinctrl_ops,
-	.bind           = dm_scan_fdt_dev,
-	.probe          = rv1108_pinctrl_probe,
-};

commit 342662e935a8e42e7c353c2f1d495299345fbf14
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Jan 31 11:37:52 2018 +0800

    defconfig: rockchip: Clean the unused pinctrl config
    
    If we used the pinctrl-rockchip driver, these config is not needed,
    so remove them.
    
    Change-Id: I606b706dd7d45a947a9aeb32c0ca61d44cef0651
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/configs/bnd-d708-rk3126_defconfig b/configs/bnd-d708-rk3126_defconfig
index 1059dc5f59..a94df64af9 100644
--- a/configs/bnd-d708-rk3126_defconfig
+++ b/configs/bnd-d708-rk3126_defconfig
@@ -41,7 +41,6 @@ CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
-CONFIG_PINCTRL_ROCKCHIP_RK3128=y
 CONFIG_DM_FUEL_GAUGE=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig
index 8a32aed288..3ec0370dec 100644
--- a/configs/chromebit_mickey_defconfig
+++ b/configs/chromebit_mickey_defconfig
@@ -54,8 +54,6 @@ CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
-# CONFIG_SPL_PINCTRL_FULL is not set
-CONFIG_PINCTRL_ROCKCHIP_RK3288=y
 CONFIG_DM_PMIC=y
 # CONFIG_SPL_PMIC_CHILDREN is not set
 CONFIG_PMIC_RK8XX=y
diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig
index 26c7c75afe..ca11b5cbc1 100644
--- a/configs/chromebook_jerry_defconfig
+++ b/configs/chromebook_jerry_defconfig
@@ -56,8 +56,6 @@ CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
-# CONFIG_SPL_PINCTRL_FULL is not set
-CONFIG_PINCTRL_ROCKCHIP_RK3288=y
 CONFIG_DM_PMIC=y
 # CONFIG_SPL_PMIC_CHILDREN is not set
 CONFIG_PMIC_RK8XX=y
diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig
index 148c6724fe..9663da138d 100644
--- a/configs/chromebook_minnie_defconfig
+++ b/configs/chromebook_minnie_defconfig
@@ -55,8 +55,6 @@ CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
-# CONFIG_SPL_PINCTRL_FULL is not set
-CONFIG_PINCTRL_ROCKCHIP_RK3288=y
 CONFIG_DM_PMIC=y
 # CONFIG_SPL_PMIC_CHILDREN is not set
 CONFIG_PMIC_RK8XX=y
diff --git a/configs/evb-px5_defconfig b/configs/evb-px5_defconfig
index a93dae0928..e9f2c05265 100644
--- a/configs/evb-px5_defconfig
+++ b/configs/evb-px5_defconfig
@@ -17,7 +17,6 @@ CONFIG_CLK=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
-CONFIG_PINCTRL_ROCKCHIP_RK3368=y
 CONFIG_RAM=y
 CONFIG_DM_RESET=y
 CONFIG_DEBUG_UART_BASE=0xFF1c0000
diff --git a/configs/evb-rk3036_defconfig b/configs/evb-rk3036_defconfig
index 5f45c87b20..4bf97b7260 100644
--- a/configs/evb-rk3036_defconfig
+++ b/configs/evb-rk3036_defconfig
@@ -36,7 +36,6 @@ CONFIG_LED=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
-CONFIG_PINCTRL_ROCKCHIP_RK3036=y
 CONFIG_DM_RESET=y
 # CONFIG_SPL_DM_SERIAL is not set
 CONFIG_DEBUG_UART_BASE=0x20068000
diff --git a/configs/evb-rk3066_defconfig b/configs/evb-rk3066_defconfig
index b512094db5..6f32c06024 100644
--- a/configs/evb-rk3066_defconfig
+++ b/configs/evb-rk3066_defconfig
@@ -40,7 +40,6 @@ CONFIG_CMD_GPIO=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_GENERIC=y
-CONFIG_PINCTRL_ROCKCHIP_RK3066=y
 CONFIG_DEBUG_UART=y
 CONFIG_DEBUG_UART_BASE=0x20064000
 CONFIG_DEBUG_UART_CLOCK=24000000
diff --git a/configs/evb-rk3126_defconfig b/configs/evb-rk3126_defconfig
index 8c55012136..c44891c1a4 100644
--- a/configs/evb-rk3126_defconfig
+++ b/configs/evb-rk3126_defconfig
@@ -40,7 +40,6 @@ CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
-CONFIG_PINCTRL_ROCKCHIP_RK3128=y
 CONFIG_DM_FUEL_GAUGE=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
diff --git a/configs/evb-rk3128_defconfig b/configs/evb-rk3128_defconfig
index 7c2a607e90..ed4b42f94b 100644
--- a/configs/evb-rk3128_defconfig
+++ b/configs/evb-rk3128_defconfig
@@ -29,7 +29,6 @@ CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
-CONFIG_PINCTRL_ROCKCHIP_RK3128=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_RAM=y
diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index 814b0d93de..302c44efa8 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -60,7 +60,6 @@ CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
-CONFIG_PINCTRL_ROCKCHIP_RK322X=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
diff --git a/configs/evb-rk3288-rk1608_defconfig b/configs/evb-rk3288-rk1608_defconfig
index f81bf138cb..d73134f64e 100644
--- a/configs/evb-rk3288-rk1608_defconfig
+++ b/configs/evb-rk3288-rk1608_defconfig
@@ -50,8 +50,6 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
-# CONFIG_SPL_PINCTRL_FULL is not set
-CONFIG_PINCTRL_ROCKCHIP_RK3288=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_ACT8846=y
 CONFIG_REGULATOR_ACT8846=y
diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig
index 04f6a064e3..c68e5a26b5 100644
--- a/configs/evb-rk3288_defconfig
+++ b/configs/evb-rk3288_defconfig
@@ -50,8 +50,6 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
-# CONFIG_SPL_PINCTRL_FULL is not set
-CONFIG_PINCTRL_ROCKCHIP_RK3288=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_ACT8846=y
 CONFIG_REGULATOR_ACT8846=y
diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index 2e85295af9..bbd04b5209 100644
--- a/configs/evb-rk3328_defconfig
+++ b/configs/evb-rk3328_defconfig
@@ -57,7 +57,6 @@ CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
-CONFIG_PINCTRL_ROCKCHIP_RK3328=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y
diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index a7b881cceb..c9d3037cdb 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -55,7 +55,6 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
-CONFIG_PINCTRL_ROCKCHIP_RK3399=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y
diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig
index 72b08c544e..1df6d46d98 100644
--- a/configs/evb-rv1108_defconfig
+++ b/configs/evb-rv1108_defconfig
@@ -36,7 +36,6 @@ CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
-CONFIG_PINCTRL_ROCKCHIP_RV1108=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
diff --git a/configs/fennec-rk3288_defconfig b/configs/fennec-rk3288_defconfig
index d9c4d30e05..5a4e98bdc2 100644
--- a/configs/fennec-rk3288_defconfig
+++ b/configs/fennec-rk3288_defconfig
@@ -51,8 +51,6 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
-# CONFIG_SPL_PINCTRL_FULL is not set
-CONFIG_PINCTRL_ROCKCHIP_RK3288=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_DM_REGULATOR_FIXED=y
diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig
index 8804121bf4..3caf2c1280 100644
--- a/configs/firefly-rk3288_defconfig
+++ b/configs/firefly-rk3288_defconfig
@@ -54,8 +54,6 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
-# CONFIG_SPL_PINCTRL_FULL is not set
-CONFIG_PINCTRL_ROCKCHIP_RK3288=y
 CONFIG_DM_PMIC=y
 # CONFIG_SPL_PMIC_CHILDREN is not set
 CONFIG_PMIC_ACT8846=y
diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
index f6b8a76aac..95723b823c 100644
--- a/configs/firefly-rk3399_defconfig
+++ b/configs/firefly-rk3399_defconfig
@@ -54,7 +54,6 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
-CONFIG_PINCTRL_ROCKCHIP_RK3399=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y
diff --git a/configs/geekbox_defconfig b/configs/geekbox_defconfig
index 19255fb209..bc3e179849 100644
--- a/configs/geekbox_defconfig
+++ b/configs/geekbox_defconfig
@@ -11,7 +11,6 @@ CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_CLK=y
 CONFIG_PINCTRL=y
-CONFIG_PINCTRL_ROCKCHIP_RK3368=y
 CONFIG_RAM=y
 CONFIG_DEBUG_UART_BASE=0xFF690000
 CONFIG_DEBUG_UART_CLOCK=24000000
diff --git a/configs/gva-rk3229_defconfig b/configs/gva-rk3229_defconfig
index 9a27b69ade..ac9dd3c4ed 100644
--- a/configs/gva-rk3229_defconfig
+++ b/configs/gva-rk3229_defconfig
@@ -56,7 +56,6 @@ CONFIG_ROCKCHIP_EFUSE=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
-CONFIG_PINCTRL_ROCKCHIP_RK322X=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
diff --git a/configs/kylin-rk3036_defconfig b/configs/kylin-rk3036_defconfig
index a42f5e0efb..dec941cfd3 100644
--- a/configs/kylin-rk3036_defconfig
+++ b/configs/kylin-rk3036_defconfig
@@ -36,7 +36,6 @@ CONFIG_LED=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
-CONFIG_PINCTRL_ROCKCHIP_RK3036=y
 CONFIG_DM_REGULATOR_FIXED=y
 # CONFIG_SPL_DM_SERIAL is not set
 CONFIG_SYSRESET=y
diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig
index ccfde2f5c6..6c8eee760f 100644
--- a/configs/lion-rk3368_defconfig
+++ b/configs/lion-rk3368_defconfig
@@ -74,7 +74,6 @@ CONFIG_RGMII=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
-CONFIG_PINCTRL_ROCKCHIP_RK3368=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_DM_REGULATOR_FIXED=y
diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig
index b0437e13a7..f902ecf44b 100644
--- a/configs/miqi-rk3288_defconfig
+++ b/configs/miqi-rk3288_defconfig
@@ -51,8 +51,6 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
-# CONFIG_SPL_PINCTRL_FULL is not set
-CONFIG_PINCTRL_ROCKCHIP_RK3288=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_ACT8846=y
 CONFIG_REGULATOR_ACT8846=y
diff --git a/configs/mk808_defconfig b/configs/mk808_defconfig
index b37532d973..4dfe5dda5c 100644
--- a/configs/mk808_defconfig
+++ b/configs/mk808_defconfig
@@ -39,7 +39,6 @@ CONFIG_CMD_GPIO=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_GENERIC=y
-CONFIG_PINCTRL_ROCKCHIP_RK3066=y
 CONFIG_DEBUG_UART=y
 CONFIG_DEBUG_UART_BASE=0x20064000
 CONFIG_DEBUG_UART_CLOCK=24000000
diff --git a/configs/phycore-rk3288_defconfig b/configs/phycore-rk3288_defconfig
index 93ee353d0d..4cc038b026 100644
--- a/configs/phycore-rk3288_defconfig
+++ b/configs/phycore-rk3288_defconfig
@@ -55,8 +55,6 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
-# CONFIG_SPL_PINCTRL_FULL is not set
-CONFIG_PINCTRL_ROCKCHIP_RK3288=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_DM_REGULATOR_FIXED=y
diff --git a/configs/popmetal-rk3288_defconfig b/configs/popmetal-rk3288_defconfig
index 5e99f9c089..064d83df7f 100644
--- a/configs/popmetal-rk3288_defconfig
+++ b/configs/popmetal-rk3288_defconfig
@@ -51,8 +51,6 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
-# CONFIG_SPL_PINCTRL_FULL is not set
-CONFIG_PINCTRL_ROCKCHIP_RK3288=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_DM_REGULATOR_FIXED=y
diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig
index 2aa8e1aa6c..cb014631e5 100644
--- a/configs/puma-rk3399_defconfig
+++ b/configs/puma-rk3399_defconfig
@@ -67,7 +67,6 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
-CONFIG_PINCTRL_ROCKCHIP_RK3399=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_SPL_DM_REGULATOR=y
diff --git a/configs/rock2_defconfig b/configs/rock2_defconfig
index b41644ef5f..63ed99d013 100644
--- a/configs/rock2_defconfig
+++ b/configs/rock2_defconfig
@@ -50,8 +50,6 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
-# CONFIG_SPL_PINCTRL_FULL is not set
-CONFIG_PINCTRL_ROCKCHIP_RK3288=y
 CONFIG_DM_PMIC=y
 # CONFIG_SPL_PMIC_CHILDREN is not set
 CONFIG_PMIC_ACT8846=y
diff --git a/configs/rock_defconfig b/configs/rock_defconfig
index 1534754cf3..781a53c200 100644
--- a/configs/rock_defconfig
+++ b/configs/rock_defconfig
@@ -38,7 +38,6 @@ CONFIG_LED=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
-CONFIG_PINCTRL_ROCKCHIP_RK3188=y
 CONFIG_DM_PMIC=y
 # CONFIG_SPL_PMIC_CHILDREN is not set
 CONFIG_PMIC_ACT8846=y
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index ac0736aa9a..240f0a4adc 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -129,8 +129,6 @@ CONFIG_PHY=y
 CONFIG_PHY_SANDBOX=y
 CONFIG_PINCTRL=y
 CONFIG_PINCONF=y
-CONFIG_PINCTRL_ROCKCHIP_RK3036=y
-CONFIG_PINCTRL_ROCKCHIP_RK3288=y
 CONFIG_PINCTRL_SANDBOX=y
 CONFIG_POWER_DOMAIN=y
 CONFIG_SANDBOX_POWER_DOMAIN=y
diff --git a/configs/sandbox_flattree_defconfig b/configs/sandbox_flattree_defconfig
index 77cca3d00d..2093c11f06 100644
--- a/configs/sandbox_flattree_defconfig
+++ b/configs/sandbox_flattree_defconfig
@@ -116,8 +116,6 @@ CONFIG_PHY=y
 CONFIG_PHY_SANDBOX=y
 CONFIG_PINCTRL=y
 CONFIG_PINCONF=y
-CONFIG_PINCTRL_ROCKCHIP_RK3036=y
-CONFIG_PINCTRL_ROCKCHIP_RK3288=y
 CONFIG_PINCTRL_SANDBOX=y
 CONFIG_POWER_DOMAIN=y
 CONFIG_SANDBOX_POWER_DOMAIN=y
diff --git a/configs/sandbox_noblk_defconfig b/configs/sandbox_noblk_defconfig
index 53c2fb8442..0040803cb0 100644
--- a/configs/sandbox_noblk_defconfig
+++ b/configs/sandbox_noblk_defconfig
@@ -126,8 +126,6 @@ CONFIG_PHY=y
 CONFIG_PHY_SANDBOX=y
 CONFIG_PINCTRL=y
 CONFIG_PINCONF=y
-CONFIG_PINCTRL_ROCKCHIP_RK3036=y
-CONFIG_PINCTRL_ROCKCHIP_RK3288=y
 CONFIG_PINCTRL_SANDBOX=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_ACT8846=y
diff --git a/configs/sheep-rk3368_defconfig b/configs/sheep-rk3368_defconfig
index a7991afae2..30f790fa30 100644
--- a/configs/sheep-rk3368_defconfig
+++ b/configs/sheep-rk3368_defconfig
@@ -15,7 +15,6 @@ CONFIG_CLK=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
-CONFIG_PINCTRL_ROCKCHIP_RK3368=y
 CONFIG_RAM=y
 CONFIG_DEBUG_UART_BASE=0xFF1b0000
 CONFIG_DEBUG_UART_CLOCK=24000000
diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig
index 00e2d81954..8db265b252 100644
--- a/configs/tinker-rk3288_defconfig
+++ b/configs/tinker-rk3288_defconfig
@@ -54,8 +54,6 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
-# CONFIG_SPL_PINCTRL_FULL is not set
-CONFIG_PINCTRL_ROCKCHIP_RK3288=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_DM_REGULATOR_FIXED=y
diff --git a/configs/vyasa-rk3288_defconfig b/configs/vyasa-rk3288_defconfig
index 711d10e0f6..d4f8e400b9 100644
--- a/configs/vyasa-rk3288_defconfig
+++ b/configs/vyasa-rk3288_defconfig
@@ -44,8 +44,6 @@ CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
-# CONFIG_SPL_PINCTRL_FULL is not set
-CONFIG_PINCTRL_ROCKCHIP_RK3288=y
 CONFIG_DM_PMIC=y
 # CONFIG_SPL_PMIC_CHILDREN is not set
 CONFIG_PMIC_RK8XX=y

commit 5f84f5d0d1d011432cb6abeda10f97e2d7e95b79
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Jan 31 14:33:50 2018 +0800

    configs: chrome: Fix the compiling error for pinctrl driver
    
    If used the new pinctrl-rockchip driver, need to remove CONFIG_SPL_OF_PLATDATA,
    and enable CONFIG_SPL_OF_LIBFDT.
    
    Change-Id: I6a9a8921b4dd8551b83a5cc7f2e3332a630aaa15
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig
index f40c0b9afa..8a32aed288 100644
--- a/configs/chromebit_mickey_defconfig
+++ b/configs/chromebit_mickey_defconfig
@@ -34,7 +34,6 @@ CONFIG_CMD_REGULATOR=y
 CONFIG_SPL_PARTITION_UUIDS=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
-CONFIG_SPL_OF_PLATDATA=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y
@@ -87,4 +86,3 @@ CONFIG_DISPLAY_ROCKCHIP_HDMI=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_CMD_DHRYSTONE=y
 CONFIG_ERRNO_STR=y
-# CONFIG_SPL_OF_LIBFDT is not set
diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig
index cdeabaa12a..26c7c75afe 100644
--- a/configs/chromebook_jerry_defconfig
+++ b/configs/chromebook_jerry_defconfig
@@ -36,7 +36,6 @@ CONFIG_CMD_REGULATOR=y
 CONFIG_SPL_PARTITION_UUIDS=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
-CONFIG_SPL_OF_PLATDATA=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y
@@ -89,4 +88,3 @@ CONFIG_DISPLAY_ROCKCHIP_HDMI=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_CMD_DHRYSTONE=y
 CONFIG_ERRNO_STR=y
-# CONFIG_SPL_OF_LIBFDT is not set
diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig
index c1e36fa860..148c6724fe 100644
--- a/configs/chromebook_minnie_defconfig
+++ b/configs/chromebook_minnie_defconfig
@@ -35,7 +35,6 @@ CONFIG_CMD_REGULATOR=y
 CONFIG_SPL_PARTITION_UUIDS=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
-CONFIG_SPL_OF_PLATDATA=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y
@@ -89,4 +88,3 @@ CONFIG_CONSOLE_SCROLL_LINES=10
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_CMD_DHRYSTONE=y
 CONFIG_ERRNO_STR=y
-# CONFIG_SPL_OF_LIBFDT is not set

commit 49c55878fa148494fb74f43e4ecf874210a2c236
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Jan 31 11:36:00 2018 +0800

    pinctrl: rockchip: Add common rockchip pinctrl driver
    
    Use this drive to fit all Rockchip SOCs and to support
    the desired pinctrl configuration via DTS.
    
    Change-Id: I86b5f25feb13c92a56103aef292a492e8f2accc8
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index 4d0e958c41..cf4436ff3a 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -158,104 +158,24 @@ config PINCTRL_QCA953X
 	  the GPIO definitions and pin control functions for each available
 	  multiplex function.
 
-config PINCTRL_ROCKCHIP_RK3036
-	bool "Rockchip rk3036 pin control driver"
-	depends on DM
-	help
-	  Support pin multiplexing control on Rockchip rk3036 SoCs.
-
-	  The driver is controlled by a device tree node which contains both
-	  the GPIO definitions and pin control functions for each available
-	  multiplex function.
-
-config PINCTRL_ROCKCHIP_RK3128
-	bool "Rockchip rk3128 pin control driver"
-	depends on DM
-	help
-	  Support pin multiplexing control on Rockchip rk3128 SoCs.
-
-	  The driver is controlled by a device tree node which contains both
-	  the GPIO definitions and pin control functions for each available
-	  multiplex function.
-
-config PINCTRL_ROCKCHIP_RK3066
-        bool "Rockchip rk3066 pin control driver"
-        depends on DM
-        help
-          Support pin multiplexing control on Rockchip rk3066 SoCs. The driver is
-          controlled by a device tree node which contains both the GPIO
-          definitions and pin control functions for each available multiplex
-          function.
-
-config PINCTRL_ROCKCHIP_RK3188
-	bool "Rockchip rk3188 pin control driver"
-	depends on DM
-	help
-	  Support pin multiplexing control on Rockchip rk3188 SoCs.
-
-	  The driver is controlled by a device tree node which contains both
-	  the GPIO definitions and pin control functions for each available
-	  multiplex function.
-
-config PINCTRL_ROCKCHIP_RK322X
-	bool "Rockchip rk322x pin control driver"
-	depends on DM
-	help
-	  Support pin multiplexing control on Rockchip rk322x SoCs.
-
-	  The driver is controlled by a device tree node which contains both
-	  the GPIO definitions and pin control functions for each available
-	  multiplex function.
-
-config PINCTRL_ROCKCHIP_RK3288
-	bool "Rockchip rk3288 pin control driver"
-	depends on DM
-	help
-	  Support pin multiplexing control on Rockchip rk3288 SoCs.
-
-	  The driver is controlled by a device tree node which contains both
-	  the GPIO definitions and pin control functions for each available
-	  multiplex function.
-
-config PINCTRL_ROCKCHIP_RK3328
-	bool "Rockchip rk3328 pin control driver"
-	depends on DM
-	help
-	  Support pin multiplexing control on Rockchip rk3328 SoCs.
-
-	  The driver is controlled by a device tree node which contains both
-	  the GPIO definitions and pin control functions for each available
-	  multiplex function.
-
-config PINCTRL_ROCKCHIP_RK3368
-	bool "Rockchip RK3368 pin control driver"
-	depends on DM
-	help
-	  Support pin multiplexing control on Rockchip rk3368 SoCs.
-
-	  The driver is controlled by a device tree node which contains both
-	  the GPIO definitions and pin control functions for each available
-	  multiplex function.
-
-config PINCTRL_ROCKCHIP_RK3399
-	bool "Rockchip rk3399 pin control driver"
-	depends on DM
+config PINCTRL_ROCKCHIP
+	bool "Rockchip pin control driver"
+	depends on PINCTRL_FULL && ARCH_ROCKCHIP
+	default y
 	help
-	  Support pin multiplexing control on Rockchip rk3399 SoCs.
+	  Support pin multiplexing control on Rockchip SoCs.
 
 	  The driver is controlled by a device tree node which contains both
 	  the GPIO definitions and pin control functions for each available
 	  multiplex function.
 
-config PINCTRL_ROCKCHIP_RV1108
-	bool "Rockchip rv1108 pin control driver"
-	depends on DM
+config SPL_PINCTRL_ROCKCHIP
+	bool "Support Rockchip pin controllers in SPL"
+	depends on SPL_PINCTRL_FULL && ARCH_ROCKCHIP
+	default y
 	help
-	  Support pin multiplexing control on Rockchip rv1108 SoC.
-
-	  The driver is controlled by a device tree node which contains
-	  both the GPIO definitions and pin control functions for each
-	  available multiplex function.
+	  This option is an SPL-variant of the PINCTRL_ROCKCHIP option.
+	  See the help of PINCTRL_ROCKCHIP for details.
 
 config PINCTRL_SANDBOX
 	bool "Sandbox pinctrl driver"
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index 64da7c608b..35e8001029 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -10,7 +10,7 @@ obj-$(CONFIG_PINCTRL_AT91PIO4)		+= pinctrl-at91-pio4.o
 obj-y					+= nxp/
 obj-$(CONFIG_ARCH_ASPEED) += aspeed/
 obj-$(CONFIG_ARCH_ATH79) += ath79/
-obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
+obj-$(CONFIG_$(SPL_)PINCTRL_ROCKCHIP) += pinctrl-rockchip.o
 obj-$(CONFIG_PINCTRL_SANDBOX)	+= pinctrl-sandbox.o
 
 obj-$(CONFIG_PINCTRL_UNIPHIER)	+= uniphier/
diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
new file mode 100644
index 0000000000..68bf30d8e6
--- /dev/null
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -0,0 +1,2440 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <regmap.h>
+#include <syscon.h>
+
+#define MAX_ROCKCHIP_GPIO_PER_BANK	32
+#define RK_FUNC_GPIO			0
+#define MAX_ROCKCHIP_PINS_ENTRIES	20
+
+enum rockchip_pinctrl_type {
+	PX30,
+	RV1108,
+	RK2928,
+	RK3066B,
+	RK3128,
+	RK3188,
+	RK3288,
+	RK3368,
+	RK3399,
+};
+
+/**
+ * Encode variants of iomux registers into a type variable
+ */
+#define IOMUX_GPIO_ONLY		BIT(0)
+#define IOMUX_WIDTH_4BIT	BIT(1)
+#define IOMUX_SOURCE_PMU	BIT(2)
+#define IOMUX_UNROUTED		BIT(3)
+#define IOMUX_WIDTH_3BIT	BIT(4)
+
+/**
+ * @type: iomux variant using IOMUX_* constants
+ * @offset: if initialized to -1 it will be autocalculated, by specifying
+ *	    an initial offset value the relevant source offset can be reset
+ *	    to a new value for autocalculating the following iomux registers.
+ */
+struct rockchip_iomux {
+	int				type;
+	int				offset;
+};
+
+/**
+ * enum type index corresponding to rockchip_perpin_drv_list arrays index.
+ */
+enum rockchip_pin_drv_type {
+	DRV_TYPE_IO_DEFAULT = 0,
+	DRV_TYPE_IO_1V8_OR_3V0,
+	DRV_TYPE_IO_1V8_ONLY,
+	DRV_TYPE_IO_1V8_3V0_AUTO,
+	DRV_TYPE_IO_3V3_ONLY,
+	DRV_TYPE_MAX
+};
+
+/**
+ * enum type index corresponding to rockchip_pull_list arrays index.
+ */
+enum rockchip_pin_pull_type {
+	PULL_TYPE_IO_DEFAULT = 0,
+	PULL_TYPE_IO_1V8_ONLY,
+	PULL_TYPE_MAX
+};
+
+/**
+ * @drv_type: drive strength variant using rockchip_perpin_drv_type
+ * @offset: if initialized to -1 it will be autocalculated, by specifying
+ *	    an initial offset value the relevant source offset can be reset
+ *	    to a new value for autocalculating the following drive strength
+ *	    registers. if used chips own cal_drv func instead to calculate
+ *	    registers offset, the variant could be ignored.
+ */
+struct rockchip_drv {
+	enum rockchip_pin_drv_type	drv_type;
+	int				offset;
+};
+
+/**
+ * @priv: common pinctrl private basedata
+ * @pin_base: first pin number
+ * @nr_pins: number of pins in this bank
+ * @name: name of the bank
+ * @bank_num: number of the bank, to account for holes
+ * @iomux: array describing the 4 iomux sources of the bank
+ * @drv: array describing the 4 drive strength sources of the bank
+ * @pull_type: array describing the 4 pull type sources of the bank
+ * @recalced_mask: bits describing the mux recalced pins of per bank
+ * @route_mask: bits describing the routing pins of per bank
+ */
+struct rockchip_pin_bank {
+	struct rockchip_pinctrl_priv	*priv;
+	u32				pin_base;
+	u8				nr_pins;
+	char				*name;
+	u8				bank_num;
+	struct rockchip_iomux		iomux[4];
+	struct rockchip_drv		drv[4];
+	enum rockchip_pin_pull_type	pull_type[4];
+	u32				recalced_mask;
+	u32				route_mask;
+};
+
+#define PIN_BANK(id, pins, label)			\
+	{						\
+		.bank_num	= id,			\
+		.nr_pins	= pins,			\
+		.name		= label,		\
+		.iomux		= {			\
+			{ .offset = -1 },		\
+			{ .offset = -1 },		\
+			{ .offset = -1 },		\
+			{ .offset = -1 },		\
+		},					\
+	}
+
+#define PIN_BANK_IOMUX_FLAGS(id, pins, label, iom0, iom1, iom2, iom3)	\
+	{								\
+		.bank_num	= id,					\
+		.nr_pins	= pins,					\
+		.name		= label,				\
+		.iomux		= {					\
+			{ .type = iom0, .offset = -1 },			\
+			{ .type = iom1, .offset = -1 },			\
+			{ .type = iom2, .offset = -1 },			\
+			{ .type = iom3, .offset = -1 },			\
+		},							\
+	}
+
+#define PIN_BANK_DRV_FLAGS(id, pins, label, type0, type1, type2, type3) \
+	{								\
+		.bank_num	= id,					\
+		.nr_pins	= pins,					\
+		.name		= label,				\
+		.iomux		= {					\
+			{ .offset = -1 },				\
+			{ .offset = -1 },				\
+			{ .offset = -1 },				\
+			{ .offset = -1 },				\
+		},							\
+		.drv		= {					\
+			{ .drv_type = type0, .offset = -1 },		\
+			{ .drv_type = type1, .offset = -1 },		\
+			{ .drv_type = type2, .offset = -1 },		\
+			{ .drv_type = type3, .offset = -1 },		\
+		},							\
+	}
+
+#define PIN_BANK_DRV_FLAGS_PULL_FLAGS(id, pins, label, drv0, drv1,	\
+				      drv2, drv3, pull0, pull1,		\
+				      pull2, pull3)			\
+	{								\
+		.bank_num	= id,					\
+		.nr_pins	= pins,					\
+		.name		= label,				\
+		.iomux		= {					\
+			{ .offset = -1 },				\
+			{ .offset = -1 },				\
+			{ .offset = -1 },				\
+			{ .offset = -1 },				\
+		},							\
+		.drv		= {					\
+			{ .drv_type = drv0, .offset = -1 },		\
+			{ .drv_type = drv1, .offset = -1 },		\
+			{ .drv_type = drv2, .offset = -1 },		\
+			{ .drv_type = drv3, .offset = -1 },		\
+		},							\
+		.pull_type[0] = pull0,					\
+		.pull_type[1] = pull1,					\
+		.pull_type[2] = pull2,					\
+		.pull_type[3] = pull3,					\
+	}
+
+#define PIN_BANK_IOMUX_DRV_FLAGS_OFFSET(id, pins, label, iom0, iom1,	\
+					iom2, iom3, drv0, drv1, drv2,	\
+					drv3, offset0, offset1,		\
+					offset2, offset3)		\
+	{								\
+		.bank_num	= id,					\
+		.nr_pins	= pins,					\
+		.name		= label,				\
+		.iomux		= {					\
+			{ .type = iom0, .offset = -1 },			\
+			{ .type = iom1, .offset = -1 },			\
+			{ .type = iom2, .offset = -1 },			\
+			{ .type = iom3, .offset = -1 },			\
+		},							\
+		.drv		= {					\
+			{ .drv_type = drv0, .offset = offset0 },	\
+			{ .drv_type = drv1, .offset = offset1 },	\
+			{ .drv_type = drv2, .offset = offset2 },	\
+			{ .drv_type = drv3, .offset = offset3 },	\
+		},							\
+	}
+
+#define PIN_BANK_IOMUX_FLAGS_DRV_FLAGS_OFFSET_PULL_FLAGS(id, pins,	\
+					      label, iom0, iom1, iom2,  \
+					      iom3, drv0, drv1, drv2,   \
+					      drv3, offset0, offset1,   \
+					      offset2, offset3, pull0,  \
+					      pull1, pull2, pull3)	\
+	{								\
+		.bank_num	= id,					\
+		.nr_pins	= pins,					\
+		.name		= label,				\
+		.iomux		= {					\
+			{ .type = iom0, .offset = -1 },			\
+			{ .type = iom1, .offset = -1 },			\
+			{ .type = iom2, .offset = -1 },			\
+			{ .type = iom3, .offset = -1 },			\
+		},							\
+		.drv		= {					\
+			{ .drv_type = drv0, .offset = offset0 },	\
+			{ .drv_type = drv1, .offset = offset1 },	\
+			{ .drv_type = drv2, .offset = offset2 },	\
+			{ .drv_type = drv3, .offset = offset3 },	\
+		},							\
+		.pull_type[0] = pull0,					\
+		.pull_type[1] = pull1,					\
+		.pull_type[2] = pull2,					\
+		.pull_type[3] = pull3,					\
+	}
+
+/**
+ * struct rockchip_mux_recalced_data: represent a pin iomux data.
+ * @num: bank number.
+ * @pin: pin number.
+ * @bit: index at register.
+ * @reg: register offset.
+ * @mask: mask bit
+ */
+struct rockchip_mux_recalced_data {
+	u8 num;
+	u8 pin;
+	u32 reg;
+	u8 bit;
+	u8 mask;
+};
+
+/**
+ * struct rockchip_mux_recalced_data: represent a pin iomux data.
+ * @bank_num: bank number.
+ * @pin: index at register or used to calc index.
+ * @func: the min pin.
+ * @route_offset: the max pin.
+ * @route_val: the register offset.
+ */
+struct rockchip_mux_route_data {
+	u8 bank_num;
+	u8 pin;
+	u8 func;
+	u32 route_offset;
+	u32 route_val;
+};
+
+/**
+ */
+struct rockchip_pin_ctrl {
+	struct rockchip_pin_bank	*pin_banks;
+	u32				nr_banks;
+	u32				nr_pins;
+	char				*label;
+	enum rockchip_pinctrl_type	type;
+	int				grf_mux_offset;
+	int				pmu_mux_offset;
+	int				grf_drv_offset;
+	int				pmu_drv_offset;
+	struct rockchip_mux_recalced_data *iomux_recalced;
+	u32				niomux_recalced;
+	struct rockchip_mux_route_data *iomux_routes;
+	u32				niomux_routes;
+
+	void	(*pull_calc_reg)(struct rockchip_pin_bank *bank,
+				 int pin_num, struct regmap **regmap,
+				 int *reg, u8 *bit);
+	void	(*drv_calc_reg)(struct rockchip_pin_bank *bank,
+				int pin_num, struct regmap **regmap,
+				int *reg, u8 *bit);
+	int	(*schmitt_calc_reg)(struct rockchip_pin_bank *bank,
+				    int pin_num, struct regmap **regmap,
+				    int *reg, u8 *bit);
+};
+
+/**
+ */
+struct rockchip_pinctrl_priv {
+	struct rockchip_pin_ctrl	*ctrl;
+	struct regmap			*regmap_base;
+	struct regmap			*regmap_pmu;
+
+};
+
+static int rockchip_verify_config(struct udevice *dev, u32 bank, u32 pin)
+{
+	struct rockchip_pinctrl_priv *priv = dev_get_priv(dev);
+	struct rockchip_pin_ctrl *ctrl = priv->ctrl;
+
+	if (bank >= ctrl->nr_banks) {
+		debug("pin conf bank %d >= nbanks %d\n", bank, ctrl->nr_banks);
+		return -EINVAL;
+	}
+
+	if (pin >= MAX_ROCKCHIP_GPIO_PER_BANK) {
+		debug("pin conf pin %d >= %d\n", pin,
+		      MAX_ROCKCHIP_GPIO_PER_BANK);
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static struct rockchip_mux_recalced_data rv1108_mux_recalced_data[] = {
+	{
+		.num = 1,
+		.pin = 0,
+		.reg = 0x418,
+		.bit = 0,
+		.mask = 0x3
+	}, {
+		.num = 1,
+		.pin = 1,
+		.reg = 0x418,
+		.bit = 2,
+		.mask = 0x3
+	}, {
+		.num = 1,
+		.pin = 2,
+		.reg = 0x418,
+		.bit = 4,
+		.mask = 0x3
+	}, {
+		.num = 1,
+		.pin = 3,
+		.reg = 0x418,
+		.bit = 6,
+		.mask = 0x3
+	}, {
+		.num = 1,
+		.pin = 4,
+		.reg = 0x418,
+		.bit = 8,
+		.mask = 0x3
+	}, {
+		.num = 1,
+		.pin = 5,
+		.reg = 0x418,
+		.bit = 10,
+		.mask = 0x3
+	}, {
+		.num = 1,
+		.pin = 6,
+		.reg = 0x418,
+		.bit = 12,
+		.mask = 0x3
+	}, {
+		.num = 1,
+		.pin = 7,
+		.reg = 0x418,
+		.bit = 14,
+		.mask = 0x3
+	}, {
+		.num = 1,
+		.pin = 8,
+		.reg = 0x41c,
+		.bit = 0,
+		.mask = 0x3
+	}, {
+		.num = 1,
+		.pin = 9,
+		.reg = 0x41c,
+		.bit = 2,
+		.mask = 0x3
+	},
+};
+
+static  struct rockchip_mux_recalced_data rk3128_mux_recalced_data[] = {
+	{
+		.num = 2,
+		.pin = 20,
+		.reg = 0xe8,
+		.bit = 0,
+		.mask = 0x7
+	}, {
+		.num = 2,
+		.pin = 21,
+		.reg = 0xe8,
+		.bit = 4,
+		.mask = 0x7
+	}, {
+		.num = 2,
+		.pin = 22,
+		.reg = 0xe8,
+		.bit = 8,
+		.mask = 0x7
+	}, {
+		.num = 2,
+		.pin = 23,
+		.reg = 0xe8,
+		.bit = 12,
+		.mask = 0x7
+	}, {
+		.num = 2,
+		.pin = 24,
+		.reg = 0xd4,
+		.bit = 12,
+		.mask = 0x7
+	},
+};
+
+static struct rockchip_mux_recalced_data rk3328_mux_recalced_data[] = {
+	{
+		.num = 2,
+		.pin = 12,
+		.reg = 0x24,
+		.bit = 8,
+		.mask = 0x3
+	}, {
+		.num = 2,
+		.pin = 15,
+		.reg = 0x28,
+		.bit = 0,
+		.mask = 0x7
+	}, {
+		.num = 2,
+		.pin = 23,
+		.reg = 0x30,
+		.bit = 14,
+		.mask = 0x3
+	},
+};
+
+static void rockchip_get_recalced_mux(struct rockchip_pin_bank *bank, int pin,
+				      int *reg, u8 *bit, int *mask)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	struct rockchip_pin_ctrl *ctrl = priv->ctrl;
+	struct rockchip_mux_recalced_data *data;
+	int i;
+
+	for (i = 0; i < ctrl->niomux_recalced; i++) {
+		data = &ctrl->iomux_recalced[i];
+		if (data->num == bank->bank_num &&
+		    data->pin == pin)
+			break;
+	}
+
+	if (i >= ctrl->niomux_recalced)
+		return;
+
+	*reg = data->reg;
+	*mask = data->mask;
+	*bit = data->bit;
+}
+
+static struct rockchip_mux_route_data px30_mux_route_data[] = {
+	{
+		/* cif-d2m0 */
+		.bank_num = 2,
+		.pin = 0,
+		.func = 1,
+		.route_offset = 0x184,
+		.route_val = BIT(16 + 7),
+	}, {
+		/* cif-d2m1 */
+		.bank_num = 3,
+		.pin = 3,
+		.func = 3,
+		.route_offset = 0x184,
+		.route_val = BIT(16 + 7) | BIT(7),
+	}, {
+		/* pdm-m0 */
+		.bank_num = 3,
+		.pin = 22,
+		.func = 2,
+		.route_offset = 0x184,
+		.route_val = BIT(16 + 8),
+	}, {
+		/* pdm-m1 */
+		.bank_num = 2,
+		.pin = 22,
+		.func = 1,
+		.route_offset = 0x184,
+		.route_val = BIT(16 + 8) | BIT(8),
+	}, {
+		/* uart2-rxm0 */
+		.bank_num = 1,
+		.pin = 26,
+		.func = 2,
+		.route_offset = 0x184,
+		.route_val = BIT(16 + 9),
+	}, {
+		/* uart2-rxm1 */
+		.bank_num = 2,
+		.pin = 14,
+		.func = 2,
+		.route_offset = 0x184,
+		.route_val = BIT(16 + 9) | BIT(9),
+	}, {
+		/* uart3-rxm0 */
+		.bank_num = 0,
+		.pin = 17,
+		.func = 2,
+		.route_offset = 0x184,
+		.route_val = BIT(16 + 10),
+	}, {
+		/* uart3-rxm1 */
+		.bank_num = 1,
+		.pin = 13,
+		.func = 2,
+		.route_offset = 0x184,
+		.route_val = BIT(16 + 10) | BIT(10),
+	},
+};
+
+static struct rockchip_mux_route_data rk3128_mux_route_data[] = {
+	{
+		/* spi-0 */
+		.bank_num = 1,
+		.pin = 10,
+		.func = 1,
+		.route_offset = 0x144,
+		.route_val = BIT(16 + 3) | BIT(16 + 4),
+	}, {
+		/* spi-1 */
+		.bank_num = 1,
+		.pin = 27,
+		.func = 3,
+		.route_offset = 0x144,
+		.route_val = BIT(16 + 3) | BIT(16 + 4) | BIT(3),
+	}, {
+		/* spi-2 */
+		.bank_num = 0,
+		.pin = 13,
+		.func = 2,
+		.route_offset = 0x144,
+		.route_val = BIT(16 + 3) | BIT(16 + 4) | BIT(4),
+	}, {
+		/* i2s-0 */
+		.bank_num = 1,
+		.pin = 5,
+		.func = 1,
+		.route_offset = 0x144,
+		.route_val = BIT(16 + 5),
+	}, {
+		/* i2s-1 */
+		.bank_num = 0,
+		.pin = 14,
+		.func = 1,
+		.route_offset = 0x144,
+		.route_val = BIT(16 + 5) | BIT(5),
+	}, {
+		/* emmc-0 */
+		.bank_num = 1,
+		.pin = 22,
+		.func = 2,
+		.route_offset = 0x144,
+		.route_val = BIT(16 + 6),
+	}, {
+		/* emmc-1 */
+		.bank_num = 2,
+		.pin = 4,
+		.func = 2,
+		.route_offset = 0x144,
+		.route_val = BIT(16 + 6) | BIT(6),
+	},
+};
+
+static struct rockchip_mux_route_data rk3228_mux_route_data[] = {
+	{
+		/* pwm0-0 */
+		.bank_num = 0,
+		.pin = 26,
+		.func = 1,
+		.route_offset = 0x50,
+		.route_val = BIT(16),
+	}, {
+		/* pwm0-1 */
+		.bank_num = 3,
+		.pin = 21,
+		.func = 1,
+		.route_offset = 0x50,
+		.route_val = BIT(16) | BIT(0),
+	}, {
+		/* pwm1-0 */
+		.bank_num = 0,
+		.pin = 27,
+		.func = 1,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 1),
+	}, {
+		/* pwm1-1 */
+		.bank_num = 0,
+		.pin = 30,
+		.func = 2,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 1) | BIT(1),
+	}, {
+		/* pwm2-0 */
+		.bank_num = 0,
+		.pin = 28,
+		.func = 1,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 2),
+	}, {
+		/* pwm2-1 */
+		.bank_num = 1,
+		.pin = 12,
+		.func = 2,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 2) | BIT(2),
+	}, {
+		/* pwm3-0 */
+		.bank_num = 3,
+		.pin = 26,
+		.func = 1,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 3),
+	}, {
+		/* pwm3-1 */
+		.bank_num = 1,
+		.pin = 11,
+		.func = 2,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 3) | BIT(3),
+	}, {
+		/* sdio-0_d0 */
+		.bank_num = 1,
+		.pin = 1,
+		.func = 1,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 4),
+	}, {
+		/* sdio-1_d0 */
+		.bank_num = 3,
+		.pin = 2,
+		.func = 1,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 4) | BIT(4),
+	}, {
+		/* spi-0_rx */
+		.bank_num = 0,
+		.pin = 13,
+		.func = 2,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 5),
+	}, {
+		/* spi-1_rx */
+		.bank_num = 2,
+		.pin = 0,
+		.func = 2,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 5) | BIT(5),
+	}, {
+		/* emmc-0_cmd */
+		.bank_num = 1,
+		.pin = 22,
+		.func = 2,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 7),
+	}, {
+		/* emmc-1_cmd */
+		.bank_num = 2,
+		.pin = 4,
+		.func = 2,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 7) | BIT(7),
+	}, {
+		/* uart2-0_rx */
+		.bank_num = 1,
+		.pin = 19,
+		.func = 2,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 8),
+	}, {
+		/* uart2-1_rx */
+		.bank_num = 1,
+		.pin = 10,
+		.func = 2,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 8) | BIT(8),
+	}, {
+		/* uart1-0_rx */
+		.bank_num = 1,
+		.pin = 10,
+		.func = 1,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 11),
+	}, {
+		/* uart1-1_rx */
+		.bank_num = 3,
+		.pin = 13,
+		.func = 1,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 11) | BIT(11),
+	},
+};
+
+static struct rockchip_mux_route_data rk3288_mux_route_data[] = {
+	{
+		/* edphdmi_cecinoutt1 */
+		.bank_num = 7,
+		.pin = 16,
+		.func = 2,
+		.route_offset = 0x264,
+		.route_val = BIT(16 + 12) | BIT(12),
+	}, {
+		/* edphdmi_cecinout */
+		.bank_num = 7,
+		.pin = 23,
+		.func = 4,
+		.route_offset = 0x264,
+		.route_val = BIT(16 + 12),
+	},
+};
+
+static struct rockchip_mux_route_data rk3328_mux_route_data[] = {
+	{
+		/* uart2dbg_rxm0 */
+		.bank_num = 1,
+		.pin = 1,
+		.func = 2,
+		.route_offset = 0x50,
+		.route_val = BIT(16) | BIT(16 + 1),
+	}, {
+		/* uart2dbg_rxm1 */
+		.bank_num = 2,
+		.pin = 1,
+		.func = 1,
+		.route_offset = 0x50,
+		.route_val = BIT(16) | BIT(16 + 1) | BIT(0),
+	}, {
+		/* gmac-m1_rxd0 */
+		.bank_num = 1,
+		.pin = 11,
+		.func = 2,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 2) | BIT(2),
+	}, {
+		/* gmac-m1-optimized_rxd3 */
+		.bank_num = 1,
+		.pin = 14,
+		.func = 2,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 10) | BIT(10),
+	}, {
+		/* pdm_sdi0m0 */
+		.bank_num = 2,
+		.pin = 19,
+		.func = 2,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 3),
+	}, {
+		/* pdm_sdi0m1 */
+		.bank_num = 1,
+		.pin = 23,
+		.func = 3,
+		.route_offset = 0x50,
+		.route_val =  BIT(16 + 3) | BIT(3),
+	}, {
+		/* spi_rxdm2 */
+		.bank_num = 3,
+		.pin = 2,
+		.func = 4,
+		.route_offset = 0x50,
+		.route_val =  BIT(16 + 4) | BIT(16 + 5) | BIT(5),
+	}, {
+		/* i2s2_sdim0 */
+		.bank_num = 1,
+		.pin = 24,
+		.func = 1,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 6),
+	}, {
+		/* i2s2_sdim1 */
+		.bank_num = 3,
+		.pin = 2,
+		.func = 6,
+		.route_offset = 0x50,
+		.route_val =  BIT(16 + 6) | BIT(6),
+	}, {
+		/* card_iom1 */
+		.bank_num = 2,
+		.pin = 22,
+		.func = 3,
+		.route_offset = 0x50,
+		.route_val =  BIT(16 + 7) | BIT(7),
+	}, {
+		/* tsp_d5m1 */
+		.bank_num = 2,
+		.pin = 16,
+		.func = 3,
+		.route_offset = 0x50,
+		.route_val =  BIT(16 + 8) | BIT(8),
+	}, {
+		/* cif_data5m1 */
+		.bank_num = 2,
+		.pin = 16,
+		.func = 4,
+		.route_offset = 0x50,
+		.route_val =  BIT(16 + 9) | BIT(9),
+	},
+};
+
+static struct rockchip_mux_route_data rk3399_mux_route_data[] = {
+	{
+		/* uart2dbga_rx */
+		.bank_num = 4,
+		.pin = 8,
+		.func = 2,
+		.route_offset = 0xe21c,
+		.route_val = BIT(16 + 10) | BIT(16 + 11),
+	}, {
+		/* uart2dbgb_rx */
+		.bank_num = 4,
+		.pin = 16,
+		.func = 2,
+		.route_offset = 0xe21c,
+		.route_val = BIT(16 + 10) | BIT(16 + 11) | BIT(10),
+	}, {
+		/* uart2dbgc_rx */
+		.bank_num = 4,
+		.pin = 19,
+		.func = 1,
+		.route_offset = 0xe21c,
+		.route_val = BIT(16 + 10) | BIT(16 + 11) | BIT(11),
+	}, {
+		/* pcie_clkreqn */
+		.bank_num = 2,
+		.pin = 26,
+		.func = 2,
+		.route_offset = 0xe21c,
+		.route_val = BIT(16 + 14),
+	}, {
+		/* pcie_clkreqnb */
+		.bank_num = 4,
+		.pin = 24,
+		.func = 1,
+		.route_offset = 0xe21c,
+		.route_val = BIT(16 + 14) | BIT(14),
+	},
+};
+
+static bool rockchip_get_mux_route(struct rockchip_pin_bank *bank, int pin,
+				   int mux, u32 *reg, u32 *value)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	struct rockchip_pin_ctrl *ctrl = priv->ctrl;
+	struct rockchip_mux_route_data *data;
+	int i;
+
+	for (i = 0; i < ctrl->niomux_routes; i++) {
+		data = &ctrl->iomux_routes[i];
+		if ((data->bank_num == bank->bank_num) &&
+		    (data->pin == pin) && (data->func == mux))
+			break;
+	}
+
+	if (i >= ctrl->niomux_routes)
+		return false;
+
+	*reg = data->route_offset;
+	*value = data->route_val;
+
+	return true;
+}
+
+static int rockchip_get_mux(struct rockchip_pin_bank *bank, int pin)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	int iomux_num = (pin / 8);
+	struct regmap *regmap;
+	unsigned int val;
+	int reg, ret, mask, mux_type;
+	u8 bit;
+
+	if (iomux_num > 3)
+		return -EINVAL;
+
+	if (bank->iomux[iomux_num].type & IOMUX_UNROUTED) {
+		debug("pin %d is unrouted\n", pin);
+		return -EINVAL;
+	}
+
+	if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY)
+		return RK_FUNC_GPIO;
+
+	regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
+				? priv->regmap_pmu : priv->regmap_base;
+
+	/* get basic quadrupel of mux registers and the correct reg inside */
+	mux_type = bank->iomux[iomux_num].type;
+	reg = bank->iomux[iomux_num].offset;
+	if (mux_type & IOMUX_WIDTH_4BIT) {
+		if ((pin % 8) >= 4)
+			reg += 0x4;
+		bit = (pin % 4) * 4;
+		mask = 0xf;
+	} else if (mux_type & IOMUX_WIDTH_3BIT) {
+		if ((pin % 8) >= 5)
+			reg += 0x4;
+		bit = (pin % 8 % 5) * 3;
+		mask = 0x7;
+	} else {
+		bit = (pin % 8) * 2;
+		mask = 0x3;
+	}
+
+	if (bank->recalced_mask & BIT(pin))
+		rockchip_get_recalced_mux(bank, pin, &reg, &bit, &mask);
+
+	ret = regmap_read(regmap, reg, &val);
+	if (ret)
+		return ret;
+
+	return ((val >> bit) & mask);
+}
+
+static int rockchip_pinctrl_get_gpio_mux(struct udevice *dev, int banknum,
+					 int index)
+{	struct rockchip_pinctrl_priv *priv = dev_get_priv(dev);
+	struct rockchip_pin_ctrl *ctrl = priv->ctrl;
+
+	return rockchip_get_mux(&ctrl->pin_banks[banknum], index);
+}
+
+static int rockchip_verify_mux(struct rockchip_pin_bank *bank,
+			       int pin, int mux)
+{
+	int iomux_num = (pin / 8);
+
+	if (iomux_num > 3)
+		return -EINVAL;
+
+	if (bank->iomux[iomux_num].type & IOMUX_UNROUTED) {
+		debug("pin %d is unrouted\n", pin);
+		return -EINVAL;
+	}
+
+	if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY) {
+		if (mux != IOMUX_GPIO_ONLY) {
+			debug("pin %d only supports a gpio mux\n", pin);
+			return -ENOTSUPP;
+		}
+	}
+
+	return 0;
+}
+
+/*
+ * Set a new mux function for a pin.
+ *
+ * The register is divided into the upper and lower 16 bit. When changing
+ * a value, the previous register value is not read and changed. Instead
+ * it seems the changed bits are marked in the upper 16 bit, while the
+ * changed value gets set in the same offset in the lower 16 bit.
+ * All pin settings seem to be 2 bit wide in both the upper and lower
+ * parts.
+ * @bank: pin bank to change
+ * @pin: pin to change
+ * @mux: new mux function to set
+ */
+static int rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	int iomux_num = (pin / 8);
+	struct regmap *regmap;
+	int reg, ret, mask, mux_type;
+	u8 bit;
+	u32 data, route_reg, route_val;
+
+	ret = rockchip_verify_mux(bank, pin, mux);
+	if (ret < 0)
+		return ret;
+
+	if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY)
+		return 0;
+
+	debug("setting mux of GPIO%d-%d to %d\n", bank->bank_num, pin, mux);
+
+	regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
+				? priv->regmap_pmu : priv->regmap_base;
+
+	/* get basic quadrupel of mux registers and the correct reg inside */
+	mux_type = bank->iomux[iomux_num].type;
+	reg = bank->iomux[iomux_num].offset;
+	if (mux_type & IOMUX_WIDTH_4BIT) {
+		if ((pin % 8) >= 4)
+			reg += 0x4;
+		bit = (pin % 4) * 4;
+		mask = 0xf;
+	} else if (mux_type & IOMUX_WIDTH_3BIT) {
+		if ((pin % 8) >= 5)
+			reg += 0x4;
+		bit = (pin % 8 % 5) * 3;
+		mask = 0x7;
+	} else {
+		bit = (pin % 8) * 2;
+		mask = 0x3;
+	}
+
+	if (bank->recalced_mask & BIT(pin))
+		rockchip_get_recalced_mux(bank, pin, &reg, &bit, &mask);
+
+	if (bank->route_mask & BIT(pin)) {
+		if (rockchip_get_mux_route(bank, pin, mux, &route_reg,
+					   &route_val)) {
+			ret = regmap_write(regmap, route_reg, route_val);
+			if (ret)
+				return ret;
+		}
+	}
+
+	data = (mask << (bit + 16));
+	data |= (mux & mask) << bit;
+	ret = regmap_write(regmap, reg, data);
+
+	return ret;
+}
+
+#define PX30_PULL_PMU_OFFSET		0x10
+#define PX30_PULL_GRF_OFFSET		0x60
+#define PX30_PULL_BITS_PER_PIN		2
+#define PX30_PULL_PINS_PER_REG		8
+#define PX30_PULL_BANK_STRIDE		16
+
+static void px30_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
+				       int pin_num, struct regmap **regmap,
+				       int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	/* The first 32 pins of the first bank are located in PMU */
+	if (bank->bank_num == 0) {
+		*regmap = priv->regmap_pmu;
+		*reg = PX30_PULL_PMU_OFFSET;
+	} else {
+		*regmap = priv->regmap_base;
+		*reg = PX30_PULL_GRF_OFFSET;
+
+		/* correct the offset, as we're starting with the 2nd bank */
+		*reg -= 0x10;
+		*reg += bank->bank_num * PX30_PULL_BANK_STRIDE;
+	}
+
+	*reg += ((pin_num / PX30_PULL_PINS_PER_REG) * 4);
+	*bit = (pin_num % PX30_PULL_PINS_PER_REG);
+	*bit *= PX30_PULL_BITS_PER_PIN;
+}
+
+#define PX30_DRV_PMU_OFFSET		0x20
+#define PX30_DRV_GRF_OFFSET		0xf0
+#define PX30_DRV_BITS_PER_PIN		2
+#define PX30_DRV_PINS_PER_REG		8
+#define PX30_DRV_BANK_STRIDE		16
+
+static void px30_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
+				      int pin_num, struct regmap **regmap,
+				      int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	/* The first 32 pins of the first bank are located in PMU */
+	if (bank->bank_num == 0) {
+		*regmap = priv->regmap_pmu;
+		*reg = PX30_DRV_PMU_OFFSET;
+	} else {
+		*regmap = priv->regmap_base;
+		*reg = PX30_DRV_GRF_OFFSET;
+
+		/* correct the offset, as we're starting with the 2nd bank */
+		*reg -= 0x10;
+		*reg += bank->bank_num * PX30_DRV_BANK_STRIDE;
+	}
+
+	*reg += ((pin_num / PX30_DRV_PINS_PER_REG) * 4);
+	*bit = (pin_num % PX30_DRV_PINS_PER_REG);
+	*bit *= PX30_DRV_BITS_PER_PIN;
+}
+
+#define PX30_SCHMITT_PMU_OFFSET			0x38
+#define PX30_SCHMITT_GRF_OFFSET			0xc0
+#define PX30_SCHMITT_PINS_PER_PMU_REG		16
+#define PX30_SCHMITT_BANK_STRIDE		16
+#define PX30_SCHMITT_PINS_PER_GRF_REG		8
+
+static int px30_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank,
+					 int pin_num,
+					 struct regmap **regmap,
+					 int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	int pins_per_reg;
+
+	if (bank->bank_num == 0) {
+		*regmap = priv->regmap_pmu;
+		*reg = PX30_SCHMITT_PMU_OFFSET;
+		pins_per_reg = PX30_SCHMITT_PINS_PER_PMU_REG;
+	} else {
+		*regmap = priv->regmap_base;
+		*reg = PX30_SCHMITT_GRF_OFFSET;
+		pins_per_reg = PX30_SCHMITT_PINS_PER_GRF_REG;
+		*reg += (bank->bank_num - 1) * PX30_SCHMITT_BANK_STRIDE;
+	}
+	*reg += ((pin_num / pins_per_reg) * 4);
+	*bit = pin_num % pins_per_reg;
+
+	return 0;
+}
+
+#define RV1108_PULL_PMU_OFFSET		0x10
+#define RV1108_PULL_OFFSET		0x110
+#define RV1108_PULL_PINS_PER_REG	8
+#define RV1108_PULL_BITS_PER_PIN	2
+#define RV1108_PULL_BANK_STRIDE		16
+
+static void rv1108_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
+					 int pin_num, struct regmap **regmap,
+					 int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	/* The first 24 pins of the first bank are located in PMU */
+	if (bank->bank_num == 0) {
+		*regmap = priv->regmap_pmu;
+		*reg = RV1108_PULL_PMU_OFFSET;
+	} else {
+		*reg = RV1108_PULL_OFFSET;
+		*regmap = priv->regmap_base;
+		/* correct the offset, as we're starting with the 2nd bank */
+		*reg -= 0x10;
+		*reg += bank->bank_num * RV1108_PULL_BANK_STRIDE;
+	}
+
+	*reg += ((pin_num / RV1108_PULL_PINS_PER_REG) * 4);
+	*bit = (pin_num % RV1108_PULL_PINS_PER_REG);
+	*bit *= RV1108_PULL_BITS_PER_PIN;
+}
+
+#define RV1108_DRV_PMU_OFFSET		0x20
+#define RV1108_DRV_GRF_OFFSET		0x210
+#define RV1108_DRV_BITS_PER_PIN		2
+#define RV1108_DRV_PINS_PER_REG		8
+#define RV1108_DRV_BANK_STRIDE		16
+
+static void rv1108_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
+					int pin_num, struct regmap **regmap,
+					int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	/* The first 24 pins of the first bank are located in PMU */
+	if (bank->bank_num == 0) {
+		*regmap = priv->regmap_pmu;
+		*reg = RV1108_DRV_PMU_OFFSET;
+	} else {
+		*regmap = priv->regmap_base;
+		*reg = RV1108_DRV_GRF_OFFSET;
+
+		/* correct the offset, as we're starting with the 2nd bank */
+		*reg -= 0x10;
+		*reg += bank->bank_num * RV1108_DRV_BANK_STRIDE;
+	}
+
+	*reg += ((pin_num / RV1108_DRV_PINS_PER_REG) * 4);
+	*bit = pin_num % RV1108_DRV_PINS_PER_REG;
+	*bit *= RV1108_DRV_BITS_PER_PIN;
+}
+
+#define RV1108_SCHMITT_PMU_OFFSET		0x30
+#define RV1108_SCHMITT_GRF_OFFSET		0x388
+#define RV1108_SCHMITT_BANK_STRIDE		8
+#define RV1108_SCHMITT_PINS_PER_GRF_REG		16
+#define RV1108_SCHMITT_PINS_PER_PMU_REG		8
+
+static int rv1108_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank,
+					   int pin_num,
+					   struct regmap **regmap,
+					   int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	int pins_per_reg;
+
+	if (bank->bank_num == 0) {
+		*regmap = priv->regmap_pmu;
+		*reg = RV1108_SCHMITT_PMU_OFFSET;
+		pins_per_reg = RV1108_SCHMITT_PINS_PER_PMU_REG;
+	} else {
+		*regmap = priv->regmap_base;
+		*reg = RV1108_SCHMITT_GRF_OFFSET;
+		pins_per_reg = RV1108_SCHMITT_PINS_PER_GRF_REG;
+		*reg += (bank->bank_num  - 1) * RV1108_SCHMITT_BANK_STRIDE;
+	}
+	*reg += ((pin_num / pins_per_reg) * 4);
+	*bit = pin_num % pins_per_reg;
+
+	return 0;
+}
+
+#define RK2928_PULL_OFFSET		0x118
+#define RK2928_PULL_PINS_PER_REG	16
+#define RK2928_PULL_BANK_STRIDE		8
+
+static void rk2928_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
+					 int pin_num, struct regmap **regmap,
+					 int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	*regmap = priv->regmap_base;
+	*reg = RK2928_PULL_OFFSET;
+	*reg += bank->bank_num * RK2928_PULL_BANK_STRIDE;
+	*reg += (pin_num / RK2928_PULL_PINS_PER_REG) * 4;
+
+	*bit = pin_num % RK2928_PULL_PINS_PER_REG;
+};
+
+#define RK3128_PULL_OFFSET	0x118
+
+static void rk3128_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
+					 int pin_num, struct regmap **regmap,
+					 int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	*regmap = priv->regmap_base;
+	*reg = RK3128_PULL_OFFSET;
+	*reg += bank->bank_num * RK2928_PULL_BANK_STRIDE;
+	*reg += ((pin_num / RK2928_PULL_PINS_PER_REG) * 4);
+
+	*bit = pin_num % RK2928_PULL_PINS_PER_REG;
+}
+
+#define RK3188_PULL_OFFSET		0x164
+#define RK3188_PULL_BITS_PER_PIN	2
+#define RK3188_PULL_PINS_PER_REG	8
+#define RK3188_PULL_BANK_STRIDE		16
+#define RK3188_PULL_PMU_OFFSET		0x64
+
+static void rk3188_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
+					 int pin_num, struct regmap **regmap,
+					 int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	/* The first 12 pins of the first bank are located elsewhere */
+	if (bank->bank_num == 0 && pin_num < 12) {
+		*regmap = priv->regmap_pmu;
+		*reg = RK3188_PULL_PMU_OFFSET;
+
+		*reg += ((pin_num / RK3188_PULL_PINS_PER_REG) * 4);
+		*bit = pin_num % RK3188_PULL_PINS_PER_REG;
+		*bit *= RK3188_PULL_BITS_PER_PIN;
+	} else {
+		*regmap = priv->regmap_base;
+		*reg = RK3188_PULL_OFFSET;
+
+		/* correct the offset, as it is the 2nd pull register */
+		*reg -= 4;
+		*reg += bank->bank_num * RK3188_PULL_BANK_STRIDE;
+		*reg += ((pin_num / RK3188_PULL_PINS_PER_REG) * 4);
+
+		/*
+		 * The bits in these registers have an inverse ordering
+		 * with the lowest pin being in bits 15:14 and the highest
+		 * pin in bits 1:0
+		 */
+		*bit = 7 - (pin_num % RK3188_PULL_PINS_PER_REG);
+		*bit *= RK3188_PULL_BITS_PER_PIN;
+	}
+}
+
+#define RK3288_PULL_OFFSET		0x140
+static void rk3288_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
+					 int pin_num, struct regmap **regmap,
+					 int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	/* The first 24 pins of the first bank are located in PMU */
+	if (bank->bank_num == 0) {
+		*regmap = priv->regmap_pmu;
+		*reg = RK3188_PULL_PMU_OFFSET;
+
+		*reg += ((pin_num / RK3188_PULL_PINS_PER_REG) * 4);
+		*bit = pin_num % RK3188_PULL_PINS_PER_REG;
+		*bit *= RK3188_PULL_BITS_PER_PIN;
+	} else {
+		*regmap = priv->regmap_base;
+		*reg = RK3288_PULL_OFFSET;
+
+		/* correct the offset, as we're starting with the 2nd bank */
+		*reg -= 0x10;
+		*reg += bank->bank_num * RK3188_PULL_BANK_STRIDE;
+		*reg += ((pin_num / RK3188_PULL_PINS_PER_REG) * 4);
+
+		*bit = (pin_num % RK3188_PULL_PINS_PER_REG);
+		*bit *= RK3188_PULL_BITS_PER_PIN;
+	}
+}
+
+#define RK3288_DRV_PMU_OFFSET		0x70
+#define RK3288_DRV_GRF_OFFSET		0x1c0
+#define RK3288_DRV_BITS_PER_PIN		2
+#define RK3288_DRV_PINS_PER_REG		8
+#define RK3288_DRV_BANK_STRIDE		16
+
+static void rk3288_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
+					int pin_num, struct regmap **regmap,
+					int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	/* The first 24 pins of the first bank are located in PMU */
+	if (bank->bank_num == 0) {
+		*regmap = priv->regmap_pmu;
+		*reg = RK3288_DRV_PMU_OFFSET;
+
+		*reg += ((pin_num / RK3288_DRV_PINS_PER_REG) * 4);
+		*bit = pin_num % RK3288_DRV_PINS_PER_REG;
+		*bit *= RK3288_DRV_BITS_PER_PIN;
+	} else {
+		*regmap = priv->regmap_base;
+		*reg = RK3288_DRV_GRF_OFFSET;
+
+		/* correct the offset, as we're starting with the 2nd bank */
+		*reg -= 0x10;
+		*reg += bank->bank_num * RK3288_DRV_BANK_STRIDE;
+		*reg += ((pin_num / RK3288_DRV_PINS_PER_REG) * 4);
+
+		*bit = (pin_num % RK3288_DRV_PINS_PER_REG);
+		*bit *= RK3288_DRV_BITS_PER_PIN;
+	}
+}
+
+#define RK3228_PULL_OFFSET		0x100
+
+static void rk3228_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
+					 int pin_num, struct regmap **regmap,
+					 int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	*regmap = priv->regmap_base;
+	*reg = RK3228_PULL_OFFSET;
+	*reg += bank->bank_num * RK3188_PULL_BANK_STRIDE;
+	*reg += ((pin_num / RK3188_PULL_PINS_PER_REG) * 4);
+
+	*bit = (pin_num % RK3188_PULL_PINS_PER_REG);
+	*bit *= RK3188_PULL_BITS_PER_PIN;
+}
+
+#define RK3228_DRV_GRF_OFFSET		0x200
+
+static void rk3228_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
+					int pin_num, struct regmap **regmap,
+					int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	*regmap = priv->regmap_base;
+	*reg = RK3228_DRV_GRF_OFFSET;
+	*reg += bank->bank_num * RK3288_DRV_BANK_STRIDE;
+	*reg += ((pin_num / RK3288_DRV_PINS_PER_REG) * 4);
+
+	*bit = (pin_num % RK3288_DRV_PINS_PER_REG);
+	*bit *= RK3288_DRV_BITS_PER_PIN;
+}
+
+#define RK3368_PULL_GRF_OFFSET		0x100
+#define RK3368_PULL_PMU_OFFSET		0x10
+
+static void rk3368_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
+					 int pin_num, struct regmap **regmap,
+					 int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	/* The first 32 pins of the first bank are located in PMU */
+	if (bank->bank_num == 0) {
+		*regmap = priv->regmap_pmu;
+		*reg = RK3368_PULL_PMU_OFFSET;
+
+		*reg += ((pin_num / RK3188_PULL_PINS_PER_REG) * 4);
+		*bit = pin_num % RK3188_PULL_PINS_PER_REG;
+		*bit *= RK3188_PULL_BITS_PER_PIN;
+	} else {
+		*regmap = priv->regmap_base;
+		*reg = RK3368_PULL_GRF_OFFSET;
+
+		/* correct the offset, as we're starting with the 2nd bank */
+		*reg -= 0x10;
+		*reg += bank->bank_num * RK3188_PULL_BANK_STRIDE;
+		*reg += ((pin_num / RK3188_PULL_PINS_PER_REG) * 4);
+
+		*bit = (pin_num % RK3188_PULL_PINS_PER_REG);
+		*bit *= RK3188_PULL_BITS_PER_PIN;
+	}
+}
+
+#define RK3368_DRV_PMU_OFFSET		0x20
+#define RK3368_DRV_GRF_OFFSET		0x200
+
+static void rk3368_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
+					int pin_num, struct regmap **regmap,
+					int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	/* The first 32 pins of the first bank are located in PMU */
+	if (bank->bank_num == 0) {
+		*regmap = priv->regmap_pmu;
+		*reg = RK3368_DRV_PMU_OFFSET;
+
+		*reg += ((pin_num / RK3288_DRV_PINS_PER_REG) * 4);
+		*bit = pin_num % RK3288_DRV_PINS_PER_REG;
+		*bit *= RK3288_DRV_BITS_PER_PIN;
+	} else {
+		*regmap = priv->regmap_base;
+		*reg = RK3368_DRV_GRF_OFFSET;
+
+		/* correct the offset, as we're starting with the 2nd bank */
+		*reg -= 0x10;
+		*reg += bank->bank_num * RK3288_DRV_BANK_STRIDE;
+		*reg += ((pin_num / RK3288_DRV_PINS_PER_REG) * 4);
+
+		*bit = (pin_num % RK3288_DRV_PINS_PER_REG);
+		*bit *= RK3288_DRV_BITS_PER_PIN;
+	}
+}
+
+#define RK3399_PULL_GRF_OFFSET		0xe040
+#define RK3399_PULL_PMU_OFFSET		0x40
+#define RK3399_DRV_3BITS_PER_PIN	3
+
+static void rk3399_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
+					 int pin_num, struct regmap **regmap,
+					 int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	/* The bank0:16 and bank1:32 pins are located in PMU */
+	if ((bank->bank_num == 0) || (bank->bank_num == 1)) {
+		*regmap = priv->regmap_pmu;
+		*reg = RK3399_PULL_PMU_OFFSET;
+
+		*reg += bank->bank_num * RK3188_PULL_BANK_STRIDE;
+
+		*reg += ((pin_num / RK3188_PULL_PINS_PER_REG) * 4);
+		*bit = pin_num % RK3188_PULL_PINS_PER_REG;
+		*bit *= RK3188_PULL_BITS_PER_PIN;
+	} else {
+		*regmap = priv->regmap_base;
+		*reg = RK3399_PULL_GRF_OFFSET;
+
+		/* correct the offset, as we're starting with the 3rd bank */
+		*reg -= 0x20;
+		*reg += bank->bank_num * RK3188_PULL_BANK_STRIDE;
+		*reg += ((pin_num / RK3188_PULL_PINS_PER_REG) * 4);
+
+		*bit = (pin_num % RK3188_PULL_PINS_PER_REG);
+		*bit *= RK3188_PULL_BITS_PER_PIN;
+	}
+}
+
+static void rk3399_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
+					int pin_num, struct regmap **regmap,
+					int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	int drv_num = (pin_num / 8);
+
+	/*  The bank0:16 and bank1:32 pins are located in PMU */
+	if ((bank->bank_num == 0) || (bank->bank_num == 1))
+		*regmap = priv->regmap_pmu;
+	else
+		*regmap = priv->regmap_base;
+
+	*reg = bank->drv[drv_num].offset;
+	if ((bank->drv[drv_num].drv_type == DRV_TYPE_IO_1V8_3V0_AUTO) ||
+	    (bank->drv[drv_num].drv_type == DRV_TYPE_IO_3V3_ONLY))
+		*bit = (pin_num % 8) * 3;
+	else
+		*bit = (pin_num % 8) * 2;
+}
+
+static int rockchip_perpin_drv_list[DRV_TYPE_MAX][8] = {
+	{ 2, 4, 8, 12, -1, -1, -1, -1 },
+	{ 3, 6, 9, 12, -1, -1, -1, -1 },
+	{ 5, 10, 15, 20, -1, -1, -1, -1 },
+	{ 4, 6, 8, 10, 12, 14, 16, 18 },
+	{ 4, 7, 10, 13, 16, 19, 22, 26 }
+};
+
+static int rockchip_set_drive_perpin(struct rockchip_pin_bank *bank,
+				     int pin_num, int strength)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	struct rockchip_pin_ctrl *ctrl = priv->ctrl;
+	struct regmap *regmap;
+	int reg, ret, i;
+	u32 data, rmask_bits, temp;
+	u8 bit;
+	int drv_type = bank->drv[pin_num / 8].drv_type;
+
+	debug("setting drive of GPIO%d-%d to %d\n", bank->bank_num,
+	      pin_num, strength);
+
+	ctrl->drv_calc_reg(bank, pin_num, &regmap, &reg, &bit);
+
+	ret = -EINVAL;
+	for (i = 0; i < ARRAY_SIZE(rockchip_perpin_drv_list[drv_type]); i++) {
+		if (rockchip_perpin_drv_list[drv_type][i] == strength) {
+			ret = i;
+			break;
+		} else if (rockchip_perpin_drv_list[drv_type][i] < 0) {
+			ret = rockchip_perpin_drv_list[drv_type][i];
+			break;
+		}
+	}
+
+	if (ret < 0) {
+		debug("unsupported driver strength %d\n", strength);
+		return ret;
+	}
+
+	switch (drv_type) {
+	case DRV_TYPE_IO_1V8_3V0_AUTO:
+	case DRV_TYPE_IO_3V3_ONLY:
+		rmask_bits = RK3399_DRV_3BITS_PER_PIN;
+		switch (bit) {
+		case 0 ... 12:
+			/* regular case, nothing to do */
+			break;
+		case 15:
+			/*
+			 * drive-strength offset is special, as it is spread
+			 * over 2 registers, the bit data[15] contains bit 0
+			 * of the value while temp[1:0] contains bits 2 and 1
+			 */
+			data = (ret & 0x1) << 15;
+			temp = (ret >> 0x1) & 0x3;
+
+			data |= BIT(31);
+			ret = regmap_write(regmap, reg, data);
+			if (ret)
+				return ret;
+
+			temp |= (0x3 << 16);
+			reg += 0x4;
+			ret = regmap_write(regmap, reg, temp);
+
+			return ret;
+		case 18 ... 21:
+			/* setting fully enclosed in the second register */
+			reg += 4;
+			bit -= 16;
+			break;
+		default:
+			debug("unsupported bit: %d for pinctrl drive type: %d\n",
+			      bit, drv_type);
+			return -EINVAL;
+		}
+		break;
+	case DRV_TYPE_IO_DEFAULT:
+	case DRV_TYPE_IO_1V8_OR_3V0:
+	case DRV_TYPE_IO_1V8_ONLY:
+		rmask_bits = RK3288_DRV_BITS_PER_PIN;
+		break;
+	default:
+		debug("unsupported pinctrl drive type: %d\n",
+		      drv_type);
+		return -EINVAL;
+	}
+
+	/* enable the write to the equivalent lower bits */
+	data = ((1 << rmask_bits) - 1) << (bit + 16);
+	data |= (ret << bit);
+
+	ret = regmap_write(regmap, reg, data);
+	return ret;
+}
+
+static int rockchip_pull_list[PULL_TYPE_MAX][4] = {
+	{
+		PIN_CONFIG_BIAS_DISABLE,
+		PIN_CONFIG_BIAS_PULL_UP,
+		PIN_CONFIG_BIAS_PULL_DOWN,
+		PIN_CONFIG_BIAS_BUS_HOLD
+	},
+	{
+		PIN_CONFIG_BIAS_DISABLE,
+		PIN_CONFIG_BIAS_PULL_DOWN,
+		PIN_CONFIG_BIAS_DISABLE,
+		PIN_CONFIG_BIAS_PULL_UP
+	},
+};
+
+static int rockchip_set_pull(struct rockchip_pin_bank *bank,
+			     int pin_num, int pull)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	struct rockchip_pin_ctrl *ctrl = priv->ctrl;
+	struct regmap *regmap;
+	int reg, ret, i, pull_type;
+	u8 bit;
+	u32 data;
+
+	debug("setting pull of GPIO%d-%d to %d\n", bank->bank_num,
+	      pin_num, pull);
+
+	/* rk3066b does support any pulls */
+	if (ctrl->type == RK3066B)
+		return pull ? -EINVAL : 0;
+
+	ctrl->pull_calc_reg(bank, pin_num, &regmap, &reg, &bit);
+
+	switch (ctrl->type) {
+	case RK2928:
+	case RK3128:
+		data = BIT(bit + 16);
+		if (pull == PIN_CONFIG_BIAS_DISABLE)
+			data |= BIT(bit);
+		ret = regmap_write(regmap, reg, data);
+		break;
+	case PX30:
+	case RV1108:
+	case RK3188:
+	case RK3288:
+	case RK3368:
+	case RK3399:
+		pull_type = bank->pull_type[pin_num / 8];
+		ret = -EINVAL;
+		for (i = 0; i < ARRAY_SIZE(rockchip_pull_list[pull_type]);
+			i++) {
+			if (rockchip_pull_list[pull_type][i] == pull) {
+				ret = i;
+				break;
+			}
+		}
+
+		if (ret < 0) {
+			debug("unsupported pull setting %d\n", pull);
+			return ret;
+		}
+
+		/* enable the write to the equivalent lower bits */
+		data = ((1 << RK3188_PULL_BITS_PER_PIN) - 1) << (bit + 16);
+		data |= (ret << bit);
+
+		ret = regmap_write(regmap, reg, data);
+		break;
+	default:
+		debug("unsupported pinctrl type\n");
+		return -EINVAL;
+	}
+
+	return ret;
+}
+
+#define RK3328_SCHMITT_BITS_PER_PIN		1
+#define RK3328_SCHMITT_PINS_PER_REG		16
+#define RK3328_SCHMITT_BANK_STRIDE		8
+#define RK3328_SCHMITT_GRF_OFFSET		0x380
+
+static int rk3328_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank,
+					   int pin_num,
+					   struct regmap **regmap,
+					   int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	*regmap = priv->regmap_base;
+	*reg = RK3328_SCHMITT_GRF_OFFSET;
+
+	*reg += bank->bank_num * RK3328_SCHMITT_BANK_STRIDE;
+	*reg += ((pin_num / RK3328_SCHMITT_PINS_PER_REG) * 4);
+	*bit = pin_num % RK3328_SCHMITT_PINS_PER_REG;
+
+	return 0;
+}
+
+static int rockchip_set_schmitt(struct rockchip_pin_bank *bank,
+				int pin_num, int enable)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	struct rockchip_pin_ctrl *ctrl = priv->ctrl;
+	struct regmap *regmap;
+	int reg, ret;
+	u8 bit;
+	u32 data;
+
+	debug("setting input schmitt of GPIO%d-%d to %d\n", bank->bank_num,
+	      pin_num, enable);
+
+	ret = ctrl->schmitt_calc_reg(bank, pin_num, &regmap, &reg, &bit);
+	if (ret)
+		return ret;
+
+	/* enable the write to the equivalent lower bits */
+	data = BIT(bit + 16) | (enable << bit);
+
+	return regmap_write(regmap, reg, data);
+}
+
+/*
+ * Pinconf_ops handling
+ */
+static bool rockchip_pinconf_pull_valid(struct rockchip_pin_ctrl *ctrl,
+					unsigned int pull)
+{
+	switch (ctrl->type) {
+	case RK2928:
+	case RK3128:
+		return (pull == PIN_CONFIG_BIAS_PULL_PIN_DEFAULT ||
+			pull == PIN_CONFIG_BIAS_DISABLE);
+	case RK3066B:
+		return pull ? false : true;
+	case PX30:
+	case RV1108:
+	case RK3188:
+	case RK3288:
+	case RK3368:
+	case RK3399:
+		return (pull != PIN_CONFIG_BIAS_PULL_PIN_DEFAULT);
+	}
+
+	return false;
+}
+
+/* set the pin config settings for a specified pin */
+static int rockchip_pinconf_set(struct rockchip_pin_bank *bank,
+				u32 pin, u32 param, u32 arg)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	struct rockchip_pin_ctrl *ctrl = priv->ctrl;
+	int rc;
+
+	switch (param) {
+	case PIN_CONFIG_BIAS_DISABLE:
+		rc =  rockchip_set_pull(bank, pin, param);
+		if (rc)
+			return rc;
+		break;
+
+	case PIN_CONFIG_BIAS_PULL_UP:
+	case PIN_CONFIG_BIAS_PULL_DOWN:
+	case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT:
+	case PIN_CONFIG_BIAS_BUS_HOLD:
+		if (!rockchip_pinconf_pull_valid(ctrl, param))
+			return -ENOTSUPP;
+
+		if (!arg)
+			return -EINVAL;
+
+		rc = rockchip_set_pull(bank, pin, param);
+		if (rc)
+			return rc;
+		break;
+
+	case PIN_CONFIG_DRIVE_STRENGTH:
+		if (!ctrl->drv_calc_reg)
+			return -ENOTSUPP;
+
+		rc = rockchip_set_drive_perpin(bank, pin, arg);
+		if (rc < 0)
+			return rc;
+		break;
+
+	case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
+		if (!ctrl->schmitt_calc_reg)
+			return -ENOTSUPP;
+
+		rc = rockchip_set_schmitt(bank, pin, arg);
+		if (rc < 0)
+			return rc;
+		break;
+
+	default:
+		break;
+	}
+
+	return 0;
+}
+
+static const struct pinconf_param rockchip_conf_params[] = {
+	{ "bias-disable", PIN_CONFIG_BIAS_DISABLE, 0 },
+	{ "bias-bus-hold", PIN_CONFIG_BIAS_BUS_HOLD, 0 },
+	{ "bias-pull-up", PIN_CONFIG_BIAS_PULL_UP, 1 },
+	{ "bias-pull-down", PIN_CONFIG_BIAS_PULL_DOWN, 1 },
+	{ "drive-strength", PIN_CONFIG_DRIVE_STRENGTH, 0 },
+	{ "input-enable", PIN_CONFIG_INPUT_ENABLE, 1 },
+	{ "input-disable", PIN_CONFIG_INPUT_ENABLE, 0 },
+	{ "input-schmitt-disable", PIN_CONFIG_INPUT_SCHMITT_ENABLE, 0 },
+	{ "input-schmitt-enable", PIN_CONFIG_INPUT_SCHMITT_ENABLE, 1 },
+};
+
+static int rockchip_pinconf_prop_name_to_param(const char *property,
+					       u32 *default_value)
+{
+	const struct pinconf_param *p, *end;
+
+	p = rockchip_conf_params;
+	end = p + sizeof(rockchip_conf_params) / sizeof(struct pinconf_param);
+
+	/* See if this pctldev supports this parameter */
+	for (; p < end; p++) {
+		if (!strcmp(property, p->property)) {
+			*default_value = p->default_value;
+			return p->param;
+		}
+	}
+
+	*default_value = 0;
+	return -EPERM;
+}
+
+static int rockchip_pinctrl_set_state(struct udevice *dev,
+				      struct udevice *config)
+{
+	struct rockchip_pinctrl_priv *priv = dev_get_priv(dev);
+	struct rockchip_pin_ctrl *ctrl = priv->ctrl;
+	const void *blob = gd->fdt_blob;
+	int node = dev_of_offset(config);
+	u32 cells[MAX_ROCKCHIP_PINS_ENTRIES * 4];
+	u32 bank, pin, mux, conf, arg, default_val;
+	int ret, count, i;
+	const char *prop_name;
+	int pcfg_node, property_offset, prop_len, param;
+	const void *value;
+
+	count = fdtdec_get_int_array_count(blob, node, "rockchip,pins",
+					   cells, ARRAY_SIZE(cells));
+	if (count < 0) {
+		debug("%s: bad array %d\n", __func__, count);
+		return -EINVAL;
+	}
+
+	if (count > MAX_ROCKCHIP_PINS_ENTRIES * 4) {
+		debug("%s: unsupported pins array count %d\n",
+		      __func__, count);
+		return -EINVAL;
+	}
+
+	for (i = 0; i < (count >> 2); i++) {
+		bank = cells[4 * i + 0];
+		pin = cells[4 * i + 1];
+		mux = cells[4 * i + 2];
+		conf = cells[4 * i + 3];
+
+		ret = rockchip_verify_config(dev, bank, pin);
+		if (ret)
+			return ret;
+
+		ret = rockchip_set_mux(&ctrl->pin_banks[bank], pin, mux);
+		if (ret)
+			return ret;
+
+		pcfg_node = fdt_node_offset_by_phandle(blob, conf);
+		if (pcfg_node < 0)
+			return -ENODEV;
+
+		fdt_for_each_property_offset(property_offset, blob, pcfg_node) {
+			value = fdt_getprop_by_offset(blob, property_offset,
+						      &prop_name, &prop_len);
+			if (!value)
+				return -ENOENT;
+
+			param = rockchip_pinconf_prop_name_to_param(prop_name,
+								    &default_val);
+			if (param < 0)
+				break;
+
+			if (prop_len >= sizeof(fdt32_t))
+				arg = fdt32_to_cpu(*(fdt32_t *)value);
+			else
+				arg = default_val;
+
+			ret = rockchip_pinconf_set(&ctrl->pin_banks[bank], pin,
+						   param, arg);
+			if (ret) {
+				debug("%s: rockchip_pinconf_set fail: %d\n",
+				      __func__, ret);
+				return ret;
+			}
+		}
+	}
+
+	return 0;
+}
+
+static struct pinctrl_ops rockchip_pinctrl_ops = {
+	.set_state			= rockchip_pinctrl_set_state,
+	.get_gpio_mux			= rockchip_pinctrl_get_gpio_mux,
+};
+
+/* retrieve the soc specific data */
+static struct rockchip_pin_ctrl *rockchip_pinctrl_get_soc_data(struct udevice *dev)
+{
+	struct rockchip_pinctrl_priv *priv = dev_get_priv(dev);
+	struct rockchip_pin_ctrl *ctrl =
+			(struct rockchip_pin_ctrl *)dev_get_driver_data(dev);
+	struct rockchip_pin_bank *bank;
+	int grf_offs, pmu_offs, drv_grf_offs, drv_pmu_offs, i, j;
+
+	grf_offs = ctrl->grf_mux_offset;
+	pmu_offs = ctrl->pmu_mux_offset;
+	drv_pmu_offs = ctrl->pmu_drv_offset;
+	drv_grf_offs = ctrl->grf_drv_offset;
+	bank = ctrl->pin_banks;
+
+	for (i = 0; i < ctrl->nr_banks; ++i, ++bank) {
+		int bank_pins = 0;
+
+		bank->priv = priv;
+		bank->pin_base = ctrl->nr_pins;
+		ctrl->nr_pins += bank->nr_pins;
+
+		/* calculate iomux and drv offsets */
+		for (j = 0; j < 4; j++) {
+			struct rockchip_iomux *iom = &bank->iomux[j];
+			struct rockchip_drv *drv = &bank->drv[j];
+			int inc;
+
+			if (bank_pins >= bank->nr_pins)
+				break;
+
+			/* preset iomux offset value, set new start value */
+			if (iom->offset >= 0) {
+				if (iom->type & IOMUX_SOURCE_PMU)
+					pmu_offs = iom->offset;
+				else
+					grf_offs = iom->offset;
+			} else { /* set current iomux offset */
+				iom->offset = (iom->type & IOMUX_SOURCE_PMU) ?
+							pmu_offs : grf_offs;
+			}
+
+			/* preset drv offset value, set new start value */
+			if (drv->offset >= 0) {
+				if (iom->type & IOMUX_SOURCE_PMU)
+					drv_pmu_offs = drv->offset;
+				else
+					drv_grf_offs = drv->offset;
+			} else { /* set current drv offset */
+				drv->offset = (iom->type & IOMUX_SOURCE_PMU) ?
+						drv_pmu_offs : drv_grf_offs;
+			}
+
+			debug("bank %d, iomux %d has iom_offset 0x%x drv_offset 0x%x\n",
+			      i, j, iom->offset, drv->offset);
+
+			/*
+			 * Increase offset according to iomux width.
+			 * 4bit iomux'es are spread over two registers.
+			 */
+			inc = (iom->type & (IOMUX_WIDTH_4BIT |
+					    IOMUX_WIDTH_3BIT)) ? 8 : 4;
+			if (iom->type & IOMUX_SOURCE_PMU)
+				pmu_offs += inc;
+			else
+				grf_offs += inc;
+
+			/*
+			 * Increase offset according to drv width.
+			 * 3bit drive-strenth'es are spread over two registers.
+			 */
+			if ((drv->drv_type == DRV_TYPE_IO_1V8_3V0_AUTO) ||
+			    (drv->drv_type == DRV_TYPE_IO_3V3_ONLY))
+				inc = 8;
+			else
+				inc = 4;
+
+			if (iom->type & IOMUX_SOURCE_PMU)
+				drv_pmu_offs += inc;
+			else
+				drv_grf_offs += inc;
+
+			bank_pins += 8;
+		}
+
+		/* calculate the per-bank recalced_mask */
+		for (j = 0; j < ctrl->niomux_recalced; j++) {
+			int pin = 0;
+
+			if (ctrl->iomux_recalced[j].num == bank->bank_num) {
+				pin = ctrl->iomux_recalced[j].pin;
+				bank->recalced_mask |= BIT(pin);
+			}
+		}
+
+		/* calculate the per-bank route_mask */
+		for (j = 0; j < ctrl->niomux_routes; j++) {
+			int pin = 0;
+
+			if (ctrl->iomux_routes[j].bank_num == bank->bank_num) {
+				pin = ctrl->iomux_routes[j].pin;
+				bank->route_mask |= BIT(pin);
+			}
+		}
+	}
+
+	return ctrl;
+}
+
+static int rockchip_pinctrl_probe(struct udevice *dev)
+{
+	struct rockchip_pinctrl_priv *priv = dev_get_priv(dev);
+	struct rockchip_pin_ctrl *ctrl;
+	struct udevice *syscon;
+	struct regmap *regmap;
+	int ret = 0;
+
+	/* get rockchip grf syscon phandle */
+	ret = uclass_get_device_by_phandle(UCLASS_SYSCON, dev, "rockchip,grf",
+					   &syscon);
+	if (ret) {
+		debug("unable to find rockchip,grf syscon device (%d)\n", ret);
+		return ret;
+	}
+
+	/* get grf-reg base address */
+	regmap = syscon_get_regmap(syscon);
+	if (!regmap) {
+		debug("unable to find rockchip grf regmap\n");
+		return -ENODEV;
+	}
+	priv->regmap_base = regmap;
+
+	/* option: get pmu-reg base address */
+	ret = uclass_get_device_by_phandle(UCLASS_SYSCON, dev, "rockchip,pmu",
+					   &syscon);
+	if (!ret) {
+		/* get pmugrf-reg base address */
+		regmap = syscon_get_regmap(syscon);
+		if (!regmap) {
+			debug("unable to find rockchip pmu regmap\n");
+			return -ENODEV;
+		}
+		priv->regmap_pmu = regmap;
+	}
+
+	ctrl = rockchip_pinctrl_get_soc_data(dev);
+	if (!ctrl) {
+		debug("driver data not available\n");
+		return -EINVAL;
+	}
+
+	priv->ctrl = ctrl;
+	return 0;
+}
+
+static struct rockchip_pin_bank px30_pin_banks[] = {
+	PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", IOMUX_SOURCE_PMU,
+					     IOMUX_SOURCE_PMU,
+					     IOMUX_SOURCE_PMU,
+					     IOMUX_SOURCE_PMU
+			    ),
+	PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1", IOMUX_WIDTH_4BIT,
+					     IOMUX_WIDTH_4BIT,
+					     IOMUX_WIDTH_4BIT,
+					     IOMUX_WIDTH_4BIT
+			    ),
+	PIN_BANK_IOMUX_FLAGS(2, 32, "gpio2", IOMUX_WIDTH_4BIT,
+					     IOMUX_WIDTH_4BIT,
+					     IOMUX_WIDTH_4BIT,
+					     IOMUX_WIDTH_4BIT
+			    ),
+	PIN_BANK_IOMUX_FLAGS(3, 32, "gpio3", IOMUX_WIDTH_4BIT,
+					     IOMUX_WIDTH_4BIT,
+					     IOMUX_WIDTH_4BIT,
+					     IOMUX_WIDTH_4BIT
+			    ),
+};
+
+static struct rockchip_pin_ctrl px30_pin_ctrl = {
+		.pin_banks		= px30_pin_banks,
+		.nr_banks		= ARRAY_SIZE(px30_pin_banks),
+		.label			= "PX30-GPIO",
+		.type			= PX30,
+		.grf_mux_offset		= 0x0,
+		.pmu_mux_offset		= 0x0,
+		.iomux_routes		= px30_mux_route_data,
+		.niomux_routes		= ARRAY_SIZE(px30_mux_route_data),
+		.pull_calc_reg		= px30_calc_pull_reg_and_bit,
+		.drv_calc_reg		= px30_calc_drv_reg_and_bit,
+		.schmitt_calc_reg	= px30_calc_schmitt_reg_and_bit,
+};
+
+static struct rockchip_pin_bank rv1108_pin_banks[] = {
+	PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", IOMUX_SOURCE_PMU,
+					     IOMUX_SOURCE_PMU,
+					     IOMUX_SOURCE_PMU,
+					     IOMUX_SOURCE_PMU),
+	PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1", 0, 0, 0, 0),
+	PIN_BANK_IOMUX_FLAGS(2, 32, "gpio2", 0, 0, 0, 0),
+	PIN_BANK_IOMUX_FLAGS(3, 32, "gpio3", 0, 0, 0, 0),
+};
+
+static struct rockchip_pin_ctrl rv1108_pin_ctrl = {
+	.pin_banks		= rv1108_pin_banks,
+	.nr_banks		= ARRAY_SIZE(rv1108_pin_banks),
+	.label			= "RV1108-GPIO",
+	.type			= RV1108,
+	.grf_mux_offset		= 0x10,
+	.pmu_mux_offset		= 0x0,
+	.iomux_recalced		= rv1108_mux_recalced_data,
+	.niomux_recalced	= ARRAY_SIZE(rv1108_mux_recalced_data),
+	.pull_calc_reg		= rv1108_calc_pull_reg_and_bit,
+	.drv_calc_reg		= rv1108_calc_drv_reg_and_bit,
+	.schmitt_calc_reg	= rv1108_calc_schmitt_reg_and_bit,
+};
+
+static struct rockchip_pin_bank rk2928_pin_banks[] = {
+	PIN_BANK(0, 32, "gpio0"),
+	PIN_BANK(1, 32, "gpio1"),
+	PIN_BANK(2, 32, "gpio2"),
+	PIN_BANK(3, 32, "gpio3"),
+};
+
+static struct rockchip_pin_ctrl rk2928_pin_ctrl = {
+		.pin_banks		= rk2928_pin_banks,
+		.nr_banks		= ARRAY_SIZE(rk2928_pin_banks),
+		.label			= "RK2928-GPIO",
+		.type			= RK2928,
+		.grf_mux_offset		= 0xa8,
+		.pull_calc_reg		= rk2928_calc_pull_reg_and_bit,
+};
+
+static struct rockchip_pin_bank rk3036_pin_banks[] = {
+	PIN_BANK(0, 32, "gpio0"),
+	PIN_BANK(1, 32, "gpio1"),
+	PIN_BANK(2, 32, "gpio2"),
+};
+
+static struct rockchip_pin_ctrl rk3036_pin_ctrl = {
+		.pin_banks		= rk3036_pin_banks,
+		.nr_banks		= ARRAY_SIZE(rk3036_pin_banks),
+		.label			= "RK3036-GPIO",
+		.type			= RK2928,
+		.grf_mux_offset		= 0xa8,
+		.pull_calc_reg		= rk2928_calc_pull_reg_and_bit,
+};
+
+static struct rockchip_pin_bank rk3066a_pin_banks[] = {
+	PIN_BANK(0, 32, "gpio0"),
+	PIN_BANK(1, 32, "gpio1"),
+	PIN_BANK(2, 32, "gpio2"),
+	PIN_BANK(3, 32, "gpio3"),
+	PIN_BANK(4, 32, "gpio4"),
+	PIN_BANK(6, 16, "gpio6"),
+};
+
+static struct rockchip_pin_ctrl rk3066a_pin_ctrl = {
+		.pin_banks		= rk3066a_pin_banks,
+		.nr_banks		= ARRAY_SIZE(rk3066a_pin_banks),
+		.label			= "RK3066a-GPIO",
+		.type			= RK2928,
+		.grf_mux_offset		= 0xa8,
+		.pull_calc_reg		= rk2928_calc_pull_reg_and_bit,
+};
+
+static struct rockchip_pin_bank rk3066b_pin_banks[] = {
+	PIN_BANK(0, 32, "gpio0"),
+	PIN_BANK(1, 32, "gpio1"),
+	PIN_BANK(2, 32, "gpio2"),
+	PIN_BANK(3, 32, "gpio3"),
+};
+
+static struct rockchip_pin_ctrl rk3066b_pin_ctrl = {
+		.pin_banks	= rk3066b_pin_banks,
+		.nr_banks	= ARRAY_SIZE(rk3066b_pin_banks),
+		.label		= "RK3066b-GPIO",
+		.type		= RK3066B,
+		.grf_mux_offset	= 0x60,
+};
+
+static struct rockchip_pin_bank rk3128_pin_banks[] = {
+	PIN_BANK(0, 32, "gpio0"),
+	PIN_BANK(1, 32, "gpio1"),
+	PIN_BANK(2, 32, "gpio2"),
+	PIN_BANK(3, 32, "gpio3"),
+};
+
+static struct rockchip_pin_ctrl rk3128_pin_ctrl = {
+		.pin_banks		= rk3128_pin_banks,
+		.nr_banks		= ARRAY_SIZE(rk3128_pin_banks),
+		.label			= "RK3128-GPIO",
+		.type			= RK3128,
+		.grf_mux_offset		= 0xa8,
+		.iomux_recalced		= rk3128_mux_recalced_data,
+		.niomux_recalced	= ARRAY_SIZE(rk3128_mux_recalced_data),
+		.iomux_routes		= rk3128_mux_route_data,
+		.niomux_routes		= ARRAY_SIZE(rk3128_mux_route_data),
+		.pull_calc_reg		= rk3128_calc_pull_reg_and_bit,
+};
+
+static struct rockchip_pin_bank rk3188_pin_banks[] = {
+	PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", IOMUX_GPIO_ONLY, 0, 0, 0),
+	PIN_BANK(1, 32, "gpio1"),
+	PIN_BANK(2, 32, "gpio2"),
+	PIN_BANK(3, 32, "gpio3"),
+};
+
+static struct rockchip_pin_ctrl rk3188_pin_ctrl = {
+		.pin_banks		= rk3188_pin_banks,
+		.nr_banks		= ARRAY_SIZE(rk3188_pin_banks),
+		.label			= "RK3188-GPIO",
+		.type			= RK3188,
+		.grf_mux_offset		= 0x60,
+		.pull_calc_reg		= rk3188_calc_pull_reg_and_bit,
+};
+
+static struct rockchip_pin_bank rk3228_pin_banks[] = {
+	PIN_BANK(0, 32, "gpio0"),
+	PIN_BANK(1, 32, "gpio1"),
+	PIN_BANK(2, 32, "gpio2"),
+	PIN_BANK(3, 32, "gpio3"),
+};
+
+static struct rockchip_pin_ctrl rk3228_pin_ctrl = {
+		.pin_banks		= rk3228_pin_banks,
+		.nr_banks		= ARRAY_SIZE(rk3228_pin_banks),
+		.label			= "RK3228-GPIO",
+		.type			= RK3288,
+		.grf_mux_offset		= 0x0,
+		.iomux_routes		= rk3228_mux_route_data,
+		.niomux_routes		= ARRAY_SIZE(rk3228_mux_route_data),
+		.pull_calc_reg		= rk3228_calc_pull_reg_and_bit,
+		.drv_calc_reg		= rk3228_calc_drv_reg_and_bit,
+};
+
+static struct rockchip_pin_bank rk3288_pin_banks[] = {
+	PIN_BANK_IOMUX_FLAGS(0, 24, "gpio0", IOMUX_SOURCE_PMU,
+					     IOMUX_SOURCE_PMU,
+					     IOMUX_SOURCE_PMU,
+					     IOMUX_UNROUTED
+			    ),
+	PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1", IOMUX_UNROUTED,
+					     IOMUX_UNROUTED,
+					     IOMUX_UNROUTED,
+					     0
+			    ),
+	PIN_BANK_IOMUX_FLAGS(2, 32, "gpio2", 0, 0, 0, IOMUX_UNROUTED),
+	PIN_BANK_IOMUX_FLAGS(3, 32, "gpio3", 0, 0, 0, IOMUX_WIDTH_4BIT),
+	PIN_BANK_IOMUX_FLAGS(4, 32, "gpio4", IOMUX_WIDTH_4BIT,
+					     IOMUX_WIDTH_4BIT,
+					     0,
+					     0
+			    ),
+	PIN_BANK_IOMUX_FLAGS(5, 32, "gpio5", IOMUX_UNROUTED,
+					     0,
+					     0,
+					     IOMUX_UNROUTED
+			    ),
+	PIN_BANK_IOMUX_FLAGS(6, 32, "gpio6", 0, 0, 0, IOMUX_UNROUTED),
+	PIN_BANK_IOMUX_FLAGS(7, 32, "gpio7", 0,
+					     0,
+					     IOMUX_WIDTH_4BIT,
+					     IOMUX_UNROUTED
+			    ),
+	PIN_BANK(8, 16, "gpio8"),
+};
+
+static struct rockchip_pin_ctrl rk3288_pin_ctrl = {
+		.pin_banks		= rk3288_pin_banks,
+		.nr_banks		= ARRAY_SIZE(rk3288_pin_banks),
+		.label			= "RK3288-GPIO",
+		.type			= RK3288,
+		.grf_mux_offset		= 0x0,
+		.pmu_mux_offset		= 0x84,
+		.iomux_routes		= rk3288_mux_route_data,
+		.niomux_routes		= ARRAY_SIZE(rk3288_mux_route_data),
+		.pull_calc_reg		= rk3288_calc_pull_reg_and_bit,
+		.drv_calc_reg		= rk3288_calc_drv_reg_and_bit,
+};
+
+static struct rockchip_pin_bank rk3328_pin_banks[] = {
+	PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", 0, 0, 0, 0),
+	PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1", 0, 0, 0, 0),
+	PIN_BANK_IOMUX_FLAGS(2, 32, "gpio2", 0,
+			     IOMUX_WIDTH_3BIT,
+			     IOMUX_WIDTH_3BIT,
+			     0),
+	PIN_BANK_IOMUX_FLAGS(3, 32, "gpio3",
+			     IOMUX_WIDTH_3BIT,
+			     IOMUX_WIDTH_3BIT,
+			     0,
+			     0),
+};
+
+static struct rockchip_pin_ctrl rk3328_pin_ctrl = {
+		.pin_banks		= rk3328_pin_banks,
+		.nr_banks		= ARRAY_SIZE(rk3328_pin_banks),
+		.label			= "RK3328-GPIO",
+		.type			= RK3288,
+		.grf_mux_offset		= 0x0,
+		.iomux_recalced		= rk3328_mux_recalced_data,
+		.niomux_recalced	= ARRAY_SIZE(rk3328_mux_recalced_data),
+		.iomux_routes		= rk3328_mux_route_data,
+		.niomux_routes		= ARRAY_SIZE(rk3328_mux_route_data),
+		.pull_calc_reg		= rk3228_calc_pull_reg_and_bit,
+		.drv_calc_reg		= rk3228_calc_drv_reg_and_bit,
+		.schmitt_calc_reg	= rk3328_calc_schmitt_reg_and_bit,
+};
+
+static struct rockchip_pin_bank rk3368_pin_banks[] = {
+	PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", IOMUX_SOURCE_PMU,
+					     IOMUX_SOURCE_PMU,
+					     IOMUX_SOURCE_PMU,
+					     IOMUX_SOURCE_PMU
+			    ),
+	PIN_BANK(1, 32, "gpio1"),
+	PIN_BANK(2, 32, "gpio2"),
+	PIN_BANK(3, 32, "gpio3"),
+};
+
+static struct rockchip_pin_ctrl rk3368_pin_ctrl = {
+		.pin_banks		= rk3368_pin_banks,
+		.nr_banks		= ARRAY_SIZE(rk3368_pin_banks),
+		.label			= "RK3368-GPIO",
+		.type			= RK3368,
+		.grf_mux_offset		= 0x0,
+		.pmu_mux_offset		= 0x0,
+		.pull_calc_reg		= rk3368_calc_pull_reg_and_bit,
+		.drv_calc_reg		= rk3368_calc_drv_reg_and_bit,
+};
+
+static struct rockchip_pin_bank rk3399_pin_banks[] = {
+	PIN_BANK_IOMUX_FLAGS_DRV_FLAGS_OFFSET_PULL_FLAGS(0, 32, "gpio0",
+							 IOMUX_SOURCE_PMU,
+							 IOMUX_SOURCE_PMU,
+							 IOMUX_SOURCE_PMU,
+							 IOMUX_SOURCE_PMU,
+							 DRV_TYPE_IO_1V8_ONLY,
+							 DRV_TYPE_IO_1V8_ONLY,
+							 DRV_TYPE_IO_DEFAULT,
+							 DRV_TYPE_IO_DEFAULT,
+							 0x80,
+							 0x88,
+							 -1,
+							 -1,
+							 PULL_TYPE_IO_1V8_ONLY,
+							 PULL_TYPE_IO_1V8_ONLY,
+							 PULL_TYPE_IO_DEFAULT,
+							 PULL_TYPE_IO_DEFAULT
+							),
+	PIN_BANK_IOMUX_DRV_FLAGS_OFFSET(1, 32, "gpio1", IOMUX_SOURCE_PMU,
+					IOMUX_SOURCE_PMU,
+					IOMUX_SOURCE_PMU,
+					IOMUX_SOURCE_PMU,
+					DRV_TYPE_IO_1V8_OR_3V0,
+					DRV_TYPE_IO_1V8_OR_3V0,
+					DRV_TYPE_IO_1V8_OR_3V0,
+					DRV_TYPE_IO_1V8_OR_3V0,
+					0xa0,
+					0xa8,
+					0xb0,
+					0xb8
+					),
+	PIN_BANK_DRV_FLAGS_PULL_FLAGS(2, 32, "gpio2", DRV_TYPE_IO_1V8_OR_3V0,
+				      DRV_TYPE_IO_1V8_OR_3V0,
+				      DRV_TYPE_IO_1V8_ONLY,
+				      DRV_TYPE_IO_1V8_ONLY,
+				      PULL_TYPE_IO_DEFAULT,
+				      PULL_TYPE_IO_DEFAULT,
+				      PULL_TYPE_IO_1V8_ONLY,
+				      PULL_TYPE_IO_1V8_ONLY
+				      ),
+	PIN_BANK_DRV_FLAGS(3, 32, "gpio3", DRV_TYPE_IO_3V3_ONLY,
+			   DRV_TYPE_IO_3V3_ONLY,
+			   DRV_TYPE_IO_3V3_ONLY,
+			   DRV_TYPE_IO_1V8_OR_3V0
+			   ),
+	PIN_BANK_DRV_FLAGS(4, 32, "gpio4", DRV_TYPE_IO_1V8_OR_3V0,
+			   DRV_TYPE_IO_1V8_3V0_AUTO,
+			   DRV_TYPE_IO_1V8_OR_3V0,
+			   DRV_TYPE_IO_1V8_OR_3V0
+			   ),
+};
+
+static struct rockchip_pin_ctrl rk3399_pin_ctrl = {
+		.pin_banks		= rk3399_pin_banks,
+		.nr_banks		= ARRAY_SIZE(rk3399_pin_banks),
+		.label			= "RK3399-GPIO",
+		.type			= RK3399,
+		.grf_mux_offset		= 0xe000,
+		.pmu_mux_offset		= 0x0,
+		.grf_drv_offset		= 0xe100,
+		.pmu_drv_offset		= 0x80,
+		.iomux_routes		= rk3399_mux_route_data,
+		.niomux_routes		= ARRAY_SIZE(rk3399_mux_route_data),
+		.pull_calc_reg		= rk3399_calc_pull_reg_and_bit,
+		.drv_calc_reg		= rk3399_calc_drv_reg_and_bit,
+};
+
+static const struct udevice_id rockchip_pinctrl_dt_match[] = {
+	{ .compatible = "rockchip,px30-pinctrl",
+		.data = (ulong)&px30_pin_ctrl },
+	{ .compatible = "rockchip,rv1108-pinctrl",
+		.data = (ulong)&rv1108_pin_ctrl },
+	{ .compatible = "rockchip,rk2928-pinctrl",
+		.data = (ulong)&rk2928_pin_ctrl },
+	{ .compatible = "rockchip,rk3036-pinctrl",
+		.data = (ulong)&rk3036_pin_ctrl },
+	{ .compatible = "rockchip,rk3066a-pinctrl",
+		.data = (ulong)&rk3066a_pin_ctrl },
+	{ .compatible = "rockchip,rk3066b-pinctrl",
+		.data = (ulong)&rk3066b_pin_ctrl },
+	{ .compatible = "rockchip,rk3128-pinctrl",
+		.data = (ulong)&rk3128_pin_ctrl },
+	{ .compatible = "rockchip,rk3188-pinctrl",
+		.data = (ulong)&rk3188_pin_ctrl },
+	{ .compatible = "rockchip,rk3228-pinctrl",
+		.data = (ulong)&rk3228_pin_ctrl },
+	{ .compatible = "rockchip,rk3288-pinctrl",
+		.data = (ulong)&rk3288_pin_ctrl },
+	{ .compatible = "rockchip,rk3328-pinctrl",
+		.data = (ulong)&rk3328_pin_ctrl },
+	{ .compatible = "rockchip,rk3368-pinctrl",
+		.data = (ulong)&rk3368_pin_ctrl },
+	{ .compatible = "rockchip,rk3399-pinctrl",
+		.data = (ulong)&rk3399_pin_ctrl },
+	{},
+};
+
+U_BOOT_DRIVER(pinctrl_rockchip) = {
+	.name		= "rockchip_pinctrl",
+	.id		= UCLASS_PINCTRL,
+	.of_match	= rockchip_pinctrl_dt_match,
+	.priv_auto_alloc_size = sizeof(struct rockchip_pinctrl_priv),
+	.ops		= &rockchip_pinctrl_ops,
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	.bind		= dm_scan_fdt_dev,
+#endif
+	.probe		= rockchip_pinctrl_probe,
+};

commit fe48794d5dff439919a67dfed7829019477992a7
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Jan 31 16:17:21 2018 +0800

    ARM: rockchip: Kconfig: Remove the SPL_PINCTRL config for rk3188
    
    It seems that pinctrl is not used at SPL level for rk3188,
    so remove it, and save more space.
    
    Change-Id: I4ca47328a7905447799a1e2296cce4e5aa924928
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index fa1f55f838..1e2ce65842 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -55,7 +55,6 @@ config ROCKCHIP_RK3188
 	select SUPPORT_SPL
 	select SPL
 	select SPL_CLK
-	select SPL_PINCTRL
 	select SPL_REGMAP
 	select SPL_SYSCON
 	select SPL_RAM

commit e7d7797312218d27453532d1fe6e5ce7e4729fc4
Author: David Wu <david.wu@rock-chips.com>
Date:   Mon Jan 29 09:21:10 2018 +0800

    configs: rk3328_common: Increase the spl size for new pinctrl build-in
    
    If there is tpl, the spl size is not limited at dram, and can build
    in the pinctrl-rockchip driver.
    
    Change-Id: I75a30048cd6bfea75b4147c25520ceaef52ecb18
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index 1ecc4f7b53..fa84acf61b 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -20,7 +20,11 @@
 #define CONFIG_SYS_LOAD_ADDR		0x00800800
 #define CONFIG_SPL_STACK		0x00400000
 #define CONFIG_SPL_TEXT_BASE		0x00000000
+#ifdef CONFIG_TPL
+#define CONFIG_SPL_MAX_SIZE             0x20000
+#else
 #define CONFIG_SPL_MAX_SIZE             0x10000
+#endif
 #define CONFIG_SPL_BSS_START_ADDR	0x00400000
 #define CONFIG_SPL_BSS_MAX_SIZE         0x2000
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */

commit 51441a2851597673f16dc4a94645910573921ce3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Feb 3 12:36:22 2018 +0800

    make.sh: fix issues
    
    1. check INI input file exists;
    2. fix up commit 7c2526e;
    
    Change-Id: I7053c975369945a02034a108d8cab096aa35f142
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 26dd5b16c8..ac8689f80b 100755
--- a/make.sh
+++ b/make.sh
@@ -52,9 +52,9 @@ prepare()
 		exit 1
 	fi
 
-	# Clean! We assume that ./u-boot.map indicates U-Boot project is not clean,
+	# Clean! We assume that ./u-boot.map, u-boot.cfg or u-boot.lds indicates U-Boot project is not clean,
 	# maybe git checkout from rkdevelop.
-	if [ -f ./u-boot.map ]; then
+	if [ -f ./u-boot.map -o -f ./u-boot.cfg -o -f ./u-boot.lds ]; then
 		make mrproper
 		echo "auto \"make mrproper\" done..."
 	fi
@@ -98,14 +98,21 @@ pack_uboot_image()
 
 	UBOOT_LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${DSTDIR}/out/include/autoconf.mk|tr -d '\r'`
 	${TOOLCHAIN_RKBIN}/loaderimage --pack --uboot ${DSTDIR}/out/u-boot.bin uboot.img ${UBOOT_LOAD_ADDR}
+	echo "pack uboot okay! Input: ${DSTDIR}/out/u-boot.bin"
 }
 
 pack_loader_image()
 {
+	if [ ! -f ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini ]; then
+		echo "pack loader failed! Can't find: ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini"
+		return
+	fi
+
 	cd ${RKBIN}
 	${TOOLCHAIN_RKBIN}/boot_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini
 	cd -
 	mv ${RKBIN}/*_loader_*.bin ./
+	echo "pack loader okay! Input: ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini"
 }
 
 pack_trust_image()
@@ -114,12 +121,23 @@ pack_trust_image()
 
 	# ARM64 uses trust_merger
 	if grep  -q '^CONFIG_ARM64=y' ${DSTDIR}/out/.config ; then
+		if [ ! -f ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini ]; then
+			echo "pack trust failed! Can't find: ${RKBIN}/RKRUST/${RKCHIP}TRUST.ini"
+			return
+		fi
+
 		cd ${RKBIN}
 		${TOOLCHAIN_RKBIN}/trust_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini
 		cd -
 		mv ${RKBIN}/trust.img ./trust.img
+		echo "pack trust okay! Input: ${RKBIN}/RKRUST/${RKCHIP}TRUST.ini"
 	# ARM uses loaderimage
 	else
+		if [ ! -f ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini ]; then
+			echo "pack trust failed! Can't find: ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini"
+			return
+		fi
+
 		# OP-TEE is 132M(0x8400000) offset from DRAM base.
 		DARM_BASE=`sed -n "/CONFIG_SYS_SDRAM_BASE=/s/CONFIG_SYS_SDRAM_BASE=//p" ${DSTDIR}/out/include/autoconf.mk|tr -d '\r'`
 		TEE_LOAD_ADDR=$((DARM_BASE+TEE_OFFSET))
@@ -149,6 +167,8 @@ pack_trust_image()
 			echo "Can't find any tee bin"
 			exit 1
 		fi
+
+		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini"
 	fi
 }
 

commit d93242f23844453397177d4a6157273fec8dbbeb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Feb 2 21:28:48 2018 +0800

    make.sh: pack uboot.img as first order
    
    Change-Id: I4bb55f8cedf476be5cd3418650c970c10d1d0069
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index e8dde32398..26dd5b16c8 100755
--- a/make.sh
+++ b/make.sh
@@ -158,6 +158,6 @@ make ${BOARD}_defconfig O=${DSTDIR}/out
 select_toolchain
 make CROSS_COMPILE=${TOOLCHAIN_GCC}  all --jobs=${JOB} O=${DSTDIR}/out
 fixup_chip_name
-pack_loader_image
 pack_uboot_image
+pack_loader_image
 pack_trust_image

commit 5b081643b1051e9c0822128fa1aac01326a1bbe0
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Thu Feb 1 09:53:07 2018 +0800

    usb: gadget: reset to maskrom support for rockusb
    
    Follow the subcode in reset command and add resetting to maskrom support.
    
    Change-Id: I15bedef6b83b7282f3e1a9ff3663ec56cd3affc8
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index 6c07a730d7..250bcd4a79 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -48,6 +48,8 @@ struct rk_flash_info {
 	u8	flash_mask;
 } __packed;
 
+static int rkusb_rst_code; /* The subcode in reset command (0xFF) */
+
 int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
 {
 	if (IS_RKUSB_UMS_DNL(name)) {
@@ -111,7 +113,13 @@ static int rkusb_check_lun(struct fsg_common *common)
 
 static void __do_reset(struct usb_ep *ep, struct usb_request *req)
 {
-	writel(BOOT_NORMAL, (void *)CONFIG_ROCKCHIP_BOOT_MODE_REG);
+	u32 boot_flag = BOOT_NORMAL;
+
+	if (rkusb_rst_code == 0x03)
+		boot_flag = BOOT_BROM_DOWNLOAD;
+
+	rkusb_rst_code = 0; /* restore to default */
+	writel(boot_flag, (void *)CONFIG_ROCKCHIP_BOOT_MODE_REG);
 
 	do_reset(NULL, 0, 0, NULL);
 }
@@ -124,6 +132,7 @@ static int rkusb_do_reset(struct fsg_common *common,
 	bh->inreq->complete = __do_reset;
 	bh->state = BUF_STATE_EMPTY;
 
+	rkusb_rst_code = !common->cmnd[1] ? 0xff : common->cmnd[1];
 	return 0;
 }
 

commit 7c2526e987b679bf0f4d3f8071db7f068d9041fd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Feb 2 14:27:13 2018 +0800

    make.sh: execute "make mrproper" when first compile
    
    fix compile issue while git checkout between rkdevelop and next-dev:
    
      Using /home/cjh/uboot-nextdev/u-boot as source for U-Boot
      /home/cjh/uboot-nextdev/u-boot is not clean, please run 'make mrproper'
      in the '/home/cjh/uboot-nextdev/u-boot' directory.
    make[1]: *** [prepare3] Error 1
    make[1]: *** Waiting for unfinished jobs....
    
    Change-Id: If9e01b407f524360ff402d8d36241f3885c90c48
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 36cfa4e24f..e8dde32398 100755
--- a/make.sh
+++ b/make.sh
@@ -51,6 +51,13 @@ prepare()
 		echo "	3. Download full release SDK Responsity"
 		exit 1
 	fi
+
+	# Clean! We assume that ./u-boot.map indicates U-Boot project is not clean,
+	# maybe git checkout from rkdevelop.
+	if [ -f ./u-boot.map ]; then
+		make mrproper
+		echo "auto \"make mrproper\" done..."
+	fi
 }
 
 select_toolchain()
@@ -146,9 +153,9 @@ pack_trust_image()
 }
 
 prepare
-select_toolchain
 echo "make for ${BOARD}_defconfig by -j${JOB}"
 make ${BOARD}_defconfig O=${DSTDIR}/out
+select_toolchain
 make CROSS_COMPILE=${TOOLCHAIN_GCC}  all --jobs=${JOB} O=${DSTDIR}/out
 fixup_chip_name
 pack_loader_image

commit 0773d9cf3c84029c4142bdb09ab09bf0d6a978fb
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Jan 31 17:53:14 2018 +0800

    rockchip: dts: rk312x: do not enable display in pre-reloc
    
    Change-Id: Ieb6474e8bde5c204ebe1fb505fb1bccfbab73814
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3126-bnd-d708.dts b/arch/arm/dts/rk3126-bnd-d708.dts
index 297e7137ed..09f4b69a81 100644
--- a/arch/arm/dts/rk3126-bnd-d708.dts
+++ b/arch/arm/dts/rk3126-bnd-d708.dts
@@ -116,7 +116,6 @@
 	status = "okay";
 
 	panel@0 {
-		u-boot,dm-pre-reloc;
 		compatible = "simple-panel-dsi";
 		reg = <0>;
 		backlight = <&backlight>;
diff --git a/arch/arm/dts/rk3128-u-boot.dtsi b/arch/arm/dts/rk3128-u-boot.dtsi
index 2427cf74df..039aeef456 100644
--- a/arch/arm/dts/rk3128-u-boot.dtsi
+++ b/arch/arm/dts/rk3128-u-boot.dtsi
@@ -23,18 +23,6 @@
 	u-boot,dm-pre-reloc;
 };
 
-&lvds {
-	u-boot,dm-pre-reloc;
-};
-
-&display_subsystem {
-	u-boot,dm-pre-reloc;
-};
-
-&vop {
-	u-boot,dm-pre-reloc;
-};
-
 &cru {
 	u-boot,dm-pre-reloc;
 };

commit 3016d3d41a52996a504f3cfdc50fd2438b97423e
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Jan 31 17:25:44 2018 +0800

    rockchip: video: reserve memory for fb without bind video driver
    
    The video DM need to bind video driver before relocate in order to
    get the size need by video driver, which is fixed in rockchip platform,
    we can get it without bind the driver.
    
    With this patch, we don't need to enable the video/display nodes
    in pre-reloc, and we can get all these nodes from kernel dtb.
    
    Change-Id: I02d86b69e8c10bbf47e6b421c41b6dae20667a33
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index c5ef626907..473e139118 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -34,20 +34,6 @@ DECLARE_GLOBAL_DATA_PTR;
 static LIST_HEAD(rockchip_display_list);
 static LIST_HEAD(logo_cache_list);
 
-#ifdef CONFIG_DRM_ROCKCHIP_VIDEO_FRAMEBUFFER
- #define DRM_ROCKCHIP_FB_WIDTH		1920
- #define DRM_ROCKCHIP_FB_HEIGHT		1080
- #define DRM_ROCKCHIP_FB_BPP		VIDEO_BPP32
-#else
- #define DRM_ROCKCHIP_FB_WIDTH		0
- #define DRM_ROCKCHIP_FB_HEIGHT		0
- #define DRM_ROCKCHIP_FB_BPP		VIDEO_BPP32
-#endif
-
-#define MEMORY_POOL_SIZE	32 * 1024 * 1024
-#define DRM_ROCKCHIP_FB_SIZE \
-	VNBYTES(DRM_ROCKCHIP_FB_BPP) * DRM_ROCKCHIP_FB_WIDTH * DRM_ROCKCHIP_FB_HEIGHT
-
 static unsigned long memory_start;
 static unsigned long memory_end;
 
diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c
index 3036e3a1f2..79e9cc85d7 100644
--- a/drivers/video/video-uclass.c
+++ b/drivers/video/video-uclass.c
@@ -10,6 +10,9 @@
 #include <stdio_dev.h>
 #include <video.h>
 #include <video_console.h>
+#ifdef CONFIG_DRM_ROCKCHIP
+#include <video_rockchip.h>
+#endif
 #include <dm/lists.h>
 #include <dm/device-internal.h>
 #include <dm/uclass-internal.h>
@@ -73,6 +76,11 @@ int video_reserve(ulong *addrp)
 	ulong size;
 
 	gd->video_top = *addrp;
+#ifdef CONFIG_DRM_ROCKCHIP
+	size = DRM_ROCKCHIP_FB_SIZE + MEMORY_POOL_SIZE;
+	*addrp = *addrp - size;
+	*addrp &= ~((1 << 20) - 1);
+#else
 	for (uclass_find_first_device(UCLASS_VIDEO, &dev);
 	     dev;
 	     uclass_find_next_device(&dev)) {
@@ -80,6 +88,7 @@ int video_reserve(ulong *addrp)
 		debug("%s: Reserving %lx bytes at %lx for video device '%s'\n",
 		      __func__, size, *addrp, dev->name);
 	}
+#endif
 	gd->video_bottom = *addrp;
 	debug("Video frame buffers from %lx to %lx\n", gd->video_bottom,
 	      gd->video_top);
diff --git a/include/video_rockchip.h b/include/video_rockchip.h
index 4538e54463..ce764c8e46 100644
--- a/include/video_rockchip.h
+++ b/include/video_rockchip.h
@@ -7,6 +7,20 @@
 #ifndef VIDEO_ROCKCHIP_H
 #define VIDEO_ROCKCHIP_H
 
+#ifdef CONFIG_DRM_ROCKCHIP_VIDEO_FRAMEBUFFER
+ #define DRM_ROCKCHIP_FB_WIDTH		1920
+ #define DRM_ROCKCHIP_FB_HEIGHT		1080
+ #define DRM_ROCKCHIP_FB_BPP		VIDEO_BPP32
+#else
+ #define DRM_ROCKCHIP_FB_WIDTH		0
+ #define DRM_ROCKCHIP_FB_HEIGHT		0
+ #define DRM_ROCKCHIP_FB_BPP		VIDEO_BPP32
+#endif
+
+#define MEMORY_POOL_SIZE	32 * 1024 * 1024
+#define DRM_ROCKCHIP_FB_SIZE \
+	VNBYTES(DRM_ROCKCHIP_FB_BPP) * DRM_ROCKCHIP_FB_WIDTH * DRM_ROCKCHIP_FB_HEIGHT
+
 void rockchip_show_bmp(const char *bmp);
 void rockchip_show_logo(void);
 

commit d7386f60fcce4c90915357404b538808b1890ca1
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Wed Jan 31 11:43:17 2018 +0800

    usb: gadget: amend flash type for rockusb
    
    Add more flash type support for rockusb command.
    
    Change-Id: I8f2a2f6b5d1c3c5fb8824ce726cc3f0b6443d8ef
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index 5744a123de..6c07a730d7 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -142,8 +142,14 @@ static int rkusb_do_read_flash_id(struct fsg_common *common,
 {
 	u8 *buf = (u8 *)bh->buf;
 	u32 len = common->data_size;
+	enum if_type type = ums[common->lun].block_dev.if_type;
 
-	memcpy((void *)&buf[0], "EMMC ", 5);
+	if (type == IF_TYPE_MMC)
+		memcpy((void *)&buf[0], "EMMC ", 5);
+	else if (type == IF_TYPE_RKNAND)
+		memcpy((void *)&buf[0], "NAND ", 5);
+	else
+		memcpy((void *)&buf[0], "UNKN ", 5); /* unknown */
 
 	/* Set data xfer size */
 	common->residue = common->data_size_from_cmnd = len;

commit 31435dfd5dc22c100ec1196481cc666e5a34240d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 31 15:44:22 2018 +0800

    common: fdt_support: clean up bootargs combine
    
    1. use env_update() to combine bootargs which avoid variable repeat;
    2. use env_delete() to delete legacy property: "initrd=0x...,0x,,,".
    
    Change-Id: I5fd444a789df3f2ef9e527b9287e5173749cbb87
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/fdt_support.c b/common/fdt_support.c
index b9dfba7519..884db34119 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -291,7 +291,21 @@ int fdt_chosen(void *fdt)
 
 	str = env_get("bootargs");
 	if (str) {
-#ifndef CONFIG_ARCH_ROCKCHIP
+#ifdef CONFIG_ARCH_ROCKCHIP
+		const char *bootargs;
+
+		bootargs = fdt_getprop(fdt, nodeoffset, "bootargs", NULL);
+		if (bootargs) {
+			/* Append kernel bootargs */
+			env_update("bootargs", bootargs);
+			/*
+			 * Initrd fixup: remove unused "initrd=0x...,0x...",
+			 * this for compatible with legacy parameter.txt
+			 */
+			env_delete("bootargs", "initrd=");
+			str = env_get("bootargs");
+		}
+#endif
 		err = fdt_setprop(fdt, nodeoffset, "bootargs", str,
 				  strlen(str) + 1);
 		if (err < 0) {
@@ -299,31 +313,6 @@ int fdt_chosen(void *fdt)
 			       fdt_strerror(err));
 			return err;
 		}
-#else
-		const char *bootargs = NULL;
-		char buf[2048];
-
-		bootargs = fdt_getprop(fdt, nodeoffset, "bootargs", NULL);
-		if (bootargs) {
-			memset(buf, 0, sizeof(buf));
-			snprintf(buf, sizeof(buf), "%s %s", bootargs, str);
-			err = fdt_setprop(fdt, nodeoffset, "bootargs", buf,
-					  strlen(buf) + 1);
-			if (err < 0) {
-				printf("WARNING: could not set bootargs %s.\n",
-				       fdt_strerror(err));
-				return err;
-			}
-		} else {
-			err = fdt_setprop(fdt, nodeoffset, "bootargs", str,
-					  strlen(str) + 1);
-			if (err < 0) {
-				printf("WARNING: could not set bootargs %s.\n",
-				       fdt_strerror(err));
-				return err;
-			}
-		}
-#endif
 	}
 
 	return fdt_fixup_stdout(fdt, nodeoffset);

commit b7090c0ffd28e393b553a07db27df17a85e6f180
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 31 15:41:57 2018 +0800

    disk: part_rkparm: use env_delete() to delete initrd for cmdline
    
    delete unused "initrd=0x...,0x...", this for compatible
    with legacy parameter.txt.
    
    Change-Id: I9eb79578196ae4537b65e57a2776fdf0225de488
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/disk/part_rkparm.c b/disk/part_rkparm.c
index 686fa6ce29..d8b8389a4b 100644
--- a/disk/part_rkparm.c
+++ b/disk/part_rkparm.c
@@ -50,6 +50,12 @@ static int rkparm_param_parse(char *param, struct list_head *parts_head,
 	/* skip "CMDLINE:" */
 	env_update("bootargs", cmdline + strlen("CMDLINE:"));
 
+	/*
+	 * Initrd fixup: remove unused "initrd=0x...,0x...", this for
+	 * compatible with legacy parameter.txt
+	 */
+	env_delete("bootargs", "initrd=");
+
 	while (*next) {
 		if (*next == '-') {
 			size = (~0UL);

commit 3c9ee70130264b81f12769d0473f93f09cd066c1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 31 15:39:31 2018 +0800

    env: add env_delete()
    
    Change-Id: I3a94942b1670e641c8558c64dabca0155e53e2ea
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/cmd/nvedit.c b/cmd/nvedit.c
index 1809e6fe32..c063abfd2e 100644
--- a/cmd/nvedit.c
+++ b/cmd/nvedit.c
@@ -533,6 +533,37 @@ int env_exist(const char *varname, const char *varvalue)
 	return ret;
 }
 
+int env_delete(const char *varname, const char *varvalue)
+{
+	const char *str;
+	char *value, *start;
+
+	/* before import into hashtable */
+	if (!(gd->flags & GD_FLG_ENV_READY) || !varname)
+		return 1;
+
+	value = env_get(varname);
+	if (value) {
+		start = strstr(value, varvalue);
+		if (start) {
+			/* varvalue is not the last property */
+			str = strstr(start, " ");
+			if (str) {
+				/* Terminate, so cmdline can be dest for strcat() */
+				*start = '\0';
+				/* +1 to skip white space */
+				strcat((char *)value, (str + 1));
+			/* varvalue is the last property */
+			} else {
+				/* skip white space */
+				*(start - 1) = '\0';
+			}
+		}
+	}
+
+	return 0;
+}
+
 /**
  * Set an environment variable to an integer value
  *
diff --git a/include/common.h b/include/common.h
index 60f8555409..8230914d7a 100644
--- a/include/common.h
+++ b/include/common.h
@@ -349,6 +349,15 @@ int env_update(const char *varname, const char *varvalue);
  */
 int env_exist(const char *varname, const char *varvalue);
 
+/**
+ * env_delete() - delete sub value of an environment variable
+ *
+ * @varname: Variable to look up
+ * @value: Item head of value to delete
+ * @return 0 if ok, 1 on error
+ */
+int env_delete(const char *varname, const char *varvalue);
+
 /**
  * env_set_ulong() - set an environment variable to an integer
  *

commit 736ece61ebd9c7da1e9da9120e367677311b76df
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 31 15:26:26 2018 +0800

    Revert "disk: part_rkparm: add initrd fixup for cmdline"
    
    This reverts commit 8fb96674f6cda97c7675b1f1f15938ef4224ab62.
    
    Change-Id: I10c3ec88d8f21677cfdee8f766afd9272064964d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/disk/part_rkparm.c b/disk/part_rkparm.c
index 748012131c..686fa6ce29 100644
--- a/disk/part_rkparm.c
+++ b/disk/part_rkparm.c
@@ -40,8 +40,6 @@ static int rkparm_param_parse(char *param, struct list_head *parts_head,
 	char *pend;
 	int len, offset = 0;
 	unsigned long size, start;
-	char *initrd;
-	const char *str;
 
 	if (!cmdline) {
 		printf("invalid parameter\n");
@@ -49,20 +47,6 @@ static int rkparm_param_parse(char *param, struct list_head *parts_head,
 	}
 
 	*cmdline_end = '\0';
-
-	/*
-	 * Initrd fixup: remove unused "initrd=0x...,0x...", this for
-	 * compatible with legacy parameter.txt
-	 */
-	initrd = strstr(cmdline, "initrd=");
-	if (initrd) {
-		str = strstr(initrd, " ");
-		/* Terminate, so cmdline can be dest for strcat() */
-		*initrd = '\0';
-		/* +1 to skip current white space */
-		strcat((char *)cmdline, (str + 1));
-	}
-
 	/* skip "CMDLINE:" */
 	env_update("bootargs", cmdline + strlen("CMDLINE:"));
 

commit 105f3d76b62a1c2858934923b0f714710bd9ec5f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 30 16:39:46 2018 +0800

    rockchip: test-key: refactor code
    
    use platform_key_read() interface.
    
    Change-Id: I7d8add0a57e818eb73dc098c6f86b5967ad8b554
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/test/rockchip/test-key.c b/test/rockchip/test-key.c
index bd76ba96f5..45bf521515 100644
--- a/test/rockchip/test-key.c
+++ b/test/rockchip/test-key.c
@@ -5,367 +5,23 @@
  */
 
 #include <asm/io.h>
-#include <adc.h>
 #include <common.h>
 #include <console.h>
 #include <dm.h>
-#include <errno.h>
-#include <fdtdec.h>
-#include <malloc.h>
-#include <irq-generic.h>
-#include <irq-platform.h>
 #include <key.h>
+#include <linux/input.h>
 #include "test-rockchip.h"
-
-enum {
-	INVAL_KEY = 0,
-	ADC_KEY,
-	GPIO_KEY,
-	PMIC_KEY,
-};
-
-struct adc_key {
-	u8 channel;
-	int value;
-	int microvolt;
-	int margin;
-	int vref;
-};
-
-struct gpio_key {
-	int irq;
-};
-
-struct key_info {
-	const char *name;
-	int type;
-	struct adc_key adc;
-	struct gpio_key gpio;
-};
-
-#define ADC_MARGIN		30
-#define PMIC_PWRKEY_CNT		1
-
-static int g_key_count;
-
-static void gpio_irq_handler(int irq, void *data)
-{
-	struct key_info *key = data;
-
-	printf("gpio_irq_handler: irq=%d, key name=%s\n", irq, key->name);
-}
-
-static struct key_info *parse_dt_adc_key_node(const void *blob,
-					      int adc_key_node,
-					      struct key_info *keys)
-{
-	struct key_info *key = keys;
-	u32 adc_channels[2];
-	int node, vref, err;
-
-	/* Get vref */
-	vref = fdtdec_get_int(blob, adc_key_node,
-			      "keyup-threshold-microvolt", -1);
-	if (vref < 0) {
-		printf("failed read 'keyup-threshold-microvolt', ret=%d\n", vref);
-		return NULL;
-	}
-
-	/* Get io channel */
-	err = fdtdec_get_int_array(blob, adc_key_node, "io-channels",
-				   adc_channels, 2);
-	if (err) {
-		printf("failed read 'io-channels' of %s key, ret=%d\n", key->name, err);
-		return NULL;
-	}
-
-	/* Parse every adc key data */
-	for (node = fdt_first_subnode(blob, adc_key_node);
-	     node >= 0;
-	     node = fdt_next_subnode(blob, node), key++) {
-		key->name = fdt_getprop(blob, node, "label", NULL);
-		key->type = ADC_KEY;
-		key->adc.vref = vref;
-		key->adc.margin = ADC_MARGIN;
-		key->adc.channel = adc_channels[1];
-		key->adc.microvolt = fdtdec_get_int(blob, node,
-				      "press-threshold-microvolt", -1);
-		if (key->adc.microvolt < 0) {
-			printf("failed read 'press-threshold-microvolt' of %s key, ret=%d\n",
-			       key->name, key->adc.microvolt);
-			return NULL;
-		}
-		/* Convert microvolt to adc value */
-		key->adc.value = key->adc.microvolt / (key->adc.vref / 1024);
-	}
-
-	return key;
-}
-
-static struct key_info *parse_dt_rockchip_key_node(const void *blob,
-						   int rockchip_key_node,
-						   struct key_info *keys)
-{
-	struct key_info *key = keys;
-	u32 gpios[2], adc_channels[2];
-	int node, err, adcval, irq;
-
-	/* Get io channel */
-	err = fdtdec_get_int_array(blob, rockchip_key_node, "io-channels",
-				   adc_channels, 2);
-	if (err) {
-		printf("failed read 'io-channels' of %s key, ret=%d\n", key->name, err);
-		return NULL;
-	}
-
-	/* Parse every adc/gpio key data */
-	for (node = fdt_first_subnode(blob, rockchip_key_node);
-	     node >= 0;
-	     node = fdt_next_subnode(blob, node), key++) {
-		adcval = fdtdec_get_int(blob, node,
-					"rockchip,adc_value", -1);
-		/* This is a adc key */
-		if (adcval >= 0) {
-			key->name = fdt_getprop(blob, node, "label", NULL);
-			key->type = ADC_KEY;
-			key->adc.value = adcval;
-			key->adc.margin = ADC_MARGIN;
-			key->adc.channel = adc_channels[1];
-		/* This is a gpio key */
-		} else {
-			key->name = fdt_getprop(blob, node, "label", NULL);
-			key->type = GPIO_KEY;
-			err = fdtdec_get_int_array(blob, node, "gpios", gpios, 2);
-			if (err) {
-				printf("failed read 'gpios' of %s key, ret=%d\n", key->name, err);
-				return NULL;
-			}
-			irq = phandle_gpio_to_irq(gpios[0], gpios[1]);
-			key->gpio.irq = irq;
-			irq_install_handler(irq, gpio_irq_handler, key);
-			irq_handler_enable(irq);
-			irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);
-		}
-	}
-
-	return key;
-}
-
-static struct key_info *parse_dt_gpio_key_node(const void *blob,
-					       int gpio_key_node,
-					       struct key_info *keys)
-{
-	struct key_info *key = keys;
-	u32 gpios[2];
-	int node, irq, err;
-
-	for (node = fdt_first_subnode(blob, gpio_key_node);
-	     node >= 0;
-	     node = fdt_next_subnode(blob, node), key++) {
-		key->name = fdt_getprop(blob, node, "label", NULL);
-		key->type = GPIO_KEY;
-		err = fdtdec_get_int_array(blob, node, "gpios", gpios, 2);
-		if (err) {
-			printf("failed read 'gpios' of %s key, ret=%d\n", key->name, err);
-			return NULL;
-		}
-		irq = phandle_gpio_to_irq(gpios[0], gpios[1]);
-		key->gpio.irq = irq;
-		irq_install_handler(irq, gpio_irq_handler, key);
-		irq_handler_enable(irq);
-		irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);
-	}
-
-	return key;
-}
-
-static struct key_info *keys_init(void)
-{
-	const char *key_name = "pmic-power";
-	const void *blob = gd->fdt_blob;
-	struct key_info *key, *keys;
-	struct udevice *dev;
-	int adc_key_node, rockchip_key_node, gpio_key_node, i;
-	int adc_key_compat = 0, rockchip_key_compat = 0, gpio_key_compat = 0;
-	int count = 0;
-	const char *label[4] = { "INVAL", "ADC", "GPIO", "PMIC", };
-	/*
-	 * "rockchip,key": rockchip inner version;
-	 * "adc-keys": upsteam version;
-	 */
-	adc_key_node = fdt_node_offset_by_compatible(blob, 0, "adc-keys");
-	if (adc_key_node >= 0) {
-		if (!fdtdec_get_is_enabled(blob, adc_key_node)) {
-			printf("'adc-keys' node is disabled\n");
-		} else {
-			adc_key_compat = 1;
-			count += fdtdec_get_child_count(blob, adc_key_node);
-			printf("find 'adc-keys', board total %d keys\n", count);
-		}
-	}
-
-	rockchip_key_node = fdt_node_offset_by_compatible(blob, 0, "rockchip,key");
-	if (rockchip_key_node >= 0) {
-		if (!fdtdec_get_is_enabled(blob, rockchip_key_node)) {
-			printf("'rockchip,key' node is disabled\n");
-		} else {
-			rockchip_key_compat = 1;
-			count += fdtdec_get_child_count(blob, rockchip_key_node);
-			printf("find 'rockchip,key', board total %d keys\n", count);
-		}
-	}
-
-	gpio_key_node = fdt_node_offset_by_compatible(blob, 0, "gpio-keys");
-	if (gpio_key_node >= 0) {
-		if (!fdtdec_get_is_enabled(blob, gpio_key_node)) {
-			printf("'gpio-keys' node is disabled\n");
-		} else {
-			gpio_key_compat = 1;
-			count += fdtdec_get_child_count(blob, gpio_key_node);
-			printf("find 'gpio-key', board total %d keys\n", count);
-		}
-	}
-
-	/* reserve more for pmic pwrkey or gpio pwrkey */
-	g_key_count = count + PMIC_PWRKEY_CNT;
-	keys = calloc(g_key_count, sizeof(*key));
-	if (!keys) {
-		printf("calloc for key failed\n");
-		return NULL;
-	}
-
-	key = keys;
-
-	/* Parse adc_key_compat node */
-	if (adc_key_compat) {
-		key = parse_dt_adc_key_node(blob, adc_key_node, key);
-		if (!key) {
-			printf("parse_dt_adc_key_node failed\n");
-			goto out;
-		}
-	}
-	/* Parse rockchip_key_compat node */
-	if (rockchip_key_compat) {
-		key = parse_dt_rockchip_key_node(blob, rockchip_key_node, key);
-		if (!key) {
-			printf("parse_dt_rockchip_key_node failed\n");
-			goto out;
-		}
-	}
-	/* Parse gpio_key_compat node */
-	if (gpio_key_compat) {
-		key = parse_dt_gpio_key_node(blob, gpio_key_node, key);
-		if (!key) {
-			printf("parse_dt_gpio_key_node failed\n");
-			goto out;
-		}
-	}
-
-	/* Parse PMIC pwrkey */
-	if (uclass_get_device_by_name(UCLASS_KEY, "pwrkey", &dev)) {
-		/* PMIC pwrkey not included */
-		g_key_count -= PMIC_PWRKEY_CNT;
-		printf("PMIC pwrkey not found, and will not be tested\n");
-	} else {
-		key->name = key_name;
-		key->type = PMIC_KEY;
-		printf("find 'pmic-power', board total %d keys\n", g_key_count);
-	}
-
-	printf("Support %d keys are:\n", g_key_count);
-	for (i = 0; i < g_key_count; i++) {
-		printf("\tkey-%d: name=%s, type=%s, "
-		       "[ADC]: channel=%d, vref=%d, "
-		       "microvolt=%d, value=%d, margin=%d "
-		       "[GPIO]: IRQ=%d:\n",
-		       i, keys[i].name, label[keys[i].type],
-		       keys[i].adc.channel, keys[i].adc.vref,
-		       keys[i].adc.microvolt, keys[i].adc.value,
-		       keys[i].adc.margin, keys[i].gpio.irq);
-	}
-
-	return keys;
-
-out:
-	free(keys);
-
-	return NULL;
-}
-
-static int key_test(struct key_info *keys)
+	
+int board_key_test(int argc, char * const argv[])
 {
-	struct udevice *dev = NULL;
-	struct key_info *key;
-	unsigned int adcval;
-	int adc_h, adc_l;
-	int err, i;
-
-	if (g_key_count == 0) {
-		printf("Find total 0 keys, finish test\n");
-		goto out;
-	}
-
-	printf("\nPress or release keys(Exit test by 'ctrl + c').. Start!\n");
 	while (!ctrlc()) {
-		mdelay(100);
-		for (i = 0, key = keys; i < g_key_count; i++, key++) {
-			if (key->type == ADC_KEY) {
-				err = adc_channel_single_shot("saradc",
-						key->adc.channel, &adcval);
-				if (err) {
-					printf("\t%s: read saradc value failed\n", key->name);
-				} else {
-					adc_h = key->adc.value + key->adc.margin;
-					if (key->adc.value > key->adc.margin)
-						adc_l = key->adc.value - key->adc.margin;
-					else
-						adc_l = key->adc.value;
-
-					if ((adcval <= adc_h) && (adcval >= adc_l))
-						printf("\t%s: pressed down\n", key->name);
-				}
-			} else if (key->type == GPIO_KEY) {
-				/* it is a irq, so nothing to do */
-			} else if (key->type == PMIC_KEY) {
-				if (!dev) {
-					err = uclass_get_device_by_name(UCLASS_KEY, "pwrkey", &dev);
-					if (err) {
-						printf("get %s key failed\n", key->name);
-						goto out;
-					}
-				}
-				if (key_read(dev) == KEY_PRESS_DOWN)
-					printf("\t%s: pressed down\n", key->name);
-			} else {
-				printf("%s: Unknown key type!\n", key->name);
-			}
-		}
-	}
-
-	for (i = 0, key = keys; i < g_key_count; i++, key++) {
-		if (key->type == GPIO_KEY) {
-			printf("release irq of %s key\n", key->name);
-			irq_free_handler(key->gpio.irq);
-		}
+		mdelay(50);
+		platform_key_read(KEY_VOLUMEUP);
+		mdelay(50);
+		platform_key_read(KEY_VOLUMEDOWN);
+		mdelay(50);
+		platform_key_read(KEY_POWER);
 	}
 
 	return 0;
-
-out:
-	free(keys);
-
-	return -EINVAL;
-}
-
-int board_key_test(int argc, char * const argv[])
-{
-	struct key_info *keys;
-
-	keys = keys_init();
-	if (!keys) {
-		printf("%s: keys init failed\n", __func__);
-		return -EINVAL;
-	}
-
-	return key_test(keys);
 }

commit a7b534a020837deb2425e7821feb51cd7c95c4ef
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 30 15:59:15 2018 +0800

    input: rk8xx: refactor code
    
    match key uclass framework.
    
    Change-Id: Ib3677514483d7f6f08479100fae2046e4f3bdb4e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/rk8xx_pwrkey.c b/drivers/input/rk8xx_pwrkey.c
index e5d99d358a..68530a6fd0 100644
--- a/drivers/input/rk8xx_pwrkey.c
+++ b/drivers/input/rk8xx_pwrkey.c
@@ -28,7 +28,12 @@
 #define RK805_PWRON_RISE_INT	(1 << 0)
 #define RK805_PWRON_FALL_INT	(1 << 7)
 
-struct key_data {
+struct reg_data {
+	u8 reg;
+	u8 val;
+};
+
+struct rk8xx_key_priv {
 	u8 int_sts_reg;
 	u8 int_msk_reg;
 	u8 pwron_rise_int;
@@ -37,13 +42,6 @@ struct key_data {
 	u32 init_reg_num;
 	struct reg_data *irq_reg;
 	u32 irq_reg_num;
-	uint64_t key_down_t;
-	uint64_t key_up_t;
-};
-
-struct reg_data {
-	u8 reg;
-	u8 val;
 };
 
 static struct reg_data rk816_init_reg[] = {
@@ -76,92 +74,84 @@ static struct reg_data rk805_init_reg[] = {
 	{ RK805_INT_STS_REG, 0xff },
 };
 
-static inline uint64_t arch_counter_get_cntpct(void)
+static int rk8xx_pwrkey_read(struct udevice *dev, int code)
 {
-	uint64_t cval = 0;
-
-	isb();
-#ifdef CONFIG_ARM64
-	asm volatile("mrs %0, cntpct_el0" : "=r" (cval));
-#else
-	asm volatile ("mrrc p15, 0, %Q0, %R0, c14" : "=r" (cval));
-#endif
-	return cval;
-}
+	struct input_key *key = dev_get_platdata(dev);
+	u32 report = KEY_NOT_EXIST;
 
-static uint64_t get_ms(uint64_t base)
-{
-	return (arch_counter_get_cntpct() / 24000UL) - base;
-}
+	if (key->code != code)
+		goto out;
 
-static int rk8xx_pwrkey_read(struct udevice *dev)
-{
-	struct key_data *key = dev_get_priv(dev);
-	u32 report = KEY_PRESS_NONE;
-
-	if ((key->key_up_t > key->key_down_t) &&
-	    (key->key_up_t - key->key_down_t) >= KEY_LONG_DOWN_MS) {
-		debug("%s: long key ms: %llu\n", __func__, key->key_up_t - key->key_down_t);
-		key->key_up_t = 0;
-		key->key_down_t = 0;
+	debug("%s: long key ms: %llu\n",
+	      __func__, key->up_t - key->down_t);
+
+	if ((key->up_t > key->down_t) &&
+	    (key->up_t - key->down_t) >= KEY_LONG_DOWN_MS) {
+		key->up_t = 0;
+		key->down_t = 0;
 		report = KEY_PRESS_LONG_DOWN;
-	} else if (key->key_down_t && get_ms(key->key_down_t) >= KEY_LONG_DOWN_MS) {
-		debug("%s: long key (hold) ms: %llu\n", __func__, key->key_up_t - key->key_down_t);
-		key->key_up_t = 0;
-		key->key_down_t = 0;
+		printf("'%s' key long pressed down\n", key->name);
+	} else if (key->down_t &&
+		   key_get_timer(key->down_t) >= KEY_LONG_DOWN_MS) {
+		key->up_t = 0;
+		key->down_t = 0;
 		report = KEY_PRESS_LONG_DOWN;
-	} else if ((key->key_up_t > key->key_down_t) &&
-		   (key->key_up_t - key->key_down_t) < KEY_LONG_DOWN_MS) {
-		debug("%s: short key ms: %llu\n", __func__, key->key_up_t - key->key_down_t);
-		key->key_up_t = 0;
-		key->key_down_t = 0;
+		printf("'%s' key long pressed down(hold)\n", key->name);
+	} else if ((key->up_t > key->down_t) &&
+		   (key->up_t - key->down_t) < KEY_LONG_DOWN_MS) {
+		key->up_t = 0;
+		key->down_t = 0;
 		report = KEY_PRESS_DOWN;
+		printf("'%s' key pressed down\n", key->name);
 	} else {
-		debug("%s: key up: %llu, down: %llu\n", __func__, key->key_up_t, key->key_down_t);
+		report = KEY_PRESS_NONE;
 	}
 
+out:
 	return report;
 }
 
 static void pwrkey_irq_handler(int irq, void *data)
 {
 	struct udevice *dev = data;
-	struct key_data *key = dev_get_priv(dev);
+	struct rk8xx_key_priv *priv = dev_get_priv(dev);
+	struct input_key *key = dev_get_platdata(dev);
 	int ret, val, i;
 
 	/* read status */
-	val = pmic_reg_read(dev->parent, key->int_sts_reg);
+	val = pmic_reg_read(dev->parent, priv->int_sts_reg);
 	if (val < 0) {
 		printf("%s: i2c read failed, ret=%d\n", __func__, val);
 		return;
 	}
 
 	/* fall event */
-	if (val & key->pwron_fall_int) {
-		key->key_down_t = get_ms(0);
-		debug("%s: key down: %llu ms\n", __func__, key->key_down_t);
+	if (val & priv->pwron_fall_int) {
+		key->down_t = key_get_timer(0);
+		debug("%s: key down: %llu ms\n", __func__, key->down_t);
 	}
 
 	/* rise event */
-	if (val & key->pwron_rise_int) {
-		key->key_up_t = get_ms(0);
-		debug("%s: key up: %llu ms\n", __func__, key->key_up_t);
+	if (val & priv->pwron_rise_int) {
+		key->up_t = key_get_timer(0);
+		debug("%s: key up: %llu ms\n", __func__, key->up_t);
 	}
 
 	/* clear intertup */
-	for (i = 0; i < key->irq_reg_num; i++) {
+	for (i = 0; i < priv->irq_reg_num; i++) {
 		ret = pmic_reg_write(dev->parent,
-				     key->irq_reg[i].reg,
-				     key->irq_reg[i].val);
+				     priv->irq_reg[i].reg,
+				     priv->irq_reg[i].val);
 		if (ret < 0) {
 			printf("%s: i2c write reg 0x%x failed, ret=%d\n",
-			       __func__, key->irq_reg[i].reg, ret);
+			       __func__, priv->irq_reg[i].reg, ret);
 		}
 	}
 }
 
 static int pwrkey_interrupt_init(struct udevice *dev)
 {
+	struct input_key *key = dev_get_platdata(dev);
 	u32 interrupt[2], phandle;
 	int irq, ret;
 
@@ -177,6 +167,8 @@ static int pwrkey_interrupt_init(struct udevice *dev)
 		return ret;
 	}
 
+	key->name = "pwrkey";
+	key->code = KEY_POWER;
 	irq = phandle_gpio_to_irq(phandle, interrupt[0]);
 	irq_install_handler(irq, pwrkey_irq_handler, dev);
 	irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);
@@ -186,38 +178,37 @@ static int pwrkey_interrupt_init(struct udevice *dev)
 }
 
 static const struct dm_key_ops key_ops = {
-	.type = KEY_POWER,
-	.name = "pmic-pwrkey",
+	.name = "rk8xx-pwrkey",
 	.read = rk8xx_pwrkey_read,
 };
 
 static int rk8xx_pwrkey_probe(struct udevice *dev)
 {
 	struct rk8xx_priv *rk8xx = dev_get_priv(dev->parent);
-	struct key_data *key = dev_get_priv(dev);
+	struct rk8xx_key_priv *priv = dev_get_priv(dev);
 	int ret, i;
 
 	switch (rk8xx->variant) {
 	case RK805_ID:
-		key->int_sts_reg = RK805_INT_STS_REG;
-		key->int_msk_reg = RK805_INT_MSK_REG;
-		key->pwron_rise_int = RK805_PWRON_RISE_INT;
-		key->pwron_fall_int = RK805_PWRON_FALL_INT;
-		key->init_reg = rk805_init_reg;
-		key->init_reg_num = ARRAY_SIZE(rk805_init_reg);
-		key->irq_reg = rk805_irq_reg;
-		key->irq_reg_num = ARRAY_SIZE(rk805_irq_reg);
+		priv->int_sts_reg = RK805_INT_STS_REG;
+		priv->int_msk_reg = RK805_INT_MSK_REG;
+		priv->pwron_rise_int = RK805_PWRON_RISE_INT;
+		priv->pwron_fall_int = RK805_PWRON_FALL_INT;
+		priv->init_reg = rk805_init_reg;
+		priv->init_reg_num = ARRAY_SIZE(rk805_init_reg);
+		priv->irq_reg = rk805_irq_reg;
+		priv->irq_reg_num = ARRAY_SIZE(rk805_irq_reg);
 		break;
 
 	case RK816_ID:
-		key->int_sts_reg = RK816_INT_STS_REG1;
-		key->int_msk_reg = RK816_INT_MSK_REG1;
-		key->pwron_rise_int = RK816_PWRON_RISE_INT;
-		key->pwron_fall_int = RK816_PWRON_FALL_INT;
-		key->init_reg = rk816_init_reg;
-		key->init_reg_num = ARRAY_SIZE(rk816_init_reg);
-		key->irq_reg = rk816_irq_reg;
-		key->irq_reg_num = ARRAY_SIZE(rk816_irq_reg);
+		priv->int_sts_reg = RK816_INT_STS_REG1;
+		priv->int_msk_reg = RK816_INT_MSK_REG1;
+		priv->pwron_rise_int = RK816_PWRON_RISE_INT;
+		priv->pwron_fall_int = RK816_PWRON_FALL_INT;
+		priv->init_reg = rk816_init_reg;
+		priv->init_reg_num = ARRAY_SIZE(rk816_init_reg);
+		priv->irq_reg = rk816_irq_reg;
+		priv->irq_reg_num = ARRAY_SIZE(rk816_irq_reg);
 		break;
 
 	default:
@@ -225,13 +216,13 @@ static int rk8xx_pwrkey_probe(struct udevice *dev)
 	}
 
 	/* mask and clear intertup */
-	for (i = 0; i < key->init_reg_num; i++) {
+	for (i = 0; i < priv->init_reg_num; i++) {
 		ret = pmic_reg_write(dev->parent,
-				     key->init_reg[i].reg,
-				     key->init_reg[i].val);
+				     priv->init_reg[i].reg,
+				     priv->init_reg[i].val);
 		if (ret < 0) {
 			printf("%s: i2c write reg 0x%x failed, ret=%d\n",
-			       __func__, key->init_reg[i].reg, ret);
+			       __func__, priv->init_reg[i].reg, ret);
 			return ret;
 		}
 	}
@@ -242,7 +233,8 @@ static int rk8xx_pwrkey_probe(struct udevice *dev)
 U_BOOT_DRIVER(rk8xx_pwrkey) = {
 	.name   = "rk8xx_pwrkey",
 	.id     = UCLASS_KEY,
-	.probe  = rk8xx_pwrkey_probe,
 	.ops	= &key_ops,
-	.priv_auto_alloc_size = sizeof(struct key_data),
+	.probe  = rk8xx_pwrkey_probe,
+	.platdata_auto_alloc_size = sizeof(struct input_key),
+	.priv_auto_alloc_size = sizeof(struct rk8xx_key_priv),
 };

commit debee64a8e8c44ca5b01d539d7d48b532dc98467
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 30 15:33:52 2018 +0800

    input: key: add rk key driver
    
    rk key device node can contain adc key and gpio key.
    
    Change-Id: I6e3bd4022bba6324c35d2c317183a6a2cb69ed06
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig
index 968f4f7820..85eb573323 100644
--- a/drivers/input/Kconfig
+++ b/drivers/input/Kconfig
@@ -65,3 +65,10 @@ config GPIO_KEY
 	default y
 	help
 	  This adds a driver for the gpio keys support.
+
+config RK_KEY
+	bool "Enable rk keys support"
+	depends on DM_KEY
+	default y
+	help
+	  This adds a driver for the rk keys support.
diff --git a/drivers/input/Makefile b/drivers/input/Makefile
index ce36187403..73235e1d88 100644
--- a/drivers/input/Makefile
+++ b/drivers/input/Makefile
@@ -24,3 +24,4 @@ obj-y += input.o
 obj-$(CONFIG_$(SPL_)OF_CONTROL) += key_matrix.o
 obj-$(CONFIG_ADC_KEY) += adc_key.o
 obj-$(CONFIG_GPIO_KEY) += gpio_key.o
+obj-$(CONFIG_RK_KEY) += rk_key.o
diff --git a/drivers/input/rk_key.c b/drivers/input/rk_key.c
new file mode 100644
index 0000000000..1f68872ae1
--- /dev/null
+++ b/drivers/input/rk_key.c
@@ -0,0 +1,221 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <dm.h>
+#include <adc.h>
+#include <common.h>
+#include <console.h>
+#include <dm.h>
+#include <errno.h>
+#include <fdtdec.h>
+#include <malloc.h>
+#include <key.h>
+#include <linux/input.h>
+#include <errno.h>
+#include <dm/read.h>
+#include <irq-generic.h>
+#include <irq-platform.h>
+
+#define ADC_MARGIN		30
+#define MAX_KEY_NR		10
+
+struct rk_key_priv {
+	u32 key_nr;
+};
+
+enum {
+	INVAL_KEY = 0,
+	ADC_KEY,
+	GPIO_KEY,
+};
+
+static void gpio_irq_handler(int irq, void *data)
+{
+	struct udevice *dev = data;
+	struct rk_key_priv *priv = dev_get_priv(dev);
+	struct input_key *key = dev_get_platdata(dev);
+	int i;
+
+	for (i = 0; i < priv->key_nr; i++) {
+		if (key[i].irq != irq)
+			continue;
+
+		/* up event */
+		if (irq_get_gpio_level(irq)) {
+			key[i].up_t = key_get_timer(0);
+			debug("%s: key down: %llu ms\n",
+			      key[i].name, key[i].down_t);
+		/* down event */
+		} else {
+			key[i].down_t = key_get_timer(0);
+			debug("%s: key up: %llu ms\n",
+			      key[i].name, key[i].up_t);
+		}
+		/* Must delay */
+		mdelay(10);
+		irq_revert_irq_type(irq);
+	}
+}
+
+static int rk_keys_ofdata_to_platdata(struct udevice *dev)
+{
+	struct rk_key_priv *priv = dev_get_priv(dev);
+	struct input_key *key = dev_get_platdata(dev);
+	u32 adc_channels[2], gpios[2], adcval, i = 0;
+	ofnode node;
+	int irq;
+
+	/* Get IO channel */
+	if (dev_read_u32_array(dev, "io-channels", adc_channels, 2)) {
+		printf("%s: failed to read 'io-channels'\n", __func__);
+		return -EINVAL;
+	}
+
+	dev_for_each_subnode(node, dev) {
+		/* This is an ACD key */
+		if (!ofnode_read_u32(node, "rockchip,adc_value", &adcval)) {
+			key[i].name = ofnode_read_string(node, "label");
+			key[i].flag = ADC_KEY;
+			key[i].margin = ADC_MARGIN;
+			key[i].value = adcval;
+			key[i].channel = adc_channels[1];
+			if (ofnode_read_u32(node, "linux,code", &key[i].code)) {
+				printf("%s: failed to read 'linux,code'\n",
+				       key[i].name);
+				return -EINVAL;
+			}
+		/* This is a GPIO key */
+		} else {
+			key[i].name = ofnode_read_string(node, "label");
+			key[i].flag = GPIO_KEY;
+			if (ofnode_read_u32_array(node, "gpios", gpios, 2)) {
+				printf("%s: failed to read 'gpios'\n",
+				       key[i].name);
+				return -EINVAL;
+			}
+			if (ofnode_read_u32(node, "linux,code", &key[i].code)) {
+				printf("%s: failed read 'linux,code'\n",
+				       key[i].name);
+				return -EINVAL;
+			}
+
+			/* Request irq */
+			irq = phandle_gpio_to_irq(gpios[0], gpios[1]);
+			if (irq < 0) {
+				printf("%s: failed to request irq, ret=%d\n",
+				       __func__, irq);
+				return irq;
+			}
+			key[i].irq = irq;
+			irq_install_handler(irq, gpio_irq_handler, dev);
+			irq_handler_enable(irq);
+			irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);
+		}
+
+		debug("%s: name=%s: code=%d, val=%d, channel=%d, flag=%d, margin=%d\n",
+		      __func__, key[i].name, key[i].code, key[i].value,
+		      key[i].channel, key[i].flag, key[i].margin);
+
+		/* Next node */
+		i++;
+		priv->key_nr = i;
+		if (i >= MAX_KEY_NR) {
+			printf("Too many keys, Max support: %d\n", MAX_KEY_NR);
+			return -EINVAL;
+		}
+	}
+
+	return 0;
+}
+
+static int rk_keys_read(struct udevice *dev, int code)
+{
+	struct rk_key_priv *priv = dev_get_priv(dev);
+	struct input_key *key = dev_get_platdata(dev);
+	int report = KEY_NOT_EXIST;
+	int max, min, i = 0;
+	unsigned int adcval;
+
+	for (i = 0; i < priv->key_nr; i++) {
+		if (key[i].code != code)
+			continue;
+
+		if (key[i].flag == ADC_KEY) {
+			if (adc_channel_single_shot("saradc",
+						    key[i].channel, &adcval)) {
+				printf("%s: failed to read saradc\n",
+				       key[i].name);
+			} else {
+				/* Get min, max */
+				max = key[i].value + key[i].margin;
+				if (key[i].value > key[i].margin)
+					min = key[i].value - key[i].margin;
+				else
+					min = key[i].value;
+
+				/* Check */
+				if ((adcval <= max) && (adcval >= min)) {
+					report = KEY_PRESS_DOWN;
+					printf("'%s' key pressed down\n",
+					       key[i].name);
+				} else {
+					report = KEY_PRESS_NONE;
+				}
+			}
+			break;
+		} else {
+			debug("%s: ms: %llu, up=%llu, down=%llu\n",
+			      key[i].name, key[i].up_t - key[i].down_t,
+			      key[i].up_t, key[i].down_t);
+
+			if (key[i].down_t && (key[i].up_t > key[i].down_t) &&
+			    (key[i].up_t - key[i].down_t) >= KEY_LONG_DOWN_MS) {
+				key[i].up_t = 0;
+				key[i].down_t = 0;
+				report = KEY_PRESS_LONG_DOWN;
+				printf("'%s' key long pressed down\n",
+				       key[i].name);
+			} else if (key[i].down_t && key_get_timer(key[i].down_t) >=
+				   KEY_LONG_DOWN_MS) {
+				key[i].up_t = 0;
+				key[i].down_t = 0;
+				report = KEY_PRESS_LONG_DOWN;
+				printf("'%s' key long pressed down(hold)\n",
+				       key[i].name);
+			} else if ((key[i].up_t > key[i].down_t) &&
+				   (key[i].up_t - key[i].down_t) < KEY_LONG_DOWN_MS) {
+				key[i].up_t = 0;
+				key[i].down_t = 0;
+				report = KEY_PRESS_DOWN;
+				printf("'%s' key pressed down\n", key[i].name);
+			} else {
+				report = KEY_PRESS_NONE;
+			}
+		}
+	}
+
+	return report;
+}
+
+static const struct dm_key_ops key_ops = {
+	.name = "rk-keys",
+	.read = rk_keys_read,
+};
+
+static const struct udevice_id rk_keys_ids[] = {
+	{ .compatible = "rockchip,key" },
+	{ },
+};
+
+U_BOOT_DRIVER(rk_keys) = {
+	.name   = "rk-keys",
+	.id     = UCLASS_KEY,
+	.ops	= &key_ops,
+	.of_match = rk_keys_ids,
+	.ofdata_to_platdata = rk_keys_ofdata_to_platdata,
+	.platdata_auto_alloc_size = sizeof(struct input_key) * MAX_KEY_NR,
+	.priv_auto_alloc_size = sizeof(struct rk_key_priv),
+};

commit c8be85008ac42d56764e8ada454b0b25360934f6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 30 15:31:02 2018 +0800

    input: key: add gpio key driver
    
    use gpio interrupt to detect key event.
    
    Change-Id: I5eea25ef6da26f6aaefd99458ee08189b696df87
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig
index 0c49b3884a..968f4f7820 100644
--- a/drivers/input/Kconfig
+++ b/drivers/input/Kconfig
@@ -58,3 +58,10 @@ config ADC_KEY
 	default y
 	help
 	  This adds a driver for the adc keys support.
+
+config GPIO_KEY
+	bool "Enable gpio keys support"
+	depends on DM_KEY
+	default y
+	help
+	  This adds a driver for the gpio keys support.
diff --git a/drivers/input/Makefile b/drivers/input/Makefile
index 2b7c05747c..ce36187403 100644
--- a/drivers/input/Makefile
+++ b/drivers/input/Makefile
@@ -23,3 +23,4 @@ endif
 obj-y += input.o
 obj-$(CONFIG_$(SPL_)OF_CONTROL) += key_matrix.o
 obj-$(CONFIG_ADC_KEY) += adc_key.o
+obj-$(CONFIG_GPIO_KEY) += gpio_key.o
diff --git a/drivers/input/gpio_key.c b/drivers/input/gpio_key.c
new file mode 100644
index 0000000000..f14eec9a40
--- /dev/null
+++ b/drivers/input/gpio_key.c
@@ -0,0 +1,163 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <dm.h>
+#include <adc.h>
+#include <common.h>
+#include <console.h>
+#include <dm.h>
+#include <errno.h>
+#include <fdtdec.h>
+#include <malloc.h>
+#include <key.h>
+#include <linux/input.h>
+#include <errno.h>
+#include <dm/read.h>
+#include <irq-generic.h>
+#include <irq-platform.h>
+
+#define MAX_KEY_NR	10
+
+struct gpio_key_priv {
+	u32 key_nr;
+};
+
+static void gpio_irq_handler(int irq, void *data)
+{
+	struct udevice *dev = data;
+	struct gpio_key_priv *priv = dev_get_priv(dev);
+	struct input_key *key = dev_get_platdata(dev);
+	int i;
+
+	for (i = 0; i < priv->key_nr; i++) {
+		if (key[i].irq != irq)
+			continue;
+
+		/* up event */
+		if (irq_get_gpio_level(irq)) {
+			key[i].up_t = key_get_timer(0);
+			debug("%s: key down: %llu ms\n",
+			      key[i].name, key[i].down_t);
+		/* down event */
+		} else {
+			key[i].down_t = key_get_timer(0);
+			debug("%s: key up: %llu ms\n",
+			      key[i].name, key[i].up_t);
+		}
+		/* Must delay */
+		mdelay(10);
+		irq_revert_irq_type(irq);
+	}
+}
+
+static int gpio_key_ofdata_to_platdata(struct udevice *dev)
+{
+	struct gpio_key_priv *priv = dev_get_priv(dev);
+	struct input_key *key = dev_get_platdata(dev);
+	u32 gpios[2], i = 0;
+	ofnode node;
+	int irq;
+
+	dev_for_each_subnode(node, dev) {
+		key[i].name = ofnode_read_string(node, "label");
+		if (ofnode_read_u32(node, "linux,code", &key[i].code)) {
+			printf("failed read 'linux,code' of %s key\n",
+			       key[i].name);
+			return -EINVAL;
+		}
+		if (ofnode_read_u32_array(node, "gpios", gpios, 2)) {
+			printf("failed to read 'gpios' of %s key\n",
+			       key[i].name);
+			return -EINVAL;
+		}
+
+		/* Must register as interrupt, be able to wakeup system */
+		irq = phandle_gpio_to_irq(gpios[0], gpios[1]);
+		if (irq < 0) {
+			printf("failed to request irq for gpio, ret=%d\n", irq);
+			return irq;
+		}
+		key[i].irq = irq;
+		irq_install_handler(irq, gpio_irq_handler, dev);
+		irq_handler_enable(irq);
+		irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);
+
+		debug("%s: name=%s: code=%d\n",
+		      __func__, key[i].name, key[i].code);
+
+		/* Next node */
+		i++;
+		priv->key_nr = i;
+		if (i >= MAX_KEY_NR) {
+			printf("Too many keys, Max support: %d\n", MAX_KEY_NR);
+			return -EINVAL;
+		}
+	}
+
+	return 0;
+}
+
+static int gpio_key_read(struct udevice *dev, int code)
+{
+	struct gpio_key_priv *priv = dev_get_priv(dev);
+	struct input_key *key = dev_get_platdata(dev);
+	u32 report = KEY_NOT_EXIST;
+	int i = 0;
+
+	for (i = 0; i < priv->key_nr; i++) {
+		if (key[i].code != code)
+			continue;
+
+		debug("%s: long key ms: %llu, up=%llu, down=%llu\n",
+		      key[i].name, key[i].up_t - key[i].down_t,
+		      key[i].up_t, key[i].down_t);
+
+		if (key[i].down_t && (key[i].up_t > key[i].down_t) &&
+		    (key[i].up_t - key[i].down_t) >= KEY_LONG_DOWN_MS) {
+			key[i].up_t = 0;
+			key[i].down_t = 0;
+			report = KEY_PRESS_LONG_DOWN;
+			printf("'%s' key long pressed down\n", key[i].name);
+		} else if (key[i].down_t && key_get_timer(key[i].down_t) >=
+			   KEY_LONG_DOWN_MS) {
+			key[i].up_t = 0;
+			key[i].down_t = 0;
+			report = KEY_PRESS_LONG_DOWN;
+			printf("'%s' key long pressed down(hold)\n",
+			       key[i].name);
+		} else if ((key[i].up_t > key[i].down_t) &&
+			   (key[i].up_t - key[i].down_t) < KEY_LONG_DOWN_MS) {
+			key[i].up_t = 0;
+			key[i].down_t = 0;
+			report = KEY_PRESS_DOWN;
+			printf("'%s' key pressed down\n", key[i].name);
+		} else {
+			report = KEY_PRESS_NONE;
+		}
+	}
+
+	return report;
+}
+
+static const struct dm_key_ops key_ops = {
+	.name = "gpio-keys",
+	.read = gpio_key_read,
+};
+
+static const struct udevice_id gpio_key_ids[] = {
+	{ .compatible = "gpio-keys" },
+	{ },
+};
+
+U_BOOT_DRIVER(gpio_keys) = {
+	.name   = "gpio-keys",
+	.id     = UCLASS_KEY,
+	.of_match = gpio_key_ids,
+	.ops	= &key_ops,
+	.ofdata_to_platdata = gpio_key_ofdata_to_platdata,
+	.platdata_auto_alloc_size = sizeof(struct input_key) * MAX_KEY_NR,
+	.priv_auto_alloc_size = sizeof(struct gpio_key_priv),
+};

commit 68ed833817dbfd84dd9abe87c046b4573a71be9b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 30 15:28:08 2018 +0800

    input: key: add adc key driver
    
    Change-Id: I07c044942aa89309c48c79e26a86c3a61437deec
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig
index 69fea3cb0d..0c49b3884a 100644
--- a/drivers/input/Kconfig
+++ b/drivers/input/Kconfig
@@ -51,3 +51,10 @@ config RK8XX_PWRKEY
 	default y
 	help
 	  This adds a driver for the RK805/816 pwrkey support.
+
+config ADC_KEY
+	bool "Enable adc keys support"
+	depends on DM_KEY
+	default y
+	help
+	  This adds a driver for the adc keys support.
diff --git a/drivers/input/Makefile b/drivers/input/Makefile
index 510c4d1cef..2b7c05747c 100644
--- a/drivers/input/Makefile
+++ b/drivers/input/Makefile
@@ -22,3 +22,4 @@ obj-$(CONFIG_PS2MULT) += ps2mult.o ps2ser.o
 endif
 obj-y += input.o
 obj-$(CONFIG_$(SPL_)OF_CONTROL) += key_matrix.o
+obj-$(CONFIG_ADC_KEY) += adc_key.o
diff --git a/drivers/input/adc_key.c b/drivers/input/adc_key.c
new file mode 100644
index 0000000000..bf25f10198
--- /dev/null
+++ b/drivers/input/adc_key.c
@@ -0,0 +1,141 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <dm.h>
+#include <dm/read.h>
+#include <adc.h>
+#include <common.h>
+#include <console.h>
+#include <errno.h>
+#include <fdtdec.h>
+#include <malloc.h>
+#include <key.h>
+#include <linux/input.h>
+
+#define ADC_MARGIN		30
+#define MAX_KEY_NR		10
+
+struct adc_key_priv {
+	u32 key_nr;
+};
+
+static int adc_keys_ofdata_to_platdata(struct udevice *dev)
+{
+	struct adc_key_priv *priv = dev_get_priv(dev);
+	struct input_key *key = dev_get_platdata(dev);
+	u32 adc_channels[2], i = 0, microvolt;
+	int vref, err;
+	ofnode node;
+
+	/* Get vref */
+	vref = dev_read_u32_default(dev, "keyup-threshold-microvolt", -1);
+	if (vref < 0) {
+		printf("failed to read 'keyup-threshold-microvolt', ret=%d\n",
+		       vref);
+		return -EINVAL;
+	}
+
+	/* Get IO channel */
+	err = dev_read_u32_array(dev, "io-channels", adc_channels, 2);
+	if (err) {
+		printf("failed to read 'io-channels' of %s key, ret=%d\n",
+		       key->name, err);
+		return -EINVAL;
+	}
+
+	/* Parse every adc key data */
+	dev_for_each_subnode(node, dev) {
+		key[i].name = ofnode_read_string(node, "label");
+		key[i].vref = vref;
+		key[i].margin = ADC_MARGIN;
+		key[i].channel = adc_channels[1];
+		if (ofnode_read_u32(node, "linux,code", &key[i].code)) {
+			printf("%s: failed to read 'linux,code', ret=%d\n",
+			       key[i].name, key[i].code);
+			return -EINVAL;
+		}
+		if (ofnode_read_u32(node, "press-threshold-microvolt",
+				    &microvolt)) {
+			printf("%s: failed read 'press-threshold-microvolt', ret=%d\n",
+			       key[i].name, microvolt);
+			return -EINVAL;
+		}
+		/* Convert microvolt to adc value */
+		key[i].value = microvolt / (key[i].vref / 1024);
+
+		debug("%s: name=%s: code=%d, vref=%d, margin=%d, channel=%d, val=%d\n",
+		      __func__, key[i].name, key[i].code, key[i].vref,
+		      key[i].margin, key[i].channel, key[i].value);
+
+		/* Next node */
+		i++;
+		priv->key_nr = i;
+		if (i >= MAX_KEY_NR) {
+			printf("Too many keys, Max support: %d\n", MAX_KEY_NR);
+			return -EINVAL;
+		}
+	}
+
+	return 0;
+}
+
+static int adc_keys_read(struct udevice *dev, int code)
+{
+	struct adc_key_priv *priv = dev_get_priv(dev);
+	struct input_key *key = dev_get_platdata(dev);
+	int report = KEY_NOT_EXIST;
+	int max, min, i = 0;
+	unsigned int adcval;
+
+	for (i = 0; i < priv->key_nr; i++) {
+		if (key[i].code != code)
+			continue;
+
+		if (adc_channel_single_shot("saradc",
+					    key[i].channel, &adcval)) {
+			printf("%s: failed to read saradc\n", key[i].name);
+		} else {
+			/* Get min, max */
+			max = key[i].value + key[i].margin;
+			if (key[i].value > key[i].margin)
+				min = key[i].value - key[i].margin;
+			else
+				min = key[i].value;
+
+			/* Check */
+			if ((adcval <= max) && (adcval >= min)) {
+				report = KEY_PRESS_DOWN;
+				printf("'%s' key pressed down\n",
+				       key[i].name);
+			} else {
+				report = KEY_PRESS_NONE;
+			}
+		}
+		break;
+	}
+
+	return report;
+}
+
+static const struct dm_key_ops key_ops = {
+	.name = "adc_keys",
+	.read = adc_keys_read,
+};
+
+static const struct udevice_id adc_keys_ids[] = {
+	{ .compatible = "adc-keys" },
+	{ },
+};
+
+U_BOOT_DRIVER(adc_keys) = {
+	.name   = "adc-keys",
+	.id     = UCLASS_KEY,
+	.ops	= &key_ops,
+	.of_match = adc_keys_ids,
+	.ofdata_to_platdata = adc_keys_ofdata_to_platdata,
+	.platdata_auto_alloc_size = sizeof(struct input_key) * MAX_KEY_NR,
+	.priv_auto_alloc_size = sizeof(struct adc_key_priv),
+};

commit d4e1125bbcfb417adfb3dc61cfbb8f1dd72da9c4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 30 15:38:33 2018 +0800

    power: charge animation: use platform_read_key()
    
    Change-Id: Idbcec18cfacb74305880c8e207e51b1ff204a948
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 525d44dcac..c5471bc71e 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -35,7 +35,6 @@ struct charge_image {
 struct charge_animation_priv {
 	struct udevice *pmic;
 	struct udevice *fg;
-	struct udevice *pwrkey;
 	const struct charge_image *image;
 	int image_num;
 };
@@ -170,11 +169,11 @@ static int charge_animation_ofdata_to_platdata(struct udevice *dev)
 	return 0;
 }
 
-static int check_key_press(struct udevice *dev)
+static int check_key_press(void)
 {
 	u32 state;
 
-	state = key_read(dev);
+	state = platform_key_read(KEY_POWER);
 	if (state < 0)
 		printf("read power key failed: %d\n", state);
 
@@ -232,7 +231,6 @@ static int charge_animation_show(struct udevice *dev)
 	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
 	struct charge_animation_priv *priv = dev_get_priv(dev);
 	const struct charge_image *image = priv->image;
-	struct udevice *pwrkey = priv->pwrkey;
 	struct udevice *pmic = priv->pmic;
 	struct udevice *fg = priv->fg;
 	const char *preboot = env_get("preboot");
@@ -424,7 +422,7 @@ static int charge_animation_show(struct udevice *dev)
 		 * Short key event: turn on/off screen;
 		 * Long key event: show logo and boot system or still charging.
 		 */
-		key_state = check_key_press(pwrkey);
+		key_state = check_key_press();
 		if (key_state == KEY_PRESS_DOWN) {
 			/* NULL means show nothing, ie. turn off screen */
 			if (screen_on)
@@ -516,7 +514,7 @@ static const struct dm_charge_display_ops charge_animation_ops = {
 static int charge_animation_probe(struct udevice *dev)
 {
 	struct charge_animation_priv *priv = dev_get_priv(dev);
-	struct udevice *pwrkey, *fg, *pmic;
+	struct udevice *fg, *pmic;
 	int ret;
 
 	/* Get PMIC */
@@ -527,20 +525,6 @@ static int charge_animation_probe(struct udevice *dev)
 	}
 	priv->pmic = pmic;
 
-	/* Get power key */
-	for (uclass_first_device(UCLASS_KEY, &pwrkey);
-	     pwrkey;
-	     uclass_next_device(&pwrkey)) {
-		if (key_type(pwrkey) == KEY_POWER) {
-			priv->pwrkey = pwrkey;
-			break;
-		}
-	}
-	if (!priv->pwrkey) {
-		printf("Can't find any power key\n");
-		return -ENOSYS;
-	}
-
 	/* Get fuel gauge */
 	ret = uclass_get_device(UCLASS_FG, 0, &fg);
 	if (ret) {

commit a2df960601036d3fd0d00ea8f43cdde52b5eddbe
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 30 15:34:49 2018 +0800

    dm: key: provide universal key read interface
    
    clean up code.
    
    Change-Id: I532be111dc971ff0fdd9014e7e01a13ea50483fd
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/key-uclass.c b/drivers/input/key-uclass.c
index 6abd1cf3c0..4a437c920e 100644
--- a/drivers/input/key-uclass.c
+++ b/drivers/input/key-uclass.c
@@ -6,35 +6,62 @@
 
 #include <dm.h>
 #include <key.h>
+#include <common.h>
+#include <dm.h>
 
-int key_read(struct udevice *dev)
+static inline uint64_t arch_counter_get_cntpct(void)
 {
-	const struct dm_key_ops *ops = dev_get_driver_ops(dev);
+	uint64_t cval = 0;
 
-	if (!ops || !ops->read)
-		return -ENOSYS;
+	isb();
+#ifdef CONFIG_ARM64
+	asm volatile("mrs %0, cntpct_el0" : "=r" (cval));
+#else
+	asm volatile ("mrrc p15, 0, %Q0, %R0, c14" : "=r" (cval));
+#endif
+	return cval;
+}
+
+uint64_t key_get_timer(uint64_t base)
+{
+	uint64_t cntpct;
+
+	cntpct = arch_counter_get_cntpct() / 24000UL;
+	return (cntpct > base) ? (cntpct - base) : 0;
+}
 
-	return ops->read(dev);
+static int key_state_valid(int state)
+{
+	return (state >= KEY_PRESS_NONE && state < KEY_NOT_EXIST);
 }
 
-int key_type(struct udevice *dev)
+static int key_read(struct udevice *dev, int code)
 {
 	const struct dm_key_ops *ops = dev_get_driver_ops(dev);
 
-	if (!ops || !ops->type)
+	if (!ops || !ops->read)
 		return -ENOSYS;
 
-	return ops->type;
+	return ops->read(dev, code);
 }
 
-const char *key_name(struct udevice *dev)
+int platform_key_read(int code)
 {
-	const struct dm_key_ops *ops = dev_get_driver_ops(dev);
+	struct udevice *dev;
+	int report = KEY_NOT_EXIST;
 
-	if (!ops || !ops->name)
-		return NULL;
+	for (uclass_first_device(UCLASS_KEY, &dev);
+	     dev;
+	     uclass_next_device(&dev)) {
+		debug("key dev.name = %s, code = %d\n", dev->name, code);
+		report = key_read(dev, code);
+		if (key_state_valid(report)) {
+			debug("key dev.name = %s, state=%d\n", dev->name, report);
+			break;
+		}
+	}
 
-	return ops->name;
+	return report;
 }
 
 UCLASS_DRIVER(key) = {
diff --git a/include/key.h b/include/key.h
index f5fe4fb5fe..fcbd4274d5 100644
--- a/include/key.h
+++ b/include/key.h
@@ -14,16 +14,31 @@ enum key_state {
 	KEY_PRESS_UP,
 	KEY_PRESS_DOWN,
 	KEY_PRESS_LONG_DOWN,
+	KEY_NOT_EXIST,
 };
 
 struct dm_key_ops {
 	int type;
 	const char *name;
-	int (*read)(struct udevice *dev);
+	int (*read)(struct udevice *dev, int code);
+	int (*exist)(struct udevice *dev, int code);
 };
 
-int key_read(struct udevice *dev);
-int key_type(struct udevice *dev);
-const char *key_label(struct udevice *dev);
+struct input_key {
+	const char *name;
+	u32 code;
+	u32 channel;
+	u32 value;
+	u32 margin;
+	u32 vref;
+	int flag;
+
+	u32 irq;
+	u64 up_t;
+	u64 down_t;
+};
+
+uint64_t key_get_timer(uint64_t base);
+int platform_key_read(int code);
 
 #endif

commit 6e806ac8f70b0de1a04bdb09a6caeaaf0a4197e9
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jan 26 10:14:00 2018 +0800

    android: fix rockchip_get_resource_file compile warning
    
    Change-Id: Ie510718333ef379f733ee50fed40058225281a7e
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/image-android.c b/common/image-android.c
index 382157af16..0013f33cb2 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -10,6 +10,9 @@
 #include <malloc.h>
 #include <mapmem.h>
 #include <errno.h>
+#ifdef CONFIG_RKIMG_BOOTLOADER
+#include <asm/arch/resource_img.h>
+#endif
 
 #define ANDROID_IMAGE_DEFAULT_KERNEL_ADDR	0x10008000
 #define ANDROID_ARG_FDT_FILENAME "rk-kernel.dtb"
@@ -164,7 +167,8 @@ int android_image_get_fdt(const struct andr_img_hdr *hdr,
 	*rd_data += ALIGN(hdr->kernel_size, hdr->page_size);
 	*rd_data += ALIGN(hdr->ramdisk_size, hdr->page_size);
 #ifdef CONFIG_RKIMG_BOOTLOADER
-	*rd_data += (rockchip_get_resource_file(*rd_data, ANDROID_ARG_FDT_FILENAME))
+	*rd_data += (rockchip_get_resource_file((void *)*rd_data,
+		     ANDROID_ARG_FDT_FILENAME))
 			* 512;
 #endif
 	return 0;

commit 058af259c3c8870ae6718057811714b67901b8bd
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Jan 29 15:14:37 2018 +0800

    configs: rockchip: rv1108: enable BOUNCE_BUFFER
    
    Rockchip sfc will use bounce buffer to deal with
    dma transfer.
    
    Change-Id: Ib4bf7aad7e2078e2fa0526df46f2ca3670132326
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h
index 08198f06a3..065ecc8193 100644
--- a/include/configs/rv1108_common.h
+++ b/include/configs/rv1108_common.h
@@ -21,6 +21,8 @@
 
 #define CONFIG_ROCKUSB_G_DNL_PID	0x110A
 
+#define CONFIG_BOUNCE_BUFFER
+
 /* usb mass storage */
 #define CONFIG_USB_FUNCTION_MASS_STORAGE
 

commit da4954b709e6dc01ce8fd99d07e846a514baa39c
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Fri Jan 26 17:49:51 2018 +0800

    spi: rockchip_sfc: store command/addr in independent var
    
    Store command/address/read write mode/which passed from
    upper spi flash framework in independt var will make things
    easier when handle it.
    
    Change-Id: I65d645b2e1a53e18a7605c9496a6c43e938c91b4
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/drivers/spi/rockchip_sfc.c b/drivers/spi/rockchip_sfc.c
index 0537bec565..48f2457338 100644
--- a/drivers/spi/rockchip_sfc.c
+++ b/drivers/spi/rockchip_sfc.c
@@ -41,6 +41,10 @@ struct rockchip_sfc {
 	unsigned int speed_hz;
 	u32 cmd;
 	u32 addr;
+	u8 addr_bits;
+	u8 dummy_bits;
+	u8 rw;
+	u32 trb;
 };
 
 static int rockchip_sfc_ofdata_to_platdata(struct udevice *bus)
@@ -148,7 +152,7 @@ static u8 rockchip_sfc_get_if_type(struct rockchip_sfc *sfc)
 {
 	int type = IF_TYPE_STD;
 
-	if (sfc->cmd & SFC_WR) {
+	if (sfc->rw == SFC_WR) {
 		if (sfc->mode & SPI_TX_QUAD)
 			type = IF_TYPE_QUAD;
 		else if (sfc->mode & SPI_TX_DUAL)
@@ -167,13 +171,13 @@ static u8 rockchip_sfc_get_if_type(struct rockchip_sfc *sfc)
 	return type;
 }
 
-static void rockchip_sfc_setup_xfer(struct rockchip_sfc *sfc)
+static void rockchip_sfc_setup_xfer(struct rockchip_sfc *sfc, u32 trb)
 {
 	struct rockchip_sfc_reg *regs = sfc->regbase;
 	u32 val = 0x02;
 	u8 data_width = IF_TYPE_STD;
 
-	if (sfc->cmd & SFC_ADDR_XBITS)
+	if (sfc->addr_bits & SFC_ADDR_XBITS)
 		data_width = rockchip_sfc_get_if_type(sfc);
 
 	val |= (data_width << SFC_DATA_WIDTH_SHIFT);
@@ -181,12 +185,20 @@ static void rockchip_sfc_setup_xfer(struct rockchip_sfc *sfc)
 	rockchip_sfc_wait_idle(sfc, 10);
 
 	writel(val, &regs->ctrl);
-	writel(sfc->cmd, &regs->cmd);
-	if (sfc->cmd & SFC_ADDR_XBITS)
+
+	val = sfc->cmd;
+	val |= trb << SFC_TRB_SHIFT;
+	val |= sfc->rw << SFC_RW_SHIFT;
+	val |= sfc->addr_bits << SFC_ADDR_BITS_SHIFT;
+	val |= sfc->dummy_bits << SFC_DUMMY_BITS_SHIFT;
+
+	writel(val, &regs->cmd);
+
+	if (sfc->addr_bits & SFC_ADDR_XBITS)
 		writel(sfc->addr, &regs->addr);
 }
 
-static int rockchip_sfc_do_dma_xfer(struct rockchip_sfc *sfc, u32 *buffer)
+static int rockchip_sfc_do_dma_xfer(struct rockchip_sfc *sfc, u32 *buffer, u32 trb)
 {
 	struct rockchip_sfc_reg *regs = sfc->regbase;
 	int timeout = 1000;
@@ -194,7 +206,7 @@ static int rockchip_sfc_do_dma_xfer(struct rockchip_sfc *sfc, u32 *buffer)
 	int risr;
 	unsigned long tbase;
 
-	rockchip_sfc_setup_xfer(sfc);
+	rockchip_sfc_setup_xfer(sfc, trb);
 
 	writel(0xFFFFFFFF, &regs->iclr);
 	writel((u32)buffer, &regs->dmaaddr);
@@ -219,25 +231,22 @@ static int rockchip_sfc_do_dma_xfer(struct rockchip_sfc *sfc, u32 *buffer)
 static int rockchip_sfc_dma_xfer(struct rockchip_sfc *sfc, u32 *buf, u32 len)
 {
 	u32 trb;
-	u32 *p32_data = buf;
 	int ret = 0;
 
 	while (len) {
 		trb = min(len, (u32)SFC_MAX_TRB);
-		sfc->cmd &= ~SFC_TRB_MASK;
-		sfc->cmd |= (trb << SFC_TRB_SHIFT);
-		ret = rockchip_sfc_do_dma_xfer(sfc, p32_data);
+		ret = rockchip_sfc_do_dma_xfer(sfc, buf, trb);
 		if (ret < 0)
 			break;
 		len -= trb;
 		sfc->addr += trb;
-		p32_data += (trb >> 2);
+		buf += (trb >> 2);
 	}
 
 	return ret;
 }
 
-static int rockchip_sfc_wait_fifo_ready(struct rockchip_sfc *sfc, int wr,
+static int rockchip_sfc_wait_fifo_ready(struct rockchip_sfc *sfc, int rw,
 					u32 timeout)
 {
 	struct rockchip_sfc_reg *regs = sfc->regbase;
@@ -247,7 +256,7 @@ static int rockchip_sfc_wait_fifo_ready(struct rockchip_sfc *sfc, int wr,
 
 	do {
 		fsr = readl(&regs->fsr);
-		if (wr)
+		if (rw == SFC_WR)
 			level = (fsr & SFC_TXLV_MASK) >> SFC_TXLV_SHIFT;
 		else
 			level = (fsr & SFC_RXLV_MASK) >> SFC_RXLV_SHIFT;
@@ -259,7 +268,7 @@ static int rockchip_sfc_wait_fifo_ready(struct rockchip_sfc *sfc, int wr,
 	return level;
 }
 
-static int rockchip_sfc_write(struct rockchip_sfc *sfc, u32 *buf, u32 len)
+static int rockchip_sfc_write_fifo(struct rockchip_sfc *sfc, u32 *buf, u32 len)
 {
 	struct rockchip_sfc_reg *regs = sfc->regbase;
 	u32 bytes = len & 0x3;
@@ -269,7 +278,7 @@ static int rockchip_sfc_write(struct rockchip_sfc *sfc, u32 *buf, u32 len)
 	u8 count;
 
 	while (words) {
-		tx_level = rockchip_sfc_wait_fifo_ready(sfc, 1, 1000);
+		tx_level = rockchip_sfc_wait_fifo_ready(sfc, SFC_WR, 1000);
 		if (tx_level <= 0)
 			return tx_level;
 		count = min(words, (u32)tx_level);
@@ -278,9 +287,9 @@ static int rockchip_sfc_write(struct rockchip_sfc *sfc, u32 *buf, u32 len)
 		words -= count;
 	}
 
-	/* handle the last none word aligned bytes */
+	/* handle the last non 4byte aligned bytes */
 	if (bytes) {
-		tx_level = rockchip_sfc_wait_fifo_ready(sfc, 1, 1000);
+		tx_level = rockchip_sfc_wait_fifo_ready(sfc, SFC_WR, 1000);
 		if (tx_level <= 0)
 			return tx_level;
 		memcpy(&val, buf, bytes);
@@ -290,7 +299,7 @@ static int rockchip_sfc_write(struct rockchip_sfc *sfc, u32 *buf, u32 len)
 	return 0;
 }
 
-static int rockchip_sfc_read(struct rockchip_sfc *sfc, u32 *buf, u32 len)
+static int rockchip_sfc_read_fifo(struct rockchip_sfc *sfc, u32 *buf, u32 len)
 {
 	struct rockchip_sfc_reg *regs = sfc->regbase;
 	u32 bytes = len & 0x3;
@@ -300,7 +309,7 @@ static int rockchip_sfc_read(struct rockchip_sfc *sfc, u32 *buf, u32 len)
 	u32 val;
 
 	while (words) {
-		rx_level = rockchip_sfc_wait_fifo_ready(sfc, 0, 1000);
+		rx_level = rockchip_sfc_wait_fifo_ready(sfc, SFC_RD, 1000);
 		if (rx_level <= 0)
 			return rx_level;
 		count = min(words, (u32)rx_level);
@@ -309,9 +318,9 @@ static int rockchip_sfc_read(struct rockchip_sfc *sfc, u32 *buf, u32 len)
 		words -= count;
 	}
 
-	/* handle the last none word aligned bytes */
+	/* handle the last non 4 bytes aligned bytes */
 	if (bytes) {
-		rx_level = rockchip_sfc_wait_fifo_ready(sfc, 0, 1000);
+		rx_level = rockchip_sfc_wait_fifo_ready(sfc, SFC_RD, 1000);
 		if (rx_level <= 0)
 			return rx_level;
 		val = readl(&regs->data);
@@ -324,16 +333,13 @@ static int rockchip_sfc_read(struct rockchip_sfc *sfc, u32 *buf, u32 len)
 static int rockchip_sfc_pio_xfer(struct rockchip_sfc *sfc, u32 *buf, u32 len)
 {
 	int ret = 0;
-	int rw = sfc->cmd & SFC_WR;
 
-	sfc->cmd &= ~SFC_TRB_MASK;
-	sfc->cmd |= (len << SFC_TRB_SHIFT);
-	rockchip_sfc_setup_xfer(sfc);
+	rockchip_sfc_setup_xfer(sfc, len);
 	if (len) {
-		if (rw)
-			ret = rockchip_sfc_write(sfc, buf, len);
+		if (sfc->rw == SFC_WR)
+			ret = rockchip_sfc_write_fifo(sfc, buf, len);
 		else
-			ret = rockchip_sfc_read(sfc, buf, len);
+			ret = rockchip_sfc_read_fifo(sfc, buf, len);
 	}
 
 	return ret;
@@ -380,8 +386,13 @@ static int rockchip_sfc_xfer(struct udevice *dev, unsigned int bitlen,
 	if (flags & SPI_XFER_BEGIN) {
 		sfc->cmd = pcmd[0];
 		if (len >= 4) {
-			sfc->cmd |= SFC_ADDR_24BITS | (((len - 4) * 8) << 8);
+			sfc->addr_bits = SFC_ADDR_24BITS;
+			sfc->dummy_bits = (len - 4) << 3;
 			sfc->addr = pcmd[3] | (pcmd[2] << 8) | (pcmd[1] << 16);
+		} else {
+			sfc->addr_bits = 0;
+			sfc->dummy_bits = 0;
+			sfc->addr = 0;
 		}
 	}
 
@@ -389,13 +400,14 @@ static int rockchip_sfc_xfer(struct udevice *dev, unsigned int bitlen,
 		len = 0;
 
 	if (flags & SPI_XFER_END) {
-		if (dout)
-			sfc->cmd |= SFC_WR;
 
-		if (din)
+		if (din) {
+			sfc->rw = SFC_RD;
 			ret = rockchip_sfc_do_xfer(sfc, (u32 *)din, len);
-		else if (dout)
+		} else if (dout) {
+			sfc->rw = SFC_WR;
 			ret = rockchip_sfc_do_xfer(sfc, (u32 *)dout, len);
+		}
 	}
 
 	return ret;
diff --git a/drivers/spi/rockchip_sfc.h b/drivers/spi/rockchip_sfc.h
index b8650564ed..2aefb0fa17 100644
--- a/drivers/spi/rockchip_sfc.h
+++ b/drivers/spi/rockchip_sfc.h
@@ -37,16 +37,21 @@ check_member(rockchip_sfc_reg, data, 0x108);
 #define SFC_DATA_WIDTH_MASK	GENMASK(13, 12)
 #define SFC_ADDR_WIDTH_SHIFT	10
 #define SFC_ADDR_WIDTH_MASK	GENMASK(11, 10)
-#define SFC_CMD_WIDTH_SHIT	8
+#define SFC_CMD_WIDTH_SHIFT	8
 #define SFC_CMD_WIDTH_MASK	GENMASK(9, 8)
 #define SFC_DATA_SHIFT_NEGETIVE	BIT(1)
 
 /*SFC_CMD*/
-#define SFC_WR			BIT(12)
-#define SFC_ADDR_0BITS		(0 << 14)
-#define SFC_ADDR_24BITS		(1 << 14)
-#define SFC_ADDR_32BITS		(2 << 14)
-#define SFC_ADDR_XBITS		(3 << 14)
+#define SFC_DUMMY_BITS_SHIFT	8
+#define SFC_RW_SHIFT		12
+#define SFC_WR			1
+#define SFC_RD			0
+#define SFC_ADDR_BITS_SHIFT	14
+#define SFC_ADDR_BITS_MASK	GENMASK(15, 14)
+#define SFC_ADDR_0BITS		0
+#define SFC_ADDR_24BITS		1
+#define SFC_ADDR_32BITS		2
+#define SFC_ADDR_XBITS		3
 #define SFC_TRB_SHIFT		(16)
 #define SFC_TRB_MASK		GENMASK(29, 16)
 

commit 915fcf0c3061cb9b81b291ddaefd01dd73af0735
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Thu Jan 18 09:01:06 2018 +0800

    spi: rockchip_sfc: check the SFC_SR in timeout mode
    
    When the SFC is in busy state, we wait for a while(timeout)
    before reset it.
    
    Change-Id: I3e8734126b6e3b1f9a2391ebe0f402635a18d76f
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/drivers/spi/rockchip_sfc.c b/drivers/spi/rockchip_sfc.c
index 580795aec0..0537bec565 100644
--- a/drivers/spi/rockchip_sfc.c
+++ b/drivers/spi/rockchip_sfc.c
@@ -116,6 +116,34 @@ static int rockchip_sfc_reset(struct rockchip_sfc *sfc)
 	return ret;
 }
 
+/* The SFC_CTRL register is a global control register,
+ * when the controller is in busy state(SFC_SR),
+ * SFC_CTRL cannot be set.
+ */
+static int rockchip_sfc_wait_idle(struct rockchip_sfc *sfc,
+                                  u32 timeout_ms)
+{
+	struct rockchip_sfc_reg *regs = sfc->regbase;
+	unsigned long tbase = get_timer(0);
+	u32 sr, fsr;
+
+	while (1) {
+		sr = readl(&regs->sr);
+		fsr = readl(&regs->fsr);
+		if ((fsr & SFC_TX_EMPTY) && (fsr & SFC_RX_EMPTY) && !(sr & SFC_BUSY))
+			break;
+		if (get_timer(tbase) > timeout_ms) {
+			printf("waite sfc idle timeout(sr:0x%08x fsr:0x%08x)\n",
+				sr, fsr);
+			rockchip_sfc_reset(sfc);
+			return -ETIMEDOUT;
+		}
+		udelay(100);
+	}
+
+	return 0;
+}
+
 static u8 rockchip_sfc_get_if_type(struct rockchip_sfc *sfc)
 {
 	int type = IF_TYPE_STD;
@@ -143,18 +171,15 @@ static void rockchip_sfc_setup_xfer(struct rockchip_sfc *sfc)
 {
 	struct rockchip_sfc_reg *regs = sfc->regbase;
 	u32 val = 0x02;
-	u32 fsr = readl(&regs->fsr);
-	u32 sr = readl(&regs->sr);
 	u8 data_width = IF_TYPE_STD;
 
-	if (!(fsr & SFC_TX_EMPTY) || !(fsr & SFC_RX_EMPTY) || (sr & SFC_BUSY))
-		rockchip_sfc_reset(sfc);
-
 	if (sfc->cmd & SFC_ADDR_XBITS)
 		data_width = rockchip_sfc_get_if_type(sfc);
 
 	val |= (data_width << SFC_DATA_WIDTH_SHIFT);
 
+	rockchip_sfc_wait_idle(sfc, 10);
+
 	writel(val, &regs->ctrl);
 	writel(sfc->cmd, &regs->cmd);
 	if (sfc->cmd & SFC_ADDR_XBITS)
@@ -239,7 +264,7 @@ static int rockchip_sfc_write(struct rockchip_sfc *sfc, u32 *buf, u32 len)
 	struct rockchip_sfc_reg *regs = sfc->regbase;
 	u32 bytes = len & 0x3;
 	u32 words = len >> 2;
-	u32 tx_level = 0;
+	int tx_level = 0;
 	u32 val = 0;
 	u8 count;
 
@@ -247,7 +272,7 @@ static int rockchip_sfc_write(struct rockchip_sfc *sfc, u32 *buf, u32 len)
 		tx_level = rockchip_sfc_wait_fifo_ready(sfc, 1, 1000);
 		if (tx_level <= 0)
 			return tx_level;
-		count = min(words, tx_level);
+		count = min(words, (u32)tx_level);
 		writesl(&regs->data, buf, count);
 		buf += count;
 		words -= count;
@@ -270,7 +295,7 @@ static int rockchip_sfc_read(struct rockchip_sfc *sfc, u32 *buf, u32 len)
 	struct rockchip_sfc_reg *regs = sfc->regbase;
 	u32 bytes = len & 0x3;
 	u32 words = len >> 2;
-	u32 rx_level = 0;
+	int rx_level = 0;
 	u32 count;
 	u32 val;
 
@@ -278,7 +303,7 @@ static int rockchip_sfc_read(struct rockchip_sfc *sfc, u32 *buf, u32 len)
 		rx_level = rockchip_sfc_wait_fifo_ready(sfc, 0, 1000);
 		if (rx_level <= 0)
 			return rx_level;
-		count = min(words, rx_level);
+		count = min(words, (u32)rx_level);
 		readsl(&regs->data, buf, count);
 		buf += count;
 		words -= count;

commit 6bf6464692c7c2969bc3dbeb7e5b39f8162d5f24
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Thu Jan 18 08:42:38 2018 +0800

    spi: rockchip_sfc: transfer the non 4 bytes aligned data bytes in pio mode
    
    4 bytes aligned is required  for dma transfer mode, so
    switch to pio mode when get a non 4 bytes aligned transfer.
    
    Change-Id: I66118b7380d10deed3a0c82a897e407fb96db5fc
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/drivers/spi/rockchip_sfc.c b/drivers/spi/rockchip_sfc.c
index 4388e51920..580795aec0 100644
--- a/drivers/spi/rockchip_sfc.c
+++ b/drivers/spi/rockchip_sfc.c
@@ -199,6 +199,7 @@ static int rockchip_sfc_dma_xfer(struct rockchip_sfc *sfc, u32 *buf, u32 len)
 
 	while (len) {
 		trb = min(len, (u32)SFC_MAX_TRB);
+		sfc->cmd &= ~SFC_TRB_MASK;
 		sfc->cmd |= (trb << SFC_TRB_SHIFT);
 		ret = rockchip_sfc_do_dma_xfer(sfc, p32_data);
 		if (ret < 0)
@@ -300,9 +301,9 @@ static int rockchip_sfc_pio_xfer(struct rockchip_sfc *sfc, u32 *buf, u32 len)
 	int ret = 0;
 	int rw = sfc->cmd & SFC_WR;
 
+	sfc->cmd &= ~SFC_TRB_MASK;
 	sfc->cmd |= (len << SFC_TRB_SHIFT);
 	rockchip_sfc_setup_xfer(sfc);
-
 	if (len) {
 		if (rw)
 			ret = rockchip_sfc_write(sfc, buf, len);
@@ -316,11 +317,28 @@ static int rockchip_sfc_pio_xfer(struct rockchip_sfc *sfc, u32 *buf, u32 len)
 static int rockchip_sfc_do_xfer(struct rockchip_sfc *sfc, u32 *buf, u32 len)
 {
 	int ret = 0;
+	u32 bytes = len & 0x3;
+	u32 dma_trans;
+
+	if (len >= SFC_MAX_TRB) {
+		dma_trans = len - bytes;
+	} else {
+		dma_trans = 0;
+		bytes = len;
+	}
+
+	if (dma_trans) {
+		ret = rockchip_sfc_dma_xfer(sfc, buf, dma_trans);
+		buf += (dma_trans  >> 2);
+	}
 
-	if (!(len & 0x03) && (len >= 4))
-		ret = rockchip_sfc_dma_xfer(sfc, buf, len);
-	else
-		ret = rockchip_sfc_pio_xfer(sfc, buf, len);
+	/*
+	 * transfer the last non 4 bytes anligned byte by pio mode
+	 * there are also some commands like WREN(0x06) that execute
+	 * whth no data, we also need to handle it here.
+	 */
+	if (bytes || (!bytes && !dma_trans))
+		ret = rockchip_sfc_pio_xfer(sfc, buf, bytes);
 
 	return ret;
 }
@@ -346,7 +364,7 @@ static int rockchip_sfc_xfer(struct udevice *dev, unsigned int bitlen,
 		len = 0;
 
 	if (flags & SPI_XFER_END) {
-		if (dout && len)
+		if (dout)
 			sfc->cmd |= SFC_WR;
 
 		if (din)

commit c234b81e6a9d673d649955012761c62e50d4fab2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 30 15:24:21 2018 +0800

    irq; support irq revert trigger type and get gpio level
    
    Change-Id: Ib897bb37c518429c595903bb8f2cfd9fcea9aa78
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/irq/irq-generic.c b/drivers/irq/irq-generic.c
index c7ad094db6..593a122e74 100644
--- a/drivers/irq/irq-generic.c
+++ b/drivers/irq/irq-generic.c
@@ -162,6 +162,28 @@ int irq_set_irq_type(int irq, unsigned int type)
 		return gpio_irq_chip->irq_set_type(irq, type);
 }
 
+int irq_revert_irq_type(int irq)
+{
+	if (irq_bad(irq))
+		return -EINVAL;
+
+	if (irq < PLATFORM_GIC_IRQS_NR)
+		return 0;
+	else
+		return gpio_irq_chip->irq_revert_type(irq);
+}
+
+int irq_get_gpio_level(int irq)
+{
+	if (irq_bad(irq))
+		return -EINVAL;
+
+	if (irq < PLATFORM_GIC_IRQS_NR)
+		return 0;
+	else
+		return gpio_irq_chip->irq_get_gpio_level(irq);
+}
+
 void irq_install_handler(int irq, interrupt_handler_t *handler, void *data)
 {
 	if (irq_bad(irq))
diff --git a/drivers/irq/irq-gpio.c b/drivers/irq/irq-gpio.c
index d80ae116c4..4b46b4fa73 100644
--- a/drivers/irq/irq-gpio.c
+++ b/drivers/irq/irq-gpio.c
@@ -62,6 +62,11 @@ static void gpio_bit_op(void __iomem *regbase, unsigned int offset,
 	writel(val, regbase + offset);
 }
 
+static int gpio_bit_rd(void __iomem *regbase, unsigned int offset, u32 bit)
+{
+	return readl(regbase + offset) & bit ? 1 : 0;
+}
+
 static void gpio_irq_unmask(void __iomem *regbase, unsigned int bit)
 {
 	gpio_bit_op(regbase, GPIO_INTEN, bit, 1);
@@ -137,6 +142,34 @@ static void gpio_set_intr_type(void __iomem *regbase,
 	}
 }
 
+static int gpio_get_intr_type(void __iomem *regbase,
+			      unsigned int bit)
+{
+	u32 polarity, level, magic = 0;
+	int type;
+
+	polarity = gpio_bit_rd(regbase, GPIO_INT_POLARITY, bit);
+	level = gpio_bit_rd(regbase, GPIO_INTTYPE_LEVEL, bit);
+	magic = (polarity << 1) | (level << 0);
+
+	switch (magic) {
+	case 0x00:
+		type = GPIOLevelLow;
+		break;
+	case 0x02:
+		type = GPIOLevelHigh;
+		break;
+	case 0x01:
+		type = GPIOEdgelFalling;
+		break;
+	case 0x03:
+		type = GPIOEdgelRising;
+		break;
+	}
+
+	return type;
+}
+
 static int gpio_irq_set_type(int gpio_irq, unsigned int type)
 {
 	int gpio = irq_to_gpio(gpio_irq);
@@ -175,6 +208,58 @@ static int gpio_irq_set_type(int gpio_irq, unsigned int type)
 	return 0;
 }
 
+static int gpio_irq_revert_type(int gpio_irq)
+{
+	int gpio = irq_to_gpio(gpio_irq);
+	struct gpio_bank *bank = gpio_to_bank(gpio);
+	eGPIOIntType_t int_type = 0;
+	int type;
+
+	if (!bank)
+		return -EINVAL;
+
+	gpio &= GPIO_PIN_MASK;
+	if (gpio >= bank->ngpio)
+		return -EINVAL;
+
+	type = gpio_get_intr_type(bank->regbase, offset_to_bit(gpio));
+	switch (type) {
+	case GPIOEdgelFalling:
+		int_type = GPIOEdgelRising;
+		break;
+	case GPIOEdgelRising:
+		int_type = GPIOEdgelFalling;
+		break;
+	case GPIOLevelHigh:
+		int_type = GPIOLevelLow;
+		break;
+	case GPIOLevelLow:
+		int_type = GPIOLevelHigh;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	gpio_set_intr_type(bank->regbase, offset_to_bit(gpio), int_type);
+
+	return 0;
+}
+
+static int gpio_irq_get_gpio_level(int gpio_irq)
+{
+	int gpio = irq_to_gpio(gpio_irq);
+	struct gpio_bank *bank = gpio_to_bank(gpio);
+
+	if (!bank)
+		return -EINVAL;
+
+	gpio &= GPIO_PIN_MASK;
+	if (gpio >= bank->ngpio)
+		return -EINVAL;
+
+	return gpio_bit_rd(bank->regbase, GPIO_EXT_PORT, offset_to_bit(gpio));
+}
+
 static int gpio_irq_enable(int gpio_irq)
 {
 	int gpio = irq_to_gpio(gpio_irq);
@@ -238,6 +323,8 @@ static struct irq_chip gpio_irq_chip = {
 	.irq_enable	= gpio_irq_enable,
 	.irq_disable	= gpio_irq_disable,
 	.irq_set_type	= gpio_irq_set_type,
+	.irq_revert_type = gpio_irq_revert_type,
+	.irq_get_gpio_level = gpio_irq_get_gpio_level,
 };
 
 struct irq_chip *arch_gpio_irq_init(void)
diff --git a/include/irq-generic.h b/include/irq-generic.h
index 8bb3ee8769..eaa7331686 100644
--- a/include/irq-generic.h
+++ b/include/irq-generic.h
@@ -55,14 +55,18 @@ struct irq_chip {
 	void		(*irq_ack)(int irq);
 	void		(*irq_eoi)(int irq);
 	int		(*irq_set_type)(int irq, unsigned int flow_type);
+	int		(*irq_revert_type)(int irq);
+	int		(*irq_get_gpio_level)(int irq);
 };
 
 /* APIs for irqs */
 void irq_install_handler(int irq, interrupt_handler_t *handler, void *data);
 void irq_free_handler(int irq);
 int irq_set_irq_type(int irq, unsigned int type);
+int irq_revert_irq_type(int irq);
 int irq_handler_enable(int irq);
 int irq_handler_disable(int irq);
+int irq_get_gpio_level(int irq);
 int irqs_suspend(void);
 int irqs_resume(void);
 int gpio_to_irq(struct gpio_desc *gpio);

commit bb9827924ec57c14f9e1b076c0d99cf9fad6bfb6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Jan 27 17:47:25 2018 +0800

    bootm: reserve memory when BOOTM_STATE_RAMDISK enabled
    
    Change-Id: I2ba6dc7484de12aa7de28c9a8d6125b046029947
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/bootm.c b/common/bootm.c
index 84830f1996..5e1f7c218c 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -639,7 +639,8 @@ int do_bootm_states(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
 
 	/* Resever memory before any lmb_alloc, as early as possible */
 #if IMAGE_ENABLE_OF_LIBFDT && defined(CONFIG_LMB)
-	if (!ret && (states & BOOTM_STATE_FDT))
+	if (!ret && ((states & BOOTM_STATE_RAMDISK) ||
+	    (states & BOOTM_STATE_FDT)))
 		boot_fdt_add_mem_rsv_regions(&images->lmb, images->ft_addr);
 #endif
 	/* Relocate the ramdisk */

commit 4de308f80ecc878db78b697a2770bea6e0a2d0ce
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Jan 27 13:58:52 2018 +0800

    ARM: dts: rk3126-evb: update charge animation node
    
    Change-Id: I5a1b7042c314481412a1a71454b211a8bd4cd317
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3126-evb.dts b/arch/arm/dts/rk3126-evb.dts
index 78bdfec78f..1ad1829464 100644
--- a/arch/arm/dts/rk3126-evb.dts
+++ b/arch/arm/dts/rk3126-evb.dts
@@ -151,10 +151,9 @@
 	};
 
 	charge-animation {
-		compatible = "charge-animation";
-		screen-on-voltage-threshold = <3350>;
-		power-on-voltage-threshold = <3450>;
-		power-on-soc-threshold = <0>;
+		compatible = "rockchip,uboot-charge";
+		rockchip,uboot-charge-on = <0>;
+		rockchip,android-charge-on = <1>;
 		status = "okay";
 	};
 };

commit d6653c12a93daf65b7ac0698698422176497e808
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Jan 27 13:14:15 2018 +0800

    power: charge animation: compatible legacy device node
    
    compatible with kernel 4.4 device node "uboot-charge".
    
    Change-Id: I754091d02f73b265f852855d203775862f33f05c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 05eaf7869a..525d44dcac 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -41,11 +41,15 @@ struct charge_animation_priv {
 };
 
 struct charge_animation_pdata {
-	int screen_on_voltage_threshold;
-	int power_on_voltage_threshold;
-	int power_on_soc_threshold;
-	bool suspend_to_sram;
-	bool auto_start_kernel;
+	int android_charge;
+	int uboot_charge;
+
+	int screen_on_voltage;
+	int exit_charge_voltage;
+
+	int exit_charge_level;
+	int low_power_level;
+
 };
 
 static int charge_animation_get_power_on_soc(struct udevice *dev)
@@ -55,7 +59,7 @@ static int charge_animation_get_power_on_soc(struct udevice *dev)
 	if (!pdata)
 		return -ENOSYS;
 
-	return pdata->power_on_soc_threshold;
+	return pdata->exit_charge_level;
 }
 
 static int charge_animation_get_power_on_voltage(struct udevice *dev)
@@ -65,7 +69,7 @@ static int charge_animation_get_power_on_voltage(struct udevice *dev)
 	if (!pdata)
 		return -ENOSYS;
 
-	return pdata->power_on_voltage_threshold;
+	return pdata->exit_charge_voltage;
 }
 
 static int charge_animation_get_screen_on_voltage(struct udevice *dev)
@@ -75,7 +79,7 @@ static int charge_animation_get_screen_on_voltage(struct udevice *dev)
 	if (!pdata)
 		return -ENOSYS;
 
-	return pdata->screen_on_voltage_threshold;
+	return pdata->screen_on_voltage;
 }
 
 static int charge_animation_set_power_on_soc(struct udevice *dev, int val)
@@ -85,7 +89,7 @@ static int charge_animation_set_power_on_soc(struct udevice *dev, int val)
 	if (!pdata)
 		return -ENOSYS;
 
-	pdata->power_on_soc_threshold = val;
+	pdata->exit_charge_level = val;
 
 	return 0;
 }
@@ -97,7 +101,7 @@ static int charge_animation_set_power_on_voltage(struct udevice *dev, int val)
 	if (!pdata)
 		return -ENOSYS;
 
-	pdata->power_on_voltage_threshold = val;
+	pdata->exit_charge_voltage = val;
 
 	return 0;
 }
@@ -109,7 +113,7 @@ static int charge_animation_set_screen_on_voltage(struct udevice *dev, int val)
 	if (!pdata)
 		return -ENOSYS;
 
-	pdata->screen_on_voltage_threshold = val;
+	pdata->screen_on_voltage = val;
 
 	return 0;
 }
@@ -134,31 +138,34 @@ static int charge_animation_ofdata_to_platdata(struct udevice *dev)
 {
 	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
 
-	if (dev_read_bool(dev, "charge,suspend-to-sram"))
-		pdata->suspend_to_sram = true;
-	else
-		pdata->suspend_to_sram = false;
-
-	if (dev_read_bool(dev, "charge,auto-start-kernel"))
-		pdata->auto_start_kernel = true;
-	else
-		pdata->auto_start_kernel = false;
-
-	pdata->power_on_soc_threshold =
-		dev_read_u32_default(dev, "power-on-soc-threshold", 0);
-	pdata->power_on_voltage_threshold =
-		dev_read_u32_default(dev, "power-on-voltage-threshold", 0);
-	pdata->screen_on_voltage_threshold =
-		dev_read_u32_default(dev, "screen-on-voltage-threshold", 0);
-
-	if (pdata->screen_on_voltage_threshold >
-	    pdata->power_on_voltage_threshold)
-		pdata->screen_on_voltage_threshold =
-					pdata->power_on_voltage_threshold;
-
-	debug("threshold soc=%d%%, voltage=%dmv, screen_on=%dmv, suspend=%d\n",
-	      pdata->power_on_soc_threshold, pdata->power_on_voltage_threshold,
-	      pdata->screen_on_voltage_threshold, pdata->suspend_to_sram);
+	/* charge mode */
+	pdata->uboot_charge =
+		dev_read_u32_default(dev, "rockchip,uboot-charge-on", 0);
+	pdata->android_charge =
+		dev_read_u32_default(dev, "rockchip,android-charge-on", 0);
+
+	/* level */
+	pdata->exit_charge_level =
+		dev_read_u32_default(dev, "rockchip,uboot-exit-charge-level", 0);
+	pdata->low_power_level =
+		dev_read_u32_default(dev, "rockchip,uboot-low-power-level", 0);
+
+	/* voltage */
+	pdata->exit_charge_voltage =
+		dev_read_u32_default(dev, "rockchip,uboot-exit-charge-voltage", 0);
+	pdata->screen_on_voltage =
+		dev_read_u32_default(dev, "rockchip,screen-on-voltage", 0);
+
+	if (pdata->screen_on_voltage >
+	    pdata->exit_charge_voltage)
+		pdata->screen_on_voltage =
+					pdata->exit_charge_voltage;
+
+	debug("mode: uboot=%d, android=%d; exit: soc=%d%%, voltage=%dmv;\n"
+	      "lp_soc=%d%%, screen_on=%dmv\n",
+	      pdata->uboot_charge, pdata->android_charge,
+	      pdata->exit_charge_level, pdata->exit_charge_voltage,
+	      pdata->low_power_level, pdata->screen_on_voltage);
 
 	return 0;
 }
@@ -235,7 +242,7 @@ static int charge_animation_show(struct udevice *dev)
 	ulong show_start = 0, charge_start = 0, debug_start = 0;
 	ulong ms = 0, sec = 0;
 	int start_idx = 0, show_idx = -1;
-	int soc, voltage, key_state;
+	int soc, voltage, current, key_state;
 	int i, charging = 1;
 	int boot_mode;
 
@@ -254,6 +261,16 @@ static int charge_animation_show(struct udevice *dev)
 	}
 #endif
 
+	/* Enter android charge */
+	if (pdata->android_charge) {
+		env_update("bootargs", "androidboot.mode=charger");
+		printf("Android charge mode\n");
+		return 0;
+	}
+
+	if (!pdata->uboot_charge)
+		return 0;
+
 	/* Not charger online, exit */
 	charging = fuel_gauge_get_chrg_online(fg);
 	if (charging <= 0)
@@ -266,14 +283,15 @@ static int charge_animation_show(struct udevice *dev)
 	}
 
 	/* If low power, turn off screen */
-	if (voltage <= pdata->screen_on_voltage_threshold + 50) {
+	if (voltage <= pdata->screen_on_voltage + 50) {
 		screen_on = false;
 		ever_lowpower_screen_off = true;
 		rockchip_show_bmp(NULL);
 	}
 
-	charge_start = get_timer(0);
+	printf("Enter U-Boot charging mode\n");
 
+	charge_start = get_timer(0);
 	/* Charging ! */
 	while (1) {
 		debug("step1 (%d)... \n", screen_on);
@@ -309,6 +327,12 @@ static int charge_animation_show(struct udevice *dev)
 			continue;
 		}
 
+		current = fuel_gauge_get_current(fg);
+		if (current == -ENOSYS) {
+			printf("get current failed: %d\n", current);
+			continue;
+		}
+
 		/*
 		 * Just for debug, otherwise there will be nothing output which
 		 * is not good to know what happen.
@@ -317,9 +341,9 @@ static int charge_animation_show(struct udevice *dev)
 			debug_start = get_timer(0);
 		if (get_timer(debug_start) > 20000) {
 			debug_start = get_timer(0);
-			printf("soc=%d, vol=%d, online=%d, screen_on=%d, show_idx=%d, ever_off=%d\n",
-			       soc, voltage, charging, screen_on, show_idx,
-			       ever_lowpower_screen_off);
+			printf("[%8ld]: soc=%d%%, vol=%dmv, c=%dma, online=%d, screen_on=%d\n",
+			       get_timer(0)/1000, soc, voltage,
+			       current, charging, screen_on);
 		}
 
 		/*
@@ -336,7 +360,7 @@ static int charge_animation_show(struct udevice *dev)
 		 * screen off.
 		 */
 		if ((ever_lowpower_screen_off) &&
-		    (voltage > pdata->screen_on_voltage_threshold)) {
+		    (voltage > pdata->screen_on_voltage)) {
 			ever_lowpower_screen_off = false;
 			screen_on = true;
 			show_idx = IMAGE_SHOW_RESET;
@@ -432,17 +456,17 @@ static int charge_animation_show(struct udevice *dev)
 				screen_on = true;
 
 			/* Is able to boot now ? */
-			if (soc < pdata->power_on_soc_threshold) {
+			if (soc < pdata->exit_charge_level) {
 				printf("soc=%d%%, threshold soc=%d%%\n",
-				       soc, pdata->power_on_soc_threshold);
+				       soc, pdata->exit_charge_level);
 				printf("Low power, unable to boot, charging...\n");
 				show_idx = image_num - 1;
 				continue;
 			}
 
-			if (voltage < pdata->power_on_voltage_threshold) {
+			if (voltage < pdata->exit_charge_voltage) {
 				printf("voltage=%dmv, threshold voltage=%dmv\n",
-				       voltage, pdata->power_on_voltage_threshold);
+				       voltage, pdata->exit_charge_voltage);
 				printf("Low power, unable to boot, charging...\n");
 				show_idx = image_num - 1;
 				continue;
@@ -458,21 +482,9 @@ static int charge_animation_show(struct udevice *dev)
 
 		debug("step5 (%d)... \n", screen_on);
 
-		/*
-		 * Step5: Check auto start kernel
-		 */
-		if (pdata->auto_start_kernel) {
-			if ((voltage >= pdata->power_on_voltage_threshold) &&
-			    (soc >= pdata->power_on_soc_threshold)) {
-				printf("Auto start, exit charge animation..\n");
-				rockchip_show_logo();
-				break;
-			}
-		}
-
-		/* Step6: Exit by ctrl+c */
+		/* Step5: Exit by ctrl+c */
 		if (ctrlc()) {
-			if (voltage >= pdata->screen_on_voltage_threshold)
+			if (voltage >= pdata->screen_on_voltage)
 				rockchip_show_logo();
 			printf("Exit charge, due to ctrl+c\n");
 			break;
@@ -547,7 +559,7 @@ static int charge_animation_probe(struct udevice *dev)
 }
 
 static const struct udevice_id charge_animation_ids[] = {
-	{ .compatible = "charge-animation" },
+	{ .compatible = "rockchip,uboot-charge" },
 	{ },
 };
 

commit 513d5509a432564e38a4a491e69f74d40a31c1f6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Jan 27 14:01:40 2018 +0800

    fuel gauge: rk816: report charge current to framework
    
    Change-Id: I47f48f78749783022bbd0b3876de406d73e37e7e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk816.c b/drivers/power/fuel_gauge/fg_rk816.c
index 700deb5597..812c91bf68 100644
--- a/drivers/power/fuel_gauge/fg_rk816.c
+++ b/drivers/power/fuel_gauge/fg_rk816.c
@@ -94,6 +94,7 @@ static int dbg_enable = 0;
 #define FINISH_CALI_CURR	1500
 #define TERM_CALI_CURR		600
 #define	VIRTUAL_POWER_VOL	4200
+#define	VIRTUAL_POWER_CUR	1000
 #define	VIRTUAL_POWER_SOC	66
 #define SECONDS(n)		((n) * 1000)
 
@@ -1304,6 +1305,16 @@ static int rk816_bat_update_get_voltage(struct udevice *dev)
 		return VIRTUAL_POWER_VOL;
 }
 
+static int rk816_bat_update_get_current(struct udevice *dev)
+{
+	struct battery_info *di = dev_get_priv(dev);
+
+	if (!di->virtual_power && di->voltage_k)
+		return rk816_bat_get_avg_current(di);
+	else
+		return VIRTUAL_POWER_CUR;
+}
+
 static bool rk816_bat_update_get_chrg_online(struct udevice *dev)
 {
 	struct battery_info *di = dev_get_priv(dev);
@@ -1314,6 +1325,7 @@ static bool rk816_bat_update_get_chrg_online(struct udevice *dev)
 static struct dm_fuel_gauge_ops fg_ops = {
 	.get_soc = rk816_bat_update_get_soc,
 	.get_voltage = rk816_bat_update_get_voltage,
+	.get_current = rk816_bat_update_get_current,
 	.get_chrg_online = rk816_bat_update_get_chrg_online,
 };
 

commit 23c016409eb330299d07a31ce723266d9ff679f6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Jan 27 14:02:43 2018 +0800

    dm: fuel gauge: add charge current report interface
    
    Change-Id: Ibef2b06d3b0df71bdf2f205a128578ca6314c37e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fuel_gauge_uclass.c b/drivers/power/fuel_gauge/fuel_gauge_uclass.c
index 9b6720eb5b..101f1d7132 100644
--- a/drivers/power/fuel_gauge/fuel_gauge_uclass.c
+++ b/drivers/power/fuel_gauge/fuel_gauge_uclass.c
@@ -10,6 +10,16 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+int fuel_gauge_get_current(struct udevice *dev)
+{
+	const struct dm_fuel_gauge_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->get_current)
+		return -ENOSYS;
+
+	return ops->get_current(dev);
+}
+
 int fuel_gauge_get_voltage(struct udevice *dev)
 {
 	const struct dm_fuel_gauge_ops *ops = dev_get_driver_ops(dev);
diff --git a/include/power/fuel_gauge.h b/include/power/fuel_gauge.h
index 14714c343d..9473e6220a 100644
--- a/include/power/fuel_gauge.h
+++ b/include/power/fuel_gauge.h
@@ -10,11 +10,13 @@
 struct dm_fuel_gauge_ops {
 	int (*get_soc)(struct udevice *dev);
 	int (*get_voltage)(struct udevice *dev);
+	int (*get_current)(struct udevice *dev);
 	bool (*get_chrg_online)(struct udevice *dev);
 };
 
 int fuel_gauge_get_soc(struct udevice *dev);
 int fuel_gauge_get_voltage(struct udevice *dev);
+int fuel_gauge_get_current(struct udevice *dev);
 bool fuel_gauge_get_chrg_online(struct udevice *dev);
 
 #endif

commit 39d5abb81d1c164730aa81d83feab0c7fb3f33f3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Jan 27 13:01:06 2018 +0800

    common: boot_rkimg: clean up boot options
    
    options are: "storagemedia=" and "androidboot.mode=".
    
    Change-Id: I4deba2fce27324bc5020ba79e586383fefe92b83
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 745461a3ce..5ace1893fe 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -147,20 +147,21 @@ err:
 int get_bootdev_type(void)
 {
 	int type = 0;
-	char *boot_media = NULL;
+	char *boot_media = NULL, *boot_mode = NULL;
+	char boot_options[128] = {0};
 	static int appended;
 
 	#ifdef CONFIG_EMMC_BOOT
 		type = IF_TYPE_MMC;
-		boot_media = "storagemedia=emmc";
+		boot_media = "emmc";
 	#endif /* CONFIG_EMMC_BOOT */
 	#ifdef CONFIG_QSPI_BOOT
 		type = IF_TYPE_SPI_NAND;
-		boot_media = "storagemedia=nand";
+		boot_media = "nand";
 	#endif /* CONFIG_QSPI_BOOT */
 	#ifdef CONFIG_NAND_BOOT
 		type = IF_TYPE_RKNAND;
-		boot_media = "storagemedia=nand";
+		boot_media = "nand";
 	#endif /* CONFIG_NAND_BOOT */
 	#ifdef CONFIG_NOR_BOOT
 		type = IF_TYPE_SPI_NOR;
@@ -169,12 +170,24 @@ int get_bootdev_type(void)
 	/* For current use(Only EMMC support!) */
 	if (!type) {
 		type = IF_TYPE_MMC;
-		boot_media = "storagemedia=emmc";
+		boot_media = "emmc";
 	}
 
 	if (!appended && boot_media) {
 		appended = 1;
-		env_update("bootargs", boot_media);
+		/*
+		 * 1. androidboot.mode=charger has higher priority, not override;
+		 * 2. rknand doesn't need "androidboot.mode=";
+		 */
+		if (env_exist("bootargs", "androidboot.mode=charger") ||
+		    (type == IF_TYPE_RKNAND))
+			snprintf(boot_options, sizeof(boot_options),
+				 "storagemedia=%s", boot_media);
+		else
+			snprintf(boot_options, sizeof(boot_options),
+				 "storagemedia=%s androidboot.mode=%s",
+				 boot_media, boot_media);
+		env_update("bootargs", boot_options);
 	}
 
 	return type;

commit 046a931055871570b053c99019398353ad81e1fd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Jan 27 14:42:25 2018 +0800

    env: add env_exist()
    
    Change-Id: I153c700ff45a678832b72031787531efadcdb47b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/cmd/nvedit.c b/cmd/nvedit.c
index 307ec60534..1809e6fe32 100644
--- a/cmd/nvedit.c
+++ b/cmd/nvedit.c
@@ -517,6 +517,22 @@ int env_update(const char *varname, const char *varvalue)
 	return 0;
 }
 
+int env_exist(const char *varname, const char *varvalue)
+{
+	char *value;
+	int ret = 0;
+
+	/* before import into hashtable */
+	if (!(gd->flags & GD_FLG_ENV_READY) || !varname)
+		return 1;
+
+	value = env_get(varname);
+	if (value)
+		ret = strstr(value, varvalue) ? 1 : 0;
+
+	return ret;
+}
+
 /**
  * Set an environment variable to an integer value
  *
diff --git a/include/common.h b/include/common.h
index a400cf55aa..60f8555409 100644
--- a/include/common.h
+++ b/include/common.h
@@ -340,6 +340,15 @@ int env_set(const char *varname, const char *value);
  */
 int env_update(const char *varname, const char *varvalue);
 
+/**
+ * env_exist() - check sub value of an environment variable is exist or not
+ *
+ * @varname: Variable to look up
+ * @value: Value to check
+ * @return 1 if exist, 0 on error
+ */
+int env_exist(const char *varname, const char *varvalue);
+
 /**
  * env_set_ulong() - set an environment variable to an integer
  *

commit bc98b3c8fc20450fa75bdece8367925d2053900d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jan 26 19:27:08 2018 +0800

    make.sh: optimize code
    
    1. use global variables for important definitions, easy to update;
    2. add more error message warning;
    3. fix some issues.
    
    Change-Id: I702f4efe5839c1c7eaf66f412011aadf6627f323
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 3559e9adbe..36cfa4e24f 100755
--- a/make.sh
+++ b/make.sh
@@ -1,20 +1,33 @@
 #!/bin/sh
 set -e
 BOARD=$1
-DIR=${BOARD#*-}
-DSTDIR=rockdev/${DIR}
-RKCHIP=$(echo $DIR | tr '[a-z]' '[A-Z]')
-TOOLCHAIN=arm-linux-gnueabi-
+RKCHIP=${BOARD##*-}
+DSTDIR=rockdev/${RKCHIP}
+RKCHIP=$(echo ${RKCHIP} | tr '[a-z]' '[A-Z]')
 JOB=`sed -n "N;/processor/p" /proc/cpuinfo|wc -l`
 
+# Declare global rkbin tools and rkbin Responsity path, updated in prepare()
+TOOLCHAIN_RKBIN=./
+RKBIN=./
+# RKTOOL path
+RKBIN_TOOLS=../rkbin/tools
+
+# Declare global toolchain path for CROSS_COMPILE, updated in select_toolchain()
+TOOLCHAIN_GCC=./
+# GCC toolchain
+GCC_ARM32=arm-linux-androideabi-
+GCC_ARM64=aarch64-linux-android-
+TOOLCHAIN_ARM32=../prebuilts/gcc/linux-x86/arm/arm-linux-androideabi-4.9/bin
+TOOLCHAIN_ARM64=../prebuilts/gcc/linux-x86/aarch64/aarch64-linux-android-4.9/bin
+
 prepare()
 {
-	local dst
+	local absolute_path
 
 	# Check invaid args and help
-	if [ "$BOARD" = '--help' -o "$BOARD" = '-h' -o "$BOARD" = '--h' ]; then
+	if [ "$BOARD" = '--help' -o "$BOARD" = '-h' -o "$BOARD" = '--h' -o "$BOARD" = '' ]; then
 		echo
-		echo "Usage: ./make.sh board"
+		echo "Usage: ./make.sh [board]"
 		echo "Example:"
 		echo "./make.sh evb-rk3399     ---- build for evb-rk3399_defconfig"
 		echo "./make.sh firefly-rk3288 ---- build for firefly-rk3288_defconfig"
@@ -24,11 +37,11 @@ prepare()
 		exit 1
 	fi
 
-	# Initialize RKBIN and RKTOOLS
-	dst=../rkbin/tools
-	if [ -d ${dst} ]; then
-		RKBIN=$(cd `dirname ${dst}`; pwd)
-		RKTOOLS=${RKBIN}/tools
+	# Initialize RKBIN and TOOLCHAIN_RKBIN
+	if [ -d ${RKBIN_TOOLS} ]; then
+		absolute_path=$(cd `dirname ${RKBIN_TOOLS}`; pwd)
+		RKBIN=${absolute_path}
+		TOOLCHAIN_RKBIN=${absolute_path}/tools
 	else
 		echo
 		echo "Can't find '../rkbin/' Responsity, please download it before pack image!"
@@ -42,22 +55,34 @@ prepare()
 
 select_toolchain()
 {
-	local dst path
+	local absolute_path
+
 	if grep  -q '^CONFIG_ARM64=y' ${DSTDIR}/out/.config ; then
-        	TOOLCHAIN=aarch64-linux-gnu-
-		dst=../prebuilts/gcc/linux-x86/aarch64/aarch64-linux-android-4.9/bin
-		if [ -d ${dst} ]; then
-			path=$(cd `dirname ${dst}`; pwd)
-			TOOLCHAIN=${path}/bin/aarch64-linux-android-
+		if [ -d ${TOOLCHAIN_ARM64} ]; then
+			absolute_path=$(cd `dirname ${TOOLCHAIN_ARM64}`; pwd)
+			TOOLCHAIN_GCC=${absolute_path}/bin/${GCC_ARM64}
+		else
+			echo "Can't find toolchain: ${TOOLCHAIN_GCC}"
+			exit 1
 		fi
 	else
-		dst=../prebuilts/gcc/linux-x86/arm/arm-linux-androideabi-4.9/bin
-		if [ -d ${dst} ]; then
-			path=$(cd `dirname ${dst}`; pwd)
-			TOOLCHAIN=${path}/bin/arm-linux-androideabi-
+		if [ -d ${TOOLCHAIN_ARM32} ]; then
+			absolute_path=$(cd `dirname ${TOOLCHAIN_ARM32}`; pwd)
+			TOOLCHAIN_GCC=${absolute_path}/bin/${GCC_ARM32}
+		else
+			echo "Can't find toolchain: ${TOOLCHAIN_GCC}"
+			exit 1
 		fi
 	fi
-	echo toolchain: ${TOOLCHAIN}
+
+	echo "toolchain: ${TOOLCHAIN_GCC}"
+}
+
+fixup_chip_name()
+{
+	if [ "$RKCHIP" = 'RK3228' -o "$RKCHIP" = 'RK3229' ]; then
+		RKCHIP=RK322X
+	fi
 }
 
 pack_uboot_image()
@@ -65,13 +90,13 @@ pack_uboot_image()
 	local UBOOT_LOAD_ADDR
 
 	UBOOT_LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${DSTDIR}/out/include/autoconf.mk|tr -d '\r'`
-	${RKTOOLS}/loaderimage --pack --uboot ${DSTDIR}/out/u-boot.bin uboot.img ${UBOOT_LOAD_ADDR}
+	${TOOLCHAIN_RKBIN}/loaderimage --pack --uboot ${DSTDIR}/out/u-boot.bin uboot.img ${UBOOT_LOAD_ADDR}
 }
 
 pack_loader_image()
 {
 	cd ${RKBIN}
-	${RKTOOLS}/boot_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini
+	${TOOLCHAIN_RKBIN}/boot_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini
 	cd -
 	mv ${RKBIN}/*_loader_*.bin ./
 }
@@ -83,7 +108,7 @@ pack_trust_image()
 	# ARM64 uses trust_merger
 	if grep  -q '^CONFIG_ARM64=y' ${DSTDIR}/out/.config ; then
 		cd ${RKBIN}
-		${RKTOOLS}/trust_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini
+		${TOOLCHAIN_RKBIN}/trust_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini
 		cd -
 		mv ${RKBIN}/trust.img ./trust.img
 	# ARM uses loaderimage
@@ -104,14 +129,14 @@ pack_trust_image()
 		TOS_TA=$(echo ${TOS_TA} | sed "s/tools\/rk_tools\//\.\//g")
 
 		if [ $TOS_TA -a $TOS ]; then
-			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS} ./trust.img ${TEE_LOAD_ADDR}
-			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ./trust_with_ta.img ${TEE_LOAD_ADDR}
+			${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS} ./trust.img ${TEE_LOAD_ADDR}
+			${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ./trust_with_ta.img ${TEE_LOAD_ADDR}
 			echo "Both trust.img and trust_with_ta.img are ready"
 		elif [ $TOS ]; then
-			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS} ./trust.img ${TEE_LOAD_ADDR}
+			${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS} ./trust.img ${TEE_LOAD_ADDR}
 			echo "trust.img is ready"
 		elif [ $TOS_TA ]; then
-			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ./trust.img ${TEE_LOAD_ADDR}
+			${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ./trust.img ${TEE_LOAD_ADDR}
 			echo "trust.img with ta is ready"
 		else
 			echo "Can't find any tee bin"
@@ -121,11 +146,11 @@ pack_trust_image()
 }
 
 prepare
+select_toolchain
 echo "make for ${BOARD}_defconfig by -j${JOB}"
 make ${BOARD}_defconfig O=${DSTDIR}/out
-select_toolchain
-make CROSS_COMPILE=${TOOLCHAIN}  all --jobs=${JOB} O=${DSTDIR}/out
+make CROSS_COMPILE=${TOOLCHAIN_GCC}  all --jobs=${JOB} O=${DSTDIR}/out
+fixup_chip_name
 pack_loader_image
 pack_uboot_image
 pack_trust_image
-

commit 0e90839a144e101e23c516396b71ae169eff2816
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jan 26 19:11:02 2018 +0800

    make.sh: update package command
    
    boot_merge and trust_merge support command "--replace".
    
    Change-Id: Ie5cf52a1aaefcc717fcb76400e2f0eb8dfc8f467
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 6fe2d6add8..3559e9adbe 100755
--- a/make.sh
+++ b/make.sh
@@ -71,7 +71,7 @@ pack_uboot_image()
 pack_loader_image()
 {
 	cd ${RKBIN}
-	${RKTOOLS}/boot_merger ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini
+	${RKTOOLS}/boot_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini
 	cd -
 	mv ${RKBIN}/*_loader_*.bin ./
 }
@@ -83,7 +83,7 @@ pack_trust_image()
 	# ARM64 uses trust_merger
 	if grep  -q '^CONFIG_ARM64=y' ${DSTDIR}/out/.config ; then
 		cd ${RKBIN}
-		${RKTOOLS}/trust_merger ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini
+		${RKTOOLS}/trust_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini
 		cd -
 		mv ${RKBIN}/trust.img ./trust.img
 	# ARM uses loaderimage
@@ -95,9 +95,14 @@ pack_trust_image()
 		# Convert Dec to Hex
 		TEE_LOAD_ADDR=$(echo "obase=16;${TEE_LOAD_ADDR}"|bc)
 
+		# Parse orignal path
 		TOS=`sed -n "/TOS=/s/TOS=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
 		TOS_TA=`sed -n "/TOSTA=/s/TOSTA=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
 
+		# replace "./tools/rk_tools/" with "./" to compatible legacy ini content of rkdevelop branch
+		TOS=$(echo ${TOS} | sed "s/tools\/rk_tools\//\.\//g")
+		TOS_TA=$(echo ${TOS_TA} | sed "s/tools\/rk_tools\//\.\//g")
+
 		if [ $TOS_TA -a $TOS ]; then
 			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS} ./trust.img ${TEE_LOAD_ADDR}
 			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ./trust_with_ta.img ${TEE_LOAD_ADDR}

commit 87ea017b04ee51af055650d38ebe6a099dc8013d
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Jan 25 22:07:11 2018 +0800

    Makefile: use dt-spl.dtb when using kernel dtb
    
    We only need a simple dtb for pre-relocate and then we convert to
    use kernel dtb.
    
    Change-Id: I06c2b5303a89cf229da44f3edce4f698299aeef8
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/Makefile b/Makefile
index c27875d336..a86fd4d544 100644
--- a/Makefile
+++ b/Makefile
@@ -870,11 +870,16 @@ endif
 	$(call cmd,cfgcheck,u-boot.cfg)
 
 PHONY += dtbs
-dtbs: dts/dt.dtb
+dtbs: dts/dt.dtb dts/dt-spl.dtb
 	@:
 dts/dt.dtb: u-boot
 	$(Q)$(MAKE) $(build)=dts dtbs
 
+ifeq ($(CONFIG_USING_KERNEL_DTB),y)
+dts/dt-spl.dtb: dts/dt.dtb
+	@:
+endif
+
 quiet_cmd_copy = COPY    $@
       cmd_copy = cp $< $@
 
@@ -893,7 +898,11 @@ u-boot-fit-dtb.bin: u-boot-nodtb.bin fit-dtb.blob
 u-boot.bin: u-boot-fit-dtb.bin FORCE
 	$(call if_changed,copy)
 else ifeq ($(CONFIG_OF_SEPARATE),y)
+ifeq ($(CONFIG_USING_KERNEL_DTB),y)
+u-boot-dtb.bin: u-boot-nodtb.bin dts/dt-spl.dtb FORCE
+else
 u-boot-dtb.bin: u-boot-nodtb.bin dts/dt.dtb FORCE
+endif
 	$(call if_changed,cat)
 
 u-boot.bin: u-boot-dtb.bin FORCE

commit d5b5cd14713142f67d8742cbfdc5990b2fd32732
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Jan 25 22:51:02 2018 +0800

    core: add dev_count_phandle_with_args for of_live
    
    This is a fix to:
    642346a dm: core: add ofnode_count_phandle_with_args()
    
    Change-Id: I25befa448e44884440060d43be905744cd4cd319
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/core/read.c b/drivers/core/read.c
index c3a1e2899b..9f4d8c72c4 100644
--- a/drivers/core/read.c
+++ b/drivers/core/read.c
@@ -106,6 +106,14 @@ int dev_read_phandle_with_args(struct udevice *dev, const char *list_name,
 					      out_args);
 }
 
+int dev_count_phandle_with_args(struct udevice *dev,
+		const char *list_name, const char *cells_name)
+{
+	return ofnode_count_phandle_with_args(dev_ofnode(dev), list_name,
+					      cells_name);
+}
+
+
 int dev_read_addr_cells(struct udevice *dev)
 {
 	return ofnode_read_addr_cells(dev_ofnode(dev));

commit af586a3812f626a0f7ff0aded53414ac6c08b15c
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Jan 24 14:45:14 2018 +0800

    rockchip: add support to load and use kernel dtb
    
    We are going to use a tiny dtb(with 'u-boot,dm-pre-reloc') in pre-relocate,
    and then read kernel dtb and use it after relocate.
    This feature only works with CONFIG_OF_LIVE enabled now.
    
    Change-Id: I429ccd90ef562a96f2f7916255e7e427ce8f451d
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index c15d564e40..fa1f55f838 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -349,6 +349,15 @@ config ROCKCHIP_VENDOR_PARTITION
 	  This enable support to read/write vendor configuration data from/to
 	  this partition.
 
+config USING_KERNEL_DTB
+	bool "Using dtb from Kernel/resource for U-Boot"
+	depends on RKIMG_BOOTLOADER && OF_LIVE
+	default y
+	help
+	  This enable support to read dtb from resource and use it for U-Boot,
+	  the uart and emmc will still using U-Boot dtb, but other devices like
+	  regulator/pmic, display, usb will use dts node from kernel.
+
 config ROCKCHIP_CRC
 	bool "Rockchip CRC verify images"
 	help
diff --git a/common/board_r.c b/common/board_r.c
index 09167c13cc..8055c72581 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -103,6 +103,41 @@ static int initr_reloc(void)
 
 	return 0;
 }
+#ifdef CONFIG_USING_KERNEL_DTB
+#include <asm/arch/resource_img.h>
+#define DTB_FILE                        "rk-kernel.dtb"
+int get_fdt_from_resource(void)
+{
+	int ret = 0;
+	struct mmc *mmc;
+	ulong fdt_addr = 0;
+
+	mmc_initialize(gd->bd);
+	mmc = find_mmc_device(0);
+	if (!mmc) {
+		printf("no mmc device at slot 0\n");
+		return -1;
+	}
+	ret = mmc_init(mmc);
+	if (ret)
+		printf("%s mmc init fail %d\n", __func__, ret);
+
+	fdt_addr = env_get_ulong("fdt_addr_r", 16, 0);
+	if (!fdt_addr) {
+		printf("No Found FDT Load Address.\n");
+		return -1;
+	}
+
+	ret = rockchip_read_resource_file((void *)fdt_addr, DTB_FILE, 0, 0);
+	if (ret < 0) {
+		printf("%s dtb in resource read fail\n", __func__);
+		return 0;
+	}
+	gd->kernel_fdt = (void *)fdt_addr;
+
+	return 0;
+}
+#endif
 
 #ifdef CONFIG_ARM
 /*
@@ -698,6 +733,9 @@ static init_fnc_t init_sequence_r[] = {
 	initr_noncached,
 #endif
 	bootstage_relocate,
+#ifdef CONFIG_USING_KERNEL_DTB
+	get_fdt_from_resource,
+#endif
 #ifdef CONFIG_OF_LIVE
 	initr_of_live,
 #endif
diff --git a/drivers/core/root.c b/drivers/core/root.c
index 976e2c4fdd..5525d74bc3 100644
--- a/drivers/core/root.c
+++ b/drivers/core/root.c
@@ -306,8 +306,20 @@ int dm_scan_fdt(const void *blob, bool pre_reloc_only)
 {
 #if CONFIG_IS_ENABLED(OF_LIVE)
 	if (of_live_active())
+#ifndef CONFIG_USING_KERNEL_DTB
 		return dm_scan_fdt_live(gd->dm_root, gd->of_root,
 					pre_reloc_only);
+#else
+	{
+		dm_scan_fdt_live(gd->dm_root, gd->of_root,
+					pre_reloc_only);
+		if (!gd->kernel_of_root)
+			return 0;
+
+		return dm_scan_fdt_live(gd->dm_root, gd->kernel_of_root,
+					pre_reloc_only);
+	}
+#endif
 	else
 #endif
 	return dm_scan_fdt_node(gd->dm_root, blob, 0, pre_reloc_only);
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index 5aaa78b06a..591a431cf3 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -81,6 +81,10 @@ typedef struct global_data {
 	unsigned long fdt_size;		/* Space reserved for relocated FDT */
 #ifdef CONFIG_OF_LIVE
 	struct device_node *of_root;
+#ifdef CONFIG_USING_KERNEL_DTB
+	void *kernel_fdt;		/* Kernel FDT */
+	struct device_node *kernel_of_root;
+#endif
 #endif
 	struct jt_funcs *jt;		/* jump table */
 	char env_buf[32];		/* buffer for env_get() before reloc. */
diff --git a/lib/of_live.c b/lib/of_live.c
index f351483387..12c9abcf89 100644
--- a/lib/of_live.c
+++ b/lib/of_live.c
@@ -332,6 +332,15 @@ int of_live_build(const void *fdt_blob, struct device_node **rootp)
 		debug("Failed to scan live tree aliases: err=%d\n", ret);
 		return ret;
 	}
+#ifdef CONFIG_USING_KERNEL_DTB
+	ret = unflatten_device_tree(gd->kernel_fdt,
+				    (struct device_node **)&gd->kernel_of_root);
+	if (ret) {
+		printf("%s fail to build live dt from kernel dtb.\n", __func__);
+		return 0;
+	}
+	gd->fdt_blob = gd->kernel_fdt;
+#endif
 	debug("%s: stop\n", __func__);
 
 	return ret;

commit d8a49a2f329d71e82ee75197c04389247b8eaa71
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Jan 25 22:46:13 2018 +0800

    rockchip: dts: rk312x: add u-boot.dtsi
    
    Change-Id: Ib5062219be955b84d50952a2dc4f40cf23ac673f
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3126-bnd-d708.dts b/arch/arm/dts/rk3126-bnd-d708.dts
index a185e73ee2..297e7137ed 100644
--- a/arch/arm/dts/rk3126-bnd-d708.dts
+++ b/arch/arm/dts/rk3126-bnd-d708.dts
@@ -7,6 +7,7 @@
 /dts-v1/;
 
 #include "rk3128.dtsi"
+#include "rk3128-u-boot.dtsi"
 #include <dt-bindings/input/input.h>
 
 / {
diff --git a/arch/arm/dts/rk3126-evb.dts b/arch/arm/dts/rk3126-evb.dts
index ab96432cbc..78bdfec78f 100644
--- a/arch/arm/dts/rk3126-evb.dts
+++ b/arch/arm/dts/rk3126-evb.dts
@@ -7,6 +7,7 @@
 /dts-v1/;
 
 #include "rk3128.dtsi"
+#include "rk3128-u-boot.dtsi"
 #include <dt-bindings/input/input.h>
 
 / {
diff --git a/arch/arm/dts/rk3128-evb.dts b/arch/arm/dts/rk3128-evb.dts
index e8ba419ed5..a3e538cd5e 100644
--- a/arch/arm/dts/rk3128-evb.dts
+++ b/arch/arm/dts/rk3128-evb.dts
@@ -7,6 +7,7 @@
 /dts-v1/;
 
 #include "rk3128.dtsi"
+#include "rk3128-u-boot.dtsi"
 
 / {
 	model = "Rockchip RK3128 Evaluation board";
diff --git a/arch/arm/dts/rk3128-u-boot.dtsi b/arch/arm/dts/rk3128-u-boot.dtsi
new file mode 100644
index 0000000000..2427cf74df
--- /dev/null
+++ b/arch/arm/dts/rk3128-u-boot.dtsi
@@ -0,0 +1,40 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+
+&dmc {
+	u-boot,dm-pre-reloc;
+};
+
+&uart2 {
+	clock-frequency = <24000000>;
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&emmc {
+	u-boot,dm-pre-reloc;
+};
+
+&grf {
+	u-boot,dm-pre-reloc;
+};
+
+&lvds {
+	u-boot,dm-pre-reloc;
+};
+
+&display_subsystem {
+	u-boot,dm-pre-reloc;
+};
+
+&vop {
+	u-boot,dm-pre-reloc;
+};
+
+&cru {
+	u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/rk3128.dtsi b/arch/arm/dts/rk3128.dtsi
index e8ceb34b92..0b42a268b0 100644
--- a/arch/arm/dts/rk3128.dtsi
+++ b/arch/arm/dts/rk3128.dtsi
@@ -241,13 +241,11 @@
 	};
 
 	dmc: dmc@20004000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3128-dmc", "syscon";
 		reg = <0x0 0x20004000 0x0 0x1000>;
 	};
 
 	cru: clock-controller@20000000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3128-cru";
 		reg = <0x20000000 0x1000>;
 		rockchip,grf = <&grf>;
@@ -369,7 +367,6 @@
 	};
 
 	vop: vop@1010e000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3126-vop";
 		reg = <0x1010e000 0x100>, <0x1010ec00 0x400>;
 		reg-names = "regs", "gamma_lut";
@@ -419,7 +416,6 @@
 	};
 
 	display_subsystem: display-subsystem {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,display-subsystem";
 		ports = <&vop_out>;
 
@@ -562,7 +558,6 @@
 	};
 
 	lvds: lvds@20038000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3126-lvds";
 		reg = <0x20038000 0x4000>, <0x10110000 0x100>;
 		reg-names = "mipi_lvds_phy", "mipi_lvds_ctl";
@@ -648,7 +643,6 @@
 	};
 
 	grf: syscon@20008000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3128-grf", "syscon";
 		reg = <0x20008000 0x1000>;
 	};

commit b8a8a392a864738e8da04f668ea04653d3d816ba
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Jan 25 22:19:27 2018 +0800

    rockchip: pinctrl: rk3128: convert to use live dt
    
    Change-Id: I8d12eb6eb5d7a65da14b71a883570df82dfcc0e8
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3128.c b/drivers/pinctrl/rockchip/pinctrl_rk3128.c
index b1c32ac592..8b5178971a 100644
--- a/drivers/pinctrl/rockchip/pinctrl_rk3128.c
+++ b/drivers/pinctrl/rockchip/pinctrl_rk3128.c
@@ -113,8 +113,7 @@ static int rk3128_pinctrl_get_periph_id(struct udevice *dev,
 	u32 cell[3];
 	int ret;
 
-	ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(periph),
-				   "interrupts", cell, ARRAY_SIZE(cell));
+	ret = dev_read_u32_array(periph, "interrupts", cell, ARRAY_SIZE(cell));
 	if (ret < 0)
 		return -EINVAL;
 

commit 6ab5195b7385a4a26c1d44f2a04c0734aac9dad4
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Jan 25 22:17:17 2018 +0800

    rockchip: clk: rk3128: convert to live dt
    
    Change-Id: I54752b7037cda13eb0f7efbc515291fc944fad41
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c
index 944ccc066f..c5d829d3bc 100644
--- a/drivers/clk/rockchip/clk_rk3128.c
+++ b/drivers/clk/rockchip/clk_rk3128.c
@@ -551,7 +551,7 @@ static int rk3128_clk_probe(struct udevice *dev)
 {
 	struct rk3128_clk_priv *priv = dev_get_priv(dev);
 
-	priv->cru = (struct rk3128_cru *)devfdt_get_addr(dev);
+	priv->cru = dev_read_addr_ptr(dev);
 	rkclk_init(priv->cru);
 
 	return 0;

commit 30bcf959e9bead00f1ec995f74f87918d20fa7cc
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Jan 25 14:54:33 2018 +0800

    rockchip: evb-rk3229: enable TPL_SYS_MALLOC_SIMPLE
    
    Change-Id: If5d0846807b0a9e508df36ff170a951569147c63
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index 65089619d4..814b0d93de 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -70,6 +70,7 @@ CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
+CONFIG_TPL_SYS_MALLOC_SIMPLE=y
 CONFIG_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_GADGET=y

commit 6222c401243b38707fd88ccf5e4c35678c183f8d
Author: Goldschmidt Simon <sgoldschmidt@de.pepperl-fuchs.com>
Date:   Tue Nov 21 12:29:56 2017 +0000

    spl: make CONFIG_OF_EMBED pass dts through fdtgrep
    
    Building spl with CONFIG_OF_EMBED enabled results in an error message
    on my board: "SPL image too big". This is because the fdtgrep build
    step is only executed for CONFIG_OF_SEPARATE.
    
    Fix this by moving the fdtgrep build step ('cmd_fdtgreo') from
    scripts/Makefile.spl to dts/Makefile so that the reduced dtb is
    available for all kinds of spl builds.
    
    The resulting variable name for the embedded device tree blob changes,
    too, which is why common.h and fdtdec.c have tiny changes.
    
    Change-Id: I2bf2d9780a544ac602752527d17f14aa6b12c5a2
    Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/dts/Makefile b/dts/Makefile
index 3a93dafb51..c9b2a89441 100644
--- a/dts/Makefile
+++ b/dts/Makefile
@@ -22,10 +22,29 @@ DTB := $(ARCH_PATH)/$(DEVICE_TREE).dtb
 dtb_depends += $(DTB:.dtb=.dts)
 endif
 
+# Pass the original device tree file through fdtgrep twice. The first pass
+# removes any unwanted nodes (i.e. those which don't have the
+# 'u-boot,dm-pre-reloc' property and thus are not needed by SPL. The second
+# pass removes various unused properties from the remaining nodes.
+# The output is typically a much smaller device tree file.
+ifeq ($(CONFIG_TPL_BUILD),y)
+fdtgrep_props := -b u-boot,dm-pre-reloc -b u-boot,dm-tpl
+else
+fdtgrep_props := -b u-boot,dm-pre-reloc -b u-boot,dm-spl
+endif
+quiet_cmd_fdtgrep = FDTGREP $@
+      cmd_fdtgrep = $(objtree)/tools/fdtgrep $(fdtgrep_props) -RT $< \
+		-n /chosen -n /config -O dtb | \
+	$(objtree)/tools/fdtgrep -r -O dtb - -o $@ \
+		$(addprefix -P ,$(subst $\",,$(CONFIG_OF_SPL_REMOVE_PROPS)))
+
+$(obj)/dt-spl.dtb: $(DTB) $(objtree)/tools/fdtgrep FORCE
+	$(call if_changed,fdtgrep)
+
 $(obj)/dt.dtb: $(DTB) FORCE
 	$(call if_changed,shipped)
 
-targets += dt.dtb
+targets += dt.dtb dt-spl.dtb
 
 $(DTB): $(dtb_depends)
 ifeq ($(EXT_DTB),)
@@ -42,14 +61,22 @@ endif
 arch-dtbs:
 	$(Q)$(MAKE) $(build)=$(ARCH_PATH) dtbs
 
-.SECONDARY: $(obj)/dt.dtb.S
+.SECONDARY: $(obj)/dt.dtb.S $(obj)/dt-spl.dtb.S
 
+
+ifeq ($(CONFIG_SPL_BUILD),y)
+obj-$(CONFIG_OF_EMBED) := dt-spl.dtb.o
+# support "out-of-tree" build for dtb-spl
+$(obj)/dt-spl.dtb.o: $(obj)/dt-spl.dtb.S FORCE
+	$(call if_changed_dep,as_o_S)
+else
 obj-$(CONFIG_OF_EMBED) := dt.dtb.o
+endif
 
-dtbs: $(obj)/dt.dtb
+dtbs: $(obj)/dt.dtb $(obj)/dt-spl.dtb
 	@:
 
-clean-files := dt.dtb.S
+clean-files := dt.dtb.S dt-spl.dtb.S
 
 # Let clean descend into dts directories
 subdir- += ../arch/arm/dts ../arch/microblaze/dts ../arch/mips/dts ../arch/sandbox/dts ../arch/x86/dts
diff --git a/include/common.h b/include/common.h
index 9b725e8274..a400cf55aa 100644
--- a/include/common.h
+++ b/include/common.h
@@ -166,6 +166,7 @@ int last_stage_init(void);
 extern ulong monitor_flash_len;
 int mac_read_from_eeprom(void);
 extern u8 __dtb_dt_begin[];	/* embedded device tree blob */
+extern u8 __dtb_dt_spl_begin[];	/* embedded device tree blob for SPL/TPL */
 int set_cpu_clk_info(void);
 int mdm_init(void);
 int print_cpuinfo(void);
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index ae721c29bf..5749d3510f 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -1279,7 +1279,11 @@ int fdtdec_setup(void)
 # endif
 # ifdef CONFIG_OF_EMBED
 	/* Get a pointer to the FDT */
+#  ifdef CONFIG_SPL_BUILD
+	gd->fdt_blob = __dtb_dt_spl_begin;
+#  else
 	gd->fdt_blob = __dtb_dt_begin;
+#  endif
 # elif defined CONFIG_OF_SEPARATE
 #  ifdef CONFIG_SPL_BUILD
 	/* FDT is at end of BSS unless it is in a different memory region */
diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index b5e7019ea3..64390e5785 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -239,24 +239,8 @@ $(obj)/$(SPL_BIN)-pad.bin: $(obj)/$(SPL_BIN)
 	@bss_size_str=$(shell $(NM) $< | awk 'BEGIN {size = 0} /__bss_size/ {size = $$1} END {print "ibase=16; " toupper(size)}' | bc); \
 	dd if=/dev/zero of=$@ bs=1 count=$${bss_size_str} 2>/dev/null;
 
-# Pass the original device tree file through fdtgrep twice. The first pass
-# removes any unwanted nodes (i.e. those which don't have the
-# 'u-boot,dm-pre-reloc' property and thus are not needed by SPL. The second
-# pass removes various unused properties from the remaining nodes.
-# The output is typically a much smaller device tree file.
-ifeq ($(CONFIG_TPL_BUILD),y)
-fdtgrep_props := -b u-boot,dm-pre-reloc -b u-boot,dm-tpl
-else
-fdtgrep_props := -b u-boot,dm-pre-reloc -b u-boot,dm-spl
-endif
-quiet_cmd_fdtgrep = FDTGREP $@
-      cmd_fdtgrep = $(objtree)/tools/fdtgrep $(fdtgrep_props) -RT $< \
-		-n /chosen -n /config -O dtb | \
-	$(objtree)/tools/fdtgrep -r -O dtb - -o $@ \
-		$(addprefix -P ,$(subst $\",,$(CONFIG_OF_SPL_REMOVE_PROPS)))
-
-$(obj)/$(SPL_BIN).dtb: dts/dt.dtb $(objtree)/tools/fdtgrep FORCE
-	$(call if_changed,fdtgrep)
+$(obj)/$(SPL_BIN).dtb: dts/dt-spl.dtb FORCE
+	$(call if_changed,copy)
 
 pythonpath = PYTHONPATH=scripts/dtc/pylibfdt
 

commit e574a93763ec3625a01d2b3faf743fdb23b43090
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Jan 24 14:45:14 2018 +0800

    rockchip: fix RKIMG default partitions
    
    we need to end with '\0', or else the partitions will be broken.
    
    Change-Id: I2bc480165ab7873be35614287b27e855bb5c39b9
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index c67daa265f..1f9d8411bc 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -80,7 +80,7 @@
 	"name=oem,size=32M,uuid=${uuid_gpt_oem};" \
 	"name=frp,size=512K,uuid=${uuid_gpt_frp};" \
 	"name=security,size=2M,uuid=${uuid_gpt_security};" \
-	"name=userdata,size=-,uuid=${uuid_gpt_userdata};"
+	"name=userdata,size=-,uuid=${uuid_gpt_userdata};\0"
 
 #define RKIMG_BOOTCOMMAND \
 	"if mmc dev 0; then setenv devtype mmc; setenv devnum 0;" \

commit 53d8bb451afd057a79f4e13361b582fbb300a6c3
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Jan 24 14:43:58 2018 +0800

    rockchip: ram: rk322x: convert to use live dt
    
    Change-Id: Iedfeb6eee41c416d7bce84ab39d4a0ce6e2c5e4b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram_rk322x.c b/drivers/ram/rockchip/sdram_rk322x.c
index c4da0004c8..8df2039288 100644
--- a/drivers/ram/rockchip/sdram_rk322x.c
+++ b/drivers/ram/rockchip/sdram_rk322x.c
@@ -716,27 +716,25 @@ static int rk322x_dmc_ofdata_to_platdata(struct udevice *dev)
 {
 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
 	struct rk322x_sdram_params *params = dev_get_platdata(dev);
-	const void *blob = gd->fdt_blob;
-	int node = dev_of_offset(dev);
 	int ret;
 
 	params->num_channels = 1;
 
-	ret = fdtdec_get_int_array(blob, node, "rockchip,pctl-timing",
+	ret = dev_read_u32_array(dev, "rockchip,pctl-timing",
 				   (u32 *)&params->pctl_timing,
 				   sizeof(params->pctl_timing) / sizeof(u32));
 	if (ret) {
 		printf("%s: Cannot read rockchip,pctl-timing\n", __func__);
 		return -EINVAL;
 	}
-	ret = fdtdec_get_int_array(blob, node, "rockchip,phy-timing",
+	ret = dev_read_u32_array(dev, "rockchip,phy-timing",
 				   (u32 *)&params->phy_timing,
 				   sizeof(params->phy_timing) / sizeof(u32));
 	if (ret) {
 		printf("%s: Cannot read rockchip,phy-timing\n", __func__);
 		return -EINVAL;
 	}
-	ret = fdtdec_get_int_array(blob, node, "rockchip,sdram-params",
+	ret = dev_read_u32_array(dev, "rockchip,sdram-params",
 				   (u32 *)&params->base,
 				   sizeof(params->base) / sizeof(u32));
 	if (ret) {

commit c9ab1e4db61c74833b3bb1395db2c24134af70f8
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Jan 24 14:43:27 2018 +0800

    rockchip: pinctrl: rk322x: convert to use live dt
    
    Change-Id: I690be6c4708f5fb90385af42a40108ae073d50a0
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/pinctrl/rockchip/pinctrl_rk322x.c b/drivers/pinctrl/rockchip/pinctrl_rk322x.c
index 576b03739f..d300650649 100644
--- a/drivers/pinctrl/rockchip/pinctrl_rk322x.c
+++ b/drivers/pinctrl/rockchip/pinctrl_rk322x.c
@@ -222,8 +222,7 @@ static int rk322x_pinctrl_get_periph_id(struct udevice *dev,
 	u32 cell[3];
 	int ret;
 
-	ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(periph),
-				   "interrupts", cell, ARRAY_SIZE(cell));
+	ret = dev_read_u32_array(periph, "interrupts", cell, ARRAY_SIZE(cell));
 	if (ret < 0)
 		return -EINVAL;
 

commit cd47f9d7d4f86c3e40b45b7d396a285bf8c6ba1a
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Jan 24 14:42:11 2018 +0800

    rockchip: clk: rk322x: convert to live dt
    
    Change-Id: Ib0943d8f66d24ef36fd0020e468befce42ed5836
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c
index bc9055ee63..edcf49f0e8 100644
--- a/drivers/clk/rockchip/clk_rk322x.c
+++ b/drivers/clk/rockchip/clk_rk322x.c
@@ -394,7 +394,7 @@ static int rk322x_clk_ofdata_to_platdata(struct udevice *dev)
 {
 	struct rk322x_clk_priv *priv = dev_get_priv(dev);
 
-	priv->cru = (struct rk322x_cru *)devfdt_get_addr(dev);
+	priv->cru = dev_read_addr_ptr(dev);
 
 	return 0;
 }

commit b283d2ae7bf9dec650d82c6b10cb92ddd9d9ce5d
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Jan 24 14:39:33 2018 +0800

    core: read: fix some device may not have of node
    
    Some device like syscon, blk do not have of node, return directly.
    
    Change-Id: Icc4629632522f4a3af6532c6a9f2152b0e45de8b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/core/read.c b/drivers/core/read.c
index 5d440cee72..c3a1e2899b 100644
--- a/drivers/core/read.c
+++ b/drivers/core/read.c
@@ -73,6 +73,9 @@ fdt_addr_t dev_read_addr_size(struct udevice *dev, const char *property,
 
 const char *dev_read_name(struct udevice *dev)
 {
+	if (!dev_of_valid(dev))
+		return NULL;
+
 	return ofnode_get_name(dev_ofnode(dev));
 }
 
@@ -159,6 +162,8 @@ int dev_read_alias_seq(struct udevice *dev, int *devnump)
 int dev_read_u32_array(struct udevice *dev, const char *propname,
 		       u32 *out_values, size_t sz)
 {
+	if (!dev_of_valid(dev))
+		return -EINVAL;
 	return ofnode_read_u32_array(dev_ofnode(dev), propname, out_values, sz);
 }
 
diff --git a/include/dm/read.h b/include/dm/read.h
index 8114037e97..77c9ae6fcd 100644
--- a/include/dm/read.h
+++ b/include/dm/read.h
@@ -464,6 +464,8 @@ static inline fdt_addr_t dev_read_addr_size(struct udevice *dev,
 
 static inline const char *dev_read_name(struct udevice *dev)
 {
+	if (!dev_of_valid(dev))
+		return NULL;
 	return ofnode_get_name(dev_ofnode(dev));
 }
 
@@ -545,6 +547,8 @@ static inline int dev_read_alias_seq(struct udevice *dev, int *devnump)
 static inline int dev_read_u32_array(struct udevice *dev, const char *propname,
 				     u32 *out_values, size_t sz)
 {
+	if (!dev_of_valid(dev))
+		return -EINVAL;
 	return ofnode_read_u32_array(dev_ofnode(dev), propname, out_values, sz);
 }
 

commit ab174b958c25f4422b7a6432c71e45b3c87882de
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Jan 24 16:26:32 2018 +0800

    bootm: fix to lmb mem reserve
    
    This is a bug fix to:
    534066e bootm: resever memory before any lmb_alloc()
    the patch make distro boot hand.
    
    Change-Id: I13634154daad211a2f51ee94043f6dfd57710eb3
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/bootm.c b/common/bootm.c
index 459063ead7..84830f1996 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -638,8 +638,10 @@ int do_bootm_states(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
 	}
 
 	/* Resever memory before any lmb_alloc, as early as possible */
-	boot_fdt_add_mem_rsv_regions(&images->lmb, images->ft_addr);
-
+#if IMAGE_ENABLE_OF_LIBFDT && defined(CONFIG_LMB)
+	if (!ret && (states & BOOTM_STATE_FDT))
+		boot_fdt_add_mem_rsv_regions(&images->lmb, images->ft_addr);
+#endif
 	/* Relocate the ramdisk */
 #ifdef CONFIG_SYS_BOOT_RAMDISK_HIGH
 	if (!ret && (states & BOOTM_STATE_RAMDISK)) {

commit 1f5bcda2a8b182cb3f6de3afdfc6e600f094c573
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 23 11:18:00 2018 +0800

    android: replace CONFIG_ROCKCHIP_BOOTLOADER with CONFIG_RKIMG_BOOTLOADER
    
    Change-Id: I24db85313652bd21aada68cd472bdf888b7d022d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 3388f22578..102ed9215e 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -43,7 +43,7 @@ int android_bootloader_message_load(
 		return -1;
 	}
 
-#ifdef CONFIG_ROCKCHIP_BOOTLOADER
+#ifdef CONFIG_RKIMG_BOOTLOADER
 	if (blk_dread(dev_desc, part_info->start + BOOTLOADER_MESSAGE_BLK_OFFSET,
 	     message_blocks, message) !=
 #else
diff --git a/common/image-android.c b/common/image-android.c
index cc416e522d..382157af16 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -163,7 +163,7 @@ int android_image_get_fdt(const struct andr_img_hdr *hdr,
 	*rd_data += hdr->page_size;
 	*rd_data += ALIGN(hdr->kernel_size, hdr->page_size);
 	*rd_data += ALIGN(hdr->ramdisk_size, hdr->page_size);
-#ifdef CONFIG_ROCKCHIP_BOOTLOADER
+#ifdef CONFIG_RKIMG_BOOTLOADER
 	*rd_data += (rockchip_get_resource_file(*rd_data, ANDROID_ARG_FDT_FILENAME))
 			* 512;
 #endif

commit aae0febba51e692dccf786226d6ac421346f1e84
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 23 21:01:05 2018 +0800

    rockchip: Kconfig: default enable ROCKCHIP_RESOURCE_IMAGE
    
    default y When RKIMG_BOOTLOADER is enabled.
    
    Change-Id: I1627348860a8eae7efe4d26671a4a159ee7a2dec
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 7090db00dc..c15d564e40 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -337,6 +337,7 @@ config RKIMG_BOOTLOADER
 config ROCKCHIP_RESOURCE_IMAGE
 	bool "Enable support for rockchip resource image"
 	depends on RKIMG_BOOTLOADER
+	default y
 	help
 	  This enables support to get dtb or logo files from
 	  rockchip resource image format partition.

commit 866d7966e22de18e34f49ff2347811eda371f2a2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 23 20:44:12 2018 +0800

    usb: rockusb: set boot normal mode before reset
    
    Change-Id: I7b72a06fbf73a2dbf87fd7d1761dc036f3c40159
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index a4e16034c1..5744a123de 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -5,6 +5,8 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
+#include <asm/io.h>
+#include <asm/arch/boot_mode.h>
 #include <rockusb.h>
 
 #define ROCKUSB_INTERFACE_CLASS	0xff
@@ -109,6 +111,8 @@ static int rkusb_check_lun(struct fsg_common *common)
 
 static void __do_reset(struct usb_ep *ep, struct usb_request *req)
 {
+	writel(BOOT_NORMAL, (void *)CONFIG_ROCKCHIP_BOOT_MODE_REG);
+
 	do_reset(NULL, 0, 0, NULL);
 }
 

commit 8fb96674f6cda97c7675b1f1f15938ef4224ab62
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 23 19:43:15 2018 +0800

    disk: part_rkparm: add initrd fixup for cmdline
    
    remove unused "initrd=0x...,0x...", this for compatible
    with legacy parameter.txt.
    
    Change-Id: I7d9c5708a6b183479ac5980a90067cff8f0872de
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/disk/part_rkparm.c b/disk/part_rkparm.c
index 686fa6ce29..748012131c 100644
--- a/disk/part_rkparm.c
+++ b/disk/part_rkparm.c
@@ -40,6 +40,8 @@ static int rkparm_param_parse(char *param, struct list_head *parts_head,
 	char *pend;
 	int len, offset = 0;
 	unsigned long size, start;
+	char *initrd;
+	const char *str;
 
 	if (!cmdline) {
 		printf("invalid parameter\n");
@@ -47,6 +49,20 @@ static int rkparm_param_parse(char *param, struct list_head *parts_head,
 	}
 
 	*cmdline_end = '\0';
+
+	/*
+	 * Initrd fixup: remove unused "initrd=0x...,0x...", this for
+	 * compatible with legacy parameter.txt
+	 */
+	initrd = strstr(cmdline, "initrd=");
+	if (initrd) {
+		str = strstr(initrd, " ");
+		/* Terminate, so cmdline can be dest for strcat() */
+		*initrd = '\0';
+		/* +1 to skip current white space */
+		strcat((char *)cmdline, (str + 1));
+	}
+
 	/* skip "CMDLINE:" */
 	env_update("bootargs", cmdline + strlen("CMDLINE:"));
 

commit bf98386f4f2904e95414101bca1c853ee600ee01
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Jan 23 16:15:17 2018 +0800

    rockchip: sdram: update dram_init_banksize for secure reserve
    
    Reserve memory only when there is reserve mem info at TRUST_PARAMETER_OFFSET,
    both ARM64 and ARM32 need to do this.
    
    Change-Id: I14370b92a4f4446482d5c241b85d1588acea14b5
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
index e9d2404d98..b1528dfd4e 100644
--- a/arch/arm/mach-rockchip/sdram_common.c
+++ b/arch/arm/mach-rockchip/sdram_common.c
@@ -44,38 +44,25 @@ int dram_init_banksize(void)
 {
 	size_t top = min((unsigned long)(gd->ram_size + CONFIG_SYS_SDRAM_BASE),
 			 gd->ram_top);
+	struct tos_parameter_t *tos_parameter;
+	tos_parameter = (struct tos_parameter_t *)(CONFIG_SYS_SDRAM_BASE +
+			TRUST_PARAMETER_OFFSET);
 
 #ifdef CONFIG_ARM64
 	/* Reserve 0x200000 for ATF bl31 */
-	gd->bd->bi_dram[0].start = 0x200000;
+	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE + 0x200000;
 	gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start;
 #else
-#ifdef CONFIG_SPL_OPTEE
-	struct tos_parameter_t *tos_parameter;
-	tos_parameter = (struct tos_parameter_t *)(CONFIG_SYS_SDRAM_BASE +
-			TRUST_PARAMETER_OFFSET);
+	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+	gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start;
+#endif
 	if (tos_parameter->tee_mem.flags == 1) {
-		gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
 		gd->bd->bi_dram[0].size = tos_parameter->tee_mem.phy_addr
-					- CONFIG_SYS_SDRAM_BASE;
+					- gd->bd->bi_dram[0].start;
 		gd->bd->bi_dram[1].start = tos_parameter->tee_mem.phy_addr +
 					tos_parameter->tee_mem.size;
-		gd->bd->bi_dram[1].size = gd->bd->bi_dram[0].start
-					+ top - gd->bd->bi_dram[1].start;
-	} else {
-		gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
-		gd->bd->bi_dram[0].size = 0x8400000;
-		/* Reserve 32M for OPTEE with TA */
-		gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE
-					+ gd->bd->bi_dram[0].size + 0x2000000;
-		gd->bd->bi_dram[1].size = gd->bd->bi_dram[0].start
-					+ top - gd->bd->bi_dram[1].start;
+		gd->bd->bi_dram[1].size = top - gd->bd->bi_dram[1].start;
 	}
-#else
-	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
-	gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start;
-#endif
-#endif
 
 	return 0;
 }

commit bb1716ec8e16b59f5067f52c136d2d4fb98118f6
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Jan 23 08:53:00 2018 +0800

    rockchip: resource_img: remove compile warning
    
    Change-Id: I1cb85231be68b67e6a339a46be00a6f592986a9b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index b0fc451210..5eba80243b 100644
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -222,7 +222,6 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 		debug("%s Load resource from %s\n", __func__, part_info.name);
 	}
 
-	hdr = (void *)andr_hdr;
 	ret = blk_dread(dev_desc, offset, 1, hdr);
 	if (ret != 1)
 		goto out;
diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index de95d8c321..745461a3ce 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -314,7 +314,7 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 	printf("ramdisk  @ 0x%08lx (0x%08x)\n", ramdisk_addr_r, ramdisk_size);
 #if defined(CONFIG_ARM64)
 	char cmdbuf[64];
-	sprintf(cmdbuf, "booti 0x%lx 0x%lx:0x%lx 0x%lx",
+	sprintf(cmdbuf, "booti 0x%lx 0x%lx:0x%x 0x%lx",
 		kernel_addr_r, ramdisk_addr_r, ramdisk_size, fdt_addr_r);
 	run_command(cmdbuf, 0);
 #else

commit 22ae868202fe96958b47c1f92e49ef95c46aaed0
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Mon Jan 22 17:01:20 2018 +0800

    rockchip: inno-phy-usb2: fix code logic error
    
    Fix condition logic error in rockchip_usb2phy_parse().
    
    Change-Id: I51d2e97d73f9fc81295d424f97737f00d0e846d7
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index 248162e042..f6d00c7edc 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -209,10 +209,11 @@ static int rockchip_usb2phy_parse(struct rockchip_usb2phy *rphy)
 			usbgrf_base = NULL;
 	} else {
 		grf_node = ofnode_path("/syscon-usb");
-		if (ofnode_valid(grf_node))
+		if (ofnode_valid(grf_node)) {
 			grf_base = (void __iomem *)
 				ofnode_get_addr_size(grf_node, "reg", &size);
 			u2phy_node = ofnode_find_subnode(grf_node, "usb2-phy");
+		}
 	}
 
 	if (!grf_base && !usbgrf_base) {

commit d015bf411ad4c985302e770b352c73b31878519d
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Fri Jan 19 16:58:27 2018 +0800

    usb: gadget: correct the capacity value for upgrade tools
    
    Correct the current capacity to support the different storage
    devices upgrade.
    
    Change-Id: I2c96183f317f42944887d02af097ff8a8d29cd4e
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index aa4b139945..a4e16034c1 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -232,12 +232,16 @@ static int rkusb_do_read_capacity(struct fsg_common *common,
 {
 	u8 *buf = (u8 *)bh->buf;
 	u32 len = common->data_size;
+	enum if_type type = ums[common->lun].block_dev.if_type;
 
 	/*
 	 * bit[0]: Direct LBA, 0: Disabled;
-	 * bit[1:63}: Reserved.
+	 * bit[1]: Vendor Storage API, 0: default;
+	 * bit[2]: First 4M Access, 0: Disabled;
+	 * bit[3:63}: Reserved.
 	 */
 	memset((void *)&buf[0], 0, len);
+	buf[0] = (type == IF_TYPE_MMC) ? (BIT(2) | BIT(0)) : BIT(0);
 
 	/* Set data xfer size */
 	common->residue = common->data_size_from_cmnd = len;

commit 2ab11bbe3064997a36e0739ad8729256d6171b89
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jan 22 17:29:29 2018 +0800

    android: support the new android format mode
    
    In the new android images, the ramdisk.img is packed in the
    system.img. So transmit the "skip_initramfs" to cmdline to
    ignore the ramdisk.img (if have) loaded from boot.img.
    
    Change-Id: I1b2051d65078c903411f3ddcc0c7803cbd6892f4
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index fdd0c92be7..3388f22578 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -384,7 +384,9 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 		 * "skip_initramfs" to the cmdline to make it ignore the
 		 * recovery initramfs in the boot partition.
 		 */
+#ifdef CONFIG_ANDROID_AB
 		mode_cmdline = "skip_initramfs";
+#endif
 		break;
 	case ANDROID_BOOT_MODE_RECOVERY:
 		/* In recovery mode we still boot the kernel from "boot" but

commit 38771996118a171fff716c70918a088897417901
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 22 14:49:12 2018 +0800

    rockchip: add common board file for rockchip platform
    
    We use common board/spl/tpl file for all rockchip SoCs,
    - all the SoC spec setting should move into SoC file like rk3288.c;
    - tpl is option and only purpose to init DRAM, clock, uart(option);
    - spl do secure relate one time init, boot device select, boot into
      U-Boot or trust or OS in falcon mode;
    - board do boot mode detect, enable regulator, usb init and so on.
    
    Change-Id: I7b5fa1e3e6e5f4a30a382003215425530087a586
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index ee03940ac0..fa640b930f 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -11,20 +11,8 @@
 obj-spl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o
 obj-tpl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o
 
-obj-tpl-$(CONFIG_ROCKCHIP_RK3066) += rk3066-board-tpl.o
-obj-tpl-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-tpl.o
-obj-tpl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-tpl.o
-obj-tpl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-tpl.o
-obj-tpl-$(CONFIG_ROCKCHIP_RK3328) += rk3328-board-tpl.o
-
-obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o
-obj-spl-$(CONFIG_ROCKCHIP_RK3066) += rk3066-board-spl.o
-obj-spl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-spl.o
-obj-spl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-spl.o spl-boot-order.o
-obj-spl-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-spl.o
-obj-spl-$(CONFIG_ROCKCHIP_RK3328) += rk3328-board-spl.o
-obj-spl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-spl.o spl-boot-order.o
-obj-spl-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board-spl.o spl-boot-order.o
+obj-tpl-y += tpl.o
+obj-spl-y += spl.o spl-boot-order.o
 
 ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
 
@@ -33,25 +21,16 @@ ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
 # we can have the preprocessor correctly recognise both 0x0 and 0
 # meaning "turn it off".
 obj-y += boot_mode.o
+obj-y += board.o
 
 obj-$(CONFIG_ROCKCHIP_CRC) += rockchip_crc.o
 obj-$(CONFIG_ROCKCHIP_SMCCC) += rockchip_smccc.o
 obj-$(CONFIG_ROCKCHIP_VENDOR_PARTITION) += vendor.o
 obj-$(CONFIG_ROCKCHIP_RESOURCE_IMAGE) += resource_img.o
-obj-$(CONFIG_ROCKCHIP_RK3066) += rk3066-board.o
-obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board.o
-obj-$(CONFIG_ROCKCHIP_RK3128) += rk3128-board.o
-obj-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board.o
-obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board.o
-obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board.o
 endif
 
 obj-$(CONFIG_$(SPL_TPL_)RAM) += sdram_common.o
 
-ifndef CONFIG_ARM64
-obj-y += rk_timer.o
-endif
-
 obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036/
 obj-$(CONFIG_ROCKCHIP_RK3066) += rk3066/
 obj-$(CONFIG_ROCKCHIP_RK3128) += rk3128/
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
new file mode 100644
index 0000000000..4848c3ea3a
--- /dev/null
+++ b/arch/arm/mach-rockchip/board.c
@@ -0,0 +1,165 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <ram.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <asm/gpio.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/periph.h>
+#include <asm/arch/boot_mode.h>
+#ifdef CONFIG_DM_CHARGE_DISPLAY
+#include <power/charge_display.h>
+#endif
+#ifdef CONFIG_DM_REGULATOR
+#include <power/regulator.h>
+#endif
+#ifdef CONFIG_DRM_ROCKCHIP
+#include <video_rockchip.h>
+#endif
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#if defined(CONFIG_USB_FUNCTION_FASTBOOT)
+int fb_set_reboot_flag(void)
+{
+	printf("Setting reboot to fastboot flag ...\n");
+	/* Set boot mode to fastboot */
+	writel(BOOT_FASTBOOT, CONFIG_ROCKCHIP_BOOT_MODE_REG);
+
+	return 0;
+}
+
+#define FASTBOOT_KEY_GPIO 43 /* GPIO1_B3 */
+static int fastboot_key_pressed(void)
+{
+	gpio_request(FASTBOOT_KEY_GPIO, "fastboot_key");
+	gpio_direction_input(FASTBOOT_KEY_GPIO);
+	return !gpio_get_value(FASTBOOT_KEY_GPIO);
+}
+#endif
+
+#ifdef CONFIG_DM_CHARGE_DISPLAY
+static int charge_display(void)
+{
+	int ret;
+	struct udevice *dev;
+
+	ret = uclass_get_device(UCLASS_CHARGE_DISPLAY, 0, &dev);
+	if (ret) {
+		if (ret != -ENODEV) {
+			printf("Get UCLASS CHARGE DISPLAY failed: %d\n", ret);
+			return ret;
+		}
+		return 0;
+	}
+
+	return charge_display_show(dev);
+}
+#endif
+
+__weak int rk_board_init(void)
+{
+	return 0;
+}
+
+__weak int rk_board_late_init(void)
+{
+	return 0;
+}
+
+int board_late_init(void)
+{
+#if defined(CONFIG_USB_FUNCTION_FASTBOOT)
+	if (fastboot_key_pressed()) {
+		printf("fastboot key pressed!\n");
+		fb_set_reboot_flag();
+	}
+#endif
+
+#if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0)
+	setup_boot_mode();
+#endif
+
+#ifdef CONFIG_DM_CHARGE_DISPLAY
+	charge_display();
+#endif
+
+#ifdef CONFIG_DRM_ROCKCHIP
+	rockchip_show_logo();
+#endif
+
+	return rk_board_late_init();
+}
+
+int board_init(void)
+{
+	int ret;
+
+#ifdef CONFIG_DM_REGULATOR
+	ret = regulators_enable_boot_on(false);
+	if (ret)
+		debug("%s: Cannot enable boot on regulator\n", __func__);
+#endif
+
+	return rk_board_init();
+}
+
+#if !defined(CONFIG_SYS_DCACHE_OFF) && !defined(CONFIG_ARM64)
+void enable_caches(void)
+{
+	/* Enable D-cache. I-cache is already enabled in start.S */
+	dcache_enable();
+}
+#endif
+
+#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
+#include <usb.h>
+#include <usb/dwc2_udc.h>
+
+static struct dwc2_plat_otg_data otg_data = {
+	.rx_fifo_sz	= 512,
+	.np_tx_fifo_sz	= 16,
+	.tx_fifo_sz	= 128,
+};
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+	int node;
+	const char *mode;
+	bool matched = false;
+	const void *blob = gd->fdt_blob;
+
+	/* find the usb_otg node */
+	node = fdt_node_offset_by_compatible(blob, -1,
+					"snps,dwc2");
+
+	while (node > 0) {
+		mode = fdt_getprop(blob, node, "dr_mode", NULL);
+		if (mode && strcmp(mode, "otg") == 0) {
+			matched = true;
+			break;
+		}
+
+		node = fdt_node_offset_by_compatible(blob, node,
+					"snps,dwc2");
+	}
+	if (!matched) {
+		debug("Not found usb_otg device\n");
+		return -ENODEV;
+	}
+	otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
+
+	return dwc2_udc_probe(&otg_data);
+}
+
+int board_usb_cleanup(int index, enum usb_init_type init)
+{
+	return 0;
+}
+#endif
diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
new file mode 100644
index 0000000000..cc12a2afe3
--- /dev/null
+++ b/arch/arm/mach-rockchip/spl.c
@@ -0,0 +1,190 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <debug_uart.h>
+#include <dm.h>
+#include <ram.h>
+#include <spl.h>
+#include <asm/arch/bootrom.h>
+#include <asm/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define BROM_BOOTSOURCE_ID_ADDR (CONFIG_ROCKCHIP_IRAM_START_ADDR + 0x10)
+void board_return_to_bootrom(void)
+{
+	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
+}
+
+__weak const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
+};
+
+const char *board_spl_was_booted_from(void)
+{
+	u32  bootdevice_brom_id = readl(BROM_BOOTSOURCE_ID_ADDR);
+	const char *bootdevice_ofpath = NULL;
+
+	if (bootdevice_brom_id < ARRAY_SIZE(boot_devices))
+		bootdevice_ofpath = boot_devices[bootdevice_brom_id];
+
+	if (bootdevice_ofpath)
+		debug("%s: brom_bootdevice_id %x maps to '%s'\n",
+		      __func__, bootdevice_brom_id, bootdevice_ofpath);
+	else
+		debug("%s: failed to resolve brom_bootdevice_id %x\n",
+		      __func__, bootdevice_brom_id);
+
+	return bootdevice_ofpath;
+}
+
+u32 spl_boot_device(void)
+{
+	u32 boot_device = BOOT_DEVICE_MMC1;
+
+#if defined(CONFIG_TARGET_CHROMEBOOK_JERRY) || \
+		defined(CONFIG_TARGET_CHROMEBIT_MICKEY) || \
+		defined(CONFIG_TARGET_CHROMEBOOK_MINNIE)
+	return BOOT_DEVICE_SPI;
+#endif
+	if (CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM))
+		return BOOT_DEVICE_BOOTROM;
+
+	return boot_device;
+}
+
+u32 spl_boot_mode(const u32 boot_device)
+{
+	return MMCSD_MODE_RAW;
+}
+
+__weak void rockchip_stimer_init(void)
+{
+	writel(0, CONFIG_ROCKCHIP_STIMER_BASE + 0x10);
+	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
+	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
+	writel(1, CONFIG_ROCKCHIP_STIMER_BASE + 0x10);
+}
+
+__weak int arch_cpu_init(void)
+{
+	return 0;
+}
+
+__weak int rk_board_init_f(void)
+{
+	return 0;
+}
+
+void board_init_f(ulong dummy)
+{
+#ifdef CONFIG_SPL_FRAMEWORK
+	int ret;
+#if !defined(CONFIG_SUPPORT_TPL)
+	struct udevice *dev;
+#endif
+#endif
+
+#define EARLY_UART
+#if defined(EARLY_UART) && defined(CONFIG_DEBUG_UART)
+	/*
+	 * Debug UART can be used from here if required:
+	 *
+	 * debug_uart_init();
+	 * printch('a');
+	 * printhex8(0x1234);
+	 * printascii("string");
+	 */
+	debug_uart_init();
+	printascii("U-Boot SPL board init");
+#endif
+
+	arch_cpu_init();
+	rockchip_stimer_init();
+#ifdef CONFIG_SPL_FRAMEWORK
+	ret = spl_early_init();
+	if (ret) {
+		printf("spl_early_init() failed: %d\n", ret);
+		hang();
+	}
+#if !defined(CONFIG_SUPPORT_TPL)
+	debug("\nspl:init dram\n");
+	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
+	if (ret) {
+		printf("DRAM init failed: %d\n", ret);
+		return;
+	}
+#endif
+	preloader_console_init();
+#else
+	/* Some SoCs like rk3036 does not use any frame work */
+	sdram_init();
+#endif
+
+	rk_board_init_f();
+#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
+	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
+#endif
+
+}
+
+#ifdef CONFIG_SPL_LOAD_FIT
+int board_fit_config_name_match(const char *name)
+{
+	/* Just empty function now - can't decide what to choose */
+	debug("%s: %s\n", __func__, name);
+
+	return 0;
+}
+#endif
+
+#ifdef CONFIG_SPL_BOARD_INIT
+__weak int rk_spl_board_init(void)
+{
+	return 0;
+}
+
+static int setup_led(void)
+{
+#ifdef CONFIG_SPL_LED
+	struct udevice *dev;
+	char *led_name;
+	int ret;
+
+	led_name = fdtdec_get_config_string(gd->fdt_blob, "u-boot,boot-led");
+	if (!led_name)
+		return 0;
+	ret = led_get_by_label(led_name, &dev);
+	if (ret) {
+		debug("%s: get=%d\n", __func__, ret);
+		return ret;
+	}
+	ret = led_set_on(dev, 1);
+	if (ret)
+		return ret;
+#endif
+
+	return 0;
+}
+
+void spl_board_init(void)
+{
+	int ret;
+
+	ret = setup_led();
+
+	if (ret) {
+		debug("LED ret=%d\n", ret);
+		hang();
+	}
+
+	rk_spl_board_init();
+#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
+	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
+#endif
+	return;
+}
+#endif
diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c
new file mode 100644
index 0000000000..e28ce13ce0
--- /dev/null
+++ b/arch/arm/mach-rockchip/tpl.c
@@ -0,0 +1,102 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <debug_uart.h>
+#include <dm.h>
+#include <ns16550.h>
+#include <ram.h>
+#include <spl.h>
+#include <version.h>
+#include <asm/io.h>
+#include <asm/arch/bootrom.h>
+#include <asm/arch/uart.h>
+
+#ifndef CONFIG_SPL_LIBCOMMON_SUPPORT
+void puts(const char *str)
+{
+	while (*str)
+		putc(*str++);
+}
+
+void putc(char c)
+{
+	if (c == '\n')
+		NS16550_putc((NS16550_t)(CONFIG_SYS_NS16550_COM1), '\r');
+
+	NS16550_putc((NS16550_t)(CONFIG_SYS_NS16550_COM1), c);
+}
+#endif /* CONFIG_SPL_LIBCOMMON_SUPPORT */
+
+u32 spl_boot_device(void)
+{
+	return BOOT_DEVICE_BOOTROM;
+}
+
+__weak void rockchip_stimer_init(void)
+{
+#ifndef CONFIG_ARM64
+	asm volatile("mcr p15, 0, %0, c14, c0, 0"
+		     : : "r"(COUNTER_FREQUENCY));
+#endif
+	writel(0, CONFIG_ROCKCHIP_STIMER_BASE + 0x10);
+	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
+	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
+	writel(1, CONFIG_ROCKCHIP_STIMER_BASE + 0x10);
+}
+
+void board_init_f(ulong dummy)
+{
+	struct udevice *dev;
+	int ret;
+
+#define EARLY_DEBUG
+#ifdef EARLY_DEBUG
+	/*
+	 * Debug UART can be used from here if required:
+	 *
+	 * debug_uart_init();
+	 * printch('a');
+	 * printhex8(0x1234);
+	 * printascii("string");
+	 */
+	debug_uart_init();
+	printascii("\nU-Boot TPL " PLAIN_VERSION " (" U_BOOT_DATE " - " \
+				U_BOOT_TIME ")\n");
+
+#endif
+	ret = spl_early_init();
+	if (ret) {
+		debug("spl_early_init() failed: %d\n", ret);
+		hang();
+	}
+
+	rockchip_stimer_init();
+	/* Init ARM arch timer */
+	timer_init();
+	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
+	if (ret) {
+		printf("DRAM init failed: %d\n", ret);
+		return;
+	}
+
+#if defined(CONFIG_TPL_ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_TPL_BOARD_INIT)
+	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
+#endif
+}
+
+#ifndef CONFIG_SPL_FRAMEWORK
+/* Place Holders */
+void board_init_r(gd_t *id, ulong dest_addr)
+{
+	/*
+	 * Function attribute is no-return
+	 * This Function never executes
+	 */
+	while (1)
+		;
+}
+#endif

commit 7a6ed8e85fb413a7da484e9c30b1e9beab2e594a
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 22 15:05:24 2018 +0800

    rockchip: declear boot_devices in bootrom.h
    
    boot_devices may defined in soc file, and used in board file,
    we need to delear it in header file.
    
    Change-Id: I621dac73d0e00379da49b78b3a9079e30642881a
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/bootrom.h b/arch/arm/include/asm/arch-rockchip/bootrom.h
index 91e75cf732..78f9da6a64 100644
--- a/arch/arm/include/asm/arch-rockchip/bootrom.h
+++ b/arch/arm/include/asm/arch-rockchip/bootrom.h
@@ -53,6 +53,8 @@ enum {
 	BROM_LAST_BOOTSOURCE = BROM_BOOTSOURCE_USB
 };
 
+extern const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1];
+
 /**
  * Locations of the boot-device identifier in SRAM
  */

commit 09a3210f7f7d778e3ae750dbd8e581d5a0c5a2e8
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 22 15:03:08 2018 +0800

    rockchip: spl-boot-order: do not enable with OF_PLATDATA
    
    The "fdt_*" functions may not enable even if the OF_CONTROL is enabled.
    
    Change-Id: I66760056f6f721e4d33f25468b46b1446ebbaf4a
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/spl-boot-order.c b/arch/arm/mach-rockchip/spl-boot-order.c
index 843998dfdc..c00a68a9fa 100644
--- a/arch/arm/mach-rockchip/spl-boot-order.c
+++ b/arch/arm/mach-rockchip/spl-boot-order.c
@@ -9,7 +9,7 @@
 #include <mmc.h>
 #include <spl.h>
 
-#if CONFIG_IS_ENABLED(OF_CONTROL)
+#if CONFIG_IS_ENABLED(OF_CONTROL) && ! CONFIG_IS_ENABLED(OF_PLATDATA)
 /**
  * spl_node_to_boot_device() - maps from a DT-node to a SPL boot device
  * @node:	of_offset of the node

commit f10f1ffab44a841f99cf9a61f51e6a0b5f526dc8
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 22 14:58:18 2018 +0800

    rockchip: dts: rk3399-firefly: enable uart2 in spl
    
    pre-loader console in SPL needs UART.
    
    Change-Id: I2db396f00ec8a96452a53be1806ea0ef7aacd990
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3399-firefly.dts b/arch/arm/dts/rk3399-firefly.dts
index f134c00688..a007fa1013 100644
--- a/arch/arm/dts/rk3399-firefly.dts
+++ b/arch/arm/dts/rk3399-firefly.dts
@@ -648,6 +648,7 @@
 };
 
 &uart2 {
+	u-boot,dm-pre-reloc;
 	status = "okay";
 };
 

commit 04623617acee518e879f2071fcccb0b31239f913
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 22 14:57:06 2018 +0800

    rockchip: remove rk_timer
    
    We do not use rk_timer.c now, remove it.
    
    Change-Id: Ifd4863031cc782fd8d85b494046f346230087f9a
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk_timer.c b/arch/arm/mach-rockchip/rk_timer.c
deleted file mode 100644
index 853b986646..0000000000
--- a/arch/arm/mach-rockchip/rk_timer.c
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * (C) Copyright 2015 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/arch/timer.h>
-#include <asm/io.h>
-#include <linux/types.h>
-
-struct rk_timer * const timer_ptr = (void *)CONFIG_SYS_TIMER_BASE;
-
-static uint64_t rockchip_get_ticks(void)
-{
-	uint64_t timebase_h, timebase_l;
-
-	timebase_l = readl(&timer_ptr->timer_curr_value0);
-	timebase_h = readl(&timer_ptr->timer_curr_value1);
-
-	return timebase_h << 32 | timebase_l;
-}
-
-static uint64_t usec_to_tick(unsigned int usec)
-{
-	uint64_t tick = usec;
-	tick *= CONFIG_SYS_TIMER_RATE / (1000 * 1000);
-	return tick;
-}
-
-void rockchip_udelay(unsigned int usec)
-{
-	uint64_t tmp;
-
-	/* get timestamp */
-	tmp = rockchip_get_ticks() + usec_to_tick(usec);
-
-	/* loop till event */
-	while (rockchip_get_ticks() < tmp+1)
-		;
-}
-
-void rockchip_timer_init(void)
-{
-	writel(0xffffffff, &timer_ptr->timer_load_count0);
-	writel(0xffffffff, &timer_ptr->timer_load_count1);
-	writel(1, &timer_ptr->timer_ctrl_reg);
-}

commit 9d6b570b8865186d659928cb31052f0944a1f510
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 22 14:45:21 2018 +0800

    rockchip: lion-rk3368: remove rockchip timer
    
    We use ARM generic timer.
    
    Change-Id: Iafc3a71c87dd3f005134c3e6235ec5f8294a415d
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig
index 330063d1b4..ccfde2f5c6 100644
--- a/configs/lion-rk3368_defconfig
+++ b/configs/lion-rk3368_defconfig
@@ -88,10 +88,6 @@ CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_ROCKCHIP_SPI=y
 CONFIG_SYSRESET=y
-CONFIG_TIMER=y
-CONFIG_SPL_TIMER=y
-CONFIG_TPL_TIMER=y
-CONFIG_ROCKCHIP_TIMER=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_LZO=y

commit db48fc9697af8c1a6cfd5c5fa92c2f98fa2cefe1
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 22 14:44:10 2018 +0800

    rockchip: rk3399: use common board file
    
    Use common board file and move SoC spec setting into rk3399.c
    
    Change-Id: Ic674cef566b16c33978a1430eadfa9438b2de1db
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3399-board-spl.c b/arch/arm/mach-rockchip/rk3399-board-spl.c
deleted file mode 100644
index 6212d96de8..0000000000
--- a/arch/arm/mach-rockchip/rk3399-board-spl.c
+++ /dev/null
@@ -1,183 +0,0 @@
-/*
- * (C) Copyright 2016 Rockchip Electronics Co., Ltd
- * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/arch/bootrom.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/grf_rk3399.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/periph.h>
-#include <asm/io.h>
-#include <debug_uart.h>
-#include <dm.h>
-#include <dm/pinctrl.h>
-#include <ram.h>
-#include <spl.h>
-#include <syscon.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-void board_return_to_bootrom(void)
-{
-	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
-}
-
-static const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
-	[BROM_BOOTSOURCE_EMMC] = "/sdhci@fe330000",
-	[BROM_BOOTSOURCE_SPINOR] = "/spi@ff1d0000",
-	[BROM_BOOTSOURCE_SD] = "/dwmmc@fe320000",
-};
-
-const char *board_spl_was_booted_from(void)
-{
-	u32  bootdevice_brom_id = readl(RK3399_BROM_BOOTSOURCE_ID_ADDR);
-	const char *bootdevice_ofpath = NULL;
-
-	if (bootdevice_brom_id < ARRAY_SIZE(boot_devices))
-		bootdevice_ofpath = boot_devices[bootdevice_brom_id];
-
-	if (bootdevice_ofpath)
-		debug("%s: brom_bootdevice_id %x maps to '%s'\n",
-		      __func__, bootdevice_brom_id, bootdevice_ofpath);
-	else
-		debug("%s: failed to resolve brom_bootdevice_id %x\n",
-		      __func__, bootdevice_brom_id);
-
-	return bootdevice_ofpath;
-}
-
-u32 spl_boot_device(void)
-{
-	u32 boot_device = BOOT_DEVICE_MMC1;
-
-	if (CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM))
-		return BOOT_DEVICE_BOOTROM;
-
-	return boot_device;
-}
-
-u32 spl_boot_mode(const u32 boot_device)
-{
-	return MMCSD_MODE_RAW;
-}
-
-#define TIMER_CHN10_BASE	0xff8680a0
-#define TIMER_END_COUNT_L	0x00
-#define TIMER_END_COUNT_H	0x04
-#define TIMER_INIT_COUNT_L	0x10
-#define TIMER_INIT_COUNT_H	0x14
-#define TIMER_CONTROL_REG	0x1c
-
-#define TIMER_EN	0x1
-#define	TIMER_FMODE	(0 << 1)
-#define	TIMER_RMODE	(1 << 1)
-
-void secure_timer_init(void)
-{
-	writel(0xffffffff, TIMER_CHN10_BASE + TIMER_END_COUNT_L);
-	writel(0xffffffff, TIMER_CHN10_BASE + TIMER_END_COUNT_H);
-	writel(0, TIMER_CHN10_BASE + TIMER_INIT_COUNT_L);
-	writel(0, TIMER_CHN10_BASE + TIMER_INIT_COUNT_H);
-	writel(TIMER_EN | TIMER_FMODE, TIMER_CHN10_BASE + TIMER_CONTROL_REG);
-}
-
-void board_debug_uart_init(void)
-{
-#define GRF_BASE	0xff770000
-	struct rk3399_grf_regs * const grf = (void *)GRF_BASE;
-
-#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000)
-	/* Enable early UART0 on the RK3399 */
-	rk_clrsetreg(&grf->gpio2c_iomux,
-		     GRF_GPIO2C0_SEL_MASK,
-		     GRF_UART0BT_SIN << GRF_GPIO2C0_SEL_SHIFT);
-	rk_clrsetreg(&grf->gpio2c_iomux,
-		     GRF_GPIO2C1_SEL_MASK,
-		     GRF_UART0BT_SOUT << GRF_GPIO2C1_SEL_SHIFT);
-#else
-	/* Enable early UART2 channel C on the RK3399 */
-	rk_clrsetreg(&grf->gpio4c_iomux,
-		     GRF_GPIO4C3_SEL_MASK,
-		     GRF_UART2DGBC_SIN << GRF_GPIO4C3_SEL_SHIFT);
-	rk_clrsetreg(&grf->gpio4c_iomux,
-		     GRF_GPIO4C4_SEL_MASK,
-		     GRF_UART2DBGC_SOUT << GRF_GPIO4C4_SEL_SHIFT);
-	/* Set channel C as UART2 input */
-	rk_clrsetreg(&grf->soc_con7,
-		     GRF_UART_DBG_SEL_MASK,
-		     GRF_UART_DBG_SEL_C << GRF_UART_DBG_SEL_SHIFT);
-#endif
-}
-
-void board_init_f(ulong dummy)
-{
-	struct udevice *pinctrl;
-	struct udevice *dev;
-	struct rk3399_pmusgrf_regs *sgrf;
-	struct rk3399_grf_regs *grf;
-	int ret;
-
-#define EARLY_UART
-#ifdef EARLY_UART
-	/*
-	 * Debug UART can be used from here if required:
-	 *
-	 * debug_uart_init();
-	 * printch('a');
-	 * printhex8(0x1234);
-	 * printascii("string");
-	 */
-	debug_uart_init();
-	printascii("U-Boot SPL board init");
-#endif
-
-	secure_timer_init();
-	ret = spl_early_init();
-	if (ret) {
-		debug("spl_early_init() failed: %d\n", ret);
-		hang();
-	}
-
-	/*
-	 * Disable DDR and SRAM security regions.
-	 *
-	 * As we are entered from the BootROM, the region from
-	 * 0x0 through 0xfffff (i.e. the first MB of memory) will
-	 * be protected. This will cause issues with the DW_MMC
-	 * driver, which tries to DMA from/to the stack (likely)
-	 * located in this range.
-	 */
-	sgrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUSGRF);
-	rk_clrsetreg(&sgrf->ddr_rgn_con[16], 0x1ff, 0);
-	rk_clrreg(&sgrf->slv_secure_con4, 0x2000);
-
-	/*  eMMC clock generator: disable the clock multipilier */
-	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	rk_clrreg(&grf->emmccore_con[11], 0x0ff);
-
-	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
-	if (ret) {
-		debug("Pinctrl init failed: %d\n", ret);
-		return;
-	}
-
-	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
-	if (ret) {
-		debug("DRAM init failed: %d\n", ret);
-		return;
-	}
-}
-
-#ifdef CONFIG_SPL_LOAD_FIT
-int board_fit_config_name_match(const char *name)
-{
-	/* Just empty function now - can't decide what to choose */
-	debug("%s: %s\n", __func__, name);
-
-	return 0;
-}
-#endif
diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c
index f2f2f75e32..27697a8e44 100644
--- a/arch/arm/mach-rockchip/rk3399/rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
@@ -5,13 +5,12 @@
  */
 
 #include <common.h>
-#include <syscon.h>
 #include <asm/armv8/mmu.h>
-#include <asm/arch/boot_mode.h>
-#include <asm/arch/clock.h>
+#include <asm/arch/bootrom.h>
 #include <asm/arch/grf_rk3399.h>
 #include <asm/arch/hardware.h>
 #include <asm/io.h>
+#include <syscon.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -40,47 +39,91 @@ static struct mm_region rk3399_mem_map[] = {
 
 struct mm_region *mem_map = rk3399_mem_map;
 
-int dram_init_banksize(void)
-{
-	size_t max_size = min((unsigned long)gd->ram_size, gd->ram_top);
+const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
+	[BROM_BOOTSOURCE_EMMC] = "/sdhci@fe330000",
+	[BROM_BOOTSOURCE_SPINOR] = "/spi@ff1d0000",
+	[BROM_BOOTSOURCE_SD] = "/dwmmc@fe320000",
+};
 
-	/* Reserve 0x200000 for ATF bl31 */
-	gd->bd->bi_dram[0].start = 0x200000;
-	gd->bd->bi_dram[0].size = max_size - gd->bd->bi_dram[0].start;
+#ifdef CONFIG_SPL_BUILD
 
-	return 0;
+#define TIMER_CHN10_BASE	0xff8680a0
+#define TIMER_END_COUNT_L	0x00
+#define TIMER_END_COUNT_H	0x04
+#define TIMER_INIT_COUNT_L	0x10
+#define TIMER_INIT_COUNT_H	0x14
+#define TIMER_CONTROL_REG	0x1c
+
+#define TIMER_EN	0x1
+#define	TIMER_FMODE	(0 << 1)
+#define	TIMER_RMODE	(1 << 1)
+
+void rockchip_stimer_init(void)
+{
+	writel(0xffffffff, TIMER_CHN10_BASE + TIMER_END_COUNT_L);
+	writel(0xffffffff, TIMER_CHN10_BASE + TIMER_END_COUNT_H);
+	writel(0, TIMER_CHN10_BASE + TIMER_INIT_COUNT_L);
+	writel(0, TIMER_CHN10_BASE + TIMER_INIT_COUNT_H);
+	writel(TIMER_EN | TIMER_FMODE, TIMER_CHN10_BASE + TIMER_CONTROL_REG);
+	printf("%s\n", __func__);
 }
 
+#define GRF_BASE	0xff770000
+#define PMUGRF_BASE	0xff320000
+#define PMUSGRF_BASE	0xff330000
 int arch_cpu_init(void)
 {
-	/* We do some SoC one time setting here. */
+	struct rk3399_pmusgrf_regs *sgrf = (void *)PMUSGRF_BASE;
+	struct rk3399_pmugrf_regs *pmugrf = (void *)PMUGRF_BASE;
+	struct rk3399_grf_regs * const grf = (void *)GRF_BASE;
 
-	/* Emmc clock generator: disable the clock multipilier */
-	rk_clrreg(GRF_EMMCCORE_CON11, 0x0ff);
+	/* We do some SoC one time setting here. */
+	/*
+	 * Disable DDR and SRAM security regions.
+	 *
+	 * As we are entered from the BootROM, the region from
+	 * 0x0 through 0xfffff (i.e. the first MB of memory) will
+	 * be protected. This will cause issues with the DW_MMC
+	 * driver, which tries to DMA from/to the stack (likely)
+	 * located in this range.
+	 */
+	rk_clrsetreg(&sgrf->ddr_rgn_con[16], 0x1ff, 0);
+	rk_clrreg(&sgrf->slv_secure_con4, 0x2000);
+
+	/*  eMMC clock generator: disable the clock multipilier */
+	rk_clrreg(&grf->emmccore_con[11], 0x0ff);
 
 	/* PWM3 select pwm3a io */
-	rk_clrreg(PMU_GRF_SOC_CON0, 1 << 5);
-
-	return 0;
-}
-
-int board_late_init(void)
-{
-	setup_boot_mode();
+	rk_clrreg(&pmugrf->soc_con0, 1 << 5);
 
 	return 0;
 }
+#endif
 
-#if defined(CONFIG_USB_FUNCTION_FASTBOOT)
-int fb_set_reboot_flag(void)
+void board_debug_uart_init(void)
 {
-	struct rk3399_pmugrf_regs *pmugrf;
-
-	printf("Setting reboot to fastboot flag ...\n");
-	pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
-	/* Clear boot mode */
-	writel(BOOT_FASTBOOT, &pmugrf->os_reg0);
-
-	return 0;
-}
+#define GRF_BASE	0xff770000
+	struct rk3399_grf_regs * const grf = (void *)GRF_BASE;
+
+#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000)
+	/* Enable early UART0 on the RK3399 */
+	rk_clrsetreg(&grf->gpio2c_iomux,
+		     GRF_GPIO2C0_SEL_MASK,
+		     GRF_UART0BT_SIN << GRF_GPIO2C0_SEL_SHIFT);
+	rk_clrsetreg(&grf->gpio2c_iomux,
+		     GRF_GPIO2C1_SEL_MASK,
+		     GRF_UART0BT_SOUT << GRF_GPIO2C1_SEL_SHIFT);
+#else
+	/* Enable early UART2 channel C on the RK3399 */
+	rk_clrsetreg(&grf->gpio4c_iomux,
+		     GRF_GPIO4C3_SEL_MASK,
+		     GRF_UART2DGBC_SIN << GRF_GPIO4C3_SEL_SHIFT);
+	rk_clrsetreg(&grf->gpio4c_iomux,
+		     GRF_GPIO4C4_SEL_MASK,
+		     GRF_UART2DBGC_SOUT << GRF_GPIO4C4_SEL_SHIFT);
+	/* Set channel C as UART2 input */
+	rk_clrsetreg(&grf->soc_con7,
+		     GRF_UART_DBG_SEL_MASK,
+		     GRF_UART_DBG_SEL_C << GRF_UART_DBG_SEL_SHIFT);
 #endif
+}
diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c b/board/rockchip/evb_rk3399/evb-rk3399.c
index e2e6d49e9a..c2b6d83d5c 100644
--- a/board/rockchip/evb_rk3399/evb-rk3399.c
+++ b/board/rockchip/evb_rk3399/evb-rk3399.c
@@ -23,7 +23,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define RK3399_CPUID_OFF  0x7
 #define RK3399_CPUID_LEN  0x10
 
-int board_init(void)
+int rk_board_init(void)
 {
 	struct udevice *pinctrl, *regulator;
 	int ret;
@@ -58,10 +58,6 @@ int board_init(void)
 		goto out;
 	}
 
-	ret = regulators_enable_boot_on(false);
-	if (ret)
-		debug("%s: Cannot enable boot on regulator\n", __func__);
-
 	ret = regulator_get_by_platname("vcc5v0_host", &regulator);
 	if (ret) {
 		debug("%s vcc5v0_host init fail! ret %d\n", __func__, ret);
@@ -211,30 +207,3 @@ int board_usb_init(int index, enum usb_init_type init)
 	return dwc3_uboot_init(&dwc3_device_data);
 }
 #endif
-
-void spl_board_init(void)
-{
-	struct udevice *pinctrl;
-	int ret;
-
-	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
-	if (ret) {
-		debug("%s: Cannot find pinctrl device\n", __func__);
-		goto err;
-	}
-
-	/* Enable debug UART */
-	ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART_DBG);
-	if (ret) {
-		debug("%s: Failed to set up console UART\n", __func__);
-		goto err;
-	}
-
-	preloader_console_init();
-	return;
-err:
-	printf("%s: Error %d\n", __func__, ret);
-
-	/* No way to report error here */
-	hang();
-}
diff --git a/board/theobroma-systems/puma_rk3399/puma-rk3399.c b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
index c6690fa069..9946311a23 100644
--- a/board/theobroma-systems/puma_rk3399/puma-rk3399.c
+++ b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
@@ -25,21 +25,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-int board_init(void)
-{
-	int ret;
-
-	/*
-	 * We need to call into regulators_enable_boot_on() again, as the call
-	 * during SPL may have not included all regulators.
-	 */
-	ret = regulators_enable_boot_on(false);
-	if (ret)
-		debug("%s: Cannot enable boot on regulator\n", __func__);
-
-	return 0;
-}
-
 static void rk3399_force_power_on_reset(void)
 {
 	ofnode node;
@@ -62,7 +47,7 @@ static void rk3399_force_power_on_reset(void)
 	dm_gpio_set_value(&sysreset_gpio, 1);
 }
 
-void spl_board_init(void)
+void rk_spl_board_init(void)
 {
 	int  ret;
 	struct rk3399_cru *cru = rockchip_get_cru();

commit 9814e89b6924f49be60fe6d61916116fba89ca04
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 22 14:39:30 2018 +0800

    rockchip: rk3368: use common board file
    
    Use common board file and move SoC spec setting into rk3368.c
    
    Change-Id: I1d5a2b0bae03f89092cc0daf1c52622b3884cc43
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3368-board-spl.c b/arch/arm/mach-rockchip/rk3368-board-spl.c
deleted file mode 100644
index 72d2c97d36..0000000000
--- a/arch/arm/mach-rockchip/rk3368-board-spl.c
+++ /dev/null
@@ -1,78 +0,0 @@
-/*
- * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <debug_uart.h>
-#include <dm.h>
-#include <dm/pinctrl.h>
-#include <ram.h>
-#include <spl.h>
-#include <asm/io.h>
-#include <asm/arch/cru_rk3368.h>
-#include <asm/arch/grf_rk3368.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/periph.h>
-#include <asm/arch/timer.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-void board_debug_uart_init(void)
-{
-}
-
-void board_init_f(ulong dummy)
-{
-	struct udevice *pinctrl;
-	struct udevice *dev;
-	int ret;
-
-	ret = spl_early_init();
-	if (ret) {
-		debug("spl_early_init() failed: %d\n", ret);
-		hang();
-	}
-
-	/* Set up our preloader console */
-	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
-	if (ret) {
-		pr_err("%s: pinctrl init failed: %d\n", __func__, ret);
-		hang();
-	}
-
-	ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART0);
-	if (ret) {
-		pr_err("%s: failed to set up console UART\n", __func__);
-		hang();
-	}
-
-	preloader_console_init();
-
-	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
-	if (ret) {
-		debug("DRAM init failed: %d\n", ret);
-		return;
-	}
-}
-
-u32 spl_boot_mode(const u32 boot_device)
-{
-	return MMCSD_MODE_RAW;
-}
-
-u32 spl_boot_device(void)
-{
-	return BOOT_DEVICE_MMC1;
-}
-
-#ifdef CONFIG_SPL_LOAD_FIT
-int board_fit_config_name_match(const char *name)
-{
-	/* Just empty function now - can't decide what to choose */
-	debug("%s: %s\n", __func__, name);
-
-	return 0;
-}
-#endif
diff --git a/arch/arm/mach-rockchip/rk3368-board-tpl.c b/arch/arm/mach-rockchip/rk3368-board-tpl.c
deleted file mode 100644
index 60d5aeade9..0000000000
--- a/arch/arm/mach-rockchip/rk3368-board-tpl.c
+++ /dev/null
@@ -1,157 +0,0 @@
-/*
- * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/arch/clock.h>
-#include <debug_uart.h>
-#include <dm.h>
-#include <ram.h>
-#include <spl.h>
-#include <asm/io.h>
-#include <asm/arch/bootrom.h>
-#include <asm/arch/cru_rk3368.h>
-#include <asm/arch/grf_rk3368.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/timer.h>
-#include <syscon.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/*
- * The SPL (and also the full U-Boot stage on the RK3368) will run in
- * secure mode (i.e. EL3) and an ATF will eventually be booted before
- * starting up the operating system... so we can initialize the SGRF
- * here and rely on the ATF installing the final (secure) policy
- * later.
- */
-static inline uintptr_t sgrf_soc_con_addr(unsigned no)
-{
-	const uintptr_t SGRF_BASE =
-		(uintptr_t)syscon_get_first_range(ROCKCHIP_SYSCON_SGRF);
-
-	return SGRF_BASE + sizeof(u32) * no;
-}
-
-static inline uintptr_t sgrf_busdmac_addr(unsigned no)
-{
-	const uintptr_t SGRF_BASE =
-		(uintptr_t)syscon_get_first_range(ROCKCHIP_SYSCON_SGRF);
-	const uintptr_t SGRF_BUSDMAC_OFFSET = 0x100;
-	const uintptr_t SGRF_BUSDMAC_BASE = SGRF_BASE + SGRF_BUSDMAC_OFFSET;
-
-	return SGRF_BUSDMAC_BASE + sizeof(u32) * no;
-}
-
-static void sgrf_init(void)
-{
-	struct rk3368_cru * const cru =
-		(struct rk3368_cru * const)rockchip_get_cru();
-	const u16 SGRF_SOC_CON_SEC = GENMASK(15, 0);
-	const u16 SGRF_BUSDMAC_CON0_SEC = BIT(2);
-	const u16 SGRF_BUSDMAC_CON1_SEC = GENMASK(15, 12);
-
-	/* Set all configurable IP to 'non secure'-mode */
-	rk_setreg(sgrf_soc_con_addr(5), SGRF_SOC_CON_SEC);
-	rk_setreg(sgrf_soc_con_addr(6), SGRF_SOC_CON_SEC);
-	rk_setreg(sgrf_soc_con_addr(7), SGRF_SOC_CON_SEC);
-
-	/*
-	 * From rockchip-uboot/arch/arm/cpu/armv8/rk33xx/cpu.c
-	 * Original comment: "ddr space set no secure mode"
-	 */
-	rk_clrreg(sgrf_soc_con_addr(8), SGRF_SOC_CON_SEC);
-	rk_clrreg(sgrf_soc_con_addr(9), SGRF_SOC_CON_SEC);
-	rk_clrreg(sgrf_soc_con_addr(10), SGRF_SOC_CON_SEC);
-
-	/* Set 'secure dma' to 'non secure'-mode */
-	rk_setreg(sgrf_busdmac_addr(0), SGRF_BUSDMAC_CON0_SEC);
-	rk_setreg(sgrf_busdmac_addr(1), SGRF_BUSDMAC_CON1_SEC);
-
-	dsb();  /* barrier */
-
-	rk_setreg(&cru->softrst_con[1], DMA1_SRST_REQ);
-	rk_setreg(&cru->softrst_con[4], DMA2_SRST_REQ);
-
-	dsb();  /* barrier */
-	udelay(10);
-
-	rk_clrreg(&cru->softrst_con[1], DMA1_SRST_REQ);
-	rk_clrreg(&cru->softrst_con[4], DMA2_SRST_REQ);
-}
-
-void board_debug_uart_init(void)
-{
-	/*
-	 * N.B.: This is called before the device-model has been
-	 *       initialised. For this reason, we can not access
-	 *       the GRF address range using the syscon API.
-	 */
-	struct rk3368_grf * const grf =
-		(struct rk3368_grf * const)0xff770000;
-
-	enum {
-		GPIO2D1_MASK            = GENMASK(3, 2),
-		GPIO2D1_GPIO            = 0,
-		GPIO2D1_UART0_SOUT      = (1 << 2),
-
-		GPIO2D0_MASK            = GENMASK(1, 0),
-		GPIO2D0_GPIO            = 0,
-		GPIO2D0_UART0_SIN       = (1 << 0),
-	};
-
-#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000)
-	/* Enable early UART0 on the RK3368 */
-	rk_clrsetreg(&grf->gpio2d_iomux,
-		     GPIO2D0_MASK, GPIO2D0_UART0_SIN);
-	rk_clrsetreg(&grf->gpio2d_iomux,
-		     GPIO2D1_MASK, GPIO2D1_UART0_SOUT);
-#endif
-}
-
-void board_init_f(ulong dummy)
-{
-	struct udevice *dev;
-	int ret;
-
-#define EARLY_UART
-#ifdef EARLY_UART
-	/*
-	 * Debug UART can be used from here if required:
-	 *
-	 * debug_uart_init();
-	 * printch('a');
-	 * printhex8(0x1234);
-	 * printascii("string");
-	 */
-	debug_uart_init();
-	printascii("U-Boot TPL board init\n");
-#endif
-
-	ret = spl_early_init();
-	if (ret) {
-		debug("spl_early_init() failed: %d\n", ret);
-		hang();
-	}
-
-	/* Reset security, so we can use DMA in the MMC drivers */
-	sgrf_init();
-
-	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
-	if (ret) {
-		debug("DRAM init failed: %d\n", ret);
-		return;
-	}
-}
-
-void board_return_to_bootrom(void)
-{
-	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
-}
-
-u32 spl_boot_device(void)
-{
-	return BOOT_DEVICE_BOOTROM;
-}
diff --git a/arch/arm/mach-rockchip/rk3368/rk3368.c b/arch/arm/mach-rockchip/rk3368/rk3368.c
index ce9e62669f..b00364305f 100644
--- a/arch/arm/mach-rockchip/rk3368/rk3368.c
+++ b/arch/arm/mach-rockchip/rk3368/rk3368.c
@@ -7,6 +7,7 @@
 
 #include <common.h>
 #include <asm/armv8/mmu.h>
+#include <asm/arch/bootrom.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/cru_rk3368.h>
@@ -83,16 +84,10 @@ static struct mm_region rk3368_mem_map[] = {
 
 struct mm_region *mem_map = rk3368_mem_map;
 
-int dram_init_banksize(void)
-{
-	size_t max_size = min((unsigned long)gd->ram_size, gd->ram_top);
-
-	/* Reserve 0x200000 for ATF bl31 */
-	gd->bd->bi_dram[0].start = 0x200000;
-	gd->bd->bi_dram[0].size = max_size - gd->bd->bi_dram[0].start;
-
-	return 0;
-}
+const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
+	[BROM_BOOTSOURCE_EMMC] = "/dwmmc@ff0f0000",
+	[BROM_BOOTSOURCE_SD] = "/dwmmc@ff0c0000",
+};
 
 #ifdef CONFIG_ARCH_EARLY_INIT_R
 static int mcu_init(void)
@@ -123,6 +118,13 @@ static int mcu_init(void)
 	return 0;
 }
 
+int arch_early_init_r(void)
+{
+	return mcu_init();
+}
+#endif
+
+#ifdef CONFIG_SPL_BUILD
 static void cpu_axi_qos_prority_level_config(void)
 {
 	u32 level;
@@ -153,6 +155,97 @@ static void cpu_axi_qos_prority_level_config(void)
 	writel(level, ISP_W1_QOS_BASE + CPU_AXI_QOS_PRIORITY);
 }
 
+/*
+ * The SPL (and also the full U-Boot stage on the RK3368) will run in
+ * secure mode (i.e. EL3) and an ATF will eventually be booted before
+ * starting up the operating system... so we can initialize the SGRF
+ * here and rely on the ATF installing the final (secure) policy
+ * later.
+ */
+static inline uintptr_t sgrf_soc_con_addr(unsigned no)
+{
+	const uintptr_t SGRF_BASE =
+		(uintptr_t)syscon_get_first_range(ROCKCHIP_SYSCON_SGRF);
+
+	return SGRF_BASE + sizeof(u32) * no;
+}
+
+static inline uintptr_t sgrf_busdmac_addr(unsigned no)
+{
+	const uintptr_t SGRF_BASE =
+		(uintptr_t)syscon_get_first_range(ROCKCHIP_SYSCON_SGRF);
+	const uintptr_t SGRF_BUSDMAC_OFFSET = 0x100;
+	const uintptr_t SGRF_BUSDMAC_BASE = SGRF_BASE + SGRF_BUSDMAC_OFFSET;
+
+	return SGRF_BUSDMAC_BASE + sizeof(u32) * no;
+}
+
+static void sgrf_init(void)
+{
+	struct rk3368_cru * const cru =
+		(struct rk3368_cru * const)rockchip_get_cru();
+	const u16 SGRF_SOC_CON_SEC = GENMASK(15, 0);
+	const u16 SGRF_BUSDMAC_CON0_SEC = BIT(2);
+	const u16 SGRF_BUSDMAC_CON1_SEC = GENMASK(15, 12);
+
+	/* Set all configurable IP to 'non secure'-mode */
+	rk_setreg(sgrf_soc_con_addr(5), SGRF_SOC_CON_SEC);
+	rk_setreg(sgrf_soc_con_addr(6), SGRF_SOC_CON_SEC);
+	rk_setreg(sgrf_soc_con_addr(7), SGRF_SOC_CON_SEC);
+
+	/*
+	 * From rockchip-uboot/arch/arm/cpu/armv8/rk33xx/cpu.c
+	 * Original comment: "ddr space set no secure mode"
+	 */
+	rk_clrreg(sgrf_soc_con_addr(8), SGRF_SOC_CON_SEC);
+	rk_clrreg(sgrf_soc_con_addr(9), SGRF_SOC_CON_SEC);
+	rk_clrreg(sgrf_soc_con_addr(10), SGRF_SOC_CON_SEC);
+
+	/* Set 'secure dma' to 'non secure'-mode */
+	rk_setreg(sgrf_busdmac_addr(0), SGRF_BUSDMAC_CON0_SEC);
+	rk_setreg(sgrf_busdmac_addr(1), SGRF_BUSDMAC_CON1_SEC);
+
+	dsb();  /* barrier */
+
+	rk_setreg(&cru->softrst_con[1], DMA1_SRST_REQ);
+	rk_setreg(&cru->softrst_con[4], DMA2_SRST_REQ);
+
+	dsb();  /* barrier */
+	udelay(10);
+
+	rk_clrreg(&cru->softrst_con[1], DMA1_SRST_REQ);
+	rk_clrreg(&cru->softrst_con[4], DMA2_SRST_REQ);
+}
+
+void board_debug_uart_init(void)
+{
+	/*
+	 * N.B.: This is called before the device-model has been
+	 *       initialised. For this reason, we can not access
+	 *       the GRF address range using the syscon API.
+	 */
+	struct rk3368_grf * const grf =
+		(struct rk3368_grf * const)0xff770000;
+
+	enum {
+		GPIO2D1_MASK            = GENMASK(3, 2),
+		GPIO2D1_GPIO            = 0,
+		GPIO2D1_UART0_SOUT      = (1 << 2),
+
+		GPIO2D0_MASK            = GENMASK(1, 0),
+		GPIO2D0_GPIO            = 0,
+		GPIO2D0_UART0_SIN       = (1 << 0),
+	};
+
+#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000)
+	/* Enable early UART0 on the RK3368 */
+	rk_clrsetreg(&grf->gpio2d_iomux,
+		     GPIO2D0_MASK, GPIO2D0_UART0_SIN);
+	rk_clrsetreg(&grf->gpio2d_iomux,
+		     GPIO2D1_MASK, GPIO2D1_UART0_SOUT);
+#endif
+}
+
 int arch_cpu_init(void)
 {
 	/* DDR read latency config */
@@ -170,11 +263,9 @@ int arch_cpu_init(void)
 	/* Cpu axi qos config */
 	cpu_axi_qos_prority_level_config();
 
-	return 0;
-}
+	/* Reset security, so we can use DMA in the MMC drivers */
+	sgrf_init();
 
-int arch_early_init_r(void)
-{
-	return mcu_init();
+	return 0;
 }
 #endif
diff --git a/board/geekbuying/geekbox/geekbox.c b/board/geekbuying/geekbox/geekbox.c
index 88b67f9d5f..d6823495ef 100644
--- a/board/geekbuying/geekbox/geekbox.c
+++ b/board/geekbuying/geekbox/geekbox.c
@@ -7,8 +7,3 @@
 #include <common.h>
 
 DECLARE_GLOBAL_DATA_PTR;
-
-int board_init(void)
-{
-	return 0;
-}
diff --git a/board/rockchip/evb_px5/evb-px5.c b/board/rockchip/evb_px5/evb-px5.c
index 6a47642b57..ec3d27e859 100644
--- a/board/rockchip/evb_px5/evb-px5.c
+++ b/board/rockchip/evb_px5/evb-px5.c
@@ -4,8 +4,3 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 #include <common.h>
-
-int board_init(void)
-{
-	return 0;
-}
diff --git a/board/rockchip/sheep_rk3368/sheep_rk3368.c b/board/rockchip/sheep_rk3368/sheep_rk3368.c
index 17adb02469..ff2d2d23e6 100644
--- a/board/rockchip/sheep_rk3368/sheep_rk3368.c
+++ b/board/rockchip/sheep_rk3368/sheep_rk3368.c
@@ -15,8 +15,3 @@ int mach_cpu_init(void)
 {
 	return 0;
 }
-
-int board_init(void)
-{
-	return 0;
-}
diff --git a/board/theobroma-systems/lion_rk3368/lion_rk3368.c b/board/theobroma-systems/lion_rk3368/lion_rk3368.c
index 73b14883c3..025692b2a4 100644
--- a/board/theobroma-systems/lion_rk3368/lion_rk3368.c
+++ b/board/theobroma-systems/lion_rk3368/lion_rk3368.c
@@ -7,9 +7,6 @@
 #include <dm.h>
 #include <ram.h>
 #include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/grf_rk3368.h>
-#include <asm/arch/timer.h>
 #include <syscon.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -18,8 +15,3 @@ int mach_cpu_init(void)
 {
 	return 0;
 }
-
-int board_init(void)
-{
-	return 0;
-}

commit 73d952acc8cc1ddad6652ba71895d9fe928c1e4b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 22 14:37:17 2018 +0800

    rockchip: rk3328: use common board file
    
    Use common board file and move SoC spec setting into rk3328.c
    
    Change-Id: Ia7cf43e0096da980d744260caa61456ddc6b24eb
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3328-board-spl.c b/arch/arm/mach-rockchip/rk3328-board-spl.c
deleted file mode 100644
index 1f7274a8d0..0000000000
--- a/arch/arm/mach-rockchip/rk3328-board-spl.c
+++ /dev/null
@@ -1,64 +0,0 @@
-/*
- * (C) Copyright 2016 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <debug_uart.h>
-#include <dm.h>
-#include <dm/pinctrl.h>
-#include <ram.h>
-#include <spl.h>
-#include <asm/io.h>
-#include <asm/arch/cru_rk3328.h>
-#include <asm/arch/grf_rk3328.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/periph.h>
-#include <asm/arch/timer.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-void board_debug_uart_init(void)
-{
-}
-
-void board_init_f(ulong dummy)
-{
-	struct udevice *dev;
-	int ret;
-
-	ret = spl_early_init();
-	if (ret) {
-		debug("spl_early_init() failed: %d\n", ret);
-		hang();
-	}
-
-	preloader_console_init();
-
-	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
-	if (ret) {
-		debug("DRAM init failed: %d\n", ret);
-		return;
-	}
-}
-
-u32 spl_boot_mode(const u32 boot_device)
-{
-	return MMCSD_MODE_RAW;
-}
-
-u32 spl_boot_device(void)
-{
-	return BOOT_DEVICE_MMC1;
-}
-
-#ifdef CONFIG_SPL_LOAD_FIT
-int board_fit_config_name_match(const char *name)
-{
-	/* Just empty function now - can't decide what to choose */
-	debug("%s: %s\n", __func__, name);
-
-	return 0;
-}
-#endif
diff --git a/arch/arm/mach-rockchip/rk3328-board-tpl.c b/arch/arm/mach-rockchip/rk3328-board-tpl.c
deleted file mode 100644
index 942223f505..0000000000
--- a/arch/arm/mach-rockchip/rk3328-board-tpl.c
+++ /dev/null
@@ -1,118 +0,0 @@
-/*
- * (C) Copyright 2016 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <debug_uart.h>
-#include <dm.h>
-#include <fdtdec.h>
-#include <led.h>
-#include <malloc.h>
-#include <mmc.h>
-#include <ram.h>
-#include <spl.h>
-#include <asm/gpio.h>
-#include <asm/io.h>
-#include <asm/arch/bootrom.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/periph.h>
-#include <asm/arch/sdram.h>
-#include <asm/arch/timer.h>
-#include <dm/pinctrl.h>
-#include <dm/root.h>
-#include <dm/test.h>
-#include <dm/util.h>
-#include <power/regulator.h>
-#include <asm/arch/grf_rk3328.h>
-#include <asm/arch/uart.h>
-
-#define CRU_BASE		0xFF440000
-#define GRF_BASE		0xFF100000
-#define UART2_BASE		0xFF130000
-#define STIMER_BASE_ADDR		0xFF1d0000
-#define CPU_TIMER_BASE			(STIMER_BASE_ADDR + 0x20)
-
-void board_timer_init(void)
-{
-	/* Initialize CNTFRQ */
-	__asm__ volatile ("LDR x0,=24000000");
-	__asm__ volatile ("MSR CNTFRQ_EL0, x0");
-
-	/* Enable STimer1 for core */
-	writel(0x0, CPU_TIMER_BASE + 0x0010);
-	writel(0xffffffff, CPU_TIMER_BASE + 0x0000);
-	writel(0xffffffff, CPU_TIMER_BASE + 0x0004);
-	writel(0x1, CPU_TIMER_BASE + 0x0010);
-}
-
-void board_debug_uart_init(void)
-{
-	struct rk3328_grf_regs * const grf = (void *)GRF_BASE;
-	struct rk_uart * const uart = (void *)UART2_BASE;
-
-	/* uart_sel_clk default select 24MHz */
-	writel((3 << (8 + 16)) | (2 << 8), CRU_BASE + 0x148);
-
-	/* init uart baud rate 1500000 */
-	writel(0x83, &uart->lcr);
-	writel(0x1, &uart->rbr);
-	writel(0x3, &uart->lcr);
-
-	/* Enable early UART2 */
-	rk_clrsetreg(&grf->com_iomux,
-		     IOMUX_SEL_UART2_MASK,
-		     IOMUX_SEL_UART2_M1 << IOMUX_SEL_UART2_SHIFT);
-	rk_clrsetreg(&grf->gpio2a_iomux,
-		     GPIO2A0_SEL_MASK,
-		     GPIO2A0_UART2_TX_M1 << GPIO2A0_SEL_SHIFT);
-	rk_clrsetreg(&grf->gpio2a_iomux,
-		     GPIO2A1_SEL_MASK,
-		     GPIO2A1_UART2_RX_M1 << GPIO2A1_SEL_SHIFT);
-
-	/* enable FIFO */
-	writel(0x1, &uart->sfe);
-}
-
-void board_return_to_bootrom(void)
-{
-	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
-}
-
-u32 spl_boot_device(void)
-{
-	return BOOT_DEVICE_BOOTROM;
-}
-
-#define FW_DDR_CON_REG 0xff7c0040
-
-void board_init_f(ulong dummy)
-{
-	struct udevice *dev;
-	int ret;
-
-#define EARLY_UART
-#ifdef EARLY_UART
-	debug_uart_init();
-	printascii("U-Boot TPL board init\n");
-#endif
-
-	board_timer_init();
-
-	ret = spl_early_init();
-	if (ret) {
-		printf("spl_early_init() failed: %d\n", ret);
-		hang();
-	}
-
-	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
-	if (ret) {
-		printf("DRAM init failed: %d\n", ret);
-		return;
-	}
-	/* Disable the ddr secure region setting to make it non-secure */
-	rk_setreg(FW_DDR_CON_REG, 0x200);
-
-}
diff --git a/arch/arm/mach-rockchip/rk3328/rk3328.c b/arch/arm/mach-rockchip/rk3328/rk3328.c
index df5b190a1e..a8de952377 100644
--- a/arch/arm/mach-rockchip/rk3328/rk3328.c
+++ b/arch/arm/mach-rockchip/rk3328/rk3328.c
@@ -5,14 +5,21 @@
  */
 
 #include <common.h>
+#include <asm/arch/bootrom.h>
 #include <asm/arch/hardware.h>
+#include <asm/arch/grf_rk3328.h>
+#include <asm/arch/uart.h>
 #include <asm/armv8/mmu.h>
 #include <asm/io.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define GRF_SOC_CON4		0xff100410
+#define CRU_BASE		0xFF440000
+#define GRF_BASE		0xFF100000
+#define UART2_BASE		0xFF130000
+
 #define CRU_MISC_CON		0xff440084
+#define FW_DDR_CON_REG		0xff7c0040
 
 static struct mm_region rk3328_mem_map[] = {
 	{
@@ -36,28 +43,56 @@ static struct mm_region rk3328_mem_map[] = {
 
 struct mm_region *mem_map = rk3328_mem_map;
 
-int dram_init_banksize(void)
-{
-	size_t max_size = min((unsigned long)gd->ram_size, gd->ram_top);
-
-	/* Reserve 0x200000 for ATF bl31 */
-	gd->bd->bi_dram[0].start = 0x200000;
-	gd->bd->bi_dram[0].size = max_size - gd->bd->bi_dram[0].start;
-
-	return 0;
-}
-
+const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
+	[BROM_BOOTSOURCE_EMMC] = "/rksdmmc@ff520000",
+	[BROM_BOOTSOURCE_SD] = "/rksdmmc@ff500000",
+};
 int arch_cpu_init(void)
 {
+#ifdef CONFIG_TPL_BUILD
+	struct rk3328_grf_regs * const grf = (void *)GRF_BASE;
 	/* We do some SoC one time setting here. */
 
+	/* Disable the ddr secure region setting to make it non-secure */
+	rk_setreg(FW_DDR_CON_REG, 0x200);
+
 	/* Enable force to jtag, jtag_tclk/tms iomuxed with sdmmc0_d2/d3 */
-	rk_setreg(GRF_SOC_CON4, 1 << 12);
+	rk_setreg(&grf->soc_con[4], 1 << 12);
 
 	/* HDMI phy clock source select HDMIPHY clock out */
 	rk_clrreg(CRU_MISC_CON, 1 << 13);
 
 	/* TODO: ECO version */
-
+#endif
 	return 0;
 }
+
+void board_debug_uart_init(void)
+{
+#ifdef CONFIG_TPL_BUILD
+	struct rk3328_grf_regs * const grf = (void *)GRF_BASE;
+	struct rk_uart * const uart = (void *)UART2_BASE;
+
+	/* uart_sel_clk default select 24MHz */
+	writel((3 << (8 + 16)) | (2 << 8), CRU_BASE + 0x148);
+
+	/* init uart baud rate 1500000 */
+	writel(0x83, &uart->lcr);
+	writel(0x1, &uart->rbr);
+	writel(0x3, &uart->lcr);
+
+	/* Enable early UART2 */
+	rk_clrsetreg(&grf->com_iomux,
+		     IOMUX_SEL_UART2_MASK,
+		     IOMUX_SEL_UART2_M1 << IOMUX_SEL_UART2_SHIFT);
+	rk_clrsetreg(&grf->gpio2a_iomux,
+		     GPIO2A0_SEL_MASK,
+		     GPIO2A0_UART2_TX_M1 << GPIO2A0_SEL_SHIFT);
+	rk_clrsetreg(&grf->gpio2a_iomux,
+		     GPIO2A1_SEL_MASK,
+		     GPIO2A1_UART2_RX_M1 << GPIO2A1_SEL_SHIFT);
+
+	/* enable FIFO */
+	writel(0x1, &uart->sfe);
+#endif
+}
diff --git a/board/rockchip/evb_rk3328/evb-rk3328.c b/board/rockchip/evb_rk3328/evb-rk3328.c
index d6fc57cd8e..c8e7a3ad64 100644
--- a/board/rockchip/evb_rk3328/evb-rk3328.c
+++ b/board/rockchip/evb_rk3328/evb-rk3328.c
@@ -3,80 +3,3 @@
  *
  * SPDX-License-Identifier:     GPL-2.0+
  */
-
-#include <common.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/grf_rk3328.h>
-#include <asm/armv8/mmu.h>
-#include <asm/io.h>
-#include <dwc3-uboot.h>
-#include <power/regulator.h>
-#include <usb.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int board_init(void)
-{
-	int ret;
-#define GRF_BASE	0xff100000
-	struct rk3328_grf_regs * const grf = (void *)GRF_BASE;
-
-	/* uart2 select m1, sdcard select m1*/
-	rk_clrsetreg(&grf->com_iomux,
-		     IOMUX_SEL_UART2_MASK | IOMUX_SEL_SDMMC_MASK,
-		     IOMUX_SEL_UART2_M1 << IOMUX_SEL_UART2_SHIFT |
-		     IOMUX_SEL_SDMMC_M1 << IOMUX_SEL_SDMMC_SHIFT);
-
-	ret = regulators_enable_boot_on(false);
-	if (ret)
-		debug("%s: Cannot enable boot on regulator\n", __func__);
-
-	return ret;
-}
-
-#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
-#include <usb.h>
-#include <usb/dwc2_udc.h>
-
-static struct dwc2_plat_otg_data rk3328_otg_data = {
-	.rx_fifo_sz	= 512,
-	.np_tx_fifo_sz	= 16,
-	.tx_fifo_sz	= 128,
-};
-
-int board_usb_init(int index, enum usb_init_type init)
-{
-	int node;
-	const char *mode;
-	bool matched = false;
-	const void *blob = gd->fdt_blob;
-
-	/* find the usb_otg node */
-	node = fdt_node_offset_by_compatible(blob, -1,
-					"rockchip,rk3328-usb");
-
-	while (node > 0) {
-		mode = fdt_getprop(blob, node, "dr_mode", NULL);
-		if (mode && strcmp(mode, "otg") == 0) {
-			matched = true;
-			break;
-		}
-
-		node = fdt_node_offset_by_compatible(blob, node,
-					"rockchip,rk3328-usb");
-	}
-	if (!matched) {
-		debug("Not found usb_otg device\n");
-		return -ENODEV;
-	}
-
-	rk3328_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
-
-	return dwc2_udc_probe(&rk3328_otg_data);
-}
-
-int board_usb_cleanup(int index, enum usb_init_type init)
-{
-	return 0;
-}
-#endif

commit 27dbe1983626d051bdd37f2418d0f94dbf7b170d
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 22 14:33:53 2018 +0800

    rockchip: rv1108: use common board file
    
    Use common board file.
    
    Change-Id: I5fefdfad9a2acdb837ffe15f93518dc26e08b9e7
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rv1108/rv1108.c b/arch/arm/mach-rockchip/rv1108/rv1108.c
index 868cdd5a63..3b6b21d4f9 100644
--- a/arch/arm/mach-rockchip/rv1108/rv1108.c
+++ b/arch/arm/mach-rockchip/rv1108/rv1108.c
@@ -5,11 +5,3 @@
  */
 
 #include <common.h>
-
-#ifndef CONFIG_SYS_DCACHE_OFF
-void enable_caches(void)
-{
-	/* Enable D-cache. I-cache is already enabled in start.S */
-	dcache_enable();
-}
-#endif
diff --git a/board/rockchip/evb_rv1108/evb_rv1108.c b/board/rockchip/evb_rv1108/evb_rv1108.c
index fe37eac420..3538f72046 100644
--- a/board/rockchip/evb_rv1108/evb_rv1108.c
+++ b/board/rockchip/evb_rv1108/evb_rv1108.c
@@ -30,12 +30,6 @@ int mach_cpu_init(void)
 	return 0;
 }
 
-
-int board_init(void)
-{
-	return 0;
-}
-
 int dram_init(void)
 {
 	gd->ram_size = 0x8000000;

commit f4c952bc1fb0ea5832299dc83fd9043ae1ef1879
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 22 14:32:34 2018 +0800

    rockchip: rk1108: remove rockchip timer for sys timer
    
    We use ARM arch timer instead.
    
    Change-Id: I834da04f1c7dc6e38ee64b420c66d2ad7d1b65ac
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h
index df6f952b6e..08198f06a3 100644
--- a/include/configs/rv1108_common.h
+++ b/include/configs/rv1108_common.h
@@ -13,11 +13,6 @@
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
-#define CONFIG_SYS_TIMER_RATE		(24 * 1000 * 1000)
-/* TIMER1,initialized by ddr initialize code */
-#define CONFIG_SYS_TIMER_BASE		0x10350020
-#define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMER_BASE + 8)
-
 #define CONFIG_SYS_SDRAM_BASE		0x60000000
 #define CONFIG_NR_DRAM_BANKS		1
 #define CONFIG_SYS_TEXT_BASE		CONFIG_SYS_SDRAM_BASE

commit 26ceaeee5f441ad10e873109a2284d252aa0d489
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 22 14:30:06 2018 +0800

    rockchip: dts: rk3288: update spl-boot-order
    
    Use "uboot,spl-boot-orde" instead of "uboot,boot0".
    
    Change-Id: I647500193ab7cd89e7e409b75793a3eff4453d84
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3288-phycore-rdk.dts b/arch/arm/dts/rk3288-phycore-rdk.dts
index f2bb7b5f11..3bf8efb319 100644
--- a/arch/arm/dts/rk3288-phycore-rdk.dts
+++ b/arch/arm/dts/rk3288-phycore-rdk.dts
@@ -53,11 +53,7 @@
 
 	chosen {
 		stdout-path = &uart2;
-	};
-
-	config {
-		u-boot,dm-pre-reloc;
-		u-boot,boot0 = &emmc;
+		u-boot,spl-boot-order = &emmc;
 	};
 
 	user_buttons: user-buttons {
diff --git a/arch/arm/dts/rk3288-veyron.dtsi b/arch/arm/dts/rk3288-veyron.dtsi
index a314058750..77b9bf8c88 100644
--- a/arch/arm/dts/rk3288-veyron.dtsi
+++ b/arch/arm/dts/rk3288-veyron.dtsi
@@ -17,11 +17,7 @@
 
 	chosen {
 		stdout-path = &uart2;
-	};
-
-	config {
-		u-boot,dm-pre-reloc;
-		u-boot,boot0 = &spi_flash;
+		u-boot,spl-boot-order = &spi_flash;
 	};
 
 	firmware {

commit fc9839356c37f899363d91086eea90aebd263ee8
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 22 14:28:02 2018 +0800

    rockchip: rk3288: use common board file
    
    Use common board file and move SoC spec setting into rk3288.c
    
    Change-Id: Ie17232dd60d2b185b635631ce9373eb59b11c89c
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3288-board-spl.c b/arch/arm/mach-rockchip/rk3288-board-spl.c
deleted file mode 100644
index f64a54843f..0000000000
--- a/arch/arm/mach-rockchip/rk3288-board-spl.c
+++ /dev/null
@@ -1,309 +0,0 @@
-/*
- * (C) Copyright 2015 Google, Inc
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <debug_uart.h>
-#include <dm.h>
-#include <fdtdec.h>
-#include <i2c.h>
-#include <led.h>
-#include <malloc.h>
-#include <ram.h>
-#include <spl.h>
-#include <asm/gpio.h>
-#include <asm/io.h>
-#include <asm/arch/bootrom.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/periph.h>
-#include <asm/arch/pmu_rk3288.h>
-#include <asm/arch/sdram.h>
-#include <asm/arch/sdram_common.h>
-#include <asm/arch/sys_proto.h>
-#include <asm/arch/timer.h>
-#include <dm/pinctrl.h>
-#include <dm/root.h>
-#include <dm/test.h>
-#include <dm/util.h>
-#include <power/regulator.h>
-#include <power/rk8xx_pmic.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-u32 spl_boot_device(void)
-{
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
-	const void *blob = gd->fdt_blob;
-	struct udevice *dev;
-	const char *bootdev;
-	int node;
-	int ret;
-
-	bootdev = fdtdec_get_config_string(blob, "u-boot,boot0");
-	debug("Boot device %s\n", bootdev);
-	if (!bootdev)
-		goto fallback;
-
-	node = fdt_path_offset(blob, bootdev);
-	if (node < 0) {
-		debug("node=%d\n", node);
-		goto fallback;
-	}
-	ret = device_get_global_by_of_offset(node, &dev);
-	if (ret) {
-		debug("device at node %s/%d not found: %d\n", bootdev, node,
-		      ret);
-		goto fallback;
-	}
-	debug("Found device %s\n", dev->name);
-	switch (device_get_uclass_id(dev)) {
-	case UCLASS_SPI_FLASH:
-		return BOOT_DEVICE_SPI;
-	case UCLASS_MMC:
-		return BOOT_DEVICE_MMC1;
-	default:
-		debug("Booting from device uclass '%s' not supported\n",
-		      dev_get_uclass_name(dev));
-	}
-
-fallback:
-#elif defined(CONFIG_TARGET_CHROMEBOOK_JERRY) || \
-		defined(CONFIG_TARGET_CHROMEBIT_MICKEY) || \
-		defined(CONFIG_TARGET_CHROMEBOOK_MINNIE)
-	return BOOT_DEVICE_SPI;
-#endif
-	return BOOT_DEVICE_MMC1;
-}
-
-u32 spl_boot_mode(const u32 boot_device)
-{
-	return MMCSD_MODE_RAW;
-}
-
-#ifdef CONFIG_SPL_MMC_SUPPORT
-static int configure_emmc(struct udevice *pinctrl)
-{
-#if defined(CONFIG_TARGET_CHROMEBOOK_JERRY)
-
-	struct gpio_desc desc;
-	int ret;
-
-	pinctrl_request_noflags(pinctrl, PERIPH_ID_EMMC);
-
-	/*
-	 * TODO(sjg@chromium.org): Pick this up from device tree or perhaps
-	 * use the EMMC_PWREN setting.
-	 */
-	ret = dm_gpio_lookup_name("D9", &desc);
-	if (ret) {
-		debug("gpio ret=%d\n", ret);
-		return ret;
-	}
-	ret = dm_gpio_request(&desc, "emmc_pwren");
-	if (ret) {
-		debug("gpio_request ret=%d\n", ret);
-		return ret;
-	}
-	ret = dm_gpio_set_dir_flags(&desc, GPIOD_IS_OUT);
-	if (ret) {
-		debug("gpio dir ret=%d\n", ret);
-		return ret;
-	}
-	ret = dm_gpio_set_value(&desc, 1);
-	if (ret) {
-		debug("gpio value ret=%d\n", ret);
-		return ret;
-	}
-#endif
-	return 0;
-}
-#endif
-
-#if !defined(CONFIG_SPL_OF_PLATDATA)
-static int phycore_init(void)
-{
-	struct udevice *pmic;
-	int ret;
-
-	ret = uclass_first_device_err(UCLASS_PMIC, &pmic);
-	if (ret)
-		return ret;
-
-#if defined(CONFIG_SPL_POWER_SUPPORT)
-	/* Increase USB input current to 2A */
-	ret = rk818_spl_configure_usb_input_current(pmic, 2000);
-	if (ret)
-		return ret;
-
-	/* Close charger when USB lower then 3.26V */
-	ret = rk818_spl_configure_usb_chrg_shutdown(pmic, 3260000);
-	if (ret)
-		return ret;
-#endif
-
-	return 0;
-}
-#endif
-
-void board_init_f(ulong dummy)
-{
-	struct udevice *pinctrl;
-	struct udevice *dev;
-	int ret;
-
-	/* Example code showing how to enable the debug UART on RK3288 */
-#include <asm/arch/grf_rk3288.h>
-	/* Enable early UART on the RK3288 */
-#define GRF_BASE	0xff770000
-	struct rk3288_grf * const grf = (void *)GRF_BASE;
-
-	rk_clrsetreg(&grf->gpio7ch_iomux, GPIO7C7_MASK << GPIO7C7_SHIFT |
-		     GPIO7C6_MASK << GPIO7C6_SHIFT,
-		     GPIO7C7_UART2DBG_SOUT << GPIO7C7_SHIFT |
-		     GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT);
-	/*
-	 * Debug UART can be used from here if required:
-	 *
-	 * debug_uart_init();
-	 * printch('a');
-	 * printhex8(0x1234);
-	 * printascii("string");
-	 */
-	debug_uart_init();
-	debug("\nspl:debug uart enabled in %s\n", __func__);
-	ret = spl_early_init();
-	if (ret) {
-		debug("spl_early_init() failed: %d\n", ret);
-		hang();
-	}
-
-	rockchip_timer_init();
-	configure_l2ctlr();
-
-	ret = rockchip_get_clk(&dev);
-	if (ret) {
-		debug("CLK init failed: %d\n", ret);
-		return;
-	}
-
-	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
-	if (ret) {
-		debug("Pinctrl init failed: %d\n", ret);
-		return;
-	}
-
-#if !defined(CONFIG_SPL_OF_PLATDATA)
-	if (of_machine_is_compatible("phytec,rk3288-phycore-som")) {
-		ret = phycore_init();
-		if (ret) {
-			debug("Failed to set up phycore power settings: %d\n",
-			      ret);
-			return;
-		}
-	}
-#endif
-
-#if !defined(CONFIG_SUPPORT_TPL)
-	debug("\nspl:init dram\n");
-	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
-	if (ret) {
-		debug("DRAM init failed: %d\n", ret);
-		return;
-	}
-#endif
-
-#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
-	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
-#endif
-}
-
-static int setup_led(void)
-{
-#ifdef CONFIG_SPL_LED
-	struct udevice *dev;
-	char *led_name;
-	int ret;
-
-	led_name = fdtdec_get_config_string(gd->fdt_blob, "u-boot,boot-led");
-	if (!led_name)
-		return 0;
-	ret = led_get_by_label(led_name, &dev);
-	if (ret) {
-		debug("%s: get=%d\n", __func__, ret);
-		return ret;
-	}
-	ret = led_set_on(dev, 1);
-	if (ret)
-		return ret;
-#endif
-
-	return 0;
-}
-
-void spl_board_init(void)
-{
-	struct udevice *pinctrl;
-	int ret;
-
-	ret = setup_led();
-
-	if (ret) {
-		debug("LED ret=%d\n", ret);
-		hang();
-	}
-
-	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
-	if (ret) {
-		debug("%s: Cannot find pinctrl device\n", __func__);
-		goto err;
-	}
-
-#ifdef CONFIG_SPL_MMC_SUPPORT
-	ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_SDCARD);
-	if (ret) {
-		debug("%s: Failed to set up SD card\n", __func__);
-		goto err;
-	}
-	ret = configure_emmc(pinctrl);
-	if (ret) {
-		debug("%s: Failed to set up eMMC\n", __func__);
-		goto err;
-	}
-#endif
-
-	/* Enable debug UART */
-	ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART_DBG);
-	if (ret) {
-		debug("%s: Failed to set up console UART\n", __func__);
-		goto err;
-	}
-
-	preloader_console_init();
-#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
-	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
-#endif
-	return;
-err:
-	printf("spl_board_init: Error %d\n", ret);
-
-	/* No way to report error here */
-	hang();
-}
-
-#ifdef CONFIG_SPL_OS_BOOT
-
-#define PMU_BASE		0xff730000
-int dram_init_banksize(void)
-{
-	struct rk3288_pmu *const pmu = (void *)PMU_BASE;
-	size_t size = rockchip_sdram_size((phys_addr_t)&pmu->sys_reg[2]);
-
-	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
-	gd->bd->bi_dram[0].size = size;
-
-	return 0;
-}
-#endif
diff --git a/arch/arm/mach-rockchip/rk3288-board-tpl.c b/arch/arm/mach-rockchip/rk3288-board-tpl.c
deleted file mode 100644
index 150beea02e..0000000000
--- a/arch/arm/mach-rockchip/rk3288-board-tpl.c
+++ /dev/null
@@ -1,84 +0,0 @@
-/*
- * Copyright (C) 2017 Amarula Solutions
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <debug_uart.h>
-#include <dm.h>
-#include <ram.h>
-#include <spl.h>
-#include <version.h>
-#include <asm/io.h>
-#include <asm/arch/bootrom.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/grf_rk3288.h>
-#include <asm/arch/periph.h>
-#include <asm/arch/pmu_rk3288.h>
-#include <asm/arch/sys_proto.h>
-#include <asm/arch/timer.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define GRF_BASE		0xff770000
-void board_init_f(ulong dummy)
-{
-	struct udevice *dev;
-	int ret;
-
-	/* Example code showing how to enable the debug UART on RK3288 */
-	/* Enable early UART on the RK3288 */
-	struct rk3288_grf * const grf = (void *)GRF_BASE;
-
-	rk_clrsetreg(&grf->gpio7ch_iomux, GPIO7C7_MASK << GPIO7C7_SHIFT |
-		     GPIO7C6_MASK << GPIO7C6_SHIFT,
-		     GPIO7C7_UART2DBG_SOUT << GPIO7C7_SHIFT |
-		     GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT);
-	/*
-	 * Debug UART can be used from here if required:
-	 *
-	 * debug_uart_init();
-	 * printch('a');
-	 * printhex8(0x1234);
-	 * printascii("string");
-	 */
-	debug_uart_init();
-
-	ret = spl_early_init();
-	if (ret) {
-		debug("spl_early_init() failed: %d\n", ret);
-		hang();
-	}
-
-	rockchip_timer_init();
-	configure_l2ctlr();
-
-	ret = rockchip_get_clk(&dev);
-	if (ret) {
-		debug("CLK init failed: %d\n", ret);
-		return;
-	}
-
-	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
-	if (ret) {
-		debug("DRAM init failed: %d\n", ret);
-		return;
-	}
-}
-
-void board_return_to_bootrom(void)
-{
-	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
-}
-
-u32 spl_boot_device(void)
-{
-	return BOOT_DEVICE_BOOTROM;
-}
-
-void spl_board_init(void)
-{
-	puts("\nU-Boot TPL " PLAIN_VERSION " (" U_BOOT_DATE " - " \
-				U_BOOT_TIME ")\n");
-}
diff --git a/arch/arm/mach-rockchip/rk3288-board.c b/arch/arm/mach-rockchip/rk3288-board.c
deleted file mode 100644
index 9e69ced931..0000000000
--- a/arch/arm/mach-rockchip/rk3288-board.c
+++ /dev/null
@@ -1,341 +0,0 @@
-/*
- * (C) Copyright 2015 Google, Inc
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <clk.h>
-#include <dm.h>
-#include <ram.h>
-#include <syscon.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/cru_rk3288.h>
-#include <asm/arch/periph.h>
-#include <asm/arch/pmu_rk3288.h>
-#include <asm/arch/qos_rk3288.h>
-#include <asm/arch/boot_mode.h>
-#include <asm/arch/timer.h>
-#include <asm/gpio.h>
-#include <dm/pinctrl.h>
-#include <dt-bindings/clock/rk3288-cru.h>
-#include <power/regulator.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-__weak int rk_board_late_init(void)
-{
-	return 0;
-}
-
-int rk3288_qos_init(void)
-{
-	int val = 2 << PRIORITY_HIGH_SHIFT | 2 << PRIORITY_LOW_SHIFT;
-	/* set vop qos to higher priority */
-	writel(val, CPU_AXI_QOS_PRIORITY + VIO0_VOP_QOS);
-	writel(val, CPU_AXI_QOS_PRIORITY + VIO1_VOP_QOS);
-
-	if (!fdt_node_check_compatible(gd->fdt_blob, 0,
-				       "rockchip,rk3288-tinker"))
-	{
-		/* set isp qos to higher priority */
-		writel(val, CPU_AXI_QOS_PRIORITY + VIO1_ISP_R_QOS);
-		writel(val, CPU_AXI_QOS_PRIORITY + VIO1_ISP_W0_QOS);
-		writel(val, CPU_AXI_QOS_PRIORITY + VIO1_ISP_W1_QOS);
-	}
-	return 0;
-}
-
-static void rk3288_detect_reset_reason(void)
-{
-	struct rk3288_cru *cru = rockchip_get_cru();
-	const char *reason;
-
-	if (IS_ERR(cru))
-		return;
-
-	switch (cru->cru_glb_rst_st) {
-	case GLB_POR_RST:
-		reason = "POR";
-		break;
-	case FST_GLB_RST_ST:
-	case SND_GLB_RST_ST:
-		reason = "RST";
-		break;
-	case FST_GLB_TSADC_RST_ST:
-	case SND_GLB_TSADC_RST_ST:
-		reason = "THERMAL";
-		break;
-	case FST_GLB_WDT_RST_ST:
-	case SND_GLB_WDT_RST_ST:
-		reason = "WDOG";
-		break;
-	default:
-		reason = "unknown reset";
-	}
-
-	env_set("reset_reason", reason);
-
-	/*
-	 * Clear cru_glb_rst_st, so we can determine the last reset cause
-	 * for following resets.
-	 */
-	rk_clrreg(&cru->cru_glb_rst_st, GLB_RST_ST_MASK);
-}
-
-int board_late_init(void)
-{
-	setup_boot_mode();
-	rk3288_qos_init();
-	rk3288_detect_reset_reason();
-
-	return rk_board_late_init();
-}
-
-#if !CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
-static int veyron_init(void)
-{
-	struct udevice *dev;
-	struct clk clk;
-	int ret;
-
-	ret = regulator_get_by_platname("vdd_arm", &dev);
-	if (ret) {
-		debug("Cannot set regulator name\n");
-		return ret;
-	}
-
-	/* Slowly raise to max CPU voltage to prevent overshoot */
-	ret = regulator_set_value(dev, 1200000);
-	if (ret)
-		return ret;
-	udelay(175); /* Must wait for voltage to stabilize, 2mV/us */
-	ret = regulator_set_value(dev, 1400000);
-	if (ret)
-		return ret;
-	udelay(100); /* Must wait for voltage to stabilize, 2mV/us */
-
-	ret = rockchip_get_clk(&clk.dev);
-	if (ret)
-		return ret;
-	clk.id = PLL_APLL;
-	ret = clk_set_rate(&clk, 1800000000);
-	if (IS_ERR_VALUE(ret))
-		return ret;
-
-	return 0;
-}
-#endif
-
-int board_init(void)
-{
-#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
-	struct udevice *pinctrl;
-	int ret;
-
-	rockchip_timer_init();
-
-	/*
-	 * We need to implement sdcard iomux here for the further
-	 * initlization, otherwise, it'll hit sdcard command sending
-	 * timeout exception.
-	 */
-	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
-	if (ret) {
-		debug("%s: Cannot find pinctrl device\n", __func__);
-		goto err;
-	}
-	ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_SDCARD);
-	if (ret) {
-		debug("%s: Failed to set up SD card\n", __func__);
-		goto err;
-	}
-
-	return 0;
-err:
-	printf("board_init: Error %d\n", ret);
-
-	/* No way to report error here */
-	hang();
-
-	return -1;
-#else
-	int ret;
-
-	/* We do some SoC one time setting here */
-	if (!fdt_node_check_compatible(gd->fdt_blob, 0, "google,veyron")) {
-		ret = veyron_init();
-		if (ret)
-			return ret;
-	}
-
-	return 0;
-#endif
-}
-
-#ifndef CONFIG_SYS_DCACHE_OFF
-void enable_caches(void)
-{
-	/* Enable D-cache. I-cache is already enabled in start.S */
-	dcache_enable();
-}
-#endif
-
-#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
-#include <usb.h>
-#include <usb/dwc2_udc.h>
-
-static struct dwc2_plat_otg_data rk3288_otg_data = {
-	.rx_fifo_sz	= 512,
-	.np_tx_fifo_sz	= 16,
-	.tx_fifo_sz	= 128,
-};
-
-int board_usb_init(int index, enum usb_init_type init)
-{
-	int node, phy_node;
-	const char *mode;
-	bool matched = false;
-	const void *blob = gd->fdt_blob;
-	u32 grf_phy_offset;
-
-	/* find the usb_otg node */
-	node = fdt_node_offset_by_compatible(blob, -1,
-					"rockchip,rk3288-usb");
-
-	while (node > 0) {
-		mode = fdt_getprop(blob, node, "dr_mode", NULL);
-		if (mode && strcmp(mode, "otg") == 0) {
-			matched = true;
-			break;
-		}
-
-		node = fdt_node_offset_by_compatible(blob, node,
-					"rockchip,rk3288-usb");
-	}
-	if (!matched) {
-		debug("Not found usb_otg device\n");
-		return -ENODEV;
-	}
-	rk3288_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
-
-	node = fdtdec_lookup_phandle(blob, node, "phys");
-	if (node <= 0) {
-		debug("Not found usb phy device\n");
-		return -ENODEV;
-	}
-
-	phy_node = fdt_parent_offset(blob, node);
-	if (phy_node <= 0) {
-		debug("Not found usb phy device\n");
-		return -ENODEV;
-	}
-
-	rk3288_otg_data.phy_of_node = phy_node;
-	grf_phy_offset = fdtdec_get_addr(blob, node, "reg");
-
-	/* find the grf node */
-	node = fdt_node_offset_by_compatible(blob, -1,
-					"rockchip,rk3288-grf");
-	if (node <= 0) {
-		debug("Not found grf device\n");
-		return -ENODEV;
-	}
-	rk3288_otg_data.regs_phy = grf_phy_offset +
-				fdtdec_get_addr(blob, node, "reg");
-
-	return dwc2_udc_probe(&rk3288_otg_data);
-}
-
-int board_usb_cleanup(int index, enum usb_init_type init)
-{
-	return 0;
-}
-#endif
-
-static int do_clock(cmd_tbl_t *cmdtp, int flag, int argc,
-		       char * const argv[])
-{
-	static const struct {
-		char *name;
-		int id;
-	} clks[] = {
-		{ "osc", CLK_OSC },
-		{ "apll", CLK_ARM },
-		{ "dpll", CLK_DDR },
-		{ "cpll", CLK_CODEC },
-		{ "gpll", CLK_GENERAL },
-#ifdef CONFIG_ROCKCHIP_RK3036
-		{ "mpll", CLK_NEW },
-#else
-		{ "npll", CLK_NEW },
-#endif
-	};
-	int ret, i;
-	struct udevice *dev;
-
-	ret = rockchip_get_clk(&dev);
-	if (ret) {
-		printf("clk-uclass not found\n");
-		return 0;
-	}
-
-	for (i = 0; i < ARRAY_SIZE(clks); i++) {
-		struct clk clk;
-		ulong rate;
-
-		clk.id = clks[i].id;
-		ret = clk_request(dev, &clk);
-		if (ret < 0)
-			continue;
-
-		rate = clk_get_rate(&clk);
-		printf("%s: %lu\n", clks[i].name, rate);
-
-		clk_free(&clk);
-	}
-
-	return 0;
-}
-
-U_BOOT_CMD(
-	clock, 2, 1, do_clock,
-	"display information about clocks",
-	""
-);
-
-#define GRF_SOC_CON2 0xff77024c
-
-int board_early_init_f(void)
-{
-	struct udevice *pinctrl;
-	struct udevice *dev;
-	int ret;
-
-	/*
-	 * This init is done in SPL, but when chain-loading U-Boot SPL will
-	 * have been skipped. Allow the clock driver to check if it needs
-	 * setting up.
-	 */
-	ret = rockchip_get_clk(&dev);
-	if (ret) {
-		debug("CLK init failed: %d\n", ret);
-		return ret;
-	}
-	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
-	if (ret) {
-		debug("%s: Cannot find pinctrl device\n", __func__);
-		return ret;
-	}
-
-	/* Enable debug UART */
-	ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART_DBG);
-	if (ret) {
-		debug("%s: Failed to set up console UART\n", __func__);
-		return ret;
-	}
-	rk_setreg(GRF_SOC_CON2, 1 << 0);
-
-	return 0;
-}
diff --git a/arch/arm/mach-rockchip/rk3288/rk3288.c b/arch/arm/mach-rockchip/rk3288/rk3288.c
index bf4b799eba..2a8bb49d83 100644
--- a/arch/arm/mach-rockchip/rk3288/rk3288.c
+++ b/arch/arm/mach-rockchip/rk3288/rk3288.c
@@ -3,12 +3,26 @@
  *
  * SPDX-License-Identifier:     GPL-2.0+
  */
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
 #include <asm/armv7.h>
 #include <asm/io.h>
+#include <asm/arch/bootrom.h>
+#include <asm/arch/clock.h>
 #include <asm/arch/hardware.h>
+#include <asm/arch/periph.h>
+#include <asm/arch/cru_rk3288.h>
+#include <asm/arch/grf_rk3288.h>
+#include <asm/arch/pmu_rk3288.h>
+#include <asm/arch/qos_rk3288.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/gpio.h>
+#include <dm/pinctrl.h>
+#include <dt-bindings/clock/rk3288-cru.h>
+#include <power/regulator.h>
 
-#define GRF_SOC_CON2 0xff77024c
-#define GRF_SOC_CON7 0xff770260
+#define GRF_BASE	0xff770000
 
 #define VIO0_VOP_QOS_BASE	0xffad0408
 #define VIO1_VOP_QOS_BASE	0xffad0008
@@ -21,6 +35,11 @@
 #define CPU_AXI_QOS_PRIORITY_LEVEL(h, l) \
 	((((h) & 3) << 8) | (((h) & 3) << 2) | ((l) & 3))
 
+const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
+	[BROM_BOOTSOURCE_EMMC] = "/dwmmc@ff0f0000",
+	[BROM_BOOTSOURCE_SD] = "/dwmmc@ff0c0000",
+};
+
 #ifdef CONFIG_SPL_BUILD
 static void configure_l2ctlr(void)
 {
@@ -48,11 +67,13 @@ int arch_cpu_init(void)
 #ifdef CONFIG_SPL_BUILD
 	configure_l2ctlr();
 #else
+	struct rk3288_grf * const grf = (void *)GRF_BASE;
+
 	/* Use rkpwm by default */
-	rk_setreg(GRF_SOC_CON2, 1 << 0);
+	rk_setreg(&grf->soc_con2, 1 << 0);
 
 	/* Disable LVDS phy */
-	rk_setreg(GRF_SOC_CON7, 1 << 15);
+	rk_setreg(&grf->soc_con7, 1 << 15);
 
 	/* Select EDP clock source 24M */
 	rk_setreg(CRU_CLKSEL_CON28, 1 << 15);
@@ -68,3 +89,286 @@ int arch_cpu_init(void)
 
 	return 0;
 }
+
+void board_debug_uart_init(void)
+{
+	struct rk3288_grf * const grf = (void *)GRF_BASE;
+
+	rk_clrsetreg(&grf->gpio7ch_iomux, GPIO7C7_MASK << GPIO7C7_SHIFT |
+		     GPIO7C6_MASK << GPIO7C6_SHIFT,
+		     GPIO7C7_UART2DBG_SOUT << GPIO7C7_SHIFT |
+		     GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT);
+}
+
+#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
+#ifdef CONFIG_SPL_MMC_SUPPORT
+static int configure_emmc(void)
+{
+#if defined(CONFIG_TARGET_CHROMEBOOK_JERRY)
+
+	struct gpio_desc desc;
+	int ret;
+	struct udevice *pinctrl;
+
+	pinctrl_request_noflags(pinctrl, PERIPH_ID_EMMC);
+
+	/*
+	 * TODO(sjg@chromium.org): Pick this up from device tree or perhaps
+	 * use the EMMC_PWREN setting.
+	 */
+	ret = dm_gpio_lookup_name("D9", &desc);
+	if (ret) {
+		debug("gpio ret=%d\n", ret);
+		return ret;
+	}
+	ret = dm_gpio_request(&desc, "emmc_pwren");
+	if (ret) {
+		debug("gpio_request ret=%d\n", ret);
+		return ret;
+	}
+	ret = dm_gpio_set_dir_flags(&desc, GPIOD_IS_OUT);
+	if (ret) {
+		debug("gpio dir ret=%d\n", ret);
+		return ret;
+	}
+	ret = dm_gpio_set_value(&desc, 1);
+	if (ret) {
+		debug("gpio value ret=%d\n", ret);
+		return ret;
+	}
+#endif
+	return 0;
+}
+
+int rk_spl_board_init(void)
+{
+	struct udevice *pinctrl;
+	int ret = 0;
+
+	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
+	if (ret) {
+		debug("%s: Cannot find pinctrl device\n", __func__);
+		goto err;
+	}
+	/* TODO: we may need to check boot device first */
+#ifdef CONFIG_SPL_MMC_SUPPORT
+	ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_SDCARD);
+	if (ret) {
+		debug("%s: Failed to set up SD card\n", __func__);
+		goto err;
+	}
+#endif
+
+	ret = configure_emmc();
+	if (ret) {
+		debug("%s: Failed to set up eMMC\n", __func__);
+	}
+
+err:
+	return ret;
+}
+#endif
+#endif
+
+int rk3288_qos_init(void)
+{
+	int val = 2 << PRIORITY_HIGH_SHIFT | 2 << PRIORITY_LOW_SHIFT;
+	/* set vop qos to higher priority */
+	writel(val, CPU_AXI_QOS_PRIORITY + VIO0_VOP_QOS);
+	writel(val, CPU_AXI_QOS_PRIORITY + VIO1_VOP_QOS);
+
+	if (!fdt_node_check_compatible(gd->fdt_blob, 0,
+				       "rockchip,rk3288-tinker"))
+	{
+		/* set isp qos to higher priority */
+		writel(val, CPU_AXI_QOS_PRIORITY + VIO1_ISP_R_QOS);
+		writel(val, CPU_AXI_QOS_PRIORITY + VIO1_ISP_W0_QOS);
+		writel(val, CPU_AXI_QOS_PRIORITY + VIO1_ISP_W1_QOS);
+	}
+	return 0;
+}
+
+static void rk3288_detect_reset_reason(void)
+{
+	struct rk3288_cru *cru = rockchip_get_cru();
+	const char *reason;
+
+	if (IS_ERR(cru))
+		return;
+
+	switch (cru->cru_glb_rst_st) {
+	case GLB_POR_RST:
+		reason = "POR";
+		break;
+	case FST_GLB_RST_ST:
+	case SND_GLB_RST_ST:
+		reason = "RST";
+		break;
+	case FST_GLB_TSADC_RST_ST:
+	case SND_GLB_TSADC_RST_ST:
+		reason = "THERMAL";
+		break;
+	case FST_GLB_WDT_RST_ST:
+	case SND_GLB_WDT_RST_ST:
+		reason = "WDOG";
+		break;
+	default:
+		reason = "unknown reset";
+	}
+
+	env_set("reset_reason", reason);
+
+	/*
+	 * Clear cru_glb_rst_st, so we can determine the last reset cause
+	 * for following resets.
+	 */
+	rk_clrreg(&cru->cru_glb_rst_st, GLB_RST_ST_MASK);
+}
+
+__weak int rk3288_board_late_init(void)
+{
+	return 0;
+}
+
+int rk_board_late_init(void)
+{
+	rk3288_qos_init();
+	rk3288_detect_reset_reason();
+
+	return rk3288_board_late_init();
+}
+
+#if !CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
+static int veyron_init(void)
+{
+	struct udevice *dev;
+	struct clk clk;
+	int ret;
+
+	ret = regulator_get_by_platname("vdd_arm", &dev);
+	if (ret) {
+		debug("Cannot set regulator name\n");
+		return ret;
+	}
+
+	/* Slowly raise to max CPU voltage to prevent overshoot */
+	ret = regulator_set_value(dev, 1200000);
+	if (ret)
+		return ret;
+	udelay(175); /* Must wait for voltage to stabilize, 2mV/us */
+	ret = regulator_set_value(dev, 1400000);
+	if (ret)
+		return ret;
+	udelay(100); /* Must wait for voltage to stabilize, 2mV/us */
+
+	ret = rockchip_get_clk(&clk.dev);
+	if (ret)
+		return ret;
+	clk.id = PLL_APLL;
+	ret = clk_set_rate(&clk, 1800000000);
+	if (IS_ERR_VALUE(ret))
+		return ret;
+
+	return 0;
+}
+
+int rk_board_init(void)
+{
+	int ret;
+
+	/* We do some SoC one time setting here */
+	if (!fdt_node_check_compatible(gd->fdt_blob, 0, "google,veyron")) {
+		ret = veyron_init();
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+#endif
+
+static int do_clock(cmd_tbl_t *cmdtp, int flag, int argc,
+		       char * const argv[])
+{
+	static const struct {
+		char *name;
+		int id;
+	} clks[] = {
+		{ "osc", CLK_OSC },
+		{ "apll", CLK_ARM },
+		{ "dpll", CLK_DDR },
+		{ "cpll", CLK_CODEC },
+		{ "gpll", CLK_GENERAL },
+#ifdef CONFIG_ROCKCHIP_RK3036
+		{ "mpll", CLK_NEW },
+#else
+		{ "npll", CLK_NEW },
+#endif
+	};
+	int ret, i;
+	struct udevice *dev;
+
+	ret = rockchip_get_clk(&dev);
+	if (ret) {
+		printf("clk-uclass not found\n");
+		return 0;
+	}
+
+	for (i = 0; i < ARRAY_SIZE(clks); i++) {
+		struct clk clk;
+		ulong rate;
+
+		clk.id = clks[i].id;
+		ret = clk_request(dev, &clk);
+		if (ret < 0)
+			continue;
+
+		rate = clk_get_rate(&clk);
+		printf("%s: %lu\n", clks[i].name, rate);
+
+		clk_free(&clk);
+	}
+
+	return 0;
+}
+
+U_BOOT_CMD(
+	clock, 2, 1, do_clock,
+	"display information about clocks",
+	""
+);
+
+#define GRF_SOC_CON2 0xff77024c
+
+int board_early_init_f(void)
+{
+	struct udevice *pinctrl;
+	struct udevice *dev;
+	int ret;
+
+	/*
+	 * This init is done in SPL, but when chain-loading U-Boot SPL will
+	 * have been skipped. Allow the clock driver to check if it needs
+	 * setting up.
+	 */
+	ret = rockchip_get_clk(&dev);
+	if (ret) {
+		debug("CLK init failed: %d\n", ret);
+		return ret;
+	}
+	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
+	if (ret) {
+		debug("%s: Cannot find pinctrl device\n", __func__);
+		return ret;
+	}
+
+	/* Enable debug UART */
+	ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART_DBG);
+	if (ret) {
+		debug("%s: Failed to set up console UART\n", __func__);
+		return ret;
+	}
+	rk_setreg(GRF_SOC_CON2, 1 << 0);
+
+	return 0;
+}
diff --git a/board/chipspark/popmetal_rk3288/popmetal-rk3288.c b/board/chipspark/popmetal_rk3288/popmetal-rk3288.c
index ed82b2bd78..9945f97a08 100644
--- a/board/chipspark/popmetal_rk3288/popmetal-rk3288.c
+++ b/board/chipspark/popmetal_rk3288/popmetal-rk3288.c
@@ -8,16 +8,9 @@
 #include <spl.h>
 #include <asm/gpio.h>
 
-void board_boot_order(u32 *spl_boot_list)
-{
-	/* eMMC prior to sdcard */
-	spl_boot_list[0] = BOOT_DEVICE_MMC2;
-	spl_boot_list[1] = BOOT_DEVICE_MMC1;
-}
-
 #define GPIO7A3_HUB_RST	227
 
-int rk_board_late_init(void)
+int rk3288_board_late_init(void)
 {
 	int ret;
 
diff --git a/board/mqmaker/miqi_rk3288/miqi-rk3288.c b/board/mqmaker/miqi_rk3288/miqi-rk3288.c
index a82f0ae283..846deddb80 100644
--- a/board/mqmaker/miqi_rk3288/miqi-rk3288.c
+++ b/board/mqmaker/miqi_rk3288/miqi-rk3288.c
@@ -6,10 +6,3 @@
 
 #include <common.h>
 #include <spl.h>
-
-void board_boot_order(u32 *spl_boot_list)
-{
-	/* eMMC prior to sdcard. */
-	spl_boot_list[0] = BOOT_DEVICE_MMC2;
-	spl_boot_list[1] = BOOT_DEVICE_MMC1;
-}
diff --git a/board/phytec/phycore_rk3288/phycore-rk3288.c b/board/phytec/phycore_rk3288/phycore-rk3288.c
index 47b069e2ad..a81954e780 100644
--- a/board/phytec/phycore_rk3288/phycore-rk3288.c
+++ b/board/phytec/phycore_rk3288/phycore-rk3288.c
@@ -27,7 +27,49 @@ static int valid_rk3288_som(struct rk3288_som *som)
 	return hw == som->bs;
 }
 
-int rk_board_late_init(void)
+#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_OF_PLATDATA)
+static int phycore_init(void)
+{
+	struct udevice *pmic;
+	int ret;
+
+	ret = uclass_first_device_err(UCLASS_PMIC, &pmic);
+	if (ret)
+		return ret;
+
+#if defined(CONFIG_SPL_POWER_SUPPORT)
+	/* Increase USB input current to 2A */
+	ret = rk818_spl_configure_usb_input_current(pmic, 2000);
+	if (ret)
+		return ret;
+
+	/* Close charger when USB lower then 3.26V */
+	ret = rk818_spl_configure_usb_chrg_shutdown(pmic, 3260000);
+	if (ret)
+		return ret;
+#endif
+
+	return 0;
+}
+
+int rk_board_init_f(void)
+{
+	int ret = 0;
+
+	if (of_machine_is_compatible("phytec,rk3288-phycore-som")) {
+		ret = phycore_init();
+		if (ret) {
+			debug("Failed to set up phycore power settings: %d\n",
+			      ret);
+			return ret;
+		}
+	}
+
+	return 0;
+}
+#endif
+
+int rk3288_board_late_init(void)
 {
 	int ret;
 	struct udevice *dev;
diff --git a/board/rockchip/evb_rk3288/evb-rk3288.c b/board/rockchip/evb_rk3288/evb-rk3288.c
index a82f0ae283..846deddb80 100644
--- a/board/rockchip/evb_rk3288/evb-rk3288.c
+++ b/board/rockchip/evb_rk3288/evb-rk3288.c
@@ -6,10 +6,3 @@
 
 #include <common.h>
 #include <spl.h>
-
-void board_boot_order(u32 *spl_boot_list)
-{
-	/* eMMC prior to sdcard. */
-	spl_boot_list[0] = BOOT_DEVICE_MMC2;
-	spl_boot_list[1] = BOOT_DEVICE_MMC1;
-}
diff --git a/board/rockchip/evb_rk3288_rk1608/evb-rk3288-rk1608.c b/board/rockchip/evb_rk3288_rk1608/evb-rk3288-rk1608.c
index db332b4872..88b63276fb 100644
--- a/board/rockchip/evb_rk3288_rk1608/evb-rk3288-rk1608.c
+++ b/board/rockchip/evb_rk3288_rk1608/evb-rk3288-rk1608.c
@@ -6,10 +6,3 @@
 
 #include <common.h>
 #include <spl.h>
-
-void board_boot_order(u32 *spl_boot_list)
-{
-	/* eMMC prior to sdcard. */
-	spl_boot_list[0] = BOOT_DEVICE_MMC2;
-	spl_boot_list[1] = BOOT_DEVICE_MMC1;
-}
diff --git a/board/rockchip/fennec_rk3288/fennec-rk3288.c b/board/rockchip/fennec_rk3288/fennec-rk3288.c
index aad74ef109..846deddb80 100644
--- a/board/rockchip/fennec_rk3288/fennec-rk3288.c
+++ b/board/rockchip/fennec_rk3288/fennec-rk3288.c
@@ -6,10 +6,3 @@
 
 #include <common.h>
 #include <spl.h>
-
-void board_boot_order(u32 *spl_boot_list)
-{
-	/* eMMC prior to sdcard */
-	spl_boot_list[0] = BOOT_DEVICE_MMC2;
-	spl_boot_list[1] = BOOT_DEVICE_MMC1;
-}
diff --git a/board/rockchip/tinker_rk3288/tinker-rk3288.c b/board/rockchip/tinker_rk3288/tinker-rk3288.c
index 790a921515..5681ef1cbb 100644
--- a/board/rockchip/tinker_rk3288/tinker-rk3288.c
+++ b/board/rockchip/tinker_rk3288/tinker-rk3288.c
@@ -21,7 +21,7 @@ static int get_ethaddr_from_eeprom(u8 *addr)
 	return i2c_eeprom_read(dev, 0, addr, 6);
 }
 
-int rk_board_late_init(void)
+int rk3288_board_late_init(void)
 {
 	u8 ethaddr[6];
 

commit bf9b2c649ae55cac118abe69302b4aad80e1a53c
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 22 14:25:11 2018 +0800

    rockchip: rk3288: remove rockchip timer for sys timer
    
    Use ARM arch timer instead
    
    Change-Id: Id14b484aa49ee98f741463adc510403f244fd187
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index 4b90a56e28..5e9b314f16 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -15,10 +15,6 @@
 #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 
-#define CONFIG_SYS_TIMER_RATE		(24 * 1000 * 1000)
-#define	CONFIG_SYS_TIMER_BASE		0xff810020 /* TIMER7 */
-#define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMER_BASE + 8)
-
 #define CONFIG_SPL_FRAMEWORK
 #ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM
 /* Bootrom will load u-boot binary to 0x0 once return from SPL */

commit 17ee18bfa33b124778a3177a0b55069ebb80c1c7
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Jan 20 22:21:24 2018 +0800

    rockchip: rk3128: use common board file
    
    move SoC spec setting into rk3128.c
    
    Change-Id: Id3bb2680d7087140510a4b1a8d87e4322e109ca5

diff --git a/arch/arm/mach-rockchip/rk3128-board.c b/arch/arm/mach-rockchip/rk3128-board.c
deleted file mode 100644
index 8217fd52c8..0000000000
--- a/arch/arm/mach-rockchip/rk3128-board.c
+++ /dev/null
@@ -1,153 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-#include <common.h>
-#include <clk.h>
-#include <dm.h>
-#include <ram.h>
-#include <syscon.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/periph.h>
-#include <asm/arch/grf_rk3128.h>
-#include <asm/arch/boot_mode.h>
-#include <power/charge_display.h>
-#include <power/regulator.h>
-#include <video_rockchip.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#ifdef CONFIG_DM_CHARGE_DISPLAY
-static int charge_display(void)
-{
-	int ret;
-	struct udevice *dev;
-
-	ret = uclass_get_device(UCLASS_CHARGE_DISPLAY, 0, &dev);
-	if (ret) {
-		if (ret != -ENODEV) {
-			printf("Get UCLASS CHARGE DISPLAY failed: %d\n", ret);
-			return ret;
-		}
-		return 0;
-	}
-
-	return charge_display_show(dev);
-}
-#endif
-
-__weak int rk_board_late_init(void)
-{
-	return 0;
-}
-
-int board_late_init(void)
-{
-	setup_boot_mode();
-
-#ifdef CONFIG_DM_CHARGE_DISPLAY
-	charge_display();
-#endif
-
-#ifdef CONFIG_DRM_ROCKCHIP
-	rockchip_show_logo();
-#endif
-
-	return rk_board_late_init();
-}
-
-int board_init(void)
-{
-	int ret = 0;
-
-	ret = regulators_enable_boot_on(false);
-	if (ret) {
-		debug("%s: Cannot enable boot on regulator\n", __func__);
-		return ret;
-	}
-
-	return 0;
-}
-
-int dram_init_banksize(void)
-{
-	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
-	gd->bd->bi_dram[0].size = 0x8400000;
-	/* Reserve 0xe00000(14MB) for OPTEE with TA enabled, otherwise 2MB */
-	gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE
-				+ gd->bd->bi_dram[0].size + 0xe00000;
-	gd->bd->bi_dram[1].size = gd->bd->bi_dram[0].start
-				+ gd->ram_size - gd->bd->bi_dram[1].start;
-
-	return 0;
-}
-
-#ifndef CONFIG_SYS_DCACHE_OFF
-void enable_caches(void)
-{
-	/* Enable D-cache. I-cache is already enabled in start.S */
-	dcache_enable();
-}
-#endif
-
-#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
-#include <usb.h>
-#include <usb/dwc2_udc.h>
-
-static struct dwc2_plat_otg_data rk3128_otg_data = {
-	.rx_fifo_sz	= 512,
-	.np_tx_fifo_sz	= 16,
-	.tx_fifo_sz	= 128,
-};
-
-int board_usb_init(int index, enum usb_init_type init)
-{
-	int node;
-	const char *mode;
-	bool matched = false;
-	const void *blob = gd->fdt_blob;
-
-	/* find the usb_otg node */
-	node = fdt_node_offset_by_compatible(blob, -1,
-					"rockchip,rk3128-usb");
-
-	while (node > 0) {
-		mode = fdt_getprop(blob, node, "dr_mode", NULL);
-		if (mode && strcmp(mode, "otg") == 0) {
-			matched = true;
-			break;
-		}
-
-		node = fdt_node_offset_by_compatible(blob, node,
-					"rockchip,rk3288-usb");
-	}
-	if (!matched) {
-		debug("Not found usb_otg device\n");
-		return -ENODEV;
-	}
-	rk3128_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
-
-	return dwc2_udc_probe(&rk3128_otg_data);
-}
-
-int board_usb_cleanup(int index, enum usb_init_type init)
-{
-	return 0;
-}
-#endif
-
-#if defined(CONFIG_USB_FUNCTION_FASTBOOT)
-int fb_set_reboot_flag(void)
-{
-	struct rk3128_grf *grf;
-
-	printf("Setting reboot to fastboot flag ...\n");
-	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	/* Set boot mode to fastboot */
-	writel(BOOT_FASTBOOT, &grf->os_reg[0]);
-
-	return 0;
-}
-#endif
diff --git a/arch/arm/mach-rockchip/rk3128/rk3128.c b/arch/arm/mach-rockchip/rk3128/rk3128.c
index 24c1ee8bf9..ef0ed3bcd4 100644
--- a/arch/arm/mach-rockchip/rk3128/rk3128.c
+++ b/arch/arm/mach-rockchip/rk3128/rk3128.c
@@ -5,7 +5,6 @@
  */
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
-#include <asm/arch/timer.h>
 
 #define GRF_GPIO1C_IOMUX		0x200080c0
 #define SDMMC_INTMASK			0x10214024
@@ -35,7 +34,6 @@ int arch_cpu_init(void)
 	 */
 	writel(0, SDMMC_INTMASK);
 #endif
-	rockchip_timer_init();
 
 	return 0;
 }

commit 0f04a90396384b3a90fdd97651a8c76601fe4418
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Jan 20 22:20:22 2018 +0800

    rockchip: rk3128: remove rockchip timer as systimer
    
    We use ARM arch timer instead.
    
    Change-Id: I4368b30eab5ae61c9dd7a9165859504607fbbfe3
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h
index f4798859c4..0358d95eba 100644
--- a/include/configs/rk3128_common.h
+++ b/include/configs/rk3128_common.h
@@ -15,10 +15,6 @@
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
-#define CONFIG_SYS_TIMER_RATE		(24 * 1000 * 1000)
-#define CONFIG_SYS_TIMER_BASE		0x200440a0 /* TIMER5 */
-#define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMER_BASE + 8)
-
 #define CONFIG_SYS_TEXT_BASE		0x60000000
 #define CONFIG_SYS_INIT_SP_ADDR		0x60100000
 #define CONFIG_SYS_LOAD_ADDR		0x60800800

commit 085507de5a04b1795b21e9363757d00bc5f2c881
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Jan 20 22:19:30 2018 +0800

    rockchip: rk3188: use common board file
    
    Move SoC spec setting into rk3188.c
    
    Change-Id: I689126cbf6fe2e5699c8776ea42a7acc6ac0f3fc
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3188-board-spl.c b/arch/arm/mach-rockchip/rk3188-board-spl.c
deleted file mode 100644
index 8e3b8ae3ba..0000000000
--- a/arch/arm/mach-rockchip/rk3188-board-spl.c
+++ /dev/null
@@ -1,231 +0,0 @@
-/*
- * (C) Copyright 2015 Google, Inc
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <clk.h>
-#include <common.h>
-#include <debug_uart.h>
-#include <dm.h>
-#include <fdtdec.h>
-#include <led.h>
-#include <malloc.h>
-#include <ram.h>
-#include <spl.h>
-#include <asm/gpio.h>
-#include <asm/io.h>
-#include <asm/arch/bootrom.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/periph.h>
-#include <asm/arch/pmu_rk3188.h>
-#include <asm/arch/sdram.h>
-#include <asm/arch/timer.h>
-#include <dm/pinctrl.h>
-#include <dm/root.h>
-#include <dm/test.h>
-#include <dm/util.h>
-#include <power/regulator.h>
-#include <syscon.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-u32 spl_boot_device(void)
-{
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
-	const void *blob = gd->fdt_blob;
-	struct udevice *dev;
-	const char *bootdev;
-	int node;
-	int ret;
-
-	bootdev = fdtdec_get_config_string(blob, "u-boot,boot0");
-	debug("Boot device %s\n", bootdev);
-	if (!bootdev)
-		goto fallback;
-
-	node = fdt_path_offset(blob, bootdev);
-	if (node < 0) {
-		debug("node=%d\n", node);
-		goto fallback;
-	}
-	ret = device_get_global_by_of_offset(node, &dev);
-	if (ret) {
-		debug("device at node %s/%d not found: %d\n", bootdev, node,
-		      ret);
-		goto fallback;
-	}
-	debug("Found device %s\n", dev->name);
-	switch (device_get_uclass_id(dev)) {
-	case UCLASS_SPI_FLASH:
-		return BOOT_DEVICE_SPI;
-	case UCLASS_MMC:
-		return BOOT_DEVICE_MMC1;
-	default:
-		debug("Booting from device uclass '%s' not supported\n",
-		      dev_get_uclass_name(dev));
-	}
-
-fallback:
-#endif
-	return BOOT_DEVICE_MMC1;
-}
-
-u32 spl_boot_mode(const u32 boot_device)
-{
-	return MMCSD_MODE_RAW;
-}
-
-static int setup_arm_clock(void)
-{
-	struct udevice *dev;
-	struct clk clk;
-	int ret;
-
-	ret = rockchip_get_clk(&dev);
-	if (ret)
-		return ret;
-
-	clk.id = CLK_ARM;
-	ret = clk_request(dev, &clk);
-	if (ret < 0)
-		return ret;
-
-	ret = clk_set_rate(&clk, 600000000);
-
-	clk_free(&clk);
-	return ret;
-}
-
-void board_init_f(ulong dummy)
-{
-	struct udevice *pinctrl, *dev;
-	int ret;
-
-	/* Example code showing how to enable the debug UART on RK3188 */
-#ifdef EARLY_UART
-#include <asm/arch/grf_rk3188.h>
-	/* Enable early UART on the RK3188 */
-#define GRF_BASE	0x20008000
-	struct rk3188_grf * const grf = (void *)GRF_BASE;
-
-	rk_clrsetreg(&grf->gpio1b_iomux,
-		     GPIO1B1_MASK << GPIO1B1_SHIFT |
-		     GPIO1B0_MASK << GPIO1B0_SHIFT,
-		     GPIO1B1_UART2_SOUT << GPIO1B1_SHIFT |
-		     GPIO1B0_UART2_SIN << GPIO1B0_SHIFT);
-	/*
-	 * Debug UART can be used from here if required:
-	 *
-	 * debug_uart_init();
-	 * printch('a');
-	 * printhex8(0x1234);
-	 * printascii("string");
-	 */
-	debug_uart_init();
-	printch('s');
-	printch('p');
-	printch('l');
-	printch('\n');
-#endif
-
-	ret = spl_early_init();
-	if (ret) {
-		debug("spl_early_init() failed: %d\n", ret);
-		hang();
-	}
-
-	rockchip_timer_init();
-
-	ret = rockchip_get_clk(&dev);
-	if (ret) {
-		debug("CLK init failed: %d\n", ret);
-		return;
-	}
-
-	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
-	if (ret) {
-		debug("Pinctrl init failed: %d\n", ret);
-		return;
-	}
-
-	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
-	if (ret) {
-		debug("DRAM init failed: %d\n", ret);
-		return;
-	}
-
-	setup_arm_clock();
-#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
-	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
-#endif
-}
-
-static int setup_led(void)
-{
-#ifdef CONFIG_SPL_LED
-	struct udevice *dev;
-	char *led_name;
-	int ret;
-
-	led_name = fdtdec_get_config_string(gd->fdt_blob, "u-boot,boot-led");
-	if (!led_name)
-		return 0;
-	ret = led_get_by_label(led_name, &dev);
-	if (ret) {
-		debug("%s: get=%d\n", __func__, ret);
-		return ret;
-	}
-	ret = led_set_on(dev, 1);
-	if (ret)
-		return ret;
-#endif
-
-	return 0;
-}
-
-void spl_board_init(void)
-{
-	struct udevice *pinctrl;
-	int ret;
-
-	ret = setup_led();
-	if (ret) {
-		debug("LED ret=%d\n", ret);
-		hang();
-	}
-
-	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
-	if (ret) {
-		debug("%s: Cannot find pinctrl device\n", __func__);
-		goto err;
-	}
-
-#ifdef CONFIG_SPL_MMC_SUPPORT
-	ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_SDCARD);
-	if (ret) {
-		debug("%s: Failed to set up SD card\n", __func__);
-		goto err;
-	}
-#endif
-
-	/* Enable debug UART */
-	ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART_DBG);
-	if (ret) {
-		debug("%s: Failed to set up console UART\n", __func__);
-		goto err;
-	}
-
-	preloader_console_init();
-#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
-	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
-#endif
-	return;
-
-err:
-	printf("spl_board_init: Error %d\n", ret);
-
-	/* No way to report error here */
-	hang();
-}
diff --git a/arch/arm/mach-rockchip/rk3188-board.c b/arch/arm/mach-rockchip/rk3188-board.c
deleted file mode 100644
index 88c03e85d2..0000000000
--- a/arch/arm/mach-rockchip/rk3188-board.c
+++ /dev/null
@@ -1,83 +0,0 @@
-/*
- * (C) Copyright 2015 Google, Inc
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <clk.h>
-#include <dm.h>
-#include <ram.h>
-#include <syscon.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/grf_rk3188.h>
-#include <asm/arch/periph.h>
-#include <asm/arch/pmu_rk3288.h>
-#include <asm/arch/boot_mode.h>
-#include <asm/gpio.h>
-#include <dm/pinctrl.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int board_late_init(void)
-{
-	struct rk3188_grf *grf;
-
-	setup_boot_mode();
-
-	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	if (IS_ERR(grf)) {
-		pr_err("grf syscon returned %ld\n", PTR_ERR(grf));
-	} else {
-		/* enable noc remap to mimic legacy loaders */
-		rk_clrsetreg(&grf->soc_con0,
-			NOC_REMAP_MASK << NOC_REMAP_SHIFT,
-			NOC_REMAP_MASK << NOC_REMAP_SHIFT);
-	}
-
-	return 0;
-}
-
-int board_init(void)
-{
-#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
-	struct udevice *pinctrl;
-	int ret;
-
-	/*
-	 * We need to implement sdcard iomux here for the further
-	 * initialization, otherwise, it'll hit sdcard command sending
-	 * timeout exception.
-	 */
-	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
-	if (ret) {
-		debug("%s: Cannot find pinctrl device\n", __func__);
-		goto err;
-	}
-	ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_SDCARD);
-	if (ret) {
-		debug("%s: Failed to set up SD card\n", __func__);
-		goto err;
-	}
-
-	return 0;
-err:
-	printf("board_init: Error %d\n", ret);
-
-	/* No way to report error here */
-	hang();
-
-	return -1;
-#else
-	return 0;
-#endif
-}
-
-#ifndef CONFIG_SYS_DCACHE_OFF
-void enable_caches(void)
-{
-	/* Enable D-cache. I-cache is already enabled in start.S */
-	dcache_enable();
-}
-#endif
diff --git a/arch/arm/mach-rockchip/rk3188/Makefile b/arch/arm/mach-rockchip/rk3188/Makefile
index 7fa010405b..b3b23155fc 100644
--- a/arch/arm/mach-rockchip/rk3188/Makefile
+++ b/arch/arm/mach-rockchip/rk3188/Makefile
@@ -5,6 +5,7 @@
 #
 
 ifndef CONFIG_TPL_BUILD
+obj-y += rk3188.o
 obj-y += clk_rk3188.o
 obj-y += syscon_rk3188.o
 endif
diff --git a/arch/arm/mach-rockchip/rk3188/rk3188.c b/arch/arm/mach-rockchip/rk3188/rk3188.c
new file mode 100644
index 0000000000..00ba7dea4f
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3188/rk3188.c
@@ -0,0 +1,25 @@
+/*
+ * Copyright (c) 2016 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/periph.h>
+#include <asm/arch/grf_rk3188.h>
+
+#define GRF_BASE	0x20008000
+void board_debug_uart_init(void)
+{
+	struct rk3188_grf * const grf = (void *)GRF_BASE;
+
+	rk_clrsetreg(&grf->gpio1b_iomux,
+		     GPIO1B1_MASK << GPIO1B1_SHIFT |
+		     GPIO1B0_MASK << GPIO1B0_SHIFT,
+		     GPIO1B1_UART2_SOUT << GPIO1B1_SHIFT |
+		     GPIO1B0_UART2_SIN << GPIO1B0_SHIFT);
+
+}
+

commit 6c150631d0b717079a3c55e91a68b52fcd93a9d6
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Jan 20 22:18:21 2018 +0800

    rockchip: rk3188: remove rockchip timer as sys timer
    
    We use ARM arch timer instead.
    
    Change-Id: I22267fa4de69d3d9aab01c75d5b60355a79ce49b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h
index 91e8e5c259..9c69a893d5 100644
--- a/include/configs/rk3188_common.h
+++ b/include/configs/rk3188_common.h
@@ -17,9 +17,6 @@
 #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 
-#define CONFIG_SYS_TIMER_RATE		(24 * 1000 * 1000)
-#define CONFIG_SYS_TIMER_BASE		0x2000e000 /* TIMER3 */
-#define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMER_BASE + 8)
 #define CONFIG_SYS_TIMER_COUNTS_DOWN
 
 #ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM

commit 8c07fb99d91f6dffe78c6b1c2d00e0cf132b3468
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Jan 20 22:16:31 2018 +0800

    rockchip: rk3066: use common board file
    
    Move some SoC spec setting into rk3066.c
    
    Change-Id: Iab2bfa8b35ad4253572c326c6c4a06d768760a9d
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3066-board-spl.c b/arch/arm/mach-rockchip/rk3066-board-spl.c
deleted file mode 100644
index 9acdd83dae..0000000000
--- a/arch/arm/mach-rockchip/rk3066-board-spl.c
+++ /dev/null
@@ -1,139 +0,0 @@
-/*
- * (C) Copyright 2015 Google, Inc
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <clk.h>
-#include <common.h>
-#include <debug_uart.h>
-#include <dm.h>
-#include <fdtdec.h>
-#include <led.h>
-#include <malloc.h>
-#include <ram.h>
-#include <spl.h>
-#include <syscon.h>
-#include <asm/gpio.h>
-#include <asm/io.h>
-#include <asm/arch/bootrom.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/periph.h>
-#include <asm/arch/pmu_rk3188.h>
-#include <asm/arch/sdram.h>
-#include <asm/arch/timer.h>
-#include <dm/pinctrl.h>
-#include <dm/root.h>
-#include <dm/test.h>
-#include <dm/util.h>
-#include <power/regulator.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-u32 spl_boot_device(void)
-{
-	return BOOT_DEVICE_NAND;
-}
-
-void board_init_f(ulong dummy)
-{
-	struct udevice *pinctrl, *dev;
-	int ret;
-
-	debug_uart_init();
-
-	ret = spl_early_init();
-	if (ret) {
-		debug("spl_early_init() failed: %d\n", ret);
-		hang();
-	}
-
-	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
-	if (ret) {
-		debug("Pinctrl init failed: %d\n", ret);
-		return;
-	}
-
-	ret = rockchip_get_clk(&dev);
-	if (ret) {
-		debug("CLK init failed: %d\n", ret);
-		return;
-	}
-
-	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
-	if (ret) {
-		debug("DRAM init failed: %d\n", ret);
-		return;
-	}
-}
-
-void spl_board_init(void)
-{
-	struct udevice *pinctrl;
-	int ret;
-
-	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
-	if (ret) {
-		debug("%s: Cannot find pinctrl device\n", __func__);
-		goto err;
-	}
-
-#ifdef CONFIG_SPL_MMC_SUPPORT
-	ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_SDCARD);
-	if (ret) {
-		debug("%s: Failed to set up SD card\n", __func__);
-		goto err;
-	}
-#endif
-
-	/* Enable debug UART */
-	ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART_DBG);
-	if (ret) {
-		debug("%s: Failed to set up console UART\n", __func__);
-		goto err;
-	}
-
-	preloader_console_init();
-
-	return;
-
-err:
-	debug("spl_board_init: Error %d\n", ret);
-
-	/* No way to report error here */
-	hang();
-}
-
-#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
-#include <usb.h>
-#include <usb/dwc2_udc.h>
-
-static struct dwc2_plat_otg_data rk3066_otg_data = {
-	.rx_fifo_sz	= 275,
-	.np_tx_fifo_sz	= 16,
-	.tx_fifo_sz	= 256,
-};
-
-int board_usb_init(int index, enum usb_init_type init)
-{
-	ofnode otg_node;
-	u32 reg;
-
-	otg_node = ofnode_path("/usb@10180000");
-	if (!ofnode_valid(otg_node)) {
-		debug("Not found usb otg device\n");
-		return -ENODEV;
-	}
-
-	ofnode_read_u32(otg_node, "reg", &reg);
-	rk3066_otg_data.regs_otg = reg;
-
-	return dwc2_udc_probe(&rk3066_otg_data);
-}
-
-int board_usb_cleanup(int index, enum usb_init_type init)
-{
-	return 0;
-}
-#endif
diff --git a/arch/arm/mach-rockchip/rk3066-board.c b/arch/arm/mach-rockchip/rk3066-board.c
deleted file mode 100644
index 2b96eb2d41..0000000000
--- a/arch/arm/mach-rockchip/rk3066-board.c
+++ /dev/null
@@ -1,112 +0,0 @@
-/*
- * (C) Copyright 2017 Paweł Jarosz <paweljarosz3691@gmail.com>
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <clk.h>
-#include <dm.h>
-#include <ram.h>
-#include <syscon.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/grf_rk3066.h>
-#include <asm/arch/periph.h>
-#include <asm/arch/pmu_rk3188.h>
-#include <asm/arch/boot_mode.h>
-#include <asm/gpio.h>
-#include <dm/pinctrl.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int board_late_init(void)
-{
-	struct rk3066_grf *grf;
-
-	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	if (IS_ERR(grf)) {
-		debug("grf syscon returned %ld\n", PTR_ERR(grf));
-		return PTR_ERR(grf);
-	}
-	/* enable noc remap to mimic legacy loaders */
-	rk_clrsetreg(&grf->soc_con0, NOC_REMAP_MASK, NOC_REMAP_MASK);
-
-	return 0;
-}
-
-int board_init(void)
-{
-#if defined(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM)
-	struct udevice *pinctrl;
-	int ret;
-
-	/*
-	 * We need to implement sdcard iomux here for the further
-	 * initialization, otherwise, it'll hit sdcard command sending
-	 * timeout exception.
-	 */
-	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
-	if (ret) {
-		debug("%s: Cannot find pinctrl device\n", __func__);
-		goto err;
-	}
-	ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_SDCARD);
-	if (ret) {
-		debug("%s: Failed to set up SD card\n", __func__);
-		goto err;
-	}
-
-	return 0;
-err:
-	debug("board_init: Error %d\n", ret);
-
-	/* No way to report error here */
-	hang();
-
-	return -1;
-#else
-	return 0;
-#endif
-}
-
-#ifndef CONFIG_SYS_DCACHE_OFF
-void enable_caches(void)
-{
-	/* Enable D-cache. I-cache is already enabled in start.S */
-	dcache_enable();
-}
-#endif
-
-#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
-#include <usb.h>
-#include <usb/dwc2_udc.h>
-
-static struct dwc2_plat_otg_data rk3066_otg_data = {
-	.rx_fifo_sz	= 275,
-	.np_tx_fifo_sz	= 16,
-	.tx_fifo_sz	= 256,
-};
-
-int board_usb_init(int index, enum usb_init_type init)
-{
-	ofnode otg_node;
-	u32 reg;
-
-	otg_node = ofnode_path("/usb@10180000");
-	if (!ofnode_valid(otg_node)) {
-		debug("Not found usb otg device\n");
-		return -ENODEV;
-	}
-
-	ofnode_read_u32(otg_node, "reg", &reg);
-	rk3066_otg_data.regs_otg = reg;
-
-	return dwc2_udc_probe(&rk3066_otg_data);
-}
-
-int board_usb_cleanup(int index, enum usb_init_type init)
-{
-	return 0;
-}
-#endif
diff --git a/arch/arm/mach-rockchip/rk3066/Makefile b/arch/arm/mach-rockchip/rk3066/Makefile
index 7663b6a2f9..bff2fed236 100644
--- a/arch/arm/mach-rockchip/rk3066/Makefile
+++ b/arch/arm/mach-rockchip/rk3066/Makefile
@@ -4,6 +4,7 @@
 # SPDX-License-Identifier:      GPL-2.0+
 #
 
+obj-y += rk3066.o
 obj-y += clk_rk3066.o
 obj-y += sdram_rk3066.o
 obj-y += syscon_rk3066.o
diff --git a/arch/arm/mach-rockchip/rk3066/rk3066.c b/arch/arm/mach-rockchip/rk3066/rk3066.c
new file mode 100644
index 0000000000..c5e87f9e37
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3066/rk3066.c
@@ -0,0 +1,25 @@
+/*
+ * Copyright (c) 2016 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/periph.h>
+#include <asm/arch/grf_rk3066.h>
+
+#define GRF_BASE	0x20008000
+
+void board_debug_uart_init(void)
+{
+	struct rk3066_grf * const grf = (void *)GRF_BASE;
+
+	/* Enable early UART on the RK3066 */
+	rk_clrsetreg(&grf->gpio1b_iomux,
+		     GPIO1B1_MASK | GPIO1B0_MASK,
+		     GPIO1B1_UART2_SOUT << GPIO1B1_SHIFT |
+		     GPIO1B0_UART2_SIN << GPIO1B0_SHIFT);
+}
+

commit 60c204703f3bf16efcc9d4479ca186984ed508bd
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Jan 20 22:15:07 2018 +0800

    rockchip: rk3066: remove rockchip timer as systimer
    
    We are going to use ARM arch timer.
    
    Change-Id: If2fde02a06f59fe9e0102f5b141858f02b9c3b9e
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rk3066_common.h b/include/configs/rk3066_common.h
index 8d5f13b35f..aacd0facad 100644
--- a/include/configs/rk3066_common.h
+++ b/include/configs/rk3066_common.h
@@ -21,9 +21,6 @@
 #define SDRAM_BANK_SIZE			(1024UL << 20UL)
 #define SDRAM_MAX_SIZE			CONFIG_NR_DRAM_BANKS * SDRAM_BANK_SIZE
 
-#define CONFIG_SYS_TIMER_RATE		24000000
-#define CONFIG_SYS_TIMER_BASE		0x20038000
-#define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMER_BASE + 4)
 #define CONFIG_SYS_TIMER_COUNTS_DOWN
 
 #define CONFIG_SYS_TEXT_BASE		0x60408000

commit 537cfed2867ec7ce6ebdeb00bdb6da93ca294350
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Jan 20 22:11:55 2018 +0800

    rockchip: sdram_common: add common dram_init_banksize
    
    dram_init_banksize() can be common used by all SoCs, move it into
    sdram_common.c
    
    Change-Id: Ie8caa63b898202ae588d5a71f130d14c741943a2
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
index d6c815cf72..e9d2404d98 100644
--- a/arch/arm/mach-rockchip/sdram_common.c
+++ b/arch/arm/mach-rockchip/sdram_common.c
@@ -20,6 +20,66 @@ struct ddr_param{
 };
 #define PARAM_DRAM_INFO_OFFSET 0x2000000
 
+#define TRUST_PARAMETER_OFFSET    (34 * 1024 * 1024)
+
+struct tos_parameter_t {
+	u32 version;
+	u32 checksum;
+	struct {
+		char name[8];
+		s64 phy_addr;
+		u32 size;
+		u32 flags;
+	}tee_mem;
+	struct {
+		char name[8];
+		s64 phy_addr;
+		u32 size;
+		u32 flags;
+	}drm_mem;
+	s64 reserve[8];
+};
+
+int dram_init_banksize(void)
+{
+	size_t top = min((unsigned long)(gd->ram_size + CONFIG_SYS_SDRAM_BASE),
+			 gd->ram_top);
+
+#ifdef CONFIG_ARM64
+	/* Reserve 0x200000 for ATF bl31 */
+	gd->bd->bi_dram[0].start = 0x200000;
+	gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start;
+#else
+#ifdef CONFIG_SPL_OPTEE
+	struct tos_parameter_t *tos_parameter;
+	tos_parameter = (struct tos_parameter_t *)(CONFIG_SYS_SDRAM_BASE +
+			TRUST_PARAMETER_OFFSET);
+	if (tos_parameter->tee_mem.flags == 1) {
+		gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+		gd->bd->bi_dram[0].size = tos_parameter->tee_mem.phy_addr
+					- CONFIG_SYS_SDRAM_BASE;
+		gd->bd->bi_dram[1].start = tos_parameter->tee_mem.phy_addr +
+					tos_parameter->tee_mem.size;
+		gd->bd->bi_dram[1].size = gd->bd->bi_dram[0].start
+					+ top - gd->bd->bi_dram[1].start;
+	} else {
+		gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+		gd->bd->bi_dram[0].size = 0x8400000;
+		/* Reserve 32M for OPTEE with TA */
+		gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE
+					+ gd->bd->bi_dram[0].size + 0x2000000;
+		gd->bd->bi_dram[1].size = gd->bd->bi_dram[0].start
+					+ top - gd->bd->bi_dram[1].start;
+	}
+#else
+	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+	gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start;
+#endif
+#endif
+
+	return 0;
+}
+
 size_t rockchip_sdram_size(phys_addr_t reg)
 {
 	u32 rank, col, bk, cs0_row, cs1_row, bw, row_3_4;
@@ -92,7 +152,8 @@ ulong board_get_usable_ram_top(ulong total_size)
 
 int rockchip_setup_ddr_param(struct ram_info *info)
 {
-	struct ddr_param *dinfo = (struct ddr_param *)PARAM_DRAM_INFO_OFFSET;
+	struct ddr_param *dinfo = (struct ddr_param *)CONFIG_SYS_SDRAM_BASE +
+					PARAM_DRAM_INFO_OFFSET;
 
 	dinfo->count = 1;
 	dinfo->bank_addr = info->base;

commit ba59d97fad524e4ea394dd3a128ea561bea79bac
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Jan 20 22:09:23 2018 +0800

    rockchip: rk3036: use commong board file
    
    Move some soc spec setting into rk3036.c
    
    Change-Id: Ib0c1d222e273e8a8bfc8c58d2e060b696f2a7500
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3036-board.c b/arch/arm/mach-rockchip/rk3036-board.c
deleted file mode 100644
index a5d257168f..0000000000
--- a/arch/arm/mach-rockchip/rk3036-board.c
+++ /dev/null
@@ -1,104 +0,0 @@
-/*
- * (C) Copyright 2015 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <clk.h>
-#include <dm.h>
-#include <ram.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/periph.h>
-#include <asm/arch/grf_rk3036.h>
-#include <asm/arch/boot_mode.h>
-#include <asm/arch/sdram_rk3036.h>
-#include <asm/gpio.h>
-#include <dm/pinctrl.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-__weak int rk_board_late_init(void)
-{
-	return 0;
-}
-
-int board_late_init(void)
-{
-	setup_boot_mode();
-
-	return rk_board_late_init();
-}
-
-int board_init(void)
-{
-	return 0;
-}
-
-#if !CONFIG_IS_ENABLED(RAM)
-/*
- * When CONFIG_RAM is enabled, the dram_init() function is implemented
- * in sdram_common.c.
- */
-int dram_init(void)
-{
-	gd->ram_size = sdram_size();
-
-	return 0;
-}
-#endif
-
-#ifndef CONFIG_SYS_DCACHE_OFF
-void enable_caches(void)
-{
-	/* Enable D-cache. I-cache is already enabled in start.S */
-	dcache_enable();
-}
-#endif
-
-#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
-#include <usb.h>
-#include <usb/dwc2_udc.h>
-
-static struct dwc2_plat_otg_data rk3036_otg_data = {
-	.rx_fifo_sz	= 512,
-	.np_tx_fifo_sz	= 16,
-	.tx_fifo_sz	= 128,
-};
-
-int board_usb_init(int index, enum usb_init_type init)
-{
-	int node;
-	const char *mode;
-	bool matched = false;
-	const void *blob = gd->fdt_blob;
-
-	/* find the usb_otg node */
-	node = fdt_node_offset_by_compatible(blob, -1,
-					"rockchip,rk3288-usb");
-
-	while (node > 0) {
-		mode = fdt_getprop(blob, node, "dr_mode", NULL);
-		if (mode && strcmp(mode, "otg") == 0) {
-			matched = true;
-			break;
-		}
-
-		node = fdt_node_offset_by_compatible(blob, node,
-					"rockchip,rk3288-usb");
-	}
-	if (!matched) {
-		debug("Not found usb_otg device\n");
-		return -ENODEV;
-	}
-	rk3036_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
-
-	return dwc2_udc_probe(&rk3036_otg_data);
-}
-
-int board_usb_cleanup(int index, enum usb_init_type init)
-{
-	return 0;
-}
-#endif
diff --git a/arch/arm/mach-rockchip/rk3036/Makefile b/arch/arm/mach-rockchip/rk3036/Makefile
index 20d28f7c21..8a144d1f9e 100644
--- a/arch/arm/mach-rockchip/rk3036/Makefile
+++ b/arch/arm/mach-rockchip/rk3036/Makefile
@@ -4,7 +4,7 @@
 # SPDX-License-Identifier:     GPL-2.0+
 #
 
-obj-y += clk_rk3036.o
+obj-y += rk3036.o clk_rk3036.o
 
 ifndef CONFIG_SPL_BUILD
 obj-y += syscon_rk3036.o
diff --git a/arch/arm/mach-rockchip/rk3036-board-spl.c b/arch/arm/mach-rockchip/rk3036/rk3036.c
similarity index 50%
rename from arch/arm/mach-rockchip/rk3036-board-spl.c
rename to arch/arm/mach-rockchip/rk3036/rk3036.c
index 550e3a1521..39cc43b1c9 100644
--- a/arch/arm/mach-rockchip/rk3036-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3036/rk3036.c
@@ -1,28 +1,22 @@
 /*
- * (C) Copyright 2015 Rockchip Electronics Co., Ltd
+ * Copyright (c) 2017 Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:     GPL-2.0+
  */
-
-#include <common.h>
-#include <debug_uart.h>
 #include <asm/io.h>
 #include <asm/arch/bootrom.h>
-#include <asm/arch/grf_rk3036.h>
 #include <asm/arch/hardware.h>
-#include <asm/arch/sdram_rk3036.h>
-#include <asm/arch/timer.h>
-#include <asm/arch/uart.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
+#include <asm/arch/grf_rk3036.h>
 #define GRF_BASE	0x20008000
 
-#define DEBUG_UART_BASE	0x20068000
-
-void board_init_f(ulong dummy)
+#ifdef CONFIG_SPL_BUILD
+int arch_cpu_init(void)
+{
+	return 0;
+}
+#endif
+void board_debug_uart_init(void)
 {
-#ifdef EARLY_DEBUG
 	struct rk3036_grf * const grf = (void *)GRF_BASE;
 	/*
 	 * NOTE: sd card and debug uart use same iomux in rk3036,
@@ -34,22 +28,5 @@ void board_init_f(ulong dummy)
 		     GPIO1C2_MASK << GPIO1C2_SHIFT,
 		     GPIO1C3_UART2_SOUT << GPIO1C3_SHIFT |
 		     GPIO1C2_UART2_SIN << GPIO1C2_SHIFT);
-	debug_uart_init();
-#endif
-	rockchip_timer_init();
-	sdram_init();
-
-	/* return to maskrom */
-	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
-}
 
-/* Place Holders */
-void board_init_r(gd_t *id, ulong dest_addr)
-{
-	/*
-	 * Function attribute is no-return
-	 * This Function never executes
-	 */
-	while (1)
-		;
 }
diff --git a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
index 434a481fb1..ea4e1d9ec5 100644
--- a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
+++ b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
@@ -11,6 +11,7 @@
 #include <asm/arch/hardware.h>
 #include <asm/arch/sdram_rk3036.h>
 #include <asm/arch/uart.h>
+DECLARE_GLOBAL_DATA_PTR;
 
 /*
  * we can not fit the code to access the device tree in SPL
@@ -763,3 +764,16 @@ void sdram_init(void)
 	move_to_access_state(&sdram_priv);
 	dram_cfg_rbc(&sdram_priv);
 }
+
+#if !CONFIG_IS_ENABLED(RAM)
+/*
+ * When CONFIG_RAM is enabled, the dram_init() function is implemented
+ * in sdram_common.c.
+ */
+int dram_init(void)
+{
+	gd->ram_size = sdram_size();
+
+	return 0;
+}
+#endif

commit afb735a686e978f7027c4b7e23f48d090c3e9c30
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Jan 20 22:05:30 2018 +0800

    rockchip: rk3036: sdram: use udelay instead of rockchip_udelay
    
    We are going to remove rockchip_udelay after enable arch timer.
    
    Change-Id: I8c7eea8315a42401d0fd7dbf1e4c812b5605bc73
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
index ffcf4de65f..434a481fb1 100644
--- a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
+++ b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
@@ -10,7 +10,6 @@
 #include <asm/arch/grf_rk3036.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/sdram_rk3036.h>
-#include <asm/arch/timer.h>
 #include <asm/arch/uart.h>
 
 /*
@@ -345,7 +344,7 @@ static void rkdclk_init(struct rk3036_sdram_priv *priv)
 
 	/* waiting for pll lock */
 	while (readl(&pll->con1) & (1 << PLL_LOCK_STATUS_SHIFT))
-		rockchip_udelay(1);
+		udelay(1);
 
 	/* PLL enter normal-mode */
 	rk_clrsetreg(&priv->cru->cru_mode_con, DPLL_MODE_MASK,
@@ -373,25 +372,25 @@ void phy_pctrl_reset(struct rk3036_sdram_priv *priv)
 			1 << DDRCTRL_PSRST_SHIFT | 1 << DDRCTRL_SRST_SHIFT |
 			1 << DDRPHY_PSRST_SHIFT | 1 << DDRPHY_SRST_SHIFT);
 
-	rockchip_udelay(10);
+	udelay(10);
 
 	rk_clrreg(&priv->cru->cru_softrst_con[5], 1 << DDRPHY_PSRST_SHIFT |
 						  1 << DDRPHY_SRST_SHIFT);
-	rockchip_udelay(10);
+	udelay(10);
 
 	rk_clrreg(&priv->cru->cru_softrst_con[5], 1 << DDRCTRL_PSRST_SHIFT |
 						  1 << DDRCTRL_SRST_SHIFT);
-	rockchip_udelay(10);
+	udelay(10);
 
 	clrsetbits_le32(&ddr_phy->ddrphy_reg1,
 			SOFT_RESET_MASK << SOFT_RESET_SHIFT,
 			0 << SOFT_RESET_SHIFT);
-	rockchip_udelay(10);
+	udelay(10);
 	clrsetbits_le32(&ddr_phy->ddrphy_reg1,
 			SOFT_RESET_MASK << SOFT_RESET_SHIFT,
 			3 << SOFT_RESET_SHIFT);
 
-	rockchip_udelay(1);
+	udelay(1);
 }
 
 void phy_dll_bypass_set(struct rk3036_sdram_priv *priv, unsigned int freq)
@@ -444,7 +443,7 @@ static void send_command(struct rk3036_ddr_pctl *pctl,
 			 u32 rank, u32 cmd, u32 arg)
 {
 	writel((START_CMD | (rank << 20) | arg | cmd), &pctl->mcmd);
-	rockchip_udelay(1);
+	udelay(1);
 	while (readl(&pctl->mcmd) & START_CMD)
 		;
 }
@@ -454,7 +453,7 @@ static void memory_init(struct rk3036_sdram_priv *priv)
 	struct rk3036_ddr_pctl *pctl = priv->pctl;
 
 	send_command(pctl, 3, DESELECT_CMD, 0);
-	rockchip_udelay(1);
+	udelay(1);
 	send_command(pctl, 3, PREA_CMD, 0);
 	send_command(pctl, 3, MRS_CMD,
 		     (0x02 & BANK_ADDR_MASK) << BANK_ADDR_SHIFT |
@@ -492,7 +491,7 @@ static void data_training(struct rk3036_sdram_priv *priv)
 	clrsetbits_le32(&ddr_phy->ddrphy_reg2, 0x03,
 			DQS_SQU_CAL_NORMAL_MODE | DQS_SQU_CAL_START);
 
-	rockchip_udelay(1);
+	udelay(1);
 	while ((readl(&ddr_phy->ddrphy_reg62) & CAL_DONE_MASK) !=
 		(HIGH_8BIT_CAL_DONE | LOW_8BIT_CAL_DONE)) {
 		;

commit f484cfe28756903af0457a94a71979a3301a2211
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Jan 20 22:03:11 2018 +0800

    rockchip: rk3036: remove sys timer
    
    Use ARM arch timer instead.
    
    Change-Id: Idb8dd83d8ee54d8e2a5d7c072f79c17177d89f70
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index 85e2ceee7c..b655a42c57 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -14,10 +14,6 @@
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
-#define CONFIG_SYS_TIMER_RATE		(24 * 1000 * 1000)
-#define CONFIG_SYS_TIMER_BASE		0x200440a0 /* TIMER5 */
-#define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMER_BASE + 8)
-
 #define CONFIG_SYS_TEXT_BASE		0x60000000
 #define CONFIG_SYS_INIT_SP_ADDR		0x60100000
 #define CONFIG_SYS_LOAD_ADDR		0x60800800

commit c11c067d9619ad1160428bab35e35965c5155021
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Jan 20 21:59:52 2018 +0800

    rockchip: rk322x: use common board file
    
    Change-Id: If3ac0d99a96a784443e16112362fd54576a70c00
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk322x-board-spl.c b/arch/arm/mach-rockchip/rk322x-board-spl.c
deleted file mode 100644
index 71e641ef33..0000000000
--- a/arch/arm/mach-rockchip/rk322x-board-spl.c
+++ /dev/null
@@ -1,47 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <dm.h>
-#include <spl.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-u32 spl_boot_device(void)
-{
-	return BOOT_DEVICE_MMC1;
-}
-
-u32 spl_boot_mode(const u32 boot_device)
-{
-	return MMCSD_MODE_RAW;
-}
-
-void board_debug_uart_init(void)
-{
-}
-
-void board_init_f(ulong dummy)
-{
-	int ret;
-
-	ret = spl_early_init();
-	if (ret) {
-		printf("spl_early_init() failed: %d\n", ret);
-		hang();
-	}
-	preloader_console_init();
-}
-
-#ifdef CONFIG_SPL_LOAD_FIT
-int board_fit_config_name_match(const char *name)
-{
-	/* Just empty function now - can't decide what to choose */
-	debug("%s: %s\n", __func__, name);
-
-	return 0;
-}
-#endif
diff --git a/arch/arm/mach-rockchip/rk322x-board-tpl.c b/arch/arm/mach-rockchip/rk322x-board-tpl.c
deleted file mode 100644
index a10a7a170a..0000000000
--- a/arch/arm/mach-rockchip/rk322x-board-tpl.c
+++ /dev/null
@@ -1,88 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <debug_uart.h>
-#include <dm.h>
-#include <ram.h>
-#include <spl.h>
-#include <asm/io.h>
-#include <asm/arch/bootrom.h>
-#include <asm/arch/cru_rk322x.h>
-#include <asm/arch/grf_rk322x.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/timer.h>
-#include <asm/arch/uart.h>
-
-u32 spl_boot_device(void)
-{
-	return BOOT_DEVICE_MMC1;
-}
-DECLARE_GLOBAL_DATA_PTR;
-
-#define GRF_BASE	0x11000000
-#define SECURE_TIMER_BASE	0x110d0020
-#define SGRF_DDR_CON0 0x10150000
-
-void board_debug_uart_init(void)
-{
-	static struct rk322x_grf * const grf = (void *)GRF_BASE;
-	/* Enable early UART2 channel 1 on the RK322x */
-	rk_clrsetreg(&grf->gpio1b_iomux,
-		     GPIO1B1_MASK | GPIO1B2_MASK,
-		     GPIO1B2_UART21_SIN << GPIO1B2_SHIFT |
-		     GPIO1B1_UART21_SOUT << GPIO1B1_SHIFT);
-	/* Set channel C as UART2 input */
-	rk_clrsetreg(&grf->con_iomux,
-		     CON_IOMUX_UART2SEL_MASK,
-		     CON_IOMUX_UART2SEL_21 << CON_IOMUX_UART2SEL_SHIFT);
-}
-
-void secure_timer_init(void)
-{
-	writel(0, SECURE_TIMER_BASE + 0x10);
-	writel(0xffffffff, SECURE_TIMER_BASE);
-	writel(0xffffffff, SECURE_TIMER_BASE + 4);
-	writel(1, SECURE_TIMER_BASE + 0x10);
-}
-
-void board_init_f(ulong dummy)
-{
-	struct udevice *dev;
-	int ret;
-
-	/*
-	 * Debug UART can be used from here if required:
-	 *
-	 * debug_uart_init();
-	 * printch('a');
-	 * printhex8(0x1234);
-	 * printascii("string");
-	 */
-	debug_uart_init();
-	printascii("TPL Init");
-
-	ret = spl_early_init();
-	if (ret) {
-		debug("spl_early_init() failed: %d\n", ret);
-		hang();
-	}
-
-	secure_timer_init();
-	/* TODO: use arm generic timer instead for armv7 */
-	rockchip_timer_init();
-	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
-	if (ret) {
-		printf("DRAM init failed: %d\n", ret);
-		return;
-	}
-
-	/* Disable the ddr secure region setting to make it non-secure */
-	rk_clrreg(SGRF_DDR_CON0, 0x4000);
-#if defined(CONFIG_TPL_ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_TPL_BOARD_INIT)
-	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
-#endif
-}
diff --git a/arch/arm/mach-rockchip/rk322x-board.c b/arch/arm/mach-rockchip/rk322x-board.c
deleted file mode 100644
index fdfdb5bc4c..0000000000
--- a/arch/arm/mach-rockchip/rk322x-board.c
+++ /dev/null
@@ -1,190 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-#include <common.h>
-#include <clk.h>
-#include <dm.h>
-#include <ram.h>
-#include <syscon.h>
-#include <asm/io.h>
-#include <asm/gpio.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/periph.h>
-#include <asm/arch/timer.h>
-#include <asm/arch/grf_rk322x.h>
-#include <asm/arch/boot_mode.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define TRUST_PARAMETER_OFFSET    (34 * 1024 * 1024)
-
-struct tos_parameter_t {
-	u32 version;
-	u32 checksum;
-	struct {
-		char name[8];
-		s64 phy_addr;
-		u32 size;
-		u32 flags;
-	}tee_mem;
-	struct {
-		char name[8];
-		s64 phy_addr;
-		u32 size;
-		u32 flags;
-	}drm_mem;
-	s64 reserve[8];
-};
-
-#if defined(CONFIG_USB_FUNCTION_FASTBOOT)
-int fb_set_reboot_flag(void)
-{
-	struct rk322x_grf *grf;
-
-	printf("Setting reboot to fastboot flag ...\n");
-	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	/* Set boot mode to fastboot */
-	writel(BOOT_FASTBOOT, &grf->os_reg[0]);
-
-	return 0;
-}
-
-#define FASTBOOT_KEY_GPIO 43 /* GPIO1_B3 */
-static int fastboot_key_pressed(void)
-{
-	gpio_request(FASTBOOT_KEY_GPIO, "fastboot_key");
-	gpio_direction_input(FASTBOOT_KEY_GPIO);
-	return !gpio_get_value(FASTBOOT_KEY_GPIO);
-}
-#endif
-
-__weak int rk_board_late_init(void)
-{
-	return 0;
-}
-
-int board_late_init(void)
-{
-#if defined(CONFIG_USB_FUNCTION_FASTBOOT)
-	if (fastboot_key_pressed()) {
-		printf("fastboot key pressed!\n");
-		fb_set_reboot_flag();
-	}
-#endif
-
-	setup_boot_mode();
-
-	return rk_board_late_init();
-}
-
-int board_init(void)
-{
-#include <asm/arch/grf_rk322x.h>
-	/* Enable early UART2 channel 1 on the RK322x */
-#define GRF_BASE	0x11000000
-	struct rk322x_grf * const grf = (void *)GRF_BASE;
-
-	rk_clrsetreg(&grf->gpio1b_iomux,
-		     GPIO1B1_MASK | GPIO1B2_MASK,
-		     GPIO1B2_UART21_SIN << GPIO1B2_SHIFT |
-		     GPIO1B1_UART21_SOUT << GPIO1B1_SHIFT);
-	/* Set channel C as UART2 input */
-	rk_clrsetreg(&grf->con_iomux,
-		     CON_IOMUX_UART2SEL_MASK,
-		     CON_IOMUX_UART2SEL_21 << CON_IOMUX_UART2SEL_SHIFT);
-
-	/*
-	* The integrated macphy is enabled by default, disable it
-	* for saving power consuming.
-	*/
-	rk_clrsetreg(&grf->macphy_con[0],
-		     MACPHY_CFG_ENABLE_MASK,
-		     0 << MACPHY_CFG_ENABLE_SHIFT);
-
-	rockchip_timer_init();
-
-	return 0;
-}
-
-int dram_init_banksize(void)
-{
-	struct tos_parameter_t *tos_parameter;
-	tos_parameter = (struct tos_parameter_t *)(CONFIG_SYS_SDRAM_BASE +
-			TRUST_PARAMETER_OFFSET);
-	if (tos_parameter->tee_mem.flags == 1) {
-		gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
-		gd->bd->bi_dram[0].size = tos_parameter->tee_mem.phy_addr
-					- CONFIG_SYS_SDRAM_BASE;
-		gd->bd->bi_dram[1].start = tos_parameter->tee_mem.phy_addr +
-					tos_parameter->tee_mem.size;
-		gd->bd->bi_dram[1].size = gd->bd->bi_dram[0].start
-					+ gd->ram_size - gd->bd->bi_dram[1].start;
-	} else {
-		gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
-		gd->bd->bi_dram[0].size = 0x8400000;
-		/* Reserve 32M for OPTEE with TA */
-		gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE
-				+ gd->bd->bi_dram[0].size + 0x2000000;
-		gd->bd->bi_dram[1].size = gd->bd->bi_dram[0].start
-				+ gd->ram_size - gd->bd->bi_dram[1].start;
-	}
-
-	return 0;
-}
-
-#ifndef CONFIG_SYS_DCACHE_OFF
-void enable_caches(void)
-{
-	/* Enable D-cache. I-cache is already enabled in start.S */
-	dcache_enable();
-}
-#endif
-
-#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
-#include <usb.h>
-#include <usb/dwc2_udc.h>
-
-static struct dwc2_plat_otg_data rk322x_otg_data = {
-	.rx_fifo_sz	= 512,
-	.np_tx_fifo_sz	= 16,
-	.tx_fifo_sz	= 128,
-};
-
-int board_usb_init(int index, enum usb_init_type init)
-{
-	int node;
-	const char *mode;
-	bool matched = false;
-	const void *blob = gd->fdt_blob;
-
-	/* find the usb_otg node */
-	node = fdt_node_offset_by_compatible(blob, -1,
-					"rockchip,rk3288-usb");
-
-	while (node > 0) {
-		mode = fdt_getprop(blob, node, "dr_mode", NULL);
-		if (mode && strcmp(mode, "otg") == 0) {
-			matched = true;
-			break;
-		}
-
-		node = fdt_node_offset_by_compatible(blob, node,
-					"rockchip,rk3288-usb");
-	}
-	if (!matched) {
-		debug("Not found usb_otg device\n");
-		return -ENODEV;
-	}
-	rk322x_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
-
-	return dwc2_udc_probe(&rk322x_otg_data);
-}
-
-int board_usb_cleanup(int index, enum usb_init_type init)
-{
-	return 0;
-}
-#endif
-
diff --git a/arch/arm/mach-rockchip/rk322x/rk322x.c b/arch/arm/mach-rockchip/rk322x/rk322x.c
index dcc9f423c3..48c9884658 100644
--- a/arch/arm/mach-rockchip/rk322x/rk322x.c
+++ b/arch/arm/mach-rockchip/rk322x/rk322x.c
@@ -4,29 +4,61 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 #include <asm/io.h>
+#include <asm/arch/bootrom.h>
 #include <asm/arch/hardware.h>
+#include <asm/arch/grf_rk322x.h>
 
-#define GRF_SOC_CON2	0x11000408
-#define GRF_CON_IOMUX	0x11000050
+#define GRF_BASE	0x11000000
 #define CRU_MISC_CON	0x110e0134
+#define SGRF_DDR_CON0	0x10150000
 
+const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
+	[BROM_BOOTSOURCE_EMMC] = "/sdhci@fe330000",
+	[BROM_BOOTSOURCE_SD] = "/dwmmc@fe320000",
+};
+#ifdef CONFIG_SPL_BUILD
 int arch_cpu_init(void)
 {
+	static struct rk322x_grf * const grf = (void *)GRF_BASE;
 	/* We do some SoC one time setting here. */
 
+	/* Disable the ddr secure region setting to make it non-secure */
+	rk_clrreg(SGRF_DDR_CON0, 0x4000);
+
 	/* PWMs select rkpwm clock source */
-	rk_setreg(GRF_SOC_CON2, 1 << 0);
+	rk_setreg(&grf->soc_con[2], 1 << 0);
 
 	/* PWM0~3 io select */
-	rk_setreg(GRF_CON_IOMUX, 0xf << 0);
+	rk_setreg(&grf->con_iomux, 0xf << 0);
 
 	/* UART1~2 io select */
-	rk_setreg(GRF_CON_IOMUX, (1 << 11) | (1 << 8));
+	rk_setreg(&grf->con_iomux, (1 << 11) | (1 << 8));
 
 	/* HDMI phy clock source select HDMIPHY clock out */
 	rk_clrreg(CRU_MISC_CON, 1 << 13);
 
+	/*
+	* The integrated macphy is enabled by default, disable it
+	* for saving power consuming.
+	*/
+	rk_clrsetreg(&grf->macphy_con[0], MACPHY_CFG_ENABLE_MASK,
+		     0 << MACPHY_CFG_ENABLE_SHIFT);
 	/* TODO: ECO version */
 
 	return 0;
 }
+#endif
+
+void board_debug_uart_init(void)
+{
+	static struct rk322x_grf * const grf = (void *)GRF_BASE;
+	/* Enable early UART2 channel 1 on the RK322x */
+	rk_clrsetreg(&grf->gpio1b_iomux,
+		     GPIO1B1_MASK | GPIO1B2_MASK,
+		     GPIO1B2_UART21_SIN << GPIO1B2_SHIFT |
+		     GPIO1B1_UART21_SOUT << GPIO1B1_SHIFT);
+	/* Set channel C as UART2 input */
+	rk_clrsetreg(&grf->con_iomux,
+		     CON_IOMUX_UART2SEL_MASK,
+		     CON_IOMUX_UART2SEL_21 << CON_IOMUX_UART2SEL_SHIFT);
+}

commit 5531a492c004767a4efaec4a46040cc3db2e9ebe
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Jan 20 21:56:58 2018 +0800

    rockchip: rk322x: sdram: use common udelay instead of rockchip_udelay
    
    Do not need to use rockchip_udelay after we can use systimer.
    
    Change-Id: Ibcd722a71ca383c057128d9706c6679b49c17a3d
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram_rk322x.c b/drivers/ram/rockchip/sdram_rk322x.c
index cc3138b21d..c4da0004c8 100644
--- a/drivers/ram/rockchip/sdram_rk322x.c
+++ b/drivers/ram/rockchip/sdram_rk322x.c
@@ -17,7 +17,6 @@
 #include <asm/arch/grf_rk322x.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/sdram_rk322x.h>
-#include <asm/arch/timer.h>
 #include <asm/arch/uart.h>
 #include <asm/arch/sdram_common.h>
 #include <asm/types.h>
@@ -97,26 +96,26 @@ void phy_pctrl_reset(struct rk322x_cru *cru,
 			1 << DDRCTRL_PSRST_SHIFT | 1 << DDRCTRL_SRST_SHIFT |
 			1 << DDRPHY_PSRST_SHIFT | 1 << DDRPHY_SRST_SHIFT);
 
-	rockchip_udelay(10);
+	udelay(10);
 
 	rk_clrreg(&cru->cru_softrst_con[5], 1 << DDRPHY_PSRST_SHIFT |
 						  1 << DDRPHY_SRST_SHIFT);
-	rockchip_udelay(10);
+	udelay(10);
 
 	rk_clrreg(&cru->cru_softrst_con[5], 1 << DDRCTRL_PSRST_SHIFT |
 						  1 << DDRCTRL_SRST_SHIFT);
-	rockchip_udelay(10);
+	udelay(10);
 
 	clrbits_le32(&ddr_phy->ddrphy_reg[0],
 		     SOFT_RESET_MASK << SOFT_RESET_SHIFT);
-	rockchip_udelay(10);
+	udelay(10);
 	setbits_le32(&ddr_phy->ddrphy_reg[0],
 		     SOFT_DERESET_ANALOG);
-	rockchip_udelay(5);
+	udelay(5);
 	setbits_le32(&ddr_phy->ddrphy_reg[0],
 		     SOFT_DERESET_DIGITAL);
 
-	rockchip_udelay(1);
+	udelay(1);
 }
 
 void phy_dll_bypass_set(struct rk322x_ddr_phy *ddr_phy, u32 freq)
@@ -155,7 +154,7 @@ static void send_command(struct rk322x_ddr_pctl *pctl,
 			 u32 rank, u32 cmd, u32 arg)
 {
 	writel((START_CMD | (rank << 20) | arg | cmd), &pctl->mcmd);
-	rockchip_udelay(1);
+	udelay(1);
 	while (readl(&pctl->mcmd) & START_CMD)
 		;
 }
@@ -168,7 +167,7 @@ static void memory_init(struct chan_info *chan,
 
 	if (dramtype == DDR3) {
 		send_command(pctl, 3, DESELECT_CMD, 0);
-		rockchip_udelay(1);
+		udelay(1);
 		send_command(pctl, 3, PREA_CMD, 0);
 		send_command(pctl, 3, MRS_CMD,
 			     (0x02 & BANK_ADDR_MASK) << BANK_ADDR_SHIFT |
@@ -197,17 +196,17 @@ static void memory_init(struct chan_info *chan,
 			     (0x63 & LPDDR23_MA_MASK) << LPDDR23_MA_SHIFT |
 			     (0 & LPDDR23_OP_MASK) <<
 			     LPDDR23_OP_SHIFT);
-		rockchip_udelay(10);
+		udelay(10);
 		send_command(pctl, 3, MRS_CMD,
 			     (0x10 & LPDDR23_MA_MASK) << LPDDR23_MA_SHIFT |
 			     (0xff & LPDDR23_OP_MASK) <<
 			     LPDDR23_OP_SHIFT);
-		rockchip_udelay(1);
+		udelay(1);
 		send_command(pctl, 3, MRS_CMD,
 			     (0x10 & LPDDR23_MA_MASK) << LPDDR23_MA_SHIFT |
 			     (0xff & LPDDR23_OP_MASK) <<
 			     LPDDR23_OP_SHIFT);
-		rockchip_udelay(1);
+		udelay(1);
 		send_command(pctl, 3, MRS_CMD,
 			     (1 & LPDDR23_MA_MASK) << LPDDR23_MA_SHIFT |
 			     (sdram_params->phy_timing.mr[1] &
@@ -244,7 +243,7 @@ static u32 data_training(struct chan_info *chan)
 			DQS_SQU_CAL_SEL_CS0);
 	setbits_le32(&ddr_phy->ddrphy_reg[2], DQS_SQU_CAL_START);
 
-	rockchip_udelay(30);
+	udelay(30);
 	ret = readl(&ddr_phy->ddrphy_reg[0xff]);
 
 	clrbits_le32(&ddr_phy->ddrphy_reg[2],
@@ -368,9 +367,9 @@ static void phy_softreset(struct dram_info *dram)
 
 	writel(GRF_DDRPHY_BUFFEREN_CORE_EN, &grf->soc_con[0]);
 	clrbits_le32(&ddr_phy->ddrphy_reg[0], 0x3 << 2);
-	rockchip_udelay(1);
+	udelay(1);
 	setbits_le32(&ddr_phy->ddrphy_reg[0], 1 << 2);
-	rockchip_udelay(5);
+	udelay(5);
 	setbits_le32(&ddr_phy->ddrphy_reg[0], 1 << 3);
 	writel(GRF_DDRPHY_BUFFEREN_CORE_DIS, &grf->soc_con[0]);
 }

commit 422ee936fd1dfbaa6482b268c3bec12033859e73
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Jan 20 21:55:45 2018 +0800

    rockchip: rk322x: remove use rockchip timer as sys timer
    
    We can use arch timer instead of rockchip timer.
    
    Change-Id: I9098f42180515202c39c9fd86299687cb4902ec1
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h
index ecfed899cf..e40d4504b9 100644
--- a/include/configs/rk322x_common.h
+++ b/include/configs/rk322x_common.h
@@ -14,9 +14,6 @@
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/*  64M */
 
-#define CONFIG_SYS_TIMER_RATE		(24 * 1000 * 1000)
-#define CONFIG_SYS_TIMER_BASE		0x110c00a0 /* TIMER5 */
-#define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMER_BASE + 8)
 
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SYS_TEXT_BASE		0x61000000

commit 8ec39620845b660a9b043b1e3d82e843ca70536c
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Jan 20 21:54:58 2018 +0800

    rockchip: rk3328: add BOOT_MODE_REG for rk3328
    
    Change-Id: Ib0ee4709b6b57b51142c9df2e14ff0be3798f9a3
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index e0f1b663e6..7090db00dc 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -237,6 +237,7 @@ config ROCKCHIP_BOOT_MODE_REG
 	default 0x20004040 if ROCKCHIP_RK3188
 	default 0x110005c8 if ROCKCHIP_RK322X
 	default 0xff730094 if ROCKCHIP_RK3288
+	default 0xff1005c8 if ROCKCHIP_RK3328
 	default 0xff738200 if ROCKCHIP_RK3368
 	default 0xff320300 if ROCKCHIP_RK3399
 	default 0x10300580 if ROCKCHIP_RV1108

commit ffb06671e66b123739d624d7291e535cd95608d6
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Jan 20 21:51:51 2018 +0800

    rockchip: rk3066: enable early back to bootrom like rk3188
    
    We don't need tpl for rk3066 after we enable this option.
    NOTE: need to update code for clock init in boot0 later
    
    Change-Id: I253e6a0fd3633d982ebabaa045a0d4839570bc6a
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 2ffef77e8c..e0f1b663e6 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -41,6 +41,7 @@ config ROCKCHIP_RK3066
 	select TPL
 	select BOARD_LATE_INIT
 	select ROCKCHIP_BROM_HELPER
+	select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
 	help
 	  The Rockchip RK3066 is a ARM-based SoC with a dual-core Cortex-A9
 	  including NEON and GPU, Mali-400 graphics, several DDR3 options
diff --git a/arch/arm/mach-rockchip/rk3066-board-tpl.c b/arch/arm/mach-rockchip/rk3066-board-tpl.c
deleted file mode 100644
index 03efe399e5..0000000000
--- a/arch/arm/mach-rockchip/rk3066-board-tpl.c
+++ /dev/null
@@ -1,90 +0,0 @@
-/*
- * (C) Copyright 2015 Google, Inc
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <clk.h>
-#include <common.h>
-#include <debug_uart.h>
-#include <dm.h>
-#include <ram.h>
-#include <spl.h>
-#include <asm/io.h>
-#include <asm/arch/bootrom.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/ddr_rk3188.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/grf_rk3066.h>
-#include <asm/arch/pmu_rk3188.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define RK3066_TIMER_CONTROL	0x8
-#define GRF_BASE	0x20008000
-
-static int setup_arm_clock(void)
-{
-	struct udevice *dev;
-	struct clk clk;
-	int ret;
-
-	ret = rockchip_get_clk(&dev);
-	if (ret)
-		return ret;
-
-	clk.id = CLK_ARM;
-	ret = clk_request(dev, &clk);
-	if (ret < 0)
-		return ret;
-
-	ret = clk_set_rate(&clk, 600000000);
-
-	clk_free(&clk);
-	return ret;
-}
-
-void board_init_f(ulong dummy)
-{
-	struct rk3066_grf * const grf = (void *)GRF_BASE;
-	struct udevice *dev;
-	int ret;
-
-	/* Enable early UART on the RK3066 */
-	rk_clrsetreg(&grf->gpio1b_iomux,
-		     GPIO1B1_MASK | GPIO1B0_MASK,
-		     GPIO1B1_UART2_SOUT << GPIO1B1_SHIFT |
-		     GPIO1B0_UART2_SIN << GPIO1B0_SHIFT);
-
-	debug_uart_init();
-
-	printascii("U-Boot TPL board init\n");
-
-	ret = spl_early_init();
-	if (ret) {
-		debug("spl_early_init() failed: %d\n", ret);
-		hang();
-	}
-
-	/* Reset and enable Timer0 */
-	writel(0, CONFIG_SYS_TIMER_BASE);
-	rk_clrsetreg(CONFIG_SYS_TIMER_BASE + RK3066_TIMER_CONTROL, 0x1, 0x1);
-
-	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
-	if (ret) {
-		debug("DRAM init failed: %d\n", ret);
-		return;
-	}
-
-	setup_arm_clock();
-}
-
-void board_return_to_bootrom(void)
-{
-	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
-}
-
-u32 spl_boot_device(void)
-{
-	return BOOT_DEVICE_BOOTROM;
-}

commit e8078e906809989f5429bdd1e2d98b73c5402c52
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Jan 20 21:50:15 2018 +0800

    rockchip: add IRAM_START_ADDR for all SoCs
    
    We add this for get the location for boot device of bootrom.
    
    Change-Id: Ibf142129cacb09ed9e4e0084d003c6cc0812df54
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index b187404737..2ffef77e8c 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -263,6 +263,23 @@ config ROCKCHIP_STIMER_BASE
 	  The secure timer inited in SPL/TPL in secure word, ARM generic timer
 	  works after this timer work.
 
+config ROCKCHIP_IRAM_START_ADDR
+	hex "Rockchip Secure timer base address"
+	default 0xff0e0000 if ROCKCHIP_PX30
+	default 0x10080000 if ROCKCHIP_RK3036
+	default 0x10080000 if ROCKCHIP_RK3128
+	default 0x10080000 if ROCKCHIP_RK3188
+	default 0x10080000 if ROCKCHIP_RK322X
+	default 0xff700000 if ROCKCHIP_RK3288
+	default 0xff091000 if ROCKCHIP_RK3328
+	default 0xff8c0000 if ROCKCHIP_RK3368
+	default 0xff8c0000 if ROCKCHIP_RK3399
+	default 0x10080000 if ROCKCHIP_RV1108
+	default 0
+	help
+	  The IRAM start addr is to locate variant of the boot device from
+	  bootrom.
+
 config ROCKCHIP_SPL_RESERVE_IRAM
 	hex "Size of IRAM reserved in SPL"
 	default 0

commit d5ed5c22a11b5b0f26f52f2ccac07debcce1db88
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Jan 20 21:46:44 2018 +0800

    rockchip: add STIMER_BASE for all SoCs
    
    STIMER is can only access in secure mode if the SoCs supports trust,
    and it locate in alive power domain, as the source of ARM arch/generic
    timer, we add a base addr for all SoCs so that we can init with a common
    function.
    
    Change-Id: Iab7b8706344ecdc635d66196eed1ff855afc9a24
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 64b3a61dca..b187404737 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -244,6 +244,25 @@ config ROCKCHIP_BOOT_MODE_REG
 	  The Soc will enter to different boot mode(defined in asm/arch/boot_mode.h)
 	  according to the value from this register.
 
+config ROCKCHIP_STIMER_BASE
+	hex "Rockchip Secure timer base address"
+	default 0xff220020 if ROCKCHIP_PX30
+	default 0x200440a0 if ROCKCHIP_RK3036
+	default 0x2000e000 if ROCKCHIP_RK3066
+	default 0x20018020 if ROCKCHIP_RK3126
+	default 0x200440a0 if ROCKCHIP_RK3128
+	default 0x2000e000 if ROCKCHIP_RK3188
+	default 0x110d0020 if ROCKCHIP_RK322X
+	default 0xff810020 if ROCKCHIP_RK3288
+	default 0xff1d0020 if ROCKCHIP_RK3328
+	default 0xff830020 if ROCKCHIP_RK3368
+	default 0xff8680a0 if ROCKCHIP_RK3399
+	default 0x10350020 if ROCKCHIP_RV1108
+	default 0
+	help
+	  The secure timer inited in SPL/TPL in secure word, ARM generic timer
+	  works after this timer work.
+
 config ROCKCHIP_SPL_RESERVE_IRAM
 	hex "Size of IRAM reserved in SPL"
 	default 0

commit 60b9259c7eb819b117cc9e80ff0f57b9daad2aa4
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Jan 20 21:43:05 2018 +0800

    rockchip: enable SYS_NS16550 for all SoCs by default
    
    All rockchip SoCs can use ns16550 driver, enable it for all
    and set SYS_NS16550_MEM32 for all SoCs.
    
    Change-Id: I4be3a801bf5537b94ed0c100cb44f49d78b8b15a
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 005a315116..a17879ddb6 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1131,6 +1131,7 @@ config ARCH_ROCKCHIP
 	select DM_REGULATOR
 	select CMD_ROCKUSB if USB_GADGET_DOWNLOAD
 	select ENABLE_ARM_SOC_BOOT0_HOOK
+	select SYS_NS16550
 	imply CMD_FASTBOOT
 	imply FASTBOOT
 	imply FAT_WRITE
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index a1554af647..64b3a61dca 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -120,7 +120,6 @@ config ROCKCHIP_RK3328
 	imply TPL_SERIAL_SUPPORT
 	imply SPL_SEPARATE_BSS
 	select DEBUG_UART_BOARD_INIT
-	select SYS_NS16550
 	help
 	  The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
 	  including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
@@ -155,7 +154,6 @@ config ROCKCHIP_RK3368
 	imply SPL_SERIAL_SUPPORT
 	imply TPL_SERIAL_SUPPORT
 	select DEBUG_UART_BOARD_INIT
-	select SYS_NS16550
 	select GICV2
 	help
 	  The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index d883efcf9b..85e2ceee7c 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -18,9 +18,6 @@
 #define CONFIG_SYS_TIMER_BASE		0x200440a0 /* TIMER5 */
 #define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMER_BASE + 8)
 
-#define CONFIG_SYS_NS16550
-#define CONFIG_SYS_NS16550_MEM32
-
 #define CONFIG_SYS_TEXT_BASE		0x60000000
 #define CONFIG_SYS_INIT_SP_ADDR		0x60100000
 #define CONFIG_SYS_LOAD_ADDR		0x60800800
diff --git a/include/configs/rk3066_common.h b/include/configs/rk3066_common.h
index 5ed44e2073..8d5f13b35f 100644
--- a/include/configs/rk3066_common.h
+++ b/include/configs/rk3066_common.h
@@ -30,7 +30,6 @@
 #define CONFIG_SYS_INIT_SP_ADDR		0x78000000
 #define CONFIG_SYS_LOAD_ADDR		0x70800800
 
-#define CONFIG_SYS_NS16550_MEM32
 #define CONFIG_BOUNCE_BUFFER
 #define CONFIG_SPL_FRAMEWORK
 
diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h
index 3696b71960..f4798859c4 100644
--- a/include/configs/rk3128_common.h
+++ b/include/configs/rk3128_common.h
@@ -19,8 +19,6 @@
 #define CONFIG_SYS_TIMER_BASE		0x200440a0 /* TIMER5 */
 #define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMER_BASE + 8)
 
-#define CONFIG_SYS_NS16550_MEM32
-
 #define CONFIG_SYS_TEXT_BASE		0x60000000
 #define CONFIG_SYS_INIT_SP_ADDR		0x60100000
 #define CONFIG_SYS_LOAD_ADDR		0x60800800
diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h
index 0fde4cc985..91e8e5c259 100644
--- a/include/configs/rk3188_common.h
+++ b/include/configs/rk3188_common.h
@@ -22,8 +22,6 @@
 #define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMER_BASE + 8)
 #define CONFIG_SYS_TIMER_COUNTS_DOWN
 
-#define CONFIG_SYS_NS16550_MEM32
-
 #ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM
 /* Bootrom will load u-boot binary to 0x60000000 once return from SPL */
 #define CONFIG_SYS_TEXT_BASE		0x60000000
diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h
index 2b3c4c23c3..ecfed899cf 100644
--- a/include/configs/rk322x_common.h
+++ b/include/configs/rk322x_common.h
@@ -19,7 +19,6 @@
 #define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMER_BASE + 8)
 
 #define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SYS_NS16550_MEM32
 #define CONFIG_SYS_TEXT_BASE		0x61000000
 #define CONFIG_SYS_INIT_SP_ADDR		0x61100000
 #define CONFIG_SYS_LOAD_ADDR		0x61800800
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index 32edcc549e..4b90a56e28 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -20,8 +20,6 @@
 #define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMER_BASE + 8)
 
 #define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SYS_NS16550_MEM32
-
 #ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM
 /* Bootrom will load u-boot binary to 0x0 once return from SPL */
 #define CONFIG_SYS_TEXT_BASE		0x00000000
diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index e8665d6ee9..1ecc4f7b53 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -15,8 +15,6 @@
 
 #define CONFIG_SPL_FRAMEWORK
 
-#define CONFIG_SYS_NS16550_MEM32
-
 #define CONFIG_SYS_TEXT_BASE		0x00200000
 #define CONFIG_SYS_INIT_SP_ADDR		0x00300000
 #define CONFIG_SYS_LOAD_ADDR		0x00800800
diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h
index a7f872366e..a8a12a3eae 100644
--- a/include/configs/rk3368_common.h
+++ b/include/configs/rk3368_common.h
@@ -22,13 +22,11 @@
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
-#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SYS_NS16550_MEM32
-
 #define CONFIG_SYS_TEXT_BASE		0x00200000
 #define CONFIG_SYS_INIT_SP_ADDR		0x00300000
 #define CONFIG_SYS_LOAD_ADDR		0x00280000
 
+#define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_TEXT_BASE            0x00000000
 #define CONFIG_SPL_MAX_SIZE             0x40000
 #define CONFIG_SPL_BSS_START_ADDR       0x400000
diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index be9bdd897a..fe17975d91 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -18,8 +18,6 @@
 #define CONFIG_SPL_SPI_LOAD
 #endif
 
-#define CONFIG_SYS_NS16550_MEM32
-
 #define CONFIG_SYS_TEXT_BASE		0x00200000
 #define CONFIG_SYS_INIT_SP_ADDR		0x00300000
 #define CONFIG_SYS_LOAD_ADDR		0x00800800
diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index 69052eb68b..c67daa265f 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -12,6 +12,8 @@
 #define CONFIG_SYS_ARCH_TIMER
 #define CONFIG_SYS_HZ_CLOCK	24000000
 
+#define CONFIG_SYS_NS16550_MEM32
+
 #ifndef CONFIG_SPL_BUILD
 #include <config_distro_defaults.h>
 
diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h
index 93bda24782..df6f952b6e 100644
--- a/include/configs/rv1108_common.h
+++ b/include/configs/rv1108_common.h
@@ -18,9 +18,6 @@
 #define CONFIG_SYS_TIMER_BASE		0x10350020
 #define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMER_BASE + 8)
 
-#define CONFIG_SYS_NS16550
-#define CONFIG_SYS_NS16550_MEM32
-
 #define CONFIG_SYS_SDRAM_BASE		0x60000000
 #define CONFIG_NR_DRAM_BANKS		1
 #define CONFIG_SYS_TEXT_BASE		CONFIG_SYS_SDRAM_BASE

commit 2d2f5f9a1fca2bae6aa7257aa9e95da2ba43c414
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Jan 20 21:30:44 2018 +0800

    rockchip: add common MACRO to enable sys arch timer
    
    All rockchip SoCs can use ARM arch timer, let's enable it in
    common header file
    
    Change-Id: Ic74024b34c72cfbeffa2288ef2b2375f5f141c2c
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h
index d33f581abf..a7f872366e 100644
--- a/include/configs/rk3368_common.h
+++ b/include/configs/rk3368_common.h
@@ -22,8 +22,6 @@
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
-#define COUNTER_FREQUENCY               24000000
-
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SYS_NS16550_MEM32
 
diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index a9a7905723..be9bdd897a 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -18,8 +18,6 @@
 #define CONFIG_SPL_SPI_LOAD
 #endif
 
-#define COUNTER_FREQUENCY               24000000
-
 #define CONFIG_SYS_NS16550_MEM32
 
 #define CONFIG_SYS_TEXT_BASE		0x00200000
diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index 8b892271e9..69052eb68b 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -8,6 +8,10 @@
 #define _ROCKCHIP_COMMON_H_
 #include <linux/sizes.h>
 
+#define COUNTER_FREQUENCY               24000000
+#define CONFIG_SYS_ARCH_TIMER
+#define CONFIG_SYS_HZ_CLOCK	24000000
+
 #ifndef CONFIG_SPL_BUILD
 #include <config_distro_defaults.h>
 

commit b95943f162d206d602461cad2f4df2e080f0352e
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Jan 20 21:22:35 2018 +0800

    rockchip: rk3288: move configure_l2ctlr back to rk3288
    
    The configure_l2ctlr() is used only by rk3288, do not need to
    locate in sys_proto.h
    
    Change-Id: I98f8cffdbc990e3fcf19f41ca53ff5fd25155e63
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/sys_proto.h b/arch/arm/include/asm/arch-rockchip/sys_proto.h
index e428d59336..3617ac2c60 100644
--- a/arch/arm/include/asm/arch-rockchip/sys_proto.h
+++ b/arch/arm/include/asm/arch-rockchip/sys_proto.h
@@ -7,27 +7,5 @@
 #ifndef _ASM_ARCH_SYS_PROTO_H
 #define _ASM_ARCH_SYS_PROTO_H
 
-#ifdef CONFIG_ROCKCHIP_RK3288
-#include <asm/armv7.h>
-
-static void configure_l2ctlr(void)
-{
-	uint32_t l2ctlr;
-
-	l2ctlr = read_l2ctlr();
-	l2ctlr &= 0xfffc0000; /* clear bit0~bit17 */
-
-	/*
-	* Data RAM write latency: 2 cycles
-	* Data RAM read latency: 2 cycles
-	* Data RAM setup latency: 1 cycle
-	* Tag RAM write latency: 1 cycle
-	* Tag RAM read latency: 1 cycle
-	* Tag RAM setup latency: 1 cycle
-	*/
-	l2ctlr |= (1 << 3 | 1 << 0);
-	write_l2ctlr(l2ctlr);
-}
-#endif /* CONFIG_ROCKCHIP_RK3288 */
 
 #endif /* _ASM_ARCH_SYS_PROTO_H */
diff --git a/arch/arm/mach-rockchip/rk3288/rk3288.c b/arch/arm/mach-rockchip/rk3288/rk3288.c
index eee90cfd53..bf4b799eba 100644
--- a/arch/arm/mach-rockchip/rk3288/rk3288.c
+++ b/arch/arm/mach-rockchip/rk3288/rk3288.c
@@ -3,6 +3,7 @@
  *
  * SPDX-License-Identifier:     GPL-2.0+
  */
+#include <asm/armv7.h>
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
 
@@ -20,10 +21,33 @@
 #define CPU_AXI_QOS_PRIORITY_LEVEL(h, l) \
 	((((h) & 3) << 8) | (((h) & 3) << 2) | ((l) & 3))
 
+#ifdef CONFIG_SPL_BUILD
+static void configure_l2ctlr(void)
+{
+	uint32_t l2ctlr;
+
+	l2ctlr = read_l2ctlr();
+	l2ctlr &= 0xfffc0000; /* clear bit0~bit17 */
+
+	/*
+	* Data RAM write latency: 2 cycles
+	* Data RAM read latency: 2 cycles
+	* Data RAM setup latency: 1 cycle
+	* Tag RAM write latency: 1 cycle
+	* Tag RAM read latency: 1 cycle
+	* Tag RAM setup latency: 1 cycle
+	*/
+	l2ctlr |= (1 << 3 | 1 << 0);
+	write_l2ctlr(l2ctlr);
+}
+#endif
+
 int arch_cpu_init(void)
 {
 	/* We do some SoC one time setting here. */
-
+#ifdef CONFIG_SPL_BUILD
+	configure_l2ctlr();
+#else
 	/* Use rkpwm by default */
 	rk_setreg(GRF_SOC_CON2, 1 << 0);
 
@@ -40,6 +64,7 @@ int arch_cpu_init(void)
 	/* Set vop qos to highest priority */
 	writel(CPU_AXI_QOS_PRIORITY_LEVEL(2, 2), VIO0_VOP_QOS_BASE);
 	writel(CPU_AXI_QOS_PRIORITY_LEVEL(2, 2), VIO1_VOP_QOS_BASE);
+#endif
 
 	return 0;
 }

commit 89c73a9ccaf2e308233ee1932e30ce737d932a68
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Jan 20 17:59:08 2018 +0800

    spl: use different BOARD_INIT MACRO for spl and tpl
    
    SPL and TPL may not always need spl_board_init() at the same time.
    
    Change-Id: I5f26956414f1d2ff3fd2fce11a4d7759de7804fe
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 7aae826e16..3e6f526e37 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -754,6 +754,13 @@ config TPL
 
 if TPL
 
+config TPL_BOARD_INIT
+	bool "Call board-specific initialization in TPL"
+	help
+	  If this option is enabled, U-Boot will call the function
+	  spl_board_init() from board_init_r(). This function should be
+	  provided by the board.
+
 config TPL_LDSCRIPT
         string "Linker script for the TPL stage"
 	depends on TPL
diff --git a/common/spl/spl.c b/common/spl/spl.c
index ac2c6ca1a5..ec6ac69819 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -395,7 +395,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 	timer_init();
 #endif
 
-#ifdef CONFIG_SPL_BOARD_INIT
+#if CONFIG_IS_ENABLED(BOARD_INIT)
 	spl_board_init();
 #endif
 

commit 8fcd17873cdba141621a1de1340b582c59595a35
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 22 16:41:14 2018 +0800

    rockchip: make u-boot-tpl.its common
    
    All rockchip can re-use this its file.
    
    Change-Id: I75b5a5b2865d861bc6b746ad42491b5596d269cc
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk322x/u-boot-tpl.lds b/arch/arm/mach-rockchip/u-boot-tpl.lds
similarity index 87%
rename from arch/arm/mach-rockchip/rk322x/u-boot-tpl.lds
rename to arch/arm/mach-rockchip/u-boot-tpl.lds
index 841c803e73..caeb40e104 100644
--- a/arch/arm/mach-rockchip/rk322x/u-boot-tpl.lds
+++ b/arch/arm/mach-rockchip/u-boot-tpl.lds
@@ -10,4 +10,4 @@
 #undef CONFIG_SPL_MAX_SIZE
 #define CONFIG_SPL_MAX_SIZE CONFIG_TPL_MAX_SIZE
 
-#include "../../cpu/u-boot-spl.lds"
+#include "../cpu/u-boot-spl.lds"
diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index 8c75cc4fdf..65089619d4 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -4,7 +4,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x800
 CONFIG_ROCKCHIP_RK322X=y
-CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/rk322x/u-boot-tpl.lds"
+CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl.lds"
 CONFIG_TPL_TEXT_BASE=0x10081000
 CONFIG_TPL_MAX_SIZE=28672
 CONFIG_TPL_STACK=0x10088000
diff --git a/configs/gva-rk3229_defconfig b/configs/gva-rk3229_defconfig
index f8a58e86df..9a27b69ade 100644
--- a/configs/gva-rk3229_defconfig
+++ b/configs/gva-rk3229_defconfig
@@ -4,7 +4,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x800
 CONFIG_ROCKCHIP_RK322X=y
-CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/rk322x/u-boot-tpl.lds"
+CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl.lds"
 CONFIG_TPL_TEXT_BASE=0x10081004
 CONFIG_TPL_MAX_SIZE=28672
 CONFIG_TPL_STACK=0x10088000

commit 48e66864c37e079786b0eeeffe62f1af0f29e1eb
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Jan 20 22:01:04 2018 +0800

    power: rk8xx: fix compile warning
    
    If CONFIG_SPL_BUILD is not enable, some functions are defined but
    not used.
    
    Change-Id: I1d67f8f5d69c92d2d26209a17d7a765a56b10e59
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/power/regulator/rk8xx.c b/drivers/power/regulator/rk8xx.c
index 355c945a3b..9b51c243dc 100644
--- a/drivers/power/regulator/rk8xx.c
+++ b/drivers/power/regulator/rk8xx.c
@@ -153,49 +153,6 @@ static int _buck_set_value(struct udevice *pmic, int buck, int uvolt)
 	return pmic_clrsetbits(pmic, info->vsel_reg, mask, val);
 }
 
-static int _buck_set_suspend_value(struct udevice *pmic, int buck, int uvolt)
-{
-	const struct rk8xx_reg_info *info = get_buck_reg(pmic, buck, uvolt);
-	int mask = info->vsel_mask;
-	int val;
-
-	if (info->vsel_sleep_reg == -1)
-		return -ENOSYS;
-	val = (uvolt - info->min_uv) / info->step_uv;
-	debug("%s: reg=%x, mask=%x, val=%x\n", __func__, info->vsel_sleep_reg, mask,
-	      val);
-
-	return pmic_clrsetbits(pmic, info->vsel_sleep_reg, mask, val);
-}
-
-static int _buck_get_enable(struct udevice *pmic, int buck)
-{
-	struct rk8xx_priv *priv = dev_get_priv(pmic);
-	uint mask = 0;
-	int ret = 0;
-
-	switch (priv->variant) {
-	case RK805_ID:
-	case RK816_ID:
-		if (buck >= 4) {
-			mask = 1 << (buck - 4);
-			ret = pmic_reg_read(pmic, RK816_REG_DCDC_EN2);
-		} else {
-			mask = 1 << buck;
-			ret = pmic_reg_read(pmic, RK816_REG_DCDC_EN1);
-		}
-		break;
-	case RK808_ID:
-	case RK818_ID:
-		mask = 1 << buck;
-		ret = pmic_reg_read(pmic, REG_DCDC_EN);
-		if (ret < 0)
-			return ret;
-		break;
-	}
-	return ret & mask ? true : false;
-}
-
 static int _buck_set_enable(struct udevice *pmic, int buck, bool enable)
 {
 	uint mask, value, en_reg;
@@ -241,6 +198,50 @@ static int _buck_set_enable(struct udevice *pmic, int buck, bool enable)
 	return ret;
 }
 
+#ifdef ENABLE_DRIVER
+static int _buck_set_suspend_value(struct udevice *pmic, int buck, int uvolt)
+{
+	const struct rk8xx_reg_info *info = get_buck_reg(pmic, buck, uvolt);
+	int mask = info->vsel_mask;
+	int val;
+
+	if (info->vsel_sleep_reg == -1)
+		return -ENOSYS;
+	val = (uvolt - info->min_uv) / info->step_uv;
+	debug("%s: reg=%x, mask=%x, val=%x\n", __func__, info->vsel_sleep_reg, mask,
+	      val);
+
+	return pmic_clrsetbits(pmic, info->vsel_sleep_reg, mask, val);
+}
+
+static int _buck_get_enable(struct udevice *pmic, int buck)
+{
+	struct rk8xx_priv *priv = dev_get_priv(pmic);
+	uint mask = 0;
+	int ret = 0;
+
+	switch (priv->variant) {
+	case RK805_ID:
+	case RK816_ID:
+		if (buck >= 4) {
+			mask = 1 << (buck - 4);
+			ret = pmic_reg_read(pmic, RK816_REG_DCDC_EN2);
+		} else {
+			mask = 1 << buck;
+			ret = pmic_reg_read(pmic, RK816_REG_DCDC_EN1);
+		}
+		break;
+	case RK808_ID:
+	case RK818_ID:
+		mask = 1 << buck;
+		ret = pmic_reg_read(pmic, REG_DCDC_EN);
+		if (ret < 0)
+			return ret;
+		break;
+	}
+	return ret & mask ? true : false;
+}
+
 static int _buck_set_suspend_enable(struct udevice *pmic, int buck, bool enable)
 {
 	uint mask;
@@ -268,7 +269,6 @@ static int _buck_set_suspend_enable(struct udevice *pmic, int buck, bool enable)
 	return ret;
 }
 
-#ifdef ENABLE_DRIVER
 static const struct rk8xx_reg_info *get_ldo_reg(struct udevice *pmic,
 					     int num)
 {

commit 3e0b6ad9e60089afee33804ed04e33b1b63236ca
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 22 16:10:06 2018 +0800

    rockchip: resrouce_img: fix compile warning
    
    Change-Id: I495e289b915dedbfe456d15d28fbc3da4c466fa6
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 44b625f5e9..b0fc451210 100644
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -153,9 +153,11 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 	int offset = 0;
 	int mode = 0;
 	struct blk_desc *dev_desc;
-	struct andr_img_hdr *andr_hdr;
 	disk_partition_t part_info;
+#ifdef CONFIG_ANDROID_BOOT_IMAGE
+	struct andr_img_hdr *andr_hdr;
 	char *boot_partname = PART_BOOT;
+#endif
 
 	if (hdr) {
 		content = (void *)((char *)hdr

commit 6f3eb47422df438f66a8297978800afdb5688995
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 22 16:55:57 2018 +0800

    fastboot: fix compile warning
    
    cb_flashing() should be in the same MACRO of cb_flash().
    
    Change-Id: Ic5641a1bf1fb0ab53ad98bdececd028f1e75a5e2
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 2ac1d6c404..0bf1908a4b 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -899,7 +899,6 @@ static void cb_flash(struct usb_ep *ep, struct usb_request *req)
 #endif
 	fastboot_tx_write_str(response);
 }
-#endif
 
 static void cb_flashing(struct usb_ep *ep, struct usb_request *req)
 {
@@ -943,6 +942,7 @@ static void cb_flashing(struct usb_ep *ep, struct usb_request *req)
 		fastboot_tx_write_str("FAILunknown flashing command");
 	}
 }
+#endif
 
 static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 {

commit 282f89a3b6b2f2b17f04563cefc96a715d8e0e2d
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Jan 19 15:59:25 2018 +0800

    rockchip: param: reverve 4MB for emmc
    
    Need to reserver first 4MB for EMMC while use the addr directly for NAND.
    
    Change-Id: I5c6309e41a9c287388cb6c0ff7ba5b1ef9ff29bf
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/disk/part_rkparm.c b/disk/part_rkparm.c
index b2c04e527d..686fa6ce29 100644
--- a/disk/part_rkparm.c
+++ b/disk/part_rkparm.c
@@ -28,7 +28,8 @@ struct rkparm_part {
 
 static LIST_HEAD(parts_head);
 
-static int rkparm_param_parse(char *param, struct list_head *parts_head)
+static int rkparm_param_parse(char *param, struct list_head *parts_head,
+			      struct blk_desc *dev_desc)
 {
 	struct rkparm_part *part;
 	const char *cmdline = strstr(param, "CMDLINE:");
@@ -37,7 +38,7 @@ static int rkparm_param_parse(char *param, struct list_head *parts_head)
 	const char *blkdev_def = strchr(blkdev_parts, ':') + 1;
 	char *next = (char *)blkdev_def;
 	char *pend;
-	int len;
+	int len, offset = 0;
 	unsigned long size, start;
 
 	if (!cmdline) {
@@ -68,7 +69,9 @@ static int rkparm_param_parse(char *param, struct list_head *parts_head)
 			printf("out of memory\n");
 			break;
 		}
-		part->start = start;
+		if (dev_desc->if_type != IF_TYPE_RKNAND)
+			offset = RK_PARAM_OFFSET;
+		part->start = start + offset;
 		part->size = size;
 		strncpy(part->name, next, len);
 		part->name[len] = '\0';
@@ -84,6 +87,7 @@ static int rkparm_init_param(struct blk_desc *dev_desc,
 				struct list_head *parts_head)
 {
 	struct rkparm_param *param;
+	int offset = 0;
 	int ret;
 
 	param = memalign(ARCH_DMA_MINALIGN, MAX_PARAM_SIZE);
@@ -92,14 +96,16 @@ static int rkparm_init_param(struct blk_desc *dev_desc,
 		return -ENOMEM;
 	}
 
-	ret = blk_dread(dev_desc, RK_PARAM_OFFSET, MAX_PARAM_SIZE >> 9,
-			(ulong *)param);
+	if (dev_desc->if_type != IF_TYPE_RKNAND)
+		offset = RK_PARAM_OFFSET;
+
+	ret = blk_dread(dev_desc, offset, MAX_PARAM_SIZE >> 9, (ulong *)param);
 	if (ret != (MAX_PARAM_SIZE >> 9)) {
 		printf("%s param read fail\n", __func__);
 		return -EINVAL;
 	}
 
-	return rkparm_param_parse(param->params, parts_head);
+	return rkparm_param_parse(param->params, parts_head, dev_desc);
 
 }
 

commit 534066e47b715080a2a36f980bc14a9e17aaa939
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 18 10:12:47 2018 +0800

    bootm: resever memory before any lmb_alloc()
    
    It's better to be done anyway and as early as possible.
    
    Change-Id: I681c93b97a8c3da681886b23ef350ecab8156f8e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/bootm.c b/common/bootm.c
index 9493a306cd..459063ead7 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -637,6 +637,9 @@ int do_bootm_states(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
 			ret = 0;
 	}
 
+	/* Resever memory before any lmb_alloc, as early as possible */
+	boot_fdt_add_mem_rsv_regions(&images->lmb, images->ft_addr);
+
 	/* Relocate the ramdisk */
 #ifdef CONFIG_SYS_BOOT_RAMDISK_HIGH
 	if (!ret && (states & BOOTM_STATE_RAMDISK)) {
@@ -652,7 +655,6 @@ int do_bootm_states(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
 #endif
 #if IMAGE_ENABLE_OF_LIBFDT && defined(CONFIG_LMB)
 	if (!ret && (states & BOOTM_STATE_FDT)) {
-		boot_fdt_add_mem_rsv_regions(&images->lmb, images->ft_addr);
 		ret = boot_relocate_fdt(&images->lmb, &images->ft_addr,
 					&images->ft_len);
 	}

commit df3eab812428e0411fd27660123aaef7b379af29
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 18 10:09:39 2018 +0800

    image-fdt: support "reserved-memory" for lmb
    
    Change-Id: Id628c47e2521226777d2391db1fee325592cf3f2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/image-fdt.c b/common/image-fdt.c
index 1e946467e3..d64763eb86 100644
--- a/common/image-fdt.c
+++ b/common/image-fdt.c
@@ -10,6 +10,7 @@
  */
 
 #include <common.h>
+#include <fdtdec.h>
 #include <fdt_support.h>
 #include <errno.h>
 #include <image.h>
@@ -78,10 +79,17 @@ void boot_fdt_add_mem_rsv_regions(struct lmb *lmb, void *fdt_blob)
 {
 	uint64_t addr, size;
 	int i, total;
+	int rsv_offset, offset;
+	fdt_size_t rsv_size;
+	fdt_addr_t rsv_addr;
+	/* we needn't repeat do reserve, do_bootm_linux would call this again */
+	static int rsv_done;
 
-	if (fdt_check_header(fdt_blob) != 0)
+	if (fdt_check_header(fdt_blob) != 0 || rsv_done)
 		return;
 
+	rsv_done = 1;
+
 	total = fdt_num_mem_rsv(fdt_blob);
 	for (i = 0; i < total; i++) {
 		if (fdt_get_mem_rsv(fdt_blob, i, &addr, &size) != 0)
@@ -90,6 +98,23 @@ void boot_fdt_add_mem_rsv_regions(struct lmb *lmb, void *fdt_blob)
 		       (unsigned long long)addr, (unsigned long long)size);
 		lmb_reserve(lmb, addr, size);
 	}
+
+	rsv_offset = fdt_subnode_offset(fdt_blob, 0, "reserved-memory");
+	if (rsv_offset == -FDT_ERR_NOTFOUND)
+		return;
+
+	for (offset = fdt_first_subnode(fdt_blob, rsv_offset);
+	     offset >= 0;
+	     offset = fdt_next_subnode(fdt_blob, offset)) {
+		rsv_addr = fdtdec_get_addr_size_auto_noparent(fdt_blob, offset,
+							      "reg", 0,
+							      &rsv_size, false);
+		if (rsv_addr == FDT_ADDR_T_NONE || !rsv_size)
+			continue;
+		printf("  'reserved-memory' region: addr=%llx size=%llx\n",
+			(unsigned long long)rsv_addr, (unsigned long long)rsv_size);
+		lmb_reserve(lmb, rsv_addr, rsv_size);
+	}
 }
 
 /**

commit 830c86d9927563733c3bc32eb89e2b5274c9df89
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jan 5 15:56:16 2018 +0800

    image-android: get real fdt addr in android_image_get_fdt
    
    Change-Id: Ie9c632c767962f8580bd9adf7727738f28479e4c
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/image-android.c b/common/image-android.c
index ac4ea46ab1..cc416e522d 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -12,6 +12,7 @@
 #include <errno.h>
 
 #define ANDROID_IMAGE_DEFAULT_KERNEL_ADDR	0x10008000
+#define ANDROID_ARG_FDT_FILENAME "rk-kernel.dtb"
 
 static char andr_tmp_str[ANDR_BOOT_ARGS_SIZE + 1];
 
@@ -162,9 +163,9 @@ int android_image_get_fdt(const struct andr_img_hdr *hdr,
 	*rd_data += hdr->page_size;
 	*rd_data += ALIGN(hdr->kernel_size, hdr->page_size);
 	*rd_data += ALIGN(hdr->ramdisk_size, hdr->page_size);
-
 #ifdef CONFIG_ROCKCHIP_BOOTLOADER
-	rockchip_get_resource_file(rd_data, "rk-kernel.dtb");
+	*rd_data += (rockchip_get_resource_file(*rd_data, ANDROID_ARG_FDT_FILENAME))
+			* 512;
 #endif
 	return 0;
 }

commit b7570de26ccf78cb0a1b49f958d5697bf607e236
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jan 5 09:20:05 2018 +0800

    android: modify the fdt_addr
    
    The env fdt_addr must be set as hex.
    
    Change-Id: I75ffeb832a4b44dcadafdcfecfc6bb282e495b83
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 3f562258f8..fdd0c92be7 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -451,7 +451,7 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 #else
 	ret = android_image_get_fdt((void *)load_address, &fdt_addr);
 	if (!ret)
-		env_set_ulong("fdt_addr", fdt_addr);
+		env_set_hex("fdt_addr", fdt_addr);
 #endif
 	android_bootloader_boot_kernel(load_address);
 

commit 996b899fff287c115ea9370f89259add19309780
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jan 5 15:50:29 2018 +0800

    rockchip: resc_img: fix err if initialize resource list
    
    In the function init_resource_list, if hdr is not NULL
    The content addr is the sum of hdr addr and
    (hdr->c_offset) * RK_BLK_SIZE. Then return 0 directly
    without free hdr and content.
    
    If hdr is NULL and gpt table is enabled, the parameter
    offset must be multiplied by RK_BLK_SIZE and be divided
    by RK_BLK_SIZE in function blk_read.
    
    Change-Id: Ib4120745af8aa4924464f85c8bb4b34daee98fa6
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 16eac39052..44b625f5e9 100644
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -158,8 +158,14 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 	char *boot_partname = PART_BOOT;
 
 	if (hdr) {
-		content = (void *)(hdr + hdr->c_offset);
-		goto init_list;
+		content = (void *)((char *)hdr
+				   + (hdr->c_offset) * RK_BLK_SIZE);
+		for (e_num = 0; e_num < hdr->e_nums; e_num++) {
+			size = e_num * hdr->e_blks * RK_BLK_SIZE;
+			entry = (struct resource_entry *)(content + size);
+			add_file_to_list(entry, offset);
+		}
+		return 0;
 	}
 
 	dev_desc = rockchip_get_bootdev();
@@ -192,10 +198,11 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 		debug("%s Load resource from %s senond pos\n",
 		      __func__, part_info.name);
 		/* Read resource from second offset */
-		offset = part_info.start;
+		offset = part_info.start * RK_BLK_SIZE;
 		offset += andr_hdr->page_size;
 		offset += ALIGN(andr_hdr->kernel_size, andr_hdr->page_size);
 		offset += ALIGN(andr_hdr->ramdisk_size, andr_hdr->page_size);
+		offset = offset / RK_BLK_SIZE;
 	} else {
 		/* Set mode to 0 in for recovery is not valid AOSP img */
 		mode = 0;
@@ -231,7 +238,6 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 	if (ret != (hdr->e_blks * hdr->e_nums))
 		goto err;
 
-init_list:
 	for (e_num = 0; e_num < hdr->e_nums; e_num++) {
 		size = e_num * hdr->e_blks * RK_BLK_SIZE;
 		entry = (struct resource_entry *)(content + size);

commit 5c9c1f991f5a2ea4241fba76235531b07b216fe1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jan 15 20:55:42 2018 +0800

    common: boot_rkimg: fix compile warnings
    
    Change-Id: Id7c49a187e789daa8af78c2f38982568f2f48e44
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 146792a367..de95d8c321 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -310,8 +310,8 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 		goto out;
 	}
 
-	printf("kernel   @ 0x%08lx (0x%08lx)\n", kernel_addr_r, kernel_size);
-	printf("ramdisk  @ 0x%08lx (0x%08lx)\n", ramdisk_addr_r, ramdisk_size);
+	printf("kernel   @ 0x%08lx (0x%08x)\n", kernel_addr_r, kernel_size);
+	printf("ramdisk  @ 0x%08lx (0x%08x)\n", ramdisk_addr_r, ramdisk_size);
 #if defined(CONFIG_ARM64)
 	char cmdbuf[64];
 	sprintf(cmdbuf, "booti 0x%lx 0x%lx:0x%lx 0x%lx",

commit 526c692b8eac4d705a15f7fd6c6d342c2424b229
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 16 11:47:08 2018 +0800

    env: add more debug message for env_update() and env_append()
    
    Change-Id: I0d798d91f2bc132accac882ccfeec76d2f6a747e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/cmd/nvedit.c b/cmd/nvedit.c
index cc90b77f9e..307ec60534 100644
--- a/cmd/nvedit.c
+++ b/cmd/nvedit.c
@@ -312,8 +312,11 @@ static int env_append(const char *varname, const char *varvalue)
 	if (oldvalue) {
 		len += strlen(oldvalue);
 		/* Exist ! */
-		if (strstr(oldvalue, varvalue))
+		if (strstr(oldvalue, varvalue)) {
+			debug("%s: '%s' is already exist in '%s'\n",
+			      __func__, varvalue, varname);
 			return 0;
+		}
 	}
 
 	newvalue = malloc(len + 2);
@@ -499,9 +502,11 @@ int env_update(const char *varname, const char *varvalue)
 		}
 
 		/* Not find, just append */
-		if (!match)
+		if (!match) {
+			debug("%s: append '%s' to the '%s' end\n",
+			      __func__, v_item, varname);
 			env_append(varname, v_item);
-
+		}
 		match = false;
 		free(v_item_tok);
 	}

commit b99d793163eedbb072e26f6e16063d77627f82f1
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Jan 17 15:43:09 2018 +0800

    rockchip: remove no use script
    
    We have move these script to common folder.
    
    Change-Id: Ieacd1d49fc481435602fec3de0747873df22c2b5
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/board/rockchip/evb_rk3229/fit_spl_optee.its b/board/rockchip/evb_rk3229/fit_spl_optee.its
deleted file mode 100644
index ed93d443f9..0000000000
--- a/board/rockchip/evb_rk3229/fit_spl_optee.its
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * Copyright (C) 2017 Rockchip Electronic Co.,Ltd
- *
- * Simple U-boot fit source file containing U-Boot, dtb and optee
- */
-
-/dts-v1/;
-
-/ {
-	description = "Simple image with OP-TEE support";
-	#address-cells = <1>;
-
-	images {
-		uboot@1 {
-			description = "U-Boot";
-			data = /incbin/("../../../u-boot-nodtb.bin");
-			type = "standalone";
-			arch = "arm";
-			compression = "none";
-			load = <0x61000000>;
-		};
-		optee@1 {
-			description = "ARM Trusted Firmware";
-			data = /incbin/("../../../tee.bin");
-			type = "firmware";
-			arch = "arm";
-			compression = "none";
-			load = <0x68400000>;
-			entry = <0x68400000>;
-		};
-		fdt@1 {
-			description = "rk3229 dtb";
-			data = /incbin/("../../../u-boot.dtb");
-			type = "flat_dt";
-			compression = "none";
-		};
-	};
-
-	configurations {
-		default = "conf@1";
-		conf@1 {
-			description = "RK3399 evb";
-			firmware = "uboot@1";
-			loadables = "optee@1";
-			fdt = "fdt@1";
-		};
-	};
-};
diff --git a/board/rockchip/evb_rk3328/mk_fit_atf.sh b/board/rockchip/evb_rk3328/mk_fit_atf.sh
deleted file mode 100755
index 192c303af0..0000000000
--- a/board/rockchip/evb_rk3328/mk_fit_atf.sh
+++ /dev/null
@@ -1,108 +0,0 @@
-#!/bin/sh
-#
-# script to generate FIT image source for rk3399 boards with
-# ARM Trusted Firmware and multiple device trees (given on the command line)
-#
-# usage: $0 <dt_name> [<dt_name> [<dt_name] ...]
-
-[ -z "$BL31" ] && BL31="bl31.elf"
-
-if [ ! -f $BL31 ]; then
-	echo "WARNING: BL31 file $BL31 NOT found, resulting binary is non-functional" >&2
-	BL31=/dev/null
-fi
-
-cat << __HEADER_EOF
-/dts-v1/;
-
-/ {
-	description = "Configuration to load ATF before U-Boot";
-	#address-cells = <1>;
-
-	images {
-		uboot@1 {
-			description = "U-Boot (64-bit)";
-			data = /incbin/("u-boot-nodtb.bin");
-			type = "standalone";
-			arch = "arm64";
-			compression = "none";
-			load = <0x00200000>;
-		};
-__HEADER_EOF
-
-atf_cnt=1
-
-for l in `readelf -l $BL31 | grep -A1 LOAD | gawk --non-decimal-data \
-	'{if (NR % 2) {printf "%d:0x%x:", $2,$4} else {printf "%d\n", $1}}'`
-do
-	offset=${l%%:*}
-	ll=${l#*:}
-	phy_offset=${ll%:*}
-	filesz=${ll##*:}
-
-	#echo "$offset/$phy_offset/$filesz"
-
-	of=bl31_${phy_offset}.bin
-	dd if=$BL31 of=$of bs=1 skip=$offset count=$filesz
-
-	out_string="${out_string}:${phy_offset}"
-
-	cat << __ATF1_EOF
-		atf@$atf_cnt {
-			description = "ARM Trusted Firmware";
-			data = /incbin/("$of");
-			type = "firmware";
-			arch = "arm64";
-			compression = "none";
-			load = <$phy_offset>;
-__ATF1_EOF
-	if [ "$atf_cnt" -eq 1 ]; then
-		cat << __ATF2_EOF
-			entry = <$phy_offset>;
-__ATF2_EOF
-		fi
-	cat << __ATF3_EOF
-		};
-__ATF3_EOF
-	atf_cnt=$((atf_cnt + 1))
-done
-
-cnt=1
-for dtname in $*
-do
-	cat << __FDT_IMAGE_EOF
-		fdt@$cnt {
-			description = "$(basename $dtname .dtb)";
-			data = /incbin/("$dtname");
-			type = "flat_dt";
-			compression = "none";
-		};
-__FDT_IMAGE_EOF
-	cnt=$((cnt+1))
-done
-
-cat << __CONF_HEADER_EOF
-	};
-	configurations {
-		default = "config@1";
-
-__CONF_HEADER_EOF
-
-cnt=1
-for dtname in $*
-do
-	cat << __CONF_SECTION_EOF
-		config@$cnt {
-			description = "$(basename $dtname .dtb)";
-			firmware = "uboot@1";
-			loadables = "atf@1","atf@2";
-			fdt = "fdt@1";
-		};
-__CONF_SECTION_EOF
-	cnt=$((cnt+1))
-done
-
-cat << __ITS_EOF
-	};
-};
-__ITS_EOF
diff --git a/board/rockchip/evb_rk3399/mk_fit_atf.sh b/board/rockchip/evb_rk3399/mk_fit_atf.sh
deleted file mode 100755
index 146550aab3..0000000000
--- a/board/rockchip/evb_rk3399/mk_fit_atf.sh
+++ /dev/null
@@ -1,110 +0,0 @@
-#!/bin/sh
-#
-# script to generate FIT image source for rk3399 boards with
-# ARM Trusted Firmware and multiple device trees (given on the command line)
-#
-# usage: $0 <dt_name> [<dt_name> [<dt_name] ...]
-
-[ -z "$BL31" ] && BL31="bl31.elf"
-
-if [ ! -f $BL31 ]; then
-	echo "WARNING: BL31 file $BL31 NOT found, resulting binary is non-functional" >&2
-	BL31=/dev/null
-fi
-
-#tools/mkimage -n rk3399 -T rksd -d spl/u-boot-spl.bin idbspl.img
-
-cat << __HEADER_EOF
-/dts-v1/;
-
-/ {
-	description = "Configuration to load ATF before U-Boot";
-	#address-cells = <1>;
-
-	images {
-		uboot@1 {
-			description = "U-Boot (64-bit)";
-			data = /incbin/("u-boot-nodtb.bin");
-			type = "standalone";
-			arch = "arm64";
-			compression = "none";
-			load = <0x00200000>;
-		};
-__HEADER_EOF
-
-atf_cnt=1
-
-for l in `readelf -l $BL31 | grep -A1 LOAD | gawk --non-decimal-data \
-	'{if (NR % 2) {printf "%d:0x%x:", $2,$4} else {printf "%d\n", $1}}'`
-do
-	offset=${l%%:*}
-	ll=${l#*:}
-	phy_offset=${ll%:*}
-	filesz=${ll##*:}
-
-	#echo "$offset/$phy_offset/$filesz"
-
-	of=rk3399bl31_${phy_offset}.bin
-	dd if=$BL31 of=$of bs=1 skip=$offset count=$filesz
-
-	out_string="${out_string}:${phy_offset}"
-
-	cat << __ATF1_EOF
-		atf@$atf_cnt {
-			description = "ARM Trusted Firmware";
-			data = /incbin/("$of");
-			type = "firmware";
-			arch = "arm64";
-			compression = "none";
-			load = <$phy_offset>;
-__ATF1_EOF
-	if [ "$atf_cnt" -eq 1 ]; then
-		cat << __ATF2_EOF
-			entry = <$phy_offset>;
-__ATF2_EOF
-		fi
-	cat << __ATF3_EOF
-		};
-__ATF3_EOF
-	atf_cnt=$((atf_cnt + 1))
-done
-
-cnt=1
-for dtname in $*
-do
-	cat << __FDT_IMAGE_EOF
-		fdt@$cnt {
-			description = "$(basename $dtname .dtb)";
-			data = /incbin/("$dtname");
-			type = "flat_dt";
-			compression = "none";
-		};
-__FDT_IMAGE_EOF
-	cnt=$((cnt+1))
-done
-
-cat << __CONF_HEADER_EOF
-	};
-	configurations {
-		default = "config@1";
-
-__CONF_HEADER_EOF
-
-cnt=1
-for dtname in $*
-do
-	cat << __CONF_SECTION_EOF
-		config@$cnt {
-			description = "$(basename $dtname .dtb)";
-			firmware = "uboot@1";
-			loadables = "atf@1","atf@2","atf@3";
-			fdt = "fdt@1";
-		};
-__CONF_SECTION_EOF
-	cnt=$((cnt+1))
-done
-
-cat << __ITS_EOF
-	};
-};
-__ITS_EOF

commit 5c23cf980b55ed9d4c7eefeb90c5d77baf37c4af
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Jan 16 15:54:06 2018 +0800

    rockchip: sheep-rk3368 remove ENV_SIZE
    
    The ENV_SIZE have moved into Kconfig, remove it.
    
    Change-Id: I3f9f0b8adaff7d9d566c5085b2738b0085feded5
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/sheep_rk3368.h b/include/configs/sheep_rk3368.h
index eac9755bba..4eb4fb0e2f 100644
--- a/include/configs/sheep_rk3368.h
+++ b/include/configs/sheep_rk3368.h
@@ -13,7 +13,6 @@
 #define KERNEL_LOAD_ADDR		0x280000
 #define DTB_LOAD_ADDR			0x5600000
 #define INITRD_LOAD_ADDR		0x5bf0000
-#define CONFIG_ENV_SIZE			0x2000
 
 #define CONFIG_CONSOLE_SCROLL_LINES	10
 

commit 7f732f5f7a7fda6aae147e62d8607288b71cd42f
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Jan 16 15:53:17 2018 +0800

    rockchip: remove no use BITS_PER_LONG
    
    Change-Id: I838bdab8fba05d784dce06cde11e492e225b23d7
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/edid.c b/common/edid.c
index adfe8f6952..517ac0b252 100644
--- a/common/edid.c
+++ b/common/edid.c
@@ -28,7 +28,6 @@
 #define EDID_EST_TIMINGS 16
 #define EDID_STD_TIMINGS 8
 #define EDID_DETAILED_TIMINGS 4
-#define BITS_PER_LONG 64
 #define BIT_WORD(nr)             ((nr) / BITS_PER_LONG)
 #define BITMAP_FIRST_WORD_MASK(start) (~0UL << ((start) & (BITS_PER_LONG - 1)))
 #define BITMAP_LAST_WORD_MASK(nbits) (~0UL >> (-(nbits) & (BITS_PER_LONG - 1)))

commit 3fcec1ad9c58694209e12f7234b9df1c812afd68
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Jan 16 15:52:08 2018 +0800

    rockchip: dts: rk3128: update pwm-cell for pwm0
    
    The backlight pwm-cell is 3.
    
    Change-Id: I6fc913189a996f257fbe70194985e7d691fb3bd3
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3128.dtsi b/arch/arm/dts/rk3128.dtsi
index fabb596fa3..e8ceb34b92 100644
--- a/arch/arm/dts/rk3128.dtsi
+++ b/arch/arm/dts/rk3128.dtsi
@@ -317,7 +317,7 @@
 	pwm0: pwm0@20050000 {
 		compatible = "rockchip,rk3128-pwm", "rockchip,rk3288-pwm";
 		reg = <0x20050000 0x10>;
-		#pwm-cells = <2>;
+		#pwm-cells = <3>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&pwm0_pin>;
 		clocks = <&cru PCLK_PWM>;

commit c85f17a61d8ffaff63ca627179af07b648b9677f
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Jan 16 15:48:47 2018 +0800

    Revert "rockchip: rk322x: speed up the emmc and the cpu."
    
    This reverts commit 4a872f4aa8369cafafa5dca780687b8552a7b5cb.
    rk3229 evb and echo can not work with ddr52 enable.
    
    Change-Id: Ia22b30ffe40de6f6e74e50ec5fd52e3715006de0
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk322x.h b/arch/arm/include/asm/arch-rockchip/cru_rk322x.h
index c93609d5ce..a7999ca5af 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk322x.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk322x.h
@@ -11,11 +11,11 @@
 #define MHz		1000000
 #define OSC_HZ		(24 * MHz)
 
-#define APLL_HZ		(816 * MHz)
+#define APLL_HZ		(600 * MHz)
 #define GPLL_HZ		(594 * MHz)
 
-#define CORE_PERI_HZ	204000000
-#define CORE_ACLK_HZ	408000000
+#define CORE_PERI_HZ	150000000
+#define CORE_ACLK_HZ	300000000
 
 #define BUS_ACLK_HZ	148500000
 #define BUS_HCLK_HZ	148500000
diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index a530c895a7..7155607e77 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -277,7 +277,6 @@ static int rockchip_dwmmc_probe(struct udevice *dev)
 	}
 #endif
 	dwmci_setup_cfg(&plat->cfg, host, priv->minmax[1], priv->minmax[0]);
-	plat->cfg.host_caps |= MMC_MODE_DDR_52MHz;
 	host->mmc = &plat->mmc;
 	host->mmc->priv = &priv->host;
 	host->mmc->dev = dev;

commit 4fd3025541215e15d4771577b6650d8e707873dc
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Nov 21 22:35:56 2017 +0100

    rockchip: remove duplicate CONFIG_ENV_SIZE definitions
    
    A few header files still have a definition of CONFIG_ENV_SIZE, causing
    warnings during buildman runs.  This removes the duplicate definitions
    from evb_px5.h, geekbox.h and rv1108_common.h.
    
    Change-Id: Icd605cebc96adaf3efcc59e6545cfb23633d29c0
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/evb_px5.h b/include/configs/evb_px5.h
index d008539eb1..4160187d50 100644
--- a/include/configs/evb_px5.h
+++ b/include/configs/evb_px5.h
@@ -9,8 +9,6 @@
 
 #include <configs/rk3368_common.h>
 
-#define CONFIG_ENV_SIZE			0x2000
-
 #define CONFIG_CONSOLE_SCROLL_LINES	10
 
 #endif
diff --git a/include/configs/geekbox.h b/include/configs/geekbox.h
index 7a707cb2a0..bb2ef9a31b 100644
--- a/include/configs/geekbox.h
+++ b/include/configs/geekbox.h
@@ -9,8 +9,6 @@
 
 #include <configs/rk3368_common.h>
 
-#define CONFIG_ENV_SIZE			0x2000
-
 #define CONFIG_CONSOLE_SCROLL_LINES		10
 
 #endif

commit 27569069df68f1e7bfc3280ca85dd3f509906a13
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Jan 16 10:39:11 2018 +0800

    rockchip: rk3328: sync defconfig after back port
    
    Change-Id: Ia1909ac6d477c1401cf229ebe57ffe343d411eb7
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index d4a00718c5..2e85295af9 100644
--- a/configs/evb-rk3328_defconfig
+++ b/configs/evb-rk3328_defconfig
@@ -3,31 +3,27 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
-CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 CONFIG_ROCKCHIP_RK3328=y
-CONFIG_TPL_SERIAL_PRESENT=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL_STACK_R_ADDR=0x600000
 CONFIG_DEFAULT_DEVICE_TREE="rk3328-evb"
 CONFIG_DEBUG_UART=y
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 # CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_GENERATOR="board/rockchip/evb_rk3328/mk_fit_atf.sh"
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_TPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_STACK_R=y
-CONFIG_SPL_ATF_SUPPORT=y
-CONFIG_TPL=y
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_TPL_BOOTROM_SUPPORT=y
 CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_TPL_SERIAL_PRESENT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=1
@@ -69,18 +65,16 @@ CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
-CONFIG_DM_RESET=y
 CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
+CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF130000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_DEBUG_UART_SKIP_INIT=y
-CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
-CONFIG_SPL_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y

commit 21d68a455c31d040ade3c2ac7f432cf13062c05c
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Jan 16 09:31:09 2018 +0800

    rockchip: rk3399: update with save defconfig
    
    Change-Id: I070833a72b6b80ab903b8ee4f38093cb1dece3b6
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index 32dd9bf697..a7b881cceb 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -10,12 +10,13 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_GENERATOR="board/rockchip/evb_rk3399/mk_fit_atf.sh"
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
-CONFIG_SPL_ATF_SUPPORT=y
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_FASTBOOT_BUF_ADDR=0x00800800
 CONFIG_FASTBOOT_BUF_SIZE=0x08000000
 CONFIG_FASTBOOT_FLASH=y
@@ -63,6 +64,7 @@ CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
+CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF1A0000
 CONFIG_DEBUG_UART_CLOCK=24000000
diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
index 3d90de90c6..f6b8a76aac 100644
--- a/configs/firefly-rk3399_defconfig
+++ b/configs/firefly-rk3399_defconfig
@@ -12,28 +12,20 @@ CONFIG_FIT=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
-CONFIG_FASTBOOT=y
-CONFIG_USB_FUNCTION_FASTBOOT=y
-CONFIG_CMD_FASTBOOT=y
-CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_FASTBOOT_BUF_ADDR=0x00800800
 CONFIG_FASTBOOT_BUF_SIZE=0x08000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
-CONFIG_SPL_ATF=y
-CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_CMD_BOOTZ=y
-CONFIG_FASTBOOT=y
-CONFIG_ANDROID_BOOTLOADER=y
-CONFIG_ANDROID_BOOT_IMAGE=y
-CONFIG_CMD_LOAD_ANDROID=y
-CONFIG_CMD_BOOT_ANDROID=y
 # CONFIG_CMD_IMLS is not set
-CONFIG_FASTBOOT=y
-CONFIG_FASTBOOT_BUF_ADDR=0x00800800
 CONFIG_CMD_GPT=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
@@ -78,7 +70,6 @@ CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
-CONFIG_SPL_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
@@ -87,6 +78,11 @@ CONFIG_USB_EHCI_GENERIC=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x18d1
+CONFIG_G_DNL_PRODUCT_NUM=0xd00d
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_ETHER_ASIX88179=y
@@ -95,20 +91,3 @@ CONFIG_USB_ETHER_RTL8152=y
 CONFIG_USB_ETHER_SMSC95XX=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_ERRNO_STR=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_DUALSPEED=y
-CONFIG_USB_GADGET_VBUS_DRAW=0
-CONFIG_USB_DWC3=y
-CONFIG_USB_DWC3_GADGET=y
-CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x18d1
-CONFIG_G_DNL_PRODUCT_NUM=0xd00d
-CONFIG_FASTBOOT=y
-CONFIG_CMD_FASTBOOT=y
-CONFIG_USB_FUNCTION_FASTBOOT=y
-CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=0
-CONFIG_FASTBOOT_BUF_ADDR=0x00800800
-CONFIG_FASTBOOT_BUF_SIZE=0x08000000
-CONFIG_CMD_USB_MASS_STORAGE=y

commit 74a0d3c69fca96de5a5ca49763fc5384163e15ac
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Jan 2 21:16:44 2018 +0100

    rockchip: firefly-rk3399: enable SPL_ATF_NO_PLATFORM_PARAM
    
    The Rockchip-released ATF for the Firefly apparently (i.e. Kever
    reported this) does not tolerate a FDT being passed as the platform
    parameter and will run into a hard stop.
    
    To work around this limitation in the ATF parameter handling, we
    enable SPL_ATF_NO_PLATFORM_PARAM (which will force passing NULL for
    the platform parameters).
    
    Note that this only affects this platform, as the ATF releases for the
    RK3368 and RK3399 have always either ignored the platform parameter
    (i.e. before the FDT-based parameters were supported) or support
    receiving a pointer to a FDT.
    
    Change-Id: I77c94b7cd073914c07419e0bad1fb199a53a0637
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
index 2fadc018ff..3d90de90c6 100644
--- a/configs/firefly-rk3399_defconfig
+++ b/configs/firefly-rk3399_defconfig
@@ -23,6 +23,7 @@ CONFIG_FASTBOOT_BUF_SIZE=0x08000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_FASTBOOT=y
 CONFIG_ANDROID_BOOTLOADER=y

commit 147f2cfcc53f39b81177c95c5b7c5094f08926b6
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 15 18:21:17 2018 +0800

    rockchip: rk322x: update defconfig after back port
    
    update text base, update its file
    
    Change-Id: I58c8b2b1b6743dd1a50e6387be8a1238c97a9a42
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index 32c52ca461..8c75cc4fdf 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -5,10 +5,12 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x800
 CONFIG_ROCKCHIP_RK322X=y
 CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/rk322x/u-boot-tpl.lds"
-CONFIG_TPL_TEXT_BASE=0x10081004
+CONFIG_TPL_TEXT_BASE=0x10081000
 CONFIG_TPL_MAX_SIZE=28672
 CONFIG_TPL_STACK=0x10088000
 CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_TPL_TINY_MEMSET=y
+CONFIG_USE_TINY_PRINTF=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
@@ -19,14 +21,14 @@ CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_SOURCE="board/rockchip/evb_rk3229/fit_spl_optee.its"
+CONFIG_SPL_FIT_SOURCE="arch/arm/mach-rockchip/fit_spl_optee.its"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
-CONFIG_SPL_OPTEE_SUPPORT=y
+CONFIG_SPL_OPTEE=y
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h
index d0e7fda38a..2b3c4c23c3 100644
--- a/include/configs/rk322x_common.h
+++ b/include/configs/rk322x_common.h
@@ -25,9 +25,6 @@
 #define CONFIG_SYS_LOAD_ADDR		0x61800800
 #define CONFIG_SPL_TEXT_BASE		0x60000000
 
-#define CONFIG_TPL_STACK		0x10088000
-#define CONFIG_TPL_TEXT_BASE		0x10081004
-
 #define GICD_BASE                 	0x32011000
 #define GICC_BASE                  	0x32012000
 

commit 6d8fffad992f63449f225c4fd87e0f507a6bd48a
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 15 18:19:04 2018 +0800

    rockchip: rk3229: enable stimer in tpl
    
    Change-Id: Iaa4fd73d0ea43d1ff5149749b9a72876913072f4
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk322x-board-tpl.c b/arch/arm/mach-rockchip/rk322x-board-tpl.c
index 278e9d1d64..a10a7a170a 100644
--- a/arch/arm/mach-rockchip/rk322x-board-tpl.c
+++ b/arch/arm/mach-rockchip/rk322x-board-tpl.c
@@ -24,13 +24,12 @@ u32 spl_boot_device(void)
 DECLARE_GLOBAL_DATA_PTR;
 
 #define GRF_BASE	0x11000000
-#define SGRF_BASE	0x10140000
-
-#define DEBUG_UART_BASE	0x11030000
+#define SECURE_TIMER_BASE	0x110d0020
+#define SGRF_DDR_CON0 0x10150000
 
 void board_debug_uart_init(void)
 {
-static struct rk322x_grf * const grf = (void *)GRF_BASE;
+	static struct rk322x_grf * const grf = (void *)GRF_BASE;
 	/* Enable early UART2 channel 1 on the RK322x */
 	rk_clrsetreg(&grf->gpio1b_iomux,
 		     GPIO1B1_MASK | GPIO1B2_MASK,
@@ -42,7 +41,14 @@ static struct rk322x_grf * const grf = (void *)GRF_BASE;
 		     CON_IOMUX_UART2SEL_21 << CON_IOMUX_UART2SEL_SHIFT);
 }
 
-#define SGRF_DDR_CON0 0x10150000
+void secure_timer_init(void)
+{
+	writel(0, SECURE_TIMER_BASE + 0x10);
+	writel(0xffffffff, SECURE_TIMER_BASE);
+	writel(0xffffffff, SECURE_TIMER_BASE + 4);
+	writel(1, SECURE_TIMER_BASE + 0x10);
+}
+
 void board_init_f(ulong dummy)
 {
 	struct udevice *dev;
@@ -65,8 +71,9 @@ void board_init_f(ulong dummy)
 		hang();
 	}
 
+	secure_timer_init();
+	/* TODO: use arm generic timer instead for armv7 */
 	rockchip_timer_init();
-	printf("timer init done\n");
 	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
 	if (ret) {
 		printf("DRAM init failed: %d\n", ret);

commit 77159a9a962f225af0dd3a93734f9ab1fbb77ed2
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Jan 17 15:48:39 2018 +0800

    rockchip: inno-phy-usb2: update error to pr_err
    
    Change-Id: I31e321085c9435d11b1f5ba8295300036f1b550b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index 1fa59c501a..248162e042 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -216,30 +216,30 @@ static int rockchip_usb2phy_parse(struct rockchip_usb2phy *rphy)
 	}
 
 	if (!grf_base && !usbgrf_base) {
-		error("%s: get grf/usbgrf node failed\n", __func__);
+		pr_err("%s: get grf/usbgrf node failed\n", __func__);
 		return -EINVAL;
 	}
 
 	if (!ofnode_valid(u2phy_node)) {
-		error("%s: missing u2phy node\n", __func__);
+		pr_err("%s: missing u2phy node\n", __func__);
 		return -EINVAL;
 	}
 
 	if (ofnode_read_u32(u2phy_node, "reg", &reg)) {
-		error("%s: could not read reg from u2phy node\n", __func__);
+		pr_err("%s: could not read reg from u2phy node\n", __func__);
 		return -EINVAL;
 	}
 
 	ret = uclass_get_device_by_ofnode(UCLASS_PHY, u2phy_node, &udev);
 	if (ret) {
-		error("%s: get u2phy node failed: %d\n", __func__, ret);
+		pr_err("%s: get u2phy node failed: %d\n", __func__, ret);
 		return -ENODEV;
 	}
 
 	phy_cfgs =
 		(const struct rockchip_usb2phy_cfg *)dev_get_driver_data(udev);
 	if (!phy_cfgs) {
-		error("%s: unable to get phy_cfgs\n", __func__);
+		pr_err("%s: unable to get phy_cfgs\n", __func__);
 		return -EINVAL;
 	}
 
@@ -254,7 +254,7 @@ static int rockchip_usb2phy_parse(struct rockchip_usb2phy *rphy)
 	}
 
 	if (!rphy->phy_cfg) {
-		error("%s: no phy-config can be matched\n", __func__);
+		pr_err("%s: no phy-config can be matched\n", __func__);
 		return -EINVAL;
 	}
 
@@ -336,7 +336,7 @@ int rockchip_chg_get_type(void)
 
 	ret = rockchip_usb2phy_parse(&rphy);
 	if (ret) {
-		error("%s: parse usb2phy failed %d\n", __func__, ret);
+		pr_err("%s: parse usb2phy failed %d\n", __func__, ret);
 		return ret;
 	}
 
@@ -429,7 +429,7 @@ void otg_phy_init(struct dwc2_udc *dev)
 
 	ret = rockchip_usb2phy_parse(&rphy);
 	if (ret) {
-		error("%s: parse usb2phy failed %d\n", __func__, ret);
+		pr_err("%s: parse usb2phy failed %d\n", __func__, ret);
 		return;
 	}
 

commit 099855e2922dab71b302dcd21a213f5b42127a95
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 6 09:22:42 2017 +0800

    spl: add support to booting with OP-TEE
    
    OP-TEE is an open source trusted OS, in armv7, its loading and
    running are like this:
    loading:
    - SPL load both OP-TEE and U-Boot
    running:
    - SPL run into OP-TEE in secure mode;
    - OP-TEE run into U-Boot in non-secure mode;
    
    More detail:
    https://github.com/OP-TEE/optee_os
    and search for 'boot arguments' for detail entry parameter in:
    core/arch/arm/kernel/generic_entry_a32.S
    
    Change-Id: I1344a35dd11bd69ca00e9b99909e1eb610648d86
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 32470d8ebee6a9c31a7a6b82704c486ef06cf549)

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 5dfffcafb4..7aae826e16 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -738,6 +738,13 @@ config SPL_ATF_NO_PLATFORM_PARAM
 
 	  If your ATF is affected, say Y.
 
+config SPL_OPTEE
+	bool "Support OP-TEE Trusted OS"
+	depends on ARM
+	help
+	  OP-TEE is an open source Trusted OS  which is loaded by SPL.
+	  More detail at: https://github.com/OP-TEE/optee_os
+
 config TPL
 	bool
 	depends on SUPPORT_TPL
diff --git a/common/spl/Makefile b/common/spl/Makefile
index 63db03b9bd..9918a2e6f1 100644
--- a/common/spl/Makefile
+++ b/common/spl/Makefile
@@ -23,7 +23,7 @@ obj-$(CONFIG_$(SPL_TPL_)UBI) += spl_ubi.o
 obj-$(CONFIG_$(SPL_TPL_)NET_SUPPORT) += spl_net.o
 obj-$(CONFIG_$(SPL_TPL_)MMC_SUPPORT) += spl_mmc.o
 obj-$(CONFIG_$(SPL_TPL_)ATF) += spl_atf.o
-obj-$(CONFIG_$(SPL_TPL_)OPTEE_SUPPORT) += spl_optee.o
+obj-$(CONFIG_$(SPL_TPL_)OPTEE) += spl_optee.o
 obj-$(CONFIG_$(SPL_TPL_)USB_SUPPORT) += spl_usb.o
 obj-$(CONFIG_$(SPL_TPL_)FAT_SUPPORT) += spl_fat.o
 obj-$(CONFIG_$(SPL_TPL_)EXT_SUPPORT) += spl_ext.o
diff --git a/common/spl/spl.c b/common/spl/spl.c
index b2bd7c91f6..ac2c6ca1a5 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -424,6 +424,13 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 		spl_invoke_atf(&spl_image);
 		break;
 #endif
+#if CONFIG_IS_ENABLED(OPTEE)
+	case IH_OS_OP_TEE:
+		debug("Jumping to U-Boot via OP-TEE\n");
+		spl_optee_entry(NULL, NULL, (void *)spl_image.fdt_addr,
+				(void *)spl_image.entry_point);
+		break;
+#endif
 #ifdef CONFIG_SPL_OS_BOOT
 	case IH_OS_LINUX:
 		debug("Jumping to Linux\n");
@@ -438,6 +445,8 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 	debug("SPL malloc() used %#lx bytes (%ld KB)\n", gd->malloc_ptr,
 	      gd->malloc_ptr / 1024);
 #endif
+
+	debug("loaded - jumping to U-Boot...\n");
 #ifdef CONFIG_BOOTSTAGE_STASH
 	int ret;
 
@@ -448,11 +457,6 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 		debug("Failed to stash bootstage: err=%d\n", ret);
 #endif
 
-	if (CONFIG_IS_ENABLED(OPTEE_SUPPORT)) {
-		debug("loaded - jumping to U-Boot via OP-TEE.\n");
-		spl_optee_entry(0, 0, 0, (void *)spl_image.entry_point);
-	}
-
 	debug("loaded - jumping to U-Boot...\n");
 	spl_board_prepare_for_boot();
 	jump_to_image_no_args(&spl_image);
diff --git a/include/spl.h b/include/spl.h
index b0a86f2b72..1475bb0e8c 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -278,10 +278,14 @@ void spl_invoke_atf(struct spl_image_info *spl_image);
 
 /**
  * spl_optee_entry - entry function for optee
- * entry arg0, pagestore
- * entry arg1, (ARMv7 standard bootarg #1)
- * entry arg2, device tree address, (ARMv7 standard bootarg #2)
- * entry arg3, non-secure entry address (ARMv7 bootarg #0)
+ *
+ * args defind in op-tee project
+ * https://github.com/OP-TEE/optee_os/
+ * core/arch/arm/kernel/generic_entry_a32.S
+ * @arg0: pagestore
+ * @arg1: (ARMv7 standard bootarg #1)
+ * @arg2: device tree address, (ARMv7 standard bootarg #2)
+ * @arg3: non-secure entry address (ARMv7 bootarg #0)
  */
 void spl_optee_entry(void *arg0, void *arg1, void *arg2, void *arg3);
 

commit 820a0a1278aae32fabbc01613cffadf46c8c90a2
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Dec 18 20:47:48 2017 +0800

    UPSTREAM: image: add os type for OP-TEE
    
    OP-TEE is an open source trust OS maintained here:
    https://github.com/OP-TEE/optee_os
    
    Series-changes: 2
    - Add new image type like ATF
    
    Change-Id: Idaae12027be1f8a3252d2f9ad2ee689b6dfcb3ad
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 8f7658998ba3ba4338344cee1d235bf090a1dd94)

diff --git a/common/image.c b/common/image.c
index af8ba7312a..3667e86857 100644
--- a/common/image.c
+++ b/common/image.c
@@ -91,6 +91,7 @@ static const table_entry_t uimage_arch[] = {
 
 static const table_entry_t uimage_os[] = {
 	{	IH_OS_INVALID,	"invalid",	"Invalid OS",		},
+	{       IH_OS_OP_TEE, "op-tee", "OP-TEE"  },
 	{       IH_OS_ARM_TRUSTED_FIRMWARE, "arm-trusted-firmware", "ARM Trusted Firmware"  },
 	{	IH_OS_LINUX,	"linux",	"Linux",		},
 #if defined(CONFIG_LYNXKDI) || defined(USE_HOSTCC)
diff --git a/include/image.h b/include/image.h
index b9e43ad45c..29fdf9c13b 100644
--- a/include/image.h
+++ b/include/image.h
@@ -153,6 +153,7 @@ enum {
 	IH_OS_PLAN9,			/* Plan 9	*/
 	IH_OS_OPENRTOS,		/* OpenRTOS	*/
 	IH_OS_ARM_TRUSTED_FIRMWARE,     /* ARM Trusted Firmware */
+	IH_OS_OP_TEE,			/* OP-TEE	*/
 
 	IH_OS_COUNT,
 };

commit 4bba5ee7dc8aa93036e61f882901ca800c004b7c
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Jan 2 21:16:43 2018 +0100

    spl: atf: add SPL_ATF_NO_PLATFORM_PARAM option
    
    While we expect to call a pointer to a valid FDT (or NULL) as the
    platform parameter to an ATF, some ATF versions are not U-Boot aware
    and have an insufficiently robust (or an overzealour) parameter
    validation: either way, this may cause a hard-stop with uncooperative
    ATF versions.
    
    This change adds the option to suppress passing a platform parameter
    and will always pass NULL.
    
    Debug output from ATF w/ this option disabled (i.e. default):
          INFO:    plat_param_from_bl2: 0x291450
    Debug output from ATF w/ this option enabled:
          INFO:    plat_param_from_bl2: 0
    
    Change-Id: Ic13bf77aa509407563d10ad3ce790087f2d1dc07
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit d21fb63d772d32373600abeb7afcb53033e087a7)

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index d007c50341..5dfffcafb4 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -713,8 +713,8 @@ config SPL_ATF
 	bool "Support ARM Trusted Firmware"
 	depends on ARM64
 	help
-	  ATF(ARM Trusted Firmware) is a component for ARM arch64 which
-	  is loaded by SPL(which is considered as BL2 in ATF terminology).
+	  ATF(ARM Trusted Firmware) is a component for ARM AArch64 which
+	  is loaded by SPL (which is considered as BL2 in ATF terminology).
 	  More detail at: https://github.com/ARM-software/arm-trusted-firmware
 
 config SPL_OPTEE_SUPPORT
@@ -724,6 +724,20 @@ config SPL_OPTEE_SUPPORT
 	  OP-TEE is an open source Trusted OS  which is loaded by SPL.
 	  More detail at: https://github.com/OP-TEE/optee_os
 
+config SPL_ATF_NO_PLATFORM_PARAM
+        bool "Pass no platform parameter"
+	depends on SPL_ATF
+	help
+	  While we expect to call a pointer to a valid FDT (or NULL)
+	  as the platform parameter to an ATF, some ATF versions are
+	  not U-Boot aware and have an insufficiently robust parameter
+	  validation to gracefully reject a FDT being passed.
+
+	  If this option is enabled, the spl_atf os-type handler will
+	  always pass NULL for the platform parameter.
+
+	  If your ATF is affected, say Y.
+
 config TPL
 	bool
 	depends on SUPPORT_TPL
diff --git a/common/spl/spl_atf.c b/common/spl/spl_atf.c
index eaea95455f..5f9aa95e30 100644
--- a/common/spl/spl_atf.c
+++ b/common/spl/spl_atf.c
@@ -145,6 +145,7 @@ void spl_invoke_atf(struct spl_image_info *spl_image)
 {
 	uintptr_t  bl33_entry = CONFIG_SYS_TEXT_BASE;
 	void *blob = spl_image->fdt_addr;
+	uintptr_t platform_param = (uintptr_t)blob;
 	int node;
 
 	/*
@@ -158,9 +159,18 @@ void spl_invoke_atf(struct spl_image_info *spl_image)
 	if (node >= 0)
 		bl33_entry = spl_fit_images_get_entry(blob, node);
 
+	/*
+	 * If ATF_NO_PLATFORM_PARAM is set, we override the platform
+	 * parameter and always pass 0.  This is a workaround for
+	 * older ATF versions that have insufficiently robust (or
+	 * overzealous) argument validation.
+	 */
+	if (CONFIG_IS_ENABLED(ATF_NO_PLATFORM_PARAM))
+		platform_param = 0;
+
 	/*
 	 * We don't provide a BL3-2 entry yet, but this will be possible
 	 * using similar logic.
 	 */
-	bl31_entry(spl_image->entry_point, bl33_entry, (uintptr_t)blob);
+	bl31_entry(spl_image->entry_point, bl33_entry, platform_param);
 }

commit feba3cdb1a3c214a908dc71e115a52d14fdc671f
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Jan 2 18:43:37 2018 +0100

    UPSTREAM: rockchip: board: lion-rk3368: reduce env-size default to 8KiB
    
    We want to have the same configuration defaults for the RK3368-uQ7
    as for the RK3399-Q7: this change reduces the default env-size to
    8KiB to ensure that it does not overlap the boot-payload on SD/MMC
    configurations.
    
    References: commit fe529e6597c0 ("rockchip: rk3399-puma: reduce env size to 8kiB")
    Change-Id: Ia3fcfb0fed8422017cca7cb8c9d1e12025598c8c
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 224d261a16435389cc349b0e1640d489f117189d)

diff --git a/board/theobroma-systems/lion_rk3368/Kconfig b/board/theobroma-systems/lion_rk3368/Kconfig
index d7aa487abd..fddbf826df 100644
--- a/board/theobroma-systems/lion_rk3368/Kconfig
+++ b/board/theobroma-systems/lion_rk3368/Kconfig
@@ -12,4 +12,10 @@ config SYS_CONFIG_NAME
 config BOARD_SPECIFIC_OPTIONS # dummy
 	def_bool y
 
+config ENV_SIZE
+	default 0x2000
+
+config ENV_OFFSET
+	default 0x3c000 if ENV_IS_IN_SPI_FLASH
+
 endif

commit 843aa190cbd9b42cdd4d30b98232fe033b255ec1
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Sun Dec 24 13:14:12 2017 +0100

    UPSTREAM: dm: core: remove orphaned parameter description in platdata.h
    
    struct driver_info has no field 'flags'.
    
    Change-Id: Icedd7ae9bbb6fb62ce6a0d754d740c95f0eb0070
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 5da3b3d10497fdd7a5655d3872286610fe8489ed)

diff --git a/include/dm/platdata.h b/include/dm/platdata.h
index 488b2ab0ae..b73aa33093 100644
--- a/include/dm/platdata.h
+++ b/include/dm/platdata.h
@@ -23,7 +23,6 @@
  * @name:	Driver name
  * @platdata:	Driver-specific platform data
  * @platdata_size: Size of platform data structure
- * @flags:	Platform data flags (DM_FLAG_...)
  */
 struct driver_info {
 	const char *name;

commit 2b00ccbd41e0d8207e205b334b6092c6a67c8502
Author: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
Date:   Thu Dec 21 11:03:01 2017 +0100

    UPSTREAM: rockchip: rk3399-puma: reduce env size to 8kiB
    
    This commit changes the size of the enviroment (for the RK3399-Q7) to
    8kiB for all possible locations of the environment (i.e. even when the
    environment is saved to SD card).
    
    With the default of 32kiB, the environment overwrites the SPL
    stage which lives at 16kiB.
    
    Change-Id: Iafe513fc093669b51d108641c435c406a654c62b
    Signed-off-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    [Reworked commit-message:]
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit fe529e6597c00a98893e5d0ab00251cb50d457a7)

diff --git a/board/theobroma-systems/puma_rk3399/Kconfig b/board/theobroma-systems/puma_rk3399/Kconfig
index 80b3460d4c..8a94cbd9ed 100644
--- a/board/theobroma-systems/puma_rk3399/Kconfig
+++ b/board/theobroma-systems/puma_rk3399/Kconfig
@@ -13,7 +13,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	def_bool y
 
 config ENV_SIZE
-	default 0x2000 if ENV_IS_IN_SPI_FLASH
+	default 0x2000
 
 config ENV_OFFSET
 	default 0x3c000 if ENV_IS_IN_SPI_FLASH

commit 92671781a674b7dc8dc7b3a0f1770d6fb974d4fe
Author: Peng Fan <peng.fan@nxp.com>
Date:   Mon Dec 4 12:31:20 2017 +0800

    UPSTREAM: power: pmic.h: include dm/ofnode.h
    
    Include dm/ofnode.h.
    
    Change-Id: I44d76be779c10e354d012e46c591425bf0cb9a60
    Signed-off-by: Peng Fan <peng.fan@nxp.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Cc: Stefano Babic <sbabic@denx.de>
    Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit d56f6ca288c588b6a17edf7a4952e1bc3b56220c)

diff --git a/include/power/pmic.h b/include/power/pmic.h
index 980fd3e67d..8ba9809f03 100644
--- a/include/power/pmic.h
+++ b/include/power/pmic.h
@@ -11,6 +11,7 @@
 #ifndef __CORE_PMIC_H_
 #define __CORE_PMIC_H_
 
+#include <dm/ofnode.h>
 #include <i2c.h>
 #include <linux/list.h>
 #include <power/power_chrg.h>

commit 0e13c182e0b4ee5b7e5efee72614cd23f8a5e6fc
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Mon Dec 4 12:37:00 2017 +0900

    Move CONFIG_PANIC_HANG to Kconfig
    
    Freescale (NXP) boards have lots of defconfig files per board.
    I used "imply PANIC_HANG" for them.
    
    Change-Id: I56347810ee33ccd8bb3553b0ee95b858e827ce9b
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Reviewed-by: York Sun <york.sun@nxp.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 7e3caa81e0e9cc5e2beed4a3a1c334e2119f4498)

diff --git a/README b/README
index 9e90867255..fbb76cc307 100644
--- a/README
+++ b/README
@@ -2247,16 +2247,6 @@ The following options need to be configured:
 		currently only supports clearing the memory.
 
 - Error Recovery:
-		CONFIG_PANIC_HANG
-
-		Define this variable to stop the system in case of a
-		fatal error, so that you have to reset it manually.
-		This is probably NOT a good idea for an embedded
-		system where you want the system to reboot
-		automatically as fast as possible, but it may be
-		useful during development since you can try to debug
-		the conditions that lead to the situation.
-
 		CONFIG_NET_RETRY_COUNT
 
 		This variable defines the number of retries for
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index cdeef26fe5..5a63d92f0e 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -7,6 +7,7 @@ config ARCH_LS1012A
 	select SYS_FSL_ERRATUM_A010315
 	select ARCH_EARLY_INIT_R
 	select BOARD_EARLY_INIT_F
+	imply PANIC_HANG
 
 config ARCH_LS1043A
 	bool
@@ -82,6 +83,7 @@ config ARCH_LS2080A
 	select SYS_FSL_ERRATUM_A009203
 	select ARCH_EARLY_INIT_R
 	select BOARD_EARLY_INIT_F
+	imply PANIC_HANG
 
 config FSL_LSCH2
 	bool
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index 92187d371b..9de4e04598 100644
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -29,6 +29,7 @@ config TARGET_B4420QDS
 	select ARCH_B4420
 	select SUPPORT_SPL
 	select PHYS_64BIT
+	imply PANIC_HANG
 
 config TARGET_B4860QDS
 	bool "Support B4860QDS"
@@ -36,6 +37,7 @@ config TARGET_B4860QDS
 	select BOARD_LATE_INIT if CHAIN_OF_TRUST
 	select SUPPORT_SPL
 	select PHYS_64BIT
+	imply PANIC_HANG
 
 config TARGET_BSC9131RDB
 	bool "Support BSC9131RDB"
@@ -57,6 +59,7 @@ config TARGET_C29XPCIE
 	select SUPPORT_SPL
 	select SUPPORT_TPL
 	select PHYS_64BIT
+	imply PANIC_HANG
 
 config TARGET_P3041DS
 	bool "Support P3041DS"
@@ -64,6 +67,7 @@ config TARGET_P3041DS
 	select ARCH_P3041
 	select BOARD_LATE_INIT if CHAIN_OF_TRUST
 	imply CMD_SATA
+	imply PANIC_HANG
 
 config TARGET_P4080DS
 	bool "Support P4080DS"
@@ -71,6 +75,7 @@ config TARGET_P4080DS
 	select ARCH_P4080
 	select BOARD_LATE_INIT if CHAIN_OF_TRUST
 	imply CMD_SATA
+	imply PANIC_HANG
 
 config TARGET_P5020DS
 	bool "Support P5020DS"
@@ -78,6 +83,7 @@ config TARGET_P5020DS
 	select ARCH_P5020
 	select BOARD_LATE_INIT if CHAIN_OF_TRUST
 	imply CMD_SATA
+	imply PANIC_HANG
 
 config TARGET_P5040DS
 	bool "Support P5040DS"
@@ -85,6 +91,7 @@ config TARGET_P5040DS
 	select ARCH_P5040
 	select BOARD_LATE_INIT if CHAIN_OF_TRUST
 	imply CMD_SATA
+	imply PANIC_HANG
 
 config TARGET_MPC8536DS
 	bool "Support MPC8536DS"
@@ -100,6 +107,7 @@ config TARGET_MPC8541CDS
 config TARGET_MPC8544DS
 	bool "Support MPC8544DS"
 	select ARCH_MPC8544
+	imply PANIC_HANG
 
 config TARGET_MPC8548CDS
 	bool "Support MPC8548CDS"
@@ -123,6 +131,7 @@ config TARGET_MPC8572DS
 # Use DDR3 controller with DDR2 DIMMs on this board
 	select SYS_FSL_DDRC_GEN3
 	imply SCSI
+	imply PANIC_HANG
 
 config TARGET_P1010RDB_PA
 	bool "Support P1010RDB_PA"
@@ -132,6 +141,7 @@ config TARGET_P1010RDB_PA
 	select SUPPORT_TPL
 	imply CMD_EEPROM
 	imply CMD_SATA
+	imply PANIC_HANG
 
 config TARGET_P1010RDB_PB
 	bool "Support P1010RDB_PB"
@@ -141,6 +151,7 @@ config TARGET_P1010RDB_PB
 	select SUPPORT_TPL
 	imply CMD_EEPROM
 	imply CMD_SATA
+	imply PANIC_HANG
 
 config TARGET_P1022DS
 	bool "Support P1022DS"
@@ -153,6 +164,7 @@ config TARGET_P1023RDB
 	bool "Support P1023RDB"
 	select ARCH_P1023
 	imply CMD_EEPROM
+	imply PANIC_HANG
 
 config TARGET_P1020MBG
 	bool "Support P1020MBG-PC"
@@ -161,6 +173,7 @@ config TARGET_P1020MBG
 	select ARCH_P1020
 	imply CMD_EEPROM
 	imply CMD_SATA
+	imply PANIC_HANG
 
 config TARGET_P1020RDB_PC
 	bool "Support P1020RDB-PC"
@@ -169,6 +182,7 @@ config TARGET_P1020RDB_PC
 	select ARCH_P1020
 	imply CMD_EEPROM
 	imply CMD_SATA
+	imply PANIC_HANG
 
 config TARGET_P1020RDB_PD
 	bool "Support P1020RDB-PD"
@@ -177,6 +191,7 @@ config TARGET_P1020RDB_PD
 	select ARCH_P1020
 	imply CMD_EEPROM
 	imply CMD_SATA
+	imply PANIC_HANG
 
 config TARGET_P1020UTM
 	bool "Support P1020UTM"
@@ -185,6 +200,7 @@ config TARGET_P1020UTM
 	select ARCH_P1020
 	imply CMD_EEPROM
 	imply CMD_SATA
+	imply PANIC_HANG
 
 config TARGET_P1021RDB
 	bool "Support P1021RDB"
@@ -193,6 +209,7 @@ config TARGET_P1021RDB
 	select ARCH_P1021
 	imply CMD_EEPROM
 	imply CMD_SATA
+	imply PANIC_HANG
 
 config TARGET_P1024RDB
 	bool "Support P1024RDB"
@@ -201,6 +218,7 @@ config TARGET_P1024RDB
 	select ARCH_P1024
 	imply CMD_EEPROM
 	imply CMD_SATA
+	imply PANIC_HANG
 
 config TARGET_P1025RDB
 	bool "Support P1025RDB"
@@ -250,6 +268,7 @@ config TARGET_T1023RDB
 	select SUPPORT_SPL
 	select PHYS_64BIT
 	imply CMD_EEPROM
+	imply PANIC_HANG
 
 config TARGET_T1024RDB
 	bool "Support T1024RDB"
@@ -258,6 +277,7 @@ config TARGET_T1024RDB
 	select SUPPORT_SPL
 	select PHYS_64BIT
 	imply CMD_EEPROM
+	imply PANIC_HANG
 
 config TARGET_T1040QDS
 	bool "Support T1040QDS"
@@ -266,6 +286,7 @@ config TARGET_T1040QDS
 	select PHYS_64BIT
 	imply CMD_EEPROM
 	imply CMD_SATA
+	imply PANIC_HANG
 
 config TARGET_T1040RDB
 	bool "Support T1040RDB"
@@ -274,6 +295,7 @@ config TARGET_T1040RDB
 	select SUPPORT_SPL
 	select PHYS_64BIT
 	imply CMD_SATA
+	imply PANIC_HANG
 
 config TARGET_T1040D4RDB
 	bool "Support T1040D4RDB"
@@ -282,6 +304,7 @@ config TARGET_T1040D4RDB
 	select SUPPORT_SPL
 	select PHYS_64BIT
 	imply CMD_SATA
+	imply PANIC_HANG
 
 config TARGET_T1042RDB
 	bool "Support T1042RDB"
@@ -298,6 +321,7 @@ config TARGET_T1042D4RDB
 	select SUPPORT_SPL
 	select PHYS_64BIT
 	imply CMD_SATA
+	imply PANIC_HANG
 
 config TARGET_T1042RDB_PI
 	bool "Support T1042RDB_PI"
@@ -306,6 +330,7 @@ config TARGET_T1042RDB_PI
 	select SUPPORT_SPL
 	select PHYS_64BIT
 	imply CMD_SATA
+	imply PANIC_HANG
 
 config TARGET_T2080QDS
 	bool "Support T2080QDS"
@@ -322,6 +347,7 @@ config TARGET_T2080RDB
 	select SUPPORT_SPL
 	select PHYS_64BIT
 	imply CMD_SATA
+	imply PANIC_HANG
 
 config TARGET_T2081QDS
 	bool "Support T2081QDS"
@@ -336,12 +362,14 @@ config TARGET_T4160QDS
 	select SUPPORT_SPL
 	select PHYS_64BIT
 	imply CMD_SATA
+	imply PANIC_HANG
 
 config TARGET_T4160RDB
 	bool "Support T4160RDB"
 	select ARCH_T4160
 	select SUPPORT_SPL
 	select PHYS_64BIT
+	imply PANIC_HANG
 
 config TARGET_T4240QDS
 	bool "Support T4240QDS"
@@ -350,6 +378,7 @@ config TARGET_T4240QDS
 	select SUPPORT_SPL
 	select PHYS_64BIT
 	imply CMD_SATA
+	imply PANIC_HANG
 
 config TARGET_T4240RDB
 	bool "Support T4240RDB"
@@ -357,6 +386,7 @@ config TARGET_T4240RDB
 	select SUPPORT_SPL
 	select PHYS_64BIT
 	imply CMD_SATA
+	imply PANIC_HANG
 
 config TARGET_CONTROLCENTERD
 	bool "Support controlcenterd"
@@ -387,16 +417,19 @@ config TARGET_UCP1020
 	bool "Support uCP1020"
 	select ARCH_P1020
 	imply CMD_SATA
+	imply PANIC_HANG
 
 config TARGET_CYRUS_P5020
 	bool "Support Varisys Cyrus P5020"
 	select ARCH_P5020
 	select PHYS_64BIT
+	imply PANIC_HANG
 
 config TARGET_CYRUS_P5040
 	 bool "Support Varisys Cyrus P5040"
 	select ARCH_P5040
 	select PHYS_64BIT
+	imply PANIC_HANG
 
 endchoice
 
diff --git a/configs/TWR-P1025_defconfig b/configs/TWR-P1025_defconfig
index db60380fff..3389f9a63b 100644
--- a/configs/TWR-P1025_defconfig
+++ b/configs/TWR-P1025_defconfig
@@ -31,4 +31,5 @@ CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
+CONFIG_PANIC_HANG=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/UCP1020_SPIFLASH_defconfig b/configs/UCP1020_SPIFLASH_defconfig
index 968186ffda..ac949f7b6a 100644
--- a/configs/UCP1020_SPIFLASH_defconfig
+++ b/configs/UCP1020_SPIFLASH_defconfig
@@ -42,4 +42,5 @@ CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_FS_CRAMFS=y
+CONFIG_PANIC_HANG=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/UCP1020_defconfig b/configs/UCP1020_defconfig
index 5feae26e66..4b81cb437f 100644
--- a/configs/UCP1020_defconfig
+++ b/configs/UCP1020_defconfig
@@ -42,4 +42,5 @@ CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_FS_CRAMFS=y
+CONFIG_PANIC_HANG=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/adp-ae3xx_defconfig b/configs/adp-ae3xx_defconfig
index 9e1e5ecb47..30a1a0ae32 100644
--- a/configs/adp-ae3xx_defconfig
+++ b/configs/adp-ae3xx_defconfig
@@ -27,3 +27,4 @@ CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
 CONFIG_TIMER=y
 CONFIG_AE3XX_TIMER=y
+CONFIG_PANIC_HANG=y
diff --git a/configs/qemu-ppce500_defconfig b/configs/qemu-ppce500_defconfig
index e653bd4c9c..9540eb91f9 100644
--- a/configs/qemu-ppce500_defconfig
+++ b/configs/qemu-ppce500_defconfig
@@ -25,4 +25,5 @@ CONFIG_DOS_PARTITION=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_PANIC_HANG=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/tricorder_defconfig b/configs/tricorder_defconfig
index 1a0748913a..d7313ee948 100644
--- a/configs/tricorder_defconfig
+++ b/configs/tricorder_defconfig
@@ -37,4 +37,5 @@ CONFIG_LED_STATUS_CMD=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_SYS_NS16550=y
 CONFIG_BCH=y
+CONFIG_PANIC_HANG=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/tricorder_flash_defconfig b/configs/tricorder_flash_defconfig
index dba3b1d743..fe1994bb56 100644
--- a/configs/tricorder_flash_defconfig
+++ b/configs/tricorder_flash_defconfig
@@ -36,4 +36,5 @@ CONFIG_LED_STATUS_CMD=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_SYS_NS16550=y
 CONFIG_BCH=y
+CONFIG_PANIC_HANG=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/uniphier_ld4_sld8_defconfig b/configs/uniphier_ld4_sld8_defconfig
index 16fbe8adc5..d847a6827a 100644
--- a/configs/uniphier_ld4_sld8_defconfig
+++ b/configs/uniphier_ld4_sld8_defconfig
@@ -47,3 +47,4 @@ CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_GENERIC=y
 CONFIG_USB_STORAGE=y
+CONFIG_PANIC_HANG=y
diff --git a/configs/uniphier_pxs2_ld6b_defconfig b/configs/uniphier_pxs2_ld6b_defconfig
index c242776d9c..61a834944c 100644
--- a/configs/uniphier_pxs2_ld6b_defconfig
+++ b/configs/uniphier_pxs2_ld6b_defconfig
@@ -46,3 +46,4 @@ CONFIG_SPL_NAND_DENALI=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_STORAGE=y
+CONFIG_PANIC_HANG=y
diff --git a/configs/uniphier_v8_defconfig b/configs/uniphier_v8_defconfig
index f4f2ca0629..ca8a50017b 100644
--- a/configs/uniphier_v8_defconfig
+++ b/configs/uniphier_v8_defconfig
@@ -45,3 +45,4 @@ CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_GENERIC=y
 CONFIG_USB_STORAGE=y
+CONFIG_PANIC_HANG=y
diff --git a/configs/xpedite517x_defconfig b/configs/xpedite517x_defconfig
index d714c674f7..964ac491c1 100644
--- a/configs/xpedite517x_defconfig
+++ b/configs/xpedite517x_defconfig
@@ -26,4 +26,5 @@ CONFIG_DS4510=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
+CONFIG_PANIC_HANG=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/xpedite520x_defconfig b/configs/xpedite520x_defconfig
index b04063ae32..87d75d663a 100644
--- a/configs/xpedite520x_defconfig
+++ b/configs/xpedite520x_defconfig
@@ -27,4 +27,5 @@ CONFIG_CMD_PCA953X=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
+CONFIG_PANIC_HANG=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/xpedite537x_defconfig b/configs/xpedite537x_defconfig
index 657fdcc7fd..19a9c7079c 100644
--- a/configs/xpedite537x_defconfig
+++ b/configs/xpedite537x_defconfig
@@ -29,4 +29,5 @@ CONFIG_DS4510=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
+CONFIG_PANIC_HANG=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/xpedite550x_defconfig b/configs/xpedite550x_defconfig
index 1e132177fc..0b10acd283 100644
--- a/configs/xpedite550x_defconfig
+++ b/configs/xpedite550x_defconfig
@@ -29,4 +29,5 @@ CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
+CONFIG_PANIC_HANG=y
 CONFIG_OF_LIBFDT=y
diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h
index 661bc8bf58..b1b672547b 100644
--- a/include/configs/B4860QDS.h
+++ b/include/configs/B4860QDS.h
@@ -173,7 +173,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x00400000
 #define CONFIG_SYS_ALT_MEMTEST
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 /*
  *  Config the L3 Cache as L3 SRAM
diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h
index d6982d31a9..5f644a0b18 100644
--- a/include/configs/C29XPCIE.h
+++ b/include/configs/C29XPCIE.h
@@ -118,7 +118,6 @@
 
 #define CONFIG_SYS_MEMTEST_START	0x00200000
 #define CONFIG_SYS_MEMTEST_END		0x00400000
-#define CONFIG_PANIC_HANG
 
 /* DDR Setup */
 #define CONFIG_DDR_SPD
diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h
index 3319a6f958..ad339f1cb4 100644
--- a/include/configs/MPC8536DS.h
+++ b/include/configs/MPC8536DS.h
@@ -69,7 +69,6 @@
 
 #define CONFIG_SYS_MEMTEST_START 0x00010000	/* skip exception vectors */
 #define CONFIG_SYS_MEMTEST_END   0x1f000000	/* skip u-boot at top of RAM */
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 /*
  * Config the L2 Cache as L2 SRAM
diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h
index 2aea8928ee..8b8e1f51f6 100644
--- a/include/configs/MPC8544DS.h
+++ b/include/configs/MPC8544DS.h
@@ -46,7 +46,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 
 #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x00400000
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 #define CONFIG_SYS_CCSRBAR		0xe0000000
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR
diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h
index b277cdb1c6..634a9e1f82 100644
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -58,7 +58,6 @@
 
 #define CONFIG_SYS_MEMTEST_START	0x00000000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x7fffffff
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 /*
  * Config the L2 Cache as L2 SRAM
diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index 13edd0ac9c..45b302e768 100644
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -216,7 +216,6 @@
 
 #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x1fffffff
-#define CONFIG_PANIC_HANG		/* do not reset board on panic */
 
 /* DDR Setup */
 #define CONFIG_SYS_DDR_RAW_TIMING
diff --git a/include/configs/P1023RDB.h b/include/configs/P1023RDB.h
index 1b78a4f5dc..17ae6cfd40 100644
--- a/include/configs/P1023RDB.h
+++ b/include/configs/P1023RDB.h
@@ -52,8 +52,6 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_MEMTEST_START	0x01000000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x02000000
 
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
-
 /* Implement conversion of addresses in the LBC */
 #define CONFIG_SYS_LBC_LBCR		0x00000000
 #define CONFIG_SYS_LBC_LCRR		LCRR_CLKDIV_8
diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h
index 600823798c..7e3a9f1076 100644
--- a/include/configs/P2041RDB.h
+++ b/include/configs/P2041RDB.h
@@ -116,7 +116,6 @@ unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x00400000
 #define CONFIG_SYS_ALT_MEMTEST
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 /*
  *  Config the L3 Cache as L3 SRAM
diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h
index 158ad69c41..87ce2e8524 100644
--- a/include/configs/T102xQDS.h
+++ b/include/configs/T102xQDS.h
@@ -196,7 +196,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_MEMTEST_START	0x00200000 /* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x00400000
 #define CONFIG_SYS_ALT_MEMTEST
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 /*
  *  Config the L3 Cache as L3 SRAM
diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h
index fbb58f9ffa..7296d34803 100644
--- a/include/configs/T102xRDB.h
+++ b/include/configs/T102xRDB.h
@@ -219,7 +219,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_MEMTEST_START	0x00200000 /* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x00400000
 #define CONFIG_SYS_ALT_MEMTEST
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 /*
  *  Config the L3 Cache as L3 SRAM
diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h
index f6547fd5e5..3db7a2a462 100644
--- a/include/configs/T1040QDS.h
+++ b/include/configs/T1040QDS.h
@@ -127,7 +127,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x00400000
 #define CONFIG_SYS_ALT_MEMTEST
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 /*
  *  Config the L3 Cache as L3 SRAM
diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index f472c3c97b..0eeb5f68ee 100644
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -226,7 +226,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg
 #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x00400000
 #define CONFIG_SYS_ALT_MEMTEST
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 /*
  *  Config the L3 Cache as L3 SRAM
diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h
index 625130aafc..ad192fec8a 100644
--- a/include/configs/T4240RDB.h
+++ b/include/configs/T4240RDB.h
@@ -96,7 +96,6 @@
 #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x00400000
 #define CONFIG_SYS_ALT_MEMTEST
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 /*
  *  Config the L3 Cache as L3 SRAM
diff --git a/include/configs/UCP1020.h b/include/configs/UCP1020.h
index 902abc48ce..a526f83a6d 100644
--- a/include/configs/UCP1020.h
+++ b/include/configs/UCP1020.h
@@ -138,7 +138,6 @@
 
 #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x1fffffff
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 #define CONFIG_SYS_CCSRBAR		0xffe00000
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR
diff --git a/include/configs/adp-ae3xx.h b/include/configs/adp-ae3xx.h
index f47e45b433..f9daf313c5 100644
--- a/include/configs/adp-ae3xx.h
+++ b/include/configs/adp-ae3xx.h
@@ -21,7 +21,6 @@
 #define CONFIG_SKIP_TRUNOFF_WATCHDOG
 
 #define CONFIG_CMDLINE_EDITING
-#define CONFIG_PANIC_HANG
 
 #define CONFIG_SYS_ICACHE_OFF
 #define CONFIG_SYS_DCACHE_OFF
diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index 0dbf149725..a463235b38 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -128,7 +128,6 @@
 #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x00400000
 #define CONFIG_SYS_ALT_MEMTEST
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 /*
  *  Config the L3 Cache as L3 SRAM
diff --git a/include/configs/cyrus.h b/include/configs/cyrus.h
index 13e7c71609..4ce6681066 100644
--- a/include/configs/cyrus.h
+++ b/include/configs/cyrus.h
@@ -89,7 +89,6 @@
 #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x00400000
 #define CONFIG_SYS_ALT_MEMTEST
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 /*
  *  Config the L3 Cache as L3 SRAM
diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h
index 096799eb64..2b94cdf258 100644
--- a/include/configs/ls1012a_common.h
+++ b/include/configs/ls1012a_common.h
@@ -112,7 +112,6 @@
 #define CONFIG_AUTO_COMPLETE
 #define CONFIG_SYS_MAXARGS		64	/* max command args */
 
-#define CONFIG_PANIC_HANG
 #define CONFIG_SYS_BOOTM_LEN   (64 << 20)      /* Increase max gunzip size */
 
 #include <asm/arch/soc.h>
diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h
index f8978693a4..ea74f4a2d1 100644
--- a/include/configs/ls2080a_common.h
+++ b/include/configs/ls2080a_common.h
@@ -221,8 +221,6 @@ unsigned long long get_qixis_addr(void);
 #define CONFIG_AUTO_COMPLETE
 #define CONFIG_SYS_MAXARGS		64	/* max command args */
 
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
-
 #define CONFIG_SPL_BSS_START_ADDR	0x80100000
 #define CONFIG_SPL_BSS_MAX_SIZE		0x00100000
 #define CONFIG_SPL_FRAMEWORK
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 3c85f534e8..537a6ba196 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -295,7 +295,6 @@
 
 #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x1fffffff
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 #define CONFIG_SYS_CCSRBAR		0xffe00000
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR
diff --git a/include/configs/p1_twr.h b/include/configs/p1_twr.h
index 5a3245c473..6bc9bdc58b 100644
--- a/include/configs/p1_twr.h
+++ b/include/configs/p1_twr.h
@@ -71,7 +71,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 
 #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x1fffffff
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 #define CONFIG_SYS_CCSRBAR		0xffe00000
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR
diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h
index eb4cfae928..8b78f084e9 100644
--- a/include/configs/qemu-ppce500.h
+++ b/include/configs/qemu-ppce500.h
@@ -31,7 +31,6 @@
 #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x00400000
 #define CONFIG_SYS_ALT_MEMTEST
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 /* Needed to fill the ccsrbar pointer */
 
diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h
index 4938f43985..47b78a248b 100644
--- a/include/configs/t4qds.h
+++ b/include/configs/t4qds.h
@@ -54,7 +54,6 @@
 #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x00400000
 #define CONFIG_SYS_ALT_MEMTEST
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 /*
  *  Config the L3 Cache as L3 SRAM
diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h
index 46bb6f445e..b6574eaa52 100644
--- a/include/configs/tricorder.h
+++ b/include/configs/tricorder.h
@@ -103,7 +103,6 @@
 
 
 /* hang() the board on panic() */
-#define CONFIG_PANIC_HANG
 
 /* environment placement (for NAND), is different for FLASHCARD but does not
  * harm there */
diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h
index 1d3bf987c0..6de8129e0b 100644
--- a/include/configs/uniphier.h
+++ b/include/configs/uniphier.h
@@ -231,8 +231,6 @@
 /* for LD20; the last 64 byte is used for dynamic DDR PHY training */
 #define CONFIG_SYS_MEM_TOP_HIDE		64
 
-#define CONFIG_PANIC_HANG
-
 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_TEXT_BASE)
 
 /* only for SPL */
diff --git a/include/configs/xpedite517x.h b/include/configs/xpedite517x.h
index beedc9eda8..4326984b06 100644
--- a/include/configs/xpedite517x.h
+++ b/include/configs/xpedite517x.h
@@ -487,7 +487,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_LOAD_ADDR	0x2000000	/* default load address */
 #define CONFIG_CMDLINE_EDITING	1		/* Command-line editing */
 #define CONFIG_LOADADDR		0x1000000	/* default location for tftp and bootm */
-#define CONFIG_PANIC_HANG			/* do not reset board on panic */
 #define CONFIG_PREBOOT				/* enable preboot variable */
 #define CONFIG_INTEGRITY			/* support booting INTEGRITY OS */
 
diff --git a/include/configs/xpedite520x.h b/include/configs/xpedite520x.h
index f589d1db9b..5a56162e7c 100644
--- a/include/configs/xpedite520x.h
+++ b/include/configs/xpedite520x.h
@@ -291,7 +291,6 @@
 #define CONFIG_CMDLINE_EDITING	1		/* add command line history	*/
 #define CONFIG_AUTO_COMPLETE	1		/* add autocompletion support */
 #define CONFIG_LOADADDR		0x1000000	/* default location for tftp and bootm */
-#define CONFIG_PANIC_HANG			/* do not reset board on panic */
 #define CONFIG_PREBOOT				/* enable preboot variable */
 #define CONFIG_INTEGRITY			/* support booting INTEGRITY OS */
 #define CONFIG_INTERRUPTS		/* enable pci, srio, ddr interrupts */
diff --git a/include/configs/xpedite537x.h b/include/configs/xpedite537x.h
index d217eb3c7d..b26223794e 100644
--- a/include/configs/xpedite537x.h
+++ b/include/configs/xpedite537x.h
@@ -341,7 +341,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 #define CONFIG_CMDLINE_EDITING	1		/* add command line history	*/
 #define CONFIG_AUTO_COMPLETE	1		/* add autocompletion support */
 #define CONFIG_LOADADDR		0x1000000	/* default location for tftp and bootm */
-#define CONFIG_PANIC_HANG			/* do not reset board on panic */
 #define CONFIG_PREBOOT				/* enable preboot variable */
 #define CONFIG_INTEGRITY			/* support booting INTEGRITY OS */
 
diff --git a/include/configs/xpedite550x.h b/include/configs/xpedite550x.h
index b433224041..c2ef26749a 100644
--- a/include/configs/xpedite550x.h
+++ b/include/configs/xpedite550x.h
@@ -340,7 +340,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 #define CONFIG_CMDLINE_EDITING	1		/* add command line history	*/
 #define CONFIG_AUTO_COMPLETE	1		/* add autocompletion support */
 #define CONFIG_LOADADDR		0x1000000	/* default location for tftp and bootm */
-#define CONFIG_PANIC_HANG			/* do not reset board on panic */
 #define CONFIG_PREBOOT				/* enable preboot variable */
 #define CONFIG_INTEGRITY			/* support booting INTEGRITY OS */
 
diff --git a/include/configs/xtfpga.h b/include/configs/xtfpga.h
index 3050f17b81..3119f00797 100644
--- a/include/configs/xtfpga.h
+++ b/include/configs/xtfpga.h
@@ -130,10 +130,6 @@
 #define CONFIG_MX_CYCLIC
 #define CONFIG_SHOW_BOOT_PROGRESS
 
-#ifdef DEBUG
-#define CONFIG_PANIC_HANG		1	/* Require manual reboot */
-#endif
-
 
 /*=========================================*/
 /* FPGA Registers (board info and control) */
diff --git a/lib/Kconfig b/lib/Kconfig
index a9ce9fc82b..78e44aca0c 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -45,6 +45,16 @@ config USE_TINY_PRINTF
 
 	  The supported format specifiers are %c, %s, %u/%d and %x.
 
+config PANIC_HANG
+	bool "Do not reset the system on fatal error"
+	help
+	  Define this option to stop the system in case of a fatal error,
+	  so that you have to reset it manually. This is probably NOT a good
+	  idea for an embedded system where you want the system to reboot
+	  automatically as fast as possible, but it may be useful during
+	  development since you can try to debug the conditions that lead to
+	  the situation.
+
 config REGEX
 	bool "Enable regular expression support"
 	default y if NET

commit ce176305937686128422a7e8a4f64ee347d10cd5
Author: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Date:   Thu Nov 23 16:51:41 2017 +0530

    UPSTREAM: arm: Add support of updating dts before fix-up
    
    "ethernet" node fix-up for device tree happens before Linux boot.
    
    There can be requirement of updating "ethernet" node even before
    fix-up. So, add support of updating "ethernet" node.
    
    Change-Id: I5fcde8776f7f0f5c7323b1340c69d346c9c01833
    Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
    Reviewed-by: York Sun <york.sun@nxp.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 6bedf44714a145e09fddb8c5a03ada210b812ec9)

diff --git a/arch/arm/lib/bootm-fdt.c b/arch/arm/lib/bootm-fdt.c
index eaa817b9ac..fcc2a0e214 100644
--- a/arch/arm/lib/bootm-fdt.c
+++ b/arch/arm/lib/bootm-fdt.c
@@ -25,6 +25,13 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#ifdef CONFIG_FMAN_ENET
+__weak int fdt_update_ethernet_dt(void *blob)
+{
+	return 0;
+}
+#endif
+
 int arch_fixup_fdt(void *blob)
 {
 	int ret = 0;
@@ -64,5 +71,10 @@ int arch_fixup_fdt(void *blob)
 #endif
 #endif
 
+#ifdef CONFIG_FMAN_ENET
+	ret = fdt_update_ethernet_dt(blob);
+	if (ret)
+		return ret;
+#endif
 	return 0;
 }
diff --git a/include/fdt_support.h b/include/fdt_support.h
index e0f908636c..f00fadcddb 100644
--- a/include/fdt_support.h
+++ b/include/fdt_support.h
@@ -290,4 +290,7 @@ int fdt_overlay_apply_verbose(void *fdt, void *fdto);
 int fdtdec_get_int(const void *blob, int node, const char *prop_name,
 		int default_val);
 #endif
+#ifdef CONFIG_FMAN_ENET
+int fdt_update_ethernet_dt(void *blob);
+#endif
 #endif /* ifndef __FDT_SUPPORT_H */

commit 1ae99f24945cb357ac4793a3177f26cea7655435
Author: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Date:   Thu Nov 23 16:51:32 2017 +0530

    UPSTREAM: common: Fix-up MAC addr in dts by fetching env variable serially
    
    The MAC addresses get fixed in the device tree for "ethernet" nodes
    is by using trailing number behind "ethernet" found in "/aliases".
    It may not be necessary for the "ethernet" nodes to be sequential.
    There can be gaps in between or any node disabled
    
    So provide a support to fetch MAC addr sequentially from env
    and apply them to "ethernet" nodes in the order they appear in
    device tree only if "ethernet" is not "disabled"
    
    Change-Id: I1bd6544a2bfe5cd5d6708e249c1e07d44d6944d2
    Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
    Reviewed-by: York Sun <york.sun@nxp.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 24acb83d8f04e9a49f161c07d38da50c70e9f16d)

diff --git a/README b/README
index abf6136746..9e90867255 100644
--- a/README
+++ b/README
@@ -1673,6 +1673,15 @@ The following options need to be configured:
 
 		See doc/README.link-local for more information.
 
+ - MAC address from environment variables
+
+		FDT_SEQ_MACADDR_FROM_ENV
+
+		Fix-up device tree with MAC addresses fetched sequentially from
+		environment variables. This config work on assumption that
+		non-usable ethernet node of device-tree are either not present
+		or their status has been marked as "disabled".
+
  - CDP Options:
 		CONFIG_CDP_DEVICE_ID
 
diff --git a/common/fdt_support.c b/common/fdt_support.c
index 1a8ae95cc7..b9dfba7519 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -534,12 +534,16 @@ int fdt_fixup_memory(void *blob, u64 start, u64 size)
 
 void fdt_fixup_ethernet(void *fdt)
 {
-	int i, j, prop;
+	int i = 0, j, prop;
 	char *tmp, *end;
 	char mac[16];
 	const char *path;
 	unsigned char mac_addr[ARP_HLEN];
 	int offset;
+#ifdef FDT_SEQ_MACADDR_FROM_ENV
+	int nodeoff;
+	const struct fdt_property *fdt_prop;
+#endif
 
 	if (fdt_path_offset(fdt, "/aliases") < 0)
 		return;
@@ -552,7 +556,7 @@ void fdt_fixup_ethernet(void *fdt)
 		offset = fdt_first_property_offset(fdt,
 			fdt_path_offset(fdt, "/aliases"));
 		/* Select property number 'prop' */
-		for (i = 0; i < prop; i++)
+		for (j = 0; j < prop; j++)
 			offset = fdt_next_property_offset(fdt, offset);
 
 		if (offset < 0)
@@ -561,11 +565,16 @@ void fdt_fixup_ethernet(void *fdt)
 		path = fdt_getprop_by_offset(fdt, offset, &name, NULL);
 		if (!strncmp(name, "ethernet", 8)) {
 			/* Treat plain "ethernet" same as "ethernet0". */
-			if (!strcmp(name, "ethernet"))
+			if (!strcmp(name, "ethernet")
+#ifdef FDT_SEQ_MACADDR_FROM_ENV
+			 || !strcmp(name, "ethernet0")
+#endif
+			)
 				i = 0;
+#ifndef FDT_SEQ_MACADDR_FROM_ENV
 			else
 				i = trailing_strtol(name);
-
+#endif
 			if (i != -1) {
 				if (i == 0)
 					strcpy(mac, "ethaddr");
@@ -574,6 +583,14 @@ void fdt_fixup_ethernet(void *fdt)
 			} else {
 				continue;
 			}
+#ifdef FDT_SEQ_MACADDR_FROM_ENV
+			nodeoff = fdt_path_offset(fdt, path);
+			fdt_prop = fdt_get_property(fdt, nodeoff, "status",
+						    NULL);
+			if (fdt_prop && !strcmp(fdt_prop->data, "disabled"))
+				continue;
+			i++;
+#endif
 			tmp = env_get(mac);
 			if (!tmp)
 				continue;

commit bff05d39adf8c4eb325a79ede9e6bc6e6d7794aa
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Dec 15 11:15:04 2017 +0800

    rockchip: firefly-rk3399: update fit source
    
    use pythone script
    
    Change-Id: Ia09eef20b24bf936d02a7bdf0835023d1943009e
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
index bfdd0cf25e..2fadc018ff 100644
--- a/configs/firefly-rk3399_defconfig
+++ b/configs/firefly-rk3399_defconfig
@@ -10,7 +10,7 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3399-firefly"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_GENERATOR="board/rockchip/evb_rk3399/mk_fit_atf.sh"
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000

commit b287022126737edfdc32ce1dc58bccd206888cfa
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Dec 18 15:13:19 2017 +0800

    UPSTREAM: rockchip: update ROCKCHIP_SPL_RESERVE_IRAM to 0
    
    Only rk3399 atf need ROCKCHIP_SPL_RESERVE_IRAM. This commit updates
    its default setting to 0 so that other SoCs do not need to define it.
    
    Change-Id: I40e453451d5376ce15aede0859a7e5b336220094
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 8a8106f06639314f750c9f8dc2b72df3925f7fbf)

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index cb80f26ac3..a1554af647 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -248,7 +248,7 @@ config ROCKCHIP_BOOT_MODE_REG
 
 config ROCKCHIP_SPL_RESERVE_IRAM
 	hex "Size of IRAM reserved in SPL"
-	default 0x4000
+	default 0
 	help
 	  SPL may need reserve memory for firmware loaded by SPL, whose load
 	  address is in IRAM and may overlay with SPL text area if not
diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index 4557c2b032..32dd9bf697 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -4,6 +4,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_ROCKCHIP_RK3399=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb"
 CONFIG_DEBUG_UART=y
diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
index 979f6e303f..bfdd0cf25e 100644
--- a/configs/firefly-rk3399_defconfig
+++ b/configs/firefly-rk3399_defconfig
@@ -4,6 +4,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_ROCKCHIP_RK3399=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3399-firefly"
 CONFIG_DEBUG_UART=y

commit 9d33a67d51255c16e34ff9ac2d4d7fbe78d827d3
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Dec 18 15:05:41 2017 +0800

    UPSTREAM: rockchip: update boot0 hook
    
    Rockchip SoCs only need boot0 hook at SPL, and the U-Boot proper do not
    need it.
    
    The very beginning of U-Boot proper is different between armv7 and armv8:
    armv7 start with ARM_VECTORS while armv8 start with 'b reset'.
    
    Here is the map of very beginning for all cases:
    armv7 SPL: TAG(overwrite 'b 1f')+'b reset' + ARM_VECTORS
    armv7 U-Boot: ARM_VECTORS
    armv8 SPL: TAG(overwrite 'b 1f')+'b reset' + Reserved_iram(rk3399)
    armv8 U-Boot: 'b reset'
    
    Change-Id: I433ccd2e09f32fa3f1892953d67650a99dac39bc
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 270288544e12c7c98e4bc9a5b121517ba0a959d2)

diff --git a/arch/arm/include/asm/arch-rockchip/boot0.h b/arch/arm/include/asm/arch-rockchip/boot0.h
index af3a733e98..5d35c35c28 100644
--- a/arch/arm/include/asm/arch-rockchip/boot0.h
+++ b/arch/arm/include/asm/arch-rockchip/boot0.h
@@ -39,7 +39,12 @@
 entry_counter:
 	.word   0
 #endif
+
+#if (defined(CONFIG_SPL_BUILD) || defined(CONFIG_ARM64))
+	/* U-Boot proper of armv7 do not need this */
 	b reset
+#endif
+
 #if !defined(CONFIG_ARM64)
 	/*
 	 * For armv7, the addr '_start' will used as vector start address
@@ -50,6 +55,6 @@ _start:
 	ARM_VECTORS
 #endif
 
-#if defined(CONFIG_ROCKCHIP_RK3399) && defined(CONFIG_SPL_BUILD)
+#if defined(CONFIG_SPL_BUILD) && (CONFIG_ROCKCHIP_SPL_RESERVE_IRAM > 0)
 	.space CONFIG_ROCKCHIP_SPL_RESERVE_IRAM	/* space for the ATF data */
 #endif

commit 82c369d0de21ddb7646468b76e3de51a1214aa9b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Jan 5 17:25:05 2018 +0800

    Revert "rockchip: update boot0 hook"
    
    This reverts commit 7a4d1b540601cf674de4f85400b71859f689c9b3.
    
    Change-Id: I6f2f5ac92b83129a816a409f669c4ceb2c36b64b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/boot0.h b/arch/arm/include/asm/arch-rockchip/boot0.h
index 65b4213231..af3a733e98 100644
--- a/arch/arm/include/asm/arch-rockchip/boot0.h
+++ b/arch/arm/include/asm/arch-rockchip/boot0.h
@@ -26,6 +26,7 @@
 	 */
 	b 1f	 /* if overwritten, entry-address is at the next word */
 1:
+#endif
 #if CONFIG_IS_ENABLED(ROCKCHIP_EARLYRETURN_TO_BROM)
 	adr     r3, entry_counter
 	ldr	r0, [r3]
@@ -39,15 +40,6 @@ entry_counter:
 	.word   0
 #endif
 	b reset
-
-#if defined(CONFIG_ROCKCHIP_RK3399)
-	.space CONFIG_ROCKCHIP_SPL_RESERVE_IRAM	/* space for the ATF data */
-#endif
-
-#elif defined(CONFIG_ARM64) /* U-Boot for arm64 */
-	b reset
-#endif
-
 #if !defined(CONFIG_ARM64)
 	/*
 	 * For armv7, the addr '_start' will used as vector start address
@@ -57,3 +49,7 @@ entry_counter:
 _start:
 	ARM_VECTORS
 #endif
+
+#if defined(CONFIG_ROCKCHIP_RK3399) && defined(CONFIG_SPL_BUILD)
+	.space CONFIG_ROCKCHIP_SPL_RESERVE_IRAM	/* space for the ATF data */
+#endif

commit 8820f8d05bbaf1713c4f5904e2a8326e19fd711b
Author: Stephen Warren <swarren@nvidia.com>
Date:   Fri Nov 10 11:59:15 2017 +0100

    UPSTREAM: test/py: Setup variables based on HUSH selection
    
    After adding our small zynq uboot which has hush parser off same
    variable tests start to failed. Use quotes only when hush is enabled.
    
    Change-Id: I9aee385346129dee480aa04aa68f420aa172aaa7
    Reported-by: Michal Simek <michal.simek@xilinx.com>
    Signed-off-by: Stephen Warren <swarren@nvidia.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 3e229a83bd4190f99731992d3a56983f29313899)

diff --git a/test/py/tests/test_env.py b/test/py/tests/test_env.py
index b7f960c755..f8694017b4 100644
--- a/test/py/tests/test_env.py
+++ b/test/py/tests/test_env.py
@@ -125,7 +125,16 @@ def set_var(state_test_env, var, value):
         Nothing.
     """
 
-    state_test_env.u_boot_console.run_command('setenv %s "%s"' % (var, value))
+    bc = state_test_env.u_boot_console.config.buildconfig
+    if bc.get('config_hush_parser', None):
+        quote = '"'
+    else:
+        quote = ''
+        if ' ' in value:
+            pytest.skip('Space in variable value on non-Hush shell')
+
+    state_test_env.u_boot_console.run_command(
+        'setenv %s %s%s%s' % (var, quote, value, quote))
     state_test_env.env[var] = value
 
 def validate_empty(state_test_env, var):

commit 49a2ef1590e0031344e530783960938494572f36
Author: Klaus Goger <klaus.goger@theobroma-systems.com>
Date:   Mon Dec 11 17:56:08 2017 +0100

    UPSTREAM: rockchip: move CONFIG_ENV_SIZE and CONFIG_ENV_OFFSET to Kconfig
    
    This commit adds ENV_SIZE and ENV_OFFSET configuration items for
    ARCH_ROCKCHIP, but keeps these non-visible (i.e. not prompt is given).
    With these new items present, the configuration from the header files
    is moved to Kconfig.
    
    Keeping these non-visible is necessary to have the possibility to
    select new default values if CONFIG_IS_IN_* is changed (interactively
    or with oldconfig). Otherwise it will always be set to a previous
    value if used with a prompt.  As an example if we do a defconfig with
    CONFIG_IS_IN_MMC and change it to CONFIG_IS_IN_SPI_FLASH via
    menuconfig, ENV_SIZE and ENV_OFFSET will not be changed to the correct
    values as defconfig will already have set them to the default values
    of CONFIG_IS_IN_MMC in .config.
    
    Change-Id: I72dcb184406523a3a846322fd58ee7b9669d3390
    Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 81f53b0dafdfe9458f6d04fc5ec2732c2ea23a71)

diff --git a/board/theobroma-systems/puma_rk3399/Kconfig b/board/theobroma-systems/puma_rk3399/Kconfig
index a645590d78..80b3460d4c 100644
--- a/board/theobroma-systems/puma_rk3399/Kconfig
+++ b/board/theobroma-systems/puma_rk3399/Kconfig
@@ -12,4 +12,10 @@ config SYS_CONFIG_NAME
 config BOARD_SPECIFIC_OPTIONS # dummy
 	def_bool y
 
+config ENV_SIZE
+	default 0x2000 if ENV_IS_IN_SPI_FLASH
+
+config ENV_OFFSET
+	default 0x3c000 if ENV_IS_IN_SPI_FLASH
+
 endif
diff --git a/env/Kconfig b/env/Kconfig
index 25555ec2b8..9de5cae083 100644
--- a/env/Kconfig
+++ b/env/Kconfig
@@ -435,4 +435,22 @@ config ENV_UBI_VOLUME
 
 endif
 
+if ARCH_ROCKCHIP
+
+config ENV_OFFSET
+	hex
+	depends on !ENV_IS_IN_UBI
+	depends on !ENV_IS_NOWHERE
+	default 0x3f8000
+	help
+	  Offset from the start of the device (or partition)
+
+config ENV_SIZE
+	hex
+	default 0x8000
+	help
+	  Size of the environment storage area
+
+endif
+
 endmenu
diff --git a/include/configs/puma_rk3399.h b/include/configs/puma_rk3399.h
index 949f7568ba..0491299dc7 100644
--- a/include/configs/puma_rk3399.h
+++ b/include/configs/puma_rk3399.h
@@ -9,14 +9,6 @@
 
 #include <configs/rk3399_common.h>
 
-/*
- * SPL @ 32kB for ~130kB
- * ENV @ 240KB for 8kB
- * FIT payload (ATF, U-Boot, FDT) @ 256kB
- */
-#undef CONFIG_ENV_OFFSET
-#define CONFIG_ENV_OFFSET (240 * 1024)
-
 #if defined(CONFIG_ENV_IS_IN_MMC)
 #define CONFIG_SYS_MMC_ENV_DEV 1
 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index 7c341ec9b2..8b892271e9 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -84,12 +84,6 @@
 
 #endif
 
-/*
- * Rockchip SoCs use fixed ENV 32KB@(4MB-32KB)
- */
-#define CONFIG_ENV_OFFSET	(SZ_4M - SZ_32K)
-#define CONFIG_ENV_SIZE		SZ_32K
-
 #define CONFIG_DISPLAY_BOARDINFO_LATE
 
 #endif /* _ROCKCHIP_COMMON_H_ */

commit 83c6e7dea9b717bbfbeafad05a0f4174ed5a4571
Author: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
Date:   Fri Dec 15 16:23:14 2017 +0100

    UPSTREAM: rockchip: rk3399-puma: set gpio4cd iodomain to 1.8V
    
    The PCIe reset signal is connected to GPIO4_C6 on the Puma
    module. This pin is supplied by 1.8V, but the default iodomain
    setting is 3.0V and in this situation the pin is unable to go
    high.
    
    Linux assumes that this signal works in early boot
    as PCIe is probed before loading the iodomain driver.
    
    Make PCIe work in Linux by setting the gpio4cd iodomain to 1.8V.
    
    Change-Id: I131ca6147b490a89cc913ce398dc163c99efd9f2
    Signed-off-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit aa41220f6f7c79284ce5880e2533f81c125237a4)

diff --git a/board/theobroma-systems/puma_rk3399/puma-rk3399.c b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
index 27e3823d52..c6690fa069 100644
--- a/board/theobroma-systems/puma_rk3399/puma-rk3399.c
+++ b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
@@ -8,13 +8,17 @@
 #include <dm.h>
 #include <misc.h>
 #include <spl.h>
+#include <syscon.h>
 #include <usb.h>
 #include <dm/pinctrl.h>
 #include <dm/uclass-internal.h>
+#include <asm/io.h>
 #include <asm/gpio.h>
 #include <asm/setup.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/cru_rk3399.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/grf_rk3399.h>
 #include <asm/arch/periph.h>
 #include <power/regulator.h>
 #include <u-boot/sha256.h>
@@ -180,10 +184,25 @@ static void setup_serial(void)
 #endif
 }
 
+static void setup_iodomain(void)
+{
+	const u32 GRF_IO_VSEL_GPIO4CD_SHIFT = 3;
+	struct rk3399_grf_regs *grf =
+	    syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
+	/*
+	 * Set bit 3 in GRF_IO_VSEL so PCIE_RST# works (pin GPIO4_C6).
+	 * Linux assumes that PCIE_RST# works out of the box as it probes
+	 * PCIe before loading the iodomain driver.
+	 */
+	rk_setreg(&grf->io_vsel, 1 << GRF_IO_VSEL_GPIO4CD_SHIFT);
+}
+
 int misc_init_r(void)
 {
 	setup_serial();
 	setup_macaddr();
+	setup_iodomain();
 
 	return 0;
 }

commit 6a2ff3f44f263669ae5558d943402efa1714639a
Author: Stefan Roese <sr@denx.de>
Date:   Wed Nov 29 16:46:42 2017 +0100

    UPSTREAM: dm: blk: Use uclass_find_first/next_device() in blk_first/next_device()
    
    This patch changes the calls to uclass_first/next_device() in blk_first/
    next_device() to use uclass_find_first/next_device() instead. These functions
    don't prepare the devices, which is correct in this case.
    
    With this patch applied, the "usb storage" command now works again as
    expected:
    
    => usb storage
      Device 0: Vendor: SanDisk Rev: 1.00 Prod: Ultra
      Type: Removable Hard Disk
      Capacity: 58656.0 MB = 57.2 GB (120127488 x 512)
    
    Without this patch, it used to generate this buggy output:
    
    => usb storage
    Card did not respond to voltage select!
    mmc_init: -95, time 26
    No storage devices, perhaps not 'usb start'ed..?
    
    Change-Id: I5a037217a568d9e4eedb089bce5a283eadff1310
    Signed-off-by: Stefan Roese <sr@denx.de>
    Suggested-by: Simon Glass <sjg@chromium.org>
    Cc: Simon Glass <sjg@chromium.org>
    Cc: Bin Meng <bmeng.cn@gmail.com>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 8a5cbc065dfe1f258e3a7be823ea128184b90b5b)

diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
index f8c650357a..58cf81703e 100644
--- a/drivers/block/blk-uclass.c
+++ b/drivers/block/blk-uclass.c
@@ -10,6 +10,7 @@
 #include <dm.h>
 #include <dm/device-internal.h>
 #include <dm/lists.h>
+#include <dm/uclass-internal.h>
 
 static const char *if_typename_str[IF_TYPE_COUNT] = {
 	[IF_TYPE_IDE]		= "ide",
@@ -333,7 +334,7 @@ int blk_first_device(int if_type, struct udevice **devp)
 	struct blk_desc *desc;
 	int ret;
 
-	ret = uclass_first_device(UCLASS_BLK, devp);
+	ret = uclass_find_first_device(UCLASS_BLK, devp);
 	if (ret)
 		return ret;
 	if (!*devp)
@@ -342,7 +343,7 @@ int blk_first_device(int if_type, struct udevice **devp)
 		desc = dev_get_uclass_platdata(*devp);
 		if (desc->if_type == if_type)
 			return 0;
-		ret = uclass_next_device(devp);
+		ret = uclass_find_next_device(devp);
 		if (ret)
 			return ret;
 	} while (*devp);
@@ -358,7 +359,7 @@ int blk_next_device(struct udevice **devp)
 	desc = dev_get_uclass_platdata(*devp);
 	if_type = desc->if_type;
 	do {
-		ret = uclass_next_device(devp);
+		ret = uclass_find_next_device(devp);
 		if (ret)
 			return ret;
 		if (!*devp)

commit 29b6917330864130eedeb8ced0c636515b93c3f1
Author: Felix Brack <fb@ltec.ch>
Date:   Mon Nov 27 09:14:16 2017 +0100

    UPSTREAM: power: extend prefix match to regulator-name property
    
    This patch extends pmic_bind_children prefix matching. In addition to
    the node name the property regulator-name is used while trying to match
    prefixes. This allows assigning different drivers to regulator nodes
    named regulator@1 and regulator@10 for example.
    I have discarded the idea of using other properties then regulator-name
    as I do not see any benefit in using property compatible or even
    regulator-compatible. Of course I am open to change this if there are
    good reasons to do so.
    
    Change-Id: Ifedf2c0a51cb725ddb290ee9dfd54a3fea45df70
    Signed-off-by: Felix Brack <fb@ltec.ch>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit bf802f5d544f85c03b4097ab23d078be43c61855)

diff --git a/arch/sandbox/dts/sandbox_pmic.dtsi b/arch/sandbox/dts/sandbox_pmic.dtsi
index ce261b930e..acb4799396 100644
--- a/arch/sandbox/dts/sandbox_pmic.dtsi
+++ b/arch/sandbox/dts/sandbox_pmic.dtsi
@@ -75,4 +75,10 @@
 		regulator-min-microvolt = <3300000>;
 		regulator-max-microvolt = <3300000>;
 	};
+
+	no_match_by_nodename {
+		regulator-name = "buck_SUPPLY_1.5V";
+		regulator-min-microvolt = <1500000>;
+		regulator-max-microvolt = <1500000>;
+	};
 };
diff --git a/doc/device-tree-bindings/regulator/regulator.txt b/doc/device-tree-bindings/regulator/regulator.txt
index 918711eb4d..65b69c4278 100644
--- a/doc/device-tree-bindings/regulator/regulator.txt
+++ b/doc/device-tree-bindings/regulator/regulator.txt
@@ -2,7 +2,8 @@ Voltage/Current regulator
 
 Binding:
 The regulator devices don't use the "compatible" property. The binding is done
-by the prefix of regulator node's name. Usually the pmic I/O driver will provide
+by the prefix of regulator node's name, or, if this fails, by the prefix of the
+regulator's "regulator-name" property. Usually the pmic I/O driver will provide
 the array of 'struct pmic_child_info' with the prefixes and compatible drivers.
 The bind is done by calling function: pmic_bind_childs().
 Example drivers:
@@ -15,8 +16,19 @@ For the node name e.g.: "prefix[:alpha:]num { ... }":
 
 Example the prefix "ldo" will pass for: "ldo1", "ldo@1", "ldoreg@1, ...
 
+Binding by means of the node's name is preferred. However if the node names
+would produce ambiguous prefixes (like "regulator@1" and "regualtor@11") and you
+can't or do not want to change them then binding against the "regulator-name"
+property is possible. The syntax for the prefix of the "regulator-name" property
+is the same as the one for the regulator's node name.
+Use case: a regulator named "regulator@1" to be bound to a driver named
+"LDO_DRV" and a regulator named "regualator@11" to be bound to an other driver
+named "BOOST_DRV". Using prefix "regualtor@1" for driver matching would load
+the same driver for both regulators, hence the prefix is ambiguous.
+
 Optional properties:
-- regulator-name: a string, required by the regulator uclass
+- regulator-name: a string, required by the regulator uclass, used for driver
+                  binding if binding by node's name prefix fails
 - regulator-min-microvolt: a minimum allowed Voltage value
 - regulator-max-microvolt: a maximum allowed Voltage value
 - regulator-min-microamp: a minimum allowed Current value
diff --git a/drivers/power/pmic/pmic-uclass.c b/drivers/power/pmic/pmic-uclass.c
index 152a5ef6c5..5fb1ef5e60 100644
--- a/drivers/power/pmic/pmic-uclass.c
+++ b/drivers/power/pmic/pmic-uclass.c
@@ -26,6 +26,7 @@ int pmic_bind_children(struct udevice *pmic, ofnode parent,
 	struct driver *drv;
 	struct udevice *child;
 	const char *node_name;
+	const char *reg_name;
 	int bind_count = 0;
 	ofnode node;
 	int prefix_len;
@@ -44,8 +45,14 @@ int pmic_bind_children(struct udevice *pmic, ofnode parent,
 			debug("  - compatible prefix: '%s'\n", info->prefix);
 
 			prefix_len = strlen(info->prefix);
-			if (strncmp(info->prefix, node_name, prefix_len))
-				continue;
+			if (strncmp(info->prefix, node_name, prefix_len)) {
+				reg_name = ofnode_read_string(node,
+							      "regulator-name");
+				if (!reg_name)
+					continue;
+				if (strncmp(info->prefix, reg_name, prefix_len))
+					continue;
+			}
 
 			drv = lists_driver_lookup_name(info->driver);
 			if (!drv) {
diff --git a/include/power/sandbox_pmic.h b/include/power/sandbox_pmic.h
index 7fdbfb9fc6..c5e6fda2ea 100644
--- a/include/power/sandbox_pmic.h
+++ b/include/power/sandbox_pmic.h
@@ -13,7 +13,7 @@
 #define SANDBOX_BUCK_DRIVER		"sandbox_buck"
 #define SANDBOX_OF_BUCK_PREFIX		"buck"
 
-#define SANDBOX_BUCK_COUNT	2
+#define SANDBOX_BUCK_COUNT	3
 #define SANDBOX_LDO_COUNT	2
 /*
  * Sandbox PMIC registers:
@@ -109,6 +109,9 @@ enum {
 #define SANDBOX_BUCK1_PLATNAME	"SUPPLY_1.2V"
 #define SANDBOX_BUCK2_DEVNAME	"buck2"
 #define SANDBOX_BUCK2_PLATNAME	"SUPPLY_3.3V"
+/* BUCK3: for testing fallback regulator prefix matching during bind */
+#define SANDBOX_BUCK3_DEVNAME	"no_match_by_nodename"
+#define SANDBOX_BUCK3_PLATNAME	"buck_SUPPLY_1.5V"
 /* LDO names */
 #define SANDBOX_LDO1_DEVNAME	"ldo1"
 #define SANDBOX_LDO1_PLATNAME	"VDD_EMMC_1.8V"
diff --git a/test/dm/regulator.c b/test/dm/regulator.c
index 3d0056f2dc..395381d4bd 100644
--- a/test/dm/regulator.c
+++ b/test/dm/regulator.c
@@ -27,6 +27,7 @@ DECLARE_GLOBAL_DATA_PTR;
 enum {
 	BUCK1,
 	BUCK2,
+	BUCK3,
 	LDO1,
 	LDO2,
 	OUTPUT_COUNT,
@@ -42,6 +43,7 @@ static const char *regulator_names[OUTPUT_COUNT][OUTPUT_NAME_COUNT] = {
 	/* devname, platname */
 	{ SANDBOX_BUCK1_DEVNAME, SANDBOX_BUCK1_PLATNAME },
 	{ SANDBOX_BUCK2_DEVNAME, SANDBOX_BUCK2_PLATNAME },
+	{ SANDBOX_BUCK3_DEVNAME, SANDBOX_BUCK3_PLATNAME },
 	{ SANDBOX_LDO1_DEVNAME, SANDBOX_LDO1_PLATNAME},
 	{ SANDBOX_LDO2_DEVNAME, SANDBOX_LDO2_PLATNAME},
 };

commit 13e1d84013cfdf0044c2d022d6b75a2845ae731f
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Fri Nov 24 18:37:58 2017 +0100

    UPSTREAM: dm: reset: have the reset-command perform a COLD reset
    
    The DM version of do_reset has been issuing a warm-reset, which (on
    some platforms keeps GPIOs and other parts of the platform active).
    This may cause unintended behaviour, as calling do_reset usually
    indicates a desire to reset the board/platform and not just the CPU.
    
    This changes do_reset to always request a COLD reset.
    Note that programmatic uses can still invoke a WARM reset through
    reset_cpu() or using sysreset_walk().
    
    Change-Id: I65a8ac8e62582866e23e6451315090fdb2781ef4
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit b53f6992e9cb7f0d892ebc2b1620b55559f461be)

diff --git a/drivers/sysreset/sysreset-uclass.c b/drivers/sysreset/sysreset-uclass.c
index 3566d17fb1..0747c52b60 100644
--- a/drivers/sysreset/sysreset-uclass.c
+++ b/drivers/sysreset/sysreset-uclass.c
@@ -70,7 +70,7 @@ void reset_cpu(ulong addr)
 
 int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
-	sysreset_walk_halt(SYSRESET_WARM);
+	sysreset_walk_halt(SYSRESET_COLD);
 
 	return 0;
 }

commit 6bb25446252735d379a5fd52ff99c3ae474d234a
Author: Baruch Siach <baruch@tkos.co.il>
Date:   Sun Dec 10 17:34:35 2017 +0200

    UPSTREAM: README: update the kernel coding style reference
    
    The old CodingStyle document has been converted to ReST and moved
    elsewhere. Link to the web version of this document instead.
    
    Change-Id: I92f10f6c014a2658f587350f847634683d3d51c7
    Signed-off-by: Baruch Siach <baruch@tkos.co.il>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 659208da4703de50826a469cbb38bf6afb938978)

diff --git a/README b/README
index 903cd65db7..abf6136746 100644
--- a/README
+++ b/README
@@ -5196,8 +5196,9 @@ Coding Standards:
 -----------------
 
 All contributions to U-Boot should conform to the Linux kernel
-coding style; see the file "Documentation/CodingStyle" and the script
-"scripts/Lindent" in your Linux kernel source directory.
+coding style; see the kernel coding style guide at
+https://www.kernel.org/doc/html/latest/process/coding-style.html, and the
+script "scripts/Lindent" in your Linux kernel source directory.
 
 Source files originating from a different project (for example the
 MTD subsystem) are generally exempt from these guidelines and are not

commit 7cc0da0b68bf9e938a495692d359e4ec58404ecf
Author: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
Date:   Thu Dec 7 16:20:44 2017 +0100

    UPSTREAM: rockchip: rk3399-puma: preserve leading zeros in serial#
    
    Linux preserves leading zeros in /proc/cpuinfo, so we
    should as well.
    
    Otherwise we have the situation that
    /sys/firmware/devicetree/base/serial-number
    and /proc/cpuinfo disagree in Linux.
    
    Change-Id: Ie1b53d75468ac9ae6ac3298ed54a4e7b5e6bea9a
    Signed-off-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit b32b1bd10b86d01a26056f50de89f768e5183ed1)

diff --git a/board/theobroma-systems/puma_rk3399/puma-rk3399.c b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
index 0ad267cdd0..27e3823d52 100644
--- a/board/theobroma-systems/puma_rk3399/puma-rk3399.c
+++ b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
@@ -173,7 +173,7 @@ static void setup_serial(void)
 
 	serialno = crc32_no_comp(0, low, 8);
 	serialno |= (u64)crc32_no_comp(serialno, high, 8) << 32;
-	snprintf(serialno_str, sizeof(serialno_str), "%llx", serialno);
+	snprintf(serialno_str, sizeof(serialno_str), "%016llx", serialno);
 
 	env_set("cpuid#", cpuid_str);
 	env_set("serial#", serialno_str);

commit 995085a9d51c7a93618eb7ea842bc4d6f460c5fb
Author: York Sun <york.sun@nxp.com>
Date:   Thu Dec 7 13:16:07 2017 -0800

    UPSTREAM: armv8: fix gd after relocation
    
    Commit 21f4486faa5d ("armv8: update gd after relocate") sets x18
    without checking the return value of spl_relocate_stack_gd().
    
    Reviewed-by: Stephen Warren <swarren@nvidia.com>
    Change-Id: I929a996608808934bf4d614acfffe43080594ecb
    Signed-off-by: York Sun <york.sun@nxp.com>
    CC: Kever Yang <kever.yang@rock-chips.com>
    CC: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit e421b646fce125ed92936628dc4b287de5f038a5)

diff --git a/arch/arm/lib/crt0_64.S b/arch/arm/lib/crt0_64.S
index ccefce0b20..9cb70552fe 100644
--- a/arch/arm/lib/crt0_64.S
+++ b/arch/arm/lib/crt0_64.S
@@ -120,8 +120,9 @@ relocation_return:
 #endif /* !CONFIG_SPL_BUILD */
 #if defined(CONFIG_SPL_BUILD)
 	bl	spl_relocate_stack_gd           /* may return NULL */
-	/* set up gd here, outside any C code */
-	mov	x18, x0
+	/* set up gd here, outside any C code, if new stack is returned */
+	cmp	x0, #0
+	csel	x18, x0, x18, ne
 	/*
 	 * Perform 'sp = (x0 != NULL) ? x0 : sp' while working
 	 * around the constraint that conditional moves can not

commit 40fb706fa5e98485434e6d46f807f88b5f89a3db
Author: Simon Glass <sjg@chromium.org>
Date:   Mon Dec 4 13:48:31 2017 -0700

    UPSTREAM: log: Add documentation
    
    Add documentation for the log system.
    
    Change-Id: I1ad874d516ea2c140bf37d5ae695479b087620fa
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 1d0f30a8e080fd490ec4df50d5ccfc742e771ca0)

diff --git a/doc/README.log b/doc/README.log
new file mode 100644
index 0000000000..f653fe7d79
--- /dev/null
+++ b/doc/README.log
@@ -0,0 +1,214 @@
+Logging in U-Boot
+=================
+
+Introduction
+------------
+
+U-Boot's internal operation involves many different steps and actions. From
+setting up the board to displaying a start-up screen to loading an Operating
+System, there are many component parts each with many actions.
+
+Most of the time this internal detail is not useful. Displaying it on the
+console would delay booting (U-Boot's primary purpose) and confuse users.
+
+But for digging into what is happening in a particular area, or for debugging
+a problem it is often useful to see what U-Boot is doing in more detail than
+is visible from the basic console output.
+
+U-Boot's logging feature aims to satisfy this goal for both users and
+developers.
+
+
+Logging levels
+--------------
+
+There are a number logging levels available, in increasing order of verbosity:
+
+   LOGL_EMERG	- Printed before U-Boot halts
+   LOGL_ALERT	- Indicates action must be taken immediate or U-Boot will crash
+   LOGL_CRIT	- Indicates a critical error that will cause boot failure
+   LOGL_ERR	- Indicates an error that may cause boot failure
+   LOGL_WARNING	- Warning about an unexpected condition
+   LOGL_NOTE	- Important information about progress
+   LOGL_INFO	- Information about normal boot progress
+   LOGL_DEBUG	- Debug information (useful for debugging a driver or subsystem)
+   LOGL_DEBUG_CONTENT	- Debug message showing full message content
+   LOGL_DEBUG_IO	- Debug message showing hardware I/O access
+
+
+Logging category
+----------------
+
+Logging can come from a wide variety of places within U-Boot. Each log message
+has a category which is intended to allow messages to be filtered according to
+their source.
+
+The following main categories are defined:
+
+   LOGC_NONE	- Unknown category (e.g. a debug() statement)
+   UCLASS_...	- Related to a particular uclass (e.g. UCLASS_USB)
+   LOGC_ARCH	- Related to architecture-specific code
+   LOGC_BOARD	- Related to board-specific code
+   LOGC_CORE	- Related to core driver-model support
+   LOGC_DT	- Related to device tree control
+
+
+Enabling logging
+----------------
+
+The following options are used to enable logging at compile time:
+
+   CONFIG_LOG		- Enables the logging system
+   CONFIG_MAX_LOG_LEVEL - Max log level to build (anything higher is compiled
+				out)
+   CONFIG_LOG_CONSOLE	- Enable writing log records to the console
+
+If CONFIG_LOG is not set, then no logging will be available.
+
+The above have SPL versions also, e.g. CONFIG_SPL_MAX_LOG_LEVEL.
+
+
+Using DEBUG
+-----------
+
+U-Boot has traditionally used a #define called DEBUG to enable debugging on a
+file-by-file basis. The debug() macro compiles to a printf() statement if
+DEBUG is enabled, and an empty statement if not.
+
+With logging enabled, debug() statements are interpreted as logging output
+with a level of LOGL_DEBUG and a category of LOGC_NONE.
+
+The logging facilities are intended to replace DEBUG, but if DEBUG is defined
+at the top of a file, then it takes precedence. This means that debug()
+statements will result in output to the console and this output will not be
+logged.
+
+
+Logging destinations
+--------------------
+
+If logging information goes nowhere then it serves no purpose. U-Boot provides
+several possible determinations for logging information, all of which can be
+enabled or disabled independently:
+
+   console - goes to stdout
+
+
+Filters
+-------
+
+Filters are attached to log drivers to control what those drivers emit. Only
+records that pass through the filter make it to the driver.
+
+Filters can be based on several criteria:
+
+   - maximum log level
+   - in a set of categories
+   - in a set of files
+
+If no filters are attached to a driver then a default filter is used, which
+limits output to records with a level less than CONFIG_LOG_MAX_LEVEL.
+
+
+Logging statements
+------------------
+
+The main logging function is:
+
+   log(category, level, format_string, ...)
+
+Also debug() and error() will generate log records  - these use LOG_CATEGORY
+as the category, so you should #define this right at the top of the source
+file to ensure the category is correct.
+
+
+Code size
+---------
+
+Code size impact depends largely on what is enabled. The following numbers are
+for snow, which is a Thumb-2 board:
+
+This series: adds bss +20.0 data +4.0 rodata +4.0 text +44.0
+CONFIG_LOG: bss -52.0 data +92.0 rodata -635.0 text +1048.0
+CONFIG_LOG_MAX_LEVEL=7: bss +188.0 data +4.0 rodata +49183.0 text +98124.0
+
+The last option turns every debug() statement into a logging call, which
+bloats the code hugely. The advantage is that it is then possible to enable
+all logging within U-Boot.
+
+
+To Do
+-----
+
+There are lots of useful additions that could be made. None of the below is
+implemented! If you do one, please add a test in test/py/tests/test_log.py
+
+Convenience functions to support setting the category:
+
+   log_arch(level, format_string, ...) - category LOGC_ARCH
+   log_board(level, format_string, ...) - category LOGC_BOARD
+   log_core(level, format_string, ...) - category LOGC_CORE
+   log_dt(level, format_string, ...) - category LOGC_DT
+
+Convenience functions to support a category defined for a single file, for
+example:
+
+   #define LOG_CATEGORY   UCLASS_USB
+
+all of these can use LOG_CATEGORY as the category, and a log level
+corresponding to the function name:
+
+   logc(level, format_string, ...)
+
+More logging destinations:
+
+   device - goes to a device (e.g. serial)
+   buffer - recorded in a memory buffer
+
+Convert debug() statements in the code to log() statements
+
+Support making printf() emit log statements a L_INFO level
+
+Convert error() statements in the code to log() statements
+
+Figure out what to do with BUG(), BUG_ON() and warn_non_spl()
+
+Figure out what to do with assert()
+
+Add a way to browse log records
+
+Add a way to record log records for browsing using an external tool
+
+Add commands to add and remove filters
+
+Add commands to add and remove log devices
+
+Allow sharing of printf format strings in log records to reduce storage size
+for large numbers of log records
+
+Add a command-line option to sandbox to set the default logging level
+
+Convert core driver model code to use logging
+
+Convert uclasses to use logging with the correct category
+
+Consider making log() calls emit an automatic newline, perhaps with a logn()
+   function to avoid that
+
+Passing log records through to linux (e.g. via device tree /chosen)
+
+Provide a command to access the number of log records generated, and the
+number dropped due to them being generated before the log system was ready.
+
+Add a printf() format string pragma so that log statements are checked properly
+
+Enhance the log console driver to show level / category / file / line
+information
+
+Add a command to add new log records and delete existing records.
+
+Provide additional log() functions - e.g. logc() to specify the category
+
+--
+Simon Glass <sjg@chromium.org>
+15-Sep-17

commit c41d05c3010e6015c0451a5a0eaa3b341dac0e3e
Author: Simon Glass <sjg@chromium.org>
Date:   Mon Dec 4 13:48:30 2017 -0700

    UPSTREAM: log: test: Add a pytest for logging
    
    Add a test which tries out various filters and options to make sure that
    logging works as expected.
    
    Change-Id: Ibbaf607e128356e78769b9db9d6bda235c74ead2
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 20faa27c2bc32b1442970cfe98a3006cf8eac063)

diff --git a/MAINTAINERS b/MAINTAINERS
index 9ba8bed1d0..7b11bc9e8d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -309,6 +309,7 @@ T:	git git://git.denx.de/u-boot.git
 F:	common/log.c
 F:	cmd/log.c
 F:	test/log/log_test.c
+F:	test/py/tests/test_log.py
 
 MICROBLAZE
 M:	Michal Simek <monstr@monstr.eu>
diff --git a/test/py/tests/test_log.py b/test/py/tests/test_log.py
new file mode 100644
index 0000000000..fa9a25e8dc
--- /dev/null
+++ b/test/py/tests/test_log.py
@@ -0,0 +1,101 @@
+# Copyright (c) 2016, Google Inc.
+#
+# SPDX-License-Identifier:      GPL-2.0+
+#
+# U-Boot Verified Boot Test
+
+"""
+This tests U-Boot logging. It uses the 'log test' command with various options
+and checks that the output is correct.
+"""
+
+import pytest
+
+LOGL_FIRST, LOGL_WARNING, LOGL_INFO = (0, 4, 6)
+
+@pytest.mark.buildconfigspec('log')
+def test_log(u_boot_console):
+    """Test that U-Boot logging works correctly."""
+    def check_log_entries(lines, mask, max_level=LOGL_INFO):
+        """Check that the expected log records appear in the output
+
+        Args:
+            lines: iterator containing lines to check
+            mask: bit mask to select which lines to check for:
+                bit 0: standard log line
+                bit 1: _log line
+            max_level: maximum log level to expect in the output
+        """
+        for i in range(max_level):
+            if mask & 1:
+                assert 'log %d' % i == lines.next()
+            if mask & 3:
+                assert '_log %d' % i == lines.next()
+
+    def run_test(testnum):
+        """Run a particular test number (the 'log test' command)
+
+        Args:
+            testnum: Test number to run
+        Returns:
+            iterator containing the lines output from the command
+        """
+
+        with cons.log.section('basic'):
+           output = u_boot_console.run_command('log test %d' % testnum)
+        split = output.replace('\r', '').splitlines()
+        lines = iter(split)
+        assert 'test %d' % testnum == lines.next()
+        return lines
+
+    def test0():
+        lines = run_test(0)
+        check_log_entries(lines, 3)
+
+    def test1():
+        lines = run_test(1)
+        check_log_entries(lines, 3)
+
+    def test2():
+        lines = run_test(2)
+
+    def test3():
+        lines = run_test(3)
+        check_log_entries(lines, 2)
+
+    def test4():
+        lines = run_test(4)
+        assert next(lines, None) == None
+
+    def test5():
+        lines = run_test(5)
+        check_log_entries(lines, 2)
+
+    def test6():
+        lines = run_test(6)
+        check_log_entries(lines, 3)
+
+    def test7():
+        lines = run_test(7)
+        check_log_entries(lines, 3, LOGL_WARNING)
+
+    def test8():
+        lines = run_test(8)
+        check_log_entries(lines, 3)
+
+    def test9():
+        lines = run_test(9)
+        check_log_entries(lines, 3)
+
+    # TODO(sjg@chromium.org): Consider structuring this as separate tests
+    cons = u_boot_console
+    test0()
+    test1()
+    test2()
+    test3()
+    test4()
+    test5()
+    test6()
+    test7()
+    test8()
+    test9()

commit a239d69a77cfe7d48f939b8f2e072fa07f9fbc6a
Author: Simon Glass <sjg@chromium.org>
Date:   Mon Dec 4 13:48:28 2017 -0700

    UPSTREAM: log: Plumb logging into the init sequence
    
    Set up logging both before and after relocation.
    
    Change-Id: I225a1077880b14a6f3eabc19b2a5b9fe4c6a530d
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit af1bc0cf46c49c5ddb13b8c75bad31a05a137eba)

diff --git a/common/board_f.c b/common/board_f.c
index 1e8bf63ec1..e46eceda7d 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -751,6 +751,7 @@ static const init_fnc_t init_sequence_f[] = {
 	trace_early_init,
 #endif
 	initf_malloc,
+	log_init,
 	initf_bootstage,	/* uses its own timer, so does not need DM */
 	initf_console_record,
 #if defined(CONFIG_HAVE_FSP)
@@ -932,8 +933,10 @@ void board_init_f_r(void)
 	 * The pre-relocation drivers may be using memory that has now gone
 	 * away. Mark serial as unavailable - this will fall back to the debug
 	 * UART if available.
+	 *
+	 * Do the same with log drivers since the memory may not be available.
 	 */
-	gd->flags &= ~GD_FLG_SERIAL_READY;
+	gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY);
 #ifdef CONFIG_TIMER
 	gd->timer = NULL;
 #endif
diff --git a/common/board_r.c b/common/board_r.c
index 89729d7736..09167c13cc 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -691,6 +691,7 @@ static init_fnc_t init_sequence_r[] = {
 #endif
 	initr_barrier,
 	initr_malloc,
+	log_init,
 	initr_bootstage,	/* Needs malloc() but has its own timer */
 	initr_console_record,
 #ifdef CONFIG_SYS_NONCACHED_MEMORY
@@ -884,6 +885,7 @@ void board_init_r(gd_t *new_gd, ulong dest_addr)
 #if !defined(CONFIG_X86) && !defined(CONFIG_ARM) && !defined(CONFIG_ARM64)
 	gd = new_gd;
 #endif
+	gd->flags &= ~GD_FLG_LOG_READY;
 
 #ifdef CONFIG_NEEDS_MANUAL_RELOC
 	for (i = 0; i < ARRAY_SIZE(init_sequence_r); i++)
diff --git a/common/log.c b/common/log.c
index 8f36c79c26..45e46dd520 100644
--- a/common/log.c
+++ b/common/log.c
@@ -238,6 +238,7 @@ int log_init(void)
 			      (struct list_head *)&gd->log_head);
 		drv++;
 	}
+	gd->flags |= GD_FLG_LOG_READY;
 	gd->default_log_level = LOGL_INFO;
 
 	return 0;
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index 8fa4c95f76..5aaa78b06a 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -154,5 +154,6 @@ typedef struct global_data {
 #define GD_FLG_RECORD		0x01000	/* Record console		   */
 #define GD_FLG_ENV_DEFAULT	0x02000 /* Default variable flag	   */
 #define GD_FLG_SPL_EARLY_INIT	0x04000 /* Early SPL init is done	   */
+#define GD_FLG_LOG_READY	0x08000 /* Log system is ready for use	   */
 
 #endif /* __ASM_GENERIC_GBL_DATA_H */

commit b974325dd8f8312b40d85983f219dd2dbaae7415
Author: Simon Glass <sjg@chromium.org>
Date:   Tue Sep 5 19:49:45 2017 -0600

    UPSTREAM: board_f: Drop the timer after relocation
    
    Once U-Boot relocates itself the existing driver-model timer (if any) is
    no-longer valid until the device is reinitialised. Any use of the device
    may cause a crash. To handle this, set the timer to NULL after relocation.
    
    Change-Id: I041cc547659b540735dcaf52444d97834ea10059
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 5ee94b4f4032502c26cd3c9ede6a910d7e2c9b46)

diff --git a/common/board_f.c b/common/board_f.c
index d0b1a00175..1e8bf63ec1 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -934,6 +934,9 @@ void board_init_f_r(void)
 	 * UART if available.
 	 */
 	gd->flags &= ~GD_FLG_SERIAL_READY;
+#ifdef CONFIG_TIMER
+	gd->timer = NULL;
+#endif
 
 	/*
 	 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.

commit 73991b074b84a2b568d20b0cc41f15bfbd0d0046
Author: Simon Glass <sjg@chromium.org>
Date:   Mon Dec 4 13:48:27 2017 -0700

    log: Add a test command
    
    Add a command which exercises the logging system.
    
    Change-Id: I4eb139b69937c752d7f6fc42dde3f757260b832b
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit ef11ed8239bf02b347e7fb9fc6d980aec0c7810a)

diff --git a/MAINTAINERS b/MAINTAINERS
index 91a3e11492..9ba8bed1d0 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -308,6 +308,7 @@ S:	Maintained
 T:	git git://git.denx.de/u-boot.git
 F:	common/log.c
 F:	cmd/log.c
+F:	test/log/log_test.c
 
 MICROBLAZE
 M:	Michal Simek <monstr@monstr.eu>
diff --git a/cmd/Kconfig b/cmd/Kconfig
index b9d2f7fe4e..6afb4fd64f 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1555,7 +1555,8 @@ config CMD_LOG
 	help
 	  This provides access to logging features. It allows the output of
 	  log data to be controlled to a limited extent (setting up the default
-	  maximum log level for emitting of records).
+	  maximum log level for emitting of records). It also provides access
+	  to a command used for testing the log system.
 
 config CMD_TRACE
 	bool "trace - Support tracing of function calls and timing"
diff --git a/cmd/log.c b/cmd/log.c
index 44e04ab16a..abc523b497 100644
--- a/cmd/log.c
+++ b/cmd/log.c
@@ -23,6 +23,9 @@ static int do_log_level(cmd_tbl_t *cmdtp, int flag, int argc,
 
 static cmd_tbl_t log_sub[] = {
 	U_BOOT_CMD_MKENT(level, CONFIG_SYS_MAXARGS, 1, do_log_level, "", ""),
+#ifdef CONFIG_LOG_TEST
+	U_BOOT_CMD_MKENT(test, 2, 1, do_log_test, "", ""),
+#endif
 };
 
 static int do_log(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
@@ -46,6 +49,9 @@ static int do_log(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 #ifdef CONFIG_SYS_LONGHELP
 static char log_help_text[] =
 	"level - get/set log level\n"
+#ifdef CONFIG_LOG_TEST
+	"log test - run log tests\n"
+#endif
 	;
 #endif
 
diff --git a/common/Kconfig b/common/Kconfig
index 4518dee887..20f97ed8bc 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -479,6 +479,16 @@ config LOG_SPL_CONSOLE
 	  log message is shown - other details like level, category, file and
 	  line number are omitted.
 
+config LOG_TEST
+	bool "Provide a test for logging"
+	depends on LOG
+	default y if SANDBOX
+	help
+	  This enables a 'log test' command to test logging. It is normally
+	  executed from a pytest and simply outputs logging information
+	  in various different ways to test that the logging system works
+	  correctly with varoius settings.
+
 endmenu
 
 config DEFAULT_FDT_FILE
diff --git a/include/log.h b/include/log.h
index 1e9124c3f8..8083b64831 100644
--- a/include/log.h
+++ b/include/log.h
@@ -256,6 +256,9 @@ struct log_filter {
 #define LOG_DRIVER(_name) \
 	ll_entry_declare(struct log_driver, _name, log_driver)
 
+/* Handle the 'log test' command */
+int do_log_test(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]);
+
 /**
  * log_add_filter() - Add a new filter to a log device
  *
diff --git a/test/Makefile b/test/Makefile
index d4e86ff967..382a0fff4d 100644
--- a/test/Makefile
+++ b/test/Makefile
@@ -11,3 +11,4 @@ obj-$(CONFIG_SANDBOX) += compression.o
 obj-$(CONFIG_SANDBOX) += print_ut.o
 obj-$(CONFIG_UT_TIME) += time_ut.o
 obj-$(CONFIG_TEST_ROCKCHIP) += rockchip/
+obj-$(CONFIG_$(SPL_)LOG) += log/
diff --git a/test/log/Makefile b/test/log/Makefile
new file mode 100644
index 0000000000..b0da8dee28
--- /dev/null
+++ b/test/log/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (c) 2017 Google, Inc
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-$(CONFIG_LOG_TEST) += log_test.o
diff --git a/test/log/log_test.c b/test/log/log_test.c
new file mode 100644
index 0000000000..2c6227703f
--- /dev/null
+++ b/test/log/log_test.c
@@ -0,0 +1,205 @@
+/*
+ * Logging support test program
+ *
+ * Copyright (c) 2017 Google, Inc
+ * Written by Simon Glass <sjg@chromium.org>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+
+/* emit some sample log records in different ways, for testing */
+static int log_run(enum uclass_id cat, const char *file)
+{
+	int i;
+
+	debug("debug\n");
+	for (i = LOGL_FIRST; i < LOGL_COUNT; i++) {
+		log(cat, i, "log %d\n", i);
+		_log(log_uc_cat(cat), i, file, 100 + i, "func", "_log %d\n",
+		     i);
+	}
+
+	return 0;
+}
+
+static int log_test(int testnum)
+{
+	int ret;
+
+	printf("test %d\n", testnum);
+	switch (testnum) {
+	case 0: {
+		/* Check a category filter using the first category */
+		enum log_category_t cat_list[] = {
+			log_uc_cat(UCLASS_MMC), log_uc_cat(UCLASS_SPI),
+			LOGC_NONE, LOGC_END
+		};
+
+		ret = log_add_filter("console", cat_list, LOGL_MAX, NULL);
+		if (ret < 0)
+			return ret;
+		log_run(UCLASS_MMC, "file");
+		ret = log_remove_filter("console", ret);
+		if (ret < 0)
+			return ret;
+		break;
+	}
+	case 1: {
+		/* Check a category filter using the second category */
+		enum log_category_t cat_list[] = {
+			log_uc_cat(UCLASS_MMC), log_uc_cat(UCLASS_SPI), LOGC_END
+		};
+
+		ret = log_add_filter("console", cat_list, LOGL_MAX, NULL);
+		if (ret < 0)
+			return ret;
+		log_run(UCLASS_SPI, "file");
+		ret = log_remove_filter("console", ret);
+		if (ret < 0)
+			return ret;
+		break;
+	}
+	case 2: {
+		/* Check a category filter that should block log entries */
+		enum log_category_t cat_list[] = {
+			log_uc_cat(UCLASS_MMC),  LOGC_NONE, LOGC_END
+		};
+
+		ret = log_add_filter("console", cat_list, LOGL_MAX, NULL);
+		if (ret < 0)
+			return ret;
+		log_run(UCLASS_SPI, "file");
+		ret = log_remove_filter("console", ret);
+		if (ret < 0)
+			return ret;
+		break;
+	}
+	case 3: {
+		/* Check a passing file filter */
+		ret = log_add_filter("console", NULL, LOGL_MAX, "file");
+		if (ret < 0)
+			return ret;
+		log_run(UCLASS_SPI, "file");
+		ret = log_remove_filter("console", ret);
+		if (ret < 0)
+			return ret;
+		break;
+	}
+	case 4: {
+		/* Check a failing file filter */
+		ret = log_add_filter("console", NULL, LOGL_MAX, "file");
+		if (ret < 0)
+			return ret;
+		log_run(UCLASS_SPI, "file2");
+		ret = log_remove_filter("console", ret);
+		if (ret < 0)
+			return ret;
+		break;
+	}
+	case 5: {
+		/* Check a passing file filter (second in list) */
+		ret = log_add_filter("console", NULL, LOGL_MAX, "file,file2");
+		if (ret < 0)
+			return ret;
+		log_run(UCLASS_SPI, "file2");
+		ret = log_remove_filter("console", ret);
+		if (ret < 0)
+			return ret;
+		break;
+	}
+	case 6: {
+		/* Check a passing file filter */
+		ret = log_add_filter("console", NULL, LOGL_MAX,
+				     "file,file2,log/log_test.c");
+		if (ret < 0)
+			return ret;
+		log_run(UCLASS_SPI, "file2");
+		ret = log_remove_filter("console", ret);
+		if (ret < 0)
+			return ret;
+		break;
+	}
+	case 7: {
+		/* Check a log level filter */
+		ret = log_add_filter("console", NULL, LOGL_WARNING, NULL);
+		if (ret < 0)
+			return ret;
+		log_run(UCLASS_SPI, "file");
+		ret = log_remove_filter("console", ret);
+		if (ret < 0)
+			return ret;
+		break;
+	}
+	case 8: {
+		/* Check two filters, one of which passes everything */
+		int filt1, filt2;
+
+		ret = log_add_filter("console", NULL, LOGL_WARNING, NULL);
+		if (ret < 0)
+			return ret;
+		filt1 = ret;
+		ret = log_add_filter("console", NULL, LOGL_MAX, NULL);
+		if (ret < 0)
+			return ret;
+		filt2 = ret;
+		log_run(UCLASS_SPI, "file");
+		ret = log_remove_filter("console", filt1);
+		if (ret < 0)
+			return ret;
+		ret = log_remove_filter("console", filt2);
+		if (ret < 0)
+			return ret;
+		break;
+	}
+	case 9: {
+		/* Check three filters, which together pass everything */
+		int filt1, filt2, filt3;
+
+		ret = log_add_filter("console", NULL, LOGL_MAX, "file)");
+		if (ret < 0)
+			return ret;
+		filt1 = ret;
+		ret = log_add_filter("console", NULL, LOGL_MAX, "file2");
+		if (ret < 0)
+			return ret;
+		filt2 = ret;
+		ret = log_add_filter("console", NULL, LOGL_MAX,
+				     "log/log_test.c");
+		if (ret < 0)
+			return ret;
+		filt3 = ret;
+		log_run(UCLASS_SPI, "file2");
+		ret = log_remove_filter("console", filt1);
+		if (ret < 0)
+			return ret;
+		ret = log_remove_filter("console", filt2);
+		if (ret < 0)
+			return ret;
+		ret = log_remove_filter("console", filt3);
+		if (ret < 0)
+			return ret;
+		break;
+	}
+	}
+
+	return 0;
+}
+
+#ifdef CONFIG_LOG_TEST
+int do_log_test(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+{
+	int testnum = 0;
+	int ret;
+
+	if (argc > 1)
+		testnum = simple_strtoul(argv[1], NULL, 10);
+
+	ret = log_test(testnum);
+	if (ret)
+		printf("Test failure (err=%d)\n", ret);
+
+	return ret ? CMD_RET_FAILURE : 0;
+}
+#endif

commit 923fc48db435f0db633d38a9b772fdfcd753166c
Author: Simon Glass <sjg@chromium.org>
Date:   Mon Dec 4 13:48:26 2017 -0700

    log: Add a 'log level' command
    
    Add a command for adjusting the log level.
    
    Change-Id: I51e15c61e860f4f0bdb980f1d7aa88c492f55d49
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit d5f61f272d5b7b86bf6321512ba6326c7c075e72)

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 772a62a513..b9d2f7fe4e 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1550,6 +1550,13 @@ config CMD_KGDB
 	  single-stepping, inspecting variables, etc. This is supported only
 	  on PowerPC at present.
 
+config CMD_LOG
+	bool "log - Generation, control and access to logging"
+	help
+	  This provides access to logging features. It allows the output of
+	  log data to be controlled to a limited extent (setting up the default
+	  maximum log level for emitting of records).
+
 config CMD_TRACE
 	bool "trace - Support tracing of function calls and timing"
 	help
diff --git a/cmd/Makefile b/cmd/Makefile
index a60fa41158..82817e2943 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -81,6 +81,7 @@ obj-$(CONFIG_CMD_LED) += led.o
 obj-$(CONFIG_CMD_LICENSE) += license.o
 obj-y += load.o
 obj-$(CONFIG_CMD_LOAD_ANDROID) += load_android.o android_cmds.o
+obj-$(CONFIG_CMD_LOG) += log.o
 obj-$(CONFIG_ID_EEPROM) += mac.o
 obj-$(CONFIG_CMD_MD5SUM) += md5sum.o
 obj-$(CONFIG_CMD_MEMORY) += mem.o
diff --git a/cmd/log.c b/cmd/log.c
new file mode 100644
index 0000000000..44e04ab16a
--- /dev/null
+++ b/cmd/log.c
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2017 Google, Inc
+ * Written by Simon Glass <sjg@chromium.org>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <command.h>
+#include <dm.h>
+#include <log.h>
+
+static int do_log_level(cmd_tbl_t *cmdtp, int flag, int argc,
+			char * const argv[])
+{
+	if (argc > 1)
+		gd->default_log_level = simple_strtol(argv[1], NULL, 10);
+	else
+		printf("Default log level: %d\n", gd->default_log_level);
+
+	return 0;
+}
+
+static cmd_tbl_t log_sub[] = {
+	U_BOOT_CMD_MKENT(level, CONFIG_SYS_MAXARGS, 1, do_log_level, "", ""),
+};
+
+static int do_log(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+	cmd_tbl_t *cp;
+
+	if (argc < 2)
+		return CMD_RET_USAGE;
+
+	/* drop initial "log" arg */
+	argc--;
+	argv++;
+
+	cp = find_cmd_tbl(argv[0], log_sub, ARRAY_SIZE(log_sub));
+	if (cp)
+		return cp->cmd(cmdtp, flag, argc, argv);
+
+	return CMD_RET_USAGE;
+}
+
+#ifdef CONFIG_SYS_LONGHELP
+static char log_help_text[] =
+	"level - get/set log level\n"
+	;
+#endif
+
+U_BOOT_CMD(
+	log, CONFIG_SYS_MAXARGS, 1, do_log,
+	"log system", log_help_text
+);

commit 5cafef2de2edfcb919506177308d8aa9e66641ab
Author: Simon Glass <sjg@chromium.org>
Date:   Mon Dec 4 13:48:25 2017 -0700

    UPSTREAM: log: Add a console driver
    
    It is useful to display log messages on the console. Add a simple driver
    to handle this.
    
    Note that this driver outputs to the console, which may be serial or
    video. It does not specifically select serial output.
    
    Change-Id: I3626673a306557400584e673f9725e74ecbaaf98
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit c6d47535dfb6636ae5244958a2a9e043bb7646ae)

diff --git a/common/Kconfig b/common/Kconfig
index 03c66d4737..4518dee887 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -459,6 +459,26 @@ config SPL_LOG_MAX_LEVEL
 	    6 - detail
 	    7 - debug
 
+config LOG_CONSOLE
+	bool "Allow log output to the console"
+	depends on LOG
+	default y
+	help
+	  Enables a log driver which writes log records to the console.
+	  Generally the console is the serial port or LCD display. Only the
+	  log message is shown - other details like level, category, file and
+	  line number are omitted.
+
+config LOG_SPL_CONSOLE
+	bool "Allow log output to the console in SPL"
+	depends on LOG_SPL
+	default y
+	help
+	  Enables a log driver which writes log records to the console.
+	  Generally the console is the serial port or LCD display. Only the
+	  log message is shown - other details like level, category, file and
+	  line number are omitted.
+
 endmenu
 
 config DEFAULT_FDT_FILE
diff --git a/common/Makefile b/common/Makefile
index 08ebcb4bd3..eded2f1d78 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -135,5 +135,6 @@ obj-$(CONFIG_FSL_DDR_INTERACTIVE) += cli_simple.o cli_readline.o
 obj-$(CONFIG_CMD_DFU) += dfu.o
 obj-y += command.o
 obj-$(CONFIG_$(SPL_)LOG) += log.o
+obj-$(CONFIG_$(SPL_)LOG_CONSOLE) += log_console.o
 obj-y += s_record.o
 obj-y += xyzModem.o
diff --git a/common/log_console.c b/common/log_console.c
new file mode 100644
index 0000000000..5af73bd8be
--- /dev/null
+++ b/common/log_console.c
@@ -0,0 +1,23 @@
+/*
+ * Logging support
+ *
+ * Copyright (c) 2017 Google, Inc
+ * Written by Simon Glass <sjg@chromium.org>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <log.h>
+
+static int log_console_emit(struct log_device *ldev, struct log_rec *rec)
+{
+	puts(rec->msg);
+
+	return 0;
+}
+
+LOG_DRIVER(console) = {
+	.name	= "console",
+	.emit	= log_console_emit,
+};

commit 9530301c6611120510a0e6885dac286fe96f02f0
Author: Simon Glass <sjg@chromium.org>
Date:   Mon Dec 4 13:48:24 2017 -0700

    log: Add an implementation of logging
    
    Add the logging header file and implementation with some configuration
    options to control it.
    
    Change-Id: Ic711fa39ba3183b288170ebdd4bfdf0a9e472bad
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit e9c8d49d54cbbc7b219a1637d2994de7448b767d)

diff --git a/MAINTAINERS b/MAINTAINERS
index ef5ae23ea3..91a3e11492 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -302,6 +302,13 @@ S:	Maintained
 T:	git git://git.denx.de/u-boot-i2c.git
 F:	drivers/i2c/
 
+LOGGING
+M:	Simon Glass <sjg@chromium.org>
+S:	Maintained
+T:	git git://git.denx.de/u-boot.git
+F:	common/log.c
+F:	cmd/log.c
+
 MICROBLAZE
 M:	Michal Simek <monstr@monstr.eu>
 S:	Maintained
diff --git a/common/Kconfig b/common/Kconfig
index 78e0094b78..03c66d4737 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -405,6 +405,62 @@ config SYS_STDIO_DEREGISTER
 
 endmenu
 
+menu "Logging"
+
+config LOG
+	bool "Enable logging support"
+	help
+	  This enables support for logging of status and debug messages. These
+	  can be displayed on the console, recorded in a memory buffer, or
+	  discarded if not needed. Logging supports various categories and
+	  levels of severity.
+
+config SPL_LOG
+	bool "Enable logging support in SPL"
+	help
+	  This enables support for logging of status and debug messages. These
+	  can be displayed on the console, recorded in a memory buffer, or
+	  discarded if not needed. Logging supports various categories and
+	  levels of severity.
+
+config LOG_MAX_LEVEL
+	int "Maximum log level to record"
+	depends on LOG
+	default 5
+	help
+	  This selects the maximum log level that will be recorded. Any value
+	  higher than this will be ignored. If possible log statements below
+	  this level will be discarded at build time. Levels:
+
+	    0 - panic
+	    1 - critical
+	    2 - error
+	    3 - warning
+	    4 - note
+	    5 - info
+	    6 - detail
+	    7 - debug
+
+config SPL_LOG_MAX_LEVEL
+	int "Maximum log level to record in SPL"
+	depends on SPL_LOG
+	default 3
+	help
+	  This selects the maximum log level that will be recorded. Any value
+	  higher than this will be ignored. If possible log statements below
+	  this level will be discarded at build time. Levels:
+
+	    0 - panic
+	    1 - critical
+	    2 - error
+	    3 - warning
+	    4 - note
+	    5 - info
+	    6 - detail
+	    7 - debug
+
+endmenu
+
 config DEFAULT_FDT_FILE
 	string "Default fdt file"
 	help
diff --git a/common/Makefile b/common/Makefile
index 525433c888..08ebcb4bd3 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -134,5 +134,6 @@ obj-y += cli.o
 obj-$(CONFIG_FSL_DDR_INTERACTIVE) += cli_simple.o cli_readline.o
 obj-$(CONFIG_CMD_DFU) += dfu.o
 obj-y += command.o
+obj-$(CONFIG_$(SPL_)LOG) += log.o
 obj-y += s_record.o
 obj-y += xyzModem.o
diff --git a/common/log.c b/common/log.c
new file mode 100644
index 0000000000..8f36c79c26
--- /dev/null
+++ b/common/log.c
@@ -0,0 +1,244 @@
+/*
+ * Logging support
+ *
+ * Copyright (c) 2017 Google, Inc
+ * Written by Simon Glass <sjg@chromium.org>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <log.h>
+#include <malloc.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static struct log_device *log_device_find_by_name(const char *drv_name)
+{
+	struct log_device *ldev;
+
+	list_for_each_entry(ldev, &gd->log_head, sibling_node) {
+		if (!strcmp(drv_name, ldev->drv->name))
+			return ldev;
+	}
+
+	return NULL;
+}
+
+/**
+ * log_has_cat() - check if a log category exists within a list
+ *
+ * @cat_list: List of categories to check, at most LOGF_MAX_CATEGORIES entries
+ *	long, terminated by LC_END if fewer
+ * @cat: Category to search for
+ * @return true if @cat is in @cat_list, else false
+ */
+static bool log_has_cat(enum log_category_t cat_list[], enum log_category_t cat)
+{
+	int i;
+
+	for (i = 0; i < LOGF_MAX_CATEGORIES && cat_list[i] != LOGC_END; i++) {
+		if (cat_list[i] == cat)
+			return true;
+	}
+
+	return false;
+}
+
+/**
+ * log_has_file() - check if a file is with a list
+ *
+ * @file_list: List of files to check, separated by comma
+ * @file: File to check for. This string is matched against the end of each
+ *	file in the list, i.e. ignoring any preceding path. The list is
+ *	intended to consist of relative pathnames, e.g. common/main.c,cmd/log.c
+ * @return true if @file is in @file_list, else false
+ */
+static bool log_has_file(const char *file_list, const char *file)
+{
+	int file_len = strlen(file);
+	const char *s, *p;
+	int substr_len;
+
+	for (s = file_list; *s; s = p + (*p != '\0')) {
+		p = strchrnul(s, ',');
+		substr_len = p - s;
+		if (file_len >= substr_len &&
+		    !strncmp(file + file_len - substr_len, s, substr_len))
+			return true;
+	}
+
+	return false;
+}
+
+/**
+ * log_passes_filters() - check if a log record passes the filters for a device
+ *
+ * @ldev: Log device to check
+ * @rec: Log record to check
+ * @return true if @rec is not blocked by the filters in @ldev, false if it is
+ */
+static bool log_passes_filters(struct log_device *ldev, struct log_rec *rec)
+{
+	struct log_filter *filt;
+
+	/* If there are no filters, filter on the default log level */
+	if (list_empty(&ldev->filter_head)) {
+		if (rec->level > gd->default_log_level)
+			return false;
+		return true;
+	}
+
+	list_for_each_entry(filt, &ldev->filter_head, sibling_node) {
+		if (rec->level > filt->max_level)
+			continue;
+		if ((filt->flags & LOGFF_HAS_CAT) &&
+		    !log_has_cat(filt->cat_list, rec->cat))
+			continue;
+		if (filt->file_list &&
+		    !log_has_file(filt->file_list, rec->file))
+			continue;
+		return true;
+	}
+
+	return false;
+}
+
+/**
+ * log_dispatch() - Send a log record to all log devices for processing
+ *
+ * The log record is sent to each log device in turn, skipping those which have
+ * filters which block the record
+ *
+ * @rec: Log record to dispatch
+ * @return 0 (meaning success)
+ */
+static int log_dispatch(struct log_rec *rec)
+{
+	struct log_device *ldev;
+
+	list_for_each_entry(ldev, &gd->log_head, sibling_node) {
+		if (log_passes_filters(ldev, rec))
+			ldev->drv->emit(ldev, rec);
+	}
+
+	return 0;
+}
+
+int _log(enum log_category_t cat, enum log_level_t level, const char *file,
+	 int line, const char *func, const char *fmt, ...)
+{
+	char buf[CONFIG_SYS_CBSIZE];
+	struct log_rec rec;
+	va_list args;
+
+	rec.cat = cat;
+	rec.level = level;
+	rec.file = file;
+	rec.line = line;
+	rec.func = func;
+	va_start(args, fmt);
+	vsnprintf(buf, sizeof(buf), fmt, args);
+	va_end(args);
+	rec.msg = buf;
+	if (!gd || !(gd->flags & GD_FLG_LOG_READY)) {
+		if (gd)
+			gd->log_drop_count++;
+		return -ENOSYS;
+	}
+	log_dispatch(&rec);
+
+	return 0;
+}
+
+int log_add_filter(const char *drv_name, enum log_category_t cat_list[],
+		   enum log_level_t max_level, const char *file_list)
+{
+	struct log_filter *filt;
+	struct log_device *ldev;
+	int i;
+
+	ldev = log_device_find_by_name(drv_name);
+	if (!ldev)
+		return -ENOENT;
+	filt = (struct log_filter *)calloc(1, sizeof(*filt));
+	if (!filt)
+		return -ENOMEM;
+
+	if (cat_list) {
+		filt->flags |= LOGFF_HAS_CAT;
+		for (i = 0; ; i++) {
+			if (i == ARRAY_SIZE(filt->cat_list))
+				return -ENOSPC;
+			filt->cat_list[i] = cat_list[i];
+			if (cat_list[i] == LOGC_END)
+				break;
+		}
+	}
+	filt->max_level = max_level;
+	if (file_list) {
+		filt->file_list = strdup(file_list);
+		if (!filt->file_list)
+			goto nomem;
+	}
+	filt->filter_num = ldev->next_filter_num++;
+	list_add_tail(&filt->sibling_node, &ldev->filter_head);
+
+	return filt->filter_num;
+
+nomem:
+	free(filt);
+	return -ENOMEM;
+}
+
+int log_remove_filter(const char *drv_name, int filter_num)
+{
+	struct log_filter *filt;
+	struct log_device *ldev;
+
+	ldev = log_device_find_by_name(drv_name);
+	if (!ldev)
+		return -ENOENT;
+
+	list_for_each_entry(filt, &ldev->filter_head, sibling_node) {
+		if (filt->filter_num == filter_num) {
+			list_del(&filt->sibling_node);
+			free(filt);
+
+			return 0;
+		}
+	}
+
+	return -ENOENT;
+}
+
+int log_init(void)
+{
+	struct log_driver *drv = ll_entry_start(struct log_driver, log_driver);
+	const int count = ll_entry_count(struct log_driver, log_driver);
+	struct log_driver *end = drv + count;
+
+	/*
+	 * We cannot add runtime data to the driver since it is likely stored
+	 * in rodata. Instead, set up a 'device' corresponding to each driver.
+	 * We only support having a single device.
+	 */
+	INIT_LIST_HEAD((struct list_head *)&gd->log_head);
+	while (drv < end) {
+		struct log_device *ldev;
+
+		ldev = calloc(1, sizeof(*ldev));
+		if (!ldev) {
+			debug("%s: Cannot allocate memory\n", __func__);
+			return -ENOMEM;
+		}
+		INIT_LIST_HEAD(&ldev->filter_head);
+		ldev->drv = drv;
+		list_add_tail(&ldev->sibling_node,
+			      (struct list_head *)&gd->log_head);
+		drv++;
+	}
+	gd->default_log_level = LOGL_INFO;
+
+	return 0;
+}
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index 30dd8be308..8fa4c95f76 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -122,6 +122,11 @@ typedef struct global_data {
 	struct bootstage_data *new_bootstage;	/* Relocated bootstage info */
 #endif
 	phys_addr_t pm_ctx_phys;
+#ifdef CONFIG_LOG
+	int log_drop_count;		/* Number of dropped log messages */
+	int default_log_level;		/* For devices with no filters */
+	struct list_head log_head;	/* List of struct log_device */
+#endif
 } gd_t;
 #endif
 
diff --git a/include/log.h b/include/log.h
index 08ad44cf49..1e9124c3f8 100644
--- a/include/log.h
+++ b/include/log.h
@@ -10,6 +10,94 @@
 #ifndef __LOG_H
 #define __LOG_H
 
+#include <dm/uclass-id.h>
+#include <linux/list.h>
+
+/** Log levels supported, ranging from most to least important */
+enum log_level_t {
+	LOGL_EMERG = 0,		/*U-Boot is unstable */
+	LOGL_ALERT,		/* Action must be taken immediately */
+	LOGL_CRIT,		/* Critical conditions */
+	LOGL_ERR,		/* Error that prevents something from working */
+	LOGL_WARNING,		/* Warning may prevent optimial operation */
+	LOGL_NOTICE,		/* Normal but significant condition, printf() */
+	LOGL_INFO,		/* General information message */
+	LOGL_DEBUG,		/* Basic debug-level message */
+	LOGL_DEBUG_CONTENT,	/* Debug message showing full message content */
+	LOGL_DEBUG_IO,		/* Debug message showing hardware I/O access */
+
+	LOGL_COUNT,
+	LOGL_FIRST = LOGL_EMERG,
+	LOGL_MAX = LOGL_DEBUG,
+};
+
+/**
+ * Log categories supported. Most of these correspond to uclasses (i.e.
+ * enum uclass_id) but there are also some more generic categories
+ */
+enum log_category_t {
+	LOGC_FIRST = 0,	/* First part mirrors UCLASS_... */
+
+	LOGC_NONE = UCLASS_COUNT,
+	LOGC_ARCH,
+	LOGC_BOARD,
+	LOGC_CORE,
+	LOGC_DT,
+
+	LOGC_COUNT,
+	LOGC_END,
+};
+
+/* Helper to cast a uclass ID to a log category */
+static inline int log_uc_cat(enum uclass_id id)
+{
+	return (enum log_category_t)id;
+}
+
+/**
+ * _log() - Internal function to emit a new log record
+ *
+ * @cat: Category of log record (indicating which subsystem generated it)
+ * @level: Level of log record (indicating its severity)
+ * @file: File name of file where log record was generated
+ * @line: Line number in file where log record was generated
+ * @func: Function where log record was generated
+ * @fmt: printf() format string for log record
+ * @...: Optional parameters, according to the format string @fmt
+ * @return 0 if log record was emitted, -ve on error
+ */
+int _log(enum log_category_t cat, enum log_level_t level, const char *file,
+	 int line, const char *func, const char *fmt, ...);
+
+/* Define this at the top of a file to add a prefix to debug messages */
+#ifndef pr_fmt
+#define pr_fmt(fmt) fmt
+#endif
+
+/* Use a default category if this file does not supply one */
+#ifndef LOG_CATEGORY
+#define LOG_CATEGORY LOGC_NONE
+#endif
+
+/*
+ * This header may be including when CONFIG_LOG is disabled, in which case
+ * CONFIG_LOG_MAX_LEVEL is not defined. Add a check for this.
+ */
+#if CONFIG_IS_ENABLED(LOG)
+#define _LOG_MAX_LEVEL CONFIG_VAL(LOG_MAX_LEVEL)
+#else
+#define _LOG_MAX_LEVEL LOGL_INFO
+#endif
+
+/* Emit a log record if the level is less that the maximum */
+#define log(_cat, _level, _fmt, _args...) ({ \
+	int _l = _level; \
+	if (_l <= _LOG_MAX_LEVEL) \
+		_log((enum log_category_t)(_cat), _l, __FILE__, __LINE__, \
+		      __func__, \
+		      pr_fmt(_fmt), ##_args); \
+	})
+
 #ifdef DEBUG
 #define _DEBUG	1
 #else
@@ -22,6 +110,16 @@
 #define _SPL_BUILD	0
 #endif
 
+#if !_DEBUG && CONFIG_IS_ENABLED(LOG)
+
+#define debug_cond(cond, fmt, args...)			\
+	do {						\
+		if (1)					\
+			log(LOG_CATEGORY, LOGL_DEBUG, fmt, ##args); \
+	} while (0)
+
+#else /* _DEBUG */
+
 /*
  * Output a debug text when condition "cond" is met. The "cond" should be
  * computed by a preprocessor in the best case, allowing for the best
@@ -33,6 +131,8 @@
 			printf(pr_fmt(fmt), ##args);	\
 	} while (0)
 
+#endif /* _DEBUG */
+
 /* Show a message if DEBUG is defined in a file */
 #define debug(fmt, args...)			\
 	debug_cond(_DEBUG, fmt, ##args)
@@ -56,4 +156,146 @@ void __assert_fail(const char *assertion, const char *file, unsigned int line,
 	({ if (!(x) && _DEBUG) \
 		__assert_fail(#x, __FILE__, __LINE__, __func__); })
 
+/**
+ * struct log_rec - a single log record
+ *
+ * Holds information about a single record in the log
+ *
+ * Members marked as 'not allocated' are stored as pointers and the caller is
+ * responsible for making sure that the data pointed to is not overwritten.
+ * Memebers marked as 'allocated' are allocated (e.g. via strdup()) by the log
+ * system.
+ *
+ * @cat: Category, representing a uclass or part of U-Boot
+ * @level: Severity level, less severe is higher
+ * @file: Name of file where the log record was generated (not allocated)
+ * @line: Line number where the log record was generated
+ * @func: Function where the log record was generated (not allocated)
+ * @msg: Log message (allocated)
+ */
+struct log_rec {
+	enum log_category_t cat;
+	enum log_level_t level;
+	const char *file;
+	int line;
+	const char *func;
+	const char *msg;
+};
+
+struct log_device;
+
+/**
+ * struct log_driver - a driver which accepts and processes log records
+ *
+ * @name: Name of driver
+ */
+struct log_driver {
+	const char *name;
+	/**
+	 * emit() - emit a log record
+	 *
+	 * Called by the log system to pass a log record to a particular driver
+	 * for processing. The filter is checked before calling this function.
+	 */
+	int (*emit)(struct log_device *ldev, struct log_rec *rec);
+};
+
+/**
+ * struct log_device - an instance of a log driver
+ *
+ * Since drivers are set up at build-time we need to have a separate device for
+ * the run-time aspects of drivers (currently just a list of filters to apply
+ * to records send to this device).
+ *
+ * @next_filter_num: Seqence number of next filter filter added (0=no filters
+ *	yet). This increments with each new filter on the device, but never
+ *	decrements
+ * @drv: Pointer to driver for this device
+ * @filter_head: List of filters for this device
+ * @sibling_node: Next device in the list of all devices
+ */
+struct log_device {
+	int next_filter_num;
+	struct log_driver *drv;
+	struct list_head filter_head;
+	struct list_head sibling_node;
+};
+
+enum {
+	LOGF_MAX_CATEGORIES = 5,	/* maximum categories per filter */
+};
+
+enum log_filter_flags {
+	LOGFF_HAS_CAT		= 1 << 0,	/* Filter has a category list */
+};
+
+/**
+ * struct log_filter - criterial to filter out log messages
+ *
+ * @filter_num: Sequence number of this filter.  This is returned when adding a
+ *	new filter, and must be provided when removing a previously added
+ *	filter.
+ * @flags: Flags for this filter (LOGFF_...)
+ * @cat_list: List of categories to allow (terminated by LOGC_none). If empty
+ *	then all categories are permitted. Up to LOGF_MAX_CATEGORIES entries
+ *	can be provided
+ * @max_level: Maximum log level to allow
+ * @file_list: List of files to allow, separated by comma. If NULL then all
+ *	files are permitted
+ * @sibling_node: Next filter in the list of filters for this log device
+ */
+struct log_filter {
+	int filter_num;
+	int flags;
+	enum log_category_t cat_list[LOGF_MAX_CATEGORIES];
+	enum log_level_t max_level;
+	const char *file_list;
+	struct list_head sibling_node;
+};
+
+#define LOG_DRIVER(_name) \
+	ll_entry_declare(struct log_driver, _name, log_driver)
+
+/**
+ * log_add_filter() - Add a new filter to a log device
+ *
+ * @drv_name: Driver name to add the filter to (since each driver only has a
+ *	single device)
+ * @cat_list: List of categories to allow (terminated by LOGC_none). If empty
+ *	then all categories are permitted. Up to LOGF_MAX_CATEGORIES entries
+ *	can be provided
+ * @max_level: Maximum log level to allow
+ * @file_list: List of files to allow, separated by comma. If NULL then all
+ *	files are permitted
+ * @return the sequence number of the new filter (>=0) if the filter was added,
+ *	or a -ve value on error
+ */
+int log_add_filter(const char *drv_name, enum log_category_t cat_list[],
+		   enum log_level_t max_level, const char *file_list);
+
+/**
+ * log_remove_filter() - Remove a filter from a log device
+ *
+ * @drv_name: Driver name to remove the filter from (since each driver only has
+ *	a single device)
+ * @filter_num: Filter number to remove (as returned by log_add_filter())
+ * @return 0 if the filter was removed, -ENOENT if either the driver or the
+ *	filter number was not found
+ */
+int log_remove_filter(const char *drv_name, int filter_num);
+
+#if CONFIG_IS_ENABLED(LOG)
+/**
+ * log_init() - Set up the log system ready for use
+ *
+ * @return 0 if OK, -ENOMEM if out of memory
+ */
+int log_init(void);
+#else
+static inline int log_init(void)
+{
+	return 0;
+}
+#endif
+
 #endif

commit 44aaaed168e09186ef8f690fdd02c4920f15ceb6
Author: Simon Glass <sjg@chromium.org>
Date:   Mon Dec 4 13:48:20 2017 -0700

    UPSTREAM: Move debug and logging support to a separate header
    
    Before adding new features, move these definitions to a separate header
    to avoid further cluttering common.h.
    
    Change-Id: Ib4be207f2536b4e9f12f32033c6034cb9fe4ccd7
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 0e98b0a65092d6573eb17d07e04455f9cf545b21)

diff --git a/include/common.h b/include/common.h
index 04d6e2d25e..9b725e8274 100644
--- a/include/common.h
+++ b/include/common.h
@@ -45,51 +45,7 @@ typedef volatile unsigned char	vu_char;
 #define CONFIG_SYS_SUPPORT_64BIT_DATA
 #endif
 
-#ifdef DEBUG
-#define _DEBUG	1
-#else
-#define _DEBUG	0
-#endif
-
-#ifdef CONFIG_SPL_BUILD
-#define _SPL_BUILD	1
-#else
-#define _SPL_BUILD	0
-#endif
-
-/*
- * Output a debug text when condition "cond" is met. The "cond" should be
- * computed by a preprocessor in the best case, allowing for the best
- * optimization.
- */
-#define debug_cond(cond, fmt, args...)			\
-	do {						\
-		if (cond)				\
-			printf(pr_fmt(fmt), ##args);	\
-	} while (0)
-
-/* Show a message if DEBUG is defined in a file */
-#define debug(fmt, args...)			\
-	debug_cond(_DEBUG, fmt, ##args)
-
-/* Show a message if not in SPL */
-#define warn_non_spl(fmt, args...)			\
-	debug_cond(!_SPL_BUILD, fmt, ##args)
-
-/*
- * An assertion is run-time check done in debug mode only. If DEBUG is not
- * defined then it is skipped. If DEBUG is defined and the assertion fails,
- * then it calls panic*( which may or may not reset/halt U-Boot (see
- * CONFIG_PANIC_HANG), It is hoped that all failing assertions are found
- * before release, and after release it is hoped that they don't matter. But
- * in any case these failing assertions cannot be fixed with a reset (which
- * may just do the same assertion again).
- */
-void __assert_fail(const char *assertion, const char *file, unsigned line,
-		   const char *function);
-#define assert(x) \
-	({ if (!(x) && _DEBUG) \
-		__assert_fail(#x, __FILE__, __LINE__, __func__); })
+#include <log.h>
 
 #if (__STDC_VERSION__ >= 201112L) || defined(__cplusplus)
 # undef static_assert
diff --git a/include/log.h b/include/log.h
new file mode 100644
index 0000000000..08ad44cf49
--- /dev/null
+++ b/include/log.h
@@ -0,0 +1,59 @@
+/*
+ * Logging support
+ *
+ * Copyright (c) 2017 Google, Inc
+ * Written by Simon Glass <sjg@chromium.org>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __LOG_H
+#define __LOG_H
+
+#ifdef DEBUG
+#define _DEBUG	1
+#else
+#define _DEBUG	0
+#endif
+
+#ifdef CONFIG_SPL_BUILD
+#define _SPL_BUILD	1
+#else
+#define _SPL_BUILD	0
+#endif
+
+/*
+ * Output a debug text when condition "cond" is met. The "cond" should be
+ * computed by a preprocessor in the best case, allowing for the best
+ * optimization.
+ */
+#define debug_cond(cond, fmt, args...)			\
+	do {						\
+		if (cond)				\
+			printf(pr_fmt(fmt), ##args);	\
+	} while (0)
+
+/* Show a message if DEBUG is defined in a file */
+#define debug(fmt, args...)			\
+	debug_cond(_DEBUG, fmt, ##args)
+
+/* Show a message if not in SPL */
+#define warn_non_spl(fmt, args...)			\
+	debug_cond(!_SPL_BUILD, fmt, ##args)
+
+/*
+ * An assertion is run-time check done in debug mode only. If DEBUG is not
+ * defined then it is skipped. If DEBUG is defined and the assertion fails,
+ * then it calls panic*( which may or may not reset/halt U-Boot (see
+ * CONFIG_PANIC_HANG), It is hoped that all failing assertions are found
+ * before release, and after release it is hoped that they don't matter. But
+ * in any case these failing assertions cannot be fixed with a reset (which
+ * may just do the same assertion again).
+ */
+void __assert_fail(const char *assertion, const char *file, unsigned int line,
+		   const char *function);
+#define assert(x) \
+	({ if (!(x) && _DEBUG) \
+		__assert_fail(#x, __FILE__, __LINE__, __func__); })
+
+#endif

commit 785b4fbf6c5db1eb4c0ddf983292d7ab077c4212
Author: Simon Glass <sjg@chromium.org>
Date:   Mon Dec 4 13:48:23 2017 -0700

    Drop the log buffer
    
    This does not appear to be used by any boards. Before introducing a new
    log system, remove this old one.
    
    Change-Id: I798cd4aff50b7136ae9f84362185f9f73b04f710
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit c5404b64fb5a35d41f7eff6d12b8ffdb0c851040)

diff --git a/cmd/Makefile b/cmd/Makefile
index f8396ce585..a60fa41158 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -81,7 +81,6 @@ obj-$(CONFIG_CMD_LED) += led.o
 obj-$(CONFIG_CMD_LICENSE) += license.o
 obj-y += load.o
 obj-$(CONFIG_CMD_LOAD_ANDROID) += load_android.o android_cmds.o
-obj-$(CONFIG_LOGBUFFER) += log.o
 obj-$(CONFIG_ID_EEPROM) += mac.o
 obj-$(CONFIG_CMD_MD5SUM) += md5sum.o
 obj-$(CONFIG_CMD_MEMORY) += mem.o
diff --git a/cmd/log.c b/cmd/log.c
deleted file mode 100644
index 7a3bd5cd69..0000000000
--- a/cmd/log.c
+++ /dev/null
@@ -1,313 +0,0 @@
-/*
- * (C) Copyright 2002-2007
- * Detlev Zundel, DENX Software Engineering, dzu@denx.de.
- *
- * Code used from linux/kernel/printk.c
- * Copyright (C) 1991, 1992  Linus Torvalds
- *
- * SPDX-License-Identifier:	GPL-2.0+
- *
- * Comments:
- *
- * After relocating the code, the environment variable "loglevel" is
- * copied to console_loglevel.  The functionality is similar to the
- * handling in the Linux kernel, i.e. messages logged with a priority
- * less than console_loglevel are also output to stdout.
- *
- * If you want messages with the default level (e.g. POST messages) to
- * appear on stdout also, make sure the environment variable
- * "loglevel" is set at boot time to a number higher than
- * default_message_loglevel below.
- */
-
-/*
- * Logbuffer handling routines
- */
-
-#include <common.h>
-#include <command.h>
-#include <stdio_dev.h>
-#include <post.h>
-#include <logbuff.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/* Local prototypes */
-static void logbuff_putc(struct stdio_dev *dev, const char c);
-static void logbuff_puts(struct stdio_dev *dev, const char *s);
-static int logbuff_printk(const char *line);
-
-static char buf[1024];
-
-/* This combination will not print messages with the default loglevel */
-static unsigned console_loglevel = 3;
-static unsigned default_message_loglevel = 4;
-static unsigned log_version = 1;
-#ifdef CONFIG_ALT_LB_ADDR
-static volatile logbuff_t *log;
-#else
-static logbuff_t *log;
-#endif
-static char *lbuf;
-
-unsigned long __logbuffer_base(void)
-{
-	return CONFIG_SYS_SDRAM_BASE + get_effective_memsize() - LOGBUFF_LEN;
-}
-unsigned long logbuffer_base(void)
-__attribute__((weak, alias("__logbuffer_base")));
-
-void logbuff_init_ptrs(void)
-{
-	unsigned long tag, post_word;
-	char *s;
-
-#ifdef CONFIG_ALT_LB_ADDR
-	log = (logbuff_t *)CONFIG_ALT_LH_ADDR;
-	lbuf = (char *)CONFIG_ALT_LB_ADDR;
-#else
-	log = (logbuff_t *)(logbuffer_base()) - 1;
-	lbuf = (char *)log->buf;
-#endif
-
-	/* Set up log version */
-	s = env_get("logversion");
-	if (s)
-		log_version = (int)simple_strtoul(s, NULL, 10);
-
-	if (log_version == 2)
-		tag = log->v2.tag;
-	else
-		tag = log->v1.tag;
-	post_word = post_word_load();
-#ifdef CONFIG_POST
-	/* The post routines have setup the word so we can simply test it */
-	if (tag != LOGBUFF_MAGIC || (post_word & POST_COLDBOOT))
-		logbuff_reset();
-#else
-	/* No post routines, so we do our own checking                    */
-	if (tag != LOGBUFF_MAGIC || post_word != LOGBUFF_MAGIC) {
-		logbuff_reset ();
-		post_word_store (LOGBUFF_MAGIC);
-	}
-#endif
-	if (log_version == 2 && (long)log->v2.start > (long)log->v2.con)
-		log->v2.start = log->v2.con;
-
-	/* Initialize default loglevel if present */
-	s = env_get("loglevel");
-	if (s)
-		console_loglevel = (int)simple_strtoul(s, NULL, 10);
-
-	gd->flags |= GD_FLG_LOGINIT;
-}
-
-void logbuff_reset(void)
-{
-#ifndef CONFIG_ALT_LB_ADDR
-	memset(log, 0, sizeof(logbuff_t));
-#endif
-	if (log_version == 2) {
-		log->v2.tag = LOGBUFF_MAGIC;
-#ifdef CONFIG_ALT_LB_ADDR
-		log->v2.start = 0;
-		log->v2.con = 0;
-		log->v2.end = 0;
-		log->v2.chars = 0;
-#endif
-	} else {
-		log->v1.tag = LOGBUFF_MAGIC;
-#ifdef CONFIG_ALT_LB_ADDR
-		log->v1.dummy = 0;
-		log->v1.start = 0;
-		log->v1.size = 0;
-		log->v1.chars = 0;
-#endif
-	}
-}
-
-int drv_logbuff_init(void)
-{
-	struct stdio_dev logdev;
-	int rc;
-
-	/* Device initialization */
-	memset (&logdev, 0, sizeof (logdev));
-
-	strcpy (logdev.name, "logbuff");
-	logdev.ext   = 0;			/* No extensions */
-	logdev.flags = DEV_FLAGS_OUTPUT;	/* Output only */
-	logdev.putc  = logbuff_putc;		/* 'putc' function */
-	logdev.puts  = logbuff_puts;		/* 'puts' function */
-
-	rc = stdio_register(&logdev);
-
-	return (rc == 0) ? 1 : rc;
-}
-
-static void logbuff_putc(struct stdio_dev *dev, const char c)
-{
-	char buf[2];
-	buf[0] = c;
-	buf[1] = '\0';
-	logbuff_printk(buf);
-}
-
-static void logbuff_puts(struct stdio_dev *dev, const char *s)
-{
-	logbuff_printk (s);
-}
-
-void logbuff_log(char *msg)
-{
-	if ((gd->flags & GD_FLG_LOGINIT)) {
-		logbuff_printk(msg);
-	} else {
-		/*
-		 * Can happen only for pre-relocated errors as logging
-		 * at that stage should be disabled
-		 */
-		puts (msg);
-	}
-}
-
-/*
- * Subroutine:  do_log
- *
- * Description: Handler for 'log' command..
- *
- * Inputs:	argv[1] contains the subcommand
- *
- * Return:      None
- *
- */
-int do_log(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
-	struct stdio_dev *sdev = NULL;
-	char *s;
-	unsigned long i, start, size;
-
-	if (strcmp(argv[1], "append") == 0) {
-		/* Log concatenation of all arguments separated by spaces */
-		for (i = 2; i < argc; i++) {
-			logbuff_printk(argv[i]);
-			logbuff_putc(sdev, (i < argc - 1) ? ' ' : '\n');
-		}
-		return 0;
-	}
-
-	switch (argc) {
-
-	case 2:
-		if (strcmp(argv[1], "show") == 0) {
-			if (log_version == 2) {
-				start = log->v2.start;
-				size = log->v2.end - log->v2.start;
-			} else {
-				start = log->v1.start;
-				size = log->v1.size;
-			}
-			if (size > LOGBUFF_LEN)
-				size = LOGBUFF_LEN;
-			for (i = 0; i < size; i++) {
-				s = lbuf + ((start + i) & LOGBUFF_MASK);
-				putc(*s);
-			}
-			return 0;
-		} else if (strcmp(argv[1], "reset") == 0) {
-			logbuff_reset();
-			return 0;
-		} else if (strcmp(argv[1], "info") == 0) {
-			printf("Logbuffer   at  %08lx\n", (unsigned long)lbuf);
-			if (log_version == 2) {
-				printf("log_start    =  %08lx\n",
-					log->v2.start);
-				printf("log_end      =  %08lx\n", log->v2.end);
-				printf("log_con      =  %08lx\n", log->v2.con);
-				printf("logged_chars =  %08lx\n",
-					log->v2.chars);
-			}
-			else {
-				printf("log_start    =  %08lx\n",
-					log->v1.start);
-				printf("log_size     =  %08lx\n",
-					log->v1.size);
-				printf("logged_chars =  %08lx\n",
-					log->v1.chars);
-			}
-			return 0;
-		}
-		return CMD_RET_USAGE;
-
-	default:
-		return CMD_RET_USAGE;
-	}
-}
-
-U_BOOT_CMD(
-	log,     255,	1,	do_log,
-	"manipulate logbuffer",
-	"info   - show pointer details\n"
-	"log reset  - clear contents\n"
-	"log show   - show contents\n"
-	"log append <msg> - append <msg> to the logbuffer"
-);
-
-static int logbuff_printk(const char *line)
-{
-	int i;
-	char *msg, *p, *buf_end;
-	int line_feed;
-	static signed char msg_level = -1;
-
-	strcpy(buf + 3, line);
-	i = strlen(line);
-	buf_end = buf + 3 + i;
-	for (p = buf + 3; p < buf_end; p++) {
-		msg = p;
-		if (msg_level < 0) {
-			if (
-				p[0] != '<' ||
-				p[1] < '0' ||
-				p[1] > '7' ||
-				p[2] != '>'
-			) {
-				p -= 3;
-				p[0] = '<';
-				p[1] = default_message_loglevel + '0';
-				p[2] = '>';
-			} else {
-				msg += 3;
-			}
-			msg_level = p[1] - '0';
-		}
-		line_feed = 0;
-		for (; p < buf_end; p++) {
-			if (log_version == 2) {
-				lbuf[log->v2.end & LOGBUFF_MASK] = *p;
-				log->v2.end++;
-				if (log->v2.end - log->v2.start > LOGBUFF_LEN)
-					log->v2.start++;
-				log->v2.chars++;
-			} else {
-				lbuf[(log->v1.start + log->v1.size) &
-					 LOGBUFF_MASK] = *p;
-				if (log->v1.size < LOGBUFF_LEN)
-					log->v1.size++;
-				else
-					log->v1.start++;
-				log->v1.chars++;
-			}
-			if (*p == '\n') {
-				line_feed = 1;
-				break;
-			}
-		}
-		if (msg_level < console_loglevel) {
-			printf("%s", msg);
-		}
-		if (line_feed)
-			msg_level = -1;
-	}
-	return i;
-}
diff --git a/common/board_f.c b/common/board_f.c
index 104d144f41..d0b1a00175 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -19,7 +19,6 @@
 #include <i2c.h>
 #include <initcall.h>
 #include <init_helpers.h>
-#include <logbuff.h>
 #include <malloc.h>
 #include <mapmem.h>
 #include <os.h>
@@ -296,20 +295,6 @@ static int setup_dest_addr(void)
 	return 0;
 }
 
-#if defined(CONFIG_LOGBUFFER)
-static int reserve_logbuffer(void)
-{
-#ifndef CONFIG_ALT_LB_ADDR
-	/* reserve kernel log buffer */
-	gd->relocaddr -= LOGBUFF_RESERVE;
-	debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
-		gd->relocaddr);
-#endif
-
-	return 0;
-}
-#endif
-
 #ifdef CONFIG_PRAM
 /* reserve protected RAM */
 static int reserve_pram(void)
@@ -846,9 +831,6 @@ static const init_fnc_t init_sequence_f[] = {
 	 *  - board info struct
 	 */
 	setup_dest_addr,
-#if defined(CONFIG_LOGBUFFER)
-	reserve_logbuffer,
-#endif
 #ifdef CONFIG_PRAM
 	reserve_pram,
 #endif
diff --git a/common/board_r.c b/common/board_r.c
index a3b9bfb8ee..89729d7736 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -30,7 +30,6 @@
 #if defined(CONFIG_CMD_KGDB)
 #include <kgdb.h>
 #endif
-#include <logbuff.h>
 #include <malloc.h>
 #include <mapmem.h>
 #ifdef CONFIG_BITBANGMII
@@ -200,19 +199,6 @@ static int initr_addr_map(void)
 }
 #endif
 
-#ifdef CONFIG_LOGBUFFER
-unsigned long logbuffer_base(void)
-{
-	return gd->ram_top - LOGBUFF_LEN;
-}
-
-static int initr_logbuffer(void)
-{
-	logbuff_init_ptrs();
-	return 0;
-}
-#endif
-
 #ifdef CONFIG_POST
 static int initr_post_backlog(void)
 {
@@ -628,7 +614,7 @@ static int initr_ide(void)
 }
 #endif
 
-#if defined(CONFIG_PRAM) || defined(CONFIG_LOGBUFFER)
+#if defined(CONFIG_PRAM)
 /*
  * Export available size of memory for Linux, taking into account the
  * protected RAM at top of memory
@@ -640,10 +626,6 @@ int initr_mem(void)
 
 # ifdef CONFIG_PRAM
 	pram = env_get_ulong("pram", 10, CONFIG_PRAM);
-# endif
-# if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
-	/* Also take the logbuffer into account (pram is in kB) */
-	pram += (LOGBUFF_LEN + LOGBUFF_OVERHEAD) / 1024;
 # endif
 	sprintf(memsz, "%ldk", (long int) ((gd->ram_size / 1024) - pram));
 	env_set("mem", memsz);
@@ -753,9 +735,6 @@ static init_fnc_t init_sequence_r[] = {
 	board_early_init_r,
 #endif
 	INIT_FUNC_WATCHDOG_RESET
-#ifdef CONFIG_LOGBUFFER
-	initr_logbuffer,
-#endif
 #ifdef CONFIG_POST
 	initr_post_backlog,
 #endif
@@ -877,7 +856,7 @@ static init_fnc_t init_sequence_r[] = {
 	INIT_FUNC_WATCHDOG_RESET
 	initr_bedbug,
 #endif
-#if defined(CONFIG_PRAM) || defined(CONFIG_LOGBUFFER)
+#if defined(CONFIG_PRAM)
 	initr_mem,
 #endif
 #ifdef CONFIG_PS2KBD
diff --git a/common/image.c b/common/image.c
index 20f453de2d..af8ba7312a 100644
--- a/common/image.c
+++ b/common/image.c
@@ -15,10 +15,6 @@
 #include <status_led.h>
 #endif
 
-#ifdef CONFIG_LOGBUFFER
-#include <logbuff.h>
-#endif
-
 #include <rtc.h>
 
 #include <environment.h>
@@ -1155,11 +1151,6 @@ int boot_ramdisk_high(struct lmb *lmb, ulong rd_data, ulong rd_len,
 	}
 
 
-#ifdef CONFIG_LOGBUFFER
-	/* Prevent initrd from overwriting logbuffer */
-	lmb_reserve(lmb, logbuffer_base() - LOGBUFF_OVERHEAD, LOGBUFF_RESERVE);
-#endif
-
 	debug("## initrd_high = 0x%08lx, copy_to_ram = %d\n",
 			initrd_high, initrd_copy_to_ram);
 
diff --git a/common/stdio.c b/common/stdio.c
index ee4f0bda9e..2e5143a025 100644
--- a/common/stdio.c
+++ b/common/stdio.c
@@ -17,9 +17,6 @@
 #include <malloc.h>
 #include <stdio_dev.h>
 #include <serial.h>
-#ifdef CONFIG_LOGBUFFER
-#include <logbuff.h>
-#endif
 
 #if defined(CONFIG_SYS_I2C)
 #include <i2c.h>
@@ -380,9 +377,6 @@ int stdio_add_devices(void)
 #endif /* CONFIG_DM_VIDEO */
 #if defined(CONFIG_KEYBOARD) && !defined(CONFIG_DM_KEYBOARD)
 	drv_keyboard_init ();
-#endif
-#ifdef CONFIG_LOGBUFFER
-	drv_logbuff_init ();
 #endif
 	drv_system_init ();
 	serial_stdio_init ();
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index dc2d6e8ce4..30dd8be308 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -43,7 +43,7 @@ typedef struct global_data {
 #if defined(CONFIG_LCD) || defined(CONFIG_VIDEO)
 	unsigned long fb_base;		/* Base address of framebuffer mem */
 #endif
-#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
+#if defined(CONFIG_POST)
 	unsigned long post_log_word;	/* Record POST activities */
 	unsigned long post_log_res;	/* success of POST test */
 	unsigned long post_init_f_time;	/* When post_init_f started */
diff --git a/include/logbuff.h b/include/logbuff.h
deleted file mode 100644
index 625feb9f95..0000000000
--- a/include/logbuff.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * (C) Copyright 2002-2007
- * Detlev Zundel, dzu@denx.de.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-#ifndef _LOGBUFF_H
-#define _LOGBUFF_H
-
-#ifdef CONFIG_LOGBUFFER
-
-#define LOGBUFF_MAGIC	0xc0de4ced	/* Forced by code, eh!	*/
-#define LOGBUFF_LEN	(16384)	/* Must be 16k right now */
-#define LOGBUFF_MASK	(LOGBUFF_LEN-1)
-#define LOGBUFF_OVERHEAD (4096) /* Logbuffer overhead for extra info */
-#define LOGBUFF_RESERVE (LOGBUFF_LEN+LOGBUFF_OVERHEAD)
-
-/* The mapping used here has to be the same as in setup_ext_logbuff ()
-   in linux/kernel/printk */
-
-typedef struct {
-	union {
-		struct {
-			unsigned long	tag;
-			unsigned long	start;
-			unsigned long	con;
-			unsigned long	end;
-			unsigned long	chars;
-		} v2;
-		struct {
-			unsigned long	dummy;
-			unsigned long	tag;
-			unsigned long	start;
-			unsigned long	size;
-			unsigned long	chars;
-		} v1;
-	};
-	unsigned char	buf[0];
-} logbuff_t;
-
-int drv_logbuff_init (void);
-void logbuff_init_ptrs (void);
-void logbuff_log(char *msg);
-void logbuff_reset (void);
-unsigned long logbuffer_base (void);
-
-#endif /* CONFIG_LOGBUFFER */
-
-#endif /* _LOGBUFF_H */
diff --git a/include/post.h b/include/post.h
index d5278111e8..b41a6c8127 100644
--- a/include/post.h
+++ b/include/post.h
@@ -15,7 +15,7 @@
 #include <common.h>
 #include <asm/io.h>
 
-#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
+#if defined(CONFIG_POST)
 
 #ifndef CONFIG_POST_EXTERNAL_WORD_FUNCS
 #ifdef CONFIG_SYS_POST_WORD_ADDR
@@ -58,7 +58,7 @@ extern ulong post_word_load(void);
 extern void post_word_store(ulong value);
 
 #endif /* CONFIG_POST_EXTERNAL_WORD_FUNCS */
-#endif /* defined (CONFIG_POST) || defined(CONFIG_LOGBUFFER) */
+#endif /* defined (CONFIG_POST) */
 #endif /* __ASSEMBLY__ */
 
 #ifdef CONFIG_POST
diff --git a/post/post.c b/post/post.c
index 8fef0c3412..6c7902ad0c 100644
--- a/post/post.c
+++ b/post/post.c
@@ -15,10 +15,6 @@
 #include <asm/gpio.h>
 #endif
 
-#ifdef CONFIG_LOGBUFFER
-#include <logbuff.h>
-#endif
-
 DECLARE_GLOBAL_DATA_PTR;
 
 #define POST_MAX_NUMBER		32
@@ -407,13 +403,8 @@ int post_log(char *format, ...)
 	vsprintf(printbuffer, format, args);
 	va_end(args);
 
-#ifdef CONFIG_LOGBUFFER
-	/* Send to the logbuffer */
-	logbuff_log(printbuffer);
-#else
 	/* Send to the stdout file */
 	puts(printbuffer);
-#endif
 
 	return 0;
 }
diff --git a/post/tests.c b/post/tests.c
index bc8e398051..473c0ea1e1 100644
--- a/post/tests.c
+++ b/post/tests.c
@@ -3,10 +3,6 @@
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  *
  * SPDX-License-Identifier:	GPL-2.0+
- *
- * Be sure to mark tests to be run before relocation as such with the
- * CONFIG_SYS_POST_PREREL flag so that logging is done correctly if the
- * logbuffer support is enabled.
  */
 
 #include <common.h>
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index f73f765bbb..f22cf55ae3 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -1293,7 +1293,6 @@ CONFIG_LMS283GF05
 CONFIG_LOADADDR
 CONFIG_LOADCMD
 CONFIG_LOADS_ECHO
-CONFIG_LOGBUFFER
 CONFIG_LOWPOWER_ADDR
 CONFIG_LOWPOWER_FLAG
 CONFIG_LOW_MCFCLK

commit 143f37beff3943be7ecda8db416a6b1b10d09b86
Author: Simon Glass <sjg@chromium.org>
Date:   Mon Dec 4 13:48:22 2017 -0700

    UPSTREAM: usb: Correct use of debug()
    
    With clang this gives a warning because hubsts appears to be used before
    it is set, even if ultimately it is not used. Simplify the code to avoid
    this problem.
    
    Change-Id: If765f7b0c909de125e163875856e43ddf9b6c5d5
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 0ad0458c76107b29325b8c38804e0407bed42a79)

diff --git a/common/usb_hub.c b/common/usb_hub.c
index 024dadb277..b46dfa16cc 100644
--- a/common/usb_hub.c
+++ b/common/usb_hub.c
@@ -625,7 +625,7 @@ static int usb_hub_configure(struct usb_device *dev)
 	short hubCharacteristics;
 	struct usb_hub_descriptor *descriptor;
 	struct usb_hub_device *hub;
-	__maybe_unused struct usb_hub_status *hubsts;
+	struct usb_hub_status *hubsts;
 	int ret;
 
 	hub = usb_get_hub_device(dev);
@@ -779,9 +779,7 @@ static int usb_hub_configure(struct usb_device *dev)
 		return ret;
 	}
 
-#ifdef DEBUG
 	hubsts = (struct usb_hub_status *)buffer;
-#endif
 
 	debug("get_hub_status returned status %X, change %X\n",
 	      le16_to_cpu(hubsts->wHubStatus),

commit 00ac81b92dd89dc8c8c8cf4b1942b53d97b6d2f4
Author: Maxime Ripard <maxime.ripard@free-electrons.com>
Date:   Tue Nov 14 21:07:51 2017 +0100

    UPSTREAM: part: efi: Add default number of partition entries for sunxi
    
    The SPL must be located at 8kB (16 sectors) offset. That's right in the
    middle of the GPT, so we need to define a smaller amount of partitions to
    accomodate for that location.
    
    Reviewed-by: Andre Przywara <andre.przywara@arm.com>
    Change-Id: I7932a388389b15237bed18321606f034a47534a3
    Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 5dc0256d1210cb38ba11b22a8eb2ccc101460963)

diff --git a/disk/Kconfig b/disk/Kconfig
index 1d32eee8dd..c5d30331ce 100644
--- a/disk/Kconfig
+++ b/disk/Kconfig
@@ -81,6 +81,7 @@ config EFI_PARTITION
 config EFI_PARTITION_ENTRIES_NUMBERS
 	int "Number of the EFI partition entries"
 	depends on EFI_PARTITION
+	default 56 if ARCH_SUNXI
 	default 128
 	help
 	  Specify the number of partition entries in the GPT. This is

commit 025e2e5af20faf08c282614aaa9626d87de3fe62
Author: Maxime Ripard <maxime.ripard@free-electrons.com>
Date:   Tue Nov 14 20:50:04 2017 +0100

    UPSTREAM: part: efi: Add a Kconfig option for the number of partition entries
    
    On some SoCs, the SPL needs to be located right in the middle of the GPT
    partition entries.
    
    One way to work around that is to create partition entries for a smaller
    number of partitions to accomodate with where the SPL will be. Create a
    Kconfig option to allow to do that.
    
    Reviewed-by: Andre Przywara <andre.przywara@arm.com>
    Reviewed-by: Tom Rini <trini@konsulko.com>
    Change-Id: Ic06f18722c0a835829042540f1f7a4364924624d
    Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 4ce521977f79a883f9c47984ef675c4b2267b7ad)

diff --git a/disk/Kconfig b/disk/Kconfig
index 1489e6569f..1d32eee8dd 100644
--- a/disk/Kconfig
+++ b/disk/Kconfig
@@ -78,6 +78,19 @@ config EFI_PARTITION
 	  common when EFI is the bootloader.  Note 2TB partition limit;
 	  see disk/part_efi.c
 
+config EFI_PARTITION_ENTRIES_NUMBERS
+	int "Number of the EFI partition entries"
+	depends on EFI_PARTITION
+	default 128
+	help
+	  Specify the number of partition entries in the GPT. This is
+	  meant to allow less than the standard specifies for devices
+	  that might need to place their first-stage bootloader in the
+	  middle of a regular GPT.
+
+	  If unsure, leave at 128 entries, which is the standard
+	  number.
+
 config EFI_PARTITION_ENTRIES_OFF
         int "Offset (in bytes) of the EFI partition entries"
 	depends on EFI_PARTITION
diff --git a/include/part_efi.h b/include/part_efi.h
index 31e6bc6e14..4c8f6cc473 100644
--- a/include/part_efi.h
+++ b/include/part_efi.h
@@ -27,7 +27,7 @@
 #define GPT_HEADER_SIGNATURE 0x5452415020494645ULL
 #define GPT_HEADER_REVISION_V1 0x00010000
 #define GPT_PRIMARY_PARTITION_TABLE_LBA 1ULL
-#define GPT_ENTRY_NUMBERS		128
+#define GPT_ENTRY_NUMBERS		CONFIG_EFI_PARTITION_ENTRIES_NUMBERS
 #define GPT_ENTRY_SIZE			128
 
 #define PARTITION_SYSTEM_GUID \

commit 51b432dabb847aa90e068ae96021ab6679b75bc4
Author: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Date:   Fri Dec 1 14:39:40 2017 +0900

    UPSTREAM: cmd: i2c: Fix use sdram sub command with CONFIG_DM_I2C
    
    sdram sub command of i2c command does not support Drivers Model.
    This adds Drivers Model support to sdram sub command.
    
    Change-Id: I405d05b9b697715759a68ba71597cd9ae63d9565
    Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Heiko Schocher <hs@denx.de>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 28df8ed07f2ae936e9af28c146d555ed4d0c122a)

diff --git a/cmd/i2c.c b/cmd/i2c.c
index 3dd7c6ba4d..bfddf8be1b 100644
--- a/cmd/i2c.c
+++ b/cmd/i2c.c
@@ -1156,7 +1156,10 @@ static int do_sdram (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
 	uint	chip;
 	u_char	data[128];
 	u_char	cksum;
-	int	j;
+	int	j, ret;
+#ifdef CONFIG_DM_I2C
+	struct udevice *dev;
+#endif
 
 	static const char *decode_CAS_DDR2[] = {
 		" TBD", " 6", " 5", " 4", " 3", " 2", " TBD", " TBD"
@@ -1210,7 +1213,14 @@ static int do_sdram (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
 	 */
 	chip = simple_strtoul (argv[1], NULL, 16);
 
-	if (i2c_read (chip, 0, 1, data, sizeof (data)) != 0) {
+#ifdef CONFIG_DM_I2C
+	ret = i2c_get_cur_bus_chip(chip, &dev);
+	if (!ret)
+		ret = dm_i2c_read(dev, 0, data, sizeof(data));
+#else
+	ret = i2c_read(chip, 0, 1, data, sizeof(data));
+#endif
+	if (ret) {
 		puts ("No SDRAM Serial Presence Detect found.\n");
 		return 1;
 	}

commit b3e08737315d8639f7aed97bac18c9809cabd3de
Author: Peng Fan <peng.fan@nxp.com>
Date:   Thu Nov 30 10:07:07 2017 +0800

    UPSTREAM: scripts: spl: fix typo
    
    Typo fix: CONIFG->CONFIG
    
    Change-Id: Ib4a1e77aacf0bc3cae32158623c3805cd279fd9f
    Signed-off-by: Peng Fan <peng.fan@nxp.com>
    Cc: Tom Rini <trini@konsulko.com>
    Cc: Simon Glass <sjg@chromium.org>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 448df354b0725093f857e15a4ab5e849c4ecf3e0)

diff --git a/scripts/Makefile.uncmd_spl b/scripts/Makefile.uncmd_spl
index 15d0836b49..b3994110dc 100644
--- a/scripts/Makefile.uncmd_spl
+++ b/scripts/Makefile.uncmd_spl
@@ -9,7 +9,7 @@ ifdef CONFIG_SPL_BUILD
 ifndef CONFIG_SPL_DM
 CONFIG_DM_SERIAL=
 CONFIG_DM_GPIO=
-CONIFG_DM_I2C=
+CONFIG_DM_I2C=
 CONFIG_DM_SPI=
 CONFIG_DM_SPI_FLASH=
 endif

commit 8a04b1c15a79e1a504521ca9aa415ac196d1e72d
Author: Peng Fan <peng.fan@nxp.com>
Date:   Tue Nov 28 10:31:28 2017 +0800

    UPSTREAM: armv8: mmu: fix page table mapping
    
    To page mapping the lowest 2 bits needs to be 0x3.
    If not fix this, the final lowest 3 bits for page mapping is 0x1
    which is marked as reserved.
    
    Change-Id: I5ac722421b46514736d93452aab68debe8aabfe5
    Signed-off-by: Peng Fan <peng.fan@nxp.com>
    Reviewed-by: York Sun <york.sun@nxp.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 90351547ceeb76c1337757c51af0fb5a2c30bd02)

diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c
index adc7e1746f..6548f3c912 100644
--- a/arch/arm/cpu/armv8/cache_v8.c
+++ b/arch/arm/cpu/armv8/cache_v8.c
@@ -230,7 +230,10 @@ static void add_map(struct mm_region *map)
 				/* Page fits, create block PTE */
 				debug("Setting PTE %p to block virt=%llx\n",
 				      pte, virt);
-				*pte = phys | attrs;
+				if (level == 3)
+					*pte = phys | attrs | PTE_TYPE_PAGE;
+				else
+					*pte = phys | attrs;
 				virt += blocksize;
 				phys += blocksize;
 				size -= blocksize;
diff --git a/arch/arm/include/asm/armv8/mmu.h b/arch/arm/include/asm/armv8/mmu.h
index 6121aab547..765914c7e2 100644
--- a/arch/arm/include/asm/armv8/mmu.h
+++ b/arch/arm/include/asm/armv8/mmu.h
@@ -43,6 +43,7 @@
 #define PTE_TYPE_MASK		(3 << 0)
 #define PTE_TYPE_FAULT		(0 << 0)
 #define PTE_TYPE_TABLE		(3 << 0)
+#define PTE_TYPE_PAGE		(3 << 0)
 #define PTE_TYPE_BLOCK		(1 << 0)
 #define PTE_TYPE_VALID		(1 << 0)
 

commit 5e076729c1804b0d68509e0bf0f38c7dbf3679cd
Author: Peng Fan <peng.fan@nxp.com>
Date:   Tue Nov 28 10:08:08 2017 +0800

    arm64 :show_regs: show the address before relocation
    
    After relocation, when error happends, it is hard to track
    ELR and LR with asm file objdumped from elf file.
    
    So subtract the gd->reloc_off the reflect the compliation address.
    
    Change-Id: I1db18049b1e895c74ec75ed6ce77231cf4f03bce
    Signed-off-by: Peng Fan <peng.fan@nxp.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 082693f4f02ad7a9de192e73feae34e28856b8e3)

diff --git a/arch/arm/lib/interrupts_64.c b/arch/arm/lib/interrupts_64.c
index 65e313e844..061f23c652 100644
--- a/arch/arm/lib/interrupts_64.c
+++ b/arch/arm/lib/interrupts_64.c
@@ -9,7 +9,9 @@
 #include <linux/compiler.h>
 #include <efi_loader.h>
 
+DECLARE_GLOBAL_DATA_PTR;
 #if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_IRQ)
+
 int interrupt_init(void)
 {
 	return 0;
@@ -30,8 +32,13 @@ void show_regs(struct pt_regs *regs)
 {
 	int i;
 
-	printf("ELR:     %lx\n", regs->elr);
-	printf("LR:      %lx\n", regs->regs[30]);
+	if (gd->flags & GD_FLG_RELOC) {
+		printf("ELR:     %lx\n", regs->elr - gd->reloc_off);
+		printf("LR:      %lx\n", regs->regs[30] - gd->reloc_off);
+	} else {
+		printf("ELR:     %lx\n", regs->elr);
+		printf("LR:      %lx\n", regs->regs[30]);
+	}
 	for (i = 0; i < 29; i += 2)
 		printf("x%-2d: %016lx x%-2d: %016lx\n",
 		       i, regs->regs[i], i+1, regs->regs[i+1]);

commit 70b70db64ac992884833f4236132201c16a77c53
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Mon Nov 27 16:06:07 2017 +0900

    UPSTREAM: libfdt: migrate fdt_wip.c to a wrapper of scripts/dtc/libfdt/fdt_wip.c
    
    Now, lib/libfdt/fdt_wip.c is the same as scripts/dtc/libfdt/fdt_wip.c
    
    Change the former to a wrapper of the latter.
    
    Change-Id: Ifce4c63db38146297c14218ef94d226bf6e3bb27
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 26e961c8cfdff00c5c9389d301d9a2eb10eb844c)

diff --git a/lib/libfdt/Makefile b/lib/libfdt/Makefile
index 369bbf9ba3..be42e946b7 100644
--- a/lib/libfdt/Makefile
+++ b/lib/libfdt/Makefile
@@ -8,6 +8,7 @@
 # Use upstream code.
 obj-y += \
 	fdt.o \
+	fdt_wip.o \
 	fdt_strerror.o \
 	fdt_sw.o \
 	fdt_empty_tree.o \
@@ -19,8 +20,7 @@ obj-$(CONFIG_OF_LIBFDT_OVERLAY) += fdt_overlay.o
 # TODO: split out the local modifiction.
 obj-y += \
 	fdt_ro.o \
-	fdt_rw.o \
-	fdt_wip.o \
+	fdt_rw.o
 
 # U-Boot own file
 obj-y += fdt_region.o
diff --git a/lib/libfdt/fdt_wip.c b/lib/libfdt/fdt_wip.c
index 7274c81b62..6a771d0660 100644
--- a/lib/libfdt/fdt_wip.c
+++ b/lib/libfdt/fdt_wip.c
@@ -1,98 +1,2 @@
-/*
- * libfdt - Flat Device Tree manipulation
- * Copyright (C) 2006 David Gibson, IBM Corporation.
- * SPDX-License-Identifier:	GPL-2.0+ BSD-2-Clause
- */
-#include <libfdt_env.h>
-
-#ifndef USE_HOSTCC
-#include <fdt.h>
-#include <libfdt.h>
-#else
-#include "fdt_host.h"
-#endif
-
-#include "libfdt_internal.h"
-
-int fdt_setprop_inplace_namelen_partial(void *fdt, int nodeoffset,
-					const char *name, int namelen,
-					uint32_t idx, const void *val,
-					int len)
-{
-	void *propval;
-	int proplen;
-
-	propval = fdt_getprop_namelen_w(fdt, nodeoffset, name, namelen,
-					&proplen);
-	if (!propval)
-		return proplen;
-
-	if (proplen < (len + idx))
-		return -FDT_ERR_NOSPACE;
-
-	memcpy((char *)propval + idx, val, len);
-	return 0;
-}
-
-int fdt_setprop_inplace(void *fdt, int nodeoffset, const char *name,
-			const void *val, int len)
-{
-	const void *propval;
-	int proplen;
-
-	propval = fdt_getprop(fdt, nodeoffset, name, &proplen);
-	if (!propval)
-		return proplen;
-
-	if (proplen != len)
-		return -FDT_ERR_NOSPACE;
-
-	return fdt_setprop_inplace_namelen_partial(fdt, nodeoffset, name,
-						   strlen(name), 0,
-						   val, len);
-}
-
-static void _fdt_nop_region(void *start, int len)
-{
-	fdt32_t *p;
-
-	for (p = start; (char *)p < ((char *)start + len); p++)
-		*p = cpu_to_fdt32(FDT_NOP);
-}
-
-int fdt_nop_property(void *fdt, int nodeoffset, const char *name)
-{
-	struct fdt_property *prop;
-	int len;
-
-	prop = fdt_get_property_w(fdt, nodeoffset, name, &len);
-	if (!prop)
-		return len;
-
-	_fdt_nop_region(prop, len + sizeof(*prop));
-
-	return 0;
-}
-
-int _fdt_node_end_offset(void *fdt, int offset)
-{
-	int depth = 0;
-
-	while ((offset >= 0) && (depth >= 0))
-		offset = fdt_next_node(fdt, offset, &depth);
-
-	return offset;
-}
-
-int fdt_nop_node(void *fdt, int nodeoffset)
-{
-	int endoffset;
-
-	endoffset = _fdt_node_end_offset(fdt, nodeoffset);
-	if (endoffset < 0)
-		return endoffset;
-
-	_fdt_nop_region(fdt_offset_ptr_w(fdt, nodeoffset, 0),
-			endoffset - nodeoffset);
-	return 0;
-}
+#include <linux/libfdt_env.h>
+#include "../../scripts/dtc/libfdt/fdt_wip.c"
diff --git a/tools/Makefile b/tools/Makefile
index 1cf37bd5e1..89827564e6 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -61,11 +61,11 @@ FIT_SIG_OBJS-$(CONFIG_FIT_SIGNATURE) := common/image-sig.o
 
 # The following files are synced with upstream DTC.
 # Use synced versions from scripts/dtc/libfdt/.
-LIBFDT_SRCS_SYNCED := fdt.c fdt_sw.c fdt_strerror.c fdt_empty_tree.c \
+LIBFDT_SRCS_SYNCED := fdt.c fdt_wip.c fdt_sw.c fdt_strerror.c fdt_empty_tree.c \
 		      fdt_addresses.c fdt_overlay.c
 # The following files are locally modified for U-Boot (unfotunately).
 # Use U-Boot own versions from lib/libfdt/.
-LIBFDT_SRCS_UNSYNCED := fdt_ro.c fdt_wip.c fdt_rw.c fdt_region.c
+LIBFDT_SRCS_UNSYNCED := fdt_ro.c fdt_rw.c fdt_region.c
 
 LIBFDT_OBJS := $(addprefix libfdt/, $(patsubst %.c, %.o, $(LIBFDT_SRCS_SYNCED))) \
 	       $(addprefix lib/libfdt/, $(patsubst %.c, %.o, $(LIBFDT_SRCS_UNSYNCED)))
diff --git a/tools/libfdt/fdt_wip.c b/tools/libfdt/fdt_wip.c
new file mode 100644
index 0000000000..bad73ed9e7
--- /dev/null
+++ b/tools/libfdt/fdt_wip.c
@@ -0,0 +1,2 @@
+#include "fdt_host.h"
+#include "../scripts/dtc/libfdt/fdt_wip.c"

commit e1c372819040cec511ced88ea990c38b91d0e2a0
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Mon Nov 27 16:06:06 2017 +0900

    UPSTREAM: libfdt: move fdt_find_regions() to fdt_region.c from fdt_wip.c
    
    All the other fdt_*_region() functions are located in fdt_region.c,
    while only fdt_find_regions() was added to fdt_wip.c, strangely.
    
    Move it to the suitable place.
    
    Change-Id: I463419815b4132b6e39b5b02a857126201a854fb
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 87be1e9fb4dcc130e90d497cc5ce49c715efc6c2)

diff --git a/lib/libfdt/fdt_region.c b/lib/libfdt/fdt_region.c
index 63099f1d96..5bfc4da370 100644
--- a/lib/libfdt/fdt_region.c
+++ b/lib/libfdt/fdt_region.c
@@ -16,6 +16,135 @@
 
 #include "libfdt_internal.h"
 
+#define FDT_MAX_DEPTH	32
+
+static int str_in_list(const char *str, char * const list[], int count)
+{
+	int i;
+
+	for (i = 0; i < count; i++)
+		if (!strcmp(list[i], str))
+			return 1;
+
+	return 0;
+}
+
+int fdt_find_regions(const void *fdt, char * const inc[], int inc_count,
+		     char * const exc_prop[], int exc_prop_count,
+		     struct fdt_region region[], int max_regions,
+		     char *path, int path_len, int add_string_tab)
+{
+	int stack[FDT_MAX_DEPTH] = { 0 };
+	char *end;
+	int nextoffset = 0;
+	uint32_t tag;
+	int count = 0;
+	int start = -1;
+	int depth = -1;
+	int want = 0;
+	int base = fdt_off_dt_struct(fdt);
+
+	end = path;
+	*end = '\0';
+	do {
+		const struct fdt_property *prop;
+		const char *name;
+		const char *str;
+		int include = 0;
+		int stop_at = 0;
+		int offset;
+		int len;
+
+		offset = nextoffset;
+		tag = fdt_next_tag(fdt, offset, &nextoffset);
+		stop_at = nextoffset;
+
+		switch (tag) {
+		case FDT_PROP:
+			include = want >= 2;
+			stop_at = offset;
+			prop = fdt_get_property_by_offset(fdt, offset, NULL);
+			str = fdt_string(fdt, fdt32_to_cpu(prop->nameoff));
+			if (str_in_list(str, exc_prop, exc_prop_count))
+				include = 0;
+			break;
+
+		case FDT_NOP:
+			include = want >= 2;
+			stop_at = offset;
+			break;
+
+		case FDT_BEGIN_NODE:
+			depth++;
+			if (depth == FDT_MAX_DEPTH)
+				return -FDT_ERR_BADSTRUCTURE;
+			name = fdt_get_name(fdt, offset, &len);
+			if (end - path + 2 + len >= path_len)
+				return -FDT_ERR_NOSPACE;
+			if (end != path + 1)
+				*end++ = '/';
+			strcpy(end, name);
+			end += len;
+			stack[depth] = want;
+			if (want == 1)
+				stop_at = offset;
+			if (str_in_list(path, inc, inc_count))
+				want = 2;
+			else if (want)
+				want--;
+			else
+				stop_at = offset;
+			include = want;
+			break;
+
+		case FDT_END_NODE:
+			include = want;
+			want = stack[depth--];
+			while (end > path && *--end != '/')
+				;
+			*end = '\0';
+			break;
+
+		case FDT_END:
+			include = 1;
+			break;
+		}
+
+		if (include && start == -1) {
+			/* Should we merge with previous? */
+			if (count && count <= max_regions &&
+			    offset == region[count - 1].offset +
+					region[count - 1].size - base)
+				start = region[--count].offset - base;
+			else
+				start = offset;
+		}
+
+		if (!include && start != -1) {
+			if (count < max_regions) {
+				region[count].offset = base + start;
+				region[count].size = stop_at - start;
+			}
+			count++;
+			start = -1;
+		}
+	} while (tag != FDT_END);
+
+	if (nextoffset != fdt_size_dt_struct(fdt))
+		return -FDT_ERR_BADLAYOUT;
+
+	/* Add a region for the END tag and the string table */
+	if (count < max_regions) {
+		region[count].offset = base + start;
+		region[count].size = nextoffset - start;
+		if (add_string_tab)
+			region[count].size += fdt_size_dt_strings(fdt);
+	}
+	count++;
+
+	return count;
+}
+
 /**
  * fdt_add_region() - Add a new region to our list
  * @info:	State information
diff --git a/lib/libfdt/fdt_wip.c b/lib/libfdt/fdt_wip.c
index 01adad0ee9..7274c81b62 100644
--- a/lib/libfdt/fdt_wip.c
+++ b/lib/libfdt/fdt_wip.c
@@ -96,132 +96,3 @@ int fdt_nop_node(void *fdt, int nodeoffset)
 			endoffset - nodeoffset);
 	return 0;
 }
-
-#define FDT_MAX_DEPTH	32
-
-static int str_in_list(const char *str, char * const list[], int count)
-{
-	int i;
-
-	for (i = 0; i < count; i++)
-		if (!strcmp(list[i], str))
-			return 1;
-
-	return 0;
-}
-
-int fdt_find_regions(const void *fdt, char * const inc[], int inc_count,
-		     char * const exc_prop[], int exc_prop_count,
-		     struct fdt_region region[], int max_regions,
-		     char *path, int path_len, int add_string_tab)
-{
-	int stack[FDT_MAX_DEPTH] = { 0 };
-	char *end;
-	int nextoffset = 0;
-	uint32_t tag;
-	int count = 0;
-	int start = -1;
-	int depth = -1;
-	int want = 0;
-	int base = fdt_off_dt_struct(fdt);
-
-	end = path;
-	*end = '\0';
-	do {
-		const struct fdt_property *prop;
-		const char *name;
-		const char *str;
-		int include = 0;
-		int stop_at = 0;
-		int offset;
-		int len;
-
-		offset = nextoffset;
-		tag = fdt_next_tag(fdt, offset, &nextoffset);
-		stop_at = nextoffset;
-
-		switch (tag) {
-		case FDT_PROP:
-			include = want >= 2;
-			stop_at = offset;
-			prop = fdt_get_property_by_offset(fdt, offset, NULL);
-			str = fdt_string(fdt, fdt32_to_cpu(prop->nameoff));
-			if (str_in_list(str, exc_prop, exc_prop_count))
-				include = 0;
-			break;
-
-		case FDT_NOP:
-			include = want >= 2;
-			stop_at = offset;
-			break;
-
-		case FDT_BEGIN_NODE:
-			depth++;
-			if (depth == FDT_MAX_DEPTH)
-				return -FDT_ERR_BADSTRUCTURE;
-			name = fdt_get_name(fdt, offset, &len);
-			if (end - path + 2 + len >= path_len)
-				return -FDT_ERR_NOSPACE;
-			if (end != path + 1)
-				*end++ = '/';
-			strcpy(end, name);
-			end += len;
-			stack[depth] = want;
-			if (want == 1)
-				stop_at = offset;
-			if (str_in_list(path, inc, inc_count))
-				want = 2;
-			else if (want)
-				want--;
-			else
-				stop_at = offset;
-			include = want;
-			break;
-
-		case FDT_END_NODE:
-			include = want;
-			want = stack[depth--];
-			while (end > path && *--end != '/')
-				;
-			*end = '\0';
-			break;
-
-		case FDT_END:
-			include = 1;
-			break;
-		}
-
-		if (include && start == -1) {
-			/* Should we merge with previous? */
-			if (count && count <= max_regions &&
-			    offset == region[count - 1].offset +
-					region[count - 1].size - base)
-				start = region[--count].offset - base;
-			else
-				start = offset;
-		}
-
-		if (!include && start != -1) {
-			if (count < max_regions) {
-				region[count].offset = base + start;
-				region[count].size = stop_at - start;
-			}
-			count++;
-			start = -1;
-		}
-	} while (tag != FDT_END);
-
-	if (nextoffset != fdt_size_dt_struct(fdt))
-		return -FDT_ERR_BADLAYOUT;
-
-	/* Add a region for the END tag and the string table */
-	if (count < max_regions) {
-		region[count].offset = base + start;
-		region[count].size = nextoffset - start;
-		if (add_string_tab)
-			region[count].size += fdt_size_dt_strings(fdt);
-	}
-	count++;
-
-	return count;
-}

commit 3bf2315f28b80494c8354144dc353b5437e34585
Author: Andre Przywara <andre.przywara@arm.com>
Date:   Mon Nov 27 00:47:09 2017 +0000

    UPSTREAM: armv8: shrink exception table code
    
    In the moment our exception entry code needs 34 instructions, so we
    can't use put it directly into the table entry, which offers "only"
    32 instructions there. Right now we just put an unconditional branch
    there, then use a macro to place the 34 instructions *per entry* after
    that. That effectivly doubles the size of our exception table, which
    is quite a waste, given that we use it mostly for debugging purposes.
    
    Since the register saving part is actually identical, let's just convert
    that macro into a function, and "bl" into it directly from the exception
    slot, of course after having saved at least the original LR.
    This saves us about 950 bytes of code, which is quite a relief for some
    tight SPLs, in particular the 64-bit Allwinner ones.
    
    Change-Id: I3d156413396f2a304773ef3a202f73d47cf65531
    Signed-off-by: Andre Przywara <andre.przywara@arm.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 78ad457b2dbd0fe6cdc7ea42a69774a72ed007b9)

diff --git a/arch/arm/cpu/armv8/exceptions.S b/arch/arm/cpu/armv8/exceptions.S
index 4f4f526f93..8c7c1d3eb8 100644
--- a/arch/arm/cpu/armv8/exceptions.S
+++ b/arch/arm/cpu/armv8/exceptions.S
@@ -11,13 +11,66 @@
 #include <asm/macro.h>
 #include <linux/linkage.h>
 
+/*
+ * Exception vectors.
+ */
+	.align	11
+	.globl	vectors
+vectors:
+	.align	7		/* Current EL Synchronous Thread */
+	stp	x29, x30, [sp, #-16]!
+	bl	_exception_entry
+	bl	do_bad_sync
+	b	exception_exit
+
+	.align	7		/* Current EL IRQ Thread */
+	stp	x29, x30, [sp, #-16]!
+	bl	_exception_entry
+	bl	do_bad_irq
+	b	exception_exit
+
+	.align	7		/* Current EL FIQ Thread */
+	stp	x29, x30, [sp, #-16]!
+	bl	_exception_entry
+	bl	do_bad_fiq
+	b	exception_exit
+
+	.align	7		/* Current EL Error Thread */
+	stp	x29, x30, [sp, #-16]!
+	bl	_exception_entry
+	bl	do_bad_error
+	b	exception_exit
+
+	.align	7		 /* Current EL Synchronous Handler */
+	stp	x29, x30, [sp, #-16]!
+	bl	_exception_entry
+	bl	do_sync
+	b	exception_exit
+
+	.align	7		 /* Current EL IRQ Handler */
+	stp	x29, x30, [sp, #-16]!
+	bl	_exception_entry
+	bl	do_irq
+	b	exception_exit
+
+	.align	7		 /* Current EL FIQ Handler */
+	stp	x29, x30, [sp, #-16]!
+	bl	_exception_entry
+	bl	do_fiq
+	b	exception_exit
+
+	.align	7		 /* Current EL Error Handler */
+	stp	x29, x30, [sp, #-16]!
+	bl	_exception_entry
+	bl	do_error
+	b	exception_exit
+
 /*
  * Enter Exception.
  * This will save the processor state that is ELR/X0~X30
  * to the stack frame.
  */
-.macro	exception_entry
-	stp	x29, x30, [sp, #-16]!
+_exception_entry:
 	stp	x27, x28, [sp, #-16]!
 	stp	x25, x26, [sp, #-16]!
 	stp	x23, x24, [sp, #-16]!
@@ -46,78 +99,8 @@
 0:
 	stp	x2, x0, [sp, #-16]!
 	mov	x0, sp
-.endm
+	ret
 
-/*
- * Exception vectors.
- */
-	.align	11
-	.globl	vectors
-vectors:
-	.align	7
-	b	_do_bad_sync	/* Current EL Synchronous Thread */
-
-	.align	7
-	b	_do_bad_irq	/* Current EL IRQ Thread */
-
-	.align	7
-	b	_do_bad_fiq	/* Current EL FIQ Thread */
-
-	.align	7
-	b	_do_bad_error	/* Current EL Error Thread */
-
-	.align	7
-	b	_do_sync	/* Current EL Synchronous Handler */
-
-	.align	7
-	b	_do_irq		/* Current EL IRQ Handler */
-
-	.align	7
-	b	_do_fiq		/* Current EL FIQ Handler */
-
-	.align	7
-	b	_do_error	/* Current EL Error Handler */
-
-
-_do_bad_sync:
-	exception_entry
-	bl	do_bad_sync
-	b	exception_exit
-
-_do_bad_irq:
-	exception_entry
-	bl	do_bad_irq
-	b	exception_exit
-
-_do_bad_fiq:
-	exception_entry
-	bl	do_bad_fiq
-	b	exception_exit
-
-_do_bad_error:
-	exception_entry
-	bl	do_bad_error
-	b	exception_exit
-
-_do_sync:
-	exception_entry
-	bl	do_sync
-	b	exception_exit
-
-_do_irq:
-	exception_entry
-	bl	do_irq
-	b	exception_exit
-
-_do_fiq:
-	exception_entry
-	bl	do_fiq
-	b	exception_exit
-
-_do_error:
-	exception_entry
-	bl	do_error
-	b	exception_exit
 
 exception_exit:
 	ldp	x2, x0, [sp],#16

commit 43ae10fd4b95785cda52ce9aff784e676d3b071b
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Sat Dec 2 00:19:14 2017 +0100

    UPSTREAM: rockchip: clk: rk3128: fix DCLK_VOP_DIV_CON_MASK
    
    The DCLK_VOP_DIV_CON_MASK should cover only bits 8 through 15.
    Fix this to remove an "integer-overflow on shifted constant" warning.
    
    Fixes: 9246d9e ("rockchip: rk3128: add clock driver")
    Change-Id: I6132623ce069ec6c6cd59a01580e795142864862
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 4fc495e9e2e497afee383294a6ee9212e9a8bd73)

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3128.h b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
index 8970ed2ba3..9bd6409a1e 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
@@ -188,7 +188,7 @@ enum {
 	DCLK_VOP_SEL_MASK          = 1 << DCLK_VOP_SEL_SHIFT,
 	DCLK_VOP_PLL_SEL_CPLL           = 0,
 	DCLK_VOP_DIV_CON_SHIFT          = 8,
-	DCLK_VOP_DIV_CON_MASK           = 0xfff << DCLK_VOP_DIV_CON_SHIFT,
+	DCLK_VOP_DIV_CON_MASK           = 0xff << DCLK_VOP_DIV_CON_SHIFT,
 
 	/* CRU_CLKSEL31_CON */
 	VIO0_PLL_SHIFT		= 5,

commit b10789f201da9e44f3a31936df7d311c2ce75c83
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Sat Dec 2 00:14:55 2017 +0100

    UPSTREAM: rockchip: clk: rk3128: fix NANDC_PLL_SEL_MASK
    
    The PLL selector field for NANDC is only 2 bits wide.
    This fixes an 'int-overflow on shift' warning.
    
    Fixes: 9246d9e ("rockchip: rk3128: add clock driver")
    Change-Id: I4d6d7c51633eb7cd0fbfb1c6b7c501cf8c0fcf81
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit cd401abcd532c59cdaaf6ffeed762386c1813e58)

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3128.h b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
index 9f5d864673..8970ed2ba3 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
@@ -137,7 +137,7 @@ enum {
 
 	/* CRU_CLK_SEL2_CON */
 	NANDC_PLL_SEL_SHIFT	= 14,
-	NANDC_PLL_SEL_MASK	= 7 << NANDC_PLL_SEL_SHIFT,
+	NANDC_PLL_SEL_MASK	= 3 << NANDC_PLL_SEL_SHIFT,
 	NANDC_PLL_SEL_CPLL	= 0,
 	NANDC_PLL_SEL_GPLL,
 	NANDC_CLK_DIV_SHIFT	= 8,

commit 8ebcf66b4889f476dd11cabb8a77e08866b4db9c
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Nov 28 17:56:12 2017 +0100

    UPSTREAM: rockchip: dts: rk3399-puma: add /config/sysreset-gpio property
    
    On the RK3399-Q7, we want to trigger a full platform reset (so the
    various software stacks supported don't have to deal with the same
    complexities over and over again) in case that anything other than a
    power-on reset occurred.
    
    To do so, this defines the /config/sysreset-gpio property and has it
    point to a GPIO that will perform a power-on reset of the entire
    platform.
    
    Change-Id: Ic7e6b6871da4064c8ea4a5e62d5b55dfd80cf3e8
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 5f104178bf713615dc404fdfcf0fb53d89c66a07)

diff --git a/arch/arm/dts/rk3399-puma.dtsi b/arch/arm/dts/rk3399-puma.dtsi
index 0f5e6ac57e..d2c961e317 100644
--- a/arch/arm/dts/rk3399-puma.dtsi
+++ b/arch/arm/dts/rk3399-puma.dtsi
@@ -16,6 +16,7 @@
 		u-boot,mmc-env-offset = <0x4000>;      /* @  16KB */
 		u-boot,efi-partition-entries-offset = <0x200000>; /* 2MB */
 		u-boot,boot-led = "module_led";
+		sysreset-gpio = <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>;
 	};
 
 	chosen {
@@ -551,6 +552,10 @@
 	status = "okay";
 };
 
+&gpio1 {
+	u-boot,dm-pre-reloc;
+};
+
 &gpio3 {
 	u-boot,dm-pre-reloc;
 };

commit 23429be340c866dcc2f342f9a677829b4146f67f
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Nov 28 17:56:11 2017 +0100

    UPSTREAM: rockchip: rk3399-puma: add code to allow forcing a power-on reset
    
    The reset circuitry in the RK3399 only resets 'almost all logic' when
    a software reset is performed.  To make our software maintenance
    easier in the future, we want to have the option (controlled by a DTS
    property) to force all reset causes other than a power-on reset to
    trigger a power-on reset via a GPIO trigger.
    
    This adds the necessary support to the rk3399-puma (i.e. RK3399-Q7)
    board-support and the documentation for the new property
    (sysreset-gpio) within the /config-node.
    
    Change-Id: If51b78c2ef6ca929c2d108346e21697f7e9b36db
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit ae0d33a7291a164a11ae034bcf4f71226b2bef48)

diff --git a/board/theobroma-systems/puma_rk3399/puma-rk3399.c b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
index 7f2dd65d44..0ad267cdd0 100644
--- a/board/theobroma-systems/puma_rk3399/puma-rk3399.c
+++ b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
@@ -11,7 +11,10 @@
 #include <usb.h>
 #include <dm/pinctrl.h>
 #include <dm/uclass-internal.h>
+#include <asm/gpio.h>
 #include <asm/setup.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk3399.h>
 #include <asm/arch/periph.h>
 #include <power/regulator.h>
 #include <u-boot/sha256.h>
@@ -33,9 +36,50 @@ int board_init(void)
 	return 0;
 }
 
+static void rk3399_force_power_on_reset(void)
+{
+	ofnode node;
+	struct gpio_desc sysreset_gpio;
+
+	debug("%s: trying to force a power-on reset\n", __func__);
+
+	node = ofnode_path("/config");
+	if (!ofnode_valid(node)) {
+		debug("%s: no /config node?\n", __func__);
+		return;
+	}
+
+	if (gpio_request_by_name_nodev(node, "sysreset-gpio", 0,
+				       &sysreset_gpio, GPIOD_IS_OUT)) {
+		debug("%s: could not find a /config/sysreset-gpio\n", __func__);
+		return;
+	}
+
+	dm_gpio_set_value(&sysreset_gpio, 1);
+}
+
 void spl_board_init(void)
 {
 	int  ret;
+	struct rk3399_cru *cru = rockchip_get_cru();
+
+	/*
+	 * The RK3399 resets only 'almost all logic' (see also in the TRM
+	 * "3.9.4 Global software reset"), when issuing a software reset.
+	 * This may cause issues during boot-up for some configurations of
+	 * the application software stack.
+	 *
+	 * To work around this, we test whether the last reset reason was
+	 * a power-on reset and (if not) issue an overtemp-reset to reset
+	 * the entire module.
+	 *
+	 * While this was previously fixed by modifying the various places
+	 * that could generate a software reset (e.g. U-Boot's sysreset
+	 * driver, the ATF or Linux), we now have it here to ensure that
+	 * we no longer have to track this through the various components.
+	 */
+	if (cru->glb_rst_st != 0)
+		rk3399_force_power_on_reset();
 
 	/*
 	 * Turning the eMMC and SPI back on (if disabled via the Qseven
diff --git a/doc/device-tree-bindings/config.txt b/doc/device-tree-bindings/config.txt
index 15e4349c19..6cdc16da5b 100644
--- a/doc/device-tree-bindings/config.txt
+++ b/doc/device-tree-bindings/config.txt
@@ -46,3 +46,9 @@ u-boot,spl-payload-offset
 	If present (and SPL is controlled by the device-tree), this allows
 	to override the CONFIG_SYS_SPI_U_BOOT_OFFS setting using a value
 	from the device-tree.
+
+sysreset-gpio
+	If present (and supported by the specific board), indicates a
+	GPIO that can be set to trigger a system reset.  It is assumed
+	that such a system reset will effect a complete platform reset,
+	being roughly equivalent to a power-on reset.

commit 0c1b79c3645cdc233dc88d65326c70afa42a6924
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Wed Nov 22 17:15:19 2017 +0100

    UPSTREAM: rockchip: dts: rk3399-puma: add a 'tsd, usb-port-power' stringlist for USB1
    
    USB1 is connected to the on-module USB 3.0 hub and power to the hub
    (actually it's a reset signal, modeled as a fixed regulator, that will
    be released) should be enabled only during the first probing of the
    device to avoid the hub from entering its low-power mode (where it
    tries to attach on a fixed interval, but we always miss the timeslot
    when U-Boot has the controller listening).
    
    This adds a 'tsd,usb-port-power' stringlist to enable the
    infrastructure in the board-specific usb_hub_reset_devices to find and
    control the fixed regulator associated with control of the USB hub.
    
    Change-Id: I6624aa6b0a847eb0d26013b5cda5e26edc3630f5
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 884ad05d34c49ac6c8e21346a63a627c6c9d4c52)

diff --git a/arch/arm/dts/rk3399-puma.dtsi b/arch/arm/dts/rk3399-puma.dtsi
index 96bd4fec01..0f5e6ac57e 100644
--- a/arch/arm/dts/rk3399-puma.dtsi
+++ b/arch/arm/dts/rk3399-puma.dtsi
@@ -544,6 +544,7 @@
 
 &dwc3_typec1 {
 	status = "okay";
+	tsd,usb-port-power = "usbhub_enable";
 };
 
 &vopb {

commit 0c58140478dcd4ee6cf817f8d011132706ee83d7
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Wed Nov 22 17:15:18 2017 +0100

    UPSTREAM: rockchip: rk3399-puma: implement usb_hub_reset_devices for puma-rk3399
    
    For some versions of the RK3399-Q7 (at least revisions v1.1 and v1.2
    are affected), we need to turn on the power for the port connected to
    the on-module USB hub only when the device is probed for the first
    time to ensure that the hub does not enter a low-power mode (that
    U-Boot's USB stack can't deal with).
    
    Note that this is needed for U-Boot only, as Linux eventually manages
    to attach the hub even when it has entered into its low-power state
    (when the hub wakes up the next time) after a few seconds.
    
    Change-Id: I4eca5fe6953ae77ff12c45248d156de4a890803c
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 614539d4f79669413e3336f349c487b605f2bb6b)

diff --git a/board/theobroma-systems/puma_rk3399/puma-rk3399.c b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
index 2b4988e2d2..7f2dd65d44 100644
--- a/board/theobroma-systems/puma_rk3399/puma-rk3399.c
+++ b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
@@ -7,12 +7,13 @@
 #include <common.h>
 #include <dm.h>
 #include <misc.h>
+#include <spl.h>
+#include <usb.h>
 #include <dm/pinctrl.h>
 #include <dm/uclass-internal.h>
 #include <asm/setup.h>
 #include <asm/arch/periph.h>
 #include <power/regulator.h>
-#include <spl.h>
 #include <u-boot/sha256.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -158,3 +159,70 @@ void get_board_serial(struct tag_serialnr *serialnr)
 	serialnr->low = (u32)(serial & 0xffffffff);
 }
 #endif
+
+/**
+ * Switch power at an external regulator (for our root hub).
+ *
+ * @param ctrl pointer to the xHCI controller
+ * @param port port number as in the control message (one-based)
+ * @param enable boolean indicating whether to enable or disable power
+ * @return returns 0 on success, an error-code on failure
+ */
+static int board_usb_port_power_set(struct udevice *dev, int port,
+				    bool enable)
+{
+#if CONFIG_IS_ENABLED(OF_CONTROL) && CONFIG_IS_ENABLED(DM_REGULATOR)
+	/* We start counting ports at 0, while USB counts from 1. */
+	int index = port - 1;
+	const char *regname = NULL;
+	struct udevice *regulator;
+	const char *prop = "tsd,usb-port-power";
+	int ret;
+
+	debug("%s: ctrl '%s' port %d enable %s\n", __func__,
+	      dev_read_name(dev), port, enable ? "true" : "false");
+
+	ret = dev_read_string_index(dev, prop, index, &regname);
+	if (ret < 0) {
+		debug("%s: ctrl '%s' port %d: no entry in '%s'\n",
+		      __func__, dev_read_name(dev), port, prop);
+		return ret;
+	}
+
+	ret = regulator_get_by_platname(regname, &regulator);
+	if (ret) {
+		debug("%s: ctrl '%s' port %d: could not get regulator '%s'\n",
+		      __func__, dev_read_name(dev), port, regname);
+		return ret;
+	}
+
+	regulator_set_enable(regulator, enable);
+	return 0;
+#else
+	return -ENOTSUPP;
+#endif
+}
+
+void usb_hub_reset_devices(struct usb_hub_device *hub, int port)
+{
+	struct udevice *dev = hub->pusb_dev->dev;
+	struct udevice *ctrl;
+
+	/* We are only interested in our root-hubs */
+	if (usb_hub_is_root_hub(dev) == false)
+		return;
+
+	ctrl = usb_get_bus(dev);
+	if (!ctrl) {
+		debug("%s: could not retrieve ctrl for hub\n", __func__);
+		return;
+	}
+
+	/*
+	 * To work around an incompatibility between the single-threaded
+	 * USB stack in U-Boot and (a strange low-power mode of) the USB
+	 * hub we have on-module, we need to delay powering on the hub
+	 * until the first time the port is probed.
+	 */
+	board_usb_port_power_set(ctrl, port, true);
+}

commit 641aab967b7c4ba9d419a3833128311e60ba2a9b
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Nov 27 00:18:42 2017 +0100

    UPSTREAM: MAINTAINERS: update maintained files for Rockchip
    
    With some of the recent cleanups (e.g. moving the DRAM controller
    drivers for Rockchip devices to drivers/ram/rockchip), the files
    and paths listed in MAINTAINERS no longer covered what really is
    looked after as part of the Rockchip port.
    
    This commit updates the files/paths listed in MAINTAINERS for the
    Rockchip port.  I am certain, though, that this will have missed some
    additional paths that should have been included...
    
    Change-Id: I6ad5101bff84f5e33086626c28d20aaab8693c8a
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 8b45193a2243c2e86e0c473e74bad7b08072b522)

diff --git a/MAINTAINERS b/MAINTAINERS
index 175a7f0d1c..ef5ae23ea3 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -136,8 +136,20 @@ M:	Simon Glass <sjg@chromium.org>
 M:	Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
 S:	Maintained
 T:	git git://git.denx.de/u-boot-rockchip.git
+F:	arch/arm/include/asm/arch-rockchip/
 F:	arch/arm/mach-rockchip/
 F:	board/rockchip/
+F:	drivers/clk/rockchip/
+F:	drivers/gpio/rk_gpio.c
+F:	drivers/misc/rockchip-efuse.c
+F:	drivers/pinctrl/rockchip/
+F:	drivers/ram/rockchip/
+F:	drivers/sysreset/sysreset_rockchip.c
+F:	tools/rkcommon.c
+F:	tools/rkcommon.h
+F:	tools/rkimage.c
+F:	tools/rksd.c
+F:	tools/rkspi.c
 
 ARM SAMSUNG
 M:	Minkyu Kang <mk7.kang@samsung.com>

commit 4c0727fd0eeea63d2c8ef85c767123e14e223457
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Nov 21 23:29:40 2017 +0100

    UPSTREAM: env: suppress a spurious warning with GCC 7.1
    
    GCC 7.1 seems to be smart enough to track val through the various
    static inline functions, but not smart enough to see that val will
    always be initialised when no error is returned.  This triggers
    the following warning:
      env/mmc.c: In function 'mmc_get_env_addr':
      env/mmc.c:121:12: warning: 'val' may be used uninitialized in this function [-Wmaybe-uninitialized]
    
    To make it easier for compiler to understand what is going on, let's
    initialise val.
    
    Change-Id: I9e78b4a72f8124bde37946aaad0caa82c064ec70
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit fd374665c9b724bb3eb0da32db0bb7ecc5cf1337)

diff --git a/env/mmc.c b/env/mmc.c
index 3343f9e9f6..ed7bcf16ae 100644
--- a/env/mmc.c
+++ b/env/mmc.c
@@ -73,7 +73,7 @@ static inline s64 mmc_offset(int copy)
 		.partition = "u-boot,mmc-env-partition",
 		.offset = "u-boot,mmc-env-offset",
 	};
-	s64 val, defvalue;
+	s64 val = 0, defvalue;
 	const char *propname;
 	const char *str;
 	int err;

commit 1759abcc9459a3d0b8ba1b8c6c0e7af67fd322b9
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Sun Nov 19 23:49:21 2017 +0100

    UPSTREAM: fs: avoid possible NULL dereference in fs_devread
    
    It is unwise to first dereference a variable
    and then to check if it was NULL.
    
    Change-Id: I2c28e092380c649874fab06f0b4e453466e2d16c
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Reviewed-by: Marek Behun <marek.behun@nic.cz>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 24f48416dfe1d827dcf759d6cd0e7a8e5c67e321)

diff --git a/fs/fs_internal.c b/fs/fs_internal.c
index 58b441030c..5cdd272c9d 100644
--- a/fs/fs_internal.c
+++ b/fs/fs_internal.c
@@ -15,12 +15,13 @@ int fs_devread(struct blk_desc *blk, disk_partition_t *partition,
 	       lbaint_t sector, int byte_offset, int byte_len, char *buf)
 {
 	unsigned block_len;
-	int log2blksz = blk->log2blksz;
+	int log2blksz;
 	ALLOC_CACHE_ALIGN_BUFFER(char, sec_buf, (blk ? blk->blksz : 0));
 	if (blk == NULL) {
 		printf("** Invalid Block Device Descriptor (NULL)\n");
 		return 0;
 	}
+	log2blksz = blk->log2blksz;
 
 	/* Check partition boundaries */
 	if ((sector + ((byte_offset + byte_len - 1) >> log2blksz))

commit 6ff3d5909f1d5d23d1e83218f7a9ec6bf625e3fc
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Sun Nov 19 23:25:32 2017 +0100

    UPSTREAM: cmd: blk: remove unreachable code
    
    Remove an unreachable return statement.
    
    Change-Id: I523a83571eade593a08b685519757c1df4ffab25
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 254eedee7f383066b70ac4da01bc792a3256a4b3)

diff --git a/cmd/blk_common.c b/cmd/blk_common.c
index 0c0c23eb37..bf2f626dd6 100644
--- a/cmd/blk_common.c
+++ b/cmd/blk_common.c
@@ -95,8 +95,6 @@ int blk_common_cmd(int argc, char * const argv[], enum if_type if_type,
 		} else {
 			return CMD_RET_USAGE;
 		}
-
-		return 0;
 	}
 }
 #endif

commit acda6ec11c7b3a44c477cef6ace38b671226059c
Author: Marek Vasut <marek.vasut+renesas@gmail.com>
Date:   Mon Nov 27 05:32:42 2017 +0100

    UPSTREAM: fdtdec: Support parsing multiple /memory nodes
    
    It is legal to have multiple /memory nodes in a device tree . Currently,
    fdtdec_setup_memory_size() only supports parsing the first node . This
    patch extends the function such that if a particular /memory node does
    no longer have further "reg" entries and CONFIG_NR_DRAM_BANKS still
    allows for more DRAM banks, the code moves on to the next memory node
    and checks it's "reg"s. This makes it possible to handle both systems
    with single memory node with multiple entries and systems with multiple
    memory nodes with single entry.
    
    Change-Id: Idc8b4bebc916b6a6bc0d2deb3c4008921d268d1e
    Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
    Cc: Tom Rini <trini@konsulko.com>
    Cc: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 942ee0933e881ff500aae7e42309bf6abbc495d4)

diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 8edc468902..ae721c29bf 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -1175,21 +1175,33 @@ int fdtdec_setup_memory_size(void)
 #if defined(CONFIG_NR_DRAM_BANKS)
 int fdtdec_setup_memory_banksize(void)
 {
-	int bank, ret, mem;
+	int bank, ret, mem, reg = 0;
 	struct fdt_resource res;
 
-	mem = fdt_path_offset(gd->fdt_blob, "/memory");
+	mem = fdt_node_offset_by_prop_value(gd->fdt_blob, -1, "device_type",
+					    "memory", 7);
 	if (mem < 0) {
 		debug("%s: Missing /memory node\n", __func__);
 		return -EINVAL;
 	}
 
 	for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
-		ret = fdt_get_resource(gd->fdt_blob, mem, "reg", bank, &res);
-		if (ret == -FDT_ERR_NOTFOUND)
-			break;
-		if (ret != 0)
+		ret = fdt_get_resource(gd->fdt_blob, mem, "reg", reg++, &res);
+		if (ret == -FDT_ERR_NOTFOUND) {
+			reg = 0;
+			mem = fdt_node_offset_by_prop_value(gd->fdt_blob, mem,
+							    "device_type",
+							    "memory", 7);
+			if (mem == -FDT_ERR_NOTFOUND)
+				break;
+
+			ret = fdt_get_resource(gd->fdt_blob, mem, "reg", reg++, &res);
+			if (ret == -FDT_ERR_NOTFOUND)
+				break;
+		}
+		if (ret != 0) {
 			return -EINVAL;
+		}
 
 		gd->bd->bi_dram[bank].start = (phys_addr_t)res.start;
 		gd->bd->bi_dram[bank].size =

commit 1b48bbdd201e99148614d171974c59e29dda5755
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Wed Nov 22 02:38:11 2017 +0900

    UPSTREAM: bitops: collect BIT macros to include/linux/bitops.h
    
    Same macros are defined in various places.  Collect them into
    include/linux/bitops.h like Linux.
    
    Change-Id: I81d12e8c8151c6eb29499d2b5cd61ed782500492
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit ed3986ca30972c94f0076f88c948406ce030a05c)

diff --git a/arch/arm/include/asm/arch-sunxi/dram_sunxi_dw.h b/arch/arm/include/asm/arch-sunxi/dram_sunxi_dw.h
index 03fd46b724..66e206dd52 100644
--- a/arch/arm/include/asm/arch-sunxi/dram_sunxi_dw.h
+++ b/arch/arm/include/asm/arch-sunxi/dram_sunxi_dw.h
@@ -13,6 +13,8 @@
 #ifndef _SUNXI_DRAM_SUN8I_H3_H
 #define _SUNXI_DRAM_SUN8I_H3_H
 
+#include <linux/bitops.h>
+
 struct sunxi_mctl_com_reg {
 	u32 cr;			/* 0x00 control register */
 	u32 cr_r1;		/* 0x04 rank 1 control register (R40 only) */
@@ -211,7 +213,6 @@ struct sunxi_mctl_ctl_reg {
  * the 32-bit wide access consists of. Also three control signals can be
  * adjusted individually.
  */
-#define BITS_PER_BYTE		8
 #define NR_OF_BYTE_LANES	(32 / BITS_PER_BYTE)
 /* The eight data lines (DQn) plus DM, DQS and DQSN */
 #define LINES_PER_BYTE_LANE	(BITS_PER_BYTE + 3)
diff --git a/arch/arm/mach-kirkwood/include/mach/gpio.h b/arch/arm/mach-kirkwood/include/mach/gpio.h
index aa8c5da36d..ac2397dd4c 100644
--- a/arch/arm/mach-kirkwood/include/mach/gpio.h
+++ b/arch/arm/mach-kirkwood/include/mach/gpio.h
@@ -15,10 +15,6 @@
 #ifndef __KIRKWOOD_GPIO_H
 #define __KIRKWOOD_GPIO_H
 
-/* got from kernel include/linux/bitops.h */
-#define BITS_PER_BYTE 8
-#define BITS_TO_LONGS(nr)	DIV_ROUND_UP(nr, BITS_PER_BYTE * sizeof(long))
-
 #define GPIO_MAX		50
 #define GPIO_OFF(pin)		(((pin) >> 5) ? 0x0040 : 0x0000)
 #define GPIO_OUT(pin)		(MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x00)
diff --git a/drivers/gpio/kw_gpio.c b/drivers/gpio/kw_gpio.c
index 43b27e3fea..cc26cc1658 100644
--- a/drivers/gpio/kw_gpio.c
+++ b/drivers/gpio/kw_gpio.c
@@ -14,7 +14,7 @@
  */
 
 #include <common.h>
-#include <asm/bitops.h>
+#include <linux/bitops.h>
 #include <asm/io.h>
 #include <asm/arch/soc.h>
 #include <asm/arch/gpio.h>
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index b025001337..c66c33d3c2 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -897,8 +897,6 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip)
 	return status;
 }
 
-#define BITS_PER_BYTE 8
-
 /**
  * nand_check_erased_buf - check if a buffer contains (almost) only 0xff data
  * @buf: buffer to test
diff --git a/include/linux/bitops.h b/include/linux/bitops.h
index 576b15dc53..a47f6d17bb 100644
--- a/include/linux/bitops.h
+++ b/include/linux/bitops.h
@@ -5,9 +5,16 @@
 #include <asm-generic/bitsperlong.h>
 #include <linux/compiler.h>
 
+#ifdef	__KERNEL__
 #define BIT(nr)			(1UL << (nr))
+#define BIT_ULL(nr)		(1ULL << (nr))
 #define BIT_MASK(nr)		(1UL << ((nr) % BITS_PER_LONG))
 #define BIT_WORD(nr)		((nr) / BITS_PER_LONG)
+#define BIT_ULL_MASK(nr)	(1ULL << ((nr) % BITS_PER_LONG_LONG))
+#define BIT_ULL_WORD(nr)	((nr) / BITS_PER_LONG_LONG)
+#define BITS_PER_BYTE		8
+#define BITS_TO_LONGS(nr)	DIV_ROUND_UP(nr, BITS_PER_BYTE * sizeof(long))
+#endif
 
 /*
  * Create a contiguous bitmask starting at bit position @l and ending at
diff --git a/include/usb/lin_gadget_compat.h b/include/usb/lin_gadget_compat.h
index 4a01585f80..d0d71f7c32 100644
--- a/include/usb/lin_gadget_compat.h
+++ b/include/usb/lin_gadget_compat.h
@@ -10,12 +10,10 @@
 #ifndef __LIN_COMPAT_H__
 #define __LIN_COMPAT_H__
 
+#include <linux/bitops.h>
 #include <linux/compat.h>
 
 /* common */
-#define BITS_PER_BYTE				8
-#define BITS_TO_LONGS(nr) \
-	DIV_ROUND_UP(nr, BITS_PER_BYTE * sizeof(long))
 #define DECLARE_BITMAP(name, bits) \
 	unsigned long name[BITS_TO_LONGS(bits)]
 

commit 008a6da3248a18f416d8858250401b7352fe1275
Author: Michal Simek <michal.simek@xilinx.com>
Date:   Fri Oct 21 12:58:17 2016 +0200

    UPSTREAM: tools: mkimage: Extend mkimage to also include pmufw
    
    The patch is adding external pmufw "Platform Management Unit firmware"
    to boot.bin image. Boot.bin is a Xilinx format which bootrom is capable
    to read and boot the system. pmufw is copied to the header data section
    follows by u-boot-spl.bin. pmufw is consumed by PMU unit (Microblaze)
    and SPL runs on a53-0.
    
    This is generated command line when PMUFW_INIT_FILE is setup.
    
    ./tools/mkimage -T zynqmpimage -R ./"" -n
    ./"board/xilinx/zynqmp/pmufw.bin" -d spl/u-boot-spl.bin spl/boot.bin
    
    Change-Id: I74fc17513dd99b876ab9c08ded6ad41a7b0cd3de
    Signed-off-by: Michal Simek <michal.simek@xilinx.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit c85a6b79d10ed8a098997370cbc4fb233ddcb13b)

diff --git a/arch/arm/cpu/armv8/zynqmp/Kconfig b/arch/arm/cpu/armv8/zynqmp/Kconfig
index 5ffc9f6c86..22902f6a01 100644
--- a/arch/arm/cpu/armv8/zynqmp/Kconfig
+++ b/arch/arm/cpu/armv8/zynqmp/Kconfig
@@ -50,6 +50,14 @@ config BOOT_INIT_FILE
 	  Add register writes to boot.bin format (max 256 pairs).
 	  Expect a table of register-value pairs, e.g. "0x12345678 0x4321"
 
+config PMUFW_INIT_FILE
+	string "PMU firmware"
+	depends on SPL
+	default ""
+	help
+	  Include external PMUFW (Platform Management Unit FirmWare) to
+	  a Xilinx bootable image (boot.bin).
+
 config ZYNQMP_USB
 	bool "Configure ZynqMP USB"
 
diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index ca044767a0..b5e7019ea3 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -167,7 +167,8 @@ ifdef CONFIG_ARCH_ZYNQ
 MKIMAGEFLAGS_boot.bin = -T zynqimage -R $(srctree)/$(CONFIG_BOOT_INIT_FILE)
 endif
 ifdef CONFIG_ARCH_ZYNQMP
-MKIMAGEFLAGS_boot.bin = -T zynqmpimage -R $(srctree)/$(CONFIG_BOOT_INIT_FILE)
+MKIMAGEFLAGS_boot.bin = -T zynqmpimage -R $(srctree)/$(CONFIG_BOOT_INIT_FILE) \
+	-n $(srctree)/$(CONFIG_PMUFW_INIT_FILE)
 endif
 
 spl/boot.bin: $(obj)/u-boot-spl.bin FORCE
diff --git a/tools/zynqmpimage.c b/tools/zynqmpimage.c
index 0c9a3daddd..74bd5f5ccc 100644
--- a/tools/zynqmpimage.c
+++ b/tools/zynqmpimage.c
@@ -99,6 +99,8 @@ struct zynqmp_header {
 };
 
 static struct zynqmp_header zynqmpimage_header;
+static void *dynamic_header;
+static FILE *fpmu;
 
 static uint32_t zynqmpimage_checksum(struct zynqmp_header *ptr)
 {
@@ -181,6 +183,13 @@ static void zynqmpimage_print_header(const void *ptr)
 	printf("Image Size   : %lu bytes (%lu bytes packed)\n",
 	       (unsigned long)le32_to_cpu(zynqhdr->image_size),
 	       (unsigned long)le32_to_cpu(zynqhdr->image_stored_size));
+
+	if (zynqhdr->pfw_image_length)
+		printf("PMUFW Size   : %lu bytes (%lu bytes packed)\n",
+		       (unsigned long)le32_to_cpu(zynqhdr->pfw_image_length),
+		       (unsigned long)le32_to_cpu(
+				zynqhdr->total_pfw_image_length));
+
 	printf("Image Load   : 0x%08x\n", le32_to_cpu(zynqhdr->image_load));
 	printf("Checksum     : 0x%08x\n", le32_to_cpu(zynqhdr->checksum));
 
@@ -203,6 +212,8 @@ static void zynqmpimage_print_header(const void *ptr)
 		       le32_to_cpu(zynqhdr->register_init[i].address),
 		       le32_to_cpu(zynqhdr->register_init[i].data));
 	}
+
+	free(dynamic_header);
 }
 
 static int zynqmpimage_check_params(struct image_tool_params *params)
@@ -234,6 +245,44 @@ static int zynqmpimage_check_image_types(uint8_t type)
 	return EXIT_FAILURE;
 }
 
+static int fsize(FILE *fp)
+{
+	int size;
+	int origin = ftell(fp);
+
+	fseek(fp, 0L, SEEK_END);
+	size = ftell(fp);
+
+	/* going back */
+	fseek(fp, origin, SEEK_SET);
+
+	return size;
+}
+
+static void zynqmpimage_pmufw(struct zynqmp_header *zynqhdr,
+			      const char *filename)
+{
+	uint32_t size;
+
+	/* Setup PMU fw size */
+	zynqhdr->pfw_image_length = fsize(fpmu);
+	zynqhdr->total_pfw_image_length = zynqhdr->pfw_image_length;
+
+	zynqhdr->image_size -= zynqhdr->pfw_image_length;
+	zynqhdr->image_stored_size -= zynqhdr->total_pfw_image_length;
+
+	/* Read the whole PMUFW to the header */
+	size = fread(&zynqhdr->__reserved4[66], 1,
+		     zynqhdr->pfw_image_length, fpmu);
+	if (size != zynqhdr->pfw_image_length) {
+		fprintf(stderr, "Cannot read PMUFW file: %s\n", filename);
+		fclose(fpmu);
+		exit(1);
+	}
+
+	fclose(fpmu);
+}
+
 static void zynqmpimage_parse_initparams(struct zynqmp_header *zynqhdr,
 	const char *filename)
 {
@@ -288,6 +337,10 @@ static void zynqmpimage_set_header(void *ptr, struct stat *sbuf, int ifd,
 	if (params->eflag)
 		zynqhdr->image_load = cpu_to_le32((uint32_t)params->ep);
 
+	/* PMUFW */
+	if (fpmu)
+		zynqmpimage_pmufw(zynqhdr, params->imagename);
+
 	/* User can pass in text file with init list */
 	if (strlen(params->imagename2))
 		zynqmpimage_parse_initparams(zynqhdr, params->imagename2);
@@ -295,6 +348,50 @@ static void zynqmpimage_set_header(void *ptr, struct stat *sbuf, int ifd,
 	zynqhdr->checksum = zynqmpimage_checksum(zynqhdr);
 }
 
+static int zynqmpimage_vrec_header(struct image_tool_params *params,
+				   struct image_type_params *tparams)
+{
+	struct stat path_stat;
+	char *filename = params->imagename;
+	int err;
+
+	/* Handle static case without PMUFW */
+	tparams->header_size = sizeof(struct zynqmp_header);
+	tparams->hdr = (void *)&zynqmpimage_header;
+
+	/* PMUFW name is passed via params->imagename */
+	if (strlen(filename) == 0)
+		return EXIT_SUCCESS;
+
+	fpmu = fopen(filename, "r");
+	if (!fpmu) {
+		fprintf(stderr, "Cannot open PMUFW file: %s\n", filename);
+		return EXIT_FAILURE;
+	}
+
+	err = fstat(fileno(fpmu), &path_stat);
+	if (err) {
+		fclose(fpmu);
+		fpmu = NULL;
+		return EXIT_FAILURE;
+	}
+
+	if (!S_ISREG(path_stat.st_mode)) {
+		fclose(fpmu);
+		fpmu = NULL;
+		return EXIT_FAILURE;
+	}
+
+	/* Increase header size by PMUFW file size */
+	tparams->header_size += fsize(fpmu);
+
+	/* Allocate buffer with space for PMUFW */
+	dynamic_header = calloc(1, tparams->header_size);
+	tparams->hdr = dynamic_header;
+
+	return EXIT_SUCCESS;
+}
+
 U_BOOT_IMAGE_TYPE(
 	zynqmpimage,
 	"Xilinx ZynqMP Boot Image support",
@@ -307,5 +404,5 @@ U_BOOT_IMAGE_TYPE(
 	NULL,
 	zynqmpimage_check_image_types,
 	NULL,
-	NULL
+	zynqmpimage_vrec_header
 );

commit 0f68ddd14e313f6c1bc57049f6bfa4616ca75024
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Fri Nov 24 14:44:59 2017 +0100

    UPSTREAM: rockchip: defconfig: puma-rk3399: bypass ADC-based boot_mode check
    
    The boot (and fallback/emergency boot) concept for the RK3399-Q7
    differs from Rockchip's reference platforms.
    
    On the RK3399-Q7, some of this functionality is present in the
    bootloader itself (and configurable); some is backed in hardware by
    the Qseven BIOS_DISABLE signal to invoke the final stages of fallbacks
    (i.e. either an external boot bypassing on-module memories or falling
    back to the BROM for USB recovery).
    
    In summary: the ADC-based boot_mode check does not apply for the
    RK3399-Q7 and we therefore disable it (in this commit) by setting
    CONFIG_BOOT_MODE_REG to 0.
    
    Change-Id: Iad0aace3a6f789c7fbed55fe73480572b33df824
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit e5ee24dda20af5dc87971b497268f9fb1c83027e)

diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig
index c808657dbd..2aa8e1aa6c 100644
--- a/configs/puma-rk3399_defconfig
+++ b/configs/puma-rk3399_defconfig
@@ -6,6 +6,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_ROCKCHIP_RK3399=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0
+CONFIG_ROCKCHIP_BOOT_MODE_REG=0x0
 CONFIG_TARGET_PUMA_RK3399=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y

commit a366cf931ded176e47e068087bddf0134b5a3fac
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Fri Nov 24 14:44:58 2017 +0100

    UPSTREAM: rockchip: fix turning off boot-mode via Kconfig
    
    The ROCKCHIP_BOOT_MODE_REG option defaults to a hex value, so 0 will
    show as 0x0 if a default is provided and changed via Kconfig.
    However, it still will show as 0, if no default is given.
    
    Consequently, the "is set to something other than 0" test in a
    Makefile is cumbersome.  Instead this check can easily be performed in
    the C-code.
    
    This removes the ifeq-check from mach-rockchip/Makefile, adds a
    matching #if-check to boot_mode.c and fixes resulting link issues (if
    boot_mode.o was not included due to the Makefile check) by defining a
    stub function (in case the functionality is not built in) for
    setup_boot_mode in boot_mode.c.
    
    Fixes: e306779 (rockchip: make boot_mode related codes reused across all platforms)
    Change-Id: I5299469103d139a90b8c073779d872ef131c3b42
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit f07d76c00d1fe05baad1599d01d07a9226498923)

diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 6c4954b9e0..ee03940ac0 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -28,9 +28,11 @@ obj-spl-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board-spl.o spl-boot-order.o
 
 ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
 
-ifneq ($(CONFIG_ROCKCHIP_BOOT_MODE_REG),0)
+# Always include boot_mode.o, as we bypass it (i.e. turn it off)
+# inside of boot_mode.c when CONFIG_BOOT_MODE_REG is 0.  This way,
+# we can have the preprocessor correctly recognise both 0x0 and 0
+# meaning "turn it off".
 obj-y += boot_mode.o
-endif
 
 obj-$(CONFIG_ROCKCHIP_CRC) += rockchip_crc.o
 obj-$(CONFIG_ROCKCHIP_SMCCC) += rockchip_smccc.o
diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index f105f57f1f..b50b17329c 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -15,6 +15,15 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#if (CONFIG_ROCKCHIP_BOOT_MODE_REG == 0)
+
+int setup_boot_mode(void)
+{
+	return 0;
+}
+
+#else
+
 void set_back_to_bootrom_dnl_flag(void)
 {
 	writel(BOOT_BROM_DOWNLOAD, CONFIG_ROCKCHIP_BOOT_MODE_REG);
@@ -119,3 +128,5 @@ int setup_boot_mode(void)
 
 	return 0;
 }
+
+#endif

commit 88af3643afe858ed36924f69b1c5a985d6d2fbdf
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Mon Nov 6 07:39:01 2017 -0800

    UPSTREAM: MAINTAINERS: Update maintainer for USB xHCI
    
    As discussed with Marek, this adds myself as the maintainer to
    offload the USB xHCI part.
    
    Change-Id: Ib53bd69e33e86faeb27291c5f3ebddc8d7433467
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit c0c5f910adbe703aa3d353fbf2c63e9ebc779943)

diff --git a/MAINTAINERS b/MAINTAINERS
index 04acf2b89d..175a7f0d1c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -444,6 +444,12 @@ S:	Maintained
 T:	git git://git.denx.de/u-boot-usb.git
 F:	drivers/usb/
 
+USB xHCI
+M:	Bin Meng <bmeng.cn@gmail.com>
+S:	Maintained
+T:	git git://git.denx.de/u-boot-usb.git topic-xhci
+F:	drivers/usb/host/xhci*
+
 VIDEO
 M:	Anatolij Gustschin <agust@denx.de>
 S:	Maintained
diff --git a/doc/git-mailrc b/doc/git-mailrc
index 556db0a818..5a365cddd9 100644
--- a/doc/git-mailrc
+++ b/doc/git-mailrc
@@ -133,6 +133,7 @@ alias spi            uboot, jagan
 alias spmi           uboot, mateusz
 alias ubi            uboot, hs
 alias usb            uboot, marex
+alias xhci           uboot, bmeng
 alias video          uboot, ag
 alias patman         uboot, sjg
 alias buildman       uboot, sjg

commit 14595d815a8a938a948a7b13c17afa2265de9ef5
Author: Marek Vasut <marex@denx.de>
Date:   Thu Oct 19 21:45:53 2017 +0200

    UPSTREAM: usb: gadget: storage: Increase FSG_BUFLEN
    
    Increase the buffer length to be just above maximum permissible value
    of 128 kiB . This increases the performance of the UMS and alike by a
    factor of 2 - 2.5 as the buffers are less fragmented.
    
    Change-Id: I8b285031fd251b2ebf672c2295a19bfcba77d8c6
    Signed-off-by: Marek Vasut <marex@denx.de>
    Cc: Lukasz Majewski <lukma@denx.de>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit a8c402f45c758235916615757ac537db8e96fc31)

diff --git a/drivers/usb/gadget/storage_common.c b/drivers/usb/gadget/storage_common.c
index b6df130a14..4d5a9a8c42 100644
--- a/drivers/usb/gadget/storage_common.c
+++ b/drivers/usb/gadget/storage_common.c
@@ -309,7 +309,7 @@ static struct fsg_lun *fsg_lun_from_dev(struct device *dev)
 #define FSG_NUM_BUFFERS	2
 
 /* Default size of buffer length. */
-#define FSG_BUFLEN	((u32)16384)
+#define FSG_BUFLEN	((u32)131072)
 
 /* Maximal number of LUNs supported in mass storage function */
 #define FSG_MAX_LUNS	8

commit 3f6e9bd9ffd441c85331e40afe0782407528840e
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Wed Nov 22 17:15:17 2017 +0100

    UPSTREAM: usb: hub: identify the hub-device to usb_hub_reset_devices
    
    When usb_hub_reset_devices is called, it should be passed both an
    indicator which hub it should operate on and what port number (local
    to that hub) should be reset.
    
    Previously, the usb_hub.c code did not include such context and
    always started resets from port number 1, performing multiple
    reset-requests for the same devices:
    
           /*
            * Reset any devices that may be in a bad state when applying
            * the power.  This is a __weak function.  Resetting of the devices
            * should occur in the board file of the device.
            */
           for (i = 0; i < dev->maxchild; i++)
                  usb_hub_reset_devices(i + 1);
    
    This adds an additional 'hub' parameter to usb_hub_reset_devices
    that provides the context to fully qualify the port-number in.
    
    Existing implementations are changed to accept and ignore the new
    parameter.
    
    Change-Id: I2f201cb9c52522f6e553cbf54aae9bbb2e549a21
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 883946e8e7c5dacb5e12f18703e20d49a4886f0e)

diff --git a/board/compulab/cm_t54/cm_t54.c b/board/compulab/cm_t54/cm_t54.c
index 31730a4d1c..3e6235a3b7 100644
--- a/board/compulab/cm_t54/cm_t54.c
+++ b/board/compulab/cm_t54/cm_t54.c
@@ -246,7 +246,7 @@ int ehci_hcd_stop(void)
 	return ret;
 }
 
-void usb_hub_reset_devices(int port)
+void usb_hub_reset_devices(struct usb_hub_device *hub, int port)
 {
 	/* The LAN9730 needs to be reset after the port power has been set. */
 	if (port == 3) {
diff --git a/board/ti/omap5_uevm/evm.c b/board/ti/omap5_uevm/evm.c
index 4b25cc2d7c..67242f5cc8 100644
--- a/board/ti/omap5_uevm/evm.c
+++ b/board/ti/omap5_uevm/evm.c
@@ -249,7 +249,7 @@ int ehci_hcd_stop(void)
 	return omap_ehci_hcd_stop();
 }
 
-void usb_hub_reset_devices(int port)
+void usb_hub_reset_devices(struct usb_hub_device *hub, int port)
 {
 	/* The LAN9730 needs to be reset after the port power has been set. */
 	if (port == 3) {
diff --git a/common/usb_hub.c b/common/usb_hub.c
index 325d16dfc8..024dadb277 100644
--- a/common/usb_hub.c
+++ b/common/usb_hub.c
@@ -57,7 +57,7 @@ struct usb_device_scan {
 
 static LIST_HEAD(usb_scan_list);
 
-__weak void usb_hub_reset_devices(int port)
+__weak void usb_hub_reset_devices(struct usb_hub_device *hub, int port)
 {
 	return;
 }
@@ -853,7 +853,7 @@ static int usb_hub_configure(struct usb_device *dev)
 	 * should occur in the board file of the device.
 	 */
 	for (i = 0; i < dev->maxchild; i++)
-		usb_hub_reset_devices(i + 1);
+		usb_hub_reset_devices(hub, i + 1);
 
 	/*
 	 * Only add the connected USB devices, including potential hubs,

commit 1bee64cb36b365e298e6ae73ef4ea08f68a1e2c2
Author: Dirk Behme <dirk.behme@gmail.com>
Date:   Fri Nov 17 15:28:36 2017 +0100

    UPSTREAM: usb: ehci: do not invalidate a NULL buffer
    
    Its a valid use case to call ehci_submit_async() with a NULL buffer
    with length 0. E.g. from usb_set_configuration().
    
    As invalidate_dcache_range() isn't able to judge if the address
    NULL is valid or not (depending on the SoC hardware configuration it
    might be valid) do the check in ehci_submit_async() as here we know
    that we don't have to invalidate such a buffer.
    
    Change-Id: If8d1ee336c3123356138551ed4cbb556e26bf4ed
    Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit b3cbcd902db7019410dfe3729a660abcb1f03ffb)

diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index 80cc87c9ef..2582bf36eb 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -592,8 +592,9 @@ ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,
 	 * dangerous operation, it's responsibility of the calling
 	 * code to make sure enough space is reserved.
 	 */
-	invalidate_dcache_range((unsigned long)buffer,
-		ALIGN((unsigned long)buffer + length, ARCH_DMA_MINALIGN));
+	if (buffer != NULL && length > 0)
+		invalidate_dcache_range((unsigned long)buffer,
+			ALIGN((unsigned long)buffer + length, ARCH_DMA_MINALIGN));
 
 	/* Check that the TD processing happened */
 	if (QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE)

commit 85b3e780a7ef93d2c49b867945f60c83a42a8de7
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Mon Nov 20 19:33:39 2017 +0100

    UPSTREAM: dm: usb: ehci: avoid possible NULL dereference
    
    Currently we check in ehci_shutdown() if ctrl is NULL after
    dereferencing it.
    
    Before this we have already dereferenced ctrl, ctrl->hccr,
    and ctrl->hcor in ehci_get_portsc_register(), ehci_submit_root(),
    and hci_common_init().
    
    A better approach is to already check ctrl, ctrl->hccr, and ctrl->hcor
    during the initialization in ehci_register() and usb_lowlevel_init()
    and signal an error here via the return code.
    
    Change-Id: I940999cbb94fbae4642fd25df820997c4d642da1
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 45157d27644c23493ea1b5a6c9dd67572eb75c8c)

diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index be3e842dcc..80cc87c9ef 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -210,9 +210,6 @@ static int ehci_shutdown(struct ehci_ctrl *ctrl)
 	uint32_t cmd, reg;
 	int max_ports = HCS_N_PORTS(ehci_readl(&ctrl->hccr->cr_hcsparams));
 
-	if (!ctrl || !ctrl->hcor)
-		return -EINVAL;
-
 	cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
 	/* If not run, directly return */
 	if (!(cmd & CMD_RUN))
@@ -1112,6 +1109,8 @@ int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
 	rc = ehci_hcd_init(index, init, &ctrl->hccr, &ctrl->hcor);
 	if (rc)
 		return rc;
+	if (!ctrl->hccr || !ctrl->hcor)
+		return -1;
 	if (init == USB_INIT_DEVICE)
 		goto done;
 
@@ -1613,11 +1612,14 @@ int ehci_register(struct udevice *dev, struct ehci_hccr *hccr,
 {
 	struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
 	struct ehci_ctrl *ctrl = dev_get_priv(dev);
-	int ret;
+	int ret = -1;
 
 	debug("%s: dev='%s', ctrl=%p, hccr=%p, hcor=%p, init=%d\n", __func__,
 	      dev->name, ctrl, hccr, hcor, init);
 
+	if (!ctrl || !hccr || !hcor)
+		goto err;
+
 	priv->desc_before_addr = true;
 
 	ehci_setup_ops(ctrl, ops);

commit 02b25dcd4f43845509d129d42a1e4a2b273a0c96
Author: Alexey Brodkin <Alexey.Brodkin@synopsys.com>
Date:   Fri Nov 17 16:26:30 2017 +0300

    UPSTREAM: usb: ehci: Fix accessors for big-endian platforms and descriptors
    
    Commit 9000eddbae0d ("drivers/usb/ehci: Use platform-specific accessors")
    broke USB 2.0 on big-endian platforms because for them writel/readl()
    does automatic conversion of BE data to LE.
    
    Proper implementation requires to use "raw" variant of these accessors
    which read/write data without messing with endianess.
    
    While at it replace cpu_to_be32() to be32_to_cpu() in readl() to
    keep sane semantics.
    
    Change-Id: I35e193f08aa56967c831bce1b2892e2c51527796
    Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
    Cc: Marek Vasut <marex@denx.de>
    Reported-by: Vladimir Boroda <boroda@yahoo.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 9829ce2ff25c659ca29cd15ab773312ac4b6cfc6)

diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h
index 7c39becd24..18692b732e 100644
--- a/drivers/usb/host/ehci.h
+++ b/drivers/usb/host/ehci.h
@@ -101,11 +101,11 @@ struct usb_linux_config_descriptor {
 } __attribute__ ((packed));
 
 #if defined CONFIG_EHCI_DESC_BIG_ENDIAN
-#define ehci_readl(x)		cpu_to_be32(readl(x))
-#define ehci_writel(a, b)	writel(cpu_to_be32(b), a)
+#define ehci_readl(x)		be32_to_cpu(__raw_readl(x))
+#define ehci_writel(a, b)	__raw_writel(cpu_to_be32(b), a)
 #else
-#define ehci_readl(x)		cpu_to_le32(readl(x))
-#define ehci_writel(a, b)	writel(cpu_to_le32(b), a)
+#define ehci_readl(x)		readl(x)
+#define ehci_writel(a, b)	writel(b, a)
 #endif
 
 #if defined CONFIG_EHCI_MMIO_BIG_ENDIAN

commit 1c7b1b4b19c0ae9035c8c79758ee15583d814676
Author: Suneel Garapati <suneelglinux@gmail.com>
Date:   Mon Oct 23 17:28:40 2017 -0700

    UPSTREAM: cmd: usb: ignore blk, emulation devices in usb tree/info display
    
    Usb tree/info commands iterate over all usb uclass devices recursively.
    Blk uclass devices based on struct blk_desc are created for mass storage
    device, treating them as usb uclass devices based on struct usb_device
    and referencing usb config interface descriptors cause crash.
    To fix, ignore blk and usb_emul uclass devices in usb_show_info
    and usb_tree_graph. Also avoid addition of preamble for blk uclass
    child devices, otherwise tree dump gets messed up.
    
    Change-Id: If25ca43b08c0918c44583f71282a07c928e5bf53
    Signed-off-by: Suneel Garapati <suneelglinux@gmail.com>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Tested-by: Bin Meng <bmeng.cn@gmail.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit abd7cedb19ab7979467734b3933a39879bd8935a)

diff --git a/cmd/usb.c b/cmd/usb.c
index d95bcf5c8e..907debe30f 100644
--- a/cmd/usb.c
+++ b/cmd/usb.c
@@ -349,6 +349,16 @@ static void usb_show_tree_graph(struct usb_device *dev, char *pre)
 	printf(" %s", pre);
 #ifdef CONFIG_DM_USB
 	has_child = device_has_active_children(dev->dev);
+	if (device_get_uclass_id(dev->dev) == UCLASS_MASS_STORAGE) {
+		struct udevice *child;
+
+		for (device_find_first_child(dev->dev, &child);
+		     child;
+		     device_find_next_child(&child)) {
+			if (device_get_uclass_id(child) == UCLASS_BLK)
+				has_child = 0;
+		}
+	}
 #else
 	/* check if the device has connected children */
 	int i;
@@ -414,8 +424,12 @@ static void usb_show_tree_graph(struct usb_device *dev, char *pre)
 
 		udev = dev_get_parent_priv(child);
 
-		/* Ignore emulators, we only want real devices */
-		if (device_get_uclass_id(child) != UCLASS_USB_EMUL) {
+		/*
+		 * Ignore emulators and block child devices, we only want
+		 * real devices
+		 */
+		if ((device_get_uclass_id(child) != UCLASS_USB_EMUL) &&
+		    (device_get_uclass_id(child) != UCLASS_BLK)) {
 			usb_show_tree_graph(udev, pre);
 			pre[index] = 0;
 		}
@@ -605,7 +619,9 @@ static void usb_show_info(struct usb_device *udev)
 	for (device_find_first_child(udev->dev, &child);
 	     child;
 	     device_find_next_child(&child)) {
-		if (device_active(child)) {
+		if (device_active(child) &&
+		    (device_get_uclass_id(child) != UCLASS_USB_EMUL) &&
+		    (device_get_uclass_id(child) != UCLASS_BLK)) {
 			udev = dev_get_parent_priv(child);
 			usb_show_info(udev);
 		}

commit 25527bfaa387fa742f89d06180e5915ec7d3882d
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Wed Nov 22 19:47:37 2017 +0100

    UPSTREAM: rockchip: pinctrl: rk3399: add support for I2C8
    
    The RK3399 has a total of 9 I2C controllers.  To support these, the
    enum in periph.h is extended and the mapping from the IRQ numbers to
    the peripheral-ids is extended to ensure that pinctrl requests are
    passed through to the function configuring the I2C pins.
    
    For I2C8, the pinctrl is implemented and tested (on a RK3399-Q7) using
    communication with the FAN53555 connected on I2C8.
    
    Change-Id: I7ad9400f05d3ee89263ecd2bcc391483934b6c74
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 8c2bb589e29d5cb89e10c3ddd23b28d949fa9693)

diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3399.h b/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
index 8d21eb7bee..b541e2caa1 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
@@ -589,7 +589,12 @@ enum {
 	PMUGRF_GPIO1C3_SEL_SHIFT        = 6,
 	PMUGRF_GPIO1C3_SEL_MASK = 3 << PMUGRF_GPIO1C3_SEL_SHIFT,
 	PMUGRF_PWM_2            = 1,
-
+	PMUGRF_GPIO1C4_SEL_SHIFT = 8,
+	PMUGRF_GPIO1C4_SEL_MASK = 3 << PMUGRF_GPIO1C4_SEL_SHIFT,
+	PMUGRF_I2C8PMU_SDA = 1,
+	PMUGRF_GPIO1C5_SEL_SHIFT = 10,
+	PMUGRF_GPIO1C5_SEL_MASK = 3 << PMUGRF_GPIO1C5_SEL_SHIFT,
+	PMUGRF_I2C8PMU_SCL = 1,
 };
 
 /* GRF_SOC_CON5 */
diff --git a/arch/arm/include/asm/arch-rockchip/periph.h b/arch/arm/include/asm/arch-rockchip/periph.h
index 6c8c77dddb..b968ecf2b5 100644
--- a/arch/arm/include/asm/arch-rockchip/periph.h
+++ b/arch/arm/include/asm/arch-rockchip/periph.h
@@ -24,6 +24,9 @@ enum periph_id {
 	PERIPH_ID_I2C3,
 	PERIPH_ID_I2C4,
 	PERIPH_ID_I2C5,
+	PERIPH_ID_I2C6,
+	PERIPH_ID_I2C7,
+	PERIPH_ID_I2C8,
 	PERIPH_ID_SPI0,
 	PERIPH_ID_SPI1,
 	PERIPH_ID_SPI2,
diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3399.c b/drivers/pinctrl/rockchip/pinctrl_rk3399.c
index d93b90310b..19b81e744d 100644
--- a/drivers/pinctrl/rockchip/pinctrl_rk3399.c
+++ b/drivers/pinctrl/rockchip/pinctrl_rk3399.c
@@ -70,11 +70,21 @@ static void pinctrl_rk3399_i2c_config(struct rk3399_grf_regs *grf,
 			     PMUGRF_GPIO1C0_SEL_MASK,
 			     PMUGRF_I2C0PMU_SCL << PMUGRF_GPIO1C0_SEL_SHIFT);
 		break;
+	case PERIPH_ID_I2C8:
+		rk_clrsetreg(&pmugrf->gpio1c_iomux,
+			     PMUGRF_GPIO1C4_SEL_MASK,
+			     PMUGRF_I2C8PMU_SDA << PMUGRF_GPIO1C4_SEL_SHIFT);
+		rk_clrsetreg(&pmugrf->gpio1c_iomux,
+			     PMUGRF_GPIO1C5_SEL_MASK,
+			     PMUGRF_I2C8PMU_SCL << PMUGRF_GPIO1C5_SEL_SHIFT);
+		break;
 	case PERIPH_ID_I2C1:
 	case PERIPH_ID_I2C2:
 	case PERIPH_ID_I2C3:
 	case PERIPH_ID_I2C4:
 	case PERIPH_ID_I2C5:
+	case PERIPH_ID_I2C6:
+	case PERIPH_ID_I2C7:
 	default:
 		debug("i2c id = %d iomux error!\n", i2c_id);
 		break;
@@ -301,6 +311,9 @@ static int rk3399_pinctrl_request(struct udevice *dev, int func, int flags)
 	case PERIPH_ID_I2C3:
 	case PERIPH_ID_I2C4:
 	case PERIPH_ID_I2C5:
+	case PERIPH_ID_I2C6:
+	case PERIPH_ID_I2C7:
+	case PERIPH_ID_I2C8:
 		pinctrl_rk3399_i2c_config(priv->grf, priv->pmugrf, func);
 		break;
 	case PERIPH_ID_SPI0:
@@ -376,6 +389,12 @@ static int rk3399_pinctrl_get_periph_id(struct udevice *dev,
 		return PERIPH_ID_I2C4;
 	case 38:
 		return PERIPH_ID_I2C5;
+	case 37:
+		return PERIPH_ID_I2C6;
+	case 36:
+		return PERIPH_ID_I2C7;
+	case 58:
+		return PERIPH_ID_I2C8;
 	case 65:
 		return PERIPH_ID_SDMMC1;
 #if CONFIG_IS_ENABLED(GMAC_ROCKCHIP)

commit feab7f33439d0e017a9ff8176e258f193285f29b
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Wed Nov 22 19:45:04 2017 +0100

    UPSTREAM: rockchip: clk: rk3399: change extract_bits to bitfield_extract
    
    The RK3399 clk driver still has a left-over use of extract_bits, which
    can be replaced by using bitfield_extract from include/bitfield.h.
    This rewrites the invocation to use the shared function.
    
    Change-Id: Ia541e82ffce50d0f2a43928530ecece66ae1cd17
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit a8ee98df183ed240afb5220c3cdf2991f69fa578)

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 25550a7429..08eb8f55b0 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -569,11 +569,6 @@ static const struct spi_clkreg spi_clkregs[] = {
 		.sel_shift = CLK_SPI5_PLL_SEL_SHIFT, },
 };
 
-static inline u32 extract_bits(u32 val, unsigned width, unsigned shift)
-{
-	return (val >> shift) & ((1 << width) - 1);
-}
-
 static ulong rk3399_spi_get_clk(struct rk3399_cru *cru, ulong clk_id)
 {
 	const struct spi_clkreg *spiclk = NULL;
@@ -590,7 +585,8 @@ static ulong rk3399_spi_get_clk(struct rk3399_cru *cru, ulong clk_id)
 	}
 
 	val = readl(&cru->clksel_con[spiclk->reg]);
-	div = extract_bits(val, CLK_SPI_PLL_DIV_CON_WIDTH, spiclk->div_shift);
+	div = bitfield_extract(val, spiclk->div_shift,
+			       CLK_SPI_PLL_DIV_CON_WIDTH);
 
 	return DIV_TO_RATE(GPLL_HZ, div);
 }

commit 8118cce3e01498774b9c8689a32157e7891c2917
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Fri Nov 24 13:26:03 2017 +0100

    UPSTREAM: spl: fit: add SPL_FIT_IMAGE_TINY config to reduce code-size
    
    A minor code-size increase from the changes for tracking the os-type
    of FIT images and from infrastructure for recording the loadables into
    the the loaded FDT, broke the builds for sun50i and some OMAP2+ devices.
    
    This change adds a new config option (enabled by default for
    MACH_SUN50I, MACH_SUN50I_H5 and ARCH_OMAP2PLUS) that does skips these
    processing steps (bringing code size down to below the limit
    again). The os-type is not evaluated, but assumed to be IH_OS_UBOOT
    (i.e. taking the code-paths intended for backward-compatibility).
    
    Note that enabling this config option precludes any useful downstream
    processing, such as utilising a special calling convention for ATF or
    OPTEE, based on the os-type of the loadables.
    
    Change-Id: I32036975208be6e9d9d2ad3b5376444efd693f25
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 337bbb6297775e8e9d664e96e96004f00d1d8c02)

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 2ae32c0842..d007c50341 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -227,6 +227,22 @@ config SPL_SHA256_SUPPORT
 	  SHA256 variant is supported: SHA512 and others are not currently
 	  supported in U-Boot.
 
+config SPL_FIT_IMAGE_TINY
+	bool "Remove functionality from SPL FIT loading to reduce size"
+	depends on SPL_FIT
+	default y if MACH_SUN50I || MACH_SUN50I_H5
+	default y if ARCH_OMAP2PLUS
+	help
+	  Enable this to reduce the size of the FIT image loading code
+	  in SPL, if space for the SPL binary is very tight.
+
+	  This removes the detection of image types (which forces the
+	  first image to be treated as having a U-Boot style calling
+	  convention) and skips the recording of each loaded payload
+	  (i.e. loadable) into the FDT (modifying the loaded FDT to
+	  ensure this information is available to the next image
+	  invoked).
+
 config SPL_CPU_SUPPORT
 	bool "Support CPU drivers"
 	help
diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 128af1bbd6..72ae8f4c50 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -275,8 +275,10 @@ static int spl_fit_append_fdt(struct spl_image_info *spl_image,
 
 	/* Make the load-address of the FDT available for the SPL framework */
 	spl_image->fdt_addr = (void *)image_info.load_addr;
+#if !CONFIG_IS_ENABLED(FIT_IMAGE_TINY)
 	/* Try to make space, so we can inject details on the loadables */
 	ret = fdt_shrink_to_minimum(spl_image->fdt_addr, 8192);
+#endif
 
 	return ret;
 }
@@ -284,8 +286,10 @@ static int spl_fit_append_fdt(struct spl_image_info *spl_image,
 static int spl_fit_record_loadable(const void *fit, int images, int index,
 				   void *blob, struct spl_image_info *image)
 {
+	int ret = 0;
+#if !CONFIG_IS_ENABLED(FIT_IMAGE_TINY)
 	char *name;
-	int node, ret;
+	int node;
 
 	ret = spl_fit_get_image_name(fit, images, "loadables",
 				     index, &name);
@@ -298,9 +302,19 @@ static int spl_fit_record_loadable(const void *fit, int images, int index,
 				  image->size, image->entry_point,
 				  fdt_getprop(fit, node, "type", NULL),
 				  fdt_getprop(fit, node, "os", NULL));
+#endif
 	return ret;
 }
 
+static int spl_fit_image_get_os(const void *fit, int noffset, uint8_t *os)
+{
+#if CONFIG_IS_ENABLED(FIT_IMAGE_TINY)
+	return -ENOTSUPP;
+#else
+	return fit_image_get_os(fit, noffset, os);
+#endif
+}
+
 int spl_load_simple_fit(struct spl_image_info *spl_image,
 			struct spl_load_info *info, ulong sector, void *fit)
 {
@@ -392,7 +406,7 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 	 * For backward compatibility, we treat the first node that is
 	 * as a U-Boot image, if no OS-type has been declared.
 	 */
-	if (!fit_image_get_os(fit, node, &spl_image->os))
+	if (!spl_fit_image_get_os(fit, node, &spl_image->os))
 		debug("Image OS is %s\n", genimg_get_os_name(spl_image->os));
 #if !defined(CONFIG_SPL_OS_BOOT)
 	else
@@ -420,7 +434,7 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 		if (ret < 0)
 			continue;
 
-		if (!fit_image_get_os(fit, node, &os_type))
+		if (!spl_fit_image_get_os(fit, node, &os_type))
 			debug("Loadable is %s\n", genimg_get_os_name(os_type));
 
 		if (os_type == IH_OS_U_BOOT) {
diff --git a/include/fdt_support.h b/include/fdt_support.h
index afaf0e787d..e0f908636c 100644
--- a/include/fdt_support.h
+++ b/include/fdt_support.h
@@ -133,7 +133,6 @@ void fdt_fixup_crypto_node(void *blob, int sec_rev);
 static inline void fdt_fixup_crypto_node(void *blob, int sec_rev) {}
 #endif
 
-#if CONFIG_IS_ENABLED(LOAD_FIT)
 /**
  * Record information about a processed loadable in /fit-images (creating
  * /fit-images if necessary).
@@ -151,7 +150,6 @@ static inline void fdt_fixup_crypto_node(void *blob, int sec_rev) {}
 int fdt_record_loadable(void *blob, u32 index, const char *name,
 			uintptr_t load_addr, u32 size, uintptr_t entry_point,
 			const char *type, const char *os);
-#endif
 
 #ifdef CONFIG_PCI
 #include <pci.h>

commit 3327a2717beca7d4da03a49d008496601633eec8
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Wed Sep 13 21:29:43 2017 +0200

    rockchip: defconfig: lion-rk3368: sync up with SPL changes for ATF
    
    This tracks the SPL changes for ATF for the RK3368-uQ7:
     * renames ATF_SUPPORT to ATF
     * drops CONFIG_SPL_ATF_TEXT_BASE (now dynamically retrieved from
       the .itb file)
    
    Change-Id: Ibb5c0769d20edf7e80d2fbf420f5a58bd4b4ef03
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit ec4bf3d6bd5ebc01d2664560b1e79e36994f6c1d)

diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig
index 9181f16dca..330063d1b4 100644
--- a/configs/lion-rk3368_defconfig
+++ b/configs/lion-rk3368_defconfig
@@ -32,7 +32,7 @@ CONFIG_SPL_BOOTROM_SUPPORT=y
 CONFIG_TPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
-CONFIG_SPL_ATF_SUPPORT=y
+CONFIG_SPL_ATF=y
 CONFIG_TPL=y
 CONFIG_TPL_BOOTROM_SUPPORT=y
 CONFIG_TPL_DRIVERS_MISC_SUPPORT=y

commit 30f7cc2439c9d5f81682ffd64765cc61b069e882
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Wed Sep 13 21:29:42 2017 +0200

    UPSTREAM: rockchip: defconfig: puma-rk3399: sync up with SPL changes for ATF
    
    This defconfig update makes use of the new features:
     * CONFIG_ROCKCHIP_SPL_RESERVE_IRAM is now set to 0, as there is no
       overlap between the M0 firmware and the ATF (we load this to DRAM
       and relocate it to its final location within the ATF)
     * tracks the ATF_SUPPORT -> ATF renaming
    
    Change-Id: I91dca4f1b51701a00eef67114793633c334ed84c
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit cba7b949b4a2ebceabf6adde04eb9f67f71c7ee4)

diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig
index 6c2eb928f3..c808657dbd 100644
--- a/configs/puma-rk3399_defconfig
+++ b/configs/puma-rk3399_defconfig
@@ -5,6 +5,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_ROCKCHIP_RK3399=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0
 CONFIG_TARGET_PUMA_RK3399=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
@@ -23,6 +24,7 @@ CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_ATF=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y

commit 916b3b5925470723305711791c00be8af633a61a
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Wed Sep 13 21:29:41 2017 +0200

    UPSTREAM: rockchip: board: lion-rk3368: update .its file
    
    For the RK3368-uQ7, we can now update the .its file to mark the
    Trusted Firmware as out 'firmware' bootable and annotate both ATF and
    U-Boot with an OS-type.
    
    Change-Id: I637ee137e1ea361ec198425e0e1b14c26343d913
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit b07856fe436a6ccf20c6176cd450a4c4487973a1)

diff --git a/board/theobroma-systems/lion_rk3368/fit_spl_atf.its b/board/theobroma-systems/lion_rk3368/fit_spl_atf.its
index 60daddcc44..e3bea5ea2f 100644
--- a/board/theobroma-systems/lion_rk3368/fit_spl_atf.its
+++ b/board/theobroma-systems/lion_rk3368/fit_spl_atf.its
@@ -17,6 +17,7 @@
 			description = "U-Boot (64-bit)";
 			data = /incbin/("../../../u-boot-nodtb.bin");
 			type = "standalone";
+			os = "U-Boot";
 			arch = "arm64";
 			compression = "none";
 			load = <0x00200000>;
@@ -25,6 +26,7 @@
 			description = "ARM Trusted Firmware";
 			data = /incbin/("../../../bl31-rk3368.bin");
 			type = "firmware";
+			os = "arm-trusted-firmware";
 			arch = "arm64";
 			compression = "none";
 			load = <0x00100000>;
@@ -43,8 +45,8 @@
 		default = "conf";
 		conf {
 			description = "Theobroma Systems RK3368-uQ7 (Puma) SoM";
-			firmware = "uboot";
-			loadables = "atf";
+			firmware = "atf";
+			loadables = "uboot";
 			fdt = "fdt";
 		};
 	};

commit 07c4cb3a1fb2156ffddadf0193a0776c61081122
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Wed Sep 13 21:29:40 2017 +0200

    UPSTREAM: rockchip: board: puma-rk3399: update .its file to use new features
    
    This commit updates the .its file for the RK3399-Q7 to use the new
    features and demonstrates how to use those:
     * it marks the ATF as the 'firmware'
     * it tracks the OS-type for U-Boot and ATF
     * it loads the PMU (M0) firmware to DRAM and records the location
       to /fit-images (where our ATF reads it from)
    
    With the handoff of the next-stage FDT to ATF in place, we can now use
    this to pass information about the load addresses and names of each
    loadables to ATF: now we can load the M0 firmware into DRAM and avoid
    overwriting parts of the SPL stage.  This is achieved by changing our
    .its-file to use an available area of DRAM as the load-address.
    
    Change-Id: Iff9e14ecaa7eb01b40498880a34f8fc87bda0090
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit fc76fa3cfa3fa716bf541f30977896fd6656b148)

diff --git a/board/theobroma-systems/puma_rk3399/fit_spl_atf.its b/board/theobroma-systems/puma_rk3399/fit_spl_atf.its
index 520f846d66..cb7d92fead 100644
--- a/board/theobroma-systems/puma_rk3399/fit_spl_atf.its
+++ b/board/theobroma-systems/puma_rk3399/fit_spl_atf.its
@@ -17,6 +17,7 @@
 			description = "U-Boot (64-bit)";
 			data = /incbin/("../../../u-boot-nodtb.bin");
 			type = "standalone";
+			os = "U-Boot";
 			arch = "arm64";
 			compression = "none";
 			load = <0x00200000>;
@@ -26,16 +27,17 @@
 			data = /incbin/("../../../bl31-rk3399.bin");
 			type = "firmware";
 			arch = "arm64";
+			os = "arm-trusted-firmware";
 			compression = "none";
-			load = <0x00001000>;
-			entry = <0x00001000>;
+			load = <0x1000>;
+			entry = <0x1000>;
 		};
 		pmu {
 		        description = "Cortex-M0 firmware";
 			data = /incbin/("../../../rk3399m0.bin");
 			type = "pmu-firmware";
 			compression = "none";
-			load = <0xff8c0000>;
+			load = <0x180000>;
                 };
 		fdt {
 			description = "RK3399-Q7 (Puma) flat device-tree";
@@ -49,8 +51,8 @@
 		default = "conf";
 		conf {
 			description = "Theobroma Systems RK3399-Q7 (Puma) SoM";
-			firmware = "uboot";
-			loadables = "atf";
+			firmware = "atf";
+			loadables = "uboot", "pmu";
 			fdt = "fdt";
 		};
 	};

commit 7cde5f1b415c49390bc25ecd2f41a1e955a205cb
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Wed Sep 13 21:29:39 2017 +0200

    rockchip: defconfig: firefly-rk3399: sync up with SPL changes for ATF
    
    This tracks the SPL changes for ATF for the Firefly:
     * renames ATF_SUPPORT to ATF
     * drops CONFIG_SPL_ATF_TEXT_BASE
    
    Change-Id: I3e386320f689b010344a0f1c8ca87fe9bcc0d075
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit cd5eae5590fcf8529ff0b2268db0968558842218)

diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
index 5d228af96c..979f6e303f 100644
--- a/configs/firefly-rk3399_defconfig
+++ b/configs/firefly-rk3399_defconfig
@@ -13,7 +13,6 @@ CONFIG_SPL_FIT_GENERATOR="board/rockchip/evb_rk3399/mk_fit_atf.sh"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
-CONFIG_SPL_ATF_SUPPORT=y
 CONFIG_FASTBOOT=y
 CONFIG_USB_FUNCTION_FASTBOOT=y
 CONFIG_CMD_FASTBOOT=y
@@ -22,6 +21,7 @@ CONFIG_FASTBOOT_BUF_ADDR=0x00800800
 CONFIG_FASTBOOT_BUF_SIZE=0x08000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_SPL_ATF=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_FASTBOOT=y
 CONFIG_ANDROID_BOOTLOADER=y

commit 9f8888bc5c0ed15d6741e2871ad01fba4ecf94d3
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Wed Sep 13 21:29:36 2017 +0200

    spl: rename config item SPL_ATF_SUPPORT to SPL_ATF
    
    Having CONFIG_SPL_ATF seems more natural.
    Rename it, while it it is easy and there's few boards that use it
    (only RK3399 and RK3368 boards).
    
    Change-Id: Ie13ba6eeb687bf6f8c8d326c197f453fb752e9bd
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit aa122f6b3d24bd133392c7dd2a882a8cc2cbd622)

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 2115b58b35..2ae32c0842 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -693,7 +693,7 @@ config SPL_YMODEM_SUPPORT
 	  means of transmitting U-Boot over a serial line for using in SPL,
 	  with a checksum to ensure correctness.
 
-config SPL_ATF_SUPPORT
+config SPL_ATF
 	bool "Support ARM Trusted Firmware"
 	depends on ARM64
 	help
diff --git a/common/spl/Makefile b/common/spl/Makefile
index 8abd15c003..63db03b9bd 100644
--- a/common/spl/Makefile
+++ b/common/spl/Makefile
@@ -22,7 +22,7 @@ endif
 obj-$(CONFIG_$(SPL_TPL_)UBI) += spl_ubi.o
 obj-$(CONFIG_$(SPL_TPL_)NET_SUPPORT) += spl_net.o
 obj-$(CONFIG_$(SPL_TPL_)MMC_SUPPORT) += spl_mmc.o
-obj-$(CONFIG_$(SPL_TPL_)ATF_SUPPORT) += spl_atf.o
+obj-$(CONFIG_$(SPL_TPL_)ATF) += spl_atf.o
 obj-$(CONFIG_$(SPL_TPL_)OPTEE_SUPPORT) += spl_optee.o
 obj-$(CONFIG_$(SPL_TPL_)USB_SUPPORT) += spl_usb.o
 obj-$(CONFIG_$(SPL_TPL_)FAT_SUPPORT) += spl_fat.o

commit 2e15a11c919f31a13fad3b872d34c024a66d0829
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Wed Sep 13 21:29:35 2017 +0200

    spl: atf: introduce spl_invoke_atf and make bl31_entry private
    
    This adds a new interface spl_invoke_atf() that takes a spl_image_info
    argument and then derives the necessary parameters for the ATF entry.
    Based on the additional information recorded (into /fit-images) from
    the FIT loadables, we can now easily locate the next boot stage.
    
    We now pass a pointer to a FDT as the platform-specific parameter
    pointer to ATF (so we don't run into the future headache of every
    board/platform defining their own proprietary tag-structure), as
    FDT access is already available in ATF.
    
    With the necessary infrastructure in place, we can now update the
    support for the ARM Trusted Firmware to dispatch into the
    spl_invoke_atf function only if a IH_OS_ARM_TRUSTED_FIRMWARE image is
    loaded.
    
    Change-Id: Ia00abe207a0a0fed044fcda2b6e1054225b42901
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 1d3790905d9c089b434c376f2dcc585b6a92bc99)

diff --git a/common/spl/spl.c b/common/spl/spl.c
index 0b5b1a9a33..b2bd7c91f6 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -418,6 +418,12 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 	case IH_OS_U_BOOT:
 		debug("Jumping to U-Boot\n");
 		break;
+#if CONFIG_IS_ENABLED(ATF)
+	case IH_OS_ARM_TRUSTED_FIRMWARE:
+		debug("Jumping to U-Boot via ARM Trusted Firmware\n");
+		spl_invoke_atf(&spl_image);
+		break;
+#endif
 #ifdef CONFIG_SPL_OS_BOOT
 	case IH_OS_LINUX:
 		debug("Jumping to Linux\n");
@@ -442,11 +448,6 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 		debug("Failed to stash bootstage: err=%d\n", ret);
 #endif
 
-	if (CONFIG_IS_ENABLED(ATF_SUPPORT)) {
-		debug("loaded - jumping to U-Boot via ATF BL31.\n");
-		spl_bl31_entry((void *)spl_image.entry_point);
-	}
-
 	if (CONFIG_IS_ENABLED(OPTEE_SUPPORT)) {
 		debug("loaded - jumping to U-Boot via OP-TEE.\n");
 		spl_optee_entry(0, 0, 0, (void *)spl_image.entry_point);
diff --git a/common/spl/spl_atf.c b/common/spl/spl_atf.c
index 06c4a03920..eaea95455f 100644
--- a/common/spl/spl_atf.c
+++ b/common/spl/spl_atf.c
@@ -5,6 +5,7 @@
  * reserved.
  * Copyright (C) 2016 Rockchip Electronic Co.,Ltd
  * Written by Kever Yang <kever.yang@rock-chips.com>
+ * Copyright (C) 2017 Theobroma Systems Design und Consulting GmbH
  *
  * SPDX-License-Identifier:     BSD-3-Clause
  */
@@ -30,7 +31,7 @@ static struct bl31_params *bl2_to_bl31_params;
  *
  * @return bl31 params structure pointer
  */
-struct bl31_params *bl2_plat_get_bl31_params(void)
+static struct bl31_params *bl2_plat_get_bl31_params(uintptr_t bl33_entry)
 {
 	struct entry_point_info *bl33_ep_info;
 
@@ -67,7 +68,7 @@ struct bl31_params *bl2_plat_get_bl31_params(void)
 
 	/* BL33 expects to receive the primary CPU MPID (through x0) */
 	bl33_ep_info->args.arg0 = 0xffff & read_mpidr();
-	bl33_ep_info->pc = CONFIG_SYS_TEXT_BASE;
+	bl33_ep_info->pc = bl33_entry;
 	bl33_ep_info->spsr = SPSR_64(MODE_EL2, MODE_SP_ELX,
 				     DISABLE_ALL_EXECPTIONS);
 
@@ -78,21 +79,88 @@ struct bl31_params *bl2_plat_get_bl31_params(void)
 	return bl2_to_bl31_params;
 }
 
-void raw_write_daif(unsigned int daif)
+static inline void raw_write_daif(unsigned int daif)
 {
 	__asm__ __volatile__("msr DAIF, %0\n\t" : : "r" (daif) : "memory");
 }
 
-void spl_bl31_entry(void *entry_addr)
+typedef void (*atf_entry_t)(struct bl31_params *params, void *plat_params);
+
+static void bl31_entry(uintptr_t bl31_entry, uintptr_t bl33_entry,
+		       uintptr_t fdt_addr)
 {
 	struct bl31_params *bl31_params;
-	void (*entry)(struct bl31_params *params, void *plat_params) = NULL;
+	atf_entry_t  atf_entry = (atf_entry_t)bl31_entry;
 
-	bl31_params = bl2_plat_get_bl31_params();
-	entry = entry_addr;
+	bl31_params = bl2_plat_get_bl31_params(bl33_entry);
 
 	raw_write_daif(SPSR_EXCEPTION_MASK);
 	dcache_disable();
 
-	entry(bl31_params, NULL);
+	atf_entry((void *)bl31_params, (void *)fdt_addr);
+}
+
+static int spl_fit_images_find_uboot(void *blob)
+{
+	int parent, node, ndepth;
+	const void *data;
+
+	if (!blob)
+		return -FDT_ERR_BADMAGIC;
+
+	parent = fdt_path_offset(blob, "/fit-images");
+	if (parent < 0)
+		return -FDT_ERR_NOTFOUND;
+
+	for (node = fdt_next_node(blob, parent, &ndepth);
+	     (node >= 0) && (ndepth > 0);
+	     node = fdt_next_node(blob, node, &ndepth)) {
+		if (ndepth != 1)
+			continue;
+
+		data = fdt_getprop(blob, node, FIT_OS_PROP, NULL);
+		if (!data)
+			continue;
+
+		if (genimg_get_os_id(data) == IH_OS_U_BOOT)
+			return node;
+	};
+
+	return -FDT_ERR_NOTFOUND;
+}
+
+uintptr_t spl_fit_images_get_entry(void *blob, int node)
+{
+	ulong  val;
+
+	val = fdt_getprop_u32(blob, node, "entry-point");
+	if (val == FDT_ERROR)
+		val = fdt_getprop_u32(blob, node, "load-addr");
+
+	debug("%s: entry point 0x%lx\n", __func__, val);
+	return val;
+}
+
+void spl_invoke_atf(struct spl_image_info *spl_image)
+{
+	uintptr_t  bl33_entry = CONFIG_SYS_TEXT_BASE;
+	void *blob = spl_image->fdt_addr;
+	int node;
+
+	/*
+	 * Find the U-Boot binary (in /fit-images) load addreess or
+	 * entry point (if different) and pass it as the BL3-3 entry
+	 * point.
+	 * This will need to be extended to support Falcon mode.
+	 */
+
+	node = spl_fit_images_find_uboot(blob);
+	if (node >= 0)
+		bl33_entry = spl_fit_images_get_entry(blob, node);
+
+	/*
+	 * We don't provide a BL3-2 entry yet, but this will be possible
+	 * using similar logic.
+	 */
+	bl31_entry(spl_image->entry_point, bl33_entry, (uintptr_t)blob);
 }

commit 1f1cf67b1dbc54b29e90b088898f163358d81a71
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Wed Sep 13 21:29:34 2017 +0200

    UPSTREAM: spl: fit: implement recording of loadables into /fit-images
    
    If a FDT was loaded (e.g. to append it to U-Boot image), we store it's
    address and record information for all loadables into this FDT.  This
    allows us to easily keep track of images for multiple privilege levels
    (e.g. with ATF) or of firmware images preloaded into temporary
    locations (e.g. PMU firmware that may overlap the SPL stage).
    
    Change-Id: Ifeee692ad0604e2e60e92f76a11f5693c52fe769
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit a616c783f22a045e580f101141a9d62775f97365)

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index c496f45b72..128af1bbd6 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -2,7 +2,7 @@
  * Copyright (C) 2016 Google, Inc
  * Written by Simon Glass <sjg@chromium.org>
  *
- * SPDX-License-Identifier:     GPL-2.0+
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <common.h>
@@ -16,22 +16,24 @@
 #endif
 
 /**
- * spl_fit_get_image_node(): By using the matching configuration subnode,
+ * spl_fit_get_image_name(): By using the matching configuration subnode,
  * retrieve the name of an image, specified by a property name and an index
  * into that.
  * @fit:	Pointer to the FDT blob.
  * @images:	Offset of the /images subnode.
  * @type:	Name of the property within the configuration subnode.
  * @index:	Index into the list of strings in this property.
+ * @outname:	Name of the image
  *
- * Return:	the node offset of the respective image node or a negative
- * 		error number.
+ * Return:	0 on success, or a negative error number
  */
-static int spl_fit_get_image_node(const void *fit, int images,
-				  const char *type, int index)
+static int spl_fit_get_image_name(const void *fit, int images,
+				  const char *type, int index,
+				  char **outname)
 {
 	const char *name, *str;
-	int node, conf_node;
+	__maybe_unused int node;
+	int conf_node;
 	int len, i;
 
 	conf_node = fit_find_config_node(fit);
@@ -63,7 +65,35 @@ static int spl_fit_get_image_node(const void *fit, int images,
 		}
 	}
 
+	*outname = (char *)str;
+	return 0;
+}
+
+/**
+ * spl_fit_get_image_node(): By using the matching configuration subnode,
+ * retrieve the name of an image, specified by a property name and an index
+ * into that.
+ * @fit:	Pointer to the FDT blob.
+ * @images:	Offset of the /images subnode.
+ * @type:	Name of the property within the configuration subnode.
+ * @index:	Index into the list of strings in this property.
+ *
+ * Return:	the node offset of the respective image node or a negative
+ *		error number.
+ */
+static int spl_fit_get_image_node(const void *fit, int images,
+				  const char *type, int index)
+{
+	char *str;
+	int err;
+	int node;
+
+	err = spl_fit_get_image_name(fit, images, type, index, &str);
+	if (err)
+		return err;
+
 	debug("%s: '%s'\n", type, str);
+
 	node = fdt_subnode_offset(fit, images, str);
 	if (node < 0) {
 		debug("cannot find image node '%s': %d\n", str, node);
@@ -116,15 +146,15 @@ static int get_aligned_image_size(struct spl_load_info *info, int data_size,
  * @info:	points to information about the device to load data from
  * @sector:	the start sector of the FIT image on the device
  * @fit:	points to the flattened device tree blob describing the FIT
- * 		image
+ *		image
  * @base_offset: the beginning of the data area containing the actual
  *		image data, relative to the beginning of the FIT
  * @node:	offset of the DT node describing the image to load (relative
- * 		to @fit)
+ *		to @fit)
  * @image_info:	will be filled with information about the loaded image
- * 		If the FIT node does not contain a "load" (address) property,
- * 		the image gets loaded to the address pointed to by the
- * 		load_addr member in this struct.
+ *		If the FIT node does not contain a "load" (address) property,
+ *		the image gets loaded to the address pointed to by the
+ *		load_addr member in this struct.
  *
  * Return:	0 on success or a negative error number.
  */
@@ -239,6 +269,35 @@ static int spl_fit_append_fdt(struct spl_image_info *spl_image,
 	image_info.load_addr = spl_image->load_addr + spl_image->size;
 	ret = spl_load_fit_image(info, sector, fit, base_offset, node,
 				 &image_info);
+
+	if (ret < 0)
+		return ret;
+
+	/* Make the load-address of the FDT available for the SPL framework */
+	spl_image->fdt_addr = (void *)image_info.load_addr;
+	/* Try to make space, so we can inject details on the loadables */
+	ret = fdt_shrink_to_minimum(spl_image->fdt_addr, 8192);
+
+	return ret;
+}
+
+static int spl_fit_record_loadable(const void *fit, int images, int index,
+				   void *blob, struct spl_image_info *image)
+{
+	char *name;
+	int node, ret;
+
+	ret = spl_fit_get_image_name(fit, images, "loadables",
+				     index, &name);
+	if (ret < 0)
+		return ret;
+
+	node = spl_fit_get_image_node(fit, images, "loadables", index);
+
+	ret = fdt_record_loadable(blob, index, name, image->load_addr,
+				  image->size, image->entry_point,
+				  fdt_getprop(fit, node, "type", NULL),
+				  fdt_getprop(fit, node, "os", NULL));
 	return ret;
 }
 
@@ -364,9 +423,11 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 		if (!fit_image_get_os(fit, node, &os_type))
 			debug("Loadable is %s\n", genimg_get_os_name(os_type));
 
-		if (spl_image->os == IH_OS_U_BOOT)
-			spl_fit_append_fdt(spl_image, info, sector,
+		if (os_type == IH_OS_U_BOOT) {
+			spl_fit_append_fdt(&image_info, info, sector,
 					   fit, images, base_offset);
+			spl_image->fdt_addr = image_info.fdt_addr;
+		}
 
 		/*
 		 * If the "firmware" image did not provide an entry point,
@@ -375,6 +436,12 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 		if (spl_image->entry_point == FDT_ERROR &&
 		    image_info.entry_point != FDT_ERROR)
 			spl_image->entry_point = image_info.entry_point;
+
+		/* Record our loadables into the FDT */
+		if (spl_image->fdt_addr)
+			spl_fit_record_loadable(fit, images, index,
+						spl_image->fdt_addr,
+						&image_info);
 	}
 
 	/*

commit e265ab898ad5e6615591a6b821b7357582c5093c
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Wed Sep 13 21:29:33 2017 +0200

    UPSTREAM: spl: fit: implement fdt_record_loadable
    
    During the loading of more complex FIT images (e.g. when the invoked
    next stage needs to find additional firmware for a power-management
    core... or if there are multiple images for different privilege levels
    started in parallel), it is helpful to create a record of what images
    are loaded where: if a FDT is loaded for one of the next stages, it
    can be used to convey the status and location of loadables.
    
    This adds a fdt_record_loadable() function that can be invoked to
    record the status of each loadable below the /fit-images path.
    
    Change-Id: I9d6dcd3cb7863a558ebde7c68bcfe45eaadcc76f
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 9f45aeb937275960405de0f2abca8c665dbb03d4)

diff --git a/common/fdt_support.c b/common/fdt_support.c
index d725276d7b..1a8ae95cc7 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -436,6 +436,45 @@ static int fdt_pack_reg(const void *fdt, void *buf, u64 *address, u64 *size,
 	return p - (char *)buf;
 }
 
+int fdt_record_loadable(void *blob, u32 index, const char *name,
+			uintptr_t load_addr, u32 size, uintptr_t entry_point,
+			const char *type, const char *os)
+{
+	int err, node;
+
+	err = fdt_check_header(blob);
+	if (err < 0) {
+		printf("%s: %s\n", __func__, fdt_strerror(err));
+		return err;
+	}
+
+	/* find or create "/fit-images" node */
+	node = fdt_find_or_add_subnode(blob, 0, "fit-images");
+	if (node < 0)
+			return node;
+
+	/* find or create "/fit-images/<name>" node */
+	node = fdt_find_or_add_subnode(blob, node, name);
+	if (node < 0)
+		return node;
+
+	/*
+	 * We record these as 32bit entities, possibly truncating addresses.
+	 * However, spl_fit.c is not 64bit safe either: i.e. we should not
+	 * have an issue here.
+	 */
+	fdt_setprop_u32(blob, node, "load-addr", load_addr);
+	if (entry_point != -1)
+		fdt_setprop_u32(blob, node, "entry-point", entry_point);
+	fdt_setprop_u32(blob, node, "size", size);
+	if (type)
+		fdt_setprop_string(blob, node, "type", type);
+	if (os)
+		fdt_setprop_string(blob, node, "os", os);
+
+	return node;
+}
+
 #ifdef CONFIG_NR_DRAM_BANKS
 #define MEMORY_BANKS_MAX CONFIG_NR_DRAM_BANKS
 #else
diff --git a/include/fdt_support.h b/include/fdt_support.h
index 2bca4d7889..afaf0e787d 100644
--- a/include/fdt_support.h
+++ b/include/fdt_support.h
@@ -133,6 +133,26 @@ void fdt_fixup_crypto_node(void *blob, int sec_rev);
 static inline void fdt_fixup_crypto_node(void *blob, int sec_rev) {}
 #endif
 
+#if CONFIG_IS_ENABLED(LOAD_FIT)
+/**
+ * Record information about a processed loadable in /fit-images (creating
+ * /fit-images if necessary).
+ *
+ * @param blob		FDT blob to update
+ * @param index	        index of this loadable
+ * @param name          name of the loadable
+ * @param load_addr     address the loadable was loaded to
+ * @param size          number of bytes loaded
+ * @param entry_point   entry point (if specified, otherwise pass -1)
+ * @param type          type (if specified, otherwise pass NULL)
+ * @param os            os-type (if specified, otherwise pass NULL)
+ * @return 0 if ok, or -1 or -FDT_ERR_... on error
+ */
+int fdt_record_loadable(void *blob, u32 index, const char *name,
+			uintptr_t load_addr, u32 size, uintptr_t entry_point,
+			const char *type, const char *os);
+#endif
+
 #ifdef CONFIG_PCI
 #include <pci.h>
 int fdt_pci_dma_ranges(void *blob, int phb_off, struct pci_controller *hose);

commit 9719e14f318a7eab0323cab1bb53f16c2e78216d
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Wed Sep 13 21:29:32 2017 +0200

    UPSTREAM: spl: fit: simplify logic for FDT loading for non-OS boots
    
    To better support bootin through an ATF or OPTEE, we need to
    streamline some of the logic for when the FDT is appended to an image:
    depending on the image type, we'd like to append the FDT not at all
    (the case for the OS boot), to the 'firmware' image (if it is a
    U-Boot) or to one of the loadables (if the 'firmware' is an ATF, an
    OPTEE, or some other image-type and U-Boot is listed in the
    loadabled).
    
    To achieve this goal, we drop the os_boot flag and track the type of
    image loaded.  If it is of type IH_OS_U_BOOT, we append the FDT.
    
    Change-Id: Ic7c4b927b4ad7d33e372e63002072fe27a88292f
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Acked-by: York Sun <york.sun@nxp.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit d879616e9e64cf5a9c43dedc30677aa2fa463d64)

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 32d9ee5901..c496f45b72 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -218,6 +218,30 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 	return 0;
 }
 
+static int spl_fit_append_fdt(struct spl_image_info *spl_image,
+			      struct spl_load_info *info, ulong sector,
+			      void *fit, int images, ulong base_offset)
+{
+	struct spl_image_info image_info;
+	int node, ret;
+
+	/* Figure out which device tree the board wants to use */
+	node = spl_fit_get_image_node(fit, images, FIT_FDT_PROP, 0);
+	if (node < 0) {
+		debug("%s: cannot find FDT node\n", __func__);
+		return node;
+	}
+
+	/*
+	 * Read the device tree and place it after the image.
+	 * Align the destination address to ARCH_DMA_MINALIGN.
+	 */
+	image_info.load_addr = spl_image->load_addr + spl_image->size;
+	ret = spl_load_fit_image(info, sector, fit, base_offset, node,
+				 &image_info);
+	return ret;
+}
+
 int spl_load_simple_fit(struct spl_image_info *spl_image,
 			struct spl_load_info *info, ulong sector, void *fit)
 {
@@ -225,7 +249,6 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 	ulong size;
 	unsigned long count;
 	struct spl_image_info image_info;
-	bool boot_os = false;
 	int node = -1;
 	int images, ret;
 	int base_offset, align_len = ARCH_DMA_MINALIGN - 1;
@@ -273,17 +296,18 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 		return -1;
 	}
 
+	/*
+	 * Find the U-Boot image using the following search order:
+	 *   - start at 'firmware' (e.g. an ARM Trusted Firmware)
+	 *   - fall back 'kernel' (e.g. a Falcon-mode OS boot
+	 *   - fall back to using the first 'loadables' entry
+	 */
+	if (node < 0)
+		node = spl_fit_get_image_node(fit, images, "firmware", 0);
 #ifdef CONFIG_SPL_OS_BOOT
-	/* Find OS image first */
-	node = spl_fit_get_image_node(fit, images, FIT_KERNEL_PROP, 0);
 	if (node < 0)
-		debug("No kernel image.\n");
-	else
-		boot_os = true;
+		node = spl_fit_get_image_node(fit, images, FIT_KERNEL_PROP, 0);
 #endif
-	/* find the U-Boot image */
-	if (node < 0)
-		node = spl_fit_get_image_node(fit, images, "firmware", 0);
 	if (node < 0) {
 		debug("could not find firmware image, trying loadables...\n");
 		node = spl_fit_get_image_node(fit, images, "loadables", 0);
@@ -305,34 +329,29 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 	if (ret)
 		return ret;
 
-#ifdef CONFIG_SPL_OS_BOOT
+	/*
+	 * For backward compatibility, we treat the first node that is
+	 * as a U-Boot image, if no OS-type has been declared.
+	 */
 	if (!fit_image_get_os(fit, node, &spl_image->os))
 		debug("Image OS is %s\n", genimg_get_os_name(spl_image->os));
-#else
-	spl_image->os = IH_OS_U_BOOT;
+#if !defined(CONFIG_SPL_OS_BOOT)
+	else
+		spl_image->os = IH_OS_U_BOOT;
 #endif
 
-	if (!boot_os) {
-		/* Figure out which device tree the board wants to use */
-		node = spl_fit_get_image_node(fit, images, FIT_FDT_PROP, 0);
-		if (node < 0) {
-			debug("%s: cannot find FDT node\n", __func__);
-			return node;
-		}
-
-		/*
-		 * Read the device tree and place it after the image.
-		 * Align the destination address to ARCH_DMA_MINALIGN.
-		 */
-		image_info.load_addr = spl_image->load_addr + spl_image->size;
-		ret = spl_load_fit_image(info, sector, fit, base_offset, node,
-					 &image_info);
-		if (ret < 0)
-			return ret;
-	}
+	/*
+	 * Booting a next-stage U-Boot may require us to append the FDT.
+	 * We allow this to fail, as the U-Boot image might embed its FDT.
+	 */
+	if (spl_image->os == IH_OS_U_BOOT)
+		spl_fit_append_fdt(spl_image, info, sector, fit,
+				   images, base_offset);
 
 	/* Now check if there are more images for us to load */
 	for (; ; index++) {
+		uint8_t os_type = IH_OS_INVALID;
+
 		node = spl_fit_get_image_node(fit, images, "loadables", index);
 		if (node < 0)
 			break;
@@ -342,6 +361,13 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 		if (ret < 0)
 			continue;
 
+		if (!fit_image_get_os(fit, node, &os_type))
+			debug("Loadable is %s\n", genimg_get_os_name(os_type));
+
+		if (spl_image->os == IH_OS_U_BOOT)
+			spl_fit_append_fdt(spl_image, info, sector,
+					   fit, images, base_offset);
+
 		/*
 		 * If the "firmware" image did not provide an entry point,
 		 * use the first valid entry point from the loadables.

commit 59acbc1bb196e020b7c04f6d96238061cefa3aa2
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Wed Sep 13 21:29:31 2017 +0200

    spl: change load_addr and entry_point to uintptr_t
    
    Mainly a stylistic change: convert the load_addr and entry_point
    fields of struct spl_image_info to uintptr_t (from ulong).
    
    Change-Id: I1e0f0dfa5048fcd2d5c42d6a759a5ec25ef80089
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit f2efe6786eeaa2305353a01056ffef55ae520b7d)

diff --git a/include/spl.h b/include/spl.h
index 0efbe991f2..b0a86f2b72 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -23,8 +23,8 @@
 struct spl_image_info {
 	const char *name;
 	u8 os;
-	ulong load_addr;
-	ulong entry_point;
+	uintptr_t load_addr;
+	uintptr_t entry_point;
 #if CONFIG_IS_ENABLED(LOAD_FIT)
 	void *fdt_addr;
 #endif
@@ -272,10 +272,9 @@ int spl_mmc_load_image(struct spl_image_info *spl_image,
 		       struct spl_boot_device *bootdev);
 
 /**
- * spl_bl31_entry - entry function for ATF bl31
- * @entry_addr - entry address of bl31 text
+ * spl_invoke_atf - boot using an ARM trusted firmware image
  */
-void spl_bl31_entry(void *entry_addr);
+void spl_invoke_atf(struct spl_image_info *spl_image);
 
 /**
  * spl_optee_entry - entry function for optee

commit ae1e9f8ff7e605bd39ea98097110a439cee274a8
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Wed Sep 13 21:29:30 2017 +0200

    UPSTREAM: spl: add a fdt_addr field to spl_image_info
    
    When loading a full U-Boot with detached device-tree using the SPL FIT
    backend, we should store the address of the FDT loaded as part of the
    SPL image info: this allows us to fixup the FDT with additional info
    we may want to propagate onward.
    
    Change-Id: Ifea4abd01296460570e01c1b19bd8f702e1e95bf
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 75014470aec60580978962071972f2962695938d)

diff --git a/include/spl.h b/include/spl.h
index dc0b56911b..0efbe991f2 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -25,6 +25,9 @@ struct spl_image_info {
 	u8 os;
 	ulong load_addr;
 	ulong entry_point;
+#if CONFIG_IS_ENABLED(LOAD_FIT)
+	void *fdt_addr;
+#endif
 	u32 size;
 	u32 flags;
 	void *arg;

commit 4233e0b15ed63b4aed19fb35acd38d6be0f1e1eb
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Wed Sep 13 21:29:29 2017 +0200

    UPSTREAM: image: add IH_OS_ARM_TRUSTED_FIRMWARE for ARM Trusted Firmware
    
    To boot on ARMv8 systems with ARM Trusted Firmware, we need to
    assemble an ATF-specific parameter structure and also provide the
    address of the images started by ATF (e.g. BL3-3, which may be the
    full U-Boot).
    
    To allow us to identify an ARM Trusted Firmware contained in a FIT
    image, this adds the necessary definitions.
    
    Change-Id: If9f54a8391bba18c5aa220aea09db53271ff4517
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 4914af1286c4a48cd0ae98cf6adea3569111413b)

diff --git a/common/image.c b/common/image.c
index e205b0fbe6..20f453de2d 100644
--- a/common/image.c
+++ b/common/image.c
@@ -95,6 +95,7 @@ static const table_entry_t uimage_arch[] = {
 
 static const table_entry_t uimage_os[] = {
 	{	IH_OS_INVALID,	"invalid",	"Invalid OS",		},
+	{       IH_OS_ARM_TRUSTED_FIRMWARE, "arm-trusted-firmware", "ARM Trusted Firmware"  },
 	{	IH_OS_LINUX,	"linux",	"Linux",		},
 #if defined(CONFIG_LYNXKDI) || defined(USE_HOSTCC)
 	{	IH_OS_LYNXOS,	"lynxos",	"LynxOS",		},
diff --git a/include/image.h b/include/image.h
index 688f00fb88..b9e43ad45c 100644
--- a/include/image.h
+++ b/include/image.h
@@ -152,6 +152,7 @@ enum {
 	IH_OS_OSE,			/* OSE		*/
 	IH_OS_PLAN9,			/* Plan 9	*/
 	IH_OS_OPENRTOS,		/* OpenRTOS	*/
+	IH_OS_ARM_TRUSTED_FIRMWARE,     /* ARM Trusted Firmware */
 
 	IH_OS_COUNT,
 };

commit e71e2ceacfb0595a150cc12c6f1577f474343f07
Author: Simon Glass <sjg@chromium.org>
Date:   Sun Nov 12 21:52:17 2017 -0700

    UPSTREAM: dtoc: Fix up tests
    
    The tool has changed slightly since it was originally written. Update the
    tests to suit.
    
    Change-Id: I6935a7c4cc16e1a3e5c617133b12d1982e640c74
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit aab660fe18ac24ee859a203f517f939685af5e10)

diff --git a/tools/dtoc/test_dtoc.py b/tools/dtoc/test_dtoc.py
index cc009b2a25..41ed80e6da 100644
--- a/tools/dtoc/test_dtoc.py
+++ b/tools/dtoc/test_dtoc.py
@@ -26,6 +26,27 @@ import tools
 our_path = os.path.dirname(os.path.realpath(__file__))
 
 
+HEADER = '''/*
+ * DO NOT MODIFY
+ *
+ * This file was generated by dtoc from a .dtb (device tree binary) file.
+ */
+
+#include <stdbool.h>
+#include <libfdt.h>'''
+
+C_HEADER = '''/*
+ * DO NOT MODIFY
+ *
+ * This file was generated by dtoc from a .dtb (device tree binary) file.
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dt-structs.h>
+'''
+
+
 def get_dtb_file(dts_fname):
     """Compile a .dts file to a .dtb
 
@@ -104,13 +125,12 @@ class TestDtoc(unittest.TestCase):
         dtb_platdata.run_steps(['struct'], dtb_file, False, output)
         with open(output) as infile:
             lines = infile.read().splitlines()
-        self.assertEqual(['#include <stdbool.h>', '#include <libfdt.h>'], lines)
+        self.assertEqual(HEADER.splitlines(), lines)
 
         dtb_platdata.run_steps(['platdata'], dtb_file, False, output)
         with open(output) as infile:
             lines = infile.read().splitlines()
-        self.assertEqual(['#include <common.h>', '#include <dm.h>',
-                          '#include <dt-structs.h>', ''], lines)
+        self.assertEqual(C_HEADER.splitlines() + [''], lines)
 
     def test_simple(self):
         """Test output from some simple nodes with various types of data"""
@@ -119,8 +139,7 @@ class TestDtoc(unittest.TestCase):
         dtb_platdata.run_steps(['struct'], dtb_file, False, output)
         with open(output) as infile:
             data = infile.read()
-        self.assertEqual('''#include <stdbool.h>
-#include <libfdt.h>
+        self.assertEqual(HEADER + '''
 struct dtd_sandbox_i2c_test {
 };
 struct dtd_sandbox_pmic_test {
@@ -144,10 +163,7 @@ struct dtd_sandbox_spl_test_2 {
         dtb_platdata.run_steps(['platdata'], dtb_file, False, output)
         with open(output) as infile:
             data = infile.read()
-        self.assertEqual('''#include <common.h>
-#include <dm.h>
-#include <dt-structs.h>
-
+        self.assertEqual(C_HEADER + '''
 static struct dtd_sandbox_spl_test dtv_spl_test = {
 \t.bytearray\t\t= {0x6, 0x0, 0x0},
 \t.byteval\t\t= 0x5,
@@ -225,8 +241,7 @@ U_BOOT_DEVICE(pmic_at_9) = {
         dtb_platdata.run_steps(['struct'], dtb_file, False, output)
         with open(output) as infile:
             data = infile.read()
-        self.assertEqual('''#include <stdbool.h>
-#include <libfdt.h>
+        self.assertEqual(HEADER + '''
 struct dtd_source {
 \tstruct phandle_2_arg clocks[4];
 };
@@ -238,10 +253,7 @@ struct dtd_target {
         dtb_platdata.run_steps(['platdata'], dtb_file, False, output)
         with open(output) as infile:
             data = infile.read()
-        self.assertEqual('''#include <common.h>
-#include <dm.h>
-#include <dt-structs.h>
-
+        self.assertEqual(C_HEADER + '''
 static struct dtd_target dtv_phandle_target = {
 \t.intval\t\t\t= 0x0,
 };
@@ -291,8 +303,7 @@ U_BOOT_DEVICE(phandle_source) = {
         dtb_platdata.run_steps(['struct'], dtb_file, False, output)
         with open(output) as infile:
             data = infile.read()
-        self.assertEqual('''#include <stdbool.h>
-#include <libfdt.h>
+        self.assertEqual(HEADER + '''
 struct dtd_compat1 {
 \tfdt32_t\t\tintval;
 };
@@ -303,10 +314,7 @@ struct dtd_compat1 {
         dtb_platdata.run_steps(['platdata'], dtb_file, False, output)
         with open(output) as infile:
             data = infile.read()
-        self.assertEqual('''#include <common.h>
-#include <dm.h>
-#include <dt-structs.h>
-
+        self.assertEqual(C_HEADER + '''
 static struct dtd_compat1 dtv_spl_test = {
 \t.intval\t\t\t= 0x1,
 };
@@ -325,8 +333,7 @@ U_BOOT_DEVICE(spl_test) = {
         dtb_platdata.run_steps(['struct'], dtb_file, False, output)
         with open(output) as infile:
             data = infile.read()
-        self.assertEqual('''#include <stdbool.h>
-#include <libfdt.h>
+        self.assertEqual(HEADER + '''
 struct dtd_test1 {
 \tfdt64_t\t\treg[2];
 };
@@ -341,10 +348,7 @@ struct dtd_test3 {
         dtb_platdata.run_steps(['platdata'], dtb_file, False, output)
         with open(output) as infile:
             data = infile.read()
-        self.assertEqual('''#include <common.h>
-#include <dm.h>
-#include <dt-structs.h>
-
+        self.assertEqual(C_HEADER + '''
 static struct dtd_test1 dtv_test1 = {
 \t.reg\t\t\t= {0x1234, 0x5678},
 };
@@ -381,8 +385,7 @@ U_BOOT_DEVICE(test3) = {
         dtb_platdata.run_steps(['struct'], dtb_file, False, output)
         with open(output) as infile:
             data = infile.read()
-        self.assertEqual('''#include <stdbool.h>
-#include <libfdt.h>
+        self.assertEqual(HEADER + '''
 struct dtd_test1 {
 \tfdt32_t\t\treg[2];
 };
@@ -394,10 +397,7 @@ struct dtd_test2 {
         dtb_platdata.run_steps(['platdata'], dtb_file, False, output)
         with open(output) as infile:
             data = infile.read()
-        self.assertEqual('''#include <common.h>
-#include <dm.h>
-#include <dt-structs.h>
-
+        self.assertEqual(C_HEADER + '''
 static struct dtd_test1 dtv_test1 = {
 \t.reg\t\t\t= {0x1234, 0x5678},
 };
@@ -425,8 +425,7 @@ U_BOOT_DEVICE(test2) = {
         dtb_platdata.run_steps(['struct'], dtb_file, False, output)
         with open(output) as infile:
             data = infile.read()
-        self.assertEqual('''#include <stdbool.h>
-#include <libfdt.h>
+        self.assertEqual(HEADER + '''
 struct dtd_test1 {
 \tfdt64_t\t\treg[2];
 };
@@ -441,10 +440,7 @@ struct dtd_test3 {
         dtb_platdata.run_steps(['platdata'], dtb_file, False, output)
         with open(output) as infile:
             data = infile.read()
-        self.assertEqual('''#include <common.h>
-#include <dm.h>
-#include <dt-structs.h>
-
+        self.assertEqual(C_HEADER + '''
 static struct dtd_test1 dtv_test1 = {
 \t.reg\t\t\t= {0x123400000000, 0x5678},
 };
@@ -481,8 +477,7 @@ U_BOOT_DEVICE(test3) = {
         dtb_platdata.run_steps(['struct'], dtb_file, False, output)
         with open(output) as infile:
             data = infile.read()
-        self.assertEqual('''#include <stdbool.h>
-#include <libfdt.h>
+        self.assertEqual(HEADER + '''
 struct dtd_test1 {
 \tfdt64_t\t\treg[2];
 };
@@ -497,10 +492,7 @@ struct dtd_test3 {
         dtb_platdata.run_steps(['platdata'], dtb_file, False, output)
         with open(output) as infile:
             data = infile.read()
-        self.assertEqual('''#include <common.h>
-#include <dm.h>
-#include <dt-structs.h>
-
+        self.assertEqual(C_HEADER + '''
 static struct dtd_test1 dtv_test1 = {
 \t.reg\t\t\t= {0x1234, 0x567800000000},
 };

commit 3abaad4c1f3bf22c8e997c43b83948de4279a8b5
Author: Simon Glass <sjg@chromium.org>
Date:   Sun Nov 12 21:52:12 2017 -0700

    UPSTREAM: patman: Fix up tests to pass with newest checkpatch
    
    The checkpatch tool was updated but the patman tests were not. Fix this.
    
    Change-Id: Ia5ff7589c32205754eb9818ddd2ecafcc6b2b3c1
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 6c328f29752224f15b7f098d8676f9eeed269a85)

diff --git a/tools/patman/test.py b/tools/patman/test.py
index 20dc9c1e0d..51145e8390 100644
--- a/tools/patman/test.py
+++ b/tools/patman/test.py
@@ -88,8 +88,7 @@ Signed-off-by: Simon Glass <sjg@chromium.org>
         os.remove(expname)
 
     def GetData(self, data_type):
-        data='''
-From 4924887af52713cabea78420eff03badea8f0035 Mon Sep 17 00:00:00 2001
+        data='''From 4924887af52713cabea78420eff03badea8f0035 Mon Sep 17 00:00:00 2001
 From: Simon Glass <sjg@chromium.org>
 Date: Thu, 7 Apr 2011 10:14:41 -0700
 Subject: [PATCH 1/4] Add microsecond boot time measurement
@@ -101,6 +100,7 @@ an available microsecond counter.
 %s
 ---
  README              |   11 ++++++++
+ MAINTAINERS         |    3 ++
  common/bootstage.c  |   50 ++++++++++++++++++++++++++++++++++++
  include/bootstage.h |   71 +++++++++++++++++++++++++++++++++++++++++++++++++++
  include/common.h    |    8 ++++++
@@ -130,19 +130,31 @@ index 6f3748d..f9e4e65 100644
  - Standalone program support:
  		CONFIG_STANDALONE_LOAD_ADDR
 
+diff --git a/MAINTAINERS b/MAINTAINERS
+index b167b028ec..beb7dc634f 100644
+--- a/MAINTAINERS
++++ b/MAINTAINERS
+@@ -474,3 +474,8 @@ S:	Maintained
+ T:	git git://git.denx.de/u-boot.git
+ F:	*
+ F:	*/
++
++BOOTSTAGE
++M:	Simon Glass <sjg@chromium.org>
++L:	u-boot@lists.denx.de
++F:	common/bootstage.c
 diff --git a/common/bootstage.c b/common/bootstage.c
 new file mode 100644
 index 0000000..2234c87
 --- /dev/null
 +++ b/common/bootstage.c
-@@ -0,0 +1,39 @@
+@@ -0,0 +1,37 @@
 +/*
 + * Copyright (c) 2011, Google Inc. All rights reserved.
 + *
 + * SPDX-License-Identifier:	GPL-2.0+
 + */
 +
-+
 +/*
 + * This module records the progress of boot and arbitrary commands, and
 + * permits accurate timestamping of each. The records can optionally be
@@ -151,26 +163,25 @@ index 0000000..2234c87
 +
 +#include <common.h>
 +
-+
 +struct bootstage_record {
-+	uint32_t time_us;
++	u32 time_us;
 +	const char *name;
 +};
 +
 +static struct bootstage_record record[BOOTSTAGE_COUNT];
 +
-+uint32_t bootstage_mark(enum bootstage_id id, const char *name)
++u32 bootstage_mark(enum bootstage_id id, const char *name)
 +{
 +	struct bootstage_record *rec = &record[id];
 +
 +	/* Only record the first event for each */
 +%sif (!rec->name) {
-+		rec->time_us = (uint32_t)timer_get_us();
++		rec->time_us = (u32)timer_get_us();
 +		rec->name = name;
 +	}
 +	if (!rec->name &&
 +	%ssomething_else) {
-+		rec->time_us = (uint32_t)timer_get_us();
++		rec->time_us = (u32)timer_get_us();
 +		rec->name = name;
 +	}
 +%sreturn rec->time_us;
@@ -210,7 +221,7 @@ index 0000000..2234c87
         self.assertEqual(result.errors, 0)
         self.assertEqual(result.warnings, 0)
         self.assertEqual(result.checks, 0)
-        self.assertEqual(result.lines, 56)
+        self.assertEqual(result.lines, 62)
         os.remove(inf)
 
     def testNoSignoff(self):
@@ -221,18 +232,18 @@ index 0000000..2234c87
         self.assertEqual(result.errors, 1)
         self.assertEqual(result.warnings, 0)
         self.assertEqual(result.checks, 0)
-        self.assertEqual(result.lines, 56)
+        self.assertEqual(result.lines, 62)
         os.remove(inf)
 
     def testSpaces(self):
         inf = self.SetupData('spaces')
         result = checkpatch.CheckPatch(inf)
         self.assertEqual(result.ok, False)
-        self.assertEqual(len(result.problems), 2)
+        self.assertEqual(len(result.problems), 3)
         self.assertEqual(result.errors, 0)
-        self.assertEqual(result.warnings, 2)
+        self.assertEqual(result.warnings, 3)
         self.assertEqual(result.checks, 0)
-        self.assertEqual(result.lines, 56)
+        self.assertEqual(result.lines, 62)
         os.remove(inf)
 
     def testIndent(self):
@@ -243,7 +254,7 @@ index 0000000..2234c87
         self.assertEqual(result.errors, 0)
         self.assertEqual(result.warnings, 0)
         self.assertEqual(result.checks, 1)
-        self.assertEqual(result.lines, 56)
+        self.assertEqual(result.lines, 62)
         os.remove(inf)
 
 

commit 0fac560f1745211eafa181080c120f29ca14c953
Author: S. Lockwood-Childs <sjl@vctlabs.com>
Date:   Tue Nov 14 22:56:42 2017 -0800

    UPSTREAM: README: update mailing list url
    
    Old url currently returns 403; modify to url that actually works
    with current state of the list server
    
    Change-Id: If1d5c756a496c89de98d6685c6b3a37141d17044
    Signed-off-by: S. Lockwood-Childs <sjl@vctlabs.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 1dade18e40acc41e2b98b46ce1cb4f198cd40af9)

diff --git a/README b/README
index 92a5f8428e..903cd65db7 100644
--- a/README
+++ b/README
@@ -5229,7 +5229,7 @@ may be rejected, even when they contain important and valuable stuff.
 Please see http://www.denx.de/wiki/U-Boot/Patches for details.
 
 Patches shall be sent to the u-boot mailing list <u-boot@lists.denx.de>;
-see http://lists.denx.de/mailman/listinfo/u-boot
+see https://lists.denx.de/listinfo/u-boot
 
 When you send a patch, please include the following information with
 it:

commit 25e0b4f36e285181a0ecbe88a1054e41d05d5848
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Fri Nov 10 21:46:34 2017 +0100

    UPSTREAM: malloc: don't compare pointers to 0
    
    0 is not a pointer. So do not compare pointers to 0.
    
    Do not return 0 from functions with a pointer return
    type.
    
    Problem identified with Coccinelle.
    
    Change-Id: Ib8447e3ff21d7fc256a9c4a4ed3c4396ce12e00a
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit a874cac3b45cbb6dd8bad05a5b42912acae6b7e4)

diff --git a/common/dlmalloc.c b/common/dlmalloc.c
index c37979b43f..b395eefbf8 100644
--- a/common/dlmalloc.c
+++ b/common/dlmalloc.c
@@ -149,7 +149,7 @@ gAllocatedSize))
 			{
 				new_address = findRegion (new_address, new_size);
 
-				if (new_address == 0)
+				if (!new_address)
 					return (void*)-1;
 
 				gAddressBase = gNextAddress =
@@ -175,7 +175,7 @@ gAllocatedSize))
 								(size + gNextAddress -
 								 AlignPage (gNextAddress)),
 								MEM_COMMIT, PAGE_READWRITE);
-			if (res == 0)
+			if (!res)
 				return (void*)-1;
 		}
 		tmp = (void*)gNextAddress;
@@ -1461,7 +1461,7 @@ Void_t* mALLOc(bytes) size_t bytes;
 #if HAVE_MMAP
     /* If big and would otherwise need to extend, try to use mmap instead */
     if ((unsigned long)nb >= (unsigned long)mmap_threshold &&
-	(victim = mmap_chunk(nb)) != 0)
+	(victim = mmap_chunk(nb)))
       return chunk2mem(victim);
 #endif
 
@@ -1671,7 +1671,10 @@ Void_t* rEALLOc(oldmem, bytes) Void_t* oldmem; size_t bytes;
   mchunkptr fwd;              /* misc temp for linking */
 
 #ifdef REALLOC_ZERO_BYTES_FREES
-  if (bytes == 0) { fREe(oldmem); return 0; }
+  if (!bytes) {
+	fREe(oldmem);
+	return NULL;
+  }
 #endif
 
   if ((long)bytes < 0) return NULL;
@@ -1703,7 +1706,8 @@ Void_t* rEALLOc(oldmem, bytes) Void_t* oldmem; size_t bytes;
     if(oldsize - SIZE_SZ >= nb) return oldmem; /* do nothing */
     /* Must alloc, copy, free. */
     newmem = mALLOc(bytes);
-    if (newmem == 0) return 0; /* propagate failure */
+    if (!newmem)
+	return NULL; /* propagate failure */
     MALLOC_COPY(newmem, oldmem, oldsize - 2*SIZE_SZ);
     munmap_chunk(oldp);
     return newmem;

commit 479637400b0e37d96e3921021dbd572335f56f9b
Author: M. Vefa Bicakci <m.v.b@runbox.com>
Date:   Sat Nov 11 22:48:40 2017 -0500

    UPSTREAM: Makefile: Correct SPL/TPL/DTB build race condition
    
    When building on a multi-core machine for an SPL-enabled board that
    also uses CONFIG_OF_EMBED, the following error can be encountered
    due to a race condition:
    
      make[3]: *** No rule to make target 'spl/dts/dt.dtb.o', needed by
        'spl/dts/built-in.o'.  Stop.
      ../scripts/Makefile.spl:364: recipe for target 'spl/dts' failed
      make[2]: *** [spl/dts] Error 2
      make[2]: *** Waiting for unfinished jobs....
    
    A reliable way to trigger this race condition is to add "sleep 60" to
    the end of the "arch-dtbs" rule's recipe in "dts/Makefile" and to build
    U-Boot against a board which uses the CONFIG_OF_EMBED and CONFIG_SPL
    options using "make -j8" or a similar command.
    
    This commit corrects this race condition via the use of CONFIG_OF_EMBED
    in the same way that commit 3c00a2c8b5e2 ("Makefile: Correct dependency
    race condition with TPL") and commit 054b3a1e80fc ("dm: Makefile: Build
    of-platdata before SPL") use CONFIG_OF_SEPARATE.
    
    Change-Id: I7177cf1b16cbdc1e071f93956e45472188dc2390
    Signed-off-by: M. Vefa Bicakci <m.v.b@runbox.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit dd2081a8e46877df5166fcd5af7f26c74a799317)

diff --git a/Makefile b/Makefile
index 2335d24752..c27875d336 100644
--- a/Makefile
+++ b/Makefile
@@ -1389,8 +1389,8 @@ u-boot.lds: $(LDSCRIPT) prepare FORCE
 spl/u-boot-spl.bin: spl/u-boot-spl
 	@:
 spl/u-boot-spl: tools prepare \
-		$(if $(CONFIG_OF_SEPARATE)$(CONFIG_SPL_OF_PLATDATA),dts/dt.dtb) \
-		$(if $(CONFIG_OF_SEPARATE)$(CONFIG_TPL_OF_PLATDATA),dts/dt.dtb)
+		$(if $(CONFIG_OF_SEPARATE)$(CONFIG_OF_EMBED)$(CONFIG_SPL_OF_PLATDATA),dts/dt.dtb) \
+		$(if $(CONFIG_OF_SEPARATE)$(CONFIG_OF_EMBED)$(CONFIG_TPL_OF_PLATDATA),dts/dt.dtb)
 	$(Q)$(MAKE) obj=spl -f $(srctree)/scripts/Makefile.spl all
 
 spl/sunxi-spl.bin: spl/u-boot-spl
@@ -1406,7 +1406,7 @@ spl/boot.bin: spl/u-boot-spl
 	@:
 
 tpl/u-boot-tpl.bin: tools prepare \
-		$(if $(CONFIG_OF_SEPARATE)$(CONFIG_SPL_OF_PLATDATA),dts/dt.dtb)
+		$(if $(CONFIG_OF_SEPARATE)$(CONFIG_OF_EMBED)$(CONFIG_SPL_OF_PLATDATA),dts/dt.dtb)
 	$(Q)$(MAKE) obj=tpl -f $(srctree)/scripts/Makefile.spl all
 
 TAG_SUBDIRS := $(patsubst %,$(srctree)/%,$(u-boot-dirs) include)

commit 8427a52440be5241b31136a351712acb811ed8a6
Author: Ian Ray <ian.ray@ge.com>
Date:   Wed Nov 8 15:35:13 2017 +0000

    UPSTREAM: bootcount: add support for bootcounter on EXT filesystem
    
    Add support for bootcounter on an EXT filesystem.
    Sync configuration whitelist.
    
    Change-Id: Iad44e2526afa9b1c117bde7527774e414fa54d8c
    Signed-off-by: Ian Ray <ian.ray@ge.com>
    Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit f31dac4e6e71c7c818151cd917d872909119fb99)

diff --git a/README b/README
index f0956d9153..92a5f8428e 100644
--- a/README
+++ b/README
@@ -2432,6 +2432,13 @@ The following options need to be configured:
 			CONFIG_SYS_BOOTCOUNT_ADDR = i2c addr which is used for
 						    the bootcounter.
 			CONFIG_BOOTCOUNT_ALEN = address len
+		CONFIG_BOOTCOUNT_EXT
+		enable support for the bootcounter in EXT filesystem
+			CONFIG_SYS_BOOTCOUNT_ADDR = RAM address used for read
+                                                    and write.
+			CONFIG_SYS_BOOTCOUNT_EXT_INTERFACE = interface
+			CONFIG_SYS_BOOTCOUNT_EXT_DEVPART = device and part
+			CONFIG_SYS_BOOTCOUNT_EXT_NAME = filename
 
 - Show boot progress:
 		CONFIG_SHOW_BOOT_PROGRESS
diff --git a/drivers/Kconfig b/drivers/Kconfig
index 26348736fd..11d7fb2ed0 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -10,6 +10,8 @@ source "drivers/ata/Kconfig"
 
 source "drivers/block/Kconfig"
 
+source "drivers/bootcount/Kconfig"
+
 source "drivers/clk/Kconfig"
 
 source "drivers/cpu/Kconfig"
diff --git a/drivers/bootcount/Kconfig b/drivers/bootcount/Kconfig
new file mode 100644
index 0000000000..c9d627cce2
--- /dev/null
+++ b/drivers/bootcount/Kconfig
@@ -0,0 +1,58 @@
+#
+# Boot count configuration
+#
+
+menu "Boot count support"
+
+config BOOTCOUNT
+	bool "Enable Boot count support"
+	help
+	  Enable boot count support, which provides the ability to store the
+	  number of times the board has booted on a number of different
+	  persistent storage mediums.
+
+if BOOTCOUNT
+
+config BOOTCOUNT_EXT
+	bool "Boot counter on EXT filesystem"
+	help
+	  Add support for maintaining boot count in a file on an EXT
+	  filesystem.
+
+if BOOTCOUNT_EXT
+
+config SYS_BOOTCOUNT_EXT_INTERFACE
+	string "Interface on which to find boot counter EXT filesystem"
+	default "mmc"
+	depends on BOOTCOUNT_EXT
+	help
+	  Set the interface to use when locating the filesystem to use for the
+	  boot counter.
+
+config SYS_BOOTCOUNT_EXT_DEVPART
+	string "Partition of the boot counter EXT filesystem"
+	default "0:1"
+	depends on BOOTCOUNT_EXT
+	help
+	  Set the partition to use when locating the filesystem to use for the
+	  boot counter.
+
+config SYS_BOOTCOUNT_EXT_NAME
+	string "Path and filename of the EXT filesystem based boot counter"
+	default "/boot/failures"
+	depends on BOOTCOUNT_EXT
+	help
+	  Set the filename and path of the file used to store the boot counter.
+
+config SYS_BOOTCOUNT_ADDR
+	hex "RAM address used for reading and writing the boot counter"
+	default 0x7000A000
+	depends on BOOTCOUNT_EXT
+	help
+	  Set the address used for reading and writing the boot counter.
+
+endif
+
+endif
+
+endmenu
diff --git a/drivers/bootcount/Makefile b/drivers/bootcount/Makefile
index ed9659ad97..45445d24bf 100644
--- a/drivers/bootcount/Makefile
+++ b/drivers/bootcount/Makefile
@@ -9,3 +9,4 @@ obj-$(CONFIG_BOOTCOUNT_AM33XX)	+= bootcount_davinci.o
 obj-$(CONFIG_BOOTCOUNT_RAM)	+= bootcount_ram.o
 obj-$(CONFIG_BOOTCOUNT_ENV)	+= bootcount_env.o
 obj-$(CONFIG_BOOTCOUNT_I2C)	+= bootcount_i2c.o
+obj-$(CONFIG_BOOTCOUNT_EXT)	+= bootcount_ext.o
diff --git a/drivers/bootcount/bootcount_ext.c b/drivers/bootcount/bootcount_ext.c
new file mode 100644
index 0000000000..e0dd21ba6a
--- /dev/null
+++ b/drivers/bootcount/bootcount_ext.c
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2017 General Electric Company. All rights reserved.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <bootcount.h>
+#include <fs.h>
+#include <mapmem.h>
+
+#define BC_MAGIC	0xbc
+
+void bootcount_store(ulong a)
+{
+	u8 *buf;
+	loff_t len;
+	int ret;
+
+	if (fs_set_blk_dev(CONFIG_SYS_BOOTCOUNT_EXT_INTERFACE,
+			   CONFIG_SYS_BOOTCOUNT_EXT_DEVPART, FS_TYPE_EXT)) {
+		puts("Error selecting device\n");
+		return;
+	}
+
+	buf = map_sysmem(CONFIG_SYS_BOOTCOUNT_ADDR, 2);
+	buf[0] = BC_MAGIC;
+	buf[1] = (a & 0xff);
+	unmap_sysmem(buf);
+
+	ret = fs_write(CONFIG_SYS_BOOTCOUNT_EXT_NAME,
+		       CONFIG_SYS_BOOTCOUNT_ADDR, 0, 2, &len);
+	if (ret != 0)
+		puts("Error storing bootcount\n");
+}
+
+ulong bootcount_load(void)
+{
+	u8 *buf;
+	loff_t len_read;
+	int ret;
+
+	if (fs_set_blk_dev(CONFIG_SYS_BOOTCOUNT_EXT_INTERFACE,
+			   CONFIG_SYS_BOOTCOUNT_EXT_DEVPART, FS_TYPE_EXT)) {
+		puts("Error selecting device\n");
+		return 0;
+	}
+
+	ret = fs_read(CONFIG_SYS_BOOTCOUNT_EXT_NAME, CONFIG_SYS_BOOTCOUNT_ADDR,
+		      0, 2, &len_read);
+	if (ret != 0 || len_read != 2) {
+		puts("Error loading bootcount\n");
+		return 0;
+	}
+
+	buf = map_sysmem(CONFIG_SYS_BOOTCOUNT_ADDR, 2);
+	if (buf[0] == BC_MAGIC)
+		ret = buf[1];
+
+	unmap_sysmem(buf);
+
+	return ret;
+}

commit 18147e8245ce7f14c39507bb9f80a8ef4cb23bc4
Author: Ian Ray <ian.ray@ge.com>
Date:   Wed Nov 8 15:35:10 2017 +0000

    UPSTREAM: ext4: recover from filesystem corruption when reading
    
    Some fixes when reading EXT files and directory entries were identified
    after using e2fuzz to corrupt an EXT3 filesystem:
    
     - Stop reading directory entries if the offset becomes badly aligned.
    
     - Avoid overwriting memory by clamping the length used to zero the buffer
       in ext4fs_read_file.  Also sanity check blocksize.
    
    Change-Id: Ic1dafbde2f375784ef1f30746bd5cfa847356b6a
    Signed-off-by: Ian Ray <ian.ray@ge.com>
    Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
    Reviewed-by: Stefano Babic <sbabic@denx.de>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit ecdfb4195b20eb2dcde3c4083170016c13c69e8b)

diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c
index 31952f48b9..dac9545365 100644
--- a/fs/ext4/ext4_common.c
+++ b/fs/ext4/ext4_common.c
@@ -660,6 +660,11 @@ static int search_dir(struct ext2_inode *parent_inode, char *dirname)
 
 		offset = 0;
 		do {
+			if (offset & 3) {
+				printf("Badly aligned ext2_dirent\n");
+				break;
+			}
+
 			dir = (struct ext2_dirent *)(block_buffer + offset);
 			direntname = (char*)(dir) + sizeof(struct ext2_dirent);
 
@@ -880,6 +885,11 @@ static int unlink_filename(char *filename, unsigned int blknr)
 
 	offset = 0;
 	do {
+		if (offset & 3) {
+			printf("Badly aligned ext2_dirent\n");
+			break;
+		}
+
 		previous_dir = dir;
 		dir = (struct ext2_dirent *)(block_buffer + offset);
 		direntname = (char *)(dir) + sizeof(struct ext2_dirent);
diff --git a/fs/ext4/ext4fs.c b/fs/ext4/ext4fs.c
index b0c7303aa4..9ee2caf2fa 100644
--- a/fs/ext4/ext4fs.c
+++ b/fs/ext4/ext4fs.c
@@ -64,6 +64,9 @@ int ext4fs_read_file(struct ext2fs_node *node, loff_t pos,
 	char *delayed_buf = NULL;
 	short status;
 
+	if (blocksize <= 0)
+		return -1;
+
 	/* Adjust len so it we can't read past the end of the file. */
 	if (len + pos > filesize)
 		len = (filesize - pos);
@@ -127,6 +130,7 @@ int ext4fs_read_file(struct ext2fs_node *node, loff_t pos,
 					(blockend >> log2blksz);
 			}
 		} else {
+			int n;
 			if (previous_block_number != -1) {
 				/* spill */
 				status = ext4fs_devread(delayed_start,
@@ -137,7 +141,11 @@ int ext4fs_read_file(struct ext2fs_node *node, loff_t pos,
 					return -1;
 				previous_block_number = -1;
 			}
-			memset(buf, 0, blocksize - skipfirst);
+			/* Zero no more than `len' bytes. */
+			n = blocksize - skipfirst;
+			if (n > len)
+				n = len;
+			memset(buf, 0, n);
 		}
 		buf += blocksize - skipfirst;
 	}

commit 6c82a31e5adf1f4358b13168992114ec01e4027a
Author: Baruch Siach <baruch@tkos.co.il>
Date:   Thu Nov 9 13:44:28 2017 +0200

    UPSTREAM: dm: core: fix member name in ofnode_union documentation
    
    Fixes: 4984de2baaa ("dm: core: Add ofnode to represent device tree nodes")
    Cc: Simon Glass <sjg@chromium.org>
    Change-Id: I2bd28eac2ff9568ff1723dc8f20e4f3ff1dee443
    Signed-off-by: Baruch Siach <baruch@tkos.co.il>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit afc1a78a0bd5db69f72db1dfa07b4a37a54343f6)

diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index 79374b8f91..8b9932a569 100644
--- a/include/dm/ofnode.h
+++ b/include/dm/ofnode.h
@@ -45,7 +45,7 @@ struct resource;
  * the DT.
  *
  * @np: Pointer to device node, used for live tree
- * @flat_ptr: Pointer into flat device tree, used for flat tree. Note that this
+ * @of_offset: Pointer into flat device tree, used for flat tree. Note that this
  *	is not a really a pointer to a node: it is an offset value. See above.
  */
 typedef union ofnode_union {

commit e5367ca9ac2a9f2e56048044945b3985c3fc3e68
Author: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Date:   Mon Nov 6 14:16:37 2017 +0100

    UPSTREAM: env: Save environment at the end of an MMC partition
    
    Allow the platform to define a partition by name at the end of which
    the environment data will be located.
    
    Change-Id: Id0c66ee0be4dbd8fe739d05087894632d2b4e23f
    Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit c9e87ba66540cf72c164674a71af43853d087ba8)

diff --git a/doc/device-tree-bindings/config.txt b/doc/device-tree-bindings/config.txt
index fe0e04af92..15e4349c19 100644
--- a/doc/device-tree-bindings/config.txt
+++ b/doc/device-tree-bindings/config.txt
@@ -21,6 +21,15 @@ u-boot,efi-partition-entries-offset
 
 	This setting will override any values configured via Kconfig.
 
+u-boot,mmc-env-partition
+	if present, the environment shall be placed at the last
+	CONFIG_ENV_SIZE blocks of the partition on the
+	CONFIG_SYS_MMC_ENV_DEV.
+
+	if u-boot,mmc-env-offset* is present, this setting will take
+	precedence. In that case, only if the partition is not found,
+	mmc-env-offset* will be tried.
+
 u-boot,mmc-env-offset
 u-boot,mmc-env-offset-redundant
 	If present, the values of the 'u-boot,mmc-env-offset' and/or
diff --git a/env/mmc.c b/env/mmc.c
index 3f3092d975..3343f9e9f6 100644
--- a/env/mmc.c
+++ b/env/mmc.c
@@ -15,9 +15,13 @@
 #include <malloc.h>
 #include <memalign.h>
 #include <mmc.h>
+#include <part.h>
 #include <search.h>
 #include <errno.h>
 
+#define __STR(X) #X
+#define STR(X) __STR(X)
+
 #if defined(CONFIG_ENV_SIZE_REDUND) &&  \
 	(CONFIG_ENV_SIZE_REDUND != CONFIG_ENV_SIZE)
 #error CONFIG_ENV_SIZE_REDUND should be the same as CONFIG_ENV_SIZE
@@ -30,18 +34,68 @@ DECLARE_GLOBAL_DATA_PTR;
 #endif
 
 #if CONFIG_IS_ENABLED(OF_CONTROL)
+static inline int mmc_offset_try_partition(const char *str, s64 *val)
+{
+	disk_partition_t info;
+	struct blk_desc *desc;
+	int len, i, ret;
+
+	ret = blk_get_device_by_str("mmc", STR(CONFIG_SYS_MMC_ENV_DEV), &desc);
+	if (ret < 0)
+		return (ret);
+
+	for (i = 1;;i++) {
+		ret = part_get_info(desc, i, &info);
+		if (ret < 0)
+			return ret;
+
+		if (!strncmp((const char *)info.name, str, sizeof(str)))
+			break;
+	}
+
+	/* round up to info.blksz */
+	len = (CONFIG_ENV_SIZE + info.blksz - 1) & ~(info.blksz - 1);
+
+	/* use the top of the partion for the environment */
+	*val = (info.start + info.size - 1) - len / info.blksz;
+
+	return 0;
+}
+
 static inline s64 mmc_offset(int copy)
 {
-	const char *propname = "u-boot,mmc-env-offset";
-	s64 defvalue = CONFIG_ENV_OFFSET;
+	const struct {
+		const char *offset_redund;
+		const char *partition;
+		const char *offset;
+	} dt_prop = {
+		.offset_redund = "u-boot,mmc-env-offset-redundant",
+		.partition = "u-boot,mmc-env-partition",
+		.offset = "u-boot,mmc-env-offset",
+	};
+	s64 val, defvalue;
+	const char *propname;
+	const char *str;
+	int err;
+
+	/* look for the partition in mmc CONFIG_SYS_MMC_ENV_DEV */
+	str = fdtdec_get_config_string(gd->fdt_blob, dt_prop.partition);
+	if (str) {
+		/* try to place the environment at end of the partition */
+		err = mmc_offset_try_partition(str, &val);
+		if (!err)
+			return val;
+	}
+
+	defvalue = CONFIG_ENV_OFFSET;
+	propname = dt_prop.offset;
 
 #if defined(CONFIG_ENV_OFFSET_REDUND)
 	if (copy) {
-		propname = "u-boot,mmc-env-offset-redundant";
 		defvalue = CONFIG_ENV_OFFSET_REDUND;
+		propname = dt_prop.offset_redund;
 	}
 #endif
-
 	return fdtdec_get_config_int(gd->fdt_blob, propname, defvalue);
 }
 #else

commit f00ac1e52b1f63035534303e67360b4cd7849c58
Author: Stephen Warren <swarren@nvidia.com>
Date:   Thu Nov 2 18:11:27 2017 -0600

    UPSTREAM: arm64: support running at addr other than linked to
    
    This is required in the case where U-Boot is typically loaded and run at
    a particular address, but for some reason the RAM at that location is not
    available, e.g. due to memory fragmentation loading other boot binaries or
    firmware, splitting an SMP complex between various different OSs without
    using e.g. the EL2 second-stage page tables to hide the memory asignments,
    or due to known ECC failures.
    
    Change-Id: I2fd535325517921c6036188b74ab4facd37b7118
    Signed-off-by: Stephen Warren <swarren@nvidia.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 49e93875a62fb9e96a4a7483b9bd5d8ae27ea76e)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 41df5ac641..005a315116 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -9,6 +9,22 @@ config ARM64
 	select PHYS_64BIT
 	select SYS_CACHE_SHIFT_6
 
+if ARM64
+config POSITION_INDEPENDENT
+	bool "Generate position-independent pre-relocation code"
+	help
+	  U-Boot expects to be linked to a specific hard-coded address, and to
+	  be loaded to and run from that address. This option lifts that
+	  restriction, thus allowing the code to be loaded to and executed
+	  from almost any address. This logic relies on the relocation
+	  information that is embedded into the binary to support U-Boot
+	  relocating itself to the top-of-RAM later during execution.
+endif
+
+config STATIC_RELA
+	bool
+	default y if ARM64 && !POSITION_INDEPENDENT
+
 config DMA_ADDR_T_64BIT
 	bool
 	default y if ARM64
diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S
index b5ada61062..6d47988a13 100644
--- a/arch/arm/cpu/armv8/start.S
+++ b/arch/arm/cpu/armv8/start.S
@@ -57,6 +57,32 @@ reset:
 .globl	save_boot_params_ret
 save_boot_params_ret:
 
+#if CONFIG_POSITION_INDEPENDENT
+	/*
+	 * Fix .rela.dyn relocations. This allows U-Boot to be loaded to and
+	 * executed at a different address than it was linked at.
+	 */
+pie_fixup:
+	adr	x0, _start		/* x0 <- Runtime value of _start */
+	ldr	x1, _TEXT_BASE		/* x1 <- Linked value of _start */
+	sub	x9, x0, x1		/* x9 <- Run-vs-link offset */
+	adr	x2, __rel_dyn_start	/* x2 <- Runtime &__rel_dyn_start */
+	adr	x3, __rel_dyn_end	/* x3 <- Runtime &__rel_dyn_end */
+pie_fix_loop:
+	ldp	x0, x1, [x2], #16	/* (x0, x1) <- (Link location, fixup) */
+	ldr	x4, [x2], #8		/* x4 <- addend */
+	cmp	w1, #1027		/* relative fixup? */
+	bne	pie_skip_reloc
+	/* relative fix: store addend plus offset at dest location */
+	add	x0, x0, x9
+	add	x4, x4, x9
+	str	x4, [x0]
+pie_skip_reloc:
+	cmp	x2, x3
+	b.lo	pie_fix_loop
+pie_fixup_done:
+#endif
+
 #ifdef CONFIG_SYS_RESET_SCTRL
 	bl reset_sctrl
 #endif
diff --git a/arch/arm/include/asm/config.h b/arch/arm/include/asm/config.h
index 5674d37c04..9f17829381 100644
--- a/arch/arm/include/asm/config.h
+++ b/arch/arm/include/asm/config.h
@@ -10,10 +10,6 @@
 #define CONFIG_LMB
 #define CONFIG_SYS_BOOT_RAMDISK_HIGH
 
-#ifdef CONFIG_ARM64
-#define CONFIG_STATIC_RELA
-#endif
-
 #if defined(CONFIG_ARCH_LS1021A) || \
 	defined(CONFIG_CPU_PXA27X) || \
 	defined(CONFIG_CPU_MONAHANS) || \
diff --git a/arch/arm/lib/crt0_64.S b/arch/arm/lib/crt0_64.S
index d6c50bb439..ccefce0b20 100644
--- a/arch/arm/lib/crt0_64.S
+++ b/arch/arm/lib/crt0_64.S
@@ -98,6 +98,14 @@ ENTRY(_main)
 	ldr	x18, [x18, #GD_NEW_GD]		/* x18 <- gd->new_gd */
 
 	adr	lr, relocation_return
+#if CONFIG_POSITION_INDEPENDENT
+	/* Add in link-vs-runtime offset */
+	adr	x0, _start		/* x0 <- Runtime value of _start */
+	ldr	x9, _TEXT_BASE		/* x9 <- Linked value of _start */
+	sub	x9, x9, x0		/* x9 <- Run-vs-link offset */
+	add	lr, lr, x9
+#endif
+	/* Add in link-vs-relocation offset */
 	ldr	x9, [x18, #GD_RELOC_OFF]	/* x9 <- gd->reloc_off */
 	add	lr, lr, x9	/* new return address after relocation */
 	ldr	x0, [x18, #GD_RELOCADDR]	/* x0 <- gd->relocaddr */
diff --git a/arch/arm/lib/relocate_64.S b/arch/arm/lib/relocate_64.S
index fdba004363..04804524ed 100644
--- a/arch/arm/lib/relocate_64.S
+++ b/arch/arm/lib/relocate_64.S
@@ -27,11 +27,24 @@ ENTRY(relocate_code)
 	/*
 	 * Copy u-boot from flash to RAM
 	 */
-	ldr	x1, =__image_copy_start	/* x1 <- SRC &__image_copy_start */
-	subs	x9, x0, x1		/* x9 <- relocation offset */
+	adr	x1, __image_copy_start	/* x1 <- Run &__image_copy_start */
+	subs	x9, x0, x1		/* x8 <- Run to copy offset */
 	b.eq	relocate_done		/* skip relocation */
-	ldr	x2, =__image_copy_end	/* x2 <- SRC &__image_copy_end */
+	/*
+	 * Don't ldr x1, __image_copy_start here, since if the code is already
+	 * running at an address other than it was linked to, that instruction
+	 * will load the relocated value of __image_copy_start. To
+	 * correctly apply relocations, we need to know the linked value.
+	 *
+	 * Linked &__image_copy_start, which we know was at
+	 * CONFIG_SYS_TEXT_BASE, which is stored in _TEXT_BASE, as a non-
+	 * relocated value, since it isn't a symbol reference.
+	 */
+	ldr	x1, _TEXT_BASE		/* x1 <- Linked &__image_copy_start */
+	subs	x9, x0, x1		/* x9 <- Link to copy offset */
 
+	adr	x1, __image_copy_start	/* x1 <- Run &__image_copy_start */
+	adr	x2, __image_copy_end	/* x2 <- Run &__image_copy_end */
 copy_loop:
 	ldp	x10, x11, [x1], #16	/* copy from source address [x1] */
 	stp	x10, x11, [x0], #16	/* copy to   target address [x0] */
@@ -42,8 +55,8 @@ copy_loop:
 	/*
 	 * Fix .rela.dyn relocations
 	 */
-	ldr	x2, =__rel_dyn_start	/* x2 <- SRC &__rel_dyn_start */
-	ldr	x3, =__rel_dyn_end	/* x3 <- SRC &__rel_dyn_end */
+	adr	x2, __rel_dyn_start	/* x2 <- Run &__rel_dyn_start */
+	adr	x3, __rel_dyn_end	/* x3 <- Run &__rel_dyn_end */
 fixloop:
 	ldp	x0, x1, [x2], #16	/* (x0,x1) <- (SRC location, fixup) */
 	ldr	x4, [x2], #8		/* x4 <- addend */

commit 1151fbe6486d939516c6980af35f8e8e08d4fb23
Author: Stephen Warren <swarren@nvidia.com>
Date:   Fri Oct 27 11:04:08 2017 -0600

    UPSTREAM: test/py: add timestamps to log
    
    It can be useful to record how long tests take; this can help debug slow
    running test systems or track changes in performance over time. Enhance
    the test system to record timestamps while running test:
    - Whenever a new log file section is started.
    - After U-Boot is started and communication has been established.
    - After each host or U-Boot command is executed.
    
    Change-Id: I1db02bfc1d69c8d6a4c390a778ae433bbd858a9d
    Signed-off-by: Stephen Warren <swarren@nvidia.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 9679d339ad2d4c495d734bad3a0fb7be6c4215eb)

diff --git a/test/py/multiplexed_log.css b/test/py/multiplexed_log.css
index f135b10a24..9b7c44fe4d 100644
--- a/test/py/multiplexed_log.css
+++ b/test/py/multiplexed_log.css
@@ -62,6 +62,10 @@ pre {
     color: #8080ff
 }
 
+.timestamp {
+    color: #8080ff
+}
+
 .status-pass {
     color: #00ff00
 }
diff --git a/test/py/multiplexed_log.py b/test/py/multiplexed_log.py
index bf926c3e77..6afc41dcaf 100644
--- a/test/py/multiplexed_log.py
+++ b/test/py/multiplexed_log.py
@@ -7,6 +7,7 @@
 # each represented in a well-delineated/-structured fashion.
 
 import cgi
+import datetime
 import os.path
 import shutil
 import subprocess
@@ -164,6 +165,7 @@ class RunAndLog(object):
         self.logfile.write(self, output)
         if self.chained_file:
             self.chained_file.write(output)
+        self.logfile.timestamp()
 
         # Store the output so it can be accessed if we raise an exception.
         self.output = output
@@ -219,6 +221,9 @@ class Logfile(object):
         self.blocks = []
         self.cur_evt = 1
         self.anchor = 0
+        self.timestamp_start = self._get_time()
+        self.timestamp_prev = self.timestamp_start
+        self.timestamp_blocks = []
 
         shutil.copy(mod_dir + '/multiplexed_log.css', os.path.dirname(fn))
         self.f.write('''\
@@ -388,6 +393,7 @@ $(document).ready(function () {
 
         self._terminate_stream()
         self.blocks.append(marker)
+        self.timestamp_blocks.append(self._get_time())
         if not anchor:
             self.anchor += 1
             anchor = str(self.anchor)
@@ -396,6 +402,7 @@ $(document).ready(function () {
         self.f.write('<div class="section-header block-header">Section: ' +
                      blk_path + '</div>\n')
         self.f.write('<div class="section-content block-content">\n')
+        self.timestamp()
 
         return anchor
 
@@ -416,6 +423,11 @@ $(document).ready(function () {
             raise Exception('Block nesting mismatch: "%s" "%s"' %
                             (marker, '/'.join(self.blocks)))
         self._terminate_stream()
+        timestamp_now = self._get_time()
+        timestamp_section_start = self.timestamp_blocks.pop()
+        delta_section = timestamp_now - timestamp_section_start
+        self._note("timestamp",
+            "TIME: SINCE-SECTION: " + str(delta_section))
         blk_path = '/'.join(self.blocks)
         self.f.write('<div class="section-trailer block-trailer">' +
                      'End section: ' + blk_path + '</div>\n')
@@ -492,6 +504,31 @@ $(document).ready(function () {
 
         self._note("action", msg)
 
+    def _get_time(self):
+        return datetime.datetime.now()
+
+    def timestamp(self):
+        """Write a timestamp to the log file.
+
+        Args:
+            None
+
+        Returns:
+            Nothing.
+        """
+
+        timestamp_now = self._get_time()
+        delta_prev = timestamp_now - self.timestamp_prev
+        delta_start = timestamp_now - self.timestamp_start
+        self.timestamp_prev = timestamp_now
+
+        self._note("timestamp",
+            "TIME: NOW: " + timestamp_now.strftime("%Y/%m/%d %H:%M:%S.%f"))
+        self._note("timestamp",
+            "TIME: SINCE-PREV: " + str(delta_prev))
+        self._note("timestamp",
+            "TIME: SINCE-START: " + str(delta_start))
+
     def status_pass(self, msg, anchor=None):
         """Write a note to the log file describing test(s) which passed.
 
diff --git a/test/py/u_boot_console_base.py b/test/py/u_boot_console_base.py
index eedf73f858..4bccd72050 100644
--- a/test/py/u_boot_console_base.py
+++ b/test/py/u_boot_console_base.py
@@ -215,6 +215,8 @@ class ConsoleBase(object):
             self.log.error(str(ex))
             self.cleanup_spawn()
             raise
+        finally:
+            self.log.timestamp()
 
     def run_command_list(self, cmds):
         """Run a list of commands.
@@ -370,6 +372,7 @@ class ConsoleBase(object):
             self.cleanup_spawn()
             raise
         finally:
+            self.log.timestamp()
             self.log.end_section('Starting U-Boot')
 
     def cleanup_spawn(self):

commit 5d099091a8d6c4b4424b907f3c2ae4bcab223779
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Tue Oct 17 22:30:20 2017 +0900

    UPSTREAM: lib: libfdt: wrap scripts/dtc/libfdt/* where possible
    
    lib/libfdt/ and scripts/dtc/libfdt have the same copies for the
    followings 6 files:
      fdt.c fdt_addresses.c fdt_empty_tree.c fdt_overlay.c fdt_strerr.c
      fdt_sw.c
    
    Make them a wrapper of scripts/dtc/libfdt/*.  This is exactly what
    Linux does to sync libfdt.  In order to make is possible, import
    <linux/libfdt.h> and <linux/libfdt_env.h> from Linux 4.14-rc5.
    
    Unfortunately, U-Boot locally modified the following 3 files:
      fdt_ro.c fdt_wip.c fdt_rw.c
    
    The fdt_region.c is U-Boot own file.
    
    I did not touch them in order to avoid unpredictable impact.
    
    Change-Id: I154855ba51291bf56775714c0066247431d66244
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 50a327ded68b7e675389ad284ea3f8c62e683bda)

diff --git a/include/libfdt_env.h b/include/libfdt_env.h
index 6c6845f76c..273b5d30f8 100644
--- a/include/libfdt_env.h
+++ b/include/libfdt_env.h
@@ -23,12 +23,6 @@ typedef __be64 fdt64_t;
 #define fdt64_to_cpu(x)		be64_to_cpu(x)
 #define cpu_to_fdt64(x)		cpu_to_be64(x)
 
-#ifdef __UBOOT__
-#include <vsprintf.h>
-
-#define strtoul(cp, endp, base)	simple_strtoul(cp, endp, base)
-#endif
-
 /* adding a ramdisk needs 0x44 bytes in version 2008.10 */
 #define FDT_RAMDISK_OVERHEAD	0x80
 
diff --git a/include/linux/libfdt.h b/include/linux/libfdt.h
new file mode 100644
index 0000000000..2a663c6bb4
--- /dev/null
+++ b/include/linux/libfdt.h
@@ -0,0 +1,17 @@
+#ifndef _LIBFDT_ENV_H
+#define _LIBFDT_ENV_H
+
+#include <linux/string.h>
+
+#include <asm/byteorder.h>
+
+typedef __be16 fdt16_t;
+typedef __be32 fdt32_t;
+typedef __be64 fdt64_t;
+
+#define fdt32_to_cpu(x) be32_to_cpu(x)
+#define cpu_to_fdt32(x) cpu_to_be32(x)
+#define fdt64_to_cpu(x) be64_to_cpu(x)
+#define cpu_to_fdt64(x) cpu_to_be64(x)
+
+#endif /* _LIBFDT_ENV_H */
diff --git a/include/linux/libfdt_env.h b/include/linux/libfdt_env.h
new file mode 100644
index 0000000000..8178f9174b
--- /dev/null
+++ b/include/linux/libfdt_env.h
@@ -0,0 +1,22 @@
+#ifndef _LIBFDT_ENV_H
+#define _LIBFDT_ENV_H
+
+#include <linux/string.h>
+
+#include <asm/byteorder.h>
+
+typedef __be16 fdt16_t;
+typedef __be32 fdt32_t;
+typedef __be64 fdt64_t;
+
+#define fdt32_to_cpu(x) be32_to_cpu(x)
+#define cpu_to_fdt32(x) cpu_to_be32(x)
+#define fdt64_to_cpu(x) be64_to_cpu(x)
+#define cpu_to_fdt64(x) cpu_to_be64(x)
+
+/* U-Boot: for strtoul in fdt_overlay.c */
+#include <vsprintf.h>
+
+#define strtoul(cp, endp, base)	simple_strtoul(cp, endp, base)
+
+#endif /* _LIBFDT_ENV_H */
diff --git a/lib/libfdt/Makefile b/lib/libfdt/Makefile
index 6ef8290f4e..369bbf9ba3 100644
--- a/lib/libfdt/Makefile
+++ b/lib/libfdt/Makefile
@@ -5,15 +5,22 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
 
+# Use upstream code.
 obj-y += \
 	fdt.o \
-	fdt_ro.o \
-	fdt_rw.o \
 	fdt_strerror.o \
 	fdt_sw.o \
-	fdt_wip.o \
 	fdt_empty_tree.o \
-	fdt_addresses.o \
-	fdt_region.o
+	fdt_addresses.o
 
 obj-$(CONFIG_OF_LIBFDT_OVERLAY) += fdt_overlay.o
+
+# Locally modified for U-Boot.
+# TODO: split out the local modifiction.
+obj-y += \
+	fdt_ro.o \
+	fdt_rw.o \
+	fdt_wip.o \
+
+# U-Boot own file
+obj-y += fdt_region.o
diff --git a/lib/libfdt/fdt.c b/lib/libfdt/fdt.c
index 2055734012..0958e6ba57 100644
--- a/lib/libfdt/fdt.c
+++ b/lib/libfdt/fdt.c
@@ -1,210 +1,2 @@
-/*
- * libfdt - Flat Device Tree manipulation
- * Copyright (C) 2006 David Gibson, IBM Corporation.
- * SPDX-License-Identifier:	GPL-2.0+ BSD-2-Clause
- */
-#include <libfdt_env.h>
-
-#ifndef USE_HOSTCC
-#include <fdt.h>
-#include <libfdt.h>
-#else
-#include "fdt_host.h"
-#endif
-
-#include "libfdt_internal.h"
-
-int fdt_check_header(const void *fdt)
-{
-	if (fdt_magic(fdt) == FDT_MAGIC) {
-		/* Complete tree */
-		if (fdt_version(fdt) < FDT_FIRST_SUPPORTED_VERSION)
-			return -FDT_ERR_BADVERSION;
-		if (fdt_last_comp_version(fdt) > FDT_LAST_SUPPORTED_VERSION)
-			return -FDT_ERR_BADVERSION;
-	} else if (fdt_magic(fdt) == FDT_SW_MAGIC) {
-		/* Unfinished sequential-write blob */
-		if (fdt_size_dt_struct(fdt) == 0)
-			return -FDT_ERR_BADSTATE;
-	} else {
-		return -FDT_ERR_BADMAGIC;
-	}
-
-	return 0;
-}
-
-const void *fdt_offset_ptr(const void *fdt, int offset, unsigned int len)
-{
-	unsigned absoffset = offset + fdt_off_dt_struct(fdt);
-
-	if ((absoffset < offset)
-	    || ((absoffset + len) < absoffset)
-	    || (absoffset + len) > fdt_totalsize(fdt))
-		return NULL;
-
-	if (fdt_version(fdt) >= 0x11)
-		if (((offset + len) < offset)
-		    || ((offset + len) > fdt_size_dt_struct(fdt)))
-			return NULL;
-
-	return _fdt_offset_ptr(fdt, offset);
-}
-
-uint32_t fdt_next_tag(const void *fdt, int startoffset, int *nextoffset)
-{
-	const fdt32_t *tagp, *lenp;
-	uint32_t tag;
-	int offset = startoffset;
-	const char *p;
-
-	*nextoffset = -FDT_ERR_TRUNCATED;
-	tagp = fdt_offset_ptr(fdt, offset, FDT_TAGSIZE);
-	if (!tagp)
-		return FDT_END; /* premature end */
-	tag = fdt32_to_cpu(*tagp);
-	offset += FDT_TAGSIZE;
-
-	*nextoffset = -FDT_ERR_BADSTRUCTURE;
-	switch (tag) {
-	case FDT_BEGIN_NODE:
-		/* skip name */
-		do {
-			p = fdt_offset_ptr(fdt, offset++, 1);
-		} while (p && (*p != '\0'));
-		if (!p)
-			return FDT_END; /* premature end */
-		break;
-
-	case FDT_PROP:
-		lenp = fdt_offset_ptr(fdt, offset, sizeof(*lenp));
-		if (!lenp)
-			return FDT_END; /* premature end */
-		/* skip-name offset, length and value */
-		offset += sizeof(struct fdt_property) - FDT_TAGSIZE
-			+ fdt32_to_cpu(*lenp);
-		break;
-
-	case FDT_END:
-	case FDT_END_NODE:
-	case FDT_NOP:
-		break;
-
-	default:
-		return FDT_END;
-	}
-
-	if (!fdt_offset_ptr(fdt, startoffset, offset - startoffset))
-		return FDT_END; /* premature end */
-
-	*nextoffset = FDT_TAGALIGN(offset);
-	return tag;
-}
-
-int _fdt_check_node_offset(const void *fdt, int offset)
-{
-	if ((offset < 0) || (offset % FDT_TAGSIZE)
-	    || (fdt_next_tag(fdt, offset, &offset) != FDT_BEGIN_NODE))
-		return -FDT_ERR_BADOFFSET;
-
-	return offset;
-}
-
-int _fdt_check_prop_offset(const void *fdt, int offset)
-{
-	if ((offset < 0) || (offset % FDT_TAGSIZE)
-	    || (fdt_next_tag(fdt, offset, &offset) != FDT_PROP))
-		return -FDT_ERR_BADOFFSET;
-
-	return offset;
-}
-
-int fdt_next_node(const void *fdt, int offset, int *depth)
-{
-	int nextoffset = 0;
-	uint32_t tag;
-
-	if (offset >= 0)
-		if ((nextoffset = _fdt_check_node_offset(fdt, offset)) < 0)
-			return nextoffset;
-
-	do {
-		offset = nextoffset;
-		tag = fdt_next_tag(fdt, offset, &nextoffset);
-
-		switch (tag) {
-		case FDT_PROP:
-		case FDT_NOP:
-			break;
-
-		case FDT_BEGIN_NODE:
-			if (depth)
-				(*depth)++;
-			break;
-
-		case FDT_END_NODE:
-			if (depth && ((--(*depth)) < 0))
-				return nextoffset;
-			break;
-
-		case FDT_END:
-			if ((nextoffset >= 0)
-			    || ((nextoffset == -FDT_ERR_TRUNCATED) && !depth))
-				return -FDT_ERR_NOTFOUND;
-			else
-				return nextoffset;
-		}
-	} while (tag != FDT_BEGIN_NODE);
-
-	return offset;
-}
-
-int fdt_first_subnode(const void *fdt, int offset)
-{
-	int depth = 0;
-
-	offset = fdt_next_node(fdt, offset, &depth);
-	if (offset < 0 || depth != 1)
-		return -FDT_ERR_NOTFOUND;
-
-	return offset;
-}
-
-int fdt_next_subnode(const void *fdt, int offset)
-{
-	int depth = 1;
-
-	/*
-	 * With respect to the parent, the depth of the next subnode will be
-	 * the same as the last.
-	 */
-	do {
-		offset = fdt_next_node(fdt, offset, &depth);
-		if (offset < 0 || depth < 1)
-			return -FDT_ERR_NOTFOUND;
-	} while (depth > 1);
-
-	return offset;
-}
-
-const char *_fdt_find_string(const char *strtab, int tabsize, const char *s)
-{
-	int len = strlen(s) + 1;
-	const char *last = strtab + tabsize - len;
-	const char *p;
-
-	for (p = strtab; p <= last; p++)
-		if (memcmp(p, s, len) == 0)
-			return p;
-	return NULL;
-}
-
-int fdt_move(const void *fdt, void *buf, int bufsize)
-{
-	FDT_CHECK_HEADER(fdt);
-
-	if (fdt_totalsize(fdt) > bufsize)
-		return -FDT_ERR_NOSPACE;
-
-	memmove(buf, fdt, fdt_totalsize(fdt));
-	return 0;
-}
+#include <linux/libfdt_env.h>
+#include "../../scripts/dtc/libfdt/fdt.c"
diff --git a/lib/libfdt/fdt_addresses.c b/lib/libfdt/fdt_addresses.c
index b6bc66ea32..b82a02936c 100644
--- a/lib/libfdt/fdt_addresses.c
+++ b/lib/libfdt/fdt_addresses.c
@@ -1,55 +1,2 @@
-/*
- * libfdt - Flat Device Tree manipulation
- * Copyright (C) 2014 David Gibson <david@gibson.dropbear.id.au>
- * SPDX-License-Identifier:	GPL-2.0+ BSD-2-Clause
- */
-#include <libfdt_env.h>
-
-#ifndef USE_HOSTCC
-#include <fdt.h>
-#include <libfdt.h>
-#else
-#include "fdt_host.h"
-#endif
-
-#include "libfdt_internal.h"
-
-int fdt_address_cells(const void *fdt, int nodeoffset)
-{
-	const fdt32_t *ac;
-	int val;
-	int len;
-
-	ac = fdt_getprop(fdt, nodeoffset, "#address-cells", &len);
-	if (!ac)
-		return 2;
-
-	if (len != sizeof(*ac))
-		return -FDT_ERR_BADNCELLS;
-
-	val = fdt32_to_cpu(*ac);
-	if ((val <= 0) || (val > FDT_MAX_NCELLS))
-		return -FDT_ERR_BADNCELLS;
-
-	return val;
-}
-
-int fdt_size_cells(const void *fdt, int nodeoffset)
-{
-	const fdt32_t *sc;
-	int val;
-	int len;
-
-	sc = fdt_getprop(fdt, nodeoffset, "#size-cells", &len);
-	if (!sc)
-		return 2;
-
-	if (len != sizeof(*sc))
-		return -FDT_ERR_BADNCELLS;
-
-	val = fdt32_to_cpu(*sc);
-	if ((val < 0) || (val > FDT_MAX_NCELLS))
-		return -FDT_ERR_BADNCELLS;
-
-	return val;
-}
+#include <linux/libfdt_env.h>
+#include "../../scripts/dtc/libfdt/fdt_addresses.c"
diff --git a/lib/libfdt/fdt_empty_tree.c b/lib/libfdt/fdt_empty_tree.c
index 6fde1eb9ed..2b4ae1062b 100644
--- a/lib/libfdt/fdt_empty_tree.c
+++ b/lib/libfdt/fdt_empty_tree.c
@@ -1,37 +1,2 @@
-/*
- * libfdt - Flat Device Tree manipulation
- * Copyright (C) 2012 David Gibson, IBM Corporation.
- * SPDX-License-Identifier:	GPL-2.0+ BSD-2-Clause
- */
-#include <libfdt_env.h>
-#include <fdt.h>
-#include <libfdt.h>
-
-#include "libfdt_internal.h"
-
-int fdt_create_empty_tree(void *buf, int bufsize)
-{
-	int err;
-
-	err = fdt_create(buf, bufsize);
-	if (err)
-		return err;
-
-	err = fdt_finish_reservemap(buf);
-	if (err)
-		return err;
-
-	err = fdt_begin_node(buf, "");
-	if (err)
-		return err;
-
-	err =  fdt_end_node(buf);
-	if (err)
-		return err;
-
-	err = fdt_finish(buf);
-	if (err)
-		return err;
-
-	return fdt_open_into(buf, buf, bufsize);
-}
+#include <linux/libfdt_env.h>
+#include "../../scripts/dtc/libfdt/fdt_empty_tree.c"
diff --git a/lib/libfdt/fdt_overlay.c b/lib/libfdt/fdt_overlay.c
index bd81241e66..575c827673 100644
--- a/lib/libfdt/fdt_overlay.c
+++ b/lib/libfdt/fdt_overlay.c
@@ -1,861 +1,2 @@
-#include "libfdt_env.h"
-
-#include <fdt.h>
-#include <libfdt.h>
-
-#include "libfdt_internal.h"
-
-/**
- * overlay_get_target_phandle - retrieves the target phandle of a fragment
- * @fdto: pointer to the device tree overlay blob
- * @fragment: node offset of the fragment in the overlay
- *
- * overlay_get_target_phandle() retrieves the target phandle of an
- * overlay fragment when that fragment uses a phandle (target
- * property) instead of a path (target-path property).
- *
- * returns:
- *      the phandle pointed by the target property
- *      0, if the phandle was not found
- *	-1, if the phandle was malformed
- */
-static uint32_t overlay_get_target_phandle(const void *fdto, int fragment)
-{
-	const fdt32_t *val;
-	int len;
-
-	val = fdt_getprop(fdto, fragment, "target", &len);
-	if (!val)
-		return 0;
-
-	if ((len != sizeof(*val)) || (fdt32_to_cpu(*val) == (uint32_t)-1))
-		return (uint32_t)-1;
-
-	return fdt32_to_cpu(*val);
-}
-
-/**
- * overlay_get_target - retrieves the offset of a fragment's target
- * @fdt: Base device tree blob
- * @fdto: Device tree overlay blob
- * @fragment: node offset of the fragment in the overlay
- * @pathp: pointer which receives the path of the target (or NULL)
- *
- * overlay_get_target() retrieves the target offset in the base
- * device tree of a fragment, no matter how the actual targetting is
- * done (through a phandle or a path)
- *
- * returns:
- *      the targetted node offset in the base device tree
- *      Negative error code on error
- */
-static int overlay_get_target(const void *fdt, const void *fdto,
-			      int fragment, char const **pathp)
-{
-	uint32_t phandle;
-	const char *path = NULL;
-	int path_len = 0, ret;
-
-	/* Try first to do a phandle based lookup */
-	phandle = overlay_get_target_phandle(fdto, fragment);
-	if (phandle == (uint32_t)-1)
-		return -FDT_ERR_BADPHANDLE;
-
-	/* no phandle, try path */
-	if (!phandle) {
-		/* And then a path based lookup */
-		path = fdt_getprop(fdto, fragment, "target-path", &path_len);
-		if (path)
-			ret = fdt_path_offset(fdt, path);
-		else
-			ret = path_len;
-	} else
-		ret = fdt_node_offset_by_phandle(fdt, phandle);
-
-	/*
-	* If we haven't found either a target or a
-	* target-path property in a node that contains a
-	* __overlay__ subnode (we wouldn't be called
-	* otherwise), consider it a improperly written
-	* overlay
-	*/
-	if (ret < 0 && path_len == -FDT_ERR_NOTFOUND)
-		ret = -FDT_ERR_BADOVERLAY;
-
-	/* return on error */
-	if (ret < 0)
-		return ret;
-
-	/* return pointer to path (if available) */
-	if (pathp)
-		*pathp = path ? path : NULL;
-
-	return ret;
-}
-
-/**
- * overlay_phandle_add_offset - Increases a phandle by an offset
- * @fdt: Base device tree blob
- * @node: Device tree overlay blob
- * @name: Name of the property to modify (phandle or linux,phandle)
- * @delta: offset to apply
- *
- * overlay_phandle_add_offset() increments a node phandle by a given
- * offset.
- *
- * returns:
- *      0 on success.
- *      Negative error code on error
- */
-static int overlay_phandle_add_offset(void *fdt, int node,
-				      const char *name, uint32_t delta)
-{
-	const fdt32_t *val;
-	uint32_t adj_val;
-	int len;
-
-	val = fdt_getprop(fdt, node, name, &len);
-	if (!val)
-		return len;
-
-	if (len != sizeof(*val))
-		return -FDT_ERR_BADPHANDLE;
-
-	adj_val = fdt32_to_cpu(*val);
-	if ((adj_val + delta) < adj_val)
-		return -FDT_ERR_NOPHANDLES;
-
-	adj_val += delta;
-	if (adj_val == (uint32_t)-1)
-		return -FDT_ERR_NOPHANDLES;
-
-	return fdt_setprop_inplace_u32(fdt, node, name, adj_val);
-}
-
-/**
- * overlay_adjust_node_phandles - Offsets the phandles of a node
- * @fdto: Device tree overlay blob
- * @node: Offset of the node we want to adjust
- * @delta: Offset to shift the phandles of
- *
- * overlay_adjust_node_phandles() adds a constant to all the phandles
- * of a given node. This is mainly use as part of the overlay
- * application process, when we want to update all the overlay
- * phandles to not conflict with the overlays of the base device tree.
- *
- * returns:
- *      0 on success
- *      Negative error code on failure
- */
-static int overlay_adjust_node_phandles(void *fdto, int node,
-					uint32_t delta)
-{
-	int child;
-	int ret;
-
-	ret = overlay_phandle_add_offset(fdto, node, "phandle", delta);
-	if (ret && ret != -FDT_ERR_NOTFOUND)
-		return ret;
-
-	ret = overlay_phandle_add_offset(fdto, node, "linux,phandle", delta);
-	if (ret && ret != -FDT_ERR_NOTFOUND)
-		return ret;
-
-	fdt_for_each_subnode(child, fdto, node) {
-		ret = overlay_adjust_node_phandles(fdto, child, delta);
-		if (ret)
-			return ret;
-	}
-
-	return 0;
-}
-
-/**
- * overlay_adjust_local_phandles - Adjust the phandles of a whole overlay
- * @fdto: Device tree overlay blob
- * @delta: Offset to shift the phandles of
- *
- * overlay_adjust_local_phandles() adds a constant to all the
- * phandles of an overlay. This is mainly use as part of the overlay
- * application process, when we want to update all the overlay
- * phandles to not conflict with the overlays of the base device tree.
- *
- * returns:
- *      0 on success
- *      Negative error code on failure
- */
-static int overlay_adjust_local_phandles(void *fdto, uint32_t delta)
-{
-	/*
-	 * Start adjusting the phandles from the overlay root
-	 */
-	return overlay_adjust_node_phandles(fdto, 0, delta);
-}
-
-/**
- * overlay_update_local_node_references - Adjust the overlay references
- * @fdto: Device tree overlay blob
- * @tree_node: Node offset of the node to operate on
- * @fixup_node: Node offset of the matching local fixups node
- * @delta: Offset to shift the phandles of
- *
- * overlay_update_local_nodes_references() update the phandles
- * pointing to a node within the device tree overlay by adding a
- * constant delta.
- *
- * This is mainly used as part of a device tree application process,
- * where you want the device tree overlays phandles to not conflict
- * with the ones from the base device tree before merging them.
- *
- * returns:
- *      0 on success
- *      Negative error code on failure
- */
-static int overlay_update_local_node_references(void *fdto,
-						int tree_node,
-						int fixup_node,
-						uint32_t delta)
-{
-	int fixup_prop;
-	int fixup_child;
-	int ret;
-
-	fdt_for_each_property_offset(fixup_prop, fdto, fixup_node) {
-		const fdt32_t *fixup_val;
-		const char *tree_val;
-		const char *name;
-		int fixup_len;
-		int tree_len;
-		int i;
-
-		fixup_val = fdt_getprop_by_offset(fdto, fixup_prop,
-						  &name, &fixup_len);
-		if (!fixup_val)
-			return fixup_len;
-
-		if (fixup_len % sizeof(uint32_t))
-			return -FDT_ERR_BADOVERLAY;
-
-		tree_val = fdt_getprop(fdto, tree_node, name, &tree_len);
-		if (!tree_val) {
-			if (tree_len == -FDT_ERR_NOTFOUND)
-				return -FDT_ERR_BADOVERLAY;
-
-			return tree_len;
-		}
-
-		for (i = 0; i < (fixup_len / sizeof(uint32_t)); i++) {
-			fdt32_t adj_val;
-			uint32_t poffset;
-
-			poffset = fdt32_to_cpu(fixup_val[i]);
-
-			/*
-			 * phandles to fixup can be unaligned.
-			 *
-			 * Use a memcpy for the architectures that do
-			 * not support unaligned accesses.
-			 */
-			memcpy(&adj_val, tree_val + poffset, sizeof(adj_val));
-
-			adj_val = cpu_to_fdt32(fdt32_to_cpu(adj_val) + delta);
-
-			ret = fdt_setprop_inplace_namelen_partial(fdto,
-								  tree_node,
-								  name,
-								  strlen(name),
-								  poffset,
-								  &adj_val,
-								  sizeof(adj_val));
-			if (ret == -FDT_ERR_NOSPACE)
-				return -FDT_ERR_BADOVERLAY;
-
-			if (ret)
-				return ret;
-		}
-	}
-
-	fdt_for_each_subnode(fixup_child, fdto, fixup_node) {
-		const char *fixup_child_name = fdt_get_name(fdto, fixup_child,
-							    NULL);
-		int tree_child;
-
-		tree_child = fdt_subnode_offset(fdto, tree_node,
-						fixup_child_name);
-		if (tree_child == -FDT_ERR_NOTFOUND)
-			return -FDT_ERR_BADOVERLAY;
-		if (tree_child < 0)
-			return tree_child;
-
-		ret = overlay_update_local_node_references(fdto,
-							   tree_child,
-							   fixup_child,
-							   delta);
-		if (ret)
-			return ret;
-	}
-
-	return 0;
-}
-
-/**
- * overlay_update_local_references - Adjust the overlay references
- * @fdto: Device tree overlay blob
- * @delta: Offset to shift the phandles of
- *
- * overlay_update_local_references() update all the phandles pointing
- * to a node within the device tree overlay by adding a constant
- * delta to not conflict with the base overlay.
- *
- * This is mainly used as part of a device tree application process,
- * where you want the device tree overlays phandles to not conflict
- * with the ones from the base device tree before merging them.
- *
- * returns:
- *      0 on success
- *      Negative error code on failure
- */
-static int overlay_update_local_references(void *fdto, uint32_t delta)
-{
-	int fixups;
-
-	fixups = fdt_path_offset(fdto, "/__local_fixups__");
-	if (fixups < 0) {
-		/* There's no local phandles to adjust, bail out */
-		if (fixups == -FDT_ERR_NOTFOUND)
-			return 0;
-
-		return fixups;
-	}
-
-	/*
-	 * Update our local references from the root of the tree
-	 */
-	return overlay_update_local_node_references(fdto, 0, fixups,
-						    delta);
-}
-
-/**
- * overlay_fixup_one_phandle - Set an overlay phandle to the base one
- * @fdt: Base Device Tree blob
- * @fdto: Device tree overlay blob
- * @symbols_off: Node offset of the symbols node in the base device tree
- * @path: Path to a node holding a phandle in the overlay
- * @path_len: number of path characters to consider
- * @name: Name of the property holding the phandle reference in the overlay
- * @name_len: number of name characters to consider
- * @poffset: Offset within the overlay property where the phandle is stored
- * @label: Label of the node referenced by the phandle
- *
- * overlay_fixup_one_phandle() resolves an overlay phandle pointing to
- * a node in the base device tree.
- *
- * This is part of the device tree overlay application process, when
- * you want all the phandles in the overlay to point to the actual
- * base dt nodes.
- *
- * returns:
- *      0 on success
- *      Negative error code on failure
- */
-static int overlay_fixup_one_phandle(void *fdt, void *fdto,
-				     int symbols_off,
-				     const char *path, uint32_t path_len,
-				     const char *name, uint32_t name_len,
-				     int poffset, const char *label)
-{
-	const char *symbol_path;
-	uint32_t phandle;
-	fdt32_t phandle_prop;
-	int symbol_off, fixup_off;
-	int prop_len;
-
-	if (symbols_off < 0)
-		return symbols_off;
-
-	symbol_path = fdt_getprop(fdt, symbols_off, label,
-				  &prop_len);
-	if (!symbol_path)
-		return prop_len;
-
-	symbol_off = fdt_path_offset(fdt, symbol_path);
-	if (symbol_off < 0)
-		return symbol_off;
-
-	phandle = fdt_get_phandle(fdt, symbol_off);
-	if (!phandle)
-		return -FDT_ERR_NOTFOUND;
-
-	fixup_off = fdt_path_offset_namelen(fdto, path, path_len);
-	if (fixup_off == -FDT_ERR_NOTFOUND)
-		return -FDT_ERR_BADOVERLAY;
-	if (fixup_off < 0)
-		return fixup_off;
-
-	phandle_prop = cpu_to_fdt32(phandle);
-	return fdt_setprop_inplace_namelen_partial(fdto, fixup_off,
-						   name, name_len, poffset,
-						   &phandle_prop,
-						   sizeof(phandle_prop));
-};
-
-/**
- * overlay_fixup_phandle - Set an overlay phandle to the base one
- * @fdt: Base Device Tree blob
- * @fdto: Device tree overlay blob
- * @symbols_off: Node offset of the symbols node in the base device tree
- * @property: Property offset in the overlay holding the list of fixups
- *
- * overlay_fixup_phandle() resolves all the overlay phandles pointed
- * to in a __fixups__ property, and updates them to match the phandles
- * in use in the base device tree.
- *
- * This is part of the device tree overlay application process, when
- * you want all the phandles in the overlay to point to the actual
- * base dt nodes.
- *
- * returns:
- *      0 on success
- *      Negative error code on failure
- */
-static int overlay_fixup_phandle(void *fdt, void *fdto, int symbols_off,
-				 int property)
-{
-	const char *value;
-	const char *label;
-	int len;
-
-	value = fdt_getprop_by_offset(fdto, property,
-				      &label, &len);
-	if (!value) {
-		if (len == -FDT_ERR_NOTFOUND)
-			return -FDT_ERR_INTERNAL;
-
-		return len;
-	}
-
-	do {
-		const char *path, *name, *fixup_end;
-		const char *fixup_str = value;
-		uint32_t path_len, name_len;
-		uint32_t fixup_len;
-		char *sep, *endptr;
-		int poffset, ret;
-
-		fixup_end = memchr(value, '\0', len);
-		if (!fixup_end)
-			return -FDT_ERR_BADOVERLAY;
-		fixup_len = fixup_end - fixup_str;
-
-		len -= fixup_len + 1;
-		value += fixup_len + 1;
-
-		path = fixup_str;
-		sep = memchr(fixup_str, ':', fixup_len);
-		if (!sep || *sep != ':')
-			return -FDT_ERR_BADOVERLAY;
-
-		path_len = sep - path;
-		if (path_len == (fixup_len - 1))
-			return -FDT_ERR_BADOVERLAY;
-
-		fixup_len -= path_len + 1;
-		name = sep + 1;
-		sep = memchr(name, ':', fixup_len);
-		if (!sep || *sep != ':')
-			return -FDT_ERR_BADOVERLAY;
-
-		name_len = sep - name;
-		if (!name_len)
-			return -FDT_ERR_BADOVERLAY;
-
-		poffset = strtoul(sep + 1, &endptr, 10);
-		if ((*endptr != '\0') || (endptr <= (sep + 1)))
-			return -FDT_ERR_BADOVERLAY;
-
-		ret = overlay_fixup_one_phandle(fdt, fdto, symbols_off,
-						path, path_len, name, name_len,
-						poffset, label);
-		if (ret)
-			return ret;
-	} while (len > 0);
-
-	return 0;
-}
-
-/**
- * overlay_fixup_phandles - Resolve the overlay phandles to the base
- *                          device tree
- * @fdt: Base Device Tree blob
- * @fdto: Device tree overlay blob
- *
- * overlay_fixup_phandles() resolves all the overlay phandles pointing
- * to nodes in the base device tree.
- *
- * This is one of the steps of the device tree overlay application
- * process, when you want all the phandles in the overlay to point to
- * the actual base dt nodes.
- *
- * returns:
- *      0 on success
- *      Negative error code on failure
- */
-static int overlay_fixup_phandles(void *fdt, void *fdto)
-{
-	int fixups_off, symbols_off;
-	int property;
-
-	/* We can have overlays without any fixups */
-	fixups_off = fdt_path_offset(fdto, "/__fixups__");
-	if (fixups_off == -FDT_ERR_NOTFOUND)
-		return 0; /* nothing to do */
-	if (fixups_off < 0)
-		return fixups_off;
-
-	/* And base DTs without symbols */
-	symbols_off = fdt_path_offset(fdt, "/__symbols__");
-	if ((symbols_off < 0 && (symbols_off != -FDT_ERR_NOTFOUND)))
-		return symbols_off;
-
-	fdt_for_each_property_offset(property, fdto, fixups_off) {
-		int ret;
-
-		ret = overlay_fixup_phandle(fdt, fdto, symbols_off, property);
-		if (ret)
-			return ret;
-	}
-
-	return 0;
-}
-
-/**
- * overlay_apply_node - Merges a node into the base device tree
- * @fdt: Base Device Tree blob
- * @target: Node offset in the base device tree to apply the fragment to
- * @fdto: Device tree overlay blob
- * @node: Node offset in the overlay holding the changes to merge
- *
- * overlay_apply_node() merges a node into a target base device tree
- * node pointed.
- *
- * This is part of the final step in the device tree overlay
- * application process, when all the phandles have been adjusted and
- * resolved and you just have to merge overlay into the base device
- * tree.
- *
- * returns:
- *      0 on success
- *      Negative error code on failure
- */
-static int overlay_apply_node(void *fdt, int target,
-			      void *fdto, int node)
-{
-	int property;
-	int subnode;
-
-	fdt_for_each_property_offset(property, fdto, node) {
-		const char *name;
-		const void *prop;
-		int prop_len;
-		int ret;
-
-		prop = fdt_getprop_by_offset(fdto, property, &name,
-					     &prop_len);
-		if (prop_len == -FDT_ERR_NOTFOUND)
-			return -FDT_ERR_INTERNAL;
-		if (prop_len < 0)
-			return prop_len;
-
-		ret = fdt_setprop(fdt, target, name, prop, prop_len);
-		if (ret)
-			return ret;
-	}
-
-	fdt_for_each_subnode(subnode, fdto, node) {
-		const char *name = fdt_get_name(fdto, subnode, NULL);
-		int nnode;
-		int ret;
-
-		nnode = fdt_add_subnode(fdt, target, name);
-		if (nnode == -FDT_ERR_EXISTS) {
-			nnode = fdt_subnode_offset(fdt, target, name);
-			if (nnode == -FDT_ERR_NOTFOUND)
-				return -FDT_ERR_INTERNAL;
-		}
-
-		if (nnode < 0)
-			return nnode;
-
-		ret = overlay_apply_node(fdt, nnode, fdto, subnode);
-		if (ret)
-			return ret;
-	}
-
-	return 0;
-}
-
-/**
- * overlay_merge - Merge an overlay into its base device tree
- * @fdt: Base Device Tree blob
- * @fdto: Device tree overlay blob
- *
- * overlay_merge() merges an overlay into its base device tree.
- *
- * This is the next to last step in the device tree overlay application
- * process, when all the phandles have been adjusted and resolved and
- * you just have to merge overlay into the base device tree.
- *
- * returns:
- *      0 on success
- *      Negative error code on failure
- */
-static int overlay_merge(void *fdt, void *fdto)
-{
-	int fragment;
-
-	fdt_for_each_subnode(fragment, fdto, 0) {
-		int overlay;
-		int target;
-		int ret;
-
-		/*
-		 * Each fragments will have an __overlay__ node. If
-		 * they don't, it's not supposed to be merged
-		 */
-		overlay = fdt_subnode_offset(fdto, fragment, "__overlay__");
-		if (overlay == -FDT_ERR_NOTFOUND)
-			continue;
-
-		if (overlay < 0)
-			return overlay;
-
-		target = overlay_get_target(fdt, fdto, fragment, NULL);
-		if (target < 0)
-			return target;
-
-		ret = overlay_apply_node(fdt, target, fdto, overlay);
-		if (ret)
-			return ret;
-	}
-
-	return 0;
-}
-
-static int get_path_len(const void *fdt, int nodeoffset)
-{
-	int len = 0, namelen;
-	const char *name;
-
-	FDT_CHECK_HEADER(fdt);
-
-	for (;;) {
-		name = fdt_get_name(fdt, nodeoffset, &namelen);
-		if (!name)
-			return namelen;
-
-		/* root? we're done */
-		if (namelen == 0)
-			break;
-
-		nodeoffset = fdt_parent_offset(fdt, nodeoffset);
-		if (nodeoffset < 0)
-			return nodeoffset;
-		len += namelen + 1;
-	}
-
-	/* in case of root pretend it's "/" */
-	if (len == 0)
-		len++;
-	return len;
-}
-
-/**
- * overlay_symbol_update - Update the symbols of base tree after a merge
- * @fdt: Base Device Tree blob
- * @fdto: Device tree overlay blob
- *
- * overlay_symbol_update() updates the symbols of the base tree with the
- * symbols of the applied overlay
- *
- * This is the last step in the device tree overlay application
- * process, allowing the reference of overlay symbols by subsequent
- * overlay operations.
- *
- * returns:
- *      0 on success
- *      Negative error code on failure
- */
-static int overlay_symbol_update(void *fdt, void *fdto)
-{
-	int root_sym, ov_sym, prop, path_len, fragment, target;
-	int len, frag_name_len, ret, rel_path_len;
-	const char *s, *e;
-	const char *path;
-	const char *name;
-	const char *frag_name;
-	const char *rel_path;
-	const char *target_path;
-	char *buf;
-	void *p;
-
-	ov_sym = fdt_subnode_offset(fdto, 0, "__symbols__");
-
-	/* if no overlay symbols exist no problem */
-	if (ov_sym < 0)
-		return 0;
-
-	root_sym = fdt_subnode_offset(fdt, 0, "__symbols__");
-
-	/* it no root symbols exist we should create them */
-	if (root_sym == -FDT_ERR_NOTFOUND)
-		root_sym = fdt_add_subnode(fdt, 0, "__symbols__");
-
-	/* any error is fatal now */
-	if (root_sym < 0)
-		return root_sym;
-
-	/* iterate over each overlay symbol */
-	fdt_for_each_property_offset(prop, fdto, ov_sym) {
-		path = fdt_getprop_by_offset(fdto, prop, &name, &path_len);
-		if (!path)
-			return path_len;
-
-		/* verify it's a string property (terminated by a single \0) */
-		if (path_len < 1 || memchr(path, '\0', path_len) != &path[path_len - 1])
-			return -FDT_ERR_BADVALUE;
-
-		/* keep end marker to avoid strlen() */
-		e = path + path_len;
-
-		/* format: /<fragment-name>/__overlay__/<relative-subnode-path> */
-
-		if (*path != '/')
-			return -FDT_ERR_BADVALUE;
-
-		/* get fragment name first */
-		s = strchr(path + 1, '/');
-		if (!s)
-			return -FDT_ERR_BADOVERLAY;
-
-		frag_name = path + 1;
-		frag_name_len = s - path - 1;
-
-		/* verify format; safe since "s" lies in \0 terminated prop */
-		len = sizeof("/__overlay__/") - 1;
-		if ((e - s) < len || memcmp(s, "/__overlay__/", len))
-			return -FDT_ERR_BADOVERLAY;
-
-		rel_path = s + len;
-		rel_path_len = e - rel_path;
-
-		/* find the fragment index in which the symbol lies */
-		ret = fdt_subnode_offset_namelen(fdto, 0, frag_name,
-					       frag_name_len);
-		/* not found? */
-		if (ret < 0)
-			return -FDT_ERR_BADOVERLAY;
-		fragment = ret;
-
-		/* an __overlay__ subnode must exist */
-		ret = fdt_subnode_offset(fdto, fragment, "__overlay__");
-		if (ret < 0)
-			return -FDT_ERR_BADOVERLAY;
-
-		/* get the target of the fragment */
-		ret = overlay_get_target(fdt, fdto, fragment, &target_path);
-		if (ret < 0)
-			return ret;
-		target = ret;
-
-		/* if we have a target path use */
-		if (!target_path) {
-			ret = get_path_len(fdt, target);
-			if (ret < 0)
-				return ret;
-			len = ret;
-		} else {
-			len = strlen(target_path);
-		}
-
-		ret = fdt_setprop_placeholder(fdt, root_sym, name,
-				len + (len > 1) + rel_path_len + 1, &p);
-		if (ret < 0)
-			return ret;
-
-		if (!target_path) {
-			/* again in case setprop_placeholder changed it */
-			ret = overlay_get_target(fdt, fdto, fragment, &target_path);
-			if (ret < 0)
-				return ret;
-			target = ret;
-		}
-
-		buf = p;
-		if (len > 1) { /* target is not root */
-			if (!target_path) {
-				ret = fdt_get_path(fdt, target, buf, len + 1);
-				if (ret < 0)
-					return ret;
-			} else
-				memcpy(buf, target_path, len + 1);
-
-		} else
-			len--;
-
-		buf[len] = '/';
-		memcpy(buf + len + 1, rel_path, rel_path_len);
-		buf[len + 1 + rel_path_len] = '\0';
-	}
-
-	return 0;
-}
-
-int fdt_overlay_apply(void *fdt, void *fdto)
-{
-	uint32_t delta = fdt_get_max_phandle(fdt);
-	int ret;
-
-	FDT_CHECK_HEADER(fdt);
-	FDT_CHECK_HEADER(fdto);
-
-	ret = overlay_adjust_local_phandles(fdto, delta);
-	if (ret)
-		goto err;
-
-	ret = overlay_update_local_references(fdto, delta);
-	if (ret)
-		goto err;
-
-	ret = overlay_fixup_phandles(fdt, fdto);
-	if (ret)
-		goto err;
-
-	ret = overlay_merge(fdt, fdto);
-	if (ret)
-		goto err;
-
-	ret = overlay_symbol_update(fdt, fdto);
-	if (ret)
-		goto err;
-
-	/*
-	 * The overlay has been damaged, erase its magic.
-	 */
-	fdt_set_magic(fdto, ~0);
-
-	return 0;
-
-err:
-	/*
-	 * The overlay might have been damaged, erase its magic.
-	 */
-	fdt_set_magic(fdto, ~0);
-
-	/*
-	 * The base device tree might have been damaged, erase its
-	 * magic.
-	 */
-	fdt_set_magic(fdt, ~0);
-
-	return ret;
-}
+#include <linux/libfdt_env.h>
+#include "../../scripts/dtc/libfdt/fdt_overlay.c"
diff --git a/lib/libfdt/fdt_strerror.c b/lib/libfdt/fdt_strerror.c
index f89004c609..408a88328f 100644
--- a/lib/libfdt/fdt_strerror.c
+++ b/lib/libfdt/fdt_strerror.c
@@ -1,61 +1,2 @@
-/*
- * libfdt - Flat Device Tree manipulation
- * Copyright (C) 2006 David Gibson, IBM Corporation.
- * SPDX-License-Identifier:	GPL-2.0+ BSD-2-Clause
- */
-#include <libfdt_env.h>
-
-#ifndef USE_HOSTCC
-#include <fdt.h>
-#include <libfdt.h>
-#else
-#include "fdt_host.h"
-#endif
-
-#include "libfdt_internal.h"
-
-struct fdt_errtabent {
-	const char *str;
-};
-
-#define FDT_ERRTABENT(val) \
-	[(val)] = { .str = #val, }
-
-static struct fdt_errtabent fdt_errtable[] = {
-	FDT_ERRTABENT(FDT_ERR_NOTFOUND),
-	FDT_ERRTABENT(FDT_ERR_EXISTS),
-	FDT_ERRTABENT(FDT_ERR_NOSPACE),
-
-	FDT_ERRTABENT(FDT_ERR_BADOFFSET),
-	FDT_ERRTABENT(FDT_ERR_BADPATH),
-	FDT_ERRTABENT(FDT_ERR_BADPHANDLE),
-	FDT_ERRTABENT(FDT_ERR_BADSTATE),
-
-	FDT_ERRTABENT(FDT_ERR_TRUNCATED),
-	FDT_ERRTABENT(FDT_ERR_BADMAGIC),
-	FDT_ERRTABENT(FDT_ERR_BADVERSION),
-	FDT_ERRTABENT(FDT_ERR_BADSTRUCTURE),
-	FDT_ERRTABENT(FDT_ERR_BADLAYOUT),
-	FDT_ERRTABENT(FDT_ERR_INTERNAL),
-	FDT_ERRTABENT(FDT_ERR_BADNCELLS),
-	FDT_ERRTABENT(FDT_ERR_BADVALUE),
-	FDT_ERRTABENT(FDT_ERR_BADOVERLAY),
-	FDT_ERRTABENT(FDT_ERR_NOPHANDLES),
-};
-#define FDT_ERRTABSIZE	(sizeof(fdt_errtable) / sizeof(fdt_errtable[0]))
-
-const char *fdt_strerror(int errval)
-{
-	if (errval > 0)
-		return "<valid offset/length>";
-	else if (errval == 0)
-		return "<no error>";
-	else if (errval > -FDT_ERRTABSIZE) {
-		const char *s = fdt_errtable[-errval].str;
-
-		if (s)
-			return s;
-	}
-
-	return "<unknown error>";
-}
+#include <linux/libfdt_env.h>
+#include "../../scripts/dtc/libfdt/fdt_strerror.c"
diff --git a/lib/libfdt/fdt_sw.c b/lib/libfdt/fdt_sw.c
index 70fd026550..0da3ed92f3 100644
--- a/lib/libfdt/fdt_sw.c
+++ b/lib/libfdt/fdt_sw.c
@@ -1,254 +1,2 @@
-/*
- * libfdt - Flat Device Tree manipulation
- * Copyright (C) 2006 David Gibson, IBM Corporation.
- * SPDX-License-Identifier:	GPL-2.0+ BSD-2-Clause
- */
-#include <libfdt_env.h>
-#include <fdt.h>
-#include <libfdt.h>
-
-#include "libfdt_internal.h"
-
-static int _fdt_sw_check_header(void *fdt)
-{
-	if (fdt_magic(fdt) != FDT_SW_MAGIC)
-		return -FDT_ERR_BADMAGIC;
-	/* FIXME: should check more details about the header state */
-	return 0;
-}
-
-#define FDT_SW_CHECK_HEADER(fdt) \
-	{ \
-		int err; \
-		if ((err = _fdt_sw_check_header(fdt)) != 0) \
-			return err; \
-	}
-
-static void *_fdt_grab_space(void *fdt, size_t len)
-{
-	int offset = fdt_size_dt_struct(fdt);
-	int spaceleft;
-
-	spaceleft = fdt_totalsize(fdt) - fdt_off_dt_struct(fdt)
-		- fdt_size_dt_strings(fdt);
-
-	if ((offset + len < offset) || (offset + len > spaceleft))
-		return NULL;
-
-	fdt_set_size_dt_struct(fdt, offset + len);
-	return _fdt_offset_ptr_w(fdt, offset);
-}
-
-int fdt_create(void *buf, int bufsize)
-{
-	void *fdt = buf;
-
-	if (bufsize < sizeof(struct fdt_header))
-		return -FDT_ERR_NOSPACE;
-
-	memset(buf, 0, bufsize);
-
-	fdt_set_magic(fdt, FDT_SW_MAGIC);
-	fdt_set_version(fdt, FDT_LAST_SUPPORTED_VERSION);
-	fdt_set_last_comp_version(fdt, FDT_FIRST_SUPPORTED_VERSION);
-	fdt_set_totalsize(fdt,  bufsize);
-
-	fdt_set_off_mem_rsvmap(fdt, FDT_ALIGN(sizeof(struct fdt_header),
-					      sizeof(struct fdt_reserve_entry)));
-	fdt_set_off_dt_struct(fdt, fdt_off_mem_rsvmap(fdt));
-	fdt_set_off_dt_strings(fdt, bufsize);
-
-	return 0;
-}
-
-int fdt_resize(void *fdt, void *buf, int bufsize)
-{
-	size_t headsize, tailsize;
-	char *oldtail, *newtail;
-
-	FDT_SW_CHECK_HEADER(fdt);
-
-	headsize = fdt_off_dt_struct(fdt);
-	tailsize = fdt_size_dt_strings(fdt);
-
-	if ((headsize + tailsize) > bufsize)
-		return -FDT_ERR_NOSPACE;
-
-	oldtail = (char *)fdt + fdt_totalsize(fdt) - tailsize;
-	newtail = (char *)buf + bufsize - tailsize;
-
-	/* Two cases to avoid clobbering data if the old and new
-	 * buffers partially overlap */
-	if (buf <= fdt) {
-		memmove(buf, fdt, headsize);
-		memmove(newtail, oldtail, tailsize);
-	} else {
-		memmove(newtail, oldtail, tailsize);
-		memmove(buf, fdt, headsize);
-	}
-
-	fdt_set_off_dt_strings(buf, bufsize);
-	fdt_set_totalsize(buf, bufsize);
-
-	return 0;
-}
-
-int fdt_add_reservemap_entry(void *fdt, uint64_t addr, uint64_t size)
-{
-	struct fdt_reserve_entry *re;
-	int offset;
-
-	FDT_SW_CHECK_HEADER(fdt);
-
-	if (fdt_size_dt_struct(fdt))
-		return -FDT_ERR_BADSTATE;
-
-	offset = fdt_off_dt_struct(fdt);
-	if ((offset + sizeof(*re)) > fdt_totalsize(fdt))
-		return -FDT_ERR_NOSPACE;
-
-	re = (struct fdt_reserve_entry *)((char *)fdt + offset);
-	re->address = cpu_to_fdt64(addr);
-	re->size = cpu_to_fdt64(size);
-
-	fdt_set_off_dt_struct(fdt, offset + sizeof(*re));
-
-	return 0;
-}
-
-int fdt_finish_reservemap(void *fdt)
-{
-	return fdt_add_reservemap_entry(fdt, 0, 0);
-}
-
-int fdt_begin_node(void *fdt, const char *name)
-{
-	struct fdt_node_header *nh;
-	int namelen = strlen(name) + 1;
-
-	FDT_SW_CHECK_HEADER(fdt);
-
-	nh = _fdt_grab_space(fdt, sizeof(*nh) + FDT_TAGALIGN(namelen));
-	if (! nh)
-		return -FDT_ERR_NOSPACE;
-
-	nh->tag = cpu_to_fdt32(FDT_BEGIN_NODE);
-	memcpy(nh->name, name, namelen);
-	return 0;
-}
-
-int fdt_end_node(void *fdt)
-{
-	fdt32_t *en;
-
-	FDT_SW_CHECK_HEADER(fdt);
-
-	en = _fdt_grab_space(fdt, FDT_TAGSIZE);
-	if (! en)
-		return -FDT_ERR_NOSPACE;
-
-	*en = cpu_to_fdt32(FDT_END_NODE);
-	return 0;
-}
-
-static int _fdt_find_add_string(void *fdt, const char *s)
-{
-	char *strtab = (char *)fdt + fdt_totalsize(fdt);
-	const char *p;
-	int strtabsize = fdt_size_dt_strings(fdt);
-	int len = strlen(s) + 1;
-	int struct_top, offset;
-
-	p = _fdt_find_string(strtab - strtabsize, strtabsize, s);
-	if (p)
-		return p - strtab;
-
-	/* Add it */
-	offset = -strtabsize - len;
-	struct_top = fdt_off_dt_struct(fdt) + fdt_size_dt_struct(fdt);
-	if (fdt_totalsize(fdt) + offset < struct_top)
-		return 0; /* no more room :( */
-
-	memcpy(strtab + offset, s, len);
-	fdt_set_size_dt_strings(fdt, strtabsize + len);
-	return offset;
-}
-
-int fdt_property_placeholder(void *fdt, const char *name, int len, void **valp)
-{
-	struct fdt_property *prop;
-	int nameoff;
-
-	FDT_SW_CHECK_HEADER(fdt);
-
-	nameoff = _fdt_find_add_string(fdt, name);
-	if (nameoff == 0)
-		return -FDT_ERR_NOSPACE;
-
-	prop = _fdt_grab_space(fdt, sizeof(*prop) + FDT_TAGALIGN(len));
-	if (! prop)
-		return -FDT_ERR_NOSPACE;
-
-	prop->tag = cpu_to_fdt32(FDT_PROP);
-	prop->nameoff = cpu_to_fdt32(nameoff);
-	prop->len = cpu_to_fdt32(len);
-	*valp = prop->data;
-	return 0;
-}
-
-int fdt_property(void *fdt, const char *name, const void *val, int len)
-{
-	void *ptr;
-	int ret;
-
-	ret = fdt_property_placeholder(fdt, name, len, &ptr);
-	if (ret)
-		return ret;
-	memcpy(ptr, val, len);
-	return 0;
-}
-
-int fdt_finish(void *fdt)
-{
-	char *p = (char *)fdt;
-	fdt32_t *end;
-	int oldstroffset, newstroffset;
-	uint32_t tag;
-	int offset, nextoffset;
-
-	FDT_SW_CHECK_HEADER(fdt);
-
-	/* Add terminator */
-	end = _fdt_grab_space(fdt, sizeof(*end));
-	if (! end)
-		return -FDT_ERR_NOSPACE;
-	*end = cpu_to_fdt32(FDT_END);
-
-	/* Relocate the string table */
-	oldstroffset = fdt_totalsize(fdt) - fdt_size_dt_strings(fdt);
-	newstroffset = fdt_off_dt_struct(fdt) + fdt_size_dt_struct(fdt);
-	memmove(p + newstroffset, p + oldstroffset, fdt_size_dt_strings(fdt));
-	fdt_set_off_dt_strings(fdt, newstroffset);
-
-	/* Walk the structure, correcting string offsets */
-	offset = 0;
-	while ((tag = fdt_next_tag(fdt, offset, &nextoffset)) != FDT_END) {
-		if (tag == FDT_PROP) {
-			struct fdt_property *prop =
-				_fdt_offset_ptr_w(fdt, offset);
-			int nameoff;
-
-			nameoff = fdt32_to_cpu(prop->nameoff);
-			nameoff += fdt_size_dt_strings(fdt);
-			prop->nameoff = cpu_to_fdt32(nameoff);
-		}
-		offset = nextoffset;
-	}
-	if (nextoffset < 0)
-		return nextoffset;
-
-	/* Finally, adjust the header */
-	fdt_set_totalsize(fdt, newstroffset + fdt_size_dt_strings(fdt));
-	fdt_set_magic(fdt, FDT_MAGIC);
-	return 0;
-}
+#include <linux/libfdt_env.h>
+#include "../../scripts/dtc/libfdt/fdt_sw.c"

commit d8b625e660642053cd8624c3d4b2ef0aa0f839b9
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Tue Oct 17 22:30:19 2017 +0900

    UPSTREAM: linux/types.h: add typedef of uintptr_t
    
    Add this typedef in the same place as in Linux.  This is necessary
    to refactor libfdt inclusion.
    
    U-Boot also defines it in include/compiler.h.  Of course it should
    not do that, but I do not want to open a can of worms.
    
    Change-Id: I9dfb66591cf520ed4e68168521b114af086fd860
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 1c4b453ad2a62d0243ae5fd6657f2d6b7eb7332d)

diff --git a/include/linux/types.h b/include/linux/types.h
index 416fa66284..7c33e7adbc 100644
--- a/include/linux/types.h
+++ b/include/linux/types.h
@@ -24,6 +24,8 @@ typedef __kernel_gid32_t	gid_t;
 typedef __kernel_uid16_t        uid16_t;
 typedef __kernel_gid16_t        gid16_t;
 
+typedef unsigned long		uintptr_t;
+
 #ifdef CONFIG_UID16
 /* This is defined by include/asm-{arch}/posix_types.h */
 typedef __kernel_old_uid_t	old_uid_t;

commit 141b078475e1ef81f7e80df6563619ee80cb3c7a
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Tue Oct 17 22:30:18 2017 +0900

    UPSTREAM: tools: use files from scripts/dtc/libfdt where possible
    
    Prior to this commit, tools/Makefile pulls all libfdt files from
    lib/libfdt.
    
    lib/libfdt/ and scripts/dtc/libfdt have the same copies for the
    followings 6 files:
      fdt.c fdt_addresses.c fdt_empty_tree.c fdt_overlay.c fdt_strerr.c
      fdt_sw.c
    
    This commit changes them to #include ones from scripts/dtc/libfdt.
    
    Unfortunately, U-Boot locally modified the following 3 files:
      fdt_ro.c fdt_wip.c fdt_rw.c
    
    I did not touch them in order to avoid unpredictable impact.
    
    The fdt_region.c is U-Boot own file.  This is also borrowed from
    lib/libfdt/.
    
    Change-Id: I3e8fcd9f84cda502a0eca504896ab29d7f840d16
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit b38ad663a4b4ccd91a43b12e2d65179dbd2b40cb)

diff --git a/tools/Makefile b/tools/Makefile
index 2e3274259d..1cf37bd5e1 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -58,12 +58,17 @@ hostprogs-y += dumpimage mkimage
 hostprogs-$(CONFIG_FIT_SIGNATURE) += fit_info fit_check_sign
 
 FIT_SIG_OBJS-$(CONFIG_FIT_SIGNATURE) := common/image-sig.o
-# Flattened device tree objects
-LIBFDT_CSRCS := fdt.c fdt_ro.c fdt_wip.c fdt_sw.c fdt_rw.c fdt_strerror.c  \
-			fdt_empty_tree.c fdt_addresses.c fdt_overlay.c \
-			fdt_region.c
 
-LIBFDT_OBJS := $(addprefix lib/libfdt/, $(patsubst %.c, %.o, $(LIBFDT_CSRCS)))
+# The following files are synced with upstream DTC.
+# Use synced versions from scripts/dtc/libfdt/.
+LIBFDT_SRCS_SYNCED := fdt.c fdt_sw.c fdt_strerror.c fdt_empty_tree.c \
+		      fdt_addresses.c fdt_overlay.c
+# The following files are locally modified for U-Boot (unfotunately).
+# Use U-Boot own versions from lib/libfdt/.
+LIBFDT_SRCS_UNSYNCED := fdt_ro.c fdt_wip.c fdt_rw.c fdt_region.c
+
+LIBFDT_OBJS := $(addprefix libfdt/, $(patsubst %.c, %.o, $(LIBFDT_SRCS_SYNCED))) \
+	       $(addprefix lib/libfdt/, $(patsubst %.c, %.o, $(LIBFDT_SRCS_UNSYNCED)))
 
 RSA_OBJS-$(CONFIG_FIT_SIGNATURE) := $(addprefix lib/rsa/, \
 					rsa-sign.o rsa-verify.o rsa-checksum.o \
diff --git a/tools/libfdt/fdt.c b/tools/libfdt/fdt.c
new file mode 100644
index 0000000000..8ba8091921
--- /dev/null
+++ b/tools/libfdt/fdt.c
@@ -0,0 +1,2 @@
+#include "fdt_host.h"
+#include "../scripts/dtc/libfdt/fdt.c"
diff --git a/tools/libfdt/fdt_addresses.c b/tools/libfdt/fdt_addresses.c
new file mode 100644
index 0000000000..242a2c083b
--- /dev/null
+++ b/tools/libfdt/fdt_addresses.c
@@ -0,0 +1,2 @@
+#include "fdt_host.h"
+#include "../scripts/dtc/libfdt/fdt_addresses.c"
diff --git a/tools/libfdt/fdt_empty_tree.c b/tools/libfdt/fdt_empty_tree.c
new file mode 100644
index 0000000000..9ccbb1f94e
--- /dev/null
+++ b/tools/libfdt/fdt_empty_tree.c
@@ -0,0 +1,2 @@
+#include "fdt_host.h"
+#include "../scripts/dtc/libfdt/fdt_empty_tree.c"
diff --git a/tools/libfdt/fdt_overlay.c b/tools/libfdt/fdt_overlay.c
new file mode 100644
index 0000000000..801ec374b1
--- /dev/null
+++ b/tools/libfdt/fdt_overlay.c
@@ -0,0 +1,2 @@
+#include "fdt_host.h"
+#include "../scripts/dtc/libfdt/fdt_overlay.c"
diff --git a/tools/libfdt/fdt_strerror.c b/tools/libfdt/fdt_strerror.c
new file mode 100644
index 0000000000..d7ed70bea4
--- /dev/null
+++ b/tools/libfdt/fdt_strerror.c
@@ -0,0 +1,2 @@
+#include "fdt_host.h"
+#include "../scripts/dtc/libfdt/fdt_strerror.c"
diff --git a/tools/libfdt/fdt_sw.c b/tools/libfdt/fdt_sw.c
new file mode 100644
index 0000000000..ed6b327573
--- /dev/null
+++ b/tools/libfdt/fdt_sw.c
@@ -0,0 +1,2 @@
+#include "fdt_host.h"
+#include "../scripts/dtc/libfdt/fdt_sw.c"

commit b63953bc21c4582a96a65a4d7ce4893849d50731
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Tue Oct 17 22:30:17 2017 +0900

    UPSTREAM: libfdt: change libfdt_internal.h to a wrapper of scripts/dtc/libfdt/*
    
    Fortunately, U-Boot did not modify libfdt_internal.h locally.
    
    Change it to a wrapper of scripts/dtc/libfdt/fdt.h, which will be
    periodically synced with the upstream DTC (or kernel).
    
    Change-Id: Ia9e6f3ca1f19a3cfe9f85b02ae792e85cf81798e
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 35a33baea59210924bceedabcfba794f0fed59dd)

diff --git a/lib/libfdt/libfdt_internal.h b/lib/libfdt/libfdt_internal.h
index 9a79fe85dd..5197c5d698 100644
--- a/lib/libfdt/libfdt_internal.h
+++ b/lib/libfdt/libfdt_internal.h
@@ -1,50 +1 @@
-#ifndef _LIBFDT_INTERNAL_H
-#define _LIBFDT_INTERNAL_H
-/*
- * libfdt - Flat Device Tree manipulation
- * Copyright (C) 2006 David Gibson, IBM Corporation.
- * SPDX-License-Identifier:	GPL-2.0+ BSD-2-Clause
- */
-#include <fdt.h>
-
-#define FDT_ALIGN(x, a)		(((x) + (a) - 1) & ~((a) - 1))
-#define FDT_TAGALIGN(x)		(FDT_ALIGN((x), FDT_TAGSIZE))
-
-#define FDT_CHECK_HEADER(fdt) \
-	{ \
-		int __err; \
-		if ((__err = fdt_check_header(fdt)) != 0) \
-			return __err; \
-	}
-
-int _fdt_check_node_offset(const void *fdt, int offset);
-int _fdt_check_prop_offset(const void *fdt, int offset);
-const char *_fdt_find_string(const char *strtab, int tabsize, const char *s);
-int _fdt_node_end_offset(void *fdt, int nodeoffset);
-
-static inline const void *_fdt_offset_ptr(const void *fdt, int offset)
-{
-	return (const char *)fdt + fdt_off_dt_struct(fdt) + offset;
-}
-
-static inline void *_fdt_offset_ptr_w(void *fdt, int offset)
-{
-	return (void *)(uintptr_t)_fdt_offset_ptr(fdt, offset);
-}
-
-static inline const struct fdt_reserve_entry *_fdt_mem_rsv(const void *fdt, int n)
-{
-	const struct fdt_reserve_entry *rsv_table =
-		(const struct fdt_reserve_entry *)
-		((const char *)fdt + fdt_off_mem_rsvmap(fdt));
-
-	return rsv_table + n;
-}
-static inline struct fdt_reserve_entry *_fdt_mem_rsv_w(void *fdt, int n)
-{
-	return (void *)(uintptr_t)_fdt_mem_rsv(fdt, n);
-}
-
-#define FDT_SW_MAGIC		(~FDT_MAGIC)
-
-#endif /* _LIBFDT_INTERNAL_H */
+#include "../../scripts/dtc/libfdt/libfdt_internal.h"

commit 81a2b0debed060533ca0a71475dc7bed6bf8c281
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Tue Oct 17 22:30:16 2017 +0900

    UPSTREAM: libfdt: change fdt.h to a wrapper of scripts/dtc/libfdt/*
    
    Fortunately, U-Boot did not modify fdt.h locally.
    
    Change it to a wrapper of scripts/dtc/libfdt/fdt.h, which will be
    periodically synced with the upstream DTC (or kernel).
    
    Change-Id: I3a40cb81ecacf189af3f04fe0b599628f70f81f9
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 9e65b01ac57f7be2bbc17c9f4c0ee43fab22221e)

diff --git a/include/fdt.h b/include/fdt.h
index f40b56c755..b97b3f2bcc 100644
--- a/include/fdt.h
+++ b/include/fdt.h
@@ -1 +1 @@
-#include "../lib/libfdt/fdt.h"
+#include "../scripts/dtc/libfdt/fdt.h"
diff --git a/lib/libfdt/fdt.h b/lib/libfdt/fdt.h
deleted file mode 100644
index 3134d78332..0000000000
--- a/lib/libfdt/fdt.h
+++ /dev/null
@@ -1,67 +0,0 @@
-#ifndef _FDT_H
-#define _FDT_H
-/*
- * libfdt - Flat Device Tree manipulation
- * Copyright (C) 2006 David Gibson, IBM Corporation.
- * Copyright 2012 Kim Phillips, Freescale Semiconductor.
- *
- * SPDX-License-Identifier:     GPL-2.0+ BSD-2-Clause
- */
-
-#ifndef __ASSEMBLY__
-
-struct fdt_header {
-	fdt32_t magic;			 /* magic word FDT_MAGIC */
-	fdt32_t totalsize;		 /* total size of DT block */
-	fdt32_t off_dt_struct;		 /* offset to structure */
-	fdt32_t off_dt_strings;		 /* offset to strings */
-	fdt32_t off_mem_rsvmap;		 /* offset to memory reserve map */
-	fdt32_t version;		 /* format version */
-	fdt32_t last_comp_version;	 /* last compatible version */
-
-	/* version 2 fields below */
-	fdt32_t boot_cpuid_phys;	 /* Which physical CPU id we're
-					    booting on */
-	/* version 3 fields below */
-	fdt32_t size_dt_strings;	 /* size of the strings block */
-
-	/* version 17 fields below */
-	fdt32_t size_dt_struct;		 /* size of the structure block */
-};
-
-struct fdt_reserve_entry {
-	fdt64_t address;
-	fdt64_t size;
-};
-
-struct fdt_node_header {
-	fdt32_t tag;
-	char name[0];
-};
-
-struct fdt_property {
-	fdt32_t tag;
-	fdt32_t len;
-	fdt32_t nameoff;
-	char data[0];
-};
-
-#endif /* !__ASSEMBLY */
-
-#define FDT_MAGIC	0xd00dfeed	/* 4: version, 4: total size */
-#define FDT_TAGSIZE	sizeof(fdt32_t)
-
-#define FDT_BEGIN_NODE	0x1		/* Start node: full name */
-#define FDT_END_NODE	0x2		/* End node */
-#define FDT_PROP	0x3		/* Property: name off,
-					   size, content */
-#define FDT_NOP		0x4		/* nop */
-#define FDT_END		0x9
-
-#define FDT_V1_SIZE	(7*sizeof(fdt32_t))
-#define FDT_V2_SIZE	(FDT_V1_SIZE + sizeof(fdt32_t))
-#define FDT_V3_SIZE	(FDT_V2_SIZE + sizeof(fdt32_t))
-#define FDT_V16_SIZE	FDT_V3_SIZE
-#define FDT_V17_SIZE	(FDT_V16_SIZE + sizeof(fdt32_t))
-
-#endif /* _FDT_H */

commit ec821af4a71361805387f2991a220375e4abe6b8
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Tue Oct 17 13:42:44 2017 +0900

    UPSTREAM: pylibfdt: compile pylibfdt only when dtoc/binman is necessary
    
    Currently, pylibfdt is always compiled if swig is installed on your
    machine.  It is really annoying because most of targets (excepts
    x86, sunxi, rockchip) do not use dtoc or binman.
    
    "checkbinman" and "checkdtoc" are wrong.  It is odd that the final
    build stage checks if we have built necessary tools.  If your platform
    depends on dtoc/binman, you must be able to build pylibfdt.  If swig
    is not installed, it should fail immediately.
    
    I added PYLIBFDT, DTOC, BINMAN entries to Kconfig.  They should be
    property select:ed by platforms that need them.  Kbuild will descend
    into scripts/dtc/pylibfdt/ only when CONFIG_PYLIBFDT is enabled.
    
    Change-Id: I56c5daf252e28d23fcaea0bc2d327a34de60cdcf
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit d6a0c78a4efb1353f4ec6f6c59c0771298510f58)

diff --git a/Makefile b/Makefile
index 0ef879fca3..2335d24752 100644
--- a/Makefile
+++ b/Makefile
@@ -1135,7 +1135,7 @@ cmd_ldr = $(LD) $(LDFLAGS_$(@F)) \
 
 u-boot.rom: u-boot-x86-16bit.bin u-boot.bin \
 		$(if $(CONFIG_SPL_X86_16BIT_INIT),spl/u-boot-spl.bin) \
-		$(if $(CONFIG_HAVE_REFCODE),refcode.bin) checkbinman FORCE
+		$(if $(CONFIG_HAVE_REFCODE),refcode.bin) FORCE
 	$(call if_changed,binman)
 
 OBJCOPYFLAGS_u-boot-x86-16bit.bin := -O binary -j .start16 -j .resetvec
@@ -1144,8 +1144,7 @@ u-boot-x86-16bit.bin: u-boot FORCE
 endif
 
 ifneq ($(CONFIG_ARCH_SUNXI),)
-u-boot-sunxi-with-spl.bin: spl/sunxi-spl.bin u-boot.img u-boot.dtb \
-		checkbinman FORCE
+u-boot-sunxi-with-spl.bin: spl/sunxi-spl.bin u-boot.img u-boot.dtb FORCE
 	$(call if_changed,binman)
 endif
 
@@ -1379,18 +1378,6 @@ $(version_h): include/config/uboot.release FORCE
 $(timestamp_h): $(srctree)/Makefile FORCE
 	$(call filechk,timestamp.h)
 
-checkbinman: tools
-	@if ! ( echo 'import libfdt' | ( PYTHONPATH=scripts/dtc/pylibfdt $(PYTHON) )); then \
-		echo >&2; \
-		echo >&2 '*** binman needs the Python libfdt library.'; \
-		echo >&2 '*** Either install it on your system, or try:'; \
-		echo >&2 '***'; \
-		echo >&2 '*** sudo apt-get install swig libpython-dev'; \
-		echo >&2 '***'; \
-		echo >&2 '*** to have U-Boot build its own version.'; \
-		false; \
-	fi
-
 # ---------------------------------------------------------------------------
 quiet_cmd_cpp_lds = LDS     $@
 cmd_cpp_lds = $(CPP) -Wp,-MD,$(depfile) $(cpp_flags) $(LDPPFLAGS) \
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 84462f3b6a..41df5ac641 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -702,6 +702,7 @@ config ARCH_SOCFPGA
 
 config ARCH_SUNXI
 	bool "Support sunxi (Allwinner) SoCs"
+	select BINMAN
 	select CMD_GPIO
 	select CMD_MMC if MMC
 	select CMD_USB if DISTRO_DEFAULTS
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 277c3babf3..f698c7072d 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -151,6 +151,7 @@ config SMM_TSEG_SIZE
 config X86_RESET_VECTOR
 	bool
 	default n
+	select BINMAN
 
 # The following options control where the 16-bit and 32-bit init lies
 # If SPL is enabled then it normally holds this init code, and U-Boot proper
diff --git a/dts/Kconfig b/dts/Kconfig
index daa757dd56..0cef225ba9 100644
--- a/dts/Kconfig
+++ b/dts/Kconfig
@@ -8,6 +8,17 @@ config SUPPORT_OF_CONTROL
 config DTC
 	bool
 
+config PYLIBFDT
+	bool
+
+config DTOC
+	bool
+	select PYLIBFDT
+
+config BINMAN
+	bool
+	select DTOC
+
 menu "Device Tree Control"
 	depends on SUPPORT_OF_CONTROL
 
@@ -231,6 +242,7 @@ config OF_SPL_REMOVE_PROPS
 config SPL_OF_PLATDATA
 	bool "Generate platform data for use in SPL"
 	depends on SPL_OF_CONTROL
+	select DTOC
 	help
 	  For very constrained SPL environments the overhead of decoding
 	  device tree nodes and converting their contents into platform data
@@ -252,6 +264,7 @@ config SPL_OF_PLATDATA
 config TPL_OF_PLATDATA
 	bool "Generate platform data for use in TPL"
 	depends on TPL_OF_CONTROL
+	select DTOC
 	help
 	  For very constrained SPL environments the overhead of decoding
 	  device tree nodes and converting their contents into platform data
diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index 065bb259d5..ca044767a0 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -276,10 +276,10 @@ PHONY += dts_dir
 dts_dir:
 	$(shell [ -d $(obj)/dts ] || mkdir -p $(obj)/dts)
 
-include/generated/dt-structs-gen.h: $(obj)/$(SPL_BIN).dtb dts_dir checkdtoc
+include/generated/dt-structs-gen.h: $(obj)/$(SPL_BIN).dtb dts_dir FORCE
 	$(call if_changed,dtoch)
 
-$(obj)/dts/dt-platdata.c: $(obj)/$(SPL_BIN).dtb dts_dir checkdtoc
+$(obj)/dts/dt-platdata.c: $(obj)/$(SPL_BIN).dtb dts_dir FORCE
 	$(call if_changed,dtocc)
 
 ifdef CONFIG_SAMSUNG
@@ -380,17 +380,6 @@ ifneq ($(cmd_files),)
   include $(cmd_files)
 endif
 
-checkdtoc: tools
-	@if ! ( echo 'import libfdt' | ( PYTHONPATH=scripts/dtc/pylibfdt $(PYTHON) )); then \
-		echo '*** dtoc needs the Python libfdt library. Either '; \
-		echo '*** install it on your system, or try:'; \
-		echo '***'; \
-		echo '*** sudo apt-get install swig libpython-dev'; \
-		echo '***'; \
-		echo '*** to have U-Boot build its own version.'; \
-		false; \
-	fi
-
 PHONY += FORCE
 FORCE:
 
diff --git a/scripts/dtc/Makefile b/scripts/dtc/Makefile
index f4a16ed2a5..90ef2db85c 100644
--- a/scripts/dtc/Makefile
+++ b/scripts/dtc/Makefile
@@ -31,4 +31,4 @@ $(obj)/dtc-lexer.lex.o: $(obj)/dtc-parser.tab.h
 clean-files	:= dtc-lexer.lex.c dtc-parser.tab.c dtc-parser.tab.h
 
 # Added for U-Boot
-subdir-y += pylibfdt
+subdir-$(CONFIG_PYLIBFDT) += pylibfdt

commit 815366520a3bc6d29a5aa94d316f2c3a396fd2df
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Tue Oct 17 13:42:43 2017 +0900

    UPSTREAM: pylibfdt: move pylibfdt to scripts/dtc/pylibfdt and refactor makefile
    
    The pylibfdt is used by dtoc (and, indirectly by binman), but there
    is no reason why it must be generated in the tools/ directory.
    
    Recently, U-Boot switched over to the bundled DTC, and the directory
    structure under scripts/dtc/ now mirrors the upstream DTC project.
    So, scripts/dtc/pylibfdt is the best location.
    
    I also rewrote the Makefile in a cleaner Kbuild style.
    
    The scripts from the upstream have been moved as follows:
    
      lib/libfdt/pylibfdt/setup.py -> scripts/dtc/pylibfdt/setup.py
      lib/libfdt/pylibfdt/libfdt.i -> scripts/dtc/pylibfdt/libfdt.i_shipped
    
    The .i_shipped is coped to .i during building because the .i must be
    located in the objtree when we build it out of tree.
    
    Change-Id: I48233cbae93794809397b7160234469f66fa11dc
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 15b97f5c5e6d88e0560c6928f3acd01c999a494d)

diff --git a/Makefile b/Makefile
index 6a92e3b60d..0ef879fca3 100644
--- a/Makefile
+++ b/Makefile
@@ -1380,7 +1380,7 @@ $(timestamp_h): $(srctree)/Makefile FORCE
 	$(call filechk,timestamp.h)
 
 checkbinman: tools
-	@if ! ( echo 'import libfdt' | ( PYTHONPATH=tools $(PYTHON) )); then \
+	@if ! ( echo 'import libfdt' | ( PYTHONPATH=scripts/dtc/pylibfdt $(PYTHON) )); then \
 		echo >&2; \
 		echo >&2 '*** binman needs the Python libfdt library.'; \
 		echo >&2 '*** Either install it on your system, or try:'; \
diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index 49b27ac926..065bb259d5 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -257,7 +257,7 @@ quiet_cmd_fdtgrep = FDTGREP $@
 $(obj)/$(SPL_BIN).dtb: dts/dt.dtb $(objtree)/tools/fdtgrep FORCE
 	$(call if_changed,fdtgrep)
 
-pythonpath = PYTHONPATH=tools
+pythonpath = PYTHONPATH=scripts/dtc/pylibfdt
 
 quiet_cmd_dtocc = DTOC C  $@
 cmd_dtocc = $(pythonpath) $(srctree)/tools/dtoc/dtoc -d $(obj)/$(SPL_BIN).dtb -o $@ platdata
@@ -381,7 +381,7 @@ ifneq ($(cmd_files),)
 endif
 
 checkdtoc: tools
-	@if ! ( echo 'import libfdt' | ( PYTHONPATH=tools $(PYTHON) )); then \
+	@if ! ( echo 'import libfdt' | ( PYTHONPATH=scripts/dtc/pylibfdt $(PYTHON) )); then \
 		echo '*** dtoc needs the Python libfdt library. Either '; \
 		echo '*** install it on your system, or try:'; \
 		echo '***'; \
diff --git a/scripts/dtc/Makefile b/scripts/dtc/Makefile
index 2a48022c41..f4a16ed2a5 100644
--- a/scripts/dtc/Makefile
+++ b/scripts/dtc/Makefile
@@ -29,3 +29,6 @@ $(obj)/dtc-lexer.lex.o: $(obj)/dtc-parser.tab.h
 
 # generated files need to be cleaned explicitly
 clean-files	:= dtc-lexer.lex.c dtc-parser.tab.c dtc-parser.tab.h
+
+# Added for U-Boot
+subdir-y += pylibfdt
diff --git a/scripts/dtc/pylibfdt/.gitignore b/scripts/dtc/pylibfdt/.gitignore
new file mode 100644
index 0000000000..033f23dfdd
--- /dev/null
+++ b/scripts/dtc/pylibfdt/.gitignore
@@ -0,0 +1,4 @@
+/_libfdt.so
+/libfdt.py
+/libfdt.pyc
+/libfdt_wrap.c
diff --git a/scripts/dtc/pylibfdt/Makefile b/scripts/dtc/pylibfdt/Makefile
new file mode 100644
index 0000000000..01d5e0ffe3
--- /dev/null
+++ b/scripts/dtc/pylibfdt/Makefile
@@ -0,0 +1,30 @@
+# Unfortunately setup.py below cannot handle srctree being ".." which it often
+# is. It fails with an error like:
+# Fatal error: can't create build/temp.linux-x86_64-2.7/../lib/libfdt/fdt.o:
+#    No such file or directory
+# To fix this, use an absolute path.
+LIBFDT_srcdir = $(abspath $(srctree)/$(src)/../libfdt)
+
+include $(LIBFDT_srcdir)/Makefile.libfdt
+
+# Unfortunately setup.py (or actually the Python distutil implementation) puts
+# files into the same directory as the .i file. We cannot touch the source
+# directory, so we "ship" .i file into the objtree.
+PYLIBFDT_srcs = $(addprefix $(LIBFDT_srcdir)/,$(LIBFDT_SRCS)) \
+		$(obj)/libfdt.i
+
+quiet_cmd_pymod = PYMOD   $@
+      cmd_pymod = unset CC; unset CROSS_COMPILE; unset CFLAGS;\
+		LDFLAGS="$(HOSTLDFLAGS)" \
+		VERSION="u-boot-$(UBOOTVERSION)" \
+		CPPFLAGS="$(HOSTCFLAGS) -I$(LIBFDT_srcdir)" OBJDIR=$(obj) \
+		SOURCES="$(PYLIBFDT_srcs)" \
+		SWIG_OPTS="-I$(LIBFDT_srcdir) -I$(LIBFDT_srcdir)/.." \
+		$(PYTHON) $< --quiet build_ext --inplace
+
+$(obj)/_libfdt.so: $(src)/setup.py $(PYLIBFDT_srcs) FORCE
+	$(call if_changed,pymod)
+
+always += _libfdt.so
+
+clean-files += libfdt.i _libfdt.so libfdt.py libfdt_wrap.c
diff --git a/lib/libfdt/pylibfdt/libfdt.i b/scripts/dtc/pylibfdt/libfdt.i_shipped
similarity index 100%
rename from lib/libfdt/pylibfdt/libfdt.i
rename to scripts/dtc/pylibfdt/libfdt.i_shipped
diff --git a/lib/libfdt/pylibfdt/setup.py b/scripts/dtc/pylibfdt/setup.py
similarity index 100%
rename from lib/libfdt/pylibfdt/setup.py
rename to scripts/dtc/pylibfdt/setup.py
diff --git a/tools/.gitignore b/tools/.gitignore
index 5293d44697..6a487d2202 100644
--- a/tools/.gitignore
+++ b/tools/.gitignore
@@ -1,4 +1,3 @@
-/_libfdt.so
 /atmel_pmecc_params
 /bin2header
 /bmp_logo
@@ -17,9 +16,6 @@
 /img2srec
 /kwboot
 /lib/
-/libfdt.py
-/libfdt.pyc
-/libfdt_wrap.c
 /mips-relocs
 /mkenvimage
 /mkexynosspl
diff --git a/tools/Makefile b/tools/Makefile
index 1bc4148163..2e3274259d 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -63,15 +63,6 @@ LIBFDT_CSRCS := fdt.c fdt_ro.c fdt_wip.c fdt_sw.c fdt_rw.c fdt_strerror.c  \
 			fdt_empty_tree.c fdt_addresses.c fdt_overlay.c \
 			fdt_region.c
 
-# Unfortunately setup.py below cannot handle srctree being ".." which it often
-# is. It fails with an error like:
-# Fatal error: can't create build/temp.linux-x86_64-2.7/../lib/libfdt/fdt.o:
-#    No such file or directory
-# To fix this, use an absolute path.
-libfdt_tree := $(shell readlink -f $(srctree)/lib/libfdt)
-
-LIBFDT_SRCS := $(addprefix $(libfdt_tree)/, $(LIBFDT_CSRCS))
-LIBFDT_SWIG := $(addprefix $(libfdt_tree)/, pylibfdt/libfdt.i)
 LIBFDT_OBJS := $(addprefix lib/libfdt/, $(patsubst %.c, %.o, $(LIBFDT_CSRCS)))
 
 RSA_OBJS-$(CONFIG_FIT_SIGNATURE) := $(addprefix lib/rsa/, \
@@ -123,23 +114,6 @@ mkimage-objs   := $(dumpimage-mkimage-objs) mkimage.o
 fit_info-objs   := $(dumpimage-mkimage-objs) fit_info.o
 fit_check_sign-objs   := $(dumpimage-mkimage-objs) fit_check_sign.o
 
-# Unfortunately setup.py (or actually the Python distutil implementation)
-# puts files into the same directory as the .i file. We cannot touch the source
-# directory, so we copy the .i file into the tools/ build subdirectory before
-# calling setup. This directory is safe to write to. This ensures that we get
-# all three files in $(obj)/tools: _libfdt.so, libfdt.py and libfdt_wrap.c
-# The latter is a temporary file which we could actually remove.
-tools/_libfdt.so: $(LIBFDT_SRCS) $(LIBFDT_SWIG)
-	$(Q)cp $(LIBFDT_SWIG) tools/.
-	$(Q)unset CC; \
-	unset CROSS_COMPILE; \
-	LDFLAGS="$(HOSTLDFLAGS)" CFLAGS= VERSION="u-boot-$(UBOOTVERSION)" \
-		CPPFLAGS="$(_hostc_flags)" OBJDIR=tools \
-		SOURCES="$(LIBFDT_SRCS) tools/libfdt.i" \
-		SWIG_OPTS="-I$(srctree)/lib/libfdt -I$(srctree)/lib" \
-		$(PYTHON) $(libfdt_tree)/pylibfdt/setup.py --quiet build_ext \
-			--build-lib tools
-
 ifneq ($(CONFIG_MX23)$(CONFIG_MX28),)
 # Add CONFIG_MXS into host CFLAGS, so we can check whether or not register
 # the mxsimage support within tools/mxsimage.c .
@@ -231,10 +205,6 @@ clean-dirs := lib common
 
 always := $(hostprogs-y)
 
-# Build a libfdt Python module if swig is available
-# Use 'sudo apt-get install swig libpython-dev' to enable this
-always += $(if $(shell which swig 2> /dev/null),_libfdt.so)
-
 # Generated LCD/video logo
 LOGO_H = $(objtree)/include/bmp_logo.h
 LOGO_DATA_H = $(objtree)/include/bmp_logo_data.h
diff --git a/tools/binman/binman.py b/tools/binman/binman.py
index 09dc36a3f7..e75a59d951 100755
--- a/tools/binman/binman.py
+++ b/tools/binman/binman.py
@@ -21,7 +21,7 @@ for dirname in ['../patman', '../dtoc', '..']:
     sys.path.insert(0, os.path.join(our_path, dirname))
 
 # Bring in the libfdt module
-sys.path.insert(0, 'tools')
+sys.path.insert(0, 'scripts/dtc/pylibfdt')
 
 # Also allow entry-type modules to be brought in from the etype directory.
 sys.path.insert(0, os.path.join(our_path, 'etype'))

commit 14df9b242f1aeec4707933666e9581796e2e1597
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Tue Oct 17 13:42:42 2017 +0900

    UPSTREAM: scripts/dtc: Update to upstream version v1.4.5-3-gb1a60033c110
    
    This adds the following commits from upstream:
    
    b1a6003 tests: Add a test for overlays syntactic sugar
    737b2df overlay: Add syntactic sugar version of overlays
    497432f checks: Use proper format modifier for size_t
    22a65c5 dtc: Bump version to v1.4.5
    c575d80 Add fdtoverlay to .gitignore
    b6a6f94 fdtoverlay: Sanity check blob size
    8c1eb15 pylibfdt: Use Python2 explicitly
    ee3d26f checks: add interrupts property check
    c1e7738 checks: add gpio binding properties check
    b3bbac0 checks: add phandle with arg property checks
    
    [ sync with Linux commit: 4201d057ea91c3d6efd2db65219bc91fae413bc2 ]
    
    Change-Id: I58c014073977530e43a5a67acf0c2e681ae27b0c
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 999a78d5cf00dfb8cd8342454933ea492e955377)

diff --git a/scripts/dtc/checks.c b/scripts/dtc/checks.c
index afabf64337..08a3a29eda 100644
--- a/scripts/dtc/checks.c
+++ b/scripts/dtc/checks.c
@@ -956,6 +956,265 @@ static void check_obsolete_chosen_interrupt_controller(struct check *c,
 WARNING(obsolete_chosen_interrupt_controller,
 	check_obsolete_chosen_interrupt_controller, NULL);
 
+struct provider {
+	const char *prop_name;
+	const char *cell_name;
+	bool optional;
+};
+
+static void check_property_phandle_args(struct check *c,
+					  struct dt_info *dti,
+				          struct node *node,
+				          struct property *prop,
+				          const struct provider *provider)
+{
+	struct node *root = dti->dt;
+	int cell, cellsize = 0;
+
+	if (prop->val.len % sizeof(cell_t)) {
+		FAIL(c, dti, "property '%s' size (%d) is invalid, expected multiple of %zu in node %s",
+		     prop->name, prop->val.len, sizeof(cell_t), node->fullpath);
+		return;
+	}
+
+	for (cell = 0; cell < prop->val.len / sizeof(cell_t); cell += cellsize + 1) {
+		struct node *provider_node;
+		struct property *cellprop;
+		int phandle;
+
+		phandle = propval_cell_n(prop, cell);
+		/*
+		 * Some bindings use a cell value 0 or -1 to skip over optional
+		 * entries when each index position has a specific definition.
+		 */
+		if (phandle == 0 || phandle == -1) {
+			cellsize = 0;
+			continue;
+		}
+
+		/* If we have markers, verify the current cell is a phandle */
+		if (prop->val.markers) {
+			struct marker *m = prop->val.markers;
+			for_each_marker_of_type(m, REF_PHANDLE) {
+				if (m->offset == (cell * sizeof(cell_t)))
+					break;
+			}
+			if (!m)
+				FAIL(c, dti, "Property '%s', cell %d is not a phandle reference in %s",
+				     prop->name, cell, node->fullpath);
+		}
+
+		provider_node = get_node_by_phandle(root, phandle);
+		if (!provider_node) {
+			FAIL(c, dti, "Could not get phandle node for %s:%s(cell %d)",
+			     node->fullpath, prop->name, cell);
+			break;
+		}
+
+		cellprop = get_property(provider_node, provider->cell_name);
+		if (cellprop) {
+			cellsize = propval_cell(cellprop);
+		} else if (provider->optional) {
+			cellsize = 0;
+		} else {
+			FAIL(c, dti, "Missing property '%s' in node %s or bad phandle (referred from %s:%s[%d])",
+			     provider->cell_name,
+			     provider_node->fullpath,
+			     node->fullpath, prop->name, cell);
+			break;
+		}
+
+		if (prop->val.len < ((cell + cellsize + 1) * sizeof(cell_t))) {
+			FAIL(c, dti, "%s property size (%d) too small for cell size %d in %s",
+			     prop->name, prop->val.len, cellsize, node->fullpath);
+		}
+	}
+}
+
+static void check_provider_cells_property(struct check *c,
+					  struct dt_info *dti,
+				          struct node *node)
+{
+	struct provider *provider = c->data;
+	struct property *prop;
+
+	prop = get_property(node, provider->prop_name);
+	if (!prop)
+		return;
+
+	check_property_phandle_args(c, dti, node, prop, provider);
+}
+#define WARNING_PROPERTY_PHANDLE_CELLS(nm, propname, cells_name, ...) \
+	static struct provider nm##_provider = { (propname), (cells_name), __VA_ARGS__ }; \
+	WARNING(nm##_property, check_provider_cells_property, &nm##_provider, &phandle_references);
+
+WARNING_PROPERTY_PHANDLE_CELLS(clocks, "clocks", "#clock-cells");
+WARNING_PROPERTY_PHANDLE_CELLS(cooling_device, "cooling-device", "#cooling-cells");
+WARNING_PROPERTY_PHANDLE_CELLS(dmas, "dmas", "#dma-cells");
+WARNING_PROPERTY_PHANDLE_CELLS(hwlocks, "hwlocks", "#hwlock-cells");
+WARNING_PROPERTY_PHANDLE_CELLS(interrupts_extended, "interrupts-extended", "#interrupt-cells");
+WARNING_PROPERTY_PHANDLE_CELLS(io_channels, "io-channels", "#io-channel-cells");
+WARNING_PROPERTY_PHANDLE_CELLS(iommus, "iommus", "#iommu-cells");
+WARNING_PROPERTY_PHANDLE_CELLS(mboxes, "mboxes", "#mbox-cells");
+WARNING_PROPERTY_PHANDLE_CELLS(msi_parent, "msi-parent", "#msi-cells", true);
+WARNING_PROPERTY_PHANDLE_CELLS(mux_controls, "mux-controls", "#mux-control-cells");
+WARNING_PROPERTY_PHANDLE_CELLS(phys, "phys", "#phy-cells");
+WARNING_PROPERTY_PHANDLE_CELLS(power_domains, "power-domains", "#power-domain-cells");
+WARNING_PROPERTY_PHANDLE_CELLS(pwms, "pwms", "#pwm-cells");
+WARNING_PROPERTY_PHANDLE_CELLS(resets, "resets", "#reset-cells");
+WARNING_PROPERTY_PHANDLE_CELLS(sound_dais, "sound-dais", "#sound-dai-cells");
+WARNING_PROPERTY_PHANDLE_CELLS(thermal_sensors, "thermal-sensors", "#thermal-sensor-cells");
+
+static bool prop_is_gpio(struct property *prop)
+{
+	char *str;
+
+	/*
+	 * *-gpios and *-gpio can appear in property names,
+	 * so skip over any false matches (only one known ATM)
+	 */
+	if (strstr(prop->name, "nr-gpio"))
+		return false;
+
+	str = strrchr(prop->name, '-');
+	if (str)
+		str++;
+	else
+		str = prop->name;
+	if (!(streq(str, "gpios") || streq(str, "gpio")))
+		return false;
+
+	return true;
+}
+
+static void check_gpios_property(struct check *c,
+					  struct dt_info *dti,
+				          struct node *node)
+{
+	struct property *prop;
+
+	/* Skip GPIO hog nodes which have 'gpios' property */
+	if (get_property(node, "gpio-hog"))
+		return;
+
+	for_each_property(node, prop) {
+		struct provider provider;
+
+		if (!prop_is_gpio(prop))
+			continue;
+
+		provider.prop_name = prop->name;
+		provider.cell_name = "#gpio-cells";
+		provider.optional = false;
+		check_property_phandle_args(c, dti, node, prop, &provider);
+	}
+
+}
+WARNING(gpios_property, check_gpios_property, NULL, &phandle_references);
+
+static void check_deprecated_gpio_property(struct check *c,
+					   struct dt_info *dti,
+				           struct node *node)
+{
+	struct property *prop;
+
+	for_each_property(node, prop) {
+		char *str;
+
+		if (!prop_is_gpio(prop))
+			continue;
+
+		str = strstr(prop->name, "gpio");
+		if (!streq(str, "gpio"))
+			continue;
+
+		FAIL(c, dti, "'[*-]gpio' is deprecated, use '[*-]gpios' instead for %s:%s",
+		     node->fullpath, prop->name);
+	}
+
+}
+CHECK(deprecated_gpio_property, check_deprecated_gpio_property, NULL);
+
+static bool node_is_interrupt_provider(struct node *node)
+{
+	struct property *prop;
+
+	prop = get_property(node, "interrupt-controller");
+	if (prop)
+		return true;
+
+	prop = get_property(node, "interrupt-map");
+	if (prop)
+		return true;
+
+	return false;
+}
+static void check_interrupts_property(struct check *c,
+				      struct dt_info *dti,
+				      struct node *node)
+{
+	struct node *root = dti->dt;
+	struct node *irq_node = NULL, *parent = node;
+	struct property *irq_prop, *prop = NULL;
+	int irq_cells, phandle;
+
+	irq_prop = get_property(node, "interrupts");
+	if (!irq_prop)
+		return;
+
+	if (irq_prop->val.len % sizeof(cell_t))
+		FAIL(c, dti, "property '%s' size (%d) is invalid, expected multiple of %zu in node %s",
+		     irq_prop->name, irq_prop->val.len, sizeof(cell_t),
+		     node->fullpath);
+
+	while (parent && !prop) {
+		if (parent != node && node_is_interrupt_provider(parent)) {
+			irq_node = parent;
+			break;
+		}
+
+		prop = get_property(parent, "interrupt-parent");
+		if (prop) {
+			phandle = propval_cell(prop);
+			irq_node = get_node_by_phandle(root, phandle);
+			if (!irq_node) {
+				FAIL(c, dti, "Bad interrupt-parent phandle for %s",
+				     node->fullpath);
+				return;
+			}
+			if (!node_is_interrupt_provider(irq_node))
+				FAIL(c, dti,
+				     "Missing interrupt-controller or interrupt-map property in %s",
+				     irq_node->fullpath);
+
+			break;
+		}
+
+		parent = parent->parent;
+	}
+
+	if (!irq_node) {
+		FAIL(c, dti, "Missing interrupt-parent for %s", node->fullpath);
+		return;
+	}
+
+	prop = get_property(irq_node, "#interrupt-cells");
+	if (!prop) {
+		FAIL(c, dti, "Missing #interrupt-cells in interrupt-parent %s",
+		     irq_node->fullpath);
+		return;
+	}
+
+	irq_cells = propval_cell(prop);
+	if (irq_prop->val.len % (irq_cells * sizeof(cell_t))) {
+		FAIL(c, dti,
+		     "interrupts size is (%d), expected multiple of %d in %s",
+		     irq_prop->val.len, (int)(irq_cells * sizeof(cell_t)),
+		     node->fullpath);
+	}
+}
+WARNING(interrupts_property, check_interrupts_property, &phandle_references);
+
 static struct check *check_table[] = {
 	&duplicate_node_names, &duplicate_property_names,
 	&node_name_chars, &node_name_format, &property_name_chars,
@@ -987,6 +1246,27 @@ static struct check *check_table[] = {
 	&avoid_default_addr_size,
 	&obsolete_chosen_interrupt_controller,
 
+	&clocks_property,
+	&cooling_device_property,
+	&dmas_property,
+	&hwlocks_property,
+	&interrupts_extended_property,
+	&io_channels_property,
+	&iommus_property,
+	&mboxes_property,
+	&msi_parent_property,
+	&mux_controls_property,
+	&phys_property,
+	&power_domains_property,
+	&pwms_property,
+	&resets_property,
+	&sound_dais_property,
+	&thermal_sensors_property,
+
+	&deprecated_gpio_property,
+	&gpios_property,
+	&interrupts_property,
+
 	&always_fail,
 };
 
diff --git a/scripts/dtc/dtc-lexer.lex.c_shipped b/scripts/dtc/dtc-lexer.lex.c_shipped
index 3934d8624d..011bb9632f 100644
--- a/scripts/dtc/dtc-lexer.lex.c_shipped
+++ b/scripts/dtc/dtc-lexer.lex.c_shipped
@@ -8,8 +8,8 @@
 
 #define FLEX_SCANNER
 #define YY_FLEX_MAJOR_VERSION 2
-#define YY_FLEX_MINOR_VERSION 5
-#define YY_FLEX_SUBMINOR_VERSION 35
+#define YY_FLEX_MINOR_VERSION 6
+#define YY_FLEX_SUBMINOR_VERSION 1
 #if YY_FLEX_SUBMINOR_VERSION > 0
 #define FLEX_BETA
 #endif
@@ -88,25 +88,13 @@ typedef unsigned int flex_uint32_t;
 
 #endif /* ! FLEXINT_H */
 
-#ifdef __cplusplus
-
-/* The "const" storage-class-modifier is valid. */
-#define YY_USE_CONST
-
-#else	/* ! __cplusplus */
-
-/* C99 requires __STDC__ to be defined as 1. */
-#if defined (__STDC__)
-
-#define YY_USE_CONST
-
-#endif	/* defined (__STDC__) */
-#endif	/* ! __cplusplus */
-
-#ifdef YY_USE_CONST
+/* TODO: this is always defined, so inline it */
 #define yyconst const
+
+#if defined(__GNUC__) && __GNUC__ >= 3
+#define yynoreturn __attribute__((__noreturn__))
 #else
-#define yyconst
+#define yynoreturn
 #endif
 
 /* Returned upon end-of-file. */
@@ -162,6 +150,11 @@ typedef unsigned int flex_uint32_t;
 typedef struct yy_buffer_state *YY_BUFFER_STATE;
 #endif
 
+#ifndef YY_TYPEDEF_YY_SIZE_T
+#define YY_TYPEDEF_YY_SIZE_T
+typedef size_t yy_size_t;
+#endif
+
 extern int yyleng;
 
 extern FILE *yyin, *yyout;
@@ -171,6 +164,7 @@ extern FILE *yyin, *yyout;
 #define EOB_ACT_LAST_MATCH 2
 
     #define YY_LESS_LINENO(n)
+    #define YY_LINENO_REWIND_TO(ptr)
     
 /* Return all but the first "n" matched characters back to the input stream. */
 #define yyless(n) \
@@ -188,11 +182,6 @@ extern FILE *yyin, *yyout;
 
 #define unput(c) yyunput( c, (yytext_ptr)  )
 
-#ifndef YY_TYPEDEF_YY_SIZE_T
-#define YY_TYPEDEF_YY_SIZE_T
-typedef size_t yy_size_t;
-#endif
-
 #ifndef YY_STRUCT_YY_BUFFER_STATE
 #define YY_STRUCT_YY_BUFFER_STATE
 struct yy_buffer_state
@@ -205,7 +194,7 @@ struct yy_buffer_state
 	/* Size of input buffer in bytes, not including room for EOB
 	 * characters.
 	 */
-	yy_size_t yy_buf_size;
+	int yy_buf_size;
 
 	/* Number of characters read into yy_ch_buf, not including EOB
 	 * characters.
@@ -233,7 +222,7 @@ struct yy_buffer_state
 
     int yy_bs_lineno; /**< The line count. */
     int yy_bs_column; /**< The column count. */
-    
+
 	/* Whether to try to fill the input buffer when we reach the
 	 * end of it.
 	 */
@@ -261,7 +250,7 @@ struct yy_buffer_state
 /* Stack of input buffers. */
 static size_t yy_buffer_stack_top = 0; /**< index of top of stack. */
 static size_t yy_buffer_stack_max = 0; /**< capacity of stack. */
-static YY_BUFFER_STATE * yy_buffer_stack = 0; /**< Stack as an array. */
+static YY_BUFFER_STATE * yy_buffer_stack = NULL; /**< Stack as an array. */
 
 /* We provide macros for accessing buffer states in case in the
  * future we want to put the buffer states in a more general
@@ -284,7 +273,7 @@ static int yy_n_chars;		/* number of characters read into yy_ch_buf */
 int yyleng;
 
 /* Points to current character in buffer. */
-static char *yy_c_buf_p = (char *) 0;
+static char *yy_c_buf_p = NULL;
 static int yy_init = 0;		/* whether we need to initialize */
 static int yy_start = 0;	/* start state number */
 
@@ -341,12 +330,12 @@ void yyfree (void *  );
 
 /* Begin user sect3 */
 
-#define yywrap(n) 1
+#define yywrap() (/*CONSTCOND*/1)
 #define YY_SKIP_YYWRAP
 
 typedef unsigned char YY_CHAR;
 
-FILE *yyin = (FILE *) 0, *yyout = (FILE *) 0;
+FILE *yyin = NULL, *yyout = NULL;
 
 typedef int yy_state_type;
 
@@ -355,19 +344,22 @@ extern int yylineno;
 int yylineno = 1;
 
 extern char *yytext;
+#ifdef yytext_ptr
+#undef yytext_ptr
+#endif
 #define yytext_ptr yytext
 
 static yy_state_type yy_get_previous_state (void );
 static yy_state_type yy_try_NUL_trans (yy_state_type current_state  );
 static int yy_get_next_buffer (void );
-static void yy_fatal_error (yyconst char msg[]  );
+static void yynoreturn yy_fatal_error (yyconst char* msg  );
 
 /* Done after the current pattern has been matched and before the
  * corresponding action - sets up yytext.
  */
 #define YY_DO_BEFORE_ACTION \
 	(yytext_ptr) = yy_bp; \
-	yyleng = (size_t) (yy_cp - yy_bp); \
+	yyleng = (int) (yy_cp - yy_bp); \
 	(yy_hold_char) = *yy_cp; \
 	*yy_cp = '\0'; \
 	(yy_c_buf_p) = yy_cp;
@@ -403,7 +395,7 @@ static yyconst flex_int16_t yy_accept[166] =
         0,    0,    0,    8,    0
     } ;
 
-static yyconst flex_int32_t yy_ec[256] =
+static yyconst YY_CHAR yy_ec[256] =
     {   0,
         1,    1,    1,    1,    1,    1,    1,    1,    2,    3,
         4,    4,    4,    1,    1,    1,    1,    1,    1,    1,
@@ -435,7 +427,7 @@ static yyconst flex_int32_t yy_ec[256] =
         1,    1,    1,    1,    1
     } ;
 
-static yyconst flex_int32_t yy_meta[48] =
+static yyconst YY_CHAR yy_meta[48] =
     {   0,
         1,    1,    1,    1,    1,    1,    2,    3,    1,    2,
         2,    2,    4,    5,    5,    5,    6,    1,    1,    1,
@@ -444,7 +436,7 @@ static yyconst flex_int32_t yy_meta[48] =
         8,    8,    8,    8,    3,    1,    4
     } ;
 
-static yyconst flex_int16_t yy_base[180] =
+static yyconst flex_uint16_t yy_base[180] =
     {   0,
         0,  393,   35,  392,   66,  391,   38,  107,  397,  401,
        55,  113,  377,  112,  111,  111,  114,   42,  376,  106,
@@ -490,7 +482,7 @@ static yyconst flex_int16_t yy_def[180] =
       165,  165,  165,  165,  165,  165,  165,  165,  165
     } ;
 
-static yyconst flex_int16_t yy_nxt[449] =
+static yyconst flex_uint16_t yy_nxt[449] =
     {   0,
        10,   11,   12,   11,   13,   14,   10,   15,   16,   10,
        10,   10,   17,   10,   10,   10,   10,   18,   19,   20,
@@ -665,7 +657,7 @@ static void push_input_file(const char *filename);
 static bool pop_input_file(void);
 static void PRINTF(1, 2) lexical_error(const char *fmt, ...);
 
-#line 669 "dtc-lexer.lex.c"
+#line 661 "dtc-lexer.lex.c"
 
 #define INITIAL 0
 #define BYTESTRING 1
@@ -701,19 +693,19 @@ void yyset_extra (YY_EXTRA_TYPE user_defined  );
 
 FILE *yyget_in (void );
 
-void yyset_in  (FILE * in_str  );
+void yyset_in  (FILE * _in_str  );
 
 FILE *yyget_out (void );
 
-void yyset_out  (FILE * out_str  );
+void yyset_out  (FILE * _out_str  );
 
-int yyget_leng (void );
+			int yyget_leng (void );
 
 char *yyget_text (void );
 
 int yyget_lineno (void );
 
-void yyset_lineno (int line_number  );
+void yyset_lineno (int _line_number  );
 
 /* Macros after this point can all be overridden by user definitions in
  * section 1.
@@ -727,6 +719,10 @@ extern int yywrap (void );
 #endif
 #endif
 
+#ifndef YY_NO_UNPUT
+    
+#endif
+
 #ifndef yytext_ptr
 static void yy_flex_strncpy (char *,yyconst char *,int );
 #endif
@@ -760,7 +756,7 @@ static int input (void );
 /* This used to be an fputs(), but since the string might contain NUL's,
  * we now use fwrite().
  */
-#define ECHO do { if (fwrite( yytext, yyleng, 1, yyout )) {} } while (0)
+#define ECHO do { if (fwrite( yytext, (size_t) yyleng, 1, yyout )) {} } while (0)
 #endif
 
 /* Gets input and stuffs it into "buf".  number of characters read, or YY_NULL,
@@ -784,7 +780,7 @@ static int input (void );
 	else \
 		{ \
 		errno=0; \
-		while ( (result = fread(buf, 1, max_size, yyin))==0 && ferror(yyin)) \
+		while ( (result = (int) fread(buf, 1, max_size, yyin))==0 && ferror(yyin)) \
 			{ \
 			if( errno != EINTR) \
 				{ \
@@ -839,7 +835,7 @@ extern int yylex (void);
 
 /* Code executed at the end of each rule. */
 #ifndef YY_BREAK
-#define YY_BREAK break;
+#define YY_BREAK /*LINTED*/break;
 #endif
 
 #define YY_RULE_SETUP \
@@ -852,14 +848,10 @@ extern int yylex (void);
  */
 YY_DECL
 {
-	register yy_state_type yy_current_state;
-	register char *yy_cp, *yy_bp;
-	register int yy_act;
+	yy_state_type yy_current_state;
+	char *yy_cp, *yy_bp;
+	int yy_act;
     
-#line 69 "dtc-lexer.l"
-
-#line 862 "dtc-lexer.lex.c"
-
 	if ( !(yy_init) )
 		{
 		(yy_init) = 1;
@@ -886,7 +878,12 @@ YY_DECL
 		yy_load_buffer_state( );
 		}
 
-	while ( 1 )		/* loops until end-of-file is reached */
+	{
+#line 69 "dtc-lexer.l"
+
+#line 885 "dtc-lexer.lex.c"
+
+	while ( /*CONSTCOND*/1 )		/* loops until end-of-file is reached */
 		{
 		yy_cp = (yy_c_buf_p);
 
@@ -903,7 +900,7 @@ YY_DECL
 yy_match:
 		do
 			{
-			register YY_CHAR yy_c = yy_ec[YY_SC_TO_UI(*yy_cp)];
+			YY_CHAR yy_c = yy_ec[YY_SC_TO_UI(*yy_cp)] ;
 			if ( yy_accept[yy_current_state] )
 				{
 				(yy_last_accepting_state) = yy_current_state;
@@ -915,7 +912,7 @@ yy_match:
 				if ( yy_current_state >= 166 )
 					yy_c = yy_meta[(unsigned int) yy_c];
 				}
-			yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
+			yy_current_state = yy_nxt[yy_base[yy_current_state] + (flex_int16_t) yy_c];
 			++yy_cp;
 			}
 		while ( yy_current_state != 165 );
@@ -1256,7 +1253,7 @@ YY_RULE_SETUP
 #line 272 "dtc-lexer.l"
 ECHO;
 	YY_BREAK
-#line 1260 "dtc-lexer.lex.c"
+#line 1257 "dtc-lexer.lex.c"
 
 	case YY_END_OF_BUFFER:
 		{
@@ -1386,6 +1383,7 @@ ECHO;
 			"fatal flex scanner internal error--no action found" );
 	} /* end of action switch */
 		} /* end of scanning one token */
+	} /* end of user's declarations */
 } /* end of yylex */
 
 /* yy_get_next_buffer - try to read in a new buffer
@@ -1397,9 +1395,9 @@ ECHO;
  */
 static int yy_get_next_buffer (void)
 {
-    	register char *dest = YY_CURRENT_BUFFER_LVALUE->yy_ch_buf;
-	register char *source = (yytext_ptr);
-	register int number_to_move, i;
+    	char *dest = YY_CURRENT_BUFFER_LVALUE->yy_ch_buf;
+	char *source = (yytext_ptr);
+	int number_to_move, i;
 	int ret_val;
 
 	if ( (yy_c_buf_p) > &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] )
@@ -1428,7 +1426,7 @@ static int yy_get_next_buffer (void)
 	/* Try to read more data. */
 
 	/* First move last chars to start of buffer. */
-	number_to_move = (int) ((yy_c_buf_p) - (yytext_ptr)) - 1;
+	number_to_move = (int) ((yy_c_buf_p) - (yytext_ptr) - 1);
 
 	for ( i = 0; i < number_to_move; ++i )
 		*(dest++) = *(source++);
@@ -1448,7 +1446,7 @@ static int yy_get_next_buffer (void)
 			{ /* Not enough room in the buffer - grow it. */
 
 			/* just a shorter name for the current buffer */
-			YY_BUFFER_STATE b = YY_CURRENT_BUFFER;
+			YY_BUFFER_STATE b = YY_CURRENT_BUFFER_LVALUE;
 
 			int yy_c_buf_p_offset =
 				(int) ((yy_c_buf_p) - b->yy_ch_buf);
@@ -1468,7 +1466,7 @@ static int yy_get_next_buffer (void)
 				}
 			else
 				/* Can't grow it, we don't own it. */
-				b->yy_ch_buf = 0;
+				b->yy_ch_buf = NULL;
 
 			if ( ! b->yy_ch_buf )
 				YY_FATAL_ERROR(
@@ -1486,7 +1484,7 @@ static int yy_get_next_buffer (void)
 
 		/* Read in more data. */
 		YY_INPUT( (&YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move]),
-			(yy_n_chars), (size_t) num_to_read );
+			(yy_n_chars), num_to_read );
 
 		YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars);
 		}
@@ -1510,9 +1508,9 @@ static int yy_get_next_buffer (void)
 	else
 		ret_val = EOB_ACT_CONTINUE_SCAN;
 
-	if ((yy_size_t) ((yy_n_chars) + number_to_move) > YY_CURRENT_BUFFER_LVALUE->yy_buf_size) {
+	if (((yy_n_chars) + number_to_move) > YY_CURRENT_BUFFER_LVALUE->yy_buf_size) {
 		/* Extend the array by 50%, plus the number we really need. */
-		yy_size_t new_size = (yy_n_chars) + number_to_move + ((yy_n_chars) >> 1);
+		int new_size = (yy_n_chars) + number_to_move + ((yy_n_chars) >> 1);
 		YY_CURRENT_BUFFER_LVALUE->yy_ch_buf = (char *) yyrealloc((void *) YY_CURRENT_BUFFER_LVALUE->yy_ch_buf,new_size  );
 		if ( ! YY_CURRENT_BUFFER_LVALUE->yy_ch_buf )
 			YY_FATAL_ERROR( "out of dynamic memory in yy_get_next_buffer()" );
@@ -1531,15 +1529,15 @@ static int yy_get_next_buffer (void)
 
     static yy_state_type yy_get_previous_state (void)
 {
-	register yy_state_type yy_current_state;
-	register char *yy_cp;
+	yy_state_type yy_current_state;
+	char *yy_cp;
     
 	yy_current_state = (yy_start);
 	yy_current_state += YY_AT_BOL();
 
 	for ( yy_cp = (yytext_ptr) + YY_MORE_ADJ; yy_cp < (yy_c_buf_p); ++yy_cp )
 		{
-		register YY_CHAR yy_c = (*yy_cp ? yy_ec[YY_SC_TO_UI(*yy_cp)] : 1);
+		YY_CHAR yy_c = (*yy_cp ? yy_ec[YY_SC_TO_UI(*yy_cp)] : 1);
 		if ( yy_accept[yy_current_state] )
 			{
 			(yy_last_accepting_state) = yy_current_state;
@@ -1551,7 +1549,7 @@ static int yy_get_next_buffer (void)
 			if ( yy_current_state >= 166 )
 				yy_c = yy_meta[(unsigned int) yy_c];
 			}
-		yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
+		yy_current_state = yy_nxt[yy_base[yy_current_state] + (flex_int16_t) yy_c];
 		}
 
 	return yy_current_state;
@@ -1564,10 +1562,10 @@ static int yy_get_next_buffer (void)
  */
     static yy_state_type yy_try_NUL_trans  (yy_state_type yy_current_state )
 {
-	register int yy_is_jam;
-    	register char *yy_cp = (yy_c_buf_p);
+	int yy_is_jam;
+    	char *yy_cp = (yy_c_buf_p);
 
-	register YY_CHAR yy_c = 1;
+	YY_CHAR yy_c = 1;
 	if ( yy_accept[yy_current_state] )
 		{
 		(yy_last_accepting_state) = yy_current_state;
@@ -1579,12 +1577,16 @@ static int yy_get_next_buffer (void)
 		if ( yy_current_state >= 166 )
 			yy_c = yy_meta[(unsigned int) yy_c];
 		}
-	yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
+	yy_current_state = yy_nxt[yy_base[yy_current_state] + (flex_int16_t) yy_c];
 	yy_is_jam = (yy_current_state == 165);
 
-	return yy_is_jam ? 0 : yy_current_state;
+		return yy_is_jam ? 0 : yy_current_state;
 }
 
+#ifndef YY_NO_UNPUT
+
+#endif
+
 #ifndef YY_NO_INPUT
 #ifdef __cplusplus
     static int yyinput (void)
@@ -1633,7 +1635,7 @@ static int yy_get_next_buffer (void)
 				case EOB_ACT_END_OF_FILE:
 					{
 					if ( yywrap( ) )
-						return EOF;
+						return 0;
 
 					if ( ! (yy_did_buffer_switch_on_eof) )
 						YY_NEW_FILE;
@@ -1736,7 +1738,7 @@ static void yy_load_buffer_state  (void)
 	if ( ! b )
 		YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" );
 
-	b->yy_buf_size = size;
+	b->yy_buf_size = (yy_size_t)size;
 
 	/* yy_ch_buf has to be 2 characters longer than the size given because
 	 * we need to put in 2 end-of-buffer characters.
@@ -1891,15 +1893,15 @@ static void yyensure_buffer_stack (void)
 		 * scanner will even need a stack. We use 2 instead of 1 to avoid an
 		 * immediate realloc on the next call.
          */
-		num_to_alloc = 1;
+      num_to_alloc = 1; /* After all that talk, this was set to 1 anyways... */
 		(yy_buffer_stack) = (struct yy_buffer_state**)yyalloc
 								(num_to_alloc * sizeof(struct yy_buffer_state*)
 								);
 		if ( ! (yy_buffer_stack) )
 			YY_FATAL_ERROR( "out of dynamic memory in yyensure_buffer_stack()" );
-								  
+
 		memset((yy_buffer_stack), 0, num_to_alloc * sizeof(struct yy_buffer_state*));
-				
+
 		(yy_buffer_stack_max) = num_to_alloc;
 		(yy_buffer_stack_top) = 0;
 		return;
@@ -1908,7 +1910,7 @@ static void yyensure_buffer_stack (void)
 	if ((yy_buffer_stack_top) >= ((yy_buffer_stack_max)) - 1){
 
 		/* Increase the buffer to prepare for a possible push. */
-		int grow_size = 8 /* arbitrary grow size */;
+		yy_size_t grow_size = 8 /* arbitrary grow size */;
 
 		num_to_alloc = (yy_buffer_stack_max) + grow_size;
 		(yy_buffer_stack) = (struct yy_buffer_state**)yyrealloc
@@ -1928,7 +1930,7 @@ static void yyensure_buffer_stack (void)
  * @param base the character buffer
  * @param size the size in bytes of the character buffer
  * 
- * @return the newly allocated buffer state object. 
+ * @return the newly allocated buffer state object.
  */
 YY_BUFFER_STATE yy_scan_buffer  (char * base, yy_size_t  size )
 {
@@ -1938,7 +1940,7 @@ YY_BUFFER_STATE yy_scan_buffer  (char * base, yy_size_t  size )
 	     base[size-2] != YY_END_OF_BUFFER_CHAR ||
 	     base[size-1] != YY_END_OF_BUFFER_CHAR )
 		/* They forgot to leave room for the EOB's. */
-		return 0;
+		return NULL;
 
 	b = (YY_BUFFER_STATE) yyalloc(sizeof( struct yy_buffer_state )  );
 	if ( ! b )
@@ -1947,7 +1949,7 @@ YY_BUFFER_STATE yy_scan_buffer  (char * base, yy_size_t  size )
 	b->yy_buf_size = size - 2;	/* "- 2" to take care of EOB's */
 	b->yy_buf_pos = b->yy_ch_buf = base;
 	b->yy_is_our_buffer = 0;
-	b->yy_input_file = 0;
+	b->yy_input_file = NULL;
 	b->yy_n_chars = b->yy_buf_size;
 	b->yy_is_interactive = 0;
 	b->yy_at_bol = 1;
@@ -1970,7 +1972,7 @@ YY_BUFFER_STATE yy_scan_buffer  (char * base, yy_size_t  size )
 YY_BUFFER_STATE yy_scan_string (yyconst char * yystr )
 {
     
-	return yy_scan_bytes(yystr,strlen(yystr) );
+	return yy_scan_bytes(yystr,(int) strlen(yystr) );
 }
 
 /** Setup the input buffer state to scan the given bytes. The next call to yylex() will
@@ -1988,7 +1990,7 @@ YY_BUFFER_STATE yy_scan_bytes  (yyconst char * yybytes, int  _yybytes_len )
 	int i;
     
 	/* Get memory for full buffer, including space for trailing EOB's. */
-	n = _yybytes_len + 2;
+	n = (yy_size_t) (_yybytes_len + 2);
 	buf = (char *) yyalloc(n  );
 	if ( ! buf )
 		YY_FATAL_ERROR( "out of dynamic memory in yy_scan_bytes()" );
@@ -2014,9 +2016,9 @@ YY_BUFFER_STATE yy_scan_bytes  (yyconst char * yybytes, int  _yybytes_len )
 #define YY_EXIT_FAILURE 2
 #endif
 
-static void yy_fatal_error (yyconst char* msg )
+static void yynoreturn yy_fatal_error (yyconst char* msg )
 {
-    	(void) fprintf( stderr, "%s\n", msg );
+			(void) fprintf( stderr, "%s\n", msg );
 	exit( YY_EXIT_FAILURE );
 }
 
@@ -2044,7 +2046,7 @@ static void yy_fatal_error (yyconst char* msg )
  */
 int yyget_lineno  (void)
 {
-        
+    
     return yylineno;
 }
 
@@ -2082,29 +2084,29 @@ char *yyget_text  (void)
 }
 
 /** Set the current line number.
- * @param line_number
+ * @param _line_number line number
  * 
  */
-void yyset_lineno (int  line_number )
+void yyset_lineno (int  _line_number )
 {
     
-    yylineno = line_number;
+    yylineno = _line_number;
 }
 
 /** Set the input stream. This does not discard the current
  * input buffer.
- * @param in_str A readable stream.
+ * @param _in_str A readable stream.
  * 
  * @see yy_switch_to_buffer
  */
-void yyset_in (FILE *  in_str )
+void yyset_in (FILE *  _in_str )
 {
-        yyin = in_str ;
+        yyin = _in_str ;
 }
 
-void yyset_out (FILE *  out_str )
+void yyset_out (FILE *  _out_str )
 {
-        yyout = out_str ;
+        yyout = _out_str ;
 }
 
 int yyget_debug  (void)
@@ -2112,9 +2114,9 @@ int yyget_debug  (void)
         return yy_flex_debug;
 }
 
-void yyset_debug (int  bdebug )
+void yyset_debug (int  _bdebug )
 {
-        yy_flex_debug = bdebug ;
+        yy_flex_debug = _bdebug ;
 }
 
 static int yy_init_globals (void)
@@ -2123,10 +2125,10 @@ static int yy_init_globals (void)
      * This function is called from yylex_destroy(), so don't allocate here.
      */
 
-    (yy_buffer_stack) = 0;
+    (yy_buffer_stack) = NULL;
     (yy_buffer_stack_top) = 0;
     (yy_buffer_stack_max) = 0;
-    (yy_c_buf_p) = (char *) 0;
+    (yy_c_buf_p) = NULL;
     (yy_init) = 0;
     (yy_start) = 0;
 
@@ -2135,8 +2137,8 @@ static int yy_init_globals (void)
     yyin = stdin;
     yyout = stdout;
 #else
-    yyin = (FILE *) 0;
-    yyout = (FILE *) 0;
+    yyin = NULL;
+    yyout = NULL;
 #endif
 
     /* For future reference: Set errno on error, since we are called by
@@ -2174,7 +2176,8 @@ int yylex_destroy  (void)
 #ifndef yytext_ptr
 static void yy_flex_strncpy (char* s1, yyconst char * s2, int n )
 {
-	register int i;
+		
+	int i;
 	for ( i = 0; i < n; ++i )
 		s1[i] = s2[i];
 }
@@ -2183,7 +2186,7 @@ static void yy_flex_strncpy (char* s1, yyconst char * s2, int n )
 #ifdef YY_NEED_STRLEN
 static int yy_flex_strlen (yyconst char * s )
 {
-	register int n;
+	int n;
 	for ( n = 0; s[n]; ++n )
 		;
 
@@ -2193,11 +2196,12 @@ static int yy_flex_strlen (yyconst char * s )
 
 void *yyalloc (yy_size_t  size )
 {
-	return (void *) malloc( size );
+			return malloc(size);
 }
 
 void *yyrealloc  (void * ptr, yy_size_t  size )
 {
+		
 	/* The cast to (char *) in the following accommodates both
 	 * implementations that use char* generic pointers, and those
 	 * that use void* generic pointers.  It works with the latter
@@ -2205,12 +2209,12 @@ void *yyrealloc  (void * ptr, yy_size_t  size )
 	 * any pointer type to void*, and deal with argument conversions
 	 * as though doing an assignment.
 	 */
-	return (void *) realloc( (char *) ptr, size );
+	return realloc(ptr, size);
 }
 
 void yyfree (void * ptr )
 {
-	free( (char *) ptr );	/* see yyrealloc() for (char *) cast */
+			free( (char *) ptr );	/* see yyrealloc() for (char *) cast */
 }
 
 #define YYTABLES_NAME "yytables"
diff --git a/scripts/dtc/dtc-parser.tab.c_shipped b/scripts/dtc/dtc-parser.tab.c_shipped
index 4d10814b3f..aea514fa69 100644
--- a/scripts/dtc/dtc-parser.tab.c_shipped
+++ b/scripts/dtc/dtc-parser.tab.c_shipped
@@ -1,8 +1,8 @@
-/* A Bison parser, made by GNU Bison 3.0.2.  */
+/* A Bison parser, made by GNU Bison 3.0.4.  */
 
 /* Bison implementation for Yacc-like parsers in C
 
-   Copyright (C) 1984, 1989-1990, 2000-2013 Free Software Foundation, Inc.
+   Copyright (C) 1984, 1989-1990, 2000-2015 Free Software Foundation, Inc.
 
    This program is free software: you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
@@ -44,7 +44,7 @@
 #define YYBISON 1
 
 /* Bison version.  */
-#define YYBISON_VERSION "3.0.2"
+#define YYBISON_VERSION "3.0.4"
 
 /* Skeleton name.  */
 #define YYSKELETON_NAME "yacc.c"
@@ -143,7 +143,7 @@ extern int yydebug;
 
 /* Value type.  */
 #if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
-typedef union YYSTYPE YYSTYPE;
+
 union YYSTYPE
 {
 #line 39 "dtc-parser.y" /* yacc.c:355  */
@@ -168,6 +168,8 @@ union YYSTYPE
 
 #line 170 "dtc-parser.tab.c" /* yacc.c:355  */
 };
+
+typedef union YYSTYPE YYSTYPE;
 # define YYSTYPE_IS_TRIVIAL 1
 # define YYSTYPE_IS_DECLARED 1
 #endif
@@ -195,7 +197,7 @@ int yyparse (void);
 
 /* Copy the second part of user declarations.  */
 
-#line 199 "dtc-parser.tab.c" /* yacc.c:358  */
+#line 201 "dtc-parser.tab.c" /* yacc.c:358  */
 
 #ifdef short
 # undef short
@@ -446,7 +448,7 @@ union yyalloc
 /* YYNNTS -- Number of nonterminals.  */
 #define YYNNTS  30
 /* YYNRULES -- Number of rules.  */
-#define YYNRULES  84
+#define YYNRULES  85
 /* YYNSTATES -- Number of states.  */
 #define YYNSTATES  149
 
@@ -497,14 +499,14 @@ static const yytype_uint8 yytranslate[] =
 static const yytype_uint16 yyrline[] =
 {
        0,   109,   109,   117,   121,   128,   129,   139,   142,   149,
-     153,   161,   165,   170,   181,   191,   206,   214,   217,   224,
-     228,   232,   236,   244,   248,   252,   256,   260,   276,   286,
-     294,   297,   301,   308,   324,   329,   348,   362,   369,   370,
-     371,   378,   382,   383,   387,   388,   392,   393,   397,   398,
-     402,   403,   407,   408,   412,   413,   414,   418,   419,   420,
-     421,   422,   426,   427,   428,   432,   433,   434,   438,   439,
-     448,   457,   461,   462,   463,   464,   469,   472,   476,   484,
-     487,   491,   499,   503,   507
+     153,   161,   165,   170,   181,   200,   213,   220,   228,   231,
+     238,   242,   246,   250,   258,   262,   266,   270,   274,   290,
+     300,   308,   311,   315,   322,   338,   343,   362,   376,   383,
+     384,   385,   392,   396,   397,   401,   402,   406,   407,   411,
+     412,   416,   417,   421,   422,   426,   427,   428,   432,   433,
+     434,   435,   436,   440,   441,   442,   446,   447,   448,   452,
+     453,   462,   471,   475,   476,   477,   478,   483,   486,   490,
+     498,   501,   505,   513,   517,   521
 };
 #endif
 
@@ -580,20 +582,20 @@ static const yytype_int8 yypact[] =
 static const yytype_uint8 yydefact[] =
 {
        0,     0,     0,     5,     7,     3,     1,     6,     0,     0,
-       0,     7,     0,    38,    39,     0,     0,    10,     0,     2,
-       8,     4,     0,     0,     0,    72,     0,    41,    42,    44,
-      46,    48,    50,    52,    54,    57,    64,    67,    71,     0,
-      17,    11,     0,     0,     0,     0,    73,    74,    75,    40,
+      16,     7,     0,    39,    40,     0,     0,    10,     0,     2,
+       8,     4,     0,     0,     0,    73,     0,    42,    43,    45,
+      47,    49,    51,    53,    55,    58,    65,    68,    72,     0,
+      18,    11,     0,     0,     0,     0,    74,    75,    76,    41,
        0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
        0,     0,     0,     0,     0,     0,     0,     0,     0,     9,
-      79,     0,     0,    14,    12,    45,     0,    47,    49,    51,
-      53,    55,    56,    60,    61,    59,    58,    62,    63,    65,
-      66,    69,    68,    70,     0,     0,     0,     0,    18,     0,
-      79,    15,    13,     0,     0,     0,    20,    30,    82,    22,
-      84,     0,    81,    80,    43,    21,    83,     0,     0,    16,
-      29,    19,    31,     0,    23,    32,    26,     0,    76,    34,
-       0,     0,     0,     0,    37,    36,    24,    35,    33,     0,
-      77,    78,    25,     0,    28,     0,     0,     0,    27
+      80,     0,     0,    14,    12,    46,     0,    48,    50,    52,
+      54,    56,    57,    61,    62,    60,    59,    63,    64,    66,
+      67,    70,    69,    71,     0,     0,     0,     0,    19,     0,
+      80,    15,    13,     0,     0,     0,    21,    31,    83,    23,
+      85,     0,    82,    81,    44,    22,    84,     0,     0,    17,
+      30,    20,    32,     0,    24,    33,    27,     0,    77,    35,
+       0,     0,     0,     0,    38,    37,    25,    36,    34,     0,
+      78,    79,    26,     0,    29,     0,     0,     0,    28
 };
 
   /* YYPGOTO[NTERM-NUM].  */
@@ -676,28 +678,28 @@ static const yytype_uint8 yystos[] =
 static const yytype_uint8 yyr1[] =
 {
        0,    48,    49,    50,    50,    51,    51,    52,    52,    53,
-      53,    54,    54,    54,    54,    54,    55,    56,    56,    57,
-      57,    57,    57,    58,    58,    58,    58,    58,    58,    58,
-      59,    59,    59,    60,    60,    60,    60,    60,    61,    61,
-      61,    62,    63,    63,    64,    64,    65,    65,    66,    66,
-      67,    67,    68,    68,    69,    69,    69,    70,    70,    70,
-      70,    70,    71,    71,    71,    72,    72,    72,    73,    73,
-      73,    73,    74,    74,    74,    74,    75,    75,    75,    76,
-      76,    76,    77,    77,    77
+      53,    54,    54,    54,    54,    54,    54,    55,    56,    56,
+      57,    57,    57,    57,    58,    58,    58,    58,    58,    58,
+      58,    59,    59,    59,    60,    60,    60,    60,    60,    61,
+      61,    61,    62,    63,    63,    64,    64,    65,    65,    66,
+      66,    67,    67,    68,    68,    69,    69,    69,    70,    70,
+      70,    70,    70,    71,    71,    71,    72,    72,    72,    73,
+      73,    73,    73,    74,    74,    74,    74,    75,    75,    75,
+      76,    76,    76,    77,    77,    77
 };
 
   /* YYR2[YYN] -- Number of symbols on the right hand side of rule YYN.  */
 static const yytype_uint8 yyr2[] =
 {
        0,     2,     3,     2,     4,     1,     2,     0,     2,     4,
-       2,     2,     3,     4,     3,     4,     5,     0,     2,     4,
-       2,     3,     2,     2,     3,     4,     2,     9,     5,     2,
-       0,     2,     2,     3,     1,     2,     2,     2,     1,     1,
-       3,     1,     1,     5,     1,     3,     1,     3,     1,     3,
-       1,     3,     1,     3,     1,     3,     3,     1,     3,     3,
-       3,     3,     3,     3,     1,     3,     3,     1,     3,     3,
-       3,     1,     1,     2,     2,     2,     0,     2,     2,     0,
-       2,     2,     2,     3,     2
+       2,     2,     3,     4,     3,     4,     0,     5,     0,     2,
+       4,     2,     3,     2,     2,     3,     4,     2,     9,     5,
+       2,     0,     2,     2,     3,     1,     2,     2,     2,     1,
+       1,     3,     1,     1,     5,     1,     3,     1,     3,     1,
+       3,     1,     3,     1,     3,     1,     3,     3,     1,     3,
+       3,     3,     3,     3,     3,     1,     3,     3,     1,     3,
+       3,     3,     1,     1,     2,     2,     2,     0,     2,     2,
+       0,     2,     2,     2,     3,     2
 };
 
 
@@ -1472,7 +1474,7 @@ yyreduce:
 			parser_output = build_dt_info((yyvsp[-2].flags), (yyvsp[-1].re), (yyvsp[0].node),
 			                              guess_boot_cpuid((yyvsp[0].node)));
 		}
-#line 1476 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1478 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
   case 3:
@@ -1480,7 +1482,7 @@ yyreduce:
     {
 			(yyval.flags) = DTSF_V1;
 		}
-#line 1484 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1486 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
   case 4:
@@ -1488,7 +1490,7 @@ yyreduce:
     {
 			(yyval.flags) = DTSF_V1 | DTSF_PLUGIN;
 		}
-#line 1492 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1494 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
   case 6:
@@ -1498,7 +1500,7 @@ yyreduce:
 				ERROR(&(yylsp[0]), "Header flags don't match earlier ones");
 			(yyval.flags) = (yyvsp[-1].flags);
 		}
-#line 1502 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1504 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
   case 7:
@@ -1506,7 +1508,7 @@ yyreduce:
     {
 			(yyval.re) = NULL;
 		}
-#line 1510 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1512 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
   case 8:
@@ -1514,7 +1516,7 @@ yyreduce:
     {
 			(yyval.re) = chain_reserve_entry((yyvsp[-1].re), (yyvsp[0].re));
 		}
-#line 1518 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1520 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
   case 9:
@@ -1522,7 +1524,7 @@ yyreduce:
     {
 			(yyval.re) = build_reserve_entry((yyvsp[-2].integer), (yyvsp[-1].integer));
 		}
-#line 1526 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1528 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
   case 10:
@@ -1531,7 +1533,7 @@ yyreduce:
 			add_label(&(yyvsp[0].re)->labels, (yyvsp[-1].labelref));
 			(yyval.re) = (yyvsp[0].re);
 		}
-#line 1535 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1537 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
   case 11:
@@ -1539,7 +1541,7 @@ yyreduce:
     {
 			(yyval.node) = name_node((yyvsp[0].node), "");
 		}
-#line 1543 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1545 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
   case 12:
@@ -1547,7 +1549,7 @@ yyreduce:
     {
 			(yyval.node) = merge_nodes((yyvsp[-2].node), (yyvsp[0].node));
 		}
-#line 1551 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1553 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
   case 13:
@@ -1562,7 +1564,7 @@ yyreduce:
 				ERROR(&(yylsp[-1]), "Label or path %s not found", (yyvsp[-1].labelref));
 			(yyval.node) = (yyvsp[-3].node);
 		}
-#line 1566 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1568 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
   case 14:
@@ -1570,17 +1572,26 @@ yyreduce:
     {
 			struct node *target = get_node_by_ref((yyvsp[-2].node), (yyvsp[-1].labelref));
 
-			if (target)
+			if (target) {
 				merge_nodes(target, (yyvsp[0].node));
-			else
-				ERROR(&(yylsp[-1]), "Label or path %s not found", (yyvsp[-1].labelref));
+			} else {
+				/*
+				 * We rely on the rule being always:
+				 *   versioninfo plugindecl memreserves devicetree
+				 * so $-1 is what we want (plugindecl)
+				 */
+				if ((yyvsp[(-1) - (3)].flags) & DTSF_PLUGIN)
+					add_orphan_node((yyvsp[-2].node), (yyvsp[0].node), (yyvsp[-1].labelref));
+				else
+					ERROR(&(yylsp[-1]), "Label or path %s not found", (yyvsp[-1].labelref));
+			}
 			(yyval.node) = (yyvsp[-2].node);
 		}
-#line 1580 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1591 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
   case 15:
-#line 192 "dtc-parser.y" /* yacc.c:1646  */
+#line 201 "dtc-parser.y" /* yacc.c:1646  */
     {
 			struct node *target = get_node_by_ref((yyvsp[-3].node), (yyvsp[-1].labelref));
 
@@ -1592,100 +1603,109 @@ yyreduce:
 
 			(yyval.node) = (yyvsp[-3].node);
 		}
-#line 1596 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1607 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
   case 16:
-#line 207 "dtc-parser.y" /* yacc.c:1646  */
+#line 213 "dtc-parser.y" /* yacc.c:1646  */
     {
-			(yyval.node) = build_node((yyvsp[-3].proplist), (yyvsp[-2].nodelist));
+			/* build empty node */
+			(yyval.node) = name_node(build_node(NULL, NULL), "");
 		}
-#line 1604 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1616 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
   case 17:
-#line 214 "dtc-parser.y" /* yacc.c:1646  */
+#line 221 "dtc-parser.y" /* yacc.c:1646  */
     {
-			(yyval.proplist) = NULL;
+			(yyval.node) = build_node((yyvsp[-3].proplist), (yyvsp[-2].nodelist));
 		}
-#line 1612 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1624 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
   case 18:
-#line 218 "dtc-parser.y" /* yacc.c:1646  */
+#line 228 "dtc-parser.y" /* yacc.c:1646  */
     {
-			(yyval.proplist) = chain_property((yyvsp[0].prop), (yyvsp[-1].proplist));
+			(yyval.proplist) = NULL;
 		}
-#line 1620 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1632 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
   case 19:
-#line 225 "dtc-parser.y" /* yacc.c:1646  */
+#line 232 "dtc-parser.y" /* yacc.c:1646  */
     {
-			(yyval.prop) = build_property((yyvsp[-3].propnodename), (yyvsp[-1].data));
+			(yyval.proplist) = chain_property((yyvsp[0].prop), (yyvsp[-1].proplist));
 		}
-#line 1628 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1640 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
   case 20:
-#line 229 "dtc-parser.y" /* yacc.c:1646  */
+#line 239 "dtc-parser.y" /* yacc.c:1646  */
     {
-			(yyval.prop) = build_property((yyvsp[-1].propnodename), empty_data);
+			(yyval.prop) = build_property((yyvsp[-3].propnodename), (yyvsp[-1].data));
 		}
-#line 1636 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1648 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
   case 21:
-#line 233 "dtc-parser.y" /* yacc.c:1646  */
+#line 243 "dtc-parser.y" /* yacc.c:1646  */
     {
-			(yyval.prop) = build_property_delete((yyvsp[-1].propnodename));
+			(yyval.prop) = build_property((yyvsp[-1].propnodename), empty_data);
 		}
-#line 1644 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1656 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
   case 22:
-#line 237 "dtc-parser.y" /* yacc.c:1646  */
+#line 247 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.prop) = build_property_delete((yyvsp[-1].propnodename));
+		}
+#line 1664 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 23:
+#line 251 "dtc-parser.y" /* yacc.c:1646  */
     {
 			add_label(&(yyvsp[0].prop)->labels, (yyvsp[-1].labelref));
 			(yyval.prop) = (yyvsp[0].prop);
 		}
-#line 1653 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1673 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 23:
-#line 245 "dtc-parser.y" /* yacc.c:1646  */
+  case 24:
+#line 259 "dtc-parser.y" /* yacc.c:1646  */
     {
 			(yyval.data) = data_merge((yyvsp[-1].data), (yyvsp[0].data));
 		}
-#line 1661 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1681 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 24:
-#line 249 "dtc-parser.y" /* yacc.c:1646  */
+  case 25:
+#line 263 "dtc-parser.y" /* yacc.c:1646  */
     {
 			(yyval.data) = data_merge((yyvsp[-2].data), (yyvsp[-1].array).data);
 		}
-#line 1669 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1689 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 25:
-#line 253 "dtc-parser.y" /* yacc.c:1646  */
+  case 26:
+#line 267 "dtc-parser.y" /* yacc.c:1646  */
     {
 			(yyval.data) = data_merge((yyvsp[-3].data), (yyvsp[-1].data));
 		}
-#line 1677 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1697 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 26:
-#line 257 "dtc-parser.y" /* yacc.c:1646  */
+  case 27:
+#line 271 "dtc-parser.y" /* yacc.c:1646  */
     {
 			(yyval.data) = data_add_marker((yyvsp[-1].data), REF_PATH, (yyvsp[0].labelref));
 		}
-#line 1685 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1705 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 27:
-#line 261 "dtc-parser.y" /* yacc.c:1646  */
+  case 28:
+#line 275 "dtc-parser.y" /* yacc.c:1646  */
     {
 			FILE *f = srcfile_relative_open((yyvsp[-5].data).val, NULL);
 			struct data d;
@@ -1701,11 +1721,11 @@ yyreduce:
 			(yyval.data) = data_merge((yyvsp[-8].data), d);
 			fclose(f);
 		}
-#line 1705 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1725 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 28:
-#line 277 "dtc-parser.y" /* yacc.c:1646  */
+  case 29:
+#line 291 "dtc-parser.y" /* yacc.c:1646  */
     {
 			FILE *f = srcfile_relative_open((yyvsp[-1].data).val, NULL);
 			struct data d = empty_data;
@@ -1715,43 +1735,43 @@ yyreduce:
 			(yyval.data) = data_merge((yyvsp[-4].data), d);
 			fclose(f);
 		}
-#line 1719 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1739 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 29:
-#line 287 "dtc-parser.y" /* yacc.c:1646  */
+  case 30:
+#line 301 "dtc-parser.y" /* yacc.c:1646  */
     {
 			(yyval.data) = data_add_marker((yyvsp[-1].data), LABEL, (yyvsp[0].labelref));
 		}
-#line 1727 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1747 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 30:
-#line 294 "dtc-parser.y" /* yacc.c:1646  */
+  case 31:
+#line 308 "dtc-parser.y" /* yacc.c:1646  */
     {
 			(yyval.data) = empty_data;
 		}
-#line 1735 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1755 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 31:
-#line 298 "dtc-parser.y" /* yacc.c:1646  */
+  case 32:
+#line 312 "dtc-parser.y" /* yacc.c:1646  */
     {
 			(yyval.data) = (yyvsp[-1].data);
 		}
-#line 1743 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1763 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 32:
-#line 302 "dtc-parser.y" /* yacc.c:1646  */
+  case 33:
+#line 316 "dtc-parser.y" /* yacc.c:1646  */
     {
 			(yyval.data) = data_add_marker((yyvsp[-1].data), LABEL, (yyvsp[0].labelref));
 		}
-#line 1751 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1771 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 33:
-#line 309 "dtc-parser.y" /* yacc.c:1646  */
+  case 34:
+#line 323 "dtc-parser.y" /* yacc.c:1646  */
     {
 			unsigned long long bits;
 
@@ -1767,20 +1787,20 @@ yyreduce:
 			(yyval.array).data = empty_data;
 			(yyval.array).bits = bits;
 		}
-#line 1771 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1791 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 34:
-#line 325 "dtc-parser.y" /* yacc.c:1646  */
+  case 35:
+#line 339 "dtc-parser.y" /* yacc.c:1646  */
     {
 			(yyval.array).data = empty_data;
 			(yyval.array).bits = 32;
 		}
-#line 1780 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1800 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 35:
-#line 330 "dtc-parser.y" /* yacc.c:1646  */
+  case 36:
+#line 344 "dtc-parser.y" /* yacc.c:1646  */
     {
 			if ((yyvsp[-1].array).bits < 64) {
 				uint64_t mask = (1ULL << (yyvsp[-1].array).bits) - 1;
@@ -1799,11 +1819,11 @@ yyreduce:
 
 			(yyval.array).data = data_append_integer((yyvsp[-1].array).data, (yyvsp[0].integer), (yyvsp[-1].array).bits);
 		}
-#line 1803 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1823 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 36:
-#line 349 "dtc-parser.y" /* yacc.c:1646  */
+  case 37:
+#line 363 "dtc-parser.y" /* yacc.c:1646  */
     {
 			uint64_t val = ~0ULL >> (64 - (yyvsp[-1].array).bits);
 
@@ -1817,129 +1837,129 @@ yyreduce:
 
 			(yyval.array).data = data_append_integer((yyvsp[-1].array).data, val, (yyvsp[-1].array).bits);
 		}
-#line 1821 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1841 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 37:
-#line 363 "dtc-parser.y" /* yacc.c:1646  */
+  case 38:
+#line 377 "dtc-parser.y" /* yacc.c:1646  */
     {
 			(yyval.array).data = data_add_marker((yyvsp[-1].array).data, LABEL, (yyvsp[0].labelref));
 		}
-#line 1829 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1849 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 40:
-#line 372 "dtc-parser.y" /* yacc.c:1646  */
+  case 41:
+#line 386 "dtc-parser.y" /* yacc.c:1646  */
     {
 			(yyval.integer) = (yyvsp[-1].integer);
 		}
-#line 1837 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1857 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 43:
-#line 383 "dtc-parser.y" /* yacc.c:1646  */
+  case 44:
+#line 397 "dtc-parser.y" /* yacc.c:1646  */
     { (yyval.integer) = (yyvsp[-4].integer) ? (yyvsp[-2].integer) : (yyvsp[0].integer); }
-#line 1843 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1863 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 45:
-#line 388 "dtc-parser.y" /* yacc.c:1646  */
+  case 46:
+#line 402 "dtc-parser.y" /* yacc.c:1646  */
     { (yyval.integer) = (yyvsp[-2].integer) || (yyvsp[0].integer); }
-#line 1849 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1869 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 47:
-#line 393 "dtc-parser.y" /* yacc.c:1646  */
+  case 48:
+#line 407 "dtc-parser.y" /* yacc.c:1646  */
     { (yyval.integer) = (yyvsp[-2].integer) && (yyvsp[0].integer); }
-#line 1855 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1875 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 49:
-#line 398 "dtc-parser.y" /* yacc.c:1646  */
+  case 50:
+#line 412 "dtc-parser.y" /* yacc.c:1646  */
     { (yyval.integer) = (yyvsp[-2].integer) | (yyvsp[0].integer); }
-#line 1861 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1881 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 51:
-#line 403 "dtc-parser.y" /* yacc.c:1646  */
+  case 52:
+#line 417 "dtc-parser.y" /* yacc.c:1646  */
     { (yyval.integer) = (yyvsp[-2].integer) ^ (yyvsp[0].integer); }
-#line 1867 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1887 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 53:
-#line 408 "dtc-parser.y" /* yacc.c:1646  */
+  case 54:
+#line 422 "dtc-parser.y" /* yacc.c:1646  */
     { (yyval.integer) = (yyvsp[-2].integer) & (yyvsp[0].integer); }
-#line 1873 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1893 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 55:
-#line 413 "dtc-parser.y" /* yacc.c:1646  */
+  case 56:
+#line 427 "dtc-parser.y" /* yacc.c:1646  */
     { (yyval.integer) = (yyvsp[-2].integer) == (yyvsp[0].integer); }
-#line 1879 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1899 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 56:
-#line 414 "dtc-parser.y" /* yacc.c:1646  */
+  case 57:
+#line 428 "dtc-parser.y" /* yacc.c:1646  */
     { (yyval.integer) = (yyvsp[-2].integer) != (yyvsp[0].integer); }
-#line 1885 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1905 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 58:
-#line 419 "dtc-parser.y" /* yacc.c:1646  */
+  case 59:
+#line 433 "dtc-parser.y" /* yacc.c:1646  */
     { (yyval.integer) = (yyvsp[-2].integer) < (yyvsp[0].integer); }
-#line 1891 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1911 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 59:
-#line 420 "dtc-parser.y" /* yacc.c:1646  */
+  case 60:
+#line 434 "dtc-parser.y" /* yacc.c:1646  */
     { (yyval.integer) = (yyvsp[-2].integer) > (yyvsp[0].integer); }
-#line 1897 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1917 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 60:
-#line 421 "dtc-parser.y" /* yacc.c:1646  */
+  case 61:
+#line 435 "dtc-parser.y" /* yacc.c:1646  */
     { (yyval.integer) = (yyvsp[-2].integer) <= (yyvsp[0].integer); }
-#line 1903 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1923 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 61:
-#line 422 "dtc-parser.y" /* yacc.c:1646  */
+  case 62:
+#line 436 "dtc-parser.y" /* yacc.c:1646  */
     { (yyval.integer) = (yyvsp[-2].integer) >= (yyvsp[0].integer); }
-#line 1909 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1929 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 62:
-#line 426 "dtc-parser.y" /* yacc.c:1646  */
+  case 63:
+#line 440 "dtc-parser.y" /* yacc.c:1646  */
     { (yyval.integer) = (yyvsp[-2].integer) << (yyvsp[0].integer); }
-#line 1915 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1935 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 63:
-#line 427 "dtc-parser.y" /* yacc.c:1646  */
+  case 64:
+#line 441 "dtc-parser.y" /* yacc.c:1646  */
     { (yyval.integer) = (yyvsp[-2].integer) >> (yyvsp[0].integer); }
-#line 1921 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1941 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 65:
-#line 432 "dtc-parser.y" /* yacc.c:1646  */
+  case 66:
+#line 446 "dtc-parser.y" /* yacc.c:1646  */
     { (yyval.integer) = (yyvsp[-2].integer) + (yyvsp[0].integer); }
-#line 1927 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1947 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 66:
-#line 433 "dtc-parser.y" /* yacc.c:1646  */
+  case 67:
+#line 447 "dtc-parser.y" /* yacc.c:1646  */
     { (yyval.integer) = (yyvsp[-2].integer) - (yyvsp[0].integer); }
-#line 1933 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1953 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 68:
-#line 438 "dtc-parser.y" /* yacc.c:1646  */
+  case 69:
+#line 452 "dtc-parser.y" /* yacc.c:1646  */
     { (yyval.integer) = (yyvsp[-2].integer) * (yyvsp[0].integer); }
-#line 1939 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1959 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 69:
-#line 440 "dtc-parser.y" /* yacc.c:1646  */
+  case 70:
+#line 454 "dtc-parser.y" /* yacc.c:1646  */
     {
 			if ((yyvsp[0].integer) != 0) {
 				(yyval.integer) = (yyvsp[-2].integer) / (yyvsp[0].integer);
@@ -1948,11 +1968,11 @@ yyreduce:
 				(yyval.integer) = 0;
 			}
 		}
-#line 1952 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1972 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 70:
-#line 449 "dtc-parser.y" /* yacc.c:1646  */
+  case 71:
+#line 463 "dtc-parser.y" /* yacc.c:1646  */
     {
 			if ((yyvsp[0].integer) != 0) {
 				(yyval.integer) = (yyvsp[-2].integer) % (yyvsp[0].integer);
@@ -1961,103 +1981,103 @@ yyreduce:
 				(yyval.integer) = 0;
 			}
 		}
-#line 1965 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1985 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 73:
-#line 462 "dtc-parser.y" /* yacc.c:1646  */
+  case 74:
+#line 476 "dtc-parser.y" /* yacc.c:1646  */
     { (yyval.integer) = -(yyvsp[0].integer); }
-#line 1971 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1991 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 74:
-#line 463 "dtc-parser.y" /* yacc.c:1646  */
+  case 75:
+#line 477 "dtc-parser.y" /* yacc.c:1646  */
     { (yyval.integer) = ~(yyvsp[0].integer); }
-#line 1977 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1997 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 75:
-#line 464 "dtc-parser.y" /* yacc.c:1646  */
+  case 76:
+#line 478 "dtc-parser.y" /* yacc.c:1646  */
     { (yyval.integer) = !(yyvsp[0].integer); }
-#line 1983 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 2003 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 76:
-#line 469 "dtc-parser.y" /* yacc.c:1646  */
+  case 77:
+#line 483 "dtc-parser.y" /* yacc.c:1646  */
     {
 			(yyval.data) = empty_data;
 		}
-#line 1991 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 2011 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 77:
-#line 473 "dtc-parser.y" /* yacc.c:1646  */
+  case 78:
+#line 487 "dtc-parser.y" /* yacc.c:1646  */
     {
 			(yyval.data) = data_append_byte((yyvsp[-1].data), (yyvsp[0].byte));
 		}
-#line 1999 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 2019 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 78:
-#line 477 "dtc-parser.y" /* yacc.c:1646  */
+  case 79:
+#line 491 "dtc-parser.y" /* yacc.c:1646  */
     {
 			(yyval.data) = data_add_marker((yyvsp[-1].data), LABEL, (yyvsp[0].labelref));
 		}
-#line 2007 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 2027 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 79:
-#line 484 "dtc-parser.y" /* yacc.c:1646  */
+  case 80:
+#line 498 "dtc-parser.y" /* yacc.c:1646  */
     {
 			(yyval.nodelist) = NULL;
 		}
-#line 2015 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 2035 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 80:
-#line 488 "dtc-parser.y" /* yacc.c:1646  */
+  case 81:
+#line 502 "dtc-parser.y" /* yacc.c:1646  */
     {
 			(yyval.nodelist) = chain_node((yyvsp[-1].node), (yyvsp[0].nodelist));
 		}
-#line 2023 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 2043 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 81:
-#line 492 "dtc-parser.y" /* yacc.c:1646  */
+  case 82:
+#line 506 "dtc-parser.y" /* yacc.c:1646  */
     {
 			ERROR(&(yylsp[0]), "Properties must precede subnodes");
 			YYERROR;
 		}
-#line 2032 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 2052 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 82:
-#line 500 "dtc-parser.y" /* yacc.c:1646  */
+  case 83:
+#line 514 "dtc-parser.y" /* yacc.c:1646  */
     {
 			(yyval.node) = name_node((yyvsp[0].node), (yyvsp[-1].propnodename));
 		}
-#line 2040 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 2060 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 83:
-#line 504 "dtc-parser.y" /* yacc.c:1646  */
+  case 84:
+#line 518 "dtc-parser.y" /* yacc.c:1646  */
     {
 			(yyval.node) = name_node(build_node_delete(), (yyvsp[-1].propnodename));
 		}
-#line 2048 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 2068 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 84:
-#line 508 "dtc-parser.y" /* yacc.c:1646  */
+  case 85:
+#line 522 "dtc-parser.y" /* yacc.c:1646  */
     {
 			add_label(&(yyvsp[0].node)->labels, (yyvsp[-1].labelref));
 			(yyval.node) = (yyvsp[0].node);
 		}
-#line 2057 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 2077 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
 
-#line 2061 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 2081 "dtc-parser.tab.c" /* yacc.c:1646  */
       default: break;
     }
   /* User semantic actions sometimes alter yychar, and that requires
@@ -2292,7 +2312,7 @@ yyreturn:
 #endif
   return yyresult;
 }
-#line 514 "dtc-parser.y" /* yacc.c:1906  */
+#line 528 "dtc-parser.y" /* yacc.c:1906  */
 
 
 void yyerror(char const *s)
diff --git a/scripts/dtc/dtc-parser.tab.h_shipped b/scripts/dtc/dtc-parser.tab.h_shipped
index e7b04dd016..6aa512c1b3 100644
--- a/scripts/dtc/dtc-parser.tab.h_shipped
+++ b/scripts/dtc/dtc-parser.tab.h_shipped
@@ -1,8 +1,8 @@
-/* A Bison parser, made by GNU Bison 3.0.2.  */
+/* A Bison parser, made by GNU Bison 3.0.4.  */
 
 /* Bison interface for Yacc-like parsers in C
 
-   Copyright (C) 1984, 1989-1990, 2000-2013 Free Software Foundation, Inc.
+   Copyright (C) 1984, 1989-1990, 2000-2015 Free Software Foundation, Inc.
 
    This program is free software: you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
@@ -72,7 +72,7 @@ extern int yydebug;
 
 /* Value type.  */
 #if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
-typedef union YYSTYPE YYSTYPE;
+
 union YYSTYPE
 {
 #line 39 "dtc-parser.y" /* yacc.c:1909  */
@@ -97,6 +97,8 @@ union YYSTYPE
 
 #line 99 "dtc-parser.tab.h" /* yacc.c:1909  */
 };
+
+typedef union YYSTYPE YYSTYPE;
 # define YYSTYPE_IS_TRIVIAL 1
 # define YYSTYPE_IS_DECLARED 1
 #endif
diff --git a/scripts/dtc/dtc-parser.y b/scripts/dtc/dtc-parser.y
index ca3f500342..affc81a8f9 100644
--- a/scripts/dtc/dtc-parser.y
+++ b/scripts/dtc/dtc-parser.y
@@ -182,10 +182,19 @@ devicetree:
 		{
 			struct node *target = get_node_by_ref($1, $2);
 
-			if (target)
+			if (target) {
 				merge_nodes(target, $3);
-			else
-				ERROR(&@2, "Label or path %s not found", $2);
+			} else {
+				/*
+				 * We rely on the rule being always:
+				 *   versioninfo plugindecl memreserves devicetree
+				 * so $-1 is what we want (plugindecl)
+				 */
+				if ($<flags>-1 & DTSF_PLUGIN)
+					add_orphan_node($1, $3, $2);
+				else
+					ERROR(&@2, "Label or path %s not found", $2);
+			}
 			$$ = $1;
 		}
 	| devicetree DT_DEL_NODE DT_REF ';'
@@ -200,6 +209,11 @@ devicetree:
 
 			$$ = $1;
 		}
+	| /* empty */
+		{
+			/* build empty node */
+			$$ = name_node(build_node(NULL, NULL), "");
+		}
 	;
 
 nodedef:
diff --git a/scripts/dtc/dtc.h b/scripts/dtc/dtc.h
index 409db76c94..35cf926cc1 100644
--- a/scripts/dtc/dtc.h
+++ b/scripts/dtc/dtc.h
@@ -203,6 +203,7 @@ struct node *build_node_delete(void);
 struct node *name_node(struct node *node, char *name);
 struct node *chain_node(struct node *first, struct node *list);
 struct node *merge_nodes(struct node *old_node, struct node *new_node);
+void add_orphan_node(struct node *old_node, struct node *new_node, char *ref);
 
 void add_property(struct node *node, struct property *prop);
 void delete_property_by_name(struct node *node, char *name);
@@ -216,6 +217,7 @@ void append_to_property(struct node *node,
 const char *get_unitname(struct node *node);
 struct property *get_property(struct node *node, const char *propname);
 cell_t propval_cell(struct property *prop);
+cell_t propval_cell_n(struct property *prop, int n);
 struct property *get_property_by_label(struct node *tree, const char *label,
 				       struct node **node);
 struct marker *get_marker_label(struct node *tree, const char *label,
diff --git a/scripts/dtc/libfdt/fdt_addresses.c b/scripts/dtc/libfdt/fdt_addresses.c
new file mode 100644
index 0000000000..eff4dbcc72
--- /dev/null
+++ b/scripts/dtc/libfdt/fdt_addresses.c
@@ -0,0 +1,96 @@
+/*
+ * libfdt - Flat Device Tree manipulation
+ * Copyright (C) 2014 David Gibson <david@gibson.dropbear.id.au>
+ *
+ * libfdt is dual licensed: you can use it either under the terms of
+ * the GPL, or the BSD license, at your option.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Alternatively,
+ *
+ *  b) Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *     1. Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *     2. Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include "libfdt_env.h"
+
+#include <fdt.h>
+#include <libfdt.h>
+
+#include "libfdt_internal.h"
+
+int fdt_address_cells(const void *fdt, int nodeoffset)
+{
+	const fdt32_t *ac;
+	int val;
+	int len;
+
+	ac = fdt_getprop(fdt, nodeoffset, "#address-cells", &len);
+	if (!ac)
+		return 2;
+
+	if (len != sizeof(*ac))
+		return -FDT_ERR_BADNCELLS;
+
+	val = fdt32_to_cpu(*ac);
+	if ((val <= 0) || (val > FDT_MAX_NCELLS))
+		return -FDT_ERR_BADNCELLS;
+
+	return val;
+}
+
+int fdt_size_cells(const void *fdt, int nodeoffset)
+{
+	const fdt32_t *sc;
+	int val;
+	int len;
+
+	sc = fdt_getprop(fdt, nodeoffset, "#size-cells", &len);
+	if (!sc)
+		return 2;
+
+	if (len != sizeof(*sc))
+		return -FDT_ERR_BADNCELLS;
+
+	val = fdt32_to_cpu(*sc);
+	if ((val < 0) || (val > FDT_MAX_NCELLS))
+		return -FDT_ERR_BADNCELLS;
+
+	return val;
+}
diff --git a/scripts/dtc/libfdt/fdt_overlay.c b/scripts/dtc/libfdt/fdt_overlay.c
new file mode 100644
index 0000000000..bd81241e66
--- /dev/null
+++ b/scripts/dtc/libfdt/fdt_overlay.c
@@ -0,0 +1,861 @@
+#include "libfdt_env.h"
+
+#include <fdt.h>
+#include <libfdt.h>
+
+#include "libfdt_internal.h"
+
+/**
+ * overlay_get_target_phandle - retrieves the target phandle of a fragment
+ * @fdto: pointer to the device tree overlay blob
+ * @fragment: node offset of the fragment in the overlay
+ *
+ * overlay_get_target_phandle() retrieves the target phandle of an
+ * overlay fragment when that fragment uses a phandle (target
+ * property) instead of a path (target-path property).
+ *
+ * returns:
+ *      the phandle pointed by the target property
+ *      0, if the phandle was not found
+ *	-1, if the phandle was malformed
+ */
+static uint32_t overlay_get_target_phandle(const void *fdto, int fragment)
+{
+	const fdt32_t *val;
+	int len;
+
+	val = fdt_getprop(fdto, fragment, "target", &len);
+	if (!val)
+		return 0;
+
+	if ((len != sizeof(*val)) || (fdt32_to_cpu(*val) == (uint32_t)-1))
+		return (uint32_t)-1;
+
+	return fdt32_to_cpu(*val);
+}
+
+/**
+ * overlay_get_target - retrieves the offset of a fragment's target
+ * @fdt: Base device tree blob
+ * @fdto: Device tree overlay blob
+ * @fragment: node offset of the fragment in the overlay
+ * @pathp: pointer which receives the path of the target (or NULL)
+ *
+ * overlay_get_target() retrieves the target offset in the base
+ * device tree of a fragment, no matter how the actual targetting is
+ * done (through a phandle or a path)
+ *
+ * returns:
+ *      the targetted node offset in the base device tree
+ *      Negative error code on error
+ */
+static int overlay_get_target(const void *fdt, const void *fdto,
+			      int fragment, char const **pathp)
+{
+	uint32_t phandle;
+	const char *path = NULL;
+	int path_len = 0, ret;
+
+	/* Try first to do a phandle based lookup */
+	phandle = overlay_get_target_phandle(fdto, fragment);
+	if (phandle == (uint32_t)-1)
+		return -FDT_ERR_BADPHANDLE;
+
+	/* no phandle, try path */
+	if (!phandle) {
+		/* And then a path based lookup */
+		path = fdt_getprop(fdto, fragment, "target-path", &path_len);
+		if (path)
+			ret = fdt_path_offset(fdt, path);
+		else
+			ret = path_len;
+	} else
+		ret = fdt_node_offset_by_phandle(fdt, phandle);
+
+	/*
+	* If we haven't found either a target or a
+	* target-path property in a node that contains a
+	* __overlay__ subnode (we wouldn't be called
+	* otherwise), consider it a improperly written
+	* overlay
+	*/
+	if (ret < 0 && path_len == -FDT_ERR_NOTFOUND)
+		ret = -FDT_ERR_BADOVERLAY;
+
+	/* return on error */
+	if (ret < 0)
+		return ret;
+
+	/* return pointer to path (if available) */
+	if (pathp)
+		*pathp = path ? path : NULL;
+
+	return ret;
+}
+
+/**
+ * overlay_phandle_add_offset - Increases a phandle by an offset
+ * @fdt: Base device tree blob
+ * @node: Device tree overlay blob
+ * @name: Name of the property to modify (phandle or linux,phandle)
+ * @delta: offset to apply
+ *
+ * overlay_phandle_add_offset() increments a node phandle by a given
+ * offset.
+ *
+ * returns:
+ *      0 on success.
+ *      Negative error code on error
+ */
+static int overlay_phandle_add_offset(void *fdt, int node,
+				      const char *name, uint32_t delta)
+{
+	const fdt32_t *val;
+	uint32_t adj_val;
+	int len;
+
+	val = fdt_getprop(fdt, node, name, &len);
+	if (!val)
+		return len;
+
+	if (len != sizeof(*val))
+		return -FDT_ERR_BADPHANDLE;
+
+	adj_val = fdt32_to_cpu(*val);
+	if ((adj_val + delta) < adj_val)
+		return -FDT_ERR_NOPHANDLES;
+
+	adj_val += delta;
+	if (adj_val == (uint32_t)-1)
+		return -FDT_ERR_NOPHANDLES;
+
+	return fdt_setprop_inplace_u32(fdt, node, name, adj_val);
+}
+
+/**
+ * overlay_adjust_node_phandles - Offsets the phandles of a node
+ * @fdto: Device tree overlay blob
+ * @node: Offset of the node we want to adjust
+ * @delta: Offset to shift the phandles of
+ *
+ * overlay_adjust_node_phandles() adds a constant to all the phandles
+ * of a given node. This is mainly use as part of the overlay
+ * application process, when we want to update all the overlay
+ * phandles to not conflict with the overlays of the base device tree.
+ *
+ * returns:
+ *      0 on success
+ *      Negative error code on failure
+ */
+static int overlay_adjust_node_phandles(void *fdto, int node,
+					uint32_t delta)
+{
+	int child;
+	int ret;
+
+	ret = overlay_phandle_add_offset(fdto, node, "phandle", delta);
+	if (ret && ret != -FDT_ERR_NOTFOUND)
+		return ret;
+
+	ret = overlay_phandle_add_offset(fdto, node, "linux,phandle", delta);
+	if (ret && ret != -FDT_ERR_NOTFOUND)
+		return ret;
+
+	fdt_for_each_subnode(child, fdto, node) {
+		ret = overlay_adjust_node_phandles(fdto, child, delta);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+/**
+ * overlay_adjust_local_phandles - Adjust the phandles of a whole overlay
+ * @fdto: Device tree overlay blob
+ * @delta: Offset to shift the phandles of
+ *
+ * overlay_adjust_local_phandles() adds a constant to all the
+ * phandles of an overlay. This is mainly use as part of the overlay
+ * application process, when we want to update all the overlay
+ * phandles to not conflict with the overlays of the base device tree.
+ *
+ * returns:
+ *      0 on success
+ *      Negative error code on failure
+ */
+static int overlay_adjust_local_phandles(void *fdto, uint32_t delta)
+{
+	/*
+	 * Start adjusting the phandles from the overlay root
+	 */
+	return overlay_adjust_node_phandles(fdto, 0, delta);
+}
+
+/**
+ * overlay_update_local_node_references - Adjust the overlay references
+ * @fdto: Device tree overlay blob
+ * @tree_node: Node offset of the node to operate on
+ * @fixup_node: Node offset of the matching local fixups node
+ * @delta: Offset to shift the phandles of
+ *
+ * overlay_update_local_nodes_references() update the phandles
+ * pointing to a node within the device tree overlay by adding a
+ * constant delta.
+ *
+ * This is mainly used as part of a device tree application process,
+ * where you want the device tree overlays phandles to not conflict
+ * with the ones from the base device tree before merging them.
+ *
+ * returns:
+ *      0 on success
+ *      Negative error code on failure
+ */
+static int overlay_update_local_node_references(void *fdto,
+						int tree_node,
+						int fixup_node,
+						uint32_t delta)
+{
+	int fixup_prop;
+	int fixup_child;
+	int ret;
+
+	fdt_for_each_property_offset(fixup_prop, fdto, fixup_node) {
+		const fdt32_t *fixup_val;
+		const char *tree_val;
+		const char *name;
+		int fixup_len;
+		int tree_len;
+		int i;
+
+		fixup_val = fdt_getprop_by_offset(fdto, fixup_prop,
+						  &name, &fixup_len);
+		if (!fixup_val)
+			return fixup_len;
+
+		if (fixup_len % sizeof(uint32_t))
+			return -FDT_ERR_BADOVERLAY;
+
+		tree_val = fdt_getprop(fdto, tree_node, name, &tree_len);
+		if (!tree_val) {
+			if (tree_len == -FDT_ERR_NOTFOUND)
+				return -FDT_ERR_BADOVERLAY;
+
+			return tree_len;
+		}
+
+		for (i = 0; i < (fixup_len / sizeof(uint32_t)); i++) {
+			fdt32_t adj_val;
+			uint32_t poffset;
+
+			poffset = fdt32_to_cpu(fixup_val[i]);
+
+			/*
+			 * phandles to fixup can be unaligned.
+			 *
+			 * Use a memcpy for the architectures that do
+			 * not support unaligned accesses.
+			 */
+			memcpy(&adj_val, tree_val + poffset, sizeof(adj_val));
+
+			adj_val = cpu_to_fdt32(fdt32_to_cpu(adj_val) + delta);
+
+			ret = fdt_setprop_inplace_namelen_partial(fdto,
+								  tree_node,
+								  name,
+								  strlen(name),
+								  poffset,
+								  &adj_val,
+								  sizeof(adj_val));
+			if (ret == -FDT_ERR_NOSPACE)
+				return -FDT_ERR_BADOVERLAY;
+
+			if (ret)
+				return ret;
+		}
+	}
+
+	fdt_for_each_subnode(fixup_child, fdto, fixup_node) {
+		const char *fixup_child_name = fdt_get_name(fdto, fixup_child,
+							    NULL);
+		int tree_child;
+
+		tree_child = fdt_subnode_offset(fdto, tree_node,
+						fixup_child_name);
+		if (tree_child == -FDT_ERR_NOTFOUND)
+			return -FDT_ERR_BADOVERLAY;
+		if (tree_child < 0)
+			return tree_child;
+
+		ret = overlay_update_local_node_references(fdto,
+							   tree_child,
+							   fixup_child,
+							   delta);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+/**
+ * overlay_update_local_references - Adjust the overlay references
+ * @fdto: Device tree overlay blob
+ * @delta: Offset to shift the phandles of
+ *
+ * overlay_update_local_references() update all the phandles pointing
+ * to a node within the device tree overlay by adding a constant
+ * delta to not conflict with the base overlay.
+ *
+ * This is mainly used as part of a device tree application process,
+ * where you want the device tree overlays phandles to not conflict
+ * with the ones from the base device tree before merging them.
+ *
+ * returns:
+ *      0 on success
+ *      Negative error code on failure
+ */
+static int overlay_update_local_references(void *fdto, uint32_t delta)
+{
+	int fixups;
+
+	fixups = fdt_path_offset(fdto, "/__local_fixups__");
+	if (fixups < 0) {
+		/* There's no local phandles to adjust, bail out */
+		if (fixups == -FDT_ERR_NOTFOUND)
+			return 0;
+
+		return fixups;
+	}
+
+	/*
+	 * Update our local references from the root of the tree
+	 */
+	return overlay_update_local_node_references(fdto, 0, fixups,
+						    delta);
+}
+
+/**
+ * overlay_fixup_one_phandle - Set an overlay phandle to the base one
+ * @fdt: Base Device Tree blob
+ * @fdto: Device tree overlay blob
+ * @symbols_off: Node offset of the symbols node in the base device tree
+ * @path: Path to a node holding a phandle in the overlay
+ * @path_len: number of path characters to consider
+ * @name: Name of the property holding the phandle reference in the overlay
+ * @name_len: number of name characters to consider
+ * @poffset: Offset within the overlay property where the phandle is stored
+ * @label: Label of the node referenced by the phandle
+ *
+ * overlay_fixup_one_phandle() resolves an overlay phandle pointing to
+ * a node in the base device tree.
+ *
+ * This is part of the device tree overlay application process, when
+ * you want all the phandles in the overlay to point to the actual
+ * base dt nodes.
+ *
+ * returns:
+ *      0 on success
+ *      Negative error code on failure
+ */
+static int overlay_fixup_one_phandle(void *fdt, void *fdto,
+				     int symbols_off,
+				     const char *path, uint32_t path_len,
+				     const char *name, uint32_t name_len,
+				     int poffset, const char *label)
+{
+	const char *symbol_path;
+	uint32_t phandle;
+	fdt32_t phandle_prop;
+	int symbol_off, fixup_off;
+	int prop_len;
+
+	if (symbols_off < 0)
+		return symbols_off;
+
+	symbol_path = fdt_getprop(fdt, symbols_off, label,
+				  &prop_len);
+	if (!symbol_path)
+		return prop_len;
+
+	symbol_off = fdt_path_offset(fdt, symbol_path);
+	if (symbol_off < 0)
+		return symbol_off;
+
+	phandle = fdt_get_phandle(fdt, symbol_off);
+	if (!phandle)
+		return -FDT_ERR_NOTFOUND;
+
+	fixup_off = fdt_path_offset_namelen(fdto, path, path_len);
+	if (fixup_off == -FDT_ERR_NOTFOUND)
+		return -FDT_ERR_BADOVERLAY;
+	if (fixup_off < 0)
+		return fixup_off;
+
+	phandle_prop = cpu_to_fdt32(phandle);
+	return fdt_setprop_inplace_namelen_partial(fdto, fixup_off,
+						   name, name_len, poffset,
+						   &phandle_prop,
+						   sizeof(phandle_prop));
+};
+
+/**
+ * overlay_fixup_phandle - Set an overlay phandle to the base one
+ * @fdt: Base Device Tree blob
+ * @fdto: Device tree overlay blob
+ * @symbols_off: Node offset of the symbols node in the base device tree
+ * @property: Property offset in the overlay holding the list of fixups
+ *
+ * overlay_fixup_phandle() resolves all the overlay phandles pointed
+ * to in a __fixups__ property, and updates them to match the phandles
+ * in use in the base device tree.
+ *
+ * This is part of the device tree overlay application process, when
+ * you want all the phandles in the overlay to point to the actual
+ * base dt nodes.
+ *
+ * returns:
+ *      0 on success
+ *      Negative error code on failure
+ */
+static int overlay_fixup_phandle(void *fdt, void *fdto, int symbols_off,
+				 int property)
+{
+	const char *value;
+	const char *label;
+	int len;
+
+	value = fdt_getprop_by_offset(fdto, property,
+				      &label, &len);
+	if (!value) {
+		if (len == -FDT_ERR_NOTFOUND)
+			return -FDT_ERR_INTERNAL;
+
+		return len;
+	}
+
+	do {
+		const char *path, *name, *fixup_end;
+		const char *fixup_str = value;
+		uint32_t path_len, name_len;
+		uint32_t fixup_len;
+		char *sep, *endptr;
+		int poffset, ret;
+
+		fixup_end = memchr(value, '\0', len);
+		if (!fixup_end)
+			return -FDT_ERR_BADOVERLAY;
+		fixup_len = fixup_end - fixup_str;
+
+		len -= fixup_len + 1;
+		value += fixup_len + 1;
+
+		path = fixup_str;
+		sep = memchr(fixup_str, ':', fixup_len);
+		if (!sep || *sep != ':')
+			return -FDT_ERR_BADOVERLAY;
+
+		path_len = sep - path;
+		if (path_len == (fixup_len - 1))
+			return -FDT_ERR_BADOVERLAY;
+
+		fixup_len -= path_len + 1;
+		name = sep + 1;
+		sep = memchr(name, ':', fixup_len);
+		if (!sep || *sep != ':')
+			return -FDT_ERR_BADOVERLAY;
+
+		name_len = sep - name;
+		if (!name_len)
+			return -FDT_ERR_BADOVERLAY;
+
+		poffset = strtoul(sep + 1, &endptr, 10);
+		if ((*endptr != '\0') || (endptr <= (sep + 1)))
+			return -FDT_ERR_BADOVERLAY;
+
+		ret = overlay_fixup_one_phandle(fdt, fdto, symbols_off,
+						path, path_len, name, name_len,
+						poffset, label);
+		if (ret)
+			return ret;
+	} while (len > 0);
+
+	return 0;
+}
+
+/**
+ * overlay_fixup_phandles - Resolve the overlay phandles to the base
+ *                          device tree
+ * @fdt: Base Device Tree blob
+ * @fdto: Device tree overlay blob
+ *
+ * overlay_fixup_phandles() resolves all the overlay phandles pointing
+ * to nodes in the base device tree.
+ *
+ * This is one of the steps of the device tree overlay application
+ * process, when you want all the phandles in the overlay to point to
+ * the actual base dt nodes.
+ *
+ * returns:
+ *      0 on success
+ *      Negative error code on failure
+ */
+static int overlay_fixup_phandles(void *fdt, void *fdto)
+{
+	int fixups_off, symbols_off;
+	int property;
+
+	/* We can have overlays without any fixups */
+	fixups_off = fdt_path_offset(fdto, "/__fixups__");
+	if (fixups_off == -FDT_ERR_NOTFOUND)
+		return 0; /* nothing to do */
+	if (fixups_off < 0)
+		return fixups_off;
+
+	/* And base DTs without symbols */
+	symbols_off = fdt_path_offset(fdt, "/__symbols__");
+	if ((symbols_off < 0 && (symbols_off != -FDT_ERR_NOTFOUND)))
+		return symbols_off;
+
+	fdt_for_each_property_offset(property, fdto, fixups_off) {
+		int ret;
+
+		ret = overlay_fixup_phandle(fdt, fdto, symbols_off, property);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+/**
+ * overlay_apply_node - Merges a node into the base device tree
+ * @fdt: Base Device Tree blob
+ * @target: Node offset in the base device tree to apply the fragment to
+ * @fdto: Device tree overlay blob
+ * @node: Node offset in the overlay holding the changes to merge
+ *
+ * overlay_apply_node() merges a node into a target base device tree
+ * node pointed.
+ *
+ * This is part of the final step in the device tree overlay
+ * application process, when all the phandles have been adjusted and
+ * resolved and you just have to merge overlay into the base device
+ * tree.
+ *
+ * returns:
+ *      0 on success
+ *      Negative error code on failure
+ */
+static int overlay_apply_node(void *fdt, int target,
+			      void *fdto, int node)
+{
+	int property;
+	int subnode;
+
+	fdt_for_each_property_offset(property, fdto, node) {
+		const char *name;
+		const void *prop;
+		int prop_len;
+		int ret;
+
+		prop = fdt_getprop_by_offset(fdto, property, &name,
+					     &prop_len);
+		if (prop_len == -FDT_ERR_NOTFOUND)
+			return -FDT_ERR_INTERNAL;
+		if (prop_len < 0)
+			return prop_len;
+
+		ret = fdt_setprop(fdt, target, name, prop, prop_len);
+		if (ret)
+			return ret;
+	}
+
+	fdt_for_each_subnode(subnode, fdto, node) {
+		const char *name = fdt_get_name(fdto, subnode, NULL);
+		int nnode;
+		int ret;
+
+		nnode = fdt_add_subnode(fdt, target, name);
+		if (nnode == -FDT_ERR_EXISTS) {
+			nnode = fdt_subnode_offset(fdt, target, name);
+			if (nnode == -FDT_ERR_NOTFOUND)
+				return -FDT_ERR_INTERNAL;
+		}
+
+		if (nnode < 0)
+			return nnode;
+
+		ret = overlay_apply_node(fdt, nnode, fdto, subnode);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+/**
+ * overlay_merge - Merge an overlay into its base device tree
+ * @fdt: Base Device Tree blob
+ * @fdto: Device tree overlay blob
+ *
+ * overlay_merge() merges an overlay into its base device tree.
+ *
+ * This is the next to last step in the device tree overlay application
+ * process, when all the phandles have been adjusted and resolved and
+ * you just have to merge overlay into the base device tree.
+ *
+ * returns:
+ *      0 on success
+ *      Negative error code on failure
+ */
+static int overlay_merge(void *fdt, void *fdto)
+{
+	int fragment;
+
+	fdt_for_each_subnode(fragment, fdto, 0) {
+		int overlay;
+		int target;
+		int ret;
+
+		/*
+		 * Each fragments will have an __overlay__ node. If
+		 * they don't, it's not supposed to be merged
+		 */
+		overlay = fdt_subnode_offset(fdto, fragment, "__overlay__");
+		if (overlay == -FDT_ERR_NOTFOUND)
+			continue;
+
+		if (overlay < 0)
+			return overlay;
+
+		target = overlay_get_target(fdt, fdto, fragment, NULL);
+		if (target < 0)
+			return target;
+
+		ret = overlay_apply_node(fdt, target, fdto, overlay);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+static int get_path_len(const void *fdt, int nodeoffset)
+{
+	int len = 0, namelen;
+	const char *name;
+
+	FDT_CHECK_HEADER(fdt);
+
+	for (;;) {
+		name = fdt_get_name(fdt, nodeoffset, &namelen);
+		if (!name)
+			return namelen;
+
+		/* root? we're done */
+		if (namelen == 0)
+			break;
+
+		nodeoffset = fdt_parent_offset(fdt, nodeoffset);
+		if (nodeoffset < 0)
+			return nodeoffset;
+		len += namelen + 1;
+	}
+
+	/* in case of root pretend it's "/" */
+	if (len == 0)
+		len++;
+	return len;
+}
+
+/**
+ * overlay_symbol_update - Update the symbols of base tree after a merge
+ * @fdt: Base Device Tree blob
+ * @fdto: Device tree overlay blob
+ *
+ * overlay_symbol_update() updates the symbols of the base tree with the
+ * symbols of the applied overlay
+ *
+ * This is the last step in the device tree overlay application
+ * process, allowing the reference of overlay symbols by subsequent
+ * overlay operations.
+ *
+ * returns:
+ *      0 on success
+ *      Negative error code on failure
+ */
+static int overlay_symbol_update(void *fdt, void *fdto)
+{
+	int root_sym, ov_sym, prop, path_len, fragment, target;
+	int len, frag_name_len, ret, rel_path_len;
+	const char *s, *e;
+	const char *path;
+	const char *name;
+	const char *frag_name;
+	const char *rel_path;
+	const char *target_path;
+	char *buf;
+	void *p;
+
+	ov_sym = fdt_subnode_offset(fdto, 0, "__symbols__");
+
+	/* if no overlay symbols exist no problem */
+	if (ov_sym < 0)
+		return 0;
+
+	root_sym = fdt_subnode_offset(fdt, 0, "__symbols__");
+
+	/* it no root symbols exist we should create them */
+	if (root_sym == -FDT_ERR_NOTFOUND)
+		root_sym = fdt_add_subnode(fdt, 0, "__symbols__");
+
+	/* any error is fatal now */
+	if (root_sym < 0)
+		return root_sym;
+
+	/* iterate over each overlay symbol */
+	fdt_for_each_property_offset(prop, fdto, ov_sym) {
+		path = fdt_getprop_by_offset(fdto, prop, &name, &path_len);
+		if (!path)
+			return path_len;
+
+		/* verify it's a string property (terminated by a single \0) */
+		if (path_len < 1 || memchr(path, '\0', path_len) != &path[path_len - 1])
+			return -FDT_ERR_BADVALUE;
+
+		/* keep end marker to avoid strlen() */
+		e = path + path_len;
+
+		/* format: /<fragment-name>/__overlay__/<relative-subnode-path> */
+
+		if (*path != '/')
+			return -FDT_ERR_BADVALUE;
+
+		/* get fragment name first */
+		s = strchr(path + 1, '/');
+		if (!s)
+			return -FDT_ERR_BADOVERLAY;
+
+		frag_name = path + 1;
+		frag_name_len = s - path - 1;
+
+		/* verify format; safe since "s" lies in \0 terminated prop */
+		len = sizeof("/__overlay__/") - 1;
+		if ((e - s) < len || memcmp(s, "/__overlay__/", len))
+			return -FDT_ERR_BADOVERLAY;
+
+		rel_path = s + len;
+		rel_path_len = e - rel_path;
+
+		/* find the fragment index in which the symbol lies */
+		ret = fdt_subnode_offset_namelen(fdto, 0, frag_name,
+					       frag_name_len);
+		/* not found? */
+		if (ret < 0)
+			return -FDT_ERR_BADOVERLAY;
+		fragment = ret;
+
+		/* an __overlay__ subnode must exist */
+		ret = fdt_subnode_offset(fdto, fragment, "__overlay__");
+		if (ret < 0)
+			return -FDT_ERR_BADOVERLAY;
+
+		/* get the target of the fragment */
+		ret = overlay_get_target(fdt, fdto, fragment, &target_path);
+		if (ret < 0)
+			return ret;
+		target = ret;
+
+		/* if we have a target path use */
+		if (!target_path) {
+			ret = get_path_len(fdt, target);
+			if (ret < 0)
+				return ret;
+			len = ret;
+		} else {
+			len = strlen(target_path);
+		}
+
+		ret = fdt_setprop_placeholder(fdt, root_sym, name,
+				len + (len > 1) + rel_path_len + 1, &p);
+		if (ret < 0)
+			return ret;
+
+		if (!target_path) {
+			/* again in case setprop_placeholder changed it */
+			ret = overlay_get_target(fdt, fdto, fragment, &target_path);
+			if (ret < 0)
+				return ret;
+			target = ret;
+		}
+
+		buf = p;
+		if (len > 1) { /* target is not root */
+			if (!target_path) {
+				ret = fdt_get_path(fdt, target, buf, len + 1);
+				if (ret < 0)
+					return ret;
+			} else
+				memcpy(buf, target_path, len + 1);
+
+		} else
+			len--;
+
+		buf[len] = '/';
+		memcpy(buf + len + 1, rel_path, rel_path_len);
+		buf[len + 1 + rel_path_len] = '\0';
+	}
+
+	return 0;
+}
+
+int fdt_overlay_apply(void *fdt, void *fdto)
+{
+	uint32_t delta = fdt_get_max_phandle(fdt);
+	int ret;
+
+	FDT_CHECK_HEADER(fdt);
+	FDT_CHECK_HEADER(fdto);
+
+	ret = overlay_adjust_local_phandles(fdto, delta);
+	if (ret)
+		goto err;
+
+	ret = overlay_update_local_references(fdto, delta);
+	if (ret)
+		goto err;
+
+	ret = overlay_fixup_phandles(fdt, fdto);
+	if (ret)
+		goto err;
+
+	ret = overlay_merge(fdt, fdto);
+	if (ret)
+		goto err;
+
+	ret = overlay_symbol_update(fdt, fdto);
+	if (ret)
+		goto err;
+
+	/*
+	 * The overlay has been damaged, erase its magic.
+	 */
+	fdt_set_magic(fdto, ~0);
+
+	return 0;
+
+err:
+	/*
+	 * The overlay might have been damaged, erase its magic.
+	 */
+	fdt_set_magic(fdto, ~0);
+
+	/*
+	 * The base device tree might have been damaged, erase its
+	 * magic.
+	 */
+	fdt_set_magic(fdt, ~0);
+
+	return ret;
+}
diff --git a/scripts/dtc/livetree.c b/scripts/dtc/livetree.c
index aecd27875f..6846ad2fd6 100644
--- a/scripts/dtc/livetree.c
+++ b/scripts/dtc/livetree.c
@@ -216,6 +216,28 @@ struct node *merge_nodes(struct node *old_node, struct node *new_node)
 	return old_node;
 }
 
+void add_orphan_node(struct node *dt, struct node *new_node, char *ref)
+{
+	static unsigned int next_orphan_fragment = 0;
+	struct node *node;
+	struct property *p;
+	struct data d = empty_data;
+	char *name;
+
+	d = data_add_marker(d, REF_PHANDLE, ref);
+	d = data_append_integer(d, 0xffffffff, 32);
+
+	p = build_property("target", d);
+
+	xasprintf(&name, "fragment@%u",
+			next_orphan_fragment++);
+	name_node(new_node, "__overlay__");
+	node = build_node(p, new_node);
+	name_node(node, name);
+
+	add_child(dt, node);
+}
+
 struct node *chain_node(struct node *first, struct node *list)
 {
 	assert(first->next_sibling == NULL);
@@ -396,6 +418,12 @@ cell_t propval_cell(struct property *prop)
 	return fdt32_to_cpu(*((fdt32_t *)prop->val.val));
 }
 
+cell_t propval_cell_n(struct property *prop, int n)
+{
+	assert(prop->val.len / sizeof(cell_t) >= n);
+	return fdt32_to_cpu(*((fdt32_t *)prop->val.val + n));
+}
+
 struct property *get_property_by_label(struct node *tree, const char *label,
 				       struct node **node)
 {
diff --git a/scripts/dtc/version_gen.h b/scripts/dtc/version_gen.h
index b5ed715ecc..d88393cab1 100644
--- a/scripts/dtc/version_gen.h
+++ b/scripts/dtc/version_gen.h
@@ -1 +1 @@
-#define DTC_VERSION "DTC 1.4.4-gfe50bd1e"
+#define DTC_VERSION "DTC 1.4.5-gb1a60033"

commit b7638540ee9cddd54bd6d038d26a4d80e08a85e0
Author: Rob Herring <robh@kernel.org>
Date:   Tue Oct 17 13:42:41 2017 +0900

    UPSTREAM: scripts/dtc: add fdt_overlay.c and fdt_addresses.c to sync script
    
    libfdt has gained some new files. We need to include them in the
    kernel's copy.
    
    Change-Id: Ie2524f28391c57f5b3ac86d72e93b94e89ea7347
    Reported-by: Kyle Yan <kyan@codeaurora.org>
    Signed-off-by: Rob Herring <robh@kernel.org>
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    [ Linux commit: 4322323058f010274564006d61945187a15b6361 ]
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 0d8216182388a5e485aa84b3175ea87d8f9b57c5)

diff --git a/scripts/dtc/update-dtc-source.sh b/scripts/dtc/update-dtc-source.sh
index b8ebcc6722..f3e5c59605 100755
--- a/scripts/dtc/update-dtc-source.sh
+++ b/scripts/dtc/update-dtc-source.sh
@@ -34,7 +34,9 @@ DTC_SOURCE="checks.c data.c dtc.c dtc.h flattree.c fstree.c livetree.c srcpos.c
 		srcpos.h treesource.c util.c util.h version_gen.h Makefile.dtc \
 		dtc-lexer.l dtc-parser.y"
 DTC_GENERATED="dtc-lexer.lex.c dtc-parser.tab.c dtc-parser.tab.h"
-LIBFDT_SOURCE="Makefile.libfdt fdt.c fdt.h fdt_empty_tree.c fdt_ro.c fdt_rw.c fdt_strerror.c fdt_sw.c fdt_wip.c libfdt.h libfdt_env.h libfdt_internal.h"
+LIBFDT_SOURCE="Makefile.libfdt fdt.c fdt.h fdt_addresses.c fdt_empty_tree.c \
+		fdt_overlay.c fdt_ro.c fdt_rw.c fdt_strerror.c fdt_sw.c \
+		fdt_wip.c libfdt.h libfdt_env.h libfdt_internal.h"
 
 get_last_dtc_version() {
 	git log --oneline scripts/dtc/ | grep 'upstream' | head -1 | sed -e 's/^.* \(.*\)/\1/'

commit 726c9bee546e77897a0e4fb23a6622d2bf55c23f
Author: André Draszik <adraszik@tycoint.com>
Date:   Tue Oct 3 16:55:51 2017 +0100

    UPSTREAM: tpm: fix reading of permanent flags
    
    The offset of the permanent flags structure is in a different
    place in the response compared to what the code is doing,
    which gives us a completely useless result.
    
    Fix by replacing hand-crafted code with generic parser
    infrastructure.
    
    Change-Id: I29e8e1ec7c8ae04d2bf9815290064a54a68c2b88
    Signed-off-by: André Draszik <adraszik@tycoint.com>
    Acked-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit e8155dfe33eb2b3e538e8717d6578c1d08651454)

diff --git a/lib/tpm.c b/lib/tpm.c
index d1cf5a8a16..5659fa5e18 100644
--- a/lib/tpm.c
+++ b/lib/tpm.c
@@ -607,14 +607,24 @@ uint32_t tpm_get_permanent_flags(struct tpm_permanent_flags *pflags)
 		0x0, 0x0, 0x0, 0x4,	/* subcap size */
 		0x0, 0x0, 0x1, 0x8,	/* subcap value */
 	};
+	const size_t data_size_offset = TPM_HEADER_SIZE;
+	const size_t data_offset = TPM_HEADER_SIZE + sizeof (uint32_t);
 	uint8_t response[COMMAND_BUFFER_SIZE];
 	size_t response_length = sizeof(response);
 	uint32_t err;
+	uint32_t data_size;
 
 	err = tpm_sendrecv_command(command, response, &response_length);
 	if (err)
 		return err;
-	memcpy(pflags, response + TPM_HEADER_SIZE, sizeof(*pflags));
+	if (unpack_byte_string(response, response_length, "d",
+			       data_size_offset, &data_size))
+		return TPM_LIB_ERROR;
+	if (data_size < sizeof(*pflags))
+		return TPM_LIB_ERROR;
+	if (unpack_byte_string(response, response_length, "s",
+			       data_offset, pflags, sizeof(*pflags)))
+		return TPM_LIB_ERROR;
 
 	return 0;
 }

commit 75ee777bcdfcf1cd0e96036a6f50f0811675a36e
Author: André Draszik <adraszik@tycoint.com>
Date:   Tue Oct 3 16:55:50 2017 +0100

    UPSTREAM: SPL: fix printing of image name
    
    The maximum length of the name of the image is
    obviously not sizeof(), which is just the
    length of a pointer, but IH_NMLEN.
    
    fixes: 62cf11c0921a90c6bd62344f4bc069668e6c698c
    ("SPL: Limit image name print length")
    
    Change-Id: I948dee1b9a4e1ddfbb122475e2d209cc26dec9d0
    Signed-off-by: André Draszik <adraszik@tycoint.com>
    Acked-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 3fe3839acc4a5d9b1af9b2ab3884b0d3f2e23370)

diff --git a/common/spl/spl.c b/common/spl/spl.c
index 057d3aa140..0b5b1a9a33 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -154,7 +154,7 @@ int spl_parse_image_header(struct spl_image_info *spl_image,
 		spl_image->os = image_get_os(header);
 		spl_image->name = image_get_name(header);
 		debug("spl: payload image: %.*s load addr: 0x%lx size: %d\n",
-			(int)sizeof(spl_image->name), spl_image->name,
+			IH_NMLEN, spl_image->name,
 			spl_image->load_addr, spl_image->size);
 #else
 		/* LEGACY image not supported */

commit 1abc22cc20b3ae35876bf013c8b84304a5fc249a
Author: Simon Glass <sjg@chromium.org>
Date:   Thu Sep 28 06:35:15 2017 -0600

    UPSTREAM: dm: core: Correct address cast in dev_read_addr_ptr()
    
    This currently causes a warning in sandbox and will not do the right
    thing:
    
    drivers/core/read.c: In function ‘dev_read_addr_ptr’:
    drivers/core/read.c:64:44: warning: cast to pointer from integer of
            different size [-Wint-to-pointer-cast]
      return (addr == FDT_ADDR_T_NONE) ? NULL : (void *)addr;
    
    Use map_sysmem() which is the correct way to convert an address to a
    pointer.
    
    Fixes: c131c8bca8 (dm: core: add dev_read_addr_ptr())
    Change-Id: Ic8ef1cb185d98d84dc6cf35a7001dcdcb4caa849
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Tested-by: Bin Meng <bmeng.cn@gmail.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 8ccc2db6e84244e5cb57885dc9dfd7e752071b98)

diff --git a/drivers/core/read.c b/drivers/core/read.c
index eacf1716fd..5d440cee72 100644
--- a/drivers/core/read.c
+++ b/drivers/core/read.c
@@ -7,6 +7,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <mapmem.h>
 #include <dm/of_access.h>
 
 int dev_read_u32_default(struct udevice *dev, const char *propname, int def)
@@ -61,7 +62,7 @@ void *dev_read_addr_ptr(struct udevice *dev)
 {
 	fdt_addr_t addr = dev_read_addr(dev);
 
-	return (addr == FDT_ADDR_T_NONE) ? NULL : (void *)addr;
+	return (addr == FDT_ADDR_T_NONE) ? NULL : map_sysmem(addr, 0);
 }
 
 fdt_addr_t dev_read_addr_size(struct udevice *dev, const char *property,

commit 853f31c42c04b6cd006a1204bad61e5d6aff3501
Author: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Date:   Thu Sep 28 11:29:52 2017 +0200

    UPSTREAM: cmd/fdt.c align data buffer to avoid unaligned word access
    
    Since the compiler is free to place a char array to any address in
    memory (in this case the stack), also to a non word aligned address the
    function "fdt_prop_parse" runs into troubles upon it wants to write some
    (fdt32_t *) to such a variable (if it has been placed to a none word
    aligned address).
    
    To avoid this we tell the compiler to always align this scratchpad to a
    word aligned address.
    
    Change-Id: I6ea64827a9c245db4ba2a2ff522aaddea647c2f2
    Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
    Reviewed-by: Hannes Schmelzer <oe5hpm@oevsv.at>
    Tested-by: Hannes Schmelzer <oe5hpm@oevsv.at>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 6dfd65f81fd060a85c961a84f85a286e8e96332c)

diff --git a/cmd/fdt.c b/cmd/fdt.c
index 955a0088c6..b783b0df42 100644
--- a/cmd/fdt.c
+++ b/cmd/fdt.c
@@ -256,7 +256,7 @@ static int do_fdt(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 		char *pathp;		/* path */
 		char *prop;		/* property */
 		int  nodeoffset;	/* node offset from libfdt */
-		static char data[SCRATCHPAD];	/* storage for the property */
+		static char data[SCRATCHPAD] __aligned(4);/* property storage */
 		const void *ptmp;
 		int  len;		/* new length of the property */
 		int  ret;		/* return value */

commit 446fcf5177656062d9f14d04d91fcd73d0a00c55
Author: Jagan Teki <jagannadh.teki@gmail.com>
Date:   Fri Nov 10 17:18:44 2017 +0530

    UPSTREAM: rockchip: configs: vyasa: Update falcon offsets
    
    Update the falcon offsets for args to 16MB and kernel to 17MB
    Since the below commit updated U-Boot proper location along
    with rockchip boot image offsets
    "spl: set SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR to 0x4000 for rockchip"
    (sha1: 8f4d62b403db45dfa8b1cadb9da9096c79b7df47)
    
    Change-Id: I545ebd5a6f74a03c54039db9123d357f61b2b82b
    Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 36b6e0cc3ca9deea0ea02c10e44bda8979c94637)

diff --git a/include/configs/vyasa-rk3288.h b/include/configs/vyasa-rk3288.h
index 8774e42430..c8c7fc7f3e 100644
--- a/include/configs/vyasa-rk3288.h
+++ b/include/configs/vyasa-rk3288.h
@@ -31,10 +31,10 @@
 #define CONFIG_SYS_SPL_ARGS_ADDR	0x0ffe5000
 #define CONFIG_CMD_SPL_WRITE_SIZE      (128 * SZ_1K)
 
-/* Falcon Mode - MMC support: args@1MB kernel@2MB */
-#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR  0x800   /* 1MB */
-#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512)
-#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR        0x1000  /* 2MB */
+/* Falcon Mode - MMC support: args@16MB kernel@17MB */
+#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR		0x8000	/* 16MB */
+#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS		(CONFIG_CMD_SPL_WRITE_SIZE / 512)
+#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR		0x8800	/* 17MB */
 #endif
 
 #endif

commit ee7d8e94419d2f274aefd4d3c53bbfe81b04431c
Author: Jagan Teki <jagannadh.teki@gmail.com>
Date:   Fri Nov 10 17:18:43 2017 +0530

    UPSTREAM: rockchip: doc: Fix U-Boot proper location for falcon
    
    This patch fixed U-Boot proper location has been
    missed to update in bewlo commit
    "rockchip: doc: update U-Boot location info"
    (sha1: 73e6dbe855f357a8330cfd53ff3033303611c1ad)
    
    Change-Id: I87377968a30e84f23eaf3b4f333fc4fd766709c8
    Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit d80599e8946f52c10b1069054ff30ade97c79091)

diff --git a/doc/README.rockchip b/doc/README.rockchip
index 4f665ef310..597f068aca 100644
--- a/doc/README.rockchip
+++ b/doc/README.rockchip
@@ -166,7 +166,7 @@ To write an image that boots from an SD card (assumed to be /dev/mmcblk0):
    ./tools/mkimage -n rk3288 -T rksd -d ./tpl/u-boot-tpl.bin out &&
     cat ./spl/u-boot-spl-dtb.bin >> out &&
     sudo dd if=out of=/dev/mmcblk0 seek=64 &&
-    sudo dd if=u-boot-dtb.img of=/dev/mmcblk0 seek=256
+    sudo dd if=u-boot-dtb.img of=/dev/mmcblk0 seek=16384
 
 Booting from an SD card on RK3188
 =================================

commit 9d7e51fd332a12930bf573a624604b44bdb0c54f
Author: Goldschmidt Simon <sgoldschmidt@de.pepperl-fuchs.com>
Date:   Fri Nov 10 11:38:32 2017 +0000

    UPSTREAM: rockchip: doc: update U-Boot location info
    
    The U-Boot location has been moved to block 16384.
    This is 8MB, not 4MB.
    
    Change-Id: I899466db29ba9a2e0526131cfdb6c49d5004ce98
    Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 341e44ed667a1ac959fac0830e5f6e2e2b409f9a)

diff --git a/doc/README.rockchip b/doc/README.rockchip
index 4a84f3b22e..4f665ef310 100644
--- a/doc/README.rockchip
+++ b/doc/README.rockchip
@@ -102,7 +102,7 @@ To write an image that boots from an SD card (assumed to be /dev/sdc):
    sudo dd if=firefly-rk3288/u-boot-dtb.img of=/dev/sdc seek=16384
 
 This puts the Rockchip header and SPL image first and then places the U-Boot
-image at block 16384 (i.e. 4MB from the start of the SD card). This
+image at block 16384 (i.e. 8MB from the start of the SD card). This
 corresponds with this setting in U-Boot:
 
    #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x4000

commit bf88a4e1578101449e98726935a38b4b48136111
Author: Klaus Goger <klaus.goger@theobroma-systems.com>
Date:   Mon Nov 6 23:02:56 2017 +0100

    rockchip: board: puma_rk3399: make env location selectable via Kconfig
    
    The environment storage location is selectable via Kconfig. We support
    eMMC, SD and SPI-NOR as location for U-Boot. This adds support to store
    the environment in the SPI-NOR additional to the default eMMC location.
    
    Change-Id: Iffbda80bf04469fc2beb4d1912e710c357035e48
    Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit b5557ffc0f751214d26e55da16396d9bfe29f485)

diff --git a/include/configs/puma_rk3399.h b/include/configs/puma_rk3399.h
index cfc31f4e77..949f7568ba 100644
--- a/include/configs/puma_rk3399.h
+++ b/include/configs/puma_rk3399.h
@@ -9,7 +9,23 @@
 
 #include <configs/rk3399_common.h>
 
+/*
+ * SPL @ 32kB for ~130kB
+ * ENV @ 240KB for 8kB
+ * FIT payload (ATF, U-Boot, FDT) @ 256kB
+ */
+#undef CONFIG_ENV_OFFSET
+#define CONFIG_ENV_OFFSET (240 * 1024)
+
+#if defined(CONFIG_ENV_IS_IN_MMC)
 #define CONFIG_SYS_MMC_ENV_DEV 1
+#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
+#define CONFIG_ENV_SECT_SIZE		(8 * 1024)
+#define CONFIG_ENV_SPI_BUS		CONFIG_SF_DEFAULT_BUS
+#define CONFIG_ENV_SPI_CS		CONFIG_SF_DEFAULT_CS
+#define CONFIG_ENV_SPI_MODE		CONFIG_SF_DEFAULT_MODE
+#define CONFIG_ENV_SPI_MAX_HZ	CONFIG_SF_DEFAULT_SPEED
+#endif
 
 #define SDRAM_BANK_SIZE			(2UL << 30)
 

commit 352ddda1bd51608941ba781075a412e95b42a162
Author: Klaus Goger <klaus.goger@theobroma-systems.com>
Date:   Mon Nov 6 23:02:55 2017 +0100

    UPSTREAM: rockchip: dts: rk3399: change sd-card io voltage to 3.0V
    
    The VCC_SD and VCC_SDIO rail should only be powered up to 3.0V on RK3399
    platforms.
    
    Change-Id: I4b9adc8001b4d01f0ebd0d5a7a1bc2a050e82647
    Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 4f70039b360ae4645bc35c1d1a6cc41837ea161e)

diff --git a/arch/arm/dts/rk3399-firefly.dts b/arch/arm/dts/rk3399-firefly.dts
index 31e3ba8a47..f134c00688 100644
--- a/arch/arm/dts/rk3399-firefly.dts
+++ b/arch/arm/dts/rk3399-firefly.dts
@@ -332,10 +332,10 @@
 				regulator-always-on;
 				regulator-boot-on;
 				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <3300000>;
+				regulator-max-microvolt = <3000000>;
 				regulator-state-mem {
 					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <3300000>;
+					regulator-suspend-microvolt = <3000000>;
 				};
 			};
 
diff --git a/arch/arm/dts/rk3399-puma.dtsi b/arch/arm/dts/rk3399-puma.dtsi
index 6d4dd84bf3..96bd4fec01 100644
--- a/arch/arm/dts/rk3399-puma.dtsi
+++ b/arch/arm/dts/rk3399-puma.dtsi
@@ -347,11 +347,11 @@
 				regulator-always-on;
 				regulator-boot-on;
 				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <3300000>;
+				regulator-max-microvolt = <3000000>;
 				regulator-name = "vcc_sd";
 				regulator-state-mem {
 					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <3300000>;
+					regulator-suspend-microvolt = <3000000>;
 				};
 			};
 

commit f01e4843480015a159122f8ac50f34f1bfde64dd
Author: Klaus Goger <klaus.goger@theobroma-systems.com>
Date:   Mon Nov 6 23:02:54 2017 +0100

    UPSTREAM: rockchip: dts: Use defines for pin names in rk3399-puma.dtsi and rk3368-lion.dts
    
    pinctrl/rockchip.h provides defines that map pin numbers to pin names.
    Use them to make the dts more human readable.
    
    Change-Id: If1e7f9e9bb108f1fceeb32c9220a20eee7acc01d
    Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 366812fa2641da395fbf8e7de532c3c463e7b7d2)

diff --git a/arch/arm/dts/rk3368-lion.dts b/arch/arm/dts/rk3368-lion.dts
index 850db500e4..f018b8b146 100644
--- a/arch/arm/dts/rk3368-lion.dts
+++ b/arch/arm/dts/rk3368-lion.dts
@@ -68,7 +68,7 @@
 	phy-supply = <&vcc33_io>;
 	phy-mode = "rgmii";
 	clock_in_out = "input";
-	snps,reset-gpio = <&gpio3 11 GPIO_ACTIVE_LOW>;
+	snps,reset-gpio = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>;
 	snps,reset-active-low;
 	snps,reset-delays-us = <2 10000 50000>;
 	assigned-clocks = <&cru SCLK_MAC>;
diff --git a/arch/arm/dts/rk3399-puma.dtsi b/arch/arm/dts/rk3399-puma.dtsi
index 8065b3cc88..6d4dd84bf3 100644
--- a/arch/arm/dts/rk3399-puma.dtsi
+++ b/arch/arm/dts/rk3399-puma.dtsi
@@ -36,13 +36,13 @@
 
 		module_led {
 			label = "module_led";
-			gpios = <&gpio2 25 GPIO_ACTIVE_HIGH>;
+			gpios = <&gpio2 RK_PD1 GPIO_ACTIVE_HIGH>;
 			linux,default-trigger = "heartbeat";
 		};
 
 		sd_card_led {
 			label = "sd_card_led";
-			gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
+			gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>;
 			linux,default-trigger = "mmc0";
 		};
 	};
@@ -94,7 +94,7 @@
 		compatible = "regulator-fixed";
 		regulator-name = "usbhub_enable";
 		enable-active-low;
-		gpio = <&gpio4 3 GPIO_ACTIVE_LOW>;
+		gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_LOW>;
 		regulator-boot-on;
 		regulator-min-microvolt = <3300000>;
 		regulator-max-microvolt = <3300000>;
@@ -111,7 +111,7 @@
 		u-boot,dm-pre-reloc;
 		regulator-name = "bios_enable";
 		enable-active-high;
-		gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
+		gpio = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>;
 		regulator-always-on;
 		regulator-boot-on;
 		regulator-min-microvolt = <1800000>;
@@ -139,7 +139,7 @@
 	vcc5v0_otg: vcc5v0-otg-regulator {
 		compatible = "regulator-fixed";
 		enable-active-high;
-		gpio = <&gpio0 2 GPIO_ACTIVE_HIGH>;
+		gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&otg_vbus_drv>;
 		regulator-name = "vcc5v0_otg";
@@ -149,7 +149,7 @@
 	vcc5v0_host: vcc5v0-host-regulator {
 		compatible = "regulator-fixed";
 		enable-active-low;
-		gpio = <&gpio4 3 GPIO_ACTIVE_HIGH>;
+		gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&host_vbus_drv>;
 		regulator-name = "vcc5v0_host";
@@ -195,7 +195,7 @@
 	phy-supply = <&vcc_phy>;
 	phy-mode = "rgmii";
 	clock_in_out = "input";
-	snps,reset-gpio = <&gpio3 16 GPIO_ACTIVE_LOW>;
+	snps,reset-gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>;
 	snps,reset-active-low;
 	snps,reset-delays-us = <2 10000 50000>;
 	assigned-clocks = <&cru SCLK_RMII_SRC>;
@@ -223,7 +223,7 @@
 	vdd_gpu: fan535555@60 {
 		compatible = "fcs,fan53555";
 		reg = <0x60>;
-		vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
+		vsel-gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>;
 		vin-supply = <&vcc5v0_sys>;
 		regulator-compatible = "fan53555-reg";
 		regulator-name = "vdd_gpu";
@@ -425,7 +425,7 @@
 	vdd_cpu_b: fan53555@60 {
 		compatible = "fcs,fan53555";
 		reg = <0x60>;
-		vsel-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
+		vsel-gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
 		vin-supply = <&vcc5v0_sys>;
 		regulator-compatible = "fan53555-reg";
 		regulator-name = "vdd_cpu_b";
@@ -468,7 +468,7 @@
 	assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
 	assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
 	assigned-clock-rates = <100000000>;
-	ep-gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
+	ep-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>;
 	num-lanes = <4>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pcie_clkreqn>;
@@ -563,42 +563,43 @@
 		puma_pin_hog: puma_pin_hog {
 			rockchip,pins =
 				/* We need pull-ups on Q7 buttons */
-				<0  4 RK_FUNC_GPIO &pcfg_pull_up>, /* LID_BTN# */
-				<0 10 RK_FUNC_GPIO &pcfg_pull_up>, /* BATLOW# */
-				<0 11 RK_FUNC_GPIO &pcfg_pull_up>, /* SLP_BTN# */
-				<0  9 RK_FUNC_GPIO &pcfg_pull_up>; /* BIOS_DISABLE# */
+				<RK_GPIO0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>, /* LID_BTN# */
+				<RK_GPIO0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>, /* BATLOW# */
+				<RK_GPIO0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>, /* SLP_BTN# */
+				<RK_GPIO0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>; /* BIOS_DISABLE# */
 		};
 	};
 
 	pmic {
 		pmic_int_l: pmic-int-l {
 			rockchip,pins =
-				<1 22 RK_FUNC_GPIO &pcfg_pull_up>;
+				<RK_GPIO1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
 		};
 	};
 
 	leds_pins_puma: led_pins@0 {
 			rockchip,pins =
-				<2 25 RK_FUNC_GPIO &pcfg_pull_none>,
-				<1 2 RK_FUNC_GPIO &pcfg_pull_none>;
+				<RK_GPIO2 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>,
+				<RK_GPIO1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
 	};
 
 	usb2 {
 		otg_vbus_drv: otg-vbus-drv {
 			rockchip,pins =
-				<0 2 RK_FUNC_GPIO &pcfg_pull_none>;
+				<RK_GPIO0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
 
 		host_vbus_drv: host-vbus-drv {
 			rockchip,pins =
-				<0 2 RK_FUNC_GPIO &pcfg_pull_none>;
+				<RK_GPIO4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
 	};
 
 	i2c8 {
 		i2c8_xfer_a: i2c8-xfer {
-			rockchip,pins = <1 21 RK_FUNC_1 &pcfg_pull_up>,
-					<1 20 RK_FUNC_1 &pcfg_pull_up>;
+			rockchip,pins =
+				<RK_GPIO1 RK_PC5 RK_FUNC_1 &pcfg_pull_up>,
+				<RK_GPIO1 RK_PC4 RK_FUNC_1 &pcfg_pull_up>;
 		};
 	};
 };
@@ -623,8 +624,8 @@
 &i2c6_xfer {
 	/* Enable pull-ups, the pins would float otherwise. */
 	rockchip,pins =
-		<2 10 RK_FUNC_2 &pcfg_pull_up>,
-		<2 9 RK_FUNC_2 &pcfg_pull_up>;
+		<RK_GPIO2 RK_PB2 RK_FUNC_2 &pcfg_pull_up>,
+		<RK_GPIO2 RK_PB1 RK_FUNC_2 &pcfg_pull_up>;
 };
 
 &i2c7 {

commit 9d054084f15519536e4b274ab405c3a4f4d544cf
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Nov 6 23:02:53 2017 +0100

    UPSTREAM: rockchip: dts: rk3399-puma: update USB configuration
    
    This change updates the USB configuration for the RK3399-Q7 in the DTS:
     * fixes the OTG board configuration by enabling it ('okay')
     * improves the speed of 'usb start' by disabling the unused EHCI/OHCI
       controllers
    
    Change-Id: I2ea0f58c8e56ceac065617c8c26007871716273d
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit b1e1ce2cd429c227ef0b2a72b1c13d91ef5555a3)

diff --git a/arch/arm/dts/rk3399-puma.dtsi b/arch/arm/dts/rk3399-puma.dtsi
index c517fd3627..8065b3cc88 100644
--- a/arch/arm/dts/rk3399-puma.dtsi
+++ b/arch/arm/dts/rk3399-puma.dtsi
@@ -523,23 +523,23 @@
 };
 
 &usb_host0_ehci {
-	status = "okay";
+	status = "disabled";
 };
 
 &usb_host0_ohci {
-	status = "okay";
+	status = "disabled";
 };
 
 &dwc3_typec0 {
-	status = "disabled";
+	status = "okay";
 };
 
 &usb_host1_ehci {
-	status = "okay";
+	status = "disabled";
 };
 
 &usb_host1_ohci {
-	status = "okay";
+	status = "disabled";
 };
 
 &dwc3_typec1 {

commit 6d2fed26e392be552094b39545dd2a771aeb005d
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Nov 6 23:02:52 2017 +0100

    UPSTREAM: rockchip: dts: rk3399-puma: update usbhub_enable regulator
    
    To correctly model the usbhub_enable regulator for U-Boot, we need
    to change the settings to:
     * the GPIO polarity is GPIO_ACTIVE_LOW
     * should be set to inactive (enable-active-low) when boot-on settings
       are applied
     * it can be changed at runtime (i.e. remove the always-on)
    
    Change-Id: Ibb1762be5b791870b376d251c53ac6b41b5dbbe4
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit f2a95131685e48bdc05c0abded74ae09701c29d7)

diff --git a/arch/arm/dts/rk3399-puma.dtsi b/arch/arm/dts/rk3399-puma.dtsi
index c4da26956a..c517fd3627 100644
--- a/arch/arm/dts/rk3399-puma.dtsi
+++ b/arch/arm/dts/rk3399-puma.dtsi
@@ -94,8 +94,7 @@
 		compatible = "regulator-fixed";
 		regulator-name = "usbhub_enable";
 		enable-active-low;
-		gpio = <&gpio4 3 GPIO_ACTIVE_HIGH>;
-		regulator-always-on;
+		gpio = <&gpio4 3 GPIO_ACTIVE_LOW>;
 		regulator-boot-on;
 		regulator-min-microvolt = <3300000>;
 		regulator-max-microvolt = <3300000>;

commit f2d89a0e585d3ca1dc61fb1f4690748f959bf160
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Nov 6 23:02:51 2017 +0100

    UPSTREAM: rockchip: dts: rk3399-puma: fix the modelling of BIOS_DISABLE
    
    The fixed regulator for overriding BIOS_DISABLE had been modelling
    backwards (i.e. the GPIO polarity and the enable-active-low/high
    property had both been inverted), causing the 'regulator' command
    to always print/expect 'disabled'/'enabled' backwards.
    
    This fixes the mix-up and models it correctly:
     * the GPIO is low-active
     * the regulator should be enabled (enable-active-high) during
       boot-on initialisation
    
    Change-Id: I868f3d9ebaed3d1a17b66244dd84ed9332bf24a1
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit df1e6212f957627731daf9844efe960ca8a549df)

diff --git a/arch/arm/dts/rk3399-puma.dtsi b/arch/arm/dts/rk3399-puma.dtsi
index 65ab380139..c4da26956a 100644
--- a/arch/arm/dts/rk3399-puma.dtsi
+++ b/arch/arm/dts/rk3399-puma.dtsi
@@ -111,8 +111,8 @@
 		compatible = "regulator-fixed";
 		u-boot,dm-pre-reloc;
 		regulator-name = "bios_enable";
-		enable-active-low;
-		gpio = <&gpio3 29 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+		gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
 		regulator-always-on;
 		regulator-boot-on;
 		regulator-min-microvolt = <1800000>;

commit d8bee3a4c98ee90d3892518939d1904b31026ad9
Author: Jan Kundrát <jan.kundrat@cesnet.cz>
Date:   Fri Nov 3 03:06:35 2017 +0100

    UPSTREAM: Do not attempt to use the systemwide libfdt
    
    U-Boot bundles a patched copy of libfdt, so it's wrong to attempt to
    include it <like/this>. This breaks the build for me when I have dtc
    fully installed in my host -- as happened earlier tonight with
    Buildroot, for example.
    
    There are several other occurrences throughout the code where '<libfdt'
    matches. I'm not modifying these because I have no clue why the
    <systemwide> include style is being used -- IMHO wrongly.
    
    Change-Id: Ie733b1454f8d76439abee770af54eca3699323f7
    Signed-off-by: Jan Kundrát <jan.kundrat@cesnet.cz>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit b95a5190ba9284a06f9d0c56589bcb4080b4710a)

diff --git a/include/fdt.h b/include/fdt.h
index 7ead62e777..f40b56c755 100644
--- a/include/fdt.h
+++ b/include/fdt.h
@@ -1 +1 @@
-#include <../lib/libfdt/fdt.h>
+#include "../lib/libfdt/fdt.h"
diff --git a/include/libfdt.h b/include/libfdt.h
index 10296a21ad..7ba13e634b 100755
--- a/include/libfdt.h
+++ b/include/libfdt.h
@@ -1 +1 @@
-#include <../lib/libfdt/libfdt.h>
+#include "../lib/libfdt/libfdt.h"
diff --git a/tools/fdtgrep.c b/tools/fdtgrep.c
index f51f5f15f5..5897b6d5f7 100644
--- a/tools/fdtgrep.c
+++ b/tools/fdtgrep.c
@@ -16,8 +16,8 @@
 #include <string.h>
 #include <unistd.h>
 
-#include <../include/libfdt.h>
-#include <libfdt_internal.h>
+#include "../include/libfdt.h"
+#include "libfdt_internal.h"
 
 /* Define DEBUG to get some debugging output on stderr */
 #ifdef DEBUG

commit 32fba033892e544af1fdd7865d74239ecf56eff4
Author: Lukasz Majewski <lukma@denx.de>
Date:   Fri Oct 27 12:28:10 2017 +0200

    UPSTREAM: gpt: Use cache aligned buffers for gpt_h and gpt_e
    
    Before this patch one could receive following errors when executing
    "gpt write" command on machine with cache enabled:
    
    display5 factory > gpt write mmc ${mmcdev} ${partitions}
    Writing GPT:
    CACHE: Misaligned operation at range [4ef8f7f0, 4ef8f9f0]
    CACHE: Misaligned operation at range [4ef8f9f8, 4ef939f8]
    CACHE: Misaligned operation at range [4ef8f9f8, 4ef939f8]
    CACHE: Misaligned operation at range [4ef8f7f0, 4ef8f9f0]
    success!
    
    To alleviate this problem - the calloc()s have been replaced with
    malloc_cache_aligned() and memset().
    
    After those changes the buffers are properly aligned (with both start
    address and size) to SoC cache line.
    
    Change-Id: I13782d942b327d3941de6446b2cbc49a3d7901dc
    Signed-off-by: Lukasz Majewski <lukma@denx.de>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit bb021013ba1ea4f7ade55ed932ab9d807e8a09ea)

diff --git a/disk/part_efi.c b/disk/part_efi.c
index 514c25d8ba..7582b6feb5 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -622,25 +622,27 @@ int gpt_fill_header(struct blk_desc *dev_desc, gpt_header *gpt_h,
 int gpt_restore(struct blk_desc *dev_desc, char *str_disk_guid,
 		disk_partition_t *partitions, int parts_count)
 {
-	int ret;
-
-	gpt_header *gpt_h = calloc(1, PAD_TO_BLOCKSIZE(sizeof(gpt_header),
-						       dev_desc));
+	gpt_header *gpt_h;
 	gpt_entry *gpt_e;
+	int ret, size;
 
+	size = PAD_TO_BLOCKSIZE(sizeof(gpt_header), dev_desc);
+	gpt_h = malloc_cache_aligned(size);
 	if (gpt_h == NULL) {
 		printf("%s: calloc failed!\n", __func__);
 		return -1;
 	}
+	memset(gpt_h, 0, size);
 
-	gpt_e = calloc(1, PAD_TO_BLOCKSIZE(GPT_ENTRY_NUMBERS
-					       * sizeof(gpt_entry),
-					       dev_desc));
+	size = PAD_TO_BLOCKSIZE(GPT_ENTRY_NUMBERS * sizeof(gpt_entry),
+				dev_desc);
+	gpt_e = malloc_cache_aligned(size);
 	if (gpt_e == NULL) {
 		printf("%s: calloc failed!\n", __func__);
 		free(gpt_h);
 		return -1;
 	}
+	memset(gpt_e, 0, size);
 
 	/* Generate Primary GPT header (LBA1) */
 	ret = gpt_fill_header(dev_desc, gpt_h, str_disk_guid, parts_count);

commit adf9b6dead0cd865878095eccc53dfa2a8cd33ad
Author: Stefan Agner <stefan.agner@toradex.com>
Date:   Thu Oct 26 14:57:53 2017 +0200

    UPSTREAM: tools: env: allow to print U-Boot version
    
    The fw_env utility family has a default environment compiled in
    which ties it quite strongly to the U-Boot source/config it has
    been built with. Allow to display the U-Boot version it has been
    built with using the -v/--version argument.
    
    Change-Id: Iba67d9f520d9315874758ddafe9d277610719c9d
    Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
    Reviewed-by: Lukasz Majewski <lukma@denx.de>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 84d46e7e8948780d7ca20c24dfc7b653b900f728)

diff --git a/tools/env/fw_env_main.c b/tools/env/fw_env_main.c
index 6e278ca80b..0b9063742c 100644
--- a/tools/env/fw_env_main.c
+++ b/tools/env/fw_env_main.c
@@ -34,6 +34,7 @@
 #include <stdlib.h>
 #include <sys/file.h>
 #include <unistd.h>
+#include <version.h>
 #include "fw_env_private.h"
 #include "fw_env.h"
 
@@ -48,6 +49,7 @@ static struct option long_options[] = {
 	{"script", required_argument, NULL, 's'},
 	{"noheader", required_argument, NULL, 'n'},
 	{"lock", required_argument, NULL, 'l'},
+	{"version", no_argument, NULL, 'v'},
 	{NULL, 0, NULL, 0}
 };
 
@@ -67,6 +69,7 @@ void usage_printenv(void)
 		"Print variables from U-Boot environment\n"
 		"\n"
 		" -h, --help           print this help.\n"
+		" -v, --version        display version\n"
 #ifdef CONFIG_ENV_AES
 		" -a, --aes            aes key to access environment\n"
 #endif
@@ -85,6 +88,7 @@ void usage_env_set(void)
 		"Modify variables in U-Boot environment\n"
 		"\n"
 		" -h, --help           print this help.\n"
+		" -v, --version        display version\n"
 #ifdef CONFIG_ENV_AES
 		" -a, --aes            aes key to access environment\n"
 #endif
@@ -123,7 +127,7 @@ static void parse_common_args(int argc, char *argv[])
 	env_opts.config_file = CONFIG_FILE;
 #endif
 
-	while ((c = getopt_long(argc, argv, ":a:c:l:h", long_options, NULL)) !=
+	while ((c = getopt_long(argc, argv, ":a:c:l:h:v", long_options, NULL)) !=
 	       EOF) {
 		switch (c) {
 		case 'a':
@@ -145,6 +149,10 @@ static void parse_common_args(int argc, char *argv[])
 			do_printenv ? usage_printenv() : usage_env_set();
 			exit(EXIT_SUCCESS);
 			break;
+		case 'v':
+			fprintf(stderr, "Compiled with " U_BOOT_VERSION "\n");
+			exit(EXIT_SUCCESS);
+			break;
 		default:
 			/* ignore unknown options */
 			break;
@@ -162,7 +170,7 @@ int parse_printenv_args(int argc, char *argv[])
 
 	parse_common_args(argc, argv);
 
-	while ((c = getopt_long(argc, argv, "a:c:ns:l:h", long_options, NULL))
+	while ((c = getopt_long(argc, argv, "a:c:ns:l:h:v", long_options, NULL))
 		!= EOF) {
 		switch (c) {
 		case 'n':
@@ -189,7 +197,7 @@ int parse_setenv_args(int argc, char *argv[])
 
 	parse_common_args(argc, argv);
 
-	while ((c = getopt_long(argc, argv, "a:c:ns:l:h", long_options, NULL))
+	while ((c = getopt_long(argc, argv, "a:c:ns:l:h:v", long_options, NULL))
 		!= EOF) {
 		switch (c) {
 		case 's':

commit 58ddd5e1b291a6344ec4b4f35cf46cc1a22f62f1
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Mon Oct 23 10:03:40 2017 +0900

    UPSTREAM: image-sig: use designated initializers for algorithm
    
    Designated initializers are more readable because we do not
    have to check the order in the struct definitions.
    
    Change-Id: Ib4af13de7b0d87b2d395847b0d1b5c198206a96b
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 8ec87df3762f27bbd77fb28474d1e46ad23c9e28)

diff --git a/common/image-sig.c b/common/image-sig.c
index 455f2b9629..bf824fef3c 100644
--- a/common/image-sig.c
+++ b/common/image-sig.c
@@ -32,42 +32,42 @@ void *image_get_host_blob(void)
 
 struct checksum_algo checksum_algos[] = {
 	{
-		"sha1",
-		SHA1_SUM_LEN,
-		SHA1_DER_LEN,
-		sha1_der_prefix,
+		.name = "sha1",
+		.checksum_len = SHA1_SUM_LEN,
+		.der_len = SHA1_DER_LEN,
+		.der_prefix = sha1_der_prefix,
 #if IMAGE_ENABLE_SIGN
-		EVP_sha1,
+		.calculate_sign = EVP_sha1,
 #endif
-		hash_calculate,
+		.calculate = hash_calculate,
 	},
 	{
-		"sha256",
-		SHA256_SUM_LEN,
-		SHA256_DER_LEN,
-		sha256_der_prefix,
+		.name = "sha256",
+		.checksum_len = SHA256_SUM_LEN,
+		.der_len = SHA256_DER_LEN,
+		.der_prefix = sha256_der_prefix,
 #if IMAGE_ENABLE_SIGN
-		EVP_sha256,
+		.calculate_sign = EVP_sha256,
 #endif
-		hash_calculate,
+		.calculate = hash_calculate,
 	}
 
 };
 
 struct crypto_algo crypto_algos[] = {
 	{
-		"rsa2048",
-		RSA2048_BYTES,
-		rsa_sign,
-		rsa_add_verify_data,
-		rsa_verify,
+		.name = "rsa2048",
+		.key_len = RSA2048_BYTES,
+		.sign = rsa_sign,
+		.add_verify_data = rsa_add_verify_data,
+		.verify = rsa_verify,
 	},
 	{
-		"rsa4096",
-		RSA4096_BYTES,
-		rsa_sign,
-		rsa_add_verify_data,
-		rsa_verify,
+		.name = "rsa4096",
+		.key_len = RSA4096_BYTES,
+		.sign = rsa_sign,
+		.add_verify_data = rsa_add_verify_data,
+		.verify = rsa_verify,
 	}
 
 };

commit aee63dc84c1f5be59ea35ceb209a4ea937bdeb41
Author: Tom Rini <trini@konsulko.com>
Date:   Sat Oct 21 12:54:02 2017 -0400

    MAINTAINERS: Add missing boards and config entries
    
    As part of my usual round of build testing, output about missing
    MAINTAINERS information was not logged, and thus often overlooked.
    Correct that mistake by ensuring that I log the output of
    genboardscfg.py every time.  As part of that, address a number of
    missing MAINTAINERS entires.  In the case of a missing file, I have put
    the original submitter down.  In the rest of the cases I have added the
    config (and sometimes relevant header file) to the existing set of file
    globs.
    
    Change-Id: Ic4524445489daba323d638470c369ad914d5bfef
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 79df00fdb40b4584919c8bcef42d323a8d38d0f1)

diff --git a/board/CZ.NIC/turris_omnia/MAINTAINERS b/board/CZ.NIC/turris_omnia/MAINTAINERS
new file mode 100644
index 0000000000..ed15e11d3e
--- /dev/null
+++ b/board/CZ.NIC/turris_omnia/MAINTAINERS
@@ -0,0 +1,6 @@
+TURRIS OMNIA BOARD
+M:	Marek Behún <marek.behun@nic.cz>
+S:	Maintained
+F:	board/CZ.NIC/turris_omnia/
+F:	include/configs/turris_omnia.h
+F:	configs/turris_omnia_defconfig
diff --git a/board/Marvell/mvebu_armada-37xx/MAINTAINERS b/board/Marvell/mvebu_armada-37xx/MAINTAINERS
index 52a3869b29..9b0afeef10 100644
--- a/board/Marvell/mvebu_armada-37xx/MAINTAINERS
+++ b/board/Marvell/mvebu_armada-37xx/MAINTAINERS
@@ -4,3 +4,8 @@ S:	Maintained
 F:	board/Marvell/mvebu_armada-37xx/
 F:	include/configs/mvebu_armada-37xx.h
 F:	configs/mvebu_db-88f3720_defconfig
+
+ESPRESSOBin BOARD
+M:	Konstantin Porotchkin <kostap@marvell.com>
+S:	Maintained
+F:	configs/mvebu_espressobin-88f3720_defconfig
diff --git a/board/Marvell/mvebu_armada-8k/MAINTAINERS b/board/Marvell/mvebu_armada-8k/MAINTAINERS
index e0b965dfd6..2551ed02c5 100644
--- a/board/Marvell/mvebu_armada-8k/MAINTAINERS
+++ b/board/Marvell/mvebu_armada-8k/MAINTAINERS
@@ -3,5 +3,10 @@ M:	Stefan Roese <sr@denx.de>
 S:	Maintained
 F:	board/Marvell/mvebu_armada-8k/
 F:	include/configs/mvebu_armada-8k.h
-F:	configs/mvebu_db-88f7040_defconfig
-F:	configs/mvebu_db-88f8040_defconfig
+F:	configs/mvebu_db_armada8k_defconfig
+
+
+MACCHIATOBin BOARD
+M:	Konstantin Porotchkin <kostap@marvell.com>
+S:	Maintained
+F:	configs/mvebu_mcbin-88f8040_defconfig
diff --git a/board/Synology/ds414/MAINTAINERS b/board/Synology/ds414/MAINTAINERS
new file mode 100644
index 0000000000..502cbd7758
--- /dev/null
+++ b/board/Synology/ds414/MAINTAINERS
@@ -0,0 +1,6 @@
+DS414 BOARD
+M:	Phil Sutter <phil@nwl.cc>
+S:	Maintained
+F:	board/Synology/ds414/
+F:	include/configs/ds414.h
+F:	configs/ds414_defconfig
diff --git a/board/altera/arria10-socdk/MAINTAINERS b/board/altera/arria10-socdk/MAINTAINERS
new file mode 100644
index 0000000000..5a76efb54b
--- /dev/null
+++ b/board/altera/arria10-socdk/MAINTAINERS
@@ -0,0 +1,7 @@
+SOCFPGA BOARD
+M:	Dinh Nguyen <dinguyen@kernel.org>
+M:	Chin-Liang See <clsee@altera.com>
+S:	Maintained
+F:	board/altera/arria10-socdk/
+F:	include/configs/socfpga_arria10_socdk.h
+F:	configs/socfpga_arria10_defconfig
diff --git a/board/aspeed/evb_ast2500/MAINTAINERS b/board/aspeed/evb_ast2500/MAINTAINERS
new file mode 100644
index 0000000000..7c3c2b5e09
--- /dev/null
+++ b/board/aspeed/evb_ast2500/MAINTAINERS
@@ -0,0 +1,6 @@
+EVB AST2500 BOARD
+M:	Maxim Sloyko <maxims@google.com>
+S:	Maintained
+F:	board/aspeed/evb_ast2500/
+F:	include/configs/evb_ast2500.h
+F:	configs/evb-ast2500_defconfig
diff --git a/board/atmel/sama5d3xek/MAINTAINERS b/board/atmel/sama5d3xek/MAINTAINERS
index 560303caad..ad5150897b 100644
--- a/board/atmel/sama5d3xek/MAINTAINERS
+++ b/board/atmel/sama5d3xek/MAINTAINERS
@@ -6,3 +6,6 @@ F:	include/configs/sama5d3xek.h
 F:	configs/sama5d3xek_mmc_defconfig
 F:	configs/sama5d3xek_nandflash_defconfig
 F:	configs/sama5d3xek_spiflash_defconfig
+F:	configs/sama5d36ek_cmp_mmc_defconfig
+F:	configs/sama5d36ek_cmp_nandflash_defconfig
+F:	configs/sama5d36ek_cmp_spiflash_defconfig
diff --git a/board/freescale/ls1046aqds/MAINTAINERS b/board/freescale/ls1046aqds/MAINTAINERS
index 6737d558ce..76190c6383 100644
--- a/board/freescale/ls1046aqds/MAINTAINERS
+++ b/board/freescale/ls1046aqds/MAINTAINERS
@@ -8,6 +8,7 @@ F:	configs/ls1046aqds_nand_defconfig
 F:	configs/ls1046aqds_sdcard_ifc_defconfig
 F:	configs/ls1046aqds_sdcard_qspi_defconfig
 F:	configs/ls1046aqds_qspi_defconfig
+F:	configs/ls1046aqds_lpuart_defconfig
 
 M:	Sumit Garg <sumit.garg@nxp.com>
 S:	Maintained
diff --git a/board/gdsys/mpc8308/MAINTAINERS b/board/gdsys/mpc8308/MAINTAINERS
index 3895b01732..21470bf6b0 100644
--- a/board/gdsys/mpc8308/MAINTAINERS
+++ b/board/gdsys/mpc8308/MAINTAINERS
@@ -7,4 +7,6 @@ F:	configs/hrcon_defconfig
 F:	configs/hrcon_dh_defconfig
 F:	include/configs/strider.h
 F:	configs/strider_cpu_defconfig
+F:	configs/strider_cpu_dp_defconfig
 F:	configs/strider_con_defconfig
+F:	configs/strider_con_dp_defconfig
diff --git a/board/isee/igep003x/MAINTAINERS b/board/isee/igep003x/MAINTAINERS
index 748b189c4e..a74938a7d2 100644
--- a/board/isee/igep003x/MAINTAINERS
+++ b/board/isee/igep003x/MAINTAINERS
@@ -3,4 +3,4 @@ M:	Enric Balletbo i Serra <eballetbo@gmail.com>
 S:	Maintained
 F:	board/isee/igep003x/
 F:	include/configs/am335x_igep003x.h
-F:	configs/am335x_igep0033_defconfig
+F:	configs/am335x_igep003x_defconfig
diff --git a/board/nvidia/p2771-0000/MAINTAINERS b/board/nvidia/p2771-0000/MAINTAINERS
index 4fc4ebd5e0..cf4913a9a1 100644
--- a/board/nvidia/p2771-0000/MAINTAINERS
+++ b/board/nvidia/p2771-0000/MAINTAINERS
@@ -3,4 +3,5 @@ M:	Stephen Warren <swarren@nvidia.com>
 S:	Maintained
 F:	board/nvidia/p2771-0000/
 F:	include/configs/p2771-0000.h
-F:	configs/p2771-0000_defconfig
+F:	configs/p2771-0000-000_defconfig
+F:	configs/p2771-0000-500_defconfig
diff --git a/board/phytec/pcm052/MAINTAINERS b/board/phytec/pcm052/MAINTAINERS
index a877436bd3..66fe06e49c 100644
--- a/board/phytec/pcm052/MAINTAINERS
+++ b/board/phytec/pcm052/MAINTAINERS
@@ -2,5 +2,7 @@ PCM052 BOARD
 M:	Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
 S:	Maintained
 F:	board/phytec/pcm052/
+F:	include/configs/bk4r1.h
 F:	include/configs/pcm052.h
+F:	configs/bk4r1_defconfig
 F:	configs/pcm052_defconfig
diff --git a/board/renesas/blanche/MAINTAINERS b/board/renesas/blanche/MAINTAINERS
new file mode 100644
index 0000000000..4b3114aceb
--- /dev/null
+++ b/board/renesas/blanche/MAINTAINERS
@@ -0,0 +1,7 @@
+BLANCHE BOARD
+M:	Masakazu Mochizuki <masakazu.mochizuki.wd@hitachi.com>
+S:	Maintained
+F:	board/renesas/blanche/
+F:	include/configs/blanche.h
+F:	configs/blanche_defconfig
+
diff --git a/board/rockchip/evb_rk3399/MAINTAINERS b/board/rockchip/evb_rk3399/MAINTAINERS
index c825d5e219..caad30641e 100644
--- a/board/rockchip/evb_rk3399/MAINTAINERS
+++ b/board/rockchip/evb_rk3399/MAINTAINERS
@@ -4,3 +4,4 @@ S:      Maintained
 F:      board/rockchip/evb_rk3399
 F:      include/configs/evb_rk3399.h
 F:      configs/evb-rk3399_defconfig
+F:      configs/firefly-rk3399_defconfig
diff --git a/board/samsung/espresso7420/MAINTAINERS b/board/samsung/espresso7420/MAINTAINERS
index aaebc4c22d..e3b2394cce 100644
--- a/board/samsung/espresso7420/MAINTAINERS
+++ b/board/samsung/espresso7420/MAINTAINERS
@@ -3,3 +3,4 @@ M:	Thomas Abraham <thomas.ab@samsung.com>
 S:	Maintained
 F:	board/samsung/espresso7420/
 F:	include/configs/espresso7420.h
+F:	configs/espresso7420_defconfig
diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS
index ff6eea24a5..8efc0d3f21 100644
--- a/board/sunxi/MAINTAINERS
+++ b/board/sunxi/MAINTAINERS
@@ -26,6 +26,7 @@ F:	configs/A13-OLinuXinoM_defconfig
 F:	configs/Auxtek-T003_defconfig
 F:	configs/Auxtek-T004_defconfig
 F:	configs/CHIP_defconfig
+F:	configs/CHIP_pro_defconfig
 F:	configs/difrnce_dit4350_defconfig
 F:	configs/Empire_electronix_d709_defconfig
 F:	configs/Empire_electronix_m712_defconfig
@@ -44,6 +45,7 @@ F:	configs/Mele_M9_defconfig
 F:	configs/Sinovoip_BPI_M2_defconfig
 F:	include/configs/sun7i.h
 F:	configs/A20-OLinuXino_MICRO_defconfig
+F:	configs/A20-OLinuXino_MICRO-eMMC_defconfig
 F:	configs/Bananapi_defconfig
 F:	configs/Bananapro_defconfig
 F:	configs/i12-tvbox_defconfig
@@ -54,6 +56,7 @@ F:	configs/Orangepi_mini_defconfig
 F:	configs/qt840a_defconfig
 F:	configs/Wits_Pro_A20_DKT_defconfig
 F:	include/configs/sun8i.h
+F:	configs/sun8i_a23_evb_defconfig
 F:	configs/ga10h_v1_1_defconfig
 F:	configs/gt90h_v4_defconfig
 F:	configs/inet86dz_defconfig
@@ -124,6 +127,12 @@ S:	Maintained
 F:	configs/Bananapi_M2_Ultra_defconfig
 F:	arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
 
+BANANAPI M2 MAGIC BOARD
+M:	Maxime Ripard <maxime.ripard@free-electrons.com>
+S:	Maintained
+F:	configs/Bananapi_m2m_defconfig
+F:	arch/arm/dts/sun8i-r16-bananapi-m2m.dts
+
 BANANAPI M64
 M:	Jagan Teki <jagan@amarulasolutions.com>
 S:	Maintained

commit 17e3c82628f14b45811f550c74e393eaebdd1cd0
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Oct 30 14:44:54 2017 +0100

    UPSTREAM: rockchip: lion-rk3368: defconfig: select PHY_MICREL_KSZ90X1
    
    The RK3368-uQ7 uses a KSZ9031 PHY on-module.  Enable PHY_MICREL_KSZ90X1
    in the associated defconfig.
    
    References: da3b9e7f ("Move PHY_MICREL and PHY_MICREL_KSZ90X1 to Kconfig")
    Change-Id: I5759ebc2d155d53711e294d739515959048a35d4
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit ed6be4fcdfd4db56081e366c40dee7c3fb19ef59)

diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig
index 66a3cd5fac..9181f16dca 100644
--- a/configs/lion-rk3368_defconfig
+++ b/configs/lion-rk3368_defconfig
@@ -67,6 +67,7 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_RGMII=y

commit c6de4e8bb31e6221c4a2b21e4d3b6c6bf0e129e2
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Oct 30 14:44:55 2017 +0100

    UPSTREAM: rockchip: puma-rk3399: defconfig: select PHY_MICREL_KSZ90X1
    
    The RK3368-uQ7 uses a KSZ9031 PHY on-module.  Enable PHY_MICREL_KSZ90X1
    in the associated defconfig (this somehow got lost with da3b9e7f).
    
    References: da3b9e7f ("Move PHY_MICREL and PHY_MICREL_KSZ90X1 to Kconfig")
    Change-Id: I0c324927c02138759c162708cfd3c30069051e25
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 18a158979c67cd5316c84ecbc3cb4c91ee8c9e37)

diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig
index 62a8d7c859..6c2eb928f3 100644
--- a/configs/puma-rk3399_defconfig
+++ b/configs/puma-rk3399_defconfig
@@ -58,6 +58,7 @@ CONFIG_MMC_SDHCI_ROCKCHIP=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y

commit d2ba98843d566f51643b3c014c715427ec2866da
Author: Klaus Goger <klaus.goger@theobroma-systems.com>
Date:   Fri Oct 6 19:24:08 2017 +0200

    UPSTREAM: rockchip: configs: only add available BOOT_TARGET_DEVICES
    
    BOOT_TARGET_DEVICES should only be added if the corresponding u-boot
    command is enabled.
    
    Change-Id: I5d692bf95d04b3efb876ccd1e97be807f2443efd
    Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 6e278a8c1c28efc12668d2761cb2fb0264668da4)

diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index 5eac4446f5..7c341ec9b2 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -11,22 +11,39 @@
 #ifndef CONFIG_SPL_BUILD
 #include <config_distro_defaults.h>
 
-/* First try to boot from SD (index 0), then eMMC (index 1 */
-#ifdef CONFIG_CMD_USB
-#define BOOT_TARGET_DEVICES(func) \
-	func(MMC, mmc, 0) \
-	func(MMC, mmc, 1) \
-	func(USB, usb, 0) \
-	func(PXE, pxe, na) \
-	func(DHCP, dchp, na)
+/* First try to boot from SD (index 0), then eMMC (index 1) */
+#if CONFIG_IS_ENABLED(CMD_MMC)
+	#define BOOT_TARGET_MMC(func) \
+		func(MMC, mmc, 0) \
+		func(MMC, mmc, 1)
 #else
-#define BOOT_TARGET_DEVICES(func) \
-	func(MMC, mmc, 0) \
-	func(MMC, mmc, 1) \
-	func(PXE, pxe, na) \
-	func(DHCP, dchp, na)
+	#define BOOT_TARGET_MMC(func)
 #endif
 
+#if CONFIG_IS_ENABLED(CMD_USB)
+	#define BOOT_TARGET_USB(func) func(USB, usb, 0)
+#else
+	#define BOOT_TARGET_USB(func)
+#endif
+
+#if CONFIG_IS_ENABLED(CMD_PXE)
+	#define BOOT_TARGET_PXE(func) func(PXE, pxe, na)
+#else
+	#define BOOT_TARGET_PXE(func)
+#endif
+
+#if CONFIG_IS_ENABLED(CMD_DHCP)
+	#define BOOT_TARGET_DHCP(func) func(DHCP, dhcp, na)
+#else
+	#define BOOT_TARGET_DHCP(func)
+#endif
+
+#define BOOT_TARGET_DEVICES(func) \
+	BOOT_TARGET_MMC(func) \
+	BOOT_TARGET_USB(func) \
+	BOOT_TARGET_PXE(func) \
+	BOOT_TARGET_DHCP(func)
+
 #ifdef CONFIG_ARM64
 #define ROOT_UUID "B921B045-1DF0-41C3-AF44-4C6F280D3FAE;\0"
 #else

commit 20a63bb13d1c4232066c7e7072ecec4ae2253553
Author: Klaus Goger <klaus.goger@theobroma-systems.com>
Date:   Fri Oct 6 19:24:09 2017 +0200

    UPSTREAM: rockchip: configs: use rockchip-common.h for rk3368
    
    rockchip-common.h already defines values that are missing from
    rk3368_common.h
    
    For example BOOT_TARGET_DEVICES was defined empty and therefore
    distroboot had no boot targets.
    
    Change-Id: I1be10032963557894adedef23611ccbaa8b35467
    Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit e3e842f17cfe0f3f4972c462a4d3ed13ba5eb1ab)

diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h
index 20abb01cf8..d33f581abf 100644
--- a/include/configs/rk3368_common.h
+++ b/include/configs/rk3368_common.h
@@ -7,6 +7,8 @@
 #ifndef __CONFIG_RK3368_COMMON_H
 #define __CONFIG_RK3368_COMMON_H
 
+#include "rockchip-common.h"
+
 #define CONFIG_SYS_CACHELINE_SIZE	64
 
 #include <asm/arch/hardware.h>
@@ -53,10 +55,6 @@
 	"kernel_addr_r=0x280000\0" \
 	"ramdisk_addr_r=0x5bf0000\0"
 
-#include <config_distro_defaults.h>
-
-#define BOOT_TARGET_DEVICES(func)
-
 #include <config_distro_bootcmd.h>
 
 #define CONFIG_EXTRA_ENV_SETTINGS \

commit ae530ff2ca02ede3c0ba41d994157ffca0470b3a
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Sat Oct 28 07:34:15 2017 +0200

    UPSTREAM: scripts/get_maintainer.pl: enable find_maintainer_files
    
    Many MAINTAINERS files are in subdirectories.
    We should enable searching these.
    
    Change-Id: Ia0cd7a8c9255486e30b9d59027ae822bbdf00030
    Reported-by: Walt Feasel <waltfeasel@gmail.com>
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit b79372ae94fbc9e30d014ad8ce830d2062539eb9)

diff --git a/scripts/get_maintainer.pl b/scripts/get_maintainer.pl
index 8b6037b73f..07800e62d1 100755
--- a/scripts/get_maintainer.pl
+++ b/scripts/get_maintainer.pl
@@ -59,7 +59,7 @@ my $from_filename = 0;
 my $pattern_depth = 0;
 my $version = 0;
 my $help = 0;
-my $find_maintainer_files = 0;
+my $find_maintainer_files = 1;
 
 my $vcs_used = 0;
 

commit 722c07dd6e0c95e835dfd63314ee58236926fbe8
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Sun Oct 29 08:28:52 2017 +0100

    UPSTREAM: checkpatch: Support wide strings
    
    Allow prefixing typical strings with L for wide strings
    
    Patch originally by Joe Perches
    https://lkml.org/lkml/2017/10/17/1117
    
    Change-Id: Ie92cf1fec9c7d5eaf78de0a02315eb2067b8fad2
    Signed-off-by: Joe Perches <joe@perches.com>
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 9ef2684c033d325b08133e96e8744b4da9b69a58)

diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl
index 4142f5c837..e450826c36 100755
--- a/scripts/checkpatch.pl
+++ b/scripts/checkpatch.pl
@@ -392,7 +392,7 @@ our $Binary	= qr{(?i)0b[01]+$Int_type?};
 our $Hex	= qr{(?i)0x[0-9a-f]+$Int_type?};
 our $Int	= qr{[0-9]+$Int_type?};
 our $Octal	= qr{0[0-7]+$Int_type?};
-our $String	= qr{"[X\t]*"};
+our $String	= qr{(?:\bL)?"[X\t]*"};
 our $Float_hex	= qr{(?i)0x[0-9a-f]+p-?[0-9]+[fl]?};
 our $Float_dec	= qr{(?i)(?:[0-9]+\.[0-9]*|[0-9]*\.[0-9]+)(?:e-?[0-9]+)?[fl]?};
 our $Float_int	= qr{(?i)[0-9]+e-?[0-9]+[fl]?};
@@ -5254,13 +5254,14 @@ sub process {
 		}
 
 # concatenated string without spaces between elements
-		if ($line =~ /$String[A-Z_]/ || $line =~ /[A-Za-z0-9_]$String/) {
+		if ($line =~ /$String[A-Z_]/ ||
+		    ($line =~ /([A-Za-z0-9_]+)$String/ && $1 !~ /^L$/)) {
 			CHK("CONCATENATED_STRING",
 			    "Concatenated strings should use spaces between elements\n" . $herecurr);
 		}
 
 # uncoalesced string fragments
-		if ($line =~ /$String\s*"/) {
+		if ($line =~ /$String\s*L?"/) {
 			WARN("STRING_FRAGMENTS",
 			     "Consecutive strings are generally better as a single string\n" . $herecurr);
 		}

commit f0573858c4ff089dbbee19641d7ce48410f5188e
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Thu Oct 19 23:49:19 2017 +0200

    UPSTREAM: Kconfig: add CONFIG_BROKEN
    
    Provide a Kconfig option that we can use as dependency for
    features that are broken. This allows to easily disable them
    without removing the code.
    
    As no short text is supplied the option will not appear in
    menuconfig.
    
    Change-Id: I03bf2f8f543cda490b63e081c2dbe1f1deee3d17
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 4c7a211046a3956058b512edd8533f7df031cc4a)

diff --git a/Kconfig b/Kconfig
index 73f820a6de..03153dd933 100644
--- a/Kconfig
+++ b/Kconfig
@@ -14,6 +14,12 @@ source "arch/Kconfig"
 
 menu "General setup"
 
+config BROKEN
+	bool
+	help
+	  This option cannot be enabled. It is used as dependency
+	  for broken and incomplete features.
+
 config LOCALVERSION
 	string "Local version - append to U-Boot release"
 	help

commit 32619fbebcbd9090064c224f314aaa51b37e650d
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Thu Oct 19 19:37:59 2017 +0900

    UPSTREAM: doc: verified-boot: fix crypto algorithm examples
    
    As you see in crypto_algos in common/image-sig.c, the algorithm
    should be either "rsa2048" or "rsa4096".  "rs2048" is a typo.
    
    Change-Id: I35cc5c126fc0129eb35de1a6652d64c0e645cbe9
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 6af5520fe13d81ccd4ec4f7234a8d7a2426c2bd6)

diff --git a/doc/uImage.FIT/signature.txt b/doc/uImage.FIT/signature.txt
index a57cdab339..2ece4c47de 100644
--- a/doc/uImage.FIT/signature.txt
+++ b/doc/uImage.FIT/signature.txt
@@ -85,7 +85,7 @@ allow the signer to operate. These should be added to the .its file.
 Signature nodes sit at the same level as hash nodes and are called
 signature@1, signature@2, etc.
 
-- algo: Algorithm name (e.g. "sha1,rs2048")
+- algo: Algorithm name (e.g. "sha1,rsa2048")
 
 - key-name-hint: Name of key to use for signing. The keys will normally be in
 a single directory (parameter -k to mkimage). For a given key <name>, its
@@ -139,7 +139,7 @@ public key in U-Boot's control FDT (using CONFIG_OF_CONTROL).
 Public keys should be stored as sub-nodes in a /signature node. Required
 properties are:
 
-- algo: Algorithm name (e.g. "sha1,rs2048")
+- algo: Algorithm name (e.g. "sha1,rsa2048")
 
 Optional properties are:
 

commit 710f83a7186e08f34bb70cb8d2343e68d51677f3
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Thu Oct 19 19:16:21 2017 +0900

    UPSTREAM: tools: image: fix node name of signature node in FIT
    
    Both "conf_name" and "sig_name" point to the name of config node.
    The latter should be the name of the signature node.
    
    Change-Id: I2be3ce4c9644a9dd6814d63cbc49f6e9348490d5
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 16067e6b87293eeb1fc4bac3edc0fd675b94d1a8)

diff --git a/tools/image-host.c b/tools/image-host.c
index 5e4d690714..c60d4adb3d 100644
--- a/tools/image-host.c
+++ b/tools/image-host.c
@@ -513,7 +513,7 @@ static int fit_config_get_data(void *fit, int conf_noffset, int noffset,
 	int ret, len;
 
 	conf_name = fit_get_name(fit, conf_noffset, NULL);
-	sig_name = fit_get_name(fit, conf_noffset, NULL);
+	sig_name = fit_get_name(fit, noffset, NULL);
 	debug("%s: conf='%s', sig='%s'\n", __func__, conf_name, sig_name);
 
 	/* Get a list of nodes we want to hash */

commit c326c43cc53c8ba898223207b709d9b1bd314c77
Author: Patrick Delaunay <patrick.delaunay@st.com>
Date:   Wed Oct 18 15:11:05 2017 +0200

    UPSTREAM: disk: efi: correct the overlap check on GPT header and PTE
    
    the partition starting at 0x4400 is refused with overlap error:
      $> gpt write mmc 0 "name=test,start=0x4400,size=0"
      Writing GPT: Partition overlap
      error!
    
    even if the 0x4400 is the first available offset for LBA35 with default
    value:
    - MBR=LBA1
    - GPT header=LBA2
    - PTE= 32 LBAs (128 entry), 3 to 34
    
    And the command to have one partition for all the disk failed also :
      $> gpt write mmc 0 "name=test,size=0"
    
    After the patch :
    
      $> gpt write mmc 0 "name=test,size=0"
      Writing GPT: success!
      $> part list mmc 0
    
      Partition Map for MMC device 0  --   Partition Type: EFI
    
      Part  Start LBA       End LBA         Name
            Attributes
            Type GUID
            Partition GUID
      1     0x00000022      0x01ce9fde      "test"
            attrs:  0x0000000000000000
            type:   ebd0a0a2-b9e5-4433-87c0-68b6b72699c7
            type:   data
            guid:   b4b84b8a-04e3-4000-0036-aff5c9c495b1
    
    And 0x22 = 34 LBA => offset = 0x4400 is accepted as expected
    
    Reviewed-by: Łukasz Majewski <lukma@denx.de>
    Tested-by: Stephen Warren <swarren@nvidia.com>
    Change-Id: I464741a434f02d960083c4e5a3e443cbe8b6f45b
    Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit ae0e0228e664f31ac3c6093758ddc85b664e2d08)

diff --git a/disk/part_efi.c b/disk/part_efi.c
index 29761e77f2..514c25d8ba 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -469,8 +469,8 @@ int gpt_fill_pte(struct blk_desc *dev_desc,
 		 * If our partition overlaps with either the GPT
 		 * header, or the partition entry, reject it.
 		 */
-		if (((start <= hdr_end && hdr_start <= (start + size)) ||
-		     (start <= pte_end && pte_start <= (start + size)))) {
+		if (((start < hdr_end && hdr_start < (start + size)) ||
+		     (start < pte_end && pte_start < (start + size)))) {
 			printf("Partition overlap\n");
 			return -1;
 		}

commit aea2f111e0b068307b38fd1d09ceb3aeed6c28c2
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Tue Oct 17 17:37:14 2017 +0900

    UPSTREAM: simple-bus: remove DECLARE_GLOBAL_DATA_PTR
    
    No global pointer is used in this file.
    
    Change-Id: I0c2dcde65300f815348d6f44922577225dd0ddf4
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 3d569a807e17b146731c37db0cf21125134dee23)

diff --git a/drivers/core/simple-bus.c b/drivers/core/simple-bus.c
index 14803e32b1..5acfa5f0e4 100644
--- a/drivers/core/simple-bus.c
+++ b/drivers/core/simple-bus.c
@@ -7,8 +7,6 @@
 #include <common.h>
 #include <dm.h>
 
-DECLARE_GLOBAL_DATA_PTR;
-
 struct simple_bus_plat {
 	u32 base;
 	u32 size;

commit 4fd65389ae04f27f412664fb303d5ade15c0d435
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Fri Oct 13 19:31:20 2017 +0200

    UPSTREAM: scripts/get_maintainer.pl: update to current version
    
    Update the script to version 0.26 (as of Linux v4.14-rc1)
    Keep our "penguin_chief".
    Keep our top_of_kernel_tree.
    
    The negative forms of the command line parameters are described
    when using --help.
    
    New options are
    
     --git-blame-signatures => when used with --git-blame,
                               also include all commit signers
     --r => include reviewer(s) if any
     --letters => print all matching 'letter' types
                  from all matching sections
    
    File .get_maintainer.ignore can be used to specify
    email addressees that shall be ignored.
    
    Change-Id: I6db9f769496c1fe4421aa93362032c702a3808c0
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 59ab72d7bc5672eaf74820cde156be313217c087)

diff --git a/scripts/get_maintainer.pl b/scripts/get_maintainer.pl
index 83a4e5bad2..8b6037b73f 100755
--- a/scripts/get_maintainer.pl
+++ b/scripts/get_maintainer.pl
@@ -1,4 +1,4 @@
-#!/usr/bin/perl -w
+#!/usr/bin/env perl
 # (c) 2007, Joe Perches <joe@perches.com>
 #           created from checkpatch.pl
 #
@@ -10,18 +10,22 @@
 #
 # Licensed under the terms of the GNU GPL License version 2
 
+use warnings;
 use strict;
 
 my $P = $0;
 my $V = '0.26';
 
 use Getopt::Long qw(:config no_auto_abbrev);
+use Cwd;
 use File::Find;
 
+my $cur_path = fastgetcwd() . '/';
 my $lk_path = "./";
 my $email = 1;
 my $email_usename = 1;
 my $email_maintainer = 1;
+my $email_reviewer = 1;
 my $email_list = 1;
 my $email_subscriber_list = 0;
 my $email_git_penguin_chiefs = 0;
@@ -42,10 +46,12 @@ my $output_multiline = 1;
 my $output_separator = ", ";
 my $output_roles = 0;
 my $output_rolestats = 1;
+my $output_section_maxlen = 50;
 my $scm = 0;
 my $web = 0;
 my $subsystem = 0;
 my $status = 0;
+my $letters = "";
 my $keywords = 1;
 my $sections = 0;
 my $file_emails = 0;
@@ -53,6 +59,7 @@ my $from_filename = 0;
 my $pattern_depth = 0;
 my $version = 0;
 my $help = 0;
+my $find_maintainer_files = 0;
 
 my $vcs_used = 0;
 
@@ -128,6 +135,7 @@ my %VCS_cmds_git = (
     "author_pattern" => "^GitAuthor: (.*)",
     "subject_pattern" => "^GitSubject: (.*)",
     "stat_pattern" => "^(\\d+)\\t(\\d+)\\t\$file\$",
+    "file_exists_cmd" => "git ls-files \$file",
 );
 
 my %VCS_cmds_hg = (
@@ -156,6 +164,7 @@ my %VCS_cmds_hg = (
     "author_pattern" => "^HgAuthor: (.*)",
     "subject_pattern" => "^HgSubject: (.*)",
     "stat_pattern" => "^(\\d+)\t(\\d+)\t\$file\$",
+    "file_exists_cmd" => "hg files \$file",
 );
 
 my $conf = which_conf(".get_maintainer.conf");
@@ -184,6 +193,27 @@ if (-f $conf) {
     unshift(@ARGV, @conf_args) if @conf_args;
 }
 
+my @ignore_emails = ();
+my $ignore_file = which_conf(".get_maintainer.ignore");
+if (-f $ignore_file) {
+    open(my $ignore, '<', "$ignore_file")
+	or warn "$P: Can't find a readable .get_maintainer.ignore file $!\n";
+    while (<$ignore>) {
+	my $line = $_;
+
+	$line =~ s/\s*\n?$//;
+	$line =~ s/^\s*//;
+	$line =~ s/\s+$//;
+	$line =~ s/#.*$//;
+
+	next if ($line =~ m/^\s*$/);
+	if (rfc822_valid($line)) {
+	    push(@ignore_emails, $line);
+	}
+    }
+    close($ignore);
+}
+
 if (!GetOptions(
 		'email!' => \$email,
 		'git!' => \$email_git,
@@ -201,6 +231,7 @@ if (!GetOptions(
 		'remove-duplicates!' => \$email_remove_duplicates,
 		'mailmap!' => \$email_use_mailmap,
 		'm!' => \$email_maintainer,
+		'r!' => \$email_reviewer,
 		'n!' => \$email_usename,
 		'l!' => \$email_list,
 		's!' => \$email_subscriber_list,
@@ -212,11 +243,13 @@ if (!GetOptions(
 		'status!' => \$status,
 		'scm!' => \$scm,
 		'web!' => \$web,
+		'letters=s' => \$letters,
 		'pattern-depth=i' => \$pattern_depth,
 		'k|keywords!' => \$keywords,
 		'sections!' => \$sections,
 		'fe|file-emails!' => \$file_emails,
 		'f|file' => \$from_filename,
+		'find-maintainer-files' => \$find_maintainer_files,
 		'v|version' => \$version,
 		'h|help|usage' => \$help,
 		)) {
@@ -242,7 +275,8 @@ $output_multiline = 0 if ($output_separator ne ", ");
 $output_rolestats = 1 if ($interactive);
 $output_roles = 1 if ($output_rolestats);
 
-if ($sections) {
+if ($sections || $letters ne "") {
+    $sections = 1;
     $email = 0;
     $email_list = 0;
     $scm = 0;
@@ -259,42 +293,28 @@ if ($sections) {
 }
 
 if ($email &&
-    ($email_maintainer + $email_list + $email_subscriber_list +
+    ($email_maintainer + $email_reviewer +
+     $email_list + $email_subscriber_list +
      $email_git + $email_git_penguin_chiefs + $email_git_blame) == 0) {
     die "$P: Please select at least 1 email option\n";
 }
 
 if (!top_of_kernel_tree($lk_path)) {
     die "$P: The current directory does not appear to be "
-	. "a linux kernel source tree.\n";
+	. "a U-Boot source tree.\n";
 }
 
 ## Read MAINTAINERS for type/value pairs
 
 my @typevalue = ();
 my %keyword_hash;
+my @mfiles = ();
 
-my @maint_files = ();
-push(@maint_files, "${lk_path}MAINTAINERS");
-
-sub maint_wanted {
-    return unless $_ =~ /^MAINTAINERS/;
-    push(@maint_files, "$File::Find::name");
-}
-
-File::Find::find(\&maint_wanted, "${lk_path}board");
-
-foreach my $maint_file (@maint_files) {
-    my $maint;
-    open ($maint, '<', "$maint_file")
-	or die "$P: Can't open $maint_file: $!\n";
-    read_maintainers($maint);
-    close($maint);
-}
-
-sub read_maintainers {
-    my ($maint) = @_;
+sub read_maintainer_file {
+    my ($file) = @_;
 
+    open (my $maint, '<', "$file")
+	or die "$P: Can't open MAINTAINERS file '$file': $!\n";
     while (<$maint>) {
 	my $line = $_;
 
@@ -315,13 +335,47 @@ sub read_maintainers {
 		$keyword_hash{@typevalue} = $value;
 	    }
 	    push(@typevalue, "$type:$value");
-	} elsif (!/^(\s)*$/) {
+	} elsif (!(/^\s*$/ || /^\s*\#/)) {
 	    $line =~ s/\n$//g;
 	    push(@typevalue, $line);
 	}
     }
+    close($maint);
+}
+
+sub find_is_maintainer_file {
+    my ($file) = $_;
+    return if ($file !~ m@/MAINTAINERS$@);
+    $file = $File::Find::name;
+    return if (! -f $file);
+    push(@mfiles, $file);
+}
+
+sub find_ignore_git {
+    return grep { $_ !~ /^\.git$/; } @_;
+}
+
+if (-d "${lk_path}MAINTAINERS") {
+    opendir(DIR, "${lk_path}MAINTAINERS") or die $!;
+    my @files = readdir(DIR);
+    closedir(DIR);
+    foreach my $file (@files) {
+	push(@mfiles, "${lk_path}MAINTAINERS/$file") if ($file !~ /^\./);
+    }
 }
 
+if ($find_maintainer_files) {
+    find( { wanted => \&find_is_maintainer_file,
+	    preprocess => \&find_ignore_git,
+	    no_chdir => 1,
+	}, "${lk_path}");
+} else {
+    push(@mfiles, "${lk_path}MAINTAINERS") if -f "${lk_path}MAINTAINERS";
+}
+
+foreach my $file (@mfiles) {
+    read_maintainer_file("$file");
+}
 
 #
 # Read mail address map
@@ -421,7 +475,9 @@ foreach my $file (@ARGV) {
 	    die "$P: file '${file}' not found\n";
 	}
     }
-    if ($from_filename) {
+    if ($from_filename || ($file ne "&STDIN" && vcs_file_exists($file))) {
+	$file =~ s/^\Q${cur_path}\E//;	#strip any absolute path
+	$file =~ s/^\Q${lk_path}\E//;	#or the path to the lk tree
 	push(@files, $file);
 	if ($file ne "MAINTAINERS" && -f $file && ($keywords || $file_emails)) {
 	    open(my $f, '<', $file)
@@ -528,6 +584,16 @@ if ($web) {
 
 exit($exit);
 
+sub ignore_email_address {
+    my ($address) = @_;
+
+    foreach my $ignore (@ignore_emails) {
+	return 1 if ($ignore eq $address);
+    }
+
+    return 0;
+}
+
 sub range_is_maintained {
     my ($start, $end) = @_;
 
@@ -659,8 +725,10 @@ sub get_maintainers {
 			$line =~ s/\\\./\./g;       	##Convert \. to .
 			$line =~ s/\.\*/\*/g;       	##Convert .* to *
 		    }
-		    $line =~ s/^([A-Z]):/$1:\t/g;
-		    print("$line\n");
+		    my $count = $line =~ s/^([A-Z]):/$1:\t/g;
+		    if ($letters eq "" || (!$count || $letters =~ /$1/i)) {
+			print("$line\n");
+		    }
 		}
 		print("\n");
 	    }
@@ -764,10 +832,12 @@ MAINTAINER field selection options:
     --git-max-maintainers => maximum maintainers to add (default: $email_git_max_maintainers)
     --git-min-percent => minimum percentage of commits required (default: $email_git_min_percent)
     --git-blame => use git blame to find modified commits for patch or file
+    --git-blame-signatures => when used with --git-blame, also include all commit signers
     --git-since => git history to use (default: $email_git_since)
     --hg-since => hg history to use (default: $email_hg_since)
     --interactive => display a menu (mostly useful if used with the --git option)
     --m => include maintainer(s) if any
+    --r => include reviewer(s) if any
     --n => include name 'Full Name <addr\@domain.tld>'
     --l => include list(s) if any
     --s => include subscriber only list(s) if any
@@ -789,12 +859,13 @@ Other options:
   --pattern-depth => Number of pattern directory traversals (default: 0 (all))
   --keywords => scan patch for keywords (default: $keywords)
   --sections => print all of the subsystem sections with pattern matches
+  --letters => print all matching 'letter' types from all matching sections
   --mailmap => use .mailmap file (default: $email_use_mailmap)
   --version => show version
   --help => show this help information
 
 Default options:
-  [--email --nogit --git-fallback --m --n --l --multiline -pattern-depth=0
+  [--email --nogit --git-fallback --m --r --n --l --multiline --pattern-depth=0
    --remove-duplicates --rolestats]
 
 Notes:
@@ -826,6 +897,9 @@ Notes:
       Entries in this file can be any command line argument.
       This file is prepended to any additional command line arguments.
       Multiple lines and # comments are allowed.
+  Most options have both positive and negative forms.
+      The negative forms for --<foo> are --no<foo> and --no-<foo>.
+
 EOT
 }
 
@@ -836,7 +910,7 @@ sub top_of_kernel_tree {
 	$lk_path .= "/";
     }
     if (   (-f "${lk_path}Kbuild")
-	&& (-f "${lk_path}MAINTAINERS")
+	&& (-e "${lk_path}MAINTAINERS")
 	&& (-f "${lk_path}Makefile")
 	&& (-f "${lk_path}README")
 	&& (-d "${lk_path}arch")
@@ -954,20 +1028,29 @@ sub find_ending_index {
     return $index;
 }
 
-sub get_maintainer_role {
+sub get_subsystem_name {
     my ($index) = @_;
 
-    my $i;
     my $start = find_starting_index($index);
-    my $end = find_ending_index($index);
 
-    my $role = "unknown";
     my $subsystem = $typevalue[$start];
-    if (length($subsystem) > 20) {
-	$subsystem = substr($subsystem, 0, 17);
+    if ($output_section_maxlen && length($subsystem) > $output_section_maxlen) {
+	$subsystem = substr($subsystem, 0, $output_section_maxlen - 3);
 	$subsystem =~ s/\s*$//;
 	$subsystem = $subsystem . "...";
     }
+    return $subsystem;
+}
+
+sub get_maintainer_role {
+    my ($index) = @_;
+
+    my $i;
+    my $start = find_starting_index($index);
+    my $end = find_ending_index($index);
+
+    my $role = "unknown";
+    my $subsystem = get_subsystem_name($index);
 
     for ($i = $start + 1; $i < $end; $i++) {
 	my $tv = $typevalue[$i];
@@ -1001,16 +1084,7 @@ sub get_maintainer_role {
 sub get_list_role {
     my ($index) = @_;
 
-    my $i;
-    my $start = find_starting_index($index);
-    my $end = find_ending_index($index);
-
-    my $subsystem = $typevalue[$start];
-    if (length($subsystem) > 20) {
-	$subsystem = substr($subsystem, 0, 17);
-	$subsystem =~ s/\s*$//;
-	$subsystem = $subsystem . "...";
-    }
+    my $subsystem = get_subsystem_name($index);
 
     if ($subsystem eq "THE REST") {
 	$subsystem = "";
@@ -1084,6 +1158,23 @@ sub add_categories {
 		    my $role = get_maintainer_role($i);
 		    push_email_addresses($pvalue, $role);
 		}
+	    } elsif ($ptype eq "R") {
+		my ($name, $address) = parse_email($pvalue);
+		if ($name eq "") {
+		    if ($i > 0) {
+			my $tv = $typevalue[$i - 1];
+			if ($tv =~ m/^([A-Z]):\s*(.*)/) {
+			    if ($1 eq "P") {
+				$name = $2;
+				$pvalue = format_email($name, $address, $email_usename);
+			    }
+			}
+		    }
+		}
+		if ($email_reviewer) {
+		    my $subsystem = get_subsystem_name($i);
+		    push_email_addresses($pvalue, "reviewer:$subsystem");
+		}
 	    } elsif ($ptype eq "T") {
 		push(@scm, $pvalue);
 	    } elsif ($ptype eq "W") {
@@ -1868,6 +1959,7 @@ sub vcs_assign {
 	my $percent = $sign_offs * 100 / $divisor;
 
 	$percent = 100 if ($percent > 100);
+	next if (ignore_email_address($line));
 	$count++;
 	last if ($sign_offs < $email_git_min_signatures ||
 		 $count > $email_git_max_maintainers ||
@@ -2082,6 +2174,24 @@ sub vcs_file_blame {
     }
 }
 
+sub vcs_file_exists {
+    my ($file) = @_;
+
+    my $exists;
+
+    my $vcs_used = vcs_exists();
+    return 0 if (!$vcs_used);
+
+    my $cmd = $VCS_cmds{"file_exists_cmd"};
+    $cmd =~ s/(\$\w+)/$1/eeg;		# interpolate $cmd
+    $cmd .= " 2>&1";
+    $exists = &{$VCS_cmds{"execute_cmd"}}($cmd);
+
+    return 0 if ($? != 0);
+
+    return $exists;
+}
+
 sub uniq {
     my (@parms) = @_;
 

commit 02234e49dea4c9ca3f58eb0cc13ab9ad9e3d1363
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Thu Oct 12 23:37:37 2017 +0200

    UPSTREAM: usbtty: fix typos
    
    Fix typos in USB tty driver.
    
    Change-Id: Ida39f7d6e86f386173bf4a905ee66d1cfa98aade
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit c409336dacff3f48da70727da2dc8a1c47f5bf5e)

diff --git a/drivers/serial/usbtty.c b/drivers/serial/usbtty.c
index 353109c070..182385e499 100644
--- a/drivers/serial/usbtty.c
+++ b/drivers/serial/usbtty.c
@@ -525,7 +525,7 @@ int drv_usbtty_init (void)
 	char * tt;
 	int snlen;
 
-	/* Ger seiral number */
+	/* Get serial number */
 	sn = env_get("serial#");
 	if (!sn)
 		sn = "000000000000";

commit 18a87e935ef39e77bb039a756d11afa3b3fdcd3d
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Wed Oct 11 20:15:04 2017 -0700

    UPSTREAM: tools: env: Add embedded.c to .gitignore
    
    Change-Id: I81b0fec8fef268598f054103e859250315218ef9
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 3b306c37cdf7488254d078ce63f508eaedb2be41)

diff --git a/tools/env/.gitignore b/tools/env/.gitignore
index 804abacc6e..8d28b2b70b 100644
--- a/tools/env/.gitignore
+++ b/tools/env/.gitignore
@@ -1,2 +1,3 @@
+embedded.c
 fw_printenv
 fw_printenv_unstripped

commit c9bf1d5a23dde69f477e1c9c2fa6c32582d2395c
Author: Tom Rini <trini@konsulko.com>
Date:   Wed Oct 11 15:34:33 2017 -0400

    UPSTREAM: cmd/pxe.c: Rework bootargs construction to clarify string checks
    
    As the code currently stands, we first check that the length of the
    given command line, along with ip_str/mac_str along with an additional 1
    for the NULL termination will fit within the buffer we have, and if not,
    we return an error.  The way this code was originally written however
    left Coverity "unhappy" due to using strcat rather than strncat.
    Switching this to strncat however causes clang to be unhappy that we
    aren't enforcing the "1" portion within strncat.  Rather than further
    re-work the code to include a "- 1" in this case as well, make the
    strcat code only be done within the else side of the length test.  This
    keeps both clang and Coverity happy.
    
    Fixes: 48ee0a87bc46 ("cmd/pxe.c: Rework initrd and bootargs handling slightly")
    Change-Id: I6a3d3ea54d6b7e1f3c2aed200b2f706f42d570d4
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 59ee8f83b6e77550d5697fced4899e9b5173981f)

diff --git a/cmd/pxe.c b/cmd/pxe.c
index a62cbe192a..7043ad11fd 100644
--- a/cmd/pxe.c
+++ b/cmd/pxe.c
@@ -686,16 +686,17 @@ static int label_boot(cmd_tbl_t *cmdtp, struct pxe_label *label)
 			       strlen(ip_str), strlen(mac_str),
 			       sizeof(bootargs));
 			return 1;
+		} else {
+			if (label->append)
+				strncpy(bootargs, label->append,
+					sizeof(bootargs));
+			strcat(bootargs, ip_str);
+			strcat(bootargs, mac_str);
+
+			cli_simple_process_macros(bootargs, finalbootargs);
+			env_set("bootargs", finalbootargs);
+			printf("append: %s\n", finalbootargs);
 		}
-
-		if (label->append)
-			strncpy(bootargs, label->append, sizeof(bootargs));
-		strncat(bootargs, ip_str, sizeof(bootargs) - strlen(bootargs));
-		strncat(bootargs, mac_str, sizeof(bootargs) - strlen(bootargs));
-
-		cli_simple_process_macros(bootargs, finalbootargs);
-		env_set("bootargs", finalbootargs);
-		printf("append: %s\n", finalbootargs);
 	}
 
 	bootm_argv[1] = env_get("kernel_addr_r");

commit 96f111c8b8148a57efa83a1e739983491b37eaa9
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Wed Oct 11 23:56:10 2017 +0900

    UPSTREAM: kbuild: fix dependency of DT build
    
    I saw a DT build issue report some time before [1].  I was able to
    reproduce the bug, and figure out the root cause.
    
    Since commit 6d427c6b1fa0 ("binman: Automatically include a U-Boot
    .dtsi file"), invalid .*.cmd files are generated.
    
    Since that commit, DTS files are put into sed and piped to CPP.
    Because CPP reads the stream from stdin, -Wp,-MD,$(depfile).pre.tmp
    option generates a depfile with the target name "-".  This is not
    the format expected by fixdep.
    
    Use one more temporary file instead of using pipe.  With this, deps_
    in the .*.cmd will be fixed.  Having a temp file name in source_ is
    odd, but it is unsed in the build system.  Not a big deal.
    
    [1] https://lists.denx.de/pipermail/u-boot/2017-June/294451.html
    
    Fiexes: 6d427c6b1fa0 ("binman: Automatically include a U-Boot .dtsi file")
    Change-Id: I85b50c565c3d1d6b4c01136d020bc45b87d8087f
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit ecc9709fc12cc8e1a07b062d07cb8a5b296888d7)

diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index 2a7ed70cf2..12d1123a07 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -175,7 +175,7 @@ u_boot_dtsi_options = $(wildcard $(dir $<)$(basename $(notdir $<))-u-boot.dtsi)
 # $(warning u_boot_dtsi_options: $(u_boot_dtsi_options))
 
 # We use the first match
-u_boot_dtsi = $(firstword $(u_boot_dtsi_options))
+u_boot_dtsi = $(notdir $(firstword $(u_boot_dtsi_options)))
 
 # Modified for U-Boot
 dtc_cpp_flags  = -Wp,-MD,$(depfile).pre.tmp -nostdinc                    \
@@ -308,9 +308,8 @@ quiet_cmd_dtc = DTC     $@
 # Modified for U-Boot
 # Bring in any U-Boot-specific include at the end of the file
 cmd_dtc = mkdir -p $(dir ${dtc-tmp}) ; \
-	cat $< $(if $(u_boot_dtsi),\
-		| sed "$$ a\#include \"$(u_boot_dtsi)\"") | \
-		$(CPP) $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) - ; \
+	(cat $<; $(if $(u_boot_dtsi),echo '\#include "$(u_boot_dtsi)"')) > $(pre-tmp); \
+	$(CPP) $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) $(pre-tmp) ; \
 	$(DTC) -O dtb -o $@ -b 0 \
 		-i $(dir $<) $(DTC_FLAGS) \
 		-d $(depfile).dtc.tmp $(dtc-tmp) ; \
@@ -319,6 +318,7 @@ cmd_dtc = mkdir -p $(dir ${dtc-tmp}) ; \
 $(obj)/%.dtb: $(src)/%.dts FORCE
 	$(call if_changed_dep,dtc)
 
+pre-tmp = $(subst $(comma),_,$(dot-target).pre.tmp)
 dtc-tmp = $(subst $(comma),_,$(dot-target).dts.tmp)
 
 # DTCO

commit f1817ab2ce4b15cd497511c1964a652360748e36
Author: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Date:   Tue Oct 10 21:59:43 2017 +0300

    UPSTREAM: common: Remove genimg_get_image()
    
    Removal of the legacy DataFlash code turned genimg_get_image() into a
    no-op. Drop all calls to it and the function itself.
    
    Change-Id: I79fc0cd75fb4ea7bdfd0be8486d8be4b72cd773f
    Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 137aefba0319eaa69de0707dce01d62339158d4d)

diff --git a/common/bootm.c b/common/bootm.c
index 32b3ea8e2d..9493a306cd 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -810,9 +810,6 @@ static const void *boot_get_kernel(cmd_tbl_t *cmdtp, int flag, int argc,
 
 	bootstage_mark(BOOTSTAGE_ID_CHECK_MAGIC);
 
-	/* copy from dataflash if needed */
-	img_addr = genimg_get_image(img_addr);
-
 	/* check image type, for FIT images get FIT kernel node */
 	*os_data = *os_len = 0;
 	buf = map_sysmem(img_addr, 0);
diff --git a/common/image-fdt.c b/common/image-fdt.c
index a2ef409836..1e946467e3 100644
--- a/common/image-fdt.c
+++ b/common/image-fdt.c
@@ -294,9 +294,6 @@ int boot_get_fdt(int flag, int argc, char * const argv[], uint8_t arch,
 		debug("## Checking for 'FDT'/'FDT Image' at %08lx\n",
 		      fdt_addr);
 
-		/* copy from dataflash if needed */
-		fdt_addr = genimg_get_image(fdt_addr);
-
 		/*
 		 * Check if there is an FDT image at the
 		 * address provided in the second bootm argument
diff --git a/common/image.c b/common/image.c
index ff0486b626..e205b0fbe6 100644
--- a/common/image.c
+++ b/common/image.c
@@ -386,9 +386,6 @@ void image_print_contents(const void *ptr)
  * flag. Verification done covers data and header integrity and os/type/arch
  * fields checking.
  *
- * If dataflash support is enabled routine checks for dataflash addresses
- * and handles required dataflash reads.
- *
  * returns:
  *     pointer to a ramdisk image header, if image was found and valid
  *     otherwise, return NULL
@@ -886,23 +883,6 @@ int genimg_get_format(const void *img_addr)
 	return IMAGE_FORMAT_INVALID;
 }
 
-/**
- * genimg_get_image - get image from special storage (if necessary)
- * @img_addr: image start address
- *
- * genimg_get_image() checks if provided image start address is located
- * in a dataflash storage. If so, image is moved to a system RAM memory.
- *
- * returns:
- *     image start address after possible relocation from special storage
- */
-ulong genimg_get_image(ulong img_addr)
-{
-	ulong ram_addr = img_addr;
-
-	return ram_addr;
-}
-
 /**
  * fit_has_config - check if there is a valid FIT configuration
  * @images: pointer to the bootm command headers structure
@@ -1035,9 +1015,6 @@ int boot_get_ramdisk(int argc, char * const argv[], bootm_headers_t *images,
 		}
 #endif
 
-		/* copy from dataflash if needed */
-		rd_addr = genimg_get_image(rd_addr);
-
 		/*
 		 * Check if there is an initrd image at the
 		 * address provided in the second bootm argument
@@ -1269,10 +1246,8 @@ int boot_get_fpga(int argc, char * const argv[], bootm_headers_t *images,
 
 	/*
 	 * Obtain the os FIT header from the images struct
-	 * copy from dataflash if needed
 	 */
 	tmp_img_addr = map_to_sysmem(images->fit_hdr_os);
-	tmp_img_addr = genimg_get_image(tmp_img_addr);
 	buf = map_sysmem(tmp_img_addr, 0);
 	/*
 	 * Check image type. For FIT images get FIT node
@@ -1381,10 +1356,8 @@ int boot_get_loadable(int argc, char * const argv[], bootm_headers_t *images,
 
 	/*
 	 * Obtain the os FIT header from the images struct
-	 * copy from dataflash if needed
 	 */
 	tmp_img_addr = map_to_sysmem(images->fit_hdr_os);
-	tmp_img_addr = genimg_get_image(tmp_img_addr);
 	buf = map_sysmem(tmp_img_addr, 0);
 	/*
 	 * Check image type. For FIT images get FIT node
diff --git a/include/image.h b/include/image.h
index 3e2da587ba..688f00fb88 100644
--- a/include/image.h
+++ b/include/image.h
@@ -559,7 +559,6 @@ ulong genimg_get_kernel_addr_fit(char * const img_addr,
 ulong genimg_get_kernel_addr(char * const img_addr);
 int genimg_get_format(const void *img_addr);
 int genimg_has_config(bootm_headers_t *images);
-ulong genimg_get_image(ulong img_addr);
 
 int boot_get_fpga(int argc, char * const argv[], bootm_headers_t *images,
 		uint8_t arch, const ulong *ld_start, ulong * const ld_len);

commit b0ec94428e54da320f890e293bacdedd40ef45e0
Author: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Date:   Tue Oct 10 21:59:42 2017 +0300

    UPSTREAM: Drop CONFIG_HAS_DATAFLASH
    
    Last user of this option went away in commit:
    
    fdc7718999 ("board: usb_a9263: Update to support DT and DM")
    
    Change-Id: Id05869deccb88c1102700dd5af58a8c249e3e9e2
    Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit c68c03f52badc90951dbf8a054c0e500e04bf365)

diff --git a/README b/README
index 788564070e..f0956d9153 100644
--- a/README
+++ b/README
@@ -2367,13 +2367,6 @@ The following options need to be configured:
 		this is instead controlled by the value of
 		/config/load-environment.
 
-- DataFlash Support:
-		CONFIG_HAS_DATAFLASH
-
-		Defining this option enables DataFlash features and
-		allows to read/write in Dataflash via the standard
-		commands cp, md...
-
 - Serial Flash support
 		Usage requires an initial 'sf probe' to define the serial
 		flash parameters, followed by read/write/erase/update
diff --git a/arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c
index 912a966bae..bb3e36552a 100644
--- a/arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c
@@ -58,7 +58,7 @@ void at91_seriald_hw_init(void)
 	at91_periph_clk_enable(ATMEL_ID_SYS);
 }
 
-#if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI)
+#ifdef CONFIG_ATMEL_SPI
 void at91_spi0_hw_init(unsigned long cs_mask)
 {
 	at91_set_a_periph(AT91_PIO_PORTA, 0, PUP);	/* SPI0_MISO */
diff --git a/arch/arm/mach-at91/arm926ejs/at91sam9261_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9261_devices.c
index 4bd4e75e0b..58050a2a24 100644
--- a/arch/arm/mach-at91/arm926ejs/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/arm926ejs/at91sam9261_devices.c
@@ -55,7 +55,7 @@ void at91_seriald_hw_init(void)
 	at91_periph_clk_enable(ATMEL_ID_SYS);
 }
 
-#if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI)
+#ifdef CONFIG_ATMEL_SPI
 void at91_spi0_hw_init(unsigned long cs_mask)
 {
 	at91_set_a_periph(AT91_PIO_PORTA, 0, PUP);	/* SPI0_MISO */
diff --git a/arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c
index f3f480010a..674eb66e8e 100644
--- a/arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c
@@ -59,7 +59,7 @@ void at91_seriald_hw_init(void)
 	at91_periph_clk_enable(ATMEL_ID_SYS);
 }
 
-#if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI)
+#ifdef CONFIG_ATMEL_SPI
 void at91_spi0_hw_init(unsigned long cs_mask)
 {
 	at91_set_b_periph(AT91_PIO_PORTA, 0, PUP);	/* SPI0_MISO */
diff --git a/arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c
index eddfdb0853..b9efa273a0 100644
--- a/arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c
+++ b/arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c
@@ -56,7 +56,7 @@ void at91_seriald_hw_init(void)
 	at91_periph_clk_enable(ATMEL_ID_SYS);
 }
 
-#if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI)
+#ifdef CONFIG_ATMEL_SPI
 void at91_spi0_hw_init(unsigned long cs_mask)
 {
 	at91_set_a_periph(AT91_PIO_PORTB, 0, PUP);	/* SPI0_MISO */
diff --git a/arch/arm/mach-at91/arm926ejs/at91sam9rl_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9rl_devices.c
index dbf9386faa..cd38c6597a 100644
--- a/arch/arm/mach-at91/arm926ejs/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/arm926ejs/at91sam9rl_devices.c
@@ -55,7 +55,7 @@ void at91_seriald_hw_init(void)
 	at91_periph_clk_enable(ATMEL_ID_SYS);
 }
 
-#if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI)
+#ifdef CONFIG_ATMEL_SPI
 void at91_spi0_hw_init(unsigned long cs_mask)
 {
 	at91_set_a_periph(AT91_PIO_PORTA, 25, PUP);	/* SPI0_MISO */
diff --git a/board/atmel/at91sam9260ek/Makefile b/board/atmel/at91sam9260ek/Makefile
index 07c6184352..ad95928701 100644
--- a/board/atmel/at91sam9260ek/Makefile
+++ b/board/atmel/at91sam9260ek/Makefile
@@ -11,4 +11,3 @@
 
 obj-y	+= at91sam9260ek.o
 obj-$(CONFIG_AT91_LED) += led.o
-obj-$(CONFIG_HAS_DATAFLASH) += partition.o
diff --git a/board/atmel/at91sam9260ek/partition.c b/board/atmel/at91sam9260ek/partition.c
deleted file mode 100644
index e41eefe461..0000000000
--- a/board/atmel/at91sam9260ek/partition.c
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * (C) Copyright 2008
- * Ulf Samuelsson <ulf@atmel.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-#include <common.h>
-#include <config.h>
-#include <asm/hardware.h>
-#include <dataflash.h>
-
-AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS];
-
-struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = {
-	{CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0},	/* Logical adress, CS */
-	{CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1, 1}
-};
-
-/*define the area offsets*/
-dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
-	{0x00000000, 0x000041FF, FLAG_PROTECT_SET,   0, "Bootstrap"},
-	{0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"},
-	{0x00008400, 0x00083FFF, FLAG_PROTECT_SET,   0, "U-Boot"},
-	{0x00084000, 0x00293FFF, FLAG_PROTECT_CLEAR, 0,	"Kernel"},
-	{0x00294000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0,	"FS"},
-};
diff --git a/board/atmel/at91sam9261ek/Makefile b/board/atmel/at91sam9261ek/Makefile
index d7ba1533d8..1e807ecc14 100644
--- a/board/atmel/at91sam9261ek/Makefile
+++ b/board/atmel/at91sam9261ek/Makefile
@@ -11,4 +11,3 @@
 
 obj-y += at91sam9261ek.o
 obj-$(CONFIG_AT91_LED) += led.o
-obj-$(CONFIG_HAS_DATAFLASH) += partition.o
diff --git a/board/atmel/at91sam9261ek/partition.c b/board/atmel/at91sam9261ek/partition.c
deleted file mode 100644
index ed97609297..0000000000
--- a/board/atmel/at91sam9261ek/partition.c
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * (C) Copyright 2008
- * Ulf Samuelsson <ulf@atmel.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-#include <common.h>
-#include <config.h>
-#include <asm/hardware.h>
-#include <dataflash.h>
-
-AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS];
-
-struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = {
-	{CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0},	/* Logical adress, CS */
-	{CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3, 3}
-};
-
-/*define the area offsets*/
-dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
-	{0x00000000, 0x000041FF, FLAG_PROTECT_SET,   0, "Bootstrap"},
-	{0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"},
-	{0x00008400, 0x00083FFF, FLAG_PROTECT_SET,   0, "U-Boot"},
-	{0x00084000, 0x00293FFF, FLAG_PROTECT_CLEAR, 0,	"Kernel"},
-	{0x00294000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0,	"FS"},
-};
diff --git a/board/atmel/at91sam9263ek/Makefile b/board/atmel/at91sam9263ek/Makefile
index f3cd9d556e..b7a30ee6ef 100644
--- a/board/atmel/at91sam9263ek/Makefile
+++ b/board/atmel/at91sam9263ek/Makefile
@@ -11,4 +11,3 @@
 
 obj-y += at91sam9263ek.o
 obj-$(CONFIG_AT91_LED) += led.o
-obj-$(CONFIG_HAS_DATAFLASH) += partition.o
diff --git a/board/atmel/at91sam9263ek/partition.c b/board/atmel/at91sam9263ek/partition.c
deleted file mode 100644
index 8617f4899c..0000000000
--- a/board/atmel/at91sam9263ek/partition.c
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- * (C) Copyright 2008
- * Ulf Samuelsson <ulf@atmel.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-#include <common.h>
-#include <config.h>
-#include <asm/hardware.h>
-#include <dataflash.h>
-
-AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS];
-
-struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = {
-	{CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0},	/* Logical adress, CS */
-};
-
-/*define the area offsets*/
-dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
-	{0x00000000, 0x000041FF, FLAG_PROTECT_SET,   0, "Bootstrap"},
-	{0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"},
-	{0x00008400, 0x00083FFF, FLAG_PROTECT_SET,   0, "U-Boot"},
-	{0x00084000, 0x00293FFF, FLAG_PROTECT_CLEAR, 0,	"Kernel"},
-	{0x00294000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0,	"FS"},
-};
diff --git a/board/atmel/at91sam9rlek/Makefile b/board/atmel/at91sam9rlek/Makefile
index 7acfee5350..89f6c0833c 100644
--- a/board/atmel/at91sam9rlek/Makefile
+++ b/board/atmel/at91sam9rlek/Makefile
@@ -11,4 +11,3 @@
 
 obj-y += at91sam9rlek.o
 obj-$(CONFIG_AT91_LED) += led.o
-obj-$(CONFIG_HAS_DATAFLASH) += partition.o
diff --git a/board/atmel/at91sam9rlek/partition.c b/board/atmel/at91sam9rlek/partition.c
deleted file mode 100644
index 8617f4899c..0000000000
--- a/board/atmel/at91sam9rlek/partition.c
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- * (C) Copyright 2008
- * Ulf Samuelsson <ulf@atmel.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-#include <common.h>
-#include <config.h>
-#include <asm/hardware.h>
-#include <dataflash.h>
-
-AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS];
-
-struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = {
-	{CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0},	/* Logical adress, CS */
-};
-
-/*define the area offsets*/
-dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
-	{0x00000000, 0x000041FF, FLAG_PROTECT_SET,   0, "Bootstrap"},
-	{0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"},
-	{0x00008400, 0x00083FFF, FLAG_PROTECT_SET,   0, "U-Boot"},
-	{0x00084000, 0x00293FFF, FLAG_PROTECT_CLEAR, 0,	"Kernel"},
-	{0x00294000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0,	"FS"},
-};
diff --git a/board/esd/meesc/Makefile b/board/esd/meesc/Makefile
index 5d1673820d..f3bf05d47b 100644
--- a/board/esd/meesc/Makefile
+++ b/board/esd/meesc/Makefile
@@ -10,4 +10,3 @@
 #
 
 obj-y	+= meesc.o
-obj-$(CONFIG_HAS_DATAFLASH) += partition.o
diff --git a/board/esd/meesc/partition.c b/board/esd/meesc/partition.c
deleted file mode 100644
index b6afafc239..0000000000
--- a/board/esd/meesc/partition.c
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * (C) Copyright 2008
- * Ulf Samuelsson <ulf@atmel.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-#include <common.h>
-#include <config.h>
-#include <asm/hardware.h>
-#include <dataflash.h>
-
-AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS];
-
-struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = {
-	{CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0},	/* Logical adress, CS */
-};
-
-/* define the area offsets */
-dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
-	{0x00000000, 0x000041FF, FLAG_PROTECT_SET,   0, "Bootstrap"},
-	{0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"},
-	{0x00008400, 0x00041FFF, FLAG_PROTECT_SET,   0, "U-Boot"},
-};
diff --git a/board/mini-box/picosam9g45/picosam9g45.c b/board/mini-box/picosam9g45/picosam9g45.c
index 09ec247663..f3263eba6e 100644
--- a/board/mini-box/picosam9g45/picosam9g45.c
+++ b/board/mini-box/picosam9g45/picosam9g45.c
@@ -261,9 +261,6 @@ int board_init(void)
 #ifdef CONFIG_CMD_USB
 	picosam9g45_usb_hw_init();
 #endif
-#ifdef CONFIG_HAS_DATAFLASH
-	at91_spi0_hw_init(1 << 0);
-#endif
 #ifdef CONFIG_ATMEL_SPI
 	at91_spi0_hw_init(1 << 4);
 #endif
diff --git a/board/ronetix/pm9261/Makefile b/board/ronetix/pm9261/Makefile
index 90835d372f..a133b07d0b 100644
--- a/board/ronetix/pm9261/Makefile
+++ b/board/ronetix/pm9261/Makefile
@@ -12,4 +12,3 @@
 
 obj-y += pm9261.o
 obj-$(CONFIG_RED_LED) += led.o
-obj-$(CONFIG_HAS_DATAFLASH) += partition.o
diff --git a/board/ronetix/pm9261/partition.c b/board/ronetix/pm9261/partition.c
deleted file mode 100644
index 23ab8cf8a0..0000000000
--- a/board/ronetix/pm9261/partition.c
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * (C) Copyright 2008
- * Ulf Samuelsson <ulf@atmel.com>
- * Ilko Iliev <www.ronetix.at>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-#include <common.h>
-#include <config.h>
-#include <asm/hardware.h>
-#include <dataflash.h>
-
-AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS];
-
-struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = {
-	{CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0},	/* Logical adress, CS */
-};
-
-/*define the area offsets*/
-#ifdef CONFIG_SYS_USE_DATAFLASH
-dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
-	{0x00000000, 0x000041FF, FLAG_PROTECT_SET,   0, "Bootstrap"},
-	{0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"},
-	{0x00008400, 0x00041FFF, FLAG_PROTECT_SET,   0, "U-Boot"},
-	{0x00042000, 0x00251FFF, FLAG_PROTECT_CLEAR, 0,	"Kernel"},
-	{0x00252000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0,	"FS"},
-};
-#else
-dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
-	{0x00000000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0, ""},
-};
-
-#endif
diff --git a/board/ronetix/pm9263/Makefile b/board/ronetix/pm9263/Makefile
index 53e621dc80..72aa107b6e 100644
--- a/board/ronetix/pm9263/Makefile
+++ b/board/ronetix/pm9263/Makefile
@@ -12,4 +12,3 @@
 
 obj-y += pm9263.o
 obj-$(CONFIG_AT91_LED) += led.o
-obj-$(CONFIG_HAS_DATAFLASH) += partition.o
diff --git a/board/ronetix/pm9263/partition.c b/board/ronetix/pm9263/partition.c
deleted file mode 100644
index 9cc4214ca6..0000000000
--- a/board/ronetix/pm9263/partition.c
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * (C) Copyright 2008
- * Ulf Samuelsson <ulf@atmel.com>
- * Ilko Iliev <www.ronetix.at>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-#include <common.h>
-#include <config.h>
-#include <asm/hardware.h>
-#include <dataflash.h>
-
-AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS];
-
-struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = {
-	{CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0},	/* Logical adress, CS */
-};
-
-/*define the area offsets*/
-#ifdef CONFIG_SYS_USE_DATAFLASH
-dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
-	{0x00000000, 0x000041FF, FLAG_PROTECT_SET,   0, "Bootstrap"},
-	{0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"},
-	{0x00008400, 0x00041FFF, FLAG_PROTECT_SET,   0, "U-Boot"},
-	{0x00042000, 0x00251FFF, FLAG_PROTECT_CLEAR, 0,	"Kernel"},
-	{0x00252000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0,	"FS"},
-};
-#else
-dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
-	{0x00000000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR,   0, ""},
-};
-
-#endif
diff --git a/board/siemens/corvus/board.c b/board/siemens/corvus/board.c
index d4416e6468..7240c9762e 100644
--- a/board/siemens/corvus/board.c
+++ b/board/siemens/corvus/board.c
@@ -250,9 +250,6 @@ int board_init(void)
 #ifdef CONFIG_ATMEL_SPI
 	at91_spi0_hw_init(1 << 4);
 #endif
-#ifdef CONFIG_HAS_DATAFLASH
-	at91_spi0_hw_init(1 << 0);
-#endif
 #ifdef CONFIG_MACB
 	corvus_macb_hw_init();
 #endif
diff --git a/cmd/flash.c b/cmd/flash.c
index b150940bf3..a2803e8ee4 100644
--- a/cmd/flash.c
+++ b/cmd/flash.c
@@ -11,10 +11,6 @@
 #include <common.h>
 #include <command.h>
 
-#ifdef CONFIG_HAS_DATAFLASH
-#include <dataflash.h>
-#endif
-
 #if defined(CONFIG_CMD_MTDPARTS)
 #include <jffs2/jffs2.h>
 
@@ -279,10 +275,6 @@ static int do_flinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	ulong bank;
 #endif
 
-#ifdef CONFIG_HAS_DATAFLASH
-	dataflash_print_info();
-#endif
-
 #ifdef CONFIG_MTD_NOR_FLASH
 	if (argc == 1) {	/* print info for all FLASH banks */
 		for (bank=0; bank <CONFIG_SYS_MAX_FLASH_BANKS; ++bank) {
@@ -451,10 +443,7 @@ static int do_protect(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	u8 dev_type, dev_num, pnum;
 #endif
 #endif /* CONFIG_MTD_NOR_FLASH */
-#ifdef CONFIG_HAS_DATAFLASH
-	int status;
-#endif
-#if defined(CONFIG_MTD_NOR_FLASH) || defined(CONFIG_HAS_DATAFLASH)
+#if defined(CONFIG_MTD_NOR_FLASH)
 	int p;
 	ulong addr_first, addr_last;
 #endif
@@ -462,7 +451,7 @@ static int do_protect(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	if (argc < 3)
 		return CMD_RET_USAGE;
 
-#if defined(CONFIG_MTD_NOR_FLASH) || defined(CONFIG_HAS_DATAFLASH)
+#if defined(CONFIG_MTD_NOR_FLASH)
 	if (strcmp(argv[1], "off") == 0)
 		p = 0;
 	else if (strcmp(argv[1], "on") == 0)
@@ -471,24 +460,6 @@ static int do_protect(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 		return CMD_RET_USAGE;
 #endif
 
-#ifdef CONFIG_HAS_DATAFLASH
-	if ((strcmp(argv[2], "all") != 0) && (strcmp(argv[2], "bank") != 0)) {
-		addr_first = simple_strtoul(argv[2], NULL, 16);
-		addr_last  = simple_strtoul(argv[3], NULL, 16);
-
-		if (addr_dataflash(addr_first) && addr_dataflash(addr_last)) {
-			status = dataflash_real_protect(p,addr_first,addr_last);
-			if (status < 0){
-				puts ("Bad DataFlash sector specification\n");
-				return 1;
-			}
-			printf("%sProtect %d DataFlash Sectors\n",
-				p ? "" : "Un-", status);
-			return 0;
-		}
-	}
-#endif
-
 #ifdef CONFIG_MTD_NOR_FLASH
 	if (strcmp(argv[2], "all") == 0) {
 		for (bank=1; bank<=CONFIG_SYS_MAX_FLASH_BANKS; ++bank) {
diff --git a/cmd/mem.c b/cmd/mem.c
index 27075e54a9..6775ab7733 100644
--- a/cmd/mem.c
+++ b/cmd/mem.c
@@ -17,9 +17,6 @@
 #include <cli.h>
 #include <command.h>
 #include <console.h>
-#ifdef CONFIG_HAS_DATAFLASH
-#include <dataflash.h>
-#endif
 #include <hash.h>
 #include <inttypes.h>
 #include <mapmem.h>
@@ -52,10 +49,8 @@ static	ulong	base_address = 0;
 #define DISP_LINE_LEN	16
 static int do_mem_md(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
-	ulong	addr, length;
-#if defined(CONFIG_HAS_DATAFLASH)
-	ulong	nbytes, linebytes;
-#endif
+	ulong	addr, length, bytes;
+	const void *buf;
 	int	size;
 	int rc = 0;
 
@@ -88,40 +83,13 @@ static int do_mem_md(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 			length = simple_strtoul(argv[2], NULL, 16);
 	}
 
-#if defined(CONFIG_HAS_DATAFLASH)
-	/* Print the lines.
-	 *
-	 * We buffer all read data, so we can make sure data is read only
-	 * once, and all accesses are with the specified bus width.
-	 */
-	nbytes = length * size;
-	do {
-		char	linebuf[DISP_LINE_LEN];
-		void* p;
-		linebytes = (nbytes>DISP_LINE_LEN)?DISP_LINE_LEN:nbytes;
-
-		rc = read_dataflash(addr, (linebytes/size)*size, linebuf);
-		p = (rc == DATAFLASH_OK) ? linebuf : (void*)addr;
-		print_buffer(addr, p, size, linebytes/size, DISP_LINE_LEN/size);
-
-		nbytes -= linebytes;
-		addr += linebytes;
-		if (ctrlc()) {
-			rc = 1;
-			break;
-		}
-	} while (nbytes > 0);
-#else
-	{
-		ulong bytes = size * length;
-		const void *buf = map_sysmem(addr, bytes);
+	bytes = size * length;
+	buf = map_sysmem(addr, bytes);
 
-		/* Print the lines. */
-		print_buffer(addr, buf, size, length, DISP_LINE_LEN / size);
-		addr += bytes;
-		unmap_sysmem(buf);
-	}
-#endif
+	/* Print the lines. */
+	print_buffer(addr, buf, size, length, DISP_LINE_LEN / size);
+	addr += bytes;
+	unmap_sysmem(buf);
 
 	dp_last_addr = addr;
 	dp_last_length = length;
@@ -286,13 +254,6 @@ static int do_mem_cmp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 
 	count = simple_strtoul(argv[3], NULL, 16);
 
-#ifdef CONFIG_HAS_DATAFLASH
-	if (addr_dataflash(addr1) | addr_dataflash(addr2)){
-		puts ("Comparison with DataFlash space not supported.\n\r");
-		return 0;
-	}
-#endif
-
 	bytes = size * count;
 	base = buf1 = map_sysmem(addr1, bytes);
 	buf2 = map_sysmem(addr2, bytes);
@@ -370,11 +331,7 @@ static int do_mem_cp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 
 #ifdef CONFIG_MTD_NOR_FLASH
 	/* check if we are copying to Flash */
-	if ( (addr2info(dest) != NULL)
-#ifdef CONFIG_HAS_DATAFLASH
-	   && (!addr_dataflash(dest))
-#endif
-	   ) {
+	if (addr2info(dest) != NULL) {
 		int rc;
 
 		puts ("Copy to Flash... ");
@@ -389,44 +346,6 @@ static int do_mem_cp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	}
 #endif
 
-#ifdef CONFIG_HAS_DATAFLASH
-	/* Check if we are copying from RAM or Flash to DataFlash */
-	if (addr_dataflash(dest) && !addr_dataflash(addr)){
-		int rc;
-
-		puts ("Copy to DataFlash... ");
-
-		rc = write_dataflash (dest, addr, count*size);
-
-		if (rc != 1) {
-			dataflash_perror (rc);
-			return (1);
-		}
-		puts ("done\n");
-		return 0;
-	}
-
-	/* Check if we are copying from DataFlash to RAM */
-	if (addr_dataflash(addr) && !addr_dataflash(dest)
-#ifdef CONFIG_MTD_NOR_FLASH
-				 && (addr2info(dest) == NULL)
-#endif
-	   ){
-		int rc;
-		rc = read_dataflash(addr, count * size, (char *) dest);
-		if (rc != 1) {
-			dataflash_perror (rc);
-			return (1);
-		}
-		return 0;
-	}
-
-	if (addr_dataflash(addr) && addr_dataflash(dest)){
-		puts ("Unsupported combination of source/destination.\n\r");
-		return 1;
-	}
-#endif
-
 	memcpy((void *)dest, (void *)addr, count * size);
 
 	return 0;
@@ -1072,13 +991,6 @@ mod_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char * const argv[])
 		addr += base_address;
 	}
 
-#ifdef CONFIG_HAS_DATAFLASH
-	if (addr_dataflash(addr)){
-		puts ("Can't modify DataFlash in place. Use cp instead.\n\r");
-		return 0;
-	}
-#endif
-
 	/* Print the address, followed by value.  Then accept input for
 	 * the next value.  A non-converted value exits.
 	 */
diff --git a/common/board_r.c b/common/board_r.c
index 94697e7bc1..a3b9bfb8ee 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -18,9 +18,6 @@
 #endif
 #include <command.h>
 #include <console.h>
-#ifdef CONFIG_HAS_DATAFLASH
-#include <dataflash.h>
-#endif
 #include <dm.h>
 #include <environment.h>
 #include <fdtdec.h>
@@ -447,15 +444,6 @@ static int initr_mmc(void)
 }
 #endif
 
-#ifdef CONFIG_HAS_DATAFLASH
-static int initr_dataflash(void)
-{
-	AT91F_DataflashInit();
-	dataflash_print_info();
-	return 0;
-}
-#endif
-
 /*
  * Tell if it's OK to load the environment early in boot.
  *
@@ -802,9 +790,6 @@ static init_fnc_t init_sequence_r[] = {
 #endif
 #ifdef CONFIG_MMC
 	initr_mmc,
-#endif
-#ifdef CONFIG_HAS_DATAFLASH
-	initr_dataflash,
 #endif
 	initr_env,
 #ifdef CONFIG_SYS_BOOTPARAMS_LEN
diff --git a/common/image.c b/common/image.c
index c6168af3c0..ff0486b626 100644
--- a/common/image.c
+++ b/common/image.c
@@ -15,10 +15,6 @@
 #include <status_led.h>
 #endif
 
-#ifdef CONFIG_HAS_DATAFLASH
-#include <dataflash.h>
-#endif
-
 #ifdef CONFIG_LOGBUFFER
 #include <logbuff.h>
 #endif
@@ -904,64 +900,6 @@ ulong genimg_get_image(ulong img_addr)
 {
 	ulong ram_addr = img_addr;
 
-#ifdef CONFIG_HAS_DATAFLASH
-	ulong h_size, d_size;
-
-	if (addr_dataflash(img_addr)) {
-		void *buf;
-
-		/* ger RAM address */
-		ram_addr = CONFIG_SYS_LOAD_ADDR;
-
-		/* get header size */
-		h_size = image_get_header_size();
-#if IMAGE_ENABLE_FIT
-		if (sizeof(struct fdt_header) > h_size)
-			h_size = sizeof(struct fdt_header);
-#endif
-
-		/* read in header */
-		debug("   Reading image header from dataflash address "
-			"%08lx to RAM address %08lx\n", img_addr, ram_addr);
-
-		buf = map_sysmem(ram_addr, 0);
-		read_dataflash(img_addr, h_size, buf);
-
-		/* get data size */
-		switch (genimg_get_format(buf)) {
-#if defined(CONFIG_IMAGE_FORMAT_LEGACY)
-		case IMAGE_FORMAT_LEGACY:
-			d_size = image_get_data_size(buf);
-			debug("   Legacy format image found at 0x%08lx, "
-					"size 0x%08lx\n",
-					ram_addr, d_size);
-			break;
-#endif
-#if IMAGE_ENABLE_FIT
-		case IMAGE_FORMAT_FIT:
-			d_size = fit_get_size(buf) - h_size;
-			debug("   FIT/FDT format image found at 0x%08lx, "
-					"size 0x%08lx\n",
-					ram_addr, d_size);
-			break;
-#endif
-		default:
-			printf("   No valid image found at 0x%08lx\n",
-				img_addr);
-			return ram_addr;
-		}
-
-		/* read in image data */
-		debug("   Reading image remaining data from dataflash address "
-			"%08lx to RAM address %08lx\n", img_addr + h_size,
-			ram_addr + h_size);
-
-		read_dataflash(img_addr + h_size, d_size,
-				(char *)(buf + h_size));
-
-	}
-#endif /* CONFIG_HAS_DATAFLASH */
-
 	return ram_addr;
 }
 
diff --git a/drivers/mtd/Makefile b/drivers/mtd/Makefile
index bd680a784f..20c0d0af44 100644
--- a/drivers/mtd/Makefile
+++ b/drivers/mtd/Makefile
@@ -12,10 +12,8 @@ obj-$(CONFIG_MTD) += mtd-uclass.o
 obj-$(CONFIG_MTD_PARTITIONS) += mtdpart.o
 obj-$(CONFIG_MTD_CONCAT) += mtdconcat.o
 obj-$(CONFIG_ALTERA_QSPI) += altera_qspi.o
-obj-$(CONFIG_HAS_DATAFLASH) += at45.o
 obj-$(CONFIG_FLASH_CFI_DRIVER) += cfi_flash.o
 obj-$(CONFIG_FLASH_CFI_MTD) += cfi_mtd.o
-obj-$(CONFIG_HAS_DATAFLASH) += dataflash.o
 obj-$(CONFIG_FTSMC020) += ftsmc020.o
 obj-$(CONFIG_FLASH_CFI_LEGACY) += jedec_flash.o
 obj-$(CONFIG_MW_EEPROM) += mw_eeprom.o
diff --git a/drivers/mtd/at45.c b/drivers/mtd/at45.c
deleted file mode 100644
index 2f49be38b8..0000000000
--- a/drivers/mtd/at45.c
+++ /dev/null
@@ -1,545 +0,0 @@
-/* Driver for ATMEL DataFlash support
- * Author : Hamid Ikdoumi (Atmel)
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <config.h>
-#include <common.h>
-#include <dataflash.h>
-
-/*
- * spi.c API
- */
-extern unsigned int AT91F_SpiWrite(AT91PS_DataflashDesc pDesc);
-extern void AT91F_SpiEnable(int cs);
-
-#define AT91C_TIMEOUT_WRDY			200000
-
-/*----------------------------------------------------------------------*/
-/* \fn    AT91F_DataFlashSendCommand					*/
-/* \brief Generic function to send a command to the dataflash		*/
-/*----------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_DataFlashSendCommand(AT91PS_DataFlash pDataFlash,
-						 unsigned char OpCode,
-						 unsigned int CmdSize,
-						 unsigned int DataflashAddress)
-{
-	unsigned int adr;
-
-	if ((pDataFlash->pDataFlashDesc->state) != IDLE)
-		return DATAFLASH_BUSY;
-
-	/* process the address to obtain page address and byte address */
-	adr = ((DataflashAddress / (pDataFlash->pDevice->pages_size)) <<
-		pDataFlash->pDevice->page_offset) +
-			(DataflashAddress % (pDataFlash->pDevice->pages_size));
-
-	/* fill the command buffer */
-	pDataFlash->pDataFlashDesc->command[0] = OpCode;
-	if (pDataFlash->pDevice->pages_number >= 16384) {
-		pDataFlash->pDataFlashDesc->command[1] =
-			(unsigned char)((adr & 0x0F000000) >> 24);
-		pDataFlash->pDataFlashDesc->command[2] =
-			(unsigned char)((adr & 0x00FF0000) >> 16);
-		pDataFlash->pDataFlashDesc->command[3] =
-			(unsigned char)((adr & 0x0000FF00) >> 8);
-		pDataFlash->pDataFlashDesc->command[4] =
-			(unsigned char)(adr & 0x000000FF);
-	} else {
-		pDataFlash->pDataFlashDesc->command[1] =
-			(unsigned char)((adr & 0x00FF0000) >> 16);
-		pDataFlash->pDataFlashDesc->command[2] =
-			(unsigned char)((adr & 0x0000FF00) >> 8);
-		pDataFlash->pDataFlashDesc->command[3] =
-			(unsigned char)(adr & 0x000000FF);
-		pDataFlash->pDataFlashDesc->command[4] = 0;
-	}
-	pDataFlash->pDataFlashDesc->command[5] = 0;
-	pDataFlash->pDataFlashDesc->command[6] = 0;
-	pDataFlash->pDataFlashDesc->command[7] = 0;
-
-	/* Initialize the SpiData structure for the spi write fuction */
-	pDataFlash->pDataFlashDesc->tx_cmd_pt =
-		pDataFlash->pDataFlashDesc->command;
-	pDataFlash->pDataFlashDesc->tx_cmd_size = CmdSize;
-	pDataFlash->pDataFlashDesc->rx_cmd_pt =
-		pDataFlash->pDataFlashDesc->command;
-	pDataFlash->pDataFlashDesc->rx_cmd_size = CmdSize;
-
-	/* send the command and read the data */
-	return AT91F_SpiWrite(pDataFlash->pDataFlashDesc);
-}
-
-/*----------------------------------------------------------------------*/
-/* \fn    AT91F_DataFlashGetStatus					*/
-/* \brief Read the status register of the dataflash			*/
-/*----------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_DataFlashGetStatus(AT91PS_DataflashDesc pDesc)
-{
-	AT91S_DataFlashStatus status;
-
-	/* if a transfert is in progress ==> return 0 */
-	if ((pDesc->state) != IDLE)
-		return DATAFLASH_BUSY;
-
-	/* first send the read status command (D7H) */
-	pDesc->command[0] = DB_STATUS;
-	pDesc->command[1] = 0;
-
-	pDesc->DataFlash_state = GET_STATUS;
-	pDesc->tx_data_size = 0;	/* Transmit the command */
-	/* and receive response */
-	pDesc->tx_cmd_pt = pDesc->command;
-	pDesc->rx_cmd_pt = pDesc->command;
-	pDesc->rx_cmd_size = 2;
-	pDesc->tx_cmd_size = 2;
-	status = AT91F_SpiWrite(pDesc);
-
-	pDesc->DataFlash_state = *((unsigned char *)(pDesc->rx_cmd_pt) + 1);
-
-	return status;
-}
-
-/*----------------------------------------------------------------------*/
-/* \fn    AT91F_DataFlashWaitReady					*/
-/* \brief wait for dataflash ready (bit7 of the status register == 1)	*/
-/*----------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_DataFlashWaitReady(AT91PS_DataflashDesc
-						pDataFlashDesc,
-						unsigned int timeout)
-{
-	pDataFlashDesc->DataFlash_state = IDLE;
-
-	do {
-		AT91F_DataFlashGetStatus(pDataFlashDesc);
-		timeout--;
-	} while (((pDataFlashDesc->DataFlash_state & 0x80) != 0x80) &&
-		 (timeout > 0));
-
-	if ((pDataFlashDesc->DataFlash_state & 0x80) != 0x80)
-		return DATAFLASH_ERROR;
-
-	return DATAFLASH_OK;
-}
-
-/*--------------------------------------------------------------------------*/
-/* Function Name       : AT91F_DataFlashContinuousRead			    */
-/* Object              : Continuous stream Read			    */
-/* Input Parameters    : DataFlash Service				    */
-/*						: <src> = dataflash address */
-/*                     : <*dataBuffer> = data buffer pointer		    */
-/*                     : <sizeToRead> = data buffer size		    */
-/* Return value		: State of the dataflash			    */
-/*--------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_DataFlashContinuousRead(
-				AT91PS_DataFlash pDataFlash,
-				int src,
-				unsigned char *dataBuffer,
-				int sizeToRead)
-{
-	AT91S_DataFlashStatus status;
-	/* Test the size to read in the device */
-	if ((src + sizeToRead) >
-			(pDataFlash->pDevice->pages_size *
-				(pDataFlash->pDevice->pages_number)))
-		return DATAFLASH_MEMORY_OVERFLOW;
-
-	pDataFlash->pDataFlashDesc->rx_data_pt = dataBuffer;
-	pDataFlash->pDataFlashDesc->rx_data_size = sizeToRead;
-	pDataFlash->pDataFlashDesc->tx_data_pt = dataBuffer;
-	pDataFlash->pDataFlashDesc->tx_data_size = sizeToRead;
-
-	status = AT91F_DataFlashSendCommand(
-			pDataFlash, DB_CONTINUOUS_ARRAY_READ, 8, src);
-	/* Send the command to the dataflash */
-	return (status);
-}
-
-/*---------------------------------------------------------------------------*/
-/* Function Name       : AT91F_DataFlashPagePgmBuf			     */
-/* Object              : Main memory page program thru buffer 1 or buffer 2  */
-/* Input Parameters    : DataFlash Service				     */
-/*						: <*src> = Source buffer     */
-/*                     : <dest> = dataflash destination address		     */
-/*                     : <SizeToWrite> = data buffer size		     */
-/* Return value		: State of the dataflash			     */
-/*---------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_DataFlashPagePgmBuf(AT91PS_DataFlash pDataFlash,
-						unsigned char *src,
-						unsigned int dest,
-						unsigned int SizeToWrite)
-{
-	int cmdsize;
-	pDataFlash->pDataFlashDesc->tx_data_pt = src;
-	pDataFlash->pDataFlashDesc->tx_data_size = SizeToWrite;
-	pDataFlash->pDataFlashDesc->rx_data_pt = src;
-	pDataFlash->pDataFlashDesc->rx_data_size = SizeToWrite;
-
-	cmdsize = 4;
-	/* Send the command to the dataflash */
-	if (pDataFlash->pDevice->pages_number >= 16384)
-		cmdsize = 5;
-	return (AT91F_DataFlashSendCommand(
-			pDataFlash, DB_PAGE_PGM_BUF1, cmdsize, dest));
-}
-
-/*---------------------------------------------------------------------------*/
-/* Function Name       : AT91F_MainMemoryToBufferTransfert		     */
-/* Object              : Read a page in the SRAM Buffer 1 or 2		     */
-/* Input Parameters    : DataFlash Service				     */
-/*                     : Page concerned					     */
-/*                     :						     */
-/* Return value		: State of the dataflash			     */
-/*---------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_MainMemoryToBufferTransfert(
-					AT91PS_DataFlash
-					pDataFlash,
-					unsigned char
-					BufferCommand,
-					unsigned int page)
-{
-	int cmdsize;
-	/* Test if the buffer command is legal */
-	if ((BufferCommand != DB_PAGE_2_BUF1_TRF) &&
-			(BufferCommand != DB_PAGE_2_BUF2_TRF)) {
-		return DATAFLASH_BAD_COMMAND;
-	}
-
-	/* no data to transmit or receive */
-	pDataFlash->pDataFlashDesc->tx_data_size = 0;
-	cmdsize = 4;
-	if (pDataFlash->pDevice->pages_number >= 16384)
-		cmdsize = 5;
-	return (AT91F_DataFlashSendCommand(
-			pDataFlash, BufferCommand, cmdsize,
-			page * pDataFlash->pDevice->pages_size));
-}
-
-/*-------------------------------------------------------------------------- */
-/* Function Name       : AT91F_DataFlashWriteBuffer			     */
-/* Object              : Write data to the internal sram buffer 1 or 2	     */
-/* Input Parameters    : DataFlash Service				     */
-/*			: <BufferCommand> = command to write buffer1 or 2    */
-/*                     : <*dataBuffer> = data buffer to write		     */
-/*                     : <bufferAddress> = address in the internal buffer    */
-/*                     : <SizeToWrite> = data buffer size		     */
-/* Return value		: State of the dataflash			     */
-/*---------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_DataFlashWriteBuffer(
-					AT91PS_DataFlash pDataFlash,
-					unsigned char BufferCommand,
-					unsigned char *dataBuffer,
-					unsigned int bufferAddress,
-					int SizeToWrite)
-{
-	int cmdsize;
-	/* Test if the buffer command is legal */
-	if ((BufferCommand != DB_BUF1_WRITE) &&
-			(BufferCommand != DB_BUF2_WRITE)) {
-		return DATAFLASH_BAD_COMMAND;
-	}
-
-	/* buffer address must be lower than page size */
-	if (bufferAddress > pDataFlash->pDevice->pages_size)
-		return DATAFLASH_BAD_ADDRESS;
-
-	if ((pDataFlash->pDataFlashDesc->state) != IDLE)
-		return DATAFLASH_BUSY;
-
-	/* Send first Write Command */
-	pDataFlash->pDataFlashDesc->command[0] = BufferCommand;
-	pDataFlash->pDataFlashDesc->command[1] = 0;
-	if (pDataFlash->pDevice->pages_number >= 16384) {
-		pDataFlash->pDataFlashDesc->command[2] = 0;
-		pDataFlash->pDataFlashDesc->command[3] =
-			(unsigned char)(((unsigned int)(bufferAddress &
-							pDataFlash->pDevice->
-							byte_mask)) >> 8);
-		pDataFlash->pDataFlashDesc->command[4] =
-			(unsigned char)((unsigned int)bufferAddress & 0x00FF);
-		cmdsize = 5;
-	} else {
-		pDataFlash->pDataFlashDesc->command[2] =
-			(unsigned char)(((unsigned int)(bufferAddress &
-							pDataFlash->pDevice->
-							byte_mask)) >> 8);
-		pDataFlash->pDataFlashDesc->command[3] =
-			(unsigned char)((unsigned int)bufferAddress & 0x00FF);
-		pDataFlash->pDataFlashDesc->command[4] = 0;
-		cmdsize = 4;
-	}
-
-	pDataFlash->pDataFlashDesc->tx_cmd_pt =
-		pDataFlash->pDataFlashDesc->command;
-	pDataFlash->pDataFlashDesc->tx_cmd_size = cmdsize;
-	pDataFlash->pDataFlashDesc->rx_cmd_pt =
-		pDataFlash->pDataFlashDesc->command;
-	pDataFlash->pDataFlashDesc->rx_cmd_size = cmdsize;
-
-	pDataFlash->pDataFlashDesc->rx_data_pt = dataBuffer;
-	pDataFlash->pDataFlashDesc->tx_data_pt = dataBuffer;
-	pDataFlash->pDataFlashDesc->rx_data_size = SizeToWrite;
-	pDataFlash->pDataFlashDesc->tx_data_size = SizeToWrite;
-
-	return AT91F_SpiWrite(pDataFlash->pDataFlashDesc);
-}
-
-/*---------------------------------------------------------------------------*/
-/* Function Name       : AT91F_PageErase                                     */
-/* Object              : Erase a page					     */
-/* Input Parameters    : DataFlash Service				     */
-/*                     : Page concerned					     */
-/*                     :						     */
-/* Return value		: State of the dataflash			     */
-/*---------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_PageErase(
-					AT91PS_DataFlash pDataFlash,
-					unsigned int page)
-{
-	int cmdsize;
-	/* Test if the buffer command is legal */
-	/* no data to transmit or receive */
-	pDataFlash->pDataFlashDesc->tx_data_size = 0;
-
-	cmdsize = 4;
-	if (pDataFlash->pDevice->pages_number >= 16384)
-		cmdsize = 5;
-	return (AT91F_DataFlashSendCommand(pDataFlash,
-				DB_PAGE_ERASE, cmdsize,
-				page * pDataFlash->pDevice->pages_size));
-}
-
-/*---------------------------------------------------------------------------*/
-/* Function Name       : AT91F_BlockErase                                    */
-/* Object              : Erase a Block					     */
-/* Input Parameters    : DataFlash Service				     */
-/*                     : Page concerned					     */
-/*                     :						     */
-/* Return value		: State of the dataflash			     */
-/*---------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_BlockErase(
-				AT91PS_DataFlash pDataFlash,
-				unsigned int block)
-{
-	int cmdsize;
-	/* Test if the buffer command is legal */
-	/* no data to transmit or receive */
-	pDataFlash->pDataFlashDesc->tx_data_size = 0;
-	cmdsize = 4;
-	if (pDataFlash->pDevice->pages_number >= 16384)
-		cmdsize = 5;
-	return (AT91F_DataFlashSendCommand(pDataFlash, DB_BLOCK_ERASE, cmdsize,
-					block * 8 *
-					pDataFlash->pDevice->pages_size));
-}
-
-/*---------------------------------------------------------------------------*/
-/* Function Name       : AT91F_WriteBufferToMain			     */
-/* Object              : Write buffer to the main memory		     */
-/* Input Parameters    : DataFlash Service				     */
-/*		: <BufferCommand> = command to send to buffer1 or buffer2    */
-/*                     : <dest> = main memory address			     */
-/* Return value		: State of the dataflash			     */
-/*---------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_WriteBufferToMain(AT91PS_DataFlash pDataFlash,
-					unsigned char BufferCommand,
-					unsigned int dest)
-{
-	int cmdsize;
-	/* Test if the buffer command is correct */
-	if ((BufferCommand != DB_BUF1_PAGE_PGM) &&
-			(BufferCommand != DB_BUF1_PAGE_ERASE_PGM) &&
-			(BufferCommand != DB_BUF2_PAGE_PGM) &&
-			(BufferCommand != DB_BUF2_PAGE_ERASE_PGM))
-		return DATAFLASH_BAD_COMMAND;
-
-	/* no data to transmit or receive */
-	pDataFlash->pDataFlashDesc->tx_data_size = 0;
-
-	cmdsize = 4;
-	if (pDataFlash->pDevice->pages_number >= 16384)
-		cmdsize = 5;
-	/* Send the command to the dataflash */
-	return (AT91F_DataFlashSendCommand(pDataFlash, BufferCommand,
-						cmdsize, dest));
-}
-
-/*---------------------------------------------------------------------------*/
-/* Function Name       : AT91F_PartialPageWrite				     */
-/* Object              : Erase partielly a page				     */
-/* Input Parameters    : <page> = page number				     */
-/*			: <AdrInpage> = adr to begin the fading		     */
-/*                     : <length> = Number of bytes to erase		     */
-/*---------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_PartialPageWrite(AT91PS_DataFlash pDataFlash,
-					unsigned char *src,
-					unsigned int dest,
-					unsigned int size)
-{
-	unsigned int page;
-	unsigned int AdrInPage;
-
-	page = dest / (pDataFlash->pDevice->pages_size);
-	AdrInPage = dest % (pDataFlash->pDevice->pages_size);
-
-	/* Read the contents of the page in the Sram Buffer */
-	AT91F_MainMemoryToBufferTransfert(pDataFlash, DB_PAGE_2_BUF1_TRF, page);
-	AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc,
-				 AT91C_TIMEOUT_WRDY);
-	/*Update the SRAM buffer */
-	AT91F_DataFlashWriteBuffer(pDataFlash, DB_BUF1_WRITE, src,
-					AdrInPage, size);
-
-	AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc,
-					AT91C_TIMEOUT_WRDY);
-
-	/* Erase page if a 128 Mbits device */
-	if (pDataFlash->pDevice->pages_number >= 16384) {
-		AT91F_PageErase(pDataFlash, page);
-		/* Rewrite the modified Sram Buffer in the main memory */
-		AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc,
-					 AT91C_TIMEOUT_WRDY);
-	}
-
-	/* Rewrite the modified Sram Buffer in the main memory */
-	return (AT91F_WriteBufferToMain(pDataFlash, DB_BUF1_PAGE_ERASE_PGM,
-					(page *
-					 pDataFlash->pDevice->pages_size)));
-}
-
-/*---------------------------------------------------------------------------*/
-/* Function Name       : AT91F_DataFlashWrite				     */
-/* Object              :						     */
-/* Input Parameters    : <*src> = Source buffer				     */
-/*                     : <dest> = dataflash adress			     */
-/*                     : <size> = data buffer size			     */
-/*---------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_DataFlashWrite(AT91PS_DataFlash pDataFlash,
-						unsigned char *src,
-						int dest, int size)
-{
-	unsigned int length;
-	unsigned int page;
-	unsigned int status;
-
-	AT91F_SpiEnable(pDataFlash->pDevice->cs);
-
-	if ((dest + size) > (pDataFlash->pDevice->pages_size *
-			(pDataFlash->pDevice->pages_number)))
-		return DATAFLASH_MEMORY_OVERFLOW;
-
-	/* If destination does not fit a page start address */
-	if ((dest % ((unsigned int)(pDataFlash->pDevice->pages_size))) != 0) {
-		length =
-			pDataFlash->pDevice->pages_size -
-			(dest % ((unsigned int)(pDataFlash->pDevice->pages_size)));
-
-		if (size < length)
-			length = size;
-
-		if (!AT91F_PartialPageWrite(pDataFlash, src, dest, length))
-			return DATAFLASH_ERROR;
-
-		AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc,
-					 AT91C_TIMEOUT_WRDY);
-
-		/* Update size, source and destination pointers */
-		size -= length;
-		dest += length;
-		src += length;
-	}
-
-	while ((size - pDataFlash->pDevice->pages_size) >= 0) {
-		/* program dataflash page */
-		page = (unsigned int)dest / (pDataFlash->pDevice->pages_size);
-
-		status = AT91F_DataFlashWriteBuffer(pDataFlash,
-					DB_BUF1_WRITE, src, 0,
-					pDataFlash->pDevice->
-					pages_size);
-		AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc,
-					 AT91C_TIMEOUT_WRDY);
-
-		status = AT91F_PageErase(pDataFlash, page);
-		AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc,
-					 AT91C_TIMEOUT_WRDY);
-		if (!status)
-			return DATAFLASH_ERROR;
-
-		status = AT91F_WriteBufferToMain(pDataFlash,
-					 DB_BUF1_PAGE_PGM, dest);
-		if (!status)
-			return DATAFLASH_ERROR;
-
-		AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc,
-					 AT91C_TIMEOUT_WRDY);
-
-		/* Update size, source and destination pointers */
-		size -= pDataFlash->pDevice->pages_size;
-		dest += pDataFlash->pDevice->pages_size;
-		src += pDataFlash->pDevice->pages_size;
-	}
-
-	/* If still some bytes to read */
-	if (size > 0) {
-		/* program dataflash page */
-		if (!AT91F_PartialPageWrite(pDataFlash, src, dest, size))
-			return DATAFLASH_ERROR;
-
-		AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc,
-					 AT91C_TIMEOUT_WRDY);
-	}
-	return DATAFLASH_OK;
-}
-
-/*---------------------------------------------------------------------------*/
-/* Function Name       : AT91F_DataFlashRead				     */
-/* Object              : Read a block in dataflash			     */
-/* Input Parameters    :						     */
-/* Return value		:						     */
-/*---------------------------------------------------------------------------*/
-int AT91F_DataFlashRead(AT91PS_DataFlash pDataFlash,
-			unsigned long addr, unsigned long size, char *buffer)
-{
-	unsigned long SizeToRead;
-
-	AT91F_SpiEnable(pDataFlash->pDevice->cs);
-
-	if (AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc,
-					AT91C_TIMEOUT_WRDY) != DATAFLASH_OK)
-		return -1;
-
-	while (size) {
-		SizeToRead = (size < 0x8000) ? size : 0x8000;
-
-		if (AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc,
-					AT91C_TIMEOUT_WRDY) !=
-						DATAFLASH_OK)
-			return -1;
-
-		if (AT91F_DataFlashContinuousRead(pDataFlash, addr,
-						(uchar *) buffer,
-						SizeToRead) != DATAFLASH_OK)
-			return -1;
-
-		size -= SizeToRead;
-		addr += SizeToRead;
-		buffer += SizeToRead;
-	}
-
-	return DATAFLASH_OK;
-}
-
-/*---------------------------------------------------------------------------*/
-/* Function Name       : AT91F_DataflashProbe				     */
-/* Object              :						     */
-/* Input Parameters    :						     */
-/* Return value	       : Dataflash status register			     */
-/*---------------------------------------------------------------------------*/
-int AT91F_DataflashProbe(int cs, AT91PS_DataflashDesc pDesc)
-{
-	AT91F_SpiEnable(cs);
-	AT91F_DataFlashGetStatus(pDesc);
-	return ((pDesc->command[1] == 0xFF) ? 0 : pDesc->command[1] & 0x3C);
-}
diff --git a/drivers/mtd/dataflash.c b/drivers/mtd/dataflash.c
deleted file mode 100644
index e961f518b0..0000000000
--- a/drivers/mtd/dataflash.c
+++ /dev/null
@@ -1,448 +0,0 @@
-/*
- * LowLevel function for ATMEL DataFlash support
- * Author : Hamid Ikdoumi (Atmel)
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-#include <common.h>
-#include <config.h>
-#include <asm/hardware.h>
-#include <dataflash.h>
-
-static AT91S_DataFlash DataFlashInst;
-
-extern void AT91F_SpiInit (void);
-extern int AT91F_DataflashProbe (int i, AT91PS_DataflashDesc pDesc);
-extern int AT91F_DataFlashRead (AT91PS_DataFlash pDataFlash,
-				unsigned long addr,
-				unsigned long size, char *buffer);
-extern int AT91F_DataFlashWrite( AT91PS_DataFlash pDataFlash,
-				unsigned char *src,
-				int dest,
-				int size );
-
-int AT91F_DataflashInit (void)
-{
-	int i, j;
-	int dfcode;
-	int part;
-	int found[CONFIG_SYS_MAX_DATAFLASH_BANKS];
-	unsigned char protected;
-
-	AT91F_SpiInit ();
-
-	for (i = 0; i < CONFIG_SYS_MAX_DATAFLASH_BANKS; i++) {
-		found[i] = 0;
-		dataflash_info[i].Desc.state = IDLE;
-		dataflash_info[i].id = 0;
-		dataflash_info[i].Device.pages_number = 0;
-		dfcode = AT91F_DataflashProbe (cs[i].cs,
-				&dataflash_info[i].Desc);
-
-		switch (dfcode) {
-		case AT45DB021:
-			dataflash_info[i].Device.pages_number = 1024;
-			dataflash_info[i].Device.pages_size = 264;
-			dataflash_info[i].Device.page_offset = 9;
-			dataflash_info[i].Device.byte_mask = 0x300;
-			dataflash_info[i].Device.cs = cs[i].cs;
-			dataflash_info[i].Desc.DataFlash_state = IDLE;
-			dataflash_info[i].logical_address = cs[i].addr;
-			dataflash_info[i].id = dfcode;
-			found[i] += dfcode;
-			break;
-
-		case AT45DB081:
-			dataflash_info[i].Device.pages_number = 4096;
-			dataflash_info[i].Device.pages_size = 264;
-			dataflash_info[i].Device.page_offset = 9;
-			dataflash_info[i].Device.byte_mask = 0x300;
-			dataflash_info[i].Device.cs = cs[i].cs;
-			dataflash_info[i].Desc.DataFlash_state = IDLE;
-			dataflash_info[i].logical_address = cs[i].addr;
-			dataflash_info[i].id = dfcode;
-			found[i] += dfcode;
-			break;
-
-		case AT45DB161:
-			dataflash_info[i].Device.pages_number = 4096;
-			dataflash_info[i].Device.pages_size = 528;
-			dataflash_info[i].Device.page_offset = 10;
-			dataflash_info[i].Device.byte_mask = 0x300;
-			dataflash_info[i].Device.cs = cs[i].cs;
-			dataflash_info[i].Desc.DataFlash_state = IDLE;
-			dataflash_info[i].logical_address = cs[i].addr;
-			dataflash_info[i].id = dfcode;
-			found[i] += dfcode;
-			break;
-
-		case AT45DB321:
-			dataflash_info[i].Device.pages_number = 8192;
-			dataflash_info[i].Device.pages_size = 528;
-			dataflash_info[i].Device.page_offset = 10;
-			dataflash_info[i].Device.byte_mask = 0x300;
-			dataflash_info[i].Device.cs = cs[i].cs;
-			dataflash_info[i].Desc.DataFlash_state = IDLE;
-			dataflash_info[i].logical_address = cs[i].addr;
-			dataflash_info[i].id = dfcode;
-			found[i] += dfcode;
-			break;
-
-		case AT45DB642:
-			dataflash_info[i].Device.pages_number = 8192;
-			dataflash_info[i].Device.pages_size = 1056;
-			dataflash_info[i].Device.page_offset = 11;
-			dataflash_info[i].Device.byte_mask = 0x700;
-			dataflash_info[i].Device.cs = cs[i].cs;
-			dataflash_info[i].Desc.DataFlash_state = IDLE;
-			dataflash_info[i].logical_address = cs[i].addr;
-			dataflash_info[i].id = dfcode;
-			found[i] += dfcode;
-			break;
-
-		case AT45DB128:
-			dataflash_info[i].Device.pages_number = 16384;
-			dataflash_info[i].Device.pages_size = 1056;
-			dataflash_info[i].Device.page_offset = 11;
-			dataflash_info[i].Device.byte_mask = 0x700;
-			dataflash_info[i].Device.cs = cs[i].cs;
-			dataflash_info[i].Desc.DataFlash_state = IDLE;
-			dataflash_info[i].logical_address = cs[i].addr;
-			dataflash_info[i].id = dfcode;
-			found[i] += dfcode;
-			break;
-
-		default:
-			dfcode = 0;
-			break;
-		}
-		/* set the last area end to the dataflash size*/
-		dataflash_info[i].end_address =
-				(dataflash_info[i].Device.pages_number *
-				dataflash_info[i].Device.pages_size) - 1;
-
-		part = 0;
-		/* set the area addresses */
-		for(j = 0; j < NB_DATAFLASH_AREA; j++) {
-			if(found[i]!=0) {
-				dataflash_info[i].Device.area_list[j].start =
-					area_list[part].start +
-					dataflash_info[i].logical_address;
-				if(area_list[part].end == 0xffffffff) {
-					dataflash_info[i].Device.area_list[j].end =
-						dataflash_info[i].end_address +
-						dataflash_info[i].logical_address;
-				} else {
-					dataflash_info[i].Device.area_list[j].end =
-						area_list[part].end +
-						dataflash_info[i].logical_address;
-				}
-				protected = area_list[part].protected;
-				/* Set the environment according to the label...*/
-				if(protected == FLAG_PROTECT_INVALID) {
-					dataflash_info[i].Device.area_list[j].protected =
-						FLAG_PROTECT_INVALID;
-				} else {
-					dataflash_info[i].Device.area_list[j].protected =
-						protected;
-				}
-				strcpy((char*)(dataflash_info[i].Device.area_list[j].label),
-						(const char *)area_list[part].label);
-			}
-			part++;
-		}
-	}
-	return found[0];
-}
-
-void AT91F_Dataflashenv_set(void)
-{
-	int i, j;
-	int part;
-	unsigned char env;
-	unsigned char s[32];	/* Will fit a long int in hex */
-	unsigned long start;
-
-	for (i = 0, part= 0; i < CONFIG_SYS_MAX_DATAFLASH_BANKS; i++) {
-		for(j = 0; j < NB_DATAFLASH_AREA; j++) {
-			env = area_list[part].setenv;
-			/* Set the environment according to the label...*/
-			if((env & FLAG_SETENV) == FLAG_SETENV) {
-				start = dataflash_info[i].Device.area_list[j].start;
-				sprintf((char *)s, "%lX", start);
-				env_set((char *)area_list[part].label,
-					(char *)s);
-			}
-			part++;
-		}
-	}
-}
-
-void dataflash_print_info (void)
-{
-	int i, j;
-
-	for (i = 0; i < CONFIG_SYS_MAX_DATAFLASH_BANKS; i++) {
-		if (dataflash_info[i].id != 0) {
-			printf("DataFlash:");
-			switch (dataflash_info[i].id) {
-			case AT45DB021:
-				printf("AT45DB021\n");
-				break;
-			case AT45DB161:
-				printf("AT45DB161\n");
-				break;
-
-			case AT45DB321:
-				printf("AT45DB321\n");
-				break;
-
-			case AT45DB642:
-				printf("AT45DB642\n");
-				break;
-			case AT45DB128:
-				printf("AT45DB128\n");
-				break;
-			}
-
-			printf("Nb pages: %6d\n"
-				"Page Size: %6d\n"
-				"Size=%8d bytes\n"
-				"Logical address: 0x%08X\n",
-				(unsigned int) dataflash_info[i].Device.pages_number,
-				(unsigned int) dataflash_info[i].Device.pages_size,
-				(unsigned int) dataflash_info[i].Device.pages_number *
-				dataflash_info[i].Device.pages_size,
-				(unsigned int) dataflash_info[i].logical_address);
-			for (j = 0; j < NB_DATAFLASH_AREA; j++) {
-				switch(dataflash_info[i].Device.area_list[j].protected) {
-				case	FLAG_PROTECT_SET:
-				case	FLAG_PROTECT_CLEAR:
-					printf("Area %i:\t%08lX to %08lX %s", j,
-						dataflash_info[i].Device.area_list[j].start,
-						dataflash_info[i].Device.area_list[j].end,
-						(dataflash_info[i].Device.area_list[j].protected==FLAG_PROTECT_SET) ? "(RO)" : "    ");
-						printf(" %s\n",	dataflash_info[i].Device.area_list[j].label);
-					break;
-				case	FLAG_PROTECT_INVALID:
-					break;
-				}
-			}
-		}
-	}
-}
-
-/*---------------------------------------------------------------------------*/
-/* Function Name       : AT91F_DataflashSelect				     */
-/* Object              : Select the correct device			     */
-/*---------------------------------------------------------------------------*/
-AT91PS_DataFlash AT91F_DataflashSelect (AT91PS_DataFlash pFlash,
-				unsigned long *addr)
-{
-	char addr_valid = 0;
-	int i;
-
-	for (i = 0; i < CONFIG_SYS_MAX_DATAFLASH_BANKS; i++)
-		if ( dataflash_info[i].id
-			&& ((((int) *addr) & 0xFF000000) ==
-			dataflash_info[i].logical_address)) {
-			addr_valid = 1;
-			break;
-		}
-	if (!addr_valid) {
-		pFlash = (AT91PS_DataFlash) 0;
-		return pFlash;
-	}
-	pFlash->pDataFlashDesc = &(dataflash_info[i].Desc);
-	pFlash->pDevice = &(dataflash_info[i].Device);
-	*addr -= dataflash_info[i].logical_address;
-	return (pFlash);
-}
-
-/*---------------------------------------------------------------------------*/
-/* Function Name       : addr_dataflash					     */
-/* Object              : Test if address is valid			     */
-/*---------------------------------------------------------------------------*/
-int addr_dataflash (unsigned long addr)
-{
-	int addr_valid = 0;
-	int i;
-
-	for (i = 0; i < CONFIG_SYS_MAX_DATAFLASH_BANKS; i++) {
-		if ((((int) addr) & 0xFF000000) ==
-			dataflash_info[i].logical_address) {
-			addr_valid = 1;
-			break;
-		}
-	}
-
-	return addr_valid;
-}
-
-/*---------------------------------------------------------------------------*/
-/* Function Name       : size_dataflash					     */
-/* Object              : Test if address is valid regarding the size	     */
-/*---------------------------------------------------------------------------*/
-int size_dataflash (AT91PS_DataFlash pdataFlash, unsigned long addr,
-			unsigned long size)
-{
-	/* is outside the dataflash */
-	if (((int)addr & 0x0FFFFFFF) > (pdataFlash->pDevice->pages_size *
-		pdataFlash->pDevice->pages_number)) return 0;
-	/* is too large for the dataflash */
-	if (size > ((pdataFlash->pDevice->pages_size *
-		pdataFlash->pDevice->pages_number) -
-		((int)addr & 0x0FFFFFFF))) return 0;
-
-	return 1;
-}
-
-/*---------------------------------------------------------------------------*/
-/* Function Name       : prot_dataflash					     */
-/* Object              : Test if destination area is protected		     */
-/*---------------------------------------------------------------------------*/
-int prot_dataflash (AT91PS_DataFlash pdataFlash, unsigned long addr)
-{
-	int area;
-
-	/* find area */
-	for (area = 0; area < NB_DATAFLASH_AREA; area++) {
-		if ((addr >= pdataFlash->pDevice->area_list[area].start) &&
-			(addr < pdataFlash->pDevice->area_list[area].end))
-			break;
-	}
-	if (area == NB_DATAFLASH_AREA)
-		return -1;
-
-	/*test protection value*/
-	if (pdataFlash->pDevice->area_list[area].protected == FLAG_PROTECT_SET)
-		return 0;
-	if (pdataFlash->pDevice->area_list[area].protected == FLAG_PROTECT_INVALID)
-		return 0;
-
-	return 1;
-}
-
-/*--------------------------------------------------------------------------*/
-/* Function Name       : dataflash_real_protect				    */
-/* Object              : protect/unprotect area				    */
-/*--------------------------------------------------------------------------*/
-int dataflash_real_protect (int flag, unsigned long start_addr,
-				unsigned long end_addr)
-{
-	int i,j, area1, area2, addr_valid = 0;
-
-	/* find dataflash */
-	for (i = 0; i < CONFIG_SYS_MAX_DATAFLASH_BANKS; i++) {
-		if ((((int) start_addr) & 0xF0000000) ==
-			dataflash_info[i].logical_address) {
-				addr_valid = 1;
-				break;
-		}
-	}
-	if (!addr_valid) {
-		return -1;
-	}
-	/* find start area */
-	for (area1 = 0; area1 < NB_DATAFLASH_AREA; area1++) {
-		if (start_addr == dataflash_info[i].Device.area_list[area1].start)
-			break;
-	}
-	if (area1 == NB_DATAFLASH_AREA) return -1;
-	/* find end area */
-	for (area2 = 0; area2 < NB_DATAFLASH_AREA; area2++) {
-		if (end_addr == dataflash_info[i].Device.area_list[area2].end)
-			break;
-	}
-	if (area2 == NB_DATAFLASH_AREA)
-		return -1;
-
-	/*set protection value*/
-	for(j = area1; j < area2 + 1 ; j++)
-		if(dataflash_info[i].Device.area_list[j].protected
-				!= FLAG_PROTECT_INVALID) {
-			if (flag == 0) {
-				dataflash_info[i].Device.area_list[j].protected
-					= FLAG_PROTECT_CLEAR;
-			} else {
-				dataflash_info[i].Device.area_list[j].protected
-					= FLAG_PROTECT_SET;
-			}
-		}
-
-	return (area2 - area1 + 1);
-}
-
-/*---------------------------------------------------------------------------*/
-/* Function Name       : read_dataflash					     */
-/* Object              : dataflash memory read				     */
-/*---------------------------------------------------------------------------*/
-int read_dataflash (unsigned long addr, unsigned long size, char *result)
-{
-	unsigned long AddrToRead = addr;
-	AT91PS_DataFlash pFlash = &DataFlashInst;
-
-	pFlash = AT91F_DataflashSelect (pFlash, &AddrToRead);
-
-	if (pFlash == 0)
-		return ERR_UNKNOWN_FLASH_TYPE;
-
-	if (size_dataflash(pFlash,addr,size) == 0)
-		return ERR_INVAL;
-
-	return (AT91F_DataFlashRead (pFlash, AddrToRead, size, result));
-}
-
-/*---------------------------------------------------------------------------*/
-/* Function Name       : write_dataflash				     */
-/* Object              : write a block in dataflash			     */
-/*---------------------------------------------------------------------------*/
-int write_dataflash (unsigned long addr_dest, unsigned long addr_src,
-			unsigned long size)
-{
-	unsigned long AddrToWrite = addr_dest;
-	AT91PS_DataFlash pFlash = &DataFlashInst;
-
-	pFlash = AT91F_DataflashSelect (pFlash, &AddrToWrite);
-
-	if (pFlash == 0)
-		return ERR_UNKNOWN_FLASH_TYPE;
-
-	if (size_dataflash(pFlash,addr_dest,size) == 0)
-		return ERR_INVAL;
-
-	if (prot_dataflash(pFlash,addr_dest) == 0)
-		return ERR_PROTECTED;
-
-	if (AddrToWrite == -1)
-		return -1;
-
-	return AT91F_DataFlashWrite (pFlash, (uchar *)addr_src,
-						AddrToWrite, size);
-}
-
-void dataflash_perror (int err)
-{
-	switch (err) {
-	case ERR_OK:
-		break;
-	case ERR_TIMOUT:
-		printf("Timeout writing to DataFlash\n");
-		break;
-	case ERR_PROTECTED:
-		printf("Can't write to protected/invalid DataFlash sectors\n");
-		break;
-	case ERR_INVAL:
-		printf("Outside available DataFlash\n");
-		break;
-	case ERR_UNKNOWN_FLASH_TYPE:
-		printf("Unknown Type of DataFlash\n");
-		break;
-	case ERR_PROG_ERROR:
-		printf("General DataFlash Programming Error\n");
-		break;
-	default:
-		printf("%s[%d] FIXME: rc=%d\n", __FILE__, __LINE__, err);
-		break;
-	}
-}
diff --git a/include/dataflash.h b/include/dataflash.h
deleted file mode 100644
index c9f22200cf..0000000000
--- a/include/dataflash.h
+++ /dev/null
@@ -1,205 +0,0 @@
-/*
- * (C) Copyright 2003
- * Data Flash Atmel Description File
- * Author : Hamid Ikdoumi (Atmel)
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-/* File Name		: dataflash.h					*/
-/* Object		: Data Flash Atmel Description File		*/
-/* Translator		:						*/
-/*									*/
-/* 1.0 03/04/01 HI	: Creation					*/
-/* 1.2 20/10/02 FB	: Adapatation Service and Lib v3		*/
-/*----------------------------------------------------------------------*/
-
-#ifndef _DataFlash_h
-#define _DataFlash_h
-
-
-#include "config.h"
-
-/*number of protected area*/
-#define NB_DATAFLASH_AREA		5
-
-#ifndef CONFIG_MTD_NOR_FLASH
-
-/*-----------------------------------------------------------------------
- * return codes from flash_write():
- */
-# define ERR_OK				0
-# define ERR_TIMOUT			1
-# define ERR_NOT_ERASED			2
-# define ERR_PROTECTED			4
-# define ERR_INVAL			8
-# define ERR_ALIGN			16
-# define ERR_UNKNOWN_FLASH_VENDOR	32
-# define ERR_UNKNOWN_FLASH_TYPE		64
-# define ERR_PROG_ERROR			128
-
-/*-----------------------------------------------------------------------
- * Protection Flags for flash_protect():
- */
-# define FLAG_PROTECT_SET		0x01
-# define FLAG_PROTECT_CLEAR		0x02
-# define FLAG_PROTECT_INVALID		0x03
-
-/*-----------------------------------------------------------------------
- * Set Environment according to label:
- */
-# define	FLAG_SETENV		0x80
-#endif /* CONFIG_MTD_NOR_FLASH */
-
-/*define the area structure*/
-typedef struct {
-	unsigned long start;
-	unsigned long end;
-	unsigned char protected;
-	unsigned char setenv;
-	unsigned char label[20];
-} dataflash_protect_t;
-
-typedef unsigned int AT91S_DataFlashStatus;
-
-/*----------------------------------------------------------------------*/
-/* DataFlash Structures							*/
-/*----------------------------------------------------------------------*/
-
-/*---------------------------------------------*/
-/* DataFlash Descriptor Structure Definition   */
-/*---------------------------------------------*/
-typedef struct _AT91S_DataflashDesc {
-	unsigned char *tx_cmd_pt;
-	unsigned int tx_cmd_size;
-	unsigned char *rx_cmd_pt;
-	unsigned int rx_cmd_size;
-	unsigned char *tx_data_pt;
-	unsigned int tx_data_size;
-	unsigned char *rx_data_pt;
-	unsigned int rx_data_size;
-	volatile unsigned char state;
-	volatile unsigned char DataFlash_state;
-	unsigned char command[8];
-} AT91S_DataflashDesc, *AT91PS_DataflashDesc;
-
-/*---------------------------------------------*/
-/* DataFlash device definition structure       */
-/*---------------------------------------------*/
-typedef struct _AT91S_Dataflash {
-	int pages_number;			/* dataflash page number */
-	int pages_size;				/* dataflash page size */
-	int page_offset;			/* page offset in command */
-	int byte_mask;				/* byte mask in command */
-	int cs;
-	dataflash_protect_t area_list[NB_DATAFLASH_AREA]; /* area protection status */
-} AT91S_DataflashFeatures, *AT91PS_DataflashFeatures;
-
-/*---------------------------------------------*/
-/* DataFlash Structure Definition	       */
-/*---------------------------------------------*/
-typedef struct _AT91S_DataFlash {
-	AT91PS_DataflashDesc pDataFlashDesc;	/* dataflash descriptor */
-	AT91PS_DataflashFeatures pDevice;	/* Pointer on a dataflash features array */
-} AT91S_DataFlash, *AT91PS_DataFlash;
-
-
-typedef struct _AT91S_DATAFLASH_INFO {
-
-	AT91S_DataflashDesc Desc;
-	AT91S_DataflashFeatures Device; /* Pointer on a dataflash features array */
-	unsigned long logical_address;
-	unsigned long end_address;
-	unsigned int id;			/* device id */
-} AT91S_DATAFLASH_INFO, *AT91PS_DATAFLASH_INFO;
-
-struct dataflash_addr {
-	unsigned long addr;
-	int cs;
-};
-/*-------------------------------------------------------------------------------------------------*/
-#define AT45DB161	0x2c
-#define AT45DB021	0x14
-#define AT45DB081	0x24
-#define AT45DB321	0x34
-#define AT45DB642	0x3c
-#define AT45DB128	0x10
-#define	PAGES_PER_BLOCK	8
-
-#define AT91C_DATAFLASH_TIMEOUT		10000	/* For AT91F_DataFlashWaitReady */
-
-/* DataFlash return value */
-#define DATAFLASH_BUSY			0x00
-#define DATAFLASH_OK			0x01
-#define DATAFLASH_ERROR			0x02
-#define DATAFLASH_MEMORY_OVERFLOW	0x03
-#define DATAFLASH_BAD_COMMAND		0x04
-#define DATAFLASH_BAD_ADDRESS		0x05
-
-
-/* Driver State */
-#define IDLE		0x0
-#define BUSY		0x1
-#define ERROR		0x2
-
-/* DataFlash Driver State */
-#define GET_STATUS	0x0F
-
-/*-------------------------------------------------------------------------------------------------*/
-/* Command Definition										   */
-/*-------------------------------------------------------------------------------------------------*/
-
-/* READ COMMANDS */
-#define DB_CONTINUOUS_ARRAY_READ	0xE8	/* Continuous array read */
-#define DB_BURST_ARRAY_READ		0xE8	/* Burst array read */
-#define DB_PAGE_READ			0xD2	/* Main memory page read */
-#define DB_BUF1_READ			0xD4	/* Buffer 1 read */
-#define DB_BUF2_READ			0xD6	/* Buffer 2 read */
-#define DB_STATUS			0xD7	/* Status Register */
-
-/* PROGRAM and ERASE COMMANDS */
-#define DB_BUF1_WRITE			0x84	/* Buffer 1 write */
-#define DB_BUF2_WRITE			0x87	/* Buffer 2 write */
-#define DB_BUF1_PAGE_ERASE_PGM		0x83	/* Buffer 1 to main memory page program with built-In erase */
-#define DB_BUF1_PAGE_ERASE_FASTPGM	0x93	/* Buffer 1 to main memory page program with built-In erase, Fast program */
-#define DB_BUF2_PAGE_ERASE_PGM		0x86	/* Buffer 2 to main memory page program with built-In erase */
-#define DB_BUF2_PAGE_ERASE_FASTPGM	0x96	/* Buffer 1 to main memory page program with built-In erase, Fast program */
-#define DB_BUF1_PAGE_PGM		0x88	/* Buffer 1 to main memory page program without built-In erase */
-#define DB_BUF1_PAGE_FASTPGM		0x98	/* Buffer 1 to main memory page program without built-In erase, Fast program */
-#define DB_BUF2_PAGE_PGM		0x89	/* Buffer 2 to main memory page program without built-In erase */
-#define DB_BUF2_PAGE_FASTPGM		0x99	/* Buffer 1 to main memory page program without built-In erase, Fast program */
-#define DB_PAGE_ERASE			0x81	/* Page Erase */
-#define DB_BLOCK_ERASE			0x50	/* Block Erase */
-#define DB_PAGE_PGM_BUF1		0x82	/* Main memory page through buffer 1 */
-#define DB_PAGE_FASTPGM_BUF1		0x92	/* Main memory page through buffer 1, Fast program */
-#define DB_PAGE_PGM_BUF2		0x85	/* Main memory page through buffer 2 */
-#define DB_PAGE_FastPGM_BUF2		0x95	/* Main memory page through buffer 2, Fast program */
-
-/* ADDITIONAL COMMANDS */
-#define DB_PAGE_2_BUF1_TRF		0x53	/* Main memory page to buffer 1 transfert */
-#define DB_PAGE_2_BUF2_TRF		0x55	/* Main memory page to buffer 2 transfert */
-#define DB_PAGE_2_BUF1_CMP		0x60	/* Main memory page to buffer 1 compare */
-#define DB_PAGE_2_BUF2_CMP		0x61	/* Main memory page to buffer 2 compare */
-#define DB_AUTO_PAGE_PGM_BUF1		0x58	/* Auto page rewrite throught buffer 1 */
-#define DB_AUTO_PAGE_PGM_BUF2		0x59	/* Auto page rewrite throught buffer 2 */
-
-/*-------------------------------------------------------------------------------------------------*/
-
-extern int size_dataflash (AT91PS_DataFlash pdataFlash, unsigned long addr, unsigned long size);
-extern int prot_dataflash (AT91PS_DataFlash pdataFlash, unsigned long addr);
-extern int addr2ram(ulong addr);
-extern int dataflash_real_protect (int flag, unsigned long start_addr, unsigned long end_addr);
-extern int addr_dataflash (unsigned long addr);
-extern int read_dataflash (unsigned long addr, unsigned long size, char *result);
-extern int write_dataflash(unsigned long addr_dest, unsigned long addr_src,
-			unsigned long size);
-extern int AT91F_DataflashInit(void);
-
-extern void dataflash_print_info (void);
-extern void dataflash_perror (int err);
-extern void AT91F_Dataflashenv_set(void);
-
-extern struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS];
-extern dataflash_protect_t area_list[NB_DATAFLASH_AREA];
-extern AT91S_DATAFLASH_INFO dataflash_info[];
-#endif
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index c5c7c598c5..f73f765bbb 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -877,7 +877,6 @@ CONFIG_G_DNL_UMS_VENDOR_NUM
 CONFIG_H264_FREQ
 CONFIG_H8300
 CONFIG_HARD_SPI
-CONFIG_HAS_DATAFLASH
 CONFIG_HAS_ETH0
 CONFIG_HAS_ETH1
 CONFIG_HAS_ETH2
@@ -2619,9 +2618,6 @@ CONFIG_SYS_DA850_PLL1_PLLDIV3
 CONFIG_SYS_DA850_PLL1_PLLM
 CONFIG_SYS_DA850_PLL1_POSTDIV
 CONFIG_SYS_DA850_SYSCFG_SUSPSRC
-CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1
-CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS2
-CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3
 CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT
 CONFIG_SYS_DAVINCI_I2C_SLAVE
 CONFIG_SYS_DAVINCI_I2C_SLAVE1
@@ -3731,7 +3727,6 @@ CONFIG_SYS_MATRIX_EBI0CSA_VAL
 CONFIG_SYS_MATRIX_EBICSA_VAL
 CONFIG_SYS_MATRIX_MCFG_REMAP
 CONFIG_SYS_MAXARGS
-CONFIG_SYS_MAX_DATAFLASH_BANKS
 CONFIG_SYS_MAX_DDR_BAT_SIZE
 CONFIG_SYS_MAX_FLASH_BANKS
 CONFIG_SYS_MAX_FLASH_BANKS_DETECT

commit 879344fbf1c6d4e157e71a35532e1a952a156a94
Author: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Date:   Tue Oct 10 21:59:41 2017 +0300

    UPSTREAM: spi: Drop CONFIG_ATMEL_DATAFLASH_SPI
    
    Last user of this option went away in commit:
    
    fdc7718999 ("board: usb_a9263: Update to support DT and DM")
    
    Change-Id: I37d591ec0dc956e4ec26d17a5e8e2588cf5a1afb
    Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
    Acked-by: Wenyou Yang <wenyou.yang@microchip.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 95688de311e238ccfba21c50b1b67ceffbdc7fc5)

diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 052c6082b0..a942efa8aa 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -17,7 +17,6 @@ endif
 
 obj-$(CONFIG_ALTERA_SPI) += altera_spi.o
 obj-$(CONFIG_ATH79_SPI) += ath79_spi.o
-obj-$(CONFIG_ATMEL_DATAFLASH_SPI) += atmel_dataflash_spi.o
 obj-$(CONFIG_ATMEL_SPI) += atmel_spi.o
 obj-$(CONFIG_CADENCE_QSPI) += cadence_qspi.o cadence_qspi_apb.o
 obj-$(CONFIG_CF_SPI) += cf_spi.o
diff --git a/drivers/spi/atmel_dataflash_spi.c b/drivers/spi/atmel_dataflash_spi.c
deleted file mode 100644
index a2e9c00ea6..0000000000
--- a/drivers/spi/atmel_dataflash_spi.c
+++ /dev/null
@@ -1,184 +0,0 @@
-/*
- * Driver for ATMEL DataFlash support
- * Author : Hamid Ikdoumi (Atmel)
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-/*
- * This driver desperately needs rework:
- *
- * - use structure SoC access
- * - get rid of including asm/arch/at91_spi.h
- * - remove asm/arch/at91_spi.h
- * - get rid of all CONFIG_ATMEL_LEGACY defines and uses
- *
- * 02-Aug-2010 Reinhard Meyer <uboot@emk-elektronik.de>
- */
-
-#include <common.h>
-#ifndef CONFIG_ATMEL_LEGACY
-# define CONFIG_ATMEL_LEGACY
-#endif
-#include <spi.h>
-#include <malloc.h>
-
-#include <asm/io.h>
-
-#include <asm/arch/clk.h>
-#include <asm/arch/hardware.h>
-
-#include "atmel_spi.h"
-
-#include <asm/arch/gpio.h>
-#include <asm/arch/at91_pio.h>
-#include <asm/arch/at91_spi.h>
-
-#include <dataflash.h>
-
-#define AT91_SPI_PCS0_DATAFLASH_CARD	0xE	/* Chip Select 0: NPCS0%1110 */
-#define AT91_SPI_PCS1_DATAFLASH_CARD	0xD	/* Chip Select 1: NPCS1%1101 */
-#define AT91_SPI_PCS2_DATAFLASH_CARD	0xB	/* Chip Select 2: NPCS2%1011 */
-#define AT91_SPI_PCS3_DATAFLASH_CARD	0x7	/* Chip Select 3: NPCS3%0111 */
-
-void AT91F_SpiInit(void)
-{
-	/* Reset the SPI */
-	writel(AT91_SPI_SWRST, ATMEL_BASE_SPI0 + AT91_SPI_CR);
-
-	/* Configure SPI in Master Mode with No CS selected !!! */
-	writel(AT91_SPI_MSTR | AT91_SPI_MODFDIS | AT91_SPI_PCS,
-	       ATMEL_BASE_SPI0 + AT91_SPI_MR);
-
-	/* Configure CS0 */
-	writel(AT91_SPI_NCPHA |
-	       (AT91_SPI_DLYBS & DATAFLASH_TCSS) |
-	       (AT91_SPI_DLYBCT & DATAFLASH_TCHS) |
-	       ((get_mck_clk_rate() / AT91_SPI_CLK) << 8),
-	       ATMEL_BASE_SPI0 + AT91_SPI_CSR(0));
-
-#ifdef CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1
-	/* Configure CS1 */
-	writel(AT91_SPI_NCPHA |
-	       (AT91_SPI_DLYBS & DATAFLASH_TCSS) |
-	       (AT91_SPI_DLYBCT & DATAFLASH_TCHS) |
-	       ((get_mck_clk_rate() / AT91_SPI_CLK) << 8),
-	       ATMEL_BASE_SPI0 + AT91_SPI_CSR(1));
-#endif
-#ifdef CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS2
-	/* Configure CS2 */
-	writel(AT91_SPI_NCPHA |
-	       (AT91_SPI_DLYBS & DATAFLASH_TCSS) |
-	       (AT91_SPI_DLYBCT & DATAFLASH_TCHS) |
-	       ((get_mck_clk_rate() / AT91_SPI_CLK) << 8),
-	       ATMEL_BASE_SPI0 + AT91_SPI_CSR(2));
-#endif
-#ifdef CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3
-	/* Configure CS3 */
-	writel(AT91_SPI_NCPHA |
-	       (AT91_SPI_DLYBS & DATAFLASH_TCSS) |
-	       (AT91_SPI_DLYBCT & DATAFLASH_TCHS) |
-	       ((get_mck_clk_rate() / AT91_SPI_CLK) << 8),
-	       ATMEL_BASE_SPI0 + AT91_SPI_CSR(3));
-#endif
-
-	/* SPI_Enable */
-	writel(AT91_SPI_SPIEN, ATMEL_BASE_SPI0 + AT91_SPI_CR);
-
-	while (!(readl(ATMEL_BASE_SPI0 + AT91_SPI_SR) & AT91_SPI_SPIENS))
-		;
-
-	/*
-	 * Add tempo to get SPI in a safe state.
-	 * Should not be needed for new silicon (Rev B)
-	 */
-	udelay(500000);
-	readl(ATMEL_BASE_SPI0 + AT91_SPI_SR);
-	readl(ATMEL_BASE_SPI0 + AT91_SPI_RDR);
-
-}
-
-void AT91F_SpiEnable(int cs)
-{
-	unsigned long mode;
-
-	mode = readl(ATMEL_BASE_SPI0 + AT91_SPI_MR);
-	mode &= ~AT91_SPI_PCS;
-
-	switch (cs) {
-	case 0:
-		mode |= AT91_SPI_PCS0_DATAFLASH_CARD << 16;
-		break;
-	case 1:
-		mode |= AT91_SPI_PCS1_DATAFLASH_CARD << 16;
-		break;
-	case 2:
-		mode |= AT91_SPI_PCS2_DATAFLASH_CARD << 16;
-		break;
-	case 3:
-		mode |= AT91_SPI_PCS3_DATAFLASH_CARD << 16;
-		break;
-	}
-
-	writel(mode, ATMEL_BASE_SPI0 + AT91_SPI_MR);
-
-	/* SPI_Enable */
-	writel(AT91_SPI_SPIEN, ATMEL_BASE_SPI0 + AT91_SPI_CR);
-}
-
-unsigned int AT91F_SpiWrite1(AT91PS_DataflashDesc pDesc);
-
-unsigned int AT91F_SpiWrite(AT91PS_DataflashDesc pDesc)
-{
-	unsigned int timeout;
-	unsigned int timebase;
-
-	pDesc->state = BUSY;
-
-	writel(AT91_SPI_TXTDIS + AT91_SPI_RXTDIS,
-		ATMEL_BASE_SPI0 + AT91_SPI_PTCR);
-
-	/* Initialize the Transmit and Receive Pointer */
-	writel((unsigned int)pDesc->rx_cmd_pt,
-		ATMEL_BASE_SPI0 + AT91_SPI_RPR);
-	writel((unsigned int)pDesc->tx_cmd_pt,
-		ATMEL_BASE_SPI0 + AT91_SPI_TPR);
-
-	/* Intialize the Transmit and Receive Counters */
-	writel(pDesc->rx_cmd_size, ATMEL_BASE_SPI0 + AT91_SPI_RCR);
-	writel(pDesc->tx_cmd_size, ATMEL_BASE_SPI0 + AT91_SPI_TCR);
-
-	if (pDesc->tx_data_size != 0) {
-		/* Initialize the Next Transmit and Next Receive Pointer */
-		writel((unsigned int)pDesc->rx_data_pt,
-			ATMEL_BASE_SPI0 + AT91_SPI_RNPR);
-		writel((unsigned int)pDesc->tx_data_pt,
-			ATMEL_BASE_SPI0 + AT91_SPI_TNPR);
-
-		/* Intialize the Next Transmit and Next Receive Counters */
-		writel(pDesc->rx_data_size,
-			ATMEL_BASE_SPI0 + AT91_SPI_RNCR);
-		writel(pDesc->tx_data_size,
-			ATMEL_BASE_SPI0 + AT91_SPI_TNCR);
-	}
-
-	/* arm simple, non interrupt dependent timer */
-	timebase = get_timer(0);
-	timeout = 0;
-
-	writel(AT91_SPI_TXTEN + AT91_SPI_RXTEN,
-		ATMEL_BASE_SPI0 + AT91_SPI_PTCR);
-	while (!(readl(ATMEL_BASE_SPI0 + AT91_SPI_SR) & AT91_SPI_RXBUFF) &&
-		((timeout = get_timer(timebase)) < CONFIG_SYS_SPI_WRITE_TOUT))
-		;
-	writel(AT91_SPI_TXTDIS + AT91_SPI_RXTDIS,
-		ATMEL_BASE_SPI0 + AT91_SPI_PTCR);
-	pDesc->state = IDLE;
-
-	if (timeout >= CONFIG_SYS_SPI_WRITE_TOUT) {
-		printf("Error Timeout\n\r");
-		return DATAFLASH_ERROR;
-	}
-
-	return DATAFLASH_OK;
-}

commit 9a544e36a87f302a078522c65fa062b2299847a1
Author: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Date:   Tue Oct 10 21:59:40 2017 +0300

    UPSTREAM: env: Drop CONFIG_ENV_IS_IN_DATAFLASH
    
    Last user of this option went away in commit:
    
    fdc7718999 ("board: usb_a9263: Update to support DT and DM")
    
    Change-Id: Ie6cec28e4daf26b669f3f35db026427bdb47a5b6
    Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 7b7341d7f3ee915c89a7f8ab7054e39872057d90)

diff --git a/cmd/nvedit.c b/cmd/nvedit.c
index b35e9b324a..cc90b77f9e 100644
--- a/cmd/nvedit.c
+++ b/cmd/nvedit.c
@@ -42,7 +42,6 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #if	!defined(CONFIG_ENV_IS_IN_EEPROM)	&& \
 	!defined(CONFIG_ENV_IS_IN_FLASH)	&& \
-	!defined(CONFIG_ENV_IS_IN_DATAFLASH)	&& \
 	!defined(CONFIG_ENV_IS_IN_MMC)		&& \
 	!defined(CONFIG_ENV_IS_IN_FAT)		&& \
 	!defined(CONFIG_ENV_IS_IN_EXT4)		&& \
@@ -54,7 +53,7 @@ DECLARE_GLOBAL_DATA_PTR;
 	!defined(CONFIG_ENV_IS_IN_REMOTE)	&& \
 	!defined(CONFIG_ENV_IS_IN_UBI)		&& \
 	!defined(CONFIG_ENV_IS_NOWHERE)
-# error Define one of CONFIG_ENV_IS_IN_{EEPROM|FLASH|DATAFLASH|MMC|FAT|EXT4|\
+# error Define one of CONFIG_ENV_IS_IN_{EEPROM|FLASH|MMC|FAT|EXT4|\
 NAND|NVRAM|ONENAND|SATA|SPI_FLASH|REMOTE|UBI} or CONFIG_ENV_IS_NOWHERE
 #endif
 
diff --git a/env/Kconfig b/env/Kconfig
index 024d4d79bd..25555ec2b8 100644
--- a/env/Kconfig
+++ b/env/Kconfig
@@ -40,21 +40,6 @@ config ENV_IS_NOWHERE
 	  stored. U-Boot will therefore always start up with a default
 	  environment.
 
-config ENV_IS_IN_DATAFLASH
-	bool "Environment in dataflash"
-	depends on !CHAIN_OF_TRUST
-	help
-	  Define this if you have a DataFlash memory device which you
-	  want to use for the environment.
-
-	  - CONFIG_ENV_OFFSET:
-	  - CONFIG_ENV_ADDR:
-	  - CONFIG_ENV_SIZE:
-
-	  These three #defines specify the offset and size of the
-	  environment area within the total memory of your DataFlash placed
-	  at the specified address.
-
 config ENV_IS_IN_EEPROM
 	bool "Environment in EEPROM"
 	depends on !CHAIN_OF_TRUST
diff --git a/env/Makefile b/env/Makefile
index 8df5b9d4c9..7ce8231d9a 100644
--- a/env/Makefile
+++ b/env/Makefile
@@ -11,7 +11,6 @@ ifndef CONFIG_SPL_BUILD
 obj-y += attr.o
 obj-y += callback.o
 obj-y += flags.o
-obj-$(CONFIG_ENV_IS_IN_DATAFLASH) += dataflash.o
 obj-$(CONFIG_ENV_IS_IN_EEPROM) += eeprom.o
 extra-$(CONFIG_ENV_IS_EMBEDDED) += embedded.o
 obj-$(CONFIG_ENV_IS_IN_EEPROM) += embedded.o
diff --git a/env/dataflash.c b/env/dataflash.c
deleted file mode 100644
index 77bc595e0d..0000000000
--- a/env/dataflash.c
+++ /dev/null
@@ -1,75 +0,0 @@
-/*
- * LowLevel function for DataFlash environment support
- * Author : Gilles Gastaldi (Atmel)
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-#include <common.h>
-#include <command.h>
-#include <environment.h>
-#include <linux/stddef.h>
-#include <dataflash.h>
-#include <search.h>
-#include <errno.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-static int env_dataflash_get_char(int index)
-{
-	uchar c;
-
-	read_dataflash(CONFIG_ENV_ADDR + index + offsetof(env_t, data),
-			1, (char *)&c);
-	return c;
-}
-
-static int env_dataflash_load(void)
-{
-	ulong crc, new = 0;
-	unsigned off;
-	char buf[CONFIG_ENV_SIZE];
-
-	/* Read old CRC */
-	read_dataflash(CONFIG_ENV_ADDR + offsetof(env_t, crc),
-		       sizeof(ulong), (char *)&crc);
-
-	/* Read whole environment */
-	read_dataflash(CONFIG_ENV_ADDR, CONFIG_ENV_SIZE, buf);
-
-	/* Calculate the CRC */
-	off = offsetof(env_t, data);
-	new = crc32(new, (unsigned char *)(buf + off), ENV_SIZE);
-
-	if (crc == new)
-		env_import(buf, 1);
-	else
-		set_default_env("!bad CRC");
-
-	return 0;
-}
-
-#ifdef CONFIG_ENV_OFFSET_REDUND
-#error No support for redundant environment on dataflash yet!
-#endif
-
-static int env_dataflash_save(void)
-{
-	env_t env_new;
-	int ret;
-
-	ret = env_export(&env_new);
-	if (ret)
-		return ret;
-
-	return write_dataflash(CONFIG_ENV_ADDR,
-				(unsigned long)&env_new,
-				CONFIG_ENV_SIZE);
-}
-
-U_BOOT_ENV_LOCATION(dataflash) = {
-	.location	= ENVL_DATAFLASH,
-	ENV_NAME("dataflash")
-	.get_char	= env_dataflash_get_char,
-	.load		= env_dataflash_load,
-	.save		= env_save_ptr(env_dataflash_save),
-};
diff --git a/env/env.c b/env/env.c
index 43290d0832..76a5608628 100644
--- a/env/env.c
+++ b/env/env.c
@@ -28,9 +28,7 @@ static struct env_driver *env_driver_lookup(enum env_location loc)
 
 static enum env_location env_get_default_location(void)
 {
-	if IS_ENABLED(CONFIG_ENV_IS_IN_DATAFLASH)
-		return ENVL_DATAFLASH;
-	else if IS_ENABLED(CONFIG_ENV_IS_IN_EEPROM)
+	if IS_ENABLED(CONFIG_ENV_IS_IN_EEPROM)
 		return ENVL_EEPROM;
 	else if IS_ENABLED(CONFIG_ENV_IS_IN_FAT)
 		return ENVL_FAT;
diff --git a/include/environment.h b/include/environment.h
index 03b41e0c51..7b98216389 100644
--- a/include/environment.h
+++ b/include/environment.h
@@ -198,7 +198,6 @@ enum env_valid {
 };
 
 enum env_location {
-	ENVL_DATAFLASH,
 	ENVL_EEPROM,
 	ENVL_EXT4,
 	ENVL_FAT,
diff --git a/tools/Makefile b/tools/Makefile
index ff7edb02e6..1bc4148163 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -21,7 +21,6 @@ subdir-$(HOST_TOOLS_ALL) += gdb
 
 # Merge all the different vars for envcrc into one
 ENVCRC-$(CONFIG_ENV_IS_EMBEDDED) = y
-ENVCRC-$(CONFIG_ENV_IS_IN_DATAFLASH) = y
 ENVCRC-$(CONFIG_ENV_IS_IN_EEPROM) = y
 ENVCRC-$(CONFIG_ENV_IS_IN_FLASH) = y
 ENVCRC-$(CONFIG_ENV_IS_IN_ONENAND) = y

commit 4794b31f852a4cecfbbe2d5bad206515400412ba
Author: Marek Behún <marek.behun@nic.cz>
Date:   Fri Oct 6 15:04:56 2017 +0200

    UPSTREAM: linux/time.h: Remove dead code
    
    Since
      rem = ((long) *tim_p) % SECSPERDAY;
    the second while cycle
      while (rem >= SECSPERDAY)
    is dead.
    
    Change-Id: I7cb339650cc87f5ab892702adec7f4c147aff77d
    Reported-by: Coverity (CID: 167334)
    Signed-off-by: Marek Behun <marek.behun@nic.cz>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 502af618ec3d60f3c8b9914e3484f112fb295b6e)

diff --git a/include/linux/time.h b/include/linux/time.h
index bf12b99d37..b8d298eb4d 100644
--- a/include/linux/time.h
+++ b/include/linux/time.h
@@ -93,11 +93,6 @@ _DEFUN (localtime_r, (tim_p, res),
 	rem += SECSPERDAY;
 	--days;
     }
-    while (rem >= SECSPERDAY)
-    {
-	rem -= SECSPERDAY;
-	++days;
-    }
 
     /* compute hour, min, and sec */
     res->tm_hour = (int) (rem / SECSPERHOUR);

commit 1b659546cc05fcb2bf5e8b37aa70c07d88530d97
Author: Alexander Graf <agraf@suse.de>
Date:   Fri Oct 6 13:35:07 2017 +0200

    UPSTREAM: iso: Reduce verbosity on test and info calls
    
    The test and info callbacks into the partition callback struct are
    used by the "part list" command on the command line. That command
    is used by the distro script.
    
    With verb=1 set, "part list" thus throws a lot of warnings about
    partitions it can't find when an upper layer searches for partitions.
    
    So let's reduce verbosity to bring it to the same level of noise
    as the other partition targets.
    
    Change-Id: I289d3fe2f1d11b18183b834189463578ba5cab90
    Signed-off-by: Alexander Graf <agraf@suse.de>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit b16339e254371b2823f48186889775b90b044f7e)

diff --git a/disk/part_iso.c b/disk/part_iso.c
index 8aef251f4e..4036b00b25 100644
--- a/disk/part_iso.c
+++ b/disk/part_iso.c
@@ -202,7 +202,7 @@ found:
 static int part_get_info_iso(struct blk_desc *dev_desc, int part_num,
 				  disk_partition_t *info)
 {
-	return part_get_info_iso_verb(dev_desc, part_num, info, 1);
+	return part_get_info_iso_verb(dev_desc, part_num, info, 0);
 }
 
 static void part_print_iso(struct blk_desc *dev_desc)
@@ -228,7 +228,7 @@ static int part_test_iso(struct blk_desc *dev_desc)
 {
 	disk_partition_t info;
 
-	return part_get_info_iso_verb(dev_desc, 1, &info, 1);
+	return part_get_info_iso_verb(dev_desc, 1, &info, 0);
 }
 
 U_BOOT_PART_TYPE(iso) = {

commit aa0e69ce7235e548db10791cadb75448005d6736
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Fri Oct 6 10:24:43 2017 +0900

    UPSTREAM: fixdep: fix dependency on options surrounded by CONFIG_VAL()
    
    CONFIG options surrounded by
    
      CONFIG_IS_ENABLED(...)
      CONFIG_IS_BUILTIN(...)
      CONFIG_IS_MODULE(...)
      CONFIG_VAL(...)
    
    need special care for proper dependency tracking.
    
    I do not remember why, but I missed to add CONFIG_VAL(...) handling.
    
    Change-Id: I6b972c1b6ba564f345250a8e980cb95e3e52c146
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 7d8e9e8e24b247944bbff6ab68e03cac81fde218)

diff --git a/scripts/basic/fixdep.c b/scripts/basic/fixdep.c
index 9bd0de2490..da7fb2cd4d 100644
--- a/scripts/basic/fixdep.c
+++ b/scripts/basic/fixdep.c
@@ -249,10 +249,17 @@ static void parse_config_file(const char *map, size_t len)
 		if (q - p < 0)
 			continue;
 
-		/* U-Boot also handles CONFIG_IS_{ENABLED/BUILTIN/MODULE} */
+		/*
+		 * U-Boot also handles
+		 *   CONFIG_IS_ENABLED(...)
+		 *   CONFIG_IS_BUILTIN(...)
+		 *   CONFIG_IS_MODULE(...)
+		 *   CONFIG_VAL(...)
+		 */
 		if ((q - p == 10 && !memcmp(p, "IS_ENABLED(", 11)) ||
 		    (q - p == 10 && !memcmp(p, "IS_BUILTIN(", 11)) ||
-		    (q - p == 9 && !memcmp(p, "IS_MODULE(", 10))) {
+		    (q - p == 9 && !memcmp(p, "IS_MODULE(", 10)) ||
+		    (q - p == 3 && !memcmp(p, "VAL(", 4))) {
 			p = q + 1;
 			for (q = p; q < map + len; q++)
 				if (*q == ')')

commit e33953082a49abf674e0e326117adadd6f2a4dda
Author: Diego Dorta <diego.dorta@nxp.com>
Date:   Thu Oct 5 09:13:38 2017 -0300

    UPSTREAM: common: Add a prototype for s_init()
    
    When compiling with W=1 the following warning is observed:
    
    arch/arm/mach-imx/mx6/soc.c:590:6: warning: no previous prototype for ‘s_init’ [-Wmissing-prototypes] void s_init(void)
    
    Remove this warning by adding the function prototype into include/common.h file.
    
    Change-Id: Id85724ae2fee5e38816467b8a8e25ca9f238eda7
    Signed-off-by: Diego Dorta <diego.dorta@nxp.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 026d7958ba6dc5ed4cd2c5ff507f55f3897cf41a)

diff --git a/include/common.h b/include/common.h
index d890be50fc..04d6e2d25e 100644
--- a/include/common.h
+++ b/include/common.h
@@ -534,6 +534,8 @@ int	is_core_valid (unsigned int);
  */
 int arch_cpu_init(void);
 
+void s_init(void);
+
 int	checkcpu      (void);
 int	checkicache   (void);
 int	checkdcache   (void);

commit 8cc080c0241a8c9b5b51d28778e781ecbb901320
Author: Mirza, Taimoor <Taimoor_Mirza@mentor.com>
Date:   Wed Oct 4 20:28:03 2017 +0500

    UPSTREAM: tools/mkimage: Fix DTC run command to handle file names with space
    
    fit_handle_file function does not quote input and output files while preparing
    command to run DTC to convert .its to .itb. This results in a failure if input
    or output files contain spaces in their names. Quote input and output files in
    DTC command to avoid this failure.
    
    Change-Id: I866d740ef8e2c9f28059c55757bbcbdb017cd74a
    Signed-off-by: Mirza, Taimoor <Taimoor_Mirza@mentor.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit a6e9810495bc929b6beafb88f557cdaadf87fc83)

diff --git a/tools/fit_image.c b/tools/fit_image.c
index 30257b178e..6dcc88bae0 100644
--- a/tools/fit_image.c
+++ b/tools/fit_image.c
@@ -651,11 +651,11 @@ static int fit_handle_file(struct image_tool_params *params)
 		*cmd = '\0';
 	} else if (params->datafile) {
 		/* dtc -I dts -O dtb -p 500 datafile > tmpfile */
-		snprintf(cmd, sizeof(cmd), "%s %s %s > %s",
+		snprintf(cmd, sizeof(cmd), "%s %s \"%s\" > \"%s\"",
 			 MKIMAGE_DTC, params->dtc, params->datafile, tmpfile);
 		debug("Trying to execute \"%s\"\n", cmd);
 	} else {
-		snprintf(cmd, sizeof(cmd), "cp %s %s",
+		snprintf(cmd, sizeof(cmd), "cp \"%s\" \"%s\"",
 			 params->imagefile, tmpfile);
 	}
 	if (*cmd && system(cmd) == -1) {

commit 2ed173003ddd4ffe619e31a06ae31c58ea3db111
Author: Tom Rini <trini@konsulko.com>
Date:   Tue Oct 3 09:38:44 2017 -0400

    UPSTREAM: part_efi: In is_gpt_valid() check argument validity before allocation
    
    While this goes somewhat against normal coding style we should ensure
    that dev_desc is not NULL before we dereference it in allocation of
    legacy_mbr.
    
    Change-Id: Ife52a9f595a429aa265c1fed92099295f80458dc
    Reported-by: Coverity (CID: 167292)
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit b351ccf11ae5616bba183aedb2c433b97123be4f)

diff --git a/disk/part_efi.c b/disk/part_efi.c
index 75d9d4fc50..29761e77f2 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -931,13 +931,14 @@ static int is_pmbr_valid(legacy_mbr * mbr)
 static int is_gpt_valid(struct blk_desc *dev_desc, u64 lba,
 			gpt_header *pgpt_head, gpt_entry **pgpt_pte)
 {
-	ALLOC_CACHE_ALIGN_BUFFER(legacy_mbr, mbr, dev_desc->blksz);
-
+	/* Confirm valid arguments prior to allocation. */
 	if (!dev_desc || !pgpt_head) {
 		printf("%s: Invalid Argument(s)\n", __func__);
 		return 0;
 	}
 
+	ALLOC_CACHE_ALIGN_BUFFER(legacy_mbr, mbr, dev_desc->blksz);
+
 	/* Read MBR Header from device */
 	if (blk_dread(dev_desc, 0, 1, (ulong *)mbr) != 1) {
 		printf("*** ERROR: Can't read MBR header ***\n");

commit 36ac5eead7a21cf8df9049c8f973322c170349aa
Author: ext-vasily.gurevich@vaisala.com <ext-vasily.gurevich@vaisala.com>
Date:   Mon Oct 2 13:42:55 2017 +0000

    UPSTREAM: SPL: FIT: Kconfig: Change SPL_FIT_IMAGE_POST_PROCESS entry
    
    Remove depends on TI_SECURE_DEVICE for other platforms.
    
    Change-Id: I3067b9e1816661567353f48cd85853150592b0bd
    Signed-off-by: Vasily Gurevich <ext-vasily.gurevich@vaisala.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit c12d8b7d70c695f1c4fe6fb4f1b3913bdbed8c96)

diff --git a/Kconfig b/Kconfig
index d951e9f804..73f820a6de 100644
--- a/Kconfig
+++ b/Kconfig
@@ -273,7 +273,7 @@ config SPL_LOAD_FIT
 
 config SPL_FIT_IMAGE_POST_PROCESS
 	bool "Enable post-processing of FIT artifacts after loading by the SPL"
-	depends on SPL_LOAD_FIT && TI_SECURE_DEVICE
+	depends on SPL_LOAD_FIT
 	help
 	  Allows doing any sort of manipulation to blobs after they got extracted
 	  from the U-Boot FIT image like stripping off headers or modifying the

commit f9b2adb5dc2ad002cb41f766117338b2846ef0c8
Author: York Sun <york.sun@nxp.com>
Date:   Thu Sep 28 08:42:11 2017 -0700

    UPSTREAM: cmd: spl: fix compiling error when CONFIG_CMD_SPL_WRITE_SIZE not defined
    
    CONFIG_CMD_SPL_WRITE_SIZE is used for writing parameters to non-volatile
    storage. So far it is only used for NAND. Fix compiling error when this
    macro is not used for SD.
    
    Change-Id: I879971e42fb333e1e0ff4e21ce6b34caf8498aa5
    Signed-off-by: York Sun <york.sun@nxp.com>
    CC: Anatolij Gustschin <agust@denx.de>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit b65ac633f52da596cfa573bb4a597e2edd2318c8)

diff --git a/cmd/spl.c b/cmd/spl.c
index 4d84492346..3b8992a163 100644
--- a/cmd/spl.c
+++ b/cmd/spl.c
@@ -121,9 +121,11 @@ static int spl_export(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 				(void *)images.ft_addr);
 			env_set_addr("fdtargsaddr", images.ft_addr);
 			env_set_hex("fdtargslen", fdt_totalsize(images.ft_addr));
+#ifdef CONFIG_CMD_SPL_WRITE_SIZE
 			if (fdt_totalsize(images.ft_addr) >
 			    CONFIG_CMD_SPL_WRITE_SIZE)
 				puts("WARN: FDT size > CMD_SPL_WRITE_SIZE\n");
+#endif
 			break;
 #endif
 		case SPL_EXPORT_ATAGS:

commit 4f443bd290ecc8a5429e568263b7f68b7db23918
Author: York Sun <york.sun@nxp.com>
Date:   Thu Sep 28 08:42:10 2017 -0700

    UPSTREAM: spl: fix assignment of board info to global data
    
    Commit 15eb1d43bf47 ("spl: reorder the assignment of board info to
    global data") intended to move assignment of board info earlier,
    into board_init_r(). However, function preload_console_init() is
    called either from spl_board_init() or from board_init_f(). For the
    latter case, the board info assignment is much earlier than proposed
    board_init_r(). Create a new function to fill gd->bd and call this
    function when needed.
    
    Change-Id: I3e8da19121f5b82f116b9d051b75acdd777c2475
    Signed-off-by: York Sun <york.sun@nxp.com>
    CC: Lokesh Vutla <lokeshvutla@ti.com>
    CC: Ravi Babu <ravibabu@ti.com>
    CC: Lukasz Majewski <lukma@denx.de>
    CC: Tom Rini <trini@konsulko.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit d1fc0a31b5f307c92b7a047d4f90d5ad2e54cdcc)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spl.c b/arch/arm/cpu/armv8/fsl-layerscape/spl.c
index 2776240be3..2534b4be5f 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/spl.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/spl.c
@@ -80,6 +80,7 @@ void board_init_f(ulong dummy)
 	get_clocks();
 
 	preloader_console_init();
+	spl_set_bd();
 
 #ifdef CONFIG_SPL_I2C_SUPPORT
 	i2c_init_all();
diff --git a/common/spl/spl.c b/common/spl/spl.c
index 6ca42c64ee..057d3aa140 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -258,6 +258,12 @@ static int spl_common_init(bool setup_malloc)
 	return 0;
 }
 
+void spl_set_bd(void)
+{
+	if (!gd->bd)
+		gd->bd = &bdata;
+}
+
 int spl_early_init(void)
 {
 	int ret;
@@ -365,7 +371,9 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 	struct spl_image_info spl_image;
 
 	debug(">>spl:board_init_r()\n");
-	gd->bd = &bdata;
+
+	spl_set_bd();
+
 #ifdef CONFIG_SPL_OS_BOOT
 	dram_init_banksize();
 #endif
diff --git a/include/spl.h b/include/spl.h
index d21a3d21cb..dc0b56911b 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -68,6 +68,7 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 void preloader_console_init(void);
 u32 spl_boot_device(void);
 u32 spl_boot_mode(const u32 boot_device);
+void spl_set_bd(void);
 
 /**
  * spl_set_header_raw_uboot() - Set up a standard SPL image structure

commit 1b189a920d58ba769b21ea19d6f94ec611e24729
Author: Klaus Goger <klaus.goger@theobroma-systems.com>
Date:   Wed Sep 20 13:50:41 2017 +0200

    UPSTREAM: dm: ofnode: query correct property in livetree ofnode_get_addr_size
    
    The livetree codepath of ofnode_get_addr_size always used the "reg"
    property for of_get_property. Use the property parameter of the function
    call instead and check the return value if the property exists.
    Otherwise return FDT_ADDR_T_NONE.
    
    This was discoverd while using SPI NOR with livetree.
    spi_flash_decode_fdt checks for memory-map and will not fail with
    livetree even if the property does not exist.
    
    Change-Id: Icc63d2edbccea6a9f17cdcb5818993d317736ede
    Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 68a345294ac74505f17d65b003a7de836b3d9cba)

diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index c6ca13fabf..0030ab962e 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -468,8 +468,10 @@ fdt_addr_t ofnode_get_addr_size(ofnode node, const char *property,
 		int na, ns;
 		int psize;
 		const struct device_node *np = ofnode_to_np(node);
-		const __be32 *prop = of_get_property(np, "reg", &psize);
+		const __be32 *prop = of_get_property(np, property, &psize);
 
+		if (!prop)
+			return FDT_ADDR_T_NONE;
 		na = of_n_addr_cells(np);
 		ns = of_n_addr_cells(np);
 		*sizep = of_read_number(prop + na, ns);

commit 9ab2e5eb63ddc4561058755c4e53f454b03275e3
Author: Faiz Abbas <faiz_abbas@ti.com>
Date:   Tue Sep 19 16:53:50 2017 +0530

    UPSTREAM: dm: core: Round up size when allocating so that it is cache line aligned
    
    The size variable may not be always be a mulitple of
    ARCH_DMA_MINALIGN and using it to flush cache leads to cache
    misaligned warnings.
    
    Therefore, round up the size to a multiple of ARCH_DMA_MINLAIGN
    when allocating private data.
    
    Change-Id: I29c4fb89f4be628518c2f5350d3efbccd28acd36
    Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 5924da1dfe56d32a45b8adf29bdc8caf788bd4c8)

diff --git a/drivers/core/device.c b/drivers/core/device.c
index de63e5335a..9a46a7bbe5 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -254,6 +254,7 @@ static void *alloc_priv(int size, uint flags)
 	void *priv;
 
 	if (flags & DM_FLAG_ALLOC_PRIV_DMA) {
+		size = ROUND(size, ARCH_DMA_MINALIGN);
 		priv = memalign(ARCH_DMA_MINALIGN, size);
 		if (priv) {
 			memset(priv, '\0', size);

commit 90d0ce442b2814a193ffd3009d11f4f5aca4d325
Author: Simon Glass <sjg@chromium.org>
Date:   Sun Sep 17 16:54:53 2017 -0600

    UPSTREAM: dm: gpio: Correct use of -ENODEV in drivers
    
    In U-Boot -ENODEV means that there is no device. When there is a problem
    with the device, drivers should return an error like -ENXIO or -EREMOTEIO.
    When the device tree properties cannot be read correct , they should
    return -EINVAL.
    
    Update various GPIO drivers to follow this rule, to help with consistency
    for future driver writers.
    
    Change-Id: I6b8f826f6d90dffca55f4d0d5da744b74a39f29a
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Reported-by: Adam Ford <aford173@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 7c84319af9c76084f50f3f2b97545bfa05f3971d)

diff --git a/drivers/gpio/adi_gpio2.c b/drivers/gpio/adi_gpio2.c
index 4db08a344a..1012f2d8eb 100644
--- a/drivers/gpio/adi_gpio2.c
+++ b/drivers/gpio/adi_gpio2.c
@@ -138,7 +138,7 @@ int peripheral_request(unsigned short per, const char *label)
 		return 0;
 
 	if (!(per & P_DEFINED))
-		return -ENODEV;
+		return -EINVAL;
 
 	BUG_ON(ident >= MAX_RESOURCES);
 
diff --git a/drivers/gpio/atmel_pio4.c b/drivers/gpio/atmel_pio4.c
index f3689467f0..30bc4296e3 100644
--- a/drivers/gpio/atmel_pio4.c
+++ b/drivers/gpio/atmel_pio4.c
@@ -50,11 +50,11 @@ static int atmel_pio4_config_io_func(u32 port, u32 pin,
 	u32 reg, mask;
 
 	if (pin >= ATMEL_PIO_NPINS_PER_BANK)
-		return -ENODEV;
+		return -EINVAL;
 
 	port_base = atmel_pio4_port_base(port);
 	if (!port_base)
-		return -ENODEV;
+		return -EINVAL;
 
 	mask = 1 << pin;
 	reg = func;
@@ -128,11 +128,11 @@ int atmel_pio4_set_pio_output(u32 port, u32 pin, u32 value)
 	u32 reg, mask;
 
 	if (pin >= ATMEL_PIO_NPINS_PER_BANK)
-		return -ENODEV;
+		return -EINVAL;
 
 	port_base = atmel_pio4_port_base(port);
 	if (!port_base)
-		return -ENODEV;
+		return -EINVAL;
 
 	mask = 0x01 << pin;
 	reg = ATMEL_PIO_CFGR_FUNC_GPIO | ATMEL_PIO_DIR_MASK;
@@ -154,11 +154,11 @@ int atmel_pio4_get_pio_input(u32 port, u32 pin)
 	u32 reg, mask;
 
 	if (pin >= ATMEL_PIO_NPINS_PER_BANK)
-		return -ENODEV;
+		return -EINVAL;
 
 	port_base = atmel_pio4_port_base(port);
 	if (!port_base)
-		return -ENODEV;
+		return -EINVAL;
 
 	mask = 0x01 << pin;
 	reg = ATMEL_PIO_CFGR_FUNC_GPIO;
diff --git a/drivers/gpio/imx_rgpio2p.c b/drivers/gpio/imx_rgpio2p.c
index 5abc88ba54..5a5f646813 100644
--- a/drivers/gpio/imx_rgpio2p.c
+++ b/drivers/gpio/imx_rgpio2p.c
@@ -168,7 +168,7 @@ static int imx_rgpio2p_bind(struct udevice *dev)
 
 	addr = devfdt_get_addr_index(dev, 1);
 	if (addr == FDT_ADDR_T_NONE)
-		return -ENODEV;
+		return -EINVAL;
 
 	/*
 	 * TODO:
diff --git a/drivers/gpio/mxc_gpio.c b/drivers/gpio/mxc_gpio.c
index 0eb6c600f1..698d9feedf 100644
--- a/drivers/gpio/mxc_gpio.c
+++ b/drivers/gpio/mxc_gpio.c
@@ -304,7 +304,7 @@ static int mxc_gpio_bind(struct udevice *dev)
 
 	addr = devfdt_get_addr(dev);
 	if (addr == FDT_ADDR_T_NONE)
-		return -ENODEV;
+		return -EINVAL;
 
 	/*
 	 * TODO:
diff --git a/drivers/gpio/omap_gpio.c b/drivers/gpio/omap_gpio.c
index b423e34ca4..1f67482340 100644
--- a/drivers/gpio/omap_gpio.c
+++ b/drivers/gpio/omap_gpio.c
@@ -307,7 +307,7 @@ static int omap_gpio_bind(struct udevice *dev)
 
 	base_addr = devfdt_get_addr(dev);
 	if (base_addr == FDT_ADDR_T_NONE)
-		return -ENODEV;
+		return -EINVAL;
 
 	/*
 	* TODO:
diff --git a/drivers/gpio/tegra186_gpio.c b/drivers/gpio/tegra186_gpio.c
index c5a7e13cce..deb59e8b32 100644
--- a/drivers/gpio/tegra186_gpio.c
+++ b/drivers/gpio/tegra186_gpio.c
@@ -181,7 +181,7 @@ static int tegra186_gpio_bind(struct udevice *parent)
 
 	regs = (uint32_t *)devfdt_get_addr_name(parent, "gpio");
 	if (regs == (uint32_t *)FDT_ADDR_T_NONE)
-		return -ENODEV;
+		return -EINVAL;
 
 	for (port = 0; port < ctlr_data->port_count; port++) {
 		struct tegra186_gpio_platdata *plat;
diff --git a/drivers/i2c/imx_lpi2c.c b/drivers/i2c/imx_lpi2c.c
index aa97196e23..e7ec17fe9e 100644
--- a/drivers/i2c/imx_lpi2c.c
+++ b/drivers/i2c/imx_lpi2c.c
@@ -412,7 +412,7 @@ static int imx_lpi2c_probe(struct udevice *bus)
 
 	addr = devfdt_get_addr(bus);
 	if (addr == FDT_ADDR_T_NONE)
-		return -ENODEV;
+		return -EINVAL;
 
 	i2c_bus->base = addr;
 	i2c_bus->index = bus->seq;
diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index b7bb76c0ed..abf1da2ae3 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -176,7 +176,7 @@ static int bus_i2c_set_bus_speed(struct mxc_i2c_bus *i2c_bus, int speed)
 	int reg_shift = quirk ? VF610_I2C_REGSHIFT : IMX_I2C_REGSHIFT;
 
 	if (!base)
-		return -ENODEV;
+		return -EINVAL;
 
 	/* Store divider value */
 	writeb(idx, base + (IFDR << reg_shift));
@@ -239,7 +239,7 @@ static int tx_byte(struct mxc_i2c_bus *i2c_bus, u8 byte)
 	if (ret < 0)
 		return ret;
 	if (ret & I2SR_RX_NO_AK)
-		return -ENODEV;
+		return -EREMOTEIO;
 	return 0;
 }
 
@@ -418,14 +418,14 @@ static int i2c_init_transfer(struct mxc_i2c_bus *i2c_bus, u8 chip,
 			VF610_I2C_REGSHIFT : IMX_I2C_REGSHIFT;
 
 	if (!i2c_bus->base)
-		return -ENODEV;
+		return -EINVAL;
 
 	for (retry = 0; retry < 3; retry++) {
 		ret = i2c_init_transfer_(i2c_bus, chip, addr, alen);
 		if (ret >= 0)
 			return 0;
 		i2c_imx_stop(i2c_bus);
-		if (ret == -ENODEV)
+		if (ret == -EREMOTEIO)
 			return ret;
 
 		printf("%s: failed for chip 0x%x retry=%d\n", __func__, chip,
@@ -754,7 +754,7 @@ static int mxc_i2c_probe(struct udevice *bus)
 
 	addr = devfdt_get_addr(bus);
 	if (addr == FDT_ADDR_T_NONE)
-		return -ENODEV;
+		return -EINVAL;
 
 	i2c_bus->base = addr;
 	i2c_bus->index = bus->seq;
@@ -783,7 +783,7 @@ static int mxc_i2c_probe(struct udevice *bus)
 		    !dm_gpio_is_valid(&i2c_bus->scl_gpio) |
 		    ret | ret2) {
 			dev_err(dev, "i2c bus %d at %lu, fail to request scl/sda gpio\n", bus->seq, i2c_bus->base);
-			return -ENODEV;
+			return -EINVAL;
 		}
 	}
 
diff --git a/drivers/i2c/tegra186_bpmp_i2c.c b/drivers/i2c/tegra186_bpmp_i2c.c
index 931c6de508..b46a09a4e0 100644
--- a/drivers/i2c/tegra186_bpmp_i2c.c
+++ b/drivers/i2c/tegra186_bpmp_i2c.c
@@ -94,7 +94,7 @@ static int tegra186_bpmp_i2c_probe(struct udevice *dev)
 					    "nvidia,bpmp-bus-id", U32_MAX);
 	if (priv->bpmp_bus_id == U32_MAX) {
 		debug("%s: could not parse nvidia,bpmp-bus-id\n", __func__);
-		return -ENODEV;
+		return -EINVAL;
 	}
 
 	return 0;

commit 635356e554fed8d51aef5fcdabdf332cb7f681de
Author: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Date:   Sun Oct 1 02:25:22 2017 +0300

    UPSTREAM: fs/fat: Check malloc return values and fix memory leaks
    
    Check malloc() return values and properly unwind on errors so
    memory allocated for fat_itr structures get freed properly.
    
    Also fixes a leak of fsdata.fatbuf in fat_size().
    
    Fixes: 2460098cffacd1 ("fs/fat: Reduce stack usage")
    Change-Id: If2abd822a136b40375f6b0052c88c0d9deb3a632
    Reported-by: Coverity (CID: 167225, 167233, 167234)
    Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
    Reviewed-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit af609e3764ea3ed7c0ccad8e57f9d9671c81c3e8)

diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index fca4a8cf27..3b5650adb6 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -1038,12 +1038,15 @@ int fat_exists(const char *filename)
 	int ret;
 
 	itr = malloc_cache_aligned(sizeof(fat_itr));
+	if (!itr)
+		return 0;
 	ret = fat_itr_root(itr, &fsdata);
 	if (ret)
-		return 0;
+		goto out;
 
 	ret = fat_itr_resolve(itr, filename, TYPE_ANY);
 	free(fsdata.fatbuf);
+out:
 	free(itr);
 	return ret == 0;
 }
@@ -1055,9 +1058,11 @@ int fat_size(const char *filename, loff_t *size)
 	int ret;
 
 	itr = malloc_cache_aligned(sizeof(fat_itr));
+	if (!itr)
+		return -ENOMEM;
 	ret = fat_itr_root(itr, &fsdata);
 	if (ret)
-		return ret;
+		goto out_free_itr;
 
 	ret = fat_itr_resolve(itr, filename, TYPE_FILE);
 	if (ret) {
@@ -1071,12 +1076,13 @@ int fat_size(const char *filename, loff_t *size)
 			*size = 0;
 			ret = 0;
 		}
-		goto out;
+		goto out_free_both;
 	}
 
 	*size = FAT2CPU32(itr->dent->size);
+out_free_both:
 	free(fsdata.fatbuf);
-out:
+out_free_itr:
 	free(itr);
 	return ret;
 }
@@ -1089,19 +1095,22 @@ int file_fat_read_at(const char *filename, loff_t pos, void *buffer,
 	int ret;
 
 	itr = malloc_cache_aligned(sizeof(fat_itr));
+	if (!itr)
+		return -ENOMEM;
 	ret = fat_itr_root(itr, &fsdata);
 	if (ret)
-		return ret;
+		goto out_free_itr;
 
 	ret = fat_itr_resolve(itr, filename, TYPE_FILE);
 	if (ret)
-		goto out;
+		goto out_free_both;
 
 	printf("reading %s\n", filename);
 	ret = get_contents(&fsdata, itr->dent, pos, buffer, maxsize, actread);
 
-out:
+out_free_both:
 	free(fsdata.fatbuf);
+out_free_itr:
 	free(itr);
 	return ret;
 }
@@ -1147,17 +1156,18 @@ int fat_opendir(const char *filename, struct fs_dir_stream **dirsp)
 
 	ret = fat_itr_root(&dir->itr, &dir->fsdata);
 	if (ret)
-		goto fail;
+		goto fail_free_dir;
 
 	ret = fat_itr_resolve(&dir->itr, filename, TYPE_DIR);
 	if (ret)
-		goto fail;
+		goto fail_free_both;
 
 	*dirsp = (struct fs_dir_stream *)dir;
 	return 0;
 
-fail:
+fail_free_both:
 	free(dir->fsdata.fatbuf);
+fail_free_dir:
 	free(dir);
 	return ret;
 }

commit 86597fe0526efb9153a6b7d0def26dbe21545981
Author: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Date:   Sun Oct 1 02:25:21 2017 +0300

    UPSTREAM: fs/fat: Fix 'CACHE: Misaligned operation at range' warnings
    
    The 'block' field of fat_itr needs to be properly aligned for DMA and
    while it does have '__aligned(ARCH_DMA_MINALIGN)', the fat_itr structure
    itself needs to be properly aligned as well.
    
    While at it use malloc_cache_aligned() for the other aligned allocations
    in the file as well.
    
    Fixes: 2460098cffacd1 ("fs/fat: Reduce stack usage")
    Change-Id: I0b7bfe73d00435d8ec3dcd7f52a10deca07a704e
    Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
    Reviewed-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 09fa964bba80c45432660f0e64362181900a5aef)

diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index 36a309c73c..fca4a8cf27 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -495,7 +495,7 @@ read_bootsectandvi(boot_sector *bs, volume_info *volinfo, int *fatsize)
 		return -1;
 	}
 
-	block = memalign(ARCH_DMA_MINALIGN, cur_dev->blksz);
+	block = malloc_cache_aligned(cur_dev->blksz);
 	if (block == NULL) {
 		debug("Error: allocating block\n");
 		return -1;
@@ -599,7 +599,7 @@ static int get_fs_info(fsdata *mydata)
 
 	mydata->fatbufnum = -1;
 	mydata->fat_dirty = 0;
-	mydata->fatbuf = memalign(ARCH_DMA_MINALIGN, FATBUFSIZE);
+	mydata->fatbuf = malloc_cache_aligned(FATBUFSIZE);
 	if (mydata->fatbuf == NULL) {
 		debug("Error: allocating memory\n");
 		return -1;
@@ -1037,7 +1037,7 @@ int fat_exists(const char *filename)
 	fat_itr *itr;
 	int ret;
 
-	itr = malloc(sizeof(fat_itr));
+	itr = malloc_cache_aligned(sizeof(fat_itr));
 	ret = fat_itr_root(itr, &fsdata);
 	if (ret)
 		return 0;
@@ -1054,7 +1054,7 @@ int fat_size(const char *filename, loff_t *size)
 	fat_itr *itr;
 	int ret;
 
-	itr = malloc(sizeof(fat_itr));
+	itr = malloc_cache_aligned(sizeof(fat_itr));
 	ret = fat_itr_root(itr, &fsdata);
 	if (ret)
 		return ret;
@@ -1088,7 +1088,7 @@ int file_fat_read_at(const char *filename, loff_t pos, void *buffer,
 	fat_itr *itr;
 	int ret;
 
-	itr = malloc(sizeof(fat_itr));
+	itr = malloc_cache_aligned(sizeof(fat_itr));
 	ret = fat_itr_root(itr, &fsdata);
 	if (ret)
 		return ret;

commit fafa35c559b5dfd9c35fd2daf5c6e06d10caa14e
Author: Tom Rini <trini@konsulko.com>
Date:   Fri Sep 29 14:32:44 2017 -0400

    UPSTREAM: cmd: Make CMD_LZMA / CMD_UNZIP default y if CMD_BOOTI
    
    In the Linux Kernel on ARM64, the Image.COMPRESSION file is not
    self-extracting in the way that x86 and ARM images are.  So when
    CMD_BOOTI is enabled we should also default to enabling CMD_UNZIP and
    CONFIG_LZMA in order for the user to be able to decompress many of the
    common compressions that will be done to an Image file.
    
    Change-Id: Ic7958458ddc16c8b78ea40ff56d380d02883d76a
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 99e46dfc6a9176f6f0680c9dfdf33c97d56336ce)

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 10803353a2..772a62a513 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -529,6 +529,7 @@ menu "Compression commands"
 
 config CMD_LZMADEC
 	bool "lzmadec"
+	default y if CMD_BOOTI
 	select LZMA
 	help
 	  Support decompressing an LZMA (Lempel-Ziv-Markov chain algorithm)
@@ -536,6 +537,7 @@ config CMD_LZMADEC
 
 config CMD_UNZIP
 	bool "unzip"
+	default y if CMD_BOOTI
 	help
 	  Uncompress a zip-compressed memory region.
 

commit 70c6966892e43e0cb05de18a97687d402cd54a92
Author: Sam Protsenko <semen.protsenko@linaro.org>
Date:   Thu Sep 28 12:33:45 2017 -0700

    UPSTREAM: scripts: Move Kconfig contents to cmd/Kconfig
    
    On case-insensitive file systems we have collision between
    scripts/kconfig/ directory and scripts/Kconfig file. This patch moves
    scripts/Kcofnig contents to cmd/Kconfig to fix that.
    
    Change-Id: Ia60682a7eb9c3379e6e257b07e799b06e304c95f
    Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
    Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 610eec7f0593574c034054ba54fc1c934755e208)

diff --git a/Kconfig b/Kconfig
index 238fa3e1ed..d951e9f804 100644
--- a/Kconfig
+++ b/Kconfig
@@ -398,5 +398,3 @@ source "fs/Kconfig"
 source "lib/Kconfig"
 
 source "test/Kconfig"
-
-source "scripts/Kconfig"
diff --git a/cmd/Kconfig b/cmd/Kconfig
index ef9bc920ac..10803353a2 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -116,6 +116,9 @@ endmenu
 
 source "cmd/fastboot/Kconfig"
 
+config BUILD_BIN2C
+	bool
+
 comment "Commands"
 
 menu "Info commands"
diff --git a/scripts/Kconfig b/scripts/Kconfig
deleted file mode 100644
index 2a2c18e96e..0000000000
--- a/scripts/Kconfig
+++ /dev/null
@@ -1,2 +0,0 @@
-config BUILD_BIN2C
-	bool

commit ee3413194e19107451802385bc9e395144c01fb9
Author: zijun_hu <zijun_hu@htc.com>
Date:   Mon Sep 25 15:28:50 2017 +0800

    UPSTREAM: ARMv8: make master CPU checking logic more clear
    
    macro branch_if_master checks master CPU via (Aff3 & (Aff2:Aff1:Aff0))
    it is simple but a little obscure.
    
    fix by checking Affx fields within MPIDR_EL1 directly.
    
    Change-Id: I4ab4eca6620ae4b152d637a9c8cca40e4ad6ea7d
    Signed-off-by: zijun_hu <zijun_hu@htc.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 34f9a9258397b5430adfedd2bf2c6517eb468d29)

diff --git a/arch/arm/include/asm/macro.h b/arch/arm/include/asm/macro.h
index e1916f7705..0c8652a675 100644
--- a/arch/arm/include/asm/macro.h
+++ b/arch/arm/include/asm/macro.h
@@ -131,6 +131,7 @@ lr	.req	x30
 	/* NOTE: MPIDR handling will be erroneous on multi-cluster machines */
 	mrs	\xreg1, mpidr_el1
 	lsr	\xreg2, \xreg1, #32
+	lsl	\xreg2, \xreg2, #32
 	lsl	\xreg1, \xreg1, #40
 	lsr	\xreg1, \xreg1, #40
 	orr	\xreg1, \xreg1, \xreg2

commit d997bf6ff357acc546e54ef3e9f3c919a4d107a4
Author: zijun_hu <zijun_hu@htc.com>
Date:   Sat Sep 23 13:30:58 2017 +0800

    UPSTREAM: ARMv8: fix error in freeing stack frame
    
    relocate_code() allocates 32 bytes stack frame but only 16 bytes are
    freed before return. it will cause errors to possible previous frames
    and doesn't make relocate_code() look like a function.
    
    fix by freeing 32 bytes stack space
    
    Change-Id: Ic37075a62f9bb8c82aaec6867c448b5946f303a0
    Signed-off-by: zijun_hu <zijun_hu@htc.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 7baf952fdb93527bee6a4a95f2bfb7c15484a09f)

diff --git a/arch/arm/lib/relocate_64.S b/arch/arm/lib/relocate_64.S
index c760053706..fdba004363 100644
--- a/arch/arm/lib/relocate_64.S
+++ b/arch/arm/lib/relocate_64.S
@@ -73,6 +73,6 @@ relocate_done:
 	isb	sy
 4:	ldp	x0, x1, [sp, #16]
 	bl	__asm_flush_dcache_range
-5:	ldp	x29, x30, [sp],#16
+5:	ldp	x29, x30, [sp],#32
 	ret
 ENDPROC(relocate_code)

commit 51380c3b1c37c0a18b92a82f188620b6bc3fff7f
Author: zijun_hu <zijun_hu@htc.com>
Date:   Fri Sep 22 14:39:13 2017 +0800

    ARMv8: get new GD address from gd->new_gd directly
    
    the new GD address is calculated via board data BD currently
    it require the new GD area locates below BD tightly, so a strict
    constraint is imposed on memory layout which maybe make special
    platform unpleasant.
    
    fix it by getting new GD address from gd->new_gd directly.
    
    Change-Id: I9fdfbbb13a7b0a572d7aa8394f754148c6285669
    Signed-off-by: zijun_hu <zijun_hu@htc.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 01a835998935b78c31e80227358ac11212d60878)

diff --git a/arch/arm/lib/crt0_64.S b/arch/arm/lib/crt0_64.S
index 2008b76bed..d6c50bb439 100644
--- a/arch/arm/lib/crt0_64.S
+++ b/arch/arm/lib/crt0_64.S
@@ -95,8 +95,7 @@ ENTRY(_main)
  */
 	ldr	x0, [x18, #GD_START_ADDR_SP]	/* x0 <- gd->start_addr_sp */
 	bic	sp, x0, #0xf	/* 16-byte alignment for ABI compliance */
-	ldr	x18, [x18, #GD_BD]		/* x18 <- gd->bd */
-	sub	x18, x18, #GD_SIZE		/* new GD is below bd */
+	ldr	x18, [x18, #GD_NEW_GD]		/* x18 <- gd->new_gd */
 
 	adr	lr, relocation_return
 	ldr	x9, [x18, #GD_RELOC_OFF]	/* x9 <- gd->reloc_off */
diff --git a/lib/asm-offsets.c b/lib/asm-offsets.c
index 07b15497df..b33d3680a8 100644
--- a/lib/asm-offsets.c
+++ b/lib/asm-offsets.c
@@ -41,5 +41,7 @@ int main(void)
 	DEFINE(PM_CTX_SIZE, sizeof(struct pm_ctx));
 	DEFINE(PM_CTX_PHYS, offsetof(struct global_data, pm_ctx_phys));
 
+	DEFINE(GD_NEW_GD, offsetof(struct global_data, new_gd));
+
 	return 0;
 }

commit e6d8fad507497e3bc909c8183873a026736aa136
Author: Tom Rini <trini@konsulko.com>
Date:   Sat Oct 7 15:54:18 2017 -0400

    UPSTREAM: Travis-CI: Fix microblaze and xilinx jobs
    
    Given how we handle the ARM toolchain we can't easily combine these two
    jobs, so don't.  Give xilinx/ARM a separate build.
    
    Change-Id: I438104c5eb54fe89dd72d55df6240bb0d4de8c0f
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 0d3aaa35b87573c229d65bc79050ab13f39d8ec2)

diff --git a/.travis.yml b/.travis.yml
index a1564ed907..0b7a0622bf 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -194,8 +194,7 @@ matrix:
         - BUILDMAN="m68k"
           TOOLCHAIN="m68k"
     - env:
-        - JOB="Xilinx (ARM and MicroBlaze)"
-          BUILDMAN="xilinx"
+        - BUILDMAN="microblaze"
           TOOLCHAIN="microblaze"
     - env:
         - BUILDMAN="mips"
@@ -242,6 +241,9 @@ matrix:
     - env:
         - BUILDMAN="sh4"
           TOOLCHAIN="sh4"
+    - env:
+        - JOB="Xilinx (ARM)"
+          BUILDMAN="xilinx -x microblaze"
     - env:
         - BUILDMAN="xtensa"
           TOOLCHAIN="xtensa"

commit 017aad0449af131386dddfd10b80912061e76926
Author: Tom Rini <trini@konsulko.com>
Date:   Sat Oct 7 11:27:59 2017 -0400

    UPSTREAM: cmd/gpt.c, cmd/nvedit.c, tools/fit_image.c: Rework recent fixes for Coverity
    
    The recent changes to these files did not completely fix the previous
    issues, or introduced different (minor) issues.  In cmd/gpt.c we need to
    dereference str_disk_guid to be sure that malloc worked.  In
    cmd/nvedit.c we need to be careful that we can also fit in that leading
    space when adding to the string.  And in tools/fit_image.c we need to
    re-work the error handling slightly in fit_import_data() so that we only
    call munmap() once.  We have two error paths here, one where we have an
    fd to close and one where we do not.  Adjust labels to match this.
    
    Change-Id: I66fafd0ed8d1c290a7773bba5ece8d11bfc15b50
    Reported-by: Coverity (CID: 167366, 167367, 167370)
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit bf52fcdef4aac242b5e6b6b9827acf6d69ce1951)

diff --git a/cmd/gpt.c b/cmd/gpt.c
index 9e04affc06..27dd98755a 100644
--- a/cmd/gpt.c
+++ b/cmd/gpt.c
@@ -402,7 +402,7 @@ static int set_gpt_info(struct blk_desc *dev_desc,
 	if (!val) {
 #ifdef CONFIG_RANDOM_UUID
 		*str_disk_guid = malloc(UUID_STR_LEN + 1);
-		if (str_disk_guid == NULL)
+		if (*str_disk_guid == NULL)
 			return -ENOMEM;
 		gen_rand_uuid_str(*str_disk_guid, UUID_STR_FORMAT_STD);
 #else
diff --git a/cmd/nvedit.c b/cmd/nvedit.c
index 134e54427e..b35e9b324a 100644
--- a/cmd/nvedit.c
+++ b/cmd/nvedit.c
@@ -609,7 +609,7 @@ int do_env_ask(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 		sprintf(message, "Please enter '%s': ", argv[1]);
 	} else {
 		/* env_ask envname message1 ... messagen [size] */
-		for (i = 2, pos = 0; i < argc && pos < sizeof(message); i++) {
+		for (i = 2, pos = 0; i < argc && pos+1 < sizeof(message); i++) {
 			if (pos)
 				message[pos++] = ' ';
 
diff --git a/tools/fit_image.c b/tools/fit_image.c
index c6026567f3..30257b178e 100644
--- a/tools/fit_image.c
+++ b/tools/fit_image.c
@@ -537,21 +537,21 @@ static int fit_import_data(struct image_tool_params *params, const char *fname)
 		fprintf(stderr, "%s: Failed to allocate memory (%d bytes)\n",
 			__func__, size);
 		ret = -ENOMEM;
-		goto err;
+		goto err_has_fd;
 	}
 	ret = fdt_open_into(old_fdt, fdt, size);
 	if (ret) {
 		debug("%s: Failed to expand FIT: %s\n", __func__,
 		      fdt_strerror(errno));
 		ret = -EINVAL;
-		goto err;
+		goto err_has_fd;
 	}
 
 	images = fdt_path_offset(fdt, FIT_IMAGES_PATH);
 	if (images < 0) {
 		debug("%s: Cannot find /images node: %d\n", __func__, images);
 		ret = -EINVAL;
-		goto err;
+		goto err_has_fd;
 	}
 
 	for (node = fdt_first_subnode(fdt, images);
@@ -572,11 +572,11 @@ static int fit_import_data(struct image_tool_params *params, const char *fname)
 			debug("%s: Failed to write property: %s\n", __func__,
 			      fdt_strerror(ret));
 			ret = -EINVAL;
-			goto err;
+			goto err_has_fd;
 		}
 	}
 
-	munmap(old_fdt, sbuf.st_size);
+	/* Close the old fd so we can re-use it. */
 	close(fd);
 
 	/* Pack the FDT and place the data after it */
@@ -589,22 +589,23 @@ static int fit_import_data(struct image_tool_params *params, const char *fname)
 	if (fd < 0) {
 		fprintf(stderr, "%s: Can't open %s: %s\n",
 			params->cmdname, fname, strerror(errno));
-		free(fdt);
-		return -EIO;
+		ret = -EIO;
+		goto err_no_fd;
 	}
 	if (write(fd, fdt, new_size) != new_size) {
 		debug("%s: Failed to write external data to file %s\n",
 		      __func__, strerror(errno));
 		ret = -EIO;
-		goto err;
+		goto err_has_fd;
 	}
 
 	ret = 0;
 
-err:
+err_has_fd:
+	close(fd);
+err_no_fd:
 	munmap(old_fdt, sbuf.st_size);
 	free(fdt);
-	close(fd);
 	return ret;
 }
 

commit 38f2a6111e8a9f5d31f05aa4d19e32ef9d466597
Author: Tom Rini <trini@konsulko.com>
Date:   Fri Oct 6 16:37:06 2017 -0400

    UPSTREAM: Travis-CI: Split out more vendors from the catch-all ARM job
    
    - Move SoCFPGA and K2 boards to their own job
    - Expand the microblaze job to cover ARM boards from Xilinx as well.
    
    Change-Id: I05a8fd8e4c7246f8e49b095fdc08facbfa205d8a
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit afbdfd829f457d5dcad5fb70d87941de9c37ceb7)

diff --git a/.travis.yml b/.travis.yml
index f028e580f2..a1564ed907 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -155,8 +155,12 @@ matrix:
     - env:
         - JOB="i.MX (non-Freescale, non-i.MX6)"
           BUILDMAN="mx -x freescale,mx6,toradex"
+    - env:
+        - BUILDMAN="k2"
     - env:
         - BUILDMAN="samsung"
+    - env:
+        - BUILDMAN="socfpga"
     - env:
         - BUILDMAN="sun4i"
     - env:
@@ -173,7 +177,7 @@ matrix:
         - BUILDMAN="sun50i"
     - env:
         - JOB="Catch-all ARM"
-          BUILDMAN="arm -x arm11,arm7,arm9,aarch64,atmel,aries,freescale,kirkwood,mvebu,siemens,tegra,uniphier,mx,samsung,sunxi,am33xx,omap3,omap4,omap5,pxa,rockchip,toradex"
+          BUILDMAN="arm -x arm11,arm7,arm9,aarch64,atmel,aries,freescale,kirkwood,mvebu,siemens,tegra,uniphier,mx,samsung,sunxi,am33xx,omap3,omap4,omap5,pxa,rockchip,toradex,socfpga,k2,xilinx"
     - env:
         - BUILDMAN="sandbox x86"
           TOOLCHAIN="x86_64"
@@ -190,7 +194,8 @@ matrix:
         - BUILDMAN="m68k"
           TOOLCHAIN="m68k"
     - env:
-        - BUILDMAN="microblaze"
+        - JOB="Xilinx (ARM and MicroBlaze)"
+          BUILDMAN="xilinx"
           TOOLCHAIN="microblaze"
     - env:
         - BUILDMAN="mips"

commit bbbc7af3b99b81d134c6db688dab176e463f6d86
Author: Tom Rini <trini@konsulko.com>
Date:   Fri Oct 6 16:27:42 2017 -0400

    UPSTREAM: Travis-CI: Move Boundary and Engicam devices to their own jobs
    
    The i.MX6 job can still be close to the time limit, move a few more
    devices out.
    
    Change-Id: I2061d9e692ec733ad5ea0f56ff709397ffecb6a0
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 575e1607d3724bf4a35a69f982f7e7e0655473d6)

diff --git a/.travis.yml b/.travis.yml
index b1a7c497a7..f028e580f2 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -137,6 +137,12 @@ matrix:
         - BUILDMAN="atmel"
     - env:
         - BUILDMAN="aries"
+    - env:
+        - JOB="Boundary Devices"
+          BUILDMAN="boundary"
+    - env:
+        - JOB="engicam"
+          BUILDMAN="engicam"
     - env:
         - JOB="Freescale ARM32"
           BUILDMAN="freescale -x powerpc,m68k,aarch64"
@@ -145,7 +151,7 @@ matrix:
           BUILDMAN="freescale&aarch64"
     - env:
         - JOB="i.MX6 (non-Freescale)"
-          BUILDMAN="mx6 -x freescale,toradex"
+          BUILDMAN="mx6 -x freescale,toradex,boundary,engicam"
     - env:
         - JOB="i.MX (non-Freescale, non-i.MX6)"
           BUILDMAN="mx -x freescale,mx6,toradex"

commit 87279f54e5db674662c4fdedcd553f6c10fb617f
Author: Tom Rini <trini@konsulko.com>
Date:   Fri Oct 6 11:19:12 2017 -0400

    UPSTREAM: Travis-CI: Move Toradex into its own job
    
    A few of the big jobs are getting close to the time limit again, split a
    few more things out.
    
    Change-Id: Ibdfaf4207a57e6400a1047665916e3556bf7ce50
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit bc3eed965f45305254bd065a1714715daa9c3113)

diff --git a/.travis.yml b/.travis.yml
index 7012fd1d28..b1a7c497a7 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -145,10 +145,10 @@ matrix:
           BUILDMAN="freescale&aarch64"
     - env:
         - JOB="i.MX6 (non-Freescale)"
-          BUILDMAN="mx6 -x freescale"
+          BUILDMAN="mx6 -x freescale,toradex"
     - env:
         - JOB="i.MX (non-Freescale, non-i.MX6)"
-          BUILDMAN="mx -x freescale,mx6"
+          BUILDMAN="mx -x freescale,mx6,toradex"
     - env:
         - BUILDMAN="samsung"
     - env:
@@ -167,16 +167,19 @@ matrix:
         - BUILDMAN="sun50i"
     - env:
         - JOB="Catch-all ARM"
-          BUILDMAN="arm -x arm11,arm7,arm9,aarch64,atmel,aries,freescale,kirkwood,mvebu,siemens,tegra,uniphier,mx,samsung,sunxi,am33xx,omap3,omap4,omap5,pxa,rockchip"
+          BUILDMAN="arm -x arm11,arm7,arm9,aarch64,atmel,aries,freescale,kirkwood,mvebu,siemens,tegra,uniphier,mx,samsung,sunxi,am33xx,omap3,omap4,omap5,pxa,rockchip,toradex"
     - env:
         - BUILDMAN="sandbox x86"
           TOOLCHAIN="x86_64"
+    - env:
+        - BUILDMAN="toradex"
     - env:
         - BUILDMAN="kirkwood"
     - env:
         - BUILDMAN="mvebu"
     - env:
-        - BUILDMAN="pxa"
+        - JOB="PXA"
+        - BUILDMAN="pxa -x toradex"
     - env:
         - BUILDMAN="m68k"
           TOOLCHAIN="m68k"
@@ -207,7 +210,8 @@ matrix:
     - env:
         - BUILDMAN="siemens"
     - env:
-        - BUILDMAN="tegra"
+        - JOB="tegra"
+          BUILDMAN="tegra -x toradex"
     - env:
         - JOB="am33xx"
           BUILDMAN="am33xx -x siemens"
@@ -220,7 +224,8 @@ matrix:
     - env:
         - BUILDMAN="uniphier"
     - env:
-        - BUILDMAN="aarch64 -x tegra,freescale,mvebu,uniphier,sunxi,samsung,rockchip"
+        - JOB="aarch64"
+          BUILDMAN="aarch64 -x tegra,freescale,mvebu,uniphier,sunxi,samsung,rockchip"
     - env:
         - BUILDMAN="rockchip"
     - env:

commit b3e1edf26c19a347b5a5152a6357479d729c0e34
Author: Tom Rini <trini@konsulko.com>
Date:   Tue Sep 26 22:43:45 2017 -0400

    UPSTREAM: fs/ext4/ext4fs.c: Free dirnode in error path of ext4fs_ls
    
    As reported by Coverity, we did not free dirnode in the case of failure.
    Do so now.
    
    Change-Id: I6af93d24c33302d8911ff0021d1c1b067d2a2715
    Reported-by: Coverity (CID: 131221)
    Cc: Stefan Brüns <stefan.bruens@rwth-aachen.de>
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit fa9ca8a5d271e0533f61222df2bd6fd512687dbd)

diff --git a/fs/ext4/ext4fs.c b/fs/ext4/ext4fs.c
index 081509dbb4..b0c7303aa4 100644
--- a/fs/ext4/ext4fs.c
+++ b/fs/ext4/ext4fs.c
@@ -167,6 +167,7 @@ int ext4fs_ls(const char *dirname)
 				  FILETYPE_DIRECTORY);
 	if (status != 1) {
 		printf("** Can not find directory. **\n");
+		ext4fs_free_node(dirnode, &ext4fs_root->diropen);
 		return 1;
 	}
 

commit 0757e90beec4d4cd91d49b039e84bfe901762aae
Author: Tom Rini <trini@konsulko.com>
Date:   Tue Sep 26 22:14:44 2017 -0400

    UPSTREAM: tools/fit_image.c: Update some return code paths
    
    Coverity has found some problems with the return paths in parts of this
    code.  We have a case where we were going to the wrong part of the
    unwind (open() failed so we cannot close the fd), a case where we were
    only free()ing our buf on the error path and finally a case where we did
    not munmap in the failure path.
    
    Change-Id: I31ee7b7099b7f2a4ec0c11c247029df5eb9d8552
    Reported-by: Coverity (CID: 138492, 138495, 143064)
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 3c2dff5490831f85f06aa78aad5ef537b661cecf)

diff --git a/tools/fit_image.c b/tools/fit_image.c
index 4dc8bd8862..c6026567f3 100644
--- a/tools/fit_image.c
+++ b/tools/fit_image.c
@@ -372,7 +372,7 @@ static int fit_build(struct image_tool_params *params, const char *fname)
 	if (fd < 0) {
 		fprintf(stderr, "%s: Can't open %s: %s\n",
 			params->cmdname, fname, strerror(errno));
-		goto err;
+		goto err_buf;
 	}
 	ret = write(fd, buf, size);
 	if (ret != size) {
@@ -501,6 +501,7 @@ static int fit_extract_data(struct image_tool_params *params, const char *fname)
 		ret = -EIO;
 		goto err;
 	}
+	free(buf);
 	close(fd);
 	return 0;
 
@@ -601,6 +602,7 @@ static int fit_import_data(struct image_tool_params *params, const char *fname)
 	ret = 0;
 
 err:
+	munmap(old_fdt, sbuf.st_size);
 	free(fdt);
 	close(fd);
 	return ret;

commit 8ab67e0d6c97504d48d28e4e12541020ba0bfacb
Author: Tom Rini <trini@konsulko.com>
Date:   Tue Sep 26 21:12:05 2017 -0400

    UPSTREAM: cmd/time.c: Initialize 'repeatable' variable
    
    We cannot leave this uninitialized, set it to 0.
    
    Change-Id: Ic8f3dd4d7395921bf4269a618aaf92a717dbfe46
    Reported-by: Coverity (CID: 144426)
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 146dda391126d4f199c7692f2342efcc34b45ebd)

diff --git a/cmd/time.c b/cmd/time.c
index de57e3b9dd..2cd8b1a577 100644
--- a/cmd/time.c
+++ b/cmd/time.c
@@ -28,7 +28,7 @@ static int do_time(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
 	ulong cycles = 0;
 	int retval = 0;
-	int repeatable;
+	int repeatable = 0;
 
 	if (argc == 1)
 		return CMD_RET_USAGE;

commit 7f2f3661603b7c3672b3a63c3c7b5a1bbf32dd7c
Author: Tom Rini <trini@konsulko.com>
Date:   Tue Sep 26 20:44:32 2017 -0400

    UPSTREAM: cmd/pxe.c: Rework initrd and bootargs handling slightly
    
    For the initrd portion of handling our bootm arguments we do not have a
    sufficiently long enough buffer for some improbable 64bit cases.  Expand
    this buffer to allow for a 64bit address and almost 256MB initrd to be
    used.  Make use of strncpy/strncat when constructing the values here
    since we know what the worst case valid values are, length wise.
    
    Similarly for bootargs themselves, we need to make use of strlen/sizeof
    and strncpy/strncat to ensure that we don't overflow bootargs itself.
    
    Cc: Simon Glass <sjg@chromium.org>
    Cc: Alexander Graf <agraf@suse.de>
    Change-Id: I86151e4bde53972d9b6105f3a85db93b114e22d8
    Reported-by: Coverity (CID: 131256)
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 48ee0a87bc46a6f863ffd9e0396b7a068dd68c50)

diff --git a/cmd/pxe.c b/cmd/pxe.c
index c5a770a269..a62cbe192a 100644
--- a/cmd/pxe.c
+++ b/cmd/pxe.c
@@ -616,7 +616,7 @@ static int label_localboot(struct pxe_label *label)
 static int label_boot(cmd_tbl_t *cmdtp, struct pxe_label *label)
 {
 	char *bootm_argv[] = { "bootm", NULL, NULL, NULL, NULL };
-	char initrd_str[22];
+	char initrd_str[28];
 	char mac_str[29] = "";
 	char ip_str[68] = "";
 	int bootm_argc = 2;
@@ -648,9 +648,9 @@ static int label_boot(cmd_tbl_t *cmdtp, struct pxe_label *label)
 		}
 
 		bootm_argv[2] = initrd_str;
-		strcpy(bootm_argv[2], env_get("ramdisk_addr_r"));
+		strncpy(bootm_argv[2], env_get("ramdisk_addr_r"), 18);
 		strcat(bootm_argv[2], ":");
-		strcat(bootm_argv[2], env_get("filesize"));
+		strncat(bootm_argv[2], env_get("filesize"), 9);
 	}
 
 	if (get_relfile_envaddr(cmdtp, label->kernel, "kernel_addr_r") < 0) {
@@ -689,9 +689,9 @@ static int label_boot(cmd_tbl_t *cmdtp, struct pxe_label *label)
 		}
 
 		if (label->append)
-			strcpy(bootargs, label->append);
-		strcat(bootargs, ip_str);
-		strcat(bootargs, mac_str);
+			strncpy(bootargs, label->append, sizeof(bootargs));
+		strncat(bootargs, ip_str, sizeof(bootargs) - strlen(bootargs));
+		strncat(bootargs, mac_str, sizeof(bootargs) - strlen(bootargs));
 
 		cli_simple_process_macros(bootargs, finalbootargs);
 		env_set("bootargs", finalbootargs);

commit bc846a8c0826575efc6c6649a762d61d6bedbf84
Author: Tom Rini <trini@konsulko.com>
Date:   Tue Sep 26 19:37:11 2017 -0400

    UPSTREAM: cmd/nvedit.c: Update input handling to cover overflow cases
    
    When we have multiple messages provided, we need to be sure that we do
    not exceed the length of our 'message' buffer.  In the for loop, make
    sure that pos is not larger than message.  Only copy in at most however
    much of the message buffer remains.  Finally, if we have not reached the
    end of the message buffer, put in a space and NULL, and if we have,
    ensure the buffer is now NULL termined.
    
    Change-Id: I0c4f88803f8525eb6ef0207a6b7fdbec2b43e9ff
    Reported-by: Coverity (CID: 165116)
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit c667723ffb50b00585b729ee0da7b0e8c93ffa13)

diff --git a/cmd/nvedit.c b/cmd/nvedit.c
index b9628b2078..134e54427e 100644
--- a/cmd/nvedit.c
+++ b/cmd/nvedit.c
@@ -609,15 +609,18 @@ int do_env_ask(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 		sprintf(message, "Please enter '%s': ", argv[1]);
 	} else {
 		/* env_ask envname message1 ... messagen [size] */
-		for (i = 2, pos = 0; i < argc; i++) {
+		for (i = 2, pos = 0; i < argc && pos < sizeof(message); i++) {
 			if (pos)
 				message[pos++] = ' ';
 
-			strcpy(message + pos, argv[i]);
+			strncpy(message + pos, argv[i], sizeof(message) - pos);
 			pos += strlen(argv[i]);
 		}
-		message[pos++] = ' ';
-		message[pos] = '\0';
+		if (pos < sizeof(message) - 1) {
+			message[pos++] = ' ';
+			message[pos] = '\0';
+		} else
+			message[CONFIG_SYS_CBSIZE - 1] = '\0';
 	}
 
 	if (size >= CONFIG_SYS_CBSIZE)

commit cb40c099ea4cc545eb899722815d295cf26d2962
Author: Alison Chaiken <alison@she-devel.com>
Date:   Tue Sep 26 07:42:28 2017 -0700

    UPSTREAM: GPT: fix memory leaks identified by Coverity
    
    Create a common exit for most of the error handling code in
    do_rename_gpt_parts.   Delete the list elements in disk_partitions
    before calling INIT_LIST_HEAD from get_gpt_info() a second time.
    
    The SIZEOF_MISMATCH error is not addressed, since that problem was
    already fixed by "GPT: incomplete initialization in
    allocate_disk_part".
    
    Change-Id: I4ec9881a86c8a50960844e07f69c04a239bc218f
    Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
    Reported-by: Coverity (CID: 167222, 167235, 167237)
    Reviewed-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 18030d04d25d7c08d3deff85881772a520d84d49)

diff --git a/cmd/gpt.c b/cmd/gpt.c
index d4406e3120..9e04affc06 100644
--- a/cmd/gpt.c
+++ b/cmd/gpt.c
@@ -633,6 +633,21 @@ static int do_disk_guid(struct blk_desc *dev_desc, char * const namestr)
 }
 
 #ifdef CONFIG_CMD_GPT_RENAME
+/*
+ * There are 3 malloc() calls in set_gpt_info() and there is no info about which
+ * failed.
+ */
+static void set_gpt_cleanup(char **str_disk_guid,
+			    disk_partition_t **partitions)
+{
+#ifdef CONFIG_RANDOM_UUID
+	if (str_disk_guid)
+		free(str_disk_guid);
+#endif
+	if (partitions)
+		free(partitions);
+}
+
 static int do_rename_gpt_parts(struct blk_desc *dev_desc, char *subcomm,
 			       char *name1, char *name2)
 {
@@ -651,19 +666,27 @@ static int do_rename_gpt_parts(struct blk_desc *dev_desc, char *subcomm,
 	ret = get_disk_guid(dev_desc, disk_guid);
 	if (ret < 0)
 		return ret;
+	/*
+	 * Allocates disk_partitions, requiring matching call to del_gpt_info()
+	 * if successful.
+	 */
 	numparts = get_gpt_info(dev_desc);
 	if (numparts <=  0)
 		return numparts ? numparts : -ENODEV;
 
 	partlistlen = calc_parts_list_len(numparts);
 	partitions_list = malloc(partlistlen);
-	if (partitions_list == NULL)
+	if (!partitions_list) {
+		del_gpt_info();
 		return -ENOMEM;
+	}
 	memset(partitions_list, '\0', partlistlen);
 
 	ret = create_gpt_partitions_list(numparts, disk_guid, partitions_list);
-	if (ret < 0)
+	if (ret < 0) {
+		free(partitions_list);
 		return ret;
+	}
 	/*
 	 * Uncomment the following line to print a string that 'gpt write'
 	 * or 'gpt verify' will accept as input.
@@ -671,15 +694,23 @@ static int do_rename_gpt_parts(struct blk_desc *dev_desc, char *subcomm,
 	debug("OLD partitions_list is %s with %u chars\n", partitions_list,
 	      (unsigned)strlen(partitions_list));
 
+	/* set_gpt_info allocates new_partitions and str_disk_guid */
 	ret = set_gpt_info(dev_desc, partitions_list, &str_disk_guid,
 			   &new_partitions, &part_count);
-	if (ret < 0)
-		return ret;
+	if (ret < 0) {
+		del_gpt_info();
+		free(partitions_list);
+		if (ret == -ENOMEM)
+			set_gpt_cleanup(&str_disk_guid, &new_partitions);
+		else
+			goto out;
+	}
 
 	if (!strcmp(subcomm, "swap")) {
 		if ((strlen(name1) > PART_NAME_LEN) || (strlen(name2) > PART_NAME_LEN)) {
 			printf("Names longer than %d characters are truncated.\n", PART_NAME_LEN);
-			return -EINVAL;
+			ret = -EINVAL;
+			goto out;
 		}
 		list_for_each(pos, &disk_partitions) {
 			curr = list_entry(pos, struct disk_part, list);
@@ -693,21 +724,24 @@ static int do_rename_gpt_parts(struct blk_desc *dev_desc, char *subcomm,
 		}
 		if ((ctr1 + ctr2 < 2) || (ctr1 != ctr2)) {
 			printf("Cannot swap partition names except in pairs.\n");
-			return -EINVAL;
+			ret = -EINVAL;
+			goto out;
 		}
 	} else { /* rename */
 		if (strlen(name2) > PART_NAME_LEN) {
 			printf("Names longer than %d characters are truncated.\n", PART_NAME_LEN);
-			return -EINVAL;
+			ret = -EINVAL;
+			goto out;
 		}
 		partnum = (int)simple_strtol(name1, NULL, 10);
 		if ((partnum < 0) || (partnum > numparts)) {
 			printf("Illegal partition number %s\n", name1);
-			return -EINVAL;
+			ret = -EINVAL;
+			goto out;
 		}
 		ret = part_get_info(dev_desc, partnum, new_partitions);
 		if (ret < 0)
-			return ret;
+			goto out;
 
 		/* U-Boot partition numbering starts at 1 */
 		list_for_each(pos, &disk_partitions) {
@@ -722,33 +756,50 @@ static int do_rename_gpt_parts(struct blk_desc *dev_desc, char *subcomm,
 
 	ret = create_gpt_partitions_list(numparts, disk_guid, partitions_list);
 	if (ret < 0)
-		return ret;
+		goto out;
 	debug("NEW partitions_list is %s with %u chars\n", partitions_list,
 	      (unsigned)strlen(partitions_list));
 
 	ret = set_gpt_info(dev_desc, partitions_list, &str_disk_guid,
 			   &new_partitions, &part_count);
-	if (ret < 0)
-		return ret;
+	/*
+	 * Even though valid pointers are here passed into set_gpt_info(),
+	 * it mallocs again, and there's no way to tell which failed.
+	 */
+	if (ret < 0) {
+		del_gpt_info();
+		free(partitions_list);
+		if (ret == -ENOMEM)
+			set_gpt_cleanup(&str_disk_guid, &new_partitions);
+		else
+			goto out;
+	}
 
 	debug("Writing new partition table\n");
 	ret = gpt_restore(dev_desc, disk_guid, new_partitions, numparts);
 	if (ret < 0) {
 		printf("Writing new partition table failed\n");
-		return ret;
+		goto out;
 	}
 
 	debug("Reading back new partition table\n");
+	/*
+	 * Empty the existing disk_partitions list, as otherwise the memory in
+	 * the original list is unreachable.
+	 */
+	del_gpt_info();
 	numparts = get_gpt_info(dev_desc);
-	if (numparts <=  0)
-		return numparts ? numparts : -ENODEV;
+	if (numparts <=  0) {
+		ret = numparts ? numparts : -ENODEV;
+		goto out;
+	}
 	printf("new partition table with %d partitions is:\n", numparts);
 	print_gpt_info();
-
 	del_gpt_info();
-	free(partitions_list);
-	free(str_disk_guid);
+ out:
 	free(new_partitions);
+	free(str_disk_guid);
+	free(partitions_list);
 	return ret;
 }
 #endif

commit e47a88c41f05f5dc1c941163fdd36a9eefaa7ed3
Author: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Date:   Mon Sep 25 22:06:31 2017 +0300

    UPSTREAM: fs/ext4: Fix group descriptor checksum calculation
    
    The current code doesn't compute the group descriptor checksum correctly
    for the filesystems that e2fsprogs 1.43.4 creates (they have
    'Group descriptor size: 64' as reported by tune2fs). Extend the checksum
    calculation to be done as ext4_group_desc_csum() does in Linux.
    
    This fixes these errors in dmesg from running fs-test.sh and makes it
    succeed again:
    
    [1671902.620699] EXT4-fs (loop1): ext4_check_descriptors: Checksum for group 0 failed (35782!=10965)
    [1671902.620706] EXT4-fs (loop1): group descriptors corrupted!
    
    Change-Id: I362747a60cc16886c1a215867471b0a83fcf5e47
    Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 385b73185596cfc9e2acb74ab66abe91c06177f3)

diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c
index 621c61e5c7..31952f48b9 100644
--- a/fs/ext4/ext4_common.c
+++ b/fs/ext4/ext4_common.c
@@ -432,6 +432,10 @@ uint16_t ext4fs_checksum_update(uint32_t i)
 		crc = ext2fs_crc16(crc, desc, offset);
 		offset += sizeof(desc->bg_checksum);	/* skip checksum */
 		assert(offset == sizeof(*desc));
+		if (offset < fs->gdsize) {
+			crc = ext2fs_crc16(crc, (__u8 *)desc + offset,
+					   fs->gdsize - offset);
+		}
 	}
 
 	return crc;

commit 8f3d02601c436079608d6f10bf6546ee20999867
Author: Felix Brack <fb@ltec.ch>
Date:   Fri Sep 22 14:27:28 2017 +0200

    UPSTREAM: doc: Fix statements on case sensitivity for regulator prefix
    
    The regulator bindings state that regulator prefixes are allowd to be
    in upper or lower case. However pmic_bind_children from pmic_uclass uses
    strncmp to compare DT node name against prefix. This comparison is case
    sensitive hence the regulator driver prefix case matters.
    
    Change-Id: I991a56a1cae736c22012318612e7a4d1f8f25f31
    Signed-off-by: Felix Brack <fb@ltec.ch>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit bd2259e3c40c097c47e1dfc58a03b1df66b44840)

diff --git a/doc/device-tree-bindings/regulator/regulator.txt b/doc/device-tree-bindings/regulator/regulator.txt
index 2cf4b9de8b..918711eb4d 100644
--- a/doc/device-tree-bindings/regulator/regulator.txt
+++ b/doc/device-tree-bindings/regulator/regulator.txt
@@ -10,10 +10,10 @@ pmic: drivers/power/pmic/max77686.c
 regulator: drivers/power/regulator/max77686.c
 
 For the node name e.g.: "prefix[:alpha:]num { ... }":
-- the driver prefix should be: "prefix" or "PREFIX" - case insensitive
+- the driver prefix should be: "prefix" - case sensitive
 - the node name's "num" is set as "dev->driver_data" on bind
 
-Example the prefix "ldo" will pass for: "ldo1", "ldo@1", "LDO1", "LDOREG@1"...
+Example the prefix "ldo" will pass for: "ldo1", "ldo@1", "ldoreg@1, ...
 
 Optional properties:
 - regulator-name: a string, required by the regulator uclass

commit c41b1f6ed3f3c6590b532733d4a0f7c9c7d5c781
Author: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Date:   Tue Sep 19 23:18:08 2017 +0300

    UPSTREAM: travis.yml: Add job for running test.py in qemu_arm
    
    Note that this commit requires
    https://github.com/swarren/uboot-test-hooks/pull/14 to go in first.
    
    Change-Id: Ibe232788714cbe11384976c905ce7b012b375441
    Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 7b09dffc3b07ae08b0b1006ab799c2d1a0364504)

diff --git a/.travis.yml b/.travis.yml
index 00b2a73a5e..7012fd1d28 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -285,6 +285,11 @@ matrix:
           TEST_PY_ID="--id qemu"
           QEMU_TARGET="arm-softmmu"
           BUILDMAN="^integratorcp_cm926ejs$"
+    - env:
+        - TEST_PY_BD="qemu_arm"
+          TEST_PY_TEST_SPEC="not sleep"
+          QEMU_TARGET="arm-softmmu"
+          BUILDMAN="^qemu_arm$"
     - env:
         - TEST_PY_BD="qemu_mips"
           TEST_PY_TEST_SPEC="not sleep"

commit 476f6045b8addf031657657a19f55ebc4b313250
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Fri Sep 15 12:57:32 2017 +0200

    UPSTREAM: spl: dm: Make it possible for the SPL to pick its own DTB from a FIT
    
    u-boot can be embedded within a FIT image with multiple DTBs. It then
    selects at run-time  which one is best suited for the platform.
    Use the same principle here for the SPL: put the DTBs in a FIT image,
    compress it (LZO, GZIP, or no compression) and append it at the end of the
    SPL.
    
    Change-Id: Ifebdd14bdf1abc923d228f9f3947e719c8645356
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    [trini: Move default y of SPL_MULTI_DTB_FIT_DYN_ALLOC to it being the
    default choice if SYS_MALLOC_F, drop spl.h include from lib/fdtdec.c
    it's unused.]
    Signed-off-by Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 2f57c95100f231de0f4e0301237cbe477e09084b)

diff --git a/doc/README.multi-dtb-fit b/doc/README.multi-dtb-fit
index 0d4f068bbf..6cc4965bea 100644
--- a/doc/README.multi-dtb-fit
+++ b/doc/README.multi-dtb-fit
@@ -1,8 +1,11 @@
-MULTI DTB FIT
+MULTI DTB FIT and SPL_MULTI_DTB_FIT
 
-The purpose of this feature is to enable u-boot to select its DTB from a FIT
-appended at the end of the binary.
+The purpose of this feature is to enable U-Boot or the SPL to select its DTB
+from a FIT appended at the end of the binary.
+It comes in two flavors: U-Boot (CONFIG_MULTI_DTB_FIT) and SPL
+(CONFIG_SPL_MULTI_DTB_FIT).
 
+U-Boot flavor:
 Usually the DTB is selected by the SPL and passed down to U-Boot. But some
 platforms don't use the SPL. In this case MULTI_DTB_FIT can used to provide
 U-Boot with a choice of DTBs.
@@ -13,3 +16,50 @@ the FIT.
 The selection is done using board_fit_config_name_match() (same as what the SPL
 uses to select the DTB for U-Boot). The selection happens during fdtdec_setup()
 which is called during before relocation by board_init_f().
+
+SPL flavor:
+the SPL uses only a small subset of the DTB and it usually depends more
+on the SOC than on the board. So it's usually fine to include a DTB in the
+SPL that doesn't exactly match the board. There are howerver some cases
+where it's not possible. In the later case, in order to support multiple
+boards (or board revisions) with the same SPL binary, SPL_MULTI_DTB_FIT
+can be used.
+The relevant DTBs are packed into a FIT. This FIT is automatically generated
+at the end of the compilation, compressed and appended to u-boot-spl.bin, so
+that SPL can locate it and select the correct DTB from inside the FIT.
+CONFIG_SPL__OF_LIST is used to list the relevant DTBs.
+The compression stage is optional but reduces the impact on the size of the
+SPL. LZO and GZIP compressions are supported. By default, the area where the
+FIT is uncompressed is dynamicaly allocated but this behaviour can be changed
+for platforms that don't provide a HEAP big enough to contain the uncompressed
+FIT.
+The SPL uses board_fit_config_name_match() to find the correct DTB within the
+FIT (same as what the SPL uses to select the DTB for U-Boot).
+Uncompression and selection stages happen in fdtdec_setup() which is called
+during the early initialization stage of the SPL (spl_early_init() or
+spl_init())
+
+Impacts and performances (SPL flavor):
+The impact of this option is relatively small. Here are some numbers measured
+for a TI DRA72 platform:
+
+                            +----------+------------+-----------+------------+
+                            |  size    | size delta | SPL boot  | boot time  |
+                            |  (bytes) | (bytes)    | time (s)  | delta (s)  |
++---------------------------+----------+------------+-----------+------------+
+| 1 DTB                     |          |            |           |            |
++---------------------------+----------+------------+-----------+------------+
+| reference                 |   125305 |          0 |     1.389 |          0 |
+| LZO (dynamic allocation)  |   125391 |         86 |     1.381 |     -0.008 |
++---------------------------+----------+------------+-----------+------------+
+| 4 DTBs (DRA7, DRA71,      |          |            |           |            |
+| DRA72, DRA72 revC)        |          |            |           |            |
++---------------------------+----------+------------+-----------+------------+
+| LZO (dynamic allocation)  |   125991 |        686 |      1.39 |      0.001 |
+| LZO (user defined area)   |   125927 |        622 |     1.403 |      0.014 |
+| GZIP (user defined area)  |   133880 |       8575 |     1.421 |      0.032 |
+| No compression (in place) |   137472 |      12167 |     1.412 |      0.023 |
++---------------------------+----------+------------+-----------+------------+
+
+Note: SPL boot time is the time elapsed between the 'reset' command is entered
+and the time when the first U-Boot (not SPL) version string is displayed.
diff --git a/dts/Kconfig b/dts/Kconfig
index 454acaaa3c..daa757dd56 100644
--- a/dts/Kconfig
+++ b/dts/Kconfig
@@ -130,6 +130,89 @@ config MULTI_DTB_FIT
 	  the correct DTB to be used. Use this if you need to support
 	  multiple DTBs but don't use the SPL.
 
+
+config SPL_MULTI_DTB_FIT
+	depends on SPL_LOAD_FIT && SPL_OF_CONTROL && !SPL_OF_PLATDATA
+	bool "Support embedding several DTBs in a FIT image for the SPL"
+	help
+	  This option provides the SPL with the ability to select its own
+	  DTB at runtime from an appended FIT image containing several DTBs.
+	  This allows using the same SPL binary on multiple platforms.
+	  The primary purpose is to handle different versions of
+	  the same platform without tweaking the platform code if the
+	  differences can be expressed in the DTBs (common examples are: bus
+	  capabilities, pad configurations).
+
+config SPL_OF_LIST
+	string "List of device tree files to include for DT control in SPL"
+	depends on SPL_MULTI_DTB_FIT
+	default OF_LIST
+	help
+	  This option specifies a list of device tree files to use for DT
+	  control in the SPL. These will be packaged into a FIT. At run-time,
+	  the SPL will select the correct DT to use by examining the
+	  hardware (e.g. reading a board ID value). This is a list of
+	  device tree files (without the directory or .dtb suffix)
+	  separated by <space>.
+
+choice
+	prompt "SPL OF LIST compression"
+	depends on SPL_MULTI_DTB_FIT
+	default SPL_MULTI_DTB_FIT_LZO
+
+config SPL_MULTI_DTB_FIT_LZO
+	bool "LZO"
+	depends on SYS_MALLOC_F
+	select SPL_LZO
+	help
+	  Compress the FIT image containing the DTBs available for the SPL
+	  using LZO compression. (requires lzop on host).
+
+config SPL_MULTI_DTB_FIT_GZIP
+	bool "GZIP"
+	depends on SYS_MALLOC_F
+	select SPL_GZIP
+	help
+	  Compress the FIT image containing the DTBs available for the SPL
+	  using GZIP compression. (requires gzip on host)
+
+config SPL_MULTI_DTB_FIT_NO_COMPRESSION
+	bool "No compression"
+	help
+	  Do not compress the FIT image containing the DTBs available for the SPL.
+	  Use this options only if LZO is not available and the DTBs are very small.
+endchoice
+
+choice
+	prompt "Location of uncompressed DTBs "
+	depends on (SPL_MULTI_DTB_FIT_GZIP || SPL_MULTI_DTB_FIT_LZO)
+	default SPL_MULTI_DTB_FIT_DYN_ALLOC if SYS_MALLOC_F
+
+config SPL_MULTI_DTB_FIT_DYN_ALLOC
+	bool "Dynamically allocate the memory"
+	depends on SYS_MALLOC_F
+
+config SPL_MULTI_DTB_FIT_USER_DEFINED_AREA
+	bool "User-defined location"
+endchoice
+
+config SPL_MULTI_DTB_FIT_UNCOMPRESS_SZ
+	hex "Size of memory reserved to uncompress the DTBs"
+	depends on (SPL_MULTI_DTB_FIT_GZIP || SPL_MULTI_DTB_FIT_LZO)
+	default 0x8000
+	help
+	   This is the size of this area where the DTBs are uncompressed.
+	   If this area is dynamically allocated, make sure that
+	   SPL_SYS_MALLOC_F_LEN is big enough to contain it.
+
+config SPL_MULTI_DTB_FIT_USER_DEF_ADDR
+	hex "Address of memory where dtbs are uncompressed"
+	depends on SPL_MULTI_DTB_FIT_USER_DEFINED_AREA
+	help
+	   the FIT image containing the DTBs is uncompressed in an area defined
+	   at compilation time. This is the address of this area. It must be
+	   aligned on 2-byte boundary.
+
 config OF_SPL_REMOVE_PROPS
 	string "List of device tree properties to drop for SPL"
 	depends on SPL_OF_CONTROL
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 587565a015..8edc468902 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -15,6 +15,7 @@
 #include <serial.h>
 #include <asm/sections.h>
 #include <linux/ctype.h>
+#include <linux/lzo.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -1204,9 +1205,66 @@ int fdtdec_setup_memory_banksize(void)
 }
 #endif
 
+#if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
+# if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\
+	CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO)
+static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
+{
+	size_t sz_out = CONFIG_SPL_MULTI_DTB_FIT_UNCOMPRESS_SZ;
+	ulong sz_in = sz_src;
+	void *dst;
+	int rc;
+
+	if (CONFIG_IS_ENABLED(GZIP))
+		if (gzip_parse_header(src, sz_in) < 0)
+			return -1;
+	if (CONFIG_IS_ENABLED(LZO))
+		if (!lzop_is_valid_header(src))
+			return -EBADMSG;
+
+	if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) {
+		dst = malloc(sz_out);
+		if (!dst) {
+			puts("uncompress_blob: Unable to allocate memory\n");
+			return -ENOMEM;
+		}
+	} else  {
+#  if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA)
+		dst = (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR);
+#  else
+		return -ENOTSUPP;
+#  endif
+	}
+
+	if (CONFIG_IS_ENABLED(GZIP))
+		rc = gunzip(dst, sz_out, (u8 *)src, &sz_in);
+	else if (CONFIG_IS_ENABLED(LZO))
+		rc = lzop_decompress(src, sz_in, dst, &sz_out);
+
+	if (rc < 0) {
+		/* not a valid compressed blob */
+		puts("uncompress_blob: Unable to uncompress\n");
+		if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC))
+			free(dst);
+		return -EBADMSG;
+	}
+	*dstp = dst;
+	return 0;
+}
+# else
+static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
+{
+	return -ENOTSUPP;
+}
+# endif
+#endif
+
 int fdtdec_setup(void)
 {
 #if CONFIG_IS_ENABLED(OF_CONTROL)
+# if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
+	void *fdt_blob;
+# endif
 # ifdef CONFIG_OF_EMBED
 	/* Get a pointer to the FDT */
 	gd->fdt_blob = __dtb_dt_begin;
@@ -1217,15 +1275,6 @@ int fdtdec_setup(void)
 		gd->fdt_blob = (ulong *)&_image_binary_end;
 	else
 		gd->fdt_blob = (ulong *)&__bss_end;
-
-#  elif defined CONFIG_MULTI_DTB_FIT
-	gd->fdt_blob = locate_dtb_in_fit(&_end);
-
-	if (gd->fdt_blob == NULL || gd->fdt_blob <= ((void *)&_end)) {
-		puts("Failed to find proper dtb in embedded FIT Image\n");
-		return -1;
-	}
-
 #  else
 	/* FDT is at end of image */
 	gd->fdt_blob = (ulong *)&_end;
@@ -1244,7 +1293,27 @@ int fdtdec_setup(void)
 	gd->fdt_blob = (void *)env_get_ulong("fdtcontroladdr", 16,
 						(uintptr_t)gd->fdt_blob);
 # endif
+
+# if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
+	/*
+	 * Try and uncompress the blob.
+	 * Unfortunately there is no way to know how big the input blob really
+	 * is. So let us set the maximum input size arbitrarily high. 16MB
+	 * ought to be more than enough for packed DTBs.
+	 */
+	if (uncompress_blob(gd->fdt_blob, 0x1000000, &fdt_blob) == 0)
+		gd->fdt_blob = fdt_blob;
+
+	/*
+	 * Check if blob is a FIT images containings DTBs.
+	 * If so, pick the most relevant
+	 */
+	fdt_blob = locate_dtb_in_fit(gd->fdt_blob);
+	if (fdt_blob)
+		gd->fdt_blob = fdt_blob;
+# endif
 #endif
+
 	return fdtdec_prepare_fdt();
 }
 
diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index b86ea76bab..49b27ac926 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -209,10 +209,21 @@ cmd_cat = cat $(filter-out $(PHONY), $^) > $@
 quiet_cmd_copy = COPY    $@
       cmd_copy = cp $< $@
 
+ifneq ($(CONFIG_SPL_MULTI_DTB_FIT),y)
+FINAL_DTB_CONTAINER = $(obj)/$(SPL_BIN).dtb
+else ifeq ($(CONFIG_SPL_MULTI_DTB_FIT_LZO),y)
+FINAL_DTB_CONTAINER = $(obj)/$(SPL_BIN).multidtb.fit.lzo
+else ifeq ($(CONFIG_SPL_MULTI_DTB_FIT_GZIP),y)
+FINAL_DTB_CONTAINER = $(obj)/$(SPL_BIN).multidtb.fit.gz
+else
+FINAL_DTB_CONTAINER = $(obj)/$(SPL_BIN).multidtb.fit
+endif
+
+
 ifeq ($(CONFIG_$(SPL_TPL_)OF_CONTROL)$(CONFIG_OF_SEPARATE)$(CONFIG_$(SPL_TPL_)OF_PLATDATA),yy)
 $(obj)/$(SPL_BIN)-dtb.bin: $(obj)/$(SPL_BIN)-nodtb.bin \
 		$(if $(CONFIG_SPL_SEPARATE_BSS),,$(obj)/$(SPL_BIN)-pad.bin) \
-		$(obj)/$(SPL_BIN).dtb FORCE
+		$(FINAL_DTB_CONTAINER)  FORCE
 	$(call if_changed,cat)
 
 $(obj)/$(SPL_BIN).bin: $(obj)/$(SPL_BIN)-dtb.bin FORCE
@@ -383,6 +394,28 @@ checkdtoc: tools
 PHONY += FORCE
 FORCE:
 
+PHONY += dtbs
+dtbs:
+	$(Q)$(MAKE) $(build)=dts dtbs
+
 # Declare the contents of the .PHONY variable as phony.  We keep that
 # information in a variable so we can use it in if_changed and friends.
 .PHONY: $(PHONY)
+
+SHRUNK_ARCH_DTB = $(patsubst %,$(obj)/dts/%.dtb,$(subst ",,$(CONFIG_SPL_OF_LIST)))
+.SECONDEXPANSION:
+$(SHRUNK_ARCH_DTB): $$(patsubst $(obj)/dts/%, arch/$(ARCH)/dts/%, $$@)
+	$(call if_changed,fdtgrep)
+
+MKIMAGEFLAGS_$(SPL_BIN).multidtb.fit = -f auto -A $(ARCH) -T firmware -C none -O u-boot \
+	-n "Multi DTB fit image for $(SPL_BIN)" -E \
+	$(patsubst %,-b %,$(SHRUNK_ARCH_DTB))
+
+$(obj)/$(SPL_BIN).multidtb.fit: /dev/null $(SHRUNK_ARCH_DTB) FORCE
+	$(call if_changed,mkimage)
+
+$(obj)/$(SPL_BIN).multidtb.fit.gz: $(obj)/$(SPL_BIN).multidtb.fit
+	@gzip -kf9 $< > $@
+
+$(obj)/$(SPL_BIN).multidtb.fit.lzo: $(obj)/$(SPL_BIN).multidtb.fit
+	@lzop -f9 $< > $@

commit 6f869ebd9001de0466ef4cf0ac7f1b1d7cf4d0d7
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Fri Sep 15 12:57:31 2017 +0200

    UPSTREAM: fdtdec: sort include files
    
    Sort include files in accordance to U-Boot coding style.
    
    Change-Id: I3c7992edd31468f4105a95b86a6f05108e751e92
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 035d64025c3e32a2f372981f86fc69255feeb2b2)

diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index e950618d5a..587565a015 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -4,16 +4,16 @@
  */
 
 #ifndef USE_HOSTCC
-#include <boot_fit.h>
 #include <common.h>
+#include <boot_fit.h>
 #include <dm.h>
+#include <dm/of_extra.h>
 #include <errno.h>
-#include <serial.h>
-#include <libfdt.h>
-#include <fdt_support.h>
 #include <fdtdec.h>
+#include <fdt_support.h>
+#include <libfdt.h>
+#include <serial.h>
 #include <asm/sections.h>
-#include <dm/of_extra.h>
 #include <linux/ctype.h>
 
 DECLARE_GLOBAL_DATA_PTR;

commit 205ac79efb3a9aca5ebabc7ddcf2d5da4aaa6ab1
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Fri Sep 15 12:57:30 2017 +0200

    UPSTREAM: lib: allow building lzo for the SPL
    
    Change-Id: If6ccf36b13632f5450f700b8931975a4742a698e
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Reviewed-by: Tom Rini <trini@konsulko.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit f52bdf4b678defea2341aa4b68736e6978180222)

diff --git a/lib/Kconfig b/lib/Kconfig
index a5aa2e6244..a9ce9fc82b 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -183,6 +183,11 @@ config LZO
 	help
 	  This enables support for LZO compression algorithm.r
 
+config SPL_LZO
+	bool "Enable LZO decompression support in SPL"
+	help
+	  This enables support for LZO compression algorithm in the SPL.
+
 config SPL_GZIP
 	bool "Enable gzip decompression support for SPL build"
 	select SPL_ZLIB
diff --git a/lib/Makefile b/lib/Makefile
index ab604be04f..6000cd15d0 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -10,7 +10,6 @@ ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_EFI) += efi/
 obj-$(CONFIG_EFI_LOADER) += efi_loader/
 obj-$(CONFIG_LZMA) += lzma/
-obj-$(CONFIG_LZO) += lzo/
 obj-$(CONFIG_BZIP2) += bzip2/
 obj-$(CONFIG_TIZEN) += tizen/
 obj-$(CONFIG_FIT) += libfdt/
@@ -56,6 +55,8 @@ obj-$(CONFIG_SHA256) += sha256.o
 
 obj-$(CONFIG_$(SPL_)ZLIB) += zlib/
 obj-$(CONFIG_$(SPL_)GZIP) += gunzip.o
+obj-$(CONFIG_$(SPL_)LZO) += lzo/
+
 
 obj-$(CONFIG_$(SPL_TPL_)SAVEENV) += qsort.o
 obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += libfdt/

commit 194712615eb6bfeaee85469e2d97c6876741e4a1
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Fri Sep 15 12:57:29 2017 +0200

    UPSTREAM: gzip: add a function to parse the header
    
    Change-Id: I9829ad25a955eb4764ae2e66f1c32751703d9ae6
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Reviewed-by: Tom Rini <trini@konsulko.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 376ddf9d4a21d0af4c70e97c52e5f0854fb2d696)

diff --git a/include/common.h b/include/common.h
index c010aff87d..d890be50fc 100644
--- a/include/common.h
+++ b/include/common.h
@@ -629,6 +629,7 @@ ulong	usec2ticks    (unsigned long usec);
 ulong	ticks2usec    (unsigned long ticks);
 
 /* lib/gunzip.c */
+int gzip_parse_header(const unsigned char *src, unsigned long len);
 int gunzip(void *, int, unsigned char *, unsigned long *);
 int zunzip(void *dst, int dstlen, unsigned char *src, unsigned long *lenp,
 						int stoponerr, int offset);
diff --git a/lib/gunzip.c b/lib/gunzip.c
index 832b3064e7..adb86c7550 100644
--- a/lib/gunzip.c
+++ b/lib/gunzip.c
@@ -42,7 +42,7 @@ void gzfree(void *x, void *addr, unsigned nb)
 	free (addr);
 }
 
-int gunzip(void *dst, int dstlen, unsigned char *src, unsigned long *lenp)
+int gzip_parse_header(const unsigned char *src, unsigned long len)
 {
 	int i, flags;
 
@@ -63,12 +63,21 @@ int gunzip(void *dst, int dstlen, unsigned char *src, unsigned long *lenp)
 			;
 	if ((flags & HEAD_CRC) != 0)
 		i += 2;
-	if (i >= *lenp) {
+	if (i >= len) {
 		puts ("Error: gunzip out of data in header\n");
 		return (-1);
 	}
+	return i;
+}
+
+int gunzip(void *dst, int dstlen, unsigned char *src, unsigned long *lenp)
+{
+	int offset = gzip_parse_header(src, *lenp);
+
+	if (offset < 0)
+		return offset;
 
-	return zunzip(dst, dstlen, src, lenp, 1, i);
+	return zunzip(dst, dstlen, src, lenp, 1, offset);
 }
 
 #ifdef CONFIG_CMD_UNZIP

commit df70772d8a598e96a8b178a8c097c7d682054786
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Fri Sep 15 12:57:28 2017 +0200

    UPSTREAM: lzo: add a function to check the validity of the header
    
    Change-Id: I8835606db327dc958e90ce717ae4fe85439b46e3
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Reviewed-by: Tom Rini <trini@konsulko.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit d753f942ec12e6b5b2db73698aa6c55588053d3a)

diff --git a/include/linux/lzo.h b/include/linux/lzo.h
index 88687faba1..8981d04f96 100644
--- a/include/linux/lzo.h
+++ b/include/linux/lzo.h
@@ -31,6 +31,9 @@ int lzo1x_decompress_safe(const unsigned char *src, size_t src_len,
 int lzop_decompress(const unsigned char *src, size_t src_len,
 		    unsigned char *dst, size_t *dst_len);
 
+/* check if the header is valid (based on magic numbers) */
+bool lzop_is_valid_header(const unsigned char *src);
+
 /*
  * Return values (< 0 = Error)
  */
diff --git a/lib/lzo/lzo1x_decompress.c b/lib/lzo/lzo1x_decompress.c
index ccc90b8ee5..65fef0b0eb 100644
--- a/lib/lzo/lzo1x_decompress.c
+++ b/lib/lzo/lzo1x_decompress.c
@@ -30,16 +30,29 @@ static const unsigned char lzop_magic[] = {
 
 #define HEADER_HAS_FILTER	0x00000800L
 
-static inline const unsigned char *parse_header(const unsigned char *src)
+
+bool lzop_is_valid_header(const unsigned char *src)
 {
-	u16 version;
 	int i;
-
 	/* read magic: 9 first bytes */
 	for (i = 0; i < ARRAY_SIZE(lzop_magic); i++) {
 		if (*src++ != lzop_magic[i])
-			return NULL;
+			return false;
 	}
+	return true;
+}
+
+static inline const unsigned char *parse_header(const unsigned char *src)
+{
+	u16 version;
+	int i;
+
+	if (!lzop_is_valid_header(src))
+		return NULL;
+
+	/* skip header */
+	src += 9;
+
 	/* get version (2bytes), skip library version (2),
 	 * 'need to be extracted' version (2) and
 	 * method (1) */

commit 0079efa1b4d2ddcf0ef6fd653fbebd94cec729e3
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Fri Sep 15 12:57:27 2017 +0200

    UPSTREAM: fit: If no matching config is found in fit_find_config_node(), use the default one
    
    If board_fit_config_name_match() doesn't match any configuration node,
    then use the default one (if provided).
    
    Change-Id: Ieb93f146a54cb6d75d8f6b395078c315a4fac134
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Reviewed-by: Tom Rini <trini@konsulko.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 02035d0086b3f9114463a9b9df38a5618ffe8a04)

diff --git a/common/common_fit.c b/common/common_fit.c
index 5f5f3f9a44..85b33d8c3b 100644
--- a/common/common_fit.c
+++ b/common/common_fit.c
@@ -32,6 +32,9 @@ int fit_find_config_node(const void *fdt)
 {
 	const char *name;
 	int conf, node, len;
+	const char *dflt_conf_name;
+	const char *dflt_conf_desc = NULL;
+	int dflt_conf_node = -ENOENT;
 
 	conf = fdt_path_offset(fdt, FIT_CONFS_PATH);
 	if (conf < 0) {
@@ -39,6 +42,9 @@ int fit_find_config_node(const void *fdt)
 		      conf);
 		return -EINVAL;
 	}
+
+	dflt_conf_name = fdt_getprop(fdt, conf, "default", &len);
+
 	for (node = fdt_first_subnode(fdt, conf);
 	     node >= 0;
 	     node = fdt_next_subnode(fdt, node)) {
@@ -50,6 +56,15 @@ int fit_find_config_node(const void *fdt)
 #endif
 			return -EINVAL;
 		}
+
+		if (dflt_conf_name) {
+			const char *node_name = fdt_get_name(fdt, node, NULL);
+			if (strcmp(dflt_conf_name, node_name) == 0) {
+				dflt_conf_node = node;
+				dflt_conf_desc = name;
+			}
+		}
+
 		if (board_fit_config_name_match(name))
 			continue;
 
@@ -58,5 +73,10 @@ int fit_find_config_node(const void *fdt)
 		return node;
 	}
 
+	if (dflt_conf_node != -ENOENT) {
+		debug("Selecting default config '%s'", dflt_conf_desc);
+		return dflt_conf_node;
+	}
+
 	return -ENOENT;
 }
diff --git a/include/image.h b/include/image.h
index b16a34cd6a..3e2da587ba 100644
--- a/include/image.h
+++ b/include/image.h
@@ -1321,6 +1321,19 @@ void board_fit_image_post_process(void **p_image, size_t *p_size);
 #define FDT_ERROR	((ulong)(-1))
 
 ulong fdt_getprop_u32(const void *fdt, int node, const char *prop);
+
+/**
+ * fit_find_config_node() - Find the node for the best DTB in a FIT image
+ *
+ * A FIT image contains one or more DTBs. This function parses the
+ * configurations described in the FIT images and returns the node of
+ * the first matching DTB. To check if a DTB matches a board, this function
+ * calls board_fit_config_name_match(). If no matching DTB is found, it returns
+ * the node described by the default configuration if it exists.
+ *
+ * @fdt: pointer to flat device tree
+ * @return the node if found, -ve otherwise
+ */
 int fit_find_config_node(const void *fdt);
 
 /**

commit 1481d9f17676356207187adbfe2ec296fcf06aa2
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Fri Sep 15 12:57:26 2017 +0200

    UPSTREAM: fit: fixed bug in locate_dtb_in_fit()
    
    If the dtb is the first data of the FIT, the its offset is 0x0. Change the
    test to '<' instead of '<='
    
    Change-Id: Ie6dd1734049f642511db0fc1b19f2af0bec8de04
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Reviewed-by: Tom Rini <trini@konsulko.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit d56b86eec32a700cdc16170ad8365ee7c6522f0e)

diff --git a/common/boot_fit.c b/common/boot_fit.c
index ce4293184a..add65c4bae 100644
--- a/common/boot_fit.c
+++ b/common/boot_fit.c
@@ -73,7 +73,7 @@ void *locate_dtb_in_fit(const void *fit)
 
 	ret = fdt_offset(fit);
 
-	if (ret <= 0)
+	if (ret < 0)
 		return NULL;
 	else
 		return (void *)fit+size+ret;

commit ea5b64c6e7f477be5edd65333a10aca042d2eb10
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Fri Sep 15 12:57:25 2017 +0200

    UPSTREAM: fit: use 'const' for the input of fdt_offset() and locate_dtb_in_fit()
    
    Those 2 functions don't modify their input, we can mark it const.
    This prevents compilation warnings when they are provided const input.
    
    Change-Id: I9583751451cfc26a99ee94f87447dd6337d0cc67
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Reviewed-by: Tom Rini <trini@konsulko.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 906a9dbbcba85e8b02414c960c75103cc4755102)

diff --git a/common/boot_fit.c b/common/boot_fit.c
index 0a723150b5..ce4293184a 100644
--- a/common/boot_fit.c
+++ b/common/boot_fit.c
@@ -13,7 +13,7 @@
 #include <image.h>
 #include <libfdt.h>
 
-int fdt_offset(void *fit)
+static int fdt_offset(const void *fit)
 {
 	int images, node, fdt_len, fdt_node, fdt_offset;
 	const char *fdt_name;
@@ -55,7 +55,7 @@ int fdt_offset(void *fit)
 	return fdt_offset;
 }
 
-void *locate_dtb_in_fit(void *fit)
+void *locate_dtb_in_fit(const void *fit)
 {
 	struct image_header *header;
 	int size;
diff --git a/include/boot_fit.h b/include/boot_fit.h
index b7d2462dd9..e16ae5bafa 100644
--- a/include/boot_fit.h
+++ b/include/boot_fit.h
@@ -5,5 +5,10 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 
-int fdt_offset(void *fit);
-void *locate_dtb_in_fit(void *fit);
+/**
+ * locate_dtb_in_fit - Find a DTB matching the board in a FIT image
+ * @fit:	pointer to the FIT image
+ *
+ * @return a pointer to a matching DTB blob if found, NULL otherwise
+ */
+void *locate_dtb_in_fit(const void *fit);

commit 2bbcffb1d32577bf249357776460c34feea487b5
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Fri Sep 15 12:57:24 2017 +0200

    UPSTREAM: dts: renamed FIT_EMBED to MULTI_DTB_FIT and moved it to the dts Kconfig
    
    CONFIG_FIT_EMBED might be confused with CONFIG_OF_EMBED, rename it
    MULTI_DTB_FIT as it is able to get a DTB from a FIT image containing
    multiple DTBs. Also move the option to the Kconfig dedicated to the DTS
    options and create a README for this feature.
    
    Change-Id: Ide55c474339db3ccd5e20499c54c8bb41fe3a2c9
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Reviewed-by: Tom Rini <trini@konsulko.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 11955590a284ecb75892aad5f1174ca1b94a709b)

diff --git a/Makefile b/Makefile
index b7d5cbb3f9..6a92e3b60d 100644
--- a/Makefile
+++ b/Makefile
@@ -878,7 +878,7 @@ dts/dt.dtb: u-boot
 quiet_cmd_copy = COPY    $@
       cmd_copy = cp $< $@
 
-ifeq ($(CONFIG_FIT_EMBED),y)
+ifeq ($(CONFIG_MULTI_DTB_FIT),y)
 
 fit-dtb.blob: dts/dt.dtb FORCE
 	$(call if_changed,mkimage)
diff --git a/board/ti/ks2_evm/board_k2e.c b/board/ti/ks2_evm/board_k2e.c
index 266a66b678..6c77d915e5 100644
--- a/board/ti/ks2_evm/board_k2e.c
+++ b/board/ti/ks2_evm/board_k2e.c
@@ -166,7 +166,7 @@ int get_num_eth_ports(void)
 }
 #endif
 
-#if defined(CONFIG_FIT_EMBED)
+#if defined(CONFIG_MULTI_DTB_FIT)
 int board_fit_config_name_match(const char *name)
 {
 	if (!strcmp(name, "keystone-k2e-evm"))
diff --git a/board/ti/ks2_evm/board_k2g.c b/board/ti/ks2_evm/board_k2g.c
index 15f0f54af6..5120b2cece 100644
--- a/board/ti/ks2_evm/board_k2g.c
+++ b/board/ti/ks2_evm/board_k2g.c
@@ -216,7 +216,7 @@ int board_mmc_init(bd_t *bis)
 }
 #endif
 
-#if defined(CONFIG_FIT_EMBED)
+#if defined(CONFIG_MULTI_DTB_FIT)
 int board_fit_config_name_match(const char *name)
 {
 	bool eeprom_read = board_ti_was_eeprom_read();
diff --git a/board/ti/ks2_evm/board_k2hk.c b/board/ti/ks2_evm/board_k2hk.c
index c7330996d1..e99e6355b4 100644
--- a/board/ti/ks2_evm/board_k2hk.c
+++ b/board/ti/ks2_evm/board_k2hk.c
@@ -150,7 +150,7 @@ int board_early_init_f(void)
 }
 #endif
 
-#if defined(CONFIG_FIT_EMBED)
+#if defined(CONFIG_MULTI_DTB_FIT)
 int board_fit_config_name_match(const char *name)
 {
 	if (!strcmp(name, "keystone-k2hk-evm"))
diff --git a/board/ti/ks2_evm/board_k2l.c b/board/ti/ks2_evm/board_k2l.c
index 166367bfb9..c65f33131d 100644
--- a/board/ti/ks2_evm/board_k2l.c
+++ b/board/ti/ks2_evm/board_k2l.c
@@ -138,7 +138,7 @@ int board_early_init_f(void)
 }
 #endif
 
-#if defined(CONFIG_FIT_EMBED)
+#if defined(CONFIG_MULTI_DTB_FIT)
 int board_fit_config_name_match(const char *name)
 {
 	if (!strcmp(name, "keystone-k2l-evm"))
diff --git a/common/Kconfig b/common/Kconfig
index ef5b4d8c88..78e0094b78 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -405,22 +405,6 @@ config SYS_STDIO_DEREGISTER
 
 endmenu
 
-config DTB_RESELECT
-	bool "Support swapping dtbs at a later point in boot"
-	depends on FIT_EMBED
-	help
-	  It is possible during initial boot you may need to use a generic
-	  dtb until you can fully determine the board your running on. This
-	  config allows boards to implement a function at a later point
-	  during boot to switch to the "correct" dtb.
-
-config FIT_EMBED
-	bool "Support a FIT image embedded in the U-boot image"
-	help
-	  This option provides hooks to allow U-boot to parse an
-	  appended FIT image and enable board specific code to then select
-	  the correct DTB to be used.
-
 config DEFAULT_FDT_FILE
 	string "Default fdt file"
 	help
diff --git a/common/Makefile b/common/Makefile
index f79e8fe13a..525433c888 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -105,7 +105,7 @@ obj-$(CONFIG_$(SPL_TPL_)ANDROID_BOOT_IMAGE) += image-android.o
 obj-$(CONFIG_$(SPL_TPL_)ANDROID_BOOTLOADER) += android_bootloader.o
 obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += image-fdt.o
 obj-$(CONFIG_$(SPL_TPL_)FIT) += image-fit.o
-obj-$(CONFIG_FIT_EMBED) += boot_fit.o common_fit.o
+obj-$(CONFIG_$(SPL_)MULTI_DTB_FIT) += boot_fit.o common_fit.o
 obj-$(CONFIG_$(SPL_TPL_)FIT_SIGNATURE) += image-sig.o
 obj-$(CONFIG_IO_TRACE) += iotrace.o
 obj-y += memsize.o
diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig
index fed6addab6..b6a5282ff4 100644
--- a/configs/k2e_evm_defconfig
+++ b/configs/k2e_evm_defconfig
@@ -12,7 +12,7 @@ CONFIG_DEFAULT_DEVICE_TREE="keystone-k2e-evm"
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 CONFIG_DTB_RESELECT=y
-CONFIG_FIT_EMBED=y
+CONFIG_MULTI_DTB_FIT=y
 CONFIG_VERSION_VARIABLE=y
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_SPL=y
diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig
index 2b29bf4491..9c8b66d1e1 100644
--- a/configs/k2g_evm_defconfig
+++ b/configs/k2g_evm_defconfig
@@ -12,7 +12,7 @@ CONFIG_DEFAULT_DEVICE_TREE="keystone-k2g-evm"
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 CONFIG_DTB_RESELECT=y
-CONFIG_FIT_EMBED=y
+CONFIG_MULTI_DTB_FIT=y
 CONFIG_VERSION_VARIABLE=y
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_SPL=y
diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig
index 80546ecfc9..bfb95abe32 100644
--- a/configs/k2hk_evm_defconfig
+++ b/configs/k2hk_evm_defconfig
@@ -12,7 +12,7 @@ CONFIG_DEFAULT_DEVICE_TREE="keystone-k2hk-evm"
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 CONFIG_DTB_RESELECT=y
-CONFIG_FIT_EMBED=y
+CONFIG_MULTI_DTB_FIT=y
 CONFIG_VERSION_VARIABLE=y
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_SPL=y
diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig
index 732c9d2f7f..7ab0d47e03 100644
--- a/configs/k2l_evm_defconfig
+++ b/configs/k2l_evm_defconfig
@@ -12,7 +12,7 @@ CONFIG_DEFAULT_DEVICE_TREE="keystone-k2l-evm"
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 CONFIG_DTB_RESELECT=y
-CONFIG_FIT_EMBED=y
+CONFIG_MULTI_DTB_FIT=y
 CONFIG_VERSION_VARIABLE=y
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_SPL=y
diff --git a/doc/README.multi-dtb-fit b/doc/README.multi-dtb-fit
new file mode 100644
index 0000000000..0d4f068bbf
--- /dev/null
+++ b/doc/README.multi-dtb-fit
@@ -0,0 +1,15 @@
+MULTI DTB FIT
+
+The purpose of this feature is to enable u-boot to select its DTB from a FIT
+appended at the end of the binary.
+
+Usually the DTB is selected by the SPL and passed down to U-Boot. But some
+platforms don't use the SPL. In this case MULTI_DTB_FIT can used to provide
+U-Boot with a choice of DTBs.
+The relevant DTBs are packed into a FIT (list provided by CONFIG__OF_LIST). The
+FIT is automatically generated at the end of the compilation and appended to
+u-boot.bin so that U-Boot can locate it and select the correct DTB from inside
+the FIT.
+The selection is done using board_fit_config_name_match() (same as what the SPL
+uses to select the DTB for U-Boot). The selection happens during fdtdec_setup()
+which is called during before relocation by board_init_f().
diff --git a/dts/Kconfig b/dts/Kconfig
index 4ee0510943..454acaaa3c 100644
--- a/dts/Kconfig
+++ b/dts/Kconfig
@@ -102,7 +102,7 @@ config DEFAULT_DEVICE_TREE
 
 config OF_LIST
 	string "List of device tree files to include for DT control"
-	depends on SPL_LOAD_FIT || FIT_EMBED
+	depends on SPL_LOAD_FIT || MULTI_DTB_FIT
 	default DEFAULT_DEVICE_TREE
 	help
 	  This option specifies a list of device tree files to use for DT
@@ -112,6 +112,24 @@ config OF_LIST
 	  device tree files (without the directory or .dtb suffix)
 	  separated by <space>.
 
+
+config DTB_RESELECT
+	bool "Support swapping dtbs at a later point in boot"
+	depends on MULTI_DTB_FIT
+	help
+	  It is possible during initial boot you may need to use a generic
+	  dtb until you can fully determine the board your running on. This
+	  config allows boards to implement a function at a later point
+	  during boot to switch to the "correct" dtb.
+
+config MULTI_DTB_FIT
+	bool "Support embedding several DTBs in a FIT image for u-boot"
+	help
+	  This option provides hooks to allow U-boot to parse an
+	  appended FIT image and enable board specific code to then select
+	  the correct DTB to be used. Use this if you need to support
+	  multiple DTBs but don't use the SPL.
+
 config OF_SPL_REMOVE_PROPS
 	string "List of device tree properties to drop for SPL"
 	depends on SPL_OF_CONTROL
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 4a8a8d74e0..e950618d5a 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -1218,7 +1218,7 @@ int fdtdec_setup(void)
 	else
 		gd->fdt_blob = (ulong *)&__bss_end;
 
-#  elif defined CONFIG_FIT_EMBED
+#  elif defined CONFIG_MULTI_DTB_FIT
 	gd->fdt_blob = locate_dtb_in_fit(&_end);
 
 	if (gd->fdt_blob == NULL || gd->fdt_blob <= ((void *)&_end)) {

commit 263b1d7d681014c1c1bea2503aef31af5e42d06e
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Wed Sep 13 19:16:44 2017 +0900

    UPSTREAM: linux/kernel.h: import DIV_ROUND_{DOWN, UP}_ULL from Linux
    
    These macros are useful to avoid link error on 32-bit systems.
    
    Change-Id: Id451c874a2a89e3ebff352e4c90d2d4d0613b9bc
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 84570a0c111ac50372d51271eadc13ff5cbb1a54)

diff --git a/include/linux/kernel.h b/include/linux/kernel.h
index 0b616713cc..87d2d9554d 100644
--- a/include/linux/kernel.h
+++ b/include/linux/kernel.h
@@ -57,6 +57,11 @@
 #define FIELD_SIZEOF(t, f) (sizeof(((t*)0)->f))
 #define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
 
+#define DIV_ROUND_DOWN_ULL(ll, d) \
+	({ unsigned long long _tmp = (ll); do_div(_tmp, d); _tmp; })
+
+#define DIV_ROUND_UP_ULL(ll, d)		DIV_ROUND_DOWN_ULL((ll) + (d) - 1, (d))
+
 #if BITS_PER_LONG == 32
 # define DIV_ROUND_UP_SECTOR_T(ll,d) DIV_ROUND_UP_ULL(ll, d)
 #else

commit bcf5156aaaa4a9d132c0e6c3cf9487a0141f3a0e
Author: Tom Rini <trini@konsulko.com>
Date:   Wed Oct 4 16:44:30 2017 -0400

    UPSTREAM: common: Drop LOGLEVEL to 4
    
    While this came in with a default value of 6 I am lowering this to 4.
    The MTD/UBI code has a large number of error messages that we include
    now.  In addition, "normally" warning messages are not included so this
    feels like a more natural level to have.
    
    Change-Id: I20bc4b32caf1876d5f6052851580383f00a67dc9
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 6a3e65dea3e525b5337ca8014aa4be9f5fafeb92)

diff --git a/common/Kconfig b/common/Kconfig
index ed8db73cff..ef5b4d8c88 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -245,7 +245,7 @@ config IDENT_STRING
 
 config LOGLEVEL
 	int "loglevel"
-	default 6
+	default 4
 	range 0 8
 	help
 	  All Messages with a loglevel smaller than the console loglevel will
diff --git a/configs/axm_defconfig b/configs/axm_defconfig
index cd89c2a235..81654b2304 100644
--- a/configs/axm_defconfig
+++ b/configs/axm_defconfig
@@ -41,4 +41,3 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_USE_TINY_PRINTF=y
-CONFIG_LOGLEVEL=4
diff --git a/configs/corvus_defconfig b/configs/corvus_defconfig
index 059cb5992e..705e001457 100644
--- a/configs/corvus_defconfig
+++ b/configs/corvus_defconfig
@@ -14,7 +14,6 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,MACH_TYPE=2066,SYS_USE_NANDFLASH"
 CONFIG_BOOTDELAY=3
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2"
-CONFIG_LOGLEVEL=4
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_SPL=y
diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig
index 3e9eb4fa84..c95134bcf9 100644
--- a/configs/omapl138_lcdk_defconfig
+++ b/configs/omapl138_lcdk_defconfig
@@ -8,7 +8,6 @@ CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_NAND_SUPPORT=y
 CONFIG_BOOTDELAY=3
-CONFIG_LOGLEVEL=4
 CONFIG_VERSION_VARIABLE=y
 # CONFIG_DISPLAY_CPUINFO is not set
 # CONFIG_DISPLAY_BOARDINFO is not set
diff --git a/configs/taurus_defconfig b/configs/taurus_defconfig
index 5b7fc8ae14..71a382a3e1 100644
--- a/configs/taurus_defconfig
+++ b/configs/taurus_defconfig
@@ -16,7 +16,6 @@ CONFIG_SPL_SPI_SUPPORT=y
 CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20-taurus"
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,MACH_TYPE=2067,BOARD_TAURUS"
 CONFIG_BOOTDELAY=3
-CONFIG_LOGLEVEL=4
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2"
 # CONFIG_DISPLAY_BOARDINFO is not set

commit d42197e44e9091ec4553b74a54a8502a2415a09f
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Fri Sep 29 12:31:20 2017 +0900

    UPSTREAM: dm: replace dm_dbg() with pr_debug()
    
    As we discussed before in ML, dm_dbg() causes undefined reference
    error if #define DEBUG is added to users, but not drivers/core/util.c
    
    We do not need this macro because we can use pr_debug() instead, and
    it is pretty easy to enable it for the DM core by using ccflags-y.
    
    Change-Id: I0732d1fec827d434b1163093920a3c5bd682803e
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit ceb9190969e458dcd1427566f762dbb9cfdfdc94)

diff --git a/drivers/core/Kconfig b/drivers/core/Kconfig
index 7afef1f9a3..e8ba20ca82 100644
--- a/drivers/core/Kconfig
+++ b/drivers/core/Kconfig
@@ -45,6 +45,12 @@ config DM_WARN
 	  This will cause dm_warn() to be compiled out - it will do nothing
 	  when called.
 
+config DM_DEBUG
+	bool "Enable debug messages in driver model core"
+	depends on DM
+	help
+	  Say Y here if you want to compile in debug messages in DM core.
+
 config DM_DEVICE_REMOVE
 	bool "Support device removal"
 	depends on DM
diff --git a/drivers/core/Makefile b/drivers/core/Makefile
index 3d68c70b57..a5039c5bd3 100644
--- a/drivers/core/Makefile
+++ b/drivers/core/Makefile
@@ -16,3 +16,5 @@ ifndef CONFIG_DM_DEV_READ_INLINE
 obj-$(CONFIG_OF_CONTROL) += read.o
 endif
 obj-$(CONFIG_OF_CONTROL) += of_extra.o ofnode.o read_extra.o
+
+ccflags-$(CONFIG_DM_DEBUG) += -DDEBUG
diff --git a/drivers/core/device.c b/drivers/core/device.c
index 5463d1ffa5..de63e5335a 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -161,7 +161,7 @@ static int device_bind_common(struct udevice *parent, const struct driver *drv,
 	}
 
 	if (parent)
-		dm_dbg("Bound device %s to %s\n", dev->name, parent->name);
+		pr_debug("Bound device %s to %s\n", dev->name, parent->name);
 	if (devp)
 		*devp = dev;
 
diff --git a/drivers/core/lists.c b/drivers/core/lists.c
index 6067914e81..6fa5d1090a 100644
--- a/drivers/core/lists.c
+++ b/drivers/core/lists.c
@@ -139,12 +139,13 @@ int lists_bind_fdt(struct udevice *parent, ofnode node, struct udevice **devp)
 	if (devp)
 		*devp = NULL;
 	name = ofnode_get_name(node);
-	dm_dbg("bind node %s\n", name);
+	pr_debug("bind node %s\n", name);
 
 	compat_list = ofnode_get_property(node, "compatible", &compat_length);
 	if (!compat_list) {
 		if (compat_length == -FDT_ERR_NOTFOUND) {
-			dm_dbg("Device '%s' has no compatible string\n", name);
+			pr_debug("Device '%s' has no compatible string\n",
+				 name);
 			return 0;
 		}
 
@@ -159,8 +160,8 @@ int lists_bind_fdt(struct udevice *parent, ofnode node, struct udevice **devp)
 	 */
 	for (i = 0; i < compat_length; i += strlen(compat) + 1) {
 		compat = compat_list + i;
-		dm_dbg("   - attempt to match compatible string '%s'\n",
-		       compat);
+		pr_debug("   - attempt to match compatible string '%s'\n",
+			 compat);
 
 		for (entry = driver; entry != driver + n_ents; entry++) {
 			ret = driver_check_compatible(entry->of_match, &id,
@@ -171,11 +172,11 @@ int lists_bind_fdt(struct udevice *parent, ofnode node, struct udevice **devp)
 		if (entry == driver + n_ents)
 			continue;
 
-		dm_dbg("   - found match at '%s'\n", entry->name);
+		pr_debug("   - found match at '%s'\n", entry->name);
 		ret = device_bind_with_driver_data(parent, entry, name,
 						   id->data, node, &dev);
 		if (ret == -ENODEV) {
-			dm_dbg("Driver '%s' refuses to bind\n", entry->name);
+			pr_debug("Driver '%s' refuses to bind\n", entry->name);
 			continue;
 		}
 		if (ret) {
@@ -191,7 +192,7 @@ int lists_bind_fdt(struct udevice *parent, ofnode node, struct udevice **devp)
 	}
 
 	if (!found && !result && ret != -ENODEV)
-		dm_dbg("No match for node '%s'\n", name);
+		pr_debug("No match for node '%s'\n", name);
 
 	return result;
 }
diff --git a/drivers/core/root.c b/drivers/core/root.c
index 757d109e57..976e2c4fdd 100644
--- a/drivers/core/root.c
+++ b/drivers/core/root.c
@@ -227,7 +227,7 @@ static int dm_scan_fdt_live(struct udevice *parent,
 		    !of_find_property(np, "u-boot,dm-pre-reloc", NULL))
 			continue;
 		if (!of_device_is_available(np)) {
-			dm_dbg("   - ignoring disabled device\n");
+			pr_debug("   - ignoring disabled device\n");
 			continue;
 		}
 		err = lists_bind_fdt(parent, np_to_ofnode(np), NULL);
@@ -270,7 +270,7 @@ static int dm_scan_fdt_node(struct udevice *parent, const void *blob,
 		    !dm_fdt_pre_reloc(blob, offset))
 			continue;
 		if (!fdtdec_get_is_enabled(blob, offset)) {
-			dm_dbg("   - ignoring disabled device\n");
+			pr_debug("   - ignoring disabled device\n");
 			continue;
 		}
 		err = lists_bind_fdt(parent, offset_to_ofnode(offset), NULL);
diff --git a/drivers/core/util.c b/drivers/core/util.c
index 2e232d57a1..aaaed4ec02 100644
--- a/drivers/core/util.c
+++ b/drivers/core/util.c
@@ -20,17 +20,6 @@ void dm_warn(const char *fmt, ...)
 }
 #endif
 
-#ifdef DEBUG
-void dm_dbg(const char *fmt, ...)
-{
-	va_list args;
-
-	va_start(args, fmt);
-	vprintf(fmt, args);
-	va_end(args);
-}
-#endif
-
 int list_count_items(struct list_head *head)
 {
 	struct list_head *node;
diff --git a/include/dm/util.h b/include/dm/util.h
index 45529ce0e6..0d4ce8f4e6 100644
--- a/include/dm/util.h
+++ b/include/dm/util.h
@@ -15,14 +15,6 @@ static inline void dm_warn(const char *fmt, ...)
 }
 #endif
 
-#ifdef DEBUG
-void dm_dbg(const char *fmt, ...);
-#else
-static inline void dm_dbg(const char *fmt, ...)
-{
-}
-#endif
-
 struct list_head;
 
 /**

commit d4496ef3da203f7bd32cf5d6b845f9d734bbebbc
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Fri Sep 29 10:35:17 2017 +0900

    UPSTREAM: linux/bitfield.h: import <linux/bitfield.h> from Linux 4.13
    
    Copied from Linux 4.13.
    
    Commit log of 3e9b3112ec74 of Linux explains well why this header
    is useful.
    
    Change-Id: I6d565317c573e01eb5df2af5a24982db049e8e08
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 6990e91f0971b877cd636e646f93587b1afbb284)

diff --git a/include/linux/bitfield.h b/include/linux/bitfield.h
new file mode 100644
index 0000000000..8b9d6fff00
--- /dev/null
+++ b/include/linux/bitfield.h
@@ -0,0 +1,106 @@
+/*
+ * Copyright (C) 2014 Felix Fietkau <nbd@nbd.name>
+ * Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _LINUX_BITFIELD_H
+#define _LINUX_BITFIELD_H
+
+#include <linux/bug.h>
+
+/*
+ * Bitfield access macros
+ *
+ * FIELD_{GET,PREP} macros take as first parameter shifted mask
+ * from which they extract the base mask and shift amount.
+ * Mask must be a compilation time constant.
+ *
+ * Example:
+ *
+ *  #define REG_FIELD_A  GENMASK(6, 0)
+ *  #define REG_FIELD_B  BIT(7)
+ *  #define REG_FIELD_C  GENMASK(15, 8)
+ *  #define REG_FIELD_D  GENMASK(31, 16)
+ *
+ * Get:
+ *  a = FIELD_GET(REG_FIELD_A, reg);
+ *  b = FIELD_GET(REG_FIELD_B, reg);
+ *
+ * Set:
+ *  reg = FIELD_PREP(REG_FIELD_A, 1) |
+ *	  FIELD_PREP(REG_FIELD_B, 0) |
+ *	  FIELD_PREP(REG_FIELD_C, c) |
+ *	  FIELD_PREP(REG_FIELD_D, 0x40);
+ *
+ * Modify:
+ *  reg &= ~REG_FIELD_C;
+ *  reg |= FIELD_PREP(REG_FIELD_C, c);
+ */
+
+#define __bf_shf(x) (__builtin_ffsll(x) - 1)
+
+#define __BF_FIELD_CHECK(_mask, _reg, _val, _pfx)			\
+	({								\
+		BUILD_BUG_ON_MSG(!__builtin_constant_p(_mask),		\
+				 _pfx "mask is not constant");		\
+		BUILD_BUG_ON_MSG(!(_mask), _pfx "mask is zero");	\
+		BUILD_BUG_ON_MSG(__builtin_constant_p(_val) ?		\
+				 ~((_mask) >> __bf_shf(_mask)) & (_val) : 0, \
+				 _pfx "value too large for the field"); \
+		BUILD_BUG_ON_MSG((_mask) > (typeof(_reg))~0ull,		\
+				 _pfx "type of reg too small for mask"); \
+		__BUILD_BUG_ON_NOT_POWER_OF_2((_mask) +			\
+					      (1ULL << __bf_shf(_mask))); \
+	})
+
+/**
+ * FIELD_FIT() - check if value fits in the field
+ * @_mask: shifted mask defining the field's length and position
+ * @_val:  value to test against the field
+ *
+ * Return: true if @_val can fit inside @_mask, false if @_val is too big.
+ */
+#define FIELD_FIT(_mask, _val)						\
+	({								\
+		__BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_FIT: ");	\
+		!((((typeof(_mask))_val) << __bf_shf(_mask)) & ~(_mask)); \
+	})
+
+/**
+ * FIELD_PREP() - prepare a bitfield element
+ * @_mask: shifted mask defining the field's length and position
+ * @_val:  value to put in the field
+ *
+ * FIELD_PREP() masks and shifts up the value.  The result should
+ * be combined with other fields of the bitfield using logical OR.
+ */
+#define FIELD_PREP(_mask, _val)						\
+	({								\
+		__BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_PREP: ");	\
+		((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask);	\
+	})
+
+/**
+ * FIELD_GET() - extract a bitfield element
+ * @_mask: shifted mask defining the field's length and position
+ * @_reg:  32bit value of entire bitfield
+ *
+ * FIELD_GET() extracts the field specified by @_mask from the
+ * bitfield passed in as @_reg by masking and shifting it down.
+ */
+#define FIELD_GET(_mask, _reg)						\
+	({								\
+		__BF_FIELD_CHECK(_mask, _reg, 0U, "FIELD_GET: ");	\
+		(typeof(_mask))(((_reg) & (_mask)) >> __bf_shf(_mask));	\
+	})
+
+#endif

commit 8f1ef3f5361c9bdaf16939e3a5617d3a8865d995
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Tue Sep 26 11:58:29 2017 +0900

    UPSTREAM: dm: define dev_*() log functions in DM header
    
    Many drivers had started to use dev_err, dev_info, etc. for log
    functions.  Currently, we are relying on <linux/compat.h>, but I
    guess the best home is <dm/device.h>, taking into account that
    Linux defines them in <linux/device.h>.
    
    For now, I am leaving the ones in <linux/compat.h> because lots of
    Linux-originated code uses dev_*(), but the first argument is not
    struct udevice, so we need to ignore the bogus argument.  More
    efforts are needed to iron out the issues.
    
    Change-Id: I18f67bd63ac22d8b69bdf8e0558600c58e8703d2
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit c898cba41e94fa87c57d71911fb812cd34c7a91e)

diff --git a/include/dm/device.h b/include/dm/device.h
index 4866f7c002..813e49f330 100644
--- a/include/dm/device.h
+++ b/include/dm/device.h
@@ -18,6 +18,7 @@
 #include <linux/compat.h>
 #include <linux/kernel.h>
 #include <linux/list.h>
+#include <linux/printk.h>
 
 struct driver_info;
 
@@ -879,4 +880,75 @@ static inline void devm_kfree(struct udevice *dev, void *ptr)
 
 #endif /* ! CONFIG_DEVRES */
 
+/*
+ * REVISIT:
+ * remove the following after resolving conflicts with <linux/compat.h>
+ */
+#ifdef dev_dbg
+#undef dev_dbg
+#endif
+#ifdef dev_vdbg
+#undef dev_vdbg
+#endif
+#ifdef dev_info
+#undef dev_info
+#endif
+#ifdef dev_err
+#undef dev_err
+#endif
+#ifdef dev_warn
+#undef dev_warn
+#endif
+
+/*
+ * REVISIT:
+ * print device name like Linux
+ */
+#define dev_printk(dev, fmt, ...)				\
+({								\
+	printk(fmt, ##__VA_ARGS__);				\
+})
+
+#define __dev_printk(level, dev, fmt, ...)			\
+({								\
+	if (level < CONFIG_VAL(LOGLEVEL))			\
+		dev_printk(dev, fmt, ##__VA_ARGS__);		\
+})
+
+#define dev_emerg(dev, fmt, ...) \
+	__dev_printk(0, dev, fmt, ##__VA_ARGS__)
+#define dev_alert(dev, fmt, ...) \
+	__dev_printk(1, dev, fmt, ##__VA_ARGS__)
+#define dev_crit(dev, fmt, ...) \
+	__dev_printk(2, dev, fmt, ##__VA_ARGS__)
+#define dev_err(dev, fmt, ...) \
+	__dev_printk(3, dev, fmt, ##__VA_ARGS__)
+#define dev_warn(dev, fmt, ...) \
+	__dev_printk(4, dev, fmt, ##__VA_ARGS__)
+#define dev_notice(dev, fmt, ...) \
+	__dev_printk(5, dev, fmt, ##__VA_ARGS__)
+#define dev_info(dev, fmt, ...) \
+	__dev_printk(6, dev, fmt, ##__VA_ARGS__)
+
+#ifdef DEBUG
+#define dev_dbg(dev, fmt, ...) \
+	__dev_printk(7, dev, fmt, ##__VA_ARGS__)
+#else
+#define dev_dbg(dev, fmt, ...)					\
+({								\
+	if (0)							\
+		__dev_printk(7, dev, fmt, ##__VA_ARGS__);	\
+})
+#endif
+
+#ifdef VERBOSE_DEBUG
+#define dev_vdbg	dev_dbg
+#else
+#define dev_vdbg(dev, fmt, ...)					\
+({								\
+	if (0)							\
+		__dev_printk(7, dev, fmt, ##__VA_ARGS__);	\
+})
+#endif
+
 #endif
diff --git a/include/linux/compat.h b/include/linux/compat.h
index 1b3f089687..8711fe2b48 100644
--- a/include/linux/compat.h
+++ b/include/linux/compat.h
@@ -15,6 +15,23 @@ struct p_current{
 
 extern struct p_current *current;
 
+/* avoid conflict with <dm/device.h> */
+#ifdef dev_dbg
+#undef dev_dbg
+#endif
+#ifdef dev_vdbg
+#undef dev_vdbg
+#endif
+#ifdef dev_info
+#undef dev_info
+#endif
+#ifdef dev_err
+#undef dev_err
+#endif
+#ifdef dev_warn
+#undef dev_warn
+#endif
+
 #define dev_dbg(dev, fmt, args...)		\
 	debug(fmt, ##args)
 #define dev_vdbg(dev, fmt, args...)		\

commit 046a6e2a9a61bff4b9f6a37211dd4965faebf6c9
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Sat Sep 16 14:10:45 2017 +0900

    bug.h: move runtime BUG/WARN macros into <linux/bug.h>
    
    Collect runtime BUG/WARN into a self-contained header <linux/bug.h>
    to make these macros easier to use.
    
    Change-Id: If924684bdab99d2c8fe0b4b3755d0ee5291d11be
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 0a70fb4c1c180d6ad6cd4c1dcd3fae8c5d4dd62e)

diff --git a/drivers/usb/dwc3/linux-compat.h b/drivers/usb/dwc3/linux-compat.h
index 64db4ecc3c..5cbe377e3c 100644
--- a/drivers/usb/dwc3/linux-compat.h
+++ b/drivers/usb/dwc3/linux-compat.h
@@ -14,7 +14,6 @@
 
 #define WARN(val, format, arg...)	debug(format, ##arg)
 #define dev_WARN(dev, format, arg...)	debug(format, ##arg)
-#define WARN_ON_ONCE(val)		debug("Error %d\n", val)
 
 static inline size_t strlcat(char *dest, const char *src, size_t n)
 {
diff --git a/include/common.h b/include/common.h
index 4349c645bd..c010aff87d 100644
--- a/include/common.h
+++ b/include/common.h
@@ -23,6 +23,7 @@ typedef volatile unsigned char	vu_char;
 #include <time.h>
 #include <asm-offsets.h>
 #include <linux/bitops.h>
+#include <linux/bug.h>
 #include <linux/delay.h>
 #include <linux/types.h>
 #include <linux/printk.h>
@@ -95,14 +96,6 @@ void __assert_fail(const char *assertion, const char *file, unsigned line,
 # define static_assert _Static_assert
 #endif
 
-#ifndef BUG
-#define BUG() do { \
-	printf("BUG: failure at %s:%d/%s()!\n", __FILE__, __LINE__, __FUNCTION__); \
-	panic("BUG!"); \
-} while (0)
-#define BUG_ON(condition) do { if (unlikely((condition)!=0)) BUG(); } while(0)
-#endif /* BUG */
-
 #ifndef CONFIG_IRQ
 typedef void (interrupt_handler_t)(void *);
 #else
diff --git a/include/linux/bug.h b/include/linux/bug.h
index 133544ca46..f07bb716fc 100644
--- a/include/linux/bug.h
+++ b/include/linux/bug.h
@@ -1,6 +1,34 @@
 #ifndef _LINUX_BUG_H
 #define _LINUX_BUG_H
 
+#include <vsprintf.h> /* for panic() */
 #include <linux/build_bug.h>
+#include <linux/compiler.h>
+#include <linux/printk.h>
+
+#define BUG() do { \
+	printk("BUG at %s:%d/%s()!\n", __FILE__, __LINE__, __func__); \
+	panic("BUG!"); \
+} while (0)
+
+#define BUG_ON(condition) do { if (unlikely(condition)) BUG(); } while (0)
+
+#define WARN_ON(condition) ({						\
+	int __ret_warn_on = !!(condition);				\
+	if (unlikely(__ret_warn_on))					\
+		printk("WARNING at %s:%d/%s()!\n", __FILE__, __LINE__, __func__); \
+	unlikely(__ret_warn_on);					\
+})
+
+#define WARN_ON_ONCE(condition)	({				\
+	static bool __warned;					\
+	int __ret_warn_once = !!(condition);			\
+								\
+	if (unlikely(__ret_warn_once && !__warned)) {		\
+		__warned = true;				\
+		WARN_ON(1);					\
+	}							\
+	unlikely(__ret_warn_once);				\
+})
 
 #endif	/* _LINUX_BUG_H */
diff --git a/include/linux/compat.h b/include/linux/compat.h
index bc027adcb9..1b3f089687 100644
--- a/include/linux/compat.h
+++ b/include/linux/compat.h
@@ -87,21 +87,6 @@ static inline void kmem_cache_destroy(struct kmem_cache *cachep)
 
 #define KERNEL_VERSION(a,b,c)	(((a) << 16) + ((b) << 8) + (c))
 
-#ifndef BUG
-#define BUG() do { \
-	printf("U-Boot BUG at %s:%d!\n", __FILE__, __LINE__); \
-} while (0)
-
-#define BUG_ON(condition) do { if (condition) BUG(); } while(0)
-#endif /* BUG */
-
-#define WARN_ON(condition) ({						\
-	int __ret_warn_on = !!(condition);				\
-	if (unlikely(__ret_warn_on))					\
-		printf("WARNING in %s line %d\n", __FILE__, __LINE__);	\
-	unlikely(__ret_warn_on);					\
-})
-
 #define PAGE_SIZE	4096
 
 /* drivers/char/random.c */

commit d9b1ff81445a766d905aa17bdbd6258c5c5ab146
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Sat Sep 16 14:10:44 2017 +0900

    UPSTREAM: bug.h: sync BUILD_BUG stuff with Linux 4.13
    
    As commit 84b8bf6d5d2a ("bug.h: move BUILD_BUG_* defines to
    include/linux/bug.h") noted, include/linux/bug.h was locally
    modified for U-Boot because the name conflict of error() caused
    build errors at that time.
    
    Now error() is gone, so we can fully sync BUILD_BUG* with Linux.
    These macros are just compile-time utilities.  Nothing depends on
    platform code, so it should make sense to simply copy Linux's ones.
    
    Please note Linux split BUILD_BUG stuff out into <linux/build_bug.h>
    by commit bc6245e5efd7.  Let's follow it.
    
    Change-Id: Iea5d4f8a69203f9b7c6cd12bdda5eb5b3f691830
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 059a48096c883e98bc1a4a561abc0069f44cbfea)

diff --git a/include/linux/bug.h b/include/linux/bug.h
index 920e3796c3..133544ca46 100644
--- a/include/linux/bug.h
+++ b/include/linux/bug.h
@@ -1,55 +1,6 @@
 #ifndef _LINUX_BUG_H
 #define _LINUX_BUG_H
 
-#include <linux/compiler.h>
-
-#ifdef __CHECKER__
-#define BUILD_BUG_ON_NOT_POWER_OF_2(n) (0)
-#define BUILD_BUG_ON_ZERO(e) (0)
-#define BUILD_BUG_ON_NULL(e) ((void*)0)
-#define BUILD_BUG_ON_INVALID(e) (0)
-#define BUILD_BUG_ON(condition) (0)
-#define BUILD_BUG() (0)
-#else /* __CHECKER__ */
-
-/* Force a compilation error if a constant expression is not a power of 2 */
-#define BUILD_BUG_ON_NOT_POWER_OF_2(n)			\
-	BUILD_BUG_ON((n) == 0 || (((n) & ((n) - 1)) != 0))
-
-/* Force a compilation error if condition is true, but also produce a
-   result (of value 0 and type size_t), so the expression can be used
-   e.g. in a structure initializer (or where-ever else comma expressions
-   aren't permitted). */
-#define BUILD_BUG_ON_ZERO(e) (sizeof(struct { int:-!!(e); }))
-#define BUILD_BUG_ON_NULL(e) ((void *)sizeof(struct { int:-!!(e); }))
-
-/*
- * BUILD_BUG_ON_INVALID() permits the compiler to check the validity of the
- * expression but avoids the generation of any code, even if that expression
- * has side-effects.
- */
-#define BUILD_BUG_ON_INVALID(e) ((void)(sizeof((__force long)(e))))
-
-/**
- * BUILD_BUG_ON - break compile if a condition is true.
- * @condition: the condition which the compiler should know is false.
- *
- * If you have some code which relies on certain constants being equal, or
- * some other compile-time-evaluated condition, you should use BUILD_BUG_ON to
- * detect if someone changes it.
- *
- * The implementation uses gcc's reluctance to create a negative array, but gcc
- * (as of 4.4) only emits that error for obvious cases (e.g. not arguments to
- * inline functions).  Luckily, in 4.3 they added the "error" function
- * attribute just for this type of case.  Thus, we use a negative sized array
- * (should always create an error on gcc versions older than 4.4) and then call
- * an undefined function with the error attribute (should always create an
- * error on gcc 4.3 and later).  If for some reason, neither creates a
- * compile-time error, we'll still have a link-time error, which is harder to
- * track down.
- */
-#define BUILD_BUG_ON(condition) ((void)sizeof(char[1 - 2*!!(condition)]))
-
-#endif	/* __CHECKER__ */
+#include <linux/build_bug.h>
 
 #endif	/* _LINUX_BUG_H */
diff --git a/include/linux/build_bug.h b/include/linux/build_bug.h
new file mode 100644
index 0000000000..b7d22d6000
--- /dev/null
+++ b/include/linux/build_bug.h
@@ -0,0 +1,84 @@
+#ifndef _LINUX_BUILD_BUG_H
+#define _LINUX_BUILD_BUG_H
+
+#include <linux/compiler.h>
+
+#ifdef __CHECKER__
+#define __BUILD_BUG_ON_NOT_POWER_OF_2(n) (0)
+#define BUILD_BUG_ON_NOT_POWER_OF_2(n) (0)
+#define BUILD_BUG_ON_ZERO(e) (0)
+#define BUILD_BUG_ON_NULL(e) ((void *)0)
+#define BUILD_BUG_ON_INVALID(e) (0)
+#define BUILD_BUG_ON_MSG(cond, msg) (0)
+#define BUILD_BUG_ON(condition) (0)
+#define BUILD_BUG() (0)
+#else /* __CHECKER__ */
+
+/* Force a compilation error if a constant expression is not a power of 2 */
+#define __BUILD_BUG_ON_NOT_POWER_OF_2(n)	\
+	BUILD_BUG_ON(((n) & ((n) - 1)) != 0)
+#define BUILD_BUG_ON_NOT_POWER_OF_2(n)			\
+	BUILD_BUG_ON((n) == 0 || (((n) & ((n) - 1)) != 0))
+
+/*
+ * Force a compilation error if condition is true, but also produce a
+ * result (of value 0 and type size_t), so the expression can be used
+ * e.g. in a structure initializer (or where-ever else comma expressions
+ * aren't permitted).
+ */
+#define BUILD_BUG_ON_ZERO(e) (sizeof(struct { int:(-!!(e)); }))
+#define BUILD_BUG_ON_NULL(e) ((void *)sizeof(struct { int:(-!!(e)); }))
+
+/*
+ * BUILD_BUG_ON_INVALID() permits the compiler to check the validity of the
+ * expression but avoids the generation of any code, even if that expression
+ * has side-effects.
+ */
+#define BUILD_BUG_ON_INVALID(e) ((void)(sizeof((__force long)(e))))
+
+/**
+ * BUILD_BUG_ON_MSG - break compile if a condition is true & emit supplied
+ *		      error message.
+ * @condition: the condition which the compiler should know is false.
+ *
+ * See BUILD_BUG_ON for description.
+ */
+#define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg)
+
+/**
+ * BUILD_BUG_ON - break compile if a condition is true.
+ * @condition: the condition which the compiler should know is false.
+ *
+ * If you have some code which relies on certain constants being equal, or
+ * some other compile-time-evaluated condition, you should use BUILD_BUG_ON to
+ * detect if someone changes it.
+ *
+ * The implementation uses gcc's reluctance to create a negative array, but gcc
+ * (as of 4.4) only emits that error for obvious cases (e.g. not arguments to
+ * inline functions).  Luckily, in 4.3 they added the "error" function
+ * attribute just for this type of case.  Thus, we use a negative sized array
+ * (should always create an error on gcc versions older than 4.4) and then call
+ * an undefined function with the error attribute (should always create an
+ * error on gcc 4.3 and later).  If for some reason, neither creates a
+ * compile-time error, we'll still have a link-time error, which is harder to
+ * track down.
+ */
+#ifndef __OPTIMIZE__
+#define BUILD_BUG_ON(condition) ((void)sizeof(char[1 - 2*!!(condition)]))
+#else
+#define BUILD_BUG_ON(condition) \
+	BUILD_BUG_ON_MSG(condition, "BUILD_BUG_ON failed: " #condition)
+#endif
+
+/**
+ * BUILD_BUG - break compile if used.
+ *
+ * If you have some code that you expect the compiler to eliminate at
+ * build time, you should use BUILD_BUG to detect if it is
+ * unexpectedly used.
+ */
+#define BUILD_BUG() BUILD_BUG_ON_MSG(1, "BUILD_BUG failed")
+
+#endif	/* __CHECKER__ */
+
+#endif	/* _LINUX_BUILD_BUG_H */
diff --git a/include/linux/compiler.h b/include/linux/compiler.h
index 020ad16a04..0ea6c8fcca 100644
--- a/include/linux/compiler.h
+++ b/include/linux/compiler.h
@@ -476,7 +476,8 @@ static __always_inline void __write_once_size(volatile void *p, void *res, int s
 # define __compiletime_error_fallback(condition) do { } while (0)
 #endif
 
-#define __compiletime_assert(condition, msg, prefix, suffix)		\
+#ifdef __OPTIMIZE__
+# define __compiletime_assert(condition, msg, prefix, suffix)		\
 	do {								\
 		bool __cond = !(condition);				\
 		extern void prefix ## suffix(void) __compiletime_error(msg); \
@@ -484,6 +485,9 @@ static __always_inline void __write_once_size(volatile void *p, void *res, int s
 			prefix ## suffix();				\
 		__compiletime_error_fallback(__cond);			\
 	} while (0)
+#else
+# define __compiletime_assert(condition, msg, prefix, suffix) do { } while (0)
+#endif
 
 #define _compiletime_assert(condition, msg, prefix, suffix) \
 	__compiletime_assert(condition, msg, prefix, suffix)

commit 3edc36741c7468688fa4f13e2f8c22ace27a8e21
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Sat Sep 16 14:10:43 2017 +0900

    UPSTREAM: vsprintf.h: include <linux/types.h>
    
    This header uses ulong, size_t, loff_t.
    Include <linux/types.h> to make this header self-contained.
    
    Change-Id: I810a1ca02d6220826d7c457c7ae6e2d0ecece232
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit f7d6b896d641767e04409fc3abf05338b19d9109)

diff --git a/include/vsprintf.h b/include/vsprintf.h
index 490c96ca6d..33d05aa0c6 100644
--- a/include/vsprintf.h
+++ b/include/vsprintf.h
@@ -9,6 +9,7 @@
 #define __VSPRINTF_H
 
 #include <stdarg.h>
+#include <linux/types.h>
 
 ulong simple_strtoul(const char *cp, char **endp, unsigned int base);
 

commit 5b496fa1afac89cef06be4d8e01a972947c8af1c
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Sat Sep 16 14:10:42 2017 +0900

    common.h: remove error()
    
    This macro prevents us from using compiletime_error/assert defined
    in <linux/compiler.h>.
    
    Now we can remove it, then we will be able to import more BUILD_BUG
    macros from Linux.
    
    Change-Id: Ib744c3a718ac71a7d49d14d84cd075695c2c43d8
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 5a719f921871d852a83870b12158e00e8715647e)

diff --git a/include/common.h b/include/common.h
index 9719b55c68..4349c645bd 100644
--- a/include/common.h
+++ b/include/common.h
@@ -90,11 +90,6 @@ void __assert_fail(const char *assertion, const char *file, unsigned line,
 	({ if (!(x) && _DEBUG) \
 		__assert_fail(#x, __FILE__, __LINE__, __func__); })
 
-#define error(fmt, args...) do {					\
-		printf("ERROR: " pr_fmt(fmt) "\nat %s:%d/%s()\n",	\
-			##args, __FILE__, __LINE__, __func__);		\
-} while (0)
-
 #if (__STDC_VERSION__ >= 201112L) || defined(__cplusplus)
 # undef static_assert
 # define static_assert _Static_assert

commit 90aa625c9a9e1fb7a2f001fd8e50099bacaf92b8
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Sat Sep 16 14:10:41 2017 +0900

    treewide: replace with error() with pr_err()
    
    U-Boot widely uses error() as a bit noisier variant of printf().
    
    This macro causes name conflict with the following line in
    include/linux/compiler-gcc.h:
    
      # define __compiletime_error(message) __attribute__((error(message)))
    
    This prevents us from using __compiletime_error(), and makes it
    difficult to fully sync BUILD_BUG macros with Linux.  (Notice
    Linux's BUILD_BUG_ON_MSG is implemented by using compiletime_assert().)
    
    Let's convert error() into now treewide-available pr_err().
    
    Done with the help of Coccinelle, excluing tools/ directory.
    
    The semantic patch I used is as follows:
    
    // <smpl>
    @@@@
    -error
    +pr_err
     (...)
    // </smpl>
    
    Change-Id: I921807c1770d36a91e692c48ab477558bb2ed0b8
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    [trini: Re-run Coccinelle]
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 9b643e312d528f291966c1f30b0d90bf3b1d43dc)

diff --git a/arch/arm/mach-omap2/am33xx/board.c b/arch/arm/mach-omap2/am33xx/board.c
index 913a44ad64..ae86b69b9c 100644
--- a/arch/arm/mach-omap2/am33xx/board.c
+++ b/arch/arm/mach-omap2/am33xx/board.c
@@ -241,7 +241,7 @@ int arch_misc_init(void)
 #if defined(CONFIG_DM_ETH) && defined(CONFIG_USB_ETHER)
 	ret = usb_ether_init();
 	if (ret) {
-		error("USB ether init failed\n");
+		pr_err("USB ether init failed\n");
 		return ret;
 	}
 #endif
diff --git a/arch/arm/mach-omap2/utils.c b/arch/arm/mach-omap2/utils.c
index 0b0bf1837c..f2fafae2a1 100644
--- a/arch/arm/mach-omap2/utils.c
+++ b/arch/arm/mach-omap2/utils.c
@@ -87,13 +87,13 @@ static u32 omap_mmc_get_part_size(const char *part)
 
 	dev_desc = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV);
 	if (!dev_desc || dev_desc->type == DEV_TYPE_UNKNOWN) {
-		error("invalid mmc device\n");
+		pr_err("invalid mmc device\n");
 		return 0;
 	}
 
 	res = part_get_info_by_name(dev_desc, part, &info);
 	if (res < 0) {
-		error("cannot find partition: '%s'\n", part);
+		pr_err("cannot find partition: '%s'\n", part);
 		return 0;
 	}
 
diff --git a/arch/arm/mach-rockchip/rk3188-board.c b/arch/arm/mach-rockchip/rk3188-board.c
index 3d4aadebfe..88c03e85d2 100644
--- a/arch/arm/mach-rockchip/rk3188-board.c
+++ b/arch/arm/mach-rockchip/rk3188-board.c
@@ -28,7 +28,7 @@ int board_late_init(void)
 
 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 	if (IS_ERR(grf)) {
-		error("grf syscon returned %ld\n", PTR_ERR(grf));
+		pr_err("grf syscon returned %ld\n", PTR_ERR(grf));
 	} else {
 		/* enable noc remap to mimic legacy loaders */
 		rk_clrsetreg(&grf->soc_con0,
diff --git a/arch/arm/mach-rockchip/rk3368-board-spl.c b/arch/arm/mach-rockchip/rk3368-board-spl.c
index cabf344486..72d2c97d36 100644
--- a/arch/arm/mach-rockchip/rk3368-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3368-board-spl.c
@@ -38,13 +38,13 @@ void board_init_f(ulong dummy)
 	/* Set up our preloader console */
 	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
 	if (ret) {
-		error("%s: pinctrl init failed: %d\n", __func__, ret);
+		pr_err("%s: pinctrl init failed: %d\n", __func__, ret);
 		hang();
 	}
 
 	ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART0);
 	if (ret) {
-		error("%s: failed to set up console UART\n", __func__);
+		pr_err("%s: failed to set up console UART\n", __func__);
 		hang();
 	}
 
diff --git a/arch/arm/mach-socfpga/reset_manager_arria10.c b/arch/arm/mach-socfpga/reset_manager_arria10.c
index 66f1ec21f1..ae16897494 100644
--- a/arch/arm/mach-socfpga/reset_manager_arria10.c
+++ b/arch/arm/mach-socfpga/reset_manager_arria10.c
@@ -174,7 +174,7 @@ void socfpga_emac_manage_reset(ulong emacbase, u32 state)
 		emacmask = ALT_RSTMGR_PER0MODRST_EMAC2_SET_MSK;
 		break;
 	default:
-		error("emac base address unexpected! %lx", emacbase);
+		pr_err("emac base address unexpected! %lx", emacbase);
 		hang();
 		break;
 	}
diff --git a/arch/arm/mach-tegra/ivc.c b/arch/arm/mach-tegra/ivc.c
index cf6626fb12..dec7d90c5d 100644
--- a/arch/arm/mach-tegra/ivc.c
+++ b/arch/arm/mach-tegra/ivc.c
@@ -493,7 +493,7 @@ static int check_ivc_params(ulong qbase1, ulong qbase2, uint32_t nframes,
 	       (TEGRA_IVC_ALIGN - 1));
 
 	if ((uint64_t)nframes * (uint64_t)frame_size >= 0x100000000) {
-		error("tegra_ivc: nframes * frame_size overflows\n");
+		pr_err("tegra_ivc: nframes * frame_size overflows\n");
 		return -EINVAL;
 	}
 
@@ -503,12 +503,12 @@ static int check_ivc_params(ulong qbase1, ulong qbase2, uint32_t nframes,
 	 */
 	if ((qbase1 & (TEGRA_IVC_ALIGN - 1)) ||
 	    (qbase2 & (TEGRA_IVC_ALIGN - 1))) {
-		error("tegra_ivc: channel start not aligned\n");
+		pr_err("tegra_ivc: channel start not aligned\n");
 		return -EINVAL;
 	}
 
 	if (frame_size & (TEGRA_IVC_ALIGN - 1)) {
-		error("tegra_ivc: frame size not adequately aligned\n");
+		pr_err("tegra_ivc: frame size not adequately aligned\n");
 		return -EINVAL;
 	}
 
@@ -521,7 +521,7 @@ static int check_ivc_params(ulong qbase1, ulong qbase2, uint32_t nframes,
 	}
 
 	if (ret) {
-		error("tegra_ivc: queue regions overlap\n");
+		pr_err("tegra_ivc: queue regions overlap\n");
 		return ret;
 	}
 
diff --git a/arch/arm/mach-tegra/tegra124/xusb-padctl.c b/arch/arm/mach-tegra/tegra124/xusb-padctl.c
index d326a6ae57..bfc0ab8f10 100644
--- a/arch/arm/mach-tegra/tegra124/xusb-padctl.c
+++ b/arch/arm/mach-tegra/tegra124/xusb-padctl.c
@@ -137,7 +137,7 @@ static int tegra_xusb_padctl_disable(struct tegra_xusb_padctl *padctl)
 	u32 value;
 
 	if (padctl->enable == 0) {
-		error("unbalanced enable/disable");
+		pr_err("unbalanced enable/disable");
 		return 0;
 	}
 
diff --git a/arch/arm/mach-tegra/tegra186/nvtboot_mem.c b/arch/arm/mach-tegra/tegra186/nvtboot_mem.c
index 966cf9f1c4..5224ef641c 100644
--- a/arch/arm/mach-tegra/tegra186/nvtboot_mem.c
+++ b/arch/arm/mach-tegra/tegra186/nvtboot_mem.c
@@ -45,12 +45,12 @@ int dram_init(void)
 
 	node = fdt_path_offset(nvtboot_blob, "/memory");
 	if (node < 0) {
-		error("Can't find /memory node in nvtboot DTB");
+		pr_err("Can't find /memory node in nvtboot DTB");
 		hang();
 	}
 	prop = fdt_getprop(nvtboot_blob, node, "reg", &len);
 	if (!prop) {
-		error("Can't find /memory/reg property in nvtboot DTB");
+		pr_err("Can't find /memory/reg property in nvtboot DTB");
 		hang();
 	}
 
diff --git a/arch/arm/mach-tegra/tegra20/clock.c b/arch/arm/mach-tegra/tegra20/clock.c
index ec04cf5261..81fb1d840f 100644
--- a/arch/arm/mach-tegra/tegra20/clock.c
+++ b/arch/arm/mach-tegra/tegra20/clock.c
@@ -667,7 +667,7 @@ static int tegra_plle_train(void)
 	} while (--timeout);
 
 	if (timeout == 0) {
-		error("timeout waiting for PLLE to become ready");
+		pr_err("timeout waiting for PLLE to become ready");
 		return -ETIMEDOUT;
 	}
 
@@ -697,7 +697,7 @@ int tegra_plle_enable(void)
 	if ((value & PLLE_MISC_PLL_READY) == 0) {
 		err = tegra_plle_train();
 		if (err < 0) {
-			error("failed to train PLLE: %d", err);
+			pr_err("failed to train PLLE: %d", err);
 			return err;
 		}
 	}
@@ -726,7 +726,7 @@ int tegra_plle_enable(void)
 	} while (--timeout);
 
 	if (timeout == 0) {
-		error("timeout waiting for PLLE to lock");
+		pr_err("timeout waiting for PLLE to lock");
 		return -ETIMEDOUT;
 	}
 
diff --git a/arch/arm/mach-tegra/tegra210/xusb-padctl.c b/arch/arm/mach-tegra/tegra210/xusb-padctl.c
index bf85e075de..a3e3e378e1 100644
--- a/arch/arm/mach-tegra/tegra210/xusb-padctl.c
+++ b/arch/arm/mach-tegra/tegra210/xusb-padctl.c
@@ -125,7 +125,7 @@ static int tegra_xusb_padctl_disable(struct tegra_xusb_padctl *padctl)
 	u32 value;
 
 	if (padctl->enable == 0) {
-		error("unbalanced enable/disable");
+		pr_err("unbalanced enable/disable");
 		return 0;
 	}
 
diff --git a/arch/arm/mach-tegra/tegra30/clock.c b/arch/arm/mach-tegra/tegra30/clock.c
index 4fd8b8a3b1..282f34fb89 100644
--- a/arch/arm/mach-tegra/tegra30/clock.c
+++ b/arch/arm/mach-tegra/tegra30/clock.c
@@ -696,7 +696,7 @@ static int tegra_plle_train(void)
 	} while (--timeout);
 
 	if (timeout == 0) {
-		error("timeout waiting for PLLE to become ready");
+		pr_err("timeout waiting for PLLE to become ready");
 		return -ETIMEDOUT;
 	}
 
@@ -726,7 +726,7 @@ int tegra_plle_enable(void)
 	if ((value & PLLE_MISC_PLL_READY) == 0) {
 		err = tegra_plle_train();
 		if (err < 0) {
-			error("failed to train PLLE: %d", err);
+			pr_err("failed to train PLLE: %d", err);
 			return err;
 		}
 	}
@@ -772,7 +772,7 @@ int tegra_plle_enable(void)
 	} while (--timeout);
 
 	if (timeout == 0) {
-		error("timeout waiting for PLLE to lock");
+		pr_err("timeout waiting for PLLE to lock");
 		return -ETIMEDOUT;
 	}
 
diff --git a/arch/arm/mach-tegra/xusb-padctl-common.c b/arch/arm/mach-tegra/xusb-padctl-common.c
index abc18c03a5..c8a468a034 100644
--- a/arch/arm/mach-tegra/xusb-padctl-common.c
+++ b/arch/arm/mach-tegra/xusb-padctl-common.c
@@ -84,7 +84,7 @@ tegra_xusb_padctl_group_parse_dt(struct tegra_xusb_padctl *padctl,
 
 	len = ofnode_read_string_count(node, "nvidia,lanes");
 	if (len < 0) {
-		error("failed to parse \"nvidia,lanes\" property");
+		pr_err("failed to parse \"nvidia,lanes\" property");
 		return -EINVAL;
 	}
 
@@ -94,7 +94,7 @@ tegra_xusb_padctl_group_parse_dt(struct tegra_xusb_padctl *padctl,
 		ret = ofnode_read_string_index(node, "nvidia,lanes", i,
 					       &group->pins[i]);
 		if (ret) {
-			error("failed to read string from \"nvidia,lanes\" property");
+			pr_err("failed to read string from \"nvidia,lanes\" property");
 			return -EINVAL;
 		}
 	}
@@ -104,7 +104,7 @@ tegra_xusb_padctl_group_parse_dt(struct tegra_xusb_padctl *padctl,
 	ret = ofnode_read_string_index(node, "nvidia,function", 0,
 				       &group->func);
 	if (ret) {
-		error("failed to parse \"nvidia,func\" property");
+		pr_err("failed to parse \"nvidia,func\" property");
 		return -EINVAL;
 	}
 
@@ -157,14 +157,14 @@ tegra_xusb_padctl_group_apply(struct tegra_xusb_padctl *padctl,
 
 		lane = tegra_xusb_padctl_find_lane(padctl, group->pins[i]);
 		if (!lane) {
-			error("no lane for pin %s", group->pins[i]);
+			pr_err("no lane for pin %s", group->pins[i]);
 			continue;
 		}
 
 		func = tegra_xusb_padctl_lane_find_function(padctl, lane,
 							    group->func);
 		if (func < 0) {
-			error("function %s invalid for lane %s: %d",
+			pr_err("function %s invalid for lane %s: %d",
 			      group->func, lane->name, func);
 			continue;
 		}
@@ -206,7 +206,7 @@ tegra_xusb_padctl_config_apply(struct tegra_xusb_padctl *padctl,
 
 		err = tegra_xusb_padctl_group_apply(padctl, group);
 		if (err < 0) {
-			error("failed to apply group %s: %d",
+			pr_err("failed to apply group %s: %d",
 			      group->name, err);
 			continue;
 		}
@@ -232,7 +232,7 @@ tegra_xusb_padctl_config_parse_dt(struct tegra_xusb_padctl *padctl,
 
 		err = tegra_xusb_padctl_group_parse_dt(padctl, group, subnode);
 		if (err < 0) {
-			error("failed to parse group %s", group->name);
+			pr_err("failed to parse group %s", group->name);
 			return err;
 		}
 
@@ -250,7 +250,7 @@ static int tegra_xusb_padctl_parse_dt(struct tegra_xusb_padctl *padctl,
 
 	err = ofnode_read_resource(node, 0, &padctl->regs);
 	if (err < 0) {
-		error("registers not found");
+		pr_err("registers not found");
 		return err;
 	}
 
@@ -261,7 +261,7 @@ static int tegra_xusb_padctl_parse_dt(struct tegra_xusb_padctl *padctl,
 		err = tegra_xusb_padctl_config_parse_dt(padctl, config,
 							subnode);
 		if (err < 0) {
-			error("failed to parse entry %s: %d",
+			pr_err("failed to parse entry %s: %d",
 			      config->name, err);
 			continue;
 		}
@@ -289,7 +289,7 @@ int tegra_xusb_process_nodes(ofnode nodes[], unsigned int count,
 
 		err = tegra_xusb_padctl_parse_dt(&padctl, nodes[i]);
 		if (err < 0) {
-			error("failed to parse DT: %d", err);
+			pr_err("failed to parse DT: %d", err);
 			continue;
 		}
 
@@ -298,7 +298,7 @@ int tegra_xusb_process_nodes(ofnode nodes[], unsigned int count,
 
 		err = tegra_xusb_padctl_config_apply(&padctl, &padctl.config);
 		if (err < 0) {
-			error("failed to apply pinmux: %d", err);
+			pr_err("failed to apply pinmux: %d", err);
 			continue;
 		}
 
diff --git a/arch/x86/cpu/tangier/sdram.c b/arch/x86/cpu/tangier/sdram.c
index 5743077431..eae8d785df 100644
--- a/arch/x86/cpu/tangier/sdram.c
+++ b/arch/x86/cpu/tangier/sdram.c
@@ -39,7 +39,7 @@ static int sfi_table_check(struct sfi_table_header *sbh)
 		chksum += *pos++;
 
 	if (chksum)
-		error("sfi: Invalid checksum\n");
+		pr_err("sfi: Invalid checksum\n");
 
 	/* Checksum is OK if zero */
 	return chksum ? -EILSEQ : 0;
@@ -76,7 +76,7 @@ static struct sfi_table_simple *sfi_search_mmap(void)
 	/* Find SYST table */
 	sb = sfi_get_table_by_sig(SFI_BASE_ADDR, SFI_SIG_SYST);
 	if (!sb) {
-		error("sfi: failed to locate SYST table\n");
+		pr_err("sfi: failed to locate SYST table\n");
 		return NULL;
 	}
 
@@ -90,7 +90,7 @@ static struct sfi_table_simple *sfi_search_mmap(void)
 			return (struct sfi_table_simple *)sbh;
 	}
 
-	error("sfi: failed to locate SFI MMAP table\n");
+	pr_err("sfi: failed to locate SFI MMAP table\n");
 	return NULL;
 }
 
diff --git a/board/nvidia/jetson-tk1/jetson-tk1.c b/board/nvidia/jetson-tk1/jetson-tk1.c
index bd08a2eed4..c20da29a98 100644
--- a/board/nvidia/jetson-tk1/jetson-tk1.c
+++ b/board/nvidia/jetson-tk1/jetson-tk1.c
@@ -49,7 +49,7 @@ static int as3722_sd_enable(struct udevice *pmic, unsigned int sd)
 
 	err = pmic_clrsetbits(pmic, AS3722_SD_CONTROL, 0, 1 << sd);
 	if (err) {
-		error("failed to update SD control register: %d", err);
+		pr_err("failed to update SD control register: %d", err);
 		return err;
 	}
 
@@ -70,13 +70,13 @@ int tegra_pcie_board_init(void)
 
 	ret = as3722_sd_enable(dev, 4);
 	if (ret < 0) {
-		error("failed to enable SD4: %d\n", ret);
+		pr_err("failed to enable SD4: %d\n", ret);
 		return ret;
 	}
 
 	ret = as3722_sd_set_voltage(dev, 4, 0x24);
 	if (ret < 0) {
-		error("failed to set SD4 voltage: %d\n", ret);
+		pr_err("failed to set SD4 voltage: %d\n", ret);
 		return ret;
 	}
 
diff --git a/board/samsung/common/exynos5-dt.c b/board/samsung/common/exynos5-dt.c
index ae2a6e6bfa..0d17f30712 100644
--- a/board/samsung/common/exynos5-dt.c
+++ b/board/samsung/common/exynos5-dt.c
@@ -161,7 +161,7 @@ int board_usb_init(int index, enum usb_init_type init)
 		samsung_get_base_usb3_phy();
 
 	if (!phy) {
-		error("usb3 phy not supported");
+		pr_err("usb3 phy not supported");
 		return -ENODEV;
 	}
 
diff --git a/board/samsung/common/misc.c b/board/samsung/common/misc.c
index 4157349d02..eba25b7b98 100644
--- a/board/samsung/common/misc.c
+++ b/board/samsung/common/misc.c
@@ -457,7 +457,7 @@ void draw_logo(void)
 
 	addr = panel_info.logo_addr;
 	if (!addr) {
-		error("There is no logo data.");
+		pr_err("There is no logo data.");
 		return;
 	}
 
diff --git a/board/samsung/goni/goni.c b/board/samsung/goni/goni.c
index d0247ac257..debc4c57ff 100644
--- a/board/samsung/goni/goni.c
+++ b/board/samsung/goni/goni.c
@@ -102,7 +102,7 @@ int board_mmc_init(bd_t *bis)
 
 	ret = s5p_mmc_init(0, 4);
 	if (ret)
-		error("MMC: Failed to init MMC:0.\n");
+		pr_err("MMC: Failed to init MMC:0.\n");
 
 	/*
 	 * SD card (T_FLASH) detect and init
@@ -127,7 +127,7 @@ int board_mmc_init(bd_t *bis)
 
 		ret_sd = s5p_mmc_init(2, 4);
 		if (ret_sd)
-			error("MMC: Failed to init SD card (MMC:2).\n");
+			pr_err("MMC: Failed to init SD card (MMC:2).\n");
 	}
 
 	return ret & ret_sd;
diff --git a/board/samsung/odroid/odroid.c b/board/samsung/odroid/odroid.c
index e40a2f6e3a..0df96c1a3d 100644
--- a/board/samsung/odroid/odroid.c
+++ b/board/samsung/odroid/odroid.c
@@ -429,7 +429,7 @@ int exynos_power_init(void)
 	};
 
 	if (regulator_list_autoset(mmc_regulators, NULL, true))
-		error("Unable to init all mmc regulators");
+		pr_err("Unable to init all mmc regulators");
 
 	return 0;
 }
@@ -442,7 +442,7 @@ static int s5pc210_phy_control(int on)
 
 	ret = regulator_get_by_platname("VDD_UOTG_3.0V", &dev);
 	if (ret) {
-		error("Regulator get error: %d", ret);
+		pr_err("Regulator get error: %d", ret);
 		return ret;
 	}
 
@@ -487,25 +487,25 @@ int board_usb_init(int index, enum usb_init_type init)
 
 	ret = regulator_get_by_platname("VCC_P3V3_2.85V", &dev);
 	if (ret) {
-		error("Regulator get error: %d", ret);
+		pr_err("Regulator get error: %d", ret);
 		return ret;
 	}
 
 	ret = regulator_set_enable(dev, true);
 	if (ret) {
-		error("Regulator %s enable setting error: %d", dev->name, ret);
+		pr_err("Regulator %s enable setting error: %d", dev->name, ret);
 		return ret;
 	}
 
 	ret = regulator_set_value(dev, 750000);
 	if (ret) {
-		error("Regulator %s value setting error: %d", dev->name, ret);
+		pr_err("Regulator %s value setting error: %d", dev->name, ret);
 		return ret;
 	}
 
 	ret = regulator_set_value(dev, 3300000);
 	if (ret) {
-		error("Regulator %s value setting error: %d", dev->name, ret);
+		pr_err("Regulator %s value setting error: %d", dev->name, ret);
 		return ret;
 	}
 #endif
diff --git a/cmd/fastboot.c b/cmd/fastboot.c
index 3e24fa0bd2..ce5ac1e55b 100644
--- a/cmd/fastboot.c
+++ b/cmd/fastboot.c
@@ -27,7 +27,7 @@ static int do_fastboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 
 	if (!strcmp(argv[1], "udp")) {
 #ifndef CONFIG_UDP_FUNCTION_FASTBOOT
-		error("Fastboot UDP not enabled\n");
+		pr_err("Fastboot UDP not enabled\n");
 		return -1;
 #else
 		return do_fastboot_udp(cmdtp, flag, argc, argv);
@@ -38,7 +38,7 @@ static int do_fastboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 		return CMD_RET_USAGE;
 
 #ifndef CONFIG_USB_FUNCTION_FASTBOOT
-	error("Fastboot USB not enabled\n");
+	pr_err("Fastboot USB not enabled\n");
 	return -1;
 #else
 	usb_controller = argv[2];
@@ -46,7 +46,7 @@ static int do_fastboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 
 	ret = board_usb_init(controller_index, USB_INIT_DEVICE);
 	if (ret) {
-		error("USB init failed: %d", ret);
+		pr_err("USB init failed: %d", ret);
 		return CMD_RET_FAILURE;
 	}
 
diff --git a/cmd/nvedit.c b/cmd/nvedit.c
index f6213bd30f..b9628b2078 100644
--- a/cmd/nvedit.c
+++ b/cmd/nvedit.c
@@ -1143,7 +1143,7 @@ NXTARG:		;
 				H_MATCH_KEY | H_MATCH_IDENT,
 				&ptr, size, argc, argv);
 		if (len < 0) {
-			error("Cannot export environment: errno = %d\n", errno);
+			pr_err("Cannot export environment: errno = %d\n", errno);
 			return 1;
 		}
 		sprintf(buf, "%zX", (size_t)len);
@@ -1163,7 +1163,7 @@ NXTARG:		;
 			H_MATCH_KEY | H_MATCH_IDENT,
 			&res, ENV_SIZE, argc, argv);
 	if (len < 0) {
-		error("Cannot export environment: errno = %d\n", errno);
+		pr_err("Cannot export environment: errno = %d\n", errno);
 		return 1;
 	}
 
@@ -1298,7 +1298,7 @@ static int do_env_import(cmd_tbl_t *cmdtp, int flag,
 
 	if (himport_r(&env_htab, ptr, size, sep, del ? 0 : H_NOCLEAR,
 			crlf_is_lf, 0, NULL) == 0) {
-		error("Environment import failed: errno = %d\n", errno);
+		pr_err("Environment import failed: errno = %d\n", errno);
 		return 1;
 	}
 	gd->flags |= GD_FLG_ENV_READY;
diff --git a/cmd/regulator.c b/cmd/regulator.c
index 2ef5bc9a82..b605255180 100644
--- a/cmd/regulator.c
+++ b/cmd/regulator.c
@@ -71,7 +71,7 @@ static int curr_dev_and_platdata(struct udevice **devp,
 
 	*uc_pdata = dev_get_uclass_platdata(*devp);
 	if (!*uc_pdata) {
-		error("Regulator: %s - missing platform data!", currdev->name);
+		pr_err("Regulator: %s - missing platform data!", currdev->name);
 		return CMD_RET_FAILURE;
 	}
 
diff --git a/cmd/rockusb.c b/cmd/rockusb.c
index 1ffbb8fbae..e80194dfef 100644
--- a/cmd/rockusb.c
+++ b/cmd/rockusb.c
@@ -156,21 +156,21 @@ static int do_rkusb(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 	controller_index = (unsigned int)(simple_strtoul(
 				usb_controller,	NULL, 0));
 	if (board_usb_init(controller_index, USB_INIT_DEVICE)) {
-		error("Couldn't init USB controller.");
+		pr_err("Couldn't init USB controller.");
 		rc = CMD_RET_FAILURE;
 		goto cleanup_rkusb;
 	}
 
 	rc = fsg_init(g_rkusb->ums, g_rkusb->ums_cnt);
 	if (rc) {
-		error("fsg_init failed");
+		pr_err("fsg_init failed");
 		rc = CMD_RET_FAILURE;
 		goto cleanup_board;
 	}
 
 	rc = g_dnl_register("rkusb_ums_dnl");
 	if (rc) {
-		error("g_dnl_register failed");
+		pr_err("g_dnl_register failed");
 		rc = CMD_RET_FAILURE;
 		goto cleanup_board;
 	}
diff --git a/cmd/thordown.c b/cmd/thordown.c
index 436b7f5631..1bb5fc2ec2 100644
--- a/cmd/thordown.c
+++ b/cmd/thordown.c
@@ -33,7 +33,7 @@ int do_thor_down(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	int controller_index = simple_strtoul(usb_controller, NULL, 0);
 	ret = board_usb_init(controller_index, USB_INIT_DEVICE);
 	if (ret) {
-		error("USB init failed: %d", ret);
+		pr_err("USB init failed: %d", ret);
 		ret = CMD_RET_FAILURE;
 		goto exit;
 	}
@@ -42,14 +42,14 @@ int do_thor_down(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 
 	ret = thor_init();
 	if (ret) {
-		error("THOR DOWNLOAD failed: %d", ret);
+		pr_err("THOR DOWNLOAD failed: %d", ret);
 		ret = CMD_RET_FAILURE;
 		goto exit;
 	}
 
 	ret = thor_handle();
 	if (ret) {
-		error("THOR failed: %d", ret);
+		pr_err("THOR failed: %d", ret);
 		ret = CMD_RET_FAILURE;
 		goto exit;
 	}
diff --git a/cmd/tpm_test.c b/cmd/tpm_test.c
index 3306405948..37ad2ff33d 100644
--- a/cmd/tpm_test.c
+++ b/cmd/tpm_test.c
@@ -303,12 +303,12 @@ static int test_readonly(void)
 	index_0 += 1;
 	if (tpm_nv_write_value(INDEX0, (uint8_t *)&index_0, sizeof(index_0) !=
 		TPM_SUCCESS)) {
-		error("\tcould not write index 0\n");
+		pr_err("\tcould not write index 0\n");
 	}
 	tpm_nv_write_value_lock(INDEX0);
 	if (tpm_nv_write_value(INDEX0, (uint8_t *)&index_0, sizeof(index_0)) ==
 			TPM_SUCCESS)
-		error("\tindex 0 is not locked\n");
+		pr_err("\tindex 0 is not locked\n");
 
 	printf("\tdone\n");
 	return 0;
@@ -471,7 +471,7 @@ static int test_write_limit(void)
 		case TPM_MAXNVWRITES:
 			assert(i >= TPM_MAX_NV_WRITES_NOOWNER);
 		default:
-			error("\tunexpected error code %d (0x%x)\n",
+			pr_err("\tunexpected error code %d (0x%x)\n",
 			      result, result);
 		}
 	}
diff --git a/cmd/usb_gadget_sdp.c b/cmd/usb_gadget_sdp.c
index b1d8b2858e..ae4d73c125 100644
--- a/cmd/usb_gadget_sdp.c
+++ b/cmd/usb_gadget_sdp.c
@@ -28,13 +28,13 @@ static int do_sdp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 
 	ret = sdp_init(controller_index);
 	if (ret) {
-		error("SDP init failed: %d", ret);
+		pr_err("SDP init failed: %d", ret);
 		goto exit;
 	}
 
 	/* This command typically does not return but jumps to an image */
 	sdp_handle(controller_index);
-	error("SDP ended");
+	pr_err("SDP ended");
 
 exit:
 	g_dnl_unregister();
diff --git a/cmd/usb_mass_storage.c b/cmd/usb_mass_storage.c
index 3353f95c74..cfeecb7068 100644
--- a/cmd/usb_mass_storage.c
+++ b/cmd/usb_mass_storage.c
@@ -162,21 +162,21 @@ static int do_usb_mass_storage(cmd_tbl_t *cmdtp, int flag,
 	controller_index = (unsigned int)(simple_strtoul(
 				usb_controller,	NULL, 0));
 	if (board_usb_init(controller_index, USB_INIT_DEVICE)) {
-		error("Couldn't init USB controller.");
+		pr_err("Couldn't init USB controller.");
 		rc = CMD_RET_FAILURE;
 		goto cleanup_ums_init;
 	}
 
 	rc = fsg_init(ums, ums_count);
 	if (rc) {
-		error("fsg_init failed");
+		pr_err("fsg_init failed");
 		rc = CMD_RET_FAILURE;
 		goto cleanup_board;
 	}
 
 	rc = g_dnl_register("usb_dnl_ums");
 	if (rc) {
-		error("g_dnl_register failed");
+		pr_err("g_dnl_register failed");
 		rc = CMD_RET_FAILURE;
 		goto cleanup_board;
 	}
diff --git a/common/dfu.c b/common/dfu.c
index 546a1ab9b4..07dff317a6 100644
--- a/common/dfu.c
+++ b/common/dfu.c
@@ -26,13 +26,13 @@ int run_usb_dnl_gadget(int usbctrl_index, char *usb_dnl_gadget)
 
 	ret = board_usb_init(usbctrl_index, USB_INIT_DEVICE);
 	if (ret) {
-		error("board usb init failed\n");
+		pr_err("board usb init failed\n");
 		return CMD_RET_FAILURE;
 	}
 	g_dnl_clear_detach();
 	ret = g_dnl_register(usb_dnl_gadget);
 	if (ret) {
-		error("g_dnl_register failed");
+		pr_err("g_dnl_register failed");
 		return CMD_RET_FAILURE;
 	}
 
@@ -75,7 +75,7 @@ int run_usb_dnl_gadget(int usbctrl_index, char *usb_dnl_gadget)
 			ret = dfu_flush(dfu_get_defer_flush(), NULL, 0, 0);
 			dfu_set_defer_flush(NULL);
 			if (ret) {
-				error("Deferred dfu_flush() failed!");
+				pr_err("Deferred dfu_flush() failed!");
 				goto exit;
 			}
 		}
diff --git a/common/fb_mmc.c b/common/fb_mmc.c
index 0c655ac9fa..0a3c780ae3 100644
--- a/common/fb_mmc.c
+++ b/common/fb_mmc.c
@@ -110,7 +110,7 @@ static void write_raw_image(struct blk_desc *dev_desc, disk_partition_t *info,
 	blkcnt = lldiv(blkcnt, info->blksz);
 
 	if (blkcnt > info->size) {
-		error("too large for partition: '%s'\n", part_name);
+		pr_err("too large for partition: '%s'\n", part_name);
 		fastboot_fail("too large for partition", response);
 		return;
 	}
@@ -119,7 +119,7 @@ static void write_raw_image(struct blk_desc *dev_desc, disk_partition_t *info,
 
 	blks = fb_mmc_blk_write(dev_desc, info->start, blkcnt, buffer);
 	if (blks != blkcnt) {
-		error("failed writing to device %d\n", dev_desc->devnum);
+		pr_err("failed writing to device %d\n", dev_desc->devnum);
 		fastboot_fail("failed writing to device", response);
 		return;
 	}
@@ -152,7 +152,7 @@ static lbaint_t fb_mmc_get_boot_header(struct blk_desc *dev_desc,
 	sector_size = info->blksz;
 	hdr_sectors = DIV_ROUND_UP(sizeof(struct andr_img_hdr), sector_size);
 	if (hdr_sectors == 0) {
-		error("invalid number of boot sectors: 0");
+		pr_err("invalid number of boot sectors: 0");
 		fastboot_fail("invalid number of boot sectors: 0", response);
 		return 0;
 	}
@@ -160,7 +160,7 @@ static lbaint_t fb_mmc_get_boot_header(struct blk_desc *dev_desc,
 	/* Read the boot image header */
 	res = blk_dread(dev_desc, info->start, hdr_sectors, (void *)hdr);
 	if (res != hdr_sectors) {
-		error("cannot read header from boot partition");
+		pr_err("cannot read header from boot partition");
 		fastboot_fail("cannot read header from boot partition", response);
 		return 0;
 	}
@@ -168,7 +168,7 @@ static lbaint_t fb_mmc_get_boot_header(struct blk_desc *dev_desc,
 	/* Check boot header magic string */
 	res = android_image_check_header(hdr);
 	if (res != 0) {
-		error("bad boot image magic");
+		pr_err("bad boot image magic");
 		fastboot_fail("boot partition not initialized", response);
 		return 0;
 	}
@@ -207,7 +207,7 @@ static int fb_mmc_update_zimage(struct blk_desc *dev_desc,
 	/* Get boot partition info */
 	res = part_get_info_by_name(dev_desc, BOOT_PARTITION_NAME, &info);
 	if (res < 0) {
-		error("cannot find boot partition");
+		pr_err("cannot find boot partition");
 		fastboot_fail("cannot find boot partition", response);
 		return -1;
 	}
@@ -219,14 +219,14 @@ static int fb_mmc_update_zimage(struct blk_desc *dev_desc,
 	/* Read boot image header */
 	hdr_sectors = fb_mmc_get_boot_header(dev_desc, &info, hdr, response);
 	if (hdr_sectors == 0) {
-		error("unable to read boot image header");
+		pr_err("unable to read boot image header");
 		fastboot_fail("unable to read boot image header", response);
 		return -1;
 	}
 
 	/* Check if boot image has second stage in it (we don't support it) */
 	if (hdr->second_size > 0) {
-		error("moving second stage is not supported yet");
+		pr_err("moving second stage is not supported yet");
 		fastboot_fail("moving second stage is not supported yet", response);
 		return -1;
 	}
@@ -244,7 +244,7 @@ static int fb_mmc_update_zimage(struct blk_desc *dev_desc,
 	res = blk_dread(dev_desc, ramdisk_sector_start, ramdisk_sectors,
 			ramdisk_buffer);
 	if (res != ramdisk_sectors) {
-		error("cannot read ramdisk from boot partition");
+		pr_err("cannot read ramdisk from boot partition");
 		fastboot_fail("cannot read ramdisk from boot partition", response);
 		return -1;
 	}
@@ -253,7 +253,7 @@ static int fb_mmc_update_zimage(struct blk_desc *dev_desc,
 	hdr->kernel_size = download_bytes;
 	res = blk_dwrite(dev_desc, info.start, hdr_sectors, (void *)hdr);
 	if (res == 0) {
-		error("cannot writeback boot image header");
+		pr_err("cannot writeback boot image header");
 		fastboot_fail("cannot write back boot image header", response);
 		return -1;
 	}
@@ -265,7 +265,7 @@ static int fb_mmc_update_zimage(struct blk_desc *dev_desc,
 	res = blk_dwrite(dev_desc, kernel_sector_start, kernel_sectors,
 			 download_buffer);
 	if (res == 0) {
-		error("cannot write new kernel");
+		pr_err("cannot write new kernel");
 		fastboot_fail("cannot write new kernel", response);
 		return -1;
 	}
@@ -277,7 +277,7 @@ static int fb_mmc_update_zimage(struct blk_desc *dev_desc,
 	res = blk_dwrite(dev_desc, ramdisk_sector_start, ramdisk_sectors,
 			 ramdisk_buffer);
 	if (res == 0) {
-		error("cannot write back original ramdisk");
+		pr_err("cannot write back original ramdisk");
 		fastboot_fail("cannot write back original ramdisk", response);
 		return -1;
 	}
@@ -300,7 +300,7 @@ void fb_mmc_flash_write(const char *cmd, void *download_buffer,
 
 	dev_desc = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV);
 	if (!dev_desc || dev_desc->type == DEV_TYPE_UNKNOWN) {
-		error("invalid mmc device\n");
+		pr_err("invalid mmc device\n");
 		fastboot_fail("invalid mmc device", response);
 		return;
 	}
@@ -362,7 +362,7 @@ void fb_mmc_flash_write(const char *cmd, void *download_buffer,
 #endif
 
 	if (part_get_info_by_name_or_alias(dev_desc, cmd, &info) < 0) {
-		error("cannot find partition: '%s'\n", cmd);
+		pr_err("cannot find partition: '%s'\n", cmd);
 		fastboot_fail("cannot find partition", response);
 		return;
 	}
@@ -400,21 +400,21 @@ void fb_mmc_erase(const char *cmd, char *response)
 	struct mmc *mmc = find_mmc_device(CONFIG_FASTBOOT_FLASH_MMC_DEV);
 
 	if (mmc == NULL) {
-		error("invalid mmc device");
+		pr_err("invalid mmc device");
 		fastboot_fail("invalid mmc device", response);
 		return;
 	}
 
 	dev_desc = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV);
 	if (!dev_desc || dev_desc->type == DEV_TYPE_UNKNOWN) {
-		error("invalid mmc device");
+		pr_err("invalid mmc device");
 		fastboot_fail("invalid mmc device", response);
 		return;
 	}
 
 	ret = part_get_info_by_name_or_alias(dev_desc, cmd, &info);
 	if (ret < 0) {
-		error("cannot find partition: '%s'", cmd);
+		pr_err("cannot find partition: '%s'", cmd);
 		fastboot_fail("cannot find partition", response);
 		return;
 	}
@@ -433,7 +433,7 @@ void fb_mmc_erase(const char *cmd, char *response)
 
 	blks = fb_mmc_blk_write(dev_desc, blks_start, blks_size, NULL);
 	if (blks != blks_size) {
-		error("failed erasing from device %d", dev_desc->devnum);
+		pr_err("failed erasing from device %d", dev_desc->devnum);
 		fastboot_fail("failed erasing from device", response);
 		return;
 	}
diff --git a/common/fb_nand.c b/common/fb_nand.c
index 49c6023e74..c530623393 100644
--- a/common/fb_nand.c
+++ b/common/fb_nand.c
@@ -41,20 +41,20 @@ static int fb_nand_lookup(const char *partname,
 
 	ret = mtdparts_init();
 	if (ret) {
-		error("Cannot initialize MTD partitions\n");
+		pr_err("Cannot initialize MTD partitions\n");
 		fastboot_fail("cannot init mtdparts", response);
 		return ret;
 	}
 
 	ret = find_dev_and_part(partname, &dev, &pnum, part);
 	if (ret) {
-		error("cannot find partition: '%s'", partname);
+		pr_err("cannot find partition: '%s'", partname);
 		fastboot_fail("cannot find partition", response);
 		return ret;
 	}
 
 	if (dev->id->type != MTD_DEV_TYPE_NAND) {
-		error("partition '%s' is not stored on a NAND device",
+		pr_err("partition '%s' is not stored on a NAND device",
 		      partname);
 		fastboot_fail("not a NAND device", response);
 		return -EINVAL;
@@ -155,7 +155,7 @@ void fb_nand_flash_write(const char *cmd, void *download_buffer,
 
 	ret = fb_nand_lookup(cmd, &mtd, &part, response);
 	if (ret) {
-		error("invalid NAND device");
+		pr_err("invalid NAND device");
 		fastboot_fail("invalid NAND device", response);
 		return;
 	}
@@ -195,7 +195,7 @@ void fb_nand_flash_write(const char *cmd, void *download_buffer,
 	}
 
 	if (ret) {
-		fastboot_fail("error writing the image", response);
+		fastboot_fail("pr_err writing the image", response);
 		return;
 	}
 
@@ -210,7 +210,7 @@ void fb_nand_erase(const char *cmd, char *response)
 
 	ret = fb_nand_lookup(cmd, &mtd, &part, response);
 	if (ret) {
-		error("invalid NAND device");
+		pr_err("invalid NAND device");
 		fastboot_fail("invalid NAND device", response);
 		return;
 	}
@@ -221,7 +221,7 @@ void fb_nand_erase(const char *cmd, char *response)
 
 	ret = _fb_nand_erase(mtd, part);
 	if (ret) {
-		error("failed erasing from device %s", mtd->name);
+		pr_err("failed erasing from device %s", mtd->name);
 		fastboot_fail("failed erasing from device", response);
 		return;
 	}
diff --git a/common/spl/spl_dfu.c b/common/spl/spl_dfu.c
index 2c974735b1..05bb21035d 100644
--- a/common/spl/spl_dfu.c
+++ b/common/spl/spl_dfu.c
@@ -42,13 +42,13 @@ int spl_dfu_cmd(int usbctrl, char *dfu_alt_info, char *interface, char *devstr)
 	set_default_env(0);
 	str_env = env_get(dfu_alt_info);
 	if (!str_env) {
-		error("\"dfu_alt_info\" env variable not defined!\n");
+		pr_err("\"dfu_alt_info\" env variable not defined!\n");
 		return -EINVAL;
 	}
 
 	ret = env_set("dfu_alt_info", str_env);
 	if (ret) {
-		error("unable to set env variable \"dfu_alt_info\"!\n");
+		pr_err("unable to set env variable \"dfu_alt_info\"!\n");
 		return -EINVAL;
 	}
 
diff --git a/common/spl/spl_sdp.c b/common/spl/spl_sdp.c
index 350bcdb056..333d518f4d 100644
--- a/common/spl/spl_sdp.c
+++ b/common/spl/spl_sdp.c
@@ -24,13 +24,13 @@ static int spl_sdp_load_image(struct spl_image_info *spl_image,
 
 	ret = sdp_init(controller_index);
 	if (ret) {
-		error("SDP init failed: %d", ret);
+		pr_err("SDP init failed: %d", ret);
 		return -ENODEV;
 	}
 
 	/* This command typically does not return but jumps to an image */
 	sdp_handle(controller_index);
-	error("SDP ended");
+	pr_err("SDP ended");
 
 	return -EINVAL;
 }
diff --git a/common/update.c b/common/update.c
index 974f4655e7..33bffaa89e 100644
--- a/common/update.c
+++ b/common/update.c
@@ -242,7 +242,7 @@ int update_tftp(ulong addr, char *interface, char *devstring)
 	} else if (interface && devstring) {
 		update_tftp_dfu = true;
 	} else {
-		error("Interface: %s and devstring: %s not supported!\n",
+		pr_err("Interface: %s and devstring: %s not supported!\n",
 		      interface, devstring);
 		return -EINVAL;
 	}
diff --git a/disk/part_efi.c b/disk/part_efi.c
index 58bb3d5627..75d9d4fc50 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -360,7 +360,7 @@ static int set_protective_mbr(struct blk_desc *dev_desc)
 
 	/* Read MBR to backup boot code if it exists */
 	if (blk_dread(dev_desc, 0, 1, p_mbr) != 1) {
-		error("** Can't read from device %d **\n", dev_desc->devnum);
+		pr_err("** Can't read from device %d **\n", dev_desc->devnum);
 		return -1;
 	}
 
@@ -716,7 +716,7 @@ int gpt_verify_partitions(struct blk_desc *dev_desc,
 
 	for (i = 0; i < parts; i++) {
 		if (i == gpt_head->num_partition_entries) {
-			error("More partitions than allowed!\n");
+			pr_err("More partitions than allowed!\n");
 			return -1;
 		}
 
@@ -729,7 +729,7 @@ int gpt_verify_partitions(struct blk_desc *dev_desc,
 
 		if (strncmp(efi_str, (char *)partitions[i].name,
 			    sizeof(partitions->name))) {
-			error("Partition name: %s does not match %s!\n",
+			pr_err("Partition name: %s does not match %s!\n",
 			      efi_str, (char *)partitions[i].name);
 			return -1;
 		}
@@ -746,7 +746,7 @@ int gpt_verify_partitions(struct blk_desc *dev_desc,
 			if ((i == parts - 1) && (partitions[i].size == 0))
 				continue;
 
-			error("Partition %s size: %llu does not match %llu!\n",
+			pr_err("Partition %s size: %llu does not match %llu!\n",
 			      efi_str, (unsigned long long)gpt_part_size,
 			      (unsigned long long)partitions[i].size);
 			return -1;
@@ -767,7 +767,7 @@ int gpt_verify_partitions(struct blk_desc *dev_desc,
 		      (unsigned long long)partitions[i].start);
 
 		if (le64_to_cpu(gpt_e[i].starting_lba) != partitions[i].start) {
-			error("Partition %s start: %llu does not match %llu!\n",
+			pr_err("Partition %s start: %llu does not match %llu!\n",
 			      efi_str, le64_to_cpu(gpt_e[i].starting_lba),
 			      (unsigned long long)partitions[i].start);
 			return -1;
diff --git a/drivers/adc/adc-uclass.c b/drivers/adc/adc-uclass.c
index a5ef722d21..a4c20f4d35 100644
--- a/drivers/adc/adc-uclass.c
+++ b/drivers/adc/adc-uclass.c
@@ -64,7 +64,7 @@ static int adc_supply_enable(struct udevice *dev)
 	}
 
 	if (ret)
-		error("%s: can't enable %s-supply!", dev->name, supply_type);
+		pr_err("%s: can't enable %s-supply!", dev->name, supply_type);
 
 	return ret;
 }
@@ -389,12 +389,12 @@ static int adc_pre_probe(struct udevice *dev)
 	/* Set ADC VDD platdata: polarity, uV, regulator (phandle). */
 	ret = adc_vdd_platdata_set(dev);
 	if (ret)
-		error("%s: Can't update Vdd. Error: %d", dev->name, ret);
+		pr_err("%s: Can't update Vdd. Error: %d", dev->name, ret);
 
 	/* Set ADC VSS platdata: polarity, uV, regulator (phandle). */
 	ret = adc_vss_platdata_set(dev);
 	if (ret)
-		error("%s: Can't update Vss. Error: %d", dev->name, ret);
+		pr_err("%s: Can't update Vss. Error: %d", dev->name, ret);
 
 	return 0;
 }
diff --git a/drivers/adc/exynos-adc.c b/drivers/adc/exynos-adc.c
index 324d72f3a9..3bb065d215 100644
--- a/drivers/adc/exynos-adc.c
+++ b/drivers/adc/exynos-adc.c
@@ -22,7 +22,7 @@ int exynos_adc_channel_data(struct udevice *dev, int channel,
 	struct exynos_adc_v2 *regs = priv->regs;
 
 	if (channel != priv->active_channel) {
-		error("Requested channel is not active!");
+		pr_err("Requested channel is not active!");
 		return -EINVAL;
 	}
 
@@ -80,7 +80,7 @@ int exynos_adc_probe(struct udevice *dev)
 
 	/* Check HW version */
 	if (readl(&regs->version) != ADC_V2_VERSION) {
-		error("This driver supports only ADC v2!");
+		pr_err("This driver supports only ADC v2!");
 		return -ENXIO;
 	}
 
@@ -109,7 +109,7 @@ int exynos_adc_ofdata_to_platdata(struct udevice *dev)
 
 	priv->regs = (struct exynos_adc_v2 *)devfdt_get_addr(dev);
 	if (priv->regs == (struct exynos_adc_v2 *)FDT_ADDR_T_NONE) {
-		error("Dev: %s - can't get address!", dev->name);
+		pr_err("Dev: %s - can't get address!", dev->name);
 		return -ENODATA;
 	}
 
diff --git a/drivers/adc/rockchip-saradc.c b/drivers/adc/rockchip-saradc.c
index 0e6271d097..a2856db497 100644
--- a/drivers/adc/rockchip-saradc.c
+++ b/drivers/adc/rockchip-saradc.c
@@ -46,7 +46,7 @@ int rockchip_saradc_channel_data(struct udevice *dev, int channel,
 	struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
 
 	if (channel != priv->active_channel) {
-		error("Requested channel is not active!");
+		pr_err("Requested channel is not active!");
 		return -EINVAL;
 	}
 
@@ -69,7 +69,7 @@ int rockchip_saradc_start_channel(struct udevice *dev, int channel)
 	struct rockchip_saradc_priv *priv = dev_get_priv(dev);
 
 	if (channel < 0 || channel >= priv->data->num_channels) {
-		error("Requested channel is invalid!");
+		pr_err("Requested channel is invalid!");
 		return -EINVAL;
 	}
 
@@ -125,7 +125,7 @@ int rockchip_saradc_ofdata_to_platdata(struct udevice *dev)
 	data = (struct rockchip_saradc_data *)dev_get_driver_data(dev);
 	priv->regs = (struct rockchip_saradc_regs *)dev_read_addr(dev);
 	if (priv->regs == (struct rockchip_saradc_regs *)FDT_ADDR_T_NONE) {
-		error("Dev: %s - can't get address!", dev->name);
+		pr_err("Dev: %s - can't get address!", dev->name);
 		return -ENODATA;
 	}
 
diff --git a/drivers/adc/sandbox.c b/drivers/adc/sandbox.c
index 371892237a..80e8e3701a 100644
--- a/drivers/adc/sandbox.c
+++ b/drivers/adc/sandbox.c
@@ -61,7 +61,7 @@ int sandbox_adc_channel_data(struct udevice *dev, int channel,
 	/* For single-channel conversion mode, check if channel was selected */
 	if ((priv->conversion_mode == SANDBOX_ADC_MODE_SINGLE_CHANNEL) &&
 	    !(priv->active_channel_mask & (1 << channel))) {
-		error("Request for an inactive channel!");
+		pr_err("Request for an inactive channel!");
 		return -EINVAL;
 	}
 
@@ -82,12 +82,12 @@ int sandbox_adc_channels_data(struct udevice *dev, unsigned int channel_mask,
 
 	/* Return error for single-channel conversion mode */
 	if (priv->conversion_mode == SANDBOX_ADC_MODE_SINGLE_CHANNEL) {
-		error("ADC in single-channel mode!");
+		pr_err("ADC in single-channel mode!");
 		return -EPERM;
 	}
 	/* Check channel selection */
 	if (!(priv->active_channel_mask & channel_mask)) {
-		error("Request for an inactive channel!");
+		pr_err("Request for an inactive channel!");
 		return -EINVAL;
 	}
 	/* The conversion must be started before reading the data */
diff --git a/drivers/ata/dwc_ahci.c b/drivers/ata/dwc_ahci.c
index f6147989b1..b16304baed 100644
--- a/drivers/ata/dwc_ahci.c
+++ b/drivers/ata/dwc_ahci.c
@@ -58,19 +58,19 @@ static int dwc_ahci_probe(struct udevice *dev)
 
 	ret = generic_phy_get_by_name(dev, "sata-phy", &phy);
 	if (ret) {
-		error("can't get the phy from DT\n");
+		pr_err("can't get the phy from DT\n");
 		return ret;
 	}
 
 	ret = generic_phy_init(&phy);
 	if (ret) {
-		error("unable to initialize the sata phy\n");
+		pr_err("unable to initialize the sata phy\n");
 		return ret;
 	}
 
 	ret = generic_phy_power_on(&phy);
 	if (ret) {
-		error("unable to power on the sata phy\n");
+		pr_err("unable to power on the sata phy\n");
 		return ret;
 	}
 
diff --git a/drivers/clk/clk_boston.c b/drivers/clk/clk_boston.c
index 78f1b759d8..5c05e3d78d 100644
--- a/drivers/clk/clk_boston.c
+++ b/drivers/clk/clk_boston.c
@@ -67,13 +67,13 @@ static int clk_boston_ofdata_to_platdata(struct udevice *dev)
 	err = uclass_get_device_by_phandle(UCLASS_SYSCON, dev,
 					   "regmap", &syscon);
 	if (err) {
-		error("unable to find syscon device\n");
+		pr_err("unable to find syscon device\n");
 		return err;
 	}
 
 	state->regmap = syscon_get_regmap(syscon);
 	if (!state->regmap) {
-		error("unable to find regmap\n");
+		pr_err("unable to find regmap\n");
 		return -ENODEV;
 	}
 
diff --git a/drivers/clk/clk_stm32f7.c b/drivers/clk/clk_stm32f7.c
index 255a583c95..ad3cafc49f 100644
--- a/drivers/clk/clk_stm32f7.c
+++ b/drivers/clk/clk_stm32f7.c
@@ -224,7 +224,7 @@ static unsigned long stm32_clk_get_rate(struct clk *clk)
 		return sysclk >>= shift;
 		break;
 	default:
-		error("clock index %ld out of range\n", clk->id);
+		pr_err("clock index %ld out of range\n", clk->id);
 		return -EINVAL;
 		break;
 	}
diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c
index b221013a82..1af10891fb 100644
--- a/drivers/clk/rockchip/clk_rk3368.c
+++ b/drivers/clk/rockchip/clk_rk3368.c
@@ -302,7 +302,7 @@ static ulong rk3368_ddr_set_clk(struct rk3368_cru *cru, ulong set_rate)
 		dpll_cfg = &dpll_1600;
 		break;
 	default:
-		error("Unsupported SDRAM frequency!,%ld\n", set_rate);
+		pr_err("Unsupported SDRAM frequency!,%ld\n", set_rate);
 	}
 	rkclk_set_pll(cru, DPLL, dpll_cfg);
 
@@ -360,7 +360,7 @@ static ulong rk3368_spi_get_clk(struct rk3368_cru *cru, ulong clk_id)
 		break;
 
 	default:
-		error("%s: SPI clk-id %ld not supported\n", __func__, clk_id);
+		pr_err("%s: SPI clk-id %ld not supported\n", __func__, clk_id);
 		return -EINVAL;
 	}
 
@@ -385,7 +385,7 @@ static ulong rk3368_spi_set_clk(struct rk3368_cru *cru, ulong clk_id, uint hz)
 		break;
 
 	default:
-		error("%s: SPI clk-id %ld not supported\n", __func__, clk_id);
+		pr_err("%s: SPI clk-id %ld not supported\n", __func__, clk_id);
 		return -EINVAL;
 	}
 
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index dc25c24520..25550a7429 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -585,7 +585,7 @@ static ulong rk3399_spi_get_clk(struct rk3399_cru *cru, ulong clk_id)
 		break;
 
 	default:
-		error("%s: SPI clk-id %ld not supported\n", __func__, clk_id);
+		pr_err("%s: SPI clk-id %ld not supported\n", __func__, clk_id);
 		return -EINVAL;
 	}
 
@@ -609,7 +609,7 @@ static ulong rk3399_spi_set_clk(struct rk3399_cru *cru, ulong clk_id, uint hz)
 		break;
 
 	default:
-		error("%s: SPI clk-id %ld not supported\n", __func__, clk_id);
+		pr_err("%s: SPI clk-id %ld not supported\n", __func__, clk_id);
 		return -EINVAL;
 	}
 
@@ -778,7 +778,7 @@ static ulong rk3399_ddr_set_clk(struct rk3399_cru *cru,
 		{.refdiv = 1, .fbdiv = 116, .postdiv1 = 3, .postdiv2 = 1};
 		break;
 	default:
-		error("Unsupported SDRAM frequency!,%ld\n", set_rate);
+		pr_err("Unsupported SDRAM frequency!,%ld\n", set_rate);
 	}
 	rkclk_set_pll(&cru->dpll_con[0], &dpll_cfg);
 
diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c
index ff732ac309..2c22b625b8 100644
--- a/drivers/dfu/dfu.c
+++ b/drivers/dfu/dfu.c
@@ -64,14 +64,14 @@ int dfu_init_env_entities(char *interface, char *devstr)
 #endif
 	str_env = env_get("dfu_alt_info");
 	if (!str_env) {
-		error("\"dfu_alt_info\" env variable not defined!\n");
+		pr_err("\"dfu_alt_info\" env variable not defined!\n");
 		return -EINVAL;
 	}
 
 	env_bkp = strdup(str_env);
 	ret = dfu_config_entities(env_bkp, interface, devstr);
 	if (ret) {
-		error("DFU entities configuration failed!\n");
+		pr_err("DFU entities configuration failed!\n");
 		return ret;
 	}
 
@@ -132,7 +132,7 @@ static char *dfu_get_hash_algo(void)
 		return s;
 	}
 
-	error("DFU hash method: %s not supported!\n", s);
+	pr_err("DFU hash method: %s not supported!\n", s);
 	return NULL;
 }
 
@@ -273,7 +273,7 @@ int dfu_write(struct dfu_entity *dfu, void *buf, int size, int blk_seq_num)
 
 	/* we should be in buffer now (if not then size too large) */
 	if ((dfu->i_buf + size) > dfu->i_buf_end) {
-		error("Buffer overflow! (0x%p + 0x%x > 0x%p)\n", dfu->i_buf,
+		pr_err("Buffer overflow! (0x%p + 0x%x > 0x%p)\n", dfu->i_buf,
 		      size, dfu->i_buf_end);
 		dfu_transaction_cleanup(dfu);
 		return -1;
@@ -451,7 +451,7 @@ int dfu_config_entities(char *env, char *interface, char *devstr)
 	if (s) {
 		ret = hash_lookup_algo(s, &dfu_hash_algo);
 		if (ret)
-			error("Hash algorithm %s not supported\n", s);
+			pr_err("Hash algorithm %s not supported\n", s);
 	}
 
 	dfu = calloc(sizeof(*dfu), dfu_alt_num);
@@ -576,7 +576,7 @@ int dfu_write_from_mem_addr(struct dfu_entity *dfu, void *buf, int size)
 		      dp, left, write);
 		ret = dfu_write(dfu, dp, write, i);
 		if (ret) {
-			error("DFU write failed\n");
+			pr_err("DFU write failed\n");
 			return ret;
 		}
 
@@ -586,7 +586,7 @@ int dfu_write_from_mem_addr(struct dfu_entity *dfu, void *buf, int size)
 
 	ret = dfu_flush(dfu, NULL, 0, i);
 	if (ret)
-		error("DFU flush failed!");
+		pr_err("DFU flush failed!");
 
 	return ret;
 }
diff --git a/drivers/dfu/dfu_mmc.c b/drivers/dfu/dfu_mmc.c
index 39e10b1a5a..47948d369d 100644
--- a/drivers/dfu/dfu_mmc.c
+++ b/drivers/dfu/dfu_mmc.c
@@ -29,7 +29,7 @@ static int mmc_block_op(enum dfu_op op, struct dfu_entity *dfu,
 
 	mmc = find_mmc_device(dfu->data.mmc.dev_num);
 	if (!mmc) {
-		error("Device MMC %d - not found!", dfu->data.mmc.dev_num);
+		pr_err("Device MMC %d - not found!", dfu->data.mmc.dev_num);
 		return -ENODEV;
 	}
 
@@ -69,11 +69,11 @@ static int mmc_block_op(enum dfu_op op, struct dfu_entity *dfu,
 			       buf);
 		break;
 	default:
-		error("Operation not supported\n");
+		pr_err("Operation not supported\n");
 	}
 
 	if (n != blk_count) {
-		error("MMC operation failed");
+		pr_err("MMC operation failed");
 		if (dfu->data.mmc.hw_partition >= 0)
 			blk_select_hwpart_devnum(IF_TYPE_MMC,
 						 dfu->data.mmc.dev_num,
@@ -312,7 +312,7 @@ int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *devstr, char *s)
 	for (; parg < argv + sizeof(argv) / sizeof(*argv); ++parg) {
 		*parg = strsep(&s, " ");
 		if (*parg == NULL) {
-			error("Invalid number of arguments.\n");
+			pr_err("Invalid number of arguments.\n");
 			return -ENODEV;
 		}
 	}
@@ -327,13 +327,13 @@ int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *devstr, char *s)
 
 	mmc = find_mmc_device(dfu->data.mmc.dev_num);
 	if (mmc == NULL) {
-		error("Couldn't find MMC device no. %d.\n",
+		pr_err("Couldn't find MMC device no. %d.\n",
 		      dfu->data.mmc.dev_num);
 		return -ENODEV;
 	}
 
 	if (mmc_init(mmc)) {
-		error("Couldn't init MMC device.\n");
+		pr_err("Couldn't init MMC device.\n");
 		return -ENODEV;
 	}
 
@@ -360,7 +360,7 @@ int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *devstr, char *s)
 		int mmcpart = third_arg;
 
 		if (part_get_info(blk_dev, mmcpart, &partinfo) != 0) {
-			error("Couldn't find part #%d on mmc device #%d\n",
+			pr_err("Couldn't find part #%d on mmc device #%d\n",
 			      mmcpart, mmcdev);
 			return -ENODEV;
 		}
@@ -374,7 +374,7 @@ int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *devstr, char *s)
 	} else if (!strcmp(entity_type, "ext4")) {
 		dfu->layout = DFU_FS_EXT4;
 	} else {
-		error("Memory layout (%s) not supported!\n", entity_type);
+		pr_err("Memory layout (%s) not supported!\n", entity_type);
 		return -ENODEV;
 	}
 
@@ -397,7 +397,7 @@ int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *devstr, char *s)
 		dfu_file_buf = memalign(CONFIG_SYS_CACHELINE_SIZE,
 					CONFIG_SYS_DFU_MAX_FILE_SIZE);
 		if (!dfu_file_buf) {
-			error("Could not memalign 0x%x bytes",
+			pr_err("Could not memalign 0x%x bytes",
 			      CONFIG_SYS_DFU_MAX_FILE_SIZE);
 			return -ENOMEM;
 		}
diff --git a/drivers/dfu/dfu_ram.c b/drivers/dfu/dfu_ram.c
index 6e3f5316f5..2b5e05a913 100644
--- a/drivers/dfu/dfu_ram.c
+++ b/drivers/dfu/dfu_ram.c
@@ -18,12 +18,12 @@ static int dfu_transfer_medium_ram(enum dfu_op op, struct dfu_entity *dfu,
 				   u64 offset, void *buf, long *len)
 {
 	if (dfu->layout != DFU_RAM_ADDR) {
-		error("unsupported layout: %s\n", dfu_get_layout(dfu->layout));
+		pr_err("unsupported layout: %s\n", dfu_get_layout(dfu->layout));
 		return  -EINVAL;
 	}
 
 	if (offset > dfu->data.ram.size) {
-		error("request exceeds allowed area\n");
+		pr_err("request exceeds allowed area\n");
 		return -EINVAL;
 	}
 
@@ -62,14 +62,14 @@ int dfu_fill_entity_ram(struct dfu_entity *dfu, char *devstr, char *s)
 	for (; parg < argv + sizeof(argv) / sizeof(*argv); ++parg) {
 		*parg = strsep(&s, " ");
 		if (*parg == NULL) {
-			error("Invalid number of arguments.\n");
+			pr_err("Invalid number of arguments.\n");
 			return -ENODEV;
 		}
 	}
 
 	dfu->dev_type = DFU_DEV_RAM;
 	if (strcmp(argv[0], "ram")) {
-		error("unsupported device: %s\n", argv[0]);
+		pr_err("unsupported device: %s\n", argv[0]);
 		return -ENODEV;
 	}
 
diff --git a/drivers/dfu/dfu_tftp.c b/drivers/dfu/dfu_tftp.c
index cd71708231..62bf797dac 100644
--- a/drivers/dfu/dfu_tftp.c
+++ b/drivers/dfu/dfu_tftp.c
@@ -43,7 +43,7 @@ int dfu_tftp_write(char *dfu_entity_name, unsigned int addr, unsigned int len,
 	alt_setting_num = dfu_get_alt(sb);
 	free(sb);
 	if (alt_setting_num < 0) {
-		error("Alt setting [%d] to write not found!",
+		pr_err("Alt setting [%d] to write not found!",
 		      alt_setting_num);
 		ret = -ENODEV;
 		goto done;
@@ -51,7 +51,7 @@ int dfu_tftp_write(char *dfu_entity_name, unsigned int addr, unsigned int len,
 
 	dfu = dfu_get_entity(alt_setting_num);
 	if (!dfu) {
-		error("DFU entity for alt: %d not found!", alt_setting_num);
+		pr_err("DFU entity for alt: %d not found!", alt_setting_num);
 		ret = -ENODEV;
 		goto done;
 	}
diff --git a/drivers/dma/dma-uclass.c b/drivers/dma/dma-uclass.c
index ea21fd9c6f..3d0ce22fbc 100644
--- a/drivers/dma/dma-uclass.c
+++ b/drivers/dma/dma-uclass.c
@@ -33,7 +33,7 @@ int dma_get_device(u32 transfer_type, struct udevice **devp)
 	}
 
 	if (!dev) {
-		error("No DMA device found that supports %x type\n",
+		pr_err("No DMA device found that supports %x type\n",
 		      transfer_type);
 		return -EPROTONOSUPPORT;
 	}
diff --git a/drivers/dma/lpc32xx_dma.c b/drivers/dma/lpc32xx_dma.c
index 955adfeccd..63a8a2f340 100644
--- a/drivers/dma/lpc32xx_dma.c
+++ b/drivers/dma/lpc32xx_dma.c
@@ -96,7 +96,7 @@ int lpc32xx_dma_start_xfer(unsigned int channel,
 {
 	if (unlikely(((BIT_MASK(channel) & alloc_ch) == 0) ||
 		     (channel >= DMA_NO_OF_CHANNELS))) {
-		error("Request for xfer on unallocated channel %d", channel);
+		pr_err("Request for xfer on unallocated channel %d", channel);
 		return -1;
 	}
 	writel(BIT_MASK(channel), &dma->int_tc_clear);
@@ -117,7 +117,7 @@ int lpc32xx_dma_wait_status(unsigned int channel)
 
 	/* Check if given channel is valid */
 	if (unlikely(channel >= DMA_NO_OF_CHANNELS)) {
-		error("Request for status on unallocated channel %d", channel);
+		pr_err("Request for status on unallocated channel %d", channel);
 		return -1;
 	}
 
@@ -129,7 +129,7 @@ int lpc32xx_dma_wait_status(unsigned int channel)
 			break;
 
 		if (get_timer(start) > CONFIG_SYS_HZ) {
-			error("DMA status timeout channel %d\n", channel);
+			pr_err("DMA status timeout channel %d\n", channel);
 			return -ETIMEDOUT;
 		}
 		udelay(1);
@@ -138,7 +138,7 @@ int lpc32xx_dma_wait_status(unsigned int channel)
 	if (unlikely(readl(&dma->raw_err_stat) & BIT_MASK(channel))) {
 		setbits_le32(&dma->int_err_clear, BIT_MASK(channel));
 		setbits_le32(&dma->raw_err_stat, BIT_MASK(channel));
-		error("DMA error on channel %d\n", channel);
+		pr_err("DMA error on channel %d\n", channel);
 		return -1;
 	}
 	setbits_le32(&dma->int_tc_clear, BIT_MASK(channel));
diff --git a/drivers/dma/ti-edma3.c b/drivers/dma/ti-edma3.c
index 39e9793013..635eb7876d 100644
--- a/drivers/dma/ti-edma3.c
+++ b/drivers/dma/ti-edma3.c
@@ -491,7 +491,7 @@ static int ti_edma3_transfer(struct udevice *dev, int direction, void *dst,
 		__edma3_transfer(priv->base, 1, dst, src, len);
 		break;
 	default:
-		error("Transfer type not implemented in DMA driver\n");
+		pr_err("Transfer type not implemented in DMA driver\n");
 		break;
 	}
 
diff --git a/drivers/i2c/i2c-gpio.c b/drivers/i2c/i2c-gpio.c
index aeeb304a87..4e8fa21473 100644
--- a/drivers/i2c/i2c-gpio.c
+++ b/drivers/i2c/i2c-gpio.c
@@ -322,7 +322,7 @@ static int i2c_gpio_ofdata_to_platdata(struct udevice *dev)
 
 	return 0;
 error:
-	error("Can't get %s gpios! Error: %d", dev->name, ret);
+	pr_err("Can't get %s gpios! Error: %d", dev->name, ret);
 	return ret;
 }
 
diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c
index c98c6276dd..5d33815146 100644
--- a/drivers/i2c/omap24xx_i2c.c
+++ b/drivers/i2c/omap24xx_i2c.c
@@ -755,7 +755,7 @@ static uint omap24_i2c_setspeed(struct i2c_adapter *adap, uint speed)
 
 	ret = __omap24_i2c_setspeed(i2c_base, speed, &adap->waitdelay);
 	if (ret) {
-		error("%s: set i2c speed failed\n", __func__);
+		pr_err("%s: set i2c speed failed\n", __func__);
 		return ret;
 	}
 
diff --git a/drivers/i2c/stm32f7_i2c.c b/drivers/i2c/stm32f7_i2c.c
index bf5fefab7b..196f2365ea 100644
--- a/drivers/i2c/stm32f7_i2c.c
+++ b/drivers/i2c/stm32f7_i2c.c
@@ -549,7 +549,7 @@ static int stm32_i2c_compute_solutions(struct stm32_i2c_setup *setup,
 	}
 
 	if (list_empty(solutions)) {
-		error("%s: no Prescaler solution\n", __func__);
+		pr_err("%s: no Prescaler solution\n", __func__);
 		ret = -EPERM;
 	}
 
@@ -627,7 +627,7 @@ static int stm32_i2c_choose_solution(struct stm32_i2c_setup *setup,
 	}
 
 	if (!s) {
-		error("%s: no solution at all\n", __func__);
+		pr_err("%s: no solution at all\n", __func__);
 		ret = -EPERM;
 	}
 
@@ -643,14 +643,14 @@ static int stm32_i2c_compute_timing(struct stm32_i2c_priv *i2c_priv,
 	int ret;
 
 	if (setup->speed >= STM32_I2C_SPEED_END) {
-		error("%s: speed out of bound {%d/%d}\n", __func__,
+		pr_err("%s: speed out of bound {%d/%d}\n", __func__,
 		      setup->speed, STM32_I2C_SPEED_END - 1);
 		return -EINVAL;
 	}
 
 	if ((setup->rise_time > i2c_specs[setup->speed].rise_max) ||
 	    (setup->fall_time > i2c_specs[setup->speed].fall_max)) {
-		error("%s :timings out of bound Rise{%d>%d}/Fall{%d>%d}\n",
+		pr_err("%s :timings out of bound Rise{%d>%d}/Fall{%d>%d}\n",
 		      __func__,
 		      setup->rise_time, i2c_specs[setup->speed].rise_max,
 		      setup->fall_time, i2c_specs[setup->speed].fall_max);
@@ -658,13 +658,13 @@ static int stm32_i2c_compute_timing(struct stm32_i2c_priv *i2c_priv,
 	}
 
 	if (setup->dnf > STM32_I2C_DNF_MAX) {
-		error("%s: DNF out of bound %d/%d\n", __func__,
+		pr_err("%s: DNF out of bound %d/%d\n", __func__,
 		      setup->dnf, STM32_I2C_DNF_MAX);
 		return -EINVAL;
 	}
 
 	if (setup->speed_freq > i2c_specs[setup->speed].rate) {
-		error("%s: Freq {%d/%d}\n", __func__,
+		pr_err("%s: Freq {%d/%d}\n", __func__,
 		      setup->speed_freq, i2c_specs[setup->speed].rate);
 		return -EINVAL;
 	}
@@ -711,7 +711,7 @@ static int stm32_i2c_setup_timing(struct stm32_i2c_priv *i2c_priv,
 	setup->clock_src = clk_get_rate(&i2c_priv->clk);
 
 	if (!setup->clock_src) {
-		error("%s: clock rate is 0\n", __func__);
+		pr_err("%s: clock rate is 0\n", __func__);
 		return -EINVAL;
 	}
 
@@ -734,7 +734,7 @@ static int stm32_i2c_setup_timing(struct stm32_i2c_priv *i2c_priv,
 	} while (ret);
 
 	if (ret) {
-		error("%s: impossible to compute I2C timings.\n", __func__);
+		pr_err("%s: impossible to compute I2C timings.\n", __func__);
 		return ret;
 	}
 
diff --git a/drivers/i2c/tegra_i2c.c b/drivers/i2c/tegra_i2c.c
index 3255e8ed37..7d23e51b69 100644
--- a/drivers/i2c/tegra_i2c.c
+++ b/drivers/i2c/tegra_i2c.c
@@ -372,12 +372,12 @@ static int tegra_i2c_probe(struct udevice *dev)
 
 	ret = reset_get_by_name(dev, "i2c", &i2c_bus->reset_ctl);
 	if (ret) {
-		error("reset_get_by_name() failed: %d\n", ret);
+		pr_err("reset_get_by_name() failed: %d\n", ret);
 		return ret;
 	}
 	ret = clk_get_by_name(dev, "div-clk", &i2c_bus->clk);
 	if (ret) {
-		error("clk_get_by_name() failed: %d\n", ret);
+		pr_err("clk_get_by_name() failed: %d\n", ret);
 		return ret;
 	}
 
diff --git a/drivers/misc/tegra186_bpmp.c b/drivers/misc/tegra186_bpmp.c
index d61bacfc44..1fdf8efff3 100644
--- a/drivers/misc/tegra186_bpmp.c
+++ b/drivers/misc/tegra186_bpmp.c
@@ -44,7 +44,7 @@ static int tegra186_bpmp_call(struct udevice *dev, int mrq, void *tx_msg,
 
 	ret = tegra_ivc_write_get_next_frame(&priv->ivc, &ivc_frame);
 	if (ret) {
-		error("tegra_ivc_write_get_next_frame() failed: %d\n", ret);
+		pr_err("tegra_ivc_write_get_next_frame() failed: %d\n", ret);
 		return ret;
 	}
 
@@ -55,7 +55,7 @@ static int tegra186_bpmp_call(struct udevice *dev, int mrq, void *tx_msg,
 
 	ret = tegra_ivc_write_advance(&priv->ivc);
 	if (ret) {
-		error("tegra_ivc_write_advance() failed: %d\n", ret);
+		pr_err("tegra_ivc_write_advance() failed: %d\n", ret);
 		return ret;
 	}
 
@@ -63,7 +63,7 @@ static int tegra186_bpmp_call(struct udevice *dev, int mrq, void *tx_msg,
 	for (;;) {
 		ret = tegra_ivc_channel_notified(&priv->ivc);
 		if (ret) {
-			error("tegra_ivc_channel_notified() failed: %d\n", ret);
+			pr_err("tegra_ivc_channel_notified() failed: %d\n", ret);
 			return ret;
 		}
 
@@ -73,7 +73,7 @@ static int tegra186_bpmp_call(struct udevice *dev, int mrq, void *tx_msg,
 
 		/* Timeout 20ms; roughly 10x current max observed duration */
 		if ((timer_get_us() - start_time) > 20 * 1000) {
-			error("tegra_ivc_read_get_next_frame() timed out (%d)\n",
+			pr_err("tegra_ivc_read_get_next_frame() timed out (%d)\n",
 			      ret);
 			return -ETIMEDOUT;
 		}
@@ -86,12 +86,12 @@ static int tegra186_bpmp_call(struct udevice *dev, int mrq, void *tx_msg,
 
 	ret = tegra_ivc_read_advance(&priv->ivc);
 	if (ret) {
-		error("tegra_ivc_write_advance() failed: %d\n", ret);
+		pr_err("tegra_ivc_write_advance() failed: %d\n", ret);
 		return ret;
 	}
 
 	if (err) {
-		error("BPMP responded with error %d\n", err);
+		pr_err("BPMP responded with error %d\n", err);
 		/* err isn't a U-Boot error code, so don't that */
 		return -EIO;
 	}
@@ -144,14 +144,14 @@ static ulong tegra186_bpmp_get_shmem(struct udevice *dev, int index)
 	ret = fdtdec_parse_phandle_with_args(gd->fdt_blob, dev_of_offset(dev),
 					      "shmem", NULL, 0, index, &args);
 	if (ret < 0) {
-		error("fdtdec_parse_phandle_with_args() failed: %d\n", ret);
+		pr_err("fdtdec_parse_phandle_with_args() failed: %d\n", ret);
 		return ret;
 	}
 
 	reg = fdtdec_get_addr_size_auto_noparent(gd->fdt_blob, args.node,
 						 "reg", 0, NULL, true);
 	if (reg == FDT_ADDR_T_NONE) {
-		error("fdtdec_get_addr_size_auto_noparent() failed\n");
+		pr_err("fdtdec_get_addr_size_auto_noparent() failed\n");
 		return -ENODEV;
 	}
 
@@ -166,7 +166,7 @@ static void tegra186_bpmp_ivc_notify(struct tegra_ivc *ivc)
 
 	ret = mbox_send(&priv->mbox, NULL);
 	if (ret)
-		error("mbox_send() failed: %d\n", ret);
+		pr_err("mbox_send() failed: %d\n", ret);
 }
 
 static int tegra186_bpmp_probe(struct udevice *dev)
@@ -179,18 +179,18 @@ static int tegra186_bpmp_probe(struct udevice *dev)
 
 	ret = mbox_get_by_index(dev, 0, &priv->mbox);
 	if (ret) {
-		error("mbox_get_by_index() failed: %d\n", ret);
+		pr_err("mbox_get_by_index() failed: %d\n", ret);
 		return ret;
 	}
 
 	tx_base = tegra186_bpmp_get_shmem(dev, 0);
 	if (IS_ERR_VALUE(tx_base)) {
-		error("tegra186_bpmp_get_shmem failed for tx_base\n");
+		pr_err("tegra186_bpmp_get_shmem failed for tx_base\n");
 		return tx_base;
 	}
 	rx_base = tegra186_bpmp_get_shmem(dev, 1);
 	if (IS_ERR_VALUE(rx_base)) {
-		error("tegra186_bpmp_get_shmem failed for rx_base\n");
+		pr_err("tegra186_bpmp_get_shmem failed for rx_base\n");
 		return rx_base;
 	}
 	debug("shmem: rx=%lx, tx=%lx\n", rx_base, tx_base);
@@ -198,7 +198,7 @@ static int tegra186_bpmp_probe(struct udevice *dev)
 	ret = tegra_ivc_init(&priv->ivc, rx_base, tx_base, BPMP_IVC_FRAME_COUNT,
 			     BPMP_IVC_FRAME_SIZE, tegra186_bpmp_ivc_notify);
 	if (ret) {
-		error("tegra_ivc_init() failed: %d\n", ret);
+		pr_err("tegra_ivc_init() failed: %d\n", ret);
 		return ret;
 	}
 
@@ -211,7 +211,7 @@ static int tegra186_bpmp_probe(struct udevice *dev)
 
 		/* Timeout 100ms */
 		if ((timer_get_us() - start_time) > 100 * 1000) {
-			error("Initial IVC reset timed out (%d)\n", ret);
+			pr_err("Initial IVC reset timed out (%d)\n", ret);
 			ret = -ETIMEDOUT;
 			goto err_free_mbox;
 		}
diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c
index 40f7892ac8..5edd383c68 100644
--- a/drivers/mmc/exynos_dw_mmc.c
+++ b/drivers/mmc/exynos_dw_mmc.c
@@ -155,7 +155,7 @@ static int exynos_dwmci_get_config(const void *blob, int node,
 
 	priv = malloc(sizeof(struct dwmci_exynos_priv_data));
 	if (!priv) {
-		error("dwmci_exynos_priv_data malloc fail!\n");
+		pr_err("dwmci_exynos_priv_data malloc fail!\n");
 		return -ENOMEM;
 	}
 
diff --git a/drivers/mmc/hi6220_dw_mmc.c b/drivers/mmc/hi6220_dw_mmc.c
index d795198534..44a8ef825f 100644
--- a/drivers/mmc/hi6220_dw_mmc.c
+++ b/drivers/mmc/hi6220_dw_mmc.c
@@ -44,7 +44,7 @@ int hi6220_dwmci_add_port(int index, u32 regbase, int bus_width)
 
 	host = calloc(1, sizeof(struct dwmci_host));
 	if (!host) {
-		error("dwmci_host calloc failed!\n");
+		pr_err("dwmci_host calloc failed!\n");
 		return -ENOMEM;
 	}
 
diff --git a/drivers/mmc/xenon_sdhci.c b/drivers/mmc/xenon_sdhci.c
index b9a3338666..5d8ee35a19 100644
--- a/drivers/mmc/xenon_sdhci.c
+++ b/drivers/mmc/xenon_sdhci.c
@@ -147,7 +147,7 @@ static int xenon_mmc_phy_init(struct sdhci_host *host)
 	}
 
 	if (time <= 0) {
-		error("Failed to enable MMC internal clock in time\n");
+		pr_err("Failed to enable MMC internal clock in time\n");
 		return -ETIMEDOUT;
 	}
 
@@ -175,7 +175,7 @@ static int xenon_mmc_phy_init(struct sdhci_host *host)
 	}
 
 	if (time <= 0) {
-		error("Failed to init MMC PHY in time\n");
+		pr_err("Failed to init MMC PHY in time\n");
 		return -ETIMEDOUT;
 	}
 
diff --git a/drivers/mtd/nand/lpc32xx_nand_mlc.c b/drivers/mtd/nand/lpc32xx_nand_mlc.c
index 3af7e6dfac..e1b36706ca 100644
--- a/drivers/mtd/nand/lpc32xx_nand_mlc.c
+++ b/drivers/mtd/nand/lpc32xx_nand_mlc.c
@@ -583,21 +583,21 @@ void board_nand_init(void)
 	/* identify chip */
 	ret = nand_scan_ident(mtd, CONFIG_SYS_MAX_NAND_CHIPS, NULL);
 	if (ret) {
-		error("nand_scan_ident returned %i", ret);
+		pr_err("nand_scan_ident returned %i", ret);
 		return;
 	}
 
 	/* finish scanning the chip */
 	ret = nand_scan_tail(mtd);
 	if (ret) {
-		error("nand_scan_tail returned %i", ret);
+		pr_err("nand_scan_tail returned %i", ret);
 		return;
 	}
 
 	/* chip is good, register it */
 	ret = nand_register(0, mtd);
 	if (ret)
-		error("nand_register returned %i", ret);
+		pr_err("nand_register returned %i", ret);
 }
 
 #else /* defined(CONFIG_SPL_BUILD) */
diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index 0042a7ba11..6ab3c8a25a 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -1559,7 +1559,7 @@ static int pxa3xx_nand_probe_dt(struct pxa3xx_nand_info *info)
 
 		pdata->num_cs = fdtdec_get_int(blob, node, "num-cs", 1);
 		if (pdata->num_cs != 1) {
-			error("pxa3xx driver supports single CS only\n");
+			pr_err("pxa3xx driver supports single CS only\n");
 			break;
 		}
 
diff --git a/drivers/net/bcm-sf2-eth-gmac.c b/drivers/net/bcm-sf2-eth-gmac.c
index 9ff72fa1ed..a2b594ed73 100644
--- a/drivers/net/bcm-sf2-eth-gmac.c
+++ b/drivers/net/bcm-sf2-eth-gmac.c
@@ -610,7 +610,7 @@ int gmac_miiphy_read(struct mii_dev *bus, int phyaddr, int devad, int reg)
 
 	/* Busy wait timeout is 1ms */
 	if (gmac_mii_busywait(1000)) {
-		error("%s: Prepare MII read: MII/MDIO busy\n", __func__);
+		pr_err("%s: Prepare MII read: MII/MDIO busy\n", __func__);
 		return -1;
 	}
 
@@ -622,7 +622,7 @@ int gmac_miiphy_read(struct mii_dev *bus, int phyaddr, int devad, int reg)
 	writel(tmp, GMAC_MII_DATA_ADDR);
 
 	if (gmac_mii_busywait(1000)) {
-		error("%s: MII read failure: MII/MDIO busy\n", __func__);
+		pr_err("%s: MII read failure: MII/MDIO busy\n", __func__);
 		return -1;
 	}
 
@@ -638,7 +638,7 @@ int gmac_miiphy_write(struct mii_dev *bus, int phyaddr, int devad, int reg,
 
 	/* Busy wait timeout is 1ms */
 	if (gmac_mii_busywait(1000)) {
-		error("%s: Prepare MII write: MII/MDIO busy\n", __func__);
+		pr_err("%s: Prepare MII write: MII/MDIO busy\n", __func__);
 		return -1;
 	}
 
@@ -651,7 +651,7 @@ int gmac_miiphy_write(struct mii_dev *bus, int phyaddr, int devad, int reg,
 	writel(tmp, GMAC_MII_DATA_ADDR);
 
 	if (gmac_mii_busywait(1000)) {
-		error("%s: MII write failure: MII/MDIO busy\n", __func__);
+		pr_err("%s: MII write failure: MII/MDIO busy\n", __func__);
 		return -1;
 	}
 
@@ -742,7 +742,7 @@ int gmac_set_speed(int speed, int duplex)
 	} else if (speed == 10) {
 		speed_cfg = 0;
 	} else {
-		error("%s: Invalid GMAC speed(%d)!\n", __func__, speed);
+		pr_err("%s: Invalid GMAC speed(%d)!\n", __func__, speed);
 		return -1;
 	}
 
@@ -820,7 +820,7 @@ int gmac_mac_init(struct eth_device *dev)
 	writel(0, GMAC0_INT_STATUS_ADDR);
 
 	if (dma_init(dma) < 0) {
-		error("%s: GMAC dma_init failed\n", __func__);
+		pr_err("%s: GMAC dma_init failed\n", __func__);
 		goto err_exit;
 	}
 
@@ -855,7 +855,7 @@ int gmac_mac_init(struct eth_device *dev)
 	writel(tmp, GMAC_MII_CTRL_ADDR);
 
 	if (gmac_mii_busywait(1000)) {
-		error("%s: Configure MDIO: MII/MDIO busy\n", __func__);
+		pr_err("%s: Configure MDIO: MII/MDIO busy\n", __func__);
 		goto err_exit;
 	}
 
diff --git a/drivers/net/bcm-sf2-eth.c b/drivers/net/bcm-sf2-eth.c
index e2747365a2..9056f71b9a 100644
--- a/drivers/net/bcm-sf2-eth.c
+++ b/drivers/net/bcm-sf2-eth.c
@@ -40,7 +40,7 @@ static int bcm_sf2_eth_init(struct eth_device *dev)
 
 	rc = eth->mac_init(dev);
 	if (rc) {
-		error("%s: Couldn't cofigure MAC!\n", __func__);
+		pr_err("%s: Couldn't cofigure MAC!\n", __func__);
 		return rc;
 	}
 
@@ -90,7 +90,7 @@ static int bcm_sf2_eth_send(struct eth_device *dev, void *packet, int length)
 		debug(".");
 		i++;
 		if (i > 20) {
-			error("%s: Tx timeout: retried 20 times\n", __func__);
+			pr_err("%s: Tx timeout: retried 20 times\n", __func__);
 			rc = -1;
 			break;
 		}
@@ -117,7 +117,7 @@ static int bcm_sf2_eth_receive(struct eth_device *dev)
 			debug("\nNO More Rx\n");
 			break;
 		} else if ((rcvlen == 0) || (rcvlen > RX_BUF_SIZE)) {
-			error("%s: Wrong Ethernet packet size (%d B), skip!\n",
+			pr_err("%s: Wrong Ethernet packet size (%d B), skip!\n",
 			      __func__, rcvlen);
 			break;
 		} else {
@@ -166,9 +166,9 @@ static int bcm_sf2_eth_open(struct eth_device *dev, bd_t *bt)
 	 */
 	for (i = 0; i < eth->port_num; i++) {
 		if (phy_startup(eth->port[i])) {
-			error("%s: PHY %d startup failed!\n", __func__, i);
+			pr_err("%s: PHY %d startup failed!\n", __func__, i);
 			if (i == CONFIG_BCM_SF2_ETH_DEFAULT_PORT) {
-				error("%s: No default port %d!\n", __func__, i);
+				pr_err("%s: No default port %d!\n", __func__, i);
 				return -1;
 			}
 		}
@@ -205,13 +205,13 @@ int bcm_sf2_eth_register(bd_t *bis, u8 dev_num)
 
 	dev = (struct eth_device *)malloc(sizeof(struct eth_device));
 	if (dev == NULL) {
-		error("%s: Not enough memory!\n", __func__);
+		pr_err("%s: Not enough memory!\n", __func__);
 		return -1;
 	}
 
 	eth = (struct eth_info *)malloc(sizeof(struct eth_info));
 	if (eth == NULL) {
-		error("%s: Not enough memory!\n", __func__);
+		pr_err("%s: Not enough memory!\n", __func__);
 		return -1;
 	}
 
@@ -234,7 +234,7 @@ int bcm_sf2_eth_register(bd_t *bis, u8 dev_num)
 	if (gmac_add(dev)) {
 		free(eth);
 		free(dev);
-		error("%s: Adding GMAC failed!\n", __func__);
+		pr_err("%s: Adding GMAC failed!\n", __func__);
 		return -1;
 	}
 #else
@@ -263,7 +263,7 @@ int bcm_sf2_eth_register(bd_t *bis, u8 dev_num)
 
 	rc = bcm_sf2_eth_init(dev);
 	if (rc != 0) {
-		error("%s: configuration failed!\n", __func__);
+		pr_err("%s: configuration failed!\n", __func__);
 		return -1;
 	}
 
diff --git a/drivers/net/cpsw-common.c b/drivers/net/cpsw-common.c
index 8970ee00af..0dc83ab820 100644
--- a/drivers/net/cpsw-common.c
+++ b/drivers/net/cpsw-common.c
@@ -29,14 +29,14 @@ static int davinci_emac_3517_get_macid(struct udevice *dev, u16 offset,
 
 	syscon = fdtdec_lookup_phandle(fdt, node, "syscon");
 	if (syscon < 0) {
-		error("Syscon offset not found\n");
+		pr_err("Syscon offset not found\n");
 		return -ENOENT;
 	}
 
 	addr = (u32)map_physmem(fdt_translate_address(fdt, syscon, &gmii),
 				sizeof(u32), MAP_NOCACHE);
 	if (addr == FDT_ADDR_T_NONE) {
-		error("Not able to get syscon address to get mac efuse address\n");
+		pr_err("Not able to get syscon address to get mac efuse address\n");
 		return -ENOENT;
 	}
 
@@ -69,14 +69,14 @@ static int cpsw_am33xx_cm_get_macid(struct udevice *dev, u16 offset, int slave,
 
 	syscon = fdtdec_lookup_phandle(fdt, node, "syscon");
 	if (syscon < 0) {
-		error("Syscon offset not found\n");
+		pr_err("Syscon offset not found\n");
 		return -ENOENT;
 	}
 
 	addr = (u32)map_physmem(fdt_translate_address(fdt, syscon, &gmii),
 				sizeof(u32), MAP_NOCACHE);
 	if (addr == FDT_ADDR_T_NONE) {
-		error("Not able to get syscon address to get mac efuse address\n");
+		pr_err("Not able to get syscon address to get mac efuse address\n");
 		return -ENOENT;
 	}
 
diff --git a/drivers/net/cpsw.c b/drivers/net/cpsw.c
index d7db0fc432..b72258f83b 100644
--- a/drivers/net/cpsw.c
+++ b/drivers/net/cpsw.c
@@ -1368,7 +1368,7 @@ static int cpsw_eth_ofdata_to_platdata(struct udevice *dev)
 
 			mdio_base = cpsw_get_addr_by_node(fdt, subnode);
 			if (mdio_base == FDT_ADDR_T_NONE) {
-				error("Not able to get MDIO address space\n");
+				pr_err("Not able to get MDIO address space\n");
 				return -ENOENT;
 			}
 			priv->data.mdio_base = mdio_base;
@@ -1407,7 +1407,7 @@ static int cpsw_eth_ofdata_to_platdata(struct udevice *dev)
 								    subnode);
 
 			if (priv->data.gmii_sel == FDT_ADDR_T_NONE) {
-				error("Not able to get gmii_sel reg address\n");
+				pr_err("Not able to get gmii_sel reg address\n");
 				return -ENOENT;
 			}
 
@@ -1418,7 +1418,7 @@ static int cpsw_eth_ofdata_to_platdata(struct udevice *dev)
 			phy_sel_compat = fdt_getprop(fdt, subnode, "compatible",
 						     NULL);
 			if (!phy_sel_compat) {
-				error("Not able to get gmii_sel compatible\n");
+				pr_err("Not able to get gmii_sel compatible\n");
 				return -ENOENT;
 			}
 		}
@@ -1434,7 +1434,7 @@ static int cpsw_eth_ofdata_to_platdata(struct udevice *dev)
 
 	ret = ti_cm_get_macid(dev, active_slave, pdata->enetaddr);
 	if (ret < 0) {
-		error("cpsw read efuse mac failed\n");
+		pr_err("cpsw read efuse mac failed\n");
 		return ret;
 	}
 
diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index 5c4315ffea..00076cffbe 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -377,7 +377,7 @@ static int eqos_mdio_read(struct mii_dev *bus, int mdio_addr, int mdio_devad,
 
 	ret = eqos_mdio_wait_idle(eqos);
 	if (ret) {
-		error("MDIO not idle at entry");
+		pr_err("MDIO not idle at entry");
 		return ret;
 	}
 
@@ -397,7 +397,7 @@ static int eqos_mdio_read(struct mii_dev *bus, int mdio_addr, int mdio_devad,
 
 	ret = eqos_mdio_wait_idle(eqos);
 	if (ret) {
-		error("MDIO read didn't complete");
+		pr_err("MDIO read didn't complete");
 		return ret;
 	}
 
@@ -421,7 +421,7 @@ static int eqos_mdio_write(struct mii_dev *bus, int mdio_addr, int mdio_devad,
 
 	ret = eqos_mdio_wait_idle(eqos);
 	if (ret) {
-		error("MDIO not idle at entry");
+		pr_err("MDIO not idle at entry");
 		return ret;
 	}
 
@@ -443,7 +443,7 @@ static int eqos_mdio_write(struct mii_dev *bus, int mdio_addr, int mdio_devad,
 
 	ret = eqos_mdio_wait_idle(eqos);
 	if (ret) {
-		error("MDIO read didn't complete");
+		pr_err("MDIO read didn't complete");
 		return ret;
 	}
 
@@ -459,37 +459,37 @@ static int eqos_start_clks_tegra186(struct udevice *dev)
 
 	ret = clk_enable(&eqos->clk_slave_bus);
 	if (ret < 0) {
-		error("clk_enable(clk_slave_bus) failed: %d", ret);
+		pr_err("clk_enable(clk_slave_bus) failed: %d", ret);
 		goto err;
 	}
 
 	ret = clk_enable(&eqos->clk_master_bus);
 	if (ret < 0) {
-		error("clk_enable(clk_master_bus) failed: %d", ret);
+		pr_err("clk_enable(clk_master_bus) failed: %d", ret);
 		goto err_disable_clk_slave_bus;
 	}
 
 	ret = clk_enable(&eqos->clk_rx);
 	if (ret < 0) {
-		error("clk_enable(clk_rx) failed: %d", ret);
+		pr_err("clk_enable(clk_rx) failed: %d", ret);
 		goto err_disable_clk_master_bus;
 	}
 
 	ret = clk_enable(&eqos->clk_ptp_ref);
 	if (ret < 0) {
-		error("clk_enable(clk_ptp_ref) failed: %d", ret);
+		pr_err("clk_enable(clk_ptp_ref) failed: %d", ret);
 		goto err_disable_clk_rx;
 	}
 
 	ret = clk_set_rate(&eqos->clk_ptp_ref, 125 * 1000 * 1000);
 	if (ret < 0) {
-		error("clk_set_rate(clk_ptp_ref) failed: %d", ret);
+		pr_err("clk_set_rate(clk_ptp_ref) failed: %d", ret);
 		goto err_disable_clk_ptp_ref;
 	}
 
 	ret = clk_enable(&eqos->clk_tx);
 	if (ret < 0) {
-		error("clk_enable(clk_tx) failed: %d", ret);
+		pr_err("clk_enable(clk_tx) failed: %d", ret);
 		goto err_disable_clk_ptp_ref;
 	}
 
@@ -533,7 +533,7 @@ static int eqos_start_resets_tegra186(struct udevice *dev)
 
 	ret = dm_gpio_set_value(&eqos->phy_reset_gpio, 1);
 	if (ret < 0) {
-		error("dm_gpio_set_value(phy_reset, assert) failed: %d", ret);
+		pr_err("dm_gpio_set_value(phy_reset, assert) failed: %d", ret);
 		return ret;
 	}
 
@@ -541,13 +541,13 @@ static int eqos_start_resets_tegra186(struct udevice *dev)
 
 	ret = dm_gpio_set_value(&eqos->phy_reset_gpio, 0);
 	if (ret < 0) {
-		error("dm_gpio_set_value(phy_reset, deassert) failed: %d", ret);
+		pr_err("dm_gpio_set_value(phy_reset, deassert) failed: %d", ret);
 		return ret;
 	}
 
 	ret = reset_assert(&eqos->reset_ctl);
 	if (ret < 0) {
-		error("reset_assert() failed: %d", ret);
+		pr_err("reset_assert() failed: %d", ret);
 		return ret;
 	}
 
@@ -555,7 +555,7 @@ static int eqos_start_resets_tegra186(struct udevice *dev)
 
 	ret = reset_deassert(&eqos->reset_ctl);
 	if (ret < 0) {
-		error("reset_deassert() failed: %d", ret);
+		pr_err("reset_deassert() failed: %d", ret);
 		return ret;
 	}
 
@@ -591,14 +591,14 @@ static int eqos_calibrate_pads_tegra186(struct udevice *dev)
 	ret = wait_for_bit(__func__, &eqos->tegra186_regs->auto_cal_status,
 			   EQOS_AUTO_CAL_STATUS_ACTIVE, true, 10, false);
 	if (ret) {
-		error("calibrate didn't start");
+		pr_err("calibrate didn't start");
 		goto failed;
 	}
 
 	ret = wait_for_bit(__func__, &eqos->tegra186_regs->auto_cal_status,
 			   EQOS_AUTO_CAL_STATUS_ACTIVE, false, 10, false);
 	if (ret) {
-		error("calibrate didn't finish");
+		pr_err("calibrate didn't finish");
 		goto failed;
 	}
 
@@ -713,13 +713,13 @@ static int eqos_set_tx_clk_speed_tegra186(struct udevice *dev)
 		rate = 2.5 * 1000 * 1000;
 		break;
 	default:
-		error("invalid speed %d", eqos->phy->speed);
+		pr_err("invalid speed %d", eqos->phy->speed);
 		return -EINVAL;
 	}
 
 	ret = clk_set_rate(&eqos->clk_tx, rate);
 	if (ret < 0) {
-		error("clk_set_rate(tx_clk, %lu) failed: %d", rate, ret);
+		pr_err("clk_set_rate(tx_clk, %lu) failed: %d", rate, ret);
 		return ret;
 	}
 
@@ -739,7 +739,7 @@ static int eqos_adjust_link(struct udevice *dev)
 	else
 		ret = eqos_set_half_duplex(dev);
 	if (ret < 0) {
-		error("eqos_set_*_duplex() failed: %d", ret);
+		pr_err("eqos_set_*_duplex() failed: %d", ret);
 		return ret;
 	}
 
@@ -757,24 +757,24 @@ static int eqos_adjust_link(struct udevice *dev)
 		ret = eqos_set_mii_speed_10(dev);
 		break;
 	default:
-		error("invalid speed %d", eqos->phy->speed);
+		pr_err("invalid speed %d", eqos->phy->speed);
 		return -EINVAL;
 	}
 	if (ret < 0) {
-		error("eqos_set_*mii_speed*() failed: %d", ret);
+		pr_err("eqos_set_*mii_speed*() failed: %d", ret);
 		return ret;
 	}
 
 	if (en_calibration) {
 		ret = eqos_calibrate_pads_tegra186(dev);
 		if (ret < 0) {
-			error("eqos_calibrate_pads_tegra186() failed: %d", ret);
+			pr_err("eqos_calibrate_pads_tegra186() failed: %d", ret);
 			return ret;
 		}
 	} else {
 		ret = eqos_disable_calibration_tegra186(dev);
 		if (ret < 0) {
-			error("eqos_disable_calibration_tegra186() failed: %d",
+			pr_err("eqos_disable_calibration_tegra186() failed: %d",
 			      ret);
 			return ret;
 		}
@@ -782,7 +782,7 @@ static int eqos_adjust_link(struct udevice *dev)
 
 	ret = eqos_set_tx_clk_speed_tegra186(dev);
 	if (ret < 0) {
-		error("eqos_set_tx_clk_speed_tegra186() failed: %d", ret);
+		pr_err("eqos_set_tx_clk_speed_tegra186() failed: %d", ret);
 		return ret;
 	}
 
@@ -848,13 +848,13 @@ static int eqos_start(struct udevice *dev)
 
 	ret = eqos_start_clks_tegra186(dev);
 	if (ret < 0) {
-		error("eqos_start_clks_tegra186() failed: %d", ret);
+		pr_err("eqos_start_clks_tegra186() failed: %d", ret);
 		goto err;
 	}
 
 	ret = eqos_start_resets_tegra186(dev);
 	if (ret < 0) {
-		error("eqos_start_resets_tegra186() failed: %d", ret);
+		pr_err("eqos_start_resets_tegra186() failed: %d", ret);
 		goto err_stop_clks;
 	}
 
@@ -865,13 +865,13 @@ static int eqos_start(struct udevice *dev)
 	ret = wait_for_bit(__func__, &eqos->dma_regs->mode,
 			   EQOS_DMA_MODE_SWR, false, 10, false);
 	if (ret) {
-		error("EQOS_DMA_MODE_SWR stuck");
+		pr_err("EQOS_DMA_MODE_SWR stuck");
 		goto err_stop_resets;
 	}
 
 	ret = eqos_calibrate_pads_tegra186(dev);
 	if (ret < 0) {
-		error("eqos_calibrate_pads_tegra186() failed: %d", ret);
+		pr_err("eqos_calibrate_pads_tegra186() failed: %d", ret);
 		goto err_stop_resets;
 	}
 
@@ -881,28 +881,28 @@ static int eqos_start(struct udevice *dev)
 
 	eqos->phy = phy_connect(eqos->mii, 0, dev, 0);
 	if (!eqos->phy) {
-		error("phy_connect() failed");
+		pr_err("phy_connect() failed");
 		goto err_stop_resets;
 	}
 	ret = phy_config(eqos->phy);
 	if (ret < 0) {
-		error("phy_config() failed: %d", ret);
+		pr_err("phy_config() failed: %d", ret);
 		goto err_shutdown_phy;
 	}
 	ret = phy_startup(eqos->phy);
 	if (ret < 0) {
-		error("phy_startup() failed: %d", ret);
+		pr_err("phy_startup() failed: %d", ret);
 		goto err_shutdown_phy;
 	}
 
 	if (!eqos->phy->link) {
-		error("No link");
+		pr_err("No link");
 		goto err_shutdown_phy;
 	}
 
 	ret = eqos_adjust_link(dev);
 	if (ret < 0) {
-		error("eqos_adjust_link() failed: %d", ret);
+		pr_err("eqos_adjust_link() failed: %d", ret);
 		goto err_shutdown_phy;
 	}
 
@@ -1119,7 +1119,7 @@ err_stop_resets:
 err_stop_clks:
 	eqos_stop_clks_tegra186(dev);
 err:
-	error("FAILED: %d", ret);
+	pr_err("FAILED: %d", ret);
 	return ret;
 }
 
@@ -1361,7 +1361,7 @@ static int eqos_probe_resources_tegra186(struct udevice *dev)
 
 	ret = reset_get_by_name(dev, "eqos", &eqos->reset_ctl);
 	if (ret) {
-		error("reset_get_by_name(rst) failed: %d", ret);
+		pr_err("reset_get_by_name(rst) failed: %d", ret);
 		return ret;
 	}
 
@@ -1369,38 +1369,38 @@ static int eqos_probe_resources_tegra186(struct udevice *dev)
 				   &eqos->phy_reset_gpio,
 				   GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);
 	if (ret) {
-		error("gpio_request_by_name(phy reset) failed: %d", ret);
+		pr_err("gpio_request_by_name(phy reset) failed: %d", ret);
 		goto err_free_reset_eqos;
 	}
 
 	ret = clk_get_by_name(dev, "slave_bus", &eqos->clk_slave_bus);
 	if (ret) {
-		error("clk_get_by_name(slave_bus) failed: %d", ret);
+		pr_err("clk_get_by_name(slave_bus) failed: %d", ret);
 		goto err_free_gpio_phy_reset;
 	}
 
 	ret = clk_get_by_name(dev, "master_bus", &eqos->clk_master_bus);
 	if (ret) {
-		error("clk_get_by_name(master_bus) failed: %d", ret);
+		pr_err("clk_get_by_name(master_bus) failed: %d", ret);
 		goto err_free_clk_slave_bus;
 	}
 
 	ret = clk_get_by_name(dev, "rx", &eqos->clk_rx);
 	if (ret) {
-		error("clk_get_by_name(rx) failed: %d", ret);
+		pr_err("clk_get_by_name(rx) failed: %d", ret);
 		goto err_free_clk_master_bus;
 	}
 
 	ret = clk_get_by_name(dev, "ptp_ref", &eqos->clk_ptp_ref);
 	if (ret) {
-		error("clk_get_by_name(ptp_ref) failed: %d", ret);
+		pr_err("clk_get_by_name(ptp_ref) failed: %d", ret);
 		goto err_free_clk_rx;
 		return ret;
 	}
 
 	ret = clk_get_by_name(dev, "tx", &eqos->clk_tx);
 	if (ret) {
-		error("clk_get_by_name(tx) failed: %d", ret);
+		pr_err("clk_get_by_name(tx) failed: %d", ret);
 		goto err_free_clk_ptp_ref;
 	}
 
@@ -1454,7 +1454,7 @@ static int eqos_probe(struct udevice *dev)
 
 	eqos->regs = devfdt_get_addr(dev);
 	if (eqos->regs == FDT_ADDR_T_NONE) {
-		error("devfdt_get_addr() failed");
+		pr_err("devfdt_get_addr() failed");
 		return -ENODEV;
 	}
 	eqos->mac_regs = (void *)(eqos->regs + EQOS_MAC_REGS_BASE);
@@ -1464,19 +1464,19 @@ static int eqos_probe(struct udevice *dev)
 
 	ret = eqos_probe_resources_core(dev);
 	if (ret < 0) {
-		error("eqos_probe_resources_core() failed: %d", ret);
+		pr_err("eqos_probe_resources_core() failed: %d", ret);
 		return ret;
 	}
 
 	ret = eqos_probe_resources_tegra186(dev);
 	if (ret < 0) {
-		error("eqos_probe_resources_tegra186() failed: %d", ret);
+		pr_err("eqos_probe_resources_tegra186() failed: %d", ret);
 		goto err_remove_resources_core;
 	}
 
 	eqos->mii = mdio_alloc();
 	if (!eqos->mii) {
-		error("mdio_alloc() failed");
+		pr_err("mdio_alloc() failed");
 		goto err_remove_resources_tegra;
 	}
 	eqos->mii->read = eqos_mdio_read;
@@ -1486,7 +1486,7 @@ static int eqos_probe(struct udevice *dev)
 
 	ret = mdio_register(eqos->mii);
 	if (ret < 0) {
-		error("mdio_register() failed: %d", ret);
+		pr_err("mdio_register() failed: %d", ret);
 		goto err_free_mdio;
 	}
 
diff --git a/drivers/net/ep93xx_eth.c b/drivers/net/ep93xx_eth.c
index a94191b9e6..bc45706243 100644
--- a/drivers/net/ep93xx_eth.c
+++ b/drivers/net/ep93xx_eth.c
@@ -324,7 +324,7 @@ static int ep93xx_eth_rcv_packet(struct eth_device *dev)
 			debug("reporting %d bytes...\n", len);
 		} else {
 			/* Do we have an erroneous packet? */
-			error("packet rx error, status %08X %08X",
+			pr_err("packet rx error, status %08X %08X",
 				priv->rx_sq.current->word1,
 				priv->rx_sq.current->word2);
 			dump_rx_descriptor_queue(dev);
@@ -401,7 +401,7 @@ static int ep93xx_eth_send_packet(struct eth_device *dev,
 		; /* noop */
 
 	if (!TX_STATUS_TXWE(priv->tx_sq.current)) {
-		error("packet tx error, status %08X",
+		pr_err("packet tx error, status %08X",
 			priv->tx_sq.current->word1);
 		dump_tx_descriptor_queue(dev);
 		dump_tx_status_queue(dev);
@@ -452,7 +452,7 @@ int ep93xx_eth_initialize(u8 dev_num, int base_addr)
 
 	priv = malloc(sizeof(*priv));
 	if (!priv) {
-		error("malloc() failed");
+		pr_err("malloc() failed");
 		goto eth_init_failed_0;
 	}
 	memset(priv, 0, sizeof(*priv));
@@ -462,34 +462,34 @@ int ep93xx_eth_initialize(u8 dev_num, int base_addr)
 	priv->tx_dq.base = calloc(NUMTXDESC,
 				sizeof(struct tx_descriptor));
 	if (priv->tx_dq.base == NULL) {
-		error("calloc() failed");
+		pr_err("calloc() failed");
 		goto eth_init_failed_1;
 	}
 
 	priv->tx_sq.base = calloc(NUMTXDESC,
 				sizeof(struct tx_status));
 	if (priv->tx_sq.base == NULL) {
-		error("calloc() failed");
+		pr_err("calloc() failed");
 		goto eth_init_failed_2;
 	}
 
 	priv->rx_dq.base = calloc(NUMRXDESC,
 				sizeof(struct rx_descriptor));
 	if (priv->rx_dq.base == NULL) {
-		error("calloc() failed");
+		pr_err("calloc() failed");
 		goto eth_init_failed_3;
 	}
 
 	priv->rx_sq.base = calloc(NUMRXDESC,
 				sizeof(struct rx_status));
 	if (priv->rx_sq.base == NULL) {
-		error("calloc() failed");
+		pr_err("calloc() failed");
 		goto eth_init_failed_4;
 	}
 
 	dev = malloc(sizeof *dev);
 	if (dev == NULL) {
-		error("malloc() failed");
+		pr_err("malloc() failed");
 		goto eth_init_failed_5;
 	}
 	memset(dev, 0, sizeof *dev);
diff --git a/drivers/net/keystone_net.c b/drivers/net/keystone_net.c
index 72ef42cca8..21ccab47ae 100644
--- a/drivers/net/keystone_net.c
+++ b/drivers/net/keystone_net.c
@@ -757,7 +757,7 @@ static int ks2_eth_start(struct udevice *dev)
 	qm_init();
 
 	if (ksnav_init(priv->netcp_pktdma, &priv->net_rx_buffs)) {
-		error("ksnav_init failed\n");
+		pr_err("ksnav_init failed\n");
 		goto err_knav_init;
 	}
 
@@ -773,7 +773,7 @@ static int ks2_eth_start(struct udevice *dev)
 
 		phy_startup(priv->phydev);
 		if (priv->phydev->link == 0) {
-			error("phy startup failed\n");
+			pr_err("phy startup failed\n");
 			goto err_phy_start;
 		}
 	}
@@ -923,7 +923,7 @@ static int ks2_eth_probe(struct udevice *dev)
 		 */
 		mdio_bus = mdio_alloc();
 		if (!mdio_bus) {
-			error("MDIO alloc failed\n");
+			pr_err("MDIO alloc failed\n");
 			return -ENOMEM;
 		}
 		priv->mdio_bus = mdio_bus;
@@ -935,7 +935,7 @@ static int ks2_eth_probe(struct udevice *dev)
 
 		ret = mdio_register(mdio_bus);
 		if (ret) {
-			error("MDIO bus register failed\n");
+			pr_err("MDIO bus register failed\n");
 			return ret;
 		}
 	} else {
@@ -1011,7 +1011,7 @@ static int ks2_eth_bind_slaves(struct udevice *dev, int gbe, int *gbe_0)
 					slave_name, offset_to_ofnode(slave),
 					&sl_dev);
 			if (ret) {
-				error("ks2_net - not able to bind slave interfaces\n");
+				pr_err("ks2_net - not able to bind slave interfaces\n");
 				return ret;
 			}
 		}
@@ -1031,7 +1031,7 @@ static int ks2_eth_bind_slaves(struct udevice *dev, int gbe, int *gbe_0)
 		ret = device_bind_driver_to_node(dev, "eth_ks2_sl", slave_name,
 					offset_to_ofnode(slave), &sl_dev);
 		if (ret) {
-			error("ks2_net - not able to bind slave interfaces\n");
+			pr_err("ks2_net - not able to bind slave interfaces\n");
 			return ret;
 		}
 	}
@@ -1074,7 +1074,7 @@ static int ks2_eth_parse_slave_interface(int netcp, int slave,
 
 		mdio = fdt_parent_offset(fdt, phy);
 		if (mdio < 0) {
-			error("mdio dt not found\n");
+			pr_err("mdio dt not found\n");
 			return -ENODEV;
 		}
 		priv->mdio_base = (void *)fdtdec_get_addr(fdt, mdio, "reg");
diff --git a/drivers/pci/pci_tegra.c b/drivers/pci/pci_tegra.c
index cb5cf8b043..c15d84b4c2 100644
--- a/drivers/pci/pci_tegra.c
+++ b/drivers/pci/pci_tegra.c
@@ -371,7 +371,7 @@ static int tegra_pcie_port_parse_dt(ofnode node, struct tegra_pcie_port *port)
 
 	addr = ofnode_get_property(node, "assigned-addresses", &len);
 	if (!addr) {
-		error("property \"assigned-addresses\" not found");
+		pr_err("property \"assigned-addresses\" not found");
 		return -FDT_ERR_NOTFOUND;
 	}
 
@@ -462,7 +462,7 @@ static int tegra_pcie_parse_port_info(ofnode node, uint *index, uint *lanes)
 
 	err = ofnode_read_u32_default(node, "nvidia,num-lanes", -1);
 	if (err < 0) {
-		error("failed to parse \"nvidia,num-lanes\" property");
+		pr_err("failed to parse \"nvidia,num-lanes\" property");
 		return err;
 	}
 
@@ -470,7 +470,7 @@ static int tegra_pcie_parse_port_info(ofnode node, uint *index, uint *lanes)
 
 	err = ofnode_read_pci_addr(node, 0, "reg", &addr);
 	if (err < 0) {
-		error("failed to parse \"reg\" property");
+		pr_err("failed to parse \"reg\" property");
 		return err;
 	}
 
@@ -493,25 +493,25 @@ static int tegra_pcie_parse_dt(struct udevice *dev, enum tegra_pci_id id,
 
 	err = dev_read_resource(dev, 0, &pcie->pads);
 	if (err < 0) {
-		error("resource \"pads\" not found");
+		pr_err("resource \"pads\" not found");
 		return err;
 	}
 
 	err = dev_read_resource(dev, 1, &pcie->afi);
 	if (err < 0) {
-		error("resource \"afi\" not found");
+		pr_err("resource \"afi\" not found");
 		return err;
 	}
 
 	err = dev_read_resource(dev, 2, &pcie->cs);
 	if (err < 0) {
-		error("resource \"cs\" not found");
+		pr_err("resource \"cs\" not found");
 		return err;
 	}
 
 	err = tegra_pcie_board_init();
 	if (err < 0) {
-		error("tegra_pcie_board_init() failed: err=%d", err);
+		pr_err("tegra_pcie_board_init() failed: err=%d", err);
 		return err;
 	}
 
@@ -520,7 +520,7 @@ static int tegra_pcie_parse_dt(struct udevice *dev, enum tegra_pci_id id,
 	if (pcie->phy) {
 		err = tegra_xusb_phy_prepare(pcie->phy);
 		if (err < 0) {
-			error("failed to prepare PHY: %d", err);
+			pr_err("failed to prepare PHY: %d", err);
 			return err;
 		}
 	}
@@ -532,7 +532,7 @@ static int tegra_pcie_parse_dt(struct udevice *dev, enum tegra_pci_id id,
 
 		err = tegra_pcie_parse_port_info(subnode, &index, &num_lanes);
 		if (err < 0) {
-			error("failed to obtain root port info");
+			pr_err("failed to obtain root port info");
 			continue;
 		}
 
@@ -562,7 +562,7 @@ static int tegra_pcie_parse_dt(struct udevice *dev, enum tegra_pci_id id,
 	err = tegra_pcie_get_xbar_config(dev_ofnode(dev), lanes, id,
 					 &pcie->xbar);
 	if (err < 0) {
-		error("invalid lane configuration");
+		pr_err("invalid lane configuration");
 		return err;
 	}
 
@@ -576,31 +576,31 @@ static int tegra_pcie_power_on(struct tegra_pcie *pcie)
 
 	ret = power_domain_on(&pcie->pwrdom);
 	if (ret) {
-		error("power_domain_on() failed: %d\n", ret);
+		pr_err("power_domain_on() failed: %d\n", ret);
 		return ret;
 	}
 
 	ret = clk_enable(&pcie->clk_afi);
 	if (ret) {
-		error("clk_enable(afi) failed: %d\n", ret);
+		pr_err("clk_enable(afi) failed: %d\n", ret);
 		return ret;
 	}
 
 	ret = clk_enable(&pcie->clk_pex);
 	if (ret) {
-		error("clk_enable(pex) failed: %d\n", ret);
+		pr_err("clk_enable(pex) failed: %d\n", ret);
 		return ret;
 	}
 
 	ret = reset_deassert(&pcie->reset_afi);
 	if (ret) {
-		error("reset_deassert(afi) failed: %d\n", ret);
+		pr_err("reset_deassert(afi) failed: %d\n", ret);
 		return ret;
 	}
 
 	ret = reset_deassert(&pcie->reset_pex);
 	if (ret) {
-		error("reset_deassert(pex) failed: %d\n", ret);
+		pr_err("reset_deassert(pex) failed: %d\n", ret);
 		return ret;
 	}
 
@@ -620,14 +620,14 @@ static int tegra_pcie_power_on(struct tegra_pcie *pcie)
 
 	err = tegra_powergate_power_off(TEGRA_POWERGATE_PCIE);
 	if (err < 0) {
-		error("failed to power off PCIe partition: %d", err);
+		pr_err("failed to power off PCIe partition: %d", err);
 		return err;
 	}
 
 	err = tegra_powergate_sequence_power_up(TEGRA_POWERGATE_PCIE,
 						PERIPH_ID_PCIE);
 	if (err < 0) {
-		error("failed to power up PCIe partition: %d", err);
+		pr_err("failed to power up PCIe partition: %d", err);
 		return err;
 	}
 
@@ -647,7 +647,7 @@ static int tegra_pcie_power_on(struct tegra_pcie *pcie)
 
 	err = tegra_plle_enable();
 	if (err < 0) {
-		error("failed to enable PLLE: %d\n", err);
+		pr_err("failed to enable PLLE: %d\n", err);
 		return err;
 	}
 
@@ -707,7 +707,7 @@ static int tegra_pcie_phy_enable(struct tegra_pcie *pcie)
 	/* wait for the PLL to lock */
 	err = tegra_pcie_pll_wait(pcie, 500);
 	if (err < 0) {
-		error("PLL failed to lock: %d", err);
+		pr_err("PLL failed to lock: %d", err);
 		return err;
 	}
 
@@ -771,7 +771,7 @@ static int tegra_pcie_enable_controller(struct tegra_pcie *pcie)
 		err = tegra_pcie_phy_enable(pcie);
 
 	if (err < 0) {
-		error("failed to power on PHY: %d\n", err);
+		pr_err("failed to power on PHY: %d\n", err);
 		return err;
 	}
 #endif
@@ -780,7 +780,7 @@ static int tegra_pcie_enable_controller(struct tegra_pcie *pcie)
 #ifdef CONFIG_TEGRA186
 	err = reset_deassert(&pcie->reset_pcie_x);
 	if (err) {
-		error("reset_deassert(pcie_x) failed: %d\n", err);
+		pr_err("reset_deassert(pcie_x) failed: %d\n", err);
 		return err;
 	}
 #else
@@ -1145,25 +1145,25 @@ static int pci_tegra_probe(struct udevice *dev)
 
 	err = tegra_pcie_power_on(pcie);
 	if (err < 0) {
-		error("failed to power on");
+		pr_err("failed to power on");
 		return err;
 	}
 
 	err = tegra_pcie_enable_controller(pcie);
 	if (err < 0) {
-		error("failed to enable controller");
+		pr_err("failed to enable controller");
 		return err;
 	}
 
 	err = tegra_pcie_setup_translations(dev);
 	if (err < 0) {
-		error("failed to decode ranges");
+		pr_err("failed to decode ranges");
 		return err;
 	}
 
 	err = tegra_pcie_enable(pcie);
 	if (err < 0) {
-		error("failed to enable PCIe");
+		pr_err("failed to enable PCIe");
 		return err;
 	}
 
diff --git a/drivers/pci/pcie_xilinx.c b/drivers/pci/pcie_xilinx.c
index 08e2e93445..6b8b96a734 100644
--- a/drivers/pci/pcie_xilinx.c
+++ b/drivers/pci/pcie_xilinx.c
@@ -189,7 +189,7 @@ static int pcie_xilinx_ofdata_to_platdata(struct udevice *dev)
 	err = fdt_get_resource(gd->fdt_blob, dev_of_offset(dev), "reg",
 			       0, &reg_res);
 	if (err < 0) {
-		error("\"reg\" resource not found\n");
+		pr_err("\"reg\" resource not found\n");
 		return err;
 	}
 
diff --git a/drivers/phy/marvell/comphy_cp110.c b/drivers/phy/marvell/comphy_cp110.c
index 3ac405a9be..37187885fa 100644
--- a/drivers/phy/marvell/comphy_cp110.c
+++ b/drivers/phy/marvell/comphy_cp110.c
@@ -509,7 +509,7 @@ static int comphy_pcie_power_up(u32 lane, u32 pcie_width, bool clk_src,
 				debug("Read from reg = %p - value = 0x%x\n",
 				      hpipe_addr + HPIPE_LANE_STATUS1_REG,
 				      data);
-				error("HPIPE_LANE_STATUS1_PCLK_EN_MASK is 0\n");
+				pr_err("HPIPE_LANE_STATUS1_PCLK_EN_MASK is 0\n");
 				ret = 0;
 			}
 		}
@@ -633,7 +633,7 @@ static int comphy_usb3_power_up(u32 lane, void __iomem *hpipe_base,
 	if (data != 0) {
 		debug("Read from reg = %p - value = 0x%x\n",
 		      hpipe_addr + HPIPE_LANE_STATUS1_REG, data);
-		error("HPIPE_LANE_STATUS1_PCLK_EN_MASK is 0\n");
+		pr_err("HPIPE_LANE_STATUS1_PCLK_EN_MASK is 0\n");
 		ret = 0;
 	}
 
@@ -666,14 +666,14 @@ static int comphy_sata_power_up(u32 lane, void __iomem *hpipe_base,
 			gd->fdt_blob, sata_node, "marvell,armada-8k-ahci");
 
 	if (sata_node == 0) {
-		error("SATA node not found in FDT\n");
+		pr_err("SATA node not found in FDT\n");
 		return 0;
 	}
 
 	sata_base = (void __iomem *)fdtdec_get_addr_size_auto_noparent(
 		gd->fdt_blob, sata_node, "reg", 0, NULL, true);
 	if (sata_base == NULL) {
-		error("SATA address not found in FDT\n");
+		pr_err("SATA address not found in FDT\n");
 		return 0;
 	}
 
@@ -976,7 +976,7 @@ static int comphy_sata_power_up(u32 lane, void __iomem *hpipe_base,
 	if (data != 0) {
 		debug("Read from reg = %p - value = 0x%x\n",
 		      hpipe_addr + HPIPE_LANE_STATUS1_REG, data);
-		error("SD_EXTERNAL_STATUS0_PLL_TX is %d, SD_EXTERNAL_STATUS0_PLL_RX is %d\n",
+		pr_err("SD_EXTERNAL_STATUS0_PLL_TX is %d, SD_EXTERNAL_STATUS0_PLL_RX is %d\n",
 		      (data & SD_EXTERNAL_STATUS0_PLL_TX_MASK),
 		      (data & SD_EXTERNAL_STATUS0_PLL_RX_MASK));
 		ret = 0;
@@ -1099,7 +1099,7 @@ static int comphy_sgmii_power_up(u32 lane, u32 sgmii_speed,
 	if (data != 0) {
 		debug("Read from reg = %p - value = 0x%x\n",
 		      sd_ip_addr + SD_EXTERNAL_STATUS0_REG, data);
-		error("SD_EXTERNAL_STATUS0_PLL_RX is %d, SD_EXTERNAL_STATUS0_PLL_TX is %d\n",
+		pr_err("SD_EXTERNAL_STATUS0_PLL_RX is %d, SD_EXTERNAL_STATUS0_PLL_TX is %d\n",
 		      (data & SD_EXTERNAL_STATUS0_PLL_RX_MASK),
 		      (data & SD_EXTERNAL_STATUS0_PLL_TX_MASK));
 		ret = 0;
@@ -1117,7 +1117,7 @@ static int comphy_sgmii_power_up(u32 lane, u32 sgmii_speed,
 	data = polling_with_timeout(addr, data, mask, 100);
 	if (data != 0) {
 		debug("Read from reg = %p - value = 0x%x\n", sd_ip_addr + SD_EXTERNAL_STATUS0_REG, data);
-		error("SD_EXTERNAL_STATUS0_RX_INIT is 0\n");
+		pr_err("SD_EXTERNAL_STATUS0_RX_INIT is 0\n");
 		ret = 0;
 	}
 
@@ -1398,7 +1398,7 @@ static int comphy_sfi_power_up(u32 lane, void __iomem *hpipe_base,
 	data = polling_with_timeout(addr, data, mask, 15000);
 	if (data != 0) {
 		debug("Read from reg = %p - value = 0x%x\n", sd_ip_addr + SD_EXTERNAL_STATUS0_REG, data);
-		error("SD_EXTERNAL_STATUS0_PLL_RX is %d, SD_EXTERNAL_STATUS0_PLL_TX is %d\n",
+		pr_err("SD_EXTERNAL_STATUS0_PLL_RX is %d, SD_EXTERNAL_STATUS0_PLL_TX is %d\n",
 		      (data & SD_EXTERNAL_STATUS0_PLL_RX_MASK),
 		      (data & SD_EXTERNAL_STATUS0_PLL_TX_MASK));
 		ret = 0;
@@ -1418,7 +1418,7 @@ static int comphy_sfi_power_up(u32 lane, void __iomem *hpipe_base,
 	if (data != 0) {
 		debug("Read from reg = %p - value = 0x%x\n",
 		      sd_ip_addr + SD_EXTERNAL_STATUS0_REG, data);
-		error("SD_EXTERNAL_STATUS0_RX_INIT is 0\n");
+		pr_err("SD_EXTERNAL_STATUS0_RX_INIT is 0\n");
 		ret = 0;
 	}
 
@@ -1577,7 +1577,7 @@ static int comphy_rxauii_power_up(u32 lane, void __iomem *hpipe_base,
 	if (data != 0) {
 		debug("Read from reg = %p - value = 0x%x\n",
 		      sd_ip_addr + SD_EXTERNAL_STATUS0_REG, data);
-		error("SD_EXTERNAL_STATUS0_PLL_RX is %d, SD_EXTERNAL_STATUS0_PLL_TX is %d\n",
+		pr_err("SD_EXTERNAL_STATUS0_PLL_RX is %d, SD_EXTERNAL_STATUS0_PLL_TX is %d\n",
 		      (data & SD_EXTERNAL_STATUS0_PLL_RX_MASK),
 		      (data & SD_EXTERNAL_STATUS0_PLL_TX_MASK));
 		ret = 0;
@@ -1596,7 +1596,7 @@ static int comphy_rxauii_power_up(u32 lane, void __iomem *hpipe_base,
 	if (data != 0) {
 		debug("Read from reg = %p - value = 0x%x\n",
 		      sd_ip_addr + SD_EXTERNAL_STATUS0_REG, data);
-		error("SD_EXTERNAL_STATUS0_RX_INIT is 0\n");
+		pr_err("SD_EXTERNAL_STATUS0_RX_INIT is 0\n");
 		ret = 0;
 	}
 
@@ -1742,7 +1742,7 @@ static int comphy_utmi_power_up(u32 utmi_index, void __iomem *utmi_base_addr,
 	mask = data;
 	data = polling_with_timeout(addr, data, mask, 100);
 	if (data != 0) {
-		error("Impedance calibration is not done\n");
+		pr_err("Impedance calibration is not done\n");
 		debug("Read from reg = %p - value = 0x%x\n", addr, data);
 		ret = 0;
 	}
@@ -1751,7 +1751,7 @@ static int comphy_utmi_power_up(u32 utmi_index, void __iomem *utmi_base_addr,
 	mask = data;
 	data = polling_with_timeout(addr, data, mask, 100);
 	if (data != 0) {
-		error("PLL calibration is not done\n");
+		pr_err("PLL calibration is not done\n");
 		debug("Read from reg = %p - value = 0x%x\n", addr, data);
 		ret = 0;
 	}
@@ -1761,7 +1761,7 @@ static int comphy_utmi_power_up(u32 utmi_index, void __iomem *utmi_base_addr,
 	mask = data;
 	data = polling_with_timeout(addr, data, mask, 100);
 	if (data != 0) {
-		error("PLL is not ready\n");
+		pr_err("PLL is not ready\n");
 		debug("Read from reg = %p - value = 0x%x\n", addr, data);
 		ret = 0;
 	}
@@ -1818,7 +1818,7 @@ static void comphy_utmi_phy_init(u32 utmi_phy_count,
 					  cp110_utmi_data[i].usb_cfg_addr,
 					  cp110_utmi_data[i].utmi_cfg_addr,
 					  cp110_utmi_data[i].utmi_phy_port)) {
-			error("Failed to initialize UTMI PHY %d\n", i);
+			pr_err("Failed to initialize UTMI PHY %d\n", i);
 			continue;
 		}
 		printf("UTMI PHY %d initialized to ", i);
@@ -1864,7 +1864,7 @@ void comphy_dedicated_phys_init(void)
 			(void __iomem *)fdtdec_get_addr_size_auto_noparent(
 				gd->fdt_blob, node, "reg", 0, NULL, true);
 		if (cp110_utmi_data[i].utmi_base_addr == NULL) {
-			error("UTMI PHY base address is invalid\n");
+			pr_err("UTMI PHY base address is invalid\n");
 			i++;
 			continue;
 		}
@@ -1874,7 +1874,7 @@ void comphy_dedicated_phys_init(void)
 			(void __iomem *)fdtdec_get_addr_size_auto_noparent(
 				gd->fdt_blob, node, "reg", 1, NULL, true);
 		if (cp110_utmi_data[i].usb_cfg_addr == NULL) {
-			error("UTMI PHY base address is invalid\n");
+			pr_err("UTMI PHY base address is invalid\n");
 			i++;
 			continue;
 		}
@@ -1884,7 +1884,7 @@ void comphy_dedicated_phys_init(void)
 			(void __iomem *)fdtdec_get_addr_size_auto_noparent(
 				gd->fdt_blob, node, "reg", 2, NULL, true);
 		if (cp110_utmi_data[i].utmi_cfg_addr == NULL) {
-			error("UTMI PHY base address is invalid\n");
+			pr_err("UTMI PHY base address is invalid\n");
 			i++;
 			continue;
 		}
@@ -1896,7 +1896,7 @@ void comphy_dedicated_phys_init(void)
 		cp110_utmi_data[i].utmi_phy_port = fdtdec_get_int(
 			gd->fdt_blob, node, "utmi-port", UTMI_PHY_INVALID);
 		if (cp110_utmi_data[i].utmi_phy_port == UTMI_PHY_INVALID) {
-			error("UTMI PHY port type is invalid\n");
+			pr_err("UTMI PHY port type is invalid\n");
 			i++;
 			continue;
 		}
@@ -2049,7 +2049,7 @@ int comphy_cp110_init(struct chip_serdes_phy_config *ptr_chip_cfg,
 			 * PHY_TYPE_UNCONNECTED state.
 			 */
 			ptr_comphy_map->type = PHY_TYPE_UNCONNECTED;
-			error("PLL is not locked - Failed to initialize lane %d\n",
+			pr_err("PLL is not locked - Failed to initialize lane %d\n",
 			      lane);
 		}
 	}
diff --git a/drivers/phy/ti-pipe3-phy.c b/drivers/phy/ti-pipe3-phy.c
index 680e32f3ea..babf2ffe39 100644
--- a/drivers/phy/ti-pipe3-phy.c
+++ b/drivers/phy/ti-pipe3-phy.c
@@ -261,7 +261,7 @@ static int pipe3_exit(struct phy *phy)
 	} while (--timeout);
 
 	if (!(val & PLL_TICOPWDN) || !(val & PLL_LDOPWDN)) {
-		error("%s: Failed to power down DPLL: PLL_STATUS 0x%x\n",
+		pr_err("%s: Failed to power down DPLL: PLL_STATUS 0x%x\n",
 		      __func__, val);
 		return -EBUSY;
 	}
@@ -284,14 +284,14 @@ static void *get_reg(struct udevice *dev, const char *name)
 	err = uclass_get_device_by_phandle(UCLASS_SYSCON, dev,
 					   name, &syscon);
 	if (err) {
-		error("unable to find syscon device for %s (%d)\n",
+		pr_err("unable to find syscon device for %s (%d)\n",
 		      name, err);
 		return NULL;
 	}
 
 	regmap = syscon_get_regmap(syscon);
 	if (IS_ERR(regmap)) {
-		error("unable to find regmap for %s (%ld)\n",
+		pr_err("unable to find regmap for %s (%ld)\n",
 		      name, PTR_ERR(regmap));
 		return NULL;
 	}
@@ -299,7 +299,7 @@ static void *get_reg(struct udevice *dev, const char *name)
 	cell = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), name,
 			   &len);
 	if (len < 2*sizeof(fdt32_t)) {
-		error("offset not available for %s\n", name);
+		pr_err("offset not available for %s\n", name);
 		return NULL;
 	}
 
@@ -318,13 +318,13 @@ static int pipe3_phy_probe(struct udevice *dev)
 
 	addr = devfdt_get_addr_size_index(dev, 2, &sz);
 	if (addr == FDT_ADDR_T_NONE) {
-		error("missing pll ctrl address\n");
+		pr_err("missing pll ctrl address\n");
 		return -EINVAL;
 	}
 
 	pipe3->pll_ctrl_base = map_physmem(addr, sz, MAP_NOCACHE);
 	if (!pipe3->pll_ctrl_base) {
-		error("unable to remap pll ctrl\n");
+		pr_err("unable to remap pll ctrl\n");
 		return -EINVAL;
 	}
 
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
index 27165b0007..2bf853eba1 100644
--- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
@@ -578,7 +578,7 @@ int armada_37xx_pinctrl_probe(struct udevice *dev)
 
 	info->base = (void __iomem *)devfdt_get_addr(dev);
 	if (!info->base) {
-		error("unable to find regmap\n");
+		pr_err("unable to find regmap\n");
 		return -ENODEV;
 	}
 
diff --git a/drivers/pinctrl/pinctrl-sti.c b/drivers/pinctrl/pinctrl-sti.c
index 40341b4eeb..735e412f60 100644
--- a/drivers/pinctrl/pinctrl-sti.c
+++ b/drivers/pinctrl/pinctrl-sti.c
@@ -142,7 +142,7 @@ void sti_pin_configure(struct udevice *dev, struct sti_pin_desc *pin_desc)
 		break;
 
 	default:
-		error("%s invalid direction value: 0x%x\n",
+		pr_err("%s invalid direction value: 0x%x\n",
 		      __func__, pin_desc->dir);
 		BUG();
 		break;
@@ -237,14 +237,14 @@ static int sti_pinctrl_set_state(struct udevice *dev, struct udevice *config)
 						     prop_name, "#gpio-cells",
 						     0, 0, &args);
 		if (ret < 0) {
-			error("Can't get the gpio bank phandle: %d\n", ret);
+			pr_err("Can't get the gpio bank phandle: %d\n", ret);
 			return ret;
 		}
 
 		bank_name = fdt_getprop(blob, args.node, "st,bank-name",
 					&count);
 		if (count < 0) {
-			error("Can't find bank-name property %d\n", count);
+			pr_err("Can't find bank-name property %d\n", count);
 			return -EINVAL;
 		}
 
@@ -254,12 +254,12 @@ static int sti_pinctrl_set_state(struct udevice *dev, struct udevice *config)
 						   prop_name, cells,
 						   ARRAY_SIZE(cells));
 		if (count < 0) {
-			error("Bad pin configuration array %d\n", count);
+			pr_err("Bad pin configuration array %d\n", count);
 			return -EINVAL;
 		}
 
 		if (count > MAX_STI_PINCONF_ENTRIES) {
-			error("Unsupported pinconf array count %d\n", count);
+			pr_err("Unsupported pinconf array count %d\n", count);
 			return -EINVAL;
 		}
 
@@ -284,13 +284,13 @@ static int sti_pinctrl_probe(struct udevice *dev)
 	err = uclass_get_device_by_phandle(UCLASS_SYSCON, dev,
 					   "st,syscfg", &syscon);
 	if (err) {
-		error("unable to find syscon device\n");
+		pr_err("unable to find syscon device\n");
 		return err;
 	}
 
 	plat->regmap = syscon_get_regmap(syscon);
 	if (!plat->regmap) {
-		error("unable to find regmap\n");
+		pr_err("unable to find regmap\n");
 		return -ENODEV;
 	}
 
diff --git a/drivers/pinctrl/pinctrl_stm32.c b/drivers/pinctrl/pinctrl_stm32.c
index fb2593c690..62ba089083 100644
--- a/drivers/pinctrl/pinctrl_stm32.c
+++ b/drivers/pinctrl/pinctrl_stm32.c
@@ -160,7 +160,7 @@ static int stm32_pinctrl_set_state_simple(struct udevice *dev,
 
 		config_node = fdt_node_offset_by_phandle(fdt, phandle);
 		if (config_node < 0) {
-			error("prop pinctrl-0 index %d invalid phandle\n", i);
+			pr_err("prop pinctrl-0 index %d invalid phandle\n", i);
 			return -EINVAL;
 		}
 
diff --git a/drivers/power/pmic/as3722.c b/drivers/power/pmic/as3722.c
index 4efe8ee183..3b0427e0b9 100644
--- a/drivers/power/pmic/as3722.c
+++ b/drivers/power/pmic/as3722.c
@@ -46,14 +46,14 @@ static int as3722_read_id(struct udevice *dev, uint *idp, uint *revisionp)
 
 	ret = pmic_reg_read(dev, AS3722_ASIC_ID1);
 	if (ret < 0) {
-		error("failed to read ID1 register: %d", ret);
+		pr_err("failed to read ID1 register: %d", ret);
 		return ret;
 	}
 	*idp = ret;
 
 	ret = pmic_reg_read(dev, AS3722_ASIC_ID2);
 	if (ret < 0) {
-		error("failed to read ID2 register: %d", ret);
+		pr_err("failed to read ID2 register: %d", ret);
 		return ret;
 	}
 	*revisionp = ret;
@@ -71,7 +71,7 @@ int as3722_sd_set_voltage(struct udevice *dev, unsigned int sd, u8 value)
 
 	ret = pmic_reg_write(dev, AS3722_SD_VOLTAGE(sd), value);
 	if (ret < 0) {
-		error("failed to write SD%u voltage register: %d", sd, ret);
+		pr_err("failed to write SD%u voltage register: %d", sd, ret);
 		return ret;
 	}
 
@@ -87,7 +87,7 @@ int as3722_ldo_set_voltage(struct udevice *dev, unsigned int ldo, u8 value)
 
 	ret = pmic_reg_write(dev, AS3722_LDO_VOLTAGE(ldo), value);
 	if (ret < 0) {
-		error("failed to write LDO%u voltage register: %d", ldo,
+		pr_err("failed to write LDO%u voltage register: %d", ldo,
 		      ret);
 		return ret;
 	}
@@ -102,12 +102,12 @@ static int as3722_probe(struct udevice *dev)
 
 	ret = as3722_read_id(dev, &id, &revision);
 	if (ret < 0) {
-		error("failed to read ID: %d", ret);
+		pr_err("failed to read ID: %d", ret);
 		return ret;
 	}
 
 	if (id != AS3722_DEVICE_ID) {
-		error("unknown device");
+		pr_err("unknown device");
 		return -ENOENT;
 	}
 
diff --git a/drivers/power/pmic/as3722_gpio.c b/drivers/power/pmic/as3722_gpio.c
index d0b681ca4a..5cf4cb6b51 100644
--- a/drivers/power/pmic/as3722_gpio.c
+++ b/drivers/power/pmic/as3722_gpio.c
@@ -26,7 +26,7 @@ int as3722_gpio_configure(struct udevice *pmic, unsigned int gpio,
 
 	err = pmic_reg_write(pmic, AS3722_GPIO_CONTROL(gpio), value);
 	if (err) {
-		error("failed to configure GPIO#%u: %d", gpio, err);
+		pr_err("failed to configure GPIO#%u: %d", gpio, err);
 		return err;
 	}
 
@@ -46,7 +46,7 @@ static int as3722_gpio_set_value(struct udevice *dev, unsigned int gpio,
 
 	err = pmic_reg_read(pmic, AS3722_GPIO_SIGNAL_OUT);
 	if (err < 0) {
-		error("failed to read GPIO signal out register: %d", err);
+		pr_err("failed to read GPIO signal out register: %d", err);
 		return err;
 	}
 	value = err;
@@ -61,7 +61,7 @@ static int as3722_gpio_set_value(struct udevice *dev, unsigned int gpio,
 
 	err = pmic_reg_write(pmic, AS3722_GPIO_SIGNAL_OUT, value);
 	if (err) {
-		error("failed to set GPIO#%u %s: %d", gpio, l, err);
+		pr_err("failed to set GPIO#%u %s: %d", gpio, l, err);
 		return err;
 	}
 
@@ -84,13 +84,13 @@ int as3722_gpio_direction_output(struct udevice *dev, unsigned int gpio,
 
 	err = pmic_reg_write(pmic, AS3722_GPIO_CONTROL(gpio), value);
 	if (err) {
-		error("failed to configure GPIO#%u as output: %d", gpio, err);
+		pr_err("failed to configure GPIO#%u as output: %d", gpio, err);
 		return err;
 	}
 
 	err = as3722_gpio_set_value(pmic, gpio, value);
 	if (err < 0) {
-		error("failed to set GPIO#%u high: %d", gpio, err);
+		pr_err("failed to set GPIO#%u high: %d", gpio, err);
 		return err;
 	}
 
diff --git a/drivers/power/pmic/i2c_pmic_emul.c b/drivers/power/pmic/i2c_pmic_emul.c
index 2d35d09d45..38a2a04f17 100644
--- a/drivers/power/pmic/i2c_pmic_emul.c
+++ b/drivers/power/pmic/i2c_pmic_emul.c
@@ -31,7 +31,7 @@ static int sandbox_i2c_pmic_read_data(struct udevice *emul, uchar chip,
 	struct sandbox_i2c_pmic_plat_data *plat = dev_get_platdata(emul);
 
 	if (plat->rw_reg + len > SANDBOX_PMIC_REG_COUNT) {
-		error("Request exceeds PMIC register range! Max register: %#x",
+		pr_err("Request exceeds PMIC register range! Max register: %#x",
 		      SANDBOX_PMIC_REG_COUNT);
 		return -EFAULT;
 	}
@@ -68,7 +68,7 @@ static int sandbox_i2c_pmic_write_data(struct udevice *emul, uchar chip,
 	len--;
 
 	if (plat->rw_reg + len > SANDBOX_PMIC_REG_COUNT) {
-		error("Request exceeds PMIC register range! Max register: %#x",
+		pr_err("Request exceeds PMIC register range! Max register: %#x",
 		      SANDBOX_PMIC_REG_COUNT);
 	}
 
@@ -111,7 +111,7 @@ static int sandbox_i2c_pmic_ofdata_to_platdata(struct udevice *emul)
 					     SANDBOX_PMIC_REG_COUNT);
 
 	if (!reg_defaults) {
-		error("Property \"reg-defaults\" not found for device: %s!",
+		pr_err("Property \"reg-defaults\" not found for device: %s!",
 		      emul->name);
 		return -EINVAL;
 	}
diff --git a/drivers/power/pmic/lp873x.c b/drivers/power/pmic/lp873x.c
index f505468313..95c2b7e8c7 100644
--- a/drivers/power/pmic/lp873x.c
+++ b/drivers/power/pmic/lp873x.c
@@ -27,7 +27,7 @@ static int lp873x_write(struct udevice *dev, uint reg, const uint8_t *buff,
 			  int len)
 {
 	if (dm_i2c_write(dev, reg, buff, len)) {
-		error("write error to device: %p register: %#x!", dev, reg);
+		pr_err("write error to device: %p register: %#x!", dev, reg);
 		return -EIO;
 	}
 
@@ -37,7 +37,7 @@ static int lp873x_write(struct udevice *dev, uint reg, const uint8_t *buff,
 static int lp873x_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
 {
 	if (dm_i2c_read(dev, reg, buff, len)) {
-		error("read error from device: %p register: %#x!", dev, reg);
+		pr_err("read error from device: %p register: %#x!", dev, reg);
 		return -EIO;
 	}
 
diff --git a/drivers/power/pmic/lp87565.c b/drivers/power/pmic/lp87565.c
index 782a46c4cc..506769e362 100644
--- a/drivers/power/pmic/lp87565.c
+++ b/drivers/power/pmic/lp87565.c
@@ -29,7 +29,7 @@ static int lp87565_write(struct udevice *dev, uint reg, const uint8_t *buff,
 
 	ret = dm_i2c_write(dev, reg, buff, len);
 	if (ret)
-		error("write error to device: %p register: %#x!", dev, reg);
+		pr_err("write error to device: %p register: %#x!", dev, reg);
 
 	return ret;
 }
@@ -40,7 +40,7 @@ static int lp87565_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
 
 	ret = dm_i2c_read(dev, reg, buff, len);
 	if (ret)
-		error("read error from device: %p register: %#x!", dev, reg);
+		pr_err("read error from device: %p register: %#x!", dev, reg);
 
 	return ret;
 }
diff --git a/drivers/power/pmic/max77686.c b/drivers/power/pmic/max77686.c
index ceca9f96a7..b3ed84992f 100644
--- a/drivers/power/pmic/max77686.c
+++ b/drivers/power/pmic/max77686.c
@@ -31,7 +31,7 @@ static int max77686_write(struct udevice *dev, uint reg, const uint8_t *buff,
 			  int len)
 {
 	if (dm_i2c_write(dev, reg, buff, len)) {
-		error("write error to device: %p register: %#x!", dev, reg);
+		pr_err("write error to device: %p register: %#x!", dev, reg);
 		return -EIO;
 	}
 
@@ -41,7 +41,7 @@ static int max77686_write(struct udevice *dev, uint reg, const uint8_t *buff,
 static int max77686_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
 {
 	if (dm_i2c_read(dev, reg, buff, len)) {
-		error("read error from device: %p register: %#x!", dev, reg);
+		pr_err("read error from device: %p register: %#x!", dev, reg);
 		return -EIO;
 	}
 
diff --git a/drivers/power/pmic/max8997.c b/drivers/power/pmic/max8997.c
index f749d7debf..5ebeb8a316 100644
--- a/drivers/power/pmic/max8997.c
+++ b/drivers/power/pmic/max8997.c
@@ -26,7 +26,7 @@ static int max8997_write(struct udevice *dev, uint reg, const uint8_t *buff,
 
 	ret = dm_i2c_write(dev, reg, buff, len);
 	if (ret)
-		error("write error to device: %p register: %#x!", dev, reg);
+		pr_err("write error to device: %p register: %#x!", dev, reg);
 
 	return ret;
 }
@@ -37,7 +37,7 @@ static int max8997_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
 
 	ret = dm_i2c_read(dev, reg, buff, len);
 	if (ret)
-		error("read error from device: %p register: %#x!", dev, reg);
+		pr_err("read error from device: %p register: %#x!", dev, reg);
 
 	return ret;
 }
diff --git a/drivers/power/pmic/max8998.c b/drivers/power/pmic/max8998.c
index 7c4773c7b3..a7e04699e8 100644
--- a/drivers/power/pmic/max8998.c
+++ b/drivers/power/pmic/max8998.c
@@ -26,7 +26,7 @@ static int max8998_write(struct udevice *dev, uint reg, const uint8_t *buff,
 
 	ret = dm_i2c_write(dev, reg, buff, len);
 	if (ret)
-		error("write error to device: %p register: %#x!", dev, reg);
+		pr_err("write error to device: %p register: %#x!", dev, reg);
 
 	return ret;
 }
@@ -37,7 +37,7 @@ static int max8998_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
 
 	ret = dm_i2c_read(dev, reg, buff, len);
 	if (ret)
-		error("read error from device: %p register: %#x!", dev, reg);
+		pr_err("read error from device: %p register: %#x!", dev, reg);
 
 	return ret;
 }
diff --git a/drivers/power/pmic/palmas.c b/drivers/power/pmic/palmas.c
index 804c0d13a0..1e1ecb382e 100644
--- a/drivers/power/pmic/palmas.c
+++ b/drivers/power/pmic/palmas.c
@@ -27,7 +27,7 @@ static int palmas_write(struct udevice *dev, uint reg, const uint8_t *buff,
 			  int len)
 {
 	if (dm_i2c_write(dev, reg, buff, len)) {
-		error("write error to device: %p register: %#x!", dev, reg);
+		pr_err("write error to device: %p register: %#x!", dev, reg);
 		return -EIO;
 	}
 
@@ -37,7 +37,7 @@ static int palmas_write(struct udevice *dev, uint reg, const uint8_t *buff,
 static int palmas_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
 {
 	if (dm_i2c_read(dev, reg, buff, len)) {
-		error("read error from device: %p register: %#x!", dev, reg);
+		pr_err("read error from device: %p register: %#x!", dev, reg);
 		return -EIO;
 	}
 
diff --git a/drivers/power/pmic/pfuze100.c b/drivers/power/pmic/pfuze100.c
index 5f361c7696..a06cbc07d4 100644
--- a/drivers/power/pmic/pfuze100.c
+++ b/drivers/power/pmic/pfuze100.c
@@ -33,7 +33,7 @@ static int pfuze100_write(struct udevice *dev, uint reg, const uint8_t *buff,
 			  int len)
 {
 	if (dm_i2c_write(dev, reg, buff, len)) {
-		error("write error to device: %p register: %#x!", dev, reg);
+		pr_err("write error to device: %p register: %#x!", dev, reg);
 		return -EIO;
 	}
 
@@ -43,7 +43,7 @@ static int pfuze100_write(struct udevice *dev, uint reg, const uint8_t *buff,
 static int pfuze100_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
 {
 	if (dm_i2c_read(dev, reg, buff, len)) {
-		error("read error from device: %p register: %#x!", dev, reg);
+		pr_err("read error from device: %p register: %#x!", dev, reg);
 		return -EIO;
 	}
 
diff --git a/drivers/power/pmic/s2mps11.c b/drivers/power/pmic/s2mps11.c
index 9d83059c40..522105e5ff 100644
--- a/drivers/power/pmic/s2mps11.c
+++ b/drivers/power/pmic/s2mps11.c
@@ -27,7 +27,7 @@ static int s2mps11_write(struct udevice *dev, uint reg, const uint8_t *buff,
 
 	ret = dm_i2c_write(dev, reg, buff, len);
 	if (ret)
-		error("write error to device: %p register: %#x!", dev, reg);
+		pr_err("write error to device: %p register: %#x!", dev, reg);
 
 	return ret;
 }
@@ -38,7 +38,7 @@ static int s2mps11_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
 
 	ret = dm_i2c_read(dev, reg, buff, len);
 	if (ret)
-		error("read error from device: %p register: %#x!", dev, reg);
+		pr_err("read error from device: %p register: %#x!", dev, reg);
 
 	return ret;
 }
diff --git a/drivers/power/pmic/s5m8767.c b/drivers/power/pmic/s5m8767.c
index f8ae5ea2db..3812e240ab 100644
--- a/drivers/power/pmic/s5m8767.c
+++ b/drivers/power/pmic/s5m8767.c
@@ -30,7 +30,7 @@ static int s5m8767_write(struct udevice *dev, uint reg, const uint8_t *buff,
 			  int len)
 {
 	if (dm_i2c_write(dev, reg, buff, len)) {
-		error("write error to device: %p register: %#x!", dev, reg);
+		pr_err("write error to device: %p register: %#x!", dev, reg);
 		return -EIO;
 	}
 
@@ -40,7 +40,7 @@ static int s5m8767_write(struct udevice *dev, uint reg, const uint8_t *buff,
 static int s5m8767_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
 {
 	if (dm_i2c_read(dev, reg, buff, len)) {
-		error("read error from device: %p register: %#x!", dev, reg);
+		pr_err("read error from device: %p register: %#x!", dev, reg);
 		return -EIO;
 	}
 
diff --git a/drivers/power/pmic/sandbox.c b/drivers/power/pmic/sandbox.c
index 6763303c66..e8d6faca16 100644
--- a/drivers/power/pmic/sandbox.c
+++ b/drivers/power/pmic/sandbox.c
@@ -31,7 +31,7 @@ static int sandbox_pmic_write(struct udevice *dev, uint reg,
 			      const uint8_t *buff, int len)
 {
 	if (dm_i2c_write(dev, reg, buff, len)) {
-		error("write error to device: %p register: %#x!", dev, reg);
+		pr_err("write error to device: %p register: %#x!", dev, reg);
 		return -EIO;
 	}
 
@@ -42,7 +42,7 @@ static int sandbox_pmic_read(struct udevice *dev, uint reg,
 			     uint8_t *buff, int len)
 {
 	if (dm_i2c_read(dev, reg, buff, len)) {
-		error("read error from device: %p register: %#x!", dev, reg);
+		pr_err("read error from device: %p register: %#x!", dev, reg);
 		return -EIO;
 	}
 
@@ -52,7 +52,7 @@ static int sandbox_pmic_read(struct udevice *dev, uint reg,
 static int sandbox_pmic_bind(struct udevice *dev)
 {
 	if (!pmic_bind_children(dev, dev_ofnode(dev), pmic_children_info))
-		error("%s:%d PMIC: %s - no child found!", __func__, __LINE__,
+		pr_err("%s:%d PMIC: %s - no child found!", __func__, __LINE__,
 							  dev->name);
 
 	/* Always return success for this device - allows for PMIC I/O */
diff --git a/drivers/power/pmic/tps65090.c b/drivers/power/pmic/tps65090.c
index 4565e3b54c..ee5358bced 100644
--- a/drivers/power/pmic/tps65090.c
+++ b/drivers/power/pmic/tps65090.c
@@ -29,7 +29,7 @@ static int tps65090_write(struct udevice *dev, uint reg, const uint8_t *buff,
 			  int len)
 {
 	if (dm_i2c_write(dev, reg, buff, len)) {
-		error("write error to device: %p register: %#x!", dev, reg);
+		pr_err("write error to device: %p register: %#x!", dev, reg);
 		return -EIO;
 	}
 
@@ -42,7 +42,7 @@ static int tps65090_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
 
 	ret = dm_i2c_read(dev, reg, buff, len);
 	if (ret) {
-		error("read error %d from device: %p register: %#x!", ret, dev,
+		pr_err("read error %d from device: %p register: %#x!", ret, dev,
 		      reg);
 		return -EIO;
 	}
diff --git a/drivers/power/regulator/fixed.c b/drivers/power/regulator/fixed.c
index 35c292222b..97b4a98bf0 100644
--- a/drivers/power/regulator/fixed.c
+++ b/drivers/power/regulator/fixed.c
@@ -117,7 +117,7 @@ static int fixed_regulator_set_enable(struct udevice *dev, bool enable)
 
 	ret = dm_gpio_set_value(&dev_pdata->gpio, enable);
 	if (ret) {
-		error("Can't set regulator : %s gpio to: %d\n", dev->name,
+		pr_err("Can't set regulator : %s gpio to: %d\n", dev->name,
 		      enable);
 		return ret;
 	}
diff --git a/drivers/power/regulator/gpio-regulator.c b/drivers/power/regulator/gpio-regulator.c
index 42391c69b4..1031a0362b 100644
--- a/drivers/power/regulator/gpio-regulator.c
+++ b/drivers/power/regulator/gpio-regulator.c
@@ -109,7 +109,7 @@ static int gpio_regulator_set_value(struct udevice *dev, int uV)
 
 	ret = dm_gpio_set_value(&dev_pdata->gpio, enable);
 	if (ret) {
-		error("Can't set regulator : %s gpio to: %d\n", dev->name,
+		pr_err("Can't set regulator : %s gpio to: %d\n", dev->name,
 		      enable);
 		return ret;
 	}
diff --git a/drivers/power/regulator/max77686.c b/drivers/power/regulator/max77686.c
index 8780806cff..2212d36ed6 100644
--- a/drivers/power/regulator/max77686.c
+++ b/drivers/power/regulator/max77686.c
@@ -98,7 +98,7 @@ static int max77686_buck_volt2hex(int buck, int uV)
 	if (hex >= 0 && hex <= hex_max)
 		return hex;
 
-	error("Value: %d uV is wrong for BUCK%d", uV, buck);
+	pr_err("Value: %d uV is wrong for BUCK%d", uV, buck);
 	return -EINVAL;
 }
 
@@ -134,7 +134,7 @@ static int max77686_buck_hex2volt(int buck, int hex)
 	return uV;
 
 bad_hex:
-	error("Value: %#x is wrong for BUCK%d", hex, buck);
+	pr_err("Value: %#x is wrong for BUCK%d", hex, buck);
 	return -EINVAL;
 }
 
@@ -160,7 +160,7 @@ static int max77686_ldo_volt2hex(int ldo, int uV)
 	if (hex >= 0 && hex <= MAX77686_LDO_VOLT_MAX_HEX)
 		return hex;
 
-	error("Value: %d uV is wrong for LDO%d", uV, ldo);
+	pr_err("Value: %d uV is wrong for LDO%d", uV, ldo);
 	return -EINVAL;
 }
 
@@ -189,7 +189,7 @@ static int max77686_ldo_hex2volt(int ldo, int hex)
 	return uV;
 
 bad_hex:
-	error("Value: %#x is wrong for ldo%d", hex, ldo);
+	pr_err("Value: %#x is wrong for ldo%d", hex, ldo);
 	return -EINVAL;
 }
 
@@ -328,7 +328,7 @@ static int max77686_ldo_val(struct udevice *dev, int op, int *uV)
 
 	ldo = dev->driver_data;
 	if (ldo < 1 || ldo > MAX77686_LDO_NUM) {
-		error("Wrong ldo number: %d", ldo);
+		pr_err("Wrong ldo number: %d", ldo);
 		return -EINVAL;
 	}
 
@@ -366,7 +366,7 @@ static int max77686_buck_val(struct udevice *dev, int op, int *uV)
 
 	buck = dev->driver_data;
 	if (buck < 1 || buck > MAX77686_BUCK_NUM) {
-		error("Wrong buck number: %d", buck);
+		pr_err("Wrong buck number: %d", buck);
 		return -EINVAL;
 	}
 
@@ -423,7 +423,7 @@ static int max77686_ldo_mode(struct udevice *dev, int op, int *opmode)
 
 	ldo = dev->driver_data;
 	if (ldo < 1 || ldo > MAX77686_LDO_NUM) {
-		error("Wrong ldo number: %d", ldo);
+		pr_err("Wrong ldo number: %d", ldo);
 		return -EINVAL;
 	}
 
@@ -493,7 +493,7 @@ static int max77686_ldo_mode(struct udevice *dev, int op, int *opmode)
 	}
 
 	if (mode == 0xff) {
-		error("Wrong mode: %d for ldo%d", *opmode, ldo);
+		pr_err("Wrong mode: %d for ldo%d", *opmode, ldo);
 		return -EINVAL;
 	}
 
@@ -545,7 +545,7 @@ static int max77686_buck_mode(struct udevice *dev, int op, int *opmode)
 
 	buck = dev->driver_data;
 	if (buck < 1 || buck > MAX77686_BUCK_NUM) {
-		error("Wrong buck number: %d", buck);
+		pr_err("Wrong buck number: %d", buck);
 		return -EINVAL;
 	}
 
@@ -614,7 +614,7 @@ static int max77686_buck_mode(struct udevice *dev, int op, int *opmode)
 	}
 
 	if (mode == 0xff) {
-		error("Wrong mode: %d for buck: %d\n", *opmode, buck);
+		pr_err("Wrong mode: %d for buck: %d\n", *opmode, buck);
 		return -EINVAL;
 	}
 
diff --git a/drivers/power/regulator/sandbox.c b/drivers/power/regulator/sandbox.c
index 06c09fd051..f980a17389 100644
--- a/drivers/power/regulator/sandbox.c
+++ b/drivers/power/regulator/sandbox.c
@@ -87,7 +87,7 @@ int out_get_value(struct udevice *dev, int output_count, int reg_type,
 	int ret;
 
 	if (dev->driver_data > output_count) {
-		error("Unknown regulator number: %lu for PMIC %s!",
+		pr_err("Unknown regulator number: %lu for PMIC %s!",
 		      dev->driver_data, dev->name);
 		return -EINVAL;
 	}
@@ -95,7 +95,7 @@ int out_get_value(struct udevice *dev, int output_count, int reg_type,
 	reg = (dev->driver_data - 1) * OUT_REG_COUNT + reg_type;
 	ret = pmic_read(dev->parent, reg, &reg_val, 1);
 	if (ret) {
-		error("PMIC read failed: %d\n",  ret);
+		pr_err("PMIC read failed: %d\n",  ret);
 		return ret;
 	}
 
@@ -115,14 +115,14 @@ static int out_set_value(struct udevice *dev, int output_count, int reg_type,
 	int max_value;
 
 	if (dev->driver_data > output_count) {
-		error("Unknown regulator number: %lu for PMIC %s!",
+		pr_err("Unknown regulator number: %lu for PMIC %s!",
 		      dev->driver_data, dev->name);
 		return -EINVAL;
 	}
 
 	max_value = range[dev->driver_data - 1].max;
 	if (value > max_value) {
-		error("Wrong value for %s: %lu. Max is: %d.",
+		pr_err("Wrong value for %s: %lu. Max is: %d.",
 		      dev->name, dev->driver_data, max_value);
 		return -EINVAL;
 	}
@@ -134,7 +134,7 @@ static int out_set_value(struct udevice *dev, int output_count, int reg_type,
 	reg = (dev->driver_data - 1) * OUT_REG_COUNT + reg_type;
 	ret = pmic_write(dev->parent, reg, &reg_val, 1);
 	if (ret) {
-		error("PMIC write failed: %d\n",  ret);
+		pr_err("PMIC write failed: %d\n",  ret);
 		return ret;
 	}
 
@@ -154,7 +154,7 @@ static int out_get_mode(struct udevice *dev)
 	reg = (dev->driver_data - 1) * OUT_REG_COUNT + OUT_REG_OM;
 	ret = pmic_read(dev->parent, reg, &reg_val, 1);
 	if (ret) {
-		error("PMIC read failed: %d\n",  ret);
+		pr_err("PMIC read failed: %d\n",  ret);
 		return ret;
 	}
 
@@ -163,7 +163,7 @@ static int out_get_mode(struct udevice *dev)
 			return uc_pdata->mode[i].id;
 	}
 
-	error("Unknown operation mode for %s!", dev->name);
+	pr_err("Unknown operation mode for %s!", dev->name);
 	return -EINVAL;
 }
 
@@ -188,14 +188,14 @@ static int out_set_mode(struct udevice *dev, int mode)
 	}
 
 	if (reg_val == -1) {
-		error("Unknown operation mode for %s!", dev->name);
+		pr_err("Unknown operation mode for %s!", dev->name);
 		return -EINVAL;
 	}
 
 	reg = (dev->driver_data - 1) * OUT_REG_COUNT + OUT_REG_OM;
 	ret = pmic_write(dev->parent, reg, (uint8_t *)&reg_val, 1);
 	if (ret) {
-		error("PMIC write failed: %d\n",  ret);
+		pr_err("PMIC write failed: %d\n",  ret);
 		return ret;
 	}
 
diff --git a/drivers/ram/rockchip/dmc-rk3368.c b/drivers/ram/rockchip/dmc-rk3368.c
index 7577ff0363..bfcb1ddefe 100644
--- a/drivers/ram/rockchip/dmc-rk3368.c
+++ b/drivers/ram/rockchip/dmc-rk3368.c
@@ -230,7 +230,7 @@ static int memory_init(struct rk3368_ddr_pctl *pctl,
 	tmp = get_timer(0);
 	do {
 		if (get_timer(tmp) > timeout_ms) {
-			error("%s: POWER_UP_START did not complete in %ld ms\n",
+			pr_err("%s: POWER_UP_START did not complete in %ld ms\n",
 			      __func__, timeout_ms);
 			return -ETIME;
 		}
@@ -422,7 +422,7 @@ static int dfi_cfg(struct rk3368_ddr_pctl *pctl)
 	tmp = get_timer(0);
 	do {
 		if (get_timer(tmp) > timeout_ms) {
-			error("%s: DFI init did not complete within %ld ms\n",
+			pr_err("%s: DFI init did not complete within %ld ms\n",
 			      __func__, timeout_ms);
 			return -ETIME;
 		}
@@ -457,7 +457,7 @@ static int pctl_calc_timings(struct rk3368_sdram_params *params,
 	u32 tfaw_as_ps;
 
 	if (params->ddr_speed_bin != DDR3_1600K) {
-		error("%s: unimplemented DDR3 speed bin %d\n",
+		pr_err("%s: unimplemented DDR3 speed bin %d\n",
 		      __func__, params->ddr_speed_bin);
 		return -1;
 	}
@@ -585,7 +585,7 @@ static int ddrphy_data_training(struct rk3368_ddr_pctl *pctl,
 	tmp = get_timer(0);
 	do {
 		if (get_timer(tmp) > timeout_ms) {
-			error("%s: did not complete within %ld ms\n",
+			pr_err("%s: did not complete within %ld ms\n",
 			      __func__, timeout_ms);
 			return -ETIME;
 		}
@@ -625,7 +625,7 @@ static int sdram_col_row_detect(struct udevice *dev)
 	}
 
 	if (col == 8) {
-		error("%s: col detect error\n", __func__);
+		pr_err("%s: col detect error\n", __func__);
 		return -EINVAL;
 	}
 
@@ -644,7 +644,7 @@ static int sdram_col_row_detect(struct udevice *dev)
 	}
 
 	if (row == 11) {
-		error("%s: row detect error\n", __func__);
+		pr_err("%s: row detect error\n", __func__);
 		return -EINVAL;
 	}
 
@@ -764,7 +764,7 @@ static int msch_niu_config(struct rk3368_msch *msch,
 		}
 	}
 
-	error("%s: ddrconf (NIU config) not found\n", __func__);
+	pr_err("%s: ddrconf (NIU config) not found\n", __func__);
 	return -EINVAL;
 }
 
diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c
index 5ed4b03837..76c1fe80a7 100644
--- a/drivers/ram/rockchip/sdram_rk3399.c
+++ b/drivers/ram/rockchip/sdram_rk3399.c
@@ -551,7 +551,7 @@ static int pctl_cfg(const struct chan_info *chan, u32 channel,
 	tmp = get_timer(0);
 	do {
 		if (get_timer(tmp) > timeout_ms) {
-			error("DRAM (%s): phy failed to lock within  %ld ms\n",
+			pr_err("DRAM (%s): phy failed to lock within  %ld ms\n",
 			      __func__, timeout_ms);
 			return -ETIME;
 		}
diff --git a/drivers/ram/stm32_sdram.c b/drivers/ram/stm32_sdram.c
index b1b0289a1b..fdf088e783 100644
--- a/drivers/ram/stm32_sdram.c
+++ b/drivers/ram/stm32_sdram.c
@@ -262,7 +262,7 @@ static int stm32_fmc_ofdata_to_platdata(struct udevice *dev)
 		bank_name = (char *)ofnode_get_name(bank_node);
 		strsep(&bank_name, "@");
 		if (!bank_name) {
-			error("missing sdram bank index");
+			pr_err("missing sdram bank index");
 			return -EINVAL;
 		}
 
@@ -271,7 +271,7 @@ static int stm32_fmc_ofdata_to_platdata(struct udevice *dev)
 			       (long unsigned int *)&bank_params->target_bank);
 
 		if (bank_params->target_bank >= MAX_SDRAM_BANK) {
-			error("Found bank %d , but only bank 0 and 1 are supported",
+			pr_err("Found bank %d , but only bank 0 and 1 are supported",
 			      bank_params->target_bank);
 			return -EINVAL;
 		}
@@ -285,7 +285,7 @@ static int stm32_fmc_ofdata_to_platdata(struct udevice *dev)
 						  sizeof(struct stm32_sdram_control));
 
 		if (!params->bank_params[bank].sdram_control) {
-			error("st,sdram-control not found for %s",
+			pr_err("st,sdram-control not found for %s",
 			      ofnode_get_name(bank_node));
 			return -EINVAL;
 		}
@@ -298,7 +298,7 @@ static int stm32_fmc_ofdata_to_platdata(struct udevice *dev)
 						  sizeof(struct stm32_sdram_timing));
 
 		if (!params->bank_params[bank].sdram_timing) {
-			error("st,sdram-timing not found for %s",
+			pr_err("st,sdram-timing not found for %s",
 			      ofnode_get_name(bank_node));
 			return -EINVAL;
 		}
diff --git a/drivers/reset/sti-reset.c b/drivers/reset/sti-reset.c
index a79708cde2..024b996f0c 100644
--- a/drivers/reset/sti-reset.c
+++ b/drivers/reset/sti-reset.c
@@ -201,20 +201,20 @@ phys_addr_t sti_reset_get_regmap(const char *compatible)
 	node = fdt_node_offset_by_compatible(gd->fdt_blob, -1,
 					     compatible);
 	if (node < 0) {
-		error("unable to find %s node\n", compatible);
+		pr_err("unable to find %s node\n", compatible);
 		return node;
 	}
 
 	ret = uclass_get_device_by_of_offset(UCLASS_SYSCON, node, &syscon);
 	if (ret) {
-		error("%s: uclass_get_device_by_of_offset failed: %d\n",
+		pr_err("%s: uclass_get_device_by_of_offset failed: %d\n",
 		      __func__, ret);
 		return ret;
 	}
 
 	regmap = syscon_get_regmap(syscon);
 	if (!regmap) {
-		error("unable to get regmap for %s\n", syscon->name);
+		pr_err("unable to get regmap for %s\n", syscon->name);
 		return -ENODEV;
 	}
 
@@ -251,7 +251,7 @@ static int sti_reset_program_hw(struct reset_ctl *reset_ctl, int assert)
 			if (ch->deassert_cnt > 0)
 				return 0;
 		} else
-			error("Reset balancing error: reset_ctl=%p dev=%p id=%lu\n",
+			pr_err("Reset balancing error: reset_ctl=%p dev=%p id=%lu\n",
 			      reset_ctl, reset_ctl->dev, reset_ctl->id);
 	}
 
@@ -268,7 +268,7 @@ static int sti_reset_program_hw(struct reset_ctl *reset_ctl, int assert)
 	reg = (void __iomem *)base + ch->ack_offset;
 	if (wait_for_bit(__func__, reg, BIT(ch->ack_bit), ctrl_val,
 			 1000, false)) {
-		error("Stuck on waiting ack reset_ctl=%p dev=%p id=%lu\n",
+		pr_err("Stuck on waiting ack reset_ctl=%p dev=%p id=%lu\n",
 		      reset_ctl, reset_ctl->dev, reset_ctl->id);
 
 		return -ETIMEDOUT;
diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c
index e2f8342e88..228e714e09 100644
--- a/drivers/spi/atmel_spi.c
+++ b/drivers/spi/atmel_spi.c
@@ -474,7 +474,7 @@ static int atmel_spi_probe(struct udevice *bus)
 	ret = gpio_request_list_by_name(bus, "cs-gpios", priv->cs_gpios,
 					ARRAY_SIZE(priv->cs_gpios), 0);
 	if (ret < 0) {
-		error("Can't get %s gpios! Error: %d", bus->name, ret);
+		pr_err("Can't get %s gpios! Error: %d", bus->name, ret);
 		return ret;
 	}
 
diff --git a/drivers/spi/lpc32xx_ssp.c b/drivers/spi/lpc32xx_ssp.c
index c5b766c0dd..e2a593b934 100644
--- a/drivers/spi/lpc32xx_ssp.c
+++ b/drivers/spi/lpc32xx_ssp.c
@@ -66,17 +66,17 @@ struct spi_slave *spi_setup_slave(uint bus, uint cs, uint max_hz, uint mode)
 	/* we only set up SSP0 for now, so ignore bus */
 
 	if (mode & SPI_3WIRE) {
-		error("3-wire mode not supported");
+		pr_err("3-wire mode not supported");
 		return NULL;
 	}
 
 	if (mode & SPI_SLAVE) {
-		error("slave mode not supported\n");
+		pr_err("slave mode not supported\n");
 		return NULL;
 	}
 
 	if (mode & SPI_PREAMBLE) {
-		error("preamble byte skipping not supported\n");
+		pr_err("preamble byte skipping not supported\n");
 		return NULL;
 	}
 
diff --git a/drivers/sysreset/sysreset_sti.c b/drivers/sysreset/sysreset_sti.c
index 9b58aa8e97..bf698a737b 100644
--- a/drivers/sysreset/sysreset_sti.c
+++ b/drivers/sysreset/sysreset_sti.c
@@ -39,7 +39,7 @@ static int sti_sysreset_probe(struct udevice *dev)
 					     "st,syscfg", NULL, 0, 0,
 					     &syscfg_phandle);
 	if (ret < 0) {
-		error("Can't get syscfg phandle: %d\n", ret);
+		pr_err("Can't get syscfg phandle: %d\n", ret);
 		return ret;
 	}
 
@@ -47,14 +47,14 @@ static int sti_sysreset_probe(struct udevice *dev)
 					     syscfg_phandle.node,
 					     &syscon);
 	if (ret) {
-		error("%s: uclass_get_device_by_of_offset failed: %d\n",
+		pr_err("%s: uclass_get_device_by_of_offset failed: %d\n",
 		      __func__, ret);
 		return ret;
 	}
 
 	regmap = syscon_get_regmap(syscon);
 	if (!regmap) {
-		error("unable to get regmap for %s\n", syscon->name);
+		pr_err("unable to get regmap for %s\n", syscon->name);
 		return -ENODEV;
 	}
 
diff --git a/drivers/sysreset/sysreset_syscon.c b/drivers/sysreset/sysreset_syscon.c
index 3818faeb46..3abce7f678 100644
--- a/drivers/sysreset/sysreset_syscon.c
+++ b/drivers/sysreset/sysreset_syscon.c
@@ -45,13 +45,13 @@ int syscon_reboot_probe(struct udevice *dev)
 	err = uclass_get_device_by_phandle(UCLASS_SYSCON, dev,
 					   "regmap", &syscon);
 	if (err) {
-		error("unable to find syscon device\n");
+		pr_err("unable to find syscon device\n");
 		return err;
 	}
 
 	priv->regmap = syscon_get_regmap(syscon);
 	if (!priv->regmap) {
-		error("unable to find regmap\n");
+		pr_err("unable to find regmap\n");
 		return -ENODEV;
 	}
 
diff --git a/drivers/sysreset/sysreset_watchdog.c b/drivers/sysreset/sysreset_watchdog.c
index 304ed052a2..ab250aea29 100644
--- a/drivers/sysreset/sysreset_watchdog.c
+++ b/drivers/sysreset/sysreset_watchdog.c
@@ -38,7 +38,7 @@ int wdt_reboot_probe(struct udevice *dev)
 	err = uclass_get_device_by_phandle(UCLASS_WDT, dev,
 					   "wdt", &priv->wdt);
 	if (err) {
-		error("unable to find wdt device\n");
+		pr_err("unable to find wdt device\n");
 		return err;
 	}
 
diff --git a/drivers/tpm/tpm_tis_infineon.c b/drivers/tpm/tpm_tis_infineon.c
index ef3ff0dbf6..e3e20d8996 100644
--- a/drivers/tpm/tpm_tis_infineon.c
+++ b/drivers/tpm/tpm_tis_infineon.c
@@ -539,7 +539,7 @@ static int tpm_tis_i2c_init(struct udevice *dev)
 	}
 
 	if (chip->chip_type != UNKNOWN && vendor != expected_did_vid) {
-		error("Vendor id did not match! ID was %08x\n", vendor);
+		pr_err("Vendor id did not match! ID was %08x\n", vendor);
 		return -ENODEV;
 	}
 
diff --git a/drivers/usb/common/common.c b/drivers/usb/common/common.c
index 35c2dc18d9..e8432bb016 100644
--- a/drivers/usb/common/common.c
+++ b/drivers/usb/common/common.c
@@ -28,7 +28,7 @@ enum usb_dr_mode usb_get_dr_mode(int node)
 
 	dr_mode = fdt_getprop(fdt, node, "dr_mode", NULL);
 	if (!dr_mode) {
-		error("usb dr_mode not found\n");
+		pr_err("usb dr_mode not found\n");
 		return USB_DR_MODE_UNKNOWN;
 	}
 
diff --git a/drivers/usb/eth/mcs7830.c b/drivers/usb/eth/mcs7830.c
index 4abef5d5c8..941d612a68 100644
--- a/drivers/usb/eth/mcs7830.c
+++ b/drivers/usb/eth/mcs7830.c
@@ -418,25 +418,25 @@ static int mcs7830_basic_reset(struct usb_device *udev,
 
 	rc = mcs7830_set_autoneg(udev);
 	if (rc < 0) {
-		error("setting autoneg failed\n");
+		pr_err("setting autoneg failed\n");
 		return rc;
 	}
 
 	rc = mcs7830_write_mchash(udev, priv);
 	if (rc < 0) {
-		error("failed to set multicast hash\n");
+		pr_err("failed to set multicast hash\n");
 		return rc;
 	}
 
 	rc = mcs7830_write_config(udev, priv);
 	if (rc < 0) {
-		error("failed to set configuration\n");
+		pr_err("failed to set configuration\n");
 		return rc;
 	}
 
 	rc = mcs7830_apply_fixup(udev);
 	if (rc < 0) {
-		error("fixup application failed\n");
+		pr_err("fixup application failed\n");
 		return rc;
 	}
 
@@ -541,11 +541,11 @@ static int mcs7830_recv_common(struct ueth_data *ueth, uint8_t *buf)
 	debug("%s() RX want len %d, got len %d, rc %d\n",
 	      __func__, wantlen, gotlen, rc);
 	if (rc != 0) {
-		error("RX: failed to receive\n");
+		pr_err("RX: failed to receive\n");
 		return rc;
 	}
 	if (gotlen > wantlen) {
-		error("RX: got too many bytes (%d)\n", gotlen);
+		pr_err("RX: got too many bytes (%d)\n", gotlen);
 		return -EIO;
 	}
 
diff --git a/drivers/usb/gadget/at91_udc.c b/drivers/usb/gadget/at91_udc.c
index 9df6d32c65..ad2f606b78 100644
--- a/drivers/usb/gadget/at91_udc.c
+++ b/drivers/usb/gadget/at91_udc.c
@@ -1456,7 +1456,7 @@ int usb_gadget_register_driver(struct usb_gadget_driver *driver)
 
 	ret = driver->bind(&udc->gadget);
 	if (ret) {
-		error("driver->bind() returned %d\n", ret);
+		pr_err("driver->bind() returned %d\n", ret);
 		udc->driver = NULL;
 	}
 
@@ -1468,7 +1468,7 @@ int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
 	struct at91_udc *udc = controller;
 
 	if (!driver || !driver->unbind || !driver->disconnect) {
-		error("bad paramter\n");
+		pr_err("bad paramter\n");
 		return -EINVAL;
 	}
 
diff --git a/drivers/usb/gadget/atmel_usba_udc.c b/drivers/usb/gadget/atmel_usba_udc.c
index ad31703c73..c0a95a97c9 100644
--- a/drivers/usb/gadget/atmel_usba_udc.c
+++ b/drivers/usb/gadget/atmel_usba_udc.c
@@ -1228,7 +1228,7 @@ int usb_gadget_register_driver(struct usb_gadget_driver *driver)
 
 	ret = driver->bind(&udc->gadget);
 	if (ret) {
-		error("driver->bind() returned %d\n", ret);
+		pr_err("driver->bind() returned %d\n", ret);
 		udc->driver = NULL;
 	}
 
@@ -1240,7 +1240,7 @@ int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
 	struct usba_udc *udc = &controller;
 
 	if (!driver || !driver->unbind || !driver->disconnect) {
-		error("bad paramter\n");
+		pr_err("bad paramter\n");
 		return -EINVAL;
 	}
 
@@ -1261,7 +1261,7 @@ static struct usba_ep *usba_udc_pdata(struct usba_platform_data *pdata,
 
 	eps = malloc(sizeof(struct usba_ep) * pdata->num_ep);
 	if (!eps) {
-		error("failed to alloc eps\n");
+		pr_err("failed to alloc eps\n");
 		return NULL;
 	}
 
diff --git a/drivers/usb/gadget/dwc2_udc_otg.c b/drivers/usb/gadget/dwc2_udc_otg.c
index 8c0967fea5..608764bae7 100644
--- a/drivers/usb/gadget/dwc2_udc_otg.c
+++ b/drivers/usb/gadget/dwc2_udc_otg.c
@@ -836,7 +836,7 @@ int dwc2_udc_probe(struct dwc2_plat_otg_data *pdata)
 			    ROUND(sizeof(struct usb_ctrlrequest),
 				  CONFIG_SYS_CACHELINE_SIZE));
 	if (!usb_ctrl) {
-		error("No memory available for UDC!\n");
+		pr_err("No memory available for UDC!\n");
 		return -ENOMEM;
 	}
 
diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c
index 2cf5c8d31e..2e0ff452d8 100644
--- a/drivers/usb/gadget/ether.c
+++ b/drivers/usb/gadget/ether.c
@@ -1059,7 +1059,7 @@ static int eth_set_config(struct eth_dev *dev, unsigned number,
 			&& dev->config
 			&& dev->tx_qlen != 0) {
 		/* tx fifo is full, but we can't clear it...*/
-		error("can't change configurations");
+		pr_err("can't change configurations");
 		return -ESPIPE;
 	}
 	eth_reset_config(dev);
@@ -1233,7 +1233,7 @@ static void rndis_command_complete(struct usb_ep *ep, struct usb_request *req)
 	/* received RNDIS command from USB_CDC_SEND_ENCAPSULATED_COMMAND */
 	status = rndis_msg_parser(dev->rndis_config, (u8 *) req->buf);
 	if (status < 0)
-		error("%s: rndis parse error %d", __func__, status);
+		pr_err("%s: rndis parse error %d", __func__, status);
 }
 
 #endif	/* RNDIS */
@@ -1554,7 +1554,7 @@ static int rx_submit(struct eth_dev *dev, struct usb_request *req,
 	retval = usb_ep_queue(dev->out_ep, req, gfp_flags);
 
 	if (retval)
-		error("rx submit --> %d", retval);
+		pr_err("rx submit --> %d", retval);
 
 	return retval;
 }
@@ -1624,7 +1624,7 @@ static int alloc_requests(struct eth_dev *dev, unsigned n, gfp_t gfp_flags)
 fail2:
 	usb_ep_free_request(dev->in_ep, dev->tx_req);
 fail1:
-	error("can't alloc requests");
+	pr_err("can't alloc requests");
 	return -1;
 }
 
@@ -2060,7 +2060,7 @@ static int eth_bind(struct usb_gadget *gadget)
 		 * anything less functional on CDC-capable hardware,
 		 * so we fail in this case.
 		 */
-		error("controller '%s' not recognized",
+		pr_err("controller '%s' not recognized",
 			gadget->name);
 		return -ENODEV;
 	}
@@ -2121,7 +2121,7 @@ static int eth_bind(struct usb_gadget *gadget)
 	in_ep = usb_ep_autoconfig(gadget, &fs_source_desc);
 	if (!in_ep) {
 autoconf_fail:
-		error("can't autoconfigure on %s\n",
+		pr_err("can't autoconfigure on %s\n",
 			gadget->name);
 		return -ENODEV;
 	}
@@ -2142,7 +2142,7 @@ autoconf_fail:
 		if (status_ep) {
 			status_ep->driver_data = status_ep;	/* claim */
 		} else if (rndis) {
-			error("can't run RNDIS on %s", gadget->name);
+			pr_err("can't run RNDIS on %s", gadget->name);
 			return -ENODEV;
 #ifdef CONFIG_USB_ETH_CDC
 		} else if (cdc) {
@@ -2244,7 +2244,7 @@ autoconf_fail:
 	if (rndis) {
 		status = rndis_init();
 		if (status < 0) {
-			error("can't init RNDIS, %d", status);
+			pr_err("can't init RNDIS, %d", status);
 			goto fail;
 		}
 	}
@@ -2335,7 +2335,7 @@ fail0:
 	return 0;
 
 fail:
-	error("%s failed, status = %d", __func__, status);
+	pr_err("%s failed, status = %d", __func__, status);
 	eth_unbind(gadget);
 	return status;
 }
@@ -2350,7 +2350,7 @@ int dm_usb_init(struct eth_dev *e_dev)
 
 	ret = uclass_first_device(UCLASS_USB_DEV_GENERIC, &dev);
 	if (!dev || ret) {
-		error("No USB device found\n");
+		pr_err("No USB device found\n");
 		return -ENODEV;
 	}
 
@@ -2369,7 +2369,7 @@ static int _usb_eth_init(struct ether_priv *priv)
 
 #ifdef CONFIG_DM_USB
 	if (dm_usb_init(dev)) {
-		error("USB ether not found\n");
+		pr_err("USB ether not found\n");
 		return -ENODEV;
 	}
 #else
@@ -2393,11 +2393,11 @@ static int _usb_eth_init(struct ether_priv *priv)
 			sizeof(host_addr));
 
 	if (!is_eth_addr_valid(dev_addr)) {
-		error("Need valid 'usbnet_devaddr' to be set");
+		pr_err("Need valid 'usbnet_devaddr' to be set");
 		goto fail;
 	}
 	if (!is_eth_addr_valid(host_addr)) {
-		error("Need valid 'usbnet_hostaddr' to be set");
+		pr_err("Need valid 'usbnet_hostaddr' to be set");
 		goto fail;
 	}
 
@@ -2427,7 +2427,7 @@ static int _usb_eth_init(struct ether_priv *priv)
 	while (!dev->network_started) {
 		/* Handle control-c and timeouts */
 		if (ctrlc() || (get_timer(ts) > timeout)) {
-			error("The remote end did not respond in time.");
+			pr_err("The remote end did not respond in time.");
 			goto fail;
 		}
 		usb_gadget_handle_interrupts(0);
@@ -2456,7 +2456,7 @@ static int _usb_eth_send(struct ether_priv *priv, void *packet, int length)
 		rndis_pkt = malloc(length +
 					sizeof(struct rndis_packet_msg_type));
 		if (!rndis_pkt) {
-			error("No memory to alloc RNDIS packet");
+			pr_err("No memory to alloc RNDIS packet");
 			goto drop;
 		}
 		rndis_add_hdr(rndis_pkt, length);
@@ -2574,7 +2574,7 @@ static int usb_eth_recv(struct eth_device *netdev)
 
 	ret = _usb_eth_recv(priv);
 	if (ret) {
-		error("error packet receive\n");
+		pr_err("error packet receive\n");
 		return ret;
 	}
 
@@ -2585,7 +2585,7 @@ static int usb_eth_recv(struct eth_device *netdev)
 		net_process_received_packet(net_rx_packets[0],
 					    dev->rx_req->length);
 	} else {
-		error("dev->rx_req invalid");
+		pr_err("dev->rx_req invalid");
 	}
 	packet_received = 0;
 	rx_submit(dev, dev->rx_req, 0);
@@ -2641,7 +2641,7 @@ static int usb_eth_recv(struct udevice *dev, int flags, uchar **packetp)
 
 	ret = _usb_eth_recv(priv);
 	if (ret) {
-		error("error packet receive\n");
+		pr_err("error packet receive\n");
 		return ret;
 	}
 
@@ -2650,7 +2650,7 @@ static int usb_eth_recv(struct udevice *dev, int flags, uchar **packetp)
 			*packetp = (uchar *)net_rx_packets[0];
 			return ethdev->rx_req->length;
 		} else {
-			error("dev->rx_req invalid");
+			pr_err("dev->rx_req invalid");
 			return -EFAULT;
 		}
 	}
@@ -2706,13 +2706,13 @@ int usb_ether_init(void)
 
 	ret = uclass_first_device(UCLASS_USB_DEV_GENERIC, &usb_dev);
 	if (!usb_dev || ret) {
-		error("No USB device found\n");
+		pr_err("No USB device found\n");
 		return ret;
 	}
 
 	ret = device_bind_driver(usb_dev, "usb_ether", "usb_ether", &dev);
 	if (!dev || ret) {
-		error("usb - not able to bind usb_ether device\n");
+		pr_err("usb - not able to bind usb_ether device\n");
 		return ret;
 	}
 
diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 3e867f34c7..2ac1d6c404 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -402,7 +402,7 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req)
 
 	strsep(&cmd, ":");
 	if (!cmd) {
-		error("missing variable");
+		pr_err("missing variable");
 		fastboot_tx_write_str("FAILmissing var");
 		return;
 	}
@@ -837,7 +837,7 @@ static void cb_set_active(struct usb_ep *ep, struct usb_request *req)
 
 	strsep(&cmd, ":");
 	if (!cmd) {
-		error("missing slot name");
+		pr_err("missing slot name");
 		fastboot_tx_write_str("FAIL: missing slot name");
 		return;
 	}
@@ -883,7 +883,7 @@ static void cb_flash(struct usb_ep *ep, struct usb_request *req)
 #endif
 	strsep(&cmd, ":");
 	if (!cmd) {
-		error("missing partition name");
+		pr_err("missing partition name");
 		fastboot_tx_write_str("FAILmissing partition name");
 		return;
 	}
@@ -1100,7 +1100,7 @@ static void cb_erase(struct usb_ep *ep, struct usb_request *req)
 
 	strsep(&cmd, ":");
 	if (!cmd) {
-		error("missing partition name");
+		pr_err("missing partition name");
 		fastboot_tx_write_str("FAILmissing partition name");
 		return;
 	}
@@ -1180,7 +1180,7 @@ static void rx_handler_command(struct usb_ep *ep, struct usb_request *req)
 	}
 
 	if (!func_cb) {
-		error("unknown command: %.*s", req->actual, cmdbuf);
+		pr_err("unknown command: %.*s", req->actual, cmdbuf);
 		fastboot_tx_write_str("FAILunknown command");
 	} else {
 		if (req->actual < req->length) {
@@ -1188,7 +1188,7 @@ static void rx_handler_command(struct usb_ep *ep, struct usb_request *req)
 			buf[req->actual] = 0;
 			func_cb(ep, req);
 		} else {
-			error("buffer overflow");
+			pr_err("buffer overflow");
 			fastboot_tx_write_str("FAILbuffer overflow");
 		}
 	}
diff --git a/drivers/usb/gadget/f_sdp.c b/drivers/usb/gadget/f_sdp.c
index 0fae66beab..fd3da922a6 100644
--- a/drivers/usb/gadget/f_sdp.c
+++ b/drivers/usb/gadget/f_sdp.c
@@ -237,12 +237,12 @@ static void sdp_rx_command_complete(struct usb_ep *ep, struct usb_request *req)
 	u8 report = data[0];
 
 	if (status != 0) {
-		error("Status: %d", status);
+		pr_err("Status: %d", status);
 		return;
 	}
 
 	if (report != 1) {
-		error("Unexpected report %d", report);
+		pr_err("Unexpected report %d", report);
 		return;
 	}
 
@@ -309,7 +309,7 @@ static void sdp_rx_command_complete(struct usb_ep *ep, struct usb_request *req)
 		sdp->next_state = SDP_STATE_IDLE;
 		break;
 	default:
-		error("Unknown command: %04x\n", be16_to_cpu(cmd->cmd));
+		pr_err("Unknown command: %04x\n", be16_to_cpu(cmd->cmd));
 	}
 }
 
@@ -322,12 +322,12 @@ static void sdp_rx_data_complete(struct usb_ep *ep, struct usb_request *req)
 	int datalen = req->length - 1;
 
 	if (status != 0) {
-		error("Status: %d", status);
+		pr_err("Status: %d", status);
 		return;
 	}
 
 	if (report != 2) {
-		error("Unexpected report %d", report);
+		pr_err("Unexpected report %d", report);
 		return;
 	}
 
@@ -360,7 +360,7 @@ static void sdp_rx_data_complete(struct usb_ep *ep, struct usb_request *req)
 		sdp->state = SDP_STATE_TX_SEC_CONF;
 		break;
 	default:
-		error("Invalid state: %d", sdp->state);
+		pr_err("Invalid state: %d", sdp->state);
 	}
 }
 
@@ -370,7 +370,7 @@ static void sdp_tx_complete(struct usb_ep *ep, struct usb_request *req)
 	int status = req->status;
 
 	if (status != 0) {
-		error("Status: %d", status);
+		pr_err("Status: %d", status);
 		return;
 	}
 
@@ -393,7 +393,7 @@ static void sdp_tx_complete(struct usb_ep *ep, struct usb_request *req)
 			sdp->state = SDP_STATE_IDLE;
 		break;
 	default:
-		error("Wrong State: %d", sdp->state);
+		pr_err("Wrong State: %d", sdp->state);
 		sdp->state = SDP_STATE_IDLE;
 		break;
 	}
diff --git a/drivers/usb/gadget/f_thor.c b/drivers/usb/gadget/f_thor.c
index cd4d9e659a..18f233ab58 100644
--- a/drivers/usb/gadget/f_thor.c
+++ b/drivers/usb/gadget/f_thor.c
@@ -174,7 +174,7 @@ static long long int download_head(unsigned long long total,
 					transfer_buffer, THOR_STORE_UNIT_SIZE,
 					(*cnt)++);
 			if (ret) {
-				error("DFU write failed [%d] cnt: %d",
+				pr_err("DFU write failed [%d] cnt: %d",
 				      ret, *cnt);
 				return ret;
 			}
@@ -218,20 +218,20 @@ static int download_tail(long long int left, int cnt)
 
 	dfu_entity = dfu_get_entity(alt_setting_num);
 	if (!dfu_entity) {
-		error("Alt setting: %d entity not found!\n", alt_setting_num);
+		pr_err("Alt setting: %d entity not found!\n", alt_setting_num);
 		return -ENOENT;
 	}
 
 	transfer_buffer = dfu_get_buf(dfu_entity);
 	if (!transfer_buffer) {
-		error("Transfer buffer not allocated!");
+		pr_err("Transfer buffer not allocated!");
 		return -ENXIO;
 	}
 
 	if (left) {
 		ret = dfu_write(dfu_entity, transfer_buffer, left, cnt++);
 		if (ret) {
-			error("DFU write failed [%d]: left: %llu", ret, left);
+			pr_err("DFU write failed [%d]: left: %llu", ret, left);
 			return ret;
 		}
 	}
@@ -245,7 +245,7 @@ static int download_tail(long long int left, int cnt)
 	 */
 	ret = dfu_flush(dfu_entity, transfer_buffer, 0, cnt);
 	if (ret)
-		error("DFU flush failed!");
+		pr_err("DFU flush failed!");
 
 	return ret;
 }
@@ -285,7 +285,7 @@ static long long int process_rqt_download(const struct rqt_box *rqt)
 
 		alt_setting_num = dfu_get_alt(f_name);
 		if (alt_setting_num < 0) {
-			error("Alt setting [%d] to write not found!",
+			pr_err("Alt setting [%d] to write not found!",
 			      alt_setting_num);
 			rsp->ack = -ENODEV;
 			ret = rsp->ack;
@@ -311,7 +311,7 @@ static long long int process_rqt_download(const struct rqt_box *rqt)
 		debug("DL EXIT\n");
 		break;
 	default:
-		error("Operation not supported: %d", rqt->rqt_data);
+		pr_err("Operation not supported: %d", rqt->rqt_data);
 		ret = -ENOTSUPP;
 	}
 
@@ -342,7 +342,7 @@ static int process_data(void)
 		puts("RQT: UPLOAD not supported!\n");
 		break;
 	default:
-		error("unknown request (%d)", rqt->rqt);
+		pr_err("unknown request (%d)", rqt->rqt);
 	}
 
 	return ret;
@@ -541,7 +541,7 @@ static int thor_rx_data(void)
 
 		status = usb_ep_queue(dev->out_ep, dev->out_req, 0);
 		if (status) {
-			error("kill %s:  resubmit %d bytes --> %d",
+			pr_err("kill %s:  resubmit %d bytes --> %d",
 			      dev->out_ep->name, dev->out_req->length, status);
 			usb_ep_set_halt(dev->out_ep);
 			return -EAGAIN;
@@ -575,7 +575,7 @@ static void thor_tx_data(unsigned char *data, int len)
 
 	status = usb_ep_queue(dev->in_ep, dev->in_req, 0);
 	if (status) {
-		error("kill %s:  resubmit %d bytes --> %d",
+		pr_err("kill %s:  resubmit %d bytes --> %d",
 		      dev->in_ep->name, dev->in_req->length, status);
 		usb_ep_set_halt(dev->in_ep);
 	}
@@ -608,7 +608,7 @@ static void thor_rx_tx_complete(struct usb_ep *ep, struct usb_request *req)
 	case -ESHUTDOWN:		/* disconnect from host */
 	case -EREMOTEIO:                /* short read */
 	case -EOVERFLOW:
-		error("ERROR:%d", status);
+		pr_err("ERROR:%d", status);
 		break;
 	}
 
@@ -664,7 +664,7 @@ thor_func_setup(struct usb_function *f, const struct usb_ctrlrequest *ctrl)
 		break;
 
 	default:
-		error("thor_setup: unknown request: %d", ctrl->bRequest);
+		pr_err("thor_setup: unknown request: %d", ctrl->bRequest);
 	}
 
 	if (value >= 0) {
@@ -973,7 +973,7 @@ static int thor_func_set_alt(struct usb_function *f,
 		debug("Communication Data interface\n");
 		result = thor_eps_setup(f);
 		if (result)
-			error("%s: EPs setup failed!", __func__);
+			pr_err("%s: EPs setup failed!", __func__);
 		dev->configuration_done = 1;
 		break;
 	}
diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
index 0ed72d5ae7..1293e18f75 100644
--- a/drivers/usb/host/dwc2.c
+++ b/drivers/usb/host/dwc2.c
@@ -179,7 +179,7 @@ static int dwc_vbus_supply_init(struct udevice *dev)
 
 	ret = regulator_set_enable(vbus_supply, true);
 	if (ret) {
-		error("Error enabling vbus supply\n");
+		pr_err("Error enabling vbus supply\n");
 		return ret;
 	}
 
diff --git a/drivers/usb/host/ehci-generic.c b/drivers/usb/host/ehci-generic.c
index 18e1e0ee88..1cb92c0338 100644
--- a/drivers/usb/host/ehci-generic.c
+++ b/drivers/usb/host/ehci-generic.c
@@ -51,7 +51,7 @@ static int ehci_usb_probe(struct udevice *dev)
 				break;
 			err = clk_enable(&priv->clocks[i]);
 			if (err) {
-				error("failed to enable clock %d\n", i);
+				pr_err("failed to enable clock %d\n", i);
 				clk_free(&priv->clocks[i]);
 				goto clk_err;
 			}
@@ -59,7 +59,7 @@ static int ehci_usb_probe(struct udevice *dev)
 		}
 	} else {
 		if (clock_nb != -ENOENT) {
-			error("failed to get clock phandle(%d)\n", clock_nb);
+			pr_err("failed to get clock phandle(%d)\n", clock_nb);
 			return clock_nb;
 		}
 	}
@@ -80,7 +80,7 @@ static int ehci_usb_probe(struct udevice *dev)
 				break;
 
 			if (reset_deassert(&priv->resets[i])) {
-				error("failed to deassert reset %d\n", i);
+				pr_err("failed to deassert reset %d\n", i);
 				reset_free(&priv->resets[i]);
 				goto reset_err;
 			}
@@ -88,7 +88,7 @@ static int ehci_usb_probe(struct udevice *dev)
 		}
 	} else {
 		if (reset_nb != -ENOENT) {
-			error("failed to get reset phandle(%d)\n", reset_nb);
+			pr_err("failed to get reset phandle(%d)\n", reset_nb);
 			goto clk_err;
 		}
 	}
@@ -96,14 +96,14 @@ static int ehci_usb_probe(struct udevice *dev)
 	err = generic_phy_get_by_index(dev, 0, &priv->phy);
 	if (err) {
 		if (err != -ENOENT) {
-			error("failed to get usb phy\n");
+			pr_err("failed to get usb phy\n");
 			goto reset_err;
 		}
 	} else {
 
 		err = generic_phy_init(&priv->phy);
 		if (err) {
-			error("failed to init usb phy\n");
+			pr_err("failed to init usb phy\n");
 			goto reset_err;
 		}
 	}
@@ -122,17 +122,17 @@ phy_err:
 	if (generic_phy_valid(&priv->phy)) {
 		ret = generic_phy_exit(&priv->phy);
 		if (ret)
-			error("failed to release phy\n");
+			pr_err("failed to release phy\n");
 	}
 
 reset_err:
 	ret = reset_release_all(priv->resets, priv->reset_count);
 	if (ret)
-		error("failed to assert all resets\n");
+		pr_err("failed to assert all resets\n");
 clk_err:
 	ret = clk_release_all(priv->clocks, priv->clock_count);
 	if (ret)
-		error("failed to disable all clocks\n");
+		pr_err("failed to disable all clocks\n");
 
 	return err;
 }
diff --git a/drivers/usb/host/ohci-generic.c b/drivers/usb/host/ohci-generic.c
index e22ee97939..bf55a71d66 100644
--- a/drivers/usb/host/ohci-generic.c
+++ b/drivers/usb/host/ohci-generic.c
@@ -47,14 +47,14 @@ static int ohci_usb_probe(struct udevice *dev)
 
 			err = clk_enable(&priv->clocks[i]);
 			if (err) {
-				error("failed to enable clock %d\n", i);
+				pr_err("failed to enable clock %d\n", i);
 				clk_free(&priv->clocks[i]);
 				goto clk_err;
 			}
 			priv->clock_count++;
 		}
 	} else if (clock_nb != -ENOENT) {
-		error("failed to get clock phandle(%d)\n", clock_nb);
+		pr_err("failed to get clock phandle(%d)\n", clock_nb);
 		return clock_nb;
 	}
 
@@ -74,28 +74,28 @@ static int ohci_usb_probe(struct udevice *dev)
 
 			err = reset_deassert(&priv->resets[i]);
 			if (err) {
-				error("failed to deassert reset %d\n", i);
+				pr_err("failed to deassert reset %d\n", i);
 				reset_free(&priv->resets[i]);
 				goto reset_err;
 			}
 			priv->reset_count++;
 		}
 	} else if (reset_nb != -ENOENT) {
-		error("failed to get reset phandle(%d)\n", reset_nb);
+		pr_err("failed to get reset phandle(%d)\n", reset_nb);
 		goto clk_err;
 	}
 
 	err = generic_phy_get_by_index(dev, 0, &priv->phy);
 	if (err) {
 		if (err != -ENOENT) {
-			error("failed to get usb phy\n");
+			pr_err("failed to get usb phy\n");
 			goto reset_err;
 		}
 	} else {
 
 		err = generic_phy_init(&priv->phy);
 		if (err) {
-			error("failed to init usb phy\n");
+			pr_err("failed to init usb phy\n");
 			goto reset_err;
 		}
 	}
@@ -110,17 +110,17 @@ phy_err:
 	if (generic_phy_valid(&priv->phy)) {
 		ret = generic_phy_exit(&priv->phy);
 		if (ret)
-			error("failed to release phy\n");
+			pr_err("failed to release phy\n");
 	}
 
 reset_err:
 	ret = reset_release_all(priv->resets, priv->reset_count);
 	if (ret)
-		error("failed to assert all resets\n");
+		pr_err("failed to assert all resets\n");
 clk_err:
 	ret = clk_release_all(priv->clocks, priv->clock_count);
 	if (ret)
-		error("failed to disable all clocks\n");
+		pr_err("failed to disable all clocks\n");
 
 	return err;
 }
diff --git a/drivers/usb/host/xhci-dwc3.c b/drivers/usb/host/xhci-dwc3.c
index 4191a89421..258d1cd00a 100644
--- a/drivers/usb/host/xhci-dwc3.c
+++ b/drivers/usb/host/xhci-dwc3.c
@@ -128,13 +128,13 @@ static int xhci_dwc3_probe(struct udevice *dev)
 	ret = generic_phy_get_by_index(dev, 0, &plat->usb_phy);
 	if (ret) {
 		if (ret != -ENOENT) {
-			error("Failed to get USB PHY for %s\n", dev->name);
+			pr_err("Failed to get USB PHY for %s\n", dev->name);
 			return ret;
 		}
 	} else {
 		ret = generic_phy_init(&plat->usb_phy);
 		if (ret) {
-			error("Can't init USB PHY for %s\n", dev->name);
+			pr_err("Can't init USB PHY for %s\n", dev->name);
 			return ret;
 		}
 	}
@@ -161,7 +161,7 @@ static int xhci_dwc3_remove(struct udevice *dev)
 	if (generic_phy_valid(&plat->usb_phy)) {
 		ret = generic_phy_exit(&plat->usb_phy);
 		if (ret) {
-			error("Can't deinit USB PHY for %s\n", dev->name);
+			pr_err("Can't deinit USB PHY for %s\n", dev->name);
 			return ret;
 		}
 	}
diff --git a/drivers/usb/host/xhci-rockchip.c b/drivers/usb/host/xhci-rockchip.c
index ca3abffba0..b1f9884273 100644
--- a/drivers/usb/host/xhci-rockchip.c
+++ b/drivers/usb/host/xhci-rockchip.c
@@ -46,7 +46,7 @@ static int xhci_usb_ofdata_to_platdata(struct udevice *dev)
 	 */
 	plat->hcd_base = dev_read_addr(dev);
 	if (plat->hcd_base == FDT_ADDR_T_NONE) {
-		error("Can't get the XHCI register base address\n");
+		pr_err("Can't get the XHCI register base address\n");
 		return -ENXIO;
 	}
 
@@ -60,7 +60,7 @@ static int xhci_usb_ofdata_to_platdata(struct udevice *dev)
 	}
 
 	if (plat->phy_base == FDT_ADDR_T_NONE) {
-		error("Can't get the usbphy register address\n");
+		pr_err("Can't get the usbphy register address\n");
 		return -ENXIO;
 	}
 
@@ -117,7 +117,7 @@ static int rockchip_xhci_core_init(struct rockchip_xhci *rkxhci,
 
 	ret = dwc3_core_init(rkxhci->dwc3_reg);
 	if (ret) {
-		error("failed to initialize core\n");
+		pr_err("failed to initialize core\n");
 		return ret;
 	}
 
@@ -149,14 +149,14 @@ static int xhci_usb_probe(struct udevice *dev)
 	if (plat->vbus_supply) {
 		ret = regulator_set_enable(plat->vbus_supply, true);
 		if (ret) {
-			error("XHCI: failed to set VBus supply\n");
+			pr_err("XHCI: failed to set VBus supply\n");
 			return ret;
 		}
 	}
 
 	ret = rockchip_xhci_core_init(ctx, dev);
 	if (ret) {
-		error("XHCI: failed to initialize controller\n");
+		pr_err("XHCI: failed to initialize controller\n");
 		return ret;
 	}
 
@@ -179,7 +179,7 @@ static int xhci_usb_remove(struct udevice *dev)
 	if (plat->vbus_supply) {
 		ret = regulator_set_enable(plat->vbus_supply, false);
 		if (ret)
-			error("XHCI: failed to set VBus supply\n");
+			pr_err("XHCI: failed to set VBus supply\n");
 	}
 
 	return ret;
diff --git a/drivers/usb/musb-new/ti-musb.c b/drivers/usb/musb-new/ti-musb.c
index de101319cd..233857ad7a 100644
--- a/drivers/usb/musb-new/ti-musb.c
+++ b/drivers/usb/musb-new/ti-musb.c
@@ -106,7 +106,7 @@ static int ti_musb_ofdata_to_platdata(struct udevice *dev)
 							  "mentor,multipoint",
 							  -1);
 	if (platdata->musb_config.multipoint < 0) {
-		error("MUSB multipoint DT entry missing\n");
+		pr_err("MUSB multipoint DT entry missing\n");
 		return -ENOENT;
 	}
 
@@ -115,14 +115,14 @@ static int ti_musb_ofdata_to_platdata(struct udevice *dev)
 	platdata->musb_config.num_eps = fdtdec_get_int(fdt, node,
 						       "mentor,num-eps", -1);
 	if (platdata->musb_config.num_eps < 0) {
-		error("MUSB num-eps DT entry missing\n");
+		pr_err("MUSB num-eps DT entry missing\n");
 		return -ENOENT;
 	}
 
 	platdata->musb_config.ram_bits = fdtdec_get_int(fdt, node,
 							"mentor,ram-bits", -1);
 	if (platdata->musb_config.ram_bits < 0) {
-		error("MUSB ram-bits DT entry missing\n");
+		pr_err("MUSB ram-bits DT entry missing\n");
 		return -ENOENT;
 	}
 
@@ -132,7 +132,7 @@ static int ti_musb_ofdata_to_platdata(struct udevice *dev)
 
 	platdata->plat.power = fdtdec_get_int(fdt, node, "mentor,power", -1);
 	if (platdata->plat.power < 0) {
-		error("MUSB mentor,power DT entry missing\n");
+		pr_err("MUSB mentor,power DT entry missing\n");
 		return -ENOENT;
 	}
 
@@ -183,7 +183,7 @@ static int ti_musb_host_ofdata_to_platdata(struct udevice *dev)
 
 	ret = ti_musb_ofdata_to_platdata(dev);
 	if (ret) {
-		error("platdata dt parse error\n");
+		pr_err("platdata dt parse error\n");
 		return ret;
 	}
 
@@ -229,7 +229,7 @@ static int ti_musb_wrapper_bind(struct udevice *parent)
 			ret = device_bind_driver_to_node(parent, "ti-musb-host",
 					name, offset_to_ofnode(node), &dev);
 			if (ret) {
-				error("musb - not able to bind usb host node\n");
+				pr_err("musb - not able to bind usb host node\n");
 				return ret;
 			}
 			break;
diff --git a/drivers/video/am335x-fb.c b/drivers/video/am335x-fb.c
index bb5cc9788a..a8b3e747a0 100644
--- a/drivers/video/am335x-fb.c
+++ b/drivers/video/am335x-fb.c
@@ -128,7 +128,7 @@ int am335xfb_init(struct am335x_lcdpanel *panel)
 		raster_ctrl |= LCD_TFT_24BPP_MODE;
 		break;
 	default:
-		error("am335x-fb: invalid bpp value: %d\n", panel->bpp);
+		pr_err("am335x-fb: invalid bpp value: %d\n", panel->bpp);
 		return -1;
 	}
 
diff --git a/env/common.c b/env/common.c
index b403bd5f6c..70715bb6e7 100644
--- a/env/common.c
+++ b/env/common.c
@@ -84,7 +84,7 @@ void set_default_env(const char *s)
 	if (himport_r(&env_htab, (char *)default_environment,
 			sizeof(default_environment), '\0', flags, 0,
 			0, NULL) == 0)
-		error("Environment import failed: errno = %d\n", errno);
+		pr_err("Environment import failed: errno = %d\n", errno);
 
 	gd->flags |= GD_FLG_ENV_READY;
 	gd->flags |= GD_FLG_ENV_DEFAULT;
@@ -172,7 +172,7 @@ int env_import(const char *buf, int check)
 	/* Decrypt the env if desired. */
 	ret = env_aes_cbc_crypt(ep, 0);
 	if (ret) {
-		error("Failed to decrypt env!\n");
+		pr_err("Failed to decrypt env!\n");
 		set_default_env("!import failed");
 		return ret;
 	}
@@ -183,7 +183,7 @@ int env_import(const char *buf, int check)
 		return 1;
 	}
 
-	error("Cannot import environment: errno = %d\n", errno);
+	pr_err("Cannot import environment: errno = %d\n", errno);
 
 	set_default_env("!import failed");
 
@@ -247,7 +247,7 @@ int env_export(env_t *env_out)
 	res = (char *)env_out->data;
 	len = hexport_r(&env_htab, '\0', 0, &res, ENV_SIZE, 0, NULL);
 	if (len < 0) {
-		error("Cannot export environment: errno = %d\n", errno);
+		pr_err("Cannot export environment: errno = %d\n", errno);
 		return 1;
 	}
 
diff --git a/env/sf.c b/env/sf.c
index 6f74371c09..e51b1ae189 100644
--- a/env/sf.c
+++ b/env/sf.c
@@ -236,7 +236,7 @@ static int env_sf_load(void)
 
 	ret = env_import((char *)ep, 0);
 	if (!ret) {
-		error("Cannot import environment: errno = %d\n", errno);
+		pr_err("Cannot import environment: errno = %d\n", errno);
 		set_default_env("!env_import failed");
 	}
 
diff --git a/fs/jffs2/jffs2_nand_1pass.c b/fs/jffs2/jffs2_nand_1pass.c
index 1d63fc9434..b16005e604 100644
--- a/fs/jffs2/jffs2_nand_1pass.c
+++ b/fs/jffs2/jffs2_nand_1pass.c
@@ -798,7 +798,7 @@ jffs2_1pass_build_lists(struct part_info * part)
 	struct mtdids *id = part->dev->id;
 	mtd = get_nand_dev_by_index(id->num);
 	if (!mtd) {
-		error("\nno NAND devices available\n");
+		pr_err("\nno NAND devices available\n");
 		return 0;
 	}
 
diff --git a/fs/yaffs2/yaffs_uboot_glue.c b/fs/yaffs2/yaffs_uboot_glue.c
index bd66d31697..2a70e4a543 100644
--- a/fs/yaffs2/yaffs_uboot_glue.c
+++ b/fs/yaffs2/yaffs_uboot_glue.c
@@ -168,7 +168,7 @@ void cmd_yaffs_devconfig(char *_mp, int flash_dev,
 
 	mtd = get_nand_dev_by_index(flash_dev);
 	if (!mtd) {
-		error("\nno NAND devices available\n");
+		pr_err("\nno NAND devices available\n");
 		return;
 	}
 

commit a9a4552a1c74e57a15d331bc9da00f046de9985f
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Sat Sep 16 14:10:40 2017 +0900

    UPSTREAM: printk: collect printk stuff into <linux/printk.h> with loglevel support
    
    When we import code from Linux, with regular re-sync planned, we want
    to use printk() and pr_*().  U-Boot does not support them in a clean
    way.  So, people end up with local macros, or compat headers here and
    there, then we occasionally see build errors of definition conflicts.
    
    We have include/linux/compat.h, but putting all sorts of unrelated
    things into a single header is just a temporal workaround.  Hence this
    patch, to find the best home for all printk variants.  If you want to
    use printk() and friends, please include <linux/printk.h>.  This header
    is self-contained, and pulls in only a few headers.
    
    When I was testing this clean-up, I noticed the image size exceeded
    its platform limit on some boards.  This is because all pr_*() that
    were previously defined as no-op in include/linux/mtd/mtd.h (unless
    CONFIG_MTD_DEBUG is set), are now enabled.
    
    To make such boards happy, this commit also implements CONFIG_LOGLEVEL.
    The concept is similar to the kernel parameter "loglevel".  (Actually,
    the Kconfig help message was taken from kernel-paremeter.txt of Linux)
    Messages with a loglevel smaller than console loglevel will be printed.
    
    The difference is the loglevel is build-time determined.  To save the
    image size, lower priority pr_*() are compiled out.  I set the default
    of CONFIG_LOGLEVEL to 6, i.e. pr_notice and higher priority messages
    are compiled in.
    
    I adjusted CONFIG_LOGLEVEL to avoid build error for some boards.
    
    Change-Id: I997d8bbeedd48777be87472df8ed126181fc4b8e
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    [trini: Add in SPL_LOGLEVEL that is the same as LOGLEVEL]
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit b44b30260ffa3dc82f4bb98b022483bb09e95353)

diff --git a/arch/arm/mach-uniphier/dram_init.c b/arch/arm/mach-uniphier/dram_init.c
index 32d359321a..22136855fa 100644
--- a/arch/arm/mach-uniphier/dram_init.c
+++ b/arch/arm/mach-uniphier/dram_init.c
@@ -15,9 +15,6 @@
 #include "sg-regs.h"
 #include "soc-info.h"
 
-#define pr_warn(fmt, args...)	printf(fmt, ##args)
-#define pr_err(fmt, args...)	printf(fmt, ##args)
-
 DECLARE_GLOBAL_DATA_PTR;
 
 struct uniphier_memif_data {
diff --git a/arch/arm/mach-uniphier/init.h b/arch/arm/mach-uniphier/init.h
index 29f638d947..da209354ed 100644
--- a/arch/arm/mach-uniphier/init.h
+++ b/arch/arm/mach-uniphier/init.h
@@ -104,9 +104,4 @@ int uniphier_have_internal_stm(void);
 int uniphier_boot_from_backend(void);
 int uniphier_pin_init(const char *pinconfig_name);
 
-#undef pr_warn
-#define pr_warn(fmt, args...)	printf(fmt, ##args)
-#undef pr_err
-#define pr_err(fmt, args...)	printf(fmt, ##args)
-
 #endif /* __MACH_INIT_H */
diff --git a/common/Kconfig b/common/Kconfig
index fec9afff24..ed8db73cff 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -243,6 +243,27 @@ config IDENT_STRING
 	help
 	  This options adds the board specific name to u-boot version.
 
+config LOGLEVEL
+	int "loglevel"
+	default 6
+	range 0 8
+	help
+	  All Messages with a loglevel smaller than the console loglevel will
+	  be compiled in. The loglevels are defined as follows:
+
+	  0 (KERN_EMERG)          system is unusable
+	  1 (KERN_ALERT)          action must be taken immediately
+	  2 (KERN_CRIT)           critical conditions
+	  3 (KERN_ERR)            error conditions
+	  4 (KERN_WARNING)        warning conditions
+	  5 (KERN_NOTICE)         normal but significant condition
+	  6 (KERN_INFO)           informational
+	  7 (KERN_DEBUG)          debug-level messages
+
+config SPL_LOGLEVEL
+	int
+	default LOGLEVEL
+
 config SILENT_CONSOLE
 	bool "Support a silent console"
 	help
diff --git a/configs/axm_defconfig b/configs/axm_defconfig
index 81654b2304..cd89c2a235 100644
--- a/configs/axm_defconfig
+++ b/configs/axm_defconfig
@@ -41,3 +41,4 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_USE_TINY_PRINTF=y
+CONFIG_LOGLEVEL=4
diff --git a/configs/colibri_vf_defconfig b/configs/colibri_vf_defconfig
index 1ffe861809..49315d0638 100644
--- a/configs/colibri_vf_defconfig
+++ b/configs/colibri_vf_defconfig
@@ -6,6 +6,7 @@ CONFIG_TARGET_COLIBRI_VF=y
 CONFIG_DEFAULT_DEVICE_TREE="vf610-colibri"
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri_vf/imximage.cfg,IMX_NAND"
 CONFIG_BOOTDELAY=1
+CONFIG_LOGLEVEL=3
 CONFIG_VERSION_VARIABLE=y
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_ARCH_MISC_INIT=y
diff --git a/configs/corvus_defconfig b/configs/corvus_defconfig
index 705e001457..059cb5992e 100644
--- a/configs/corvus_defconfig
+++ b/configs/corvus_defconfig
@@ -14,6 +14,7 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,MACH_TYPE=2066,SYS_USE_NANDFLASH"
 CONFIG_BOOTDELAY=3
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2"
+CONFIG_LOGLEVEL=4
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_SPL=y
diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig
index c95134bcf9..3e9eb4fa84 100644
--- a/configs/omapl138_lcdk_defconfig
+++ b/configs/omapl138_lcdk_defconfig
@@ -8,6 +8,7 @@ CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_NAND_SUPPORT=y
 CONFIG_BOOTDELAY=3
+CONFIG_LOGLEVEL=4
 CONFIG_VERSION_VARIABLE=y
 # CONFIG_DISPLAY_CPUINFO is not set
 # CONFIG_DISPLAY_BOARDINFO is not set
diff --git a/configs/openrd_base_defconfig b/configs/openrd_base_defconfig
index b2a0e04d36..f31af1c3fe 100644
--- a/configs/openrd_base_defconfig
+++ b/configs/openrd_base_defconfig
@@ -5,6 +5,7 @@ CONFIG_TARGET_OPENRD=y
 CONFIG_IDENT_STRING="\nOpenRD-Base"
 CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_BASE"
 CONFIG_BOOTDELAY=3
+CONFIG_LOGLEVEL=3
 # CONFIG_DISPLAY_BOARDINFO is not set
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set
diff --git a/configs/openrd_client_defconfig b/configs/openrd_client_defconfig
index 8b1d35edd1..bee818b82c 100644
--- a/configs/openrd_client_defconfig
+++ b/configs/openrd_client_defconfig
@@ -5,6 +5,7 @@ CONFIG_TARGET_OPENRD=y
 CONFIG_IDENT_STRING="\nOpenRD-Client"
 CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_CLIENT"
 CONFIG_BOOTDELAY=3
+CONFIG_LOGLEVEL=3
 # CONFIG_DISPLAY_BOARDINFO is not set
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set
diff --git a/configs/openrd_ultimate_defconfig b/configs/openrd_ultimate_defconfig
index 4cc0205629..e9462e59b2 100644
--- a/configs/openrd_ultimate_defconfig
+++ b/configs/openrd_ultimate_defconfig
@@ -5,6 +5,7 @@ CONFIG_TARGET_OPENRD=y
 CONFIG_IDENT_STRING="\nOpenRD-Ultimate"
 CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_ULTIMATE"
 CONFIG_BOOTDELAY=3
+CONFIG_LOGLEVEL=3
 # CONFIG_DISPLAY_BOARDINFO is not set
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set
diff --git a/configs/taurus_defconfig b/configs/taurus_defconfig
index 71a382a3e1..5b7fc8ae14 100644
--- a/configs/taurus_defconfig
+++ b/configs/taurus_defconfig
@@ -16,6 +16,7 @@ CONFIG_SPL_SPI_SUPPORT=y
 CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20-taurus"
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,MACH_TYPE=2067,BOARD_TAURUS"
 CONFIG_BOOTDELAY=3
+CONFIG_LOGLEVEL=4
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2"
 # CONFIG_DISPLAY_BOARDINFO is not set
diff --git a/configs/vf610twr_defconfig b/configs/vf610twr_defconfig
index 948ea73edb..3c277be682 100644
--- a/configs/vf610twr_defconfig
+++ b/configs/vf610twr_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_VF610=y
 CONFIG_DEFAULT_DEVICE_TREE="vf610-twr"
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/vf610twr/imximage.cfg"
 CONFIG_BOOTDELAY=3
+CONFIG_LOGLEVEL=3
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
diff --git a/configs/vf610twr_nand_defconfig b/configs/vf610twr_nand_defconfig
index 10cdf0646c..1cd22b1b8b 100644
--- a/configs/vf610twr_nand_defconfig
+++ b/configs/vf610twr_nand_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_VF610=y
 CONFIG_DEFAULT_DEVICE_TREE="vf610-twr"
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/vf610twr/imximage.cfg"
 CONFIG_BOOTDELAY=3
+CONFIG_LOGLEVEL=3
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
diff --git a/drivers/bios_emulator/include/x86emu/x86emui.h b/drivers/bios_emulator/include/x86emu/x86emui.h
index a74957d992..3537255539 100644
--- a/drivers/bios_emulator/include/x86emu/x86emui.h
+++ b/drivers/bios_emulator/include/x86emu/x86emui.h
@@ -72,9 +72,6 @@
 #include <string.h>
 #endif
 
-#define printk printf
-
-
 /*--------------------------- Inline Functions ----------------------------*/
 
 #ifdef  __cplusplus
diff --git a/drivers/usb/dwc3/linux-compat.h b/drivers/usb/dwc3/linux-compat.h
index 9e944a31be..64db4ecc3c 100644
--- a/drivers/usb/dwc3/linux-compat.h
+++ b/drivers/usb/dwc3/linux-compat.h
@@ -12,7 +12,6 @@
 #ifndef __DWC3_LINUX_COMPAT__
 #define __DWC3_LINUX_COMPAT__
 
-#define pr_debug(format)                debug(format)
 #define WARN(val, format, arg...)	debug(format, ##arg)
 #define dev_WARN(dev, format, arg...)	debug(format, ##arg)
 #define WARN_ON_ONCE(val)		debug("Error %d\n", val)
diff --git a/drivers/usb/musb-new/linux-compat.h b/drivers/usb/musb-new/linux-compat.h
index 4dae83ed68..7bb53d2b19 100644
--- a/drivers/usb/musb-new/linux-compat.h
+++ b/drivers/usb/musb-new/linux-compat.h
@@ -5,8 +5,6 @@
 #include <linux/list.h>
 #include <linux/compat.h>
 
-#define pr_debug(fmt, args...) debug(fmt, ##args)
-
 #define WARN(condition, fmt, args...) ({	\
 	int ret_warn = !!condition;		\
 	if (ret_warn)				\
diff --git a/include/common.h b/include/common.h
index af31a28469..9719b55c68 100644
--- a/include/common.h
+++ b/include/common.h
@@ -25,6 +25,7 @@ typedef volatile unsigned char	vu_char;
 #include <linux/bitops.h>
 #include <linux/delay.h>
 #include <linux/types.h>
+#include <linux/printk.h>
 #include <linux/string.h>
 #include <linux/stringify.h>
 #include <asm/ptrace.h>
@@ -55,11 +56,6 @@ typedef volatile unsigned char	vu_char;
 #define _SPL_BUILD	0
 #endif
 
-/* Define this at the top of a file to add a prefix to debug messages */
-#ifndef pr_fmt
-#define pr_fmt(fmt) fmt
-#endif
-
 /*
  * Output a debug text when condition "cond" is met. The "cond" should be
  * computed by a preprocessor in the best case, allowing for the best
diff --git a/include/linux/compat.h b/include/linux/compat.h
index 2336b56cf5..bc027adcb9 100644
--- a/include/linux/compat.h
+++ b/include/linux/compat.h
@@ -25,17 +25,6 @@ extern struct p_current *current;
 	printf(fmt, ##args)
 #define dev_warn(dev, fmt, args...)		\
 	printf(fmt, ##args)
-#define printk	printf
-#define printk_once	printf
-
-#define KERN_EMERG
-#define KERN_ALERT
-#define KERN_CRIT
-#define KERN_ERR
-#define KERN_WARNING
-#define KERN_NOTICE
-#define KERN_INFO
-#define KERN_DEBUG
 
 #define GFP_ATOMIC ((gfp_t) 0)
 #define GFP_KERNEL ((gfp_t) 0)
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index 1fd17c303a..3e1694b3a5 100644
--- a/include/linux/mtd/mtd.h
+++ b/include/linux/mtd/mtd.h
@@ -452,28 +452,20 @@ static inline void mtd_erase_callback(struct erase_info *instr)
 #define MTD_DEBUG_LEVEL3	(3)	/* Noisy   */
 
 #ifdef CONFIG_MTD_DEBUG
-#define pr_debug(args...)	MTDDEBUG(MTD_DEBUG_LEVEL0, args)
 #define MTDDEBUG(n, args...)				\
 	do {						\
 		if (n <= CONFIG_MTD_DEBUG_VERBOSE)	\
 			printk(KERN_INFO args);		\
 	} while(0)
 #else /* CONFIG_MTD_DEBUG */
-#define pr_debug(args...)
 #define MTDDEBUG(n, args...)				\
 	do {						\
 		if (0)					\
 			printk(KERN_INFO args);		\
 	} while(0)
 #endif /* CONFIG_MTD_DEBUG */
-#define pr_info(args...)	MTDDEBUG(MTD_DEBUG_LEVEL0, args)
-#define pr_warn(args...)	MTDDEBUG(MTD_DEBUG_LEVEL0, args)
-#define pr_err(args...)		MTDDEBUG(MTD_DEBUG_LEVEL0, args)
-#define pr_crit(args...)	MTDDEBUG(MTD_DEBUG_LEVEL0, args)
-#define pr_cont(args...)	MTDDEBUG(MTD_DEBUG_LEVEL0, args)
-#define pr_notice(args...)	MTDDEBUG(MTD_DEBUG_LEVEL0, args)
 #endif
- 
+
 static inline int mtd_is_bitflip(int err) {
 	return err == -EUCLEAN;
 }
diff --git a/include/linux/printk.h b/include/linux/printk.h
new file mode 100644
index 0000000000..088513ad29
--- /dev/null
+++ b/include/linux/printk.h
@@ -0,0 +1,79 @@
+#ifndef __KERNEL_PRINTK__
+#define __KERNEL_PRINTK__
+
+#include <stdio.h>
+#include <linux/compiler.h>
+
+#define KERN_EMERG
+#define KERN_ALERT
+#define KERN_CRIT
+#define KERN_ERR
+#define KERN_WARNING
+#define KERN_NOTICE
+#define KERN_INFO
+#define KERN_DEBUG
+#define KERN_CONT
+
+#define printk(fmt, ...) \
+	printf(fmt, ##__VA_ARGS__)
+
+/*
+ * Dummy printk for disabled debugging statements to use whilst maintaining
+ * gcc's format checking.
+ */
+#define no_printk(fmt, ...)				\
+({							\
+	if (0)						\
+		printk(fmt, ##__VA_ARGS__);		\
+	0;						\
+})
+
+#define __printk(level, fmt, ...)					\
+({									\
+	level < CONFIG_LOGLEVEL ? printk(fmt, ##__VA_ARGS__) : 0;	\
+})
+
+#ifndef pr_fmt
+#define pr_fmt(fmt) fmt
+#endif
+
+#define pr_emerg(fmt, ...) \
+	__printk(0, pr_fmt(fmt), ##__VA_ARGS__)
+#define pr_alert(fmt, ...) \
+	__printk(1, pr_fmt(fmt), ##__VA_ARGS__)
+#define pr_crit(fmt, ...) \
+	__printk(2, pr_fmt(fmt), ##__VA_ARGS__)
+#define pr_err(fmt, ...) \
+	__printk(3, pr_fmt(fmt), ##__VA_ARGS__)
+#define pr_warning(fmt, ...) \
+	__printk(4, pr_fmt(fmt), ##__VA_ARGS__)
+#define pr_warn pr_warning
+#define pr_notice(fmt, ...) \
+	__printk(5, pr_fmt(fmt), ##__VA_ARGS__)
+#define pr_info(fmt, ...) \
+	__printk(6, pr_fmt(fmt), ##__VA_ARGS__)
+
+#define pr_cont(fmt, ...) \
+	printk(fmt, ##__VA_ARGS__)
+
+/* pr_devel() should produce zero code unless DEBUG is defined */
+#ifdef DEBUG
+#define pr_devel(fmt, ...) \
+	__printk(7, pr_fmt(fmt), ##__VA_ARGS__)
+#else
+#define pr_devel(fmt, ...) \
+	no_printk(pr_fmt(fmt), ##__VA_ARGS__)
+#endif
+
+#ifdef DEBUG
+#define pr_debug(fmt, ...) \
+	__printk(7, pr_fmt(fmt), ##__VA_ARGS__)
+#else
+#define pr_debug(fmt, ...) \
+	no_printk(pr_fmt(fmt), ##__VA_ARGS__)
+#endif
+
+#define printk_once(fmt, ...) \
+	printk(fmt, ##__VA_ARGS__)
+
+#endif

commit 50f8c1b1d6befc71c1530e0967d9cd1e9a268552
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Sat Sep 16 14:10:39 2017 +0900

    UPSTREAM: stdio.h: move printf() stuff from <common.h> to <stdio.h>
    
    <common.h> pulls in a lot of headers.  Including it from every .c
    file is a bad idea.  We need to remove contents until it contains
    nothing.
    
    Move printf() and friends to <stdio.h>.
    
    Change-Id: I7f64296fe6e08bf695e9e274ab0f21e72e36ec48
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 7fea7b1a37ad2b1c1e92bd87f7c6a1877d70e579)

diff --git a/include/common.h b/include/common.h
index 017268929f..af31a28469 100644
--- a/include/common.h
+++ b/include/common.h
@@ -29,6 +29,7 @@ typedef volatile unsigned char	vu_char;
 #include <linux/stringify.h>
 #include <asm/ptrace.h>
 #include <stdarg.h>
+#include <stdio.h>
 #include <linux/kernel.h>
 
 #include <part.h>
@@ -719,46 +720,6 @@ unsigned int rand_r(unsigned int *seedp);
 /* serial stuff */
 int	serial_printf (const char *fmt, ...)
 		__attribute__ ((format (__printf__, 1, 2)));
-/* stdin */
-int	getc(void);
-int	tstc(void);
-
-/* stdout */
-#if !defined(CONFIG_SPL_BUILD) || \
-	(defined(CONFIG_TPL_BUILD) && defined(CONFIG_TPL_SERIAL_SUPPORT)) || \
-	(defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD) && \
-		defined(CONFIG_SPL_SERIAL_SUPPORT))
-void	putc(const char c);
-void	puts(const char *s);
-int	printf(const char *fmt, ...)
-		__attribute__ ((format (__printf__, 1, 2)));
-int	vprintf(const char *fmt, va_list args);
-#else
-#define	putc(...) do { } while (0)
-#define puts(...) do { } while (0)
-#define printf(...) do { } while (0)
-#define vprintf(...) do { } while (0)
-#endif
-
-/* stderr */
-#define eputc(c)		fputc(stderr, c)
-#define eputs(s)		fputs(stderr, s)
-#define eprintf(fmt,args...)	fprintf(stderr,fmt ,##args)
-
-/*
- * FILE based functions (can only be used AFTER relocation!)
- */
-#define stdin		0
-#define stdout		1
-#define stderr		2
-#define MAX_FILES	3
-
-int	fprintf(int file, const char *fmt, ...)
-		__attribute__ ((format (__printf__, 2, 3)));
-void	fputs(int file, const char *s);
-void	fputc(int file, const char c);
-int	ftstc(int file);
-int	fgetc(int file);
 
 /* lib/gzip.c */
 int gzip(void *dst, unsigned long *lenp,
diff --git a/include/stdio.h b/include/stdio.h
new file mode 100644
index 0000000000..aedf374452
--- /dev/null
+++ b/include/stdio.h
@@ -0,0 +1,59 @@
+#ifndef __STDIO_H
+#define __STDIO_H
+
+#include <stdarg.h>
+#include <linux/compiler.h>
+
+/* stdin */
+int getc(void);
+int tstc(void);
+
+/* stdout */
+#if !defined(CONFIG_SPL_BUILD) || \
+	(defined(CONFIG_TPL_BUILD) && defined(CONFIG_TPL_SERIAL_SUPPORT)) || \
+	(defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD) && \
+		defined(CONFIG_SPL_SERIAL_SUPPORT))
+void putc(const char c);
+void puts(const char *s);
+int __printf(1, 2) printf(const char *fmt, ...);
+int vprintf(const char *fmt, va_list args);
+#else
+static inline void putc(const char c)
+{
+}
+
+static inline void puts(const char *s)
+{
+}
+
+static inline int __printf(1, 2) printf(const char *fmt, ...)
+{
+	return 0;
+}
+
+static inline int vprintf(const char *fmt, va_list args)
+{
+	return 0;
+}
+#endif
+
+/*
+ * FILE based functions (can only be used AFTER relocation!)
+ */
+#define stdin		0
+#define stdout		1
+#define stderr		2
+#define MAX_FILES	3
+
+/* stderr */
+#define eputc(c)		fputc(stderr, c)
+#define eputs(s)		fputs(stderr, s)
+#define eprintf(fmt, args...)	fprintf(stderr, fmt, ##args)
+
+int __printf(2, 3) fprintf(int file, const char *fmt, ...);
+void fputs(int file, const char *s);
+void fputc(int file, const char c);
+int ftstc(int file);
+int fgetc(int file);
+
+#endif /* __STDIO_H */

commit 14464b32f69185c9e884f0fbe96a03a7504bd70d
Author: Maxime Ripard <maxime.ripard@free-electrons.com>
Date:   Thu Aug 24 11:52:32 2017 +0200

    UPSTREAM: cmd: Move CONFIG_RANDOM_UUID to Kconfig
    
    CONFIG_RANDOM_UUID is used by the GPT command to generate random UUID when
    none are provided.
    
    Move that option to Kconfig.
    
    Reviewed-by: Tom Rini <trini@konsulko.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Change-Id: Ie4c840fb583d1e5c95170e452ccbb04034926119
    Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 47738acceda5bae52b7c33ce912da6b52244c033)

diff --git a/cmd/Kconfig b/cmd/Kconfig
index b8df092e79..ef9bc920ac 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -663,10 +663,17 @@ config CMD_GPT
 	bool "GPT (GUID Partition Table) command"
 	select PARTITION_UUIDS
 	select EFI_PARTITION
+	imply RANDOM_UUID
 	help
 	  Enable the 'gpt' command to ready and write GPT style partition
 	  tables.
 
+config RANDOM_UUID
+	bool "GPT Random UUID generation"
+	help
+	  Enable the generation of partitions with random UUIDs if none
+	  are provided.
+
 config CMD_GPT_RENAME
 	bool "GPT partition renaming commands"
 	depends on CMD_GPT
diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig
index c7ef594071..72b08c544e 100644
--- a/configs/evb-rv1108_defconfig
+++ b/configs/evb-rv1108_defconfig
@@ -13,6 +13,7 @@ CONFIG_FASTBOOT_BUF_SIZE=0x08000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=1
 # CONFIG_CMD_IMLS is not set
+CONFIG_RANDOM_UUID=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
diff --git a/configs/rock_defconfig b/configs/rock_defconfig
index cd7b36b5a7..1534754cf3 100644
--- a/configs/rock_defconfig
+++ b/configs/rock_defconfig
@@ -15,6 +15,7 @@ CONFIG_DEBUG_UART=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 # CONFIG_CMD_IMLS is not set
+CONFIG_RANDOM_UUID=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
diff --git a/include/configs/am57xx_evm.h b/include/configs/am57xx_evm.h
index 0c70c53050..62b28209c6 100644
--- a/include/configs/am57xx_evm.h
+++ b/include/configs/am57xx_evm.h
@@ -72,7 +72,6 @@
 #include <configs/ti_omap5_common.h>
 
 /* Enhance our eMMC support / experience. */
-#define CONFIG_RANDOM_UUID
 #define CONFIG_HSMMC2_8BIT
 
 /* CPSW Ethernet */
diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h
index 6c0fc35d3a..f618fa7260 100644
--- a/include/configs/dra7xx_evm.h
+++ b/include/configs/dra7xx_evm.h
@@ -91,7 +91,6 @@
 #include <configs/ti_omap5_common.h>
 
 /* Enhance our eMMC support / experience. */
-#define CONFIG_RANDOM_UUID
 #define CONFIG_HSMMC2_8BIT
 
 /* CPSW Ethernet */
diff --git a/include/configs/edison.h b/include/configs/edison.h
index d25b50c076..e26a4c7a39 100644
--- a/include/configs/edison.h
+++ b/include/configs/edison.h
@@ -13,7 +13,6 @@
 #define CONFIG_BOOTCOMMAND "run bootcmd"
 
 /* DISK Partition support */
-#define CONFIG_RANDOM_UUID
 
 /* Miscellaneous configurable options */
 #define CONFIG_SYS_LONGHELP
diff --git a/include/configs/odroid.h b/include/configs/odroid.h
index 2afb19f84a..22e9c82497 100644
--- a/include/configs/odroid.h
+++ b/include/configs/odroid.h
@@ -174,7 +174,6 @@
 	"fdtaddr=40800000\0"
 
 /* GPT */
-#define CONFIG_RANDOM_UUID
 
 /* Security subsystem - enable hw_rand() */
 #define CONFIG_EXYNOS_ACE_SHA
diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index 62d04f0d09..5eac4446f5 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -27,8 +27,6 @@
 	func(DHCP, dchp, na)
 #endif
 
-#define CONFIG_RANDOM_UUID
-
 #ifdef CONFIG_ARM64
 #define ROOT_UUID "B921B045-1DF0-41C3-AF44-4C6F280D3FAE;\0"
 #else
diff --git a/include/configs/trats.h b/include/configs/trats.h
index 5d0a3240a6..5b33a3b18e 100644
--- a/include/configs/trats.h
+++ b/include/configs/trats.h
@@ -168,7 +168,6 @@
 #define CONFIG_SYS_SPL_ARGS_ADDR        CONFIG_SYS_SDRAM_BASE + 0x100
 
 /* GPT */
-#define CONFIG_RANDOM_UUID
 
 /* Security subsystem - enable hw_rand() */
 #define CONFIG_EXYNOS_ACE_SHA
diff --git a/include/configs/trats2.h b/include/configs/trats2.h
index 7f6a61a1db..95c011f9a9 100644
--- a/include/configs/trats2.h
+++ b/include/configs/trats2.h
@@ -150,7 +150,6 @@
 	"fdtaddr=40800000\0" \
 
 /* GPT */
-#define CONFIG_RANDOM_UUID
 
 /* Security subsystem - enable hw_rand() */
 #define CONFIG_EXYNOS_ACE_SHA
diff --git a/include/configs/vinco.h b/include/configs/vinco.h
index 490dc446d6..189ceca821 100644
--- a/include/configs/vinco.h
+++ b/include/configs/vinco.h
@@ -59,7 +59,6 @@
 #define CONFIG_SYS_MMC_CLK_OD		500000
 
 /* For generating MMC partitions */
-#define CONFIG_RANDOM_UUID
 
 #endif
 
diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h
index 6025706964..1399dfd436 100644
--- a/include/configs/xilinx_zynqmp.h
+++ b/include/configs/xilinx_zynqmp.h
@@ -103,7 +103,6 @@
 		DFU_ALT_INFO_RAM
 
 #ifndef CONFIG_SPL_BUILD
-# define CONFIG_RANDOM_UUID
 # define PARTS_DEFAULT \
 	"partitions=uuid_disk=${uuid_gpt_disk};" \
 	"name=""boot"",size=16M,uuid=${uuid_gpt_boot};" \
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 46cd9299dd..c5c7c598c5 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -1852,7 +1852,6 @@ CONFIG_RAMDISK_ADDR
 CONFIG_RAMDISK_BOOT
 CONFIG_RAM_BOOT
 CONFIG_RAM_BOOT_PHYS
-CONFIG_RANDOM_UUID
 CONFIG_RCAR_BOARD_STRING
 CONFIG_RD_LVL
 CONFIG_REALMODE_DEBUG

commit a55428f790bf091332084aaa5c7a0d195063002d
Author: Maxime Ripard <maxime.ripard@free-electrons.com>
Date:   Mon Oct 2 15:25:56 2017 +0200

    UPSTREAM: sandbox: Expand list of IO accessors
    
    The setbits/clrbits/clrsetbits macros are used widely across the tree,
    let's provide implementation for them in the sandbox.
    
    Change-Id: Idb421bde7a225c38760da09f179b68a11116802b
    Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit a4dd8722fab257ff23cd63483b2926a4e197be96)

diff --git a/arch/sandbox/include/asm/io.h b/arch/sandbox/include/asm/io.h
index a6856356df..3ece70d09d 100644
--- a/arch/sandbox/include/asm/io.h
+++ b/arch/sandbox/include/asm/io.h
@@ -56,6 +56,53 @@ void outl(unsigned int value, unsigned int addr);
 void outw(unsigned int value, unsigned int addr);
 void outb(unsigned int value, unsigned int addr);
 
+#define out_arch(type,endian,a,v)	write##type(cpu_to_##endian(v),a)
+#define in_arch(type,endian,a)		endian##_to_cpu(read##type(a))
+
+#define out_le32(a,v)	out_arch(l,le32,a,v)
+#define out_le16(a,v)	out_arch(w,le16,a,v)
+
+#define in_le32(a)	in_arch(l,le32,a)
+#define in_le16(a)	in_arch(w,le16,a)
+
+#define out_be32(a,v)	out_arch(l,be32,a,v)
+#define out_be16(a,v)	out_arch(w,be16,a,v)
+
+#define in_be32(a)	in_arch(l,be32,a)
+#define in_be16(a)	in_arch(w,be16,a)
+
+#define out_8(a,v)	writeb(v,a)
+#define in_8(a)		readb(a)
+
+#define clrbits(type, addr, clear) \
+	out_##type((addr), in_##type(addr) & ~(clear))
+
+#define setbits(type, addr, set) \
+	out_##type((addr), in_##type(addr) | (set))
+
+#define clrsetbits(type, addr, clear, set) \
+	out_##type((addr), (in_##type(addr) & ~(clear)) | (set))
+
+#define clrbits_be32(addr, clear) clrbits(be32, addr, clear)
+#define setbits_be32(addr, set) setbits(be32, addr, set)
+#define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)
+
+#define clrbits_le32(addr, clear) clrbits(le32, addr, clear)
+#define setbits_le32(addr, set) setbits(le32, addr, set)
+#define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
+
+#define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
+#define setbits_be16(addr, set) setbits(be16, addr, set)
+#define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
+
+#define clrbits_le16(addr, clear) clrbits(le16, addr, clear)
+#define setbits_le16(addr, set) setbits(le16, addr, set)
+#define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
+
+#define clrbits_8(addr, clear) clrbits(8, addr, clear)
+#define setbits_8(addr, set) setbits(8, addr, set)
+#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
+
 static inline void _insw(volatile u16 *port, void *buf, int ns)
 {
 }

commit 7350191d828385ff2b937ac67d5c830f7f8011fc
Author: Paul Burton <paul.burton@imgtec.com>
Date:   Thu Sep 14 15:05:03 2017 -0700

    UPSTREAM: arm: Use asm-generic/io.h
    
    Convert the arm architecture to make use of the new asm-generic/io.h to
    provide address mapping functions. As the generic implementations are
    suitable for arm this is primarily a matter of removing code.
    
    This has only been build-tested, feedback from architecture maintainers
    is welcome.
    
    Change-Id: I26ff51026961b89fc1dbd282c9b3d8c3cf9b4119
    Signed-off-by: Paul Burton <paul.burton@imgtec.com>
    Cc: Albert Aribaud <albert.u.boot@aribaud.net>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 8f8e6304df54b36d5971a69ff3de0f6f9ad4bf4e)

diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index 5834f5b3dc..5df74728de 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -34,35 +34,6 @@ static inline void sync(void)
 {
 }
 
-/*
- * Given a physical address and a length, return a virtual address
- * that can be used to access the memory range with the caching
- * properties specified by "flags".
- */
-#define MAP_NOCACHE	(0)
-#define MAP_WRCOMBINE	(0)
-#define MAP_WRBACK	(0)
-#define MAP_WRTHROUGH	(0)
-
-static inline void *
-map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
-{
-	return (void *)((unsigned long)paddr);
-}
-
-/*
- * Take down a mapping set up by map_physmem().
- */
-static inline void unmap_physmem(void *vaddr, unsigned long flags)
-{
-
-}
-
-static inline phys_addr_t virt_to_phys(void * vaddr)
-{
-	return (phys_addr_t)((unsigned long)vaddr);
-}
-
 /*
  * Generic virtual read/write.  Note that we don't support half-word
  * read/writes.  We define __arch_*[bl] here, and leave __arch_*w
@@ -426,6 +397,7 @@ out:
 #endif	/* __mem_isa */
 #endif	/* __KERNEL__ */
 
+#include <asm-generic/io.h>
 #include <iotrace.h>
 
 #endif	/* __ASM_ARM_IO_H */

commit f35264bc648ac8bfbbaa780a977ae5dc11f53296
Author: Paul Burton <paul.burton@imgtec.com>
Date:   Thu Sep 14 15:05:01 2017 -0700

    UPSTREAM: Provide a generic io.h & address mapping functions
    
    Most architectures currently supported by U-Boot use trivial
    implementations of map_to_physmem & virt_to_phys which simply cast a
    physical address to a pointer for use a virtual address & vice-versa.
    This results in a lot of duplicate implementations of these mapping
    functions.
    
    The set of functions provided by different architectures also differs,
    with some having implementations of phys_to_virt & others not. A later
    patch will make use of phys_to_virt in architecture-neutral code, and so
    requires that it be provided for all architectures.
    
    This patch introduces an asm-generic/io.h which provides generic
    implementations of address mapping functions, allowing the duplication
    of them between architectures to be removed. Once architectures are
    converted to make use of this generic header it will also ensure that
    all of phys_to_virt, virt_to_phys, map_physmem & unmap_physmem are
    provided. The 2 families of functions differ in that map_physmem may
    create dynamic mappings whilst phys_to_virt may not & therefore is more
    limited in scope but doesn't require information such as a length &
    flags.
    
    This patch doesn't convert any architectures to make use of this generic
    header - later patches in the series will do so.
    
    Change-Id: I29d206b92b9ebcdd10e6599539bfd195d247c5f8
    Signed-off-by: Paul Burton <paul.burton@imgtec.com>
    Cc: Albert Aribaud <albert.u.boot@aribaud.net>
    Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
    Cc: Angelo Dureghello <angelo@sysam.it>
    Cc: Bin Meng <bmeng.cn@gmail.com>
    Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
    Cc: Macpaul Lin <macpaul@andestech.com>
    Cc: Michal Simek <monstr@monstr.eu>
    Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
    Cc: Thomas Chou <thomas@wytron.com.tw>
    Cc: Wolfgang Denk <wd@denx.de>
    Acked-by: Angelo Dureghello <angelo@sysam.it>
    Tested-by: Angelo Dureghello <angelo@sysam.it>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit d4150ca6dea5f81f527fb2a01fcffc3d8dd09fc4)

diff --git a/include/asm-generic/io.h b/include/asm-generic/io.h
new file mode 100644
index 0000000000..0f5160c6f1
--- /dev/null
+++ b/include/asm-generic/io.h
@@ -0,0 +1,110 @@
+/*
+ * Generic I/O functions.
+ *
+ * Copyright (c) 2016 Imagination Technologies Ltd.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __ASM_GENERIC_IO_H__
+#define __ASM_GENERIC_IO_H__
+
+/*
+ * This file should be included at the end of each architecture-specific
+ * asm/io.h such that we may provide generic implementations without
+ * conflicting with architecture-specific code.
+ */
+
+#ifndef __ASSEMBLY__
+
+/**
+ * phys_to_virt() - Return a virtual address mapped to a given physical address
+ * @paddr: the physical address
+ *
+ * Returns a virtual address which the CPU can access that maps to the physical
+ * address @paddr. This should only be used where it is known that no dynamic
+ * mapping is required. In general, map_physmem should be used instead.
+ *
+ * Returns: a virtual address which maps to @paddr
+ */
+#ifndef phys_to_virt
+static inline void *phys_to_virt(phys_addr_t paddr)
+{
+	return (void *)(unsigned long)paddr;
+}
+#endif
+
+/**
+ * virt_to_phys() - Return the physical address that a virtual address maps to
+ * @vaddr: the virtual address
+ *
+ * Returns the physical address which the CPU-accessible virtual address @vaddr
+ * maps to.
+ *
+ * Returns: the physical address which @vaddr maps to
+ */
+#ifndef virt_to_phys
+static inline phys_addr_t virt_to_phys(void *vaddr)
+{
+	return (phys_addr_t)((unsigned long)vaddr);
+}
+#endif
+
+/*
+ * Flags for use with map_physmem() & unmap_physmem(). Architectures need not
+ * support all of these, in which case they will be defined as zero here &
+ * ignored. Callers that may run on multiple architectures should therefore
+ * treat them as hints rather than requirements.
+ */
+#ifndef MAP_NOCACHE
+# define MAP_NOCACHE	0	/* Produce an uncached mapping */
+#endif
+#ifndef MAP_WRCOMBINE
+# define MAP_WRCOMBINE	0	/* Allow write-combining on the mapping */
+#endif
+#ifndef MAP_WRBACK
+# define MAP_WRBACK	0	/* Map using write-back caching */
+#endif
+#ifndef MAP_WRTHROUGH
+# define MAP_WRTHROUGH	0	/* Map using write-through caching */
+#endif
+
+/**
+ * map_physmem() - Return a virtual address mapped to a given physical address
+ * @paddr: the physical address
+ * @len: the length of the required mapping
+ * @flags: flags affecting the type of mapping
+ *
+ * Return a virtual address through which the CPU may access the memory at
+ * physical address @paddr. The mapping will be valid for at least @len bytes,
+ * and may be affected by flags passed to the @flags argument. This function
+ * may create new mappings, so should generally be paired with a matching call
+ * to unmap_physmem once the caller is finished with the memory in question.
+ *
+ * Returns: a virtual address suitably mapped to @paddr
+ */
+#ifndef map_physmem
+static inline void *map_physmem(phys_addr_t paddr, unsigned long len,
+				unsigned long flags)
+{
+	return phys_to_virt(paddr);
+}
+#endif
+
+/**
+ * unmap_physmem() - Remove mappings created by a prior call to map_physmem()
+ * @vaddr: the virtual address which map_physmem() previously returned
+ * @flags: flags matching those originally passed to map_physmem()
+ *
+ * Unmap memory which was previously mapped by a call to map_physmem(). If
+ * map_physmem() dynamically created a mapping for the memory in question then
+ * unmap_physmem() will remove that mapping.
+ */
+#ifndef unmap_physmem
+static inline void unmap_physmem(void *vaddr, unsigned long flags)
+{
+}
+#endif
+
+#endif /* !__ASSEMBLY__ */
+#endif /* __ASM_GENERIC_IO_H__ */

commit be129a1092fea3b8abbefad492939a4200d50ec2
Author: Marek Behún <marek.behun@nic.cz>
Date:   Sun Sep 3 17:00:25 2017 +0200

    UPSTREAM: include: Add a variadic macro to call a callback for all arguments
    
    Add a header variadic-macro.h which defines the CALL_MACRO_FOR_EACH marco.
    
    This macro can be used as follows:
      #define TEST(x)
      CALL_MACRO_FOR_EACH(TEST, a, b, c, d)
    
    This will expand to
      TEST(a) TEST(b) TEST(c) TEST(d)
    
    The nice thing is that CALL_MACRO_FOR_EACH is a variadic macro, thus the
    number of arguments can vary (although it has an upper limit - in this
    implementation 32 arguments).
    
    Change-Id: Ic186ed444a78a86a4cfa10f9ca1198c0bfa9af10
    Signed-off-by: Marek Behun <marek.behun@nic.cz>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 59981e6a3d6074bf5413c1875a95325a4b8c01ca)

diff --git a/include/u-boot/variadic-macro.h b/include/u-boot/variadic-macro.h
new file mode 100644
index 0000000000..922beafcea
--- /dev/null
+++ b/include/u-boot/variadic-macro.h
@@ -0,0 +1,59 @@
+/*
+ * Helper for work with variadic macros
+ *
+ * 2017 Marek Behun, CZ.NIC, marek.behun@nic.cz
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __VARIADIC_MACRO_H__
+#define __VARIADIC_MACRO_H__
+
+#define _VM_GET_NTH_ARG(_1, _2, _3, _4, _5, _6, _7, _8, _9, _10, _11, _12, _13, \
+	_14, _15, _16, _17, _18, _19, _20, _21, _22, _23, _24, _25, _26, _27, \
+	_28, _29, _30, _31, _32, N, ...) N
+
+#define _VM_HELP_0(_call, ...)
+#define _VM_HELP_1(_call, x, ...) _call(x)
+#define _VM_HELP_2(_call, x, ...) _call(x) _VM_HELP_1(_call, __VA_ARGS__)
+#define _VM_HELP_3(_call, x, ...) _call(x) _VM_HELP_2(_call, __VA_ARGS__)
+#define _VM_HELP_4(_call, x, ...) _call(x) _VM_HELP_3(_call, __VA_ARGS__)
+#define _VM_HELP_5(_call, x, ...) _call(x) _VM_HELP_4(_call, __VA_ARGS__)
+#define _VM_HELP_6(_call, x, ...) _call(x) _VM_HELP_5(_call, __VA_ARGS__)
+#define _VM_HELP_7(_call, x, ...) _call(x) _VM_HELP_6(_call, __VA_ARGS__)
+#define _VM_HELP_8(_call, x, ...) _call(x) _VM_HELP_7(_call, __VA_ARGS__)
+#define _VM_HELP_9(_call, x, ...) _call(x) _VM_HELP_8(_call, __VA_ARGS__)
+#define _VM_HELP_10(_call, x, ...) _call(x) _VM_HELP_9(_call, __VA_ARGS__)
+#define _VM_HELP_11(_call, x, ...) _call(x) _VM_HELP_10(_call, __VA_ARGS__)
+#define _VM_HELP_12(_call, x, ...) _call(x) _VM_HELP_11(_call, __VA_ARGS__)
+#define _VM_HELP_13(_call, x, ...) _call(x) _VM_HELP_12(_call, __VA_ARGS__)
+#define _VM_HELP_14(_call, x, ...) _call(x) _VM_HELP_13(_call, __VA_ARGS__)
+#define _VM_HELP_15(_call, x, ...) _call(x) _VM_HELP_14(_call, __VA_ARGS__)
+#define _VM_HELP_16(_call, x, ...) _call(x) _VM_HELP_15(_call, __VA_ARGS__)
+#define _VM_HELP_17(_call, x, ...) _call(x) _VM_HELP_16(_call, __VA_ARGS__)
+#define _VM_HELP_18(_call, x, ...) _call(x) _VM_HELP_17(_call, __VA_ARGS__)
+#define _VM_HELP_19(_call, x, ...) _call(x) _VM_HELP_18(_call, __VA_ARGS__)
+#define _VM_HELP_20(_call, x, ...) _call(x) _VM_HELP_19(_call, __VA_ARGS__)
+#define _VM_HELP_21(_call, x, ...) _call(x) _VM_HELP_20(_call, __VA_ARGS__)
+#define _VM_HELP_22(_call, x, ...) _call(x) _VM_HELP_21(_call, __VA_ARGS__)
+#define _VM_HELP_23(_call, x, ...) _call(x) _VM_HELP_22(_call, __VA_ARGS__)
+#define _VM_HELP_24(_call, x, ...) _call(x) _VM_HELP_23(_call, __VA_ARGS__)
+#define _VM_HELP_25(_call, x, ...) _call(x) _VM_HELP_24(_call, __VA_ARGS__)
+#define _VM_HELP_26(_call, x, ...) _call(x) _VM_HELP_25(_call, __VA_ARGS__)
+#define _VM_HELP_27(_call, x, ...) _call(x) _VM_HELP_26(_call, __VA_ARGS__)
+#define _VM_HELP_28(_call, x, ...) _call(x) _VM_HELP_27(_call, __VA_ARGS__)
+#define _VM_HELP_29(_call, x, ...) _call(x) _VM_HELP_28(_call, __VA_ARGS__)
+#define _VM_HELP_30(_call, x, ...) _call(x) _VM_HELP_29(_call, __VA_ARGS__)
+#define _VM_HELP_31(_call, x, ...) _call(x) _VM_HELP_30(_call, __VA_ARGS__)
+
+#define CALL_MACRO_FOR_EACH(x, ...)					 \
+	_VM_GET_NTH_ARG("", ##__VA_ARGS__, _VM_HELP_31, _VM_HELP_30,	 \
+	_VM_HELP_29, _VM_HELP_28, _VM_HELP_27, _VM_HELP_26, _VM_HELP_25, \
+	_VM_HELP_24, _VM_HELP_23, _VM_HELP_22, _VM_HELP_21, _VM_HELP_20, \
+	_VM_HELP_19, _VM_HELP_18, _VM_HELP_17, _VM_HELP_16, _VM_HELP_15, \
+	_VM_HELP_14, _VM_HELP_13, _VM_HELP_12, _VM_HELP_11, _VM_HELP_10, \
+	_VM_HELP_9, _VM_HELP_8, _VM_HELP_7, _VM_HELP_6, _VM_HELP_5,	 \
+	_VM_HELP_4, _VM_HELP_3, _VM_HELP_2, _VM_HELP_1,			 \
+	_VM_HELP_0)(x, __VA_ARGS__)
+
+#endif /* __VARIADIC_MACRO_H__ */

commit 9f816917d25e3273a1075258e0cb610d1ccc399e
Author: Marek Behún <marek.behun@nic.cz>
Date:   Sun Sep 3 17:00:24 2017 +0200

    UPSTREAM: fs: Create a common fs_devread for ext4/reiserfs/zfs
    
    The ext4, reiserfs and zfs filesystems all have their own implementation
    of the same function, *_devread. Generalize this function into fs_devread
    and put the code into fs/fs_internal.c.
    
    Change-Id: Ib558f0f40ba1520f4974ca5cbd31265573b156c9
    Signed-off-by: Marek Behun <marek.behun@nic.cz>
    [trini: Move fs/fs_internal.o hunk to the end of fs/Makefile as all
    cases need it]
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 5994e8b6432d1c6df1cad44771f02054dba893ff)

diff --git a/fs/Makefile b/fs/Makefile
index 5770f41c0b..b53c9d7cca 100644
--- a/fs/Makefile
+++ b/fs/Makefile
@@ -23,3 +23,4 @@ obj-$(CONFIG_CMD_UBIFS) += ubifs/
 obj-$(CONFIG_YAFFS2) += yaffs2/
 obj-$(CONFIG_CMD_ZFS) += zfs/
 endif
+obj-y += fs_internal.o
diff --git a/fs/ext4/dev.c b/fs/ext4/dev.c
index ae2ba6a901..f04fa08f64 100644
--- a/fs/ext4/dev.c
+++ b/fs/ext4/dev.c
@@ -26,7 +26,7 @@
 #include <common.h>
 #include <blk.h>
 #include <config.h>
-#include <memalign.h>
+#include <fs_internal.h>
 #include <ext4fs.h>
 #include <ext_common.h>
 #include "ext4_common.h"
@@ -47,85 +47,11 @@ void ext4fs_set_blk_dev(struct blk_desc *rbdd, disk_partition_t *info)
 		get_fs()->dev_desc->log2blksz;
 }
 
-int ext4fs_devread(lbaint_t sector, int byte_offset, int byte_len, char *buf)
+int ext4fs_devread(lbaint_t sector, int byte_offset, int byte_len,
+		   char *buffer)
 {
-	unsigned block_len;
-	int log2blksz = ext4fs_blk_desc->log2blksz;
-	ALLOC_CACHE_ALIGN_BUFFER(char, sec_buf, (ext4fs_blk_desc ?
-						 ext4fs_blk_desc->blksz :
-						 0));
-	if (ext4fs_blk_desc == NULL) {
-		printf("** Invalid Block Device Descriptor (NULL)\n");
-		return 0;
-	}
-
-	/* Check partition boundaries */
-	if ((sector + ((byte_offset + byte_len - 1) >> log2blksz))
-	    >= part_info->size) {
-		printf("%s read outside partition " LBAFU "\n", __func__,
-		       sector);
-		return 0;
-	}
-
-	/* Get the read to the beginning of a partition */
-	sector += byte_offset >> log2blksz;
-	byte_offset &= ext4fs_blk_desc->blksz - 1;
-
-	debug(" <" LBAFU ", %d, %d>\n", sector, byte_offset, byte_len);
-
-	if (byte_offset != 0) {
-		int readlen;
-		/* read first part which isn't aligned with start of sector */
-		if (blk_dread(ext4fs_blk_desc, part_info->start + sector, 1,
-			      (void *)sec_buf) != 1) {
-			printf(" ** ext2fs_devread() read error **\n");
-			return 0;
-		}
-		readlen = min((int)ext4fs_blk_desc->blksz - byte_offset,
-			      byte_len);
-		memcpy(buf, sec_buf + byte_offset, readlen);
-		buf += readlen;
-		byte_len -= readlen;
-		sector++;
-	}
-
-	if (byte_len == 0)
-		return 1;
-
-	/* read sector aligned part */
-	block_len = byte_len & ~(ext4fs_blk_desc->blksz - 1);
-
-	if (block_len == 0) {
-		ALLOC_CACHE_ALIGN_BUFFER(u8, p, ext4fs_blk_desc->blksz);
-
-		block_len = ext4fs_blk_desc->blksz;
-		blk_dread(ext4fs_blk_desc, part_info->start + sector, 1,
-			  (void *)p);
-		memcpy(buf, p, byte_len);
-		return 1;
-	}
-
-	if (blk_dread(ext4fs_blk_desc, part_info->start + sector,
-		      block_len >> log2blksz, (void *)buf) !=
-			block_len >> log2blksz) {
-		printf(" ** %s read error - block\n", __func__);
-		return 0;
-	}
-	block_len = byte_len & ~(ext4fs_blk_desc->blksz - 1);
-	buf += block_len;
-	byte_len -= block_len;
-	sector += block_len / ext4fs_blk_desc->blksz;
-
-	if (byte_len != 0) {
-		/* read rest of data which are not in whole sector */
-		if (blk_dread(ext4fs_blk_desc, part_info->start + sector, 1,
-			      (void *)sec_buf) != 1) {
-			printf("* %s read error - last part\n", __func__);
-			return 0;
-		}
-		memcpy(buf, sec_buf, byte_len);
-	}
-	return 1;
+	return fs_devread(get_fs()->dev_desc, part_info, sector, byte_offset,
+			  byte_len, buffer);
 }
 
 int ext4_read_superblock(char *buffer)
diff --git a/fs/fs_internal.c b/fs/fs_internal.c
new file mode 100644
index 0000000000..58b441030c
--- /dev/null
+++ b/fs/fs_internal.c
@@ -0,0 +1,92 @@
+/*
+ * 2017 by Marek Behun <marek.behun@nic.cz>
+ *
+ * Derived from code in ext4/dev.c, which was based on reiserfs/dev.c
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#include <common.h>
+#include <compiler.h>
+#include <part.h>
+#include <memalign.h>
+
+int fs_devread(struct blk_desc *blk, disk_partition_t *partition,
+	       lbaint_t sector, int byte_offset, int byte_len, char *buf)
+{
+	unsigned block_len;
+	int log2blksz = blk->log2blksz;
+	ALLOC_CACHE_ALIGN_BUFFER(char, sec_buf, (blk ? blk->blksz : 0));
+	if (blk == NULL) {
+		printf("** Invalid Block Device Descriptor (NULL)\n");
+		return 0;
+	}
+
+	/* Check partition boundaries */
+	if ((sector + ((byte_offset + byte_len - 1) >> log2blksz))
+	    >= partition->size) {
+		printf("%s read outside partition " LBAFU "\n", __func__,
+		       sector);
+		return 0;
+	}
+
+	/* Get the read to the beginning of a partition */
+	sector += byte_offset >> log2blksz;
+	byte_offset &= blk->blksz - 1;
+
+	debug(" <" LBAFU ", %d, %d>\n", sector, byte_offset, byte_len);
+
+	if (byte_offset != 0) {
+		int readlen;
+		/* read first part which isn't aligned with start of sector */
+		if (blk_dread(blk, partition->start + sector, 1,
+			      (void *)sec_buf) != 1) {
+			printf(" ** %s read error **\n", __func__);
+			return 0;
+		}
+		readlen = min((int)blk->blksz - byte_offset,
+			      byte_len);
+		memcpy(buf, sec_buf + byte_offset, readlen);
+		buf += readlen;
+		byte_len -= readlen;
+		sector++;
+	}
+
+	if (byte_len == 0)
+		return 1;
+
+	/* read sector aligned part */
+	block_len = byte_len & ~(blk->blksz - 1);
+
+	if (block_len == 0) {
+		ALLOC_CACHE_ALIGN_BUFFER(u8, p, blk->blksz);
+
+		block_len = blk->blksz;
+		blk_dread(blk, partition->start + sector, 1,
+			  (void *)p);
+		memcpy(buf, p, byte_len);
+		return 1;
+	}
+
+	if (blk_dread(blk, partition->start + sector,
+		      block_len >> log2blksz, (void *)buf) !=
+			block_len >> log2blksz) {
+		printf(" ** %s read error - block\n", __func__);
+		return 0;
+	}
+	block_len = byte_len & ~(blk->blksz - 1);
+	buf += block_len;
+	byte_len -= block_len;
+	sector += block_len / blk->blksz;
+
+	if (byte_len != 0) {
+		/* read rest of data which are not in whole sector */
+		if (blk_dread(blk, partition->start + sector, 1,
+			      (void *)sec_buf) != 1) {
+			printf("* %s read error - last part\n", __func__);
+			return 0;
+		}
+		memcpy(buf, sec_buf, byte_len);
+	}
+	return 1;
+}
diff --git a/fs/reiserfs/dev.c b/fs/reiserfs/dev.c
index 5a1ab0a364..7b786e4ed3 100644
--- a/fs/reiserfs/dev.c
+++ b/fs/reiserfs/dev.c
@@ -9,7 +9,7 @@
 #include <common.h>
 #include <config.h>
 #include <reiserfs.h>
-
+#include <fs_internal.h>
 #include "reiserfs_private.h"
 
 static struct blk_desc *reiserfs_blk_desc;
@@ -22,78 +22,8 @@ void reiserfs_set_blk_dev(struct blk_desc *rbdd, disk_partition_t *info)
 	part_info = info;
 }
 
-
-int reiserfs_devread (int sector, int byte_offset, int byte_len, char *buf)
+int reiserfs_devread(int sector, int byte_offset, int byte_len, char *buf)
 {
-	char sec_buf[SECTOR_SIZE];
-	unsigned block_len;
-/*
-	unsigned len = byte_len;
-	u8 *start = buf;
-*/
-	/*
-	*  Check partition boundaries
-	*/
-	if (sector < 0
-	    || ((sector + ((byte_offset + byte_len - 1) >> SECTOR_BITS))
-	    >= part_info->size)) {
-/*		errnum = ERR_OUTSIDE_PART; */
-		printf (" ** reiserfs_devread() read outside partition\n");
-		return 0;
-	}
-
-	/*
-	 *  Get the read to the beginning of a partition.
-	 */
-	sector += byte_offset >> SECTOR_BITS;
-	byte_offset &= SECTOR_SIZE - 1;
-
-#if defined(DEBUG)
-	printf (" <%d, %d, %d> ", sector, byte_offset, byte_len);
-#endif
-
-
-	if (reiserfs_blk_desc == NULL)
-		return 0;
-
-
-	if (byte_offset != 0) {
-		/* read first part which isn't aligned with start of sector */
-		if (reiserfs_blk_desc->block_read(reiserfs_blk_desc,
-						  part_info->start + sector,
-						  1, (void *)sec_buf) != 1) {
-			printf (" ** reiserfs_devread() read error\n");
-			return 0;
-		}
-		memcpy(buf, sec_buf+byte_offset, min(SECTOR_SIZE-byte_offset, byte_len));
-		buf+=min(SECTOR_SIZE-byte_offset, byte_len);
-		byte_len-=min(SECTOR_SIZE-byte_offset, byte_len);
-		sector++;
-	}
-
-	/* read sector aligned part */
-	block_len = byte_len & ~(SECTOR_SIZE-1);
-	if (reiserfs_blk_desc->block_read(reiserfs_blk_desc,
-					  part_info->start + sector,
-					  block_len / SECTOR_SIZE, (void *)buf)
-			!= block_len/SECTOR_SIZE) {
-		printf (" ** reiserfs_devread() read error - block\n");
-		return 0;
-	}
-	buf+=block_len;
-	byte_len-=block_len;
-	sector+= block_len/SECTOR_SIZE;
-
-	if ( byte_len != 0 ) {
-		/* read rest of data which are not in whole sector */
-		if (reiserfs_blk_desc->block_read(reiserfs_blk_desc,
-						  part_info->start + sector,
-						  1, (void *)sec_buf) != 1) {
-			printf (" ** reiserfs_devread() read error - last part\n");
-			return 0;
-		}
-		memcpy(buf, sec_buf, byte_len);
-	}
-
-	return 1;
+	return fs_devread(reiserfs_blk_desc, part_info, sector, byte_offset,
+			  byte_len, buf);
 }
diff --git a/fs/zfs/dev.c b/fs/zfs/dev.c
index 2f409e66cd..7dda42b48b 100644
--- a/fs/zfs/dev.c
+++ b/fs/zfs/dev.c
@@ -11,6 +11,7 @@
 
 #include <common.h>
 #include <config.h>
+#include <fs_internal.h>
 #include <zfs_common.h>
 
 static struct blk_desc *zfs_blk_desc;
@@ -25,87 +26,6 @@ void zfs_set_blk_dev(struct blk_desc *rbdd, disk_partition_t *info)
 /* err */
 int zfs_devread(int sector, int byte_offset, int byte_len, char *buf)
 {
-	short sec_buffer[SECTOR_SIZE/sizeof(short)];
-	char *sec_buf = (char *)sec_buffer;
-	unsigned block_len;
-
-	/*
-	 *	Check partition boundaries
-	 */
-	if ((sector < 0) ||
-		((sector + ((byte_offset + byte_len - 1) >> SECTOR_BITS)) >=
-		 part_info->size)) {
-		/*		errnum = ERR_OUTSIDE_PART; */
-		printf(" ** zfs_devread() read outside partition sector %d\n", sector);
-		return 1;
-	}
-
-	/*
-	 *	Get the read to the beginning of a partition.
-	 */
-	sector += byte_offset >> SECTOR_BITS;
-	byte_offset &= SECTOR_SIZE - 1;
-
-	debug(" <%d, %d, %d>\n", sector, byte_offset, byte_len);
-
-	if (zfs_blk_desc == NULL) {
-		printf("** Invalid Block Device Descriptor (NULL)\n");
-		return 1;
-	}
-
-	if (byte_offset != 0) {
-		/* read first part which isn't aligned with start of sector */
-		if (zfs_blk_desc->block_read(zfs_blk_desc,
-					     part_info->start + sector, 1,
-					     (void *)sec_buf) != 1) {
-			printf(" ** zfs_devread() read error **\n");
-			return 1;
-		}
-		memcpy(buf, sec_buf + byte_offset,
-			   min(SECTOR_SIZE - byte_offset, byte_len));
-		buf += min(SECTOR_SIZE - byte_offset, byte_len);
-		byte_len -= min(SECTOR_SIZE - byte_offset, byte_len);
-		sector++;
-	}
-
-	if (byte_len == 0)
-		return 0;
-
-	/*	read sector aligned part */
-	block_len = byte_len & ~(SECTOR_SIZE - 1);
-
-	if (block_len == 0) {
-		u8 p[SECTOR_SIZE];
-
-		block_len = SECTOR_SIZE;
-		zfs_blk_desc->block_read(zfs_blk_desc,
-					 part_info->start + sector,
-					 1, (void *)p);
-		memcpy(buf, p, byte_len);
-		return 0;
-	}
-
-	if (zfs_blk_desc->block_read(zfs_blk_desc, part_info->start + sector,
-				     block_len / SECTOR_SIZE,
-				     (void *)buf) != block_len / SECTOR_SIZE) {
-		printf(" ** zfs_devread() read error - block\n");
-		return 1;
-	}
-
-	block_len = byte_len & ~(SECTOR_SIZE - 1);
-	buf += block_len;
-	byte_len -= block_len;
-	sector += block_len / SECTOR_SIZE;
-
-	if (byte_len != 0) {
-		/* read rest of data which are not in whole sector */
-		if (zfs_blk_desc->block_read(zfs_blk_desc,
-					     part_info->start + sector,
-					     1, (void *)sec_buf) != 1) {
-			printf(" ** zfs_devread() read error - last part\n");
-			return 1;
-		}
-		memcpy(buf, sec_buf, byte_len);
-	}
-	return 0;
+	return fs_devread(zfs_blk_desc, part_info, sector, byte_offset,
+			  byte_len, buf);
 }
diff --git a/include/fs_internal.h b/include/fs_internal.h
new file mode 100644
index 0000000000..9d6dddd841
--- /dev/null
+++ b/include/fs_internal.h
@@ -0,0 +1,17 @@
+/*
+ * 2017 by Marek Behun <marek.behun@nic.cz>
+ *
+ * Derived from code in ext4/dev.c, which was based on reiserfs/dev.c
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#ifndef __U_BOOT_FS_INTERNAL_H__
+#define __U_BOOT_FS_INTERNAL_H__
+
+#include <part.h>
+
+int fs_devread(struct blk_desc *, disk_partition_t *, lbaint_t, int, int,
+	       char *);
+
+#endif /* __U_BOOT_FS_INTERNAL_H__ */

commit 92193ef7346ae7bb0de4c531eaa9a2703dcc2573
Author: Marek Behún <marek.behun@nic.cz>
Date:   Sun Sep 3 17:00:23 2017 +0200

    UPSTREAM: lib: Add CRC32-C
    
    This is needed for BTRFS.
    
    Change-Id: I7415e99a6f06aef89f3520ebe9a9ba92a9189059
    Signed-off-by: Marek Behun <marek.behun@nic.cz>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 85d8bf57131a21424b50e50884372e813345f09a)

diff --git a/include/u-boot/crc.h b/include/u-boot/crc.h
index 6764d58bab..6d08f5df98 100644
--- a/include/u-boot/crc.h
+++ b/include/u-boot/crc.h
@@ -28,4 +28,8 @@ uint32_t crc32_no_comp (uint32_t, const unsigned char *, uint);
 void crc32_wd_buf(const unsigned char *input, uint ilen,
 		    unsigned char *output, uint chunk_sz);
 
+/* lib/crc32c.c */
+void crc32c_init(uint32_t *, uint32_t);
+uint32_t crc32c_cal(uint32_t, const char *, int, uint32_t *);
+
 #endif /* _UBOOT_CRC_H */
diff --git a/lib/Kconfig b/lib/Kconfig
index bf3be1643a..a5aa2e6244 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -149,6 +149,9 @@ config SHA_PROG_HW_ACCEL
 config MD5
 	bool
 
+config CRC32C
+	bool
+
 endmenu
 
 menu "Compression Support"
diff --git a/lib/Makefile b/lib/Makefile
index 17331d55b3..ab604be04f 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -75,6 +75,7 @@ obj-y += display_options.o
 CFLAGS_display_options.o := $(if $(BUILD_TAG),-DBUILD_TAG='"$(BUILD_TAG)"')
 obj-$(CONFIG_BCH) += bch.o
 obj-y += crc32.o
+obj-$(CONFIG_CRC32C) += crc32c.o
 obj-y += ctype.o
 obj-y += div64.o
 obj-y += hang.o
diff --git a/lib/crc32c.c b/lib/crc32c.c
new file mode 100644
index 0000000000..322c08ff5d
--- /dev/null
+++ b/lib/crc32c.c
@@ -0,0 +1,38 @@
+/*
+ * Copied from Linux kernel crypto/crc32c.c
+ * Copyright (c) 2004 Cisco Systems, Inc.
+ * Copyright (c) 2008 Herbert Xu <herbert@gondor.apana.org.au>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <compiler.h>
+
+uint32_t crc32c_cal(uint32_t crc, const char *data, int length,
+		    uint32_t *crc32c_table)
+{
+	while (length--)
+		crc = crc32c_table[(u8)(crc ^ *data++)] ^ (crc >> 8);
+
+	return crc;
+}
+
+void crc32c_init(uint32_t *crc32c_table, uint32_t pol)
+{
+	int i, j;
+	uint32_t v;
+	const uint32_t poly = pol; /* Bit-reflected CRC32C polynomial */
+
+	for (i = 0; i < 256; i++) {
+		v = i;
+		for (j = 0; j < 8; j++)
+			v = (v >> 1) ^ ((v & 1) ? poly : 0);
+
+		crc32c_table[i] = v;
+	}
+}

commit 114cd93113d4cb71f58555e08b5cb1f60b97ed6d
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Sat Sep 30 22:56:22 2017 -0700

    UPSTREAM: scripts: dtc: Add .gitignore
    
    Ignore these generated files during the build of dtc.
    
    Change-Id: If9e9bf0ba501c18ee04436865a48bee41d9ed7cb
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit de163ecedb8a54dc72d5c6cadbfd1a85befce6ce)

diff --git a/scripts/dtc/.gitignore b/scripts/dtc/.gitignore
new file mode 100644
index 0000000000..d807c081a2
--- /dev/null
+++ b/scripts/dtc/.gitignore
@@ -0,0 +1,4 @@
+/dtc
+/dtc-lexer.lex.c
+/dtc-parser.tab.c
+/dtc-parser.tab.h

commit d4ecf6514bfe20d5bd2b3b48e6ea58057cf8c256
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Wed Sep 27 21:50:07 2017 -0700

    UPSTREAM: usb: storage: Fix overwritten in usb_stor_set_max_xfer_blk()
    
    The stored 'blk' value is overwritten to 'size / 512' before it can
    be used in usb_stor_set_max_xfer_blk(). This is not what we want.
    In fact, when 'size' exceeds the upper limit (USHRT_MAX * 512), we
    should simply assign 'size' to the upper limit.
    
    Change-Id: I078963e74b22450d0d876e846e44d93118cff96a
    Reported-by: Coverity (CID: 167250)
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 72ac8f3fc29016a31ee309b4d025b487e78906ab)

diff --git a/common/usb_storage.c b/common/usb_storage.c
index a57570b73f..a91b1c0d2f 100644
--- a/common/usb_storage.c
+++ b/common/usb_storage.c
@@ -964,7 +964,7 @@ static void usb_stor_set_max_xfer_blk(struct usb_device *udev,
 		blk = 20;
 	} else {
 		if (size > USHRT_MAX * 512)
-			blk = USHRT_MAX;
+			size = USHRT_MAX * 512;
 		blk = size / 512;
 	}
 #endif

commit f018b53dacfdd7ef6f1d3324fc47f9d32fdfe419
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Mon Sep 18 06:40:50 2017 -0700

    UPSTREAM: usb: xhci: Set 'Average TRB Length' to 8 for control endpoints
    
    Update the codes to conform with xHCI spec chapter 6.2.3.
    
    Change-Id: I9227754f7f7faf27f90046178526fad4d45e699e
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit fae35857e1c38776854442f59d6b56c17e93fc39)

diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
index 84982a92d6..0582a9be40 100644
--- a/drivers/usb/host/xhci-mem.c
+++ b/drivers/usb/host/xhci-mem.c
@@ -850,6 +850,12 @@ void xhci_setup_addressable_virt_dev(struct xhci_ctrl *ctrl,
 	trb_64 = (uintptr_t)virt_dev->eps[0].ring->first_seg->trbs;
 	ep0_ctx->deq = cpu_to_le64(trb_64 | virt_dev->eps[0].ring->cycle_state);
 
+	/*
+	 * xHCI spec 6.2.3:
+	 * software shall set 'Average TRB Length' to 8 for control endpoints.
+	 */
+	ep0_ctx->tx_info = cpu_to_le32(EP_AVG_TRB_LENGTH(8));
+
 	/* Steps 7 and 8 were done in xhci_alloc_virt_device() */
 
 	xhci_flush_cache((uintptr_t)ep0_ctx, sizeof(struct xhci_ep_ctx));
diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index 93737b083c..4673738d1e 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -601,6 +601,12 @@ static int xhci_set_configuration(struct usb_device *udev)
 		ep_ctx[ep_index]->deq = cpu_to_le64(trb_64 |
 				virt_dev->eps[ep_index].ring->cycle_state);
 
+		/*
+		 * xHCI spec 6.2.3:
+		 * 'Average TRB Length' should be 8 for control endpoints.
+		 */
+		if (usb_endpoint_xfer_control(endpt_desc))
+			avg_trb_len = 8;
 		ep_ctx[ep_index]->tx_info =
 			cpu_to_le32(EP_MAX_ESIT_PAYLOAD_LO(max_esit_payload) |
 			EP_AVG_TRB_LENGTH(avg_trb_len));

commit dd5c0fa31552e0f38d8579c1ec224c80ddd7be1b
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Mon Sep 18 06:40:49 2017 -0700

    UPSTREAM: usb: xhci: Set 'Error Count' to 0 for isoch endpoints
    
    Per xHCI spec, 'Error Count' should be set to 0 for isoch endpoints.
    
    Change-Id: Ibf1924935d705faa8a34e0bc94a44e3a0d1c28e2
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit ab2b727dc03113fe35d6a9c937911055be3d3990)

diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index dfb188d5e4..93737b083c 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -511,6 +511,7 @@ static int xhci_set_configuration(struct usb_device *udev)
 	unsigned int mult;
 	unsigned int max_burst;
 	unsigned int avg_trb_len;
+	unsigned int err_count = 0;
 
 	out_ctx = virt_dev->out_ctx;
 	in_ctx = virt_dev->in_ctx;
@@ -588,9 +589,12 @@ static int xhci_set_configuration(struct usb_device *udev)
 			cpu_to_le32(MAX_PACKET
 			(get_unaligned(&endpt_desc->wMaxPacketSize)));
 
+		/* Allow 3 retries for everything but isoc, set CErr = 3 */
+		if (!usb_endpoint_xfer_isoc(endpt_desc))
+			err_count = 3;
 		ep_ctx[ep_index]->ep_info2 |=
 			cpu_to_le32(MAX_BURST(max_burst) |
-			((3 & ERROR_COUNT_MASK) << ERROR_COUNT_SHIFT));
+			ERROR_COUNT(err_count));
 
 		trb_64 = (uintptr_t)
 				virt_dev->eps[ep_index].ring->enqueue;

commit 2874e912bc0172f87cc97fe87d8da9cfa7395451
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Mon Sep 18 06:40:48 2017 -0700

    UPSTREAM: usb: xhci: Program max burst size for endpoint
    
    The 'Max Burst Size' indicates to the xHC the maximum number of
    consecutive USB transactions that should be executed per scheduling
    opportunity. This is a “zero-based” value, where 0 to 15 represents
    burst sizes of 1 to 16, but at present this is always set to zero.
    Let's program the required value according to real needs.
    
    Change-Id: Id8dbdbfb248acd016b1e133b86334b9815b8ff2d
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit fa483b2c750f6ebdb5946f46b217aa3f9a449531)

diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index 8aed4283ed..dfb188d5e4 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -395,6 +395,22 @@ static u32 xhci_get_endpoint_mult(struct usb_device *udev,
 	return ss_ep_comp_desc->bmAttributes;
 }
 
+static u32 xhci_get_endpoint_max_burst(struct usb_device *udev,
+	struct usb_endpoint_descriptor *endpt_desc,
+	struct usb_ss_ep_comp_descriptor *ss_ep_comp_desc)
+{
+	/* Super speed and Plus have max burst in ep companion desc */
+	if (udev->speed >= USB_SPEED_SUPER)
+		return ss_ep_comp_desc->bMaxBurst;
+
+	if (udev->speed == USB_SPEED_HIGH &&
+	    (usb_endpoint_xfer_isoc(endpt_desc) ||
+	     usb_endpoint_xfer_int(endpt_desc)))
+		return usb_endpoint_maxp_mult(endpt_desc) - 1;
+
+	return 0;
+}
+
 /*
  * Return the maximum endpoint service interval time (ESIT) payload.
  * Basically, this is the maxpacket size, multiplied by the burst size
@@ -493,6 +509,7 @@ static int xhci_set_configuration(struct usb_device *udev)
 	u32 max_esit_payload;
 	unsigned int interval;
 	unsigned int mult;
+	unsigned int max_burst;
 	unsigned int avg_trb_len;
 
 	out_ctx = virt_dev->out_ctx;
@@ -545,6 +562,8 @@ static int xhci_set_configuration(struct usb_device *udev)
 		interval = xhci_get_endpoint_interval(udev, endpt_desc);
 		mult = xhci_get_endpoint_mult(udev, endpt_desc,
 					      ss_ep_comp_desc);
+		max_burst = xhci_get_endpoint_max_burst(udev, endpt_desc,
+							ss_ep_comp_desc);
 		avg_trb_len = max_esit_payload;
 
 		ep_index = xhci_get_ep_index(endpt_desc);
@@ -570,7 +589,7 @@ static int xhci_set_configuration(struct usb_device *udev)
 			(get_unaligned(&endpt_desc->wMaxPacketSize)));
 
 		ep_ctx[ep_index]->ep_info2 |=
-			cpu_to_le32(((0 & MAX_BURST_MASK) << MAX_BURST_SHIFT) |
+			cpu_to_le32(MAX_BURST(max_burst) |
 			((3 & ERROR_COUNT_MASK) << ERROR_COUNT_SHIFT));
 
 		trb_64 = (uintptr_t)

commit 1fa1b46003859465500b920473957295bb3684bd
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Mon Sep 18 06:40:47 2017 -0700

    UPSTREAM: usb: xhci: Honor endpoint's interval
    
    USB endpoint reports the period between consecutive requests to send
    or receive data as bInverval in its endpoint descriptor. So far this
    is ignored by xHCI driver and the 'Interval' field in xHC's endpoint
    context is always programmed to zero which means 1ms for low speed
    or full speed , or 125us for high speed or super speed. We should
    honor the interval by getting it from endpoint descriptor.
    
    Change-Id: Ib9180ea7b15d29fdc5a90315dcb0ffea672877a3
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit f51966bf7afe44151756e9a2432705bb56bc2007)

diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index ec82fa664e..8aed4283ed 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -257,6 +257,172 @@ static unsigned int xhci_get_ep_index(struct usb_endpoint_descriptor *desc)
 	return index;
 }
 
+/*
+ * Convert bInterval expressed in microframes (in 1-255 range) to exponent of
+ * microframes, rounded down to nearest power of 2.
+ */
+static unsigned int xhci_microframes_to_exponent(unsigned int desc_interval,
+						 unsigned int min_exponent,
+						 unsigned int max_exponent)
+{
+	unsigned int interval;
+
+	interval = fls(desc_interval) - 1;
+	interval = clamp_val(interval, min_exponent, max_exponent);
+	if ((1 << interval) != desc_interval)
+		debug("rounding interval to %d microframes, "\
+		      "ep desc says %d microframes\n",
+		      1 << interval, desc_interval);
+
+	return interval;
+}
+
+static unsigned int xhci_parse_microframe_interval(struct usb_device *udev,
+	struct usb_endpoint_descriptor *endpt_desc)
+{
+	if (endpt_desc->bInterval == 0)
+		return 0;
+
+	return xhci_microframes_to_exponent(endpt_desc->bInterval, 0, 15);
+}
+
+static unsigned int xhci_parse_frame_interval(struct usb_device *udev,
+	struct usb_endpoint_descriptor *endpt_desc)
+{
+	return xhci_microframes_to_exponent(endpt_desc->bInterval * 8, 3, 10);
+}
+
+/*
+ * Convert interval expressed as 2^(bInterval - 1) == interval into
+ * straight exponent value 2^n == interval.
+ */
+static unsigned int xhci_parse_exponent_interval(struct usb_device *udev,
+	struct usb_endpoint_descriptor *endpt_desc)
+{
+	unsigned int interval;
+
+	interval = clamp_val(endpt_desc->bInterval, 1, 16) - 1;
+	if (interval != endpt_desc->bInterval - 1)
+		debug("ep %#x - rounding interval to %d %sframes\n",
+		      endpt_desc->bEndpointAddress, 1 << interval,
+		      udev->speed == USB_SPEED_FULL ? "" : "micro");
+
+	if (udev->speed == USB_SPEED_FULL) {
+		/*
+		 * Full speed isoc endpoints specify interval in frames,
+		 * not microframes. We are using microframes everywhere,
+		 * so adjust accordingly.
+		 */
+		interval += 3;	/* 1 frame = 2^3 uframes */
+	}
+
+	return interval;
+}
+
+/*
+ * Return the polling or NAK interval.
+ *
+ * The polling interval is expressed in "microframes". If xHCI's Interval field
+ * is set to N, it will service the endpoint every 2^(Interval)*125us.
+ *
+ * The NAK interval is one NAK per 1 to 255 microframes, or no NAKs if interval
+ * is set to 0.
+ */
+static unsigned int xhci_get_endpoint_interval(struct usb_device *udev,
+	struct usb_endpoint_descriptor *endpt_desc)
+{
+	unsigned int interval = 0;
+
+	switch (udev->speed) {
+	case USB_SPEED_HIGH:
+		/* Max NAK rate */
+		if (usb_endpoint_xfer_control(endpt_desc) ||
+		    usb_endpoint_xfer_bulk(endpt_desc)) {
+			interval = xhci_parse_microframe_interval(udev,
+								  endpt_desc);
+			break;
+		}
+		/* Fall through - SS and HS isoc/int have same decoding */
+
+	case USB_SPEED_SUPER:
+		if (usb_endpoint_xfer_int(endpt_desc) ||
+		    usb_endpoint_xfer_isoc(endpt_desc)) {
+			interval = xhci_parse_exponent_interval(udev,
+								endpt_desc);
+		}
+		break;
+
+	case USB_SPEED_FULL:
+		if (usb_endpoint_xfer_isoc(endpt_desc)) {
+			interval = xhci_parse_exponent_interval(udev,
+								endpt_desc);
+			break;
+		}
+		/*
+		 * Fall through for interrupt endpoint interval decoding
+		 * since it uses the same rules as low speed interrupt
+		 * endpoints.
+		 */
+
+	case USB_SPEED_LOW:
+		if (usb_endpoint_xfer_int(endpt_desc) ||
+		    usb_endpoint_xfer_isoc(endpt_desc)) {
+			interval = xhci_parse_frame_interval(udev, endpt_desc);
+		}
+		break;
+
+	default:
+		BUG();
+	}
+
+	return interval;
+}
+
+/*
+ * The "Mult" field in the endpoint context is only set for SuperSpeed isoc eps.
+ * High speed endpoint descriptors can define "the number of additional
+ * transaction opportunities per microframe", but that goes in the Max Burst
+ * endpoint context field.
+ */
+static u32 xhci_get_endpoint_mult(struct usb_device *udev,
+	struct usb_endpoint_descriptor *endpt_desc,
+	struct usb_ss_ep_comp_descriptor *ss_ep_comp_desc)
+{
+	if (udev->speed < USB_SPEED_SUPER ||
+	    !usb_endpoint_xfer_isoc(endpt_desc))
+		return 0;
+
+	return ss_ep_comp_desc->bmAttributes;
+}
+
+/*
+ * Return the maximum endpoint service interval time (ESIT) payload.
+ * Basically, this is the maxpacket size, multiplied by the burst size
+ * and mult size.
+ */
+static u32 xhci_get_max_esit_payload(struct usb_device *udev,
+	struct usb_endpoint_descriptor *endpt_desc,
+	struct usb_ss_ep_comp_descriptor *ss_ep_comp_desc)
+{
+	int max_burst;
+	int max_packet;
+
+	/* Only applies for interrupt or isochronous endpoints */
+	if (usb_endpoint_xfer_control(endpt_desc) ||
+	    usb_endpoint_xfer_bulk(endpt_desc))
+		return 0;
+
+	/* SuperSpeed Isoc ep with less than 48k per esit */
+	if (udev->speed >= USB_SPEED_SUPER)
+		return le16_to_cpu(ss_ep_comp_desc->wBytesPerInterval);
+
+	max_packet = usb_endpoint_maxp(endpt_desc);
+	max_burst = usb_endpoint_maxp_mult(endpt_desc);
+
+	/* A 0 in max burst means 1 transfer per ESIT */
+	return max_packet * max_burst;
+}
+
 /**
  * Issue a configure endpoint command or evaluate context command
  * and wait for it to finish.
@@ -324,6 +490,10 @@ static int xhci_set_configuration(struct usb_device *udev)
 	int slot_id = udev->slot_id;
 	struct xhci_virt_device *virt_dev = ctrl->devs[slot_id];
 	struct usb_interface *ifdesc;
+	u32 max_esit_payload;
+	unsigned int interval;
+	unsigned int mult;
+	unsigned int avg_trb_len;
 
 	out_ctx = virt_dev->out_ctx;
 	in_ctx = virt_dev->in_ctx;
@@ -357,10 +527,26 @@ static int xhci_set_configuration(struct usb_device *udev)
 	/* filling up ep contexts */
 	for (cur_ep = 0; cur_ep < num_of_ep; cur_ep++) {
 		struct usb_endpoint_descriptor *endpt_desc = NULL;
+		struct usb_ss_ep_comp_descriptor *ss_ep_comp_desc = NULL;
 
 		endpt_desc = &ifdesc->ep_desc[cur_ep];
+		ss_ep_comp_desc = &ifdesc->ss_ep_comp_desc[cur_ep];
 		trb_64 = 0;
 
+		/*
+		 * Get values to fill the endpoint context, mostly from ep
+		 * descriptor. The average TRB buffer lengt for bulk endpoints
+		 * is unclear as we have no clue on scatter gather list entry
+		 * size. For Isoc and Int, set it to max available.
+		 * See xHCI 1.1 spec 4.14.1.1 for details.
+		 */
+		max_esit_payload = xhci_get_max_esit_payload(udev, endpt_desc,
+							     ss_ep_comp_desc);
+		interval = xhci_get_endpoint_interval(udev, endpt_desc);
+		mult = xhci_get_endpoint_mult(udev, endpt_desc,
+					      ss_ep_comp_desc);
+		avg_trb_len = max_esit_payload;
+
 		ep_index = xhci_get_ep_index(endpt_desc);
 		ep_ctx[ep_index] = xhci_get_ep_ctx(ctrl, in_ctx, ep_index);
 
@@ -372,6 +558,11 @@ static int xhci_set_configuration(struct usb_device *udev)
 		/*NOTE: ep_desc[0] actually represents EP1 and so on */
 		dir = (((endpt_desc->bEndpointAddress) & (0x80)) >> 7);
 		ep_type = (((endpt_desc->bmAttributes) & (0x3)) | (dir << 2));
+
+		ep_ctx[ep_index]->ep_info =
+			cpu_to_le32(EP_MAX_ESIT_PAYLOAD_HI(max_esit_payload) |
+			EP_INTERVAL(interval) | EP_MULT(mult));
+
 		ep_ctx[ep_index]->ep_info2 =
 			cpu_to_le32(ep_type << EP_TYPE_SHIFT);
 		ep_ctx[ep_index]->ep_info2 |=
@@ -386,6 +577,10 @@ static int xhci_set_configuration(struct usb_device *udev)
 				virt_dev->eps[ep_index].ring->enqueue;
 		ep_ctx[ep_index]->deq = cpu_to_le64(trb_64 |
 				virt_dev->eps[ep_index].ring->cycle_state);
+
+		ep_ctx[ep_index]->tx_info =
+			cpu_to_le32(EP_MAX_ESIT_PAYLOAD_LO(max_esit_payload) |
+			EP_AVG_TRB_LENGTH(avg_trb_len));
 	}
 
 	return xhci_configure_endpoints(udev, false);
diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
index 3377450fca..ba5f650144 100644
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -663,8 +663,9 @@ struct xhci_ep_ctx {
 #define GET_MAX_PACKET(p)	((p) & 0x7ff)
 
 /* tx_info bitmasks */
-#define AVG_TRB_LENGTH_FOR_EP(p)	((p) & 0xffff)
-#define MAX_ESIT_PAYLOAD_FOR_EP(p)	(((p) & 0xffff) << 16)
+#define EP_AVG_TRB_LENGTH(p)		((p) & 0xffff)
+#define EP_MAX_ESIT_PAYLOAD_LO(p)	(((p) & 0xffff) << 16)
+#define EP_MAX_ESIT_PAYLOAD_HI(p)	((((p) >> 16) & 0xff) << 24)
 #define CTX_TO_MAX_ESIT_PAYLOAD(p)	(((p) >> 16) & 0xffff)
 
 /* deq bitmasks */
diff --git a/include/linux/usb/ch9.h b/include/linux/usb/ch9.h
index 0ad4782a36..264c9712a3 100644
--- a/include/linux/usb/ch9.h
+++ b/include/linux/usb/ch9.h
@@ -418,6 +418,12 @@ struct __packed usb_class_report_descriptor {
 #define USB_ENDPOINT_XFER_INT		3
 #define USB_ENDPOINT_MAX_ADJUSTABLE	0x80
 
+#define USB_ENDPOINT_MAXP_MASK		0x07ff
+#define USB_EP_MAXP_MULT_SHIFT		11
+#define USB_EP_MAXP_MULT_MASK		(3 << USB_EP_MAXP_MULT_SHIFT)
+#define USB_EP_MAXP_MULT(m)		\
+	(((m) & USB_EP_MAXP_MULT_MASK) >> USB_EP_MAXP_MULT_SHIFT)
+
 /* The USB 3.0 spec redefines bits 5:4 of bmAttributes as interrupt ep type. */
 #define USB_ENDPOINT_INTRTYPE		0x30
 #define USB_ENDPOINT_INTR_PERIODIC	(0 << 4)
@@ -625,6 +631,20 @@ static inline int usb_endpoint_maxp(const struct usb_endpoint_descriptor *epd)
 	return __le16_to_cpu(get_unaligned(&epd->wMaxPacketSize));
 }
 
+/**
+ * usb_endpoint_maxp_mult - get endpoint's transactional opportunities
+ * @epd: endpoint to be checked
+ *
+ * Return @epd's wMaxPacketSize[12:11] + 1
+ */
+static inline int
+usb_endpoint_maxp_mult(const struct usb_endpoint_descriptor *epd)
+{
+	int maxp = __le16_to_cpu(epd->wMaxPacketSize);
+
+	return USB_EP_MAXP_MULT(maxp) + 1;
+}
+
 static inline int usb_endpoint_interrupt_type(
 		const struct usb_endpoint_descriptor *epd)
 {

commit 2a13791069e306f5cf0fca866e3b8a0f07fb9c90
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Mon Sep 18 06:40:46 2017 -0700

    UPSTREAM: usb: hub: Clear BH reset status change for a 3.0 hub
    
    USB 3.0 hubs report bit[5] in the port status change response as BH
    reset. The hub shall set the C_BH_PORT_RESET field for this port.
    
    Change-Id: I54d72aba3b1901c505aec754f2183e4d8d2e82dd
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 061895fbe57d29f50bb3c6c8609d56a668d1387d)

diff --git a/common/usb_hub.c b/common/usb_hub.c
index a9d21bca5e..325d16dfc8 100644
--- a/common/usb_hub.c
+++ b/common/usb_hub.c
@@ -494,6 +494,12 @@ static int usb_scan_port(struct usb_device_scan *usb_scan)
 		usb_clear_port_feature(dev, i + 1, USB_PORT_FEAT_C_RESET);
 	}
 
+	if ((portchange & USB_SS_PORT_STAT_C_BH_RESET) &&
+	    usb_hub_is_superspeed(dev)) {
+		debug("port %d BH reset change\n", i + 1);
+		usb_clear_port_feature(dev, i + 1, USB_SS_PORT_FEAT_C_BH_RESET);
+	}
+
 	/* A new USB device is ready at this point */
 	debug("devnum=%d port=%d: USB dev found\n", dev->devnum, i + 1);
 

commit b717f6f66cef407d9e0e045324334333f5f125dd
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Mon Sep 18 06:40:45 2017 -0700

    UPSTREAM: usb: hub: Clear port reset before usb_hub_port_connect_change()
    
    During usb_hub_port_connect_change(), a port reset set feature
    request is issued to the port, and later a port reset clear feature
    is done to the same port before the function returns. However at
    the end of usb_scan_port(), we attempt to clear port reset again
    on a cached port status change variable, which should not be done.
    
    Adjust the call to clear port reset to right before the call to
    usb_hub_port_connect_change().
    
    Change-Id: Ib3df40451289134cc7e60a37293a33fc9fd35547
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit b90203526f2c5bcc05b4a65241ea226b7b9f52d0)

diff --git a/common/usb_hub.c b/common/usb_hub.c
index 86a3477664..a9d21bca5e 100644
--- a/common/usb_hub.c
+++ b/common/usb_hub.c
@@ -489,6 +489,11 @@ static int usb_scan_port(struct usb_device_scan *usb_scan)
 		return 0;
 	}
 
+	if (portchange & USB_PORT_STAT_C_RESET) {
+		debug("port %d reset change\n", i + 1);
+		usb_clear_port_feature(dev, i + 1, USB_PORT_FEAT_C_RESET);
+	}
+
 	/* A new USB device is ready at this point */
 	debug("devnum=%d port=%d: USB dev found\n", dev->devnum, i + 1);
 
@@ -543,11 +548,6 @@ static int usb_scan_port(struct usb_device_scan *usb_scan)
 		       hub->overcurrent_count[i]);
 	}
 
-	if (portchange & USB_PORT_STAT_C_RESET) {
-		debug("port %d reset change\n", i + 1);
-		usb_clear_port_feature(dev, i + 1, USB_PORT_FEAT_C_RESET);
-	}
-
 	/*
 	 * We're done with this device, so let's remove this device from
 	 * scanning list

commit 24acdf7a3d0209ed4d996bfa2dd2d0e701d80bd6
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Mon Sep 18 06:40:44 2017 -0700

    UPSTREAM: usb: xhci: Fix max packet size for full speed device endpoint 0
    
    In xhci_check_maxpacket(), the control endpoint 0 max packet size
    is wrongly taken from the interface's endpoint descriptor. However
    the default endpoint 0 does not come with an endpoint descriptor
    hence is not included in the interface structure. Change to use
    epmaxpacketin[0] instead.
    
    The other bug in this routine is that when setting max packet size
    to the xHC endpoint 0 context, it does not clear its previous value
    at all before programming a new one.
    
    Change-Id: I32199e4f4a0f2950fa71b139f667ece35e55483c
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit b5aa857b95194c15126245e99a384ec2fd9536e8)

diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index 4b3d58d56e..ec82fa664e 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -546,16 +546,13 @@ int xhci_check_maxpacket(struct usb_device *udev)
 	int max_packet_size;
 	int hw_max_packet_size;
 	int ret = 0;
-	struct usb_interface *ifdesc;
-
-	ifdesc = &udev->config.if_desc[0];
 
 	out_ctx = ctrl->devs[slot_id]->out_ctx;
 	xhci_inval_cache((uintptr_t)out_ctx->bytes, out_ctx->size);
 
 	ep_ctx = xhci_get_ep_ctx(ctrl, out_ctx, ep_index);
 	hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
-	max_packet_size = usb_endpoint_maxp(&ifdesc->ep_desc[0]);
+	max_packet_size = udev->epmaxpacketin[0];
 	if (hw_max_packet_size != max_packet_size) {
 		debug("Max Packet Size for ep 0 changed.\n");
 		debug("Max packet size in usb_device = %d\n", max_packet_size);
@@ -567,7 +564,8 @@ int xhci_check_maxpacket(struct usb_device *udev)
 				ctrl->devs[slot_id]->out_ctx, ep_index);
 		in_ctx = ctrl->devs[slot_id]->in_ctx;
 		ep_ctx = xhci_get_ep_ctx(ctrl, in_ctx, ep_index);
-		ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK);
+		ep_ctx->ep_info2 &= cpu_to_le32(~((0xffff & MAX_PACKET_MASK)
+						<< MAX_PACKET_SHIFT));
 		ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
 
 		/*

commit 32cec33c6f6646f866adb86b0889354221241c69
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Mon Sep 18 06:40:43 2017 -0700

    UPSTREAM: usb: Read device descriptor after device is addressed for xHCI
    
    For xHCI it is not possible to read a device descriptor before it
    has been assigned an address. That's why usb_setup_descriptor()
    was called with 'do_read' being false. But we really need try to
    read the device descriptor before starting any real communication
    with the default control endpoint.
    
    Change-Id: I14a3f6698ba805f5ef35242ab9b374a91158552c
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 932bb668bb2464115f2d08abbed44e58cfce9536)

diff --git a/common/usb.c b/common/usb.c
index 376fdb1f6d..a6d88fdcb9 100644
--- a/common/usb.c
+++ b/common/usb.c
@@ -1051,6 +1051,17 @@ static int usb_prepare_device(struct usb_device *dev, int addr, bool do_read,
 
 	mdelay(10);	/* Let the SET_ADDRESS settle */
 
+	/*
+	 * If we haven't read device descriptor before, read it here
+	 * after device is assigned an address. This is only applicable
+	 * to xHCI so far.
+	 */
+	if (!do_read) {
+		err = usb_setup_descriptor(dev, true);
+		if (err)
+			return err;
+	}
+
 	return 0;
 }
 

commit a9cf3839831feff4465b736bcd5413355bd322ad
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Mon Sep 18 06:40:42 2017 -0700

    UPSTREAM: usb: Only get 64 bytes device descriptor for full speed devices
    
    Full speed device endpoint 0 can have 8/16/32/64 bMaxPacketSize0.
    Other speed devices report fixed value per USB spec. So it only
    makes sense if we send a get device descriptor with 64 bytes to
    full speed devices.
    
    While we are here, update the comment block to be within 80 cols.
    
    Change-Id: I035b83fb71ce4aa37f23fccba430d65814600a55
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit c008faa77358bb5b313696dd1d5bb8afa03a6ca2)

diff --git a/common/usb.c b/common/usb.c
index 0904259757..376fdb1f6d 100644
--- a/common/usb.c
+++ b/common/usb.c
@@ -969,23 +969,24 @@ static int usb_setup_descriptor(struct usb_device *dev, bool do_read)
 	dev->epmaxpacketin[0] = dev->descriptor.bMaxPacketSize0;
 	dev->epmaxpacketout[0] = dev->descriptor.bMaxPacketSize0;
 
-	if (do_read) {
+	if (do_read && dev->speed == USB_SPEED_FULL) {
 		int err;
 
 		/*
-		 * Validate we've received only at least 8 bytes, not that we've
-		 * received the entire descriptor. The reasoning is:
-		 * - The code only uses fields in the first 8 bytes, so that's all we
-		 *   need to have fetched at this stage.
-		 * - The smallest maxpacket size is 8 bytes. Before we know the actual
-		 *   maxpacket the device uses, the USB controller may only accept a
-		 *   single packet. Consequently we are only guaranteed to receive 1
-		 *   packet (at least 8 bytes) even in a non-error case.
+		 * Validate we've received only at least 8 bytes, not that
+		 * we've received the entire descriptor. The reasoning is:
+		 * - The code only uses fields in the first 8 bytes, so
+		 *   that's all we need to have fetched at this stage.
+		 * - The smallest maxpacket size is 8 bytes. Before we know
+		 *   the actual maxpacket the device uses, the USB controller
+		 *   may only accept a single packet. Consequently we are only
+		 *   guaranteed to receive 1 packet (at least 8 bytes) even in
+		 *   a non-error case.
 		 *
-		 * At least the DWC2 controller needs to be programmed with the number
-		 * of packets in addition to the number of bytes. A request for 64
-		 * bytes of data with the maxpacket guessed as 64 (above) yields a
-		 * request for 1 packet.
+		 * At least the DWC2 controller needs to be programmed with
+		 * the number of packets in addition to the number of bytes.
+		 * A request for 64 bytes of data with the maxpacket guessed
+		 * as 64 (above) yields a request for 1 packet.
 		 */
 		err = get_descriptor_len(dev, 64, 8);
 		if (err)
@@ -1008,7 +1009,7 @@ static int usb_setup_descriptor(struct usb_device *dev, bool do_read)
 		dev->maxpacketsize = PACKET_SIZE_64;
 		break;
 	default:
-		printf("usb_new_device: invalid max packet size\n");
+		printf("%s: invalid max packet size\n", __func__);
 		return -EIO;
 	}
 

commit 83e13f0fe70963a21fde56c9cef6d30f331ac982
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Mon Sep 18 06:40:41 2017 -0700

    UPSTREAM: usb: xhci: Add interrupt transfer support
    
    xHCI uses normal TRBs for both bulk and interrupt. This adds the
    missing interrupt transfer support to xHCI so that devices like
    USB keyboard that uses interrupt transfer can work.
    
    Change-Id: I857a769b96c3283d99deff1f1092ddd64a9693e2
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 1897d60130976ece389d5875187b78ba0d41428f)

diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index 04eb1eb14d..4b3d58d56e 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -890,11 +890,18 @@ unknown:
 static int _xhci_submit_int_msg(struct usb_device *udev, unsigned long pipe,
 				void *buffer, int length, int interval)
 {
+	if (usb_pipetype(pipe) != PIPE_INTERRUPT) {
+		printf("non-interrupt pipe (type=%lu)", usb_pipetype(pipe));
+		return -EINVAL;
+	}
+
 	/*
-	 * TODO: Not addressing any interrupt type transfer requests
-	 * Add support for it later.
+	 * xHCI uses normal TRBs for both bulk and interrupt. When the
+	 * interrupt endpoint is to be serviced, the xHC will consume
+	 * (at most) one TD. A TD (comprised of sg list entries) can
+	 * take several service intervals to transmit.
 	 */
-	return -EINVAL;
+	return xhci_bulk_tx(udev, pipe, length, buffer);
 }
 
 /**

commit d17dd8c547b906f9b20d3ce86f9e5a4b7ca8029a
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Mon Sep 18 06:40:39 2017 -0700

    UPSTREAM: usb: xhci: Don't assume LS/FS devices are always behind a HS hub
    
    At present xHCI driver assumes LS/FS devices are attached directly
    to a HS hub. If they are connected to a LS/FS hub, the driver will
    fail to perform the USB enumeration process on such devices.
    
    This is fixed by looking from the device itself all the way up to
    the HS hub where the TT that serves the device is located.
    
    Change-Id: I3465e64fdb09cf2fd15e181a5606938cf5819681
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 8a0e6d83070a977442aaba2c5a74cbe34e157012)

diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
index d5eab3a615..84982a92d6 100644
--- a/drivers/usb/host/xhci-mem.c
+++ b/drivers/usb/host/xhci-mem.c
@@ -786,12 +786,22 @@ void xhci_setup_addressable_virt_dev(struct xhci_ctrl *ctrl,
 #ifdef CONFIG_DM_USB
 	/* Set up TT fields to support FS/LS devices */
 	if (speed == USB_SPEED_LOW || speed == USB_SPEED_FULL) {
-		dev = dev_get_parent_priv(udev->dev);
-		if (dev->speed == USB_SPEED_HIGH) {
-			hub = dev_get_uclass_priv(udev->dev);
+		struct udevice *parent = udev->dev;
+
+		dev = udev;
+		do {
+			port_num = dev->portnr;
+			dev = dev_get_parent_priv(parent);
+			if (usb_hub_is_root_hub(dev->dev))
+				break;
+			parent = dev->dev->parent;
+		} while (dev->speed != USB_SPEED_HIGH);
+
+		if (!usb_hub_is_root_hub(dev->dev)) {
+			hub = dev_get_uclass_priv(dev->dev);
 			if (hub->tt.multi)
 				slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
-			slot_ctx->tt_info |= cpu_to_le32(TT_PORT(udev->portnr));
+			slot_ctx->tt_info |= cpu_to_le32(TT_PORT(port_num));
 			slot_ctx->tt_info |= cpu_to_le32(TT_SLOT(dev->slot_id));
 		}
 	}

commit 570588387293cdfd7883fafcdee01769652f0e8f
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Sun Oct 1 06:19:43 2017 -0700

    UPSTREAM: dm: usb: Remove no longer needed blk_unbind_all()
    
    With the root hub unbinding in usb_stop(), there is no need to do
    a blk uclass specific unbind operation.
    
    Change-Id: I1f8fef976ba14efc836041e79b23c0cd916a39ee
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit ad0a9378bf5cc9280e117b7db94b6bfa1b6e8e76)

diff --git a/drivers/usb/host/usb-uclass.c b/drivers/usb/host/usb-uclass.c
index 8a9f810bf8..bfc0556d7d 100644
--- a/drivers/usb/host/usb-uclass.c
+++ b/drivers/usb/host/usb-uclass.c
@@ -193,11 +193,7 @@ int usb_stop(void)
 				err = ret;
 		}
 	}
-#ifdef CONFIG_BLK
-	ret = blk_unbind_all(IF_TYPE_USB);
-	if (ret && !err)
-		err = ret;
-#endif
+
 #ifdef CONFIG_SANDBOX
 	struct udevice *dev;
 

commit 4f46a20e4b713fa26f95da83998732492d13c711
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Sun Oct 1 06:19:42 2017 -0700

    UPSTREAM: dm: usb: Fix broken usb_stop()
    
    At present we only do device_remove() during usb stop. The DM API
    device_remove() only marks the device state as inactivated, but
    still keeps its USB topology (eg: parent, children, etc) in the DM
    device structure. There is no issue if we only start USB subsystem
    once and never stop it. But a big issue occurs when we do 'usb stop'
    and 'usb start' multiple times.
    
    Strange things may be observed with current implementation, like:
    - the enumeration may report only 1 mass storage device is detected,
      but the total number of USB devices is correct.
    - USB keyboard does not work anymore after a bunch of 'usb reset'
      even if 'usb tree' shows it is correctly identified.
    - read/write flash drive via 'fatload usb' may complain "Bad device"
    
    In fact, every time when USB host controller starts the enumeration
    process, it takes random time for each USB port to show up online,
    hence each USB device may appear in a different order from previous
    enumeration, and gets assigned to a totally different USB address.
    As a result, we end up using a stale USB topology in the DM device
    structure which still reflects the previous enumeration result, and
    it may create an exact same DM device name like generic_bus_0_dev_7
    that is already in the DM device structure. And since the DM device
    structure is there, there is no device_bind() call to bind driver to
    the device during current enumeration process, eventually creating
    an inconsistent software representation of the hardware topology, a
    non-working USB subsystem.
    
    The fix is to clear the unused USB topology in the usb_stop(), by
    calling device_unbind() on each controller's root hub device, and
    the unbinding will unbind all of its children automatically.
    
    For Sandbox, we need scan the device tree each time when we start
    the USB stack, in order to re-create the emulated USB devices and
    bind drivers for them before we actually do the driver probe.
    
    Change-Id: I690fd9e4bd18421ea5f11772aab39806a2208b4e
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit d4efefe32ea8a45b7b30f4769b3928c28e181c73)

diff --git a/drivers/usb/host/usb-uclass.c b/drivers/usb/host/usb-uclass.c
index bc44fc3394..8a9f810bf8 100644
--- a/drivers/usb/host/usb-uclass.c
+++ b/drivers/usb/host/usb-uclass.c
@@ -164,6 +164,7 @@ int usb_get_max_xfer_size(struct usb_device *udev, size_t *size)
 int usb_stop(void)
 {
 	struct udevice *bus;
+	struct udevice *rh;
 	struct uclass *uc;
 	struct usb_uclass_priv *uc_priv;
 	int err = 0, ret;
@@ -179,6 +180,18 @@ int usb_stop(void)
 		ret = device_remove(bus, DM_REMOVE_NORMAL);
 		if (ret && !err)
 			err = ret;
+
+		/* Locate root hub device */
+		device_find_first_child(bus, &rh);
+		if (rh) {
+			/*
+			 * All USB devices are children of root hub.
+			 * Unbinding root hub will unbind all of its children.
+			 */
+			ret = device_unbind(rh);
+			if (ret && !err)
+				err = ret;
+		}
 	}
 #ifdef CONFIG_BLK
 	ret = blk_unbind_all(IF_TYPE_USB);
@@ -262,6 +275,21 @@ int usb_init(void)
 		/* init low_level USB */
 		printf("USB%d:   ", count);
 		count++;
+
+#ifdef CONFIG_SANDBOX
+		/*
+		 * For Sandbox, we need scan the device tree each time when we
+		 * start the USB stack, in order to re-create the emulated USB
+		 * devices and bind drivers for them before we actually do the
+		 * driver probe.
+		 */
+		ret = dm_scan_fdt_dev(bus);
+		if (ret) {
+			printf("Sandbox USB device scan failed (%d)\n", ret);
+			continue;
+		}
+#endif
+
 		ret = device_probe(bus);
 		if (ret == -ENODEV) {	/* No such device. */
 			puts("Port not available.\n");

commit fca6064c0e7c1e360d4aacc8ba78336b9e4ebafd
Author: Jagan Teki <jagan@amarulasolutions.com>
Date:   Wed Sep 27 23:03:14 2017 +0530

    UPSTREAM: rk3288: spl: Add dram_init_banksize
    
    Falcon mode, is updating DDR dt node configuration through
    spl_fixup_fdt() so add appropriate DDR base and size through
    dram_init_banksize.
    
    Change-Id: I404d3f5f53d9507061abab68599918a8a2317f0b
    Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 2ee3021ae1808828c74b7eb6ae68d8d511bc4c30)

diff --git a/arch/arm/mach-rockchip/rk3288-board-spl.c b/arch/arm/mach-rockchip/rk3288-board-spl.c
index cc4299f5eb..f64a54843f 100644
--- a/arch/arm/mach-rockchip/rk3288-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3288-board-spl.c
@@ -19,7 +19,9 @@
 #include <asm/arch/clock.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/periph.h>
+#include <asm/arch/pmu_rk3288.h>
 #include <asm/arch/sdram.h>
+#include <asm/arch/sdram_common.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/arch/timer.h>
 #include <dm/pinctrl.h>
@@ -290,3 +292,18 @@ err:
 	/* No way to report error here */
 	hang();
 }
+
+#ifdef CONFIG_SPL_OS_BOOT
+
+#define PMU_BASE		0xff730000
+int dram_init_banksize(void)
+{
+	struct rk3288_pmu *const pmu = (void *)PMU_BASE;
+	size_t size = rockchip_sdram_size((phys_addr_t)&pmu->sys_reg[2]);
+
+	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+	gd->bd->bi_dram[0].size = size;
+
+	return 0;
+}
+#endif

commit b5136c76a91260bc1573a08347cb3375b706a529
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Fri Sep 29 19:28:03 2017 +0200

    UPSTREAM: rockchip: defconfig: puma-rk3399: update for DM_REGULATOR support in SPL
    
    The RK3399-Q7 requires DM regulator support in SPL, so we can use the
    regulator framework to reenable the eMMC and SPI, if these had been
    turned of by the BIOS_DISABLE signal.
    
    Change-Id: Ic6d7471fe85f69b5820fd8a865904db923c25ac0
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 7c158634cade29f6d1f898997c82b100d303527c)

diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig
index 2ab2516c01..62a8d7c859 100644
--- a/configs/puma-rk3399_defconfig
+++ b/configs/puma-rk3399_defconfig
@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x4000
@@ -20,6 +21,8 @@ CONFIG_SPL_BOARD_INIT=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
@@ -63,8 +66,10 @@ CONFIG_SPL_PINCTRL=y
 CONFIG_PINCTRL_ROCKCHIP_RK3399=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
-CONFIG_REGULATOR_PWM=y
+CONFIG_SPL_DM_REGULATOR=y
 CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_SPL_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
 CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y

commit ea32c351d277af2983c69af8b892849aa430cdc2
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Fri Sep 29 19:28:02 2017 +0200

    UPSTREAM: power: spl: add SPL_DM_REGULATOR_FIXED in Kconfig
    
    The Makefile already tests for SPL_DM_REGULATOR_FIXED, but Kconfig
    does not provide it.  This adds SPL_DM_REGULATOR_FIXED to Kconfig.
    
    Change-Id: I51fad4fbd9bff634174a7177a3cb6e69516e2f7e
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 9086eab8fea5f6b41de1f6ab1313f3acf3f3db76)

diff --git a/drivers/power/regulator/Kconfig b/drivers/power/regulator/Kconfig
index c82a936e8a..a11408ff2e 100644
--- a/drivers/power/regulator/Kconfig
+++ b/drivers/power/regulator/Kconfig
@@ -77,6 +77,13 @@ config DM_REGULATOR_FIXED
 	features for fixed value regulators. The driver implements get/set api
 	for enable and get only for voltage value.
 
+config SPL_DM_REGULATOR_FIXED
+	bool "Enable Driver Model for REGULATOR Fixed value in SPL"
+	depends on DM_REGULATOR_FIXED
+	---help---
+	This config enables implementation of driver-model regulator uclass
+	features for fixed value regulators in SPL.
+
 config DM_REGULATOR_GPIO
 	bool "Enable Driver Model for GPIO REGULATOR"
 	depends on DM_REGULATOR

commit be29fed8f989befde16eb011c343db161284594b
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Fri Sep 29 19:28:01 2017 +0200

    UPSTREAM: rockchip: rk3399-puma: add boot-on regulator to override BIOS_DISABLE
    
    The (Qseven) BIOS_DISABLE signal on the RK3399-Q7 (Puma) keeps the
    eMMC and SPI in reset initially and we need to write a GPIO to turn
    them on before continuing the boot-up.
    
    This adds the DTS entries for the additional regulator and makes
    pinctrl and gpio3 available during SPL.  It also adds a hook to the
    spl_board_init() to ensure that the regulator gets probed and enabled.
    
    Change-Id: I5d229af39d5b410a5abc38f9d151bc766384c275
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 482cf22333dbfb7c706d6a7ec1ffbfa5409cc6a3)

diff --git a/arch/arm/dts/rk3399-puma.dtsi b/arch/arm/dts/rk3399-puma.dtsi
index f95c68e9f6..65ab380139 100644
--- a/arch/arm/dts/rk3399-puma.dtsi
+++ b/arch/arm/dts/rk3399-puma.dtsi
@@ -101,6 +101,24 @@
 		regulator-max-microvolt = <3300000>;
 	};
 
+	/*
+	 * The Qseven BIOS_DISABLE signal on the RK3399-Q7 keeps the on-module
+	 * eMMC and SPI flash powered-down initially (in fact it keeps the
+	 * reset signal asserted).  Even though it is an enable signal, we
+	 * model this as a regulator.
+	 */
+	bios_enable: bios_enable {
+		compatible = "regulator-fixed";
+		u-boot,dm-pre-reloc;
+		regulator-name = "bios_enable";
+		enable-active-low;
+		gpio = <&gpio3 29 GPIO_ACTIVE_HIGH>;
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+	};
+
 	vccadc_ref: vccadc-ref {
 		compatible = "regulator-fixed";
 		regulator-name = "vcc1v8_sys";
@@ -459,7 +477,7 @@
 };
 
 &pcie_phy {
-	        status = "okay";
+		status = "okay";
 };
 
 &pmu_io_domains {
@@ -486,7 +504,7 @@
 };
 
 &sdmmc {
-        u-boot,dm-pre-reloc;
+	u-boot,dm-pre-reloc;
 	clock-frequency = <150000000>;
 	clock-freq-min-max = <100000 150000000>;
 	supports-sd;
@@ -533,10 +551,15 @@
 	status = "okay";
 };
 
+&gpio3 {
+	u-boot,dm-pre-reloc;
+};
+
 &pinctrl {
 	/* Pins that are not explicitely used by any devices */
 	pinctrl-names = "default";
 	pinctrl-0 = <&puma_pin_hog>;
+
 	hog {
 		puma_pin_hog: puma_pin_hog {
 			rockchip,pins =
@@ -576,7 +599,7 @@
 	i2c8 {
 		i2c8_xfer_a: i2c8-xfer {
 			rockchip,pins = <1 21 RK_FUNC_1 &pcfg_pull_up>,
-			                <1 20 RK_FUNC_1 &pcfg_pull_up>;
+					<1 20 RK_FUNC_1 &pcfg_pull_up>;
 		};
 	};
 };
@@ -652,4 +675,3 @@
 &spi5 {
 	status = "okay";
 };
-
diff --git a/board/theobroma-systems/puma_rk3399/puma-rk3399.c b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
index 3cab7b1d48..2b4988e2d2 100644
--- a/board/theobroma-systems/puma_rk3399/puma-rk3399.c
+++ b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
@@ -34,6 +34,16 @@ int board_init(void)
 
 void spl_board_init(void)
 {
+	int  ret;
+
+	/*
+	 * Turning the eMMC and SPI back on (if disabled via the Qseven
+	 * BIOS_ENABLE) signal is done through a always-on regulator).
+	 */
+	ret = regulators_enable_boot_on(false);
+	if (ret)
+		debug("%s: Cannot enable boot on regulator\n", __func__);
+
 	preloader_console_init();
 }
 

commit b4d43cb80724c73c6d70d8e51536b66d4bfea2a7
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Fri Sep 29 19:28:00 2017 +0200

    UPSTREAM: rockchip: puma-rk3399: update board_init()
    
    The original initialisation code for board_init() was largely lifted
    from the code on the EVB.  However, the RK3399-Q7 can do with a much
    more concise init sequence.
    
    This cleans up the board_init() by updating it to the essentials for
    the RK3399-Q7 and getting rid of the accumulated cruft.
    
    Change-Id: I7855f00a4256b246f6a082b0edf12fc776798e26
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 0b5e7aab0ef62fea852d03df76e577c217d0b8bf)

diff --git a/board/theobroma-systems/puma_rk3399/puma-rk3399.c b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
index e55a5c6657..3cab7b1d48 100644
--- a/board/theobroma-systems/puma_rk3399/puma-rk3399.c
+++ b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
@@ -19,44 +19,16 @@ DECLARE_GLOBAL_DATA_PTR;
 
 int board_init(void)
 {
-	struct udevice *pinctrl, *regulator;
 	int ret;
 
 	/*
-	 * The PWM does not have decicated interrupt number in dts and can
-	 * not get periph_id by pinctrl framework, so let's init them here.
-	 * The PWM2 and PWM3 are for pwm regulators.
+	 * We need to call into regulators_enable_boot_on() again, as the call
+	 * during SPL may have not included all regulators.
 	 */
-	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
-	if (ret) {
-		debug("%s: Cannot find pinctrl device\n", __func__);
-		goto out;
-	}
-
-	ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_PWM2);
-	if (ret) {
-		debug("%s PWM2 pinctrl init fail!\n", __func__);
-		goto out;
-	}
-
-	/* rk3399 need to init vdd_center to get the correct output voltage */
-	ret = regulator_get_by_platname("vdd_center", &regulator);
+	ret = regulators_enable_boot_on(false);
 	if (ret)
-		debug("%s: Cannot get vdd_center regulator\n", __func__);
-
-	ret = regulator_get_by_platname("vcc5v0_host", &regulator);
-	if (ret) {
-		debug("%s vcc5v0_host init fail! ret %d\n", __func__, ret);
-		goto out;
-	}
-
-	ret = regulator_set_enable(regulator, true);
-	if (ret) {
-		debug("%s vcc5v0-host-en set fail!\n", __func__);
-		goto out;
-	}
+		debug("%s: Cannot enable boot on regulator\n", __func__);
 
-out:
 	return 0;
 }
 

commit fa25729f762acb763cffa4d110903b6e494fdce8
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Fri Sep 29 19:27:59 2017 +0200

    UPSTREAM: rockchip: dts: rk3399-puma: add 'same-as-spl' to the front of the boot-order
    
    In the general case, we want to continue booting the full U-Boot
    (contained in a discoverable FIT image) from the same device the SPL
    stage was loaded from.  This prepends the 'same-as-spl' specifier to
    our configurable boot-order to make this the default behaviour.
    
    Change-Id: Iaca77be835e5a4a1a9cdffb82c3ffe666e8871ac
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 775bd78a1126497f57bdab8be2419a063cf12111)

diff --git a/arch/arm/dts/rk3399-puma.dtsi b/arch/arm/dts/rk3399-puma.dtsi
index a04878e223..f95c68e9f6 100644
--- a/arch/arm/dts/rk3399-puma.dtsi
+++ b/arch/arm/dts/rk3399-puma.dtsi
@@ -20,7 +20,8 @@
 
 	chosen {
 		stdout-path = "serial0:115200n8";
-		u-boot,spl-boot-order = &spiflash, &sdhci, &sdmmc;
+		u-boot,spl-boot-order = \
+			"same-as-spl", &spiflash, &sdhci, &sdmmc;
 	};
 
 	aliases {

commit 337a0f1fafe8dad50f275e3601d09e62bb6de40c
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Fri Sep 29 19:27:58 2017 +0200

    UPSTREAM: rockchip: spl: rk3399: implement chip-specific board_spl_was_booted_from()
    
    To support the new "same-as-spl" specifier in the boot-order on the
    RK3399, this implements the chip-specific mapping from the information
    obtainable from the BROM to a OF path name.
    
    Change-Id: I3f7fd061a511a818538bc64146033e722d8dec27
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit c55addd36008e82cd0081c591a68a1f1667346e7)

diff --git a/arch/arm/mach-rockchip/rk3399-board-spl.c b/arch/arm/mach-rockchip/rk3399-board-spl.c
index 077cb80994..6212d96de8 100644
--- a/arch/arm/mach-rockchip/rk3399-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3399-board-spl.c
@@ -26,6 +26,30 @@ void board_return_to_bootrom(void)
 	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
 }
 
+static const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
+	[BROM_BOOTSOURCE_EMMC] = "/sdhci@fe330000",
+	[BROM_BOOTSOURCE_SPINOR] = "/spi@ff1d0000",
+	[BROM_BOOTSOURCE_SD] = "/dwmmc@fe320000",
+};
+
+const char *board_spl_was_booted_from(void)
+{
+	u32  bootdevice_brom_id = readl(RK3399_BROM_BOOTSOURCE_ID_ADDR);
+	const char *bootdevice_ofpath = NULL;
+
+	if (bootdevice_brom_id < ARRAY_SIZE(boot_devices))
+		bootdevice_ofpath = boot_devices[bootdevice_brom_id];
+
+	if (bootdevice_ofpath)
+		debug("%s: brom_bootdevice_id %x maps to '%s'\n",
+		      __func__, bootdevice_brom_id, bootdevice_ofpath);
+	else
+		debug("%s: failed to resolve brom_bootdevice_id %x\n",
+		      __func__, bootdevice_brom_id);
+
+	return bootdevice_ofpath;
+}
+
 u32 spl_boot_device(void)
 {
 	u32 boot_device = BOOT_DEVICE_MMC1;

commit 2d5ea11e7d3636e0a4255a8754d685a8ce92ed50
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Fri Sep 29 19:27:57 2017 +0200

    UPSTREAM: rockchip: spl: support a 'same-as-spl'-specifier in the spl-boot-order
    
    It is often desirable to configure the spl-boot-order (i.e. the order
    that SPL probes devices to find the FIT image containing a full U-Boot)
    such that it contains 'the same device the SPL stage was booted from'
    early on.  To support this, we introduce the 'same-as-spl' specifier
    for the spl-boot-order property.
    
    This commit adds:
     - documentation for the new board_spl_was_booted_from() function that
       individual SoCs/boards should provide, if they can determine where
       the SPL was booted from
     - implements the new board_spl_was_booted_from() stub function
     - adds support for handling the 'same-as-spl' specifier and calling
       into the per-SoC/per-board support code.
    
    This also updates the documentation for the 'u-boot,spl-boot-order'
    property.
    
    Change-Id: Id312751f954eecebb4a9842163249df21e311704
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 80e9f88e67398ae65c89af3bace59e7e14debd33)

diff --git a/arch/arm/mach-rockchip/spl-boot-order.c b/arch/arm/mach-rockchip/spl-boot-order.c
index 0bb9a73a8a..843998dfdc 100644
--- a/arch/arm/mach-rockchip/spl-boot-order.c
+++ b/arch/arm/mach-rockchip/spl-boot-order.c
@@ -76,6 +76,24 @@ static int spl_node_to_boot_device(int node)
 	return -1;
 }
 
+/**
+ * board_spl_was_booted_from() - retrieves the of-path the SPL was loaded from
+ *
+ * To support a 'same-as-spl' specification in the search-order for the next
+ * stage, we need a SoC- or board-specific way to handshake with what 'came
+ * before us' (either a BROM or TPL stage) and map the info retrieved onto
+ * a OF path.
+ *
+ * Returns
+ *   NULL, on failure or if the device could not be identified
+ *   a of_path (a string), on success
+ */
+__weak const char *board_spl_was_booted_from(void)
+{
+	debug("%s: no support for 'same-as-spl' for this board\n", __func__);
+	return NULL;
+}
+
 void board_boot_order(u32 *spl_boot_list)
 {
 	const void *blob = gd->fdt_blob;
@@ -97,8 +115,17 @@ void board_boot_order(u32 *spl_boot_list)
 	     (conf = fdt_stringlist_get(blob, chosen_node,
 					"u-boot,spl-boot-order", elem, NULL));
 	     elem++) {
+		const char *alias;
+
+		/* Handle the case of 'same device the SPL was loaded from' */
+		if (strncmp(conf, "same-as-spl", 11) == 0) {
+			conf = board_spl_was_booted_from();
+			if (!conf)
+				continue;
+		}
+
 		/* First check if the list element is an alias */
-		const char *alias = fdt_get_alias(blob, conf);
+		alias = fdt_get_alias(blob, conf);
 		if (alias)
 			conf = alias;
 
diff --git a/doc/device-tree-bindings/chosen.txt b/doc/device-tree-bindings/chosen.txt
index 5625d210e8..c96b8f7109 100644
--- a/doc/device-tree-bindings/chosen.txt
+++ b/doc/device-tree-bindings/chosen.txt
@@ -56,10 +56,20 @@ Each list element of the property should specify a device to be probed
 in the order they are listed: references (i.e. implicit paths), a full
 path or an alias is expected for each entry.
 
+A special specifier "same-as-spl" can be used at any position in the
+boot-order to direct U-Boot to insert the device the SPL was booted
+from there.  Whether this is indeed inserted or silently ignored (if
+it is not supported on any given SoC/board or if the boot-device is
+not available to continue booting from) is implementation-defined.
+Note that if "same-as-spl" expands to an actual node for a given
+board, the corresponding node may appear multiple times in the
+boot-order (as there currently exists no mechanism to suppress
+duplicates from the list).
+
 Example
 -------
 / {
 	chosen {
-		u-boot,spl-boot-order = &sdmmc, "/sdhci@fe330000";
+		u-boot,spl-boot-order = "same-as-spl", &sdmmc, "/sdhci@fe330000";
 	};
 };

commit 309353d55859b86d29b5c37a5458f42576006d9c
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Fri Sep 29 19:27:56 2017 +0200

    UPSTREAM: rockchip: spl: add documentation for spl_node_to_boot_device()
    
    In the expectation that the spl-boot-order code will eventually
    gain use outside of mach-rockchip: let's add documentation on the
    spl_node_to_boot_device() function, which is likely to become a
    publicly exported function.
    
    Change-Id: Ieed07d7fac72515274f8bf3485a11bff1dd143ac
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit dbad01cab576c12852931c6bf22361b5234c506a)

diff --git a/arch/arm/mach-rockchip/spl-boot-order.c b/arch/arm/mach-rockchip/spl-boot-order.c
index 4f78c72720..0bb9a73a8a 100644
--- a/arch/arm/mach-rockchip/spl-boot-order.c
+++ b/arch/arm/mach-rockchip/spl-boot-order.c
@@ -10,6 +10,25 @@
 #include <spl.h>
 
 #if CONFIG_IS_ENABLED(OF_CONTROL)
+/**
+ * spl_node_to_boot_device() - maps from a DT-node to a SPL boot device
+ * @node:	of_offset of the node
+ *
+ * The SPL framework uses BOOT_DEVICE_... constants to identify its boot
+ * sources.  These may take on a device-specific meaning, depending on
+ * what nodes are enabled in a DTS (e.g. BOOT_DEVICE_MMC1 may refer to
+ * different controllers/block-devices, depending on which SD/MMC controllers
+ * are enabled in any given DTS).  This function maps from a DT-node back
+ * onto a BOOT_DEVICE_... constant, considering the currently active devices.
+ *
+ * Returns
+ *   -ENOENT, if no device matching the node could be found
+ *   -ENOSYS, if the device matching the node can not be mapped onto a
+ *            SPL boot device (e.g. the third MMC device)
+ *   -1, for unspecified failures
+ *   a positive integer (from the BOOT_DEVICE_... family) on succes.
+ */
+
 static int spl_node_to_boot_device(int node)
 {
 	struct udevice *parent;

commit 5cf14c032d4296e96a5c04adda07a1c63c8ed027
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Fri Sep 29 19:27:55 2017 +0200

    rockchip: bootrom: add definitions to retrieve BROM boot-source
    
    The Rockchip BROM allows reading where it booted from from SRAM.
    This adds the necessary definitions (as received from Kever) for
    the location of this information in the RK3399's SRAM and naming
    for the constants used.
    
    Change-Id: Iac090fa74837959ffc4bb42c75328016ee671be1
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 3b4f87735d093463e3b227a07a62996fc0b47b53)

diff --git a/arch/arm/include/asm/arch-rockchip/bootrom.h b/arch/arm/include/asm/arch-rockchip/bootrom.h
index 21994a65ee..91e75cf732 100644
--- a/arch/arm/include/asm/arch-rockchip/bootrom.h
+++ b/arch/arm/include/asm/arch-rockchip/bootrom.h
@@ -39,4 +39,23 @@ enum rockchip_bootrom_cmd {
 };
 
 void back_to_bootrom(enum rockchip_bootrom_cmd brom_cmd);
+
+/**
+ * Boot-device identifiers as used by the BROM
+ */
+enum {
+	BROM_BOOTSOURCE_NAND = 1,
+	BROM_BOOTSOURCE_EMMC = 2,
+	BROM_BOOTSOURCE_SPINOR = 3,
+	BROM_BOOTSOURCE_SPINAND = 4,
+	BROM_BOOTSOURCE_SD = 5,
+	BROM_BOOTSOURCE_USB = 10,
+	BROM_LAST_BOOTSOURCE = BROM_BOOTSOURCE_USB
+};
+
+/**
+ * Locations of the boot-device identifier in SRAM
+ */
+#define RK3399_BROM_BOOTSOURCE_ID_ADDR   0xff8c0010
+
 #endif

commit c8c978c955ff61c1152fbabaae7e0a65480a798d
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Fri Sep 29 19:27:54 2017 +0200

    rockchip: rk3399: make spl_board_init board-specific
    
    The later-stage spl_board_init (as opposed to board_init_f) should set
    up board-specific details: these differ between the EVB-RK3399 and the
    RK3399-Q7 (Puma).
    
    This moves spl_board_init back into the individual boards and removes
    the unneeded functionality from Puma.
    
    Change-Id: I36b72844fbd0fd45665608f11e1a9a46168490ab
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    (cherry picked from commit fb7406469c012092d652741f103b0993103cf8e3)
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3399-board-spl.c b/arch/arm/mach-rockchip/rk3399-board-spl.c
index d3841359c9..077cb80994 100644
--- a/arch/arm/mach-rockchip/rk3399-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3399-board-spl.c
@@ -148,34 +148,6 @@ void board_init_f(ulong dummy)
 	}
 }
 
-void spl_board_init(void)
-{
-	struct udevice *pinctrl;
-	int ret;
-
-	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
-	if (ret) {
-		debug("%s: Cannot find pinctrl device\n", __func__);
-		goto err;
-	}
-
-	/* Enable debug UART */
-	ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART_DBG);
-	if (ret) {
-		debug("%s: Failed to set up console UART\n", __func__);
-		goto err;
-	}
-
-	preloader_console_init();
-
-	return;
-err:
-	printf("spl_board_init: Error %d\n", ret);
-
-	/* No way to report error here */
-	hang();
-}
-
 #ifdef CONFIG_SPL_LOAD_FIT
 int board_fit_config_name_match(const char *name)
 {
diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c b/board/rockchip/evb_rk3399/evb-rk3399.c
index 02c11e5946..e2e6d49e9a 100644
--- a/board/rockchip/evb_rk3399/evb-rk3399.c
+++ b/board/rockchip/evb_rk3399/evb-rk3399.c
@@ -3,6 +3,7 @@
  *
  * SPDX-License-Identifier:     GPL-2.0+
  */
+
 #include <common.h>
 #include <dm.h>
 #include <misc.h>
@@ -15,6 +16,7 @@
 #include <u-boot/sha256.h>
 #include <usb.h>
 #include <dwc3-uboot.h>
+#include <spl.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -209,3 +211,30 @@ int board_usb_init(int index, enum usb_init_type init)
 	return dwc3_uboot_init(&dwc3_device_data);
 }
 #endif
+
+void spl_board_init(void)
+{
+	struct udevice *pinctrl;
+	int ret;
+
+	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
+	if (ret) {
+		debug("%s: Cannot find pinctrl device\n", __func__);
+		goto err;
+	}
+
+	/* Enable debug UART */
+	ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART_DBG);
+	if (ret) {
+		debug("%s: Failed to set up console UART\n", __func__);
+		goto err;
+	}
+
+	preloader_console_init();
+	return;
+err:
+	printf("%s: Error %d\n", __func__, ret);
+
+	/* No way to report error here */
+	hang();
+}
diff --git a/board/theobroma-systems/puma_rk3399/puma-rk3399.c b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
index 45d56cd99e..e55a5c6657 100644
--- a/board/theobroma-systems/puma_rk3399/puma-rk3399.c
+++ b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
@@ -3,15 +3,16 @@
  *
  * SPDX-License-Identifier:     GPL-2.0+
  */
+
 #include <common.h>
 #include <dm.h>
 #include <misc.h>
-#include <ram.h>
 #include <dm/pinctrl.h>
 #include <dm/uclass-internal.h>
 #include <asm/setup.h>
 #include <asm/arch/periph.h>
 #include <power/regulator.h>
+#include <spl.h>
 #include <u-boot/sha256.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -59,6 +60,11 @@ out:
 	return 0;
 }
 
+void spl_board_init(void)
+{
+	preloader_console_init();
+}
+
 static void setup_macaddr(void)
 {
 #if CONFIG_IS_ENABLED(CMD_NET)
@@ -91,8 +97,6 @@ static void setup_macaddr(void)
 	mac_addr[0] |= 0x02;  /* set local assignment bit (IEEE802) */
 	eth_env_set_enetaddr("ethaddr", mac_addr);
 #endif
-
-	return;
 }
 
 static void setup_serial(void)
@@ -147,8 +151,6 @@ static void setup_serial(void)
 	env_set("cpuid#", cpuid_str);
 	env_set("serial#", serialno_str);
 #endif
-
-	return;
 }
 
 int misc_init_r(void)

commit 0114ea319993520c4ac7b52239912b4a8b23f9d4
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Sep 19 15:49:14 2017 +0200

    UPSTREAM: rockchip: pinctrl: rk3368: add pinctrl for SDMMC0
    
    Apparently, our earlier assumption that the BROM will always set up
    the iomux for SDcard communication does not always hold true: when
    booting U-Boot from the on-module (on the RK3368-uQ7) eMMC, the SDcard
    pins are not set up and need to be configured by the pinctrl driver to
    allow SD card access.
    
    This change implements support for setting up the SDMMC pins in
    pinctrl for the RK3368.
    
    Change-Id: I41d4ccc546e5256713edc162bb7e3ec622843c16
    Reported-by: Klaus Goger <klaus.goger@theobroma-systems.com>
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit fd0a1ba52ec65e82caf163d0074e768c3abc57ae)

diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3368.c b/drivers/pinctrl/rockchip/pinctrl_rk3368.c
index b1f5704164..25249e377a 100644
--- a/drivers/pinctrl/rockchip/pinctrl_rk3368.c
+++ b/drivers/pinctrl/rockchip/pinctrl_rk3368.c
@@ -208,6 +208,29 @@ enum {
 	GPIO2A0_FLASH_CSN0      = (1 << GPIO2A0_SHIFT),
 };
 
+/*GRF_GPIO2B_IOMUX*/
+enum {
+	GPIO2B3_SHIFT           = 6,
+	GPIO2B3_MASK            = GENMASK(GPIO2B3_SHIFT + 1, GPIO2B3_SHIFT),
+	GPIO2B3_GPIO            = 0,
+	GPIO2B3_SDMMC0_DTECTN   = (1 << GPIO2B3_SHIFT),
+
+	GPIO2B2_SHIFT           = 4,
+	GPIO2B2_MASK            = GENMASK(GPIO2B2_SHIFT + 1, GPIO2B2_SHIFT),
+	GPIO2B2_GPIO            = 0,
+	GPIO2B2_SDMMC0_CMD      = (1 << GPIO2B2_SHIFT),
+
+	GPIO2B1_SHIFT           = 2,
+	GPIO2B1_MASK            = GENMASK(GPIO2B1_SHIFT + 1, GPIO2B1_SHIFT),
+	GPIO2B1_GPIO            = 0,
+	GPIO2B1_SDMMC0_CLKOUT   = (1 << GPIO2B1_SHIFT),
+
+	GPIO2B0_SHIFT           = 0,
+	GPIO2B0_MASK            = GENMASK(GPIO2B0_SHIFT + 1, GPIO2B0_SHIFT),
+	GPIO2B0_GPIO            = 0,
+	GPIO2B0_SDMMC0_D3       = (1 << GPIO2B0_SHIFT),
+};
+
 /*GRF_GPIO2D_IOMUX*/
 enum {
 	GPIO2D7_SHIFT           = 14,
@@ -580,11 +603,17 @@ static void pinctrl_rk3368_sdmmc_config(struct rk3368_grf *grf, int mmc_id)
 			     GPIO2A4_EMMC_CLKOUT);
 		break;
 	case PERIPH_ID_SDCARD:
-		/*
-		 * We assume that the BROM has already set this up
-		 * correctly for us and that there's nothing to do
-		 * here.
-		 */
+		debug("mmc id = %d setting registers!\n", mmc_id);
+		rk_clrsetreg(&grf->gpio2a_iomux,
+			     GPIO2A5_MASK | GPIO2A7_MASK |
+			     GPIO2A7_MASK,
+			     GPIO2A5_SDMMC0_D0 | GPIO2A6_SDMMC0_D1 |
+			     GPIO2A7_SDMMC0_D2);
+		rk_clrsetreg(&grf->gpio2b_iomux,
+			     GPIO2B0_MASK | GPIO2B1_MASK |
+			     GPIO2B2_MASK | GPIO2B3_MASK,
+			     GPIO2B0_SDMMC0_D3 | GPIO2B1_SDMMC0_CLKOUT |
+			     GPIO2B2_SDMMC0_CMD | GPIO2B3_SDMMC0_DTECTN);
 		break;
 	default:
 		debug("mmc id = %d iomux error!\n", mmc_id);

commit c47ae866ef76581daf5ea0b368027b6e7d72664a
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Fri Sep 15 15:57:15 2017 +0200

    UPSTREAM: rockchip: board: lion-rk3368: avoid ATF overwriting active SPL stage
    
    The RK3368-uQ7 ATF has been moved back to 0x100000 (1MB from the start
    of DRAM) to avoid it overwriting the active SPL stage during FIT image
    loading.  This change adapts the .its to match up (again) with our ATF
    repository for the RK3368-uQ7.
    
    Change-Id: I53e7babad41367d1178a65934a0e2fb3af457a28
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 6696fe5a2fac33fa9c1ed65d7f1b1af095129da9)

diff --git a/board/theobroma-systems/lion_rk3368/fit_spl_atf.its b/board/theobroma-systems/lion_rk3368/fit_spl_atf.its
index 405750f351..60daddcc44 100644
--- a/board/theobroma-systems/lion_rk3368/fit_spl_atf.its
+++ b/board/theobroma-systems/lion_rk3368/fit_spl_atf.its
@@ -27,8 +27,8 @@
 			type = "firmware";
 			arch = "arm64";
 			compression = "none";
-			load = <0x00010000>;
-			entry = <0x00010000>;
+			load = <0x00100000>;
+			entry = <0x00100000>;
 		};
 
 		fdt {

commit 5282fce2642a316bc35716405a05ff9cb0cca761
Author: Jagan Teki <jagan@amarulasolutions.com>
Date:   Wed Sep 27 23:03:13 2017 +0530

    UPSTREAM: rk3288: vyasa: Add falcon mode support
    
    Add Falcon mode support in vyasa rk3288 board.
    
    Change-Id: I720f05f76ce553464bd9ac723edffecbfdf23402
    Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 5d94ebedcd192bcceabcd1ca90f417f1130e46dc)

diff --git a/board/amarula/vyasa-rk3288/vyasa-rk3288.c b/board/amarula/vyasa-rk3288/vyasa-rk3288.c
index ceee42c16e..7985671fbd 100644
--- a/board/amarula/vyasa-rk3288/vyasa-rk3288.c
+++ b/board/amarula/vyasa-rk3288/vyasa-rk3288.c
@@ -5,3 +5,16 @@
  */
 
 #include <common.h>
+
+#ifndef CONFIG_TPL_BUILD
+#include <spl.h>
+
+int spl_start_uboot(void)
+{
+        /* break into full u-boot on 'c' */
+        if (serial_tstc() && serial_getc() == 'c')
+                return 1;
+
+        return 0;
+}
+#endif
diff --git a/include/configs/vyasa-rk3288.h b/include/configs/vyasa-rk3288.h
index 9d6c80f549..8774e42430 100644
--- a/include/configs/vyasa-rk3288.h
+++ b/include/configs/vyasa-rk3288.h
@@ -20,4 +20,21 @@
 #define CONFIG_SYS_MMC_ENV_DEV 1
 #undef CONFIG_CMD_USB_MASS_STORAGE
 
+#ifndef CONFIG_TPL_BUILD
+
+#define CONFIG_SPL_OS_BOOT
+
+/* Falcon Mode */
+#define CONFIG_SPL_FS_LOAD_ARGS_NAME	"args"
+#define CONFIG_SPL_FS_LOAD_KERNEL_NAME	"uImage"
+#define CONFIG_CMD_SPL
+#define CONFIG_SYS_SPL_ARGS_ADDR	0x0ffe5000
+#define CONFIG_CMD_SPL_WRITE_SIZE      (128 * SZ_1K)
+
+/* Falcon Mode - MMC support: args@1MB kernel@2MB */
+#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR  0x800   /* 1MB */
+#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512)
+#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR        0x1000  /* 2MB */
+#endif
+
 #endif

commit e64e037f9b672db2be4b2ff0ea24a85d7ef48ab4
Author: Jagan Teki <jagan@amarulasolutions.com>
Date:   Wed Sep 27 23:03:12 2017 +0530

    rk3288: vyasa: Add TPL support
    
    Since the size of SPL can't be exceeded 0x8000 bytes in RK3288,
    it is not possible add new SPL features like Falcon mode or etc.
    
    So add TPL stage so-that adding new features to SPL is possible.
    - TPL: DRAM init, clocks
    - SPL: MMC, falcon, etc
    
    Change-Id: I8e570e6a552b37dbe7e3c9cc879f70ff64f2354e
    Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    (update tpl text base, add memcpy/memset back)
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 532cb7f5ada0cc3779c33606d760ec99f6aa847a)

diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 4ea4ff43ff..6c4954b9e0 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -12,6 +12,7 @@ obj-spl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o
 obj-tpl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o
 
 obj-tpl-$(CONFIG_ROCKCHIP_RK3066) += rk3066-board-tpl.o
+obj-tpl-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-tpl.o
 obj-tpl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-tpl.o
 obj-tpl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-tpl.o
 obj-tpl-$(CONFIG_ROCKCHIP_RK3328) += rk3328-board-tpl.o
diff --git a/arch/arm/mach-rockchip/rk3288-board-spl.c b/arch/arm/mach-rockchip/rk3288-board-spl.c
index 75e82b1827..cc4299f5eb 100644
--- a/arch/arm/mach-rockchip/rk3288-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3288-board-spl.c
@@ -204,12 +204,15 @@ void board_init_f(ulong dummy)
 	}
 #endif
 
+#if !defined(CONFIG_SUPPORT_TPL)
 	debug("\nspl:init dram\n");
 	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
 	if (ret) {
 		debug("DRAM init failed: %d\n", ret);
 		return;
 	}
+#endif
+
 #if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
 	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
 #endif
diff --git a/arch/arm/mach-rockchip/rk3288-board-tpl.c b/arch/arm/mach-rockchip/rk3288-board-tpl.c
new file mode 100644
index 0000000000..150beea02e
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3288-board-tpl.c
@@ -0,0 +1,84 @@
+/*
+ * Copyright (C) 2017 Amarula Solutions
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <debug_uart.h>
+#include <dm.h>
+#include <ram.h>
+#include <spl.h>
+#include <version.h>
+#include <asm/io.h>
+#include <asm/arch/bootrom.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/grf_rk3288.h>
+#include <asm/arch/periph.h>
+#include <asm/arch/pmu_rk3288.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/arch/timer.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define GRF_BASE		0xff770000
+void board_init_f(ulong dummy)
+{
+	struct udevice *dev;
+	int ret;
+
+	/* Example code showing how to enable the debug UART on RK3288 */
+	/* Enable early UART on the RK3288 */
+	struct rk3288_grf * const grf = (void *)GRF_BASE;
+
+	rk_clrsetreg(&grf->gpio7ch_iomux, GPIO7C7_MASK << GPIO7C7_SHIFT |
+		     GPIO7C6_MASK << GPIO7C6_SHIFT,
+		     GPIO7C7_UART2DBG_SOUT << GPIO7C7_SHIFT |
+		     GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT);
+	/*
+	 * Debug UART can be used from here if required:
+	 *
+	 * debug_uart_init();
+	 * printch('a');
+	 * printhex8(0x1234);
+	 * printascii("string");
+	 */
+	debug_uart_init();
+
+	ret = spl_early_init();
+	if (ret) {
+		debug("spl_early_init() failed: %d\n", ret);
+		hang();
+	}
+
+	rockchip_timer_init();
+	configure_l2ctlr();
+
+	ret = rockchip_get_clk(&dev);
+	if (ret) {
+		debug("CLK init failed: %d\n", ret);
+		return;
+	}
+
+	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
+	if (ret) {
+		debug("DRAM init failed: %d\n", ret);
+		return;
+	}
+}
+
+void board_return_to_bootrom(void)
+{
+	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
+}
+
+u32 spl_boot_device(void)
+{
+	return BOOT_DEVICE_BOOTROM;
+}
+
+void spl_board_init(void)
+{
+	puts("\nU-Boot TPL " PLAIN_VERSION " (" U_BOOT_DATE " - " \
+				U_BOOT_TIME ")\n");
+}
diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig
index 8a51aca86f..bbab13f304 100644
--- a/arch/arm/mach-rockchip/rk3288/Kconfig
+++ b/arch/arm/mach-rockchip/rk3288/Kconfig
@@ -98,6 +98,22 @@ config TARGET_POPMETAL_RK3288
 config TARGET_VYASA_RK3288
 	bool "Vyasa-RK3288"
 	select BOARD_LATE_INIT
+	select TPL
+	select SUPPORT_TPL
+	select TPL_DM
+	select TPL_REGMAP
+	select TPL_SYSCON
+	select TPL_CLK
+	select TPL_RAM
+	select TPL_OF_PLATDATA
+	select TPL_OF_CONTROL
+	select TPL_BOOTROM_SUPPORT
+	select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
+	select ROCKCHIP_BROM_HELPER
+	select TPL_DRIVERS_MISC_SUPPORT
+	select TPL_LIBCOMMON_SUPPORT
+	select TPL_LIBGENERIC_SUPPORT
+	select TPL_SERIAL_SUPPORT
 	help
 	  Vyasa is a RK3288-based development board with 2 USB ports,
 	  HDMI, VGA, micro-SD card, audio, WiFi  and Gigabit Ethernet, It
diff --git a/configs/vyasa-rk3288_defconfig b/configs/vyasa-rk3288_defconfig
index 7db7b0b6f9..711d10e0f6 100644
--- a/configs/vyasa-rk3288_defconfig
+++ b/configs/vyasa-rk3288_defconfig
@@ -1,8 +1,10 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_TINY_MEMSET=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3288=y
 CONFIG_TARGET_VYASA_RK3288=y
+CONFIG_TPL_TEXT_BASE=0xff704000
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-vyasa"
 CONFIG_DEBUG_UART=y
diff --git a/doc/README.rockchip b/doc/README.rockchip
index 2fc6ed0200..4a84f3b22e 100644
--- a/doc/README.rockchip
+++ b/doc/README.rockchip
@@ -150,6 +150,24 @@ Note: rk3036 SDMMC and debug uart use the same iomux, so if you boot from SD, th
       debug uart must be disabled
 
 
+Booting from an SD card on RK3288 with TPL
+==========================================
+
+Since the size of SPL can't be exceeded 0x8000 bytes in RK3288, it is not possible add
+new SPL features like Falcon mode or etc.
+
+So introduce TPL so-that adding new features to SPL is possible because now TPL should
+run minimal with code like DDR, clock etc and rest of new features in SPL.
+
+As of now TPL is added on Vyasa-RK3288 board.
+
+To write an image that boots from an SD card (assumed to be /dev/mmcblk0):
+
+   ./tools/mkimage -n rk3288 -T rksd -d ./tpl/u-boot-tpl.bin out &&
+    cat ./spl/u-boot-spl-dtb.bin >> out &&
+    sudo dd if=out of=/dev/mmcblk0 seek=64 &&
+    sudo dd if=u-boot-dtb.img of=/dev/mmcblk0 seek=256
+
 Booting from an SD card on RK3188
 =================================
 
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index 2d1a41a040..32edcc549e 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -31,13 +31,18 @@
 #define CONFIG_SYS_INIT_SP_ADDR		0x00100000
 #define CONFIG_SYS_LOAD_ADDR		0x00800800
 #define CONFIG_SPL_STACK		0xff718000
-#define CONFIG_SPL_TEXT_BASE		0xff704000
 
 #define GICD_BASE			0xffc01000
 #define GICC_BASE			0xffc02000
 
 #define CONFIG_ROCKUSB_G_DNL_PID	0x320A
 
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_TPL_BOOTROM_SUPPORT)
+# define CONFIG_SPL_TEXT_BASE		0x0
+#else
+# define CONFIG_SPL_TEXT_BASE		0xff704000
+#endif
+
 /* MMC/SD IP block */
 #define CONFIG_BOUNCE_BUFFER
 

commit 636c3e18b7d1968b68b44baed41874f3b040a9d3
Author: Jagan Teki <jagan@amarulasolutions.com>
Date:   Wed Sep 27 23:03:11 2017 +0530

    UPSTREAM: armv7: rk3288: Move configure_l2ctlr to common
    
    configure_l2ctlr will be shared between SPL and TPL so
    move them into asm/arch/sys_proto.h
    
    Change-Id: I0702c88b1569abb1b65c29923cedbbccaa28a33a
    Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit a982d5156db0587f5118a118c7e9f18d4c70891d)

diff --git a/arch/arm/include/asm/arch-rockchip/sys_proto.h b/arch/arm/include/asm/arch-rockchip/sys_proto.h
index 35423e1ba0..e428d59336 100644
--- a/arch/arm/include/asm/arch-rockchip/sys_proto.h
+++ b/arch/arm/include/asm/arch-rockchip/sys_proto.h
@@ -7,4 +7,27 @@
 #ifndef _ASM_ARCH_SYS_PROTO_H
 #define _ASM_ARCH_SYS_PROTO_H
 
+#ifdef CONFIG_ROCKCHIP_RK3288
+#include <asm/armv7.h>
+
+static void configure_l2ctlr(void)
+{
+	uint32_t l2ctlr;
+
+	l2ctlr = read_l2ctlr();
+	l2ctlr &= 0xfffc0000; /* clear bit0~bit17 */
+
+	/*
+	* Data RAM write latency: 2 cycles
+	* Data RAM read latency: 2 cycles
+	* Data RAM setup latency: 1 cycle
+	* Tag RAM write latency: 1 cycle
+	* Tag RAM read latency: 1 cycle
+	* Tag RAM setup latency: 1 cycle
+	*/
+	l2ctlr |= (1 << 3 | 1 << 0);
+	write_l2ctlr(l2ctlr);
+}
+#endif /* CONFIG_ROCKCHIP_RK3288 */
+
 #endif /* _ASM_ARCH_SYS_PROTO_H */
diff --git a/arch/arm/mach-rockchip/rk3288-board-spl.c b/arch/arm/mach-rockchip/rk3288-board-spl.c
index 6396d80a49..75e82b1827 100644
--- a/arch/arm/mach-rockchip/rk3288-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3288-board-spl.c
@@ -13,7 +13,6 @@
 #include <malloc.h>
 #include <ram.h>
 #include <spl.h>
-#include <asm/armv7.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
 #include <asm/arch/bootrom.h>
@@ -21,6 +20,7 @@
 #include <asm/arch/hardware.h>
 #include <asm/arch/periph.h>
 #include <asm/arch/sdram.h>
+#include <asm/arch/sys_proto.h>
 #include <asm/arch/timer.h>
 #include <dm/pinctrl.h>
 #include <dm/root.h>
@@ -81,25 +81,6 @@ u32 spl_boot_mode(const u32 boot_device)
 	return MMCSD_MODE_RAW;
 }
 
-static void configure_l2ctlr(void)
-{
-	uint32_t l2ctlr;
-
-	l2ctlr = read_l2ctlr();
-	l2ctlr &= 0xfffc0000; /* clear bit0~bit17 */
-
-	/*
-	* Data RAM write latency: 2 cycles
-	* Data RAM read latency: 2 cycles
-	* Data RAM setup latency: 1 cycle
-	* Tag RAM write latency: 1 cycle
-	* Tag RAM read latency: 1 cycle
-	* Tag RAM setup latency: 1 cycle
-	*/
-	l2ctlr |= (1 << 3 | 1 << 0);
-	write_l2ctlr(l2ctlr);
-}
-
 #ifdef CONFIG_SPL_MMC_SUPPORT
 static int configure_emmc(struct udevice *pinctrl)
 {

commit 2bae3f50deb8e53e4d934c1ce62fc1ee9798b0b8
Author: Jagan Teki <jagan@amarulasolutions.com>
Date:   Wed Sep 27 23:03:10 2017 +0530

    UPSTREAM: armv7: Move L2CTLR read/write to common
    
    L2CTLR read/write functions are common to armv7 so, move
    them in to include/asm/armv7.h and use them where ever it need.
    
    Cc: Tom Warren <twarren@nvidia.com>
    Change-Id: I1321528829cb523dbb2500f64e4b18d70f7ec5bc
    Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    [Backed out the change to arch/arm/mach-tegra/cache.c:]
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit d9a7dcf5b8da5460a08305cdc9452f4e62dd34e5)

diff --git a/arch/arm/include/asm/armv7.h b/arch/arm/include/asm/armv7.h
index a20702e612..efc515eb33 100644
--- a/arch/arm/include/asm/armv7.h
+++ b/arch/arm/include/asm/armv7.h
@@ -61,6 +61,27 @@
 #include <asm/io.h>
 #include <asm/barriers.h>
 
+/* read L2 control register (L2CTLR) */
+static inline uint32_t read_l2ctlr(void)
+{
+	uint32_t val = 0;
+
+	asm volatile ("mrc p15, 1, %0, c9, c0, 2" : "=r" (val));
+
+	return val;
+}
+
+/* write L2 control register (L2CTLR) */
+static inline void write_l2ctlr(uint32_t val)
+{
+	/*
+	 * Note: L2CTLR can only be written when the L2 memory system
+	 * is idle, ie before the MMU is enabled.
+	 */
+	asm volatile("mcr p15, 1, %0, c9, c0, 2" : : "r" (val) : "memory");
+	isb();
+}
+
 /*
  * Workaround for ARM errata # 798870
  * Set L2ACTLR[7] to reissue any memory transaction in the L2 that has been
diff --git a/arch/arm/mach-rockchip/rk3288-board-spl.c b/arch/arm/mach-rockchip/rk3288-board-spl.c
index 6fa4909872..6396d80a49 100644
--- a/arch/arm/mach-rockchip/rk3288-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3288-board-spl.c
@@ -13,6 +13,7 @@
 #include <malloc.h>
 #include <ram.h>
 #include <spl.h>
+#include <asm/armv7.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
 #include <asm/arch/bootrom.h>
@@ -80,27 +81,6 @@ u32 spl_boot_mode(const u32 boot_device)
 	return MMCSD_MODE_RAW;
 }
 
-/* read L2 control register (L2CTLR) */
-static inline uint32_t read_l2ctlr(void)
-{
-	uint32_t val = 0;
-
-	asm volatile ("mrc p15, 1, %0, c9, c0, 2" : "=r" (val));
-
-	return val;
-}
-
-/* write L2 control register (L2CTLR) */
-static inline void write_l2ctlr(uint32_t val)
-{
-	/*
-	 * Note: L2CTLR can only be written when the L2 memory system
-	 * is idle, ie before the MMU is enabled.
-	 */
-	asm volatile("mcr p15, 1, %0, c9, c0, 2" : : "r" (val) : "memory");
-	isb();
-}
-
 static void configure_l2ctlr(void)
 {
 	uint32_t l2ctlr;

commit aa6addee1a21f7ae911178dc5b4d1f3faa8008c7
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Sep 11 12:48:12 2017 +0200

    rockchip: rk3399: spl: convert to using BOOT_DEVICE_BOOTROM
    
    Instead of directly calling into the back-to-bootrom code, the RK3399
    common SPL implementation now uses BOOT_DEVICE_BOOTROM to trigger a
    transfer back into the bootrom.
    
    With this factored out, the spl_board_init function can not be
    customised for each RK3399 board.
    
    Change-Id: I80166207e01646445bbafe4f27cf47008f010cf4
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit cbe18f10e6943db628e779da03dad97a93c627f3)

diff --git a/arch/arm/mach-rockchip/rk3399-board-spl.c b/arch/arm/mach-rockchip/rk3399-board-spl.c
index 0b22526cf8..d3841359c9 100644
--- a/arch/arm/mach-rockchip/rk3399-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3399-board-spl.c
@@ -1,10 +1,12 @@
 /*
  * (C) Copyright 2016 Rockchip Electronics Co., Ltd
+ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
  *
  * SPDX-License-Identifier:     GPL-2.0+
  */
 
 #include <common.h>
+#include <asm/arch/bootrom.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/grf_rk3399.h>
 #include <asm/arch/hardware.h>
@@ -19,9 +21,19 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+void board_return_to_bootrom(void)
+{
+	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
+}
+
 u32 spl_boot_device(void)
 {
-	return BOOT_DEVICE_MMC1;
+	u32 boot_device = BOOT_DEVICE_MMC1;
+
+	if (CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM))
+		return BOOT_DEVICE_BOOTROM;
+
+	return boot_device;
 }
 
 u32 spl_boot_mode(const u32 boot_device)
@@ -155,9 +167,6 @@ void spl_board_init(void)
 	}
 
 	preloader_console_init();
-#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
-	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
-#endif
 
 	return;
 err:

commit 28ac74a2f9e4d46db4037f5a018e1b168697da01
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Wed Sep 27 13:27:38 2017 +0200

    UPSTREAM: rockchip: lion-rk3368: defconfig: remove duplicate CONFIG_ENV_IS_IN_MMC
    
    Remove a duplicate CONFIG_ENV_IS_IN_MMC assignment for the lion-rk3368
    defconfig.
    
    Change-Id: I3c2e615c0290fdd10a6202571edffdd1ae04752c
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 8d35f3694f89244c546ea0909e85cc2ec8a1e87e)

diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig
index ea8a2d7824..66a3cd5fac 100644
--- a/configs/lion-rk3368_defconfig
+++ b/configs/lion-rk3368_defconfig
@@ -23,7 +23,6 @@ CONFIG_BOOTSTAGE=y
 CONFIG_SPL_BOOTSTAGE=y
 CONFIG_BOOTSTAGE_REPORT=y
 CONFIG_BOOTSTAGE_FDT=y
-CONFIG_ENV_IS_IN_MMC=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ARCH_EARLY_INIT_R=y
 CONFIG_SPL=y

commit bb0d14804ee5617ec2c4ee93442cd5a2b00333d4
Author: Rob Clark <robdclark@gmail.com>
Date:   Wed Sep 13 18:12:20 2017 -0400

    UPSTREAM: dm: video: Fix cache flushes
    
    Content can come to screen via putc() and we cannot always rely on
    updates ending with a puts().  This is the case with efi_console output
    to vidconsole.  Fixes corruption with Shell.efi.
    
    Change-Id: I081692793c0a7179a91446460a382259b3db9069
    Signed-off-by: Rob Clark <robdclark@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 889808da9b78d193e5a117a6bf6bc9366d6a3f30)

diff --git a/drivers/video/vidconsole-uclass.c b/drivers/video/vidconsole-uclass.c
index 53f4eddd42..6f040660c3 100644
--- a/drivers/video/vidconsole-uclass.c
+++ b/drivers/video/vidconsole-uclass.c
@@ -163,6 +163,7 @@ static void vidconsole_putc(struct stdio_dev *sdev, const char ch)
 	struct udevice *dev = sdev->priv;
 
 	vidconsole_put_char(dev, ch);
+	video_sync(dev->parent);
 }
 
 static void vidconsole_puts(struct stdio_dev *sdev, const char *s)
@@ -261,6 +262,8 @@ static int do_video_puts(cmd_tbl_t *cmdtp, int flag, int argc,
 		vidconsole_put_char(dev, *s);
 	video_sync(dev->parent);
 
+	video_sync(dev->parent);
+
 	return 0;
 }
 

commit f8cd15a1599ce6088e45db8aaa0ad0ad464502d0
Author: Seung-Woo Kim <sw0312.kim@samsung.com>
Date:   Tue Sep 19 13:29:45 2017 +0900

    UPSTREAM: spl: spl_mmc: add __maybe_unused to mmc_load_image_raw_sector()
    
    If there are no CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION,
    CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR and CONFIG_SPL_OS_BOOT,
    there is unused-function build warning. Add __maybe_unused macro
    to remove the warning.
    
    Change-Id: Ibd880ebc42fdb4610106a8f53645bfd61825dc9e
    Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit b016b585425b66ea53eef6b8600aff78a4205b9e)

diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c
index b2cccc6c6e..b57e0b04e4 100644
--- a/common/spl/spl_mmc.c
+++ b/common/spl/spl_mmc.c
@@ -52,8 +52,9 @@ static ulong h_spl_load_read(struct spl_load_info *load, ulong sector,
 	return blk_dread(mmc_get_blk_desc(mmc), sector, count, buf);
 }
 
-static int mmc_load_image_raw_sector(struct spl_image_info *spl_image,
-				     struct mmc *mmc, unsigned long sector)
+static __maybe_unused
+int mmc_load_image_raw_sector(struct spl_image_info *spl_image,
+			      struct mmc *mmc, unsigned long sector)
 {
 	unsigned long count;
 	struct image_header *header;

commit 80553dd1d86b1f3fdc4f7669fc3d4cf32107ab99
Author: Seung-Woo Kim <sw0312.kim@samsung.com>
Date:   Mon Jul 31 18:08:10 2017 +0900

    UPSTREAM: usb: dwc2: Align size of invalidating dcache before starting DMA
    
    During using dwc2 usb gadget, if usb message size is too small,
    following cache misaligned warning is shown:
    
       CACHE: Misaligned operation at range [bfdbcb00, bfdbcb04]
    
    Align size of invalidating dcache before starting DMA to remove the
    warning.
    
    Change-Id: Ibd9040be45da03174d63313e302b994720c7edd3
    Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit a939af0c748e2ea1eeb8cf47fa9771a95786de70)

diff --git a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
index 554936a493..f995c350d2 100644
--- a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
+++ b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
@@ -111,7 +111,8 @@ static int setdma_rx(struct dwc2_ep *ep, struct dwc2_request *req)
 	ctrl =  readl(&reg->out_endp[ep_num].doepctl);
 
 	invalidate_dcache_range((unsigned long) ep->dma_buf,
-				(unsigned long) ep->dma_buf + ep->len);
+				(unsigned long) ep->dma_buf +
+				ROUND(ep->len, CONFIG_SYS_CACHELINE_SIZE));
 
 	writel((unsigned int) ep->dma_buf, &reg->out_endp[ep_num].doepdma);
 	writel(DOEPT_SIZ_PKT_CNT(pktcnt) | DOEPT_SIZ_XFER_SIZE(length),

commit 115142eae565aeebfeb2f07bf2e21418df3d5f3e
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Wed Sep 13 01:19:43 2017 -0700

    UPSTREAM: usb: kbd: Set a default polling mechanism for USB keyboard
    
    The choice of "USB keyboard polling" cannot be optional as without
    one mechanism being set, it just doesn't work. Set the default one
    to CONFIG_SYS_USB_EVENT_POLL.
    
    Fixes: ecad7051 ("configs: Migrate all of the existing USB symbols, except fastboot")
    Change-Id: I9c54076edba03ca9fc10801f9f4bebb54ffd0ef9
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 2e5026a2f022f1c5ab5e879684a895ccdca7690c)

diff --git a/configs/Cyrus_P5020_defconfig b/configs/Cyrus_P5020_defconfig
index 82da854386..37f78a4811 100644
--- a/configs/Cyrus_P5020_defconfig
+++ b/configs/Cyrus_P5020_defconfig
@@ -34,5 +34,4 @@ CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/Cyrus_P5040_defconfig b/configs/Cyrus_P5040_defconfig
index 0fc9a07548..d33b514ee0 100644
--- a/configs/Cyrus_P5040_defconfig
+++ b/configs/Cyrus_P5040_defconfig
@@ -34,5 +34,4 @@ CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/MPC8610HPCD_defconfig b/configs/MPC8610HPCD_defconfig
index fde837c011..c71d5b18e1 100644
--- a/configs/MPC8610HPCD_defconfig
+++ b/configs/MPC8610HPCD_defconfig
@@ -22,5 +22,4 @@ CONFIG_SCSI=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/MPC8641HPCN_36BIT_defconfig b/configs/MPC8641HPCN_36BIT_defconfig
index 7318e723a8..9949e8b699 100644
--- a/configs/MPC8641HPCN_36BIT_defconfig
+++ b/configs/MPC8641HPCN_36BIT_defconfig
@@ -21,5 +21,4 @@ CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/MPC8641HPCN_defconfig b/configs/MPC8641HPCN_defconfig
index def36e4171..c8440d2584 100644
--- a/configs/MPC8641HPCN_defconfig
+++ b/configs/MPC8641HPCN_defconfig
@@ -21,5 +21,4 @@ CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig
index b2284acc34..13f2a3b849 100644
--- a/configs/apalis_imx6_defconfig
+++ b/configs/apalis_imx6_defconfig
@@ -54,7 +54,6 @@ CONFIG_NETDEVICES=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL=y
 CONFIG_USB_GADGET=y
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
diff --git a/configs/apalis_imx6_nospl_com_defconfig b/configs/apalis_imx6_nospl_com_defconfig
index 239605dadf..7165749cfb 100644
--- a/configs/apalis_imx6_nospl_com_defconfig
+++ b/configs/apalis_imx6_nospl_com_defconfig
@@ -43,7 +43,6 @@ CONFIG_NETDEVICES=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL=y
 CONFIG_USB_GADGET=y
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
diff --git a/configs/apalis_imx6_nospl_it_defconfig b/configs/apalis_imx6_nospl_it_defconfig
index 1bc05d7266..0ad7674ee5 100644
--- a/configs/apalis_imx6_nospl_it_defconfig
+++ b/configs/apalis_imx6_nospl_it_defconfig
@@ -43,7 +43,6 @@ CONFIG_NETDEVICES=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL=y
 CONFIG_USB_GADGET=y
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig
index 7d1e709d4c..7e100869a4 100644
--- a/configs/colibri_imx6_defconfig
+++ b/configs/colibri_imx6_defconfig
@@ -52,7 +52,6 @@ CONFIG_PHY_MICREL=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL=y
 CONFIG_USB_GADGET=y
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
diff --git a/configs/colibri_imx6_nospl_defconfig b/configs/colibri_imx6_nospl_defconfig
index 6877993088..ba4b2dd9d4 100644
--- a/configs/colibri_imx6_nospl_defconfig
+++ b/configs/colibri_imx6_nospl_defconfig
@@ -41,7 +41,6 @@ CONFIG_PHY_MICREL=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL=y
 CONFIG_USB_GADGET=y
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig
index 40d7393859..8804121bf4 100644
--- a/configs/firefly-rk3288_defconfig
+++ b/configs/firefly-rk3288_defconfig
@@ -74,7 +74,6 @@ CONFIG_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
diff --git a/configs/mx6cuboxi_defconfig b/configs/mx6cuboxi_defconfig
index 5490e3546b..27171fbddf 100644
--- a/configs/mx6cuboxi_defconfig
+++ b/configs/mx6cuboxi_defconfig
@@ -34,6 +34,5 @@ CONFIG_DM_THERMAL=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL=y
 # CONFIG_VIDEO_SW_CURSOR is not set
 CONFIG_OF_LIBFDT=y
diff --git a/configs/rpi_2_defconfig b/configs/rpi_2_defconfig
index 2345697701..03705975bf 100644
--- a/configs/rpi_2_defconfig
+++ b/configs/rpi_2_defconfig
@@ -26,7 +26,6 @@ CONFIG_DM_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_SMSC95XX=y
 CONFIG_DM_VIDEO=y
diff --git a/configs/rpi_3_32b_defconfig b/configs/rpi_3_32b_defconfig
index bb56a9e4e1..31d67ccdc9 100644
--- a/configs/rpi_3_32b_defconfig
+++ b/configs/rpi_3_32b_defconfig
@@ -28,7 +28,6 @@ CONFIG_DM_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_SMSC95XX=y
 CONFIG_DM_VIDEO=y
diff --git a/configs/rpi_3_defconfig b/configs/rpi_3_defconfig
index 6edacd69a2..1ac3a96e25 100644
--- a/configs/rpi_3_defconfig
+++ b/configs/rpi_3_defconfig
@@ -28,7 +28,6 @@ CONFIG_DM_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_SMSC95XX=y
 CONFIG_DM_VIDEO=y
diff --git a/configs/rpi_defconfig b/configs/rpi_defconfig
index 2e81966c14..87e88223ee 100644
--- a/configs/rpi_defconfig
+++ b/configs/rpi_defconfig
@@ -26,7 +26,6 @@ CONFIG_DM_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_SMSC95XX=y
 CONFIG_DM_VIDEO=y
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index 72600afea8..ac0736aa9a 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -176,7 +176,6 @@ CONFIG_DM_USB=y
 CONFIG_USB_EMUL=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL=y
 CONFIG_DM_VIDEO=y
 CONFIG_CONSOLE_ROTATION=y
 CONFIG_CONSOLE_TRUETYPE=y
diff --git a/configs/sandbox_flattree_defconfig b/configs/sandbox_flattree_defconfig
index 325f4ff57f..77cca3d00d 100644
--- a/configs/sandbox_flattree_defconfig
+++ b/configs/sandbox_flattree_defconfig
@@ -161,7 +161,6 @@ CONFIG_DM_USB=y
 CONFIG_USB_EMUL=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL=y
 CONFIG_DM_VIDEO=y
 CONFIG_CONSOLE_ROTATION=y
 CONFIG_CONSOLE_TRUETYPE=y
diff --git a/configs/sandbox_noblk_defconfig b/configs/sandbox_noblk_defconfig
index e152917fe4..53c2fb8442 100644
--- a/configs/sandbox_noblk_defconfig
+++ b/configs/sandbox_noblk_defconfig
@@ -169,7 +169,6 @@ CONFIG_DM_USB=y
 CONFIG_USB_EMUL=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL=y
 CONFIG_DM_VIDEO=y
 CONFIG_CONSOLE_ROTATION=y
 CONFIG_CONSOLE_TRUETYPE=y
diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig
index be4a85da33..0f1da0b229 100644
--- a/configs/sandbox_spl_defconfig
+++ b/configs/sandbox_spl_defconfig
@@ -179,7 +179,6 @@ CONFIG_DM_USB=y
 CONFIG_USB_EMUL=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL=y
 CONFIG_DM_VIDEO=y
 CONFIG_CONSOLE_ROTATION=y
 CONFIG_CONSOLE_TRUETYPE=y
diff --git a/configs/seaboard_defconfig b/configs/seaboard_defconfig
index ea4546bce4..810cfaa498 100644
--- a/configs/seaboard_defconfig
+++ b/configs/seaboard_defconfig
@@ -36,7 +36,6 @@ CONFIG_USB_ULPI_VIEWPORT=y
 CONFIG_USB_ULPI=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_DM_VIDEO=y
diff --git a/configs/ventana_defconfig b/configs/ventana_defconfig
index 42353f034e..b11dab1196 100644
--- a/configs/ventana_defconfig
+++ b/configs/ventana_defconfig
@@ -34,7 +34,6 @@ CONFIG_USB_ULPI_VIEWPORT=y
 CONFIG_USB_ULPI=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_DM_VIDEO=y
diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig
index 62126aad2f..e7658b4d95 100644
--- a/drivers/usb/Kconfig
+++ b/drivers/usb/Kconfig
@@ -75,7 +75,7 @@ if USB_KEYBOARD
 
 choice
 	prompt "USB keyboard polling"
-	optional
+	default SYS_USB_EVENT_POLL
 	---help---
 	  Enable a polling mechanism for USB keyboard.
 

commit 97ff91fa1d5b4715544aae10250822ea38b2561e
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Sep 12 17:32:28 2017 +0200

    UPSTREAM: usb: host: ehci-generic: convert to livetree
    
    Update the generic EHCI driver to support a live tree.
    
    Change-Id: I07159bf921cda3d42247d2134a4f5a6bd7d65bb5
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 6e652e3a7d15b896fd82b717c6eca74b70a33b7a)

diff --git a/drivers/usb/host/ehci-generic.c b/drivers/usb/host/ehci-generic.c
index 03f8d321af..18e1e0ee88 100644
--- a/drivers/usb/host/ehci-generic.c
+++ b/drivers/usb/host/ehci-generic.c
@@ -108,7 +108,7 @@ static int ehci_usb_probe(struct udevice *dev)
 		}
 	}
 
-	hccr = map_physmem(devfdt_get_addr(dev), 0x100, MAP_NOCACHE);
+	hccr = map_physmem(dev_read_addr(dev), 0x100, MAP_NOCACHE);
 	hcor = (struct ehci_hcor *)((uintptr_t)hccr +
 				    HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
 

commit c32504a86a26e7c1ee54f16665c04adf5660e455
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Sep 12 17:32:27 2017 +0200

    UPSTREAM: usb: dwc2: convert to livetree
    
    Update the DWC2 USB driver to support a live tree.
    
    Change-Id: I1b2ccc05a637856cf1af0583985f0f336530121a
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit a9d3037a8e4f045434184623eadbe86fa3844b28)

diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
index 64c42ac471..0ed72d5ae7 100644
--- a/drivers/usb/host/dwc2.c
+++ b/drivers/usb/host/dwc2.c
@@ -1245,7 +1245,7 @@ static int dwc2_usb_ofdata_to_platdata(struct udevice *dev)
 	struct dwc2_priv *priv = dev_get_priv(dev);
 	fdt_addr_t addr;
 
-	addr = devfdt_get_addr(dev);
+	addr = dev_read_addr(dev);
 	if (addr == FDT_ADDR_T_NONE)
 		return -EINVAL;
 	priv->regs = (struct dwc2_core_regs *)addr;

commit d5c8d3f596cb6351585305b636c6f5c612969b6d
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Sep 12 17:32:25 2017 +0200

    UPSTREAM: rockchip: xhci: Convert to livetree
    
    Update the Rockchip xhci wrapper driver to support a live device tree.
    
    Change-Id: Ie5dad13ae0327b7893c1530d7383994a1375d12e
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 32c8eee37fcb88d372410952d3ab88bcf5fdf7e7)

diff --git a/drivers/usb/host/xhci-rockchip.c b/drivers/usb/host/xhci-rockchip.c
index ec55f4e59f..ca3abffba0 100644
--- a/drivers/usb/host/xhci-rockchip.c
+++ b/drivers/usb/host/xhci-rockchip.c
@@ -6,8 +6,6 @@
  */
 #include <common.h>
 #include <dm.h>
-#include <fdtdec.h>
-#include <libfdt.h>
 #include <malloc.h>
 #include <usb.h>
 #include <watchdog.h>
@@ -46,7 +44,7 @@ static int xhci_usb_ofdata_to_platdata(struct udevice *dev)
 	/*
 	 * Get the base address for XHCI controller from the device node
 	 */
-	plat->hcd_base = devfdt_get_addr(dev);
+	plat->hcd_base = dev_read_addr(dev);
 	if (plat->hcd_base == FDT_ADDR_T_NONE) {
 		error("Can't get the XHCI register base address\n");
 		return -ENXIO;

commit 344f8eb9b9b52892e9b24bd4104b65695df064c9
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Thu Sep 7 06:13:21 2017 -0700

    UPSTREAM: dm: usb: storage: Fix broken read/write when both EHCD and xHCD are enabled
    
    When EHCD and xHCD are enabled at the same time, USB storage device
    driver will fail to read/write from/to the storage device attached
    to the xHCI interface, due to its transfer blocks exceeds the xHCD
    driver limitation.
    
    With driver model, we have an API to get the controller's maximum
    transfer size and we can use that to determine the storage driver's
    capability of read/write.
    
    Note: the non-DM version driver is still broken with xHCD and the
    intent here is not to fix the non-DM one, since the xHCD itself is
    already broken in places like 3.0 hub support, etc.
    
    Change-Id: Id95b187ad7c34d80b236f425cd1cf3da7b954589
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit ea7fad91019654fb21e6cd04f963e0482869dba5)

diff --git a/common/usb_storage.c b/common/usb_storage.c
index 957ccdb297..a57570b73f 100644
--- a/common/usb_storage.c
+++ b/common/usb_storage.c
@@ -939,10 +939,14 @@ do_retry:
 	return USB_STOR_TRANSPORT_FAILED;
 }
 
-static void usb_stor_set_max_xfer_blk(struct us_data *us)
+static void usb_stor_set_max_xfer_blk(struct usb_device *udev,
+				      struct us_data *us)
 {
 	unsigned short blk;
+	size_t __maybe_unused size;
+	int __maybe_unused ret;
 
+#ifndef CONFIG_DM_USB
 #ifdef CONFIG_USB_EHCI_HCD
 	/*
 	 * The U-Boot EHCI driver can handle any transfer length as long as
@@ -953,6 +957,17 @@ static void usb_stor_set_max_xfer_blk(struct us_data *us)
 #else
 	blk = 20;
 #endif
+#else
+	ret = usb_get_max_xfer_size(udev, (size_t *)&size);
+	if (ret < 0) {
+		/* unimplemented, let's use default 20 */
+		blk = 20;
+	} else {
+		if (size > USHRT_MAX * 512)
+			blk = USHRT_MAX;
+		blk = size / 512;
+	}
+#endif
 
 	us->max_xfer_blk = blk;
 }
@@ -1393,7 +1408,7 @@ int usb_storage_probe(struct usb_device *dev, unsigned int ifnum,
 	}
 
 	/* Set the maximum transfer size per host controller setting */
-	usb_stor_set_max_xfer_blk(ss);
+	usb_stor_set_max_xfer_blk(dev, ss);
 
 	dev->privptr = (void *)ss;
 	return 1;

commit 86b376c416d14915d663218bded3d17b4d5964f1
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Thu Sep 7 06:13:20 2017 -0700

    UPSTREAM: usb: storage: Refactor to use max_xfer_blk from struct us_data
    
    This adds a new memeber max_xfer_blk in struct us_data to record
    the maximum number of transfer blocks for the storage device.
    
    It is set per HCD setting, and so far is to 65535 for EHCD and 20
    for everything else.
    
    Change-Id: I53b942501431471c981b3f82ae1028ecd7b45069
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 6158d0b42411165d34635a2ddfea17e12dce3329)

diff --git a/common/usb_storage.c b/common/usb_storage.c
index df0b057308..957ccdb297 100644
--- a/common/usb_storage.c
+++ b/common/usb_storage.c
@@ -98,19 +98,9 @@ struct us_data {
 	struct scsi_cmd	*srb;			/* current srb */
 	trans_reset	transport_reset;	/* reset routine */
 	trans_cmnd	transport;		/* transport routine */
+	unsigned short	max_xfer_blk;		/* maximum transfer blocks */
 };
 
-#ifdef CONFIG_USB_EHCI_HCD
-/*
- * The U-Boot EHCI driver can handle any transfer length as long as there is
- * enough free heap space left, but the SCSI READ(10) and WRITE(10) commands are
- * limited to 65535 blocks.
- */
-#define USB_MAX_XFER_BLK	65535
-#else
-#define USB_MAX_XFER_BLK	20
-#endif
-
 #ifndef CONFIG_BLK
 static struct us_data usb_stor[USB_MAX_STOR_DEV];
 #endif
@@ -949,6 +939,23 @@ do_retry:
 	return USB_STOR_TRANSPORT_FAILED;
 }
 
+static void usb_stor_set_max_xfer_blk(struct us_data *us)
+{
+	unsigned short blk;
+
+#ifdef CONFIG_USB_EHCI_HCD
+	/*
+	 * The U-Boot EHCI driver can handle any transfer length as long as
+	 * there is enough free heap space left, but the SCSI READ(10) and
+	 * WRITE(10) commands are limited to 65535 blocks.
+	 */
+	blk = USHRT_MAX;
+#else
+	blk = 20;
+#endif
+
+	us->max_xfer_blk = blk;
+}
 
 static int usb_inquiry(struct scsi_cmd *srb, struct us_data *ss)
 {
@@ -1150,12 +1157,12 @@ static unsigned long usb_stor_read(struct blk_desc *block_dev, lbaint_t blknr,
 		/* XXX need some comment here */
 		retry = 2;
 		srb->pdata = (unsigned char *)buf_addr;
-		if (blks > USB_MAX_XFER_BLK)
-			smallblks = USB_MAX_XFER_BLK;
+		if (blks > ss->max_xfer_blk)
+			smallblks = ss->max_xfer_blk;
 		else
 			smallblks = (unsigned short) blks;
 retry_it:
-		if (smallblks == USB_MAX_XFER_BLK)
+		if (smallblks == ss->max_xfer_blk)
 			usb_show_progress();
 		srb->datalen = block_dev->blksz * smallblks;
 		srb->pdata = (unsigned char *)buf_addr;
@@ -1178,7 +1185,7 @@ retry_it:
 	      start, smallblks, buf_addr);
 
 	usb_disable_asynch(0); /* asynch transfer allowed */
-	if (blkcnt >= USB_MAX_XFER_BLK)
+	if (blkcnt >= ss->max_xfer_blk)
 		debug("\n");
 	return blkcnt;
 }
@@ -1236,12 +1243,12 @@ static unsigned long usb_stor_write(struct blk_desc *block_dev, lbaint_t blknr,
 		 */
 		retry = 2;
 		srb->pdata = (unsigned char *)buf_addr;
-		if (blks > USB_MAX_XFER_BLK)
-			smallblks = USB_MAX_XFER_BLK;
+		if (blks > ss->max_xfer_blk)
+			smallblks = ss->max_xfer_blk;
 		else
 			smallblks = (unsigned short) blks;
 retry_it:
-		if (smallblks == USB_MAX_XFER_BLK)
+		if (smallblks == ss->max_xfer_blk)
 			usb_show_progress();
 		srb->datalen = block_dev->blksz * smallblks;
 		srb->pdata = (unsigned char *)buf_addr;
@@ -1263,7 +1270,7 @@ retry_it:
 	      PRIxPTR "\n", start, smallblks, buf_addr);
 
 	usb_disable_asynch(0); /* asynch transfer allowed */
-	if (blkcnt >= USB_MAX_XFER_BLK)
+	if (blkcnt >= ss->max_xfer_blk)
 		debug("\n");
 	return blkcnt;
 
@@ -1384,6 +1391,10 @@ int usb_storage_probe(struct usb_device *dev, unsigned int ifnum,
 		ss->irqmaxp = usb_maxpacket(dev, ss->irqpipe);
 		dev->irq_handle = usb_stor_irq;
 	}
+
+	/* Set the maximum transfer size per host controller setting */
+	usb_stor_set_max_xfer_blk(ss);
+
 	dev->privptr = (void *)ss;
 	return 1;
 }

commit 50293ea8b3ec1a31b556200be372e33894e2ed54
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Thu Sep 7 06:13:19 2017 -0700

    UPSTREAM: dm: usb: ehci: Implement get_max_xfer_size() operation
    
    EHCD can handle any transfer length as long as there is enough free
    heap space left, hence set the theoretical max number SIZE_MAX.
    
    Change-Id: I58711c5a6348b525caf950748d7c3338997e146a
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit a23aa66baa3725e8707da46b18c645ad1a7243a0)

diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index 3243c1d1cf..be3e842dcc 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -1596,6 +1596,17 @@ static int ehci_destroy_int_queue(struct udevice *dev, struct usb_device *udev,
 	return _ehci_destroy_int_queue(udev, queue);
 }
 
+static int ehci_get_max_xfer_size(struct udevice *dev, size_t *size)
+{
+	/*
+	 * EHCD can handle any transfer length as long as there is enough
+	 * free heap space left, hence set the theoretical max number here.
+	 */
+	*size = SIZE_MAX;
+
+	return 0;
+}
+
 int ehci_register(struct udevice *dev, struct ehci_hccr *hccr,
 		  struct ehci_hcor *hcor, const struct ehci_ops *ops,
 		  uint tweaks, enum usb_init_type init)
@@ -1658,6 +1669,7 @@ struct dm_usb_ops ehci_usb_ops = {
 	.create_int_queue = ehci_create_int_queue,
 	.poll_int_queue = ehci_poll_int_queue,
 	.destroy_int_queue = ehci_destroy_int_queue,
+	.get_max_xfer_size  = ehci_get_max_xfer_size,
 };
 
 #endif

commit dbdd01408220a5006ca6890c3ab778fd52493a42
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Thu Sep 7 06:13:18 2017 -0700

    UPSTREAM: dm: usb: xhci: Implement get_max_xfer_size() operation
    
    xHCD allocates one segment which includes 64 TRBs for each endpoint
    and the last TRB in this segment is configured as a link TRB to form
    a TRB ring. Each TRB can transfer up to 64K bytes, however data
    buffers referenced by transfer TRBs shall not span 64KB boundaries.
    Hence the maximum number of TRBs we can use in one transfer is 62.
    
    Change-Id: I7ea20b7805fe4da11343d38001a414b95751c7d5
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 022ceacaf8a6a67f86f0a5ed8f6ce6b2f6ab73a4)

diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index 9b82ee5c60..04eb1eb14d 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -1228,6 +1228,20 @@ static int xhci_update_hub_device(struct udevice *dev, struct usb_device *udev)
 	return xhci_configure_endpoints(udev, false);
 }
 
+static int xhci_get_max_xfer_size(struct udevice *dev, size_t *size)
+{
+	/*
+	 * xHCD allocates one segment which includes 64 TRBs for each endpoint
+	 * and the last TRB in this segment is configured as a link TRB to form
+	 * a TRB ring. Each TRB can transfer up to 64K bytes, however data
+	 * buffers referenced by transfer TRBs shall not span 64KB boundaries.
+	 * Hence the maximum number of TRBs we can use in one transfer is 62.
+	 */
+	*size = (TRBS_PER_SEGMENT - 2) * TRB_MAX_BUFF_SIZE;
+
+	return 0;
+}
+
 int xhci_register(struct udevice *dev, struct xhci_hccr *hccr,
 		  struct xhci_hcor *hcor)
 {
@@ -1281,6 +1295,7 @@ struct dm_usb_ops xhci_usb_ops = {
 	.interrupt = xhci_submit_int_msg,
 	.alloc_device = xhci_alloc_device,
 	.update_hub_device = xhci_update_hub_device,
+	.get_max_xfer_size  = xhci_get_max_xfer_size,
 };
 
 #endif

commit 51da7f21678203a5c13c5383e1a9619bb52f191d
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Thu Sep 7 06:13:17 2017 -0700

    UPSTREAM: dm: usb: Add a new USB controller operation 'get_max_xfer_size'
    
    The HCD may have limitation on the maximum bytes to be transferred
    in a USB transfer. USB class driver needs to be aware of this.
    
    Change-Id: I6084946910810d5dbbe66a9191e6da768b084fe6
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 3e59f59015e39ceb870fa8a7a12e0464e775512b)

diff --git a/drivers/usb/host/usb-uclass.c b/drivers/usb/host/usb-uclass.c
index 0b8a501ce8..bc44fc3394 100644
--- a/drivers/usb/host/usb-uclass.c
+++ b/drivers/usb/host/usb-uclass.c
@@ -150,6 +150,17 @@ int usb_update_hub_device(struct usb_device *udev)
 	return ops->update_hub_device(bus, udev);
 }
 
+int usb_get_max_xfer_size(struct usb_device *udev, size_t *size)
+{
+	struct udevice *bus = udev->controller_dev;
+	struct dm_usb_ops *ops = usb_get_ops(bus);
+
+	if (!ops->get_max_xfer_size)
+		return -ENOSYS;
+
+	return ops->get_max_xfer_size(bus, size);
+}
+
 int usb_stop(void)
 {
 	struct udevice *bus;
diff --git a/include/usb.h b/include/usb.h
index fad04016a3..0ddc0822b4 100644
--- a/include/usb.h
+++ b/include/usb.h
@@ -766,6 +766,14 @@ struct dm_usb_ops {
 	 * representation of this hub can be updated (xHCI)
 	 */
 	int (*update_hub_device)(struct udevice *bus, struct usb_device *udev);
+
+	/**
+	 * get_max_xfer_size() - Get HCD's maximum transfer bytes
+	 *
+	 * The HCD may have limitation on the maximum bytes to be transferred
+	 * in a USB transfer. USB class driver needs to be aware of this.
+	 */
+	int (*get_max_xfer_size)(struct udevice *bus, size_t *size);
 };
 
 #define usb_get_ops(dev)	((struct dm_usb_ops *)(dev)->driver->ops)
@@ -939,7 +947,7 @@ int usb_new_device(struct usb_device *dev);
 int usb_alloc_device(struct usb_device *dev);
 
 /**
- * update_hub_device() - Update HCD's internal representation of hub
+ * usb_update_hub_device() - Update HCD's internal representation of hub
  *
  * After a hub descriptor is fetched, notify HCD so that its internal
  * representation of this hub can be updated.
@@ -949,6 +957,18 @@ int usb_alloc_device(struct usb_device *dev);
  */
 int usb_update_hub_device(struct usb_device *dev);
 
+/**
+ * usb_get_max_xfer_size() - Get HCD's maximum transfer bytes
+ *
+ * The HCD may have limitation on the maximum bytes to be transferred
+ * in a USB transfer. USB class driver needs to be aware of this.
+ *
+ * @dev:		USB device
+ * @size:		maximum transfer bytes
+ * @return 0 if OK, -ve on error
+ */
+int usb_get_max_xfer_size(struct usb_device *dev, size_t *size);
+
 /**
  * usb_emul_setup_device() - Set up a new USB device emulation
  *

commit 1d5ed4d069cd6640c974cbefcef851098ff2eb3d
Author: Marek Vasut <marek.vasut@gmail.com>
Date:   Tue Sep 12 23:02:08 2017 +0200

    UPSTREAM: usb: xhci: Set number of event segments and entries to 1
    
    The Linux kernel driver sets the number of event segments and entries
    to 1 , while the initial import of the xhci code set that values to 3
    for reasons unknown. While most controllers are fine with more event
    segments with more entries, there are standard-conformant controllers
    (ie. Renesas RCar xHCI) which only support 1 event segment.
    
    Set the number of event segments and event entries back to 1 to allow
    such controllers to work with U-Boot xHCI stack. Note that the Renesas
    controller correctly indicates ERST Max = 1 in HCSPARAMS2[7:4] .
    
    Change-Id: I378b544259833998b54b1e78e8dc0daa3e0d0f3f
    Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
    Cc: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 7489d22a3c73b527c21c147f3547e8cc02484e47)

diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
index a497d9d830..3377450fca 100644
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -1045,9 +1045,9 @@ struct xhci_scratchpad {
  * (1K bytes * 8bytes/bit) / (4*32 bits) = 64 segment entries in the table,
  * meaning 64 ring segments.
  * Initial allocated size of the ERST, in number of entries */
-#define	ERST_NUM_SEGS	3
+#define	ERST_NUM_SEGS	1
 /* Initial number of event segment rings allocated */
-#define	ERST_ENTRIES	3
+#define	ERST_ENTRIES	1
 /* Initial allocated size of the ERST, in number of entries */
 #define	ERST_SIZE	64
 /* Poll every 60 seconds */

commit 31526294759f264599288515e4268cb85034895d
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Thu Sep 21 19:03:06 2017 +0200

    UPSTREAM: GPT: incomplete initialization in allocate_disk_part
    
    memset(newpart, '\0', sizeof(newpart));
    only initializes the firest 4 or 8 bytes of *newpart and not the whole
    structure disk_part.
    
    We should use sizeof(struct disk_part).
    
    Instead of malloc and memset we can use calloc.
    
    Identified by cppcheck.
    
    Fixes: 09a49930e41 GPT: read partition table from device into a data structure
    Change-Id: Ifc937b64f6ac6abc56c0c6bb3d094c2316b9268e
    Reported-by: Coverity (CID: 167228)
    Cc: Stefan Roese <sr@denx.de>
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Reviewed-by: Stefan Roese <sr@denx.de>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit f66bc0e0beeff7fa27c29f740d2f314d63b3346d)

diff --git a/cmd/gpt.c b/cmd/gpt.c
index 638aa19826..d4406e3120 100644
--- a/cmd/gpt.c
+++ b/cmd/gpt.c
@@ -190,10 +190,9 @@ static void del_gpt_info(void)
 static struct disk_part *allocate_disk_part(disk_partition_t *info, int partnum)
 {
 	struct disk_part *newpart;
-	newpart = malloc(sizeof(*newpart));
+	newpart = calloc(1, sizeof(struct disk_part));
 	if (!newpart)
 		return ERR_PTR(-ENOMEM);
-	memset(newpart, '\0', sizeof(newpart));
 
 	newpart->gpt_part_info.start = info->start;
 	newpart->gpt_part_info.size = info->size;

commit f8470aee13947684417f5422a2df50493bb471a1
Author: Tom Rini <trini@konsulko.com>
Date:   Sat Sep 23 23:14:33 2017 -0400

    UPSTREAM: tools/mkimage: Make the path to the dtc binary that mkimage calls configurable
    
    In some cases, such as FreeBSD, the path to an alternative dtc needs to
    be used.  Rather than override the one given in the Makefile on the
    command line, make this part of the build configuration.
    
    Change-Id: Ib4e2b2603f22098edb11bf3f03be32a86b2d2f1a
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 1f6049e2501b5c35c61435dbc05ba96743202674)

diff --git a/dts/Kconfig b/dts/Kconfig
index 44fc9fe36d..4ee0510943 100644
--- a/dts/Kconfig
+++ b/dts/Kconfig
@@ -170,3 +170,12 @@ config TPL_OF_PLATDATA
 	  information.
 
 endmenu
+
+config MKIMAGE_DTC_PATH
+	string "Path to dtc binary for use within mkimage"
+	default "dtc"
+	help
+	  The mkimage host tool will, in order to generate FIT images make
+	  calls to the dtc application in order to create the output.  In
+	  some cases the system dtc may not support all required features
+	  and the path to a different version should be given here.
diff --git a/tools/Makefile b/tools/Makefile
index 8e1009bf6c..ff7edb02e6 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -175,7 +175,7 @@ HOSTCFLAGS_rsa-sign.o += -Wno-deprecated-declarations
 endif
 endif
 
-HOSTCFLAGS_fit_image.o += -DMKIMAGE_DTC=\"$(DTC)\"
+HOSTCFLAGS_fit_image.o += -DMKIMAGE_DTC=\"$(CONFIG_MKIMAGE_DTC_PATH)\"
 
 HOSTLOADLIBES_dumpimage := $(HOSTLOADLIBES_mkimage)
 HOSTLOADLIBES_fit_info := $(HOSTLOADLIBES_mkimage)

commit 21a28542181c4aaa118c9192cacb03d8d0f8741d
Author: Tom Rini <trini@konsulko.com>
Date:   Fri Sep 15 13:15:25 2017 -0400

    UPSTREAM: Makefile: Update minimum dtc version to 1.4.3
    
    With support for overlays and calling the -@ flag to dtc we need to have
    at least 1.4.3 available now.
    
    Cc: Simon Glass <sjg@chromium.org>
    Change-Id: I4dbad21727ce23d87faeec55073231081b151a92
    Reported-by: Stephen Warren <swarren@wwwdotorg.org>
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 2fa73e784da105419b7d9d07d8f9d4a79afe531a)

diff --git a/scripts/dtc-version.sh b/scripts/dtc-version.sh
index e8c94d390b..0744c39eb0 100755
--- a/scripts/dtc-version.sh
+++ b/scripts/dtc-version.sh
@@ -2,8 +2,8 @@
 #
 # dtc-version dtc-command
 #
-# Prints the dtc version of `dtc-command' in a canonical 4-digit form
-# such as `0222' for binutils 2.22
+# Prints the dtc version of `dtc-command' in a canonical 6-digit form
+# such as `010404'  for dtc 1.4.4
 #
 
 dtc="$*"
@@ -16,5 +16,6 @@ fi
 
 MAJOR=$($dtc -v | head -1 | awk '{print $NF}' | cut -d . -f 1)
 MINOR=$($dtc -v | head -1 | awk '{print $NF}' | cut -d . -f 2)
+PATCH=$($dtc -v | head -1 | awk '{print $NF}' | cut -d . -f 3 | cut -d - -f 1)
 
-printf "%02d%02d\\n" $MAJOR $MINOR
+printf "%02d%02d%02d\\n" $MAJOR $MINOR $PATCH

commit 5821df21ae36d9ef252d346a5abb76be773c5d69
Author: Tom Rini <trini@konsulko.com>
Date:   Sat Sep 23 13:00:57 2017 -0400

    UPSTREAM: dtc: Switch to building and using our own dtc unless provided
    
    This makes us act like the Linux Kernel does and allow for dtc to be
    provided externally but otherwise we use the version of dtc that is
    included in the sources.  This in turn means that we can drop the
    checkdtc logic.  We select DTC in the cases where we will need the dtc
    tool provided.
    
    Change-Id: I2b396c725c0a89a81f0cf8397367a7d41b70b641
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 36dd5f1b8abcd0aa5f8490b3ef1e4e7ecce2eb8c)

diff --git a/.travis.yml b/.travis.yml
index 9dfd016da0..00b2a73a5e 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -26,11 +26,9 @@ addons:
     - grub-efi-ia32-bin
     - rpm2cpio
     - wget
+    - device-tree-compiler
 
 install:
- # install latest device tree compiler
- - git clone --depth=1 -b v1.4.3 git://git.kernel.org/pub/scm/utils/dtc/dtc.git /tmp/dtc
- - make -j4 -C /tmp/dtc
  # Clone uboot-test-hooks
  - git clone --depth=1 git://github.com/swarren/uboot-test-hooks.git /tmp/uboot-test-hooks
  - ln -s travis-ci /tmp/uboot-test-hooks/bin/`hostname`
@@ -51,7 +49,7 @@ install:
 
 env:
   global:
-    - PATH=/tmp/dtc:/tmp/qemu-install/bin:/tmp/uboot-test-hooks/bin:/usr/bin:/bin
+    - PATH=/tmp/qemu-install/bin:/tmp/uboot-test-hooks/bin:/usr/bin:/bin
     - PYTHONPATH=/tmp/uboot-test-hooks/py/travis-ci
     - BUILD_DIR=build
     - HOSTCC="cc"
diff --git a/Makefile b/Makefile
index 8250b3409a..b7d5cbb3f9 100644
--- a/Makefile
+++ b/Makefile
@@ -349,7 +349,7 @@ OBJDUMP		= $(CROSS_COMPILE)objdump
 AWK		= awk
 PERL		= perl
 PYTHON		?= python
-DTC		?= dtc
+DTC		?= $(objtree)/scripts/dtc/dtc
 CHECK		= sparse
 
 CHECKFLAGS     := -D__linux__ -Dlinux -D__STDC__ -Dunix -D__unix__ \
@@ -872,7 +872,7 @@ endif
 PHONY += dtbs
 dtbs: dts/dt.dtb
 	@:
-dts/dt.dtb: checkdtc u-boot
+dts/dt.dtb: u-boot
 	$(Q)$(MAKE) $(build)=dts dtbs
 
 quiet_cmd_copy = COPY    $@
@@ -1447,12 +1447,6 @@ SYSTEM_MAP = \
 System.map:	u-boot
 		@$(call SYSTEM_MAP,$<) > $@
 
-checkdtc:
-	@if test $(call dtc-version) -lt 0104; then \
-		echo '*** Your dtc is too old, please upgrade to dtc 1.4 or newer'; \
-		false; \
-	fi
-
 #########################################################################
 
 # ARM relocations should all be R_ARM_RELATIVE (32-bit) or
diff --git a/dts/Kconfig b/dts/Kconfig
index b4b7ddc144..44fc9fe36d 100644
--- a/dts/Kconfig
+++ b/dts/Kconfig
@@ -5,11 +5,15 @@
 config SUPPORT_OF_CONTROL
 	bool
 
+config DTC
+	bool
+
 menu "Device Tree Control"
 	depends on SUPPORT_OF_CONTROL
 
 config OF_CONTROL
 	bool "Run-time configuration via Device Tree"
+	select DTC
 	help
 	  This feature provides for run-time configuration of U-Boot
 	  via a flattened device tree.
diff --git a/scripts/Makefile b/scripts/Makefile
index 3e10c16d59..9d55241463 100644
--- a/scripts/Makefile
+++ b/scripts/Makefile
@@ -21,3 +21,4 @@ build_docproc: $(obj)/docproc
 
 # Let clean descend into subdirs
 subdir-	+= basic kconfig
+subdir-$(CONFIG_DTC)	+= dtc

commit d7857e40f2de4c570bb962d517058aeb5fc87ad4
Author: Tom Rini <trini@konsulko.com>
Date:   Sat Sep 23 17:31:59 2017 -0400

    UPSTREAM: scripts/dtc: Update to upstream version v1.4.4-50-gfe50bd1ecc1d
    
    This adds the following commits from upstream:
    
    fe50bd1ecc1d fdtget: Split out cell list display into a new function
    62d812308d11 README: Add a note about test_tree1.dts
    5bed86aee9e8 pylibfdt: Add support for fdt_subnode_offset()
    46f31b65b3b3 pylibfdt: Add support for fdt_node_offset_by_phandle()
    a3ae43723687 pylibfdt: Add support for fdt_parent_offset()
    a198af80344c pylibfdt: Add support for fdt_get_phandle()
    b9eba92ea50f tests: Return a failure code when any tests fail
    155faf6cc209 pylibfdt: Use local pylibfdt module
    50e5cd07f325 pylibfdt: Add a test for use of uint32_t
    ab78860f09f5 pylibfdt: Add stdint include to fix uint32_t
    36f511fb1113 tests: Add stacked overlay tests on fdtoverlay
    1bb00655d3e5 fdt: Allow stacked overlays phandle references
    a33c2247ac8d Introduce fdt_setprop_placeholder() method
    0016f8c2aa32 dtc: change default phandles to ePAPR style instead of both
    e3b9a9588a35 tests: fdtoverlay unit test
    42409146f2db fdtoverlay: A tool that applies overlays
    aae22722fc8d manual: Document missing options
    13ce6e1c2fc4 dtc: fix sprintf() format string error, again
    d990b8013889 Makefile: Fix build on MSYS2 and Cygwin
    51f56dedf8ea Clean up shared library compile/link options
    21a2bc896e3d Suppress expected error message in fdtdump test
    2a42b14d0d03 dtc: check.c fix compile error
    a10cb3c818d3 Fix get_node_by_path string equality check
    548aea2c436a fdtdump: Discourage use of fdtdump
    c2258841a785 fdtdump: Fix over-zealous version check
    9067ee4be0e6 Fix a few whitespace and style nits
    e56f2b07be38 pylibfdt: Use setup.py to build the swig file
    896f1c133265 pylibfdt: Use Makefile constructs to implement NO_PYTHON
    90db6d9989ca pylibfdt: Allow setup.py to operate stand-alone
    e20d9658cd8f Add Coverity Scan support
    b04a2cf08862 pylibfdt: Fix code style in setup.py
    1c5170d3a466 pylibfdt: Rename libfdt.swig to libfdt.i
    580a9f6c2880 Add a libfdt function to write a property placeholder
    ab15256d8d02 pylibfdt: Use the call function to simplify the Makefile
    9f2e3a3a1f19 pylibfdt: Use the correct libfdt version in the module
    e91c652af215 pylibfdt: Enable installation of Python module
    8a892fd85d94 pylibfdt: Allow building to be disabled
    741cdff85d3e .travis.yml: Add builds with and without Python library prerequisites
    14c4171f4f9a pylibfdt: Use package_dir to set the package directory
    89a5062ab231 pylibfdt: Use environment to pass C flags and files
    4e0e0d049757 pylibfdt: Allow pkg-config to be supplied in the environment
    6afd7d9688f5 Correct typo: s/pylibgfdt/pylibfdt/
    756ffc4f52f6 Build pylibfdt as part of the normal build process
    8cb3896358e9 Adjust libfdt.h to work with swig
    b40aa8359aff Mention pylibfdt in the documentation
    12cfb740cc76 Add tests for pylibfdt
    50f250701631 Add an initial Python library for libfdt
    cdbb2b6c7a3a checks: Warn on node name unit-addresses with '0x' or leading 0s
    4c15d5da17cc checks: Add bus checks for simple-bus buses
    33c3985226d3 checks: Add bus checks for PCI buses
    
    Change-Id: I3e6463f0d52e649da508fad9a628d55a715d4ab9
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 2d4c2259930b91fe5e7a2f92db32c03fe640ed60)

diff --git a/scripts/dtc/checks.c b/scripts/dtc/checks.c
index 38f548e582..afabf64337 100644
--- a/scripts/dtc/checks.c
+++ b/scripts/dtc/checks.c
@@ -681,6 +681,229 @@ static void check_ranges_format(struct check *c, struct dt_info *dti,
 }
 WARNING(ranges_format, check_ranges_format, NULL, &addr_size_cells);
 
+static const struct bus_type pci_bus = {
+	.name = "PCI",
+};
+
+static void check_pci_bridge(struct check *c, struct dt_info *dti, struct node *node)
+{
+	struct property *prop;
+	cell_t *cells;
+
+	prop = get_property(node, "device_type");
+	if (!prop || !streq(prop->val.val, "pci"))
+		return;
+
+	node->bus = &pci_bus;
+
+	if (!strneq(node->name, "pci", node->basenamelen) &&
+	    !strneq(node->name, "pcie", node->basenamelen))
+		FAIL(c, dti, "Node %s node name is not \"pci\" or \"pcie\"",
+			     node->fullpath);
+
+	prop = get_property(node, "ranges");
+	if (!prop)
+		FAIL(c, dti, "Node %s missing ranges for PCI bridge (or not a bridge)",
+			     node->fullpath);
+
+	if (node_addr_cells(node) != 3)
+		FAIL(c, dti, "Node %s incorrect #address-cells for PCI bridge",
+			     node->fullpath);
+	if (node_size_cells(node) != 2)
+		FAIL(c, dti, "Node %s incorrect #size-cells for PCI bridge",
+			     node->fullpath);
+
+	prop = get_property(node, "bus-range");
+	if (!prop) {
+		FAIL(c, dti, "Node %s missing bus-range for PCI bridge",
+			     node->fullpath);
+		return;
+	}
+	if (prop->val.len != (sizeof(cell_t) * 2)) {
+		FAIL(c, dti, "Node %s bus-range must be 2 cells",
+			     node->fullpath);
+		return;
+	}
+	cells = (cell_t *)prop->val.val;
+	if (fdt32_to_cpu(cells[0]) > fdt32_to_cpu(cells[1]))
+		FAIL(c, dti, "Node %s bus-range 1st cell must be less than or equal to 2nd cell",
+			     node->fullpath);
+	if (fdt32_to_cpu(cells[1]) > 0xff)
+		FAIL(c, dti, "Node %s bus-range maximum bus number must be less than 256",
+			     node->fullpath);
+}
+WARNING(pci_bridge, check_pci_bridge, NULL,
+	&device_type_is_string, &addr_size_cells);
+
+static void check_pci_device_bus_num(struct check *c, struct dt_info *dti, struct node *node)
+{
+	struct property *prop;
+	unsigned int bus_num, min_bus, max_bus;
+	cell_t *cells;
+
+	if (!node->parent || (node->parent->bus != &pci_bus))
+		return;
+
+	prop = get_property(node, "reg");
+	if (!prop)
+		return;
+
+	cells = (cell_t *)prop->val.val;
+	bus_num = (fdt32_to_cpu(cells[0]) & 0x00ff0000) >> 16;
+
+	prop = get_property(node->parent, "bus-range");
+	if (!prop) {
+		min_bus = max_bus = 0;
+	} else {
+		cells = (cell_t *)prop->val.val;
+		min_bus = fdt32_to_cpu(cells[0]);
+		max_bus = fdt32_to_cpu(cells[0]);
+	}
+	if ((bus_num < min_bus) || (bus_num > max_bus))
+		FAIL(c, dti, "Node %s PCI bus number %d out of range, expected (%d - %d)",
+		     node->fullpath, bus_num, min_bus, max_bus);
+}
+WARNING(pci_device_bus_num, check_pci_device_bus_num, NULL, &reg_format, &pci_bridge);
+
+static void check_pci_device_reg(struct check *c, struct dt_info *dti, struct node *node)
+{
+	struct property *prop;
+	const char *unitname = get_unitname(node);
+	char unit_addr[5];
+	unsigned int dev, func, reg;
+	cell_t *cells;
+
+	if (!node->parent || (node->parent->bus != &pci_bus))
+		return;
+
+	prop = get_property(node, "reg");
+	if (!prop) {
+		FAIL(c, dti, "Node %s missing PCI reg property", node->fullpath);
+		return;
+	}
+
+	cells = (cell_t *)prop->val.val;
+	if (cells[1] || cells[2])
+		FAIL(c, dti, "Node %s PCI reg config space address cells 2 and 3 must be 0",
+			     node->fullpath);
+
+	reg = fdt32_to_cpu(cells[0]);
+	dev = (reg & 0xf800) >> 11;
+	func = (reg & 0x700) >> 8;
+
+	if (reg & 0xff000000)
+		FAIL(c, dti, "Node %s PCI reg address is not configuration space",
+			     node->fullpath);
+	if (reg & 0x000000ff)
+		FAIL(c, dti, "Node %s PCI reg config space address register number must be 0",
+			     node->fullpath);
+
+	if (func == 0) {
+		snprintf(unit_addr, sizeof(unit_addr), "%x", dev);
+		if (streq(unitname, unit_addr))
+			return;
+	}
+
+	snprintf(unit_addr, sizeof(unit_addr), "%x,%x", dev, func);
+	if (streq(unitname, unit_addr))
+		return;
+
+	FAIL(c, dti, "Node %s PCI unit address format error, expected \"%s\"",
+	     node->fullpath, unit_addr);
+}
+WARNING(pci_device_reg, check_pci_device_reg, NULL, &reg_format, &pci_bridge);
+
+static const struct bus_type simple_bus = {
+	.name = "simple-bus",
+};
+
+static bool node_is_compatible(struct node *node, const char *compat)
+{
+	struct property *prop;
+	const char *str, *end;
+
+	prop = get_property(node, "compatible");
+	if (!prop)
+		return false;
+
+	for (str = prop->val.val, end = str + prop->val.len; str < end;
+	     str += strnlen(str, end - str) + 1) {
+		if (strneq(str, compat, end - str))
+			return true;
+	}
+	return false;
+}
+
+static void check_simple_bus_bridge(struct check *c, struct dt_info *dti, struct node *node)
+{
+	if (node_is_compatible(node, "simple-bus"))
+		node->bus = &simple_bus;
+}
+WARNING(simple_bus_bridge, check_simple_bus_bridge, NULL, &addr_size_cells);
+
+static void check_simple_bus_reg(struct check *c, struct dt_info *dti, struct node *node)
+{
+	struct property *prop;
+	const char *unitname = get_unitname(node);
+	char unit_addr[17];
+	unsigned int size;
+	uint64_t reg = 0;
+	cell_t *cells = NULL;
+
+	if (!node->parent || (node->parent->bus != &simple_bus))
+		return;
+
+	prop = get_property(node, "reg");
+	if (prop)
+		cells = (cell_t *)prop->val.val;
+	else {
+		prop = get_property(node, "ranges");
+		if (prop && prop->val.len)
+			/* skip of child address */
+			cells = ((cell_t *)prop->val.val) + node_addr_cells(node);
+	}
+
+	if (!cells) {
+		if (node->parent->parent && !(node->bus == &simple_bus))
+			FAIL(c, dti, "Node %s missing or empty reg/ranges property", node->fullpath);
+		return;
+	}
+
+	size = node_addr_cells(node->parent);
+	while (size--)
+		reg = (reg << 32) | fdt32_to_cpu(*(cells++));
+
+	snprintf(unit_addr, sizeof(unit_addr), "%"PRIx64, reg);
+	if (!streq(unitname, unit_addr))
+		FAIL(c, dti, "Node %s simple-bus unit address format error, expected \"%s\"",
+		     node->fullpath, unit_addr);
+}
+WARNING(simple_bus_reg, check_simple_bus_reg, NULL, &reg_format, &simple_bus_bridge);
+
+static void check_unit_address_format(struct check *c, struct dt_info *dti,
+				      struct node *node)
+{
+	const char *unitname = get_unitname(node);
+
+	if (node->parent && node->parent->bus)
+		return;
+
+	if (!unitname[0])
+		return;
+
+	if (!strncmp(unitname, "0x", 2)) {
+		FAIL(c, dti, "Node %s unit name should not have leading \"0x\"",
+		    node->fullpath);
+		/* skip over 0x for next test */
+		unitname += 2;
+	}
+	if (unitname[0] == '0' && isxdigit(unitname[1]))
+		FAIL(c, dti, "Node %s unit name should not have leading 0s",
+		    node->fullpath);
+}
+WARNING(unit_address_format, check_unit_address_format, NULL,
+	&node_name_format, &pci_bridge, &simple_bus_bridge);
+
 /*
  * Style checks
  */
@@ -752,6 +975,14 @@ static struct check *check_table[] = {
 	&addr_size_cells, &reg_format, &ranges_format,
 
 	&unit_address_vs_reg,
+	&unit_address_format,
+
+	&pci_bridge,
+	&pci_device_reg,
+	&pci_device_bus_num,
+
+	&simple_bus_bridge,
+	&simple_bus_reg,
 
 	&avoid_default_addr_size,
 	&obsolete_chosen_interrupt_controller,
diff --git a/scripts/dtc/dtc.c b/scripts/dtc/dtc.c
index f5eed9d72c..5ed873c72a 100644
--- a/scripts/dtc/dtc.c
+++ b/scripts/dtc/dtc.c
@@ -31,7 +31,7 @@ int reservenum;		/* Number of memory reservation slots */
 int minsize;		/* Minimum blob size */
 int padsize;		/* Additional padding to blob */
 int alignsize;		/* Additional padding to blob accroding to the alignsize */
-int phandle_format = PHANDLE_BOTH;	/* Use linux,phandle or phandle properties */
+int phandle_format = PHANDLE_EPAPR;	/* Use linux,phandle or phandle properties */
 int generate_symbols;	/* enable symbols & fixup support */
 int generate_fixups;		/* suppress generation of fixups on symbol support */
 int auto_label_aliases;		/* auto generate labels -> aliases */
diff --git a/scripts/dtc/dtc.h b/scripts/dtc/dtc.h
index 403b79deab..409db76c94 100644
--- a/scripts/dtc/dtc.h
+++ b/scripts/dtc/dtc.h
@@ -31,6 +31,7 @@
 #include <ctype.h>
 #include <errno.h>
 #include <unistd.h>
+#include <inttypes.h>
 
 #include <libfdt_env.h>
 #include <fdt.h>
@@ -135,6 +136,10 @@ struct label {
 	struct label *next;
 };
 
+struct bus_type {
+	const char *name;
+};
+
 struct property {
 	bool deleted;
 	char *name;
@@ -161,6 +166,7 @@ struct node {
 	int addr_cells, size_cells;
 
 	struct label *labels;
+	const struct bus_type *bus;
 };
 
 #define for_each_label_withdel(l0, l) \
diff --git a/scripts/dtc/libfdt/fdt_empty_tree.c b/scripts/dtc/libfdt/fdt_empty_tree.c
index f72d13b1d1..f2ae9b77c2 100644
--- a/scripts/dtc/libfdt/fdt_empty_tree.c
+++ b/scripts/dtc/libfdt/fdt_empty_tree.c
@@ -81,4 +81,3 @@ int fdt_create_empty_tree(void *buf, int bufsize)
 
 	return fdt_open_into(buf, buf, bufsize);
 }
-
diff --git a/scripts/dtc/libfdt/fdt_ro.c b/scripts/dtc/libfdt/fdt_ro.c
index 3d00d2eee0..08de2cce67 100644
--- a/scripts/dtc/libfdt/fdt_ro.c
+++ b/scripts/dtc/libfdt/fdt_ro.c
@@ -60,7 +60,7 @@ static int _fdt_nodename_eq(const void *fdt, int offset,
 {
 	const char *p = fdt_offset_ptr(fdt, offset + FDT_TAGSIZE, len+1);
 
-	if (! p)
+	if (!p)
 		/* short match */
 		return 0;
 
@@ -327,7 +327,7 @@ const void *fdt_getprop_namelen(const void *fdt, int nodeoffset,
 	const struct fdt_property *prop;
 
 	prop = fdt_get_property_namelen(fdt, nodeoffset, name, namelen, lenp);
-	if (! prop)
+	if (!prop)
 		return NULL;
 
 	return prop->data;
diff --git a/scripts/dtc/libfdt/fdt_rw.c b/scripts/dtc/libfdt/fdt_rw.c
index 3fd5847377..5c3a2bb0bc 100644
--- a/scripts/dtc/libfdt/fdt_rw.c
+++ b/scripts/dtc/libfdt/fdt_rw.c
@@ -207,7 +207,7 @@ static int _fdt_resize_property(void *fdt, int nodeoffset, const char *name,
 	int err;
 
 	*prop = fdt_get_property_w(fdt, nodeoffset, name, &oldlen);
-	if (! (*prop))
+	if (!*prop)
 		return oldlen;
 
 	if ((err = _fdt_splice_struct(fdt, (*prop)->data, FDT_TAGALIGN(oldlen),
@@ -269,8 +269,8 @@ int fdt_set_name(void *fdt, int nodeoffset, const char *name)
 	return 0;
 }
 
-int fdt_setprop(void *fdt, int nodeoffset, const char *name,
-		const void *val, int len)
+int fdt_setprop_placeholder(void *fdt, int nodeoffset, const char *name,
+			    int len, void **prop_data)
 {
 	struct fdt_property *prop;
 	int err;
@@ -283,8 +283,22 @@ int fdt_setprop(void *fdt, int nodeoffset, const char *name,
 	if (err)
 		return err;
 
+	*prop_data = prop->data;
+	return 0;
+}
+
+int fdt_setprop(void *fdt, int nodeoffset, const char *name,
+		const void *val, int len)
+{
+	void *prop_data;
+	int err;
+
+	err = fdt_setprop_placeholder(fdt, nodeoffset, name, len, &prop_data);
+	if (err)
+		return err;
+
 	if (len)
-		memcpy(prop->data, val, len);
+		memcpy(prop_data, val, len);
 	return 0;
 }
 
@@ -323,7 +337,7 @@ int fdt_delprop(void *fdt, int nodeoffset, const char *name)
 	FDT_RW_CHECK_HEADER(fdt);
 
 	prop = fdt_get_property_w(fdt, nodeoffset, name, &len);
-	if (! prop)
+	if (!prop)
 		return len;
 
 	proplen = sizeof(*prop) + FDT_TAGALIGN(len);
diff --git a/scripts/dtc/libfdt/fdt_sw.c b/scripts/dtc/libfdt/fdt_sw.c
index 6a804859fd..2bd15e7aef 100644
--- a/scripts/dtc/libfdt/fdt_sw.c
+++ b/scripts/dtc/libfdt/fdt_sw.c
@@ -220,7 +220,7 @@ static int _fdt_find_add_string(void *fdt, const char *s)
 	return offset;
 }
 
-int fdt_property(void *fdt, const char *name, const void *val, int len)
+int fdt_property_placeholder(void *fdt, const char *name, int len, void **valp)
 {
 	struct fdt_property *prop;
 	int nameoff;
@@ -238,7 +238,19 @@ int fdt_property(void *fdt, const char *name, const void *val, int len)
 	prop->tag = cpu_to_fdt32(FDT_PROP);
 	prop->nameoff = cpu_to_fdt32(nameoff);
 	prop->len = cpu_to_fdt32(len);
-	memcpy(prop->data, val, len);
+	*valp = prop->data;
+	return 0;
+}
+
+int fdt_property(void *fdt, const char *name, const void *val, int len)
+{
+	void *ptr;
+	int ret;
+
+	ret = fdt_property_placeholder(fdt, name, len, &ptr);
+	if (ret)
+		return ret;
+	memcpy(ptr, val, len);
 	return 0;
 }
 
diff --git a/scripts/dtc/libfdt/fdt_wip.c b/scripts/dtc/libfdt/fdt_wip.c
index 6aaab39992..5e85919862 100644
--- a/scripts/dtc/libfdt/fdt_wip.c
+++ b/scripts/dtc/libfdt/fdt_wip.c
@@ -82,7 +82,7 @@ int fdt_setprop_inplace(void *fdt, int nodeoffset, const char *name,
 	int proplen;
 
 	propval = fdt_getprop(fdt, nodeoffset, name, &proplen);
-	if (! propval)
+	if (!propval)
 		return proplen;
 
 	if (proplen != len)
@@ -107,7 +107,7 @@ int fdt_nop_property(void *fdt, int nodeoffset, const char *name)
 	int len;
 
 	prop = fdt_get_property_w(fdt, nodeoffset, name, &len);
-	if (! prop)
+	if (!prop)
 		return len;
 
 	_fdt_nop_region(prop, len + sizeof(*prop));
diff --git a/scripts/dtc/libfdt/libfdt.h b/scripts/dtc/libfdt/libfdt.h
index 9e71bb9e03..7f83023ee1 100644
--- a/scripts/dtc/libfdt/libfdt.h
+++ b/scripts/dtc/libfdt/libfdt.h
@@ -143,7 +143,9 @@
 /* Low-level functions (you probably don't need these)                */
 /**********************************************************************/
 
+#ifndef SWIG /* This function is not useful in Python */
 const void *fdt_offset_ptr(const void *fdt, int offset, unsigned int checklen);
+#endif
 static inline void *fdt_offset_ptr_w(void *fdt, int offset, int checklen)
 {
 	return (void *)(uintptr_t)fdt_offset_ptr(fdt, offset, checklen);
@@ -210,7 +212,6 @@ int fdt_next_subnode(const void *fdt, int offset);
 /**********************************************************************/
 /* General functions                                                  */
 /**********************************************************************/
-
 #define fdt_get_header(fdt, field) \
 	(fdt32_to_cpu(((const struct fdt_header *)(fdt))->field))
 #define fdt_magic(fdt)			(fdt_get_header(fdt, magic))
@@ -354,8 +355,10 @@ int fdt_get_mem_rsv(const void *fdt, int n, uint64_t *address, uint64_t *size);
  * useful for finding subnodes based on a portion of a larger string,
  * such as a full path.
  */
+#ifndef SWIG /* Not available in Python */
 int fdt_subnode_offset_namelen(const void *fdt, int parentoffset,
 			       const char *name, int namelen);
+#endif
 /**
  * fdt_subnode_offset - find a subnode of a given node
  * @fdt: pointer to the device tree blob
@@ -391,7 +394,9 @@ int fdt_subnode_offset(const void *fdt, int parentoffset, const char *name);
  * Identical to fdt_path_offset(), but only consider the first namelen
  * characters of path as the path name.
  */
+#ifndef SWIG /* Not available in Python */
 int fdt_path_offset_namelen(const void *fdt, const char *path, int namelen);
+#endif
 
 /**
  * fdt_path_offset - find a tree node by its full path
@@ -550,10 +555,12 @@ const struct fdt_property *fdt_get_property_by_offset(const void *fdt,
  * Identical to fdt_get_property(), but only examine the first namelen
  * characters of name for matching the property name.
  */
+#ifndef SWIG /* Not available in Python */
 const struct fdt_property *fdt_get_property_namelen(const void *fdt,
 						    int nodeoffset,
 						    const char *name,
 						    int namelen, int *lenp);
+#endif
 
 /**
  * fdt_get_property - find a given property in a given node
@@ -624,8 +631,10 @@ static inline struct fdt_property *fdt_get_property_w(void *fdt, int nodeoffset,
  *		-FDT_ERR_BADSTRUCTURE,
  *		-FDT_ERR_TRUNCATED, standard meanings
  */
+#ifndef SWIG /* This function is not useful in Python */
 const void *fdt_getprop_by_offset(const void *fdt, int offset,
 				  const char **namep, int *lenp);
+#endif
 
 /**
  * fdt_getprop_namelen - get property value based on substring
@@ -638,6 +647,7 @@ const void *fdt_getprop_by_offset(const void *fdt, int offset,
  * Identical to fdt_getprop(), but only examine the first namelen
  * characters of name for matching the property name.
  */
+#ifndef SWIG /* Not available in Python */
 const void *fdt_getprop_namelen(const void *fdt, int nodeoffset,
 				const char *name, int namelen, int *lenp);
 static inline void *fdt_getprop_namelen_w(void *fdt, int nodeoffset,
@@ -647,6 +657,7 @@ static inline void *fdt_getprop_namelen_w(void *fdt, int nodeoffset,
 	return (void *)(uintptr_t)fdt_getprop_namelen(fdt, nodeoffset, name,
 						      namelen, lenp);
 }
+#endif
 
 /**
  * fdt_getprop - retrieve the value of a given property
@@ -707,8 +718,10 @@ uint32_t fdt_get_phandle(const void *fdt, int nodeoffset);
  * Identical to fdt_get_alias(), but only examine the first namelen
  * characters of name for matching the alias name.
  */
+#ifndef SWIG /* Not available in Python */
 const char *fdt_get_alias_namelen(const void *fdt,
 				  const char *name, int namelen);
+#endif
 
 /**
  * fdt_get_alias - retrieve the path referenced by a given alias
@@ -1106,10 +1119,12 @@ int fdt_size_cells(const void *fdt, int nodeoffset);
  * of the name. It is useful when you want to manipulate only one value of
  * an array and you have a string that doesn't end with \0.
  */
+#ifndef SWIG /* Not available in Python */
 int fdt_setprop_inplace_namelen_partial(void *fdt, int nodeoffset,
 					const char *name, int namelen,
 					uint32_t idx, const void *val,
 					int len);
+#endif
 
 /**
  * fdt_setprop_inplace - change a property's value, but not its size
@@ -1139,8 +1154,10 @@ int fdt_setprop_inplace_namelen_partial(void *fdt, int nodeoffset,
  *	-FDT_ERR_BADSTRUCTURE,
  *	-FDT_ERR_TRUNCATED, standard meanings
  */
+#ifndef SWIG /* Not available in Python */
 int fdt_setprop_inplace(void *fdt, int nodeoffset, const char *name,
 			const void *val, int len);
+#endif
 
 /**
  * fdt_setprop_inplace_u32 - change the value of a 32-bit integer property
@@ -1297,6 +1314,22 @@ static inline int fdt_property_cell(void *fdt, const char *name, uint32_t val)
 {
 	return fdt_property_u32(fdt, name, val);
 }
+
+/**
+ * fdt_property_placeholder - add a new property and return a ptr to its value
+ *
+ * @fdt: pointer to the device tree blob
+ * @name: name of property to add
+ * @len: length of property value in bytes
+ * @valp: returns a pointer to where where the value should be placed
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_NOSPACE, standard meanings
+ */
+int fdt_property_placeholder(void *fdt, const char *name, int len, void **valp);
+
 #define fdt_property_string(fdt, name, str) \
 	fdt_property(fdt, name, str, strlen(str)+1)
 int fdt_end_node(void *fdt);
@@ -1415,6 +1448,37 @@ int fdt_set_name(void *fdt, int nodeoffset, const char *name);
 int fdt_setprop(void *fdt, int nodeoffset, const char *name,
 		const void *val, int len);
 
+/**
+ * fdt_setprop _placeholder - allocate space for a property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ * @len: length of the property value
+ * @prop_data: return pointer to property data
+ *
+ * fdt_setprop_placeholer() allocates the named property in the given node.
+ * If the property exists it is resized. In either case a pointer to the
+ * property data is returned.
+ *
+ * This function may insert or delete data from the blob, and will
+ * therefore change the offsets of some existing nodes.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
+ *		contain the new property value
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+int fdt_setprop_placeholder(void *fdt, int nodeoffset, const char *name,
+			    int len, void **prop_data);
+
 /**
  * fdt_setprop_u32 - set a property to a 32-bit integer
  * @fdt: pointer to the device tree blob
@@ -1734,8 +1798,10 @@ int fdt_delprop(void *fdt, int nodeoffset, const char *name);
  * creating subnodes based on a portion of a larger string, such as a
  * full path.
  */
+#ifndef SWIG /* Not available in Python */
 int fdt_add_subnode_namelen(void *fdt, int parentoffset,
 			    const char *name, int namelen);
+#endif
 
 /**
  * fdt_add_subnode - creates a new node
diff --git a/scripts/dtc/livetree.c b/scripts/dtc/livetree.c
index 3673de07e4..aecd27875f 100644
--- a/scripts/dtc/livetree.c
+++ b/scripts/dtc/livetree.c
@@ -478,7 +478,8 @@ struct node *get_node_by_path(struct node *tree, const char *path)
 	p = strchr(path, '/');
 
 	for_each_child(tree, child) {
-		if (p && strneq(path, child->name, p-path))
+		if (p && (strlen(child->name) == p-path) &&
+				strneq(path, child->name, p-path))
 			return get_node_by_path(child, p+1);
 		else if (!p && streq(path, child->name))
 			return child;
diff --git a/scripts/dtc/version_gen.h b/scripts/dtc/version_gen.h
index 859564e8b4..b5ed715ecc 100644
--- a/scripts/dtc/version_gen.h
+++ b/scripts/dtc/version_gen.h
@@ -1 +1 @@
-#define DTC_VERSION "DTC 1.4.4"
+#define DTC_VERSION "DTC 1.4.4-gfe50bd1e"

commit e23ffda262942d719738f47025958a7fcb5a9fb6
Author: Tom Rini <trini@konsulko.com>
Date:   Sat Sep 23 17:30:53 2017 -0400

    UPSTREAM: scripts/dtc: Update to upstream version v1.4.4
    
    This adds the following commits from upstream:
    
    558cd81bdd43 dtc: Bump version to v1.4.4
    c17a811c62eb fdtput: Remove star from value_len documentation
    194d5caaefcb fdtget: Use @return to document the return value
    d922ecdd017b tests: Make realloc_fdt() really allocate *fdt
    921cc17fec29 libfdt: overlay: Check the value of the right variable
    9ffdf60bf463 dtc: Simplify asm_emit_string() implementation
    881012e44386 libfdt: Change names of sparse helper macros
    bad5b28049e5 Fix assorted sparse warnings
    672ac09ea04d Clean up gcc attributes
    49300f2ade6a dtc: Don't abuse struct fdt_reserve_entry
    
    Change-Id: Ice2278730d9717ed47e48d656ff4028ffa23a396
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit d6fc90ced42e9fb77185cedfe45d0a2c7ac78508)

diff --git a/scripts/dtc/checks.c b/scripts/dtc/checks.c
index 0e8b978c36..38f548e582 100644
--- a/scripts/dtc/checks.c
+++ b/scripts/dtc/checks.c
@@ -72,12 +72,8 @@ struct check {
 #define CHECK(_nm, _fn, _d, ...) \
 	CHECK_ENTRY(_nm, _fn, _d, false, false, __VA_ARGS__)
 
-#ifdef __GNUC__
-static inline void check_msg(struct check *c, struct dt_info *dti,
-			     const char *fmt, ...) __attribute__((format (printf, 3, 4)));
-#endif
-static inline void check_msg(struct check *c, struct dt_info *dti,
-			     const char *fmt, ...)
+static inline void  PRINTF(3, 4) check_msg(struct check *c, struct dt_info *dti,
+					   const char *fmt, ...)
 {
 	va_list ap;
 	va_start(ap, fmt);
@@ -538,13 +534,13 @@ static void fixup_phandle_references(struct check *c, struct dt_info *dti,
 					FAIL(c, dti, "Reference to non-existent node or "
 							"label \"%s\"\n", m->ref);
 				else /* mark the entry as unresolved */
-					*((cell_t *)(prop->val.val + m->offset)) =
+					*((fdt32_t *)(prop->val.val + m->offset)) =
 						cpu_to_fdt32(0xffffffff);
 				continue;
 			}
 
 			phandle = get_node_phandle(dt, refnode);
-			*((cell_t *)(prop->val.val + m->offset)) = cpu_to_fdt32(phandle);
+			*((fdt32_t *)(prop->val.val + m->offset)) = cpu_to_fdt32(phandle);
 		}
 	}
 }
diff --git a/scripts/dtc/data.c b/scripts/dtc/data.c
index 8cae237468..aa37a16c88 100644
--- a/scripts/dtc/data.c
+++ b/scripts/dtc/data.c
@@ -171,9 +171,9 @@ struct data data_merge(struct data d1, struct data d2)
 struct data data_append_integer(struct data d, uint64_t value, int bits)
 {
 	uint8_t value_8;
-	uint16_t value_16;
-	uint32_t value_32;
-	uint64_t value_64;
+	fdt16_t value_16;
+	fdt32_t value_32;
+	fdt64_t value_64;
 
 	switch (bits) {
 	case 8:
@@ -197,14 +197,14 @@ struct data data_append_integer(struct data d, uint64_t value, int bits)
 	}
 }
 
-struct data data_append_re(struct data d, const struct fdt_reserve_entry *re)
+struct data data_append_re(struct data d, uint64_t address, uint64_t size)
 {
-	struct fdt_reserve_entry bere;
+	struct fdt_reserve_entry re;
 
-	bere.address = cpu_to_fdt64(re->address);
-	bere.size = cpu_to_fdt64(re->size);
+	re.address = cpu_to_fdt64(address);
+	re.size = cpu_to_fdt64(size);
 
-	return data_append_data(d, &bere, sizeof(bere));
+	return data_append_data(d, &re, sizeof(re));
 }
 
 struct data data_append_cell(struct data d, cell_t word)
diff --git a/scripts/dtc/dtc-lexer.l b/scripts/dtc/dtc-lexer.l
index 52bed7b749..fd825ebba6 100644
--- a/scripts/dtc/dtc-lexer.l
+++ b/scripts/dtc/dtc-lexer.l
@@ -62,12 +62,7 @@ static int dts_version = 1;
 
 static void push_input_file(const char *filename);
 static bool pop_input_file(void);
-#ifdef __GNUC__
-static void lexical_error(const char *fmt, ...)
-	__attribute__((format (printf, 1, 2)));
-#else
-static void lexical_error(const char *fmt, ...);
-#endif
+static void PRINTF(1, 2) lexical_error(const char *fmt, ...);
 
 %}
 
diff --git a/scripts/dtc/dtc-lexer.lex.c_shipped b/scripts/dtc/dtc-lexer.lex.c_shipped
index d77fdfe590..3934d8624d 100644
--- a/scripts/dtc/dtc-lexer.lex.c_shipped
+++ b/scripts/dtc/dtc-lexer.lex.c_shipped
@@ -663,14 +663,9 @@ static int dts_version = 1;
 
 static void push_input_file(const char *filename);
 static bool pop_input_file(void);
-#ifdef __GNUC__
-static void lexical_error(const char *fmt, ...)
-	__attribute__((format (printf, 1, 2)));
-#else
-static void lexical_error(const char *fmt, ...);
-#endif
+static void PRINTF(1, 2) lexical_error(const char *fmt, ...);
 
-#line 674 "dtc-lexer.lex.c"
+#line 669 "dtc-lexer.lex.c"
 
 #define INITIAL 0
 #define BYTESTRING 1
@@ -861,9 +856,9 @@ YY_DECL
 	register char *yy_cp, *yy_bp;
 	register int yy_act;
     
-#line 74 "dtc-lexer.l"
+#line 69 "dtc-lexer.l"
 
-#line 867 "dtc-lexer.lex.c"
+#line 862 "dtc-lexer.lex.c"
 
 	if ( !(yy_init) )
 		{
@@ -946,7 +941,7 @@ do_action:	/* This label is used only to access EOF actions. */
 case 1:
 /* rule 1 can match eol */
 YY_RULE_SETUP
-#line 75 "dtc-lexer.l"
+#line 70 "dtc-lexer.l"
 {
 			char *name = strchr(yytext, '\"') + 1;
 			yytext[yyleng-1] = '\0';
@@ -956,7 +951,7 @@ YY_RULE_SETUP
 case 2:
 /* rule 2 can match eol */
 YY_RULE_SETUP
-#line 81 "dtc-lexer.l"
+#line 76 "dtc-lexer.l"
 {
 			char *line, *fnstart, *fnend;
 			struct data fn;
@@ -990,7 +985,7 @@ case YY_STATE_EOF(INITIAL):
 case YY_STATE_EOF(BYTESTRING):
 case YY_STATE_EOF(PROPNODENAME):
 case YY_STATE_EOF(V1):
-#line 110 "dtc-lexer.l"
+#line 105 "dtc-lexer.l"
 {
 			if (!pop_input_file()) {
 				yyterminate();
@@ -1000,7 +995,7 @@ case YY_STATE_EOF(V1):
 case 3:
 /* rule 3 can match eol */
 YY_RULE_SETUP
-#line 116 "dtc-lexer.l"
+#line 111 "dtc-lexer.l"
 {
 			DPRINT("String: %s\n", yytext);
 			yylval.data = data_copy_escape_string(yytext+1,
@@ -1010,7 +1005,7 @@ YY_RULE_SETUP
 	YY_BREAK
 case 4:
 YY_RULE_SETUP
-#line 123 "dtc-lexer.l"
+#line 118 "dtc-lexer.l"
 {
 			DPRINT("Keyword: /dts-v1/\n");
 			dts_version = 1;
@@ -1020,7 +1015,7 @@ YY_RULE_SETUP
 	YY_BREAK
 case 5:
 YY_RULE_SETUP
-#line 130 "dtc-lexer.l"
+#line 125 "dtc-lexer.l"
 {
 			DPRINT("Keyword: /plugin/\n");
 			return DT_PLUGIN;
@@ -1028,7 +1023,7 @@ YY_RULE_SETUP
 	YY_BREAK
 case 6:
 YY_RULE_SETUP
-#line 135 "dtc-lexer.l"
+#line 130 "dtc-lexer.l"
 {
 			DPRINT("Keyword: /memreserve/\n");
 			BEGIN_DEFAULT();
@@ -1037,7 +1032,7 @@ YY_RULE_SETUP
 	YY_BREAK
 case 7:
 YY_RULE_SETUP
-#line 141 "dtc-lexer.l"
+#line 136 "dtc-lexer.l"
 {
 			DPRINT("Keyword: /bits/\n");
 			BEGIN_DEFAULT();
@@ -1046,7 +1041,7 @@ YY_RULE_SETUP
 	YY_BREAK
 case 8:
 YY_RULE_SETUP
-#line 147 "dtc-lexer.l"
+#line 142 "dtc-lexer.l"
 {
 			DPRINT("Keyword: /delete-property/\n");
 			DPRINT("<PROPNODENAME>\n");
@@ -1056,7 +1051,7 @@ YY_RULE_SETUP
 	YY_BREAK
 case 9:
 YY_RULE_SETUP
-#line 154 "dtc-lexer.l"
+#line 149 "dtc-lexer.l"
 {
 			DPRINT("Keyword: /delete-node/\n");
 			DPRINT("<PROPNODENAME>\n");
@@ -1066,7 +1061,7 @@ YY_RULE_SETUP
 	YY_BREAK
 case 10:
 YY_RULE_SETUP
-#line 161 "dtc-lexer.l"
+#line 156 "dtc-lexer.l"
 {
 			DPRINT("Label: %s\n", yytext);
 			yylval.labelref = xstrdup(yytext);
@@ -1076,7 +1071,7 @@ YY_RULE_SETUP
 	YY_BREAK
 case 11:
 YY_RULE_SETUP
-#line 168 "dtc-lexer.l"
+#line 163 "dtc-lexer.l"
 {
 			char *e;
 			DPRINT("Integer Literal: '%s'\n", yytext);
@@ -1102,7 +1097,7 @@ YY_RULE_SETUP
 case 12:
 /* rule 12 can match eol */
 YY_RULE_SETUP
-#line 190 "dtc-lexer.l"
+#line 185 "dtc-lexer.l"
 {
 			struct data d;
 			DPRINT("Character literal: %s\n", yytext);
@@ -1126,7 +1121,7 @@ YY_RULE_SETUP
 	YY_BREAK
 case 13:
 YY_RULE_SETUP
-#line 211 "dtc-lexer.l"
+#line 206 "dtc-lexer.l"
 {	/* label reference */
 			DPRINT("Ref: %s\n", yytext+1);
 			yylval.labelref = xstrdup(yytext+1);
@@ -1135,7 +1130,7 @@ YY_RULE_SETUP
 	YY_BREAK
 case 14:
 YY_RULE_SETUP
-#line 217 "dtc-lexer.l"
+#line 212 "dtc-lexer.l"
 {	/* new-style path reference */
 			yytext[yyleng-1] = '\0';
 			DPRINT("Ref: %s\n", yytext+2);
@@ -1145,7 +1140,7 @@ YY_RULE_SETUP
 	YY_BREAK
 case 15:
 YY_RULE_SETUP
-#line 224 "dtc-lexer.l"
+#line 219 "dtc-lexer.l"
 {
 			yylval.byte = strtol(yytext, NULL, 16);
 			DPRINT("Byte: %02x\n", (int)yylval.byte);
@@ -1154,7 +1149,7 @@ YY_RULE_SETUP
 	YY_BREAK
 case 16:
 YY_RULE_SETUP
-#line 230 "dtc-lexer.l"
+#line 225 "dtc-lexer.l"
 {
 			DPRINT("/BYTESTRING\n");
 			BEGIN_DEFAULT();
@@ -1163,7 +1158,7 @@ YY_RULE_SETUP
 	YY_BREAK
 case 17:
 YY_RULE_SETUP
-#line 236 "dtc-lexer.l"
+#line 231 "dtc-lexer.l"
 {
 			DPRINT("PropNodeName: %s\n", yytext);
 			yylval.propnodename = xstrdup((yytext[0] == '\\') ?
@@ -1174,7 +1169,7 @@ YY_RULE_SETUP
 	YY_BREAK
 case 18:
 YY_RULE_SETUP
-#line 244 "dtc-lexer.l"
+#line 239 "dtc-lexer.l"
 {
 			DPRINT("Binary Include\n");
 			return DT_INCBIN;
@@ -1183,64 +1178,64 @@ YY_RULE_SETUP
 case 19:
 /* rule 19 can match eol */
 YY_RULE_SETUP
-#line 249 "dtc-lexer.l"
+#line 244 "dtc-lexer.l"
 /* eat whitespace */
 	YY_BREAK
 case 20:
 /* rule 20 can match eol */
 YY_RULE_SETUP
-#line 250 "dtc-lexer.l"
+#line 245 "dtc-lexer.l"
 /* eat C-style comments */
 	YY_BREAK
 case 21:
 /* rule 21 can match eol */
 YY_RULE_SETUP
-#line 251 "dtc-lexer.l"
+#line 246 "dtc-lexer.l"
 /* eat C++-style comments */
 	YY_BREAK
 case 22:
 YY_RULE_SETUP
-#line 253 "dtc-lexer.l"
+#line 248 "dtc-lexer.l"
 { return DT_LSHIFT; };
 	YY_BREAK
 case 23:
 YY_RULE_SETUP
-#line 254 "dtc-lexer.l"
+#line 249 "dtc-lexer.l"
 { return DT_RSHIFT; };
 	YY_BREAK
 case 24:
 YY_RULE_SETUP
-#line 255 "dtc-lexer.l"
+#line 250 "dtc-lexer.l"
 { return DT_LE; };
 	YY_BREAK
 case 25:
 YY_RULE_SETUP
-#line 256 "dtc-lexer.l"
+#line 251 "dtc-lexer.l"
 { return DT_GE; };
 	YY_BREAK
 case 26:
 YY_RULE_SETUP
-#line 257 "dtc-lexer.l"
+#line 252 "dtc-lexer.l"
 { return DT_EQ; };
 	YY_BREAK
 case 27:
 YY_RULE_SETUP
-#line 258 "dtc-lexer.l"
+#line 253 "dtc-lexer.l"
 { return DT_NE; };
 	YY_BREAK
 case 28:
 YY_RULE_SETUP
-#line 259 "dtc-lexer.l"
+#line 254 "dtc-lexer.l"
 { return DT_AND; };
 	YY_BREAK
 case 29:
 YY_RULE_SETUP
-#line 260 "dtc-lexer.l"
+#line 255 "dtc-lexer.l"
 { return DT_OR; };
 	YY_BREAK
 case 30:
 YY_RULE_SETUP
-#line 262 "dtc-lexer.l"
+#line 257 "dtc-lexer.l"
 {
 			DPRINT("Char: %c (\\x%02x)\n", yytext[0],
 				(unsigned)yytext[0]);
@@ -1258,10 +1253,10 @@ YY_RULE_SETUP
 	YY_BREAK
 case 31:
 YY_RULE_SETUP
-#line 277 "dtc-lexer.l"
+#line 272 "dtc-lexer.l"
 ECHO;
 	YY_BREAK
-#line 1265 "dtc-lexer.lex.c"
+#line 1260 "dtc-lexer.lex.c"
 
 	case YY_END_OF_BUFFER:
 		{
@@ -2220,7 +2215,7 @@ void yyfree (void * ptr )
 
 #define YYTABLES_NAME "yytables"
 
-#line 277 "dtc-lexer.l"
+#line 272 "dtc-lexer.l"
 
 
 
diff --git a/scripts/dtc/dtc.c b/scripts/dtc/dtc.c
index bb1e52b318..f5eed9d72c 100644
--- a/scripts/dtc/dtc.c
+++ b/scripts/dtc/dtc.c
@@ -138,7 +138,7 @@ static const char *guess_type_by_name(const char *fname, const char *fallback)
 static const char *guess_input_format(const char *fname, const char *fallback)
 {
 	struct stat statbuf;
-	uint32_t magic;
+	fdt32_t magic;
 	FILE *f;
 
 	if (stat(fname, &statbuf) != 0)
@@ -159,8 +159,7 @@ static const char *guess_input_format(const char *fname, const char *fallback)
 	}
 	fclose(f);
 
-	magic = fdt32_to_cpu(magic);
-	if (magic == FDT_MAGIC)
+	if (fdt32_to_cpu(magic) == FDT_MAGIC)
 		return "dtb";
 
 	return guess_type_by_name(fname, fallback);
diff --git a/scripts/dtc/dtc.h b/scripts/dtc/dtc.h
index 1ac2a1e3a4..403b79deab 100644
--- a/scripts/dtc/dtc.h
+++ b/scripts/dtc/dtc.h
@@ -43,7 +43,6 @@
 #define debug(...)
 #endif
 
-
 #define DEFAULT_FDT_VERSION	17
 
 /*
@@ -114,7 +113,7 @@ struct data data_insert_at_marker(struct data d, struct marker *m,
 struct data data_merge(struct data d1, struct data d2);
 struct data data_append_cell(struct data d, cell_t word);
 struct data data_append_integer(struct data d, uint64_t word, int bits);
-struct data data_append_re(struct data d, const struct fdt_reserve_entry *re);
+struct data data_append_re(struct data d, uint64_t address, uint64_t size);
 struct data data_append_addr(struct data d, uint64_t addr);
 struct data data_append_byte(struct data d, uint8_t byte);
 struct data data_append_zeroes(struct data d, int len);
@@ -227,7 +226,7 @@ uint32_t guess_boot_cpuid(struct node *tree);
 /* Boot info (tree plus memreserve information */
 
 struct reserve_info {
-	struct fdt_reserve_entry re;
+	uint64_t address, size;
 
 	struct reserve_info *next;
 
diff --git a/scripts/dtc/flattree.c b/scripts/dtc/flattree.c
index ebac548b3f..fcf71541d8 100644
--- a/scripts/dtc/flattree.c
+++ b/scripts/dtc/flattree.c
@@ -49,7 +49,7 @@ static struct version_info {
 
 struct emitter {
 	void (*cell)(void *, cell_t);
-	void (*string)(void *, char *, int);
+	void (*string)(void *, const char *, int);
 	void (*align)(void *, int);
 	void (*data)(void *, struct data);
 	void (*beginnode)(void *, struct label *labels);
@@ -64,7 +64,7 @@ static void bin_emit_cell(void *e, cell_t val)
 	*dtbuf = data_append_cell(*dtbuf, val);
 }
 
-static void bin_emit_string(void *e, char *str, int len)
+static void bin_emit_string(void *e, const char *str, int len)
 {
 	struct data *dtbuf = e;
 
@@ -144,22 +144,14 @@ static void asm_emit_cell(void *e, cell_t val)
 		(val >> 8) & 0xff, val & 0xff);
 }
 
-static void asm_emit_string(void *e, char *str, int len)
+static void asm_emit_string(void *e, const char *str, int len)
 {
 	FILE *f = e;
-	char c = 0;
 
-	if (len != 0) {
-		/* XXX: ewww */
-		c = str[len];
-		str[len] = '\0';
-	}
-
-	fprintf(f, "\t.string\t\"%s\"\n", str);
-
-	if (len != 0) {
-		str[len] = c;
-	}
+	if (len != 0)
+		fprintf(f, "\t.string\t\"%.*s\"\n", len, str);
+	else
+		fprintf(f, "\t.string\t\"%s\"\n", str);
 }
 
 static void asm_emit_align(void *e, int a)
@@ -179,7 +171,7 @@ static void asm_emit_data(void *e, struct data d)
 		emit_offset_label(f, m->ref, m->offset);
 
 	while ((d.len - off) >= sizeof(uint32_t)) {
-		asm_emit_cell(e, fdt32_to_cpu(*((uint32_t *)(d.val+off))));
+		asm_emit_cell(e, fdt32_to_cpu(*((fdt32_t *)(d.val+off))));
 		off += sizeof(uint32_t);
 	}
 
@@ -318,17 +310,16 @@ static struct data flatten_reserve_list(struct reserve_info *reservelist,
 {
 	struct reserve_info *re;
 	struct data d = empty_data;
-	static struct fdt_reserve_entry null_re = {0,0};
 	int    j;
 
 	for (re = reservelist; re; re = re->next) {
-		d = data_append_re(d, &re->re);
+		d = data_append_re(d, re->address, re->size);
 	}
 	/*
 	 * Add additional reserved slots if the user asked for them.
 	 */
 	for (j = 0; j < reservenum; j++) {
-		d = data_append_re(d, &null_re);
+		d = data_append_re(d, 0, 0);
 	}
 
 	return d;
@@ -544,11 +535,11 @@ void dt_to_asm(FILE *f, struct dt_info *dti, int version)
 			fprintf(f, "\t.globl\t%s\n", l->label);
 			fprintf(f, "%s:\n", l->label);
 		}
-		ASM_EMIT_BELONG(f, "0x%08x", (unsigned int)(re->re.address >> 32));
+		ASM_EMIT_BELONG(f, "0x%08x", (unsigned int)(re->address >> 32));
 		ASM_EMIT_BELONG(f, "0x%08x",
-				(unsigned int)(re->re.address & 0xffffffff));
-		ASM_EMIT_BELONG(f, "0x%08x", (unsigned int)(re->re.size >> 32));
-		ASM_EMIT_BELONG(f, "0x%08x", (unsigned int)(re->re.size & 0xffffffff));
+				(unsigned int)(re->address & 0xffffffff));
+		ASM_EMIT_BELONG(f, "0x%08x", (unsigned int)(re->size >> 32));
+		ASM_EMIT_BELONG(f, "0x%08x", (unsigned int)(re->size & 0xffffffff));
 	}
 	for (i = 0; i < reservenum; i++) {
 		fprintf(f, "\t.long\t0, 0\n\t.long\t0, 0\n");
@@ -609,7 +600,7 @@ static void flat_read_chunk(struct inbuf *inb, void *p, int len)
 
 static uint32_t flat_read_word(struct inbuf *inb)
 {
-	uint32_t val;
+	fdt32_t val;
 
 	assert(((inb->ptr - inb->base) % sizeof(val)) == 0);
 
@@ -718,13 +709,15 @@ static struct reserve_info *flat_read_mem_reserve(struct inbuf *inb)
 	 * First pass, count entries.
 	 */
 	while (1) {
+		uint64_t address, size;
+
 		flat_read_chunk(inb, &re, sizeof(re));
-		re.address  = fdt64_to_cpu(re.address);
-		re.size = fdt64_to_cpu(re.size);
-		if (re.size == 0)
+		address  = fdt64_to_cpu(re.address);
+		size = fdt64_to_cpu(re.size);
+		if (size == 0)
 			break;
 
-		new = build_reserve_entry(re.address, re.size);
+		new = build_reserve_entry(address, size);
 		reservelist = add_reserve_entry(reservelist, new);
 	}
 
@@ -817,6 +810,7 @@ static struct node *unflatten_tree(struct inbuf *dtbuf,
 struct dt_info *dt_from_blob(const char *fname)
 {
 	FILE *f;
+	fdt32_t magic_buf, totalsize_buf;
 	uint32_t magic, totalsize, version, size_dt, boot_cpuid_phys;
 	uint32_t off_dt, off_str, off_mem_rsvmap;
 	int rc;
@@ -833,7 +827,7 @@ struct dt_info *dt_from_blob(const char *fname)
 
 	f = srcfile_relative_open(fname, NULL);
 
-	rc = fread(&magic, sizeof(magic), 1, f);
+	rc = fread(&magic_buf, sizeof(magic_buf), 1, f);
 	if (ferror(f))
 		die("Error reading DT blob magic number: %s\n",
 		    strerror(errno));
@@ -844,11 +838,11 @@ struct dt_info *dt_from_blob(const char *fname)
 			die("Mysterious short read reading magic number\n");
 	}
 
-	magic = fdt32_to_cpu(magic);
+	magic = fdt32_to_cpu(magic_buf);
 	if (magic != FDT_MAGIC)
 		die("Blob has incorrect magic number\n");
 
-	rc = fread(&totalsize, sizeof(totalsize), 1, f);
+	rc = fread(&totalsize_buf, sizeof(totalsize_buf), 1, f);
 	if (ferror(f))
 		die("Error reading DT blob size: %s\n", strerror(errno));
 	if (rc < 1) {
@@ -858,7 +852,7 @@ struct dt_info *dt_from_blob(const char *fname)
 			die("Mysterious short read reading blob size\n");
 	}
 
-	totalsize = fdt32_to_cpu(totalsize);
+	totalsize = fdt32_to_cpu(totalsize_buf);
 	if (totalsize < FDT_V1_SIZE)
 		die("DT blob size (%d) is too small\n", totalsize);
 
diff --git a/scripts/dtc/libfdt/libfdt_env.h b/scripts/dtc/libfdt/libfdt_env.h
index 99f936dacc..952056cddf 100644
--- a/scripts/dtc/libfdt/libfdt_env.h
+++ b/scripts/dtc/libfdt/libfdt_env.h
@@ -58,16 +58,16 @@
 #include <string.h>
 
 #ifdef __CHECKER__
-#define __force __attribute__((force))
-#define __bitwise __attribute__((bitwise))
+#define FDT_FORCE __attribute__((force))
+#define FDT_BITWISE __attribute__((bitwise))
 #else
-#define __force
-#define __bitwise
+#define FDT_FORCE
+#define FDT_BITWISE
 #endif
 
-typedef uint16_t __bitwise fdt16_t;
-typedef uint32_t __bitwise fdt32_t;
-typedef uint64_t __bitwise fdt64_t;
+typedef uint16_t FDT_BITWISE fdt16_t;
+typedef uint32_t FDT_BITWISE fdt32_t;
+typedef uint64_t FDT_BITWISE fdt64_t;
 
 #define EXTRACT_BYTE(x, n)	((unsigned long long)((uint8_t *)&x)[n])
 #define CPU_TO_FDT16(x) ((EXTRACT_BYTE(x, 0) << 8) | EXTRACT_BYTE(x, 1))
@@ -80,29 +80,29 @@ typedef uint64_t __bitwise fdt64_t;
 
 static inline uint16_t fdt16_to_cpu(fdt16_t x)
 {
-	return (__force uint16_t)CPU_TO_FDT16(x);
+	return (FDT_FORCE uint16_t)CPU_TO_FDT16(x);
 }
 static inline fdt16_t cpu_to_fdt16(uint16_t x)
 {
-	return (__force fdt16_t)CPU_TO_FDT16(x);
+	return (FDT_FORCE fdt16_t)CPU_TO_FDT16(x);
 }
 
 static inline uint32_t fdt32_to_cpu(fdt32_t x)
 {
-	return (__force uint32_t)CPU_TO_FDT32(x);
+	return (FDT_FORCE uint32_t)CPU_TO_FDT32(x);
 }
 static inline fdt32_t cpu_to_fdt32(uint32_t x)
 {
-	return (__force fdt32_t)CPU_TO_FDT32(x);
+	return (FDT_FORCE fdt32_t)CPU_TO_FDT32(x);
 }
 
 static inline uint64_t fdt64_to_cpu(fdt64_t x)
 {
-	return (__force uint64_t)CPU_TO_FDT64(x);
+	return (FDT_FORCE uint64_t)CPU_TO_FDT64(x);
 }
 static inline fdt64_t cpu_to_fdt64(uint64_t x)
 {
-	return (__force fdt64_t)CPU_TO_FDT64(x);
+	return (FDT_FORCE fdt64_t)CPU_TO_FDT64(x);
 }
 #undef CPU_TO_FDT64
 #undef CPU_TO_FDT32
diff --git a/scripts/dtc/livetree.c b/scripts/dtc/livetree.c
index 36be9afefd..3673de07e4 100644
--- a/scripts/dtc/livetree.c
+++ b/scripts/dtc/livetree.c
@@ -319,8 +319,8 @@ struct reserve_info *build_reserve_entry(uint64_t address, uint64_t size)
 
 	memset(new, 0, sizeof(*new));
 
-	new->re.address = address;
-	new->re.size = size;
+	new->address = address;
+	new->size = size;
 
 	return new;
 }
@@ -393,7 +393,7 @@ struct property *get_property(struct node *node, const char *propname)
 cell_t propval_cell(struct property *prop)
 {
 	assert(prop->val.len == sizeof(cell_t));
-	return fdt32_to_cpu(*((cell_t *)prop->val.val));
+	return fdt32_to_cpu(*((fdt32_t *)prop->val.val));
 }
 
 struct property *get_property_by_label(struct node *tree, const char *label,
@@ -599,13 +599,13 @@ static int cmp_reserve_info(const void *ax, const void *bx)
 	a = *((const struct reserve_info * const *)ax);
 	b = *((const struct reserve_info * const *)bx);
 
-	if (a->re.address < b->re.address)
+	if (a->address < b->address)
 		return -1;
-	else if (a->re.address > b->re.address)
+	else if (a->address > b->address)
 		return 1;
-	else if (a->re.size < b->re.size)
+	else if (a->size < b->size)
 		return -1;
-	else if (a->re.size > b->re.size)
+	else if (a->size > b->size)
 		return 1;
 	else
 		return 0;
@@ -902,7 +902,7 @@ static void add_local_fixup_entry(struct dt_info *dti,
 		struct node *refnode)
 {
 	struct node *wn, *nwn;	/* local fixup node, walk node, new */
-	uint32_t value_32;
+	fdt32_t value_32;
 	char **compp;
 	int i, depth;
 
diff --git a/scripts/dtc/srcpos.h b/scripts/dtc/srcpos.h
index 2cdfcd82e9..7caca8257c 100644
--- a/scripts/dtc/srcpos.h
+++ b/scripts/dtc/srcpos.h
@@ -22,6 +22,7 @@
 
 #include <stdio.h>
 #include <stdbool.h>
+#include "util.h"
 
 struct srcfile_state {
 	FILE *f;
@@ -106,12 +107,10 @@ extern void srcpos_update(struct srcpos *pos, const char *text, int len);
 extern struct srcpos *srcpos_copy(struct srcpos *pos);
 extern char *srcpos_string(struct srcpos *pos);
 
-extern void srcpos_verror(struct srcpos *pos, const char *prefix,
-			  const char *fmt, va_list va)
-	__attribute__((format(printf, 3, 0)));
-extern void srcpos_error(struct srcpos *pos, const char *prefix,
-			 const char *fmt, ...)
-	__attribute__((format(printf, 3, 4)));
+extern void PRINTF(3, 0) srcpos_verror(struct srcpos *pos, const char *prefix,
+					const char *fmt, va_list va);
+extern void PRINTF(3, 4) srcpos_error(struct srcpos *pos, const char *prefix,
+				      const char *fmt, ...);
 
 extern void srcpos_set_line(char *f, int l);
 
diff --git a/scripts/dtc/treesource.c b/scripts/dtc/treesource.c
index c9d8967969..2461a3d068 100644
--- a/scripts/dtc/treesource.c
+++ b/scripts/dtc/treesource.c
@@ -137,7 +137,7 @@ static void write_propval_string(FILE *f, struct data val)
 static void write_propval_cells(FILE *f, struct data val)
 {
 	void *propend = val.val + val.len;
-	cell_t *cp = (cell_t *)val.val;
+	fdt32_t *cp = (fdt32_t *)val.val;
 	struct marker *m = val.markers;
 
 	fprintf(f, "<");
@@ -275,8 +275,8 @@ void dt_to_source(FILE *f, struct dt_info *dti)
 		for_each_label(re->labels, l)
 			fprintf(f, "%s: ", l->label);
 		fprintf(f, "/memreserve/\t0x%016llx 0x%016llx;\n",
-			(unsigned long long)re->re.address,
-			(unsigned long long)re->re.size);
+			(unsigned long long)re->address,
+			(unsigned long long)re->size);
 	}
 
 	write_tree_source_node(f, dti->dt, 0);
diff --git a/scripts/dtc/util.c b/scripts/dtc/util.c
index 3550f86bd6..9953c32a02 100644
--- a/scripts/dtc/util.c
+++ b/scripts/dtc/util.c
@@ -396,7 +396,7 @@ void utilfdt_print_data(const char *data, int len)
 		} while (s < data + len);
 
 	} else if ((len % 4) == 0) {
-		const uint32_t *cell = (const uint32_t *)data;
+		const fdt32_t *cell = (const fdt32_t *)data;
 
 		printf(" = <");
 		for (i = 0, len /= 4; i < len; i++)
@@ -412,15 +412,16 @@ void utilfdt_print_data(const char *data, int len)
 	}
 }
 
-void util_version(void)
+void NORETURN util_version(void)
 {
 	printf("Version: %s\n", DTC_VERSION);
 	exit(0);
 }
 
-void util_usage(const char *errmsg, const char *synopsis,
-		const char *short_opts, struct option const long_opts[],
-		const char * const opts_help[])
+void NORETURN util_usage(const char *errmsg, const char *synopsis,
+			 const char *short_opts,
+			 struct option const long_opts[],
+			 const char * const opts_help[])
 {
 	FILE *fp = errmsg ? stderr : stdout;
 	const char a_arg[] = "<arg>";
diff --git a/scripts/dtc/util.h b/scripts/dtc/util.h
index bc3d223fa6..ad5f41199e 100644
--- a/scripts/dtc/util.h
+++ b/scripts/dtc/util.h
@@ -25,15 +25,17 @@
  *                                                                   USA
  */
 
-#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
-
 #ifdef __GNUC__
-static inline void
-__attribute__((noreturn)) __attribute__((format (printf, 1, 2)))
-die(const char *str, ...)
+#define PRINTF(i, j)	__attribute__((format (printf, i, j)))
+#define NORETURN	__attribute__((noreturn))
 #else
-static inline void die(const char *str, ...)
+#define PRINTF(i, j)
+#define NORETURN
 #endif
+
+#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
+
+static inline void NORETURN PRINTF(1, 2) die(const char *str, ...)
 {
 	va_list ap;
 
@@ -66,12 +68,7 @@ static inline void *xrealloc(void *p, size_t len)
 
 extern char *xstrdup(const char *s);
 
-#ifdef __GNUC__
-extern int __attribute__((format (printf, 2, 3)))
-xasprintf(char **strp, const char *fmt, ...);
-#else
-extern int xasprintf(char **strp, const char *fmt, ...);
-#endif
+extern int PRINTF(2, 3) xasprintf(char **strp, const char *fmt, ...);
 extern char *join_path(const char *path, const char *name);
 
 /**
@@ -200,7 +197,7 @@ void utilfdt_print_data(const char *data, int len);
 /**
  * Show source version and exit
  */
-void util_version(void) __attribute__((noreturn));
+void NORETURN util_version(void);
 
 /**
  * Show usage and exit
@@ -214,9 +211,10 @@ void util_version(void) __attribute__((noreturn));
  * @param long_opts	The structure of long options
  * @param opts_help	An array of help strings (should align with long_opts)
  */
-void util_usage(const char *errmsg, const char *synopsis,
-		const char *short_opts, struct option const long_opts[],
-		const char * const opts_help[]) __attribute__((noreturn));
+void NORETURN util_usage(const char *errmsg, const char *synopsis,
+			 const char *short_opts,
+			 struct option const long_opts[],
+			 const char * const opts_help[]);
 
 /**
  * Show usage and exit
diff --git a/scripts/dtc/version_gen.h b/scripts/dtc/version_gen.h
index bbbd96b1dc..859564e8b4 100644
--- a/scripts/dtc/version_gen.h
+++ b/scripts/dtc/version_gen.h
@@ -1 +1 @@
-#define DTC_VERSION "DTC 1.4.3"
+#define DTC_VERSION "DTC 1.4.4"

commit d18719a48ffdf6be4a0724f88d8968904df3a0d9
Author: Tom Rini <trini@konsulko.com>
Date:   Sat Sep 23 12:52:44 2017 -0400

    UPSTREAM: scripts/dtc: Update to upstream version v1.4.3
    
    Using the update-dtc-source.sh script from Linux v4.14-rc1 import the
    portions of dtc that we require.  We bring in update-dtc-source.sh and
    scripts/dtc/Makefile from Linux v4.14-rc1.  Rework DTC_FLAGS handling to
    not require a test.
    
    Change-Id: Id69453c629574df1be4cd3bb0f0f0e86516eeb47
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit c0e032e0090d6541549b19cc47e06ccd1f302893)

diff --git a/scripts/Kbuild.include b/scripts/Kbuild.include
index a3a5c59d0d..2c7918ad37 100644
--- a/scripts/Kbuild.include
+++ b/scripts/Kbuild.include
@@ -172,11 +172,6 @@ ld-version = $(shell $(LD) --version | $(srctree)/scripts/ld-version.sh)
 # Usage:  $(call ld-ifversion, -ge, 22252, y)
 ld-ifversion = $(shell [ $(ld-version) $(1) $(2) ] && echo $(3) || echo $(4))
 
-# dtc-option
-# Usage:  DTC_FLAGS += $(call dtc-option,-Wno-unit_address_vs_reg)
-dtc-option = $(call try-run,\
-	echo '/dts-v1/; / {};' | $(DTC) $(1),$(1),$(2))
-
 ######
 
 ###
diff --git a/scripts/Makefile.extrawarn b/scripts/Makefile.extrawarn
index 90dc149df3..1d3a570594 100644
--- a/scripts/Makefile.extrawarn
+++ b/scripts/Makefile.extrawarn
@@ -58,8 +58,8 @@ endif
 
 KBUILD_CFLAGS += $(warning)
 
-dtc-warning-2 += $(call dtc-option,-Wnode_name_chars_strict)
-dtc-warning-2 += $(call dtc-option,-Wproperty_name_chars_strict)
+dtc-warning-2 += -Wnode_name_chars_strict
+dtc-warning-2 += -Wproperty_name_chars_strict
 
 dtc-warning := $(dtc-warning-$(findstring 1, $(KBUILD_ENABLE_EXTRA_GCC_CHECKS)))
 dtc-warning += $(dtc-warning-$(findstring 2, $(KBUILD_ENABLE_EXTRA_GCC_CHECKS)))
@@ -70,11 +70,11 @@ DTC_FLAGS += $(dtc-warning)
 else
 
 # Disable noisy checks by default
-DTC_FLAGS += $(call dtc-option,-Wno-unit_address_vs_reg)
-DTC_FLAGS += $(call dtc-option,-Wno-simple_bus_reg)
-DTC_FLAGS += $(call dtc-option,-Wno-unit_address_format)
-DTC_FLAGS += $(call dtc-option,-Wno-pci_bridge)
-DTC_FLAGS += $(call dtc-option,-Wno-pci_device_bus_num)
-DTC_FLAGS += $(call dtc-option,-Wno-pci_device_reg)
+DTC_FLAGS += -Wno-unit_address_vs_reg
+DTC_FLAGS += -Wno-simple_bus_reg
+DTC_FLAGS += -Wno-unit_address_format
+DTC_FLAGS += -Wno-pci_bridge
+DTC_FLAGS += -Wno-pci_device_bus_num
+DTC_FLAGS += -Wno-pci_device_reg
 
 endif
diff --git a/scripts/dtc/Makefile b/scripts/dtc/Makefile
new file mode 100644
index 0000000000..2a48022c41
--- /dev/null
+++ b/scripts/dtc/Makefile
@@ -0,0 +1,31 @@
+# scripts/dtc makefile
+
+hostprogs-y	:= dtc
+always		:= $(hostprogs-y)
+
+dtc-objs	:= dtc.o flattree.o fstree.o data.o livetree.o treesource.o \
+		   srcpos.o checks.o util.o
+dtc-objs	+= dtc-lexer.lex.o dtc-parser.tab.o
+
+# Source files need to get at the userspace version of libfdt_env.h to compile
+
+HOSTCFLAGS_DTC := -I$(src) -I$(src)/libfdt
+
+HOSTCFLAGS_checks.o := $(HOSTCFLAGS_DTC)
+HOSTCFLAGS_data.o := $(HOSTCFLAGS_DTC)
+HOSTCFLAGS_dtc.o := $(HOSTCFLAGS_DTC)
+HOSTCFLAGS_flattree.o := $(HOSTCFLAGS_DTC)
+HOSTCFLAGS_fstree.o := $(HOSTCFLAGS_DTC)
+HOSTCFLAGS_livetree.o := $(HOSTCFLAGS_DTC)
+HOSTCFLAGS_srcpos.o := $(HOSTCFLAGS_DTC)
+HOSTCFLAGS_treesource.o := $(HOSTCFLAGS_DTC)
+HOSTCFLAGS_util.o := $(HOSTCFLAGS_DTC)
+
+HOSTCFLAGS_dtc-lexer.lex.o := $(HOSTCFLAGS_DTC)
+HOSTCFLAGS_dtc-parser.tab.o := $(HOSTCFLAGS_DTC)
+
+# dependencies on generated files need to be listed explicitly
+$(obj)/dtc-lexer.lex.o: $(obj)/dtc-parser.tab.h
+
+# generated files need to be cleaned explicitly
+clean-files	:= dtc-lexer.lex.c dtc-parser.tab.c dtc-parser.tab.h
diff --git a/scripts/dtc/Makefile.dtc b/scripts/dtc/Makefile.dtc
new file mode 100644
index 0000000000..bece49b355
--- /dev/null
+++ b/scripts/dtc/Makefile.dtc
@@ -0,0 +1,18 @@
+# Makefile.dtc
+#
+# This is not a complete Makefile of itself.  Instead, it is designed to
+# be easily embeddable into other systems of Makefiles.
+#
+DTC_SRCS = \
+	checks.c \
+	data.c \
+	dtc.c \
+	flattree.c \
+	fstree.c \
+	livetree.c \
+	srcpos.c \
+	treesource.c \
+	util.c
+
+DTC_GEN_SRCS = dtc-lexer.lex.c dtc-parser.tab.c
+DTC_OBJS = $(DTC_SRCS:%.c=%.o) $(DTC_GEN_SRCS:%.c=%.o)
diff --git a/scripts/dtc/checks.c b/scripts/dtc/checks.c
new file mode 100644
index 0000000000..0e8b978c36
--- /dev/null
+++ b/scripts/dtc/checks.c
@@ -0,0 +1,849 @@
+/*
+ * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation.  2007.
+ *
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ *  General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307
+ *                                                                   USA
+ */
+
+#include "dtc.h"
+
+#ifdef TRACE_CHECKS
+#define TRACE(c, ...) \
+	do { \
+		fprintf(stderr, "=== %s: ", (c)->name); \
+		fprintf(stderr, __VA_ARGS__); \
+		fprintf(stderr, "\n"); \
+	} while (0)
+#else
+#define TRACE(c, fmt, ...)	do { } while (0)
+#endif
+
+enum checkstatus {
+	UNCHECKED = 0,
+	PREREQ,
+	PASSED,
+	FAILED,
+};
+
+struct check;
+
+typedef void (*check_fn)(struct check *c, struct dt_info *dti, struct node *node);
+
+struct check {
+	const char *name;
+	check_fn fn;
+	void *data;
+	bool warn, error;
+	enum checkstatus status;
+	bool inprogress;
+	int num_prereqs;
+	struct check **prereq;
+};
+
+#define CHECK_ENTRY(_nm, _fn, _d, _w, _e, ...)	       \
+	static struct check *_nm##_prereqs[] = { __VA_ARGS__ }; \
+	static struct check _nm = { \
+		.name = #_nm, \
+		.fn = (_fn), \
+		.data = (_d), \
+		.warn = (_w), \
+		.error = (_e), \
+		.status = UNCHECKED, \
+		.num_prereqs = ARRAY_SIZE(_nm##_prereqs), \
+		.prereq = _nm##_prereqs, \
+	};
+#define WARNING(_nm, _fn, _d, ...) \
+	CHECK_ENTRY(_nm, _fn, _d, true, false, __VA_ARGS__)
+#define ERROR(_nm, _fn, _d, ...) \
+	CHECK_ENTRY(_nm, _fn, _d, false, true, __VA_ARGS__)
+#define CHECK(_nm, _fn, _d, ...) \
+	CHECK_ENTRY(_nm, _fn, _d, false, false, __VA_ARGS__)
+
+#ifdef __GNUC__
+static inline void check_msg(struct check *c, struct dt_info *dti,
+			     const char *fmt, ...) __attribute__((format (printf, 3, 4)));
+#endif
+static inline void check_msg(struct check *c, struct dt_info *dti,
+			     const char *fmt, ...)
+{
+	va_list ap;
+	va_start(ap, fmt);
+
+	if ((c->warn && (quiet < 1))
+	    || (c->error && (quiet < 2))) {
+		fprintf(stderr, "%s: %s (%s): ",
+			strcmp(dti->outname, "-") ? dti->outname : "<stdout>",
+			(c->error) ? "ERROR" : "Warning", c->name);
+		vfprintf(stderr, fmt, ap);
+		fprintf(stderr, "\n");
+	}
+	va_end(ap);
+}
+
+#define FAIL(c, dti, ...)						\
+	do {								\
+		TRACE((c), "\t\tFAILED at %s:%d", __FILE__, __LINE__);	\
+		(c)->status = FAILED;					\
+		check_msg((c), dti, __VA_ARGS__);			\
+	} while (0)
+
+static void check_nodes_props(struct check *c, struct dt_info *dti, struct node *node)
+{
+	struct node *child;
+
+	TRACE(c, "%s", node->fullpath);
+	if (c->fn)
+		c->fn(c, dti, node);
+
+	for_each_child(node, child)
+		check_nodes_props(c, dti, child);
+}
+
+static bool run_check(struct check *c, struct dt_info *dti)
+{
+	struct node *dt = dti->dt;
+	bool error = false;
+	int i;
+
+	assert(!c->inprogress);
+
+	if (c->status != UNCHECKED)
+		goto out;
+
+	c->inprogress = true;
+
+	for (i = 0; i < c->num_prereqs; i++) {
+		struct check *prq = c->prereq[i];
+		error = error || run_check(prq, dti);
+		if (prq->status != PASSED) {
+			c->status = PREREQ;
+			check_msg(c, dti, "Failed prerequisite '%s'",
+				  c->prereq[i]->name);
+		}
+	}
+
+	if (c->status != UNCHECKED)
+		goto out;
+
+	check_nodes_props(c, dti, dt);
+
+	if (c->status == UNCHECKED)
+		c->status = PASSED;
+
+	TRACE(c, "\tCompleted, status %d", c->status);
+
+out:
+	c->inprogress = false;
+	if ((c->status != PASSED) && (c->error))
+		error = true;
+	return error;
+}
+
+/*
+ * Utility check functions
+ */
+
+/* A check which always fails, for testing purposes only */
+static inline void check_always_fail(struct check *c, struct dt_info *dti,
+				     struct node *node)
+{
+	FAIL(c, dti, "always_fail check");
+}
+CHECK(always_fail, check_always_fail, NULL);
+
+static void check_is_string(struct check *c, struct dt_info *dti,
+			    struct node *node)
+{
+	struct property *prop;
+	char *propname = c->data;
+
+	prop = get_property(node, propname);
+	if (!prop)
+		return; /* Not present, assumed ok */
+
+	if (!data_is_one_string(prop->val))
+		FAIL(c, dti, "\"%s\" property in %s is not a string",
+		     propname, node->fullpath);
+}
+#define WARNING_IF_NOT_STRING(nm, propname) \
+	WARNING(nm, check_is_string, (propname))
+#define ERROR_IF_NOT_STRING(nm, propname) \
+	ERROR(nm, check_is_string, (propname))
+
+static void check_is_cell(struct check *c, struct dt_info *dti,
+			  struct node *node)
+{
+	struct property *prop;
+	char *propname = c->data;
+
+	prop = get_property(node, propname);
+	if (!prop)
+		return; /* Not present, assumed ok */
+
+	if (prop->val.len != sizeof(cell_t))
+		FAIL(c, dti, "\"%s\" property in %s is not a single cell",
+		     propname, node->fullpath);
+}
+#define WARNING_IF_NOT_CELL(nm, propname) \
+	WARNING(nm, check_is_cell, (propname))
+#define ERROR_IF_NOT_CELL(nm, propname) \
+	ERROR(nm, check_is_cell, (propname))
+
+/*
+ * Structural check functions
+ */
+
+static void check_duplicate_node_names(struct check *c, struct dt_info *dti,
+				       struct node *node)
+{
+	struct node *child, *child2;
+
+	for_each_child(node, child)
+		for (child2 = child->next_sibling;
+		     child2;
+		     child2 = child2->next_sibling)
+			if (streq(child->name, child2->name))
+				FAIL(c, dti, "Duplicate node name %s",
+				     child->fullpath);
+}
+ERROR(duplicate_node_names, check_duplicate_node_names, NULL);
+
+static void check_duplicate_property_names(struct check *c, struct dt_info *dti,
+					   struct node *node)
+{
+	struct property *prop, *prop2;
+
+	for_each_property(node, prop) {
+		for (prop2 = prop->next; prop2; prop2 = prop2->next) {
+			if (prop2->deleted)
+				continue;
+			if (streq(prop->name, prop2->name))
+				FAIL(c, dti, "Duplicate property name %s in %s",
+				     prop->name, node->fullpath);
+		}
+	}
+}
+ERROR(duplicate_property_names, check_duplicate_property_names, NULL);
+
+#define LOWERCASE	"abcdefghijklmnopqrstuvwxyz"
+#define UPPERCASE	"ABCDEFGHIJKLMNOPQRSTUVWXYZ"
+#define DIGITS		"0123456789"
+#define PROPNODECHARS	LOWERCASE UPPERCASE DIGITS ",._+*#?-"
+#define PROPNODECHARSSTRICT	LOWERCASE UPPERCASE DIGITS ",-"
+
+static void check_node_name_chars(struct check *c, struct dt_info *dti,
+				  struct node *node)
+{
+	int n = strspn(node->name, c->data);
+
+	if (n < strlen(node->name))
+		FAIL(c, dti, "Bad character '%c' in node %s",
+		     node->name[n], node->fullpath);
+}
+ERROR(node_name_chars, check_node_name_chars, PROPNODECHARS "@");
+
+static void check_node_name_chars_strict(struct check *c, struct dt_info *dti,
+					 struct node *node)
+{
+	int n = strspn(node->name, c->data);
+
+	if (n < node->basenamelen)
+		FAIL(c, dti, "Character '%c' not recommended in node %s",
+		     node->name[n], node->fullpath);
+}
+CHECK(node_name_chars_strict, check_node_name_chars_strict, PROPNODECHARSSTRICT);
+
+static void check_node_name_format(struct check *c, struct dt_info *dti,
+				   struct node *node)
+{
+	if (strchr(get_unitname(node), '@'))
+		FAIL(c, dti, "Node %s has multiple '@' characters in name",
+		     node->fullpath);
+}
+ERROR(node_name_format, check_node_name_format, NULL, &node_name_chars);
+
+static void check_unit_address_vs_reg(struct check *c, struct dt_info *dti,
+				      struct node *node)
+{
+	const char *unitname = get_unitname(node);
+	struct property *prop = get_property(node, "reg");
+
+	if (!prop) {
+		prop = get_property(node, "ranges");
+		if (prop && !prop->val.len)
+			prop = NULL;
+	}
+
+	if (prop) {
+		if (!unitname[0])
+			FAIL(c, dti, "Node %s has a reg or ranges property, but no unit name",
+			    node->fullpath);
+	} else {
+		if (unitname[0])
+			FAIL(c, dti, "Node %s has a unit name, but no reg property",
+			    node->fullpath);
+	}
+}
+WARNING(unit_address_vs_reg, check_unit_address_vs_reg, NULL);
+
+static void check_property_name_chars(struct check *c, struct dt_info *dti,
+				      struct node *node)
+{
+	struct property *prop;
+
+	for_each_property(node, prop) {
+		int n = strspn(prop->name, c->data);
+
+		if (n < strlen(prop->name))
+			FAIL(c, dti, "Bad character '%c' in property name \"%s\", node %s",
+			     prop->name[n], prop->name, node->fullpath);
+	}
+}
+ERROR(property_name_chars, check_property_name_chars, PROPNODECHARS);
+
+static void check_property_name_chars_strict(struct check *c,
+					     struct dt_info *dti,
+					     struct node *node)
+{
+	struct property *prop;
+
+	for_each_property(node, prop) {
+		const char *name = prop->name;
+		int n = strspn(name, c->data);
+
+		if (n == strlen(prop->name))
+			continue;
+
+		/* Certain names are whitelisted */
+		if (streq(name, "device_type"))
+			continue;
+
+		/*
+		 * # is only allowed at the beginning of property names not counting
+		 * the vendor prefix.
+		 */
+		if (name[n] == '#' && ((n == 0) || (name[n-1] == ','))) {
+			name += n + 1;
+			n = strspn(name, c->data);
+		}
+		if (n < strlen(name))
+			FAIL(c, dti, "Character '%c' not recommended in property name \"%s\", node %s",
+			     name[n], prop->name, node->fullpath);
+	}
+}
+CHECK(property_name_chars_strict, check_property_name_chars_strict, PROPNODECHARSSTRICT);
+
+#define DESCLABEL_FMT	"%s%s%s%s%s"
+#define DESCLABEL_ARGS(node,prop,mark)		\
+	((mark) ? "value of " : ""),		\
+	((prop) ? "'" : ""), \
+	((prop) ? (prop)->name : ""), \
+	((prop) ? "' in " : ""), (node)->fullpath
+
+static void check_duplicate_label(struct check *c, struct dt_info *dti,
+				  const char *label, struct node *node,
+				  struct property *prop, struct marker *mark)
+{
+	struct node *dt = dti->dt;
+	struct node *othernode = NULL;
+	struct property *otherprop = NULL;
+	struct marker *othermark = NULL;
+
+	othernode = get_node_by_label(dt, label);
+
+	if (!othernode)
+		otherprop = get_property_by_label(dt, label, &othernode);
+	if (!othernode)
+		othermark = get_marker_label(dt, label, &othernode,
+					       &otherprop);
+
+	if (!othernode)
+		return;
+
+	if ((othernode != node) || (otherprop != prop) || (othermark != mark))
+		FAIL(c, dti, "Duplicate label '%s' on " DESCLABEL_FMT
+		     " and " DESCLABEL_FMT,
+		     label, DESCLABEL_ARGS(node, prop, mark),
+		     DESCLABEL_ARGS(othernode, otherprop, othermark));
+}
+
+static void check_duplicate_label_node(struct check *c, struct dt_info *dti,
+				       struct node *node)
+{
+	struct label *l;
+	struct property *prop;
+
+	for_each_label(node->labels, l)
+		check_duplicate_label(c, dti, l->label, node, NULL, NULL);
+
+	for_each_property(node, prop) {
+		struct marker *m = prop->val.markers;
+
+		for_each_label(prop->labels, l)
+			check_duplicate_label(c, dti, l->label, node, prop, NULL);
+
+		for_each_marker_of_type(m, LABEL)
+			check_duplicate_label(c, dti, m->ref, node, prop, m);
+	}
+}
+ERROR(duplicate_label, check_duplicate_label_node, NULL);
+
+static cell_t check_phandle_prop(struct check *c, struct dt_info *dti,
+				 struct node *node, const char *propname)
+{
+	struct node *root = dti->dt;
+	struct property *prop;
+	struct marker *m;
+	cell_t phandle;
+
+	prop = get_property(node, propname);
+	if (!prop)
+		return 0;
+
+	if (prop->val.len != sizeof(cell_t)) {
+		FAIL(c, dti, "%s has bad length (%d) %s property",
+		     node->fullpath, prop->val.len, prop->name);
+		return 0;
+	}
+
+	m = prop->val.markers;
+	for_each_marker_of_type(m, REF_PHANDLE) {
+		assert(m->offset == 0);
+		if (node != get_node_by_ref(root, m->ref))
+			/* "Set this node's phandle equal to some
+			 * other node's phandle".  That's nonsensical
+			 * by construction. */ {
+			FAIL(c, dti, "%s in %s is a reference to another node",
+			     prop->name, node->fullpath);
+		}
+		/* But setting this node's phandle equal to its own
+		 * phandle is allowed - that means allocate a unique
+		 * phandle for this node, even if it's not otherwise
+		 * referenced.  The value will be filled in later, so
+		 * we treat it as having no phandle data for now. */
+		return 0;
+	}
+
+	phandle = propval_cell(prop);
+
+	if ((phandle == 0) || (phandle == -1)) {
+		FAIL(c, dti, "%s has bad value (0x%x) in %s property",
+		     node->fullpath, phandle, prop->name);
+		return 0;
+	}
+
+	return phandle;
+}
+
+static void check_explicit_phandles(struct check *c, struct dt_info *dti,
+				    struct node *node)
+{
+	struct node *root = dti->dt;
+	struct node *other;
+	cell_t phandle, linux_phandle;
+
+	/* Nothing should have assigned phandles yet */
+	assert(!node->phandle);
+
+	phandle = check_phandle_prop(c, dti, node, "phandle");
+
+	linux_phandle = check_phandle_prop(c, dti, node, "linux,phandle");
+
+	if (!phandle && !linux_phandle)
+		/* No valid phandles; nothing further to check */
+		return;
+
+	if (linux_phandle && phandle && (phandle != linux_phandle))
+		FAIL(c, dti, "%s has mismatching 'phandle' and 'linux,phandle'"
+		     " properties", node->fullpath);
+
+	if (linux_phandle && !phandle)
+		phandle = linux_phandle;
+
+	other = get_node_by_phandle(root, phandle);
+	if (other && (other != node)) {
+		FAIL(c, dti, "%s has duplicated phandle 0x%x (seen before at %s)",
+		     node->fullpath, phandle, other->fullpath);
+		return;
+	}
+
+	node->phandle = phandle;
+}
+ERROR(explicit_phandles, check_explicit_phandles, NULL);
+
+static void check_name_properties(struct check *c, struct dt_info *dti,
+				  struct node *node)
+{
+	struct property **pp, *prop = NULL;
+
+	for (pp = &node->proplist; *pp; pp = &((*pp)->next))
+		if (streq((*pp)->name, "name")) {
+			prop = *pp;
+			break;
+		}
+
+	if (!prop)
+		return; /* No name property, that's fine */
+
+	if ((prop->val.len != node->basenamelen+1)
+	    || (memcmp(prop->val.val, node->name, node->basenamelen) != 0)) {
+		FAIL(c, dti, "\"name\" property in %s is incorrect (\"%s\" instead"
+		     " of base node name)", node->fullpath, prop->val.val);
+	} else {
+		/* The name property is correct, and therefore redundant.
+		 * Delete it */
+		*pp = prop->next;
+		free(prop->name);
+		data_free(prop->val);
+		free(prop);
+	}
+}
+ERROR_IF_NOT_STRING(name_is_string, "name");
+ERROR(name_properties, check_name_properties, NULL, &name_is_string);
+
+/*
+ * Reference fixup functions
+ */
+
+static void fixup_phandle_references(struct check *c, struct dt_info *dti,
+				     struct node *node)
+{
+	struct node *dt = dti->dt;
+	struct property *prop;
+
+	for_each_property(node, prop) {
+		struct marker *m = prop->val.markers;
+		struct node *refnode;
+		cell_t phandle;
+
+		for_each_marker_of_type(m, REF_PHANDLE) {
+			assert(m->offset + sizeof(cell_t) <= prop->val.len);
+
+			refnode = get_node_by_ref(dt, m->ref);
+			if (! refnode) {
+				if (!(dti->dtsflags & DTSF_PLUGIN))
+					FAIL(c, dti, "Reference to non-existent node or "
+							"label \"%s\"\n", m->ref);
+				else /* mark the entry as unresolved */
+					*((cell_t *)(prop->val.val + m->offset)) =
+						cpu_to_fdt32(0xffffffff);
+				continue;
+			}
+
+			phandle = get_node_phandle(dt, refnode);
+			*((cell_t *)(prop->val.val + m->offset)) = cpu_to_fdt32(phandle);
+		}
+	}
+}
+ERROR(phandle_references, fixup_phandle_references, NULL,
+      &duplicate_node_names, &explicit_phandles);
+
+static void fixup_path_references(struct check *c, struct dt_info *dti,
+				  struct node *node)
+{
+	struct node *dt = dti->dt;
+	struct property *prop;
+
+	for_each_property(node, prop) {
+		struct marker *m = prop->val.markers;
+		struct node *refnode;
+		char *path;
+
+		for_each_marker_of_type(m, REF_PATH) {
+			assert(m->offset <= prop->val.len);
+
+			refnode = get_node_by_ref(dt, m->ref);
+			if (!refnode) {
+				FAIL(c, dti, "Reference to non-existent node or label \"%s\"\n",
+				     m->ref);
+				continue;
+			}
+
+			path = refnode->fullpath;
+			prop->val = data_insert_at_marker(prop->val, m, path,
+							  strlen(path) + 1);
+		}
+	}
+}
+ERROR(path_references, fixup_path_references, NULL, &duplicate_node_names);
+
+/*
+ * Semantic checks
+ */
+WARNING_IF_NOT_CELL(address_cells_is_cell, "#address-cells");
+WARNING_IF_NOT_CELL(size_cells_is_cell, "#size-cells");
+WARNING_IF_NOT_CELL(interrupt_cells_is_cell, "#interrupt-cells");
+
+WARNING_IF_NOT_STRING(device_type_is_string, "device_type");
+WARNING_IF_NOT_STRING(model_is_string, "model");
+WARNING_IF_NOT_STRING(status_is_string, "status");
+
+static void fixup_addr_size_cells(struct check *c, struct dt_info *dti,
+				  struct node *node)
+{
+	struct property *prop;
+
+	node->addr_cells = -1;
+	node->size_cells = -1;
+
+	prop = get_property(node, "#address-cells");
+	if (prop)
+		node->addr_cells = propval_cell(prop);
+
+	prop = get_property(node, "#size-cells");
+	if (prop)
+		node->size_cells = propval_cell(prop);
+}
+WARNING(addr_size_cells, fixup_addr_size_cells, NULL,
+	&address_cells_is_cell, &size_cells_is_cell);
+
+#define node_addr_cells(n) \
+	(((n)->addr_cells == -1) ? 2 : (n)->addr_cells)
+#define node_size_cells(n) \
+	(((n)->size_cells == -1) ? 1 : (n)->size_cells)
+
+static void check_reg_format(struct check *c, struct dt_info *dti,
+			     struct node *node)
+{
+	struct property *prop;
+	int addr_cells, size_cells, entrylen;
+
+	prop = get_property(node, "reg");
+	if (!prop)
+		return; /* No "reg", that's fine */
+
+	if (!node->parent) {
+		FAIL(c, dti, "Root node has a \"reg\" property");
+		return;
+	}
+
+	if (prop->val.len == 0)
+		FAIL(c, dti, "\"reg\" property in %s is empty", node->fullpath);
+
+	addr_cells = node_addr_cells(node->parent);
+	size_cells = node_size_cells(node->parent);
+	entrylen = (addr_cells + size_cells) * sizeof(cell_t);
+
+	if (!entrylen || (prop->val.len % entrylen) != 0)
+		FAIL(c, dti, "\"reg\" property in %s has invalid length (%d bytes) "
+		     "(#address-cells == %d, #size-cells == %d)",
+		     node->fullpath, prop->val.len, addr_cells, size_cells);
+}
+WARNING(reg_format, check_reg_format, NULL, &addr_size_cells);
+
+static void check_ranges_format(struct check *c, struct dt_info *dti,
+				struct node *node)
+{
+	struct property *prop;
+	int c_addr_cells, p_addr_cells, c_size_cells, p_size_cells, entrylen;
+
+	prop = get_property(node, "ranges");
+	if (!prop)
+		return;
+
+	if (!node->parent) {
+		FAIL(c, dti, "Root node has a \"ranges\" property");
+		return;
+	}
+
+	p_addr_cells = node_addr_cells(node->parent);
+	p_size_cells = node_size_cells(node->parent);
+	c_addr_cells = node_addr_cells(node);
+	c_size_cells = node_size_cells(node);
+	entrylen = (p_addr_cells + c_addr_cells + c_size_cells) * sizeof(cell_t);
+
+	if (prop->val.len == 0) {
+		if (p_addr_cells != c_addr_cells)
+			FAIL(c, dti, "%s has empty \"ranges\" property but its "
+			     "#address-cells (%d) differs from %s (%d)",
+			     node->fullpath, c_addr_cells, node->parent->fullpath,
+			     p_addr_cells);
+		if (p_size_cells != c_size_cells)
+			FAIL(c, dti, "%s has empty \"ranges\" property but its "
+			     "#size-cells (%d) differs from %s (%d)",
+			     node->fullpath, c_size_cells, node->parent->fullpath,
+			     p_size_cells);
+	} else if ((prop->val.len % entrylen) != 0) {
+		FAIL(c, dti, "\"ranges\" property in %s has invalid length (%d bytes) "
+		     "(parent #address-cells == %d, child #address-cells == %d, "
+		     "#size-cells == %d)", node->fullpath, prop->val.len,
+		     p_addr_cells, c_addr_cells, c_size_cells);
+	}
+}
+WARNING(ranges_format, check_ranges_format, NULL, &addr_size_cells);
+
+/*
+ * Style checks
+ */
+static void check_avoid_default_addr_size(struct check *c, struct dt_info *dti,
+					  struct node *node)
+{
+	struct property *reg, *ranges;
+
+	if (!node->parent)
+		return; /* Ignore root node */
+
+	reg = get_property(node, "reg");
+	ranges = get_property(node, "ranges");
+
+	if (!reg && !ranges)
+		return;
+
+	if (node->parent->addr_cells == -1)
+		FAIL(c, dti, "Relying on default #address-cells value for %s",
+		     node->fullpath);
+
+	if (node->parent->size_cells == -1)
+		FAIL(c, dti, "Relying on default #size-cells value for %s",
+		     node->fullpath);
+}
+WARNING(avoid_default_addr_size, check_avoid_default_addr_size, NULL,
+	&addr_size_cells);
+
+static void check_obsolete_chosen_interrupt_controller(struct check *c,
+						       struct dt_info *dti,
+						       struct node *node)
+{
+	struct node *dt = dti->dt;
+	struct node *chosen;
+	struct property *prop;
+
+	if (node != dt)
+		return;
+
+
+	chosen = get_node_by_path(dt, "/chosen");
+	if (!chosen)
+		return;
+
+	prop = get_property(chosen, "interrupt-controller");
+	if (prop)
+		FAIL(c, dti, "/chosen has obsolete \"interrupt-controller\" "
+		     "property");
+}
+WARNING(obsolete_chosen_interrupt_controller,
+	check_obsolete_chosen_interrupt_controller, NULL);
+
+static struct check *check_table[] = {
+	&duplicate_node_names, &duplicate_property_names,
+	&node_name_chars, &node_name_format, &property_name_chars,
+	&name_is_string, &name_properties,
+
+	&duplicate_label,
+
+	&explicit_phandles,
+	&phandle_references, &path_references,
+
+	&address_cells_is_cell, &size_cells_is_cell, &interrupt_cells_is_cell,
+	&device_type_is_string, &model_is_string, &status_is_string,
+
+	&property_name_chars_strict,
+	&node_name_chars_strict,
+
+	&addr_size_cells, &reg_format, &ranges_format,
+
+	&unit_address_vs_reg,
+
+	&avoid_default_addr_size,
+	&obsolete_chosen_interrupt_controller,
+
+	&always_fail,
+};
+
+static void enable_warning_error(struct check *c, bool warn, bool error)
+{
+	int i;
+
+	/* Raising level, also raise it for prereqs */
+	if ((warn && !c->warn) || (error && !c->error))
+		for (i = 0; i < c->num_prereqs; i++)
+			enable_warning_error(c->prereq[i], warn, error);
+
+	c->warn = c->warn || warn;
+	c->error = c->error || error;
+}
+
+static void disable_warning_error(struct check *c, bool warn, bool error)
+{
+	int i;
+
+	/* Lowering level, also lower it for things this is the prereq
+	 * for */
+	if ((warn && c->warn) || (error && c->error)) {
+		for (i = 0; i < ARRAY_SIZE(check_table); i++) {
+			struct check *cc = check_table[i];
+			int j;
+
+			for (j = 0; j < cc->num_prereqs; j++)
+				if (cc->prereq[j] == c)
+					disable_warning_error(cc, warn, error);
+		}
+	}
+
+	c->warn = c->warn && !warn;
+	c->error = c->error && !error;
+}
+
+void parse_checks_option(bool warn, bool error, const char *arg)
+{
+	int i;
+	const char *name = arg;
+	bool enable = true;
+
+	if ((strncmp(arg, "no-", 3) == 0)
+	    || (strncmp(arg, "no_", 3) == 0)) {
+		name = arg + 3;
+		enable = false;
+	}
+
+	for (i = 0; i < ARRAY_SIZE(check_table); i++) {
+		struct check *c = check_table[i];
+
+		if (streq(c->name, name)) {
+			if (enable)
+				enable_warning_error(c, warn, error);
+			else
+				disable_warning_error(c, warn, error);
+			return;
+		}
+	}
+
+	die("Unrecognized check name \"%s\"\n", name);
+}
+
+void process_checks(bool force, struct dt_info *dti)
+{
+	int i;
+	int error = 0;
+
+	for (i = 0; i < ARRAY_SIZE(check_table); i++) {
+		struct check *c = check_table[i];
+
+		if (c->warn || c->error)
+			error = error || run_check(c, dti);
+	}
+
+	if (error) {
+		if (!force) {
+			fprintf(stderr, "ERROR: Input tree has errors, aborting "
+				"(use -f to force output)\n");
+			exit(2);
+		} else if (quiet < 3) {
+			fprintf(stderr, "Warning: Input tree has errors, "
+				"output forced\n");
+		}
+	}
+}
diff --git a/scripts/dtc/data.c b/scripts/dtc/data.c
new file mode 100644
index 0000000000..8cae237468
--- /dev/null
+++ b/scripts/dtc/data.c
@@ -0,0 +1,269 @@
+/*
+ * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation.  2005.
+ *
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ *  General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307
+ *                                                                   USA
+ */
+
+#include "dtc.h"
+
+void data_free(struct data d)
+{
+	struct marker *m, *nm;
+
+	m = d.markers;
+	while (m) {
+		nm = m->next;
+		free(m->ref);
+		free(m);
+		m = nm;
+	}
+
+	if (d.val)
+		free(d.val);
+}
+
+struct data data_grow_for(struct data d, int xlen)
+{
+	struct data nd;
+	int newsize;
+
+	if (xlen == 0)
+		return d;
+
+	nd = d;
+
+	newsize = xlen;
+
+	while ((d.len + xlen) > newsize)
+		newsize *= 2;
+
+	nd.val = xrealloc(d.val, newsize);
+
+	return nd;
+}
+
+struct data data_copy_mem(const char *mem, int len)
+{
+	struct data d;
+
+	d = data_grow_for(empty_data, len);
+
+	d.len = len;
+	memcpy(d.val, mem, len);
+
+	return d;
+}
+
+struct data data_copy_escape_string(const char *s, int len)
+{
+	int i = 0;
+	struct data d;
+	char *q;
+
+	d = data_grow_for(empty_data, len + 1);
+
+	q = d.val;
+	while (i < len) {
+		char c = s[i++];
+
+		if (c == '\\')
+			c = get_escape_char(s, &i);
+
+		q[d.len++] = c;
+	}
+
+	q[d.len++] = '\0';
+	return d;
+}
+
+struct data data_copy_file(FILE *f, size_t maxlen)
+{
+	struct data d = empty_data;
+
+	while (!feof(f) && (d.len < maxlen)) {
+		size_t chunksize, ret;
+
+		if (maxlen == -1)
+			chunksize = 4096;
+		else
+			chunksize = maxlen - d.len;
+
+		d = data_grow_for(d, chunksize);
+		ret = fread(d.val + d.len, 1, chunksize, f);
+
+		if (ferror(f))
+			die("Error reading file into data: %s", strerror(errno));
+
+		if (d.len + ret < d.len)
+			die("Overflow reading file into data\n");
+
+		d.len += ret;
+	}
+
+	return d;
+}
+
+struct data data_append_data(struct data d, const void *p, int len)
+{
+	d = data_grow_for(d, len);
+	memcpy(d.val + d.len, p, len);
+	d.len += len;
+	return d;
+}
+
+struct data data_insert_at_marker(struct data d, struct marker *m,
+				  const void *p, int len)
+{
+	d = data_grow_for(d, len);
+	memmove(d.val + m->offset + len, d.val + m->offset, d.len - m->offset);
+	memcpy(d.val + m->offset, p, len);
+	d.len += len;
+
+	/* Adjust all markers after the one we're inserting at */
+	m = m->next;
+	for_each_marker(m)
+		m->offset += len;
+	return d;
+}
+
+static struct data data_append_markers(struct data d, struct marker *m)
+{
+	struct marker **mp = &d.markers;
+
+	/* Find the end of the markerlist */
+	while (*mp)
+		mp = &((*mp)->next);
+	*mp = m;
+	return d;
+}
+
+struct data data_merge(struct data d1, struct data d2)
+{
+	struct data d;
+	struct marker *m2 = d2.markers;
+
+	d = data_append_markers(data_append_data(d1, d2.val, d2.len), m2);
+
+	/* Adjust for the length of d1 */
+	for_each_marker(m2)
+		m2->offset += d1.len;
+
+	d2.markers = NULL; /* So data_free() doesn't clobber them */
+	data_free(d2);
+
+	return d;
+}
+
+struct data data_append_integer(struct data d, uint64_t value, int bits)
+{
+	uint8_t value_8;
+	uint16_t value_16;
+	uint32_t value_32;
+	uint64_t value_64;
+
+	switch (bits) {
+	case 8:
+		value_8 = value;
+		return data_append_data(d, &value_8, 1);
+
+	case 16:
+		value_16 = cpu_to_fdt16(value);
+		return data_append_data(d, &value_16, 2);
+
+	case 32:
+		value_32 = cpu_to_fdt32(value);
+		return data_append_data(d, &value_32, 4);
+
+	case 64:
+		value_64 = cpu_to_fdt64(value);
+		return data_append_data(d, &value_64, 8);
+
+	default:
+		die("Invalid literal size (%d)\n", bits);
+	}
+}
+
+struct data data_append_re(struct data d, const struct fdt_reserve_entry *re)
+{
+	struct fdt_reserve_entry bere;
+
+	bere.address = cpu_to_fdt64(re->address);
+	bere.size = cpu_to_fdt64(re->size);
+
+	return data_append_data(d, &bere, sizeof(bere));
+}
+
+struct data data_append_cell(struct data d, cell_t word)
+{
+	return data_append_integer(d, word, sizeof(word) * 8);
+}
+
+struct data data_append_addr(struct data d, uint64_t addr)
+{
+	return data_append_integer(d, addr, sizeof(addr) * 8);
+}
+
+struct data data_append_byte(struct data d, uint8_t byte)
+{
+	return data_append_data(d, &byte, 1);
+}
+
+struct data data_append_zeroes(struct data d, int len)
+{
+	d = data_grow_for(d, len);
+
+	memset(d.val + d.len, 0, len);
+	d.len += len;
+	return d;
+}
+
+struct data data_append_align(struct data d, int align)
+{
+	int newlen = ALIGN(d.len, align);
+	return data_append_zeroes(d, newlen - d.len);
+}
+
+struct data data_add_marker(struct data d, enum markertype type, char *ref)
+{
+	struct marker *m;
+
+	m = xmalloc(sizeof(*m));
+	m->offset = d.len;
+	m->type = type;
+	m->ref = ref;
+	m->next = NULL;
+
+	return data_append_markers(d, m);
+}
+
+bool data_is_one_string(struct data d)
+{
+	int i;
+	int len = d.len;
+
+	if (len == 0)
+		return false;
+
+	for (i = 0; i < len-1; i++)
+		if (d.val[i] == '\0')
+			return false;
+
+	if (d.val[len-1] != '\0')
+		return false;
+
+	return true;
+}
diff --git a/scripts/dtc/dtc-lexer.l b/scripts/dtc/dtc-lexer.l
new file mode 100644
index 0000000000..52bed7b749
--- /dev/null
+++ b/scripts/dtc/dtc-lexer.l
@@ -0,0 +1,311 @@
+/*
+ * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation.  2005.
+ *
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ *  General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307
+ *                                                                   USA
+ */
+
+%option noyywrap nounput noinput never-interactive
+
+%x BYTESTRING
+%x PROPNODENAME
+%s V1
+
+PROPNODECHAR	[a-zA-Z0-9,._+*#?@-]
+PATHCHAR	({PROPNODECHAR}|[/])
+LABEL		[a-zA-Z_][a-zA-Z0-9_]*
+STRING		\"([^\\"]|\\.)*\"
+CHAR_LITERAL	'([^']|\\')*'
+WS		[[:space:]]
+COMMENT		"/*"([^*]|\*+[^*/])*\*+"/"
+LINECOMMENT	"//".*\n
+
+%{
+#include "dtc.h"
+#include "srcpos.h"
+#include "dtc-parser.tab.h"
+
+YYLTYPE yylloc;
+extern bool treesource_error;
+
+/* CAUTION: this will stop working if we ever use yyless() or yyunput() */
+#define	YY_USER_ACTION \
+	{ \
+		srcpos_update(&yylloc, yytext, yyleng); \
+	}
+
+/*#define LEXDEBUG	1*/
+
+#ifdef LEXDEBUG
+#define DPRINT(fmt, ...)	fprintf(stderr, fmt, ##__VA_ARGS__)
+#else
+#define DPRINT(fmt, ...)	do { } while (0)
+#endif
+
+static int dts_version = 1;
+
+#define BEGIN_DEFAULT()		DPRINT("<V1>\n"); \
+				BEGIN(V1); \
+
+static void push_input_file(const char *filename);
+static bool pop_input_file(void);
+#ifdef __GNUC__
+static void lexical_error(const char *fmt, ...)
+	__attribute__((format (printf, 1, 2)));
+#else
+static void lexical_error(const char *fmt, ...);
+#endif
+
+%}
+
+%%
+<*>"/include/"{WS}*{STRING} {
+			char *name = strchr(yytext, '\"') + 1;
+			yytext[yyleng-1] = '\0';
+			push_input_file(name);
+		}
+
+<*>^"#"(line)?[ \t]+[0-9]+[ \t]+{STRING}([ \t]+[0-9]+)? {
+			char *line, *fnstart, *fnend;
+			struct data fn;
+			/* skip text before line # */
+			line = yytext;
+			while (!isdigit((unsigned char)*line))
+				line++;
+
+			/* regexp ensures that first and list "
+			 * in the whole yytext are those at
+			 * beginning and end of the filename string */
+			fnstart = memchr(yytext, '"', yyleng);
+			for (fnend = yytext + yyleng - 1;
+			     *fnend != '"'; fnend--)
+				;
+			assert(fnstart && fnend && (fnend > fnstart));
+
+			fn = data_copy_escape_string(fnstart + 1,
+						     fnend - fnstart - 1);
+
+			/* Don't allow nuls in filenames */
+			if (memchr(fn.val, '\0', fn.len - 1))
+				lexical_error("nul in line number directive");
+
+			/* -1 since #line is the number of the next line */
+			srcpos_set_line(xstrdup(fn.val), atoi(line) - 1);
+			data_free(fn);
+		}
+
+<*><<EOF>>		{
+			if (!pop_input_file()) {
+				yyterminate();
+			}
+		}
+
+<*>{STRING}	{
+			DPRINT("String: %s\n", yytext);
+			yylval.data = data_copy_escape_string(yytext+1,
+					yyleng-2);
+			return DT_STRING;
+		}
+
+<*>"/dts-v1/"	{
+			DPRINT("Keyword: /dts-v1/\n");
+			dts_version = 1;
+			BEGIN_DEFAULT();
+			return DT_V1;
+		}
+
+<*>"/plugin/"	{
+			DPRINT("Keyword: /plugin/\n");
+			return DT_PLUGIN;
+		}
+
+<*>"/memreserve/"	{
+			DPRINT("Keyword: /memreserve/\n");
+			BEGIN_DEFAULT();
+			return DT_MEMRESERVE;
+		}
+
+<*>"/bits/"	{
+			DPRINT("Keyword: /bits/\n");
+			BEGIN_DEFAULT();
+			return DT_BITS;
+		}
+
+<*>"/delete-property/"	{
+			DPRINT("Keyword: /delete-property/\n");
+			DPRINT("<PROPNODENAME>\n");
+			BEGIN(PROPNODENAME);
+			return DT_DEL_PROP;
+		}
+
+<*>"/delete-node/"	{
+			DPRINT("Keyword: /delete-node/\n");
+			DPRINT("<PROPNODENAME>\n");
+			BEGIN(PROPNODENAME);
+			return DT_DEL_NODE;
+		}
+
+<*>{LABEL}:	{
+			DPRINT("Label: %s\n", yytext);
+			yylval.labelref = xstrdup(yytext);
+			yylval.labelref[yyleng-1] = '\0';
+			return DT_LABEL;
+		}
+
+<V1>([0-9]+|0[xX][0-9a-fA-F]+)(U|L|UL|LL|ULL)? {
+			char *e;
+			DPRINT("Integer Literal: '%s'\n", yytext);
+
+			errno = 0;
+			yylval.integer = strtoull(yytext, &e, 0);
+
+			if (*e && e[strspn(e, "UL")]) {
+				lexical_error("Bad integer literal '%s'",
+					      yytext);
+			}
+
+			if (errno == ERANGE)
+				lexical_error("Integer literal '%s' out of range",
+					      yytext);
+			else
+				/* ERANGE is the only strtoull error triggerable
+				 *  by strings matching the pattern */
+				assert(errno == 0);
+			return DT_LITERAL;
+		}
+
+<*>{CHAR_LITERAL}	{
+			struct data d;
+			DPRINT("Character literal: %s\n", yytext);
+
+			d = data_copy_escape_string(yytext+1, yyleng-2);
+			if (d.len == 1) {
+				lexical_error("Empty character literal");
+				yylval.integer = 0;
+			} else {
+				yylval.integer = (unsigned char)d.val[0];
+
+				if (d.len > 2)
+					lexical_error("Character literal has %d"
+						      " characters instead of 1",
+						      d.len - 1);
+			}
+
+			data_free(d);
+			return DT_CHAR_LITERAL;
+		}
+
+<*>\&{LABEL}	{	/* label reference */
+			DPRINT("Ref: %s\n", yytext+1);
+			yylval.labelref = xstrdup(yytext+1);
+			return DT_REF;
+		}
+
+<*>"&{/"{PATHCHAR}*\}	{	/* new-style path reference */
+			yytext[yyleng-1] = '\0';
+			DPRINT("Ref: %s\n", yytext+2);
+			yylval.labelref = xstrdup(yytext+2);
+			return DT_REF;
+		}
+
+<BYTESTRING>[0-9a-fA-F]{2} {
+			yylval.byte = strtol(yytext, NULL, 16);
+			DPRINT("Byte: %02x\n", (int)yylval.byte);
+			return DT_BYTE;
+		}
+
+<BYTESTRING>"]"	{
+			DPRINT("/BYTESTRING\n");
+			BEGIN_DEFAULT();
+			return ']';
+		}
+
+<PROPNODENAME>\\?{PROPNODECHAR}+ {
+			DPRINT("PropNodeName: %s\n", yytext);
+			yylval.propnodename = xstrdup((yytext[0] == '\\') ?
+							yytext + 1 : yytext);
+			BEGIN_DEFAULT();
+			return DT_PROPNODENAME;
+		}
+
+"/incbin/"	{
+			DPRINT("Binary Include\n");
+			return DT_INCBIN;
+		}
+
+<*>{WS}+	/* eat whitespace */
+<*>{COMMENT}+	/* eat C-style comments */
+<*>{LINECOMMENT}+ /* eat C++-style comments */
+
+<*>"<<"		{ return DT_LSHIFT; };
+<*>">>"		{ return DT_RSHIFT; };
+<*>"<="		{ return DT_LE; };
+<*>">="		{ return DT_GE; };
+<*>"=="		{ return DT_EQ; };
+<*>"!="		{ return DT_NE; };
+<*>"&&"		{ return DT_AND; };
+<*>"||"		{ return DT_OR; };
+
+<*>.		{
+			DPRINT("Char: %c (\\x%02x)\n", yytext[0],
+				(unsigned)yytext[0]);
+			if (yytext[0] == '[') {
+				DPRINT("<BYTESTRING>\n");
+				BEGIN(BYTESTRING);
+			}
+			if ((yytext[0] == '{')
+			    || (yytext[0] == ';')) {
+				DPRINT("<PROPNODENAME>\n");
+				BEGIN(PROPNODENAME);
+			}
+			return yytext[0];
+		}
+
+%%
+
+static void push_input_file(const char *filename)
+{
+	assert(filename);
+
+	srcfile_push(filename);
+
+	yyin = current_srcfile->f;
+
+	yypush_buffer_state(yy_create_buffer(yyin, YY_BUF_SIZE));
+}
+
+
+static bool pop_input_file(void)
+{
+	if (srcfile_pop() == 0)
+		return false;
+
+	yypop_buffer_state();
+	yyin = current_srcfile->f;
+
+	return true;
+}
+
+static void lexical_error(const char *fmt, ...)
+{
+	va_list ap;
+
+	va_start(ap, fmt);
+	srcpos_verror(&yylloc, "Lexical error", fmt, ap);
+	va_end(ap);
+
+	treesource_error = true;
+}
diff --git a/scripts/dtc/dtc-lexer.lex.c_shipped b/scripts/dtc/dtc-lexer.lex.c_shipped
new file mode 100644
index 0000000000..d77fdfe590
--- /dev/null
+++ b/scripts/dtc/dtc-lexer.lex.c_shipped
@@ -0,0 +1,2260 @@
+#line 2 "dtc-lexer.lex.c"
+
+#line 4 "dtc-lexer.lex.c"
+
+#define  YY_INT_ALIGNED short int
+
+/* A lexical scanner generated by flex */
+
+#define FLEX_SCANNER
+#define YY_FLEX_MAJOR_VERSION 2
+#define YY_FLEX_MINOR_VERSION 5
+#define YY_FLEX_SUBMINOR_VERSION 35
+#if YY_FLEX_SUBMINOR_VERSION > 0
+#define FLEX_BETA
+#endif
+
+/* First, we deal with  platform-specific or compiler-specific issues. */
+
+/* begin standard C headers. */
+#include <stdio.h>
+#include <string.h>
+#include <errno.h>
+#include <stdlib.h>
+
+/* end standard C headers. */
+
+/* flex integer type definitions */
+
+#ifndef FLEXINT_H
+#define FLEXINT_H
+
+/* C99 systems have <inttypes.h>. Non-C99 systems may or may not. */
+
+#if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L
+
+/* C99 says to define __STDC_LIMIT_MACROS before including stdint.h,
+ * if you want the limit (max/min) macros for int types. 
+ */
+#ifndef __STDC_LIMIT_MACROS
+#define __STDC_LIMIT_MACROS 1
+#endif
+
+#include <inttypes.h>
+typedef int8_t flex_int8_t;
+typedef uint8_t flex_uint8_t;
+typedef int16_t flex_int16_t;
+typedef uint16_t flex_uint16_t;
+typedef int32_t flex_int32_t;
+typedef uint32_t flex_uint32_t;
+#else
+typedef signed char flex_int8_t;
+typedef short int flex_int16_t;
+typedef int flex_int32_t;
+typedef unsigned char flex_uint8_t; 
+typedef unsigned short int flex_uint16_t;
+typedef unsigned int flex_uint32_t;
+
+/* Limits of integral types. */
+#ifndef INT8_MIN
+#define INT8_MIN               (-128)
+#endif
+#ifndef INT16_MIN
+#define INT16_MIN              (-32767-1)
+#endif
+#ifndef INT32_MIN
+#define INT32_MIN              (-2147483647-1)
+#endif
+#ifndef INT8_MAX
+#define INT8_MAX               (127)
+#endif
+#ifndef INT16_MAX
+#define INT16_MAX              (32767)
+#endif
+#ifndef INT32_MAX
+#define INT32_MAX              (2147483647)
+#endif
+#ifndef UINT8_MAX
+#define UINT8_MAX              (255U)
+#endif
+#ifndef UINT16_MAX
+#define UINT16_MAX             (65535U)
+#endif
+#ifndef UINT32_MAX
+#define UINT32_MAX             (4294967295U)
+#endif
+
+#endif /* ! C99 */
+
+#endif /* ! FLEXINT_H */
+
+#ifdef __cplusplus
+
+/* The "const" storage-class-modifier is valid. */
+#define YY_USE_CONST
+
+#else	/* ! __cplusplus */
+
+/* C99 requires __STDC__ to be defined as 1. */
+#if defined (__STDC__)
+
+#define YY_USE_CONST
+
+#endif	/* defined (__STDC__) */
+#endif	/* ! __cplusplus */
+
+#ifdef YY_USE_CONST
+#define yyconst const
+#else
+#define yyconst
+#endif
+
+/* Returned upon end-of-file. */
+#define YY_NULL 0
+
+/* Promotes a possibly negative, possibly signed char to an unsigned
+ * integer for use as an array index.  If the signed char is negative,
+ * we want to instead treat it as an 8-bit unsigned char, hence the
+ * double cast.
+ */
+#define YY_SC_TO_UI(c) ((unsigned int) (unsigned char) c)
+
+/* Enter a start condition.  This macro really ought to take a parameter,
+ * but we do it the disgusting crufty way forced on us by the ()-less
+ * definition of BEGIN.
+ */
+#define BEGIN (yy_start) = 1 + 2 *
+
+/* Translate the current start state into a value that can be later handed
+ * to BEGIN to return to the state.  The YYSTATE alias is for lex
+ * compatibility.
+ */
+#define YY_START (((yy_start) - 1) / 2)
+#define YYSTATE YY_START
+
+/* Action number for EOF rule of a given start state. */
+#define YY_STATE_EOF(state) (YY_END_OF_BUFFER + state + 1)
+
+/* Special action meaning "start processing a new file". */
+#define YY_NEW_FILE yyrestart(yyin  )
+
+#define YY_END_OF_BUFFER_CHAR 0
+
+/* Size of default input buffer. */
+#ifndef YY_BUF_SIZE
+#ifdef __ia64__
+/* On IA-64, the buffer size is 16k, not 8k.
+ * Moreover, YY_BUF_SIZE is 2*YY_READ_BUF_SIZE in the general case.
+ * Ditto for the __ia64__ case accordingly.
+ */
+#define YY_BUF_SIZE 32768
+#else
+#define YY_BUF_SIZE 16384
+#endif /* __ia64__ */
+#endif
+
+/* The state buf must be large enough to hold one state per character in the main buffer.
+ */
+#define YY_STATE_BUF_SIZE   ((YY_BUF_SIZE + 2) * sizeof(yy_state_type))
+
+#ifndef YY_TYPEDEF_YY_BUFFER_STATE
+#define YY_TYPEDEF_YY_BUFFER_STATE
+typedef struct yy_buffer_state *YY_BUFFER_STATE;
+#endif
+
+extern int yyleng;
+
+extern FILE *yyin, *yyout;
+
+#define EOB_ACT_CONTINUE_SCAN 0
+#define EOB_ACT_END_OF_FILE 1
+#define EOB_ACT_LAST_MATCH 2
+
+    #define YY_LESS_LINENO(n)
+    
+/* Return all but the first "n" matched characters back to the input stream. */
+#define yyless(n) \
+	do \
+		{ \
+		/* Undo effects of setting up yytext. */ \
+        int yyless_macro_arg = (n); \
+        YY_LESS_LINENO(yyless_macro_arg);\
+		*yy_cp = (yy_hold_char); \
+		YY_RESTORE_YY_MORE_OFFSET \
+		(yy_c_buf_p) = yy_cp = yy_bp + yyless_macro_arg - YY_MORE_ADJ; \
+		YY_DO_BEFORE_ACTION; /* set up yytext again */ \
+		} \
+	while ( 0 )
+
+#define unput(c) yyunput( c, (yytext_ptr)  )
+
+#ifndef YY_TYPEDEF_YY_SIZE_T
+#define YY_TYPEDEF_YY_SIZE_T
+typedef size_t yy_size_t;
+#endif
+
+#ifndef YY_STRUCT_YY_BUFFER_STATE
+#define YY_STRUCT_YY_BUFFER_STATE
+struct yy_buffer_state
+	{
+	FILE *yy_input_file;
+
+	char *yy_ch_buf;		/* input buffer */
+	char *yy_buf_pos;		/* current position in input buffer */
+
+	/* Size of input buffer in bytes, not including room for EOB
+	 * characters.
+	 */
+	yy_size_t yy_buf_size;
+
+	/* Number of characters read into yy_ch_buf, not including EOB
+	 * characters.
+	 */
+	int yy_n_chars;
+
+	/* Whether we "own" the buffer - i.e., we know we created it,
+	 * and can realloc() it to grow it, and should free() it to
+	 * delete it.
+	 */
+	int yy_is_our_buffer;
+
+	/* Whether this is an "interactive" input source; if so, and
+	 * if we're using stdio for input, then we want to use getc()
+	 * instead of fread(), to make sure we stop fetching input after
+	 * each newline.
+	 */
+	int yy_is_interactive;
+
+	/* Whether we're considered to be at the beginning of a line.
+	 * If so, '^' rules will be active on the next match, otherwise
+	 * not.
+	 */
+	int yy_at_bol;
+
+    int yy_bs_lineno; /**< The line count. */
+    int yy_bs_column; /**< The column count. */
+    
+	/* Whether to try to fill the input buffer when we reach the
+	 * end of it.
+	 */
+	int yy_fill_buffer;
+
+	int yy_buffer_status;
+
+#define YY_BUFFER_NEW 0
+#define YY_BUFFER_NORMAL 1
+	/* When an EOF's been seen but there's still some text to process
+	 * then we mark the buffer as YY_EOF_PENDING, to indicate that we
+	 * shouldn't try reading from the input source any more.  We might
+	 * still have a bunch of tokens to match, though, because of
+	 * possible backing-up.
+	 *
+	 * When we actually see the EOF, we change the status to "new"
+	 * (via yyrestart()), so that the user can continue scanning by
+	 * just pointing yyin at a new input file.
+	 */
+#define YY_BUFFER_EOF_PENDING 2
+
+	};
+#endif /* !YY_STRUCT_YY_BUFFER_STATE */
+
+/* Stack of input buffers. */
+static size_t yy_buffer_stack_top = 0; /**< index of top of stack. */
+static size_t yy_buffer_stack_max = 0; /**< capacity of stack. */
+static YY_BUFFER_STATE * yy_buffer_stack = 0; /**< Stack as an array. */
+
+/* We provide macros for accessing buffer states in case in the
+ * future we want to put the buffer states in a more general
+ * "scanner state".
+ *
+ * Returns the top of the stack, or NULL.
+ */
+#define YY_CURRENT_BUFFER ( (yy_buffer_stack) \
+                          ? (yy_buffer_stack)[(yy_buffer_stack_top)] \
+                          : NULL)
+
+/* Same as previous macro, but useful when we know that the buffer stack is not
+ * NULL or when we need an lvalue. For internal use only.
+ */
+#define YY_CURRENT_BUFFER_LVALUE (yy_buffer_stack)[(yy_buffer_stack_top)]
+
+/* yy_hold_char holds the character lost when yytext is formed. */
+static char yy_hold_char;
+static int yy_n_chars;		/* number of characters read into yy_ch_buf */
+int yyleng;
+
+/* Points to current character in buffer. */
+static char *yy_c_buf_p = (char *) 0;
+static int yy_init = 0;		/* whether we need to initialize */
+static int yy_start = 0;	/* start state number */
+
+/* Flag which is used to allow yywrap()'s to do buffer switches
+ * instead of setting up a fresh yyin.  A bit of a hack ...
+ */
+static int yy_did_buffer_switch_on_eof;
+
+void yyrestart (FILE *input_file  );
+void yy_switch_to_buffer (YY_BUFFER_STATE new_buffer  );
+YY_BUFFER_STATE yy_create_buffer (FILE *file,int size  );
+void yy_delete_buffer (YY_BUFFER_STATE b  );
+void yy_flush_buffer (YY_BUFFER_STATE b  );
+void yypush_buffer_state (YY_BUFFER_STATE new_buffer  );
+void yypop_buffer_state (void );
+
+static void yyensure_buffer_stack (void );
+static void yy_load_buffer_state (void );
+static void yy_init_buffer (YY_BUFFER_STATE b,FILE *file  );
+
+#define YY_FLUSH_BUFFER yy_flush_buffer(YY_CURRENT_BUFFER )
+
+YY_BUFFER_STATE yy_scan_buffer (char *base,yy_size_t size  );
+YY_BUFFER_STATE yy_scan_string (yyconst char *yy_str  );
+YY_BUFFER_STATE yy_scan_bytes (yyconst char *bytes,int len  );
+
+void *yyalloc (yy_size_t  );
+void *yyrealloc (void *,yy_size_t  );
+void yyfree (void *  );
+
+#define yy_new_buffer yy_create_buffer
+
+#define yy_set_interactive(is_interactive) \
+	{ \
+	if ( ! YY_CURRENT_BUFFER ){ \
+        yyensure_buffer_stack (); \
+		YY_CURRENT_BUFFER_LVALUE =    \
+            yy_create_buffer(yyin,YY_BUF_SIZE ); \
+	} \
+	YY_CURRENT_BUFFER_LVALUE->yy_is_interactive = is_interactive; \
+	}
+
+#define yy_set_bol(at_bol) \
+	{ \
+	if ( ! YY_CURRENT_BUFFER ){\
+        yyensure_buffer_stack (); \
+		YY_CURRENT_BUFFER_LVALUE =    \
+            yy_create_buffer(yyin,YY_BUF_SIZE ); \
+	} \
+	YY_CURRENT_BUFFER_LVALUE->yy_at_bol = at_bol; \
+	}
+
+#define YY_AT_BOL() (YY_CURRENT_BUFFER_LVALUE->yy_at_bol)
+
+/* Begin user sect3 */
+
+#define yywrap(n) 1
+#define YY_SKIP_YYWRAP
+
+typedef unsigned char YY_CHAR;
+
+FILE *yyin = (FILE *) 0, *yyout = (FILE *) 0;
+
+typedef int yy_state_type;
+
+extern int yylineno;
+
+int yylineno = 1;
+
+extern char *yytext;
+#define yytext_ptr yytext
+
+static yy_state_type yy_get_previous_state (void );
+static yy_state_type yy_try_NUL_trans (yy_state_type current_state  );
+static int yy_get_next_buffer (void );
+static void yy_fatal_error (yyconst char msg[]  );
+
+/* Done after the current pattern has been matched and before the
+ * corresponding action - sets up yytext.
+ */
+#define YY_DO_BEFORE_ACTION \
+	(yytext_ptr) = yy_bp; \
+	yyleng = (size_t) (yy_cp - yy_bp); \
+	(yy_hold_char) = *yy_cp; \
+	*yy_cp = '\0'; \
+	(yy_c_buf_p) = yy_cp;
+
+#define YY_NUM_RULES 31
+#define YY_END_OF_BUFFER 32
+/* This struct is not used in this scanner,
+   but its presence is necessary. */
+struct yy_trans_info
+	{
+	flex_int32_t yy_verify;
+	flex_int32_t yy_nxt;
+	};
+static yyconst flex_int16_t yy_accept[166] =
+    {   0,
+        0,    0,    0,    0,    0,    0,    0,    0,   32,   30,
+       19,   19,   30,   30,   30,   30,   30,   30,   30,   30,
+       30,   30,   30,   30,   30,   30,   16,   17,   17,   30,
+       17,   11,   11,   19,   27,    0,    3,    0,   28,   13,
+        0,    0,   12,    0,    0,    0,    0,    0,    0,    0,
+        0,   22,   24,   26,   25,   23,    0,   10,   29,    0,
+        0,    0,   15,   15,   17,   17,   17,   11,   11,   11,
+        0,   13,    0,   12,    0,    0,    0,   21,    0,    0,
+        0,    0,    0,    0,    0,    0,    0,   17,   11,   11,
+       11,    0,   14,   20,    0,    0,    0,    0,    0,    0,
+
+        0,    0,    0,    0,   17,    0,    0,    0,    0,    0,
+        0,    0,    0,    0,    0,   17,    7,    0,    0,    0,
+        0,    0,    0,    0,    2,    0,    0,    0,    0,    0,
+        0,    0,    0,    0,    4,   18,    0,    0,    5,    2,
+        0,    0,    0,    0,    0,    0,    0,    0,    0,    0,
+        0,    0,    1,    0,    0,    0,    0,    6,    9,    0,
+        0,    0,    0,    8,    0
+    } ;
+
+static yyconst flex_int32_t yy_ec[256] =
+    {   0,
+        1,    1,    1,    1,    1,    1,    1,    1,    2,    3,
+        4,    4,    4,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    2,    5,    6,    7,    1,    1,    8,    9,    1,
+        1,   10,   11,   11,   12,   11,   13,   14,   15,   16,
+       16,   16,   16,   16,   16,   16,   16,   17,    1,   18,
+       19,   20,   11,   11,   21,   21,   21,   21,   21,   21,
+       22,   22,   22,   22,   22,   23,   22,   22,   22,   22,
+       22,   22,   22,   22,   24,   22,   22,   25,   22,   22,
+        1,   26,   27,    1,   22,    1,   21,   28,   29,   30,
+
+       31,   21,   32,   22,   33,   22,   22,   34,   35,   36,
+       37,   38,   22,   39,   40,   41,   42,   43,   22,   25,
+       44,   22,   45,   46,   47,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1
+    } ;
+
+static yyconst flex_int32_t yy_meta[48] =
+    {   0,
+        1,    1,    1,    1,    1,    1,    2,    3,    1,    2,
+        2,    2,    4,    5,    5,    5,    6,    1,    1,    1,
+        7,    8,    8,    8,    8,    1,    1,    7,    7,    7,
+        7,    8,    8,    8,    8,    8,    8,    8,    8,    8,
+        8,    8,    8,    8,    3,    1,    4
+    } ;
+
+static yyconst flex_int16_t yy_base[180] =
+    {   0,
+        0,  393,   35,  392,   66,  391,   38,  107,  397,  401,
+       55,  113,  377,  112,  111,  111,  114,   42,  376,  106,
+      377,  347,  126,  120,    0,  147,  401,    0,  124,    0,
+      137,  158,  170,  163,  401,  153,  401,  389,  401,    0,
+      378,  120,  401,  131,  380,  386,  355,  139,  351,  355,
+      351,  401,  401,  401,  401,  401,  367,  401,  401,  185,
+      350,  346,  401,  364,    0,  185,  347,  189,  356,  355,
+        0,    0,  330,  180,  366,  141,  372,  361,  332,  338,
+      331,  341,  334,  326,  205,  331,  337,  329,  401,  341,
+      167,  316,  401,  349,  348,  320,  328,  346,  180,  318,
+
+      324,  209,  324,  320,  322,  342,  338,  309,  306,  315,
+      305,  315,  312,  192,  342,  341,  401,  293,  306,  282,
+      268,  252,  255,  203,  285,  282,  272,  268,  252,  233,
+      232,  239,  208,  107,  401,  401,  238,  211,  401,  211,
+      212,  208,  228,  203,  215,  207,  233,  222,  212,  211,
+      203,  227,  401,  237,  225,  204,  185,  401,  401,  149,
+      128,   88,   42,  401,  401,  253,  259,  267,  271,  275,
+      281,  288,  292,  300,  308,  312,  318,  326,  334
+    } ;
+
+static yyconst flex_int16_t yy_def[180] =
+    {   0,
+      165,    1,    1,    3,  165,    5,    1,    1,  165,  165,
+      165,  165,  165,  166,  167,  168,  165,  165,  165,  165,
+      169,  165,  165,  165,  170,  169,  165,  171,  172,  171,
+      171,  165,  165,  165,  165,  166,  165,  166,  165,  173,
+      165,  168,  165,  168,  174,  175,  165,  165,  165,  165,
+      165,  165,  165,  165,  165,  165,  169,  165,  165,  165,
+      165,  165,  165,  169,  171,  172,  171,  165,  165,  165,
+      176,  173,  177,  168,  174,  174,  175,  165,  165,  165,
+      165,  165,  165,  165,  165,  165,  165,  171,  165,  165,
+      176,  177,  165,  165,  165,  165,  165,  165,  165,  165,
+
+      165,  165,  165,  165,  171,  165,  165,  165,  165,  165,
+      165,  165,  165,  178,  165,  171,  165,  165,  165,  165,
+      165,  165,  165,  178,  165,  178,  165,  165,  165,  165,
+      165,  165,  165,  165,  165,  165,  165,  165,  165,  165,
+      165,  165,  165,  165,  165,  165,  165,  179,  165,  165,
+      165,  179,  165,  179,  165,  165,  165,  165,  165,  165,
+      165,  165,  165,  165,    0,  165,  165,  165,  165,  165,
+      165,  165,  165,  165,  165,  165,  165,  165,  165
+    } ;
+
+static yyconst flex_int16_t yy_nxt[449] =
+    {   0,
+       10,   11,   12,   11,   13,   14,   10,   15,   16,   10,
+       10,   10,   17,   10,   10,   10,   10,   18,   19,   20,
+       21,   21,   21,   21,   21,   10,   10,   21,   21,   21,
+       21,   21,   21,   21,   21,   21,   21,   21,   21,   21,
+       21,   21,   21,   21,   10,   22,   10,   24,   25,   25,
+       25,   32,   33,   33,  164,   26,   34,   34,   34,   52,
+       53,   27,   26,   26,   26,   26,   10,   11,   12,   11,
+       13,   14,   28,   15,   16,   28,   28,   28,   24,   28,
+       28,   28,   10,   18,   19,   20,   29,   29,   29,   29,
+       29,   30,   10,   29,   29,   29,   29,   29,   29,   29,
+
+       29,   29,   29,   29,   29,   29,   29,   29,   29,   29,
+       10,   22,   10,   23,   34,   34,   34,   37,   39,   43,
+       32,   33,   33,   45,   55,   56,   46,   60,   43,   45,
+       65,  163,   46,   65,   65,   65,   44,   38,   60,   74,
+       58,   47,  141,   48,  142,   44,   49,   47,   50,   48,
+       76,   51,   62,   94,   50,   41,   44,   51,   37,   61,
+       64,   64,   64,   58,   34,   34,   34,   64,  162,   80,
+       67,   68,   68,   68,   64,   64,   64,   64,   38,   81,
+       69,   70,   71,   68,   68,   68,   60,  161,   43,   69,
+       70,   65,   69,   70,   65,   65,   65,  125,   85,   85,
+
+       85,   58,   68,   68,   68,   44,  102,  110,  125,  133,
+      102,   69,   70,  111,  114,  160,  159,  126,   85,   85,
+       85,  140,  140,  140,  140,  140,  140,  153,  126,  147,
+      147,  147,  153,  148,  147,  147,  147,  158,  148,  165,
+      157,  156,  155,  151,  150,  149,  146,  154,  145,  144,
+      143,  139,  154,   36,   36,   36,   36,   36,   36,   36,
+       36,   40,  138,  137,  136,   40,   40,   42,   42,   42,
+       42,   42,   42,   42,   42,   57,   57,   57,   57,   63,
+      135,   63,   65,  134,  165,   65,  133,   65,   65,   66,
+      132,  131,   66,   66,   66,   66,   72,  130,   72,   72,
+
+       75,   75,   75,   75,   75,   75,   75,   75,   77,   77,
+       77,   77,   77,   77,   77,   77,   91,  129,   91,   92,
+      128,   92,   92,  127,   92,   92,  124,  124,  124,  124,
+      124,  124,  124,  124,  152,  152,  152,  152,  152,  152,
+      152,  152,   60,   60,  123,  122,  121,  120,  119,  118,
+      117,   45,  116,  111,  115,  113,  112,  109,  108,  107,
+       46,  106,   93,   89,  105,  104,  103,  101,  100,   99,
+       98,   97,   96,   95,   78,   76,   93,   90,   89,   88,
+       58,   87,   86,   58,   84,   83,   82,   79,   78,   76,
+       73,  165,   59,   58,   54,   35,  165,   31,   23,   23,
+
+        9,  165,  165,  165,  165,  165,  165,  165,  165,  165,
+      165,  165,  165,  165,  165,  165,  165,  165,  165,  165,
+      165,  165,  165,  165,  165,  165,  165,  165,  165,  165,
+      165,  165,  165,  165,  165,  165,  165,  165,  165,  165,
+      165,  165,  165,  165,  165,  165,  165,  165
+    } ;
+
+static yyconst flex_int16_t yy_chk[449] =
+    {   0,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    3,    3,    3,
+        3,    7,    7,    7,  163,    3,   11,   11,   11,   18,
+       18,    3,    3,    3,    3,    3,    5,    5,    5,    5,
+        5,    5,    5,    5,    5,    5,    5,    5,    5,    5,
+        5,    5,    5,    5,    5,    5,    5,    5,    5,    5,
+        5,    5,    5,    5,    5,    5,    5,    5,    5,    5,
+
+        5,    5,    5,    5,    5,    5,    5,    5,    5,    5,
+        5,    5,    5,    8,   12,   12,   12,   14,   15,   16,
+        8,    8,    8,   17,   20,   20,   17,   23,   42,   24,
+       29,  162,   24,   29,   29,   29,   16,   14,   31,   44,
+       29,   17,  134,   17,  134,   42,   17,   24,   17,   24,
+       76,   17,   24,   76,   24,   15,   44,   24,   36,   23,
+       26,   26,   26,   26,   34,   34,   34,   26,  161,   48,
+       31,   32,   32,   32,   26,   26,   26,   26,   36,   48,
+       32,   32,   32,   33,   33,   33,   60,  160,   74,   91,
+       91,   66,   33,   33,   66,   66,   66,  114,   60,   60,
+
+       60,   66,   68,   68,   68,   74,   85,   99,  124,  133,
+      102,   68,   68,   99,  102,  157,  156,  114,   85,   85,
+       85,  133,  133,  133,  140,  140,  140,  148,  124,  143,
+      143,  143,  152,  143,  147,  147,  147,  155,  147,  154,
+      151,  150,  149,  146,  145,  144,  142,  148,  141,  138,
+      137,  132,  152,  166,  166,  166,  166,  166,  166,  166,
+      166,  167,  131,  130,  129,  167,  167,  168,  168,  168,
+      168,  168,  168,  168,  168,  169,  169,  169,  169,  170,
+      128,  170,  171,  127,  126,  171,  125,  171,  171,  172,
+      123,  122,  172,  172,  172,  172,  173,  121,  173,  173,
+
+      174,  174,  174,  174,  174,  174,  174,  174,  175,  175,
+      175,  175,  175,  175,  175,  175,  176,  120,  176,  177,
+      119,  177,  177,  118,  177,  177,  178,  178,  178,  178,
+      178,  178,  178,  178,  179,  179,  179,  179,  179,  179,
+      179,  179,  116,  115,  113,  112,  111,  110,  109,  108,
+      107,  106,  105,  104,  103,  101,  100,   98,   97,   96,
+       95,   94,   92,   90,   88,   87,   86,   84,   83,   82,
+       81,   80,   79,   78,   77,   75,   73,   70,   69,   67,
+       64,   62,   61,   57,   51,   50,   49,   47,   46,   45,
+       41,   38,   22,   21,   19,   13,    9,    6,    4,    2,
+
+      165,  165,  165,  165,  165,  165,  165,  165,  165,  165,
+      165,  165,  165,  165,  165,  165,  165,  165,  165,  165,
+      165,  165,  165,  165,  165,  165,  165,  165,  165,  165,
+      165,  165,  165,  165,  165,  165,  165,  165,  165,  165,
+      165,  165,  165,  165,  165,  165,  165,  165
+    } ;
+
+static yy_state_type yy_last_accepting_state;
+static char *yy_last_accepting_cpos;
+
+extern int yy_flex_debug;
+int yy_flex_debug = 0;
+
+/* The intent behind this definition is that it'll catch
+ * any uses of REJECT which flex missed.
+ */
+#define REJECT reject_used_but_not_detected
+#define yymore() yymore_used_but_not_detected
+#define YY_MORE_ADJ 0
+#define YY_RESTORE_YY_MORE_OFFSET
+char *yytext;
+#line 1 "dtc-lexer.l"
+/*
+ * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation.  2005.
+ *
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ *  General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307
+ *                                                                   USA
+ */
+#define YY_NO_INPUT 1
+
+
+
+#line 37 "dtc-lexer.l"
+#include "dtc.h"
+#include "srcpos.h"
+#include "dtc-parser.tab.h"
+
+YYLTYPE yylloc;
+extern bool treesource_error;
+
+/* CAUTION: this will stop working if we ever use yyless() or yyunput() */
+#define	YY_USER_ACTION \
+	{ \
+		srcpos_update(&yylloc, yytext, yyleng); \
+	}
+
+/*#define LEXDEBUG	1*/
+
+#ifdef LEXDEBUG
+#define DPRINT(fmt, ...)	fprintf(stderr, fmt, ##__VA_ARGS__)
+#else
+#define DPRINT(fmt, ...)	do { } while (0)
+#endif
+
+static int dts_version = 1;
+
+#define BEGIN_DEFAULT()		DPRINT("<V1>\n"); \
+				BEGIN(V1); \
+
+static void push_input_file(const char *filename);
+static bool pop_input_file(void);
+#ifdef __GNUC__
+static void lexical_error(const char *fmt, ...)
+	__attribute__((format (printf, 1, 2)));
+#else
+static void lexical_error(const char *fmt, ...);
+#endif
+
+#line 674 "dtc-lexer.lex.c"
+
+#define INITIAL 0
+#define BYTESTRING 1
+#define PROPNODENAME 2
+#define V1 3
+
+#ifndef YY_NO_UNISTD_H
+/* Special case for "unistd.h", since it is non-ANSI. We include it way
+ * down here because we want the user's section 1 to have been scanned first.
+ * The user has a chance to override it with an option.
+ */
+#include <unistd.h>
+#endif
+
+#ifndef YY_EXTRA_TYPE
+#define YY_EXTRA_TYPE void *
+#endif
+
+static int yy_init_globals (void );
+
+/* Accessor methods to globals.
+   These are made visible to non-reentrant scanners for convenience. */
+
+int yylex_destroy (void );
+
+int yyget_debug (void );
+
+void yyset_debug (int debug_flag  );
+
+YY_EXTRA_TYPE yyget_extra (void );
+
+void yyset_extra (YY_EXTRA_TYPE user_defined  );
+
+FILE *yyget_in (void );
+
+void yyset_in  (FILE * in_str  );
+
+FILE *yyget_out (void );
+
+void yyset_out  (FILE * out_str  );
+
+int yyget_leng (void );
+
+char *yyget_text (void );
+
+int yyget_lineno (void );
+
+void yyset_lineno (int line_number  );
+
+/* Macros after this point can all be overridden by user definitions in
+ * section 1.
+ */
+
+#ifndef YY_SKIP_YYWRAP
+#ifdef __cplusplus
+extern "C" int yywrap (void );
+#else
+extern int yywrap (void );
+#endif
+#endif
+
+#ifndef yytext_ptr
+static void yy_flex_strncpy (char *,yyconst char *,int );
+#endif
+
+#ifdef YY_NEED_STRLEN
+static int yy_flex_strlen (yyconst char * );
+#endif
+
+#ifndef YY_NO_INPUT
+
+#ifdef __cplusplus
+static int yyinput (void );
+#else
+static int input (void );
+#endif
+
+#endif
+
+/* Amount of stuff to slurp up with each read. */
+#ifndef YY_READ_BUF_SIZE
+#ifdef __ia64__
+/* On IA-64, the buffer size is 16k, not 8k */
+#define YY_READ_BUF_SIZE 16384
+#else
+#define YY_READ_BUF_SIZE 8192
+#endif /* __ia64__ */
+#endif
+
+/* Copy whatever the last rule matched to the standard output. */
+#ifndef ECHO
+/* This used to be an fputs(), but since the string might contain NUL's,
+ * we now use fwrite().
+ */
+#define ECHO do { if (fwrite( yytext, yyleng, 1, yyout )) {} } while (0)
+#endif
+
+/* Gets input and stuffs it into "buf".  number of characters read, or YY_NULL,
+ * is returned in "result".
+ */
+#ifndef YY_INPUT
+#define YY_INPUT(buf,result,max_size) \
+	if ( YY_CURRENT_BUFFER_LVALUE->yy_is_interactive ) \
+		{ \
+		int c = '*'; \
+		size_t n; \
+		for ( n = 0; n < max_size && \
+			     (c = getc( yyin )) != EOF && c != '\n'; ++n ) \
+			buf[n] = (char) c; \
+		if ( c == '\n' ) \
+			buf[n++] = (char) c; \
+		if ( c == EOF && ferror( yyin ) ) \
+			YY_FATAL_ERROR( "input in flex scanner failed" ); \
+		result = n; \
+		} \
+	else \
+		{ \
+		errno=0; \
+		while ( (result = fread(buf, 1, max_size, yyin))==0 && ferror(yyin)) \
+			{ \
+			if( errno != EINTR) \
+				{ \
+				YY_FATAL_ERROR( "input in flex scanner failed" ); \
+				break; \
+				} \
+			errno=0; \
+			clearerr(yyin); \
+			} \
+		}\
+\
+
+#endif
+
+/* No semi-colon after return; correct usage is to write "yyterminate();" -
+ * we don't want an extra ';' after the "return" because that will cause
+ * some compilers to complain about unreachable statements.
+ */
+#ifndef yyterminate
+#define yyterminate() return YY_NULL
+#endif
+
+/* Number of entries by which start-condition stack grows. */
+#ifndef YY_START_STACK_INCR
+#define YY_START_STACK_INCR 25
+#endif
+
+/* Report a fatal error. */
+#ifndef YY_FATAL_ERROR
+#define YY_FATAL_ERROR(msg) yy_fatal_error( msg )
+#endif
+
+/* end tables serialization structures and prototypes */
+
+/* Default declaration of generated scanner - a define so the user can
+ * easily add parameters.
+ */
+#ifndef YY_DECL
+#define YY_DECL_IS_OURS 1
+
+extern int yylex (void);
+
+#define YY_DECL int yylex (void)
+#endif /* !YY_DECL */
+
+/* Code executed at the beginning of each rule, after yytext and yyleng
+ * have been set up.
+ */
+#ifndef YY_USER_ACTION
+#define YY_USER_ACTION
+#endif
+
+/* Code executed at the end of each rule. */
+#ifndef YY_BREAK
+#define YY_BREAK break;
+#endif
+
+#define YY_RULE_SETUP \
+	if ( yyleng > 0 ) \
+		YY_CURRENT_BUFFER_LVALUE->yy_at_bol = \
+				(yytext[yyleng - 1] == '\n'); \
+	YY_USER_ACTION
+
+/** The main scanner function which does all the work.
+ */
+YY_DECL
+{
+	register yy_state_type yy_current_state;
+	register char *yy_cp, *yy_bp;
+	register int yy_act;
+    
+#line 74 "dtc-lexer.l"
+
+#line 867 "dtc-lexer.lex.c"
+
+	if ( !(yy_init) )
+		{
+		(yy_init) = 1;
+
+#ifdef YY_USER_INIT
+		YY_USER_INIT;
+#endif
+
+		if ( ! (yy_start) )
+			(yy_start) = 1;	/* first start state */
+
+		if ( ! yyin )
+			yyin = stdin;
+
+		if ( ! yyout )
+			yyout = stdout;
+
+		if ( ! YY_CURRENT_BUFFER ) {
+			yyensure_buffer_stack ();
+			YY_CURRENT_BUFFER_LVALUE =
+				yy_create_buffer(yyin,YY_BUF_SIZE );
+		}
+
+		yy_load_buffer_state( );
+		}
+
+	while ( 1 )		/* loops until end-of-file is reached */
+		{
+		yy_cp = (yy_c_buf_p);
+
+		/* Support of yytext. */
+		*yy_cp = (yy_hold_char);
+
+		/* yy_bp points to the position in yy_ch_buf of the start of
+		 * the current run.
+		 */
+		yy_bp = yy_cp;
+
+		yy_current_state = (yy_start);
+		yy_current_state += YY_AT_BOL();
+yy_match:
+		do
+			{
+			register YY_CHAR yy_c = yy_ec[YY_SC_TO_UI(*yy_cp)];
+			if ( yy_accept[yy_current_state] )
+				{
+				(yy_last_accepting_state) = yy_current_state;
+				(yy_last_accepting_cpos) = yy_cp;
+				}
+			while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state )
+				{
+				yy_current_state = (int) yy_def[yy_current_state];
+				if ( yy_current_state >= 166 )
+					yy_c = yy_meta[(unsigned int) yy_c];
+				}
+			yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
+			++yy_cp;
+			}
+		while ( yy_current_state != 165 );
+		yy_cp = (yy_last_accepting_cpos);
+		yy_current_state = (yy_last_accepting_state);
+
+yy_find_action:
+		yy_act = yy_accept[yy_current_state];
+
+		YY_DO_BEFORE_ACTION;
+
+do_action:	/* This label is used only to access EOF actions. */
+
+		switch ( yy_act )
+	{ /* beginning of action switch */
+			case 0: /* must back up */
+			/* undo the effects of YY_DO_BEFORE_ACTION */
+			*yy_cp = (yy_hold_char);
+			yy_cp = (yy_last_accepting_cpos);
+			yy_current_state = (yy_last_accepting_state);
+			goto yy_find_action;
+
+case 1:
+/* rule 1 can match eol */
+YY_RULE_SETUP
+#line 75 "dtc-lexer.l"
+{
+			char *name = strchr(yytext, '\"') + 1;
+			yytext[yyleng-1] = '\0';
+			push_input_file(name);
+		}
+	YY_BREAK
+case 2:
+/* rule 2 can match eol */
+YY_RULE_SETUP
+#line 81 "dtc-lexer.l"
+{
+			char *line, *fnstart, *fnend;
+			struct data fn;
+			/* skip text before line # */
+			line = yytext;
+			while (!isdigit((unsigned char)*line))
+				line++;
+
+			/* regexp ensures that first and list "
+			 * in the whole yytext are those at
+			 * beginning and end of the filename string */
+			fnstart = memchr(yytext, '"', yyleng);
+			for (fnend = yytext + yyleng - 1;
+			     *fnend != '"'; fnend--)
+				;
+			assert(fnstart && fnend && (fnend > fnstart));
+
+			fn = data_copy_escape_string(fnstart + 1,
+						     fnend - fnstart - 1);
+
+			/* Don't allow nuls in filenames */
+			if (memchr(fn.val, '\0', fn.len - 1))
+				lexical_error("nul in line number directive");
+
+			/* -1 since #line is the number of the next line */
+			srcpos_set_line(xstrdup(fn.val), atoi(line) - 1);
+			data_free(fn);
+		}
+	YY_BREAK
+case YY_STATE_EOF(INITIAL):
+case YY_STATE_EOF(BYTESTRING):
+case YY_STATE_EOF(PROPNODENAME):
+case YY_STATE_EOF(V1):
+#line 110 "dtc-lexer.l"
+{
+			if (!pop_input_file()) {
+				yyterminate();
+			}
+		}
+	YY_BREAK
+case 3:
+/* rule 3 can match eol */
+YY_RULE_SETUP
+#line 116 "dtc-lexer.l"
+{
+			DPRINT("String: %s\n", yytext);
+			yylval.data = data_copy_escape_string(yytext+1,
+					yyleng-2);
+			return DT_STRING;
+		}
+	YY_BREAK
+case 4:
+YY_RULE_SETUP
+#line 123 "dtc-lexer.l"
+{
+			DPRINT("Keyword: /dts-v1/\n");
+			dts_version = 1;
+			BEGIN_DEFAULT();
+			return DT_V1;
+		}
+	YY_BREAK
+case 5:
+YY_RULE_SETUP
+#line 130 "dtc-lexer.l"
+{
+			DPRINT("Keyword: /plugin/\n");
+			return DT_PLUGIN;
+		}
+	YY_BREAK
+case 6:
+YY_RULE_SETUP
+#line 135 "dtc-lexer.l"
+{
+			DPRINT("Keyword: /memreserve/\n");
+			BEGIN_DEFAULT();
+			return DT_MEMRESERVE;
+		}
+	YY_BREAK
+case 7:
+YY_RULE_SETUP
+#line 141 "dtc-lexer.l"
+{
+			DPRINT("Keyword: /bits/\n");
+			BEGIN_DEFAULT();
+			return DT_BITS;
+		}
+	YY_BREAK
+case 8:
+YY_RULE_SETUP
+#line 147 "dtc-lexer.l"
+{
+			DPRINT("Keyword: /delete-property/\n");
+			DPRINT("<PROPNODENAME>\n");
+			BEGIN(PROPNODENAME);
+			return DT_DEL_PROP;
+		}
+	YY_BREAK
+case 9:
+YY_RULE_SETUP
+#line 154 "dtc-lexer.l"
+{
+			DPRINT("Keyword: /delete-node/\n");
+			DPRINT("<PROPNODENAME>\n");
+			BEGIN(PROPNODENAME);
+			return DT_DEL_NODE;
+		}
+	YY_BREAK
+case 10:
+YY_RULE_SETUP
+#line 161 "dtc-lexer.l"
+{
+			DPRINT("Label: %s\n", yytext);
+			yylval.labelref = xstrdup(yytext);
+			yylval.labelref[yyleng-1] = '\0';
+			return DT_LABEL;
+		}
+	YY_BREAK
+case 11:
+YY_RULE_SETUP
+#line 168 "dtc-lexer.l"
+{
+			char *e;
+			DPRINT("Integer Literal: '%s'\n", yytext);
+
+			errno = 0;
+			yylval.integer = strtoull(yytext, &e, 0);
+
+			if (*e && e[strspn(e, "UL")]) {
+				lexical_error("Bad integer literal '%s'",
+					      yytext);
+			}
+
+			if (errno == ERANGE)
+				lexical_error("Integer literal '%s' out of range",
+					      yytext);
+			else
+				/* ERANGE is the only strtoull error triggerable
+				 *  by strings matching the pattern */
+				assert(errno == 0);
+			return DT_LITERAL;
+		}
+	YY_BREAK
+case 12:
+/* rule 12 can match eol */
+YY_RULE_SETUP
+#line 190 "dtc-lexer.l"
+{
+			struct data d;
+			DPRINT("Character literal: %s\n", yytext);
+
+			d = data_copy_escape_string(yytext+1, yyleng-2);
+			if (d.len == 1) {
+				lexical_error("Empty character literal");
+				yylval.integer = 0;
+			} else {
+				yylval.integer = (unsigned char)d.val[0];
+
+				if (d.len > 2)
+					lexical_error("Character literal has %d"
+						      " characters instead of 1",
+						      d.len - 1);
+			}
+
+			data_free(d);
+			return DT_CHAR_LITERAL;
+		}
+	YY_BREAK
+case 13:
+YY_RULE_SETUP
+#line 211 "dtc-lexer.l"
+{	/* label reference */
+			DPRINT("Ref: %s\n", yytext+1);
+			yylval.labelref = xstrdup(yytext+1);
+			return DT_REF;
+		}
+	YY_BREAK
+case 14:
+YY_RULE_SETUP
+#line 217 "dtc-lexer.l"
+{	/* new-style path reference */
+			yytext[yyleng-1] = '\0';
+			DPRINT("Ref: %s\n", yytext+2);
+			yylval.labelref = xstrdup(yytext+2);
+			return DT_REF;
+		}
+	YY_BREAK
+case 15:
+YY_RULE_SETUP
+#line 224 "dtc-lexer.l"
+{
+			yylval.byte = strtol(yytext, NULL, 16);
+			DPRINT("Byte: %02x\n", (int)yylval.byte);
+			return DT_BYTE;
+		}
+	YY_BREAK
+case 16:
+YY_RULE_SETUP
+#line 230 "dtc-lexer.l"
+{
+			DPRINT("/BYTESTRING\n");
+			BEGIN_DEFAULT();
+			return ']';
+		}
+	YY_BREAK
+case 17:
+YY_RULE_SETUP
+#line 236 "dtc-lexer.l"
+{
+			DPRINT("PropNodeName: %s\n", yytext);
+			yylval.propnodename = xstrdup((yytext[0] == '\\') ?
+							yytext + 1 : yytext);
+			BEGIN_DEFAULT();
+			return DT_PROPNODENAME;
+		}
+	YY_BREAK
+case 18:
+YY_RULE_SETUP
+#line 244 "dtc-lexer.l"
+{
+			DPRINT("Binary Include\n");
+			return DT_INCBIN;
+		}
+	YY_BREAK
+case 19:
+/* rule 19 can match eol */
+YY_RULE_SETUP
+#line 249 "dtc-lexer.l"
+/* eat whitespace */
+	YY_BREAK
+case 20:
+/* rule 20 can match eol */
+YY_RULE_SETUP
+#line 250 "dtc-lexer.l"
+/* eat C-style comments */
+	YY_BREAK
+case 21:
+/* rule 21 can match eol */
+YY_RULE_SETUP
+#line 251 "dtc-lexer.l"
+/* eat C++-style comments */
+	YY_BREAK
+case 22:
+YY_RULE_SETUP
+#line 253 "dtc-lexer.l"
+{ return DT_LSHIFT; };
+	YY_BREAK
+case 23:
+YY_RULE_SETUP
+#line 254 "dtc-lexer.l"
+{ return DT_RSHIFT; };
+	YY_BREAK
+case 24:
+YY_RULE_SETUP
+#line 255 "dtc-lexer.l"
+{ return DT_LE; };
+	YY_BREAK
+case 25:
+YY_RULE_SETUP
+#line 256 "dtc-lexer.l"
+{ return DT_GE; };
+	YY_BREAK
+case 26:
+YY_RULE_SETUP
+#line 257 "dtc-lexer.l"
+{ return DT_EQ; };
+	YY_BREAK
+case 27:
+YY_RULE_SETUP
+#line 258 "dtc-lexer.l"
+{ return DT_NE; };
+	YY_BREAK
+case 28:
+YY_RULE_SETUP
+#line 259 "dtc-lexer.l"
+{ return DT_AND; };
+	YY_BREAK
+case 29:
+YY_RULE_SETUP
+#line 260 "dtc-lexer.l"
+{ return DT_OR; };
+	YY_BREAK
+case 30:
+YY_RULE_SETUP
+#line 262 "dtc-lexer.l"
+{
+			DPRINT("Char: %c (\\x%02x)\n", yytext[0],
+				(unsigned)yytext[0]);
+			if (yytext[0] == '[') {
+				DPRINT("<BYTESTRING>\n");
+				BEGIN(BYTESTRING);
+			}
+			if ((yytext[0] == '{')
+			    || (yytext[0] == ';')) {
+				DPRINT("<PROPNODENAME>\n");
+				BEGIN(PROPNODENAME);
+			}
+			return yytext[0];
+		}
+	YY_BREAK
+case 31:
+YY_RULE_SETUP
+#line 277 "dtc-lexer.l"
+ECHO;
+	YY_BREAK
+#line 1265 "dtc-lexer.lex.c"
+
+	case YY_END_OF_BUFFER:
+		{
+		/* Amount of text matched not including the EOB char. */
+		int yy_amount_of_matched_text = (int) (yy_cp - (yytext_ptr)) - 1;
+
+		/* Undo the effects of YY_DO_BEFORE_ACTION. */
+		*yy_cp = (yy_hold_char);
+		YY_RESTORE_YY_MORE_OFFSET
+
+		if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_NEW )
+			{
+			/* We're scanning a new file or input source.  It's
+			 * possible that this happened because the user
+			 * just pointed yyin at a new source and called
+			 * yylex().  If so, then we have to assure
+			 * consistency between YY_CURRENT_BUFFER and our
+			 * globals.  Here is the right place to do so, because
+			 * this is the first action (other than possibly a
+			 * back-up) that will match for the new input source.
+			 */
+			(yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars;
+			YY_CURRENT_BUFFER_LVALUE->yy_input_file = yyin;
+			YY_CURRENT_BUFFER_LVALUE->yy_buffer_status = YY_BUFFER_NORMAL;
+			}
+
+		/* Note that here we test for yy_c_buf_p "<=" to the position
+		 * of the first EOB in the buffer, since yy_c_buf_p will
+		 * already have been incremented past the NUL character
+		 * (since all states make transitions on EOB to the
+		 * end-of-buffer state).  Contrast this with the test
+		 * in input().
+		 */
+		if ( (yy_c_buf_p) <= &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] )
+			{ /* This was really a NUL. */
+			yy_state_type yy_next_state;
+
+			(yy_c_buf_p) = (yytext_ptr) + yy_amount_of_matched_text;
+
+			yy_current_state = yy_get_previous_state(  );
+
+			/* Okay, we're now positioned to make the NUL
+			 * transition.  We couldn't have
+			 * yy_get_previous_state() go ahead and do it
+			 * for us because it doesn't know how to deal
+			 * with the possibility of jamming (and we don't
+			 * want to build jamming into it because then it
+			 * will run more slowly).
+			 */
+
+			yy_next_state = yy_try_NUL_trans( yy_current_state );
+
+			yy_bp = (yytext_ptr) + YY_MORE_ADJ;
+
+			if ( yy_next_state )
+				{
+				/* Consume the NUL. */
+				yy_cp = ++(yy_c_buf_p);
+				yy_current_state = yy_next_state;
+				goto yy_match;
+				}
+
+			else
+				{
+				yy_cp = (yy_last_accepting_cpos);
+				yy_current_state = (yy_last_accepting_state);
+				goto yy_find_action;
+				}
+			}
+
+		else switch ( yy_get_next_buffer(  ) )
+			{
+			case EOB_ACT_END_OF_FILE:
+				{
+				(yy_did_buffer_switch_on_eof) = 0;
+
+				if ( yywrap( ) )
+					{
+					/* Note: because we've taken care in
+					 * yy_get_next_buffer() to have set up
+					 * yytext, we can now set up
+					 * yy_c_buf_p so that if some total
+					 * hoser (like flex itself) wants to
+					 * call the scanner after we return the
+					 * YY_NULL, it'll still work - another
+					 * YY_NULL will get returned.
+					 */
+					(yy_c_buf_p) = (yytext_ptr) + YY_MORE_ADJ;
+
+					yy_act = YY_STATE_EOF(YY_START);
+					goto do_action;
+					}
+
+				else
+					{
+					if ( ! (yy_did_buffer_switch_on_eof) )
+						YY_NEW_FILE;
+					}
+				break;
+				}
+
+			case EOB_ACT_CONTINUE_SCAN:
+				(yy_c_buf_p) =
+					(yytext_ptr) + yy_amount_of_matched_text;
+
+				yy_current_state = yy_get_previous_state(  );
+
+				yy_cp = (yy_c_buf_p);
+				yy_bp = (yytext_ptr) + YY_MORE_ADJ;
+				goto yy_match;
+
+			case EOB_ACT_LAST_MATCH:
+				(yy_c_buf_p) =
+				&YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)];
+
+				yy_current_state = yy_get_previous_state(  );
+
+				yy_cp = (yy_c_buf_p);
+				yy_bp = (yytext_ptr) + YY_MORE_ADJ;
+				goto yy_find_action;
+			}
+		break;
+		}
+
+	default:
+		YY_FATAL_ERROR(
+			"fatal flex scanner internal error--no action found" );
+	} /* end of action switch */
+		} /* end of scanning one token */
+} /* end of yylex */
+
+/* yy_get_next_buffer - try to read in a new buffer
+ *
+ * Returns a code representing an action:
+ *	EOB_ACT_LAST_MATCH -
+ *	EOB_ACT_CONTINUE_SCAN - continue scanning from current position
+ *	EOB_ACT_END_OF_FILE - end of file
+ */
+static int yy_get_next_buffer (void)
+{
+    	register char *dest = YY_CURRENT_BUFFER_LVALUE->yy_ch_buf;
+	register char *source = (yytext_ptr);
+	register int number_to_move, i;
+	int ret_val;
+
+	if ( (yy_c_buf_p) > &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] )
+		YY_FATAL_ERROR(
+		"fatal flex scanner internal error--end of buffer missed" );
+
+	if ( YY_CURRENT_BUFFER_LVALUE->yy_fill_buffer == 0 )
+		{ /* Don't try to fill the buffer, so this is an EOF. */
+		if ( (yy_c_buf_p) - (yytext_ptr) - YY_MORE_ADJ == 1 )
+			{
+			/* We matched a single character, the EOB, so
+			 * treat this as a final EOF.
+			 */
+			return EOB_ACT_END_OF_FILE;
+			}
+
+		else
+			{
+			/* We matched some text prior to the EOB, first
+			 * process it.
+			 */
+			return EOB_ACT_LAST_MATCH;
+			}
+		}
+
+	/* Try to read more data. */
+
+	/* First move last chars to start of buffer. */
+	number_to_move = (int) ((yy_c_buf_p) - (yytext_ptr)) - 1;
+
+	for ( i = 0; i < number_to_move; ++i )
+		*(dest++) = *(source++);
+
+	if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_EOF_PENDING )
+		/* don't do the read, it's not guaranteed to return an EOF,
+		 * just force an EOF
+		 */
+		YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars) = 0;
+
+	else
+		{
+			int num_to_read =
+			YY_CURRENT_BUFFER_LVALUE->yy_buf_size - number_to_move - 1;
+
+		while ( num_to_read <= 0 )
+			{ /* Not enough room in the buffer - grow it. */
+
+			/* just a shorter name for the current buffer */
+			YY_BUFFER_STATE b = YY_CURRENT_BUFFER;
+
+			int yy_c_buf_p_offset =
+				(int) ((yy_c_buf_p) - b->yy_ch_buf);
+
+			if ( b->yy_is_our_buffer )
+				{
+				int new_size = b->yy_buf_size * 2;
+
+				if ( new_size <= 0 )
+					b->yy_buf_size += b->yy_buf_size / 8;
+				else
+					b->yy_buf_size *= 2;
+
+				b->yy_ch_buf = (char *)
+					/* Include room in for 2 EOB chars. */
+					yyrealloc((void *) b->yy_ch_buf,b->yy_buf_size + 2  );
+				}
+			else
+				/* Can't grow it, we don't own it. */
+				b->yy_ch_buf = 0;
+
+			if ( ! b->yy_ch_buf )
+				YY_FATAL_ERROR(
+				"fatal error - scanner input buffer overflow" );
+
+			(yy_c_buf_p) = &b->yy_ch_buf[yy_c_buf_p_offset];
+
+			num_to_read = YY_CURRENT_BUFFER_LVALUE->yy_buf_size -
+						number_to_move - 1;
+
+			}
+
+		if ( num_to_read > YY_READ_BUF_SIZE )
+			num_to_read = YY_READ_BUF_SIZE;
+
+		/* Read in more data. */
+		YY_INPUT( (&YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move]),
+			(yy_n_chars), (size_t) num_to_read );
+
+		YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars);
+		}
+
+	if ( (yy_n_chars) == 0 )
+		{
+		if ( number_to_move == YY_MORE_ADJ )
+			{
+			ret_val = EOB_ACT_END_OF_FILE;
+			yyrestart(yyin  );
+			}
+
+		else
+			{
+			ret_val = EOB_ACT_LAST_MATCH;
+			YY_CURRENT_BUFFER_LVALUE->yy_buffer_status =
+				YY_BUFFER_EOF_PENDING;
+			}
+		}
+
+	else
+		ret_val = EOB_ACT_CONTINUE_SCAN;
+
+	if ((yy_size_t) ((yy_n_chars) + number_to_move) > YY_CURRENT_BUFFER_LVALUE->yy_buf_size) {
+		/* Extend the array by 50%, plus the number we really need. */
+		yy_size_t new_size = (yy_n_chars) + number_to_move + ((yy_n_chars) >> 1);
+		YY_CURRENT_BUFFER_LVALUE->yy_ch_buf = (char *) yyrealloc((void *) YY_CURRENT_BUFFER_LVALUE->yy_ch_buf,new_size  );
+		if ( ! YY_CURRENT_BUFFER_LVALUE->yy_ch_buf )
+			YY_FATAL_ERROR( "out of dynamic memory in yy_get_next_buffer()" );
+	}
+
+	(yy_n_chars) += number_to_move;
+	YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] = YY_END_OF_BUFFER_CHAR;
+	YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] = YY_END_OF_BUFFER_CHAR;
+
+	(yytext_ptr) = &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[0];
+
+	return ret_val;
+}
+
+/* yy_get_previous_state - get the state just before the EOB char was reached */
+
+    static yy_state_type yy_get_previous_state (void)
+{
+	register yy_state_type yy_current_state;
+	register char *yy_cp;
+    
+	yy_current_state = (yy_start);
+	yy_current_state += YY_AT_BOL();
+
+	for ( yy_cp = (yytext_ptr) + YY_MORE_ADJ; yy_cp < (yy_c_buf_p); ++yy_cp )
+		{
+		register YY_CHAR yy_c = (*yy_cp ? yy_ec[YY_SC_TO_UI(*yy_cp)] : 1);
+		if ( yy_accept[yy_current_state] )
+			{
+			(yy_last_accepting_state) = yy_current_state;
+			(yy_last_accepting_cpos) = yy_cp;
+			}
+		while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state )
+			{
+			yy_current_state = (int) yy_def[yy_current_state];
+			if ( yy_current_state >= 166 )
+				yy_c = yy_meta[(unsigned int) yy_c];
+			}
+		yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
+		}
+
+	return yy_current_state;
+}
+
+/* yy_try_NUL_trans - try to make a transition on the NUL character
+ *
+ * synopsis
+ *	next_state = yy_try_NUL_trans( current_state );
+ */
+    static yy_state_type yy_try_NUL_trans  (yy_state_type yy_current_state )
+{
+	register int yy_is_jam;
+    	register char *yy_cp = (yy_c_buf_p);
+
+	register YY_CHAR yy_c = 1;
+	if ( yy_accept[yy_current_state] )
+		{
+		(yy_last_accepting_state) = yy_current_state;
+		(yy_last_accepting_cpos) = yy_cp;
+		}
+	while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state )
+		{
+		yy_current_state = (int) yy_def[yy_current_state];
+		if ( yy_current_state >= 166 )
+			yy_c = yy_meta[(unsigned int) yy_c];
+		}
+	yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
+	yy_is_jam = (yy_current_state == 165);
+
+	return yy_is_jam ? 0 : yy_current_state;
+}
+
+#ifndef YY_NO_INPUT
+#ifdef __cplusplus
+    static int yyinput (void)
+#else
+    static int input  (void)
+#endif
+
+{
+	int c;
+    
+	*(yy_c_buf_p) = (yy_hold_char);
+
+	if ( *(yy_c_buf_p) == YY_END_OF_BUFFER_CHAR )
+		{
+		/* yy_c_buf_p now points to the character we want to return.
+		 * If this occurs *before* the EOB characters, then it's a
+		 * valid NUL; if not, then we've hit the end of the buffer.
+		 */
+		if ( (yy_c_buf_p) < &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] )
+			/* This was really a NUL. */
+			*(yy_c_buf_p) = '\0';
+
+		else
+			{ /* need more input */
+			int offset = (yy_c_buf_p) - (yytext_ptr);
+			++(yy_c_buf_p);
+
+			switch ( yy_get_next_buffer(  ) )
+				{
+				case EOB_ACT_LAST_MATCH:
+					/* This happens because yy_g_n_b()
+					 * sees that we've accumulated a
+					 * token and flags that we need to
+					 * try matching the token before
+					 * proceeding.  But for input(),
+					 * there's no matching to consider.
+					 * So convert the EOB_ACT_LAST_MATCH
+					 * to EOB_ACT_END_OF_FILE.
+					 */
+
+					/* Reset buffer status. */
+					yyrestart(yyin );
+
+					/*FALLTHROUGH*/
+
+				case EOB_ACT_END_OF_FILE:
+					{
+					if ( yywrap( ) )
+						return EOF;
+
+					if ( ! (yy_did_buffer_switch_on_eof) )
+						YY_NEW_FILE;
+#ifdef __cplusplus
+					return yyinput();
+#else
+					return input();
+#endif
+					}
+
+				case EOB_ACT_CONTINUE_SCAN:
+					(yy_c_buf_p) = (yytext_ptr) + offset;
+					break;
+				}
+			}
+		}
+
+	c = *(unsigned char *) (yy_c_buf_p);	/* cast for 8-bit char's */
+	*(yy_c_buf_p) = '\0';	/* preserve yytext */
+	(yy_hold_char) = *++(yy_c_buf_p);
+
+	YY_CURRENT_BUFFER_LVALUE->yy_at_bol = (c == '\n');
+
+	return c;
+}
+#endif	/* ifndef YY_NO_INPUT */
+
+/** Immediately switch to a different input stream.
+ * @param input_file A readable stream.
+ * 
+ * @note This function does not reset the start condition to @c INITIAL .
+ */
+    void yyrestart  (FILE * input_file )
+{
+    
+	if ( ! YY_CURRENT_BUFFER ){
+        yyensure_buffer_stack ();
+		YY_CURRENT_BUFFER_LVALUE =
+            yy_create_buffer(yyin,YY_BUF_SIZE );
+	}
+
+	yy_init_buffer(YY_CURRENT_BUFFER,input_file );
+	yy_load_buffer_state( );
+}
+
+/** Switch to a different input buffer.
+ * @param new_buffer The new input buffer.
+ * 
+ */
+    void yy_switch_to_buffer  (YY_BUFFER_STATE  new_buffer )
+{
+    
+	/* TODO. We should be able to replace this entire function body
+	 * with
+	 *		yypop_buffer_state();
+	 *		yypush_buffer_state(new_buffer);
+     */
+	yyensure_buffer_stack ();
+	if ( YY_CURRENT_BUFFER == new_buffer )
+		return;
+
+	if ( YY_CURRENT_BUFFER )
+		{
+		/* Flush out information for old buffer. */
+		*(yy_c_buf_p) = (yy_hold_char);
+		YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p);
+		YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars);
+		}
+
+	YY_CURRENT_BUFFER_LVALUE = new_buffer;
+	yy_load_buffer_state( );
+
+	/* We don't actually know whether we did this switch during
+	 * EOF (yywrap()) processing, but the only time this flag
+	 * is looked at is after yywrap() is called, so it's safe
+	 * to go ahead and always set it.
+	 */
+	(yy_did_buffer_switch_on_eof) = 1;
+}
+
+static void yy_load_buffer_state  (void)
+{
+    	(yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars;
+	(yytext_ptr) = (yy_c_buf_p) = YY_CURRENT_BUFFER_LVALUE->yy_buf_pos;
+	yyin = YY_CURRENT_BUFFER_LVALUE->yy_input_file;
+	(yy_hold_char) = *(yy_c_buf_p);
+}
+
+/** Allocate and initialize an input buffer state.
+ * @param file A readable stream.
+ * @param size The character buffer size in bytes. When in doubt, use @c YY_BUF_SIZE.
+ * 
+ * @return the allocated buffer state.
+ */
+    YY_BUFFER_STATE yy_create_buffer  (FILE * file, int  size )
+{
+	YY_BUFFER_STATE b;
+    
+	b = (YY_BUFFER_STATE) yyalloc(sizeof( struct yy_buffer_state )  );
+	if ( ! b )
+		YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" );
+
+	b->yy_buf_size = size;
+
+	/* yy_ch_buf has to be 2 characters longer than the size given because
+	 * we need to put in 2 end-of-buffer characters.
+	 */
+	b->yy_ch_buf = (char *) yyalloc(b->yy_buf_size + 2  );
+	if ( ! b->yy_ch_buf )
+		YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" );
+
+	b->yy_is_our_buffer = 1;
+
+	yy_init_buffer(b,file );
+
+	return b;
+}
+
+/** Destroy the buffer.
+ * @param b a buffer created with yy_create_buffer()
+ * 
+ */
+    void yy_delete_buffer (YY_BUFFER_STATE  b )
+{
+    
+	if ( ! b )
+		return;
+
+	if ( b == YY_CURRENT_BUFFER ) /* Not sure if we should pop here. */
+		YY_CURRENT_BUFFER_LVALUE = (YY_BUFFER_STATE) 0;
+
+	if ( b->yy_is_our_buffer )
+		yyfree((void *) b->yy_ch_buf  );
+
+	yyfree((void *) b  );
+}
+
+/* Initializes or reinitializes a buffer.
+ * This function is sometimes called more than once on the same buffer,
+ * such as during a yyrestart() or at EOF.
+ */
+    static void yy_init_buffer  (YY_BUFFER_STATE  b, FILE * file )
+
+{
+	int oerrno = errno;
+    
+	yy_flush_buffer(b );
+
+	b->yy_input_file = file;
+	b->yy_fill_buffer = 1;
+
+    /* If b is the current buffer, then yy_init_buffer was _probably_
+     * called from yyrestart() or through yy_get_next_buffer.
+     * In that case, we don't want to reset the lineno or column.
+     */
+    if (b != YY_CURRENT_BUFFER){
+        b->yy_bs_lineno = 1;
+        b->yy_bs_column = 0;
+    }
+
+        b->yy_is_interactive = 0;
+    
+	errno = oerrno;
+}
+
+/** Discard all buffered characters. On the next scan, YY_INPUT will be called.
+ * @param b the buffer state to be flushed, usually @c YY_CURRENT_BUFFER.
+ * 
+ */
+    void yy_flush_buffer (YY_BUFFER_STATE  b )
+{
+    	if ( ! b )
+		return;
+
+	b->yy_n_chars = 0;
+
+	/* We always need two end-of-buffer characters.  The first causes
+	 * a transition to the end-of-buffer state.  The second causes
+	 * a jam in that state.
+	 */
+	b->yy_ch_buf[0] = YY_END_OF_BUFFER_CHAR;
+	b->yy_ch_buf[1] = YY_END_OF_BUFFER_CHAR;
+
+	b->yy_buf_pos = &b->yy_ch_buf[0];
+
+	b->yy_at_bol = 1;
+	b->yy_buffer_status = YY_BUFFER_NEW;
+
+	if ( b == YY_CURRENT_BUFFER )
+		yy_load_buffer_state( );
+}
+
+/** Pushes the new state onto the stack. The new state becomes
+ *  the current state. This function will allocate the stack
+ *  if necessary.
+ *  @param new_buffer The new state.
+ *  
+ */
+void yypush_buffer_state (YY_BUFFER_STATE new_buffer )
+{
+    	if (new_buffer == NULL)
+		return;
+
+	yyensure_buffer_stack();
+
+	/* This block is copied from yy_switch_to_buffer. */
+	if ( YY_CURRENT_BUFFER )
+		{
+		/* Flush out information for old buffer. */
+		*(yy_c_buf_p) = (yy_hold_char);
+		YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p);
+		YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars);
+		}
+
+	/* Only push if top exists. Otherwise, replace top. */
+	if (YY_CURRENT_BUFFER)
+		(yy_buffer_stack_top)++;
+	YY_CURRENT_BUFFER_LVALUE = new_buffer;
+
+	/* copied from yy_switch_to_buffer. */
+	yy_load_buffer_state( );
+	(yy_did_buffer_switch_on_eof) = 1;
+}
+
+/** Removes and deletes the top of the stack, if present.
+ *  The next element becomes the new top.
+ *  
+ */
+void yypop_buffer_state (void)
+{
+    	if (!YY_CURRENT_BUFFER)
+		return;
+
+	yy_delete_buffer(YY_CURRENT_BUFFER );
+	YY_CURRENT_BUFFER_LVALUE = NULL;
+	if ((yy_buffer_stack_top) > 0)
+		--(yy_buffer_stack_top);
+
+	if (YY_CURRENT_BUFFER) {
+		yy_load_buffer_state( );
+		(yy_did_buffer_switch_on_eof) = 1;
+	}
+}
+
+/* Allocates the stack if it does not exist.
+ *  Guarantees space for at least one push.
+ */
+static void yyensure_buffer_stack (void)
+{
+	int num_to_alloc;
+    
+	if (!(yy_buffer_stack)) {
+
+		/* First allocation is just for 2 elements, since we don't know if this
+		 * scanner will even need a stack. We use 2 instead of 1 to avoid an
+		 * immediate realloc on the next call.
+         */
+		num_to_alloc = 1;
+		(yy_buffer_stack) = (struct yy_buffer_state**)yyalloc
+								(num_to_alloc * sizeof(struct yy_buffer_state*)
+								);
+		if ( ! (yy_buffer_stack) )
+			YY_FATAL_ERROR( "out of dynamic memory in yyensure_buffer_stack()" );
+								  
+		memset((yy_buffer_stack), 0, num_to_alloc * sizeof(struct yy_buffer_state*));
+				
+		(yy_buffer_stack_max) = num_to_alloc;
+		(yy_buffer_stack_top) = 0;
+		return;
+	}
+
+	if ((yy_buffer_stack_top) >= ((yy_buffer_stack_max)) - 1){
+
+		/* Increase the buffer to prepare for a possible push. */
+		int grow_size = 8 /* arbitrary grow size */;
+
+		num_to_alloc = (yy_buffer_stack_max) + grow_size;
+		(yy_buffer_stack) = (struct yy_buffer_state**)yyrealloc
+								((yy_buffer_stack),
+								num_to_alloc * sizeof(struct yy_buffer_state*)
+								);
+		if ( ! (yy_buffer_stack) )
+			YY_FATAL_ERROR( "out of dynamic memory in yyensure_buffer_stack()" );
+
+		/* zero only the new slots.*/
+		memset((yy_buffer_stack) + (yy_buffer_stack_max), 0, grow_size * sizeof(struct yy_buffer_state*));
+		(yy_buffer_stack_max) = num_to_alloc;
+	}
+}
+
+/** Setup the input buffer state to scan directly from a user-specified character buffer.
+ * @param base the character buffer
+ * @param size the size in bytes of the character buffer
+ * 
+ * @return the newly allocated buffer state object. 
+ */
+YY_BUFFER_STATE yy_scan_buffer  (char * base, yy_size_t  size )
+{
+	YY_BUFFER_STATE b;
+    
+	if ( size < 2 ||
+	     base[size-2] != YY_END_OF_BUFFER_CHAR ||
+	     base[size-1] != YY_END_OF_BUFFER_CHAR )
+		/* They forgot to leave room for the EOB's. */
+		return 0;
+
+	b = (YY_BUFFER_STATE) yyalloc(sizeof( struct yy_buffer_state )  );
+	if ( ! b )
+		YY_FATAL_ERROR( "out of dynamic memory in yy_scan_buffer()" );
+
+	b->yy_buf_size = size - 2;	/* "- 2" to take care of EOB's */
+	b->yy_buf_pos = b->yy_ch_buf = base;
+	b->yy_is_our_buffer = 0;
+	b->yy_input_file = 0;
+	b->yy_n_chars = b->yy_buf_size;
+	b->yy_is_interactive = 0;
+	b->yy_at_bol = 1;
+	b->yy_fill_buffer = 0;
+	b->yy_buffer_status = YY_BUFFER_NEW;
+
+	yy_switch_to_buffer(b  );
+
+	return b;
+}
+
+/** Setup the input buffer state to scan a string. The next call to yylex() will
+ * scan from a @e copy of @a str.
+ * @param yystr a NUL-terminated string to scan
+ * 
+ * @return the newly allocated buffer state object.
+ * @note If you want to scan bytes that may contain NUL values, then use
+ *       yy_scan_bytes() instead.
+ */
+YY_BUFFER_STATE yy_scan_string (yyconst char * yystr )
+{
+    
+	return yy_scan_bytes(yystr,strlen(yystr) );
+}
+
+/** Setup the input buffer state to scan the given bytes. The next call to yylex() will
+ * scan from a @e copy of @a bytes.
+ * @param yybytes the byte buffer to scan
+ * @param _yybytes_len the number of bytes in the buffer pointed to by @a bytes.
+ * 
+ * @return the newly allocated buffer state object.
+ */
+YY_BUFFER_STATE yy_scan_bytes  (yyconst char * yybytes, int  _yybytes_len )
+{
+	YY_BUFFER_STATE b;
+	char *buf;
+	yy_size_t n;
+	int i;
+    
+	/* Get memory for full buffer, including space for trailing EOB's. */
+	n = _yybytes_len + 2;
+	buf = (char *) yyalloc(n  );
+	if ( ! buf )
+		YY_FATAL_ERROR( "out of dynamic memory in yy_scan_bytes()" );
+
+	for ( i = 0; i < _yybytes_len; ++i )
+		buf[i] = yybytes[i];
+
+	buf[_yybytes_len] = buf[_yybytes_len+1] = YY_END_OF_BUFFER_CHAR;
+
+	b = yy_scan_buffer(buf,n );
+	if ( ! b )
+		YY_FATAL_ERROR( "bad buffer in yy_scan_bytes()" );
+
+	/* It's okay to grow etc. this buffer, and we should throw it
+	 * away when we're done.
+	 */
+	b->yy_is_our_buffer = 1;
+
+	return b;
+}
+
+#ifndef YY_EXIT_FAILURE
+#define YY_EXIT_FAILURE 2
+#endif
+
+static void yy_fatal_error (yyconst char* msg )
+{
+    	(void) fprintf( stderr, "%s\n", msg );
+	exit( YY_EXIT_FAILURE );
+}
+
+/* Redefine yyless() so it works in section 3 code. */
+
+#undef yyless
+#define yyless(n) \
+	do \
+		{ \
+		/* Undo effects of setting up yytext. */ \
+        int yyless_macro_arg = (n); \
+        YY_LESS_LINENO(yyless_macro_arg);\
+		yytext[yyleng] = (yy_hold_char); \
+		(yy_c_buf_p) = yytext + yyless_macro_arg; \
+		(yy_hold_char) = *(yy_c_buf_p); \
+		*(yy_c_buf_p) = '\0'; \
+		yyleng = yyless_macro_arg; \
+		} \
+	while ( 0 )
+
+/* Accessor  methods (get/set functions) to struct members. */
+
+/** Get the current line number.
+ * 
+ */
+int yyget_lineno  (void)
+{
+        
+    return yylineno;
+}
+
+/** Get the input stream.
+ * 
+ */
+FILE *yyget_in  (void)
+{
+        return yyin;
+}
+
+/** Get the output stream.
+ * 
+ */
+FILE *yyget_out  (void)
+{
+        return yyout;
+}
+
+/** Get the length of the current token.
+ * 
+ */
+int yyget_leng  (void)
+{
+        return yyleng;
+}
+
+/** Get the current token.
+ * 
+ */
+
+char *yyget_text  (void)
+{
+        return yytext;
+}
+
+/** Set the current line number.
+ * @param line_number
+ * 
+ */
+void yyset_lineno (int  line_number )
+{
+    
+    yylineno = line_number;
+}
+
+/** Set the input stream. This does not discard the current
+ * input buffer.
+ * @param in_str A readable stream.
+ * 
+ * @see yy_switch_to_buffer
+ */
+void yyset_in (FILE *  in_str )
+{
+        yyin = in_str ;
+}
+
+void yyset_out (FILE *  out_str )
+{
+        yyout = out_str ;
+}
+
+int yyget_debug  (void)
+{
+        return yy_flex_debug;
+}
+
+void yyset_debug (int  bdebug )
+{
+        yy_flex_debug = bdebug ;
+}
+
+static int yy_init_globals (void)
+{
+        /* Initialization is the same as for the non-reentrant scanner.
+     * This function is called from yylex_destroy(), so don't allocate here.
+     */
+
+    (yy_buffer_stack) = 0;
+    (yy_buffer_stack_top) = 0;
+    (yy_buffer_stack_max) = 0;
+    (yy_c_buf_p) = (char *) 0;
+    (yy_init) = 0;
+    (yy_start) = 0;
+
+/* Defined in main.c */
+#ifdef YY_STDINIT
+    yyin = stdin;
+    yyout = stdout;
+#else
+    yyin = (FILE *) 0;
+    yyout = (FILE *) 0;
+#endif
+
+    /* For future reference: Set errno on error, since we are called by
+     * yylex_init()
+     */
+    return 0;
+}
+
+/* yylex_destroy is for both reentrant and non-reentrant scanners. */
+int yylex_destroy  (void)
+{
+    
+    /* Pop the buffer stack, destroying each element. */
+	while(YY_CURRENT_BUFFER){
+		yy_delete_buffer(YY_CURRENT_BUFFER  );
+		YY_CURRENT_BUFFER_LVALUE = NULL;
+		yypop_buffer_state();
+	}
+
+	/* Destroy the stack itself. */
+	yyfree((yy_buffer_stack) );
+	(yy_buffer_stack) = NULL;
+
+    /* Reset the globals. This is important in a non-reentrant scanner so the next time
+     * yylex() is called, initialization will occur. */
+    yy_init_globals( );
+
+    return 0;
+}
+
+/*
+ * Internal utility routines.
+ */
+
+#ifndef yytext_ptr
+static void yy_flex_strncpy (char* s1, yyconst char * s2, int n )
+{
+	register int i;
+	for ( i = 0; i < n; ++i )
+		s1[i] = s2[i];
+}
+#endif
+
+#ifdef YY_NEED_STRLEN
+static int yy_flex_strlen (yyconst char * s )
+{
+	register int n;
+	for ( n = 0; s[n]; ++n )
+		;
+
+	return n;
+}
+#endif
+
+void *yyalloc (yy_size_t  size )
+{
+	return (void *) malloc( size );
+}
+
+void *yyrealloc  (void * ptr, yy_size_t  size )
+{
+	/* The cast to (char *) in the following accommodates both
+	 * implementations that use char* generic pointers, and those
+	 * that use void* generic pointers.  It works with the latter
+	 * because both ANSI C and C++ allow castless assignment from
+	 * any pointer type to void*, and deal with argument conversions
+	 * as though doing an assignment.
+	 */
+	return (void *) realloc( (char *) ptr, size );
+}
+
+void yyfree (void * ptr )
+{
+	free( (char *) ptr );	/* see yyrealloc() for (char *) cast */
+}
+
+#define YYTABLES_NAME "yytables"
+
+#line 277 "dtc-lexer.l"
+
+
+
+static void push_input_file(const char *filename)
+{
+	assert(filename);
+
+	srcfile_push(filename);
+
+	yyin = current_srcfile->f;
+
+	yypush_buffer_state(yy_create_buffer(yyin,YY_BUF_SIZE));
+}
+
+
+static bool pop_input_file(void)
+{
+	if (srcfile_pop() == 0)
+		return false;
+
+	yypop_buffer_state();
+	yyin = current_srcfile->f;
+
+	return true;
+}
+
+static void lexical_error(const char *fmt, ...)
+{
+	va_list ap;
+
+	va_start(ap, fmt);
+	srcpos_verror(&yylloc, "Lexical error", fmt, ap);
+	va_end(ap);
+
+	treesource_error = true;
+}
+
diff --git a/scripts/dtc/dtc-parser.tab.c_shipped b/scripts/dtc/dtc-parser.tab.c_shipped
new file mode 100644
index 0000000000..4d10814b3f
--- /dev/null
+++ b/scripts/dtc/dtc-parser.tab.c_shipped
@@ -0,0 +1,2301 @@
+/* A Bison parser, made by GNU Bison 3.0.2.  */
+
+/* Bison implementation for Yacc-like parsers in C
+
+   Copyright (C) 1984, 1989-1990, 2000-2013 Free Software Foundation, Inc.
+
+   This program is free software: you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation, either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+/* As a special exception, you may create a larger work that contains
+   part or all of the Bison parser skeleton and distribute that work
+   under terms of your choice, so long as that work isn't itself a
+   parser generator using the skeleton or a modified version thereof
+   as a parser skeleton.  Alternatively, if you modify or redistribute
+   the parser skeleton itself, you may (at your option) remove this
+   special exception, which will cause the skeleton and the resulting
+   Bison output files to be licensed under the GNU General Public
+   License without this special exception.
+
+   This special exception was added by the Free Software Foundation in
+   version 2.2 of Bison.  */
+
+/* C LALR(1) parser skeleton written by Richard Stallman, by
+   simplifying the original so-called "semantic" parser.  */
+
+/* All symbols defined below should begin with yy or YY, to avoid
+   infringing on user name space.  This should be done even for local
+   variables, as they might otherwise be expanded by user macros.
+   There are some unavoidable exceptions within include files to
+   define necessary library symbols; they are noted "INFRINGES ON
+   USER NAME SPACE" below.  */
+
+/* Identify Bison output.  */
+#define YYBISON 1
+
+/* Bison version.  */
+#define YYBISON_VERSION "3.0.2"
+
+/* Skeleton name.  */
+#define YYSKELETON_NAME "yacc.c"
+
+/* Pure parsers.  */
+#define YYPURE 0
+
+/* Push parsers.  */
+#define YYPUSH 0
+
+/* Pull parsers.  */
+#define YYPULL 1
+
+
+
+
+/* Copy the first part of user declarations.  */
+#line 20 "dtc-parser.y" /* yacc.c:339  */
+
+#include <stdio.h>
+#include <inttypes.h>
+
+#include "dtc.h"
+#include "srcpos.h"
+
+extern int yylex(void);
+extern void yyerror(char const *s);
+#define ERROR(loc, ...) \
+	do { \
+		srcpos_error((loc), "Error", __VA_ARGS__); \
+		treesource_error = true; \
+	} while (0)
+
+extern struct dt_info *parser_output;
+extern bool treesource_error;
+
+#line 85 "dtc-parser.tab.c" /* yacc.c:339  */
+
+# ifndef YY_NULLPTR
+#  if defined __cplusplus && 201103L <= __cplusplus
+#   define YY_NULLPTR nullptr
+#  else
+#   define YY_NULLPTR 0
+#  endif
+# endif
+
+/* Enabling verbose error messages.  */
+#ifdef YYERROR_VERBOSE
+# undef YYERROR_VERBOSE
+# define YYERROR_VERBOSE 1
+#else
+# define YYERROR_VERBOSE 0
+#endif
+
+/* In a future release of Bison, this section will be replaced
+   by #include "dtc-parser.tab.h".  */
+#ifndef YY_YY_DTC_PARSER_TAB_H_INCLUDED
+# define YY_YY_DTC_PARSER_TAB_H_INCLUDED
+/* Debug traces.  */
+#ifndef YYDEBUG
+# define YYDEBUG 0
+#endif
+#if YYDEBUG
+extern int yydebug;
+#endif
+
+/* Token type.  */
+#ifndef YYTOKENTYPE
+# define YYTOKENTYPE
+  enum yytokentype
+  {
+    DT_V1 = 258,
+    DT_PLUGIN = 259,
+    DT_MEMRESERVE = 260,
+    DT_LSHIFT = 261,
+    DT_RSHIFT = 262,
+    DT_LE = 263,
+    DT_GE = 264,
+    DT_EQ = 265,
+    DT_NE = 266,
+    DT_AND = 267,
+    DT_OR = 268,
+    DT_BITS = 269,
+    DT_DEL_PROP = 270,
+    DT_DEL_NODE = 271,
+    DT_PROPNODENAME = 272,
+    DT_LITERAL = 273,
+    DT_CHAR_LITERAL = 274,
+    DT_BYTE = 275,
+    DT_STRING = 276,
+    DT_LABEL = 277,
+    DT_REF = 278,
+    DT_INCBIN = 279
+  };
+#endif
+
+/* Value type.  */
+#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
+typedef union YYSTYPE YYSTYPE;
+union YYSTYPE
+{
+#line 39 "dtc-parser.y" /* yacc.c:355  */
+
+	char *propnodename;
+	char *labelref;
+	uint8_t byte;
+	struct data data;
+
+	struct {
+		struct data	data;
+		int		bits;
+	} array;
+
+	struct property *prop;
+	struct property *proplist;
+	struct node *node;
+	struct node *nodelist;
+	struct reserve_info *re;
+	uint64_t integer;
+	unsigned int flags;
+
+#line 170 "dtc-parser.tab.c" /* yacc.c:355  */
+};
+# define YYSTYPE_IS_TRIVIAL 1
+# define YYSTYPE_IS_DECLARED 1
+#endif
+
+/* Location type.  */
+#if ! defined YYLTYPE && ! defined YYLTYPE_IS_DECLARED
+typedef struct YYLTYPE YYLTYPE;
+struct YYLTYPE
+{
+  int first_line;
+  int first_column;
+  int last_line;
+  int last_column;
+};
+# define YYLTYPE_IS_DECLARED 1
+# define YYLTYPE_IS_TRIVIAL 1
+#endif
+
+
+extern YYSTYPE yylval;
+extern YYLTYPE yylloc;
+int yyparse (void);
+
+#endif /* !YY_YY_DTC_PARSER_TAB_H_INCLUDED  */
+
+/* Copy the second part of user declarations.  */
+
+#line 199 "dtc-parser.tab.c" /* yacc.c:358  */
+
+#ifdef short
+# undef short
+#endif
+
+#ifdef YYTYPE_UINT8
+typedef YYTYPE_UINT8 yytype_uint8;
+#else
+typedef unsigned char yytype_uint8;
+#endif
+
+#ifdef YYTYPE_INT8
+typedef YYTYPE_INT8 yytype_int8;
+#else
+typedef signed char yytype_int8;
+#endif
+
+#ifdef YYTYPE_UINT16
+typedef YYTYPE_UINT16 yytype_uint16;
+#else
+typedef unsigned short int yytype_uint16;
+#endif
+
+#ifdef YYTYPE_INT16
+typedef YYTYPE_INT16 yytype_int16;
+#else
+typedef short int yytype_int16;
+#endif
+
+#ifndef YYSIZE_T
+# ifdef __SIZE_TYPE__
+#  define YYSIZE_T __SIZE_TYPE__
+# elif defined size_t
+#  define YYSIZE_T size_t
+# elif ! defined YYSIZE_T
+#  include <stddef.h> /* INFRINGES ON USER NAME SPACE */
+#  define YYSIZE_T size_t
+# else
+#  define YYSIZE_T unsigned int
+# endif
+#endif
+
+#define YYSIZE_MAXIMUM ((YYSIZE_T) -1)
+
+#ifndef YY_
+# if defined YYENABLE_NLS && YYENABLE_NLS
+#  if ENABLE_NLS
+#   include <libintl.h> /* INFRINGES ON USER NAME SPACE */
+#   define YY_(Msgid) dgettext ("bison-runtime", Msgid)
+#  endif
+# endif
+# ifndef YY_
+#  define YY_(Msgid) Msgid
+# endif
+#endif
+
+#ifndef YY_ATTRIBUTE
+# if (defined __GNUC__                                               \
+      && (2 < __GNUC__ || (__GNUC__ == 2 && 96 <= __GNUC_MINOR__)))  \
+     || defined __SUNPRO_C && 0x5110 <= __SUNPRO_C
+#  define YY_ATTRIBUTE(Spec) __attribute__(Spec)
+# else
+#  define YY_ATTRIBUTE(Spec) /* empty */
+# endif
+#endif
+
+#ifndef YY_ATTRIBUTE_PURE
+# define YY_ATTRIBUTE_PURE   YY_ATTRIBUTE ((__pure__))
+#endif
+
+#ifndef YY_ATTRIBUTE_UNUSED
+# define YY_ATTRIBUTE_UNUSED YY_ATTRIBUTE ((__unused__))
+#endif
+
+#if !defined _Noreturn \
+     && (!defined __STDC_VERSION__ || __STDC_VERSION__ < 201112)
+# if defined _MSC_VER && 1200 <= _MSC_VER
+#  define _Noreturn __declspec (noreturn)
+# else
+#  define _Noreturn YY_ATTRIBUTE ((__noreturn__))
+# endif
+#endif
+
+/* Suppress unused-variable warnings by "using" E.  */
+#if ! defined lint || defined __GNUC__
+# define YYUSE(E) ((void) (E))
+#else
+# define YYUSE(E) /* empty */
+#endif
+
+#if defined __GNUC__ && 407 <= __GNUC__ * 100 + __GNUC_MINOR__
+/* Suppress an incorrect diagnostic about yylval being uninitialized.  */
+# define YY_IGNORE_MAYBE_UNINITIALIZED_BEGIN \
+    _Pragma ("GCC diagnostic push") \
+    _Pragma ("GCC diagnostic ignored \"-Wuninitialized\"")\
+    _Pragma ("GCC diagnostic ignored \"-Wmaybe-uninitialized\"")
+# define YY_IGNORE_MAYBE_UNINITIALIZED_END \
+    _Pragma ("GCC diagnostic pop")
+#else
+# define YY_INITIAL_VALUE(Value) Value
+#endif
+#ifndef YY_IGNORE_MAYBE_UNINITIALIZED_BEGIN
+# define YY_IGNORE_MAYBE_UNINITIALIZED_BEGIN
+# define YY_IGNORE_MAYBE_UNINITIALIZED_END
+#endif
+#ifndef YY_INITIAL_VALUE
+# define YY_INITIAL_VALUE(Value) /* Nothing. */
+#endif
+
+
+#if ! defined yyoverflow || YYERROR_VERBOSE
+
+/* The parser invokes alloca or malloc; define the necessary symbols.  */
+
+# ifdef YYSTACK_USE_ALLOCA
+#  if YYSTACK_USE_ALLOCA
+#   ifdef __GNUC__
+#    define YYSTACK_ALLOC __builtin_alloca
+#   elif defined __BUILTIN_VA_ARG_INCR
+#    include <alloca.h> /* INFRINGES ON USER NAME SPACE */
+#   elif defined _AIX
+#    define YYSTACK_ALLOC __alloca
+#   elif defined _MSC_VER
+#    include <malloc.h> /* INFRINGES ON USER NAME SPACE */
+#    define alloca _alloca
+#   else
+#    define YYSTACK_ALLOC alloca
+#    if ! defined _ALLOCA_H && ! defined EXIT_SUCCESS
+#     include <stdlib.h> /* INFRINGES ON USER NAME SPACE */
+      /* Use EXIT_SUCCESS as a witness for stdlib.h.  */
+#     ifndef EXIT_SUCCESS
+#      define EXIT_SUCCESS 0
+#     endif
+#    endif
+#   endif
+#  endif
+# endif
+
+# ifdef YYSTACK_ALLOC
+   /* Pacify GCC's 'empty if-body' warning.  */
+#  define YYSTACK_FREE(Ptr) do { /* empty */; } while (0)
+#  ifndef YYSTACK_ALLOC_MAXIMUM
+    /* The OS might guarantee only one guard page at the bottom of the stack,
+       and a page size can be as small as 4096 bytes.  So we cannot safely
+       invoke alloca (N) if N exceeds 4096.  Use a slightly smaller number
+       to allow for a few compiler-allocated temporary stack slots.  */
+#   define YYSTACK_ALLOC_MAXIMUM 4032 /* reasonable circa 2006 */
+#  endif
+# else
+#  define YYSTACK_ALLOC YYMALLOC
+#  define YYSTACK_FREE YYFREE
+#  ifndef YYSTACK_ALLOC_MAXIMUM
+#   define YYSTACK_ALLOC_MAXIMUM YYSIZE_MAXIMUM
+#  endif
+#  if (defined __cplusplus && ! defined EXIT_SUCCESS \
+       && ! ((defined YYMALLOC || defined malloc) \
+             && (defined YYFREE || defined free)))
+#   include <stdlib.h> /* INFRINGES ON USER NAME SPACE */
+#   ifndef EXIT_SUCCESS
+#    define EXIT_SUCCESS 0
+#   endif
+#  endif
+#  ifndef YYMALLOC
+#   define YYMALLOC malloc
+#   if ! defined malloc && ! defined EXIT_SUCCESS
+void *malloc (YYSIZE_T); /* INFRINGES ON USER NAME SPACE */
+#   endif
+#  endif
+#  ifndef YYFREE
+#   define YYFREE free
+#   if ! defined free && ! defined EXIT_SUCCESS
+void free (void *); /* INFRINGES ON USER NAME SPACE */
+#   endif
+#  endif
+# endif
+#endif /* ! defined yyoverflow || YYERROR_VERBOSE */
+
+
+#if (! defined yyoverflow \
+     && (! defined __cplusplus \
+         || (defined YYLTYPE_IS_TRIVIAL && YYLTYPE_IS_TRIVIAL \
+             && defined YYSTYPE_IS_TRIVIAL && YYSTYPE_IS_TRIVIAL)))
+
+/* A type that is properly aligned for any stack member.  */
+union yyalloc
+{
+  yytype_int16 yyss_alloc;
+  YYSTYPE yyvs_alloc;
+  YYLTYPE yyls_alloc;
+};
+
+/* The size of the maximum gap between one aligned stack and the next.  */
+# define YYSTACK_GAP_MAXIMUM (sizeof (union yyalloc) - 1)
+
+/* The size of an array large to enough to hold all stacks, each with
+   N elements.  */
+# define YYSTACK_BYTES(N) \
+     ((N) * (sizeof (yytype_int16) + sizeof (YYSTYPE) + sizeof (YYLTYPE)) \
+      + 2 * YYSTACK_GAP_MAXIMUM)
+
+# define YYCOPY_NEEDED 1
+
+/* Relocate STACK from its old location to the new one.  The
+   local variables YYSIZE and YYSTACKSIZE give the old and new number of
+   elements in the stack, and YYPTR gives the new location of the
+   stack.  Advance YYPTR to a properly aligned location for the next
+   stack.  */
+# define YYSTACK_RELOCATE(Stack_alloc, Stack)                           \
+    do                                                                  \
+      {                                                                 \
+        YYSIZE_T yynewbytes;                                            \
+        YYCOPY (&yyptr->Stack_alloc, Stack, yysize);                    \
+        Stack = &yyptr->Stack_alloc;                                    \
+        yynewbytes = yystacksize * sizeof (*Stack) + YYSTACK_GAP_MAXIMUM; \
+        yyptr += yynewbytes / sizeof (*yyptr);                          \
+      }                                                                 \
+    while (0)
+
+#endif
+
+#if defined YYCOPY_NEEDED && YYCOPY_NEEDED
+/* Copy COUNT objects from SRC to DST.  The source and destination do
+   not overlap.  */
+# ifndef YYCOPY
+#  if defined __GNUC__ && 1 < __GNUC__
+#   define YYCOPY(Dst, Src, Count) \
+      __builtin_memcpy (Dst, Src, (Count) * sizeof (*(Src)))
+#  else
+#   define YYCOPY(Dst, Src, Count)              \
+      do                                        \
+        {                                       \
+          YYSIZE_T yyi;                         \
+          for (yyi = 0; yyi < (Count); yyi++)   \
+            (Dst)[yyi] = (Src)[yyi];            \
+        }                                       \
+      while (0)
+#  endif
+# endif
+#endif /* !YYCOPY_NEEDED */
+
+/* YYFINAL -- State number of the termination state.  */
+#define YYFINAL  6
+/* YYLAST -- Last index in YYTABLE.  */
+#define YYLAST   138
+
+/* YYNTOKENS -- Number of terminals.  */
+#define YYNTOKENS  48
+/* YYNNTS -- Number of nonterminals.  */
+#define YYNNTS  30
+/* YYNRULES -- Number of rules.  */
+#define YYNRULES  84
+/* YYNSTATES -- Number of states.  */
+#define YYNSTATES  149
+
+/* YYTRANSLATE[YYX] -- Symbol number corresponding to YYX as returned
+   by yylex, with out-of-bounds checking.  */
+#define YYUNDEFTOK  2
+#define YYMAXUTOK   279
+
+#define YYTRANSLATE(YYX)                                                \
+  ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK)
+
+/* YYTRANSLATE[TOKEN-NUM] -- Symbol number corresponding to TOKEN-NUM
+   as returned by yylex, without out-of-bounds checking.  */
+static const yytype_uint8 yytranslate[] =
+{
+       0,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,    47,     2,     2,     2,    45,    41,     2,
+      33,    35,    44,    42,    34,    43,     2,    26,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,    38,    25,
+      36,    29,    30,    37,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,    31,     2,    32,    40,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,    27,    39,    28,    46,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     1,     2,     3,     4,
+       5,     6,     7,     8,     9,    10,    11,    12,    13,    14,
+      15,    16,    17,    18,    19,    20,    21,    22,    23,    24
+};
+
+#if YYDEBUG
+  /* YYRLINE[YYN] -- Source line where rule number YYN was defined.  */
+static const yytype_uint16 yyrline[] =
+{
+       0,   109,   109,   117,   121,   128,   129,   139,   142,   149,
+     153,   161,   165,   170,   181,   191,   206,   214,   217,   224,
+     228,   232,   236,   244,   248,   252,   256,   260,   276,   286,
+     294,   297,   301,   308,   324,   329,   348,   362,   369,   370,
+     371,   378,   382,   383,   387,   388,   392,   393,   397,   398,
+     402,   403,   407,   408,   412,   413,   414,   418,   419,   420,
+     421,   422,   426,   427,   428,   432,   433,   434,   438,   439,
+     448,   457,   461,   462,   463,   464,   469,   472,   476,   484,
+     487,   491,   499,   503,   507
+};
+#endif
+
+#if YYDEBUG || YYERROR_VERBOSE || 0
+/* YYTNAME[SYMBOL-NUM] -- String name of the symbol SYMBOL-NUM.
+   First, the terminals, then, starting at YYNTOKENS, nonterminals.  */
+static const char *const yytname[] =
+{
+  "$end", "error", "$undefined", "DT_V1", "DT_PLUGIN", "DT_MEMRESERVE",
+  "DT_LSHIFT", "DT_RSHIFT", "DT_LE", "DT_GE", "DT_EQ", "DT_NE", "DT_AND",
+  "DT_OR", "DT_BITS", "DT_DEL_PROP", "DT_DEL_NODE", "DT_PROPNODENAME",
+  "DT_LITERAL", "DT_CHAR_LITERAL", "DT_BYTE", "DT_STRING", "DT_LABEL",
+  "DT_REF", "DT_INCBIN", "';'", "'/'", "'{'", "'}'", "'='", "'>'", "'['",
+  "']'", "'('", "','", "')'", "'<'", "'?'", "':'", "'|'", "'^'", "'&'",
+  "'+'", "'-'", "'*'", "'%'", "'~'", "'!'", "$accept", "sourcefile",
+  "header", "headers", "memreserves", "memreserve", "devicetree",
+  "nodedef", "proplist", "propdef", "propdata", "propdataprefix",
+  "arrayprefix", "integer_prim", "integer_expr", "integer_trinary",
+  "integer_or", "integer_and", "integer_bitor", "integer_bitxor",
+  "integer_bitand", "integer_eq", "integer_rela", "integer_shift",
+  "integer_add", "integer_mul", "integer_unary", "bytestring", "subnodes",
+  "subnode", YY_NULLPTR
+};
+#endif
+
+# ifdef YYPRINT
+/* YYTOKNUM[NUM] -- (External) token number corresponding to the
+   (internal) symbol number NUM (which must be that of a token).  */
+static const yytype_uint16 yytoknum[] =
+{
+       0,   256,   257,   258,   259,   260,   261,   262,   263,   264,
+     265,   266,   267,   268,   269,   270,   271,   272,   273,   274,
+     275,   276,   277,   278,   279,    59,    47,   123,   125,    61,
+      62,    91,    93,    40,    44,    41,    60,    63,    58,   124,
+      94,    38,    43,    45,    42,    37,   126,    33
+};
+# endif
+
+#define YYPACT_NINF -44
+
+#define yypact_value_is_default(Yystate) \
+  (!!((Yystate) == (-44)))
+
+#define YYTABLE_NINF -1
+
+#define yytable_value_is_error(Yytable_value) \
+  0
+
+  /* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing
+     STATE-NUM.  */
+static const yytype_int8 yypact[] =
+{
+      14,    27,    61,    14,     8,    18,   -44,   -44,    37,     8,
+      40,     8,    64,   -44,   -44,   -12,    37,   -44,    50,    52,
+     -44,   -44,   -12,   -12,   -12,   -44,    51,   -44,    -4,    78,
+      53,    54,    55,    17,     2,    30,    38,    -3,   -44,    66,
+     -44,   -44,    70,    72,    50,    50,   -44,   -44,   -44,   -44,
+     -12,   -12,   -12,   -12,   -12,   -12,   -12,   -12,   -12,   -12,
+     -12,   -12,   -12,   -12,   -12,   -12,   -12,   -12,   -12,   -44,
+       3,    73,    50,   -44,   -44,    78,    59,    53,    54,    55,
+      17,     2,     2,    30,    30,    30,    30,    38,    38,    -3,
+      -3,   -44,   -44,   -44,    82,    83,    44,     3,   -44,    74,
+       3,   -44,   -44,   -12,    76,    79,   -44,   -44,   -44,   -44,
+     -44,    80,   -44,   -44,   -44,   -44,   -44,   -10,    36,   -44,
+     -44,   -44,   -44,    85,   -44,   -44,   -44,    75,   -44,   -44,
+      21,    71,    88,    -6,   -44,   -44,   -44,   -44,   -44,    11,
+     -44,   -44,   -44,    37,   -44,    77,    37,    81,   -44
+};
+
+  /* YYDEFACT[STATE-NUM] -- Default reduction number in state STATE-NUM.
+     Performed when YYTABLE does not specify something else to do.  Zero
+     means the default is an error.  */
+static const yytype_uint8 yydefact[] =
+{
+       0,     0,     0,     5,     7,     3,     1,     6,     0,     0,
+       0,     7,     0,    38,    39,     0,     0,    10,     0,     2,
+       8,     4,     0,     0,     0,    72,     0,    41,    42,    44,
+      46,    48,    50,    52,    54,    57,    64,    67,    71,     0,
+      17,    11,     0,     0,     0,     0,    73,    74,    75,    40,
+       0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
+       0,     0,     0,     0,     0,     0,     0,     0,     0,     9,
+      79,     0,     0,    14,    12,    45,     0,    47,    49,    51,
+      53,    55,    56,    60,    61,    59,    58,    62,    63,    65,
+      66,    69,    68,    70,     0,     0,     0,     0,    18,     0,
+      79,    15,    13,     0,     0,     0,    20,    30,    82,    22,
+      84,     0,    81,    80,    43,    21,    83,     0,     0,    16,
+      29,    19,    31,     0,    23,    32,    26,     0,    76,    34,
+       0,     0,     0,     0,    37,    36,    24,    35,    33,     0,
+      77,    78,    25,     0,    28,     0,     0,     0,    27
+};
+
+  /* YYPGOTO[NTERM-NUM].  */
+static const yytype_int8 yypgoto[] =
+{
+     -44,   -44,   -44,   103,    99,   104,   -44,   -43,   -44,   -21,
+     -44,   -44,   -44,    -8,    63,     9,   -44,    65,    67,    68,
+      69,    62,    26,     4,    22,    23,   -19,   -44,    20,    28
+};
+
+  /* YYDEFGOTO[NTERM-NUM].  */
+static const yytype_int16 yydefgoto[] =
+{
+      -1,     2,     3,     4,    10,    11,    19,    41,    70,    98,
+     117,   118,   130,    25,    26,    27,    28,    29,    30,    31,
+      32,    33,    34,    35,    36,    37,    38,   133,    99,   100
+};
+
+  /* YYTABLE[YYPACT[STATE-NUM]] -- What to do in state STATE-NUM.  If
+     positive, shift that token.  If negative, reduce the rule whose
+     number is the opposite.  If YYTABLE_NINF, syntax error.  */
+static const yytype_uint8 yytable[] =
+{
+      16,    73,    74,    46,    47,    48,    13,    14,    39,    50,
+      58,    59,   120,     8,   140,   121,   141,     1,    94,    95,
+      96,    15,    12,    66,   122,    97,   142,    56,    57,   102,
+       9,    22,    60,    51,    23,    24,    62,    63,    61,    13,
+      14,    67,    68,   134,   135,   143,   144,    91,    92,    93,
+     123,   136,     5,   108,    15,    13,    14,   124,   125,   126,
+     127,     6,    83,    84,    85,    86,    18,   128,    42,   106,
+      15,    40,   129,   107,    43,    44,   109,    40,    45,   112,
+      64,    65,    81,    82,    87,    88,    49,    89,    90,    21,
+      52,    69,    53,    71,    54,    72,    55,   103,   101,   104,
+     105,   115,   111,   131,   116,   119,     7,   138,   132,   139,
+      20,   146,   114,    17,    76,    75,   148,    80,     0,    77,
+     113,    78,   137,    79,     0,   110,     0,     0,     0,     0,
+       0,     0,     0,     0,     0,   145,     0,     0,   147
+};
+
+static const yytype_int16 yycheck[] =
+{
+       8,    44,    45,    22,    23,    24,    18,    19,    16,    13,
+       8,     9,    22,     5,    20,    25,    22,     3,    15,    16,
+      17,    33,     4,    26,    34,    22,    32,    10,    11,    72,
+      22,    43,    30,    37,    46,    47,     6,     7,    36,    18,
+      19,    44,    45,    22,    23,    34,    35,    66,    67,    68,
+      14,    30,    25,    96,    33,    18,    19,    21,    22,    23,
+      24,     0,    58,    59,    60,    61,    26,    31,    16,    25,
+      33,    27,    36,    29,    22,    23,    97,    27,    26,   100,
+      42,    43,    56,    57,    62,    63,    35,    64,    65,    25,
+      12,    25,    39,    23,    40,    23,    41,    38,    25,    17,
+      17,    25,    28,    18,    25,    25,     3,    36,    33,    21,
+      11,    34,   103,     9,    51,    50,    35,    55,    -1,    52,
+     100,    53,   130,    54,    -1,    97,    -1,    -1,    -1,    -1,
+      -1,    -1,    -1,    -1,    -1,   143,    -1,    -1,   146
+};
+
+  /* YYSTOS[STATE-NUM] -- The (internal number of the) accessing
+     symbol of state STATE-NUM.  */
+static const yytype_uint8 yystos[] =
+{
+       0,     3,    49,    50,    51,    25,     0,    51,     5,    22,
+      52,    53,     4,    18,    19,    33,    61,    53,    26,    54,
+      52,    25,    43,    46,    47,    61,    62,    63,    64,    65,
+      66,    67,    68,    69,    70,    71,    72,    73,    74,    61,
+      27,    55,    16,    22,    23,    26,    74,    74,    74,    35,
+      13,    37,    12,    39,    40,    41,    10,    11,     8,     9,
+      30,    36,     6,     7,    42,    43,    26,    44,    45,    25,
+      56,    23,    23,    55,    55,    65,    62,    66,    67,    68,
+      69,    70,    70,    71,    71,    71,    71,    72,    72,    73,
+      73,    74,    74,    74,    15,    16,    17,    22,    57,    76,
+      77,    25,    55,    38,    17,    17,    25,    29,    55,    57,
+      77,    28,    57,    76,    63,    25,    25,    58,    59,    25,
+      22,    25,    34,    14,    21,    22,    23,    24,    31,    36,
+      60,    18,    33,    75,    22,    23,    30,    61,    36,    21,
+      20,    22,    32,    34,    35,    61,    34,    61,    35
+};
+
+  /* YYR1[YYN] -- Symbol number of symbol that rule YYN derives.  */
+static const yytype_uint8 yyr1[] =
+{
+       0,    48,    49,    50,    50,    51,    51,    52,    52,    53,
+      53,    54,    54,    54,    54,    54,    55,    56,    56,    57,
+      57,    57,    57,    58,    58,    58,    58,    58,    58,    58,
+      59,    59,    59,    60,    60,    60,    60,    60,    61,    61,
+      61,    62,    63,    63,    64,    64,    65,    65,    66,    66,
+      67,    67,    68,    68,    69,    69,    69,    70,    70,    70,
+      70,    70,    71,    71,    71,    72,    72,    72,    73,    73,
+      73,    73,    74,    74,    74,    74,    75,    75,    75,    76,
+      76,    76,    77,    77,    77
+};
+
+  /* YYR2[YYN] -- Number of symbols on the right hand side of rule YYN.  */
+static const yytype_uint8 yyr2[] =
+{
+       0,     2,     3,     2,     4,     1,     2,     0,     2,     4,
+       2,     2,     3,     4,     3,     4,     5,     0,     2,     4,
+       2,     3,     2,     2,     3,     4,     2,     9,     5,     2,
+       0,     2,     2,     3,     1,     2,     2,     2,     1,     1,
+       3,     1,     1,     5,     1,     3,     1,     3,     1,     3,
+       1,     3,     1,     3,     1,     3,     3,     1,     3,     3,
+       3,     3,     3,     3,     1,     3,     3,     1,     3,     3,
+       3,     1,     1,     2,     2,     2,     0,     2,     2,     0,
+       2,     2,     2,     3,     2
+};
+
+
+#define yyerrok         (yyerrstatus = 0)
+#define yyclearin       (yychar = YYEMPTY)
+#define YYEMPTY         (-2)
+#define YYEOF           0
+
+#define YYACCEPT        goto yyacceptlab
+#define YYABORT         goto yyabortlab
+#define YYERROR         goto yyerrorlab
+
+
+#define YYRECOVERING()  (!!yyerrstatus)
+
+#define YYBACKUP(Token, Value)                                  \
+do                                                              \
+  if (yychar == YYEMPTY)                                        \
+    {                                                           \
+      yychar = (Token);                                         \
+      yylval = (Value);                                         \
+      YYPOPSTACK (yylen);                                       \
+      yystate = *yyssp;                                         \
+      goto yybackup;                                            \
+    }                                                           \
+  else                                                          \
+    {                                                           \
+      yyerror (YY_("syntax error: cannot back up")); \
+      YYERROR;                                                  \
+    }                                                           \
+while (0)
+
+/* Error token number */
+#define YYTERROR        1
+#define YYERRCODE       256
+
+
+/* YYLLOC_DEFAULT -- Set CURRENT to span from RHS[1] to RHS[N].
+   If N is 0, then set CURRENT to the empty location which ends
+   the previous symbol: RHS[0] (always defined).  */
+
+#ifndef YYLLOC_DEFAULT
+# define YYLLOC_DEFAULT(Current, Rhs, N)                                \
+    do                                                                  \
+      if (N)                                                            \
+        {                                                               \
+          (Current).first_line   = YYRHSLOC (Rhs, 1).first_line;        \
+          (Current).first_column = YYRHSLOC (Rhs, 1).first_column;      \
+          (Current).last_line    = YYRHSLOC (Rhs, N).last_line;         \
+          (Current).last_column  = YYRHSLOC (Rhs, N).last_column;       \
+        }                                                               \
+      else                                                              \
+        {                                                               \
+          (Current).first_line   = (Current).last_line   =              \
+            YYRHSLOC (Rhs, 0).last_line;                                \
+          (Current).first_column = (Current).last_column =              \
+            YYRHSLOC (Rhs, 0).last_column;                              \
+        }                                                               \
+    while (0)
+#endif
+
+#define YYRHSLOC(Rhs, K) ((Rhs)[K])
+
+
+/* Enable debugging if requested.  */
+#if YYDEBUG
+
+# ifndef YYFPRINTF
+#  include <stdio.h> /* INFRINGES ON USER NAME SPACE */
+#  define YYFPRINTF fprintf
+# endif
+
+# define YYDPRINTF(Args)                        \
+do {                                            \
+  if (yydebug)                                  \
+    YYFPRINTF Args;                             \
+} while (0)
+
+
+/* YY_LOCATION_PRINT -- Print the location on the stream.
+   This macro was not mandated originally: define only if we know
+   we won't break user code: when these are the locations we know.  */
+
+#ifndef YY_LOCATION_PRINT
+# if defined YYLTYPE_IS_TRIVIAL && YYLTYPE_IS_TRIVIAL
+
+/* Print *YYLOCP on YYO.  Private, do not rely on its existence. */
+
+YY_ATTRIBUTE_UNUSED
+static unsigned
+yy_location_print_ (FILE *yyo, YYLTYPE const * const yylocp)
+{
+  unsigned res = 0;
+  int end_col = 0 != yylocp->last_column ? yylocp->last_column - 1 : 0;
+  if (0 <= yylocp->first_line)
+    {
+      res += YYFPRINTF (yyo, "%d", yylocp->first_line);
+      if (0 <= yylocp->first_column)
+        res += YYFPRINTF (yyo, ".%d", yylocp->first_column);
+    }
+  if (0 <= yylocp->last_line)
+    {
+      if (yylocp->first_line < yylocp->last_line)
+        {
+          res += YYFPRINTF (yyo, "-%d", yylocp->last_line);
+          if (0 <= end_col)
+            res += YYFPRINTF (yyo, ".%d", end_col);
+        }
+      else if (0 <= end_col && yylocp->first_column < end_col)
+        res += YYFPRINTF (yyo, "-%d", end_col);
+    }
+  return res;
+ }
+
+#  define YY_LOCATION_PRINT(File, Loc)          \
+  yy_location_print_ (File, &(Loc))
+
+# else
+#  define YY_LOCATION_PRINT(File, Loc) ((void) 0)
+# endif
+#endif
+
+
+# define YY_SYMBOL_PRINT(Title, Type, Value, Location)                    \
+do {                                                                      \
+  if (yydebug)                                                            \
+    {                                                                     \
+      YYFPRINTF (stderr, "%s ", Title);                                   \
+      yy_symbol_print (stderr,                                            \
+                  Type, Value, Location); \
+      YYFPRINTF (stderr, "\n");                                           \
+    }                                                                     \
+} while (0)
+
+
+/*----------------------------------------.
+| Print this symbol's value on YYOUTPUT.  |
+`----------------------------------------*/
+
+static void
+yy_symbol_value_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep, YYLTYPE const * const yylocationp)
+{
+  FILE *yyo = yyoutput;
+  YYUSE (yyo);
+  YYUSE (yylocationp);
+  if (!yyvaluep)
+    return;
+# ifdef YYPRINT
+  if (yytype < YYNTOKENS)
+    YYPRINT (yyoutput, yytoknum[yytype], *yyvaluep);
+# endif
+  YYUSE (yytype);
+}
+
+
+/*--------------------------------.
+| Print this symbol on YYOUTPUT.  |
+`--------------------------------*/
+
+static void
+yy_symbol_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep, YYLTYPE const * const yylocationp)
+{
+  YYFPRINTF (yyoutput, "%s %s (",
+             yytype < YYNTOKENS ? "token" : "nterm", yytname[yytype]);
+
+  YY_LOCATION_PRINT (yyoutput, *yylocationp);
+  YYFPRINTF (yyoutput, ": ");
+  yy_symbol_value_print (yyoutput, yytype, yyvaluep, yylocationp);
+  YYFPRINTF (yyoutput, ")");
+}
+
+/*------------------------------------------------------------------.
+| yy_stack_print -- Print the state stack from its BOTTOM up to its |
+| TOP (included).                                                   |
+`------------------------------------------------------------------*/
+
+static void
+yy_stack_print (yytype_int16 *yybottom, yytype_int16 *yytop)
+{
+  YYFPRINTF (stderr, "Stack now");
+  for (; yybottom <= yytop; yybottom++)
+    {
+      int yybot = *yybottom;
+      YYFPRINTF (stderr, " %d", yybot);
+    }
+  YYFPRINTF (stderr, "\n");
+}
+
+# define YY_STACK_PRINT(Bottom, Top)                            \
+do {                                                            \
+  if (yydebug)                                                  \
+    yy_stack_print ((Bottom), (Top));                           \
+} while (0)
+
+
+/*------------------------------------------------.
+| Report that the YYRULE is going to be reduced.  |
+`------------------------------------------------*/
+
+static void
+yy_reduce_print (yytype_int16 *yyssp, YYSTYPE *yyvsp, YYLTYPE *yylsp, int yyrule)
+{
+  unsigned long int yylno = yyrline[yyrule];
+  int yynrhs = yyr2[yyrule];
+  int yyi;
+  YYFPRINTF (stderr, "Reducing stack by rule %d (line %lu):\n",
+             yyrule - 1, yylno);
+  /* The symbols being reduced.  */
+  for (yyi = 0; yyi < yynrhs; yyi++)
+    {
+      YYFPRINTF (stderr, "   $%d = ", yyi + 1);
+      yy_symbol_print (stderr,
+                       yystos[yyssp[yyi + 1 - yynrhs]],
+                       &(yyvsp[(yyi + 1) - (yynrhs)])
+                       , &(yylsp[(yyi + 1) - (yynrhs)])                       );
+      YYFPRINTF (stderr, "\n");
+    }
+}
+
+# define YY_REDUCE_PRINT(Rule)          \
+do {                                    \
+  if (yydebug)                          \
+    yy_reduce_print (yyssp, yyvsp, yylsp, Rule); \
+} while (0)
+
+/* Nonzero means print parse trace.  It is left uninitialized so that
+   multiple parsers can coexist.  */
+int yydebug;
+#else /* !YYDEBUG */
+# define YYDPRINTF(Args)
+# define YY_SYMBOL_PRINT(Title, Type, Value, Location)
+# define YY_STACK_PRINT(Bottom, Top)
+# define YY_REDUCE_PRINT(Rule)
+#endif /* !YYDEBUG */
+
+
+/* YYINITDEPTH -- initial size of the parser's stacks.  */
+#ifndef YYINITDEPTH
+# define YYINITDEPTH 200
+#endif
+
+/* YYMAXDEPTH -- maximum size the stacks can grow to (effective only
+   if the built-in stack extension method is used).
+
+   Do not make this value too large; the results are undefined if
+   YYSTACK_ALLOC_MAXIMUM < YYSTACK_BYTES (YYMAXDEPTH)
+   evaluated with infinite-precision integer arithmetic.  */
+
+#ifndef YYMAXDEPTH
+# define YYMAXDEPTH 10000
+#endif
+
+
+#if YYERROR_VERBOSE
+
+# ifndef yystrlen
+#  if defined __GLIBC__ && defined _STRING_H
+#   define yystrlen strlen
+#  else
+/* Return the length of YYSTR.  */
+static YYSIZE_T
+yystrlen (const char *yystr)
+{
+  YYSIZE_T yylen;
+  for (yylen = 0; yystr[yylen]; yylen++)
+    continue;
+  return yylen;
+}
+#  endif
+# endif
+
+# ifndef yystpcpy
+#  if defined __GLIBC__ && defined _STRING_H && defined _GNU_SOURCE
+#   define yystpcpy stpcpy
+#  else
+/* Copy YYSRC to YYDEST, returning the address of the terminating '\0' in
+   YYDEST.  */
+static char *
+yystpcpy (char *yydest, const char *yysrc)
+{
+  char *yyd = yydest;
+  const char *yys = yysrc;
+
+  while ((*yyd++ = *yys++) != '\0')
+    continue;
+
+  return yyd - 1;
+}
+#  endif
+# endif
+
+# ifndef yytnamerr
+/* Copy to YYRES the contents of YYSTR after stripping away unnecessary
+   quotes and backslashes, so that it's suitable for yyerror.  The
+   heuristic is that double-quoting is unnecessary unless the string
+   contains an apostrophe, a comma, or backslash (other than
+   backslash-backslash).  YYSTR is taken from yytname.  If YYRES is
+   null, do not copy; instead, return the length of what the result
+   would have been.  */
+static YYSIZE_T
+yytnamerr (char *yyres, const char *yystr)
+{
+  if (*yystr == '"')
+    {
+      YYSIZE_T yyn = 0;
+      char const *yyp = yystr;
+
+      for (;;)
+        switch (*++yyp)
+          {
+          case '\'':
+          case ',':
+            goto do_not_strip_quotes;
+
+          case '\\':
+            if (*++yyp != '\\')
+              goto do_not_strip_quotes;
+            /* Fall through.  */
+          default:
+            if (yyres)
+              yyres[yyn] = *yyp;
+            yyn++;
+            break;
+
+          case '"':
+            if (yyres)
+              yyres[yyn] = '\0';
+            return yyn;
+          }
+    do_not_strip_quotes: ;
+    }
+
+  if (! yyres)
+    return yystrlen (yystr);
+
+  return yystpcpy (yyres, yystr) - yyres;
+}
+# endif
+
+/* Copy into *YYMSG, which is of size *YYMSG_ALLOC, an error message
+   about the unexpected token YYTOKEN for the state stack whose top is
+   YYSSP.
+
+   Return 0 if *YYMSG was successfully written.  Return 1 if *YYMSG is
+   not large enough to hold the message.  In that case, also set
+   *YYMSG_ALLOC to the required number of bytes.  Return 2 if the
+   required number of bytes is too large to store.  */
+static int
+yysyntax_error (YYSIZE_T *yymsg_alloc, char **yymsg,
+                yytype_int16 *yyssp, int yytoken)
+{
+  YYSIZE_T yysize0 = yytnamerr (YY_NULLPTR, yytname[yytoken]);
+  YYSIZE_T yysize = yysize0;
+  enum { YYERROR_VERBOSE_ARGS_MAXIMUM = 5 };
+  /* Internationalized format string. */
+  const char *yyformat = YY_NULLPTR;
+  /* Arguments of yyformat. */
+  char const *yyarg[YYERROR_VERBOSE_ARGS_MAXIMUM];
+  /* Number of reported tokens (one for the "unexpected", one per
+     "expected"). */
+  int yycount = 0;
+
+  /* There are many possibilities here to consider:
+     - If this state is a consistent state with a default action, then
+       the only way this function was invoked is if the default action
+       is an error action.  In that case, don't check for expected
+       tokens because there are none.
+     - The only way there can be no lookahead present (in yychar) is if
+       this state is a consistent state with a default action.  Thus,
+       detecting the absence of a lookahead is sufficient to determine
+       that there is no unexpected or expected token to report.  In that
+       case, just report a simple "syntax error".
+     - Don't assume there isn't a lookahead just because this state is a
+       consistent state with a default action.  There might have been a
+       previous inconsistent state, consistent state with a non-default
+       action, or user semantic action that manipulated yychar.
+     - Of course, the expected token list depends on states to have
+       correct lookahead information, and it depends on the parser not
+       to perform extra reductions after fetching a lookahead from the
+       scanner and before detecting a syntax error.  Thus, state merging
+       (from LALR or IELR) and default reductions corrupt the expected
+       token list.  However, the list is correct for canonical LR with
+       one exception: it will still contain any token that will not be
+       accepted due to an error action in a later state.
+  */
+  if (yytoken != YYEMPTY)
+    {
+      int yyn = yypact[*yyssp];
+      yyarg[yycount++] = yytname[yytoken];
+      if (!yypact_value_is_default (yyn))
+        {
+          /* Start YYX at -YYN if negative to avoid negative indexes in
+             YYCHECK.  In other words, skip the first -YYN actions for
+             this state because they are default actions.  */
+          int yyxbegin = yyn < 0 ? -yyn : 0;
+          /* Stay within bounds of both yycheck and yytname.  */
+          int yychecklim = YYLAST - yyn + 1;
+          int yyxend = yychecklim < YYNTOKENS ? yychecklim : YYNTOKENS;
+          int yyx;
+
+          for (yyx = yyxbegin; yyx < yyxend; ++yyx)
+            if (yycheck[yyx + yyn] == yyx && yyx != YYTERROR
+                && !yytable_value_is_error (yytable[yyx + yyn]))
+              {
+                if (yycount == YYERROR_VERBOSE_ARGS_MAXIMUM)
+                  {
+                    yycount = 1;
+                    yysize = yysize0;
+                    break;
+                  }
+                yyarg[yycount++] = yytname[yyx];
+                {
+                  YYSIZE_T yysize1 = yysize + yytnamerr (YY_NULLPTR, yytname[yyx]);
+                  if (! (yysize <= yysize1
+                         && yysize1 <= YYSTACK_ALLOC_MAXIMUM))
+                    return 2;
+                  yysize = yysize1;
+                }
+              }
+        }
+    }
+
+  switch (yycount)
+    {
+# define YYCASE_(N, S)                      \
+      case N:                               \
+        yyformat = S;                       \
+      break
+      YYCASE_(0, YY_("syntax error"));
+      YYCASE_(1, YY_("syntax error, unexpected %s"));
+      YYCASE_(2, YY_("syntax error, unexpected %s, expecting %s"));
+      YYCASE_(3, YY_("syntax error, unexpected %s, expecting %s or %s"));
+      YYCASE_(4, YY_("syntax error, unexpected %s, expecting %s or %s or %s"));
+      YYCASE_(5, YY_("syntax error, unexpected %s, expecting %s or %s or %s or %s"));
+# undef YYCASE_
+    }
+
+  {
+    YYSIZE_T yysize1 = yysize + yystrlen (yyformat);
+    if (! (yysize <= yysize1 && yysize1 <= YYSTACK_ALLOC_MAXIMUM))
+      return 2;
+    yysize = yysize1;
+  }
+
+  if (*yymsg_alloc < yysize)
+    {
+      *yymsg_alloc = 2 * yysize;
+      if (! (yysize <= *yymsg_alloc
+             && *yymsg_alloc <= YYSTACK_ALLOC_MAXIMUM))
+        *yymsg_alloc = YYSTACK_ALLOC_MAXIMUM;
+      return 1;
+    }
+
+  /* Avoid sprintf, as that infringes on the user's name space.
+     Don't have undefined behavior even if the translation
+     produced a string with the wrong number of "%s"s.  */
+  {
+    char *yyp = *yymsg;
+    int yyi = 0;
+    while ((*yyp = *yyformat) != '\0')
+      if (*yyp == '%' && yyformat[1] == 's' && yyi < yycount)
+        {
+          yyp += yytnamerr (yyp, yyarg[yyi++]);
+          yyformat += 2;
+        }
+      else
+        {
+          yyp++;
+          yyformat++;
+        }
+  }
+  return 0;
+}
+#endif /* YYERROR_VERBOSE */
+
+/*-----------------------------------------------.
+| Release the memory associated to this symbol.  |
+`-----------------------------------------------*/
+
+static void
+yydestruct (const char *yymsg, int yytype, YYSTYPE *yyvaluep, YYLTYPE *yylocationp)
+{
+  YYUSE (yyvaluep);
+  YYUSE (yylocationp);
+  if (!yymsg)
+    yymsg = "Deleting";
+  YY_SYMBOL_PRINT (yymsg, yytype, yyvaluep, yylocationp);
+
+  YY_IGNORE_MAYBE_UNINITIALIZED_BEGIN
+  YYUSE (yytype);
+  YY_IGNORE_MAYBE_UNINITIALIZED_END
+}
+
+
+
+
+/* The lookahead symbol.  */
+int yychar;
+
+/* The semantic value of the lookahead symbol.  */
+YYSTYPE yylval;
+/* Location data for the lookahead symbol.  */
+YYLTYPE yylloc
+# if defined YYLTYPE_IS_TRIVIAL && YYLTYPE_IS_TRIVIAL
+  = { 1, 1, 1, 1 }
+# endif
+;
+/* Number of syntax errors so far.  */
+int yynerrs;
+
+
+/*----------.
+| yyparse.  |
+`----------*/
+
+int
+yyparse (void)
+{
+    int yystate;
+    /* Number of tokens to shift before error messages enabled.  */
+    int yyerrstatus;
+
+    /* The stacks and their tools:
+       'yyss': related to states.
+       'yyvs': related to semantic values.
+       'yyls': related to locations.
+
+       Refer to the stacks through separate pointers, to allow yyoverflow
+       to reallocate them elsewhere.  */
+
+    /* The state stack.  */
+    yytype_int16 yyssa[YYINITDEPTH];
+    yytype_int16 *yyss;
+    yytype_int16 *yyssp;
+
+    /* The semantic value stack.  */
+    YYSTYPE yyvsa[YYINITDEPTH];
+    YYSTYPE *yyvs;
+    YYSTYPE *yyvsp;
+
+    /* The location stack.  */
+    YYLTYPE yylsa[YYINITDEPTH];
+    YYLTYPE *yyls;
+    YYLTYPE *yylsp;
+
+    /* The locations where the error started and ended.  */
+    YYLTYPE yyerror_range[3];
+
+    YYSIZE_T yystacksize;
+
+  int yyn;
+  int yyresult;
+  /* Lookahead token as an internal (translated) token number.  */
+  int yytoken = 0;
+  /* The variables used to return semantic value and location from the
+     action routines.  */
+  YYSTYPE yyval;
+  YYLTYPE yyloc;
+
+#if YYERROR_VERBOSE
+  /* Buffer for error messages, and its allocated size.  */
+  char yymsgbuf[128];
+  char *yymsg = yymsgbuf;
+  YYSIZE_T yymsg_alloc = sizeof yymsgbuf;
+#endif
+
+#define YYPOPSTACK(N)   (yyvsp -= (N), yyssp -= (N), yylsp -= (N))
+
+  /* The number of symbols on the RHS of the reduced rule.
+     Keep to zero when no symbol should be popped.  */
+  int yylen = 0;
+
+  yyssp = yyss = yyssa;
+  yyvsp = yyvs = yyvsa;
+  yylsp = yyls = yylsa;
+  yystacksize = YYINITDEPTH;
+
+  YYDPRINTF ((stderr, "Starting parse\n"));
+
+  yystate = 0;
+  yyerrstatus = 0;
+  yynerrs = 0;
+  yychar = YYEMPTY; /* Cause a token to be read.  */
+  yylsp[0] = yylloc;
+  goto yysetstate;
+
+/*------------------------------------------------------------.
+| yynewstate -- Push a new state, which is found in yystate.  |
+`------------------------------------------------------------*/
+ yynewstate:
+  /* In all cases, when you get here, the value and location stacks
+     have just been pushed.  So pushing a state here evens the stacks.  */
+  yyssp++;
+
+ yysetstate:
+  *yyssp = yystate;
+
+  if (yyss + yystacksize - 1 <= yyssp)
+    {
+      /* Get the current used size of the three stacks, in elements.  */
+      YYSIZE_T yysize = yyssp - yyss + 1;
+
+#ifdef yyoverflow
+      {
+        /* Give user a chance to reallocate the stack.  Use copies of
+           these so that the &'s don't force the real ones into
+           memory.  */
+        YYSTYPE *yyvs1 = yyvs;
+        yytype_int16 *yyss1 = yyss;
+        YYLTYPE *yyls1 = yyls;
+
+        /* Each stack pointer address is followed by the size of the
+           data in use in that stack, in bytes.  This used to be a
+           conditional around just the two extra args, but that might
+           be undefined if yyoverflow is a macro.  */
+        yyoverflow (YY_("memory exhausted"),
+                    &yyss1, yysize * sizeof (*yyssp),
+                    &yyvs1, yysize * sizeof (*yyvsp),
+                    &yyls1, yysize * sizeof (*yylsp),
+                    &yystacksize);
+
+        yyls = yyls1;
+        yyss = yyss1;
+        yyvs = yyvs1;
+      }
+#else /* no yyoverflow */
+# ifndef YYSTACK_RELOCATE
+      goto yyexhaustedlab;
+# else
+      /* Extend the stack our own way.  */
+      if (YYMAXDEPTH <= yystacksize)
+        goto yyexhaustedlab;
+      yystacksize *= 2;
+      if (YYMAXDEPTH < yystacksize)
+        yystacksize = YYMAXDEPTH;
+
+      {
+        yytype_int16 *yyss1 = yyss;
+        union yyalloc *yyptr =
+          (union yyalloc *) YYSTACK_ALLOC (YYSTACK_BYTES (yystacksize));
+        if (! yyptr)
+          goto yyexhaustedlab;
+        YYSTACK_RELOCATE (yyss_alloc, yyss);
+        YYSTACK_RELOCATE (yyvs_alloc, yyvs);
+        YYSTACK_RELOCATE (yyls_alloc, yyls);
+#  undef YYSTACK_RELOCATE
+        if (yyss1 != yyssa)
+          YYSTACK_FREE (yyss1);
+      }
+# endif
+#endif /* no yyoverflow */
+
+      yyssp = yyss + yysize - 1;
+      yyvsp = yyvs + yysize - 1;
+      yylsp = yyls + yysize - 1;
+
+      YYDPRINTF ((stderr, "Stack size increased to %lu\n",
+                  (unsigned long int) yystacksize));
+
+      if (yyss + yystacksize - 1 <= yyssp)
+        YYABORT;
+    }
+
+  YYDPRINTF ((stderr, "Entering state %d\n", yystate));
+
+  if (yystate == YYFINAL)
+    YYACCEPT;
+
+  goto yybackup;
+
+/*-----------.
+| yybackup.  |
+`-----------*/
+yybackup:
+
+  /* Do appropriate processing given the current state.  Read a
+     lookahead token if we need one and don't already have one.  */
+
+  /* First try to decide what to do without reference to lookahead token.  */
+  yyn = yypact[yystate];
+  if (yypact_value_is_default (yyn))
+    goto yydefault;
+
+  /* Not known => get a lookahead token if don't already have one.  */
+
+  /* YYCHAR is either YYEMPTY or YYEOF or a valid lookahead symbol.  */
+  if (yychar == YYEMPTY)
+    {
+      YYDPRINTF ((stderr, "Reading a token: "));
+      yychar = yylex ();
+    }
+
+  if (yychar <= YYEOF)
+    {
+      yychar = yytoken = YYEOF;
+      YYDPRINTF ((stderr, "Now at end of input.\n"));
+    }
+  else
+    {
+      yytoken = YYTRANSLATE (yychar);
+      YY_SYMBOL_PRINT ("Next token is", yytoken, &yylval, &yylloc);
+    }
+
+  /* If the proper action on seeing token YYTOKEN is to reduce or to
+     detect an error, take that action.  */
+  yyn += yytoken;
+  if (yyn < 0 || YYLAST < yyn || yycheck[yyn] != yytoken)
+    goto yydefault;
+  yyn = yytable[yyn];
+  if (yyn <= 0)
+    {
+      if (yytable_value_is_error (yyn))
+        goto yyerrlab;
+      yyn = -yyn;
+      goto yyreduce;
+    }
+
+  /* Count tokens shifted since error; after three, turn off error
+     status.  */
+  if (yyerrstatus)
+    yyerrstatus--;
+
+  /* Shift the lookahead token.  */
+  YY_SYMBOL_PRINT ("Shifting", yytoken, &yylval, &yylloc);
+
+  /* Discard the shifted token.  */
+  yychar = YYEMPTY;
+
+  yystate = yyn;
+  YY_IGNORE_MAYBE_UNINITIALIZED_BEGIN
+  *++yyvsp = yylval;
+  YY_IGNORE_MAYBE_UNINITIALIZED_END
+  *++yylsp = yylloc;
+  goto yynewstate;
+
+
+/*-----------------------------------------------------------.
+| yydefault -- do the default action for the current state.  |
+`-----------------------------------------------------------*/
+yydefault:
+  yyn = yydefact[yystate];
+  if (yyn == 0)
+    goto yyerrlab;
+  goto yyreduce;
+
+
+/*-----------------------------.
+| yyreduce -- Do a reduction.  |
+`-----------------------------*/
+yyreduce:
+  /* yyn is the number of a rule to reduce with.  */
+  yylen = yyr2[yyn];
+
+  /* If YYLEN is nonzero, implement the default value of the action:
+     '$$ = $1'.
+
+     Otherwise, the following line sets YYVAL to garbage.
+     This behavior is undocumented and Bison
+     users should not rely upon it.  Assigning to YYVAL
+     unconditionally makes the parser a bit smaller, and it avoids a
+     GCC warning that YYVAL may be used uninitialized.  */
+  yyval = yyvsp[1-yylen];
+
+  /* Default location.  */
+  YYLLOC_DEFAULT (yyloc, (yylsp - yylen), yylen);
+  YY_REDUCE_PRINT (yyn);
+  switch (yyn)
+    {
+        case 2:
+#line 110 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			parser_output = build_dt_info((yyvsp[-2].flags), (yyvsp[-1].re), (yyvsp[0].node),
+			                              guess_boot_cpuid((yyvsp[0].node)));
+		}
+#line 1476 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 3:
+#line 118 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.flags) = DTSF_V1;
+		}
+#line 1484 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 4:
+#line 122 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.flags) = DTSF_V1 | DTSF_PLUGIN;
+		}
+#line 1492 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 6:
+#line 130 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			if ((yyvsp[0].flags) != (yyvsp[-1].flags))
+				ERROR(&(yylsp[0]), "Header flags don't match earlier ones");
+			(yyval.flags) = (yyvsp[-1].flags);
+		}
+#line 1502 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 7:
+#line 139 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.re) = NULL;
+		}
+#line 1510 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 8:
+#line 143 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.re) = chain_reserve_entry((yyvsp[-1].re), (yyvsp[0].re));
+		}
+#line 1518 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 9:
+#line 150 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.re) = build_reserve_entry((yyvsp[-2].integer), (yyvsp[-1].integer));
+		}
+#line 1526 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 10:
+#line 154 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			add_label(&(yyvsp[0].re)->labels, (yyvsp[-1].labelref));
+			(yyval.re) = (yyvsp[0].re);
+		}
+#line 1535 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 11:
+#line 162 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.node) = name_node((yyvsp[0].node), "");
+		}
+#line 1543 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 12:
+#line 166 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.node) = merge_nodes((yyvsp[-2].node), (yyvsp[0].node));
+		}
+#line 1551 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 13:
+#line 171 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			struct node *target = get_node_by_ref((yyvsp[-3].node), (yyvsp[-1].labelref));
+
+			if (target) {
+				add_label(&target->labels, (yyvsp[-2].labelref));
+				merge_nodes(target, (yyvsp[0].node));
+			} else
+				ERROR(&(yylsp[-1]), "Label or path %s not found", (yyvsp[-1].labelref));
+			(yyval.node) = (yyvsp[-3].node);
+		}
+#line 1566 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 14:
+#line 182 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			struct node *target = get_node_by_ref((yyvsp[-2].node), (yyvsp[-1].labelref));
+
+			if (target)
+				merge_nodes(target, (yyvsp[0].node));
+			else
+				ERROR(&(yylsp[-1]), "Label or path %s not found", (yyvsp[-1].labelref));
+			(yyval.node) = (yyvsp[-2].node);
+		}
+#line 1580 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 15:
+#line 192 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			struct node *target = get_node_by_ref((yyvsp[-3].node), (yyvsp[-1].labelref));
+
+			if (target)
+				delete_node(target);
+			else
+				ERROR(&(yylsp[-1]), "Label or path %s not found", (yyvsp[-1].labelref));
+
+
+			(yyval.node) = (yyvsp[-3].node);
+		}
+#line 1596 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 16:
+#line 207 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.node) = build_node((yyvsp[-3].proplist), (yyvsp[-2].nodelist));
+		}
+#line 1604 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 17:
+#line 214 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.proplist) = NULL;
+		}
+#line 1612 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 18:
+#line 218 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.proplist) = chain_property((yyvsp[0].prop), (yyvsp[-1].proplist));
+		}
+#line 1620 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 19:
+#line 225 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.prop) = build_property((yyvsp[-3].propnodename), (yyvsp[-1].data));
+		}
+#line 1628 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 20:
+#line 229 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.prop) = build_property((yyvsp[-1].propnodename), empty_data);
+		}
+#line 1636 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 21:
+#line 233 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.prop) = build_property_delete((yyvsp[-1].propnodename));
+		}
+#line 1644 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 22:
+#line 237 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			add_label(&(yyvsp[0].prop)->labels, (yyvsp[-1].labelref));
+			(yyval.prop) = (yyvsp[0].prop);
+		}
+#line 1653 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 23:
+#line 245 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.data) = data_merge((yyvsp[-1].data), (yyvsp[0].data));
+		}
+#line 1661 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 24:
+#line 249 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.data) = data_merge((yyvsp[-2].data), (yyvsp[-1].array).data);
+		}
+#line 1669 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 25:
+#line 253 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.data) = data_merge((yyvsp[-3].data), (yyvsp[-1].data));
+		}
+#line 1677 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 26:
+#line 257 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.data) = data_add_marker((yyvsp[-1].data), REF_PATH, (yyvsp[0].labelref));
+		}
+#line 1685 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 27:
+#line 261 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			FILE *f = srcfile_relative_open((yyvsp[-5].data).val, NULL);
+			struct data d;
+
+			if ((yyvsp[-3].integer) != 0)
+				if (fseek(f, (yyvsp[-3].integer), SEEK_SET) != 0)
+					die("Couldn't seek to offset %llu in \"%s\": %s",
+					    (unsigned long long)(yyvsp[-3].integer), (yyvsp[-5].data).val,
+					    strerror(errno));
+
+			d = data_copy_file(f, (yyvsp[-1].integer));
+
+			(yyval.data) = data_merge((yyvsp[-8].data), d);
+			fclose(f);
+		}
+#line 1705 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 28:
+#line 277 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			FILE *f = srcfile_relative_open((yyvsp[-1].data).val, NULL);
+			struct data d = empty_data;
+
+			d = data_copy_file(f, -1);
+
+			(yyval.data) = data_merge((yyvsp[-4].data), d);
+			fclose(f);
+		}
+#line 1719 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 29:
+#line 287 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.data) = data_add_marker((yyvsp[-1].data), LABEL, (yyvsp[0].labelref));
+		}
+#line 1727 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 30:
+#line 294 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.data) = empty_data;
+		}
+#line 1735 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 31:
+#line 298 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.data) = (yyvsp[-1].data);
+		}
+#line 1743 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 32:
+#line 302 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.data) = data_add_marker((yyvsp[-1].data), LABEL, (yyvsp[0].labelref));
+		}
+#line 1751 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 33:
+#line 309 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			unsigned long long bits;
+
+			bits = (yyvsp[-1].integer);
+
+			if ((bits !=  8) && (bits != 16) &&
+			    (bits != 32) && (bits != 64)) {
+				ERROR(&(yylsp[-1]), "Array elements must be"
+				      " 8, 16, 32 or 64-bits");
+				bits = 32;
+			}
+
+			(yyval.array).data = empty_data;
+			(yyval.array).bits = bits;
+		}
+#line 1771 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 34:
+#line 325 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.array).data = empty_data;
+			(yyval.array).bits = 32;
+		}
+#line 1780 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 35:
+#line 330 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			if ((yyvsp[-1].array).bits < 64) {
+				uint64_t mask = (1ULL << (yyvsp[-1].array).bits) - 1;
+				/*
+				 * Bits above mask must either be all zero
+				 * (positive within range of mask) or all one
+				 * (negative and sign-extended). The second
+				 * condition is true if when we set all bits
+				 * within the mask to one (i.e. | in the
+				 * mask), all bits are one.
+				 */
+				if (((yyvsp[0].integer) > mask) && (((yyvsp[0].integer) | mask) != -1ULL))
+					ERROR(&(yylsp[0]), "Value out of range for"
+					      " %d-bit array element", (yyvsp[-1].array).bits);
+			}
+
+			(yyval.array).data = data_append_integer((yyvsp[-1].array).data, (yyvsp[0].integer), (yyvsp[-1].array).bits);
+		}
+#line 1803 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 36:
+#line 349 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			uint64_t val = ~0ULL >> (64 - (yyvsp[-1].array).bits);
+
+			if ((yyvsp[-1].array).bits == 32)
+				(yyvsp[-1].array).data = data_add_marker((yyvsp[-1].array).data,
+							  REF_PHANDLE,
+							  (yyvsp[0].labelref));
+			else
+				ERROR(&(yylsp[0]), "References are only allowed in "
+					    "arrays with 32-bit elements.");
+
+			(yyval.array).data = data_append_integer((yyvsp[-1].array).data, val, (yyvsp[-1].array).bits);
+		}
+#line 1821 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 37:
+#line 363 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.array).data = data_add_marker((yyvsp[-1].array).data, LABEL, (yyvsp[0].labelref));
+		}
+#line 1829 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 40:
+#line 372 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.integer) = (yyvsp[-1].integer);
+		}
+#line 1837 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 43:
+#line 383 "dtc-parser.y" /* yacc.c:1646  */
+    { (yyval.integer) = (yyvsp[-4].integer) ? (yyvsp[-2].integer) : (yyvsp[0].integer); }
+#line 1843 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 45:
+#line 388 "dtc-parser.y" /* yacc.c:1646  */
+    { (yyval.integer) = (yyvsp[-2].integer) || (yyvsp[0].integer); }
+#line 1849 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 47:
+#line 393 "dtc-parser.y" /* yacc.c:1646  */
+    { (yyval.integer) = (yyvsp[-2].integer) && (yyvsp[0].integer); }
+#line 1855 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 49:
+#line 398 "dtc-parser.y" /* yacc.c:1646  */
+    { (yyval.integer) = (yyvsp[-2].integer) | (yyvsp[0].integer); }
+#line 1861 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 51:
+#line 403 "dtc-parser.y" /* yacc.c:1646  */
+    { (yyval.integer) = (yyvsp[-2].integer) ^ (yyvsp[0].integer); }
+#line 1867 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 53:
+#line 408 "dtc-parser.y" /* yacc.c:1646  */
+    { (yyval.integer) = (yyvsp[-2].integer) & (yyvsp[0].integer); }
+#line 1873 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 55:
+#line 413 "dtc-parser.y" /* yacc.c:1646  */
+    { (yyval.integer) = (yyvsp[-2].integer) == (yyvsp[0].integer); }
+#line 1879 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 56:
+#line 414 "dtc-parser.y" /* yacc.c:1646  */
+    { (yyval.integer) = (yyvsp[-2].integer) != (yyvsp[0].integer); }
+#line 1885 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 58:
+#line 419 "dtc-parser.y" /* yacc.c:1646  */
+    { (yyval.integer) = (yyvsp[-2].integer) < (yyvsp[0].integer); }
+#line 1891 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 59:
+#line 420 "dtc-parser.y" /* yacc.c:1646  */
+    { (yyval.integer) = (yyvsp[-2].integer) > (yyvsp[0].integer); }
+#line 1897 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 60:
+#line 421 "dtc-parser.y" /* yacc.c:1646  */
+    { (yyval.integer) = (yyvsp[-2].integer) <= (yyvsp[0].integer); }
+#line 1903 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 61:
+#line 422 "dtc-parser.y" /* yacc.c:1646  */
+    { (yyval.integer) = (yyvsp[-2].integer) >= (yyvsp[0].integer); }
+#line 1909 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 62:
+#line 426 "dtc-parser.y" /* yacc.c:1646  */
+    { (yyval.integer) = (yyvsp[-2].integer) << (yyvsp[0].integer); }
+#line 1915 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 63:
+#line 427 "dtc-parser.y" /* yacc.c:1646  */
+    { (yyval.integer) = (yyvsp[-2].integer) >> (yyvsp[0].integer); }
+#line 1921 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 65:
+#line 432 "dtc-parser.y" /* yacc.c:1646  */
+    { (yyval.integer) = (yyvsp[-2].integer) + (yyvsp[0].integer); }
+#line 1927 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 66:
+#line 433 "dtc-parser.y" /* yacc.c:1646  */
+    { (yyval.integer) = (yyvsp[-2].integer) - (yyvsp[0].integer); }
+#line 1933 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 68:
+#line 438 "dtc-parser.y" /* yacc.c:1646  */
+    { (yyval.integer) = (yyvsp[-2].integer) * (yyvsp[0].integer); }
+#line 1939 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 69:
+#line 440 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			if ((yyvsp[0].integer) != 0) {
+				(yyval.integer) = (yyvsp[-2].integer) / (yyvsp[0].integer);
+			} else {
+				ERROR(&(yyloc), "Division by zero");
+				(yyval.integer) = 0;
+			}
+		}
+#line 1952 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 70:
+#line 449 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			if ((yyvsp[0].integer) != 0) {
+				(yyval.integer) = (yyvsp[-2].integer) % (yyvsp[0].integer);
+			} else {
+				ERROR(&(yyloc), "Division by zero");
+				(yyval.integer) = 0;
+			}
+		}
+#line 1965 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 73:
+#line 462 "dtc-parser.y" /* yacc.c:1646  */
+    { (yyval.integer) = -(yyvsp[0].integer); }
+#line 1971 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 74:
+#line 463 "dtc-parser.y" /* yacc.c:1646  */
+    { (yyval.integer) = ~(yyvsp[0].integer); }
+#line 1977 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 75:
+#line 464 "dtc-parser.y" /* yacc.c:1646  */
+    { (yyval.integer) = !(yyvsp[0].integer); }
+#line 1983 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 76:
+#line 469 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.data) = empty_data;
+		}
+#line 1991 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 77:
+#line 473 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.data) = data_append_byte((yyvsp[-1].data), (yyvsp[0].byte));
+		}
+#line 1999 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 78:
+#line 477 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.data) = data_add_marker((yyvsp[-1].data), LABEL, (yyvsp[0].labelref));
+		}
+#line 2007 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 79:
+#line 484 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.nodelist) = NULL;
+		}
+#line 2015 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 80:
+#line 488 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.nodelist) = chain_node((yyvsp[-1].node), (yyvsp[0].nodelist));
+		}
+#line 2023 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 81:
+#line 492 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			ERROR(&(yylsp[0]), "Properties must precede subnodes");
+			YYERROR;
+		}
+#line 2032 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 82:
+#line 500 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.node) = name_node((yyvsp[0].node), (yyvsp[-1].propnodename));
+		}
+#line 2040 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 83:
+#line 504 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.node) = name_node(build_node_delete(), (yyvsp[-1].propnodename));
+		}
+#line 2048 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 84:
+#line 508 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			add_label(&(yyvsp[0].node)->labels, (yyvsp[-1].labelref));
+			(yyval.node) = (yyvsp[0].node);
+		}
+#line 2057 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+
+#line 2061 "dtc-parser.tab.c" /* yacc.c:1646  */
+      default: break;
+    }
+  /* User semantic actions sometimes alter yychar, and that requires
+     that yytoken be updated with the new translation.  We take the
+     approach of translating immediately before every use of yytoken.
+     One alternative is translating here after every semantic action,
+     but that translation would be missed if the semantic action invokes
+     YYABORT, YYACCEPT, or YYERROR immediately after altering yychar or
+     if it invokes YYBACKUP.  In the case of YYABORT or YYACCEPT, an
+     incorrect destructor might then be invoked immediately.  In the
+     case of YYERROR or YYBACKUP, subsequent parser actions might lead
+     to an incorrect destructor call or verbose syntax error message
+     before the lookahead is translated.  */
+  YY_SYMBOL_PRINT ("-> $$ =", yyr1[yyn], &yyval, &yyloc);
+
+  YYPOPSTACK (yylen);
+  yylen = 0;
+  YY_STACK_PRINT (yyss, yyssp);
+
+  *++yyvsp = yyval;
+  *++yylsp = yyloc;
+
+  /* Now 'shift' the result of the reduction.  Determine what state
+     that goes to, based on the state we popped back to and the rule
+     number reduced by.  */
+
+  yyn = yyr1[yyn];
+
+  yystate = yypgoto[yyn - YYNTOKENS] + *yyssp;
+  if (0 <= yystate && yystate <= YYLAST && yycheck[yystate] == *yyssp)
+    yystate = yytable[yystate];
+  else
+    yystate = yydefgoto[yyn - YYNTOKENS];
+
+  goto yynewstate;
+
+
+/*--------------------------------------.
+| yyerrlab -- here on detecting error.  |
+`--------------------------------------*/
+yyerrlab:
+  /* Make sure we have latest lookahead translation.  See comments at
+     user semantic actions for why this is necessary.  */
+  yytoken = yychar == YYEMPTY ? YYEMPTY : YYTRANSLATE (yychar);
+
+  /* If not already recovering from an error, report this error.  */
+  if (!yyerrstatus)
+    {
+      ++yynerrs;
+#if ! YYERROR_VERBOSE
+      yyerror (YY_("syntax error"));
+#else
+# define YYSYNTAX_ERROR yysyntax_error (&yymsg_alloc, &yymsg, \
+                                        yyssp, yytoken)
+      {
+        char const *yymsgp = YY_("syntax error");
+        int yysyntax_error_status;
+        yysyntax_error_status = YYSYNTAX_ERROR;
+        if (yysyntax_error_status == 0)
+          yymsgp = yymsg;
+        else if (yysyntax_error_status == 1)
+          {
+            if (yymsg != yymsgbuf)
+              YYSTACK_FREE (yymsg);
+            yymsg = (char *) YYSTACK_ALLOC (yymsg_alloc);
+            if (!yymsg)
+              {
+                yymsg = yymsgbuf;
+                yymsg_alloc = sizeof yymsgbuf;
+                yysyntax_error_status = 2;
+              }
+            else
+              {
+                yysyntax_error_status = YYSYNTAX_ERROR;
+                yymsgp = yymsg;
+              }
+          }
+        yyerror (yymsgp);
+        if (yysyntax_error_status == 2)
+          goto yyexhaustedlab;
+      }
+# undef YYSYNTAX_ERROR
+#endif
+    }
+
+  yyerror_range[1] = yylloc;
+
+  if (yyerrstatus == 3)
+    {
+      /* If just tried and failed to reuse lookahead token after an
+         error, discard it.  */
+
+      if (yychar <= YYEOF)
+        {
+          /* Return failure if at end of input.  */
+          if (yychar == YYEOF)
+            YYABORT;
+        }
+      else
+        {
+          yydestruct ("Error: discarding",
+                      yytoken, &yylval, &yylloc);
+          yychar = YYEMPTY;
+        }
+    }
+
+  /* Else will try to reuse lookahead token after shifting the error
+     token.  */
+  goto yyerrlab1;
+
+
+/*---------------------------------------------------.
+| yyerrorlab -- error raised explicitly by YYERROR.  |
+`---------------------------------------------------*/
+yyerrorlab:
+
+  /* Pacify compilers like GCC when the user code never invokes
+     YYERROR and the label yyerrorlab therefore never appears in user
+     code.  */
+  if (/*CONSTCOND*/ 0)
+     goto yyerrorlab;
+
+  yyerror_range[1] = yylsp[1-yylen];
+  /* Do not reclaim the symbols of the rule whose action triggered
+     this YYERROR.  */
+  YYPOPSTACK (yylen);
+  yylen = 0;
+  YY_STACK_PRINT (yyss, yyssp);
+  yystate = *yyssp;
+  goto yyerrlab1;
+
+
+/*-------------------------------------------------------------.
+| yyerrlab1 -- common code for both syntax error and YYERROR.  |
+`-------------------------------------------------------------*/
+yyerrlab1:
+  yyerrstatus = 3;      /* Each real token shifted decrements this.  */
+
+  for (;;)
+    {
+      yyn = yypact[yystate];
+      if (!yypact_value_is_default (yyn))
+        {
+          yyn += YYTERROR;
+          if (0 <= yyn && yyn <= YYLAST && yycheck[yyn] == YYTERROR)
+            {
+              yyn = yytable[yyn];
+              if (0 < yyn)
+                break;
+            }
+        }
+
+      /* Pop the current state because it cannot handle the error token.  */
+      if (yyssp == yyss)
+        YYABORT;
+
+      yyerror_range[1] = *yylsp;
+      yydestruct ("Error: popping",
+                  yystos[yystate], yyvsp, yylsp);
+      YYPOPSTACK (1);
+      yystate = *yyssp;
+      YY_STACK_PRINT (yyss, yyssp);
+    }
+
+  YY_IGNORE_MAYBE_UNINITIALIZED_BEGIN
+  *++yyvsp = yylval;
+  YY_IGNORE_MAYBE_UNINITIALIZED_END
+
+  yyerror_range[2] = yylloc;
+  /* Using YYLLOC is tempting, but would change the location of
+     the lookahead.  YYLOC is available though.  */
+  YYLLOC_DEFAULT (yyloc, yyerror_range, 2);
+  *++yylsp = yyloc;
+
+  /* Shift the error token.  */
+  YY_SYMBOL_PRINT ("Shifting", yystos[yyn], yyvsp, yylsp);
+
+  yystate = yyn;
+  goto yynewstate;
+
+
+/*-------------------------------------.
+| yyacceptlab -- YYACCEPT comes here.  |
+`-------------------------------------*/
+yyacceptlab:
+  yyresult = 0;
+  goto yyreturn;
+
+/*-----------------------------------.
+| yyabortlab -- YYABORT comes here.  |
+`-----------------------------------*/
+yyabortlab:
+  yyresult = 1;
+  goto yyreturn;
+
+#if !defined yyoverflow || YYERROR_VERBOSE
+/*-------------------------------------------------.
+| yyexhaustedlab -- memory exhaustion comes here.  |
+`-------------------------------------------------*/
+yyexhaustedlab:
+  yyerror (YY_("memory exhausted"));
+  yyresult = 2;
+  /* Fall through.  */
+#endif
+
+yyreturn:
+  if (yychar != YYEMPTY)
+    {
+      /* Make sure we have latest lookahead translation.  See comments at
+         user semantic actions for why this is necessary.  */
+      yytoken = YYTRANSLATE (yychar);
+      yydestruct ("Cleanup: discarding lookahead",
+                  yytoken, &yylval, &yylloc);
+    }
+  /* Do not reclaim the symbols of the rule whose action triggered
+     this YYABORT or YYACCEPT.  */
+  YYPOPSTACK (yylen);
+  YY_STACK_PRINT (yyss, yyssp);
+  while (yyssp != yyss)
+    {
+      yydestruct ("Cleanup: popping",
+                  yystos[*yyssp], yyvsp, yylsp);
+      YYPOPSTACK (1);
+    }
+#ifndef yyoverflow
+  if (yyss != yyssa)
+    YYSTACK_FREE (yyss);
+#endif
+#if YYERROR_VERBOSE
+  if (yymsg != yymsgbuf)
+    YYSTACK_FREE (yymsg);
+#endif
+  return yyresult;
+}
+#line 514 "dtc-parser.y" /* yacc.c:1906  */
+
+
+void yyerror(char const *s)
+{
+	ERROR(&yylloc, "%s", s);
+}
diff --git a/scripts/dtc/dtc-parser.tab.h_shipped b/scripts/dtc/dtc-parser.tab.h_shipped
new file mode 100644
index 0000000000..e7b04dd016
--- /dev/null
+++ b/scripts/dtc/dtc-parser.tab.h_shipped
@@ -0,0 +1,123 @@
+/* A Bison parser, made by GNU Bison 3.0.2.  */
+
+/* Bison interface for Yacc-like parsers in C
+
+   Copyright (C) 1984, 1989-1990, 2000-2013 Free Software Foundation, Inc.
+
+   This program is free software: you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation, either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+/* As a special exception, you may create a larger work that contains
+   part or all of the Bison parser skeleton and distribute that work
+   under terms of your choice, so long as that work isn't itself a
+   parser generator using the skeleton or a modified version thereof
+   as a parser skeleton.  Alternatively, if you modify or redistribute
+   the parser skeleton itself, you may (at your option) remove this
+   special exception, which will cause the skeleton and the resulting
+   Bison output files to be licensed under the GNU General Public
+   License without this special exception.
+
+   This special exception was added by the Free Software Foundation in
+   version 2.2 of Bison.  */
+
+#ifndef YY_YY_DTC_PARSER_TAB_H_INCLUDED
+# define YY_YY_DTC_PARSER_TAB_H_INCLUDED
+/* Debug traces.  */
+#ifndef YYDEBUG
+# define YYDEBUG 0
+#endif
+#if YYDEBUG
+extern int yydebug;
+#endif
+
+/* Token type.  */
+#ifndef YYTOKENTYPE
+# define YYTOKENTYPE
+  enum yytokentype
+  {
+    DT_V1 = 258,
+    DT_PLUGIN = 259,
+    DT_MEMRESERVE = 260,
+    DT_LSHIFT = 261,
+    DT_RSHIFT = 262,
+    DT_LE = 263,
+    DT_GE = 264,
+    DT_EQ = 265,
+    DT_NE = 266,
+    DT_AND = 267,
+    DT_OR = 268,
+    DT_BITS = 269,
+    DT_DEL_PROP = 270,
+    DT_DEL_NODE = 271,
+    DT_PROPNODENAME = 272,
+    DT_LITERAL = 273,
+    DT_CHAR_LITERAL = 274,
+    DT_BYTE = 275,
+    DT_STRING = 276,
+    DT_LABEL = 277,
+    DT_REF = 278,
+    DT_INCBIN = 279
+  };
+#endif
+
+/* Value type.  */
+#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
+typedef union YYSTYPE YYSTYPE;
+union YYSTYPE
+{
+#line 39 "dtc-parser.y" /* yacc.c:1909  */
+
+	char *propnodename;
+	char *labelref;
+	uint8_t byte;
+	struct data data;
+
+	struct {
+		struct data	data;
+		int		bits;
+	} array;
+
+	struct property *prop;
+	struct property *proplist;
+	struct node *node;
+	struct node *nodelist;
+	struct reserve_info *re;
+	uint64_t integer;
+	unsigned int flags;
+
+#line 99 "dtc-parser.tab.h" /* yacc.c:1909  */
+};
+# define YYSTYPE_IS_TRIVIAL 1
+# define YYSTYPE_IS_DECLARED 1
+#endif
+
+/* Location type.  */
+#if ! defined YYLTYPE && ! defined YYLTYPE_IS_DECLARED
+typedef struct YYLTYPE YYLTYPE;
+struct YYLTYPE
+{
+  int first_line;
+  int first_column;
+  int last_line;
+  int last_column;
+};
+# define YYLTYPE_IS_DECLARED 1
+# define YYLTYPE_IS_TRIVIAL 1
+#endif
+
+
+extern YYSTYPE yylval;
+extern YYLTYPE yylloc;
+int yyparse (void);
+
+#endif /* !YY_YY_DTC_PARSER_TAB_H_INCLUDED  */
diff --git a/scripts/dtc/dtc-parser.y b/scripts/dtc/dtc-parser.y
new file mode 100644
index 0000000000..ca3f500342
--- /dev/null
+++ b/scripts/dtc/dtc-parser.y
@@ -0,0 +1,519 @@
+/*
+ * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation.  2005.
+ *
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ *  General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307
+ *                                                                   USA
+ */
+%{
+#include <stdio.h>
+#include <inttypes.h>
+
+#include "dtc.h"
+#include "srcpos.h"
+
+extern int yylex(void);
+extern void yyerror(char const *s);
+#define ERROR(loc, ...) \
+	do { \
+		srcpos_error((loc), "Error", __VA_ARGS__); \
+		treesource_error = true; \
+	} while (0)
+
+extern struct dt_info *parser_output;
+extern bool treesource_error;
+%}
+
+%union {
+	char *propnodename;
+	char *labelref;
+	uint8_t byte;
+	struct data data;
+
+	struct {
+		struct data	data;
+		int		bits;
+	} array;
+
+	struct property *prop;
+	struct property *proplist;
+	struct node *node;
+	struct node *nodelist;
+	struct reserve_info *re;
+	uint64_t integer;
+	unsigned int flags;
+}
+
+%token DT_V1
+%token DT_PLUGIN
+%token DT_MEMRESERVE
+%token DT_LSHIFT DT_RSHIFT DT_LE DT_GE DT_EQ DT_NE DT_AND DT_OR
+%token DT_BITS
+%token DT_DEL_PROP
+%token DT_DEL_NODE
+%token <propnodename> DT_PROPNODENAME
+%token <integer> DT_LITERAL
+%token <integer> DT_CHAR_LITERAL
+%token <byte> DT_BYTE
+%token <data> DT_STRING
+%token <labelref> DT_LABEL
+%token <labelref> DT_REF
+%token DT_INCBIN
+
+%type <data> propdata
+%type <data> propdataprefix
+%type <flags> header
+%type <flags> headers
+%type <re> memreserve
+%type <re> memreserves
+%type <array> arrayprefix
+%type <data> bytestring
+%type <prop> propdef
+%type <proplist> proplist
+
+%type <node> devicetree
+%type <node> nodedef
+%type <node> subnode
+%type <nodelist> subnodes
+
+%type <integer> integer_prim
+%type <integer> integer_unary
+%type <integer> integer_mul
+%type <integer> integer_add
+%type <integer> integer_shift
+%type <integer> integer_rela
+%type <integer> integer_eq
+%type <integer> integer_bitand
+%type <integer> integer_bitxor
+%type <integer> integer_bitor
+%type <integer> integer_and
+%type <integer> integer_or
+%type <integer> integer_trinary
+%type <integer> integer_expr
+
+%%
+
+sourcefile:
+	  headers memreserves devicetree
+		{
+			parser_output = build_dt_info($1, $2, $3,
+			                              guess_boot_cpuid($3));
+		}
+	;
+
+header:
+	  DT_V1 ';'
+		{
+			$$ = DTSF_V1;
+		}
+	| DT_V1 ';' DT_PLUGIN ';'
+		{
+			$$ = DTSF_V1 | DTSF_PLUGIN;
+		}
+	;
+
+headers:
+	  header
+	| header headers
+		{
+			if ($2 != $1)
+				ERROR(&@2, "Header flags don't match earlier ones");
+			$$ = $1;
+		}
+	;
+
+memreserves:
+	  /* empty */
+		{
+			$$ = NULL;
+		}
+	| memreserve memreserves
+		{
+			$$ = chain_reserve_entry($1, $2);
+		}
+	;
+
+memreserve:
+	  DT_MEMRESERVE integer_prim integer_prim ';'
+		{
+			$$ = build_reserve_entry($2, $3);
+		}
+	| DT_LABEL memreserve
+		{
+			add_label(&$2->labels, $1);
+			$$ = $2;
+		}
+	;
+
+devicetree:
+	  '/' nodedef
+		{
+			$$ = name_node($2, "");
+		}
+	| devicetree '/' nodedef
+		{
+			$$ = merge_nodes($1, $3);
+		}
+
+	| devicetree DT_LABEL DT_REF nodedef
+		{
+			struct node *target = get_node_by_ref($1, $3);
+
+			if (target) {
+				add_label(&target->labels, $2);
+				merge_nodes(target, $4);
+			} else
+				ERROR(&@3, "Label or path %s not found", $3);
+			$$ = $1;
+		}
+	| devicetree DT_REF nodedef
+		{
+			struct node *target = get_node_by_ref($1, $2);
+
+			if (target)
+				merge_nodes(target, $3);
+			else
+				ERROR(&@2, "Label or path %s not found", $2);
+			$$ = $1;
+		}
+	| devicetree DT_DEL_NODE DT_REF ';'
+		{
+			struct node *target = get_node_by_ref($1, $3);
+
+			if (target)
+				delete_node(target);
+			else
+				ERROR(&@3, "Label or path %s not found", $3);
+
+
+			$$ = $1;
+		}
+	;
+
+nodedef:
+	  '{' proplist subnodes '}' ';'
+		{
+			$$ = build_node($2, $3);
+		}
+	;
+
+proplist:
+	  /* empty */
+		{
+			$$ = NULL;
+		}
+	| proplist propdef
+		{
+			$$ = chain_property($2, $1);
+		}
+	;
+
+propdef:
+	  DT_PROPNODENAME '=' propdata ';'
+		{
+			$$ = build_property($1, $3);
+		}
+	| DT_PROPNODENAME ';'
+		{
+			$$ = build_property($1, empty_data);
+		}
+	| DT_DEL_PROP DT_PROPNODENAME ';'
+		{
+			$$ = build_property_delete($2);
+		}
+	| DT_LABEL propdef
+		{
+			add_label(&$2->labels, $1);
+			$$ = $2;
+		}
+	;
+
+propdata:
+	  propdataprefix DT_STRING
+		{
+			$$ = data_merge($1, $2);
+		}
+	| propdataprefix arrayprefix '>'
+		{
+			$$ = data_merge($1, $2.data);
+		}
+	| propdataprefix '[' bytestring ']'
+		{
+			$$ = data_merge($1, $3);
+		}
+	| propdataprefix DT_REF
+		{
+			$$ = data_add_marker($1, REF_PATH, $2);
+		}
+	| propdataprefix DT_INCBIN '(' DT_STRING ',' integer_prim ',' integer_prim ')'
+		{
+			FILE *f = srcfile_relative_open($4.val, NULL);
+			struct data d;
+
+			if ($6 != 0)
+				if (fseek(f, $6, SEEK_SET) != 0)
+					die("Couldn't seek to offset %llu in \"%s\": %s",
+					    (unsigned long long)$6, $4.val,
+					    strerror(errno));
+
+			d = data_copy_file(f, $8);
+
+			$$ = data_merge($1, d);
+			fclose(f);
+		}
+	| propdataprefix DT_INCBIN '(' DT_STRING ')'
+		{
+			FILE *f = srcfile_relative_open($4.val, NULL);
+			struct data d = empty_data;
+
+			d = data_copy_file(f, -1);
+
+			$$ = data_merge($1, d);
+			fclose(f);
+		}
+	| propdata DT_LABEL
+		{
+			$$ = data_add_marker($1, LABEL, $2);
+		}
+	;
+
+propdataprefix:
+	  /* empty */
+		{
+			$$ = empty_data;
+		}
+	| propdata ','
+		{
+			$$ = $1;
+		}
+	| propdataprefix DT_LABEL
+		{
+			$$ = data_add_marker($1, LABEL, $2);
+		}
+	;
+
+arrayprefix:
+	DT_BITS DT_LITERAL '<'
+		{
+			unsigned long long bits;
+
+			bits = $2;
+
+			if ((bits !=  8) && (bits != 16) &&
+			    (bits != 32) && (bits != 64)) {
+				ERROR(&@2, "Array elements must be"
+				      " 8, 16, 32 or 64-bits");
+				bits = 32;
+			}
+
+			$$.data = empty_data;
+			$$.bits = bits;
+		}
+	| '<'
+		{
+			$$.data = empty_data;
+			$$.bits = 32;
+		}
+	| arrayprefix integer_prim
+		{
+			if ($1.bits < 64) {
+				uint64_t mask = (1ULL << $1.bits) - 1;
+				/*
+				 * Bits above mask must either be all zero
+				 * (positive within range of mask) or all one
+				 * (negative and sign-extended). The second
+				 * condition is true if when we set all bits
+				 * within the mask to one (i.e. | in the
+				 * mask), all bits are one.
+				 */
+				if (($2 > mask) && (($2 | mask) != -1ULL))
+					ERROR(&@2, "Value out of range for"
+					      " %d-bit array element", $1.bits);
+			}
+
+			$$.data = data_append_integer($1.data, $2, $1.bits);
+		}
+	| arrayprefix DT_REF
+		{
+			uint64_t val = ~0ULL >> (64 - $1.bits);
+
+			if ($1.bits == 32)
+				$1.data = data_add_marker($1.data,
+							  REF_PHANDLE,
+							  $2);
+			else
+				ERROR(&@2, "References are only allowed in "
+					    "arrays with 32-bit elements.");
+
+			$$.data = data_append_integer($1.data, val, $1.bits);
+		}
+	| arrayprefix DT_LABEL
+		{
+			$$.data = data_add_marker($1.data, LABEL, $2);
+		}
+	;
+
+integer_prim:
+	  DT_LITERAL
+	| DT_CHAR_LITERAL
+	| '(' integer_expr ')'
+		{
+			$$ = $2;
+		}
+	;
+
+integer_expr:
+	integer_trinary
+	;
+
+integer_trinary:
+	  integer_or
+	| integer_or '?' integer_expr ':' integer_trinary { $$ = $1 ? $3 : $5; }
+	;
+
+integer_or:
+	  integer_and
+	| integer_or DT_OR integer_and { $$ = $1 || $3; }
+	;
+
+integer_and:
+	  integer_bitor
+	| integer_and DT_AND integer_bitor { $$ = $1 && $3; }
+	;
+
+integer_bitor:
+	  integer_bitxor
+	| integer_bitor '|' integer_bitxor { $$ = $1 | $3; }
+	;
+
+integer_bitxor:
+	  integer_bitand
+	| integer_bitxor '^' integer_bitand { $$ = $1 ^ $3; }
+	;
+
+integer_bitand:
+	  integer_eq
+	| integer_bitand '&' integer_eq { $$ = $1 & $3; }
+	;
+
+integer_eq:
+	  integer_rela
+	| integer_eq DT_EQ integer_rela { $$ = $1 == $3; }
+	| integer_eq DT_NE integer_rela { $$ = $1 != $3; }
+	;
+
+integer_rela:
+	  integer_shift
+	| integer_rela '<' integer_shift { $$ = $1 < $3; }
+	| integer_rela '>' integer_shift { $$ = $1 > $3; }
+	| integer_rela DT_LE integer_shift { $$ = $1 <= $3; }
+	| integer_rela DT_GE integer_shift { $$ = $1 >= $3; }
+	;
+
+integer_shift:
+	  integer_shift DT_LSHIFT integer_add { $$ = $1 << $3; }
+	| integer_shift DT_RSHIFT integer_add { $$ = $1 >> $3; }
+	| integer_add
+	;
+
+integer_add:
+	  integer_add '+' integer_mul { $$ = $1 + $3; }
+	| integer_add '-' integer_mul { $$ = $1 - $3; }
+	| integer_mul
+	;
+
+integer_mul:
+	  integer_mul '*' integer_unary { $$ = $1 * $3; }
+	| integer_mul '/' integer_unary
+		{
+			if ($3 != 0) {
+				$$ = $1 / $3;
+			} else {
+				ERROR(&@$, "Division by zero");
+				$$ = 0;
+			}
+		}
+	| integer_mul '%' integer_unary
+		{
+			if ($3 != 0) {
+				$$ = $1 % $3;
+			} else {
+				ERROR(&@$, "Division by zero");
+				$$ = 0;
+			}
+		}
+	| integer_unary
+	;
+
+integer_unary:
+	  integer_prim
+	| '-' integer_unary { $$ = -$2; }
+	| '~' integer_unary { $$ = ~$2; }
+	| '!' integer_unary { $$ = !$2; }
+	;
+
+bytestring:
+	  /* empty */
+		{
+			$$ = empty_data;
+		}
+	| bytestring DT_BYTE
+		{
+			$$ = data_append_byte($1, $2);
+		}
+	| bytestring DT_LABEL
+		{
+			$$ = data_add_marker($1, LABEL, $2);
+		}
+	;
+
+subnodes:
+	  /* empty */
+		{
+			$$ = NULL;
+		}
+	| subnode subnodes
+		{
+			$$ = chain_node($1, $2);
+		}
+	| subnode propdef
+		{
+			ERROR(&@2, "Properties must precede subnodes");
+			YYERROR;
+		}
+	;
+
+subnode:
+	  DT_PROPNODENAME nodedef
+		{
+			$$ = name_node($2, $1);
+		}
+	| DT_DEL_NODE DT_PROPNODENAME ';'
+		{
+			$$ = name_node(build_node_delete(), $2);
+		}
+	| DT_LABEL subnode
+		{
+			add_label(&$2->labels, $1);
+			$$ = $2;
+		}
+	;
+
+%%
+
+void yyerror(char const *s)
+{
+	ERROR(&yylloc, "%s", s);
+}
diff --git a/scripts/dtc/dtc.c b/scripts/dtc/dtc.c
new file mode 100644
index 0000000000..bb1e52b318
--- /dev/null
+++ b/scripts/dtc/dtc.c
@@ -0,0 +1,366 @@
+/*
+ * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation.  2005.
+ *
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ *  General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307
+ *                                                                   USA
+ */
+
+#include <sys/stat.h>
+
+#include "dtc.h"
+#include "srcpos.h"
+
+/*
+ * Command line options
+ */
+int quiet;		/* Level of quietness */
+int reservenum;		/* Number of memory reservation slots */
+int minsize;		/* Minimum blob size */
+int padsize;		/* Additional padding to blob */
+int alignsize;		/* Additional padding to blob accroding to the alignsize */
+int phandle_format = PHANDLE_BOTH;	/* Use linux,phandle or phandle properties */
+int generate_symbols;	/* enable symbols & fixup support */
+int generate_fixups;		/* suppress generation of fixups on symbol support */
+int auto_label_aliases;		/* auto generate labels -> aliases */
+
+static int is_power_of_2(int x)
+{
+	return (x > 0) && ((x & (x - 1)) == 0);
+}
+
+static void fill_fullpaths(struct node *tree, const char *prefix)
+{
+	struct node *child;
+	const char *unit;
+
+	tree->fullpath = join_path(prefix, tree->name);
+
+	unit = strchr(tree->name, '@');
+	if (unit)
+		tree->basenamelen = unit - tree->name;
+	else
+		tree->basenamelen = strlen(tree->name);
+
+	for_each_child(tree, child)
+		fill_fullpaths(child, tree->fullpath);
+}
+
+/* Usage related data. */
+#define FDT_VERSION(version)	_FDT_VERSION(version)
+#define _FDT_VERSION(version)	#version
+static const char usage_synopsis[] = "dtc [options] <input file>";
+static const char usage_short_opts[] = "qI:O:o:V:d:R:S:p:a:fb:i:H:sW:E:@Ahv";
+static struct option const usage_long_opts[] = {
+	{"quiet",            no_argument, NULL, 'q'},
+	{"in-format",         a_argument, NULL, 'I'},
+	{"out",               a_argument, NULL, 'o'},
+	{"out-format",        a_argument, NULL, 'O'},
+	{"out-version",       a_argument, NULL, 'V'},
+	{"out-dependency",    a_argument, NULL, 'd'},
+	{"reserve",           a_argument, NULL, 'R'},
+	{"space",             a_argument, NULL, 'S'},
+	{"pad",               a_argument, NULL, 'p'},
+	{"align",             a_argument, NULL, 'a'},
+	{"boot-cpu",          a_argument, NULL, 'b'},
+	{"force",            no_argument, NULL, 'f'},
+	{"include",           a_argument, NULL, 'i'},
+	{"sort",             no_argument, NULL, 's'},
+	{"phandle",           a_argument, NULL, 'H'},
+	{"warning",           a_argument, NULL, 'W'},
+	{"error",             a_argument, NULL, 'E'},
+	{"symbols",	     no_argument, NULL, '@'},
+	{"auto-alias",       no_argument, NULL, 'A'},
+	{"help",             no_argument, NULL, 'h'},
+	{"version",          no_argument, NULL, 'v'},
+	{NULL,               no_argument, NULL, 0x0},
+};
+static const char * const usage_opts_help[] = {
+	"\n\tQuiet: -q suppress warnings, -qq errors, -qqq all",
+	"\n\tInput formats are:\n"
+	 "\t\tdts - device tree source text\n"
+	 "\t\tdtb - device tree blob\n"
+	 "\t\tfs  - /proc/device-tree style directory",
+	"\n\tOutput file",
+	"\n\tOutput formats are:\n"
+	 "\t\tdts - device tree source text\n"
+	 "\t\tdtb - device tree blob\n"
+	 "\t\tasm - assembler source",
+	"\n\tBlob version to produce, defaults to "FDT_VERSION(DEFAULT_FDT_VERSION)" (for dtb and asm output)",
+	"\n\tOutput dependency file",
+	"\n\tMake space for <number> reserve map entries (for dtb and asm output)",
+	"\n\tMake the blob at least <bytes> long (extra space)",
+	"\n\tAdd padding to the blob of <bytes> long (extra space)",
+	"\n\tMake the blob align to the <bytes> (extra space)",
+	"\n\tSet the physical boot cpu",
+	"\n\tTry to produce output even if the input tree has errors",
+	"\n\tAdd a path to search for include files",
+	"\n\tSort nodes and properties before outputting (useful for comparing trees)",
+	"\n\tValid phandle formats are:\n"
+	 "\t\tlegacy - \"linux,phandle\" properties only\n"
+	 "\t\tepapr  - \"phandle\" properties only\n"
+	 "\t\tboth   - Both \"linux,phandle\" and \"phandle\" properties",
+	"\n\tEnable/disable warnings (prefix with \"no-\")",
+	"\n\tEnable/disable errors (prefix with \"no-\")",
+	"\n\tEnable generation of symbols",
+	"\n\tEnable auto-alias of labels",
+	"\n\tPrint this help and exit",
+	"\n\tPrint version and exit",
+	NULL,
+};
+
+static const char *guess_type_by_name(const char *fname, const char *fallback)
+{
+	const char *s;
+
+	s = strrchr(fname, '.');
+	if (s == NULL)
+		return fallback;
+	if (!strcasecmp(s, ".dts"))
+		return "dts";
+	if (!strcasecmp(s, ".dtb"))
+		return "dtb";
+	return fallback;
+}
+
+static const char *guess_input_format(const char *fname, const char *fallback)
+{
+	struct stat statbuf;
+	uint32_t magic;
+	FILE *f;
+
+	if (stat(fname, &statbuf) != 0)
+		return fallback;
+
+	if (S_ISDIR(statbuf.st_mode))
+		return "fs";
+
+	if (!S_ISREG(statbuf.st_mode))
+		return fallback;
+
+	f = fopen(fname, "r");
+	if (f == NULL)
+		return fallback;
+	if (fread(&magic, 4, 1, f) != 1) {
+		fclose(f);
+		return fallback;
+	}
+	fclose(f);
+
+	magic = fdt32_to_cpu(magic);
+	if (magic == FDT_MAGIC)
+		return "dtb";
+
+	return guess_type_by_name(fname, fallback);
+}
+
+int main(int argc, char *argv[])
+{
+	struct dt_info *dti;
+	const char *inform = NULL;
+	const char *outform = NULL;
+	const char *outname = "-";
+	const char *depname = NULL;
+	bool force = false, sort = false;
+	const char *arg;
+	int opt;
+	FILE *outf = NULL;
+	int outversion = DEFAULT_FDT_VERSION;
+	long long cmdline_boot_cpuid = -1;
+
+	quiet      = 0;
+	reservenum = 0;
+	minsize    = 0;
+	padsize    = 0;
+	alignsize  = 0;
+
+	while ((opt = util_getopt_long()) != EOF) {
+		switch (opt) {
+		case 'I':
+			inform = optarg;
+			break;
+		case 'O':
+			outform = optarg;
+			break;
+		case 'o':
+			outname = optarg;
+			break;
+		case 'V':
+			outversion = strtol(optarg, NULL, 0);
+			break;
+		case 'd':
+			depname = optarg;
+			break;
+		case 'R':
+			reservenum = strtol(optarg, NULL, 0);
+			break;
+		case 'S':
+			minsize = strtol(optarg, NULL, 0);
+			break;
+		case 'p':
+			padsize = strtol(optarg, NULL, 0);
+			break;
+		case 'a':
+			alignsize = strtol(optarg, NULL, 0);
+			if (!is_power_of_2(alignsize))
+				die("Invalid argument \"%d\" to -a option\n",
+				    alignsize);
+			break;
+		case 'f':
+			force = true;
+			break;
+		case 'q':
+			quiet++;
+			break;
+		case 'b':
+			cmdline_boot_cpuid = strtoll(optarg, NULL, 0);
+			break;
+		case 'i':
+			srcfile_add_search_path(optarg);
+			break;
+		case 'v':
+			util_version();
+		case 'H':
+			if (streq(optarg, "legacy"))
+				phandle_format = PHANDLE_LEGACY;
+			else if (streq(optarg, "epapr"))
+				phandle_format = PHANDLE_EPAPR;
+			else if (streq(optarg, "both"))
+				phandle_format = PHANDLE_BOTH;
+			else
+				die("Invalid argument \"%s\" to -H option\n",
+				    optarg);
+			break;
+
+		case 's':
+			sort = true;
+			break;
+
+		case 'W':
+			parse_checks_option(true, false, optarg);
+			break;
+
+		case 'E':
+			parse_checks_option(false, true, optarg);
+			break;
+
+		case '@':
+			generate_symbols = 1;
+			break;
+		case 'A':
+			auto_label_aliases = 1;
+			break;
+
+		case 'h':
+			usage(NULL);
+		default:
+			usage("unknown option");
+		}
+	}
+
+	if (argc > (optind+1))
+		usage("missing files");
+	else if (argc < (optind+1))
+		arg = "-";
+	else
+		arg = argv[optind];
+
+	/* minsize and padsize are mutually exclusive */
+	if (minsize && padsize)
+		die("Can't set both -p and -S\n");
+
+	if (depname) {
+		depfile = fopen(depname, "w");
+		if (!depfile)
+			die("Couldn't open dependency file %s: %s\n", depname,
+			    strerror(errno));
+		fprintf(depfile, "%s:", outname);
+	}
+
+	if (inform == NULL)
+		inform = guess_input_format(arg, "dts");
+	if (outform == NULL) {
+		outform = guess_type_by_name(outname, NULL);
+		if (outform == NULL) {
+			if (streq(inform, "dts"))
+				outform = "dtb";
+			else
+				outform = "dts";
+		}
+	}
+	if (streq(inform, "dts"))
+		dti = dt_from_source(arg);
+	else if (streq(inform, "fs"))
+		dti = dt_from_fs(arg);
+	else if(streq(inform, "dtb"))
+		dti = dt_from_blob(arg);
+	else
+		die("Unknown input format \"%s\"\n", inform);
+
+	dti->outname = outname;
+
+	if (depfile) {
+		fputc('\n', depfile);
+		fclose(depfile);
+	}
+
+	if (cmdline_boot_cpuid != -1)
+		dti->boot_cpuid_phys = cmdline_boot_cpuid;
+
+	fill_fullpaths(dti->dt, "");
+	process_checks(force, dti);
+
+	/* on a plugin, generate by default */
+	if (dti->dtsflags & DTSF_PLUGIN) {
+		generate_fixups = 1;
+	}
+
+	if (auto_label_aliases)
+		generate_label_tree(dti, "aliases", false);
+
+	if (generate_symbols)
+		generate_label_tree(dti, "__symbols__", true);
+
+	if (generate_fixups) {
+		generate_fixups_tree(dti, "__fixups__");
+		generate_local_fixups_tree(dti, "__local_fixups__");
+	}
+
+	if (sort)
+		sort_tree(dti);
+
+	if (streq(outname, "-")) {
+		outf = stdout;
+	} else {
+		outf = fopen(outname, "wb");
+		if (! outf)
+			die("Couldn't open output file %s: %s\n",
+			    outname, strerror(errno));
+	}
+
+	if (streq(outform, "dts")) {
+		dt_to_source(outf, dti);
+	} else if (streq(outform, "dtb")) {
+		dt_to_blob(outf, dti, outversion);
+	} else if (streq(outform, "asm")) {
+		dt_to_asm(outf, dti, outversion);
+	} else if (streq(outform, "null")) {
+		/* do nothing */
+	} else {
+		die("Unknown output format \"%s\"\n", outform);
+	}
+
+	exit(0);
+}
diff --git a/scripts/dtc/dtc.h b/scripts/dtc/dtc.h
new file mode 100644
index 0000000000..1ac2a1e3a4
--- /dev/null
+++ b/scripts/dtc/dtc.h
@@ -0,0 +1,285 @@
+#ifndef _DTC_H
+#define _DTC_H
+
+/*
+ * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation.  2005.
+ *
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ *  General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307
+ *                                                                   USA
+ */
+
+#include <stdio.h>
+#include <string.h>
+#include <stdlib.h>
+#include <stdint.h>
+#include <stdbool.h>
+#include <stdarg.h>
+#include <assert.h>
+#include <ctype.h>
+#include <errno.h>
+#include <unistd.h>
+
+#include <libfdt_env.h>
+#include <fdt.h>
+
+#include "util.h"
+
+#ifdef DEBUG
+#define debug(...)	printf(__VA_ARGS__)
+#else
+#define debug(...)
+#endif
+
+
+#define DEFAULT_FDT_VERSION	17
+
+/*
+ * Command line options
+ */
+extern int quiet;		/* Level of quietness */
+extern int reservenum;		/* Number of memory reservation slots */
+extern int minsize;		/* Minimum blob size */
+extern int padsize;		/* Additional padding to blob */
+extern int alignsize;		/* Additional padding to blob accroding to the alignsize */
+extern int phandle_format;	/* Use linux,phandle or phandle properties */
+extern int generate_symbols;	/* generate symbols for nodes with labels */
+extern int generate_fixups;	/* generate fixups */
+extern int auto_label_aliases;	/* auto generate labels -> aliases */
+
+#define PHANDLE_LEGACY	0x1
+#define PHANDLE_EPAPR	0x2
+#define PHANDLE_BOTH	0x3
+
+typedef uint32_t cell_t;
+
+
+#define streq(a, b)	(strcmp((a), (b)) == 0)
+#define strneq(a, b, n)	(strncmp((a), (b), (n)) == 0)
+
+#define ALIGN(x, a)	(((x) + (a) - 1) & ~((a) - 1))
+
+/* Data blobs */
+enum markertype {
+	REF_PHANDLE,
+	REF_PATH,
+	LABEL,
+};
+
+struct  marker {
+	enum markertype type;
+	int offset;
+	char *ref;
+	struct marker *next;
+};
+
+struct data {
+	int len;
+	char *val;
+	struct marker *markers;
+};
+
+
+#define empty_data ((struct data){ 0 /* all .members = 0 or NULL */ })
+
+#define for_each_marker(m) \
+	for (; (m); (m) = (m)->next)
+#define for_each_marker_of_type(m, t) \
+	for_each_marker(m) \
+		if ((m)->type == (t))
+
+void data_free(struct data d);
+
+struct data data_grow_for(struct data d, int xlen);
+
+struct data data_copy_mem(const char *mem, int len);
+struct data data_copy_escape_string(const char *s, int len);
+struct data data_copy_file(FILE *f, size_t len);
+
+struct data data_append_data(struct data d, const void *p, int len);
+struct data data_insert_at_marker(struct data d, struct marker *m,
+				  const void *p, int len);
+struct data data_merge(struct data d1, struct data d2);
+struct data data_append_cell(struct data d, cell_t word);
+struct data data_append_integer(struct data d, uint64_t word, int bits);
+struct data data_append_re(struct data d, const struct fdt_reserve_entry *re);
+struct data data_append_addr(struct data d, uint64_t addr);
+struct data data_append_byte(struct data d, uint8_t byte);
+struct data data_append_zeroes(struct data d, int len);
+struct data data_append_align(struct data d, int align);
+
+struct data data_add_marker(struct data d, enum markertype type, char *ref);
+
+bool data_is_one_string(struct data d);
+
+/* DT constraints */
+
+#define MAX_PROPNAME_LEN	31
+#define MAX_NODENAME_LEN	31
+
+/* Live trees */
+struct label {
+	bool deleted;
+	char *label;
+	struct label *next;
+};
+
+struct property {
+	bool deleted;
+	char *name;
+	struct data val;
+
+	struct property *next;
+
+	struct label *labels;
+};
+
+struct node {
+	bool deleted;
+	char *name;
+	struct property *proplist;
+	struct node *children;
+
+	struct node *parent;
+	struct node *next_sibling;
+
+	char *fullpath;
+	int basenamelen;
+
+	cell_t phandle;
+	int addr_cells, size_cells;
+
+	struct label *labels;
+};
+
+#define for_each_label_withdel(l0, l) \
+	for ((l) = (l0); (l); (l) = (l)->next)
+
+#define for_each_label(l0, l) \
+	for_each_label_withdel(l0, l) \
+		if (!(l)->deleted)
+
+#define for_each_property_withdel(n, p) \
+	for ((p) = (n)->proplist; (p); (p) = (p)->next)
+
+#define for_each_property(n, p) \
+	for_each_property_withdel(n, p) \
+		if (!(p)->deleted)
+
+#define for_each_child_withdel(n, c) \
+	for ((c) = (n)->children; (c); (c) = (c)->next_sibling)
+
+#define for_each_child(n, c) \
+	for_each_child_withdel(n, c) \
+		if (!(c)->deleted)
+
+void add_label(struct label **labels, char *label);
+void delete_labels(struct label **labels);
+
+struct property *build_property(char *name, struct data val);
+struct property *build_property_delete(char *name);
+struct property *chain_property(struct property *first, struct property *list);
+struct property *reverse_properties(struct property *first);
+
+struct node *build_node(struct property *proplist, struct node *children);
+struct node *build_node_delete(void);
+struct node *name_node(struct node *node, char *name);
+struct node *chain_node(struct node *first, struct node *list);
+struct node *merge_nodes(struct node *old_node, struct node *new_node);
+
+void add_property(struct node *node, struct property *prop);
+void delete_property_by_name(struct node *node, char *name);
+void delete_property(struct property *prop);
+void add_child(struct node *parent, struct node *child);
+void delete_node_by_name(struct node *parent, char *name);
+void delete_node(struct node *node);
+void append_to_property(struct node *node,
+			char *name, const void *data, int len);
+
+const char *get_unitname(struct node *node);
+struct property *get_property(struct node *node, const char *propname);
+cell_t propval_cell(struct property *prop);
+struct property *get_property_by_label(struct node *tree, const char *label,
+				       struct node **node);
+struct marker *get_marker_label(struct node *tree, const char *label,
+				struct node **node, struct property **prop);
+struct node *get_subnode(struct node *node, const char *nodename);
+struct node *get_node_by_path(struct node *tree, const char *path);
+struct node *get_node_by_label(struct node *tree, const char *label);
+struct node *get_node_by_phandle(struct node *tree, cell_t phandle);
+struct node *get_node_by_ref(struct node *tree, const char *ref);
+cell_t get_node_phandle(struct node *root, struct node *node);
+
+uint32_t guess_boot_cpuid(struct node *tree);
+
+/* Boot info (tree plus memreserve information */
+
+struct reserve_info {
+	struct fdt_reserve_entry re;
+
+	struct reserve_info *next;
+
+	struct label *labels;
+};
+
+struct reserve_info *build_reserve_entry(uint64_t start, uint64_t len);
+struct reserve_info *chain_reserve_entry(struct reserve_info *first,
+					 struct reserve_info *list);
+struct reserve_info *add_reserve_entry(struct reserve_info *list,
+				       struct reserve_info *new);
+
+
+struct dt_info {
+	unsigned int dtsflags;
+	struct reserve_info *reservelist;
+	uint32_t boot_cpuid_phys;
+	struct node *dt;		/* the device tree */
+	const char *outname;		/* filename being written to, "-" for stdout */
+};
+
+/* DTS version flags definitions */
+#define DTSF_V1		0x0001	/* /dts-v1/ */
+#define DTSF_PLUGIN	0x0002	/* /plugin/ */
+
+struct dt_info *build_dt_info(unsigned int dtsflags,
+			      struct reserve_info *reservelist,
+			      struct node *tree, uint32_t boot_cpuid_phys);
+void sort_tree(struct dt_info *dti);
+void generate_label_tree(struct dt_info *dti, char *name, bool allocph);
+void generate_fixups_tree(struct dt_info *dti, char *name);
+void generate_local_fixups_tree(struct dt_info *dti, char *name);
+
+/* Checks */
+
+void parse_checks_option(bool warn, bool error, const char *arg);
+void process_checks(bool force, struct dt_info *dti);
+
+/* Flattened trees */
+
+void dt_to_blob(FILE *f, struct dt_info *dti, int version);
+void dt_to_asm(FILE *f, struct dt_info *dti, int version);
+
+struct dt_info *dt_from_blob(const char *fname);
+
+/* Tree source */
+
+void dt_to_source(FILE *f, struct dt_info *dti);
+struct dt_info *dt_from_source(const char *f);
+
+/* FS trees */
+
+struct dt_info *dt_from_fs(const char *dirname);
+
+#endif /* _DTC_H */
diff --git a/scripts/dtc/flattree.c b/scripts/dtc/flattree.c
new file mode 100644
index 0000000000..ebac548b3f
--- /dev/null
+++ b/scripts/dtc/flattree.c
@@ -0,0 +1,946 @@
+/*
+ * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation.  2005.
+ *
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ *  General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307
+ *                                                                   USA
+ */
+
+#include "dtc.h"
+#include "srcpos.h"
+
+#define FTF_FULLPATH	0x1
+#define FTF_VARALIGN	0x2
+#define FTF_NAMEPROPS	0x4
+#define FTF_BOOTCPUID	0x8
+#define FTF_STRTABSIZE	0x10
+#define FTF_STRUCTSIZE	0x20
+#define FTF_NOPS	0x40
+
+static struct version_info {
+	int version;
+	int last_comp_version;
+	int hdr_size;
+	int flags;
+} version_table[] = {
+	{1, 1, FDT_V1_SIZE,
+	 FTF_FULLPATH|FTF_VARALIGN|FTF_NAMEPROPS},
+	{2, 1, FDT_V2_SIZE,
+	 FTF_FULLPATH|FTF_VARALIGN|FTF_NAMEPROPS|FTF_BOOTCPUID},
+	{3, 1, FDT_V3_SIZE,
+	 FTF_FULLPATH|FTF_VARALIGN|FTF_NAMEPROPS|FTF_BOOTCPUID|FTF_STRTABSIZE},
+	{16, 16, FDT_V3_SIZE,
+	 FTF_BOOTCPUID|FTF_STRTABSIZE|FTF_NOPS},
+	{17, 16, FDT_V17_SIZE,
+	 FTF_BOOTCPUID|FTF_STRTABSIZE|FTF_STRUCTSIZE|FTF_NOPS},
+};
+
+struct emitter {
+	void (*cell)(void *, cell_t);
+	void (*string)(void *, char *, int);
+	void (*align)(void *, int);
+	void (*data)(void *, struct data);
+	void (*beginnode)(void *, struct label *labels);
+	void (*endnode)(void *, struct label *labels);
+	void (*property)(void *, struct label *labels);
+};
+
+static void bin_emit_cell(void *e, cell_t val)
+{
+	struct data *dtbuf = e;
+
+	*dtbuf = data_append_cell(*dtbuf, val);
+}
+
+static void bin_emit_string(void *e, char *str, int len)
+{
+	struct data *dtbuf = e;
+
+	if (len == 0)
+		len = strlen(str);
+
+	*dtbuf = data_append_data(*dtbuf, str, len);
+	*dtbuf = data_append_byte(*dtbuf, '\0');
+}
+
+static void bin_emit_align(void *e, int a)
+{
+	struct data *dtbuf = e;
+
+	*dtbuf = data_append_align(*dtbuf, a);
+}
+
+static void bin_emit_data(void *e, struct data d)
+{
+	struct data *dtbuf = e;
+
+	*dtbuf = data_append_data(*dtbuf, d.val, d.len);
+}
+
+static void bin_emit_beginnode(void *e, struct label *labels)
+{
+	bin_emit_cell(e, FDT_BEGIN_NODE);
+}
+
+static void bin_emit_endnode(void *e, struct label *labels)
+{
+	bin_emit_cell(e, FDT_END_NODE);
+}
+
+static void bin_emit_property(void *e, struct label *labels)
+{
+	bin_emit_cell(e, FDT_PROP);
+}
+
+static struct emitter bin_emitter = {
+	.cell = bin_emit_cell,
+	.string = bin_emit_string,
+	.align = bin_emit_align,
+	.data = bin_emit_data,
+	.beginnode = bin_emit_beginnode,
+	.endnode = bin_emit_endnode,
+	.property = bin_emit_property,
+};
+
+static void emit_label(FILE *f, const char *prefix, const char *label)
+{
+	fprintf(f, "\t.globl\t%s_%s\n", prefix, label);
+	fprintf(f, "%s_%s:\n", prefix, label);
+	fprintf(f, "_%s_%s:\n", prefix, label);
+}
+
+static void emit_offset_label(FILE *f, const char *label, int offset)
+{
+	fprintf(f, "\t.globl\t%s\n", label);
+	fprintf(f, "%s\t= . + %d\n", label, offset);
+}
+
+#define ASM_EMIT_BELONG(f, fmt, ...) \
+	{ \
+		fprintf((f), "\t.byte\t((" fmt ") >> 24) & 0xff\n", __VA_ARGS__); \
+		fprintf((f), "\t.byte\t((" fmt ") >> 16) & 0xff\n", __VA_ARGS__); \
+		fprintf((f), "\t.byte\t((" fmt ") >> 8) & 0xff\n", __VA_ARGS__); \
+		fprintf((f), "\t.byte\t(" fmt ") & 0xff\n", __VA_ARGS__); \
+	}
+
+static void asm_emit_cell(void *e, cell_t val)
+{
+	FILE *f = e;
+
+	fprintf(f, "\t.byte 0x%02x; .byte 0x%02x; .byte 0x%02x; .byte 0x%02x\n",
+		(val >> 24) & 0xff, (val >> 16) & 0xff,
+		(val >> 8) & 0xff, val & 0xff);
+}
+
+static void asm_emit_string(void *e, char *str, int len)
+{
+	FILE *f = e;
+	char c = 0;
+
+	if (len != 0) {
+		/* XXX: ewww */
+		c = str[len];
+		str[len] = '\0';
+	}
+
+	fprintf(f, "\t.string\t\"%s\"\n", str);
+
+	if (len != 0) {
+		str[len] = c;
+	}
+}
+
+static void asm_emit_align(void *e, int a)
+{
+	FILE *f = e;
+
+	fprintf(f, "\t.balign\t%d, 0\n", a);
+}
+
+static void asm_emit_data(void *e, struct data d)
+{
+	FILE *f = e;
+	int off = 0;
+	struct marker *m = d.markers;
+
+	for_each_marker_of_type(m, LABEL)
+		emit_offset_label(f, m->ref, m->offset);
+
+	while ((d.len - off) >= sizeof(uint32_t)) {
+		asm_emit_cell(e, fdt32_to_cpu(*((uint32_t *)(d.val+off))));
+		off += sizeof(uint32_t);
+	}
+
+	while ((d.len - off) >= 1) {
+		fprintf(f, "\t.byte\t0x%hhx\n", d.val[off]);
+		off += 1;
+	}
+
+	assert(off == d.len);
+}
+
+static void asm_emit_beginnode(void *e, struct label *labels)
+{
+	FILE *f = e;
+	struct label *l;
+
+	for_each_label(labels, l) {
+		fprintf(f, "\t.globl\t%s\n", l->label);
+		fprintf(f, "%s:\n", l->label);
+	}
+	fprintf(f, "\t/* FDT_BEGIN_NODE */\n");
+	asm_emit_cell(e, FDT_BEGIN_NODE);
+}
+
+static void asm_emit_endnode(void *e, struct label *labels)
+{
+	FILE *f = e;
+	struct label *l;
+
+	fprintf(f, "\t/* FDT_END_NODE */\n");
+	asm_emit_cell(e, FDT_END_NODE);
+	for_each_label(labels, l) {
+		fprintf(f, "\t.globl\t%s_end\n", l->label);
+		fprintf(f, "%s_end:\n", l->label);
+	}
+}
+
+static void asm_emit_property(void *e, struct label *labels)
+{
+	FILE *f = e;
+	struct label *l;
+
+	for_each_label(labels, l) {
+		fprintf(f, "\t.globl\t%s\n", l->label);
+		fprintf(f, "%s:\n", l->label);
+	}
+	fprintf(f, "\t/* FDT_PROP */\n");
+	asm_emit_cell(e, FDT_PROP);
+}
+
+static struct emitter asm_emitter = {
+	.cell = asm_emit_cell,
+	.string = asm_emit_string,
+	.align = asm_emit_align,
+	.data = asm_emit_data,
+	.beginnode = asm_emit_beginnode,
+	.endnode = asm_emit_endnode,
+	.property = asm_emit_property,
+};
+
+static int stringtable_insert(struct data *d, const char *str)
+{
+	int i;
+
+	/* FIXME: do this more efficiently? */
+
+	for (i = 0; i < d->len; i++) {
+		if (streq(str, d->val + i))
+			return i;
+	}
+
+	*d = data_append_data(*d, str, strlen(str)+1);
+	return i;
+}
+
+static void flatten_tree(struct node *tree, struct emitter *emit,
+			 void *etarget, struct data *strbuf,
+			 struct version_info *vi)
+{
+	struct property *prop;
+	struct node *child;
+	bool seen_name_prop = false;
+
+	if (tree->deleted)
+		return;
+
+	emit->beginnode(etarget, tree->labels);
+
+	if (vi->flags & FTF_FULLPATH)
+		emit->string(etarget, tree->fullpath, 0);
+	else
+		emit->string(etarget, tree->name, 0);
+
+	emit->align(etarget, sizeof(cell_t));
+
+	for_each_property(tree, prop) {
+		int nameoff;
+
+		if (streq(prop->name, "name"))
+			seen_name_prop = true;
+
+		nameoff = stringtable_insert(strbuf, prop->name);
+
+		emit->property(etarget, prop->labels);
+		emit->cell(etarget, prop->val.len);
+		emit->cell(etarget, nameoff);
+
+		if ((vi->flags & FTF_VARALIGN) && (prop->val.len >= 8))
+			emit->align(etarget, 8);
+
+		emit->data(etarget, prop->val);
+		emit->align(etarget, sizeof(cell_t));
+	}
+
+	if ((vi->flags & FTF_NAMEPROPS) && !seen_name_prop) {
+		emit->property(etarget, NULL);
+		emit->cell(etarget, tree->basenamelen+1);
+		emit->cell(etarget, stringtable_insert(strbuf, "name"));
+
+		if ((vi->flags & FTF_VARALIGN) && ((tree->basenamelen+1) >= 8))
+			emit->align(etarget, 8);
+
+		emit->string(etarget, tree->name, tree->basenamelen);
+		emit->align(etarget, sizeof(cell_t));
+	}
+
+	for_each_child(tree, child) {
+		flatten_tree(child, emit, etarget, strbuf, vi);
+	}
+
+	emit->endnode(etarget, tree->labels);
+}
+
+static struct data flatten_reserve_list(struct reserve_info *reservelist,
+				 struct version_info *vi)
+{
+	struct reserve_info *re;
+	struct data d = empty_data;
+	static struct fdt_reserve_entry null_re = {0,0};
+	int    j;
+
+	for (re = reservelist; re; re = re->next) {
+		d = data_append_re(d, &re->re);
+	}
+	/*
+	 * Add additional reserved slots if the user asked for them.
+	 */
+	for (j = 0; j < reservenum; j++) {
+		d = data_append_re(d, &null_re);
+	}
+
+	return d;
+}
+
+static void make_fdt_header(struct fdt_header *fdt,
+			    struct version_info *vi,
+			    int reservesize, int dtsize, int strsize,
+			    int boot_cpuid_phys)
+{
+	int reserve_off;
+
+	reservesize += sizeof(struct fdt_reserve_entry);
+
+	memset(fdt, 0xff, sizeof(*fdt));
+
+	fdt->magic = cpu_to_fdt32(FDT_MAGIC);
+	fdt->version = cpu_to_fdt32(vi->version);
+	fdt->last_comp_version = cpu_to_fdt32(vi->last_comp_version);
+
+	/* Reserve map should be doubleword aligned */
+	reserve_off = ALIGN(vi->hdr_size, 8);
+
+	fdt->off_mem_rsvmap = cpu_to_fdt32(reserve_off);
+	fdt->off_dt_struct = cpu_to_fdt32(reserve_off + reservesize);
+	fdt->off_dt_strings = cpu_to_fdt32(reserve_off + reservesize
+					  + dtsize);
+	fdt->totalsize = cpu_to_fdt32(reserve_off + reservesize + dtsize + strsize);
+
+	if (vi->flags & FTF_BOOTCPUID)
+		fdt->boot_cpuid_phys = cpu_to_fdt32(boot_cpuid_phys);
+	if (vi->flags & FTF_STRTABSIZE)
+		fdt->size_dt_strings = cpu_to_fdt32(strsize);
+	if (vi->flags & FTF_STRUCTSIZE)
+		fdt->size_dt_struct = cpu_to_fdt32(dtsize);
+}
+
+void dt_to_blob(FILE *f, struct dt_info *dti, int version)
+{
+	struct version_info *vi = NULL;
+	int i;
+	struct data blob       = empty_data;
+	struct data reservebuf = empty_data;
+	struct data dtbuf      = empty_data;
+	struct data strbuf     = empty_data;
+	struct fdt_header fdt;
+	int padlen = 0;
+
+	for (i = 0; i < ARRAY_SIZE(version_table); i++) {
+		if (version_table[i].version == version)
+			vi = &version_table[i];
+	}
+	if (!vi)
+		die("Unknown device tree blob version %d\n", version);
+
+	flatten_tree(dti->dt, &bin_emitter, &dtbuf, &strbuf, vi);
+	bin_emit_cell(&dtbuf, FDT_END);
+
+	reservebuf = flatten_reserve_list(dti->reservelist, vi);
+
+	/* Make header */
+	make_fdt_header(&fdt, vi, reservebuf.len, dtbuf.len, strbuf.len,
+			dti->boot_cpuid_phys);
+
+	/*
+	 * If the user asked for more space than is used, adjust the totalsize.
+	 */
+	if (minsize > 0) {
+		padlen = minsize - fdt32_to_cpu(fdt.totalsize);
+		if (padlen < 0) {
+			padlen = 0;
+			if (quiet < 1)
+				fprintf(stderr,
+					"Warning: blob size %d >= minimum size %d\n",
+					fdt32_to_cpu(fdt.totalsize), minsize);
+		}
+	}
+
+	if (padsize > 0)
+		padlen = padsize;
+
+	if (alignsize > 0)
+		padlen = ALIGN(fdt32_to_cpu(fdt.totalsize) + padlen, alignsize)
+			- fdt32_to_cpu(fdt.totalsize);
+
+	if (padlen > 0) {
+		int tsize = fdt32_to_cpu(fdt.totalsize);
+		tsize += padlen;
+		fdt.totalsize = cpu_to_fdt32(tsize);
+	}
+
+	/*
+	 * Assemble the blob: start with the header, add with alignment
+	 * the reserve buffer, add the reserve map terminating zeroes,
+	 * the device tree itself, and finally the strings.
+	 */
+	blob = data_append_data(blob, &fdt, vi->hdr_size);
+	blob = data_append_align(blob, 8);
+	blob = data_merge(blob, reservebuf);
+	blob = data_append_zeroes(blob, sizeof(struct fdt_reserve_entry));
+	blob = data_merge(blob, dtbuf);
+	blob = data_merge(blob, strbuf);
+
+	/*
+	 * If the user asked for more space than is used, pad out the blob.
+	 */
+	if (padlen > 0)
+		blob = data_append_zeroes(blob, padlen);
+
+	if (fwrite(blob.val, blob.len, 1, f) != 1) {
+		if (ferror(f))
+			die("Error writing device tree blob: %s\n",
+			    strerror(errno));
+		else
+			die("Short write on device tree blob\n");
+	}
+
+	/*
+	 * data_merge() frees the right-hand element so only the blob
+	 * remains to be freed.
+	 */
+	data_free(blob);
+}
+
+static void dump_stringtable_asm(FILE *f, struct data strbuf)
+{
+	const char *p;
+	int len;
+
+	p = strbuf.val;
+
+	while (p < (strbuf.val + strbuf.len)) {
+		len = strlen(p);
+		fprintf(f, "\t.string \"%s\"\n", p);
+		p += len+1;
+	}
+}
+
+void dt_to_asm(FILE *f, struct dt_info *dti, int version)
+{
+	struct version_info *vi = NULL;
+	int i;
+	struct data strbuf = empty_data;
+	struct reserve_info *re;
+	const char *symprefix = "dt";
+
+	for (i = 0; i < ARRAY_SIZE(version_table); i++) {
+		if (version_table[i].version == version)
+			vi = &version_table[i];
+	}
+	if (!vi)
+		die("Unknown device tree blob version %d\n", version);
+
+	fprintf(f, "/* autogenerated by dtc, do not edit */\n\n");
+
+	emit_label(f, symprefix, "blob_start");
+	emit_label(f, symprefix, "header");
+	fprintf(f, "\t/* magic */\n");
+	asm_emit_cell(f, FDT_MAGIC);
+	fprintf(f, "\t/* totalsize */\n");
+	ASM_EMIT_BELONG(f, "_%s_blob_abs_end - _%s_blob_start",
+			symprefix, symprefix);
+	fprintf(f, "\t/* off_dt_struct */\n");
+	ASM_EMIT_BELONG(f, "_%s_struct_start - _%s_blob_start",
+		symprefix, symprefix);
+	fprintf(f, "\t/* off_dt_strings */\n");
+	ASM_EMIT_BELONG(f, "_%s_strings_start - _%s_blob_start",
+		symprefix, symprefix);
+	fprintf(f, "\t/* off_mem_rsvmap */\n");
+	ASM_EMIT_BELONG(f, "_%s_reserve_map - _%s_blob_start",
+		symprefix, symprefix);
+	fprintf(f, "\t/* version */\n");
+	asm_emit_cell(f, vi->version);
+	fprintf(f, "\t/* last_comp_version */\n");
+	asm_emit_cell(f, vi->last_comp_version);
+
+	if (vi->flags & FTF_BOOTCPUID) {
+		fprintf(f, "\t/* boot_cpuid_phys */\n");
+		asm_emit_cell(f, dti->boot_cpuid_phys);
+	}
+
+	if (vi->flags & FTF_STRTABSIZE) {
+		fprintf(f, "\t/* size_dt_strings */\n");
+		ASM_EMIT_BELONG(f, "_%s_strings_end - _%s_strings_start",
+				symprefix, symprefix);
+	}
+
+	if (vi->flags & FTF_STRUCTSIZE) {
+		fprintf(f, "\t/* size_dt_struct */\n");
+		ASM_EMIT_BELONG(f, "_%s_struct_end - _%s_struct_start",
+			symprefix, symprefix);
+	}
+
+	/*
+	 * Reserve map entries.
+	 * Align the reserve map to a doubleword boundary.
+	 * Each entry is an (address, size) pair of u64 values.
+	 * Always supply a zero-sized temination entry.
+	 */
+	asm_emit_align(f, 8);
+	emit_label(f, symprefix, "reserve_map");
+
+	fprintf(f, "/* Memory reserve map from source file */\n");
+
+	/*
+	 * Use .long on high and low halfs of u64s to avoid .quad
+	 * as it appears .quad isn't available in some assemblers.
+	 */
+	for (re = dti->reservelist; re; re = re->next) {
+		struct label *l;
+
+		for_each_label(re->labels, l) {
+			fprintf(f, "\t.globl\t%s\n", l->label);
+			fprintf(f, "%s:\n", l->label);
+		}
+		ASM_EMIT_BELONG(f, "0x%08x", (unsigned int)(re->re.address >> 32));
+		ASM_EMIT_BELONG(f, "0x%08x",
+				(unsigned int)(re->re.address & 0xffffffff));
+		ASM_EMIT_BELONG(f, "0x%08x", (unsigned int)(re->re.size >> 32));
+		ASM_EMIT_BELONG(f, "0x%08x", (unsigned int)(re->re.size & 0xffffffff));
+	}
+	for (i = 0; i < reservenum; i++) {
+		fprintf(f, "\t.long\t0, 0\n\t.long\t0, 0\n");
+	}
+
+	fprintf(f, "\t.long\t0, 0\n\t.long\t0, 0\n");
+
+	emit_label(f, symprefix, "struct_start");
+	flatten_tree(dti->dt, &asm_emitter, f, &strbuf, vi);
+
+	fprintf(f, "\t/* FDT_END */\n");
+	asm_emit_cell(f, FDT_END);
+	emit_label(f, symprefix, "struct_end");
+
+	emit_label(f, symprefix, "strings_start");
+	dump_stringtable_asm(f, strbuf);
+	emit_label(f, symprefix, "strings_end");
+
+	emit_label(f, symprefix, "blob_end");
+
+	/*
+	 * If the user asked for more space than is used, pad it out.
+	 */
+	if (minsize > 0) {
+		fprintf(f, "\t.space\t%d - (_%s_blob_end - _%s_blob_start), 0\n",
+			minsize, symprefix, symprefix);
+	}
+	if (padsize > 0) {
+		fprintf(f, "\t.space\t%d, 0\n", padsize);
+	}
+	if (alignsize > 0)
+		asm_emit_align(f, alignsize);
+	emit_label(f, symprefix, "blob_abs_end");
+
+	data_free(strbuf);
+}
+
+struct inbuf {
+	char *base, *limit, *ptr;
+};
+
+static void inbuf_init(struct inbuf *inb, void *base, void *limit)
+{
+	inb->base = base;
+	inb->limit = limit;
+	inb->ptr = inb->base;
+}
+
+static void flat_read_chunk(struct inbuf *inb, void *p, int len)
+{
+	if ((inb->ptr + len) > inb->limit)
+		die("Premature end of data parsing flat device tree\n");
+
+	memcpy(p, inb->ptr, len);
+
+	inb->ptr += len;
+}
+
+static uint32_t flat_read_word(struct inbuf *inb)
+{
+	uint32_t val;
+
+	assert(((inb->ptr - inb->base) % sizeof(val)) == 0);
+
+	flat_read_chunk(inb, &val, sizeof(val));
+
+	return fdt32_to_cpu(val);
+}
+
+static void flat_realign(struct inbuf *inb, int align)
+{
+	int off = inb->ptr - inb->base;
+
+	inb->ptr = inb->base + ALIGN(off, align);
+	if (inb->ptr > inb->limit)
+		die("Premature end of data parsing flat device tree\n");
+}
+
+static char *flat_read_string(struct inbuf *inb)
+{
+	int len = 0;
+	const char *p = inb->ptr;
+	char *str;
+
+	do {
+		if (p >= inb->limit)
+			die("Premature end of data parsing flat device tree\n");
+		len++;
+	} while ((*p++) != '\0');
+
+	str = xstrdup(inb->ptr);
+
+	inb->ptr += len;
+
+	flat_realign(inb, sizeof(uint32_t));
+
+	return str;
+}
+
+static struct data flat_read_data(struct inbuf *inb, int len)
+{
+	struct data d = empty_data;
+
+	if (len == 0)
+		return empty_data;
+
+	d = data_grow_for(d, len);
+	d.len = len;
+
+	flat_read_chunk(inb, d.val, len);
+
+	flat_realign(inb, sizeof(uint32_t));
+
+	return d;
+}
+
+static char *flat_read_stringtable(struct inbuf *inb, int offset)
+{
+	const char *p;
+
+	p = inb->base + offset;
+	while (1) {
+		if (p >= inb->limit || p < inb->base)
+			die("String offset %d overruns string table\n",
+			    offset);
+
+		if (*p == '\0')
+			break;
+
+		p++;
+	}
+
+	return xstrdup(inb->base + offset);
+}
+
+static struct property *flat_read_property(struct inbuf *dtbuf,
+					   struct inbuf *strbuf, int flags)
+{
+	uint32_t proplen, stroff;
+	char *name;
+	struct data val;
+
+	proplen = flat_read_word(dtbuf);
+	stroff = flat_read_word(dtbuf);
+
+	name = flat_read_stringtable(strbuf, stroff);
+
+	if ((flags & FTF_VARALIGN) && (proplen >= 8))
+		flat_realign(dtbuf, 8);
+
+	val = flat_read_data(dtbuf, proplen);
+
+	return build_property(name, val);
+}
+
+
+static struct reserve_info *flat_read_mem_reserve(struct inbuf *inb)
+{
+	struct reserve_info *reservelist = NULL;
+	struct reserve_info *new;
+	struct fdt_reserve_entry re;
+
+	/*
+	 * Each entry is a pair of u64 (addr, size) values for 4 cell_t's.
+	 * List terminates at an entry with size equal to zero.
+	 *
+	 * First pass, count entries.
+	 */
+	while (1) {
+		flat_read_chunk(inb, &re, sizeof(re));
+		re.address  = fdt64_to_cpu(re.address);
+		re.size = fdt64_to_cpu(re.size);
+		if (re.size == 0)
+			break;
+
+		new = build_reserve_entry(re.address, re.size);
+		reservelist = add_reserve_entry(reservelist, new);
+	}
+
+	return reservelist;
+}
+
+
+static char *nodename_from_path(const char *ppath, const char *cpath)
+{
+	int plen;
+
+	plen = strlen(ppath);
+
+	if (!strneq(ppath, cpath, plen))
+		die("Path \"%s\" is not valid as a child of \"%s\"\n",
+		    cpath, ppath);
+
+	/* root node is a special case */
+	if (!streq(ppath, "/"))
+		plen++;
+
+	return xstrdup(cpath + plen);
+}
+
+static struct node *unflatten_tree(struct inbuf *dtbuf,
+				   struct inbuf *strbuf,
+				   const char *parent_flatname, int flags)
+{
+	struct node *node;
+	char *flatname;
+	uint32_t val;
+
+	node = build_node(NULL, NULL);
+
+	flatname = flat_read_string(dtbuf);
+
+	if (flags & FTF_FULLPATH)
+		node->name = nodename_from_path(parent_flatname, flatname);
+	else
+		node->name = flatname;
+
+	do {
+		struct property *prop;
+		struct node *child;
+
+		val = flat_read_word(dtbuf);
+		switch (val) {
+		case FDT_PROP:
+			if (node->children)
+				fprintf(stderr, "Warning: Flat tree input has "
+					"subnodes preceding a property.\n");
+			prop = flat_read_property(dtbuf, strbuf, flags);
+			add_property(node, prop);
+			break;
+
+		case FDT_BEGIN_NODE:
+			child = unflatten_tree(dtbuf,strbuf, flatname, flags);
+			add_child(node, child);
+			break;
+
+		case FDT_END_NODE:
+			break;
+
+		case FDT_END:
+			die("Premature FDT_END in device tree blob\n");
+			break;
+
+		case FDT_NOP:
+			if (!(flags & FTF_NOPS))
+				fprintf(stderr, "Warning: NOP tag found in flat tree"
+					" version <16\n");
+
+			/* Ignore */
+			break;
+
+		default:
+			die("Invalid opcode word %08x in device tree blob\n",
+			    val);
+		}
+	} while (val != FDT_END_NODE);
+
+	if (node->name != flatname) {
+		free(flatname);
+	}
+
+	return node;
+}
+
+
+struct dt_info *dt_from_blob(const char *fname)
+{
+	FILE *f;
+	uint32_t magic, totalsize, version, size_dt, boot_cpuid_phys;
+	uint32_t off_dt, off_str, off_mem_rsvmap;
+	int rc;
+	char *blob;
+	struct fdt_header *fdt;
+	char *p;
+	struct inbuf dtbuf, strbuf;
+	struct inbuf memresvbuf;
+	int sizeleft;
+	struct reserve_info *reservelist;
+	struct node *tree;
+	uint32_t val;
+	int flags = 0;
+
+	f = srcfile_relative_open(fname, NULL);
+
+	rc = fread(&magic, sizeof(magic), 1, f);
+	if (ferror(f))
+		die("Error reading DT blob magic number: %s\n",
+		    strerror(errno));
+	if (rc < 1) {
+		if (feof(f))
+			die("EOF reading DT blob magic number\n");
+		else
+			die("Mysterious short read reading magic number\n");
+	}
+
+	magic = fdt32_to_cpu(magic);
+	if (magic != FDT_MAGIC)
+		die("Blob has incorrect magic number\n");
+
+	rc = fread(&totalsize, sizeof(totalsize), 1, f);
+	if (ferror(f))
+		die("Error reading DT blob size: %s\n", strerror(errno));
+	if (rc < 1) {
+		if (feof(f))
+			die("EOF reading DT blob size\n");
+		else
+			die("Mysterious short read reading blob size\n");
+	}
+
+	totalsize = fdt32_to_cpu(totalsize);
+	if (totalsize < FDT_V1_SIZE)
+		die("DT blob size (%d) is too small\n", totalsize);
+
+	blob = xmalloc(totalsize);
+
+	fdt = (struct fdt_header *)blob;
+	fdt->magic = cpu_to_fdt32(magic);
+	fdt->totalsize = cpu_to_fdt32(totalsize);
+
+	sizeleft = totalsize - sizeof(magic) - sizeof(totalsize);
+	p = blob + sizeof(magic)  + sizeof(totalsize);
+
+	while (sizeleft) {
+		if (feof(f))
+			die("EOF before reading %d bytes of DT blob\n",
+			    totalsize);
+
+		rc = fread(p, 1, sizeleft, f);
+		if (ferror(f))
+			die("Error reading DT blob: %s\n",
+			    strerror(errno));
+
+		sizeleft -= rc;
+		p += rc;
+	}
+
+	off_dt = fdt32_to_cpu(fdt->off_dt_struct);
+	off_str = fdt32_to_cpu(fdt->off_dt_strings);
+	off_mem_rsvmap = fdt32_to_cpu(fdt->off_mem_rsvmap);
+	version = fdt32_to_cpu(fdt->version);
+	boot_cpuid_phys = fdt32_to_cpu(fdt->boot_cpuid_phys);
+
+	if (off_mem_rsvmap >= totalsize)
+		die("Mem Reserve structure offset exceeds total size\n");
+
+	if (off_dt >= totalsize)
+		die("DT structure offset exceeds total size\n");
+
+	if (off_str > totalsize)
+		die("String table offset exceeds total size\n");
+
+	if (version >= 3) {
+		uint32_t size_str = fdt32_to_cpu(fdt->size_dt_strings);
+		if ((off_str+size_str < off_str) || (off_str+size_str > totalsize))
+			die("String table extends past total size\n");
+		inbuf_init(&strbuf, blob + off_str, blob + off_str + size_str);
+	} else {
+		inbuf_init(&strbuf, blob + off_str, blob + totalsize);
+	}
+
+	if (version >= 17) {
+		size_dt = fdt32_to_cpu(fdt->size_dt_struct);
+		if ((off_dt+size_dt < off_dt) || (off_dt+size_dt > totalsize))
+			die("Structure block extends past total size\n");
+	}
+
+	if (version < 16) {
+		flags |= FTF_FULLPATH | FTF_NAMEPROPS | FTF_VARALIGN;
+	} else {
+		flags |= FTF_NOPS;
+	}
+
+	inbuf_init(&memresvbuf,
+		   blob + off_mem_rsvmap, blob + totalsize);
+	inbuf_init(&dtbuf, blob + off_dt, blob + totalsize);
+
+	reservelist = flat_read_mem_reserve(&memresvbuf);
+
+	val = flat_read_word(&dtbuf);
+
+	if (val != FDT_BEGIN_NODE)
+		die("Device tree blob doesn't begin with FDT_BEGIN_NODE (begins with 0x%08x)\n", val);
+
+	tree = unflatten_tree(&dtbuf, &strbuf, "", flags);
+
+	val = flat_read_word(&dtbuf);
+	if (val != FDT_END)
+		die("Device tree blob doesn't end with FDT_END\n");
+
+	free(blob);
+
+	fclose(f);
+
+	return build_dt_info(DTSF_V1, reservelist, tree, boot_cpuid_phys);
+}
diff --git a/scripts/dtc/fstree.c b/scripts/dtc/fstree.c
new file mode 100644
index 0000000000..ae7d06c3c4
--- /dev/null
+++ b/scripts/dtc/fstree.c
@@ -0,0 +1,90 @@
+/*
+ * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation.  2005.
+ *
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ *  General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307
+ *                                                                   USA
+ */
+
+#include "dtc.h"
+
+#include <dirent.h>
+#include <sys/stat.h>
+
+static struct node *read_fstree(const char *dirname)
+{
+	DIR *d;
+	struct dirent *de;
+	struct stat st;
+	struct node *tree;
+
+	d = opendir(dirname);
+	if (!d)
+		die("Couldn't opendir() \"%s\": %s\n", dirname, strerror(errno));
+
+	tree = build_node(NULL, NULL);
+
+	while ((de = readdir(d)) != NULL) {
+		char *tmpname;
+
+		if (streq(de->d_name, ".")
+		    || streq(de->d_name, ".."))
+			continue;
+
+		tmpname = join_path(dirname, de->d_name);
+
+		if (lstat(tmpname, &st) < 0)
+			die("stat(%s): %s\n", tmpname, strerror(errno));
+
+		if (S_ISREG(st.st_mode)) {
+			struct property *prop;
+			FILE *pfile;
+
+			pfile = fopen(tmpname, "rb");
+			if (! pfile) {
+				fprintf(stderr,
+					"WARNING: Cannot open %s: %s\n",
+					tmpname, strerror(errno));
+			} else {
+				prop = build_property(xstrdup(de->d_name),
+						      data_copy_file(pfile,
+								     st.st_size));
+				add_property(tree, prop);
+				fclose(pfile);
+			}
+		} else if (S_ISDIR(st.st_mode)) {
+			struct node *newchild;
+
+			newchild = read_fstree(tmpname);
+			newchild = name_node(newchild, xstrdup(de->d_name));
+			add_child(tree, newchild);
+		}
+
+		free(tmpname);
+	}
+
+	closedir(d);
+	return tree;
+}
+
+struct dt_info *dt_from_fs(const char *dirname)
+{
+	struct node *tree;
+
+	tree = read_fstree(dirname);
+	tree = name_node(tree, "");
+
+	return build_dt_info(DTSF_V1, NULL, tree, guess_boot_cpuid(tree));
+}
diff --git a/scripts/dtc/libfdt/Makefile.libfdt b/scripts/dtc/libfdt/Makefile.libfdt
new file mode 100644
index 0000000000..098b3f36e6
--- /dev/null
+++ b/scripts/dtc/libfdt/Makefile.libfdt
@@ -0,0 +1,11 @@
+# Makefile.libfdt
+#
+# This is not a complete Makefile of itself.  Instead, it is designed to
+# be easily embeddable into other systems of Makefiles.
+#
+LIBFDT_soname = libfdt.$(SHAREDLIB_EXT).1
+LIBFDT_INCLUDES = fdt.h libfdt.h libfdt_env.h
+LIBFDT_VERSION = version.lds
+LIBFDT_SRCS = fdt.c fdt_ro.c fdt_wip.c fdt_sw.c fdt_rw.c fdt_strerror.c fdt_empty_tree.c \
+	fdt_addresses.c fdt_overlay.c
+LIBFDT_OBJS = $(LIBFDT_SRCS:%.c=%.o)
diff --git a/scripts/dtc/libfdt/fdt.c b/scripts/dtc/libfdt/fdt.c
new file mode 100644
index 0000000000..22286a1aae
--- /dev/null
+++ b/scripts/dtc/libfdt/fdt.c
@@ -0,0 +1,251 @@
+/*
+ * libfdt - Flat Device Tree manipulation
+ * Copyright (C) 2006 David Gibson, IBM Corporation.
+ *
+ * libfdt is dual licensed: you can use it either under the terms of
+ * the GPL, or the BSD license, at your option.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Alternatively,
+ *
+ *  b) Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *     1. Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *     2. Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include "libfdt_env.h"
+
+#include <fdt.h>
+#include <libfdt.h>
+
+#include "libfdt_internal.h"
+
+int fdt_check_header(const void *fdt)
+{
+	if (fdt_magic(fdt) == FDT_MAGIC) {
+		/* Complete tree */
+		if (fdt_version(fdt) < FDT_FIRST_SUPPORTED_VERSION)
+			return -FDT_ERR_BADVERSION;
+		if (fdt_last_comp_version(fdt) > FDT_LAST_SUPPORTED_VERSION)
+			return -FDT_ERR_BADVERSION;
+	} else if (fdt_magic(fdt) == FDT_SW_MAGIC) {
+		/* Unfinished sequential-write blob */
+		if (fdt_size_dt_struct(fdt) == 0)
+			return -FDT_ERR_BADSTATE;
+	} else {
+		return -FDT_ERR_BADMAGIC;
+	}
+
+	return 0;
+}
+
+const void *fdt_offset_ptr(const void *fdt, int offset, unsigned int len)
+{
+	unsigned absoffset = offset + fdt_off_dt_struct(fdt);
+
+	if ((absoffset < offset)
+	    || ((absoffset + len) < absoffset)
+	    || (absoffset + len) > fdt_totalsize(fdt))
+		return NULL;
+
+	if (fdt_version(fdt) >= 0x11)
+		if (((offset + len) < offset)
+		    || ((offset + len) > fdt_size_dt_struct(fdt)))
+			return NULL;
+
+	return _fdt_offset_ptr(fdt, offset);
+}
+
+uint32_t fdt_next_tag(const void *fdt, int startoffset, int *nextoffset)
+{
+	const fdt32_t *tagp, *lenp;
+	uint32_t tag;
+	int offset = startoffset;
+	const char *p;
+
+	*nextoffset = -FDT_ERR_TRUNCATED;
+	tagp = fdt_offset_ptr(fdt, offset, FDT_TAGSIZE);
+	if (!tagp)
+		return FDT_END; /* premature end */
+	tag = fdt32_to_cpu(*tagp);
+	offset += FDT_TAGSIZE;
+
+	*nextoffset = -FDT_ERR_BADSTRUCTURE;
+	switch (tag) {
+	case FDT_BEGIN_NODE:
+		/* skip name */
+		do {
+			p = fdt_offset_ptr(fdt, offset++, 1);
+		} while (p && (*p != '\0'));
+		if (!p)
+			return FDT_END; /* premature end */
+		break;
+
+	case FDT_PROP:
+		lenp = fdt_offset_ptr(fdt, offset, sizeof(*lenp));
+		if (!lenp)
+			return FDT_END; /* premature end */
+		/* skip-name offset, length and value */
+		offset += sizeof(struct fdt_property) - FDT_TAGSIZE
+			+ fdt32_to_cpu(*lenp);
+		break;
+
+	case FDT_END:
+	case FDT_END_NODE:
+	case FDT_NOP:
+		break;
+
+	default:
+		return FDT_END;
+	}
+
+	if (!fdt_offset_ptr(fdt, startoffset, offset - startoffset))
+		return FDT_END; /* premature end */
+
+	*nextoffset = FDT_TAGALIGN(offset);
+	return tag;
+}
+
+int _fdt_check_node_offset(const void *fdt, int offset)
+{
+	if ((offset < 0) || (offset % FDT_TAGSIZE)
+	    || (fdt_next_tag(fdt, offset, &offset) != FDT_BEGIN_NODE))
+		return -FDT_ERR_BADOFFSET;
+
+	return offset;
+}
+
+int _fdt_check_prop_offset(const void *fdt, int offset)
+{
+	if ((offset < 0) || (offset % FDT_TAGSIZE)
+	    || (fdt_next_tag(fdt, offset, &offset) != FDT_PROP))
+		return -FDT_ERR_BADOFFSET;
+
+	return offset;
+}
+
+int fdt_next_node(const void *fdt, int offset, int *depth)
+{
+	int nextoffset = 0;
+	uint32_t tag;
+
+	if (offset >= 0)
+		if ((nextoffset = _fdt_check_node_offset(fdt, offset)) < 0)
+			return nextoffset;
+
+	do {
+		offset = nextoffset;
+		tag = fdt_next_tag(fdt, offset, &nextoffset);
+
+		switch (tag) {
+		case FDT_PROP:
+		case FDT_NOP:
+			break;
+
+		case FDT_BEGIN_NODE:
+			if (depth)
+				(*depth)++;
+			break;
+
+		case FDT_END_NODE:
+			if (depth && ((--(*depth)) < 0))
+				return nextoffset;
+			break;
+
+		case FDT_END:
+			if ((nextoffset >= 0)
+			    || ((nextoffset == -FDT_ERR_TRUNCATED) && !depth))
+				return -FDT_ERR_NOTFOUND;
+			else
+				return nextoffset;
+		}
+	} while (tag != FDT_BEGIN_NODE);
+
+	return offset;
+}
+
+int fdt_first_subnode(const void *fdt, int offset)
+{
+	int depth = 0;
+
+	offset = fdt_next_node(fdt, offset, &depth);
+	if (offset < 0 || depth != 1)
+		return -FDT_ERR_NOTFOUND;
+
+	return offset;
+}
+
+int fdt_next_subnode(const void *fdt, int offset)
+{
+	int depth = 1;
+
+	/*
+	 * With respect to the parent, the depth of the next subnode will be
+	 * the same as the last.
+	 */
+	do {
+		offset = fdt_next_node(fdt, offset, &depth);
+		if (offset < 0 || depth < 1)
+			return -FDT_ERR_NOTFOUND;
+	} while (depth > 1);
+
+	return offset;
+}
+
+const char *_fdt_find_string(const char *strtab, int tabsize, const char *s)
+{
+	int len = strlen(s) + 1;
+	const char *last = strtab + tabsize - len;
+	const char *p;
+
+	for (p = strtab; p <= last; p++)
+		if (memcmp(p, s, len) == 0)
+			return p;
+	return NULL;
+}
+
+int fdt_move(const void *fdt, void *buf, int bufsize)
+{
+	FDT_CHECK_HEADER(fdt);
+
+	if (fdt_totalsize(fdt) > bufsize)
+		return -FDT_ERR_NOSPACE;
+
+	memmove(buf, fdt, fdt_totalsize(fdt));
+	return 0;
+}
diff --git a/scripts/dtc/libfdt/fdt.h b/scripts/dtc/libfdt/fdt.h
new file mode 100644
index 0000000000..526aedb515
--- /dev/null
+++ b/scripts/dtc/libfdt/fdt.h
@@ -0,0 +1,111 @@
+#ifndef _FDT_H
+#define _FDT_H
+/*
+ * libfdt - Flat Device Tree manipulation
+ * Copyright (C) 2006 David Gibson, IBM Corporation.
+ * Copyright 2012 Kim Phillips, Freescale Semiconductor.
+ *
+ * libfdt is dual licensed: you can use it either under the terms of
+ * the GPL, or the BSD license, at your option.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Alternatively,
+ *
+ *  b) Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *     1. Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *     2. Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __ASSEMBLY__
+
+struct fdt_header {
+	fdt32_t magic;			 /* magic word FDT_MAGIC */
+	fdt32_t totalsize;		 /* total size of DT block */
+	fdt32_t off_dt_struct;		 /* offset to structure */
+	fdt32_t off_dt_strings;		 /* offset to strings */
+	fdt32_t off_mem_rsvmap;		 /* offset to memory reserve map */
+	fdt32_t version;		 /* format version */
+	fdt32_t last_comp_version;	 /* last compatible version */
+
+	/* version 2 fields below */
+	fdt32_t boot_cpuid_phys;	 /* Which physical CPU id we're
+					    booting on */
+	/* version 3 fields below */
+	fdt32_t size_dt_strings;	 /* size of the strings block */
+
+	/* version 17 fields below */
+	fdt32_t size_dt_struct;		 /* size of the structure block */
+};
+
+struct fdt_reserve_entry {
+	fdt64_t address;
+	fdt64_t size;
+};
+
+struct fdt_node_header {
+	fdt32_t tag;
+	char name[0];
+};
+
+struct fdt_property {
+	fdt32_t tag;
+	fdt32_t len;
+	fdt32_t nameoff;
+	char data[0];
+};
+
+#endif /* !__ASSEMBLY */
+
+#define FDT_MAGIC	0xd00dfeed	/* 4: version, 4: total size */
+#define FDT_TAGSIZE	sizeof(fdt32_t)
+
+#define FDT_BEGIN_NODE	0x1		/* Start node: full name */
+#define FDT_END_NODE	0x2		/* End node */
+#define FDT_PROP	0x3		/* Property: name off,
+					   size, content */
+#define FDT_NOP		0x4		/* nop */
+#define FDT_END		0x9
+
+#define FDT_V1_SIZE	(7*sizeof(fdt32_t))
+#define FDT_V2_SIZE	(FDT_V1_SIZE + sizeof(fdt32_t))
+#define FDT_V3_SIZE	(FDT_V2_SIZE + sizeof(fdt32_t))
+#define FDT_V16_SIZE	FDT_V3_SIZE
+#define FDT_V17_SIZE	(FDT_V16_SIZE + sizeof(fdt32_t))
+
+#endif /* _FDT_H */
diff --git a/scripts/dtc/libfdt/fdt_empty_tree.c b/scripts/dtc/libfdt/fdt_empty_tree.c
new file mode 100644
index 0000000000..f72d13b1d1
--- /dev/null
+++ b/scripts/dtc/libfdt/fdt_empty_tree.c
@@ -0,0 +1,84 @@
+/*
+ * libfdt - Flat Device Tree manipulation
+ * Copyright (C) 2012 David Gibson, IBM Corporation.
+ *
+ * libfdt is dual licensed: you can use it either under the terms of
+ * the GPL, or the BSD license, at your option.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Alternatively,
+ *
+ *  b) Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *     1. Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *     2. Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include "libfdt_env.h"
+
+#include <fdt.h>
+#include <libfdt.h>
+
+#include "libfdt_internal.h"
+
+int fdt_create_empty_tree(void *buf, int bufsize)
+{
+	int err;
+
+	err = fdt_create(buf, bufsize);
+	if (err)
+		return err;
+
+	err = fdt_finish_reservemap(buf);
+	if (err)
+		return err;
+
+	err = fdt_begin_node(buf, "");
+	if (err)
+		return err;
+
+	err =  fdt_end_node(buf);
+	if (err)
+		return err;
+
+	err = fdt_finish(buf);
+	if (err)
+		return err;
+
+	return fdt_open_into(buf, buf, bufsize);
+}
+
diff --git a/scripts/dtc/libfdt/fdt_ro.c b/scripts/dtc/libfdt/fdt_ro.c
new file mode 100644
index 0000000000..3d00d2eee0
--- /dev/null
+++ b/scripts/dtc/libfdt/fdt_ro.c
@@ -0,0 +1,703 @@
+/*
+ * libfdt - Flat Device Tree manipulation
+ * Copyright (C) 2006 David Gibson, IBM Corporation.
+ *
+ * libfdt is dual licensed: you can use it either under the terms of
+ * the GPL, or the BSD license, at your option.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Alternatively,
+ *
+ *  b) Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *     1. Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *     2. Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include "libfdt_env.h"
+
+#include <fdt.h>
+#include <libfdt.h>
+
+#include "libfdt_internal.h"
+
+static int _fdt_nodename_eq(const void *fdt, int offset,
+			    const char *s, int len)
+{
+	const char *p = fdt_offset_ptr(fdt, offset + FDT_TAGSIZE, len+1);
+
+	if (! p)
+		/* short match */
+		return 0;
+
+	if (memcmp(p, s, len) != 0)
+		return 0;
+
+	if (p[len] == '\0')
+		return 1;
+	else if (!memchr(s, '@', len) && (p[len] == '@'))
+		return 1;
+	else
+		return 0;
+}
+
+const char *fdt_string(const void *fdt, int stroffset)
+{
+	return (const char *)fdt + fdt_off_dt_strings(fdt) + stroffset;
+}
+
+static int _fdt_string_eq(const void *fdt, int stroffset,
+			  const char *s, int len)
+{
+	const char *p = fdt_string(fdt, stroffset);
+
+	return (strlen(p) == len) && (memcmp(p, s, len) == 0);
+}
+
+uint32_t fdt_get_max_phandle(const void *fdt)
+{
+	uint32_t max_phandle = 0;
+	int offset;
+
+	for (offset = fdt_next_node(fdt, -1, NULL);;
+	     offset = fdt_next_node(fdt, offset, NULL)) {
+		uint32_t phandle;
+
+		if (offset == -FDT_ERR_NOTFOUND)
+			return max_phandle;
+
+		if (offset < 0)
+			return (uint32_t)-1;
+
+		phandle = fdt_get_phandle(fdt, offset);
+		if (phandle == (uint32_t)-1)
+			continue;
+
+		if (phandle > max_phandle)
+			max_phandle = phandle;
+	}
+
+	return 0;
+}
+
+int fdt_get_mem_rsv(const void *fdt, int n, uint64_t *address, uint64_t *size)
+{
+	FDT_CHECK_HEADER(fdt);
+	*address = fdt64_to_cpu(_fdt_mem_rsv(fdt, n)->address);
+	*size = fdt64_to_cpu(_fdt_mem_rsv(fdt, n)->size);
+	return 0;
+}
+
+int fdt_num_mem_rsv(const void *fdt)
+{
+	int i = 0;
+
+	while (fdt64_to_cpu(_fdt_mem_rsv(fdt, i)->size) != 0)
+		i++;
+	return i;
+}
+
+static int _nextprop(const void *fdt, int offset)
+{
+	uint32_t tag;
+	int nextoffset;
+
+	do {
+		tag = fdt_next_tag(fdt, offset, &nextoffset);
+
+		switch (tag) {
+		case FDT_END:
+			if (nextoffset >= 0)
+				return -FDT_ERR_BADSTRUCTURE;
+			else
+				return nextoffset;
+
+		case FDT_PROP:
+			return offset;
+		}
+		offset = nextoffset;
+	} while (tag == FDT_NOP);
+
+	return -FDT_ERR_NOTFOUND;
+}
+
+int fdt_subnode_offset_namelen(const void *fdt, int offset,
+			       const char *name, int namelen)
+{
+	int depth;
+
+	FDT_CHECK_HEADER(fdt);
+
+	for (depth = 0;
+	     (offset >= 0) && (depth >= 0);
+	     offset = fdt_next_node(fdt, offset, &depth))
+		if ((depth == 1)
+		    && _fdt_nodename_eq(fdt, offset, name, namelen))
+			return offset;
+
+	if (depth < 0)
+		return -FDT_ERR_NOTFOUND;
+	return offset; /* error */
+}
+
+int fdt_subnode_offset(const void *fdt, int parentoffset,
+		       const char *name)
+{
+	return fdt_subnode_offset_namelen(fdt, parentoffset, name, strlen(name));
+}
+
+int fdt_path_offset_namelen(const void *fdt, const char *path, int namelen)
+{
+	const char *end = path + namelen;
+	const char *p = path;
+	int offset = 0;
+
+	FDT_CHECK_HEADER(fdt);
+
+	/* see if we have an alias */
+	if (*path != '/') {
+		const char *q = memchr(path, '/', end - p);
+
+		if (!q)
+			q = end;
+
+		p = fdt_get_alias_namelen(fdt, p, q - p);
+		if (!p)
+			return -FDT_ERR_BADPATH;
+		offset = fdt_path_offset(fdt, p);
+
+		p = q;
+	}
+
+	while (p < end) {
+		const char *q;
+
+		while (*p == '/') {
+			p++;
+			if (p == end)
+				return offset;
+		}
+		q = memchr(p, '/', end - p);
+		if (! q)
+			q = end;
+
+		offset = fdt_subnode_offset_namelen(fdt, offset, p, q-p);
+		if (offset < 0)
+			return offset;
+
+		p = q;
+	}
+
+	return offset;
+}
+
+int fdt_path_offset(const void *fdt, const char *path)
+{
+	return fdt_path_offset_namelen(fdt, path, strlen(path));
+}
+
+const char *fdt_get_name(const void *fdt, int nodeoffset, int *len)
+{
+	const struct fdt_node_header *nh = _fdt_offset_ptr(fdt, nodeoffset);
+	int err;
+
+	if (((err = fdt_check_header(fdt)) != 0)
+	    || ((err = _fdt_check_node_offset(fdt, nodeoffset)) < 0))
+			goto fail;
+
+	if (len)
+		*len = strlen(nh->name);
+
+	return nh->name;
+
+ fail:
+	if (len)
+		*len = err;
+	return NULL;
+}
+
+int fdt_first_property_offset(const void *fdt, int nodeoffset)
+{
+	int offset;
+
+	if ((offset = _fdt_check_node_offset(fdt, nodeoffset)) < 0)
+		return offset;
+
+	return _nextprop(fdt, offset);
+}
+
+int fdt_next_property_offset(const void *fdt, int offset)
+{
+	if ((offset = _fdt_check_prop_offset(fdt, offset)) < 0)
+		return offset;
+
+	return _nextprop(fdt, offset);
+}
+
+const struct fdt_property *fdt_get_property_by_offset(const void *fdt,
+						      int offset,
+						      int *lenp)
+{
+	int err;
+	const struct fdt_property *prop;
+
+	if ((err = _fdt_check_prop_offset(fdt, offset)) < 0) {
+		if (lenp)
+			*lenp = err;
+		return NULL;
+	}
+
+	prop = _fdt_offset_ptr(fdt, offset);
+
+	if (lenp)
+		*lenp = fdt32_to_cpu(prop->len);
+
+	return prop;
+}
+
+const struct fdt_property *fdt_get_property_namelen(const void *fdt,
+						    int offset,
+						    const char *name,
+						    int namelen, int *lenp)
+{
+	for (offset = fdt_first_property_offset(fdt, offset);
+	     (offset >= 0);
+	     (offset = fdt_next_property_offset(fdt, offset))) {
+		const struct fdt_property *prop;
+
+		if (!(prop = fdt_get_property_by_offset(fdt, offset, lenp))) {
+			offset = -FDT_ERR_INTERNAL;
+			break;
+		}
+		if (_fdt_string_eq(fdt, fdt32_to_cpu(prop->nameoff),
+				   name, namelen))
+			return prop;
+	}
+
+	if (lenp)
+		*lenp = offset;
+	return NULL;
+}
+
+const struct fdt_property *fdt_get_property(const void *fdt,
+					    int nodeoffset,
+					    const char *name, int *lenp)
+{
+	return fdt_get_property_namelen(fdt, nodeoffset, name,
+					strlen(name), lenp);
+}
+
+const void *fdt_getprop_namelen(const void *fdt, int nodeoffset,
+				const char *name, int namelen, int *lenp)
+{
+	const struct fdt_property *prop;
+
+	prop = fdt_get_property_namelen(fdt, nodeoffset, name, namelen, lenp);
+	if (! prop)
+		return NULL;
+
+	return prop->data;
+}
+
+const void *fdt_getprop_by_offset(const void *fdt, int offset,
+				  const char **namep, int *lenp)
+{
+	const struct fdt_property *prop;
+
+	prop = fdt_get_property_by_offset(fdt, offset, lenp);
+	if (!prop)
+		return NULL;
+	if (namep)
+		*namep = fdt_string(fdt, fdt32_to_cpu(prop->nameoff));
+	return prop->data;
+}
+
+const void *fdt_getprop(const void *fdt, int nodeoffset,
+			const char *name, int *lenp)
+{
+	return fdt_getprop_namelen(fdt, nodeoffset, name, strlen(name), lenp);
+}
+
+uint32_t fdt_get_phandle(const void *fdt, int nodeoffset)
+{
+	const fdt32_t *php;
+	int len;
+
+	/* FIXME: This is a bit sub-optimal, since we potentially scan
+	 * over all the properties twice. */
+	php = fdt_getprop(fdt, nodeoffset, "phandle", &len);
+	if (!php || (len != sizeof(*php))) {
+		php = fdt_getprop(fdt, nodeoffset, "linux,phandle", &len);
+		if (!php || (len != sizeof(*php)))
+			return 0;
+	}
+
+	return fdt32_to_cpu(*php);
+}
+
+const char *fdt_get_alias_namelen(const void *fdt,
+				  const char *name, int namelen)
+{
+	int aliasoffset;
+
+	aliasoffset = fdt_path_offset(fdt, "/aliases");
+	if (aliasoffset < 0)
+		return NULL;
+
+	return fdt_getprop_namelen(fdt, aliasoffset, name, namelen, NULL);
+}
+
+const char *fdt_get_alias(const void *fdt, const char *name)
+{
+	return fdt_get_alias_namelen(fdt, name, strlen(name));
+}
+
+int fdt_get_path(const void *fdt, int nodeoffset, char *buf, int buflen)
+{
+	int pdepth = 0, p = 0;
+	int offset, depth, namelen;
+	const char *name;
+
+	FDT_CHECK_HEADER(fdt);
+
+	if (buflen < 2)
+		return -FDT_ERR_NOSPACE;
+
+	for (offset = 0, depth = 0;
+	     (offset >= 0) && (offset <= nodeoffset);
+	     offset = fdt_next_node(fdt, offset, &depth)) {
+		while (pdepth > depth) {
+			do {
+				p--;
+			} while (buf[p-1] != '/');
+			pdepth--;
+		}
+
+		if (pdepth >= depth) {
+			name = fdt_get_name(fdt, offset, &namelen);
+			if (!name)
+				return namelen;
+			if ((p + namelen + 1) <= buflen) {
+				memcpy(buf + p, name, namelen);
+				p += namelen;
+				buf[p++] = '/';
+				pdepth++;
+			}
+		}
+
+		if (offset == nodeoffset) {
+			if (pdepth < (depth + 1))
+				return -FDT_ERR_NOSPACE;
+
+			if (p > 1) /* special case so that root path is "/", not "" */
+				p--;
+			buf[p] = '\0';
+			return 0;
+		}
+	}
+
+	if ((offset == -FDT_ERR_NOTFOUND) || (offset >= 0))
+		return -FDT_ERR_BADOFFSET;
+	else if (offset == -FDT_ERR_BADOFFSET)
+		return -FDT_ERR_BADSTRUCTURE;
+
+	return offset; /* error from fdt_next_node() */
+}
+
+int fdt_supernode_atdepth_offset(const void *fdt, int nodeoffset,
+				 int supernodedepth, int *nodedepth)
+{
+	int offset, depth;
+	int supernodeoffset = -FDT_ERR_INTERNAL;
+
+	FDT_CHECK_HEADER(fdt);
+
+	if (supernodedepth < 0)
+		return -FDT_ERR_NOTFOUND;
+
+	for (offset = 0, depth = 0;
+	     (offset >= 0) && (offset <= nodeoffset);
+	     offset = fdt_next_node(fdt, offset, &depth)) {
+		if (depth == supernodedepth)
+			supernodeoffset = offset;
+
+		if (offset == nodeoffset) {
+			if (nodedepth)
+				*nodedepth = depth;
+
+			if (supernodedepth > depth)
+				return -FDT_ERR_NOTFOUND;
+			else
+				return supernodeoffset;
+		}
+	}
+
+	if ((offset == -FDT_ERR_NOTFOUND) || (offset >= 0))
+		return -FDT_ERR_BADOFFSET;
+	else if (offset == -FDT_ERR_BADOFFSET)
+		return -FDT_ERR_BADSTRUCTURE;
+
+	return offset; /* error from fdt_next_node() */
+}
+
+int fdt_node_depth(const void *fdt, int nodeoffset)
+{
+	int nodedepth;
+	int err;
+
+	err = fdt_supernode_atdepth_offset(fdt, nodeoffset, 0, &nodedepth);
+	if (err)
+		return (err < 0) ? err : -FDT_ERR_INTERNAL;
+	return nodedepth;
+}
+
+int fdt_parent_offset(const void *fdt, int nodeoffset)
+{
+	int nodedepth = fdt_node_depth(fdt, nodeoffset);
+
+	if (nodedepth < 0)
+		return nodedepth;
+	return fdt_supernode_atdepth_offset(fdt, nodeoffset,
+					    nodedepth - 1, NULL);
+}
+
+int fdt_node_offset_by_prop_value(const void *fdt, int startoffset,
+				  const char *propname,
+				  const void *propval, int proplen)
+{
+	int offset;
+	const void *val;
+	int len;
+
+	FDT_CHECK_HEADER(fdt);
+
+	/* FIXME: The algorithm here is pretty horrible: we scan each
+	 * property of a node in fdt_getprop(), then if that didn't
+	 * find what we want, we scan over them again making our way
+	 * to the next node.  Still it's the easiest to implement
+	 * approach; performance can come later. */
+	for (offset = fdt_next_node(fdt, startoffset, NULL);
+	     offset >= 0;
+	     offset = fdt_next_node(fdt, offset, NULL)) {
+		val = fdt_getprop(fdt, offset, propname, &len);
+		if (val && (len == proplen)
+		    && (memcmp(val, propval, len) == 0))
+			return offset;
+	}
+
+	return offset; /* error from fdt_next_node() */
+}
+
+int fdt_node_offset_by_phandle(const void *fdt, uint32_t phandle)
+{
+	int offset;
+
+	if ((phandle == 0) || (phandle == -1))
+		return -FDT_ERR_BADPHANDLE;
+
+	FDT_CHECK_HEADER(fdt);
+
+	/* FIXME: The algorithm here is pretty horrible: we
+	 * potentially scan each property of a node in
+	 * fdt_get_phandle(), then if that didn't find what
+	 * we want, we scan over them again making our way to the next
+	 * node.  Still it's the easiest to implement approach;
+	 * performance can come later. */
+	for (offset = fdt_next_node(fdt, -1, NULL);
+	     offset >= 0;
+	     offset = fdt_next_node(fdt, offset, NULL)) {
+		if (fdt_get_phandle(fdt, offset) == phandle)
+			return offset;
+	}
+
+	return offset; /* error from fdt_next_node() */
+}
+
+int fdt_stringlist_contains(const char *strlist, int listlen, const char *str)
+{
+	int len = strlen(str);
+	const char *p;
+
+	while (listlen >= len) {
+		if (memcmp(str, strlist, len+1) == 0)
+			return 1;
+		p = memchr(strlist, '\0', listlen);
+		if (!p)
+			return 0; /* malformed strlist.. */
+		listlen -= (p-strlist) + 1;
+		strlist = p + 1;
+	}
+	return 0;
+}
+
+int fdt_stringlist_count(const void *fdt, int nodeoffset, const char *property)
+{
+	const char *list, *end;
+	int length, count = 0;
+
+	list = fdt_getprop(fdt, nodeoffset, property, &length);
+	if (!list)
+		return length;
+
+	end = list + length;
+
+	while (list < end) {
+		length = strnlen(list, end - list) + 1;
+
+		/* Abort if the last string isn't properly NUL-terminated. */
+		if (list + length > end)
+			return -FDT_ERR_BADVALUE;
+
+		list += length;
+		count++;
+	}
+
+	return count;
+}
+
+int fdt_stringlist_search(const void *fdt, int nodeoffset, const char *property,
+			  const char *string)
+{
+	int length, len, idx = 0;
+	const char *list, *end;
+
+	list = fdt_getprop(fdt, nodeoffset, property, &length);
+	if (!list)
+		return length;
+
+	len = strlen(string) + 1;
+	end = list + length;
+
+	while (list < end) {
+		length = strnlen(list, end - list) + 1;
+
+		/* Abort if the last string isn't properly NUL-terminated. */
+		if (list + length > end)
+			return -FDT_ERR_BADVALUE;
+
+		if (length == len && memcmp(list, string, length) == 0)
+			return idx;
+
+		list += length;
+		idx++;
+	}
+
+	return -FDT_ERR_NOTFOUND;
+}
+
+const char *fdt_stringlist_get(const void *fdt, int nodeoffset,
+			       const char *property, int idx,
+			       int *lenp)
+{
+	const char *list, *end;
+	int length;
+
+	list = fdt_getprop(fdt, nodeoffset, property, &length);
+	if (!list) {
+		if (lenp)
+			*lenp = length;
+
+		return NULL;
+	}
+
+	end = list + length;
+
+	while (list < end) {
+		length = strnlen(list, end - list) + 1;
+
+		/* Abort if the last string isn't properly NUL-terminated. */
+		if (list + length > end) {
+			if (lenp)
+				*lenp = -FDT_ERR_BADVALUE;
+
+			return NULL;
+		}
+
+		if (idx == 0) {
+			if (lenp)
+				*lenp = length - 1;
+
+			return list;
+		}
+
+		list += length;
+		idx--;
+	}
+
+	if (lenp)
+		*lenp = -FDT_ERR_NOTFOUND;
+
+	return NULL;
+}
+
+int fdt_node_check_compatible(const void *fdt, int nodeoffset,
+			      const char *compatible)
+{
+	const void *prop;
+	int len;
+
+	prop = fdt_getprop(fdt, nodeoffset, "compatible", &len);
+	if (!prop)
+		return len;
+
+	return !fdt_stringlist_contains(prop, len, compatible);
+}
+
+int fdt_node_offset_by_compatible(const void *fdt, int startoffset,
+				  const char *compatible)
+{
+	int offset, err;
+
+	FDT_CHECK_HEADER(fdt);
+
+	/* FIXME: The algorithm here is pretty horrible: we scan each
+	 * property of a node in fdt_node_check_compatible(), then if
+	 * that didn't find what we want, we scan over them again
+	 * making our way to the next node.  Still it's the easiest to
+	 * implement approach; performance can come later. */
+	for (offset = fdt_next_node(fdt, startoffset, NULL);
+	     offset >= 0;
+	     offset = fdt_next_node(fdt, offset, NULL)) {
+		err = fdt_node_check_compatible(fdt, offset, compatible);
+		if ((err < 0) && (err != -FDT_ERR_NOTFOUND))
+			return err;
+		else if (err == 0)
+			return offset;
+	}
+
+	return offset; /* error from fdt_next_node() */
+}
diff --git a/scripts/dtc/libfdt/fdt_rw.c b/scripts/dtc/libfdt/fdt_rw.c
new file mode 100644
index 0000000000..3fd5847377
--- /dev/null
+++ b/scripts/dtc/libfdt/fdt_rw.c
@@ -0,0 +1,491 @@
+/*
+ * libfdt - Flat Device Tree manipulation
+ * Copyright (C) 2006 David Gibson, IBM Corporation.
+ *
+ * libfdt is dual licensed: you can use it either under the terms of
+ * the GPL, or the BSD license, at your option.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Alternatively,
+ *
+ *  b) Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *     1. Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *     2. Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include "libfdt_env.h"
+
+#include <fdt.h>
+#include <libfdt.h>
+
+#include "libfdt_internal.h"
+
+static int _fdt_blocks_misordered(const void *fdt,
+			      int mem_rsv_size, int struct_size)
+{
+	return (fdt_off_mem_rsvmap(fdt) < FDT_ALIGN(sizeof(struct fdt_header), 8))
+		|| (fdt_off_dt_struct(fdt) <
+		    (fdt_off_mem_rsvmap(fdt) + mem_rsv_size))
+		|| (fdt_off_dt_strings(fdt) <
+		    (fdt_off_dt_struct(fdt) + struct_size))
+		|| (fdt_totalsize(fdt) <
+		    (fdt_off_dt_strings(fdt) + fdt_size_dt_strings(fdt)));
+}
+
+static int _fdt_rw_check_header(void *fdt)
+{
+	FDT_CHECK_HEADER(fdt);
+
+	if (fdt_version(fdt) < 17)
+		return -FDT_ERR_BADVERSION;
+	if (_fdt_blocks_misordered(fdt, sizeof(struct fdt_reserve_entry),
+				   fdt_size_dt_struct(fdt)))
+		return -FDT_ERR_BADLAYOUT;
+	if (fdt_version(fdt) > 17)
+		fdt_set_version(fdt, 17);
+
+	return 0;
+}
+
+#define FDT_RW_CHECK_HEADER(fdt) \
+	{ \
+		int __err; \
+		if ((__err = _fdt_rw_check_header(fdt)) != 0) \
+			return __err; \
+	}
+
+static inline int _fdt_data_size(void *fdt)
+{
+	return fdt_off_dt_strings(fdt) + fdt_size_dt_strings(fdt);
+}
+
+static int _fdt_splice(void *fdt, void *splicepoint, int oldlen, int newlen)
+{
+	char *p = splicepoint;
+	char *end = (char *)fdt + _fdt_data_size(fdt);
+
+	if (((p + oldlen) < p) || ((p + oldlen) > end))
+		return -FDT_ERR_BADOFFSET;
+	if ((p < (char *)fdt) || ((end - oldlen + newlen) < (char *)fdt))
+		return -FDT_ERR_BADOFFSET;
+	if ((end - oldlen + newlen) > ((char *)fdt + fdt_totalsize(fdt)))
+		return -FDT_ERR_NOSPACE;
+	memmove(p + newlen, p + oldlen, end - p - oldlen);
+	return 0;
+}
+
+static int _fdt_splice_mem_rsv(void *fdt, struct fdt_reserve_entry *p,
+			       int oldn, int newn)
+{
+	int delta = (newn - oldn) * sizeof(*p);
+	int err;
+	err = _fdt_splice(fdt, p, oldn * sizeof(*p), newn * sizeof(*p));
+	if (err)
+		return err;
+	fdt_set_off_dt_struct(fdt, fdt_off_dt_struct(fdt) + delta);
+	fdt_set_off_dt_strings(fdt, fdt_off_dt_strings(fdt) + delta);
+	return 0;
+}
+
+static int _fdt_splice_struct(void *fdt, void *p,
+			      int oldlen, int newlen)
+{
+	int delta = newlen - oldlen;
+	int err;
+
+	if ((err = _fdt_splice(fdt, p, oldlen, newlen)))
+		return err;
+
+	fdt_set_size_dt_struct(fdt, fdt_size_dt_struct(fdt) + delta);
+	fdt_set_off_dt_strings(fdt, fdt_off_dt_strings(fdt) + delta);
+	return 0;
+}
+
+static int _fdt_splice_string(void *fdt, int newlen)
+{
+	void *p = (char *)fdt
+		+ fdt_off_dt_strings(fdt) + fdt_size_dt_strings(fdt);
+	int err;
+
+	if ((err = _fdt_splice(fdt, p, 0, newlen)))
+		return err;
+
+	fdt_set_size_dt_strings(fdt, fdt_size_dt_strings(fdt) + newlen);
+	return 0;
+}
+
+static int _fdt_find_add_string(void *fdt, const char *s)
+{
+	char *strtab = (char *)fdt + fdt_off_dt_strings(fdt);
+	const char *p;
+	char *new;
+	int len = strlen(s) + 1;
+	int err;
+
+	p = _fdt_find_string(strtab, fdt_size_dt_strings(fdt), s);
+	if (p)
+		/* found it */
+		return (p - strtab);
+
+	new = strtab + fdt_size_dt_strings(fdt);
+	err = _fdt_splice_string(fdt, len);
+	if (err)
+		return err;
+
+	memcpy(new, s, len);
+	return (new - strtab);
+}
+
+int fdt_add_mem_rsv(void *fdt, uint64_t address, uint64_t size)
+{
+	struct fdt_reserve_entry *re;
+	int err;
+
+	FDT_RW_CHECK_HEADER(fdt);
+
+	re = _fdt_mem_rsv_w(fdt, fdt_num_mem_rsv(fdt));
+	err = _fdt_splice_mem_rsv(fdt, re, 0, 1);
+	if (err)
+		return err;
+
+	re->address = cpu_to_fdt64(address);
+	re->size = cpu_to_fdt64(size);
+	return 0;
+}
+
+int fdt_del_mem_rsv(void *fdt, int n)
+{
+	struct fdt_reserve_entry *re = _fdt_mem_rsv_w(fdt, n);
+
+	FDT_RW_CHECK_HEADER(fdt);
+
+	if (n >= fdt_num_mem_rsv(fdt))
+		return -FDT_ERR_NOTFOUND;
+
+	return _fdt_splice_mem_rsv(fdt, re, 1, 0);
+}
+
+static int _fdt_resize_property(void *fdt, int nodeoffset, const char *name,
+				int len, struct fdt_property **prop)
+{
+	int oldlen;
+	int err;
+
+	*prop = fdt_get_property_w(fdt, nodeoffset, name, &oldlen);
+	if (! (*prop))
+		return oldlen;
+
+	if ((err = _fdt_splice_struct(fdt, (*prop)->data, FDT_TAGALIGN(oldlen),
+				      FDT_TAGALIGN(len))))
+		return err;
+
+	(*prop)->len = cpu_to_fdt32(len);
+	return 0;
+}
+
+static int _fdt_add_property(void *fdt, int nodeoffset, const char *name,
+			     int len, struct fdt_property **prop)
+{
+	int proplen;
+	int nextoffset;
+	int namestroff;
+	int err;
+
+	if ((nextoffset = _fdt_check_node_offset(fdt, nodeoffset)) < 0)
+		return nextoffset;
+
+	namestroff = _fdt_find_add_string(fdt, name);
+	if (namestroff < 0)
+		return namestroff;
+
+	*prop = _fdt_offset_ptr_w(fdt, nextoffset);
+	proplen = sizeof(**prop) + FDT_TAGALIGN(len);
+
+	err = _fdt_splice_struct(fdt, *prop, 0, proplen);
+	if (err)
+		return err;
+
+	(*prop)->tag = cpu_to_fdt32(FDT_PROP);
+	(*prop)->nameoff = cpu_to_fdt32(namestroff);
+	(*prop)->len = cpu_to_fdt32(len);
+	return 0;
+}
+
+int fdt_set_name(void *fdt, int nodeoffset, const char *name)
+{
+	char *namep;
+	int oldlen, newlen;
+	int err;
+
+	FDT_RW_CHECK_HEADER(fdt);
+
+	namep = (char *)(uintptr_t)fdt_get_name(fdt, nodeoffset, &oldlen);
+	if (!namep)
+		return oldlen;
+
+	newlen = strlen(name);
+
+	err = _fdt_splice_struct(fdt, namep, FDT_TAGALIGN(oldlen+1),
+				 FDT_TAGALIGN(newlen+1));
+	if (err)
+		return err;
+
+	memcpy(namep, name, newlen+1);
+	return 0;
+}
+
+int fdt_setprop(void *fdt, int nodeoffset, const char *name,
+		const void *val, int len)
+{
+	struct fdt_property *prop;
+	int err;
+
+	FDT_RW_CHECK_HEADER(fdt);
+
+	err = _fdt_resize_property(fdt, nodeoffset, name, len, &prop);
+	if (err == -FDT_ERR_NOTFOUND)
+		err = _fdt_add_property(fdt, nodeoffset, name, len, &prop);
+	if (err)
+		return err;
+
+	if (len)
+		memcpy(prop->data, val, len);
+	return 0;
+}
+
+int fdt_appendprop(void *fdt, int nodeoffset, const char *name,
+		   const void *val, int len)
+{
+	struct fdt_property *prop;
+	int err, oldlen, newlen;
+
+	FDT_RW_CHECK_HEADER(fdt);
+
+	prop = fdt_get_property_w(fdt, nodeoffset, name, &oldlen);
+	if (prop) {
+		newlen = len + oldlen;
+		err = _fdt_splice_struct(fdt, prop->data,
+					 FDT_TAGALIGN(oldlen),
+					 FDT_TAGALIGN(newlen));
+		if (err)
+			return err;
+		prop->len = cpu_to_fdt32(newlen);
+		memcpy(prop->data + oldlen, val, len);
+	} else {
+		err = _fdt_add_property(fdt, nodeoffset, name, len, &prop);
+		if (err)
+			return err;
+		memcpy(prop->data, val, len);
+	}
+	return 0;
+}
+
+int fdt_delprop(void *fdt, int nodeoffset, const char *name)
+{
+	struct fdt_property *prop;
+	int len, proplen;
+
+	FDT_RW_CHECK_HEADER(fdt);
+
+	prop = fdt_get_property_w(fdt, nodeoffset, name, &len);
+	if (! prop)
+		return len;
+
+	proplen = sizeof(*prop) + FDT_TAGALIGN(len);
+	return _fdt_splice_struct(fdt, prop, proplen, 0);
+}
+
+int fdt_add_subnode_namelen(void *fdt, int parentoffset,
+			    const char *name, int namelen)
+{
+	struct fdt_node_header *nh;
+	int offset, nextoffset;
+	int nodelen;
+	int err;
+	uint32_t tag;
+	fdt32_t *endtag;
+
+	FDT_RW_CHECK_HEADER(fdt);
+
+	offset = fdt_subnode_offset_namelen(fdt, parentoffset, name, namelen);
+	if (offset >= 0)
+		return -FDT_ERR_EXISTS;
+	else if (offset != -FDT_ERR_NOTFOUND)
+		return offset;
+
+	/* Try to place the new node after the parent's properties */
+	fdt_next_tag(fdt, parentoffset, &nextoffset); /* skip the BEGIN_NODE */
+	do {
+		offset = nextoffset;
+		tag = fdt_next_tag(fdt, offset, &nextoffset);
+	} while ((tag == FDT_PROP) || (tag == FDT_NOP));
+
+	nh = _fdt_offset_ptr_w(fdt, offset);
+	nodelen = sizeof(*nh) + FDT_TAGALIGN(namelen+1) + FDT_TAGSIZE;
+
+	err = _fdt_splice_struct(fdt, nh, 0, nodelen);
+	if (err)
+		return err;
+
+	nh->tag = cpu_to_fdt32(FDT_BEGIN_NODE);
+	memset(nh->name, 0, FDT_TAGALIGN(namelen+1));
+	memcpy(nh->name, name, namelen);
+	endtag = (fdt32_t *)((char *)nh + nodelen - FDT_TAGSIZE);
+	*endtag = cpu_to_fdt32(FDT_END_NODE);
+
+	return offset;
+}
+
+int fdt_add_subnode(void *fdt, int parentoffset, const char *name)
+{
+	return fdt_add_subnode_namelen(fdt, parentoffset, name, strlen(name));
+}
+
+int fdt_del_node(void *fdt, int nodeoffset)
+{
+	int endoffset;
+
+	FDT_RW_CHECK_HEADER(fdt);
+
+	endoffset = _fdt_node_end_offset(fdt, nodeoffset);
+	if (endoffset < 0)
+		return endoffset;
+
+	return _fdt_splice_struct(fdt, _fdt_offset_ptr_w(fdt, nodeoffset),
+				  endoffset - nodeoffset, 0);
+}
+
+static void _fdt_packblocks(const char *old, char *new,
+			    int mem_rsv_size, int struct_size)
+{
+	int mem_rsv_off, struct_off, strings_off;
+
+	mem_rsv_off = FDT_ALIGN(sizeof(struct fdt_header), 8);
+	struct_off = mem_rsv_off + mem_rsv_size;
+	strings_off = struct_off + struct_size;
+
+	memmove(new + mem_rsv_off, old + fdt_off_mem_rsvmap(old), mem_rsv_size);
+	fdt_set_off_mem_rsvmap(new, mem_rsv_off);
+
+	memmove(new + struct_off, old + fdt_off_dt_struct(old), struct_size);
+	fdt_set_off_dt_struct(new, struct_off);
+	fdt_set_size_dt_struct(new, struct_size);
+
+	memmove(new + strings_off, old + fdt_off_dt_strings(old),
+		fdt_size_dt_strings(old));
+	fdt_set_off_dt_strings(new, strings_off);
+	fdt_set_size_dt_strings(new, fdt_size_dt_strings(old));
+}
+
+int fdt_open_into(const void *fdt, void *buf, int bufsize)
+{
+	int err;
+	int mem_rsv_size, struct_size;
+	int newsize;
+	const char *fdtstart = fdt;
+	const char *fdtend = fdtstart + fdt_totalsize(fdt);
+	char *tmp;
+
+	FDT_CHECK_HEADER(fdt);
+
+	mem_rsv_size = (fdt_num_mem_rsv(fdt)+1)
+		* sizeof(struct fdt_reserve_entry);
+
+	if (fdt_version(fdt) >= 17) {
+		struct_size = fdt_size_dt_struct(fdt);
+	} else {
+		struct_size = 0;
+		while (fdt_next_tag(fdt, struct_size, &struct_size) != FDT_END)
+			;
+		if (struct_size < 0)
+			return struct_size;
+	}
+
+	if (!_fdt_blocks_misordered(fdt, mem_rsv_size, struct_size)) {
+		/* no further work necessary */
+		err = fdt_move(fdt, buf, bufsize);
+		if (err)
+			return err;
+		fdt_set_version(buf, 17);
+		fdt_set_size_dt_struct(buf, struct_size);
+		fdt_set_totalsize(buf, bufsize);
+		return 0;
+	}
+
+	/* Need to reorder */
+	newsize = FDT_ALIGN(sizeof(struct fdt_header), 8) + mem_rsv_size
+		+ struct_size + fdt_size_dt_strings(fdt);
+
+	if (bufsize < newsize)
+		return -FDT_ERR_NOSPACE;
+
+	/* First attempt to build converted tree at beginning of buffer */
+	tmp = buf;
+	/* But if that overlaps with the old tree... */
+	if (((tmp + newsize) > fdtstart) && (tmp < fdtend)) {
+		/* Try right after the old tree instead */
+		tmp = (char *)(uintptr_t)fdtend;
+		if ((tmp + newsize) > ((char *)buf + bufsize))
+			return -FDT_ERR_NOSPACE;
+	}
+
+	_fdt_packblocks(fdt, tmp, mem_rsv_size, struct_size);
+	memmove(buf, tmp, newsize);
+
+	fdt_set_magic(buf, FDT_MAGIC);
+	fdt_set_totalsize(buf, bufsize);
+	fdt_set_version(buf, 17);
+	fdt_set_last_comp_version(buf, 16);
+	fdt_set_boot_cpuid_phys(buf, fdt_boot_cpuid_phys(fdt));
+
+	return 0;
+}
+
+int fdt_pack(void *fdt)
+{
+	int mem_rsv_size;
+
+	FDT_RW_CHECK_HEADER(fdt);
+
+	mem_rsv_size = (fdt_num_mem_rsv(fdt)+1)
+		* sizeof(struct fdt_reserve_entry);
+	_fdt_packblocks(fdt, fdt, mem_rsv_size, fdt_size_dt_struct(fdt));
+	fdt_set_totalsize(fdt, _fdt_data_size(fdt));
+
+	return 0;
+}
diff --git a/scripts/dtc/libfdt/fdt_strerror.c b/scripts/dtc/libfdt/fdt_strerror.c
new file mode 100644
index 0000000000..9677a1887e
--- /dev/null
+++ b/scripts/dtc/libfdt/fdt_strerror.c
@@ -0,0 +1,102 @@
+/*
+ * libfdt - Flat Device Tree manipulation
+ * Copyright (C) 2006 David Gibson, IBM Corporation.
+ *
+ * libfdt is dual licensed: you can use it either under the terms of
+ * the GPL, or the BSD license, at your option.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Alternatively,
+ *
+ *  b) Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *     1. Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *     2. Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include "libfdt_env.h"
+
+#include <fdt.h>
+#include <libfdt.h>
+
+#include "libfdt_internal.h"
+
+struct fdt_errtabent {
+	const char *str;
+};
+
+#define FDT_ERRTABENT(val) \
+	[(val)] = { .str = #val, }
+
+static struct fdt_errtabent fdt_errtable[] = {
+	FDT_ERRTABENT(FDT_ERR_NOTFOUND),
+	FDT_ERRTABENT(FDT_ERR_EXISTS),
+	FDT_ERRTABENT(FDT_ERR_NOSPACE),
+
+	FDT_ERRTABENT(FDT_ERR_BADOFFSET),
+	FDT_ERRTABENT(FDT_ERR_BADPATH),
+	FDT_ERRTABENT(FDT_ERR_BADPHANDLE),
+	FDT_ERRTABENT(FDT_ERR_BADSTATE),
+
+	FDT_ERRTABENT(FDT_ERR_TRUNCATED),
+	FDT_ERRTABENT(FDT_ERR_BADMAGIC),
+	FDT_ERRTABENT(FDT_ERR_BADVERSION),
+	FDT_ERRTABENT(FDT_ERR_BADSTRUCTURE),
+	FDT_ERRTABENT(FDT_ERR_BADLAYOUT),
+	FDT_ERRTABENT(FDT_ERR_INTERNAL),
+	FDT_ERRTABENT(FDT_ERR_BADNCELLS),
+	FDT_ERRTABENT(FDT_ERR_BADVALUE),
+	FDT_ERRTABENT(FDT_ERR_BADOVERLAY),
+	FDT_ERRTABENT(FDT_ERR_NOPHANDLES),
+};
+#define FDT_ERRTABSIZE	(sizeof(fdt_errtable) / sizeof(fdt_errtable[0]))
+
+const char *fdt_strerror(int errval)
+{
+	if (errval > 0)
+		return "<valid offset/length>";
+	else if (errval == 0)
+		return "<no error>";
+	else if (errval > -FDT_ERRTABSIZE) {
+		const char *s = fdt_errtable[-errval].str;
+
+		if (s)
+			return s;
+	}
+
+	return "<unknown error>";
+}
diff --git a/scripts/dtc/libfdt/fdt_sw.c b/scripts/dtc/libfdt/fdt_sw.c
new file mode 100644
index 0000000000..6a804859fd
--- /dev/null
+++ b/scripts/dtc/libfdt/fdt_sw.c
@@ -0,0 +1,288 @@
+/*
+ * libfdt - Flat Device Tree manipulation
+ * Copyright (C) 2006 David Gibson, IBM Corporation.
+ *
+ * libfdt is dual licensed: you can use it either under the terms of
+ * the GPL, or the BSD license, at your option.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Alternatively,
+ *
+ *  b) Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *     1. Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *     2. Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include "libfdt_env.h"
+
+#include <fdt.h>
+#include <libfdt.h>
+
+#include "libfdt_internal.h"
+
+static int _fdt_sw_check_header(void *fdt)
+{
+	if (fdt_magic(fdt) != FDT_SW_MAGIC)
+		return -FDT_ERR_BADMAGIC;
+	/* FIXME: should check more details about the header state */
+	return 0;
+}
+
+#define FDT_SW_CHECK_HEADER(fdt) \
+	{ \
+		int err; \
+		if ((err = _fdt_sw_check_header(fdt)) != 0) \
+			return err; \
+	}
+
+static void *_fdt_grab_space(void *fdt, size_t len)
+{
+	int offset = fdt_size_dt_struct(fdt);
+	int spaceleft;
+
+	spaceleft = fdt_totalsize(fdt) - fdt_off_dt_struct(fdt)
+		- fdt_size_dt_strings(fdt);
+
+	if ((offset + len < offset) || (offset + len > spaceleft))
+		return NULL;
+
+	fdt_set_size_dt_struct(fdt, offset + len);
+	return _fdt_offset_ptr_w(fdt, offset);
+}
+
+int fdt_create(void *buf, int bufsize)
+{
+	void *fdt = buf;
+
+	if (bufsize < sizeof(struct fdt_header))
+		return -FDT_ERR_NOSPACE;
+
+	memset(buf, 0, bufsize);
+
+	fdt_set_magic(fdt, FDT_SW_MAGIC);
+	fdt_set_version(fdt, FDT_LAST_SUPPORTED_VERSION);
+	fdt_set_last_comp_version(fdt, FDT_FIRST_SUPPORTED_VERSION);
+	fdt_set_totalsize(fdt,  bufsize);
+
+	fdt_set_off_mem_rsvmap(fdt, FDT_ALIGN(sizeof(struct fdt_header),
+					      sizeof(struct fdt_reserve_entry)));
+	fdt_set_off_dt_struct(fdt, fdt_off_mem_rsvmap(fdt));
+	fdt_set_off_dt_strings(fdt, bufsize);
+
+	return 0;
+}
+
+int fdt_resize(void *fdt, void *buf, int bufsize)
+{
+	size_t headsize, tailsize;
+	char *oldtail, *newtail;
+
+	FDT_SW_CHECK_HEADER(fdt);
+
+	headsize = fdt_off_dt_struct(fdt);
+	tailsize = fdt_size_dt_strings(fdt);
+
+	if ((headsize + tailsize) > bufsize)
+		return -FDT_ERR_NOSPACE;
+
+	oldtail = (char *)fdt + fdt_totalsize(fdt) - tailsize;
+	newtail = (char *)buf + bufsize - tailsize;
+
+	/* Two cases to avoid clobbering data if the old and new
+	 * buffers partially overlap */
+	if (buf <= fdt) {
+		memmove(buf, fdt, headsize);
+		memmove(newtail, oldtail, tailsize);
+	} else {
+		memmove(newtail, oldtail, tailsize);
+		memmove(buf, fdt, headsize);
+	}
+
+	fdt_set_off_dt_strings(buf, bufsize);
+	fdt_set_totalsize(buf, bufsize);
+
+	return 0;
+}
+
+int fdt_add_reservemap_entry(void *fdt, uint64_t addr, uint64_t size)
+{
+	struct fdt_reserve_entry *re;
+	int offset;
+
+	FDT_SW_CHECK_HEADER(fdt);
+
+	if (fdt_size_dt_struct(fdt))
+		return -FDT_ERR_BADSTATE;
+
+	offset = fdt_off_dt_struct(fdt);
+	if ((offset + sizeof(*re)) > fdt_totalsize(fdt))
+		return -FDT_ERR_NOSPACE;
+
+	re = (struct fdt_reserve_entry *)((char *)fdt + offset);
+	re->address = cpu_to_fdt64(addr);
+	re->size = cpu_to_fdt64(size);
+
+	fdt_set_off_dt_struct(fdt, offset + sizeof(*re));
+
+	return 0;
+}
+
+int fdt_finish_reservemap(void *fdt)
+{
+	return fdt_add_reservemap_entry(fdt, 0, 0);
+}
+
+int fdt_begin_node(void *fdt, const char *name)
+{
+	struct fdt_node_header *nh;
+	int namelen = strlen(name) + 1;
+
+	FDT_SW_CHECK_HEADER(fdt);
+
+	nh = _fdt_grab_space(fdt, sizeof(*nh) + FDT_TAGALIGN(namelen));
+	if (! nh)
+		return -FDT_ERR_NOSPACE;
+
+	nh->tag = cpu_to_fdt32(FDT_BEGIN_NODE);
+	memcpy(nh->name, name, namelen);
+	return 0;
+}
+
+int fdt_end_node(void *fdt)
+{
+	fdt32_t *en;
+
+	FDT_SW_CHECK_HEADER(fdt);
+
+	en = _fdt_grab_space(fdt, FDT_TAGSIZE);
+	if (! en)
+		return -FDT_ERR_NOSPACE;
+
+	*en = cpu_to_fdt32(FDT_END_NODE);
+	return 0;
+}
+
+static int _fdt_find_add_string(void *fdt, const char *s)
+{
+	char *strtab = (char *)fdt + fdt_totalsize(fdt);
+	const char *p;
+	int strtabsize = fdt_size_dt_strings(fdt);
+	int len = strlen(s) + 1;
+	int struct_top, offset;
+
+	p = _fdt_find_string(strtab - strtabsize, strtabsize, s);
+	if (p)
+		return p - strtab;
+
+	/* Add it */
+	offset = -strtabsize - len;
+	struct_top = fdt_off_dt_struct(fdt) + fdt_size_dt_struct(fdt);
+	if (fdt_totalsize(fdt) + offset < struct_top)
+		return 0; /* no more room :( */
+
+	memcpy(strtab + offset, s, len);
+	fdt_set_size_dt_strings(fdt, strtabsize + len);
+	return offset;
+}
+
+int fdt_property(void *fdt, const char *name, const void *val, int len)
+{
+	struct fdt_property *prop;
+	int nameoff;
+
+	FDT_SW_CHECK_HEADER(fdt);
+
+	nameoff = _fdt_find_add_string(fdt, name);
+	if (nameoff == 0)
+		return -FDT_ERR_NOSPACE;
+
+	prop = _fdt_grab_space(fdt, sizeof(*prop) + FDT_TAGALIGN(len));
+	if (! prop)
+		return -FDT_ERR_NOSPACE;
+
+	prop->tag = cpu_to_fdt32(FDT_PROP);
+	prop->nameoff = cpu_to_fdt32(nameoff);
+	prop->len = cpu_to_fdt32(len);
+	memcpy(prop->data, val, len);
+	return 0;
+}
+
+int fdt_finish(void *fdt)
+{
+	char *p = (char *)fdt;
+	fdt32_t *end;
+	int oldstroffset, newstroffset;
+	uint32_t tag;
+	int offset, nextoffset;
+
+	FDT_SW_CHECK_HEADER(fdt);
+
+	/* Add terminator */
+	end = _fdt_grab_space(fdt, sizeof(*end));
+	if (! end)
+		return -FDT_ERR_NOSPACE;
+	*end = cpu_to_fdt32(FDT_END);
+
+	/* Relocate the string table */
+	oldstroffset = fdt_totalsize(fdt) - fdt_size_dt_strings(fdt);
+	newstroffset = fdt_off_dt_struct(fdt) + fdt_size_dt_struct(fdt);
+	memmove(p + newstroffset, p + oldstroffset, fdt_size_dt_strings(fdt));
+	fdt_set_off_dt_strings(fdt, newstroffset);
+
+	/* Walk the structure, correcting string offsets */
+	offset = 0;
+	while ((tag = fdt_next_tag(fdt, offset, &nextoffset)) != FDT_END) {
+		if (tag == FDT_PROP) {
+			struct fdt_property *prop =
+				_fdt_offset_ptr_w(fdt, offset);
+			int nameoff;
+
+			nameoff = fdt32_to_cpu(prop->nameoff);
+			nameoff += fdt_size_dt_strings(fdt);
+			prop->nameoff = cpu_to_fdt32(nameoff);
+		}
+		offset = nextoffset;
+	}
+	if (nextoffset < 0)
+		return nextoffset;
+
+	/* Finally, adjust the header */
+	fdt_set_totalsize(fdt, newstroffset + fdt_size_dt_strings(fdt));
+	fdt_set_magic(fdt, FDT_MAGIC);
+	return 0;
+}
diff --git a/scripts/dtc/libfdt/fdt_wip.c b/scripts/dtc/libfdt/fdt_wip.c
new file mode 100644
index 0000000000..6aaab39992
--- /dev/null
+++ b/scripts/dtc/libfdt/fdt_wip.c
@@ -0,0 +1,139 @@
+/*
+ * libfdt - Flat Device Tree manipulation
+ * Copyright (C) 2006 David Gibson, IBM Corporation.
+ *
+ * libfdt is dual licensed: you can use it either under the terms of
+ * the GPL, or the BSD license, at your option.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Alternatively,
+ *
+ *  b) Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *     1. Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *     2. Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include "libfdt_env.h"
+
+#include <fdt.h>
+#include <libfdt.h>
+
+#include "libfdt_internal.h"
+
+int fdt_setprop_inplace_namelen_partial(void *fdt, int nodeoffset,
+					const char *name, int namelen,
+					uint32_t idx, const void *val,
+					int len)
+{
+	void *propval;
+	int proplen;
+
+	propval = fdt_getprop_namelen_w(fdt, nodeoffset, name, namelen,
+					&proplen);
+	if (!propval)
+		return proplen;
+
+	if (proplen < (len + idx))
+		return -FDT_ERR_NOSPACE;
+
+	memcpy((char *)propval + idx, val, len);
+	return 0;
+}
+
+int fdt_setprop_inplace(void *fdt, int nodeoffset, const char *name,
+			const void *val, int len)
+{
+	const void *propval;
+	int proplen;
+
+	propval = fdt_getprop(fdt, nodeoffset, name, &proplen);
+	if (! propval)
+		return proplen;
+
+	if (proplen != len)
+		return -FDT_ERR_NOSPACE;
+
+	return fdt_setprop_inplace_namelen_partial(fdt, nodeoffset, name,
+						   strlen(name), 0,
+						   val, len);
+}
+
+static void _fdt_nop_region(void *start, int len)
+{
+	fdt32_t *p;
+
+	for (p = start; (char *)p < ((char *)start + len); p++)
+		*p = cpu_to_fdt32(FDT_NOP);
+}
+
+int fdt_nop_property(void *fdt, int nodeoffset, const char *name)
+{
+	struct fdt_property *prop;
+	int len;
+
+	prop = fdt_get_property_w(fdt, nodeoffset, name, &len);
+	if (! prop)
+		return len;
+
+	_fdt_nop_region(prop, len + sizeof(*prop));
+
+	return 0;
+}
+
+int _fdt_node_end_offset(void *fdt, int offset)
+{
+	int depth = 0;
+
+	while ((offset >= 0) && (depth >= 0))
+		offset = fdt_next_node(fdt, offset, &depth);
+
+	return offset;
+}
+
+int fdt_nop_node(void *fdt, int nodeoffset)
+{
+	int endoffset;
+
+	endoffset = _fdt_node_end_offset(fdt, nodeoffset);
+	if (endoffset < 0)
+		return endoffset;
+
+	_fdt_nop_region(fdt_offset_ptr_w(fdt, nodeoffset, 0),
+			endoffset - nodeoffset);
+	return 0;
+}
diff --git a/scripts/dtc/libfdt/libfdt.h b/scripts/dtc/libfdt/libfdt.h
new file mode 100644
index 0000000000..9e71bb9e03
--- /dev/null
+++ b/scripts/dtc/libfdt/libfdt.h
@@ -0,0 +1,1833 @@
+#ifndef _LIBFDT_H
+#define _LIBFDT_H
+/*
+ * libfdt - Flat Device Tree manipulation
+ * Copyright (C) 2006 David Gibson, IBM Corporation.
+ *
+ * libfdt is dual licensed: you can use it either under the terms of
+ * the GPL, or the BSD license, at your option.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Alternatively,
+ *
+ *  b) Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *     1. Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *     2. Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "libfdt_env.h"
+#include "fdt.h"
+
+#define FDT_FIRST_SUPPORTED_VERSION	0x10
+#define FDT_LAST_SUPPORTED_VERSION	0x11
+
+/* Error codes: informative error codes */
+#define FDT_ERR_NOTFOUND	1
+	/* FDT_ERR_NOTFOUND: The requested node or property does not exist */
+#define FDT_ERR_EXISTS		2
+	/* FDT_ERR_EXISTS: Attempted to create a node or property which
+	 * already exists */
+#define FDT_ERR_NOSPACE		3
+	/* FDT_ERR_NOSPACE: Operation needed to expand the device
+	 * tree, but its buffer did not have sufficient space to
+	 * contain the expanded tree. Use fdt_open_into() to move the
+	 * device tree to a buffer with more space. */
+
+/* Error codes: codes for bad parameters */
+#define FDT_ERR_BADOFFSET	4
+	/* FDT_ERR_BADOFFSET: Function was passed a structure block
+	 * offset which is out-of-bounds, or which points to an
+	 * unsuitable part of the structure for the operation. */
+#define FDT_ERR_BADPATH		5
+	/* FDT_ERR_BADPATH: Function was passed a badly formatted path
+	 * (e.g. missing a leading / for a function which requires an
+	 * absolute path) */
+#define FDT_ERR_BADPHANDLE	6
+	/* FDT_ERR_BADPHANDLE: Function was passed an invalid phandle.
+	 * This can be caused either by an invalid phandle property
+	 * length, or the phandle value was either 0 or -1, which are
+	 * not permitted. */
+#define FDT_ERR_BADSTATE	7
+	/* FDT_ERR_BADSTATE: Function was passed an incomplete device
+	 * tree created by the sequential-write functions, which is
+	 * not sufficiently complete for the requested operation. */
+
+/* Error codes: codes for bad device tree blobs */
+#define FDT_ERR_TRUNCATED	8
+	/* FDT_ERR_TRUNCATED: Structure block of the given device tree
+	 * ends without an FDT_END tag. */
+#define FDT_ERR_BADMAGIC	9
+	/* FDT_ERR_BADMAGIC: Given "device tree" appears not to be a
+	 * device tree at all - it is missing the flattened device
+	 * tree magic number. */
+#define FDT_ERR_BADVERSION	10
+	/* FDT_ERR_BADVERSION: Given device tree has a version which
+	 * can't be handled by the requested operation.  For
+	 * read-write functions, this may mean that fdt_open_into() is
+	 * required to convert the tree to the expected version. */
+#define FDT_ERR_BADSTRUCTURE	11
+	/* FDT_ERR_BADSTRUCTURE: Given device tree has a corrupt
+	 * structure block or other serious error (e.g. misnested
+	 * nodes, or subnodes preceding properties). */
+#define FDT_ERR_BADLAYOUT	12
+	/* FDT_ERR_BADLAYOUT: For read-write functions, the given
+	 * device tree has it's sub-blocks in an order that the
+	 * function can't handle (memory reserve map, then structure,
+	 * then strings).  Use fdt_open_into() to reorganize the tree
+	 * into a form suitable for the read-write operations. */
+
+/* "Can't happen" error indicating a bug in libfdt */
+#define FDT_ERR_INTERNAL	13
+	/* FDT_ERR_INTERNAL: libfdt has failed an internal assertion.
+	 * Should never be returned, if it is, it indicates a bug in
+	 * libfdt itself. */
+
+/* Errors in device tree content */
+#define FDT_ERR_BADNCELLS	14
+	/* FDT_ERR_BADNCELLS: Device tree has a #address-cells, #size-cells
+	 * or similar property with a bad format or value */
+
+#define FDT_ERR_BADVALUE	15
+	/* FDT_ERR_BADVALUE: Device tree has a property with an unexpected
+	 * value. For example: a property expected to contain a string list
+	 * is not NUL-terminated within the length of its value. */
+
+#define FDT_ERR_BADOVERLAY	16
+	/* FDT_ERR_BADOVERLAY: The device tree overlay, while
+	 * correctly structured, cannot be applied due to some
+	 * unexpected or missing value, property or node. */
+
+#define FDT_ERR_NOPHANDLES	17
+	/* FDT_ERR_NOPHANDLES: The device tree doesn't have any
+	 * phandle available anymore without causing an overflow */
+
+#define FDT_ERR_MAX		17
+
+/**********************************************************************/
+/* Low-level functions (you probably don't need these)                */
+/**********************************************************************/
+
+const void *fdt_offset_ptr(const void *fdt, int offset, unsigned int checklen);
+static inline void *fdt_offset_ptr_w(void *fdt, int offset, int checklen)
+{
+	return (void *)(uintptr_t)fdt_offset_ptr(fdt, offset, checklen);
+}
+
+uint32_t fdt_next_tag(const void *fdt, int offset, int *nextoffset);
+
+/**********************************************************************/
+/* Traversal functions                                                */
+/**********************************************************************/
+
+int fdt_next_node(const void *fdt, int offset, int *depth);
+
+/**
+ * fdt_first_subnode() - get offset of first direct subnode
+ *
+ * @fdt:	FDT blob
+ * @offset:	Offset of node to check
+ * @return offset of first subnode, or -FDT_ERR_NOTFOUND if there is none
+ */
+int fdt_first_subnode(const void *fdt, int offset);
+
+/**
+ * fdt_next_subnode() - get offset of next direct subnode
+ *
+ * After first calling fdt_first_subnode(), call this function repeatedly to
+ * get direct subnodes of a parent node.
+ *
+ * @fdt:	FDT blob
+ * @offset:	Offset of previous subnode
+ * @return offset of next subnode, or -FDT_ERR_NOTFOUND if there are no more
+ * subnodes
+ */
+int fdt_next_subnode(const void *fdt, int offset);
+
+/**
+ * fdt_for_each_subnode - iterate over all subnodes of a parent
+ *
+ * @node:	child node (int, lvalue)
+ * @fdt:	FDT blob (const void *)
+ * @parent:	parent node (int)
+ *
+ * This is actually a wrapper around a for loop and would be used like so:
+ *
+ *	fdt_for_each_subnode(node, fdt, parent) {
+ *		Use node
+ *		...
+ *	}
+ *
+ *	if ((node < 0) && (node != -FDT_ERR_NOT_FOUND)) {
+ *		Error handling
+ *	}
+ *
+ * Note that this is implemented as a macro and @node is used as
+ * iterator in the loop. The parent variable be constant or even a
+ * literal.
+ *
+ */
+#define fdt_for_each_subnode(node, fdt, parent)		\
+	for (node = fdt_first_subnode(fdt, parent);	\
+	     node >= 0;					\
+	     node = fdt_next_subnode(fdt, node))
+
+/**********************************************************************/
+/* General functions                                                  */
+/**********************************************************************/
+
+#define fdt_get_header(fdt, field) \
+	(fdt32_to_cpu(((const struct fdt_header *)(fdt))->field))
+#define fdt_magic(fdt)			(fdt_get_header(fdt, magic))
+#define fdt_totalsize(fdt)		(fdt_get_header(fdt, totalsize))
+#define fdt_off_dt_struct(fdt)		(fdt_get_header(fdt, off_dt_struct))
+#define fdt_off_dt_strings(fdt)		(fdt_get_header(fdt, off_dt_strings))
+#define fdt_off_mem_rsvmap(fdt)		(fdt_get_header(fdt, off_mem_rsvmap))
+#define fdt_version(fdt)		(fdt_get_header(fdt, version))
+#define fdt_last_comp_version(fdt)	(fdt_get_header(fdt, last_comp_version))
+#define fdt_boot_cpuid_phys(fdt)	(fdt_get_header(fdt, boot_cpuid_phys))
+#define fdt_size_dt_strings(fdt)	(fdt_get_header(fdt, size_dt_strings))
+#define fdt_size_dt_struct(fdt)		(fdt_get_header(fdt, size_dt_struct))
+
+#define __fdt_set_hdr(name) \
+	static inline void fdt_set_##name(void *fdt, uint32_t val) \
+	{ \
+		struct fdt_header *fdth = (struct fdt_header *)fdt; \
+		fdth->name = cpu_to_fdt32(val); \
+	}
+__fdt_set_hdr(magic);
+__fdt_set_hdr(totalsize);
+__fdt_set_hdr(off_dt_struct);
+__fdt_set_hdr(off_dt_strings);
+__fdt_set_hdr(off_mem_rsvmap);
+__fdt_set_hdr(version);
+__fdt_set_hdr(last_comp_version);
+__fdt_set_hdr(boot_cpuid_phys);
+__fdt_set_hdr(size_dt_strings);
+__fdt_set_hdr(size_dt_struct);
+#undef __fdt_set_hdr
+
+/**
+ * fdt_check_header - sanity check a device tree or possible device tree
+ * @fdt: pointer to data which might be a flattened device tree
+ *
+ * fdt_check_header() checks that the given buffer contains what
+ * appears to be a flattened device tree with sane information in its
+ * header.
+ *
+ * returns:
+ *     0, if the buffer appears to contain a valid device tree
+ *     -FDT_ERR_BADMAGIC,
+ *     -FDT_ERR_BADVERSION,
+ *     -FDT_ERR_BADSTATE, standard meanings, as above
+ */
+int fdt_check_header(const void *fdt);
+
+/**
+ * fdt_move - move a device tree around in memory
+ * @fdt: pointer to the device tree to move
+ * @buf: pointer to memory where the device is to be moved
+ * @bufsize: size of the memory space at buf
+ *
+ * fdt_move() relocates, if possible, the device tree blob located at
+ * fdt to the buffer at buf of size bufsize.  The buffer may overlap
+ * with the existing device tree blob at fdt.  Therefore,
+ *     fdt_move(fdt, fdt, fdt_totalsize(fdt))
+ * should always succeed.
+ *
+ * returns:
+ *     0, on success
+ *     -FDT_ERR_NOSPACE, bufsize is insufficient to contain the device tree
+ *     -FDT_ERR_BADMAGIC,
+ *     -FDT_ERR_BADVERSION,
+ *     -FDT_ERR_BADSTATE, standard meanings
+ */
+int fdt_move(const void *fdt, void *buf, int bufsize);
+
+/**********************************************************************/
+/* Read-only functions                                                */
+/**********************************************************************/
+
+/**
+ * fdt_string - retrieve a string from the strings block of a device tree
+ * @fdt: pointer to the device tree blob
+ * @stroffset: offset of the string within the strings block (native endian)
+ *
+ * fdt_string() retrieves a pointer to a single string from the
+ * strings block of the device tree blob at fdt.
+ *
+ * returns:
+ *     a pointer to the string, on success
+ *     NULL, if stroffset is out of bounds
+ */
+const char *fdt_string(const void *fdt, int stroffset);
+
+/**
+ * fdt_get_max_phandle - retrieves the highest phandle in a tree
+ * @fdt: pointer to the device tree blob
+ *
+ * fdt_get_max_phandle retrieves the highest phandle in the given
+ * device tree. This will ignore badly formatted phandles, or phandles
+ * with a value of 0 or -1.
+ *
+ * returns:
+ *      the highest phandle on success
+ *      0, if no phandle was found in the device tree
+ *      -1, if an error occurred
+ */
+uint32_t fdt_get_max_phandle(const void *fdt);
+
+/**
+ * fdt_num_mem_rsv - retrieve the number of memory reserve map entries
+ * @fdt: pointer to the device tree blob
+ *
+ * Returns the number of entries in the device tree blob's memory
+ * reservation map.  This does not include the terminating 0,0 entry
+ * or any other (0,0) entries reserved for expansion.
+ *
+ * returns:
+ *     the number of entries
+ */
+int fdt_num_mem_rsv(const void *fdt);
+
+/**
+ * fdt_get_mem_rsv - retrieve one memory reserve map entry
+ * @fdt: pointer to the device tree blob
+ * @address, @size: pointers to 64-bit variables
+ *
+ * On success, *address and *size will contain the address and size of
+ * the n-th reserve map entry from the device tree blob, in
+ * native-endian format.
+ *
+ * returns:
+ *     0, on success
+ *     -FDT_ERR_BADMAGIC,
+ *     -FDT_ERR_BADVERSION,
+ *     -FDT_ERR_BADSTATE, standard meanings
+ */
+int fdt_get_mem_rsv(const void *fdt, int n, uint64_t *address, uint64_t *size);
+
+/**
+ * fdt_subnode_offset_namelen - find a subnode based on substring
+ * @fdt: pointer to the device tree blob
+ * @parentoffset: structure block offset of a node
+ * @name: name of the subnode to locate
+ * @namelen: number of characters of name to consider
+ *
+ * Identical to fdt_subnode_offset(), but only examine the first
+ * namelen characters of name for matching the subnode name.  This is
+ * useful for finding subnodes based on a portion of a larger string,
+ * such as a full path.
+ */
+int fdt_subnode_offset_namelen(const void *fdt, int parentoffset,
+			       const char *name, int namelen);
+/**
+ * fdt_subnode_offset - find a subnode of a given node
+ * @fdt: pointer to the device tree blob
+ * @parentoffset: structure block offset of a node
+ * @name: name of the subnode to locate
+ *
+ * fdt_subnode_offset() finds a subnode of the node at structure block
+ * offset parentoffset with the given name.  name may include a unit
+ * address, in which case fdt_subnode_offset() will find the subnode
+ * with that unit address, or the unit address may be omitted, in
+ * which case fdt_subnode_offset() will find an arbitrary subnode
+ * whose name excluding unit address matches the given name.
+ *
+ * returns:
+ *	structure block offset of the requested subnode (>=0), on success
+ *	-FDT_ERR_NOTFOUND, if the requested subnode does not exist
+ *	-FDT_ERR_BADOFFSET, if parentoffset did not point to an FDT_BEGIN_NODE
+ *		tag
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_TRUNCATED, standard meanings.
+ */
+int fdt_subnode_offset(const void *fdt, int parentoffset, const char *name);
+
+/**
+ * fdt_path_offset_namelen - find a tree node by its full path
+ * @fdt: pointer to the device tree blob
+ * @path: full path of the node to locate
+ * @namelen: number of characters of path to consider
+ *
+ * Identical to fdt_path_offset(), but only consider the first namelen
+ * characters of path as the path name.
+ */
+int fdt_path_offset_namelen(const void *fdt, const char *path, int namelen);
+
+/**
+ * fdt_path_offset - find a tree node by its full path
+ * @fdt: pointer to the device tree blob
+ * @path: full path of the node to locate
+ *
+ * fdt_path_offset() finds a node of a given path in the device tree.
+ * Each path component may omit the unit address portion, but the
+ * results of this are undefined if any such path component is
+ * ambiguous (that is if there are multiple nodes at the relevant
+ * level matching the given component, differentiated only by unit
+ * address).
+ *
+ * returns:
+ *	structure block offset of the node with the requested path (>=0), on
+ *		success
+ *	-FDT_ERR_BADPATH, given path does not begin with '/' or is invalid
+ *	-FDT_ERR_NOTFOUND, if the requested node does not exist
+ *      -FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_TRUNCATED, standard meanings.
+ */
+int fdt_path_offset(const void *fdt, const char *path);
+
+/**
+ * fdt_get_name - retrieve the name of a given node
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: structure block offset of the starting node
+ * @lenp: pointer to an integer variable (will be overwritten) or NULL
+ *
+ * fdt_get_name() retrieves the name (including unit address) of the
+ * device tree node at structure block offset nodeoffset.  If lenp is
+ * non-NULL, the length of this name is also returned, in the integer
+ * pointed to by lenp.
+ *
+ * returns:
+ *	pointer to the node's name, on success
+ *		If lenp is non-NULL, *lenp contains the length of that name
+ *			(>=0)
+ *	NULL, on error
+ *		if lenp is non-NULL *lenp contains an error code (<0):
+ *		-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE
+ *			tag
+ *		-FDT_ERR_BADMAGIC,
+ *		-FDT_ERR_BADVERSION,
+ *		-FDT_ERR_BADSTATE, standard meanings
+ */
+const char *fdt_get_name(const void *fdt, int nodeoffset, int *lenp);
+
+/**
+ * fdt_first_property_offset - find the offset of a node's first property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: structure block offset of a node
+ *
+ * fdt_first_property_offset() finds the first property of the node at
+ * the given structure block offset.
+ *
+ * returns:
+ *	structure block offset of the property (>=0), on success
+ *	-FDT_ERR_NOTFOUND, if the requested node has no properties
+ *	-FDT_ERR_BADOFFSET, if nodeoffset did not point to an FDT_BEGIN_NODE tag
+ *      -FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_TRUNCATED, standard meanings.
+ */
+int fdt_first_property_offset(const void *fdt, int nodeoffset);
+
+/**
+ * fdt_next_property_offset - step through a node's properties
+ * @fdt: pointer to the device tree blob
+ * @offset: structure block offset of a property
+ *
+ * fdt_next_property_offset() finds the property immediately after the
+ * one at the given structure block offset.  This will be a property
+ * of the same node as the given property.
+ *
+ * returns:
+ *	structure block offset of the next property (>=0), on success
+ *	-FDT_ERR_NOTFOUND, if the given property is the last in its node
+ *	-FDT_ERR_BADOFFSET, if nodeoffset did not point to an FDT_PROP tag
+ *      -FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_TRUNCATED, standard meanings.
+ */
+int fdt_next_property_offset(const void *fdt, int offset);
+
+/**
+ * fdt_for_each_property_offset - iterate over all properties of a node
+ *
+ * @property_offset:	property offset (int, lvalue)
+ * @fdt:		FDT blob (const void *)
+ * @node:		node offset (int)
+ *
+ * This is actually a wrapper around a for loop and would be used like so:
+ *
+ *	fdt_for_each_property_offset(property, fdt, node) {
+ *		Use property
+ *		...
+ *	}
+ *
+ *	if ((property < 0) && (property != -FDT_ERR_NOT_FOUND)) {
+ *		Error handling
+ *	}
+ *
+ * Note that this is implemented as a macro and property is used as
+ * iterator in the loop. The node variable can be constant or even a
+ * literal.
+ */
+#define fdt_for_each_property_offset(property, fdt, node)	\
+	for (property = fdt_first_property_offset(fdt, node);	\
+	     property >= 0;					\
+	     property = fdt_next_property_offset(fdt, property))
+
+/**
+ * fdt_get_property_by_offset - retrieve the property at a given offset
+ * @fdt: pointer to the device tree blob
+ * @offset: offset of the property to retrieve
+ * @lenp: pointer to an integer variable (will be overwritten) or NULL
+ *
+ * fdt_get_property_by_offset() retrieves a pointer to the
+ * fdt_property structure within the device tree blob at the given
+ * offset.  If lenp is non-NULL, the length of the property value is
+ * also returned, in the integer pointed to by lenp.
+ *
+ * returns:
+ *	pointer to the structure representing the property
+ *		if lenp is non-NULL, *lenp contains the length of the property
+ *		value (>=0)
+ *	NULL, on error
+ *		if lenp is non-NULL, *lenp contains an error code (<0):
+ *		-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_PROP tag
+ *		-FDT_ERR_BADMAGIC,
+ *		-FDT_ERR_BADVERSION,
+ *		-FDT_ERR_BADSTATE,
+ *		-FDT_ERR_BADSTRUCTURE,
+ *		-FDT_ERR_TRUNCATED, standard meanings
+ */
+const struct fdt_property *fdt_get_property_by_offset(const void *fdt,
+						      int offset,
+						      int *lenp);
+
+/**
+ * fdt_get_property_namelen - find a property based on substring
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to find
+ * @name: name of the property to find
+ * @namelen: number of characters of name to consider
+ * @lenp: pointer to an integer variable (will be overwritten) or NULL
+ *
+ * Identical to fdt_get_property(), but only examine the first namelen
+ * characters of name for matching the property name.
+ */
+const struct fdt_property *fdt_get_property_namelen(const void *fdt,
+						    int nodeoffset,
+						    const char *name,
+						    int namelen, int *lenp);
+
+/**
+ * fdt_get_property - find a given property in a given node
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to find
+ * @name: name of the property to find
+ * @lenp: pointer to an integer variable (will be overwritten) or NULL
+ *
+ * fdt_get_property() retrieves a pointer to the fdt_property
+ * structure within the device tree blob corresponding to the property
+ * named 'name' of the node at offset nodeoffset.  If lenp is
+ * non-NULL, the length of the property value is also returned, in the
+ * integer pointed to by lenp.
+ *
+ * returns:
+ *	pointer to the structure representing the property
+ *		if lenp is non-NULL, *lenp contains the length of the property
+ *		value (>=0)
+ *	NULL, on error
+ *		if lenp is non-NULL, *lenp contains an error code (<0):
+ *		-FDT_ERR_NOTFOUND, node does not have named property
+ *		-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE
+ *			tag
+ *		-FDT_ERR_BADMAGIC,
+ *		-FDT_ERR_BADVERSION,
+ *		-FDT_ERR_BADSTATE,
+ *		-FDT_ERR_BADSTRUCTURE,
+ *		-FDT_ERR_TRUNCATED, standard meanings
+ */
+const struct fdt_property *fdt_get_property(const void *fdt, int nodeoffset,
+					    const char *name, int *lenp);
+static inline struct fdt_property *fdt_get_property_w(void *fdt, int nodeoffset,
+						      const char *name,
+						      int *lenp)
+{
+	return (struct fdt_property *)(uintptr_t)
+		fdt_get_property(fdt, nodeoffset, name, lenp);
+}
+
+/**
+ * fdt_getprop_by_offset - retrieve the value of a property at a given offset
+ * @fdt: pointer to the device tree blob
+ * @ffset: offset of the property to read
+ * @namep: pointer to a string variable (will be overwritten) or NULL
+ * @lenp: pointer to an integer variable (will be overwritten) or NULL
+ *
+ * fdt_getprop_by_offset() retrieves a pointer to the value of the
+ * property at structure block offset 'offset' (this will be a pointer
+ * to within the device blob itself, not a copy of the value).  If
+ * lenp is non-NULL, the length of the property value is also
+ * returned, in the integer pointed to by lenp.  If namep is non-NULL,
+ * the property's namne will also be returned in the char * pointed to
+ * by namep (this will be a pointer to within the device tree's string
+ * block, not a new copy of the name).
+ *
+ * returns:
+ *	pointer to the property's value
+ *		if lenp is non-NULL, *lenp contains the length of the property
+ *		value (>=0)
+ *		if namep is non-NULL *namep contiains a pointer to the property
+ *		name.
+ *	NULL, on error
+ *		if lenp is non-NULL, *lenp contains an error code (<0):
+ *		-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_PROP tag
+ *		-FDT_ERR_BADMAGIC,
+ *		-FDT_ERR_BADVERSION,
+ *		-FDT_ERR_BADSTATE,
+ *		-FDT_ERR_BADSTRUCTURE,
+ *		-FDT_ERR_TRUNCATED, standard meanings
+ */
+const void *fdt_getprop_by_offset(const void *fdt, int offset,
+				  const char **namep, int *lenp);
+
+/**
+ * fdt_getprop_namelen - get property value based on substring
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to find
+ * @name: name of the property to find
+ * @namelen: number of characters of name to consider
+ * @lenp: pointer to an integer variable (will be overwritten) or NULL
+ *
+ * Identical to fdt_getprop(), but only examine the first namelen
+ * characters of name for matching the property name.
+ */
+const void *fdt_getprop_namelen(const void *fdt, int nodeoffset,
+				const char *name, int namelen, int *lenp);
+static inline void *fdt_getprop_namelen_w(void *fdt, int nodeoffset,
+					  const char *name, int namelen,
+					  int *lenp)
+{
+	return (void *)(uintptr_t)fdt_getprop_namelen(fdt, nodeoffset, name,
+						      namelen, lenp);
+}
+
+/**
+ * fdt_getprop - retrieve the value of a given property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to find
+ * @name: name of the property to find
+ * @lenp: pointer to an integer variable (will be overwritten) or NULL
+ *
+ * fdt_getprop() retrieves a pointer to the value of the property
+ * named 'name' of the node at offset nodeoffset (this will be a
+ * pointer to within the device blob itself, not a copy of the value).
+ * If lenp is non-NULL, the length of the property value is also
+ * returned, in the integer pointed to by lenp.
+ *
+ * returns:
+ *	pointer to the property's value
+ *		if lenp is non-NULL, *lenp contains the length of the property
+ *		value (>=0)
+ *	NULL, on error
+ *		if lenp is non-NULL, *lenp contains an error code (<0):
+ *		-FDT_ERR_NOTFOUND, node does not have named property
+ *		-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE
+ *			tag
+ *		-FDT_ERR_BADMAGIC,
+ *		-FDT_ERR_BADVERSION,
+ *		-FDT_ERR_BADSTATE,
+ *		-FDT_ERR_BADSTRUCTURE,
+ *		-FDT_ERR_TRUNCATED, standard meanings
+ */
+const void *fdt_getprop(const void *fdt, int nodeoffset,
+			const char *name, int *lenp);
+static inline void *fdt_getprop_w(void *fdt, int nodeoffset,
+				  const char *name, int *lenp)
+{
+	return (void *)(uintptr_t)fdt_getprop(fdt, nodeoffset, name, lenp);
+}
+
+/**
+ * fdt_get_phandle - retrieve the phandle of a given node
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: structure block offset of the node
+ *
+ * fdt_get_phandle() retrieves the phandle of the device tree node at
+ * structure block offset nodeoffset.
+ *
+ * returns:
+ *	the phandle of the node at nodeoffset, on success (!= 0, != -1)
+ *	0, if the node has no phandle, or another error occurs
+ */
+uint32_t fdt_get_phandle(const void *fdt, int nodeoffset);
+
+/**
+ * fdt_get_alias_namelen - get alias based on substring
+ * @fdt: pointer to the device tree blob
+ * @name: name of the alias th look up
+ * @namelen: number of characters of name to consider
+ *
+ * Identical to fdt_get_alias(), but only examine the first namelen
+ * characters of name for matching the alias name.
+ */
+const char *fdt_get_alias_namelen(const void *fdt,
+				  const char *name, int namelen);
+
+/**
+ * fdt_get_alias - retrieve the path referenced by a given alias
+ * @fdt: pointer to the device tree blob
+ * @name: name of the alias th look up
+ *
+ * fdt_get_alias() retrieves the value of a given alias.  That is, the
+ * value of the property named 'name' in the node /aliases.
+ *
+ * returns:
+ *	a pointer to the expansion of the alias named 'name', if it exists
+ *	NULL, if the given alias or the /aliases node does not exist
+ */
+const char *fdt_get_alias(const void *fdt, const char *name);
+
+/**
+ * fdt_get_path - determine the full path of a node
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose path to find
+ * @buf: character buffer to contain the returned path (will be overwritten)
+ * @buflen: size of the character buffer at buf
+ *
+ * fdt_get_path() computes the full path of the node at offset
+ * nodeoffset, and records that path in the buffer at buf.
+ *
+ * NOTE: This function is expensive, as it must scan the device tree
+ * structure from the start to nodeoffset.
+ *
+ * returns:
+ *	0, on success
+ *		buf contains the absolute path of the node at
+ *		nodeoffset, as a NUL-terminated string.
+ *	-FDT_ERR_BADOFFSET, nodeoffset does not refer to a BEGIN_NODE tag
+ *	-FDT_ERR_NOSPACE, the path of the given node is longer than (bufsize-1)
+ *		characters and will not fit in the given buffer.
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE, standard meanings
+ */
+int fdt_get_path(const void *fdt, int nodeoffset, char *buf, int buflen);
+
+/**
+ * fdt_supernode_atdepth_offset - find a specific ancestor of a node
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose parent to find
+ * @supernodedepth: depth of the ancestor to find
+ * @nodedepth: pointer to an integer variable (will be overwritten) or NULL
+ *
+ * fdt_supernode_atdepth_offset() finds an ancestor of the given node
+ * at a specific depth from the root (where the root itself has depth
+ * 0, its immediate subnodes depth 1 and so forth).  So
+ *	fdt_supernode_atdepth_offset(fdt, nodeoffset, 0, NULL);
+ * will always return 0, the offset of the root node.  If the node at
+ * nodeoffset has depth D, then:
+ *	fdt_supernode_atdepth_offset(fdt, nodeoffset, D, NULL);
+ * will return nodeoffset itself.
+ *
+ * NOTE: This function is expensive, as it must scan the device tree
+ * structure from the start to nodeoffset.
+ *
+ * returns:
+ *	structure block offset of the node at node offset's ancestor
+ *		of depth supernodedepth (>=0), on success
+ *	-FDT_ERR_BADOFFSET, nodeoffset does not refer to a BEGIN_NODE tag
+ *	-FDT_ERR_NOTFOUND, supernodedepth was greater than the depth of
+ *		nodeoffset
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE, standard meanings
+ */
+int fdt_supernode_atdepth_offset(const void *fdt, int nodeoffset,
+				 int supernodedepth, int *nodedepth);
+
+/**
+ * fdt_node_depth - find the depth of a given node
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose parent to find
+ *
+ * fdt_node_depth() finds the depth of a given node.  The root node
+ * has depth 0, its immediate subnodes depth 1 and so forth.
+ *
+ * NOTE: This function is expensive, as it must scan the device tree
+ * structure from the start to nodeoffset.
+ *
+ * returns:
+ *	depth of the node at nodeoffset (>=0), on success
+ *	-FDT_ERR_BADOFFSET, nodeoffset does not refer to a BEGIN_NODE tag
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE, standard meanings
+ */
+int fdt_node_depth(const void *fdt, int nodeoffset);
+
+/**
+ * fdt_parent_offset - find the parent of a given node
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose parent to find
+ *
+ * fdt_parent_offset() locates the parent node of a given node (that
+ * is, it finds the offset of the node which contains the node at
+ * nodeoffset as a subnode).
+ *
+ * NOTE: This function is expensive, as it must scan the device tree
+ * structure from the start to nodeoffset, *twice*.
+ *
+ * returns:
+ *	structure block offset of the parent of the node at nodeoffset
+ *		(>=0), on success
+ *	-FDT_ERR_BADOFFSET, nodeoffset does not refer to a BEGIN_NODE tag
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE, standard meanings
+ */
+int fdt_parent_offset(const void *fdt, int nodeoffset);
+
+/**
+ * fdt_node_offset_by_prop_value - find nodes with a given property value
+ * @fdt: pointer to the device tree blob
+ * @startoffset: only find nodes after this offset
+ * @propname: property name to check
+ * @propval: property value to search for
+ * @proplen: length of the value in propval
+ *
+ * fdt_node_offset_by_prop_value() returns the offset of the first
+ * node after startoffset, which has a property named propname whose
+ * value is of length proplen and has value equal to propval; or if
+ * startoffset is -1, the very first such node in the tree.
+ *
+ * To iterate through all nodes matching the criterion, the following
+ * idiom can be used:
+ *	offset = fdt_node_offset_by_prop_value(fdt, -1, propname,
+ *					       propval, proplen);
+ *	while (offset != -FDT_ERR_NOTFOUND) {
+ *		// other code here
+ *		offset = fdt_node_offset_by_prop_value(fdt, offset, propname,
+ *						       propval, proplen);
+ *	}
+ *
+ * Note the -1 in the first call to the function, if 0 is used here
+ * instead, the function will never locate the root node, even if it
+ * matches the criterion.
+ *
+ * returns:
+ *	structure block offset of the located node (>= 0, >startoffset),
+ *		 on success
+ *	-FDT_ERR_NOTFOUND, no node matching the criterion exists in the
+ *		tree after startoffset
+ *	-FDT_ERR_BADOFFSET, nodeoffset does not refer to a BEGIN_NODE tag
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE, standard meanings
+ */
+int fdt_node_offset_by_prop_value(const void *fdt, int startoffset,
+				  const char *propname,
+				  const void *propval, int proplen);
+
+/**
+ * fdt_node_offset_by_phandle - find the node with a given phandle
+ * @fdt: pointer to the device tree blob
+ * @phandle: phandle value
+ *
+ * fdt_node_offset_by_phandle() returns the offset of the node
+ * which has the given phandle value.  If there is more than one node
+ * in the tree with the given phandle (an invalid tree), results are
+ * undefined.
+ *
+ * returns:
+ *	structure block offset of the located node (>= 0), on success
+ *	-FDT_ERR_NOTFOUND, no node with that phandle exists
+ *	-FDT_ERR_BADPHANDLE, given phandle value was invalid (0 or -1)
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE, standard meanings
+ */
+int fdt_node_offset_by_phandle(const void *fdt, uint32_t phandle);
+
+/**
+ * fdt_node_check_compatible: check a node's compatible property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of a tree node
+ * @compatible: string to match against
+ *
+ *
+ * fdt_node_check_compatible() returns 0 if the given node contains a
+ * 'compatible' property with the given string as one of its elements,
+ * it returns non-zero otherwise, or on error.
+ *
+ * returns:
+ *	0, if the node has a 'compatible' property listing the given string
+ *	1, if the node has a 'compatible' property, but it does not list
+ *		the given string
+ *	-FDT_ERR_NOTFOUND, if the given node has no 'compatible' property
+ *	-FDT_ERR_BADOFFSET, if nodeoffset does not refer to a BEGIN_NODE tag
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE, standard meanings
+ */
+int fdt_node_check_compatible(const void *fdt, int nodeoffset,
+			      const char *compatible);
+
+/**
+ * fdt_node_offset_by_compatible - find nodes with a given 'compatible' value
+ * @fdt: pointer to the device tree blob
+ * @startoffset: only find nodes after this offset
+ * @compatible: 'compatible' string to match against
+ *
+ * fdt_node_offset_by_compatible() returns the offset of the first
+ * node after startoffset, which has a 'compatible' property which
+ * lists the given compatible string; or if startoffset is -1, the
+ * very first such node in the tree.
+ *
+ * To iterate through all nodes matching the criterion, the following
+ * idiom can be used:
+ *	offset = fdt_node_offset_by_compatible(fdt, -1, compatible);
+ *	while (offset != -FDT_ERR_NOTFOUND) {
+ *		// other code here
+ *		offset = fdt_node_offset_by_compatible(fdt, offset, compatible);
+ *	}
+ *
+ * Note the -1 in the first call to the function, if 0 is used here
+ * instead, the function will never locate the root node, even if it
+ * matches the criterion.
+ *
+ * returns:
+ *	structure block offset of the located node (>= 0, >startoffset),
+ *		 on success
+ *	-FDT_ERR_NOTFOUND, no node matching the criterion exists in the
+ *		tree after startoffset
+ *	-FDT_ERR_BADOFFSET, nodeoffset does not refer to a BEGIN_NODE tag
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE, standard meanings
+ */
+int fdt_node_offset_by_compatible(const void *fdt, int startoffset,
+				  const char *compatible);
+
+/**
+ * fdt_stringlist_contains - check a string list property for a string
+ * @strlist: Property containing a list of strings to check
+ * @listlen: Length of property
+ * @str: String to search for
+ *
+ * This is a utility function provided for convenience. The list contains
+ * one or more strings, each terminated by \0, as is found in a device tree
+ * "compatible" property.
+ *
+ * @return: 1 if the string is found in the list, 0 not found, or invalid list
+ */
+int fdt_stringlist_contains(const char *strlist, int listlen, const char *str);
+
+/**
+ * fdt_stringlist_count - count the number of strings in a string list
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of a tree node
+ * @property: name of the property containing the string list
+ * @return:
+ *   the number of strings in the given property
+ *   -FDT_ERR_BADVALUE if the property value is not NUL-terminated
+ *   -FDT_ERR_NOTFOUND if the property does not exist
+ */
+int fdt_stringlist_count(const void *fdt, int nodeoffset, const char *property);
+
+/**
+ * fdt_stringlist_search - find a string in a string list and return its index
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of a tree node
+ * @property: name of the property containing the string list
+ * @string: string to look up in the string list
+ *
+ * Note that it is possible for this function to succeed on property values
+ * that are not NUL-terminated. That's because the function will stop after
+ * finding the first occurrence of @string. This can for example happen with
+ * small-valued cell properties, such as #address-cells, when searching for
+ * the empty string.
+ *
+ * @return:
+ *   the index of the string in the list of strings
+ *   -FDT_ERR_BADVALUE if the property value is not NUL-terminated
+ *   -FDT_ERR_NOTFOUND if the property does not exist or does not contain
+ *                     the given string
+ */
+int fdt_stringlist_search(const void *fdt, int nodeoffset, const char *property,
+			  const char *string);
+
+/**
+ * fdt_stringlist_get() - obtain the string at a given index in a string list
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of a tree node
+ * @property: name of the property containing the string list
+ * @index: index of the string to return
+ * @lenp: return location for the string length or an error code on failure
+ *
+ * Note that this will successfully extract strings from properties with
+ * non-NUL-terminated values. For example on small-valued cell properties
+ * this function will return the empty string.
+ *
+ * If non-NULL, the length of the string (on success) or a negative error-code
+ * (on failure) will be stored in the integer pointer to by lenp.
+ *
+ * @return:
+ *   A pointer to the string at the given index in the string list or NULL on
+ *   failure. On success the length of the string will be stored in the memory
+ *   location pointed to by the lenp parameter, if non-NULL. On failure one of
+ *   the following negative error codes will be returned in the lenp parameter
+ *   (if non-NULL):
+ *     -FDT_ERR_BADVALUE if the property value is not NUL-terminated
+ *     -FDT_ERR_NOTFOUND if the property does not exist
+ */
+const char *fdt_stringlist_get(const void *fdt, int nodeoffset,
+			       const char *property, int index,
+			       int *lenp);
+
+/**********************************************************************/
+/* Read-only functions (addressing related)                           */
+/**********************************************************************/
+
+/**
+ * FDT_MAX_NCELLS - maximum value for #address-cells and #size-cells
+ *
+ * This is the maximum value for #address-cells, #size-cells and
+ * similar properties that will be processed by libfdt.  IEE1275
+ * requires that OF implementations handle values up to 4.
+ * Implementations may support larger values, but in practice higher
+ * values aren't used.
+ */
+#define FDT_MAX_NCELLS		4
+
+/**
+ * fdt_address_cells - retrieve address size for a bus represented in the tree
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node to find the address size for
+ *
+ * When the node has a valid #address-cells property, returns its value.
+ *
+ * returns:
+ *	0 <= n < FDT_MAX_NCELLS, on success
+ *      2, if the node has no #address-cells property
+ *      -FDT_ERR_BADNCELLS, if the node has a badly formatted or invalid
+ *		#address-cells property
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+int fdt_address_cells(const void *fdt, int nodeoffset);
+
+/**
+ * fdt_size_cells - retrieve address range size for a bus represented in the
+ *                  tree
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node to find the address range size for
+ *
+ * When the node has a valid #size-cells property, returns its value.
+ *
+ * returns:
+ *	0 <= n < FDT_MAX_NCELLS, on success
+ *      2, if the node has no #address-cells property
+ *      -FDT_ERR_BADNCELLS, if the node has a badly formatted or invalid
+ *		#size-cells property
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+int fdt_size_cells(const void *fdt, int nodeoffset);
+
+
+/**********************************************************************/
+/* Write-in-place functions                                           */
+/**********************************************************************/
+
+/**
+ * fdt_setprop_inplace_namelen_partial - change a property's value,
+ *                                       but not its size
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ * @namelen: number of characters of name to consider
+ * @idx: index of the property to change in the array
+ * @val: pointer to data to replace the property value with
+ * @len: length of the property value
+ *
+ * Identical to fdt_setprop_inplace(), but modifies the given property
+ * starting from the given index, and using only the first characters
+ * of the name. It is useful when you want to manipulate only one value of
+ * an array and you have a string that doesn't end with \0.
+ */
+int fdt_setprop_inplace_namelen_partial(void *fdt, int nodeoffset,
+					const char *name, int namelen,
+					uint32_t idx, const void *val,
+					int len);
+
+/**
+ * fdt_setprop_inplace - change a property's value, but not its size
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ * @val: pointer to data to replace the property value with
+ * @len: length of the property value
+ *
+ * fdt_setprop_inplace() replaces the value of a given property with
+ * the data in val, of length len.  This function cannot change the
+ * size of a property, and so will only work if len is equal to the
+ * current length of the property.
+ *
+ * This function will alter only the bytes in the blob which contain
+ * the given property value, and will not alter or move any other part
+ * of the tree.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, if len is not equal to the property's current length
+ *	-FDT_ERR_NOTFOUND, node does not have the named property
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+int fdt_setprop_inplace(void *fdt, int nodeoffset, const char *name,
+			const void *val, int len);
+
+/**
+ * fdt_setprop_inplace_u32 - change the value of a 32-bit integer property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ * @val: 32-bit integer value to replace the property with
+ *
+ * fdt_setprop_inplace_u32() replaces the value of a given property
+ * with the 32-bit integer value in val, converting val to big-endian
+ * if necessary.  This function cannot change the size of a property,
+ * and so will only work if the property already exists and has length
+ * 4.
+ *
+ * This function will alter only the bytes in the blob which contain
+ * the given property value, and will not alter or move any other part
+ * of the tree.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, if the property's length is not equal to 4
+ *	-FDT_ERR_NOTFOUND, node does not have the named property
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+static inline int fdt_setprop_inplace_u32(void *fdt, int nodeoffset,
+					  const char *name, uint32_t val)
+{
+	fdt32_t tmp = cpu_to_fdt32(val);
+	return fdt_setprop_inplace(fdt, nodeoffset, name, &tmp, sizeof(tmp));
+}
+
+/**
+ * fdt_setprop_inplace_u64 - change the value of a 64-bit integer property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ * @val: 64-bit integer value to replace the property with
+ *
+ * fdt_setprop_inplace_u64() replaces the value of a given property
+ * with the 64-bit integer value in val, converting val to big-endian
+ * if necessary.  This function cannot change the size of a property,
+ * and so will only work if the property already exists and has length
+ * 8.
+ *
+ * This function will alter only the bytes in the blob which contain
+ * the given property value, and will not alter or move any other part
+ * of the tree.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, if the property's length is not equal to 8
+ *	-FDT_ERR_NOTFOUND, node does not have the named property
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+static inline int fdt_setprop_inplace_u64(void *fdt, int nodeoffset,
+					  const char *name, uint64_t val)
+{
+	fdt64_t tmp = cpu_to_fdt64(val);
+	return fdt_setprop_inplace(fdt, nodeoffset, name, &tmp, sizeof(tmp));
+}
+
+/**
+ * fdt_setprop_inplace_cell - change the value of a single-cell property
+ *
+ * This is an alternative name for fdt_setprop_inplace_u32()
+ */
+static inline int fdt_setprop_inplace_cell(void *fdt, int nodeoffset,
+					   const char *name, uint32_t val)
+{
+	return fdt_setprop_inplace_u32(fdt, nodeoffset, name, val);
+}
+
+/**
+ * fdt_nop_property - replace a property with nop tags
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to nop
+ * @name: name of the property to nop
+ *
+ * fdt_nop_property() will replace a given property's representation
+ * in the blob with FDT_NOP tags, effectively removing it from the
+ * tree.
+ *
+ * This function will alter only the bytes in the blob which contain
+ * the property, and will not alter or move any other part of the
+ * tree.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOTFOUND, node does not have the named property
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+int fdt_nop_property(void *fdt, int nodeoffset, const char *name);
+
+/**
+ * fdt_nop_node - replace a node (subtree) with nop tags
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node to nop
+ *
+ * fdt_nop_node() will replace a given node's representation in the
+ * blob, including all its subnodes, if any, with FDT_NOP tags,
+ * effectively removing it from the tree.
+ *
+ * This function will alter only the bytes in the blob which contain
+ * the node and its properties and subnodes, and will not alter or
+ * move any other part of the tree.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+int fdt_nop_node(void *fdt, int nodeoffset);
+
+/**********************************************************************/
+/* Sequential write functions                                         */
+/**********************************************************************/
+
+int fdt_create(void *buf, int bufsize);
+int fdt_resize(void *fdt, void *buf, int bufsize);
+int fdt_add_reservemap_entry(void *fdt, uint64_t addr, uint64_t size);
+int fdt_finish_reservemap(void *fdt);
+int fdt_begin_node(void *fdt, const char *name);
+int fdt_property(void *fdt, const char *name, const void *val, int len);
+static inline int fdt_property_u32(void *fdt, const char *name, uint32_t val)
+{
+	fdt32_t tmp = cpu_to_fdt32(val);
+	return fdt_property(fdt, name, &tmp, sizeof(tmp));
+}
+static inline int fdt_property_u64(void *fdt, const char *name, uint64_t val)
+{
+	fdt64_t tmp = cpu_to_fdt64(val);
+	return fdt_property(fdt, name, &tmp, sizeof(tmp));
+}
+static inline int fdt_property_cell(void *fdt, const char *name, uint32_t val)
+{
+	return fdt_property_u32(fdt, name, val);
+}
+#define fdt_property_string(fdt, name, str) \
+	fdt_property(fdt, name, str, strlen(str)+1)
+int fdt_end_node(void *fdt);
+int fdt_finish(void *fdt);
+
+/**********************************************************************/
+/* Read-write functions                                               */
+/**********************************************************************/
+
+int fdt_create_empty_tree(void *buf, int bufsize);
+int fdt_open_into(const void *fdt, void *buf, int bufsize);
+int fdt_pack(void *fdt);
+
+/**
+ * fdt_add_mem_rsv - add one memory reserve map entry
+ * @fdt: pointer to the device tree blob
+ * @address, @size: 64-bit values (native endian)
+ *
+ * Adds a reserve map entry to the given blob reserving a region at
+ * address address of length size.
+ *
+ * This function will insert data into the reserve map and will
+ * therefore change the indexes of some entries in the table.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
+ *		contain the new reservation entry
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+int fdt_add_mem_rsv(void *fdt, uint64_t address, uint64_t size);
+
+/**
+ * fdt_del_mem_rsv - remove a memory reserve map entry
+ * @fdt: pointer to the device tree blob
+ * @n: entry to remove
+ *
+ * fdt_del_mem_rsv() removes the n-th memory reserve map entry from
+ * the blob.
+ *
+ * This function will delete data from the reservation table and will
+ * therefore change the indexes of some entries in the table.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOTFOUND, there is no entry of the given index (i.e. there
+ *		are less than n+1 reserve map entries)
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+int fdt_del_mem_rsv(void *fdt, int n);
+
+/**
+ * fdt_set_name - change the name of a given node
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: structure block offset of a node
+ * @name: name to give the node
+ *
+ * fdt_set_name() replaces the name (including unit address, if any)
+ * of the given node with the given string.  NOTE: this function can't
+ * efficiently check if the new name is unique amongst the given
+ * node's siblings; results are undefined if this function is invoked
+ * with a name equal to one of the given node's siblings.
+ *
+ * This function may insert or delete data from the blob, and will
+ * therefore change the offsets of some existing nodes.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob
+ *		to contain the new name
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE, standard meanings
+ */
+int fdt_set_name(void *fdt, int nodeoffset, const char *name);
+
+/**
+ * fdt_setprop - create or change a property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ * @val: pointer to data to set the property value to
+ * @len: length of the property value
+ *
+ * fdt_setprop() sets the value of the named property in the given
+ * node to the given value and length, creating the property if it
+ * does not already exist.
+ *
+ * This function may insert or delete data from the blob, and will
+ * therefore change the offsets of some existing nodes.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
+ *		contain the new property value
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+int fdt_setprop(void *fdt, int nodeoffset, const char *name,
+		const void *val, int len);
+
+/**
+ * fdt_setprop_u32 - set a property to a 32-bit integer
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ * @val: 32-bit integer value for the property (native endian)
+ *
+ * fdt_setprop_u32() sets the value of the named property in the given
+ * node to the given 32-bit integer value (converting to big-endian if
+ * necessary), or creates a new property with that value if it does
+ * not already exist.
+ *
+ * This function may insert or delete data from the blob, and will
+ * therefore change the offsets of some existing nodes.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
+ *		contain the new property value
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+static inline int fdt_setprop_u32(void *fdt, int nodeoffset, const char *name,
+				  uint32_t val)
+{
+	fdt32_t tmp = cpu_to_fdt32(val);
+	return fdt_setprop(fdt, nodeoffset, name, &tmp, sizeof(tmp));
+}
+
+/**
+ * fdt_setprop_u64 - set a property to a 64-bit integer
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ * @val: 64-bit integer value for the property (native endian)
+ *
+ * fdt_setprop_u64() sets the value of the named property in the given
+ * node to the given 64-bit integer value (converting to big-endian if
+ * necessary), or creates a new property with that value if it does
+ * not already exist.
+ *
+ * This function may insert or delete data from the blob, and will
+ * therefore change the offsets of some existing nodes.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
+ *		contain the new property value
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+static inline int fdt_setprop_u64(void *fdt, int nodeoffset, const char *name,
+				  uint64_t val)
+{
+	fdt64_t tmp = cpu_to_fdt64(val);
+	return fdt_setprop(fdt, nodeoffset, name, &tmp, sizeof(tmp));
+}
+
+/**
+ * fdt_setprop_cell - set a property to a single cell value
+ *
+ * This is an alternative name for fdt_setprop_u32()
+ */
+static inline int fdt_setprop_cell(void *fdt, int nodeoffset, const char *name,
+				   uint32_t val)
+{
+	return fdt_setprop_u32(fdt, nodeoffset, name, val);
+}
+
+/**
+ * fdt_setprop_string - set a property to a string value
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ * @str: string value for the property
+ *
+ * fdt_setprop_string() sets the value of the named property in the
+ * given node to the given string value (using the length of the
+ * string to determine the new length of the property), or creates a
+ * new property with that value if it does not already exist.
+ *
+ * This function may insert or delete data from the blob, and will
+ * therefore change the offsets of some existing nodes.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
+ *		contain the new property value
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+#define fdt_setprop_string(fdt, nodeoffset, name, str) \
+	fdt_setprop((fdt), (nodeoffset), (name), (str), strlen(str)+1)
+
+
+/**
+ * fdt_setprop_empty - set a property to an empty value
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ *
+ * fdt_setprop_empty() sets the value of the named property in the
+ * given node to an empty (zero length) value, or creates a new empty
+ * property if it does not already exist.
+ *
+ * This function may insert or delete data from the blob, and will
+ * therefore change the offsets of some existing nodes.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
+ *		contain the new property value
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+#define fdt_setprop_empty(fdt, nodeoffset, name) \
+	fdt_setprop((fdt), (nodeoffset), (name), NULL, 0)
+
+/**
+ * fdt_appendprop - append to or create a property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to append to
+ * @val: pointer to data to append to the property value
+ * @len: length of the data to append to the property value
+ *
+ * fdt_appendprop() appends the value to the named property in the
+ * given node, creating the property if it does not already exist.
+ *
+ * This function may insert data into the blob, and will therefore
+ * change the offsets of some existing nodes.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
+ *		contain the new property value
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+int fdt_appendprop(void *fdt, int nodeoffset, const char *name,
+		   const void *val, int len);
+
+/**
+ * fdt_appendprop_u32 - append a 32-bit integer value to a property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ * @val: 32-bit integer value to append to the property (native endian)
+ *
+ * fdt_appendprop_u32() appends the given 32-bit integer value
+ * (converting to big-endian if necessary) to the value of the named
+ * property in the given node, or creates a new property with that
+ * value if it does not already exist.
+ *
+ * This function may insert data into the blob, and will therefore
+ * change the offsets of some existing nodes.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
+ *		contain the new property value
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+static inline int fdt_appendprop_u32(void *fdt, int nodeoffset,
+				     const char *name, uint32_t val)
+{
+	fdt32_t tmp = cpu_to_fdt32(val);
+	return fdt_appendprop(fdt, nodeoffset, name, &tmp, sizeof(tmp));
+}
+
+/**
+ * fdt_appendprop_u64 - append a 64-bit integer value to a property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ * @val: 64-bit integer value to append to the property (native endian)
+ *
+ * fdt_appendprop_u64() appends the given 64-bit integer value
+ * (converting to big-endian if necessary) to the value of the named
+ * property in the given node, or creates a new property with that
+ * value if it does not already exist.
+ *
+ * This function may insert data into the blob, and will therefore
+ * change the offsets of some existing nodes.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
+ *		contain the new property value
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+static inline int fdt_appendprop_u64(void *fdt, int nodeoffset,
+				     const char *name, uint64_t val)
+{
+	fdt64_t tmp = cpu_to_fdt64(val);
+	return fdt_appendprop(fdt, nodeoffset, name, &tmp, sizeof(tmp));
+}
+
+/**
+ * fdt_appendprop_cell - append a single cell value to a property
+ *
+ * This is an alternative name for fdt_appendprop_u32()
+ */
+static inline int fdt_appendprop_cell(void *fdt, int nodeoffset,
+				      const char *name, uint32_t val)
+{
+	return fdt_appendprop_u32(fdt, nodeoffset, name, val);
+}
+
+/**
+ * fdt_appendprop_string - append a string to a property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ * @str: string value to append to the property
+ *
+ * fdt_appendprop_string() appends the given string to the value of
+ * the named property in the given node, or creates a new property
+ * with that value if it does not already exist.
+ *
+ * This function may insert data into the blob, and will therefore
+ * change the offsets of some existing nodes.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
+ *		contain the new property value
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+#define fdt_appendprop_string(fdt, nodeoffset, name, str) \
+	fdt_appendprop((fdt), (nodeoffset), (name), (str), strlen(str)+1)
+
+/**
+ * fdt_delprop - delete a property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to nop
+ * @name: name of the property to nop
+ *
+ * fdt_del_property() will delete the given property.
+ *
+ * This function will delete data from the blob, and will therefore
+ * change the offsets of some existing nodes.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOTFOUND, node does not have the named property
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+int fdt_delprop(void *fdt, int nodeoffset, const char *name);
+
+/**
+ * fdt_add_subnode_namelen - creates a new node based on substring
+ * @fdt: pointer to the device tree blob
+ * @parentoffset: structure block offset of a node
+ * @name: name of the subnode to locate
+ * @namelen: number of characters of name to consider
+ *
+ * Identical to fdt_add_subnode(), but use only the first namelen
+ * characters of name as the name of the new node.  This is useful for
+ * creating subnodes based on a portion of a larger string, such as a
+ * full path.
+ */
+int fdt_add_subnode_namelen(void *fdt, int parentoffset,
+			    const char *name, int namelen);
+
+/**
+ * fdt_add_subnode - creates a new node
+ * @fdt: pointer to the device tree blob
+ * @parentoffset: structure block offset of a node
+ * @name: name of the subnode to locate
+ *
+ * fdt_add_subnode() creates a new node as a subnode of the node at
+ * structure block offset parentoffset, with the given name (which
+ * should include the unit address, if any).
+ *
+ * This function will insert data into the blob, and will therefore
+ * change the offsets of some existing nodes.
+
+ * returns:
+ *	structure block offset of the created nodeequested subnode (>=0), on
+ *		success
+ *	-FDT_ERR_NOTFOUND, if the requested subnode does not exist
+ *	-FDT_ERR_BADOFFSET, if parentoffset did not point to an FDT_BEGIN_NODE
+ *		tag
+ *	-FDT_ERR_EXISTS, if the node at parentoffset already has a subnode of
+ *		the given name
+ *	-FDT_ERR_NOSPACE, if there is insufficient free space in the
+ *		blob to contain the new node
+ *	-FDT_ERR_NOSPACE
+ *	-FDT_ERR_BADLAYOUT
+ *      -FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_TRUNCATED, standard meanings.
+ */
+int fdt_add_subnode(void *fdt, int parentoffset, const char *name);
+
+/**
+ * fdt_del_node - delete a node (subtree)
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node to nop
+ *
+ * fdt_del_node() will remove the given node, including all its
+ * subnodes if any, from the blob.
+ *
+ * This function will delete data from the blob, and will therefore
+ * change the offsets of some existing nodes.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+int fdt_del_node(void *fdt, int nodeoffset);
+
+/**
+ * fdt_overlay_apply - Applies a DT overlay on a base DT
+ * @fdt: pointer to the base device tree blob
+ * @fdto: pointer to the device tree overlay blob
+ *
+ * fdt_overlay_apply() will apply the given device tree overlay on the
+ * given base device tree.
+ *
+ * Expect the base device tree to be modified, even if the function
+ * returns an error.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, there's not enough space in the base device tree
+ *	-FDT_ERR_NOTFOUND, the overlay points to some inexistant nodes or
+ *		properties in the base DT
+ *	-FDT_ERR_BADPHANDLE,
+ *	-FDT_ERR_BADOVERLAY,
+ *	-FDT_ERR_NOPHANDLES,
+ *	-FDT_ERR_INTERNAL,
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADOFFSET,
+ *	-FDT_ERR_BADPATH,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+int fdt_overlay_apply(void *fdt, void *fdto);
+
+/**********************************************************************/
+/* Debugging / informational functions                                */
+/**********************************************************************/
+
+const char *fdt_strerror(int errval);
+
+#endif /* _LIBFDT_H */
diff --git a/scripts/dtc/libfdt/libfdt_env.h b/scripts/dtc/libfdt/libfdt_env.h
new file mode 100644
index 0000000000..99f936dacc
--- /dev/null
+++ b/scripts/dtc/libfdt/libfdt_env.h
@@ -0,0 +1,112 @@
+#ifndef _LIBFDT_ENV_H
+#define _LIBFDT_ENV_H
+/*
+ * libfdt - Flat Device Tree manipulation
+ * Copyright (C) 2006 David Gibson, IBM Corporation.
+ * Copyright 2012 Kim Phillips, Freescale Semiconductor.
+ *
+ * libfdt is dual licensed: you can use it either under the terms of
+ * the GPL, or the BSD license, at your option.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Alternatively,
+ *
+ *  b) Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *     1. Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *     2. Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdlib.h>
+#include <string.h>
+
+#ifdef __CHECKER__
+#define __force __attribute__((force))
+#define __bitwise __attribute__((bitwise))
+#else
+#define __force
+#define __bitwise
+#endif
+
+typedef uint16_t __bitwise fdt16_t;
+typedef uint32_t __bitwise fdt32_t;
+typedef uint64_t __bitwise fdt64_t;
+
+#define EXTRACT_BYTE(x, n)	((unsigned long long)((uint8_t *)&x)[n])
+#define CPU_TO_FDT16(x) ((EXTRACT_BYTE(x, 0) << 8) | EXTRACT_BYTE(x, 1))
+#define CPU_TO_FDT32(x) ((EXTRACT_BYTE(x, 0) << 24) | (EXTRACT_BYTE(x, 1) << 16) | \
+			 (EXTRACT_BYTE(x, 2) << 8) | EXTRACT_BYTE(x, 3))
+#define CPU_TO_FDT64(x) ((EXTRACT_BYTE(x, 0) << 56) | (EXTRACT_BYTE(x, 1) << 48) | \
+			 (EXTRACT_BYTE(x, 2) << 40) | (EXTRACT_BYTE(x, 3) << 32) | \
+			 (EXTRACT_BYTE(x, 4) << 24) | (EXTRACT_BYTE(x, 5) << 16) | \
+			 (EXTRACT_BYTE(x, 6) << 8) | EXTRACT_BYTE(x, 7))
+
+static inline uint16_t fdt16_to_cpu(fdt16_t x)
+{
+	return (__force uint16_t)CPU_TO_FDT16(x);
+}
+static inline fdt16_t cpu_to_fdt16(uint16_t x)
+{
+	return (__force fdt16_t)CPU_TO_FDT16(x);
+}
+
+static inline uint32_t fdt32_to_cpu(fdt32_t x)
+{
+	return (__force uint32_t)CPU_TO_FDT32(x);
+}
+static inline fdt32_t cpu_to_fdt32(uint32_t x)
+{
+	return (__force fdt32_t)CPU_TO_FDT32(x);
+}
+
+static inline uint64_t fdt64_to_cpu(fdt64_t x)
+{
+	return (__force uint64_t)CPU_TO_FDT64(x);
+}
+static inline fdt64_t cpu_to_fdt64(uint64_t x)
+{
+	return (__force fdt64_t)CPU_TO_FDT64(x);
+}
+#undef CPU_TO_FDT64
+#undef CPU_TO_FDT32
+#undef CPU_TO_FDT16
+#undef EXTRACT_BYTE
+
+#endif /* _LIBFDT_ENV_H */
diff --git a/scripts/dtc/libfdt/libfdt_internal.h b/scripts/dtc/libfdt/libfdt_internal.h
new file mode 100644
index 0000000000..02cfa6fb61
--- /dev/null
+++ b/scripts/dtc/libfdt/libfdt_internal.h
@@ -0,0 +1,95 @@
+#ifndef _LIBFDT_INTERNAL_H
+#define _LIBFDT_INTERNAL_H
+/*
+ * libfdt - Flat Device Tree manipulation
+ * Copyright (C) 2006 David Gibson, IBM Corporation.
+ *
+ * libfdt is dual licensed: you can use it either under the terms of
+ * the GPL, or the BSD license, at your option.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Alternatively,
+ *
+ *  b) Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *     1. Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *     2. Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <fdt.h>
+
+#define FDT_ALIGN(x, a)		(((x) + (a) - 1) & ~((a) - 1))
+#define FDT_TAGALIGN(x)		(FDT_ALIGN((x), FDT_TAGSIZE))
+
+#define FDT_CHECK_HEADER(fdt) \
+	{ \
+		int __err; \
+		if ((__err = fdt_check_header(fdt)) != 0) \
+			return __err; \
+	}
+
+int _fdt_check_node_offset(const void *fdt, int offset);
+int _fdt_check_prop_offset(const void *fdt, int offset);
+const char *_fdt_find_string(const char *strtab, int tabsize, const char *s);
+int _fdt_node_end_offset(void *fdt, int nodeoffset);
+
+static inline const void *_fdt_offset_ptr(const void *fdt, int offset)
+{
+	return (const char *)fdt + fdt_off_dt_struct(fdt) + offset;
+}
+
+static inline void *_fdt_offset_ptr_w(void *fdt, int offset)
+{
+	return (void *)(uintptr_t)_fdt_offset_ptr(fdt, offset);
+}
+
+static inline const struct fdt_reserve_entry *_fdt_mem_rsv(const void *fdt, int n)
+{
+	const struct fdt_reserve_entry *rsv_table =
+		(const struct fdt_reserve_entry *)
+		((const char *)fdt + fdt_off_mem_rsvmap(fdt));
+
+	return rsv_table + n;
+}
+static inline struct fdt_reserve_entry *_fdt_mem_rsv_w(void *fdt, int n)
+{
+	return (void *)(uintptr_t)_fdt_mem_rsv(fdt, n);
+}
+
+#define FDT_SW_MAGIC		(~FDT_MAGIC)
+
+#endif /* _LIBFDT_INTERNAL_H */
diff --git a/scripts/dtc/livetree.c b/scripts/dtc/livetree.c
new file mode 100644
index 0000000000..36be9afefd
--- /dev/null
+++ b/scripts/dtc/livetree.c
@@ -0,0 +1,980 @@
+/*
+ * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation.  2005.
+ *
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ *  General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307
+ *                                                                   USA
+ */
+
+#include "dtc.h"
+
+/*
+ * Tree building functions
+ */
+
+void add_label(struct label **labels, char *label)
+{
+	struct label *new;
+
+	/* Make sure the label isn't already there */
+	for_each_label_withdel(*labels, new)
+		if (streq(new->label, label)) {
+			new->deleted = 0;
+			return;
+		}
+
+	new = xmalloc(sizeof(*new));
+	memset(new, 0, sizeof(*new));
+	new->label = label;
+	new->next = *labels;
+	*labels = new;
+}
+
+void delete_labels(struct label **labels)
+{
+	struct label *label;
+
+	for_each_label(*labels, label)
+		label->deleted = 1;
+}
+
+struct property *build_property(char *name, struct data val)
+{
+	struct property *new = xmalloc(sizeof(*new));
+
+	memset(new, 0, sizeof(*new));
+
+	new->name = name;
+	new->val = val;
+
+	return new;
+}
+
+struct property *build_property_delete(char *name)
+{
+	struct property *new = xmalloc(sizeof(*new));
+
+	memset(new, 0, sizeof(*new));
+
+	new->name = name;
+	new->deleted = 1;
+
+	return new;
+}
+
+struct property *chain_property(struct property *first, struct property *list)
+{
+	assert(first->next == NULL);
+
+	first->next = list;
+	return first;
+}
+
+struct property *reverse_properties(struct property *first)
+{
+	struct property *p = first;
+	struct property *head = NULL;
+	struct property *next;
+
+	while (p) {
+		next = p->next;
+		p->next = head;
+		head = p;
+		p = next;
+	}
+	return head;
+}
+
+struct node *build_node(struct property *proplist, struct node *children)
+{
+	struct node *new = xmalloc(sizeof(*new));
+	struct node *child;
+
+	memset(new, 0, sizeof(*new));
+
+	new->proplist = reverse_properties(proplist);
+	new->children = children;
+
+	for_each_child(new, child) {
+		child->parent = new;
+	}
+
+	return new;
+}
+
+struct node *build_node_delete(void)
+{
+	struct node *new = xmalloc(sizeof(*new));
+
+	memset(new, 0, sizeof(*new));
+
+	new->deleted = 1;
+
+	return new;
+}
+
+struct node *name_node(struct node *node, char *name)
+{
+	assert(node->name == NULL);
+
+	node->name = name;
+
+	return node;
+}
+
+struct node *merge_nodes(struct node *old_node, struct node *new_node)
+{
+	struct property *new_prop, *old_prop;
+	struct node *new_child, *old_child;
+	struct label *l;
+
+	old_node->deleted = 0;
+
+	/* Add new node labels to old node */
+	for_each_label_withdel(new_node->labels, l)
+		add_label(&old_node->labels, l->label);
+
+	/* Move properties from the new node to the old node.  If there
+	 * is a collision, replace the old value with the new */
+	while (new_node->proplist) {
+		/* Pop the property off the list */
+		new_prop = new_node->proplist;
+		new_node->proplist = new_prop->next;
+		new_prop->next = NULL;
+
+		if (new_prop->deleted) {
+			delete_property_by_name(old_node, new_prop->name);
+			free(new_prop);
+			continue;
+		}
+
+		/* Look for a collision, set new value if there is */
+		for_each_property_withdel(old_node, old_prop) {
+			if (streq(old_prop->name, new_prop->name)) {
+				/* Add new labels to old property */
+				for_each_label_withdel(new_prop->labels, l)
+					add_label(&old_prop->labels, l->label);
+
+				old_prop->val = new_prop->val;
+				old_prop->deleted = 0;
+				free(new_prop);
+				new_prop = NULL;
+				break;
+			}
+		}
+
+		/* if no collision occurred, add property to the old node. */
+		if (new_prop)
+			add_property(old_node, new_prop);
+	}
+
+	/* Move the override child nodes into the primary node.  If
+	 * there is a collision, then merge the nodes. */
+	while (new_node->children) {
+		/* Pop the child node off the list */
+		new_child = new_node->children;
+		new_node->children = new_child->next_sibling;
+		new_child->parent = NULL;
+		new_child->next_sibling = NULL;
+
+		if (new_child->deleted) {
+			delete_node_by_name(old_node, new_child->name);
+			free(new_child);
+			continue;
+		}
+
+		/* Search for a collision.  Merge if there is */
+		for_each_child_withdel(old_node, old_child) {
+			if (streq(old_child->name, new_child->name)) {
+				merge_nodes(old_child, new_child);
+				new_child = NULL;
+				break;
+			}
+		}
+
+		/* if no collision occurred, add child to the old node. */
+		if (new_child)
+			add_child(old_node, new_child);
+	}
+
+	/* The new node contents are now merged into the old node.  Free
+	 * the new node. */
+	free(new_node);
+
+	return old_node;
+}
+
+struct node *chain_node(struct node *first, struct node *list)
+{
+	assert(first->next_sibling == NULL);
+
+	first->next_sibling = list;
+	return first;
+}
+
+void add_property(struct node *node, struct property *prop)
+{
+	struct property **p;
+
+	prop->next = NULL;
+
+	p = &node->proplist;
+	while (*p)
+		p = &((*p)->next);
+
+	*p = prop;
+}
+
+void delete_property_by_name(struct node *node, char *name)
+{
+	struct property *prop = node->proplist;
+
+	while (prop) {
+		if (streq(prop->name, name)) {
+			delete_property(prop);
+			return;
+		}
+		prop = prop->next;
+	}
+}
+
+void delete_property(struct property *prop)
+{
+	prop->deleted = 1;
+	delete_labels(&prop->labels);
+}
+
+void add_child(struct node *parent, struct node *child)
+{
+	struct node **p;
+
+	child->next_sibling = NULL;
+	child->parent = parent;
+
+	p = &parent->children;
+	while (*p)
+		p = &((*p)->next_sibling);
+
+	*p = child;
+}
+
+void delete_node_by_name(struct node *parent, char *name)
+{
+	struct node *node = parent->children;
+
+	while (node) {
+		if (streq(node->name, name)) {
+			delete_node(node);
+			return;
+		}
+		node = node->next_sibling;
+	}
+}
+
+void delete_node(struct node *node)
+{
+	struct property *prop;
+	struct node *child;
+
+	node->deleted = 1;
+	for_each_child(node, child)
+		delete_node(child);
+	for_each_property(node, prop)
+		delete_property(prop);
+	delete_labels(&node->labels);
+}
+
+void append_to_property(struct node *node,
+				    char *name, const void *data, int len)
+{
+	struct data d;
+	struct property *p;
+
+	p = get_property(node, name);
+	if (p) {
+		d = data_append_data(p->val, data, len);
+		p->val = d;
+	} else {
+		d = data_append_data(empty_data, data, len);
+		p = build_property(name, d);
+		add_property(node, p);
+	}
+}
+
+struct reserve_info *build_reserve_entry(uint64_t address, uint64_t size)
+{
+	struct reserve_info *new = xmalloc(sizeof(*new));
+
+	memset(new, 0, sizeof(*new));
+
+	new->re.address = address;
+	new->re.size = size;
+
+	return new;
+}
+
+struct reserve_info *chain_reserve_entry(struct reserve_info *first,
+					struct reserve_info *list)
+{
+	assert(first->next == NULL);
+
+	first->next = list;
+	return first;
+}
+
+struct reserve_info *add_reserve_entry(struct reserve_info *list,
+				      struct reserve_info *new)
+{
+	struct reserve_info *last;
+
+	new->next = NULL;
+
+	if (! list)
+		return new;
+
+	for (last = list; last->next; last = last->next)
+		;
+
+	last->next = new;
+
+	return list;
+}
+
+struct dt_info *build_dt_info(unsigned int dtsflags,
+			      struct reserve_info *reservelist,
+			      struct node *tree, uint32_t boot_cpuid_phys)
+{
+	struct dt_info *dti;
+
+	dti = xmalloc(sizeof(*dti));
+	dti->dtsflags = dtsflags;
+	dti->reservelist = reservelist;
+	dti->dt = tree;
+	dti->boot_cpuid_phys = boot_cpuid_phys;
+
+	return dti;
+}
+
+/*
+ * Tree accessor functions
+ */
+
+const char *get_unitname(struct node *node)
+{
+	if (node->name[node->basenamelen] == '\0')
+		return "";
+	else
+		return node->name + node->basenamelen + 1;
+}
+
+struct property *get_property(struct node *node, const char *propname)
+{
+	struct property *prop;
+
+	for_each_property(node, prop)
+		if (streq(prop->name, propname))
+			return prop;
+
+	return NULL;
+}
+
+cell_t propval_cell(struct property *prop)
+{
+	assert(prop->val.len == sizeof(cell_t));
+	return fdt32_to_cpu(*((cell_t *)prop->val.val));
+}
+
+struct property *get_property_by_label(struct node *tree, const char *label,
+				       struct node **node)
+{
+	struct property *prop;
+	struct node *c;
+
+	*node = tree;
+
+	for_each_property(tree, prop) {
+		struct label *l;
+
+		for_each_label(prop->labels, l)
+			if (streq(l->label, label))
+				return prop;
+	}
+
+	for_each_child(tree, c) {
+		prop = get_property_by_label(c, label, node);
+		if (prop)
+			return prop;
+	}
+
+	*node = NULL;
+	return NULL;
+}
+
+struct marker *get_marker_label(struct node *tree, const char *label,
+				struct node **node, struct property **prop)
+{
+	struct marker *m;
+	struct property *p;
+	struct node *c;
+
+	*node = tree;
+
+	for_each_property(tree, p) {
+		*prop = p;
+		m = p->val.markers;
+		for_each_marker_of_type(m, LABEL)
+			if (streq(m->ref, label))
+				return m;
+	}
+
+	for_each_child(tree, c) {
+		m = get_marker_label(c, label, node, prop);
+		if (m)
+			return m;
+	}
+
+	*prop = NULL;
+	*node = NULL;
+	return NULL;
+}
+
+struct node *get_subnode(struct node *node, const char *nodename)
+{
+	struct node *child;
+
+	for_each_child(node, child)
+		if (streq(child->name, nodename))
+			return child;
+
+	return NULL;
+}
+
+struct node *get_node_by_path(struct node *tree, const char *path)
+{
+	const char *p;
+	struct node *child;
+
+	if (!path || ! (*path)) {
+		if (tree->deleted)
+			return NULL;
+		return tree;
+	}
+
+	while (path[0] == '/')
+		path++;
+
+	p = strchr(path, '/');
+
+	for_each_child(tree, child) {
+		if (p && strneq(path, child->name, p-path))
+			return get_node_by_path(child, p+1);
+		else if (!p && streq(path, child->name))
+			return child;
+	}
+
+	return NULL;
+}
+
+struct node *get_node_by_label(struct node *tree, const char *label)
+{
+	struct node *child, *node;
+	struct label *l;
+
+	assert(label && (strlen(label) > 0));
+
+	for_each_label(tree->labels, l)
+		if (streq(l->label, label))
+			return tree;
+
+	for_each_child(tree, child) {
+		node = get_node_by_label(child, label);
+		if (node)
+			return node;
+	}
+
+	return NULL;
+}
+
+struct node *get_node_by_phandle(struct node *tree, cell_t phandle)
+{
+	struct node *child, *node;
+
+	assert((phandle != 0) && (phandle != -1));
+
+	if (tree->phandle == phandle) {
+		if (tree->deleted)
+			return NULL;
+		return tree;
+	}
+
+	for_each_child(tree, child) {
+		node = get_node_by_phandle(child, phandle);
+		if (node)
+			return node;
+	}
+
+	return NULL;
+}
+
+struct node *get_node_by_ref(struct node *tree, const char *ref)
+{
+	if (streq(ref, "/"))
+		return tree;
+	else if (ref[0] == '/')
+		return get_node_by_path(tree, ref);
+	else
+		return get_node_by_label(tree, ref);
+}
+
+cell_t get_node_phandle(struct node *root, struct node *node)
+{
+	static cell_t phandle = 1; /* FIXME: ick, static local */
+
+	if ((node->phandle != 0) && (node->phandle != -1))
+		return node->phandle;
+
+	while (get_node_by_phandle(root, phandle))
+		phandle++;
+
+	node->phandle = phandle;
+
+	if (!get_property(node, "linux,phandle")
+	    && (phandle_format & PHANDLE_LEGACY))
+		add_property(node,
+			     build_property("linux,phandle",
+					    data_append_cell(empty_data, phandle)));
+
+	if (!get_property(node, "phandle")
+	    && (phandle_format & PHANDLE_EPAPR))
+		add_property(node,
+			     build_property("phandle",
+					    data_append_cell(empty_data, phandle)));
+
+	/* If the node *does* have a phandle property, we must
+	 * be dealing with a self-referencing phandle, which will be
+	 * fixed up momentarily in the caller */
+
+	return node->phandle;
+}
+
+uint32_t guess_boot_cpuid(struct node *tree)
+{
+	struct node *cpus, *bootcpu;
+	struct property *reg;
+
+	cpus = get_node_by_path(tree, "/cpus");
+	if (!cpus)
+		return 0;
+
+
+	bootcpu = cpus->children;
+	if (!bootcpu)
+		return 0;
+
+	reg = get_property(bootcpu, "reg");
+	if (!reg || (reg->val.len != sizeof(uint32_t)))
+		return 0;
+
+	/* FIXME: Sanity check node? */
+
+	return propval_cell(reg);
+}
+
+static int cmp_reserve_info(const void *ax, const void *bx)
+{
+	const struct reserve_info *a, *b;
+
+	a = *((const struct reserve_info * const *)ax);
+	b = *((const struct reserve_info * const *)bx);
+
+	if (a->re.address < b->re.address)
+		return -1;
+	else if (a->re.address > b->re.address)
+		return 1;
+	else if (a->re.size < b->re.size)
+		return -1;
+	else if (a->re.size > b->re.size)
+		return 1;
+	else
+		return 0;
+}
+
+static void sort_reserve_entries(struct dt_info *dti)
+{
+	struct reserve_info *ri, **tbl;
+	int n = 0, i = 0;
+
+	for (ri = dti->reservelist;
+	     ri;
+	     ri = ri->next)
+		n++;
+
+	if (n == 0)
+		return;
+
+	tbl = xmalloc(n * sizeof(*tbl));
+
+	for (ri = dti->reservelist;
+	     ri;
+	     ri = ri->next)
+		tbl[i++] = ri;
+
+	qsort(tbl, n, sizeof(*tbl), cmp_reserve_info);
+
+	dti->reservelist = tbl[0];
+	for (i = 0; i < (n-1); i++)
+		tbl[i]->next = tbl[i+1];
+	tbl[n-1]->next = NULL;
+
+	free(tbl);
+}
+
+static int cmp_prop(const void *ax, const void *bx)
+{
+	const struct property *a, *b;
+
+	a = *((const struct property * const *)ax);
+	b = *((const struct property * const *)bx);
+
+	return strcmp(a->name, b->name);
+}
+
+static void sort_properties(struct node *node)
+{
+	int n = 0, i = 0;
+	struct property *prop, **tbl;
+
+	for_each_property_withdel(node, prop)
+		n++;
+
+	if (n == 0)
+		return;
+
+	tbl = xmalloc(n * sizeof(*tbl));
+
+	for_each_property_withdel(node, prop)
+		tbl[i++] = prop;
+
+	qsort(tbl, n, sizeof(*tbl), cmp_prop);
+
+	node->proplist = tbl[0];
+	for (i = 0; i < (n-1); i++)
+		tbl[i]->next = tbl[i+1];
+	tbl[n-1]->next = NULL;
+
+	free(tbl);
+}
+
+static int cmp_subnode(const void *ax, const void *bx)
+{
+	const struct node *a, *b;
+
+	a = *((const struct node * const *)ax);
+	b = *((const struct node * const *)bx);
+
+	return strcmp(a->name, b->name);
+}
+
+static void sort_subnodes(struct node *node)
+{
+	int n = 0, i = 0;
+	struct node *subnode, **tbl;
+
+	for_each_child_withdel(node, subnode)
+		n++;
+
+	if (n == 0)
+		return;
+
+	tbl = xmalloc(n * sizeof(*tbl));
+
+	for_each_child_withdel(node, subnode)
+		tbl[i++] = subnode;
+
+	qsort(tbl, n, sizeof(*tbl), cmp_subnode);
+
+	node->children = tbl[0];
+	for (i = 0; i < (n-1); i++)
+		tbl[i]->next_sibling = tbl[i+1];
+	tbl[n-1]->next_sibling = NULL;
+
+	free(tbl);
+}
+
+static void sort_node(struct node *node)
+{
+	struct node *c;
+
+	sort_properties(node);
+	sort_subnodes(node);
+	for_each_child_withdel(node, c)
+		sort_node(c);
+}
+
+void sort_tree(struct dt_info *dti)
+{
+	sort_reserve_entries(dti);
+	sort_node(dti->dt);
+}
+
+/* utility helper to avoid code duplication */
+static struct node *build_and_name_child_node(struct node *parent, char *name)
+{
+	struct node *node;
+
+	node = build_node(NULL, NULL);
+	name_node(node, xstrdup(name));
+	add_child(parent, node);
+
+	return node;
+}
+
+static struct node *build_root_node(struct node *dt, char *name)
+{
+	struct node *an;
+
+	an = get_subnode(dt, name);
+	if (!an)
+		an = build_and_name_child_node(dt, name);
+
+	if (!an)
+		die("Could not build root node /%s\n", name);
+
+	return an;
+}
+
+static bool any_label_tree(struct dt_info *dti, struct node *node)
+{
+	struct node *c;
+
+	if (node->labels)
+		return true;
+
+	for_each_child(node, c)
+		if (any_label_tree(dti, c))
+			return true;
+
+	return false;
+}
+
+static void generate_label_tree_internal(struct dt_info *dti,
+					 struct node *an, struct node *node,
+					 bool allocph)
+{
+	struct node *dt = dti->dt;
+	struct node *c;
+	struct property *p;
+	struct label *l;
+
+	/* if there are labels */
+	if (node->labels) {
+
+		/* now add the label in the node */
+		for_each_label(node->labels, l) {
+
+			/* check whether the label already exists */
+			p = get_property(an, l->label);
+			if (p) {
+				fprintf(stderr, "WARNING: label %s already"
+					" exists in /%s", l->label,
+					an->name);
+				continue;
+			}
+
+			/* insert it */
+			p = build_property(l->label,
+				data_copy_mem(node->fullpath,
+						strlen(node->fullpath) + 1));
+			add_property(an, p);
+		}
+
+		/* force allocation of a phandle for this node */
+		if (allocph)
+			(void)get_node_phandle(dt, node);
+	}
+
+	for_each_child(node, c)
+		generate_label_tree_internal(dti, an, c, allocph);
+}
+
+static bool any_fixup_tree(struct dt_info *dti, struct node *node)
+{
+	struct node *c;
+	struct property *prop;
+	struct marker *m;
+
+	for_each_property(node, prop) {
+		m = prop->val.markers;
+		for_each_marker_of_type(m, REF_PHANDLE) {
+			if (!get_node_by_ref(dti->dt, m->ref))
+				return true;
+		}
+	}
+
+	for_each_child(node, c) {
+		if (any_fixup_tree(dti, c))
+			return true;
+	}
+
+	return false;
+}
+
+static void add_fixup_entry(struct dt_info *dti, struct node *fn,
+			    struct node *node, struct property *prop,
+			    struct marker *m)
+{
+	char *entry;
+
+	/* m->ref can only be a REF_PHANDLE, but check anyway */
+	assert(m->type == REF_PHANDLE);
+
+	/* there shouldn't be any ':' in the arguments */
+	if (strchr(node->fullpath, ':') || strchr(prop->name, ':'))
+		die("arguments should not contain ':'\n");
+
+	xasprintf(&entry, "%s:%s:%u",
+			node->fullpath, prop->name, m->offset);
+	append_to_property(fn, m->ref, entry, strlen(entry) + 1);
+
+	free(entry);
+}
+
+static void generate_fixups_tree_internal(struct dt_info *dti,
+					  struct node *fn,
+					  struct node *node)
+{
+	struct node *dt = dti->dt;
+	struct node *c;
+	struct property *prop;
+	struct marker *m;
+	struct node *refnode;
+
+	for_each_property(node, prop) {
+		m = prop->val.markers;
+		for_each_marker_of_type(m, REF_PHANDLE) {
+			refnode = get_node_by_ref(dt, m->ref);
+			if (!refnode)
+				add_fixup_entry(dti, fn, node, prop, m);
+		}
+	}
+
+	for_each_child(node, c)
+		generate_fixups_tree_internal(dti, fn, c);
+}
+
+static bool any_local_fixup_tree(struct dt_info *dti, struct node *node)
+{
+	struct node *c;
+	struct property *prop;
+	struct marker *m;
+
+	for_each_property(node, prop) {
+		m = prop->val.markers;
+		for_each_marker_of_type(m, REF_PHANDLE) {
+			if (get_node_by_ref(dti->dt, m->ref))
+				return true;
+		}
+	}
+
+	for_each_child(node, c) {
+		if (any_local_fixup_tree(dti, c))
+			return true;
+	}
+
+	return false;
+}
+
+static void add_local_fixup_entry(struct dt_info *dti,
+		struct node *lfn, struct node *node,
+		struct property *prop, struct marker *m,
+		struct node *refnode)
+{
+	struct node *wn, *nwn;	/* local fixup node, walk node, new */
+	uint32_t value_32;
+	char **compp;
+	int i, depth;
+
+	/* walk back retreiving depth */
+	depth = 0;
+	for (wn = node; wn; wn = wn->parent)
+		depth++;
+
+	/* allocate name array */
+	compp = xmalloc(sizeof(*compp) * depth);
+
+	/* store names in the array */
+	for (wn = node, i = depth - 1; wn; wn = wn->parent, i--)
+		compp[i] = wn->name;
+
+	/* walk the path components creating nodes if they don't exist */
+	for (wn = lfn, i = 1; i < depth; i++, wn = nwn) {
+		/* if no node exists, create it */
+		nwn = get_subnode(wn, compp[i]);
+		if (!nwn)
+			nwn = build_and_name_child_node(wn, compp[i]);
+	}
+
+	free(compp);
+
+	value_32 = cpu_to_fdt32(m->offset);
+	append_to_property(wn, prop->name, &value_32, sizeof(value_32));
+}
+
+static void generate_local_fixups_tree_internal(struct dt_info *dti,
+						struct node *lfn,
+						struct node *node)
+{
+	struct node *dt = dti->dt;
+	struct node *c;
+	struct property *prop;
+	struct marker *m;
+	struct node *refnode;
+
+	for_each_property(node, prop) {
+		m = prop->val.markers;
+		for_each_marker_of_type(m, REF_PHANDLE) {
+			refnode = get_node_by_ref(dt, m->ref);
+			if (refnode)
+				add_local_fixup_entry(dti, lfn, node, prop, m, refnode);
+		}
+	}
+
+	for_each_child(node, c)
+		generate_local_fixups_tree_internal(dti, lfn, c);
+}
+
+void generate_label_tree(struct dt_info *dti, char *name, bool allocph)
+{
+	if (!any_label_tree(dti, dti->dt))
+		return;
+	generate_label_tree_internal(dti, build_root_node(dti->dt, name),
+				     dti->dt, allocph);
+}
+
+void generate_fixups_tree(struct dt_info *dti, char *name)
+{
+	if (!any_fixup_tree(dti, dti->dt))
+		return;
+	generate_fixups_tree_internal(dti, build_root_node(dti->dt, name),
+				      dti->dt);
+}
+
+void generate_local_fixups_tree(struct dt_info *dti, char *name)
+{
+	if (!any_local_fixup_tree(dti, dti->dt))
+		return;
+	generate_local_fixups_tree_internal(dti, build_root_node(dti->dt, name),
+					    dti->dt);
+}
diff --git a/scripts/dtc/srcpos.c b/scripts/dtc/srcpos.c
new file mode 100644
index 0000000000..9d38459902
--- /dev/null
+++ b/scripts/dtc/srcpos.c
@@ -0,0 +1,302 @@
+/*
+ * Copyright 2007 Jon Loeliger, Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ *  General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307
+ *                                                                   USA
+ */
+
+#define _GNU_SOURCE
+
+#include <stdio.h>
+
+#include "dtc.h"
+#include "srcpos.h"
+
+/* A node in our list of directories to search for source/include files */
+struct search_path {
+	struct search_path *next;	/* next node in list, NULL for end */
+	const char *dirname;		/* name of directory to search */
+};
+
+/* This is the list of directories that we search for source files */
+static struct search_path *search_path_head, **search_path_tail;
+
+
+static char *get_dirname(const char *path)
+{
+	const char *slash = strrchr(path, '/');
+
+	if (slash) {
+		int len = slash - path;
+		char *dir = xmalloc(len + 1);
+
+		memcpy(dir, path, len);
+		dir[len] = '\0';
+		return dir;
+	}
+	return NULL;
+}
+
+FILE *depfile; /* = NULL */
+struct srcfile_state *current_srcfile; /* = NULL */
+
+/* Detect infinite include recursion. */
+#define MAX_SRCFILE_DEPTH     (100)
+static int srcfile_depth; /* = 0 */
+
+
+/**
+ * Try to open a file in a given directory.
+ *
+ * If the filename is an absolute path, then dirname is ignored. If it is a
+ * relative path, then we look in that directory for the file.
+ *
+ * @param dirname	Directory to look in, or NULL for none
+ * @param fname		Filename to look for
+ * @param fp		Set to NULL if file did not open
+ * @return allocated filename on success (caller must free), NULL on failure
+ */
+static char *try_open(const char *dirname, const char *fname, FILE **fp)
+{
+	char *fullname;
+
+	if (!dirname || fname[0] == '/')
+		fullname = xstrdup(fname);
+	else
+		fullname = join_path(dirname, fname);
+
+	*fp = fopen(fullname, "rb");
+	if (!*fp) {
+		free(fullname);
+		fullname = NULL;
+	}
+
+	return fullname;
+}
+
+/**
+ * Open a file for read access
+ *
+ * If it is a relative filename, we search the full search path for it.
+ *
+ * @param fname	Filename to open
+ * @param fp	Returns pointer to opened FILE, or NULL on failure
+ * @return pointer to allocated filename, which caller must free
+ */
+static char *fopen_any_on_path(const char *fname, FILE **fp)
+{
+	const char *cur_dir = NULL;
+	struct search_path *node;
+	char *fullname;
+
+	/* Try current directory first */
+	assert(fp);
+	if (current_srcfile)
+		cur_dir = current_srcfile->dir;
+	fullname = try_open(cur_dir, fname, fp);
+
+	/* Failing that, try each search path in turn */
+	for (node = search_path_head; !*fp && node; node = node->next)
+		fullname = try_open(node->dirname, fname, fp);
+
+	return fullname;
+}
+
+FILE *srcfile_relative_open(const char *fname, char **fullnamep)
+{
+	FILE *f;
+	char *fullname;
+
+	if (streq(fname, "-")) {
+		f = stdin;
+		fullname = xstrdup("<stdin>");
+	} else {
+		fullname = fopen_any_on_path(fname, &f);
+		if (!f)
+			die("Couldn't open \"%s\": %s\n", fname,
+			    strerror(errno));
+	}
+
+	if (depfile)
+		fprintf(depfile, " %s", fullname);
+
+	if (fullnamep)
+		*fullnamep = fullname;
+	else
+		free(fullname);
+
+	return f;
+}
+
+void srcfile_push(const char *fname)
+{
+	struct srcfile_state *srcfile;
+
+	if (srcfile_depth++ >= MAX_SRCFILE_DEPTH)
+		die("Includes nested too deeply");
+
+	srcfile = xmalloc(sizeof(*srcfile));
+
+	srcfile->f = srcfile_relative_open(fname, &srcfile->name);
+	srcfile->dir = get_dirname(srcfile->name);
+	srcfile->prev = current_srcfile;
+
+	srcfile->lineno = 1;
+	srcfile->colno = 1;
+
+	current_srcfile = srcfile;
+}
+
+bool srcfile_pop(void)
+{
+	struct srcfile_state *srcfile = current_srcfile;
+
+	assert(srcfile);
+
+	current_srcfile = srcfile->prev;
+
+	if (fclose(srcfile->f))
+		die("Error closing \"%s\": %s\n", srcfile->name,
+		    strerror(errno));
+
+	/* FIXME: We allow the srcfile_state structure to leak,
+	 * because it could still be referenced from a location
+	 * variable being carried through the parser somewhere.  To
+	 * fix this we could either allocate all the files from a
+	 * table, or use a pool allocator. */
+
+	return current_srcfile ? true : false;
+}
+
+void srcfile_add_search_path(const char *dirname)
+{
+	struct search_path *node;
+
+	/* Create the node */
+	node = xmalloc(sizeof(*node));
+	node->next = NULL;
+	node->dirname = xstrdup(dirname);
+
+	/* Add to the end of our list */
+	if (search_path_tail)
+		*search_path_tail = node;
+	else
+		search_path_head = node;
+	search_path_tail = &node->next;
+}
+
+/*
+ * The empty source position.
+ */
+
+struct srcpos srcpos_empty = {
+	.first_line = 0,
+	.first_column = 0,
+	.last_line = 0,
+	.last_column = 0,
+	.file = NULL,
+};
+
+#define TAB_SIZE      8
+
+void srcpos_update(struct srcpos *pos, const char *text, int len)
+{
+	int i;
+
+	pos->file = current_srcfile;
+
+	pos->first_line = current_srcfile->lineno;
+	pos->first_column = current_srcfile->colno;
+
+	for (i = 0; i < len; i++)
+		if (text[i] == '\n') {
+			current_srcfile->lineno++;
+			current_srcfile->colno = 1;
+		} else if (text[i] == '\t') {
+			current_srcfile->colno =
+				ALIGN(current_srcfile->colno, TAB_SIZE);
+		} else {
+			current_srcfile->colno++;
+		}
+
+	pos->last_line = current_srcfile->lineno;
+	pos->last_column = current_srcfile->colno;
+}
+
+struct srcpos *
+srcpos_copy(struct srcpos *pos)
+{
+	struct srcpos *pos_new;
+
+	pos_new = xmalloc(sizeof(struct srcpos));
+	memcpy(pos_new, pos, sizeof(struct srcpos));
+
+	return pos_new;
+}
+
+char *
+srcpos_string(struct srcpos *pos)
+{
+	const char *fname = "<no-file>";
+	char *pos_str;
+
+	if (pos->file && pos->file->name)
+		fname = pos->file->name;
+
+
+	if (pos->first_line != pos->last_line)
+		xasprintf(&pos_str, "%s:%d.%d-%d.%d", fname,
+			  pos->first_line, pos->first_column,
+			  pos->last_line, pos->last_column);
+	else if (pos->first_column != pos->last_column)
+		xasprintf(&pos_str, "%s:%d.%d-%d", fname,
+			  pos->first_line, pos->first_column,
+			  pos->last_column);
+	else
+		xasprintf(&pos_str, "%s:%d.%d", fname,
+			  pos->first_line, pos->first_column);
+
+	return pos_str;
+}
+
+void srcpos_verror(struct srcpos *pos, const char *prefix,
+		   const char *fmt, va_list va)
+{
+	char *srcstr;
+
+	srcstr = srcpos_string(pos);
+
+	fprintf(stderr, "%s: %s ", prefix, srcstr);
+	vfprintf(stderr, fmt, va);
+	fprintf(stderr, "\n");
+
+	free(srcstr);
+}
+
+void srcpos_error(struct srcpos *pos, const char *prefix,
+		  const char *fmt, ...)
+{
+	va_list va;
+
+	va_start(va, fmt);
+	srcpos_verror(pos, prefix, fmt, va);
+	va_end(va);
+}
+
+void srcpos_set_line(char *f, int l)
+{
+	current_srcfile->name = f;
+	current_srcfile->lineno = l;
+}
diff --git a/scripts/dtc/srcpos.h b/scripts/dtc/srcpos.h
new file mode 100644
index 0000000000..2cdfcd82e9
--- /dev/null
+++ b/scripts/dtc/srcpos.h
@@ -0,0 +1,118 @@
+/*
+ * Copyright 2007 Jon Loeliger, Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ *  General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307
+ *                                                                   USA
+ */
+
+#ifndef _SRCPOS_H_
+#define _SRCPOS_H_
+
+#include <stdio.h>
+#include <stdbool.h>
+
+struct srcfile_state {
+	FILE *f;
+	char *name;
+	char *dir;
+	int lineno, colno;
+	struct srcfile_state *prev;
+};
+
+extern FILE *depfile; /* = NULL */
+extern struct srcfile_state *current_srcfile; /* = NULL */
+
+/**
+ * Open a source file.
+ *
+ * If the source file is a relative pathname, then it is searched for in the
+ * current directory (the directory of the last source file read) and after
+ * that in the search path.
+ *
+ * We work through the search path in order from the first path specified to
+ * the last.
+ *
+ * If the file is not found, then this function does not return, but calls
+ * die().
+ *
+ * @param fname		Filename to search
+ * @param fullnamep	If non-NULL, it is set to the allocated filename of the
+ *			file that was opened. The caller is then responsible
+ *			for freeing the pointer.
+ * @return pointer to opened FILE
+ */
+FILE *srcfile_relative_open(const char *fname, char **fullnamep);
+
+void srcfile_push(const char *fname);
+bool srcfile_pop(void);
+
+/**
+ * Add a new directory to the search path for input files
+ *
+ * The new path is added at the end of the list.
+ *
+ * @param dirname	Directory to add
+ */
+void srcfile_add_search_path(const char *dirname);
+
+struct srcpos {
+    int first_line;
+    int first_column;
+    int last_line;
+    int last_column;
+    struct srcfile_state *file;
+};
+
+#define YYLTYPE struct srcpos
+
+#define YYLLOC_DEFAULT(Current, Rhs, N)						\
+	do {									\
+		if (N) {							\
+			(Current).first_line = YYRHSLOC(Rhs, 1).first_line;	\
+			(Current).first_column = YYRHSLOC(Rhs, 1).first_column;	\
+			(Current).last_line = YYRHSLOC(Rhs, N).last_line;	\
+			(Current).last_column  = YYRHSLOC (Rhs, N).last_column;	\
+			(Current).file = YYRHSLOC(Rhs, N).file;			\
+		} else {							\
+			(Current).first_line = (Current).last_line =		\
+				YYRHSLOC(Rhs, 0).last_line;			\
+			(Current).first_column = (Current).last_column =	\
+				YYRHSLOC(Rhs, 0).last_column;			\
+			(Current).file = YYRHSLOC (Rhs, 0).file;		\
+		}								\
+	} while (0)
+
+
+/*
+ * Fictional source position used for IR nodes that are
+ * created without otherwise knowing a true source position.
+ * For example,constant definitions from the command line.
+ */
+extern struct srcpos srcpos_empty;
+
+extern void srcpos_update(struct srcpos *pos, const char *text, int len);
+extern struct srcpos *srcpos_copy(struct srcpos *pos);
+extern char *srcpos_string(struct srcpos *pos);
+
+extern void srcpos_verror(struct srcpos *pos, const char *prefix,
+			  const char *fmt, va_list va)
+	__attribute__((format(printf, 3, 0)));
+extern void srcpos_error(struct srcpos *pos, const char *prefix,
+			 const char *fmt, ...)
+	__attribute__((format(printf, 3, 4)));
+
+extern void srcpos_set_line(char *f, int l);
+
+#endif /* _SRCPOS_H_ */
diff --git a/scripts/dtc/treesource.c b/scripts/dtc/treesource.c
new file mode 100644
index 0000000000..c9d8967969
--- /dev/null
+++ b/scripts/dtc/treesource.c
@@ -0,0 +1,284 @@
+/*
+ * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation.  2005.
+ *
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ *  General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307
+ *                                                                   USA
+ */
+
+#include "dtc.h"
+#include "srcpos.h"
+
+extern FILE *yyin;
+extern int yyparse(void);
+extern YYLTYPE yylloc;
+
+struct dt_info *parser_output;
+bool treesource_error;
+
+struct dt_info *dt_from_source(const char *fname)
+{
+	parser_output = NULL;
+	treesource_error = false;
+
+	srcfile_push(fname);
+	yyin = current_srcfile->f;
+	yylloc.file = current_srcfile;
+
+	if (yyparse() != 0)
+		die("Unable to parse input tree\n");
+
+	if (treesource_error)
+		die("Syntax error parsing input tree\n");
+
+	return parser_output;
+}
+
+static void write_prefix(FILE *f, int level)
+{
+	int i;
+
+	for (i = 0; i < level; i++)
+		fputc('\t', f);
+}
+
+static bool isstring(char c)
+{
+	return (isprint((unsigned char)c)
+		|| (c == '\0')
+		|| strchr("\a\b\t\n\v\f\r", c));
+}
+
+static void write_propval_string(FILE *f, struct data val)
+{
+	const char *str = val.val;
+	int i;
+	struct marker *m = val.markers;
+
+	assert(str[val.len-1] == '\0');
+
+	while (m && (m->offset == 0)) {
+		if (m->type == LABEL)
+			fprintf(f, "%s: ", m->ref);
+		m = m->next;
+	}
+	fprintf(f, "\"");
+
+	for (i = 0; i < (val.len-1); i++) {
+		char c = str[i];
+
+		switch (c) {
+		case '\a':
+			fprintf(f, "\\a");
+			break;
+		case '\b':
+			fprintf(f, "\\b");
+			break;
+		case '\t':
+			fprintf(f, "\\t");
+			break;
+		case '\n':
+			fprintf(f, "\\n");
+			break;
+		case '\v':
+			fprintf(f, "\\v");
+			break;
+		case '\f':
+			fprintf(f, "\\f");
+			break;
+		case '\r':
+			fprintf(f, "\\r");
+			break;
+		case '\\':
+			fprintf(f, "\\\\");
+			break;
+		case '\"':
+			fprintf(f, "\\\"");
+			break;
+		case '\0':
+			fprintf(f, "\", ");
+			while (m && (m->offset <= (i + 1))) {
+				if (m->type == LABEL) {
+					assert(m->offset == (i+1));
+					fprintf(f, "%s: ", m->ref);
+				}
+				m = m->next;
+			}
+			fprintf(f, "\"");
+			break;
+		default:
+			if (isprint((unsigned char)c))
+				fprintf(f, "%c", c);
+			else
+				fprintf(f, "\\x%02hhx", c);
+		}
+	}
+	fprintf(f, "\"");
+
+	/* Wrap up any labels at the end of the value */
+	for_each_marker_of_type(m, LABEL) {
+		assert (m->offset == val.len);
+		fprintf(f, " %s:", m->ref);
+	}
+}
+
+static void write_propval_cells(FILE *f, struct data val)
+{
+	void *propend = val.val + val.len;
+	cell_t *cp = (cell_t *)val.val;
+	struct marker *m = val.markers;
+
+	fprintf(f, "<");
+	for (;;) {
+		while (m && (m->offset <= ((char *)cp - val.val))) {
+			if (m->type == LABEL) {
+				assert(m->offset == ((char *)cp - val.val));
+				fprintf(f, "%s: ", m->ref);
+			}
+			m = m->next;
+		}
+
+		fprintf(f, "0x%x", fdt32_to_cpu(*cp++));
+		if ((void *)cp >= propend)
+			break;
+		fprintf(f, " ");
+	}
+
+	/* Wrap up any labels at the end of the value */
+	for_each_marker_of_type(m, LABEL) {
+		assert (m->offset == val.len);
+		fprintf(f, " %s:", m->ref);
+	}
+	fprintf(f, ">");
+}
+
+static void write_propval_bytes(FILE *f, struct data val)
+{
+	void *propend = val.val + val.len;
+	const char *bp = val.val;
+	struct marker *m = val.markers;
+
+	fprintf(f, "[");
+	for (;;) {
+		while (m && (m->offset == (bp-val.val))) {
+			if (m->type == LABEL)
+				fprintf(f, "%s: ", m->ref);
+			m = m->next;
+		}
+
+		fprintf(f, "%02hhx", (unsigned char)(*bp++));
+		if ((const void *)bp >= propend)
+			break;
+		fprintf(f, " ");
+	}
+
+	/* Wrap up any labels at the end of the value */
+	for_each_marker_of_type(m, LABEL) {
+		assert (m->offset == val.len);
+		fprintf(f, " %s:", m->ref);
+	}
+	fprintf(f, "]");
+}
+
+static void write_propval(FILE *f, struct property *prop)
+{
+	int len = prop->val.len;
+	const char *p = prop->val.val;
+	struct marker *m = prop->val.markers;
+	int nnotstring = 0, nnul = 0;
+	int nnotstringlbl = 0, nnotcelllbl = 0;
+	int i;
+
+	if (len == 0) {
+		fprintf(f, ";\n");
+		return;
+	}
+
+	for (i = 0; i < len; i++) {
+		if (! isstring(p[i]))
+			nnotstring++;
+		if (p[i] == '\0')
+			nnul++;
+	}
+
+	for_each_marker_of_type(m, LABEL) {
+		if ((m->offset > 0) && (prop->val.val[m->offset - 1] != '\0'))
+			nnotstringlbl++;
+		if ((m->offset % sizeof(cell_t)) != 0)
+			nnotcelllbl++;
+	}
+
+	fprintf(f, " = ");
+	if ((p[len-1] == '\0') && (nnotstring == 0) && (nnul < (len-nnul))
+	    && (nnotstringlbl == 0)) {
+		write_propval_string(f, prop->val);
+	} else if (((len % sizeof(cell_t)) == 0) && (nnotcelllbl == 0)) {
+		write_propval_cells(f, prop->val);
+	} else {
+		write_propval_bytes(f, prop->val);
+	}
+
+	fprintf(f, ";\n");
+}
+
+static void write_tree_source_node(FILE *f, struct node *tree, int level)
+{
+	struct property *prop;
+	struct node *child;
+	struct label *l;
+
+	write_prefix(f, level);
+	for_each_label(tree->labels, l)
+		fprintf(f, "%s: ", l->label);
+	if (tree->name && (*tree->name))
+		fprintf(f, "%s {\n", tree->name);
+	else
+		fprintf(f, "/ {\n");
+
+	for_each_property(tree, prop) {
+		write_prefix(f, level+1);
+		for_each_label(prop->labels, l)
+			fprintf(f, "%s: ", l->label);
+		fprintf(f, "%s", prop->name);
+		write_propval(f, prop);
+	}
+	for_each_child(tree, child) {
+		fprintf(f, "\n");
+		write_tree_source_node(f, child, level+1);
+	}
+	write_prefix(f, level);
+	fprintf(f, "};\n");
+}
+
+
+void dt_to_source(FILE *f, struct dt_info *dti)
+{
+	struct reserve_info *re;
+
+	fprintf(f, "/dts-v1/;\n\n");
+
+	for (re = dti->reservelist; re; re = re->next) {
+		struct label *l;
+
+		for_each_label(re->labels, l)
+			fprintf(f, "%s: ", l->label);
+		fprintf(f, "/memreserve/\t0x%016llx 0x%016llx;\n",
+			(unsigned long long)re->re.address,
+			(unsigned long long)re->re.size);
+	}
+
+	write_tree_source_node(f, dti->dt, 0);
+}
+
diff --git a/scripts/dtc/update-dtc-source.sh b/scripts/dtc/update-dtc-source.sh
new file mode 100755
index 0000000000..b8ebcc6722
--- /dev/null
+++ b/scripts/dtc/update-dtc-source.sh
@@ -0,0 +1,81 @@
+#!/bin/sh
+# Simple script to update the version of DTC carried by the Linux kernel
+#
+# This script assumes that the dtc and the linux git trees are in the
+# same directory. After building dtc in the dtc directory, it copies the
+# source files and generated source files into the scripts/dtc directory
+# in the kernel and creates a git commit updating them to the new
+# version.
+#
+# Usage: from the top level Linux source tree, run:
+# $ ./scripts/dtc/update-dtc-source.sh
+#
+# The script will change into the dtc tree, build and test dtc, copy the
+# relevant files into the kernel tree and create a git commit. The commit
+# message will need to be modified to reflect the version of DTC being
+# imported
+#
+# TODO:
+# This script is pretty basic, but it is seldom used so a few manual tasks
+# aren't a big deal. If anyone is interested in making it more robust, the
+# the following would be nice:
+# * Actually fail to complete if any testcase fails.
+#   - The dtc "make check" target needs to return a failure
+# * Extract the version number from the dtc repo for the commit message
+# * Build dtc in the kernel tree
+# * run 'make check" on dtc built from the kernel tree
+
+set -ev
+
+DTC_UPSTREAM_PATH=`pwd`/../dtc
+DTC_LINUX_PATH=`pwd`/scripts/dtc
+
+DTC_SOURCE="checks.c data.c dtc.c dtc.h flattree.c fstree.c livetree.c srcpos.c \
+		srcpos.h treesource.c util.c util.h version_gen.h Makefile.dtc \
+		dtc-lexer.l dtc-parser.y"
+DTC_GENERATED="dtc-lexer.lex.c dtc-parser.tab.c dtc-parser.tab.h"
+LIBFDT_SOURCE="Makefile.libfdt fdt.c fdt.h fdt_empty_tree.c fdt_ro.c fdt_rw.c fdt_strerror.c fdt_sw.c fdt_wip.c libfdt.h libfdt_env.h libfdt_internal.h"
+
+get_last_dtc_version() {
+	git log --oneline scripts/dtc/ | grep 'upstream' | head -1 | sed -e 's/^.* \(.*\)/\1/'
+}
+
+last_dtc_ver=$(get_last_dtc_version)
+
+# Build DTC
+cd $DTC_UPSTREAM_PATH
+make clean
+make check
+dtc_version=$(git describe HEAD)
+dtc_log=$(git log --oneline ${last_dtc_ver}..)
+
+
+# Copy the files into the Linux tree
+cd $DTC_LINUX_PATH
+for f in $DTC_SOURCE; do
+	cp ${DTC_UPSTREAM_PATH}/${f} ${f}
+	git add ${f}
+done
+for f in $DTC_GENERATED; do
+	cp ${DTC_UPSTREAM_PATH}/$f ${f}_shipped
+	git add ${f}_shipped
+done
+for f in $LIBFDT_SOURCE; do
+       cp ${DTC_UPSTREAM_PATH}/libfdt/${f} libfdt/${f}
+       git add libfdt/${f}
+done
+
+sed -i -- 's/#include <libfdt_env.h>/#include "libfdt_env.h"/g' ./libfdt/libfdt.h
+sed -i -- 's/#include <fdt.h>/#include "fdt.h"/g' ./libfdt/libfdt.h
+git add ./libfdt/libfdt.h
+
+commit_msg=$(cat << EOF
+scripts/dtc: Update to upstream version ${dtc_version}
+
+This adds the following commits from upstream:
+
+${dtc_log}
+EOF
+)
+
+git commit -e -v -s -m "${commit_msg}"
diff --git a/scripts/dtc/util.c b/scripts/dtc/util.c
new file mode 100644
index 0000000000..3550f86bd6
--- /dev/null
+++ b/scripts/dtc/util.c
@@ -0,0 +1,473 @@
+/*
+ * Copyright 2011 The Chromium Authors, All Rights Reserved.
+ * Copyright 2008 Jon Loeliger, Freescale Semiconductor, Inc.
+ *
+ * util_is_printable_string contributed by
+ *	Pantelis Antoniou <pantelis.antoniou AT gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ *  General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307
+ *                                                                   USA
+ */
+
+#include <ctype.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdarg.h>
+#include <string.h>
+#include <assert.h>
+
+#include <errno.h>
+#include <fcntl.h>
+#include <unistd.h>
+
+#include "libfdt.h"
+#include "util.h"
+#include "version_gen.h"
+
+char *xstrdup(const char *s)
+{
+	int len = strlen(s) + 1;
+	char *d = xmalloc(len);
+
+	memcpy(d, s, len);
+
+	return d;
+}
+
+/* based in part from (3) vsnprintf */
+int xasprintf(char **strp, const char *fmt, ...)
+{
+	int n, size = 128;	/* start with 128 bytes */
+	char *p;
+	va_list ap;
+
+	/* initial pointer is NULL making the fist realloc to be malloc */
+	p = NULL;
+	while (1) {
+		p = xrealloc(p, size);
+
+		/* Try to print in the allocated space. */
+		va_start(ap, fmt);
+		n = vsnprintf(p, size, fmt, ap);
+		va_end(ap);
+
+		/* If that worked, return the string. */
+		if (n > -1 && n < size)
+			break;
+		/* Else try again with more space. */
+		if (n > -1)	/* glibc 2.1 */
+			size = n + 1; /* precisely what is needed */
+		else		/* glibc 2.0 */
+			size *= 2; /* twice the old size */
+	}
+	*strp = p;
+	return strlen(p);
+}
+
+char *join_path(const char *path, const char *name)
+{
+	int lenp = strlen(path);
+	int lenn = strlen(name);
+	int len;
+	int needslash = 1;
+	char *str;
+
+	len = lenp + lenn + 2;
+	if ((lenp > 0) && (path[lenp-1] == '/')) {
+		needslash = 0;
+		len--;
+	}
+
+	str = xmalloc(len);
+	memcpy(str, path, lenp);
+	if (needslash) {
+		str[lenp] = '/';
+		lenp++;
+	}
+	memcpy(str+lenp, name, lenn+1);
+	return str;
+}
+
+bool util_is_printable_string(const void *data, int len)
+{
+	const char *s = data;
+	const char *ss, *se;
+
+	/* zero length is not */
+	if (len == 0)
+		return 0;
+
+	/* must terminate with zero */
+	if (s[len - 1] != '\0')
+		return 0;
+
+	se = s + len;
+
+	while (s < se) {
+		ss = s;
+		while (s < se && *s && isprint((unsigned char)*s))
+			s++;
+
+		/* not zero, or not done yet */
+		if (*s != '\0' || s == ss)
+			return 0;
+
+		s++;
+	}
+
+	return 1;
+}
+
+/*
+ * Parse a octal encoded character starting at index i in string s.  The
+ * resulting character will be returned and the index i will be updated to
+ * point at the character directly after the end of the encoding, this may be
+ * the '\0' terminator of the string.
+ */
+static char get_oct_char(const char *s, int *i)
+{
+	char x[4];
+	char *endx;
+	long val;
+
+	x[3] = '\0';
+	strncpy(x, s + *i, 3);
+
+	val = strtol(x, &endx, 8);
+
+	assert(endx > x);
+
+	(*i) += endx - x;
+	return val;
+}
+
+/*
+ * Parse a hexadecimal encoded character starting at index i in string s.  The
+ * resulting character will be returned and the index i will be updated to
+ * point at the character directly after the end of the encoding, this may be
+ * the '\0' terminator of the string.
+ */
+static char get_hex_char(const char *s, int *i)
+{
+	char x[3];
+	char *endx;
+	long val;
+
+	x[2] = '\0';
+	strncpy(x, s + *i, 2);
+
+	val = strtol(x, &endx, 16);
+	if (!(endx  > x))
+		die("\\x used with no following hex digits\n");
+
+	(*i) += endx - x;
+	return val;
+}
+
+char get_escape_char(const char *s, int *i)
+{
+	char	c = s[*i];
+	int	j = *i + 1;
+	char	val;
+
+	switch (c) {
+	case 'a':
+		val = '\a';
+		break;
+	case 'b':
+		val = '\b';
+		break;
+	case 't':
+		val = '\t';
+		break;
+	case 'n':
+		val = '\n';
+		break;
+	case 'v':
+		val = '\v';
+		break;
+	case 'f':
+		val = '\f';
+		break;
+	case 'r':
+		val = '\r';
+		break;
+	case '0':
+	case '1':
+	case '2':
+	case '3':
+	case '4':
+	case '5':
+	case '6':
+	case '7':
+		j--; /* need to re-read the first digit as
+		      * part of the octal value */
+		val = get_oct_char(s, &j);
+		break;
+	case 'x':
+		val = get_hex_char(s, &j);
+		break;
+	default:
+		val = c;
+	}
+
+	(*i) = j;
+	return val;
+}
+
+int utilfdt_read_err_len(const char *filename, char **buffp, off_t *len)
+{
+	int fd = 0;	/* assume stdin */
+	char *buf = NULL;
+	off_t bufsize = 1024, offset = 0;
+	int ret = 0;
+
+	*buffp = NULL;
+	if (strcmp(filename, "-") != 0) {
+		fd = open(filename, O_RDONLY);
+		if (fd < 0)
+			return errno;
+	}
+
+	/* Loop until we have read everything */
+	buf = xmalloc(bufsize);
+	do {
+		/* Expand the buffer to hold the next chunk */
+		if (offset == bufsize) {
+			bufsize *= 2;
+			buf = xrealloc(buf, bufsize);
+		}
+
+		ret = read(fd, &buf[offset], bufsize - offset);
+		if (ret < 0) {
+			ret = errno;
+			break;
+		}
+		offset += ret;
+	} while (ret != 0);
+
+	/* Clean up, including closing stdin; return errno on error */
+	close(fd);
+	if (ret)
+		free(buf);
+	else
+		*buffp = buf;
+	*len = bufsize;
+	return ret;
+}
+
+int utilfdt_read_err(const char *filename, char **buffp)
+{
+	off_t len;
+	return utilfdt_read_err_len(filename, buffp, &len);
+}
+
+char *utilfdt_read_len(const char *filename, off_t *len)
+{
+	char *buff;
+	int ret = utilfdt_read_err_len(filename, &buff, len);
+
+	if (ret) {
+		fprintf(stderr, "Couldn't open blob from '%s': %s\n", filename,
+			strerror(ret));
+		return NULL;
+	}
+	/* Successful read */
+	return buff;
+}
+
+char *utilfdt_read(const char *filename)
+{
+	off_t len;
+	return utilfdt_read_len(filename, &len);
+}
+
+int utilfdt_write_err(const char *filename, const void *blob)
+{
+	int fd = 1;	/* assume stdout */
+	int totalsize;
+	int offset;
+	int ret = 0;
+	const char *ptr = blob;
+
+	if (strcmp(filename, "-") != 0) {
+		fd = open(filename, O_WRONLY | O_CREAT | O_TRUNC, 0666);
+		if (fd < 0)
+			return errno;
+	}
+
+	totalsize = fdt_totalsize(blob);
+	offset = 0;
+
+	while (offset < totalsize) {
+		ret = write(fd, ptr + offset, totalsize - offset);
+		if (ret < 0) {
+			ret = -errno;
+			break;
+		}
+		offset += ret;
+	}
+	/* Close the file/stdin; return errno on error */
+	if (fd != 1)
+		close(fd);
+	return ret < 0 ? -ret : 0;
+}
+
+
+int utilfdt_write(const char *filename, const void *blob)
+{
+	int ret = utilfdt_write_err(filename, blob);
+
+	if (ret) {
+		fprintf(stderr, "Couldn't write blob to '%s': %s\n", filename,
+			strerror(ret));
+	}
+	return ret ? -1 : 0;
+}
+
+int utilfdt_decode_type(const char *fmt, int *type, int *size)
+{
+	int qualifier = 0;
+
+	if (!*fmt)
+		return -1;
+
+	/* get the conversion qualifier */
+	*size = -1;
+	if (strchr("hlLb", *fmt)) {
+		qualifier = *fmt++;
+		if (qualifier == *fmt) {
+			switch (*fmt++) {
+/* TODO:		case 'l': qualifier = 'L'; break;*/
+			case 'h':
+				qualifier = 'b';
+				break;
+			}
+		}
+	}
+
+	/* we should now have a type */
+	if ((*fmt == '\0') || !strchr("iuxs", *fmt))
+		return -1;
+
+	/* convert qualifier (bhL) to byte size */
+	if (*fmt != 's')
+		*size = qualifier == 'b' ? 1 :
+				qualifier == 'h' ? 2 :
+				qualifier == 'l' ? 4 : -1;
+	*type = *fmt++;
+
+	/* that should be it! */
+	if (*fmt)
+		return -1;
+	return 0;
+}
+
+void utilfdt_print_data(const char *data, int len)
+{
+	int i;
+	const char *s;
+
+	/* no data, don't print */
+	if (len == 0)
+		return;
+
+	if (util_is_printable_string(data, len)) {
+		printf(" = ");
+
+		s = data;
+		do {
+			printf("\"%s\"", s);
+			s += strlen(s) + 1;
+			if (s < data + len)
+				printf(", ");
+		} while (s < data + len);
+
+	} else if ((len % 4) == 0) {
+		const uint32_t *cell = (const uint32_t *)data;
+
+		printf(" = <");
+		for (i = 0, len /= 4; i < len; i++)
+			printf("0x%08x%s", fdt32_to_cpu(cell[i]),
+			       i < (len - 1) ? " " : "");
+		printf(">");
+	} else {
+		const unsigned char *p = (const unsigned char *)data;
+		printf(" = [");
+		for (i = 0; i < len; i++)
+			printf("%02x%s", *p++, i < len - 1 ? " " : "");
+		printf("]");
+	}
+}
+
+void util_version(void)
+{
+	printf("Version: %s\n", DTC_VERSION);
+	exit(0);
+}
+
+void util_usage(const char *errmsg, const char *synopsis,
+		const char *short_opts, struct option const long_opts[],
+		const char * const opts_help[])
+{
+	FILE *fp = errmsg ? stderr : stdout;
+	const char a_arg[] = "<arg>";
+	size_t a_arg_len = strlen(a_arg) + 1;
+	size_t i;
+	int optlen;
+
+	fprintf(fp,
+		"Usage: %s\n"
+		"\n"
+		"Options: -[%s]\n", synopsis, short_opts);
+
+	/* prescan the --long opt length to auto-align */
+	optlen = 0;
+	for (i = 0; long_opts[i].name; ++i) {
+		/* +1 is for space between --opt and help text */
+		int l = strlen(long_opts[i].name) + 1;
+		if (long_opts[i].has_arg == a_argument)
+			l += a_arg_len;
+		if (optlen < l)
+			optlen = l;
+	}
+
+	for (i = 0; long_opts[i].name; ++i) {
+		/* helps when adding new applets or options */
+		assert(opts_help[i] != NULL);
+
+		/* first output the short flag if it has one */
+		if (long_opts[i].val > '~')
+			fprintf(fp, "      ");
+		else
+			fprintf(fp, "  -%c, ", long_opts[i].val);
+
+		/* then the long flag */
+		if (long_opts[i].has_arg == no_argument)
+			fprintf(fp, "--%-*s", optlen, long_opts[i].name);
+		else
+			fprintf(fp, "--%s %s%*s", long_opts[i].name, a_arg,
+				(int)(optlen - strlen(long_opts[i].name) - a_arg_len), "");
+
+		/* finally the help text */
+		fprintf(fp, "%s\n", opts_help[i]);
+	}
+
+	if (errmsg) {
+		fprintf(fp, "\nError: %s\n", errmsg);
+		exit(EXIT_FAILURE);
+	} else
+		exit(EXIT_SUCCESS);
+}
diff --git a/scripts/dtc/util.h b/scripts/dtc/util.h
new file mode 100644
index 0000000000..bc3d223fa6
--- /dev/null
+++ b/scripts/dtc/util.h
@@ -0,0 +1,265 @@
+#ifndef _UTIL_H
+#define _UTIL_H
+
+#include <stdarg.h>
+#include <stdbool.h>
+#include <getopt.h>
+
+/*
+ * Copyright 2011 The Chromium Authors, All Rights Reserved.
+ * Copyright 2008 Jon Loeliger, Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ *  General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307
+ *                                                                   USA
+ */
+
+#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
+
+#ifdef __GNUC__
+static inline void
+__attribute__((noreturn)) __attribute__((format (printf, 1, 2)))
+die(const char *str, ...)
+#else
+static inline void die(const char *str, ...)
+#endif
+{
+	va_list ap;
+
+	va_start(ap, str);
+	fprintf(stderr, "FATAL ERROR: ");
+	vfprintf(stderr, str, ap);
+	va_end(ap);
+	exit(1);
+}
+
+static inline void *xmalloc(size_t len)
+{
+	void *new = malloc(len);
+
+	if (!new)
+		die("malloc() failed\n");
+
+	return new;
+}
+
+static inline void *xrealloc(void *p, size_t len)
+{
+	void *new = realloc(p, len);
+
+	if (!new)
+		die("realloc() failed (len=%zd)\n", len);
+
+	return new;
+}
+
+extern char *xstrdup(const char *s);
+
+#ifdef __GNUC__
+extern int __attribute__((format (printf, 2, 3)))
+xasprintf(char **strp, const char *fmt, ...);
+#else
+extern int xasprintf(char **strp, const char *fmt, ...);
+#endif
+extern char *join_path(const char *path, const char *name);
+
+/**
+ * Check a property of a given length to see if it is all printable and
+ * has a valid terminator. The property can contain either a single string,
+ * or multiple strings each of non-zero length.
+ *
+ * @param data	The string to check
+ * @param len	The string length including terminator
+ * @return 1 if a valid printable string, 0 if not
+ */
+bool util_is_printable_string(const void *data, int len);
+
+/*
+ * Parse an escaped character starting at index i in string s.  The resulting
+ * character will be returned and the index i will be updated to point at the
+ * character directly after the end of the encoding, this may be the '\0'
+ * terminator of the string.
+ */
+char get_escape_char(const char *s, int *i);
+
+/**
+ * Read a device tree file into a buffer. This will report any errors on
+ * stderr.
+ *
+ * @param filename	The filename to read, or - for stdin
+ * @return Pointer to allocated buffer containing fdt, or NULL on error
+ */
+char *utilfdt_read(const char *filename);
+
+/**
+ * Like utilfdt_read(), but also passes back the size of the file read.
+ *
+ * @param len		If non-NULL, the amount of data we managed to read
+ */
+char *utilfdt_read_len(const char *filename, off_t *len);
+
+/**
+ * Read a device tree file into a buffer. Does not report errors, but only
+ * returns them. The value returned can be passed to strerror() to obtain
+ * an error message for the user.
+ *
+ * @param filename	The filename to read, or - for stdin
+ * @param buffp		Returns pointer to buffer containing fdt
+ * @return 0 if ok, else an errno value representing the error
+ */
+int utilfdt_read_err(const char *filename, char **buffp);
+
+/**
+ * Like utilfdt_read_err(), but also passes back the size of the file read.
+ *
+ * @param len		If non-NULL, the amount of data we managed to read
+ */
+int utilfdt_read_err_len(const char *filename, char **buffp, off_t *len);
+
+/**
+ * Write a device tree buffer to a file. This will report any errors on
+ * stderr.
+ *
+ * @param filename	The filename to write, or - for stdout
+ * @param blob		Poiner to buffer containing fdt
+ * @return 0 if ok, -1 on error
+ */
+int utilfdt_write(const char *filename, const void *blob);
+
+/**
+ * Write a device tree buffer to a file. Does not report errors, but only
+ * returns them. The value returned can be passed to strerror() to obtain
+ * an error message for the user.
+ *
+ * @param filename	The filename to write, or - for stdout
+ * @param blob		Poiner to buffer containing fdt
+ * @return 0 if ok, else an errno value representing the error
+ */
+int utilfdt_write_err(const char *filename, const void *blob);
+
+/**
+ * Decode a data type string. The purpose of this string
+ *
+ * The string consists of an optional character followed by the type:
+ *	Modifier characters:
+ *		hh or b	1 byte
+ *		h	2 byte
+ *		l	4 byte, default
+ *
+ *	Type character:
+ *		s	string
+ *		i	signed integer
+ *		u	unsigned integer
+ *		x	hex
+ *
+ * TODO: Implement ll modifier (8 bytes)
+ * TODO: Implement o type (octal)
+ *
+ * @param fmt		Format string to process
+ * @param type		Returns type found(s/d/u/x), or 0 if none
+ * @param size		Returns size found(1,2,4,8) or 4 if none
+ * @return 0 if ok, -1 on error (no type given, or other invalid format)
+ */
+int utilfdt_decode_type(const char *fmt, int *type, int *size);
+
+/*
+ * This is a usage message fragment for the -t option. It is the format
+ * supported by utilfdt_decode_type.
+ */
+
+#define USAGE_TYPE_MSG \
+	"<type>\ts=string, i=int, u=unsigned, x=hex\n" \
+	"\tOptional modifier prefix:\n" \
+	"\t\thh or b=byte, h=2 byte, l=4 byte (default)";
+
+/**
+ * Print property data in a readable format to stdout
+ *
+ * Properties that look like strings will be printed as strings. Otherwise
+ * the data will be displayed either as cells (if len is a multiple of 4
+ * bytes) or bytes.
+ *
+ * If len is 0 then this function does nothing.
+ *
+ * @param data	Pointers to property data
+ * @param len	Length of property data
+ */
+void utilfdt_print_data(const char *data, int len);
+
+/**
+ * Show source version and exit
+ */
+void util_version(void) __attribute__((noreturn));
+
+/**
+ * Show usage and exit
+ *
+ * This helps standardize the output of various utils.  You most likely want
+ * to use the usage() helper below rather than call this.
+ *
+ * @param errmsg	If non-NULL, an error message to display
+ * @param synopsis	The initial example usage text (and possible examples)
+ * @param short_opts	The string of short options
+ * @param long_opts	The structure of long options
+ * @param opts_help	An array of help strings (should align with long_opts)
+ */
+void util_usage(const char *errmsg, const char *synopsis,
+		const char *short_opts, struct option const long_opts[],
+		const char * const opts_help[]) __attribute__((noreturn));
+
+/**
+ * Show usage and exit
+ *
+ * If you name all your usage variables with usage_xxx, then you can call this
+ * help macro rather than expanding all arguments yourself.
+ *
+ * @param errmsg	If non-NULL, an error message to display
+ */
+#define usage(errmsg) \
+	util_usage(errmsg, usage_synopsis, usage_short_opts, \
+		   usage_long_opts, usage_opts_help)
+
+/**
+ * Call getopt_long() with standard options
+ *
+ * Since all util code runs getopt in the same way, provide a helper.
+ */
+#define util_getopt_long() getopt_long(argc, argv, usage_short_opts, \
+				       usage_long_opts, NULL)
+
+/* Helper for aligning long_opts array */
+#define a_argument required_argument
+
+/* Helper for usage_short_opts string constant */
+#define USAGE_COMMON_SHORT_OPTS "hV"
+
+/* Helper for usage_long_opts option array */
+#define USAGE_COMMON_LONG_OPTS \
+	{"help",      no_argument, NULL, 'h'}, \
+	{"version",   no_argument, NULL, 'V'}, \
+	{NULL,        no_argument, NULL, 0x0}
+
+/* Helper for usage_opts_help array */
+#define USAGE_COMMON_OPTS_HELP \
+	"Print this help and exit", \
+	"Print version and exit", \
+	NULL
+
+/* Helper for getopt case statements */
+#define case_USAGE_COMMON_FLAGS \
+	case 'h': usage(NULL); \
+	case 'V': util_version(); \
+	case '?': usage("unknown option");
+
+#endif /* _UTIL_H */
diff --git a/scripts/dtc/version_gen.h b/scripts/dtc/version_gen.h
new file mode 100644
index 0000000000..bbbd96b1dc
--- /dev/null
+++ b/scripts/dtc/version_gen.h
@@ -0,0 +1 @@
+#define DTC_VERSION "DTC 1.4.3"

commit 57a9c70605aac036ed60a8b4801c895ad335f163
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Thu Sep 21 17:03:09 2017 +0200

    UPSTREAM: dm: core: Add functions to get strings and the string count from a stringlist
    
    dev_read_string_count() is used to get the number of strings in a
    stringlist.
    dev_read_string_index() is used to get a string in the stringlist based on
    its position in the list.
    
    Change-Id: I0e144e7c2048030a9b43ca6153225f6267d58c89
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit b5a144a5014be5e3b065e2061a7d17e653d739ae)

diff --git a/drivers/core/read.c b/drivers/core/read.c
index 065589a6ab..eacf1716fd 100644
--- a/drivers/core/read.c
+++ b/drivers/core/read.c
@@ -81,6 +81,17 @@ int dev_read_stringlist_search(struct udevice *dev, const char *property,
 	return ofnode_stringlist_search(dev_ofnode(dev), property, string);
 }
 
+int dev_read_string_index(struct udevice *dev, const char *propname, int index,
+			  const char **outp)
+{
+	return ofnode_read_string_index(dev_ofnode(dev), propname, index, outp);
+}
+
+int dev_read_string_count(struct udevice *dev, const char *propname)
+{
+	return ofnode_read_string_count(dev_ofnode(dev), propname);
+}
+
 int dev_read_phandle_with_args(struct udevice *dev, const char *list_name,
 				const char *cells_name, int cell_count,
 				int index,
diff --git a/include/dm/read.h b/include/dm/read.h
index e7f71256a8..8114037e97 100644
--- a/include/dm/read.h
+++ b/include/dm/read.h
@@ -165,6 +165,29 @@ const char *dev_read_name(struct udevice *dev);
 int dev_read_stringlist_search(struct udevice *dev, const char *property,
 			  const char *string);
 
+/**
+ * dev_read_string_index() - obtain an indexed string from a string list
+ *
+ * @dev: device to examine
+ * @propname: name of the property containing the string list
+ * @index: index of the string to return
+ * @out: return location for the string
+ *
+ * @return:
+ *   length of string, if found or -ve error value if not found
+ */
+int dev_read_string_index(struct udevice *dev, const char *propname, int index,
+			  const char **outp);
+
+/**
+ * dev_read_string_count() - find the number of strings in a string list
+ *
+ * @dev: device to examine
+ * @propname: name of the property containing the string list
+ * @return:
+ *   number of strings in the list, or -ve error value if not found
+ */
+int dev_read_string_count(struct udevice *dev, const char *propname);
 /**
  * dev_read_phandle_with_args() - Find a node pointed by phandle in a list
  *
@@ -451,6 +474,19 @@ static inline int dev_read_stringlist_search(struct udevice *dev,
 	return ofnode_stringlist_search(dev_ofnode(dev), propname, string);
 }
 
+static inline int dev_read_string_index(struct udevice *dev,
+					const char *propname, int index,
+					const char **outp)
+{
+	return ofnode_read_string_index(dev_ofnode(dev), propname, index, outp);
+}
+
+static inline int dev_read_string_count(struct udevice *dev,
+					const char *propname)
+{
+	return ofnode_read_string_count(dev_ofnode(dev), propname);
+}
+
 static inline int dev_read_phandle_with_args(struct udevice *dev,
 		const char *list_name, const char *cells_name, int cell_count,
 		int index, struct ofnode_phandle_args *out_args)

commit d464d465d14207ab5a8a7769283dc97d734edd86
Author: Tom Rini <trini@konsulko.com>
Date:   Sun Sep 17 09:42:25 2017 -0400

    UPSTREAM: Travis-CI: Checkout only v1.4.3 of dtc
    
    Our minimum DTC version is 1.4.3, so check that out.
    
    Change-Id: I50fd989f2aea757159aa1ad2b1e9ececb6b06886
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 91ebf300934461e450f5ef8f386ea9e55d2636c5)

diff --git a/.travis.yml b/.travis.yml
index b81d733695..9dfd016da0 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -29,7 +29,7 @@ addons:
 
 install:
  # install latest device tree compiler
- - git clone --depth=1 git://git.kernel.org/pub/scm/utils/dtc/dtc.git /tmp/dtc
+ - git clone --depth=1 -b v1.4.3 git://git.kernel.org/pub/scm/utils/dtc/dtc.git /tmp/dtc
  - make -j4 -C /tmp/dtc
  # Clone uboot-test-hooks
  - git clone --depth=1 git://github.com/swarren/uboot-test-hooks.git /tmp/uboot-test-hooks

commit 65dc5c3a2eebd297d6779add4a6eea3b9cda9d37
Author: Tom Rini <trini@konsulko.com>
Date:   Thu Sep 14 11:29:33 2017 -0400

    UPSTREAM: Travis-CI: Switch back to using the top of tree dtc
    
    In a0f3e3df4adc we switched to using the Ubuntu-provided dtc as travis
    was having a problem with the number of warnings that were generated by
    the newer dtc.  This is no longer a concern as we now have the same
    logic as Linux to enable/disable additional more stringent warnings.  Go
    back to building dtc from source.
    
    Change-Id: I5d7db0a0c2c797430818dcac3d0933cc5451f378
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Tested on travis-ci:
    Tested-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit ae1c0a38c8b163d685121e3109161da7ac1caacd)

diff --git a/.travis.yml b/.travis.yml
index 4b7f8dd8e4..b81d733695 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -26,12 +26,11 @@ addons:
     - grub-efi-ia32-bin
     - rpm2cpio
     - wget
-    - device-tree-compiler
 
 install:
  # install latest device tree compiler
- #- git clone --depth=1 git://git.kernel.org/pub/scm/utils/dtc/dtc.git /tmp/dtc
- #- make -j4 -C /tmp/dtc
+ - git clone --depth=1 git://git.kernel.org/pub/scm/utils/dtc/dtc.git /tmp/dtc
+ - make -j4 -C /tmp/dtc
  # Clone uboot-test-hooks
  - git clone --depth=1 git://github.com/swarren/uboot-test-hooks.git /tmp/uboot-test-hooks
  - ln -s travis-ci /tmp/uboot-test-hooks/bin/`hostname`

commit 4e8c225a1d386380171f4be14f3bd22ca85bc0bb
Author: Jörg Krause <joerg.krause@embedded.rocks>
Date:   Fri Sep 15 22:16:48 2017 +0200

    UPSTREAM: net/tftp: fix build if CMD_BOOTEFI is not set
    
    Fixes:
    net/tftp.c:811: undefined reference to `efi_set_bootdev'
    
    Change-Id: Ic4457c16228d03d8202cdab618f3178f5556610b
    Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 64b8d7a677ce625c7dd30c040b32b606aea61745)

diff --git a/net/tftp.c b/net/tftp.c
index a5ed8c5d0a..6671b1f7ca 100644
--- a/net/tftp.c
+++ b/net/tftp.c
@@ -805,7 +805,9 @@ void tftp_start(enum proto_t protocol)
 		printf("Load address: 0x%lx\n", load_addr);
 		puts("Loading: *\b");
 		tftp_state = STATE_SEND_RRQ;
+#ifdef CONFIG_CMD_BOOTEFI
 		efi_set_bootdev("Net", "", tftp_filename);
+#endif
 	}
 
 	time_start = get_timer(0);

commit d18ad2e6e5bfa694206c7498f27ec230a6b8f915
Author: York Sun <york.sun@nxp.com>
Date:   Fri Sep 15 08:21:13 2017 -0700

    UPSTREAM: spl: Fix compiling warning on gunzip argument
    
    common/spl/spl_fit.c:201:12: warning: passing argument 4 of ‘gunzip’
    from incompatible pointer type [-Wincompatible-pointer-types]
           src, &length))
    
    Change-Id: I58ddaf516e012064afaea3710abb4e4d9710487b
    Signed-off-by: York Sun <york.sun@nxp.com>
    Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    CC: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 933f67aa56ea742f014b21bfe50a16a00e97b9bd)

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 49ccf1c17b..32d9ee5901 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -135,6 +135,7 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 	int offset;
 	size_t length;
 	int len;
+	ulong size;
 	ulong load_addr, load_ptr;
 	void *src;
 	ulong overhead;
@@ -197,11 +198,13 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 	    IS_ENABLED(CONFIG_SPL_GZIP)		&&
 	    image_comp == IH_COMP_GZIP		&&
 	    type == IH_TYPE_KERNEL) {
+		size = length;
 		if (gunzip((void *)load_addr, CONFIG_SYS_BOOTM_LEN,
-			   src, &length)) {
+			   src, &size)) {
 			puts("Uncompressing error\n");
 			return -EIO;
 		}
+		length = size;
 	} else {
 		memcpy((void *)load_addr, src, length);
 	}

commit 29de6c9147719221388fa309224bb0e62e2649f4
Author: Tom Rini <trini@konsulko.com>
Date:   Fri Sep 22 07:37:43 2017 -0400

    UPSTREAM: fs/fat: Reduce stack usage
    
    We have limited stack in SPL builds.  Drop itrblock and move to
    malloc/free of itr to move this off of the stack.  As part of this fix a
    double-free issue in fat_size().
    
    Change-Id: I2d8baa3a0b6ffa0f9591366a095d5e315c41fde8
    Signed-off-by: Tom Rini <trini@konsulko.com>
    ---
    Rework to use malloc/free as moving this to a global overflows some SH
    targets.
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 2460098cffacd18729262e3ed36656e6943783ed)

diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index f0284398b4..36a309c73c 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -1034,24 +1034,27 @@ int file_fat_detectfs(void)
 int fat_exists(const char *filename)
 {
 	fsdata fsdata;
-	fat_itr itrblock, *itr = &itrblock;
+	fat_itr *itr;
 	int ret;
 
+	itr = malloc(sizeof(fat_itr));
 	ret = fat_itr_root(itr, &fsdata);
 	if (ret)
 		return 0;
 
 	ret = fat_itr_resolve(itr, filename, TYPE_ANY);
 	free(fsdata.fatbuf);
+	free(itr);
 	return ret == 0;
 }
 
 int fat_size(const char *filename, loff_t *size)
 {
 	fsdata fsdata;
-	fat_itr itrblock, *itr = &itrblock;
+	fat_itr *itr;
 	int ret;
 
+	itr = malloc(sizeof(fat_itr));
 	ret = fat_itr_root(itr, &fsdata);
 	if (ret)
 		return ret;
@@ -1072,8 +1075,9 @@ int fat_size(const char *filename, loff_t *size)
 	}
 
 	*size = FAT2CPU32(itr->dent->size);
-out:
 	free(fsdata.fatbuf);
+out:
+	free(itr);
 	return ret;
 }
 
@@ -1081,9 +1085,10 @@ int file_fat_read_at(const char *filename, loff_t pos, void *buffer,
 		     loff_t maxsize, loff_t *actread)
 {
 	fsdata fsdata;
-	fat_itr itrblock, *itr = &itrblock;
+	fat_itr *itr;
 	int ret;
 
+	itr = malloc(sizeof(fat_itr));
 	ret = fat_itr_root(itr, &fsdata);
 	if (ret)
 		return ret;
@@ -1097,6 +1102,7 @@ int file_fat_read_at(const char *filename, loff_t pos, void *buffer,
 
 out:
 	free(fsdata.fatbuf);
+	free(itr);
 	return ret;
 }
 

commit 85681a03edc60ab1d349e55de128beb718ea052f
Author: Rob Clark <robdclark@gmail.com>
Date:   Tue Sep 12 16:40:01 2017 -0400

    UPSTREAM: fs/fat: fix fatbuf leak
    
    A new fatbuf was allocated by get_fs_info() (called by fat_itr_root()),
    but not freed, resulting in eventually running out of memory.  Spotted
    by running 'ls -r' in a large FAT filesystem from Shell.efi.
    
    fatbuf is mainly used to cache FAT entry lookups (get_fatent())..
    possibly once fat_write.c it can move into the iterator to simplify
    this.
    
    Change-Id: I194a2de30a177e9b377dc50c61a2af6106dd8820
    Signed-off-by: Rob Clark <robdclark@gmail.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Łukasz Majewski <lukma@denx.de>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 725ffdb5cbcc4b8a9726a68cc6ae0713266ba5a9)

diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index f5f74c12ff..f0284398b4 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -1042,6 +1042,7 @@ int fat_exists(const char *filename)
 		return 0;
 
 	ret = fat_itr_resolve(itr, filename, TYPE_ANY);
+	free(fsdata.fatbuf);
 	return ret == 0;
 }
 
@@ -1061,17 +1062,19 @@ int fat_size(const char *filename, loff_t *size)
 		 * Directories don't have size, but fs_size() is not
 		 * expected to fail if passed a directory path:
 		 */
+		free(fsdata.fatbuf);
 		fat_itr_root(itr, &fsdata);
 		if (!fat_itr_resolve(itr, filename, TYPE_DIR)) {
 			*size = 0;
-			return 0;
+			ret = 0;
 		}
-		return ret;
+		goto out;
 	}
 
 	*size = FAT2CPU32(itr->dent->size);
-
-	return 0;
+out:
+	free(fsdata.fatbuf);
+	return ret;
 }
 
 int file_fat_read_at(const char *filename, loff_t pos, void *buffer,
@@ -1087,10 +1090,14 @@ int file_fat_read_at(const char *filename, loff_t pos, void *buffer,
 
 	ret = fat_itr_resolve(itr, filename, TYPE_FILE);
 	if (ret)
-		return ret;
+		goto out;
 
 	printf("reading %s\n", filename);
-	return get_contents(&fsdata, itr->dent, pos, buffer, maxsize, actread);
+	ret = get_contents(&fsdata, itr->dent, pos, buffer, maxsize, actread);
+
+out:
+	free(fsdata.fatbuf);
+	return ret;
 }
 
 int file_fat_read(const char *filename, void *buffer, int maxsize)
@@ -1126,7 +1133,7 @@ typedef struct {
 
 int fat_opendir(const char *filename, struct fs_dir_stream **dirsp)
 {
-	fat_dir *dir = malloc(sizeof(*dir));
+	fat_dir *dir = calloc(1, sizeof(*dir));
 	int ret;
 
 	if (!dir)
@@ -1144,6 +1151,7 @@ int fat_opendir(const char *filename, struct fs_dir_stream **dirsp)
 	return 0;
 
 fail:
+	free(dir->fsdata.fatbuf);
 	free(dir);
 	return ret;
 }
@@ -1174,6 +1182,7 @@ int fat_readdir(struct fs_dir_stream *dirs, struct fs_dirent **dentp)
 void fat_closedir(struct fs_dir_stream *dirs)
 {
 	fat_dir *dir = (fat_dir *)dirs;
+	free(dir->fsdata.fatbuf);
 	free(dir);
 }
 

commit 1d8c5dbb6ed50e42d1ea0a7f9c0e6d589648e890
Author: Rob Clark <robdclark@gmail.com>
Date:   Sat Sep 9 13:16:00 2017 -0400

    UPSTREAM: fs/fat: Clean up open-coded sector <-> cluster conversions
    
    Use the clust_to_sect() helper that was introduced earlier, and add an
    inverse sect_to_clust(), plus update the various spots that open-coded
    this conversion previously.
    
    Change-Id: Ifb6a59cefda1491639dcd6e8ea32fd2490af13b5
    Signed-off-by: Rob Clark <robdclark@gmail.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 265edc03d5a19550d92cbd6e10631d5a15bdd1d5)

diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index 65873a2c2a..f5f74c12ff 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -257,8 +257,7 @@ get_cluster(fsdata *mydata, __u32 clustnum, __u8 *buffer, unsigned long size)
 	int ret;
 
 	if (clustnum > 0) {
-		startsect = mydata->data_begin +
-				clustnum * mydata->clust_size;
+		startsect = clust_to_sect(mydata, clustnum);
 	} else {
 		startsect = mydata->rootdir_sect;
 	}
@@ -594,9 +593,8 @@ static int get_fs_info(fsdata *mydata)
 		mydata->data_begin = mydata->rootdir_sect +
 					mydata->rootdir_size -
 					(mydata->clust_size * 2);
-		mydata->root_cluster = (mydata->rootdir_sect -
-					mydata->data_begin) /
-					mydata->clust_size;
+		mydata->root_cluster =
+			sect_to_clust(mydata, mydata->rootdir_sect);
 	}
 
 	mydata->fatbufnum = -1;
diff --git a/fs/fat/fat_write.c b/fs/fat/fat_write.c
index d0468baf8f..9d2e0ed74c 100644
--- a/fs/fat/fat_write.c
+++ b/fs/fat/fat_write.c
@@ -502,8 +502,7 @@ set_cluster(fsdata *mydata, __u32 clustnum, __u8 *buffer,
 	int ret;
 
 	if (clustnum > 0)
-		startsect = mydata->data_begin +
-				clustnum * mydata->clust_size;
+		startsect = clust_to_sect(mydata, clustnum);
 	else
 		startsect = mydata->rootdir_sect;
 
@@ -751,8 +750,7 @@ static int check_overflow(fsdata *mydata, __u32 clustnum, loff_t size)
 	__u32 startsect, sect_num, offset;
 
 	if (clustnum > 0) {
-		startsect = mydata->data_begin +
-				clustnum * mydata->clust_size;
+		startsect = clust_to_sect(mydata, clustnum);
 	} else {
 		startsect = mydata->rootdir_sect;
 	}
@@ -791,7 +789,7 @@ static dir_entry *empty_dentptr;
 static dir_entry *find_directory_entry(fsdata *mydata, int startsect,
 	char *filename, dir_entry *retdent, __u32 start)
 {
-	__u32 curclust = (startsect - mydata->data_begin) / mydata->clust_size;
+	__u32 curclust = sect_to_clust(mydata, startsect);
 
 	debug("get_dentfromdir: %s\n", filename);
 
diff --git a/include/fat.h b/include/fat.h
index 0f58939124..bdeda95e6d 100644
--- a/include/fat.h
+++ b/include/fat.h
@@ -177,12 +177,16 @@ typedef struct {
 	__u32	root_cluster;	/* First cluster of root dir for FAT32 */
 } fsdata;
 
-/* TODO clean up places that are open-coding this: */
 static inline u32 clust_to_sect(fsdata *fsdata, u32 clust)
 {
 	return fsdata->data_begin + clust * fsdata->clust_size;
 }
 
+static inline u32 sect_to_clust(fsdata *fsdata, u32 sect)
+{
+	return (sect - fsdata->data_begin) / fsdata->clust_size;
+}
+
 int file_fat_detectfs(void);
 int fat_exists(const char *filename);
 int fat_size(const char *filename, loff_t *size);

commit 271eb2081258cb3b334c79d0c5e9a96d789a6ebc
Author: Rob Clark <robdclark@gmail.com>
Date:   Sat Sep 9 13:15:59 2017 -0400

    UPSTREAM: fs/fat: fix case for FAT shortnames
    
    Noticed when comparing our output to linux.  There are some lcase bits
    which control whether filename and/or extension should be downcase'd.
    
    Change-Id: I55dc1f9ef025dc3174158d06ed78d1f8b54e1335
    Signed-off-by: Rob Clark <robdclark@gmail.com>
    Reviewed-by: Łukasz Majewski <lukma@denx.de>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 21a24c3bf35bac83d66ce4a48eb0c7dd8a7227cb)

diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index c951d84f57..65873a2c2a 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -29,11 +29,13 @@ static const int vfat_enabled = 0;
 #endif
 
 /*
- * Convert a string to lowercase.
+ * Convert a string to lowercase.  Converts at most 'len' characters,
+ * 'len' may be larger than the length of 'str' if 'str' is NULL
+ * terminated.
  */
-static void downcase(char *str)
+static void downcase(char *str, size_t len)
 {
-	while (*str != '\0') {
+	while (*str != '\0' && len--) {
 		*str = tolower(*str);
 		str++;
 	}
@@ -131,10 +133,13 @@ static void get_name(dir_entry *dirent, char *s_name)
 	ptr = s_name;
 	while (*ptr && *ptr != ' ')
 		ptr++;
+	if (dirent->lcase & CASE_LOWER_BASE)
+		downcase(s_name, (unsigned)(ptr - s_name));
 	if (dirent->ext[0] && dirent->ext[0] != ' ') {
-		*ptr = '.';
-		ptr++;
+		*ptr++ = '.';
 		memcpy(ptr, dirent->ext, 3);
+		if (dirent->lcase & CASE_LOWER_EXT)
+			downcase(ptr, 3);
 		ptr[3] = '\0';
 		while (*ptr && *ptr != ' ')
 			ptr++;
@@ -144,7 +149,6 @@ static void get_name(dir_entry *dirent, char *s_name)
 		*s_name = '\0';
 	else if (*s_name == aRING)
 		*s_name = DELETED_FLAG;
-	downcase(s_name);
 }
 
 static int flush_dirty_fat_buffer(fsdata *mydata);
diff --git a/fs/fat/fat_write.c b/fs/fat/fat_write.c
index 4ca024c208..d0468baf8f 100644
--- a/fs/fat/fat_write.c
+++ b/fs/fat/fat_write.c
@@ -345,7 +345,7 @@ get_long_file_name(fsdata *mydata, int curclust, __u8 *cluster,
 		*l_name = '\0';
 	else if (*l_name == aRING)
 		*l_name = DELETED_FLAG;
-	downcase(l_name);
+	downcase(l_name, INT_MAX);
 
 	/* Return the real directory entry */
 	*retdent = realdent;
@@ -981,7 +981,7 @@ static int do_fat_write(const char *filename, void *buffer, loff_t size,
 
 	memcpy(l_filename, filename, name_len);
 	l_filename[name_len] = 0; /* terminate the string */
-	downcase(l_filename);
+	downcase(l_filename, INT_MAX);
 
 	startsect = mydata->rootdir_sect;
 	retdent = find_directory_entry(mydata, startsect,
diff --git a/include/fat.h b/include/fat.h
index 83cd90017e..0f58939124 100644
--- a/include/fat.h
+++ b/include/fat.h
@@ -128,10 +128,14 @@ typedef struct volume_info
 	/* Boot sign comes last, 2 bytes */
 } volume_info;
 
+/* see dir_entry::lcase: */
+#define CASE_LOWER_BASE	8	/* base (name) is lower case */
+#define CASE_LOWER_EXT	16	/* extension is lower case */
+
 typedef struct dir_entry {
 	char	name[8],ext[3];	/* Name and extension */
 	__u8	attr;		/* Attribute bits */
-	__u8	lcase;		/* Case for base and extension */
+	__u8	lcase;		/* Case for name and ext (CASE_LOWER_x) */
 	__u8	ctime_ms;	/* Creation time, milliseconds */
 	__u16	ctime;		/* Creation time */
 	__u16	cdate;		/* Creation date */

commit d5fb8aea9ff3ac16320f6fd75ffe625a2be0f119
Author: Rob Clark <robdclark@gmail.com>
Date:   Sat Sep 9 13:15:58 2017 -0400

    UPSTREAM: fat/fs: move ls to generic implementation
    
    Add a generic implementation of 'ls' using opendir/readdir/closedir, and
    replace fat's custom implementation.  Other filesystems should move to
    the generic implementation after they add opendir/readdir/closedir
    support.
    
    Change-Id: I287d3cd6e97c0c1901518c5ae1bb0653c7299f9b
    Signed-off-by: Rob Clark <robdclark@gmail.com>
    Reviewed-by: Łukasz Majewski <lukma@denx.de>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 89191d626793490b579e1d36e7d7a4464a20f9f6)

diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index 82ddb7eab1..c951d84f57 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -1029,38 +1029,6 @@ int file_fat_detectfs(void)
 	return 0;
 }
 
-int file_fat_ls(const char *dir)
-{
-	fsdata fsdata;
-	fat_itr itrblock, *itr = &itrblock;
-	int files = 0, dirs = 0;
-	int ret;
-
-	ret = fat_itr_root(itr, &fsdata);
-	if (ret)
-		return ret;
-
-	ret = fat_itr_resolve(itr, dir, TYPE_DIR);
-	if (ret)
-		return ret;
-
-	while (fat_itr_next(itr)) {
-		if (fat_itr_isdir(itr)) {
-			printf("            %s/\n", itr->name);
-			dirs++;
-		} else {
-			printf(" %8u   %s\n",
-			       FAT2CPU32(itr->dent->size),
-			       itr->name);
-			files++;
-		}
-	}
-
-	printf("\n%d file(s), %d dir(s)\n\n", files, dirs);
-
-	return 0;
-}
-
 int fat_exists(const char *filename)
 {
 	fsdata fsdata;
diff --git a/fs/fs.c b/fs/fs.c
index fc0c953fcb..3481229aa6 100644
--- a/fs/fs.c
+++ b/fs/fs.c
@@ -37,6 +37,35 @@ static inline int fs_ls_unsupported(const char *dirname)
 	return -1;
 }
 
+/* generic implementation of ls in terms of opendir/readdir/closedir */
+__maybe_unused
+static int fs_ls_generic(const char *dirname)
+{
+	struct fs_dir_stream *dirs;
+	struct fs_dirent *dent;
+	int nfiles = 0, ndirs = 0;
+
+	dirs = fs_opendir(dirname);
+	if (!dirs)
+		return -errno;
+
+	while ((dent = fs_readdir(dirs))) {
+		if (dent->type == FS_DT_DIR) {
+			printf("            %s/\n", dent->name);
+			ndirs++;
+		} else {
+			printf(" %8lld   %s\n", dent->size, dent->name);
+			nfiles++;
+		}
+	}
+
+	fs_closedir(dirs);
+
+	printf("\n%d file(s), %d dir(s)\n\n", nfiles, ndirs);
+
+	return 0;
+}
+
 static inline int fs_exists_unsupported(const char *filename)
 {
 	return 0;
@@ -123,7 +152,7 @@ static struct fstype_info fstypes[] = {
 		.null_dev_desc_ok = false,
 		.probe = fat_set_blk_dev,
 		.close = fat_close,
-		.ls = file_fat_ls,
+		.ls = fs_ls_generic,
 		.exists = fat_exists,
 		.size = fat_size,
 		.read = fat_read_file,
@@ -133,7 +162,9 @@ static struct fstype_info fstypes[] = {
 		.write = fs_write_unsupported,
 #endif
 		.uuid = fs_uuid_unsupported,
-		.opendir = fs_opendir_unsupported,
+		.opendir = fat_opendir,
+		.readdir = fat_readdir,
+		.closedir = fat_closedir,
 	},
 #endif
 #ifdef CONFIG_FS_EXT4
diff --git a/include/fat.h b/include/fat.h
index b255ce5337..83cd90017e 100644
--- a/include/fat.h
+++ b/include/fat.h
@@ -11,6 +11,7 @@
 #define _FAT_H_
 
 #include <asm/byteorder.h>
+#include <fs.h>
 
 #define CONFIG_SUPPORT_VFAT
 /* Maximum Long File Name length supported here is 128 UTF-16 code units */
@@ -179,7 +180,6 @@ static inline u32 clust_to_sect(fsdata *fsdata, u32 clust)
 }
 
 int file_fat_detectfs(void);
-int file_fat_ls(const char *dir);
 int fat_exists(const char *filename);
 int fat_size(const char *filename, loff_t *size);
 int file_fat_read_at(const char *filename, loff_t pos, void *buffer,
@@ -192,5 +192,8 @@ int file_fat_write(const char *filename, void *buf, loff_t offset, loff_t len,
 		   loff_t *actwrite);
 int fat_read_file(const char *filename, void *buf, loff_t offset, loff_t len,
 		  loff_t *actread);
+int fat_opendir(const char *filename, struct fs_dir_stream **dirsp);
+int fat_readdir(struct fs_dir_stream *dirs, struct fs_dirent **dentp);
+void fat_closedir(struct fs_dir_stream *dirs);
 void fat_close(void);
 #endif /* _FAT_H_ */

commit 53ee50a1caac69e413a945f1ee2a85674402602b
Author: Rob Clark <robdclark@gmail.com>
Date:   Sat Sep 9 13:15:57 2017 -0400

    UPSTREAM: fat/fs: remove a bunch of dead code
    
    Spotted by chance, when trying to remove file_fat_ls(), I noticed there
    were some dead users of the API.
    
    Change-Id: Iab669e5f9fd3840dbf1d7ebf026c6827775186ab
    Signed-off-by: Rob Clark <robdclark@gmail.com>
    Acked-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 41fa83d1a6cdd8ddfb3fbe332252193ff8fb8b71)

diff --git a/fs/fat/Makefile b/fs/fat/Makefile
index b60e8486c4..3e2a6b01a8 100644
--- a/fs/fat/Makefile
+++ b/fs/fat/Makefile
@@ -5,7 +5,3 @@
 
 obj-$(CONFIG_FS_FAT)	:= fat.o
 obj-$(CONFIG_FAT_WRITE):= fat_write.o
-
-ifndef CONFIG_SPL_BUILD
-obj-$(CONFIG_FS_FAT)	+= file.o
-endif
diff --git a/fs/fat/file.c b/fs/fat/file.c
deleted file mode 100644
index 89706117b9..0000000000
--- a/fs/fat/file.c
+++ /dev/null
@@ -1,183 +0,0 @@
-/*
- * file.c
- *
- * Mini "VFS" by Marcus Sundberg
- *
- * 2002-07-28 - rjones@nexus-tech.net - ported to ppcboot v1.1.6
- * 2003-03-10 - kharris@nexus-tech.net - ported to uboot
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <config.h>
-#include <malloc.h>
-#include <fat.h>
-#include <linux/stat.h>
-#include <linux/time.h>
-
-/* Supported filesystems */
-static const struct filesystem filesystems[] = {
-	{ file_fat_detectfs,  file_fat_ls,  file_fat_read,  "FAT" },
-};
-#define NUM_FILESYS	(sizeof(filesystems)/sizeof(struct filesystem))
-
-/* The filesystem which was last detected */
-static int current_filesystem = FSTYPE_NONE;
-
-/* The current working directory */
-#define CWD_LEN		511
-char file_cwd[CWD_LEN+1] = "/";
-
-const char *
-file_getfsname(int idx)
-{
-	if (idx < 0 || idx >= NUM_FILESYS)
-		return NULL;
-
-	return filesystems[idx].name;
-}
-
-static void
-pathcpy(char *dest, const char *src)
-{
-	char *origdest = dest;
-
-	do {
-		if (dest-file_cwd >= CWD_LEN) {
-			*dest = '\0';
-			return;
-		}
-		*(dest) = *(src);
-		if (*src == '\0') {
-			if (dest-- != origdest && ISDIRDELIM(*dest)) {
-				*dest = '\0';
-			}
-			return;
-		}
-		++dest;
-
-		if (ISDIRDELIM(*src))
-			while (ISDIRDELIM(*src)) src++;
-		else
-			src++;
-	} while (1);
-}
-
-int
-file_cd(const char *path)
-{
-	if (ISDIRDELIM(*path)) {
-		while (ISDIRDELIM(*path)) path++;
-		strncpy(file_cwd+1, path, CWD_LEN-1);
-	} else {
-		const char *origpath = path;
-		char *tmpstr = file_cwd;
-		int back = 0;
-
-		while (*tmpstr != '\0') tmpstr++;
-		do {
-			tmpstr--;
-		} while (ISDIRDELIM(*tmpstr));
-
-		while (*path == '.') {
-			path++;
-			while (*path == '.') {
-				path++;
-				back++;
-			}
-			if (*path != '\0' && !ISDIRDELIM(*path)) {
-				path = origpath;
-				back = 0;
-				break;
-			}
-			while (ISDIRDELIM(*path)) path++;
-			origpath = path;
-		}
-
-		while (back--) {
-			/* Strip off path component */
-			while (!ISDIRDELIM(*tmpstr)) {
-				tmpstr--;
-			}
-			if (tmpstr == file_cwd) {
-				/* Incremented again right after the loop. */
-				tmpstr--;
-				break;
-			}
-			/* Skip delimiters */
-			while (ISDIRDELIM(*tmpstr)) tmpstr--;
-		}
-		tmpstr++;
-		if (*path == '\0') {
-			if (tmpstr == file_cwd) {
-				*tmpstr = '/';
-				tmpstr++;
-			}
-			*tmpstr = '\0';
-			return 0;
-		}
-		*tmpstr = '/';
-		pathcpy(tmpstr+1, path);
-	}
-
-	return 0;
-}
-
-int
-file_detectfs(void)
-{
-	int i;
-
-	current_filesystem = FSTYPE_NONE;
-
-	for (i = 0; i < NUM_FILESYS; i++) {
-		if (filesystems[i].detect() == 0) {
-			strcpy(file_cwd, "/");
-			current_filesystem = i;
-			break;
-		}
-	}
-
-	return current_filesystem;
-}
-
-int
-file_ls(const char *dir)
-{
-	char fullpath[1024];
-	const char *arg;
-
-	if (current_filesystem == FSTYPE_NONE) {
-		printf("Can't list files without a filesystem!\n");
-		return -1;
-	}
-
-	if (ISDIRDELIM(*dir)) {
-		arg = dir;
-	} else {
-		sprintf(fullpath, "%s/%s", file_cwd, dir);
-		arg = fullpath;
-	}
-	return filesystems[current_filesystem].ls(arg);
-}
-
-int file_read(const char *filename, void *buffer, int maxsize)
-{
-	char fullpath[1024];
-	const char *arg;
-
-	if (current_filesystem == FSTYPE_NONE) {
-		printf("Can't load file without a filesystem!\n");
-		return -1;
-	}
-
-	if (ISDIRDELIM(*filename)) {
-		arg = filename;
-	} else {
-		sprintf(fullpath, "%s/%s", file_cwd, filename);
-		arg = fullpath;
-	}
-
-	return filesystems[current_filesystem].read(arg, buffer, maxsize);
-}
diff --git a/include/fat.h b/include/fat.h
index 18d8981c48..b255ce5337 100644
--- a/include/fat.h
+++ b/include/fat.h
@@ -178,25 +178,6 @@ static inline u32 clust_to_sect(fsdata *fsdata, u32 clust)
 	return fsdata->data_begin + clust * fsdata->clust_size;
 }
 
-typedef int	(file_detectfs_func)(void);
-typedef int	(file_ls_func)(const char *dir);
-typedef int	(file_read_func)(const char *filename, void *buffer,
-				 int maxsize);
-
-struct filesystem {
-	file_detectfs_func	*detect;
-	file_ls_func		*ls;
-	file_read_func		*read;
-	const char		name[12];
-};
-
-/* FAT tables */
-file_detectfs_func	file_fat_detectfs;
-file_ls_func		file_fat_ls;
-file_read_func		file_fat_read;
-
-/* Currently this doesn't check if the dir exists or is valid... */
-int file_cd(const char *path);
 int file_fat_detectfs(void);
 int file_fat_ls(const char *dir);
 int fat_exists(const char *filename);
@@ -204,7 +185,6 @@ int fat_size(const char *filename, loff_t *size);
 int file_fat_read_at(const char *filename, loff_t pos, void *buffer,
 		     loff_t maxsize, loff_t *actread);
 int file_fat_read(const char *filename, void *buffer, int maxsize);
-const char *file_getfsname(int idx);
 int fat_set_blk_dev(struct blk_desc *rbdd, disk_partition_t *info);
 int fat_register_device(struct blk_desc *dev_desc, int part_no);
 

commit 60352d2210dee103e9ca03b2f51994ea028afc82
Author: Rob Clark <robdclark@gmail.com>
Date:   Sat Sep 9 13:15:56 2017 -0400

    UPSTREAM: fs/fat: implement opendir/readdir/closedir
    
    Implement the readdir interface using the directory iterators.
    
    Change-Id: I88123b039fa0644033847670027aca9d99bd4d2e
    Signed-off-by: Rob Clark <robdclark@gmail.com>
    Reviewed-by: Łukasz Majewski <lukma@denx.de>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 1f40366b319eac7eb02f8894fff5c94fbdb47d30)

diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index bbba7947ee..82ddb7eab1 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -14,6 +14,7 @@
 #include <config.h>
 #include <exports.h>
 #include <fat.h>
+#include <fs.h>
 #include <asm/byteorder.h>
 #include <part.h>
 #include <malloc.h>
@@ -1146,6 +1147,66 @@ int fat_read_file(const char *filename, void *buf, loff_t offset, loff_t len,
 	return ret;
 }
 
+typedef struct {
+	struct fs_dir_stream parent;
+	struct fs_dirent dirent;
+	fsdata fsdata;
+	fat_itr itr;
+} fat_dir;
+
+int fat_opendir(const char *filename, struct fs_dir_stream **dirsp)
+{
+	fat_dir *dir = malloc(sizeof(*dir));
+	int ret;
+
+	if (!dir)
+		return -ENOMEM;
+
+	ret = fat_itr_root(&dir->itr, &dir->fsdata);
+	if (ret)
+		goto fail;
+
+	ret = fat_itr_resolve(&dir->itr, filename, TYPE_DIR);
+	if (ret)
+		goto fail;
+
+	*dirsp = (struct fs_dir_stream *)dir;
+	return 0;
+
+fail:
+	free(dir);
+	return ret;
+}
+
+int fat_readdir(struct fs_dir_stream *dirs, struct fs_dirent **dentp)
+{
+	fat_dir *dir = (fat_dir *)dirs;
+	struct fs_dirent *dent = &dir->dirent;
+
+	if (!fat_itr_next(&dir->itr))
+		return -ENOENT;
+
+	memset(dent, 0, sizeof(*dent));
+	strcpy(dent->name, dir->itr.name);
+
+	if (fat_itr_isdir(&dir->itr)) {
+		dent->type = FS_DT_DIR;
+	} else {
+		dent->type = FS_DT_REG;
+		dent->size = FAT2CPU32(dir->itr.dent->size);
+	}
+
+	*dentp = dent;
+
+	return 0;
+}
+
+void fat_closedir(struct fs_dir_stream *dirs)
+{
+	fat_dir *dir = (fat_dir *)dirs;
+	free(dir);
+}
+
 void fat_close(void)
 {
 }

commit b3800056b1e398ab3bede7e927285eeddca7e088
Author: Rob Clark <robdclark@gmail.com>
Date:   Sat Sep 9 13:15:55 2017 -0400

    UPSTREAM: fs: add fs_readdir()
    
    Needed to support efi file protocol.  The fallback.efi loader wants
    to be able to read the contents of the /EFI directory to find an OS
    to boot.
    
    Modelled after POSIX opendir()/readdir()/closedir().  Unlike the other
    fs APIs, this is stateful (ie. state is held in the FS_DIR "directory
    stream"), to avoid re-traversing of the directory structure at each
    step.  The directory stream must be released with closedir() when it
    is no longer needed.
    
    Change-Id: I5a977a73024ff4646fc3c4f7c49993de0b5b6256
    Signed-off-by: Rob Clark <robdclark@gmail.com>
    Reviewed-by: Łukasz Majewski <lukma@denx.de>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 4bbcc965f995564870ca02606137e60e873e0a1f)

diff --git a/disk/part.c b/disk/part.c
index 96c2858ac9..1903a31abc 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -347,6 +347,24 @@ int part_get_info(struct blk_desc *dev_desc, int part,
 	return -1;
 }
 
+int part_get_info_whole_disk(struct blk_desc *dev_desc, disk_partition_t *info)
+{
+	info->start = 0;
+	info->size = dev_desc->lba;
+	info->blksz = dev_desc->blksz;
+	info->bootable = 0;
+	strcpy((char *)info->type, BOOT_PART_TYPE);
+	strcpy((char *)info->name, "Whole Disk");
+#if CONFIG_IS_ENABLED(PARTITION_UUIDS)
+	info->uuid[0] = 0;
+#endif
+#ifdef CONFIG_PARTITION_TYPE_GUID
+	info->type_guid[0] = 0;
+#endif
+
+	return 0;
+}
+
 int blk_get_device_by_str(const char *ifname, const char *dev_hwpart_str,
 			  struct blk_desc **dev_desc)
 {
@@ -539,18 +557,7 @@ int blk_get_device_part_str(const char *ifname, const char *dev_part_str,
 
 		(*dev_desc)->log2blksz = LOG2((*dev_desc)->blksz);
 
-		info->start = 0;
-		info->size = (*dev_desc)->lba;
-		info->blksz = (*dev_desc)->blksz;
-		info->bootable = 0;
-		strcpy((char *)info->type, BOOT_PART_TYPE);
-		strcpy((char *)info->name, "Whole Disk");
-#if CONFIG_IS_ENABLED(PARTITION_UUIDS)
-		info->uuid[0] = 0;
-#endif
-#ifdef CONFIG_PARTITION_TYPE_GUID
-		info->type_guid[0] = 0;
-#endif
+		part_get_info_whole_disk(*dev_desc, info);
 
 		ret = 0;
 		goto cleanup;
diff --git a/fs/fs.c b/fs/fs.c
index 13cd3626c6..fc0c953fcb 100644
--- a/fs/fs.c
+++ b/fs/fs.c
@@ -21,6 +21,7 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 static struct blk_desc *fs_dev_desc;
+static int fs_dev_part;
 static disk_partition_t fs_partition;
 static int fs_type = FS_TYPE_ANY;
 
@@ -69,6 +70,12 @@ static inline int fs_uuid_unsupported(char *uuid_str)
 	return -1;
 }
 
+static inline int fs_opendir_unsupported(const char *filename,
+					 struct fs_dir_stream **dirs)
+{
+	return -EACCES;
+}
+
 struct fstype_info {
 	int fstype;
 	char *name;
@@ -92,6 +99,20 @@ struct fstype_info {
 		     loff_t len, loff_t *actwrite);
 	void (*close)(void);
 	int (*uuid)(char *uuid_str);
+	/*
+	 * Open a directory stream.  On success return 0 and directory
+	 * stream pointer via 'dirsp'.  On error, return -errno.  See
+	 * fs_opendir().
+	 */
+	int (*opendir)(const char *filename, struct fs_dir_stream **dirsp);
+	/*
+	 * Read next entry from directory stream.  On success return 0
+	 * and directory entry pointer via 'dentp'.  On error return
+	 * -errno.  See fs_readdir().
+	 */
+	int (*readdir)(struct fs_dir_stream *dirs, struct fs_dirent **dentp);
+	/* see fs_closedir() */
+	void (*closedir)(struct fs_dir_stream *dirs);
 };
 
 static struct fstype_info fstypes[] = {
@@ -112,6 +133,7 @@ static struct fstype_info fstypes[] = {
 		.write = fs_write_unsupported,
 #endif
 		.uuid = fs_uuid_unsupported,
+		.opendir = fs_opendir_unsupported,
 	},
 #endif
 #ifdef CONFIG_FS_EXT4
@@ -131,6 +153,7 @@ static struct fstype_info fstypes[] = {
 		.write = fs_write_unsupported,
 #endif
 		.uuid = ext4fs_uuid,
+		.opendir = fs_opendir_unsupported,
 	},
 #endif
 #ifdef CONFIG_SANDBOX
@@ -146,6 +169,7 @@ static struct fstype_info fstypes[] = {
 		.read = fs_read_sandbox,
 		.write = fs_write_sandbox,
 		.uuid = fs_uuid_unsupported,
+		.opendir = fs_opendir_unsupported,
 	},
 #endif
 #ifdef CONFIG_CMD_UBIFS
@@ -161,6 +185,7 @@ static struct fstype_info fstypes[] = {
 		.read = ubifs_read,
 		.write = fs_write_unsupported,
 		.uuid = fs_uuid_unsupported,
+		.opendir = fs_opendir_unsupported,
 	},
 #endif
 	{
@@ -175,6 +200,7 @@ static struct fstype_info fstypes[] = {
 		.read = fs_read_unsupported,
 		.write = fs_write_unsupported,
 		.uuid = fs_uuid_unsupported,
+		.opendir = fs_opendir_unsupported,
 	},
 };
 
@@ -226,6 +252,31 @@ int fs_set_blk_dev(const char *ifname, const char *dev_part_str, int fstype)
 		if (!fs_dev_desc && !info->null_dev_desc_ok)
 			continue;
 
+		if (!info->probe(fs_dev_desc, &fs_partition)) {
+			fs_type = info->fstype;
+			fs_dev_part = part;
+			return 0;
+		}
+	}
+
+	return -1;
+}
+
+/* set current blk device w/ blk_desc + partition # */
+int fs_set_blk_dev_with_part(struct blk_desc *desc, int part)
+{
+	struct fstype_info *info;
+	int ret, i;
+
+	if (part >= 1)
+		ret = part_get_info(desc, part, &fs_partition);
+	else
+		ret = part_get_info_whole_disk(desc, &fs_partition);
+	if (ret)
+		return ret;
+	fs_dev_desc = desc;
+
+	for (i = 0, info = fstypes; i < ARRAY_SIZE(fstypes); i++, info++) {
 		if (!info->probe(fs_dev_desc, &fs_partition)) {
 			fs_type = info->fstype;
 			return 0;
@@ -334,6 +385,59 @@ int fs_write(const char *filename, ulong addr, loff_t offset, loff_t len,
 	return ret;
 }
 
+struct fs_dir_stream *fs_opendir(const char *filename)
+{
+	struct fstype_info *info = fs_get_info(fs_type);
+	struct fs_dir_stream *dirs = NULL;
+	int ret;
+
+	ret = info->opendir(filename, &dirs);
+	fs_close();
+	if (ret) {
+		errno = -ret;
+		return NULL;
+	}
+
+	dirs->desc = fs_dev_desc;
+	dirs->part = fs_dev_part;
+
+	return dirs;
+}
+
+struct fs_dirent *fs_readdir(struct fs_dir_stream *dirs)
+{
+	struct fstype_info *info;
+	struct fs_dirent *dirent;
+	int ret;
+
+	fs_set_blk_dev_with_part(dirs->desc, dirs->part);
+	info = fs_get_info(fs_type);
+
+	ret = info->readdir(dirs, &dirent);
+	fs_close();
+	if (ret) {
+		errno = -ret;
+		return NULL;
+	}
+
+	return dirent;
+}
+
+void fs_closedir(struct fs_dir_stream *dirs)
+{
+	struct fstype_info *info;
+
+	if (!dirs)
+		return;
+
+	fs_set_blk_dev_with_part(dirs->desc, dirs->part);
+	info = fs_get_info(fs_type);
+
+	info->closedir(dirs);
+	fs_close();
+}
+
+
 int do_size(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
 		int fstype)
 {
diff --git a/include/fs.h b/include/fs.h
index 2f2aca8378..0869ad6e80 100644
--- a/include/fs.h
+++ b/include/fs.h
@@ -26,6 +26,17 @@
  */
 int fs_set_blk_dev(const char *ifname, const char *dev_part_str, int fstype);
 
+/*
+ * fs_set_blk_dev_with_part - Set current block device + partition
+ *
+ * Similar to fs_set_blk_dev(), but useful for cases where you already
+ * know the blk_desc and part number.
+ *
+ * Returns 0 on success.
+ * Returns non-zero if invalid partition or error accessing the disk.
+ */
+int fs_set_blk_dev_with_part(struct blk_desc *desc, int part);
+
 /*
  * Print the list of files on the partition previously set by fs_set_blk_dev(),
  * in directory "dirname".
@@ -78,6 +89,62 @@ int fs_read(const char *filename, ulong addr, loff_t offset, loff_t len,
 int fs_write(const char *filename, ulong addr, loff_t offset, loff_t len,
 	     loff_t *actwrite);
 
+/*
+ * Directory entry types, matches the subset of DT_x in posix readdir()
+ * which apply to u-boot.
+ */
+#define FS_DT_DIR  4         /* directory */
+#define FS_DT_REG  8         /* regular file */
+#define FS_DT_LNK  10        /* symbolic link */
+
+/*
+ * A directory entry, returned by fs_readdir().  Returns information
+ * about the file/directory at the current directory entry position.
+ */
+struct fs_dirent {
+	unsigned type;       /* one of FS_DT_x (not a mask) */
+	loff_t size;         /* size in bytes */
+	char name[256];
+};
+
+/* Note: fs_dir_stream should be treated as opaque to the user of fs layer */
+struct fs_dir_stream {
+	/* private to fs. layer: */
+	struct blk_desc *desc;
+	int part;
+};
+
+/*
+ * fs_opendir - Open a directory
+ *
+ * @filename: the path to directory to open
+ * @return a pointer to the directory stream or NULL on error and errno
+ *    set appropriately
+ */
+struct fs_dir_stream *fs_opendir(const char *filename);
+
+/*
+ * fs_readdir - Read the next directory entry in the directory stream.
+ *
+ * Works in an analogous way to posix readdir().  The previously returned
+ * directory entry is no longer valid after calling fs_readdir() again.
+ * After fs_closedir() is called, the returned directory entry is no
+ * longer valid.
+ *
+ * @dirs: the directory stream
+ * @return the next directory entry (only valid until next fs_readdir() or
+ *    fs_closedir() call, do not attempt to free()) or NULL if the end of
+ *    the directory is reached.
+ */
+struct fs_dirent *fs_readdir(struct fs_dir_stream *dirs);
+
+/*
+ * fs_closedir - close a directory stream
+ *
+ * @dirs: the directory stream
+ */
+void fs_closedir(struct fs_dir_stream *dirs);
+
 /*
  * Common implementation for various filesystem commands, optionally limited
  * to a specific filesystem type via the fstype parameter.
diff --git a/include/part.h b/include/part.h
index 7bf89f911d..f8b04b08b0 100644
--- a/include/part.h
+++ b/include/part.h
@@ -99,6 +99,12 @@ int host_get_dev_err(int dev, struct blk_desc **blk_devp);
 
 /* disk/part.c */
 int part_get_info(struct blk_desc *dev_desc, int part, disk_partition_t *info);
+/**
+ * part_get_info_whole_disk() - get partition info for the special case of
+ * a partition occupying the entire disk.
+ */
+int part_get_info_whole_disk(struct blk_desc *dev_desc, disk_partition_t *info);
+
 void part_print(struct blk_desc *dev_desc);
 void part_init(struct blk_desc *dev_desc);
 void dev_print(struct blk_desc *dev_desc);
@@ -204,6 +210,9 @@ static inline struct blk_desc *mg_disk_get_dev(int dev) { return NULL; }
 
 static inline int part_get_info(struct blk_desc *dev_desc, int part,
 				disk_partition_t *info) { return -1; }
+static inline int part_get_info_whole_disk(struct blk_desc *dev_desc,
+					   disk_partition_t *info)
+{ return -1; }
 static inline void part_print(struct blk_desc *dev_desc) {}
 static inline void part_init(struct blk_desc *dev_desc) {}
 static inline void dev_print(struct blk_desc *dev_desc) {}

commit 759bf728b00aed3ef743d04390586c741ddb6b3b
Author: Rob Clark <robdclark@gmail.com>
Date:   Sat Sep 9 13:15:54 2017 -0400

    UPSTREAM: fat/fs: convert to directory iterators
    
    And drop a whole lot of ugly code!
    
    Change-Id: Ie4e132aae98f00738ba7cebae70209bf38cd5802
    Signed-off-by: Rob Clark <robdclark@gmail.com>
    Reviewed-by: Łukasz Majewski <lukma@denx.de>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 8eafae209c35932d9a6560809c55ee4641534236)

diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index ee2bbe38f1..bbba7947ee 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -118,22 +118,6 @@ int fat_register_device(struct blk_desc *dev_desc, int part_no)
 	return fat_set_blk_dev(dev_desc, &info);
 }
 
-/*
- * Get the first occurence of a directory delimiter ('/' or '\') in a string.
- * Return index into string if found, -1 otherwise.
- */
-static int dirdelim(char *str)
-{
-	char *start = str;
-
-	while (*str != '\0') {
-		if (ISDIRDELIM(*str))
-			return str - start;
-		str++;
-	}
-	return -1;
-}
-
 /*
  * Extract zero terminated short name from a directory entry.
  */
@@ -468,95 +452,6 @@ static int slot2str(dir_slot *slotptr, char *l_name, int *idx)
 	return 0;
 }
 
-/*
- * Extract the full long filename starting at 'retdent' (which is really
- * a slot) into 'l_name'. If successful also copy the real directory entry
- * into 'retdent'
- * Return 0 on success, -1 otherwise.
- */
-static int
-get_vfatname(fsdata *mydata, int curclust, __u8 *cluster,
-	     dir_entry *retdent, char *l_name)
-{
-	dir_entry *realdent;
-	dir_slot *slotptr = (dir_slot *)retdent;
-	__u8 *buflimit = cluster + mydata->sect_size * ((curclust == 0) ?
-							PREFETCH_BLOCKS :
-							mydata->clust_size);
-	__u8 counter = (slotptr->id & ~LAST_LONG_ENTRY_MASK) & 0xff;
-	int idx = 0;
-
-	if (counter > VFAT_MAXSEQ) {
-		debug("Error: VFAT name is too long\n");
-		return -1;
-	}
-
-	while ((__u8 *)slotptr < buflimit) {
-		if (counter == 0)
-			break;
-		if (((slotptr->id & ~LAST_LONG_ENTRY_MASK) & 0xff) != counter)
-			return -1;
-		slotptr++;
-		counter--;
-	}
-
-	if ((__u8 *)slotptr >= buflimit) {
-		dir_slot *slotptr2;
-
-		if (curclust == 0)
-			return -1;
-		curclust = get_fatent(mydata, curclust);
-		if (CHECK_CLUST(curclust, mydata->fatsize)) {
-			debug("curclust: 0x%x\n", curclust);
-			printf("Invalid FAT entry\n");
-			return -1;
-		}
-
-		if (get_cluster(mydata, curclust, get_contents_vfatname_block,
-				mydata->clust_size * mydata->sect_size) != 0) {
-			debug("Error: reading directory block\n");
-			return -1;
-		}
-
-		slotptr2 = (dir_slot *)get_contents_vfatname_block;
-		while (counter > 0) {
-			if (((slotptr2->id & ~LAST_LONG_ENTRY_MASK)
-			    & 0xff) != counter)
-				return -1;
-			slotptr2++;
-			counter--;
-		}
-
-		/* Save the real directory entry */
-		realdent = (dir_entry *)slotptr2;
-		while ((__u8 *)slotptr2 > get_contents_vfatname_block) {
-			slotptr2--;
-			slot2str(slotptr2, l_name, &idx);
-		}
-	} else {
-		/* Save the real directory entry */
-		realdent = (dir_entry *)slotptr;
-	}
-
-	do {
-		slotptr--;
-		if (slot2str(slotptr, l_name, &idx))
-			break;
-	} while (!(slotptr->id & LAST_LONG_ENTRY_MASK));
-
-	l_name[idx] = '\0';
-	if (*l_name == DELETED_FLAG)
-		*l_name = '\0';
-	else if (*l_name == aRING)
-		*l_name = DELETED_FLAG;
-	downcase(l_name);
-
-	/* Return the real directory entry */
-	memcpy(retdent, realdent, sizeof(dir_entry));
-
-	return 0;
-}
-
 /* Calculate short name checksum */
 static __u8 mkcksum(const char name[8], const char ext[3])
 {
@@ -573,169 +468,13 @@ static __u8 mkcksum(const char name[8], const char ext[3])
 }
 
 /*
- * Get the directory entry associated with 'filename' from the directory
- * starting at 'startsect'
+ * TODO these should go away once fat_write is reworked to use the
+ * directory iterator
  */
 __u8 get_dentfromdir_block[MAX_CLUSTSIZE]
 	__aligned(ARCH_DMA_MINALIGN);
-
-static dir_entry *get_dentfromdir(fsdata *mydata, int startsect,
-				  char *filename, dir_entry *retdent,
-				  int dols)
-{
-	__u16 prevcksum = 0xffff;
-	__u32 curclust = START(retdent);
-	int files = 0, dirs = 0;
-
-	debug("get_dentfromdir: %s\n", filename);
-
-	while (1) {
-		dir_entry *dentptr;
-
-		int i;
-
-		if (get_cluster(mydata, curclust, get_dentfromdir_block,
-				mydata->clust_size * mydata->sect_size) != 0) {
-			debug("Error: reading directory block\n");
-			return NULL;
-		}
-
-		dentptr = (dir_entry *)get_dentfromdir_block;
-
-		for (i = 0; i < DIRENTSPERCLUST; i++) {
-			char s_name[14], l_name[VFAT_MAXLEN_BYTES];
-
-			l_name[0] = '\0';
-			if (dentptr->name[0] == DELETED_FLAG) {
-				dentptr++;
-				continue;
-			}
-			if ((dentptr->attr & ATTR_VOLUME)) {
-				if (vfat_enabled &&
-				    (dentptr->attr & ATTR_VFAT) == ATTR_VFAT &&
-				    (dentptr->name[0] & LAST_LONG_ENTRY_MASK)) {
-					prevcksum = ((dir_slot *)dentptr)->alias_checksum;
-					get_vfatname(mydata, curclust,
-						     get_dentfromdir_block,
-						     dentptr, l_name);
-					if (dols) {
-						int isdir;
-						char dirc;
-						int doit = 0;
-
-						isdir = (dentptr->attr & ATTR_DIR);
-
-						if (isdir) {
-							dirs++;
-							dirc = '/';
-							doit = 1;
-						} else {
-							dirc = ' ';
-							if (l_name[0] != 0) {
-								files++;
-								doit = 1;
-							}
-						}
-						if (doit) {
-							if (dirc == ' ') {
-								printf(" %8u   %s%c\n",
-								       FAT2CPU32(dentptr->size),
-									l_name,
-									dirc);
-							} else {
-								printf("            %s%c\n",
-									l_name,
-									dirc);
-							}
-						}
-						dentptr++;
-						continue;
-					}
-					debug("vfatname: |%s|\n", l_name);
-				} else {
-					/* Volume label or VFAT entry */
-					dentptr++;
-					continue;
-				}
-			}
-			if (dentptr->name[0] == 0) {
-				if (dols) {
-					printf("\n%d file(s), %d dir(s)\n\n",
-						files, dirs);
-				}
-				debug("Dentname == NULL - %d\n", i);
-				return NULL;
-			}
-			if (vfat_enabled) {
-				__u8 csum = mkcksum(dentptr->name, dentptr->ext);
-				if (dols && csum == prevcksum) {
-					prevcksum = 0xffff;
-					dentptr++;
-					continue;
-				}
-			}
-
-			get_name(dentptr, s_name);
-			if (dols) {
-				int isdir = (dentptr->attr & ATTR_DIR);
-				char dirc;
-				int doit = 0;
-
-				if (isdir) {
-					dirs++;
-					dirc = '/';
-					doit = 1;
-				} else {
-					dirc = ' ';
-					if (s_name[0] != 0) {
-						files++;
-						doit = 1;
-					}
-				}
-
-				if (doit) {
-					if (dirc == ' ') {
-						printf(" %8u   %s%c\n",
-						       FAT2CPU32(dentptr->size),
-							s_name, dirc);
-					} else {
-						printf("            %s%c\n",
-							s_name, dirc);
-					}
-				}
-
-				dentptr++;
-				continue;
-			}
-
-			if (strcmp(filename, s_name)
-			    && strcmp(filename, l_name)) {
-				debug("Mismatch: |%s|%s|\n", s_name, l_name);
-				dentptr++;
-				continue;
-			}
-
-			memcpy(retdent, dentptr, sizeof(dir_entry));
-
-			debug("DentName: %s", s_name);
-			debug(", start: 0x%x", START(dentptr));
-			debug(", size:  0x%x %s\n",
-			      FAT2CPU32(dentptr->size),
-			      (dentptr->attr & ATTR_DIR) ? "(DIR)" : "");
-
-			return retdent;
-		}
-
-		curclust = get_fatent(mydata, curclust);
-		if (CHECK_CLUST(curclust, mydata->fatsize)) {
-			debug("curclust: 0x%x\n", curclust);
-			printf("Invalid FAT entry\n");
-			return NULL;
-		}
-	}
-
-	return NULL;
-}
+__u8 do_fat_read_at_block[MAX_CLUSTSIZE]
+	__aligned(ARCH_DMA_MINALIGN);
 
 /*
  * Read boot sector and volume info from a FAT filesystem
@@ -879,374 +618,6 @@ static int get_fs_info(fsdata *mydata)
 	return 0;
 }
 
-__u8 do_fat_read_at_block[MAX_CLUSTSIZE]
-	__aligned(ARCH_DMA_MINALIGN);
-
-int do_fat_read_at(const char *filename, loff_t pos, void *buffer,
-		   loff_t maxsize, int dols, int dogetsize, loff_t *size)
-{
-	char fnamecopy[2048];
-	fsdata datablock;
-	fsdata *mydata = &datablock;
-	dir_entry *dentptr = NULL;
-	__u16 prevcksum = 0xffff;
-	char *subname = "";
-	__u32 cursect;
-	int idx, isdir = 0;
-	int files = 0, dirs = 0;
-	int ret = -1;
-	int firsttime;
-	__u32 root_cluster = 0;
-	__u32 read_blk;
-	int rootdir_size = 0;
-	int buffer_blk_cnt;
-	int do_read;
-	__u8 *dir_ptr;
-
-	if (get_fs_info(mydata))
-		return -1;
-
-	cursect = mydata->rootdir_sect;
-
-	/* "cwd" is always the root... */
-	while (ISDIRDELIM(*filename))
-		filename++;
-
-	/* Make a copy of the filename and convert it to lowercase */
-	strcpy(fnamecopy, filename);
-	downcase(fnamecopy);
-
-root_reparse:
-	if (*fnamecopy == '\0') {
-		if (!dols)
-			goto exit;
-
-		dols = LS_ROOT;
-	} else if ((idx = dirdelim(fnamecopy)) >= 0) {
-		isdir = 1;
-		fnamecopy[idx] = '\0';
-		subname = fnamecopy + idx + 1;
-
-		/* Handle multiple delimiters */
-		while (ISDIRDELIM(*subname))
-			subname++;
-	} else if (dols) {
-		isdir = 1;
-	}
-
-	buffer_blk_cnt = 0;
-	firsttime = 1;
-	while (1) {
-		int i;
-
-		if (mydata->fatsize == 32 || firsttime) {
-			dir_ptr = do_fat_read_at_block;
-			firsttime = 0;
-		} else {
-			/**
-			 * FAT16 sector buffer modification:
-			 * Each loop, the second buffered block is moved to
-			 * the buffer begin, and two next sectors are read
-			 * next to the previously moved one. So the sector
-			 * buffer keeps always 3 sectors for fat16.
-			 * And the current sector is the buffer second sector
-			 * beside the "firsttime" read, when it is the first one.
-			 *
-			 * PREFETCH_BLOCKS is 2 for FAT16 == loop[0:1]
-			 * n = computed root dir sector
-			 * loop |  cursect-1  | cursect    | cursect+1  |
-			 *   0  |  sector n+0 | sector n+1 | none       |
-			 *   1  |  none       | sector n+0 | sector n+1 |
-			 *   0  |  sector n+1 | sector n+2 | sector n+3 |
-			 *   1  |  sector n+3 | ...
-			*/
-			dir_ptr = (do_fat_read_at_block + mydata->sect_size);
-			memcpy(do_fat_read_at_block, dir_ptr, mydata->sect_size);
-		}
-
-		do_read = 1;
-
-		if (mydata->fatsize == 32 && buffer_blk_cnt)
-			do_read = 0;
-
-		if (do_read) {
-			read_blk = (mydata->fatsize == 32) ?
-				    mydata->clust_size : PREFETCH_BLOCKS;
-
-			debug("FAT read(sect=%d, cnt:%d), clust_size=%d, DIRENTSPERBLOCK=%zd\n",
-				cursect, read_blk, mydata->clust_size, DIRENTSPERBLOCK);
-
-			if (disk_read(cursect, read_blk, dir_ptr) < 0) {
-				debug("Error: reading rootdir block\n");
-				goto exit;
-			}
-
-			dentptr = (dir_entry *)dir_ptr;
-		}
-
-		for (i = 0; i < DIRENTSPERBLOCK; i++) {
-			char s_name[14], l_name[VFAT_MAXLEN_BYTES];
-			__u8 csum;
-
-			l_name[0] = '\0';
-			if (dentptr->name[0] == DELETED_FLAG) {
-				dentptr++;
-				continue;
-			}
-
-			if (vfat_enabled)
-				csum = mkcksum(dentptr->name, dentptr->ext);
-
-			if (dentptr->attr & ATTR_VOLUME) {
-				if (vfat_enabled &&
-				    (dentptr->attr & ATTR_VFAT) == ATTR_VFAT &&
-				    (dentptr->name[0] & LAST_LONG_ENTRY_MASK)) {
-					prevcksum =
-						((dir_slot *)dentptr)->alias_checksum;
-
-					get_vfatname(mydata,
-						     root_cluster,
-						     dir_ptr,
-						     dentptr, l_name);
-
-					if (dols == LS_ROOT) {
-						char dirc;
-						int doit = 0;
-						int isdir =
-							(dentptr->attr & ATTR_DIR);
-
-						if (isdir) {
-							dirs++;
-							dirc = '/';
-							doit = 1;
-						} else {
-							dirc = ' ';
-							if (l_name[0] != 0) {
-								files++;
-								doit = 1;
-							}
-						}
-						if (doit) {
-							if (dirc == ' ') {
-								printf(" %8u   %s%c\n",
-								       FAT2CPU32(dentptr->size),
-									l_name,
-									dirc);
-							} else {
-								printf("            %s%c\n",
-									l_name,
-									dirc);
-							}
-						}
-						dentptr++;
-						continue;
-					}
-					debug("Rootvfatname: |%s|\n",
-					       l_name);
-				} else {
-					/* Volume label or VFAT entry */
-					dentptr++;
-					continue;
-				}
-			} else if (dentptr->name[0] == 0) {
-				debug("RootDentname == NULL - %d\n", i);
-				if (dols == LS_ROOT) {
-					printf("\n%d file(s), %d dir(s)\n\n",
-						files, dirs);
-					ret = 0;
-				}
-				goto exit;
-			}
-			else if (vfat_enabled &&
-				 dols == LS_ROOT && csum == prevcksum) {
-				prevcksum = 0xffff;
-				dentptr++;
-				continue;
-			}
-
-			get_name(dentptr, s_name);
-
-			if (dols == LS_ROOT) {
-				int isdir = (dentptr->attr & ATTR_DIR);
-				char dirc;
-				int doit = 0;
-
-				if (isdir) {
-					dirc = '/';
-					if (s_name[0] != 0) {
-						dirs++;
-						doit = 1;
-					}
-				} else {
-					dirc = ' ';
-					if (s_name[0] != 0) {
-						files++;
-						doit = 1;
-					}
-				}
-				if (doit) {
-					if (dirc == ' ') {
-						printf(" %8u   %s%c\n",
-						       FAT2CPU32(dentptr->size),
-							s_name, dirc);
-					} else {
-						printf("            %s%c\n",
-							s_name, dirc);
-					}
-				}
-				dentptr++;
-				continue;
-			}
-
-			if (strcmp(fnamecopy, s_name)
-			    && strcmp(fnamecopy, l_name)) {
-				debug("RootMismatch: |%s|%s|\n", s_name,
-				       l_name);
-				dentptr++;
-				continue;
-			}
-
-			if (isdir && !(dentptr->attr & ATTR_DIR))
-				goto exit;
-
-			debug("RootName: %s", s_name);
-			debug(", start: 0x%x", START(dentptr));
-			debug(", size:  0x%x %s\n",
-			       FAT2CPU32(dentptr->size),
-			       isdir ? "(DIR)" : "");
-
-			goto rootdir_done;	/* We got a match */
-		}
-		debug("END LOOP: buffer_blk_cnt=%d   clust_size=%d\n", buffer_blk_cnt,
-		       mydata->clust_size);
-
-		/*
-		 * On FAT32 we must fetch the FAT entries for the next
-		 * root directory clusters when a cluster has been
-		 * completely processed.
-		 */
-		++buffer_blk_cnt;
-		int rootdir_end = 0;
-		if (mydata->fatsize == 32) {
-			if (buffer_blk_cnt == mydata->clust_size) {
-				int nxtsect = 0;
-				int nxt_clust = 0;
-
-				nxt_clust = get_fatent(mydata, root_cluster);
-				rootdir_end = CHECK_CLUST(nxt_clust, 32);
-
-				nxtsect = mydata->data_begin +
-					(nxt_clust * mydata->clust_size);
-
-				root_cluster = nxt_clust;
-
-				cursect = nxtsect;
-				buffer_blk_cnt = 0;
-			}
-		} else {
-			if (buffer_blk_cnt == PREFETCH_BLOCKS)
-				buffer_blk_cnt = 0;
-
-			rootdir_end = (++cursect - mydata->rootdir_sect >=
-				       rootdir_size);
-		}
-
-		/* If end of rootdir reached */
-		if (rootdir_end) {
-			if (dols == LS_ROOT) {
-				printf("\n%d file(s), %d dir(s)\n\n",
-				       files, dirs);
-				*size = 0;
-			}
-			goto exit;
-		}
-	}
-rootdir_done:
-
-	firsttime = 1;
-
-	while (isdir) {
-		int startsect = mydata->data_begin
-			+ START(dentptr) * mydata->clust_size;
-		dir_entry dent;
-		char *nextname = NULL;
-
-		dent = *dentptr;
-		dentptr = &dent;
-
-		idx = dirdelim(subname);
-
-		if (idx >= 0) {
-			subname[idx] = '\0';
-			nextname = subname + idx + 1;
-			/* Handle multiple delimiters */
-			while (ISDIRDELIM(*nextname))
-				nextname++;
-			if (dols && *nextname == '\0')
-				firsttime = 0;
-		} else {
-			if (dols && firsttime) {
-				firsttime = 0;
-			} else {
-				isdir = 0;
-			}
-		}
-
-		if (get_dentfromdir(mydata, startsect, subname, dentptr,
-				     isdir ? 0 : dols) == NULL) {
-			if (dols && !isdir)
-				*size = 0;
-			goto exit;
-		}
-
-		if (isdir && !(dentptr->attr & ATTR_DIR))
-			goto exit;
-
-		/*
-		 * If we are looking for a directory, and found a directory
-		 * type entry, and the entry is for the root directory (as
-		 * denoted by a cluster number of 0), jump back to the start
-		 * of the function, since at least on FAT12/16, the root dir
-		 * lives in a hard-coded location and needs special handling
-		 * to parse, rather than simply following the cluster linked
-		 * list in the FAT, like other directories.
-		 */
-		if (isdir && (dentptr->attr & ATTR_DIR) && !START(dentptr)) {
-			/*
-			 * Modify the filename to remove the prefix that gets
-			 * back to the root directory, so the initial root dir
-			 * parsing code can continue from where we are without
-			 * confusion.
-			 */
-			strcpy(fnamecopy, nextname ?: "");
-			/*
-			 * Set up state the same way as the function does when
-			 * first started. This is required for the root dir
-			 * parsing code operates in its expected environment.
-			 */
-			subname = "";
-			cursect = mydata->rootdir_sect;
-			isdir = 0;
-			goto root_reparse;
-		}
-
-		if (idx >= 0)
-			subname = nextname;
-	}
-
-	if (dogetsize) {
-		*size = FAT2CPU32(dentptr->size);
-		ret = 0;
-	} else {
-		ret = get_contents(mydata, dentptr, pos, buffer, maxsize, size);
-	}
-	debug("Size: %u, got: %llu\n", FAT2CPU32(dentptr->size), *size);
-
-exit:
-	free(mydata->fatbuf);
-	return ret;
-}
-
 
 /*
  * Directory iterator, to simplify filesystem traversal
@@ -1595,12 +966,6 @@ static int fat_itr_resolve(fat_itr *itr, const char *path, unsigned type)
 	return -ENOENT;
 }
 
-int do_fat_read(const char *filename, void *buffer, loff_t maxsize, int dols,
-		loff_t *actread)
-{
-	return do_fat_read_at(filename, 0, buffer, maxsize, dols, 0, actread);
-}
-
 int file_fat_detectfs(void)
 {
 	boot_sector bs;
@@ -1665,31 +1030,96 @@ int file_fat_detectfs(void)
 
 int file_fat_ls(const char *dir)
 {
-	loff_t size;
+	fsdata fsdata;
+	fat_itr itrblock, *itr = &itrblock;
+	int files = 0, dirs = 0;
+	int ret;
+
+	ret = fat_itr_root(itr, &fsdata);
+	if (ret)
+		return ret;
+
+	ret = fat_itr_resolve(itr, dir, TYPE_DIR);
+	if (ret)
+		return ret;
+
+	while (fat_itr_next(itr)) {
+		if (fat_itr_isdir(itr)) {
+			printf("            %s/\n", itr->name);
+			dirs++;
+		} else {
+			printf(" %8u   %s\n",
+			       FAT2CPU32(itr->dent->size),
+			       itr->name);
+			files++;
+		}
+	}
 
-	return do_fat_read(dir, NULL, 0, LS_YES, &size);
+	printf("\n%d file(s), %d dir(s)\n\n", files, dirs);
+
+	return 0;
 }
 
 int fat_exists(const char *filename)
 {
+	fsdata fsdata;
+	fat_itr itrblock, *itr = &itrblock;
 	int ret;
-	loff_t size;
 
-	ret = do_fat_read_at(filename, 0, NULL, 0, LS_NO, 1, &size);
+	ret = fat_itr_root(itr, &fsdata);
+	if (ret)
+		return 0;
+
+	ret = fat_itr_resolve(itr, filename, TYPE_ANY);
 	return ret == 0;
 }
 
 int fat_size(const char *filename, loff_t *size)
 {
-	return do_fat_read_at(filename, 0, NULL, 0, LS_NO, 1, size);
+	fsdata fsdata;
+	fat_itr itrblock, *itr = &itrblock;
+	int ret;
+
+	ret = fat_itr_root(itr, &fsdata);
+	if (ret)
+		return ret;
+
+	ret = fat_itr_resolve(itr, filename, TYPE_FILE);
+	if (ret) {
+		/*
+		 * Directories don't have size, but fs_size() is not
+		 * expected to fail if passed a directory path:
+		 */
+		fat_itr_root(itr, &fsdata);
+		if (!fat_itr_resolve(itr, filename, TYPE_DIR)) {
+			*size = 0;
+			return 0;
+		}
+		return ret;
+	}
+
+	*size = FAT2CPU32(itr->dent->size);
+
+	return 0;
 }
 
 int file_fat_read_at(const char *filename, loff_t pos, void *buffer,
 		     loff_t maxsize, loff_t *actread)
 {
+	fsdata fsdata;
+	fat_itr itrblock, *itr = &itrblock;
+	int ret;
+
+	ret = fat_itr_root(itr, &fsdata);
+	if (ret)
+		return ret;
+
+	ret = fat_itr_resolve(itr, filename, TYPE_FILE);
+	if (ret)
+		return ret;
+
 	printf("reading %s\n", filename);
-	return do_fat_read_at(filename, pos, buffer, maxsize, LS_NO, 0,
-			      actread);
+	return get_contents(&fsdata, itr->dent, pos, buffer, maxsize, actread);
 }
 
 int file_fat_read(const char *filename, void *buffer, int maxsize)
diff --git a/include/fat.h b/include/fat.h
index 21bb6666cf..18d8981c48 100644
--- a/include/fat.h
+++ b/include/fat.h
@@ -58,12 +58,6 @@
  */
 #define LAST_LONG_ENTRY_MASK	0x40
 
-/* Flags telling whether we should read a file or list a directory */
-#define LS_NO		0
-#define LS_YES		1
-#define LS_DIR		1
-#define LS_ROOT		2
-
 #define ISDIRDELIM(c)	((c) == '/' || (c) == '\\')
 
 #define FSTYPE_NONE	(-1)

commit e9aba365698e2b7aa9ae9c3bf7a6b271ef83feb1
Author: Peter Jones <pjones@redhat.com>
Date:   Wed Sep 13 18:05:25 2017 -0400

    UPSTREAM: part: extract MBR signature from partitions
    
    EFI client programs need the signature information from the partition
    table to determine the disk a partition is on, so we need to fill that
    in here.
    
    Change-Id: I27b62e383a2003e82e5424859bc9574d3b2190a2
    Signed-off-by: Peter Jones <pjones@redhat.com>
    [separated from efi_loader part, and fixed build-errors for non-
     CONFIG_EFI_PARTITION case]
    Signed-off-by: Rob Clark <robdclark@gmail.com>
    Signed-off-by: Alexander Graf <agraf@suse.de>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit ff98cb90514d9b787ddc097c203ac8db2941efe1)

diff --git a/disk/part_dos.c b/disk/part_dos.c
index 7ede15ec26..850a538e83 100644
--- a/disk/part_dos.c
+++ b/disk/part_dos.c
@@ -89,14 +89,20 @@ static int test_block_type(unsigned char *buffer)
 
 static int part_test_dos(struct blk_desc *dev_desc)
 {
-	ALLOC_CACHE_ALIGN_BUFFER(unsigned char, buffer, dev_desc->blksz);
+	ALLOC_CACHE_ALIGN_BUFFER(legacy_mbr, mbr, dev_desc->blksz);
 
-	if (blk_dread(dev_desc, 0, 1, (ulong *)buffer) != 1)
+	if (blk_dread(dev_desc, 0, 1, (ulong *)mbr) != 1)
 		return -1;
 
-	if (test_block_type(buffer) != DOS_MBR)
+	if (test_block_type((unsigned char *)mbr) != DOS_MBR)
 		return -1;
 
+	if (dev_desc->sig_type == SIG_TYPE_NONE &&
+	    mbr->unique_mbr_signature != 0) {
+		dev_desc->sig_type = SIG_TYPE_MBR;
+		dev_desc->mbr_sig = mbr->unique_mbr_signature;
+	}
+
 	return 0;
 }
 
diff --git a/disk/part_efi.c b/disk/part_efi.c
index b43b8b3d19..58bb3d5627 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -931,11 +931,19 @@ static int is_pmbr_valid(legacy_mbr * mbr)
 static int is_gpt_valid(struct blk_desc *dev_desc, u64 lba,
 			gpt_header *pgpt_head, gpt_entry **pgpt_pte)
 {
+	ALLOC_CACHE_ALIGN_BUFFER(legacy_mbr, mbr, dev_desc->blksz);
+
 	if (!dev_desc || !pgpt_head) {
 		printf("%s: Invalid Argument(s)\n", __func__);
 		return 0;
 	}
 
+	/* Read MBR Header from device */
+	if (blk_dread(dev_desc, 0, 1, (ulong *)mbr) != 1) {
+		printf("*** ERROR: Can't read MBR header ***\n");
+		return 0;
+	}
+
 	/* Read GPT Header from device */
 	if (blk_dread(dev_desc, (lbaint_t)lba, 1, pgpt_head) != 1) {
 		printf("*** ERROR: Can't read GPT header ***\n");
@@ -945,6 +953,18 @@ static int is_gpt_valid(struct blk_desc *dev_desc, u64 lba,
 	if (validate_gpt_header(pgpt_head, (lbaint_t)lba, dev_desc->lba))
 		return 0;
 
+	if (dev_desc->sig_type == SIG_TYPE_NONE) {
+		efi_guid_t empty = {};
+		if (memcmp(&pgpt_head->disk_guid, &empty, sizeof(empty))) {
+			dev_desc->sig_type = SIG_TYPE_GUID;
+			memcpy(&dev_desc->guid_sig, &pgpt_head->disk_guid,
+			      sizeof(empty));
+		} else if (mbr->unique_mbr_signature != 0) {
+			dev_desc->sig_type = SIG_TYPE_MBR;
+			dev_desc->mbr_sig = mbr->unique_mbr_signature;
+		}
+	}
+
 	/* Read and allocate Partition Table Entries */
 	*pgpt_pte = alloc_read_gpt_entries(dev_desc, pgpt_head);
 	if (*pgpt_pte == NULL) {
diff --git a/include/blk.h b/include/blk.h
index 9cf5466662..d8e3825454 100644
--- a/include/blk.h
+++ b/include/blk.h
@@ -8,6 +8,8 @@
 #ifndef BLK_H
 #define BLK_H
 
+#include <efi.h>
+
 #ifdef CONFIG_SYS_64BIT_LBA
 typedef uint64_t lbaint_t;
 #define LBAFlength "ll"
@@ -43,6 +45,17 @@ enum if_type {
 #define BLK_PRD_SIZE		20
 #define BLK_REV_SIZE		8
 
+/*
+ * Identifies the partition table type (ie. MBR vs GPT GUID) signature
+ */
+enum sig_type {
+	SIG_TYPE_NONE,
+	SIG_TYPE_MBR,
+	SIG_TYPE_GUID,
+
+	SIG_TYPE_COUNT			/* Number of signature types */
+};
+
 /*
  * With driver model (CONFIG_BLK) this is uclass platform data, accessible
  * with dev_get_uclass_platdata(dev)
@@ -70,6 +83,11 @@ struct blk_desc {
 	char		vendor[BLK_VEN_SIZE + 1]; /* device vendor string */
 	char		product[BLK_PRD_SIZE + 1]; /* device product number */
 	char		revision[BLK_REV_SIZE + 1]; /* firmware revision */
+	enum sig_type	sig_type;	/* Partition table signature type */
+	union {
+		uint32_t mbr_sig;	/* MBR integer signature */
+		efi_guid_t guid_sig;	/* GPT GUID Signature */
+	};
 #if CONFIG_IS_ENABLED(BLK)
 	/*
 	 * For now we have a few functions which take struct blk_desc as a

commit e561b4d443b1e283902f22916d3790fb988a0517
Author: Rob Clark <robdclark@gmail.com>
Date:   Wed Sep 13 18:05:24 2017 -0400

    UPSTREAM: part: move efi_guid_t
    
    Prep work for next patch.
    
    Change-Id: Ic5e74b6843749af6cbd2de6141606019c34f716b
    Signed-off-by: Rob Clark <robdclark@gmail.com>
    Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Signed-off-by: Alexander Graf <agraf@suse.de>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 0d6ab32e3712fe7bc2e3aaf3d93e0d5910264df3)

diff --git a/include/efi.h b/include/efi.h
index 02b78b31b1..87b0b43f20 100644
--- a/include/efi.h
+++ b/include/efi.h
@@ -28,6 +28,10 @@
 
 struct efi_device_path;
 
+typedef struct {
+	u8 b[16];
+} efi_guid_t;
+
 #define EFI_BITS_PER_LONG	BITS_PER_LONG
 
 /*
diff --git a/include/part.h b/include/part.h
index 5739a2d37b..7bf89f911d 100644
--- a/include/part.h
+++ b/include/part.h
@@ -272,8 +272,9 @@ struct part_driver {
 #define U_BOOT_PART_TYPE(__name)					\
 	ll_entry_declare(struct part_driver, __name, part_driver)
 
-#if CONFIG_IS_ENABLED(EFI_PARTITION)
 #include <part_efi.h>
+
+#if CONFIG_IS_ENABLED(EFI_PARTITION)
 /* disk/part_efi.c */
 /**
  * write_gpt_table() - Write the GUID Partition Table to disk
diff --git a/include/part_efi.h b/include/part_efi.h
index 317c044795..31e6bc6e14 100644
--- a/include/part_efi.h
+++ b/include/part_efi.h
@@ -58,10 +58,6 @@
 /* linux/include/efi.h */
 typedef u16 efi_char16_t;
 
-typedef struct {
-	u8 b[16];
-} efi_guid_t;
-
 /* based on linux/include/genhd.h */
 struct partition {
 	u8 boot_ind;		/* 0x80 - active */

commit 10eca96895ada8ca2d38437746a3875270eb66a0
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Mon Aug 28 18:54:30 2017 +0200

    UPSTREAM: efi_loader: bootefi hello should use loadaddr
    
    Command 'bootefi hello' currently uses CONFIG_SYS_LOAD_ADDR
    as loading address.
    
    qemu machines have by default 128 MiB RAM.
    CONFIG_SYS_LOAD_ADDR for x86 is 0x20000000 (512 MiB).
    This causes 'bootefi hello' to fail.
    
    We should use the environment variable loadaddr if available.
    It defaults to 0x1000000 (16 MiB) on qemu_x86.
    
    Change-Id: Iff6bfbd6c93f115f7f616c42b6e1c2dc4d61e156
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Signed-off-by: Alexander Graf <agraf@suse.de>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 51c533fdce75fbdec7de28a05a675a553d209bcb)

diff --git a/cmd/bootefi.c b/cmd/bootefi.c
index 3196d86040..c65c619d63 100644
--- a/cmd/bootefi.c
+++ b/cmd/bootefi.c
@@ -299,7 +299,11 @@ static int do_bootefi(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	if (!strcmp(argv[1], "hello")) {
 		ulong size = __efi_hello_world_end - __efi_hello_world_begin;
 
-		addr = CONFIG_SYS_LOAD_ADDR;
+		saddr = env_get("loadaddr");
+		if (saddr)
+			addr = simple_strtoul(saddr, NULL, 16);
+		else
+			addr = CONFIG_SYS_LOAD_ADDR;
 		memcpy((char *)addr, __efi_hello_world_begin, size);
 	} else
 #endif

commit 67f537f2b376763e717f6a2d4cb38c0b59a5f624
Author: Klaus Goger <klaus.goger@theobroma-systems.com>
Date:   Fri Sep 15 14:46:04 2017 +0200

    UPSTREAM: rockchip: puma_rk3399: increase serialno_str size
    
    Increase serialno_str to 17 bytes so it can hold the 16 bytes long serial
    nummer and the terminating null byte added by snprintf.
    
    Change-Id: Ie419f2d41ec8af598601d8726416cbaec1767266
    Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 60d7c50945d65185a5c86c4f52d4671fb59292e3)

diff --git a/board/theobroma-systems/puma_rk3399/puma-rk3399.c b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
index c6f8eed0c9..45d56cd99e 100644
--- a/board/theobroma-systems/puma_rk3399/puma-rk3399.c
+++ b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
@@ -107,7 +107,7 @@ static void setup_serial(void)
 	u8 low[cpuid_length/2], high[cpuid_length/2];
 	char cpuid_str[cpuid_length * 2 + 1];
 	u64 serialno;
-	char serialno_str[16];
+	char serialno_str[17];
 
 	/* retrieve the device */
 	ret = uclass_get_device_by_driver(UCLASS_MISC,

commit 9ec27623299bbe7b06c2fc0b1b4ae79116982a90
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Aug 14 19:05:33 2017 +0200

    UPSTREAM: rockchip: dts: rk3368: reduce the number of nodes seen in TPL
    
    The RK3368 TPL stage always returns to the BootROM, so it has no need
    for the eMMC, SD and SPI nodes.  This marks those nodes (that should
    be included in SPL, but not TPL) as 'u-boot,dm-spl'.
    
    Change-Id: I0c3d65554f01de403dd48e446991d2a545cd74fb
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 75ff0578515665a1b712275deb73be29e5ad8773)

diff --git a/arch/arm/dts/rk3368-lion-u-boot.dtsi b/arch/arm/dts/rk3368-lion-u-boot.dtsi
index 1ec7d254af..a9b7f81c62 100644
--- a/arch/arm/dts/rk3368-lion-u-boot.dtsi
+++ b/arch/arm/dts/rk3368-lion-u-boot.dtsi
@@ -71,18 +71,18 @@
 };
 
 &emmc {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 };
 
 &sdmmc {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 };
 
 &spi1 {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 
 	spiflash: w25q32dw@0 {
-		u-boot,dm-pre-reloc;
+		u-boot,dm-spl;
 	};
 };
 

commit 532a7914a44e56507d84fe20dcb0675a3f20c17e
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Aug 14 19:05:32 2017 +0200

    UPSTREAM: rockchip: rk3368: adjust DMC driver for 32/64bit-aware OF_PLATDATA
    
    With the new 32/64bit-aware dtoc, the type of reg is fdt64_t and the
    OF_PLATDATA structure layout changes.  This adjusts the DMC driver for
    the RK3368 to track these changes.
    
    For the time being (i.e. until regmap_init_mem_platdata works for the
    64bit case), we won't use regmap_init_mem_platdata here and simply
    access of_plat.reg[] directly.
    
    Change-Id: I9e4e5b7cb650220902914f6ad724a8a312be93ba
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 1d70f0ac88dcd0ed9c17ec4c5e97db69de961319)

diff --git a/drivers/ram/rockchip/dmc-rk3368.c b/drivers/ram/rockchip/dmc-rk3368.c
index ca7b1ff0c8..7577ff0363 100644
--- a/drivers/ram/rockchip/dmc-rk3368.c
+++ b/drivers/ram/rockchip/dmc-rk3368.c
@@ -893,18 +893,11 @@ static int conv_of_platdata(struct udevice *dev)
 {
 	struct rk3368_sdram_params *plat = dev_get_platdata(dev);
 	struct dtd_rockchip_rk3368_dmc *of_plat = &plat->of_plat;
-	int ret;
 
 	plat->ddr_freq = of_plat->rockchip_ddr_frequency;
 	plat->ddr_speed_bin = of_plat->rockchip_ddr_speed_bin;
 	plat->memory_schedule = of_plat->rockchip_memory_schedule;
 
-	ret = regmap_init_mem_platdata(dev, of_plat->reg,
-				       ARRAY_SIZE(of_plat->reg) / 2,
-				       &plat->map);
-	if (ret)
-		return ret;
-
 	return 0;
 }
 #endif
@@ -933,8 +926,8 @@ static int rk3368_dmc_probe(struct udevice *dev)
 	debug("%s: pmugrf=%p\n", __func__, priv->pmugrf);
 
 #ifdef CONFIG_TPL_BUILD
-	pctl = regmap_get_range(plat->map, 0);
-	ddrphy = regmap_get_range(plat->map, 1);
+	pctl = (struct rk3368_ddr_pctl *)plat->of_plat.reg[0];
+	ddrphy = (struct rk3368_ddrphy *)plat->of_plat.reg[2];
 	msch = syscon_get_first_range(ROCKCHIP_SYSCON_MSCH);
 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 

commit 6c71f0465f53a879cd2389c4099a69129555e5fe
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Aug 14 19:05:31 2017 +0200

    UPSTREAM: rockchip: timer: update for 32/64bit-aware OF_PLATDATA
    
    With dtoc emitting fdt64_t for addresses (and region sizes), the array
    indices for accessing the reg[] array needs to be adjusted.  This
    adjusts the Rockchip DM timer driver to correctly handle OF_PLATDATA
    given this new structure layout.
    
    Change-Id: If5a5fec05c00a0d4c71e1b7550c399880d50908d
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 8158a848fa4d506d46a5193daf13367f3839022a)

diff --git a/drivers/timer/rockchip_timer.c b/drivers/timer/rockchip_timer.c
index 460eb82f6c..07d14482d6 100644
--- a/drivers/timer/rockchip_timer.c
+++ b/drivers/timer/rockchip_timer.c
@@ -140,7 +140,7 @@ static int rockchip_timer_probe(struct udevice *dev)
 	struct rockchip_timer_priv *priv = dev_get_priv(dev);
 	struct rockchip_timer_plat *plat = dev_get_platdata(dev);
 
-	priv->timer = map_sysmem(plat->dtd.reg[1], plat->dtd.reg[3]);
+	priv->timer = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);
 	uc_priv->clock_rate = plat->dtd.clock_frequency;
 #endif
 

commit 6094f89565252ace829ea7f0cd5ac486a9da5fbd
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Sep 12 17:32:29 2017 +0200

    UPSTREAM: rockchip: defconfig: puma-rk3399: enable OF_LIVE (live tree)
    
    With the critical drivers ready for switching to a live tree, we can
    now enable it in the defconfig for the RK3399-Q7.
    
    Change-Id: I6bc9f0cc8de2f8b40f7dfdb8b69271412914333d
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 7b87e3bfaf1ef1109da0f749040426c9e665c361)

diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig
index 1badf80beb..2ab2516c01 100644
--- a/configs/puma-rk3399_defconfig
+++ b/configs/puma-rk3399_defconfig
@@ -35,6 +35,7 @@ CONFIG_CMD_TIME=y
 CONFIG_CMD_PMIC=y
 CONFIG_CMD_REGULATOR=y
 CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_REGMAP=y

commit 63a453e638962c6147bbb5925ba3f1e474b4ad65
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Sep 12 17:32:26 2017 +0200

    UPSTREAM: rockchip: efuse: change to use dev_read_addr_ptr
    
    With the dev_read_addr_ptr function available, we can change the
    efuse driver to use it (and eliminate the explicit type-cast).
    
    Change-Id: I8183492892b77c8c6260070cee3104060e273c31
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit f6230a00579d5ca5ba01ca158f5c369cf64e87eb)

diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c
index b4ad19cfe8..f2fb736275 100644
--- a/drivers/misc/rockchip-efuse.c
+++ b/drivers/misc/rockchip-efuse.c
@@ -202,7 +202,7 @@ static int rockchip_efuse_ofdata_to_platdata(struct udevice *dev)
 {
 	struct rockchip_efuse_platdata *plat = dev_get_platdata(dev);
 
-	plat->base = (void *)dev_read_addr(dev);
+	plat->base = dev_read_addr_ptr(dev);
 	return 0;
 }
 

commit db4c0dc88d3c15ca24b1fb48e2b59c32e01a536d
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Sep 12 17:32:24 2017 +0200

    UPSTREAM: rockchip: clk: rk3399: Convert to livetree
    
    Update the clock driver for the RK3399  to support a live device tree.
    
    Change-Id: I2cc96fe00c9a1b2937f53da9b11fa56bd9e058bf
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 75c7859803a334a41c8bdf0a31cd1cd61f579076)

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 954bd2ce8c..dc25c24520 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -1025,7 +1025,7 @@ static int rk3399_clk_ofdata_to_platdata(struct udevice *dev)
 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
 	struct rk3399_clk_priv *priv = dev_get_priv(dev);
 
-	priv->cru = (struct rk3399_cru *)devfdt_get_addr(dev);
+	priv->cru = dev_read_addr_ptr(dev);
 #endif
 	return 0;
 }
@@ -1233,7 +1233,7 @@ static int rk3399_pmuclk_ofdata_to_platdata(struct udevice *dev)
 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
 	struct rk3399_pmuclk_priv *priv = dev_get_priv(dev);
 
-	priv->pmucru = (struct rk3399_pmucru *)devfdt_get_addr(dev);
+	priv->pmucru = dev_read_addr_ptr(dev);
 #endif
 	return 0;
 }

commit 8edf7c5aaf037ce6f80fbf363c82fecd0b542760
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Sep 12 17:30:57 2017 +0200

    UPSTREAM: rockchip: dts: rk3399-puma: replace 'rockchip, vbus-gpio' with fixed regulator
    
    On the RK3399-Q7, we need to turn on the on-module USB hub before using the
    USB host interfaces (only the OTG interface is directly connected to the edge
    connector).  This drops the deprecated 'rockchip,vbus-gpio' property and uses
    a fixed regulator to turn on the USB hub.
    
    References: 26a8b80 "usb: host: xhci-rockchip: use fixed regulator to control vbus"
    Change-Id: Idd2f6b48976e5ac25f06e40d6cc0cccc0e10c94b
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 46c89c8efa3e56ad8919b3a36663bb12582ed4d0)

diff --git a/arch/arm/dts/rk3399-puma.dtsi b/arch/arm/dts/rk3399-puma.dtsi
index dd1baea704..a04878e223 100644
--- a/arch/arm/dts/rk3399-puma.dtsi
+++ b/arch/arm/dts/rk3399-puma.dtsi
@@ -89,6 +89,17 @@
 		};
 	};
 
+	usbhub_enable: usbhub_enable {
+		compatible = "regulator-fixed";
+		regulator-name = "usbhub_enable";
+		enable-active-low;
+		gpio = <&gpio4 3 GPIO_ACTIVE_HIGH>;
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+	};
+
 	vccadc_ref: vccadc-ref {
 		compatible = "regulator-fixed";
 		regulator-name = "vcc1v8_sys";
@@ -514,7 +525,6 @@
 };
 
 &dwc3_typec1 {
-	rockchip,vbus-gpio = <&gpio4 3 GPIO_ACTIVE_LOW>;
 	status = "okay";
 };
 

commit cce8d7cd220b222744174be28b99868181a2bb8d
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Sep 12 17:30:56 2017 +0200

    UPSTREAM: rockchip: clk: rk3399: add clk_enable function and support USB HOST0/1
    
    The generic ehci-driver (ehci-generic.c) will try to enable the clocks
    listed in the DTSI. If this fails (e.g. due to clk_enable not being
    implemented in a driver and -ENOSYS being returned by the clk-uclass),
    the driver will bail our and print an error message.
    
    This implements a minimal clk_enable for the RK3399 and supports the
    clocks mandatory for the EHCI controllers; as these are enabled by
    default we simply return success.
    
    Change-Id: Ic38cdb4e599c1fd8534b5e998b970b4610ab7383
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 2f01a2b2149c4c38467eeeddde09ac48d379aed3)

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 95976ac4ae..954bd2ce8c 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -906,9 +906,24 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate)
 	return ret;
 }
 
+static int rk3399_clk_enable(struct clk *clk)
+{
+	switch (clk->id) {
+	case HCLK_HOST0:
+	case HCLK_HOST0_ARB:
+	case HCLK_HOST1:
+	case HCLK_HOST1_ARB:
+		return 0;
+	}
+
+	debug("%s: unsupported clk %ld\n", __func__, clk->id);
+	return -ENOENT;
+}
+
 static struct clk_ops rk3399_clk_ops = {
 	.get_rate = rk3399_clk_get_rate,
 	.set_rate = rk3399_clk_set_rate,
+	.enable = rk3399_clk_enable,
 };
 
 #ifdef CONFIG_SPL_BUILD

commit 1dc5824468703ab2d4ea8d3b4b251039b8c838ee
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Sep 4 20:32:58 2017 +0800

    UPSTREAM: rockchip: rk3368: add the missing target and pinctrl config for sheep board
    
    Add the missing target and pinctrl config for rk3368 sheep board
    
    Change-Id: Icf677ec8bd0ecc29797b2662ca0ad4369891a0fa
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 8ac884974a46ae2f206b4053ea32814303912b08)

diff --git a/configs/sheep-rk3368_defconfig b/configs/sheep-rk3368_defconfig
index b862a14751..a7991afae2 100644
--- a/configs/sheep-rk3368_defconfig
+++ b/configs/sheep-rk3368_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x1000
 CONFIG_ROCKCHIP_RK3368=y
+CONFIG_TARGET_SHEEP=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3368-sheep"
 CONFIG_DEBUG_UART=y
 CONFIG_ANDROID_BOOT_IMAGE=y
@@ -14,6 +15,7 @@ CONFIG_CLK=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
+CONFIG_PINCTRL_ROCKCHIP_RK3368=y
 CONFIG_RAM=y
 CONFIG_DEBUG_UART_BASE=0xFF1b0000
 CONFIG_DEBUG_UART_CLOCK=24000000

commit f6f2870aa8be25e1f665e534c90c724a3d35d0dc
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Sep 4 20:32:23 2017 +0800

    UPSTREAM: rockchip: rk3368: add ENV_MEM_LAYOUT to extra env settings
    
    Add the ENV_MEM_LAYOUT_SETTINGS to CONFIG_EXTRA_ENV_SETTINGS
    
    Change-Id: I4ccc38abe53379d429b2060e5b60d62fe4fef9e4
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit ffaefb885ee113d12c3ff78109beb43ba1884945)

diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h
index 734dd63636..20abb01cf8 100644
--- a/include/configs/rk3368_common.h
+++ b/include/configs/rk3368_common.h
@@ -60,6 +60,7 @@
 #include <config_distro_bootcmd.h>
 
 #define CONFIG_EXTRA_ENV_SETTINGS \
+	ENV_MEM_LAYOUT_SETTINGS	\
 	BOOTENV
 
 #endif

commit c19af67fed9f86a4776f6ff35b44b170bd872e77
Author: Jagan Teki <jagan@amarulasolutions.com>
Date:   Tue Sep 12 17:15:47 2017 +0530

    UPSTREAM: rk3288: Add Vyasa initial board support
    
    This patch adds support for Vyasa RK3288 initial board
    from Amarula Solutions.
    
    Change-Id: I50cc01993c16caa97a6b0f9019a5433bd30adc80
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit d55af074e5a8dc85fc78f468d1f8bc96ae8b6855)

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 0032a21377..9ea73115db 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -45,6 +45,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
 	rk3288-veyron-jerry.dtb \
 	rk3288-veyron-mickey.dtb \
 	rk3288-veyron-minnie.dtb \
+	rk3288-vyasa.dtb \
 	rk3328-evb.dtb \
 	rk3368-lion.dtb \
 	rk3368-sheep.dtb \
diff --git a/arch/arm/dts/rk3288-vyasa.dts b/arch/arm/dts/rk3288-vyasa.dts
new file mode 100644
index 0000000000..93a9c5ee09
--- /dev/null
+++ b/arch/arm/dts/rk3288-vyasa.dts
@@ -0,0 +1,327 @@
+/*
+ * Copyright (C) 2017 Jagan Teki <jagan@amarulasolutions.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "rk3288.dtsi"
+
+/ {
+	model = "Amarula Vyasa-RK3288";
+	compatible = "amarula,vyasa-rk3288", "rockchip,rk3288";
+
+	chosen {
+		stdout-path = &uart2;
+	};
+
+	memory {
+		device_type = "memory";
+		reg = <0 0x80000000>;
+	};
+
+	vcc_sd: sdmmc-regulator {
+		compatible = "regulator-fixed";
+		gpio = <&gpio7 RK_PB3 GPIO_ACTIVE_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&sdmmc_pwr>;
+		regulator-name = "vcc_sd";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		startup-delay-us = <100000>;
+		vin-supply = <&vcc_io>;
+	};
+
+	vcc_sys: vsys-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_sys";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+		regulator-boot-on;
+	};
+};
+
+&dmc {
+	rockchip,pctl-timing = <0x29a 0xc8 0x1f8 0x42 0x4e 0x4 0xea 0xa
+		0x5 0x0 0xa 0x7 0x19 0x24 0xa 0x7
+		0x5 0xa 0x5 0x200 0x5 0x10 0x40 0x0
+		0x1 0x7 0x7 0x4 0xc 0x43 0x100 0x0
+		0x5 0x0>;
+	rockchip,phy-timing = <0x48f9aab4 0xea0910 0x1002c200
+		0xa60 0x40 0x10 0x0>;
+	/* Add a dummy value to cause of-platdata think this is bytes */
+	rockchip,sdram-params = <0x30B25564 0x627 3 666000000 3 9 1>;
+};
+
+&cpu0 {
+	cpu0-supply = <&vdd_cpu>;
+};
+
+&i2c0 {
+	clock-frequency = <400000>;
+	status = "okay";
+
+	rk808: pmic@1b {
+		compatible = "rockchip,rk808";
+		reg = <0x1b>;
+		interrupt-parent = <&gpio0>;
+		interrupts = <RK_PA4 IRQ_TYPE_LEVEL_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pmic_int &global_pwroff>;
+		wakeup-source;
+		rockchip,system-power-controller;
+		#clock-cells = <1>;
+		clock-output-names = "xin32k", "rk808-clkout2";
+
+		vcc1-supply = <&vcc_sys>;
+		vcc2-supply = <&vcc_sys>;
+		vcc3-supply = <&vcc_sys>;
+		vcc4-supply = <&vcc_sys>;
+		vcc6-supply = <&vcc_sys>;
+		vcc7-supply = <&vcc_sys>;
+		vcc8-supply = <&vcc_io>;
+		vcc9-supply = <&vcc_sys>;
+		vcc10-supply = <&vcc_sys>;
+		vcc11-supply = <&vcc_sys>;
+		vcc12-supply = <&vcc_io>;
+
+		regulators {
+			vdd_cpu: vdd_log: DCDC_REG1 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <750000>;
+				regulator-max-microvolt = <1350000>;
+				regulator-name = "vdd_log";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vdd_gpu: DCDC_REG2 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <850000>;
+				regulator-max-microvolt = <1250000>;
+				regulator-name = "vdd_gpu";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1000000>;
+				};
+			};
+
+			vcc_ddr: DCDC_REG3 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-name = "vcc_ddr";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+				};
+			};
+
+			vcc_io: DCDC_REG4 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-name = "vcc_io";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3300000>;
+				};
+			};
+
+			vcca_tp: LDO_REG1 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-name = "vcc_tp";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3300000>;
+				};
+			};
+
+			vcc_codec: LDO_REG2 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-name = "vcc_codec";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vdd_10: LDO_REG3 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+				regulator-name = "vdd_10";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1000000>;
+				};
+			};
+
+			vcc_gps: LDO_REG4 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-name = "vcc_gps";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vccio_sd: LDO_REG5 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-name = "vccio_sd";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3300000>;
+				};
+			};
+
+			vcc10_lcd: LDO_REG6 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+				regulator-name = "vcc10_lcd";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vcc_18: LDO_REG7 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-name = "vcc_18";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vcc18_lcd: LDO_REG8 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-name = "vcc18_lcd";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vcc33_sd: SWITCH_REG1 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-name = "vcc33_sd";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+				};
+			};
+
+			vcc_lan: SWITCH_REG2 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-name = "vcc_lan";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+				};
+			};
+		};
+	};
+};
+
+&sdmmc {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+
+	bus-width = <4>;
+	cap-mmc-highspeed;
+	cap-sd-highspeed;
+	card-detect-delay = <200>;
+	disable-wp;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sdmmc_clk>, <&sdmmc_cmd>, <&sdmmc_cd>, <&sdmmc_bus4>;
+	vmmc-supply = <&vcc_sd>;
+	vqmmc-supply = <&vccio_sd>;
+};
+
+&uart2 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&wdt {
+	status = "okay";
+};
+
+&pinctrl {
+	u-boot,dm-pre-reloc;
+	pmic {
+		pmic_int: pmic-int {
+			rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+
+	sdmmc {
+		sdmmc_pwr: sdmmc-pwr {
+			rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};
diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig
index 1fecdd4add..8a51aca86f 100644
--- a/arch/arm/mach-rockchip/rk3288/Kconfig
+++ b/arch/arm/mach-rockchip/rk3288/Kconfig
@@ -95,6 +95,15 @@ config TARGET_POPMETAL_RK3288
 	  2GB DDR3. Expansion connectors provide access to I2C, SPI, UART,
 	  GPIOs and display interface.
 
+config TARGET_VYASA_RK3288
+	bool "Vyasa-RK3288"
+	select BOARD_LATE_INIT
+	help
+	  Vyasa is a RK3288-based development board with 2 USB ports,
+	  HDMI, VGA, micro-SD card, audio, WiFi  and Gigabit Ethernet, It
+	  also includes on-board eMMC and 2GB of SDRAM. Expansion connectors
+	  provide access to display pins, I2C, SPI, UART and GPIOs.
+
 config TARGET_ROCK2
 	bool "Radxa Rock 2"
 	select BOARD_LATE_INIT
@@ -148,6 +157,8 @@ config ROCKCHIP_SPL
 	  open source u-boot-spl binary, which can autodetect DDR deivce type and
 	  initialize.
 
+source "board/amarula/vyasa-rk3288/Kconfig"
+
 source "board/chipspark/popmetal_rk3288/Kconfig"
 
 source "board/firefly/firefly-rk3288/Kconfig"
diff --git a/board/amarula/vyasa-rk3288/Kconfig b/board/amarula/vyasa-rk3288/Kconfig
new file mode 100644
index 0000000000..8b8c30835e
--- /dev/null
+++ b/board/amarula/vyasa-rk3288/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_VYASA_RK3288
+
+config SYS_BOARD
+	default "vyasa-rk3288"
+
+config SYS_VENDOR
+	default "amarula"
+
+config SYS_CONFIG_NAME
+	default "vyasa-rk3288"
+
+endif
diff --git a/board/amarula/vyasa-rk3288/MAINTAINERS b/board/amarula/vyasa-rk3288/MAINTAINERS
new file mode 100644
index 0000000000..10397fcb4b
--- /dev/null
+++ b/board/amarula/vyasa-rk3288/MAINTAINERS
@@ -0,0 +1,6 @@
+VYASA RK3288
+M:	Jagan Teki <jagan@amarulasolutions.com>
+S:	Maintained
+F:	board/amarula/vyasa-rk3288
+F:	include/configs/vyasa-rk3288.h
+F:	configs/vyasa-rk3288_defconfig
diff --git a/board/amarula/vyasa-rk3288/Makefile b/board/amarula/vyasa-rk3288/Makefile
new file mode 100644
index 0000000000..7c0d5c0316
--- /dev/null
+++ b/board/amarula/vyasa-rk3288/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (C) 2017 Amarula Solutions
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y	+= vyasa-rk3288.o
diff --git a/board/amarula/vyasa-rk3288/vyasa-rk3288.c b/board/amarula/vyasa-rk3288/vyasa-rk3288.c
new file mode 100644
index 0000000000..ceee42c16e
--- /dev/null
+++ b/board/amarula/vyasa-rk3288/vyasa-rk3288.c
@@ -0,0 +1,7 @@
+/*
+ * Copyright (C) 2017 Amarula Solutions
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
diff --git a/configs/vyasa-rk3288_defconfig b/configs/vyasa-rk3288_defconfig
new file mode 100644
index 0000000000..7db7b0b6f9
--- /dev/null
+++ b/configs/vyasa-rk3288_defconfig
@@ -0,0 +1,63 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_ROCKCHIP_RK3288=y
+CONFIG_TARGET_VYASA_RK3288=y
+CONFIG_SPL_STACK_R_ADDR=0x80000
+CONFIG_DEFAULT_DEVICE_TREE="rk3288-vyasa"
+CONFIG_DEBUG_UART=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SILENT_CONSOLE=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_GPIO=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_PMIC=y
+CONFIG_CMD_REGULATOR=y
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_ISO_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_SPL_PARTITION_UUIDS=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+# CONFIG_SPL_SIMPLE_BUS is not set
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+# CONFIG_SPL_PINCTRL_FULL is not set
+CONFIG_PINCTRL_ROCKCHIP_RK3288=y
+CONFIG_DM_PMIC=y
+# CONFIG_SPL_PMIC_CHILDREN is not set
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_DEBUG_UART_BASE=0xff690000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550=y
+CONFIG_SYSRESET=y
+CONFIG_CONSOLE_SCROLL_LINES=10
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_CMD_DHRYSTONE=y
+CONFIG_ERRNO_STR=y
diff --git a/include/configs/vyasa-rk3288.h b/include/configs/vyasa-rk3288.h
new file mode 100644
index 0000000000..9d6c80f549
--- /dev/null
+++ b/include/configs/vyasa-rk3288.h
@@ -0,0 +1,23 @@
+/*
+ * Copyright (C) 2017 Amarula Solutions
+ *
+ * Configuration settings for Amarula Vyasa RK3288.
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define ROCKCHIP_DEVICE_SETTINGS
+#include <configs/rk3288_common.h>
+
+#undef BOOT_TARGET_DEVICES
+
+#define BOOT_TARGET_DEVICES(func) \
+	func(MMC, mmc, 1) \
+
+#define CONFIG_SYS_MMC_ENV_DEV 1
+#undef CONFIG_CMD_USB_MASS_STORAGE
+
+#endif

commit cd1142b38c3c352fb09315e7eb2b6be1eca51458
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Aug 29 18:24:05 2017 +0200

    UPSTREAM: rockchip: rk3399: spl: remove hard-coded addresses for GRF and SGRF
    
    On the RK3399, we will have either OF_PLATDATA or full OF_CONTROL
    enabled: this allows the use of syscon to retrieve the addresses of
    GRF and SGRF (except for the early debug UART setup, which runs so
    early that the device-model is not initialised).
    
    This removes the hard-coded addresses and goes through syscon to
    retrieve the base-addresses of GRF and SGRF. After that, we use
    the structure definitions to locate the respective registers.
    
    In addition to this, the inclusion of header files is also cleaned up:
    - all headers are included at the beginning (there was a spurious
      inclusion of the grf header from within a function)
    - all #include statements for unused headers are removed
    - the remaining #include statements are sorted (while keeping common.h
      included in front)
    
    Change-Id: I0ba923da4a178c9109a292e7196f6c4c35e1c24a
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit ba1657338b05337cea516dcfea6614c06f771613)

diff --git a/arch/arm/mach-rockchip/rk3399-board-spl.c b/arch/arm/mach-rockchip/rk3399-board-spl.c
index cae09da0c6..0b22526cf8 100644
--- a/arch/arm/mach-rockchip/rk3399-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3399-board-spl.c
@@ -5,19 +5,17 @@
  */
 
 #include <common.h>
-#include <debug_uart.h>
-#include <dm.h>
-#include <ram.h>
-#include <spl.h>
-#include <asm/gpio.h>
-#include <asm/io.h>
 #include <asm/arch/clock.h>
+#include <asm/arch/grf_rk3399.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/periph.h>
-#include <asm/arch/sdram.h>
-#include <asm/arch/timer.h>
+#include <asm/io.h>
+#include <debug_uart.h>
+#include <dm.h>
 #include <dm/pinctrl.h>
-#include <power/regulator.h>
+#include <ram.h>
+#include <spl.h>
+#include <syscon.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -53,7 +51,6 @@ void secure_timer_init(void)
 
 void board_debug_uart_init(void)
 {
-#include <asm/arch/grf_rk3399.h>
 #define GRF_BASE	0xff770000
 	struct rk3399_grf_regs * const grf = (void *)GRF_BASE;
 
@@ -80,13 +77,12 @@ void board_debug_uart_init(void)
 #endif
 }
 
-#define GRF_EMMCCORE_CON11 0xff77f02c
-#define SGRF_DDR_RGN_CON16 0xff330040
-#define SGRF_SLV_SECURE_CON4 0xff33e3d0
 void board_init_f(ulong dummy)
 {
 	struct udevice *pinctrl;
 	struct udevice *dev;
+	struct rk3399_pmusgrf_regs *sgrf;
+	struct rk3399_grf_regs *grf;
 	int ret;
 
 #define EARLY_UART
@@ -103,13 +99,7 @@ void board_init_f(ulong dummy)
 	printascii("U-Boot SPL board init");
 #endif
 
-	rk_clrsetreg(SGRF_DDR_RGN_CON16, 0x1FF, 0x200);
-	rk_clrreg(SGRF_SLV_SECURE_CON4, 0x2000);
-	/*  Emmc clock generator: disable the clock multipilier */
-	rk_clrreg(GRF_EMMCCORE_CON11, 0x0ff);
-
 	secure_timer_init();
-
 	ret = spl_early_init();
 	if (ret) {
 		debug("spl_early_init() failed: %d\n", ret);
@@ -125,8 +115,13 @@ void board_init_f(ulong dummy)
 	 * driver, which tries to DMA from/to the stack (likely)
 	 * located in this range.
 	 */
-	rk_clrsetreg(SGRF_DDR_RGN_CON16, 0x1FF, 0);
-	rk_clrreg(SGRF_SLV_SECURE_CON4, 0x2000);
+	sgrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUSGRF);
+	rk_clrsetreg(&sgrf->ddr_rgn_con[16], 0x1ff, 0);
+	rk_clrreg(&sgrf->slv_secure_con4, 0x2000);
+
+	/*  eMMC clock generator: disable the clock multipilier */
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	rk_clrreg(&grf->emmccore_con[11], 0x0ff);
 
 	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
 	if (ret) {

commit 4b4cac54f470d3c42b4c7752562b5bc6b796446a
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Sep 11 22:04:27 2017 +0200

    UPSTREAM: rockchip: lion-rk3368: defconfig: resync w/ OF_LIVE and BOOTSTAGE enabled
    
    This adds OF_LIVE and BOOTSTAGE support for the RK3368-uQ7 and
    regenerates the defconfig (picking up a few changes/reorderings) from
    upstream Kconfig changes.
    
    Change-Id: I80644ed20576f6c82edb84b5376807d4c2d4efb4
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit c254b29fef79a92948136855db41436392e2d28b)

diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig
index ca8eee57f1..ea8a2d7824 100644
--- a/configs/lion-rk3368_defconfig
+++ b/configs/lion-rk3368_defconfig
@@ -19,6 +19,11 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_FIT_SOURCE="board/theobroma-systems/lion_rk3368/fit_spl_atf.its"
+CONFIG_BOOTSTAGE=y
+CONFIG_SPL_BOOTSTAGE=y
+CONFIG_BOOTSTAGE_REPORT=y
+CONFIG_BOOTSTAGE_FDT=y
+CONFIG_ENV_IS_IN_MMC=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ARCH_EARLY_INIT_R=y
 CONFIG_SPL=y
@@ -36,10 +41,12 @@ CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
+CONFIG_CMD_BOOTSTAGE=y
 CONFIG_CMD_REGULATOR=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_TPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent"
 CONFIG_TPL_OF_PLATDATA=y
 CONFIG_ENV_IS_IN_MMC=y

commit aac09c6b8c92debe067f7c4a037d7d20e41cb420
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Sep 11 22:04:26 2017 +0200

    UPSTREAM: rockchip: dts: rk3368-lion: add /chosen/tick-timer
    
    To support bootstage recording, we want to mark our DM timer as the
    tick-timer; this triggers the support for 'trying harder' to read the
    timer in the Rockchip DM timer driver, even if the device model isn't
    ready yet.
    
    Change-Id: If09ee9ad6834bd8be99bc827471363383bce7c43
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit f041176c4672f2885ff0843f5f7a27c892fcc42c)

diff --git a/arch/arm/dts/rk3368-lion-u-boot.dtsi b/arch/arm/dts/rk3368-lion-u-boot.dtsi
index 6052e8a8d3..1ec7d254af 100644
--- a/arch/arm/dts/rk3368-lion-u-boot.dtsi
+++ b/arch/arm/dts/rk3368-lion-u-boot.dtsi
@@ -13,6 +13,7 @@
 	chosen {
 		stdout-path = "serial0:115200n8";
 		u-boot,spl-boot-order = &emmc, &sdmmc;
+		tick-timer = "/timer@ff810000";
 	};
 
 };
@@ -88,6 +89,7 @@
 &timer0 {
 	u-boot,dm-pre-reloc;
 	clock-frequency = <24000000>;
+	status = "okay";
 };
 
 

commit a0c87cee8c03ecf4121ec7c9e0538f4bbe242f1b
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Sep 11 22:04:25 2017 +0200

    UPSTREAM: rockchip: gpio: remove outdated/misleading comment
    
    Remove a comment claiming that this driver only supports the RK3288,
    as we also use it on the RK3368, RK3399 and (most likely) on other
    variants.
    
    Change-Id: I265882dcdd0f702be6699c5f9293355dbd1cb81d
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit c23ce9ab85604c4b6b627e522c1dbf2a618063e6)

diff --git a/drivers/gpio/rk_gpio.c b/drivers/gpio/rk_gpio.c
index a6b83b26a8..11fc3e26bd 100644
--- a/drivers/gpio/rk_gpio.c
+++ b/drivers/gpio/rk_gpio.c
@@ -103,7 +103,6 @@ static int rockchip_gpio_probe(struct udevice *dev)
 	char *end;
 	int ret;
 
-	/* This only supports RK3288 at present */
 	priv->regs = dev_read_addr_ptr(dev);
 	ret = uclass_first_device_err(UCLASS_PINCTRL, &priv->pinctrl);
 	if (ret)

commit 55efd69c9eb6ecd5128d0be6741f77c334ca26f0
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Sep 11 22:04:24 2017 +0200

    UPSTREAM: rockchip: gpio: convert to livetree
    
    Update the Rockchip GPIO-bank driver to support a live tree.
    
    Change-Id: Ic6aae620739fade81d512a070562f7978b648d6d
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit a1d3480bc63103f6215925b9447512e933cc4f1a)

diff --git a/drivers/gpio/rk_gpio.c b/drivers/gpio/rk_gpio.c
index 6f7366acba..a6b83b26a8 100644
--- a/drivers/gpio/rk_gpio.c
+++ b/drivers/gpio/rk_gpio.c
@@ -104,7 +104,7 @@ static int rockchip_gpio_probe(struct udevice *dev)
 	int ret;
 
 	/* This only supports RK3288 at present */
-	priv->regs = (struct rockchip_gpio_regs *)devfdt_get_addr(dev);
+	priv->regs = dev_read_addr_ptr(dev);
 	ret = uclass_first_device_err(UCLASS_PINCTRL, &priv->pinctrl);
 	if (ret)
 		return ret;

commit e2186db8e754a45d0b274daf59906b1729265fc8
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Sep 11 22:04:23 2017 +0200

    UPSTREAM: rockchip: i2c: Convert to livetree
    
    Update the Rockchip I2C driver to support livetree.
    
    Change-Id: Iea1e1e9570bbe49da63f3c9b74ec40c3dfbbac48
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Acked-by: Heiko Schocher <hs@denx.de>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit cc91bdf8d4da6e66703a1bc99577f49ec3c7bf4a)

diff --git a/drivers/i2c/rk_i2c.c b/drivers/i2c/rk_i2c.c
index 4c0d95adf6..482c3da644 100644
--- a/drivers/i2c/rk_i2c.c
+++ b/drivers/i2c/rk_i2c.c
@@ -382,7 +382,7 @@ static int rockchip_i2c_probe(struct udevice *bus)
 {
 	struct rk_i2c *priv = dev_get_priv(bus);
 
-	priv->regs = (void *)devfdt_get_addr(bus);
+	priv->regs = dev_read_addr_ptr(bus);
 
 	return 0;
 }

commit cd7449a3c434892b6c0b273522b379f30d1513dc
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Sep 11 22:04:22 2017 +0200

    UPSTREAM: rockchip: rk8xx: remove unused header includes
    
    Remove header file includes that have been left over after the
    conversion to livetree-support.
    
    Change-Id: Iac1e65de175fa5dd747e161e426fc10309748e42
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit a904a16bc172ee1d7bcbcae1afcec21efe305e47)

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index 0f7771f7b3..4aa6e64978 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -8,8 +8,6 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
-#include <fdtdec.h>
-#include <libfdt.h>
 #include <power/rk8xx_pmic.h>
 #include <power/pmic.h>
 

commit 4ae650e51d95988a26a330569e7929f8362d3160
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Sep 11 22:04:21 2017 +0200

    UPSTREAM: rockchip: sdhci: Convert to livetree
    
    Update the Rockchip SDHCI wrapper to support a live device tree.
    
    Change-Id: I6b093c4dcb7f9286b156fe8d2cef54d030969840
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 327b2b35c527d2ec6c8de4fdebb71322c0f085fb)

diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index a05a422728..22fe200863 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -10,7 +10,6 @@
 #include <common.h>
 #include <dm.h>
 #include <dt-structs.h>
-#include <fdtdec.h>
 #include <libfdt.h>
 #include <malloc.h>
 #include <mapmem.h>
@@ -243,7 +242,7 @@ static int arasan_sdhci_ofdata_to_platdata(struct udevice *dev)
 	struct sdhci_host *host = dev_get_priv(dev);
 
 	host->name = dev->name;
-	host->ioaddr = devfdt_get_addr_ptr(dev);
+	host->ioaddr = dev_read_addr_ptr(dev);
 #endif
 
 	return 0;

commit a9db6e69fc543b049b2d63358344225599b2e857
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Sep 11 22:04:20 2017 +0200

    UPSTREAM: rockchip: spi: Convert to livetree
    
    Update the Rockchip SPI driver to support a live device tree.
    
    Change-Id: Ib54a4e52ed7177f342aafdca1c6bc1ddc0b76eaa
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit d27c273908c3ca534093e93d7730fc55973a02bc)

diff --git a/drivers/spi/rk_spi.c b/drivers/spi/rk_spi.c
index c70d636277..b18db74e7e 100644
--- a/drivers/spi/rk_spi.c
+++ b/drivers/spi/rk_spi.c
@@ -184,7 +184,7 @@ static int rockchip_spi_ofdata_to_platdata(struct udevice *bus)
 	struct rockchip_spi_priv *priv = dev_get_priv(bus);
 	int ret;
 
-	plat->base = devfdt_get_addr(bus);
+	plat->base = dev_read_addr(bus);
 
 	ret = clk_get_by_index(bus, 0, &priv->clk);
 	if (ret < 0) {

commit c6c4278784de647f8a3d6ee196618888fb3b8fbf
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Sep 11 22:04:19 2017 +0200

    UPSTREAM: rockchip: pinctrl: rk3368: Convert to livetree
    
    Update the pinctrl driver for the RK3368 to support a live device tree.
    
    Change-Id: Iba0c742549755a1a9d9edb7697faeb10b4edb247
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit d2edb968c4dbd116aaddf994ec540eb4ef4d9cee)

diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3368.c b/drivers/pinctrl/rockchip/pinctrl_rk3368.c
index 81ce2e31a7..b1f5704164 100644
--- a/drivers/pinctrl/rockchip/pinctrl_rk3368.c
+++ b/drivers/pinctrl/rockchip/pinctrl_rk3368.c
@@ -632,8 +632,7 @@ static int rk3368_pinctrl_get_periph_id(struct udevice *dev,
 	u32 cell[3];
 	int ret;
 
-	ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(periph),
-				   "interrupts", cell, ARRAY_SIZE(cell));
+	ret = dev_read_u32_array(periph, "interrupts", cell, ARRAY_SIZE(cell));
 	if (ret < 0)
 		return -EINVAL;
 

commit 060bd5117ac9664d68af1b93937b9a1d29a9b28b
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Sep 11 22:04:18 2017 +0200

    UPSTREAM: rockchip: clk: rk3368: Convert to livetree
    
    Update the clock driver for the RK3368 to support a live device tree.
    
    Change-Id: Ic74f6208fd0705c11d9a09a37c0136824fe64842
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 9a342f48a6c4debb1a43132c4b8ddc61c9f5d01d)

diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c
index f185215702..b221013a82 100644
--- a/drivers/clk/rockchip/clk_rk3368.c
+++ b/drivers/clk/rockchip/clk_rk3368.c
@@ -517,7 +517,7 @@ static int rk3368_clk_ofdata_to_platdata(struct udevice *dev)
 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
 	struct rk3368_clk_priv *priv = dev_get_priv(dev);
 
-	priv->cru = (struct rk3368_cru *)devfdt_get_addr(dev);
+	priv->cru = dev_read_addr_ptr(dev);
 #endif
 
 	return 0;

commit 428eb1cf97cf545f5780ef81d23dd74f7ee5115c
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Sep 11 22:04:17 2017 +0200

    UPSTREAM: rockchip: timer: Convert to livetree
    
    Update the Rockchip timer driver to support a live device tree.
    
    Change-Id: Ia7d704245e17907954428bd2bc1c5d895114797f
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 6675c952f20b7b3cfedd57c9c49305289a89403c)

diff --git a/drivers/timer/rockchip_timer.c b/drivers/timer/rockchip_timer.c
index 3c0750697d..460eb82f6c 100644
--- a/drivers/timer/rockchip_timer.c
+++ b/drivers/timer/rockchip_timer.c
@@ -101,7 +101,9 @@ static int rockchip_clk_ofdata_to_platdata(struct udevice *dev)
 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
 	struct rockchip_timer_priv *priv = dev_get_priv(dev);
 
-	priv->timer = (struct rk_timer *)devfdt_get_addr(dev);
+	priv->timer = dev_read_addr_ptr(dev);
+	if (!priv->timer)
+		return -ENOENT;
 #endif
 
 	return 0;

commit fdb357172f10fe474659af44d8a86904dd207ea5
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Sep 11 22:04:16 2017 +0200

    UPSTREAM: rockchip: timer: implement timer_get_boot_us
    
    To make the Rockchip DM timer driver useful for the timing of
    bootstages, we need a few enhancements:
     - This implements timer_get_boot_us.
     - This avoids reinitialising the timer, if it has already been
       set up (e.g. by our TPL and SPL stages). Now, we have a single
       timebase ticking from TPL through the full U-Boot.
     - This adds support for reading the timer even before the
       device-model is ready: we find the timer via /chosen/tick-timer,
       then read its address and clock-frequency, and finally read the
       timeval directly).
    
    Change-Id: I5f7d06f77c143482b28db7471600fdc5f39b824c
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit cc7ce94e02799c5caa6d9c89350152f00ba3eb90)

diff --git a/drivers/timer/rockchip_timer.c b/drivers/timer/rockchip_timer.c
index eb44965a19..3c0750697d 100644
--- a/drivers/timer/rockchip_timer.c
+++ b/drivers/timer/rockchip_timer.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <dm/ofnode.h>
 #include <mapmem.h>
 #include <asm/arch/timer.h>
 #include <dt-structs.h>
@@ -25,17 +26,72 @@ struct rockchip_timer_priv {
 	struct rk_timer *timer;
 };
 
-static int rockchip_timer_get_count(struct udevice *dev, u64 *count)
+static inline int64_t rockchip_timer_get_curr_value(struct rk_timer *timer)
 {
-	struct rockchip_timer_priv *priv = dev_get_priv(dev);
 	uint64_t timebase_h, timebase_l;
 	uint64_t cntr;
 
-	timebase_l = readl(&priv->timer->timer_curr_value0);
-	timebase_h = readl(&priv->timer->timer_curr_value1);
+	timebase_l = readl(&timer->timer_curr_value0);
+	timebase_h = readl(&timer->timer_curr_value1);
 
-	/* timers are down-counting */
 	cntr = timebase_h << 32 | timebase_l;
+	return cntr;
+}
+
+#if CONFIG_IS_ENABLED(BOOTSTAGE)
+ulong timer_get_boot_us(void)
+{
+	uint64_t  ticks = 0;
+	uint32_t  rate;
+	uint64_t  us;
+	int ret;
+
+	ret = dm_timer_init();
+
+	if (!ret) {
+		/* The timer is available */
+		rate = timer_get_rate(gd->timer);
+		timer_get_count(gd->timer, &ticks);
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	} else if (ret == -EAGAIN) {
+		/* We have been called so early that the DM is not ready,... */
+		ofnode node = offset_to_ofnode(-1);
+		struct rk_timer *timer = NULL;
+
+		/*
+		 * ... so we try to access the raw timer, if it is specified
+		 * via the tick-timer property in /chosen.
+		 */
+		node = ofnode_get_chosen_node("tick-timer");
+		if (!ofnode_valid(node)) {
+			debug("%s: no /chosen/tick-timer\n", __func__);
+			return 0;
+		}
+
+		timer = (struct rk_timer *)ofnode_get_addr(node);
+
+		/* This timer is down-counting */
+		ticks = ~0uLL - rockchip_timer_get_curr_value(timer);
+		if (ofnode_read_u32(node, "clock-frequency", &rate)) {
+			debug("%s: could not read clock-frequency\n", __func__);
+			return 0;
+		}
+#endif
+	} else {
+		return 0;
+	}
+
+	us = (ticks * 1000) / rate;
+	return us;
+}
+#endif
+
+static int rockchip_timer_get_count(struct udevice *dev, u64 *count)
+{
+	struct rockchip_timer_priv *priv = dev_get_priv(dev);
+	uint64_t cntr = rockchip_timer_get_curr_value(priv->timer);
+
+	/* timers are down-counting */
 	*count = ~0ull - cntr;
 	return 0;
 }
@@ -58,6 +114,12 @@ static int rockchip_timer_start(struct udevice *dev)
 	const uint32_t reload_val_l = reload_val & 0xffffffff;
 	const uint32_t reload_val_h = reload_val >> 32;
 
+	/* don't reinit, if the timer is already running and set up */
+	if ((readl(&priv->timer->timer_ctrl_reg) & 1) == 1 &&
+	    (readl(&priv->timer->timer_load_count0) == reload_val_l) &&
+	    (readl(&priv->timer->timer_load_count1) == reload_val_h))
+		return 0;
+
 	/* disable timer and reset all control */
 	writel(0, &priv->timer->timer_ctrl_reg);
 	/* write reload value */

commit 1c23e4e1ebaf6a41d434e59bba65a7421d1af57c
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Sep 11 22:04:15 2017 +0200

    UPSTREAM: rockchip: mmc: convert to livetree
    
    Update the Rockchip-specific wrapper for the Designware driver to
    support a live device tree.
    
    Change-Id: I114c6c49907f0c40de0e3d4a6249684a2986329a
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit be5f04e850e89639ffe7ec4d2dccd327eb354cde)

diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index 20c083db63..a530c895a7 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -66,7 +66,7 @@ static int rockchip_dwmmc_ofdata_to_platdata(struct udevice *dev)
 	struct dwmci_host *host = &priv->host;
 
 	host->name = dev->name;
-	host->ioaddr = (void *)devfdt_get_addr(dev);
+	host->ioaddr = dev_read_addr_ptr(dev);
 	host->buswidth = dev_read_u32_default(dev, "bus-width", 4);
 	host->get_mmc_clk = rockchip_dwmmc_get_mmc_clk;
 	host->priv = dev;

commit 8fb9fe4d88f93fe157862c046601fb7a08467a65
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Sep 11 22:04:14 2017 +0200

    UPSTREAM: net: phy: micrel: Convert to livetree
    
    Update the Micrel KSZ90x1 driver for a live tree.
    
    Change-Id: Ibcb54f6305bea779bf3ab975b2b692cd9eb05c42
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Acked-by: Joe Hershberger <joe.hershberger@ni.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit b343837e90bf7eb1b7b7b5117cd6e101b72bda10)

diff --git a/drivers/net/phy/micrel_ksz90x1.c b/drivers/net/phy/micrel_ksz90x1.c
index 0bb99e6bc6..b350a61aa6 100644
--- a/drivers/net/phy/micrel_ksz90x1.c
+++ b/drivers/net/phy/micrel_ksz90x1.c
@@ -9,11 +9,11 @@
  * (C) Copyright 2017 Adaptrum, Inc.
  * Written by Alexandru Gagniuc <alex.g@adaptrum.com> for Adaptrum, Inc.
  */
+
 #include <config.h>
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
-#include <fdtdec.h>
 #include <micrel.h>
 #include <phy.h>
 
@@ -120,8 +120,7 @@ static int ksz90x1_of_config_group(struct phy_device *phydev,
 		return -EOPNOTSUPP;
 
 	for (i = 0; i < ofcfg->grpsz; i++) {
-		val[i] = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev),
-					 ofcfg->grp[i].name, -1);
+		val[i] = dev_read_u32_default(dev, ofcfg->grp[i].name, ~0);
 		offset = ofcfg->grp[i].off;
 		if (val[i] == -1) {
 			/* Default register value for KSZ9021 */

commit acb29c0a17878355eda158316f4769bfbfbde8db
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Sep 11 22:04:13 2017 +0200

    UPSTREAM: net: designware: Convert to livetree
    
    Update the Designware Ethernet MAC driver to support a live device
    tree.
    
    Change-Id: I7c342900eb8a0386f9b1ccf963d02e76abee6a5f
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Acked-by: Joe Hershberger <joe.hershberger@ni.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 15050f1cb023052a5ab03d39e55119e9c6ce3eaf)

diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index 521e4dde41..036d231071 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -737,16 +737,14 @@ int designware_eth_ofdata_to_platdata(struct udevice *dev)
 #endif
 	struct eth_pdata *pdata = &dw_pdata->eth_pdata;
 	const char *phy_mode;
-	const fdt32_t *cell;
 #ifdef CONFIG_DM_GPIO
 	int reset_flags = GPIOD_IS_OUT;
 #endif
 	int ret = 0;
 
-	pdata->iobase = devfdt_get_addr(dev);
+	pdata->iobase = dev_read_addr(dev);
 	pdata->phy_interface = -1;
-	phy_mode = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "phy-mode",
-			       NULL);
+	phy_mode = dev_read_string(dev, "phy-mode");
 	if (phy_mode)
 		pdata->phy_interface = phy_get_interface_by_name(phy_mode);
 	if (pdata->phy_interface == -1) {
@@ -754,10 +752,7 @@ int designware_eth_ofdata_to_platdata(struct udevice *dev)
 		return -EINVAL;
 	}
 
-	pdata->max_speed = 0;
-	cell = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "max-speed", NULL);
-	if (cell)
-		pdata->max_speed = fdt32_to_cpu(*cell);
+	pdata->max_speed = dev_read_u32_default(dev, "max-speed", 0);
 
 #ifdef CONFIG_DM_GPIO
 	if (dev_read_bool(dev, "snps,reset-active-low"))

commit 18a0c4a65bddc8c9a9000fa06442a88bbb1d0ae3
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Sep 11 22:04:12 2017 +0200

    UPSTREAM: dm: core: add dev_read_addr_ptr()
    
    The dev_read_addr_ptr() mimics the behaviour of the devfdt_get_addr_ptr(),
    retrieving the first address of the node's reg-property and returning
    it as a pointer (or NULL on failure).
    
    Change-Id: Iaac920b89296fd53504b071e7617f24ac6dd2fc8
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit c131c8bca86b428daef7a25c26a96af42658be21)

diff --git a/drivers/core/read.c b/drivers/core/read.c
index 6acb33388f..065589a6ab 100644
--- a/drivers/core/read.c
+++ b/drivers/core/read.c
@@ -57,6 +57,13 @@ fdt_addr_t dev_read_addr(struct udevice *dev)
 	return dev_read_addr_index(dev, 0);
 }
 
+void *dev_read_addr_ptr(struct udevice *dev)
+{
+	fdt_addr_t addr = dev_read_addr(dev);
+
+	return (addr == FDT_ADDR_T_NONE) ? NULL : (void *)addr;
+}
+
 fdt_addr_t dev_read_addr_size(struct udevice *dev, const char *property,
 				fdt_size_t *sizep)
 {
diff --git a/include/dm/read.h b/include/dm/read.h
index 49d69c990f..e7f71256a8 100644
--- a/include/dm/read.h
+++ b/include/dm/read.h
@@ -112,6 +112,16 @@ fdt_addr_t dev_read_addr_index(struct udevice *dev, int index);
  */
 fdt_addr_t dev_read_addr(struct udevice *dev);
 
+/**
+ * dev_read_addr_ptr() - Get the reg property of a device
+ *                       as a pointer
+ *
+ * @dev: Device to read from
+ *
+ * @return pointer or NULL if not found
+ */
+void *dev_read_addr_ptr(struct udevice *dev);
+
 /**
  * dev_read_addr_size() - get address and size from a device property
  *
@@ -417,6 +427,11 @@ static inline fdt_addr_t dev_read_addr(struct udevice *dev)
 	return devfdt_get_addr(dev);
 }
 
+static inline void *dev_read_addr_ptr(struct udevice *dev)
+{
+	return devfdt_get_addr_ptr(dev);
+}
+
 static inline fdt_addr_t dev_read_addr_size(struct udevice *dev,
 					    const char *propname,
 					    fdt_size_t *sizep)

commit 5867875cb7098007b82c3f5b5dd7af9c7cf9e63d
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Sep 11 22:04:11 2017 +0200

    UPSTREAM: dm: timer: handle being called before dm_root is ready
    
    When used with bootstage recording, dm_timer_init may be called
    surprisingly early: i.e. before dm_root is ready. To deal with
    this case, we explicitly check for this condition and return
    -EAGAIN to the caller (refer to drivers/timer/rockchip_timer.c
    for a case where this is needed/used).
    
    Change-Id: Ia35fea65924a73b6cc4b182ba28823b207be8e6f
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit af823151641b1a9a8eae8c3b111f5fa27e6873ac)

diff --git a/drivers/timer/timer-uclass.c b/drivers/timer/timer-uclass.c
index 62d6f0b29a..45397b230f 100644
--- a/drivers/timer/timer-uclass.c
+++ b/drivers/timer/timer-uclass.c
@@ -92,6 +92,13 @@ int notrace dm_timer_init(void)
 	if (gd->timer)
 		return 0;
 
+	/*
+	 * Directly access gd->dm_root to suppress error messages, if the
+	 * virtual root driver does not yet exist.
+	 */
+	if (gd->dm_root == NULL)
+		return -EAGAIN;
+
 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
 	/* Check for a chosen timer to be used for tick */
 	node = ofnode_get_chosen_node("tick-timer");

commit e842c8b7383b36f344d3d9790ee92c3e19987abf
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Sep 11 22:04:10 2017 +0200

    UPSTREAM: dm: timer: Convert to livetree
    
    This updates dm_timer_init to support a live tree and deals with
    some fallout (i.e. the need to restructure the code such, that we
    don't need multiple discontinuous #if CONFIG_IS_ENABLED blocks).
    
    Change-Id: Ic6e4f8cb98e1af64d1a1bb28d8f8e9a59db22c7a
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit b61e8b0c9e76dacf0b670c3948c3cd738b2379a3)

diff --git a/drivers/timer/timer-uclass.c b/drivers/timer/timer-uclass.c
index a84755f4c5..62d6f0b29a 100644
--- a/drivers/timer/timer-uclass.c
+++ b/drivers/timer/timer-uclass.c
@@ -8,6 +8,7 @@
 #include <dm.h>
 #include <dm/lists.h>
 #include <dm/device-internal.h>
+#include <dm/root.h>
 #include <clk.h>
 #include <errno.h>
 #include <timer.h>
@@ -54,9 +55,10 @@ static int timer_pre_probe(struct udevice *dev)
 		if (IS_ERR_VALUE(ret))
 			return ret;
 		uc_priv->clock_rate = ret;
-	} else
-		uc_priv->clock_rate = fdtdec_get_int(gd->fdt_blob,
-				dev_of_offset(dev),	"clock-frequency", 0);
+	} else {
+		uc_priv->clock_rate =
+			dev_read_u32_default(dev, "clock-frequency", 0);
+	}
 #endif
 
 	return 0;
@@ -83,9 +85,8 @@ u64 timer_conv_64(u32 count)
 
 int notrace dm_timer_init(void)
 {
-	__maybe_unused const void *blob = gd->fdt_blob;
 	struct udevice *dev = NULL;
-	int node = -ENOENT;
+	__maybe_unused ofnode node;
 	int ret;
 
 	if (gd->timer)
@@ -93,27 +94,27 @@ int notrace dm_timer_init(void)
 
 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
 	/* Check for a chosen timer to be used for tick */
-	node = fdtdec_get_chosen_node(blob, "tick-timer");
+	node = ofnode_get_chosen_node("tick-timer");
+
+	if (ofnode_valid(node) &&
+	    uclass_get_device_by_ofnode(UCLASS_TIMER, node, &dev)) {
+		/*
+		 * If the timer is not marked to be bound before
+		 * relocation, bind it anyway.
+		 */
+		if (!lists_bind_fdt(dm_root(), node, &dev)) {
+			ret = device_probe(dev);
+			if (ret)
+				return ret;
+		}
+	}
 #endif
-	if (node < 0) {
-		/* No chosen timer, trying first available timer */
+
+	if (!dev) {
+		/* Fall back to the first available timer */
 		ret = uclass_first_device_err(UCLASS_TIMER, &dev);
 		if (ret)
 			return ret;
-	} else {
-		if (uclass_get_device_by_of_offset(UCLASS_TIMER, node, &dev)) {
-			/*
-			 * If the timer is not marked to be bound before
-			 * relocation, bind it anyway.
-			 */
-			if (node > 0 &&
-			    !lists_bind_fdt(gd->dm_root, offset_to_ofnode(node),
-					    &dev)) {
-				ret = device_probe(dev);
-				if (ret)
-					return ret;
-			}
-		}
 	}
 
 	if (dev) {

commit 286803a6b4534417b770f8542d338dd85235572b
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Sep 11 22:04:09 2017 +0200

    UPSTREAM: bootstage: adjust Makefile to allow including bootstage in SPL, but not in TPL
    
    For timing our bootstages on the RK3368, which has a minimal TPL
    (and where we consequently don't want to time the bootstages) and a
    full-featured SPL (where we can bootstage recording), we need to
    adjust the Makefile.
    
    Use the $(SPL_TPL_) macro in the Makefile for bootstage.o
    
    Change-Id: Ib3cd45000bfbfb37377c96c9f41a467a760650aa
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 148a139d65b7fdb93326d7870b40c618d4601a8a)

diff --git a/common/Makefile b/common/Makefile
index 1757f39dd8..f79e8fe13a 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -63,7 +63,7 @@ obj-$(CONFIG_CMDLINE) += cli_readline.o cli_simple.o
 
 endif # !CONFIG_SPL_BUILD
 
-obj-$(CONFIG_$(SPL_)BOOTSTAGE) += bootstage.o
+obj-$(CONFIG_$(SPL_TPL_)BOOTSTAGE) += bootstage.o
 
 ifdef CONFIG_SPL_BUILD
 obj-$(CONFIG_SPL_DFU_SUPPORT) += dfu.o

commit 5d3f9f0b8585a9ca9dc64ecff2241277f554fff5
Author: Klaus Goger <klaus.goger@theobroma-systems.com>
Date:   Mon Sep 11 21:05:00 2017 +0200

    UPSTREAM: rockchip: board: puma_rk3399: update README flash instructions
    
    Puma supports other boot sources then SD-Card. Update README to include
    the required steps.
    
     * how to package a SPI-NOR SPL
     * how to flash eMMC with rkdeveloptool
    
    Change-Id: I52274ca551217209007d3ac9074351b7467404c8
    Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit c91403409079e4747f60b79be5816773f6a4c8b3)

diff --git a/board/theobroma-systems/puma_rk3399/README b/board/theobroma-systems/puma_rk3399/README
index 214281a329..f67dfb451f 100644
--- a/board/theobroma-systems/puma_rk3399/README
+++ b/board/theobroma-systems/puma_rk3399/README
@@ -55,18 +55,53 @@ Compile the U-Boot
 Package the image
 =================
 
-	> tools/mkimage -n rk3399 -T rksd -d spl/u-boot-spl.bin spl.img
-	> make CROSS_COMPILE=aarch64-linux-gnu- u-boot.itb
+Creating a SPL image for SD-Card/eMMC
+  > tools/mkimage -n rk3399 -T rksd -d spl/u-boot-spl.bin spl_mmc.img
+Creating a SPL image for SPI-NOR
+  > tools/mkimage -n rk3399 -T rkspi -d spl/u-boot-spl.bin spl_nor.img
+Create the FIT image containing U-Boot proper, ATF, M0 Firmware, devicetree
+  > make CROSS_COMPILE=aarch64-linux-gnu- u-boot.itb
 
 Flash the image
 ===============
 
-Copy the SPL to offset 32k and the FIT image containing the payloads
-(U-Boot proper, ATF, M0 Firmware, devicetree) to offset 256k on a SD
-card.
+Copy the SPL to offset 32k for SD/eMMC, offset 0 for NOR-Flash and the FIT
+image to offset 256k card.
 
-  > dd if=spl.img of=/dev/sdb seek=64
+SD-Card
+-------
+
+  > dd if=spl_mmc.img of=/dev/sdb seek=64
   > dd if=u-boot.itb of=/dev/sdb seek=512
 
-After powering up the board (with the inserted SD card), you should see
-a U-Boot console on UART0 (115200n8).
+eMMC
+----
+
+rkdeveloptool allows to flash the on-board eMMC via the USB OTG interface with
+help of the Rockchip loader binary.
+
+  > git clone https://github.com/rockchip-linux/rkdeveloptool
+  > cd rkdeveloptool
+  > autoreconf -i && ./configure && make
+  > git clone https://github.com/rockchip-linux/rkbin.git
+  > ./rkdeveloptool db rkbin/rk33/rk3399_loader_v1.08.106.bin
+  > ./rkdeveloptool wl 64 ../spl_mmc.img
+  > ./rkdeveloptool wl 512 ../u-boot.itb
+
+NOR-Flash
+---------
+
+Writing the SPI NOR Flash requires a running U-Boot. For the sake of simplicity
+we assume you have a SD-Card with a partition containing the required files
+ready.
+
+  > load mmc 1:1 ${kernel_addr_r} spl_nor.img
+  > sf probe
+  > sf erase 0 +$filesize
+  > sf write $kernel_addr_r 0 ${filesize}
+  > load mmc 1:1 ${kernel_addr_r} u-boot.itb
+  > sf erase 0x40000 +$filesize
+  > sf write $kernel_addr_r 0x40000 ${filesize}
+
+
+Reboot the system and you should see a U-Boot console on UART0 (115200n8).

commit d0b0568be9a6107d573f67179091501494b8cd2f
Author: Klaus Goger <klaus.goger@theobroma-systems.com>
Date:   Mon Sep 11 21:04:59 2017 +0200

    UPSTREAM: rockchip: board: lion_rk3368: update README flash instructions
    
    Add a section to the README on how to flash the on-board eMMC
    with the rkdeveloptool.
    
    Change-Id: Ic069b5bbaf64c6834f048167b21ac79071c399ee
    Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit cc8fb2f79304963597248ad7cdab6cf2f9b336ef)

diff --git a/board/theobroma-systems/lion_rk3368/README b/board/theobroma-systems/lion_rk3368/README
index 47304fcba6..83e4332984 100644
--- a/board/theobroma-systems/lion_rk3368/README
+++ b/board/theobroma-systems/lion_rk3368/README
@@ -26,12 +26,32 @@ Build the full U-Boot and a FIT image including the ATF
 
   > make CROSS_COMPILE=aarch64-unknown-elf- ARCH=arm u-boot.itb
 
-Write to a SD-card
-==================
+Flash the image
+===============
+
+Copy the SPL to offset 32k and the FIT image containing the payloads
+(U-Boot proper, ATF, devicetree) to offset 256k card.
+
+SD-Card
+-------
 
   > dd if=spl-3368.img of=/dev/sdb seek=64
   > dd if=u-boot.itb of=/dev/sdb seek=512
 
+eMMC
+----
+
+rkdeveloptool allows to flash the on-board eMMC via the USB OTG interface with
+help of the Rockchip loader binary.
+
+  > git clone https://github.com/rockchip-linux/rkdeveloptool
+  > cd rkdeveloptool
+  > autoreconf -i && && ./configure && make
+  > git clone https://github.com/rockchip-linux/rkbin.git
+  > ./rkdeveloptool db rkbin/rk33/rk3368_loader_v2.00.256.bin
+  > ./rkdeveloptool wl 64 ../spl.img
+  > ./rkdeveloptool wl 512 ../u-boot.itb
+
 
 If everything went according to plan, you should see the following
 output on UART0:

commit fed831fc6cddd996f30c9329061e7edfad861f3c
Author: Rob Clark <robdclark@gmail.com>
Date:   Sat Sep 9 13:15:53 2017 -0400

    UPSTREAM: fs/fat: introduce new director iterators
    
    Untangle directory traversal into a simple iterator, to replace the
    existing multi-purpose do_fat_read_at() + get_dentfromdir().
    
    Change-Id: Iacf404e2ac7796adfa489d6e098c4d310635975a
    Signed-off-by: Rob Clark <robdclark@gmail.com>
    Reviewed-by: Łukasz Majewski <lukma@denx.de>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit c6e3baa565bc3b5828cf0d67ca6429dbe5f8687c)

diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index e1c0a15dc7..ee2bbe38f1 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -812,7 +812,6 @@ static int get_fs_info(fsdata *mydata)
 {
 	boot_sector bs;
 	volume_info volinfo;
-	__u32 root_cluster = 0;
 	int ret;
 
 	ret = read_bootsectandvi(&bs, &volinfo, &mydata->fatsize);
@@ -822,7 +821,6 @@ static int get_fs_info(fsdata *mydata)
 	}
 
 	if (mydata->fatsize == 32) {
-		root_cluster = bs.root_cluster;
 		mydata->fatlength = bs.fat32_length;
 	} else {
 		mydata->fatlength = bs.fat_length;
@@ -843,6 +841,7 @@ static int get_fs_info(fsdata *mydata)
 	if (mydata->fatsize == 32) {
 		mydata->data_begin = mydata->rootdir_sect -
 					(mydata->clust_size * 2);
+		mydata->root_cluster = bs.root_cluster;
 	} else {
 		mydata->rootdir_size = ((bs.dir_entries[1]  * (int)256 +
 					 bs.dir_entries[0]) *
@@ -851,6 +850,9 @@ static int get_fs_info(fsdata *mydata)
 		mydata->data_begin = mydata->rootdir_sect +
 					mydata->rootdir_size -
 					(mydata->clust_size * 2);
+		mydata->root_cluster = (mydata->rootdir_sect -
+					mydata->data_begin) /
+					mydata->clust_size;
 	}
 
 	mydata->fatbufnum = -1;
@@ -868,7 +870,7 @@ static int get_fs_info(fsdata *mydata)
 	       mydata->fatsize, mydata->fat_sect, mydata->fatlength);
 	debug("Rootdir begins at cluster: %d, sector: %d, offset: %x\n"
 	       "Data begins at: %d\n",
-	       root_cluster,
+	       mydata->root_cluster,
 	       mydata->rootdir_sect,
 	       mydata->rootdir_sect * mydata->sect_size, mydata->data_begin);
 	debug("Sector size: %d, cluster size: %d\n", mydata->sect_size,
@@ -1245,6 +1247,354 @@ exit:
 	return ret;
 }
 
+
+/*
+ * Directory iterator, to simplify filesystem traversal
+ *
+ * Implements an iterator pattern to traverse directory tables,
+ * transparently handling directory tables split across multiple
+ * clusters, and the difference between FAT12/FAT16 root directory
+ * (contiguous) and subdirectories + FAT32 root (chained).
+ *
+ * Rough usage:
+ *
+ *   for (fat_itr_root(&itr, fsdata); fat_itr_next(&itr); ) {
+ *      // to traverse down to a subdirectory pointed to by
+ *      // current iterator position:
+ *      fat_itr_child(&itr, &itr);
+ *   }
+ *
+ * For more complete example, see fat_itr_resolve()
+ */
+
+typedef struct {
+	fsdata    *fsdata;        /* filesystem parameters */
+	unsigned   clust;         /* current cluster */
+	int        last_cluster;  /* set once we've read last cluster */
+	int        is_root;       /* is iterator at root directory */
+	int        remaining;     /* remaining dent's in current cluster */
+
+	/* current iterator position values: */
+	dir_entry *dent;          /* current directory entry */
+	char       l_name[VFAT_MAXLEN_BYTES];    /* long (vfat) name */
+	char       s_name[14];    /* short 8.3 name */
+	char      *name;          /* l_name if there is one, else s_name */
+
+	/* storage for current cluster in memory: */
+	u8         block[MAX_CLUSTSIZE] __aligned(ARCH_DMA_MINALIGN);
+} fat_itr;
+
+static int fat_itr_isdir(fat_itr *itr);
+
+/**
+ * fat_itr_root() - initialize an iterator to start at the root
+ * directory
+ *
+ * @itr: iterator to initialize
+ * @fsdata: filesystem data for the partition
+ * @return 0 on success, else -errno
+ */
+static int fat_itr_root(fat_itr *itr, fsdata *fsdata)
+{
+	if (get_fs_info(fsdata))
+		return -ENXIO;
+
+	itr->fsdata = fsdata;
+	itr->clust = fsdata->root_cluster;
+	itr->dent = NULL;
+	itr->remaining = 0;
+	itr->last_cluster = 0;
+	itr->is_root = 1;
+
+	return 0;
+}
+
+/**
+ * fat_itr_child() - initialize an iterator to descend into a sub-
+ * directory
+ *
+ * Initializes 'itr' to iterate the contents of the directory at
+ * the current cursor position of 'parent'.  It is an error to
+ * call this if the current cursor of 'parent' is pointing at a
+ * regular file.
+ *
+ * Note that 'itr' and 'parent' can be the same pointer if you do
+ * not need to preserve 'parent' after this call, which is useful
+ * for traversing directory structure to resolve a file/directory.
+ *
+ * @itr: iterator to initialize
+ * @parent: the iterator pointing at a directory entry in the
+ *    parent directory of the directory to iterate
+ */
+static void fat_itr_child(fat_itr *itr, fat_itr *parent)
+{
+	fsdata *mydata = parent->fsdata;  /* for silly macros */
+	unsigned clustnum = START(parent->dent);
+
+	assert(fat_itr_isdir(parent));
+
+	itr->fsdata = parent->fsdata;
+	if (clustnum > 0) {
+		itr->clust = clustnum;
+	} else {
+		itr->clust = parent->fsdata->root_cluster;
+	}
+	itr->dent = NULL;
+	itr->remaining = 0;
+	itr->last_cluster = 0;
+	itr->is_root = 0;
+}
+
+static void *next_cluster(fat_itr *itr)
+{
+	fsdata *mydata = itr->fsdata;  /* for silly macros */
+	int ret;
+	u32 sect;
+
+	/* have we reached the end? */
+	if (itr->last_cluster)
+		return NULL;
+
+	sect = clust_to_sect(itr->fsdata, itr->clust);
+
+	debug("FAT read(sect=%d), clust_size=%d, DIRENTSPERBLOCK=%zd\n",
+	      sect, itr->fsdata->clust_size, DIRENTSPERBLOCK);
+
+	/*
+	 * NOTE: do_fat_read_at() had complicated logic to deal w/
+	 * vfat names that span multiple clusters in the fat16 case,
+	 * which get_dentfromdir() probably also needed (and was
+	 * missing).  And not entirely sure what fat32 didn't have
+	 * the same issue..  We solve that by only caring about one
+	 * dent at a time and iteratively constructing the vfat long
+	 * name.
+	 */
+	ret = disk_read(sect, itr->fsdata->clust_size,
+			itr->block);
+	if (ret < 0) {
+		debug("Error: reading block\n");
+		return NULL;
+	}
+
+	if (itr->is_root && itr->fsdata->fatsize != 32) {
+		itr->clust++;
+		sect = clust_to_sect(itr->fsdata, itr->clust);
+		if (sect - itr->fsdata->rootdir_sect >=
+		    itr->fsdata->rootdir_size) {
+			debug("cursect: 0x%x\n", itr->clust);
+			itr->last_cluster = 1;
+		}
+	} else {
+		itr->clust = get_fatent(itr->fsdata, itr->clust);
+		if (CHECK_CLUST(itr->clust, itr->fsdata->fatsize)) {
+			debug("cursect: 0x%x\n", itr->clust);
+			itr->last_cluster = 1;
+		}
+	}
+
+	return itr->block;
+}
+
+static dir_entry *next_dent(fat_itr *itr)
+{
+	if (itr->remaining == 0) {
+		struct dir_entry *dent = next_cluster(itr);
+		unsigned nbytes = itr->fsdata->sect_size *
+			itr->fsdata->clust_size;
+
+		/* have we reached the last cluster? */
+		if (!dent)
+			return NULL;
+
+		itr->remaining = nbytes / sizeof(dir_entry) - 1;
+		itr->dent = dent;
+	} else {
+		itr->remaining--;
+		itr->dent++;
+	}
+
+	/* have we reached the last valid entry? */
+	if (itr->dent->name[0] == 0)
+		return NULL;
+
+	return itr->dent;
+}
+
+static dir_entry *extract_vfat_name(fat_itr *itr)
+{
+	struct dir_entry *dent = itr->dent;
+	int seqn = itr->dent->name[0] & ~LAST_LONG_ENTRY_MASK;
+	u8 chksum, alias_checksum = ((dir_slot *)dent)->alias_checksum;
+	int n = 0;
+
+	while (seqn--) {
+		char buf[13];
+		int idx = 0;
+
+		slot2str((dir_slot *)dent, buf, &idx);
+
+		/* shift accumulated long-name up and copy new part in: */
+		memmove(itr->l_name + idx, itr->l_name, n);
+		memcpy(itr->l_name, buf, idx);
+		n += idx;
+
+		dent = next_dent(itr);
+		if (!dent)
+			return NULL;
+	}
+
+	itr->l_name[n] = '\0';
+
+	chksum = mkcksum(dent->name, dent->ext);
+
+	/* checksum mismatch could mean deleted file, etc.. skip it: */
+	if (chksum != alias_checksum) {
+		debug("** chksum=%x, alias_checksum=%x, l_name=%s, s_name=%8s.%3s\n",
+		      chksum, alias_checksum, itr->l_name, dent->name, dent->ext);
+		return NULL;
+	}
+
+	return dent;
+}
+
+/**
+ * fat_itr_next() - step to the next entry in a directory
+ *
+ * Must be called once on a new iterator before the cursor is valid.
+ *
+ * @itr: the iterator to iterate
+ * @return boolean, 1 if success or 0 if no more entries in the
+ *    current directory
+ */
+static int fat_itr_next(fat_itr *itr)
+{
+	dir_entry *dent;
+
+	itr->name = NULL;
+
+	while (1) {
+		dent = next_dent(itr);
+		if (!dent)
+			return 0;
+
+		if (dent->name[0] == DELETED_FLAG ||
+		    dent->name[0] == aRING)
+			continue;
+
+		if (dent->attr & ATTR_VOLUME) {
+			if (vfat_enabled &&
+			    (dent->attr & ATTR_VFAT) == ATTR_VFAT &&
+			    (dent->name[0] & LAST_LONG_ENTRY_MASK)) {
+				dent = extract_vfat_name(itr);
+				if (!dent)
+					continue;
+				itr->name = itr->l_name;
+				break;
+			} else {
+				/* Volume label or VFAT entry, skip */
+				continue;
+			}
+		}
+
+		break;
+	}
+
+	get_name(dent, itr->s_name);
+	if (!itr->name)
+		itr->name = itr->s_name;
+
+	return 1;
+}
+
+/**
+ * fat_itr_isdir() - is current cursor position pointing to a directory
+ *
+ * @itr: the iterator
+ * @return true if cursor is at a directory
+ */
+static int fat_itr_isdir(fat_itr *itr)
+{
+	return !!(itr->dent->attr & ATTR_DIR);
+}
+
+/*
+ * Helpers:
+ */
+
+#define TYPE_FILE 0x1
+#define TYPE_DIR  0x2
+#define TYPE_ANY  (TYPE_FILE | TYPE_DIR)
+
+/**
+ * fat_itr_resolve() - traverse directory structure to resolve the
+ * requested path.
+ *
+ * Traverse directory structure to the requested path.  If the specified
+ * path is to a directory, this will descend into the directory and
+ * leave it iterator at the start of the directory.  If the path is to a
+ * file, it will leave the iterator in the parent directory with current
+ * cursor at file's entry in the directory.
+ *
+ * @itr: iterator initialized to root
+ * @path: the requested path
+ * @type: bitmask of allowable file types
+ * @return 0 on success or -errno
+ */
+static int fat_itr_resolve(fat_itr *itr, const char *path, unsigned type)
+{
+	const char *next;
+
+	/* chomp any extra leading slashes: */
+	while (path[0] && ISDIRDELIM(path[0]))
+		path++;
+
+	/* are we at the end? */
+	if (strlen(path) == 0) {
+		if (!(type & TYPE_DIR))
+			return -ENOENT;
+		return 0;
+	}
+
+	/* find length of next path entry: */
+	next = path;
+	while (next[0] && !ISDIRDELIM(next[0]))
+		next++;
+
+	while (fat_itr_next(itr)) {
+		int match = 0;
+		unsigned n = max(strlen(itr->name), (size_t)(next - path));
+
+		/* check both long and short name: */
+		if (!strncasecmp(path, itr->name, n))
+			match = 1;
+		else if (itr->name != itr->s_name &&
+			 !strncasecmp(path, itr->s_name, n))
+			match = 1;
+
+		if (!match)
+			continue;
+
+		if (fat_itr_isdir(itr)) {
+			/* recurse into directory: */
+			fat_itr_child(itr, itr);
+			return fat_itr_resolve(itr, next, type);
+		} else if (next[0]) {
+			/*
+			 * If next is not empty then we have a case
+			 * like: /path/to/realfile/nonsense
+			 */
+			debug("bad trailing path: %s\n", next);
+			return -ENOENT;
+		} else if (!(type & TYPE_FILE)) {
+			return -ENOTDIR;
+		} else {
+			return 0;
+		}
+	}
+
+	return -ENOENT;
+}
+
 int do_fat_read(const char *filename, void *buffer, loff_t maxsize, int dols,
 		loff_t *actread)
 {
diff --git a/include/fat.h b/include/fat.h
index b671ee8f81..21bb6666cf 100644
--- a/include/fat.h
+++ b/include/fat.h
@@ -175,8 +175,15 @@ typedef struct {
 	int	data_begin;	/* The sector of the first cluster, can be negative */
 	int	fatbufnum;	/* Used by get_fatent, init to -1 */
 	int	rootdir_size;	/* Size of root dir for non-FAT32 */
+	__u32	root_cluster;	/* First cluster of root dir for FAT32 */
 } fsdata;
 
+/* TODO clean up places that are open-coding this: */
+static inline u32 clust_to_sect(fsdata *fsdata, u32 clust)
+{
+	return fsdata->data_begin + clust * fsdata->clust_size;
+}
+
 typedef int	(file_detectfs_func)(void);
 typedef int	(file_ls_func)(const char *dir);
 typedef int	(file_read_func)(const char *filename, void *buffer,

commit f3068e758f148b63011030c69ae29dc1edd062f3
Author: Rob Clark <robdclark@gmail.com>
Date:   Sat Sep 9 13:15:52 2017 -0400

    UPSTREAM: fs/fat: split out helper to init fsdata
    
    Want to re-use this in fat dirent iterator in next patch.
    
    Change-Id: I61d7586e50d13106c516235d46c47410b22496bb
    Signed-off-by: Rob Clark <robdclark@gmail.com>
    Reviewed-by: Łukasz Majewski <lukma@denx.de>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 45449980f80169214633f2649a27c791d0104e9d)

diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index 465a6875ed..e1c0a15dc7 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -808,35 +808,17 @@ exit:
 	return ret;
 }
 
-__u8 do_fat_read_at_block[MAX_CLUSTSIZE]
-	__aligned(ARCH_DMA_MINALIGN);
-
-int do_fat_read_at(const char *filename, loff_t pos, void *buffer,
-		   loff_t maxsize, int dols, int dogetsize, loff_t *size)
+static int get_fs_info(fsdata *mydata)
 {
-	char fnamecopy[2048];
 	boot_sector bs;
 	volume_info volinfo;
-	fsdata datablock;
-	fsdata *mydata = &datablock;
-	dir_entry *dentptr = NULL;
-	__u16 prevcksum = 0xffff;
-	char *subname = "";
-	__u32 cursect;
-	int idx, isdir = 0;
-	int files = 0, dirs = 0;
-	int ret = -1;
-	int firsttime;
 	__u32 root_cluster = 0;
-	__u32 read_blk;
-	int rootdir_size = 0;
-	int buffer_blk_cnt;
-	int do_read;
-	__u8 *dir_ptr;
+	int ret;
 
-	if (read_bootsectandvi(&bs, &volinfo, &mydata->fatsize)) {
+	ret = read_bootsectandvi(&bs, &volinfo, &mydata->fatsize);
+	if (ret) {
 		debug("Error: reading boot sector\n");
-		return -1;
+		return ret;
 	}
 
 	if (mydata->fatsize == 32) {
@@ -848,8 +830,7 @@ int do_fat_read_at(const char *filename, loff_t pos, void *buffer,
 
 	mydata->fat_sect = bs.reserved;
 
-	cursect = mydata->rootdir_sect
-		= mydata->fat_sect + mydata->fatlength * bs.fats;
+	mydata->rootdir_sect = mydata->fat_sect + mydata->fatlength * bs.fats;
 
 	mydata->sect_size = (bs.sector_size[1] << 8) + bs.sector_size[0];
 	mydata->clust_size = bs.cluster_size;
@@ -863,12 +844,12 @@ int do_fat_read_at(const char *filename, loff_t pos, void *buffer,
 		mydata->data_begin = mydata->rootdir_sect -
 					(mydata->clust_size * 2);
 	} else {
-		rootdir_size = ((bs.dir_entries[1]  * (int)256 +
-				 bs.dir_entries[0]) *
-				 sizeof(dir_entry)) /
-				 mydata->sect_size;
+		mydata->rootdir_size = ((bs.dir_entries[1]  * (int)256 +
+					 bs.dir_entries[0]) *
+					 sizeof(dir_entry)) /
+					 mydata->sect_size;
 		mydata->data_begin = mydata->rootdir_sect +
-					rootdir_size -
+					mydata->rootdir_size -
 					(mydata->clust_size * 2);
 	}
 
@@ -893,6 +874,38 @@ int do_fat_read_at(const char *filename, loff_t pos, void *buffer,
 	debug("Sector size: %d, cluster size: %d\n", mydata->sect_size,
 	      mydata->clust_size);
 
+	return 0;
+}
+
+__u8 do_fat_read_at_block[MAX_CLUSTSIZE]
+	__aligned(ARCH_DMA_MINALIGN);
+
+int do_fat_read_at(const char *filename, loff_t pos, void *buffer,
+		   loff_t maxsize, int dols, int dogetsize, loff_t *size)
+{
+	char fnamecopy[2048];
+	fsdata datablock;
+	fsdata *mydata = &datablock;
+	dir_entry *dentptr = NULL;
+	__u16 prevcksum = 0xffff;
+	char *subname = "";
+	__u32 cursect;
+	int idx, isdir = 0;
+	int files = 0, dirs = 0;
+	int ret = -1;
+	int firsttime;
+	__u32 root_cluster = 0;
+	__u32 read_blk;
+	int rootdir_size = 0;
+	int buffer_blk_cnt;
+	int do_read;
+	__u8 *dir_ptr;
+
+	if (get_fs_info(mydata))
+		return -1;
+
+	cursect = mydata->rootdir_sect;
+
 	/* "cwd" is always the root... */
 	while (ISDIRDELIM(*filename))
 		filename++;
diff --git a/include/fat.h b/include/fat.h
index 71879f01ca..b671ee8f81 100644
--- a/include/fat.h
+++ b/include/fat.h
@@ -174,6 +174,7 @@ typedef struct {
 	__u16	clust_size;	/* Size of clusters in sectors */
 	int	data_begin;	/* The sector of the first cluster, can be negative */
 	int	fatbufnum;	/* Used by get_fatent, init to -1 */
+	int	rootdir_size;	/* Size of root dir for non-FAT32 */
 } fsdata;
 
 typedef int	(file_detectfs_func)(void);

commit 70478c701f69db087606e3071554b13410a6a931
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Thu Sep 14 12:27:07 2017 +0200

    UPSTREAM: test/py: u_boot_console_base.py: fix typo
    
    run_command does not have a parameter wait_for_each.
    
    Change-Id: I5b6bb3ed1b732c3ebc307f0618282caea9190b83
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit cd3e8a72a6fb1fe758c5f73b394527609afe26cc)

diff --git a/test/py/u_boot_console_base.py b/test/py/u_boot_console_base.py
index b1f474236e..eedf73f858 100644
--- a/test/py/u_boot_console_base.py
+++ b/test/py/u_boot_console_base.py
@@ -160,7 +160,7 @@ class ConsoleBase(object):
 
         Args:
             cmd: The command to send.
-            wait_for_each: Boolean indicating whether to wait for U-Boot to
+            wait_for_echo: Boolean indicating whether to wait for U-Boot to
                 echo the command text back to its output.
             send_nl: Boolean indicating whether to send a newline character
                 after the command string.

commit dd10e6c7ae9cc8cc9a762c2a56875411bce3cfcb
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Wed Sep 13 04:59:05 2017 +0200

    UPSTREAM: checkpatch.pl: Add warning for new __packed additions
    
    While there are valid reasons to use __packed, often the answer is that
    you should be doing something else here instead.
    
    This reintroduces the changes of
    f503cc49a570 (Add warning for new __packed additions)
    
    Change-Id: I83bacea893370139a6e980a946d93db25a73baf5
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 5c761ce58666b3a1695697498598f8bf3484a0c7)

diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl
index 2287a0bca8..4142f5c837 100755
--- a/scripts/checkpatch.pl
+++ b/scripts/checkpatch.pl
@@ -5616,6 +5616,13 @@ sub process {
 			     "__packed is preferred over __attribute__((packed))\n" . $herecurr);
 		}
 
+# Check for new packed members, warn to use care
+		if ($realfile !~ m@\binclude/uapi/@ &&
+		    $line =~ /\b(__attribute__\s*\(\s*\(.*\bpacked|__packed)\b/) {
+			WARN("NEW_PACKED",
+			     "Adding new packed members is to be done with care\n" . $herecurr);
+		}
+
 # Check for __attribute__ aligned, prefer __aligned
 		if ($realfile !~ m@\binclude/uapi/@ &&
 		    $line =~ /\b__attribute__\s*\(\s*\(.*aligned/) {

commit ec5e502c14081f0dec0c8b6862994ea01969af9b
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Tue Sep 12 19:00:36 2017 -0700

    UPSTREAM: cmd: blk: Use LBAFU in the common block command
    
    There is already a macro LBAFU to aid formatted print with lbaint_t
    variables. Let's use it in the common block command codes.
    
    Change-Id: I93256536d5af97877ecf9c4edc36d268b498dd1b
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit e2888a7fa7f8d23396c4b25ea763fe1f38851b3d)

diff --git a/cmd/blk_common.c b/cmd/blk_common.c
index 86c75e78d8..0c0c23eb37 100644
--- a/cmd/blk_common.c
+++ b/cmd/blk_common.c
@@ -68,9 +68,8 @@ int blk_common_cmd(int argc, char * const argv[], enum if_type if_type,
 			ulong cnt = simple_strtoul(argv[4], NULL, 16);
 			ulong n;
 
-			printf("\n%s read: device %d block # %lld, count %ld ... ",
-			       if_name, *cur_devnump, (unsigned long long)blk,
-			       cnt);
+			printf("\n%s read: device %d block # "LBAFU", count %lu ... ",
+			       if_name, *cur_devnump, blk, cnt);
 
 			n = blk_read_devnum(if_type, *cur_devnump, blk, cnt,
 					    (ulong *)addr);
@@ -84,9 +83,8 @@ int blk_common_cmd(int argc, char * const argv[], enum if_type if_type,
 			ulong cnt = simple_strtoul(argv[4], NULL, 16);
 			ulong n;
 
-			printf("\n%s write: device %d block # %lld, count %ld ... ",
-			       if_name, *cur_devnump, (unsigned long long)blk,
-			       cnt);
+			printf("\n%s write: device %d block # "LBAFU", count %lu ... ",
+			       if_name, *cur_devnump, blk, cnt);
 
 			n = blk_write_devnum(if_type, *cur_devnump, blk, cnt,
 					     (ulong *)addr);

commit 010034028fef0bf601f7e7474b516888e066cac3
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Tue Sep 12 19:00:23 2017 -0700

    UPSTREAM: blk: Remove various places that do flush cache after read
    
    All these places seem to inherit the codes from the MMC driver where
    a FIXME was put in the comment. However the correct operation after
    read should be cache invalidate, not flush.
    
    The underlying drivers should be responsible for the cache operation.
    Remove these codes completely.
    
    Change-Id: I8f04c721432753b34e85b19616a0b42d83a633eb
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Reviewed-by: Stefan Roese <sr@denx.de>
    Reviewed-by: York Sun <york.sun@nxp.com>
    Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Tested-by: York Sun <york.sun@nxp.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 723b43daec7ee2ddb600cfcb9b0253d4a71c3915)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ppa.c b/arch/arm/cpu/armv8/fsl-layerscape/ppa.c
index 24ddb5d991..bbf8bba112 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ppa.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ppa.c
@@ -107,9 +107,6 @@ int ppa_init(void)
 		return -EIO;
 	}
 
-	/* flush cache after read */
-	flush_cache((ulong)fitp, cnt * 512);
-
 	ret = fdt_check_header(fitp);
 	if (ret) {
 		free(fitp);
@@ -134,9 +131,6 @@ int ppa_init(void)
 	}
 	debug("Read PPA header to 0x%p\n", ppa_hdr_ddr);
 
-	/* flush cache after read */
-	flush_cache((ulong)ppa_hdr_ddr, cnt * 512);
-
 	ppa_esbc_hdr = (uintptr_t)ppa_hdr_ddr;
 #endif
 
@@ -164,9 +158,6 @@ int ppa_init(void)
 		return -EIO;
 	}
 
-	/* flush cache after read */
-	flush_cache((ulong)ppa_fit_addr, cnt * 512);
-
 #elif defined(CONFIG_SYS_LS_PPA_FW_IN_NAND)
 	struct fdt_header fit;
 
@@ -208,9 +199,6 @@ int ppa_init(void)
 	}
 	debug("Read PPA header to 0x%p\n", ppa_hdr_ddr);
 
-	/* flush cache after read */
-	flush_cache((ulong)ppa_hdr_ddr, fw_length);
-
 	ppa_esbc_hdr = (uintptr_t)ppa_hdr_ddr;
 #endif
 
@@ -232,9 +220,6 @@ int ppa_init(void)
 		       CONFIG_SYS_LS_PPA_FW_ADDR);
 		return -EIO;
 	}
-
-	/* flush cache after read */
-	flush_cache((ulong)ppa_fit_addr, fw_length);
 #else
 #error "No CONFIG_SYS_LS_PPA_FW_IN_xxx defined"
 #endif
diff --git a/board/toradex/common/tdx-cfg-block.c b/board/toradex/common/tdx-cfg-block.c
index 328c4c0200..f850a3c98e 100644
--- a/board/toradex/common/tdx-cfg-block.c
+++ b/board/toradex/common/tdx-cfg-block.c
@@ -129,8 +129,6 @@ static int tdx_cfg_block_mmc_storage(u8 *config_block, int write)
 			ret = -EIO;
 			goto out;
 		}
-		/* Flush cache after read */
-		flush_cache((ulong)(unsigned char *)config_block, 512);
 	} else {
 		/* Just writing one 512 byte block */
 		if (blk_dwrite(mmc_get_blk_desc(mmc), blk_start, 1,
diff --git a/cmd/mmc.c b/cmd/mmc.c
index ae42200bfa..af71e108f8 100644
--- a/cmd/mmc.c
+++ b/cmd/mmc.c
@@ -463,8 +463,6 @@ static int do_mmc_read(cmd_tbl_t *cmdtp, int flag,
 	       curr_device, blk, cnt);
 
 	n = blk_dread(mmc_get_blk_desc(mmc), blk, cnt, addr);
-	/* flush cache after read */
-	flush_cache((ulong)addr, cnt * 512); /* FIXME */
 	printf("%d blocks read: %s\n", n, (n == cnt) ? "OK" : "ERROR");
 
 	return (n == cnt) ? CMD_RET_SUCCESS : CMD_RET_FAILURE;
diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
index 4485f8026c..f8c650357a 100644
--- a/drivers/block/blk-uclass.c
+++ b/drivers/block/blk-uclass.c
@@ -296,9 +296,6 @@ ulong blk_read_devnum(enum if_type if_type, int devnum, lbaint_t start,
 	if (IS_ERR_VALUE(n))
 		return n;
 
-	/* flush cache after read */
-	flush_cache((ulong)buffer, blkcnt * desc->blksz);
-
 	return n;
 }
 
diff --git a/drivers/block/blk_legacy.c b/drivers/block/blk_legacy.c
index 981872ecb3..16d3bfe7f2 100644
--- a/drivers/block/blk_legacy.c
+++ b/drivers/block/blk_legacy.c
@@ -232,9 +232,6 @@ ulong blk_read_devnum(enum if_type if_type, int devnum, lbaint_t start,
 	if (IS_ERR_VALUE(n))
 		return n;
 
-	/* flush cache after read */
-	flush_cache((ulong)buffer, blkcnt * desc->blksz);
-
 	return n;
 }
 
diff --git a/drivers/net/fm/fm.c b/drivers/net/fm/fm.c
index 451dfded77..261f1b911b 100644
--- a/drivers/net/fm/fm.c
+++ b/drivers/net/fm/fm.c
@@ -405,8 +405,6 @@ int fm_init_common(int index, struct ccsr_fman *reg)
 		mmc_init(mmc);
 		(void)mmc->block_dev.block_read(&mmc->block_dev, blk, cnt,
 						addr);
-		/* flush cache after read */
-		flush_cache((ulong)addr, cnt * 512);
 	}
 #elif defined(CONFIG_SYS_QE_FMAN_FW_IN_REMOTE)
 	void *addr = (void *)CONFIG_SYS_FMAN_FW_ADDR;
diff --git a/drivers/net/phy/cortina.c b/drivers/net/phy/cortina.c
index e0e9ed9767..637d89a1e1 100644
--- a/drivers/net/phy/cortina.c
+++ b/drivers/net/phy/cortina.c
@@ -177,8 +177,6 @@ void cs4340_upload_firmware(struct phy_device *phydev)
 		mmc_init(mmc);
 		(void)mmc->block_dev.block_read(&mmc->block_dev, blk, cnt,
 						addr);
-		/* flush cache after read */
-		flush_cache((ulong)addr, cnt * 512);
 	}
 #endif
 
diff --git a/drivers/qe/qe.c b/drivers/qe/qe.c
index 24e764dc7c..931c9d903f 100644
--- a/drivers/qe/qe.c
+++ b/drivers/qe/qe.c
@@ -221,8 +221,6 @@ void u_qe_init(void)
 		mmc_init(mmc);
 		(void)mmc->block_dev.block_read(&mmc->block_dev, blk, cnt,
 						addr);
-		/* flush cache after read */
-		flush_cache((ulong)addr, cnt * 512);
 	}
 #endif
 	u_qe_upload_firmware(addr);

commit 6d7abe741904bd96d2e9269f8713caa5ef780970
Author: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Date:   Mon Sep 4 23:12:23 2017 +0300

    UPSTREAM: test: overlay: Add unit test for stacked overlay
    
    Verify that stacked overlays work.
    
    Change-Id: Id5c578db630bb34e952ca5176bb5ca9815bb0c0f
    Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
    Acked-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit ea28e488f743520f7f83b341f28818c32dae1ee3)

diff --git a/test/overlay/Makefile b/test/overlay/Makefile
index 907f085446..416645c884 100644
--- a/test/overlay/Makefile
+++ b/test/overlay/Makefile
@@ -13,3 +13,4 @@ DTC_FLAGS += -@
 # DT overlays
 obj-y += test-fdt-base.dtb.o
 obj-y += test-fdt-overlay.dtb.o
+obj-y += test-fdt-overlay-stacked.dtb.o
diff --git a/test/overlay/cmd_ut_overlay.c b/test/overlay/cmd_ut_overlay.c
index 7106f42a62..24891ee829 100644
--- a/test/overlay/cmd_ut_overlay.c
+++ b/test/overlay/cmd_ut_overlay.c
@@ -20,6 +20,7 @@
 
 extern u32 __dtb_test_fdt_base_begin;
 extern u32 __dtb_test_fdt_overlay_begin;
+extern u32 __dtb_test_fdt_overlay_stacked_begin;
 
 static int ut_fdt_getprop_u32_by_index(void *fdt, const char *path,
 				    const char *name, int index,
@@ -201,6 +202,19 @@ static int fdt_overlay_local_phandles(struct unit_test_state *uts)
 }
 OVERLAY_TEST(fdt_overlay_local_phandles, 0);
 
+static int fdt_overlay_stacked(struct unit_test_state *uts)
+{
+	void *fdt = uts->priv;
+	u32 val = 0;
+
+	ut_assertok(ut_fdt_getprop_u32(fdt, "/new-local-node",
+				       "stacked-test-int-property", &val));
+	ut_asserteq(43, val);
+
+	return CMD_RET_SUCCESS;
+}
+OVERLAY_TEST(fdt_overlay_stacked, 0);
+
 int do_ut_overlay(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
 	struct unit_test *tests = ll_entry_start(struct unit_test,
@@ -210,7 +224,8 @@ int do_ut_overlay(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	struct unit_test *test;
 	void *fdt_base = &__dtb_test_fdt_base_begin;
 	void *fdt_overlay = &__dtb_test_fdt_overlay_begin;
-	void *fdt_base_copy, *fdt_overlay_copy;
+	void *fdt_overlay_stacked = &__dtb_test_fdt_overlay_stacked_begin;
+	void *fdt_base_copy, *fdt_overlay_copy, *fdt_overlay_stacked_copy;
 
 	uts = calloc(1, sizeof(*uts));
 	if (!uts)
@@ -228,6 +243,10 @@ int do_ut_overlay(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	if (!fdt_overlay_copy)
 		return -ENOMEM;
 
+	fdt_overlay_stacked_copy = malloc(FDT_COPY_SIZE);
+	if (!fdt_overlay_stacked_copy)
+		return -ENOMEM;
+
 	/*
 	 * Resize the FDT to 4k so that we have room to operate on
 	 *
@@ -245,9 +264,21 @@ int do_ut_overlay(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	ut_assertok(fdt_open_into(fdt_overlay, fdt_overlay_copy,
 				  FDT_COPY_SIZE));
 
+	/*
+	 * Resize the stacked overlay to 4k so that we have room to operate on
+	 *
+	 * (and relocate it since the memory might be mapped
+	 * read-only)
+	 */
+	ut_assertok(fdt_open_into(fdt_overlay_stacked, fdt_overlay_stacked_copy,
+				  FDT_COPY_SIZE));
+
 	/* Apply the overlay */
 	ut_assertok(fdt_overlay_apply(fdt_base_copy, fdt_overlay_copy));
 
+	/* Apply the stacked overlay */
+	ut_assertok(fdt_overlay_apply(fdt_base_copy, fdt_overlay_stacked_copy));
+
 	if (argc == 1)
 		printf("Running %d environment tests\n", n_ents);
 
@@ -263,6 +294,7 @@ int do_ut_overlay(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 
 	printf("Failures: %d\n", uts->fail_count);
 
+	free(fdt_overlay_stacked_copy);
 	free(fdt_overlay_copy);
 	free(fdt_base_copy);
 	free(uts);
diff --git a/test/overlay/test-fdt-overlay-stacked.dts b/test/overlay/test-fdt-overlay-stacked.dts
new file mode 100644
index 0000000000..9fb7c7b017
--- /dev/null
+++ b/test/overlay/test-fdt-overlay-stacked.dts
@@ -0,0 +1,21 @@
+/*
+ * Copyright (c) 2016 NextThing Co
+ * Copyright (c) 2016 Free Electrons
+ * Copyright (c) 2018 Konsulko Group
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+/dts-v1/;
+/plugin/;
+
+/ {
+	/* Test that we can reference an overlay symbol */
+	fragment@0 {
+		target = <&local>;
+
+		__overlay__ {
+			stacked-test-int-property = <43>;
+		};
+	};
+};

commit ea99241c37dc21e8188c89a68cd74c3d311e85bb
Author: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Date:   Mon Sep 4 23:12:22 2017 +0300

    UPSTREAM: ut: fix fdt_getprop_u32() change
    
    fdt_getprop_u32 is not exported and it's different than what the
    unit test uses. Rename u32 prop access methods to something that's
    unit test specific.
    
    Change-Id: I0256118c7ae7b6709c4ef0791c53093e3117f23e
    Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
    Acked-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 706708d3b2e7ade443836e7a14802a5a63b59713)

diff --git a/test/overlay/cmd_ut_overlay.c b/test/overlay/cmd_ut_overlay.c
index cbef720b4c..7106f42a62 100644
--- a/test/overlay/cmd_ut_overlay.c
+++ b/test/overlay/cmd_ut_overlay.c
@@ -21,7 +21,7 @@
 extern u32 __dtb_test_fdt_base_begin;
 extern u32 __dtb_test_fdt_overlay_begin;
 
-static int fdt_getprop_u32_by_index(void *fdt, const char *path,
+static int ut_fdt_getprop_u32_by_index(void *fdt, const char *path,
 				    const char *name, int index,
 				    u32 *out)
 {
@@ -42,10 +42,10 @@ static int fdt_getprop_u32_by_index(void *fdt, const char *path,
 	return 0;
 }
 
-static int fdt_getprop_u32(void *fdt, const char *path, const char *name,
+static int ut_fdt_getprop_u32(void *fdt, const char *path, const char *name,
 			   u32 *out)
 {
-	return fdt_getprop_u32_by_index(fdt, path, name, 0, out);
+	return ut_fdt_getprop_u32_by_index(fdt, path, name, 0, out);
 }
 
 static int fdt_getprop_str(void *fdt, const char *path, const char *name,
@@ -68,7 +68,7 @@ static int fdt_overlay_change_int_property(struct unit_test_state *uts)
 	void *fdt = uts->priv;
 	u32 val = 0;
 
-	ut_assertok(fdt_getprop_u32(fdt, "/test-node", "test-int-property",
+	ut_assertok(ut_fdt_getprop_u32(fdt, "/test-node", "test-int-property",
 				    &val));
 	ut_asserteq(43, val);
 
@@ -158,11 +158,11 @@ static int fdt_overlay_local_phandle(struct unit_test_state *uts)
 	local_phandle = fdt_get_phandle(fdt, off);
 	ut_assert(local_phandle);
 
-	ut_assertok(fdt_getprop_u32_by_index(fdt, "/", "test-several-phandle",
+	ut_assertok(ut_fdt_getprop_u32_by_index(fdt, "/", "test-several-phandle",
 					     0, &val));
 	ut_asserteq(local_phandle, val);
 
-	ut_assertok(fdt_getprop_u32_by_index(fdt, "/", "test-several-phandle",
+	ut_assertok(ut_fdt_getprop_u32_by_index(fdt, "/", "test-several-phandle",
 					     1, &val));
 	ut_asserteq(local_phandle, val);
 
@@ -189,11 +189,11 @@ static int fdt_overlay_local_phandles(struct unit_test_state *uts)
 	test_phandle = fdt_get_phandle(fdt, off);
 	ut_assert(test_phandle);
 
-	ut_assertok(fdt_getprop_u32_by_index(fdt, "/", "test-phandle", 0,
+	ut_assertok(ut_fdt_getprop_u32_by_index(fdt, "/", "test-phandle", 0,
 					     &val));
 	ut_asserteq(test_phandle, val);
 
-	ut_assertok(fdt_getprop_u32_by_index(fdt, "/", "test-phandle", 1,
+	ut_assertok(ut_fdt_getprop_u32_by_index(fdt, "/", "test-phandle", 1,
 					     &val));
 	ut_asserteq(local_phandle, val);
 

commit 0608812d5b0a7a6d298018a52df60fa474e9267b
Author: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Date:   Mon Sep 4 23:12:21 2017 +0300

    UPSTREAM: config: sandbox: Add unit tests
    
    Add unit tests for sandbox default config.
    
    Change-Id: Icf7b645fd561eca1f702a42f2b0b72dd1bb38722
    Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
    Acked-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 1e9c4393fd0bc70b53d8159591043732acfb2bf3)

diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index e7a61bd61a..72600afea8 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -190,7 +190,9 @@ CONFIG_CMD_DHRYSTONE=y
 CONFIG_TPM=y
 CONFIG_LZ4=y
 CONFIG_ERRNO_STR=y
+CONFIG_OF_LIBFDT_OVERLAY=y
 CONFIG_UNIT_TEST=y
 CONFIG_UT_TIME=y
 CONFIG_UT_DM=y
 CONFIG_UT_ENV=y
+CONFIG_UT_OVERLAY=y

commit 6a53d8fa9f52c61d08f4f19448d8a0287aaced91
Author: Franklin S Cooper Jr <fcooper@ti.com>
Date:   Mon Sep 4 23:12:19 2017 +0300

    UPSTREAM: doc: overlays: Tweak documentation regarding overlays
    
    Pull some information regarding overlays from commit messages and
    put them directly within the documentation. Also add some information
    regarding required dtc version to properly use overlays.
    
    Change-Id: Idccfd1db39dd27a19415f05738e65ca43413cb25
    Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
    Acked-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 56fc7032e1771882a086e8283586fc7c733ba6bd)

diff --git a/doc/README.fdt-overlays b/doc/README.fdt-overlays
index ee868eca36..39139cb850 100644
--- a/doc/README.fdt-overlays
+++ b/doc/README.fdt-overlays
@@ -1,9 +1,76 @@
-U-Boot FDT Overlay usage (without FIT images)
+U-Boot FDT Overlay usage
 =============================================
 
-FDT overlays are now available for use even without FIT images.
-It is not as automagic as with FIT images though and require a few
-manual steps.
+Overlays Syntax
+---------------
+
+Overlays require slightly different syntax compared to traditional overlays.
+Please refer to dt-object-internal.txt in the dtc sources for information
+regarding the internal format of overlays:
+https://git.kernel.org/pub/scm/utils/dtc/dtc.git/tree/Documentation/dt-object-internal.txt
+
+Building Overlays
+-----------------
+
+In a nutshell overlays provides a means to manipulate a symbol a previous dtb
+or overlay has defined. It requires both the base and all the overlays
+to be compiled with the -@ command line switch so that symbol information is
+included.
+
+Note support for -@ option can only be found in dtc version 1.4.4 or newer.
+Only version 4.14 or higher of the Linux kernel includes a built in version
+of dtc that meets this requirement.
+
+Building an overlay follows the same process as building a traditional dtb.
+
+For example:
+
+base.dts
+--------
+
+	/dts-v1/;
+	/ {
+		foo: foonode {
+			foo-property;
+		};
+	};
+
+	$ dtc -@ -I dts -O dtb -o base.dtb base.dts
+
+bar.dts
+-------
+
+	/dts-v1/;
+	/plugin/;
+	/ {
+		fragment@1 {
+			target = <&foo>;
+			__overlay__ {
+				overlay-1-property;
+				bar: barnode {
+					bar-property;
+				};
+			};
+		};
+	};
+
+	$ dtc -@ -I dts -O dtb -o bar.dtb bar.dts
+
+Ways to Utilize Overlays in U-boot
+----------------------------------
+
+There are two ways to apply overlays in U-boot.
+1. Include and define overlays within a FIT image and have overlays
+   automatically applied.
+
+2. Manually load and apply overlays
+
+The remainder of this document will discuss using overlays via the manual
+approach. For information on using overlays as part of a FIT image please see:
+doc/uImage.FIT/overlay-fdt-boot.txt
+
+Manually Loading and Applying Overlays
+--------------------------------------
 
 1. Figure out where to place both the base device tree blob and the
 overlay. Make sure you have enough space to grow the base tree without
@@ -29,6 +96,16 @@ overlapping anything.
 
 => fdt apply $fdtovaddr
 
+6. Boot system like you would do with a traditional dtb.
+
+For bootm:
+
+=> bootm ${kerneladdr} - ${fdtaddr}
+
+For bootz:
+
+=> bootz ${kerneladdr} - ${fdtaddr}
+
 Please note that in case of an error, both the base and overlays are going
 to be invalidated, so keep copies to avoid reloading.
 
diff --git a/doc/uImage.FIT/overlay-fdt-boot.txt b/doc/uImage.FIT/overlay-fdt-boot.txt
index dbdf2a1ce9..63e47da2a9 100644
--- a/doc/uImage.FIT/overlay-fdt-boot.txt
+++ b/doc/uImage.FIT/overlay-fdt-boot.txt
@@ -1,5 +1,5 @@
-U-Boot FDT Overlay usage
-========================
+U-Boot FDT Overlay FIT usage
+============================
 
 Introduction
 ------------
@@ -8,6 +8,10 @@ of similar boards and their expansion options. The same kernel on DT enabled
 platforms can support this easily enough by providing a DT blob upon boot
 that matches the desired configuration.
 
+This document focuses on specifically using overlays as part of a FIT image.
+General information regarding overlays including its syntax and building it
+can be found in doc/README.fdt-overlays
+
 Configuration without overlays
 ------------------------------
 

commit b8631b11ec8643dabd94eae4997742f2db322488
Author: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Date:   Mon Sep 4 23:12:20 2017 +0300

    UPSTREAM: dtbo: make dtbos special
    
    Special rule for dtbo generation
    
    Change-Id: Iac5a5054f43bd732b4278c14ed2fbf3044bf2c28
    Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
    Acked-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit da0b3a946f1a5135297b92e5a18ff97ab10145d6)

diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index 9ce47b4d22..2a7ed70cf2 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -321,6 +321,23 @@ $(obj)/%.dtb: $(src)/%.dts FORCE
 
 dtc-tmp = $(subst $(comma),_,$(dot-target).dts.tmp)
 
+# DTCO
+# ---------------------------------------------------------------------------
+
+quiet_cmd_dtco = DTCO    $@
+# Rule for objects only; does not put specific u-boot include at the end
+# No generation of assembly file either
+# Modified for U-Boot
+cmd_dtco = mkdir -p $(dir ${dtc-tmp}) ; \
+	$(CPP) $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) - ; \
+	$(DTC) -@ -O dtb -o $@ -b 0 \
+		-i $(dir $<) $(DTC_FLAGS) \
+		-d $(depfile).dtc.tmp $(dtc-tmp) ; \
+	cat $(depfile).pre.tmp $(depfile).dtc.tmp > $(depfile)
+
+$(obj)/%.dtbo: $(src)/%.dts FORCE
+	$(call if_changed_dep,dtco)
+
 # Fonts
 # ---------------------------------------------------------------------------
 

commit 994d9d06da2f0237dbf9b03801e11a1250fdebe6
Author: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Date:   Mon Sep 4 23:12:18 2017 +0300

    UPSTREAM: doc: Document how to apply fdt overlays
    
    We have the capability to apply overlays on the command line but
    we didn't have a document explaining how.
    
    Change-Id: Idec1c3eac1ef3b52f4329d2ce9bffdd8b9aac32b
    Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
    Reviewed-by: Łukasz Majewski
    Acked-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit d80162cfc559491dee3009b120e7268e9388302f)

diff --git a/doc/README.fdt-overlays b/doc/README.fdt-overlays
new file mode 100644
index 0000000000..ee868eca36
--- /dev/null
+++ b/doc/README.fdt-overlays
@@ -0,0 +1,37 @@
+U-Boot FDT Overlay usage (without FIT images)
+=============================================
+
+FDT overlays are now available for use even without FIT images.
+It is not as automagic as with FIT images though and require a few
+manual steps.
+
+1. Figure out where to place both the base device tree blob and the
+overlay. Make sure you have enough space to grow the base tree without
+overlapping anything.
+
+=> setenv fdtaddr 0x87f00000
+=> setenv fdtovaddr 0x87fc0000
+
+2. Load the base blob and overlay blobs
+
+=> load ${devtype} ${bootpart} ${fdtaddr} ${bootdir}/base.dtb
+=> load ${devtype} ${bootpart} ${fdtovaddr} ${bootdir}/overlay.dtb
+
+3. Set it as the working fdt tree.
+
+=> fdtaddr $fdtaddr
+
+4. Grow it enough so it can 'fit' all the applied overlays
+
+=> fdt resize 8192
+
+5. You are now ready to apply the overlay.
+
+=> fdt apply $fdtovaddr
+
+Please note that in case of an error, both the base and overlays are going
+to be invalidated, so keep copies to avoid reloading.
+
+Pantelis Antoniou
+pantelis.antoniou@konsulko.com
+11/7/2017

commit a116ed492986001ce939044ee9fb84ae5af2d768
Author: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Date:   Mon Sep 4 23:12:17 2017 +0300

    UPSTREAM: fit: fdt overlays doc
    
    Change-Id: I69e26ac5683578d8a3333e33e94b65556af479bb
    Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
    Reviewed-by: Łukasz Majewski
    Acked-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 6b54e50b5a5889efe179cb06aa6aa25583ef25d5)

diff --git a/doc/uImage.FIT/command_syntax_extensions.txt b/doc/uImage.FIT/command_syntax_extensions.txt
index 6c99b1c159..676f992f90 100644
--- a/doc/uImage.FIT/command_syntax_extensions.txt
+++ b/doc/uImage.FIT/command_syntax_extensions.txt
@@ -36,7 +36,7 @@ Old uImage:
 New uImage:
 8.  bootm <addr1>
 9.  bootm [<addr1>]:<subimg1>
-10. bootm [<addr1>]#<conf>
+10. bootm [<addr1>]#<conf>[#<extra-conf[#...]]
 11. bootm [<addr1>]:<subimg1> [<addr2>]:<subimg2>
 12. bootm [<addr1>]:<subimg1> [<addr2>]:<subimg2> [<addr3>]:<subimg3>
 13. bootm [<addr1>]:<subimg1> [<addr2>]:<subimg2> <addr3>
@@ -129,6 +129,12 @@ following syntax:
 - new uImage configuration specification
 <addr>#<configuration unit_name>
 
+- new uImage configuration specification with extra configuration components
+<addr>#<configuration unit_name>[#<extra configuration unit_name>[#..]]
+
+The extra configuration currently is supported only for additional device tree
+overlays to apply on the base device tree supplied by the first configuration
+unit.
 
 Examples:
 
@@ -138,6 +144,10 @@ bootm 200000:kernel@1
 - boot configuration "cfg@1" from a new uImage located at 200000:
 bootm 200000#cfg@1
 
+- boot configuration "cfg@1" with extra "cfg@2" from a new uImage located
+  at 200000:
+bootm 200000#cfg@1#cfg@2
+
 - boot "kernel@1" from a new uImage at 200000 with initrd "ramdisk@2" found in
   some other new uImage stored at address 800000:
 bootm 200000:kernel@1 800000:ramdisk@2
diff --git a/doc/uImage.FIT/overlay-fdt-boot.txt b/doc/uImage.FIT/overlay-fdt-boot.txt
new file mode 100644
index 0000000000..dbdf2a1ce9
--- /dev/null
+++ b/doc/uImage.FIT/overlay-fdt-boot.txt
@@ -0,0 +1,221 @@
+U-Boot FDT Overlay usage
+========================
+
+Introduction
+------------
+In many cases it is desirable to have a single FIT image support a multitude
+of similar boards and their expansion options. The same kernel on DT enabled
+platforms can support this easily enough by providing a DT blob upon boot
+that matches the desired configuration.
+
+Configuration without overlays
+------------------------------
+
+Take a hypothetical board named 'foo' where there are different supported
+revisions, reva and revb. Assume that both board revisions can use add a bar
+add-on board, while only the revb board can use a baz add-on board.
+
+Without using overlays the configuration would be as follows for every case.
+
+	/dts-v1/;
+	/ {
+		images {
+			kernel@1 {
+				data = /incbin/("./zImage");
+				type = "kernel";
+				arch = "arm";
+				os = "linux";
+				load = <0x82000000>;
+				entry = <0x82000000>;
+			};
+			fdt@1 {
+				data = /incbin/("./foo-reva.dtb");
+				type = "flat_dt";
+				arch = "arm";
+			};
+			fdt@2 {
+				data = /incbin/("./foo-revb.dtb");
+				type = "flat_dt";
+				arch = "arm";
+			};
+			fdt@3 {
+				data = /incbin/("./foo-reva-bar.dtb");
+				type = "flat_dt";
+				arch = "arm";
+			};
+			fdt@4 {
+				data = /incbin/("./foo-revb-bar.dtb");
+				type = "flat_dt";
+				arch = "arm";
+			};
+			fdt@5 {
+				data = /incbin/("./foo-revb-baz.dtb");
+				type = "flat_dt";
+				arch = "arm";
+			};
+			fdt@6 {
+				data = /incbin/("./foo-revb-bar-baz.dtb");
+				type = "flat_dt";
+				arch = "arm";
+			};
+		};
+
+		configurations {
+			default = "foo-reva.dtb;
+			foo-reva.dtb {
+				kernel = "kernel@1";
+				fdt = "fdt@1";
+			};
+			foo-revb.dtb {
+				kernel = "kernel@1";
+				fdt = "fdt@2";
+			};
+			foo-reva-bar.dtb {
+				kernel = "kernel@1";
+				fdt = "fdt@3";
+			};
+			foo-revb-bar.dtb {
+				kernel = "kernel@1";
+				fdt = "fdt@4";
+			};
+			foo-revb-baz.dtb {
+				kernel = "kernel@1";
+				fdt = "fdt@5";
+			};
+			foo-revb-bar-baz.dtb {
+				kernel = "kernel@1";
+				fdt = "fdt@6";
+			};
+		};
+	};
+
+Note the blob needs to be compiled for each case and the combinatorial explosion of
+configurations. A typical device tree blob is in the low hunderds of kbytes so a
+multitude of configuration grows the image quite a bit.
+
+Booting this image is done by using
+
+	# bootm <addr>#<config>
+
+Where config is one of:
+	foo-reva.dtb, foo-revb.dtb, foo-reva-bar.dtb, foo-revb-bar.dtb,
+	foo-revb-baz.dtb, foo-revb-bar-baz.dtb
+
+This selects the DTB to use when booting.
+
+Configuration using overlays
+----------------------------
+
+Device tree overlays can be applied to a base DT and result in the same blob
+being passed to the booting kernel. This saves on space and avoid the combinatorial
+explosion problem.
+
+	/dts-v1/;
+	/ {
+		images {
+			kernel@1 {
+				data = /incbin/("./zImage");
+				type = "kernel";
+				arch = "arm";
+				os = "linux";
+				load = <0x82000000>;
+				entry = <0x82000000>;
+			};
+			fdt@1 {
+				data = /incbin/("./foo.dtb");
+				type = "flat_dt";
+				arch = "arm";
+				load = <0x87f00000>;
+			};
+			fdt@2 {
+				data = /incbin/("./reva.dtbo");
+				type = "flat_dt";
+				arch = "arm";
+				load = <0x87fc0000>;
+			};
+			fdt@3 {
+				data = /incbin/("./revb.dtbo");
+				type = "flat_dt";
+				arch = "arm";
+				load = <0x87fc0000>;
+			};
+			fdt@4 {
+				data = /incbin/("./bar.dtbo");
+				type = "flat_dt";
+				arch = "arm";
+				load = <0x87fc0000>;
+			};
+			fdt@5 {
+				data = /incbin/("./baz.dtbo");
+				type = "flat_dt";
+				arch = "arm";
+				load = <0x87fc0000>;
+			};
+		};
+
+		configurations {
+			default = "foo-reva.dtb;
+			foo-reva.dtb {
+				kernel = "kernel@1";
+				fdt = "fdt@1", "fdt@2";
+			};
+			foo-revb.dtb {
+				kernel = "kernel@1";
+				fdt = "fdt@1", "fdt@3";
+			};
+			foo-reva-bar.dtb {
+				kernel = "kernel@1";
+				fdt = "fdt@1", "fdt@2", "fdt@4";
+			};
+			foo-revb-bar.dtb {
+				kernel = "kernel@1";
+				fdt = "fdt@1", "fdt@3", "fdt@4";
+			};
+			foo-revb-baz.dtb {
+				kernel = "kernel@1";
+				fdt = "fdt@1", "fdt@3", "fdt@5";
+			};
+			foo-revb-bar-baz.dtb {
+				kernel = "kernel@1";
+				fdt = "fdt@1", "fdt@3", "fdt@4", "fdt@5";
+			};
+			bar {
+				fdt = "fdt@4";
+			};
+			baz {
+				fdt = "fdt@5";
+			};
+		};
+	};
+
+Booting this image is exactly the same as the non-overlay example.
+u-boot will retrieve the base blob and apply the overlays in sequence as
+they are declared in the configuration.
+
+Note the minimum amount of different DT blobs, as well as the requirement for
+the DT blobs to have a load address; the overlay application requires the blobs
+to be writeable.
+
+Configuration using overlays and feature selection
+--------------------------------------------------
+
+Although the configuration in the previous section works is a bit inflexible
+since it requires all possible configuration options to be laid out before
+hand in the FIT image. For the add-on boards the extra config selection method
+might make sense.
+
+Note the two bar & baz configuration nodes. To boot a reva board with
+the bar add-on board enabled simply use:
+
+	# bootm <addr>#foo-reva.dtb#bar
+
+While booting a revb with bar and baz is as follows:
+
+	# bootm <addr>#foo-revb.dtb#bar#baz
+
+The limitation for a feature selection configuration node is that a single
+fdt option is currently supported.
+
+Pantelis Antoniou
+pantelis.antoniou@konsulko.com
+12/6/2017
diff --git a/doc/uImage.FIT/source_file_format.txt b/doc/uImage.FIT/source_file_format.txt
index 32825eda8d..6f727a1e8a 100644
--- a/doc/uImage.FIT/source_file_format.txt
+++ b/doc/uImage.FIT/source_file_format.txt
@@ -235,7 +235,7 @@ o config@1
   |- description = "configuration description"
   |- kernel = "kernel sub-node unit name"
   |- ramdisk = "ramdisk sub-node unit name"
-  |- fdt = "fdt sub-node unit-name"
+  |- fdt = "fdt sub-node unit-name" [, "fdt overlay sub-node unit-name", ...]
   |- fpga = "fpga sub-node unit-name"
   |- loadables = "loadables sub-node unit-name"
 
@@ -249,7 +249,9 @@ o config@1
   - ramdisk : Unit name of the corresponding ramdisk image (component image
     node of a "ramdisk" type).
   - fdt : Unit name of the corresponding fdt blob (component image node of a
-    "fdt type").
+    "fdt type"). Additional fdt overlay nodes can be supplied which signify
+    that the resulting device tree blob is generated by the first base fdt
+    blob with all subsequent overlays applied.
   - setup : Unit name of the corresponding setup binary (used for booting
     an x86 kernel). This contains the setup.bin file built by the kernel.
   - fpga : Unit name of the corresponding fpga bitstream blob

commit 988a4042e64cd509bacc443ec0df332993a351eb
Author: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Date:   Mon Sep 4 23:12:16 2017 +0300

    UPSTREAM: fit: Introduce methods for applying overlays on fit-load
    
    Introduce an overlay based method for constructing a base DT blob
    to pass to the kernel.
    
    It is based on a specific method now to get the FDT from a FIT image
    named boot_get_fdt_fit().
    
    Change-Id: I98e0526edd594e63b1c29bdd916e4c66774f4337
    Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
    Acked-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 169043d826e6b0db3c67a60acbedfc72c43aae5d)

diff --git a/common/image-fdt.c b/common/image-fdt.c
index da4d007081..a2ef409836 100644
--- a/common/image-fdt.c
+++ b/common/image-fdt.c
@@ -356,17 +356,16 @@ int boot_get_fdt(int flag, int argc, char * const argv[], uint8_t arch,
 			if (fit_check_format(buf)) {
 				ulong load, len;
 
-				fdt_noffset = fit_image_load(images,
+				fdt_noffset = boot_get_fdt_fit(images,
 					fdt_addr, &fit_uname_fdt,
 					&fit_uname_config,
-					arch, IH_TYPE_FLATDT,
-					BOOTSTAGE_ID_FIT_FDT_START,
-					FIT_LOAD_OPTIONAL, &load, &len);
+					arch, &load, &len);
 
 				images->fit_hdr_fdt = map_sysmem(fdt_addr, 0);
 				images->fit_uname_fdt = fit_uname_fdt;
 				images->fit_noffset_fdt = fdt_noffset;
 				fdt_addr = load;
+
 				break;
 			} else
 #endif
diff --git a/common/image-fit.c b/common/image-fit.c
index e75cb649a4..7f17fd1410 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -19,6 +19,7 @@
 #include <errno.h>
 #include <mapmem.h>
 #include <asm/io.h>
+#include <malloc.h>
 DECLARE_GLOBAL_DATA_PTR;
 #endif /* !USE_HOSTCC*/
 
@@ -434,6 +435,10 @@ void fit_image_print(const void *fit, int image_noffset, const char *p)
 			printf("0x%08lx\n", load);
 	}
 
+	/* optional load address for FDT */
+	if (type == IH_TYPE_FLATDT && !fit_image_get_load(fit, image_noffset, &load))
+		printf("%s  Load Address: 0x%08lx\n", p, load);
+
 	if ((type == IH_TYPE_KERNEL) || (type == IH_TYPE_STANDALONE) ||
 	    (type == IH_TYPE_RAMDISK)) {
 		ret = fit_image_get_entry(fit, image_noffset, &entry);
@@ -1454,6 +1459,8 @@ int fit_conf_get_node(const void *fit, const char *conf_uname)
 {
 	int noffset, confs_noffset;
 	int len;
+	const char *s;
+	char *conf_uname_copy = NULL;
 
 	confs_noffset = fdt_path_offset(fit, FIT_CONFS_PATH);
 	if (confs_noffset < 0) {
@@ -1475,12 +1482,29 @@ int fit_conf_get_node(const void *fit, const char *conf_uname)
 		debug("Found default configuration: '%s'\n", conf_uname);
 	}
 
+	s = strchr(conf_uname, '#');
+	if (s) {
+		len = s - conf_uname;
+		conf_uname_copy = malloc(len + 1);
+		if (!conf_uname_copy) {
+			debug("Can't allocate uname copy: '%s'\n",
+					conf_uname);
+			return -ENOMEM;
+		}
+		memcpy(conf_uname_copy, conf_uname, len);
+		conf_uname_copy[len] = '\0';
+		conf_uname = conf_uname_copy;
+	}
+
 	noffset = fdt_subnode_offset(fit, confs_noffset, conf_uname);
 	if (noffset < 0) {
 		debug("Can't get node offset for configuration unit name: '%s' (%s)\n",
 		      conf_uname, fdt_strerror(noffset));
 	}
 
+	if (conf_uname_copy)
+		free(conf_uname_copy);
+
 	return noffset;
 }
 
@@ -1527,7 +1551,7 @@ void fit_conf_print(const void *fit, int noffset, const char *p)
 	char *desc;
 	const char *uname;
 	int ret;
-	int loadables_index;
+	int fdt_index, loadables_index;
 
 	/* Mandatory properties */
 	ret = fit_get_desc(fit, noffset, &desc);
@@ -1549,9 +1573,17 @@ void fit_conf_print(const void *fit, int noffset, const char *p)
 	if (uname)
 		printf("%s  Init Ramdisk: %s\n", p, uname);
 
-	uname = fdt_getprop(fit, noffset, FIT_FDT_PROP, NULL);
-	if (uname)
-		printf("%s  FDT:          %s\n", p, uname);
+	for (fdt_index = 0;
+	     uname = fdt_stringlist_get(fit, noffset, FIT_FDT_PROP,
+					fdt_index, NULL), uname;
+	     fdt_index++) {
+
+		if (fdt_index == 0)
+			printf("%s  FDT:          ", p);
+		else
+			printf("%s                ", p);
+		printf("%s\n", uname);
+	}
 
 	uname = fdt_getprop(fit, noffset, FIT_FPGA_PROP, NULL);
 	if (uname)
@@ -1888,3 +1920,144 @@ int boot_get_setup_fit(bootm_headers_t *images, uint8_t arch,
 
 	return ret;
 }
+
+#ifndef USE_HOSTCC
+int boot_get_fdt_fit(bootm_headers_t *images, ulong addr,
+		   const char **fit_unamep, const char **fit_uname_configp,
+		   int arch, ulong *datap, ulong *lenp)
+{
+	int fdt_noffset, cfg_noffset, count;
+	const void *fit;
+	const char *fit_uname = NULL;
+	const char *fit_uname_config = NULL;
+	char *fit_uname_config_copy = NULL;
+	char *next_config = NULL;
+	ulong load, len;
+#ifdef CONFIG_OF_LIBFDT_OVERLAY
+	ulong image_start, image_end;
+	ulong ovload, ovlen;
+	const char *uconfig;
+	const char *uname;
+	void *base, *ov;
+	int i, err, noffset, ov_noffset;
+#endif
+
+	fit_uname = fit_unamep ? *fit_unamep : NULL;
+
+	if (fit_uname_configp && *fit_uname_configp) {
+		fit_uname_config_copy = strdup(*fit_uname_configp);
+		if (!fit_uname_config_copy)
+			return -ENOMEM;
+
+		next_config = strchr(fit_uname_config_copy, '#');
+		if (next_config)
+			*next_config++ = '\0';
+		if (next_config - 1 > fit_uname_config_copy)
+			fit_uname_config = fit_uname_config_copy;
+	}
+
+	fdt_noffset = fit_image_load(images,
+		addr, &fit_uname, &fit_uname_config,
+		arch, IH_TYPE_FLATDT,
+		BOOTSTAGE_ID_FIT_FDT_START,
+		FIT_LOAD_OPTIONAL, &load, &len);
+
+	if (fdt_noffset < 0)
+		goto out;
+
+	debug("fit_uname=%s, fit_uname_config=%s\n",
+			fit_uname ? fit_uname : "<NULL>",
+			fit_uname_config ? fit_uname_config : "<NULL>");
+
+	fit = map_sysmem(addr, 0);
+
+	cfg_noffset = fit_conf_get_node(fit, fit_uname_config);
+
+	/* single blob, or error just return as well */
+	count = fit_conf_get_prop_node_count(fit, cfg_noffset, FIT_FDT_PROP);
+	if (count <= 1 && !next_config)
+		goto out;
+
+	/* we need to apply overlays */
+
+#ifdef CONFIG_OF_LIBFDT_OVERLAY
+	image_start = addr;
+	image_end = addr + fit_get_size(fit);
+	/* verify that relocation took place by load address not being in fit */
+	if (load >= image_start && load < image_end) {
+		/* check is simplified; fit load checks for overlaps */
+		printf("Overlayed FDT requires relocation\n");
+		fdt_noffset = -EBADF;
+		goto out;
+	}
+
+	base = map_sysmem(load, len);
+
+	/* apply extra configs in FIT first, followed by args */
+	for (i = 1; ; i++) {
+		if (i < count) {
+			noffset = fit_conf_get_prop_node_index(fit, cfg_noffset,
+							       FIT_FDT_PROP, i);
+			uname = fit_get_name(fit, noffset, NULL);
+			uconfig = NULL;
+		} else {
+			if (!next_config)
+				break;
+			uconfig = next_config;
+			next_config = strchr(next_config, '#');
+			if (next_config)
+				*next_config++ = '\0';
+			uname = NULL;
+		}
+
+		debug("%d: using uname=%s uconfig=%s\n", i, uname, uconfig);
+
+		ov_noffset = fit_image_load(images,
+			addr, &uname, &uconfig,
+			arch, IH_TYPE_FLATDT,
+			BOOTSTAGE_ID_FIT_FDT_START,
+			FIT_LOAD_REQUIRED, &ovload, &ovlen);
+		if (ov_noffset < 0) {
+			printf("load of %s failed\n", uname);
+			continue;
+		}
+		debug("%s loaded at 0x%08lx len=0x%08lx\n",
+				uname, ovload, ovlen);
+		ov = map_sysmem(ovload, ovlen);
+
+		base = map_sysmem(load, len + ovlen);
+		err = fdt_open_into(base, base, len + ovlen);
+		if (err < 0) {
+			printf("failed on fdt_open_into\n");
+			fdt_noffset = err;
+			goto out;
+		}
+		/* the verbose method prints out messages on error */
+		err = fdt_overlay_apply_verbose(base, ov);
+		if (err < 0) {
+			fdt_noffset = err;
+			goto out;
+		}
+		fdt_pack(base);
+		len = fdt_totalsize(base);
+	}
+#else
+	printf("config with overlays but CONFIG_OF_LIBFDT_OVERLAY not set\n");
+	fdt_noffset = -EBADF;
+#endif
+
+out:
+	if (datap)
+		*datap = load;
+	if (lenp)
+		*lenp = len;
+	if (fit_unamep)
+		*fit_unamep = fit_uname;
+	if (fit_uname_configp)
+		*fit_uname_configp = fit_uname_config;
+
+	if (fit_uname_config_copy)
+		free(fit_uname_config_copy);
+	return fdt_noffset;
+}
+#endif
diff --git a/include/image.h b/include/image.h
index e74bd8286b..b16a34cd6a 100644
--- a/include/image.h
+++ b/include/image.h
@@ -594,6 +594,31 @@ int boot_get_loadable(int argc, char * const argv[], bootm_headers_t *images,
 int boot_get_setup_fit(bootm_headers_t *images, uint8_t arch,
 		       ulong *setup_start, ulong *setup_len);
 
+/**
+ * boot_get_fdt_fit() - load a DTB from a FIT file (applying overlays)
+ *
+ * This deals with all aspects of loading an DTB from a FIT.
+ * The correct base image based on configuration will be selected, and
+ * then any overlays specified will be applied (as present in fit_uname_configp).
+ *
+ * @param images	Boot images structure
+ * @param addr		Address of FIT in memory
+ * @param fit_unamep	On entry this is the requested image name
+ *			(e.g. "kernel@1") or NULL to use the default. On exit
+ *			points to the selected image name
+ * @param fit_uname_configp	On entry this is the requested configuration
+ *			name (e.g. "conf@1") or NULL to use the default. On
+ *			exit points to the selected configuration name.
+ * @param arch		Expected architecture (IH_ARCH_...)
+ * @param datap		Returns address of loaded image
+ * @param lenp		Returns length of loaded image
+ *
+ * @return node offset of base image, or -ve error code on error
+ */
+int boot_get_fdt_fit(bootm_headers_t *images, ulong addr,
+		   const char **fit_unamep, const char **fit_uname_configp,
+		   int arch, ulong *datap, ulong *lenp);
+
 /**
  * fit_image_load() - load an image from a FIT
  *

commit 06686a7b4c59a330482f9234485c7b126caf539d
Author: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Date:   Mon Sep 4 23:12:15 2017 +0300

    UPSTREAM: fit: Do not throw away extra configuration on fit_image_load()
    
    fit_image_load() threw away the extra configuration parts when
    loading. We need them around for applying extra overlays for
    building the boot fdt.
    
    Change-Id: Icad7d35f5efb4ebb16a2dba969a9228674d7fb39
    Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
    Acked-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 7c3dc776b91a683b2f7dd40ed91361124a3a91c0)

diff --git a/common/image-fit.c b/common/image-fit.c
index 74e555754c..e75cb649a4 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -1653,6 +1653,7 @@ int fit_image_load(bootm_headers_t *images, ulong addr,
 	int cfg_noffset, noffset;
 	const char *fit_uname;
 	const char *fit_uname_config;
+	const char *fit_base_uname_config;
 	const void *fit;
 	const void *buf;
 	size_t size;
@@ -1668,6 +1669,7 @@ int fit_image_load(bootm_headers_t *images, ulong addr,
 	fit = map_sysmem(addr, 0);
 	fit_uname = fit_unamep ? *fit_unamep : NULL;
 	fit_uname_config = fit_uname_configp ? *fit_uname_configp : NULL;
+	fit_base_uname_config = NULL;
 	prop_name = fit_get_image_type_property(image_type);
 	printf("## Loading %s from FIT Image at %08lx ...\n", prop_name, addr);
 
@@ -1701,11 +1703,11 @@ int fit_image_load(bootm_headers_t *images, ulong addr,
 					BOOTSTAGE_SUB_NO_UNIT_NAME);
 			return -ENOENT;
 		}
-		fit_uname_config = fdt_get_name(fit, cfg_noffset, NULL);
-		printf("   Using '%s' configuration\n", fit_uname_config);
+		fit_base_uname_config = fdt_get_name(fit, cfg_noffset, NULL);
+		printf("   Using '%s' configuration\n", fit_base_uname_config);
 		if (image_type == IH_TYPE_KERNEL) {
 			/* Remember (and possibly verify) this config */
-			images->fit_uname_cfg = fit_uname_config;
+			images->fit_uname_cfg = fit_base_uname_config;
 			if (IMAGE_ENABLE_VERIFY && images->verify) {
 				puts("   Verifying Hash Integrity ... ");
 				if (fit_config_verify(fit, cfg_noffset)) {
@@ -1861,7 +1863,8 @@ int fit_image_load(bootm_headers_t *images, ulong addr,
 	if (fit_unamep)
 		*fit_unamep = (char *)fit_uname;
 	if (fit_uname_configp)
-		*fit_uname_configp = (char *)fit_uname_config;
+		*fit_uname_configp = (char *)(fit_uname_config ? :
+					      fit_base_uname_config);
 
 	return noffset;
 }

commit 75488a387b887ab514e3b76957579ef4d1d36f3d
Author: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Date:   Mon Sep 4 23:12:14 2017 +0300

    UPSTREAM: fit: Allow multiple images per property
    
    As part of the fdt overlay support which need it, allow
    a list of configurations per property.
    
    Change-Id: I3068dcdd2bd823fd2ee5cfa0d337c4589e2a9588
    Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
    Acked-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit ad026adbcf0d719e736eb58a9059cbbebb2d2423)

diff --git a/common/image-fit.c b/common/image-fit.c
index 109ecfaacc..74e555754c 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -1484,20 +1484,32 @@ int fit_conf_get_node(const void *fit, const char *conf_uname)
 	return noffset;
 }
 
-int fit_conf_get_prop_node(const void *fit, int noffset,
+int fit_conf_get_prop_node_count(const void *fit, int noffset,
 		const char *prop_name)
 {
-	char *uname;
+	return fdt_stringlist_count(fit, noffset, prop_name);
+}
+
+int fit_conf_get_prop_node_index(const void *fit, int noffset,
+		const char *prop_name, int index)
+{
+	const char *uname;
 	int len;
 
 	/* get kernel image unit name from configuration kernel property */
-	uname = (char *)fdt_getprop(fit, noffset, prop_name, &len);
+	uname = fdt_stringlist_get(fit, noffset, prop_name, index, &len);
 	if (uname == NULL)
 		return len;
 
 	return fit_image_get_node(fit, uname);
 }
 
+int fit_conf_get_prop_node(const void *fit, int noffset,
+		const char *prop_name)
+{
+	return fit_conf_get_prop_node_index(fit, noffset, prop_name, 0);
+}
+
 /**
  * fit_conf_print - prints out the FIT configuration details
  * @fit: pointer to the FIT format image header

commit d80212386f8fa0edf9cf0aebe22210430f4d34f8
Author: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Date:   Mon Sep 4 23:12:13 2017 +0300

    UPSTREAM: fdt: Allow stacked overlays phandle references
    
    This patch enables an overlay to refer to a previous overlay's
    labels by performing a merge of symbol information at application
    time.
    
    In a nutshell it allows an overlay to refer to a symbol that a previous
    overlay has defined. It requires both the base and all the overlays
    to be compiled with the -@ command line switch so that symbol
    information is included.
    
    base.dts
    --------
    
            /dts-v1/;
            / {
                    foo: foonode {
                            foo-property;
                    };
            };
    
            $ dtc -@ -I dts -O dtb -o base.dtb base.dts
    
    bar.dts
    -------
    
            /dts-v1/;
            /plugin/;
            / {
                    fragment@1 {
                            target = <&foo>;
                            __overlay__ {
                                    overlay-1-property;
                                    bar: barnode {
                                            bar-property;
                                    };
                            };
                    };
            };
    
            $ dtc -@ -I dts -O dtb -o bar.dtb bar.dts
    
    baz.dts
    -------
    
            /dts-v1/;
            /plugin/;
            / {
                    fragment@1 {
                            target = <&bar>;
                            __overlay__ {
                                    overlay-2-property;
                                    baz: baznode {
                                            baz-property;
                                    };
                            };
                    };
            };
    
            $ dtc -@ -I dts -O dtb -o baz.dtb baz.dts
    
    Applying the overlays:
    
            $ fdtoverlay -i base.dtb -o target.dtb bar.dtb baz.dtb
    
    Dumping:
    
            $ fdtdump target.dtb
            / {
                foonode {
                    overlay-1-property;
                    foo-property;
                    linux,phandle = <0x00000001>;
                    phandle = <0x00000001>;
                    barnode {
                        overlay-2-property;
                        phandle = <0x00000002>;
                        linux,phandle = <0x00000002>;
                        bar-property;
                        baznode {
                            phandle = <0x00000003>;
                            linux,phandle = <0x00000003>;
                            baz-property;
                        };
                    };
                };
                __symbols__ {
                    baz = "/foonode/barnode/baznode";
                    bar = "/foonode/barnode";
                    foo = "/foonode";
                };
            };
    
    Change-Id: If72870ec3e9260ccd4fbcbaff27ba035d001bd00
    Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
    Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
    Acked-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit f00c36a01e774dea1ed2a1171da9e372610ee8eb)

diff --git a/lib/libfdt/fdt_overlay.c b/lib/libfdt/fdt_overlay.c
index ceb968786e..bd81241e66 100644
--- a/lib/libfdt/fdt_overlay.c
+++ b/lib/libfdt/fdt_overlay.c
@@ -39,6 +39,7 @@ static uint32_t overlay_get_target_phandle(const void *fdto, int fragment)
  * @fdt: Base device tree blob
  * @fdto: Device tree overlay blob
  * @fragment: node offset of the fragment in the overlay
+ * @pathp: pointer which receives the path of the target (or NULL)
  *
  * overlay_get_target() retrieves the target offset in the base
  * device tree of a fragment, no matter how the actual targetting is
@@ -49,37 +50,47 @@ static uint32_t overlay_get_target_phandle(const void *fdto, int fragment)
  *      Negative error code on error
  */
 static int overlay_get_target(const void *fdt, const void *fdto,
-			      int fragment)
+			      int fragment, char const **pathp)
 {
 	uint32_t phandle;
-	const char *path;
-	int path_len;
+	const char *path = NULL;
+	int path_len = 0, ret;
 
 	/* Try first to do a phandle based lookup */
 	phandle = overlay_get_target_phandle(fdto, fragment);
 	if (phandle == (uint32_t)-1)
 		return -FDT_ERR_BADPHANDLE;
 
-	if (phandle)
-		return fdt_node_offset_by_phandle(fdt, phandle);
+	/* no phandle, try path */
+	if (!phandle) {
+		/* And then a path based lookup */
+		path = fdt_getprop(fdto, fragment, "target-path", &path_len);
+		if (path)
+			ret = fdt_path_offset(fdt, path);
+		else
+			ret = path_len;
+	} else
+		ret = fdt_node_offset_by_phandle(fdt, phandle);
 
-	/* And then a path based lookup */
-	path = fdt_getprop(fdto, fragment, "target-path", &path_len);
-	if (!path) {
-		/*
-		 * If we haven't found either a target or a
-		 * target-path property in a node that contains a
-		 * __overlay__ subnode (we wouldn't be called
-		 * otherwise), consider it a improperly written
-		 * overlay
-		 */
-		if (path_len == -FDT_ERR_NOTFOUND)
-			return -FDT_ERR_BADOVERLAY;
+	/*
+	* If we haven't found either a target or a
+	* target-path property in a node that contains a
+	* __overlay__ subnode (we wouldn't be called
+	* otherwise), consider it a improperly written
+	* overlay
+	*/
+	if (ret < 0 && path_len == -FDT_ERR_NOTFOUND)
+		ret = -FDT_ERR_BADOVERLAY;
+
+	/* return on error */
+	if (ret < 0)
+		return ret;
 
-		return path_len;
-	}
+	/* return pointer to path (if available) */
+	if (pathp)
+		*pathp = path ? path : NULL;
 
-	return fdt_path_offset(fdt, path);
+	return ret;
 }
 
 /**
@@ -590,7 +601,7 @@ static int overlay_apply_node(void *fdt, int target,
  *
  * overlay_merge() merges an overlay into its base device tree.
  *
- * This is the final step in the device tree overlay application
+ * This is the next to last step in the device tree overlay application
  * process, when all the phandles have been adjusted and resolved and
  * you just have to merge overlay into the base device tree.
  *
@@ -618,7 +629,7 @@ static int overlay_merge(void *fdt, void *fdto)
 		if (overlay < 0)
 			return overlay;
 
-		target = overlay_get_target(fdt, fdto, fragment);
+		target = overlay_get_target(fdt, fdto, fragment, NULL);
 		if (target < 0)
 			return target;
 
@@ -630,6 +641,175 @@ static int overlay_merge(void *fdt, void *fdto)
 	return 0;
 }
 
+static int get_path_len(const void *fdt, int nodeoffset)
+{
+	int len = 0, namelen;
+	const char *name;
+
+	FDT_CHECK_HEADER(fdt);
+
+	for (;;) {
+		name = fdt_get_name(fdt, nodeoffset, &namelen);
+		if (!name)
+			return namelen;
+
+		/* root? we're done */
+		if (namelen == 0)
+			break;
+
+		nodeoffset = fdt_parent_offset(fdt, nodeoffset);
+		if (nodeoffset < 0)
+			return nodeoffset;
+		len += namelen + 1;
+	}
+
+	/* in case of root pretend it's "/" */
+	if (len == 0)
+		len++;
+	return len;
+}
+
+/**
+ * overlay_symbol_update - Update the symbols of base tree after a merge
+ * @fdt: Base Device Tree blob
+ * @fdto: Device tree overlay blob
+ *
+ * overlay_symbol_update() updates the symbols of the base tree with the
+ * symbols of the applied overlay
+ *
+ * This is the last step in the device tree overlay application
+ * process, allowing the reference of overlay symbols by subsequent
+ * overlay operations.
+ *
+ * returns:
+ *      0 on success
+ *      Negative error code on failure
+ */
+static int overlay_symbol_update(void *fdt, void *fdto)
+{
+	int root_sym, ov_sym, prop, path_len, fragment, target;
+	int len, frag_name_len, ret, rel_path_len;
+	const char *s, *e;
+	const char *path;
+	const char *name;
+	const char *frag_name;
+	const char *rel_path;
+	const char *target_path;
+	char *buf;
+	void *p;
+
+	ov_sym = fdt_subnode_offset(fdto, 0, "__symbols__");
+
+	/* if no overlay symbols exist no problem */
+	if (ov_sym < 0)
+		return 0;
+
+	root_sym = fdt_subnode_offset(fdt, 0, "__symbols__");
+
+	/* it no root symbols exist we should create them */
+	if (root_sym == -FDT_ERR_NOTFOUND)
+		root_sym = fdt_add_subnode(fdt, 0, "__symbols__");
+
+	/* any error is fatal now */
+	if (root_sym < 0)
+		return root_sym;
+
+	/* iterate over each overlay symbol */
+	fdt_for_each_property_offset(prop, fdto, ov_sym) {
+		path = fdt_getprop_by_offset(fdto, prop, &name, &path_len);
+		if (!path)
+			return path_len;
+
+		/* verify it's a string property (terminated by a single \0) */
+		if (path_len < 1 || memchr(path, '\0', path_len) != &path[path_len - 1])
+			return -FDT_ERR_BADVALUE;
+
+		/* keep end marker to avoid strlen() */
+		e = path + path_len;
+
+		/* format: /<fragment-name>/__overlay__/<relative-subnode-path> */
+
+		if (*path != '/')
+			return -FDT_ERR_BADVALUE;
+
+		/* get fragment name first */
+		s = strchr(path + 1, '/');
+		if (!s)
+			return -FDT_ERR_BADOVERLAY;
+
+		frag_name = path + 1;
+		frag_name_len = s - path - 1;
+
+		/* verify format; safe since "s" lies in \0 terminated prop */
+		len = sizeof("/__overlay__/") - 1;
+		if ((e - s) < len || memcmp(s, "/__overlay__/", len))
+			return -FDT_ERR_BADOVERLAY;
+
+		rel_path = s + len;
+		rel_path_len = e - rel_path;
+
+		/* find the fragment index in which the symbol lies */
+		ret = fdt_subnode_offset_namelen(fdto, 0, frag_name,
+					       frag_name_len);
+		/* not found? */
+		if (ret < 0)
+			return -FDT_ERR_BADOVERLAY;
+		fragment = ret;
+
+		/* an __overlay__ subnode must exist */
+		ret = fdt_subnode_offset(fdto, fragment, "__overlay__");
+		if (ret < 0)
+			return -FDT_ERR_BADOVERLAY;
+
+		/* get the target of the fragment */
+		ret = overlay_get_target(fdt, fdto, fragment, &target_path);
+		if (ret < 0)
+			return ret;
+		target = ret;
+
+		/* if we have a target path use */
+		if (!target_path) {
+			ret = get_path_len(fdt, target);
+			if (ret < 0)
+				return ret;
+			len = ret;
+		} else {
+			len = strlen(target_path);
+		}
+
+		ret = fdt_setprop_placeholder(fdt, root_sym, name,
+				len + (len > 1) + rel_path_len + 1, &p);
+		if (ret < 0)
+			return ret;
+
+		if (!target_path) {
+			/* again in case setprop_placeholder changed it */
+			ret = overlay_get_target(fdt, fdto, fragment, &target_path);
+			if (ret < 0)
+				return ret;
+			target = ret;
+		}
+
+		buf = p;
+		if (len > 1) { /* target is not root */
+			if (!target_path) {
+				ret = fdt_get_path(fdt, target, buf, len + 1);
+				if (ret < 0)
+					return ret;
+			} else
+				memcpy(buf, target_path, len + 1);
+
+		} else
+			len--;
+
+		buf[len] = '/';
+		memcpy(buf + len + 1, rel_path, rel_path_len);
+		buf[len + 1 + rel_path_len] = '\0';
+	}
+
+	return 0;
+}
+
 int fdt_overlay_apply(void *fdt, void *fdto)
 {
 	uint32_t delta = fdt_get_max_phandle(fdt);
@@ -654,6 +834,10 @@ int fdt_overlay_apply(void *fdt, void *fdto)
 	if (ret)
 		goto err;
 
+	ret = overlay_symbol_update(fdt, fdto);
+	if (ret)
+		goto err;
+
 	/*
 	 * The overlay has been damaged, erase its magic.
 	 */

commit 7c95a4956fe81f1897fa418a957b697ed375fb73
Author: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Date:   Mon Sep 4 23:12:12 2017 +0300

    UPSTREAM: fdt: Switch to using the verbose overlay application method
    
    The verbose overlay application method prints out more helpful
    messages, so switch to it.
    
    Change-Id: Ie8bd31e939e3c12fe547028d0fa3ddc8b254d33d
    Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
    Acked-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 81ecc5d92badfcf1415a6052b5896a62271a94dc)

diff --git a/cmd/fdt.c b/cmd/fdt.c
index d7654b2c4f..955a0088c6 100644
--- a/cmd/fdt.c
+++ b/cmd/fdt.c
@@ -667,11 +667,10 @@ static int do_fdt(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 		if (!fdt_valid(&blob))
 			return CMD_RET_FAILURE;
 
-		ret = fdt_overlay_apply(working_fdt, blob);
-		if (ret) {
-			printf("fdt_overlay_apply(): %s\n", fdt_strerror(ret));
+		/* apply method prints messages on error */
+		ret = fdt_overlay_apply_verbose(working_fdt, blob);
+		if (ret)
 			return CMD_RET_FAILURE;
-		}
 	}
 #endif
 	/* resize the fdt */

commit 0939009dd9925908e7a4bde4547f06f8c863fa02
Author: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Date:   Mon Sep 4 23:12:11 2017 +0300

    UPSTREAM: fdt: Introduce helper method fdt_overlay_apply_verbose()
    
    Introduce fdt_overlay_apply_verbose, a method that applies an
    overlay but in the case of an error produces a helpful message.
    
    In addition if a base tree is found to be missing the __symbols__
    node the message will point out that the probable reason is that
    the base tree was miscompiled without the -@ option.
    
    Change-Id: I22cc210c6a7bb0aaa9655197c859f54677532099
    Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
    Acked-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit fc7c31891c40dd1aac2e71e9d1546727ca2b3556)

diff --git a/common/fdt_support.c b/common/fdt_support.c
index 7e6a6696b6..d725276d7b 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -1681,3 +1681,34 @@ int fdt_fixup_display(void *blob, const char *path, const char *display)
 	}
 	return toff;
 }
+
+#ifdef CONFIG_OF_LIBFDT_OVERLAY
+/**
+ * fdt_overlay_apply_verbose - Apply an overlay with verbose error reporting
+ *
+ * @fdt: ptr to device tree
+ * @fdto: ptr to device tree overlay
+ *
+ * Convenience function to apply an overlay and display helpful messages
+ * in the case of an error
+ */
+int fdt_overlay_apply_verbose(void *fdt, void *fdto)
+{
+	int err;
+	bool has_symbols;
+
+	err = fdt_path_offset(fdt, "/__symbols__");
+	has_symbols = err >= 0;
+
+	err = fdt_overlay_apply(fdt, fdto);
+	if (err < 0) {
+		printf("failed on fdt_overlay_apply(): %s\n",
+				fdt_strerror(err));
+		if (!has_symbols) {
+			printf("base fdt does did not have a /__symbols__ node\n");
+			printf("make sure you've compiled with -@\n");
+		}
+	}
+	return err;
+}
+#endif
diff --git a/include/fdt_support.h b/include/fdt_support.h
index 5ef78cce6e..2bca4d7889 100644
--- a/include/fdt_support.h
+++ b/include/fdt_support.h
@@ -264,6 +264,8 @@ int arch_fixup_memory_node(void *blob);
 int fdt_setup_simplefb_node(void *fdt, int node, u64 base_address, u32 width,
 			    u32 height, u32 stride, const char *format);
 
+int fdt_overlay_apply_verbose(void *fdt, void *fdto);
+
 #endif /* ifdef CONFIG_OF_LIBFDT */
 
 #ifdef USE_HOSTCC

commit 174235d4a20bb6f971c9f1045478d7ed5d13ab5d
Author: Tien Fong Chee <tien.fong.chee@intel.com>
Date:   Wed Aug 30 13:15:42 2017 +0800

    UPSTREAM: libfdt: Initialize the stack variable
    
    Report Coverity log:
    The code uses a variable that has not
    been initialized, leading to unpredictable
    or unintended results.
    
    Change-Id: I488a9d183590a2dc1ef049351d0c71a4eded2299
    Reported-by: Coverity (CID: 60519)
    Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 18c991ca2bd72c30b7fb578cee8b5c7c835d383d)

diff --git a/lib/libfdt/fdt_wip.c b/lib/libfdt/fdt_wip.c
index 45fb964120..01adad0ee9 100644
--- a/lib/libfdt/fdt_wip.c
+++ b/lib/libfdt/fdt_wip.c
@@ -115,7 +115,7 @@ int fdt_find_regions(const void *fdt, char * const inc[], int inc_count,
 		     struct fdt_region region[], int max_regions,
 		     char *path, int path_len, int add_string_tab)
 {
-	int stack[FDT_MAX_DEPTH];
+	int stack[FDT_MAX_DEPTH] = { 0 };
 	char *end;
 	int nextoffset = 0;
 	uint32_t tag;

commit 7551eb4f057d4900e93e7d35893b86677e8bd60e
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Tue Sep 12 09:57:45 2017 +0200

    UPSTREAM: checkpatch: update from Linux v4.13-rc6
    
    Checkpatch produces the following warning:
    
    Unescaped left brace in regex is deprecated here
    (and will be fatal in Perl 5.30), passed through in regex;
    marked by <-- HERE in m/^(\+.*(?:do|\))){ <-- HERE /
    at scripts/checkpatch.pl line 3348.
    
    The curent checkpatch of the Linux kernel corrects this
    bug and many others.
    
    It provides improved colored output.
    
    So replace checkpatch by the current Linux version.
    
    Add an empty file scripts/const_structs.checkpatch.
    We can later fill it according to our needs.
    
    Change-Id: I307d182d41de6288798e002b9d8990e23d027e63
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 6305db960447ff2d32c335de8bbd9b44cb7d6554)

diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl
index 3afc870f0f..2287a0bca8 100755
--- a/scripts/checkpatch.pl
+++ b/scripts/checkpatch.pl
@@ -1,4 +1,4 @@
-#!/usr/bin/perl -w
+#!/usr/bin/env perl
 # (c) 2001, Dave Jones. (the file handling bit)
 # (c) 2005, Joel Schopp <jschopp@austin.ibm.com> (the ugly bit)
 # (c) 2007,2008, Andy Whitcroft <apw@uk.ibm.com> (new conditions, test suite)
@@ -6,12 +6,13 @@
 # Licensed under the terms of the GNU GPL License version 2
 
 use strict;
+use warnings;
 use POSIX;
 use File::Basename;
 use Cwd 'abs_path';
+use Term::ANSIColor qw(:constants);
 
 my $P = $0;
-$P =~ s@.*/@@g;
 my $D = dirname(abs_path($P));
 
 my $V = '0.32';
@@ -25,12 +26,17 @@ my $chk_patch = 1;
 my $tst_only;
 my $emacs = 0;
 my $terse = 0;
+my $showfile = 0;
 my $file = 0;
+my $git = 0;
+my %git_commits = ();
 my $check = 0;
+my $check_orig = 0;
 my $summary = 1;
 my $mailback = 0;
 my $summary_file = 0;
 my $show_types = 0;
+my $list_types = 0;
 my $fix = 0;
 my $fix_inplace = 0;
 my $root;
@@ -45,9 +51,14 @@ my $configuration_file = ".checkpatch.conf";
 my $max_line_length = 80;
 my $ignore_perl_version = 0;
 my $minimum_perl_version = 5.10.0;
+my $min_conf_desc_length = 4;
 my $spelling_file = "$D/spelling.txt";
 my $codespell = 0;
 my $codespellfile = "/usr/share/codespell/dictionary.txt";
+my $conststructsfile = "$D/const_structs.checkpatch";
+my $typedefsfile = "";
+my $color = "auto";
+my $allow_c99_comments = 1;
 
 sub help {
 	my ($exitcode) = @_;
@@ -63,12 +74,25 @@ Options:
   --patch                    treat FILE as patchfile (default)
   --emacs                    emacs compile window format
   --terse                    one line per report
+  --showfile                 emit diffed file position, not input file position
+  -g, --git                  treat FILE as a single commit or git revision range
+                             single git commit with:
+                               <rev>
+                               <rev>^
+                               <rev>~n
+                             multiple git commits with:
+                               <rev1>..<rev2>
+                               <rev1>...<rev2>
+                               <rev>-<count>
+                             git merges are ignored
   -f, --file                 treat FILE as regular source file
   --subjective, --strict     enable more subjective tests
+  --list-types               list the possible message types
   --types TYPE(,TYPE2...)    show only these comma separated message types
   --ignore TYPE(,TYPE2...)   ignore various comma separated message types
+  --show-types               show the specific message type in the output
   --max-line-length=n        set the maximum line length, if exceeded, warn
-  --show-types               show the message "types" in the output
+  --min-conf-desc-length=n   set the min description length, if shorter, warn
   --root=PATH                PATH to the kernel tree root
   --no-summary               suppress the per-file summary
   --mailback                 only produce a report in case of warnings/errors
@@ -89,8 +113,11 @@ Options:
   --ignore-perl-version      override checking of perl version.  expect
                              runtime errors.
   --codespell                Use the codespell dictionary for spelling/typos
-                             (default:/usr/local/share/codespell/dictionary.txt)
+                             (default:/usr/share/codespell/dictionary.txt)
   --codespellfile            Use this codespell dictionary
+  --typedefsfile             Read additional types from this file
+  --color[=WHEN]             Use colors 'always', 'never', or only when output
+                             is a terminal ('auto'). Default is 'auto'.
   -h, --help, --version      display this help and exit
 
 When FILE is - read standard input.
@@ -99,6 +126,37 @@ EOM
 	exit($exitcode);
 }
 
+sub uniq {
+	my %seen;
+	return grep { !$seen{$_}++ } @_;
+}
+
+sub list_types {
+	my ($exitcode) = @_;
+
+	my $count = 0;
+
+	local $/ = undef;
+
+	open(my $script, '<', abs_path($P)) or
+	    die "$P: Can't read '$P' $!\n";
+
+	my $text = <$script>;
+	close($script);
+
+	my @types = ();
+	for ($text =~ /\b(?:(?:CHK|WARN|ERROR)\s*\(\s*"([^"]+)")/g) {
+		push (@types, $_);
+	}
+	@types = sort(uniq(@types));
+	print("#\tMessage type\n\n");
+	foreach my $type (@types) {
+		print(++$count . "\t" . $type . "\n");
+	}
+
+	exit($exitcode);
+}
+
 my $conf = which_conf($configuration_file);
 if (-f $conf) {
 	my @conf_args;
@@ -125,6 +183,14 @@ if (-f $conf) {
 	unshift(@ARGV, @conf_args) if @conf_args;
 }
 
+# Perl's Getopt::Long allows options to take optional arguments after a space.
+# Prevent --color by itself from consuming other arguments
+foreach (@ARGV) {
+	if ($_ eq "--color" || $_ eq "-color") {
+		$_ = "--color=$color";
+	}
+}
+
 GetOptions(
 	'q|quiet+'	=> \$quiet,
 	'tree!'		=> \$tree,
@@ -132,13 +198,17 @@ GetOptions(
 	'patch!'	=> \$chk_patch,
 	'emacs!'	=> \$emacs,
 	'terse!'	=> \$terse,
+	'showfile!'	=> \$showfile,
 	'f|file!'	=> \$file,
+	'g|git!'	=> \$git,
 	'subjective!'	=> \$check,
 	'strict!'	=> \$check,
 	'ignore=s'	=> \@ignore,
 	'types=s'	=> \@use,
 	'show-types!'	=> \$show_types,
+	'list-types!'	=> \$list_types,
 	'max-line-length=i' => \$max_line_length,
+	'min-conf-desc-length=i' => \$min_conf_desc_length,
 	'root=s'	=> \$root,
 	'summary!'	=> \$summary,
 	'mailback!'	=> \$mailback,
@@ -148,15 +218,22 @@ GetOptions(
 	'ignore-perl-version!' => \$ignore_perl_version,
 	'debug=s'	=> \%debug,
 	'test-only=s'	=> \$tst_only,
-	'codespell!'    => \$codespell,
-	'codespellfile=s' => \$codespellfile,
+	'codespell!'	=> \$codespell,
+	'codespellfile=s'	=> \$codespellfile,
+	'typedefsfile=s'	=> \$typedefsfile,
+	'color=s'	=> \$color,
+	'no-color'	=> \$color,	#keep old behaviors of -nocolor
+	'nocolor'	=> \$color,	#keep old behaviors of -nocolor
 	'h|help'	=> \$help,
 	'version'	=> \$help
 ) or help(1);
 
 help(0) if ($help);
 
+list_types(0) if ($list_types);
+
 $fix = 1 if ($fix_inplace);
+$check_orig = $check;
 
 my $exit = 0;
 
@@ -167,9 +244,21 @@ if ($^V && $^V lt $minimum_perl_version) {
 	}
 }
 
+#if no filenames are given, push '-' to read patch from stdin
 if ($#ARGV < 0) {
-	print "$P: no input files\n";
-	exit(1);
+	push(@ARGV, '-');
+}
+
+if ($color =~ /^[01]$/) {
+	$color = !$color;
+} elsif ($color =~ /^always$/i) {
+	$color = 1;
+} elsif ($color =~ /^never$/i) {
+	$color = 0;
+} elsif ($color =~ /^auto$/i) {
+	$color = (-t STDOUT);
+} else {
+	die "Invalid color mode: $color\n";
 }
 
 sub hash_save_array_words {
@@ -192,12 +281,12 @@ sub hash_save_array_words {
 sub hash_show_words {
 	my ($hashRef, $prefix) = @_;
 
-	if ($quiet == 0 && keys %$hashRef) {
-		print "NOTE: $prefix message types:";
+	if (keys %$hashRef) {
+		print "\nNOTE: $prefix message types:";
 		foreach my $word (sort keys %$hashRef) {
 			print " $word";
 		}
-		print "\n\n";
+		print "\n";
 	}
 }
 
@@ -257,7 +346,8 @@ our $Sparse	= qr{
 			__init_refok|
 			__kprobes|
 			__ref|
-			__rcu
+			__rcu|
+			__private
 		}x;
 our $InitAttributePrefix = qr{__(?:mem|cpu|dev|net_|)};
 our $InitAttributeData = qr{$InitAttributePrefix(?:initdata\b)};
@@ -272,7 +362,7 @@ our $Attribute	= qr{
 			__percpu|
 			__nocast|
 			__safe|
-			__bitwise__|
+			__bitwise|
 			__packed__|
 			__packed2__|
 			__naked|
@@ -281,6 +371,7 @@ our $Attribute	= qr{
 			__noreturn|
 			__used|
 			__cold|
+			__pure|
 			__noclone|
 			__deprecated|
 			__read_mostly|
@@ -292,7 +383,7 @@ our $Attribute	= qr{
 			__weak
 		  }x;
 our $Modifier;
-our $Inline	= qr{inline|__always_inline|noinline};
+our $Inline	= qr{inline|__always_inline|noinline|__inline|__inline__};
 our $Member	= qr{->$Ident|\.$Ident|\[[^]]*\]};
 our $Lval	= qr{$Ident(?:$Member)*};
 
@@ -300,13 +391,15 @@ our $Int_type	= qr{(?i)llu|ull|ll|lu|ul|l|u};
 our $Binary	= qr{(?i)0b[01]+$Int_type?};
 our $Hex	= qr{(?i)0x[0-9a-f]+$Int_type?};
 our $Int	= qr{[0-9]+$Int_type?};
+our $Octal	= qr{0[0-7]+$Int_type?};
+our $String	= qr{"[X\t]*"};
 our $Float_hex	= qr{(?i)0x[0-9a-f]+p-?[0-9]+[fl]?};
 our $Float_dec	= qr{(?i)(?:[0-9]+\.[0-9]*|[0-9]*\.[0-9]+)(?:e-?[0-9]+)?[fl]?};
 our $Float_int	= qr{(?i)[0-9]+e-?[0-9]+[fl]?};
 our $Float	= qr{$Float_hex|$Float_dec|$Float_int};
-our $Constant	= qr{$Float|$Binary|$Hex|$Int};
+our $Constant	= qr{$Float|$Binary|$Octal|$Hex|$Int};
 our $Assignment	= qr{\*\=|/=|%=|\+=|-=|<<=|>>=|&=|\^=|\|=|=};
-our $Compare    = qr{<=|>=|==|!=|<|>};
+our $Compare    = qr{<=|>=|==|!=|<|(?<!-)>};
 our $Arithmetic = qr{\+|-|\*|\/|%};
 our $Operators	= qr{
 			<=|>=|==|!=|
@@ -314,10 +407,16 @@ our $Operators	= qr{
 			&&|\|\||,|\^|\+\+|--|&|\||$Arithmetic
 		  }x;
 
+our $c90_Keywords = qr{do|for|while|if|else|return|goto|continue|switch|default|case|break}x;
+
+our $BasicType;
 our $NonptrType;
+our $NonptrTypeMisordered;
 our $NonptrTypeWithAttr;
 our $Type;
+our $TypeMisordered;
 our $Declare;
+our $DeclareMisordered;
 
 our $NON_ASCII_UTF8	= qr{
 	[\xC2-\xDF][\x80-\xBF]               # non-overlong 2-byte
@@ -334,19 +433,28 @@ our $UTF8	= qr{
 	| $NON_ASCII_UTF8
 }x;
 
-our $typeTypedefs = qr{(?x:
+our $typeC99Typedefs = qr{(?:__)?(?:[us]_?)?int_?(?:8|16|32|64)_t};
+our $typeOtherOSTypedefs = qr{(?x:
+	u_(?:char|short|int|long) |          # bsd
+	u(?:nchar|short|int|long)            # sysv
+)};
+our $typeKernelTypedefs = qr{(?x:
 	(?:__)?(?:u|s|be|le)(?:8|16|32|64)|
 	atomic_t
 )};
+our $typeTypedefs = qr{(?x:
+	$typeC99Typedefs\b|
+	$typeOtherOSTypedefs\b|
+	$typeKernelTypedefs\b
+)};
+
+our $zero_initializer = qr{(?:(?:0[xX])?0+$Int_type?|NULL|false)\b};
 
 our $logFunctions = qr{(?x:
-	printk(?:_ratelimited|_once|)|
+	printk(?:_ratelimited|_once|_deferred_once|_deferred|)|
 	(?:[a-z0-9]+_){1,2}(?:printk|emerg|alert|crit|err|warning|warn|notice|info|debug|dbg|vdbg|devel|cont|WARN)(?:_ratelimited|_once|)|
 	WARN(?:_RATELIMIT|_ONCE|)|
 	panic|
-	debug|
-	printf|
-	puts|
 	MODULE_[A-Z_]+|
 	seq_vprintf|seq_printf|seq_puts
 )};
@@ -362,16 +470,36 @@ our $signature_tags = qr{(?xi:
 	Cc:
 )};
 
+our @typeListMisordered = (
+	qr{char\s+(?:un)?signed},
+	qr{int\s+(?:(?:un)?signed\s+)?short\s},
+	qr{int\s+short(?:\s+(?:un)?signed)},
+	qr{short\s+int(?:\s+(?:un)?signed)},
+	qr{(?:un)?signed\s+int\s+short},
+	qr{short\s+(?:un)?signed},
+	qr{long\s+int\s+(?:un)?signed},
+	qr{int\s+long\s+(?:un)?signed},
+	qr{long\s+(?:un)?signed\s+int},
+	qr{int\s+(?:un)?signed\s+long},
+	qr{int\s+(?:un)?signed},
+	qr{int\s+long\s+long\s+(?:un)?signed},
+	qr{long\s+long\s+int\s+(?:un)?signed},
+	qr{long\s+long\s+(?:un)?signed\s+int},
+	qr{long\s+long\s+(?:un)?signed},
+	qr{long\s+(?:un)?signed},
+);
+
 our @typeList = (
 	qr{void},
-	qr{(?:unsigned\s+)?char},
-	qr{(?:unsigned\s+)?short},
-	qr{(?:unsigned\s+)?int},
-	qr{(?:unsigned\s+)?long},
-	qr{(?:unsigned\s+)?long\s+int},
-	qr{(?:unsigned\s+)?long\s+long},
-	qr{(?:unsigned\s+)?long\s+long\s+int},
-	qr{unsigned},
+	qr{(?:(?:un)?signed\s+)?char},
+	qr{(?:(?:un)?signed\s+)?short\s+int},
+	qr{(?:(?:un)?signed\s+)?short},
+	qr{(?:(?:un)?signed\s+)?int},
+	qr{(?:(?:un)?signed\s+)?long\s+int},
+	qr{(?:(?:un)?signed\s+)?long\s+long\s+int},
+	qr{(?:(?:un)?signed\s+)?long\s+long},
+	qr{(?:(?:un)?signed\s+)?long},
+	qr{(?:un)?signed},
 	qr{float},
 	qr{double},
 	qr{bool},
@@ -381,7 +509,31 @@ our @typeList = (
 	qr{${Ident}_t},
 	qr{${Ident}_handler},
 	qr{${Ident}_handler_fn},
+	@typeListMisordered,
 );
+
+our $C90_int_types = qr{(?x:
+	long\s+long\s+int\s+(?:un)?signed|
+	long\s+long\s+(?:un)?signed\s+int|
+	long\s+long\s+(?:un)?signed|
+	(?:(?:un)?signed\s+)?long\s+long\s+int|
+	(?:(?:un)?signed\s+)?long\s+long|
+	int\s+long\s+long\s+(?:un)?signed|
+	int\s+(?:(?:un)?signed\s+)?long\s+long|
+
+	long\s+int\s+(?:un)?signed|
+	long\s+(?:un)?signed\s+int|
+	long\s+(?:un)?signed|
+	(?:(?:un)?signed\s+)?long\s+int|
+	(?:(?:un)?signed\s+)?long|
+	int\s+long\s+(?:un)?signed|
+	int\s+(?:(?:un)?signed\s+)?long|
+
+	int\s+(?:un)?signed|
+	(?:(?:un)?signed\s+)?int
+)};
+
+our @typeListFile = ();
 our @typeListWithAttr = (
 	@typeList,
 	qr{struct\s+$InitAttribute\s+$Ident},
@@ -391,10 +543,67 @@ our @typeListWithAttr = (
 our @modifierList = (
 	qr{fastcall},
 );
+our @modifierListFile = ();
+
+our @mode_permission_funcs = (
+	["module_param", 3],
+	["module_param_(?:array|named|string)", 4],
+	["module_param_array_named", 5],
+	["debugfs_create_(?:file|u8|u16|u32|u64|x8|x16|x32|x64|size_t|atomic_t|bool|blob|regset32|u32_array)", 2],
+	["proc_create(?:_data|)", 2],
+	["(?:CLASS|DEVICE|SENSOR|SENSOR_DEVICE|IIO_DEVICE)_ATTR", 2],
+	["IIO_DEV_ATTR_[A-Z_]+", 1],
+	["SENSOR_(?:DEVICE_|)ATTR_2", 2],
+	["SENSOR_TEMPLATE(?:_2|)", 3],
+	["__ATTR", 2],
+);
+
+#Create a search pattern for all these functions to speed up a loop below
+our $mode_perms_search = "";
+foreach my $entry (@mode_permission_funcs) {
+	$mode_perms_search .= '|' if ($mode_perms_search ne "");
+	$mode_perms_search .= $entry->[0];
+}
+
+our $mode_perms_world_writable = qr{
+	S_IWUGO		|
+	S_IWOTH		|
+	S_IRWXUGO	|
+	S_IALLUGO	|
+	0[0-7][0-7][2367]
+}x;
+
+our %mode_permission_string_types = (
+	"S_IRWXU" => 0700,
+	"S_IRUSR" => 0400,
+	"S_IWUSR" => 0200,
+	"S_IXUSR" => 0100,
+	"S_IRWXG" => 0070,
+	"S_IRGRP" => 0040,
+	"S_IWGRP" => 0020,
+	"S_IXGRP" => 0010,
+	"S_IRWXO" => 0007,
+	"S_IROTH" => 0004,
+	"S_IWOTH" => 0002,
+	"S_IXOTH" => 0001,
+	"S_IRWXUGO" => 0777,
+	"S_IRUGO" => 0444,
+	"S_IWUGO" => 0222,
+	"S_IXUGO" => 0111,
+);
+
+#Create a search pattern for all these strings to speed up a loop below
+our $mode_perms_string_search = "";
+foreach my $entry (keys %mode_permission_string_types) {
+	$mode_perms_string_search .= '|' if ($mode_perms_string_search ne "");
+	$mode_perms_string_search .= $entry;
+}
 
 our $allowed_asm_includes = qr{(?x:
 	irq|
-	memory
+	memory|
+	time|
+	reboot
 )};
 # memory.h: ARM has a custom one
 
@@ -447,12 +656,54 @@ if ($codespell) {
 
 $misspellings = join("|", sort keys %spelling_fix) if keys %spelling_fix;
 
+sub read_words {
+	my ($wordsRef, $file) = @_;
+
+	if (open(my $words, '<', $file)) {
+		while (<$words>) {
+			my $line = $_;
+
+			$line =~ s/\s*\n?$//g;
+			$line =~ s/^\s*//g;
+
+			next if ($line =~ m/^\s*#/);
+			next if ($line =~ m/^\s*$/);
+			if ($line =~ /\s/) {
+				print("$file: '$line' invalid - ignored\n");
+				next;
+			}
+
+			$$wordsRef .= '|' if ($$wordsRef ne "");
+			$$wordsRef .= $line;
+		}
+		close($file);
+		return 1;
+	}
+
+	return 0;
+}
+
+my $const_structs = "";
+read_words(\$const_structs, $conststructsfile)
+    or warn "No structs that should be const will be found - file '$conststructsfile': $!\n";
+
+my $typeOtherTypedefs = "";
+if (length($typedefsfile)) {
+	read_words(\$typeOtherTypedefs, $typedefsfile)
+	    or warn "No additional types will be considered - file '$typedefsfile': $!\n";
+}
+$typeTypedefs .= '|' . $typeOtherTypedefs if ($typeOtherTypedefs ne "");
 
 sub build_types {
-	my $mods = "(?x:  \n" . join("|\n  ", @modifierList) . "\n)";
-	my $all = "(?x:  \n" . join("|\n  ", @typeList) . "\n)";
+	my $mods = "(?x:  \n" . join("|\n  ", (@modifierList, @modifierListFile)) . "\n)";
+	my $all = "(?x:  \n" . join("|\n  ", (@typeList, @typeListFile)) . "\n)";
+	my $Misordered = "(?x:  \n" . join("|\n  ", @typeListMisordered) . "\n)";
 	my $allWithAttr = "(?x:  \n" . join("|\n  ", @typeListWithAttr) . "\n)";
 	$Modifier	= qr{(?:$Attribute|$Sparse|$mods)};
+	$BasicType	= qr{
+				(?:$typeTypedefs\b)|
+				(?:${all}\b)
+		}x;
 	$NonptrType	= qr{
 			(?:$Modifier\s+|const\s+)*
 			(?:
@@ -462,6 +713,13 @@ sub build_types {
 			)
 			(?:\s+$Modifier|\s+const)*
 		  }x;
+	$NonptrTypeMisordered	= qr{
+			(?:$Modifier\s+|const\s+)*
+			(?:
+				(?:${Misordered}\b)
+			)
+			(?:\s+$Modifier|\s+const)*
+		  }x;
 	$NonptrTypeWithAttr	= qr{
 			(?:$Modifier\s+|const\s+)*
 			(?:
@@ -473,10 +731,16 @@ sub build_types {
 		  }x;
 	$Type	= qr{
 			$NonptrType
-			(?:(?:\s|\*|\[\])+\s*const|(?:\s|\*|\[\])+|(?:\s*\[\s*\])+)?
+			(?:(?:\s|\*|\[\])+\s*const|(?:\s|\*\s*(?:const\s*)?|\[\])+|(?:\s*\[\s*\])+)?
+			(?:\s+$Inline|\s+$Modifier)*
+		  }x;
+	$TypeMisordered	= qr{
+			$NonptrTypeMisordered
+			(?:(?:\s|\*|\[\])+\s*const|(?:\s|\*\s*(?:const\s*)?|\[\])+|(?:\s*\[\s*\])+)?
 			(?:\s+$Inline|\s+$Modifier)*
 		  }x;
-	$Declare	= qr{(?:$Storage\s+)?$Type};
+	$Declare	= qr{(?:$Storage\s+(?:$Inline\s+)?)?$Type};
+	$DeclareMisordered	= qr{(?:$Storage\s+(?:$Inline\s+)?)?$TypeMisordered};
 }
 build_types();
 
@@ -487,15 +751,26 @@ our $Typecast	= qr{\s*(\(\s*$NonptrType\s*\)){0,1}\s*};
 # Any use must be runtime checked with $^V
 
 our $balanced_parens = qr/(\((?:[^\(\)]++|(?-1))*\))/;
-our $LvalOrFunc	= qr{($Lval)\s*($balanced_parens{0,1})\s*};
-our $FuncArg = qr{$Typecast{0,1}($LvalOrFunc|$Constant)};
+our $LvalOrFunc	= qr{((?:[\&\*]\s*)?$Lval)\s*($balanced_parens{0,1})\s*};
+our $FuncArg = qr{$Typecast{0,1}($LvalOrFunc|$Constant|$String)};
+
+our $declaration_macros = qr{(?x:
+	(?:$Storage\s+)?(?:[A-Z_][A-Z0-9]*_){0,2}(?:DEFINE|DECLARE)(?:_[A-Z0-9]+){1,6}\s*\(|
+	(?:$Storage\s+)?[HLP]?LIST_HEAD\s*\(|
+	(?:$Storage\s+)?${Type}\s+uninitialized_var\s*\(
+)};
 
 sub deparenthesize {
 	my ($string) = @_;
 	return "" if (!defined($string));
-	$string =~ s@^\s*\(\s*@@g;
-	$string =~ s@\s*\)\s*$@@g;
+
+	while ($string =~ /^\s*\(.*\)\s*$/) {
+		$string =~ s@^\s*\(\s*@@;
+		$string =~ s@\s*\)\s*$@@;
+	}
+
 	$string =~ s@\s+@ @g;
+
 	return $string;
 }
 
@@ -525,6 +800,16 @@ sub seed_camelcase_file {
 	}
 }
 
+sub is_maintained_obsolete {
+	my ($filename) = @_;
+
+	return 0 if (!$tree || !(-e "$root/scripts/get_maintainer.pl"));
+
+	my $status = `perl $root/scripts/get_maintainer.pl --status --nom --nol --nogit --nogit-fallback -f $filename 2>&1`;
+
+	return $status =~ /obsolete/i;
+}
+
 my $camelcase_seeded = 0;
 sub seed_camelcase_includes {
 	return if ($camelcase_seeded);
@@ -583,17 +868,82 @@ sub seed_camelcase_includes {
 	}
 }
 
+sub git_commit_info {
+	my ($commit, $id, $desc) = @_;
+
+	return ($id, $desc) if ((which("git") eq "") || !(-e ".git"));
+
+	my $output = `git log --no-color --format='%H %s' -1 $commit 2>&1`;
+	$output =~ s/^\s*//gm;
+	my @lines = split("\n", $output);
+
+	return ($id, $desc) if ($#lines < 0);
+
+	if ($lines[0] =~ /^error: short SHA1 $commit is ambiguous\./) {
+# Maybe one day convert this block of bash into something that returns
+# all matching commit ids, but it's very slow...
+#
+#		echo "checking commits $1..."
+#		git rev-list --remotes | grep -i "^$1" |
+#		while read line ; do
+#		    git log --format='%H %s' -1 $line |
+#		    echo "commit $(cut -c 1-12,41-)"
+#		done
+	} elsif ($lines[0] =~ /^fatal: ambiguous argument '$commit': unknown revision or path not in the working tree\./) {
+		$id = undef;
+	} else {
+		$id = substr($lines[0], 0, 12);
+		$desc = substr($lines[0], 41);
+	}
+
+	return ($id, $desc);
+}
+
 $chk_signoff = 0 if ($file);
 
 my @rawlines = ();
 my @lines = ();
 my @fixed = ();
-my $vname;
+my @fixed_inserted = ();
+my @fixed_deleted = ();
 my $fixlinenr = -1;
 
+# If input is git commits, extract all commits from the commit expressions.
+# For example, HEAD-3 means we need check 'HEAD, HEAD~1, HEAD~2'.
+die "$P: No git repository found\n" if ($git && !-e ".git");
+
+if ($git) {
+	my @commits = ();
+	foreach my $commit_expr (@ARGV) {
+		my $git_range;
+		if ($commit_expr =~ m/^(.*)-(\d+)$/) {
+			$git_range = "-$2 $1";
+		} elsif ($commit_expr =~ m/\.\./) {
+			$git_range = "$commit_expr";
+		} else {
+			$git_range = "-1 $commit_expr";
+		}
+		my $lines = `git log --no-color --no-merges --pretty=format:'%H %s' $git_range`;
+		foreach my $line (split(/\n/, $lines)) {
+			$line =~ /^([0-9a-fA-F]{40,40}) (.*)$/;
+			next if (!defined($1) || !defined($2));
+			my $sha1 = $1;
+			my $subject = $2;
+			unshift(@commits, $sha1);
+			$git_commits{$sha1} = $subject;
+		}
+	}
+	die "$P: no git commits after extraction!\n" if (@commits == 0);
+	@ARGV = @commits;
+}
+
+my $vname;
 for my $filename (@ARGV) {
 	my $FILE;
-	if ($file) {
+	if ($git) {
+		open($FILE, '-|', "git format-patch -M --stdout -1 $filename") ||
+			die "$P: $filename: git format-patch failed - $!\n";
+	} elsif ($file) {
 		open($FILE, '-|', "diff -u /dev/null $filename") ||
 			die "$P: $filename: diff failed - $!\n";
 	} elsif ($filename eq '-') {
@@ -604,6 +954,8 @@ for my $filename (@ARGV) {
 	}
 	if ($filename eq '-') {
 		$vname = 'Your patch';
+	} elsif ($git) {
+		$vname = "Commit " . substr($filename, 0, 12) . ' ("' . $git_commits{$filename} . '")';
 	} else {
 		$vname = $filename;
 	}
@@ -612,12 +964,45 @@ for my $filename (@ARGV) {
 		push(@rawlines, $_);
 	}
 	close($FILE);
+
+	if ($#ARGV > 0 && $quiet == 0) {
+		print '-' x length($vname) . "\n";
+		print "$vname\n";
+		print '-' x length($vname) . "\n";
+	}
+
 	if (!process($filename)) {
 		$exit = 1;
 	}
 	@rawlines = ();
 	@lines = ();
 	@fixed = ();
+	@fixed_inserted = ();
+	@fixed_deleted = ();
+	$fixlinenr = -1;
+	@modifierListFile = ();
+	@typeListFile = ();
+	build_types();
+}
+
+if (!$quiet) {
+	hash_show_words(\%use_type, "Used");
+	hash_show_words(\%ignore_type, "Ignored");
+
+	if ($^V lt 5.10.0) {
+		print << "EOM"
+
+NOTE: perl $^V is not modern enough to detect all possible issues.
+      An upgrade to at least perl v5.10.0 is suggested.
+EOM
+	}
+	if ($exit) {
+		print << "EOM"
+
+NOTE: If any of the errors are false positives, please report
+      them to the maintainer, see CHECKPATCH in MAINTAINERS.
+EOM
+	}
 }
 
 exit($exit);
@@ -709,6 +1094,18 @@ sub format_email {
 	return $formatted_email;
 }
 
+sub which {
+	my ($bin) = @_;
+
+	foreach my $path (split(/:/, $ENV{PATH})) {
+		if (-e "$path/$bin") {
+			return "$path/$bin";
+		}
+	}
+
+	return "";
+}
+
 sub which_conf {
 	my ($conf) = @_;
 
@@ -855,13 +1252,18 @@ sub sanitise_line {
 		$res =~ s@(\#\s*(?:error|warning)\s+).*@$1$clean@;
 	}
 
+	if ($allow_c99_comments && $res =~ m@(//.*$)@) {
+		my $match = $1;
+		$res =~ s/\Q$match\E/"$;" x length($match)/e;
+	}
+
 	return $res;
 }
 
 sub get_quoted_string {
 	my ($line, $rawline) = @_;
 
-	return "" if ($line !~ m/(\"[X]+\")/g);
+	return "" if ($line !~ m/($String)/g);
 	return substr($rawline, $-[0], $+[0] - $-[0]);
 }
 
@@ -1470,13 +1872,13 @@ sub possible {
 			for my $modifier (split(' ', $possible)) {
 				if ($modifier !~ $notPermitted) {
 					warn "MODIFIER: $modifier ($possible) ($line)\n" if ($dbg_possible);
-					push(@modifierList, $modifier);
+					push(@modifierListFile, $modifier);
 				}
 			}
 
 		} else {
 			warn "POSSIBLE: $possible ($line)\n" if ($dbg_possible);
-			push(@typeList, $possible);
+			push(@typeListFile, $possible);
 		}
 		build_types();
 	} else {
@@ -1487,34 +1889,144 @@ sub possible {
 my $prefix = '';
 
 sub show_type {
-	return defined $use_type{$_[0]} if (scalar keys %use_type > 0);
+	my ($type) = @_;
+
+	$type =~ tr/[a-z]/[A-Z]/;
 
-	return !defined $ignore_type{$_[0]};
+	return defined $use_type{$type} if (scalar keys %use_type > 0);
+
+	return !defined $ignore_type{$type};
 }
 
 sub report {
-	if (!show_type($_[1]) ||
-	    (defined $tst_only && $_[2] !~ /\Q$tst_only\E/)) {
+	my ($level, $type, $msg) = @_;
+
+	if (!show_type($type) ||
+	    (defined $tst_only && $msg !~ /\Q$tst_only\E/)) {
 		return 0;
 	}
-	my $line;
+	my $output = '';
+	if ($color) {
+		if ($level eq 'ERROR') {
+			$output .= RED;
+		} elsif ($level eq 'WARNING') {
+			$output .= YELLOW;
+		} else {
+			$output .= GREEN;
+		}
+	}
+	$output .= $prefix . $level . ':';
 	if ($show_types) {
-		$line = "$prefix$_[0]:$_[1]: $_[2]\n";
-	} else {
-		$line = "$prefix$_[0]: $_[2]\n";
+		$output .= BLUE if ($color);
+		$output .= "$type:";
+	}
+	$output .= RESET if ($color);
+	$output .= ' ' . $msg . "\n";
+
+	if ($showfile) {
+		my @lines = split("\n", $output, -1);
+		splice(@lines, 1, 1);
+		$output = join("\n", @lines);
 	}
-	$line = (split('\n', $line))[0] . "\n" if ($terse);
+	$output = (split('\n', $output))[0] . "\n" if ($terse);
 
-	push(our @report, $line);
+	push(our @report, $output);
 
 	return 1;
 }
+
 sub report_dump {
 	our @report;
 }
 
+sub fixup_current_range {
+	my ($lineRef, $offset, $length) = @_;
+
+	if ($$lineRef =~ /^\@\@ -\d+,\d+ \+(\d+),(\d+) \@\@/) {
+		my $o = $1;
+		my $l = $2;
+		my $no = $o + $offset;
+		my $nl = $l + $length;
+		$$lineRef =~ s/\+$o,$l \@\@/\+$no,$nl \@\@/;
+	}
+}
+
+sub fix_inserted_deleted_lines {
+	my ($linesRef, $insertedRef, $deletedRef) = @_;
+
+	my $range_last_linenr = 0;
+	my $delta_offset = 0;
+
+	my $old_linenr = 0;
+	my $new_linenr = 0;
+
+	my $next_insert = 0;
+	my $next_delete = 0;
+
+	my @lines = ();
+
+	my $inserted = @{$insertedRef}[$next_insert++];
+	my $deleted = @{$deletedRef}[$next_delete++];
+
+	foreach my $old_line (@{$linesRef}) {
+		my $save_line = 1;
+		my $line = $old_line;	#don't modify the array
+		if ($line =~ /^(?:\+\+\+|\-\-\-)\s+\S+/) {	#new filename
+			$delta_offset = 0;
+		} elsif ($line =~ /^\@\@ -\d+,\d+ \+\d+,\d+ \@\@/) {	#new hunk
+			$range_last_linenr = $new_linenr;
+			fixup_current_range(\$line, $delta_offset, 0);
+		}
+
+		while (defined($deleted) && ${$deleted}{'LINENR'} == $old_linenr) {
+			$deleted = @{$deletedRef}[$next_delete++];
+			$save_line = 0;
+			fixup_current_range(\$lines[$range_last_linenr], $delta_offset--, -1);
+		}
+
+		while (defined($inserted) && ${$inserted}{'LINENR'} == $old_linenr) {
+			push(@lines, ${$inserted}{'LINE'});
+			$inserted = @{$insertedRef}[$next_insert++];
+			$new_linenr++;
+			fixup_current_range(\$lines[$range_last_linenr], $delta_offset++, 1);
+		}
+
+		if ($save_line) {
+			push(@lines, $line);
+			$new_linenr++;
+		}
+
+		$old_linenr++;
+	}
+
+	return @lines;
+}
+
+sub fix_insert_line {
+	my ($linenr, $line) = @_;
+
+	my $inserted = {
+		LINENR => $linenr,
+		LINE => $line,
+	};
+	push(@fixed_inserted, $inserted);
+}
+
+sub fix_delete_line {
+	my ($linenr, $line) = @_;
+
+	my $deleted = {
+		LINENR => $linenr,
+		LINE => $line,
+	};
+
+	push(@fixed_deleted, $deleted);
+}
+
 sub ERROR {
-	if (report("ERROR", $_[0], $_[1])) {
+	my ($type, $msg) = @_;
+
+	if (report("ERROR", $type, $msg)) {
 		our $clean = 0;
 		our $cnt_error++;
 		return 1;
@@ -1522,7 +2034,9 @@ sub ERROR {
 	return 0;
 }
 sub WARN {
-	if (report("WARNING", $_[0], $_[1])) {
+	my ($type, $msg) = @_;
+
+	if (report("WARNING", $type, $msg)) {
 		our $clean = 0;
 		our $cnt_warn++;
 		return 1;
@@ -1530,7 +2044,9 @@ sub WARN {
 	return 0;
 }
 sub CHK {
-	if ($check && report("CHECK", $_[0], $_[1])) {
+	my ($type, $msg) = @_;
+
+	if ($check && report("CHECK", $type, $msg)) {
 		our $clean = 0;
 		our $cnt_chk++;
 		return 1;
@@ -1640,7 +2156,7 @@ sub pos_last_openparen {
 		}
 	}
 
-	return $last_openparen + 1;
+	return length(expand_tabs(substr($line, 0, $last_openparen))) + 1;
 }
 
 sub process {
@@ -1660,12 +2176,18 @@ sub process {
 	our $clean = 1;
 	my $signoff = 0;
 	my $is_patch = 0;
-
-	my $in_header_lines = 1;
+	my $in_header_lines = $file ? 0 : 1;
 	my $in_commit_log = 0;		#Scanning lines before patch
-
+	my $has_commit_log = 0;		#Encountered lines before patch
+	my $commit_log_possible_stack_dump = 0;
+	my $commit_log_long_line = 0;
+	my $commit_log_has_diff = 0;
+	my $reported_maintainer_file = 0;
 	my $non_utf8_charset = 0;
 
+	my $last_blank_line = 0;
+	my $last_coalesced_string_linenr = -1;
+
 	our @report = ();
 	our $cnt_lines = 0;
 	our $cnt_error = 0;
@@ -1677,6 +2199,7 @@ sub process {
 	my $realline = 0;
 	my $realcnt = 0;
 	my $here = '';
+	my $context_function;		#undef'd unless there's a known function
 	my $in_comment = 0;
 	my $comment_edge = 0;
 	my $first_line = 0;
@@ -1710,12 +2233,12 @@ sub process {
 
 		if ($rawline=~/^\+\+\+\s+(\S+)/) {
 			$setup_docs = 0;
-			if ($1 =~ m@Documentation/kernel-parameters.txt$@) {
+			if ($1 =~ m@Documentation/admin-guide/kernel-parameters.rst$@) {
 				$setup_docs = 1;
 			}
 			#next;
 		}
-		if ($rawline=~/^\@\@ -\d+(?:,\d+)? \+(\d+)(,(\d+))? \@\@/) {
+		if ($rawline =~ /^\@\@ -\d+(?:,\d+)? \+(\d+)(,(\d+))? \@\@/) {
 			$realline=$1-1;
 			if (defined $2) {
 				$realcnt=$3+1;
@@ -1783,15 +2306,19 @@ sub process {
 
 	$realcnt = 0;
 	$linenr = 0;
+	$fixlinenr = -1;
 	foreach my $line (@lines) {
 		$linenr++;
+		$fixlinenr++;
 		my $sline = $line;	#copy of $line
 		$sline =~ s/$;/ /g;	#with comments as spaces
 
 		my $rawline = $rawlines[$linenr - 1];
 
 #extract the line range in the file after the patch is applied
-		if ($line=~/^\@\@ -\d+(?:,\d+)? \+(\d+)(,(\d+))? \@\@/) {
+		if (!$in_commit_log &&
+		    $line =~ /^\@\@ -\d+(?:,\d+)? \+(\d+)(,(\d+))? \@\@(.*)/) {
+			my $context = $4;
 			$is_patch = 1;
 			$first_line = $linenr + 1;
 			$realline=$1-1;
@@ -1807,6 +2334,11 @@ sub process {
 			%suppress_whiletrailers = ();
 			%suppress_export = ();
 			$suppress_statement = 0;
+			if ($context =~ /\b(\w+)\s*\(/) {
+				$context_function = $1;
+			} else {
+				undef $context_function;
+			}
 			next;
 
 # track the line number as we move through the hunk, note that
@@ -1832,18 +2364,16 @@ sub process {
 
 		my $hunk_line = ($realcnt != 0);
 
-#make up the handle for any error we report on this line
-		$prefix = "$filename:$realline: " if ($emacs && $file);
-		$prefix = "$filename:$linenr: " if ($emacs && !$file);
-
 		$here = "#$linenr: " if (!$file);
 		$here = "#$realline: " if ($file);
 
+		my $found_file = 0;
 		# extract the filename as it passes
 		if ($line =~ /^diff --git.*?(\S+)$/) {
 			$realfile = $1;
 			$realfile =~ s@^([^/]*)/@@ if (!$file);
 			$in_commit_log = 0;
+			$found_file = 1;
 		} elsif ($line =~ /^\+\+\+\s+(\S+)/) {
 			$realfile = $1;
 			$realfile =~ s@^([^/]*)/@@ if (!$file);
@@ -1860,6 +2390,30 @@ sub process {
 				ERROR("MODIFIED_INCLUDE_ASM",
 				      "do not modify files in include/asm, change architecture specific files in include/asm-<architecture>\n" . "$here$rawline\n");
 			}
+			$found_file = 1;
+		}
+
+#make up the handle for any error we report on this line
+		if ($showfile) {
+			$prefix = "$realfile:$realline: "
+		} elsif ($emacs) {
+			if ($file) {
+				$prefix = "$filename:$realline: ";
+			} else {
+				$prefix = "$filename:$linenr: ";
+			}
+		}
+
+		if ($found_file) {
+			if (is_maintained_obsolete($realfile)) {
+				WARN("OBSOLETE",
+				     "$realfile is marked as 'obsolete' in the MAINTAINERS hierarchy.  No unnecessary modifications please.\n");
+			}
+			if ($realfile =~ m@^(?:drivers/net/|net/|drivers/staging/)@) {
+				$check = 1;
+			} else {
+				$check = $check_orig;
+			}
 			next;
 		}
 
@@ -1871,6 +2425,17 @@ sub process {
 
 		$cnt_lines++ if ($realcnt != 0);
 
+# Check if the commit log has what seems like a diff which can confuse patch
+		if ($in_commit_log && !$commit_log_has_diff &&
+		    (($line =~ m@^\s+diff\b.*a/[\w/]+@ &&
+		      $line =~ m@^\s+diff\b.*a/([\w/]+)\s+b/$1\b@) ||
+		     $line =~ m@^\s*(?:\-\-\-\s+a/|\+\+\+\s+b/)@ ||
+		     $line =~ m/^\s*\@\@ \-\d+,\d+ \+\d+,\d+ \@\@/)) {
+			ERROR("DIFF_IN_COMMIT_MSG",
+			      "Avoid using diff content in the commit message - patch(1) might not work\n" . $herecurr);
+			$commit_log_has_diff = 1;
+		}
+
 # Check for incorrect file permissions
 		if ($line =~ /^new (file )?mode.*[7531]\d{0,2}$/) {
 			my $permhere = $here . "FILE: $realfile\n";
@@ -1887,6 +2452,12 @@ sub process {
 			$in_commit_log = 0;
 		}
 
+# Check if MAINTAINERS is being updated.  If so, there's probably no need to
+# emit the "does MAINTAINERS need updating?" message on file add/move/delete
+		if ($line =~ /^\s*MAINTAINERS\s*\|/) {
+			$reported_maintainer_file = 1;
+		}
+
 # Check signature styles
 		if (!$in_header_lines &&
 		    $line =~ /^(\s*)([a-z0-9_-]+by:|$signature_tags)(\s*)(.*)/i) {
@@ -1904,7 +2475,7 @@ sub process {
 				if (WARN("BAD_SIGN_OFF",
 					 "Do not use whitespace before $ucfirst_sign_off\n" . $herecurr) &&
 				    $fix) {
-					$fixed[$linenr - 1] =
+					$fixed[$fixlinenr] =
 					    "$ucfirst_sign_off $email";
 				}
 			}
@@ -1912,7 +2483,7 @@ sub process {
 				if (WARN("BAD_SIGN_OFF",
 					 "'$ucfirst_sign_off' is the preferred signature form\n" . $herecurr) &&
 				    $fix) {
-					$fixed[$linenr - 1] =
+					$fixed[$fixlinenr] =
 					    "$ucfirst_sign_off $email";
 				}
 
@@ -1921,7 +2492,7 @@ sub process {
 				if (WARN("BAD_SIGN_OFF",
 					 "Use a single space after $ucfirst_sign_off\n" . $herecurr) &&
 				    $fix) {
-					$fixed[$linenr - 1] =
+					$fixed[$fixlinenr] =
 					    "$ucfirst_sign_off $email";
 				}
 			}
@@ -1957,6 +2528,127 @@ sub process {
 			}
 		}
 
+# Check email subject for common tools that don't need to be mentioned
+		if ($in_header_lines &&
+		    $line =~ /^Subject:.*\b(?:checkpatch|sparse|smatch)\b[^:]/i) {
+			WARN("EMAIL_SUBJECT",
+			     "A patch subject line should describe the change not the tool that found it\n" . $herecurr);
+		}
+
+# Check for old stable address
+		if ($line =~ /^\s*cc:\s*.*<?\bstable\@kernel\.org\b>?.*$/i) {
+			ERROR("STABLE_ADDRESS",
+			      "The 'stable' address should be 'stable\@vger.kernel.org'\n" . $herecurr);
+		}
+
+# Check for unwanted Gerrit info
+		if ($in_commit_log && $line =~ /^\s*change-id:/i) {
+			ERROR("GERRIT_CHANGE_ID",
+			      "Remove Gerrit Change-Id's before submitting upstream.\n" . $herecurr);
+		}
+
+# Check if the commit log is in a possible stack dump
+		if ($in_commit_log && !$commit_log_possible_stack_dump &&
+		    ($line =~ /^\s*(?:WARNING:|BUG:)/ ||
+		     $line =~ /^\s*\[\s*\d+\.\d{6,6}\s*\]/ ||
+					# timestamp
+		     $line =~ /^\s*\[\<[0-9a-fA-F]{8,}\>\]/)) {
+					# stack dump address
+			$commit_log_possible_stack_dump = 1;
+		}
+
+# Check for line lengths > 75 in commit log, warn once
+		if ($in_commit_log && !$commit_log_long_line &&
+		    length($line) > 75 &&
+		    !($line =~ /^\s*[a-zA-Z0-9_\/\.]+\s+\|\s+\d+/ ||
+					# file delta changes
+		      $line =~ /^\s*(?:[\w\.\-]+\/)++[\w\.\-]+:/ ||
+					# filename then :
+		      $line =~ /^\s*(?:Fixes:|Link:)/i ||
+					# A Fixes: or Link: line
+		      $commit_log_possible_stack_dump)) {
+			WARN("COMMIT_LOG_LONG_LINE",
+			     "Possible unwrapped commit description (prefer a maximum 75 chars per line)\n" . $herecurr);
+			$commit_log_long_line = 1;
+		}
+
+# Reset possible stack dump if a blank line is found
+		if ($in_commit_log && $commit_log_possible_stack_dump &&
+		    $line =~ /^\s*$/) {
+			$commit_log_possible_stack_dump = 0;
+		}
+
+# Check for git id commit length and improperly formed commit descriptions
+		if ($in_commit_log && !$commit_log_possible_stack_dump &&
+		    $line !~ /^\s*(?:Link|Patchwork|http|https|BugLink):/i &&
+		    $line !~ /^This reverts commit [0-9a-f]{7,40}/ &&
+		    ($line =~ /\bcommit\s+[0-9a-f]{5,}\b/i ||
+		     ($line =~ /(?:\s|^)[0-9a-f]{12,40}(?:[\s"'\(\[]|$)/i &&
+		      $line !~ /[\<\[][0-9a-f]{12,40}[\>\]]/i &&
+		      $line !~ /\bfixes:\s*[0-9a-f]{12,40}/i))) {
+			my $init_char = "c";
+			my $orig_commit = "";
+			my $short = 1;
+			my $long = 0;
+			my $case = 1;
+			my $space = 1;
+			my $hasdesc = 0;
+			my $hasparens = 0;
+			my $id = '0123456789ab';
+			my $orig_desc = "commit description";
+			my $description = "";
+
+			if ($line =~ /\b(c)ommit\s+([0-9a-f]{5,})\b/i) {
+				$init_char = $1;
+				$orig_commit = lc($2);
+			} elsif ($line =~ /\b([0-9a-f]{12,40})\b/i) {
+				$orig_commit = lc($1);
+			}
+
+			$short = 0 if ($line =~ /\bcommit\s+[0-9a-f]{12,40}/i);
+			$long = 1 if ($line =~ /\bcommit\s+[0-9a-f]{41,}/i);
+			$space = 0 if ($line =~ /\bcommit [0-9a-f]/i);
+			$case = 0 if ($line =~ /\b[Cc]ommit\s+[0-9a-f]{5,40}[^A-F]/);
+			if ($line =~ /\bcommit\s+[0-9a-f]{5,}\s+\("([^"]+)"\)/i) {
+				$orig_desc = $1;
+				$hasparens = 1;
+			} elsif ($line =~ /\bcommit\s+[0-9a-f]{5,}\s*$/i &&
+				 defined $rawlines[$linenr] &&
+				 $rawlines[$linenr] =~ /^\s*\("([^"]+)"\)/) {
+				$orig_desc = $1;
+				$hasparens = 1;
+			} elsif ($line =~ /\bcommit\s+[0-9a-f]{5,}\s+\("[^"]+$/i &&
+				 defined $rawlines[$linenr] &&
+				 $rawlines[$linenr] =~ /^\s*[^"]+"\)/) {
+				$line =~ /\bcommit\s+[0-9a-f]{5,}\s+\("([^"]+)$/i;
+				$orig_desc = $1;
+				$rawlines[$linenr] =~ /^\s*([^"]+)"\)/;
+				$orig_desc .= " " . $1;
+				$hasparens = 1;
+			}
+
+			($id, $description) = git_commit_info($orig_commit,
+							      $id, $orig_desc);
+
+			if (defined($id) &&
+			   ($short || $long || $space || $case || ($orig_desc ne $description) || !$hasparens)) {
+				ERROR("GIT_COMMIT_ID",
+				      "Please use git commit description style 'commit <12+ chars of sha1> (\"<title line>\")' - ie: '${init_char}ommit $id (\"$description\")'\n" . $herecurr);
+			}
+		}
+
+# Check for added, moved or deleted files
+		if (!$reported_maintainer_file && !$in_commit_log &&
+		    ($line =~ /^(?:new|deleted) file mode\s*\d+\s*$/ ||
+		     $line =~ /^rename (?:from|to) [\w\/\.\-]+\s*$/ ||
+		     ($line =~ /\{\s*([\w\/\.\-]*)\s*\=\>\s*([\w\/\.\-]*)\s*\}/ &&
+		      (defined($1) || defined($2))))) {
+			$is_patch = 1;
+			$reported_maintainer_file = 1;
+			WARN("FILE_PATH_CHANGES",
+			     "added, moved or deleted file(s), does MAINTAINERS need updating?\n" . $herecurr);
+		}
+
 # Check for wrappage within a valid hunk of the file
 		if ($realcnt != 0 && $line !~ m{^(?:\+|-| |\\ No newline|$)}) {
 			ERROR("CORRUPTED_PATCH",
@@ -1964,20 +2656,6 @@ sub process {
 				$herecurr) if (!$emitted_corrupt++);
 		}
 
-# Check for absolute kernel paths.
-		if ($tree) {
-			while ($line =~ m{(?:^|\s)(/\S*)}g) {
-				my $file = $1;
-
-				if ($file =~ m{^(.*?)(?::\d+)+:?$} &&
-				    check_absolute_file($1, $herecurr)) {
-					#
-				} else {
-					check_absolute_file($file, $herecurr);
-				}
-			}
-		}
-
 # UTF-8 regex found at http://www.w3.org/International/questions/qa-forms-utf-8.en.php
 		if (($realfile =~ /^$/ || $line =~ /^\+/) &&
 		    $rawline !~ m/^$UTF8*$/) {
@@ -1994,9 +2672,11 @@ sub process {
 # Check if it's the start of a commit log
 # (not a header line and we haven't seen the patch filename)
 		if ($in_header_lines && $realfile =~ /^$/ &&
-		    $rawline !~ /^(commit\b|from\b|[\w-]+:).+$/i) {
+		    !($rawline =~ /^\s+(?:\S|$)/ ||
+		      $rawline =~ /^(?:commit\b|from\b|[\w-]+:)/i)) {
 			$in_header_lines = 0;
 			$in_commit_log = 1;
+			$has_commit_log = 1;
 		}
 
 # Check if there is UTF-8 in a commit log when a mail header has explicitly
@@ -2013,6 +2693,20 @@ sub process {
 			    "8-bit UTF-8 used in possible commit log\n" . $herecurr);
 		}
 
+# Check for absolute kernel paths in commit message
+		if ($tree && $in_commit_log) {
+			while ($line =~ m{(?:^|\s)(/\S*)}g) {
+				my $file = $1;
+
+				if ($file =~ m{^(.*?)(?::\d+)+:?$} &&
+				    check_absolute_file($1, $herecurr)) {
+					#
+				} else {
+					check_absolute_file($file, $herecurr);
+				}
+			}
+		}
+
 # Check for various typo / spelling mistakes
 		if (defined($misspellings) &&
 		    ($in_commit_log || $line =~ /^(?:\+|Subject:)/i)) {
@@ -2040,14 +2734,14 @@ sub process {
 			if (ERROR("DOS_LINE_ENDINGS",
 				  "DOS line endings\n" . $herevet) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~ s/[\s\015]+$//;
+				$fixed[$fixlinenr] =~ s/[\s\015]+$//;
 			}
 		} elsif ($rawline =~ /^\+.*\S\s+$/ || $rawline =~ /^\+\s+$/) {
 			my $herevet = "$here\n" . cat_vet($rawline) . "\n";
 			if (ERROR("TRAILING_WHITESPACE",
 				  "trailing whitespace\n" . $herevet) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~ s/\s+$//;
+				$fixed[$fixlinenr] =~ s/\s+$//;
 			}
 
 			$rpt_cleaners = 1;
@@ -2055,6 +2749,7 @@ sub process {
 
 # Check for FSF mailing addresses.
 		if ($rawline =~ /\bwrite to the Free/i ||
+		    $rawline =~ /\b675\s+Mass\s+Ave/i ||
 		    $rawline =~ /\b59\s+Temple\s+Pl/i ||
 		    $rawline =~ /\b51\s+Franklin\s+St/i) {
 			my $herevet = "$here\n" . cat_vet($rawline) . "\n";
@@ -2068,7 +2763,7 @@ sub process {
 # Only applies when adding the entry originally, after that we do not have
 # sufficient context to determine whether it is indeed long enough.
 		if ($realfile =~ /Kconfig/ &&
-		    $line =~ /.\s*config\s+/) {
+		    $line =~ /^\+\s*config\s+/) {
 			my $length = 0;
 			my $cnt = $realcnt;
 			my $ln = $linenr + 1;
@@ -2081,10 +2776,11 @@ sub process {
 				$is_end = $lines[$ln - 1] =~ /^\+/;
 
 				next if ($f =~ /^-/);
+				last if (!$file && $f =~ /^\@\@/);
 
-				if ($lines[$ln - 1] =~ /.\s*(?:bool|tristate)\s*\"/) {
+				if ($lines[$ln - 1] =~ /^\+\s*(?:bool|tristate)\s*\"/) {
 					$is_start = 1;
-				} elsif ($lines[$ln - 1] =~ /.\s*(?:---)?help(?:---)?$/) {
+				} elsif ($lines[$ln - 1] =~ /^\+\s*(?:---)?help(?:---)?$/) {
 					$length = -1;
 				}
 
@@ -2098,16 +2794,29 @@ sub process {
 				}
 				$length++;
 			}
-			WARN("CONFIG_DESCRIPTION",
-			     "please write a paragraph that describes the config symbol fully\n" . $herecurr) if ($is_start && $is_end && $length < 4);
+			if ($is_start && $is_end && $length < $min_conf_desc_length) {
+				WARN("CONFIG_DESCRIPTION",
+				     "please write a paragraph that describes the config symbol fully\n" . $herecurr);
+			}
 			#print "is_start<$is_start> is_end<$is_end> length<$length>\n";
 		}
 
-# discourage the addition of CONFIG_EXPERIMENTAL in Kconfig.
+# check for MAINTAINERS entries that don't have the right form
+		if ($realfile =~ /^MAINTAINERS$/ &&
+		    $rawline =~ /^\+[A-Z]:/ &&
+		    $rawline !~ /^\+[A-Z]:\t\S/) {
+			if (WARN("MAINTAINERS_STYLE",
+				 "MAINTAINERS entries use one tab after TYPE:\n" . $herecurr) &&
+			    $fix) {
+				$fixed[$fixlinenr] =~ s/^(\+[A-Z]):\s*/$1:\t/;
+			}
+		}
+
+# discourage the use of boolean for type definition attributes of Kconfig options
 		if ($realfile =~ /Kconfig/ &&
-		    $line =~ /.\s*depends on\s+.*\bEXPERIMENTAL\b/) {
-			WARN("CONFIG_EXPERIMENTAL",
-			     "Use of CONFIG_EXPERIMENTAL is deprecated. For alternatives, see https://lkml.org/lkml/2012/10/23/580\n");
+		    $line =~ /^\+\s*\bboolean\b/) {
+			WARN("CONFIG_TYPE_BOOLEAN",
+			     "Use of boolean is deprecated, please use bool instead.\n" . $herecurr);
 		}
 
 		if (($realfile =~ /Makefile.*/ || $realfile =~ /Kbuild.*/) &&
@@ -2125,65 +2834,93 @@ sub process {
 		}
 
 # check for DT compatible documentation
-		if (defined $root && $realfile =~ /\.dts/ &&
-		    $rawline =~ /^\+\s*compatible\s*=/) {
+		if (defined $root &&
+			(($realfile =~ /\.dtsi?$/ && $line =~ /^\+\s*compatible\s*=\s*\"/) ||
+			 ($realfile =~ /\.[ch]$/ && $line =~ /^\+.*\.compatible\s*=\s*\"/))) {
+
 			my @compats = $rawline =~ /\"([a-zA-Z0-9\-\,\.\+_]+)\"/g;
 
+			my $dt_path = $root . "/Documentation/devicetree/bindings/";
+			my $vp_file = $dt_path . "vendor-prefixes.txt";
+
 			foreach my $compat (@compats) {
 				my $compat2 = $compat;
-				my $dt_path =  $root . "/Documentation/devicetree/bindings/";
-				$compat2 =~ s/\,[a-z]*\-/\,<\.\*>\-/;
-				`grep -Erq "$compat|$compat2" $dt_path`;
+				$compat2 =~ s/\,[a-zA-Z0-9]*\-/\,<\.\*>\-/;
+				my $compat3 = $compat;
+				$compat3 =~ s/\,([a-z]*)[0-9]*\-/\,$1<\.\*>\-/;
+				`grep -Erq "$compat|$compat2|$compat3" $dt_path`;
 				if ( $? >> 8 ) {
 					WARN("UNDOCUMENTED_DT_STRING",
 					     "DT compatible string \"$compat\" appears un-documented -- check $dt_path\n" . $herecurr);
 				}
 
-				my $vendor = $compat;
-				my $vendor_path = $dt_path . "vendor-prefixes.txt";
-				next if (! -f $vendor_path);
-				$vendor =~ s/^([a-zA-Z0-9]+)\,.*/$1/;
-				`grep -Eq "$vendor" $vendor_path`;
+				next if $compat !~ /^([a-zA-Z0-9\-]+)\,/;
+				my $vendor = $1;
+				`grep -Eq "^$vendor\\b" $vp_file`;
 				if ( $? >> 8 ) {
 					WARN("UNDOCUMENTED_DT_STRING",
-					     "DT compatible string vendor \"$vendor\" appears un-documented -- check $vendor_path\n" . $herecurr);
+					     "DT compatible string vendor \"$vendor\" appears un-documented -- check $vp_file\n" . $herecurr);
 				}
 			}
 		}
 
 # check we are in a valid source file if not then ignore this hunk
-		next if ($realfile !~ /\.(h|c|s|S|pl|sh)$/);
-
-#line length limit
-		if ($line =~ /^\+/ && $prevrawline !~ /\/\*\*/ &&
-		    $rawline !~ /^.\s*\*\s*\@$Ident\s/ &&
-		    !($line =~ /^\+\s*$logFunctions\s*\(\s*(?:(KERN_\S+\s*|[^"]*))?"[X\t]*"\s*(?:|,|\)\s*;)\s*$/ ||
-		    $line =~ /^\+\s*"[^"]*"\s*(?:\s*|,|\)\s*;)\s*$/) &&
-		    $length > $max_line_length)
-		{
-			WARN("LONG_LINE",
-			     "line over $max_line_length characters\n" . $herecurr);
-		}
+		next if ($realfile !~ /\.(h|c|s|S|sh|dtsi|dts)$/);
 
-# Check for user-visible strings broken across lines, which breaks the ability
-# to grep for the string.  Make exceptions when the previous string ends in a
-# newline (multiple lines in one string constant) or '\t', '\r', ';', or '{'
-# (common in inline assembly) or is a octal \123 or hexadecimal \xaf value
-		if ($line =~ /^\+\s*"/ &&
-		    $prevline =~ /"\s*$/ &&
-		    $prevrawline !~ /(?:\\(?:[ntr]|[0-7]{1,3}|x[0-9a-fA-F]{1,2})|;\s*|\{\s*)"\s*$/) {
-			WARN("SPLIT_STRING",
-			     "quoted string split across lines\n" . $hereprev);
-		}
+# line length limit (with some exclusions)
+#
+# There are a few types of lines that may extend beyond $max_line_length:
+#	logging functions like pr_info that end in a string
+#	lines with a single string
+#	#defines that are a single string
+#
+# There are 3 different line length message types:
+# LONG_LINE_COMMENT	a comment starts before but extends beyond $max_linelength
+# LONG_LINE_STRING	a string starts before but extends beyond $max_line_length
+# LONG_LINE		all other lines longer than $max_line_length
+#
+# if LONG_LINE is ignored, the other 2 types are also ignored
+#
 
-# check for spaces before a quoted newline
-		if ($rawline =~ /^.*\".*\s\\n/) {
-			if (WARN("QUOTED_WHITESPACE_BEFORE_NEWLINE",
-				 "unnecessary whitespace before a quoted newline\n" . $herecurr) &&
-			    $fix) {
-				$fixed[$linenr - 1] =~ s/^(\+.*\".*)\s+\\n/$1\\n/;
+		if ($line =~ /^\+/ && $length > $max_line_length) {
+			my $msg_type = "LONG_LINE";
+
+			# Check the allowed long line types first
+
+			# logging functions that end in a string that starts
+			# before $max_line_length
+			if ($line =~ /^\+\s*$logFunctions\s*\(\s*(?:(?:KERN_\S+\s*|[^"]*))?($String\s*(?:|,|\)\s*;)\s*)$/ &&
+			    length(expand_tabs(substr($line, 1, length($line) - length($1) - 1))) <= $max_line_length) {
+				$msg_type = "";
+
+			# lines with only strings (w/ possible termination)
+			# #defines with only strings
+			} elsif ($line =~ /^\+\s*$String\s*(?:\s*|,|\)\s*;)\s*$/ ||
+				 $line =~ /^\+\s*#\s*define\s+\w+\s+$String$/) {
+				$msg_type = "";
+
+			# EFI_GUID is another special case
+			} elsif ($line =~ /^\+.*\bEFI_GUID\s*\(/) {
+				$msg_type = "";
+
+			# Otherwise set the alternate message types
+
+			# a comment starts before $max_line_length
+			} elsif ($line =~ /($;[\s$;]*)$/ &&
+				 length(expand_tabs(substr($line, 1, length($line) - length($1) - 1))) <= $max_line_length) {
+				$msg_type = "LONG_LINE_COMMENT"
+
+			# a quoted string starts before $max_line_length
+			} elsif ($sline =~ /\s*($String(?:\s*(?:\\|,\s*|\)\s*;\s*))?)$/ &&
+				 length(expand_tabs(substr($line, 1, length($line) - length($1) - 1))) <= $max_line_length) {
+				$msg_type = "LONG_LINE_STRING"
 			}
 
+			if ($msg_type ne "" &&
+			    (show_type("LONG_LINE") || show_type($msg_type))) {
+				WARN($msg_type,
+				     "line over $max_line_length characters\n" . $herecurr);
+			}
 		}
 
 # check for adding lines without a newline.
@@ -2207,7 +2944,7 @@ sub process {
 		}
 
 # check we are in a valid source file C or perl if not then ignore this hunk
-		next if ($realfile !~ /\.(h|c|pl)$/);
+		next if ($realfile !~ /\.(h|c|pl|dtsi|dts)$/);
 
 # at the beginning of a line any tabs must come first and anything
 # more than 8 must use tabs.
@@ -2218,7 +2955,7 @@ sub process {
 			if (ERROR("CODE_INDENT",
 				  "code indent should use tabs where possible\n" . $herevet) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~ s/^\+([ \t]+)/"\+" . tabify($1)/e;
+				$fixed[$fixlinenr] =~ s/^\+([ \t]+)/"\+" . tabify($1)/e;
 			}
 		}
 
@@ -2228,9 +2965,9 @@ sub process {
 			if (WARN("SPACE_BEFORE_TAB",
 				"please, no space before tabs\n" . $herevet) &&
 			    $fix) {
-				while ($fixed[$linenr - 1] =~
+				while ($fixed[$fixlinenr] =~
 					   s/(^\+.*) {8,8}\t/$1\t\t/) {}
-				while ($fixed[$linenr - 1] =~
+				while ($fixed[$fixlinenr] =~
 					   s/(^\+.*) +\t/$1\t/) {}
 			}
 		}
@@ -2241,9 +2978,22 @@ sub process {
 			    "Logical continuations should be on the previous line\n" . $hereprev);
 		}
 
+# check indentation starts on a tab stop
+		if ($^V && $^V ge 5.10.0 &&
+		    $sline =~ /^\+\t+( +)(?:$c90_Keywords\b|\{\s*$|\}\s*(?:else\b|while\b|\s*$))/) {
+			my $indent = length($1);
+			if ($indent % 8) {
+				if (WARN("TABSTOP",
+					 "Statements should start on a tabstop\n" . $herecurr) &&
+				    $fix) {
+					$fixed[$fixlinenr] =~ s@(^\+\t+) +@$1 . "\t" x ($indent/8)@e;
+				}
+			}
+		}
+
 # check multi-line statement indentation matches previous line
 		if ($^V && $^V ge 5.10.0 &&
-		    $prevline =~ /^\+(\t*)(if \(|$Ident\().*(\&\&|\|\||,)\s*$/) {
+		    $prevline =~ /^\+([ \t]*)((?:$c90_Keywords(?:\s+if)\s*)|(?:$Declare\s*)?(?:$Ident|\(\s*\*\s*$Ident\s*\))\s*|(?:\*\s*)*$Lval\s*=\s*$Ident\s*)\(.*(\&\&|\|\||,)\s*$/) {
 			$prevline =~ /^\+(\t*)(.*)$/;
 			my $oldindent = $1;
 			my $rest = $2;
@@ -2264,45 +3014,154 @@ sub process {
 					if (CHK("PARENTHESIS_ALIGNMENT",
 						"Alignment should match open parenthesis\n" . $hereprev) &&
 					    $fix && $line =~ /^\+/) {
-						$fixed[$linenr - 1] =~
+						$fixed[$fixlinenr] =~
 						    s/^\+[ \t]*/\+$goodtabindent/;
 					}
 				}
 			}
 		}
 
-		if ($line =~ /^\+.*\*[ \t]*\)[ \t]+(?!$Assignment|$Arithmetic)/) {
+# check for space after cast like "(int) foo" or "(struct foo) bar"
+# avoid checking a few false positives:
+#   "sizeof(<type>)" or "__alignof__(<type>)"
+#   function pointer declarations like "(*foo)(int) = bar;"
+#   structure definitions like "(struct foo) { 0 };"
+#   multiline macros that define functions
+#   known attributes or the __attribute__ keyword
+		if ($line =~ /^\+(.*)\(\s*$Type\s*\)([ \t]++)((?![={]|\\$|$Attribute|__attribute__))/ &&
+		    (!defined($1) || $1 !~ /\b(?:sizeof|__alignof__)\s*$/)) {
 			if (CHK("SPACING",
-				"No space is necessary after a cast\n" . $hereprev) &&
+				"No space is necessary after a cast\n" . $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~
-				    s/^(\+.*\*[ \t]*\))[ \t]+/$1/;
+				$fixed[$fixlinenr] =~
+				    s/(\(\s*$Type\s*\))[ \t]+/$1/;
 			}
 		}
 
+# Block comment styles
+# Networking with an initial /*
 		if ($realfile =~ m@^(drivers/net/|net/)@ &&
 		    $prevrawline =~ /^\+[ \t]*\/\*[ \t]*$/ &&
-		    $rawline =~ /^\+[ \t]*\*/) {
+		    $rawline =~ /^\+[ \t]*\*/ &&
+		    $realline > 2) {
 			WARN("NETWORKING_BLOCK_COMMENT_STYLE",
 			     "networking block comments don't use an empty /* line, use /* Comment...\n" . $hereprev);
 		}
 
-		if ($realfile =~ m@^(drivers/net/|net/)@ &&
-		    $prevrawline =~ /^\+[ \t]*\/\*/ &&		#starting /*
+# Block comments use * on subsequent lines
+		if ($prevline =~ /$;[ \t]*$/ &&			#ends in comment
+		    $prevrawline =~ /^\+.*?\/\*/ &&		#starting /*
 		    $prevrawline !~ /\*\/[ \t]*$/ &&		#no trailing */
 		    $rawline =~ /^\+/ &&			#line is new
 		    $rawline !~ /^\+[ \t]*\*/) {		#no leading *
-			WARN("NETWORKING_BLOCK_COMMENT_STYLE",
-			     "networking block comments start with * on subsequent lines\n" . $hereprev);
+			WARN("BLOCK_COMMENT_STYLE",
+			     "Block comments use * on subsequent lines\n" . $hereprev);
 		}
 
-		if ($realfile =~ m@^(drivers/net/|net/)@ &&
-		    $rawline !~ m@^\+[ \t]*\*/[ \t]*$@ &&	#trailing */
+# Block comments use */ on trailing lines
+		if ($rawline !~ m@^\+[ \t]*\*/[ \t]*$@ &&	#trailing */
 		    $rawline !~ m@^\+.*/\*.*\*/[ \t]*$@ &&	#inline /*...*/
 		    $rawline !~ m@^\+.*\*{2,}/[ \t]*$@ &&	#trailing **/
 		    $rawline =~ m@^\+[ \t]*.+\*\/[ \t]*$@) {	#non blank */
-			WARN("NETWORKING_BLOCK_COMMENT_STYLE",
-			     "networking block comments put the trailing */ on a separate line\n" . $herecurr);
+			WARN("BLOCK_COMMENT_STYLE",
+			     "Block comments use a trailing */ on a separate line\n" . $herecurr);
+		}
+
+# Block comment * alignment
+		if ($prevline =~ /$;[ \t]*$/ &&			#ends in comment
+		    $line =~ /^\+[ \t]*$;/ &&			#leading comment
+		    $rawline =~ /^\+[ \t]*\*/ &&		#leading *
+		    (($prevrawline =~ /^\+.*?\/\*/ &&		#leading /*
+		      $prevrawline !~ /\*\/[ \t]*$/) ||		#no trailing */
+		     $prevrawline =~ /^\+[ \t]*\*/)) {		#leading *
+			my $oldindent;
+			$prevrawline =~ m@^\+([ \t]*/?)\*@;
+			if (defined($1)) {
+				$oldindent = expand_tabs($1);
+			} else {
+				$prevrawline =~ m@^\+(.*/?)\*@;
+				$oldindent = expand_tabs($1);
+			}
+			$rawline =~ m@^\+([ \t]*)\*@;
+			my $newindent = $1;
+			$newindent = expand_tabs($newindent);
+			if (length($oldindent) ne length($newindent)) {
+				WARN("BLOCK_COMMENT_STYLE",
+				     "Block comments should align the * on each line\n" . $hereprev);
+			}
+		}
+
+# check for missing blank lines after struct/union declarations
+# with exceptions for various attributes and macros
+		if ($prevline =~ /^[\+ ]};?\s*$/ &&
+		    $line =~ /^\+/ &&
+		    !($line =~ /^\+\s*$/ ||
+		      $line =~ /^\+\s*EXPORT_SYMBOL/ ||
+		      $line =~ /^\+\s*MODULE_/i ||
+		      $line =~ /^\+\s*\#\s*(?:end|elif|else)/ ||
+		      $line =~ /^\+[a-z_]*init/ ||
+		      $line =~ /^\+\s*(?:static\s+)?[A-Z_]*ATTR/ ||
+		      $line =~ /^\+\s*DECLARE/ ||
+		      $line =~ /^\+\s*__setup/)) {
+			if (CHK("LINE_SPACING",
+				"Please use a blank line after function/struct/union/enum declarations\n" . $hereprev) &&
+			    $fix) {
+				fix_insert_line($fixlinenr, "\+");
+			}
+		}
+
+# check for multiple consecutive blank lines
+		if ($prevline =~ /^[\+ ]\s*$/ &&
+		    $line =~ /^\+\s*$/ &&
+		    $last_blank_line != ($linenr - 1)) {
+			if (CHK("LINE_SPACING",
+				"Please don't use multiple blank lines\n" . $hereprev) &&
+			    $fix) {
+				fix_delete_line($fixlinenr, $rawline);
+			}
+
+			$last_blank_line = $linenr;
+		}
+
+# check for missing blank lines after declarations
+		if ($sline =~ /^\+\s+\S/ &&			#Not at char 1
+			# actual declarations
+		    ($prevline =~ /^\+\s+$Declare\s*$Ident\s*[=,;:\[]/ ||
+			# function pointer declarations
+		     $prevline =~ /^\+\s+$Declare\s*\(\s*\*\s*$Ident\s*\)\s*[=,;:\[\(]/ ||
+			# foo bar; where foo is some local typedef or #define
+		     $prevline =~ /^\+\s+$Ident(?:\s+|\s*\*\s*)$Ident\s*[=,;\[]/ ||
+			# known declaration macros
+		     $prevline =~ /^\+\s+$declaration_macros/) &&
+			# for "else if" which can look like "$Ident $Ident"
+		    !($prevline =~ /^\+\s+$c90_Keywords\b/ ||
+			# other possible extensions of declaration lines
+		      $prevline =~ /(?:$Compare|$Assignment|$Operators)\s*$/ ||
+			# not starting a section or a macro "\" extended line
+		      $prevline =~ /(?:\{\s*|\\)$/) &&
+			# looks like a declaration
+		    !($sline =~ /^\+\s+$Declare\s*$Ident\s*[=,;:\[]/ ||
+			# function pointer declarations
+		      $sline =~ /^\+\s+$Declare\s*\(\s*\*\s*$Ident\s*\)\s*[=,;:\[\(]/ ||
+			# foo bar; where foo is some local typedef or #define
+		      $sline =~ /^\+\s+$Ident(?:\s+|\s*\*\s*)$Ident\s*[=,;\[]/ ||
+			# known declaration macros
+		      $sline =~ /^\+\s+$declaration_macros/ ||
+			# start of struct or union or enum
+		      $sline =~ /^\+\s+(?:union|struct|enum|typedef)\b/ ||
+			# start or end of block or continuation of declaration
+		      $sline =~ /^\+\s+(?:$|[\{\}\.\#\"\?\:\(\[])/ ||
+			# bitfield continuation
+		      $sline =~ /^\+\s+$Ident\s*:\s*\d+\s*[,;]/ ||
+			# other possible extensions of declaration lines
+		      $sline =~ /^\+\s+\(?\s*(?:$Compare|$Assignment|$Operators)/) &&
+			# indentation of previous and current line are the same
+		    (($prevline =~ /\+(\s+)\S/) && $sline =~ /^\+$1\S/)) {
+			if (WARN("LINE_SPACING",
+				 "Missing a blank line after declarations\n" . $hereprev) &&
+			    $fix) {
+				fix_insert_line($fixlinenr, "\+");
+			}
 		}
 
 # check for spaces at the beginning of a line.
@@ -2315,17 +3174,46 @@ sub process {
 			if (WARN("LEADING_SPACE",
 				 "please, no spaces at the start of a line\n" . $herevet) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~ s/^\+([ \t]+)/"\+" . tabify($1)/e;
+				$fixed[$fixlinenr] =~ s/^\+([ \t]+)/"\+" . tabify($1)/e;
 			}
 		}
 
 # check we are in a valid C source file if not then ignore this hunk
 		next if ($realfile !~ /\.(h|c)$/);
 
-# discourage the addition of CONFIG_EXPERIMENTAL in #if(def).
-		if ($line =~ /^\+\s*\#\s*if.*\bCONFIG_EXPERIMENTAL\b/) {
-			WARN("CONFIG_EXPERIMENTAL",
-			     "Use of CONFIG_EXPERIMENTAL is deprecated. For alternatives, see https://lkml.org/lkml/2012/10/23/580\n");
+# check if this appears to be the start function declaration, save the name
+		if ($sline =~ /^\+\{\s*$/ &&
+		    $prevline =~ /^\+(?:(?:(?:$Storage|$Inline)\s*)*\s*$Type\s*)?($Ident)\(/) {
+			$context_function = $1;
+		}
+
+# check if this appears to be the end of function declaration
+		if ($sline =~ /^\+\}\s*$/) {
+			undef $context_function;
+		}
+
+# check indentation of any line with a bare else
+# (but not if it is a multiple line "if (foo) return bar; else return baz;")
+# if the previous line is a break or return and is indented 1 tab more...
+		if ($sline =~ /^\+([\t]+)(?:}[ \t]*)?else(?:[ \t]*{)?\s*$/) {
+			my $tabs = length($1) + 1;
+			if ($prevline =~ /^\+\t{$tabs,$tabs}break\b/ ||
+			    ($prevline =~ /^\+\t{$tabs,$tabs}return\b/ &&
+			     defined $lines[$linenr] &&
+			     $lines[$linenr] !~ /^[ \+]\t{$tabs,$tabs}return/)) {
+				WARN("UNNECESSARY_ELSE",
+				     "else is not generally useful after a break or return\n" . $hereprev);
+			}
+		}
+
+# check indentation of a line with a break;
+# if the previous line is a goto or return and is indented the same # of tabs
+		if ($sline =~ /^\+([\t]+)break\s*;\s*$/) {
+			my $tabs = $1;
+			if ($prevline =~ /^\+$tabs(?:goto|return)\b/) {
+				WARN("UNNECESSARY_BREAK",
+				     "break is not useful after a goto or return\n" . $hereprev);
+			}
 		}
 
 # check for RCS/CVS revision markers
@@ -2356,7 +3244,7 @@ sub process {
 		my ($stat, $cond, $line_nr_next, $remain_next, $off_next,
 		    $realline_next);
 #print "LINE<$line>\n";
-		if ($linenr >= $suppress_statement &&
+		if ($linenr > $suppress_statement &&
 		    $realcnt && $sline =~ /.\s*\S/) {
 			($stat, $cond, $line_nr_next, $remain_next, $off_next) =
 				ctx_statement_block($linenr, $realcnt, 0);
@@ -2457,7 +3345,7 @@ sub process {
 
 # if/while/etc brace do not go on next line, unless defining a do while loop,
 # or if that brace on the next line is for something else
-		if ($line =~ /(.*)\b((?:if|while|for|switch)\s*\(|do\b|else\b)/ && $line !~ /^.\s*\#/) {
+		if ($line =~ /(.*)\b((?:if|while|for|switch|(?:[a-z_]+|)for_each[a-z_]+)\s*\(|do\b|else\b)/ && $line !~ /^.\s*\#/) {
 			my $pre_ctx = "$1$2";
 
 			my ($level, @ctx) = ctx_statement_level($linenr, $realcnt, 0);
@@ -2484,7 +3372,7 @@ sub process {
 			#print "realcnt<$realcnt> ctx_cnt<$ctx_cnt>\n";
 			#print "pre<$pre_ctx>\nline<$line>\nctx<$ctx>\nnext<$lines[$ctx_ln - 1]>\n";
 
-			if ($ctx !~ /{\s*/ && defined($lines[$ctx_ln -1]) && $lines[$ctx_ln - 1] =~ /^\+\s*{/) {
+			if ($ctx !~ /{\s*/ && defined($lines[$ctx_ln - 1]) && $lines[$ctx_ln - 1] =~ /^\+\s*{/) {
 				ERROR("OPEN_BRACE",
 				      "that open brace { should be on the previous line\n" .
 					"$here\n$ctx\n$rawlines[$ctx_ln - 1]\n");
@@ -2503,7 +3391,7 @@ sub process {
 		}
 
 # Check relative indent for conditionals and blocks.
-		if ($line =~ /\b(?:(?:if|while|for)\s*\(|do\b)/ && $line !~ /^.\s*#/ && $line !~ /\}\s*while\s*/) {
+		if ($line =~ /\b(?:(?:if|while|for|(?:[a-z_]+|)for_each[a-z_]+)\s*\(|(?:do|else)\b)/ && $line !~ /^.\s*#/ && $line !~ /\}\s*while\s*/) {
 			($stat, $cond, $line_nr_next, $remain_next, $off_next) =
 				ctx_statement_block($linenr, $realcnt, 0)
 					if (!defined $stat);
@@ -2511,15 +3399,22 @@ sub process {
 
 			substr($s, 0, length($c), '');
 
-			# Make sure we remove the line prefixes as we have
-			# none on the first line, and are going to readd them
-			# where necessary.
-			$s =~ s/\n./\n/gs;
+			# remove inline comments
+			$s =~ s/$;/ /g;
+			$c =~ s/$;/ /g;
 
 			# Find out how long the conditional actually is.
 			my @newlines = ($c =~ /\n/gs);
 			my $cond_lines = 1 + $#newlines;
 
+			# Make sure we remove the line prefixes as we have
+			# none on the first line, and are going to readd them
+			# where necessary.
+			$s =~ s/\n./\n/gs;
+			while ($s =~ /\n\s+\\\n/) {
+				$cond_lines += $s =~ s/\n\s+\\\n/\n/g;
+			}
+
 			# We want to check the first line inside the block
 			# starting at the end of the conditional, so remove:
 			#  1) any blank line termination
@@ -2585,8 +3480,12 @@ sub process {
 
 			#print "line<$line> prevline<$prevline> indent<$indent> sindent<$sindent> check<$check> continuation<$continuation> s<$s> cond_lines<$cond_lines> stat_real<$stat_real> stat<$stat>\n";
 
-			if ($check && (($sindent % 8) != 0 ||
-			    ($sindent <= $indent && $s ne ''))) {
+			if ($check && $s ne '' &&
+			    (($sindent % 8) != 0 ||
+			     ($sindent < $indent) ||
+			     ($sindent == $indent &&
+			      ($s !~ /^\s*(?:\}|\{|else\b)/)) ||
+			     ($sindent > $indent + 8))) {
 				WARN("SUSPECT_CODE_INDENT",
 				     "suspect code indent for conditional statements ($indent, $sindent)\n" . $herecurr . "$stat_real\n");
 			}
@@ -2608,6 +3507,42 @@ sub process {
 #ignore lines not being added
 		next if ($line =~ /^[^\+]/);
 
+# check for dereferences that span multiple lines
+		if ($prevline =~ /^\+.*$Lval\s*(?:\.|->)\s*$/ &&
+		    $line =~ /^\+\s*(?!\#\s*(?!define\s+|if))\s*$Lval/) {
+			$prevline =~ /($Lval\s*(?:\.|->))\s*$/;
+			my $ref = $1;
+			$line =~ /^.\s*($Lval)/;
+			$ref .= $1;
+			$ref =~ s/\s//g;
+			WARN("MULTILINE_DEREFERENCE",
+			     "Avoid multiple line dereference - prefer '$ref'\n" . $hereprev);
+		}
+
+# check for declarations of signed or unsigned without int
+		while ($line =~ m{\b($Declare)\s*(?!char\b|short\b|int\b|long\b)\s*($Ident)?\s*[=,;\[\)\(]}g) {
+			my $type = $1;
+			my $var = $2;
+			$var = "" if (!defined $var);
+			if ($type =~ /^(?:(?:$Storage|$Inline|$Attribute)\s+)*((?:un)?signed)((?:\s*\*)*)\s*$/) {
+				my $sign = $1;
+				my $pointer = $2;
+
+				$pointer = "" if (!defined $pointer);
+
+				if (WARN("UNSPECIFIED_INT",
+					 "Prefer '" . trim($sign) . " int" . rtrim($pointer) . "' to bare use of '$sign" . rtrim($pointer) . "'\n" . $herecurr) &&
+				    $fix) {
+					my $decl = trim($sign) . " int ";
+					my $comp_pointer = $pointer;
+					$comp_pointer =~ s/\s//g;
+					$decl .= $comp_pointer;
+					$decl = rtrim($decl) if ($var eq "");
+					$fixed[$fixlinenr] =~ s@\b$sign\s*\Q$pointer\E\s*$var\b@$decl$var@;
+				}
+			}
+		}
+
 # TEST: allow direct testing of the type matcher.
 		if ($dbg_type) {
 			if ($line =~ /^.\s*$Declare\s*$/) {
@@ -2634,8 +3569,18 @@ sub process {
 # check for initialisation to aggregates open brace on the next line
 		if ($line =~ /^.\s*{/ &&
 		    $prevline =~ /(?:^|[^=])=\s*$/) {
-			ERROR("OPEN_BRACE",
-			      "that open brace { should be on the previous line\n" . $hereprev);
+			if (ERROR("OPEN_BRACE",
+				  "that open brace { should be on the previous line\n" . $hereprev) &&
+			    $fix && $prevline =~ /^\+/ && $line =~ /^\+/) {
+				fix_delete_line($fixlinenr - 1, $prevrawline);
+				fix_delete_line($fixlinenr, $rawline);
+				my $fixedline = $prevrawline;
+				$fixedline =~ s/\s*=\s*$/ = {/;
+				fix_insert_line($fixlinenr, $fixedline);
+				$fixedline = $line;
+				$fixedline =~ s/^(.\s*)\{\s*/$1/;
+				fix_insert_line($fixlinenr, $fixedline);
+			}
 		}
 
 #
@@ -2660,10 +3605,10 @@ sub process {
 			if (ERROR("C99_COMMENTS",
 				  "do not use C99 // comments\n" . $herecurr) &&
 			    $fix) {
-				my $line = $fixed[$linenr - 1];
+				my $line = $fixed[$fixlinenr];
 				if ($line =~ /\/\/(.*)$/) {
 					my $comment = trim($1);
-					$fixed[$linenr - 1] =~ s@\/\/(.*)$@/\* $comment \*/@;
+					$fixed[$fixlinenr] =~ s@\/\/(.*)$@/\* $comment \*/@;
 				}
 			}
 		}
@@ -2717,24 +3662,30 @@ sub process {
 		}
 
 # check for global initialisers.
-		if ($line =~ /^\+(\s*$Type\s*$Ident\s*(?:\s+$Modifier))*\s*=\s*(0|NULL|false)\s*;/) {
+		if ($line =~ /^\+$Type\s*$Ident(?:\s+$Modifier)*\s*=\s*($zero_initializer)\s*;/) {
 			if (ERROR("GLOBAL_INITIALISERS",
-				  "do not initialise globals to 0 or NULL\n" .
-				      $herecurr) &&
+				  "do not initialise globals to $1\n" . $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~ s/($Type\s*$Ident\s*(?:\s+$Modifier))*\s*=\s*(0|NULL|false)\s*;/$1;/;
+				$fixed[$fixlinenr] =~ s/(^.$Type\s*$Ident(?:\s+$Modifier)*)\s*=\s*$zero_initializer\s*;/$1;/;
 			}
 		}
 # check for static initialisers.
-		if ($line =~ /^\+.*\bstatic\s.*=\s*(0|NULL|false)\s*;/) {
+		if ($line =~ /^\+.*\bstatic\s.*=\s*($zero_initializer)\s*;/) {
 			if (ERROR("INITIALISED_STATIC",
-				  "do not initialise statics to 0 or NULL\n" .
+				  "do not initialise statics to $1\n" .
 				      $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~ s/(\bstatic\s.*?)\s*=\s*(0|NULL|false)\s*;/$1;/;
+				$fixed[$fixlinenr] =~ s/(\bstatic\s.*?)\s*=\s*$zero_initializer\s*;/$1;/;
 			}
 		}
 
+# check for misordered declarations of char/short/int/long with signed/unsigned
+		while ($sline =~ m{(\b$TypeMisordered\b)}g) {
+			my $tmp = trim($1);
+			WARN("MISORDERED_TYPE",
+			     "type '$tmp' should be specified in [[un]signed] [short|int|long|long long] order\n" . $herecurr);
+		}
+
 # check for static const char * arrays.
 		if ($line =~ /\bstatic\s+const\s+char\s*\*\s*(\w+)\s*\[\s*\]\s*=\s*/) {
 			WARN("STATIC_CONST_CHAR_ARRAY",
@@ -2749,21 +3700,44 @@ sub process {
 				$herecurr);
                }
 
+# check for const <foo> const where <foo> is not a pointer or array type
+		if ($sline =~ /\bconst\s+($BasicType)\s+const\b/) {
+			my $found = $1;
+			if ($sline =~ /\bconst\s+\Q$found\E\s+const\b\s*\*/) {
+				WARN("CONST_CONST",
+				     "'const $found const *' should probably be 'const $found * const'\n" . $herecurr);
+			} elsif ($sline !~ /\bconst\s+\Q$found\E\s+const\s+\w+\s*\[/) {
+				WARN("CONST_CONST",
+				     "'const $found const' should probably be 'const $found'\n" . $herecurr);
+			}
+		}
+
+# check for non-global char *foo[] = {"bar", ...} declarations.
+		if ($line =~ /^.\s+(?:static\s+|const\s+)?char\s+\*\s*\w+\s*\[\s*\]\s*=\s*\{/) {
+			WARN("STATIC_CONST_CHAR_ARRAY",
+			     "char * array declaration might be better as static const\n" .
+				$herecurr);
+               }
+
+# check for sizeof(foo)/sizeof(foo[0]) that could be ARRAY_SIZE(foo)
+		if ($line =~ m@\bsizeof\s*\(\s*($Lval)\s*\)@) {
+			my $array = $1;
+			if ($line =~ m@\b(sizeof\s*\(\s*\Q$array\E\s*\)\s*/\s*sizeof\s*\(\s*\Q$array\E\s*\[\s*0\s*\]\s*\))@) {
+				my $array_div = $1;
+				if (WARN("ARRAY_SIZE",
+					 "Prefer ARRAY_SIZE($array)\n" . $herecurr) &&
+				    $fix) {
+					$fixed[$fixlinenr] =~ s/\Q$array_div\E/ARRAY_SIZE($array)/;
+				}
+			}
+		}
+
 # check for function declarations without arguments like "int foo()"
 		if ($line =~ /(\b$Type\s+$Ident)\s*\(\s*\)/) {
 			if (ERROR("FUNCTION_WITHOUT_ARGS",
 				  "Bad function definition - $1() should probably be $1(void)\n" . $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~ s/(\b($Type)\s+($Ident))\s*\(\s*\)/$2 $3(void)/;
-			}
-		}
-
-# check for uses of DEFINE_PCI_DEVICE_TABLE
-		if ($line =~ /\bDEFINE_PCI_DEVICE_TABLE\s*\(\s*(\w+)\s*\)\s*=/) {
-			if (WARN("DEFINE_PCI_DEVICE_TABLE",
-				 "Prefer struct pci_device_id over deprecated DEFINE_PCI_DEVICE_TABLE\n" . $herecurr) &&
-			    $fix) {
-				$fixed[$linenr - 1] =~ s/\b(?:static\s+|)DEFINE_PCI_DEVICE_TABLE\s*\(\s*(\w+)\s*\)\s*=\s*/static const struct pci_device_id $1\[\] = /;
+				$fixed[$fixlinenr] =~ s/(\b($Type)\s+($Ident))\s*\(\s*\)/$2 $3(void)/;
 			}
 		}
 
@@ -2773,7 +3747,7 @@ sub process {
 		    $line !~ /\btypedef\s+$Type\s*\(\s*\*?$Ident\s*\)\s*\(/ &&
 		    $line !~ /\btypedef\s+$Type\s+$Ident\s*\(/ &&
 		    $line !~ /\b$typeTypedefs\b/ &&
-		    $line !~ /\b__bitwise(?:__|)\b/) {
+		    $line !~ /\b__bitwise\b/) {
 			WARN("NEW_TYPEDEFS",
 			     "do not add new typedefs\n" . $herecurr);
 		}
@@ -2800,7 +3774,7 @@ sub process {
 					my $sub_from = $ident;
 					my $sub_to = $ident;
 					$sub_to =~ s/\Q$from\E/$to/;
-					$fixed[$linenr - 1] =~
+					$fixed[$fixlinenr] =~
 					    s@\Q$sub_from\E@$sub_to@;
 				}
 			}
@@ -2828,19 +3802,21 @@ sub process {
 					my $sub_from = $match;
 					my $sub_to = $match;
 					$sub_to =~ s/\Q$from\E/$to/;
-					$fixed[$linenr - 1] =~
+					$fixed[$fixlinenr] =~
 					    s@\Q$sub_from\E@$sub_to@;
 				}
 			}
 		}
 
-# # no BUG() or BUG_ON()
-# 		if ($line =~ /\b(BUG|BUG_ON)\b/) {
-# 			print "Try to use WARN_ON & Recovery code rather than BUG() or BUG_ON()\n";
-# 			print "$herecurr";
-# 			$clean = 0;
-# 		}
+# avoid BUG() or BUG_ON()
+		if ($line =~ /\b(?:BUG|BUG_ON)\b/) {
+			my $msg_type = \&WARN;
+			$msg_type = \&CHK if ($file);
+			&{$msg_type}("AVOID_BUG",
+				     "Avoid crashing the kernel - try using WARN_ON & recovery code rather than BUG() or BUG_ON()\n" . $herecurr);
+		}
 
+# avoid LINUX_VERSION_CODE
 		if ($line =~ /\bLINUX_VERSION_CODE\b/) {
 			WARN("LINUX_VERSION_CODE",
 			     "LINUX_VERSION_CODE should be avoided, code should be for the version to which it is merged\n" . $herecurr);
@@ -2849,7 +3825,7 @@ sub process {
 # check for uses of printk_ratelimit
 		if ($line =~ /\bprintk_ratelimit\s*\(/) {
 			WARN("PRINTK_RATELIMITED",
-"Prefer printk_ratelimited or pr_<level>_ratelimited to printk_ratelimit\n" . $herecurr);
+			     "Prefer printk_ratelimited or pr_<level>_ratelimited to printk_ratelimit\n" . $herecurr);
 		}
 
 # printk should use KERN_* levels.  Note that follow on printk's on the
@@ -2883,14 +3859,14 @@ sub process {
 			my $level2 = $level;
 			$level2 = "dbg" if ($level eq "debug");
 			WARN("PREFER_PR_LEVEL",
-			     "Prefer netdev_$level2(netdev, ... then dev_$level2(dev, ... then pr_$level(...  to printk(KERN_$orig ...\n" . $herecurr);
+			     "Prefer [subsystem eg: netdev]_$level2([subsystem]dev, ... then dev_$level2(dev, ... then pr_$level(...  to printk(KERN_$orig ...\n" . $herecurr);
 		}
 
 		if ($line =~ /\bpr_warning\s*\(/) {
 			if (WARN("PREFER_PR_LEVEL",
 				 "Prefer pr_warn(... to pr_warning(...\n" . $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~
+				$fixed[$fixlinenr] =~
 				    s/\bpr_warning\b/pr_warn/;
 			}
 		}
@@ -2904,19 +3880,50 @@ sub process {
 			     "Prefer dev_$level(... to dev_printk(KERN_$orig, ...\n" . $herecurr);
 		}
 
+# ENOSYS means "bad syscall nr" and nothing else.  This will have a small
+# number of false positives, but assembly files are not checked, so at
+# least the arch entry code will not trigger this warning.
+		if ($line =~ /\bENOSYS\b/) {
+			WARN("ENOSYS",
+			     "ENOSYS means 'invalid syscall nr' and nothing else\n" . $herecurr);
+		}
+
 # function brace can't be on same line, except for #defines of do while,
 # or if closed on same line
-		if (($line=~/$Type\s*$Ident\(.*\).*\s\{/) and
+		if (($line=~/$Type\s*$Ident\(.*\).*\s*{/) and
 		    !($line=~/\#\s*define.*do\s\{/) and !($line=~/}/)) {
-			ERROR("OPEN_BRACE",
-			      "open brace '{' following function declarations go on the next line\n" . $herecurr);
+			if (ERROR("OPEN_BRACE",
+				  "open brace '{' following function declarations go on the next line\n" . $herecurr) &&
+			    $fix) {
+				fix_delete_line($fixlinenr, $rawline);
+				my $fixed_line = $rawline;
+				$fixed_line =~ /(^..*$Type\s*$Ident\(.*\)\s*){(.*)$/;
+				my $line1 = $1;
+				my $line2 = $2;
+				fix_insert_line($fixlinenr, ltrim($line1));
+				fix_insert_line($fixlinenr, "\+{");
+				if ($line2 !~ /^\s*$/) {
+					fix_insert_line($fixlinenr, "\+\t" . trim($line2));
+				}
+			}
 		}
 
 # open braces for enum, union and struct go on the same line.
 		if ($line =~ /^.\s*{/ &&
 		    $prevline =~ /^.\s*(?:typedef\s+)?(enum|union|struct)(?:\s+$Ident)?\s*$/) {
-			ERROR("OPEN_BRACE",
-			      "open brace '{' following $1 go on the same line\n" . $hereprev);
+			if (ERROR("OPEN_BRACE",
+				  "open brace '{' following $1 go on the same line\n" . $hereprev) &&
+			    $fix && $prevline =~ /^\+/ && $line =~ /^\+/) {
+				fix_delete_line($fixlinenr - 1, $prevrawline);
+				fix_delete_line($fixlinenr, $rawline);
+				my $fixedline = rtrim($prevrawline) . " {";
+				fix_insert_line($fixlinenr, $fixedline);
+				$fixedline = $rawline;
+				$fixedline =~ s/^(.\s*)\{\s*/$1\t/;
+				if ($fixedline !~ /^\+\s*$/) {
+					fix_insert_line($fixlinenr, $fixedline);
+				}
+			}
 		}
 
 # missing space after union, struct or enum definition
@@ -2924,7 +3931,7 @@ sub process {
 			if (WARN("SPACING",
 				 "missing space after $1 definition\n" . $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~
+				$fixed[$fixlinenr] =~
 				    s/^(.\s*(?:typedef\s+)?(?:enum|union|struct)(?:\s+$Ident){1,2})([=\{])/$1 $2/;
 			}
 		}
@@ -2932,10 +3939,7 @@ sub process {
 # Function pointer declarations
 # check spacing between type, funcptr, and args
 # canonical declaration is "type (*funcptr)(args...)"
-#
-# the $Declare variable will capture all spaces after the type
-# so check it for trailing missing spaces or multiple spaces
-		if ($line =~ /^.\s*($Declare)\((\s*)\*(\s*)$Ident(\s*)\)(\s*)\(/) {
+		if ($line =~ /^.\s*($Declare)\((\s*)\*(\s*)($Ident)(\s*)\)(\s*)\(/) {
 			my $declare = $1;
 			my $pre_pointer_space = $2;
 			my $post_pointer_space = $3;
@@ -2943,16 +3947,30 @@ sub process {
 			my $post_funcname_space = $5;
 			my $pre_args_space = $6;
 
-			if ($declare !~ /\s$/) {
+# the $Declare variable will capture all spaces after the type
+# so check it for a missing trailing missing space but pointer return types
+# don't need a space so don't warn for those.
+			my $post_declare_space = "";
+			if ($declare =~ /(\s+)$/) {
+				$post_declare_space = $1;
+				$declare = rtrim($declare);
+			}
+			if ($declare !~ /\*$/ && $post_declare_space =~ /^$/) {
 				WARN("SPACING",
 				     "missing space after return type\n" . $herecurr);
+				$post_declare_space = " ";
 			}
 
 # unnecessary space "type  (*funcptr)(args...)"
-			elsif ($declare =~ /\s{2,}$/) {
-				WARN("SPACING",
-				     "Multiple spaces after return type\n" . $herecurr);
-			}
+# This test is not currently implemented because these declarations are
+# equivalent to
+#	int  foo(int bar, ...)
+# and this is form shouldn't/doesn't generate a checkpatch warning.
+#
+#			elsif ($declare =~ /\s{2,}$/) {
+#				WARN("SPACING",
+#				     "Multiple spaces after return type\n" . $herecurr);
+#			}
 
 # unnecessary space "type ( *funcptr)(args...)"
 			if (defined $pre_pointer_space &&
@@ -2983,8 +4001,8 @@ sub process {
 			}
 
 			if (show_type("SPACING") && $fix) {
-				$fixed[$linenr - 1] =~
-				    s/^(.\s*$Declare)\(\s*\*\s*($Ident)\s*\)\s*\(/rtrim($1) . " " . "\(\*$2\)\("/ex;
+				$fixed[$fixlinenr] =~
+				    s/^(.\s*)$Declare\s*\(\s*\*\s*$Ident\s*\)\s*\(/$1 . $declare . $post_declare_space . '(*' . $funcname . ')('/ex;
 			}
 		}
 
@@ -3000,7 +4018,7 @@ sub process {
 				if (ERROR("BRACKET_SPACE",
 					  "space prohibited before open square bracket '['\n" . $herecurr) &&
 				    $fix) {
-				    $fixed[$linenr - 1] =~
+				    $fixed[$fixlinenr] =~
 					s/^(\+.*?)\s+\[/$1\[/;
 				}
 			}
@@ -3035,7 +4053,7 @@ sub process {
 				if (WARN("SPACING",
 					 "space prohibited between function name and open parenthesis '('\n" . $herecurr) &&
 					     $fix) {
-					$fixed[$linenr - 1] =~
+					$fixed[$fixlinenr] =~
 					    s/\b$name\s+\(/$name\(/;
 				}
 			}
@@ -3126,7 +4144,7 @@ sub process {
 
 				# Ignore operators passed as parameters.
 				if ($op_type ne 'V' &&
-				    $ca =~ /\s$/ && $cc =~ /^\s*,/) {
+				    $ca =~ /\s$/ && $cc =~ /^\s*[,\)]/) {
 
 #				# Ignore comments
 #				} elsif ($op =~ /^$;+$/) {
@@ -3145,10 +4163,13 @@ sub process {
 				# // is a comment
 				} elsif ($op eq '//') {
 
+				#   :   when part of a bitfield
+				} elsif ($opv eq ':B') {
+					# skip the bitfield test for now
+
 				# No spaces for:
 				#   ->
-				#   :   when part of a bitfield
-				} elsif ($op eq '->' || $opv eq ':B') {
+				} elsif ($op eq '->') {
 					if ($ctx =~ /Wx.|.xW/) {
 						if (ERROR("SPACING",
 							  "spaces prohibited around that '$op' $at\n" . $hereptr)) {
@@ -3160,14 +4181,33 @@ sub process {
 						}
 					}
 
-				# , must have a space on the right.
+				# , must not have a space before and must have a space on the right.
 				} elsif ($op eq ',') {
+					my $rtrim_before = 0;
+					my $space_after = 0;
+					if ($ctx =~ /Wx./) {
+						if (ERROR("SPACING",
+							  "space prohibited before that '$op' $at\n" . $hereptr)) {
+							$line_fixed = 1;
+							$rtrim_before = 1;
+						}
+					}
 					if ($ctx !~ /.x[WEC]/ && $cc !~ /^}/) {
 						if (ERROR("SPACING",
 							  "space required after that '$op' $at\n" . $hereptr)) {
-							$good = $fix_elements[$n] . trim($fix_elements[$n + 1]) . " ";
 							$line_fixed = 1;
 							$last_after = $n;
+							$space_after = 1;
+						}
+					}
+					if ($rtrim_before || $space_after) {
+						if ($rtrim_before) {
+							$good = rtrim($fix_elements[$n]) . trim($fix_elements[$n + 1]);
+						} else {
+							$good = $fix_elements[$n] . trim($fix_elements[$n + 1]);
+						}
+						if ($space_after) {
+							$good .= " ";
 						}
 					}
 
@@ -3239,7 +4279,22 @@ sub process {
 					 $op eq '*' or $op eq '/' or
 					 $op eq '%')
 				{
-					if ($ctx =~ /Wx[^WCE]|[^WCE]xW/) {
+					if ($check) {
+						if (defined $fix_elements[$n + 2] && $ctx !~ /[EW]x[EW]/) {
+							if (CHK("SPACING",
+								"spaces preferred around that '$op' $at\n" . $hereptr)) {
+								$good = rtrim($fix_elements[$n]) . " " . trim($fix_elements[$n + 1]) . " ";
+								$fix_elements[$n + 2] =~ s/^\s+//;
+								$line_fixed = 1;
+							}
+						} elsif (!defined $fix_elements[$n + 2] && $ctx !~ /Wx[OE]/) {
+							if (CHK("SPACING",
+								"space preferred before that '$op' $at\n" . $hereptr)) {
+								$good = rtrim($fix_elements[$n]) . " " . trim($fix_elements[$n + 1]);
+								$line_fixed = 1;
+							}
+						}
+					} elsif ($ctx =~ /Wx[^WCE]|[^WCE]xW/) {
 						if (ERROR("SPACING",
 							  "need consistent spacing around '$op' $at\n" . $hereptr)) {
 							$good = rtrim($fix_elements[$n]) . " " . trim($fix_elements[$n + 1]) . " ";
@@ -3274,6 +4329,14 @@ sub process {
 					    	$ok = 1;
 					}
 
+					# for asm volatile statements
+					# ignore a colon with another
+					# colon immediately before or after
+					if (($op eq ':') &&
+					    ($ca =~ /:$/ || $cc =~ /^:/)) {
+						$ok = 1;
+					}
+
 					# messages are ERROR, but ?: are CHK
 					if ($ok == 0) {
 						my $msg_type = \&ERROR;
@@ -3300,8 +4363,8 @@ sub process {
 				$fixed_line = $fixed_line . $fix_elements[$#elements];
 			}
 
-			if ($fix && $line_fixed && $fixed_line ne $fixed[$linenr - 1]) {
-				$fixed[$linenr - 1] = $fixed_line;
+			if ($fix && $line_fixed && $fixed_line ne $fixed[$fixlinenr]) {
+				$fixed[$fixlinenr] = $fixed_line;
 			}
 
 
@@ -3312,7 +4375,7 @@ sub process {
 			if (WARN("SPACING",
 				 "space prohibited before semicolon\n" . $herecurr) &&
 			    $fix) {
-				1 while $fixed[$linenr - 1] =~
+				1 while $fixed[$fixlinenr] =~
 				    s/^(\+.*\S)\s+;/$1;/;
 			}
 		}
@@ -3340,12 +4403,12 @@ sub process {
 ## 		}
 
 #need space before brace following if, while, etc
-		if (($line =~ /\(.*\)\{/ && $line !~ /\($Type\){/) ||
+		if (($line =~ /\(.*\)\{/ && $line !~ /\($Type\)\{/) ||
 		    $line =~ /do\{/) {
 			if (ERROR("SPACING",
 				  "space required before the open brace '{'\n" . $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~ s/^(\+.*(?:do|\))){/$1 {/;
+				$fixed[$fixlinenr] =~ s/^(\+.*(?:do|\)))\{/$1 {/;
 			}
 		}
 
@@ -3363,7 +4426,7 @@ sub process {
 			if (ERROR("SPACING",
 				  "space required after that close brace '}'\n" . $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~
+				$fixed[$fixlinenr] =~
 				    s/}((?!(?:,|;|\)))\S)/} $1/;
 			}
 		}
@@ -3373,7 +4436,7 @@ sub process {
 			if (ERROR("SPACING",
 				  "space prohibited after that open square bracket '['\n" . $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~
+				$fixed[$fixlinenr] =~
 				    s/\[\s+/\[/;
 			}
 		}
@@ -3381,7 +4444,7 @@ sub process {
 			if (ERROR("SPACING",
 				  "space prohibited before that close square bracket ']'\n" . $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~
+				$fixed[$fixlinenr] =~
 				    s/\s+\]/\]/;
 			}
 		}
@@ -3392,7 +4455,7 @@ sub process {
 			if (ERROR("SPACING",
 				  "space prohibited after that open parenthesis '('\n" . $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~
+				$fixed[$fixlinenr] =~
 				    s/\(\s+/\(/;
 			}
 		}
@@ -3402,36 +4465,77 @@ sub process {
 			if (ERROR("SPACING",
 				  "space prohibited before that close parenthesis ')'\n" . $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~
+				$fixed[$fixlinenr] =~
 				    s/\s+\)/\)/;
 			}
 		}
 
+# check unnecessary parentheses around addressof/dereference single $Lvals
+# ie: &(foo->bar) should be &foo->bar and *(foo->bar) should be *foo->bar
+
+		while ($line =~ /(?:[^&]&\s*|\*)\(\s*($Ident\s*(?:$Member\s*)+)\s*\)/g) {
+			my $var = $1;
+			if (CHK("UNNECESSARY_PARENTHESES",
+				"Unnecessary parentheses around $var\n" . $herecurr) &&
+			    $fix) {
+				$fixed[$fixlinenr] =~ s/\(\s*\Q$var\E\s*\)/$var/;
+			}
+		}
+
+# check for unnecessary parentheses around function pointer uses
+# ie: (foo->bar)(); should be foo->bar();
+# but not "if (foo->bar) (" to avoid some false positives
+		if ($line =~ /(\bif\s*|)(\(\s*$Ident\s*(?:$Member\s*)+\))[ \t]*\(/ && $1 !~ /^if/) {
+			my $var = $2;
+			if (CHK("UNNECESSARY_PARENTHESES",
+				"Unnecessary parentheses around function pointer $var\n" . $herecurr) &&
+			    $fix) {
+				my $var2 = deparenthesize($var);
+				$var2 =~ s/\s//g;
+				$fixed[$fixlinenr] =~ s/\Q$var\E/$var2/;
+			}
+		}
+
 #goto labels aren't indented, allow a single space however
 		if ($line=~/^.\s+[A-Za-z\d_]+:(?![0-9]+)/ and
 		   !($line=~/^. [A-Za-z\d_]+:/) and !($line=~/^.\s+default:/)) {
 			if (WARN("INDENTED_LABEL",
 				 "labels should not be indented\n" . $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~
+				$fixed[$fixlinenr] =~
 				    s/^(.)\s+/$1/;
 			}
 		}
 
-# Return is not a function.
+# return is not a function
 		if (defined($stat) && $stat =~ /^.\s*return(\s*)\(/s) {
 			my $spacing = $1;
 			if ($^V && $^V ge 5.10.0 &&
-			    $stat =~ /^.\s*return\s*$balanced_parens\s*;\s*$/) {
-				ERROR("RETURN_PARENTHESES",
-				      "return is not a function, parentheses are not required\n" . $herecurr);
-
+			    $stat =~ /^.\s*return\s*($balanced_parens)\s*;\s*$/) {
+				my $value = $1;
+				$value = deparenthesize($value);
+				if ($value =~ m/^\s*$FuncArg\s*(?:\?|$)/) {
+					ERROR("RETURN_PARENTHESES",
+					      "return is not a function, parentheses are not required\n" . $herecurr);
+				}
 			} elsif ($spacing !~ /\s+/) {
 				ERROR("SPACING",
 				      "space required before the open parenthesis '('\n" . $herecurr);
 			}
 		}
 
+# unnecessary return in a void function
+# at end-of-function, with the previous line a single leading tab, then return;
+# and the line before that not a goto label target like "out:"
+		if ($sline =~ /^[ \+]}\s*$/ &&
+		    $prevline =~ /^\+\treturn\s*;\s*$/ &&
+		    $linenr >= 3 &&
+		    $lines[$linenr - 3] =~ /^[ +]/ &&
+		    $lines[$linenr - 3] !~ /^[ +]\s*$Ident\s*:/) {
+			WARN("RETURN_VOID",
+			     "void function return statements are not generally useful\n" . $hereprev);
+               }
+
 # if statements using unnecessary parentheses - ie: if ((foo == bar))
 		if ($^V && $^V ge 5.10.0 &&
 		    $line =~ /\bif\s*((?:\(\s*){2,})/) {
@@ -3446,12 +4550,41 @@ sub process {
 			}
 		}
 
-# Return of what appears to be an errno should normally be -'ve
-		if ($line =~ /^.\s*return\s*(E[A-Z]*)\s*;/) {
+# comparisons with a constant or upper case identifier on the left
+#	avoid cases like "foo + BAR < baz"
+#	only fix matches surrounded by parentheses to avoid incorrect
+#	conversions like "FOO < baz() + 5" being "misfixed" to "baz() > FOO + 5"
+		if ($^V && $^V ge 5.10.0 &&
+		    $line =~ /^\+(.*)\b($Constant|[A-Z_][A-Z0-9_]*)\s*($Compare)\s*($LvalOrFunc)/) {
+			my $lead = $1;
+			my $const = $2;
+			my $comp = $3;
+			my $to = $4;
+			my $newcomp = $comp;
+			if ($lead !~ /(?:$Operators|\.)\s*$/ &&
+			    $to !~ /^(?:Constant|[A-Z_][A-Z0-9_]*)$/ &&
+			    WARN("CONSTANT_COMPARISON",
+				 "Comparisons should place the constant on the right side of the test\n" . $herecurr) &&
+			    $fix) {
+				if ($comp eq "<") {
+					$newcomp = ">";
+				} elsif ($comp eq "<=") {
+					$newcomp = ">=";
+				} elsif ($comp eq ">") {
+					$newcomp = "<";
+				} elsif ($comp eq ">=") {
+					$newcomp = "<=";
+				}
+				$fixed[$fixlinenr] =~ s/\(\s*\Q$const\E\s*$Compare\s*\Q$to\E\s*\)/($to $newcomp $const)/;
+			}
+		}
+
+# Return of what appears to be an errno should normally be negative
+		if ($sline =~ /\breturn(?:\s*\(+\s*|\s+)(E[A-Z]+)(?:\s*\)+\s*|\s*)[;:,]/) {
 			my $name = $1;
 			if ($name ne 'EOF' && $name ne 'ERROR') {
 				WARN("USE_NEGATIVE_ERRNO",
-				     "return of an errno should typically be -ve (return -$1)\n" . $herecurr);
+				     "return of an errno should typically be negative (ie: return -$1)\n" . $herecurr);
 			}
 		}
 
@@ -3460,7 +4593,7 @@ sub process {
 			if (ERROR("SPACING",
 				  "space required before the open parenthesis '('\n" . $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~
+				$fixed[$fixlinenr] =~
 				    s/\b(if|while|for|switch)\(/$1 \(/;
 			}
 		}
@@ -3550,7 +4683,7 @@ sub process {
 # if should not continue a brace
 		if ($line =~ /}\s*if\b/) {
 			ERROR("TRAILING_STATEMENTS",
-			      "trailing statements should be on next line\n" .
+			      "trailing statements should be on next line (or did you mean 'else if'?)\n" .
 				$herecurr);
 		}
 # case and default should not have general statements after them
@@ -3566,14 +4699,26 @@ sub process {
 
 		# Check for }<nl>else {, these must be at the same
 		# indent level to be relevant to each other.
-		if ($prevline=~/}\s*$/ and $line=~/^.\s*else\s*/ and
-						$previndent == $indent) {
-			ERROR("ELSE_AFTER_BRACE",
-			      "else should follow close brace '}'\n" . $hereprev);
+		if ($prevline=~/}\s*$/ and $line=~/^.\s*else\s*/ &&
+		    $previndent == $indent) {
+			if (ERROR("ELSE_AFTER_BRACE",
+				  "else should follow close brace '}'\n" . $hereprev) &&
+			    $fix && $prevline =~ /^\+/ && $line =~ /^\+/) {
+				fix_delete_line($fixlinenr - 1, $prevrawline);
+				fix_delete_line($fixlinenr, $rawline);
+				my $fixedline = $prevrawline;
+				$fixedline =~ s/}\s*$//;
+				if ($fixedline !~ /^\+\s*$/) {
+					fix_insert_line($fixlinenr, $fixedline);
+				}
+				$fixedline = $rawline;
+				$fixedline =~ s/^(.\s*)else/$1} else/;
+				fix_insert_line($fixlinenr, $fixedline);
+			}
 		}
 
-		if ($prevline=~/}\s*$/ and $line=~/^.\s*while\s*/ and
-						$previndent == $indent) {
+		if ($prevline=~/}\s*$/ and $line=~/^.\s*while\s*/ &&
+		    $previndent == $indent) {
 			my ($s, $c) = ctx_statement_block($linenr, $realcnt, 0);
 
 			# Find out what is on the end of the line after the
@@ -3582,8 +4727,18 @@ sub process {
 			$s =~ s/\n.*//g;
 
 			if ($s =~ /^\s*;/) {
-				ERROR("WHILE_AFTER_BRACE",
-				      "while should follow close brace '}'\n" . $hereprev);
+				if (ERROR("WHILE_AFTER_BRACE",
+					  "while should follow close brace '}'\n" . $hereprev) &&
+				    $fix && $prevline =~ /^\+/ && $line =~ /^\+/) {
+					fix_delete_line($fixlinenr - 1, $prevrawline);
+					fix_delete_line($fixlinenr, $rawline);
+					my $fixedline = $prevrawline;
+					my $trailing = $rawline;
+					$trailing =~ s/^\+//;
+					$trailing = trim($trailing);
+					$fixedline =~ s/}\s*$/} $trailing/;
+					fix_insert_line($fixlinenr, $fixedline);
+				}
 			}
 		}
 
@@ -3597,7 +4752,7 @@ sub process {
 					 "Avoid gcc v4.3+ binary constant extension: <$var>\n" . $herecurr) &&
 				    $fix) {
 					my $hexval = sprintf("0x%x", oct($var));
-					$fixed[$linenr - 1] =~
+					$fixed[$fixlinenr] =~
 					    s/\b$var\b/$hexval/;
 				}
 			}
@@ -3608,7 +4763,9 @@ sub process {
 #Ignore Page<foo> variants
 			    $var !~ /^(?:Clear|Set|TestClear|TestSet|)Page[A-Z]/ &&
 #Ignore SI style variants like nS, mV and dB (ie: max_uV, regulator_min_uA_show)
-			    $var !~ /^(?:[a-z_]*?)_?[a-z][A-Z](?:_[a-z_]+)?$/) {
+			    $var !~ /^(?:[a-z_]*?)_?[a-z][A-Z](?:_[a-z_]+)?$/ &&
+#Ignore some three character SI units explicitly, like MiB and KHz
+			    $var !~ /^(?:[a-z_]*?)_?(?:[KMGT]iB|[KMGT]?Hz)(?:_[a-z_]+)?$/) {
 				while ($var =~ m{($Ident)}g) {
 					my $word = $1;
 					next if ($word !~ /[A-Z][a-z]|[a-z][A-Z]/);
@@ -3633,11 +4790,12 @@ sub process {
 			if (WARN("WHITESPACE_AFTER_LINE_CONTINUATION",
 				 "Whitespace after \\ makes next lines useless\n" . $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~ s/\s+$//;
+				$fixed[$fixlinenr] =~ s/\s+$//;
 			}
 		}
 
-#warn if <asm/foo.h> is #included and <linux/foo.h> is available (uses RAW line)
+# warn if <asm/foo.h> is #included and <linux/foo.h> is available and includes
+# itself <asm/foo.h> (uses RAW line)
 		if ($tree && $rawline =~ m{^.\s*\#\s*include\s*\<asm\/(.*)\.h\>}) {
 			my $file = "$1.h";
 			my $checkfile = "include/linux/$file";
@@ -3645,12 +4803,15 @@ sub process {
 			    $realfile ne $checkfile &&
 			    $1 !~ /$allowed_asm_includes/)
 			{
-				if ($realfile =~ m{^arch/}) {
-					CHK("ARCH_INCLUDE_LINUX",
-					    "Consider using #include <linux/$file> instead of <asm/$file>\n" . $herecurr);
-				} else {
-					WARN("INCLUDE_LINUX",
-					     "Use #include <linux/$file> instead of <asm/$file>\n" . $herecurr);
+				my $asminclude = `grep -Ec "#include\\s+<asm/$file>" $root/$checkfile`;
+				if ($asminclude > 0) {
+					if ($realfile =~ m{^arch/}) {
+						CHK("ARCH_INCLUDE_LINUX",
+						    "Consider using #include <linux/$file> instead of <asm/$file>\n" . $herecurr);
+					} else {
+						WARN("INCLUDE_LINUX",
+						     "Use #include <linux/$file> instead of <asm/$file>\n" . $herecurr);
+					}
 				}
 			}
 		}
@@ -3664,13 +4825,28 @@ sub process {
 			my $cnt = $realcnt;
 			my ($off, $dstat, $dcond, $rest);
 			my $ctx = '';
+			my $has_flow_statement = 0;
+			my $has_arg_concat = 0;
 			($dstat, $dcond, $ln, $cnt, $off) =
 				ctx_statement_block($linenr, $realcnt, 0);
 			$ctx = $dstat;
 			#print "dstat<$dstat> dcond<$dcond> cnt<$cnt> off<$off>\n";
 			#print "LINE<$lines[$ln-1]> len<" . length($lines[$ln-1]) . "\n";
 
-			$dstat =~ s/^.\s*\#\s*define\s+$Ident(?:\([^\)]*\))?\s*//;
+			$has_flow_statement = 1 if ($ctx =~ /\b(goto|return)\b/);
+			$has_arg_concat = 1 if ($ctx =~ /\#\#/ && $ctx !~ /\#\#\s*(?:__VA_ARGS__|args)\b/);
+
+			$dstat =~ s/^.\s*\#\s*define\s+$Ident(\([^\)]*\))?\s*//;
+			my $define_args = $1;
+			my $define_stmt = $dstat;
+			my @def_args = ();
+
+			if (defined $define_args && $define_args ne "") {
+				$define_args = substr($define_args, 1, length($define_args) - 2);
+				$define_args =~ s/\s*//g;
+				@def_args = split(",", $define_args);
+			}
+
 			$dstat =~ s/$;//g;
 			$dstat =~ s/\\\n.//g;
 			$dstat =~ s/^\s*//s;
@@ -3679,16 +4855,19 @@ sub process {
 			# Flatten any parentheses and braces
 			while ($dstat =~ s/\([^\(\)]*\)/1/ ||
 			       $dstat =~ s/\{[^\{\}]*\}/1/ ||
-			       $dstat =~ s/\[[^\[\]]*\]/1/)
+			       $dstat =~ s/.\[[^\[\]]*\]/1/)
 			{
 			}
 
 			# Flatten any obvious string concatentation.
-			while ($dstat =~ s/("X*")\s*$Ident/$1/ ||
-			       $dstat =~ s/$Ident\s*("X*")/$1/)
+			while ($dstat =~ s/($String)\s*$Ident/$1/ ||
+			       $dstat =~ s/$Ident\s*($String)/$1/)
 			{
 			}
 
+			# Make asm volatile uses seem like a generic function
+			$dstat =~ s/\b_*asm_*\s+_*volatile_*\b/asm_volatile/g;
+
 			my $exceptions = qr{
 				$Declare|
 				module_param_named|
@@ -3699,14 +4878,24 @@ sub process {
 				union|
 				struct|
 				\.$Ident\s*=\s*|
-				^\"|\"$
+				^\"|\"$|
+				^\[
 			}x;
 			#print "REST<$rest> dstat<$dstat> ctx<$ctx>\n";
+
+			$ctx =~ s/\n*$//;
+			my $herectx = $here . "\n";
+			my $stmt_cnt = statement_rawlines($ctx);
+
+			for (my $n = 0; $n < $stmt_cnt; $n++) {
+				$herectx .= raw_line($linenr, $n) . "\n";
+			}
+
 			if ($dstat ne '' &&
 			    $dstat !~ /^(?:$Ident|-?$Constant),$/ &&			# 10, // foo(),
 			    $dstat !~ /^(?:$Ident|-?$Constant);$/ &&			# foo();
 			    $dstat !~ /^[!~-]?(?:$Lval|$Constant)$/ &&		# 10 // foo() // !foo // ~foo // -foo // foo->bar // foo.bar->baz
-			    $dstat !~ /^'X'$/ &&					# character constants
+			    $dstat !~ /^'X'$/ && $dstat !~ /^'XX'$/ &&			# character constants
 			    $dstat !~ /$exceptions/ &&
 			    $dstat !~ /^\.$Ident\s*=/ &&				# .foo =
 			    $dstat !~ /^(?:\#\s*$Ident|\#\s*$Constant)\s*$/ &&		# stringification #foo
@@ -3717,21 +4906,69 @@ sub process {
 			    $dstat !~ /^\(\{/ &&						# ({...
 			    $ctx !~ /^.\s*#\s*define\s+TRACE_(?:SYSTEM|INCLUDE_FILE|INCLUDE_PATH)\b/)
 			{
-				$ctx =~ s/\n*$//;
+				if ($dstat =~ /^\s*if\b/) {
+					ERROR("MULTISTATEMENT_MACRO_USE_DO_WHILE",
+					      "Macros starting with if should be enclosed by a do - while loop to avoid possible if/else logic defects\n" . "$herectx");
+				} elsif ($dstat =~ /;/) {
+					ERROR("MULTISTATEMENT_MACRO_USE_DO_WHILE",
+					      "Macros with multiple statements should be enclosed in a do - while loop\n" . "$herectx");
+				} else {
+					ERROR("COMPLEX_MACRO",
+					      "Macros with complex values should be enclosed in parentheses\n" . "$herectx");
+				}
+
+			}
+
+			# Make $define_stmt single line, comment-free, etc
+			my @stmt_array = split('\n', $define_stmt);
+			my $first = 1;
+			$define_stmt = "";
+			foreach my $l (@stmt_array) {
+				$l =~ s/\\$//;
+				if ($first) {
+					$define_stmt = $l;
+					$first = 0;
+				} elsif ($l =~ /^[\+ ]/) {
+					$define_stmt .= substr($l, 1);
+				}
+			}
+			$define_stmt =~ s/$;//g;
+			$define_stmt =~ s/\s+/ /g;
+			$define_stmt = trim($define_stmt);
+
+# check if any macro arguments are reused (ignore '...' and 'type')
+			foreach my $arg (@def_args) {
+			        next if ($arg =~ /\.\.\./);
+			        next if ($arg =~ /^type$/i);
+				my $tmp_stmt = $define_stmt;
+				$tmp_stmt =~ s/\b(typeof|__typeof__|__builtin\w+|typecheck\s*\(\s*$Type\s*,|\#+)\s*\(*\s*$arg\s*\)*\b//g;
+				$tmp_stmt =~ s/\#+\s*$arg\b//g;
+				$tmp_stmt =~ s/\b$arg\s*\#\#//g;
+				my $use_cnt = $tmp_stmt =~ s/\b$arg\b//g;
+				if ($use_cnt > 1) {
+					CHK("MACRO_ARG_REUSE",
+					    "Macro argument reuse '$arg' - possible side-effects?\n" . "$herectx");
+				    }
+# check if any macro arguments may have other precedence issues
+				if ($tmp_stmt =~ m/($Operators)?\s*\b$arg\b\s*($Operators)?/m &&
+				    ((defined($1) && $1 ne ',') ||
+				     (defined($2) && $2 ne ','))) {
+					CHK("MACRO_ARG_PRECEDENCE",
+					    "Macro argument '$arg' may be better as '($arg)' to avoid precedence issues\n" . "$herectx");
+				}
+			}
+
+# check for macros with flow control, but without ## concatenation
+# ## concatenation is commonly a macro that defines a function so ignore those
+			if ($has_flow_statement && !$has_arg_concat) {
 				my $herectx = $here . "\n";
 				my $cnt = statement_rawlines($ctx);
 
 				for (my $n = 0; $n < $cnt; $n++) {
 					$herectx .= raw_line($linenr, $n) . "\n";
 				}
-
-				if ($dstat =~ /;/) {
-					ERROR("MULTISTATEMENT_MACRO_USE_DO_WHILE",
-					      "Macros with multiple statements should be enclosed in a do - while loop\n" . "$herectx");
-				} else {
-					ERROR("COMPLEX_MACRO",
-					      "Macros with complex values should be enclosed in parenthesis\n" . "$herectx");
-				}
+				WARN("MACRO_WITH_FLOW_CONTROL",
+				     "Macros with flow control statements should be avoided\n" . "$herectx");
 			}
 
 # check for line continuations outside of #defines, preprocessor #, and asm
@@ -3761,6 +4998,7 @@ sub process {
 			$ctx = $dstat;
 
 			$dstat =~ s/\\\n.//g;
+			$dstat =~ s/$;/ /g;
 
 			if ($dstat =~ /^\+\s*#\s*define\s+$Ident\s*${balanced_parens}\s*do\s*{(.*)\s*}\s*while\s*\(\s*0\s*\)\s*([;\s]*)\s*$/) {
 				my $stmts = $2;
@@ -3783,6 +5021,17 @@ sub process {
 					WARN("DO_WHILE_MACRO_WITH_TRAILING_SEMICOLON",
 					     "do {} while (0) macros should not be semicolon terminated\n" . "$herectx");
 				}
+			} elsif ($dstat =~ /^\+\s*#\s*define\s+$Ident.*;\s*$/) {
+				$ctx =~ s/\n*$//;
+				my $cnt = statement_rawlines($ctx);
+				my $herectx = $here . "\n";
+
+				for (my $n = 0; $n < $cnt; $n++) {
+					$herectx .= raw_line($linenr, $n) . "\n";
+				}
+
+				WARN("TRAILING_SEMICOLON",
+				     "macros should not use a trailing semicolon\n" . "$herectx");
 			}
 		}
 
@@ -3914,21 +5163,137 @@ sub process {
 			}
 		}
 
+# check for single line unbalanced braces
+		if ($sline =~ /^.\s*\}\s*else\s*$/ ||
+		    $sline =~ /^.\s*else\s*\{\s*$/) {
+			CHK("BRACES", "Unbalanced braces around else statement\n" . $herecurr);
+		}
+
 # check for unnecessary blank lines around braces
 		if (($line =~ /^.\s*}\s*$/ && $prevrawline =~ /^.\s*$/)) {
-			CHK("BRACES",
-			    "Blank lines aren't necessary before a close brace '}'\n" . $hereprev);
+			if (CHK("BRACES",
+				"Blank lines aren't necessary before a close brace '}'\n" . $hereprev) &&
+			    $fix && $prevrawline =~ /^\+/) {
+				fix_delete_line($fixlinenr - 1, $prevrawline);
+			}
 		}
 		if (($rawline =~ /^.\s*$/ && $prevline =~ /^..*{\s*$/)) {
-			CHK("BRACES",
-			    "Blank lines aren't necessary after an open brace '{'\n" . $hereprev);
+			if (CHK("BRACES",
+				"Blank lines aren't necessary after an open brace '{'\n" . $hereprev) &&
+			    $fix) {
+				fix_delete_line($fixlinenr, $rawline);
+			}
 		}
 
 # no volatiles please
 		my $asm_volatile = qr{\b(__asm__|asm)\s+(__volatile__|volatile)\b};
 		if ($line =~ /\bvolatile\b/ && $line !~ /$asm_volatile/) {
 			WARN("VOLATILE",
-			     "Use of volatile is usually wrong: see Documentation/volatile-considered-harmful.txt\n" . $herecurr);
+			     "Use of volatile is usually wrong: see Documentation/process/volatile-considered-harmful.rst\n" . $herecurr);
+		}
+
+# Check for user-visible strings broken across lines, which breaks the ability
+# to grep for the string.  Make exceptions when the previous string ends in a
+# newline (multiple lines in one string constant) or '\t', '\r', ';', or '{'
+# (common in inline assembly) or is a octal \123 or hexadecimal \xaf value
+		if ($line =~ /^\+\s*$String/ &&
+		    $prevline =~ /"\s*$/ &&
+		    $prevrawline !~ /(?:\\(?:[ntr]|[0-7]{1,3}|x[0-9a-fA-F]{1,2})|;\s*|\{\s*)"\s*$/) {
+			if (WARN("SPLIT_STRING",
+				 "quoted string split across lines\n" . $hereprev) &&
+				     $fix &&
+				     $prevrawline =~ /^\+.*"\s*$/ &&
+				     $last_coalesced_string_linenr != $linenr - 1) {
+				my $extracted_string = get_quoted_string($line, $rawline);
+				my $comma_close = "";
+				if ($rawline =~ /\Q$extracted_string\E(\s*\)\s*;\s*$|\s*,\s*)/) {
+					$comma_close = $1;
+				}
+
+				fix_delete_line($fixlinenr - 1, $prevrawline);
+				fix_delete_line($fixlinenr, $rawline);
+				my $fixedline = $prevrawline;
+				$fixedline =~ s/"\s*$//;
+				$fixedline .= substr($extracted_string, 1) . trim($comma_close);
+				fix_insert_line($fixlinenr - 1, $fixedline);
+				$fixedline = $rawline;
+				$fixedline =~ s/\Q$extracted_string\E\Q$comma_close\E//;
+				if ($fixedline !~ /\+\s*$/) {
+					fix_insert_line($fixlinenr, $fixedline);
+				}
+				$last_coalesced_string_linenr = $linenr;
+			}
+		}
+
+# check for missing a space in a string concatenation
+		if ($prevrawline =~ /[^\\]\w"$/ && $rawline =~ /^\+[\t ]+"\w/) {
+			WARN('MISSING_SPACE',
+			     "break quoted strings at a space character\n" . $hereprev);
+		}
+
+# check for an embedded function name in a string when the function is known
+# This does not work very well for -f --file checking as it depends on patch
+# context providing the function name or a single line form for in-file
+# function declarations
+		if ($line =~ /^\+.*$String/ &&
+		    defined($context_function) &&
+		    get_quoted_string($line, $rawline) =~ /\b$context_function\b/ &&
+		    length(get_quoted_string($line, $rawline)) != (length($context_function) + 2)) {
+			WARN("EMBEDDED_FUNCTION_NAME",
+			     "Prefer using '\"%s...\", __func__' to using '$context_function', this function's name, in a string\n" . $herecurr);
+		}
+
+# check for spaces before a quoted newline
+		if ($rawline =~ /^.*\".*\s\\n/) {
+			if (WARN("QUOTED_WHITESPACE_BEFORE_NEWLINE",
+				 "unnecessary whitespace before a quoted newline\n" . $herecurr) &&
+			    $fix) {
+				$fixed[$fixlinenr] =~ s/^(\+.*\".*)\s+\\n/$1\\n/;
+			}
+
+		}
+
+# concatenated string without spaces between elements
+		if ($line =~ /$String[A-Z_]/ || $line =~ /[A-Za-z0-9_]$String/) {
+			CHK("CONCATENATED_STRING",
+			    "Concatenated strings should use spaces between elements\n" . $herecurr);
+		}
+
+# uncoalesced string fragments
+		if ($line =~ /$String\s*"/) {
+			WARN("STRING_FRAGMENTS",
+			     "Consecutive strings are generally better as a single string\n" . $herecurr);
+		}
+
+# check for non-standard and hex prefixed decimal printf formats
+		my $show_L = 1;	#don't show the same defect twice
+		my $show_Z = 1;
+		while ($line =~ /(?:^|")([X\t]*)(?:"|$)/g) {
+			my $string = substr($rawline, $-[1], $+[1] - $-[1]);
+			$string =~ s/%%/__/g;
+			# check for %L
+			if ($show_L && $string =~ /%[\*\d\.\$]*L([diouxX])/) {
+				WARN("PRINTF_L",
+				     "\%L$1 is non-standard C, use %ll$1\n" . $herecurr);
+				$show_L = 0;
+			}
+			# check for %Z
+			if ($show_Z && $string =~ /%[\*\d\.\$]*Z([diouxX])/) {
+				WARN("PRINTF_Z",
+				     "%Z$1 is non-standard C, use %z$1\n" . $herecurr);
+				$show_Z = 0;
+			}
+			# check for 0x<decimal>
+			if ($string =~ /0x%[\*\d\.\$\Llzth]*[diou]/) {
+				ERROR("PRINTF_0XDECIMAL",
+				      "Prefixing 0x with decimal output is defective\n" . $herecurr);
+			}
+		}
+
+# check for line continuations in quoted strings with odd counts of "
+		if ($rawline =~ /\\$/ && $rawline =~ tr/"/"/ % 2) {
+			WARN("LINE_CONTINUATIONS",
+			     "Avoid line continuations in quoted strings\n" . $herecurr);
 		}
 
 # warn about #if 0
@@ -3940,10 +5305,90 @@ sub process {
 
 # check for needless "if (<foo>) fn(<foo>)" uses
 		if ($prevline =~ /\bif\s*\(\s*($Lval)\s*\)/) {
-			my $expr = '\s*\(\s*' . quotemeta($1) . '\s*\)\s*;';
-			if ($line =~ /\b(kfree|usb_free_urb|debugfs_remove(?:_recursive)?)$expr/) {
-				WARN('NEEDLESS_IF',
-				     "$1(NULL) is safe this check is probably not required\n" . $hereprev);
+			my $tested = quotemeta($1);
+			my $expr = '\s*\(\s*' . $tested . '\s*\)\s*;';
+			if ($line =~ /\b(kfree|usb_free_urb|debugfs_remove(?:_recursive)?|(?:kmem_cache|mempool|dma_pool)_destroy)$expr/) {
+				my $func = $1;
+				if (WARN('NEEDLESS_IF',
+					 "$func(NULL) is safe and this check is probably not required\n" . $hereprev) &&
+				    $fix) {
+					my $do_fix = 1;
+					my $leading_tabs = "";
+					my $new_leading_tabs = "";
+					if ($lines[$linenr - 2] =~ /^\+(\t*)if\s*\(\s*$tested\s*\)\s*$/) {
+						$leading_tabs = $1;
+					} else {
+						$do_fix = 0;
+					}
+					if ($lines[$linenr - 1] =~ /^\+(\t+)$func\s*\(\s*$tested\s*\)\s*;\s*$/) {
+						$new_leading_tabs = $1;
+						if (length($leading_tabs) + 1 ne length($new_leading_tabs)) {
+							$do_fix = 0;
+						}
+					} else {
+						$do_fix = 0;
+					}
+					if ($do_fix) {
+						fix_delete_line($fixlinenr - 1, $prevrawline);
+						$fixed[$fixlinenr] =~ s/^\+$new_leading_tabs/\+$leading_tabs/;
+					}
+				}
+			}
+		}
+
+# check for unnecessary "Out of Memory" messages
+		if ($line =~ /^\+.*\b$logFunctions\s*\(/ &&
+		    $prevline =~ /^[ \+]\s*if\s*\(\s*(\!\s*|NULL\s*==\s*)?($Lval)(\s*==\s*NULL\s*)?\s*\)/ &&
+		    (defined $1 || defined $3) &&
+		    $linenr > 3) {
+			my $testval = $2;
+			my $testline = $lines[$linenr - 3];
+
+			my ($s, $c) = ctx_statement_block($linenr - 3, $realcnt, 0);
+#			print("line: <$line>\nprevline: <$prevline>\ns: <$s>\nc: <$c>\n\n\n");
+
+			if ($s =~ /(?:^|\n)[ \+]\s*(?:$Type\s*)?\Q$testval\E\s*=\s*(?:\([^\)]*\)\s*)?\s*(?:devm_)?(?:[kv][czm]alloc(?:_node|_array)?\b|kstrdup|kmemdup|(?:dev_)?alloc_skb)/) {
+				WARN("OOM_MESSAGE",
+				     "Possible unnecessary 'out of memory' message\n" . $hereprev);
+			}
+		}
+
+# check for logging functions with KERN_<LEVEL>
+		if ($line !~ /printk(?:_ratelimited|_once)?\s*\(/ &&
+		    $line =~ /\b$logFunctions\s*\(.*\b(KERN_[A-Z]+)\b/) {
+			my $level = $1;
+			if (WARN("UNNECESSARY_KERN_LEVEL",
+				 "Possible unnecessary $level\n" . $herecurr) &&
+			    $fix) {
+				$fixed[$fixlinenr] =~ s/\s*$level\s*//;
+			}
+		}
+
+# check for logging continuations
+		if ($line =~ /\bprintk\s*\(\s*KERN_CONT\b|\bpr_cont\s*\(/) {
+			WARN("LOGGING_CONTINUATION",
+			     "Avoid logging continuation uses where feasible\n" . $herecurr);
+		}
+
+# check for mask then right shift without a parentheses
+		if ($^V && $^V ge 5.10.0 &&
+		    $line =~ /$LvalOrFunc\s*\&\s*($LvalOrFunc)\s*>>/ &&
+		    $4 !~ /^\&/) { # $LvalOrFunc may be &foo, ignore if so
+			WARN("MASK_THEN_SHIFT",
+			     "Possible precedence defect with mask then right shift - may need parentheses\n" . $herecurr);
+		}
+
+# check for pointer comparisons to NULL
+		if ($^V && $^V ge 5.10.0) {
+			while ($line =~ /\b$LvalOrFunc\s*(==|\!=)\s*NULL\b/g) {
+				my $val = $1;
+				my $equal = "!";
+				$equal = "" if ($4 eq "!=");
+				if (CHK("COMPARISON_TO_NULL",
+					"Comparison to NULL could be written \"${equal}${val}\"\n" . $herecurr) &&
+					    $fix) {
+					$fixed[$fixlinenr] =~ s/\b\Q$val\E\s*(?:==|\!=)\s*NULL\b/$equal$val/;
+				}
 			}
 		}
 
@@ -3960,7 +5405,7 @@ sub process {
 				      WARN("MISPLACED_INIT",
 					   "$attr should be placed after $var\n" . $herecurr))) &&
 				    $fix) {
-					$fixed[$linenr - 1] =~ s/(\bstatic\s+(?:const\s+)?)(?:$attr\s+)?($NonptrTypeWithAttr)\s+(?:$attr\s+)?($Ident(?:\[[^]]*\])?)\s*([=;])\s*/"$1" . trim(string_find_replace($2, "\\s*$attr\\s*", " ")) . " " . trim(string_find_replace($3, "\\s*$attr\\s*", "")) . " $attr" . ("$4" eq ";" ? ";" : " = ")/e;
+					$fixed[$fixlinenr] =~ s/(\bstatic\s+(?:const\s+)?)(?:$attr\s+)?($NonptrTypeWithAttr)\s+(?:$attr\s+)?($Ident(?:\[[^]]*\])?)\s*([=;])\s*/"$1" . trim(string_find_replace($2, "\\s*$attr\\s*", " ")) . " " . trim(string_find_replace($3, "\\s*$attr\\s*", "")) . " $attr" . ("$4" eq ";" ? ";" : " = ")/e;
 				}
 			}
 		}
@@ -3974,7 +5419,7 @@ sub process {
 			if (ERROR("INIT_ATTRIBUTE",
 				  "Use of const init definition must use ${attr_prefix}initconst\n" . $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~
+				$fixed[$fixlinenr] =~
 				    s/$InitAttributeData/${attr_prefix}initconst/;
 			}
 		}
@@ -3985,21 +5430,49 @@ sub process {
 			if (ERROR("INIT_ATTRIBUTE",
 				  "Use of $attr requires a separate use of const\n" . $herecurr) &&
 			    $fix) {
-				my $lead = $fixed[$linenr - 1] =~
+				my $lead = $fixed[$fixlinenr] =~
 				    /(^\+\s*(?:static\s+))/;
 				$lead = rtrim($1);
 				$lead = "$lead " if ($lead !~ /^\+$/);
 				$lead = "${lead}const ";
-				$fixed[$linenr - 1] =~ s/(^\+\s*(?:static\s+))/$lead/;
+				$fixed[$fixlinenr] =~ s/(^\+\s*(?:static\s+))/$lead/;
+			}
+		}
+
+# check for __read_mostly with const non-pointer (should just be const)
+		if ($line =~ /\b__read_mostly\b/ &&
+		    $line =~ /($Type)\s*$Ident/ && $1 !~ /\*\s*$/ && $1 =~ /\bconst\b/) {
+			if (ERROR("CONST_READ_MOSTLY",
+				  "Invalid use of __read_mostly with const type\n" . $herecurr) &&
+			    $fix) {
+				$fixed[$fixlinenr] =~ s/\s+__read_mostly\b//;
+			}
+		}
+
+# don't use __constant_<foo> functions outside of include/uapi/
+		if ($realfile !~ m@^include/uapi/@ &&
+		    $line =~ /(__constant_(?:htons|ntohs|[bl]e(?:16|32|64)_to_cpu|cpu_to_[bl]e(?:16|32|64)))\s*\(/) {
+			my $constant_func = $1;
+			my $func = $constant_func;
+			$func =~ s/^__constant_//;
+			if (WARN("CONSTANT_CONVERSION",
+				 "$constant_func should be $func\n" . $herecurr) &&
+			    $fix) {
+				$fixed[$fixlinenr] =~ s/\b$constant_func\b/$func/g;
 			}
 		}
 
 # prefer usleep_range over udelay
 		if ($line =~ /\budelay\s*\(\s*(\d+)\s*\)/) {
+			my $delay = $1;
 			# ignore udelay's < 10, however
-			if (! ($1 < 10) ) {
+			if (! ($delay < 10) ) {
 				CHK("USLEEP_RANGE",
-				    "usleep_range is preferred over udelay; see Documentation/timers/timers-howto.txt\n" . $line);
+				    "usleep_range is preferred over udelay; see Documentation/timers/timers-howto.txt\n" . $herecurr);
+			}
+			if ($delay > 2000) {
+				WARN("LONG_UDELAY",
+				     "long udelay - prefer mdelay; see arch/arm/include/asm/delay.h\n" . $herecurr);
 			}
 		}
 
@@ -4007,7 +5480,7 @@ sub process {
 		if ($line =~ /\bmsleep\s*\((\d+)\);/) {
 			if ($1 < 20) {
 				WARN("MSLEEP",
-				     "msleep < 20ms can sleep for up to 20ms; see Documentation/timers/timers-howto.txt\n" . $line);
+				     "msleep < 20ms can sleep for up to 20ms; see Documentation/timers/timers-howto.txt\n" . $herecurr);
 			}
 		}
 
@@ -4035,7 +5508,7 @@ sub process {
 			if (ERROR("SPACING",
 				  "exactly one space required after that #$1\n" . $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~
+				$fixed[$fixlinenr] =~
 				    s/^(.\s*\#\s*(ifdef|ifndef|elif))\s{2,}/$1 /;
 			}
 
@@ -4051,22 +5524,70 @@ sub process {
 			}
 		}
 # check for memory barriers without a comment.
-		if ($line =~ /\b(mb|rmb|wmb|read_barrier_depends|smp_mb|smp_rmb|smp_wmb|smp_read_barrier_depends)\(/) {
+
+		my $barriers = qr{
+			mb|
+			rmb|
+			wmb|
+			read_barrier_depends
+		}x;
+		my $barrier_stems = qr{
+			mb__before_atomic|
+			mb__after_atomic|
+			store_release|
+			load_acquire|
+			store_mb|
+			(?:$barriers)
+		}x;
+		my $all_barriers = qr{
+			(?:$barriers)|
+			smp_(?:$barrier_stems)|
+			virt_(?:$barrier_stems)
+		}x;
+
+		if ($line =~ /\b(?:$all_barriers)\s*\(/) {
 			if (!ctx_has_comment($first_line, $linenr)) {
 				WARN("MEMORY_BARRIER",
 				     "memory barrier without comment\n" . $herecurr);
 			}
 		}
+
+		my $underscore_smp_barriers = qr{__smp_(?:$barrier_stems)}x;
+
+		if ($realfile !~ m@^include/asm-generic/@ &&
+		    $realfile !~ m@/barrier\.h$@ &&
+		    $line =~ m/\b(?:$underscore_smp_barriers)\s*\(/ &&
+		    $line !~ m/^.\s*\#\s*define\s+(?:$underscore_smp_barriers)\s*\(/) {
+			WARN("MEMORY_BARRIER",
+			     "__smp memory barriers shouldn't be used outside barrier.h and asm-generic\n" . $herecurr);
+		}
+
+# check for waitqueue_active without a comment.
+		if ($line =~ /\bwaitqueue_active\s*\(/) {
+			if (!ctx_has_comment($first_line, $linenr)) {
+				WARN("WAITQUEUE_ACTIVE",
+				     "waitqueue_active without comment\n" . $herecurr);
+			}
+		}
+
 # check of hardware specific defines
 		if ($line =~ m@^.\s*\#\s*if.*\b(__i386__|__powerpc64__|__sun__|__s390x__)\b@ && $realfile !~ m@include/asm-@) {
 			CHK("ARCH_DEFINES",
 			    "architecture specific defines should be avoided\n" .  $herecurr);
 		}
 
+# check that the storage class is not after a type
+		if ($line =~ /\b($Type)\s+($Storage)\b/) {
+			WARN("STORAGE_CLASS",
+			     "storage class '$2' should be located before type '$1'\n" . $herecurr);
+		}
 # Check that the storage class is at the beginning of a declaration
-		if ($line =~ /\b$Storage\b/ && $line !~ /^.\s*$Storage\b/) {
+		if ($line =~ /\b$Storage\b/ &&
+		    $line !~ /^.\s*$Storage/ &&
+		    $line =~ /^.\s*(.+?)\$Storage\s/ &&
+		    $1 !~ /[\,\)]\s*$/) {
 			WARN("STORAGE_CLASS",
-			     "storage class should be at the beginning of the declaration\n" . $herecurr)
+			     "storage class should be at the beginning of the declaration\n" . $herecurr);
 		}
 
 # check the location of the inline attribute, that it is between
@@ -4083,7 +5604,7 @@ sub process {
 			if (WARN("INLINE",
 				 "plain inline is preferred over $1\n" . $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~ s/\b(__inline__|__inline)\b/inline/;
+				$fixed[$fixlinenr] =~ s/\b(__inline__|__inline)\b/inline/;
 
 			}
 		}
@@ -4094,11 +5615,6 @@ sub process {
 			WARN("PREFER_PACKED",
 			     "__packed is preferred over __attribute__((packed))\n" . $herecurr);
 		}
-# Check for new packed members, warn to use care
-		if ($line =~ /\b(__attribute__\s*\(\s*\(.*\bpacked|__packed)\b/) {
-			WARN("NEW_PACKED",
-			     "Adding new packed members is to be done with care\n" . $herecurr);
-		}
 
 # Check for __attribute__ aligned, prefer __aligned
 		if ($realfile !~ m@\binclude/uapi/@ &&
@@ -4113,7 +5629,7 @@ sub process {
 			if (WARN("PREFER_PRINTF",
 				 "__printf(string-index, first-to-check) is preferred over __attribute__((format(printf, string-index, first-to-check)))\n" . $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~ s/\b__attribute__\s*\(\s*\(\s*format\s*\(\s*printf\s*,\s*(.*)\)\s*\)\s*\)/"__printf(" . trim($1) . ")"/ex;
+				$fixed[$fixlinenr] =~ s/\b__attribute__\s*\(\s*\(\s*format\s*\(\s*printf\s*,\s*(.*)\)\s*\)\s*\)/"__printf(" . trim($1) . ")"/ex;
 
 			}
 		}
@@ -4124,7 +5640,55 @@ sub process {
 			if (WARN("PREFER_SCANF",
 				 "__scanf(string-index, first-to-check) is preferred over __attribute__((format(scanf, string-index, first-to-check)))\n" . $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~ s/\b__attribute__\s*\(\s*\(\s*format\s*\(\s*scanf\s*,\s*(.*)\)\s*\)\s*\)/"__scanf(" . trim($1) . ")"/ex;
+				$fixed[$fixlinenr] =~ s/\b__attribute__\s*\(\s*\(\s*format\s*\(\s*scanf\s*,\s*(.*)\)\s*\)\s*\)/"__scanf(" . trim($1) . ")"/ex;
+			}
+		}
+
+# Check for __attribute__ weak, or __weak declarations (may have link issues)
+		if ($^V && $^V ge 5.10.0 &&
+		    $line =~ /(?:$Declare|$DeclareMisordered)\s*$Ident\s*$balanced_parens\s*(?:$Attribute)?\s*;/ &&
+		    ($line =~ /\b__attribute__\s*\(\s*\(.*\bweak\b/ ||
+		     $line =~ /\b__weak\b/)) {
+			ERROR("WEAK_DECLARATION",
+			      "Using weak declarations can have unintended link defects\n" . $herecurr);
+		}
+
+# check for c99 types like uint8_t used outside of uapi/ and tools/
+		if ($realfile !~ m@\binclude/uapi/@ &&
+		    $realfile !~ m@\btools/@ &&
+		    $line =~ /\b($Declare)\s*$Ident\s*[=;,\[]/) {
+			my $type = $1;
+			if ($type =~ /\b($typeC99Typedefs)\b/) {
+				$type = $1;
+				my $kernel_type = 'u';
+				$kernel_type = 's' if ($type =~ /^_*[si]/);
+				$type =~ /(\d+)/;
+				$kernel_type .= $1;
+				if (CHK("PREFER_KERNEL_TYPES",
+					"Prefer kernel type '$kernel_type' over '$type'\n" . $herecurr) &&
+				    $fix) {
+					$fixed[$fixlinenr] =~ s/\b$type\b/$kernel_type/;
+				}
+			}
+		}
+
+# check for cast of C90 native int or longer types constants
+		if ($line =~ /(\(\s*$C90_int_types\s*\)\s*)($Constant)\b/) {
+			my $cast = $1;
+			my $const = $2;
+			if (WARN("TYPECAST_INT_CONSTANT",
+				 "Unnecessary typecast of c90 int constant\n" . $herecurr) &&
+			    $fix) {
+				my $suffix = "";
+				my $newconst = $const;
+				$newconst =~ s/${Int_type}$//;
+				$suffix .= 'U' if ($cast =~ /\bunsigned\b/);
+				if ($cast =~ /\blong\s+long\b/) {
+					$suffix .= 'LL';
+				} elsif ($cast =~ /\blong\b/) {
+					$suffix .= 'L';
+				}
+				$fixed[$fixlinenr] =~ s/\Q$cast\E$const\b/$newconst$suffix/;
 			}
 		}
 
@@ -4139,16 +5703,10 @@ sub process {
 			if (WARN("SIZEOF_PARENTHESIS",
 				 "sizeof $1 should be sizeof($1)\n" . $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~ s/\bsizeof\s+((?:\*\s*|)$Lval|$Type(?:\s+$Lval|))/"sizeof(" . trim($1) . ")"/ex;
+				$fixed[$fixlinenr] =~ s/\bsizeof\s+((?:\*\s*|)$Lval|$Type(?:\s+$Lval|))/"sizeof(" . trim($1) . ")"/ex;
 			}
 		}
 
-# check for line continuations in quoted strings with odd counts of "
-		if ($rawline =~ /\\$/ && $rawline =~ tr/"/"/ % 2) {
-			WARN("LINE_CONTINUATIONS",
-			     "Avoid line continuations in quoted strings\n" . $herecurr);
-		}
-
 # check for struct spinlock declarations
 		if ($line =~ /^.\s*\bstruct\s+spinlock\s+\w+\s*;/) {
 			WARN("USE_SPINLOCK_T",
@@ -4158,19 +5716,46 @@ sub process {
 # check for seq_printf uses that could be seq_puts
 		if ($sline =~ /\bseq_printf\s*\(.*"\s*\)\s*;\s*$/) {
 			my $fmt = get_quoted_string($line, $rawline);
-			if ($fmt ne "" && $fmt !~ /[^\\]\%/) {
+			$fmt =~ s/%%//g;
+			if ($fmt !~ /%/) {
 				if (WARN("PREFER_SEQ_PUTS",
 					 "Prefer seq_puts to seq_printf\n" . $herecurr) &&
 				    $fix) {
-					$fixed[$linenr - 1] =~ s/\bseq_printf\b/seq_puts/;
+					$fixed[$fixlinenr] =~ s/\bseq_printf\b/seq_puts/;
+				}
+			}
+		}
+
+		# check for vsprintf extension %p<foo> misuses
+		if ($^V && $^V ge 5.10.0 &&
+		    defined $stat &&
+		    $stat =~ /^\+(?![^\{]*\{\s*).*\b(\w+)\s*\(.*$String\s*,/s &&
+		    $1 !~ /^_*volatile_*$/) {
+			my $bad_extension = "";
+			my $lc = $stat =~ tr@\n@@;
+			$lc = $lc + $linenr;
+		        for (my $count = $linenr; $count <= $lc; $count++) {
+				my $fmt = get_quoted_string($lines[$count - 1], raw_line($count, 0));
+				$fmt =~ s/%%//g;
+				if ($fmt =~ /(\%[\*\d\.]*p(?![\WFfSsBKRraEhMmIiUDdgVCbGNO]).)/) {
+					$bad_extension = $1;
+					last;
 				}
 			}
+			if ($bad_extension ne "") {
+				my $stat_real = raw_line($linenr, 0);
+				for (my $count = $linenr + 1; $count <= $lc; $count++) {
+					$stat_real = $stat_real . "\n" . raw_line($count, 0);
+				}
+				WARN("VSPRINTF_POINTER_EXTENSION",
+				     "Invalid vsprintf pointer extension '$bad_extension'\n" . "$here\n$stat_real\n");
+			}
 		}
 
 # Check for misused memsets
 		if ($^V && $^V ge 5.10.0 &&
 		    defined $stat &&
-		    $stat =~ /^\+(?:.*?)\bmemset\s*\(\s*$FuncArg\s*,\s*$FuncArg\s*\,\s*$FuncArg\s*\)/s) {
+		    $stat =~ /^\+(?:.*?)\bmemset\s*\(\s*$FuncArg\s*,\s*$FuncArg\s*\,\s*$FuncArg\s*\)/) {
 
 			my $ms_addr = $2;
 			my $ms_val = $7;
@@ -4186,14 +5771,46 @@ sub process {
 		}
 
 # Check for memcpy(foo, bar, ETH_ALEN) that could be ether_addr_copy(foo, bar)
-		if ($^V && $^V ge 5.10.0 &&
-		    $line =~ /^\+(?:.*?)\bmemcpy\s*\(\s*$FuncArg\s*,\s*$FuncArg\s*\,\s*ETH_ALEN\s*\)/s) {
-			if (WARN("PREFER_ETHER_ADDR_COPY",
-				 "Prefer ether_addr_copy() over memcpy() if the Ethernet addresses are __aligned(2)\n" . $herecurr) &&
-			    $fix) {
-				$fixed[$linenr - 1] =~ s/\bmemcpy\s*\(\s*$FuncArg\s*,\s*$FuncArg\s*\,\s*ETH_ALEN\s*\)/ether_addr_copy($2, $7)/;
-			}
-		}
+#		if ($^V && $^V ge 5.10.0 &&
+#		    defined $stat &&
+#		    $stat =~ /^\+(?:.*?)\bmemcpy\s*\(\s*$FuncArg\s*,\s*$FuncArg\s*\,\s*ETH_ALEN\s*\)/) {
+#			if (WARN("PREFER_ETHER_ADDR_COPY",
+#				 "Prefer ether_addr_copy() over memcpy() if the Ethernet addresses are __aligned(2)\n" . "$here\n$stat\n") &&
+#			    $fix) {
+#				$fixed[$fixlinenr] =~ s/\bmemcpy\s*\(\s*$FuncArg\s*,\s*$FuncArg\s*\,\s*ETH_ALEN\s*\)/ether_addr_copy($2, $7)/;
+#			}
+#		}
+
+# Check for memcmp(foo, bar, ETH_ALEN) that could be ether_addr_equal*(foo, bar)
+#		if ($^V && $^V ge 5.10.0 &&
+#		    defined $stat &&
+#		    $stat =~ /^\+(?:.*?)\bmemcmp\s*\(\s*$FuncArg\s*,\s*$FuncArg\s*\,\s*ETH_ALEN\s*\)/) {
+#			WARN("PREFER_ETHER_ADDR_EQUAL",
+#			     "Prefer ether_addr_equal() or ether_addr_equal_unaligned() over memcmp()\n" . "$here\n$stat\n")
+#		}
+
+# check for memset(foo, 0x0, ETH_ALEN) that could be eth_zero_addr
+# check for memset(foo, 0xFF, ETH_ALEN) that could be eth_broadcast_addr
+#		if ($^V && $^V ge 5.10.0 &&
+#		    defined $stat &&
+#		    $stat =~ /^\+(?:.*?)\bmemset\s*\(\s*$FuncArg\s*,\s*$FuncArg\s*\,\s*ETH_ALEN\s*\)/) {
+#
+#			my $ms_val = $7;
+#
+#			if ($ms_val =~ /^(?:0x|)0+$/i) {
+#				if (WARN("PREFER_ETH_ZERO_ADDR",
+#					 "Prefer eth_zero_addr over memset()\n" . "$here\n$stat\n") &&
+#				    $fix) {
+#					$fixed[$fixlinenr] =~ s/\bmemset\s*\(\s*$FuncArg\s*,\s*$FuncArg\s*,\s*ETH_ALEN\s*\)/eth_zero_addr($2)/;
+#				}
+#			} elsif ($ms_val =~ /^(?:0xff|255)$/i) {
+#				if (WARN("PREFER_ETH_BROADCAST_ADDR",
+#					 "Prefer eth_broadcast_addr() over memset()\n" . "$here\n$stat\n") &&
+#				    $fix) {
+#					$fixed[$fixlinenr] =~ s/\bmemset\s*\(\s*$FuncArg\s*,\s*$FuncArg\s*,\s*ETH_ALEN\s*\)/eth_broadcast_addr($2)/;
+#				}
+#			}
+#		}
 
 # typecasts on min/max could be min_t/max_t
 		if ($^V && $^V ge 5.10.0 &&
@@ -4238,7 +5855,7 @@ sub process {
 # check for naked sscanf
 		if ($^V && $^V ge 5.10.0 &&
 		    defined $stat &&
-		    $stat =~ /\bsscanf\b/ &&
+		    $line =~ /\bsscanf\b/ &&
 		    ($stat !~ /$Ident\s*=\s*sscanf\s*$balanced_parens/ &&
 		     $stat !~ /\bsscanf\s*$balanced_parens\s*(?:$Compare)/ &&
 		     $stat !~ /(?:$Compare)\s*\bsscanf\s*$balanced_parens/)) {
@@ -4252,13 +5869,34 @@ sub process {
 			     "unchecked sscanf return value\n" . "$here\n$stat_real\n");
 		}
 
+# check for simple sscanf that should be kstrto<foo>
+		if ($^V && $^V ge 5.10.0 &&
+		    defined $stat &&
+		    $line =~ /\bsscanf\b/) {
+			my $lc = $stat =~ tr@\n@@;
+			$lc = $lc + $linenr;
+			my $stat_real = raw_line($linenr, 0);
+		        for (my $count = $linenr + 1; $count <= $lc; $count++) {
+				$stat_real = $stat_real . "\n" . raw_line($count, 0);
+			}
+			if ($stat_real =~ /\bsscanf\b\s*\(\s*$FuncArg\s*,\s*("[^"]+")/) {
+				my $format = $6;
+				my $count = $format =~ tr@%@%@;
+				if ($count == 1 &&
+				    $format =~ /^"\%(?i:ll[udxi]|[udxi]ll|ll|[hl]h?[udxi]|[udxi][hl]h?|[hl]h?|[udxi])"$/) {
+					WARN("SSCANF_TO_KSTRTO",
+					     "Prefer kstrto<type> to single variable sscanf\n" . "$here\n$stat_real\n");
+				}
+			}
+		}
+
 # check for new externs in .h files.
 		if ($realfile =~ /\.h$/ &&
 		    $line =~ /^\+\s*(extern\s+)$Type\s*$Ident\s*\(/s) {
 			if (CHK("AVOID_EXTERNS",
 				"extern prototypes should be avoided in .h files\n" . $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~ s/(.*)\bextern\b\s*(.*)/$1$2/;
+				$fixed[$fixlinenr] =~ s/(.*)\bextern\b\s*(.*)/$1$2/;
 			}
 		}
 
@@ -4292,13 +5930,50 @@ sub process {
 			     "externs should be avoided in .c files\n" .  $herecurr);
 		}
 
+# check for function declarations that have arguments without identifier names
+		if (defined $stat &&
+		    $stat =~ /^.\s*(?:extern\s+)?$Type\s*$Ident\s*\(\s*([^{]+)\s*\)\s*;/s &&
+		    $1 ne "void") {
+			my $args = trim($1);
+			while ($args =~ m/\s*($Type\s*(?:$Ident|\(\s*\*\s*$Ident?\s*\)\s*$balanced_parens)?)/g) {
+				my $arg = trim($1);
+				if ($arg =~ /^$Type$/ && $arg !~ /enum\s+$Ident$/) {
+					WARN("FUNCTION_ARGUMENTS",
+					     "function definition argument '$arg' should also have an identifier name\n" . $herecurr);
+				}
+			}
+		}
+
+# check for function definitions
+		if ($^V && $^V ge 5.10.0 &&
+		    defined $stat &&
+		    $stat =~ /^.\s*(?:$Storage\s+)?$Type\s*($Ident)\s*$balanced_parens\s*{/s) {
+			$context_function = $1;
+
+# check for multiline function definition with misplaced open brace
+			my $ok = 0;
+			my $cnt = statement_rawlines($stat);
+			my $herectx = $here . "\n";
+			for (my $n = 0; $n < $cnt; $n++) {
+				my $rl = raw_line($linenr, $n);
+				$herectx .=  $rl . "\n";
+				$ok = 1 if ($rl =~ /^[ \+]\{/);
+				$ok = 1 if ($rl =~ /\{/ && $n == 0);
+				last if $rl =~ /^[ \+].*\{/;
+			}
+			if (!$ok) {
+				ERROR("OPEN_BRACE",
+				      "open brace '{' following function definitions go on the next line\n" . $herectx);
+			}
+		}
+
 # checks for new __setup's
 		if ($rawline =~ /\b__setup\("([^"]*)"/) {
 			my $name = $1;
 
 			if (!grep(/$name/, @setup_docs)) {
 				CHK("UNDOCUMENTED_SETUP",
-				    "__setup appears un-documented -- check Documentation/kernel-parameters.txt\n" . $herecurr);
+				    "__setup appears un-documented -- check Documentation/admin-guide/kernel-parameters.rst\n" . $herecurr);
 			}
 		}
 
@@ -4316,6 +5991,38 @@ sub process {
 			    "Prefer $3(sizeof(*$1)...) over $3($4...)\n" . $herecurr);
 		}
 
+# check for k[mz]alloc with multiplies that could be kmalloc_array/kcalloc
+		if ($^V && $^V ge 5.10.0 &&
+		    defined $stat &&
+		    $stat =~ /^\+\s*($Lval)\s*\=\s*(?:$balanced_parens)?\s*(k[mz]alloc)\s*\(\s*($FuncArg)\s*\*\s*($FuncArg)\s*,/) {
+			my $oldfunc = $3;
+			my $a1 = $4;
+			my $a2 = $10;
+			my $newfunc = "kmalloc_array";
+			$newfunc = "kcalloc" if ($oldfunc eq "kzalloc");
+			my $r1 = $a1;
+			my $r2 = $a2;
+			if ($a1 =~ /^sizeof\s*\S/) {
+				$r1 = $a2;
+				$r2 = $a1;
+			}
+			if ($r1 !~ /^sizeof\b/ && $r2 =~ /^sizeof\s*\S/ &&
+			    !($r1 =~ /^$Constant$/ || $r1 =~ /^[A-Z_][A-Z0-9_]*$/)) {
+				my $ctx = '';
+				my $herectx = $here . "\n";
+				my $cnt = statement_rawlines($stat);
+				for (my $n = 0; $n < $cnt; $n++) {
+					$herectx .= raw_line($linenr, $n) . "\n";
+				}
+				if (WARN("ALLOC_WITH_MULTIPLY",
+					 "Prefer $newfunc over $oldfunc with multiply\n" . $herectx) &&
+				    $cnt == 1 &&
+				    $fix) {
+					$fixed[$fixlinenr] =~ s/\b($Lval)\s*\=\s*(?:$balanced_parens)?\s*(k[mz]alloc)\s*\(\s*($FuncArg)\s*\*\s*($FuncArg)/$1 . ' = ' . "$newfunc(" . trim($r1) . ', ' . trim($r2)/e;
+				}
+			}
+		}
+
 # check for krealloc arg reuse
 		if ($^V && $^V ge 5.10.0 &&
 		    $line =~ /\b($Lval)\s*\=\s*(?:$balanced_parens)?\s*krealloc\s*\(\s*\1\s*,/) {
@@ -4329,18 +6036,34 @@ sub process {
 			     "$1 uses number as first arg, sizeof is generally wrong\n" . $herecurr);
 		}
 
-# check for GFP_NOWAIT use
-		if ($line =~ /\b__GFP_NOFAIL\b/) {
-			WARN("__GFP_NOFAIL",
-			     "Use of __GFP_NOFAIL is deprecated, no new users should be added\n" . $herecurr);
-		}
-
 # check for multiple semicolons
 		if ($line =~ /;\s*;\s*$/) {
 			if (WARN("ONE_SEMICOLON",
 				 "Statements terminations use 1 semicolon\n" . $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~ s/(\s*;\s*){2,}$/;/g;
+				$fixed[$fixlinenr] =~ s/(\s*;\s*){2,}$/;/g;
+			}
+		}
+
+# check for #defines like: 1 << <digit> that could be BIT(digit), it is not exported to uapi
+		if ($realfile !~ m@^include/uapi/@ &&
+		    $line =~ /#\s*define\s+\w+\s+\(?\s*1\s*([ulUL]*)\s*\<\<\s*(?:\d+|$Ident)\s*\)?/) {
+			my $ull = "";
+			$ull = "_ULL" if (defined($1) && $1 =~ /ll/i);
+			if (CHK("BIT_MACRO",
+				"Prefer using the BIT$ull macro\n" . $herecurr) &&
+			    $fix) {
+				$fixed[$fixlinenr] =~ s/\(?\s*1\s*[ulUL]*\s*<<\s*(\d+|$Ident)\s*\)?/BIT${ull}($1)/;
+			}
+		}
+
+# check for #if defined CONFIG_<FOO> || defined CONFIG_<FOO>_MODULE
+		if ($line =~ /^\+\s*#\s*if\s+defined(?:\s*\(?\s*|\s+)(CONFIG_[A-Z_]+)\s*\)?\s*\|\|\s*defined(?:\s*\(?\s*|\s+)\1_MODULE\s*\)?\s*$/) {
+			my $config = $1;
+			if (WARN("PREFER_IS_ENABLED",
+				 "Prefer IS_ENABLED(<FOO>) to CONFIG_<FOO> || CONFIG_<FOO>_MODULE\n" . $herecurr) &&
+			    $fix) {
+				$fixed[$fixlinenr] = "\+#if IS_ENABLED($config)";
 			}
 		}
 
@@ -4350,7 +6073,7 @@ sub process {
 			my $has_statement = 0;
 			my $count = 0;
 			my $prevline = $linenr;
-			while ($prevline > 1 && $count < 3 && !$has_break) {
+			while ($prevline > 1 && ($file || $count < 3) && !$has_break) {
 				$prevline--;
 				my $rline = $rawlines[$prevline - 1];
 				my $fline = $lines[$prevline - 1];
@@ -4388,10 +6111,16 @@ sub process {
 			if (WARN("USE_FUNC",
 				 "__func__ should be used instead of gcc specific __FUNCTION__\n"  . $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~ s/\b__FUNCTION__\b/__func__/g;
+				$fixed[$fixlinenr] =~ s/\b__FUNCTION__\b/__func__/g;
 			}
 		}
 
+# check for uses of __DATE__, __TIME__, __TIMESTAMP__
+		while ($line =~ /\b(__(?:DATE|TIME|TIMESTAMP)__)\b/g) {
+			ERROR("DATE_TIME",
+			      "Use of the '$1' macro makes the build non-deterministic\n" . $herecurr);
+		}
+
 # check for use of yield()
 		if ($line =~ /\byield\s*\(\s*\)/) {
 			WARN("YIELD",
@@ -4437,55 +6166,18 @@ sub process {
 			     "$1 is obsolete, use k$3 instead\n" . $herecurr);
 		}
 
-# check for __initcall(), use device_initcall() explicitly please
+# check for __initcall(), use device_initcall() explicitly or more appropriate function please
 		if ($line =~ /^.\s*__initcall\s*\(/) {
 			WARN("USE_DEVICE_INITCALL",
-			     "please use device_initcall() instead of __initcall()\n" . $herecurr);
-		}
-
-# check for various ops structs, ensure they are const.
-		my $struct_ops = qr{acpi_dock_ops|
-				address_space_operations|
-				backlight_ops|
-				block_device_operations|
-				dentry_operations|
-				dev_pm_ops|
-				dma_map_ops|
-				extent_io_ops|
-				file_lock_operations|
-				file_operations|
-				hv_ops|
-				ide_dma_ops|
-				intel_dvo_dev_ops|
-				item_operations|
-				iwl_ops|
-				kgdb_arch|
-				kgdb_io|
-				kset_uevent_ops|
-				lock_manager_operations|
-				microcode_ops|
-				mtrr_ops|
-				neigh_ops|
-				nlmsvc_binding|
-				pci_raw_ops|
-				pipe_buf_operations|
-				platform_hibernation_ops|
-				platform_suspend_ops|
-				proto_ops|
-				rpc_pipe_ops|
-				seq_operations|
-				snd_ac97_build_ops|
-				soc_pcmcia_socket_ops|
-				stacktrace_ops|
-				sysfs_ops|
-				tty_operations|
-				usb_mon_operations|
-				wd_ops}x;
+			     "please use device_initcall() or more appropriate function instead of __initcall() (see include/linux/init.h)\n" . $herecurr);
+		}
+
+# check for various structs that are normally const (ops, kgdb, device_tree)
+# and avoid what seem like struct definitions 'struct foo {'
 		if ($line !~ /\bconst\b/ &&
-		    $line =~ /\bstruct\s+($struct_ops)\b/) {
+		    $line =~ /\bstruct\s+($const_structs)\b(?!\s*\{)/) {
 			WARN("CONST_STRUCT",
-			     "struct $1 should normally be const\n" .
-				$herecurr);
+			     "struct $1 should normally be const\n" . $herecurr);
 		}
 
 # use of NR_CPUS is usually wrong
@@ -4507,16 +6199,11 @@ sub process {
 			      "#define of '$1' is wrong - use Kconfig variables or standard guards instead\n" . $herecurr);
 		}
 
-# check for %L{u,d,i} in strings
-		my $string;
-		while ($line =~ /(?:^|")([X\t]*)(?:"|$)/g) {
-			$string = substr($rawline, $-[1], $+[1] - $-[1]);
-			$string =~ s/%%/__/g;
-			if ($string =~ /(?<!%)%L[udi]/) {
-				WARN("PRINTF_L",
-				     "\%Ld/%Lu are not-standard C, use %lld/%llu\n" . $herecurr);
-				last;
-			}
+# likely/unlikely comparisons similar to "(likely(foo) > 0)"
+		if ($^V && $^V ge 5.10.0 &&
+		    $line =~ /\b((?:un)?likely)\s*\(\s*$FuncArg\s*\)\s*$Compare/) {
+			WARN("LIKELY_MISUSE",
+			     "Using $1 should generally have parentheses around the comparison\n" . $herecurr);
 		}
 
 # whine mightly about in_atomic
@@ -4530,6 +6217,34 @@ sub process {
 			}
 		}
 
+# whine about ACCESS_ONCE
+		if ($^V && $^V ge 5.10.0 &&
+		    $line =~ /\bACCESS_ONCE\s*$balanced_parens\s*(=(?!=))?\s*($FuncArg)?/) {
+			my $par = $1;
+			my $eq = $2;
+			my $fun = $3;
+			$par =~ s/^\(\s*(.*)\s*\)$/$1/;
+			if (defined($eq)) {
+				if (WARN("PREFER_WRITE_ONCE",
+					 "Prefer WRITE_ONCE(<FOO>, <BAR>) over ACCESS_ONCE(<FOO>) = <BAR>\n" . $herecurr) &&
+				    $fix) {
+					$fixed[$fixlinenr] =~ s/\bACCESS_ONCE\s*\(\s*\Q$par\E\s*\)\s*$eq\s*\Q$fun\E/WRITE_ONCE($par, $fun)/;
+				}
+			} else {
+				if (WARN("PREFER_READ_ONCE",
+					 "Prefer READ_ONCE(<FOO>) over ACCESS_ONCE(<FOO>)\n" . $herecurr) &&
+				    $fix) {
+					$fixed[$fixlinenr] =~ s/\bACCESS_ONCE\s*\(\s*\Q$par\E\s*\)/READ_ONCE($par)/;
+				}
+			}
+		}
+
+# check for mutex_trylock_recursive usage
+		if ($line =~ /mutex_trylock_recursive/) {
+			ERROR("LOCKING",
+			      "recursive locking is bad, do not use this ever.\n" . $herecurr);
+		}
+
 # check for lockdep_set_novalidate_class
 		if ($line =~ /^.\s*lockdep_set_novalidate_class\s*\(/ ||
 		    $line =~ /__lockdep_no_validate__\s*\)/ ) {
@@ -4541,11 +6256,95 @@ sub process {
 			}
 		}
 
-		if ($line =~ /debugfs_create_file.*S_IWUGO/ ||
-		    $line =~ /DEVICE_ATTR.*S_IWUGO/ ) {
+		if ($line =~ /debugfs_create_\w+.*\b$mode_perms_world_writable\b/ ||
+		    $line =~ /DEVICE_ATTR.*\b$mode_perms_world_writable\b/) {
 			WARN("EXPORTED_WORLD_WRITABLE",
 			     "Exporting world writable files is usually an error. Consider more restrictive permissions.\n" . $herecurr);
 		}
+
+# Mode permission misuses where it seems decimal should be octal
+# This uses a shortcut match to avoid unnecessary uses of a slow foreach loop
+		if ($^V && $^V ge 5.10.0 &&
+		    defined $stat &&
+		    $line =~ /$mode_perms_search/) {
+			foreach my $entry (@mode_permission_funcs) {
+				my $func = $entry->[0];
+				my $arg_pos = $entry->[1];
+
+				my $lc = $stat =~ tr@\n@@;
+				$lc = $lc + $linenr;
+				my $stat_real = raw_line($linenr, 0);
+				for (my $count = $linenr + 1; $count <= $lc; $count++) {
+					$stat_real = $stat_real . "\n" . raw_line($count, 0);
+				}
+
+				my $skip_args = "";
+				if ($arg_pos > 1) {
+					$arg_pos--;
+					$skip_args = "(?:\\s*$FuncArg\\s*,\\s*){$arg_pos,$arg_pos}";
+				}
+				my $test = "\\b$func\\s*\\(${skip_args}($FuncArg(?:\\|\\s*$FuncArg)*)\\s*[,\\)]";
+				if ($stat =~ /$test/) {
+					my $val = $1;
+					$val = $6 if ($skip_args ne "");
+					if (($val =~ /^$Int$/ && $val !~ /^$Octal$/) ||
+					    ($val =~ /^$Octal$/ && length($val) ne 4)) {
+						ERROR("NON_OCTAL_PERMISSIONS",
+						      "Use 4 digit octal (0777) not decimal permissions\n" . "$here\n" . $stat_real);
+					}
+					if ($val =~ /^$Octal$/ && (oct($val) & 02)) {
+						ERROR("EXPORTED_WORLD_WRITABLE",
+						      "Exporting writable files is usually an error. Consider more restrictive permissions.\n" . "$here\n" . $stat_real);
+					}
+				}
+			}
+		}
+
+# check for uses of S_<PERMS> that could be octal for readability
+		if ($line =~ /\b$mode_perms_string_search\b/) {
+			my $val = "";
+			my $oval = "";
+			my $to = 0;
+			my $curpos = 0;
+			my $lastpos = 0;
+			while ($line =~ /\b(($mode_perms_string_search)\b(?:\s*\|\s*)?\s*)/g) {
+				$curpos = pos($line);
+				my $match = $2;
+				my $omatch = $1;
+				last if ($lastpos > 0 && ($curpos - length($omatch) != $lastpos));
+				$lastpos = $curpos;
+				$to |= $mode_permission_string_types{$match};
+				$val .= '\s*\|\s*' if ($val ne "");
+				$val .= $match;
+				$oval .= $omatch;
+			}
+			$oval =~ s/^\s*\|\s*//;
+			$oval =~ s/\s*\|\s*$//;
+			my $octal = sprintf("%04o", $to);
+			if (WARN("SYMBOLIC_PERMS",
+				 "Symbolic permissions '$oval' are not preferred. Consider using octal permissions '$octal'.\n" . $herecurr) &&
+			    $fix) {
+				$fixed[$fixlinenr] =~ s/$val/$octal/;
+			}
+		}
+
+# validate content of MODULE_LICENSE against list from include/linux/module.h
+		if ($line =~ /\bMODULE_LICENSE\s*\(\s*($String)\s*\)/) {
+			my $extracted_string = get_quoted_string($line, $rawline);
+			my $valid_licenses = qr{
+						GPL|
+						GPL\ v2|
+						GPL\ and\ additional\ rights|
+						Dual\ BSD/GPL|
+						Dual\ MIT/GPL|
+						Dual\ MPL/GPL|
+						Proprietary
+					}x;
+			if ($extracted_string !~ /^"(?:$valid_licenses)"$/x) {
+				WARN("MODULE_LICENSE",
+				     "unknown module license " . $extracted_string . "\n" . $herecurr);
+			}
+		}
 	}
 
 	# If we have no input at all, then there is nothing to report on
@@ -4566,11 +6365,11 @@ sub process {
 		exit(0);
 	}
 
-	if (!$is_patch) {
+	if (!$is_patch && $file !~ /cover-letter\.patch$/) {
 		ERROR("NOT_UNIFIED_DIFF",
 		      "Does not appear to be a unified-diff format patch\n");
 	}
-	if ($is_patch && $chk_signoff && $signoff == 0) {
+	if ($is_patch && $has_commit_log && $chk_signoff && $signoff == 0) {
 		ERROR("MISSING_SIGN_OFF",
 		      "Missing Signed-off-by: line(s)\n");
 	}
@@ -4581,34 +6380,39 @@ sub process {
 		print "total: $cnt_error errors, $cnt_warn warnings, " .
 			(($check)? "$cnt_chk checks, " : "") .
 			"$cnt_lines lines checked\n";
-		print "\n" if ($quiet == 0);
 	}
 
 	if ($quiet == 0) {
+		# If there were any defects found and not already fixing them
+		if (!$clean and !$fix) {
+			print << "EOM"
 
-		if ($^V lt 5.10.0) {
-			print("NOTE: perl $^V is not modern enough to detect all possible issues.\n");
-			print("An upgrade to at least perl v5.10.0 is suggested.\n\n");
+NOTE: For some of the reported defects, checkpatch may be able to
+      mechanically convert to the typical style using --fix or --fix-inplace.
+EOM
 		}
-
 		# If there were whitespace errors which cleanpatch can fix
 		# then suggest that.
 		if ($rpt_cleaners) {
-			print "NOTE: whitespace errors detected, you may wish to use scripts/cleanpatch or\n";
-			print "      scripts/cleanfile\n\n";
 			$rpt_cleaners = 0;
+			print << "EOM"
+
+NOTE: Whitespace errors detected.
+      You may wish to use scripts/cleanpatch or scripts/cleanfile
+EOM
 		}
 	}
 
-	hash_show_words(\%use_type, "Used");
-	hash_show_words(\%ignore_type, "Ignored");
-
-	if ($clean == 0 && $fix && "@rawlines" ne "@fixed") {
+	if ($clean == 0 && $fix &&
+	    ("@rawlines" ne "@fixed" ||
+	     $#fixed_inserted >= 0 || $#fixed_deleted >= 0)) {
 		my $newfile = $filename;
 		$newfile .= ".EXPERIMENTAL-checkpatch-fixes" if (!$fix_inplace);
 		my $linecount = 0;
 		my $f;
 
+		@fixed = fix_inserted_deleted_lines(\@fixed, \@fixed_inserted, \@fixed_deleted);
+
 		open($f, '>', $newfile)
 		    or die "$P: Can't open $newfile for write\n";
 		foreach my $fixed_line (@fixed) {
@@ -4616,7 +6420,7 @@ sub process {
 			if ($file) {
 				if ($linecount > 3) {
 					$fixed_line =~ s/^\+//;
-					print $f $fixed_line. "\n";
+					print $f $fixed_line . "\n";
 				}
 			} else {
 				print $f $fixed_line . "\n";
@@ -4626,6 +6430,7 @@ sub process {
 
 		if (!$quiet) {
 			print << "EOM";
+
 Wrote EXPERIMENTAL --fix correction(s) to '$newfile'
 
 Do _NOT_ trust the results written to this file.
@@ -4633,22 +6438,17 @@ Do _NOT_ submit these changes without inspecting them for correctness.
 
 This EXPERIMENTAL file is simply a convenience to help rewrite patches.
 No warranties, expressed or implied...
-
 EOM
 		}
 	}
 
-	if ($clean == 1 && $quiet == 0) {
-		print "$vname has no obvious style problems and is ready for submission.\n"
-	}
-	if ($clean == 0 && $quiet == 0) {
-		print << "EOM";
-$vname has style problems, please review.
-
-If any of these errors are false positives, please report
-them to the maintainer, see CHECKPATCH in MAINTAINERS.
-EOM
+	if ($quiet == 0) {
+		print "\n";
+		if ($clean == 1) {
+			print "$vname has no obvious style problems and is ready for submission.\n";
+		} else {
+			print "$vname has style problems, please review.\n";
+		}
 	}
-
 	return $clean;
 }
diff --git a/scripts/const_structs.checkpatch b/scripts/const_structs.checkpatch
new file mode 100644
index 0000000000..da775bca0c
--- /dev/null
+++ b/scripts/const_structs.checkpatch
@@ -0,0 +1,2 @@
+# Put structs here that should be constant
+__dummy__

commit 48d1b0a57c71d0dfff7fd16865dcf7ef93a4d2de
Author: Rob Clark <robdclark@gmail.com>
Date:   Mon Sep 11 16:53:08 2017 -0400

    UPSTREAM: lib: strto: fix incorrect handling of specified base
    
    The strto functions should honor the specified base (if non-zero) rather
    than permitting a hex or octal string when the user wanted (for example)
    base 10.
    
    This has been fixed somewhere along the way in the upstream linux kernel
    src tree, at some point after these was copied in to u-boot.  And also
    in a way that duplicates less code.  So port _parse_integer_fixup_radix()
    to u-boot.
    
    Change-Id: I4e2383c6d8ac4666e7e4e40b15f7577522bc9700
    Signed-off-by: Rob Clark <robdclark@gmail.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 2e794614838292499910060509d3c4a7aaed986a)

diff --git a/lib/strto.c b/lib/strto.c
index e93a4f5491..7f6076909a 100644
--- a/lib/strto.c
+++ b/lib/strto.c
@@ -13,25 +13,30 @@
 #include <errno.h>
 #include <linux/ctype.h>
 
+/* from lib/kstrtox.c */
+static const char *_parse_integer_fixup_radix(const char *s, unsigned int *base)
+{
+	if (*base == 0) {
+		if (s[0] == '0') {
+			if (tolower(s[1]) == 'x' && isxdigit(s[2]))
+				*base = 16;
+			else
+				*base = 8;
+		} else
+			*base = 10;
+	}
+	if (*base == 16 && s[0] == '0' && tolower(s[1]) == 'x')
+		s += 2;
+	return s;
+}
+
 unsigned long simple_strtoul(const char *cp, char **endp,
 				unsigned int base)
 {
 	unsigned long result = 0;
 	unsigned long value;
 
-	if (*cp == '0') {
-		cp++;
-		if ((*cp == 'x') && isxdigit(cp[1])) {
-			base = 16;
-			cp++;
-		}
-
-		if (!base)
-			base = 8;
-	}
-
-	if (!base)
-		base = 10;
+	cp = _parse_integer_fixup_radix(cp, &base);
 
 	while (isxdigit(*cp) && (value = isdigit(*cp) ? *cp-'0' : (islower(*cp)
 	    ? toupper(*cp) : *cp)-'A'+10) < base) {
@@ -128,19 +133,7 @@ unsigned long long simple_strtoull(const char *cp, char **endp,
 {
 	unsigned long long result = 0, value;
 
-	if (*cp == '0') {
-		cp++;
-		if ((*cp == 'x') && isxdigit(cp[1])) {
-			base = 16;
-			cp++;
-		}
-
-		if (!base)
-			base = 8;
-	}
-
-	if (!base)
-		base = 10;
+	cp = _parse_integer_fixup_radix(cp, &base);
 
 	while (isxdigit(*cp) && (value = isdigit(*cp) ? *cp - '0'
 		: (islower(*cp) ? toupper(*cp) : *cp) - 'A' + 10) < base) {

commit 135b53be98703ef12b8d891407bd0f72ee7dc30c
Author: Alison Chaiken <alison@peloton-tech.com>
Date:   Sat Sep 9 23:54:51 2017 -0700

    UPSTREAM: add pytests for 'gpt rename' and 'gpt swap'
    
    Add unit tests for the 'gpt rename' and 'gpt swap' commands that
    rely on the block device created by test/py/make_test_disk.py.
    Add CONFIG_CMD_GPT_RENAME to the sandbox_defconfig.  Remove the
    testdisk.raw test device at the end of the tests.
    
    Change-Id: I1c5b963a1f84168d4979ad1591f68a5f2a259935
    Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit c5772188ede914b0e67c2a58ae179039a582afe0)

diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index 4c4e4809be..e7a61bd61a 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -34,6 +34,7 @@ CONFIG_CMD_MX_CYCLIC=y
 CONFIG_CMD_DEMO=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
+CONFIG_CMD_GPT_RENAME=y
 CONFIG_CMD_IDE=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_PCI=y
diff --git a/test/py/tests/test_gpt.py b/test/py/tests/test_gpt.py
index 73f5c50f6c..06f24b66ce 100644
--- a/test/py/tests/test_gpt.py
+++ b/test/py/tests/test_gpt.py
@@ -35,4 +35,35 @@ def test_gpt_save_guid(u_boot_console):
     output = u_boot_console.run_command('gpt guid host 0 newguid')
     output = u_boot_console.run_command('printenv newguid')
     assert '375a56f7-d6c9-4e81-b5f0-09d41ca89efe' in output
+
+@pytest.mark.buildconfigspec('cmd_gpt')
+def test_gpt_rename_partition(u_boot_console):
+    """Test the gpt rename command to write partition names."""
+
+    if u_boot_console.config.buildconfig.get('config_cmd_gpt_rename', 'n') != 'y':
+        pytest.skip('gpt rename command not supported')
+    u_boot_console.run_command('host bind 0 testdisk.raw')
+    u_boot_console.run_command('gpt rename host 0 1 first')
+    output = u_boot_console.run_command('gpt read host 0')
+    assert 'name first' in output
+    u_boot_console.run_command('gpt rename host 0 2 second')
+    output = u_boot_console.run_command('gpt read host 0')
+    assert 'name second' in output
+
+@pytest.mark.buildconfigspec('cmd_gpt')
+def test_gpt_swap_partitions(u_boot_console):
+    """Test the gpt swap command to exchange two partition names."""
+
+    if u_boot_console.config.buildconfig.get('config_cmd_gpt_rename', 'n') != 'y':
+        pytest.skip('gpt rename command not supported')
+    if u_boot_console.config.buildconfig.get('config_cmd_part', 'n') != 'y':
+        pytest.skip('gpt swap test needs CMD_PART')
+    u_boot_console.run_command('host bind 0 testdisk.raw')
+    output = u_boot_console.run_command('part list host 0')
+    assert '0x000007ff	"first"' in output
+    assert '0x000017ff	"second"' in output
+    u_boot_console.run_command('gpt swap host 0 first second')
+    output = u_boot_console.run_command('part list host 0')
+    assert '0x000007ff	"second"' in output
+    assert '0x000017ff	"first"' in output
     os.remove('testdisk.raw')

commit e2c5d1e4e7230a53c9703120cc8bbe11e74f7f0b
Author: Alison Chaiken <alison@peloton-tech.com>
Date:   Sat Sep 9 23:47:13 2017 -0700

    UPSTREAM: add pytests for 'gpt guid' command in sandbox
    
    Run unit tests for the 'gpt guid' command, making use of the block
    device created by test/py/make_test_disk.py.  Remove this device at
    the end of the tests.
    
    Change-Id: I315989b993388fdce6f0b263376463a3532d154b
    Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit a2f422555fc80144aea418c0d8e95341acfe6868)

diff --git a/test/py/tests/test_gpt.py b/test/py/tests/test_gpt.py
new file mode 100644
index 0000000000..73f5c50f6c
--- /dev/null
+++ b/test/py/tests/test_gpt.py
@@ -0,0 +1,38 @@
+# Copyright (c) 2017 Alison Chaiken
+#
+# SPDX-License-Identifier: GPL-2.0
+
+# Test GPT manipulation commands.
+
+import os
+import pytest
+import u_boot_utils
+import make_test_disk
+
+"""
+These tests rely on a 4 MB block device called testdisk.raw
+which is automatically removed at the end of the tests.
+"""
+
+@pytest.mark.buildconfigspec('cmd_gpt')
+def test_gpt_guid(u_boot_console):
+    """Test the gpt guid command."""
+
+    if u_boot_console.config.buildconfig.get('config_cmd_gpt', 'n') != 'y':
+        pytest.skip('gpt command not supported')
+    make_test_disk.makeDisk()
+    u_boot_console.run_command('host bind 0 testdisk.raw')
+    output = u_boot_console.run_command('gpt guid host 0')
+    assert '375a56f7-d6c9-4e81-b5f0-09d41ca89efe' in output
+
+@pytest.mark.buildconfigspec('cmd_gpt')
+def test_gpt_save_guid(u_boot_console):
+    """Test the gpt guid command to save GUID into a string."""
+
+    if u_boot_console.config.buildconfig.get('config_cmd_gpt', 'n') != 'y':
+        pytest.skip('gpt command not supported')
+    u_boot_console.run_command('host bind 0 testdisk.raw')
+    output = u_boot_console.run_command('gpt guid host 0 newguid')
+    output = u_boot_console.run_command('printenv newguid')
+    assert '375a56f7-d6c9-4e81-b5f0-09d41ca89efe' in output
+    os.remove('testdisk.raw')

commit 4d11a857633de084f5f308bbf6c9d5095d9f07f7
Author: Alison Chaiken <alison@peloton-tech.com>
Date:   Sat Sep 9 23:47:12 2017 -0700

    UPSTREAM: GPT: create block device for sandbox testing
    
    Provide a Python function that creates a small block device for the
    purpose of testing the cmd/gpt.c or cmd/part.c functions in the u-boot
    sandbox.
    
    Change-Id: I620c2f97c7b6533d8cb607e365e719246cdb7acd
    Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit bf6d76b84ae13b463c0dca556118047e2d046f33)

diff --git a/board/sandbox/README.sandbox b/board/sandbox/README.sandbox
index 9dc2eb09d1..947241e3eb 100644
--- a/board/sandbox/README.sandbox
+++ b/board/sandbox/README.sandbox
@@ -338,6 +338,11 @@ $> lodev=`sudo losetup -P -f --show ./disk.raw`
 $> sudo mkfs.vfat -n EFI -v ${lodev}p1
 $> sudo mkfs.ext4 -L ROOT -v ${lodev}p2
 
+or utilize the device described in test/py/make_test_disk.py:
+
+   #!/usr/bin/python
+   import make_test_disk
+   make_test_disk.makeDisk()
 
 Writing Sandbox Drivers
 -----------------------
diff --git a/test/py/make_test_disk.py b/test/py/make_test_disk.py
new file mode 100755
index 0000000000..5288295588
--- /dev/null
+++ b/test/py/make_test_disk.py
@@ -0,0 +1,19 @@
+# Copyright (c) 2017 Alison Chaiken
+#
+# SPDX-License-Identifier: GPL-2.0
+#
+# Create a block device for testing of 'gpt' and 'part' commands.
+
+import os
+
+def makeDisk():
+    if (os.path.exists("testdisk.raw")):
+        os.remove("testdisk.raw")
+    fd = os.open("testdisk.raw", os.O_RDWR|os.O_CREAT )
+    os.ftruncate(fd, 4194304)
+    os.close(fd)
+    os.spawnl(os.P_WAIT, "/sbin/sgdisk", "sgdisk", "-U",
+          "375a56f7-d6c9-4e81-b5f0-09d41ca89efe", "testdisk.raw")
+    os.spawnl(os.P_WAIT, "/sbin/sgdisk", "sgdisk", "--new=1:2048:2560", "testdisk.raw")
+    os.spawnl(os.P_WAIT, "/sbin/sgdisk", "sgdisk", "--new=2:4096:4608", "testdisk.raw")
+    os.spawnl(os.P_WAIT, "/sbin/gdisk", "sgdisk", "-l", "testdisk.raw")

commit 451f4164161c106e1ab10dd32bc809187fdb7625
Author: Wenyou Yang <wenyou.yang@microchip.com>
Date:   Mon Jul 31 15:21:57 2017 +0800

    UPSTREAM: clk: Kconfig: Add dependences of SPL_CLK
    
    The SPL_CLK config should depend on SPL && SPL_DM.
    
    Change-Id: I86d4b934bebde3d4661143902b71e198608ff688
    Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 0712b672d2a1f9a156c489b4dd7ce8354c2b3e1f)

diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 7765148876..baa60a52e6 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -12,7 +12,7 @@ config CLK
 
 config SPL_CLK
 	bool "Enable clock support in SPL"
-	depends on CLK && SPL_DM
+	depends on CLK && SPL && SPL_DM
 	help
 	  The clock subsystem adds a small amount of overhead to the image.
 	  If this is acceptable and you have a need to use clock drivers in

commit d3aac30ed7694554019b19f76c2ae4740dbd594c
Author: Simon Glass <sjg@chromium.org>
Date:   Tue Sep 12 20:30:28 2017 -0600

    UPSTREAM: patman: Fix error when the email blacklist is missing
    
    This section of the settings file may be missing. Handle that gracefully
    rather than emitting an error.
    
    Also update patman to write this section when a new settings file is
    created.
    
    Fixes: e11aa602 (patman: add support for omitting bouncing addresses)
    
    Change-Id: I52174b84a9a28e3431fd039185f6e4d521bc037b
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Chris Packham <judge.pckham@gmail.com>
    Tested-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit ad8931400b193f701a415e7f69f1ad454d1b0380)

diff --git a/tools/patman/settings.py b/tools/patman/settings.py
index d735ff9ba3..92379b72e7 100644
--- a/tools/patman/settings.py
+++ b/tools/patman/settings.py
@@ -212,7 +212,12 @@ def CreatePatmanConfigFile(config_fname):
         print("Couldn't create patman config file\n")
         raise
 
-    print("[alias]\nme: %s <%s>" % (name, email), file=f)
+    print('''[alias]
+me: %s <%s>
+
+[bounces]
+nxp = Zhikang Zhang <zhikang.zhang@nxp.com>
+''' % (name, email), file=f)
     f.close();
 
 def _UpdateDefaults(parser, config):
@@ -282,6 +287,23 @@ def _ReadBouncesFile(fname):
                     continue
                 bounces.add(line.strip())
 
+def GetItems(config, section):
+    """Get the items from a section of the config.
+
+    Args:
+        config: _ProjectConfigParser object containing settings
+        section: name of section to retrieve
+
+    Returns:
+        List of (name, value) tuples for the section
+    """
+    try:
+        return config.items(section)
+    except ConfigParser.NoSectionError as e:
+        return []
+    except:
+        raise
+
 def Setup(parser, project_name, config_fname=''):
     """Set up the settings module by reading config files.
 
@@ -303,11 +325,11 @@ def Setup(parser, project_name, config_fname=''):
 
     config.read(config_fname)
 
-    for name, value in config.items('alias'):
+    for name, value in GetItems(config, 'alias'):
         alias[name] = value.split(',')
 
     _ReadBouncesFile('doc/bounces')
-    for name, value in config.items('bounces'):
+    for name, value in GetItems(config, 'bounces'):
         bounces.add(value)
 
     _UpdateDefaults(parser, config)

commit 7a001d4f72c161d830b3271f202122448139d2f3
Author: Anatolij Gustschin <agust@denx.de>
Date:   Tue Aug 1 16:17:12 2017 +0200

    UPSTREAM: spl: add newline in debug output
    
    With debug enabled, SPL output following these debug prints is on the
    same line and it is hard to read. Fix it.
    
    Change-Id: I6b0983a285f1deb38cac7e0292c9c286ca6e901b
    Signed-off-by: Anatolij Gustschin <agust@denx.de>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 2d2531be861cb7ec25aa7980b1099ca4f5f46d86)

diff --git a/common/spl/spl.c b/common/spl/spl.c
index d156e74533..6ca42c64ee 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -158,7 +158,7 @@ int spl_parse_image_header(struct spl_image_info *spl_image,
 			spl_image->load_addr, spl_image->size);
 #else
 		/* LEGACY image not supported */
-		debug("Legacy boot image support not enabled, proceeding to other boot methods");
+		debug("Legacy boot image support not enabled, proceeding to other boot methods\n");
 		return -EINVAL;
 #endif
 	} else {
@@ -196,7 +196,7 @@ int spl_parse_image_header(struct spl_image_info *spl_image,
 		spl_set_header_raw_uboot(spl_image);
 #else
 		/* RAW image not supported, proceed to other boot methods. */
-		debug("Raw boot image support not enabled, proceeding to other boot methods");
+		debug("Raw boot image support not enabled, proceeding to other boot methods\n");
 		return -EINVAL;
 #endif
 	}

commit 59814c3b3d804bc086bc45357ac0308a3682d1f1
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Sat Aug 26 01:02:39 2017 +0900

    UPSTREAM: linux/io.h: import generic ioread* / iowrite* accessors from Linux
    
    Some drivers in Linux (ex. drivers/mtd/nand/denali.c) use
    ioread*/iowrite* accessors.  Import them to make drivers more
    synced.  I copied code from include/asm-generic/io.h of Linux.
    
    Change-Id: Ifb36301885bb1df36f653f0b9a639b4fc1af6406
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 6c06f8dc4ab02890ef93b50dac129c2b43cc9ea3)

diff --git a/include/linux/io.h b/include/linux/io.h
index a104b7e69f..bf1ddbbaa6 100644
--- a/include/linux/io.h
+++ b/include/linux/io.h
@@ -9,6 +9,50 @@
 #include <linux/types.h>
 #include <asm/io.h>
 
+static inline u8 ioread8(const volatile void __iomem *addr)
+{
+	return readb(addr);
+}
+
+static inline u16 ioread16(const volatile void __iomem *addr)
+{
+	return readw(addr);
+}
+
+static inline u32 ioread32(const volatile void __iomem *addr)
+{
+	return readl(addr);
+}
+
+#ifdef CONFIG_64BIT
+static inline u64 ioread64(const volatile void __iomem *addr)
+{
+	return readq(addr);
+}
+#endif /* CONFIG_64BIT */
+
+static inline void iowrite8(u8 value, volatile void __iomem *addr)
+{
+	writeb(value, addr);
+}
+
+static inline void iowrite16(u16 value, volatile void __iomem *addr)
+{
+	writew(value, addr);
+}
+
+static inline void iowrite32(u32 value, volatile void __iomem *addr)
+{
+	writel(value, addr);
+}
+
+#ifdef CONFIG_64BIT
+static inline void iowrite64(u64 value, volatile void __iomem *addr)
+{
+	writeq(value, addr);
+}
+#endif /* CONFIG_64BIT */
+
 #ifndef CONFIG_HAVE_ARCH_IOREMAP
 static inline void __iomem *ioremap(resource_size_t offset,
 				    resource_size_t size)

commit ee0f94feab20e0ff9018edfaab8b0896cdbc281b
Author: Andrew F. Davis <afd@ti.com>
Date:   Mon Jul 31 10:58:20 2017 -0500

    image: Add TI PMMC image type
    
    Add a new image type representing TI Power Management
    Micro-Controller (PMMC) Firmware image type.
    
    Change-Id: I28a8132dfd5549ffde3d81e6da7399c3768ac1e7
    Signed-off-by: Andrew F. Davis <afd@ti.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 6442c9643e82966ae8fff391bab3fcc763662564)

diff --git a/common/image.c b/common/image.c
index f5f6cd235b..c6168af3c0 100644
--- a/common/image.c
+++ b/common/image.c
@@ -167,6 +167,7 @@ static const table_entry_t uimage_type[] = {
 	{	IH_TYPE_FPGA,       "fpga",       "FPGA Image" },
 	{       IH_TYPE_TEE,        "tee",        "Trusted Execution Environment Image",},
 	{	IH_TYPE_FIRMWARE_IVT, "firmware_ivt", "Firmware with HABv4 IVT" },
+	{       IH_TYPE_PMMC,        "pmmc",        "TI Power Management Micro-Controller Firmware",},
 	{	IH_TYPE_RKNAND,     "rknand",     "Rockchip NAND Boot Image" },
 	{	-1,		    "",		  "",			},
 };
diff --git a/include/image.h b/include/image.h
index fe0febabaa..e74bd8286b 100644
--- a/include/image.h
+++ b/include/image.h
@@ -269,6 +269,7 @@ enum {
 	IH_TYPE_VYBRIDIMAGE,	/* VYBRID .vyb Image */
 	IH_TYPE_TEE,            /* Trusted Execution Environment OS Image */
 	IH_TYPE_FIRMWARE_IVT,		/* Firmware Image with HABv4 IVT */
+	IH_TYPE_PMMC,            /* TI Power Management Micro-Controller Firmware */
 	IH_TYPE_RKNAND,			/* Rockchip NAND Boot Image	*/
 
 	IH_TYPE_COUNT,			/* Number of image types */

commit 22720541119839d8240de5a29ffe65b68b26b2fd
Author: Rob Clark <robdclark@gmail.com>
Date:   Sat Sep 9 06:47:43 2017 -0400

    UPSTREAM: examples: add fallback memcpy
    
    Solves build issue:
    
      Building current source for 134 boards (12 threads, 1 job per thread)
             arm:  +   lsxhl
      +examples/api/vsprintf.o: In function `string16':
      +lib/vsprintf.c:278: undefined reference to `memcpy'
      +examples/api/uuid.o: In function `uuid_bin_to_str':
      +lib/uuid.c:197: undefined reference to `memcpy'
      +lib/uuid.c:199: undefined reference to `memcpy'
      +make[3]: *** [examples/api/demo] Error 1
      +make[2]: *** [examples/api] Error 2
      +make[1]: *** [examples] Error 2
      +make: *** [sub-make] Error 2
        133    0    1 /134    sheevaplug
    
    Change-Id: I467ecc2957a5b74eaf3e368394441817f228a469
    Signed-off-by: Rob Clark <robdclark@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 7e3e20560784b048ff19e90cd36b6680626b1ab3)

diff --git a/examples/api/glue.c b/examples/api/glue.c
index 8aabf32c89..575c1e55f3 100644
--- a/examples/api/glue.c
+++ b/examples/api/glue.c
@@ -416,3 +416,15 @@ void ub_display_clear(void)
 {
 	syscall(API_DISPLAY_CLEAR, NULL);
 }
+
+__weak void *memcpy(void *dest, const void *src, size_t size)
+{
+	unsigned char *dptr = dest;
+	const unsigned char *ptr = src;
+	const unsigned char *end = src + size;
+
+	while (ptr < end)
+		*dptr++ = *ptr++;
+
+	return dest;
+}

commit aa5728ff9b9e9ce61516bcf0670050193e8860db
Author: Rob Clark <robdclark@gmail.com>
Date:   Sat Sep 9 06:47:42 2017 -0400

    UPSTREAM: vsprintf.c: add GUID printing
    
    This works (roughly) the same way as linux's, but we currently always
    print lower-case (ie. we just keep %pUB and %pUL for compat with linux),
    mostly just because that is what uuid_bin_to_str() supports.
    
      %pUb:   01020304-0506-0708-090a-0b0c0d0e0f10
      %pUl:   04030201-0605-0807-090a-0b0c0d0e0f10
    
    It will be used by a later efi_loader paths for efi variables and for
    device-path-to-text protocol, and also quite useful for debug prints
    of protocol GUIDs.
    
    Change-Id: I6b0920ae6fe99ac0638c9c3c8eed6ea3f964d2b5
    Signed-off-by: Rob Clark <robdclark@gmail.com>
    Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 22ada0c8e6d50281af72176eecdfc356c794639c)

diff --git a/examples/api/Makefile b/examples/api/Makefile
index 87c15d0f68..899527267d 100644
--- a/examples/api/Makefile
+++ b/examples/api/Makefile
@@ -35,6 +35,7 @@ EXT_COBJ-y += lib/string.o
 EXT_COBJ-y += lib/time.o
 EXT_COBJ-y += lib/vsprintf.o
 EXT_COBJ-y += lib/charset.o
+EXT_COBJ-$(CONFIG_LIB_UUID) += lib/uuid.o
 EXT_SOBJ-$(CONFIG_PPC) += arch/powerpc/lib/ppcstring.o
 ifeq ($(ARCH),arm)
 EXT_SOBJ-$(CONFIG_USE_ARCH_MEMSET) += arch/arm/lib/memset.o
diff --git a/include/config_fallbacks.h b/include/config_fallbacks.h
index 46b7a2a6f2..2c4d43d672 100644
--- a/include/config_fallbacks.h
+++ b/include/config_fallbacks.h
@@ -58,6 +58,7 @@
 
 #if (CONFIG_IS_ENABLED(PARTITION_UUIDS) || \
 	CONFIG_IS_ENABLED(EFI_PARTITION) || \
+	CONFIG_IS_ENABLED(EFI_LOADER) || \
 	defined(CONFIG_RANDOM_UUID) || \
 	defined(CONFIG_CMD_UUID) || \
 	defined(CONFIG_BOOTP_PXE)) && \
diff --git a/lib/vsprintf.c b/lib/vsprintf.c
index 97bed9d36d..dd572d2868 100644
--- a/lib/vsprintf.c
+++ b/lib/vsprintf.c
@@ -18,6 +18,7 @@
 
 #include <common.h>
 #include <charset.h>
+#include <uuid.h>
 
 #include <div64.h>
 #define noinline __attribute__((noinline))
@@ -366,6 +367,40 @@ static char *ip4_addr_string(char *buf, char *end, u8 *addr, int field_width,
 }
 #endif
 
+#ifdef CONFIG_LIB_UUID
+/*
+ * This works (roughly) the same way as linux's, but we currently always
+ * print lower-case (ie. we just keep %pUB and %pUL for compat with linux),
+ * mostly just because that is what uuid_bin_to_str() supports.
+ *
+ *   %pUb:   01020304-0506-0708-090a-0b0c0d0e0f10
+ *   %pUl:   04030201-0605-0807-090a-0b0c0d0e0f10
+ */
+static char *uuid_string(char *buf, char *end, u8 *addr, int field_width,
+			 int precision, int flags, const char *fmt)
+{
+	char uuid[UUID_STR_LEN + 1];
+	int str_format = UUID_STR_FORMAT_STD;
+
+	switch (*(++fmt)) {
+	case 'L':
+	case 'l':
+		str_format = UUID_STR_FORMAT_GUID;
+		break;
+	case 'B':
+	case 'b':
+		/* this is the default */
+		break;
+	default:
+		break;
+	}
+
+	uuid_bin_to_str(addr, uuid, str_format);
+
+	return string(buf, end, uuid, field_width, precision, flags);
+}
+#endif
+
 /*
  * Show a '%p' thing.  A kernel extension is that the '%p' is followed
  * by an extra set of alphanumeric characters that are extended format
@@ -399,8 +434,8 @@ static char *pointer(const char *fmt, char *buf, char *end, void *ptr,
 			      flags);
 #endif
 
-#ifdef CONFIG_CMD_NET
 	switch (*fmt) {
+#ifdef CONFIG_CMD_NET
 	case 'a':
 		flags |= SPECIAL | ZEROPAD;
 
@@ -430,8 +465,15 @@ static char *pointer(const char *fmt, char *buf, char *end, void *ptr,
 					       precision, flags);
 		flags &= ~SPECIAL;
 		break;
-	}
 #endif
+#ifdef CONFIG_LIB_UUID
+	case 'U':
+		return uuid_string(buf, end, ptr, field_width, precision,
+				   flags, fmt);
+#endif
+	default:
+		break;
+	}
 	flags |= SMALL;
 	if (field_width == -1) {
 		field_width = 2*sizeof(void *);

commit 5ec685037a799ecdc53ecb1a12a9ed5a9cecb4f4
Author: Rob Clark <robdclark@gmail.com>
Date:   Sat Sep 9 06:47:41 2017 -0400

    UPSTREAM: vsprintf.c: add UTF-16 string (%ls) support
    
    This is convenient for efi_loader which deals a lot with UTF-16.  Only
    enabled with CC_SHORT_WCHAR, leaving room to add a UTF-32 version when
    CC_SHORT_WCHAR is not enabled.
    
    Change-Id: I3c6cd45db5f29157760f99bc5956b482ff96fc6c
    Signed-off-by: Rob Clark <robdclark@gmail.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 274325c50951dd16ad2a6f45e79dc062ad47011b)

diff --git a/examples/api/Makefile b/examples/api/Makefile
index dab6398bab..87c15d0f68 100644
--- a/examples/api/Makefile
+++ b/examples/api/Makefile
@@ -34,6 +34,7 @@ EXT_COBJ-y += lib/div64.o
 EXT_COBJ-y += lib/string.o
 EXT_COBJ-y += lib/time.o
 EXT_COBJ-y += lib/vsprintf.o
+EXT_COBJ-y += lib/charset.o
 EXT_SOBJ-$(CONFIG_PPC) += arch/powerpc/lib/ppcstring.o
 ifeq ($(ARCH),arm)
 EXT_SOBJ-$(CONFIG_USE_ARCH_MEMSET) += arch/arm/lib/memset.o
diff --git a/lib/vsprintf.c b/lib/vsprintf.c
index 874a2951f7..97bed9d36d 100644
--- a/lib/vsprintf.c
+++ b/lib/vsprintf.c
@@ -17,6 +17,7 @@
 #include <linux/ctype.h>
 
 #include <common.h>
+#include <charset.h>
 
 #include <div64.h>
 #define noinline __attribute__((noinline))
@@ -270,6 +271,26 @@ static char *string(char *buf, char *end, char *s, int field_width,
 	return buf;
 }
 
+static char *string16(char *buf, char *end, u16 *s, int field_width,
+		int precision, int flags)
+{
+	u16 *str = s ? s : L"<NULL>";
+	int utf16_len = utf16_strnlen(str, precision);
+	u8 utf8[utf16_len * MAX_UTF8_PER_UTF16];
+	int utf8_len, i;
+
+	utf8_len = utf16_to_utf8(utf8, str, utf16_len) - utf8;
+
+	if (!(flags & LEFT))
+		while (utf8_len < field_width--)
+			ADDCH(buf, ' ');
+	for (i = 0; i < utf8_len; ++i)
+		ADDCH(buf, utf8[i]);
+	while (utf8_len < field_width--)
+		ADDCH(buf, ' ');
+	return buf;
+}
+
 #ifdef CONFIG_CMD_NET
 static const char hex_asc[] = "0123456789abcdef";
 #define hex_asc_lo(x)	hex_asc[((x) & 0x0f)]
@@ -528,8 +549,13 @@ repeat:
 			continue;
 
 		case 's':
-			str = string(str, end, va_arg(args, char *),
-				     field_width, precision, flags);
+			if (qualifier == 'l' && !IS_ENABLED(CONFIG_SPL_BUILD)) {
+				str = string16(str, end, va_arg(args, u16 *),
+					       field_width, precision, flags);
+			} else {
+				str = string(str, end, va_arg(args, char *),
+					     field_width, precision, flags);
+			}
 			continue;
 
 		case 'p':

commit 407d40f45fa9ead49c6b5f6750e82f727edfe0f0
Author: Rob Clark <robdclark@gmail.com>
Date:   Sat Sep 9 06:47:40 2017 -0400

    UPSTREAM: lib: add some utf16 handling helpers
    
    We'll eventually want these in a few places in efi_loader, and also
    vsprintf.
    
    Change-Id: I6c04463ad364e46730fcc84b86d38400f433e8de
    Signed-off-by: Rob Clark <robdclark@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 78178bb0c9dfe2a91a636a411291d8bab50e8a7d)

diff --git a/include/charset.h b/include/charset.h
new file mode 100644
index 0000000000..39279f746a
--- /dev/null
+++ b/include/charset.h
@@ -0,0 +1,65 @@
+/*
+ *  charset conversion utils
+ *
+ *  Copyright (c) 2017 Rob Clark
+ *
+ *  SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __CHARSET_H_
+#define __CHARSET_H_
+
+#define MAX_UTF8_PER_UTF16 4
+
+/**
+ * utf16_strlen() - Get the length of an utf16 string
+ *
+ * Returns the number of 16 bit characters in an utf16 string, not
+ * including the terminating NULL character.
+ *
+ * @in     the string to measure
+ * @return the string length
+ */
+size_t utf16_strlen(const uint16_t *in);
+
+/**
+ * utf16_strnlen() - Get the length of a fixed-size utf16 string.
+ *
+ * Returns the number of 16 bit characters in an utf16 string,
+ * not including the terminating NULL character, but at most
+ * 'count' number of characters.  In doing this, utf16_strnlen()
+ * looks at only the first 'count' characters.
+ *
+ * @in     the string to measure
+ * @count  the maximum number of characters to count
+ * @return the string length, up to a maximum of 'count'
+ */
+size_t utf16_strnlen(const uint16_t *in, size_t count);
+
+/**
+ * utf16_strcpy() - UTF16 equivalent of strcpy()
+ */
+uint16_t *utf16_strcpy(uint16_t *dest, const uint16_t *src);
+
+/**
+ * utf16_strdup() - UTF16 equivalent of strdup()
+ */
+uint16_t *utf16_strdup(const uint16_t *s);
+
+/**
+ * utf16_to_utf8() - Convert an utf16 string to utf8
+ *
+ * Converts 'size' characters of the utf16 string 'src' to utf8
+ * written to the 'dest' buffer.
+ *
+ * NOTE that a single utf16 character can generate up to 4 utf8
+ * characters.  See MAX_UTF8_PER_UTF16.
+ *
+ * @dest   the destination buffer to write the utf8 characters
+ * @src    the source utf16 string
+ * @size   the number of utf16 characters to convert
+ * @return the pointer to the first unwritten byte in 'dest'
+ */
+uint8_t *utf16_to_utf8(uint8_t *dest, const uint16_t *src, size_t size);
+
+#endif /* __CHARSET_H_ */
diff --git a/lib/Makefile b/lib/Makefile
index 10b19d35fe..17331d55b3 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -18,6 +18,7 @@ obj-$(CONFIG_OF_LIVE) += of_live.o
 obj-$(CONFIG_CMD_DHRYSTONE) += dhry/
 
 obj-$(CONFIG_AES) += aes.o
+obj-y += charset.o
 obj-$(CONFIG_USB_TTY) += circbuf.o
 obj-y += crc7.o
 obj-y += crc8.o
diff --git a/lib/charset.c b/lib/charset.c
new file mode 100644
index 0000000000..ff76e88c77
--- /dev/null
+++ b/lib/charset.c
@@ -0,0 +1,101 @@
+/*
+ *  charset conversion utils
+ *
+ *  Copyright (c) 2017 Rob Clark
+ *
+ *  SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <charset.h>
+#include <malloc.h>
+
+/*
+ * utf8/utf16 conversion mostly lifted from grub
+ */
+
+size_t utf16_strlen(const uint16_t *in)
+{
+	size_t i;
+	for (i = 0; in[i]; i++);
+	return i;
+}
+
+size_t utf16_strnlen(const uint16_t *in, size_t count)
+{
+	size_t i;
+	for (i = 0; count-- && in[i]; i++);
+	return i;
+}
+
+uint16_t *utf16_strcpy(uint16_t *dest, const uint16_t *src)
+{
+	uint16_t *tmp = dest;
+
+	while ((*dest++ = *src++) != '\0')
+		/* nothing */;
+	return tmp;
+
+}
+
+uint16_t *utf16_strdup(const uint16_t *s)
+{
+	uint16_t *new;
+	if (!s || !(new = malloc((utf16_strlen(s) + 1) * 2)))
+		return NULL;
+	utf16_strcpy(new, s);
+	return new;
+}
+
+/* Convert UTF-16 to UTF-8.  */
+uint8_t *utf16_to_utf8(uint8_t *dest, const uint16_t *src, size_t size)
+{
+	uint32_t code_high = 0;
+
+	while (size--) {
+		uint32_t code = *src++;
+
+		if (code_high) {
+			if (code >= 0xDC00 && code <= 0xDFFF) {
+				/* Surrogate pair.  */
+				code = ((code_high - 0xD800) << 10) + (code - 0xDC00) + 0x10000;
+
+				*dest++ = (code >> 18) | 0xF0;
+				*dest++ = ((code >> 12) & 0x3F) | 0x80;
+				*dest++ = ((code >> 6) & 0x3F) | 0x80;
+				*dest++ = (code & 0x3F) | 0x80;
+			} else {
+				/* Error...  */
+				*dest++ = '?';
+				/* *src may be valid. Don't eat it.  */
+				src--;
+			}
+
+			code_high = 0;
+		} else {
+			if (code <= 0x007F) {
+				*dest++ = code;
+			} else if (code <= 0x07FF) {
+				*dest++ = (code >> 6) | 0xC0;
+				*dest++ = (code & 0x3F) | 0x80;
+			} else if (code >= 0xD800 && code <= 0xDBFF) {
+				code_high = code;
+				continue;
+			} else if (code >= 0xDC00 && code <= 0xDFFF) {
+				/* Error... */
+				*dest++ = '?';
+			} else if (code < 0x10000) {
+				*dest++ = (code >> 12) | 0xE0;
+				*dest++ = ((code >> 6) & 0x3F) | 0x80;
+				*dest++ = (code & 0x3F) | 0x80;
+			} else {
+				*dest++ = (code >> 18) | 0xF0;
+				*dest++ = ((code >> 12) & 0x3F) | 0x80;
+				*dest++ = ((code >> 6) & 0x3F) | 0x80;
+				*dest++ = (code & 0x3F) | 0x80;
+			}
+		}
+	}
+
+	return dest;
+}
diff --git a/lib/efi_loader/efi_console.c b/lib/efi_loader/efi_console.c
index 5ebce4b544..3fc82b8726 100644
--- a/lib/efi_loader/efi_console.c
+++ b/lib/efi_loader/efi_console.c
@@ -7,6 +7,7 @@
  */
 
 #include <common.h>
+#include <charset.h>
 #include <efi_loader.h>
 
 static bool console_size_queried;
@@ -138,20 +139,8 @@ static efi_status_t EFIAPI efi_cout_reset(
 
 static void print_unicode_in_utf8(u16 c)
 {
-	char utf8[4] = { 0 };
-	char *b = utf8;
-
-	if (c < 0x80) {
-		*(b++) = c;
-	} else if (c < 0x800) {
-		*(b++) = 192 + c / 64;
-		*(b++) = 128 + c % 64;
-	} else {
-		*(b++) = 224 + c / 4096;
-		*(b++) = 128 + c / 64 % 64;
-		*(b++) = 128 + c % 64;
-	}
-
+	char utf8[MAX_UTF8_PER_UTF16] = { 0 };
+	utf16_to_utf8((u8 *)utf8, &c, 1);
 	puts(utf8);
 }
 

commit bb890a575d70922475f11b0857e38c49b76a2975
Author: Rob Clark <robdclark@gmail.com>
Date:   Sat Sep 9 06:47:39 2017 -0400

    UPSTREAM: kbuild: Enable -fshort-wchar
    
    EFI_LOADER really wants UTF-16 strings (ie. %ls and L"string" are 16bit
    chars instead of 32bit chars).  But rather than enabling -fshort-wchar
    conditionally if EFI_LOADER is enabled, it was deemed preferrable to
    globally switch.
    
    Change-Id: I6cf927d1bce3a9120cd93ee72a9a578b87d8cfe0
    Signed-off-by: Rob Clark <robdclark@gmail.com>
    Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 4a85663ec7eddd955d22f1b0f34a9708eac82314)

diff --git a/Makefile b/Makefile
index 8086f3c93e..8250b3409a 100644
--- a/Makefile
+++ b/Makefile
@@ -360,6 +360,7 @@ KBUILD_CPPFLAGS := -D__KERNEL__ -D__UBOOT__
 KBUILD_CFLAGS   := -Wall -Wstrict-prototypes \
 		   -Wno-format-security \
 		   -fno-builtin -ffreestanding
+KBUILD_CFLAGS	+= -fshort-wchar
 KBUILD_AFLAGS   := -D__ASSEMBLY__
 
 # Read UBOOTRELEASE from include/config/uboot.release (if it exists)

commit 308d4396d10c9f2818fa84ebd8077204c0b5f44f
Author: Tom Rini <trini@konsulko.com>
Date:   Tue Sep 12 11:00:53 2017 -0400

    UPSTREAM: Travis-CI: Update PATH
    
    We now can no longer re-use the provided path and need to give the
    full PATH we want used now.
    
    Change-Id: I2a6929d7d2b49788650048cd7f48340f99fd95c1
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit fa6365b7c7cf06f3de0aaf55d1c8cd1e5bb30151)

diff --git a/.travis.yml b/.travis.yml
index ea560b9360..4b7f8dd8e4 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -52,7 +52,7 @@ install:
 
 env:
   global:
-    - PATH=/tmp/dtc:/tmp/qemu-install/bin:/tmp/uboot-test-hooks/bin:$PATH
+    - PATH=/tmp/dtc:/tmp/qemu-install/bin:/tmp/uboot-test-hooks/bin:/usr/bin:/bin
     - PYTHONPATH=/tmp/uboot-test-hooks/py/travis-ci
     - BUILD_DIR=build
     - HOSTCC="cc"

commit e5f40fb7af642b1065d584d00eea7b2307d9db5b
Author: Patrick Delaunay <patrick.delaunay@st.com>
Date:   Thu Aug 3 12:36:07 2017 +0200

    UPSTREAM: dm: backlight: Add a driver for GPIO backlight
    
    Add a driver for GPIO backlights.
    It understands the standard device tree binding.
    It can be used with simple-panel when PWM is not necessary.
    
    Change-Id: Ia4160d1dfbe53b3f6211f3d321c33b8b5d0be6d0
    Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 5b6a6a91c870949e21b7fd3865582ea6a32ea922)

diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index ac50309b4b..800cdd168c 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -25,6 +25,16 @@ config BACKLIGHT_PWM
 	  it understands the standard device tree
 	  (leds/backlight/pwm-backlight.txt)
 
+config BACKLIGHT_GPIO
+	bool "Generic GPIO based Backlight Driver"
+	depends on DM_VIDEO
+	help
+	  If you have a LCD backlight adjustable by GPIO, say Y to enable
+	  this driver.
+	  This driver can be used with "simple-panel" and
+	  it understands the standard device tree
+	  (leds/backlight/gpio-backlight.txt)
+
 config VIDEO_BPP8
 	bool "Support 8-bit-per-pixel displays"
 	depends on DM_VIDEO
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 0c80dd6e80..5fff236a41 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_DM_VIDEO) += panel-uclass.o simple_panel.o
 obj-$(CONFIG_DM_VIDEO) += video-uclass.o vidconsole-uclass.o
 obj-$(CONFIG_DM_VIDEO) += video_bmp.o
 obj-$(CONFIG_BACKLIGHT_PWM) += pwm_backlight.o
+obj-$(CONFIG_BACKLIGHT_GPIO) += backlight_gpio.o
 obj-$(CONFIG_CONSOLE_NORMAL) += console_normal.o
 obj-$(CONFIG_CONSOLE_ROTATION) += console_rotate.o
 obj-$(CONFIG_CONSOLE_TRUETYPE) += console_truetype.o fonts/
diff --git a/drivers/video/backlight_gpio.c b/drivers/video/backlight_gpio.c
new file mode 100644
index 0000000000..772df5d302
--- /dev/null
+++ b/drivers/video/backlight_gpio.c
@@ -0,0 +1,74 @@
+/*
+ * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
+ * Author: Patrick Delaunay <patrick.delaunay@st.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <backlight.h>
+#include <asm/gpio.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct gpio_backlight_priv {
+	struct gpio_desc gpio;
+	bool def_value;
+};
+
+static int gpio_backlight_enable(struct udevice *dev)
+{
+	struct gpio_backlight_priv *priv = dev_get_priv(dev);
+
+	dm_gpio_set_value(&priv->gpio, 1);
+
+	return 0;
+}
+
+static int gpio_backlight_ofdata_to_platdata(struct udevice *dev)
+{
+	struct gpio_backlight_priv *priv = dev_get_priv(dev);
+	int ret;
+
+	ret = gpio_request_by_name(dev, "gpios", 0, &priv->gpio,
+				   GPIOD_IS_OUT);
+	if (ret) {
+		debug("%s: Warning: cannot get GPIO: ret=%d\n",
+		      __func__, ret);
+		return ret;
+	}
+
+	priv->def_value = dev_read_bool(dev, "default-on");
+
+	return 0;
+}
+
+static int gpio_backlight_probe(struct udevice *dev)
+{
+	struct gpio_backlight_priv *priv = dev_get_priv(dev);
+
+	if (priv->def_value)
+		gpio_backlight_enable(dev);
+
+	return 0;
+}
+
+static const struct backlight_ops gpio_backlight_ops = {
+	.enable	= gpio_backlight_enable,
+};
+
+static const struct udevice_id gpio_backlight_ids[] = {
+	{ .compatible = "gpio-backlight" },
+	{ }
+};
+
+U_BOOT_DRIVER(gpio_backlight) = {
+	.name	= "gpio_backlight",
+	.id	= UCLASS_PANEL_BACKLIGHT,
+	.of_match = gpio_backlight_ids,
+	.ops	= &gpio_backlight_ops,
+	.ofdata_to_platdata	= gpio_backlight_ofdata_to_platdata,
+	.probe		= gpio_backlight_probe,
+	.priv_auto_alloc_size	= sizeof(struct gpio_backlight_priv),
+};

commit 55451cfe2991f1be6560d6e49f6a177138dfa730
Author: Patrick Delaunay <patrick.delaunay@st.com>
Date:   Thu Aug 3 12:36:06 2017 +0200

    UPSTREAM: dm: backlight: Add CONFIG_BACKLIGHT_PWM
    
    Add a config to select individually the driver for PWM backlights.
    Manage "depends on" to be backyard compatible.
    
    Change-Id: I2028a59567fdd1918adb53d7a2d1394f02fc7f75
    Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 08a43cfbc29224dadf1d725e26697c227bf9723a)

diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 48b77eb8d7..ac50309b4b 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -14,6 +14,17 @@ config DM_VIDEO
 	  option compiles in the video uclass and routes all LCD/video access
 	  through this.
 
+config BACKLIGHT_PWM
+	bool "Generic PWM based Backlight Driver"
+	depends on DM_VIDEO && DM_PWM
+	default y
+	help
+	  If you have a LCD backlight adjustable by PWM, say Y to enable
+	  this driver.
+	  This driver can be use with "simple-panel" and
+	  it understands the standard device tree
+	  (leds/backlight/pwm-backlight.txt)
+
 config VIDEO_BPP8
 	bool "Support 8-bit-per-pixel displays"
 	depends on DM_VIDEO
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 52a7aa0e62..0c80dd6e80 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -11,9 +11,7 @@ obj-$(CONFIG_DM_VIDEO) += backlight-uclass.o
 obj-$(CONFIG_DM_VIDEO) += panel-uclass.o simple_panel.o
 obj-$(CONFIG_DM_VIDEO) += video-uclass.o vidconsole-uclass.o
 obj-$(CONFIG_DM_VIDEO) += video_bmp.o
-ifdef CONFIG_DM_VIDEO
-obj-$(CONFIG_DM_PWM) += pwm_backlight.o
-endif
+obj-$(CONFIG_BACKLIGHT_PWM) += pwm_backlight.o
 obj-$(CONFIG_CONSOLE_NORMAL) += console_normal.o
 obj-$(CONFIG_CONSOLE_ROTATION) += console_rotate.o
 obj-$(CONFIG_CONSOLE_TRUETYPE) += console_truetype.o fonts/

commit b048a4dbd0aff2e42f13b9ae711038aef15d9444
Author: Patrice Chotard <patrice.chotard@st.com>
Date:   Mon Sep 4 14:55:57 2017 +0200

    UPSTREAM: dm: test: replace dm_scan_dt() by of dm_extended_scan_fdt() in dm_do_test
    
    This allows to scan the DT including all "clocks" node's sub-nodes
    in which fixed-clock are defined.
    All fixed-clock should be defined inside a clocks node which collect all
    external oscillators. Until now, all clocks sub-nodes can't be binded except
    if the "simple-bus" compatible string is added which is a hack.
    
    Update test.dts by moving clk_fixed node inside clocks.
    
    Change-Id: I9c346d812b0ee270f9b6fc6b6f60af7c28ebb46e
    Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit ee87a097b0f66158ce2985940a5f28ba15a3552d)

diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 65b2f8ecda..e67d428eb2 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -127,10 +127,12 @@
 		compatible = "denx,u-boot-fdt-test";
 	};
 
-	clk_fixed: clk-fixed {
-		compatible = "fixed-clock";
-		#clock-cells = <0>;
-		clock-frequency = <1234>;
+	clocks {
+		clk_fixed: clk-fixed {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <1234>;
+		};
 	};
 
 	clk_sandbox: clk-sbox {
diff --git a/test/dm/test-main.c b/test/dm/test-main.c
index 9d88d31467..4478e6b8fc 100644
--- a/test/dm/test-main.c
+++ b/test/dm/test-main.c
@@ -92,7 +92,7 @@ static int dm_do_test(struct unit_test_state *uts, struct unit_test *test,
 	if (test->flags & DM_TESTF_PROBE_TEST)
 		ut_assertok(do_autoprobe(uts));
 	if (test->flags & DM_TESTF_SCAN_FDT)
-		ut_assertok(dm_scan_fdt(gd->fdt_blob, false));
+		ut_assertok(dm_extended_scan_fdt(gd->fdt_blob, false));
 
 	/*
 	 * Silence the console and rely on console reocrding to get

commit 46fb92f0e825f26713d1527f3d701fd6ffab95b8
Author: Patrice Chotard <patrice.chotard@st.com>
Date:   Mon Sep 4 14:55:56 2017 +0200

    UPSTREAM: dm: core: add clocks node scan
    
    Currently, all fixed-clock declared in "clocks" node in device tree
    can be binded by clk_fixed_rate.c driver only if each of them have
    the "simple-bus" compatible string.
    This constraint has been invoked here [1].
    
    This patch offers a solution to avoid adding "simple-bus" compatible
    string to nodes that are not busses.
    
    [1] https://patchwork.ozlabs.org/patch/558837/
    
    Change-Id: Ia267df49d4f1b84115d5e600c0f0cd5e74105f53
    Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit e81c98649b7a67d43c5baae407430a242d3b26b9)

diff --git a/drivers/core/root.c b/drivers/core/root.c
index d691d6ff94..757d109e57 100644
--- a/drivers/core/root.c
+++ b/drivers/core/root.c
@@ -312,8 +312,38 @@ int dm_scan_fdt(const void *blob, bool pre_reloc_only)
 #endif
 	return dm_scan_fdt_node(gd->dm_root, blob, 0, pre_reloc_only);
 }
+#else
+static int dm_scan_fdt_node(struct udevice *parent, const void *blob,
+			    int offset, bool pre_reloc_only)
+{
+	return 0;
+}
 #endif
 
+int dm_extended_scan_fdt(const void *blob, bool pre_reloc_only)
+{
+	int node, ret;
+
+	ret = dm_scan_fdt(gd->fdt_blob, pre_reloc_only);
+	if (ret) {
+		debug("dm_scan_fdt() failed: %d\n", ret);
+		return ret;
+	}
+
+	/* bind fixed-clock */
+	node = ofnode_to_offset(ofnode_path("/clocks"));
+	/* if no DT "clocks" node, no need to go further */
+	if (node < 0)
+		return ret;
+
+	ret = dm_scan_fdt_node(gd->dm_root, gd->fdt_blob, node,
+			       pre_reloc_only);
+	if (ret)
+		debug("dm_scan_fdt_node() failed: %d\n", ret);
+
+	return ret;
+}
+
 __weak int dm_scan_other(bool pre_reloc_only)
 {
 	return 0;
@@ -335,9 +365,9 @@ int dm_init_and_scan(bool pre_reloc_only)
 	}
 
 	if (CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)) {
-		ret = dm_scan_fdt(gd->fdt_blob, pre_reloc_only);
+		ret = dm_extended_scan_fdt(gd->fdt_blob, pre_reloc_only);
 		if (ret) {
-			debug("dm_scan_fdt() failed: %d\n", ret);
+			debug("dm_extended_scan_dt() failed: %d\n", ret);
 			return ret;
 		}
 	}
diff --git a/include/dm/root.h b/include/dm/root.h
index 50a6011644..b075eef2c1 100644
--- a/include/dm/root.h
+++ b/include/dm/root.h
@@ -55,6 +55,20 @@ int dm_scan_platdata(bool pre_reloc_only);
  */
 int dm_scan_fdt(const void *blob, bool pre_reloc_only);
 
+/**
+ * dm_extended_scan_fdt() - Scan the device tree and bind drivers
+ *
+ * This calls dm_scna_dft() which scans the device tree and creates a driver
+ * for each node. the top-level subnodes are examined and also all sub-nodes
+ * of "clocks" node.
+ *
+ * @blob: Pointer to device tree blob
+ * @pre_reloc_only: If true, bind only drivers with the DM_FLAG_PRE_RELOC
+ * flag. If false bind all drivers.
+ * @return 0 if OK, -ve on error
+ */
+int dm_extended_scan_fdt(const void *blob, bool pre_reloc_only);
+
 /**
  * dm_scan_other() - Scan for other devices
  *

commit ad6e7aa6ce528362247ba7596accdde9f5ce13bf
Author: Chris Packham <judge.packham@gmail.com>
Date:   Fri Sep 1 20:57:53 2017 +1200

    UPSTREAM: patman: add support for omitting bouncing addresses
    
    Add support for reading a list of bouncing addresses from a in-tree file
    (doc/bounces) and from the ~/.patman config file. These addresses are
    stripped from the Cc list.
    
    Change-Id: I0b4b4107a579b344034c750d63b838ef7960f96e
    Signed-off-by: Chris Packham <judge.packham@gmail.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com <mailto:philipp.tomsich@theobroma-systems.com>>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit e11aa602abd3e8007dfd3ed23ebb829101abcfec)

diff --git a/doc/bounces b/doc/bounces
new file mode 100644
index 0000000000..d1c5f0d246
--- /dev/null
+++ b/doc/bounces
@@ -0,0 +1,3 @@
+# List of addresses picked up by patman/get_maintainer.pl that are known to
+# bounce. Addresses are listed one per line and need to match the author
+# information recorded in git.
diff --git a/tools/patman/README b/tools/patman/README
index e36857dede..8582ed6ba1 100644
--- a/tools/patman/README
+++ b/tools/patman/README
@@ -84,6 +84,18 @@ Aliases are recursive.
 The checkpatch.pl in the U-Boot tools/ subdirectory will be located and
 used. Failing that you can put it into your path or ~/bin/checkpatch.pl
 
+If you want to avoid sending patches to email addresses that are picked up
+by patman but are known to bounce you can add a [bounces] section to your
+.patman file. Unlike the [alias] section these are simple key: value pairs
+that are not recursive.
+
+>>>
+
+[bounces]
+gonefishing: Fred Bloggs <f.bloggs@napier.net>
+
+<<<
+
 
 If you want to change the defaults for patman's command-line arguments,
 you can add a [settings] section to your .patman file.  This can be used
diff --git a/tools/patman/series.py b/tools/patman/series.py
index d3947a7c2a..73ee394486 100644
--- a/tools/patman/series.py
+++ b/tools/patman/series.py
@@ -10,6 +10,7 @@ import os
 
 import get_maintainer
 import gitutil
+import settings
 import terminal
 
 # Series-xxx tags that we understand
@@ -218,6 +219,7 @@ class Series(dict):
         Return:
             Filename of temp file created
         """
+        col = terminal.Color()
         # Look for commit tags (of the form 'xxx:' at the start of the subject)
         fname = '/tmp/patman.%d' % os.getpid()
         fd = open(fname, 'w')
@@ -233,6 +235,9 @@ class Series(dict):
                 cc += add_maintainers
             elif add_maintainers:
                 cc += get_maintainer.GetMaintainer(commit.patch)
+            for x in set(cc) & set(settings.bounces):
+                print(col.Color(col.YELLOW, 'Skipping "%s"' % x))
+            cc = set(cc) - set(settings.bounces)
             cc = [m.encode('utf-8') if type(m) != str else m for m in cc]
             all_ccs += cc
             print(commit.patch, ', '.join(set(cc)), file=fd)
diff --git a/tools/patman/settings.py b/tools/patman/settings.py
index 5f207f5ef1..d735ff9ba3 100644
--- a/tools/patman/settings.py
+++ b/tools/patman/settings.py
@@ -269,6 +269,19 @@ def _ReadAliasFile(fname):
         if bad_line:
             print(bad_line)
 
+def _ReadBouncesFile(fname):
+    """Read in the bounces file if it exists
+
+    Args:
+        fname: Filename to read.
+    """
+    if os.path.exists(fname):
+        with open(fname) as fd:
+            for line in fd:
+                if line.startswith('#'):
+                    continue
+                bounces.add(line.strip())
+
 def Setup(parser, project_name, config_fname=''):
     """Set up the settings module by reading config files.
 
@@ -293,10 +306,15 @@ def Setup(parser, project_name, config_fname=''):
     for name, value in config.items('alias'):
         alias[name] = value.split(',')
 
+    _ReadBouncesFile('doc/bounces')
+    for name, value in config.items('bounces'):
+        bounces.add(value)
+
     _UpdateDefaults(parser, config)
 
 # These are the aliases we understand, indexed by alias. Each member is a list.
 alias = {}
+bounces = set()
 
 if __name__ == "__main__":
     import doctest

commit 48545cfb0797939abe0e0b0d6ed136e720d55616
Author: Simon Glass <sjg@chromium.org>
Date:   Sun Aug 13 16:02:54 2017 -0600

    UPSTREAM: moveconfig: Use fd.write() instead of print >>
    
    Adjust this code so that it can work with Python 2 and 3.
    
    Fixes: d73fcb1 (moveconfig: Support building a simple config database)
    Change-Id: Ifad4813594adfaf6504cc85f2ee99afb9d1c0fd2
    Reported-by: Chris Packham <judge.packham@gmail.com>
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit c79d18c4b40d10c0a95b56e51f4517aca4515364)

diff --git a/lib/libfdt/pylibfdt/libfdt.i b/lib/libfdt/pylibfdt/libfdt.i
index 6c44996c31..5b1a8cf4d4 100644
--- a/lib/libfdt/pylibfdt/libfdt.i
+++ b/lib/libfdt/pylibfdt/libfdt.i
@@ -8,6 +8,8 @@
 
 %module libfdt
 
+%include <stdint.i>
+
 %{
 #define SWIG_FILE_WITH_INIT
 #include "libfdt.h"
diff --git a/tools/moveconfig.py b/tools/moveconfig.py
index 8a03850192..6f549a51c1 100755
--- a/tools/moveconfig.py
+++ b/tools/moveconfig.py
@@ -1877,10 +1877,10 @@ def main():
     if options.build_db:
         with open(CONFIG_DATABASE, 'w') as fd:
             for defconfig, configs in config_db.iteritems():
-                print >>fd, '%s' % defconfig
+                fd.write('%s\n' % defconfig)
                 for config in sorted(configs.keys()):
-                    print >>fd, '   %s=%s' % (config, configs[config])
-                print >>fd
+                    fd.write('   %s=%s\n' % (config, configs[config]))
+                fd.write('\n')
 
 if __name__ == '__main__':
     main()

commit 17c82fdc12e24b32e49a3b53f59b8b2f6b136f8b
Author: Simon Glass <sjg@chromium.org>
Date:   Sat Aug 5 15:45:54 2017 -0600

    UPSTREAM: dm: core: Add ofnode_for_each_subnode()
    
    Add a convenience macro to iterate over subnodes of a node. Make use of
    this where appropriate in the code.
    
    Change-Id: Iae0fb554472d0b5819d26becbbcf8909ff891514
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 3991f42ed2e38aff28ba3c24369bfbd90620bea7)

diff --git a/arch/arm/mach-tegra/xusb-padctl-common.c b/arch/arm/mach-tegra/xusb-padctl-common.c
index 37b5b8fb5b..abc18c03a5 100644
--- a/arch/arm/mach-tegra/xusb-padctl-common.c
+++ b/arch/arm/mach-tegra/xusb-padctl-common.c
@@ -224,9 +224,7 @@ tegra_xusb_padctl_config_parse_dt(struct tegra_xusb_padctl *padctl,
 
 	config->name = ofnode_get_name(node);
 
-	for (subnode = ofnode_first_subnode(node);
-	     ofnode_valid(subnode);
-	     subnode = ofnode_next_subnode(subnode)) {
+	ofnode_for_each_subnode(subnode, node) {
 		struct tegra_xusb_padctl_group *group;
 		int err;
 
@@ -256,9 +254,7 @@ static int tegra_xusb_padctl_parse_dt(struct tegra_xusb_padctl *padctl,
 		return err;
 	}
 
-	for (subnode = ofnode_first_subnode(node);
-	     ofnode_valid(subnode);
-	     subnode = ofnode_next_subnode(subnode)) {
+	ofnode_for_each_subnode(subnode, node) {
 		struct tegra_xusb_padctl_config *config = &padctl->config;
 
 		debug("%s: subnode=%s\n", __func__, ofnode_get_name(subnode));
diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index 0685b689d8..c6ca13fabf 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -390,10 +390,11 @@ int ofnode_decode_display_timing(ofnode parent, int index,
 	if (!ofnode_valid(timings))
 		return -EINVAL;
 
-	for (i = 0, node = ofnode_first_subnode(timings);
-	     ofnode_valid(node) && i != index;
-	     node = ofnode_first_subnode(node))
-		i++;
+	i = 0;
+	ofnode_for_each_subnode(node, timings) {
+		if (i++ == index)
+			break;
+	}
 
 	if (!ofnode_valid(node))
 		return -EINVAL;
diff --git a/drivers/misc/cros_ec.c b/drivers/misc/cros_ec.c
index feaa5d8567..eefaaa53ad 100644
--- a/drivers/misc/cros_ec.c
+++ b/drivers/misc/cros_ec.c
@@ -1038,8 +1038,7 @@ int cros_ec_decode_ec_flash(struct udevice *dev, struct fdt_cros_ec *config)
 
 	config->flash_erase_value = ofnode_read_s32_default(flash_node,
 							    "erase-value", -1);
-	for (node = ofnode_first_subnode(flash_node); ofnode_valid(node);
-	     node = ofnode_next_subnode(node)) {
+	ofnode_for_each_subnode(node, flash_node) {
 		const char *name = ofnode_get_name(node);
 		enum ec_flash_region region;
 
diff --git a/drivers/power/pmic/pmic-uclass.c b/drivers/power/pmic/pmic-uclass.c
index 9b8d8571e2..152a5ef6c5 100644
--- a/drivers/power/pmic/pmic-uclass.c
+++ b/drivers/power/pmic/pmic-uclass.c
@@ -34,9 +34,7 @@ int pmic_bind_children(struct udevice *pmic, ofnode parent,
 	debug("%s for '%s' at node offset: %d\n", __func__, pmic->name,
 	      dev_of_offset(pmic));
 
-	for (node = ofnode_first_subnode(parent);
-	     ofnode_valid(node);
-	     node = ofnode_next_subnode(node)) {
+	ofnode_for_each_subnode(node, parent) {
 		node_name = ofnode_get_name(node);
 
 		debug("* Found child node: '%s'\n", node_name);
diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index de2769ed53..79374b8f91 100644
--- a/include/dm/ofnode.h
+++ b/include/dm/ofnode.h
@@ -628,4 +628,28 @@ int ofnode_read_resource(ofnode node, uint index, struct resource *res);
 int ofnode_read_resource_byname(ofnode node, const char *name,
 				struct resource *res);
 
+/**
+ * ofnode_for_each_subnode() - iterate over all subnodes of a parent
+ *
+ * @node:       child node (ofnode, lvalue)
+ * @parent:     parent node (ofnode)
+ *
+ * This is a wrapper around a for loop and is used like so:
+ *
+ *	ofnode node;
+ *
+ *	ofnode_for_each_subnode(node, parent) {
+ *		Use node
+ *		...
+ *	}
+ *
+ * Note that this is implemented as a macro and @node is used as
+ * iterator in the loop. The parent variable can be a constant or even a
+ * literal.
+ */
+#define ofnode_for_each_subnode(node, parent) \
+	for (node = ofnode_first_subnode(parent); \
+	     ofnode_valid(node); \
+	     node = ofnode_next_subnode(node))
+
 #endif

commit 0c69cd527fe67bb2fe6a2afc655fbc932be57de3
Author: Simon Glass <sjg@chromium.org>
Date:   Fri Aug 4 03:30:30 2017 -0600

    UPSTREAM: genconfig.py: Print defconfig next to warnings
    
    At present we sometimes see warnings of the form:
    
    /tmp/tmpMA89kB:36: warning: overriding the value of CMD_SPL.
            Old value: "y", new value: "y".
    
    This is not very useful as it does not show whch defconfig file it relates
    to. Update the tool to show this.
    
    Change-Id: Ib4e5c75fa4e7948744d293a8b4d8f07e4474a0ff
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 8639f69a61b47971dba47ab5ed72e47436729bb1)

diff --git a/tools/buildman/kconfiglib.py b/tools/buildman/kconfiglib.py
index d28bbf0b49..352ad438ee 100644
--- a/tools/buildman/kconfiglib.py
+++ b/tools/buildman/kconfiglib.py
@@ -204,6 +204,7 @@ class Config(object):
 
         self.print_warnings = print_warnings
         self.print_undef_assign = print_undef_assign
+        self._warnings = []
 
         # For parsing routines that stop when finding a line belonging to a
         # different construct, these holds that line and the tokenized version
@@ -398,8 +399,12 @@ class Config(object):
           need to refer to the top-level kernel directory with "$srctree".
 
         replace (default: True): True if the configuration should replace the
-           old configuration; False if it should add to it."""
+           old configuration; False if it should add to it.
 
+        Returns a list or warnings (hopefully empty)
+        """
+
+        self._warnings = []
         # Put this first so that a missing file doesn't screw up our state
         filename = os.path.expandvars(filename)
         line_feeder = _FileFeed(filename)
@@ -449,7 +454,7 @@ class Config(object):
         while 1:
             line = line_feeder.get_next()
             if line is None:
-                return
+                return self._warnings
 
             line = line.rstrip()
 
@@ -1763,8 +1768,10 @@ class Config(object):
 
     def _warn(self, msg, filename=None, linenr=None):
         """For printing warnings to stderr."""
+        msg = _build_msg("warning: " + msg, filename, linenr)
         if self.print_warnings:
-            _stderr_msg("warning: " + msg, filename, linenr)
+            sys.stderr.write(msg + "\n")
+        self._warnings.append(msg)
 
 class Item(object):
 
@@ -3369,10 +3376,13 @@ def _clean_up_path(path):
         path = path[2:]
     return path.rstrip("/")
 
-def _stderr_msg(msg, filename, linenr):
+def _build_msg(msg, filename, linenr):
     if filename is not None:
-        sys.stderr.write("{0}:{1}: ".format(_clean_up_path(filename), linenr))
-    sys.stderr.write(msg + "\n")
+        msg = "{0}:{1}: ".format(_clean_up_path(filename), linenr) + msg
+    return msg
+
+def _stderr_msg(msg, filename, linenr):
+    sys.stderr.write(_build_msg(msg, filename, linenr) + "\n")
 
 def _tokenization_error(s, filename, linenr):
     loc = "" if filename is None else "{0}:{1}: ".format(filename, linenr)
diff --git a/tools/genboardscfg.py b/tools/genboardscfg.py
index 2e871feaf4..2345a19798 100755
--- a/tools/genboardscfg.py
+++ b/tools/genboardscfg.py
@@ -124,7 +124,7 @@ class KconfigScanner:
         os.environ['srctree'] = os.getcwd()
         os.environ['UBOOTVERSION'] = 'dummy'
         os.environ['KCONFIG_OBJDIR'] = ''
-        self._conf = kconfiglib.Config()
+        self._conf = kconfiglib.Config(print_warnings=False)
 
     def __del__(self):
         """Delete a leftover temporary file before exit.
@@ -166,7 +166,10 @@ class KconfigScanner:
                 else:
                     f.write(line[colon + 1:])
 
-        self._conf.load_config(self._tmpfile)
+        warnings = self._conf.load_config(self._tmpfile)
+        if warnings:
+            for warning in warnings:
+                print '%s: %s' % (defconfig, warning)
 
         try_remove(self._tmpfile)
         self._tmpfile = None

commit ae9ecb978128e63bfe851dc9a651f68102478cd2
Author: Simon Glass <sjg@chromium.org>
Date:   Wed Aug 2 12:12:02 2017 -0600

    UPSTREAM: dm: core: Show driver name with 'dm tree'
    
    It is often useful to see which driver was actually selected for each
    device. Add a new 'Driver' column to provide this information. Sample
    output:
    
     Class       Probed   Driver     Name
    ----------------------------------------
     root        [ + ]    root_drive root_driver
     keyboard    [ + ]    i8042_kbd  |-- keyboard
     serial      [ + ]    ns16550_se |-- serial
     rtc         [   ]    rtc_mc1468 |-- rtc
     timer       [ + ]    tsc_timer  |-- tsc-timer
     syscon      [ + ]    ich6_pinct |-- pch_pinctrl
     pci         [ + ]    pci_x86    |-- pci
     northbridge [ + ]    bd82x6x_no |   |-- northbridge@0,0
     video       [ + ]    bd82x6x_vi |   |-- gma@2,0
     vidconsole0 [ + ]    vidconsole |   |   `-- gma@2,0.vidconsole0
    ...
    
    Change-Id: Ib6ed67d9de2d94f9aae4d4a180a71191a0836786
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Tested-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit ee3e520dad0b368df4541cd0af0d4011cf481e5b)

diff --git a/drivers/core/dump.c b/drivers/core/dump.c
index 1bb64098f4..6c6b944453 100644
--- a/drivers/core/dump.c
+++ b/drivers/core/dump.c
@@ -16,8 +16,8 @@ static void show_devices(struct udevice *dev, int depth, int last_flag)
 	struct udevice *child;
 
 	/* print the first 11 characters to not break the tree-format. */
-	printf(" %-10.10s [ %c ]    ", dev->uclass->uc_drv->name,
-	       dev->flags & DM_FLAG_ACTIVATED ? '+' : ' ');
+	printf(" %-10.10s [ %c ]   %-10.10s  ", dev->uclass->uc_drv->name,
+	       dev->flags & DM_FLAG_ACTIVATED ? '+' : ' ', dev->driver->name);
 
 	for (i = depth; i >= 0; i--) {
 		is_last = (last_flag >> i) & 1;
@@ -48,7 +48,7 @@ void dm_dump_all(void)
 
 	root = dm_root();
 	if (root) {
-		printf(" Class      Probed   Name\n");
+		printf(" Class      Probed  Driver      Name\n");
 		printf("----------------------------------------\n");
 		show_devices(root, -1, 0);
 	}

commit 58b0f0021c478d47a95fa2b52df8b50a7fb2f082
Author: Simon Glass <sjg@chromium.org>
Date:   Wed Aug 2 12:12:01 2017 -0600

    UPSTREAM: dm: core: Drop use of strlcpy()
    
    We can use printf() to limit the string width. Adjust the code to do this
    instead of using strlcpy() which is a bit clumbsy.
    
    Change-Id: I69e67116ac1e955498ff886c7daa7461e1fa17ab
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Tested-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit a0f9acb08bd6f3b4a6f3adcb02c8170e522c074a)

diff --git a/drivers/core/dump.c b/drivers/core/dump.c
index c3e109e7ed..1bb64098f4 100644
--- a/drivers/core/dump.c
+++ b/drivers/core/dump.c
@@ -14,11 +14,9 @@ static void show_devices(struct udevice *dev, int depth, int last_flag)
 {
 	int i, is_last;
 	struct udevice *child;
-	char class_name[12];
 
 	/* print the first 11 characters to not break the tree-format. */
-	strlcpy(class_name, dev->uclass->uc_drv->name, sizeof(class_name));
-	printf(" %-11s [ %c ]    ", class_name,
+	printf(" %-10.10s [ %c ]    ", dev->uclass->uc_drv->name,
 	       dev->flags & DM_FLAG_ACTIVATED ? '+' : ' ');
 
 	for (i = depth; i >= 0; i--) {
@@ -50,7 +48,7 @@ void dm_dump_all(void)
 
 	root = dm_root();
 	if (root) {
-		printf(" Class       Probed   Name\n");
+		printf(" Class      Probed   Name\n");
 		printf("----------------------------------------\n");
 		show_devices(root, -1, 0);
 	}

commit 9ff3d0147e970e15128c2e0436f2f4069b687ad4
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Sat Aug 26 00:50:17 2017 +0900

    UPSTREAM: dma: import linux/dma-direction.h to consolidate enum dma_data_direction
    
    Import include/linux/dma-direction.h from Linux 4.13-rc7 and delete
    duplicated definitions of enum dma_data_direction.
    
    Change-Id: I9c6569e4ab91ac82fb1c99a38003a1ac48061813
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit b27af39935855c88ef2203dcfc1ff54e013237c4)

diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h
index a5821f54e5..287466800e 100644
--- a/arch/arm/include/asm/dma-mapping.h
+++ b/arch/arm/include/asm/dma-mapping.h
@@ -8,13 +8,9 @@
 #ifndef __ASM_ARM_DMA_MAPPING_H
 #define __ASM_ARM_DMA_MAPPING_H
 
-#define	dma_mapping_error(x, y)	0
+#include <linux/dma-direction.h>
 
-enum dma_data_direction {
-	DMA_BIDIRECTIONAL	= 0,
-	DMA_TO_DEVICE		= 1,
-	DMA_FROM_DEVICE		= 2,
-};
+#define	dma_mapping_error(x, y)	0
 
 static inline void *dma_alloc_coherent(size_t len, unsigned long *handle)
 {
diff --git a/arch/nds32/include/asm/dma-mapping.h b/arch/nds32/include/asm/dma-mapping.h
index 25e5a1b6ec..a627306ed8 100644
--- a/arch/nds32/include/asm/dma-mapping.h
+++ b/arch/nds32/include/asm/dma-mapping.h
@@ -7,11 +7,7 @@
 #ifndef __ASM_NDS_DMA_MAPPING_H
 #define __ASM_NDS_DMA_MAPPING_H
 
-enum dma_data_direction {
-	DMA_BIDIRECTIONAL	= 0,
-	DMA_TO_DEVICE		= 1,
-	DMA_FROM_DEVICE		= 2,
-};
+#include <linux/dma-direction.h>
 
 static void *dma_alloc_coherent(size_t len, unsigned long *handle)
 {
diff --git a/arch/x86/include/asm/dma-mapping.h b/arch/x86/include/asm/dma-mapping.h
index 7de4c08e36..43073ad252 100644
--- a/arch/x86/include/asm/dma-mapping.h
+++ b/arch/x86/include/asm/dma-mapping.h
@@ -8,13 +8,9 @@
 #ifndef __ASM_X86_DMA_MAPPING_H
 #define __ASM_X86_DMA_MAPPING_H
 
-#define	dma_mapping_error(x, y)	0
+#include <linux/dma-direction.h>
 
-enum dma_data_direction {
-	DMA_BIDIRECTIONAL	= 0,
-	DMA_TO_DEVICE		= 1,
-	DMA_FROM_DEVICE		= 2,
-};
+#define	dma_mapping_error(x, y)	0
 
 static inline void *dma_alloc_coherent(size_t len, unsigned long *handle)
 {
diff --git a/drivers/ata/sata_dwc.c b/drivers/ata/sata_dwc.c
index a226ca2dec..2f3b2ddb41 100644
--- a/drivers/ata/sata_dwc.c
+++ b/drivers/ata/sata_dwc.c
@@ -26,6 +26,7 @@
 #include <command.h>
 #include <pci.h>
 #include <asm/processor.h>
+#include <linux/dma-direction.h>
 #include <linux/errno.h>
 #include <asm/io.h>
 #include <malloc.h>
diff --git a/drivers/ata/sata_dwc.h b/drivers/ata/sata_dwc.h
index e2d9e0c1fc..17fb20cf43 100644
--- a/drivers/ata/sata_dwc.h
+++ b/drivers/ata/sata_dwc.h
@@ -401,13 +401,6 @@ struct ata_device {
 #endif
 };
 
-enum dma_data_direction {
-	DMA_BIDIRECTIONAL = 0,
-	DMA_TO_DEVICE = 1,
-	DMA_FROM_DEVICE = 2,
-	DMA_NONE = 3,
-};
-
 struct ata_link {
 	struct ata_port		*ap;
 	int			pmp;
diff --git a/drivers/mmc/uniphier-sd.c b/drivers/mmc/uniphier-sd.c
index 398bd5648a..7d582c2bf9 100644
--- a/drivers/mmc/uniphier-sd.c
+++ b/drivers/mmc/uniphier-sd.c
@@ -11,10 +11,10 @@
 #include <mmc.h>
 #include <dm.h>
 #include <linux/compat.h>
+#include <linux/dma-direction.h>
 #include <linux/io.h>
 #include <linux/sizes.h>
 #include <asm/unaligned.h>
-#include <asm/dma-mapping.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/include/linux/dma-direction.h b/include/linux/dma-direction.h
new file mode 100644
index 0000000000..95b6a82f59
--- /dev/null
+++ b/include/linux/dma-direction.h
@@ -0,0 +1,13 @@
+#ifndef _LINUX_DMA_DIRECTION_H
+#define _LINUX_DMA_DIRECTION_H
+/*
+ * These definitions mirror those in pci.h, so they can be used
+ * interchangeably with their PCI_ counterparts.
+ */
+enum dma_data_direction {
+	DMA_BIDIRECTIONAL = 0,
+	DMA_TO_DEVICE = 1,
+	DMA_FROM_DEVICE = 2,
+	DMA_NONE = 3,
+};
+#endif

commit 91603e0221f3dc234ebae7d9531538b8beb69342
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Thu Aug 17 15:55:50 2017 +0800

    UPSTREAM: armv8: mmu: add space around operator
    
    Add space around operator "+", make it
    match the coding style.
    
    Change-Id: I5cb1e3cea056db89d7ac0c16c233228d39bf6675
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: York Sun <york.sun@nxp.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 347e30e1720ea6c0231f81d278b076a39280a314)

diff --git a/arch/arm/include/asm/armv8/mmu.h b/arch/arm/include/asm/armv8/mmu.h
index 7752741028..6121aab547 100644
--- a/arch/arm/include/asm/armv8/mmu.h
+++ b/arch/arm/include/asm/armv8/mmu.h
@@ -16,7 +16,7 @@
 #undef  PAGE_SIZE
 #define PAGE_SHIFT		12
 #define PAGE_SIZE		(1 << PAGE_SHIFT)
-#define PAGE_MASK		(~(PAGE_SIZE-1))
+#define PAGE_MASK		(~(PAGE_SIZE - 1))
 
 /***************************************************************/
 

commit 3d53e4e6800955f28728c3c2359e648078cd635b
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Thu Aug 17 15:55:01 2017 +0800

    UPSTREAM: armv8: mmu: remove unused macro definition
    
    Macro VA_BITS and PTE_BLOCK_BITS are not used
    in the code, so remove them.
    
    Change-Id: I5a6b900c8d1d145f28d1604c9b614226c20159d5
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: York Sun <york.sun@nxp.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 4f84cb980fdc25d7735fe114021b4a84ea601b9f)

diff --git a/arch/arm/include/asm/armv8/mmu.h b/arch/arm/include/asm/armv8/mmu.h
index a34990368e..7752741028 100644
--- a/arch/arm/include/asm/armv8/mmu.h
+++ b/arch/arm/include/asm/armv8/mmu.h
@@ -8,15 +8,6 @@
 #ifndef _ASM_ARMV8_MMU_H_
 #define _ASM_ARMV8_MMU_H_
 
-/***************************************************************/
-/*
- * The following definitions are related each other, shoud be
- * calculated specifically.
- */
-
-#define VA_BITS			CONFIG_SYS_VA_BITS
-#define PTE_BLOCK_BITS		CONFIG_SYS_PTL2_BITS
-
 /*
  * block/section address mask and size definitions.
  */
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index aeb490718e..46cd9299dd 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -4422,7 +4422,6 @@ CONFIG_SYS_PSDPAR
 CONFIG_SYS_PSSR_VAL
 CONFIG_SYS_PTCPAR
 CONFIG_SYS_PTDPAR
-CONFIG_SYS_PTL2_BITS
 CONFIG_SYS_PTV
 CONFIG_SYS_PUAPAR
 CONFIG_SYS_QE_FMAN_FW_IN_MMC
@@ -4797,7 +4796,6 @@ CONFIG_SYS_USE_SERIALFLASH
 CONFIG_SYS_USE_SPIFLASH
 CONFIG_SYS_USR_EXCEP
 CONFIG_SYS_U_BOOT_OFFS
-CONFIG_SYS_VA_BITS
 CONFIG_SYS_VCXK_ACKNOWLEDGE_DDR
 CONFIG_SYS_VCXK_ACKNOWLEDGE_PIN
 CONFIG_SYS_VCXK_ACKNOWLEDGE_PORT

commit ebec805a62161a19e71ec21dcae62d145a4f23fb
Author: York Sun <york.sun@nxp.com>
Date:   Tue Aug 15 11:14:45 2017 -0700

    UPSTREAM: spl: fit: Add booting OS first
    
    If CONFIG_SPL_OS_BOOT is enabled, boot OS if kernel image is found
    in FIT structure.
    
    Change-Id: I6fcb0a0ac05e4d548b2bce93f9def04c12294998
    Signed-off-by: York Sun <york.sun@nxp.com>
    Reviewed-by: Tom Rini <trini@konsulko.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit c8bc3c0c9ff7ce649b2af1416919b50ecf504874)

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 9449a225ff..49ccf1c17b 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -222,13 +222,16 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 	ulong size;
 	unsigned long count;
 	struct spl_image_info image_info;
-	int node, images, ret;
+	bool boot_os = false;
+	int node = -1;
+	int images, ret;
 	int base_offset, align_len = ARCH_DMA_MINALIGN - 1;
 	int index = 0;
 
 	/*
-	 * Figure out where the external images start. This is the base for the
-	 * data-offset properties in each image.
+	 * For FIT with external data, figure out where the external images
+	 * start. This is the base for the data-offset properties in each
+	 * image.
 	 */
 	size = fdt_totalsize(fit);
 	size = (size + 3) & ~3;
@@ -247,6 +250,9 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 	 *
 	 * In fact the FIT has its own load address, but we assume it cannot
 	 * be before CONFIG_SYS_TEXT_BASE.
+	 *
+	 * For FIT with data embedded, data is loaded as part of FIT image.
+	 * For FIT with external data, data is not loaded in this step.
 	 */
 	fit = (void *)((CONFIG_SYS_TEXT_BASE - size - info->bl_len -
 			align_len) & ~align_len);
@@ -264,8 +270,17 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 		return -1;
 	}
 
+#ifdef CONFIG_SPL_OS_BOOT
+	/* Find OS image first */
+	node = spl_fit_get_image_node(fit, images, FIT_KERNEL_PROP, 0);
+	if (node < 0)
+		debug("No kernel image.\n");
+	else
+		boot_os = true;
+#endif
 	/* find the U-Boot image */
-	node = spl_fit_get_image_node(fit, images, "firmware", 0);
+	if (node < 0)
+		node = spl_fit_get_image_node(fit, images, "firmware", 0);
 	if (node < 0) {
 		debug("could not find firmware image, trying loadables...\n");
 		node = spl_fit_get_image_node(fit, images, "loadables", 0);
@@ -287,24 +302,31 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 	if (ret)
 		return ret;
 
+#ifdef CONFIG_SPL_OS_BOOT
+	if (!fit_image_get_os(fit, node, &spl_image->os))
+		debug("Image OS is %s\n", genimg_get_os_name(spl_image->os));
+#else
 	spl_image->os = IH_OS_U_BOOT;
+#endif
 
-	/* Figure out which device tree the board wants to use */
-	node = spl_fit_get_image_node(fit, images, FIT_FDT_PROP, 0);
-	if (node < 0) {
-		debug("%s: cannot find FDT node\n", __func__);
-		return node;
-	}
+	if (!boot_os) {
+		/* Figure out which device tree the board wants to use */
+		node = spl_fit_get_image_node(fit, images, FIT_FDT_PROP, 0);
+		if (node < 0) {
+			debug("%s: cannot find FDT node\n", __func__);
+			return node;
+		}
 
-	/*
-	 * Read the device tree and place it after the image.
-	 * Align the destination address to ARCH_DMA_MINALIGN.
-	 */
-	image_info.load_addr = spl_image->load_addr + spl_image->size;
-	ret = spl_load_fit_image(info, sector, fit, base_offset, node,
-				 &image_info);
-	if (ret < 0)
-		return ret;
+		/*
+		 * Read the device tree and place it after the image.
+		 * Align the destination address to ARCH_DMA_MINALIGN.
+		 */
+		image_info.load_addr = spl_image->load_addr + spl_image->size;
+		ret = spl_load_fit_image(info, sector, fit, base_offset, node,
+					 &image_info);
+		if (ret < 0)
+			return ret;
+	}
 
 	/* Now check if there are more images for us to load */
 	for (; ; index++) {
diff --git a/doc/uImage.FIT/multi_spl.its b/doc/uImage.FIT/multi_spl.its
index e5551d42b7..d43563d87a 100644
--- a/doc/uImage.FIT/multi_spl.its
+++ b/doc/uImage.FIT/multi_spl.its
@@ -4,6 +4,13 @@
  * (Bogus) example FIT image description file demonstrating the usage
  * of multiple images loaded by the SPL.
  * Several binaries will be loaded at their respective load addresses.
+ *
+ * For booting U-Boot, "firmware" is searched first. If not found, "loadables"
+ * is used to identify images to be loaded into memory. If falcon boot is
+ * enabled, "kernel" is searched first. If not found, it falls back to the
+ * same flow as booting U-Boot. Changing image type will result skipping
+ * specific image.
+ *
  * Finally the one image specifying an entry point will be entered by the SPL.
  */
 

commit 0ea10b9f858f75b909254e8d48cacf8e79a60896
Author: York Sun <york.sun@nxp.com>
Date:   Tue Aug 15 11:14:44 2017 -0700

    UPSTREAM: spl: fit: Support both external and embedded data
    
    SPL supports U-Boot image in FIT format which has data outside of
    FIT structure. This adds support for embedded data for normal FIT
    images.
    
    Change-Id: Iad87ee9d443259a6af53f0473dc1b97db083df8d
    Signed-off-by: York Sun <york.sun@nxp.com>
    Reviewed-by: Tom Rini <trini@konsulko.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 5fd13d973613d308663f97b51059ecd9179baf09)

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index fe41ce02d2..9449a225ff 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -132,14 +132,16 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 			      void *fit, ulong base_offset, int node,
 			      struct spl_image_info *image_info)
 {
-	ulong offset;
+	int offset;
 	size_t length;
+	int len;
 	ulong load_addr, load_ptr;
 	void *src;
 	ulong overhead;
 	int nr_sectors;
 	int align_len = ARCH_DMA_MINALIGN - 1;
 	uint8_t image_comp = -1, type = -1;
+	const void *data;
 
 	if (IS_ENABLED(CONFIG_SPL_OS_BOOT) && IS_ENABLED(CONFIG_SPL_GZIP)) {
 		if (fit_image_get_comp(fit, node, &image_comp))
@@ -153,28 +155,40 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 			debug("%s ", genimg_get_type_name(type));
 	}
 
-	offset = fdt_getprop_u32(fit, node, "data-offset");
-	if (offset == FDT_ERROR)
-		return -ENOENT;
-	offset += base_offset;
-	length = fdt_getprop_u32(fit, node, "data-size");
-	if (length == FDT_ERROR)
-		return -ENOENT;
-	load_addr = fdt_getprop_u32(fit, node, "load");
-	if (load_addr == FDT_ERROR && image_info)
+	if (fit_image_get_load(fit, node, &load_addr))
 		load_addr = image_info->load_addr;
-	load_ptr = (load_addr + align_len) & ~align_len;
 
-	overhead = get_aligned_image_overhead(info, offset);
-	nr_sectors = get_aligned_image_size(info, length, offset);
+	if (!fit_image_get_data_offset(fit, node, &offset)) {
+		/* External data */
+		offset += base_offset;
+		if (fit_image_get_data_size(fit, node, &len))
+			return -ENOENT;
 
-	if (info->read(info, sector + get_aligned_image_offset(info, offset),
-		       nr_sectors, (void*)load_ptr) != nr_sectors)
-		return -EIO;
-	debug("image dst=%lx, offset=%lx, size=%lx\n", load_ptr, offset,
-	      (unsigned long)length);
+		load_ptr = (load_addr + align_len) & ~align_len;
+		length = len;
+
+		overhead = get_aligned_image_overhead(info, offset);
+		nr_sectors = get_aligned_image_size(info, length, offset);
+
+		if (info->read(info,
+			       sector + get_aligned_image_offset(info, offset),
+			       nr_sectors, (void *)load_ptr) != nr_sectors)
+			return -EIO;
+
+		debug("External data: dst=%lx, offset=%x, size=%lx\n",
+		      load_ptr, offset, (unsigned long)length);
+		src = (void *)load_ptr + overhead;
+	} else {
+		/* Embedded data */
+		if (fit_image_get_data(fit, node, &data, &length)) {
+			puts("Cannot get image data/size\n");
+			return -ENOENT;
+		}
+		debug("Embedded data: dst=%lx, size=%lx\n", load_addr,
+		      (unsigned long)length);
+		src = (void *)data;
+	}
 
-	src = (void *)load_ptr + overhead;
 #ifdef CONFIG_SPL_FIT_IMAGE_POST_PROCESS
 	board_fit_image_post_process(&src, &length);
 #endif
diff --git a/doc/uImage.FIT/source_file_format.txt b/doc/uImage.FIT/source_file_format.txt
index 136d3d7078..32825eda8d 100644
--- a/doc/uImage.FIT/source_file_format.txt
+++ b/doc/uImage.FIT/source_file_format.txt
@@ -288,6 +288,10 @@ The 'data-offset' property can be substituted with 'data-position', which
 defines an absolute position or address as the offset. This is helpful when
 booting U-Boot proper before performing relocation.
 
+Normal kernel FIT image has data embedded within FIT structure. U-Boot image
+for SPL boot has external data. Existence of 'data-offset' can be used to
+identify which format is used.
+
 9) Examples
 -----------
 

commit 40484c6d8ce3fca223208d25925a1948b50dc72e
Author: York Sun <york.sun@nxp.com>
Date:   Tue Aug 15 11:14:42 2017 -0700

    UPSTREAM: cmd: spl: Fix compiling warning
    
    Fix warning "cast from pointer to integer of different size".
    
    Change-Id: Ib6306c30cdbfc180c5cd452def44eb661cc4fc28
    Signed-off-by: York Sun <york.sun@nxp.com>
    Reviewed-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit d1f2ee7021dc4a89f43e25f289747a27da0e930f)

diff --git a/cmd/spl.c b/cmd/spl.c
index ad033652d4..4d84492346 100644
--- a/cmd/spl.c
+++ b/cmd/spl.c
@@ -109,12 +109,12 @@ static int spl_export(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 
 	c = find_cmd_tbl(argv[1], &cmd_spl_export_sub[0],
 		ARRAY_SIZE(cmd_spl_export_sub));
-	if ((c) && ((int)c->cmd <= SPL_EXPORT_LAST)) {
+	if ((c) && ((long)c->cmd <= SPL_EXPORT_LAST)) {
 		argc -= 2;
 		argv += 2;
-		if (call_bootm(argc, argv, subcmd_list[(int)c->cmd]))
+		if (call_bootm(argc, argv, subcmd_list[(long)c->cmd]))
 			return -1;
-		switch ((int)c->cmd) {
+		switch ((long)c->cmd) {
 #ifdef CONFIG_OF_LIBFDT
 		case SPL_EXPORT_FDT:
 			printf("Argument image is now in RAM: 0x%p\n",
@@ -153,7 +153,7 @@ static int do_spl(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 
 	c = find_cmd_tbl(argv[1], &cmd_spl_sub[0], ARRAY_SIZE(cmd_spl_sub));
 	if (c) {
-		cmd = (int)c->cmd;
+		cmd = (long)c->cmd;
 		switch (cmd) {
 		case SPL_EXPORT:
 			argc--;

commit b81c4739f4f34317a5e3ae5c06b14446b9e3c18e
Author: York Sun <york.sun@nxp.com>
Date:   Tue Aug 15 11:14:43 2017 -0700

    UPSTREAM: spl: fit: Eanble GZIP support for image decompression
    
    Add Kconfig option SPL_GZIP and SPL_ZLIB to enable gunzip support for
    SPL boot, eg. falcon boot compressed kernel image.
    
    Change-Id: I68f64aca8ecad26478f2ce25676253cee7e57d30
    Signed-off-by: York Sun <york.sun@nxp.com>
    Reviewed-by: Tom Rini <trini@konsulko.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 7264f2928b46c5f5685e39ed607652c8991e47b6)

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index d2a352ecbe..fe41ce02d2 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -11,6 +11,10 @@
 #include <libfdt.h>
 #include <spl.h>
 
+#ifndef CONFIG_SYS_BOOTM_LEN
+#define CONFIG_SYS_BOOTM_LEN	(64 << 20)
+#endif
+
 /**
  * spl_fit_get_image_node(): By using the matching configuration subnode,
  * retrieve the name of an image, specified by a property name and an index
@@ -135,6 +139,19 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 	ulong overhead;
 	int nr_sectors;
 	int align_len = ARCH_DMA_MINALIGN - 1;
+	uint8_t image_comp = -1, type = -1;
+
+	if (IS_ENABLED(CONFIG_SPL_OS_BOOT) && IS_ENABLED(CONFIG_SPL_GZIP)) {
+		if (fit_image_get_comp(fit, node, &image_comp))
+			puts("Cannot get image compression format.\n");
+		else
+			debug("%s ", genimg_get_comp_name(image_comp));
+
+		if (fit_image_get_type(fit, node, &type))
+			puts("Cannot get image type.\n");
+		else
+			debug("%s ", genimg_get_type_name(type));
+	}
 
 	offset = fdt_getprop_u32(fit, node, "data-offset");
 	if (offset == FDT_ERROR)
@@ -154,7 +171,7 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 	if (info->read(info, sector + get_aligned_image_offset(info, offset),
 		       nr_sectors, (void*)load_ptr) != nr_sectors)
 		return -EIO;
-	debug("image: dst=%lx, offset=%lx, size=%lx\n", load_ptr, offset,
+	debug("image dst=%lx, offset=%lx, size=%lx\n", load_ptr, offset,
 	      (unsigned long)length);
 
 	src = (void *)load_ptr + overhead;
@@ -162,7 +179,18 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 	board_fit_image_post_process(&src, &length);
 #endif
 
-	memcpy((void*)load_addr, src, length);
+	if (IS_ENABLED(CONFIG_SPL_OS_BOOT)	&&
+	    IS_ENABLED(CONFIG_SPL_GZIP)		&&
+	    image_comp == IH_COMP_GZIP		&&
+	    type == IH_TYPE_KERNEL) {
+		if (gunzip((void *)load_addr, CONFIG_SYS_BOOTM_LEN,
+			   src, &length)) {
+			puts("Uncompressing error\n");
+			return -EIO;
+		}
+	} else {
+		memcpy((void *)load_addr, src, length);
+	}
 
 	if (image_info) {
 		image_info->load_addr = load_addr;
diff --git a/lib/Kconfig b/lib/Kconfig
index 065f9c21f5..bf3be1643a 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -179,6 +179,18 @@ config LZO
 	bool "Enable LZO decompression support"
 	help
 	  This enables support for LZO compression algorithm.r
+
+config SPL_GZIP
+	bool "Enable gzip decompression support for SPL build"
+	select SPL_ZLIB
+	help
+	  This enables support for GZIP compression altorithm for SPL boot.
+
+config SPL_ZLIB
+	bool
+	help
+	  This enables compression lib for SPL boot.
+
 endmenu
 
 config ERRNO_STR
diff --git a/lib/Makefile b/lib/Makefile
index d242b7fe94..10b19d35fe 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -11,7 +11,6 @@ obj-$(CONFIG_EFI) += efi/
 obj-$(CONFIG_EFI_LOADER) += efi_loader/
 obj-$(CONFIG_LZMA) += lzma/
 obj-$(CONFIG_LZO) += lzo/
-obj-$(CONFIG_ZLIB) += zlib/
 obj-$(CONFIG_BZIP2) += bzip2/
 obj-$(CONFIG_TIZEN) += tizen/
 obj-$(CONFIG_FIT) += libfdt/
@@ -26,7 +25,6 @@ obj-y += crc16.o
 obj-$(CONFIG_ERRNO_STR) += errno_str.o
 obj-$(CONFIG_FIT) += fdtdec_common.o
 obj-$(CONFIG_TEST_FDTDEC) += fdtdec_test.o
-obj-$(CONFIG_GZIP) += gunzip.o
 obj-$(CONFIG_GZIP_COMPRESSED) += gzip.o
 obj-$(CONFIG_GENERATE_SMBIOS_TABLE) += smbios.o
 obj-y += initcall.o
@@ -55,6 +53,9 @@ obj-$(CONFIG_RSA) += rsa/
 obj-$(CONFIG_SHA1) += sha1.o
 obj-$(CONFIG_SHA256) += sha256.o
 
+obj-$(CONFIG_$(SPL_)ZLIB) += zlib/
+obj-$(CONFIG_$(SPL_)GZIP) += gunzip.o
+
 obj-$(CONFIG_$(SPL_TPL_)SAVEENV) += qsort.o
 obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += libfdt/
 ifneq ($(CONFIG_$(SPL_TPL_)BUILD)$(CONFIG_$(SPL_TPL_)OF_PLATDATA),yy)

commit eb7c724022b8c4f3968e8502ea644d77945fbf43
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Wed Jan 10 16:31:35 2018 +0800

    phy: rockchip-inno-usb2: add otg_phy_init api
    
    The USB-PHY may have been in suspend mode before done "reboot loader"
    action which will cause the USB device failed to be enumerated by PC
    in u-boot context.
    
    So reset USB-PHY and power on its PLL in otg_phy_init(), and invoked
    by udc_enable() when the USB Gadget start to fix it.
    
    Change-Id: Ie91fdabece937a6f277cfe80cd707ddcace6470d
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index 0e4b93f900..1fa59c501a 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -11,6 +11,8 @@
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 
+#include "../usb/gadget/dwc2_udc_otg_priv.h"
+
 #define U2PHY_BIT_WRITEABLE_SHIFT	16
 #define CHG_DCD_MAX_RETRIES		6
 #define CHG_PRI_MAX_RETRIES		2
@@ -181,6 +183,87 @@ static inline bool property_enabled(void __iomem *base,
 	return tmp == reg->enable;
 }
 
+static int rockchip_usb2phy_parse(struct rockchip_usb2phy *rphy)
+{
+	const struct rockchip_usb2phy_cfg *phy_cfgs;
+	ofnode u2phy_node = ofnode_null();
+	ofnode grf_node = ofnode_null();
+	void __iomem *usbgrf_base = NULL;
+	void __iomem *grf_base = NULL;
+	struct udevice *udev;
+	fdt_size_t size;
+	u32 reg, index;
+	int ret;
+
+	memset((void *)rphy, 0, sizeof(struct rockchip_usb2phy));
+
+	u2phy_node = ofnode_path("/usb2-phy");
+	if (ofnode_valid(u2phy_node)) {
+		if (ofnode_read_bool(u2phy_node, "rockchip,grf"))
+			grf_base = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
+		if (ofnode_read_bool(u2phy_node, "rockchip,usbgrf"))
+			usbgrf_base =
+				syscon_get_first_range(ROCKCHIP_SYSCON_USBGRF);
+		else
+			usbgrf_base = NULL;
+	} else {
+		grf_node = ofnode_path("/syscon-usb");
+		if (ofnode_valid(grf_node))
+			grf_base = (void __iomem *)
+				ofnode_get_addr_size(grf_node, "reg", &size);
+			u2phy_node = ofnode_find_subnode(grf_node, "usb2-phy");
+	}
+
+	if (!grf_base && !usbgrf_base) {
+		error("%s: get grf/usbgrf node failed\n", __func__);
+		return -EINVAL;
+	}
+
+	if (!ofnode_valid(u2phy_node)) {
+		error("%s: missing u2phy node\n", __func__);
+		return -EINVAL;
+	}
+
+	if (ofnode_read_u32(u2phy_node, "reg", &reg)) {
+		error("%s: could not read reg from u2phy node\n", __func__);
+		return -EINVAL;
+	}
+
+	ret = uclass_get_device_by_ofnode(UCLASS_PHY, u2phy_node, &udev);
+	if (ret) {
+		error("%s: get u2phy node failed: %d\n", __func__, ret);
+		return -ENODEV;
+	}
+
+	phy_cfgs =
+		(const struct rockchip_usb2phy_cfg *)dev_get_driver_data(udev);
+	if (!phy_cfgs) {
+		error("%s: unable to get phy_cfgs\n", __func__);
+		return -EINVAL;
+	}
+
+	/* find out a proper config which can be matched with dt. */
+	index = 0;
+	while (phy_cfgs[index].reg) {
+		if (phy_cfgs[index].reg == reg) {
+			rphy->phy_cfg = &phy_cfgs[index];
+			break;
+		}
+		++index;
+	}
+
+	if (!rphy->phy_cfg) {
+		error("%s: no phy-config can be matched\n", __func__);
+		return -EINVAL;
+	}
+
+	rphy->grf_base = grf_base;
+	rphy->usbgrf_base = usbgrf_base;
+
+	return 0;
+}
+
 static const char *chg_to_string(enum power_supply_type chg_type)
 {
 	switch (chg_type) {
@@ -245,94 +328,18 @@ static bool rockchip_chg_primary_det_retry(struct rockchip_usb2phy *rphy)
 int rockchip_chg_get_type(void)
 {
 	const struct rockchip_usb2phy_port_cfg *port_cfg;
-	const struct rockchip_usb2phy_cfg *phy_cfgs;
 	enum power_supply_type chg_type;
 	struct rockchip_usb2phy rphy;
-	struct udevice *dev;
-	ofnode u2phy_node, grf_node;
 	void __iomem *base;
-	fdt_size_t size;
-	u32 reg, index;
 	bool is_dcd, vout;
 	int ret;
 
-	u2phy_node = ofnode_null();
-	grf_node = ofnode_null();
-
-	u2phy_node = ofnode_path("/usb2-phy");
-
-	if (!ofnode_valid(u2phy_node)) {
-		grf_node = ofnode_path("/syscon-usb");
-		if (ofnode_valid(grf_node))
-			u2phy_node = ofnode_find_subnode(grf_node,
-							 "usb2-phy");
-	}
-
-	if (!ofnode_valid(u2phy_node)) {
-		printf("%s: missing u2phy node\n", __func__);
-		return -EINVAL;
-	}
-
-	if (ofnode_valid(grf_node)) {
-		rphy.grf_base =
-			(void __iomem *)ofnode_get_addr_size(grf_node,
-							     "reg", &size);
-	} else {
-		if (ofnode_read_bool(u2phy_node, "rockchip,grf"))
-			rphy.grf_base =
-				syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	}
-
-	if (rphy.grf_base <= 0) {
-		dev_err(dev, "get syscon grf failed\n");
-		return -EINVAL;
-	}
-
-	if (ofnode_read_u32(u2phy_node, "reg", &reg)) {
-		printf("%s: could not read reg\n", __func__);
-		return -EINVAL;
-	}
-
-	if (ofnode_read_bool(u2phy_node, "rockchip,usbgrf")) {
-		rphy.usbgrf_base =
-			syscon_get_first_range(ROCKCHIP_SYSCON_USBGRF);
-		if (rphy.usbgrf_base <= 0) {
-			dev_err(dev, "get syscon usbgrf failed\n");
-			return -EINVAL;
-		}
-	} else {
-		rphy.usbgrf_base = NULL;
-	}
-
-	ret = uclass_get_device_by_ofnode(UCLASS_PHY, u2phy_node, &dev);
+	ret = rockchip_usb2phy_parse(&rphy);
 	if (ret) {
-		printf("%s: uclass_get_device_by_ofnode failed: %d\n",
-		       __func__, ret);
+		error("%s: parse usb2phy failed %d\n", __func__, ret);
 		return ret;
 	}
 
-	phy_cfgs =
-		(const struct rockchip_usb2phy_cfg *)dev_get_driver_data(dev);
-	if (!phy_cfgs) {
-		printf("%s: unable to get phy_cfgs\n", __func__);
-		return -EINVAL;
-	}
-
-	/* find out a proper config which can be matched with dt. */
-	index = 0;
-	while (phy_cfgs[index].reg) {
-		if (phy_cfgs[index].reg == reg) {
-			rphy.phy_cfg = &phy_cfgs[index];
-			break;
-		}
-		++index;
-	}
-
-	if (!rphy.phy_cfg) {
-		printf("%s: no phy-config can be matched\n", __func__);
-		return -EINVAL;
-	}
-
 	base = get_reg_base(&rphy);
 	port_cfg = &rphy.phy_cfg->port_cfgs[USB2PHY_PORT_OTG];
 
@@ -413,6 +420,32 @@ out:
 	return chg_type;
 }
 
+void otg_phy_init(struct dwc2_udc *dev)
+{
+	const struct rockchip_usb2phy_port_cfg *port_cfg;
+	struct rockchip_usb2phy rphy;
+	void __iomem *base;
+	int ret;
+
+	ret = rockchip_usb2phy_parse(&rphy);
+	if (ret) {
+		error("%s: parse usb2phy failed %d\n", __func__, ret);
+		return;
+	}
+
+	base = get_reg_base(&rphy);
+	port_cfg = &rphy.phy_cfg->port_cfgs[USB2PHY_PORT_OTG];
+
+	/* Set the USB-PHY COMMONONN to 1'b0 to ensure USB's clocks */
+	property_enable(base, &rphy.phy_cfg->clkout_ctl, false);
+
+	/* Reset USB-PHY */
+	property_enable(base, &port_cfg->phy_sus, true);
+	udelay(20);
+	property_enable(base, &port_cfg->phy_sus, false);
+	mdelay(2);
+}
+
 static int rockchip_usb2phy_init(struct phy *phy)
 {
 	struct rockchip_usb2phy *rphy;

commit a607e103bc63df96fb43e45c0d51f4154eaa346e
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Tue Jan 9 15:12:09 2018 +0800

    phy: rockchip-inno-usb2: amend charge detect process
    
    Suspend USB-PHY while doing charge detect and resume it after
    finishing to ensure the USB-PHY in normal state.
    
    In addition, disable idm_sink_en and vdp_src_en after primary
    detection retry to fix the USB device failed to be enumerated
    after do charge detect.
    
    Change-Id: Id1effb049cc6491bcd876aa1cc0449469b11df06
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index 7a6fcb1b12..0e4b93f900 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -238,16 +238,19 @@ static bool rockchip_chg_primary_det_retry(struct rockchip_usb2phy *rphy)
 			break;
 	}
 
+	rockchip_chg_enable_primary_det(rphy, false);
 	return vout;
 }
 
 int rockchip_chg_get_type(void)
 {
+	const struct rockchip_usb2phy_port_cfg *port_cfg;
 	const struct rockchip_usb2phy_cfg *phy_cfgs;
 	enum power_supply_type chg_type;
 	struct rockchip_usb2phy rphy;
 	struct udevice *dev;
 	ofnode u2phy_node, grf_node;
+	void __iomem *base;
 	fdt_size_t size;
 	u32 reg, index;
 	bool is_dcd, vout;
@@ -330,6 +333,13 @@ int rockchip_chg_get_type(void)
 		return -EINVAL;
 	}
 
+	base = get_reg_base(&rphy);
+	port_cfg = &rphy.phy_cfg->port_cfgs[USB2PHY_PORT_OTG];
+
+	/* Suspend USB-PHY and put the controller in non-driving mode */
+	property_enable(base, &port_cfg->phy_sus, true);
+	property_enable(base, &rphy.phy_cfg->chg_det.opmode, false);
+
 	rphy.dcd_retries = CHG_DCD_MAX_RETRIES;
 	rphy.primary_retries = CHG_PRI_MAX_RETRIES;
 
@@ -394,6 +404,10 @@ int rockchip_chg_get_type(void)
 		chg_type = POWER_SUPPLY_TYPE_USB_CDP;
 
 out:
+	/* Resume USB-PHY and put the controller in normal mode */
+	property_enable(base, &rphy.phy_cfg->chg_det.opmode, true);
+	property_enable(base, &port_cfg->phy_sus, false);
+
 	debug("charger is %s\n", chg_to_string(chg_type));
 
 	return chg_type;

commit 15e088ea51c32fb18f1f66039290f52a70dfac37
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 4 16:20:09 2018 +0800

    rockchip: boot_mode: setup devtype and devnum env
    
    It helps when enter rockusb mode in setup_boot_mode()
    and rockchip_dnl_mode_check().
    
    Change-Id: Iae0a88ab5e971c8d85a59ba2bef077c7c3a9e5ed
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index 4c97b343c7..f105f57f1f 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -55,17 +55,22 @@ __weak int rockchip_dnl_key_pressed(void)
 		return false;
 }
 
-void rockchip_dnl_mode_check(void)
+static void devtype_num_envset(void)
 {
-	const char *rockusb_cmd =
+	const char *devtype_num_set =
 	"if mmc dev 0; then setenv devtype mmc; setenv devnum 0;"
 	"else if rknand dev 0; then setenv devtype rknand; setenv devnum 0; fi;"
-	"fi; rockusb 0 ${devtype} ${devnum};";
+	"fi;";
+
+	run_command_list(devtype_num_set, -1, 0);
+}
 
+void rockchip_dnl_mode_check(void)
+{
 	if (rockchip_dnl_key_pressed()) {
 		printf("download key pressed, entering download mode...\n");
 		/* If failed, we fall back to bootrom download mode */
-		run_command_list(rockusb_cmd, -1, 0);
+		run_command_list("rockusb 0 ${devtype} ${devnum}", -1, 0);
 		set_back_to_bootrom_dnl_flag();
 		do_reset(NULL, 0, 0, NULL);
 	}
@@ -76,6 +81,7 @@ int setup_boot_mode(void)
 	int boot_mode = BOOT_MODE_NORMAL;
 	char env_preboot[256] = {0};
 
+	devtype_num_envset();
 	rockchip_dnl_mode_check();
 #ifdef CONFIG_RKIMG_BOOTLOADER
 	boot_mode = rockchip_get_boot_mode();
@@ -99,7 +105,7 @@ int setup_boot_mode(void)
 		break;
 	case BOOT_MODE_LOADER:
 		printf("enter Rockusb!\n");
-		env_set("preboot", "setenv preboot; rockusb 0 mmc 0");
+		env_set("preboot", "setenv preboot; rockusb 0 ${devtype} ${devnum}");
 		break;
 	case BOOT_MODE_CHARGING:
 		printf("enter charging!\n");

commit 7ad0afacd5a58fc59a0a9b814fe65c8f4d8513b1
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Jan 12 15:38:35 2018 +0800

    rockchip: bootrkp: add log when boot from recovery
    
    Add a log to show boot from recovery.
    
    Change-Id: I8302820558d53e6b239533806305b2dec7c38c0c
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/cmd/bootrkp.c b/cmd/bootrkp.c
index c7a4ec28fa..c64a3c5978 100644
--- a/cmd/bootrkp.c
+++ b/cmd/bootrkp.c
@@ -19,8 +19,10 @@ static int do_boot_rockchip(cmd_tbl_t *cmdtp, int flag, int argc,
 
 	dev_desc = rockchip_get_bootdev();
 	mode = rockchip_get_boot_mode();
-	if (mode == BOOT_MODE_RECOVERY)
+	if (mode == BOOT_MODE_RECOVERY) {
 		boot_partname = PART_RECOVERY;
+		printf("%s boot from Recovery partition!\n", __func__);
+	}
 	ret = part_get_info_by_name(dev_desc, boot_partname, &part_info);
 
 	if(boot_rockchip_image(dev_desc, &part_info))

commit 570fb7e31a1342d7528fc5ef6e452e6740e93cd0
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Jan 12 15:21:58 2018 +0800

    rockchip: rkimg: update some error handling
    
    Use 'int' instead of 'ulong' as type of image size,
    and return err if can not find MISC partition.
    
    Change-Id: I661a221a8a4049f2a7d9ee45b8a4d987ae515188
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 88814638c9..146792a367 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -208,8 +208,10 @@ int rockchip_get_boot_mode(void)
 	dev_desc = rockchip_get_bootdev();
 	ret = part_get_info_by_name(dev_desc, PART_MISC,
 			&part_info);
-	if (ret < 0)
+	if (ret < 0) {
 		printf("get part %s fail %d\n", PART_MISC, ret);
+		return -EIO;
+	}
 
 	bmsg = memalign(ARCH_DMA_MINALIGN, size);
 	ret = blk_dread(dev_desc,
@@ -268,9 +270,9 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 	ulong ramdisk_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0);
 	ulong kernel_addr_r = env_get_ulong("kernel_addr_r", 16, 0x480000);
 	disk_partition_t kernel_part;
-	ulong ramdisk_size;
-	ulong kernel_size;
-	ulong fdt_size;
+	int ramdisk_size;
+	int kernel_size;
+	int fdt_size;
 	int ret = 0;
 	int part_num;
 
@@ -295,7 +297,8 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 	ramdisk_size = read_rockchip_image(dev_desc, boot_part,
 					   (void *)ramdisk_addr_r);
 	if (ramdisk_size < 0) {
-		printf("%s ramdisk part read error\n", __func__);
+		printf("%s ramdisk part %s read error\n", __func__,
+		       boot_part->name);
 		ret = -EINVAL;
 		goto out;
 	}

commit ec82a6c959406d9819a30da628e70ab969927deb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 3 17:34:09 2018 +0800

    common: boot_rkimg: append boot media type to bootargs
    
    Android need this property for bring up.
    
    Change-Id: I0fb5367221079e3bfcf36db4e5b58fc994848dcd
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 819162f2ba..88814638c9 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -147,23 +147,35 @@ err:
 int get_bootdev_type(void)
 {
 	int type = 0;
+	char *boot_media = NULL;
+	static int appended;
 
 	#ifdef CONFIG_EMMC_BOOT
 		type = IF_TYPE_MMC;
+		boot_media = "storagemedia=emmc";
 	#endif /* CONFIG_EMMC_BOOT */
 	#ifdef CONFIG_QSPI_BOOT
 		type = IF_TYPE_SPI_NAND;
+		boot_media = "storagemedia=nand";
 	#endif /* CONFIG_QSPI_BOOT */
 	#ifdef CONFIG_NAND_BOOT
 		type = IF_TYPE_RKNAND;
+		boot_media = "storagemedia=nand";
 	#endif /* CONFIG_NAND_BOOT */
 	#ifdef CONFIG_NOR_BOOT
 		type = IF_TYPE_SPI_NOR;
 	#endif /* CONFIG_NOR_BOOT */
 
 	/* For current use(Only EMMC support!) */
-	if (!type)
+	if (!type) {
 		type = IF_TYPE_MMC;
+		boot_media = "storagemedia=emmc";
+	}
+
+	if (!appended && boot_media) {
+		appended = 1;
+		env_update("bootargs", boot_media);
+	}
 
 	return type;
 }

commit 817007c14301d926fa6ec83a37271b6848cca145
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 2 19:05:07 2018 +0800

    armv7: start.S: enable ACTLR.SMP bit
    
    For cortex-A7 core, when ACTLR.SMP is 0 during the processor
    power-up and power-down procedures, the caches are disabled
    regardless of the SCTLR.C bit setting. It's similar for other
    cortex A series core.
    
    Change-Id: I69512787015d651fe5bb5d6961f5ed01c2505058
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 95a0b5224b..289ebc03f6 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -62,6 +62,11 @@ switch_to_hypervisor_ret:
 	orr	r0, r0, #0xc0		@ disable FIQ and IRQ
 	msr	cpsr,r0
 
+	/* Enable ACTLR.SMP bit */
+	mrc	p15, 0, r0, c1, c0, 1
+	orr	r0, r0, #(1 << 6)	@ Enable ACTLR.SMP bit
+	mcr	p15, 0, r0, c1, c0, 1
+
 /*
  * Setup vector:
  * (OMAP4 spl TEXT_BASE is not 32 byte aligned.

commit b1fd4f58f396ec3a8bfde61d0eaae29e0c50295c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Dec 28 09:52:00 2017 +0800

    rockchip: boot_mode: recognise devtype and devnum dynamicly for rockusb
    
    devtype can be "emmc" or "rknand", devnum is usually 0.
    
    Change-Id: Ie90169ab2c164e9d91f3365c3d9c99278bf9c8c4
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index 42b01c7d48..4c97b343c7 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -57,10 +57,15 @@ __weak int rockchip_dnl_key_pressed(void)
 
 void rockchip_dnl_mode_check(void)
 {
+	const char *rockusb_cmd =
+	"if mmc dev 0; then setenv devtype mmc; setenv devnum 0;"
+	"else if rknand dev 0; then setenv devtype rknand; setenv devnum 0; fi;"
+	"fi; rockusb 0 ${devtype} ${devnum};";
+
 	if (rockchip_dnl_key_pressed()) {
 		printf("download key pressed, entering download mode...\n");
 		/* If failed, we fall back to bootrom download mode */
-		cli_simple_run_command("rockusb 0 mmc 0", 0);
+		run_command_list(rockusb_cmd, -1, 0);
 		set_back_to_bootrom_dnl_flag();
 		do_reset(NULL, 0, 0, NULL);
 	}

commit 221b52206016dec619b74d688c0a792b90a570eb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Dec 11 14:24:17 2017 +0800

    power: charge animation: skip charge while special boot mode
    
    only BOOT_MODE_CHARGING and BOOT_MODE_UNDEFINE enter charging.
    
    Change-Id: I21a7b93ff50aab47f3a32094fc36083b42b7b9b0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 0662357b29..05eaf7869a 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -247,11 +247,13 @@ static int charge_animation_show(struct udevice *dev)
 
 #ifdef CONFIG_RKIMG_BOOTLOADER
 	boot_mode = rockchip_get_boot_mode();
-	if (boot_mode != BOOT_MODE_NORMAL) {
+	if ((boot_mode != BOOT_MODE_CHARGING) &&
+	    (boot_mode != BOOT_MODE_UNDEFINE)) {
 		debug("exit charge, due to boot mode: %d\n", boot_mode);
 		return 0;
 	}
 #endif
+
 	/* Not charger online, exit */
 	charging = fuel_gauge_get_chrg_online(fg);
 	if (charging <= 0)

commit b7195498ca52d0d4c7b1fe4b852d7d57da502c06
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Dec 8 16:18:00 2017 +0800

    rockchip: unify boot mode in rockchip_get_boot_mode()
    
    There are two ways to get boot mode: misc partition and
    CONFIG_ROCKCHIP_BOOT_MODE_REG, we unify them in the
    rockchip_get_boot_mode() function.
    
    Change-Id: Ia2dd452e8df8a8d736300048f131ed43ec2ec3a3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index d0dbff3bb8..42b01c7d48 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -11,6 +11,7 @@
 #include <cli.h>
 #include <dm.h>
 #include <fdtdec.h>
+#include <boot_rkimg.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -67,23 +68,15 @@ void rockchip_dnl_mode_check(void)
 
 int setup_boot_mode(void)
 {
-	void *reg;
-	int boot_mode;
+	int boot_mode = BOOT_MODE_NORMAL;
 	char env_preboot[256] = {0};
 
 	rockchip_dnl_mode_check();
-
-	reg = (void *)CONFIG_ROCKCHIP_BOOT_MODE_REG;
-
-	boot_mode = readl(reg);
-
-	debug("boot mode %x.\n", boot_mode);
-
-	/* Clear boot mode */
-	writel(BOOT_NORMAL, reg);
-
+#ifdef CONFIG_RKIMG_BOOTLOADER
+	boot_mode = rockchip_get_boot_mode();
+#endif
 	switch (boot_mode) {
-	case BOOT_FASTBOOT:
+	case BOOT_MODE_BOOTLOADER:
 		printf("enter fastboot!\n");
 #if defined(CONFIG_FASTBOOT_FLASH_MMC_DEV)
 		snprintf(env_preboot, 256,
@@ -95,19 +88,19 @@ int setup_boot_mode(void)
 #endif
 		env_set("preboot", env_preboot);
 		break;
-	case BOOT_UMS:
+	case BOOT_MODE_UMS:
 		printf("enter UMS!\n");
 		env_set("preboot", "setenv preboot; ums mmc 0");
 		break;
-	case BOOT_LOADER:
+	case BOOT_MODE_LOADER:
 		printf("enter Rockusb!\n");
 		env_set("preboot", "setenv preboot; rockusb 0 mmc 0");
 		break;
-	case BOOT_CHARGING:
+	case BOOT_MODE_CHARGING:
 		printf("enter charging!\n");
 		env_set("preboot", "setenv preboot; charge");
 		break;
-	case BOOT_RECOVERY:
+	case BOOT_MODE_RECOVERY:
 		printf("enter Recovery mode!\n");
 		env_set("reboot_mode", "recovery");
 		break;
diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 54d3f6fb79..819162f2ba 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -12,6 +12,8 @@
 #include <asm/arch/resource_img.h>
 #include <asm/arch/rockchip_crc.h>
 #include <boot_rkimg.h>
+#include <asm/arch/boot_mode.h>
+#include <asm/io.h>
 
 #define TAG_KERNEL			0x4C4E524B
 
@@ -186,6 +188,7 @@ int rockchip_get_boot_mode(void)
 	int size = DIV_ROUND_UP(sizeof(struct bootloader_message), RK_BLK_SIZE)
 		   * RK_BLK_SIZE;
 	int ret;
+	uint32_t reg_boot_mode;
 
 	if (boot_mode != -1)
 		return boot_mode;
@@ -201,22 +204,50 @@ int rockchip_get_boot_mode(void)
 			part_info.start + BOOTLOADER_MESSAGE_BLK_OFFSET,
 			size >> 9, bmsg);
 	if (ret != (size >> 9)) {
-		ret = -EIO;
-		goto err;
+		free(bmsg);
+		return -EIO;
 	}
 
+	/* Mode from misc partition */
 	if (!strcmp(bmsg->command, "boot-recovery")) {
-		printf("boot mode: recovery\n");
-		ret = BOOT_MODE_RECOVERY;
+		boot_mode = BOOT_MODE_RECOVERY;
 	} else {
-		printf("boot mode: normal\n");
-		ret = BOOT_MODE_NORMAL;
+		/* Mode from boot mode register */
+		reg_boot_mode = readl((void *)CONFIG_ROCKCHIP_BOOT_MODE_REG);
+		writel(BOOT_NORMAL, (void *)CONFIG_ROCKCHIP_BOOT_MODE_REG);
+
+		switch (reg_boot_mode) {
+		case BOOT_NORMAL:
+			printf("boot mode: normal\n");
+			boot_mode = BOOT_MODE_NORMAL;
+			break;
+		case BOOT_FASTBOOT:
+			printf("boot mode: bootloader\n");
+			boot_mode = BOOT_MODE_BOOTLOADER;
+			break;
+		case BOOT_LOADER:
+			printf("boot mode: loader\n");
+			boot_mode = BOOT_MODE_LOADER;
+			break;
+		case BOOT_RECOVERY:
+			/* printf("boot mode: recovery\n"); */
+			boot_mode = BOOT_MODE_RECOVERY;
+			break;
+		case BOOT_UMS:
+			printf("boot mode: ums\n");
+			boot_mode = BOOT_MODE_UMS;
+			break;
+		case BOOT_CHARGING:
+			printf("boot mode: charging\n");
+			boot_mode = BOOT_MODE_CHARGING;
+			break;
+		default:
+			printf("boot mode: None\n");
+			boot_mode = BOOT_MODE_UNDEFINE;
+		}
 	}
-	boot_mode = ret;
-err:
-	free(bmsg);
 
-	return ret;
+	return boot_mode;
 }
 
 int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
diff --git a/include/boot_rkimg.h b/include/boot_rkimg.h
index f59bf2e41b..d5078e846b 100644
--- a/include/boot_rkimg.h
+++ b/include/boot_rkimg.h
@@ -11,10 +11,14 @@
 enum _boot_mode {
 	BOOT_MODE_NORMAL = 0,
 	BOOT_MODE_RECOVERY,
-	BOOT_MODE_BOOTLOADER,
+	BOOT_MODE_BOOTLOADER,	/* Android: Fastboot mode */
+	BOOT_MODE_LOADER,	/* Rockchip: Rockusb download mode */
+	BOOT_MODE_CHARGING,
+	BOOT_MODE_UMS,
+	BOOT_MODE_BROM_DOWNLOAD,
+	BOOT_MODE_UNDEFINE,
 };
 
-
 #define PART_MISC			"misc"
 #define PART_KERNEL			"kernel"
 #define PART_BOOT			"boot"

commit d2975239b8d12d5ddbad5a05eab3ff0fd3606231
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 13 20:01:19 2017 +0800

    rockchip: support pack resources into resource.img
    
    This script supports pack charge pictures into resource.img
    
    Usage:
     ./pack_resource.sh <input resource.img>
    
    Change-Id: If0577a62d58a0c93826ac6c0db5df7872dced964
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/pack_resource.sh b/pack_resource.sh
new file mode 100755
index 0000000000..03b8d30f7d
--- /dev/null
+++ b/pack_resource.sh
@@ -0,0 +1,65 @@
+#!/bin/sh
+OLD_IMAGE=$1
+IMAGE=resource.img
+TOOL=../rkbin/tools/resource_tool
+RESOURCES=./tools/images/
+
+usage()
+{
+	echo "Usage:"
+	echo "  ./pack_resource <input resource.img>"
+}
+
+prepare()
+{
+	echo
+	if [ "$OLD_IMAGE" = '--help' -o "$OLD_IMAGE" = '-h' -o "$OLD_IMAGE" = '--h' ]; then
+		usage
+		exit 0
+	elif [ ! -f "$TOOL" ];then
+		echo "Can't find '../rkbin/' Responsity, please download it before pack image!"
+		echo "How to obtain? 3 ways:"
+		echo "	1. Login your Rockchip gerrit account: \"Projects\" -> \"List\" -> search \"rk/rkbin\" Responsity"
+		echo "	2. Github Responsity: https://github.com/rockchip-linux/rkbin"
+		echo "	3. Download full release SDK Responsity"
+		exit 1
+	elif [ ! -d "$RESOURCES" ];then
+		echo "Can't find resources: $RESOURCES"
+		exit 1
+	elif [ -z "$OLD_IMAGE" ];then
+		echo "Missing: <input image>"
+		usage
+		exit 1
+	elif [ ! -f "$OLD_IMAGE" ];then
+		echo "Can't find file: $OLD_IMAGE"
+		usage
+		exit 1
+	fi
+}
+
+append_resource()
+{
+	local TMP_DIR=.resource_tmp
+	rm -r $TMP_DIR 2>/dev/null
+	mkdir $TMP_DIR
+
+	echo "Pack $RESOURCES & $OLD_IMAGE to $IMAGE ..."
+	if [ -f "$OLD_IMAGE" ];then
+		echo "Unpacking old image($OLD_IMAGE):"
+		$TOOL --unpack --verbose --image=$OLD_IMAGE $TMP_DIR 2>&1|grep entry|sed "s/^.*://"|xargs echo
+	fi
+	if [ -d "$RESOURCES" ];then
+		cp -r $RESOURCES/* $TMP_DIR
+	else
+		cp -r $RESOURCES $TMP_DIR
+	fi
+	$TOOL --pack --root=$TMP_DIR --image=$IMAGE `find $TMP_DIR -type f|sort`
+	echo "Packed resources:"
+	$TOOL --unpack --verbose --image=$IMAGE $TMP_DIR 2>&1|grep entry|sed "s/^.*://"|xargs echo
+	rm -r $TMP_DIR 2>/dev/null
+	echo
+	echo "resource.img is packed ready"
+}
+
+prepare
+append_resource
\ No newline at end of file
diff --git a/tools/images/battery_0.bmp b/tools/images/battery_0.bmp
new file mode 100644
index 0000000000..e05e4f6424
Binary files /dev/null and b/tools/images/battery_0.bmp differ
diff --git a/tools/images/battery_1.bmp b/tools/images/battery_1.bmp
new file mode 100644
index 0000000000..2afa093274
Binary files /dev/null and b/tools/images/battery_1.bmp differ
diff --git a/tools/images/battery_2.bmp b/tools/images/battery_2.bmp
new file mode 100644
index 0000000000..04937645d7
Binary files /dev/null and b/tools/images/battery_2.bmp differ
diff --git a/tools/images/battery_3.bmp b/tools/images/battery_3.bmp
new file mode 100644
index 0000000000..335e12ee03
Binary files /dev/null and b/tools/images/battery_3.bmp differ
diff --git a/tools/images/battery_4.bmp b/tools/images/battery_4.bmp
new file mode 100644
index 0000000000..372c0beb60
Binary files /dev/null and b/tools/images/battery_4.bmp differ
diff --git a/tools/images/battery_5.bmp b/tools/images/battery_5.bmp
new file mode 100644
index 0000000000..02245b63aa
Binary files /dev/null and b/tools/images/battery_5.bmp differ
diff --git a/tools/images/battery_fail.bmp b/tools/images/battery_fail.bmp
new file mode 100644
index 0000000000..81d90642f9
Binary files /dev/null and b/tools/images/battery_fail.bmp differ

commit cd7ae718e1aa8ed8b06a3c2ca50ee965abfa1ce7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Dec 11 19:16:26 2017 +0800

    rockchip: make.sh: support trust and loader image pack
    
    Change-Id: I9b2cf170138c6aba7578e14126f3010e8bffee3a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 57f292daf1..6fe2d6add8 100755
--- a/make.sh
+++ b/make.sh
@@ -1,10 +1,45 @@
 #!/bin/sh
+set -e
 BOARD=$1
 DIR=${BOARD#*-}
 DSTDIR=rockdev/${DIR}
+RKCHIP=$(echo $DIR | tr '[a-z]' '[A-Z]')
 TOOLCHAIN=arm-linux-gnueabi-
 JOB=`sed -n "N;/processor/p" /proc/cpuinfo|wc -l`
 
+prepare()
+{
+	local dst
+
+	# Check invaid args and help
+	if [ "$BOARD" = '--help' -o "$BOARD" = '-h' -o "$BOARD" = '--h' ]; then
+		echo
+		echo "Usage: ./make.sh board"
+		echo "Example:"
+		echo "./make.sh evb-rk3399     ---- build for evb-rk3399_defconfig"
+		echo "./make.sh firefly-rk3288 ---- build for firefly-rk3288_defconfig"
+		exit 1
+	elif [ ! -f configs/${BOARD}_defconfig ]; then
+		echo "Can't find: configs/${BOARD}_defconfig"
+		exit 1
+	fi
+
+	# Initialize RKBIN and RKTOOLS
+	dst=../rkbin/tools
+	if [ -d ${dst} ]; then
+		RKBIN=$(cd `dirname ${dst}`; pwd)
+		RKTOOLS=${RKBIN}/tools
+	else
+		echo
+		echo "Can't find '../rkbin/' Responsity, please download it before pack image!"
+		echo "How to obtain? 3 ways:"
+		echo "	1. Login your Rockchip gerrit account: \"Projects\" -> \"List\" -> search \"rk/rkbin\" Responsity"
+		echo "	2. Github Responsity: https://github.com/rockchip-linux/rkbin"
+		echo "	3. Download full release SDK Responsity"
+		exit 1
+	fi
+}
+
 select_toolchain()
 {
 	local dst path
@@ -25,29 +60,67 @@ select_toolchain()
 	echo toolchain: ${TOOLCHAIN}
 }
 
-pack_images()
+pack_uboot_image()
 {
-	local sys_text_base dst
+	local UBOOT_LOAD_ADDR
 
-	dst=../rkbin/tools
-	if [ -d ${dst} ]; then
-		path=$(cd `dirname ${dst}`; pwd)
+	UBOOT_LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${DSTDIR}/out/include/autoconf.mk|tr -d '\r'`
+	${RKTOOLS}/loaderimage --pack --uboot ${DSTDIR}/out/u-boot.bin uboot.img ${UBOOT_LOAD_ADDR}
+}
+
+pack_loader_image()
+{
+	cd ${RKBIN}
+	${RKTOOLS}/boot_merger ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini
+	cd -
+	mv ${RKBIN}/*_loader_*.bin ./
+}
+
+pack_trust_image()
+{
+	local TOS TOS_TA DARM_BASE TEE_LOAD_ADDR TEE_OFFSET=0x8400000
+
+	# ARM64 uses trust_merger
+	if grep  -q '^CONFIG_ARM64=y' ${DSTDIR}/out/.config ; then
+		cd ${RKBIN}
+		${RKTOOLS}/trust_merger ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini
+		cd -
+		mv ${RKBIN}/trust.img ./trust.img
+	# ARM uses loaderimage
 	else
-		echo "\nCan't find '../rkbin/' or '../rkbin/tools/' Responsity, please download it before pack image!"
-		echo "How to obtain, 3 ways:"
-		echo "	1. Login your gerrit account: \"Projects\" -> \"List\" -> search rkbin Responsity"
-		echo "	2. Github Responsity: https://github.com/rockchip-linux/rkbin"
-		echo "	3. Download full release SDK Responsity\n"
-		exit 1
-	fi
+		# OP-TEE is 132M(0x8400000) offset from DRAM base.
+		DARM_BASE=`sed -n "/CONFIG_SYS_SDRAM_BASE=/s/CONFIG_SYS_SDRAM_BASE=//p" ${DSTDIR}/out/include/autoconf.mk|tr -d '\r'`
+		TEE_LOAD_ADDR=$((DARM_BASE+TEE_OFFSET))
+
+		# Convert Dec to Hex
+		TEE_LOAD_ADDR=$(echo "obase=16;${TEE_LOAD_ADDR}"|bc)
 
-	sys_text_base=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${DSTDIR}/out/include/autoconf.mk|tr -d '\r'`
-	echo U-Boot entry point address: ${sys_text_base}
-	${path}/tools/loaderimage --pack --uboot ${DSTDIR}/out/u-boot.bin uboot.img ${sys_text_base}
+		TOS=`sed -n "/TOS=/s/TOS=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
+		TOS_TA=`sed -n "/TOSTA=/s/TOSTA=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
+
+		if [ $TOS_TA -a $TOS ]; then
+			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS} ./trust.img ${TEE_LOAD_ADDR}
+			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ./trust_with_ta.img ${TEE_LOAD_ADDR}
+			echo "Both trust.img and trust_with_ta.img are ready"
+		elif [ $TOS ]; then
+			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS} ./trust.img ${TEE_LOAD_ADDR}
+			echo "trust.img is ready"
+		elif [ $TOS_TA ]; then
+			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ./trust.img ${TEE_LOAD_ADDR}
+			echo "trust.img with ta is ready"
+		else
+			echo "Can't find any tee bin"
+			exit 1
+		fi
+	fi
 }
 
+prepare
 echo "make for ${BOARD}_defconfig by -j${JOB}"
 make ${BOARD}_defconfig O=${DSTDIR}/out
 select_toolchain
 make CROSS_COMPILE=${TOOLCHAIN}  all --jobs=${JOB} O=${DSTDIR}/out
-pack_images
+pack_loader_image
+pack_uboot_image
+pack_trust_image
+

commit a1b32c24129130a32421260e8d2ab687f9f4fe41
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Dec 11 14:17:11 2017 +0800

    irq: clean up code
    
    remove unused code and fix compile warning.
    
    Change-Id: I912eff25bf60da925791b889f08e91d4fcb61893
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/irq/irq-gic.c b/drivers/irq/irq-gic.c
index 8907cc5a73..95491e1b56 100644
--- a/drivers/irq/irq-gic.c
+++ b/drivers/irq/irq-gic.c
@@ -10,172 +10,165 @@
 #include <irq-generic.h>
 #include "irq-gic.h"
 
-#define gicd_readl(offset)	readl(GICD_BASE + (offset))
-#define gicc_readl(offset)	readl(GICC_BASE + (offset))
-#define gicd_writel(v, offset)	writel(v, GICD_BASE + (offset))
-#define gicc_writel(v, offset)	writel(v, GICC_BASE + (offset))
+#define gicd_readl(offset)	readl((void *)GICD_BASE + (offset))
+#define gicc_readl(offset)	readl((void *)GICC_BASE + (offset))
+#define gicd_writel(v, offset)	writel(v, (void *)GICD_BASE + (offset))
+#define gicc_writel(v, offset)	writel(v, (void *)GICC_BASE + (offset))
+
+#define IRQ_REG_X4(irq)		(4 * ((irq) / 4))
+#define IRQ_REG_X16(irq)	(4 * ((irq) / 16))
+#define IRQ_REG_X32(irq)	(4 * ((irq) / 32))
+#define IRQ_REG_X4_OFFSET(irq)	((irq) % 4)
+#define IRQ_REG_X16_OFFSET(irq)	((irq) % 16)
+#define IRQ_REG_X32_OFFSET(irq)	((irq) % 32)
 
 typedef enum INT_TRIG {
 	INT_LEVEL_TRIGGER,
 	INT_EDGE_TRIGGER
 } eINT_TRIG;
 
-typedef enum INT_SECURE {
-	INT_SECURE,
-	INT_NOSECURE
-} eINT_SECURE;
+struct gic_dist_data {
+	uint32_t ctlr;
+	uint32_t icfgr[DIV_ROUND_UP(1020, 16)];
+	uint32_t itargetsr[DIV_ROUND_UP(1020, 4)];
+	uint32_t ipriorityr[DIV_ROUND_UP(1020, 4)];
+	uint32_t igroupr[DIV_ROUND_UP(1020, 32)];
+	uint32_t ispendr[DIV_ROUND_UP(1020, 32)];
+	uint32_t isenabler[DIV_ROUND_UP(1020, 32)];
+};
 
-typedef enum INT_SIGTYPE {
-	INT_SIGTYPE_IRQ,
-	INT_SIGTYPE_FIQ
-} eINT_SIGTYPE;
+struct gic_cpu_data {
+	uint32_t ctlr;
+	uint32_t pmr;
+};
 
-#define g_gicd		((pGICD_REG)GICD_BASE)
-#define g_gicc		((pGICC_REG)GICC_BASE)
+static struct gic_dist_data gicd_save;
+static struct gic_cpu_data gicc_save;
 
 __maybe_unused static u8 g_gic_cpumask = 0x01;
 
-static inline void int_set_prio_filter(u32 nprio)
+__maybe_unused static u32 gic_get_cpumask(void)
 {
-	g_gicc->iccpmr = (nprio & 0xff);
-}
+	u32 mask = 0, i;
 
-static inline void int_enable_distributor(void)
-{
-	g_gicd->icddcr = 0x01;
-}
+	for (i = mask = 0; i < 32; i += 4) {
+		mask = gicd_readl(GICD_ITARGETSRn + 4 * i);
+		mask |= mask >> 16;
+		mask |= mask >> 8;
+		if (mask)
+			break;
+	}
 
-static inline void int_disable_distributor(void)
-{
-	g_gicd->icddcr = 0x00;
-}
+	if (!mask)
+		printf("GIC CPU mask not found.\n");
 
-static inline void int_enable_secure_signal(void)
-{
-	g_gicc->iccicr |= 0x01;
+	debug("GIC CPU mask = 0x%08x\n", mask);
+	return mask;
 }
 
-static inline void int_disable_secure_signal(void)
+static inline void int_set_prio_filter(u32 priority)
 {
-	g_gicc->iccicr &= (~0x01);
+	gicc_writel(priority & 0xff, GICC_PMR);
 }
 
-static inline void int_enable_nosecure_signal(void)
+static inline void int_enable_distributor(void)
 {
-	g_gicc->iccicr |= 0x02;
-}
+	u32 val;
 
-static inline void int_disable_nosecure_signal(void)
-{
-	g_gicc->iccicr &= (~0x02);
+	val = gicd_readl(GICD_CTLR);
+	val |= 0x01;
+	gicd_writel(val, GICD_CTLR);
 }
 
-static int gic_irq_set_trigger(int irq, eINT_TRIG ntrig)
+static inline void int_disable_distributor(void)
 {
-	u32 group, offset;
+	u32 val;
 
-	if (irq >= PLATFORM_GIC_IRQS_NR)
-		return -EINVAL;
-
-	group = irq / 16;
-	offset = irq % 16;
-
-	if (ntrig == INT_LEVEL_TRIGGER)
-		g_gicd->icdicfr[group] &= (~(1 << (2 * offset + 1)));
-	else
-		g_gicd->icdicfr[group] |= (1 << (2 * offset + 1));
-
-	return 0;
+	val = gicd_readl(GICD_CTLR);
+	val &= ~0x01;
+	gicd_writel(val, GICD_CTLR);
 }
 
-__maybe_unused static int gic_irq_set_pending(int irq)
+static inline void int_enable_secure_signal(void)
 {
-	u32 group, offset;
+	u32 val;
 
-	if (irq >= PLATFORM_GIC_IRQS_NR)
-		return -EINVAL;
-
-	group = irq / 32;
-	offset = irq % 32;
-	g_gicd->icdispr[group] = (0x1 << offset);
-
-	return 0;
+	val = gicc_readl(GICC_CTLR);
+	val |= 0x01;
+	gicc_writel(val, GICC_CTLR);
 }
 
-__maybe_unused static int gic_irq_clear_pending(int irq)
+static inline void int_disable_secure_signal(void)
 {
-	u32 group, offset;
-
-	if (irq >= PLATFORM_GIC_IRQS_NR)
-		return -EINVAL;
+	u32 val;
 
-	group = irq / 32;
-	offset = irq % 32;
-	g_gicd->icdicpr[group] = (0x1 << offset);
-
-	return 0;
+	val = gicc_readl(GICC_CTLR);
+	val &= ~0x01;
+	gicc_writel(val, GICC_CTLR);
 }
 
-__maybe_unused static int gic_irq_set_secure(int irq, eINT_SECURE nsecure)
+static inline void int_enable_nosecure_signal(void)
 {
-	u32 group, offset;
+	u32 val;
 
-	if (irq >= PLATFORM_GIC_IRQS_NR)
-		return -EINVAL;
+	val = gicc_readl(GICC_CTLR);
+	val |= 0x02;
+	gicc_writel(val, GICC_CTLR);
+}
 
-	group = irq / 32;
-	offset = irq % 32;
-	g_gicd->icdiser[group] |= nsecure << offset;
+static inline void int_disable_nosecure_signal(void)
+{
+	u32 val;
 
-	return 0;
+	val = gicc_readl(GICC_CTLR);
+	val &= ~0x02;
+	gicc_writel(val, GICC_CTLR);
 }
 
-__maybe_unused static u32 gic_get_cpumask(void)
+static int gic_irq_set_trigger(int irq, eINT_TRIG trig)
 {
-	u32 mask = 0, i;
-
-	for (i = mask = 0; i < 32; i += 4) {
-		mask = g_gicd->itargetsr[i];
-		mask |= mask >> 16;
-		mask |= mask >> 8;
-		if (mask)
-			break;
+	u32 val;
+
+	if (trig == INT_LEVEL_TRIGGER) {
+		val = gicd_readl(GICD_ICFGR + IRQ_REG_X16(irq));
+		val &= ~(1 << (2 * IRQ_REG_X16_OFFSET(irq) + 1));
+		gicd_writel(val, GICD_ICFGR + IRQ_REG_X16(irq));
+	} else {
+		val = gicd_readl(GICD_ICFGR + IRQ_REG_X16(irq));
+		val |= (1 << (2 * IRQ_REG_X16_OFFSET(irq) + 1));
+		gicd_writel(val, GICD_ICFGR + IRQ_REG_X16(irq));
 	}
 
-	if (!mask)
-		printf("GIC CPU mask not found.\n");
-
-	debug("GIC CPU mask = 0x%08x\n", mask);
-
-	return mask;
+	return 0;
 }
 
 static int gic_irq_enable(int irq)
 {
 #ifdef CONFIG_GICV2
+	u32 val;
 	u32 shift = (irq % 4) * 8;
-	u32 offset = (irq / 4);
-	u32 M, N;
 
 	if (irq >= PLATFORM_GIC_IRQS_NR)
 		return -EINVAL;
 
-	M = irq / 32;
-	N = irq % 32;
+	/* set enable */
+	val = gicd_readl(GICD_ISENABLERn + IRQ_REG_X32(irq));
+	val |= 1 << IRQ_REG_X32_OFFSET(irq);
+	gicd_writel(val, GICD_ISENABLERn + IRQ_REG_X32(irq));
 
-	g_gicc->iccicr &= (~0x08);
-	g_gicd->icdiser[M] = (0x1 << N);
-	g_gicd->itargetsr[offset] &= ~(0xFF << shift);
-	g_gicd->itargetsr[offset] |= (g_gic_cpumask << shift);
-#else
-	u32 M, N;
 
-	if (irq >= PLATFORM_GIC_IRQS_NR)
-		return -EINVAL;
+	/* set target */
+	val = gicd_readl(GICD_ITARGETSRn + IRQ_REG_X4(irq));
+	val &= ~(0xFF << shift);
+	val |= (g_gic_cpumask << shift);
+	gicd_writel(val, GICD_ITARGETSRn + IRQ_REG_X4(irq));
 
-	M = irq / 32;
-	N = irq % 32;
-	g_gicd->icdiser[M] = (0x1 << N);
+#else
+	u32 val;
+
+	val = gicd_readl(GICD_ISENABLERn + IRQ_REG_X32(irq));
+	val |= 1 << IRQ_REG_X32_OFFSET(irq);
+	gicd_writel(val, GICD_ISENABLERn + IRQ_REG_X32(irq));
 #endif
 
 	return 0;
@@ -183,14 +176,8 @@ static int gic_irq_enable(int irq)
 
 static int gic_irq_disable(int irq)
 {
-	u32 group, offset;
-
-	if (irq >= PLATFORM_GIC_IRQS_NR)
-		return -EINVAL;
-
-	group = irq / 32;
-	offset = irq % 32;
-	g_gicd->icdicer[group] = (0x1 << offset);
+	gicd_writel(1 << IRQ_REG_X32_OFFSET(irq),
+		    GICD_ICENABLERn + IRQ_REG_X32(irq));
 
 	return 0;
 }
@@ -208,11 +195,11 @@ static int gic_irq_set_type(int irq, unsigned int type)
 	switch (type) {
 	case IRQ_TYPE_EDGE_RISING:
 	case IRQ_TYPE_EDGE_FALLING:
-		int_type = INT_EDGE_TRIGGER;
+		int_type = 0x1;
 		break;
 	case IRQ_TYPE_LEVEL_HIGH:
 	case IRQ_TYPE_LEVEL_LOW:
-		int_type = INT_LEVEL_TRIGGER;
+		int_type = 0x0;
 		break;
 	default:
 		return -EINVAL;
@@ -226,7 +213,7 @@ static int gic_irq_set_type(int irq, unsigned int type)
 static void gic_irq_eoi(int irq)
 {
 #ifdef CONFIG_GICV2
-	g_gicc->icceoir = irq;
+	gicc_writel(irq, GICC_EOIR);
 #else
 	asm volatile("msr " __stringify(ICC_EOIR1_EL1) ", %0"
 			: : "r" ((u64)irq));
@@ -239,7 +226,7 @@ static void gic_irq_eoi(int irq)
 static int gic_irq_get(void)
 {
 #ifdef CONFIG_GICV2
-	return g_gicc->icciar & 0x3ff; /* bit9 - bit0 */
+	return gicc_readl(GICC_IAR) & 0x3fff; /* bit9 - bit0 */
 #else
 	u64 irqstat;
 
@@ -248,28 +235,6 @@ static int gic_irq_get(void)
 #endif
 }
 
-struct gic_dist_data {
-	uint32_t ctlr;
-	uint32_t icfgr[DIV_ROUND_UP(1020, 16)];
-	uint32_t itargetsr[DIV_ROUND_UP(1020, 4)];
-	uint32_t ipriorityr[DIV_ROUND_UP(1020, 4)];
-	uint32_t igroupr[DIV_ROUND_UP(1020, 32)];
-	uint32_t ispendr[DIV_ROUND_UP(1020, 32)];
-	uint32_t isenabler[DIV_ROUND_UP(1020, 32)];
-};
-
-struct gic_cpu_data {
-	uint32_t ctlr;
-	uint32_t pmr;
-};
-
-static struct gic_dist_data gicd_save;
-static struct gic_cpu_data gicc_save;
-
-#define IRQ_REG_X4(irq)		(4 * ((irq) / 4))
-#define IRQ_REG_X16(irq)	(4 * ((irq) / 16))
-#define IRQ_REG_X32(irq)	(4 * ((irq) / 32))
-
 static int gic_irq_suspend(void)
 {
 	int irq_nr, i, irq;
@@ -287,22 +252,28 @@ static int gic_irq_suspend(void)
 	gicd_save.ctlr = gicd_readl(GICD_CTLR);
 
 	for (i = 0, irq = 0; irq < irq_nr; irq += 16)
-		gicd_save.icfgr[i++] = gicd_readl(GICD_ICFGR + IRQ_REG_X16(irq));
+		gicd_save.icfgr[i++] =
+			gicd_readl(GICD_ICFGR + IRQ_REG_X16(irq));
 
 	for (i = 0, irq = 0; irq < irq_nr; irq += 4)
-		gicd_save.itargetsr[i++] = gicd_readl(GICD_ITARGETSRn + IRQ_REG_X4(irq));
+		gicd_save.itargetsr[i++] =
+			gicd_readl(GICD_ITARGETSRn + IRQ_REG_X4(irq));
 
 	for (i = 0, irq = 0; irq < irq_nr; irq += 4)
-		gicd_save.ipriorityr[i++] = gicd_readl(GICD_IPRIORITYRn + IRQ_REG_X4(irq));
+		gicd_save.ipriorityr[i++] =
+			gicd_readl(GICD_IPRIORITYRn + IRQ_REG_X4(irq));
 
 	for (i = 0, irq = 0; irq < irq_nr; irq += 32)
-		gicd_save.igroupr[i++] = gicd_readl(GICD_IGROUPRn + IRQ_REG_X32(irq));
+		gicd_save.igroupr[i++] =
+			gicd_readl(GICD_IGROUPRn + IRQ_REG_X32(irq));
 
 	for (i = 0, irq = 0; irq < irq_nr; irq += 32)
-		gicd_save.ispendr[i++] = gicd_readl(GICD_ISPENDRn + IRQ_REG_X32(irq));
+		gicd_save.ispendr[i++] =
+			gicd_readl(GICD_ISPENDRn + IRQ_REG_X32(irq));
 
 	for (i = 0, irq = 0; irq < irq_nr; irq += 32)
-		gicd_save.isenabler[i++] = gicd_readl(GICD_ISENABLERn + IRQ_REG_X32(irq));
+		gicd_save.isenabler[i++] =
+			gicd_readl(GICD_ISENABLERn + IRQ_REG_X32(irq));
 
 	dsb();
 
@@ -324,27 +295,34 @@ static int gic_irq_resume(void)
 
 	/* Clear all interrupt */
 	for (i = 0, irq = 0; irq < irq_nr; irq += 32)
-		gicd_writel(0xffffffff, GICD_ICENABLERn + IRQ_REG_X32(irq));
+		gicd_writel(0xffffffff,
+			    GICD_ICENABLERn + IRQ_REG_X32(irq));
 
 	for (i = 0, irq = 0; irq < irq_nr; irq += 16)
-		gicd_writel(gicd_save.icfgr[i++], GICD_ICFGR + IRQ_REG_X16(irq));
+		gicd_writel(gicd_save.icfgr[i++],
+			    GICD_ICFGR + IRQ_REG_X16(irq));
 
 	for (i = 0, irq = 0; irq < irq_nr; irq += 4)
-		gicd_writel(gicd_save.itargetsr[i++], GICD_ITARGETSRn + IRQ_REG_X4(irq));
+		gicd_writel(gicd_save.itargetsr[i++],
+			    GICD_ITARGETSRn + IRQ_REG_X4(irq));
 
 	for (i = 0, irq = 0; irq < irq_nr; irq += 4)
-		gicd_writel(gicd_save.ipriorityr[i++], GICD_IPRIORITYRn + IRQ_REG_X4(irq));
+		gicd_writel(gicd_save.ipriorityr[i++],
+			    GICD_IPRIORITYRn + IRQ_REG_X4(irq));
 
 	for (i = 0, irq = 0; irq < irq_nr; irq += 32)
-		gicd_writel(gicd_save.igroupr[i++], GICD_IGROUPRn + IRQ_REG_X32(irq));
+		gicd_writel(gicd_save.igroupr[i++],
+			    GICD_IGROUPRn + IRQ_REG_X32(irq));
 
 	for (i = 0, irq = 0; irq < irq_nr; irq += 32)
-		gicd_writel(gicd_save.isenabler[i++], GICD_ISENABLERn + IRQ_REG_X32(irq));
+		gicd_writel(gicd_save.isenabler[i++],
+			    GICD_ISENABLERn + IRQ_REG_X32(irq));
 
 	for (i = 0, irq = 0; irq < irq_nr; irq += 32)
-		gicd_writel(gicd_save.ispendr[i++], GICD_ISPENDRn + IRQ_REG_X32(irq));
-	dsb();
+		gicd_writel(gicd_save.ispendr[i++],
+			    GICD_ISPENDRn + IRQ_REG_X32(irq));
 
+	dsb();
 	gicc_writel(gicc_save.pmr, GICC_PMR);
 	gicc_writel(gicc_save.ctlr, GICC_CTLR);
 	gicd_writel(gicd_save.ctlr, GICD_CTLR);
@@ -358,19 +336,24 @@ static int gic_irq_init(void)
 {
 	/* GICV3 done in: arch/arm/cpu/armv8/start.S */
 #ifdef CONFIG_GICV2
+	u32 val;
+
 	/* end of interrupt */
-	g_gicc->icceoir = PLATFORM_GIC_IRQS_NR;
+	gicc_writel(PLATFORM_GIC_IRQS_NR, GICC_EOIR);
 
 	/* disable gicc and gicd */
-	g_gicc->iccicr = 0x00;
-	g_gicd->icddcr = 0x00;
-
-	/* enable interrupt */
-	g_gicd->icdicer[0] = 0xFFFFFFFF;
-	g_gicd->icdicer[1] = 0xFFFFFFFF;
-	g_gicd->icdicer[2] = 0xFFFFFFFF;
-	g_gicd->icdicer[3] = 0xFFFFFFFF;
-	g_gicd->icdicfr[3] &= ~(1 << 1);
+	gicc_writel(0, GICC_CTLR);
+	gicd_writel(0, GICD_CTLR);
+
+	/* disable interrupt */
+	gicd_writel(0xffffffff, GICD_ICENABLERn + 0);
+	gicd_writel(0xffffffff, GICD_ICENABLERn + 4);
+	gicd_writel(0xffffffff, GICD_ICENABLERn + 8);
+	gicd_writel(0xffffffff, GICD_ICENABLERn + 12);
+
+	val = gicd_readl(GICD_ICFGR + 12);
+	val &= ~(1 << 1);
+	gicd_writel(val, GICD_ICFGR + 12);
 
 	/* set interrupt priority threhold min: 256 */
 	int_set_prio_filter(0xff);
diff --git a/drivers/irq/irq-gic.h b/drivers/irq/irq-gic.h
index 4bd53c2092..1f84de54fc 100644
--- a/drivers/irq/irq-gic.h
+++ b/drivers/irq/irq-gic.h
@@ -9,48 +9,6 @@
 
 #include <irq-platform.h>
 
-/* INTC Registers */
-typedef volatile struct tagGICD_REG {
-	u32 icddcr;		/* 0x000 */
-	u32 icdictr;		/* 0x004 */
-	u32 icdiidr;		/* 0x008 */
-	u32 reserved0[29];
-	u32 icdisr[4];		/* 0x080 */
-	u32 reserved1[28];
-	u32 icdiser[4];		/* 0x100 */
-	u32 reserved2[28];
-	u32 icdicer[4];		/* 0x180: GICD_ISENABLERn */
-	u32 reserved3[28];
-	u32 icdispr[4];		/* 0x200 */
-	u32 reserved4[28];
-	u32 icdicpr[4];		/* 0x280 */
-	u32 reserved5[28];
-	u32 icdiabr[4];		/* 0x300 */
-	u32 reserved6[60];
-	u32 icdipr_sgi[4];	/* 0x400 */
-	u32 icdipr_ppi[4];	/* 0x410 */
-	u32 icdipr_spi[18];	/* 0x420 */
-	u32 reserved7[230];
-	u32 itargetsr[255];	/* 0x800 */
-	u32 reserved9[1];
-	u32 icdicfr[7];		/* 0xc00: GICD_ICFGRn: trigger level/edge */
-	u32 reserved8[185];
-	u32 icdsgir;		/* 0xf00 */
-} GICD_REG, *pGICD_REG;
-
-typedef volatile struct tagGICC_REG {
-	u32 iccicr;		/* 0x00 */
-	u32 iccpmr;		/* 0x04: GICC_PMR */
-	u32 iccbpr;		/* 0x08 */
-	u32 icciar;		/* 0x0c */
-	u32 icceoir;		/* 0x10 */
-	u32 iccrpr;		/* 0x14 */
-	u32 icchpir;		/* 0x18 */
-	u32 iccabpr;		/* 0x1c */
-	u32 reserved0[55];
-	u32 icciidr;		/* 0xfc */
-} GICC_REG, *pGICC_REG;
-
 #define PLATFORM_GIC_IRQS_NR		GIC_IRQS_NR
 #define PLATFORM_GPIO_IRQS_NR		GPIO_IRQS_NR
 #define PLATFORM_MAX_IRQS_NR		(GIC_IRQS_NR + GPIO_IRQS_NR)
diff --git a/include/irq-platform.h b/include/irq-platform.h
index 6694b5f7eb..d4269c9761 100644
--- a/include/irq-platform.h
+++ b/include/irq-platform.h
@@ -22,7 +22,7 @@
 #define IRQ_TIMER1			61
 #define IRQ_GPIO0			68
 #define IRQ_GPIO1			69
-#define IRQ_GPIO2			79
+#define IRQ_GPIO2			70
 #define IRQ_GPIO3			71
 
 #elif defined(CONFIG_ROCKCHIP_RK322X)

commit 618d619d029017f6d4f73982f7da1caf965f2b26
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Dec 8 16:49:38 2017 +0800

    input: rk8xx pwrkey: replace printf with debug
    
    I forgot to do this.
    
    Change-Id: I4db233255a633cd403f4a279970d069b39124fe6
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/rk8xx_pwrkey.c b/drivers/input/rk8xx_pwrkey.c
index 497eac4314..e5d99d358a 100644
--- a/drivers/input/rk8xx_pwrkey.c
+++ b/drivers/input/rk8xx_pwrkey.c
@@ -139,13 +139,13 @@ static void pwrkey_irq_handler(int irq, void *data)
 	/* fall event */
 	if (val & key->pwron_fall_int) {
 		key->key_down_t = get_ms(0);
-		printf("%s: key down: %llu ms\n", __func__, key->key_down_t);
+		debug("%s: key down: %llu ms\n", __func__, key->key_down_t);
 	}
 
 	/* rise event */
 	if (val & key->pwron_rise_int) {
 		key->key_up_t = get_ms(0);
-		printf("%s: key up: %llu ms\n", __func__, key->key_up_t);
+		debug("%s: key up: %llu ms\n", __func__, key->key_up_t);
 	}
 
 	/* clear intertup */

commit 1225f03eaae14cb42fe62e1cf8c8a5c050447cd2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 27 16:57:57 2017 +0800

    rockchip: fix blk_dread return value check error
    
    blk_dread returns negtive error code or blocks number
    that read successfully.
    
    Change-Id: I0f2afe98cfb64fe8e83a065fa64b91481856f5be
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 2f026dc624..16eac39052 100644
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -215,7 +215,7 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 
 	hdr = (void *)andr_hdr;
 	ret = blk_dread(dev_desc, offset, 1, hdr);
-	if (ret < 0)
+	if (ret != 1)
 		goto out;
 	ret = resource_image_check_header(hdr);
 	if (ret < 0)
@@ -228,7 +228,7 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 	}
 	ret = blk_dread(dev_desc, offset + hdr->c_offset,
 			hdr->e_blks * hdr->e_nums, content);
-	if (ret < 0)
+	if (ret != (hdr->e_blks * hdr->e_nums))
 		goto err;
 
 init_list:
@@ -300,7 +300,9 @@ int rockchip_read_resource_file(void *buf, const char *name,
 	dev_desc = rockchip_get_bootdev();
 	ret = blk_dread(dev_desc, file->rsce_base + file->f_offset + offset,
 			blks, buf);
-	if (!ret)
+	if (ret != blks)
+		ret = -EIO;
+	else
 		ret = len;
 
 	return ret;
diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 5bd8a80c5c..54d3f6fb79 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -97,8 +97,11 @@ static int read_rockchip_image(struct blk_desc *dev_desc,
 
 	/* read first block with header imformation */
 	ret = blk_dread(dev_desc, part_info->start, 1, img);
-	if (ret < 0)
+	if (ret != 1) {
+		ret = -EIO;
 		goto err;
+	}
+
 	if (img->tag != TAG_KERNEL) {
 		printf("%s: invalid image tag(0x%x)\n", part_info->name, img->tag);
 		ret = -EINVAL;
@@ -113,8 +116,13 @@ static int read_rockchip_image(struct blk_desc *dev_desc,
 	cnt = DIV_ROUND_UP(img->size + 8 + 4, RK_BLK_SIZE);
 	ret = blk_dread(dev_desc, part_info->start + 1, cnt - 1,
 			dst + RK_BLK_SIZE - header_len);
-	if (!ret)
+	if (ret != (cnt - 1)) {
+		printf("%s try to read %d blocks failed, only read %d blocks\n",
+		       part_info->name, cnt - 1, ret);
+		ret = -EIO;
+	} else {
 		ret = img->size;
+	}
 
 #ifdef CONFIG_ROCKCHIP_CRC
 	printf("%s image CRC32 verify... ", part_info->name);
@@ -192,8 +200,10 @@ int rockchip_get_boot_mode(void)
 	ret = blk_dread(dev_desc,
 			part_info.start + BOOTLOADER_MESSAGE_BLK_OFFSET,
 			size >> 9, bmsg);
-	if (ret < 0)
+	if (ret != (size >> 9)) {
+		ret = -EIO;
 		goto err;
+	}
 
 	if (!strcmp(bmsg->command, "boot-recovery")) {
 		printf("boot mode: recovery\n");
diff --git a/disk/part_rkparm.c b/disk/part_rkparm.c
index a9af237a1e..b2c04e527d 100644
--- a/disk/part_rkparm.c
+++ b/disk/part_rkparm.c
@@ -94,7 +94,7 @@ static int rkparm_init_param(struct blk_desc *dev_desc,
 
 	ret = blk_dread(dev_desc, RK_PARAM_OFFSET, MAX_PARAM_SIZE >> 9,
 			(ulong *)param);
-	if (ret < 0) {
+	if (ret != (MAX_PARAM_SIZE >> 9)) {
 		printf("%s param read fail\n", __func__);
 		return -EINVAL;
 	}

commit 65f7800c7de8cff8084d11ed5a31f9c70bce3f40
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 27 16:28:52 2017 +0800

    common: boot_rkimg: fix 'krenel' typo
    
    Change-Id: I4f4d4bce863208b7297ed57aa51afecada4c8f37
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 746897355a..5bd8a80c5c 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -226,7 +226,7 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 					 &kernel_part);
 
 	if (part_num < 0 || !boot_part) {
-		printf("%s krenel or boot part info error\n", __func__);
+		printf("%s kernel or boot part info error\n", __func__);
 		ret = -EINVAL;
 		goto out;
 	}
@@ -234,7 +234,7 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 	kernel_size = read_rockchip_image(dev_desc, &kernel_part,
 					  (void *)kernel_addr_r);
 	if (kernel_size < 0) {
-		printf("%s krenel part read error\n", __func__);
+		printf("%s kernel part read error\n", __func__);
 		ret = -EINVAL;
 		goto out;
 	}

commit f562460ada02bb61e6a1d22dbc36f160e732d0ca
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Dec 15 11:15:03 2017 +0800

    rockchip: add a common script for generate fit its
    
    Rockchip release bl31.elf file for armv8 SoCs like rk3399, rk3328,
    the elf have more than one section, we need to decode it first and
    packed them into u-boot.itb with its file. This script is to generate
    the its script.
    Need default bl31.elf in root directory of U-Boot source and dtb
    as parameter.
    
    Change-Id: Id70181b5d80beaf71458f78d274375efaf871364
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/arch/arm/mach-rockchip/make_fit_atf.py b/arch/arm/mach-rockchip/make_fit_atf.py
new file mode 100755
index 0000000000..7c6dd57678
--- /dev/null
+++ b/arch/arm/mach-rockchip/make_fit_atf.py
@@ -0,0 +1,221 @@
+#!/usr/bin/env python2
+"""
+A script to generate FIT image source for rockchip boards
+with ARM Trusted Firmware
+and multiple device trees (given on the command line)
+
+usage: $0 <dt_name> [<dt_name> [<dt_name] ...]
+"""
+
+import os
+import sys
+import getopt
+
+# pip install pyelftools
+from elftools.elf.elffile import ELFFile
+from elftools.elf.sections import SymbolTableSection
+from elftools.elf.segments import Segment, InterpSegment, NoteSegment
+
+ELF_SEG_P_TYPE='p_type'
+ELF_SEG_P_PADDR='p_paddr'
+ELF_SEG_P_VADDR='p_vaddr'
+ELF_SEG_P_OFFSET='p_offset'
+ELF_SEG_P_FILESZ='p_filesz'
+ELF_SEG_P_MEMSZ='p_memsz'
+
+DT_HEADER="""/*
+ * Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * Minimal dts for a SPL FIT image payload.
+ *
+ * SPDX-License-Identifier: GPL-2.0+  X11
+ */
+/dts-v1/;
+
+/ {
+	description = "Configuration to load ATF before U-Boot";
+	#address-cells = <1>;
+
+	images {
+		uboot@1 {
+			description = "U-Boot (64-bit)";
+			data = /incbin/("u-boot-nodtb.bin");
+			type = "standalone";
+			os = "U-Boot";
+			arch = "arm64";
+			compression = "none";
+			load = <0x%08x>;
+		};
+"""
+
+DT_IMAGES_NODE_END="""
+    };
+"""
+
+DT_END="""
+};
+"""
+
+def append_atf_node(file, atf_index, phy_addr):
+    """
+    Append ATF DT node to input FIT dts file.
+    """
+    data = 'bl31_0x%08x.bin' % phy_addr
+    print >> file, '\t\tatf@%d {' % atf_index
+    print >> file, '\t\t\tdescription = \"ARM Trusted Firmware\";'
+    print >> file, '\t\t\tdata = /incbin/("%s");' % data
+    print >> file, '\t\t\ttype = "firmware";'
+    print >> file, '\t\t\tarch = "arm64";'
+    print >> file, '\t\t\tos = "arm-trusted-firmware";'
+    print >> file, '\t\t\tcompression = "none";'
+    print >> file, '\t\t\tload = <0x%08x>;' % phy_addr
+    if atf_index == 1:
+        print >> file, '\t\t\tentry = <0x%08x>;' % phy_addr
+    print >> file, '\t\t};'
+    print >> file, ''
+
+def append_fdt_node(file, dtbs):
+    """
+    Append FDT nodes.
+    """
+    cnt = 1
+    for dtb in dtbs:
+        dtname = os.path.basename(dtb)
+        print >> file, '\t\tfdt@%d {' % cnt
+        print >> file, '\t\t\tdescription = "%s";' % dtname
+        print >> file, '\t\t\tdata = /incbin/("%s");' % dtb
+        print >> file, '\t\t\ttype = "flat_dt";'
+        print >> file, '\t\t\tcompression = "none";'
+        print >> file, '\t\t};'
+        print >> file, ''
+        cnt = cnt + 1
+
+def append_conf_section(file, cnt, dtname, atf_cnt):
+    print >> file, '\t\tconfig@%d {' % cnt
+    print >> file, '\t\t\tdescription = "%s";' % dtname
+    print >> file, '\t\t\tfirmware = "atf@1";'
+    print >> file, '\t\t\tloadables = "uboot@1",',
+    for i in range(1, atf_cnt):
+        print >> file, '"atf@%d"' % (i+1),
+        if i != (atf_cnt - 1):
+            print >> file, ',',
+        else:
+            print >> file, ';'
+    print >> file, '\t\t\tfdt = "fdt@1";'
+    print >> file, '\t\t};'
+    print >> file, ''
+
+def append_conf_node(file, dtbs, atf_cnt):
+    """
+    Append configeration nodes.
+    """
+    cnt = 1
+    print >> file, '\tconfigurations {'
+    print >> file, '\t\tdefault = "config@1";'
+    for dtb in dtbs:
+        dtname = os.path.basename(dtb)
+        append_conf_section(file, cnt, dtname, atf_cnt)
+        cnt = cnt + 1
+    print >> file, '\t};'
+    print >> file, ''
+
+def generate_atf_fit_dts(fit_file_name, bl31_file_name, uboot_file_name, dtbs_file_name):
+    """
+    Generate FIT script for ATF image.
+    """
+    if fit_file_name != sys.stdout:
+        fit_file = open(fit_file_name, "wb")
+    else:
+        fit_file = sys.stdout
+
+    num_load_seg = 0
+    p_paddr = 0xFFFFFFFF
+    with open(uboot_file_name) as uboot_file:
+        uboot = ELFFile(uboot_file)
+        for i in range(uboot.num_segments()):
+            seg = uboot.get_segment(i)
+            if ('PT_LOAD' == seg.__getitem__(ELF_SEG_P_TYPE)):
+                p_paddr = seg.__getitem__(ELF_SEG_P_PADDR)
+                num_load_seg = num_load_seg + 1
+
+    assert (p_paddr != 0xFFFFFFFF and num_load_seg == 1)
+
+    print >> fit_file, DT_HEADER % p_paddr
+
+    with open(bl31_file_name) as bl31_file:
+        bl31 = ELFFile(bl31_file)
+        for i in range(bl31.num_segments()):
+            seg = bl31.get_segment(i)
+            if ('PT_LOAD' == seg.__getitem__(ELF_SEG_P_TYPE)):
+                paddr = seg.__getitem__(ELF_SEG_P_PADDR)
+                p= seg.__getitem__(ELF_SEG_P_PADDR)
+                append_atf_node(fit_file, i+1, paddr)
+    atf_cnt = i+1
+    append_fdt_node(fit_file, dtbs_file_name)
+    print >> fit_file, '%s' % DT_IMAGES_NODE_END
+    append_conf_node(fit_file, dtbs_file_name, atf_cnt)
+    print >> fit_file, '%s' % DT_END
+
+    if fit_file_name != sys.stdout:
+        fit_file.close()
+
+def generate_atf_binary(bl31_file_name):
+    with open(bl31_file_name) as bl31_file:
+        bl31 = ELFFile(bl31_file)
+
+        num = bl31.num_segments()
+        for i in range(num):
+            seg = bl31.get_segment(i)
+            if ('PT_LOAD' == seg.__getitem__(ELF_SEG_P_TYPE)):
+                paddr = seg.__getitem__(ELF_SEG_P_PADDR)
+                file_name = 'bl31_0x%08x.bin' % paddr
+                with open(file_name, "wb") as atf:
+                    atf.write(seg.data());
+
+def get_bl31_segments_info(bl31_file_name):
+    """
+    Get load offset, physical offset, file size
+    from bl31 elf file program headers.
+    """
+    with open(bl31_file_name) as bl31_file:
+        bl31 = ELFFile(bl31_file)
+
+        num = bl31.num_segments()
+        print 'Number of Segments : %d' % bl31.num_segments()
+        for i in range(num):
+            print 'Segment %d' % i
+            seg = bl31.get_segment(i)
+            ptype = seg[ELF_SEG_P_TYPE]
+            poffset = seg[ELF_SEG_P_OFFSET]
+            pmemsz = seg[ELF_SEG_P_MEMSZ]
+            pfilesz = seg[ELF_SEG_P_FILESZ]
+            print 'type: %s\nfilesz: %08x\nmemsz: %08x\noffset: %08x' % (ptype, pfilesz, pmemsz, poffset)
+            paddr = seg[ELF_SEG_P_PADDR]
+            print 'paddr: %08x' % paddr
+
+def main():
+    uboot_elf="./u-boot"
+    bl31_elf="./bl31.elf"
+    FIT_ITS=sys.stdout
+
+    opts, args = getopt.getopt(sys.argv[1:], "o:u:b:h")
+    for opt, val in opts:
+        if opt == "-o":
+            FIT_ITS=val
+        elif opt == "-u":
+            uboot_elf=val
+        elif opt == "-b":
+            bl31_elf=val
+        elif opt == "-h":
+            print __doc__
+            sys.exit(2)
+
+    dtbs = args
+    #get_bl31_segments_info("u-boot")
+    #get_bl31_segments_info("bl31.elf")
+
+    generate_atf_fit_dts(FIT_ITS, bl31_elf, uboot_elf, dtbs)
+    generate_atf_binary(bl31_elf);
+
+if __name__ == "__main__":
+    main()

commit 15974eb4a15f60b20d5b5b5adaf54c965f853f7e
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 6 09:39:57 2017 +0800

    rockchip: add fit source file for pack itb with op-tee
    
    We package U-Boot and OP-TEE into one itb file for SPL,
    so that we can support OP-TEE in SPL.
    
    Change-Id: I2c20333d6f3bb11ac1ec4bbb32c901028fb15d64
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/fit_spl_optee.its b/arch/arm/mach-rockchip/fit_spl_optee.its
new file mode 100644
index 0000000000..3aeecb8ec5
--- /dev/null
+++ b/arch/arm/mach-rockchip/fit_spl_optee.its
@@ -0,0 +1,50 @@
+/*
+ * Copyright (C) 2017 Rockchip Electronic Co.,Ltd
+ *
+ * Simple U-boot fit source file containing U-Boot, dtb and optee
+ */
+
+/dts-v1/;
+
+/ {
+	description = "Simple image with OP-TEE support";
+	#address-cells = <1>;
+
+	images {
+		uboot@1 {
+			description = "U-Boot";
+			data = /incbin/("../../../u-boot-nodtb.bin");
+			type = "standalone";
+			os = "U-Boot";
+			arch = "arm";
+			compression = "none";
+			load = <0x61000000>;
+		};
+		optee@1 {
+			description = "OP-TEE";
+			data = /incbin/("../../../tee.bin");
+			type = "firmware";
+			arch = "arm";
+			os = "op-tee";
+			compression = "none";
+			load = <0x68400000>;
+			entry = <0x68400000>;
+		};
+		fdt@1 {
+			description = "dtb";
+			data = /incbin/("../../../u-boot.dtb");
+			type = "flat_dt";
+			compression = "none";
+		};
+	};
+
+	configurations {
+		default = "conf@1";
+		conf@1 {
+			description = "Rockchip armv7 with OP-TEE";
+			firmware = "optee@1";
+			loadables = "uboot@1";
+			fdt = "fdt@1";
+		};
+	};
+};

commit 0aec9aff9e9627f01c6f2caf6cfc274be08b9366
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Dec 27 16:53:38 2017 +0800

    rockchip: boot_rkimg: fix wrong variable
    
    part -> part_info.
    
    Change-Id: Icbcd4191a02115b87d4d552355680691f63ad2e1
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 6188d91a8e..746897355a 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -117,7 +117,7 @@ static int read_rockchip_image(struct blk_desc *dev_desc,
 		ret = img->size;
 
 #ifdef CONFIG_ROCKCHIP_CRC
-	printf("%s image CRC32 verify... ", part->name);
+	printf("%s image CRC32 verify... ", part_info->name);
 	crc32 = rockchip_crc_verify((unsigned char *)(unsigned long)dst,
 				  img->size + 4);
 	if (!crc32) {

commit 6639be8fa96f6bec2845b9f8e6962f94d6d32ffd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Dec 14 15:32:34 2017 +0800

    rockchip: boot_rkimg: add CRC verify for images
    
    Change-Id: I8b5cc6e6ae455eafb46ea022ea1f3a93d04972eb
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index f146a3e630..6188d91a8e 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -10,6 +10,7 @@
 #include <libfdt.h>
 #include <malloc.h>
 #include <asm/arch/resource_img.h>
+#include <asm/arch/rockchip_crc.h>
 #include <boot_rkimg.h>
 
 #define TAG_KERNEL			0x4C4E524B
@@ -84,6 +85,9 @@ static int read_rockchip_image(struct blk_desc *dev_desc,
 	int header_len = 8;
 	int cnt;
 	int ret;
+#ifdef CONFIG_ROCKCHIP_CRC
+	u32 crc32;
+#endif
 
 	img = memalign(ARCH_DMA_MINALIGN, RK_BLK_SIZE);
 	if (!img) {
@@ -111,6 +115,19 @@ static int read_rockchip_image(struct blk_desc *dev_desc,
 			dst + RK_BLK_SIZE - header_len);
 	if (!ret)
 		ret = img->size;
+
+#ifdef CONFIG_ROCKCHIP_CRC
+	printf("%s image CRC32 verify... ", part->name);
+	crc32 = rockchip_crc_verify((unsigned char *)(unsigned long)dst,
+				  img->size + 4);
+	if (!crc32) {
+		printf("fail!\n");
+		ret = -EINVAL;
+	} else {
+		printf("okay.\n");
+	}
+#endif
+
 err:
 	free(img);
 	return ret;

commit 26f074b872298ef96c0e428f41e1f0c5e86eaafc
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Dec 21 16:37:50 2017 +0800

    rockchip: update rkimg bootcmd
    
    Change-Id: Id7e051156e74acc1b0fd5dc50ae4646be2f9067a

diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index 5b3fdb5ddb..62d04f0d09 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -63,7 +63,7 @@
 
 #define RKIMG_BOOTCOMMAND \
 	"if mmc dev 0; then setenv devtype mmc; setenv devnum 0;" \
-	"else if rknand dev 0; then setenv devtype mmc; setenv devnum 0; fi;" \
+	"else if rknand dev 0; then setenv devtype rknand; setenv devnum 0; fi;" \
 	"fi; boot_android ${devtype} ${devnum};" \
 	"bootrkp;"
 

commit 32af749a74b1bd39ca28f9d728979bd5e90cdb62
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Dec 21 16:36:31 2017 +0800

    rockchip: bootrkp: update cmd name
    
    Change-Id: If67d534c73b6ea0ba432dceb85f10e6ee4322e16
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/cmd/bootrkp.c b/cmd/bootrkp.c
index 6c5943f32c..c7a4ec28fa 100644
--- a/cmd/bootrkp.c
+++ b/cmd/bootrkp.c
@@ -30,7 +30,9 @@ static int do_boot_rockchip(cmd_tbl_t *cmdtp, int flag, int argc,
 }
 
 U_BOOT_CMD(
-	boot_rockchip,  CONFIG_SYS_MAXARGS,     1,      do_boot_rockchip,
-	"boot Linux Image image from rockchip partition storage",
-	""
+	bootrkp,  CONFIG_SYS_MAXARGS,     1,      do_boot_rockchip,
+	"Boot Linux Image from rockchip image type",
+	"kernel.img: zImage/Image\n"
+	"boot.img: ramdisk\n"
+	"resource.img: dtb, u-boot logo, kernel logo"
 );

commit bfe741ab9eb4f97371a4e6c24185419d57a3a75f
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Dec 21 15:35:58 2017 +0800

    rockchip: rk3328: set ddr as non-secure in tpl
    
    Set ddr as non-secure so that mmc dma can access.
    
    Change-Id: Ia0f51908a8d428b864a9d71b2a3dd8baeb79b952
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3328-board-tpl.c b/arch/arm/mach-rockchip/rk3328-board-tpl.c
index 0b8a0e16e4..942223f505 100644
--- a/arch/arm/mach-rockchip/rk3328-board-tpl.c
+++ b/arch/arm/mach-rockchip/rk3328-board-tpl.c
@@ -86,6 +86,7 @@ u32 spl_boot_device(void)
 	return BOOT_DEVICE_BOOTROM;
 }
 
+#define FW_DDR_CON_REG 0xff7c0040
 
 void board_init_f(ulong dummy)
 {
@@ -111,4 +112,7 @@ void board_init_f(ulong dummy)
 		printf("DRAM init failed: %d\n", ret);
 		return;
 	}
+	/* Disable the ddr secure region setting to make it non-secure */
+	rk_setreg(FW_DDR_CON_REG, 0x200);
+
 }

commit 93a905c1e0cbf19583c64880db90e6828b3c48f6
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Dec 20 17:51:08 2017 +0800

    spl: atf: pass NULL for bl32_ep pc
    
    Change-Id: Ibfd0054936fffed3603103226e304e4878598c84
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/spl/spl_atf.c b/common/spl/spl_atf.c
index 2f6fff971a..06c4a03920 100644
--- a/common/spl/spl_atf.c
+++ b/common/spl/spl_atf.c
@@ -49,13 +49,14 @@ struct bl31_params *bl2_plat_get_bl31_params(void)
 		       ATF_PARAM_IMAGE_BINARY, ATF_VERSION_1, 0);
 
 	/* Fill BL32 related information if it exists */
-#ifdef BL32_BASE
 	bl2_to_bl31_params->bl32_ep_info = &bl31_params_mem.bl32_ep_info;
 	SET_PARAM_HEAD(bl2_to_bl31_params->bl32_ep_info, ATF_PARAM_EP,
 		       ATF_VERSION_1, 0);
 	bl2_to_bl31_params->bl32_image_info = &bl31_params_mem.bl32_image_info;
 	SET_PARAM_HEAD(bl2_to_bl31_params->bl32_image_info,
 		       ATF_PARAM_IMAGE_BINARY, ATF_VERSION_1, 0);
+#ifndef BL32_BASE
+	bl2_to_bl31_params->bl32_ep_info->pc = 0;
 #endif /* BL32_BASE */
 
 	/* Fill BL33 related information */

commit 4b7908ad8b0aea62e051932acb8beb546125c50a
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Dec 20 17:48:30 2017 +0800

    rockchip: rk3328: ram: pass ddr params to trustos
    
    0x2000000 is a fixed address for share the ddr info.
    
    Change-Id: I37e77f73028b0504776ea662ec7b308ab7d21204
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram_rk3328.c b/drivers/ram/rockchip/sdram_rk3328.c
index 863b1202b7..24825971f7 100644
--- a/drivers/ram/rockchip/sdram_rk3328.c
+++ b/drivers/ram/rockchip/sdram_rk3328.c
@@ -992,6 +992,9 @@ static int rk3328_dmc_probe(struct udevice *dev)
 	priv->info.base = CONFIG_SYS_SDRAM_BASE;
 	priv->info.size = rockchip_sdram_size(
 				(phys_addr_t)&priv->grf->os_reg[2]);
+#ifdef CONFIG_SPL_BUILD
+	rockchip_setup_ddr_param(&priv->info);
+#endif
 #endif
 	return 0;
 }
diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index b7971782b5..e8665d6ee9 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -23,7 +23,7 @@
 #define CONFIG_SPL_STACK		0x00400000
 #define CONFIG_SPL_TEXT_BASE		0x00000000
 #define CONFIG_SPL_MAX_SIZE             0x10000
-#define CONFIG_SPL_BSS_START_ADDR	0x2000000
+#define CONFIG_SPL_BSS_START_ADDR	0x00400000
 #define CONFIG_SPL_BSS_MAX_SIZE         0x2000
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */
 

commit 3a2e317c252fc44dac3b30cf7767877de4440869
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Dec 21 10:53:23 2017 +0800

    rockchip: sdram-common: add api to pass dram info to trust os
    
    Trust OS decode this info like this:
    https://github.com/ARM-software/arm-trusted-firmware/blob/master/plat/rockchip/common/drivers/parameter/ddr_parameter.c#L19
    We have to set a available value, or else we get error info from
    Trust OS like this:
    "ERROR:   over or zero region, nr=3145987, max=10"
    
    Change-Id: I8adbf0332e8b981cda089177e4c62a9f7d326581
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h b/arch/arm/include/asm/arch-rockchip/sdram_common.h
index fec85865ff..55c6b81b2f 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_common.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_common.h
@@ -55,4 +55,8 @@ size_t rockchip_sdram_size(phys_addr_t reg);
 
 /* Called by U-Boot board_init_r for Rockchip SoCs */
 int dram_init(void);
+
+/* Write ddr param to a known place for trustos */
+int rockchip_setup_ddr_param(struct ram_info *info);
+
 #endif
diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
index 76dbdc8715..d6c815cf72 100644
--- a/arch/arm/mach-rockchip/sdram_common.c
+++ b/arch/arm/mach-rockchip/sdram_common.c
@@ -12,6 +12,14 @@
 #include <dm/uclass-internal.h>
 
 DECLARE_GLOBAL_DATA_PTR;
+struct ddr_param{
+	u32 count;
+	u32 reserved;
+	u64 bank_addr;
+	u64 bank_size;
+};
+#define PARAM_DRAM_INFO_OFFSET 0x2000000
+
 size_t rockchip_sdram_size(phys_addr_t reg)
 {
 	u32 rank, col, bk, cs0_row, cs1_row, bw, row_3_4;
@@ -81,3 +89,14 @@ ulong board_get_usable_ram_top(ulong total_size)
 
 	return (gd->ram_top > top) ? top : gd->ram_top;
 }
+
+int rockchip_setup_ddr_param(struct ram_info *info)
+{
+	struct ddr_param *dinfo = (struct ddr_param *)PARAM_DRAM_INFO_OFFSET;
+
+	dinfo->count = 1;
+	dinfo->bank_addr = info->base;
+	dinfo->bank_size = info->size;
+
+	return 0;
+}

commit d738f2ccb45671898f51f285d41a265192d57a01
Author: Zhaoyifeng <zyf@rock-chips.com>
Date:   Thu Dec 21 14:24:40 2017 +0800

    drivers: rknand: fix read error data
    
    ftl_read api with un-aligned data buffer will return error data.
    
    Change-Id: I380667d6d671dd96578830939d137fe74015d8ac
    Signed-off-by: Zhaoyifeng <zyf@rock-chips.com>

diff --git a/drivers/rknand/rk_ftl_arm_v7.S b/drivers/rknand/rk_ftl_arm_v7.S
index 0c82460803..e47273ae39 100644
--- a/drivers/rknand/rk_ftl_arm_v7.S
+++ b/drivers/rknand/rk_ftl_arm_v7.S
@@ -1,3 +1,12 @@
+/*
+ * Copyright (c) 2016-2017, Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ * date: 2017-12-21
+ */
 	.syntax unified
 	.arch armv7-a
 	.fpu softvfp
@@ -2777,1953 +2786,228 @@ NandcXferComp:
 	.word	.LANCHOR38
 	.word	.LANCHOR39
 	.size	NandcXferComp, .-NandcXferComp
-	.section	.text.NandcCopy1KB,"ax",%progbits
+	.section	.text.Ftl_log2,"ax",%progbits
 	.align	1
-	.global	NandcCopy1KB
+	.global	Ftl_log2
 	.thumb
 	.thumb_func
-	.type	NandcCopy1KB, %function
-NandcCopy1KB:
-	@ args = 4, pretend = 0, frame = 0
+	.type	Ftl_log2, %function
+Ftl_log2:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, lr}
-	cmp	r1, #1
-	mov	r4, r2
-	add	r2, r0, #4096
-	ldr	r5, [sp, #16]
-	add	r6, r0, #512
-	add	r2, r2, r4, lsl #9
-	bne	.L376
-	cbz	r3, .L377
-	mov	r0, r2
-	mov	r1, r3
-	mov	r2, #1024
-	bl	memcpy
+	@ link register save eliminated.
+	movs	r2, #1
+	movs	r3, #0
+	b	.L376
 .L377:
-	cbz	r5, .L375
-	lsrs	r4, r4, #1
-	ldrb	r2, [r5, #1]	@ zero_extendqisi2
-	lsls	r3, r4, #4
-	lsls	r4, r4, #6
-	subs	r4, r4, r3
-	ldrb	r3, [r5, #2]	@ zero_extendqisi2
-	lsls	r3, r3, #16
-	orr	r3, r3, r2, lsl #8
-	ldrb	r2, [r5, #0]	@ zero_extendqisi2
-	orrs	r3, r3, r2
-	ldrb	r2, [r5, #3]	@ zero_extendqisi2
-	orr	r3, r3, r2, lsl #24
-	str	r3, [r6, r4]
-	pop	{r4, r5, r6, pc}
+	adds	r3, r3, #1
+	lsls	r2, r2, #1
+	uxth	r3, r3
 .L376:
-	cbz	r3, .L379
-	mov	r1, r2
-	mov	r0, r3
-	mov	r2, #1024
-	bl	memcpy
-.L379:
-	cbz	r5, .L375
-	lsrs	r4, r4, #1
-	lsls	r3, r4, #4
-	lsls	r4, r4, #6
-	subs	r4, r4, r3
-	ldr	r3, [r6, r4]
-	lsrs	r2, r3, #8
-	strb	r3, [r5, #0]
-	strb	r2, [r5, #1]
-	lsrs	r2, r3, #16
-	lsrs	r3, r3, #24
-	strb	r2, [r5, #2]
-	strb	r3, [r5, #3]
-.L375:
-	pop	{r4, r5, r6, pc}
-	.size	NandcCopy1KB, .-NandcCopy1KB
-	.section	.text.NandcXferData,"ax",%progbits
+	cmp	r2, r0
+	bls	.L377
+	subs	r3, r3, #1
+	uxth	r0, r3
+	bx	lr
+	.size	Ftl_log2, .-Ftl_log2
+	.section	.text.FtlPrintInfo,"ax",%progbits
 	.align	1
-	.global	NandcXferData
+	.global	FtlPrintInfo
 	.thumb
 	.thumb_func
-	.type	NandcXferData, %function
-NandcXferData:
-	@ args = 4, pretend = 0, frame = 80
+	.type	FtlPrintInfo, %function
+FtlPrintInfo:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	sub	sp, sp, #88
-	mov	r4, r3
-	mov	fp, r3
-	ldr	r3, .L418
-	mov	r6, r0
-	str	r1, [sp, #12]
-	lsls	r1, r4, #26
-	mov	sl, r2
-	ldr	r5, [sp, #120]
-	ldr	r8, [r3, r0, lsl #3]
-	bne	.L381
-	cbnz	r5, .L382
-	add	r0, sp, #20
-	movs	r1, #255
-	movs	r2, #64
-	add	r5, sp, #20
-	bl	memset
+	@ link register save eliminated.
+	bx	lr
+	.size	FtlPrintInfo, .-FtlPrintInfo
+	.section	.text.FtlSysBlkNumInit,"ax",%progbits
+	.align	1
+	.global	FtlSysBlkNumInit
+	.thumb
+	.thumb_func
+	.type	FtlSysBlkNumInit, %function
+FtlSysBlkNumInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L382
+	cmp	r0, #23
+	it	ls
+	movls	r0, #24
+	ldr	r2, .L382+4
+	str	r0, [r3, #0]
+	ldr	r3, .L382+8
+	ldrh	r3, [r3, #0]
+	muls	r3, r0, r3
+	str	r3, [r2, #0]
+	ldr	r2, .L382+12
+	ldrh	r2, [r2, #0]
+	subs	r0, r2, r0
+	ldr	r2, .L382+16
+	strh	r0, [r2, #0]	@ movhi
+	movs	r0, #0
+	ldr	r2, .L382+20
+	ldr	r2, [r2, #0]
+	subs	r3, r2, r3
+	ldr	r2, .L382+24
+	str	r3, [r2, #0]
+	bx	lr
+.L383:
+	.align	2
 .L382:
+	.word	.LANCHOR40
+	.word	.LANCHOR42
+	.word	.LANCHOR41
+	.word	.LANCHOR44
+	.word	.LANCHOR43
+	.word	.LANCHOR46
+	.word	.LANCHOR45
+	.size	FtlSysBlkNumInit, .-FtlSysBlkNumInit
+	.global	__aeabi_idiv
+	.section	.text.FtlConstantsInit,"ax",%progbits
+	.align	1
+	.global	FtlConstantsInit
+	.thumb
+	.thumb_func
+	.type	FtlConstantsInit, %function
+FtlConstantsInit:
+	@ args = 0, pretend = 0, frame = 32
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r4, r0
+	ldrh	r7, [r0, #8]
+	sub	sp, sp, #32
+	ldr	r3, .L400
+	ldrh	r1, [r0, #10]
+	ldrh	r0, [r0, #12]
+	strh	r7, [r3, #0]	@ movhi
+	ldr	r3, .L400+4
+	ldrh	ip, [r4, #14]
+	ldr	r2, .L400+8
+	strh	r1, [r3, #0]	@ movhi
+	ldr	r3, .L400+12
+	strh	r0, [r3, #0]	@ movhi
+	ldr	r3, .L400+16
+	strh	ip, [r3, #0]	@ movhi
 	movs	r3, #0
-	mov	r0, r6
-	ldr	r1, [sp, #12]
-	mov	r2, sl
-	stmia	sp, {r4, r5}
-	bl	NandcXferStart
-	mov	r0, r6
-	bl	NandcXferComp
-	ldr	r3, [sp, #12]
-	cmp	r3, #0
-	bne	.L405
-	ldr	r3, .L418+4
-	lsr	r0, sl, #1
-	ldr	r1, .L418+8
-	ldr	r4, [r3, #0]
-	ldr	r3, [sp, #12]
-	cmp	r4, #24
-	ite	hi
-	movhi	r4, #128
-	movls	r4, #64
-	mov	r2, r3
-	b	.L385
-.L386:
-	ldr	r7, [r1, #4]
-	lsrs	r3, r3, #2
-	adds	r2, r2, #1
-	ldr	r3, [r7, r3, lsl #2]
-	lsrs	r7, r3, #8
-	strb	r3, [r5, #0]
-	strb	r7, [r5, #1]
-	lsrs	r7, r3, #16
-	lsrs	r3, r3, #24
-	strb	r7, [r5, #2]
-	strb	r3, [r5, #3]
-	adds	r5, r5, #4
-	mov	r3, r6
 .L385:
-	cmp	r2, r0
-	add	r6, r3, r4
-	bcc	.L386
-	ldr	r3, .L418+4
-	lsr	sl, sl, #2
-	ldr	r0, [r3, #0]
-	ldr	r3, .L418+12
-	ldr	r1, [r3, #0]
-	movs	r3, #0
-	mov	r4, r3
+	strb	r3, [r3, r2]
+	adds	r3, r3, #1
+	cmp	r3, #32
+	bne	.L385
+	ldrh	r2, [r4, #14]
+	ldrh	r3, [r4, #20]
+	cmp	r3, r2, lsr #8
+	bcs	.L386
+	ldr	r3, .L400+8
+	uxtb	sl, r0
+	movs	r2, #0
+	subs	r6, r3, r0
+	str	r6, [sp, #24]
+	subs	r6, r1, #1
+	lsl	r8, sl, #1
+	mla	r6, r0, r6, r3
+	uxtb	r8, r8
+	rsb	r5, r8, #0
+	uxtb	r5, r5
+	str	r6, [sp, #28]
 	b	.L387
-.L393:
-	add	r2, r3, #8
-	ldr	r2, [r8, r2, lsl #2]
-	str	r2, [sp, #84]
-	ldr	r2, [sp, #84]
-	lsls	r2, r2, #29
-	bmi	.L408
-	ldr	r2, [sp, #84]
-	ands	r2, r2, #32768
-	bne	.L408
-	cmp	r1, #5
-	bls	.L389
-	ldr	r7, [sp, #84]
-	ldr	r5, [sp, #84]
-	ldr	r6, [sp, #84]
-	ubfx	r7, r7, #3, #5
-	ldr	r2, [sp, #84]
-	ubfx	r5, r5, #27, #1
-	ubfx	r6, r6, #16, #5
-	ubfx	r2, r2, #29, #1
-	orr	r5, r7, r5, lsl #5
-	orr	r2, r6, r2, lsl #5
-	cmp	r5, r2
-	ldr	r5, [sp, #84]
-	bls	.L390
-	ldr	r2, [sp, #84]
-	ubfx	r5, r5, #3, #5
-	ubfx	r2, r2, #27, #1
-	b	.L417
-.L390:
-	ldr	r2, [sp, #84]
-	ubfx	r5, r5, #16, #5
-	ubfx	r2, r2, #29, #1
-	b	.L417
+.L388:
+	ldr	r2, [sp, #12]
+	add	fp, r6, r5
+	add	lr, lr, #1
+	strb	fp, [r2, r3]
+	ldr	r2, [sp, #20]
+	add	fp, r6, r2
+	ldr	r2, [sp, #16]
+	strb	fp, [r2, r3]
+	b	.L389
+.L398:
+	ldr	fp, [sp, #24]
+	movs	r3, #0
+	mov	r6, r3
+	mov	lr, r3
+	add	fp, fp, r2
+	str	fp, [sp, #12]
+	ldr	fp, [sp, #28]
+	str	r2, [sp, #4]
+	add	fp, fp, r2
+	str	fp, [sp, #16]
+	add	fp, r5, sl
+	str	fp, [sp, #20]
 .L389:
-	cmp	r1, #3
-	bls	.L391
-	ldr	r7, [sp, #84]
-	ldr	r5, [sp, #84]
-	ldr	r6, [sp, #84]
-	ubfx	r7, r7, #3, #5
-	ldr	r2, [sp, #84]
-	ubfx	r5, r5, #28, #1
-	ubfx	r6, r6, #16, #5
-	ubfx	r2, r2, #30, #1
-	orr	r5, r7, r5, lsl #5
-	orr	r2, r6, r2, lsl #5
-	cmp	r5, r2
-	ldr	r5, [sp, #84]
-	bls	.L392
-	ldr	r2, [sp, #84]
-	ubfx	r5, r5, #3, #5
-	ubfx	r2, r2, #28, #1
-	b	.L417
-.L392:
-	ldr	r2, [sp, #84]
-	ubfx	r5, r5, #16, #5
-	ubfx	r2, r2, #30, #1
-.L417:
-	orr	r2, r5, r2, lsl #5
-.L391:
-	cmp	r4, r2
-	it	cc
-	movcc	r4, r2
-	b	.L388
-.L408:
-	mov	r4, #-1
-.L388:
-	adds	r3, r3, #1
-.L387:
-	cmp	r3, sl
-	bcs	.L383
-	cmp	r0, #0
-	bne	.L393
-	b	.L383
-.L405:
-	movs	r4, #0
-.L383:
-	movs	r3, #0
-	str	r3, [r8, #16]
-	b	.L394
-.L381:
-	ldr	r3, [sp, #12]
-	mov	r7, #0
-	cmp	r3, #1
-	bne	.L415
-	b	.L395
-.L398:
-	cmp	r5, #0
-	ite	ne
-	movne	r3, #2
-	moveq	r3, #0
-	and	r4, r7, #3
-	mov	r0, r8
-	movs	r1, #1
-	mla	r3, r7, r3, r5
-	mov	r2, r4
-	adds	r7, r7, #2
-	str	r3, [sp, #0]
-	mov	r3, fp
-	bl	NandcCopy1KB
-	movs	r3, #0
-	mov	r0, r6
-	str	r3, [sp, #0]
-	str	r3, [sp, #4]
-	movs	r1, #1
-	movs	r2, #2
-	mov	r3, r4
-	bl	NandcXferStart
-	mov	r0, r6
-	bl	NandcXferComp
-	add	fp, fp, #1024
-.L395:
-	cmp	r7, sl
-	bcc	.L398
-	movs	r4, #0
-	b	.L394
-.L415:
-	mov	r1, r7
-	movs	r2, #2
-	mov	r3, r7
-	str	r7, [sp, #0]
-	str	r7, [sp, #4]
-	mov	r4, r7
-	bl	NandcXferStart
-	b	.L399
-.L403:
-	mov	r0, r6
-	bl	NandcXferComp
-	ldr	r3, [r8, #32]
-	add	ip, r7, #2
-	cmp	ip, sl
-	str	r3, [sp, #84]
-	bcs	.L400
-	movs	r3, #0
-	mov	r0, r6
-	str	r3, [sp, #0]
-	mov	r1, r3
-	str	r3, [sp, #4]
-	movs	r2, #2
-	and	r3, ip, #3
-	str	ip, [sp, #8]
-	bl	NandcXferStart
-	ldr	ip, [sp, #8]
-.L400:
-	ldr	r3, [sp, #84]
-	lsls	r1, r3, #29
-	bmi	.L412
-	ldr	r2, [sp, #84]
-	ldr	r3, [sp, #84]
-	ubfx	r2, r2, #3, #5
-	ubfx	r3, r3, #27, #1
-	orr	r3, r2, r3, lsl #5
-	cmp	r4, r3
-	it	cc
-	movcc	r4, r3
-	b	.L401
-.L412:
-	mov	r4, #-1
-.L401:
-	cmp	r5, #0
-	ite	ne
-	movne	r3, #2
-	moveq	r3, #0
-	sub	r2, ip, #2
-	mov	r0, r8
-	movs	r1, #0
-	mla	r7, r7, r3, r5
-	and	r2, r2, #3
-	mov	r3, fp
-	str	ip, [sp, #8]
-	add	fp, fp, #1024
-	str	r7, [sp, #0]
-	bl	NandcCopy1KB
-	ldr	ip, [sp, #8]
-	mov	r7, ip
-.L399:
-	cmp	r7, sl
-	bcc	.L403
-.L394:
-	ldr	r3, .L418+12
-	ldr	r3, [r3, #0]
-	cmp	r3, #5
-	bls	.L404
-	ldr	r3, [sp, #12]
-	cbnz	r3, .L404
-	ldr	r3, [r8, #0]
-	and	r2, r3, #139264
-	cmp	r2, #139264
-	bne	.L404
-	mov	r4, #-1
-	orr	r3, r3, #131072
-	str	r3, [r8, #0]
-.L404:
-	mov	r0, r4
-	add	sp, sp, #88
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L419:
-	.align	2
-.L418:
-	.word	.LANCHOR5
-	.word	.LANCHOR36
-	.word	.LANCHOR38
-	.word	.LANCHOR37
-	.size	NandcXferData, .-NandcXferData
-	.section	.text.FlashProgPage,"ax",%progbits
-	.align	1
-	.global	FlashProgPage
-	.thumb
-	.thumb_func
-	.type	FlashProgPage, %function
-FlashProgPage:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	mov	r8, r3
-	ldr	r3, .L423
-	mov	r5, r1
-	mov	r6, r2
-	mov	r4, r0
-	ldrb	r7, [r3, #9]	@ zero_extendqisi2
-	cbnz	r0, .L421
-	ldr	r3, .L423+4
-	ldr	r2, .L423+8
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	ldr	r2, [r2, #0]
-	muls	r3, r2, r3
-	cmp	r1, r3
-	bcs	.L421
-	ldr	r3, .L423+12
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbnz	r3, .L422
-	subs	r7, r7, #2
-	b	.L421
-.L422:
-	movs	r7, #4
-.L421:
-	mov	r0, r4
-	bl	NandcWaitFlashReady
-	mov	r0, r4
-	bl	NandcFlashCs
-	mov	r0, r4
-	mov	r1, r5
-	bl	FlashProgFirstCmd
-	uxtb	r2, r7
-	mov	r3, r6
-	movs	r1, #1
-	mov	r0, r4
-	str	r8, [sp, #0]
-	bl	NandcXferData
-	mov	r1, r5
-	mov	r0, r4
-	bl	FlashProgSecondCmd
-	mov	r0, r4
-	bl	NandcWaitFlashReady
-	mov	r1, r5
-	mov	r0, r4
-	bl	FlashReadStatus
-	mov	r5, r0
-	mov	r0, r4
-	bl	NandcFlashDeCs
-	and	r0, r5, #1
-	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
-.L424:
-	.align	2
-.L423:
-	.word	.LANCHOR18
-	.word	.LANCHOR1
-	.word	.LANCHOR2
-	.word	.LANCHOR0
-	.size	FlashProgPage, .-FlashProgPage
-	.section	.text.FlashPageProgMsbFFData,"ax",%progbits
-	.align	1
-	.global	FlashPageProgMsbFFData
-	.thumb
-	.thumb_func
-	.type	FlashPageProgMsbFFData, %function
-FlashPageProgMsbFFData:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L433
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r4, r2
-	ldr	r2, .L433+4
-	mov	r8, r0
-	ldr	r3, [r3, #0]
-	mov	r7, r1
-	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	ldrb	r3, [r3, #19]	@ zero_extendqisi2
-	cbz	r2, .L426
-	ldr	r2, .L433+8
-	ldr	r1, [r2, #0]
-	ldr	r2, .L433+12
-	cmp	r1, r2
-	beq	.L425
-.L426:
-	subs	r2, r3, #5
-	cmp	r2, #2
-	bls	.L430
-	cmp	r3, #68
-	beq	.L430
-	cmp	r3, #35
-	beq	.L430
-	cmp	r3, #19
-	bne	.L425
-	b	.L430
-.L431:
-	ldrh	r3, [sl, r4, lsl #1]
-	cmp	r3, fp
-	bne	.L425
-	movs	r1, #255
-	mov	r2, #32768
-	ldr	r0, [r5, #0]
-	bl	memset
-	adds	r1, r4, r7
-	adds	r4, r4, #1
-	mov	r0, r8
-	ldr	r2, [r5, #0]
-	movs	r3, #0
-	bl	FlashProgPage
-	uxth	r4, r4
-	b	.L432
-.L430:
-	ldr	r6, .L433
-	movw	fp, #65535
-	ldr	sl, .L433+20
-	ldr	r5, .L433+16
-.L432:
-	ldr	r3, [r6, #0]
-	ldrh	r3, [r3, #10]
-	cmp	r3, r4
-	bhi	.L431
-.L425:
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L434:
-	.align	2
-.L433:
-	.word	.LANCHOR23
-	.word	.LANCHOR7
-	.word	.LANCHOR40
-	.word	1446522928
-	.word	.LANCHOR41
-	.word	.LANCHOR9
-	.size	FlashPageProgMsbFFData, .-FlashPageProgMsbFFData
-	.section	.text.FlashReadRawPage,"ax",%progbits
-	.align	1
-	.global	FlashReadRawPage
-	.thumb
-	.thumb_func
-	.type	FlashReadRawPage, %function
-FlashReadRawPage:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	mov	r8, r3
-	ldr	r3, .L438
-	mov	r6, r1
-	mov	r5, r2
-	mov	r4, r0
-	ldrb	r7, [r3, #9]	@ zero_extendqisi2
-	cbnz	r0, .L436
-	ldr	r3, .L438+4
-	ldr	r2, .L438+8
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	ldr	r2, [r2, #0]
-	muls	r3, r2, r3
-	cmp	r1, r3
-	it	cc
-	movcc	r7, #4
-.L436:
-	mov	r0, r4
-	bl	NandcWaitFlashReady
-	mov	r0, r4
-	bl	NandcFlashCs
-	mov	r1, r6
-	mov	r0, r4
-	bl	FlashReadCmd
-	mov	r0, r4
-	bl	NandcWaitFlashReady
-	mov	r3, r5
-	movs	r1, #0
-	mov	r2, r7
-	mov	r0, r4
-	str	r8, [sp, #0]
-	bl	NandcXferData
-	mov	r5, r0
-	mov	r0, r4
-	bl	NandcFlashDeCs
-	mov	r0, r5
-	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
-.L439:
-	.align	2
-.L438:
-	.word	.LANCHOR18
-	.word	.LANCHOR1
-	.word	.LANCHOR2
-	.size	FlashReadRawPage, .-FlashReadRawPage
-	.section	.text.HynixReadRetrial,"ax",%progbits
-	.align	1
-	.global	HynixReadRetrial
-	.thumb
-	.thumb_func
-	.type	HynixReadRetrial, %function
-HynixReadRetrial:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	sl, r2
-	ldr	r2, .L455
-	mov	r7, r3
-	mov	r6, r0
-	str	r1, [sp, #4]
-	adds	r3, r2, r0
-	mov	r8, #0
-	ldrb	fp, [r2, #2]	@ zero_extendqisi2
-	mov	r5, #-1
-	ldr	r2, .L455+4
-	ldrb	r4, [r3, #12]	@ zero_extendqisi2
-	ldr	r2, [r2, #0]
-	ldrb	r2, [r2, #19]	@ zero_extendqisi2
-	cmp	r2, #7
-	it	eq
-	ldrbeq	r4, [r3, #20]	@ zero_extendqisi2
-	bl	NandcWaitFlashReady
-	b	.L442
-.L447:
-	adds	r4, r4, #1
-	ldr	r2, .L455
-	mov	r0, r6
-	uxtb	r4, r4
-	cmp	r4, fp
-	it	cs
-	movcs	r4, #0
-	ldrb	r1, [r2, #1]	@ zero_extendqisi2
-	mov	r3, r4
-	adds	r2, r2, #4
-	bl	HynixSetRRPara
-	mov	r3, r7
-	mov	r0, r6
-	ldr	r1, [sp, #4]
-	mov	r2, sl
-	bl	FlashReadRawPage
-	adds	r3, r0, #1
-	beq	.L444
-	ldr	r2, .L455+8
-	cmp	r5, #-1
-	it	eq
-	moveq	r5, r0
-	ldrb	r3, [r2, #0]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	r0, r3, lsr #2
-	bcc	.L453
-	movs	r7, #0
-	mov	sl, r7
-.L444:
-	add	r8, r8, #1
-.L442:
-	cmp	r8, fp
-	bcc	.L447
-	b	.L446
-.L453:
-	mov	r5, r0
-.L446:
-	ldr	r3, .L455+4
-	ldr	r3, [r3, #0]
-	ldrb	r3, [r3, #19]	@ zero_extendqisi2
-	cmp	r3, #7
-	ldr	r3, .L455
-	add	r6, r3, r6
-	ldr	r3, .L455+8
-	it	eq
-	strbeq	r4, [r6, #20]
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	it	ne
-	strbne	r4, [r6, #12]
-	add	r3, r3, r3, lsl #1
-	cmp	r5, r3, lsr #2
-	bcc	.L450
-	cmp	r5, #-1
-	ite	eq
-	moveq	r5, #-1
-	movne	r5, #256
-.L450:
-	mov	r0, r5
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L456:
-	.align	2
-.L455:
-	.word	.LANCHOR31
-	.word	.LANCHOR23
-	.word	.LANCHOR29
-	.size	HynixReadRetrial, .-HynixReadRetrial
-	.global	__aeabi_idiv
-	.section	.text.MicronReadRetrial,"ax",%progbits
-	.align	1
-	.global	MicronReadRetrial
-	.thumb
-	.thumb_func
-	.type	MicronReadRetrial, %function
-MicronReadRetrial:
-	@ args = 0, pretend = 0, frame = 16
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	fp, r3
-	ldr	r3, .L471
-	mov	sl, r0
-	sub	sp, sp, #24
-	ldrb	r0, [r3, #0]	@ zero_extendqisi2
-	ldr	r3, .L471+4
-	str	r1, [sp, #16]
-	str	r2, [sp, #20]
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbnz	r3, .L458
-	add	r0, r0, r0, lsl #1
-	ubfx	r0, r0, #2, #8
-	b	.L470
-.L458:
-	movs	r1, #3
-	bl	__aeabi_idiv
-	uxtb	r0, r0
-.L470:
-	str	r0, [sp, #12]
-	mov	r0, sl
-	bl	NandcWaitFlashReady
-	ldr	r3, .L471+8
-	mov	r8, #0
-	mov	r4, #-1
-	ldr	r6, [r3, sl, lsl #3]
-	add	r3, r3, sl, lsl #3
-	ldrb	r7, [r3, #4]	@ zero_extendqisi2
-	adds	r7, r7, #8
-	lsls	r7, r7, #8
-	adds	r5, r6, r7
-	b	.L460
-.L464:
-	movs	r2, #239
-	movs	r3, #137
-	str	r2, [r5, #8]
-	movs	r0, #200
-	str	r3, [r5, #4]
-	bl	udelay
-	movs	r2, #0
-	add	ip, r8, #1
-	mov	r0, sl
-	str	ip, [r5, #0]
-	mov	r3, fp
-	str	r2, [r5, #0]
-	ldr	r1, [sp, #16]
-	str	r2, [r5, #0]
-	str	r2, [r5, #0]
-	ldr	r2, [sp, #20]
-	str	ip, [sp, #8]
-	bl	FlashReadRawPage
-	ldr	ip, [sp, #8]
-	adds	r2, r0, #1
-	beq	.L461
-	ldr	r3, [sp, #12]
-	cmp	r4, #-1
-	it	eq
-	moveq	r4, r0
-	cmp	r0, r3
-	bcc	.L468
-	mov	fp, #0
-	str	fp, [sp, #20]
-.L461:
-	mov	r8, ip
-.L460:
-	ldr	r2, .L471+12
-	ldrb	r3, [r2, #0]	@ zero_extendqisi2
-	cmp	r8, r3
-	bcc	.L464
-	b	.L463
-.L468:
-	mov	r4, r0
-.L463:
-	movs	r3, #239
-	movs	r0, #200
-	str	r3, [r5, #8]
-	movs	r3, #137
-	str	r3, [r5, #4]
-	bl	udelay
-	movs	r3, #0
-	str	r3, [r6, r7]
-	str	r3, [r6, r7]
-	str	r3, [r6, r7]
-	str	r3, [r6, r7]
-	ldr	r3, [sp, #12]
-	cmp	r4, r3
-	bcc	.L465
-	ldr	r0, .L471+16
-	mov	r1, r8
-	ldr	r2, [sp, #16]
-	mov	r3, r8
-	cmp	r4, #-1
-	ite	eq
-	moveq	r4, #-1
-	movne	r4, #256
-	str	r4, [sp, #0]
-	bl	printf
-.L465:
-	mov	r0, r4
-	add	sp, sp, #24
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L472:
-	.align	2
-.L471:
-	.word	.LANCHOR29
-	.word	.LANCHOR7
-	.word	.LANCHOR5
-	.word	.LANCHOR42
-	.word	.LC2
-	.size	MicronReadRetrial, .-MicronReadRetrial
-	.section	.text.SamsungReadRetrial,"ax",%progbits
-	.align	1
-	.global	SamsungReadRetrial
-	.thumb
-	.thumb_func
-	.type	SamsungReadRetrial, %function
-SamsungReadRetrial:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r7, r0
-	mov	r8, r2
-	mov	r6, r3
-	mov	fp, r1
-	bl	NandcWaitFlashReady
-	ldr	r3, .L483
-	movs	r5, #1
-	mov	r4, #-1
-	ldr	r2, [r3, r7, lsl #3]
-	add	r3, r3, r7, lsl #3
-	ldrb	sl, [r3, #4]	@ zero_extendqisi2
-	add	sl, sl, #8
-	add	sl, r2, sl, lsl #8
-	b	.L474
-.L478:
-	mov	r0, sl
-	uxtb	r1, r5
-	bl	SamsungSetRRPara
-	mov	r1, fp
-	mov	r0, r7
-	mov	r2, r8
-	mov	r3, r6
-	bl	FlashReadRawPage
-	adds	r1, r0, #1
-	beq	.L475
-	ldr	r2, .L483+4
-	cmp	r4, #-1
-	it	eq
-	moveq	r4, r0
-	ldrb	r3, [r2, #0]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	r0, r3, lsr #2
-	bcc	.L481
-	movs	r6, #0
-	mov	r8, r6
-.L475:
-	adds	r5, r5, #1
-.L474:
-	ldr	r2, .L483+8
-	ldrb	r3, [r2, #0]	@ zero_extendqisi2
-	adds	r3, r3, #1
-	cmp	r5, r3
-	bcc	.L478
-	b	.L477
-.L481:
-	mov	r4, r0
-.L477:
-	movs	r1, #0
-	mov	r0, sl
-	bl	SamsungSetRRPara
-	ldr	r3, .L483+4
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	r4, r3, lsr #2
-	bcc	.L479
-	cmp	r4, #-1
-	ite	eq
-	moveq	r4, #-1
-	movne	r4, #256
-.L479:
-	mov	r0, r4
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L484:
-	.align	2
-.L483:
-	.word	.LANCHOR5
-	.word	.LANCHOR29
-	.word	.LANCHOR42
-	.size	SamsungReadRetrial, .-SamsungReadRetrial
-	.section	.text.ToshibaReadRetrial,"ax",%progbits
-	.align	1
-	.global	ToshibaReadRetrial
-	.thumb
-	.thumb_func
-	.type	ToshibaReadRetrial, %function
-ToshibaReadRetrial:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r7, r0
-	mov	fp, r2
-	mov	r8, r3
-	str	r1, [sp, #4]
-	bl	NandcWaitFlashReady
-	ldr	r3, .L507
-	ldr	r2, [r3, r7, lsl #3]
-	add	r3, r3, r7, lsl #3
-	ldrb	r4, [r3, #4]	@ zero_extendqisi2
-	ldr	r3, .L507+4
-	adds	r4, r4, #8
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	add	r4, r2, r4, lsl #8
-	subs	r3, r3, #67
-	cmp	r3, #1
-	bls	.L502
-	ldr	r3, .L507+8
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L503
-	movs	r0, #0
-	mov	sl, #1
-	bl	NandcSetDdrMode
-	b	.L487
-.L503:
-	mov	sl, r3
-.L487:
-	movs	r3, #92
-	str	r3, [r4, #8]
-	movs	r3, #197
-	str	r3, [r4, #8]
-	b	.L486
-.L502:
-	mov	sl, #0
-.L486:
-	movs	r6, #1
-	mov	r5, #-1
-	b	.L488
-.L497:
-	ldr	r1, .L507+4
-	mov	r0, r4
-	ldrb	r3, [r1, #0]	@ zero_extendqisi2
-	uxtb	r1, r6
-	subs	r3, r3, #67
-	cmp	r3, #1
-	bhi	.L489
-	bl	SandiskSetRRPara
-	b	.L490
-.L489:
-	bl	ToshibaSetRRPara
-.L490:
-	ldr	r2, .L507+4
-	ldrb	r3, [r2, #0]	@ zero_extendqisi2
-	cmp	r3, #34
-	bne	.L491
-	ldr	r1, .L507+12
-	ldrb	r3, [r1, #0]	@ zero_extendqisi2
-	subs	r3, r3, #3
-	cmp	r6, r3
-	bne	.L491
-	movs	r2, #179
-	str	r2, [r4, #8]
-.L491:
-	movs	r3, #38
-	str	r3, [r4, #8]
-	movs	r3, #93
-	str	r3, [r4, #8]
-	cmp	sl, #0
-	beq	.L492
-	movs	r0, #4
-	bl	NandcSetDdrMode
-	ldr	r1, [sp, #4]
-	mov	r2, fp
-	mov	r3, r8
-	mov	r0, r7
-	bl	FlashReadRawPage
-	mov	r3, r0
-	movs	r0, #0
-	str	r3, [sp, #0]
-	bl	NandcSetDdrMode
-	ldr	r3, [sp, #0]
-	b	.L493
-.L492:
-	mov	r3, r8
-	mov	r0, r7
-	ldr	r1, [sp, #4]
-	mov	r2, fp
-	bl	FlashReadRawPage
-	mov	r3, r0
-.L493:
-	adds	r0, r3, #1
-	beq	.L494
-	ldr	r1, .L507+16
-	cmp	r5, #-1
-	it	eq
-	moveq	r5, r3
-	ldrb	r2, [r1, #0]	@ zero_extendqisi2
-	add	r2, r2, r2, lsl #1
-	cmp	r3, r2, lsr #2
-	bcc	.L505
-	mov	r8, #0
-	mov	fp, r8
-.L494:
-	adds	r6, r6, #1
-.L488:
-	ldr	r2, .L507+12
-	ldrb	r3, [r2, #0]	@ zero_extendqisi2
-	adds	r3, r3, #1
-	cmp	r6, r3
-	bcc	.L497
-	b	.L496
-.L505:
-	mov	r5, r3
-.L496:
-	ldr	r3, .L507+4
-	movs	r1, #0
-	mov	r0, r4
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	subs	r3, r3, #67
-	cmp	r3, #1
-	bhi	.L498
-	bl	SandiskSetRRPara
-	b	.L499
-.L498:
-	bl	ToshibaSetRRPara
-.L499:
-	movs	r3, #255
-	str	r3, [r4, #8]
-	ldr	r3, .L507+16
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	r5, r3, lsr #2
-	bcc	.L500
-	cmp	r5, #-1
-	ite	eq
-	moveq	r5, #-1
-	movne	r5, #256
-.L500:
-	mov	r0, r7
-	bl	NandcWaitFlashReady
-	cmp	sl, #0
-	beq	.L501
-	movs	r0, #4
-	bl	NandcSetDdrMode
-.L501:
-	mov	r0, r5
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L508:
-	.align	2
-.L507:
-	.word	.LANCHOR5
-	.word	.LANCHOR11
-	.word	.LANCHOR35
-	.word	.LANCHOR42
-	.word	.LANCHOR29
-	.size	ToshibaReadRetrial, .-ToshibaReadRetrial
-	.section	.text.FlashSavePhyInfo,"ax",%progbits
-	.align	1
-	.global	FlashSavePhyInfo
-	.thumb
-	.thumb_func
-	.type	FlashSavePhyInfo, %function
-FlashSavePhyInfo:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	movs	r5, #0
-	ldr	r7, .L516
-	ldr	r8, .L516+60
-	ldr	sl, .L516+64
-	ldr	r3, [r7, #0]
-	ldr	fp, .L516+48
-	ldr	r6, .L516+4
-	str	r3, [r8, #0]
-	ldr	r3, .L516+8
-	ldrb	r0, [r3, #0]	@ zero_extendqisi2
-	bl	FlashBchSel
-	movs	r1, #0
-	mov	r2, #2048
-	ldr	r0, [r7, #0]
-	bl	memset
-	ldr	r0, [r8, #0]
-	ldr	r3, .L516+12
-	movs	r2, #32
-	ldr	r1, .L516+16
-	str	sl, [r0, #0]
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	strh	r3, [r0, #12]	@ movhi
-	ldr	r3, .L516+20
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	strh	r3, [r0, #14]	@ movhi
-	ldr	r3, .L516+24
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	str	r3, [r0, #1076]
-	adds	r0, r0, #16
-	bl	memcpy
-	ldr	r0, [r8, #0]
-	ldr	r1, .L516+28
-	movs	r2, #8
-	adds	r0, r0, #80
-	bl	memcpy
-	ldr	r0, [r8, #0]
-	ldr	r1, .L516+32
-	movs	r2, #32
-	adds	r0, r0, #96
-	bl	memcpy
-	ldr	r0, [r8, #0]
-	ldr	r1, .L516+36
-	movs	r2, #32
-	adds	r0, r0, #160
-	bl	memcpy
-	ldr	r0, [r8, #0]
-	ldr	r1, .L516+40
-	movs	r2, #32
-	adds	r0, r0, #192
-	bl	memcpy
-	ldr	r0, [r8, #0]
-	mov	r2, #852
-	ldr	r1, .L516+44
-	adds	r0, r0, #224
-	bl	memcpy
-	ldr	r4, [r8, #0]
-	movw	r1, #2036
-	add	r0, r4, #12
-	bl	JSHash
-	mov	r3, #1592
-	str	r3, [r4, #4]
-	ldr	r3, [fp, #0]
-	str	r3, [r8, #0]
-	str	r0, [r4, #8]
-	movs	r0, #0
-	bl	flash_enter_slc_mode
-	mov	r4, r5
-.L512:
-	movs	r0, #0
-	ldr	r1, [r6, #0]
-	mov	r2, r0
-	muls	r1, r4, r1
-	bl	FlashEraseBlock
-	movs	r0, #0
-	ldr	r1, [r6, #0]
-	mov	r3, r0
-	muls	r1, r4, r1
-	ldr	r2, [r7, #0]
-	bl	FlashProgPage
-	movs	r0, #0
-	ldr	r1, [r6, #0]
-	mov	r3, r0
-	muls	r1, r4, r1
-	ldr	r2, [r7, #0]
-	adds	r1, r1, #1
-	bl	FlashProgPage
-	ldr	r3, .L516+48
-	movs	r0, #0
-	ldr	r1, [r6, #0]
-	muls	r1, r4, r1
-	ldr	r2, [r3, #0]
-	mov	r3, r0
-	bl	FlashReadRawPage
-	adds	r0, r0, #1
-	beq	.L510
-	ldr	fp, [r8, #0]
-	ldr	r3, [fp, #0]
-	cmp	r3, sl
-	bne	.L510
-	add	r0, fp, #12
-	movw	r1, #2036
-	bl	JSHash
-	ldr	r3, [fp, #8]
-	cmp	r3, r0
-	bne	.L510
-	ldr	r3, .L516+52
-	adds	r2, r4, #1
-	adds	r5, r5, #1
-	str	r2, [r3, #0]
-	ldr	r3, .L516+56
-	ldr	r2, [r6, #0]
-	muls	r2, r4, r2
-	cmp	r5, #1
-	str	r2, [r3, #0]
-	bhi	.L511
-.L510:
-	adds	r4, r4, #1
-	cmp	r4, #4
-	bne	.L512
-.L511:
-	movs	r0, #0
-	bl	flash_exit_slc_mode
-	cmp	r5, #0
-	ite	eq
-	moveq	r0, #-1
-	movne	r0, #0
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L517:
-	.align	2
-.L516:
-	.word	.LANCHOR44
-	.word	.LANCHOR2
-	.word	.LANCHOR45
-	.word	.LANCHOR16
-	.word	.LANCHOR22
-	.word	.LANCHOR1
-	.word	.LANCHOR35
-	.word	.LANCHOR19
-	.word	.LANCHOR20
-	.word	.LANCHOR18
-	.word	.LANCHOR6
-	.word	.LANCHOR31
-	.word	.LANCHOR41
-	.word	.LANCHOR46
-	.word	.LANCHOR47
-	.word	.LANCHOR43
-	.word	1312902724
-	.size	FlashSavePhyInfo, .-FlashSavePhyInfo
-	.section	.text.FlashReadIdbDataRaw,"ax",%progbits
-	.align	1
-	.global	FlashReadIdbDataRaw
-	.thumb
-	.thumb_func
-	.type	FlashReadIdbDataRaw, %function
-FlashReadIdbDataRaw:
-	@ args = 0, pretend = 0, frame = 16
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, lr}
-	movs	r2, #4
-	mov	r8, r0
-	ldr	r1, .L529
-	add	r0, sp, #12
-	bl	memcpy
-	ldr	r3, .L529+4
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	str	r3, [sp, #4]
-	ldr	r3, .L529+8
-	ldr	r2, [r3, #0]
-	ldr	r3, .L529+12
-	cmp	r2, r3
-	bne	.L519
-	movs	r0, #0
-	bl	flash_enter_slc_mode
-.L519:
-	mov	r0, r8
-	movs	r1, #0
-	mov	r2, #2048
-	mov	r7, #-1
-	bl	memset
-	movs	r4, #2
-	ldr	sl, .L529+32
-	ldr	fp, .L529+36
-	ldr	r6, .L529+16
-	b	.L520
-.L527:
-	movs	r5, #0
-.L522:
-	add	r3, sp, #12
-	ldrb	r0, [r3, r5]	@ zero_extendqisi2
-	bl	FlashBchSel
-	ldr	r3, .L529+16
-	movs	r0, #0
-	ldr	r1, [fp, #0]
-	muls	r1, r4, r1
-	ldr	r2, [r3, #0]
-	mov	r3, r0
-	bl	FlashReadRawPage
-	adds	r0, r0, #1
-	bne	.L521
-	adds	r5, r5, #1
-	cmp	r5, #4
-	bne	.L522
-	b	.L523
-.L521:
-	ldr	r3, [r6, #0]
-	ldr	r2, [r3, #0]
-	ldr	r3, .L529+20
-	cmp	r2, r3
-	bne	.L523
-	add	r3, sp, #16
-	ldr	r0, .L529+24
-	adds	r5, r3, r5
-	ldrb	r1, [r5, #-4]	@ zero_extendqisi2
-	bl	printf
-	mov	r2, #2048
-	mov	r0, r8
-	ldr	r1, [r6, #0]
-	bl	memcpy
-	ldr	r3, [r6, #0]
-	ldr	r3, [r3, #512]
-	strb	r3, [sl, #0]
-	ldr	r3, .L529+28
-	ldr	r2, [r3, #0]
-	cmp	r2, r4
-	bls	.L526
-	str	r4, [r3, #0]
-	movs	r7, #0
-	bl	FlashSavePhyInfo
-.L523:
-	adds	r4, r4, #1
-.L520:
-	ldrb	r3, [sl, #0]	@ zero_extendqisi2
-	cmp	r4, r3
-	bcc	.L527
-	b	.L524
-.L526:
-	movs	r7, #0
-.L524:
-	ldr	r0, [sp, #4]
-	bl	FlashBchSel
-	ldr	r3, .L529+8
-	ldr	r2, [r3, #0]
-	ldr	r3, .L529+12
-	cmp	r2, r3
-	bne	.L525
-	movs	r0, #0
-	bl	flash_exit_slc_mode
-.L525:
-	mov	r0, r7
-	add	sp, sp, #16
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L530:
-	.align	2
-.L529:
-	.word	.LANCHOR48
-	.word	.LANCHOR29
-	.word	.LANCHOR40
-	.word	1446522928
-	.word	.LANCHOR44
-	.word	-52655045
-	.word	.LC3
-	.word	.LANCHOR46
-	.word	.LANCHOR1
-	.word	.LANCHOR2
-	.size	FlashReadIdbDataRaw, .-FlashReadIdbDataRaw
-	.section	.text.FlashLoadPhyInfo,"ax",%progbits
-	.align	1
-	.global	FlashLoadPhyInfo
-	.thumb
-	.thumb_func
-	.type	FlashLoadPhyInfo, %function
-FlashLoadPhyInfo:
-	@ args = 0, pretend = 0, frame = 16
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, lr}
-	movs	r2, #4
-	ldr	sl, .L543+40
-	add	r0, sp, #12
-	ldr	r1, .L543
-	movs	r4, #0
-	bl	memcpy
-	ldr	r5, .L543+4
-	ldr	r3, [sl, #0]
-	mov	r0, r4
-	ldr	r6, .L543+8
-	mov	r8, #4
-	mov	r7, #-1
-	str	r3, [r5, #0]
-	ldr	r3, .L543+12
-	ldrh	r2, [r6, #10]
-	str	r4, [r3, #0]
-	str	r2, [sp, #4]
-	bl	flash_enter_slc_mode
-	b	.L532
-.L534:
-	add	r3, sp, #12
-	ldrb	r0, [r3, r6]	@ zero_extendqisi2
-	bl	FlashBchSel
-	movs	r0, #0
-	mov	r1, r4
-	ldr	r2, [sl, #0]
-	mov	r3, r0
-	bl	FlashReadRawPage
-	adds	r0, r0, #1
-	bne	.L533
-	movs	r0, #0
-	mov	r1, fp
-	ldr	r2, [sl, #0]
-	mov	r3, r0
-	bl	FlashReadRawPage
-	adds	r0, r0, #1
-	bne	.L533
-	adds	r6, r6, #1
-	cmp	r6, #4
-	beq	.L535
-	b	.L534
-.L533:
-	ldr	r6, [r5, #0]
-	ldr	r2, .L543+16
-	ldr	r3, [r6, #0]
-	cmp	r3, r2
-	bne	.L535
-	cbnz	r7, .L536
-	ldr	r3, .L543+8
-	mov	r0, r4
-	ldrh	r1, [r3, #10]
-	bl	__aeabi_uidiv
-	ldr	r3, .L543+20
-	adds	r0, r0, #1
-	str	r0, [r3, #0]
-	mov	r0, r7
-	b	.L542
-.L536:
-	add	r0, r6, #12
-	movw	r1, #2036
-	bl	JSHash
-	ldr	r3, [r6, #8]
-	cmp	r3, r0
-	bne	.L535
-	add	r1, r6, #160
-	movs	r2, #32
-	ldr	r0, .L543+8
-	bl	memcpy
-	ldr	r1, [r5, #0]
-	movs	r2, #32
-	ldr	r0, .L543+24
-	adds	r1, r1, #192
-	bl	memcpy
-	ldr	r1, [r5, #0]
-	mov	r2, #852
-	ldr	r0, .L543+28
-	adds	r1, r1, #224
-	bl	memcpy
-	ldr	r6, [r5, #0]
-	ldr	r3, .L543+32
-	mov	r0, r4
-	ldr	r2, [r6, #1076]
-	strb	r2, [r3, #0]
-	ldr	r3, .L543+12
-	str	r4, [r3, #0]
-	ldr	r3, .L543+8
-	ldrh	r1, [r3, #10]
-	bl	__aeabi_uidiv
-	ldr	r3, .L543+20
-	adds	r0, r0, #1
-	str	r0, [r3, #0]
-	cmp	r0, #1
-	bne	.L538
-	movs	r2, #2
-	str	r2, [r3, #0]
-.L538:
-	ldrh	r2, [r6, #14]
-	movs	r7, #0
-	ldr	r3, .L543+36
-	strb	r2, [r3, #0]
-.L535:
-	ldr	r2, [sp, #4]
-	subs	r8, r8, #1
-	add	r4, r4, r2
-	beq	.L539
-.L532:
-	add	fp, r4, #1
-	movs	r6, #0
-	b	.L534
-.L539:
-	mov	r0, r8
-.L542:
-	bl	flash_exit_slc_mode
-	mov	r0, r7
-	add	sp, sp, #16
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L544:
-	.align	2
-.L543:
-	.word	.LANCHOR48
-	.word	.LANCHOR43
-	.word	.LANCHOR18
-	.word	.LANCHOR47
-	.word	1312902724
-	.word	.LANCHOR46
-	.word	.LANCHOR6
-	.word	.LANCHOR31
-	.word	.LANCHOR35
-	.word	.LANCHOR49
-	.word	.LANCHOR44
-	.size	FlashLoadPhyInfo, .-FlashLoadPhyInfo
-	.section	.text.FlashDdrTunningRead,"ax",%progbits
-	.align	1
-	.global	FlashDdrTunningRead
-	.thumb
-	.thumb_func
-	.type	FlashDdrTunningRead, %function
-FlashDdrTunningRead:
-	@ args = 4, pretend = 0, frame = 24
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	sl, r3
-	ldr	r3, .L565
-	sub	sp, sp, #24
-	mov	fp, r2
-	str	r0, [sp, #8]
-	ldr	r3, [r3, #0]
-	str	r1, [sp, #12]
-	ldr	r3, [r3, #304]
-	str	r3, [sp, #20]
-	ldr	r3, .L565+4
-	ldr	r7, [r3, #0]
-	ldr	r3, [sp, #56]
-	cmp	r7, #7
-	ite	hi
-	movhi	r7, #12
-	movls	r7, #6
-	cbz	r3, .L557
-	movs	r0, #1
-	ldr	r4, .L565+8
-	bl	FlashSetInterfaceMode
-	movs	r0, #1
-	bl	NandcSetMode
-	ldr	r0, [sp, #8]
-	bl	FlashReset
-	ldr	r1, [sp, #12]
-	mov	r2, fp
-	mov	r3, sl
-	ldr	r0, [sp, #8]
-	bl	FlashReadRawPage
-	mov	r8, r0
-	ldrb	r0, [r4, #0]	@ zero_extendqisi2
-	bl	FlashSetInterfaceMode
-	ldrb	r0, [r4, #0]	@ zero_extendqisi2
-	bl	NandcSetMode
-	cmp	r8, #-1
-	beq	.L548
-	mov	r2, r8
-	ldr	r0, .L565+12
-	ldr	r1, [sp, #12]
-	bl	printf
-	ldr	r3, .L565+16
-	ldr	r2, [r3, #0]
-	adds	r2, r2, #1
-	str	r2, [r3, #0]
-	cmp	r2, #2048
-	bcc	.L548
-	movs	r2, #0
-	str	r2, [r3, #0]
-	mov	sl, r2
-	mov	fp, r2
-	b	.L547
-.L557:
-	mov	r8, #1024
-.L547:
-	movs	r4, #0
-	mov	r6, #-1
-	mov	ip, r4
-	mov	r5, r4
-	str	r4, [sp, #16]
-.L553:
-	uxtb	r0, r7
-	str	ip, [sp, #4]
-	bl	NandcSetDdrPara
-	mov	r3, sl
-	ldr	r0, [sp, #8]
-	mov	r2, fp
-	ldr	r1, [sp, #12]
-	bl	FlashReadRawPage
-	add	r3, r8, #1
-	ldr	ip, [sp, #4]
-	cmp	r0, r3
-	bhi	.L549
-	cmp	r0, #2
-	bhi	.L559
-	adds	r5, r5, #1
-	cmp	r5, #9
-	bls	.L559
-	subs	r4, r7, r5
-	mov	r8, r0
-	movs	r6, #0
-	b	.L551
-.L549:
-	cmp	ip, r5
-	bcs	.L560
-	cmp	r5, #7
-	rsb	r3, r5, r4
-	str	r3, [sp, #16]
-	bhi	.L552
-	mov	ip, r5
-	b	.L560
-.L559:
-	movs	r6, #0
-	mov	r4, r7
-	mov	r8, r0
-	mov	sl, r6
-	mov	fp, r6
-	b	.L550
-.L560:
-	movs	r5, #0
-.L550:
-	adds	r7, r7, #2
-	cmp	r7, #69
-	bls	.L553
-.L551:
-	cmp	ip, r5
-	bcc	.L554
-.L552:
-	ldr	r4, [sp, #16]
-.L554:
-	cbz	r4, .L555
-	ldr	r0, .L565+20
-	mov	r1, r4
-	bl	printf
-	uxtb	r0, r4
-	bl	NandcSetDdrPara
-.L555:
-	cbz	r6, .L548
-	ldr	r0, .L565+24
-	ldr	r1, [sp, #8]
-	ldr	r2, [sp, #12]
-	bl	printf
-	ldr	r3, [sp, #56]
-	cbz	r3, .L562
-	ldr	r3, [sp, #20]
-	ubfx	r0, r3, #8, #8
-	bl	NandcSetDdrPara
-	b	.L548
-.L562:
-	mov	r8, r6
-.L548:
-	mov	r0, r8
-	add	sp, sp, #24
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L566:
-	.align	2
-.L565:
-	.word	.LANCHOR30
-	.word	.LANCHOR37
-	.word	.LANCHOR34
-	.word	.LC4
-	.word	.LANCHOR50
-	.word	.LC5
-	.word	.LC6
-	.size	FlashDdrTunningRead, .-FlashDdrTunningRead
-	.section	.text.FlashDdrParaScan,"ax",%progbits
-	.align	1
-	.global	FlashDdrParaScan
-	.thumb
-	.thumb_func
-	.type	FlashDdrParaScan, %function
-FlashDdrParaScan:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	mov	r6, r0
-	ldr	r5, .L572
-	movs	r4, #0
-	mov	r7, r1
-	ldrb	r0, [r5, #0]	@ zero_extendqisi2
-	bl	FlashSetInterfaceMode
-	ldrb	r0, [r5, #0]	@ zero_extendqisi2
-	bl	NandcSetMode
-	mov	r1, r7
-	mov	r2, r4
-	mov	r3, r4
-	mov	r0, r6
-	str	r4, [sp, #0]
-	bl	FlashDdrTunningRead
-	mov	r1, r7
-	mov	r2, r4
-	mov	r3, r4
-	mov	r8, r0
-	mov	r0, r6
-	bl	FlashReadRawPage
-	adds	r0, r0, #1
-	beq	.L568
-	cmp	r8, #-1
-	bne	.L569
-.L568:
-	ldrb	r3, [r5, #0]	@ zero_extendqisi2
-	lsls	r3, r3, #31
-	bpl	.L569
-	movs	r0, #1
-	bl	FlashSetInterfaceMode
-	movs	r0, #1
-	bl	NandcSetMode
-	movs	r2, #0
-	b	.L571
-.L569:
-	movs	r2, #1
-.L571:
-	ldr	r3, .L572+4
-	movs	r0, #0
-	strb	r2, [r3, #0]
-	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
-.L573:
-	.align	2
-.L572:
-	.word	.LANCHOR34
-	.word	.LANCHOR35
-	.size	FlashDdrParaScan, .-FlashDdrParaScan
-	.section	.text.FlashReadPage,"ax",%progbits
-	.align	1
-	.global	FlashReadPage
-	.thumb
-	.thumb_func
-	.type	FlashReadPage, %function
-FlashReadPage:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	sl, r3
-	mov	r5, r0
-	mov	r7, r1
-	mov	r8, r2
-	bl	FlashReadRawPage
-	adds	r3, r0, #1
-	mov	r4, r0
-	bne	.L575
-	ldr	r6, .L580
-	ldrb	fp, [r6, #0]	@ zero_extendqisi2
-	cmp	fp, #0
-	beq	.L576
-	movs	r3, #0
-	mov	r0, r5
-	strb	r3, [r6, #0]
-	mov	r1, r7
-	mov	r2, r8
-	mov	r3, sl
-	bl	FlashReadRawPage
-	strb	fp, [r6, #0]
-	adds	r6, r0, #1
-	bne	.L579
-.L576:
-	ldr	r3, .L580+4
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L575
-	ldr	r3, .L580+8
-	mov	r0, r5
-	mov	r1, r7
-	mov	r2, r8
-	ldr	r3, [r3, #0]
-	ldr	r6, [r3, #304]
-	movs	r3, #1
-	str	r3, [sp, #0]
-	mov	r3, sl
-	bl	FlashDdrTunningRead
-	mov	r4, r0
-	adds	r0, r0, #1
-	beq	.L577
-	ldr	r3, .L580+12
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cmp	r4, r3, lsr #1
-	bls	.L575
-.L577:
-	ubfx	r0, r6, #8, #8
-	bl	NandcSetDdrPara
-	b	.L575
-.L579:
-	mov	r4, r0
-.L575:
-	ldr	fp, .L580+24
-	ldr	r6, [fp, #0]
-	cbz	r6, .L578
-	adds	r1, r4, #1
-	bne	.L578
-	mov	r1, r7
-	mov	r2, r8
-	mov	r3, sl
-	mov	r0, r5
-	blx	r6
-	mov	r2, r5
-	mov	r3, r7
-	mov	r4, r0
-	ldr	r0, .L580+16
-	mov	r1, r4
-	bl	printf
-	adds	r2, r4, #1
-	bne	.L578
-	ldr	r3, .L580+20
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L578
-	mov	r0, r5
-	bl	flash_enter_slc_mode
-	ldr	r4, [fp, #0]
-	mov	r0, r5
-	mov	r1, r7
-	mov	r2, r8
-	mov	r3, sl
-	blx	r4
-	mov	r4, r0
-	mov	r0, r5
-	bl	flash_exit_slc_mode
-.L578:
-	mov	r0, r4
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L581:
-	.align	2
-.L580:
-	.word	.LANCHOR4
-	.word	.LANCHOR35
-	.word	.LANCHOR30
-	.word	.LANCHOR29
-	.word	.LC7
-	.word	.LANCHOR7
-	.word	.LANCHOR51
-	.size	FlashReadPage, .-FlashReadPage
-	.section	.text.Ftl_log2,"ax",%progbits
-	.align	1
-	.global	Ftl_log2
-	.thumb
-	.thumb_func
-	.type	Ftl_log2, %function
-Ftl_log2:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	movs	r2, #1
-	movs	r3, #0
-	b	.L583
-.L584:
-	adds	r3, r3, #1
-	lsls	r2, r2, #1
-	uxth	r3, r3
-.L583:
-	cmp	r2, r0
-	bls	.L584
-	subs	r3, r3, #1
-	uxth	r0, r3
-	bx	lr
-	.size	Ftl_log2, .-Ftl_log2
-	.section	.text.FtlPrintInfo,"ax",%progbits
-	.align	1
-	.global	FtlPrintInfo
-	.thumb
-	.thumb_func
-	.type	FtlPrintInfo, %function
-FtlPrintInfo:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	bx	lr
-	.size	FtlPrintInfo, .-FtlPrintInfo
-	.section	.text.FtlSysBlkNumInit,"ax",%progbits
-	.align	1
-	.global	FtlSysBlkNumInit
-	.thumb
-	.thumb_func
-	.type	FtlSysBlkNumInit, %function
-FtlSysBlkNumInit:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L589
-	cmp	r0, #23
-	it	ls
-	movls	r0, #24
-	ldr	r2, .L589+4
-	str	r0, [r3, #0]
-	ldr	r3, .L589+8
-	ldrh	r3, [r3, #0]
-	muls	r3, r0, r3
-	str	r3, [r2, #0]
-	ldr	r2, .L589+12
-	ldrh	r2, [r2, #0]
-	subs	r0, r2, r0
-	ldr	r2, .L589+16
-	strh	r0, [r2, #0]	@ movhi
-	movs	r0, #0
-	ldr	r2, .L589+20
-	ldr	r2, [r2, #0]
-	subs	r3, r2, r3
-	ldr	r2, .L589+24
-	str	r3, [r2, #0]
-	bx	lr
-.L590:
-	.align	2
-.L589:
-	.word	.LANCHOR52
-	.word	.LANCHOR54
-	.word	.LANCHOR53
-	.word	.LANCHOR56
-	.word	.LANCHOR55
-	.word	.LANCHOR58
-	.word	.LANCHOR57
-	.size	FtlSysBlkNumInit, .-FtlSysBlkNumInit
-	.section	.text.FtlConstantsInit,"ax",%progbits
-	.align	1
-	.global	FtlConstantsInit
-	.thumb
-	.thumb_func
-	.type	FtlConstantsInit, %function
-FtlConstantsInit:
-	@ args = 0, pretend = 0, frame = 32
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r4, r0
-	ldrh	r7, [r0, #8]
-	sub	sp, sp, #32
-	ldr	r3, .L607
-	ldrh	r1, [r0, #10]
-	ldrh	r0, [r0, #12]
-	strh	r7, [r3, #0]	@ movhi
-	ldr	r3, .L607+4
-	ldrh	ip, [r4, #14]
-	ldr	r2, .L607+8
-	strh	r1, [r3, #0]	@ movhi
-	ldr	r3, .L607+12
-	strh	r0, [r3, #0]	@ movhi
-	ldr	r3, .L607+16
-	strh	ip, [r3, #0]	@ movhi
-	movs	r3, #0
-.L592:
-	strb	r3, [r3, r2]
-	adds	r3, r3, #1
-	cmp	r3, #32
-	bne	.L592
-	ldrh	r2, [r4, #14]
-	ldrh	r3, [r4, #20]
-	cmp	r3, r2, lsr #8
-	bcs	.L593
-	ldr	r3, .L607+8
-	uxtb	sl, r0
-	movs	r2, #0
-	subs	r6, r3, r0
-	str	r6, [sp, #24]
-	subs	r6, r1, #1
-	lsl	r8, sl, #1
-	mla	r6, r0, r6, r3
-	uxtb	r8, r8
-	rsb	r5, r8, #0
-	uxtb	r5, r5
-	str	r6, [sp, #28]
-	b	.L594
-.L595:
-	ldr	r2, [sp, #12]
-	add	fp, r6, r5
-	add	lr, lr, #1
-	strb	fp, [r2, r3]
-	ldr	r2, [sp, #20]
-	add	fp, r6, r2
-	ldr	r2, [sp, #16]
-	strb	fp, [r2, r3]
-	b	.L596
-.L605:
-	ldr	fp, [sp, #24]
-	movs	r3, #0
-	mov	r6, r3
-	mov	lr, r3
-	add	fp, fp, r2
-	str	fp, [sp, #12]
-	ldr	fp, [sp, #28]
-	str	r2, [sp, #4]
-	add	fp, fp, r2
-	str	fp, [sp, #16]
-	add	fp, r5, sl
-	str	fp, [sp, #20]
-.L596:
 	add	r6, r6, r8
 	cmp	lr, r1
 	add	r3, r3, r0
 	uxtb	r6, r6
-	bcc	.L595
+	bcc	.L388
 	ldr	r2, [sp, #4]
 	adds	r5, r5, #1
 	adds	r2, r2, #1
 	uxtb	r5, r5
-.L594:
+.L387:
 	cmp	r2, r0
-	bcc	.L605
-	ldr	r3, .L607+4
+	bcc	.L398
+	ldr	r3, .L400+4
 	lsls	r1, r1, #1
 	lsr	ip, ip, #1
 	strh	r1, [r3, #0]	@ movhi
-	ldr	r3, .L607+16
+	ldr	r3, .L400+16
 	strh	ip, [r3, #0]	@ movhi
-.L593:
-	ldr	r3, .L607+20
+.L386:
+	ldr	r3, .L400+20
 	movs	r2, #5
 	movs	r1, #0
 	cmp	r7, #1
 	strh	r2, [r3, #0]	@ movhi
-	ldr	r2, .L607+24
+	ldr	r2, .L400+24
 	it	eq
 	strheq	r7, [r3, #0]	@ movhi
-	ldr	r3, .L607+28
+	ldr	r3, .L400+28
 	strh	r1, [r2, #0]	@ movhi
 	mov	r2, #4352
 	strh	r2, [r3, #0]	@ movhi
-	ldr	r2, .L607+32
+	ldr	r2, .L400+32
 	ldrb	r8, [r2, #0]	@ zero_extendqisi2
 	cmp	r8, #0
-	beq	.L598
+	beq	.L391
 	mov	r2, #384
 	strh	r2, [r3, #0]	@ movhi
-.L598:
-	ldr	r3, .L607+4
+.L391:
+	ldr	r3, .L400+4
 	ldrh	r5, [r3, #0]
 	muls	r5, r0, r5
-	ldr	r3, .L607+36
+	ldr	r3, .L400+36
 	uxth	r5, r5
 	strh	r5, [r3, #0]	@ movhi
-	ldr	r3, .L607+16
+	ldr	r3, .L400+16
 	ldrh	r6, [r3, #0]
 	muls	r0, r6, r0
-	ldr	r3, .L607+40
+	ldr	r3, .L400+40
 	uxth	r0, r0
 	strh	r0, [r3, #0]	@ movhi
 	bl	Ftl_log2
-	ldr	r3, .L607+44
+	ldr	r3, .L400+44
 	ldrh	fp, [r4, #16]
 	ldrh	r1, [r4, #18]
 	ldrh	sl, [r4, #20]
 	mul	r2, fp, r5
 	strh	r0, [r3, #0]	@ movhi
 	mov	r0, sl
-	ldr	r3, .L607+48
+	ldr	r3, .L400+48
 	strh	fp, [r3, #0]	@ movhi
-	ldr	r3, .L607+52
+	ldr	r3, .L400+52
 	strh	r1, [r3, #0]	@ movhi
-	ldr	r3, .L607+56
+	ldr	r3, .L400+56
 	strh	r2, [r3, #0]	@ movhi
-	ldr	r3, .L607+60
+	ldr	r3, .L400+60
 	strh	sl, [r3, #0]	@ movhi
 	str	r1, [sp, #8]
 	bl	Ftl_log2
-	ldr	r3, .L607+64
-	ldr	r2, .L607+68
+	ldr	r3, .L400+64
+	ldr	r2, .L400+68
 	ldr	r1, [sp, #8]
 	mul	r1, r1, sl
 	strh	r0, [r3, #0]	@ movhi
@@ -4731,26 +3015,26 @@ FtlConstantsInit:
 	mov	r7, r0
 	uxth	r3, r3
 	strh	r3, [r2, #0]	@ movhi
-	ldr	r2, .L607+72
+	ldr	r2, .L400+72
 	lsrs	r3, r3, #8
 	cmp	r6, #1024
 	strh	r3, [r2, #0]	@ movhi
 	ldrh	r2, [r4, #26]
-	ldr	r3, .L607+76
-	ldr	r4, .L607+28
+	ldr	r3, .L400+76
+	ldr	r4, .L400+28
 	strh	r2, [r3, #0]	@ movhi
 	mul	r2, r6, r5
-	ldr	r3, .L607+80
+	ldr	r3, .L400+80
 	ldrh	r0, [r4, #0]
 	str	r2, [r3, #0]
 	it	hi
 	uxtbhi	r2, r6
-	ldr	r3, .L607+24
+	ldr	r3, .L400+24
 	it	hi
 	strhhi	r2, [r3, #0]	@ movhi
 	lsls	r0, r0, #3
 	ldrh	r2, [r3, #0]
-	ldr	r3, .L607+84
+	ldr	r3, .L400+84
 	subs	r2, r6, r2
 	muls	r2, r5, r2
 	mul	r2, sl, r2
@@ -4758,3055 +3042,4815 @@ FtlConstantsInit:
 	asr	r2, fp, #11
 	str	r2, [r3, #0]
 	bl	__aeabi_idiv
-	ldr	r3, .L607+88
+	ldr	r3, .L400+88
 	uxth	r0, r0
 	strh	r0, [r3, #0]	@ movhi
 	cmp	r0, #4
-	bhi	.L600
+	bhi	.L393
 	movs	r2, #4
 	strh	r2, [r3, #0]	@ movhi
-.L600:
+.L393:
 	cmp	r8, #0
-	beq	.L601
+	beq	.L394
 	mov	r3, #640
 	strh	r3, [r4, #0]	@ movhi
-.L601:
+.L394:
 	ldrh	r2, [r4, #0]
 	lsls	r6, r6, #6
-	ldr	r3, .L607+92
+	ldr	r3, .L400+92
 	mov	r1, r5
-	ldr	r4, .L607+96
+	ldr	r4, .L400+96
 	asr	r2, r2, r7
 	adds	r7, r7, #9
 	asr	r6, r6, r7
 	adds	r2, r2, #2
 	strh	r2, [r3, #0]	@ movhi
 	uxth	r6, r6
-	ldr	r3, .L607+100
+	ldr	r3, .L400+100
 	mul	r2, r5, r6
 	strh	r6, [r3, #0]	@ movhi
-	ldr	r3, .L607+104
+	ldr	r3, .L400+104
 	adds	r6, r6, #8
 	str	r2, [r3, #0]
-	ldr	r3, .L607+88
+	ldr	r3, .L400+88
 	ldrh	r0, [r3, #0]
 	bl	__aeabi_uidiv
 	cmp	r5, #1
 	uxtah	r6, r6, r0
 	str	r6, [r4, #0]
-	bne	.L602
+	bne	.L395
 	adds	r6, r6, #4
 	str	r6, [r4, #0]
-.L602:
+.L395:
 	ldrh	r0, [r4, #0]
 	bl	FtlSysBlkNumInit
 	ldr	r2, [r4, #0]
-	ldr	r3, .L607+108
+	ldr	r3, .L400+108
 	str	r2, [r3, #0]
 	movs	r2, #24
-	ldr	r3, .L607+112
+	ldr	r3, .L400+112
 	ldr	r1, [r3, #0]
-	ldr	r3, .L607+48
+	ldr	r3, .L400+48
 	lsls	r1, r1, #2
 	ldrh	r3, [r3, #0]
 	muls	r1, r3, r1
-	ldr	r3, .L607+64
+	ldr	r3, .L400+64
 	ldrh	r3, [r3, #0]
 	adds	r3, r3, #9
 	lsr	r1, r1, r3
-	ldr	r3, .L607+116
+	ldr	r3, .L400+116
 	adds	r1, r1, #2
 	uxth	r1, r1
 	strh	r1, [r3, #0]	@ movhi
-	ldr	r3, .L607+120
+	ldr	r3, .L400+120
 	strh	r2, [r3, #0]	@ movhi
 	movs	r2, #0
-	ldr	r3, .L607+124
+	ldr	r3, .L400+124
 	str	r2, [r3, #0]
-	ldr	r2, .L607+88
+	ldr	r2, .L400+88
 	ldrh	r4, [r2, #0]
 	adds	r3, r4, #3
 	strh	r3, [r2, #0]	@ movhi
-	ldr	r3, .L607+104
+	ldr	r3, .L400+104
 	ldr	r0, [r3, #0]
 	adds	r5, r0, #3
 	str	r5, [r3, #0]
-	ldr	r5, .L607+128
+	ldr	r5, .L400+128
 	ldrb	r5, [r5, #0]	@ zero_extendqisi2
-	cbz	r5, .L603
+	cbz	r5, .L396
 	adds	r4, r4, #4
 	adds	r0, r0, #5
 	strh	r4, [r2, #0]	@ movhi
 	str	r0, [r3, #0]
-.L603:
-	ldr	r3, .L607+132
+.L396:
+	ldr	r3, .L400+132
 	movs	r2, #0
 	strh	r2, [r3, #0]	@ movhi
-	ldr	r2, .L607+136
+	ldr	r2, .L400+136
 	ldrh	r2, [r2, #0]
 	lsrs	r0, r2, #3
 	add	r2, r0, r2, lsl #1
 	adds	r2, r2, #52
 	add	r1, r2, r1, lsl #2
-	ldr	r2, .L607+60
+	ldr	r2, .L400+60
 	ldrh	r2, [r2, #0]
 	cmp	r1, r2, lsl #9
-	bcs	.L604
+	bcs	.L397
 	movs	r2, #1
 	strh	r2, [r3, #0]	@ movhi
-.L604:
+.L397:
 	movs	r0, #0
 	add	sp, sp, #32
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L608:
+.L401:
+	.align	2
+.L400:
+	.word	.LANCHOR47
+	.word	.LANCHOR48
+	.word	.LANCHOR50
+	.word	.LANCHOR49
+	.word	.LANCHOR44
+	.word	.LANCHOR51
+	.word	.LANCHOR52
+	.word	.LANCHOR53
+	.word	.LANCHOR0
+	.word	.LANCHOR41
+	.word	.LANCHOR54
+	.word	.LANCHOR55
+	.word	.LANCHOR56
+	.word	.LANCHOR57
+	.word	.LANCHOR58
+	.word	.LANCHOR59
+	.word	.LANCHOR60
+	.word	.LANCHOR61
+	.word	.LANCHOR62
+	.word	.LANCHOR63
+	.word	.LANCHOR46
+	.word	.LANCHOR64
+	.word	.LANCHOR65
+	.word	.LANCHOR66
+	.word	.LANCHOR40
+	.word	.LANCHOR67
+	.word	.LANCHOR68
+	.word	.LANCHOR69
+	.word	.LANCHOR45
+	.word	.LANCHOR70
+	.word	.LANCHOR71
+	.word	.LANCHOR72
+	.word	.LANCHOR7
+	.word	.LANCHOR73
+	.word	.LANCHOR43
+	.size	FtlConstantsInit, .-FtlConstantsInit
+	.section	.text.IsBlkInVendorPart,"ax",%progbits
+	.align	1
+	.global	IsBlkInVendorPart
+	.thumb
+	.thumb_func
+	.type	IsBlkInVendorPart, %function
+IsBlkInVendorPart:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L409
+	push	{r4, lr}
+	ldrh	r3, [r3, #0]
+	cbz	r3, .L407
+	ldr	r3, .L409+4
+	ldrh	r1, [r3, #0]
+	ldr	r3, .L409+8
+	ldr	r2, [r3, #0]
+	movs	r3, #0
+	b	.L404
+.L406:
+	ldrh	r4, [r2], #2
+	cmp	r4, r0
+	beq	.L408
+	adds	r3, r3, #1
+	uxth	r3, r3
+.L404:
+	cmp	r3, r1
+	bne	.L406
+	movs	r0, #0
+	pop	{r4, pc}
+.L408:
+	movs	r0, #1
+	pop	{r4, pc}
+.L407:
+	mov	r0, r3
+	pop	{r4, pc}
+.L410:
+	.align	2
+.L409:
+	.word	.LANCHOR74
+	.word	.LANCHOR65
+	.word	.LANCHOR75
+	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
+	.section	.text.FtlGetCap,"ax",%progbits
+	.align	1
+	.global	FtlGetCap
+	.thumb
+	.thumb_func
+	.type	FtlGetCap, %function
+FtlGetCap:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L412
+	ldr	r0, [r3, #0]
+	bx	lr
+.L413:
+	.align	2
+.L412:
+	.word	.LANCHOR72
+	.size	FtlGetCap, .-FtlGetCap
+	.section	.text.FtlGetCapacity,"ax",%progbits
+	.align	1
+	.global	FtlGetCapacity
+	.thumb
+	.thumb_func
+	.type	FtlGetCapacity, %function
+FtlGetCapacity:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L415
+	ldr	r0, [r3, #0]
+	bx	lr
+.L416:
+	.align	2
+.L415:
+	.word	.LANCHOR72
+	.size	FtlGetCapacity, .-FtlGetCapacity
+	.section	.text.ftl_get_density,"ax",%progbits
+	.align	1
+	.global	ftl_get_density
+	.thumb
+	.thumb_func
+	.type	ftl_get_density, %function
+ftl_get_density:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L418
+	ldr	r0, [r3, #0]
+	bx	lr
+.L419:
+	.align	2
+.L418:
+	.word	.LANCHOR72
+	.size	ftl_get_density, .-ftl_get_density
+	.section	.text.FtlGetLpn,"ax",%progbits
+	.align	1
+	.global	FtlGetLpn
+	.thumb
+	.thumb_func
+	.type	FtlGetLpn, %function
+FtlGetLpn:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L421
+	ldr	r0, [r3, #0]
+	bx	lr
+.L422:
+	.align	2
+.L421:
+	.word	.LANCHOR76
+	.size	FtlGetLpn, .-FtlGetLpn
+	.section	.text.FtlGetCurEraseBlock,"ax",%progbits
+	.align	1
+	.global	FtlGetCurEraseBlock
+	.thumb
+	.thumb_func
+	.type	FtlGetCurEraseBlock, %function
+FtlGetCurEraseBlock:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r2, .L424
+	ldr	r3, .L424+4
+	ldr	r0, [r2, #0]
+	ldrh	r3, [r3, #0]
+	muls	r0, r3, r0
+	bx	lr
+.L425:
+	.align	2
+.L424:
+	.word	.LANCHOR77
+	.word	.LANCHOR41
+	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
+	.section	.text.FtlGetAllBlockNum,"ax",%progbits
+	.align	1
+	.global	FtlGetAllBlockNum
+	.thumb
+	.thumb_func
+	.type	FtlGetAllBlockNum, %function
+FtlGetAllBlockNum:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r2, .L427
+	ldr	r3, .L427+4
+	ldrh	r0, [r2, #0]
+	ldrh	r3, [r3, #0]
+	muls	r0, r3, r0
+	bx	lr
+.L428:
+	.align	2
+.L427:
+	.word	.LANCHOR41
+	.word	.LANCHOR44
+	.size	FtlGetAllBlockNum, .-FtlGetAllBlockNum
+	.section	.text.FtlBbmMapBadBlock,"ax",%progbits
+	.align	1
+	.global	FtlBbmMapBadBlock
+	.thumb
+	.thumb_func
+	.type	FtlBbmMapBadBlock, %function
+FtlBbmMapBadBlock:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L430
+	push	{r0, r1, r2, r4, r5, r6, r7, lr}
+	mov	r5, r0
+	ldrh	r4, [r3, #0]
+	movs	r7, #1
+	mov	r1, r4
+	bl	__aeabi_uidiv
+	uxth	r2, r0
+	mls	r3, r4, r2, r5
+	ldr	r4, .L430+4
+	add	r1, r4, r2, lsl #2
+	ldr	r0, [r1, #28]
+	uxth	r3, r3
+	and	r1, r3, #31
+	lsrs	r6, r3, #5
+	lsl	r1, r7, r1
+	ldr	r7, [r0, r6, lsl #2]
+	orrs	r1, r1, r7
+	str	r1, [r0, r6, lsl #2]
+	str	r1, [sp, #0]
+	mov	r1, r5
+	ldr	r0, .L430+8
+	bl	printf
+	ldrh	r3, [r4, #6]
+	movs	r0, #0
+	adds	r3, r3, #1
+	strh	r3, [r4, #6]	@ movhi
+	pop	{r1, r2, r3, r4, r5, r6, r7, pc}
+.L431:
+	.align	2
+.L430:
+	.word	.LANCHOR54
+	.word	.LANCHOR78
+	.word	.LC2
+	.size	FtlBbmMapBadBlock, .-FtlBbmMapBadBlock
+	.global	__aeabi_uidivmod
+	.section	.text.FtlBbmIsBadBlock,"ax",%progbits
+	.align	1
+	.global	FtlBbmIsBadBlock
+	.thumb
+	.thumb_func
+	.type	FtlBbmIsBadBlock, %function
+FtlBbmIsBadBlock:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L433
+	push	{r4, r5, r6, lr}
+	mov	r6, r0
+	ldrh	r5, [r3, #0]
+	mov	r1, r5
+	bl	__aeabi_uidivmod
+	mov	r0, r6
+	uxth	r4, r1
+	mov	r1, r5
+	bl	__aeabi_uidiv
+	ldr	r3, .L433+4
+	lsrs	r2, r4, #5
+	and	r4, r4, #31
+	uxth	r0, r0
+	add	r0, r3, r0, lsl #2
+	ldr	r3, [r0, #28]
+	ldr	r0, [r3, r2, lsl #2]
+	lsr	r0, r0, r4
+	and	r0, r0, #1
+	pop	{r4, r5, r6, pc}
+.L434:
 	.align	2
-.L607:
-	.word	.LANCHOR59
-	.word	.LANCHOR60
-	.word	.LANCHOR62
-	.word	.LANCHOR61
-	.word	.LANCHOR56
-	.word	.LANCHOR63
-	.word	.LANCHOR64
-	.word	.LANCHOR65
-	.word	.LANCHOR0
-	.word	.LANCHOR53
-	.word	.LANCHOR66
-	.word	.LANCHOR67
-	.word	.LANCHOR68
-	.word	.LANCHOR69
-	.word	.LANCHOR70
-	.word	.LANCHOR71
-	.word	.LANCHOR72
-	.word	.LANCHOR73
-	.word	.LANCHOR74
-	.word	.LANCHOR75
-	.word	.LANCHOR58
-	.word	.LANCHOR76
-	.word	.LANCHOR77
+.L433:
+	.word	.LANCHOR54
 	.word	.LANCHOR78
-	.word	.LANCHOR52
+	.size	FtlBbmIsBadBlock, .-FtlBbmIsBadBlock
+	.section	.text.FtlBbtInfoPrint,"ax",%progbits
+	.align	1
+	.global	FtlBbtInfoPrint
+	.thumb
+	.thumb_func
+	.type	FtlBbtInfoPrint, %function
+FtlBbtInfoPrint:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	FtlBbtInfoPrint, .-FtlBbtInfoPrint
+	.section	.text.FtlBbt2Bitmap,"ax",%progbits
+	.align	1
+	.global	FtlBbt2Bitmap
+	.thumb
+	.thumb_func
+	.type	FtlBbt2Bitmap, %function
+FtlBbt2Bitmap:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L441
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r6, r0
+	ldrh	r2, [r3, #0]
+	mov	r0, r1
+	mov	r5, r1
+	movs	r1, #0
+	ldr	r7, .L441+4
+	movs	r4, #0
+	lsls	r2, r2, #2
+	movw	r8, #65535
+	bl	memset
+.L439:
+	ldrh	r3, [r6, r4]
+	cmp	r3, r8
+	beq	.L436
+	ldrh	r2, [r7, #0]
+	cmp	r2, r3
+	bhi	.L438
+	ldr	r1, .L441+8
+	movs	r2, #79
+	ldr	r0, .L441+12
+	bl	printf
+	ldr	r0, .L441+16
+	ldr	r1, .L441+20
+	bl	printf
+.L438:
+	ldrh	r2, [r6, r4]
+	movs	r1, #1
+	adds	r4, r4, #2
+	lsrs	r3, r2, #5
+	and	r2, r2, #31
+	lsl	r2, r1, r2
+	cmp	r4, #1024
+	ldr	r1, [r5, r3, lsl #2]
+	orr	r2, r1, r2
+	str	r2, [r5, r3, lsl #2]
+	bne	.L439
+.L436:
+	pop	{r4, r5, r6, r7, r8, pc}
+.L442:
+	.align	2
+.L441:
 	.word	.LANCHOR79
+	.word	.LANCHOR54
 	.word	.LANCHOR80
-	.word	.LANCHOR81
-	.word	.LANCHOR57
-	.word	.LANCHOR82
-	.word	.LANCHOR83
-	.word	.LANCHOR84
-	.word	.LANCHOR7
-	.word	.LANCHOR85
-	.word	.LANCHOR55
-	.size	FtlConstantsInit, .-FtlConstantsInit
-	.section	.text.IsBlkInVendorPart,"ax",%progbits
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
+	.size	FtlBbt2Bitmap, .-FtlBbt2Bitmap
+	.section	.text.FtlBbtMemInit,"ax",%progbits
 	.align	1
-	.global	IsBlkInVendorPart
+	.global	FtlBbtMemInit
 	.thumb
 	.thumb_func
-	.type	IsBlkInVendorPart, %function
-IsBlkInVendorPart:
+	.type	FtlBbtMemInit, %function
+FtlBbtMemInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L616
-	push	{r4, lr}
-	ldrh	r3, [r3, #0]
-	cbz	r3, .L614
-	ldr	r3, .L616+4
-	ldrh	r1, [r3, #0]
-	ldr	r3, .L616+8
-	ldr	r2, [r3, #0]
+	@ link register save eliminated.
+	ldr	r0, .L444
+	movw	r3, #65535
+	movs	r1, #255
+	movs	r2, #16
+	strh	r3, [r0, #0]	@ movhi
 	movs	r3, #0
-	b	.L611
-.L613:
-	ldrh	r4, [r2], #2
-	cmp	r4, r0
-	beq	.L615
-	adds	r3, r3, #1
-	uxth	r3, r3
-.L611:
-	cmp	r3, r1
-	bne	.L613
-	movs	r0, #0
-	pop	{r4, pc}
-.L615:
-	movs	r0, #1
-	pop	{r4, pc}
-.L614:
-	mov	r0, r3
-	pop	{r4, pc}
-.L617:
+	strh	r3, [r0, #6]	@ movhi
+	adds	r0, r0, #12
+	b	memset
+.L445:
 	.align	2
-.L616:
-	.word	.LANCHOR86
-	.word	.LANCHOR77
-	.word	.LANCHOR87
-	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
-	.section	.text.FtlGetCap,"ax",%progbits
+.L444:
+	.word	.LANCHOR78
+	.size	FtlBbtMemInit, .-FtlBbtMemInit
+	.section	.text.V2P_block,"ax",%progbits
 	.align	1
-	.global	FtlGetCap
+	.global	V2P_block
 	.thumb
 	.thumb_func
-	.type	FtlGetCap, %function
-FtlGetCap:
+	.type	V2P_block, %function
+V2P_block:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L619
-	ldr	r0, [r3, #0]
-	bx	lr
-.L620:
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r7, r1
+	ldr	r3, .L447
+	mov	r6, r0
+	ldrh	r4, [r3, #0]
+	muls	r7, r4, r7
+	mov	r1, r4
+	bl	__aeabi_uidiv
+	ldr	r3, .L447+4
+	mov	r1, r4
+	ldrh	r5, [r3, #0]
+	mla	r5, r0, r5, r7
+	mov	r0, r6
+	bl	__aeabi_uidivmod
+	adds	r1, r5, r1
+	uxth	r0, r1
+	pop	{r3, r4, r5, r6, r7, pc}
+.L448:
 	.align	2
-.L619:
-	.word	.LANCHOR84
-	.size	FtlGetCap, .-FtlGetCap
-	.section	.text.FtlGetCapacity,"ax",%progbits
+.L447:
+	.word	.LANCHOR49
+	.word	.LANCHOR54
+	.size	V2P_block, .-V2P_block
+	.section	.text.P2V_plane,"ax",%progbits
 	.align	1
-	.global	FtlGetCapacity
+	.global	P2V_plane
 	.thumb
 	.thumb_func
-	.type	FtlGetCapacity, %function
-FtlGetCapacity:
+	.type	P2V_plane, %function
+P2V_plane:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L450
+	push	{r4, r5, r6, lr}
+	mov	r6, r0
+	ldrh	r4, [r3, #0]
+	ldr	r3, .L450+4
+	ldrh	r1, [r3, #0]
+	bl	__aeabi_uidiv
+	mov	r1, r4
+	mul	r5, r0, r4
+	mov	r0, r6
+	bl	__aeabi_uidivmod
+	adds	r1, r5, r1
+	uxth	r0, r1
+	pop	{r4, r5, r6, pc}
+.L451:
+	.align	2
+.L450:
+	.word	.LANCHOR49
+	.word	.LANCHOR54
+	.size	P2V_plane, .-P2V_plane
+	.section	.text.P2V_block_in_plane,"ax",%progbits
+	.align	1
+	.global	P2V_block_in_plane
+	.thumb
+	.thumb_func
+	.type	P2V_block_in_plane, %function
+P2V_block_in_plane:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	ldr	r3, .L453
+	ldrh	r1, [r3, #0]
+	bl	__aeabi_uidivmod
+	ldr	r3, .L453+4
+	uxth	r0, r1
+	ldrh	r1, [r3, #0]
+	bl	__aeabi_uidiv
+	uxth	r0, r0
+	pop	{r3, pc}
+.L454:
+	.align	2
+.L453:
+	.word	.LANCHOR54
+	.word	.LANCHOR49
+	.size	P2V_block_in_plane, .-P2V_block_in_plane
+	.section	.text.ftl_cmp_data_ver,"ax",%progbits
+	.align	1
+	.global	ftl_cmp_data_ver
+	.thumb
+	.thumb_func
+	.type	ftl_cmp_data_ver, %function
+ftl_cmp_data_ver:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L622
-	ldr	r0, [r3, #0]
+	cmp	r0, r1
+	bls	.L456
+	subs	r0, r0, r1
+	cmp	r0, #-2147483648
+	ite	hi
+	movhi	r0, #0
+	movls	r0, #1
 	bx	lr
-.L623:
-	.align	2
-.L622:
-	.word	.LANCHOR84
-	.size	FtlGetCapacity, .-FtlGetCapacity
-	.section	.text.ftl_get_density,"ax",%progbits
+.L456:
+	subs	r0, r1, r0
+	cmp	r0, #-2147483648
+	ite	ls
+	movls	r0, #0
+	movhi	r0, #1
+	bx	lr
+	.size	ftl_cmp_data_ver, .-ftl_cmp_data_ver
+	.section	.text.FtlFreeSysBlkQueueInit,"ax",%progbits
 	.align	1
-	.global	ftl_get_density
+	.global	FtlFreeSysBlkQueueInit
 	.thumb
 	.thumb_func
-	.type	ftl_get_density, %function
-ftl_get_density:
+	.type	FtlFreeSysBlkQueueInit, %function
+FtlFreeSysBlkQueueInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L625
-	ldr	r0, [r3, #0]
-	bx	lr
-.L626:
+	ldr	r3, .L459
+	mov	r2, #2048
+	push	{r4, lr}
+	movs	r4, #0
+	mov	r1, r4
+	strh	r4, [r3, #2]	@ movhi
+	strh	r4, [r3, #4]	@ movhi
+	strh	r4, [r3, #6]	@ movhi
+	strh	r0, [r3], #8	@ movhi
+	mov	r0, r3
+	bl	memset
+	mov	r0, r4
+	pop	{r4, pc}
+.L460:
 	.align	2
-.L625:
-	.word	.LANCHOR84
-	.size	ftl_get_density, .-ftl_get_density
-	.section	.text.FtlGetLpn,"ax",%progbits
+.L459:
+	.word	.LANCHOR81
+	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
+	.section	.text.FtlFreeSysBlkQueueEmpty,"ax",%progbits
 	.align	1
-	.global	FtlGetLpn
+	.global	FtlFreeSysBlkQueueEmpty
 	.thumb
 	.thumb_func
-	.type	FtlGetLpn, %function
-FtlGetLpn:
+	.type	FtlFreeSysBlkQueueEmpty, %function
+FtlFreeSysBlkQueueEmpty:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L628
-	ldr	r0, [r3, #0]
+	ldr	r3, .L462
+	ldrh	r0, [r3, #6]
+	rsbs	r0, r0, #1
+	it	cc
+	movcc	r0, #0
 	bx	lr
-.L629:
+.L463:
 	.align	2
-.L628:
-	.word	.LANCHOR88
-	.size	FtlGetLpn, .-FtlGetLpn
-	.section	.text.FtlGetCurEraseBlock,"ax",%progbits
+.L462:
+	.word	.LANCHOR81
+	.size	FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty
+	.section	.text.FtlFreeSysBlkQueueFull,"ax",%progbits
 	.align	1
-	.global	FtlGetCurEraseBlock
+	.global	FtlFreeSysBlkQueueFull
 	.thumb
 	.thumb_func
-	.type	FtlGetCurEraseBlock, %function
-FtlGetCurEraseBlock:
+	.type	FtlFreeSysBlkQueueFull, %function
+FtlFreeSysBlkQueueFull:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L631
-	ldr	r3, .L631+4
-	ldr	r0, [r2, #0]
-	ldrh	r3, [r3, #0]
-	muls	r0, r3, r0
+	ldr	r3, .L465
+	ldrh	r0, [r3, #6]
+	sub	r1, r0, #1024
+	rsbs	r0, r1, #0
+	adc	r0, r0, r1
 	bx	lr
-.L632:
+.L466:
 	.align	2
-.L631:
-	.word	.LANCHOR89
-	.word	.LANCHOR53
-	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
-	.section	.text.FtlGetAllBlockNum,"ax",%progbits
+.L465:
+	.word	.LANCHOR81
+	.size	FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull
+	.section	.text.FtlFreeSysBlkQueueIn,"ax",%progbits
 	.align	1
-	.global	FtlGetAllBlockNum
+	.global	FtlFreeSysBlkQueueIn
 	.thumb
 	.thumb_func
-	.type	FtlGetAllBlockNum, %function
-FtlGetAllBlockNum:
+	.type	FtlFreeSysBlkQueueIn, %function
+FtlFreeSysBlkQueueIn:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r2, .L634
-	ldr	r3, .L634+4
-	ldrh	r0, [r2, #0]
-	ldrh	r3, [r3, #0]
-	muls	r0, r3, r0
-	bx	lr
-.L635:
+	push	{r3, r4, r5, lr}
+	mov	r4, r0
+	ldr	r3, .L470
+	ldrh	r3, [r3, #6]
+	cmp	r3, #1024
+	beq	.L467
+	cbz	r1, .L469
+	ldr	r3, .L470+4
+	ldr	r3, [r3, #0]
+	cbnz	r3, .L469
+	bl	P2V_block_in_plane
+	ldr	r3, .L470+8
+	movs	r1, #1
+	mov	r2, r1
+	mov	r5, r0
+	ldr	r0, [r3, #0]
+	lsls	r3, r4, #10
+	str	r3, [r0, #4]
+	bl	FlashEraseBlocks
+	ldr	r3, .L470+12
+	ldr	r3, [r3, #0]
+	ldrh	r2, [r3, r5, lsl #1]
+	adds	r2, r2, #1
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	ldr	r3, .L470+16
+	ldr	r2, [r3, #0]
+	adds	r2, r2, #1
+	str	r2, [r3, #0]
+.L469:
+	ldr	r3, .L470
+	ldrh	r2, [r3, #6]
+	adds	r2, r2, #1
+	strh	r2, [r3, #6]	@ movhi
+	ldrh	r2, [r3, #4]
+	adds	r1, r2, #4
+	adds	r2, r2, #1
+	bic	r2, r2, #64512
+	strh	r2, [r3, #4]	@ movhi
+	strh	r4, [r3, r1, lsl #1]	@ movhi
+.L467:
+	pop	{r3, r4, r5, pc}
+.L471:
 	.align	2
-.L634:
-	.word	.LANCHOR53
-	.word	.LANCHOR56
-	.size	FtlGetAllBlockNum, .-FtlGetAllBlockNum
-	.section	.text.FtlBbmMapBadBlock,"ax",%progbits
+.L470:
+	.word	.LANCHOR81
+	.word	.LANCHOR82
+	.word	.LANCHOR83
+	.word	.LANCHOR84
+	.word	.LANCHOR85
+	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
+	.section	.text.FtlFreeSysBLkSort,"ax",%progbits
 	.align	1
-	.global	FtlBbmMapBadBlock
+	.global	FtlFreeSysBLkSort
 	.thumb
 	.thumb_func
-	.type	FtlBbmMapBadBlock, %function
-FtlBbmMapBadBlock:
+	.type	FtlFreeSysBLkSort, %function
+FtlFreeSysBLkSort:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L637
-	push	{r0, r1, r2, r4, r5, r6, r7, lr}
-	mov	r5, r0
-	ldrh	r4, [r3, #0]
-	movs	r7, #1
-	mov	r1, r4
-	bl	__aeabi_uidiv
-	uxth	r2, r0
-	mls	r3, r4, r2, r5
-	ldr	r4, .L637+4
-	add	r1, r4, r2, lsl #2
-	ldr	r0, [r1, #28]
-	uxth	r3, r3
-	and	r1, r3, #31
-	lsrs	r6, r3, #5
-	lsl	r1, r7, r1
-	ldr	r7, [r0, r6, lsl #2]
-	orrs	r1, r1, r7
-	str	r1, [r0, r6, lsl #2]
-	str	r1, [sp, #0]
-	mov	r1, r5
-	ldr	r0, .L637+8
-	bl	printf
-	ldrh	r3, [r4, #6]
-	movs	r0, #0
-	adds	r3, r3, #1
-	strh	r3, [r4, #6]	@ movhi
-	pop	{r1, r2, r3, r4, r5, r6, r7, pc}
-.L638:
+	push	{r3, r4, r5, r6, r7, r8, sl, lr}
+	movs	r4, #0
+	ldr	r5, .L482
+	ldr	r7, .L482+4
+	ldr	r6, .L482+8
+	b	.L473
+.L474:
+	add	r8, r4, r8
+	add	r8, r8, #4
+	ldrh	r0, [r5, r8, lsl #1]
+	bl	P2V_block_in_plane
+	ldr	r2, [r6, #0]
+	ldr	r3, [r7, #0]
+	ldrh	r2, [r2, r0, lsl #1]
+	str	r2, [r3, r4, lsl #2]
+	adds	r4, r4, #1
+	uxth	r4, r4
+.L473:
+	ldrh	ip, [r5, #6]
+	ldrh	r8, [r5, #2]
+	cmp	r4, ip
+	bcc	.L474
+	ldr	r3, .L482+4
+	add	r6, ip, #-1
+	ldr	r4, .L482
+	ldr	r1, [r3, #0]
+	movs	r3, #0
+	b	.L475
+.L480:
+	adds	r5, r3, #1
+	mov	r2, r3
+	uxth	r5, r5
+	mov	r0, r5
+	b	.L476
+.L478:
+	ldr	r7, [r1, r0, lsl #2]
+	ldr	sl, [r1, r2, lsl #2]
+	cmp	sl, r7
+	it	hi
+	movhi	r2, r0
+	adds	r0, r0, #1
+	uxth	r0, r0
+.L476:
+	cmp	r0, ip
+	bcc	.L478
+	cmp	r3, r2
+	beq	.L479
+	ldr	r0, [r1, r2, lsl #2]
+	ldr	r7, [r1, r3, lsl #2]
+	str	r7, [r1, r2, lsl #2]
+	add	r2, r8, r2
+	str	r0, [r1, r3, lsl #2]
+	add	r3, r8, r3
+	adds	r2, r2, #4
+	adds	r3, r3, #4
+	ldrh	r0, [r4, r2, lsl #1]
+	ldrh	r7, [r4, r3, lsl #1]
+	strh	r7, [r4, r2, lsl #1]	@ movhi
+	strh	r0, [r4, r3, lsl #1]	@ movhi
+.L479:
+	mov	r3, r5
+.L475:
+	cmp	r3, r6
+	blt	.L480
+	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
+.L483:
 	.align	2
-.L637:
-	.word	.LANCHOR66
-	.word	.LANCHOR90
-	.word	.LC8
-	.size	FtlBbmMapBadBlock, .-FtlBbmMapBadBlock
-	.global	__aeabi_uidivmod
-	.section	.text.FtlBbmIsBadBlock,"ax",%progbits
+.L482:
+	.word	.LANCHOR81
+	.word	.LANCHOR86
+	.word	.LANCHOR84
+	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
+	.section	.text.remove_from_free_sys_Queue,"ax",%progbits
 	.align	1
-	.global	FtlBbmIsBadBlock
+	.global	remove_from_free_sys_Queue
 	.thumb
 	.thumb_func
-	.type	FtlBbmIsBadBlock, %function
-FtlBbmIsBadBlock:
+	.type	remove_from_free_sys_Queue, %function
+remove_from_free_sys_Queue:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L640
+	ldr	r3, .L490
+	mov	r1, r0
 	push	{r4, r5, r6, lr}
-	mov	r6, r0
-	ldrh	r5, [r3, #0]
-	mov	r1, r5
-	bl	__aeabi_uidivmod
-	mov	r0, r6
-	uxth	r4, r1
-	mov	r1, r5
-	bl	__aeabi_uidiv
-	ldr	r3, .L640+4
-	lsrs	r2, r4, #5
-	and	r4, r4, #31
-	uxth	r0, r0
-	add	r0, r3, r0, lsl #2
-	ldr	r3, [r0, #28]
-	ldr	r0, [r3, r2, lsl #2]
-	lsr	r0, r0, r4
-	and	r0, r0, #1
+	ldrh	r0, [r3, #6]
+	cbz	r0, .L485
+	ldrh	r2, [r3, #2]
+	movs	r5, #0
+	b	.L486
+.L488:
+	adds	r6, r5, r2
+	ldr	r4, .L490
+	lsls	r6, r6, #22
+	add	r6, r3, r6, lsr #21
+	ldrh	r6, [r6, #8]
+	cmp	r6, r1
+	bne	.L487
+	ldr	r0, .L490+4
+	bl	printf
+	ldrh	r3, [r4, #2]
+	movs	r0, #1
+	adds	r5, r5, r3
+	adds	r2, r3, #4
+	adds	r3, r3, #1
+	lsls	r5, r5, #22
+	ldrh	r2, [r4, r2, lsl #1]
+	bic	r3, r3, #64512
+	strh	r3, [r4, #2]	@ movhi
+	add	r5, r4, r5, lsr #21
+	ldrh	r3, [r4, #6]
+	strh	r2, [r5, #8]	@ movhi
+	subs	r3, r3, #1
+	strh	r3, [r4, #6]	@ movhi
 	pop	{r4, r5, r6, pc}
-.L641:
+.L487:
+	adds	r5, r5, #1
+.L486:
+	cmp	r5, r0
+	bcc	.L488
+	movs	r0, #0
+.L485:
+	pop	{r4, r5, r6, pc}
+.L491:
 	.align	2
-.L640:
-	.word	.LANCHOR66
-	.word	.LANCHOR90
-	.size	FtlBbmIsBadBlock, .-FtlBbmIsBadBlock
-	.section	.text.FtlBbtInfoPrint,"ax",%progbits
+.L490:
+	.word	.LANCHOR81
+	.word	.LC6
+	.size	remove_from_free_sys_Queue, .-remove_from_free_sys_Queue
+	.section	.text.FtlFreeSysBlkQueueOut,"ax",%progbits
 	.align	1
-	.global	FtlBbtInfoPrint
+	.global	FtlFreeSysBlkQueueOut
 	.thumb
 	.thumb_func
-	.type	FtlBbtInfoPrint, %function
-FtlBbtInfoPrint:
+	.type	FtlFreeSysBlkQueueOut, %function
+FtlFreeSysBlkQueueOut:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	bx	lr
-	.size	FtlBbtInfoPrint, .-FtlBbtInfoPrint
-	.section	.text.FtlBbt2Bitmap,"ax",%progbits
+	push	{r3, r4, r5, r6, r7, lr}
+	ldr	r3, .L496
+	ldrh	r1, [r3, #6]
+	cmp	r1, #0
+	beq	.L495
+	ldrh	r2, [r3, #2]
+	subs	r1, r1, #1
+	strh	r1, [r3, #6]	@ movhi
+	adds	r0, r2, #4
+	adds	r2, r2, #1
+	bic	r2, r2, #64512
+	strh	r2, [r3, #2]	@ movhi
+	ldrh	r4, [r3, r0, lsl #1]
+	ldr	r3, .L496+4
+	ldr	r7, [r3, #0]
+	cbnz	r7, .L493
+	mov	r0, r4
+	ldr	r6, .L496+8
+	bl	P2V_block_in_plane
+	lsls	r3, r4, #10
+	mov	r5, r0
+	ldr	r0, [r6, #0]
+	str	r3, [r0, #4]
+	ldr	r3, .L496+12
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L494
+	mov	r1, r7
+	movs	r2, #1
+	bl	FlashEraseBlocks
+.L494:
+	movs	r1, #1
+	ldr	r0, [r6, #0]
+	mov	r2, r1
+	bl	FlashEraseBlocks
+	ldr	r3, .L496+16
+	ldr	r3, [r3, #0]
+	ldrh	r2, [r3, r5, lsl #1]
+	adds	r2, r2, #1
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	ldr	r3, .L496+20
+	ldr	r2, [r3, #0]
+	adds	r2, r2, #1
+	str	r2, [r3, #0]
+	b	.L493
+.L495:
+	movw	r4, #65535
+.L493:
+	mov	r0, r4
+	pop	{r3, r4, r5, r6, r7, pc}
+.L497:
+	.align	2
+.L496:
+	.word	.LANCHOR81
+	.word	.LANCHOR82
+	.word	.LANCHOR83
+	.word	.LANCHOR7
+	.word	.LANCHOR84
+	.word	.LANCHOR85
+	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
+	.section	.text.insert_data_list,"ax",%progbits
 	.align	1
-	.global	FtlBbt2Bitmap
+	.global	insert_data_list
 	.thumb
 	.thumb_func
-	.type	FtlBbt2Bitmap, %function
-FtlBbt2Bitmap:
-	@ args = 0, pretend = 0, frame = 0
+	.type	insert_data_list, %function
+insert_data_list:
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L648
-	push	{r4, r5, r6, r7, r8, lr}
-	mov	r6, r0
+	ldr	r3, .L514
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	sub	sp, sp, #24
+	ldrh	fp, [r3, #0]
+	cmp	r0, fp
+	bcs	.L499
+	ldr	r3, .L514+4
+	movs	r6, #6
+	muls	r6, r0, r6
+	ldr	r1, [r3, #0]
+	movw	r3, #65535
+	adds	r2, r1, r6
+	strh	r3, [r1, r6]	@ movhi
+	strh	r3, [r2, #2]	@ movhi
+	ldr	r3, .L514+8
+	ldr	r5, [r3, #0]
+	cmp	r5, #0
+	beq	.L513
+.L500:
+	ldr	r3, .L514+12
+	ldrh	r4, [r2, #4]
+	ldr	ip, [r3, #0]
+	lsls	r3, r0, #1
+	ldrh	r7, [ip, r0, lsl #1]
+	cbz	r4, .L509
+	muls	r4, r7, r4
+	b	.L512
+.L509:
+	mov	r4, #-1
+.L512:
+	str	r4, [sp, #8]
+	subs	r4, r5, r1
+	ldr	r7, .L514+16
+	mov	sl, r2
+	asrs	r4, r4, #1
+	muls	r4, r7, r4
+	ldr	r7, .L514+20
+	uxth	r4, r4
+	str	ip, [sp, #4]
+	ldr	r7, [r7, #0]
+	adds	r3, r7, r3
+	str	r3, [sp, #20]
+	str	r7, [sp, #12]
+	mov	r3, r5
+	movs	r7, #0
+.L507:
+	adds	r7, r7, #1
+	uxth	r7, r7
+	cmp	r7, fp
+	bhi	.L499
+	cmp	r0, r4
+	beq	.L499
+	ldr	r2, [sp, #4]
+	lsl	r8, r4, #1
+	str	r8, [sp, #16]
+	ldrh	r8, [r2, r4, lsl #1]
+	ldrh	r2, [r3, #4]
+	cbz	r2, .L510
+	mul	r2, r2, r8
+	b	.L502
+.L510:
+	mov	r2, #-1
+.L502:
+	ldr	r8, [sp, #8]
+	cmp	r2, r8
+	bne	.L503
+	ldr	r2, [sp, #12]
+	ldr	ip, [sp, #16]
+	ldrh	r8, [r2, ip]
+	ldr	r2, [sp, #20]
+	ldrh	ip, [r2, #0]
+	cmp	r8, ip
+	bcc	.L505
+	b	.L511
+.L503:
+	bhi	.L511
+.L505:
 	ldrh	r2, [r3, #0]
-	mov	r0, r1
-	mov	r5, r1
-	movs	r1, #0
-	ldr	r7, .L648+4
-	movs	r4, #0
-	lsls	r2, r2, #2
 	movw	r8, #65535
-	bl	memset
-.L646:
-	ldrh	r3, [r6, r4]
-	cmp	r3, r8
-	beq	.L643
-	ldrh	r2, [r7, #0]
-	cmp	r2, r3
-	bhi	.L645
-	ldr	r1, .L648+8
-	movs	r2, #79
-	ldr	r0, .L648+12
-	bl	printf
-	ldr	r0, .L648+16
-	ldr	r1, .L648+20
-	bl	printf
-.L645:
-	ldrh	r2, [r6, r4]
-	movs	r1, #1
-	adds	r4, r4, #2
-	lsrs	r3, r2, #5
-	and	r2, r2, #31
-	lsl	r2, r1, r2
-	cmp	r4, #1024
-	ldr	r1, [r5, r3, lsl #2]
-	orr	r2, r1, r2
-	str	r2, [r5, r3, lsl #2]
-	bne	.L646
-.L643:
-	pop	{r4, r5, r6, r7, r8, pc}
-.L649:
+	cmp	r2, r8
+	bne	.L506
+	mov	r2, sl
+	strh	r0, [r3, #0]	@ movhi
+	ldr	r3, .L514+24
+	strh	r4, [r2, #2]	@ movhi
+	b	.L513
+.L506:
+	mov	ip, #6
+	mov	r4, r2
+	mla	r3, ip, r2, r1
+	b	.L507
+.L511:
+	strh	r4, [r1, r6]	@ movhi
+	mov	r2, sl
+	ldrh	r4, [r3, #2]
+	cmp	r3, r5
+	strh	r4, [r2, #2]	@ movhi
+	bne	.L508
+	strh	r0, [r3, #2]	@ movhi
+	ldr	r3, .L514+8
+.L513:
+	str	r2, [r3, #0]
+	b	.L499
+.L508:
+	ldrh	r2, [r3, #2]
+	movs	r4, #6
+	strh	r0, [r3, #2]	@ movhi
+	muls	r2, r4, r2
+	strh	r0, [r1, r2]	@ movhi
+.L499:
+	movs	r0, #0
+	add	sp, sp, #24
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L515:
 	.align	2
-.L648:
-	.word	.LANCHOR91
-	.word	.LANCHOR66
-	.word	.LANCHOR92
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.size	FtlBbt2Bitmap, .-FtlBbt2Bitmap
-	.section	.text.FtlBbtMemInit,"ax",%progbits
+.L514:
+	.word	.LANCHOR43
+	.word	.LANCHOR87
+	.word	.LANCHOR88
+	.word	.LANCHOR89
+	.word	-1431655765
+	.word	.LANCHOR84
+	.word	.LANCHOR90
+	.size	insert_data_list, .-insert_data_list
+	.section	.text.INSERT_DATA_LIST,"ax",%progbits
 	.align	1
-	.global	FtlBbtMemInit
+	.global	INSERT_DATA_LIST
 	.thumb
 	.thumb_func
-	.type	FtlBbtMemInit, %function
-FtlBbtMemInit:
+	.type	INSERT_DATA_LIST, %function
+INSERT_DATA_LIST:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r0, .L651
-	movw	r3, #65535
-	movs	r1, #255
-	movs	r2, #16
-	strh	r3, [r0, #0]	@ movhi
-	movs	r3, #0
-	strh	r3, [r0, #6]	@ movhi
-	adds	r0, r0, #12
-	b	memset
-.L652:
+	push	{r3, lr}
+	bl	insert_data_list
+	ldr	r2, .L518
+	ldrh	r3, [r2, #0]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	strh	r3, [r2, #0]	@ movhi
+	ldr	r2, .L518+4
+	ldrh	r2, [r2, #0]
+	cmp	r2, r3
+	bcs	.L516
+	ldr	r1, .L518+8
+	movs	r2, #205
+	ldr	r0, .L518+12
+	bl	printf
+	ldr	r0, .L518+16
+	ldr	r1, .L518+20
+	pop	{r3, lr}
+	b	printf
+.L516:
+	pop	{r3, pc}
+.L519:
 	.align	2
-.L651:
-	.word	.LANCHOR90
-	.size	FtlBbtMemInit, .-FtlBbtMemInit
-	.section	.text.V2P_block,"ax",%progbits
+.L518:
+	.word	.LANCHOR91
+	.word	.LANCHOR43
+	.word	.LANCHOR92
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
+	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
+	.section	.text.insert_free_list,"ax",%progbits
 	.align	1
-	.global	V2P_block
+	.global	insert_free_list
 	.thumb
 	.thumb_func
-	.type	V2P_block, %function
-V2P_block:
+	.type	insert_free_list, %function
+insert_free_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	mov	r7, r1
-	ldr	r3, .L654
-	mov	r6, r0
-	ldrh	r4, [r3, #0]
-	muls	r7, r4, r7
-	mov	r1, r4
-	bl	__aeabi_uidiv
-	ldr	r3, .L654+4
-	mov	r1, r4
-	ldrh	r5, [r3, #0]
-	mla	r5, r0, r5, r7
-	mov	r0, r6
-	bl	__aeabi_uidivmod
-	adds	r1, r5, r1
-	uxth	r0, r1
-	pop	{r3, r4, r5, r6, r7, pc}
-.L655:
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	movw	r8, #65535
+	cmp	r0, r8
+	beq	.L521
+	ldr	r3, .L528
+	mov	fp, #6
+	mul	r6, fp, r0
+	ldr	r2, [r3, #0]
+	ldr	r3, .L528+4
+	adds	r1, r2, r6
+	ldr	r4, [r3, #0]
+	strh	r8, [r1, #2]	@ movhi
+	strh	r8, [r2, r6]	@ movhi
+	cbz	r4, .L527
+.L522:
+	ldr	r3, .L528+8
+	subs	r5, r4, r2
+	asrs	r5, r5, #1
+	ldr	ip, [r3, #0]
+	ldr	r3, .L528+12
+	muls	r5, r3, r5
+	mov	r3, r4
+	uxth	r5, r5
+	ldrh	sl, [ip, r0, lsl #1]
+.L525:
+	ldrh	r7, [ip, r5, lsl #1]
+	cmp	r7, sl
+	bcs	.L523
+	ldrh	r7, [r3, #0]
+	cmp	r7, r8
+	bne	.L524
+	strh	r5, [r1, #2]	@ movhi
+	strh	r0, [r3, #0]	@ movhi
+	b	.L521
+.L524:
+	mla	r3, fp, r7, r2
+	mov	r5, r7
+	b	.L525
+.L523:
+	ldrh	r7, [r3, #2]
+	cmp	r3, r4
+	strh	r5, [r2, r6]	@ movhi
+	strh	r7, [r1, #2]	@ movhi
+	bne	.L526
+	strh	r0, [r3, #2]	@ movhi
+	ldr	r3, .L528+4
+.L527:
+	str	r1, [r3, #0]
+	b	.L521
+.L526:
+	ldrh	r1, [r3, #2]
+	movs	r4, #6
+	strh	r0, [r3, #2]	@ movhi
+	muls	r1, r4, r1
+	strh	r0, [r2, r1]	@ movhi
+.L521:
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L529:
 	.align	2
-.L654:
-	.word	.LANCHOR61
-	.word	.LANCHOR66
-	.size	V2P_block, .-V2P_block
-	.section	.text.P2V_plane,"ax",%progbits
+.L528:
+	.word	.LANCHOR87
+	.word	.LANCHOR93
+	.word	.LANCHOR84
+	.word	-1431655765
+	.size	insert_free_list, .-insert_free_list
+	.section	.text.INSERT_FREE_LIST,"ax",%progbits
 	.align	1
-	.global	P2V_plane
+	.global	INSERT_FREE_LIST
 	.thumb
 	.thumb_func
-	.type	P2V_plane, %function
-P2V_plane:
+	.type	INSERT_FREE_LIST, %function
+INSERT_FREE_LIST:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L657
-	push	{r4, r5, r6, lr}
-	mov	r6, r0
-	ldrh	r4, [r3, #0]
-	ldr	r3, .L657+4
-	ldrh	r1, [r3, #0]
-	bl	__aeabi_uidiv
-	mov	r1, r4
-	mul	r5, r0, r4
-	mov	r0, r6
-	bl	__aeabi_uidivmod
-	adds	r1, r5, r1
-	uxth	r0, r1
-	pop	{r4, r5, r6, pc}
-.L658:
+	push	{r3, lr}
+	bl	insert_free_list
+	ldr	r2, .L532
+	ldrh	r3, [r2, #0]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	strh	r3, [r2, #0]	@ movhi
+	ldr	r2, .L532+4
+	ldrh	r2, [r2, #0]
+	cmp	r2, r3
+	bcs	.L530
+	ldr	r1, .L532+8
+	movs	r2, #198
+	ldr	r0, .L532+12
+	bl	printf
+	ldr	r0, .L532+16
+	ldr	r1, .L532+20
+	pop	{r3, lr}
+	b	printf
+.L530:
+	pop	{r3, pc}
+.L533:
 	.align	2
-.L657:
-	.word	.LANCHOR61
-	.word	.LANCHOR66
-	.size	P2V_plane, .-P2V_plane
-	.section	.text.P2V_block_in_plane,"ax",%progbits
+.L532:
+	.word	.LANCHOR94
+	.word	.LANCHOR43
+	.word	.LANCHOR95
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
+	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
+	.section	.text.List_remove_node,"ax",%progbits
 	.align	1
-	.global	P2V_block_in_plane
+	.global	List_remove_node
 	.thumb
 	.thumb_func
-	.type	P2V_block_in_plane, %function
-P2V_block_in_plane:
+	.type	List_remove_node, %function
+List_remove_node:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	ldr	r3, .L660
-	ldrh	r1, [r3, #0]
-	bl	__aeabi_uidivmod
-	ldr	r3, .L660+4
-	uxth	r0, r1
-	ldrh	r1, [r3, #0]
-	bl	__aeabi_uidiv
-	uxth	r0, r0
-	pop	{r3, pc}
-.L661:
+	push	{r3, r4, r5, r6, r7, lr}
+	movs	r6, #6
+	muls	r6, r1, r6
+	ldr	r3, .L540
+	mov	r5, r0
+	ldr	r7, [r3, #0]
+	movw	r3, #65535
+	adds	r4, r7, r6
+	ldrh	r2, [r4, #2]
+	cmp	r2, r3
+	bne	.L535
+	ldr	r3, [r0, #0]
+	cmp	r4, r3
+	beq	.L535
+	ldr	r1, .L540+4
+	movw	r2, #363
+	ldr	r0, .L540+8
+	bl	printf
+	ldr	r0, .L540+12
+	ldr	r1, .L540+16
+	bl	printf
+.L535:
+	ldr	r3, [r5, #0]
+	movw	r2, #65535
+	cmp	r4, r3
+	ldrh	r3, [r7, r6]
+	bne	.L536
+	cmp	r3, r2
+	bne	.L537
+	movs	r3, #0
+	str	r3, [r5, #0]
+	b	.L538
+.L537:
+	ldr	r1, .L540
+	movs	r0, #6
+	ldr	r1, [r1, #0]
+	mla	r3, r0, r3, r1
+	str	r3, [r5, #0]
+	strh	r2, [r3, #2]	@ movhi
+	b	.L538
+.L536:
+	cmp	r3, r2
+	ldrh	r2, [r4, #2]
+	bne	.L539
+	cmp	r2, r3
+	beq	.L538
+	ldr	r1, .L540
+	movs	r0, #6
+	muls	r2, r0, r2
+	ldr	r1, [r1, #0]
+	strh	r3, [r1, r2]	@ movhi
+	b	.L538
+.L539:
+	ldr	r1, .L540
+	movs	r0, #6
+	ldr	r1, [r1, #0]
+	mla	r5, r0, r3, r1
+	strh	r2, [r5, #2]	@ movhi
+	ldrh	r2, [r4, #2]
+	muls	r0, r2, r0
+	strh	r3, [r1, r0]	@ movhi
+.L538:
+	movw	r3, #65535
+	movs	r0, #0
+	strh	r3, [r7, r6]	@ movhi
+	strh	r3, [r4, #2]	@ movhi
+	pop	{r3, r4, r5, r6, r7, pc}
+.L541:
 	.align	2
-.L660:
-	.word	.LANCHOR66
-	.word	.LANCHOR61
-	.size	P2V_block_in_plane, .-P2V_block_in_plane
-	.section	.text.ftl_cmp_data_ver,"ax",%progbits
+.L540:
+	.word	.LANCHOR87
+	.word	.LANCHOR96
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
+	.size	List_remove_node, .-List_remove_node
+	.section	.text.List_pop_index_node,"ax",%progbits
 	.align	1
-	.global	ftl_cmp_data_ver
+	.global	List_pop_index_node
 	.thumb
 	.thumb_func
-	.type	ftl_cmp_data_ver, %function
-ftl_cmp_data_ver:
+	.type	List_pop_index_node, %function
+List_pop_index_node:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	cmp	r0, r1
-	bls	.L663
-	subs	r0, r0, r1
-	cmp	r0, #-2147483648
-	ite	hi
-	movhi	r0, #0
-	movls	r0, #1
-	bx	lr
-.L663:
-	subs	r0, r1, r0
-	cmp	r0, #-2147483648
-	ite	ls
-	movls	r0, #0
-	movhi	r0, #1
-	bx	lr
-	.size	ftl_cmp_data_ver, .-ftl_cmp_data_ver
-	.section	.text.FtlFreeSysBlkQueueInit,"ax",%progbits
+	ldr	r3, [r0, #0]
+	push	{r4, r5, r6, lr}
+	cbz	r3, .L547
+	ldr	r2, .L548
+	movw	r6, #65535
+	movs	r5, #6
+	ldr	r4, [r2, #0]
+	b	.L544
+.L546:
+	mla	r3, r5, r2, r4
+	subs	r1, r1, #1
+	uxth	r1, r1
+.L544:
+	cbz	r1, .L545
+	ldrh	r2, [r3, #0]
+	cmp	r2, r6
+	bne	.L546
+.L545:
+	subs	r4, r3, r4
+	ldr	r3, .L548+4
+	asrs	r4, r4, #1
+	muls	r4, r3, r4
+	uxth	r4, r4
+	mov	r1, r4
+	bl	List_remove_node
+	mov	r0, r4
+	pop	{r4, r5, r6, pc}
+.L547:
+	movw	r0, #65535
+	pop	{r4, r5, r6, pc}
+.L549:
+	.align	2
+.L548:
+	.word	.LANCHOR87
+	.word	-1431655765
+	.size	List_pop_index_node, .-List_pop_index_node
+	.section	.text.List_get_gc_head_node,"ax",%progbits
 	.align	1
-	.global	FtlFreeSysBlkQueueInit
+	.global	List_get_gc_head_node
 	.thumb
 	.thumb_func
-	.type	FtlFreeSysBlkQueueInit, %function
-FtlFreeSysBlkQueueInit:
+	.type	List_get_gc_head_node, %function
+List_get_gc_head_node:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L666
-	mov	r2, #2048
+	ldr	r3, .L556
 	push	{r4, lr}
-	movs	r4, #0
-	mov	r1, r4
-	strh	r4, [r3, #2]	@ movhi
-	strh	r4, [r3, #4]	@ movhi
-	strh	r4, [r3, #6]	@ movhi
-	strh	r0, [r3], #8	@ movhi
-	mov	r0, r3
-	bl	memset
-	mov	r0, r4
+	ldr	r3, [r3, #0]
+	cbz	r3, .L555
+	ldr	r2, .L556+4
+	movw	r1, #65535
+	movs	r4, #6
+	ldr	r2, [r2, #0]
+	b	.L552
+.L554:
+	mla	r3, r4, r3, r2
+	subs	r0, r0, #1
+	uxth	r0, r0
+.L552:
+	cbz	r0, .L553
+	ldrh	r3, [r3, #0]
+	cmp	r3, r1
+	bne	.L554
+	mov	r0, r1
 	pop	{r4, pc}
-.L667:
+.L553:
+	subs	r3, r3, r2
+	ldr	r0, .L556+8
+	asrs	r3, r3, #1
+	muls	r0, r3, r0
+	uxth	r0, r0
+	pop	{r4, pc}
+.L555:
+	movw	r0, #65535
+	pop	{r4, pc}
+.L557:
 	.align	2
-.L666:
-	.word	.LANCHOR93
-	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
-	.section	.text.FtlFreeSysBlkQueueEmpty,"ax",%progbits
+.L556:
+	.word	.LANCHOR88
+	.word	.LANCHOR87
+	.word	-1431655765
+	.size	List_get_gc_head_node, .-List_get_gc_head_node
+	.section	.text.List_update_data_list,"ax",%progbits
 	.align	1
-	.global	FtlFreeSysBlkQueueEmpty
+	.global	List_update_data_list
 	.thumb
 	.thumb_func
-	.type	FtlFreeSysBlkQueueEmpty, %function
-FtlFreeSysBlkQueueEmpty:
+	.type	List_update_data_list, %function
+List_update_data_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L669
-	ldrh	r0, [r3, #6]
-	rsbs	r0, r0, #1
-	it	cc
-	movcc	r0, #0
-	bx	lr
-.L670:
+	ldr	r3, .L567
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r4, r0
+	ldrh	r3, [r3, #0]
+	cmp	r3, r0
+	beq	.L559
+	ldr	r3, .L567+4
+	ldrh	r3, [r3, #0]
+	cmp	r3, r0
+	beq	.L559
+	ldr	r3, .L567+8
+	ldrh	r3, [r3, #0]
+	cmp	r3, r0
+	beq	.L559
+	ldr	r3, .L567+12
+	movs	r7, #6
+	muls	r7, r0, r7
+	ldr	r8, [r3, #0]
+	ldr	r3, .L567+16
+	add	r5, r8, r7
+	ldr	r3, [r3, #0]
+	cmp	r5, r3
+	beq	.L559
+	ldr	r3, .L567+20
+	movw	r2, #65535
+	ldrh	r6, [r5, #4]
+	ldr	r3, [r3, #0]
+	ldrh	r3, [r3, r0, lsl #1]
+	muls	r6, r3, r6
+	ldrh	r3, [r5, #2]
+	it	eq
+	moveq	r6, #-1
+	cmp	r3, r2
+	bne	.L561
+	ldrh	r2, [r8, r7]
+	cmp	r2, r3
+	bne	.L561
+	ldr	r1, .L567+24
+	movw	r2, #481
+	ldr	r0, .L567+28
+	bl	printf
+	ldr	r0, .L567+32
+	ldr	r1, .L567+36
+	bl	printf
+.L561:
+	ldrh	r3, [r5, #2]
+	movw	r2, #65535
+	cmp	r3, r2
+	bne	.L562
+	ldrh	r2, [r8, r7]
+	cmp	r2, r3
+	beq	.L559
+.L562:
+	ldr	r2, .L567+12
+	movs	r1, #6
+	ldr	r2, [r2, #0]
+	mla	r3, r1, r3, r2
+	ldr	r1, .L567+40
+	subs	r2, r3, r2
+	asrs	r2, r2, #1
+	muls	r2, r1, r2
+	ldr	r1, .L567+20
+	uxth	r2, r2
+	ldrh	r3, [r3, #4]
+	ldr	r1, [r1, #0]
+	ldrh	r2, [r1, r2, lsl #1]
+	muls	r3, r2, r3
+	it	eq
+	moveq	r3, #-1
+	cmp	r6, r3
+	bcs	.L559
+	ldr	r5, .L567+44
+	mov	r1, r4
+	ldr	r0, .L567+16
+	bl	List_remove_node
+	ldrh	r3, [r5, #0]
+	cbnz	r3, .L564
+	ldr	r1, .L567+24
+	mov	r2, #492
+	ldr	r0, .L567+28
+	bl	printf
+	ldr	r0, .L567+32
+	ldr	r1, .L567+36
+	bl	printf
+.L564:
+	ldrh	r3, [r5, #0]
+	mov	r0, r4
+	subs	r3, r3, #1
+	strh	r3, [r5, #0]	@ movhi
+	bl	INSERT_DATA_LIST
+.L559:
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, pc}
+.L568:
 	.align	2
-.L669:
-	.word	.LANCHOR93
-	.size	FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty
-	.section	.text.FtlFreeSysBlkQueueFull,"ax",%progbits
+.L567:
+	.word	.LANCHOR97
+	.word	.LANCHOR98
+	.word	.LANCHOR99
+	.word	.LANCHOR87
+	.word	.LANCHOR88
+	.word	.LANCHOR89
+	.word	.LANCHOR100
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
+	.word	-1431655765
+	.word	.LANCHOR91
+	.size	List_update_data_list, .-List_update_data_list
+	.section	.text.ftl_free_no_use_map_blk,"ax",%progbits
 	.align	1
-	.global	FtlFreeSysBlkQueueFull
+	.global	ftl_free_no_use_map_blk
 	.thumb
 	.thumb_func
-	.type	FtlFreeSysBlkQueueFull, %function
-FtlFreeSysBlkQueueFull:
-	@ args = 0, pretend = 0, frame = 0
+	.type	ftl_free_no_use_map_blk, %function
+ftl_free_no_use_map_blk:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L672
-	ldrh	r0, [r3, #6]
-	sub	r2, r0, #1024
-	rsbs	r0, r2, #0
-	adc	r0, r0, r2
-	bx	lr
-.L673:
+	ldrh	r2, [r0, #10]
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r4, r0
+	ldr	r5, [r0, #20]
+	lsls	r2, r2, #1
+	ldr	r6, [r0, #12]
+	movs	r1, #0
+	ldr	r7, [r0, #24]
+	mov	r0, r5
+	bl	memset
+	movs	r2, #0
+	b	.L570
+.L574:
+	ldr	r1, [r7, r2, lsl #2]
+	movs	r3, #0
+	ubfx	r1, r1, #10, #16
+	b	.L571
+.L573:
+	ldrh	r0, [r6, r3, lsl #1]
+	cmp	r0, r1
+	bne	.L572
+	ldrh	r0, [r5, r3, lsl #1]
+	adds	r0, r0, #1
+	strh	r0, [r5, r3, lsl #1]	@ movhi
+.L572:
+	adds	r3, r3, #1
+	uxth	r3, r3
+.L571:
+	ldrh	r0, [r4, #10]
+	cmp	r0, r3
+	bhi	.L573
+	adds	r2, r2, #1
+	uxth	r2, r2
+.L570:
+	ldrh	r3, [r4, #6]
+	cmp	r3, r2
+	bhi	.L574
+	mov	sl, #0
+	ldrh	r3, [r5, #0]
+	mov	r7, sl
+	ldr	r2, .L580
+	b	.L575
+.L579:
+	ldrh	r1, [r4, #0]
+	cmp	r1, r7
+	bne	.L576
+	ldrh	r1, [r2, #0]
+	ldrh	r0, [r4, #2]
+	cmp	r0, r1
+	it	cc
+	strhcc	r1, [r5, r7, lsl #1]	@ movhi
+.L576:
+	ldrh	r8, [r5, r7, lsl #1]
+	lsl	fp, r7, #1
+	cmp	r3, r8
+	itt	hi
+	movhi	sl, r7
+	movhi	r3, r8
+	cmp	r8, #0
+	bne	.L578
+	ldrh	r0, [r6, fp]
+	cbz	r0, .L578
+	movs	r1, #1
+	stmia	sp, {r2, r3}
+	bl	FtlFreeSysBlkQueueIn
+	ldmia	sp, {r2, r3}
+	strh	r8, [r6, fp]	@ movhi
+	ldrh	r1, [r4, #8]
+	subs	r1, r1, #1
+	strh	r1, [r4, #8]	@ movhi
+.L578:
+	adds	r7, r7, #1
+	uxth	r7, r7
+.L575:
+	ldrh	r1, [r4, #10]
+	cmp	r1, r7
+	bhi	.L579
+	mov	r0, sl
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L581:
 	.align	2
-.L672:
-	.word	.LANCHOR93
-	.size	FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull
-	.section	.text.FtlFreeSysBlkQueueIn,"ax",%progbits
+.L580:
+	.word	.LANCHOR57
+	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
+	.section	.text.ftl_map_blk_alloc_new_blk,"ax",%progbits
 	.align	1
-	.global	FtlFreeSysBlkQueueIn
+	.global	ftl_map_blk_alloc_new_blk
 	.thumb
 	.thumb_func
-	.type	FtlFreeSysBlkQueueIn, %function
-FtlFreeSysBlkQueueIn:
+	.type	ftl_map_blk_alloc_new_blk, %function
+ftl_map_blk_alloc_new_blk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
+	push	{r3, r4, r5, r6, r7, lr}
 	mov	r4, r0
-	ldr	r3, .L677
-	ldrh	r3, [r3, #6]
-	cmp	r3, #1024
-	beq	.L674
-	cbz	r1, .L676
-	ldr	r3, .L677+4
-	ldr	r3, [r3, #0]
-	cbnz	r3, .L676
-	bl	P2V_block_in_plane
-	ldr	r3, .L677+8
-	movs	r1, #1
-	mov	r2, r1
-	mov	r5, r0
-	ldr	r0, [r3, #0]
-	lsls	r3, r4, #10
-	str	r3, [r0, #4]
-	bl	FlashEraseBlocks
-	ldr	r3, .L677+12
-	ldr	r3, [r3, #0]
-	ldrh	r2, [r3, r5, lsl #1]
-	adds	r2, r2, #1
-	strh	r2, [r3, r5, lsl #1]	@ movhi
-	ldr	r3, .L677+16
-	ldr	r2, [r3, #0]
-	adds	r2, r2, #1
-	str	r2, [r3, #0]
-.L676:
-	ldr	r3, .L677
-	ldrh	r2, [r3, #6]
-	adds	r2, r2, #1
-	strh	r2, [r3, #6]	@ movhi
-	ldrh	r2, [r3, #4]
-	adds	r1, r2, #4
-	adds	r2, r2, #1
-	bic	r2, r2, #64512
-	strh	r2, [r3, #4]	@ movhi
-	strh	r4, [r3, r1, lsl #1]	@ movhi
-.L674:
-	pop	{r3, r4, r5, pc}
-.L678:
+	ldrh	r2, [r0, #10]
+	movs	r5, #0
+	ldr	r3, [r0, #12]
+	b	.L583
+.L586:
+	mov	r7, r3
+	adds	r3, r3, #2
+	ldrh	r6, [r7, #0]
+	cbnz	r6, .L584
+	bl	FtlFreeSysBlkQueueOut
+	strh	r0, [r7, #0]	@ movhi
+	cbz	r0, .L585
+	ldr	r3, [r4, #28]
+	strh	r6, [r4, #2]	@ movhi
+	adds	r3, r3, #1
+	str	r3, [r4, #28]
+	ldrh	r3, [r4, #8]
+	strh	r5, [r4, #0]	@ movhi
+	adds	r3, r3, #1
+	strh	r3, [r4, #8]	@ movhi
+	b	.L585
+.L584:
+	adds	r5, r5, #1
+	uxth	r5, r5
+.L583:
+	cmp	r5, r2
+	bne	.L586
+.L585:
+	ldrh	r3, [r4, #10]
+	cmp	r3, r5
+	bhi	.L587
+	ldr	r1, .L588
+	movw	r2, #594
+	ldr	r0, .L588+4
+	bl	printf
+	ldr	r0, .L588+8
+	ldr	r1, .L588+12
+	bl	printf
+.L587:
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, pc}
+.L589:
 	.align	2
-.L677:
-	.word	.LANCHOR93
-	.word	.LANCHOR94
-	.word	.LANCHOR95
-	.word	.LANCHOR96
-	.word	.LANCHOR97
-	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
-	.section	.text.FtlFreeSysBLkSort,"ax",%progbits
+.L588:
+	.word	.LANCHOR101
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
+	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
+	.section	.text.select_l2p_ram_region,"ax",%progbits
 	.align	1
-	.global	FtlFreeSysBLkSort
+	.global	select_l2p_ram_region
 	.thumb
 	.thumb_func
-	.type	FtlFreeSysBLkSort, %function
-FtlFreeSysBLkSort:
+	.type	select_l2p_ram_region, %function
+select_l2p_ram_region:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, r8, sl, lr}
-	movs	r4, #0
-	ldr	r5, .L689
-	ldr	r7, .L689+4
-	ldr	r6, .L689+8
-	b	.L680
-.L681:
-	add	r8, r4, r8
-	add	r8, r8, #4
-	ldrh	r0, [r5, r8, lsl #1]
-	bl	P2V_block_in_plane
-	ldr	r2, [r6, #0]
-	ldr	r3, [r7, #0]
-	ldrh	r2, [r2, r0, lsl #1]
-	str	r2, [r3, r4, lsl #2]
+	ldr	r2, .L602
+	movw	r1, #65535
+	push	{r3, r4, r5, r6, r7, lr}
+	ldr	r3, .L602+4
+	ldr	r0, [r2, #0]
+	movs	r2, #0
+	mov	r4, r2
+	ldrh	r3, [r3, #0]
+	b	.L591
+.L593:
+	adds	r2, r2, #12
+	adds	r5, r0, r2
+	ldrh	r5, [r5, #-12]
+	cmp	r5, r1
+	beq	.L592
 	adds	r4, r4, #1
 	uxth	r4, r4
-.L680:
-	ldrh	ip, [r5, #6]
-	ldrh	r8, [r5, #2]
-	cmp	r4, ip
-	bcc	.L681
-	ldr	r3, .L689+4
-	add	r6, ip, #-1
-	ldr	r4, .L689
-	ldr	r1, [r3, #0]
-	movs	r3, #0
-	b	.L682
-.L687:
-	adds	r5, r3, #1
-	mov	r2, r3
-	uxth	r5, r5
-	mov	r0, r5
-	b	.L683
-.L685:
-	ldr	r7, [r1, r0, lsl #2]
-	ldr	sl, [r1, r2, lsl #2]
-	cmp	sl, r7
-	it	hi
-	movhi	r2, r0
-	adds	r0, r0, #1
-	uxth	r0, r0
-.L683:
-	cmp	r0, ip
-	bcc	.L685
-	cmp	r3, r2
-	beq	.L686
-	ldr	r0, [r1, r2, lsl #2]
-	ldr	r7, [r1, r3, lsl #2]
-	str	r7, [r1, r2, lsl #2]
-	add	r2, r8, r2
-	str	r0, [r1, r3, lsl #2]
-	add	r3, r8, r3
-	adds	r2, r2, #4
-	adds	r3, r3, #4
-	ldrh	r0, [r4, r2, lsl #1]
-	ldrh	r7, [r4, r3, lsl #1]
-	strh	r7, [r4, r2, lsl #1]	@ movhi
-	strh	r0, [r4, r3, lsl #1]	@ movhi
-.L686:
-	mov	r3, r5
-.L682:
-	cmp	r3, r6
-	blt	.L687
-	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
-.L690:
+.L591:
+	cmp	r4, r3
+	bne	.L593
+	movs	r1, #0
+	mov	r4, r3
+	mov	r6, #-2147483648
+	mov	r2, r1
+	b	.L594
+.L596:
+	adds	r5, r0, r1
+	ldr	r5, [r5, #4]
+	cmp	r5, #0
+	blt	.L595
+	cmp	r5, r6
+	itt	cc
+	movcc	r6, r5
+	movcc	r4, r2
+.L595:
+	adds	r2, r2, #1
+	adds	r1, r1, #12
+	uxth	r2, r2
+.L594:
+	cmp	r2, r3
+	bne	.L596
+	cmp	r4, r3
+	bcc	.L592
+	ldr	r2, .L602+8
+	movs	r1, #0
+	mov	r4, r3
+	mov	r5, #-1
+	ldrh	r7, [r2, #0]
+	mov	r2, r1
+	b	.L597
+.L599:
+	adds	r6, r0, r1
+	ldr	r6, [r6, #4]
+	cmp	r6, r5
+	bcs	.L598
+	ldrh	ip, [r0, r1]
+	cmp	ip, r7
+	it	ne
+	movne	r5, r6
+	it	ne
+	movne	r4, r2
+.L598:
+	adds	r2, r2, #1
+	adds	r1, r1, #12
+	uxth	r2, r2
+.L597:
+	cmp	r2, r3
+	bne	.L599
+	cmp	r4, r2
+	bcc	.L592
+	ldr	r1, .L602+12
+	movw	r2, #826
+	ldr	r0, .L602+16
+	bl	printf
+	ldr	r0, .L602+20
+	ldr	r1, .L602+24
+	bl	printf
+.L592:
+	mov	r0, r4
+	pop	{r3, r4, r5, r6, r7, pc}
+.L603:
 	.align	2
-.L689:
-	.word	.LANCHOR93
-	.word	.LANCHOR98
-	.word	.LANCHOR96
-	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
-	.section	.text.remove_from_free_sys_Queue,"ax",%progbits
+.L602:
+	.word	.LANCHOR102
+	.word	.LANCHOR71
+	.word	.LANCHOR103
+	.word	.LANCHOR104
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
+	.size	select_l2p_ram_region, .-select_l2p_ram_region
+	.section	.text.FtlUpdateVaildLpn,"ax",%progbits
 	.align	1
-	.global	remove_from_free_sys_Queue
+	.global	FtlUpdateVaildLpn
 	.thumb
 	.thumb_func
-	.type	remove_from_free_sys_Queue, %function
-remove_from_free_sys_Queue:
+	.type	FtlUpdateVaildLpn, %function
+FtlUpdateVaildLpn:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L697
-	mov	r1, r0
-	push	{r4, r5, r6, lr}
-	ldrh	r0, [r3, #6]
-	cbz	r0, .L692
-	ldrh	r2, [r3, #2]
-	movs	r5, #0
-	b	.L693
-.L695:
-	adds	r6, r5, r2
-	ldr	r4, .L697
-	lsls	r6, r6, #22
-	add	r6, r3, r6, lsr #21
-	ldrh	r6, [r6, #8]
-	cmp	r6, r1
-	bne	.L694
-	ldr	r0, .L697+4
-	bl	printf
-	ldrh	r3, [r4, #2]
-	movs	r0, #1
-	adds	r5, r5, r3
-	adds	r2, r3, #4
-	adds	r3, r3, #1
-	lsls	r5, r5, #22
-	ldrh	r2, [r4, r2, lsl #1]
-	bic	r3, r3, #64512
-	strh	r3, [r4, #2]	@ movhi
-	add	r5, r4, r5, lsr #21
-	ldrh	r3, [r4, #6]
-	strh	r2, [r5, #8]	@ movhi
-	subs	r3, r3, #1
-	strh	r3, [r4, #6]	@ movhi
-	pop	{r4, r5, r6, pc}
-.L694:
-	adds	r5, r5, #1
-.L693:
-	cmp	r5, r0
-	bcc	.L695
-	movs	r0, #0
-.L692:
-	pop	{r4, r5, r6, pc}
-.L698:
+	ldr	r3, .L610
+	push	{r4, r5, lr}
+	ldrh	r2, [r3, #0]
+	adds	r1, r2, #1
+	cmp	r2, #4
+	strh	r1, [r3, #0]	@ movhi
+	mov	r2, r3
+	bhi	.L605
+	cbz	r0, .L604
+.L605:
+	movs	r3, #0
+	strh	r3, [r2, #0]	@ movhi
+	ldr	r2, .L610+4
+	movw	r4, #65535
+	ldrh	r5, [r2, #0]
+	ldr	r2, .L610+8
+	ldr	r1, [r2, #0]
+	mov	r2, r3
+	b	.L607
+.L609:
+	ldrh	r0, [r1], #2
+	cmp	r0, r4
+	it	ne
+	addne	r3, r3, r0
+	adds	r2, r2, #1
+	uxth	r2, r2
+.L607:
+	cmp	r2, r5
+	bne	.L609
+	ldr	r2, .L610+12
+	str	r3, [r2, #0]
+.L604:
+	pop	{r4, r5, pc}
+.L611:
 	.align	2
-.L697:
-	.word	.LANCHOR93
-	.word	.LC12
-	.size	remove_from_free_sys_Queue, .-remove_from_free_sys_Queue
-	.section	.text.FtlFreeSysBlkQueueOut,"ax",%progbits
+.L610:
+	.word	.LANCHOR105
+	.word	.LANCHOR43
+	.word	.LANCHOR89
+	.word	.LANCHOR106
+	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
+	.section	.text.ftl_set_blk_mode,"ax",%progbits
 	.align	1
-	.global	FtlFreeSysBlkQueueOut
+	.global	ftl_set_blk_mode
 	.thumb
 	.thumb_func
-	.type	FtlFreeSysBlkQueueOut, %function
-FtlFreeSysBlkQueueOut:
+	.type	ftl_set_blk_mode, %function
+ftl_set_blk_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	ldr	r3, .L703
-	ldrh	r1, [r3, #6]
-	cmp	r1, #0
-	beq	.L702
-	ldrh	r2, [r3, #2]
-	subs	r1, r1, #1
-	strh	r1, [r3, #6]	@ movhi
-	adds	r0, r2, #4
-	adds	r2, r2, #1
-	bic	r2, r2, #64512
-	strh	r2, [r3, #2]	@ movhi
-	ldrh	r4, [r3, r0, lsl #1]
-	ldr	r3, .L703+4
-	ldr	r7, [r3, #0]
-	cbnz	r7, .L700
-	mov	r0, r4
-	ldr	r6, .L703+8
-	bl	P2V_block_in_plane
-	lsls	r3, r4, #10
-	mov	r5, r0
-	ldr	r0, [r6, #0]
-	str	r3, [r0, #4]
-	ldr	r3, .L703+12
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L701
-	mov	r1, r7
-	movs	r2, #1
-	bl	FlashEraseBlocks
-.L701:
+	@ link register save eliminated.
+	ldr	r3, .L616
+	lsrs	r2, r0, #5
+	and	r0, r0, #31
+	uxth	r2, r2
+	ldr	r3, [r3, #0]
+	cbz	r1, .L613
 	movs	r1, #1
-	ldr	r0, [r6, #0]
-	mov	r2, r1
-	bl	FlashEraseBlocks
-	ldr	r3, .L703+16
+	lsl	r0, r1, r0
+	ldr	r1, [r3, r2, lsl #2]
+	orrs	r0, r0, r1
+	b	.L615
+.L613:
+	movs	r1, #1
+	lsl	r0, r1, r0
+	ldr	r1, [r3, r2, lsl #2]
+	bic	r0, r1, r0
+.L615:
+	str	r0, [r3, r2, lsl #2]
+	bx	lr
+.L617:
+	.align	2
+.L616:
+	.word	.LANCHOR107
+	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
+	.section	.text.ftl_get_blk_mode,"ax",%progbits
+	.align	1
+	.global	ftl_get_blk_mode
+	.thumb
+	.thumb_func
+	.type	ftl_get_blk_mode, %function
+ftl_get_blk_mode:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L619
+	lsrs	r2, r0, #5
+	and	r0, r0, #31
 	ldr	r3, [r3, #0]
-	ldrh	r2, [r3, r5, lsl #1]
-	adds	r2, r2, #1
-	strh	r2, [r3, r5, lsl #1]	@ movhi
-	ldr	r3, .L703+20
-	ldr	r2, [r3, #0]
-	adds	r2, r2, #1
-	str	r2, [r3, #0]
-	b	.L700
-.L702:
-	movw	r4, #65535
-.L700:
-	mov	r0, r4
-	pop	{r3, r4, r5, r6, r7, pc}
-.L704:
+	ldr	r3, [r3, r2, lsl #2]
+	lsr	r0, r3, r0
+	and	r0, r0, #1
+	bx	lr
+.L620:
 	.align	2
-.L703:
-	.word	.LANCHOR93
-	.word	.LANCHOR94
-	.word	.LANCHOR95
-	.word	.LANCHOR7
-	.word	.LANCHOR96
-	.word	.LANCHOR97
-	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
-	.section	.text.insert_data_list,"ax",%progbits
+.L619:
+	.word	.LANCHOR107
+	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
+	.section	.text.FtlL2PDataInit,"ax",%progbits
 	.align	1
-	.global	insert_data_list
+	.global	FtlL2PDataInit
 	.thumb
 	.thumb_func
-	.type	insert_data_list, %function
-insert_data_list:
-	@ args = 0, pretend = 0, frame = 24
+	.type	FtlL2PDataInit, %function
+FtlL2PDataInit:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L721
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	sub	sp, sp, #24
-	ldrh	fp, [r3, #0]
-	cmp	r0, fp
-	bcs	.L706
-	ldr	r3, .L721+4
-	movs	r6, #6
-	muls	r6, r0, r6
-	ldr	r1, [r3, #0]
-	movw	r3, #65535
-	adds	r2, r1, r6
-	strh	r3, [r1, r6]	@ movhi
-	strh	r3, [r2, #2]	@ movhi
-	ldr	r3, .L721+8
-	ldr	r5, [r3, #0]
-	cmp	r5, #0
-	beq	.L720
-.L707:
-	ldr	r3, .L721+12
-	ldrh	r4, [r2, #4]
-	ldr	ip, [r3, #0]
-	lsls	r3, r0, #1
-	ldrh	r7, [ip, r0, lsl #1]
-	cbz	r4, .L716
-	muls	r4, r7, r4
-	b	.L719
-.L716:
-	mov	r4, #-1
-.L719:
-	str	r4, [sp, #8]
-	subs	r4, r5, r1
-	ldr	r7, .L721+16
-	mov	sl, r2
-	asrs	r4, r4, #1
-	muls	r4, r7, r4
-	ldr	r7, .L721+20
-	uxth	r4, r4
-	str	ip, [sp, #4]
-	ldr	r7, [r7, #0]
-	adds	r3, r7, r3
-	str	r3, [sp, #20]
-	str	r7, [sp, #12]
-	mov	r3, r5
-	movs	r7, #0
-.L714:
-	adds	r7, r7, #1
-	uxth	r7, r7
-	cmp	r7, fp
-	bhi	.L706
-	cmp	r0, r4
-	beq	.L706
-	ldr	r2, [sp, #4]
-	lsl	r8, r4, #1
-	str	r8, [sp, #16]
-	ldrh	r8, [r2, r4, lsl #1]
-	ldrh	r2, [r3, #4]
-	cbz	r2, .L717
-	mul	r2, r2, r8
-	b	.L709
-.L717:
-	mov	r2, #-1
-.L709:
-	ldr	r8, [sp, #8]
-	cmp	r2, r8
-	bne	.L710
-	ldr	r2, [sp, #12]
-	ldr	ip, [sp, #16]
-	ldrh	r8, [r2, ip]
-	ldr	r2, [sp, #20]
-	ldrh	ip, [r2, #0]
-	cmp	r8, ip
-	bcc	.L712
-	b	.L718
-.L710:
-	bhi	.L718
-.L712:
-	ldrh	r2, [r3, #0]
-	movw	r8, #65535
-	cmp	r2, r8
-	bne	.L713
-	mov	r2, sl
-	strh	r0, [r3, #0]	@ movhi
-	ldr	r3, .L721+24
-	strh	r4, [r2, #2]	@ movhi
-	b	.L720
-.L713:
-	mov	ip, #6
-	mov	r4, r2
-	mla	r3, ip, r2, r1
-	b	.L714
-.L718:
-	strh	r4, [r1, r6]	@ movhi
-	mov	r2, sl
-	ldrh	r4, [r3, #2]
-	cmp	r3, r5
-	strh	r4, [r2, #2]	@ movhi
-	bne	.L715
-	strh	r0, [r3, #2]	@ movhi
-	ldr	r3, .L721+8
-.L720:
-	str	r2, [r3, #0]
-	b	.L706
-.L715:
-	ldrh	r2, [r3, #2]
-	movs	r4, #6
-	strh	r0, [r3, #2]	@ movhi
-	muls	r2, r4, r2
-	strh	r0, [r1, r2]	@ movhi
-.L706:
-	movs	r0, #0
-	add	sp, sp, #24
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L722:
+	ldr	r3, .L624
+	movs	r1, #0
+	push	{r4, r5, r6, r7, r8, lr}
+	ldr	r2, [r3, #0]
+	ldr	r3, .L624+4
+	ldr	r5, .L624+8
+	ldr	r4, .L624+12
+	lsls	r2, r2, #1
+	ldr	r6, .L624+16
+	ldr	r0, [r3, #0]
+	bl	memset
+	ldrh	r3, [r4, #0]
+	ldrh	r2, [r6, #0]
+	movs	r1, #255
+	muls	r2, r3, r2
+	ldr	r0, [r5, #0]
+	bl	memset
+	ldr	r3, .L624+20
+	ldrh	r7, [r6, #0]
+	ldr	ip, [r5, #0]
+	movw	r5, #65535
+	ldr	r2, [r3, #0]
+	movs	r3, #0
+	ldrh	r6, [r4, #0]
+	mov	r0, r3
+	mov	r4, r3
+	b	.L622
+.L623:
+	adds	r0, r0, #1
+	bic	r3, r3, #3
+	add	r3, ip, r3
+	str	r3, [r2, #-4]
+	uxth	r0, r0
+	mov	r3, r8
+	str	r4, [r2, #-8]
+	strh	r5, [r2, #-12]	@ movhi
+.L622:
+	adds	r2, r2, #12
+	cmp	r0, r7
+	add	r8, r3, r6
+	movw	r1, #65535
+	bne	.L623
+	ldr	r2, .L624
+	ldr	r3, .L624+24
+	ldr	r2, [r2, #0]
+	strh	r1, [r3, #2]	@ movhi
+	strh	r1, [r3, #0]	@ movhi
+	strh	r2, [r3, #10]	@ movhi
+	movw	r2, #61634
+	strh	r2, [r3, #4]	@ movhi
+	ldr	r2, .L624+28
+	strh	r1, [r3, #40]	@ movhi
+	ldrh	r2, [r2, #0]
+	strh	r2, [r3, #8]	@ movhi
+	ldr	r2, .L624+32
+	ldrh	r2, [r2, #0]
+	strh	r2, [r3, #6]	@ movhi
+	ldr	r2, .L624+36
+	ldr	r2, [r2, #0]
+	str	r2, [r3, #12]
+	ldr	r2, .L624+40
+	ldr	r2, [r2, #0]
+	str	r2, [r3, #16]
+	ldr	r2, .L624+4
+	ldr	r2, [r2, #0]
+	str	r2, [r3, #20]
+	ldr	r2, .L624+44
+	ldr	r2, [r2, #0]
+	str	r2, [r3, #24]
+	pop	{r4, r5, r6, r7, r8, pc}
+.L625:
 	.align	2
-.L721:
-	.word	.LANCHOR55
-	.word	.LANCHOR99
-	.word	.LANCHOR100
-	.word	.LANCHOR101
-	.word	-1431655765
-	.word	.LANCHOR96
+.L624:
+	.word	.LANCHOR68
+	.word	.LANCHOR108
+	.word	.LANCHOR109
+	.word	.LANCHOR61
+	.word	.LANCHOR71
 	.word	.LANCHOR102
-	.size	insert_data_list, .-insert_data_list
-	.section	.text.INSERT_DATA_LIST,"ax",%progbits
+	.word	.LANCHOR110
+	.word	.LANCHOR111
+	.word	.LANCHOR70
+	.word	.LANCHOR112
+	.word	.LANCHOR113
+	.word	.LANCHOR114
+	.size	FtlL2PDataInit, .-FtlL2PDataInit
+	.section	.text.ftl_sb_update_avl_pages,"ax",%progbits
 	.align	1
-	.global	INSERT_DATA_LIST
+	.global	ftl_sb_update_avl_pages
 	.thumb
 	.thumb_func
-	.type	INSERT_DATA_LIST, %function
-INSERT_DATA_LIST:
+	.type	ftl_sb_update_avl_pages, %function
+ftl_sb_update_avl_pages:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	bl	insert_data_list
-	ldr	r2, .L725
-	ldrh	r3, [r2, #0]
-	adds	r3, r3, #1
-	uxth	r3, r3
-	strh	r3, [r2, #0]	@ movhi
-	ldr	r2, .L725+4
-	ldrh	r2, [r2, #0]
+	movs	r3, #0
+	strh	r3, [r0, #4]	@ movhi
+	ldr	r3, .L633
+	push	{r4, r5, r6, r7, lr}
+	movw	r4, #65535
+	ldrh	r3, [r3, #0]
+	b	.L627
+.L629:
+	add	r5, r2, #8
+	ldrh	r5, [r0, r5, lsl #1]
+	cmp	r5, r4
+	beq	.L628
+	ldrh	r5, [r0, #4]
+	adds	r5, r5, #1
+	strh	r5, [r0, #4]	@ movhi
+.L628:
+	adds	r2, r2, #1
+	uxth	r2, r2
+.L627:
 	cmp	r2, r3
-	bcs	.L723
-	ldr	r1, .L725+8
-	movs	r2, #205
-	ldr	r0, .L725+12
-	bl	printf
-	ldr	r0, .L725+16
-	ldr	r1, .L725+20
-	pop	{r3, lr}
-	b	printf
-.L723:
-	pop	{r3, pc}
-.L726:
+	bcc	.L629
+	ldr	r2, .L633+4
+	mov	r4, r0
+	movw	r5, #65535
+	mvns	r1, r1
+	ldrh	r6, [r2, #0]
+	movs	r2, #0
+	b	.L630
+.L632:
+	ldrh	r7, [r4, #16]
+	cmp	r7, r5
+	beq	.L631
+	ldrh	r7, [r0, #4]
+	adds	r7, r6, r7
+	adds	r7, r7, r1
+	strh	r7, [r0, #4]	@ movhi
+.L631:
+	adds	r2, r2, #1
+	adds	r4, r4, #2
+	uxth	r2, r2
+.L630:
+	cmp	r2, r3
+	bne	.L632
+	pop	{r4, r5, r6, r7, pc}
+.L634:
 	.align	2
-.L725:
-	.word	.LANCHOR103
-	.word	.LANCHOR55
-	.word	.LANCHOR104
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
-	.section	.text.insert_free_list,"ax",%progbits
+.L633:
+	.word	.LANCHOR41
+	.word	.LANCHOR56
+	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
+	.section	.text.make_superblock,"ax",%progbits
 	.align	1
-	.global	insert_free_list
+	.global	make_superblock
 	.thumb
 	.thumb_func
-	.type	insert_free_list, %function
-insert_free_list:
+	.type	make_superblock, %function
+make_superblock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L642
+	ldrh	r2, [r0, #0]
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	movw	r8, #65535
-	cmp	r0, r8
-	beq	.L728
-	ldr	r3, .L735
-	mov	fp, #6
-	mul	r6, fp, r0
-	ldr	r2, [r3, #0]
-	ldr	r3, .L735+4
-	adds	r1, r2, r6
-	ldr	r4, [r3, #0]
-	strh	r8, [r1, #2]	@ movhi
-	strh	r8, [r2, r6]	@ movhi
-	cbz	r4, .L734
-.L729:
-	ldr	r3, .L735+8
-	subs	r5, r4, r2
-	asrs	r5, r5, #1
-	ldr	ip, [r3, #0]
-	ldr	r3, .L735+12
-	muls	r5, r3, r5
-	mov	r3, r4
+	mov	r4, r0
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	bcc	.L636
+	ldr	r1, .L642+4
+	movw	r2, #2296
+	ldr	r0, .L642+8
+	bl	printf
+	ldr	r0, .L642+12
+	ldr	r1, .L642+16
+	bl	printf
+.L636:
+	movs	r5, #0
+	ldr	r8, .L642+40
+	strh	r5, [r4, #4]	@ movhi
+	movw	r6, #65535
+	strb	r5, [r4, #7]
+	ldr	r7, .L642+20
+	b	.L637
+.L639:
+	ldrb	r0, [r7, r5]	@ zero_extendqisi2
+	add	sl, r5, #8
+	ldrh	r1, [r4, #0]
+	bl	V2P_block
+	strh	r6, [r4, sl, lsl #1]	@ movhi
+	mov	fp, r0
+	bl	FtlBbmIsBadBlock
+	cbnz	r0, .L638
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	strh	fp, [r4, sl, lsl #1]	@ movhi
+	adds	r3, r3, #1
+	strb	r3, [r4, #7]
+.L638:
+	adds	r5, r5, #1
 	uxth	r5, r5
-	ldrh	sl, [ip, r0, lsl #1]
-.L732:
-	ldrh	r7, [ip, r5, lsl #1]
-	cmp	r7, sl
-	bcs	.L730
-	ldrh	r7, [r3, #0]
-	cmp	r7, r8
-	bne	.L731
-	strh	r5, [r1, #2]	@ movhi
-	strh	r0, [r3, #0]	@ movhi
-	b	.L728
-.L731:
-	mla	r3, fp, r7, r2
-	mov	r5, r7
-	b	.L732
-.L730:
-	ldrh	r7, [r3, #2]
-	cmp	r3, r4
-	strh	r5, [r2, r6]	@ movhi
-	strh	r7, [r1, #2]	@ movhi
-	bne	.L733
-	strh	r0, [r3, #2]	@ movhi
-	ldr	r3, .L735+4
-.L734:
-	str	r1, [r3, #0]
-	b	.L728
-.L733:
-	ldrh	r1, [r3, #2]
-	movs	r4, #6
-	strh	r0, [r3, #2]	@ movhi
-	muls	r1, r4, r1
-	strh	r0, [r2, r1]	@ movhi
-.L728:
+.L637:
+	ldrh	r3, [r8, #0]
+	cmp	r3, r5
+	bhi	.L639
+	ldr	r2, .L642+24
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	ldrh	r2, [r2, #0]
+	muls	r3, r2, r3
+	strh	r3, [r4, #4]	@ movhi
+	movs	r3, #0
+	strb	r3, [r4, #9]
+	ldr	r3, .L642+28
+	ldr	r3, [r3, #0]
+	cbz	r3, .L640
+	ldr	r3, .L642+32
+	ldrh	r2, [r4, #0]
+	ldr	r3, [r3, #0]
+	ldrh	r3, [r3, r2, lsl #1]
+	cmp	r3, #59
+	bhi	.L640
+	movs	r3, #1
+	strb	r3, [r4, #9]
+.L640:
+	ldr	r3, .L642+36
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L641
+	movs	r3, #1
+	strb	r3, [r4, #9]
+.L641:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L736:
-	.align	2
-.L735:
-	.word	.LANCHOR99
-	.word	.LANCHOR105
-	.word	.LANCHOR96
-	.word	-1431655765
-	.size	insert_free_list, .-insert_free_list
-	.section	.text.INSERT_FREE_LIST,"ax",%progbits
-	.align	1
-	.global	INSERT_FREE_LIST
-	.thumb
-	.thumb_func
-	.type	INSERT_FREE_LIST, %function
-INSERT_FREE_LIST:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	bl	insert_free_list
-	ldr	r2, .L739
-	ldrh	r3, [r2, #0]
-	adds	r3, r3, #1
-	uxth	r3, r3
-	strh	r3, [r2, #0]	@ movhi
-	ldr	r2, .L739+4
-	ldrh	r2, [r2, #0]
-	cmp	r2, r3
-	bcs	.L737
-	ldr	r1, .L739+8
-	movs	r2, #198
-	ldr	r0, .L739+12
-	bl	printf
-	ldr	r0, .L739+16
-	ldr	r1, .L739+20
-	pop	{r3, lr}
-	b	printf
-.L737:
-	pop	{r3, pc}
-.L740:
+.L643:
 	.align	2
-.L739:
-	.word	.LANCHOR106
-	.word	.LANCHOR55
-	.word	.LANCHOR107
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
-	.section	.text.List_remove_node,"ax",%progbits
+.L642:
+	.word	.LANCHOR43
+	.word	.LANCHOR115
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
+	.word	.LANCHOR50
+	.word	.LANCHOR56
+	.word	.LANCHOR116
+	.word	.LANCHOR84
+	.word	.LANCHOR0
+	.word	.LANCHOR41
+	.size	make_superblock, .-make_superblock
+	.section	.text.SupperBlkListInit,"ax",%progbits
 	.align	1
-	.global	List_remove_node
+	.global	SupperBlkListInit
 	.thumb
 	.thumb_func
-	.type	List_remove_node, %function
-List_remove_node:
-	@ args = 0, pretend = 0, frame = 0
+	.type	SupperBlkListInit, %function
+SupperBlkListInit:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	movs	r6, #6
-	muls	r6, r1, r6
-	ldr	r3, .L747
-	mov	r5, r0
-	ldr	r7, [r3, #0]
-	movw	r3, #65535
-	adds	r4, r7, r6
-	ldrh	r2, [r4, #2]
-	cmp	r2, r3
-	bne	.L742
-	ldr	r3, [r0, #0]
+	ldr	r2, .L655
+	ldr	r3, .L655+4
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	movs	r1, #0
+	ldrh	r3, [r3, #0]
+	movs	r5, #0
+	ldr	r0, [r2, #0]
+	movs	r2, #6
+	muls	r2, r3, r2
+	mov	r4, r5
+	bl	memset
+	ldr	r3, .L655+8
+	mov	r8, r5
+	mov	sl, r5
+	str	r5, [r3, #0]
+	ldr	r3, .L655+12
+	str	r5, [r3, #0]
+	ldr	r3, .L655+16
+	str	r5, [r3, #0]
+	ldr	r3, .L655+20
+	strh	r5, [r3, #0]	@ movhi
+	ldr	r3, .L655+24
+	strh	r5, [r3, #0]	@ movhi
+	ldr	r3, .L655+28
+	strh	r5, [r3, #0]	@ movhi
+	b	.L645
+.L647:
+	ldr	r2, .L655+32
+	mov	r1, r4
+	ldrb	r0, [r2, r7]	@ zero_extendqisi2
+	str	ip, [sp, #4]
+	bl	V2P_block
+	bl	FtlBbmIsBadBlock
+	ldr	ip, [sp, #4]
+	cbnz	r0, .L646
+	ldrh	r2, [fp, #0]
+	adds	r6, r6, r2
+	uxth	r6, r6
+.L646:
+	adds	r7, r7, #1
+	b	.L652
+.L654:
+	movs	r7, #0
+	uxth	r3, r4
+	ldr	fp, .L655+76
+	mov	ip, r4
+	mov	r6, r7
+	mov	r4, r3
+.L652:
+	ldr	r3, .L655+36
+	ldrh	r2, [r3, #0]
+	cmp	r7, r2
+	blt	.L647
+	mov	r4, ip
+	cbz	r6, .L648
+	sxth	r1, r6
+	mov	r0, #32768
+	bl	__aeabi_idiv
+	uxth	r6, r0
+	b	.L649
+.L648:
+	ldr	r3, .L655+40
+	movw	r2, #65535
+	ldr	r3, [r3, #0]
+	strh	r2, [r3, ip, lsl #1]	@ movhi
+.L649:
+	ldr	r3, .L655
+	ldr	r3, [r3, #0]
+	adds	r3, r3, r5
+	strh	r6, [r3, #4]	@ movhi
+	ldr	r3, .L655+44
+	ldrh	r3, [r3, #0]
 	cmp	r4, r3
-	beq	.L742
-	ldr	r1, .L747+4
-	movw	r2, #363
-	ldr	r0, .L747+8
+	beq	.L650
+	ldr	r3, .L655+48
+	ldrh	r3, [r3, #0]
+	cmp	r4, r3
+	beq	.L650
+	ldr	r3, .L655+52
+	ldrh	r3, [r3, #0]
+	cmp	r4, r3
+	beq	.L650
+	ldr	r3, .L655+40
+	uxth	r0, r4
+	ldr	r3, [r3, #0]
+	ldrh	r3, [r3, r4, lsl #1]
+	cbnz	r3, .L651
+	add	r8, r8, #1
+	uxth	r8, r8
+	bl	INSERT_FREE_LIST
+	b	.L650
+.L651:
+	add	sl, sl, #1
+	uxth	sl, sl
+	bl	INSERT_DATA_LIST
+.L650:
+	adds	r4, r4, #1
+	adds	r5, r5, #6
+.L645:
+	ldr	r2, .L655+56
+	ldrh	r3, [r2, #0]
+	cmp	r4, r3
+	blt	.L654
+	ldr	r2, .L655+20
+	strh	sl, [r2, #0]	@ movhi
+	ldr	r2, .L655+24
+	strh	r8, [r2, #0]	@ movhi
+	add	r8, sl, r8
+	cmp	r8, r3
+	ble	.L653
+	ldr	r1, .L655+60
+	movw	r2, #2366
+	ldr	r0, .L655+64
 	bl	printf
-	ldr	r0, .L747+12
-	ldr	r1, .L747+16
+	ldr	r0, .L655+68
+	ldr	r1, .L655+72
 	bl	printf
-.L742:
-	ldr	r3, [r5, #0]
-	movw	r2, #65535
-	cmp	r4, r3
-	ldrh	r3, [r7, r6]
-	bne	.L743
-	cmp	r3, r2
-	bne	.L744
-	movs	r3, #0
-	str	r3, [r5, #0]
-	b	.L745
-.L744:
-	ldr	r1, .L747
-	movs	r0, #6
-	ldr	r1, [r1, #0]
-	mla	r3, r0, r3, r1
-	str	r3, [r5, #0]
-	strh	r2, [r3, #2]	@ movhi
-	b	.L745
-.L743:
-	cmp	r3, r2
-	ldrh	r2, [r4, #2]
-	bne	.L746
-	cmp	r2, r3
-	beq	.L745
-	ldr	r1, .L747
-	movs	r0, #6
-	muls	r2, r0, r2
-	ldr	r1, [r1, #0]
-	strh	r3, [r1, r2]	@ movhi
-	b	.L745
-.L746:
-	ldr	r1, .L747
-	movs	r0, #6
-	ldr	r1, [r1, #0]
-	mla	r5, r0, r3, r1
-	strh	r2, [r5, #2]	@ movhi
-	ldrh	r2, [r4, #2]
-	muls	r0, r2, r0
-	strh	r3, [r1, r0]	@ movhi
-.L745:
-	movw	r3, #65535
+.L653:
 	movs	r0, #0
-	strh	r3, [r7, r6]	@ movhi
-	strh	r3, [r4, #2]	@ movhi
-	pop	{r3, r4, r5, r6, r7, pc}
-.L748:
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L656:
 	.align	2
-.L747:
+.L655:
+	.word	.LANCHOR87
+	.word	.LANCHOR44
+	.word	.LANCHOR93
+	.word	.LANCHOR88
+	.word	.LANCHOR90
+	.word	.LANCHOR91
+	.word	.LANCHOR94
+	.word	.LANCHOR117
+	.word	.LANCHOR50
+	.word	.LANCHOR41
+	.word	.LANCHOR89
+	.word	.LANCHOR97
+	.word	.LANCHOR98
 	.word	.LANCHOR99
-	.word	.LANCHOR108
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.size	List_remove_node, .-List_remove_node
-	.section	.text.List_pop_index_node,"ax",%progbits
+	.word	.LANCHOR43
+	.word	.LANCHOR118
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
+	.word	.LANCHOR56
+	.size	SupperBlkListInit, .-SupperBlkListInit
+	.section	.text.update_multiplier_value,"ax",%progbits
 	.align	1
-	.global	List_pop_index_node
+	.global	update_multiplier_value
 	.thumb
 	.thumb_func
-	.type	List_pop_index_node, %function
-List_pop_index_node:
+	.type	update_multiplier_value, %function
+update_multiplier_value:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, [r0, #0]
-	push	{r4, r5, r6, lr}
-	cbz	r3, .L754
-	ldr	r2, .L755
-	movw	r6, #65535
-	movs	r5, #6
-	ldr	r4, [r2, #0]
-	b	.L751
-.L753:
-	mla	r3, r5, r2, r4
-	subs	r1, r1, #1
-	uxth	r1, r1
-.L751:
-	cbz	r1, .L752
-	ldrh	r2, [r3, #0]
-	cmp	r2, r6
-	bne	.L753
-.L752:
-	subs	r4, r3, r4
-	ldr	r3, .L755+4
-	asrs	r4, r4, #1
-	muls	r4, r3, r4
+	push	{r3, r4, r5, r6, r7, r8, sl, lr}
+	movs	r4, #0
+	mov	r6, r0
+	mov	r5, r4
+	ldr	sl, .L662+8
+	ldr	r8, .L662+12
+	ldr	r7, .L662
+	b	.L658
+.L660:
+	mov	r1, r6
+	ldrb	r0, [r8, r5]	@ zero_extendqisi2
+	bl	V2P_block
+	bl	FtlBbmIsBadBlock
+	cbnz	r0, .L659
+	ldrh	r3, [r7, #0]
+	adds	r4, r4, r3
 	uxth	r4, r4
+.L659:
+	adds	r5, r5, #1
+	uxth	r5, r5
+.L658:
+	ldrh	r3, [sl, #0]
+	cmp	r3, r5
+	bhi	.L660
+	cbz	r4, .L661
 	mov	r1, r4
-	bl	List_remove_node
-	mov	r0, r4
-	pop	{r4, r5, r6, pc}
-.L754:
-	movw	r0, #65535
-	pop	{r4, r5, r6, pc}
-.L756:
+	mov	r0, #32768
+	bl	__aeabi_idiv
+	uxth	r4, r0
+.L661:
+	ldr	r3, .L662+4
+	movs	r2, #6
+	movs	r0, #0
+	ldr	r3, [r3, #0]
+	mla	r6, r2, r6, r3
+	strh	r4, [r6, #4]	@ movhi
+	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
+.L663:
 	.align	2
-.L755:
-	.word	.LANCHOR99
+.L662:
+	.word	.LANCHOR56
+	.word	.LANCHOR87
+	.word	.LANCHOR41
+	.word	.LANCHOR50
+	.size	update_multiplier_value, .-update_multiplier_value
+	.section	.text.GetFreeBlockMinEraseCount,"ax",%progbits
+	.align	1
+	.global	GetFreeBlockMinEraseCount
+	.thumb
+	.thumb_func
+	.type	GetFreeBlockMinEraseCount, %function
+GetFreeBlockMinEraseCount:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L667
+	ldr	r0, [r3, #0]
+	cbz	r0, .L665
+	ldr	r3, .L667+4
+	ldr	r3, [r3, #0]
+	subs	r0, r0, r3
+	ldr	r3, .L667+8
+	asrs	r0, r0, #1
+	muls	r0, r3, r0
+	ldr	r3, .L667+12
+	uxth	r0, r0
+	ldr	r3, [r3, #0]
+	ldrh	r0, [r3, r0, lsl #1]
+.L665:
+	bx	lr
+.L668:
+	.align	2
+.L667:
+	.word	.LANCHOR93
+	.word	.LANCHOR87
 	.word	-1431655765
-	.size	List_pop_index_node, .-List_pop_index_node
-	.section	.text.List_get_gc_head_node,"ax",%progbits
+	.word	.LANCHOR84
+	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
+	.section	.text.GetFreeBlockMaxEraseCount,"ax",%progbits
 	.align	1
-	.global	List_get_gc_head_node
+	.global	GetFreeBlockMaxEraseCount
 	.thumb
 	.thumb_func
-	.type	List_get_gc_head_node, %function
-List_get_gc_head_node:
+	.type	GetFreeBlockMaxEraseCount, %function
+GetFreeBlockMaxEraseCount:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L763
-	push	{r4, lr}
+	ldr	r3, .L676
+	push	{r4, r5, r6, lr}
 	ldr	r3, [r3, #0]
-	cbz	r3, .L762
-	ldr	r2, .L763+4
-	movw	r1, #65535
-	movs	r4, #6
-	ldr	r2, [r2, #0]
-	b	.L759
-.L761:
-	mla	r3, r4, r3, r2
-	subs	r0, r0, #1
-	uxth	r0, r0
-.L759:
-	cbz	r0, .L760
-	ldrh	r3, [r3, #0]
-	cmp	r3, r1
-	bne	.L761
-	mov	r0, r1
-	pop	{r4, pc}
-.L760:
-	subs	r3, r3, r2
-	ldr	r0, .L763+8
+	cbz	r3, .L675
+	ldr	r2, .L676+4
+	movs	r1, #7
+	movw	r5, #65535
+	ldrh	r2, [r2, #0]
+	muls	r2, r1, r2
+	asrs	r2, r2, #3
+	cmp	r0, r2
+	it	gt
+	uxthgt	r0, r2
+	ldr	r2, .L676+8
+	movs	r6, #6
+	ldr	r1, [r2, #0]
+	ldr	r2, .L676+12
+	subs	r3, r3, r1
 	asrs	r3, r3, #1
-	muls	r0, r3, r0
-	uxth	r0, r0
-	pop	{r4, pc}
-.L762:
-	movw	r0, #65535
-	pop	{r4, pc}
-.L764:
+	muls	r3, r2, r3
+	movs	r2, #0
+	uxth	r3, r3
+	b	.L672
+.L674:
+	mul	r4, r6, r3
+	ldrh	r4, [r1, r4]
+	cmp	r4, r5
+	beq	.L673
+	adds	r2, r2, #1
+	mov	r3, r4
+	uxth	r2, r2
+.L672:
+	cmp	r2, r0
+	bne	.L674
+.L673:
+	ldr	r2, .L676+16
+	ldr	r2, [r2, #0]
+	ldrh	r0, [r2, r3, lsl #1]
+	pop	{r4, r5, r6, pc}
+.L675:
+	mov	r0, r3
+	pop	{r4, r5, r6, pc}
+.L677:
 	.align	2
-.L763:
-	.word	.LANCHOR100
-	.word	.LANCHOR99
+.L676:
+	.word	.LANCHOR93
+	.word	.LANCHOR94
+	.word	.LANCHOR87
 	.word	-1431655765
-	.size	List_get_gc_head_node, .-List_get_gc_head_node
-	.section	.text.List_update_data_list,"ax",%progbits
+	.word	.LANCHOR84
+	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
+	.section	.text.free_data_superblock,"ax",%progbits
 	.align	1
-	.global	List_update_data_list
+	.global	free_data_superblock
 	.thumb
 	.thumb_func
-	.type	List_update_data_list, %function
-List_update_data_list:
+	.type	free_data_superblock, %function
+free_data_superblock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L774
-	push	{r4, r5, r6, r7, r8, lr}
-	mov	r4, r0
-	ldrh	r3, [r3, #0]
-	cmp	r3, r0
-	beq	.L766
-	ldr	r3, .L774+4
-	ldrh	r3, [r3, #0]
-	cmp	r3, r0
-	beq	.L766
-	ldr	r3, .L774+8
-	ldrh	r3, [r3, #0]
-	cmp	r3, r0
-	beq	.L766
-	ldr	r3, .L774+12
-	movs	r7, #6
-	muls	r7, r0, r7
-	ldr	r8, [r3, #0]
-	ldr	r3, .L774+16
-	add	r5, r8, r7
-	ldr	r3, [r3, #0]
-	cmp	r5, r3
-	beq	.L766
-	ldr	r3, .L774+20
-	movw	r2, #65535
-	ldrh	r6, [r5, #4]
-	ldr	r3, [r3, #0]
-	ldrh	r3, [r3, r0, lsl #1]
-	muls	r6, r3, r6
-	ldrh	r3, [r5, #2]
-	it	eq
-	moveq	r6, #-1
-	cmp	r3, r2
-	bne	.L768
-	ldrh	r2, [r8, r7]
-	cmp	r2, r3
-	bne	.L768
-	ldr	r1, .L774+24
-	movw	r2, #481
-	ldr	r0, .L774+28
-	bl	printf
-	ldr	r0, .L774+32
-	ldr	r1, .L774+36
-	bl	printf
-.L768:
-	ldrh	r3, [r5, #2]
 	movw	r2, #65535
-	cmp	r3, r2
-	bne	.L769
-	ldrh	r2, [r8, r7]
-	cmp	r2, r3
-	beq	.L766
-.L769:
-	ldr	r2, .L774+12
-	movs	r1, #6
+	cmp	r0, r2
+	push	{r3, lr}
+	beq	.L679
+	ldr	r2, .L680
+	movs	r1, #0
 	ldr	r2, [r2, #0]
-	mla	r3, r1, r3, r2
-	ldr	r1, .L774+40
-	subs	r2, r3, r2
-	asrs	r2, r2, #1
-	muls	r2, r1, r2
-	ldr	r1, .L774+20
-	uxth	r2, r2
-	ldrh	r3, [r3, #4]
-	ldr	r1, [r1, #0]
-	ldrh	r2, [r1, r2, lsl #1]
-	muls	r3, r2, r3
-	it	eq
-	moveq	r3, #-1
-	cmp	r6, r3
-	bcs	.L766
-	ldr	r5, .L774+44
-	mov	r1, r4
-	ldr	r0, .L774+16
-	bl	List_remove_node
-	ldrh	r3, [r5, #0]
-	cbnz	r3, .L771
-	ldr	r1, .L774+24
-	mov	r2, #492
-	ldr	r0, .L774+28
-	bl	printf
-	ldr	r0, .L774+32
-	ldr	r1, .L774+36
-	bl	printf
-.L771:
-	ldrh	r3, [r5, #0]
-	mov	r0, r4
-	subs	r3, r3, #1
-	strh	r3, [r5, #0]	@ movhi
-	bl	INSERT_DATA_LIST
-.L766:
+	strh	r1, [r2, r0, lsl #1]	@ movhi
+	bl	INSERT_FREE_LIST
+.L679:
 	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, pc}
-.L775:
+	pop	{r3, pc}
+.L681:
 	.align	2
-.L774:
-	.word	.LANCHOR109
-	.word	.LANCHOR110
-	.word	.LANCHOR111
-	.word	.LANCHOR99
-	.word	.LANCHOR100
-	.word	.LANCHOR101
-	.word	.LANCHOR112
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.word	-1431655765
-	.word	.LANCHOR103
-	.size	List_update_data_list, .-List_update_data_list
-	.section	.text.ftl_free_no_use_map_blk,"ax",%progbits
+.L680:
+	.word	.LANCHOR89
+	.size	free_data_superblock, .-free_data_superblock
+	.section	.text.FtlGcBufInit,"ax",%progbits
 	.align	1
-	.global	ftl_free_no_use_map_blk
+	.global	FtlGcBufInit
 	.thumb
 	.thumb_func
-	.type	ftl_free_no_use_map_blk, %function
-ftl_free_no_use_map_blk:
+	.type	FtlGcBufInit, %function
+FtlGcBufInit:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldrh	r2, [r0, #10]
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r4, r0
-	ldr	r5, [r0, #20]
-	lsls	r2, r2, #1
-	ldr	r6, [r0, #12]
-	movs	r1, #0
-	ldr	r7, [r0, #24]
-	mov	r0, r5
-	bl	memset
+	ldr	r3, .L687
 	movs	r2, #0
-	b	.L777
-.L781:
-	ldr	r1, [r7, r2, lsl #2]
-	movs	r3, #0
-	ubfx	r1, r1, #10, #16
-	b	.L778
-.L780:
-	ldrh	r0, [r6, r3, lsl #1]
-	cmp	r0, r1
-	bne	.L779
-	ldrh	r0, [r5, r3, lsl #1]
-	adds	r0, r0, #1
-	strh	r0, [r5, r3, lsl #1]	@ movhi
-.L779:
-	adds	r3, r3, #1
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r4, r2
+	str	r2, [r3, #0]
+	ldr	r3, .L687+4
+	ldrh	ip, [r3, #0]
+	ldr	r3, .L687+8
+	ldr	r7, [r3, #0]
+	ldr	r3, .L687+12
+	ldr	r6, [r3, #0]
+	ldr	r3, .L687+16
+	ldr	r1, [r3, #0]
+	ldr	r3, .L687+20
+	ldrh	r5, [r3, #0]
+	ldr	r3, .L687+24
+	str	r5, [sp, #4]
+	ldrh	fp, [r3, #0]
+	ldr	r3, .L687+28
+	ldr	r0, [r3, #0]
+	mov	r3, r2
+	b	.L683
+.L684:
+	movs	r5, #1
+	bic	r4, r4, #3
+	adds	r3, r3, r5
+	bic	r2, r2, #3
+	adds	r4, r7, r4
+	adds	r2, r6, r2
+	str	r4, [r1, #-12]
 	uxth	r3, r3
-.L778:
-	ldrh	r0, [r4, #10]
-	cmp	r0, r3
-	bhi	.L780
-	adds	r2, r2, #1
-	uxth	r2, r2
-.L777:
-	ldrh	r3, [r4, #6]
-	cmp	r3, r2
-	bhi	.L781
-	mov	sl, #0
-	ldrh	r3, [r5, #0]
-	mov	r7, sl
-	ldr	r2, .L787
-	b	.L782
-.L786:
-	ldrh	r1, [r4, #0]
-	cmp	r1, r7
-	bne	.L783
-	ldrh	r1, [r2, #0]
-	ldrh	r0, [r4, #2]
-	cmp	r0, r1
-	it	cc
-	strhcc	r1, [r5, r7, lsl #1]	@ movhi
-.L783:
-	ldrh	r8, [r5, r7, lsl #1]
-	lsl	fp, r7, #1
+	str	r2, [r1, #-8]
+	str	r5, [r1, #-4]
+	str	r4, [r0, #-28]
+	mov	r4, r8
+	str	r2, [r0, #-24]
+	mov	r2, sl
+.L683:
+	adds	r1, r1, #12
+	ldr	r5, [sp, #4]
+	adds	r0, r0, #36
+	cmp	r3, ip
+	add	r8, r4, r5
+	add	sl, r2, fp
+	bne	.L684
+	ldr	r1, .L687+8
+	movs	r4, #12
+	ldr	r2, .L687+32
+	mov	fp, #0
+	ldr	ip, [r1, #0]
+	ldr	r1, .L687+20
+	ldr	r8, [r2, #0]
+	ldr	r2, .L687+16
+	ldrh	r7, [r1, #0]
+	ldr	r1, .L687+12
+	ldr	r2, [r2, #0]
+	ldr	r6, [r1, #0]
+	ldr	r1, .L687+24
+	ldrh	r5, [r1, #0]
+	b	.L685
+.L686:
+	mul	r1, r4, r3
+	mul	r0, r7, r3
+	add	sl, r2, r1
+	bic	r0, r0, #3
+	str	fp, [sl, #8]
+	add	r0, ip, r0
+	str	r0, [r2, r1]
+	mul	r1, r5, r3
+	adds	r3, r3, #1
+	uxth	r3, r3
+	bic	r1, r1, #3
+	adds	r1, r6, r1
+	str	r1, [sl, #4]
+.L685:
 	cmp	r3, r8
-	itt	hi
-	movhi	sl, r7
-	movhi	r3, r8
-	cmp	r8, #0
-	bne	.L785
-	ldrh	r0, [r6, fp]
-	cbz	r0, .L785
-	movs	r1, #1
-	stmia	sp, {r2, r3}
-	bl	FtlFreeSysBlkQueueIn
-	ldmia	sp, {r2, r3}
-	strh	r8, [r6, fp]	@ movhi
-	ldrh	r1, [r4, #8]
-	subs	r1, r1, #1
-	strh	r1, [r4, #8]	@ movhi
-.L785:
-	adds	r7, r7, #1
-	uxth	r7, r7
-.L782:
-	ldrh	r1, [r4, #10]
-	cmp	r1, r7
-	bhi	.L786
-	mov	r0, sl
+	bcc	.L686
 	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L788:
+.L688:
 	.align	2
-.L787:
-	.word	.LANCHOR69
-	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
-	.section	.text.ftl_map_blk_alloc_new_blk,"ax",%progbits
+.L687:
+	.word	.LANCHOR119
+	.word	.LANCHOR41
+	.word	.LANCHOR120
+	.word	.LANCHOR121
+	.word	.LANCHOR122
+	.word	.LANCHOR61
+	.word	.LANCHOR62
+	.word	.LANCHOR123
+	.word	.LANCHOR124
+	.size	FtlGcBufInit, .-FtlGcBufInit
+	.section	.text.FtlVariablesInit,"ax",%progbits
 	.align	1
-	.global	ftl_map_blk_alloc_new_blk
+	.global	FtlVariablesInit
 	.thumb
 	.thumb_func
-	.type	ftl_map_blk_alloc_new_blk, %function
-ftl_map_blk_alloc_new_blk:
+	.type	FtlVariablesInit, %function
+FtlVariablesInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	mov	r4, r0
-	ldrh	r2, [r0, #10]
-	movs	r5, #0
-	ldr	r3, [r0, #12]
-	b	.L790
-.L793:
-	mov	r7, r3
-	adds	r3, r3, #2
-	ldrh	r6, [r7, #0]
-	cbnz	r6, .L791
-	bl	FtlFreeSysBlkQueueOut
-	strh	r0, [r7, #0]	@ movhi
-	cbz	r0, .L792
-	ldr	r3, [r4, #28]
-	strh	r6, [r4, #2]	@ movhi
-	adds	r3, r3, #1
-	str	r3, [r4, #28]
-	ldrh	r3, [r4, #8]
-	strh	r5, [r4, #0]	@ movhi
-	adds	r3, r3, #1
-	strh	r3, [r4, #8]	@ movhi
-	b	.L792
-.L791:
-	adds	r5, r5, #1
-	uxth	r5, r5
-.L790:
-	cmp	r5, r2
-	bne	.L793
-.L792:
-	ldrh	r3, [r4, #10]
-	cmp	r3, r5
-	bhi	.L794
-	ldr	r1, .L795
-	movw	r2, #594
-	ldr	r0, .L795+4
-	bl	printf
-	ldr	r0, .L795+8
-	ldr	r1, .L795+12
-	bl	printf
-.L794:
-	movs	r0, #0
-	pop	{r3, r4, r5, r6, r7, pc}
-.L796:
+	push	{r3, r4, r5, lr}
+	movs	r4, #0
+	ldr	r3, .L690
+	movw	r2, #65535
+	ldr	r5, .L690+4
+	mov	r1, r4
+	str	r4, [r3, #0]
+	ldr	r3, .L690+8
+	strh	r2, [r3, #0]	@ movhi
+	mov	r2, #-1
+	ldr	r3, .L690+12
+	str	r4, [r3, #0]
+	ldr	r3, .L690+16
+	str	r4, [r3, #0]
+	ldr	r3, .L690+20
+	str	r2, [r3, #0]
+	ldr	r3, .L690+24
+	str	r4, [r3, #0]
+	ldr	r3, .L690+28
+	strh	r4, [r3, #0]	@ movhi
+	ldr	r3, .L690+32
+	ldrh	r2, [r3, #0]
+	ldr	r3, .L690+36
+	lsls	r2, r2, #1
+	ldr	r0, [r3, #0]
+	bl	memset
+	ldrh	r2, [r5, #0]
+	ldr	r3, .L690+40
+	mov	r1, r4
+	lsls	r2, r2, #1
+	ldr	r0, [r3, #0]
+	bl	memset
+	ldr	r3, .L690+44
+	ldrh	r2, [r5, #0]
+	mov	r1, r4
+	ldr	r0, [r3, #0]
+	lsls	r2, r2, #1
+	bl	memset
+	mov	r1, r4
+	movs	r2, #48
+	ldr	r0, .L690+48
+	bl	memset
+	mov	r1, r4
+	mov	r2, #512
+	ldr	r0, .L690+52
+	bl	memset
+	bl	FtlGcBufInit
+	bl	FtlL2PDataInit
+	mov	r0, r4
+	pop	{r3, r4, r5, pc}
+.L691:
 	.align	2
-.L795:
-	.word	.LANCHOR113
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
-	.section	.text.select_l2p_ram_region,"ax",%progbits
+.L690:
+	.word	.LANCHOR125
+	.word	.LANCHOR44
+	.word	.LANCHOR126
+	.word	.LANCHOR127
+	.word	.LANCHOR128
+	.word	.LANCHOR129
+	.word	.LANCHOR116
+	.word	.LANCHOR74
+	.word	.LANCHOR65
+	.word	.LANCHOR75
+	.word	.LANCHOR84
+	.word	.LANCHOR130
+	.word	.LANCHOR131
+	.word	.LANCHOR132
+	.size	FtlVariablesInit, .-FtlVariablesInit
+	.section	.text.FtlGcBufFree,"ax",%progbits
 	.align	1
-	.global	select_l2p_ram_region
+	.global	FtlGcBufFree
 	.thumb
 	.thumb_func
-	.type	select_l2p_ram_region, %function
-select_l2p_ram_region:
+	.type	FtlGcBufFree, %function
+FtlGcBufFree:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L809
-	movw	r1, #65535
-	push	{r3, r4, r5, r6, r7, lr}
-	ldr	r3, .L809+4
-	ldr	r0, [r2, #0]
-	movs	r2, #0
-	mov	r4, r2
-	ldrh	r3, [r3, #0]
-	b	.L798
-.L800:
-	adds	r2, r2, #12
-	adds	r5, r0, r2
-	ldrh	r5, [r5, #-12]
-	cmp	r5, r1
-	beq	.L799
-	adds	r4, r4, #1
-	uxth	r4, r4
-.L798:
-	cmp	r4, r3
-	bne	.L800
-	movs	r1, #0
-	mov	r4, r3
-	mov	r6, #-2147483648
-	mov	r2, r1
-	b	.L801
-.L803:
-	adds	r5, r0, r1
-	ldr	r5, [r5, #4]
-	cmp	r5, #0
-	blt	.L802
-	cmp	r5, r6
-	itt	cc
-	movcc	r6, r5
-	movcc	r4, r2
-.L802:
-	adds	r2, r2, #1
-	adds	r1, r1, #12
-	uxth	r2, r2
-.L801:
-	cmp	r2, r3
-	bne	.L803
-	cmp	r4, r3
-	bcc	.L799
-	ldr	r2, .L809+8
-	movs	r1, #0
-	mov	r4, r3
-	mov	r5, #-1
-	ldrh	r7, [r2, #0]
-	mov	r2, r1
-	b	.L804
-.L806:
-	adds	r6, r0, r1
-	ldr	r6, [r6, #4]
-	cmp	r6, r5
-	bcs	.L805
-	ldrh	ip, [r0, r1]
-	cmp	ip, r7
-	it	ne
-	movne	r5, r6
-	it	ne
-	movne	r4, r2
-.L805:
+	ldr	r3, .L699
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	movs	r5, #36
+	ldr	r6, [r3, #0]
+	ldr	r3, .L699+4
+	ldr	r4, [r3, #0]
+	movs	r3, #0
+	mov	fp, r3
+	b	.L693
+.L696:
+	mov	ip, #12
+	mul	r3, ip, r2
+	add	sl, r4, r3
+	ldr	ip, [r4, r3]
+	ldr	r3, [r7, #8]
+	cmp	ip, r3
+	bne	.L694
+	mov	r3, r8
+	str	fp, [sl, #8]
+	b	.L695
+.L694:
 	adds	r2, r2, #1
-	adds	r1, r1, #12
 	uxth	r2, r2
-.L804:
-	cmp	r2, r3
-	bne	.L806
-	cmp	r4, r2
-	bcc	.L799
-	ldr	r1, .L809+12
-	movw	r2, #826
-	ldr	r0, .L809+16
-	bl	printf
-	ldr	r0, .L809+20
-	ldr	r1, .L809+24
-	bl	printf
-.L799:
-	mov	r0, r4
-	pop	{r3, r4, r5, r6, r7, pc}
-.L810:
+.L698:
+	cmp	r2, r6
+	bcc	.L696
+	mov	r3, r8
+.L695:
+	adds	r3, r3, #1
+	uxth	r3, r3
+.L693:
+	cmp	r3, r1
+	bcs	.L692
+	mla	r7, r5, r3, r0
+	movs	r2, #0
+	mov	r8, r3
+	b	.L698
+.L692:
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L700:
 	.align	2
-.L809:
-	.word	.LANCHOR114
-	.word	.LANCHOR83
-	.word	.LANCHOR115
-	.word	.LANCHOR116
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.size	select_l2p_ram_region, .-select_l2p_ram_region
-	.section	.text.FtlUpdateVaildLpn,"ax",%progbits
+.L699:
+	.word	.LANCHOR124
+	.word	.LANCHOR122
+	.size	FtlGcBufFree, .-FtlGcBufFree
+	.section	.text.FtlGcBufAlloc,"ax",%progbits
 	.align	1
-	.global	FtlUpdateVaildLpn
+	.global	FtlGcBufAlloc
 	.thumb
 	.thumb_func
-	.type	FtlUpdateVaildLpn, %function
-FtlUpdateVaildLpn:
+	.type	FtlGcBufAlloc, %function
+FtlGcBufAlloc:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L817
-	push	{r4, r5, lr}
-	ldrh	r2, [r3, #0]
-	adds	r1, r2, #1
-	cmp	r2, #4
-	strh	r1, [r3, #0]	@ movhi
-	mov	r2, r3
-	bhi	.L812
-	cbz	r0, .L811
-.L812:
+	ldr	r3, .L708
+	push	{r4, r5, r6, r7, r8, sl, lr}
+	movs	r7, #12
+	ldr	r8, [r3, #0]
+	movs	r6, #1
+	ldr	r3, .L708+4
+	movs	r5, #36
+	ldr	ip, [r3, #0]
 	movs	r3, #0
-	strh	r3, [r2, #0]	@ movhi
-	ldr	r2, .L817+4
-	movw	r4, #65535
-	ldrh	r5, [r2, #0]
-	ldr	r2, .L817+8
-	ldr	r1, [r2, #0]
-	mov	r2, r3
-	b	.L814
-.L816:
-	ldrh	r0, [r1], #2
-	cmp	r0, r4
-	it	ne
-	addne	r3, r3, r0
+	b	.L702
+.L705:
+	mla	r4, r7, r2, ip
+	ldr	sl, [r4, #8]
+	cmp	sl, #0
+	bne	.L703
+	mla	r2, r5, r3, r0
+	str	r6, [r4, #8]
+	ldr	sl, [r4, #0]
+	ldr	r4, [r4, #4]
+	str	sl, [r2, #8]
+	str	r4, [r2, #12]
+	b	.L704
+.L703:
 	adds	r2, r2, #1
 	uxth	r2, r2
-.L814:
-	cmp	r2, r5
-	bne	.L816
-	ldr	r2, .L817+12
-	str	r3, [r2, #0]
-.L811:
-	pop	{r4, r5, pc}
-.L818:
+	b	.L706
+.L707:
+	movs	r2, #0
+.L706:
+	cmp	r2, r8
+	bcc	.L705
+.L704:
+	adds	r3, r3, #1
+	uxth	r3, r3
+.L702:
+	cmp	r3, r1
+	bcc	.L707
+	pop	{r4, r5, r6, r7, r8, sl, pc}
+.L709:
 	.align	2
-.L817:
-	.word	.LANCHOR117
-	.word	.LANCHOR55
-	.word	.LANCHOR101
-	.word	.LANCHOR118
-	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
-	.section	.text.ftl_set_blk_mode,"ax",%progbits
+.L708:
+	.word	.LANCHOR124
+	.word	.LANCHOR122
+	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
+	.section	.text.IsBlkInGcList,"ax",%progbits
 	.align	1
-	.global	ftl_set_blk_mode
+	.global	IsBlkInGcList
 	.thumb
 	.thumb_func
-	.type	ftl_set_blk_mode, %function
-ftl_set_blk_mode:
+	.type	IsBlkInGcList, %function
+IsBlkInGcList:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L823
-	lsrs	r2, r0, #5
-	and	r0, r0, #31
-	uxth	r2, r2
-	ldr	r3, [r3, #0]
-	cbz	r1, .L820
-	movs	r1, #1
-	lsl	r0, r1, r0
-	ldr	r1, [r3, r2, lsl #2]
-	orrs	r0, r0, r1
-	b	.L822
-.L820:
-	movs	r1, #1
-	lsl	r0, r1, r0
-	ldr	r1, [r3, r2, lsl #2]
-	bic	r0, r1, r0
-.L822:
-	str	r0, [r3, r2, lsl #2]
-	bx	lr
-.L824:
+	ldr	r3, .L715
+	push	{r4, lr}
+	ldrh	r1, [r3, #0]
+	ldr	r3, .L715+4
+	ldr	r2, [r3, #0]
+	movs	r3, #0
+	b	.L711
+.L713:
+	ldrh	r4, [r2], #2
+	cmp	r4, r0
+	beq	.L714
+	adds	r3, r3, #1
+	uxth	r3, r3
+.L711:
+	cmp	r3, r1
+	bne	.L713
+	movs	r0, #0
+	pop	{r4, pc}
+.L714:
+	movs	r0, #1
+	pop	{r4, pc}
+.L716:
 	.align	2
-.L823:
-	.word	.LANCHOR119
-	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
-	.section	.text.ftl_get_blk_mode,"ax",%progbits
+.L715:
+	.word	.LANCHOR133
+	.word	.LANCHOR134
+	.size	IsBlkInGcList, .-IsBlkInGcList
+	.section	.text.FtlGcUpdatePage,"ax",%progbits
 	.align	1
-	.global	ftl_get_blk_mode
+	.global	FtlGcUpdatePage
 	.thumb
 	.thumb_func
-	.type	ftl_get_blk_mode, %function
-ftl_get_blk_mode:
+	.type	FtlGcUpdatePage, %function
+FtlGcUpdatePage:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L826
-	lsrs	r2, r0, #5
-	and	r0, r0, #31
-	ldr	r3, [r3, #0]
-	ldr	r3, [r3, r2, lsl #2]
-	lsr	r0, r3, r0
-	and	r0, r0, #1
-	bx	lr
-.L827:
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r4, r0
+	ubfx	r0, r0, #10, #16
+	mov	r5, r1
+	mov	r6, r2
+	bl	P2V_block_in_plane
+	ldr	r3, .L721
+	ldrh	r7, [r3, #0]
+	ldr	r3, .L721+4
+	ldr	r2, [r3, #0]
+	movs	r3, #0
+	mov	r1, r2
+	b	.L718
+.L720:
+	ldrh	ip, [r1], #2
+	cmp	ip, r0
+	beq	.L719
+	adds	r3, r3, #1
+	uxth	r3, r3
+.L718:
+	cmp	r3, r7
+	bne	.L720
+	strh	r0, [r2, r3, lsl #1]	@ movhi
+	ldr	r3, .L721
+	ldrh	r2, [r3, #0]
+	adds	r2, r2, #1
+	strh	r2, [r3, #0]	@ movhi
+.L719:
+	ldr	r0, .L721+8
+	movs	r1, #12
+	ldr	r3, .L721+12
+	ldr	r0, [r0, #0]
+	ldrh	r2, [r3, #0]
+	muls	r1, r2, r1
+	adds	r7, r0, r1
+	str	r4, [r0, r1]
+	adds	r2, r2, #1
+	str	r5, [r7, #4]
+	str	r6, [r7, #8]
+	strh	r2, [r3, #0]	@ movhi
+	pop	{r3, r4, r5, r6, r7, pc}
+.L722:
 	.align	2
-.L826:
-	.word	.LANCHOR119
-	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
-	.section	.text.FtlL2PDataInit,"ax",%progbits
+.L721:
+	.word	.LANCHOR133
+	.word	.LANCHOR134
+	.word	.LANCHOR136
+	.word	.LANCHOR135
+	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
+	.section	.text.FtlGcPageVarInit,"ax",%progbits
 	.align	1
-	.global	FtlL2PDataInit
+	.global	FtlGcPageVarInit
 	.thumb
 	.thumb_func
-	.type	FtlL2PDataInit, %function
-FtlL2PDataInit:
+	.type	FtlGcPageVarInit, %function
+FtlGcPageVarInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L831
-	movs	r1, #0
-	push	{r4, r5, r6, r7, r8, lr}
-	ldr	r2, [r3, #0]
-	ldr	r3, .L831+4
-	ldr	r5, .L831+8
-	ldr	r4, .L831+12
+	ldr	r2, .L724
+	movs	r3, #0
+	push	{r4, lr}
+	movs	r1, #255
+	strh	r3, [r2, #0]	@ movhi
+	ldr	r4, .L724+4
+	ldr	r2, .L724+8
+	strh	r3, [r2, #0]	@ movhi
+	ldrh	r2, [r4, #0]
+	ldr	r3, .L724+12
 	lsls	r2, r2, #1
-	ldr	r6, .L831+16
 	ldr	r0, [r3, #0]
 	bl	memset
+	ldr	r2, .L724+16
 	ldrh	r3, [r4, #0]
-	ldrh	r2, [r6, #0]
 	movs	r1, #255
+	ldr	r0, [r2, #0]
+	movs	r2, #12
 	muls	r2, r3, r2
-	ldr	r0, [r5, #0]
 	bl	memset
-	ldr	r3, .L831+20
-	ldrh	r7, [r6, #0]
-	ldr	ip, [r5, #0]
-	movw	r5, #65535
-	ldr	r2, [r3, #0]
-	movs	r3, #0
-	ldrh	r6, [r4, #0]
-	mov	r0, r3
-	mov	r4, r3
-	b	.L829
-.L830:
-	adds	r0, r0, #1
-	bic	r3, r3, #3
-	add	r3, ip, r3
-	str	r3, [r2, #-4]
-	uxth	r0, r0
-	mov	r3, r8
-	str	r4, [r2, #-8]
-	strh	r5, [r2, #-12]	@ movhi
-.L829:
-	adds	r2, r2, #12
-	cmp	r0, r7
-	add	r8, r3, r6
-	movw	r1, #65535
-	bne	.L830
-	ldr	r2, .L831
-	ldr	r3, .L831+24
-	ldr	r2, [r2, #0]
-	strh	r1, [r3, #2]	@ movhi
-	strh	r1, [r3, #0]	@ movhi
-	strh	r2, [r3, #10]	@ movhi
-	movw	r2, #61634
-	strh	r2, [r3, #4]	@ movhi
-	ldr	r2, .L831+28
-	strh	r1, [r3, #40]	@ movhi
-	ldrh	r2, [r2, #0]
-	strh	r2, [r3, #8]	@ movhi
-	ldr	r2, .L831+32
-	ldrh	r2, [r2, #0]
-	strh	r2, [r3, #6]	@ movhi
-	ldr	r2, .L831+36
-	ldr	r2, [r2, #0]
-	str	r2, [r3, #12]
-	ldr	r2, .L831+40
-	ldr	r2, [r2, #0]
-	str	r2, [r3, #16]
-	ldr	r2, .L831+4
-	ldr	r2, [r2, #0]
-	str	r2, [r3, #20]
-	ldr	r2, .L831+44
-	ldr	r2, [r2, #0]
-	str	r2, [r3, #24]
-	pop	{r4, r5, r6, r7, r8, pc}
-.L832:
-	.align	2
-.L831:
-	.word	.LANCHOR80
-	.word	.LANCHOR120
-	.word	.LANCHOR121
-	.word	.LANCHOR73
-	.word	.LANCHOR83
-	.word	.LANCHOR114
-	.word	.LANCHOR122
-	.word	.LANCHOR123
-	.word	.LANCHOR82
-	.word	.LANCHOR124
-	.word	.LANCHOR125
-	.word	.LANCHOR126
-	.size	FtlL2PDataInit, .-FtlL2PDataInit
-	.section	.text.ftl_sb_update_avl_pages,"ax",%progbits
+	pop	{r4, lr}
+	b	FtlGcBufInit
+.L725:
+	.align	2
+.L724:
+	.word	.LANCHOR133
+	.word	.LANCHOR58
+	.word	.LANCHOR135
+	.word	.LANCHOR134
+	.word	.LANCHOR136
+	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
+	.section	.text.FtlGcRefreshOpenBlock,"ax",%progbits
 	.align	1
-	.global	ftl_sb_update_avl_pages
+	.global	FtlGcRefreshOpenBlock
 	.thumb
 	.thumb_func
-	.type	ftl_sb_update_avl_pages, %function
-ftl_sb_update_avl_pages:
+	.type	FtlGcRefreshOpenBlock, %function
+FtlGcRefreshOpenBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	movs	r3, #0
-	strh	r3, [r0, #4]	@ movhi
-	ldr	r3, .L840
-	push	{r4, r5, r6, r7, lr}
-	movw	r4, #65535
-	ldrh	r3, [r3, #0]
-	b	.L834
-.L836:
-	add	r5, r2, #8
-	ldrh	r5, [r0, r5, lsl #1]
-	cmp	r5, r4
-	beq	.L835
-	ldrh	r5, [r0, #4]
-	adds	r5, r5, #1
-	strh	r5, [r0, #4]	@ movhi
-.L835:
-	adds	r2, r2, #1
-	uxth	r2, r2
-.L834:
-	cmp	r2, r3
-	bcc	.L836
-	ldr	r2, .L840+4
-	mov	r4, r0
-	movw	r5, #65535
-	mvns	r1, r1
-	ldrh	r6, [r2, #0]
-	movs	r2, #0
-	b	.L837
-.L839:
-	ldrh	r7, [r4, #16]
-	cmp	r7, r5
-	beq	.L838
-	ldrh	r7, [r0, #4]
-	adds	r7, r6, r7
-	adds	r7, r7, r1
-	strh	r7, [r0, #4]	@ movhi
-.L838:
-	adds	r2, r2, #1
-	adds	r4, r4, #2
-	uxth	r2, r2
-.L837:
-	cmp	r2, r3
-	bne	.L839
-	pop	{r4, r5, r6, r7, pc}
-.L841:
+	push	{r4, r5, lr}
+	ldr	r4, .L729
+	ldrh	r5, [r4, #0]
+	cmp	r5, r0
+	beq	.L727
+	ldr	r3, .L729+4
+	ldrh	r1, [r3, #0]
+	cmp	r1, r0
+	beq	.L727
+	movw	r2, #65535
+	cmp	r5, r2
+	bne	.L728
+	strh	r0, [r4, #0]	@ movhi
+	b	.L727
+.L728:
+	cmp	r1, r2
+	it	eq
+	strheq	r0, [r3, #0]	@ movhi
+.L727:
+	movs	r0, #0
+	pop	{r4, r5, pc}
+.L730:
 	.align	2
-.L840:
-	.word	.LANCHOR53
-	.word	.LANCHOR68
-	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
-	.section	.text.make_superblock,"ax",%progbits
+.L729:
+	.word	.LANCHOR137
+	.word	.LANCHOR138
+	.size	FtlGcRefreshOpenBlock, .-FtlGcRefreshOpenBlock
+	.section	.text.FtlGcRefreshBlock,"ax",%progbits
 	.align	1
-	.global	make_superblock
+	.global	FtlGcRefreshBlock
 	.thumb
 	.thumb_func
-	.type	make_superblock, %function
-make_superblock:
+	.type	FtlGcRefreshBlock, %function
+FtlGcRefreshBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L849
-	ldrh	r2, [r0, #0]
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r4, r0
-	ldrh	r3, [r3, #0]
-	cmp	r2, r3
-	bcc	.L843
-	ldr	r1, .L849+4
-	movw	r2, #2296
-	ldr	r0, .L849+8
-	bl	printf
-	ldr	r0, .L849+12
-	ldr	r1, .L849+16
-	bl	printf
-.L843:
-	movs	r5, #0
-	ldr	r8, .L849+40
-	strh	r5, [r4, #4]	@ movhi
-	movw	r6, #65535
-	strb	r5, [r4, #7]
-	ldr	r7, .L849+20
-	b	.L844
-.L846:
-	ldrb	r0, [r7, r5]	@ zero_extendqisi2
-	add	sl, r5, #8
-	ldrh	r1, [r4, #0]
-	bl	V2P_block
-	strh	r6, [r4, sl, lsl #1]	@ movhi
-	mov	fp, r0
-	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L845
-	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	strh	fp, [r4, sl, lsl #1]	@ movhi
-	adds	r3, r3, #1
-	strb	r3, [r4, #7]
-.L845:
-	adds	r5, r5, #1
-	uxth	r5, r5
-.L844:
-	ldrh	r3, [r8, #0]
-	cmp	r3, r5
-	bhi	.L846
-	ldr	r2, .L849+24
-	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	ldrh	r2, [r2, #0]
-	muls	r3, r2, r3
-	strh	r3, [r4, #4]	@ movhi
-	movs	r3, #0
-	strb	r3, [r4, #9]
-	ldr	r3, .L849+28
-	ldr	r3, [r3, #0]
-	cbz	r3, .L847
-	ldr	r3, .L849+32
-	ldrh	r2, [r4, #0]
-	ldr	r3, [r3, #0]
-	ldrh	r3, [r3, r2, lsl #1]
-	cmp	r3, #59
-	bhi	.L847
-	movs	r3, #1
-	strb	r3, [r4, #9]
-.L847:
-	ldr	r3, .L849+36
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L848
-	movs	r3, #1
-	strb	r3, [r4, #9]
-.L848:
+	push	{r4, r5, lr}
+	ldr	r4, .L734
+	ldrh	r5, [r4, #0]
+	cmp	r5, r0
+	beq	.L732
+	ldr	r3, .L734+4
+	ldrh	r1, [r3, #0]
+	cmp	r1, r0
+	beq	.L732
+	movw	r2, #65535
+	cmp	r5, r2
+	bne	.L733
+	strh	r0, [r4, #0]	@ movhi
+	b	.L732
+.L733:
+	cmp	r1, r2
+	it	eq
+	strheq	r0, [r3, #0]	@ movhi
+.L732:
 	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L850:
+	pop	{r4, r5, pc}
+.L735:
 	.align	2
-.L849:
-	.word	.LANCHOR55
-	.word	.LANCHOR127
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.word	.LANCHOR62
-	.word	.LANCHOR68
-	.word	.LANCHOR128
-	.word	.LANCHOR96
-	.word	.LANCHOR0
-	.word	.LANCHOR53
-	.size	make_superblock, .-make_superblock
-	.section	.text.SupperBlkListInit,"ax",%progbits
+.L734:
+	.word	.LANCHOR137
+	.word	.LANCHOR138
+	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
+	.section	.text.FtlGcMarkBadPhyBlk,"ax",%progbits
 	.align	1
-	.global	SupperBlkListInit
+	.global	FtlGcMarkBadPhyBlk
 	.thumb
 	.thumb_func
-	.type	SupperBlkListInit, %function
-SupperBlkListInit:
-	@ args = 0, pretend = 0, frame = 8
+	.type	FtlGcMarkBadPhyBlk, %function
+FtlGcMarkBadPhyBlk:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L862
-	ldr	r3, .L862+4
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	movs	r1, #0
-	ldrh	r3, [r3, #0]
-	movs	r5, #0
-	ldr	r0, [r2, #0]
-	movs	r2, #6
-	muls	r2, r3, r2
-	mov	r4, r5
-	bl	memset
-	ldr	r3, .L862+8
-	mov	r8, r5
-	mov	sl, r5
-	str	r5, [r3, #0]
-	ldr	r3, .L862+12
-	str	r5, [r3, #0]
-	ldr	r3, .L862+16
-	str	r5, [r3, #0]
-	ldr	r3, .L862+20
-	strh	r5, [r3, #0]	@ movhi
-	ldr	r3, .L862+24
-	strh	r5, [r3, #0]	@ movhi
-	ldr	r3, .L862+28
-	strh	r5, [r3, #0]	@ movhi
-	b	.L852
-.L854:
-	ldr	r2, .L862+32
-	mov	r1, r4
-	ldrb	r0, [r2, r7]	@ zero_extendqisi2
-	str	ip, [sp, #4]
-	bl	V2P_block
-	bl	FtlBbmIsBadBlock
-	ldr	ip, [sp, #4]
-	cbnz	r0, .L853
-	ldrh	r2, [fp, #0]
-	adds	r6, r6, r2
-	uxth	r6, r6
-.L853:
-	adds	r7, r7, #1
-	b	.L859
-.L861:
-	movs	r7, #0
-	uxth	r3, r4
-	ldr	fp, .L862+76
-	mov	ip, r4
-	mov	r6, r7
-	mov	r4, r3
-.L859:
-	ldr	r3, .L862+36
-	ldrh	r2, [r3, #0]
-	cmp	r7, r2
-	blt	.L854
-	mov	r4, ip
-	cbz	r6, .L855
-	sxth	r1, r6
-	mov	r0, #32768
-	bl	__aeabi_idiv
-	uxth	r6, r0
-	b	.L856
-.L855:
-	ldr	r3, .L862+40
-	movw	r2, #65535
-	ldr	r3, [r3, #0]
-	strh	r2, [r3, ip, lsl #1]	@ movhi
-.L856:
-	ldr	r3, .L862
-	ldr	r3, [r3, #0]
-	adds	r3, r3, r5
-	strh	r6, [r3, #4]	@ movhi
-	ldr	r3, .L862+44
-	ldrh	r3, [r3, #0]
-	cmp	r4, r3
-	beq	.L857
-	ldr	r3, .L862+48
-	ldrh	r3, [r3, #0]
-	cmp	r4, r3
-	beq	.L857
-	ldr	r3, .L862+52
-	ldrh	r3, [r3, #0]
-	cmp	r4, r3
-	beq	.L857
-	ldr	r3, .L862+40
-	uxth	r0, r4
-	ldr	r3, [r3, #0]
-	ldrh	r3, [r3, r4, lsl #1]
-	cbnz	r3, .L858
-	add	r8, r8, #1
-	uxth	r8, r8
-	bl	INSERT_FREE_LIST
-	b	.L857
-.L858:
-	add	sl, sl, #1
-	uxth	sl, sl
-	bl	INSERT_DATA_LIST
-.L857:
-	adds	r4, r4, #1
-	adds	r5, r5, #6
-.L852:
-	ldr	r2, .L862+56
-	ldrh	r3, [r2, #0]
-	cmp	r4, r3
-	blt	.L861
-	ldr	r2, .L862+20
-	strh	sl, [r2, #0]	@ movhi
-	ldr	r2, .L862+24
-	strh	r8, [r2, #0]	@ movhi
-	add	r8, sl, r8
-	cmp	r8, r3
-	ble	.L860
-	ldr	r1, .L862+60
-	movw	r2, #2366
-	ldr	r0, .L862+64
-	bl	printf
-	ldr	r0, .L862+68
-	ldr	r1, .L862+72
-	bl	printf
-.L860:
+	push	{r3, r4, r5, lr}
+	mov	r4, r0
+	bl	P2V_block_in_plane
+	mov	r5, r0
+	bl	FtlGcRefreshBlock
+	ldr	r3, .L741
+	ldr	r3, [r3, #0]
+	cbz	r3, .L737
+	ldr	r3, .L741+4
+	ldr	r3, [r3, #0]
+	ldrh	r2, [r3, r5, lsl #1]
+	cmp	r2, #29
+	bls	.L737
+	subs	r2, r2, #30
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+.L737:
+	ldr	r3, .L741+8
+	ldr	r2, .L741+12
+	ldrh	r1, [r3, #0]
+	movs	r3, #0
+	b	.L738
+.L740:
+	ldrh	r0, [r2, #2]!
+	cmp	r0, r4
+	beq	.L739
+	adds	r3, r3, #1
+	uxth	r3, r3
+.L738:
+	cmp	r3, r1
+	bne	.L740
+	cmp	r3, #15
+	bhi	.L739
+	ldr	r2, .L741+16
+	strh	r4, [r2, r3, lsl #1]	@ movhi
+	adds	r3, r3, #1
+	ldr	r2, .L741+8
+	strh	r3, [r2, #0]	@ movhi
+.L739:
 	movs	r0, #0
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L863:
+	pop	{r3, r4, r5, pc}
+.L742:
 	.align	2
-.L862:
-	.word	.LANCHOR99
-	.word	.LANCHOR56
-	.word	.LANCHOR105
-	.word	.LANCHOR100
-	.word	.LANCHOR102
-	.word	.LANCHOR103
-	.word	.LANCHOR106
-	.word	.LANCHOR129
-	.word	.LANCHOR62
-	.word	.LANCHOR53
-	.word	.LANCHOR101
-	.word	.LANCHOR109
-	.word	.LANCHOR110
-	.word	.LANCHOR111
-	.word	.LANCHOR55
-	.word	.LANCHOR130
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.word	.LANCHOR68
-	.size	SupperBlkListInit, .-SupperBlkListInit
-	.section	.text.update_multiplier_value,"ax",%progbits
+.L741:
+	.word	.LANCHOR116
+	.word	.LANCHOR84
+	.word	.LANCHOR139
+	.word	.LANCHOR140-2
+	.word	.LANCHOR140
+	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
+	.section	.text.FtlGcReFreshBadBlk,"ax",%progbits
 	.align	1
-	.global	update_multiplier_value
+	.global	FtlGcReFreshBadBlk
 	.thumb
 	.thumb_func
-	.type	update_multiplier_value, %function
-update_multiplier_value:
+	.type	FtlGcReFreshBadBlk, %function
+FtlGcReFreshBadBlk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, r8, sl, lr}
-	movs	r4, #0
-	mov	r6, r0
-	mov	r5, r4
-	ldr	sl, .L869+8
-	ldr	r8, .L869+12
-	ldr	r7, .L869
-	b	.L865
-.L867:
-	mov	r1, r6
-	ldrb	r0, [r8, r5]	@ zero_extendqisi2
-	bl	V2P_block
-	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L866
-	ldrh	r3, [r7, #0]
-	adds	r4, r4, r3
-	uxth	r4, r4
-.L866:
-	adds	r5, r5, #1
-	uxth	r5, r5
-.L865:
-	ldrh	r3, [sl, #0]
-	cmp	r3, r5
-	bhi	.L867
-	cbz	r4, .L868
-	mov	r1, r4
-	mov	r0, #32768
-	bl	__aeabi_idiv
-	uxth	r4, r0
-.L868:
-	ldr	r3, .L869+4
-	movs	r2, #6
+	ldr	r3, .L746
+	push	{r4, lr}
+	ldrh	r3, [r3, #0]
+	cbz	r3, .L744
+	ldr	r2, .L746+4
+	ldrh	r1, [r2, #0]
+	movw	r2, #65535
+	cmp	r1, r2
+	bne	.L744
+	ldr	r4, .L746+8
+	ldrh	r2, [r4, #0]
+	cmp	r2, r3
+	bcc	.L745
+	movs	r3, #0
+	strh	r3, [r4, #0]	@ movhi
+.L745:
+	ldr	r3, .L746+12
+	ldrh	r2, [r4, #0]
+	ldrh	r0, [r3, r2, lsl #1]
+	bl	P2V_block_in_plane
+	bl	FtlGcRefreshBlock
+	ldrh	r3, [r4, #0]
+	adds	r3, r3, #1
+	strh	r3, [r4, #0]	@ movhi
+.L744:
 	movs	r0, #0
-	ldr	r3, [r3, #0]
-	mla	r6, r2, r6, r3
-	strh	r4, [r6, #4]	@ movhi
-	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
-.L870:
+	pop	{r4, pc}
+.L747:
 	.align	2
-.L869:
-	.word	.LANCHOR68
-	.word	.LANCHOR99
-	.word	.LANCHOR53
-	.word	.LANCHOR62
-	.size	update_multiplier_value, .-update_multiplier_value
-	.section	.text.GetFreeBlockMinEraseCount,"ax",%progbits
+.L746:
+	.word	.LANCHOR139
+	.word	.LANCHOR137
+	.word	.LANCHOR141
+	.word	.LANCHOR140
+	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
+	.section	.text.ftl_memset,"ax",%progbits
 	.align	1
-	.global	GetFreeBlockMinEraseCount
+	.global	ftl_memset
 	.thumb
 	.thumb_func
-	.type	GetFreeBlockMinEraseCount, %function
-GetFreeBlockMinEraseCount:
+	.type	ftl_memset, %function
+ftl_memset:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L874
-	ldr	r0, [r3, #0]
-	cbz	r0, .L872
-	ldr	r3, .L874+4
-	ldr	r3, [r3, #0]
-	subs	r0, r0, r3
-	ldr	r3, .L874+8
-	asrs	r0, r0, #1
-	muls	r0, r3, r0
-	ldr	r3, .L874+12
-	uxth	r0, r0
-	ldr	r3, [r3, #0]
-	ldrh	r0, [r3, r0, lsl #1]
-.L872:
-	bx	lr
-.L875:
-	.align	2
-.L874:
-	.word	.LANCHOR105
-	.word	.LANCHOR99
-	.word	-1431655765
-	.word	.LANCHOR96
-	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
-	.section	.text.GetFreeBlockMaxEraseCount,"ax",%progbits
+	b	memset
+	.size	ftl_memset, .-ftl_memset
+	.section	.text.ftl_memcpy,"ax",%progbits
 	.align	1
-	.global	GetFreeBlockMaxEraseCount
+	.global	ftl_memcpy
 	.thumb
 	.thumb_func
-	.type	GetFreeBlockMaxEraseCount, %function
-GetFreeBlockMaxEraseCount:
+	.type	ftl_memcpy, %function
+ftl_memcpy:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	memcpy
+	.size	ftl_memcpy, .-ftl_memcpy
+	.section	.text.ftl_memcpy32,"ax",%progbits
+	.align	1
+	.global	ftl_memcpy32
+	.thumb
+	.thumb_func
+	.type	ftl_memcpy32, %function
+ftl_memcpy32:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L883
+	movs	r3, #0
+	push	{r4, r5, lr}
+	mov	r4, r3
+	b	.L751
+.L752:
+	ldr	r5, [r1, r3]
+	adds	r4, r4, #1
+	str	r5, [r0, r3]
+	adds	r3, r3, #4
+.L751:
+	cmp	r4, r2
+	bne	.L752
+	pop	{r4, r5, pc}
+	.size	ftl_memcpy32, .-ftl_memcpy32
+	.section	.text.NandcCopy1KB,"ax",%progbits
+	.align	1
+	.global	NandcCopy1KB
+	.thumb
+	.thumb_func
+	.type	NandcCopy1KB, %function
+NandcCopy1KB:
+	@ args = 4, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
-	ldr	r3, [r3, #0]
-	cbz	r3, .L882
-	ldr	r2, .L883+4
-	movs	r1, #7
-	movw	r5, #65535
-	ldrh	r2, [r2, #0]
-	muls	r2, r1, r2
-	asrs	r2, r2, #3
-	cmp	r0, r2
-	it	gt
-	uxthgt	r0, r2
-	ldr	r2, .L883+8
-	movs	r6, #6
-	ldr	r1, [r2, #0]
-	ldr	r2, .L883+12
-	subs	r3, r3, r1
-	asrs	r3, r3, #1
-	muls	r3, r2, r3
-	movs	r2, #0
-	uxth	r3, r3
-	b	.L879
-.L881:
-	mul	r4, r6, r3
-	ldrh	r4, [r1, r4]
-	cmp	r4, r5
-	beq	.L880
-	adds	r2, r2, #1
-	mov	r3, r4
-	uxth	r2, r2
-.L879:
-	cmp	r2, r0
-	bne	.L881
-.L880:
-	ldr	r2, .L883+16
-	ldr	r2, [r2, #0]
-	ldrh	r0, [r2, r3, lsl #1]
+	cmp	r1, #1
+	mov	r4, r2
+	add	r2, r0, #4096
+	ldr	r5, [sp, #16]
+	add	r6, r0, #512
+	add	r2, r2, r4, lsl #9
+	bne	.L754
+	cbz	r3, .L755
+	mov	r0, r2
+	lsls	r2, r3, #30
+	mov	r1, r3
+	bne	.L756
+	mov	r2, #256
+	bl	ftl_memcpy32
+	b	.L755
+.L756:
+	mov	r2, #1024
+	bl	memcpy
+.L755:
+	cbz	r5, .L753
+	lsrs	r4, r4, #1
+	ldrb	r2, [r5, #1]	@ zero_extendqisi2
+	lsls	r3, r4, #4
+	lsls	r4, r4, #6
+	subs	r4, r4, r3
+	ldrb	r3, [r5, #2]	@ zero_extendqisi2
+	lsls	r3, r3, #16
+	orr	r3, r3, r2, lsl #8
+	ldrb	r2, [r5, #0]	@ zero_extendqisi2
+	orrs	r3, r3, r2
+	ldrb	r2, [r5, #3]	@ zero_extendqisi2
+	orr	r3, r3, r2, lsl #24
+	str	r3, [r6, r4]
 	pop	{r4, r5, r6, pc}
-.L882:
+.L754:
+	cbz	r3, .L758
 	mov	r0, r3
+	lsls	r3, r3, #30
+	mov	r1, r2
+	bne	.L759
+	mov	r2, #256
+	bl	ftl_memcpy32
+	b	.L758
+.L759:
+	mov	r2, #1024
+	bl	memcpy
+.L758:
+	cbz	r5, .L753
+	lsrs	r4, r4, #1
+	lsls	r3, r4, #4
+	lsls	r4, r4, #6
+	subs	r4, r4, r3
+	ldr	r3, [r6, r4]
+	lsrs	r2, r3, #8
+	strb	r3, [r5, #0]
+	strb	r2, [r5, #1]
+	lsrs	r2, r3, #16
+	lsrs	r3, r3, #24
+	strb	r2, [r5, #2]
+	strb	r3, [r5, #3]
+.L753:
 	pop	{r4, r5, r6, pc}
-.L884:
-	.align	2
-.L883:
-	.word	.LANCHOR105
-	.word	.LANCHOR106
-	.word	.LANCHOR99
-	.word	-1431655765
-	.word	.LANCHOR96
-	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
-	.section	.text.free_data_superblock,"ax",%progbits
+	.size	NandcCopy1KB, .-NandcCopy1KB
+	.section	.text.NandcXferData,"ax",%progbits
 	.align	1
-	.global	free_data_superblock
+	.global	NandcXferData
 	.thumb
 	.thumb_func
-	.type	free_data_superblock, %function
-free_data_superblock:
-	@ args = 0, pretend = 0, frame = 0
+	.type	NandcXferData, %function
+NandcXferData:
+	@ args = 4, pretend = 0, frame = 80
 	@ frame_needed = 0, uses_anonymous_args = 0
-	movw	r2, #65535
-	cmp	r0, r2
-	push	{r3, lr}
-	beq	.L886
-	ldr	r2, .L887
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	sub	sp, sp, #88
+	mov	r4, r3
+	mov	fp, r3
+	ldr	r3, .L798
+	mov	r6, r0
+	str	r1, [sp, #12]
+	lsls	r1, r4, #26
+	mov	sl, r2
+	ldr	r5, [sp, #120]
+	ldr	r8, [r3, r0, lsl #3]
+	bne	.L761
+	cbnz	r5, .L762
+	add	r0, sp, #20
+	movs	r1, #255
+	movs	r2, #64
+	add	r5, sp, #20
+	bl	memset
+.L762:
+	movs	r3, #0
+	mov	r0, r6
+	ldr	r1, [sp, #12]
+	mov	r2, sl
+	stmia	sp, {r4, r5}
+	bl	NandcXferStart
+	mov	r0, r6
+	bl	NandcXferComp
+	ldr	r3, [sp, #12]
+	cmp	r3, #0
+	bne	.L785
+	ldr	r3, .L798+4
+	lsr	r0, sl, #1
+	ldr	r1, .L798+8
+	ldr	r4, [r3, #0]
+	ldr	r3, [sp, #12]
+	cmp	r4, #24
+	ite	hi
+	movhi	r4, #128
+	movls	r4, #64
+	mov	r2, r3
+	b	.L765
+.L766:
+	ldr	r7, [r1, #4]
+	lsrs	r3, r3, #2
+	adds	r2, r2, #1
+	ldr	r3, [r7, r3, lsl #2]
+	lsrs	r7, r3, #8
+	strb	r3, [r5, #0]
+	strb	r7, [r5, #1]
+	lsrs	r7, r3, #16
+	lsrs	r3, r3, #24
+	strb	r7, [r5, #2]
+	strb	r3, [r5, #3]
+	adds	r5, r5, #4
+	mov	r3, r6
+.L765:
+	cmp	r2, r0
+	add	r6, r3, r4
+	bcc	.L766
+	ldr	r3, .L798+4
+	lsr	sl, sl, #2
+	ldr	r0, [r3, #0]
+	ldr	r3, .L798+12
+	ldr	r1, [r3, #0]
+	movs	r3, #0
+	mov	r4, r3
+	b	.L767
+.L773:
+	add	r2, r3, #8
+	ldr	r2, [r8, r2, lsl #2]
+	str	r2, [sp, #84]
+	ldr	r2, [sp, #84]
+	lsls	r2, r2, #29
+	bmi	.L788
+	ldr	r2, [sp, #84]
+	ands	r2, r2, #32768
+	bne	.L788
+	cmp	r1, #5
+	bls	.L769
+	ldr	r7, [sp, #84]
+	ldr	r5, [sp, #84]
+	ldr	r6, [sp, #84]
+	ubfx	r7, r7, #3, #5
+	ldr	r2, [sp, #84]
+	ubfx	r5, r5, #27, #1
+	ubfx	r6, r6, #16, #5
+	ubfx	r2, r2, #29, #1
+	orr	r5, r7, r5, lsl #5
+	orr	r2, r6, r2, lsl #5
+	cmp	r5, r2
+	ldr	r5, [sp, #84]
+	bls	.L770
+	ldr	r2, [sp, #84]
+	ubfx	r5, r5, #3, #5
+	ubfx	r2, r2, #27, #1
+	b	.L797
+.L770:
+	ldr	r2, [sp, #84]
+	ubfx	r5, r5, #16, #5
+	ubfx	r2, r2, #29, #1
+	b	.L797
+.L769:
+	cmp	r1, #3
+	bls	.L771
+	ldr	r7, [sp, #84]
+	ldr	r5, [sp, #84]
+	ldr	r6, [sp, #84]
+	ubfx	r7, r7, #3, #5
+	ldr	r2, [sp, #84]
+	ubfx	r5, r5, #28, #1
+	ubfx	r6, r6, #16, #5
+	ubfx	r2, r2, #30, #1
+	orr	r5, r7, r5, lsl #5
+	orr	r2, r6, r2, lsl #5
+	cmp	r5, r2
+	ldr	r5, [sp, #84]
+	bls	.L772
+	ldr	r2, [sp, #84]
+	ubfx	r5, r5, #3, #5
+	ubfx	r2, r2, #28, #1
+	b	.L797
+.L772:
+	ldr	r2, [sp, #84]
+	ubfx	r5, r5, #16, #5
+	ubfx	r2, r2, #30, #1
+.L797:
+	orr	r2, r5, r2, lsl #5
+.L771:
+	cmp	r4, r2
+	it	cc
+	movcc	r4, r2
+	b	.L768
+.L788:
+	mov	r4, #-1
+.L768:
+	adds	r3, r3, #1
+.L767:
+	cmp	r3, sl
+	bcs	.L763
+	cmp	r0, #0
+	bne	.L773
+	b	.L763
+.L785:
+	movs	r4, #0
+.L763:
+	movs	r3, #0
+	str	r3, [r8, #16]
+	b	.L774
+.L761:
+	ldr	r3, [sp, #12]
+	mov	r7, #0
+	cmp	r3, #1
+	bne	.L795
+	b	.L775
+.L778:
+	cmp	r5, #0
+	ite	ne
+	movne	r3, #2
+	moveq	r3, #0
+	and	r4, r7, #3
+	mov	r0, r8
+	movs	r1, #1
+	mla	r3, r7, r3, r5
+	mov	r2, r4
+	adds	r7, r7, #2
+	str	r3, [sp, #0]
+	mov	r3, fp
+	bl	NandcCopy1KB
+	movs	r3, #0
+	mov	r0, r6
+	str	r3, [sp, #0]
+	str	r3, [sp, #4]
+	movs	r1, #1
+	movs	r2, #2
+	mov	r3, r4
+	bl	NandcXferStart
+	mov	r0, r6
+	bl	NandcXferComp
+	add	fp, fp, #1024
+.L775:
+	cmp	r7, sl
+	bcc	.L778
+	movs	r4, #0
+	b	.L774
+.L795:
+	mov	r1, r7
+	movs	r2, #2
+	mov	r3, r7
+	str	r7, [sp, #0]
+	str	r7, [sp, #4]
+	mov	r4, r7
+	bl	NandcXferStart
+	b	.L779
+.L783:
+	mov	r0, r6
+	bl	NandcXferComp
+	ldr	r3, [r8, #32]
+	add	ip, r7, #2
+	cmp	ip, sl
+	str	r3, [sp, #84]
+	bcs	.L780
+	movs	r3, #0
+	mov	r0, r6
+	str	r3, [sp, #0]
+	mov	r1, r3
+	str	r3, [sp, #4]
+	movs	r2, #2
+	and	r3, ip, #3
+	str	ip, [sp, #8]
+	bl	NandcXferStart
+	ldr	ip, [sp, #8]
+.L780:
+	ldr	r3, [sp, #84]
+	lsls	r1, r3, #29
+	bmi	.L792
+	ldr	r2, [sp, #84]
+	ldr	r3, [sp, #84]
+	ubfx	r2, r2, #3, #5
+	ubfx	r3, r3, #27, #1
+	orr	r3, r2, r3, lsl #5
+	cmp	r4, r3
+	it	cc
+	movcc	r4, r3
+	b	.L781
+.L792:
+	mov	r4, #-1
+.L781:
+	cmp	r5, #0
+	ite	ne
+	movne	r3, #2
+	moveq	r3, #0
+	sub	r2, ip, #2
+	mov	r0, r8
 	movs	r1, #0
+	mla	r7, r7, r3, r5
+	and	r2, r2, #3
+	mov	r3, fp
+	str	ip, [sp, #8]
+	add	fp, fp, #1024
+	str	r7, [sp, #0]
+	bl	NandcCopy1KB
+	ldr	ip, [sp, #8]
+	mov	r7, ip
+.L779:
+	cmp	r7, sl
+	bcc	.L783
+.L774:
+	ldr	r3, .L798+12
+	ldr	r3, [r3, #0]
+	cmp	r3, #5
+	bls	.L784
+	ldr	r3, [sp, #12]
+	cbnz	r3, .L784
+	ldr	r3, [r8, #0]
+	and	r2, r3, #139264
+	cmp	r2, #139264
+	bne	.L784
+	mov	r4, #-1
+	orr	r3, r3, #131072
+	str	r3, [r8, #0]
+.L784:
+	mov	r0, r4
+	add	sp, sp, #88
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L799:
+	.align	2
+.L798:
+	.word	.LANCHOR5
+	.word	.LANCHOR36
+	.word	.LANCHOR38
+	.word	.LANCHOR37
+	.size	NandcXferData, .-NandcXferData
+	.section	.text.FlashProgPage,"ax",%progbits
+	.align	1
+	.global	FlashProgPage
+	.thumb
+	.thumb_func
+	.type	FlashProgPage, %function
+FlashProgPage:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	mov	r8, r3
+	ldr	r3, .L803
+	mov	r5, r1
+	mov	r6, r2
+	mov	r4, r0
+	ldrb	r7, [r3, #9]	@ zero_extendqisi2
+	cbnz	r0, .L801
+	ldr	r3, .L803+4
+	ldr	r2, .L803+8
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	ldr	r2, [r2, #0]
-	strh	r1, [r2, r0, lsl #1]	@ movhi
-	bl	INSERT_FREE_LIST
-.L886:
-	movs	r0, #0
-	pop	{r3, pc}
-.L888:
+	muls	r3, r2, r3
+	cmp	r1, r3
+	bcs	.L801
+	ldr	r3, .L803+12
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbnz	r3, .L802
+	subs	r7, r7, #2
+	b	.L801
+.L802:
+	movs	r7, #4
+.L801:
+	mov	r0, r4
+	bl	NandcWaitFlashReady
+	mov	r0, r4
+	bl	NandcFlashCs
+	mov	r0, r4
+	mov	r1, r5
+	bl	FlashProgFirstCmd
+	uxtb	r2, r7
+	mov	r3, r6
+	movs	r1, #1
+	mov	r0, r4
+	str	r8, [sp, #0]
+	bl	NandcXferData
+	mov	r1, r5
+	mov	r0, r4
+	bl	FlashProgSecondCmd
+	mov	r0, r4
+	bl	NandcWaitFlashReady
+	mov	r1, r5
+	mov	r0, r4
+	bl	FlashReadStatus
+	mov	r5, r0
+	mov	r0, r4
+	bl	NandcFlashDeCs
+	and	r0, r5, #1
+	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
+.L804:
 	.align	2
-.L887:
-	.word	.LANCHOR101
-	.size	free_data_superblock, .-free_data_superblock
-	.section	.text.FtlGcBufInit,"ax",%progbits
+.L803:
+	.word	.LANCHOR18
+	.word	.LANCHOR1
+	.word	.LANCHOR2
+	.word	.LANCHOR0
+	.size	FlashProgPage, .-FlashProgPage
+	.section	.text.FlashPageProgMsbFFData,"ax",%progbits
 	.align	1
-	.global	FtlGcBufInit
+	.global	FlashPageProgMsbFFData
 	.thumb
 	.thumb_func
-	.type	FtlGcBufInit, %function
-FtlGcBufInit:
-	@ args = 0, pretend = 0, frame = 8
+	.type	FlashPageProgMsbFFData, %function
+FlashPageProgMsbFFData:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L894
-	movs	r2, #0
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	ldr	r3, .L813
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	mov	r4, r2
-	str	r2, [r3, #0]
-	ldr	r3, .L894+4
-	ldrh	ip, [r3, #0]
-	ldr	r3, .L894+8
-	ldr	r7, [r3, #0]
-	ldr	r3, .L894+12
-	ldr	r6, [r3, #0]
-	ldr	r3, .L894+16
-	ldr	r1, [r3, #0]
-	ldr	r3, .L894+20
-	ldrh	r5, [r3, #0]
-	ldr	r3, .L894+24
-	str	r5, [sp, #4]
-	ldrh	fp, [r3, #0]
-	ldr	r3, .L894+28
-	ldr	r0, [r3, #0]
-	mov	r3, r2
-	b	.L890
-.L891:
-	movs	r5, #1
-	bic	r4, r4, #3
-	adds	r3, r3, r5
-	bic	r2, r2, #3
-	adds	r4, r7, r4
-	adds	r2, r6, r2
-	str	r4, [r1, #-12]
-	uxth	r3, r3
-	str	r2, [r1, #-8]
-	str	r5, [r1, #-4]
-	str	r4, [r0, #-28]
-	mov	r4, r8
-	str	r2, [r0, #-24]
-	mov	r2, sl
-.L890:
-	adds	r1, r1, #12
-	ldr	r5, [sp, #4]
-	adds	r0, r0, #36
-	cmp	r3, ip
-	add	r8, r4, r5
-	add	sl, r2, fp
-	bne	.L891
-	ldr	r1, .L894+8
-	movs	r4, #12
-	ldr	r2, .L894+32
-	mov	fp, #0
-	ldr	ip, [r1, #0]
-	ldr	r1, .L894+20
-	ldr	r8, [r2, #0]
-	ldr	r2, .L894+16
-	ldrh	r7, [r1, #0]
-	ldr	r1, .L894+12
-	ldr	r2, [r2, #0]
-	ldr	r6, [r1, #0]
-	ldr	r1, .L894+24
-	ldrh	r5, [r1, #0]
-	b	.L892
-.L893:
-	mul	r1, r4, r3
-	mul	r0, r7, r3
-	add	sl, r2, r1
-	bic	r0, r0, #3
-	str	fp, [sl, #8]
-	add	r0, ip, r0
-	str	r0, [r2, r1]
-	mul	r1, r5, r3
-	adds	r3, r3, #1
-	uxth	r3, r3
-	bic	r1, r1, #3
-	adds	r1, r6, r1
-	str	r1, [sl, #4]
-.L892:
-	cmp	r3, r8
-	bcc	.L893
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L895:
+	ldr	r2, .L813+4
+	mov	r8, r0
+	ldr	r3, [r3, #0]
+	mov	r7, r1
+	ldrb	r2, [r2, #0]	@ zero_extendqisi2
+	ldrb	r3, [r3, #19]	@ zero_extendqisi2
+	cbz	r2, .L806
+	ldr	r2, .L813+8
+	ldr	r1, [r2, #0]
+	ldr	r2, .L813+12
+	cmp	r1, r2
+	beq	.L805
+.L806:
+	subs	r2, r3, #5
+	cmp	r2, #2
+	bls	.L810
+	cmp	r3, #68
+	beq	.L810
+	cmp	r3, #35
+	beq	.L810
+	cmp	r3, #19
+	bne	.L805
+	b	.L810
+.L811:
+	ldrh	r3, [sl, r4, lsl #1]
+	cmp	r3, fp
+	bne	.L805
+	movs	r1, #255
+	mov	r2, #32768
+	ldr	r0, [r5, #0]
+	bl	memset
+	adds	r1, r4, r7
+	adds	r4, r4, #1
+	mov	r0, r8
+	ldr	r2, [r5, #0]
+	movs	r3, #0
+	bl	FlashProgPage
+	uxth	r4, r4
+	b	.L812
+.L810:
+	ldr	r6, .L813
+	movw	fp, #65535
+	ldr	sl, .L813+20
+	ldr	r5, .L813+16
+.L812:
+	ldr	r3, [r6, #0]
+	ldrh	r3, [r3, #10]
+	cmp	r3, r4
+	bhi	.L811
+.L805:
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L814:
 	.align	2
-.L894:
-	.word	.LANCHOR131
-	.word	.LANCHOR53
-	.word	.LANCHOR132
-	.word	.LANCHOR133
-	.word	.LANCHOR134
-	.word	.LANCHOR73
-	.word	.LANCHOR74
-	.word	.LANCHOR135
-	.word	.LANCHOR136
-	.size	FtlGcBufInit, .-FtlGcBufInit
-	.section	.text.FtlVariablesInit,"ax",%progbits
+.L813:
+	.word	.LANCHOR23
+	.word	.LANCHOR7
+	.word	.LANCHOR142
+	.word	1446522928
+	.word	.LANCHOR143
+	.word	.LANCHOR9
+	.size	FlashPageProgMsbFFData, .-FlashPageProgMsbFFData
+	.section	.text.FlashReadRawPage,"ax",%progbits
 	.align	1
-	.global	FtlVariablesInit
+	.global	FlashReadRawPage
 	.thumb
 	.thumb_func
-	.type	FtlVariablesInit, %function
-FtlVariablesInit:
+	.type	FlashReadRawPage, %function
+FlashReadRawPage:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	movs	r4, #0
-	ldr	r3, .L897
-	movw	r2, #65535
-	ldr	r5, .L897+4
-	mov	r1, r4
-	str	r4, [r3, #0]
-	ldr	r3, .L897+8
-	strh	r2, [r3, #0]	@ movhi
-	mov	r2, #-1
-	ldr	r3, .L897+12
-	str	r4, [r3, #0]
-	ldr	r3, .L897+16
-	str	r4, [r3, #0]
-	ldr	r3, .L897+20
-	str	r2, [r3, #0]
-	ldr	r3, .L897+24
-	str	r4, [r3, #0]
-	ldr	r3, .L897+28
-	strh	r4, [r3, #0]	@ movhi
-	ldr	r3, .L897+32
-	ldrh	r2, [r3, #0]
-	ldr	r3, .L897+36
-	lsls	r2, r2, #1
-	ldr	r0, [r3, #0]
-	bl	memset
-	ldrh	r2, [r5, #0]
-	ldr	r3, .L897+40
-	mov	r1, r4
-	lsls	r2, r2, #1
-	ldr	r0, [r3, #0]
-	bl	memset
-	ldr	r3, .L897+44
-	ldrh	r2, [r5, #0]
-	mov	r1, r4
-	ldr	r0, [r3, #0]
-	lsls	r2, r2, #1
-	bl	memset
-	mov	r1, r4
-	movs	r2, #48
-	ldr	r0, .L897+48
-	bl	memset
-	mov	r1, r4
-	mov	r2, #512
-	ldr	r0, .L897+52
-	bl	memset
-	bl	FtlGcBufInit
-	bl	FtlL2PDataInit
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	mov	r8, r3
+	ldr	r3, .L818
+	mov	r6, r1
+	mov	r5, r2
+	mov	r4, r0
+	ldrb	r7, [r3, #9]	@ zero_extendqisi2
+	cbnz	r0, .L816
+	ldr	r3, .L818+4
+	ldr	r2, .L818+8
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	ldr	r2, [r2, #0]
+	muls	r3, r2, r3
+	cmp	r1, r3
+	it	cc
+	movcc	r7, #4
+.L816:
 	mov	r0, r4
-	pop	{r3, r4, r5, pc}
-.L898:
+	bl	NandcWaitFlashReady
+	mov	r0, r4
+	bl	NandcFlashCs
+	mov	r1, r6
+	mov	r0, r4
+	bl	FlashReadCmd
+	mov	r0, r4
+	bl	NandcWaitFlashReady
+	mov	r3, r5
+	movs	r1, #0
+	mov	r2, r7
+	mov	r0, r4
+	str	r8, [sp, #0]
+	bl	NandcXferData
+	mov	r5, r0
+	mov	r0, r4
+	bl	NandcFlashDeCs
+	mov	r0, r5
+	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
+.L819:
 	.align	2
-.L897:
-	.word	.LANCHOR137
-	.word	.LANCHOR56
-	.word	.LANCHOR138
-	.word	.LANCHOR139
-	.word	.LANCHOR140
-	.word	.LANCHOR141
-	.word	.LANCHOR128
-	.word	.LANCHOR86
-	.word	.LANCHOR77
-	.word	.LANCHOR87
-	.word	.LANCHOR96
-	.word	.LANCHOR142
-	.word	.LANCHOR143
-	.word	.LANCHOR144
-	.size	FtlVariablesInit, .-FtlVariablesInit
-	.section	.text.FtlGcBufFree,"ax",%progbits
+.L818:
+	.word	.LANCHOR18
+	.word	.LANCHOR1
+	.word	.LANCHOR2
+	.size	FlashReadRawPage, .-FlashReadRawPage
+	.section	.text.HynixReadRetrial,"ax",%progbits
 	.align	1
-	.global	FtlGcBufFree
+	.global	HynixReadRetrial
 	.thumb
 	.thumb_func
-	.type	FtlGcBufFree, %function
-FtlGcBufFree:
-	@ args = 0, pretend = 0, frame = 0
+	.type	HynixReadRetrial, %function
+HynixReadRetrial:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L906
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	movs	r5, #36
-	ldr	r6, [r3, #0]
-	ldr	r3, .L906+4
-	ldr	r4, [r3, #0]
-	movs	r3, #0
-	mov	fp, r3
-	b	.L900
-.L903:
-	mov	ip, #12
-	mul	r3, ip, r2
-	add	sl, r4, r3
-	ldr	ip, [r4, r3]
-	ldr	r3, [r7, #8]
-	cmp	ip, r3
-	bne	.L901
-	mov	r3, r8
-	str	fp, [sl, #8]
-	b	.L902
-.L901:
-	adds	r2, r2, #1
-	uxth	r2, r2
-.L905:
-	cmp	r2, r6
-	bcc	.L903
-	mov	r3, r8
-.L902:
-	adds	r3, r3, #1
-	uxth	r3, r3
-.L900:
-	cmp	r3, r1
-	bcs	.L899
-	mla	r7, r5, r3, r0
-	movs	r2, #0
-	mov	r8, r3
-	b	.L905
-.L899:
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L907:
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	sl, r2
+	ldr	r2, .L835
+	mov	r7, r3
+	mov	r6, r0
+	str	r1, [sp, #4]
+	adds	r3, r2, r0
+	mov	r8, #0
+	ldrb	fp, [r2, #2]	@ zero_extendqisi2
+	mov	r5, #-1
+	ldr	r2, .L835+4
+	ldrb	r4, [r3, #12]	@ zero_extendqisi2
+	ldr	r2, [r2, #0]
+	ldrb	r2, [r2, #19]	@ zero_extendqisi2
+	cmp	r2, #7
+	it	eq
+	ldrbeq	r4, [r3, #20]	@ zero_extendqisi2
+	bl	NandcWaitFlashReady
+	b	.L822
+.L827:
+	adds	r4, r4, #1
+	ldr	r2, .L835
+	mov	r0, r6
+	uxtb	r4, r4
+	cmp	r4, fp
+	it	cs
+	movcs	r4, #0
+	ldrb	r1, [r2, #1]	@ zero_extendqisi2
+	mov	r3, r4
+	adds	r2, r2, #4
+	bl	HynixSetRRPara
+	mov	r3, r7
+	mov	r0, r6
+	ldr	r1, [sp, #4]
+	mov	r2, sl
+	bl	FlashReadRawPage
+	adds	r3, r0, #1
+	beq	.L824
+	ldr	r2, .L835+8
+	cmp	r5, #-1
+	it	eq
+	moveq	r5, r0
+	ldrb	r3, [r2, #0]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r0, r3, lsr #2
+	bcc	.L833
+	movs	r7, #0
+	mov	sl, r7
+.L824:
+	add	r8, r8, #1
+.L822:
+	cmp	r8, fp
+	bcc	.L827
+	b	.L826
+.L833:
+	mov	r5, r0
+.L826:
+	ldr	r3, .L835+4
+	ldr	r3, [r3, #0]
+	ldrb	r3, [r3, #19]	@ zero_extendqisi2
+	cmp	r3, #7
+	ldr	r3, .L835
+	add	r6, r3, r6
+	ldr	r3, .L835+8
+	it	eq
+	strbeq	r4, [r6, #20]
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	it	ne
+	strbne	r4, [r6, #12]
+	add	r3, r3, r3, lsl #1
+	cmp	r5, r3, lsr #2
+	bcc	.L830
+	cmp	r5, #-1
+	ite	eq
+	moveq	r5, #-1
+	movne	r5, #256
+.L830:
+	mov	r0, r5
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L836:
 	.align	2
-.L906:
-	.word	.LANCHOR136
-	.word	.LANCHOR134
-	.size	FtlGcBufFree, .-FtlGcBufFree
-	.section	.text.FtlGcBufAlloc,"ax",%progbits
+.L835:
+	.word	.LANCHOR31
+	.word	.LANCHOR23
+	.word	.LANCHOR29
+	.size	HynixReadRetrial, .-HynixReadRetrial
+	.section	.text.MicronReadRetrial,"ax",%progbits
 	.align	1
-	.global	FtlGcBufAlloc
+	.global	MicronReadRetrial
 	.thumb
 	.thumb_func
-	.type	FtlGcBufAlloc, %function
-FtlGcBufAlloc:
-	@ args = 0, pretend = 0, frame = 0
+	.type	MicronReadRetrial, %function
+MicronReadRetrial:
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L915
-	push	{r4, r5, r6, r7, r8, sl, lr}
-	movs	r7, #12
-	ldr	r8, [r3, #0]
-	movs	r6, #1
-	ldr	r3, .L915+4
-	movs	r5, #36
-	ldr	ip, [r3, #0]
-	movs	r3, #0
-	b	.L909
-.L912:
-	mla	r4, r7, r2, ip
-	ldr	sl, [r4, #8]
-	cmp	sl, #0
-	bne	.L910
-	mla	r2, r5, r3, r0
-	str	r6, [r4, #8]
-	ldr	sl, [r4, #0]
-	ldr	r4, [r4, #4]
-	str	sl, [r2, #8]
-	str	r4, [r2, #12]
-	b	.L911
-.L910:
-	adds	r2, r2, #1
-	uxth	r2, r2
-	b	.L913
-.L914:
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	fp, r3
+	ldr	r3, .L851
+	mov	sl, r0
+	sub	sp, sp, #24
+	ldrb	r0, [r3, #0]	@ zero_extendqisi2
+	ldr	r3, .L851+4
+	str	r1, [sp, #16]
+	str	r2, [sp, #20]
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbnz	r3, .L838
+	add	r0, r0, r0, lsl #1
+	ubfx	r0, r0, #2, #8
+	b	.L850
+.L838:
+	movs	r1, #3
+	bl	__aeabi_idiv
+	uxtb	r0, r0
+.L850:
+	str	r0, [sp, #12]
+	mov	r0, sl
+	bl	NandcWaitFlashReady
+	ldr	r3, .L851+8
+	mov	r8, #0
+	mov	r4, #-1
+	ldr	r6, [r3, sl, lsl #3]
+	add	r3, r3, sl, lsl #3
+	ldrb	r7, [r3, #4]	@ zero_extendqisi2
+	adds	r7, r7, #8
+	lsls	r7, r7, #8
+	adds	r5, r6, r7
+	b	.L840
+.L844:
+	movs	r2, #239
+	movs	r3, #137
+	str	r2, [r5, #8]
+	movs	r0, #200
+	str	r3, [r5, #4]
+	bl	udelay
 	movs	r2, #0
-.L913:
-	cmp	r2, r8
-	bcc	.L912
-.L911:
-	adds	r3, r3, #1
-	uxth	r3, r3
-.L909:
-	cmp	r3, r1
-	bcc	.L914
-	pop	{r4, r5, r6, r7, r8, sl, pc}
-.L916:
+	add	ip, r8, #1
+	mov	r0, sl
+	str	ip, [r5, #0]
+	mov	r3, fp
+	str	r2, [r5, #0]
+	ldr	r1, [sp, #16]
+	str	r2, [r5, #0]
+	str	r2, [r5, #0]
+	ldr	r2, [sp, #20]
+	str	ip, [sp, #8]
+	bl	FlashReadRawPage
+	ldr	ip, [sp, #8]
+	adds	r2, r0, #1
+	beq	.L841
+	ldr	r3, [sp, #12]
+	cmp	r4, #-1
+	it	eq
+	moveq	r4, r0
+	cmp	r0, r3
+	bcc	.L848
+	mov	fp, #0
+	str	fp, [sp, #20]
+.L841:
+	mov	r8, ip
+.L840:
+	ldr	r2, .L851+12
+	ldrb	r3, [r2, #0]	@ zero_extendqisi2
+	cmp	r8, r3
+	bcc	.L844
+	b	.L843
+.L848:
+	mov	r4, r0
+.L843:
+	movs	r3, #239
+	movs	r0, #200
+	str	r3, [r5, #8]
+	movs	r3, #137
+	str	r3, [r5, #4]
+	bl	udelay
+	movs	r3, #0
+	str	r3, [r6, r7]
+	str	r3, [r6, r7]
+	str	r3, [r6, r7]
+	str	r3, [r6, r7]
+	ldr	r3, [sp, #12]
+	cmp	r4, r3
+	bcc	.L845
+	ldr	r0, .L851+16
+	mov	r1, r8
+	ldr	r2, [sp, #16]
+	mov	r3, r8
+	cmp	r4, #-1
+	ite	eq
+	moveq	r4, #-1
+	movne	r4, #256
+	str	r4, [sp, #0]
+	bl	printf
+.L845:
+	mov	r0, r4
+	add	sp, sp, #24
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L852:
 	.align	2
-.L915:
-	.word	.LANCHOR136
-	.word	.LANCHOR134
-	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
-	.section	.text.IsBlkInGcList,"ax",%progbits
+.L851:
+	.word	.LANCHOR29
+	.word	.LANCHOR7
+	.word	.LANCHOR5
+	.word	.LANCHOR144
+	.word	.LC7
+	.size	MicronReadRetrial, .-MicronReadRetrial
+	.section	.text.SamsungReadRetrial,"ax",%progbits
 	.align	1
-	.global	IsBlkInGcList
+	.global	SamsungReadRetrial
 	.thumb
 	.thumb_func
-	.type	IsBlkInGcList, %function
-IsBlkInGcList:
+	.type	SamsungReadRetrial, %function
+SamsungReadRetrial:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L922
-	push	{r4, lr}
-	ldrh	r1, [r3, #0]
-	ldr	r3, .L922+4
-	ldr	r2, [r3, #0]
-	movs	r3, #0
-	b	.L918
-.L920:
-	ldrh	r4, [r2], #2
-	cmp	r4, r0
-	beq	.L921
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r7, r0
+	mov	r8, r2
+	mov	r6, r3
+	mov	fp, r1
+	bl	NandcWaitFlashReady
+	ldr	r3, .L863
+	movs	r5, #1
+	mov	r4, #-1
+	ldr	r2, [r3, r7, lsl #3]
+	add	r3, r3, r7, lsl #3
+	ldrb	sl, [r3, #4]	@ zero_extendqisi2
+	add	sl, sl, #8
+	add	sl, r2, sl, lsl #8
+	b	.L854
+.L858:
+	mov	r0, sl
+	uxtb	r1, r5
+	bl	SamsungSetRRPara
+	mov	r1, fp
+	mov	r0, r7
+	mov	r2, r8
+	mov	r3, r6
+	bl	FlashReadRawPage
+	adds	r1, r0, #1
+	beq	.L855
+	ldr	r2, .L863+4
+	cmp	r4, #-1
+	it	eq
+	moveq	r4, r0
+	ldrb	r3, [r2, #0]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r0, r3, lsr #2
+	bcc	.L861
+	movs	r6, #0
+	mov	r8, r6
+.L855:
+	adds	r5, r5, #1
+.L854:
+	ldr	r2, .L863+8
+	ldrb	r3, [r2, #0]	@ zero_extendqisi2
 	adds	r3, r3, #1
-	uxth	r3, r3
-.L918:
-	cmp	r3, r1
-	bne	.L920
-	movs	r0, #0
-	pop	{r4, pc}
-.L921:
-	movs	r0, #1
-	pop	{r4, pc}
-.L923:
+	cmp	r5, r3
+	bcc	.L858
+	b	.L857
+.L861:
+	mov	r4, r0
+.L857:
+	movs	r1, #0
+	mov	r0, sl
+	bl	SamsungSetRRPara
+	ldr	r3, .L863+4
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r4, r3, lsr #2
+	bcc	.L859
+	cmp	r4, #-1
+	ite	eq
+	moveq	r4, #-1
+	movne	r4, #256
+.L859:
+	mov	r0, r4
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L864:
 	.align	2
-.L922:
-	.word	.LANCHOR145
-	.word	.LANCHOR146
-	.size	IsBlkInGcList, .-IsBlkInGcList
-	.section	.text.FtlGcUpdatePage,"ax",%progbits
+.L863:
+	.word	.LANCHOR5
+	.word	.LANCHOR29
+	.word	.LANCHOR144
+	.size	SamsungReadRetrial, .-SamsungReadRetrial
+	.section	.text.ToshibaReadRetrial,"ax",%progbits
 	.align	1
-	.global	FtlGcUpdatePage
+	.global	ToshibaReadRetrial
 	.thumb
 	.thumb_func
-	.type	FtlGcUpdatePage, %function
-FtlGcUpdatePage:
-	@ args = 0, pretend = 0, frame = 0
+	.type	ToshibaReadRetrial, %function
+ToshibaReadRetrial:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	mov	r4, r0
-	ubfx	r0, r0, #10, #16
-	mov	r5, r1
-	mov	r6, r2
-	bl	P2V_block_in_plane
-	ldr	r3, .L928
-	ldrh	r7, [r3, #0]
-	ldr	r3, .L928+4
-	ldr	r2, [r3, #0]
-	movs	r3, #0
-	mov	r1, r2
-	b	.L925
-.L927:
-	ldrh	ip, [r1], #2
-	cmp	ip, r0
-	beq	.L926
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r7, r0
+	mov	fp, r2
+	mov	r8, r3
+	str	r1, [sp, #4]
+	bl	NandcWaitFlashReady
+	ldr	r3, .L887
+	ldr	r2, [r3, r7, lsl #3]
+	add	r3, r3, r7, lsl #3
+	ldrb	r4, [r3, #4]	@ zero_extendqisi2
+	ldr	r3, .L887+4
+	adds	r4, r4, #8
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	add	r4, r2, r4, lsl #8
+	subs	r3, r3, #67
+	cmp	r3, #1
+	bls	.L882
+	ldr	r3, .L887+8
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L883
+	movs	r0, #0
+	mov	sl, #1
+	bl	NandcSetDdrMode
+	b	.L867
+.L883:
+	mov	sl, r3
+.L867:
+	movs	r3, #92
+	str	r3, [r4, #8]
+	movs	r3, #197
+	str	r3, [r4, #8]
+	b	.L866
+.L882:
+	mov	sl, #0
+.L866:
+	movs	r6, #1
+	mov	r5, #-1
+	b	.L868
+.L877:
+	ldr	r1, .L887+4
+	mov	r0, r4
+	ldrb	r3, [r1, #0]	@ zero_extendqisi2
+	uxtb	r1, r6
+	subs	r3, r3, #67
+	cmp	r3, #1
+	bhi	.L869
+	bl	SandiskSetRRPara
+	b	.L870
+.L869:
+	bl	ToshibaSetRRPara
+.L870:
+	ldr	r2, .L887+4
+	ldrb	r3, [r2, #0]	@ zero_extendqisi2
+	cmp	r3, #34
+	bne	.L871
+	ldr	r1, .L887+12
+	ldrb	r3, [r1, #0]	@ zero_extendqisi2
+	subs	r3, r3, #3
+	cmp	r6, r3
+	bne	.L871
+	movs	r2, #179
+	str	r2, [r4, #8]
+.L871:
+	movs	r3, #38
+	str	r3, [r4, #8]
+	movs	r3, #93
+	str	r3, [r4, #8]
+	cmp	sl, #0
+	beq	.L872
+	movs	r0, #4
+	bl	NandcSetDdrMode
+	ldr	r1, [sp, #4]
+	mov	r2, fp
+	mov	r3, r8
+	mov	r0, r7
+	bl	FlashReadRawPage
+	mov	r3, r0
+	movs	r0, #0
+	str	r3, [sp, #0]
+	bl	NandcSetDdrMode
+	ldr	r3, [sp, #0]
+	b	.L873
+.L872:
+	mov	r3, r8
+	mov	r0, r7
+	ldr	r1, [sp, #4]
+	mov	r2, fp
+	bl	FlashReadRawPage
+	mov	r3, r0
+.L873:
+	adds	r0, r3, #1
+	beq	.L874
+	ldr	r1, .L887+16
+	cmp	r5, #-1
+	it	eq
+	moveq	r5, r3
+	ldrb	r2, [r1, #0]	@ zero_extendqisi2
+	add	r2, r2, r2, lsl #1
+	cmp	r3, r2, lsr #2
+	bcc	.L885
+	mov	r8, #0
+	mov	fp, r8
+.L874:
+	adds	r6, r6, #1
+.L868:
+	ldr	r2, .L887+12
+	ldrb	r3, [r2, #0]	@ zero_extendqisi2
 	adds	r3, r3, #1
-	uxth	r3, r3
-.L925:
-	cmp	r3, r7
-	bne	.L927
-	strh	r0, [r2, r3, lsl #1]	@ movhi
-	ldr	r3, .L928
-	ldrh	r2, [r3, #0]
-	adds	r2, r2, #1
-	strh	r2, [r3, #0]	@ movhi
-.L926:
-	ldr	r0, .L928+8
-	movs	r1, #12
-	ldr	r3, .L928+12
-	ldr	r0, [r0, #0]
-	ldrh	r2, [r3, #0]
-	muls	r1, r2, r1
-	adds	r7, r0, r1
-	str	r4, [r0, r1]
-	adds	r2, r2, #1
-	str	r5, [r7, #4]
-	str	r6, [r7, #8]
-	strh	r2, [r3, #0]	@ movhi
-	pop	{r3, r4, r5, r6, r7, pc}
-.L929:
+	cmp	r6, r3
+	bcc	.L877
+	b	.L876
+.L885:
+	mov	r5, r3
+.L876:
+	ldr	r3, .L887+4
+	movs	r1, #0
+	mov	r0, r4
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	subs	r3, r3, #67
+	cmp	r3, #1
+	bhi	.L878
+	bl	SandiskSetRRPara
+	b	.L879
+.L878:
+	bl	ToshibaSetRRPara
+.L879:
+	movs	r3, #255
+	str	r3, [r4, #8]
+	ldr	r3, .L887+16
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r5, r3, lsr #2
+	bcc	.L880
+	cmp	r5, #-1
+	ite	eq
+	moveq	r5, #-1
+	movne	r5, #256
+.L880:
+	mov	r0, r7
+	bl	NandcWaitFlashReady
+	cmp	sl, #0
+	beq	.L881
+	movs	r0, #4
+	bl	NandcSetDdrMode
+.L881:
+	mov	r0, r5
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L888:
 	.align	2
-.L928:
-	.word	.LANCHOR145
-	.word	.LANCHOR146
-	.word	.LANCHOR148
-	.word	.LANCHOR147
-	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
-	.section	.text.FtlGcPageVarInit,"ax",%progbits
+.L887:
+	.word	.LANCHOR5
+	.word	.LANCHOR11
+	.word	.LANCHOR35
+	.word	.LANCHOR144
+	.word	.LANCHOR29
+	.size	ToshibaReadRetrial, .-ToshibaReadRetrial
+	.section	.text.FlashSavePhyInfo,"ax",%progbits
 	.align	1
-	.global	FtlGcPageVarInit
+	.global	FlashSavePhyInfo
 	.thumb
 	.thumb_func
-	.type	FtlGcPageVarInit, %function
-FtlGcPageVarInit:
+	.type	FlashSavePhyInfo, %function
+FlashSavePhyInfo:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L931
-	movs	r3, #0
-	push	{r4, lr}
-	movs	r1, #255
-	strh	r3, [r2, #0]	@ movhi
-	ldr	r4, .L931+4
-	ldr	r2, .L931+8
-	strh	r3, [r2, #0]	@ movhi
-	ldrh	r2, [r4, #0]
-	ldr	r3, .L931+12
-	lsls	r2, r2, #1
-	ldr	r0, [r3, #0]
-	bl	memset
-	ldr	r2, .L931+16
-	ldrh	r3, [r4, #0]
-	movs	r1, #255
-	ldr	r0, [r2, #0]
-	movs	r2, #12
-	muls	r2, r3, r2
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	movs	r5, #0
+	ldr	r7, .L896
+	ldr	r8, .L896+60
+	ldr	sl, .L896+64
+	ldr	r3, [r7, #0]
+	ldr	fp, .L896+48
+	ldr	r6, .L896+4
+	str	r3, [r8, #0]
+	ldr	r3, .L896+8
+	ldrb	r0, [r3, #0]	@ zero_extendqisi2
+	bl	FlashBchSel
+	movs	r1, #0
+	mov	r2, #2048
+	ldr	r0, [r7, #0]
 	bl	memset
-	pop	{r4, lr}
-	b	FtlGcBufInit
-.L932:
+	ldr	r0, [r8, #0]
+	ldr	r3, .L896+12
+	movs	r2, #32
+	ldr	r1, .L896+16
+	str	sl, [r0, #0]
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	strh	r3, [r0, #12]	@ movhi
+	ldr	r3, .L896+20
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	strh	r3, [r0, #14]	@ movhi
+	ldr	r3, .L896+24
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	str	r3, [r0, #1076]
+	adds	r0, r0, #16
+	bl	memcpy
+	ldr	r0, [r8, #0]
+	ldr	r1, .L896+28
+	movs	r2, #8
+	adds	r0, r0, #80
+	bl	memcpy
+	ldr	r0, [r8, #0]
+	ldr	r1, .L896+32
+	movs	r2, #32
+	adds	r0, r0, #96
+	bl	memcpy
+	ldr	r0, [r8, #0]
+	ldr	r1, .L896+36
+	movs	r2, #32
+	adds	r0, r0, #160
+	bl	memcpy
+	ldr	r0, [r8, #0]
+	ldr	r1, .L896+40
+	movs	r2, #32
+	adds	r0, r0, #192
+	bl	memcpy
+	ldr	r0, [r8, #0]
+	mov	r2, #852
+	ldr	r1, .L896+44
+	adds	r0, r0, #224
+	bl	memcpy
+	ldr	r4, [r8, #0]
+	movw	r1, #2036
+	add	r0, r4, #12
+	bl	JSHash
+	mov	r3, #1592
+	str	r3, [r4, #4]
+	ldr	r3, [fp, #0]
+	str	r3, [r8, #0]
+	str	r0, [r4, #8]
+	movs	r0, #0
+	bl	flash_enter_slc_mode
+	mov	r4, r5
+.L892:
+	movs	r0, #0
+	ldr	r1, [r6, #0]
+	mov	r2, r0
+	muls	r1, r4, r1
+	bl	FlashEraseBlock
+	movs	r0, #0
+	ldr	r1, [r6, #0]
+	mov	r3, r0
+	muls	r1, r4, r1
+	ldr	r2, [r7, #0]
+	bl	FlashProgPage
+	movs	r0, #0
+	ldr	r1, [r6, #0]
+	mov	r3, r0
+	muls	r1, r4, r1
+	ldr	r2, [r7, #0]
+	adds	r1, r1, #1
+	bl	FlashProgPage
+	ldr	r3, .L896+48
+	movs	r0, #0
+	ldr	r1, [r6, #0]
+	muls	r1, r4, r1
+	ldr	r2, [r3, #0]
+	mov	r3, r0
+	bl	FlashReadRawPage
+	adds	r0, r0, #1
+	beq	.L890
+	ldr	fp, [r8, #0]
+	ldr	r3, [fp, #0]
+	cmp	r3, sl
+	bne	.L890
+	add	r0, fp, #12
+	movw	r1, #2036
+	bl	JSHash
+	ldr	r3, [fp, #8]
+	cmp	r3, r0
+	bne	.L890
+	ldr	r3, .L896+52
+	adds	r2, r4, #1
+	adds	r5, r5, #1
+	str	r2, [r3, #0]
+	ldr	r3, .L896+56
+	ldr	r2, [r6, #0]
+	muls	r2, r4, r2
+	cmp	r5, #1
+	str	r2, [r3, #0]
+	bhi	.L891
+.L890:
+	adds	r4, r4, #1
+	cmp	r4, #4
+	bne	.L892
+.L891:
+	movs	r0, #0
+	bl	flash_exit_slc_mode
+	cmp	r5, #0
+	ite	eq
+	moveq	r0, #-1
+	movne	r0, #0
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L897:
 	.align	2
-.L931:
-	.word	.LANCHOR145
-	.word	.LANCHOR70
-	.word	.LANCHOR147
+.L896:
 	.word	.LANCHOR146
+	.word	.LANCHOR2
+	.word	.LANCHOR147
+	.word	.LANCHOR16
+	.word	.LANCHOR22
+	.word	.LANCHOR1
+	.word	.LANCHOR35
+	.word	.LANCHOR19
+	.word	.LANCHOR20
+	.word	.LANCHOR18
+	.word	.LANCHOR6
+	.word	.LANCHOR31
+	.word	.LANCHOR143
 	.word	.LANCHOR148
-	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
-	.section	.text.FtlGcRefreshOpenBlock,"ax",%progbits
+	.word	.LANCHOR149
+	.word	.LANCHOR145
+	.word	1312902724
+	.size	FlashSavePhyInfo, .-FlashSavePhyInfo
+	.section	.text.FlashReadIdbDataRaw,"ax",%progbits
 	.align	1
-	.global	FtlGcRefreshOpenBlock
+	.global	FlashReadIdbDataRaw
 	.thumb
 	.thumb_func
-	.type	FtlGcRefreshOpenBlock, %function
-FtlGcRefreshOpenBlock:
-	@ args = 0, pretend = 0, frame = 0
+	.type	FlashReadIdbDataRaw, %function
+FlashReadIdbDataRaw:
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, lr}
-	ldr	r4, .L936
-	ldrh	r5, [r4, #0]
-	cmp	r5, r0
-	beq	.L934
-	ldr	r3, .L936+4
-	ldrh	r1, [r3, #0]
-	cmp	r1, r0
-	beq	.L934
-	movw	r2, #65535
-	cmp	r5, r2
-	bne	.L935
-	strh	r0, [r4, #0]	@ movhi
-	b	.L934
-.L935:
-	cmp	r1, r2
-	it	eq
-	strheq	r0, [r3, #0]	@ movhi
-.L934:
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, lr}
+	movs	r2, #4
+	mov	r8, r0
+	ldr	r1, .L909
+	add	r0, sp, #12
+	bl	memcpy
+	ldr	r3, .L909+4
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	str	r3, [sp, #4]
+	ldr	r3, .L909+8
+	ldr	r2, [r3, #0]
+	ldr	r3, .L909+12
+	cmp	r2, r3
+	bne	.L899
+	movs	r0, #0
+	bl	flash_enter_slc_mode
+.L899:
+	mov	r0, r8
+	movs	r1, #0
+	mov	r2, #2048
+	mov	r7, #-1
+	bl	memset
+	movs	r4, #2
+	ldr	sl, .L909+32
+	ldr	fp, .L909+36
+	ldr	r6, .L909+16
+	b	.L900
+.L907:
+	movs	r5, #0
+.L902:
+	add	r3, sp, #12
+	ldrb	r0, [r3, r5]	@ zero_extendqisi2
+	bl	FlashBchSel
+	ldr	r3, .L909+16
+	movs	r0, #0
+	ldr	r1, [fp, #0]
+	muls	r1, r4, r1
+	ldr	r2, [r3, #0]
+	mov	r3, r0
+	bl	FlashReadRawPage
+	adds	r0, r0, #1
+	bne	.L901
+	adds	r5, r5, #1
+	cmp	r5, #4
+	bne	.L902
+	b	.L903
+.L901:
+	ldr	r3, [r6, #0]
+	ldr	r2, [r3, #0]
+	ldr	r3, .L909+20
+	cmp	r2, r3
+	bne	.L903
+	add	r3, sp, #16
+	ldr	r0, .L909+24
+	adds	r5, r3, r5
+	ldrb	r1, [r5, #-4]	@ zero_extendqisi2
+	bl	printf
+	mov	r2, #2048
+	mov	r0, r8
+	ldr	r1, [r6, #0]
+	bl	memcpy
+	ldr	r3, [r6, #0]
+	ldr	r3, [r3, #512]
+	strb	r3, [sl, #0]
+	ldr	r3, .L909+28
+	ldr	r2, [r3, #0]
+	cmp	r2, r4
+	bls	.L906
+	str	r4, [r3, #0]
+	movs	r7, #0
+	bl	FlashSavePhyInfo
+.L903:
+	adds	r4, r4, #1
+.L900:
+	ldrb	r3, [sl, #0]	@ zero_extendqisi2
+	cmp	r4, r3
+	bcc	.L907
+	b	.L904
+.L906:
+	movs	r7, #0
+.L904:
+	ldr	r0, [sp, #4]
+	bl	FlashBchSel
+	ldr	r3, .L909+8
+	ldr	r2, [r3, #0]
+	ldr	r3, .L909+12
+	cmp	r2, r3
+	bne	.L905
 	movs	r0, #0
-	pop	{r4, r5, pc}
-.L937:
+	bl	flash_exit_slc_mode
+.L905:
+	mov	r0, r7
+	add	sp, sp, #16
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L910:
 	.align	2
-.L936:
-	.word	.LANCHOR149
+.L909:
 	.word	.LANCHOR150
-	.size	FtlGcRefreshOpenBlock, .-FtlGcRefreshOpenBlock
-	.section	.text.FtlGcRefreshBlock,"ax",%progbits
+	.word	.LANCHOR29
+	.word	.LANCHOR142
+	.word	1446522928
+	.word	.LANCHOR146
+	.word	-52655045
+	.word	.LC8
+	.word	.LANCHOR148
+	.word	.LANCHOR1
+	.word	.LANCHOR2
+	.size	FlashReadIdbDataRaw, .-FlashReadIdbDataRaw
+	.section	.text.FlashLoadPhyInfo,"ax",%progbits
 	.align	1
-	.global	FtlGcRefreshBlock
+	.global	FlashLoadPhyInfo
 	.thumb
 	.thumb_func
-	.type	FtlGcRefreshBlock, %function
-FtlGcRefreshBlock:
-	@ args = 0, pretend = 0, frame = 0
+	.type	FlashLoadPhyInfo, %function
+FlashLoadPhyInfo:
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, lr}
-	ldr	r4, .L941
-	ldrh	r5, [r4, #0]
-	cmp	r5, r0
-	beq	.L939
-	ldr	r3, .L941+4
-	ldrh	r1, [r3, #0]
-	cmp	r1, r0
-	beq	.L939
-	movw	r2, #65535
-	cmp	r5, r2
-	bne	.L940
-	strh	r0, [r4, #0]	@ movhi
-	b	.L939
-.L940:
-	cmp	r1, r2
-	it	eq
-	strheq	r0, [r3, #0]	@ movhi
-.L939:
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, lr}
+	movs	r2, #4
+	ldr	sl, .L923+40
+	add	r0, sp, #12
+	ldr	r1, .L923
+	movs	r4, #0
+	bl	memcpy
+	ldr	r5, .L923+4
+	ldr	r3, [sl, #0]
+	mov	r0, r4
+	ldr	r6, .L923+8
+	mov	r8, #4
+	mov	r7, #-1
+	str	r3, [r5, #0]
+	ldr	r3, .L923+12
+	ldrh	r2, [r6, #10]
+	str	r4, [r3, #0]
+	str	r2, [sp, #4]
+	bl	flash_enter_slc_mode
+	b	.L912
+.L914:
+	add	r3, sp, #12
+	ldrb	r0, [r3, r6]	@ zero_extendqisi2
+	bl	FlashBchSel
 	movs	r0, #0
-	pop	{r4, r5, pc}
-.L942:
+	mov	r1, r4
+	ldr	r2, [sl, #0]
+	mov	r3, r0
+	bl	FlashReadRawPage
+	adds	r0, r0, #1
+	bne	.L913
+	movs	r0, #0
+	mov	r1, fp
+	ldr	r2, [sl, #0]
+	mov	r3, r0
+	bl	FlashReadRawPage
+	adds	r0, r0, #1
+	bne	.L913
+	adds	r6, r6, #1
+	cmp	r6, #4
+	beq	.L915
+	b	.L914
+.L913:
+	ldr	r6, [r5, #0]
+	ldr	r2, .L923+16
+	ldr	r3, [r6, #0]
+	cmp	r3, r2
+	bne	.L915
+	cbnz	r7, .L916
+	ldr	r3, .L923+8
+	mov	r0, r4
+	ldrh	r1, [r3, #10]
+	bl	__aeabi_uidiv
+	ldr	r3, .L923+20
+	adds	r0, r0, #1
+	str	r0, [r3, #0]
+	mov	r0, r7
+	b	.L922
+.L916:
+	add	r0, r6, #12
+	movw	r1, #2036
+	bl	JSHash
+	ldr	r3, [r6, #8]
+	cmp	r3, r0
+	bne	.L915
+	add	r1, r6, #160
+	movs	r2, #32
+	ldr	r0, .L923+8
+	bl	memcpy
+	ldr	r1, [r5, #0]
+	movs	r2, #32
+	ldr	r0, .L923+24
+	adds	r1, r1, #192
+	bl	memcpy
+	ldr	r1, [r5, #0]
+	mov	r2, #852
+	ldr	r0, .L923+28
+	adds	r1, r1, #224
+	bl	memcpy
+	ldr	r6, [r5, #0]
+	ldr	r3, .L923+32
+	mov	r0, r4
+	ldr	r2, [r6, #1076]
+	strb	r2, [r3, #0]
+	ldr	r3, .L923+12
+	str	r4, [r3, #0]
+	ldr	r3, .L923+8
+	ldrh	r1, [r3, #10]
+	bl	__aeabi_uidiv
+	ldr	r3, .L923+20
+	adds	r0, r0, #1
+	str	r0, [r3, #0]
+	cmp	r0, #1
+	bne	.L918
+	movs	r2, #2
+	str	r2, [r3, #0]
+.L918:
+	ldrh	r2, [r6, #14]
+	movs	r7, #0
+	ldr	r3, .L923+36
+	strb	r2, [r3, #0]
+.L915:
+	ldr	r2, [sp, #4]
+	subs	r8, r8, #1
+	add	r4, r4, r2
+	beq	.L919
+.L912:
+	add	fp, r4, #1
+	movs	r6, #0
+	b	.L914
+.L919:
+	mov	r0, r8
+.L922:
+	bl	flash_exit_slc_mode
+	mov	r0, r7
+	add	sp, sp, #16
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L924:
 	.align	2
-.L941:
-	.word	.LANCHOR149
+.L923:
 	.word	.LANCHOR150
-	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
-	.section	.text.FtlGcMarkBadPhyBlk,"ax",%progbits
+	.word	.LANCHOR145
+	.word	.LANCHOR18
+	.word	.LANCHOR149
+	.word	1312902724
+	.word	.LANCHOR148
+	.word	.LANCHOR6
+	.word	.LANCHOR31
+	.word	.LANCHOR35
+	.word	.LANCHOR151
+	.word	.LANCHOR146
+	.size	FlashLoadPhyInfo, .-FlashLoadPhyInfo
+	.section	.text.FlashDdrTunningRead,"ax",%progbits
 	.align	1
-	.global	FtlGcMarkBadPhyBlk
+	.global	FlashDdrTunningRead
 	.thumb
 	.thumb_func
-	.type	FtlGcMarkBadPhyBlk, %function
-FtlGcMarkBadPhyBlk:
-	@ args = 0, pretend = 0, frame = 0
+	.type	FlashDdrTunningRead, %function
+FlashDdrTunningRead:
+	@ args = 4, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	mov	r4, r0
-	bl	P2V_block_in_plane
-	mov	r5, r0
-	bl	FtlGcRefreshBlock
-	ldr	r3, .L948
-	ldr	r3, [r3, #0]
-	cbz	r3, .L944
-	ldr	r3, .L948+4
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	sl, r3
+	ldr	r3, .L945
+	sub	sp, sp, #24
+	mov	fp, r2
+	str	r0, [sp, #8]
 	ldr	r3, [r3, #0]
-	ldrh	r2, [r3, r5, lsl #1]
-	cmp	r2, #29
-	bls	.L944
-	subs	r2, r2, #30
-	strh	r2, [r3, r5, lsl #1]	@ movhi
-.L944:
-	ldr	r3, .L948+8
-	ldr	r2, .L948+12
-	ldrh	r1, [r3, #0]
-	movs	r3, #0
-	b	.L945
-.L947:
-	ldrh	r0, [r2, #2]!
-	cmp	r0, r4
-	beq	.L946
-	adds	r3, r3, #1
-	uxth	r3, r3
-.L945:
-	cmp	r3, r1
-	bne	.L947
-	cmp	r3, #15
-	bhi	.L946
-	ldr	r2, .L948+16
-	strh	r4, [r2, r3, lsl #1]	@ movhi
-	adds	r3, r3, #1
-	ldr	r2, .L948+8
-	strh	r3, [r2, #0]	@ movhi
+	str	r1, [sp, #12]
+	ldr	r3, [r3, #304]
+	str	r3, [sp, #20]
+	ldr	r3, .L945+4
+	ldr	r7, [r3, #0]
+	ldr	r3, [sp, #56]
+	cmp	r7, #7
+	ite	hi
+	movhi	r7, #12
+	movls	r7, #6
+	cbz	r3, .L937
+	movs	r0, #1
+	ldr	r4, .L945+8
+	bl	FlashSetInterfaceMode
+	movs	r0, #1
+	bl	NandcSetMode
+	ldr	r0, [sp, #8]
+	bl	FlashReset
+	ldr	r1, [sp, #12]
+	mov	r2, fp
+	mov	r3, sl
+	ldr	r0, [sp, #8]
+	bl	FlashReadRawPage
+	mov	r8, r0
+	ldrb	r0, [r4, #0]	@ zero_extendqisi2
+	bl	FlashSetInterfaceMode
+	ldrb	r0, [r4, #0]	@ zero_extendqisi2
+	bl	NandcSetMode
+	cmp	r8, #-1
+	beq	.L928
+	mov	r2, r8
+	ldr	r0, .L945+12
+	ldr	r1, [sp, #12]
+	bl	printf
+	ldr	r3, .L945+16
+	ldr	r2, [r3, #0]
+	adds	r2, r2, #1
+	str	r2, [r3, #0]
+	cmp	r2, #2048
+	bcc	.L928
+	movs	r2, #0
+	str	r2, [r3, #0]
+	mov	sl, r2
+	mov	fp, r2
+	b	.L927
+.L937:
+	mov	r8, #1024
+.L927:
+	movs	r4, #0
+	mov	r6, #-1
+	mov	ip, r4
+	mov	r5, r4
+	str	r4, [sp, #16]
+.L933:
+	uxtb	r0, r7
+	str	ip, [sp, #4]
+	bl	NandcSetDdrPara
+	mov	r3, sl
+	ldr	r0, [sp, #8]
+	mov	r2, fp
+	ldr	r1, [sp, #12]
+	bl	FlashReadRawPage
+	add	r3, r8, #1
+	ldr	ip, [sp, #4]
+	cmp	r0, r3
+	bhi	.L929
+	cmp	r0, #2
+	bhi	.L939
+	adds	r5, r5, #1
+	cmp	r5, #9
+	bls	.L939
+	subs	r4, r7, r5
+	mov	r8, r0
+	movs	r6, #0
+	b	.L931
+.L929:
+	cmp	ip, r5
+	bcs	.L940
+	cmp	r5, #7
+	rsb	r3, r5, r4
+	str	r3, [sp, #16]
+	bhi	.L932
+	mov	ip, r5
+	b	.L940
+.L939:
+	movs	r6, #0
+	mov	r4, r7
+	mov	r8, r0
+	mov	sl, r6
+	mov	fp, r6
+	b	.L930
+.L940:
+	movs	r5, #0
+.L930:
+	adds	r7, r7, #2
+	cmp	r7, #69
+	bls	.L933
+.L931:
+	cmp	ip, r5
+	bcc	.L934
+.L932:
+	ldr	r4, [sp, #16]
+.L934:
+	cbz	r4, .L935
+	ldr	r0, .L945+20
+	mov	r1, r4
+	bl	printf
+	uxtb	r0, r4
+	bl	NandcSetDdrPara
+.L935:
+	cbz	r6, .L928
+	ldr	r0, .L945+24
+	ldr	r1, [sp, #8]
+	ldr	r2, [sp, #12]
+	bl	printf
+	ldr	r3, [sp, #56]
+	cbz	r3, .L942
+	ldr	r3, [sp, #20]
+	ubfx	r0, r3, #8, #8
+	bl	NandcSetDdrPara
+	b	.L928
+.L942:
+	mov	r8, r6
+.L928:
+	mov	r0, r8
+	add	sp, sp, #24
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
 .L946:
-	movs	r0, #0
-	pop	{r3, r4, r5, pc}
-.L949:
 	.align	2
-.L948:
-	.word	.LANCHOR128
-	.word	.LANCHOR96
-	.word	.LANCHOR151
-	.word	.LANCHOR152-2
+.L945:
+	.word	.LANCHOR30
+	.word	.LANCHOR37
+	.word	.LANCHOR34
+	.word	.LC9
 	.word	.LANCHOR152
-	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
-	.section	.text.FtlGcReFreshBadBlk,"ax",%progbits
+	.word	.LC10
+	.word	.LC11
+	.size	FlashDdrTunningRead, .-FlashDdrTunningRead
+	.section	.text.FlashDdrParaScan,"ax",%progbits
 	.align	1
-	.global	FtlGcReFreshBadBlk
+	.global	FlashDdrParaScan
 	.thumb
 	.thumb_func
-	.type	FtlGcReFreshBadBlk, %function
-FtlGcReFreshBadBlk:
+	.type	FlashDdrParaScan, %function
+FlashDdrParaScan:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L953
-	push	{r4, lr}
-	ldrh	r3, [r3, #0]
-	cbz	r3, .L951
-	ldr	r2, .L953+4
-	ldrh	r1, [r2, #0]
-	movw	r2, #65535
-	cmp	r1, r2
-	bne	.L951
-	ldr	r4, .L953+8
-	ldrh	r2, [r4, #0]
-	cmp	r2, r3
-	bcc	.L952
-	movs	r3, #0
-	strh	r3, [r4, #0]	@ movhi
-.L952:
-	ldr	r3, .L953+12
-	ldrh	r2, [r4, #0]
-	ldrh	r0, [r3, r2, lsl #1]
-	bl	P2V_block_in_plane
-	bl	FtlGcRefreshBlock
-	ldrh	r3, [r4, #0]
-	adds	r3, r3, #1
-	strh	r3, [r4, #0]	@ movhi
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	mov	r6, r0
+	ldr	r5, .L952
+	movs	r4, #0
+	mov	r7, r1
+	ldrb	r0, [r5, #0]	@ zero_extendqisi2
+	bl	FlashSetInterfaceMode
+	ldrb	r0, [r5, #0]	@ zero_extendqisi2
+	bl	NandcSetMode
+	mov	r1, r7
+	mov	r2, r4
+	mov	r3, r4
+	mov	r0, r6
+	str	r4, [sp, #0]
+	bl	FlashDdrTunningRead
+	mov	r1, r7
+	mov	r2, r4
+	mov	r3, r4
+	mov	r8, r0
+	mov	r0, r6
+	bl	FlashReadRawPage
+	adds	r0, r0, #1
+	beq	.L948
+	cmp	r8, #-1
+	bne	.L949
+.L948:
+	ldrb	r3, [r5, #0]	@ zero_extendqisi2
+	lsls	r3, r3, #31
+	bpl	.L949
+	movs	r0, #1
+	bl	FlashSetInterfaceMode
+	movs	r0, #1
+	bl	NandcSetMode
+	movs	r2, #0
+	b	.L951
+.L949:
+	movs	r2, #1
 .L951:
+	ldr	r3, .L952+4
 	movs	r0, #0
-	pop	{r4, pc}
-.L954:
-	.align	2
+	strb	r2, [r3, #0]
+	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
 .L953:
-	.word	.LANCHOR151
-	.word	.LANCHOR149
-	.word	.LANCHOR153
-	.word	.LANCHOR152
-	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
-	.section	.text.ftl_memset,"ax",%progbits
-	.align	1
-	.global	ftl_memset
-	.thumb
-	.thumb_func
-	.type	ftl_memset, %function
-ftl_memset:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	memset
-	.size	ftl_memset, .-ftl_memset
-	.section	.text.ftl_memcpy,"ax",%progbits
+	.align	2
+.L952:
+	.word	.LANCHOR34
+	.word	.LANCHOR35
+	.size	FlashDdrParaScan, .-FlashDdrParaScan
+	.section	.text.FlashReadPage,"ax",%progbits
 	.align	1
-	.global	ftl_memcpy
+	.global	FlashReadPage
 	.thumb
 	.thumb_func
-	.type	ftl_memcpy, %function
-ftl_memcpy:
+	.type	FlashReadPage, %function
+FlashReadPage:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	memcpy
-	.size	ftl_memcpy, .-ftl_memcpy
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	sl, r3
+	mov	r5, r0
+	mov	r7, r1
+	mov	r8, r2
+	bl	FlashReadRawPage
+	adds	r3, r0, #1
+	mov	r4, r0
+	bne	.L955
+	ldr	r6, .L960
+	ldrb	fp, [r6, #0]	@ zero_extendqisi2
+	cmp	fp, #0
+	beq	.L956
+	movs	r3, #0
+	mov	r0, r5
+	strb	r3, [r6, #0]
+	mov	r1, r7
+	mov	r2, r8
+	mov	r3, sl
+	bl	FlashReadRawPage
+	strb	fp, [r6, #0]
+	adds	r6, r0, #1
+	bne	.L959
+.L956:
+	ldr	r3, .L960+4
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L955
+	ldr	r3, .L960+8
+	mov	r0, r5
+	mov	r1, r7
+	mov	r2, r8
+	ldr	r3, [r3, #0]
+	ldr	r6, [r3, #304]
+	movs	r3, #1
+	str	r3, [sp, #0]
+	mov	r3, sl
+	bl	FlashDdrTunningRead
+	mov	r4, r0
+	adds	r0, r0, #1
+	beq	.L957
+	ldr	r3, .L960+12
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cmp	r4, r3, lsr #1
+	bls	.L955
+.L957:
+	ubfx	r0, r6, #8, #8
+	bl	NandcSetDdrPara
+	b	.L955
+.L959:
+	mov	r4, r0
+.L955:
+	ldr	fp, .L960+24
+	ldr	r6, [fp, #0]
+	cbz	r6, .L958
+	adds	r1, r4, #1
+	bne	.L958
+	mov	r1, r7
+	mov	r2, r8
+	mov	r3, sl
+	mov	r0, r5
+	blx	r6
+	mov	r2, r5
+	mov	r3, r7
+	mov	r4, r0
+	ldr	r0, .L960+16
+	mov	r1, r4
+	bl	printf
+	adds	r2, r4, #1
+	bne	.L958
+	ldr	r3, .L960+20
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L958
+	mov	r0, r5
+	bl	flash_enter_slc_mode
+	ldr	r4, [fp, #0]
+	mov	r0, r5
+	mov	r1, r7
+	mov	r2, r8
+	mov	r3, sl
+	blx	r4
+	mov	r4, r0
+	mov	r0, r5
+	bl	flash_exit_slc_mode
+.L958:
+	mov	r0, r4
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L961:
+	.align	2
+.L960:
+	.word	.LANCHOR4
+	.word	.LANCHOR35
+	.word	.LANCHOR30
+	.word	.LANCHOR29
+	.word	.LC12
+	.word	.LANCHOR7
+	.word	.LANCHOR153
+	.size	FlashReadPage, .-FlashReadPage
 	.section	.text.ftl_memcmp,"ax",%progbits
 	.align	1
 	.global	ftl_memcmp
@@ -7829,11 +7873,11 @@ rknand_get_clk_rate:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r0, .L959
+	ldr	r0, .L964
 	bx	lr
-.L960:
+.L965:
 	.align	2
-.L959:
+.L964:
 	.word	148000000
 	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
 	.section	.text.ftl_malloc,"ax",%progbits
@@ -7858,85 +7902,85 @@ ftl_malloc:
 FtlMemInit:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L967
+	ldr	r3, .L972
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	movs	r1, #0
 	strh	r1, [r3, #0]	@ movhi
 	movs	r5, #12
-	ldr	r3, .L967+4
-	ldr	r2, .L967+8
-	ldr	r4, .L967+12
+	ldr	r3, .L972+4
+	ldr	r2, .L972+8
+	ldr	r4, .L972+12
 	str	r1, [r3, #0]
-	ldr	r3, .L967+16
+	ldr	r3, .L972+16
 	ldrh	r0, [r4, #0]
-	ldr	r8, .L967+304
+	ldr	r8, .L972+304
 	str	r1, [r3, #0]
-	ldr	r3, .L967+20
+	ldr	r3, .L972+20
 	lsls	r0, r0, #1
-	ldr	r7, .L967+24
+	ldr	r7, .L972+24
 	str	r1, [r3, #0]
-	ldr	r3, .L967+28
+	ldr	r3, .L972+28
 	str	r1, [r3, #0]
-	ldr	r3, .L967+32
+	ldr	r3, .L972+32
 	str	r1, [r3, #0]
-	ldr	r3, .L967+36
+	ldr	r3, .L972+36
 	str	r1, [r3, #0]
-	ldr	r3, .L967+40
+	ldr	r3, .L972+40
 	str	r1, [r3, #0]
-	ldr	r3, .L967+44
+	ldr	r3, .L972+44
 	str	r1, [r3, #0]
-	ldr	r3, .L967+48
+	ldr	r3, .L972+48
 	str	r1, [r3, #0]
-	ldr	r3, .L967+52
+	ldr	r3, .L972+52
 	str	r1, [r3, #0]
-	ldr	r3, .L967+56
+	ldr	r3, .L972+56
 	str	r1, [r3, #0]
-	ldr	r3, .L967+60
+	ldr	r3, .L972+60
 	str	r1, [r3, #0]
-	ldr	r3, .L967+64
+	ldr	r3, .L972+64
 	str	r1, [r3, #0]
-	ldr	r3, .L967+68
+	ldr	r3, .L972+68
 	str	r1, [r3, #0]
-	ldr	r3, .L967+72
+	ldr	r3, .L972+72
 	str	r1, [r3, #0]
-	ldr	r3, .L967+76
+	ldr	r3, .L972+76
 	str	r1, [r3, #0]
-	ldr	r3, .L967+80
+	ldr	r3, .L972+80
 	str	r1, [r3, #0]
 	movw	r3, #65535
 	str	r3, [r2, #0]
-	ldr	r2, .L967+84
+	ldr	r2, .L972+84
 	str	r1, [r2, #0]
-	ldr	r2, .L967+88
+	ldr	r2, .L972+88
 	str	r1, [r2, #0]
-	ldr	r2, .L967+92
+	ldr	r2, .L972+92
 	str	r1, [r2, #0]
-	ldr	r2, .L967+96
+	ldr	r2, .L972+96
 	strh	r3, [r2, #0]	@ movhi
-	ldr	r2, .L967+100
+	ldr	r2, .L972+100
 	strh	r3, [r2, #0]	@ movhi
 	movs	r2, #32
-	ldr	r3, .L967+104
+	ldr	r3, .L972+104
 	strh	r2, [r3, #0]	@ movhi
 	movs	r2, #128
-	ldr	r3, .L967+108
+	ldr	r3, .L972+108
 	strh	r2, [r3, #0]	@ movhi
-	ldr	r3, .L967+112
+	ldr	r3, .L972+112
 	strh	r1, [r3, #0]	@ movhi
-	ldr	r3, .L967+116
+	ldr	r3, .L972+116
 	strh	r1, [r3, #0]	@ movhi
-	ldr	r3, .L967+120
+	ldr	r3, .L972+120
 	strh	r1, [r3, #0]	@ movhi
-	ldr	r3, .L967+124
+	ldr	r3, .L972+124
 	strh	r1, [r3, #0]	@ movhi
 	str	r1, [sp, #4]
 	bl	ftl_malloc
-	ldr	r3, .L967+128
+	ldr	r3, .L972+128
 	str	r0, [r3, #0]
 	ldrh	r0, [r4, #0]
 	muls	r0, r5, r0
 	bl	ftl_malloc
-	ldr	r3, .L967+132
+	ldr	r3, .L972+132
 	movs	r4, #36
 	str	r0, [r3, #0]
 	ldrh	r3, [r8, #0]
@@ -7944,24 +7988,24 @@ FtlMemInit:
 	lsls	r6, r4, #2
 	mov	r0, r6
 	bl	ftl_malloc
-	ldr	r3, .L967+136
+	ldr	r3, .L972+136
 	str	r0, [r3, #0]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L967+140
+	ldr	r3, .L972+140
 	str	r0, [r3, #0]
 	mov	r0, r6
 	bl	ftl_malloc
-	ldr	r3, .L967+144
-	ldr	r6, .L967+148
+	ldr	r3, .L972+144
+	ldr	r6, .L972+148
 	str	r0, [r3, #0]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L967+152
+	ldr	r3, .L972+152
 	str	r0, [r3, #0]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L967+156
+	ldr	r3, .L972+156
 	ldrh	r4, [r6, #0]
 	str	r0, [r3, #0]
 	mov	r0, r4
@@ -7970,158 +8014,158 @@ FtlMemInit:
 	adds	r3, r3, #1
 	str	r3, [r7, #0]
 	bl	ftl_malloc
-	ldr	r3, .L967+160
+	ldr	r3, .L972+160
 	str	r0, [r3, #0]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L967+164
+	ldr	r3, .L972+164
 	str	r0, [r3, #0]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L967+168
+	ldr	r3, .L972+168
 	str	r0, [r3, #0]
 	ldr	r0, [r7, #0]
 	muls	r0, r4, r0
 	bl	ftl_malloc
-	ldr	r3, .L967+172
+	ldr	r3, .L972+172
 	str	r0, [r3, #0]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L967+176
+	ldr	r3, .L972+176
 	str	r0, [r3, #0]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L967+180
-	ldr	r4, .L967+184
+	ldr	r3, .L972+180
+	ldr	r4, .L972+184
 	str	r0, [r3, #0]
 	ldr	r0, [r7, #0]
 	muls	r0, r5, r0
 	bl	ftl_malloc
-	ldr	r3, .L967+188
+	ldr	r3, .L972+188
 	ldrh	r8, [r8, #0]
 	str	r0, [r3, #0]
 	ldrh	r3, [r4, #0]
 	mul	r8, r8, r3
 	mov	r0, r8
 	bl	ftl_malloc
-	ldr	r3, .L967+192
+	ldr	r3, .L972+192
 	str	r0, [r3, #0]
 	lsl	r0, r8, #2
 	bl	ftl_malloc
-	ldr	r3, .L967+196
+	ldr	r3, .L972+196
 	str	r0, [r3, #0]
 	ldrh	r3, [r4, #0]
 	ldr	r0, [r7, #0]
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r4, .L967+200
-	ldr	r3, .L967+204
-	ldr	r7, .L967+208
+	ldr	r4, .L972+200
+	ldr	r3, .L972+204
+	ldr	r7, .L972+208
 	str	r0, [r3, #0]
 	ldrh	r0, [r4, #0]
 	lsls	r0, r0, #1
 	uxth	r0, r0
 	strh	r0, [r7, #0]	@ movhi
 	bl	ftl_malloc
-	ldr	r3, .L967+212
+	ldr	r3, .L972+212
 	str	r0, [r3, #0]
 	ldrh	r0, [r7, #0]
 	addw	r0, r0, #547
 	lsrs	r0, r0, #9
 	strh	r0, [r7, #0]	@ movhi
-	ldr	r7, .L967+216
+	ldr	r7, .L972+216
 	lsls	r0, r0, #9
 	bl	ftl_malloc
-	ldr	r3, .L967+220
+	ldr	r3, .L972+220
 	str	r0, [r3, #0]
 	adds	r0, r0, #32
-	ldr	r3, .L967+224
+	ldr	r3, .L972+224
 	str	r0, [r3, #0]
 	ldrh	r0, [r4, #0]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L967+228
+	ldr	r3, .L972+228
 	str	r0, [r3, #0]
 	ldr	r3, [r7, #0]
 	lsl	r8, r3, #1
 	mov	r0, r8
 	bl	ftl_malloc
-	ldr	r3, .L967+232
+	ldr	r3, .L972+232
 	str	r0, [r3, #0]
 	mov	r0, r8
 	bl	ftl_malloc
-	ldr	r3, .L967+236
-	ldr	r8, .L967+308
+	ldr	r3, .L972+236
+	ldr	r8, .L972+308
 	str	r0, [r3, #0]
 	ldrh	r0, [r4, #0]
 	lsrs	r0, r0, #3
 	adds	r0, r0, #4
 	bl	ftl_malloc
-	ldr	r3, .L967+240
+	ldr	r3, .L972+240
 	str	r0, [r3, #0]
 	ldrh	r0, [r8, #0]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L967+244
+	ldr	r3, .L972+244
 	str	r0, [r3, #0]
 	ldrh	r0, [r8, #0]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L967+248
+	ldr	r3, .L972+248
 	str	r0, [r3, #0]
 	ldrh	r0, [r8, #0]
-	ldr	r8, .L967+312
+	ldr	r8, .L972+312
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L967+252
+	ldr	r3, .L972+252
 	str	r0, [r3, #0]
 	ldrh	r0, [r8, #0]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L967+256
+	ldr	r3, .L972+256
 	ldrh	r2, [r8, #0]
 	ldr	r1, [sp, #4]
 	lsls	r2, r2, #2
 	str	r0, [r3, #0]
 	bl	memset
-	ldr	r3, .L967+260
+	ldr	r3, .L972+260
 	ldrh	r8, [r3, #0]
 	lsl	r8, r8, #2
 	mov	r0, r8
 	bl	ftl_malloc
-	ldr	r3, .L967+264
+	ldr	r3, .L972+264
 	str	r0, [r3, #0]
 	mov	r0, r8
 	bl	ftl_malloc
-	ldr	r3, .L967+268
+	ldr	r3, .L972+268
 	str	r0, [r3, #0]
 	ldr	r0, [r7, #0]
-	ldr	r7, .L967+272
+	ldr	r7, .L972+272
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L967+276
+	ldr	r3, .L972+276
 	str	r0, [r3, #0]
 	ldrh	r0, [r7, #0]
 	muls	r0, r5, r0
 	bl	ftl_malloc
-	ldr	r3, .L967+280
-	ldr	r5, .L967+284
+	ldr	r3, .L972+280
+	ldr	r5, .L972+284
 	str	r0, [r3, #0]
 	ldrh	r3, [r7, #0]
 	ldrh	r0, [r6, #0]
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L967+288
+	ldr	r3, .L972+288
 	str	r0, [r3, #0]
 	movs	r0, #6
 	ldrh	r3, [r4, #0]
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L967+292
-	ldr	r4, .L967+296
+	ldr	r3, .L972+292
+	ldr	r4, .L972+296
 	ldrh	r2, [r5, #0]
 	str	r0, [r3, #0]
-	ldr	r3, .L967+300
+	ldr	r3, .L972+300
 	ldrh	r3, [r3, #0]
 	adds	r3, r3, #31
 	lsrs	r3, r3, #5
@@ -8129,17 +8173,17 @@ FtlMemInit:
 	muls	r3, r2, r3
 	lsls	r0, r3, #2
 	bl	ftl_malloc
-	b	.L968
-.L969:
+	b	.L973
+.L974:
 	.align	2
-.L967:
-	.word	.LANCHOR129
+.L972:
+	.word	.LANCHOR117
 	.word	.LANCHOR154
 	.word	.LANCHOR170
-	.word	.LANCHOR70
+	.word	.LANCHOR58
 	.word	.LANCHOR155
 	.word	.LANCHOR156
-	.word	.LANCHOR136
+	.word	.LANCHOR124
 	.word	.LANCHOR157
 	.word	.LANCHOR158
 	.word	.LANCHOR159
@@ -8149,71 +8193,71 @@ FtlMemInit:
 	.word	.LANCHOR163
 	.word	.LANCHOR164
 	.word	.LANCHOR165
-	.word	.LANCHOR97
+	.word	.LANCHOR85
 	.word	.LANCHOR166
 	.word	.LANCHOR167
 	.word	.LANCHOR168
 	.word	.LANCHOR169
 	.word	.LANCHOR171
 	.word	.LANCHOR172
-	.word	.LANCHOR89
-	.word	.LANCHOR149
-	.word	.LANCHOR150
+	.word	.LANCHOR77
+	.word	.LANCHOR137
+	.word	.LANCHOR138
 	.word	.LANCHOR173
 	.word	.LANCHOR174
 	.word	.LANCHOR175
-	.word	.LANCHOR151
+	.word	.LANCHOR139
 	.word	.LANCHOR176
-	.word	.LANCHOR153
-	.word	.LANCHOR146
-	.word	.LANCHOR148
+	.word	.LANCHOR141
+	.word	.LANCHOR134
+	.word	.LANCHOR136
 	.word	.LANCHOR177
 	.word	.LANCHOR178
 	.word	.LANCHOR179
-	.word	.LANCHOR73
-	.word	.LANCHOR95
-	.word	.LANCHOR135
-	.word	.LANCHOR98
+	.word	.LANCHOR61
+	.word	.LANCHOR83
+	.word	.LANCHOR123
+	.word	.LANCHOR86
 	.word	.LANCHOR180
 	.word	.LANCHOR181
-	.word	.LANCHOR132
+	.word	.LANCHOR120
 	.word	.LANCHOR182
 	.word	.LANCHOR183
-	.word	.LANCHOR74
-	.word	.LANCHOR134
+	.word	.LANCHOR62
+	.word	.LANCHOR122
 	.word	.LANCHOR184
 	.word	.LANCHOR185
-	.word	.LANCHOR56
-	.word	.LANCHOR133
+	.word	.LANCHOR44
+	.word	.LANCHOR121
 	.word	.LANCHOR186
-	.word	.LANCHOR142
-	.word	.LANCHOR80
+	.word	.LANCHOR130
+	.word	.LANCHOR68
 	.word	.LANCHOR187
-	.word	.LANCHOR96
-	.word	.LANCHOR101
-	.word	.LANCHOR124
-	.word	.LANCHOR120
-	.word	.LANCHOR119
-	.word	.LANCHOR87
+	.word	.LANCHOR84
+	.word	.LANCHOR89
+	.word	.LANCHOR112
+	.word	.LANCHOR108
+	.word	.LANCHOR107
+	.word	.LANCHOR75
 	.word	.LANCHOR188
 	.word	.LANCHOR189
 	.word	.LANCHOR190
-	.word	.LANCHOR82
-	.word	.LANCHOR126
-	.word	.LANCHOR191
-	.word	.LANCHOR83
-	.word	.LANCHOR125
+	.word	.LANCHOR70
 	.word	.LANCHOR114
-	.word	.LANCHOR60
-	.word	.LANCHOR121
-	.word	.LANCHOR99
-	.word	.LANCHOR91
+	.word	.LANCHOR191
+	.word	.LANCHOR71
+	.word	.LANCHOR113
+	.word	.LANCHOR102
+	.word	.LANCHOR48
+	.word	.LANCHOR109
+	.word	.LANCHOR87
+	.word	.LANCHOR79
+	.word	.LANCHOR54
+	.word	.LANCHOR41
+	.word	.LANCHOR65
 	.word	.LANCHOR66
-	.word	.LANCHOR53
-	.word	.LANCHOR77
-	.word	.LANCHOR78
-.L968:
-	ldr	r2, .L970
+.L973:
+	ldr	r2, .L975
 	ldrh	r4, [r4, #0]
 	movs	r1, #1
 	mov	r3, r2
@@ -8221,35 +8265,35 @@ FtlMemInit:
 	lsls	r4, r4, #2
 	str	r0, [r3, #28]!
 	mov	r0, r4
-	b	.L963
-.L964:
+	b	.L968
+.L969:
 	ldr	r6, [r2, #28]
 	adds	r1, r1, #1
 	adds	r6, r6, r0
 	adds	r0, r0, r4
 	str	r6, [r3, #4]!
-.L963:
+.L968:
 	cmp	r1, r5
-	bcc	.L964
-	ldr	r0, .L970
+	bcc	.L969
+	ldr	r0, .L975
 	movs	r3, #0
 	mov	r2, r3
 	add	r0, r0, r1, lsl #2
-	b	.L965
-.L966:
+	b	.L970
+.L971:
 	adds	r4, r0, r3
 	adds	r1, r1, #1
 	adds	r3, r3, #4
 	str	r2, [r4, #28]
-.L965:
+.L970:
 	cmp	r1, #7
-	bls	.L966
+	bls	.L971
 	movs	r0, #0
 	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
-.L971:
+.L976:
 	.align	2
-.L970:
-	.word	.LANCHOR90
+.L975:
+	.word	.LANCHOR78
 	.size	FtlMemInit, .-FtlMemInit
 	.section	.text.NandcInit,"ax",%progbits
 	.align	1
@@ -8262,9 +8306,9 @@ NandcInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r2, #1
-	ldr	r3, .L973
+	ldr	r3, .L978
 	movs	r4, #0
-	ldr	r5, .L973+4
+	ldr	r5, .L978+4
 	stmia	r3, {r0, r4}
 	str	r2, [r3, #12]
 	movs	r2, #2
@@ -8275,19 +8319,19 @@ NandcInit:
 	str	r2, [r3, #28]
 	str	r0, [r3, #24]
 	str	r0, [r5, #0]
-	ldr	r2, .L973+8
+	ldr	r2, .L978+8
 	ldr	r3, [r0, #0]
 	and	r3, r3, #253952
 	ubfx	r1, r3, #13, #1
 	str	r1, [r2, #0]
-	ldr	r2, .L973+12
+	ldr	r2, .L978+12
 	and	r3, r3, #245760
 	ldr	r1, [r0, #352]
 	orr	r3, r3, #256
 	ubfx	r1, r1, #16, #4
 	str	r1, [r2, #0]
 	ldr	r1, [r0, #352]
-	ldr	r2, .L973+16
+	ldr	r2, .L978+16
 	str	r1, [r2, #0]
 	str	r3, [r0, #0]
 	str	r4, [r0, #336]
@@ -8297,27 +8341,27 @@ NandcInit:
 	movw	r2, #8322
 	mov	r0, #36864
 	str	r2, [r3, #344]
-	ldr	r2, .L973+20
+	ldr	r2, .L978+20
 	str	r2, [r3, #304]
 	bl	ftl_malloc
-	ldr	r3, .L973+24
+	ldr	r3, .L978+24
 	str	r0, [r3, #0]
-	ldr	r3, .L973+28
+	ldr	r3, .L978+28
 	str	r0, [r3, #0]
 	add	r0, r0, #32768
 	str	r4, [r3, #24]
 	str	r0, [r3, #4]
-	ldr	r3, .L973+32
+	ldr	r3, .L978+32
 	str	r4, [r3, #0]
 	pop	{r3, r4, r5, pc}
-.L974:
+.L979:
 	.align	2
-.L973:
+.L978:
 	.word	.LANCHOR5
 	.word	.LANCHOR30
 	.word	.LANCHOR192
 	.word	.LANCHOR37
-	.word	.LANCHOR40
+	.word	.LANCHOR142
 	.word	1710593
 	.word	.LANCHOR193
 	.word	.LANCHOR38
@@ -8408,13 +8452,13 @@ rk_ftl_get_capacity:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L981
+	ldr	r3, .L986
 	ldr	r0, [r3, #0]
 	bx	lr
-.L982:
+.L987:
 	.align	2
-.L981:
-	.word	.LANCHOR84
+.L986:
+	.word	.LANCHOR72
 	.size	rk_ftl_get_capacity, .-rk_ftl_get_capacity
 	.section	.text.rknand_print_hex,"ax",%progbits
 	.align	1
@@ -8432,48 +8476,48 @@ rknand_print_hex:
 	mov	r5, r2
 	mov	r8, r3
 	mov	r6, r7
-	b	.L984
-.L990:
-	cbnz	r7, .L985
-	ldr	r0, .L992
+	b	.L989
+.L995:
+	cbnz	r7, .L990
+	ldr	r0, .L997
 	mov	r1, sl
 	mov	r2, r6
 	bl	printf
-.L985:
+.L990:
 	cmp	r5, #4
-	ldr	r0, .L992+4
-	bne	.L986
+	ldr	r0, .L997+4
+	bne	.L991
 	ldr	r1, [r4, r6, lsl #2]
-	b	.L991
-.L986:
+	b	.L996
+.L991:
 	cmp	r5, #2
 	ite	eq
 	ldrsheq	r1, [r4, r6, lsl #1]
 	ldrbne	r1, [r4, r6]	@ zero_extendqisi2
-.L991:
+.L996:
 	adds	r7, r7, #1
 	bl	printf
 	cmp	r7, #15
-	bls	.L989
-	ldr	r0, .L992+8
+	bls	.L994
+	ldr	r0, .L997+8
 	movs	r7, #0
-	ldr	r1, .L992+12
+	ldr	r1, .L997+12
 	bl	printf
-.L989:
+.L994:
 	adds	r6, r6, #1
-.L984:
+.L989:
 	cmp	r6, r8
-	bne	.L990
-	ldr	r0, .L992+8
-	ldr	r1, .L992+12
+	bne	.L995
+	ldr	r0, .L997+8
+	ldr	r1, .L997+12
 	pop	{r3, r4, r5, r6, r7, r8, sl, lr}
 	b	printf
-.L993:
+.L998:
 	.align	2
-.L992:
+.L997:
 	.word	.LC13
 	.word	.LC14
-	.word	.LC10
+	.word	.LC4
 	.word	.LC15
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.FlashReadSlc2KPages,"ax",%progbits
@@ -8485,7 +8529,7 @@ rknand_print_hex:
 FlashReadSlc2KPages:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1008
+	ldr	r3, .L1013
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	sub	sp, sp, #24
 	mov	r7, r1
@@ -8493,9 +8537,9 @@ FlashReadSlc2KPages:
 	str	r2, [sp, #12]
 	mov	r4, r0
 	movs	r6, #0
-	ldr	sl, .L1008+28
-	b	.L995
-.L1004:
+	ldr	sl, .L1013+28
+	b	.L1000
+.L1009:
 	subs	r3, r7, r6
 	ldr	r1, [sp, #12]
 	add	r2, sp, #20
@@ -8504,16 +8548,16 @@ FlashReadSlc2KPages:
 	str	r3, [sp, #0]
 	add	r3, sp, #16
 	bl	LogAddr2PhyAddr
-	ldr	r1, .L1008+4
+	ldr	r1, .L1013+4
 	ldr	r3, [sp, #16]
 	ldrb	r2, [r1, #0]	@ zero_extendqisi2
 	cmp	r3, r2
-	bcc	.L996
+	bcc	.L1001
 	mov	r3, #-1
 	str	r3, [r4, #0]
-	b	.L997
-.L996:
-	ldr	r2, .L1008+8
+	b	.L1002
+.L1001:
+	ldr	r2, .L1013+8
 	ldrb	r5, [r2, r3]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	NandcWaitFlashReady
@@ -8538,13 +8582,13 @@ FlashReadSlc2KPages:
 	mov	r0, r5
 	bl	FlashReadCmd
 	ldr	r3, [r4, #8]
-	cbz	r3, .L998
+	cbz	r3, .L1003
 	add	r3, r3, #2048
-.L998:
+.L1003:
 	ldr	r2, [r4, #12]
-	cbz	r2, .L999
+	cbz	r2, .L1004
 	adds	r2, r2, #8
-.L999:
+.L1004:
 	movs	r1, #0
 	str	r2, [sp, #0]
 	mov	r0, r5
@@ -8554,7 +8598,7 @@ FlashReadSlc2KPages:
 	mov	r0, r5
 	str	r3, [sp, #8]
 	bl	NandcFlashDeCs
-	ldr	r2, .L1008+12
+	ldr	r2, .L1013+12
 	ldr	r3, [sp, #8]
 	ldrb	r2, [r2, #0]	@ zero_extendqisi2
 	cmp	r3, fp
@@ -8562,63 +8606,63 @@ FlashReadSlc2KPages:
 	movcc	r3, fp
 	add	r2, r2, r2, lsl #1
 	cmp	r3, r2, lsr #2
-	bls	.L1000
+	bls	.L1005
 	cmp	r3, #-1
 	ite	eq
 	moveq	r3, #-1
 	movne	r3, #256
-.L1000:
-	adds	r2, r3, #1
+.L1005:
+	adds	r0, r3, #1
 	str	r3, [r4, #0]
-	beq	.L1001
+	beq	.L1006
 	cmp	r3, #256
-	beq	.L1001
+	beq	.L1006
 	movs	r3, #0
 	str	r3, [r4, #0]
-.L1001:
+.L1006:
 	ldr	r3, [r4, #12]
-	cbz	r3, .L1002
+	cbz	r3, .L1007
 	ldr	r2, [r3, #8]
-	adds	r0, r2, #1
-	bne	.L1002
+	adds	r1, r2, #1
+	bne	.L1007
 	ldr	r3, [r3, #0]
 	adds	r3, r3, #1
 	it	ne
 	strne	r2, [r4, #0]
-.L1002:
+.L1007:
 	ldr	r3, [r4, #0]
-	adds	r1, r3, #1
-	bne	.L997
-	ldr	r2, .L1008+12
+	adds	r2, r3, #1
+	bne	.L1002
+	ldr	r2, .L1013+12
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1008+16
+	ldr	r0, .L1013+16
 	ldrb	r2, [r2, #0]	@ zero_extendqisi2
 	bl	printf
 	ldr	r1, [r4, #8]
-	cbz	r1, .L1003
-	ldr	r0, .L1008+20
+	cbz	r1, .L1008
+	ldr	r0, .L1013+20
 	movs	r2, #4
 	movs	r3, #8
 	bl	rknand_print_hex
-.L1003:
+.L1008:
 	ldr	r1, [r4, #12]
-	cbz	r1, .L997
+	cbz	r1, .L1002
 	movs	r2, #4
-	ldr	r0, .L1008+24
+	ldr	r0, .L1013+24
 	mov	r3, r2
 	bl	rknand_print_hex
-.L997:
+.L1002:
 	adds	r6, r6, #1
 	adds	r4, r4, #36
-.L995:
+.L1000:
 	cmp	r6, r7
-	bne	.L1004
+	bne	.L1009
 	movs	r0, #0
 	add	sp, sp, #24
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1009:
+.L1014:
 	.align	2
-.L1008:
+.L1013:
 	.word	.LANCHOR18
 	.word	.LANCHOR16
 	.word	.LANCHOR19
@@ -8637,24 +8681,24 @@ FlashReadSlc2KPages:
 FlashReadPages:
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1058
+	ldr	r3, .L1063
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	sub	sp, sp, #48
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
 	str	r0, [sp, #12]
 	str	r1, [sp, #32]
 	str	r3, [sp, #28]
-	ldr	r3, .L1058+4
+	ldr	r3, .L1063+4
 	str	r2, [sp, #20]
 	ldrb	r4, [r3, #0]	@ zero_extendqisi2
 	str	r4, [sp, #36]
-	ldr	r4, .L1058+8
+	ldr	r4, .L1063+8
 	ldrb	r4, [r4, #0]	@ zero_extendqisi2
 	cmp	r4, #0
-	beq	.L1044
+	beq	.L1049
 	bl	FlashReadSlc2KPages
-	b	.L1012
-.L1043:
+	b	.L1017
+.L1048:
 	movs	r3, #36
 	ldr	r4, [sp, #12]
 	add	r2, sp, #44
@@ -8670,99 +8714,99 @@ FlashReadPages:
 	str	r3, [sp, #0]
 	add	r3, sp, #40
 	bl	LogAddr2PhyAddr
-	ldr	r2, .L1058+12
+	ldr	r2, .L1063+12
 	ldr	r3, [sp, #40]
 	ldrb	r2, [r2, #0]	@ zero_extendqisi2
 	cmp	r3, r2
 	mov	r8, r0
-	bcc	.L1013
+	bcc	.L1018
 	ldr	r1, [sp, #12]
 	mov	r3, #-1
 	ldr	r4, [sp, #16]
 	str	r3, [r1, r4]
-	b	.L1014
-.L1013:
-	ldr	r2, .L1058+16
+	b	.L1019
+.L1018:
+	ldr	r2, .L1063+16
 	ldrb	r4, [r2, r3]	@ zero_extendqisi2
-	ldr	r3, .L1058+20
+	ldr	r3, .L1063+20
 	mov	r0, r4
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	cmp	r3, #0
 	it	eq
 	moveq	r8, #0
 	bl	NandcWaitFlashReady
-	ldr	r3, .L1058+24
+	ldr	r3, .L1063+24
 	ldr	r3, [r3, #0]
 	ldrb	r0, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r0, #1
 	cmp	r3, #6
-	bhi	.L1016
-	ldr	r2, .L1058+28
+	bhi	.L1021
+	ldr	r2, .L1063+28
 	cmp	r0, #7
 	add	r1, r2, r4
 	ldrb	r3, [r1, #12]	@ zero_extendqisi2
 	it	eq
 	ldrbeq	r3, [r1, #20]	@ zero_extendqisi2
-	ldr	r1, .L1058+32
+	ldr	r1, .L1063+32
 	ldrb	r1, [r1, r4]	@ zero_extendqisi2
 	cmp	r1, r3
-	beq	.L1016
+	beq	.L1021
 	ldrb	r1, [r2, #1]	@ zero_extendqisi2
 	mov	r0, r4
-	ldr	r2, .L1058+36
+	ldr	r2, .L1063+36
 	bl	HynixSetRRPara
-.L1016:
+.L1021:
 	mov	r0, r4
 	and	r5, r5, #-2147483648
 	str	r5, [sp, #24]
 	bl	NandcFlashCs
 	ldr	r2, [sp, #20]
 	cmp	r2, #1
-	beq	.L1018
+	beq	.L1023
 	ldr	r5, [sp, #24]
-	cbz	r5, .L1019
-.L1018:
-	ldr	r3, .L1058+40
+	cbz	r5, .L1024
+.L1023:
+	ldr	r3, .L1063+40
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1019
+	cbz	r3, .L1024
 	mov	r0, r4
 	bl	flash_enter_slc_mode
-	b	.L1020
-.L1019:
+	b	.L1025
+.L1024:
 	mov	r0, r4
 	bl	flash_exit_slc_mode
-.L1020:
+.L1025:
 	mov	r5, r7
 	movs	r6, #0
 	mov	r7, r8
-.L1057:
+.L1062:
 	ldr	r1, [sp, #44]
 	adds	r2, r1, #1
-	bne	.L1022
+	bne	.L1027
 	cmp	r4, #255
-	beq	.L1046
-.L1022:
-	cbz	r7, .L1024
-	ldr	r3, .L1058+44
+	beq	.L1051
+.L1027:
+	cbz	r7, .L1029
+	ldr	r3, .L1063+44
 	mov	r0, r4
 	ldr	r2, [r3, #0]
 	adds	r2, r1, r2
 	bl	FlashReadDpCmd
-	b	.L1025
-.L1024:
+	b	.L1030
+.L1029:
 	mov	r0, r4
 	bl	FlashReadCmd
-.L1025:
+.L1030:
 	mov	r0, r4
 	bl	NandcWaitFlashReady
-	cbz	r7, .L1023
+	cbz	r7, .L1028
 	mov	r0, r4
 	ldr	r1, [sp, #44]
 	bl	FlashReadDpDataOutCmd
-	b	.L1023
-.L1046:
+	b	.L1028
+.L1051:
 	movs	r7, #0
-.L1023:
+.L1028:
 	ldr	r3, [r5, #12]
 	movs	r1, #0
 	mov	r0, r4
@@ -8770,22 +8814,22 @@ FlashReadPages:
 	str	r3, [sp, #0]
 	ldr	r3, [r5, #8]
 	bl	NandcXferData
-	ldr	r1, .L1058+4
+	ldr	r1, .L1063+4
 	ldrb	r3, [r1, #0]	@ zero_extendqisi2
-	cbz	r3, .L1048
+	cbz	r3, .L1053
 	adds	r3, r0, #1
-	bne	.L1048
+	bne	.L1053
 	strb	r6, [r1, #0]
 	movs	r7, #0
-	b	.L1057
-.L1048:
+	b	.L1062
+.L1053:
 	mov	r8, r7
 	mov	r7, r5
 	mov	r6, r8
 	mov	r5, r0
 	cmp	r8, #0
-	beq	.L1027
-	ldr	r2, .L1058+44
+	beq	.L1032
+	ldr	r2, .L1063+44
 	mov	r0, r4
 	ldr	r3, [sp, #44]
 	ldr	r1, [r2, #0]
@@ -8807,18 +8851,18 @@ FlashReadPages:
 	ite	ne
 	movne	r6, r8
 	moveq	r6, #0
-.L1027:
+.L1032:
 	mov	r0, r4
 	bl	NandcFlashDeCs
 	ldr	r3, [sp, #36]
-	ldr	r2, .L1058+4
+	ldr	r2, .L1063+4
 	adds	r0, r5, #1
 	strb	r3, [r2, #0]
-	bne	.L1031
-	ldr	r3, .L1058+48
+	bne	.L1036
+	ldr	r3, .L1063+48
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1029
-	ldr	r3, .L1058+52
+	cbz	r3, .L1034
+	ldr	r3, .L1063+52
 	mov	r0, r4
 	ldr	r1, [sp, #44]
 	ldr	r3, [r3, #0]
@@ -8830,73 +8874,73 @@ FlashReadPages:
 	bl	FlashDdrTunningRead
 	adds	r1, r0, #1
 	mov	r5, r0
-	beq	.L1030
-	ldr	r3, .L1058+56
+	beq	.L1035
+	ldr	r3, .L1063+56
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	cmp	r0, r3, lsr #1
-	bls	.L1051
-.L1030:
+	bls	.L1056
+.L1035:
 	ubfx	r0, r6, #8, #8
 	bl	NandcSetDdrPara
 	adds	r2, r5, #1
-	bne	.L1051
-.L1029:
-	ldr	r3, .L1058+60
+	bne	.L1056
+.L1034:
+	ldr	r3, .L1063+60
 	mov	r0, r4
 	ldr	r1, [sp, #44]
 	ldr	r2, [r7, #8]
 	ldr	r6, [r3, #0]
 	ldr	r3, [r7, #12]
 	cmp	r6, #0
-	beq	.L1032
+	beq	.L1037
 	blx	r6
 	adds	r3, r0, #1
 	mov	r5, r0
-	bne	.L1053
-	ldr	r3, .L1058+24
+	bne	.L1058
+	ldr	r3, .L1063+24
 	ldr	r3, [r3, #0]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	cmp	r3, #6
-	bhi	.L1034
-	ldr	r2, .L1058+28
+	bhi	.L1039
+	ldr	r2, .L1063+28
 	mov	r0, r4
 	movs	r3, #0
 	ldrb	r1, [r2, #1]	@ zero_extendqisi2
 	adds	r2, r2, #4
 	bl	HynixSetRRPara
-.L1034:
+.L1039:
 	ldr	r1, [sp, #44]
 	mov	r0, r4
 	ldr	r2, [r7, #8]
 	ldr	r3, [r7, #12]
 	bl	FlashReadRawPage
-	ldr	r3, .L1058+56
+	ldr	r3, .L1063+56
 	ldr	r1, [r7, #4]
 	ldrb	r2, [r3, #0]	@ zero_extendqisi2
 	mov	r5, r0
-	ldr	r0, .L1058+64
+	ldr	r0, .L1063+64
 	mov	r3, r5
 	bl	printf
 	adds	r6, r5, #1
-	bne	.L1053
-	ldr	r3, .L1058+40
+	bne	.L1058
+	ldr	r3, .L1063+40
 	ldrb	r6, [r3, #0]	@ zero_extendqisi2
 	cmp	r6, #0
-	beq	.L1033
+	beq	.L1038
 	ldr	r1, [sp, #20]
 	mov	r0, r4
 	cmp	r1, #1
-	beq	.L1035
+	beq	.L1040
 	ldr	r2, [sp, #24]
-	cbz	r2, .L1036
-.L1035:
+	cbz	r2, .L1041
+.L1040:
 	bl	flash_enter_slc_mode
-	b	.L1037
-.L1036:
+	b	.L1042
+.L1041:
 	bl	flash_exit_slc_mode
-.L1037:
-	ldr	r3, .L1058+60
+.L1042:
+	ldr	r3, .L1063+60
 	mov	r0, r4
 	ldr	r1, [sp, #44]
 	ldr	r2, [r7, #8]
@@ -8904,14 +8948,14 @@ FlashReadPages:
 	ldr	r3, [r7, #12]
 	blx	r5
 	mov	r5, r0
-	b	.L1053
-.L1032:
+	b	.L1058
+.L1037:
 	bl	FlashReadRawPage
 	mov	r5, r0
-	b	.L1033
-.L1059:
+	b	.L1038
+.L1064:
 	.align	2
-.L1058:
+.L1063:
 	.word	.LANCHOR18
 	.word	.LANCHOR4
 	.word	.LANCHOR0
@@ -8927,108 +8971,108 @@ FlashReadPages:
 	.word	.LANCHOR35
 	.word	.LANCHOR30
 	.word	.LANCHOR29
-	.word	.LANCHOR51
+	.word	.LANCHOR153
 	.word	.LC19
-.L1051:
+.L1056:
 	movs	r6, #0
-.L1031:
-	ldr	r3, .L1060
+.L1036:
+	ldr	r3, .L1065
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r5, r3, lsr #2
-	bls	.L1033
-	ldr	r3, .L1060+4
+	bls	.L1038
+	ldr	r3, .L1065+4
 	ldr	r3, [r3, #0]
 	cmp	r3, #0
 	it	eq
 	moveq	r5, #256
-	b	.L1033
-.L1053:
+	b	.L1038
+.L1058:
 	movs	r6, #0
-.L1033:
+.L1038:
 	ldr	r1, [sp, #12]
 	adds	r0, r5, #1
 	ldr	r3, [sp, #16]
 	str	r5, [r1, r3]
-	beq	.L1038
+	beq	.L1043
 	cmp	r5, #256
-	beq	.L1038
+	beq	.L1043
 	ldr	r2, [sp, #16]
 	movs	r3, #0
 	str	r3, [r1, r2]
-.L1038:
-	ldr	r1, [sp, #16]
+.L1043:
 	ldr	r2, [sp, #12]
+	ldr	r1, [sp, #16]
 	ldr	r3, [r2, r1]
-	adds	r1, r3, #1
-	bne	.L1039
-	ldr	r2, .L1060
+	adds	r2, r3, #1
+	bne	.L1044
+	ldr	r2, .L1065
 	ldr	r1, [r7, #4]
-	ldr	r0, .L1060+8
+	ldr	r0, .L1065+8
 	ldrb	r2, [r2, #0]	@ zero_extendqisi2
 	bl	printf
 	ldr	r1, [r7, #12]
-	cbz	r1, .L1039
+	cbz	r1, .L1044
 	movs	r2, #4
-	ldr	r0, .L1060+12
+	ldr	r0, .L1065+12
 	mov	r3, r2
 	bl	rknand_print_hex
-.L1039:
-	cbz	r6, .L1040
-	ldr	r3, .L1060
+.L1044:
+	cbz	r6, .L1045
+	ldr	r3, .L1065
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	sl, r3, lsr #2
-	bls	.L1041
-	ldr	r3, .L1060+4
+	bls	.L1046
+	ldr	r3, .L1065+4
 	ldr	r3, [r3, #0]
 	cmp	r3, #0
 	it	eq
 	moveq	sl, #256
-.L1041:
+.L1046:
 	ldr	r1, [sp, #12]
 	movs	r2, #36
 	add	r3, fp, #1
 	muls	r3, r2, r3
 	cmp	sl, #-1
 	str	sl, [r1, r3]
-	beq	.L1040
+	beq	.L1045
 	cmp	sl, #256
-	beq	.L1040
+	beq	.L1045
 	movs	r2, #0
 	str	r2, [r1, r3]
-.L1040:
+.L1045:
 	ldr	r2, [sp, #20]
 	add	fp, fp, r6
 	cmp	r2, #1
-	beq	.L1042
+	beq	.L1047
 	ldr	r3, [sp, #24]
-	cbz	r3, .L1014
-.L1042:
-	ldr	r3, .L1060+16
+	cbz	r3, .L1019
+.L1047:
+	ldr	r3, .L1065+16
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1014
+	cbz	r3, .L1019
 	mov	r0, r4
 	bl	flash_exit_slc_mode
-.L1014:
+.L1019:
 	add	fp, fp, #1
-	b	.L1011
-.L1044:
+	b	.L1016
+.L1049:
 	mov	sl, r4
 	mov	fp, r4
-.L1011:
+.L1016:
 	ldr	r4, [sp, #32]
 	cmp	fp, r4
-	bcc	.L1043
+	bcc	.L1048
 	movs	r0, #0
-.L1012:
+.L1017:
 	add	sp, sp, #48
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1061:
+.L1066:
 	.align	2
-.L1060:
+.L1065:
 	.word	.LANCHOR29
-	.word	.LANCHOR51
+	.word	.LANCHOR153
 	.word	.LC16
 	.word	.LC18
 	.word	.LANCHOR7
@@ -9042,55 +9086,55 @@ FlashReadPages:
 FtlGcScanTempBlk:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1085
+	ldr	r3, .L1090
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	mov	r4, r0
 	ldrh	r5, [r3, #0]
 	movw	r3, #65535
 	sub	sp, sp, #24
 	cmp	r5, r3
-	beq	.L1081
-	cbnz	r5, .L1063
-	b	.L1064
-.L1081:
+	beq	.L1086
+	cbnz	r5, .L1068
+	b	.L1069
+.L1086:
 	movs	r5, #0
-.L1063:
-	ldr	r3, .L1085+4
+.L1068:
+	ldr	r3, .L1090+4
 	ldrh	r3, [r3, #0]
 	cmp	r1, r3
-	bne	.L1065
-.L1064:
+	bne	.L1070
+.L1069:
 	bl	FtlGcPageVarInit
-.L1065:
-	ldr	r8, .L1085+44
+.L1070:
+	ldr	r8, .L1090+44
 	movw	sl, #65535
 	mov	r3, #-1
 	str	r3, [sp, #20]
-.L1078:
+.L1083:
 	ldrh	r3, [r4, #0]
 	movs	r2, #0
 	strb	r2, [r4, #8]
 	cmp	r3, sl
-	beq	.L1066
-.L1067:
+	beq	.L1071
+.L1072:
 	mov	r7, r4
-.L1083:
-	ldr	r3, .L1085+8
+.L1088:
+	ldr	r3, .L1090+8
 	mov	r2, r7
-	ldr	r6, .L1085+12
+	ldr	r6, .L1090+12
 	ldr	ip, [r8, #0]
 	ldr	lr, [r3, #0]
-	ldr	r3, .L1085+16
+	ldr	r3, .L1090+16
 	ldrh	fp, [r6, #0]
 	ldrh	r6, [r3, #0]
 	movs	r3, #0
 	mov	r4, r3
 	stmia	sp, {r6, ip}
-	b	.L1068
-.L1070:
+	b	.L1073
+.L1075:
 	ldrh	r0, [r2, #16]
 	cmp	r0, sl
-	beq	.L1069
+	beq	.L1074
 	ldr	r6, [sp, #4]
 	mov	ip, #36
 	orr	r0, r5, r0, lsl #10
@@ -9105,21 +9149,21 @@ FtlGcScanTempBlk:
 	bic	r0, r0, #3
 	add	r0, lr, r0
 	str	r0, [r1, #12]
-.L1069:
+.L1074:
 	adds	r3, r3, #1
 	adds	r2, r2, #2
 	uxth	r3, r3
-.L1068:
+.L1073:
 	cmp	r3, fp
-	bne	.L1070
+	bne	.L1075
 	ldr	r0, [r8, #0]
 	mov	r1, r4
 	movs	r2, #0
 	movs	r6, #0
 	bl	FlashReadPages
 	mov	fp, r6
-	b	.L1071
-.L1079:
+	b	.L1076
+.L1084:
 	ldr	r3, [r8, #0]
 	adds	r2, r3, r6
 	ldr	r1, [r2, #4]
@@ -9132,57 +9176,57 @@ FtlGcScanTempBlk:
 	ldr	r1, [sp, #8]
 	ldr	r2, [sp, #16]
 	ldr	r3, [r3, r6]
-	cbnz	r3, .L1072
+	cbnz	r3, .L1077
 	ldr	r3, [r2, #12]
 	adds	r6, r6, #36
 	ldrh	r2, [r3, #0]
 	cmp	r2, sl
-	bne	.L1073
-	ldr	r3, .L1085+20
+	bne	.L1078
+	ldr	r3, .L1090+20
 	movs	r1, #1
 	mov	r2, r0
 	mov	r4, r7
 	str	r1, [r3, #0]
-	b	.L1066
-.L1073:
+	b	.L1071
+.L1078:
 	add	fp, fp, #1
 	ldr	r0, [r3, #12]
 	ldr	r2, [r3, #8]
 	bl	FtlGcUpdatePage
 	uxth	fp, fp
-	b	.L1071
-.L1072:
+	b	.L1076
+.L1077:
 	mov	fp, r1
-	ldr	r0, .L1085+24
+	ldr	r0, .L1090+24
 	ldrh	r1, [r7, #0]
 	mov	r2, fp
 	bl	printf
-	ldr	r3, .L1085+28
+	ldr	r3, .L1090+28
 	mov	r4, r7
 	ldr	r3, [r3, #0]
-	cbnz	r3, .L1074
-	ldr	r3, .L1085+32
+	cbnz	r3, .L1079
+	ldr	r3, .L1090+32
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1075
-.L1074:
-	ldr	r3, .L1085+36
+	cbz	r3, .L1080
+.L1079:
+	ldr	r3, .L1090+36
 	ldrh	r2, [r4, #0]
 	ldr	r3, [r3, #0]
 	ldrh	r3, [r3, r2, lsl #1]
 	cmp	r3, #119
-	bls	.L1076
-.L1075:
+	bls	.L1081
+.L1080:
 	ldr	r3, [r8, #0]
 	ldr	r3, [r3, r6]
 	adds	r3, r3, #1
-	bne	.L1077
-.L1076:
+	bne	.L1082
+.L1081:
 	ldr	r3, [r8, #0]
 	adds	r6, r3, r6
 	ldr	r6, [r6, #4]
 	str	r6, [sp, #20]
-.L1077:
-	ldr	r3, .L1085+40
+.L1082:
+	ldr	r3, .L1090+40
 	movs	r5, #0
 	ldrh	r2, [r4, #0]
 	ldr	r3, [r3, #0]
@@ -9191,20 +9235,20 @@ FtlGcScanTempBlk:
 	bl	INSERT_FREE_LIST
 	strh	sl, [r4, #0]	@ movhi
 	bl	FtlGcPageVarInit
-	b	.L1078
-.L1071:
+	b	.L1083
+.L1076:
 	cmp	fp, r4
-	bne	.L1079
-	ldr	r3, .L1085+4
+	bne	.L1084
+	ldr	r3, .L1090+4
 	adds	r5, r5, #1
 	uxth	r5, r5
 	ldrh	r3, [r3, #0]
 	cmp	r3, r5
-	bhi	.L1083
+	bhi	.L1088
 	mov	r4, r7
 	movs	r2, #0
-.L1066:
-	ldr	r3, .L1085
+.L1071:
+	ldr	r3, .L1090
 	mov	r0, r4
 	movw	r1, #65535
 	strh	r5, [r4, #2]	@ movhi
@@ -9215,20 +9259,20 @@ FtlGcScanTempBlk:
 	ldr	r0, [sp, #20]
 	add	sp, sp, #24
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1086:
+.L1091:
 	.align	2
-.L1085:
+.L1090:
 	.word	.LANCHOR195
-	.word	.LANCHOR68
-	.word	.LANCHOR133
-	.word	.LANCHOR53
-	.word	.LANCHOR74
-	.word	.LANCHOR140
-	.word	.LC20
+	.word	.LANCHOR56
+	.word	.LANCHOR121
+	.word	.LANCHOR41
+	.word	.LANCHOR62
 	.word	.LANCHOR128
+	.word	.LC20
+	.word	.LANCHOR116
 	.word	.LANCHOR7
-	.word	.LANCHOR96
-	.word	.LANCHOR101
+	.word	.LANCHOR84
+	.word	.LANCHOR89
 	.word	.LANCHOR177
 	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
 	.section	.text.FtlScanSysBlk,"ax",%progbits
@@ -9240,49 +9284,49 @@ FtlGcScanTempBlk:
 FtlScanSysBlk:
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1148
+	ldr	r3, .L1152
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	movs	r4, #0
-	ldr	r5, .L1148+4
+	ldr	r5, .L1152+4
 	sub	sp, sp, #40
 	strh	r4, [r3, #0]	@ movhi
 	mov	r1, r4
-	ldr	r3, .L1148+8
+	ldr	r3, .L1152+8
 	ldr	r2, [r5, #0]
-	ldr	r7, .L1148+12
+	ldr	r7, .L1152+12
 	strh	r4, [r3, #0]	@ movhi
-	ldr	r3, .L1148+16
+	ldr	r3, .L1152+16
 	lsls	r2, r2, #2
 	ldr	r0, [r3, #0]
 	bl	memset
 	ldr	r2, [r5, #0]
-	ldr	r3, .L1148+20
+	ldr	r3, .L1152+20
 	mov	r1, r4
-	ldr	r5, .L1148+24
+	ldr	r5, .L1152+24
 	lsls	r2, r2, #1
 	ldr	r0, [r3, #0]
 	bl	memset
-	ldr	r3, .L1148+28
+	ldr	r3, .L1152+28
 	ldrh	r2, [r5, #0]
 	mov	r1, r4
 	ldr	r0, [r3, #0]
 	lsls	r2, r2, #2
 	bl	memset
-	ldr	r3, .L1148+32
+	ldr	r3, .L1152+32
 	ldrh	r2, [r5, #0]
 	mov	r1, r4
 	ldr	r0, [r3, #0]
 	lsls	r2, r2, #1
 	bl	memset
-	ldr	r0, .L1148+36
+	ldr	r0, .L1152+36
 	movs	r1, #255
 	movs	r2, #12
 	bl	memset
-	ldr	r3, .L1148+40
+	ldr	r3, .L1152+40
 	ldrh	r3, [r3, #0]
 	str	r3, [sp, #24]
-	b	.L1088
-.L1090:
+	b	.L1093
+.L1095:
 	ldrb	r0, [fp, r4]	@ zero_extendqisi2
 	ldr	r1, [sp, #24]
 	str	r3, [sp, #4]
@@ -9291,7 +9335,7 @@ FtlScanSysBlk:
 	bl	FtlBbmIsBadBlock
 	ldr	r2, [sp, #8]
 	ldr	r3, [sp, #4]
-	cbnz	r0, .L1089
+	cbnz	r0, .L1094
 	ldr	r1, [r7, #0]
 	lsls	r2, r2, #10
 	ldr	r0, [r6, #0]
@@ -9306,34 +9350,34 @@ FtlScanSysBlk:
 	adds	r2, r0, r2
 	str	r2, [r1, #12]
 	uxth	r3, r3
-.L1089:
+.L1094:
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L1125
-.L1137:
+	b	.L1130
+.L1142:
 	movs	r3, #0
-	ldr	fp, .L1148+76
-	ldr	r8, .L1148+80
+	ldr	fp, .L1152+76
+	ldr	r8, .L1152+80
 	mov	r4, r3
-	ldr	r6, .L1148+44
+	ldr	r6, .L1152+44
 	mov	sl, #36
-	ldr	r5, .L1148+48
+	ldr	r5, .L1152+48
 	str	r3, [sp, #20]
-.L1125:
-	ldr	r1, .L1148+52
+.L1130:
+	ldr	r1, .L1152+52
 	ldrh	r2, [r1, #0]
 	cmp	r2, r4
-	bhi	.L1090
+	bhi	.L1095
 	str	r3, [sp, #20]
 	cmp	r3, #0
-	beq	.L1091
+	beq	.L1096
 	ldr	r0, [r7, #0]
 	mov	r1, r3
 	movs	r2, #1
 	movs	r6, #0
 	bl	FlashReadPages
 	str	r6, [sp, #32]
-.L1124:
+.L1129:
 	ldr	r3, [r7, #0]
 	adds	r2, r3, r6
 	ldr	r3, [r3, r6]
@@ -9341,9 +9385,9 @@ FtlScanSysBlk:
 	adds	r3, r3, #1
 	ldr	r4, [r2, #12]
 	ubfx	r5, r5, #10, #16
-	bne	.L1092
+	bne	.L1097
 	mov	r8, #16
-.L1094:
+.L1099:
 	ldr	r0, [r7, #0]
 	movs	r1, #1
 	mov	r2, r1
@@ -9355,79 +9399,79 @@ FtlScanSysBlk:
 	ldrh	r3, [r4, #0]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1093
-	ldr	r1, .L1148+12
+	bne	.L1098
+	ldr	r1, .L1152+12
 	mov	r2, #-1
 	ldr	r3, [r1, #0]
 	str	r2, [r3, r6]
-	b	.L1092
-.L1093:
+	b	.L1097
+.L1098:
 	ldr	r3, [r7, #0]
 	ldr	r3, [r3, r6]
 	adds	r3, r3, #1
-	bne	.L1092
+	bne	.L1097
 	add	r8, r8, #-1
 	uxth	r8, r8
 	cmp	r8, #0
-	bne	.L1094
-.L1092:
+	bne	.L1099
+.L1097:
 	ldr	r3, [r7, #0]
 	ldr	r3, [r3, r6]
 	adds	r3, r3, #1
-	beq	.L1095
-	ldr	r2, .L1148+56
+	beq	.L1100
+	ldr	r2, .L1152+56
 	ldr	r3, [r4, #4]
 	ldr	r1, [r2, #0]
 	adds	r0, r1, #1
-	beq	.L1096
+	beq	.L1101
 	cmp	r1, r3
-	bhi	.L1097
-.L1096:
+	bhi	.L1102
+.L1101:
 	adds	r1, r3, #1
-	beq	.L1097
+	beq	.L1102
 	adds	r3, r3, #1
 	str	r3, [r2, #0]
-.L1097:
+.L1102:
 	ldrh	r3, [r4, #0]
 	movw	r2, #61604
 	cmp	r3, r2
-	beq	.L1100
-	bhi	.L1103
+	beq	.L1105
+	bhi	.L1108
 	movw	r2, #61574
 	cmp	r3, r2
-	bne	.L1098
-	b	.L1146
-.L1103:
+	bne	.L1103
+	b	.L1150
+.L1108:
 	movw	r2, #61634
 	cmp	r3, r2
-	beq	.L1101
+	beq	.L1106
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1098
-	b	.L1147
-.L1101:
-	ldr	r3, .L1148
-	ldr	r8, .L1148+4
+	bne	.L1103
+	b	.L1151
+.L1106:
+	ldr	r3, .L1152
+	ldr	r8, .L1152+4
 	ldrh	r2, [r3, #0]
 	ldr	r3, [r8, #0]
 	cmp	r2, r3
-	bls	.L1104
-	ldr	r1, .L1148+60
+	bls	.L1109
+	ldr	r1, .L1152+60
 	movw	r2, #1269
-	ldr	r0, .L1148+64
+	ldr	r0, .L1152+64
 	bl	printf
-	ldr	r0, .L1148+68
-	ldr	r1, .L1148+72
+	ldr	r0, .L1152+68
+	ldr	r1, .L1152+72
 	bl	printf
-.L1104:
+.L1109:
 	ldr	r3, [r8, #0]
 	mov	ip, #0
-	ldr	r1, .L1148
+	ldr	r1, .L1152
 	uxth	r2, r3
 	str	r3, [sp, #12]
 	subs	r3, r2, #1
 	ldrh	r0, [r1, #0]
-	ldr	r1, .L1148+16
+	ldr	r1, .L1152+16
 	uxth	r3, r3
 	subs	r2, r2, r0
 	subs	r2, r2, #1
@@ -9438,8 +9482,8 @@ FtlScanSysBlk:
 	add	sl, r1, fp, lsl #2
 	str	sl, [sp, #16]
 	mov	sl, r5
-	b	.L1105
-.L1111:
+	b	.L1110
+.L1116:
 	rsb	r2, ip, fp
 	str	r2, [sp, #28]
 	ldr	r2, [sp, #16]
@@ -9449,20 +9493,20 @@ FtlScanSysBlk:
 	str	r5, [sp, #16]
 	ldr	r5, [r2, #0]
 	cmp	r8, r5
-	bls	.L1106
+	bls	.L1111
 	ldr	ip, [r1, #0]
 	mov	r5, sl
 	str	r2, [sp, #16]
 	cmp	ip, #0
-	bne	.L1107
+	bne	.L1112
 	ldr	r2, [sp, #12]
 	cmp	r0, r2
-	beq	.L1107
+	beq	.L1112
 	add	ip, r0, #1
-	ldr	r0, .L1148
+	ldr	r0, .L1152
 	strh	ip, [r0, #0]	@ movhi
-.L1107:
-	ldr	r0, .L1148+20
+.L1112:
+	ldr	r0, .L1152+20
 	sxth	sl, r3
 	mov	fp, r3
 	str	sl, [sp, #12]
@@ -9470,98 +9514,98 @@ FtlScanSysBlk:
 	ldr	ip, [r0, #0]
 	movs	r0, #0
 	mov	r8, ip
-	b	.L1108
-.L1109:
+	b	.L1113
+.L1114:
 	ldr	sl, [r1, #4]!
 	adds	r0, r0, #1
 	uxth	r0, r0
 	str	sl, [r3], #4
 	ldrh	sl, [ip, #2]!
 	strh	sl, [r8], #2	@ movhi
-.L1108:
+.L1113:
 	ldr	r2, [sp, #12]
 	sxth	sl, r0
 	cmp	sl, r2
-	bne	.L1109
+	bne	.L1114
 	ldr	r1, [r4, #4]
 	mov	r3, fp
 	ldr	r2, [sp, #16]
 	ldr	sl, [sp, #28]
 	str	r1, [r2, #0]
-	ldr	r2, .L1148+20
+	ldr	r2, .L1152+20
 	ldr	r2, [r2, #0]
 	strh	r5, [r2, sl, lsl #1]	@ movhi
-	b	.L1110
-.L1106:
+	b	.L1115
+.L1111:
 	subs	r3, r3, #1
 	uxth	r3, r3
-.L1105:
+.L1110:
 	ldr	r5, [sp, #36]
 	sxth	r2, r3
 	cmp	r2, r5
-	bgt	.L1111
+	bgt	.L1116
 	mov	r5, sl
-.L1110:
+.L1115:
 	sxth	r3, r3
 	cmp	r3, #0
-	blt	.L1098
-	ldr	r2, .L1148
-	ldr	r0, .L1148+4
+	blt	.L1103
+	ldr	r2, .L1152
+	ldr	r0, .L1152+4
 	ldrh	r1, [r2, #0]
 	ldr	r0, [r0, #0]
 	subs	r0, r0, r1
 	subs	r0, r0, #1
 	sxth	r0, r0
 	cmp	r3, r0
-	bgt	.L1098
+	bgt	.L1103
 	adds	r1, r1, #1
 	strh	r1, [r2, #0]	@ movhi
-	ldr	r2, .L1148+16
+	ldr	r2, .L1152+16
 	ldr	r1, [r4, #4]
 	ldr	r2, [r2, #0]
 	str	r1, [r2, r3, lsl #2]
-	ldr	r2, .L1148+20
-	b	.L1144
-.L1149:
+	ldr	r2, .L1152+20
+	b	.L1148
+.L1153:
 	.align	2
-.L1148:
-	.word	.LANCHOR123
-	.word	.LANCHOR80
-	.word	.LANCHOR86
+.L1152:
+	.word	.LANCHOR111
+	.word	.LANCHOR68
+	.word	.LANCHOR74
 	.word	.LANCHOR177
-	.word	.LANCHOR125
-	.word	.LANCHOR124
-	.word	.LANCHOR77
+	.word	.LANCHOR113
+	.word	.LANCHOR112
+	.word	.LANCHOR65
 	.word	.LANCHOR189
-	.word	.LANCHOR87
+	.word	.LANCHOR75
 	.word	.LANCHOR196
-	.word	.LANCHOR55
-	.word	.LANCHOR133
-	.word	.LANCHOR74
-	.word	.LANCHOR53
+	.word	.LANCHOR43
+	.word	.LANCHOR121
+	.word	.LANCHOR62
+	.word	.LANCHOR41
 	.word	.LANCHOR156
 	.word	.LANCHOR197
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.word	.LANCHOR62
-	.word	.LANCHOR132
-.L1146:
-	ldr	r3, .L1150
-	ldr	r8, .L1150+28
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
+	.word	.LANCHOR50
+	.word	.LANCHOR120
+.L1150:
+	ldr	r3, .L1154
+	ldr	r8, .L1154+28
 	ldrh	r2, [r3, #0]
 	ldrh	r3, [r8, #0]
 	cmp	r2, r3
-	bls	.L1112
-	ldr	r1, .L1150+4
+	bls	.L1117
+	ldr	r1, .L1154+4
 	movw	r2, #1316
-	ldr	r0, .L1150+8
+	ldr	r0, .L1154+8
 	bl	printf
-	ldr	r0, .L1150+12
-	ldr	r1, .L1150+16
+	ldr	r0, .L1154+12
+	ldr	r1, .L1154+16
 	bl	printf
-.L1112:
-	ldr	r1, .L1150
+.L1117:
+	ldr	r1, .L1154
 	mov	ip, #0
 	ldrh	r8, [r8, #0]
 	ldrh	r0, [r1, #0]
@@ -9570,14 +9614,14 @@ FtlScanSysBlk:
 	uxth	r3, r2
 	subs	r2, r2, r0
 	str	r2, [sp, #36]
-	ldr	r2, .L1150+20
+	ldr	r2, .L1154+20
 	sxth	fp, r3
 	ldr	r1, [r2, #0]
 	add	sl, r1, fp, lsl #2
 	str	sl, [sp, #28]
 	mov	sl, r5
-	b	.L1113
-.L1119:
+	b	.L1118
+.L1124:
 	ldr	r2, [sp, #28]
 	add	ip, ip, #1
 	ldr	r8, [r4, #4]
@@ -9585,19 +9629,19 @@ FtlScanSysBlk:
 	str	r5, [sp, #28]
 	ldr	r5, [r2, #0]
 	cmp	r8, r5
-	bls	.L1114
+	bls	.L1119
 	ldr	ip, [r1, #0]
 	mov	r5, sl
 	cmp	ip, #0
-	bne	.L1115
+	bne	.L1120
 	ldr	sl, [sp, #16]
 	cmp	r0, sl
-	beq	.L1115
+	beq	.L1120
 	add	ip, r0, #1
-	ldr	r0, .L1150
+	ldr	r0, .L1154
 	strh	ip, [r0, #0]	@ movhi
-.L1115:
-	ldr	r0, .L1150+24
+.L1120:
+	ldr	r0, .L1154+24
 	sxth	sl, r3
 	mov	fp, r3
 	str	sl, [sp, #16]
@@ -9606,109 +9650,106 @@ FtlScanSysBlk:
 	ldr	ip, [r0, #0]
 	movs	r0, #0
 	mov	r8, ip
-	b	.L1116
-.L1117:
+	b	.L1121
+.L1122:
 	ldr	sl, [r1, #4]!
 	adds	r0, r0, #1
 	uxth	r0, r0
 	str	sl, [r3], #4
 	ldrh	sl, [r8, #2]!
 	strh	sl, [ip], #2	@ movhi
-.L1116:
+.L1121:
 	ldr	r2, [sp, #16]
 	sxth	sl, r0
 	cmp	sl, r2
-	bne	.L1117
+	bne	.L1122
 	ldr	r2, [sp, #28]
 	mov	r3, fp
 	ldr	r1, [r4, #4]
 	ldr	sl, [sp, #12]
 	str	r1, [r2, #0]
-	ldr	r2, .L1150+24
+	ldr	r2, .L1154+24
 	ldr	r2, [r2, #0]
 	strh	r5, [r2, sl, lsl #1]	@ movhi
-	b	.L1118
-.L1114:
+	b	.L1123
+.L1119:
 	subs	r3, r3, #1
 	uxth	r3, r3
-.L1113:
+.L1118:
 	ldr	r5, [sp, #36]
 	rsb	r2, ip, fp
 	str	r2, [sp, #12]
 	cmp	r2, r5
-	bgt	.L1119
+	bgt	.L1124
 	mov	r5, sl
-.L1118:
+.L1123:
 	sxth	r3, r3
 	cmp	r3, #0
-	blt	.L1098
-	ldr	r0, .L1150+28
-	ldr	r2, .L1150
+	blt	.L1103
+	ldr	r0, .L1154+28
+	ldr	r2, .L1154
 	ldrh	r0, [r0, #0]
 	ldrh	r1, [r2, #0]
 	subs	r0, r0, #1
 	subs	r0, r0, r1
 	sxth	r0, r0
 	cmp	r3, r0
-	bgt	.L1098
+	bgt	.L1103
 	adds	r1, r1, #1
 	strh	r1, [r2, #0]	@ movhi
-	ldr	r2, .L1150+20
+	ldr	r2, .L1154+20
 	ldr	r1, [r4, #4]
 	ldr	r2, [r2, #0]
 	str	r1, [r2, r3, lsl #2]
-	ldr	r2, .L1150+24
-.L1144:
+	ldr	r2, .L1154+24
+.L1148:
 	ldr	r2, [r2, #0]
 	strh	r5, [r2, r3, lsl #1]	@ movhi
-	b	.L1098
-.L1100:
-	ldr	r8, .L1150+32
+	b	.L1103
+.L1105:
+	ldr	r8, .L1154+32
 	movw	sl, #65535
 	ldrh	r3, [r8, #0]
 	cmp	r3, sl
-	bne	.L1120
+	bne	.L1125
 	ldr	r3, [r4, #4]
 	strh	r5, [r8, #0]	@ movhi
 	str	r3, [r8, #8]
-	b	.L1098
-.L1120:
+	b	.L1103
+.L1125:
 	ldrh	r0, [r8, #4]
 	movw	ip, #65535
 	cmp	r0, ip
-	beq	.L1121
+	beq	.L1126
 	movs	r1, #1
 	bl	FtlFreeSysBlkQueueIn
-.L1121:
+.L1126:
 	ldr	r2, [r4, #4]
 	ldr	r1, [r8, #8]
-	ldr	r3, .L1150+32
+	ldr	r3, .L1154+32
 	cmp	r1, r2
-	bcs	.L1122
+	bcs	.L1127
 	ldrh	r1, [r3, #0]
 	str	r2, [r3, #8]
 	strh	r5, [r3, #0]	@ movhi
 	strh	r1, [r3, #4]	@ movhi
-	b	.L1098
-.L1122:
+	b	.L1103
+.L1127:
 	strh	r5, [r3, #4]	@ movhi
-	b	.L1098
-.L1147:
+	b	.L1103
+.L1151:
 	mov	r0, r5
-	b	.L1145
-.L1095:
-	ldr	r1, .L1150+36
+	b	.L1149
+.L1100:
+	ldr	r2, .L1154+36
 	mov	r0, r5
-	ldrb	r3, [r1, #0]	@ zero_extendqisi2
-	cbz	r3, .L1123
-.L1145:
+	ldrb	r1, [r2, #0]	@ zero_extendqisi2
+	cbz	r1, .L1128
+.L1149:
 	movs	r1, #0
-	b	.L1143
-.L1123:
-	movs	r1, #1
-.L1143:
+.L1128:
 	bl	FtlFreeSysBlkQueueIn
-.L1098:
+.L1103:
 	ldr	r5, [sp, #32]
 	adds	r6, r6, #36
 	adds	r3, r5, #1
@@ -9716,36 +9757,36 @@ FtlScanSysBlk:
 	uxth	r3, r3
 	str	r3, [sp, #32]
 	cmp	r3, r5
-	bne	.L1124
-.L1091:
+	bne	.L1129
+.L1096:
 	ldr	sl, [sp, #24]
 	add	r3, sl, #1
 	uxth	r3, r3
 	str	r3, [sp, #24]
-.L1088:
-	ldr	r3, .L1150+40
+.L1093:
+	ldr	r3, .L1154+40
 	ldr	ip, [sp, #24]
 	ldrh	r3, [r3, #0]
 	cmp	r3, ip
-	bhi	.L1137
-	ldr	r3, .L1150+44
+	bhi	.L1142
+	ldr	r3, .L1154+44
 	ldr	r1, [r3, #0]
 	ldrh	r3, [r1, #0]
-	cbnz	r3, .L1126
-	ldr	r2, .L1150+48
+	cbnz	r3, .L1131
+	ldr	r2, .L1154+48
 	ldrh	r2, [r2, #0]
-	cbz	r2, .L1126
-	ldr	r2, .L1150+52
+	cbz	r2, .L1131
+	ldr	r2, .L1154+52
 	ldr	r4, [r2, #0]
 	mov	r2, r1
-	b	.L1127
-.L1130:
+	b	.L1132
+.L1135:
 	ldrh	r5, [r2], #2
 	adds	r3, r3, #1
-	cbz	r5, .L1127
-	ldr	r3, .L1150+56
+	cbz	r5, .L1132
+	ldr	r3, .L1154+56
 	sxth	r0, r0
-	ldr	ip, .L1150+52
+	ldr	ip, .L1154+52
 	mov	sl, r1
 	add	r6, r1, r0, lsl #1
 	ldr	r5, [r3, #0]
@@ -9754,8 +9795,8 @@ FtlScanSysBlk:
 	mov	r4, r3
 	add	r7, r5, r0, lsl #2
 	mov	fp, r3
-	b	.L1128
-.L1129:
+	b	.L1133
+.L1134:
 	ldrh	r1, [r6, r2]
 	strh	r1, [sl, r2]	@ movhi
 	ldr	r1, [r7, r3]
@@ -9763,37 +9804,37 @@ FtlScanSysBlk:
 	adds	r3, r3, #4
 	strh	fp, [r6, r2]	@ movhi
 	adds	r2, r2, #2
-.L1128:
+.L1133:
 	ldr	r1, [ip, #0]
 	add	r8, r4, r0
 	adds	r4, r4, #1
 	cmp	r8, r1
-	bcc	.L1129
-	b	.L1126
-.L1127:
+	bcc	.L1134
+	b	.L1131
+.L1132:
 	cmp	r3, r4
 	uxth	r0, r3
-	bne	.L1130
-.L1126:
-	ldr	r3, .L1150+24
+	bne	.L1135
+.L1131:
+	ldr	r3, .L1154+24
 	ldr	r0, [r3, #0]
 	ldrh	r3, [r0, #0]
 	cmp	r3, #0
-	bne	.L1131
-	ldr	r2, .L1150
+	bne	.L1136
+	ldr	r2, .L1154
 	ldrh	r2, [r2, #0]
 	cmp	r2, #0
-	beq	.L1131
-	ldr	r2, .L1150+28
+	beq	.L1136
+	ldr	r2, .L1154+28
 	ldrh	r4, [r2, #0]
 	mov	r2, r0
-	b	.L1132
-.L1135:
+	b	.L1137
+.L1140:
 	ldrh	r5, [r2], #2
 	adds	r3, r3, #1
 	cmp	r5, #0
-	beq	.L1132
-	ldr	r3, .L1150+20
+	beq	.L1137
+	ldr	r3, .L1154+20
 	sxth	r1, r1
 	subs	r6, r1, r6
 	add	r7, r0, r1, lsl #1
@@ -9803,8 +9844,8 @@ FtlScanSysBlk:
 	mov	r4, r3
 	add	r0, r0, r6, lsl #1
 	add	ip, r5, r1, lsl #2
-	b	.L1133
-.L1134:
+	b	.L1138
+.L1139:
 	ldrh	r8, [r7, r2]
 	ldr	sl, [ip, r3]
 	strh	r8, [r0, r2]	@ movhi
@@ -9814,64 +9855,64 @@ FtlScanSysBlk:
 	adds	r3, r3, #4
 	strh	r8, [r7, r2]	@ movhi
 	adds	r2, r2, #2
-.L1133:
-	ldr	r8, .L1150+28
+.L1138:
+	ldr	r8, .L1154+28
 	add	sl, r4, r1
 	adds	r4, r4, #1
 	ldrh	r8, [r8, #0]
 	cmp	sl, r8
-	blt	.L1134
-	b	.L1131
-.L1151:
+	blt	.L1139
+	b	.L1136
+.L1155:
 	.align	2
-.L1150:
-	.word	.LANCHOR86
+.L1154:
+	.word	.LANCHOR74
 	.word	.LANCHOR197
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
 	.word	.LANCHOR189
-	.word	.LANCHOR87
-	.word	.LANCHOR77
+	.word	.LANCHOR75
+	.word	.LANCHOR65
 	.word	.LANCHOR196
 	.word	.LANCHOR7
-	.word	.LANCHOR56
-	.word	.LANCHOR124
-	.word	.LANCHOR123
-	.word	.LANCHOR80
-	.word	.LANCHOR125
-.L1132:
+	.word	.LANCHOR44
+	.word	.LANCHOR112
+	.word	.LANCHOR111
+	.word	.LANCHOR68
+	.word	.LANCHOR113
+.L1137:
 	cmp	r3, r4
 	uxth	r1, r3
 	mov	r6, r3
-	blt	.L1135
-.L1131:
-	ldr	r3, .L1152
+	blt	.L1140
+.L1136:
+	ldr	r3, .L1156
 	ldrh	r2, [r3, #0]
-	ldr	r3, .L1152+4
+	ldr	r3, .L1156+4
 	ldr	r3, [r3, #0]
 	cmp	r2, r3
-	bls	.L1136
-	ldr	r1, .L1152+8
+	bls	.L1141
+	ldr	r1, .L1156+8
 	movw	r2, #1450
-	ldr	r0, .L1152+12
+	ldr	r0, .L1156+12
 	bl	printf
-	ldr	r0, .L1152+16
-	ldr	r1, .L1152+20
+	ldr	r0, .L1156+16
+	ldr	r1, .L1156+20
 	bl	printf
-.L1136:
+.L1141:
 	movs	r0, #0
 	add	sp, sp, #40
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1153:
+.L1157:
 	.align	2
-.L1152:
-	.word	.LANCHOR123
-	.word	.LANCHOR80
+.L1156:
+	.word	.LANCHOR111
+	.word	.LANCHOR68
 	.word	.LANCHOR197
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
 	.section	.text.FtlGetLastWrittenPage,"ax",%progbits
 	.align	1
@@ -9886,10 +9927,10 @@ FtlGetLastWrittenPage:
 	push	{r4, r5, r6, r7, r8, sl, lr}
 	sub	sp, sp, #108
 	it	eq
-	ldreq	r3, .L1165
+	ldreq	r3, .L1169
 	mov	r5, r1
 	it	ne
-	ldrne	r3, .L1165+4
+	ldrne	r3, .L1169+4
 	add	sl, sp, #68
 	lsl	r8, r0, #10
 	movs	r1, #1
@@ -9908,9 +9949,9 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
-	bne	.L1158
-	b	.L1163
-.L1161:
+	bne	.L1162
+	b	.L1167
+.L1165:
 	adds	r6, r6, r3
 	movs	r1, #1
 	mov	r0, sl
@@ -9923,33 +9964,33 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
-	bne	.L1159
+	bne	.L1163
 	ldr	r3, [sp, #8]
 	adds	r3, r3, #1
-	bne	.L1159
+	bne	.L1163
 	ldr	r3, [sp, #68]
 	adds	r3, r3, #1
-	beq	.L1159
+	beq	.L1163
 	subs	r4, r6, #1
 	uxth	r4, r4
-	b	.L1163
-.L1159:
+	b	.L1167
+.L1163:
 	adds	r6, r6, #1
 	uxth	r7, r6
-.L1163:
+.L1167:
 	sxth	r6, r7
 	sxth	r3, r4
 	cmp	r6, r3
-	ble	.L1161
-.L1158:
+	ble	.L1165
+.L1162:
 	sxth	r0, r4
 	add	sp, sp, #108
 	pop	{r4, r5, r6, r7, r8, sl, pc}
-.L1166:
+.L1170:
 	.align	2
-.L1165:
-	.word	.LANCHOR69
-	.word	.LANCHOR68
+.L1169:
+	.word	.LANCHOR57
+	.word	.LANCHOR56
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
 	.section	.text.FtlLoadSysInfo,"ax",%progbits
 	.align	1
@@ -9962,23 +10003,23 @@ FtlLoadSysInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
 	movs	r4, #0
-	ldr	r6, .L1188
+	ldr	r6, .L1192
 	mov	r1, r4
-	ldr	r5, .L1188+4
-	ldr	r8, .L1188+60
+	ldr	r5, .L1192+4
+	ldr	r8, .L1192+60
 	ldr	r3, [r6, #0]
 	str	r4, [r5, #8]
 	str	r3, [r5, #12]
-	ldr	r3, .L1188+8
+	ldr	r3, .L1192+8
 	ldrh	r2, [r3, #0]
-	ldr	r3, .L1188+12
+	ldr	r3, .L1192+12
 	lsls	r2, r2, #1
 	ldr	r0, [r3, #0]
 	bl	memset
 	ldrh	r0, [r8, #0]
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1184
+	beq	.L1188
 	movs	r1, #1
 	mov	fp, r8
 	bl	FtlGetLastWrittenPage
@@ -9986,14 +10027,14 @@ FtlLoadSysInfo:
 	mov	r7, r0
 	add	r3, sl, #1
 	strh	r3, [r8, #2]	@ movhi
-	ldr	r8, .L1188+160
-	ldr	r3, .L1188+16
-	b	.L1169
-.L1172:
+	ldr	r8, .L1192+160
+	ldr	r3, .L1192+16
+	b	.L1173
+.L1176:
 	ldrh	r1, [fp, #0]
 	sxth	r2, sl
 	subs	r2, r2, r4
-	ldr	r0, .L1188+4
+	ldr	r0, .L1192+4
 	orr	r2, r2, r1, lsl #10
 	str	r2, [r5, #4]
 	ldr	r2, [r8, #0]
@@ -10005,46 +10046,46 @@ FtlLoadSysInfo:
 	ldr	r2, [r5, #0]
 	ldr	r3, [sp, #4]
 	adds	r2, r2, #1
-	beq	.L1170
+	beq	.L1174
 	ldr	r2, [r8, #0]
 	ldr	r2, [r2, #0]
 	cmp	r2, r3
-	bne	.L1170
+	bne	.L1174
 	ldr	r2, [r6, #0]
 	ldrh	r1, [r2, #0]
 	movw	r2, #61604
 	cmp	r1, r2
-	beq	.L1171
-.L1170:
+	beq	.L1175
+.L1174:
 	adds	r4, r4, #1
-.L1169:
+.L1173:
 	subs	r2, r7, r4
 	lsls	r2, r2, #16
-	bpl	.L1172
-	b	.L1187
-.L1171:
-	ldr	r3, .L1188+8
+	bpl	.L1176
+	b	.L1191
+.L1175:
+	ldr	r3, .L1192+8
 	ldrh	r2, [r3, #0]
-	ldr	r3, .L1188+20
+	ldr	r3, .L1192+20
 	adds	r2, r2, #24
 	ldrh	r3, [r3, #0]
 	cmp	r3, r2, lsl #1
-	bcs	.L1174
-	ldr	r1, .L1188+24
+	bcs	.L1178
+	ldr	r1, .L1192+24
 	mov	r2, #1512
-	ldr	r0, .L1188+28
+	ldr	r0, .L1192+28
 	bl	printf
-	ldr	r0, .L1188+32
-	ldr	r1, .L1188+36
+	ldr	r0, .L1192+32
+	ldr	r1, .L1192+36
 	bl	printf
-.L1174:
-	ldr	r4, .L1188+4
+.L1178:
+	ldr	r4, .L1192+4
 	movs	r2, #48
-	ldr	r5, .L1188+8
-	ldr	r0, .L1188+40
+	ldr	r5, .L1192+8
+	ldr	r0, .L1192+40
 	ldr	r1, [r4, #8]
 	bl	memcpy
-	ldr	r3, .L1188+12
+	ldr	r3, .L1192+12
 	ldrh	r2, [r5, #0]
 	ldr	r1, [r4, #8]
 	ldr	r0, [r3, #0]
@@ -10052,7 +10093,7 @@ FtlLoadSysInfo:
 	lsls	r2, r2, #1
 	bl	memcpy
 	ldrh	r2, [r5, #0]
-	ldr	r0, .L1188+44
+	ldr	r0, .L1192+44
 	add	r1, r2, #24
 	ldr	r3, [r4, #8]
 	lsrs	r2, r2, #3
@@ -10061,12 +10102,12 @@ FtlLoadSysInfo:
 	adds	r2, r2, #4
 	add	r1, r3, r1, lsl #2
 	bl	memcpy
-	ldr	r3, .L1188+48
+	ldr	r3, .L1192+48
 	ldrh	r3, [r3, #0]
-	cbz	r3, .L1175
+	cbz	r3, .L1179
 	ldrh	r3, [r5, #0]
-	ldr	r2, .L1188+52
-	ldr	r0, .L1188+56
+	ldr	r2, .L1192+52
+	ldr	r0, .L1192+56
 	lsrs	r1, r3, #3
 	add	r1, r1, r3, lsl #1
 	ldrh	r2, [r2, #0]
@@ -10077,55 +10118,55 @@ FtlLoadSysInfo:
 	lsls	r2, r2, #2
 	add	r1, r3, r1, lsl #2
 	bl	memcpy
-.L1175:
-	ldr	r3, .L1188+40
-	ldr	r2, .L1188+16
+.L1179:
+	ldr	r3, .L1192+40
+	ldr	r2, .L1192+16
 	ldr	r1, [r3, #0]
 	cmp	r1, r2
-	bne	.L1184
+	bne	.L1188
 	ldrh	r4, [r3, #8]
-	ldr	r2, .L1188+60
+	ldr	r2, .L1192+60
 	strh	r4, [r2, #6]	@ movhi
 	ldrb	r2, [r3, #10]	@ zero_extendqisi2
-	ldr	r3, .L1188+64
+	ldr	r3, .L1192+64
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bne	.L1184
-	ldr	r3, .L1188+68
-	ldr	r2, .L1188+72
+	bne	.L1188
+	ldr	r3, .L1192+68
+	ldr	r2, .L1192+72
 	str	r4, [r3, #0]
-	ldr	r3, .L1188+76
+	ldr	r3, .L1192+76
 	ldrh	r3, [r3, #0]
 	muls	r3, r4, r3
 	str	r3, [r2, #0]
-	ldr	r2, .L1188+80
+	ldr	r2, .L1192+80
 	ldrh	r2, [r2, #0]
 	muls	r3, r2, r3
-	ldr	r2, .L1188+84
+	ldr	r2, .L1192+84
 	str	r3, [r2, #0]
-	ldr	r3, .L1188+88
+	ldr	r3, .L1192+88
 	ldr	r5, [r3, #0]
-	ldr	r3, .L1188+92
+	ldr	r3, .L1192+92
 	ldrh	r0, [r3, #6]
-	ldr	r3, .L1188+96
+	ldr	r3, .L1192+96
 	subs	r0, r5, r0
 	subs	r0, r0, r4
 	ldrh	r1, [r3, #0]
 	bl	__aeabi_uidiv
-	ldr	r3, .L1188+100
+	ldr	r3, .L1192+100
 	cmp	r4, r5
 	strh	r0, [r3, #0]	@ movhi
-	bls	.L1176
-	ldr	r1, .L1188+24
+	bls	.L1180
+	ldr	r1, .L1192+24
 	movw	r2, #1539
-	ldr	r0, .L1188+28
+	ldr	r0, .L1192+28
 	bl	printf
-	ldr	r0, .L1188+32
-	ldr	r1, .L1188+36
+	ldr	r0, .L1192+32
+	ldr	r1, .L1192+36
 	bl	printf
-.L1176:
-	ldr	r3, .L1188+40
-	ldr	r2, .L1188+104
+.L1180:
+	ldr	r3, .L1192+40
+	ldr	r2, .L1192+104
 	ldrh	r1, [r3, #16]
 	ldrh	r0, [r3, #14]
 	ldrh	r5, [r3, #18]
@@ -10138,12 +10179,12 @@ FtlLoadSysInfo:
 	strh	r0, [r2, #0]	@ movhi
 	strb	r1, [r2, #8]
 	movs	r2, #0
-	ldr	r1, .L1188+108
+	ldr	r1, .L1192+108
 	strh	r2, [r1, #2]	@ movhi
 	strh	r4, [r1, #0]	@ movhi
 	strb	r2, [r1, #6]
 	strb	r2, [r1, #8]
-	ldr	r1, .L1188+112
+	ldr	r1, .L1192+112
 	strh	r5, [r1, #0]	@ movhi
 	ldrh	r5, [r3, #20]
 	lsrs	r6, r5, #6
@@ -10152,7 +10193,7 @@ FtlLoadSysInfo:
 	ldrb	r5, [r3, #12]	@ zero_extendqisi2
 	strh	r6, [r1, #2]	@ movhi
 	strb	r5, [r1, #8]
-	ldr	r1, .L1188+116
+	ldr	r1, .L1192+116
 	ldrh	r5, [r3, #22]
 	strh	r5, [r1, #0]	@ movhi
 	ldrh	r5, [r3, #24]
@@ -10162,109 +10203,109 @@ FtlLoadSysInfo:
 	ldrb	r5, [r3, #13]	@ zero_extendqisi2
 	strh	r6, [r1, #2]	@ movhi
 	strb	r5, [r1, #8]
-	ldr	r1, .L1188+120
+	ldr	r1, .L1192+120
 	ldr	r5, [r3, #32]
 	str	r2, [r1, #0]
-	ldr	r1, .L1188+124
+	ldr	r1, .L1192+124
 	str	r2, [r1, #0]
-	ldr	r1, .L1188+128
+	ldr	r1, .L1192+128
 	str	r2, [r1, #0]
-	ldr	r1, .L1188+132
+	ldr	r1, .L1192+132
 	str	r2, [r1, #0]
-	ldr	r1, .L1188+136
+	ldr	r1, .L1192+136
 	str	r5, [r1, #0]
-	ldr	r1, .L1188+140
+	ldr	r1, .L1192+140
 	str	r2, [r1, #0]
-	ldr	r1, .L1188+144
+	ldr	r1, .L1192+144
 	str	r2, [r1, #0]
-	ldr	r1, .L1188+148
+	ldr	r1, .L1192+148
 	str	r2, [r1, #0]
-	ldr	r2, .L1188+152
+	ldr	r2, .L1192+152
 	ldr	r1, [r3, #40]
 	ldr	r5, [r2, #0]
 	cmp	r1, r5
 	it	hi
 	strhi	r1, [r2, #0]
 	ldr	r2, [r3, #36]
-	ldr	r3, .L1188+156
+	ldr	r3, .L1192+156
 	ldr	r1, [r3, #0]
 	cmp	r2, r1
 	it	hi
 	strhi	r2, [r3, #0]
 	cmp	r0, r4
-	beq	.L1179
-	ldr	r0, .L1188+104
+	beq	.L1183
+	ldr	r0, .L1192+104
 	bl	make_superblock
-.L1179:
-	ldr	r0, .L1188+112
+.L1183:
+	ldr	r0, .L1192+112
 	movw	r4, #65535
 	ldrh	r3, [r0, #0]
 	cmp	r3, r4
-	beq	.L1180
+	beq	.L1184
 	bl	make_superblock
-.L1180:
-	ldr	r0, .L1188+116
+.L1184:
+	ldr	r0, .L1192+116
 	ldrh	r3, [r0, #0]
 	cmp	r3, r4
-	beq	.L1181
+	beq	.L1185
 	bl	make_superblock
-.L1181:
-	ldr	r0, .L1188+108
+.L1185:
+	ldr	r0, .L1192+108
 	movw	r3, #65535
 	ldrh	r2, [r0, #0]
 	cmp	r2, r3
-	beq	.L1185
+	beq	.L1189
 	bl	make_superblock
-	b	.L1185
-.L1184:
+	b	.L1189
+.L1188:
 	mov	r0, #-1
-	b	.L1168
-.L1185:
+	b	.L1172
+.L1189:
 	movs	r0, #0
-.L1168:
+.L1172:
 	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1187:
-	ldr	r1, .L1188+24
+.L1191:
+	ldr	r1, .L1192+24
 	movw	r2, #1510
-	ldr	r0, .L1188+28
+	ldr	r0, .L1192+28
 	bl	printf
-	ldr	r1, .L1188+36
-	ldr	r0, .L1188+32
+	ldr	r1, .L1192+36
+	ldr	r0, .L1192+32
 	bl	printf
-	b	.L1171
-.L1189:
+	b	.L1175
+.L1193:
 	.align	2
-.L1188:
+.L1192:
 	.word	.LANCHOR184
 	.word	.LANCHOR198
-	.word	.LANCHOR55
-	.word	.LANCHOR101
+	.word	.LANCHOR43
+	.word	.LANCHOR89
 	.word	1179929683
-	.word	.LANCHOR73
+	.word	.LANCHOR61
 	.word	.LANCHOR199
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.word	.LANCHOR143
-	.word	.LANCHOR119
-	.word	.LANCHOR85
-	.word	.LANCHOR82
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
+	.word	.LANCHOR131
+	.word	.LANCHOR107
+	.word	.LANCHOR73
+	.word	.LANCHOR70
 	.word	.LANCHOR191
 	.word	.LANCHOR196
-	.word	.LANCHOR60
+	.word	.LANCHOR48
 	.word	.LANCHOR200
-	.word	.LANCHOR88
-	.word	.LANCHOR68
-	.word	.LANCHOR71
-	.word	.LANCHOR84
-	.word	.LANCHOR57
-	.word	.LANCHOR90
-	.word	.LANCHOR53
+	.word	.LANCHOR76
+	.word	.LANCHOR56
+	.word	.LANCHOR59
+	.word	.LANCHOR72
+	.word	.LANCHOR45
+	.word	.LANCHOR78
+	.word	.LANCHOR41
 	.word	.LANCHOR201
-	.word	.LANCHOR109
+	.word	.LANCHOR97
 	.word	.LANCHOR202
-	.word	.LANCHOR110
-	.word	.LANCHOR111
+	.word	.LANCHOR98
+	.word	.LANCHOR99
 	.word	.LANCHOR158
 	.word	.LANCHOR159
 	.word	.LANCHOR163
@@ -10275,7 +10316,7 @@ FtlLoadSysInfo:
 	.word	.LANCHOR161
 	.word	.LANCHOR156
 	.word	.LANCHOR157
-	.word	.LANCHOR98
+	.word	.LANCHOR86
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
 	.section	.text.FtlLoadBbt,"ax",%progbits
 	.align	1
@@ -10288,30 +10329,30 @@ FtlLoadBbt:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
 	movs	r3, #0
-	ldr	r6, .L1209
+	ldr	r6, .L1213
 	movw	sl, #61649
 	str	r3, [r6, #8]
-	ldr	r3, .L1209+4
+	ldr	r3, .L1213+4
 	ldr	r4, [r3, #0]
 	str	r4, [r6, #12]
 	bl	FtlBbtMemInit
-	ldr	r3, .L1209+8
+	ldr	r3, .L1213+8
 	mov	r8, r3
 	ldrh	r5, [r3, #0]
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L1191
-.L1195:
+	b	.L1195
+.L1199:
 	movs	r1, #1
-	ldr	r0, .L1209
+	ldr	r0, .L1213
 	mov	r2, r1
 	lsls	r3, r5, #10
 	str	r3, [r6, #4]
 	bl	FlashReadPages
 	ldr	r3, [r6, #0]
-	ldr	r7, .L1209
+	ldr	r7, .L1213
 	adds	r3, r3, #1
-	bne	.L1192
+	bne	.L1196
 	ldr	r3, [r6, #4]
 	movs	r1, #1
 	mov	r0, r7
@@ -10319,38 +10360,38 @@ FtlLoadBbt:
 	adds	r3, r3, #1
 	str	r3, [r6, #4]
 	bl	FlashReadPages
-.L1192:
+.L1196:
 	ldr	r3, [r7, #0]
 	adds	r3, r3, #1
-	beq	.L1193
+	beq	.L1197
 	ldrh	r3, [r4, #0]
 	cmp	r3, sl
-	bne	.L1193
-	ldr	r3, .L1209+12
+	bne	.L1197
+	ldr	r3, .L1213+12
 	ldr	r2, [r4, #4]
 	strh	r5, [r3, #0]	@ movhi
 	str	r2, [r3, #8]
 	ldrh	r2, [r4, #8]
 	strh	r2, [r3, #4]	@ movhi
-	b	.L1194
-.L1193:
+	b	.L1198
+.L1197:
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L1191:
+.L1195:
 	ldrh	r3, [r8, #0]
 	subs	r3, r3, #47
 	cmp	r3, r5
-	ble	.L1195
-.L1194:
-	ldr	r5, .L1209+12
+	ble	.L1199
+.L1198:
+	ldr	r5, .L1213+12
 	movw	r3, #65535
 	ldrh	r2, [r5, #0]
 	cmp	r2, r3
-	beq	.L1206
+	beq	.L1210
 	ldrh	r2, [r5, #4]
 	cmp	r2, r3
-	beq	.L1197
-	ldr	r6, .L1209
+	beq	.L1201
+	ldr	r6, .L1213
 	movs	r1, #1
 	lsls	r2, r2, #10
 	mov	r0, r6
@@ -10359,26 +10400,26 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	r3, [r6, #0]
 	adds	r3, r3, #1
-	beq	.L1197
+	beq	.L1201
 	ldrh	r2, [r4, #0]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L1197
+	bne	.L1201
 	ldr	r3, [r4, #4]
 	ldr	r2, [r5, #8]
 	cmp	r3, r2
-	bls	.L1197
+	bls	.L1201
 	ldrh	r2, [r5, #4]
 	str	r3, [r5, #8]
 	ldrh	r3, [r4, #8]
 	strh	r2, [r5, #0]	@ movhi
 	strh	r3, [r5, #4]	@ movhi
-.L1197:
-	ldr	fp, .L1209+12
+.L1201:
+	ldr	fp, .L1213+12
 	movs	r1, #1
 	movs	r5, #0
-	ldr	r6, .L1209
-	ldr	r8, .L1209+48
+	ldr	r6, .L1213
+	ldr	r8, .L1213+48
 	ldrh	r0, [fp, #0]
 	bl	FtlGetLastWrittenPage
 	uxth	sl, r0
@@ -10387,11 +10428,11 @@ FtlLoadBbt:
 	strh	r3, [fp, #2]	@ movhi
 	sxth	sl, sl
 	movw	r3, #61649
-	b	.L1198
-.L1201:
+	b	.L1202
+.L1205:
 	ldrh	r1, [fp, #0]
 	rsb	r2, r5, sl
-	ldr	r0, .L1209
+	ldr	r0, .L1213
 	orr	r2, r2, r1, lsl #10
 	str	r2, [r6, #4]
 	ldr	r2, [r8, #0]
@@ -10403,45 +10444,45 @@ FtlLoadBbt:
 	ldr	r2, [r6, #0]
 	ldr	r3, [sp, #4]
 	adds	r2, r2, #1
-	beq	.L1199
+	beq	.L1203
 	ldrh	r2, [r4, #0]
 	cmp	r2, r3
-	beq	.L1200
-.L1199:
+	beq	.L1204
+.L1203:
 	adds	r5, r5, #1
-.L1198:
+.L1202:
 	subs	r2, r7, r5
 	lsls	r1, r2, #16
-	bpl	.L1201
-	b	.L1208
-.L1200:
-	ldr	r3, .L1209+12
+	bpl	.L1205
+	b	.L1212
+.L1204:
+	ldr	r3, .L1213+12
 	ldrh	r2, [r4, #10]
 	ldrh	r0, [r4, #12]
 	strh	r2, [r3, #6]	@ movhi
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1203
-	ldr	r3, .L1209+16
+	beq	.L1207
+	ldr	r3, .L1213+16
 	ldr	r2, [r3, #0]
 	cmp	r0, r2
-	beq	.L1203
-	ldr	r3, .L1209+20
+	beq	.L1207
+	ldr	r3, .L1213+20
 	ldrh	r3, [r3, #0]
 	lsrs	r3, r3, #2
 	cmp	r2, r3
-	bcs	.L1203
+	bcs	.L1207
 	cmp	r0, r3
-	bcs	.L1203
+	bcs	.L1207
 	bl	FtlSysBlkNumInit
-.L1203:
-	ldr	r5, .L1209+24
+.L1207:
+	ldr	r5, .L1213+24
 	movs	r4, #0
-	ldr	r8, .L1209+52
-	ldr	r7, .L1209+28
-	ldr	r6, .L1209
-	b	.L1204
-.L1205:
+	ldr	r8, .L1213+52
+	ldr	r7, .L1213+28
+	ldr	r6, .L1213
+	b	.L1208
+.L1209:
 	ldrh	r2, [r7, #0]
 	ldr	r1, [r6, #8]
 	ldr	r0, [r5, #4]!
@@ -10449,42 +10490,42 @@ FtlLoadBbt:
 	mla	r1, r4, r2, r1
 	bl	memcpy
 	adds	r4, r4, #1
-.L1204:
+.L1208:
 	ldrh	r3, [r8, #0]
 	cmp	r4, r3
-	bcc	.L1205
+	bcc	.L1209
 	movs	r0, #0
-	b	.L1196
-.L1206:
+	b	.L1200
+.L1210:
 	mov	r0, #-1
-.L1196:
+.L1200:
 	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1208:
-	ldr	r1, .L1209+32
+.L1212:
+	ldr	r1, .L1213+32
 	mov	r2, #336
-	ldr	r0, .L1209+36
+	ldr	r0, .L1213+36
 	bl	printf
-	ldr	r1, .L1209+40
-	ldr	r0, .L1209+44
+	ldr	r1, .L1213+40
+	ldr	r0, .L1213+44
 	bl	printf
-	b	.L1200
-.L1210:
+	b	.L1204
+.L1214:
 	.align	2
-.L1209:
+.L1213:
 	.word	.LANCHOR198
 	.word	.LANCHOR184
-	.word	.LANCHOR66
-	.word	.LANCHOR90
-	.word	.LANCHOR52
-	.word	.LANCHOR56
-	.word	.LANCHOR90+24
-	.word	.LANCHOR91
+	.word	.LANCHOR54
+	.word	.LANCHOR78
+	.word	.LANCHOR40
+	.word	.LANCHOR44
+	.word	.LANCHOR78+24
+	.word	.LANCHOR79
 	.word	.LANCHOR203
-	.word	.LC9
-	.word	.LC11
-	.word	.LC10
-	.word	.LANCHOR98
-	.word	.LANCHOR60
+	.word	.LC3
+	.word	.LC5
+	.word	.LC4
+	.word	.LANCHOR86
+	.word	.LANCHOR48
 	.size	FtlLoadBbt, .-FtlLoadBbt
 	.section	.text.FtlLoadFactoryBbt,"ax",%progbits
 	.align	1
@@ -10495,31 +10536,31 @@ FtlLoadBbt:
 FtlLoadFactoryBbt:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1218
+	ldr	r3, .L1222
 	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
 	movs	r5, #0
-	ldr	r7, .L1218+4
+	ldr	r7, .L1222+4
 	ldr	r3, [r3, #0]
-	ldr	r6, .L1218+8
-	ldr	r8, .L1218+20
+	ldr	r6, .L1222+8
+	ldr	r8, .L1222+20
 	str	r3, [r7, #8]
-	ldr	r3, .L1218+12
+	ldr	r3, .L1222+12
 	ldr	sl, [r3, #0]
-	ldr	r3, .L1218+16
+	ldr	r3, .L1222+16
 	str	sl, [r7, #12]
-	b	.L1212
-.L1217:
+	b	.L1216
+.L1221:
 	ldrh	r4, [r8, #0]
 	movw	r2, #65535
 	movw	fp, #61664
 	strh	r2, [r6], #2	@ movhi
 	subs	r4, r4, #1
 	uxth	r4, r4
-	b	.L1213
-.L1216:
+	b	.L1217
+.L1220:
 	mla	r2, r2, r5, r4
 	movs	r1, #1
-	ldr	r0, .L1218+4
+	ldr	r0, .L1222+4
 	lsls	r2, r2, #10
 	str	r2, [r7, #4]
 	mov	r2, r1
@@ -10528,37 +10569,37 @@ FtlLoadFactoryBbt:
 	ldr	r2, [r7, #0]
 	ldr	r3, [sp, #4]
 	adds	r2, r2, #1
-	beq	.L1214
+	beq	.L1218
 	ldrh	r2, [sl, #0]
 	cmp	r2, fp
-	bne	.L1214
+	bne	.L1218
 	strh	r4, [r6, #-2]	@ movhi
-	b	.L1215
-.L1214:
+	b	.L1219
+.L1218:
 	subs	r4, r4, #1
 	uxth	r4, r4
-.L1213:
+.L1217:
 	ldrh	r2, [r8, #0]
 	sub	r1, r2, #15
 	cmp	r1, r4
-	ble	.L1216
-.L1215:
+	ble	.L1220
+.L1219:
 	adds	r5, r5, #1
-.L1212:
+.L1216:
 	ldrh	r2, [r3, #0]
 	cmp	r5, r2
-	bcc	.L1217
+	bcc	.L1221
 	movs	r0, #0
 	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1219:
+.L1223:
 	.align	2
-.L1218:
-	.word	.LANCHOR98
+.L1222:
+	.word	.LANCHOR86
 	.word	.LANCHOR198
-	.word	.LANCHOR90+12
+	.word	.LANCHOR78+12
 	.word	.LANCHOR184
-	.word	.LANCHOR60
-	.word	.LANCHOR66
+	.word	.LANCHOR48
+	.word	.LANCHOR54
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
 	.section	.text.FlashProgSlc2KPages,"ax",%progbits
 	.align	1
@@ -10575,13 +10616,13 @@ FlashProgSlc2KPages:
 	mov	fp, r1
 	str	r3, [sp, #12]
 	mov	r5, r0
-	ldr	r3, .L1238
+	ldr	r3, .L1242
 	movs	r6, #0
 	str	r2, [sp, #8]
-	ldr	r7, .L1238+4
+	ldr	r7, .L1242+4
 	ldrb	r8, [r3, #9]	@ zero_extendqisi2
-	b	.L1221
-.L1228:
+	b	.L1225
+.L1232:
 	rsb	r3, r6, fp
 	ldr	r1, [sp, #8]
 	add	r2, sp, #56
@@ -10590,16 +10631,16 @@ FlashProgSlc2KPages:
 	str	r3, [sp, #0]
 	add	r3, sp, #60
 	bl	LogAddr2PhyAddr
-	ldr	r1, .L1238+8
+	ldr	r1, .L1242+8
 	ldr	r3, [sp, #60]
 	ldrb	r2, [r1, #0]	@ zero_extendqisi2
 	cmp	r3, r2
-	bcc	.L1222
+	bcc	.L1226
 	mov	r3, #-1
 	str	r3, [r5, #0]
-	b	.L1223
-.L1222:
-	ldr	r2, .L1238+12
+	b	.L1227
+.L1226:
+	ldr	r2, .L1242+12
 	ldrb	r4, [r2, r3]	@ zero_extendqisi2
 	mov	r0, r4
 	bl	NandcWaitFlashReady
@@ -10633,13 +10674,13 @@ FlashProgSlc2KPages:
 	mov	r0, r4
 	bl	FlashProgFirstCmd
 	ldr	r3, [r5, #8]
-	cbz	r3, .L1225
+	cbz	r3, .L1229
 	add	r3, r3, #2048
-.L1225:
+.L1229:
 	ldr	r2, [r5, #12]
-	cbz	r2, .L1226
+	cbz	r2, .L1230
 	adds	r2, r2, #8
-.L1226:
+.L1230:
 	movs	r1, #1
 	str	r2, [sp, #0]
 	mov	r0, r4
@@ -10661,31 +10702,31 @@ FlashProgSlc2KPages:
 	movmi	r3, #-1
 	strmi	r3, [r5, #0]
 	bl	NandcFlashDeCs
-.L1223:
+.L1227:
 	adds	r6, r6, #1
 	adds	r5, r5, #36
-.L1221:
+.L1225:
 	cmp	r6, fp
-	bne	.L1228
+	bne	.L1232
 	ldr	r3, [sp, #12]
 	cmp	r3, #0
-	beq	.L1229
+	beq	.L1233
 	movs	r5, #0
 	add	r4, sl, #8
-	ldr	r6, .L1238+16
+	ldr	r6, .L1242+16
 	mov	sl, r5
-	ldr	r8, .L1238+36
-	b	.L1230
-.L1235:
+	ldr	r8, .L1242+36
+	b	.L1234
+.L1239:
 	ldr	r3, [r4, #-8]
 	sub	r7, r4, #8
 	adds	r3, r3, #1
-	bne	.L1231
+	bne	.L1235
 	ldr	r1, [r4, #-4]
-	ldr	r0, .L1238+20
+	ldr	r0, .L1242+20
 	bl	printf
-	b	.L1232
-.L1231:
+	b	.L1236
+.L1235:
 	rsb	r3, sl, fp
 	mov	r0, r7
 	ldr	r1, [sp, #8]
@@ -10714,50 +10755,50 @@ FlashProgSlc2KPages:
 	bl	FlashReadPages
 	ldr	r5, [sp, #20]
 	adds	r0, r5, #1
-	bne	.L1233
-	ldr	r0, .L1238+24
+	bne	.L1237
+	ldr	r0, .L1242+24
 	ldr	r1, [r4, #-4]
 	bl	printf
 	str	r5, [r4, #-8]
-.L1233:
+.L1237:
 	ldr	r3, [r4, #4]
-	cbz	r3, .L1234
+	cbz	r3, .L1238
 	ldr	r2, [r3, #0]
 	ldr	r3, [r8, #0]
 	ldr	r3, [r3, #0]
 	cmp	r2, r3
-	beq	.L1234
-	ldr	r0, .L1238+28
+	beq	.L1238
+	ldr	r0, .L1242+28
 	ldr	r1, [r4, #-4]
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4, #-8]
-.L1234:
+.L1238:
 	ldr	r3, [r4, #0]
-	cbz	r3, .L1232
+	cbz	r3, .L1236
 	ldr	r2, [r3, #0]
 	ldr	r3, [r6, #0]
 	ldr	r3, [r3, #0]
 	cmp	r2, r3
-	beq	.L1232
-	ldr	r0, .L1238+32
+	beq	.L1236
+	ldr	r0, .L1242+32
 	ldr	r1, [r4, #-4]
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4, #-8]
-.L1232:
+.L1236:
 	add	sl, sl, #1
 	adds	r4, r4, #36
-.L1230:
+.L1234:
 	cmp	sl, fp
-	bne	.L1235
-.L1229:
+	bne	.L1239
+.L1233:
 	movs	r0, #0
 	add	sp, sp, #64
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1239:
+.L1243:
 	.align	2
-.L1238:
+.L1242:
 	.word	.LANCHOR18
 	.word	.LANCHOR2
 	.word	.LANCHOR16
@@ -10780,7 +10821,7 @@ FlashProgPages:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	sub	sp, sp, #72
-	ldr	r4, .L1267
+	ldr	r4, .L1271
 	mov	r8, r0
 	str	r1, [sp, #8]
 	mov	fp, r2
@@ -10788,16 +10829,16 @@ FlashProgPages:
 	ldr	r4, [r4, #0]
 	ldrb	r4, [r4, #19]	@ zero_extendqisi2
 	str	r4, [sp, #20]
-	ldr	r4, .L1267+4
+	ldr	r4, .L1271+4
 	ldrb	r4, [r4, #9]	@ zero_extendqisi2
 	str	r4, [sp, #12]
-	ldr	r4, .L1267+8
+	ldr	r4, .L1271+8
 	ldrb	r5, [r4, #0]	@ zero_extendqisi2
 	cmp	r5, #0
-	beq	.L1264
+	beq	.L1268
 	bl	FlashProgSlc2KPages
-	b	.L1242
-.L1254:
+	b	.L1246
+.L1258:
 	ldr	r1, [sp, #8]
 	movs	r4, #36
 	muls	r4, r5, r4
@@ -10810,56 +10851,56 @@ FlashProgPages:
 	str	r3, [sp, #0]
 	add	r3, sp, #68
 	bl	LogAddr2PhyAddr
-	ldr	r3, .L1267+12
+	ldr	r3, .L1271+12
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	mov	r7, r0
 	ldr	r0, [sp, #68]
 	cmp	r0, r3
-	bcc	.L1243
+	bcc	.L1247
 	mov	r3, #-1
 	str	r3, [r8, r4]
-	b	.L1244
-.L1243:
-	ldr	r3, .L1267+16
+	b	.L1248
+.L1247:
+	ldr	r3, .L1271+16
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	cmp	r3, #0
 	it	eq
 	moveq	r7, #0
 	add	r3, sl, r0, lsl #4
 	ldr	r3, [r3, #8]
-	cbz	r3, .L1246
+	cbz	r3, .L1250
 	uxtb	r0, r0
 	bl	FlashWaitCmdDone
-.L1246:
+.L1250:
 	ldr	r2, [sp, #68]
-	ldr	r1, .L1267+20
+	ldr	r1, .L1271+20
 	add	r3, r1, r2, lsl #4
 	movs	r1, #0
 	str	r1, [r3, #12]
 	ldr	r1, [sp, #64]
 	str	r6, [r3, #8]
 	str	r1, [r3, #4]
-	cbz	r7, .L1247
+	cbz	r7, .L1251
 	adds	r1, r5, #1
 	movs	r0, #36
 	mla	r1, r0, r1, r8
 	str	r1, [r3, #12]
-.L1247:
-	ldr	r3, .L1267+24
+.L1251:
+	ldr	r3, .L1271+24
 	ldrb	r4, [r3, r2]	@ zero_extendqisi2
 	lsls	r2, r2, #4
-	ldr	r3, .L1267+12
+	ldr	r3, .L1271+12
 	mov	r0, r4
 	strb	r4, [sl, r2]
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1248
+	bne	.L1252
 	bl	NandcWaitFlashReady
-	b	.L1249
-.L1248:
+	b	.L1253
+.L1252:
 	bl	NandcFlashCs
 	ldr	r2, [sp, #68]
-	ldr	r3, .L1267+28
+	ldr	r3, .L1271+28
 	mov	r0, r4
 	ldr	r1, [sp, #64]
 	ldr	r2, [r3, r2, lsl #2]
@@ -10869,34 +10910,34 @@ FlashProgPages:
 	bl	FlashWaitReadyEN
 	mov	r0, r4
 	bl	NandcFlashDeCs
-.L1249:
+.L1253:
 	ldr	r2, [sp, #20]
 	subs	r3, r2, #1
 	cmp	r3, #6
-	bhi	.L1250
-	ldr	r3, .L1267+32
+	bhi	.L1254
+	ldr	r3, .L1271+32
 	ldrb	r3, [r3, r4]	@ zero_extendqisi2
-	cbz	r3, .L1250
-	ldr	r3, .L1267+36
+	cbz	r3, .L1254
+	ldr	r3, .L1271+36
 	mov	r0, r4
 	adds	r2, r3, #4
 	ldrb	r1, [r3, #1]	@ zero_extendqisi2
 	movs	r3, #0
 	bl	HynixSetRRPara
-.L1250:
+.L1254:
 	mov	r0, r4
 	bl	NandcFlashCs
 	cmp	fp, #1
 	mov	r0, r4
-	bne	.L1251
-	ldr	r3, .L1267+40
+	bne	.L1255
+	ldr	r3, .L1271+40
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1251
+	cbz	r3, .L1255
 	bl	flash_enter_slc_mode
-	b	.L1252
-.L1251:
+	b	.L1256
+.L1255:
 	bl	flash_exit_slc_mode
-.L1252:
+.L1256:
 	mov	r0, r4
 	ldr	r1, [sp, #64]
 	bl	FlashProgFirstCmd
@@ -10907,11 +10948,11 @@ FlashProgPages:
 	str	r3, [sp, #0]
 	ldr	r3, [r6, #8]
 	bl	NandcXferData
-	cbz	r7, .L1253
+	cbz	r7, .L1257
 	mov	r0, r4
 	ldr	r1, [sp, #64]
 	bl	FlashProgDpFirstCmd
-	ldr	r3, .L1267+28
+	ldr	r3, .L1271+28
 	ldr	r2, [sp, #68]
 	mov	r0, r4
 	ldr	r1, [sp, #64]
@@ -10920,7 +10961,7 @@ FlashProgPages:
 	it	ne
 	movne	r2, #1
 	bl	FlashWaitReadyEN
-	ldr	r3, .L1267+44
+	ldr	r3, .L1271+44
 	mov	r0, r4
 	ldr	r1, [r3, #0]
 	ldr	r3, [sp, #64]
@@ -10936,62 +10977,62 @@ FlashProgPages:
 	ldr	r2, [sp, #12]
 	ldr	r3, [r3, #8]
 	bl	NandcXferData
-.L1253:
+.L1257:
 	mov	r0, r4
 	ldr	r1, [sp, #64]
 	bl	FlashProgSecondCmd
 	mov	r0, r4
 	bl	NandcFlashDeCs
 	adds	r5, r5, r7
-.L1244:
+.L1248:
 	adds	r5, r5, #1
-	b	.L1241
-.L1264:
-	ldr	sl, .L1267+20
-.L1241:
+	b	.L1245
+.L1268:
+	ldr	sl, .L1271+20
+.L1245:
 	ldr	r1, [sp, #8]
 	cmp	r5, r1
-	bcc	.L1254
+	bcc	.L1258
 	movs	r4, #0
-	ldr	r7, .L1267+12
-	ldr	r6, .L1267+40
-	ldr	r5, .L1267+20
-	b	.L1255
-.L1257:
+	ldr	r7, .L1271+12
+	ldr	r6, .L1271+40
+	ldr	r5, .L1271+20
+	b	.L1259
+.L1261:
 	uxtb	r0, r4
 	bl	FlashWaitCmdDone
 	cmp	fp, #1
-	bne	.L1256
+	bne	.L1260
 	ldrb	r3, [r6, #0]	@ zero_extendqisi2
-	cbz	r3, .L1256
+	cbz	r3, .L1260
 	lsls	r3, r4, #4
 	ldrb	r0, [r5, r3]	@ zero_extendqisi2
 	bl	flash_exit_slc_mode
-.L1256:
+.L1260:
 	adds	r4, r4, #1
-.L1255:
+.L1259:
 	ldrb	r3, [r7, #0]	@ zero_extendqisi2
 	cmp	r4, r3
-	bcc	.L1257
+	bcc	.L1261
 	ldr	r2, [sp, #16]
 	cmp	r2, #0
-	beq	.L1266
+	beq	.L1270
 	movs	r5, #0
 	add	r4, r8, #8
-	ldr	r6, .L1267+48
+	ldr	r6, .L1271+48
 	mov	sl, r5
-	ldr	r8, .L1267+68
-	b	.L1258
-.L1263:
+	ldr	r8, .L1271+68
+	b	.L1262
+.L1267:
 	ldr	r3, [r4, #-8]
 	sub	r7, r4, #8
 	adds	r3, r3, #1
-	bne	.L1259
+	bne	.L1263
 	ldr	r1, [r4, #-4]
-	ldr	r0, .L1267+52
+	ldr	r0, .L1271+52
 	bl	printf
-	b	.L1260
-.L1259:
+	b	.L1264
+.L1263:
 	ldr	r1, [sp, #8]
 	mov	r0, r7
 	add	r2, sp, #64
@@ -11021,49 +11062,49 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	r5, [sp, #28]
 	adds	r2, r5, #1
-	bne	.L1261
-	ldr	r0, .L1267+56
+	bne	.L1265
+	ldr	r0, .L1271+56
 	ldr	r1, [r4, #-4]
 	bl	printf
 	str	r5, [r4, #-8]
-.L1261:
+.L1265:
 	ldr	r3, [r4, #4]
-	cbz	r3, .L1262
+	cbz	r3, .L1266
 	ldr	r2, [r3, #0]
 	ldr	r3, [r8, #0]
 	ldr	r3, [r3, #0]
 	cmp	r2, r3
-	beq	.L1262
-	ldr	r0, .L1267+60
+	beq	.L1266
+	ldr	r0, .L1271+60
 	ldr	r1, [r4, #-4]
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4, #-8]
-.L1262:
+.L1266:
 	ldr	r3, [r4, #0]
-	cbz	r3, .L1260
+	cbz	r3, .L1264
 	ldr	r2, [r3, #0]
 	ldr	r3, [r6, #0]
 	ldr	r3, [r3, #0]
 	cmp	r2, r3
-	beq	.L1260
-	ldr	r0, .L1267+64
+	beq	.L1264
+	ldr	r0, .L1271+64
 	ldr	r1, [r4, #-4]
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4, #-8]
-.L1260:
+.L1264:
 	add	sl, sl, #1
 	adds	r4, r4, #36
-.L1258:
+.L1262:
 	ldr	r2, [sp, #8]
 	cmp	sl, r2
-	bne	.L1263
+	bne	.L1267
 	movs	r0, #0
-	b	.L1242
-.L1268:
+	b	.L1246
+.L1272:
 	.align	2
-.L1267:
+.L1271:
 	.word	.LANCHOR23
 	.word	.LANCHOR18
 	.word	.LANCHOR0
@@ -11082,9 +11123,9 @@ FlashProgPages:
 	.word	.LC23
 	.word	.LC24
 	.word	.LANCHOR205
-.L1266:
+.L1270:
 	ldr	r0, [sp, #16]
-.L1242:
+.L1246:
 	add	sp, sp, #72
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
 	.size	FlashProgPages, .-FlashProgPages
@@ -11097,20 +11138,20 @@ FlashProgPages:
 FtlVpcTblFlush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1281
+	ldr	r3, .L1285
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	ldr	r3, [r3, #0]
 	cmp	r3, #0
-	bne	.L1270
-	ldr	r2, .L1281+4
-	ldr	r6, .L1281+8
-	ldr	r4, .L1281+12
+	bne	.L1274
+	ldr	r2, .L1285+4
+	ldr	r6, .L1285+8
+	ldr	r4, .L1285+12
 	ldr	r0, [r2, #0]
-	ldr	r2, .L1281+16
-	ldr	r7, .L1281+20
+	ldr	r2, .L1285+16
+	ldr	r7, .L1285+20
 	str	r0, [r6, #8]
 	ldr	r5, [r2, #0]
-	ldr	r2, .L1281+24
+	ldr	r2, .L1285+24
 	str	r5, [r6, #12]
 	ldrh	r1, [r2, #0]
 	str	r3, [r5, #12]
@@ -11119,15 +11160,15 @@ FtlVpcTblFlush:
 	strh	r1, [r5, #0]	@ movhi
 	ldr	r1, [r2, #8]
 	str	r3, [r5, #8]
-	ldr	r3, .L1281+28
+	ldr	r3, .L1285+28
 	str	r1, [r5, #4]
 	stmia	r4, {r3, r7}
 	ldrh	r3, [r2, #6]
 	strh	r3, [r4, #8]	@ movhi
-	ldr	r3, .L1281+32
+	ldr	r3, .L1285+32
 	ldrh	r3, [r3, #0]
 	strb	r3, [r4, #10]
-	ldr	r3, .L1281+36
+	ldr	r3, .L1285+36
 	ldrh	r2, [r3, #0]
 	ldrh	r1, [r3, #2]
 	strh	r2, [r4, #14]	@ movhi
@@ -11136,7 +11177,7 @@ FtlVpcTblFlush:
 	orr	r2, r2, r1, lsl #6
 	strh	r2, [r4, #16]	@ movhi
 	strb	r3, [r4, #11]
-	ldr	r3, .L1281+40
+	ldr	r3, .L1285+40
 	ldrh	r2, [r3, #0]
 	ldrh	r1, [r3, #2]
 	strh	r2, [r4, #18]	@ movhi
@@ -11145,7 +11186,7 @@ FtlVpcTblFlush:
 	orr	r2, r2, r1, lsl #6
 	strh	r2, [r4, #20]	@ movhi
 	strb	r3, [r4, #12]
-	ldr	r3, .L1281+44
+	ldr	r3, .L1285+44
 	ldrh	r2, [r3, #0]
 	ldrh	r1, [r3, #2]
 	strh	r2, [r4, #22]	@ movhi
@@ -11155,24 +11196,24 @@ FtlVpcTblFlush:
 	ldrb	r3, [r3, #8]	@ zero_extendqisi2
 	movs	r1, #255
 	strb	r3, [r4, #13]
-	ldr	r3, .L1281+48
+	ldr	r3, .L1285+48
 	ldr	r3, [r3, #0]
 	str	r3, [r4, #32]
-	ldr	r3, .L1281+52
+	ldr	r3, .L1285+52
 	ldr	r3, [r3, #0]
 	str	r3, [r4, #40]
-	ldr	r3, .L1281+56
+	ldr	r3, .L1285+56
 	ldr	r3, [r3, #0]
 	str	r3, [r4, #36]
-	ldr	r3, .L1281+60
+	ldr	r3, .L1285+60
 	ldrh	r2, [r3, #0]
 	bl	memset
 	mov	r1, r4
-	ldr	r4, .L1281+64
+	ldr	r4, .L1285+64
 	movs	r2, #48
 	ldr	r0, [r6, #8]
 	bl	memcpy
-	ldr	r3, .L1281+68
+	ldr	r3, .L1285+68
 	ldrh	r2, [r4, #0]
 	ldr	r0, [r6, #8]
 	ldr	r1, [r3, #0]
@@ -11186,39 +11227,39 @@ FtlVpcTblFlush:
 	lsrs	r0, r0, #1
 	adds	r2, r2, #4
 	add	r0, r3, r0, lsl #2
-	ldr	r3, .L1281+72
+	ldr	r3, .L1285+72
 	ldr	r1, [r3, #0]
 	bl	memcpy
-	ldr	r3, .L1281+76
+	ldr	r3, .L1285+76
 	ldrh	r3, [r3, #0]
-	cbz	r3, .L1271
+	cbz	r3, .L1275
 	ldrh	r3, [r4, #0]
 	ldr	r1, [r6, #8]
 	lsrs	r0, r3, #3
 	add	r0, r0, r3, lsl #1
-	ldr	r3, .L1281+80
+	ldr	r3, .L1285+80
 	adds	r0, r0, #52
 	ubfx	r0, r0, #2, #14
 	ldrh	r2, [r3, #0]
-	ldr	r3, .L1281+84
+	ldr	r3, .L1285+84
 	add	r0, r1, r0, lsl #2
 	lsls	r2, r2, #2
 	ldr	r1, [r3, #0]
 	bl	memcpy
-.L1271:
+.L1275:
 	movs	r0, #0
-	ldr	r6, .L1281+8
+	ldr	r6, .L1285+8
 	bl	FtlUpdateVaildLpn
-	ldr	sl, .L1281+4
-	ldr	fp, .L1281+16
+	ldr	sl, .L1285+4
+	ldr	fp, .L1285+16
 	movs	r7, #0
-	ldr	r4, .L1281+24
+	ldr	r4, .L1285+24
 	movw	r8, #65535
-.L1280:
+.L1284:
 	ldr	r3, [sl, #0]
 	movs	r1, #1
 	ldrh	r2, [r4, #0]
-	ldr	r0, .L1281+8
+	ldr	r0, .L1285+8
 	str	r3, [r6, #8]
 	ldr	r3, [fp, #0]
 	str	r3, [r6, #12]
@@ -11228,19 +11269,19 @@ FtlVpcTblFlush:
 	str	r3, [r6, #4]
 	mov	r3, r1
 	bl	FlashProgPages
-	ldr	r3, .L1281+88
+	ldr	r3, .L1285+88
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3, #0]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1273
+	blt	.L1277
 	ldrh	r3, [r4, #0]
 	ldrh	r8, [r4, #4]
 	strh	r3, [r4, #4]	@ movhi
 	movs	r3, #0
 	strh	r3, [r4, #2]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r2, .L1281+52
+	ldr	r2, .L1285+52
 	ldr	r3, [r2, #0]
 	adds	r1, r3, #1
 	str	r1, [r2, #0]
@@ -11253,92 +11294,92 @@ FtlVpcTblFlush:
 	str	r3, [r5, #4]
 	mov	r3, r1
 	strh	r0, [r5, #2]	@ movhi
-	ldr	r0, .L1281+8
+	ldr	r0, .L1285+8
 	bl	FlashProgPages
-.L1273:
+.L1277:
 	ldrh	r3, [r4, #2]
 	ldr	r2, [r6, #0]
 	adds	r3, r3, #1
 	adds	r1, r2, #1
 	uxth	r3, r3
 	strh	r3, [r4, #2]	@ movhi
-	bne	.L1274
+	bne	.L1278
 	cmp	r3, #1
-	bne	.L1275
-	ldr	r1, .L1281+92
+	bne	.L1279
+	ldr	r1, .L1285+92
 	movw	r2, #1180
-	ldr	r0, .L1281+96
+	ldr	r0, .L1285+96
 	bl	printf
-	ldr	r0, .L1281+100
-	ldr	r1, .L1281+104
+	ldr	r0, .L1285+100
+	ldr	r1, .L1285+104
 	bl	printf
-.L1275:
-	ldr	r2, .L1281+24
+.L1279:
+	ldr	r2, .L1285+24
 	ldrh	r3, [r2, #2]
 	cmp	r3, #1
-	bne	.L1276
-	ldr	r3, .L1281+88
+	bne	.L1280
+	ldr	r3, .L1285+88
 	ldrh	r3, [r3, #0]
 	subs	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
-.L1276:
+.L1280:
 	adds	r7, r7, #1
 	uxth	r7, r7
 	cmp	r7, #3
-	bls	.L1280
-	ldr	r3, .L1281+8
+	bls	.L1284
+	ldr	r3, .L1285+8
 	mov	r2, r7
-	ldr	r0, .L1281+108
+	ldr	r0, .L1285+108
 	ldr	r1, [r3, #4]
 	bl	printf
-	ldr	r3, .L1281
+	ldr	r3, .L1285
 	movs	r2, #1
 	str	r2, [r3, #0]
-	b	.L1270
-.L1274:
+	b	.L1274
+.L1278:
 	cmp	r3, #1
-	beq	.L1280
+	beq	.L1284
 	cmp	r2, #256
-	beq	.L1280
+	beq	.L1284
 	movw	r3, #65535
 	cmp	r8, r3
-	beq	.L1270
+	beq	.L1274
 	mov	r0, r8
 	movs	r1, #1
 	bl	FtlFreeSysBlkQueueIn
-.L1270:
+.L1274:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1282:
+.L1286:
 	.align	2
-.L1281:
-	.word	.LANCHOR94
-	.word	.LANCHOR98
+.L1285:
+	.word	.LANCHOR82
+	.word	.LANCHOR86
 	.word	.LANCHOR198
-	.word	.LANCHOR143
+	.word	.LANCHOR131
 	.word	.LANCHOR184
 	.word	1342177351
 	.word	.LANCHOR196
 	.word	1179929683
-	.word	.LANCHOR60
-	.word	.LANCHOR109
-	.word	.LANCHOR110
-	.word	.LANCHOR111
+	.word	.LANCHOR48
+	.word	.LANCHOR97
+	.word	.LANCHOR98
+	.word	.LANCHOR99
 	.word	.LANCHOR164
 	.word	.LANCHOR156
 	.word	.LANCHOR157
+	.word	.LANCHOR61
+	.word	.LANCHOR43
+	.word	.LANCHOR89
+	.word	.LANCHOR107
 	.word	.LANCHOR73
-	.word	.LANCHOR55
-	.word	.LANCHOR101
-	.word	.LANCHOR119
-	.word	.LANCHOR85
-	.word	.LANCHOR82
-	.word	.LANCHOR126
-	.word	.LANCHOR69
+	.word	.LANCHOR70
+	.word	.LANCHOR114
+	.word	.LANCHOR57
 	.word	.LANCHOR206
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
 	.word	.LC25
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
 	.section	.text.FtlBbmTblFlush,"ax",%progbits
@@ -11350,27 +11391,27 @@ FtlVpcTblFlush:
 FtlBbmTblFlush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1295
+	ldr	r3, .L1299
 	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
 	ldr	r4, [r3, #0]
 	cmp	r4, #0
-	bne	.L1284
-	ldr	r3, .L1295+4
+	bne	.L1288
+	ldr	r3, .L1299+4
 	mov	r1, r4
-	ldr	r7, .L1295+8
-	ldr	r5, .L1295+12
+	ldr	r7, .L1299+8
+	ldr	r5, .L1299+12
 	ldr	r0, [r3, #0]
-	ldr	r3, .L1295+16
-	ldr	r8, .L1295+52
+	ldr	r3, .L1299+16
+	ldr	r8, .L1299+52
 	str	r0, [r7, #8]
 	ldr	r3, [r3, #0]
-	ldr	sl, .L1295+56
+	ldr	sl, .L1299+56
 	str	r3, [r7, #12]
-	ldr	r3, .L1295+20
+	ldr	r3, .L1299+20
 	ldrh	r2, [r3, #0]
 	bl	memset
-	b	.L1285
-.L1286:
+	b	.L1289
+.L1290:
 	ldrh	r2, [sl, #0]
 	ldr	r3, [r7, #8]
 	ldr	r1, [r5, #4]!
@@ -11379,11 +11420,11 @@ FtlBbmTblFlush:
 	adds	r4, r4, #1
 	add	r0, r3, r0, lsl #2
 	bl	memcpy
-.L1285:
+.L1289:
 	ldrh	r3, [r8, #0]
-	ldr	r6, .L1295+8
+	ldr	r6, .L1299+8
 	cmp	r4, r3
-	blt	.L1286
+	blt	.L1290
 	ldr	r5, [r6, #12]
 	movs	r2, #16
 	movs	r1, #255
@@ -11393,9 +11434,9 @@ FtlBbmTblFlush:
 	bl	memset
 	movw	r3, #61649
 	strh	r3, [r5, #0]	@ movhi
-	ldr	r3, .L1295+24
-	ldr	sl, .L1295+4
-	ldr	fp, .L1295+16
+	ldr	r3, .L1299+24
+	ldr	sl, .L1299+4
+	ldr	fp, .L1299+16
 	ldr	r2, [r3, #8]
 	str	r2, [r5, #4]
 	ldrh	r2, [r3, #0]
@@ -11404,16 +11445,16 @@ FtlBbmTblFlush:
 	ldrh	r3, [r3, #6]
 	strh	r2, [r5, #8]	@ movhi
 	strh	r3, [r5, #10]	@ movhi
-	ldr	r3, .L1295+28
+	ldr	r3, .L1299+28
 	ldr	r3, [r3, #0]
 	strh	r3, [r5, #12]	@ movhi
-	b	.L1294
-.L1291:
+	b	.L1298
+.L1295:
 	mov	r8, #1
-.L1294:
+.L1298:
 	ldr	r3, [sl, #0]
 	movs	r1, #0
-	ldr	r4, .L1295+24
+	ldr	r4, .L1299+24
 	ldrh	r0, [r5, #10]
 	str	r3, [r6, #8]
 	str	r1, [r6, #0]
@@ -11425,19 +11466,19 @@ FtlBbmTblFlush:
 	str	r3, [r6, #4]
 	ldrh	r3, [r4, #4]
 	str	r0, [sp, #0]
-	ldr	r0, .L1295+32
+	ldr	r0, .L1299+32
 	bl	printf
 	movs	r1, #1
 	mov	r2, r1
 	mov	r3, r1
-	ldr	r0, .L1295+8
+	ldr	r0, .L1299+8
 	bl	FlashProgPages
-	ldr	r3, .L1295+36
+	ldr	r3, .L1299+36
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3, #0]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1288
+	blt	.L1292
 	ldrh	r2, [r4, #0]
 	movs	r1, #0
 	ldr	r3, [r4, #8]
@@ -11449,7 +11490,7 @@ FtlBbmTblFlush:
 	strh	r2, [r5, #8]	@ movhi
 	ldrh	r3, [r4, #4]
 	strh	r2, [r4, #4]	@ movhi
-	ldr	r2, .L1295+40
+	ldr	r2, .L1299+40
 	strh	r3, [r4, #0]	@ movhi
 	lsls	r3, r3, #10
 	str	r3, [r6, #4]
@@ -11458,58 +11499,58 @@ FtlBbmTblFlush:
 	str	r3, [r0, #4]
 	bl	FlashEraseBlocks
 	movs	r1, #1
-	ldr	r0, .L1295+8
+	ldr	r0, .L1299+8
 	mov	r2, r1
 	mov	r3, r1
 	bl	FlashProgPages
-.L1288:
-	ldr	r3, .L1295+24
+.L1292:
+	ldr	r3, .L1299+24
 	ldrh	r2, [r3, #2]
 	adds	r2, r2, #1
 	strh	r2, [r3, #2]	@ movhi
 	ldr	r3, [r6, #0]
 	adds	r3, r3, #1
-	bne	.L1289
+	bne	.L1293
 	adds	r7, r7, #1
-	ldr	r0, .L1295+44
+	ldr	r0, .L1299+44
 	ldr	r1, [r6, #4]
 	uxth	r7, r7
 	bl	printf
 	cmp	r7, #3
-	bls	.L1294
-	ldr	r3, .L1295+8
+	bls	.L1298
+	ldr	r3, .L1299+8
 	mov	r2, r7
-	ldr	r0, .L1295+48
+	ldr	r0, .L1299+48
 	ldr	r1, [r3, #4]
 	bl	printf
-	ldr	r3, .L1295
+	ldr	r3, .L1299
 	movs	r2, #1
 	str	r2, [r3, #0]
-	b	.L1284
-.L1289:
+	b	.L1288
+.L1293:
 	cmp	r8, #0
-	beq	.L1291
-.L1284:
+	beq	.L1295
+.L1288:
 	movs	r0, #0
 	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1296:
+.L1300:
 	.align	2
-.L1295:
-	.word	.LANCHOR94
-	.word	.LANCHOR98
+.L1299:
+	.word	.LANCHOR82
+	.word	.LANCHOR86
 	.word	.LANCHOR198
-	.word	.LANCHOR90+24
+	.word	.LANCHOR78+24
 	.word	.LANCHOR184
-	.word	.LANCHOR73
-	.word	.LANCHOR90
-	.word	.LANCHOR52
+	.word	.LANCHOR61
+	.word	.LANCHOR78
+	.word	.LANCHOR40
 	.word	.LC26
-	.word	.LANCHOR69
-	.word	.LANCHOR95
+	.word	.LANCHOR57
+	.word	.LANCHOR83
 	.word	.LC27
 	.word	.LC28
-	.word	.LANCHOR60
-	.word	.LANCHOR91
+	.word	.LANCHOR48
+	.word	.LANCHOR79
 	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
 	.section	.text.FtlGcFreeBadSuperBlk,"ax",%progbits
 	.align	1
@@ -11522,22 +11563,22 @@ FtlGcFreeBadSuperBlk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
 	mov	sl, r0
-	ldr	r5, .L1307
+	ldr	r5, .L1311
 	ldrh	r3, [r5, #0]
-	cbnz	r3, .L1306
-	b	.L1299
-.L1305:
-	ldr	r3, .L1307+4
+	cbnz	r3, .L1310
+	b	.L1303
+.L1309:
+	ldr	r3, .L1311+4
 	mov	r1, sl
 	mov	fp, #0
 	ldrb	r0, [r3, r4]	@ zero_extendqisi2
 	bl	V2P_block
 	mov	r3, r0
-	b	.L1300
-.L1304:
+	b	.L1304
+.L1308:
 	ldrh	r2, [r7, fp, lsl #1]
 	cmp	r2, r3
-	bne	.L1301
+	bne	.L1305
 	mov	r0, r3
 	str	r3, [sp, #4]
 	bl	FtlBbmMapBadBlock
@@ -11545,47 +11586,47 @@ FtlGcFreeBadSuperBlk:
 	ldrh	r1, [r5, #0]
 	mov	r2, fp
 	ldr	r3, [sp, #4]
-	b	.L1302
-.L1303:
+	b	.L1306
+.L1307:
 	adds	r0, r2, #1
 	ldrh	lr, [r6, r0, lsl #1]
 	strh	lr, [r6, r2, lsl #1]	@ movhi
 	uxth	r2, r0
-.L1302:
+.L1306:
 	cmp	r2, r1
-	bcc	.L1303
+	bcc	.L1307
 	subs	r1, r1, #1
 	strh	r1, [r5, #0]	@ movhi
-.L1301:
+.L1305:
 	add	fp, fp, #1
 	uxth	fp, fp
-.L1300:
+.L1304:
 	ldrh	r2, [r5, #0]
 	cmp	r2, fp
-	bhi	.L1304
+	bhi	.L1308
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L1298
-.L1306:
-	ldr	r7, .L1307+8
+	b	.L1302
+.L1310:
+	ldr	r7, .L1311+8
 	movs	r4, #0
-	ldr	r8, .L1307+12
+	ldr	r8, .L1311+12
 	mov	r6, r7
-.L1298:
+.L1302:
 	ldrh	r3, [r8, #0]
 	cmp	r3, r4
-	bhi	.L1305
+	bhi	.L1309
 	bl	FtlGcReFreshBadBlk
-.L1299:
+.L1303:
 	movs	r0, #0
 	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1308:
+.L1312:
 	.align	2
-.L1307:
-	.word	.LANCHOR151
-	.word	.LANCHOR62
-	.word	.LANCHOR152
-	.word	.LANCHOR53
+.L1311:
+	.word	.LANCHOR139
+	.word	.LANCHOR50
+	.word	.LANCHOR140
+	.word	.LANCHOR41
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
 	.section	.text.update_vpc_list,"ax",%progbits
 	.align	1
@@ -11598,46 +11639,46 @@ update_vpc_list:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	mov	r4, r0
-	ldr	r3, .L1319
+	ldr	r3, .L1323
 	ldr	r3, [r3, #0]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	bne	.L1310
-	ldr	r2, .L1319+4
+	bne	.L1314
+	ldr	r2, .L1323+4
 	ldrh	r1, [r2, #0]
 	cmp	r1, r0
-	bne	.L1311
+	bne	.L1315
 	movw	r3, #65535
 	strh	r3, [r2, #0]	@ movhi
-	b	.L1312
-.L1311:
-	ldr	r2, .L1319+8
+	b	.L1316
+.L1315:
+	ldr	r2, .L1323+8
 	ldrh	r2, [r2, #0]
 	cmp	r2, r0
-	beq	.L1313
-	ldr	r2, .L1319+12
+	beq	.L1317
+	ldr	r2, .L1323+12
 	ldrh	r2, [r2, #0]
 	cmp	r2, r0
-	beq	.L1313
-	ldr	r2, .L1319+16
+	beq	.L1317
+	ldr	r2, .L1323+16
 	ldrh	r2, [r2, #0]
 	cmp	r2, r0
-	beq	.L1313
-.L1312:
-	ldr	r5, .L1319+20
+	beq	.L1317
+.L1316:
+	ldr	r5, .L1323+20
 	mov	r1, r4
-	ldr	r0, .L1319+24
+	ldr	r0, .L1323+24
 	bl	List_remove_node
 	ldrh	r3, [r5, #0]
-	cbnz	r3, .L1314
-	ldr	r1, .L1319+28
-	movw	r2, #3039
-	ldr	r0, .L1319+32
+	cbnz	r3, .L1318
+	ldr	r1, .L1323+28
+	movw	r2, #3042
+	ldr	r0, .L1323+32
 	bl	printf
-	ldr	r0, .L1319+36
-	ldr	r1, .L1319+40
+	ldr	r0, .L1323+36
+	ldr	r1, .L1323+40
 	bl	printf
-.L1314:
+.L1318:
 	ldrh	r3, [r5, #0]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -11645,47 +11686,47 @@ update_vpc_list:
 	bl	free_data_superblock
 	mov	r0, r4
 	bl	FtlGcFreeBadSuperBlk
-	ldr	r3, .L1319+44
+	ldr	r3, .L1323+44
 	ldrh	r2, [r3, #0]
 	ldrh	r3, [r5, #0]
 	adds	r2, r2, r3
-	ldr	r3, .L1319+48
+	ldr	r3, .L1323+48
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	ble	.L1318
-	ldr	r1, .L1319+28
-	movw	r2, #3042
-	ldr	r0, .L1319+32
+	ble	.L1322
+	ldr	r1, .L1323+28
+	movw	r2, #3045
+	ldr	r0, .L1323+32
 	bl	printf
-	ldr	r1, .L1319+40
-	ldr	r0, .L1319+36
+	ldr	r1, .L1323+40
+	ldr	r0, .L1323+36
 	bl	printf
-	b	.L1318
-.L1310:
+	b	.L1322
+.L1314:
 	bl	List_update_data_list
 	movs	r3, #0
-	b	.L1313
-.L1318:
+	b	.L1317
+.L1322:
 	movs	r3, #1
-.L1313:
+.L1317:
 	mov	r0, r3
 	pop	{r3, r4, r5, pc}
-.L1320:
+.L1324:
 	.align	2
-.L1319:
-	.word	.LANCHOR101
+.L1323:
+	.word	.LANCHOR89
 	.word	.LANCHOR202
-	.word	.LANCHOR109
-	.word	.LANCHOR110
-	.word	.LANCHOR111
-	.word	.LANCHOR103
-	.word	.LANCHOR100
+	.word	.LANCHOR97
+	.word	.LANCHOR98
+	.word	.LANCHOR99
+	.word	.LANCHOR91
+	.word	.LANCHOR88
 	.word	.LANCHOR207
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.word	.LANCHOR106
-	.word	.LANCHOR55
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
+	.word	.LANCHOR94
+	.word	.LANCHOR43
 	.size	update_vpc_list, .-update_vpc_list
 	.section	.text.decrement_vpc_count,"ax",%progbits
 	.align	1
@@ -11700,87 +11741,87 @@ decrement_vpc_count:
 	cmp	r0, r3
 	push	{r4, r5, r6, lr}
 	mov	r4, r0
-	beq	.L1322
-	ldr	r6, .L1328
+	beq	.L1326
+	ldr	r6, .L1332
 	ldr	r3, [r6, #0]
 	ldrh	r5, [r3, r0, lsl #1]
-	cbnz	r5, .L1323
+	cbnz	r5, .L1327
 	mov	r1, r4
-	ldr	r0, .L1328+4
+	ldr	r0, .L1332+4
 	mov	r2, r5
 	bl	printf
 	ldr	r3, [r6, #0]
 	ldrh	r4, [r3, r4, lsl #1]
 	cmp	r4, #0
-	bne	.L1324
-	ldr	r1, .L1328+8
-	movw	r2, #3057
-	ldr	r0, .L1328+12
+	bne	.L1328
+	ldr	r1, .L1332+8
+	movw	r2, #3060
+	ldr	r0, .L1332+12
 	mov	r5, r4
 	bl	printf
-	ldr	r0, .L1328+16
-	ldr	r1, .L1328+20
+	ldr	r0, .L1332+16
+	ldr	r1, .L1332+20
 	bl	printf
-	b	.L1324
-.L1323:
+	b	.L1328
+.L1327:
 	subs	r5, r5, #1
 	strh	r5, [r3, r0, lsl #1]	@ movhi
-.L1322:
-	ldr	r6, .L1328+24
+.L1326:
+	ldr	r6, .L1332+24
 	movw	r3, #65535
 	ldrh	r0, [r6, #0]
 	cmp	r0, r3
-	bne	.L1325
+	bne	.L1329
 	strh	r4, [r6, #0]	@ movhi
-	b	.L1327
-.L1325:
+	b	.L1331
+.L1329:
 	cmp	r0, r4
-	beq	.L1327
+	beq	.L1331
 	bl	update_vpc_list
-	ldr	r3, .L1328+28
+	ldr	r3, .L1332+28
 	strh	r4, [r6, #0]	@ movhi
 	ldr	r2, [r3, #0]
-	ldr	r3, .L1328+32
+	ldr	r3, .L1332+32
 	ldr	r3, [r3, #0]
 	subs	r3, r2, r3
-	ldr	r2, .L1328+36
+	ldr	r2, .L1332+36
 	adds	r5, r0, #0
 	it	ne
 	movne	r5, #1
 	asrs	r3, r3, #1
 	muls	r3, r2, r3
-	ldr	r2, .L1328
+	ldr	r2, .L1332
 	uxth	r3, r3
 	ldr	r2, [r2, #0]
 	ldrh	r2, [r2, r3, lsl #1]
-	cbnz	r2, .L1324
+	cbnz	r2, .L1328
 	cmp	r4, r3
-	beq	.L1324
-	ldr	r1, .L1328+8
-	movw	r2, #3079
-	ldr	r0, .L1328+12
+	beq	.L1328
+	ldr	r1, .L1332+8
+	movw	r2, #3082
+	ldr	r0, .L1332+12
 	bl	printf
-	ldr	r1, .L1328+20
-	ldr	r0, .L1328+16
+	ldr	r1, .L1332+20
+	ldr	r0, .L1332+16
 	bl	printf
-	b	.L1324
-.L1327:
+	b	.L1328
+.L1331:
 	movs	r5, #0
-.L1324:
+.L1328:
 	mov	r0, r5
 	pop	{r4, r5, r6, pc}
-.L1329:
+.L1333:
 	.align	2
-.L1328:
-	.word	.LANCHOR101
+.L1332:
+	.word	.LANCHOR89
 	.word	.LC29
 	.word	.LANCHOR208
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.word	.LANCHOR138
-	.word	.LANCHOR100
-	.word	.LANCHOR99
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
+	.word	.LANCHOR126
+	.word	.LANCHOR88
+	.word	.LANCHOR87
 	.word	-1431655765
 	.size	decrement_vpc_count, .-decrement_vpc_count
 	.section	.text.get_new_active_ppa,"ax",%progbits
@@ -11797,133 +11838,133 @@ get_new_active_ppa:
 	movw	r3, #65535
 	cmp	r2, r3
 	mov	r4, r0
-	bne	.L1331
-	ldr	r1, .L1346
-	movw	r2, #2979
-	ldr	r0, .L1346+4
+	bne	.L1335
+	ldr	r1, .L1350
+	movw	r2, #2982
+	ldr	r0, .L1350+4
 	bl	printf
-	ldr	r0, .L1346+8
-	ldr	r1, .L1346+12
+	ldr	r0, .L1350+8
+	ldr	r1, .L1350+12
 	bl	printf
-.L1331:
-	ldr	r3, .L1346+16
+.L1335:
+	ldr	r3, .L1350+16
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bne	.L1332
-	ldr	r1, .L1346
-	movw	r2, #2980
-	ldr	r0, .L1346+4
+	bne	.L1336
+	ldr	r1, .L1350
+	movw	r2, #2983
+	ldr	r0, .L1350+4
 	bl	printf
-	ldr	r0, .L1346+8
-	ldr	r1, .L1346+12
+	ldr	r0, .L1350+8
+	ldr	r1, .L1350+12
 	bl	printf
-.L1332:
+.L1336:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1333
-	ldr	r1, .L1346
-	movw	r2, #2981
-	ldr	r0, .L1346+4
+	cbnz	r3, .L1337
+	ldr	r1, .L1350
+	movw	r2, #2984
+	ldr	r0, .L1350+4
 	bl	printf
-	ldr	r0, .L1346+8
-	ldr	r1, .L1346+12
+	ldr	r0, .L1350+8
+	ldr	r1, .L1350+12
 	bl	printf
-.L1333:
+.L1337:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	movs	r7, #0
 	movw	r6, #65535
 	strb	r7, [r4, #10]
 	adds	r3, r3, #8
-	ldr	sl, .L1346+24
-	ldr	r8, .L1346+28
+	ldr	sl, .L1350+24
+	ldr	r8, .L1350+28
 	ldrh	r3, [r4, r3, lsl #1]
-	ldr	r5, .L1346+20
-	b	.L1334
-.L1335:
+	ldr	r5, .L1350+20
+	b	.L1338
+.L1339:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	ldrh	r2, [r5, #0]
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	strb	r3, [r4, #6]
 	cmp	r2, r3
-	bne	.L1336
+	bne	.L1340
 	ldrh	r3, [r4, #2]
 	strb	r7, [r4, #6]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
-.L1336:
+.L1340:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r3, [r4, r3, lsl #1]
-.L1334:
+.L1338:
 	cmp	r3, r6
-	beq	.L1335
+	beq	.L1339
 	ldrb	r2, [r4, #8]	@ zero_extendqisi2
 	cmp	r2, #1
-	bne	.L1337
+	bne	.L1341
 	ldrb	r2, [sl, #0]	@ zero_extendqisi2
-	cbnz	r2, .L1337
+	cbnz	r2, .L1341
 	ldrh	r2, [r4, #2]
 	ldrh	r2, [r8, r2, lsl #1]
 	cmp	r2, r6
-	bne	.L1337
+	bne	.L1341
 	ldrh	r3, [r4, #4]
 	ldrh	r0, [r4, #0]
 	subs	r3, r3, #1
 	strh	r3, [r4, #4]	@ movhi
 	bl	decrement_vpc_count
-	b	.L1335
-.L1337:
+	b	.L1339
+.L1341:
 	ldrh	r5, [r4, #2]
 	movw	r6, #65535
-	ldr	sl, .L1346+20
+	ldr	sl, .L1350+20
 	mov	r8, r6
-	ldr	r7, .L1346+24
+	ldr	r7, .L1350+24
 	orr	r5, r5, r3, lsl #10
 	ldrh	r3, [r4, #4]
 	subs	r3, r3, #1
 	strh	r3, [r4, #4]	@ movhi
-.L1342:
+.L1346:
 	ldrh	r2, [sl, #0]
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-.L1339:
+.L1343:
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, r2
-	bne	.L1338
+	bne	.L1342
 	ldrh	r3, [r4, #2]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
-.L1338:
+.L1342:
 	add	r1, r3, #8
 	ldrh	r1, [r4, r1, lsl #1]
 	cmp	r1, r6
-	beq	.L1339
+	beq	.L1343
 	strb	r3, [r4, #6]
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1340
+	bne	.L1344
 	ldrb	r2, [r7, #0]	@ zero_extendqisi2
 	ldrh	r3, [r4, #2]
-	cbnz	r2, .L1344
-	ldr	r2, .L1346+28
+	cbnz	r2, .L1348
+	ldr	r2, .L1350+28
 	ldrh	r3, [r2, r3, lsl #1]
 	cmp	r3, r8
-	bne	.L1340
+	bne	.L1344
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L1340
+	cbz	r3, .L1344
 	subs	r3, r3, #1
 	ldrh	r0, [r4, #0]
 	strh	r3, [r4, #4]	@ movhi
 	bl	decrement_vpc_count
-	b	.L1342
-.L1344:
-	ldr	r2, .L1346+32
+	b	.L1346
+.L1348:
+	ldr	r2, .L1350+32
 	ldrh	r2, [r2, #0]
 	cmp	r3, r2
-	bcc	.L1340
-	ldr	r3, .L1346+36
+	bcc	.L1344
+	ldr	r3, .L1350+36
 	ldrh	r2, [r4, #0]
 	ldrh	r1, [r4, #4]
 	ldr	r3, [r3, #0]
@@ -11933,41 +11974,41 @@ get_new_active_ppa:
 	movs	r3, #0
 	strh	r3, [r4, #4]	@ movhi
 	mov	r2, r3	@ movhi
-	ldr	r3, .L1346+16
+	ldr	r3, .L1350+16
 	strb	r2, [r4, #6]
 	ldrh	r3, [r3, #0]
 	strh	r3, [r4, #2]	@ movhi
-.L1340:
-	ldr	r3, .L1346+16
+.L1344:
+	ldr	r3, .L1350+16
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bne	.L1343
+	bne	.L1347
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L1343
-	ldr	r1, .L1346
-	movw	r2, #3025
-	ldr	r0, .L1346+4
+	cbz	r3, .L1347
+	ldr	r1, .L1350
+	movw	r2, #3028
+	ldr	r0, .L1350+4
 	bl	printf
-	ldr	r0, .L1346+8
-	ldr	r1, .L1346+12
+	ldr	r0, .L1350+8
+	ldr	r1, .L1350+12
 	bl	printf
-.L1343:
+.L1347:
 	mov	r0, r5
 	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
-.L1347:
+.L1351:
 	.align	2
-.L1346:
+.L1350:
 	.word	.LANCHOR209
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.word	.LANCHOR68
-	.word	.LANCHOR53
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
+	.word	.LANCHOR56
+	.word	.LANCHOR41
 	.word	.LANCHOR7
 	.word	.LANCHOR9
-	.word	.LANCHOR69
-	.word	.LANCHOR101
+	.word	.LANCHOR57
+	.word	.LANCHOR89
 	.size	get_new_active_ppa, .-get_new_active_ppa
 	.section	.text.FtlSlcSuperblockCheck,"ax",%progbits
 	.align	1
@@ -11982,47 +12023,47 @@ FtlSlcSuperblockCheck:
 	mov	r4, r0
 	ldrh	r3, [r0, #4]
 	cmp	r3, #0
-	beq	.L1348
+	beq	.L1352
 	ldrh	r3, [r0, #0]
 	movw	r5, #65535
 	cmp	r3, r5
-	beq	.L1348
+	beq	.L1352
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	movs	r6, #0
-	ldr	sl, .L1354+4
+	ldr	sl, .L1358+4
 	adds	r3, r3, #8
-	ldr	r8, .L1354+20
-	ldr	r7, .L1354
+	ldr	r8, .L1358+20
+	ldr	r7, .L1358
 	ldrh	r3, [r0, r3, lsl #1]
-	b	.L1350
-.L1351:
+	b	.L1354
+.L1355:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	ldrh	r2, [r7, #0]
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	strb	r3, [r4, #6]
 	cmp	r2, r3
-	bne	.L1352
+	bne	.L1356
 	ldrh	r3, [r4, #2]
 	strb	r6, [r4, #6]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
-.L1352:
+.L1356:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r3, [r4, r3, lsl #1]
-.L1350:
+.L1354:
 	cmp	r3, r5
-	beq	.L1351
+	beq	.L1355
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1353
+	bne	.L1357
 	ldrb	r2, [sl, #0]	@ zero_extendqisi2
-	cbnz	r2, .L1353
+	cbnz	r2, .L1357
 	ldrh	r2, [r4, #2]
 	ldrh	r2, [r8, r2, lsl #1]
 	cmp	r2, r5
-	bne	.L1353
+	bne	.L1357
 	ldrh	r3, [r4, #4]
 	ldrh	r0, [r4, #0]
 	subs	r3, r3, #1
@@ -12030,24 +12071,24 @@ FtlSlcSuperblockCheck:
 	bl	decrement_vpc_count
 	ldrh	r3, [r4, #4]
 	cmp	r3, #0
-	bne	.L1351
+	bne	.L1355
 	ldrh	r2, [r4, #2]
 	strb	r3, [r4, #6]
 	adds	r2, r2, #1
 	strh	r2, [r4, #2]	@ movhi
 	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
-.L1353:
-	ldr	r2, .L1354+4
+.L1357:
+	ldr	r2, .L1358+4
 	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	cbz	r2, .L1348
+	cbz	r2, .L1352
 	cmp	r3, #1
-	bne	.L1348
-	ldr	r3, .L1354+8
+	bne	.L1352
+	ldr	r3, .L1358+8
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bcc	.L1348
-	ldr	r3, .L1354+12
+	bcc	.L1352
+	ldr	r3, .L1358+12
 	ldrh	r2, [r4, #0]
 	ldrh	r1, [r4, #4]
 	ldr	r3, [r3, #0]
@@ -12057,20 +12098,20 @@ FtlSlcSuperblockCheck:
 	movs	r3, #0
 	strh	r3, [r4, #4]	@ movhi
 	mov	r2, r3	@ movhi
-	ldr	r3, .L1354+16
+	ldr	r3, .L1358+16
 	strb	r2, [r4, #6]
 	ldrh	r3, [r3, #0]
 	strh	r3, [r4, #2]	@ movhi
-.L1348:
+.L1352:
 	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
-.L1355:
+.L1359:
 	.align	2
-.L1354:
-	.word	.LANCHOR53
+.L1358:
+	.word	.LANCHOR41
 	.word	.LANCHOR7
-	.word	.LANCHOR69
-	.word	.LANCHOR101
-	.word	.LANCHOR68
+	.word	.LANCHOR57
+	.word	.LANCHOR89
+	.word	.LANCHOR56
 	.word	.LANCHOR9
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
 	.section	.text.allocate_data_superblock,"ax",%progbits
@@ -12082,108 +12123,108 @@ FtlSlcSuperblockCheck:
 allocate_data_superblock:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1401
+	ldr	r3, .L1405
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	mov	r4, r0
 	ldr	r3, [r3, #0]
 	sub	sp, sp, #24
 	cmp	r3, #0
-	bne	.L1357
-	ldr	r7, .L1401+4
-	ldr	r8, .L1401+104
-.L1397:
-	ldr	r1, .L1401+8
+	bne	.L1361
+	ldr	r7, .L1405+4
+	ldr	r8, .L1405+104
+.L1401:
+	ldr	r1, .L1405+8
 	ldrh	r2, [r7, #0]
 	ldrh	r3, [r1, #0]
 	adds	r2, r2, r3
-	ldr	r3, .L1401+12
+	ldr	r3, .L1405+12
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	ble	.L1359
-	ldr	r1, .L1401+16
-	movw	r2, #2815
-	ldr	r0, .L1401+20
+	ble	.L1363
+	ldr	r1, .L1405+16
+	movw	r2, #2818
+	ldr	r0, .L1405+20
 	bl	printf
-	ldr	r0, .L1401+24
-	ldr	r1, .L1401+28
+	ldr	r0, .L1405+24
+	ldr	r1, .L1405+28
 	bl	printf
-.L1359:
-	ldr	r3, .L1401+32
+.L1363:
+	ldr	r3, .L1405+32
 	cmp	r4, r3
-	bne	.L1360
-	ldr	r3, .L1401+36
+	bne	.L1364
+	ldr	r3, .L1405+36
 	ldrh	r2, [r7, #0]
 	ldr	r3, [r3, #0]
 	lsrs	r1, r2, #1
 	adds	r0, r1, #1
 	mul	r5, r3, r2
 	add	r0, r0, r5, lsr #2
-	ldr	r5, .L1401+40
+	ldr	r5, .L1405+40
 	uxth	r0, r0
 	ldr	r5, [r5, #0]
-	cbz	r5, .L1389
-	ldr	r5, .L1401+44
+	cbz	r5, .L1393
+	ldr	r5, .L1405+44
 	ldr	r5, [r5, #0]
 	cmp	r5, #29
-	bhi	.L1389
+	bhi	.L1393
 	cmp	r5, #2
-	bls	.L1394
+	bls	.L1398
 	lsls	r0, r2, #31
-	bpl	.L1361
-	cbz	r3, .L1391
-	b	.L1361
-.L1360:
+	bpl	.L1365
+	cbz	r3, .L1395
+	b	.L1365
+.L1364:
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1394
-	ldr	r3, .L1401+48
+	bne	.L1398
+	ldr	r3, .L1405+48
 	ldrh	r3, [r3, #0]
 	cmp	r3, #1
-	beq	.L1394
-	ldr	r3, .L1401+52
+	beq	.L1398
+	ldr	r3, .L1405+52
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbnz	r3, .L1394
-	ldr	r2, .L1401+40
+	cbnz	r3, .L1398
+	ldr	r2, .L1405+40
 	ldrh	r3, [r7, #0]
 	ldr	r2, [r2, #0]
 	lsrs	r1, r3, #3
-	cbz	r2, .L1361
-	ldr	r2, .L1401+44
+	cbz	r2, .L1365
+	ldr	r2, .L1405+44
 	ldr	r2, [r2, #0]
 	cmp	r2, #1
-	bhi	.L1361
+	bhi	.L1365
 	movs	r1, #7
 	muls	r1, r3, r1
 	lsrs	r1, r1, #3
-	b	.L1361
-.L1389:
+	b	.L1365
+.L1393:
 	mov	r1, r0
-.L1361:
-	cbz	r1, .L1362
+.L1365:
+	cbz	r1, .L1366
 	subs	r1, r1, #1
 	uxth	r1, r1
-	b	.L1362
-.L1391:
+	b	.L1366
+.L1395:
 	mov	r1, r3
-	b	.L1362
-.L1394:
+	b	.L1366
+.L1398:
 	movs	r1, #0
-.L1362:
-	ldr	r0, .L1401+56
+.L1366:
+	ldr	r0, .L1405+56
 	ldrb	r2, [r4, #8]	@ zero_extendqisi2
 	bl	List_pop_index_node
 	ldrh	r3, [r7, #0]
 	uxth	r5, r0
-	cbnz	r3, .L1363
-	ldr	r1, .L1401+16
-	movw	r2, #2835
-	ldr	r0, .L1401+20
+	cbnz	r3, .L1367
+	ldr	r1, .L1405+16
+	movw	r2, #2838
+	ldr	r0, .L1405+20
 	bl	printf
-	ldr	r0, .L1401+24
-	ldr	r1, .L1401+28
+	ldr	r0, .L1405+24
+	ldr	r1, .L1405+28
 	bl	printf
-.L1363:
-	ldr	r2, .L1401+4
+.L1367:
+	ldr	r2, .L1405+4
 	mov	r0, r4
 	ldrh	r3, [r2, #0]
 	subs	r3, r3, #1
@@ -12191,45 +12232,45 @@ allocate_data_superblock:
 	strh	r5, [r4, #0]	@ movhi
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1364
-	ldr	r3, .L1401+60
+	cbnz	r3, .L1368
+	ldr	r3, .L1405+60
 	movw	r2, #65535
-	ldr	r1, .L1401+8
+	ldr	r1, .L1405+8
 	ldr	r3, [r3, #0]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
 	ldrh	r3, [r1, #0]
 	ldrh	r2, [r7, #0]
 	adds	r2, r2, r3
-	ldr	r3, .L1401+12
+	ldr	r3, .L1405+12
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	ble	.L1397
-	ldr	r1, .L1401+16
-	movw	r2, #2847
-	ldr	r0, .L1401+20
+	ble	.L1401
+	ldr	r1, .L1405+16
+	movw	r2, #2850
+	ldr	r0, .L1405+20
 	bl	printf
-	ldr	r1, .L1401+28
-	ldr	r0, .L1401+24
+	ldr	r1, .L1405+28
+	ldr	r0, .L1405+24
 	bl	printf
-	b	.L1397
-.L1364:
-	ldr	r1, .L1401+8
+	b	.L1401
+.L1368:
+	ldr	r1, .L1405+8
 	ldrh	r2, [r7, #0]
 	ldrh	r3, [r1, #0]
 	adds	r2, r2, r3
-	ldr	r3, .L1401+12
+	ldr	r3, .L1405+12
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	ble	.L1366
-	ldr	r1, .L1401+16
-	movw	r2, #2850
-	ldr	r0, .L1401+20
+	ble	.L1370
+	ldr	r1, .L1405+16
+	movw	r2, #2853
+	ldr	r0, .L1405+20
 	bl	printf
-	ldr	r0, .L1401+24
-	ldr	r1, .L1401+28
+	ldr	r0, .L1405+24
+	ldr	r1, .L1405+28
 	bl	printf
-.L1366:
-	ldr	r3, .L1401+64
+.L1370:
+	ldr	r3, .L1405+64
 	movs	r6, #0
 	ldr	lr, [r8, #0]
 	mov	sl, r4
@@ -12240,14 +12281,14 @@ allocate_data_superblock:
 	stmia	sp, {r4, lr}
 	str	r3, [sp, #20]
 	mov	r3, lr
-	b	.L1367
-.L1369:
+	b	.L1371
+.L1373:
 	str	r0, [r3, #8]
 	movw	r4, #65535
 	str	r0, [r3, #12]
 	ldrh	ip, [r1, #16]
 	cmp	ip, r4
-	beq	.L1368
+	beq	.L1372
 	ldr	r4, [sp, #4]
 	mov	lr, #36
 	lsl	ip, ip, #10
@@ -12255,170 +12296,170 @@ allocate_data_superblock:
 	adds	r6, r6, #1
 	uxth	r6, r6
 	str	ip, [fp, #4]
-.L1368:
+.L1372:
 	adds	r2, r2, #1
 	adds	r3, r3, #36
 	adds	r1, r1, #2
 	uxth	r2, r2
-.L1367:
+.L1371:
 	ldr	r4, [sp, #20]
 	cmp	r2, r4
-	bne	.L1369
+	bne	.L1373
 	ldr	r4, [sp, #0]
-	cbnz	r6, .L1370
-	ldr	r1, .L1401+16
-	movw	r2, #2862
-	ldr	r0, .L1401+20
+	cbnz	r6, .L1374
+	ldr	r1, .L1405+16
+	movw	r2, #2865
+	ldr	r0, .L1405+20
 	bl	printf
-	ldr	r0, .L1401+24
-	ldr	r1, .L1401+28
+	ldr	r0, .L1405+24
+	ldr	r1, .L1405+28
 	bl	printf
-.L1370:
-	ldr	r3, .L1401+40
+.L1374:
+	ldr	r3, .L1405+40
 	ldr	r3, [r3, #0]
-	cbz	r3, .L1371
-	ldr	r3, .L1401+68
+	cbz	r3, .L1375
+	ldr	r3, .L1405+68
 	cmp	r4, r3
-	bne	.L1371
-	ldr	r3, .L1401+72
+	bne	.L1375
+	ldr	r3, .L1405+72
 	ldr	r3, [r3, #0]
 	ldrh	r3, [r3, r5, lsl #1]
 	cmp	r3, #30
-	bls	.L1371
+	bls	.L1375
 	movs	r3, #0
 	strb	r3, [r4, #8]
-.L1371:
-	ldr	r3, .L1401+76
+.L1375:
+	ldr	r3, .L1405+76
 	ldrh	r3, [r3, #0]
 	cmp	r3, r5
-	bne	.L1372
-	ldr	r1, .L1401+16
-	movw	r2, #2869
-	ldr	r0, .L1401+20
+	bne	.L1376
+	ldr	r1, .L1405+16
+	movw	r2, #2872
+	ldr	r0, .L1405+20
 	bl	printf
-	ldr	r0, .L1401+24
-	ldr	r1, .L1401+28
+	ldr	r0, .L1405+24
+	ldr	r1, .L1405+28
 	bl	printf
-.L1372:
-	ldr	r3, .L1401+72
+.L1376:
+	ldr	r3, .L1405+72
 	ldrb	r2, [r4, #8]	@ zero_extendqisi2
 	ldr	r3, [r3, #0]
-	cbnz	r2, .L1373
+	cbnz	r2, .L1377
 	ldrh	r2, [r3, r5, lsl #1]
-	cbz	r2, .L1374
-	ldr	r1, .L1401+80
+	cbz	r2, .L1378
+	ldr	r1, .L1405+80
 	ldrh	r1, [r1, #0]
 	adds	r2, r2, r1
-	b	.L1398
-.L1374:
+	b	.L1402
+.L1378:
 	movs	r2, #2
-.L1398:
+.L1402:
 	strh	r2, [r3, r5, lsl #1]	@ movhi
 	mov	r0, r5
-	ldr	r3, .L1401+84
+	ldr	r3, .L1405+84
 	movs	r1, #0
 	ldr	r2, [r3, #0]
 	adds	r2, r2, #1
 	str	r2, [r3, #0]
-	b	.L1399
-.L1373:
+	b	.L1403
+.L1377:
 	ldrh	r2, [r3, r5, lsl #1]
 	mov	r0, r5
 	movs	r1, #1
 	adds	r2, r2, #1
 	strh	r2, [r3, r5, lsl #1]	@ movhi
-	ldr	r3, .L1401+88
+	ldr	r3, .L1405+88
 	ldr	r2, [r3, #0]
 	adds	r2, r2, #1
 	str	r2, [r3, #0]
-.L1399:
+.L1403:
 	bl	ftl_set_blk_mode
-	ldr	r3, .L1401+72
+	ldr	r3, .L1405+72
 	lsl	fp, r5, #1
 	str	fp, [sp, #20]
 	ldr	r3, [r3, #0]
 	ldrh	r2, [r3, r5, lsl #1]
-	ldr	r3, .L1401+92
+	ldr	r3, .L1405+92
 	ldr	r1, [r3, #0]
 	cmp	r2, r1
 	it	hi
 	strhi	r2, [r3, #0]
-	ldr	r3, .L1401+80
+	ldr	r3, .L1405+80
 	ldrh	r2, [r3, #0]
-	ldr	r3, .L1401+84
+	ldr	r3, .L1405+84
 	ldr	r0, [r3, #0]
-	ldr	r3, .L1401+88
+	ldr	r3, .L1405+88
 	ldr	r3, [r3, #0]
 	mla	r0, r0, r2, r3
-	ldr	r3, .L1401+12
+	ldr	r3, .L1405+12
 	ldrh	r1, [r3, #0]
 	bl	__aeabi_uidiv
-	ldr	r3, .L1401+96
+	ldr	r3, .L1405+96
 	str	r0, [r3, #0]
-	ldr	r3, .L1401+100
+	ldr	r3, .L1405+100
 	ldr	r3, [r3, #0]
 	ldr	r2, [r3, #16]
 	adds	r2, r2, #1
 	str	r2, [r3, #16]
 	ldr	r3, [r8, #0]
 	movs	r2, #0
-	b	.L1378
-.L1402:
+	b	.L1382
+.L1406:
 	.align	2
-.L1401:
+.L1405:
+	.word	.LANCHOR82
 	.word	.LANCHOR94
-	.word	.LANCHOR106
-	.word	.LANCHOR103
-	.word	.LANCHOR55
+	.word	.LANCHOR91
+	.word	.LANCHOR43
 	.word	.LANCHOR210
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.word	.LANCHOR111
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
+	.word	.LANCHOR99
 	.word	.LANCHOR169
-	.word	.LANCHOR128
+	.word	.LANCHOR116
 	.word	.LANCHOR167
-	.word	.LANCHOR59
+	.word	.LANCHOR47
 	.word	.LANCHOR7
-	.word	.LANCHOR105
-	.word	.LANCHOR101
-	.word	.LANCHOR53
-	.word	.LANCHOR109
-	.word	.LANCHOR96
+	.word	.LANCHOR93
+	.word	.LANCHOR89
+	.word	.LANCHOR41
+	.word	.LANCHOR97
+	.word	.LANCHOR84
 	.word	.LANCHOR202
-	.word	.LANCHOR63
+	.word	.LANCHOR51
 	.word	.LANCHOR164
 	.word	.LANCHOR165
 	.word	.LANCHOR166
 	.word	.LANCHOR211
 	.word	.LANCHOR187
-	.word	.LANCHOR95
-.L1379:
+	.word	.LANCHOR83
+.L1383:
 	adds	r2, r2, #1
 	ldr	r1, [r3, #-32]
 	uxth	r2, r2
 	bic	r1, r1, #1020
 	bic	r1, r1, #3
 	str	r1, [r3, #-32]
-.L1378:
+.L1382:
 	adds	r3, r3, #36
 	cmp	r2, r6
-	bne	.L1379
-	ldr	r3, .L1403
+	bne	.L1383
+	ldr	r3, .L1407
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1380
+	cbz	r3, .L1384
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	ldr	r0, [r8, #0]
 	cmp	r3, #1
-	bne	.L1381
+	bne	.L1385
 	movs	r1, #0
-	b	.L1400
-.L1381:
+	b	.L1404
+.L1385:
 	movs	r1, #1
-.L1400:
+.L1404:
 	mov	r2, r6
 	bl	FlashEraseBlocks
-.L1380:
+.L1384:
 	ldrb	r1, [r4, #8]	@ zero_extendqisi2
 	mov	r2, r6
 	mov	fp, #0
@@ -12429,13 +12470,13 @@ allocate_data_superblock:
 	mov	r5, fp
 	mov	r6, r4
 	mov	r4, fp
-	b	.L1382
-.L1384:
+	b	.L1386
+.L1388:
 	ldr	r1, [r8, #0]
 	add	r0, r1, fp
 	ldr	r1, [r1, fp]
 	adds	r2, r1, #1
-	bne	.L1383
+	bne	.L1387
 	ldr	r0, [r0, #4]
 	adds	r5, r5, #1
 	str	r1, [sp, #16]
@@ -12450,31 +12491,31 @@ allocate_data_superblock:
 	strb	r1, [r6, #7]
 	ldr	ip, [sp, #12]
 	ldr	r3, [sp, #8]
-.L1383:
+.L1387:
 	adds	r4, r4, #1
 	add	fp, fp, #36
 	add	sl, sl, #2
 	uxth	r4, r4
-.L1382:
+.L1386:
 	cmp	r4, r3
-	bne	.L1384
+	bne	.L1388
 	mov	r3, r5
 	mov	r4, r6
 	mov	r5, ip
-	cbz	r3, .L1385
+	cbz	r3, .L1389
 	mov	r0, ip
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L1385:
+.L1389:
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1386
-	ldr	r3, .L1403+4
+	cbnz	r3, .L1390
+	ldr	r3, .L1407+4
 	movw	r2, #65535
 	ldr	r3, [r3, #0]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
-	b	.L1397
-.L1386:
-	ldr	r2, .L1403+8
+	b	.L1401
+.L1390:
+	ldr	r2, .L1407+8
 	ldr	fp, [sp, #20]
 	ldrh	r2, [r2, #0]
 	muls	r3, r2, r3
@@ -12482,43 +12523,43 @@ allocate_data_superblock:
 	strh	r2, [r4, #2]	@ movhi
 	strb	r2, [r4, #6]
 	uxth	r3, r3
-	ldr	r2, .L1403+12
+	ldr	r2, .L1407+12
 	strh	r5, [r4, #0]	@ movhi
 	strh	r3, [r4, #4]	@ movhi
 	ldr	r1, [r2, #0]
 	str	r1, [r4, #12]
 	adds	r1, r1, #1
 	str	r1, [r2, #0]
-	ldr	r2, .L1403+4
+	ldr	r2, .L1407+4
 	ldr	r2, [r2, #0]
 	strh	r3, [r2, fp]	@ movhi
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L1387
+	cbz	r3, .L1391
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1357
-.L1387:
-	ldr	r1, .L1403+16
-	mov	r2, #2928
-	ldr	r0, .L1403+20
+	cbnz	r3, .L1361
+.L1391:
+	ldr	r1, .L1407+16
+	movw	r2, #2931
+	ldr	r0, .L1407+20
 	bl	printf
-	ldr	r0, .L1403+24
-	ldr	r1, .L1403+28
+	ldr	r0, .L1407+24
+	ldr	r1, .L1407+28
 	bl	printf
-.L1357:
+.L1361:
 	movs	r0, #0
 	add	sp, sp, #24
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1404:
+.L1408:
 	.align	2
-.L1403:
+.L1407:
 	.word	.LANCHOR7
-	.word	.LANCHOR101
-	.word	.LANCHOR68
+	.word	.LANCHOR89
+	.word	.LANCHOR56
 	.word	.LANCHOR156
 	.word	.LANCHOR210
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
 	.size	allocate_data_superblock, .-allocate_data_superblock
 	.section	.text.FtlSuperblockPowerLostFix,"ax",%progbits
 	.align	1
@@ -12529,35 +12570,35 @@ allocate_data_superblock:
 FtlSuperblockPowerLostFix:
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1414
+	ldr	r3, .L1418
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	mov	r4, r0
 	ldrb	r6, [r3, #0]	@ zero_extendqisi2
 	sub	sp, sp, #40
-	cbz	r6, .L1413
+	cbz	r6, .L1417
 	ldrb	r6, [r0, #8]	@ zero_extendqisi2
 	cmp	r6, #1
-	bne	.L1412
+	bne	.L1416
 	ldrh	r5, [r0, #4]
-	b	.L1406
-.L1412:
+	b	.L1410
+.L1416:
 	movs	r6, #0
-.L1413:
+.L1417:
 	movs	r5, #12
-.L1406:
-	mov	r7, #-1
-	ldr	sl, .L1414+12
-	ldr	fp, .L1414+16
-	ldr	r8, .L1414+20
-	b	.L1407
 .L1410:
+	mov	r7, #-1
+	ldr	sl, .L1418+12
+	ldr	fp, .L1418+16
+	ldr	r8, .L1418+20
+	b	.L1411
+.L1414:
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L1408
+	cbz	r3, .L1412
 	mov	r0, r4
 	bl	get_new_active_ppa
 	str	r0, [sp, #8]
 	adds	r0, r0, #1
-	beq	.L1408
+	beq	.L1412
 	ldr	r3, [sl, #0]
 	add	r0, sp, #4
 	ldr	r2, [fp, #0]
@@ -12583,18 +12624,18 @@ FtlSuperblockPowerLostFix:
 	bl	FlashProgPages
 	ldrh	r0, [r4, #0]
 	bl	decrement_vpc_count
-.L1407:
+.L1411:
 	cmp	r5, #0
-	bne	.L1410
-.L1408:
-	ldr	r3, .L1414+4
+	bne	.L1414
+.L1412:
+	ldr	r3, .L1418+4
 	ldrh	r2, [r4, #0]
 	ldrh	r1, [r4, #4]
 	ldr	r3, [r3, #0]
 	ldrh	r0, [r3, r2, lsl #1]
 	subs	r1, r0, r1
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L1414+8
+	ldr	r3, .L1418+8
 	ldrh	r3, [r3, #0]
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
@@ -12602,13 +12643,13 @@ FtlSuperblockPowerLostFix:
 	strh	r3, [r4, #4]	@ movhi
 	add	sp, sp, #40
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1415:
+.L1419:
 	.align	2
-.L1414:
+.L1418:
 	.word	.LANCHOR7
-	.word	.LANCHOR101
-	.word	.LANCHOR68
-	.word	.LANCHOR98
+	.word	.LANCHOR89
+	.word	.LANCHOR56
+	.word	.LANCHOR86
 	.word	.LANCHOR184
 	.word	.LANCHOR157
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
@@ -12621,27 +12662,27 @@ FtlSuperblockPowerLostFix:
 FtlLowFormatEraseBlock:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1447
+	ldr	r3, .L1451
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	sub	sp, sp, #24
 	ldr	r6, [r3, #0]
 	mov	r8, r1
 	str	r0, [sp, #12]
 	cmp	r6, #0
-	bne	.L1440
-	ldr	r3, .L1447+4
+	bne	.L1444
+	ldr	r3, .L1451+4
 	mov	r5, r6
 	mov	r4, r6
-	ldr	sl, .L1447+28
+	ldr	sl, .L1451+28
 	movs	r7, #36
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	str	r3, [sp, #8]
-	ldr	r3, .L1447+8
+	ldr	r3, .L1451+8
 	str	r0, [r3, #0]
-	b	.L1418
-.L1422:
+	b	.L1422
+.L1426:
 	mul	r3, r7, r6
-	ldr	r1, .L1447+12
+	ldr	r1, .L1451+12
 	ldr	fp, [sl, #0]
 	movs	r0, #0
 	str	r0, [fp, r3]
@@ -12650,13 +12691,13 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	str	r0, [sp, #4]
 	cmp	r8, #0
-	beq	.L1419
+	beq	.L1423
 	bl	IsBlkInVendorPart
-	cbnz	r0, .L1420
-.L1419:
+	cbnz	r0, .L1424
+.L1423:
 	ldr	r0, [sp, #4]
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L1421
+	cbnz	r0, .L1425
 	mul	r3, r7, r5
 	ldr	r2, [sl, #0]
 	ldr	ip, [sp, #4]
@@ -12664,34 +12705,34 @@ FtlLowFormatEraseBlock:
 	add	r3, fp, r3
 	lsl	r1, ip, #10
 	str	r0, [r3, #8]
-	ldr	r0, .L1447+16
+	ldr	r0, .L1451+16
 	str	r1, [r2, #4]
 	ldrh	r2, [r0, #0]
 	muls	r2, r5, r2
-	ldr	r0, .L1447+20
+	ldr	r0, .L1451+20
 	adds	r5, r5, #1
 	bic	r2, r2, #3
 	uxth	r5, r5
 	ldr	r1, [r0, #0]
 	adds	r2, r1, r2
 	str	r2, [r3, #12]
-	b	.L1420
-.L1421:
+	b	.L1424
+.L1425:
 	adds	r4, r4, #1
 	uxth	r4, r4
-.L1420:
+.L1424:
 	adds	r6, r6, #1
 	uxth	r6, r6
-.L1418:
-	ldr	r1, .L1447+24
+.L1422:
+	ldr	r1, .L1451+24
 	ldrh	r3, [r1, #0]
 	cmp	r3, r6
-	bhi	.L1422
+	bhi	.L1426
 	cmp	r5, #0
-	beq	.L1417
+	beq	.L1421
 	ldr	r2, [sp, #8]
 	mov	sl, #0
-	ldr	r7, .L1447+28
+	ldr	r7, .L1451+28
 	mov	fp, sl
 	adds	r6, r2, #0
 	mov	r2, r5
@@ -12700,56 +12741,56 @@ FtlLowFormatEraseBlock:
 	ldr	r0, [r7, #0]
 	mov	r1, r6
 	bl	FlashEraseBlocks
-.L1426:
+.L1430:
 	ldr	r3, [r7, #0]
 	add	r2, r3, sl
 	ldr	r3, [r3, sl]
 	adds	r3, r3, #1
-	bne	.L1425
+	bne	.L1429
 	ldr	r0, [r2, #4]
 	adds	r4, r4, #1
 	ubfx	r0, r0, #10, #16
 	uxth	r4, r4
 	bl	FtlBbmMapBadBlock
-.L1425:
+.L1429:
 	add	fp, fp, #1
 	add	sl, sl, #36
 	uxth	fp, fp
 	cmp	fp, r5
-	bne	.L1426
+	bne	.L1430
 	cmp	r8, #0
-	beq	.L1441
-	ldr	r3, .L1447+32
+	beq	.L1445
+	ldr	r3, .L1451+32
 	ldrh	r3, [r3, #0]
 	str	r3, [sp, #4]
-	ldr	r3, .L1447+4
+	ldr	r3, .L1451+4
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbnz	r3, .L1442
+	cbnz	r3, .L1446
 	ldr	ip, [sp, #4]
 	movs	r6, #1
 	lsr	ip, ip, #2
 	str	ip, [sp, #8]
-	b	.L1427
-.L1441:
+	b	.L1431
+.L1445:
 	mov	ip, #6
 	str	ip, [sp, #8]
 	mov	ip, #1
 	str	ip, [sp, #4]
-	b	.L1427
-.L1442:
+	b	.L1431
+.L1446:
 	movs	r6, #1
 	str	r6, [sp, #8]
-.L1427:
-	ldr	sl, .L1447+28
+.L1431:
+	ldr	sl, .L1451+28
 	movs	r7, #0
-.L1435:
+.L1439:
 	mov	fp, #0
 	mov	r5, fp
-	b	.L1428
-.L1431:
+	b	.L1432
+.L1435:
 	mov	ip, #36
 	ldr	r2, [sl, #0]
-	ldr	r1, .L1447+12
+	ldr	r1, .L1451+12
 	movs	r0, #0
 	mul	r3, ip, fp
 	str	r2, [sp, #16]
@@ -12759,23 +12800,23 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	str	r0, [sp, #20]
 	cmp	r8, #0
-	beq	.L1429
+	beq	.L1433
 	bl	IsBlkInVendorPart
-	cbnz	r0, .L1430
-.L1429:
+	cbnz	r0, .L1434
+.L1433:
 	ldr	r0, [sp, #20]
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L1430
+	cbnz	r0, .L1434
 	ldr	r2, [sp, #16]
 	mov	ip, #36
 	ldr	r1, [sp, #20]
-	ldr	r0, .L1447+36
+	ldr	r0, .L1451+36
 	mla	r3, ip, r5, r2
 	add	r2, r7, r1, lsl #10
-	ldr	r1, .L1447+16
+	ldr	r1, .L1451+16
 	str	r2, [r3, #4]
 	ldr	r2, [r0, #0]
-	ldr	r0, .L1447+40
+	ldr	r0, .L1451+40
 	str	r2, [r3, #8]
 	ldrh	r2, [r1, #0]
 	muls	r2, r5, r2
@@ -12785,16 +12826,16 @@ FtlLowFormatEraseBlock:
 	uxth	r5, r5
 	adds	r2, r1, r2
 	str	r2, [r3, #12]
-.L1430:
+.L1434:
 	add	fp, fp, #1
 	uxth	fp, fp
-.L1428:
-	ldr	r1, .L1447+24
+.L1432:
+	ldr	r1, .L1451+24
 	ldrh	r3, [r1, #0]
 	cmp	r3, fp
-	bhi	.L1431
+	bhi	.L1435
 	cmp	r5, #0
-	beq	.L1417
+	beq	.L1421
 	mov	r1, r5
 	mov	r2, r6
 	ldr	r0, [sl, #0]
@@ -12806,11 +12847,11 @@ FtlLowFormatEraseBlock:
 	mov	r7, r6
 	mov	r6, r5
 	mov	r5, fp
-.L1434:
+.L1438:
 	ldr	r2, [sl, #0]
 	add	r1, r2, fp
 	ldr	r2, [r2, fp]
-	cbz	r2, .L1433
+	cbz	r2, .L1437
 	ldr	r0, [r1, #4]
 	adds	r4, r4, #1
 	str	ip, [sp, #0]
@@ -12818,12 +12859,12 @@ FtlLowFormatEraseBlock:
 	uxth	r4, r4
 	bl	FtlBbmMapBadBlock
 	ldr	ip, [sp, #0]
-.L1433:
+.L1437:
 	adds	r5, r5, #1
 	add	fp, fp, #36
 	uxth	r5, r5
 	cmp	r5, r6
-	bne	.L1434
+	bne	.L1438
 	mov	r5, r6
 	mov	r6, r7
 	mov	r7, r8
@@ -12833,57 +12874,57 @@ FtlLowFormatEraseBlock:
 	ldr	ip, [sp, #4]
 	uxth	r7, r7
 	cmp	r7, ip
-	bcc	.L1435
+	bcc	.L1439
 	movs	r7, #0
-	ldr	fp, .L1447+28
+	ldr	fp, .L1451+28
 	mov	sl, r7
-.L1437:
+.L1441:
 	cmp	r8, #0
-	beq	.L1436
+	beq	.L1440
 	ldr	r3, [fp, #0]
 	adds	r2, r3, r7
 	ldr	r3, [r3, r7]
-	cbnz	r3, .L1436
+	cbnz	r3, .L1440
 	ldr	r0, [r2, #4]
 	movs	r1, #1
 	ubfx	r0, r0, #10, #16
 	bl	FtlFreeSysBlkQueueIn
-.L1436:
+.L1440:
 	add	sl, sl, #1
 	adds	r7, r7, #36
 	uxth	sl, sl
 	cmp	sl, r5
-	bne	.L1437
+	bne	.L1441
 	ldr	r0, [sp, #12]
 	cmp	r0, #63
-	bls	.L1438
+	bls	.L1442
 	cmp	r8, #0
-	beq	.L1417
-.L1438:
-	ldr	r3, .L1447+28
+	beq	.L1421
+.L1442:
+	ldr	r3, .L1451+28
 	mov	r1, r6
 	mov	r2, r5
 	ldr	r0, [r3, #0]
 	bl	FlashEraseBlocks
-	b	.L1417
-.L1440:
+	b	.L1421
+.L1444:
 	movs	r4, #0
-.L1417:
+.L1421:
 	mov	r0, r4
 	add	sp, sp, #24
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1448:
+.L1452:
 	.align	2
-.L1447:
-	.word	.LANCHOR94
+.L1451:
+	.word	.LANCHOR82
 	.word	.LANCHOR7
-	.word	.LANCHOR89
+	.word	.LANCHOR77
+	.word	.LANCHOR50
 	.word	.LANCHOR62
-	.word	.LANCHOR74
 	.word	.LANCHOR185
-	.word	.LANCHOR53
-	.word	.LANCHOR95
-	.word	.LANCHOR69
+	.word	.LANCHOR41
+	.word	.LANCHOR83
+	.word	.LANCHOR57
 	.word	.LANCHOR182
 	.word	.LANCHOR183
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
@@ -12896,15 +12937,15 @@ FtlLowFormatEraseBlock:
 FlashTestBlk:
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1454
+	ldr	r3, .L1458
 	push	{r4, r5, lr}
 	mov	r4, r0
 	ldr	r3, [r3, #0]
 	sub	sp, sp, #108
 	cmp	r0, r3
-	bcc	.L1452
-.L1451:
-	ldr	r5, .L1454+4
+	bcc	.L1456
+.L1455:
+	ldr	r5, .L1458+4
 	add	r0, sp, #4
 	movs	r1, #165
 	movs	r2, #32
@@ -12936,18 +12977,18 @@ FlashTestBlk:
 	movne	r4, #-1
 	moveq	r4, #0
 	bl	FlashEraseBlocks
-	b	.L1450
-.L1452:
+	b	.L1454
+.L1456:
 	movs	r4, #0
-.L1450:
+.L1454:
 	mov	r0, r4
 	add	sp, sp, #108
 	pop	{r4, r5, pc}
-.L1455:
+.L1459:
 	.align	2
-.L1454:
-	.word	.LANCHOR46
-	.word	.LANCHOR41
+.L1458:
+	.word	.LANCHOR148
+	.word	.LANCHOR143
 	.size	FlashTestBlk, .-FlashTestBlk
 	.section	.text.ftl_map_blk_gc,"ax",%progbits
 	.align	1
@@ -12967,56 +13008,56 @@ ftl_map_blk_gc:
 	ldrh	r2, [r4, #8]
 	subs	r3, r7, #4
 	cmp	r2, r3
-	bge	.L1457
+	bge	.L1461
 	ldrh	r2, [r4, #40]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1458
-	ldr	r3, .L1471
+	beq	.L1462
+	ldr	r3, .L1475
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bcc	.L1458
-.L1457:
+	bcc	.L1462
+.L1461:
 	ldrh	r1, [r4, #40]
 	movw	r3, #65535
 	uxth	r6, r0
 	cmp	r1, r3
-	beq	.L1459
-	ldr	r2, .L1471
+	beq	.L1463
+	ldr	r2, .L1475
 	ldrh	r3, [r4, #2]
 	ldrh	r2, [r2, #0]
 	cmp	r2, r3
-	bhi	.L1459
+	bhi	.L1463
 	mov	r0, r5
 	movs	r2, #0
-	b	.L1460
-.L1462:
+	b	.L1464
+.L1466:
 	ldrh	lr, [r0], #2
 	cmp	lr, r1
-	beq	.L1470
+	beq	.L1474
 	adds	r2, r2, #1
 	uxth	r2, r2
-.L1460:
+.L1464:
 	cmp	r2, r7
-	bne	.L1462
-	b	.L1461
-.L1470:
+	bne	.L1466
+	b	.L1465
+.L1474:
 	mov	r6, r2
-.L1461:
-	ldr	r0, .L1471+4
+.L1465:
+	ldr	r0, .L1475+4
 	ldrh	r2, [r5, r2, lsl #1]
 	bl	printf
 	movw	r3, #65535
 	strh	r3, [r4, #40]	@ movhi
-.L1459:
+.L1463:
 	ldrh	r7, [r5, r6, lsl #1]
 	lsls	r2, r6, #1
 	cmp	r7, #0
-	beq	.L1458
+	beq	.L1462
 	ldr	r3, [r4, #32]
 	cmp	r3, #0
-	bne	.L1458
+	bne	.L1462
 	movs	r1, #1
 	str	r1, [r4, #32]
 	strh	r3, [r5, r2]	@ movhi
@@ -13024,100 +13065,100 @@ ftl_map_blk_gc:
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	ldr	r3, .L1471
+	ldr	r3, .L1475
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bcc	.L1463
+	bcc	.L1467
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L1463:
+.L1467:
 	movs	r5, #0
-	ldr	r6, .L1471+8
-	ldr	sl, .L1471+40
-	b	.L1464
-.L1468:
+	ldr	r6, .L1475+8
+	ldr	sl, .L1475+40
+	b	.L1468
+.L1472:
 	lsls	r3, r5, #2
 	str	r3, [sp, #4]
 	ldr	r3, [fp, r5, lsl #2]
 	cmp	r7, r3, lsr #10
-	bne	.L1465
+	bne	.L1469
 	ldr	r2, [sl, #0]
 	movs	r1, #1
 	str	r3, [r6, #4]
-	ldr	r0, .L1471+8
+	ldr	r0, .L1475+8
 	str	r2, [r6, #8]
-	ldr	r2, .L1471+12
+	ldr	r2, .L1475+12
 	ldr	r8, [r2, #0]
 	mov	r2, r1
 	str	r8, [r6, #12]
 	bl	FlashReadPages
 	ldrh	r3, [r8, #8]
 	cmp	r3, r5
-	beq	.L1466
-	ldr	r1, .L1471+16
+	beq	.L1470
+	ldr	r1, .L1475+16
 	movw	r2, #638
-	ldr	r0, .L1471+20
+	ldr	r0, .L1475+20
 	bl	printf
-	ldr	r0, .L1471+24
-	ldr	r1, .L1471+28
+	ldr	r0, .L1475+24
+	ldr	r1, .L1475+28
 	bl	printf
-.L1466:
-	ldr	r3, .L1471+8
+.L1470:
+	ldr	r3, .L1475+8
 	ldr	r3, [r3, #0]
 	adds	r3, r3, #1
-	bne	.L1467
+	bne	.L1471
 	ldr	r2, [sp, #4]
 	movs	r3, #0
-	ldr	r0, .L1471+32
+	ldr	r0, .L1475+32
 	str	r3, [fp, r2]
 	ldrh	r2, [r8, #8]
 	ldr	r1, [r6, #4]
 	bl	printf
-	ldr	r2, .L1471+36
+	ldr	r2, .L1475+36
 	movs	r3, #1
 	str	r3, [r2, #0]
-	b	.L1465
-.L1467:
+	b	.L1469
+.L1471:
 	mov	r0, r4
 	mov	r1, r5
 	ldr	r2, [r6, #8]
 	bl	FtlMapWritePage
-.L1465:
+.L1469:
 	adds	r5, r5, #1
 	uxth	r5, r5
-.L1464:
+.L1468:
 	ldrh	r3, [r4, #6]
 	cmp	r3, r5
-	bhi	.L1468
+	bhi	.L1472
 	mov	r0, r7
 	movs	r1, #1
 	bl	FtlFreeSysBlkQueueIn
 	movs	r3, #0
 	str	r3, [r4, #32]
-.L1458:
-	ldr	r3, .L1471
+.L1462:
+	ldr	r3, .L1475
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bcc	.L1469
+	bcc	.L1473
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L1469:
+.L1473:
 	movs	r0, #0
 	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1472:
+.L1476:
 	.align	2
-.L1471:
-	.word	.LANCHOR69
+.L1475:
+	.word	.LANCHOR57
 	.word	.LC30
 	.word	.LANCHOR198
 	.word	.LANCHOR184
 	.word	.LANCHOR212
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
 	.word	.LC31
-	.word	.LANCHOR94
+	.word	.LANCHOR82
 	.word	.LANCHOR180
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
 	.section	.text.Ftl_write_map_blk_to_last_page,"ax",%progbits
@@ -13129,28 +13170,28 @@ ftl_map_blk_gc:
 Ftl_write_map_blk_to_last_page:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1480
+	ldr	r3, .L1484
 	push	{r4, r5, r6, r7, r8, lr}
 	mov	r4, r0
 	ldr	r6, [r3, #0]
 	ldr	r5, [r0, #12]
 	ldr	r8, [r0, #24]
 	cmp	r6, #0
-	bne	.L1474
+	bne	.L1478
 	ldrh	r3, [r0, #0]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1475
+	bne	.L1479
 	ldrh	r3, [r0, #8]
-	cbz	r3, .L1476
-	ldr	r1, .L1480+4
+	cbz	r3, .L1480
+	ldr	r1, .L1484+4
 	movw	r2, #670
-	ldr	r0, .L1480+8
+	ldr	r0, .L1484+8
 	bl	printf
-	ldr	r0, .L1480+12
-	ldr	r1, .L1480+16
+	ldr	r0, .L1484+12
+	ldr	r1, .L1484+16
 	bl	printf
-.L1476:
+.L1480:
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
@@ -13162,16 +13203,16 @@ Ftl_write_map_blk_to_last_page:
 	ldr	r3, [r4, #28]
 	adds	r3, r3, #1
 	str	r3, [r4, #28]
-	b	.L1474
-.L1475:
+	b	.L1478
+.L1479:
 	ldrh	r5, [r5, r3, lsl #1]
 	movs	r1, #255
-	ldr	r2, .L1480+20
+	ldr	r2, .L1484+20
 	ldrh	r3, [r0, #2]
-	ldr	r7, .L1480+24
+	ldr	r7, .L1484+24
 	orr	r3, r3, r5, lsl #10
 	str	r3, [r2, #4]
-	ldr	r3, .L1480+28
+	ldr	r3, .L1484+28
 	ldr	r0, [r7, #0]
 	ldr	r3, [r3, #0]
 	str	r0, [r2, #8]
@@ -13183,7 +13224,7 @@ Ftl_write_map_blk_to_last_page:
 	ldrh	r2, [r4, #4]
 	strh	r5, [r3, #2]	@ movhi
 	strh	r2, [r3, #0]	@ movhi
-	ldr	r3, .L1480+32
+	ldr	r3, .L1484+32
 	ldrh	r2, [r3, #0]
 	lsls	r2, r2, #3
 	bl	memset
@@ -13191,26 +13232,26 @@ Ftl_write_map_blk_to_last_page:
 	ldr	r1, [r7, #0]
 	mov	r2, r8
 	mov	r3, r6
-	b	.L1477
-.L1479:
+	b	.L1481
+.L1483:
 	ldr	r7, [r2], #4
 	cmp	r5, r7, lsr #10
-	bne	.L1478
+	bne	.L1482
 	adds	r3, r3, #1
 	uxth	r3, r3
 	str	r6, [r1, r3, lsl #3]
 	add	r7, r1, r3, lsl #3
 	ldr	lr, [r2, #-4]
 	str	lr, [r7, #4]
-.L1478:
+.L1482:
 	adds	r6, r6, #1
-.L1477:
+.L1481:
 	uxth	r7, r6
 	cmp	r7, r0
-	bcc	.L1479
+	bcc	.L1483
 	movs	r1, #1
 	movs	r3, #0
-	ldr	r0, .L1480+20
+	ldr	r0, .L1484+20
 	mov	r2, r1
 	bl	FlashProgPages
 	ldrh	r3, [r4, #2]
@@ -13218,21 +13259,21 @@ Ftl_write_map_blk_to_last_page:
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	bl	ftl_map_blk_gc
-.L1474:
+.L1478:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1481:
+.L1485:
 	.align	2
-.L1480:
-	.word	.LANCHOR94
+.L1484:
+	.word	.LANCHOR82
 	.word	.LANCHOR213
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
 	.word	.LANCHOR198
-	.word	.LANCHOR98
+	.word	.LANCHOR86
 	.word	.LANCHOR184
-	.word	.LANCHOR69
+	.word	.LANCHOR57
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
 	.section	.text.FtlMapWritePage,"ax",%progbits
 	.align	1
@@ -13243,18 +13284,18 @@ Ftl_write_map_blk_to_last_page:
 FtlMapWritePage:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1496
+	ldr	r3, .L1500
 	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
 	mov	r4, r0
 	ldr	r6, [r3, #0]
 	stmia	sp, {r1, r2}
 	cmp	r6, #0
-	bne	.L1483
-	ldr	r8, .L1496+32
-	ldr	sl, .L1496+36
-	ldr	r5, .L1496+4
-	ldr	fp, .L1496+40
-.L1495:
+	bne	.L1487
+	ldr	r8, .L1500+32
+	ldr	sl, .L1500+36
+	ldr	r5, .L1500+4
+	ldr	fp, .L1500+40
+.L1499:
 	ldr	r3, [r8, #0]
 	ldrh	r2, [r4, #2]
 	adds	r3, r3, #1
@@ -13262,39 +13303,39 @@ FtlMapWritePage:
 	ldrh	r3, [sl, #0]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	bge	.L1485
+	bge	.L1489
 	ldrh	r3, [r4, #0]
 	movw	r1, #65535
 	cmp	r3, r1
-	bne	.L1486
-.L1485:
+	bne	.L1490
+.L1489:
 	mov	r0, r4
 	bl	Ftl_write_map_blk_to_last_page
-.L1486:
+.L1490:
 	ldrh	r2, [r4, #0]
 	ldr	r3, [r4, #12]
 	ldrh	r3, [r3, r2, lsl #1]
-	cbnz	r3, .L1487
-	ldr	r1, .L1496+8
+	cbnz	r3, .L1491
+	ldr	r1, .L1500+8
 	movw	r2, #731
-	ldr	r0, .L1496+12
+	ldr	r0, .L1500+12
 	bl	printf
-	ldr	r0, .L1496+16
-	ldr	r1, .L1496+20
+	ldr	r0, .L1500+16
+	ldr	r1, .L1500+20
 	bl	printf
-.L1487:
+.L1491:
 	ldrh	r2, [r4, #0]
 	ldrh	r3, [r4, #10]
 	cmp	r2, r3
-	bcc	.L1488
-	ldr	r1, .L1496+8
+	bcc	.L1492
+	ldr	r1, .L1500+8
 	mov	r2, #732
-	ldr	r0, .L1496+12
+	ldr	r0, .L1500+12
 	bl	printf
-	ldr	r0, .L1496+16
-	ldr	r1, .L1496+20
+	ldr	r0, .L1500+16
+	ldr	r1, .L1500+20
 	bl	printf
-.L1488:
+.L1492:
 	ldrh	r2, [r4, #0]
 	movs	r1, #0
 	ldr	r3, [r4, #12]
@@ -13311,7 +13352,7 @@ FtlMapWritePage:
 	ldr	r3, [r5, #12]
 	ldr	r2, [r4, #28]
 	ldr	r1, [sp, #0]
-	ldr	r0, .L1496+4
+	ldr	r0, .L1500+4
 	str	r2, [r3, #4]
 	ldrh	r2, [r4, #4]
 	strh	r1, [r3, #8]	@ movhi
@@ -13327,59 +13368,59 @@ FtlMapWritePage:
 	adds	r1, r3, #1
 	uxth	r2, r2
 	strh	r2, [r4, #2]	@ movhi
-	bne	.L1489
-	ldr	r0, .L1496+24
+	bne	.L1493
+	ldr	r0, .L1500+24
 	adds	r6, r6, #1
 	ldr	r1, [r5, #4]
 	bl	printf
 	ldrh	r3, [r4, #2]
 	uxth	r6, r6
 	cmp	r3, #2
-	bhi	.L1490
+	bhi	.L1494
 	ldrh	r3, [sl, #0]
 	subs	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
-.L1490:
+.L1494:
 	cmp	r6, #3
-	bls	.L1495
-	ldr	r3, .L1496+4
+	bls	.L1499
+	ldr	r3, .L1500+4
 	mov	r2, r6
-	ldr	r0, .L1496+28
+	ldr	r0, .L1500+28
 	ldr	r1, [r3, #4]
 	bl	printf
-	ldr	r3, .L1496
+	ldr	r3, .L1500
 	movs	r2, #1
 	str	r2, [r3, #0]
-	b	.L1483
-.L1489:
-	cbz	r3, .L1492
+	b	.L1487
+.L1493:
+	cbz	r3, .L1496
 	strh	r7, [r4, #40]	@ movhi
-.L1492:
+.L1496:
 	cmp	r2, #1
-	beq	.L1495
+	beq	.L1499
 	cmp	r3, #256
-	beq	.L1495
-	ldr	r3, .L1496+4
+	beq	.L1499
+	ldr	r3, .L1500+4
 	ldr	r1, [sp, #0]
 	ldr	r2, [r3, #4]
 	ldr	r3, [r4, #24]
 	str	r2, [r3, r1, lsl #2]
-.L1483:
+.L1487:
 	movs	r0, #0
 	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1497:
+.L1501:
 	.align	2
-.L1496:
-	.word	.LANCHOR94
+.L1500:
+	.word	.LANCHOR82
 	.word	.LANCHOR198
 	.word	.LANCHOR214
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
 	.word	.LC32
 	.word	.LC33
 	.word	.LANCHOR162
-	.word	.LANCHOR69
+	.word	.LANCHOR57
 	.word	.LANCHOR184
 	.size	FtlMapWritePage, .-FtlMapWritePage
 	.section	.text.FtlMapBlkWriteDumpData,"ax",%progbits
@@ -13397,31 +13438,31 @@ FtlMapBlkWriteDumpData:
 	ldrh	r6, [r0, #6]
 	ldr	r8, [r0, #24]
 	cmp	r3, #0
-	beq	.L1498
+	beq	.L1502
 	movs	r3, #0
 	str	r3, [r0, #36]
-	ldr	r3, .L1504
+	ldr	r3, .L1508
 	ldr	r3, [r3, #0]
 	cmp	r3, #0
-	bne	.L1498
-	ldr	r3, .L1504+4
-	ldr	r5, .L1504+8
+	bne	.L1502
+	ldr	r3, .L1508+4
+	ldr	r5, .L1508+8
 	ldr	r3, [r3, #0]
 	str	r3, [r5, #8]
-	ldr	r3, .L1504+12
+	ldr	r3, .L1508+12
 	ldr	r7, [r3, #0]
 	ldrh	r3, [r0, #2]
 	str	r7, [r5, #12]
-	cbz	r3, .L1500
-	ldr	r2, .L1504+16
+	cbz	r3, .L1504
+	ldr	r2, .L1508+16
 	ldrh	r2, [r2, #0]
 	subs	r2, r2, #1
 	cmp	r3, r2
-	bge	.L1500
+	bge	.L1504
 	ldrh	r2, [r0, #0]
 	movw	r1, #65535
 	cmp	r2, r1
-	beq	.L1500
+	beq	.L1504
 	ldr	r1, [r0, #12]
 	subs	r3, r3, #1
 	mov	r0, r5
@@ -13433,51 +13474,51 @@ FtlMapBlkWriteDumpData:
 	bl	FlashReadPages
 	ldr	r3, [r5, #0]
 	adds	r3, r3, #1
-	beq	.L1500
+	beq	.L1504
 	ldr	r3, [r4, #24]
 	ldrh	r1, [r7, #8]
 	ldr	r2, [r3, r1, lsl #2]
 	ldr	r3, [r5, #4]
 	cmp	r2, r3
-	bne	.L1500
+	bne	.L1504
 	mov	r0, r4
-	b	.L1503
-.L1500:
+	b	.L1507
+.L1504:
 	subs	r6, r6, #1
-	ldr	r5, .L1504+8
+	ldr	r5, .L1508+8
 	uxth	r6, r6
 	ldr	r3, [r8, r6, lsl #2]
 	str	r3, [r5, #4]
-	cbz	r3, .L1501
+	cbz	r3, .L1505
 	movs	r1, #1
 	mov	r0, r5
 	mov	r2, r1
 	bl	FlashReadPages
-	b	.L1502
-.L1501:
-	ldr	r3, .L1504+20
+	b	.L1506
+.L1505:
+	ldr	r3, .L1508+20
 	movs	r1, #255
 	ldr	r0, [r5, #8]
 	ldrh	r2, [r3, #0]
 	bl	memset
-.L1502:
+.L1506:
 	mov	r0, r4
 	mov	r1, r6
-.L1503:
+.L1507:
 	ldr	r2, [r5, #8]
 	pop	{r4, r5, r6, r7, r8, lr}
 	b	FtlMapWritePage
-.L1498:
+.L1502:
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1505:
+.L1509:
 	.align	2
-.L1504:
-	.word	.LANCHOR94
+.L1508:
+	.word	.LANCHOR82
 	.word	.LANCHOR180
 	.word	.LANCHOR198
 	.word	.LANCHOR184
-	.word	.LANCHOR69
-	.word	.LANCHOR73
+	.word	.LANCHOR57
+	.word	.LANCHOR61
 	.size	FtlMapBlkWriteDumpData, .-FtlMapBlkWriteDumpData
 	.section	.text.FtlVendorPartRead,"ax",%progbits
 	.align	1
@@ -13488,32 +13529,32 @@ FtlMapBlkWriteDumpData:
 FtlVendorPartRead:
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1517
+	ldr	r3, .L1521
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	mov	fp, r2
 	ldrh	r6, [r3, #0]
 	adds	r2, r1, r0
-	ldr	r3, .L1517+4
+	ldr	r3, .L1521+4
 	sub	sp, sp, #56
 	mov	r7, r0
 	mov	r5, r1
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bhi	.L1515
+	bhi	.L1519
 	lsr	r6, r0, r6
-	ldr	r8, .L1517+28
+	ldr	r8, .L1521+28
 	lsls	r3, r6, #2
 	str	r3, [sp, #8]
 	movs	r3, #0
 	str	r3, [sp, #4]
-	b	.L1508
-.L1514:
-	ldr	r2, .L1517+8
+	b	.L1512
+.L1518:
+	ldr	r2, .L1521+8
 	mov	r0, r7
 	ldr	r3, [r2, #0]
 	ldr	r2, [sp, #8]
 	ldr	sl, [r3, r2]
-	ldr	r3, .L1517+12
+	ldr	r3, .L1521+12
 	ldrh	r4, [r3, #0]
 	mov	r1, r4
 	bl	__aeabi_uidivmod
@@ -13525,7 +13566,7 @@ FtlVendorPartRead:
 	it	hi
 	uxthhi	r4, r5
 	cmp	sl, #0
-	beq	.L1510
+	beq	.L1514
 	ldr	r3, [r8, #0]
 	movs	r1, #1
 	mov	r2, r1
@@ -13541,32 +13582,32 @@ FtlVendorPartRead:
 	it	eq
 	moveq	r2, #-1
 	str	r2, [sp, #4]
-	ldr	r2, .L1517+16
+	ldr	r2, .L1521+16
 	ldr	r3, [r2, #0]
 	cmp	r3, #256
-	bne	.L1512
+	bne	.L1516
 	mov	r1, r6
 	mov	r2, sl
-	ldr	r0, .L1517+20
+	ldr	r0, .L1521+20
 	bl	printf
-	ldr	r0, .L1517+24
+	ldr	r0, .L1521+24
 	mov	r1, r6
 	ldr	r2, [r8, #0]
 	bl	FtlMapWritePage
-.L1512:
+.L1516:
 	ldr	r3, [sp, #12]
 	mov	r0, fp
 	ldr	r1, [r8, #0]
 	lsls	r2, r4, #9
 	add	r1, r1, r3, lsl #9
 	bl	memcpy
-	b	.L1513
-.L1510:
+	b	.L1517
+.L1514:
 	mov	r0, fp
 	mov	r1, sl
 	lsls	r2, r4, #9
 	bl	memset
-.L1513:
+.L1517:
 	ldr	r3, [sp, #8]
 	adds	r6, r6, #1
 	subs	r5, r5, r4
@@ -13574,24 +13615,24 @@ FtlVendorPartRead:
 	add	fp, fp, r4, lsl #9
 	adds	r3, r3, #4
 	str	r3, [sp, #8]
-.L1508:
+.L1512:
 	cmp	r5, #0
-	bne	.L1514
-	b	.L1507
-.L1515:
+	bne	.L1518
+	b	.L1511
+.L1519:
 	mov	r3, #-1
 	str	r3, [sp, #4]
-.L1507:
+.L1511:
 	ldr	r0, [sp, #4]
 	add	sp, sp, #56
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1518:
+.L1522:
 	.align	2
-.L1517:
-	.word	.LANCHOR72
-	.word	.LANCHOR65
+.L1521:
+	.word	.LANCHOR60
+	.word	.LANCHOR53
 	.word	.LANCHOR190
-	.word	.LANCHOR71
+	.word	.LANCHOR59
 	.word	.LANCHOR198
 	.word	.LC34
 	.word	.LANCHOR215
@@ -13608,96 +13649,96 @@ Ftl_load_ext_data:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r0, #0
-	ldr	r4, .L1523
+	ldr	r4, .L1527
 	movs	r1, #1
-	ldr	r5, .L1523+4
+	ldr	r5, .L1527+4
 	mov	r2, r4
 	bl	FtlVendorPartRead
 	ldr	r3, [r4, #0]
 	cmp	r3, r5
-	beq	.L1520
+	beq	.L1524
 	mov	r0, r4
 	movs	r1, #0
 	mov	r2, #512
 	bl	memset
 	str	r5, [r4, #0]
-.L1520:
+.L1524:
 	ldr	r2, [r4, #0]
-	ldr	r3, .L1523
+	ldr	r3, .L1527
 	cmp	r2, r5
-	bne	.L1521
+	bne	.L1525
 	ldr	r1, [r3, #88]
-	ldr	r2, .L1523+8
+	ldr	r2, .L1527+8
 	str	r1, [r2, #0]
 	ldr	r1, [r3, #92]
-	ldr	r2, .L1523+12
+	ldr	r2, .L1527+12
 	str	r1, [r2, #0]
 	ldr	r1, [r3, #8]
-	ldr	r2, .L1523+16
+	ldr	r2, .L1527+16
 	str	r1, [r2, #0]
 	ldr	r1, [r3, #12]
-	ldr	r2, .L1523+20
+	ldr	r2, .L1527+20
 	str	r1, [r2, #0]
 	ldr	r1, [r3, #16]
-	ldr	r2, .L1523+24
+	ldr	r2, .L1527+24
 	str	r1, [r2, #0]
 	ldr	r1, [r3, #20]
-	ldr	r2, .L1523+28
+	ldr	r2, .L1527+28
 	str	r1, [r2, #0]
 	ldr	r1, [r3, #28]
-	ldr	r2, .L1523+32
+	ldr	r2, .L1527+32
 	str	r1, [r2, #0]
 	ldr	r1, [r3, #32]
-	ldr	r2, .L1523+36
+	ldr	r2, .L1527+36
 	str	r1, [r2, #0]
 	ldr	r1, [r3, #36]
-	ldr	r2, .L1523+40
+	ldr	r2, .L1527+40
 	str	r1, [r2, #0]
 	ldr	r1, [r3, #40]
-	ldr	r2, .L1523+44
+	ldr	r2, .L1527+44
 	str	r1, [r2, #0]
 	ldr	r1, [r3, #44]
-	ldr	r2, .L1523+48
+	ldr	r2, .L1527+48
 	str	r1, [r2, #0]
 	ldr	r1, [r3, #48]
-	ldr	r2, .L1523+52
+	ldr	r2, .L1527+52
 	str	r1, [r2, #0]
 	ldr	r2, [r3, #60]
-	ldr	r3, .L1523+56
+	ldr	r3, .L1527+56
 	str	r2, [r3, #0]
-.L1521:
-	ldr	r3, .L1523+60
+.L1525:
+	ldr	r3, .L1527+60
 	movs	r2, #0
 	str	r2, [r3, #0]
-	ldr	r3, .L1523
+	ldr	r3, .L1527
 	ldr	r2, [r3, #68]
-	ldr	r3, .L1523+64
+	ldr	r3, .L1527+64
 	cmp	r2, r3
-	bne	.L1522
-	ldr	r3, .L1523+68
+	bne	.L1526
+	ldr	r3, .L1527+68
 	movs	r2, #1
-	ldr	r0, .L1523+72
-	ldr	r1, .L1523+76
+	ldr	r0, .L1527+72
+	ldr	r1, .L1527+76
 	str	r2, [r3, #0]
 	bl	printf
-.L1522:
-	ldr	r3, .L1523+80
+.L1526:
+	ldr	r3, .L1527+80
 	ldrh	r2, [r3, #0]
-	ldr	r3, .L1523+84
+	ldr	r3, .L1527+84
 	ldr	r0, [r3, #0]
-	ldr	r3, .L1523+32
+	ldr	r3, .L1527+32
 	ldr	r3, [r3, #0]
 	mla	r0, r0, r2, r3
-	ldr	r3, .L1523+88
+	ldr	r3, .L1527+88
 	ldrh	r1, [r3, #0]
 	bl	__aeabi_uidiv
-	ldr	r3, .L1523+92
+	ldr	r3, .L1527+92
 	str	r0, [r3, #0]
 	pop	{r3, r4, r5, pc}
-.L1524:
+.L1528:
 	.align	2
-.L1523:
-	.word	.LANCHOR144
+.L1527:
+	.word	.LANCHOR132
 	.word	1179929683
 	.word	.LANCHOR216
 	.word	.LANCHOR217
@@ -13706,7 +13747,7 @@ Ftl_load_ext_data:
 	.word	.LANCHOR163
 	.word	.LANCHOR162
 	.word	.LANCHOR165
-	.word	.LANCHOR97
+	.word	.LANCHOR85
 	.word	.LANCHOR160
 	.word	.LANCHOR161
 	.word	.LANCHOR166
@@ -13714,12 +13755,12 @@ Ftl_load_ext_data:
 	.word	.LANCHOR155
 	.word	.LANCHOR154
 	.word	305432421
-	.word	.LANCHOR128
-	.word	.LC10
+	.word	.LANCHOR116
+	.word	.LC4
 	.word	.LC35
-	.word	.LANCHOR63
+	.word	.LANCHOR51
 	.word	.LANCHOR164
-	.word	.LANCHOR55
+	.word	.LANCHOR43
 	.word	.LANCHOR211
 	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
 	.section	.text.FtlLoadEctTbl,"ax",%progbits
@@ -13732,36 +13773,36 @@ FtlLoadEctTbl:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	movs	r0, #64
-	ldr	r4, .L1527
-	ldr	r5, .L1527+4
+	movs	r0, #64
+	ldr	r4, .L1531
+	ldr	r5, .L1531+4
 	ldr	r2, [r4, #0]
 	ldrh	r1, [r5, #0]
 	bl	FtlVendorPartRead
 	ldr	r3, [r4, #0]
 	ldr	r2, [r3, #0]
-	ldr	r3, .L1527+8
+	ldr	r3, .L1531+8
 	cmp	r2, r3
-	beq	.L1526
-	ldr	r1, .L1527+12
-	ldr	r0, .L1527+16
+	beq	.L1530
+	ldr	r1, .L1531+12
+	ldr	r0, .L1531+16
 	bl	printf
 	ldrh	r2, [r5, #0]
 	ldr	r0, [r4, #0]
 	movs	r1, #0
 	lsls	r2, r2, #9
 	bl	memset
-.L1526:
+.L1530:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L1528:
+.L1532:
 	.align	2
-.L1527:
+.L1531:
 	.word	.LANCHOR187
 	.word	.LANCHOR186
 	.word	1112818501
 	.word	.LC36
-	.word	.LC10
+	.word	.LC4
 	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
 	.section	.text.FtlVendorPartWrite,"ax",%progbits
 	.align	1
@@ -13772,31 +13813,31 @@ FtlLoadEctTbl:
 FtlVendorPartWrite:
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1539
+	ldr	r3, .L1543
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	sub	sp, sp, #56
 	ldrh	sl, [r3, #0]
 	mov	r6, r0
-	ldr	r3, .L1539+4
+	ldr	r3, .L1543+4
 	mov	r4, r1
 	str	r2, [sp, #8]
 	adds	r2, r1, r0
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bhi	.L1537
+	bhi	.L1541
 	lsr	sl, r0, sl
 	mov	fp, #0
-	ldr	r7, .L1539+8
+	ldr	r7, .L1543+8
 	lsl	r3, sl, #2
 	str	r3, [sp, #4]
-	b	.L1531
-.L1536:
-	ldr	r2, .L1539+12
+	b	.L1535
+.L1540:
+	ldr	r2, .L1543+12
 	mov	r0, r6
 	ldr	r3, [r2, #0]
 	ldr	r2, [sp, #4]
 	ldr	r3, [r3, r2]
-	ldr	r2, .L1539+16
+	ldr	r2, .L1543+16
 	ldrh	r8, [r2, #0]
 	str	r3, [sp, #0]
 	mov	r1, r8
@@ -13809,9 +13850,9 @@ FtlVendorPartWrite:
 	cmp	r5, r4
 	it	hi
 	uxthhi	r5, r4
-	cbz	r3, .L1533
+	cbz	r3, .L1537
 	cmp	r5, r8
-	beq	.L1533
+	beq	.L1537
 	str	r3, [sp, #24]
 	movs	r1, #1
 	ldr	r3, [r7, #0]
@@ -13821,14 +13862,14 @@ FtlVendorPartWrite:
 	movs	r3, #0
 	str	r3, [sp, #32]
 	bl	FlashReadPages
-	b	.L1534
-.L1533:
-	ldr	r3, .L1539+20
+	b	.L1538
+.L1537:
+	ldr	r3, .L1543+20
 	movs	r1, #0
 	ldr	r0, [r7, #0]
 	ldrh	r2, [r3, #0]
 	bl	memset
-.L1534:
+.L1538:
 	ldr	r3, [sp, #12]
 	lsl	r8, r5, #9
 	ldr	r0, [r7, #0]
@@ -13839,7 +13880,7 @@ FtlVendorPartWrite:
 	adds	r6, r6, r5
 	bl	memcpy
 	mov	r1, sl
-	ldr	r0, .L1539+24
+	ldr	r0, .L1543+24
 	add	sl, sl, #1
 	ldr	r2, [r7, #0]
 	bl	FtlMapWritePage
@@ -13852,25 +13893,25 @@ FtlVendorPartWrite:
 	cmp	r0, #-1
 	it	eq
 	moveq	fp, #-1
-.L1531:
+.L1535:
 	cmp	r4, #0
-	bne	.L1536
-	b	.L1530
-.L1537:
+	bne	.L1540
+	b	.L1534
+.L1541:
 	mov	fp, #-1
-.L1530:
+.L1534:
 	mov	r0, fp
 	add	sp, sp, #56
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1540:
+.L1544:
 	.align	2
-.L1539:
-	.word	.LANCHOR72
-	.word	.LANCHOR65
+.L1543:
+	.word	.LANCHOR60
+	.word	.LANCHOR53
 	.word	.LANCHOR181
 	.word	.LANCHOR190
-	.word	.LANCHOR71
-	.word	.LANCHOR73
+	.word	.LANCHOR59
+	.word	.LANCHOR61
 	.word	.LANCHOR215
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.section	.text.Ftl_save_ext_data,"ax",%progbits
@@ -13883,64 +13924,64 @@ Ftl_save_ext_data:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L1543
-	ldr	r3, .L1543+4
+	ldr	r2, .L1547
+	ldr	r3, .L1547+4
 	ldr	r1, [r2, #0]
 	cmp	r1, r3
-	bne	.L1541
-	ldr	r3, .L1543+8
+	bne	.L1545
+	ldr	r3, .L1547+8
 	movs	r0, #0
 	movs	r1, #1
 	str	r3, [r2, #4]
-	ldr	r3, .L1543+12
+	ldr	r3, .L1547+12
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #88]
-	ldr	r3, .L1543+16
+	ldr	r3, .L1547+16
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #92]
-	ldr	r3, .L1543+20
+	ldr	r3, .L1547+20
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #8]
-	ldr	r3, .L1543+24
+	ldr	r3, .L1547+24
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #12]
-	ldr	r3, .L1543+28
+	ldr	r3, .L1547+28
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #16]
-	ldr	r3, .L1543+32
+	ldr	r3, .L1547+32
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #20]
-	ldr	r3, .L1543+36
+	ldr	r3, .L1547+36
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #28]
-	ldr	r3, .L1543+40
+	ldr	r3, .L1547+40
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #32]
-	ldr	r3, .L1543+44
+	ldr	r3, .L1547+44
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #36]
-	ldr	r3, .L1543+48
+	ldr	r3, .L1547+48
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #40]
-	ldr	r3, .L1543+52
+	ldr	r3, .L1547+52
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #44]
-	ldr	r3, .L1543+56
+	ldr	r3, .L1547+56
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #48]
-	ldr	r3, .L1543+60
+	ldr	r3, .L1547+60
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #60]
-	ldr	r3, .L1543+64
+	ldr	r3, .L1547+64
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #64]
 	b	FtlVendorPartWrite
-.L1541:
+.L1545:
 	bx	lr
-.L1544:
+.L1548:
 	.align	2
-.L1543:
-	.word	.LANCHOR144
+.L1547:
+	.word	.LANCHOR132
 	.word	1179929683
 	.word	1342177351
 	.word	.LANCHOR216
@@ -13950,7 +13991,7 @@ Ftl_save_ext_data:
 	.word	.LANCHOR163
 	.word	.LANCHOR162
 	.word	.LANCHOR165
-	.word	.LANCHOR97
+	.word	.LANCHOR85
 	.word	.LANCHOR160
 	.word	.LANCHOR161
 	.word	.LANCHOR166
@@ -13968,43 +14009,43 @@ FtlEctTblFlush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L1552
+	ldr	r3, .L1556
 	ldr	r3, [r3, #0]
-	cbz	r3, .L1550
-	ldr	r3, .L1552+4
+	cbz	r3, .L1554
+	ldr	r3, .L1556+4
 	ldr	r3, [r3, #0]
 	cmp	r3, #29
 	ite	ls
 	movls	r3, #4
 	movhi	r3, #32
-	b	.L1546
-.L1550:
+	b	.L1550
+.L1554:
 	movs	r3, #32
-.L1546:
-	ldr	r2, .L1552+8
+.L1550:
+	ldr	r2, .L1556+8
 	ldrh	r1, [r2, #0]
 	cmp	r1, #31
-	bhi	.L1547
+	bhi	.L1551
 	movs	r3, #1
 	adds	r1, r1, #1
 	strh	r1, [r2, #0]	@ movhi
-.L1547:
-	ldr	r2, .L1552+12
-	cbnz	r0, .L1548
+.L1551:
+	ldr	r2, .L1556+12
+	cbnz	r0, .L1552
 	ldr	r1, [r2, #0]
 	ldr	r0, [r1, #20]
 	ldr	r1, [r1, #16]
 	adds	r3, r3, r0
 	cmp	r1, r3
-	bcc	.L1549
-.L1548:
+	bcc	.L1553
+.L1552:
 	ldr	r2, [r2, #0]
 	movs	r0, #64
 	ldr	r3, [r2, #16]
 	str	r3, [r2, #20]
-	ldr	r3, .L1552+16
+	ldr	r3, .L1556+16
 	str	r3, [r2, #0]
-	ldr	r3, .L1552+20
+	ldr	r3, .L1556+20
 	ldrh	r1, [r3, #0]
 	lsls	r3, r1, #9
 	str	r3, [r2, #12]
@@ -14015,13 +14056,13 @@ FtlEctTblFlush:
 	str	r3, [r2, #4]
 	bl	FtlVendorPartWrite
 	bl	Ftl_save_ext_data
-.L1549:
+.L1553:
 	movs	r0, #0
 	pop	{r3, pc}
-.L1553:
+.L1557:
 	.align	2
-.L1552:
-	.word	.LANCHOR128
+.L1556:
+	.word	.LANCHOR116
 	.word	.LANCHOR167
 	.word	.LANCHOR218
 	.word	.LANCHOR187
@@ -14040,8 +14081,8 @@ flush_l2p_region:
 	push	{r3, r4, r5, lr}
 	movs	r4, #12
 	muls	r4, r0, r4
-	ldr	r5, .L1555
-	ldr	r0, .L1555+4
+	ldr	r5, .L1559
+	ldr	r0, .L1559+4
 	ldr	r2, [r5, #0]
 	adds	r3, r2, r4
 	ldrh	r1, [r2, r4]
@@ -14054,11 +14095,11 @@ flush_l2p_region:
 	bic	r3, r3, #-2147483648
 	str	r3, [r4, #4]
 	pop	{r3, r4, r5, pc}
-.L1556:
+.L1560:
 	.align	2
-.L1555:
-	.word	.LANCHOR114
-	.word	.LANCHOR122
+.L1559:
+	.word	.LANCHOR102
+	.word	.LANCHOR110
 	.size	flush_l2p_region, .-flush_l2p_region
 	.section	.text.l2p_flush,"ax",%progbits
 	.align	1
@@ -14071,32 +14112,32 @@ l2p_flush:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r4, #0
-	ldr	r7, .L1561
+	ldr	r7, .L1565
 	movs	r5, #12
-	ldr	r6, .L1561+4
-	b	.L1558
-.L1560:
+	ldr	r6, .L1565+4
+	b	.L1562
+.L1564:
 	ldr	r3, [r6, #0]
 	mla	r3, r5, r4, r3
 	ldr	r3, [r3, #4]
 	cmp	r3, #0
-	bge	.L1559
+	bge	.L1563
 	mov	r0, r4
 	bl	flush_l2p_region
-.L1559:
+.L1563:
 	adds	r4, r4, #1
 	uxth	r4, r4
-.L1558:
+.L1562:
 	ldrh	r3, [r7, #0]
 	cmp	r3, r4
-	bhi	.L1560
+	bhi	.L1564
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1562:
+.L1566:
 	.align	2
-.L1561:
-	.word	.LANCHOR83
-	.word	.LANCHOR114
+.L1565:
+	.word	.LANCHOR71
+	.word	.LANCHOR102
 	.size	l2p_flush, .-l2p_flush
 	.section	.text.allocate_new_data_superblock,"ax",%progbits
 	.align	1
@@ -14107,123 +14148,123 @@ l2p_flush:
 allocate_new_data_superblock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1576
+	ldr	r3, .L1580
 	push	{r4, r5, r6, lr}
 	mov	r4, r0
 	ldrh	r5, [r0, #0]
 	ldrh	r3, [r3, #0]
 	cmp	r3, r5
-	bcs	.L1564
-	ldr	r1, .L1576+4
-	movw	r2, #2936
-	ldr	r0, .L1576+8
+	bcs	.L1568
+	ldr	r1, .L1580+4
+	movw	r2, #2939
+	ldr	r0, .L1580+8
 	bl	printf
-	ldr	r0, .L1576+12
-	ldr	r1, .L1576+16
+	ldr	r0, .L1580+12
+	ldr	r1, .L1580+16
 	bl	printf
-.L1564:
-	ldr	r3, .L1576+20
+.L1568:
+	ldr	r3, .L1580+20
 	ldr	r3, [r3, #0]
 	cmp	r3, #0
-	bne	.L1565
+	bne	.L1569
 	movw	r3, #65535
 	cmp	r5, r3
-	beq	.L1566
-	ldr	r3, .L1576+24
+	beq	.L1570
+	ldr	r3, .L1580+24
 	mov	r0, r5
 	ldr	r3, [r3, #0]
 	ldrh	r3, [r3, r5, lsl #1]
-	cbz	r3, .L1567
+	cbz	r3, .L1571
 	bl	INSERT_DATA_LIST
-	b	.L1566
-.L1567:
+	b	.L1570
+.L1571:
 	bl	INSERT_FREE_LIST
-.L1566:
+.L1570:
 	movs	r3, #0
 	strb	r3, [r4, #8]
-	ldr	r3, .L1576+28
+	ldr	r3, .L1580+28
 	cmp	r4, r3
-	beq	.L1568
-	ldr	r3, .L1576+32
+	beq	.L1572
+	ldr	r3, .L1580+32
 	ldrh	r3, [r3, #0]
 	cmp	r3, #1
-	beq	.L1568
-	ldr	r2, .L1576+36
+	beq	.L1572
+	ldr	r2, .L1580+36
 	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	cbz	r2, .L1569
-.L1568:
+	cbz	r2, .L1573
+.L1572:
 	movs	r3, #1
 	strb	r3, [r4, #8]
-	b	.L1570
-.L1569:
-	ldr	r2, .L1576+40
+	b	.L1574
+.L1573:
+	ldr	r2, .L1580+40
 	cmp	r4, r2
-	bne	.L1570
+	bne	.L1574
 	cmp	r3, #3
-	beq	.L1571
-	ldr	r3, .L1576+44
+	beq	.L1575
+	ldr	r3, .L1580+44
 	ldr	r3, [r3, #0]
 	cmp	r3, #1
-	bne	.L1572
-.L1571:
+	bne	.L1576
+.L1575:
 	movs	r3, #1
 	strb	r3, [r2, #8]
-.L1572:
-	ldr	r3, .L1576+48
+.L1576:
+	ldr	r3, .L1580+48
 	ldr	r3, [r3, #0]
-	cbz	r3, .L1570
-	ldr	r3, .L1576+52
+	cbz	r3, .L1574
+	ldr	r3, .L1580+52
 	ldr	r3, [r3, #0]
 	cmp	r3, #29
-	bhi	.L1570
-	ldr	r3, .L1576+40
+	bhi	.L1574
+	ldr	r3, .L1580+40
 	movs	r2, #1
 	strb	r2, [r3, #8]
-.L1570:
-	ldr	r6, .L1576+56
+.L1574:
+	ldr	r6, .L1580+56
 	movw	r3, #65535
 	ldrh	r0, [r6, #0]
 	cmp	r0, r3
-	beq	.L1573
+	beq	.L1577
 	cmp	r5, r0
-	bne	.L1574
-	ldr	r3, .L1576+24
+	bne	.L1578
+	ldr	r3, .L1580+24
 	ldr	r3, [r3, #0]
 	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L1575
-.L1574:
+	cbz	r3, .L1579
+.L1578:
 	bl	update_vpc_list
-.L1575:
+.L1579:
 	movw	r3, #65535
 	strh	r3, [r6, #0]	@ movhi
-.L1573:
+.L1577:
 	mov	r0, r4
 	bl	allocate_data_superblock
 	bl	l2p_flush
 	movs	r0, #0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1565:
+.L1569:
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L1577:
+.L1581:
 	.align	2
-.L1576:
-	.word	.LANCHOR55
+.L1580:
+	.word	.LANCHOR43
 	.word	.LANCHOR219
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.word	.LANCHOR94
-	.word	.LANCHOR101
-	.word	.LANCHOR110
-	.word	.LANCHOR59
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
+	.word	.LANCHOR82
+	.word	.LANCHOR89
+	.word	.LANCHOR98
+	.word	.LANCHOR47
 	.word	.LANCHOR7
-	.word	.LANCHOR109
+	.word	.LANCHOR97
 	.word	.LANCHOR155
-	.word	.LANCHOR128
+	.word	.LANCHOR116
 	.word	.LANCHOR167
-	.word	.LANCHOR138
+	.word	.LANCHOR126
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
 	.section	.text.FtlMapTblRecovery,"ax",%progbits
 	.align	1
@@ -14247,17 +14288,17 @@ FtlMapTblRecovery:
 	lsl	r2, sl, #2
 	str	r0, [sp, #12]
 	mov	r0, fp
-	ldr	r6, .L1615
+	ldr	r6, .L1619
 	str	r3, [sp, #16]
 	bl	memset
-	ldr	r1, .L1615+4
+	ldr	r1, .L1619+4
 	movs	r2, #0
 	mov	r8, r2
 	str	r2, [r4, #32]
 	str	r2, [r4, #28]
 	ldr	r3, [r1, #0]
 	str	r3, [r6, #8]
-	ldr	r3, .L1615+8
+	ldr	r3, .L1619+8
 	ldr	r5, [r3, #0]
 	movw	r3, #65535
 	str	r5, [r6, #12]
@@ -14270,12 +14311,12 @@ FtlMapTblRecovery:
 	mov	r3, fp
 	mov	fp, sl
 	mov	sl, r4
-	b	.L1579
-.L1593:
+	b	.L1583
+.L1597:
 	ldr	r0, [sp, #16]
 	subs	r2, r0, #1
 	cmp	r8, r2
-	bne	.L1580
+	bne	.L1584
 	sxth	r6, r1
 	mov	r7, r1
 	ldr	r1, [sp, #12]
@@ -14287,7 +14328,7 @@ FtlMapTblRecovery:
 	movs	r1, #1
 	bl	FtlGetLastWrittenPage
 	strh	r7, [r4, #0]	@ movhi
-	ldr	r7, .L1615
+	ldr	r7, .L1619
 	uxth	r3, r0
 	ldr	r0, [sp, #20]
 	adds	r2, r3, #1
@@ -14296,11 +14337,11 @@ FtlMapTblRecovery:
 	ldr	r2, [r0, r6, lsl #2]
 	movs	r6, #0
 	str	r2, [r4, #28]
-	b	.L1581
-.L1584:
+	b	.L1585
+.L1588:
 	ldrh	r2, [r8, #0]
 	movs	r1, #1
-	ldr	r0, .L1615
+	ldr	r0, .L1619
 	orr	r2, r6, r2, lsl #10
 	str	r2, [r7, #4]
 	mov	r2, r1
@@ -14309,35 +14350,35 @@ FtlMapTblRecovery:
 	ldr	r2, [r7, #0]
 	ldr	r3, [sp, #8]
 	adds	r2, r2, #1
-	beq	.L1582
+	beq	.L1586
 	ldrh	r2, [r5, #8]
 	cmp	r2, sl
-	bcs	.L1583
+	bcs	.L1587
 	ldrh	r0, [r5, #0]
 	ldrh	r1, [r4, #4]
 	cmp	r0, r1
-	bne	.L1583
+	bne	.L1587
 	ldr	r1, [r7, #4]
 	str	r1, [fp, r2, lsl #2]
-	b	.L1583
-.L1582:
+	b	.L1587
+.L1586:
 	ldrh	r2, [r8, #0]
 	strh	r2, [r4, #40]	@ movhi
-.L1583:
+.L1587:
 	adds	r6, r6, #1
-.L1581:
+.L1585:
 	sxth	r2, r6
 	cmp	r3, r2
-	bge	.L1584
-	b	.L1585
-.L1580:
-	ldr	r1, .L1615+4
-	ldr	r0, .L1615+12
+	bge	.L1588
+	b	.L1589
+.L1584:
+	ldr	r1, .L1619+4
+	ldr	r0, .L1619+12
 	ldr	r2, [r1, #0]
 	ldrh	r1, [r7], #2
 	str	r2, [r6, #8]
 	ldrh	r2, [r0, #0]
-	ldr	r0, .L1615
+	ldr	r0, .L1619
 	subs	r2, r2, #1
 	orr	r2, r2, r1, lsl #10
 	movs	r1, #1
@@ -14348,24 +14389,24 @@ FtlMapTblRecovery:
 	ldr	r2, [r6, #0]
 	ldr	r3, [sp, #8]
 	adds	r2, r2, #1
-	beq	.L1606
+	beq	.L1610
 	ldrh	r1, [r5, #0]
 	ldrh	r2, [sl, #4]
 	cmp	r1, r2
-	bne	.L1606
+	bne	.L1610
 	ldrh	r2, [r5, #8]
 	movw	r1, #64245
 	cmp	r2, r1
-	bne	.L1606
-	ldr	r2, .L1615+12
+	bne	.L1610
+	ldr	r2, .L1619+12
 	movs	r1, #0
-	ldr	r0, .L1615+4
+	ldr	r0, .L1619+4
 	mov	lr, r3
 	ldrh	r4, [r2, #0]
 	ldr	r2, [r0, #0]
 	subs	r4, r4, #1
-	b	.L1587
-.L1589:
+	b	.L1591
+.L1593:
 	ldrh	r0, [r2, #0]
 	cmp	r0, fp
 	itt	cc
@@ -14373,15 +14414,15 @@ FtlMapTblRecovery:
 	strcc	r3, [lr, r0, lsl #2]
 	adds	r1, r1, #1
 	adds	r2, r2, #8
-.L1587:
+.L1591:
 	cmp	r1, r4
-	blt	.L1589
+	blt	.L1593
 	mov	r3, lr
-	b	.L1590
-.L1592:
+	b	.L1594
+.L1596:
 	ldrh	r2, [r7, #-2]
 	movs	r1, #1
-	ldr	r0, .L1615
+	ldr	r0, .L1619
 	orr	r2, r4, r2, lsl #10
 	str	r2, [r6, #4]
 	mov	r2, r1
@@ -14390,95 +14431,95 @@ FtlMapTblRecovery:
 	ldr	r2, [r6, #0]
 	ldr	ip, [sp, #8]
 	adds	r2, r2, #1
-	beq	.L1591
+	beq	.L1595
 	ldrh	r2, [r5, #8]
 	cmp	r2, fp
-	bcs	.L1591
+	bcs	.L1595
 	ldrh	r1, [sl, #4]
 	ldrh	r0, [r5, #0]
 	cmp	r0, r1
 	itt	eq
 	ldreq	r1, [r6, #4]
 	streq	r1, [r8, r2, lsl #2]
-.L1591:
+.L1595:
 	adds	r4, r4, #1
-	b	.L1610
-.L1606:
+	b	.L1614
+.L1610:
 	mov	ip, r8
 	movs	r4, #0
 	mov	r8, r3
-.L1610:
-	ldr	r1, .L1615+12
+.L1614:
+	ldr	r1, .L1619+12
 	ldrh	r2, [r1, #0]
 	cmp	r4, r2
-	blt	.L1592
+	blt	.L1596
 	mov	r3, r8
 	mov	r8, ip
-.L1590:
+.L1594:
 	add	r8, r8, #1
-.L1579:
+.L1583:
 	ldr	r2, [sp, #16]
 	uxth	r1, r8
 	cmp	r8, r2
-	blt	.L1593
+	blt	.L1597
 	mov	r4, sl
-.L1585:
-	ldr	r3, .L1615+16
+.L1589:
+	ldr	r3, .L1619+16
 	cmp	r4, r3
-	bne	.L1594
-	ldr	r3, .L1615+20
+	bne	.L1598
+	ldr	r3, .L1619+20
 	ldrh	r3, [r3, #0]
 	cmp	r3, #0
-	bne	.L1607
-	b	.L1594
-.L1601:
+	bne	.L1611
+	b	.L1598
+.L1605:
 	ldr	r3, [r8, #0]
 	lsls	r4, r7, #2
 	ldr	r3, [r3, r7, lsl #2]
 	subs	r2, r3, #1
 	adds	r2, r2, #3
-	bhi	.L1596
+	bhi	.L1600
 	ldr	r2, [r6, #0]
 	ldr	r2, [r2, r7, lsl #2]
 	cmp	r3, r2
-	beq	.L1596
-	ldr	r0, .L1615+4
+	beq	.L1600
+	ldr	r0, .L1619+4
 	movs	r1, #1
 	str	r3, [sl, #4]
 	ldr	r2, [r0, #0]
-	ldr	r0, .L1615
+	ldr	r0, .L1619
 	str	r2, [sl, #8]
-	ldr	r2, .L1615+8
+	ldr	r2, .L1619+8
 	ldr	r5, [r2, #0]
 	mov	r2, r1
 	str	r5, [sl, #12]
 	bl	FlashReadPages
 	ldr	r3, [sl, #0]
 	adds	r3, r3, #1
-	beq	.L1609
-	ldr	r3, .L1615+16
+	beq	.L1613
+	ldr	r3, .L1619+16
 	ldrh	r2, [r5, #0]
 	ldrh	r3, [r3, #4]
 	cmp	r2, r3
-	bne	.L1609
+	bne	.L1613
 	ldr	fp, [r5, #4]
-	b	.L1597
-.L1609:
+	b	.L1601
+.L1613:
 	mov	fp, #0
-.L1597:
+.L1601:
 	ldr	r3, [r6, #0]
 	movs	r1, #1
 	mov	r2, r1
-	ldr	r0, .L1615
+	ldr	r0, .L1619
 	ldr	r3, [r3, r4]
 	str	r3, [sl, #4]
 	bl	FlashReadPages
 	ldr	r1, [r5, #4]
 	cmp	fp, r1
-	bls	.L1596
+	bls	.L1600
 	ldr	r2, [r8, #0]
 	ldr	r3, [r6, #0]
-	ldr	r0, .L1615+24
+	ldr	r0, .L1619+24
 	str	r1, [sp, #0]
 	ldr	r1, [r2, r4]
 	ldr	r2, [r3, r4]
@@ -14490,65 +14531,65 @@ FtlMapTblRecovery:
 	str	r1, [r2, r4]
 	movs	r2, #0
 	ldr	r0, [r3, r4]
-	ldr	r3, .L1615+28
+	ldr	r3, .L1619+28
 	ubfx	r0, r0, #10, #16
 	ldr	r1, [sp, #12]
 	ldrh	r3, [r3, #0]
-	b	.L1598
-.L1599:
+	b	.L1602
+.L1603:
 	ldrh	r4, [r1], #2
 	adds	r2, r2, #1
 	cmp	r4, r0
-	beq	.L1596
-.L1598:
+	beq	.L1600
+.L1602:
 	cmp	r2, r3
-	blt	.L1599
-	b	.L1613
-.L1614:
+	blt	.L1603
+	b	.L1617
+.L1618:
 	ldr	r1, [sp, #12]
 	strh	r0, [r1, r3, lsl #1]	@ movhi
-	ldr	r3, .L1615+28
+	ldr	r3, .L1619+28
 	ldrh	r2, [r3, #0]
 	adds	r2, r2, #1
 	strh	r2, [r3, #0]	@ movhi
 	bl	remove_from_free_sys_Queue
-.L1596:
+.L1600:
 	adds	r7, r7, #1
-	b	.L1595
-.L1616:
+	b	.L1599
+.L1620:
 	.align	2
-.L1615:
+.L1619:
 	.word	.LANCHOR198
-	.word	.LANCHOR98
+	.word	.LANCHOR86
 	.word	.LANCHOR184
-	.word	.LANCHOR69
-	.word	.LANCHOR122
-	.word	.LANCHOR85
+	.word	.LANCHOR57
+	.word	.LANCHOR110
+	.word	.LANCHOR73
 	.word	.LC37
-	.word	.LANCHOR123
-.L1607:
-	ldr	r8, .L1617+16
+	.word	.LANCHOR111
+.L1611:
+	ldr	r8, .L1621+16
 	movs	r7, #0
-	ldr	r6, .L1617
-	ldr	sl, .L1617+20
+	ldr	r6, .L1621
+	ldr	sl, .L1621+20
 	str	r4, [sp, #16]
-.L1595:
-	ldr	r2, .L1617+4
+.L1599:
+	ldr	r2, .L1621+4
 	ldrh	r3, [r2, #0]
 	cmp	r7, r3
-	bcc	.L1601
+	bcc	.L1605
 	ldr	r4, [sp, #16]
-.L1594:
+.L1598:
 	mov	r0, r4
 	bl	ftl_free_no_use_map_blk
-	ldr	r3, .L1617+8
+	ldr	r3, .L1621+8
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bne	.L1602
+	bne	.L1606
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L1602:
+.L1606:
 	mov	r0, r4
 	bl	ftl_map_blk_gc
 	mov	r0, r4
@@ -14556,19 +14597,19 @@ FtlMapTblRecovery:
 	movs	r0, #0
 	add	sp, sp, #24
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1613:
-	ldr	r2, .L1617+12
+.L1617:
+	ldr	r2, .L1621+12
 	ldr	r2, [r2, #0]
 	cmp	r3, r2
-	bcs	.L1596
-	b	.L1614
-.L1618:
+	bcs	.L1600
+	b	.L1618
+.L1622:
 	.align	2
-.L1617:
-	.word	.LANCHOR126
-	.word	.LANCHOR82
-	.word	.LANCHOR69
-	.word	.LANCHOR80
+.L1621:
+	.word	.LANCHOR114
+	.word	.LANCHOR70
+	.word	.LANCHOR57
+	.word	.LANCHOR68
 	.word	.LANCHOR191
 	.word	.LANCHOR198
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
@@ -14583,14 +14624,14 @@ FtlLoadMapInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	FtlL2PDataInit
-	ldr	r0, .L1620
+	ldr	r0, .L1624
 	bl	FtlMapTblRecovery
 	movs	r0, #0
 	pop	{r3, pc}
-.L1621:
+.L1625:
 	.align	2
-.L1620:
-	.word	.LANCHOR122
+.L1624:
+	.word	.LANCHOR110
 	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
 	.section	.text.FtlLoadVonderInfo,"ax",%progbits
 	.align	1
@@ -14602,28 +14643,28 @@ FtlLoadVonderInfo:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L1623
-	ldr	r0, .L1623+4
+	ldr	r3, .L1627
+	ldr	r0, .L1627+4
 	ldrh	r3, [r3, #0]
 	strh	r3, [r0, #10]	@ movhi
 	movw	r3, #61574
 	strh	r3, [r0, #4]	@ movhi
-	ldr	r3, .L1623+8
+	ldr	r3, .L1627+8
 	ldrh	r3, [r3, #0]
 	strh	r3, [r0, #8]	@ movhi
-	ldr	r3, .L1623+12
+	ldr	r3, .L1627+12
 	ldrh	r3, [r3, #0]
 	strh	r3, [r0, #6]	@ movhi
-	ldr	r3, .L1623+16
+	ldr	r3, .L1627+16
 	ldr	r3, [r3, #0]
 	str	r3, [r0, #12]
-	ldr	r3, .L1623+20
+	ldr	r3, .L1627+20
 	ldr	r3, [r3, #0]
 	str	r3, [r0, #16]
-	ldr	r3, .L1623+24
+	ldr	r3, .L1627+24
 	ldr	r3, [r3, #0]
 	str	r3, [r0, #20]
-	ldr	r3, .L1623+28
+	ldr	r3, .L1627+28
 	ldr	r3, [r3, #0]
 	str	r3, [r0, #24]
 	movw	r3, #65535
@@ -14631,14 +14672,14 @@ FtlLoadVonderInfo:
 	bl	FtlMapTblRecovery
 	movs	r0, #0
 	pop	{r3, pc}
-.L1624:
+.L1628:
 	.align	2
-.L1623:
-	.word	.LANCHOR77
+.L1627:
+	.word	.LANCHOR65
 	.word	.LANCHOR215
-	.word	.LANCHOR86
-	.word	.LANCHOR78
-	.word	.LANCHOR87
+	.word	.LANCHOR74
+	.word	.LANCHOR66
+	.word	.LANCHOR75
 	.word	.LANCHOR189
 	.word	.LANCHOR188
 	.word	.LANCHOR190
@@ -14654,42 +14695,42 @@ load_l2p_region:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, sl, lr}
 	mov	r4, r0
-	ldr	r3, .L1631
+	ldr	r3, .L1635
 	mov	r7, r1
 	ldrh	r3, [r3, #0]
 	cmp	r3, r0
-	bcs	.L1626
-	ldr	r1, .L1631+4
+	bcs	.L1630
+	ldr	r1, .L1635+4
 	movw	r2, #503
-	ldr	r0, .L1631+8
+	ldr	r0, .L1635+8
 	bl	printf
-	ldr	r0, .L1631+12
-	ldr	r1, .L1631+16
+	ldr	r0, .L1635+12
+	ldr	r1, .L1635+16
 	bl	printf
-.L1626:
-	ldr	r3, .L1631+20
-	ldr	r8, .L1631+44
+.L1630:
+	ldr	r3, .L1635+20
+	ldr	r8, .L1635+44
 	ldr	r3, [r3, #0]
 	ldr	r6, [r3, r4, lsl #2]
 	movs	r3, #12
-	cbnz	r6, .L1627
+	cbnz	r6, .L1631
 	muls	r7, r3, r7
 	ldr	r3, [r8, #0]
 	movs	r1, #255
 	adds	r3, r3, r7
 	ldr	r0, [r3, #8]
-	ldr	r3, .L1631+24
+	ldr	r3, .L1635+24
 	ldrh	r2, [r3, #0]
 	bl	memset
 	ldr	r3, [r8, #0]
 	adds	r2, r3, r7
 	strh	r4, [r3, r7]	@ movhi
 	str	r6, [r2, #4]
-	b	.L1628
-.L1627:
+	b	.L1632
+.L1631:
 	muls	r7, r3, r7
 	ldr	r3, [r8, #0]
-	ldr	r5, .L1631+28
+	ldr	r5, .L1635+28
 	movs	r1, #1
 	adds	r3, r3, r7
 	mov	r2, r1
@@ -14697,62 +14738,62 @@ load_l2p_region:
 	ldr	r3, [r3, #8]
 	str	r6, [r5, #4]
 	str	r3, [r5, #8]
-	ldr	r3, .L1631+32
+	ldr	r3, .L1635+32
 	ldr	r3, [r3, #0]
 	str	r3, [r5, #12]
 	bl	FlashReadPages
 	ldr	r3, [r5, #0]
 	ldr	sl, [r5, #12]
 	cmp	r3, #256
-	bne	.L1629
+	bne	.L1633
 	mov	r2, r6
 	mov	r1, r4
-	ldr	r0, .L1631+36
+	ldr	r0, .L1635+36
 	lsrs	r6, r6, #10
 	bl	printf
 	ldr	r3, [r8, #0]
-	ldr	r0, .L1631+40
+	ldr	r0, .L1635+40
 	mov	r1, r4
 	adds	r3, r3, r7
 	strh	r6, [r0, #40]	@ movhi
 	ldr	r2, [r3, #8]
 	bl	FtlMapWritePage
-.L1629:
+.L1633:
 	ldrh	r3, [sl, #8]
 	cmp	r3, r4
-	beq	.L1630
-	ldr	r1, .L1631+4
+	beq	.L1634
+	ldr	r1, .L1635+4
 	movw	r2, #529
-	ldr	r0, .L1631+8
+	ldr	r0, .L1635+8
 	bl	printf
-	ldr	r0, .L1631+12
-	ldr	r1, .L1631+16
+	ldr	r0, .L1635+12
+	ldr	r1, .L1635+16
 	bl	printf
-.L1630:
-	ldr	r3, .L1631+44
+.L1634:
+	ldr	r3, .L1635+44
 	movs	r1, #0
 	ldr	r3, [r3, #0]
 	adds	r2, r3, r7
 	strh	r4, [r3, r7]	@ movhi
 	str	r1, [r2, #4]
-.L1628:
+.L1632:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
-.L1632:
+.L1636:
 	.align	2
-.L1631:
-	.word	.LANCHOR82
+.L1635:
+	.word	.LANCHOR70
 	.word	.LANCHOR220
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.word	.LANCHOR126
-	.word	.LANCHOR73
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
+	.word	.LANCHOR114
+	.word	.LANCHOR61
 	.word	.LANCHOR198
 	.word	.LANCHOR184
 	.word	.LC38
-	.word	.LANCHOR122
-	.word	.LANCHOR114
+	.word	.LANCHOR110
+	.word	.LANCHOR102
 	.size	load_l2p_region, .-load_l2p_region
 	.section	.text.log2phys,"ax",%progbits
 	.align	1
@@ -14763,7 +14804,7 @@ load_l2p_region:
 log2phys:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1643
+	ldr	r3, .L1647
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r5, #1
 	ldrh	r3, [r3, #0]
@@ -14772,76 +14813,76 @@ log2phys:
 	adds	r3, r3, #7
 	lsr	r4, r0, r3
 	lsl	r5, r5, r3
-	ldr	r3, .L1643+4
+	ldr	r3, .L1647+4
 	subs	r5, r5, #1
 	ands	r5, r5, r0
 	uxth	r4, r4
 	ldr	r3, [r3, #0]
 	uxth	r5, r5
 	cmp	r0, r3
-	bcc	.L1634
-	ldr	r1, .L1643+8
+	bcc	.L1638
+	ldr	r1, .L1647+8
 	movw	r2, #851
-	ldr	r0, .L1643+12
+	ldr	r0, .L1647+12
 	bl	printf
-	ldr	r0, .L1643+16
-	ldr	r1, .L1643+20
+	ldr	r0, .L1647+16
+	ldr	r1, .L1647+20
 	bl	printf
-.L1634:
-	ldr	r3, .L1643+24
+.L1638:
+	ldr	r3, .L1647+24
 	ldrh	r1, [r3, #0]
-	ldr	r3, .L1643+28
+	ldr	r3, .L1647+28
 	ldr	r2, [r3, #0]
 	movs	r3, #0
 	mov	r8, r3
-	b	.L1635
-.L1641:
+	b	.L1639
+.L1645:
 	adds	r3, r3, #12
 	adds	r0, r2, r3
 	ldrh	r0, [r0, #-12]
 	cmp	r0, r4
-	bne	.L1636
-.L1637:
-	ldr	r2, .L1643+28
+	bne	.L1640
+.L1641:
+	ldr	r2, .L1647+28
 	movs	r3, #12
 	ldr	r2, [r2, #0]
 	mla	r3, r3, r8, r2
-	cbnz	r7, .L1638
+	cbnz	r7, .L1642
 	ldr	r3, [r3, #8]
 	ldr	r3, [r3, r5, lsl #2]
 	str	r3, [r6, #0]
-	b	.L1639
-.L1638:
+	b	.L1643
+.L1642:
 	ldr	r1, [r6, #0]
 	ldr	r2, [r3, #8]
 	str	r1, [r2, r5, lsl #2]
 	ldr	r2, [r3, #4]
 	orr	r2, r2, #-2147483648
 	str	r2, [r3, #4]
-	ldr	r3, .L1643+32
+	ldr	r3, .L1647+32
 	strh	r4, [r3, #0]	@ movhi
-.L1639:
-	ldr	r3, .L1643+28
+.L1643:
+	ldr	r3, .L1647+28
 	movs	r2, #12
 	ldr	r3, [r3, #0]
 	mla	r3, r2, r8, r3
 	ldr	r2, [r3, #4]
 	adds	r0, r2, #1
-	beq	.L1640
+	beq	.L1644
 	adds	r2, r2, #1
 	str	r2, [r3, #4]
-.L1640:
+.L1644:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1636:
+.L1640:
 	add	r8, r8, #1
 	uxth	r8, r8
-.L1635:
+.L1639:
 	cmp	r8, r1
-	bne	.L1641
+	bne	.L1645
 	bl	select_l2p_ram_region
 	movs	r3, #12
-	ldr	r2, .L1643+28
+	ldr	r2, .L1647+28
 	ldr	r2, [r2, #0]
 	mul	r3, r3, r0
 	mov	r8, r0
@@ -14849,28 +14890,28 @@ log2phys:
 	ldrh	r2, [r2, r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1642
+	beq	.L1646
 	ldr	r3, [r1, #4]
 	cmp	r3, #0
-	bge	.L1642
+	bge	.L1646
 	bl	flush_l2p_region
-.L1642:
+.L1646:
 	mov	r0, r4
 	mov	r1, r8
 	bl	load_l2p_region
-	b	.L1637
-.L1644:
+	b	.L1641
+.L1648:
 	.align	2
-.L1643:
-	.word	.LANCHOR72
-	.word	.LANCHOR88
+.L1647:
+	.word	.LANCHOR60
+	.word	.LANCHOR76
 	.word	.LANCHOR221
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.word	.LANCHOR83
-	.word	.LANCHOR114
-	.word	.LANCHOR115
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
+	.word	.LANCHOR71
+	.word	.LANCHOR102
+	.word	.LANCHOR103
 	.size	log2phys, .-log2phys
 	.section	.text.FtlReUsePrevPpa,"ax",%progbits
 	.align	1
@@ -14886,86 +14927,86 @@ FtlReUsePrevPpa:
 	ubfx	r0, r1, #10, #16
 	str	r1, [sp, #4]
 	bl	P2V_block_in_plane
-	ldr	r3, .L1652
+	ldr	r3, .L1656
 	ldr	r3, [r3, #0]
 	ldrh	r2, [r3, r0, lsl #1]
 	mov	r4, r0
 	cmp	r2, #0
-	bne	.L1646
-	ldr	r3, .L1652+4
+	bne	.L1650
+	ldr	r3, .L1656+4
 	ldr	r3, [r3, #0]
 	cmp	r3, #0
-	beq	.L1647
-	ldr	r1, .L1652+8
+	beq	.L1651
+	ldr	r1, .L1656+8
 	movs	r5, #6
-	ldr	r0, .L1652+12
+	ldr	r0, .L1656+12
 	ldrh	r7, [r1, #0]
-	ldr	r1, .L1652+16
+	ldr	r1, .L1656+16
 	ldr	r1, [r1, #0]
 	subs	r3, r3, r1
 	asrs	r3, r3, #1
 	muls	r3, r0, r3
 	movw	r0, #65535
 	uxth	r3, r3
-	b	.L1648
-.L1651:
+	b	.L1652
+.L1655:
 	cmp	r3, r4
-	bne	.L1649
-	ldr	r5, .L1652+8
+	bne	.L1653
+	ldr	r5, .L1656+8
 	mov	r1, r4
-	ldr	r0, .L1652+4
+	ldr	r0, .L1656+4
 	bl	List_remove_node
 	ldrh	r3, [r5, #0]
-	cbnz	r3, .L1650
-	ldr	r1, .L1652+20
+	cbnz	r3, .L1654
+	ldr	r1, .L1656+20
 	movw	r2, #1823
-	ldr	r0, .L1652+24
+	ldr	r0, .L1656+24
 	bl	printf
-	ldr	r0, .L1652+28
-	ldr	r1, .L1652+32
+	ldr	r0, .L1656+28
+	ldr	r1, .L1656+32
 	bl	printf
-.L1650:
+.L1654:
 	ldrh	r3, [r5, #0]
 	mov	r0, r4
 	subs	r3, r3, #1
 	strh	r3, [r5, #0]	@ movhi
 	bl	INSERT_DATA_LIST
-	ldr	r3, .L1652
+	ldr	r3, .L1656
 	ldr	r3, [r3, #0]
 	ldrh	r2, [r3, r4, lsl #1]
-	b	.L1646
-.L1649:
+	b	.L1650
+.L1653:
 	muls	r3, r5, r3
 	ldrh	r3, [r1, r3]
 	cmp	r3, r0
-	beq	.L1647
+	beq	.L1651
 	adds	r2, r2, #1
 	uxth	r2, r2
-.L1648:
+.L1652:
 	cmp	r2, r7
-	bne	.L1651
-	b	.L1647
-.L1646:
+	bne	.L1655
+	b	.L1651
+.L1650:
 	adds	r2, r2, #1
 	strh	r2, [r3, r4, lsl #1]	@ movhi
-.L1647:
+.L1651:
 	mov	r0, r6
 	add	r1, sp, #4
 	movs	r2, #1
 	bl	log2phys
 	pop	{r1, r2, r3, r4, r5, r6, r7, pc}
-.L1653:
+.L1657:
 	.align	2
-.L1652:
-	.word	.LANCHOR101
-	.word	.LANCHOR105
-	.word	.LANCHOR106
+.L1656:
+	.word	.LANCHOR89
+	.word	.LANCHOR93
+	.word	.LANCHOR94
 	.word	-1431655765
-	.word	.LANCHOR99
+	.word	.LANCHOR87
 	.word	.LANCHOR222
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
 	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
 	.section	.text.FtlProgPages,"ax",%progbits
 	.align	1
@@ -14978,48 +15019,48 @@ FtlProgPages:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, lr}
 	mov	r4, r3
-	ldr	r3, .L1670
+	ldr	r3, .L1674
 	mov	r5, r0
 	str	r1, [sp, #4]
 	ldrb	r7, [r3, #0]	@ zero_extendqisi2
-	cbz	r7, .L1655
+	cbz	r7, .L1659
 	ldrb	r7, [r4, #8]	@ zero_extendqisi2
 	sub	r2, r7, #1
 	rsbs	r7, r2, #0
 	adc	r7, r7, r2
-.L1655:
+.L1659:
 	mov	r0, r5
 	ldr	r1, [sp, #4]
 	mov	r2, r7
 	ldrb	r3, [r4, #9]	@ zero_extendqisi2
 	bl	FlashProgPages
 	mov	sl, #0
-	ldr	r6, .L1670+4
-	ldr	fp, .L1670+36
-	b	.L1656
-.L1659:
+	ldr	r6, .L1674+4
+	ldr	fp, .L1674+36
+	b	.L1660
+.L1663:
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r4, #0]
 	cmp	r3, r0
-	bne	.L1657
+	bne	.L1661
 	ldr	r2, [r6, #0]
 	ldrh	r1, [r4, #4]
 	ldrh	r0, [r2, r3, lsl #1]
 	subs	r1, r0, r1
 	strh	r1, [r2, r3, lsl #1]	@ movhi
-	ldr	r2, .L1670+8
+	ldr	r2, .L1674+8
 	strb	r8, [r4, #6]
 	strh	r8, [r4, #4]	@ movhi
 	ldrh	r3, [r2, #0]
 	strh	r3, [r4, #2]	@ movhi
-.L1657:
+.L1661:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1658
+	cbnz	r3, .L1662
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-.L1658:
+.L1662:
 	ldr	r0, [r5, #4]
 	ldr	r3, [fp, #96]
 	ubfx	r0, r0, #10, #16
@@ -15035,32 +15076,32 @@ FtlProgPages:
 	mov	r0, r5
 	ldrb	r3, [r4, #9]	@ zero_extendqisi2
 	bl	FlashProgPages
-	b	.L1668
-.L1669:
+	b	.L1672
+.L1673:
 	mov	r8, #0
-.L1668:
+.L1672:
 	ldr	r3, [r5, #0]
 	adds	r3, r3, #1
-	beq	.L1659
-	ldr	r3, .L1670+12
+	beq	.L1663
+	ldr	r3, .L1674+12
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bcc	.L1660
-	ldr	r1, .L1670+16
+	bcc	.L1664
+	ldr	r1, .L1674+16
 	movw	r2, #1550
-	ldr	r0, .L1670+20
+	ldr	r0, .L1674+20
 	bl	printf
-	ldr	r0, .L1670+24
-	ldr	r1, .L1670+28
+	ldr	r0, .L1674+24
+	ldr	r1, .L1674+28
 	bl	printf
-.L1660:
+.L1664:
 	ldr	r3, [r5, #4]
 	str	r3, [sp, #12]
-	cbz	r7, .L1661
+	cbz	r7, .L1665
 	orr	r3, r3, #-2147483648
 	str	r3, [sp, #12]
-.L1661:
+.L1665:
 	movs	r2, #1
 	ldr	r0, [r5, #16]
 	add	r1, sp, #12
@@ -15068,53 +15109,53 @@ FtlProgPages:
 	ldr	r3, [r5, #12]
 	ldr	r0, [r3, #12]
 	adds	r3, r0, #1
-	beq	.L1662
+	beq	.L1666
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldr	r3, [r6, #0]
 	ldrh	r2, [r3, r0, lsl #1]
 	mov	r8, r0
-	cbnz	r2, .L1663
-	ldr	r0, .L1670+32
+	cbnz	r2, .L1667
+	ldr	r0, .L1674+32
 	mov	r1, r8
 	bl	printf
-.L1663:
+.L1667:
 	mov	r0, r8
 	bl	decrement_vpc_count
-.L1662:
+.L1666:
 	add	sl, sl, #1
 	adds	r5, r5, #36
-.L1656:
+.L1660:
 	ldr	r3, [sp, #4]
 	cmp	sl, r3
-	bne	.L1669
-	ldr	r3, .L1670+12
+	bne	.L1673
+	ldr	r3, .L1674+12
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bcc	.L1654
-	ldr	r1, .L1670+16
+	bcc	.L1658
+	ldr	r1, .L1674+16
 	movw	r2, #1567
-	ldr	r0, .L1670+20
+	ldr	r0, .L1674+20
 	bl	printf
-	ldr	r0, .L1670+24
-	ldr	r1, .L1670+28
+	ldr	r0, .L1674+24
+	ldr	r1, .L1674+28
 	bl	printf
-.L1654:
+.L1658:
 	pop	{r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1671:
+.L1675:
 	.align	2
-.L1670:
+.L1674:
 	.word	.LANCHOR7
-	.word	.LANCHOR101
-	.word	.LANCHOR68
-	.word	.LANCHOR53
+	.word	.LANCHOR89
+	.word	.LANCHOR56
+	.word	.LANCHOR41
 	.word	.LANCHOR223
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
 	.word	.LC39
-	.word	.LANCHOR144
+	.word	.LANCHOR132
 	.size	FtlProgPages, .-FtlProgPages
 	.section	.text.FtlCacheWriteBack,"ax",%progbits
 	.align	1
@@ -15126,23 +15167,23 @@ FtlCacheWriteBack:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
-	ldr	r4, .L1674
+	ldr	r4, .L1678
 	ldr	r0, [r4, #0]
-	cbz	r0, .L1673
-	ldr	r3, .L1674+4
+	cbz	r0, .L1677
+	ldr	r3, .L1678+4
 	movs	r1, #1
 	movs	r2, #0
 	ldr	r3, [r3, #0]
 	bl	FtlProgPages
 	movs	r3, #0
 	str	r3, [r4, #0]
-.L1673:
+.L1677:
 	movs	r0, #0
 	pop	{r4, pc}
-.L1675:
+.L1679:
 	.align	2
-.L1674:
-	.word	.LANCHOR137
+.L1678:
+	.word	.LANCHOR125
 	.word	.LANCHOR224
 	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
 	.section	.text.FtlSysFlush,"ax",%progbits
@@ -15155,21 +15196,21 @@ FtlSysFlush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L1678
+	ldr	r3, .L1682
 	ldr	r3, [r3, #0]
-	cbnz	r3, .L1677
+	cbnz	r3, .L1681
 	bl	FtlCacheWriteBack
 	bl	l2p_flush
 	movs	r0, #1
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1677:
+.L1681:
 	movs	r0, #0
 	pop	{r3, pc}
-.L1679:
+.L1683:
 	.align	2
-.L1678:
-	.word	.LANCHOR94
+.L1682:
+	.word	.LANCHOR82
 	.size	FtlSysFlush, .-FtlSysFlush
 	.section	.text.FtlDeInit,"ax",%progbits
 	.align	1
@@ -15181,17 +15222,17 @@ FtlDeInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L1682
+	ldr	r3, .L1686
 	ldr	r3, [r3, #0]
 	cmp	r3, #1
-	bne	.L1681
+	bne	.L1685
 	bl	FtlSysFlush
-.L1681:
+.L1685:
 	movs	r0, #0
 	pop	{r3, pc}
-.L1683:
+.L1687:
 	.align	2
-.L1682:
+.L1686:
 	.word	.LANCHOR225
 	.size	FtlDeInit, .-FtlDeInit
 	.section	.text.rk_ftl_de_init,"ax",%progbits
@@ -15218,36 +15259,36 @@ rk_ftl_de_init:
 FtlGcFreeTempBlock:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1703
+	ldr	r3, .L1707
 	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
 	ldrh	r1, [r3, #0]
-	ldr	r3, .L1703+4
+	ldr	r3, .L1707+4
 	ldr	r3, [r3, #0]
 	cmp	r3, #0
-	bne	.L1699
-	ldr	r0, .L1703+8
+	bne	.L1703
+	ldr	r0, .L1707+8
 	movw	r3, #65535
 	ldrh	r4, [r0, #0]
 	cmp	r4, r3
-	beq	.L1687
+	beq	.L1691
 	bl	FtlGcScanTempBlk
 	str	r0, [sp, #4]
 	adds	r0, r0, #1
-	beq	.L1687
-	ldr	r3, .L1703+12
+	beq	.L1691
+	ldr	r3, .L1707+12
 	ldr	r3, [r3, #0]
 	ldrh	r2, [r3, r4, lsl #1]
 	cmp	r2, #4
-	bls	.L1688
+	bls	.L1692
 	subs	r2, r2, #5
 	movs	r0, #1
 	strh	r2, [r3, r4, lsl #1]	@ movhi
 	bl	FtlEctTblFlush
-.L1688:
-	ldr	r3, .L1703+16
+.L1692:
+	ldr	r3, .L1707+16
 	ldr	r3, [r3, #0]
-	cbnz	r3, .L1689
-	ldr	r3, .L1703+20
+	cbnz	r3, .L1693
+	ldr	r3, .L1707+20
 	ldr	r0, [sp, #4]
 	ldr	r2, [r3, #96]
 	ubfx	r0, r0, #10, #16
@@ -15255,59 +15296,59 @@ FtlGcFreeTempBlock:
 	str	r2, [r3, #96]
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
-.L1689:
-	ldr	r3, .L1703+16
+.L1693:
+	ldr	r3, .L1707+16
 	movs	r2, #0
 	movs	r4, #1
 	str	r2, [r3, #0]
-	b	.L1686
-.L1687:
-	ldr	r5, .L1703+8
+	b	.L1690
+.L1691:
+	ldr	r5, .L1707+8
 	movs	r4, #0
-	ldr	r3, .L1703+16
+	ldr	r3, .L1707+16
 	ldrh	r2, [r5, #0]
 	str	r4, [r3, #0]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1686
+	beq	.L1690
 	bl	FtlCacheWriteBack
-	ldr	r3, .L1703+24
-	ldr	r1, .L1703
+	ldr	r3, .L1707+24
+	ldr	r1, .L1707
 	ldrh	r2, [r3, #0]
 	ldrh	r1, [r1, #0]
 	ldrb	r3, [r5, #7]	@ zero_extendqisi2
 	muls	r3, r1, r3
 	cmp	r2, r3
-	beq	.L1690
-	ldr	r1, .L1703+28
+	beq	.L1694
+	ldr	r1, .L1707+28
 	movs	r2, #163
-	ldr	r0, .L1703+32
+	ldr	r0, .L1707+32
 	bl	printf
-	ldr	r0, .L1703+36
-	ldr	r1, .L1703+40
+	ldr	r0, .L1707+36
+	ldr	r1, .L1707+40
 	bl	printf
-.L1690:
-	ldr	r3, .L1703+8
+.L1694:
+	ldr	r3, .L1707+8
 	movs	r5, #0
-	ldr	r2, .L1703+44
-	ldr	r4, .L1703
+	ldr	r2, .L1707+44
+	ldr	r4, .L1707
 	ldrh	r1, [r3, #0]
 	ldr	r2, [r2, #0]
 	ldrh	r4, [r4, #0]
 	ldrb	r0, [r3, #7]	@ zero_extendqisi2
 	muls	r0, r4, r0
 	strh	r0, [r2, r1, lsl #1]	@ movhi
-	ldr	r1, .L1703+48
-	ldr	r2, .L1703+24
-	ldr	fp, .L1703+80
+	ldr	r1, .L1707+48
+	ldr	r2, .L1707+24
+	ldr	fp, .L1707+80
 	ldr	r0, [r1, #0]
 	mov	sl, r2
 	ldrh	r4, [r2, #0]
-	ldr	r8, .L1703+84
+	ldr	r8, .L1707+84
 	adds	r0, r4, r0
 	str	r0, [r1, #0]
-	b	.L1691
-.L1695:
+	b	.L1695
+.L1699:
 	ldr	r7, [fp, #0]
 	movs	r6, #12
 	muls	r6, r5, r6
@@ -15315,15 +15356,15 @@ FtlGcFreeTempBlock:
 	adds	r4, r7, r6
 	ldr	r2, [r4, #8]
 	cmp	r2, r3
-	bcc	.L1692
-	ldr	r1, .L1703+28
+	bcc	.L1696
+	ldr	r1, .L1707+28
 	movs	r2, #168
-	ldr	r0, .L1703+32
+	ldr	r0, .L1707+32
 	bl	printf
-	ldr	r0, .L1703+36
-	ldr	r1, .L1703+40
+	ldr	r0, .L1707+36
+	ldr	r1, .L1707+40
 	bl	printf
-.L1692:
+.L1696:
 	movs	r2, #0
 	ldr	r0, [r4, #8]
 	add	r1, sp, #4
@@ -15331,7 +15372,7 @@ FtlGcFreeTempBlock:
 	ldr	r0, [sp, #4]
 	ldr	r3, [r7, r6]
 	cmp	r0, r3
-	bne	.L1693
+	bne	.L1697
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	adds	r1, r4, #4
@@ -15340,96 +15381,96 @@ FtlGcFreeTempBlock:
 	ldr	r0, [r4, #8]
 	bl	log2phys
 	mov	r0, r6
-	b	.L1702
-.L1693:
+	b	.L1706
+.L1697:
 	ldr	r3, [r4, #4]
 	cmp	r0, r3
-	beq	.L1694
-	ldr	r3, .L1703+8
+	beq	.L1698
+	ldr	r3, .L1707+8
 	ldrh	r0, [r3, #0]
-.L1702:
+.L1706:
 	bl	decrement_vpc_count
-.L1694:
+.L1698:
 	adds	r5, r5, #1
 	uxth	r5, r5
-.L1691:
+.L1695:
 	ldrh	r3, [sl, #0]
 	cmp	r3, r5
-	bhi	.L1695
+	bhi	.L1699
 	movw	r0, #65535
-	ldr	r4, .L1703+8
+	ldr	r4, .L1707+8
 	bl	decrement_vpc_count
-	ldr	r3, .L1703+52
+	ldr	r3, .L1707+52
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1696
-	ldr	r0, .L1703+56
+	cbz	r3, .L1700
+	ldr	r0, .L1707+56
 	ldrh	r1, [r4, #0]
 	bl	printf
-.L1696:
-	ldr	r3, .L1703+44
+.L1700:
+	ldr	r3, .L1707+44
 	ldrh	r0, [r4, #0]
 	ldr	r3, [r3, #0]
 	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L1697
+	cbz	r3, .L1701
 	bl	INSERT_DATA_LIST
-	b	.L1698
-.L1697:
+	b	.L1702
+.L1701:
 	bl	INSERT_FREE_LIST
-.L1698:
-	ldr	r3, .L1703+8
+.L1702:
+	ldr	r3, .L1707+8
 	movw	r5, #65535
 	movs	r4, #0
 	strh	r5, [r3, #0]	@ movhi
-	ldr	r3, .L1703+24
+	ldr	r3, .L1707+24
 	strh	r4, [r3, #0]	@ movhi
-	ldr	r3, .L1703+60
+	ldr	r3, .L1707+60
 	strh	r4, [r3, #0]	@ movhi
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	ldr	r3, .L1703+64
-	ldr	r2, .L1703+68
+	ldr	r3, .L1707+64
+	ldr	r2, .L1707+68
 	movs	r1, #3
 	ldrh	r3, [r3, #0]
 	ldrh	r2, [r2, #0]
 	muls	r2, r1, r2
 	cmp	r3, r2, lsr #2
-	ble	.L1686
-	ldr	r3, .L1703+72
+	ble	.L1690
+	ldr	r3, .L1707+72
 	movs	r2, #20
 	strh	r5, [r3, #0]	@ movhi
-	ldr	r3, .L1703+76
+	ldr	r3, .L1707+76
 	strh	r2, [r3, #0]	@ movhi
-	b	.L1686
-.L1699:
+	b	.L1690
+.L1703:
 	movs	r4, #0
-.L1686:
+.L1690:
 	mov	r0, r4
 	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1704:
+.L1708:
 	.align	2
-.L1703:
-	.word	.LANCHOR68
-	.word	.LANCHOR94
-	.word	.LANCHOR111
-	.word	.LANCHOR96
-	.word	.LANCHOR140
-	.word	.LANCHOR144
-	.word	.LANCHOR147
+.L1707:
+	.word	.LANCHOR56
+	.word	.LANCHOR82
+	.word	.LANCHOR99
+	.word	.LANCHOR84
+	.word	.LANCHOR128
+	.word	.LANCHOR132
+	.word	.LANCHOR135
 	.word	.LANCHOR226
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.word	.LANCHOR101
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
+	.word	.LANCHOR89
 	.word	.LANCHOR158
 	.word	.LANCHOR7
 	.word	.LC40
-	.word	.LANCHOR145
-	.word	.LANCHOR106
+	.word	.LANCHOR133
+	.word	.LANCHOR94
 	.word	.LANCHOR201
 	.word	.LANCHOR202
 	.word	.LANCHOR173
-	.word	.LANCHOR148
-	.word	.LANCHOR88
+	.word	.LANCHOR136
+	.word	.LANCHOR76
 	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
 	.section	.text.Ftl_gc_temp_data_write_back,"ax",%progbits
 	.align	1
@@ -15441,43 +15482,43 @@ Ftl_gc_temp_data_write_back:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
-	ldr	r3, .L1714
+	ldr	r3, .L1718
 	ldrb	r2, [r3, #0]	@ zero_extendqisi2
-	ldr	r3, .L1714+4
-	cbz	r2, .L1706
+	ldr	r3, .L1718+4
+	cbz	r2, .L1710
 	ldr	r2, [r3, #0]
 	lsls	r2, r2, #31
-	bpl	.L1706
-	ldr	r2, .L1714+8
+	bpl	.L1710
+	ldr	r2, .L1718+8
 	ldrh	r2, [r2, #4]
 	cmp	r2, #0
-	bne	.L1711
-.L1706:
-	ldr	r4, .L1714+12
+	bne	.L1715
+.L1710:
+	ldr	r4, .L1718+12
 	movs	r2, #0
 	ldr	r1, [r3, #0]
 	mov	r3, r2
 	movs	r5, #0
-	ldr	r7, .L1714+4
+	ldr	r7, .L1718+4
 	ldr	r0, [r4, #0]
 	movs	r6, #36
 	bl	FlashProgPages
-	b	.L1708
-.L1710:
+	b	.L1712
+.L1714:
 	mul	r3, r6, r5
 	ldr	r1, [r4, #0]
 	adds	r2, r1, r3
 	ldr	r1, [r1, r3]
 	adds	r0, r1, #1
-	bne	.L1709
-	ldr	r3, .L1714+8
+	bne	.L1713
+	ldr	r3, .L1718+8
 	movs	r5, #0
-	ldr	r0, .L1714+16
+	ldr	r0, .L1718+16
 	ldrh	r4, [r3, #0]
 	ldr	r0, [r0, #0]
 	strh	r5, [r0, r4, lsl #1]	@ movhi
 	strh	r1, [r3, #0]	@ movhi
-	ldr	r3, .L1714+20
+	ldr	r3, .L1718+20
 	ldr	r0, [r2, #4]
 	ldr	r1, [r3, #96]
 	ubfx	r0, r0, #10, #16
@@ -15486,8 +15527,8 @@ Ftl_gc_temp_data_write_back:
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
 	bl	FtlGcPageVarInit
-	b	.L1713
-.L1709:
+	b	.L1717
+.L1713:
 	ldr	r3, [r2, #12]
 	adds	r5, r5, #1
 	ldr	r1, [r2, #4]
@@ -15495,37 +15536,37 @@ Ftl_gc_temp_data_write_back:
 	ldr	r0, [r3, #12]
 	ldr	r2, [r3, #8]
 	bl	FtlGcUpdatePage
-.L1708:
+.L1712:
 	ldr	r1, [r7, #0]
 	cmp	r5, r1
-	bcc	.L1710
-	ldr	r3, .L1714+12
+	bcc	.L1714
+	ldr	r3, .L1718+12
 	ldr	r0, [r3, #0]
 	bl	FtlGcBufFree
-	ldr	r3, .L1714+4
+	ldr	r3, .L1718+4
 	movs	r0, #0
 	str	r0, [r3, #0]
-	ldr	r3, .L1714+8
+	ldr	r3, .L1718+8
 	ldrh	r3, [r3, #4]
-	cbnz	r3, .L1707
+	cbnz	r3, .L1711
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
-.L1713:
+.L1717:
 	movs	r0, #1
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1711:
+.L1715:
 	movs	r0, #0
-.L1707:
+.L1711:
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1715:
+.L1719:
 	.align	2
-.L1714:
+.L1718:
 	.word	.LANCHOR7
-	.word	.LANCHOR131
-	.word	.LANCHOR111
+	.word	.LANCHOR119
+	.word	.LANCHOR99
 	.word	.LANCHOR178
-	.word	.LANCHOR101
-	.word	.LANCHOR144
+	.word	.LANCHOR89
+	.word	.LANCHOR132
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
 	.section	.text.Ftl_get_new_temp_ppa,"ax",%progbits
 	.align	1
@@ -15538,38 +15579,38 @@ Ftl_get_new_temp_ppa:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movw	r3, #65535
-	ldr	r5, .L1719
+	ldr	r5, .L1723
 	ldrh	r2, [r5, #0]
 	cmp	r2, r3
-	beq	.L1717
+	beq	.L1721
 	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1718
-.L1717:
+	cbnz	r3, .L1722
+.L1721:
 	bl	FtlCacheWriteBack
 	movs	r0, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r0, .L1719
+	ldr	r0, .L1723
 	movs	r4, #0
 	strb	r4, [r5, #8]
 	bl	allocate_data_superblock
-	ldr	r3, .L1719+4
+	ldr	r3, .L1723+4
 	strh	r4, [r3, #0]	@ movhi
-	ldr	r3, .L1719+8
+	ldr	r3, .L1723+8
 	strh	r4, [r3, #0]	@ movhi
 	bl	l2p_flush
 	mov	r0, r4
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1718:
-	ldr	r0, .L1719
+.L1722:
+	ldr	r0, .L1723
 	pop	{r3, r4, r5, lr}
 	b	get_new_active_ppa
-.L1720:
+.L1724:
 	.align	2
-.L1719:
-	.word	.LANCHOR111
-	.word	.LANCHOR145
-	.word	.LANCHOR147
+.L1723:
+	.word	.LANCHOR99
+	.word	.LANCHOR133
+	.word	.LANCHOR135
 	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
 	.section	.text.FtlGcPageRecovery,"ax",%progbits
 	.align	1
@@ -15581,31 +15622,31 @@ FtlGcPageRecovery:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	ldr	r4, .L1723
-	ldr	r5, .L1723+4
+	ldr	r4, .L1727
+	ldr	r5, .L1727+4
 	ldrh	r1, [r4, #0]
 	mov	r0, r5
 	bl	FtlGcScanTempBlk
 	ldrh	r2, [r5, #2]
 	ldrh	r3, [r4, #0]
 	cmp	r2, r3
-	bcc	.L1721
-	ldr	r0, .L1723+8
+	bcc	.L1725
+	ldr	r0, .L1727+8
 	bl	FtlMapBlkWriteDumpData
 	movs	r0, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r3, .L1723+12
+	ldr	r3, .L1727+12
 	movs	r2, #0
 	str	r2, [r3, #0]
-.L1721:
+.L1725:
 	pop	{r3, r4, r5, pc}
-.L1724:
+.L1728:
 	.align	2
-.L1723:
-	.word	.LANCHOR68
-	.word	.LANCHOR111
-	.word	.LANCHOR122
-	.word	.LANCHOR140
+.L1727:
+	.word	.LANCHOR56
+	.word	.LANCHOR99
+	.word	.LANCHOR110
+	.word	.LANCHOR128
 	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
 	.section	.text.ftl_discard,"ax",%progbits
 	.align	1
@@ -15616,18 +15657,18 @@ FtlGcPageRecovery:
 ftl_discard:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1734
+	ldr	r3, .L1738
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r4, r2
 	ldr	r3, [r3, #0]
 	adds	r2, r2, r1
 	mov	r6, r1
 	cmp	r2, r3
-	bhi	.L1731
+	bhi	.L1735
 	cmp	r4, #31
-	bls	.L1732
+	bls	.L1736
 	bl	FtlCacheWriteBack
-	ldr	r3, .L1734+4
+	ldr	r3, .L1738+4
 	mov	r0, r6
 	ldrh	r7, [r3, #0]
 	mov	r1, r7
@@ -15635,7 +15676,7 @@ ftl_discard:
 	mls	r6, r0, r7, r6
 	mov	r5, r0
 	uxth	r6, r6
-	cbz	r6, .L1727
+	cbz	r6, .L1731
 	subs	r6, r7, r6
 	adds	r5, r0, #1
 	cmp	r6, r4
@@ -15643,21 +15684,21 @@ ftl_discard:
 	movcs	r6, r4
 	uxth	r6, r6
 	subs	r4, r4, r6
-.L1727:
+.L1731:
 	mov	r3, #-1
-	ldr	r8, .L1734+4
+	ldr	r8, .L1738+4
 	str	r3, [sp, #4]
-	ldr	r7, .L1734+8
-	ldr	r6, .L1734+12
-	b	.L1728
-.L1730:
+	ldr	r7, .L1738+8
+	ldr	r6, .L1738+12
+	b	.L1732
+.L1734:
 	movs	r2, #0
 	mov	r0, r5
 	mov	r1, sp
 	bl	log2phys
 	ldr	r3, [sp, #0]
 	adds	r3, r3, #1
-	beq	.L1729
+	beq	.L1733
 	ldr	r3, [r7, #0]
 	add	r1, sp, #4
 	movs	r2, #1
@@ -15672,38 +15713,38 @@ ftl_discard:
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L1729:
+.L1733:
 	ldrh	r3, [r8, #0]
 	adds	r5, r5, #1
 	subs	r4, r4, r3
-.L1728:
+.L1732:
 	ldrh	r3, [r8, #0]
 	cmp	r4, r3
-	bcs	.L1730
-	ldr	r3, .L1734+8
+	bcs	.L1734
+	ldr	r3, .L1738+8
 	mov	r4, #0
 	ldr	r2, [r3, #0]
 	cmp	r2, #32
-	bls	.L1733
+	bls	.L1737
 	str	r4, [r3, #0]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L1733
-.L1731:
+	b	.L1737
+.L1735:
 	mov	r0, #-1
-	b	.L1726
-.L1732:
+	b	.L1730
+.L1736:
 	movs	r0, #0
-	b	.L1726
-.L1733:
+	b	.L1730
+.L1737:
 	mov	r0, r4
-.L1726:
+.L1730:
 	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
-.L1735:
+.L1739:
 	.align	2
-.L1734:
-	.word	.LANCHOR84
-	.word	.LANCHOR71
+.L1738:
+	.word	.LANCHOR72
+	.word	.LANCHOR59
 	.word	.LANCHOR227
 	.word	.LANCHOR160
 	.size	ftl_discard, .-ftl_discard
@@ -15722,9 +15763,9 @@ FtlRecoverySuperblock:
 	cmp	r2, r3
 	sub	sp, sp, #64
 	mov	r4, r0
-	beq	.L1737
+	beq	.L1741
 	ldrh	r5, [r0, #2]
-	ldr	r2, .L1829
+	ldr	r2, .L1833
 	str	r5, [sp, #20]
 	ldrb	r5, [r0, #6]	@ zero_extendqisi2
 	ldrh	r2, [r2, #0]
@@ -15732,88 +15773,88 @@ FtlRecoverySuperblock:
 	ldr	r5, [sp, #20]
 	cmp	r2, r5
 	mov	r5, #0
-	bne	.L1738
+	bne	.L1742
 	mov	r3, r5	@ movhi
 	strh	r5, [r0, #4]	@ movhi
-	b	.L1826
-.L1738:
+	b	.L1830
+.L1742:
 	ldrh	r0, [r0, #16]
-	b	.L1739
-.L1740:
+	b	.L1743
+.L1744:
 	adds	r5, r5, #1
 	uxth	r5, r5
 	add	r2, r5, #8
 	ldrh	r0, [r4, r2, lsl #1]
-.L1739:
+.L1743:
 	cmp	r0, r3
-	beq	.L1740
+	beq	.L1744
 	ldrb	r1, [r4, #8]	@ zero_extendqisi2
 	cmp	r1, #1
-	bne	.L1741
+	bne	.L1745
 	bl	FtlGetLastWrittenPage
 	adds	r2, r0, #1
 	mov	r6, r0
-	beq	.L1742
-	ldr	r3, .L1829+4
+	beq	.L1746
+	ldr	r3, .L1833+4
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbnz	r3, .L1821
-	ldr	r3, .L1829+8
+	cbnz	r3, .L1825
+	ldr	r3, .L1833+8
 	ldrh	r7, [r3, r0, lsl #1]
-	b	.L1811
-.L1741:
+	b	.L1815
+.L1745:
 	movs	r1, #0
 	bl	FtlGetLastWrittenPage
 	adds	r3, r0, #1
 	mov	r6, r0
-	beq	.L1742
-.L1821:
+	beq	.L1746
+.L1825:
 	mov	r7, r6
-.L1811:
-	ldr	r3, .L1829+12
+.L1815:
+	ldr	r3, .L1833+12
 	movs	r5, #0
 	str	r4, [sp, #44]
 	mov	r2, r4
 	ldrh	fp, [r3, #0]
-	ldr	r3, .L1829+16
+	ldr	r3, .L1833+16
 	ldr	sl, [r3, #0]
-	ldr	r3, .L1829+20
+	ldr	r3, .L1833+20
 	ldr	r8, [r3, #0]
-	ldr	r3, .L1829+24
+	ldr	r3, .L1833+24
 	ldrh	ip, [r3, #0]
 	mov	r3, r5
-	b	.L1744
-.L1742:
+	b	.L1748
+.L1746:
 	ldr	r3, [sp, #20]
-	cbz	r3, .L1745
-	ldr	r1, .L1829+28
+	cbz	r3, .L1749
+	ldr	r1, .L1833+28
 	movw	r2, #1894
-	ldr	r0, .L1829+32
+	ldr	r0, .L1833+32
 	bl	printf
-	ldr	r0, .L1829+36
-	ldr	r1, .L1829+40
+	ldr	r0, .L1833+36
+	ldr	r1, .L1833+40
 	bl	printf
-.L1745:
+.L1749:
 	ldr	r3, [sp, #28]
-	cbz	r3, .L1746
+	cbz	r3, .L1750
 	cmp	r3, r5
-	beq	.L1746
-	ldr	r1, .L1829+28
+	beq	.L1750
+	ldr	r1, .L1833+28
 	movw	r2, #1895
-	ldr	r0, .L1829+32
+	ldr	r0, .L1833+32
 	bl	printf
-	ldr	r0, .L1829+36
-	ldr	r1, .L1829+40
+	ldr	r0, .L1833+36
+	ldr	r1, .L1833+40
 	bl	printf
-.L1746:
+.L1750:
 	movs	r3, #0
 	strh	r3, [r4, #2]	@ movhi
 	strb	r3, [r4, #6]
-	b	.L1737
-.L1748:
+	b	.L1741
+.L1752:
 	ldrh	r0, [r2, #16]
 	movw	lr, #65535
 	cmp	r0, lr
-	beq	.L1747
+	beq	.L1751
 	mov	lr, #36
 	orr	r0, r7, r0, lsl #10
 	mla	r1, lr, r5, sl
@@ -15826,26 +15867,26 @@ FtlRecoverySuperblock:
 	bic	r0, r0, #3
 	add	r0, r8, r0
 	str	r0, [r1, #12]
-.L1747:
+.L1751:
 	adds	r3, r3, #1
 	adds	r2, r2, #2
 	uxth	r3, r3
-.L1744:
+.L1748:
 	cmp	r3, fp
-	bne	.L1748
+	bne	.L1752
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1813
-	ldr	r3, .L1829+4
+	bne	.L1817
+	ldr	r3, .L1833+4
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	adds	r3, r3, #0
 	it	ne
 	movne	r3, #1
-	b	.L1822
-.L1813:
+	b	.L1826
+.L1817:
 	movs	r3, #0
-.L1822:
-	ldr	r8, .L1829+16
+.L1826:
+	ldr	r8, .L1833+16
 	mov	r1, r5
 	str	r3, [sp, #24]
 	mov	fp, #0
@@ -15853,109 +15894,109 @@ FtlRecoverySuperblock:
 	mov	sl, fp
 	ldr	r0, [r8, #0]
 	bl	FlashReadPages
-	ldr	r3, .L1829+44
+	ldr	r3, .L1833+44
 	movw	ip, #65535
 	str	ip, [sp, #8]
 	ldr	r2, [r3, #0]
 	str	r2, [sp, #12]
 	uxth	r2, r7
 	str	r2, [sp, #16]
-	b	.L1750
-.L1755:
-	ldr	r3, .L1829+16
+	b	.L1754
+.L1759:
+	ldr	r3, .L1833+16
 	ldr	r2, [r3, #0]
 	add	r3, r2, fp
 	ldr	r2, [r2, fp]
-	cbnz	r2, .L1751
+	cbnz	r2, .L1755
 	ldr	r3, [r3, #12]
 	ldr	r8, [r3, #4]
 	cmp	r8, #-1
-	beq	.L1752
-	ldr	r2, .L1829+44
+	beq	.L1756
+	ldr	r2, .L1833+44
 	mov	r0, r8
 	ldr	r1, [r2, #0]
 	str	r3, [sp, #0]
 	bl	ftl_cmp_data_ver
 	ldr	r3, [sp, #0]
-	cbz	r0, .L1752
-	ldr	r0, .L1829+44
+	cbz	r0, .L1756
+	ldr	r0, .L1833+44
 	add	r2, r8, #1
 	str	r2, [r0, #0]
-.L1752:
+.L1756:
 	ldr	r3, [r3, #0]
 	adds	r3, r3, #1
-	bne	.L1753
-	ldr	r3, .L1829+16
+	bne	.L1757
+	ldr	r3, .L1833+16
 	movs	r2, #36
 	uxth	r6, r6
 	ldr	r3, [r3, #0]
 	mla	r3, r2, sl, r3
-	b	.L1823
-.L1751:
+	b	.L1827
+.L1755:
 	ldr	r1, [r3, #4]
-	ldr	r0, .L1829+48
+	ldr	r0, .L1833+48
 	bl	printf
 	ldr	r2, [sp, #16]
 	ldrh	r3, [r4, #0]
-	ldr	r0, .L1829+52
+	ldr	r0, .L1833+52
 	str	r2, [sp, #8]
 	strh	r3, [r0, #0]	@ movhi
-.L1753:
+.L1757:
 	add	sl, sl, #1
 	add	fp, fp, #36
 	uxth	sl, sl
-.L1750:
+.L1754:
 	cmp	sl, r5
-	bne	.L1755
-	ldr	r3, .L1829+16
+	bne	.L1759
+	ldr	r3, .L1833+16
 	adds	r6, r6, #1
 	uxth	r6, r6
 	ldr	r3, [r3, #0]
-.L1823:
+.L1827:
 	ldr	r0, [r3, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_plane
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #1
 	str	r0, [sp, #16]
-	bne	.L1756
-	ldr	r2, .L1829+4
+	bne	.L1760
+	ldr	r2, .L1833+4
 	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	cbnz	r2, .L1756
-	ldr	r2, .L1829+8
+	cbnz	r2, .L1760
+	ldr	r2, .L1833+8
 	ldrh	r6, [r2, r6, lsl #1]
-.L1756:
-	ldr	r2, .L1829
+.L1760:
+	ldr	r2, .L1833
 	ldrh	r2, [r2, #0]
 	cmp	r2, r6
-	bne	.L1757
+	bne	.L1761
 	movs	r2, #0
 	strh	r6, [r4, #2]	@ movhi
 	strb	r2, [r4, #6]
 	strh	r2, [r4, #4]	@ movhi
-.L1757:
+.L1761:
 	ldr	r5, [sp, #20]
 	cmp	r6, r5
-	bne	.L1758
+	bne	.L1762
 	ldr	r8, [sp, #16]
 	ldr	r5, [sp, #28]
 	cmp	r8, r5
-	bne	.L1758
+	bne	.L1762
 	mov	r0, r4
 	mov	r1, r6
 	mov	r2, r8
-	b	.L1827
-.L1758:
+	b	.L1831
+.L1762:
 	ldr	r2, [sp, #12]
 	ldr	r8, [sp, #8]
 	subs	r5, r2, #1
 	movw	r2, #65535
 	cmp	r8, r2
-	bne	.L1759
+	bne	.L1763
 	cmp	r3, #0
-	bne	.L1760
-.L1759:
-	ldr	r2, .L1829+56
+	bne	.L1764
+.L1763:
+	ldr	r2, .L1833+56
 	uxth	r3, r7
 	ldr	r0, [sp, #20]
 	ldr	r1, [r2, #0]
@@ -15966,24 +16007,24 @@ FtlRecoverySuperblock:
 	str	r2, [sp, #8]
 	adds	r2, r0, #7
 	cmp	r3, r2
-	ble	.L1814
+	ble	.L1818
 	subs	r7, r3, #7
 	uxth	r7, r7
-	b	.L1762
-.L1814:
+	b	.L1766
+.L1818:
 	ldr	r7, [sp, #20]
-.L1762:
+.L1766:
 	mov	fp, #-1
 	mov	r8, r3
 	mov	sl, fp
 	mov	r3, r6
 	mov	r6, r5
-	b	.L1763
-.L1765:
+	b	.L1767
+.L1769:
 	ldrh	r0, [r1, #16]
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1764
+	beq	.L1768
 	ldr	r3, [sp, #12]
 	mov	lr, #36
 	orr	r0, r7, r0, lsl #10
@@ -15991,22 +16032,22 @@ FtlRecoverySuperblock:
 	adds	r5, r5, #1
 	uxth	r5, r5
 	str	r0, [ip, #4]
-.L1764:
+.L1768:
 	adds	r2, r2, #1
 	adds	r1, r1, #2
 	uxth	r2, r2
-.L1776:
+.L1780:
 	ldr	r0, [sp, #36]
 	cmp	r2, r0
-	bne	.L1765
-	ldr	ip, .L1829+16
+	bne	.L1769
+	ldr	ip, .L1833+16
 	mov	r1, r5
 	ldr	r3, [sp, #32]
 	ldr	r2, [sp, #24]
 	ldr	r0, [ip, #0]
 	stmia	sp, {r3, ip}
 	bl	FlashReadPages
-	ldr	r2, .L1829+4
+	ldr	r2, .L1833+4
 	movs	r0, #0
 	ldr	ip, [sp, #4]
 	ldr	r3, [sp, #0]
@@ -16015,117 +16056,117 @@ FtlRecoverySuperblock:
 	mov	ip, r3
 	str	r5, [sp, #32]
 	str	r2, [sp, #12]
-	ldr	r2, .L1829+56
+	ldr	r2, .L1833+56
 	ldr	r2, [r2, #0]
-	b	.L1766
-.L1830:
+	b	.L1770
+.L1834:
 	.align	2
-.L1829:
-	.word	.LANCHOR68
+.L1833:
+	.word	.LANCHOR56
 	.word	.LANCHOR7
 	.word	.LANCHOR8
-	.word	.LANCHOR53
+	.word	.LANCHOR41
 	.word	.LANCHOR177
-	.word	.LANCHOR133
-	.word	.LANCHOR74
+	.word	.LANCHOR121
+	.word	.LANCHOR62
 	.word	.LANCHOR228
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
 	.word	.LANCHOR157
 	.word	.LC41
 	.word	.LANCHOR229
-	.word	.LANCHOR141
-.L1774:
+	.word	.LANCHOR129
+.L1778:
 	ldr	r3, [r1, #0]
-	cbnz	r3, .L1767
+	cbnz	r3, .L1771
 	ldr	r3, [r1, #12]
 	movw	r5, #65535
 	ldrh	lr, [r3, #0]
 	cmp	lr, r5
-	beq	.L1816
+	beq	.L1820
 	ldr	r3, [r3, #4]
 	adds	r5, r3, #1
-	beq	.L1816
+	beq	.L1820
 	cmp	fp, #-1
-	bne	.L1768
-	ldr	r5, .L1831
+	bne	.L1772
+	ldr	r5, .L1835
 	ldrh	lr, [r5, r7, lsl #1]
 	movw	r5, #65535
 	cmp	lr, r5
-	bne	.L1769
+	bne	.L1773
 	ldr	r5, [sp, #12]
 	cmp	r5, #0
-	beq	.L1768
-.L1769:
+	beq	.L1772
+.L1773:
 	cmp	r2, r6
 	ite	ne
 	movne	fp, r2
 	moveq	fp, #-1
-	b	.L1768
-.L1767:
-	ldr	r1, .L1831+4
+	b	.L1772
+.L1771:
+	ldr	r1, .L1835+4
 	mov	r5, r6
 	ldrh	r0, [r4, #0]
 	mov	r6, ip
-	ldr	r3, .L1831+8
+	ldr	r3, .L1835+8
 	strh	r0, [r1, #0]	@ movhi
 	ldrb	r1, [r4, #8]	@ zero_extendqisi2
 	str	r2, [r3, #0]
 	cmp	r1, #0
-	bne	.L1760
-	ldr	r1, .L1831
+	bne	.L1764
+	ldr	r1, .L1835
 	ldrh	r0, [r1, r7, lsl #1]
 	movw	r1, #65535
 	cmp	r0, r1
-	bne	.L1770
+	bne	.L1774
 	cmp	fp, #-1
-	beq	.L1771
+	beq	.L1775
 	str	fp, [r3, #0]
-	b	.L1760
-.L1771:
+	b	.L1764
+.L1775:
 	ldr	r0, [sp, #8]
 	cmp	r0, r5
-	beq	.L1828
+	beq	.L1832
 	str	r0, [r3, #0]
-	b	.L1760
-.L1770:
+	b	.L1764
+.L1774:
 	cmp	sl, r5
-	beq	.L1773
+	beq	.L1777
 	cmp	sl, #-1
-	beq	.L1760
+	beq	.L1764
 	str	sl, [r3, #0]
-	b	.L1760
-.L1773:
+	b	.L1764
+.L1777:
 	cmp	r2, r5
-	beq	.L1760
-.L1828:
+	beq	.L1764
+.L1832:
 	subs	r2, r2, #1
-	b	.L1824
-.L1816:
+	b	.L1828
+.L1820:
 	mov	r3, r2
 	mov	r2, sl
-.L1768:
+.L1772:
 	adds	r0, r0, #1
 	mov	sl, r2
 	adds	r1, r1, #36
 	mov	r2, r3
 	uxth	r0, r0
-.L1766:
+.L1770:
 	ldr	r3, [sp, #32]
 	cmp	r0, r3
-	bne	.L1774
+	bne	.L1778
 	adds	r7, r7, #1
-	ldr	r1, .L1831+8
+	ldr	r1, .L1835+8
 	mov	r3, ip
 	uxth	r7, r7
 	str	r2, [r1, #0]
-.L1763:
+.L1767:
 	cmp	r7, r8
-	bhi	.L1775
-	ldr	r5, .L1831+12
+	bhi	.L1779
+	ldr	r5, .L1835+12
 	mov	r1, r4
-	ldr	r2, .L1831+16
+	ldr	r2, .L1835+16
 	str	r3, [sp, #32]
 	ldrh	lr, [r5, #0]
 	movs	r5, #0
@@ -16133,59 +16174,59 @@ FtlRecoverySuperblock:
 	str	lr, [sp, #36]
 	str	r2, [sp, #12]
 	mov	r2, r5
-	b	.L1776
-.L1775:
+	b	.L1780
+.L1779:
 	mov	r5, r6
 	mov	r6, r3
-	ldr	r3, .L1831+8
+	ldr	r3, .L1835+8
 	mov	r2, #-1
-.L1824:
+.L1828:
 	str	r2, [r3, #0]
-.L1760:
-	ldr	r3, .L1831+20
+.L1764:
+	ldr	r3, .L1835+20
 	movs	r2, #1
-	ldr	r0, .L1831+24
-	ldr	r7, .L1831+16
+	ldr	r0, .L1835+24
+	ldr	r7, .L1835+16
 	strh	r2, [r3, #0]	@ movhi
 	bl	FtlMapBlkWriteDumpData
 	ldr	sl, [sp, #20]
 	str	r6, [sp, #12]
-.L1777:
-	ldr	r3, .L1831+28
+.L1781:
+	ldr	r3, .L1835+28
 	movs	r6, #0
-	ldr	r0, .L1831+12
+	ldr	r0, .L1835+12
 	mov	r2, r4
 	ldr	lr, [r7, #0]
 	ldrb	fp, [r3, #0]	@ zero_extendqisi2
 	mov	r3, r6
 	ldrh	ip, [r0, #0]
-	b	.L1778
-.L1781:
+	b	.L1782
+.L1785:
 	ldrh	r0, [r2, #16]
 	movw	r1, #65535
 	cmp	r0, r1
-	beq	.L1779
+	beq	.L1783
 	mov	r8, #36
 	orr	r0, sl, r0, lsl #10
 	mla	r1, r8, r6, lr
 	str	r0, [r1, #4]
 	ldrb	r8, [r4, #8]	@ zero_extendqisi2
 	cmp	r8, #1
-	bne	.L1780
+	bne	.L1784
 	cmp	fp, #0
-	beq	.L1780
+	beq	.L1784
 	orr	r0, r0, #-2147483648
 	str	r0, [r1, #4]
-.L1780:
+.L1784:
 	adds	r6, r6, #1
 	uxth	r6, r6
-.L1779:
+.L1783:
 	adds	r3, r3, #1
 	adds	r2, r2, #2
 	uxth	r3, r3
-.L1778:
+.L1782:
 	cmp	r3, ip
-	bne	.L1781
+	bne	.L1785
 	ldr	r0, [r7, #0]
 	mov	r1, r6
 	ldr	r2, [sp, #24]
@@ -16195,8 +16236,8 @@ FtlRecoverySuperblock:
 	str	sl, [sp, #32]
 	muls	r3, r6, r3
 	str	r3, [sp, #40]
-	b	.L1782
-.L1806:
+	b	.L1786
+.L1810:
 	ldr	r3, [r7, #0]
 	add	sl, r3, r8
 	ldr	r6, [sl, #4]
@@ -16206,40 +16247,40 @@ FtlRecoverySuperblock:
 	ldr	ip, [sp, #32]
 	ldr	r3, [sp, #20]
 	cmp	ip, r3
-	bcc	.L1783
-	bne	.L1784
+	bcc	.L1787
+	bne	.L1788
 	ldr	r3, [sp, #28]
 	cmp	r0, r3
-	bcc	.L1783
-.L1784:
+	bcc	.L1787
+.L1788:
 	ldr	ip, [sp, #32]
 	ldr	r3, [sp, #12]
 	cmp	ip, r3
-	bne	.L1785
+	bne	.L1789
 	ldr	ip, [sp, #16]
 	cmp	r0, ip
-	beq	.L1820
-.L1785:
+	beq	.L1824
+.L1789:
 	ldr	r3, [sl, #0]
 	adds	r3, r3, #1
-	beq	.L1787
+	beq	.L1791
 	ldr	r6, [sl, #12]
 	movw	r3, #61589
 	ldrh	r2, [r6, #0]
 	cmp	r2, r3
-	bne	.L1794
-.L1788:
+	bne	.L1798
+.L1792:
 	ldr	r5, [r6, #4]
 	adds	r3, r5, #1
-	beq	.L1789
-	ldr	sl, .L1831+32
+	beq	.L1793
+	ldr	sl, .L1835+32
 	mov	r0, r5
 	ldr	r1, [sl, #0]
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L1789
+	cbz	r0, .L1793
 	adds	r3, r5, #1
 	str	r3, [sl, #0]
-.L1789:
+.L1793:
 	ldr	sl, [r6, #8]
 	add	r1, sp, #56
 	ldr	r3, [r6, #12]
@@ -16247,17 +16288,17 @@ FtlRecoverySuperblock:
 	mov	r0, sl
 	str	r3, [sp, #52]
 	bl	log2phys
-	ldr	r0, .L1831+8
+	ldr	r0, .L1835+8
 	ldr	r1, [r0, #0]
 	adds	r0, r1, #1
-	beq	.L1790
+	beq	.L1794
 	mov	r0, r5
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1790
+	beq	.L1794
 	ldr	r3, [sp, #52]
 	adds	r1, r3, #1
-	beq	.L1791
+	beq	.L1795
 	ldr	r0, [r7, #0]
 	movs	r2, #0
 	add	r0, r0, r8
@@ -16273,40 +16314,40 @@ FtlRecoverySuperblock:
 	add	fp, r3, r8
 	ldr	r3, [r3, r8]
 	adds	r3, r3, #1
-	bne	.L1792
-	b	.L1793
-.L1791:
+	bne	.L1796
+	b	.L1797
+.L1795:
 	ldr	r3, [sp, #60]
 	ldr	r2, [sp, #56]
 	cmp	r2, r3
-	bne	.L1794
+	bne	.L1798
 	mov	r0, sl
 	add	r1, sp, #52
 	movs	r2, #1
 	bl	log2phys
-.L1794:
+.L1798:
 	ldrh	r0, [r4, #0]
-	b	.L1825
-.L1792:
+	b	.L1829
+.L1796:
 	ldr	r3, [sp, #8]
 	ldr	r6, [r3, #8]
 	cmp	r6, sl
-	bne	.L1793
-	ldr	r1, .L1831+8
+	bne	.L1797
+	ldr	r1, .L1835+8
 	ldr	r0, [r1, #0]
 	ldr	r1, [sp, #36]
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L1793
+	cbz	r0, .L1797
 	ldr	r3, [sp, #56]
 	ldr	r2, [sp, #60]
 	cmp	r3, r2
-	beq	.L1798
-.L1795:
+	beq	.L1802
+.L1799:
 	ldr	r2, [sp, #52]
 	cmp	r3, r2
-	beq	.L1793
+	beq	.L1797
 	adds	r2, r3, #1
-	beq	.L1796
+	beq	.L1800
 	ldr	r2, [fp, #12]
 	mov	r0, fp
 	str	r3, [fp, #4]
@@ -16314,77 +16355,77 @@ FtlRecoverySuperblock:
 	str	r2, [sp, #8]
 	movs	r2, #0
 	bl	FlashReadPages
-	b	.L1797
-.L1796:
+	b	.L1801
+.L1800:
 	str	r3, [fp, #0]
-.L1797:
+.L1801:
 	ldr	r3, [r7, #0]
 	ldr	r3, [r3, r8]
 	adds	r3, r3, #1
-	beq	.L1798
+	beq	.L1802
 	ldr	r3, [sp, #8]
-	ldr	r1, .L1831+8
+	ldr	r1, .L1835+8
 	ldr	sl, [r3, #4]
 	ldr	r0, [r1, #0]
 	mov	r1, sl
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L1798
+	cbz	r0, .L1802
 	ldr	r0, [sp, #36]
 	mov	r1, sl
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L1793
-.L1798:
+	cbz	r0, .L1797
+.L1802:
 	mov	r0, r6
 	ldr	r1, [sp, #52]
 	bl	FtlReUsePrevPpa
-.L1793:
+.L1797:
 	ldrh	r0, [r4, #0]
 	mov	r3, #-1
 	str	r3, [sp, #52]
 	bl	decrement_vpc_count
-	b	.L1800
-.L1832:
+	b	.L1804
+.L1836:
 	.align	2
-.L1831:
+.L1835:
 	.word	.LANCHOR9
 	.word	.LANCHOR229
-	.word	.LANCHOR141
-	.word	.LANCHOR53
+	.word	.LANCHOR129
+	.word	.LANCHOR41
 	.word	.LANCHOR177
 	.word	.LANCHOR230
-	.word	.LANCHOR122
+	.word	.LANCHOR110
 	.word	.LANCHOR7
 	.word	.LANCHOR157
-.L1790:
+.L1794:
 	ldr	r3, [sp, #60]
 	ldr	r2, [sp, #56]
 	cmp	r2, r3
-	beq	.L1800
+	beq	.L1804
 	movs	r2, #1
 	mov	r0, sl
 	add	r1, sp, #60
 	bl	log2phys
 	ldr	fp, [sp, #56]
 	cmp	fp, #-1
-	beq	.L1800
+	beq	.L1804
 	ldr	r3, [sp, #52]
 	cmp	fp, r3
-	beq	.L1800
+	beq	.L1804
 	ubfx	r0, fp, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L1833
+	ldr	r3, .L1837
 	ldrh	r3, [r3, #0]
 	cmp	r3, r0
-	beq	.L1801
-	ldr	r3, .L1833+4
+	beq	.L1805
+	ldr	r3, .L1837+4
 	ldrh	r3, [r3, #0]
 	cmp	r3, r0
-	beq	.L1801
-	ldr	r3, .L1833+8
+	beq	.L1805
+	ldr	r3, .L1837+8
 	ldrh	r3, [r3, #0]
 	cmp	r3, r0
-	bne	.L1800
-.L1801:
+	bne	.L1804
+.L1805:
 	ldr	r0, [r7, #0]
 	movs	r1, #1
 	movs	r2, #0
@@ -16395,129 +16436,129 @@ FtlRecoverySuperblock:
 	ldr	r1, [r6, #4]
 	ldr	r3, [r3, #0]
 	adds	r3, r3, #1
-	beq	.L1800
+	beq	.L1804
 	mov	r0, r5
 	bl	ftl_cmp_data_ver
-	cbnz	r0, .L1800
+	cbnz	r0, .L1804
 	mov	r0, sl
 	add	r1, sp, #56
 	movs	r2, #1
 	bl	log2phys
-.L1800:
+.L1804:
 	ldr	r0, [sp, #52]
 	adds	r3, r0, #1
-	beq	.L1783
+	beq	.L1787
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L1833+12
+	ldr	r3, .L1837+12
 	ldrh	r3, [r3, #0]
 	cmp	r3, r0
 	mov	r6, r0
-	bhi	.L1802
-	ldr	r1, .L1833+16
+	bhi	.L1806
+	ldr	r1, .L1837+16
 	movw	r2, #2177
-	ldr	r0, .L1833+20
+	ldr	r0, .L1837+20
 	bl	printf
-	ldr	r0, .L1833+24
-	ldr	r1, .L1833+28
+	ldr	r0, .L1837+24
+	ldr	r1, .L1837+28
 	bl	printf
-.L1802:
-	ldr	r3, .L1833+32
+.L1806:
+	ldr	r3, .L1837+32
 	ldr	r3, [r3, #0]
 	ldrh	r3, [r3, r6, lsl #1]
-	cbz	r3, .L1803
+	cbz	r3, .L1807
 	mov	r0, r6
-.L1825:
+.L1829:
 	bl	decrement_vpc_count
-	b	.L1783
-.L1803:
+	b	.L1787
+.L1807:
 	mov	r1, r6
-	ldr	r0, .L1833+36
+	ldr	r0, .L1837+36
 	bl	printf
-	b	.L1783
-.L1787:
+	b	.L1787
+.L1791:
 	ldrh	r3, [r4, #0]
 	mov	r1, r6
-	ldr	r2, .L1833+40
-	ldr	r0, .L1833+44
+	ldr	r2, .L1837+40
+	ldr	r0, .L1837+44
 	strh	r3, [r2, #0]	@ movhi
 	mov	r2, r5
 	bl	printf
-	ldr	r0, .L1833+48
+	ldr	r0, .L1837+48
 	ldr	r3, [r0, #0]
 	cmp	r3, #31
-	bhi	.L1804
+	bhi	.L1808
 	ldr	r2, [sp, #60]
-	ldr	r1, .L1833+52
+	ldr	r1, .L1837+52
 	str	r2, [r1, r3, lsl #2]
 	adds	r3, r3, #1
 	str	r3, [r0, #0]
-.L1804:
+.L1808:
 	ldrh	r0, [r4, #0]
 	bl	decrement_vpc_count
-	ldr	r2, .L1833+56
+	ldr	r2, .L1837+56
 	ldr	r3, [r2, #0]
 	adds	r1, r3, #1
-	bne	.L1805
+	bne	.L1809
 	str	r5, [r2, #0]
-	b	.L1783
-.L1805:
+	b	.L1787
+.L1809:
 	cmp	r3, r5
 	itt	hi
-	ldrhi	r3, .L1833+56
+	ldrhi	r3, .L1837+56
 	strhi	r5, [r3, #0]
-.L1783:
+.L1787:
 	add	r8, r8, #36
-.L1782:
+.L1786:
 	ldr	ip, [sp, #40]
 	cmp	r8, ip
-	bne	.L1806
+	bne	.L1810
 	ldr	sl, [sp, #32]
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	add	sl, sl, #1
 	cmp	r3, #1
 	uxth	sl, sl
-	bne	.L1807
-	ldr	r3, .L1833+60
+	bne	.L1811
+	ldr	r3, .L1837+60
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1807
-	ldr	r3, .L1833+64
+	cbz	r3, .L1811
+	ldr	r3, .L1837+64
 	ldrh	r3, [r3, #0]
 	cmp	r3, sl
-	bne	.L1807
+	bne	.L1811
 	ldr	r3, [sp, #12]
 	cmp	r3, sl
-	beq	.L1820
-.L1807:
-	ldr	r3, .L1833+68
+	beq	.L1824
+.L1811:
+	ldr	r3, .L1837+68
 	ldrh	r3, [r3, #0]
 	cmp	sl, r3
-	bne	.L1777
-	ldr	r2, .L1833+72
+	bne	.L1781
+	ldr	r2, .L1837+72
 	movs	r3, #0
 	strh	sl, [r4, #2]	@ movhi
 	strh	r3, [r4, #4]	@ movhi
 	ldrh	r1, [r2, #0]
 	movw	r2, #65535
 	ldr	r0, [sp, #44]
-	b	.L1808
-.L1810:
+	b	.L1812
+.L1814:
 	adds	r0, r0, #2
 	ldrh	r5, [r0, #14]
 	cmp	r5, r2
-	beq	.L1809
-.L1826:
+	beq	.L1813
+.L1830:
 	strb	r3, [r4, #6]
-	b	.L1737
-.L1809:
+	b	.L1741
+.L1813:
 	adds	r3, r3, #1
 	uxth	r3, r3
-.L1808:
+.L1812:
 	cmp	r3, r1
-	bne	.L1810
-	b	.L1737
-.L1820:
-.L1786:
+	bne	.L1814
+	b	.L1741
+.L1824:
+.L1790:
 	ldr	r6, [sp, #12]
 	mov	r0, r4
 	ldr	r5, [sp, #16]
@@ -16525,34 +16566,34 @@ FtlRecoverySuperblock:
 	mov	r2, r5
 	strh	r6, [r4, #2]	@ movhi
 	strb	r5, [r4, #6]
-.L1827:
+.L1831:
 	bl	ftl_sb_update_avl_pages
-.L1737:
+.L1741:
 	movs	r0, #0
-	add	sp, sp, #64
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1834:
-	.align	2
-.L1833:
-	.word	.LANCHOR109
-	.word	.LANCHOR110
-	.word	.LANCHOR111
-	.word	.LANCHOR55
+	add	sp, sp, #64
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L1838:
+	.align	2
+.L1837:
+	.word	.LANCHOR97
+	.word	.LANCHOR98
+	.word	.LANCHOR99
+	.word	.LANCHOR43
 	.word	.LANCHOR228
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.word	.LANCHOR101
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
+	.word	.LANCHOR89
 	.word	.LC42
 	.word	.LANCHOR229
 	.word	.LC43
 	.word	.LANCHOR231
 	.word	.LANCHOR232
-	.word	.LANCHOR141
+	.word	.LANCHOR129
 	.word	.LANCHOR7
-	.word	.LANCHOR69
-	.word	.LANCHOR68
-	.word	.LANCHOR53
+	.word	.LANCHOR57
+	.word	.LANCHOR56
+	.word	.LANCHOR41
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
 	.section	.text.FtlPowerLostRecovery,"ax",%progbits
 	.align	1
@@ -16565,13 +16606,13 @@ FtlPowerLostRecovery:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #0
-	ldr	r3, .L1836
-	ldr	r5, .L1836+4
+	ldr	r3, .L1840
+	ldr	r5, .L1840+4
 	str	r4, [r3, #0]
 	mov	r0, r5
 	bl	FtlRecoverySuperblock
 	mov	r0, r5
-	ldr	r5, .L1836+8
+	ldr	r5, .L1840+8
 	bl	FtlSlcSuperblockCheck
 	mov	r0, r5
 	bl	FtlRecoverySuperblock
@@ -16582,12 +16623,12 @@ FtlPowerLostRecovery:
 	bl	decrement_vpc_count
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L1837:
+.L1841:
 	.align	2
-.L1836:
+.L1840:
 	.word	.LANCHOR231
-	.word	.LANCHOR109
-	.word	.LANCHOR110
+	.word	.LANCHOR97
+	.word	.LANCHOR98
 	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
 	.section	.text.FtlSysBlkInit,"ax",%progbits
 	.align	1
@@ -16598,25 +16639,25 @@ FtlPowerLostRecovery:
 FtlSysBlkInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1848
+	ldr	r3, .L1852
 	movs	r2, #0
 	push	{r4, r5, r6, lr}
 	movw	r4, #65535
 	strh	r2, [r3, #0]	@ movhi
-	ldr	r3, .L1848+4
+	ldr	r3, .L1852+4
 	strh	r4, [r3, #0]	@ movhi
-	ldr	r3, .L1848+8
+	ldr	r3, .L1852+8
 	ldrh	r0, [r3, #0]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlScanSysBlk
-	ldr	r3, .L1848+12
+	ldr	r3, .L1852+12
 	ldrh	r3, [r3, #0]
 	cmp	r3, r4
-	beq	.L1844
+	beq	.L1848
 	bl	FtlLoadSysInfo
 	mov	r4, r0
 	cmp	r0, #0
-	bne	.L1845
+	bne	.L1849
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -16626,39 +16667,39 @@ FtlSysBlkInit:
 	bl	FtlPowerLostRecovery
 	movs	r0, #1
 	bl	FtlUpdateVaildLpn
-	ldr	r3, .L1848+16
+	ldr	r3, .L1852+16
 	ldrh	r1, [r3, #0]
-	ldr	r3, .L1848+20
+	ldr	r3, .L1852+20
 	ldr	r2, [r3, #0]
 	mov	r3, r4
-	b	.L1840
-.L1842:
+	b	.L1844
+.L1846:
 	adds	r0, r2, r4
 	adds	r4, r4, #12
 	ldr	r0, [r0, #4]
 	cmp	r0, #0
-	blt	.L1841
+	blt	.L1845
 	adds	r3, r3, #1
-.L1840:
+.L1844:
 	cmp	r3, r1
-	blt	.L1842
-	b	.L1847
-.L1841:
-	ldr	r5, .L1848+24
+	blt	.L1846
+	b	.L1851
+.L1845:
+	ldr	r5, .L1852+24
 	movs	r6, #0
-	ldr	r4, .L1848+28
+	ldr	r4, .L1852+28
 	mov	r0, r5
 	bl	FtlSuperblockPowerLostFix
 	mov	r0, r4
 	bl	FtlSuperblockPowerLostFix
-	ldr	r3, .L1848+32
+	ldr	r3, .L1852+32
 	ldrh	r2, [r5, #0]
 	ldrh	r1, [r5, #4]
 	ldr	r3, [r3, #0]
 	ldrh	r0, [r3, r2, lsl #1]
 	subs	r1, r0, r1
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r2, .L1848+36
+	ldr	r2, .L1852+36
 	ldrh	r0, [r4, #4]
 	strb	r6, [r5, #6]
 	ldrh	r1, [r2, #0]
@@ -16669,14 +16710,14 @@ FtlSysBlkInit:
 	subs	r0, r5, r0
 	strh	r0, [r3, r1, lsl #1]	@ movhi
 	ldrh	r3, [r2, #0]
-	ldr	r0, .L1848+40
+	ldr	r0, .L1852+40
 	strb	r6, [r4, #6]
 	strh	r3, [r4, #2]	@ movhi
 	strh	r6, [r4, #4]	@ movhi
 	bl	FtlMapBlkWriteDumpData
-	ldr	r0, .L1848+44
+	ldr	r0, .L1852+44
 	bl	FtlMapBlkWriteDumpData
-	ldr	r3, .L1848+48
+	ldr	r3, .L1852+48
 	ldrh	r2, [r3, #30]
 	adds	r2, r2, #1
 	strh	r2, [r3, #30]	@ movhi
@@ -16685,34 +16726,34 @@ FtlSysBlkInit:
 	bl	FtlVpcTblFlush
 	mov	r0, r6
 	pop	{r4, r5, r6, pc}
-.L1844:
+.L1848:
 	mov	r0, #-1
 	pop	{r4, r5, r6, pc}
-.L1845:
+.L1849:
 	mov	r0, #-1
 	pop	{r4, r5, r6, pc}
-.L1847:
-	ldr	r3, .L1848
+.L1851:
+	ldr	r3, .L1852
 	ldrh	r0, [r3, #0]
 	cmp	r0, #0
-	bne	.L1841
+	bne	.L1845
 	pop	{r4, r5, r6, pc}
-.L1849:
+.L1853:
 	.align	2
-.L1848:
+.L1852:
 	.word	.LANCHOR230
 	.word	.LANCHOR229
-	.word	.LANCHOR54
+	.word	.LANCHOR42
 	.word	.LANCHOR196
-	.word	.LANCHOR83
-	.word	.LANCHOR114
-	.word	.LANCHOR109
+	.word	.LANCHOR71
+	.word	.LANCHOR102
+	.word	.LANCHOR97
+	.word	.LANCHOR98
+	.word	.LANCHOR89
+	.word	.LANCHOR56
 	.word	.LANCHOR110
-	.word	.LANCHOR101
-	.word	.LANCHOR68
-	.word	.LANCHOR122
 	.word	.LANCHOR215
-	.word	.LANCHOR143
+	.word	.LANCHOR131
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.section	.text.rk_ftl_garbage_collect,"ax",%progbits
 	.align	1
@@ -16723,205 +16764,205 @@ FtlSysBlkInit:
 rk_ftl_garbage_collect:
 	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1912
+	ldr	r3, .L1916
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	sub	sp, sp, #32
 	ldr	r2, [r3, #0]
 	cmp	r2, #0
-	bne	.L1901
-	ldr	r3, .L1912+4
+	bne	.L1905
+	ldr	r3, .L1916+4
 	ldr	r3, [r3, #0]
 	cmp	r3, #0
-	bne	.L1902
-	ldr	r2, .L1912+8
+	bne	.L1906
+	ldr	r2, .L1916+8
 	ldrh	r2, [r2, #0]
 	cmp	r2, #47
-	bls	.L1903
-	ldr	r3, .L1912+12
+	bls	.L1907
+	ldr	r3, .L1916+12
 	movw	r5, #65535
 	ldrh	r4, [r3, #0]
 	cmp	r4, r5
-	beq	.L1852
-	ldr	r1, .L1912+16
+	beq	.L1856
+	ldr	r1, .L1916+16
 	ldrh	r2, [r1, #0]
 	cmp	r2, r5
 	itt	eq
 	strheq	r4, [r1, #0]	@ movhi
 	strheq	r2, [r3, #0]	@ movhi
-.L1852:
+.L1856:
 	cmp	r0, #0
-	bne	.L1904
-	ldr	r3, .L1912+20
+	bne	.L1908
+	ldr	r3, .L1916+20
 	ldrh	r3, [r3, #0]
 	cmp	r3, #24
-	bhi	.L1905
-	ldr	r2, .L1912+24
+	bhi	.L1909
+	ldr	r2, .L1916+24
 	cmp	r3, #16
 	ldrh	r4, [r2, #0]
-	bls	.L1855
+	bls	.L1859
 	lsrs	r4, r4, #5
-	b	.L1854
-.L1855:
+	b	.L1858
+.L1859:
 	cmp	r3, #12
-	bls	.L1856
+	bls	.L1860
 	lsrs	r4, r4, #4
-	b	.L1854
-.L1856:
+	b	.L1858
+.L1860:
 	cmp	r3, #8
-	bls	.L1854
+	bls	.L1858
 	lsrs	r4, r4, #2
-	b	.L1854
-.L1905:
+	b	.L1858
+.L1909:
 	movs	r4, #1
-.L1854:
-	ldr	r2, .L1912+28
+.L1858:
+	ldr	r2, .L1916+28
 	ldrh	r1, [r2, #0]
 	cmp	r1, r3
 	mov	r1, r2
-	bcs	.L1858
-	ldr	r3, .L1912+32
+	bcs	.L1862
+	ldr	r3, .L1916+32
 	movw	r0, #65535
 	ldrh	r3, [r3, #0]
 	cmp	r3, r0
-	bne	.L1859
-	ldr	r0, .L1912+16
+	bne	.L1863
+	ldr	r0, .L1916+16
 	ldrh	r0, [r0, #0]
 	cmp	r0, r3
-	bne	.L1859
-	ldr	r3, .L1912+36
+	bne	.L1863
+	ldr	r3, .L1916+36
 	ldrh	r0, [r3, #0]
-	cbnz	r0, .L1860
-	ldr	r3, .L1912+40
+	cbnz	r0, .L1864
+	ldr	r3, .L1916+40
 	movs	r1, #3
 	ldr	r3, [r3, #0]
 	muls	r1, r3, r1
-	ldr	r3, .L1912+44
+	ldr	r3, .L1916+44
 	ldr	r3, [r3, #0]
 	cmp	r3, r1, lsr #2
-	bcs	.L1861
-.L1860:
-	ldr	r3, .L1912+48
+	bcs	.L1865
+.L1864:
+	ldr	r3, .L1916+48
 	movs	r2, #3
 	ldrh	r3, [r3, #0]
 	muls	r2, r3, r2
-	ldr	r3, .L1912+28
+	ldr	r3, .L1916+28
 	asrs	r2, r2, #2
 	strh	r2, [r3, #0]	@ movhi
-	b	.L1862
-.L1861:
+	b	.L1866
+.L1865:
 	movs	r3, #18
 	strh	r3, [r2, #0]	@ movhi
-.L1862:
-	ldr	r3, .L1912+52
+.L1866:
+	ldr	r3, .L1916+52
 	movs	r2, #0
 	str	r2, [r3, #0]
-	b	.L1851
-.L1859:
-	ldr	r3, .L1912+48
+	b	.L1855
+.L1863:
+	ldr	r3, .L1916+48
 	movs	r2, #3
 	ldrh	r3, [r3, #0]
 	muls	r3, r2, r3
 	asrs	r3, r3, #2
 	strh	r3, [r1, #0]	@ movhi
-.L1858:
-	ldr	r3, .L1912+56
+.L1862:
+	ldr	r3, .L1916+56
 	ldrh	r3, [r3, #0]
-	cbz	r3, .L1853
+	cbz	r3, .L1857
 	adds	r4, r4, #32
 	uxth	r4, r4
-	b	.L1853
-.L1904:
+	b	.L1857
+.L1908:
 	movs	r4, #1
-.L1853:
-	ldr	r3, .L1912+60
+.L1857:
+	ldr	r3, .L1916+60
 	ldrh	r2, [r3, #0]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1864
-	ldr	r3, .L1912+16
+	bne	.L1868
+	ldr	r3, .L1916+16
 	ldrh	r1, [r3, #0]
 	cmp	r1, r2
-	beq	.L1865
-	ldr	r0, .L1912+64
+	beq	.L1869
+	ldr	r0, .L1916+64
 	ldr	r0, [r0, #0]
 	ldrh	r1, [r0, r1, lsl #1]
-	cbnz	r1, .L1866
+	cbnz	r1, .L1870
 	strh	r2, [r3, #0]	@ movhi
-.L1866:
+.L1870:
 	ldrh	r1, [r3, #0]
-	ldr	r2, .L1912+60
+	ldr	r2, .L1916+60
 	strh	r1, [r2, #0]	@ movhi
 	movw	r2, #65535
 	strh	r2, [r3, #0]	@ movhi
-.L1865:
-	ldr	r5, .L1912+60
+.L1869:
+	ldr	r5, .L1916+60
 	movw	r6, #65535
 	movs	r3, #0
 	ldrh	r0, [r5, #0]
 	strb	r3, [r5, #8]
 	cmp	r0, r6
-	beq	.L1864
+	beq	.L1868
 	bl	IsBlkInGcList
-	cbz	r0, .L1867
+	cbz	r0, .L1871
 	strh	r6, [r5, #0]	@ movhi
-.L1867:
-	ldr	r3, .L1912+68
-	ldr	r6, .L1912+60
+.L1871:
+	ldr	r3, .L1916+68
+	ldr	r6, .L1916+60
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1868
+	cbz	r3, .L1872
 	ldrh	r0, [r6, #0]
 	bl	ftl_get_blk_mode
 	strb	r0, [r6, #8]
-.L1868:
+.L1872:
 	ldrh	r2, [r6, #0]
 	movw	r3, #65535
-	ldr	r5, .L1912+60
+	ldr	r5, .L1916+60
 	cmp	r2, r3
-	beq	.L1864
+	beq	.L1868
 	mov	r0, r5
 	bl	make_superblock
-	ldr	r2, .L1912+72
+	ldr	r2, .L1916+72
 	movs	r3, #0
 	strh	r3, [r5, #2]	@ movhi
 	strb	r3, [r5, #6]
 	strh	r3, [r2, #0]	@ movhi
-	ldr	r3, .L1912+64
+	ldr	r3, .L1916+64
 	ldrh	r2, [r5, #0]
 	ldr	r3, [r3, #0]
 	ldrh	r2, [r3, r2, lsl #1]
-	ldr	r3, .L1912+76
+	ldr	r3, .L1916+76
 	strh	r2, [r3, #0]	@ movhi
-.L1864:
-	ldr	r2, .L1912+60
-	ldr	r1, .L1912+80
+.L1868:
+	ldr	r2, .L1916+60
+	ldr	r1, .L1916+80
 	ldrh	r3, [r2, #0]
 	ldrh	r1, [r1, #0]
 	cmp	r1, r3
-	beq	.L1869
-	ldr	r1, .L1912+84
+	beq	.L1873
+	ldr	r1, .L1916+84
 	ldrh	r1, [r1, #0]
 	cmp	r1, r3
-	bne	.L1906
-.L1870:
-.L1869:
+	bne	.L1910
+.L1874:
+.L1873:
 	movw	r3, #65535
 	strh	r3, [r2, #0]	@ movhi
-	b	.L1911
-.L1906:
-	ldr	r6, .L1912+88
-	ldr	r7, .L1912+92
-.L1908:
-	ldr	r3, .L1912+60
+	b	.L1915
+.L1910:
+	ldr	r6, .L1916+88
+	ldr	r7, .L1916+92
+.L1912:
+	ldr	r3, .L1916+60
 	movw	r2, #65535
 	ldrh	r8, [r3, #0]
 	cmp	r8, r2
-	bne	.L1872
-	ldr	r2, .L1912+52
+	bne	.L1876
+	ldr	r2, .L1916+52
 	mov	sl, r3
-	ldr	fp, .L1912+64
+	ldr	fp, .L1916+64
 	movs	r1, #0
 	str	r1, [r2, #0]
-.L1907:
+.L1911:
 	ldrh	r1, [r6, #0]
 	mov	r0, r1
 	str	r1, [sp, #8]
@@ -16929,175 +16970,175 @@ rk_ftl_garbage_collect:
 	uxth	r5, r0
 	strh	r5, [sl, #0]	@ movhi
 	cmp	r5, r8
-	bne	.L1874
-	ldr	r3, .L1912+88
+	bne	.L1878
+	ldr	r3, .L1916+88
 	movs	r2, #0
 	movs	r0, #8
 	strh	r2, [r3, #0]	@ movhi
-	b	.L1851
-.L1874:
+	b	.L1855
+.L1878:
 	mov	r0, r5
 	bl	IsBlkInGcList
 	ldr	r2, [sp, #8]
 	adds	r3, r2, #1
-	cbnz	r0, .L1909
-.L1875:
-	ldr	r1, .L1912+24
+	cbnz	r0, .L1913
+.L1879:
+	ldr	r1, .L1916+24
 	uxth	r0, r3
 	ldr	r3, [fp, #0]
 	strh	r0, [r6, #0]	@ movhi
 	ldrh	ip, [r1, #0]
-	ldr	r1, .L1912+96
+	ldr	r1, .L1916+96
 	ldrh	r2, [r3, r5, lsl #1]
 	ldrh	r1, [r1, #0]
 	mul	r1, r1, ip
 	cmp	r2, r1, asr #1
-	bgt	.L1877
+	bgt	.L1881
 	cmp	r0, #48
-	bls	.L1878
+	bls	.L1882
 	cmp	r2, #8
-	bls	.L1878
-	ldr	r2, .L1912+100
+	bls	.L1882
+	ldr	r2, .L1916+100
 	ldrh	r2, [r2, #0]
 	cmp	r2, #35
-	bhi	.L1878
-.L1877:
+	bhi	.L1882
+.L1881:
 	movs	r2, #0
 	strh	r2, [r6, #0]	@ movhi
-.L1878:
+.L1882:
 	ldrh	r2, [r3, r5, lsl #1]
-	ldr	r3, .L1912+60
+	ldr	r3, .L1916+60
 	cmp	r2, r1
-	blt	.L1879
+	blt	.L1883
 	movw	r2, #65535
 	strh	r2, [r3, #0]	@ movhi
-	ldr	r3, .L1912+88
+	ldr	r3, .L1916+88
 	movs	r2, #0
 	strh	r2, [r3, #0]	@ movhi
-	b	.L1911
-.L1879:
+	b	.L1915
+.L1883:
 	cmp	r2, #0
-	bne	.L1880
+	bne	.L1884
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	ldrh	r3, [r6, #0]
 	adds	r3, r3, #1
-.L1909:
-	strh	r3, [r6, #0]	@ movhi
-	b	.L1907
 .L1913:
+	strh	r3, [r6, #0]	@ movhi
+	b	.L1911
+.L1917:
 	.align	2
-.L1912:
-	.word	.LANCHOR94
+.L1916:
+	.word	.LANCHOR82
 	.word	.LANCHOR168
-	.word	.LANCHOR103
-	.word	.LANCHOR150
-	.word	.LANCHOR149
-	.word	.LANCHOR106
-	.word	.LANCHOR68
+	.word	.LANCHOR91
+	.word	.LANCHOR138
+	.word	.LANCHOR137
+	.word	.LANCHOR94
+	.word	.LANCHOR56
 	.word	.LANCHOR173
-	.word	.LANCHOR111
+	.word	.LANCHOR99
 	.word	.LANCHOR233
-	.word	.LANCHOR88
-	.word	.LANCHOR118
+	.word	.LANCHOR76
+	.word	.LANCHOR106
 	.word	.LANCHOR201
 	.word	.LANCHOR169
-	.word	.LANCHOR151
+	.word	.LANCHOR139
 	.word	.LANCHOR202
-	.word	.LANCHOR101
+	.word	.LANCHOR89
 	.word	.LANCHOR7
 	.word	.LANCHOR234
 	.word	.LANCHOR235
-	.word	.LANCHOR109
-	.word	.LANCHOR110
+	.word	.LANCHOR97
+	.word	.LANCHOR98
 	.word	.LANCHOR175
-	.word	.LANCHOR135
-	.word	.LANCHOR53
-	.word	.LANCHOR145
-.L1880:
+	.word	.LANCHOR123
+	.word	.LANCHOR41
+	.word	.LANCHOR133
+.L1884:
 	movs	r2, #0
 	strb	r2, [r3, #8]
-	ldr	r2, .L1914
+	ldr	r2, .L1918
 	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	cbz	r2, .L1881
+	cbz	r2, .L1885
 	mov	r0, r5
 	str	r3, [sp, #4]
 	bl	ftl_get_blk_mode
 	ldr	r3, [sp, #4]
 	strb	r0, [r3, #8]
-.L1881:
-	ldr	r5, .L1914+4
-	ldr	r3, .L1914+8
+.L1885:
+	ldr	r5, .L1918+4
+	ldr	r3, .L1918+8
 	ldrh	r2, [r5, #0]
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bne	.L1882
-	ldr	r1, .L1914+12
+	bne	.L1886
+	ldr	r1, .L1918+12
 	movw	r2, #835
-	ldr	r0, .L1914+16
+	ldr	r0, .L1918+16
 	bl	printf
-	ldr	r0, .L1914+20
-	ldr	r1, .L1914+24
+	ldr	r0, .L1918+20
+	ldr	r1, .L1918+24
 	bl	printf
-.L1882:
-	ldr	r3, .L1914+28
+.L1886:
+	ldr	r3, .L1918+28
 	ldrh	r2, [r5, #0]
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bne	.L1883
-	ldr	r1, .L1914+12
+	bne	.L1887
+	ldr	r1, .L1918+12
 	mov	r2, #836
-	ldr	r0, .L1914+16
+	ldr	r0, .L1918+16
 	bl	printf
-	ldr	r0, .L1914+20
-	ldr	r1, .L1914+24
+	ldr	r0, .L1918+20
+	ldr	r1, .L1918+24
 	bl	printf
-.L1883:
-	ldr	r5, .L1914+4
-	ldr	r3, .L1914+32
+.L1887:
+	ldr	r5, .L1918+4
+	ldr	r3, .L1918+32
 	ldrh	r2, [r5, #0]
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bne	.L1884
-	ldr	r1, .L1914+12
+	bne	.L1888
+	ldr	r1, .L1918+12
 	movw	r2, #837
-	ldr	r0, .L1914+16
+	ldr	r0, .L1918+16
 	bl	printf
-	ldr	r0, .L1914+20
-	ldr	r1, .L1914+24
+	ldr	r0, .L1918+20
+	ldr	r1, .L1918+24
 	bl	printf
-.L1884:
-	ldr	r0, .L1914+4
+.L1888:
+	ldr	r0, .L1918+4
 	bl	make_superblock
-	ldr	r1, .L1914+36
+	ldr	r1, .L1918+36
 	movs	r3, #0
 	ldrh	r0, [r5, #0]
 	strh	r3, [r1, #0]	@ movhi
-	ldr	r1, .L1914+40
+	ldr	r1, .L1918+40
 	ldr	r1, [r1, #0]
 	ldrh	r0, [r1, r0, lsl #1]
-	ldr	r1, .L1914+44
+	ldr	r1, .L1918+44
 	strh	r3, [r5, #2]	@ movhi
 	strb	r3, [r5, #6]
 	strh	r0, [r1, #0]	@ movhi
-.L1872:
-	ldr	r3, .L1914+48
+.L1876:
+	ldr	r3, .L1918+48
 	movs	r2, #1
 	str	r2, [r3, #0]
-	ldr	r3, .L1914+52
+	ldr	r3, .L1918+52
 	ldrh	r3, [r3, #0]
 	str	r3, [sp, #8]
-	ldr	r3, .L1914
+	ldr	r3, .L1918
 	ldrb	r2, [r3, #0]	@ zero_extendqisi2
-	ldr	r3, .L1914+4
-	cbz	r2, .L1885
+	ldr	r3, .L1918+4
+	cbz	r2, .L1889
 	ldrb	r2, [r3, #8]	@ zero_extendqisi2
 	cmp	r2, #1
-	bne	.L1885
-	ldr	r2, .L1914+56
+	bne	.L1889
+	ldr	r2, .L1918+56
 	ldrh	r2, [r2, #0]
 	str	r2, [sp, #8]
-.L1885:
+.L1889:
 	ldrh	r3, [r3, #2]
 	ldr	r8, [sp, #8]
 	adds	r2, r3, r4
@@ -17108,24 +17149,24 @@ rk_ftl_garbage_collect:
 	movs	r3, #0
 	str	r4, [sp, #20]
 	str	r3, [sp, #12]
-	b	.L1887
-.L1889:
+	b	.L1891
+.L1893:
 	ldrh	r1, [r2, #2]!
 	movw	r8, #65535
 	cmp	r1, r8
-	beq	.L1888
+	beq	.L1892
 	mla	r8, r0, r5, lr
 	adds	r5, r5, #1
 	orr	r1, r4, r1, lsl #10
 	uxth	r5, r5
 	str	r1, [r8, #4]
-.L1888:
+.L1892:
 	adds	r3, r3, #1
 	uxth	r3, r3
-.L1896:
+.L1900:
 	cmp	r3, ip
-	bne	.L1889
-	ldr	r3, .L1914+4
+	bne	.L1893
+	ldr	r3, .L1918+4
 	mov	r1, r5
 	ldr	r0, [r7, #0]
 	movs	r4, #0
@@ -17133,29 +17174,29 @@ rk_ftl_garbage_collect:
 	ldrb	r2, [r3, #8]	@ zero_extendqisi2
 	bl	FlashReadPages
 	str	r4, [sp, #16]
-	b	.L1890
-.L1894:
+	b	.L1894
+.L1898:
 	ldr	r3, [r7, #0]
 	adds	r2, r3, r4
 	ldr	r3, [r3, r4]
 	ldr	r5, [r2, #12]
 	adds	r3, r3, #1
-	beq	.L1891
+	beq	.L1895
 	ldrh	r3, [r5, #0]
 	movw	r8, #61589
 	cmp	r3, r8
-	bne	.L1891
+	bne	.L1895
 	ldr	r8, [r5, #8]
 	cmp	r8, #-1
-	bne	.L1892
-	ldr	r1, .L1914+12
+	bne	.L1896
+	ldr	r1, .L1918+12
 	mov	r2, #876
-	ldr	r0, .L1914+16
+	ldr	r0, .L1918+16
 	bl	printf
-	ldr	r0, .L1914+20
-	ldr	r1, .L1914+24
+	ldr	r0, .L1918+20
+	ldr	r1, .L1918+24
 	bl	printf
-.L1892:
+.L1896:
 	movs	r2, #0
 	add	r1, sp, #28
 	mov	r0, r8
@@ -17166,30 +17207,30 @@ rk_ftl_garbage_collect:
 	bic	r1, r1, #-2147483648
 	ldr	r3, [r2, #4]
 	cmp	r1, r3
-	bne	.L1891
-	ldr	r0, .L1914+36
+	bne	.L1895
+	ldr	r0, .L1918+36
 	mov	fp, #36
-	ldr	r8, .L1914+72
+	ldr	r8, .L1918+72
 	ldr	r2, [r2, #16]
 	ldrh	r3, [r0, #0]
 	ldr	r1, [r8, #0]
 	adds	r3, r3, #1
 	strh	r3, [r0, #0]	@ movhi
-	ldr	r0, .L1914+60
+	ldr	r0, .L1918+60
 	ldr	r3, [r0, #0]
 	mla	r3, fp, r1, r3
 	str	r2, [r3, #16]
 	str	r3, [sp, #4]
 	bl	Ftl_get_new_temp_ppa
 	ldr	r3, [sp, #4]
-	ldr	r1, .L1914+60
+	ldr	r1, .L1918+60
 	ldr	r2, [r1, #0]
 	str	r0, [r3, #4]
 	ldr	r3, [r8, #0]
 	ldr	r0, [r7, #0]
 	mla	r2, fp, r3, r2
 	adds	r0, r0, r4
-	ldr	fp, .L1914+32
+	ldr	fp, .L1918+32
 	adds	r3, r3, #1
 	ldr	r1, [r0, #8]
 	str	r1, [r2, #8]
@@ -17200,45 +17241,45 @@ rk_ftl_garbage_collect:
 	str	r2, [r5, #12]
 	ldrh	r2, [fp, #0]
 	strh	r2, [r5, #2]	@ movhi
-	ldr	r2, .L1914+64
+	ldr	r2, .L1918+64
 	str	r3, [r8, #0]
 	ldr	r2, [r2, #0]
 	str	r2, [r5, #4]
 	bl	FtlGcBufAlloc
-	ldr	r3, .L1914
+	ldr	r3, .L1918
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbnz	r3, .L1893
+	cbnz	r3, .L1897
 	ldrb	r3, [fp, #7]	@ zero_extendqisi2
 	ldr	r2, [r8, #0]
 	cmp	r2, r3
-	beq	.L1893
+	beq	.L1897
 	ldrh	r3, [fp, #4]
-	cbnz	r3, .L1891
-.L1893:
+	cbnz	r3, .L1895
+.L1897:
 	bl	Ftl_gc_temp_data_write_back
 	cmp	r0, #0
-	bne	.L1910
-.L1891:
+	bne	.L1914
+.L1895:
 	ldr	r8, [sp, #16]
 	adds	r4, r4, #36
 	add	r3, r8, #1
 	uxth	r3, r3
 	str	r3, [sp, #16]
-.L1890:
+.L1894:
 	ldr	r3, [sp, #16]
 	cmp	r3, sl
-	bne	.L1894
+	bne	.L1898
 	ldr	r8, [sp, #12]
 	add	r8, r8, #1
 	str	r8, [sp, #12]
-.L1887:
+.L1891:
 	ldr	r8, [sp, #12]
-	ldr	r2, .L1914+4
+	ldr	r2, .L1918+4
 	uxth	r3, r8
 	ldr	r8, [sp, #20]
 	cmp	r3, r8
-	bcs	.L1895
-	ldr	r3, .L1914+68
+	bcs	.L1899
+	ldr	r3, .L1918+68
 	movs	r5, #0
 	ldrh	r4, [r2, #2]
 	movs	r0, #36
@@ -17248,8 +17289,8 @@ rk_ftl_garbage_collect:
 	ldr	r3, [sp, #12]
 	adds	r4, r4, r3
 	mov	r3, r5
-	b	.L1896
-.L1895:
+	b	.L1900
+.L1899:
 	ldrh	r3, [r2, #2]
 	ldr	r4, [sp, #20]
 	ldr	r8, [sp, #8]
@@ -17257,87 +17298,87 @@ rk_ftl_garbage_collect:
 	uxth	r4, r4
 	strh	r4, [r2, #2]	@ movhi
 	cmp	r4, r8
-	bcc	.L1897
-	ldr	r3, .L1914+72
+	bcc	.L1901
+	ldr	r3, .L1918+72
 	ldr	r3, [r3, #0]
-	cbz	r3, .L1898
+	cbz	r3, .L1902
 	bl	Ftl_gc_temp_data_write_back
-	cbz	r0, .L1898
-.L1910:
-	ldr	r3, .L1914+48
+	cbz	r0, .L1902
+.L1914:
+	ldr	r3, .L1918+48
 	movs	r2, #0
 	str	r2, [r3, #0]
-.L1911:
-	ldr	r3, .L1914+76
+.L1915:
+	ldr	r3, .L1918+76
 	ldrh	r0, [r3, #0]
-	b	.L1851
-.L1898:
-	ldr	r3, .L1914+36
+	b	.L1855
+.L1902:
+	ldr	r3, .L1918+36
 	ldrh	r0, [r3, #0]
-	cbnz	r0, .L1899
-	ldr	r3, .L1914+4
-	ldr	r2, .L1914+40
+	cbnz	r0, .L1903
+	ldr	r3, .L1918+4
+	ldr	r2, .L1918+40
 	ldrh	r1, [r3, #0]
 	ldr	r2, [r2, #0]
 	ldrh	r4, [r2, r1, lsl #1]
-	cbz	r4, .L1899
+	cbz	r4, .L1903
 	strh	r0, [r2, r1, lsl #1]	@ movhi
 	ldrh	r0, [r3, #0]
 	bl	update_vpc_list
 	bl	FtlCacheWriteBack
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1899:
-	ldr	r3, .L1914+4
+.L1903:
+	ldr	r3, .L1918+4
 	movw	r2, #65535
 	strh	r2, [r3, #0]	@ movhi
-.L1897:
-	ldr	r3, .L1914+80
+.L1901:
+	ldr	r3, .L1918+80
 	ldrh	r0, [r3, #0]
 	cmp	r0, #2
-	bhi	.L1900
-	ldr	r3, .L1914+52
+	bhi	.L1904
+	ldr	r3, .L1918+52
 	ldrh	r4, [r3, #0]
-	b	.L1908
-.L1900:
-	ldr	r3, .L1914+48
+	b	.L1912
+.L1904:
+	ldr	r3, .L1918+48
 	movs	r2, #0
 	adds	r0, r0, #1
 	str	r2, [r3, #0]
-	b	.L1851
-.L1915:
+	b	.L1855
+.L1919:
 	.align	2
-.L1914:
+.L1918:
 	.word	.LANCHOR7
 	.word	.LANCHOR202
-	.word	.LANCHOR109
+	.word	.LANCHOR97
 	.word	.LANCHOR236
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.word	.LANCHOR110
-	.word	.LANCHOR111
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
+	.word	.LANCHOR98
+	.word	.LANCHOR99
 	.word	.LANCHOR234
-	.word	.LANCHOR101
+	.word	.LANCHOR89
 	.word	.LANCHOR235
 	.word	.LANCHOR168
-	.word	.LANCHOR68
-	.word	.LANCHOR69
+	.word	.LANCHOR56
+	.word	.LANCHOR57
 	.word	.LANCHOR178
 	.word	.LANCHOR157
-	.word	.LANCHOR53
-	.word	.LANCHOR131
+	.word	.LANCHOR41
+	.word	.LANCHOR119
 	.word	.LANCHOR233
-	.word	.LANCHOR106
-.L1901:
+	.word	.LANCHOR94
+.L1905:
 	movs	r0, #0
-	b	.L1851
-.L1902:
+	b	.L1855
+.L1906:
 	mov	r0, r2
-	b	.L1851
-.L1903:
+	b	.L1855
+.L1907:
 	mov	r0, r3
-.L1851:
+.L1855:
 	add	sp, sp, #32
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
@@ -17350,20 +17391,20 @@ rk_ftl_garbage_collect:
 ftl_fix_nand_power_lost_error:
 	@ args = 0, pretend = 0, frame = 48
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1925
+	ldr	r3, .L1929
 	push	{r4, r5, r6, r7, r8, lr}
 	sub	sp, sp, #48
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1916
-	ldr	r3, .L1925+4
-	ldr	r5, .L1925+8
-	ldr	r8, .L1925+32
+	beq	.L1920
+	ldr	r3, .L1929+4
+	ldr	r5, .L1929+8
+	ldr	r8, .L1929+32
 	ldrh	r4, [r3, #0]
 	ldr	r3, [r5, #0]
-	ldr	r7, .L1925+12
+	ldr	r7, .L1929+12
 	mov	r1, r4
-	ldr	r0, .L1925+16
+	ldr	r0, .L1929+16
 	lsls	r6, r4, #1
 	ldrh	r2, [r3, r4, lsl #1]
 	bl	printf
@@ -17376,46 +17417,46 @@ ftl_fix_nand_power_lost_error:
 	mov	r0, r7
 	bl	allocate_new_data_superblock
 	movw	r7, #4097
-	b	.L1918
-.L1920:
+	b	.L1922
+.L1924:
 	movs	r0, #1
 	mov	r1, r0
 	bl	rk_ftl_garbage_collect
 	ldr	r3, [r5, #0]
 	ldrh	r3, [r3, r6]
-	cbz	r3, .L1919
-.L1918:
+	cbz	r3, .L1923
+.L1922:
 	subs	r7, r7, #1
-	bne	.L1920
-.L1919:
-	ldr	r5, .L1925+8
+	bne	.L1924
+.L1923:
+	ldr	r5, .L1929+8
 	mov	r1, r4
-	ldr	r0, .L1925+16
+	ldr	r0, .L1929+16
 	ldr	r3, [r5, #0]
 	ldrh	r2, [r3, r4, lsl #1]
 	bl	printf
 	ldr	r3, [r5, #0]
 	ldrh	r5, [r3, r4, lsl #1]
 	cmp	r5, #0
-	bne	.L1921
+	bne	.L1925
 	add	r6, sp, #48
 	mov	r0, sp
 	movs	r7, #36
 	strh	r4, [r6, #-48]!	@ movhi
 	adds	r6, r6, #14
 	bl	make_superblock
-	ldr	r3, .L1925+20
+	ldr	r3, .L1929+20
 	movw	lr, #65535
 	mov	r1, r5
 	ldrh	r8, [r3, #0]
-	ldr	r3, .L1925+24
+	ldr	r3, .L1929+24
 	ldr	ip, [r3, #0]
-	mov	r3, r5
-	b	.L1922
-.L1924:
+	mov	r3, r5
+	b	.L1926
+.L1928:
 	ldrh	r0, [r6, #2]!
 	cmp	r0, lr
-	beq	.L1923
+	beq	.L1927
 	mla	r2, r7, r5, ip
 	adds	r5, r5, #1
 	lsls	r0, r0, #10
@@ -17423,18 +17464,18 @@ ftl_fix_nand_power_lost_error:
 	str	r0, [r2, #4]
 	str	r1, [r2, #8]
 	str	r1, [r2, #12]
-.L1923:
+.L1927:
 	adds	r3, r3, #1
 	uxth	r3, r3
-.L1922:
+.L1926:
 	cmp	r3, r8
-	bne	.L1924
-	ldr	r3, .L1925+8
+	bne	.L1928
+	ldr	r3, .L1929+8
 	mov	r1, r4
-	ldr	r0, .L1925+28
+	ldr	r0, .L1929+28
 	ldr	r3, [r3, #0]
 	ldrh	r2, [r3, r4, lsl #1]
-	ldr	r4, .L1925+24
+	ldr	r4, .L1929+24
 	bl	printf
 	movs	r1, #0
 	mov	r2, r5
@@ -17444,25 +17485,25 @@ ftl_fix_nand_power_lost_error:
 	movs	r1, #1
 	mov	r2, r5
 	bl	FlashEraseBlocks
-.L1921:
-	ldr	r3, .L1925+4
+.L1925:
+	ldr	r3, .L1929+4
 	movw	r2, #65535
 	strh	r2, [r3, #0]	@ movhi
-.L1916:
+.L1920:
 	add	sp, sp, #48
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1926:
+.L1930:
 	.align	2
-.L1925:
+.L1929:
 	.word	.LANCHOR7
 	.word	.LANCHOR229
-	.word	.LANCHOR101
-	.word	.LANCHOR110
+	.word	.LANCHOR89
+	.word	.LANCHOR98
 	.word	.LC44
-	.word	.LANCHOR53
-	.word	.LANCHOR95
+	.word	.LANCHOR41
+	.word	.LANCHOR83
 	.word	.LC45
-	.word	.LANCHOR109
+	.word	.LANCHOR97
 	.size	ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error
 	.section	.text.FtlInit,"ax",%progbits
 	.align	1
@@ -17473,70 +17514,70 @@ ftl_fix_nand_power_lost_error:
 FtlInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.L1928:
+.L1932:
 	push	{r3, r4, r5, lr}
 	mov	r3, #-1
-	ldr	r2, .L1935
+	ldr	r2, .L1939
 	mov	r5, r0
-	ldr	r4, .L1935+4
-	ldr	r1, .L1935+8
-	ldr	r0, .L1935+12
+	ldr	r4, .L1939+4
+	ldr	r1, .L1939+8
+	ldr	r0, .L1939+12
 	str	r3, [r4, #0]
 	movs	r3, #0
 	str	r3, [r2, #0]
-	ldr	r2, .L1935+16
+	ldr	r2, .L1939+16
 	str	r3, [r2, #0]
 	bl	printf
 	mov	r0, r5
 	bl	FtlConstantsInit
 	bl	FtlMemInit
 	bl	FtlVariablesInit
-	ldr	r3, .L1935+20
+	ldr	r3, .L1939+20
 	ldrh	r0, [r3, #0]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	r0, .L1929
-	ldr	r0, .L1935+24
-	b	.L1934
-.L1929:
+	cbz	r0, .L1933
+	ldr	r0, .L1939+24
+	b	.L1938
+.L1933:
 	bl	FtlSysBlkInit
-	cbz	r0, .L1931
-	ldr	r0, .L1935+28
-.L1934:
-	ldr	r1, .L1935+32
+	cbz	r0, .L1935
+	ldr	r0, .L1939+28
+.L1938:
+	ldr	r1, .L1939+32
 	bl	printf
-	b	.L1930
-.L1931:
+	b	.L1934
+.L1935:
 	movs	r1, #1
 	str	r1, [r4, #0]
 	bl	rk_ftl_garbage_collect
-	ldr	r3, .L1935+36
+	ldr	r3, .L1939+36
 	ldrh	r3, [r3, #0]
 	cmp	r3, #15
-	bhi	.L1930
+	bhi	.L1934
 	mov	r4, #1024
-.L1932:
+.L1936:
 	movs	r0, #1
 	mov	r1, r0
 	bl	rk_ftl_garbage_collect
 	subs	r4, r4, #1
-	bne	.L1932
-.L1930:
+	bne	.L1936
+.L1934:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L1936:
+.L1940:
 	.align	2
-.L1935:
+.L1939:
 	.word	.LANCHOR237
 	.word	.LANCHOR225
 	.word	.LC46
-	.word	.LC10
-	.word	.LANCHOR94
-	.word	.LANCHOR54
+	.word	.LC4
+	.word	.LANCHOR82
+	.word	.LANCHOR42
 	.word	.LC47
 	.word	.LC48
 	.word	.LANCHOR238
-	.word	.LANCHOR106
+	.word	.LANCHOR94
 	.size	FtlInit, .-FtlInit
 	.section	.text.ftl_write,"ax",%progbits
 	.align	1
@@ -17553,28 +17594,28 @@ ftl_write:
 	mov	r5, r1
 	str	r2, [sp, #12]
 	str	r3, [sp, #4]
-	bne	.L1938
+	bne	.L1942
 	add	r0, r1, #256
 	mov	r1, r2
 	mov	r2, r3
 	bl	FtlVendorPartWrite
-	b	.L1939
-.L1938:
-	ldr	r3, .L1980
+	b	.L1943
+.L1942:
+	ldr	r3, .L1984
 	ldr	r0, [sp, #12]
 	ldr	r3, [r3, #0]
 	adds	r7, r0, r1
 	cmp	r7, r3
-	bhi	.L1970
-	ldr	r3, .L1980+4
+	bhi	.L1974
+	ldr	r3, .L1984+4
 	ldr	r0, [r3, #0]
 	adds	r3, r0, #1
-	beq	.L1939
-	ldr	r3, .L1980+8
+	beq	.L1943
+	ldr	r3, .L1984+8
 	mov	r2, #2048
 	mov	r0, r1
 	str	r2, [r3, #0]
-	ldr	r3, .L1980+12
+	ldr	r3, .L1984+12
 	ldrh	r6, [r3, #0]
 	mov	r1, r6
 	bl	__aeabi_uidiv
@@ -17582,7 +17623,7 @@ ftl_write:
 	mov	sl, r0
 	subs	r0, r7, #1
 	bl	__aeabi_uidiv
-	ldr	r3, .L1980+16
+	ldr	r3, .L1984+16
 	ldr	r2, [r3, #0]
 	rsb	r4, sl, r0
 	str	r0, [sp, #24]
@@ -17590,16 +17631,16 @@ ftl_write:
 	str	r1, [sp, #0]
 	adds	r2, r1, r2
 	str	r2, [r3, #0]
-	ldr	r3, .L1980+20
+	ldr	r3, .L1984+20
 	ldr	r7, [r3, #0]
-	cbz	r7, .L1940
+	cbz	r7, .L1944
 	ldr	r3, [r7, #16]
 	cmp	sl, r3
-	beq	.L1941
+	beq	.L1945
 	bl	FtlCacheWriteBack
-	b	.L1940
-.L1941:
-	ldr	r3, .L1980+24
+	b	.L1944
+.L1945:
+	ldr	r3, .L1984+24
 	mov	r1, r6
 	mov	r0, r5
 	ldr	r2, [r3, #0]
@@ -17618,7 +17659,7 @@ ftl_write:
 	mov	r2, r8
 	bl	memcpy
 	cmp	r4, #0
-	beq	.L1972
+	beq	.L1976
 	ldr	r3, [sp, #12]
 	adds	r5, r5, r6
 	ldr	r0, [sp, #4]
@@ -17629,36 +17670,36 @@ ftl_write:
 	str	r0, [sp, #4]
 	bl	FtlCacheWriteBack
 	str	r4, [sp, #0]
-.L1940:
+.L1944:
 	mov	r4, sl
 	str	sl, [sp, #20]
-	ldr	r6, .L1980+28
+	ldr	r6, .L1984+28
 	mov	sl, r5
-	b	.L1942
-.L1969:
-	ldr	r1, .L1980+32
+	b	.L1946
+.L1973:
+	ldr	r1, .L1984+32
 	ldrb	r2, [r6, #6]	@ zero_extendqisi2
 	ldrh	r3, [r1, #0]
 	cmp	r2, r3
-	bcc	.L1943
-	ldr	r1, .L1980+36
+	bcc	.L1947
+	ldr	r1, .L1984+36
 	movw	r2, #1630
-	ldr	r0, .L1980+40
+	ldr	r0, .L1984+40
 	bl	printf
-	ldr	r0, .L1980+44
-	ldr	r1, .L1980+48
+	ldr	r0, .L1984+44
+	ldr	r1, .L1984+48
 	bl	printf
-.L1943:
-	ldr	r2, .L1980+28
+.L1947:
+	ldr	r2, .L1984+28
 	ldrh	r3, [r2, #4]
-	cbnz	r3, .L1944
+	cbnz	r3, .L1948
 	bl	FtlCacheWriteBack
-	ldr	r0, .L1980+28
+	ldr	r0, .L1984+28
 	bl	allocate_new_data_superblock
-.L1944:
+.L1948:
 	ldrb	r3, [r6, #7]	@ zero_extendqisi2
 	ldrh	r2, [r6, #4]
-	ldr	r1, .L1980+32
+	ldr	r1, .L1984+32
 	lsls	r3, r3, #2
 	ldr	r0, [sp, #0]
 	cmp	r3, r2
@@ -17671,29 +17712,29 @@ ftl_write:
 	ldrh	r3, [r1, #0]
 	str	r0, [sp, #8]
 	cmp	r2, r3
-	bcc	.L1945
-	ldr	r1, .L1980+36
+	bcc	.L1949
+	ldr	r1, .L1984+36
 	movw	r2, #1663
-	ldr	r0, .L1980+40
+	ldr	r0, .L1984+40
 	bl	printf
-	ldr	r0, .L1980+44
-	ldr	r1, .L1980+48
+	ldr	r0, .L1984+44
+	ldr	r1, .L1984+48
 	bl	printf
-.L1945:
+.L1949:
 	movs	r3, #0
-	ldr	r5, .L1980+52
+	ldr	r5, .L1984+52
 	str	r3, [sp, #16]
-	b	.L1946
-.L1965:
+	b	.L1950
+.L1969:
 	ldrh	r3, [r6, #4]
 	cmp	r3, #0
-	beq	.L1973
+	beq	.L1977
 	movs	r2, #0
 	add	r1, sp, #76
 	mov	r0, r4
 	movs	r7, #36
 	bl	log2phys
-	ldr	r0, .L1980+28
+	ldr	r0, .L1984+28
 	bl	get_new_active_ppa
 	ldr	r3, [sp, #16]
 	muls	r7, r3, r7
@@ -17701,13 +17742,13 @@ ftl_write:
 	adds	r3, r3, r7
 	str	r4, [r3, #16]
 	str	r0, [r3, #4]
-	ldr	r0, .L1980+56
+	ldr	r0, .L1984+56
 	ldrh	r2, [r0, #0]
 	ldr	r0, [sp, #16]
 	mul	r1, r2, r0
 	lsrs	r1, r1, #2
 	str	r1, [sp, #32]
-	ldr	r1, .L1980+60
+	ldr	r1, .L1984+60
 	ldr	r0, [sp, #32]
 	ldr	r1, [r1, #0]
 	add	r8, r1, r0, lsl #2
@@ -17717,14 +17758,14 @@ ftl_write:
 	movs	r1, #0
 	bl	memset
 	ldr	r1, [sp, #20]
-	ldr	r3, .L1980+12
+	ldr	r3, .L1984+12
 	cmp	r4, r1
-	beq	.L1948
+	beq	.L1952
 	ldr	r2, [sp, #24]
 	cmp	r4, r2
-	bne	.L1975
-	b	.L1979
-.L1948:
+	bne	.L1979
+	b	.L1983
+.L1952:
 	ldrh	fp, [r3, #0]
 	mov	r0, sl
 	mov	r1, fp
@@ -17735,8 +17776,8 @@ ftl_write:
 	cmp	fp, r3
 	it	cs
 	movcs	fp, r3
-	b	.L1951
-.L1979:
+	b	.L1955
+.L1983:
 	ldr	r0, [sp, #12]
 	ldrh	fp, [r3, #0]
 	movs	r3, #0
@@ -17744,39 +17785,39 @@ ftl_write:
 	str	r3, [sp, #28]
 	mls	fp, r4, fp, r2
 	uxth	fp, fp
-.L1951:
-	ldr	r3, .L1980+12
+.L1955:
+	ldr	r3, .L1984+12
 	ldrh	r3, [r3, #0]
 	cmp	fp, r3
-	bne	.L1952
+	bne	.L1956
 	ldr	r0, [sp, #20]
 	ldr	r3, [r5, #0]
 	cmp	r4, r0
 	add	r7, r3, r7
-	bne	.L1953
+	bne	.L1957
 	ldr	r1, [sp, #4]
 	str	r1, [r7, #8]
-	b	.L1954
-.L1953:
+	b	.L1958
+.L1957:
 	mul	r3, fp, r4
 	ldr	r2, [sp, #4]
 	rsb	r3, sl, r3
 	add	r3, r2, r3, lsl #9
-	b	.L1978
-.L1952:
+	b	.L1982
+.L1956:
 	ldr	r3, [sp, #20]
 	cmp	r4, r3
 	ldr	r3, [r5, #0]
 	it	eq
-	ldreq	r2, .L1980+64
+	ldreq	r2, .L1984+64
 	add	r3, r3, r7
 	it	ne
-	ldrne	r2, .L1980+68
+	ldrne	r2, .L1984+68
 	ldr	r2, [r2, #0]
 	str	r2, [r3, #8]
 	ldr	r3, [sp, #76]
 	adds	r1, r3, #1
-	beq	.L1957
+	beq	.L1961
 	str	r3, [sp, #44]
 	movs	r1, #1
 	ldr	r3, [r5, #0]
@@ -17791,102 +17832,102 @@ ftl_write:
 	bl	FlashReadPages
 	ldr	r3, [sp, #40]
 	adds	r3, r3, #1
-	bne	.L1958
-	ldr	r3, .L1980+72
+	bne	.L1962
+	ldr	r3, .L1984+72
 	ldr	r2, [r3, #72]
 	adds	r2, r2, #1
 	str	r2, [r3, #72]
-	b	.L1959
-.L1958:
+	b	.L1963
+.L1962:
 	ldr	r1, [r8, #8]
 	cmp	r1, r4
-	beq	.L1960
-	ldr	r3, .L1980+72
-	ldr	r0, .L1980+76
+	beq	.L1964
+	ldr	r3, .L1984+72
+	ldr	r0, .L1984+76
 	ldr	r2, [r3, #72]
 	adds	r2, r2, #1
 	str	r2, [r3, #72]
 	mov	r2, r4
 	bl	printf
-.L1960:
+.L1964:
 	ldr	r3, [r8, #8]
 	cmp	r3, r4
-	beq	.L1959
-	ldr	r1, .L1980+36
+	beq	.L1963
+	ldr	r1, .L1984+36
 	movw	r2, #1716
-	ldr	r0, .L1980+40
+	ldr	r0, .L1984+40
 	bl	printf
-	ldr	r1, .L1980+48
-	ldr	r0, .L1980+44
+	ldr	r1, .L1984+48
+	ldr	r0, .L1984+44
 	bl	printf
-	b	.L1959
-.L1957:
+	b	.L1963
+.L1961:
 	ldr	r3, [r5, #0]
 	movs	r1, #0
 	adds	r3, r3, r7
 	ldr	r0, [r3, #8]
-	ldr	r3, .L1980+80
+	ldr	r3, .L1984+80
 	ldrh	r2, [r3, #0]
 	bl	memset
-.L1959:
+.L1963:
 	ldr	r0, [sp, #20]
 	ldr	r3, [r5, #0]
 	cmp	r4, r0
 	add	r3, r3, r7
-	bne	.L1961
+	bne	.L1965
 	ldr	r0, [r3, #8]
 	ldr	r3, [sp, #28]
 	ldr	r1, [sp, #4]
 	add	r0, r0, r3, lsl #9
-	b	.L1977
-.L1981:
+	b	.L1981
+.L1985:
 	.align	2
-.L1980:
-	.word	.LANCHOR84
+.L1984:
+	.word	.LANCHOR72
 	.word	.LANCHOR225
 	.word	.LANCHOR239
-	.word	.LANCHOR71
+	.word	.LANCHOR59
 	.word	.LANCHOR159
-	.word	.LANCHOR137
+	.word	.LANCHOR125
 	.word	.LANCHOR161
-	.word	.LANCHOR109
-	.word	.LANCHOR53
+	.word	.LANCHOR97
+	.word	.LANCHOR41
 	.word	.LANCHOR240
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
 	.word	.LANCHOR179
-	.word	.LANCHOR74
+	.word	.LANCHOR62
 	.word	.LANCHOR185
 	.word	.LANCHOR182
 	.word	.LANCHOR183
-	.word	.LANCHOR144
+	.word	.LANCHOR132
 	.word	.LC49
-	.word	.LANCHOR73
-.L1961:
-	ldr	r2, .L1982
+	.word	.LANCHOR61
+.L1965:
+	ldr	r2, .L1986
 	ldr	r0, [r3, #8]
 	ldrh	r1, [r2, #0]
 	muls	r1, r4, r1
 	ldr	r2, [sp, #4]
 	rsb	r1, sl, r1
 	add	r1, r2, r1, lsl #9
-.L1977:
+.L1981:
 	lsl	r2, fp, #9
 	bl	memcpy
 	ldr	r3, [sp, #24]
 	cmp	r4, r3
-	bne	.L1954
+	bne	.L1958
 	ldrh	r3, [r6, #4]
-	cbz	r3, .L1954
+	cbz	r3, .L1958
 	ldr	r3, [r5, #0]
 	adds	r7, r3, r7
-	ldr	r3, .L1982+4
+	ldr	r3, .L1986+4
 	str	r7, [r3, #0]
-	ldr	r3, .L1982+8
+	ldr	r3, .L1986+8
 	str	r6, [r3, #0]
-	b	.L1954
-.L1975:
+	b	.L1958
+.L1979:
 	ldr	r2, [r5, #0]
 	ldrh	r3, [r3, #0]
 	muls	r3, r4, r3
@@ -17894,36 +17935,36 @@ ftl_write:
 	rsb	r3, sl, r3
 	adds	r7, r2, r7
 	add	r3, r0, r3, lsl #9
-.L1978:
+.L1982:
 	str	r3, [r7, #8]
-.L1954:
-	ldr	r1, .L1982+12
+.L1958:
+	ldr	r1, .L1986+12
 	ldrb	r2, [r6, #6]	@ zero_extendqisi2
 	ldrh	r3, [r1, #0]
 	cmp	r2, r3
-	bcc	.L1963
-	ldr	r1, .L1982+16
+	bcc	.L1967
+	ldr	r1, .L1986+16
 	movw	r2, #1737
-	ldr	r0, .L1982+20
+	ldr	r0, .L1986+20
 	bl	printf
-	ldr	r0, .L1982+24
-	ldr	r1, .L1982+28
+	ldr	r0, .L1986+24
+	ldr	r1, .L1986+28
 	bl	printf
-.L1963:
+.L1967:
 	ldr	r2, [sp, #36]
 	movw	r3, #61589
 	ldr	r0, [sp, #32]
 	strh	r3, [r2, r0, lsl #2]	@ movhi
-	ldr	r3, .L1982+32
+	ldr	r3, .L1986+32
 	ldr	r2, [r3, #0]
 	str	r2, [r8, #4]
 	adds	r2, r2, #1
 	str	r2, [r3, #0]
 	adds	r2, r2, #1
-	bne	.L1964
+	bne	.L1968
 	movs	r2, #0
 	str	r2, [r3, #0]
-.L1964:
+.L1968:
 	ldr	r3, [sp, #76]
 	str	r4, [r8, #8]
 	adds	r4, r4, #1
@@ -17933,83 +17974,83 @@ ftl_write:
 	ldr	r3, [sp, #16]
 	adds	r3, r3, #1
 	str	r3, [sp, #16]
-.L1946:
+.L1950:
 	ldr	r3, [sp, #16]
 	ldr	r0, [sp, #8]
 	cmp	r3, r0
-	bne	.L1965
-	b	.L1947
-.L1973:
+	bne	.L1969
+	b	.L1951
+.L1977:
 	ldr	r3, [sp, #16]
 	str	r3, [sp, #8]
-.L1947:
-	ldr	r3, .L1982+4
+.L1951:
+	ldr	r3, .L1986+4
 	ldr	r3, [r3, #0]
-	cbz	r3, .L1966
+	cbz	r3, .L1970
 	ldr	r0, [sp, #8]
 	subs	r0, r0, #1
 	str	r0, [sp, #8]
-	beq	.L1967
+	beq	.L1971
 	ldr	r1, [sp, #0]
 	subs	r1, r1, #1
 	str	r1, [sp, #0]
-.L1966:
-	ldr	r3, .L1982+36
+.L1970:
+	ldr	r3, .L1986+36
 	movs	r2, #0
 	ldr	r1, [sp, #8]
 	ldr	r0, [r3, #0]
-	ldr	r3, .L1982+40
+	ldr	r3, .L1986+40
 	bl	FtlProgPages
 	ldr	r2, [sp, #0]
 	ldr	r3, [sp, #8]
 	cmp	r2, r3
-	bcs	.L1968
-	ldr	r1, .L1982+16
+	bcs	.L1972
+	ldr	r1, .L1986+16
 	mov	r2, #1752
-	ldr	r0, .L1982+20
+	ldr	r0, .L1986+20
 	bl	printf
-	ldr	r0, .L1982+24
-	ldr	r1, .L1982+28
+	ldr	r0, .L1986+24
+	ldr	r1, .L1986+28
 	bl	printf
-.L1968:
+.L1972:
 	ldr	r0, [sp, #0]
 	ldr	r1, [sp, #8]
 	subs	r0, r0, r1
 	str	r0, [sp, #0]
-.L1942:
+.L1946:
 	ldr	r2, [sp, #0]
 	cmp	r2, #0
-	bne	.L1969
-.L1967:
+	bne	.L1973
+.L1971:
 	ldr	sl, [sp, #20]
 	movs	r0, #0
 	ldr	r3, [sp, #24]
 	rsb	r1, sl, r3
 	bl	rk_ftl_garbage_collect
 	movs	r0, #0
-	b	.L1939
-.L1970:
+	b	.L1943
+.L1974:
 	mov	r0, #-1
-	b	.L1939
-.L1972:
+	b	.L1943
+.L1976:
 	mov	r0, r4
-.L1939:
+.L1943:
 	add	sp, sp, #80
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1983:
+.L1987:
 	.align	2
-.L1982:
-	.word	.LANCHOR71
-	.word	.LANCHOR137
+.L1986:
+	.word	.LANCHOR59
+	.word	.LANCHOR125
 	.word	.LANCHOR224
-	.word	.LANCHOR53
+	.word	.LANCHOR41
 	.word	.LANCHOR240
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
 	.word	.LANCHOR157
 	.word	.LANCHOR179
-	.word	.LANCHOR109
+	.word	.LANCHOR97
 	.size	ftl_write, .-ftl_write
 	.section	.text.ftl_read,"ax",%progbits
 	.align	1
@@ -18026,27 +18067,27 @@ ftl_read:
 	mov	r4, r1
 	mov	r7, r3
 	str	r2, [sp, #36]
-	bne	.L1985
+	bne	.L1989
 	add	r0, r1, #256
 	mov	r1, r2
 	mov	r2, r3
 	bl	FtlVendorPartRead
 	str	r0, [sp, #12]
-	b	.L1986
-.L1985:
+	b	.L1990
+.L1989:
 	ldr	r3, [sp, #36]
 	adds	r3, r3, r1
 	str	r3, [sp, #16]
-	ldr	r3, .L2018
+	ldr	r3, .L2022
 	ldr	r1, [sp, #16]
 	ldr	r3, [r3, #0]
 	cmp	r1, r3
-	bhi	.L2006
-	ldr	r3, .L2018+4
+	bhi	.L2010
+	ldr	r3, .L2022+4
 	ldr	r3, [r3, #0]
 	adds	r2, r3, #1
-	beq	.L2007
-	ldr	fp, .L2018+48
+	beq	.L2011
+	ldr	fp, .L2022+48
 	bl	FtlCacheWriteBack
 	mov	r0, r4
 	mov	sl, #0
@@ -18067,54 +18108,54 @@ ftl_read:
 	str	sl, [sp, #12]
 	adds	r3, r3, r0
 	str	r3, [sp, #8]
-	ldr	r3, .L2018+8
+	ldr	r3, .L2022+8
 	ldr	r1, [sp, #8]
 	str	r0, [sp, #24]
 	ldr	r2, [r3, #0]
 	adds	r2, r1, r2
 	str	r2, [r3, #0]
-	b	.L2013
-.L2005:
+	b	.L2017
+.L2009:
 	movs	r2, #0
 	mov	r0, r6
 	add	r1, sp, #68
 	bl	log2phys
 	ldr	r3, [sp, #68]
 	adds	r0, r3, #1
-	bne	.L2014
-	b	.L2017
-.L1991:
+	bne	.L2018
+	b	.L2021
+.L1995:
 	mla	r0, r0, r6, r4
 	cmp	r0, r8
-	bcc	.L1990
+	bcc	.L1994
 	ldr	r3, [sp, #16]
 	cmp	r0, r3
-	bcs	.L1990
+	bcs	.L1994
 	rsb	r0, r8, r0
 	movs	r1, #0
 	mov	r2, #512
 	add	r0, r7, r0, lsl #9
 	bl	memset
-.L1990:
+.L1994:
 	adds	r4, r4, #1
-	b	.L1988
-.L2017:
+	b	.L1992
+.L2021:
 	movs	r4, #0
-.L1988:
+.L1992:
 	ldrh	r0, [fp, #0]
 	cmp	r4, r0
-	bcc	.L1991
-	b	.L1992
-.L2014:
-	ldr	r2, .L2018+12
+	bcc	.L1995
+	b	.L1996
+.L2018:
+	ldr	r2, .L2022+12
 	movs	r4, #36
 	ldr	r2, [r2, #0]
 	mla	r4, r4, r5, r2
 	str	r3, [r4, #4]
 	ldr	r3, [sp, #20]
 	cmp	r6, r3
-	bne	.L1993
-	ldr	r3, .L2018+16
+	bne	.L1997
+	ldr	r3, .L2022+16
 	mov	r0, r8
 	ldr	r3, [r3, #0]
 	str	r3, [r4, #8]
@@ -18131,14 +18172,14 @@ ftl_read:
 	movcc	r1, r2
 	str	r1, [sp, #32]
 	cmp	r1, r3
-	bne	.L1994
+	bne	.L1998
 	str	r7, [r4, #8]
-	b	.L1994
-.L1993:
+	b	.L1998
+.L1997:
 	ldr	r3, [sp, #24]
 	cmp	r6, r3
-	bne	.L1995
-	ldr	r3, .L2018+20
+	bne	.L1999
+	ldr	r3, .L2022+20
 	ldrh	r2, [fp, #0]
 	ldr	r1, [sp, #16]
 	ldr	r3, [r3, #0]
@@ -18146,18 +18187,18 @@ ftl_read:
 	mul	r3, r2, r6
 	rsb	sl, r3, r1
 	cmp	sl, r2
-	bne	.L1994
-	b	.L2015
-.L1995:
+	bne	.L1998
+	b	.L2019
+.L1999:
 	ldrh	r3, [fp, #0]
 	muls	r3, r6, r3
-.L2015:
+.L2019:
 	rsb	r3, r8, r3
 	add	r3, r7, r3, lsl #9
 	str	r3, [r4, #8]
-.L1994:
-	ldr	r3, .L2018+24
-	ldr	r2, .L2018+28
+.L1998:
+	ldr	r3, .L2022+24
+	ldr	r2, .L2022+28
 	str	r6, [r4, #16]
 	ldrh	r3, [r3, #0]
 	muls	r3, r5, r3
@@ -18166,20 +18207,20 @@ ftl_read:
 	bic	r3, r3, #3
 	adds	r3, r2, r3
 	str	r3, [r4, #12]
-.L1992:
+.L1996:
 	ldr	r3, [sp, #8]
 	adds	r6, r6, #1
 	subs	r3, r3, #1
 	str	r3, [sp, #8]
-	beq	.L1996
-	ldr	r3, .L2018+32
+	beq	.L2000
+	ldr	r3, .L2022+32
 	ldrh	r3, [r3, #0]
 	cmp	r5, r3, lsl #2
-	bne	.L2013
-.L1996:
+	bne	.L2017
+.L2000:
 	cmp	r5, #0
-	beq	.L2013
-	ldr	r4, .L2018+12
+	beq	.L2017
+	ldr	r4, .L2022+12
 	mov	r1, r5
 	movs	r2, #0
 	ldr	r0, [r4, #0]
@@ -18195,7 +18236,7 @@ ftl_read:
 	str	r3, [sp, #52]
 	movs	r3, #0
 	str	r3, [sp, #28]
-.L2004:
+.L2008:
 	movs	r6, #36
 	ldr	r3, [sp, #28]
 	muls	r6, r3, r6
@@ -18204,111 +18245,111 @@ ftl_read:
 	adds	r3, r3, r6
 	ldr	r2, [r3, #16]
 	cmp	r2, r1
-	bne	.L1998
+	bne	.L2002
 	ldr	r1, [r3, #8]
-	ldr	r3, .L2018+16
+	ldr	r3, .L2022+16
 	ldr	r3, [r3, #0]
 	cmp	r1, r3
-	bne	.L1999
+	bne	.L2003
 	ldr	r3, [sp, #44]
 	mov	r0, r7
 	ldr	r2, [sp, #48]
 	adds	r1, r1, r3
-	b	.L2016
-.L1998:
+	b	.L2020
+.L2002:
 	ldr	r1, [sp, #24]
 	cmp	r2, r1
-	bne	.L1999
-	ldr	r2, .L2018+20
+	bne	.L2003
+	ldr	r2, .L2022+20
 	ldr	r1, [r3, #8]
 	ldr	r3, [r2, #0]
 	cmp	r1, r3
-	bne	.L1999
+	bne	.L2003
 	ldrh	r0, [fp, #0]
 	ldr	r3, [sp, #24]
 	muls	r0, r3, r0
 	rsb	r0, r8, r0
 	ldr	r2, [sp, #52]
 	add	r0, r7, r0, lsl #9
-.L2016:
+.L2020:
 	bl	memcpy
-.L1999:
+.L2003:
 	ldr	r3, [r4, #0]
 	adds	r2, r3, r6
 	ldr	r3, [r3, r6]
 	adds	r1, r3, #1
-	bne	.L2000
-	ldr	r2, .L2018+36
+	bne	.L2004
+	ldr	r2, .L2022+36
 	str	r3, [sp, #12]
 	ldr	r1, [r2, #72]
 	adds	r1, r1, #1
 	str	r1, [r2, #72]
-	b	.L2001
-.L2000:
+	b	.L2005
+.L2004:
 	cmp	r3, #256
-	bne	.L2001
+	bne	.L2005
 	ldr	r0, [r2, #4]
 	movw	r6, #2049
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	str	r0, [sp, #56]
 	bl	FtlGcRefreshBlock
-.L2003:
+.L2007:
 	subs	r6, r6, #1
-	beq	.L2002
+	beq	.L2006
 	movs	r0, #1
 	mov	r1, r0
 	bl	rk_ftl_garbage_collect
-	ldr	r1, .L2018+40
+	ldr	r1, .L2022+40
 	ldr	r2, [sp, #56]
 	ldrh	r3, [r1, #0]
 	cmp	r3, r2
-	beq	.L2003
-.L2002:
+	beq	.L2007
+.L2006:
 	bl	FtlSysFlush
-.L2001:
+.L2005:
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
 	str	r3, [sp, #28]
 	cmp	r3, r5
-	bne	.L2004
+	bne	.L2008
 	ldr	r6, [sp, #60]
 	movs	r5, #0
-.L2013:
+.L2017:
 	ldr	r3, [sp, #8]
 	cmp	r3, #0
-	bne	.L2005
-	ldr	r3, .L2018+44
+	bne	.L2009
+	ldr	r3, .L2022+44
 	ldrh	r3, [r3, #0]
-	cbz	r3, .L1986
+	cbz	r3, .L1990
 	ldr	r0, [sp, #8]
 	movs	r1, #1
 	bl	rk_ftl_garbage_collect
-	b	.L1986
-.L2006:
+	b	.L1990
+.L2010:
 	mov	r3, #-1
-.L2007:
+.L2011:
 	str	r3, [sp, #12]
-.L1986:
+.L1990:
 	ldr	r0, [sp, #12]
 	add	sp, sp, #72
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L2019:
+.L2023:
 	.align	2
-.L2018:
-	.word	.LANCHOR84
+.L2022:
+	.word	.LANCHOR72
 	.word	.LANCHOR225
 	.word	.LANCHOR163
 	.word	.LANCHOR177
 	.word	.LANCHOR182
 	.word	.LANCHOR183
-	.word	.LANCHOR74
+	.word	.LANCHOR62
 	.word	.LANCHOR185
-	.word	.LANCHOR53
-	.word	.LANCHOR144
+	.word	.LANCHOR41
+	.word	.LANCHOR132
 	.word	.LANCHOR202
-	.word	.LANCHOR151
-	.word	.LANCHOR71
+	.word	.LANCHOR139
+	.word	.LANCHOR59
 	.size	ftl_read, .-ftl_read
 	.section	.text.FlashReadFacBbtData,"ax",%progbits
 	.align	1
@@ -18320,16 +18361,16 @@ FlashReadFacBbtData:
 	@ args = 0, pretend = 0, frame = 48
 	@ frame_needed = 0, uses_anonymous_args = 0
 	mov	r3, r2
-	ldr	r2, .L2029
+	ldr	r2, .L2033
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	mov	r6, r1
 	ldrh	sl, [r2, #14]
 	sub	sp, sp, #48
 	ldrh	r1, [r2, #12]
 	mov	r4, r0
-	ldr	r2, .L2029+4
+	ldr	r2, .L2033+4
 	movw	fp, #61664
-	ldr	r7, .L2029+8
+	ldr	r7, .L2033+8
 	mul	sl, sl, r1
 	ldr	r2, [r2, #0]
 	str	r2, [sp, #20]
@@ -18340,8 +18381,8 @@ FlashReadFacBbtData:
 	str	r2, [sp, #24]
 	uxth	r5, r5
 	sub	sl, sl, #15
-	b	.L2021
-.L2027:
+	b	.L2025
+.L2031:
 	add	r2, r5, r8
 	movs	r1, #1
 	add	r0, sp, #12
@@ -18353,19 +18394,19 @@ FlashReadFacBbtData:
 	ldr	r2, [sp, #12]
 	ldr	r3, [sp, #4]
 	adds	r2, r2, #1
-	beq	.L2022
+	beq	.L2026
 	ldr	r2, [r7, #0]
 	ldrh	r2, [r2, #0]
 	cmp	r2, fp
-	bne	.L2022
-	cbz	r4, .L2028
-	cbnz	r6, .L2024
-	ldr	r2, .L2029+4
+	bne	.L2026
+	cbz	r4, .L2032
+	cbnz	r6, .L2028
+	ldr	r2, .L2033+4
 	movs	r0, #1
-	ldr	r5, .L2029+12
+	ldr	r5, .L2033+12
 	ldr	r2, [r2, #0]
-	b	.L2025
-.L2026:
+	b	.L2029
+.L2030:
 	ubfx	r1, r6, #5, #16
 	and	r7, r6, #31
 	adds	r6, r6, #1
@@ -18374,43 +18415,43 @@ FlashReadFacBbtData:
 	uxth	r6, r6
 	orr	r7, lr, r7
 	str	r7, [r2, r1, lsl #2]
-.L2025:
+.L2029:
 	ldr	r1, [r5, #0]
 	cmp	r6, r1
-	bcc	.L2026
-.L2024:
-	ldr	r2, .L2029+4
+	bcc	.L2030
+.L2028:
+	ldr	r2, .L2033+4
 	mov	r0, r4
 	ldr	r1, [r2, #0]
 	mov	r2, r3
 	bl	memcpy
 	movs	r2, #4
-	ldr	r0, .L2029+16
+	ldr	r0, .L2033+16
 	mov	r1, r4
 	mov	r3, r2
 	bl	rknand_print_hex
 	movs	r0, #0
-	b	.L2023
-.L2022:
+	b	.L2027
+.L2026:
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L2021:
+.L2025:
 	cmp	sl, r5
-	ble	.L2027
+	ble	.L2031
 	mov	r0, #-1
-	b	.L2023
-.L2028:
+	b	.L2027
+.L2032:
 	mov	r0, r4
-.L2023:
+.L2027:
 	add	sp, sp, #48
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L2030:
+.L2034:
 	.align	2
-.L2029:
+.L2033:
 	.word	.LANCHOR28
-	.word	.LANCHOR44
+	.word	.LANCHOR146
 	.word	.LANCHOR241
-	.word	.LANCHOR46
+	.word	.LANCHOR148
 	.word	.LC50
 	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
 	.section	.text.FlashGetBadBlockList,"ax",%progbits
@@ -18424,8 +18465,8 @@ FlashGetBadBlockList:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r5, r0
-	ldr	r3, .L2038
-	ldr	r6, .L2038+4
+	ldr	r3, .L2042
+	ldr	r6, .L2042+4
 	ldr	r3, [r3, #0]
 	ldr	r0, [r6, #0]
 	ldrb	r2, [r3, #13]	@ zero_extendqisi2
@@ -18436,45 +18477,45 @@ FlashGetBadBlockList:
 	lsrs	r2, r2, #3
 	bl	FlashReadFacBbtData
 	adds	r0, r0, #1
-	beq	.L2037
+	beq	.L2041
 	movs	r2, #0
 	lsrs	r0, r4, #4
 	ldr	r6, [r6, #0]
 	mov	r3, r2
 	subs	r4, r4, #1
 	movs	r1, #1
-	b	.L2033
-.L2035:
+	b	.L2037
+.L2039:
 	lsrs	r7, r2, #5
 	and	ip, r2, #31
 	lsl	ip, r1, ip
 	ldr	r7, [r6, r7, lsl #2]
 	tst	ip, r7
-	beq	.L2034
+	beq	.L2038
 	strh	r2, [r5, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	uxth	r3, r3
-.L2034:
+.L2038:
 	cmp	r3, r0
-	bcs	.L2037
+	bcs	.L2041
 	adds	r2, r2, #1
 	uxth	r2, r2
-.L2033:
-	cmp	r2, r4
-	blt	.L2035
-	b	.L2032
 .L2037:
+	cmp	r2, r4
+	blt	.L2039
+	b	.L2036
+.L2041:
 	movs	r3, #0
-.L2032:
+.L2036:
 	movw	r2, #65535
 	movs	r0, #0
 	strh	r2, [r5, r3, lsl #1]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.L2039:
+.L2043:
 	.align	2
-.L2038:
+.L2042:
 	.word	.LANCHOR23
-	.word	.LANCHOR41
+	.word	.LANCHOR143
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
 	.section	.text.FtlMakeBbt,"ax",%progbits
 	.align	1
@@ -18485,24 +18526,24 @@ FlashGetBadBlockList:
 FtlMakeBbt:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2059
+	ldr	r3, .L2063
 	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
 	ldr	r4, [r3, #0]
 	cmp	r4, #0
-	bne	.L2041
-	ldr	r5, .L2059+4
+	bne	.L2045
+	ldr	r5, .L2063+4
 	bl	FtlBbtMemInit
-	ldr	r6, .L2059+8
+	ldr	r6, .L2063+8
 	bl	FtlLoadFactoryBbt
 	add	r2, r5, #12
 	str	r2, [sp, #4]
-	b	.L2042
-.L2048:
-	ldr	r3, .L2059+12
+	b	.L2046
+.L2052:
+	ldr	r3, .L2063+12
 	ldr	r2, [sp, #4]
-	ldr	r8, .L2059+24
+	ldr	r8, .L2063+24
 	ldr	r0, [r3, #0]
-	ldr	r3, .L2059+16
+	ldr	r3, .L2063+16
 	str	r0, [r8, #8]
 	ldr	sl, [r3, #0]
 	ldrh	r3, [r2], #2
@@ -18510,7 +18551,7 @@ FtlMakeBbt:
 	str	r2, [sp, #4]
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L2043
+	beq	.L2047
 	ldrh	r7, [r6, #0]
 	movs	r1, #1
 	mov	r2, r1
@@ -18525,8 +18566,8 @@ FtlMakeBbt:
 	ldr	r1, [r8, #8]
 	lsrs	r2, r2, #3
 	bl	memcpy
-	b	.L2044
-.L2043:
+	b	.L2048
+.L2047:
 	mov	r1, r4
 	bl	FlashGetBadBlockList
 	ldr	r1, [r5, #28]
@@ -18539,20 +18580,20 @@ FtlMakeBbt:
 	mov	r4, sl
 	mov	sl, r3
 	uxth	fp, fp
-	b	.L2057
-.L2046:
+	b	.L2061
+.L2050:
 	add	fp, fp, #-1
 	uxth	fp, fp
-.L2057:
+.L2061:
 	ldrh	r0, [r6, #0]
 	mla	r0, r5, r0, fp
 	uxth	r0, r0
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L2046
+	beq	.L2050
 	ldr	r3, [sp, #4]
 	movs	r1, #0
-	ldr	r2, .L2059+16
+	ldr	r2, .L2063+16
 	strh	fp, [r3, #-2]	@ movhi
 	ldr	r0, [r2, #0]
 	movs	r2, #16
@@ -18570,89 +18611,89 @@ FtlMakeBbt:
 	ldr	r1, [sl, #28]
 	lsls	r3, r7, #10
 	str	r3, [r8, #4]
-	ldr	r3, .L2059+20
+	ldr	r3, .L2063+20
 	ldrh	r2, [r3, #0]
 	lsls	r2, r2, #2
 	bl	memcpy
 	movs	r1, #1
 	mov	r2, r1
-	ldr	r0, .L2059+24
+	ldr	r0, .L2063+24
 	bl	FlashEraseBlocks
 	movs	r1, #1
 	mov	r3, r1
-	ldr	r0, .L2059+24
+	ldr	r0, .L2063+24
 	mov	r2, r1
 	bl	FlashProgPages
 	ldr	r3, [r8, #0]
 	adds	r3, r3, #1
-	bne	.L2058
+	bne	.L2062
 	uxth	r0, r7
 	bl	FtlBbmMapBadBlock
-	b	.L2057
-.L2058:
+	b	.L2061
+.L2062:
 	mov	r4, r5
 	mov	r5, sl
-.L2044:
+.L2048:
 	uxth	r0, r7
 	adds	r4, r4, #1
 	bl	FtlBbmMapBadBlock
 	adds	r5, r5, #4
-.L2042:
-	ldr	r2, .L2059+28
+.L2046:
+	ldr	r2, .L2063+28
 	ldrh	r3, [r2, #0]
 	cmp	r4, r3
-	bcc	.L2048
+	bcc	.L2052
 	movs	r4, #0
-	ldr	r5, .L2059+32
-	b	.L2049
-.L2050:
+	ldr	r5, .L2063+32
+	b	.L2053
+.L2054:
 	mov	r0, r4
 	adds	r4, r4, #1
 	bl	FtlBbmMapBadBlock
 	uxth	r4, r4
-.L2049:
+.L2053:
 	ldrh	r3, [r5, #0]
 	cmp	r3, r4
-	bhi	.L2050
-	ldr	r5, .L2059+4
+	bhi	.L2054
+	ldr	r5, .L2063+4
 	movw	r6, #65535
 	ldrh	r4, [r5, #12]
 	subs	r4, r4, #1
 	uxth	r4, r4
-	b	.L2051
-.L2056:
+	b	.L2055
+.L2060:
 	mov	r0, r4
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L2052
+	beq	.L2056
 	mov	r0, r4
 	bl	FlashTestBlk
-	cbz	r0, .L2053
+	cbz	r0, .L2057
 	mov	r0, r4
 	bl	FtlBbmMapBadBlock
-	b	.L2052
-.L2053:
+	b	.L2056
+.L2057:
 	ldrh	r3, [r5, #0]
 	cmp	r3, r6
-	bne	.L2054
+	bne	.L2058
 	strh	r4, [r5, #0]	@ movhi
-	b	.L2052
-.L2054:
-	ldr	r3, .L2059+4
+	b	.L2056
+.L2058:
+	ldr	r3, .L2063+4
 	strh	r4, [r3, #4]	@ movhi
-	b	.L2055
-.L2052:
+	b	.L2059
+.L2056:
 	subs	r4, r4, #1
 	uxth	r4, r4
-.L2051:
+.L2055:
 	ldrh	r3, [r5, #12]
 	subs	r3, r3, #47
 	cmp	r3, r4
-	ble	.L2056
-.L2055:
-	ldr	r4, .L2059+4
+	ble	.L2060
+.L2059:
+	ldr	r4, .L2063+4
 	movs	r5, #0
-	ldr	r3, .L2059+36
+	ldr	r3, .L2063+36
 	movs	r2, #2
 	movs	r1, #1
 	str	r5, [r4, #8]
@@ -18679,22 +18720,22 @@ FtlMakeBbt:
 	strh	r2, [r4, #0]	@ movhi
 	strh	r3, [r4, #4]	@ movhi
 	bl	FtlBbmTblFlush
-.L2041:
+.L2045:
 	movs	r0, #0
 	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L2060:
+.L2064:
 	.align	2
-.L2059:
-	.word	.LANCHOR94
-	.word	.LANCHOR90
-	.word	.LANCHOR66
-	.word	.LANCHOR98
+.L2063:
+	.word	.LANCHOR82
+	.word	.LANCHOR78
+	.word	.LANCHOR54
+	.word	.LANCHOR86
 	.word	.LANCHOR184
-	.word	.LANCHOR91
+	.word	.LANCHOR79
 	.word	.LANCHOR198
-	.word	.LANCHOR60
-	.word	.LANCHOR75
-	.word	.LANCHOR95
+	.word	.LANCHOR48
+	.word	.LANCHOR63
+	.word	.LANCHOR83
 	.size	FtlMakeBbt, .-FtlMakeBbt
 	.section	.text.FtlLowFormat,"ax",%progbits
 	.align	1
@@ -18705,48 +18746,48 @@ FtlMakeBbt:
 FtlLowFormat:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2082
+	ldr	r3, .L2086
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	ldr	r3, [r3, #0]
 	cmp	r3, #0
-	bne	.L2062
-	ldr	r2, .L2082+4
+	bne	.L2066
+	ldr	r2, .L2086+4
 	str	r3, [r2, #0]
-	ldr	r2, .L2082+8
+	ldr	r2, .L2086+8
 	str	r3, [r2, #0]
-	ldr	r3, .L2082+12
+	ldr	r3, .L2086+12
 	ldrh	r0, [r3, #0]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	r0, .L2063
+	cbz	r0, .L2067
 	bl	FtlMakeBbt
-.L2063:
-	ldr	r3, .L2082+16
-	ldr	r2, .L2082+20
+.L2067:
+	ldr	r3, .L2086+16
+	ldr	r2, .L2086+20
 	ldrh	r4, [r3, #0]
-	ldr	r3, .L2082+24
+	ldr	r3, .L2086+24
 	lsls	r4, r4, #7
 	ldr	r0, [r3, #0]
-	ldr	r3, .L2082+28
+	ldr	r3, .L2086+28
 	ldr	r1, [r3, #0]
 	movs	r3, #0
-	b	.L2064
-.L2065:
+	b	.L2068
+.L2069:
 	mvns	r5, r3
 	orr	r5, r3, r5, lsl #16
 	str	r5, [r0, r3, lsl #2]
 	str	r2, [r1, r3, lsl #2]
 	adds	r3, r3, #1
 	uxth	r3, r3
-.L2064:
+.L2068:
 	cmp	r3, r4
-	blt	.L2065
-	ldr	r3, .L2082+32
+	blt	.L2069
+	ldr	r3, .L2086+32
 	movs	r4, #0
-	ldr	r6, .L2082+36
+	ldr	r6, .L2086+36
 	ldrh	r5, [r3, #0]
-	b	.L2066
-.L2067:
+	b	.L2070
+.L2071:
 	mov	r0, r5
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
@@ -18754,47 +18795,47 @@ FtlLowFormat:
 	uxth	r5, r5
 	adds	r4, r4, r0
 	uxth	r4, r4
-.L2066:
+.L2070:
 	ldrh	r3, [r6, #0]
 	cmp	r3, r5
-	bhi	.L2067
-	ldr	r3, .L2082+40
+	bhi	.L2071
+	ldr	r3, .L2086+40
 	ldrh	r1, [r3, #0]
 	subs	r3, r4, #2
 	cmp	r3, r1, lsl #1
-	bgt	.L2068
-.L2072:
+	bgt	.L2072
+.L2076:
 	movs	r4, #0
-	ldr	r6, .L2082+32
+	ldr	r6, .L2086+32
 	mov	r5, r4
-	b	.L2069
-.L2068:
+	b	.L2073
+.L2072:
 	mov	r0, r4
-	ldr	r5, .L2082+36
+	ldr	r5, .L2086+36
 	bl	__aeabi_uidiv
-	ldr	r3, .L2082+44
+	ldr	r3, .L2086+44
 	ldr	r3, [r3, #0]
 	adds	r0, r0, r3
 	uxth	r0, r0
 	bl	FtlSysBlkNumInit
-	ldr	r3, .L2082+12
+	ldr	r3, .L2086+12
 	ldrh	r0, [r3, #0]
 	bl	FtlFreeSysBlkQueueInit
-	ldr	r3, .L2082+32
+	ldr	r3, .L2086+32
 	ldrh	r4, [r3, #0]
-	b	.L2070
-.L2071:
+	b	.L2074
+.L2075:
 	mov	r0, r4
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
 	adds	r4, r4, #1
 	uxth	r4, r4
-.L2070:
+.L2074:
 	ldrh	r3, [r5, #0]
 	cmp	r3, r4
-	bhi	.L2071
-	b	.L2072
-.L2073:
+	bhi	.L2075
+	b	.L2076
+.L2077:
 	mov	r0, r5
 	movs	r1, #0
 	bl	FtlLowFormatEraseBlock
@@ -18802,19 +18843,19 @@ FtlLowFormat:
 	uxth	r5, r5
 	adds	r4, r4, r0
 	uxth	r4, r4
-.L2069:
+.L2073:
 	ldrh	r3, [r6, #0]
 	cmp	r3, r5
-	bhi	.L2073
-	ldr	r3, .L2082+36
-	ldr	r8, .L2082+68
-	ldr	sl, .L2082+72
+	bhi	.L2077
+	ldr	r3, .L2086+36
+	ldr	r8, .L2086+68
+	ldr	sl, .L2086+72
 	ldrh	r2, [r3, #0]
-	ldr	r3, .L2082+48
+	ldr	r3, .L2086+48
 	str	r2, [r3, #0]
-	ldr	r3, .L2082+52
+	ldr	r3, .L2086+52
 	ldr	fp, [r3, #0]
-	ldr	r3, .L2082+40
+	ldr	r3, .L2086+40
 	mov	r0, fp
 	ldrh	r5, [r3, #0]
 	mov	r1, r5
@@ -18827,7 +18868,7 @@ FtlLowFormat:
 	muls	r3, r5, r3
 	cmp	r4, r3
 	str	r0, [sl, #0]
-	ble	.L2074
+	ble	.L2078
 	rsb	r0, r4, fp
 	mov	r1, r5
 	bl	__aeabi_uidiv
@@ -18835,113 +18876,113 @@ FtlLowFormat:
 	lsrs	r0, r0, #5
 	adds	r0, r0, #24
 	strh	r0, [r8, #0]	@ movhi
-.L2074:
-	ldr	r3, .L2082+56
+.L2078:
+	ldr	r3, .L2086+56
 	ldr	r3, [r3, #0]
 	cmp	r3, #1
-	bne	.L2075
+	bne	.L2079
 	mov	r0, r4
 	mov	r1, r5
 	bl	__aeabi_uidiv
-	ldr	r8, .L2082+68
+	ldr	r8, .L2086+68
 	ldrh	sl, [r8, #0]
 	uxtah	r0, sl, r0
 	add	sl, sl, r0, lsr #2
 	strh	sl, [r8, #0]	@ movhi
-.L2075:
-	ldr	r3, .L2082+60
+.L2079:
+	ldr	r3, .L2086+60
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L2076
+	cbz	r3, .L2080
 	mov	r0, r4
 	mov	r1, r5
 	bl	__aeabi_uidiv
-	ldr	r8, .L2082+68
+	ldr	r8, .L2086+68
 	ldrh	sl, [r8, #0]
 	uxtah	r0, sl, r0
 	add	sl, sl, r0, lsr #2
 	strh	sl, [r8, #0]	@ movhi
-.L2076:
-	ldr	r3, .L2082+64
+.L2080:
+	ldr	r3, .L2086+64
 	ldrh	r3, [r3, #0]
-	cbz	r3, .L2077
-	ldr	r2, .L2082+68
+	cbz	r3, .L2081
+	ldr	r2, .L2086+68
 	ldrh	r1, [r2, #0]
 	add	r1, r1, r3, lsr #1
 	strh	r1, [r2, #0]	@ movhi
 	mul	r1, r5, r3
 	cmp	r1, r4
-	ble	.L2077
-	ldr	r1, .L2082+72
+	ble	.L2081
+	ldr	r1, .L2086+72
 	adds	r3, r3, #32
 	adds	r7, r7, r3
 	strh	r7, [r2, #0]	@ movhi
 	str	r6, [r1, #0]
-.L2077:
-	ldr	r3, .L2082+72
-	ldr	r2, .L2082+68
-	ldr	r6, .L2082+76
+.L2081:
+	ldr	r3, .L2086+72
+	ldr	r2, .L2086+68
+	ldr	r6, .L2086+76
 	ldr	r1, [r3, #0]
 	ldrh	r2, [r2, #0]
-	ldr	r4, .L2082+80
+	ldr	r4, .L2086+80
 	subs	r2, r1, r2
 	muls	r5, r2, r5
-	ldr	r2, .L2082+84
+	ldr	r2, .L2086+84
 	str	r5, [r2, #0]
-	ldr	r2, .L2082+88
+	ldr	r2, .L2086+88
 	ldrh	r2, [r2, #0]
 	muls	r5, r2, r5
 	str	r5, [r3, #0]
-	ldr	r3, .L2082+16
+	ldr	r3, .L2086+16
 	ldrh	r3, [r3, #0]
 	muls	r5, r3, r5
-	ldr	r3, .L2082+92
+	ldr	r3, .L2086+92
 	str	r5, [r3, #0]
 	movw	r5, #65535
 	bl	FtlBbmTblFlush
-	ldr	r3, .L2082+36
+	ldr	r3, .L2086+36
 	movs	r1, #0
 	ldr	r0, [r6, #0]
 	ldrh	r2, [r3, #0]
 	lsls	r2, r2, #1
 	bl	memset
-	ldr	r2, .L2082+96
+	ldr	r2, .L2086+96
 	movs	r3, #0
 	strh	r3, [r4, #2]	@ movhi
 	strb	r3, [r4, #6]
 	movs	r1, #255
 	str	r3, [r2, #0]
-	ldr	r2, .L2082+100
+	ldr	r2, .L2086+100
 	strh	r3, [r4, #0]	@ movhi
 	strh	r3, [r2, #2]	@ movhi
 	strb	r3, [r2, #6]
 	strb	r3, [r2, #8]
 	movs	r3, #1
 	strb	r3, [r4, #8]
-	ldr	r3, .L2082+32
+	ldr	r3, .L2086+32
 	strh	r5, [r2, #0]	@ movhi
 	ldrh	r2, [r3, #0]
-	ldr	r3, .L2082+104
+	ldr	r3, .L2086+104
 	lsrs	r2, r2, #3
 	ldr	r0, [r3, #0]
 	bl	memset
-.L2078:
-	ldr	r7, .L2082+80
+.L2082:
+	ldr	r7, .L2086+80
 	mov	r0, r7
 	bl	make_superblock
 	ldrb	r2, [r4, #7]	@ zero_extendqisi2
-	ldr	r3, .L2082+76
-	cbnz	r2, .L2079
+	ldr	r3, .L2086+76
+	cbnz	r2, .L2083
 	ldrh	r2, [r4, #0]
 	ldr	r3, [r6, #0]
 	strh	r5, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r4, #0]
 	adds	r3, r3, #1
 	strh	r3, [r4, #0]	@ movhi
-	b	.L2078
-.L2079:
-	ldr	r2, .L2082+4
+	b	.L2082
+.L2083:
+	ldr	r2, .L2086+4
 	movw	r6, #65535
-	ldr	r4, .L2082+108
+	ldr	r4, .L2086+108
 	ldrh	r0, [r7, #4]
 	ldr	r1, [r2, #0]
 	str	r1, [r7, #12]
@@ -18959,53 +19000,53 @@ FtlLowFormat:
 	strh	r2, [r4, #0]	@ movhi
 	movs	r2, #1
 	strb	r2, [r4, #8]
-.L2080:
-	ldr	r5, .L2082+108
+.L2084:
+	ldr	r5, .L2086+108
 	mov	r0, r5
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L2081
+	bne	.L2085
 	ldrh	r2, [r4, #0]
 	ldr	r3, [r7, #0]
 	strh	r6, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r4, #0]
 	adds	r3, r3, #1
 	strh	r3, [r4, #0]	@ movhi
-	b	.L2080
-.L2083:
+	b	.L2084
+.L2087:
 	.align	2
-.L2082:
-	.word	.LANCHOR94
+.L2086:
+	.word	.LANCHOR82
 	.word	.LANCHOR156
 	.word	.LANCHOR157
-	.word	.LANCHOR54
-	.word	.LANCHOR71
+	.word	.LANCHOR42
+	.word	.LANCHOR59
 	.word	168778952
 	.word	.LANCHOR182
 	.word	.LANCHOR183
-	.word	.LANCHOR55
-	.word	.LANCHOR56
-	.word	.LANCHOR53
-	.word	.LANCHOR81
-	.word	.LANCHOR89
-	.word	.LANCHOR57
-	.word	.LANCHOR128
+	.word	.LANCHOR43
+	.word	.LANCHOR44
+	.word	.LANCHOR41
+	.word	.LANCHOR69
+	.word	.LANCHOR77
+	.word	.LANCHOR45
+	.word	.LANCHOR116
 	.word	.LANCHOR7
-	.word	.LANCHOR64
+	.word	.LANCHOR52
 	.word	.LANCHOR201
-	.word	.LANCHOR88
-	.word	.LANCHOR101
-	.word	.LANCHOR109
+	.word	.LANCHOR76
+	.word	.LANCHOR89
+	.word	.LANCHOR97
 	.word	.LANCHOR200
-	.word	.LANCHOR68
-	.word	.LANCHOR84
-	.word	.LANCHOR118
+	.word	.LANCHOR56
+	.word	.LANCHOR72
+	.word	.LANCHOR106
 	.word	.LANCHOR202
-	.word	.LANCHOR119
-	.word	.LANCHOR110
-.L2081:
-	ldr	r4, .L2084
+	.word	.LANCHOR107
+	.word	.LANCHOR98
+.L2085:
+	ldr	r4, .L2088
 	ldrh	r1, [r5, #4]
 	ldrh	r2, [r5, #0]
 	ldr	r3, [r4, #0]
@@ -19013,16 +19054,16 @@ FtlLowFormat:
 	adds	r3, r3, #1
 	str	r3, [r4, #0]
 	movw	r5, #65535
-	ldr	r3, .L2084+4
+	ldr	r3, .L2088+4
 	ldr	r3, [r3, #0]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L2084+8
+	ldr	r3, .L2088+8
 	strh	r5, [r3, #0]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L2084+12
+	ldr	r3, .L2088+12
 	movs	r2, #0
 	strh	r2, [r3, #2]	@ movhi
-	ldr	r2, .L2084+16
+	ldr	r2, .L2088+16
 	strh	r5, [r3, #4]	@ movhi
 	ldr	r2, [r2, #0]
 	strh	r2, [r3, #6]	@ movhi
@@ -19033,19 +19074,19 @@ FtlLowFormat:
 	strh	r0, [r3, #0]	@ movhi
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	r0, .L2062
-	ldr	r3, .L2084+20
+	cbnz	r0, .L2066
+	ldr	r3, .L2088+20
 	movs	r2, #1
 	str	r2, [r3, #0]
-.L2062:
+.L2066:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L2085:
+.L2089:
 	.align	2
-.L2084:
+.L2088:
 	.word	.LANCHOR156
-	.word	.LANCHOR101
-	.word	.LANCHOR111
+	.word	.LANCHOR89
+	.word	.LANCHOR99
 	.word	.LANCHOR196
 	.word	.LANCHOR200
 	.word	.LANCHOR225
@@ -19059,7 +19100,7 @@ FtlLowFormat:
 HynixGetReadRetryDefault:
 	@ args = 0, pretend = 0, frame = 64
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2175
+	ldr	r3, .L2179
 	movs	r2, #172
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	mov	r4, r0
@@ -19073,16 +19114,16 @@ HynixGetReadRetryDefault:
 	strb	r0, [r3, #5]
 	strb	r1, [r3, #6]
 	strb	r2, [r3, #7]
-	bne	.L2087
+	bne	.L2091
 	movs	r2, #167
 	strb	r2, [r3, #4]
-	ldr	r3, .L2175+4
+	ldr	r3, .L2179+4
 	movs	r2, #247
 	strb	r2, [r3, #17]
-	b	.L2142
-.L2087:
+	b	.L2146
+.L2091:
 	cmp	r4, #3
-	bne	.L2089
+	bne	.L2093
 	movs	r2, #176
 	strb	r2, [r3, #4]
 	movs	r2, #177
@@ -19098,10 +19139,10 @@ HynixGetReadRetryDefault:
 	movs	r2, #182
 	strb	r2, [r3, #10]
 	movs	r2, #183
-	b	.L2169
-.L2089:
+	b	.L2173
+.L2093:
 	cmp	r4, #4
-	bne	.L2090
+	bne	.L2094
 	movs	r5, #204
 	strb	r0, [r3, #9]
 	strb	r5, [r3, #4]
@@ -19114,14 +19155,14 @@ HynixGetReadRetryDefault:
 	strb	r5, [r3, #7]
 	movs	r5, #205
 	strb	r5, [r3, #8]
-.L2169:
+.L2173:
 	movs	r6, #8
 	strb	r2, [r3, #11]
 	mov	r5, r6
-	b	.L2088
-.L2090:
+	b	.L2092
+.L2094:
 	cmp	r4, #5
-	bne	.L2091
+	bne	.L2095
 	movs	r2, #56
 	movs	r6, #8
 	strb	r2, [r3, #4]
@@ -19131,10 +19172,10 @@ HynixGetReadRetryDefault:
 	strb	r2, [r3, #6]
 	movs	r2, #59
 	strb	r2, [r3, #7]
-	b	.L2168
-.L2091:
+	b	.L2172
+.L2095:
 	cmp	r4, #6
-	bne	.L2092
+	bne	.L2096
 	movs	r2, #14
 	movs	r6, #12
 	strb	r2, [r3, #4]
@@ -19144,10 +19185,10 @@ HynixGetReadRetryDefault:
 	strb	r2, [r3, #6]
 	movs	r2, #17
 	strb	r2, [r3, #7]
-	b	.L2168
-.L2092:
+	b	.L2172
+.L2096:
 	cmp	r4, #7
-	bne	.L2142
+	bne	.L2146
 	movs	r2, #176
 	movs	r6, #12
 	strb	r2, [r3, #4]
@@ -19170,21 +19211,21 @@ HynixGetReadRetryDefault:
 	strb	r2, [r3, #12]
 	movs	r2, #213
 	strb	r2, [r3, #13]
-	b	.L2088
-.L2142:
+	b	.L2092
+.L2146:
 	movs	r6, #7
-.L2168:
+.L2172:
 	movs	r5, #4
-.L2088:
+.L2092:
 	subs	r3, r4, #1
 	cmp	r3, #1
-	bhi	.L2164
-	b	.L2173
-.L2099:
-	ldr	r3, .L2175+8
+	bhi	.L2168
+	b	.L2177
+.L2103:
+	ldr	r3, .L2179+8
 	mov	sl, #0
-	ldr	r1, .L2175+12
-	ldr	r4, .L2175+16
+	ldr	r1, .L2179+12
+	ldr	r4, .L2179+16
 	ldrb	r2, [r3, r7]	@ zero_extendqisi2
 	ldr	r0, [r1, r2, lsl #3]
 	add	r4, r4, r2, lsl #6
@@ -19193,7 +19234,7 @@ HynixGetReadRetryDefault:
 	movs	r2, #55
 	adds	r3, r3, #8
 	add	r3, r0, r3, lsl #8
-.L2095:
+.L2099:
 	add	r1, r8, sl
 	str	r2, [r3, #8]
 	movs	r0, #80
@@ -19209,26 +19250,26 @@ HynixGetReadRetryDefault:
 	ldr	r2, [sp, #8]
 	uxtb	r1, sl
 	cmp	r1, r5
-	bcc	.L2095
+	bcc	.L2099
 	movs	r3, #0
-	b	.L2096
-.L2097:
+	b	.L2100
+.L2101:
 	ldrb	ip, [sl, r2, lsl #2]	@ zero_extendqisi2
 	ldrb	r0, [r4, r3]	@ zero_extendqisi2
 	add	r0, ip, r0
 	strb	r0, [r1, r2, lsl #3]
 	adds	r2, r2, #1
 	cmp	r2, #7
-	bne	.L2097
+	bne	.L2101
 	adds	r3, r3, #1
 	cmp	r3, #4
-	beq	.L2098
-.L2096:
+	beq	.L2102
+.L2100:
 	movs	r2, #1
 	adds	r1, r4, r3
 	add	sl, fp, r3
-	b	.L2097
-.L2098:
+	b	.L2101
+.L2102:
 	adds	r7, r7, #1
 	movs	r3, #0
 	strb	r3, [r4, #16]
@@ -19239,21 +19280,21 @@ HynixGetReadRetryDefault:
 	strb	r3, [r4, #48]
 	strb	r3, [r4, #41]
 	strb	r3, [r4, #49]
-	b	.L2093
-.L2173:
-	ldr	r8, .L2175
+	b	.L2097
+.L2177:
+	ldr	r8, .L2179
 	movs	r7, #0
-	ldr	fp, .L2175+4
-.L2093:
-	ldr	r3, .L2175+20
+	ldr	fp, .L2179+4
+.L2097:
+	ldr	r3, .L2179+20
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	cmp	r3, r7
-	bhi	.L2099
-	b	.L2100
-.L2164:
+	bhi	.L2103
+	b	.L2104
+.L2168:
 	subs	r3, r4, #3
 	cmp	r3, #4
-	bhi	.L2100
+	bhi	.L2104
 	smulbb	r3, r5, r6
 	str	r6, [sp, #48]
 	asrs	r2, r3, #2
@@ -19265,12 +19306,12 @@ HynixGetReadRetryDefault:
 	str	r2, [sp, #24]
 	uxtb	r3, r3
 	str	r3, [sp, #56]
-	b	.L2101
-.L2141:
-	ldr	r3, .L2175+8
+	b	.L2105
+.L2145:
+	ldr	r3, .L2179+8
 	ldr	fp, [sp, #20]
 	ldrb	r6, [r3, fp]	@ zero_extendqisi2
-	ldr	r3, .L2175+12
+	ldr	r3, .L2179+12
 	mov	r0, r6
 	ldr	sl, [r3, r6, lsl #3]
 	add	r3, r3, r6, lsl #3
@@ -19283,46 +19324,46 @@ HynixGetReadRetryDefault:
 	bl	NandcWaitFlashReady
 	cmp	r4, #7
 	sxth	r3, r6
-	beq	.L2102
-	ldr	r1, .L2175+16
+	beq	.L2106
+	ldr	r1, .L2179+16
 	add	r3, r1, r3, lsl #6
-	b	.L2170
-.L2102:
+	b	.L2174
+.L2106:
 	lsls	r1, r3, #7
 	add	r3, r1, r3, lsl #5
-	ldr	r1, .L2175+24
+	ldr	r1, .L2179+24
 	adds	r3, r1, r3
-.L2170:
+.L2174:
 	str	r3, [sp, #32]
 	movs	r3, #54
 	cmp	r4, #4
 	str	r3, [r7, #8]
-	bne	.L2104
+	bne	.L2108
 	movs	r3, #255
 	str	r3, [r7, #4]
 	movs	r3, #64
 	str	r3, [sl, r8]
 	movs	r3, #204
-	b	.L2171
-.L2104:
+	b	.L2175
+.L2108:
 	subs	r3, r4, #5
 	cmp	r3, #1
-	bhi	.L2106
-	ldr	r3, .L2175
+	bhi	.L2110
+	ldr	r3, .L2179
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
 	str	r3, [r7, #4]
 	movs	r3, #82
-	b	.L2172
-.L2106:
+	b	.L2176
+.L2110:
 	movs	r3, #174
 	str	r3, [r7, #4]
 	movs	r3, #0
 	str	r3, [sl, r8]
 	movs	r3, #176
-.L2171:
+.L2175:
 	str	r3, [r7, #4]
 	movs	r3, #77
-.L2172:
+.L2176:
 	str	r3, [sl, r8]
 	movs	r3, #22
 	str	r3, [r7, #8]
@@ -19352,71 +19393,71 @@ HynixGetReadRetryDefault:
 	mov	r1, ip
 	str	ip, [sp, #36]
 	cmp	r1, #1
-	bls	.L2144
+	bls	.L2148
 	cmp	r4, #7
 	ite	eq
 	moveq	r1, #32
 	movne	r1, #2
-	b	.L2110
-.L2144:
+	b	.L2114
+.L2148:
 	movs	r1, #16
-.L2110:
-	ldr	r3, .L2175+28
+.L2114:
+	ldr	r3, .L2179+28
 	ldr	r2, [r3, #0]
 	movs	r3, #0
-.L2111:
+.L2115:
 	ldr	r0, [r7, #0]
 	strb	r0, [r2, r3]
 	adds	r3, r3, #1
 	uxtb	r0, r3
 	cmp	r0, r1
-	bcc	.L2111
+	bcc	.L2115
 	cmp	r4, #7
-	bne	.L2112
+	bne	.L2116
 	movs	r3, #0
-.L2114:
+.L2118:
 	ldrb	r1, [r2, #0]	@ zero_extendqisi2
 	cmp	r1, #12
-	beq	.L2113
+	beq	.L2117
 	ldrb	r1, [r2, #1]	@ zero_extendqisi2
 	cmp	r1, #10
-	beq	.L2113
+	beq	.L2117
 	adds	r3, r3, #1
 	adds	r2, r2, #4
 	uxtb	r3, r3
 	cmp	r3, #8
-	bne	.L2114
-	b	.L2115
-.L2113:
+	bne	.L2118
+	b	.L2119
+.L2117:
 	cmp	r3, #6
-	bls	.L2116
-.L2115:
-	ldr	r0, .L2175+32
+	bls	.L2120
+.L2119:
+	ldr	r0, .L2179+32
 	movs	r1, #0
 	bl	printf
-.L2117:
-	b	.L2117
-.L2112:
+.L2121:
+	b	.L2121
+.L2116:
 	cmp	r4, #6
-	bne	.L2116
+	bne	.L2120
 	movs	r3, #0
-.L2118:
+.L2122:
 	ldrb	r1, [r2], #1	@ zero_extendqisi2
 	cmp	r1, #12
-	beq	.L2116
+	beq	.L2120
 	ldrb	r1, [r2, #7]	@ zero_extendqisi2
 	cmp	r1, #4
-	beq	.L2116
+	beq	.L2120
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, #8
-	bne	.L2118
-	b	.L2174
-.L2120:
-	b	.L2120
-.L2176:
+	bne	.L2122
+	b	.L2178
+.L2124:
+	b	.L2124
+.L2180:
 	.align	2
-.L2175:
+.L2179:
 	.word	.LANCHOR31
 	.word	.LANCHOR242
 	.word	.LANCHOR19
@@ -19424,22 +19465,22 @@ HynixGetReadRetryDefault:
 	.word	.LANCHOR31+20
 	.word	.LANCHOR16
 	.word	.LANCHOR31+28
-	.word	.LANCHOR44
+	.word	.LANCHOR146
 	.word	.LC51
-.L2116:
-	ldr	r0, .L2177
+.L2120:
+	ldr	r0, .L2181
 	movs	r3, #0
 	ldr	r0, [r0, #0]
 	str	r0, [sp, #40]
-.L2121:
+.L2125:
 	ldr	r2, [r7, #0]
 	ldr	r1, [sp, #40]
 	strb	r2, [r1, r3]
 	adds	r3, r3, #1
 	ldr	r2, [sp, #52]
 	cmp	r3, r2
-	blt	.L2121
-	ldr	r3, .L2177
+	blt	.L2125
+	ldr	r3, .L2181
 	movs	r2, #8
 	ldr	ip, [sp, #24]
 	ldr	r1, [r3, #0]
@@ -19447,10 +19488,10 @@ HynixGetReadRetryDefault:
 	lsl	fp, ip, #3
 	str	r0, [sp, #44]
 	adds	r0, r1, r0
-.L2123:
+.L2127:
 	movs	r3, #0
 	mov	lr, r3
-.L2122:
+.L2126:
 	ldr	ip, [r0, r3]
 	add	lr, lr, #1
 	mvn	ip, ip
@@ -19458,15 +19499,15 @@ HynixGetReadRetryDefault:
 	ldr	ip, [sp, #24]
 	adds	r3, r3, #4
 	cmp	lr, ip
-	blt	.L2122
+	blt	.L2126
 	subs	r2, r2, #1
 	add	r0, r0, fp
-	bne	.L2123
+	bne	.L2127
 	mov	lr, r1
 	str	r2, [sp, #16]
 	str	r5, [sp, #60]
-	b	.L2124
-.L2128:
+	b	.L2128
+.L2132:
 	movs	r0, #1
 	mov	fp, #16
 	str	r3, [sp, #4]
@@ -19474,7 +19515,7 @@ HynixGetReadRetryDefault:
 	movs	r0, #0
 	mov	ip, r0
 	str	fp, [sp, #28]
-.L2126:
+.L2130:
 	ldr	fp, [lr, r0]
 	ldr	r3, [sp, #44]
 	and	fp, r5, fp
@@ -19485,92 +19526,92 @@ HynixGetReadRetryDefault:
 	addeq	ip, ip, #1
 	subs	r3, r3, #1
 	str	r3, [sp, #28]
-	bne	.L2126
+	bne	.L2130
 	ldr	r3, [sp, #4]
 	cmp	ip, #8
 	it	hi
 	orrhi	r2, r2, r5
 	adds	r3, r3, #1
 	cmp	r3, #32
-	bne	.L2128
+	bne	.L2132
 	ldr	fp, [sp, #16]
 	ldr	ip, [sp, #24]
 	add	fp, fp, #1
 	str	r2, [lr], #4
 	cmp	fp, ip
 	str	fp, [sp, #16]
-	bge	.L2146
-.L2124:
+	bge	.L2150
+.L2128:
 	movs	r2, #0
 	mov	r3, r2
-	b	.L2128
-.L2146:
+	b	.L2132
+.L2150:
 	movs	r3, #0
 	ldr	r5, [sp, #60]
 	mov	r2, r3
-.L2129:
+.L2133:
 	ldr	r0, [r1, r3]
-	cbnz	r0, .L2130
+	cbnz	r0, .L2134
 	adds	r2, r2, #1
-.L2130:
+.L2134:
 	adds	r3, r3, #4
 	cmp	r3, #32
-	bne	.L2129
+	bne	.L2133
 	cmp	r2, #7
-	ble	.L2131
-	ldr	r0, .L2177+4
+	ble	.L2135
+	ldr	r0, .L2181+4
 	movs	r2, #1
 	mov	r3, #1024
 	bl	rknand_print_hex
-	ldr	r0, .L2177+8
+	ldr	r0, .L2181+8
 	movs	r1, #0
 	bl	printf
-.L2132:
-	b	.L2132
-.L2131:
+.L2136:
+	b	.L2136
+.L2135:
 	cmp	r4, #6
-	beq	.L2147
+	beq	.L2151
 	cmp	r4, #7
 	ite	eq
 	moveq	r0, #10
 	movne	r0, #8
 	str	r0, [sp, #16]
-	b	.L2133
-.L2147:
+	b	.L2137
+.L2151:
 	movs	r1, #4
 	str	r1, [sp, #16]
-.L2133:
-	cbz	r5, .L2134
+.L2137:
+	cbz	r5, .L2138
 	ldr	r2, [sp, #56]
 	add	lr, r2, #1
-	b	.L2135
-.L2134:
+	b	.L2139
+.L2138:
 	mov	lr, #1
-.L2135:
+.L2139:
 	ldr	r0, [sp, #40]
 	movs	r2, #0
 	ldr	r1, [sp, #32]
 	mov	fp, r4
-	b	.L2136
-.L2137:
+	b	.L2140
+.L2141:
 	ldrb	ip, [r4], #1	@ zero_extendqisi2
 	strb	ip, [r1, r3]
 	adds	r3, r3, #1
 	uxtb	ip, r3
 	cmp	ip, r5
-	bcc	.L2137
+	bcc	.L2141
 	ldr	ip, [sp, #48]
 	adds	r2, r2, #1
 	ldr	r3, [sp, #16]
 	add	r0, r0, lr
 	cmp	r2, ip
 	add	r1, r1, r3
-	bge	.L2138
-.L2136:
+	bge	.L2142
+.L2140:
 	mov	r4, r0
 	movs	r3, #0
-	b	.L2137
-.L2138:
+	b	.L2141
+.L2142:
 	movs	r3, #255
 	mov	r0, r6
 	str	r3, [r7, #8]
@@ -19578,10 +19619,10 @@ HynixGetReadRetryDefault:
 	bl	NandcWaitFlashReady
 	ldr	r1, [sp, #36]
 	cmp	r1, #1
-	bhi	.L2139
+	bhi	.L2143
 	movs	r3, #54
 	str	r3, [r7, #8]
-	ldr	r3, .L2177+12
+	ldr	r3, .L2181+12
 	mov	r1, #-1
 	ldr	r0, [sp, #20]
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
@@ -19591,39 +19632,39 @@ HynixGetReadRetryDefault:
 	movs	r3, #22
 	str	r3, [r7, #8]
 	bl	FlashReadCmd
-	b	.L2140
-.L2139:
+	b	.L2144
+.L2143:
 	movs	r3, #56
 	str	r3, [r7, #8]
-.L2140:
+.L2144:
 	mov	r0, r6
 	bl	NandcWaitFlashReady
 	ldr	r2, [sp, #20]
 	adds	r3, r2, #1
 	uxtb	r3, r3
 	str	r3, [sp, #20]
-.L2101:
-	ldr	r0, .L2177+16
+.L2105:
+	ldr	r0, .L2181+16
 	ldr	r2, [sp, #20]
 	ldrb	r3, [r0, #0]	@ zero_extendqisi2
 	cmp	r3, r2
-	bhi	.L2141
+	bhi	.L2145
 	ldr	r6, [sp, #48]
-.L2100:
-	ldr	r3, .L2177+12
+.L2104:
+	ldr	r3, .L2181+12
 	strb	r5, [r3, #1]
 	strb	r6, [r3, #2]
 	add	sp, sp, #64
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L2174:
+.L2178:
 	movs	r1, #0
-	ldr	r0, .L2177+8
+	ldr	r0, .L2181+8
 	bl	printf
-	b	.L2120
-.L2178:
+	b	.L2124
+.L2182:
 	.align	2
-.L2177:
-	.word	.LANCHOR44
+.L2181:
+	.word	.LANCHOR146
 	.word	.LC52
 	.word	.LC51
 	.word	.LANCHOR31
@@ -19641,75 +19682,75 @@ FlashGetReadRetryDefault:
 	@ link register save eliminated.
 	mov	r3, r0
 	cmp	r0, #0
-	beq	.L2179
+	beq	.L2183
 	subs	r2, r0, #1
 	cmp	r2, #6
-	bhi	.L2181
+	bhi	.L2185
 	b	HynixGetReadRetryDefault
-.L2181:
+.L2185:
 	cmp	r0, #49
-	bne	.L2182
-	ldr	r0, .L2190
+	bne	.L2186
+	ldr	r0, .L2194
 	movs	r2, #64
-	ldr	r1, .L2190+4
+	ldr	r1, .L2194+4
 	strb	r3, [r0, #0]
 	movs	r3, #4
 	strb	r3, [r0, #1]
 	movs	r3, #15
 	strb	r3, [r0, #2]
 	adds	r0, r0, #4
-	b	.L2188
-.L2182:
+	b	.L2192
+.L2186:
 	cmp	r0, #33
-	beq	.L2183
+	beq	.L2187
 	cmp	r0, #65
-	beq	.L2183
+	beq	.L2187
 	cmp	r0, #66
-	bne	.L2184
-.L2183:
-	ldr	r0, .L2190
+	bne	.L2188
+.L2187:
+	ldr	r0, .L2194
 	strb	r3, [r0, #0]
 	movs	r3, #4
-	b	.L2189
-.L2184:
+	b	.L2193
+.L2188:
 	cmp	r0, #34
-	beq	.L2185
+	beq	.L2189
 	cmp	r0, #67
-	bne	.L2186
-.L2185:
-	ldr	r0, .L2190
+	bne	.L2190
+.L2189:
+	ldr	r0, .L2194
 	strb	r3, [r0, #0]
 	movs	r3, #5
-.L2189:
+.L2193:
 	strb	r3, [r0, #1]
 	movs	r2, #45
 	movs	r3, #7
-	ldr	r1, .L2190+8
+	ldr	r1, .L2194+8
 	strb	r3, [r0, #2]
 	adds	r0, r0, #4
-	b	.L2188
-.L2186:
+	b	.L2192
+.L2190:
 	cmp	r0, #35
-	beq	.L2187
+	beq	.L2191
 	cmp	r0, #68
-	bne	.L2179
-.L2187:
-	ldr	r0, .L2190
+	bne	.L2183
+.L2191:
+	ldr	r0, .L2194
 	movs	r2, #95
-	ldr	r1, .L2190+12
+	ldr	r1, .L2194+12
 	strb	r3, [r0, #0]
 	movs	r3, #5
 	strb	r3, [r0, #1]
 	movs	r3, #17
 	strb	r3, [r0, #2]
 	adds	r0, r0, #4
-.L2188:
+.L2192:
 	b	memcpy
-.L2179:
+.L2183:
 	bx	lr
-.L2191:
+.L2195:
 	.align	2
-.L2190:
+.L2194:
 	.word	.LANCHOR31
 	.word	.LANCHOR15
 	.word	.LANCHOR10
@@ -19729,51 +19770,51 @@ FlashInit:
 	sub	sp, sp, #24
 	mov	r0, #32768
 	bl	ftl_malloc
-	ldr	r3, .L2238
+	ldr	r3, .L2242
 	movs	r5, #0
-	ldr	r8, .L2238+84
+	ldr	r8, .L2242+84
 	mov	r6, r5
 	str	r0, [r3, #0]
 	mov	r0, #32768
 	bl	ftl_malloc
-	ldr	r3, .L2238+4
+	ldr	r3, .L2242+4
 	str	r0, [r3, #0]
 	mov	r0, #4096
 	bl	ftl_malloc
-	ldr	r3, .L2238+8
+	ldr	r3, .L2242+8
 	str	r0, [r3, #0]
 	mov	r0, #32768
 	bl	ftl_malloc
-	ldr	r3, .L2238+12
+	ldr	r3, .L2242+12
 	str	r0, [r3, #0]
 	mov	r0, #4096
 	bl	ftl_malloc
-	ldr	r3, .L2238+16
-	ldr	r2, .L2238+20
+	ldr	r3, .L2242+16
+	ldr	r2, .L2242+20
 	str	r0, [r3, #0]
 	movs	r3, #50
 	strb	r3, [r2, #0]
 	mov	r0, r4
-	ldr	r2, .L2238+24
-	ldr	r4, .L2238+28
+	ldr	r2, .L2242+24
+	ldr	r4, .L2242+28
 	strb	r3, [r2, #0]
 	movs	r2, #128
-	ldr	r3, .L2238+32
+	ldr	r3, .L2242+32
 	mov	r7, r4
 	str	r5, [r3, #0]
-	ldr	r3, .L2238+36
+	ldr	r3, .L2242+36
 	str	r2, [r3, #0]
 	movs	r2, #60
-	ldr	r3, .L2238+40
+	ldr	r3, .L2242+40
 	strb	r5, [r3, #0]
-	ldr	r3, .L2238+44
+	ldr	r3, .L2242+44
 	str	r5, [r3, #0]
-	ldr	r3, .L2238+48
+	ldr	r3, .L2242+48
 	strb	r5, [r3, #0]
-	ldr	r3, .L2238+52
+	ldr	r3, .L2242+52
 	strb	r2, [r3, #0]
 	bl	NandcInit
-.L2197:
+.L2201:
 	uxtb	r3, r6
 	str	r3, [sp, #16]
 	mov	r0, r3
@@ -19814,10 +19855,10 @@ FlashInit:
 	subs	r3, r2, #1
 	uxtb	r3, r3
 	cmp	r3, #253
-	bhi	.L2193
+	bhi	.L2197
 	ldrb	r1, [r4, #2]	@ zero_extendqisi2
 	ldrb	r3, [r4, #1]	@ zero_extendqisi2
-	ldr	r0, .L2238+56
+	ldr	r0, .L2242+56
 	str	r1, [sp, #0]
 	ldrb	r1, [r4, #3]	@ zero_extendqisi2
 	str	r1, [sp, #4]
@@ -19827,96 +19868,102 @@ FlashInit:
 	str	r1, [sp, #12]
 	adds	r1, r6, #1
 	bl	printf
-.L2193:
-	cbnz	r6, .L2194
+.L2197:
+	cbnz	r6, .L2198
 	ldrb	r3, [r7, #0]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, #253
-	bhi	.L2231
+	bhi	.L2235
 	ldrb	r3, [r7, #1]	@ zero_extendqisi2
 	cmp	r3, #255
-	beq	.L2231
-.L2194:
+	beq	.L2235
+.L2198:
 	ldrb	r3, [r5, r7]	@ zero_extendqisi2
 	cmp	r3, #181
-	bne	.L2196
+	bne	.L2200
 	movs	r3, #44
 	strb	r3, [r5, r7]
-.L2196:
+.L2200:
 	adds	r6, r6, #1
 	adds	r5, r5, #8
 	adds	r4, r4, #8
 	cmp	r6, #4
-	bne	.L2197
-	ldr	r3, .L2238+28
+	bne	.L2201
+	ldr	r3, .L2242+28
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	cmp	r3, #173
-	beq	.L2198
-	ldr	r3, .L2238+60
+	beq	.L2202
+	ldr	r3, .L2242+60
 	ldr	r0, [r3, #0]
 	bl	NandcSetDdrMode
-.L2198:
+.L2202:
 	movs	r1, #0
 	mov	r2, #852
-	ldr	r0, .L2238+64
+	ldr	r0, .L2242+64
 	bl	memset
-	ldr	r2, .L2238+68
-	ldr	r3, .L2238+72
+	ldr	r2, .L2242+68
+	ldr	r3, .L2242+72
 	str	r2, [r3, #0]
 	movs	r2, #0
-	ldr	r3, .L2238+76
+	ldr	r3, .L2242+76
 	strb	r2, [r3, #0]
-	ldr	r3, .L2238+28
-	ldrb	r3, [r3, #1]	@ zero_extendqisi2
+	ldr	r2, .L2242+28
+	ldrb	r3, [r2, #1]	@ zero_extendqisi2
+	cmp	r3, #161
+	beq	.L2203
 	cmp	r3, #241
-	beq	.L2199
+	beq	.L2203
 	cmp	r3, #218
-	beq	.L2199
+	beq	.L2203
 	cmp	r3, #220
-	bne	.L2200
-.L2199:
-	ldr	r2, .L2238+48
+	bne	.L2204
+	ldrb	r2, [r2, #3]	@ zero_extendqisi2
+	cmp	r2, #149
+	bne	.L2204
+.L2203:
+	ldr	r2, .L2242+48
 	movs	r1, #1
-	ldr	r0, .L2238+28
+	ldr	r0, .L2242+28
 	strb	r1, [r2, #0]
 	movs	r2, #16
-	ldr	r1, .L2238+20
+	ldr	r1, .L2242+20
 	ldrb	r4, [r0, #0]	@ zero_extendqisi2
 	strb	r2, [r1, #0]
 	cmp	r4, #152
-	ldr	r1, .L2238+52
+	ldr	r1, .L2242+52
 	strb	r2, [r1, #0]
-	ldr	r2, .L2238+80
+	ldr	r2, .L2242+80
 	strb	r4, [r2, #1]
-	bne	.L2201
+	strb	r3, [r2, #2]
+	bne	.L2205
 	ldrsb	r0, [r0, #4]
 	cmp	r0, #0
-	blt	.L2201
+	blt	.L2205
 	movs	r0, #24
 	strb	r0, [r1, #0]
-.L2201:
+.L2205:
 	cmp	r3, #218
-	bne	.L2202
+	bne	.L2206
 	mov	r1, #2048
-	b	.L2236
-.L2239:
+	b	.L2240
+.L2243:
 	.align	2
-.L2238:
-	.word	.LANCHOR44
-	.word	.LANCHOR41
+.L2242:
+	.word	.LANCHOR146
+	.word	.LANCHOR143
 	.word	.LANCHOR241
 	.word	.LANCHOR204
 	.word	.LANCHOR205
 	.word	.LANCHOR1
-	.word	.LANCHOR49
+	.word	.LANCHOR151
 	.word	.LANCHOR22
-	.word	.LANCHOR46
+	.word	.LANCHOR148
 	.word	.LANCHOR2
 	.word	.LANCHOR35
-	.word	.LANCHOR50
+	.word	.LANCHOR152
 	.word	.LANCHOR0
-	.word	.LANCHOR45
+	.word	.LANCHOR147
 	.word	.LC53
 	.word	.LANCHOR192
 	.word	.LANCHOR31
@@ -19925,110 +19972,110 @@ FlashInit:
 	.word	.LANCHOR4
 	.word	.LANCHOR243
 	.word	.LANCHOR5
-.L2202:
+.L2206:
 	cmp	r3, #220
-	bne	.L2203
+	bne	.L2207
 	mov	r1, #4096
-.L2236:
+.L2240:
 	strh	r1, [r2, #14]	@ movhi
 	strb	r3, [r2, #2]
-.L2203:
-	ldr	r1, .L2240
+.L2207:
+	ldr	r1, .L2244
 	movs	r2, #32
-	ldr	r0, .L2240+4
+	ldr	r0, .L2244+4
 	bl	memcpy
-	ldr	r0, .L2240+8
-	ldr	r1, .L2240+12
+	ldr	r0, .L2244+8
+	ldr	r1, .L2244+12
 	movs	r2, #32
 	bl	memcpy
-.L2200:
-	ldr	r3, .L2240+16
+.L2204:
+	ldr	r3, .L2244+16
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L2204
+	bne	.L2208
 	bl	FlashLoadPhyInfoInRam
-	cbnz	r0, .L2205
-	ldr	r3, .L2240+20
-	ldr	r4, .L2240+24
+	cbnz	r0, .L2209
+	ldr	r3, .L2244+20
+	ldr	r4, .L2244+24
 	ldr	r3, [r3, #0]
 	ldrh	r0, [r3, #16]
 	ubfx	r0, r0, #8, #3
 	strb	r0, [r4, #0]
 	lsls	r2, r0, #31
-	bmi	.L2205
-	ldr	r3, .L2240+28
+	bmi	.L2209
+	ldr	r3, .L2244+28
 	movs	r2, #1
 	strb	r2, [r3, #0]
 	bl	FlashSetInterfaceMode
 	ldrb	r0, [r4, #0]	@ zero_extendqisi2
 	bl	NandcSetMode
-.L2205:
-	ldr	r4, .L2240+20
+.L2209:
+	ldr	r4, .L2244+20
 	ldr	r3, [r4, #0]
 	ldrb	r2, [r3, #26]	@ zero_extendqisi2
-	ldr	r3, .L2240+32
+	ldr	r3, .L2244+32
 	strb	r2, [r3, #0]
 	bl	FlashLoadPhyInfo
 	cmp	r0, #0
-	beq	.L2204
+	beq	.L2208
 	ldr	r3, [r4, #0]
-	ldr	r0, .L2240+36
+	ldr	r0, .L2244+36
 	ldrh	r1, [r3, #14]
 	bl	printf
 	bl	FlashLoadPhyInfoInRam
 	adds	r3, r0, #1
-	beq	.L2195
+	beq	.L2199
 	bl	FlashDieInfoInit
 	ldr	r3, [r4, #0]
 	ldrb	r0, [r3, #19]	@ zero_extendqisi2
 	bl	FlashGetReadRetryDefault
-	ldr	r1, .L2240+40
+	ldr	r1, .L2244+40
 	ldr	r3, [r4, #0]
 	ldrh	r1, [r1, #0]
 	ldrb	r2, [r3, #9]	@ zero_extendqisi2
 	addw	r1, r1, #4095
 	cmp	r2, r1, lsr #12
-	blt	.L2206
+	blt	.L2210
 	ldrh	r1, [r3, #14]
 	adds	r1, r1, #255
 	cmp	r2, r1, lsr #8
-	bge	.L2207
-.L2206:
+	bge	.L2211
+.L2210:
 	ldrh	r2, [r3, #14]
 	bic	r2, r2, #255
 	strh	r2, [r3, #14]	@ movhi
-.L2207:
-	ldr	r3, .L2240+24
+.L2211:
+	ldr	r3, .L2244+24
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	tst	r3, #6
-	beq	.L2208
+	beq	.L2212
 	bl	FlashSavePhyInfo
-	ldr	r3, .L2240+44
+	ldr	r3, .L2244+44
 	movs	r0, #0
 	ldr	r1, [r3, #0]
 	bl	FlashDdrParaScan
-.L2208:
+.L2212:
 	bl	FlashSavePhyInfo
-.L2204:
-	ldr	r5, .L2240+20
-	ldr	r2, .L2240+32
-	ldr	r4, .L2240+48
+.L2208:
+	ldr	r5, .L2244+20
+	ldr	r2, .L2244+32
+	ldr	r4, .L2244+48
 	ldr	r3, [r5, #0]
 	ldrb	r1, [r3, #26]	@ zero_extendqisi2
 	ldrb	r6, [r3, #18]	@ zero_extendqisi2
 	strb	r1, [r2, #0]
-	ldr	r1, .L2240+52
+	ldr	r1, .L2244+52
 	ldrh	r2, [r3, #16]
 	ubfx	r0, r2, #7, #1
 	strb	r0, [r1, #0]
-	ldr	r1, .L2240+56
+	ldr	r1, .L2244+56
 	ubfx	r0, r2, #3, #1
 	strb	r0, [r1, #0]
 	ubfx	r0, r2, #4, #1
-	ldr	r1, .L2240+60
+	ldr	r1, .L2244+60
 	ubfx	r2, r2, #8, #3
 	strb	r0, [r1, #0]
-	ldr	r1, .L2240+24
+	ldr	r1, .L2244+24
 	ldrh	r0, [r3, #10]
 	strb	r2, [r1, #0]
 	movs	r2, #0
@@ -20042,120 +20089,120 @@ FlashInit:
 	ldr	r3, [r5, #0]
 	ldrh	r2, [r3, #16]
 	lsls	r0, r2, #25
-	bpl	.L2209
+	bpl	.L2213
 	ldrb	r0, [r3, #19]	@ zero_extendqisi2
-	ldr	r2, .L2240+64
-	ldr	r3, .L2240+68
+	ldr	r2, .L2244+64
+	ldr	r3, .L2244+68
 	ldrb	r1, [r2, #1]	@ zero_extendqisi2
 	strb	r0, [r3, #0]
-	ldr	r3, .L2240+72
+	ldr	r3, .L2244+72
 	strb	r1, [r3, #0]
 	ldrb	r1, [r2, #2]	@ zero_extendqisi2
-	ldr	r3, .L2240+76
+	ldr	r3, .L2244+76
 	strb	r1, [r3, #0]
 	subs	r1, r0, #1
 	cmp	r1, #6
-	bhi	.L2210
-	ldr	r3, .L2240+80
+	bhi	.L2214
+	ldr	r3, .L2244+80
 	str	r3, [r4, #0]
 	subs	r3, r0, #5
 	cmp	r3, #1
-	bhi	.L2211
-	ldr	r3, .L2240+84
+	bhi	.L2215
+	ldr	r3, .L2244+84
 	movs	r2, #1
 	str	r2, [r3, #0]
-	b	.L2212
-.L2211:
+	b	.L2216
+.L2215:
 	cmp	r0, #7
-	beq	.L2233
-.L2212:
-	ldr	r1, .L2240+88
-	b	.L2213
-.L2233:
+	beq	.L2237
+.L2216:
+	ldr	r1, .L2244+88
+	b	.L2217
+.L2237:
 	add	r1, r2, #28
-.L2213:
+.L2217:
 	movs	r3, #0
 	mov	r2, r3
-.L2215:
+.L2219:
 	ldrsb	r4, [r1, r2]
-	cbnz	r4, .L2214
+	cbnz	r4, .L2218
 	adds	r3, r3, #1
-.L2214:
+.L2218:
 	adds	r2, r2, #1
 	cmp	r2, #32
-	bne	.L2215
+	bne	.L2219
 	cmp	r3, #27
-	bls	.L2209
+	bls	.L2213
 	bl	FlashGetReadRetryDefault
 	bl	FlashSavePhyInfo
-	b	.L2209
-.L2210:
+	b	.L2213
+.L2214:
 	sub	r2, r0, #17
 	cmp	r2, #2
-	bhi	.L2216
-	ldr	r2, .L2240+92
+	bhi	.L2220
+	ldr	r2, .L2244+92
 	str	r2, [r4, #0]
 	movs	r2, #7
 	cmp	r0, #19
 	strb	r2, [r3, #0]
-	bne	.L2209
+	bne	.L2213
 	movs	r2, #15
-	b	.L2237
-.L2216:
+	b	.L2241
+.L2220:
 	cmp	r0, #33
-	beq	.L2217
+	beq	.L2221
 	cmp	r0, #65
-	beq	.L2217
+	beq	.L2221
 	cmp	r0, #66
-	bne	.L2218
-.L2217:
-	ldr	r2, .L2240+96
-	ldr	r3, .L2240+48
+	bne	.L2222
+.L2221:
+	ldr	r2, .L2244+96
+	ldr	r3, .L2244+48
 	str	r2, [r3, #0]
 	movs	r2, #4
-	ldr	r3, .L2240+72
+	ldr	r3, .L2244+72
 	strb	r2, [r3, #0]
 	movs	r2, #7
-	ldr	r3, .L2240+76
-	b	.L2237
-.L2218:
+	ldr	r3, .L2244+76
+	b	.L2241
+.L2222:
 	cmp	r0, #67
-	beq	.L2219
+	beq	.L2223
 	cmp	r0, #34
-	beq	.L2219
+	beq	.L2223
 	cmp	r0, #35
-	beq	.L2219
+	beq	.L2223
 	cmp	r0, #68
-	bne	.L2220
-.L2219:
-	ldr	r2, .L2240+96
-	ldr	r3, .L2240+48
+	bne	.L2224
+.L2223:
+	ldr	r2, .L2244+96
+	ldr	r3, .L2244+48
 	str	r2, [r3, #0]
 	movs	r2, #7
-	ldr	r3, .L2240+76
+	ldr	r3, .L2244+76
 	cmp	r0, #35
 	strb	r2, [r3, #0]
-	beq	.L2221
+	beq	.L2225
 	cmp	r0, #68
-	bne	.L2222
-.L2221:
+	bne	.L2226
+.L2225:
 	movs	r2, #17
 	strb	r2, [r3, #0]
-.L2222:
+.L2226:
 	subs	r0, r0, #67
-	ldr	r3, .L2240+72
+	ldr	r3, .L2244+72
 	cmp	r0, #1
-	bhi	.L2223
+	bhi	.L2227
 	movs	r2, #4
-.L2237:
+.L2241:
 	strb	r2, [r3, #0]
-	b	.L2209
-.L2223:
+	b	.L2213
+.L2227:
 	movs	r2, #5
-	b	.L2237
-.L2241:
+	b	.L2241
+.L2245:
 	.align	2
-.L2240:
+.L2244:
 	.word	.LANCHOR27+32
 	.word	.LANCHOR6
 	.word	.LANCHOR18
@@ -20167,83 +20214,83 @@ FlashInit:
 	.word	.LANCHOR7
 	.word	.LC54
 	.word	.LANCHOR24
-	.word	.LANCHOR47
-	.word	.LANCHOR51
+	.word	.LANCHOR149
+	.word	.LANCHOR153
 	.word	.LANCHOR4
 	.word	.LANCHOR194
 	.word	.LANCHOR33
 	.word	.LANCHOR31
 	.word	.LANCHOR11
 	.word	.LANCHOR14
-	.word	.LANCHOR42
+	.word	.LANCHOR144
 	.word	HynixReadRetrial
 	.word	.LANCHOR39
 	.word	.LANCHOR31+20
 	.word	MicronReadRetrial
 	.word	ToshibaReadRetrial
-.L2220:
+.L2224:
 	cmp	r0, #49
-	bne	.L2209
-	ldr	r2, .L2242
-	ldr	r3, .L2242+4
+	bne	.L2213
+	ldr	r2, .L2246
+	ldr	r3, .L2246+4
 	str	r2, [r3, #0]
-.L2209:
-	ldr	r3, .L2242+8
+.L2213:
+	ldr	r3, .L2246+8
 	ldr	r2, [r3, #0]
-	ldr	r3, .L2242+12
+	ldr	r3, .L2246+12
 	cmp	r2, r3
-	bne	.L2224
-	ldr	r3, .L2242+16
+	bne	.L2228
+	ldr	r3, .L2246+16
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L2224
-	ldr	r3, .L2242+20
+	cbz	r3, .L2228
+	ldr	r3, .L2246+20
 	movs	r2, #0
 	ldr	r3, [r3, #0]
 	strb	r2, [r3, #18]
-.L2224:
-	ldr	r3, .L2242+24
+.L2228:
+	ldr	r3, .L2246+24
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	cmp	r3, #44
-	bne	.L2225
-	ldr	r3, .L2242+28
+	bne	.L2229
+	ldr	r3, .L2246+28
 	ldrb	r2, [r3, #0]	@ zero_extendqisi2
-	cbz	r2, .L2225
+	cbz	r2, .L2229
 	movs	r2, #0
 	movs	r0, #1
 	strb	r2, [r3, #0]
 	bl	FlashSetInterfaceMode
 	movs	r0, #1
 	bl	NandcSetMode
-.L2225:
+.L2229:
 	movs	r0, #0
 	bl	flash_enter_slc_mode
-	ldr	r3, .L2242+32
+	ldr	r3, .L2246+32
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	tst	r3, #6
-	beq	.L2226
-	ldr	r2, .L2242+28
+	beq	.L2230
+	ldr	r2, .L2246+28
 	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	cbnz	r2, .L2227
+	cbnz	r2, .L2231
 	lsls	r1, r3, #31
-	bmi	.L2226
-.L2227:
-	ldr	r3, .L2242+36
+	bmi	.L2230
+.L2231:
+	ldr	r3, .L2246+36
 	movs	r0, #0
 	ldr	r1, [r3, #0]
 	bl	FlashDdrParaScan
-.L2226:
-	ldr	r4, .L2242+20
+.L2230:
+	ldr	r4, .L2246+20
 	movs	r0, #0
 	bl	flash_exit_slc_mode
 	mov	r8, #16
 	ldr	r3, [r4, #0]
 	ldrb	r0, [r3, #20]	@ zero_extendqisi2
 	bl	FlashBchSel
-	ldr	r0, .L2242+40
+	ldr	r0, .L2246+40
 	bl	FlashReadIdbDataRaw
 	ldr	r5, [r4, #0]
-	ldr	r3, .L2242+44
-	ldr	r4, .L2242+48
+	ldr	r3, .L2246+44
+	ldr	r4, .L2246+48
 	ldrb	r1, [r5, #12]	@ zero_extendqisi2
 	strb	r8, [r3, #0]
 	ldrh	r6, [r5, #10]
@@ -20252,10 +20299,10 @@ FlashInit:
 	mov	r0, r6
 	ldrh	r7, [r5, #14]
 	str	r3, [r4, #4]
-	ldr	r3, .L2242+24
+	ldr	r3, .L2246+24
 	ldr	r3, [r3, #0]
 	str	r3, [r4, #0]
-	ldr	r3, .L2242+52
+	ldr	r3, .L2246+52
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	strh	r3, [r4, #10]	@ movhi
 	ldrb	r3, [r5, #13]	@ zero_extendqisi2
@@ -20269,13 +20316,13 @@ FlashInit:
 	muls	r6, r3, r6
 	strh	r2, [r4, #24]	@ movhi
 	uxth	r6, r6
-	ldr	r2, .L2242+56
+	ldr	r2, .L2246+56
 	strh	r3, [r4, #20]	@ movhi
 	strh	r6, [r4, #22]	@ movhi
 	ldrb	r2, [r2, #0]	@ zero_extendqisi2
 	strh	r8, [r4, #26]	@ movhi
 	cmp	r2, #1
-	bne	.L2229
+	bne	.L2233
 	lsls	r3, r3, #1
 	lsrs	r7, r7, #1
 	strh	r3, [r4, #20]	@ movhi
@@ -20284,29 +20331,29 @@ FlashInit:
 	strh	r7, [r4, #14]	@ movhi
 	strh	r6, [r4, #22]	@ movhi
 	strh	r3, [r4, #26]	@ movhi
-.L2229:
+.L2233:
 	ldrb	r0, [r5, #20]	@ zero_extendqisi2
 	bl	FlashBchSel
 	movs	r0, #0
-	b	.L2195
-.L2231:
+	b	.L2199
+.L2235:
 	mvn	r0, #1
-.L2195:
+.L2199:
 	add	sp, sp, #24
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L2243:
+.L2247:
 	.align	2
-.L2242:
+.L2246:
 	.word	SamsungReadRetrial
-	.word	.LANCHOR51
-	.word	.LANCHOR40
+	.word	.LANCHOR153
+	.word	.LANCHOR142
 	.word	1446522928
 	.word	.LANCHOR7
 	.word	.LANCHOR23
 	.word	.LANCHOR22
 	.word	.LANCHOR35
 	.word	.LANCHOR34
-	.word	.LANCHOR47
+	.word	.LANCHOR149
 	.word	.LANCHOR25
 	.word	.LANCHOR1
 	.word	.LANCHOR28
@@ -20325,18 +20372,18 @@ rk_ftl_init:
 	push	{r4, lr}
 	bl	FlashInit
 	mov	r4, r0
-	cbnz	r0, .L2245
-	ldr	r0, .L2246
+	cbnz	r0, .L2249
+	ldr	r0, .L2250
 	bl	FtlInit
-.L2245:
+.L2249:
 	mov	r1, r4
-	ldr	r0, .L2246+4
+	ldr	r0, .L2250+4
 	bl	printf
 	mov	r0, r4
 	pop	{r4, pc}
-.L2247:
+.L2251:
 	.align	2
-.L2246:
+.L2250:
 	.word	.LANCHOR28
 	.word	.LC55
 	.size	rk_ftl_init, .-rk_ftl_init
@@ -20561,7 +20608,7 @@ rk_ftl_init:
 	.global	IDByte
 	.global	read_retry_cur_offset
 	.section	.rodata
-.LANCHOR48 = . + 0
+.LANCHOR150 = . + 0
 .LC0:
 	.byte	60
 	.byte	40
@@ -20576,20 +20623,20 @@ g_recovery_ppa_tbl:
 	.space	128
 	.section	.bss.p_blk_mode_table,"aw",%nobits
 	.align	2
-.LANCHOR119 = . + 0
+.LANCHOR107 = . + 0
 	.type	p_blk_mode_table, %object
 	.size	p_blk_mode_table, 4
 p_blk_mode_table:
 	.space	4
-	.section	.rodata.__func__.7399,"a",%progbits
-.LANCHOR240 = . + 0
-	.type	__func__.7399, %object
-	.size	__func__.7399, 10
-__func__.7399:
-	.ascii	"ftl_write\000"
+	.section	.rodata.__func__.7798,"a",%progbits
+.LANCHOR221 = . + 0
+	.type	__func__.7798, %object
+	.size	__func__.7798, 9
+__func__.7798:
+	.ascii	"log2phys\000"
 	.section	.bss.p_gc_blk_tbl,"aw",%nobits
 	.align	2
-.LANCHOR146 = . + 0
+.LANCHOR134 = . + 0
 	.type	p_gc_blk_tbl, %object
 	.size	p_gc_blk_tbl, 4
 p_gc_blk_tbl:
@@ -20635,12 +20682,6 @@ gNandParaInfo:
 	.byte	0
 	.byte	0
 	.space	4
-	.section	.rodata.__func__.8085,"a",%progbits
-.LANCHOR127 = . + 0
-	.type	__func__.8085, %object
-	.size	__func__.8085, 16
-__func__.8085:
-	.ascii	"make_superblock\000"
 	.section	.bss.gNandRandomizer,"aw",%nobits
 .LANCHOR4 = . + 0
 	.type	gNandRandomizer, %object
@@ -20654,6 +20695,12 @@ gNandRandomizer:
 	.size	gDieOp, 128
 gDieOp:
 	.space	128
+	.section	.rodata.__func__.8089,"a",%progbits
+.LANCHOR115 = . + 0
+	.type	__func__.8089, %object
+	.size	__func__.8089, 16
+__func__.8089:
+	.ascii	"make_superblock\000"
 	.section	.data.refValueDefault,"aw",%progbits
 .LANCHOR242 = . + 0
 	.type	refValueDefault, %object
@@ -20695,21 +20742,21 @@ gFlashToggleModeEn:
 	.space	1
 	.section	.bss.g_sys_ext_data,"aw",%nobits
 	.align	2
-.LANCHOR144 = . + 0
+.LANCHOR132 = . + 0
 	.type	g_sys_ext_data, %object
 	.size	g_sys_ext_data, 512
 g_sys_ext_data:
 	.space	512
 	.section	.bss.c_ftl_nand_page_pre_super_blk,"aw",%nobits
 	.align	1
-.LANCHOR70 = . + 0
+.LANCHOR58 = . + 0
 	.type	c_ftl_nand_page_pre_super_blk, %object
 	.size	c_ftl_nand_page_pre_super_blk, 2
 c_ftl_nand_page_pre_super_blk:
 	.space	2
 	.section	.bss.g_inkDie_check_enable,"aw",%nobits
 	.align	2
-.LANCHOR128 = . + 0
+.LANCHOR116 = . + 0
 	.type	g_inkDie_check_enable, %object
 	.size	g_inkDie_check_enable, 4
 g_inkDie_check_enable:
@@ -20720,12 +20767,6 @@ g_inkDie_check_enable:
 	.size	gNandFlashEccBits, 1
 gNandFlashEccBits:
 	.space	1
-	.section	.rodata.__func__.7688,"a",%progbits
-.LANCHOR220 = . + 0
-	.type	__func__.7688, %object
-	.size	__func__.7688, 16
-__func__.7688:
-	.ascii	"load_l2p_region\000"
 	.section	.bss.c_ftl_nand_data_op_blks_per_plane,"aw",%nobits
 	.align	1
 .LANCHOR201 = . + 0
@@ -20733,15 +20774,21 @@ __func__.7688:
 	.size	c_ftl_nand_data_op_blks_per_plane, 2
 c_ftl_nand_data_op_blks_per_plane:
 	.space	2
-	.section	.bss.p_sys_data_buf_1,"aw",%nobits
+	.section	.rodata.__func__.7377,"a",%progbits
+.LANCHOR223 = . + 0
+	.type	__func__.7377, %object
+	.size	__func__.7377, 13
+__func__.7377:
+	.ascii	"FtlProgPages\000"
+	.section	.bss.g_in_swl_replace,"aw",%nobits
 	.align	2
-.LANCHOR180 = . + 0
-	.type	p_sys_data_buf_1, %object
-	.size	p_sys_data_buf_1, 4
-p_sys_data_buf_1:
+.LANCHOR169 = . + 0
+	.type	g_in_swl_replace, %object
+	.size	g_in_swl_replace, 4
+g_in_swl_replace:
 	.space	4
 	.section	.bss.g_maxRetryCount,"aw",%nobits
-.LANCHOR42 = . + 0
+.LANCHOR144 = . + 0
 	.type	g_maxRetryCount, %object
 	.size	g_maxRetryCount, 1
 g_maxRetryCount:
@@ -20757,14 +20804,8 @@ gMultiPageProgEn:
 .LANCHOR38 = . + 0
 	.type	gMasterInfo, %object
 	.size	gMasterInfo, 32
-gMasterInfo:
-	.space	32
-	.section	.bss.g_gc_refresh_block_temp_tbl,"aw",%nobits
-	.align	1
-	.type	g_gc_refresh_block_temp_tbl, %object
-	.size	g_gc_refresh_block_temp_tbl, 34
-g_gc_refresh_block_temp_tbl:
-	.space	34
+gMasterInfo:
+	.space	32
 	.section	.bss.gReadRetryInfo,"aw",%nobits
 .LANCHOR31 = . + 0
 	.type	gReadRetryInfo, %object
@@ -20773,11 +20814,18 @@ gReadRetryInfo:
 	.space	852
 	.section	.bss.c_ftl_nand_die_num,"aw",%nobits
 	.align	1
-.LANCHOR60 = . + 0
+.LANCHOR48 = . + 0
 	.type	c_ftl_nand_die_num, %object
 	.size	c_ftl_nand_die_num, 2
 c_ftl_nand_die_num:
 	.space	2
+	.section	.bss.g_cur_erase_blk,"aw",%nobits
+	.align	2
+.LANCHOR77 = . + 0
+	.type	g_cur_erase_blk, %object
+	.size	g_cur_erase_blk, 4
+g_cur_erase_blk:
+	.space	4
 	.section	.bss.gToggleModeClkDiv,"aw",%nobits
 	.align	2
 	.type	gToggleModeClkDiv, %object
@@ -20786,21 +20834,21 @@ gToggleModeClkDiv:
 	.space	4
 	.section	.bss.p_valid_page_count_table,"aw",%nobits
 	.align	2
-.LANCHOR101 = . + 0
+.LANCHOR89 = . + 0
 	.type	p_valid_page_count_table, %object
 	.size	p_valid_page_count_table, 4
 p_valid_page_count_table:
 	.space	4
 	.section	.bss.req_erase,"aw",%nobits
 	.align	2
-.LANCHOR95 = . + 0
+.LANCHOR83 = . + 0
 	.type	req_erase, %object
 	.size	req_erase, 4
 req_erase:
 	.space	4
 	.section	.bss.c_ftl_nand_max_data_blks,"aw",%nobits
 	.align	2
-.LANCHOR57 = . + 0
+.LANCHOR45 = . + 0
 	.type	c_ftl_nand_max_data_blks, %object
 	.size	c_ftl_nand_max_data_blks, 4
 c_ftl_nand_max_data_blks:
@@ -20812,13 +20860,13 @@ gNandFlashInfoBlockEcc:
 	.space	1
 	.section	.bss.g_nandc_version_data,"aw",%nobits
 	.align	2
-.LANCHOR40 = . + 0
+.LANCHOR142 = . + 0
 	.type	g_nandc_version_data, %object
 	.size	g_nandc_version_data, 4
 g_nandc_version_data:
 	.space	4
 	.section	.bss.gNandIDBResBlkNumSaveInFlash,"aw",%nobits
-.LANCHOR49 = . + 0
+.LANCHOR151 = . + 0
 	.type	gNandIDBResBlkNumSaveInFlash, %object
 	.size	gNandIDBResBlkNumSaveInFlash, 1
 gNandIDBResBlkNumSaveInFlash:
@@ -20830,6 +20878,13 @@ gNandIDBResBlkNumSaveInFlash:
 	.size	g_MaxLbn, 4
 g_MaxLbn:
 	.space	4
+	.section	.bss.g_power_lost_recovery_flag,"aw",%nobits
+	.align	1
+.LANCHOR230 = . + 0
+	.type	g_power_lost_recovery_flag, %object
+	.size	g_power_lost_recovery_flag, 2
+g_power_lost_recovery_flag:
+	.space	2
 	.section	.bss.g_retryMode,"aw",%nobits
 .LANCHOR11 = . + 0
 	.type	g_retryMode, %object
@@ -20838,23 +20893,18 @@ g_retryMode:
 	.space	1
 	.section	.bss.g_page_map_check_enable,"aw",%nobits
 	.align	1
-.LANCHOR85 = . + 0
+.LANCHOR73 = . + 0
 	.type	g_page_map_check_enable, %object
 	.size	g_page_map_check_enable, 2
 g_page_map_check_enable:
 	.space	2
-	.section	.rodata.__func__.7617,"a",%progbits
-.LANCHOR107 = . + 0
-	.type	__func__.7617, %object
-	.size	__func__.7617, 17
-__func__.7617:
-	.ascii	"INSERT_FREE_LIST\000"
-	.section	.rodata.__func__.7462,"a",%progbits
-.LANCHOR92 = . + 0
-	.type	__func__.7462, %object
-	.size	__func__.7462, 14
-__func__.7462:
-	.ascii	"FtlBbt2Bitmap\000"
+	.section	.bss.gpFlashSaveInfo,"aw",%nobits
+	.align	2
+.LANCHOR145 = . + 0
+	.type	gpFlashSaveInfo, %object
+	.size	gpFlashSaveInfo, 4
+gpFlashSaveInfo:
+	.space	4
 	.section	.bss.g_GlobalSysVersion,"aw",%nobits
 	.align	2
 .LANCHOR156 = . + 0
@@ -20862,9 +20912,15 @@ __func__.7462:
 	.size	g_GlobalSysVersion, 4
 g_GlobalSysVersion:
 	.space	4
+	.section	.rodata.__func__.7466,"a",%progbits
+.LANCHOR80 = . + 0
+	.type	__func__.7466, %object
+	.size	__func__.7466, 14
+__func__.7466:
+	.ascii	"FtlBbt2Bitmap\000"
 	.section	.bss.gpReadRetrial,"aw",%nobits
 	.align	2
-.LANCHOR51 = . + 0
+.LANCHOR153 = . + 0
 	.type	gpReadRetrial, %object
 	.size	gpReadRetrial, 4
 gpReadRetrial:
@@ -20873,28 +20929,28 @@ gpReadRetrial:
 .LC1:
 	.ascii	"FlashEraseBlocks pageAddr error %x\012\000"
 .LC2:
-	.ascii	"micron RR %d row=%x,count %d,status=%d\012\000"
+	.ascii	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\012"
+	.ascii	"\000"
 .LC3:
-	.ascii	"ECC:%d\012\000"
+	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
 .LC4:
-	.ascii	"sdr read ok %x ecc=%d\012\000"
+	.ascii	"%s\012\000"
 .LC5:
-	.ascii	"sync para %d\012\000"
+	.ascii	"!!!!! FTL sys Error !!!!!\000"
 .LC6:
-	.ascii	"TOG mode Read error %x %x\012\000"
+	.ascii	"remove_from_free_sys_Queue %x\012\000"
 .LC7:
-	.ascii	"read retry status %x %x %x\012\000"
+	.ascii	"micron RR %d row=%x,count %d,status=%d\012\000"
 .LC8:
-	.ascii	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\012"
-	.ascii	"\000"
+	.ascii	"ECC:%d\012\000"
 .LC9:
-	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
+	.ascii	"sdr read ok %x ecc=%d\012\000"
 .LC10:
-	.ascii	"%s\012\000"
+	.ascii	"sync para %d\012\000"
 .LC11:
-	.ascii	"!!!!! FTL sys Error !!!!!\000"
+	.ascii	"TOG mode Read error %x %x\012\000"
 .LC12:
-	.ascii	"remove_from_free_sys_Queue %x\012\000"
+	.ascii	"read retry status %x %x %x\012\000"
 .LC13:
 	.ascii	"%s 0x%x:\000"
 .LC14:
@@ -20910,7 +20966,7 @@ gpReadRetrial:
 .LC19:
 	.ascii	"ReadRetry pageadd=%x ecc=%x err=%x\012\000"
 .LC20:
-	.ascii	"FtlGcScanTempBlkError ID %x %x!!!!!!! \012\000"
+	.ascii	"FtlGcScanTempBlkError ID %x %x!!!!!!!\012\000"
 .LC21:
 	.ascii	"prog error: = %x\012\000"
 .LC22:
@@ -20934,7 +20990,7 @@ gpReadRetrial:
 .LC31:
 	.ascii	"page map lost: %x %x\012\000"
 .LC32:
-	.ascii	"FtlMapWritePage error = %x \012\000"
+	.ascii	"FtlMapWritePage error = %x\012\000"
 .LC33:
 	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
 .LC34:
@@ -20952,7 +21008,7 @@ gpReadRetrial:
 .LC40:
 	.ascii	"GC des block %x done\012\000"
 .LC41:
-	.ascii	"RSB refresh addr %x \012\000"
+	.ascii	"RSB refresh addr %x\012\000"
 .LC42:
 	.ascii	"spuer block %x vpn is 0\012 \000"
 .LC43:
@@ -20962,7 +21018,7 @@ gpReadRetrial:
 .LC45:
 	.ascii	"erase power lost blk = %x vpc=%x\012\000"
 .LC46:
-	.ascii	"FTL version: 5.0.47 20171110\000"
+	.ascii	"FTL version: 5.0.47 20171221\000"
 .LC47:
 	.ascii	"...%s: no bad block mapping table, format device\012"
 	.ascii	"\000"
@@ -20984,7 +21040,7 @@ gpReadRetrial:
 	.ascii	"FtlInit %x\012\000"
 	.section	.bss.gNandFlashIdbBlockAddr,"aw",%nobits
 	.align	2
-.LANCHOR46 = . + 0
+.LANCHOR148 = . + 0
 	.type	gNandFlashIdbBlockAddr, %object
 	.size	gNandFlashIdbBlockAddr, 4
 gNandFlashIdbBlockAddr:
@@ -20996,18 +21052,20 @@ gNandFlashIdbBlockAddr:
 	.size	req_sys, 36
 req_sys:
 	.space	36
-	.section	.rodata.__func__.7998,"a",%progbits
-.LANCHOR222 = . + 0
-	.type	__func__.7998, %object
-	.size	__func__.7998, 16
-__func__.7998:
-	.ascii	"FtlReUsePrevPpa\000"
-	.section	.rodata.__func__.7856,"a",%progbits
-.LANCHOR206 = . + 0
-	.type	__func__.7856, %object
-	.size	__func__.7856, 15
-__func__.7856:
-	.ascii	"FtlVpcTblFlush\000"
+	.section	.bss.gFlashSpareBuffer,"aw",%nobits
+	.align	2
+.LANCHOR241 = . + 0
+	.type	gFlashSpareBuffer, %object
+	.size	gFlashSpareBuffer, 4
+gFlashSpareBuffer:
+	.space	4
+	.section	.bss.c_ftl_nand_sec_pre_page,"aw",%nobits
+	.align	1
+.LANCHOR59 = . + 0
+	.type	c_ftl_nand_sec_pre_page, %object
+	.size	c_ftl_nand_sec_pre_page, 2
+c_ftl_nand_sec_pre_page:
+	.space	2
 	.section	.bss.p_vendor_block_ver_table,"aw",%nobits
 	.align	2
 .LANCHOR189 = . + 0
@@ -21017,11 +21075,17 @@ p_vendor_block_ver_table:
 	.space	4
 	.section	.bss.g_gc_next_blk,"aw",%nobits
 	.align	1
-.LANCHOR149 = . + 0
+.LANCHOR137 = . + 0
 	.type	g_gc_next_blk, %object
 	.size	g_gc_next_blk, 2
 g_gc_next_blk:
 	.space	2
+	.section	.rodata.__func__.7692,"a",%progbits
+.LANCHOR220 = . + 0
+	.type	__func__.7692, %object
+	.size	__func__.7692, 16
+__func__.7692:
+	.ascii	"load_l2p_region\000"
 	.section	.bss.mlcPageToSlcPageTbl,"aw",%nobits
 	.align	2
 .LANCHOR9 = . + 0
@@ -21031,30 +21095,35 @@ mlcPageToSlcPageTbl:
 	.space	1024
 	.section	.bss.c_ftl_nand_sec_pre_page_shift,"aw",%nobits
 	.align	1
-.LANCHOR72 = . + 0
+.LANCHOR60 = . + 0
 	.type	c_ftl_nand_sec_pre_page_shift, %object
 	.size	c_ftl_nand_sec_pre_page_shift, 2
 c_ftl_nand_sec_pre_page_shift:
 	.space	2
 	.section	.bss.g_flash_read_only_en,"aw",%nobits
 	.align	2
-.LANCHOR94 = . + 0
+.LANCHOR82 = . + 0
 	.type	g_flash_read_only_en, %object
 	.size	g_flash_read_only_en, 4
 g_flash_read_only_en:
 	.space	4
-	.section	.rodata.__func__.8218,"a",%progbits
-.LANCHOR208 = . + 0
-	.type	__func__.8218, %object
-	.size	__func__.8218, 20
-__func__.8218:
-	.ascii	"decrement_vpc_count\000"
+	.section	.rodata.__func__.8217,"a",%progbits
+.LANCHOR207 = . + 0
+	.type	__func__.8217, %object
+	.size	__func__.8217, 16
+__func__.8217:
+	.ascii	"update_vpc_list\000"
 	.section	.bss.read_retry_cur_offset,"aw",%nobits
 .LANCHOR32 = . + 0
 	.type	read_retry_cur_offset, %object
 	.size	read_retry_cur_offset, 4
 read_retry_cur_offset:
 	.space	4
+	.section	.bss.gFlashOnfiModeEn,"aw",%nobits
+	.type	gFlashOnfiModeEn, %object
+	.size	gFlashOnfiModeEn, 1
+gFlashOnfiModeEn:
+	.space	1
 	.section	.bss.p_vendor_block_valid_page_count,"aw",%nobits
 	.align	2
 .LANCHOR188 = . + 0
@@ -21069,33 +21138,26 @@ p_vendor_block_valid_page_count:
 	.size	gNandcVer, 4
 gNandcVer:
 	.space	4
-	.section	.rodata.__func__.7732,"a",%progbits
-.LANCHOR212 = . + 0
-	.type	__func__.7732, %object
-	.size	__func__.7732, 15
-__func__.7732:
-	.ascii	"ftl_map_blk_gc\000"
 	.section	.bss.g_num_free_superblocks,"aw",%nobits
 	.align	1
-.LANCHOR106 = . + 0
+.LANCHOR94 = . + 0
 	.type	g_num_free_superblocks, %object
 	.size	g_num_free_superblocks, 2
 g_num_free_superblocks:
 	.space	2
 	.section	.bss.p_data_block_list_table,"aw",%nobits
 	.align	2
-.LANCHOR99 = . + 0
+.LANCHOR87 = . + 0
 	.type	p_data_block_list_table, %object
 	.size	p_data_block_list_table, 4
 p_data_block_list_table:
 	.space	4
-	.section	.bss.g_power_lost_ecc_error_blk,"aw",%nobits
-	.align	1
-.LANCHOR229 = . + 0
-	.type	g_power_lost_ecc_error_blk, %object
-	.size	g_power_lost_ecc_error_blk, 2
-g_power_lost_ecc_error_blk:
-	.space	2
+	.section	.rodata.__func__.7933,"a",%progbits
+.LANCHOR199 = . + 0
+	.type	__func__.7933, %object
+	.size	__func__.7933, 15
+__func__.7933:
+	.ascii	"FtlLoadSysInfo\000"
 	.section	.bss.g_gc_skip_write_count,"aw",%nobits
 	.align	2
 .LANCHOR172 = . + 0
@@ -21105,7 +21167,7 @@ g_gc_skip_write_count:
 	.space	4
 	.section	.bss.c_ftl_nand_data_blks_per_plane,"aw",%nobits
 	.align	1
-.LANCHOR55 = . + 0
+.LANCHOR43 = . + 0
 	.type	c_ftl_nand_data_blks_per_plane, %object
 	.size	c_ftl_nand_data_blks_per_plane, 2
 c_ftl_nand_data_blks_per_plane:
@@ -21177,11 +21239,11 @@ gSlcNandParaInfo:
 	.byte	0
 	.space	4
 	.section	.rodata.__func__.7621,"a",%progbits
-.LANCHOR104 = . + 0
+.LANCHOR95 = . + 0
 	.type	__func__.7621, %object
 	.size	__func__.7621, 17
 __func__.7621:
-	.ascii	"INSERT_DATA_LIST\000"
+	.ascii	"INSERT_FREE_LIST\000"
 	.section	.bss.p_sys_spare_buf,"aw",%nobits
 	.align	2
 .LANCHOR184 = . + 0
@@ -21189,22 +21251,27 @@ __func__.7621:
 	.size	p_sys_spare_buf, 4
 p_sys_spare_buf:
 	.space	4
-	.section	.bss.g_gc_bad_block_gc_index,"aw",%nobits
-	.align	1
-.LANCHOR153 = . + 0
-	.type	g_gc_bad_block_gc_index, %object
-	.size	g_gc_bad_block_gc_index, 2
-g_gc_bad_block_gc_index:
-	.space	2
+	.section	.rodata.__func__.7625,"a",%progbits
+.LANCHOR92 = . + 0
+	.type	__func__.7625, %object
+	.size	__func__.7625, 17
+__func__.7625:
+	.ascii	"INSERT_DATA_LIST\000"
 	.section	.bss.gNandFlashResEndPageAddr,"aw",%nobits
 	.align	2
 	.type	gNandFlashResEndPageAddr, %object
 	.size	gNandFlashResEndPageAddr, 4
 gNandFlashResEndPageAddr:
 	.space	4
+	.section	.rodata.__func__.8290,"a",%progbits
+.LANCHOR226 = . + 0
+	.type	__func__.8290, %object
+	.size	__func__.8290, 19
+__func__.8290:
+	.ascii	"FtlGcFreeTempBlock\000"
 	.section	.bss.gp_gc_page_buf_info,"aw",%nobits
 	.align	2
-.LANCHOR134 = . + 0
+.LANCHOR122 = . + 0
 	.type	gp_gc_page_buf_info, %object
 	.size	gp_gc_page_buf_info, 4
 gp_gc_page_buf_info:
@@ -21225,7 +21292,7 @@ g_totle_write_sector:
 	.space	4
 	.section	.bss.c_ftl_nand_ext_blk_pre_plane,"aw",%nobits
 	.align	1
-.LANCHOR64 = . + 0
+.LANCHOR52 = . + 0
 	.type	c_ftl_nand_ext_blk_pre_plane, %object
 	.size	c_ftl_nand_ext_blk_pre_plane, 2
 c_ftl_nand_ext_blk_pre_plane:
@@ -21235,17 +21302,10 @@ c_ftl_nand_ext_blk_pre_plane:
 	.type	gpNandc1, %object
 	.size	gpNandc1, 4
 gpNandc1:
-	.space	4
-	.section	.bss.g_in_swl_replace,"aw",%nobits
-	.align	2
-.LANCHOR169 = . + 0
-	.type	g_in_swl_replace, %object
-	.size	g_in_swl_replace, 4
-g_in_swl_replace:
 	.space	4
 	.section	.bss.FlashDdrTunningReadCount,"aw",%nobits
 	.align	2
-.LANCHOR50 = . + 0
+.LANCHOR152 = . + 0
 	.type	FlashDdrTunningReadCount, %object
 	.size	FlashDdrTunningReadCount, 4
 FlashDdrTunningReadCount:
@@ -21265,18 +21325,24 @@ gNandMaxChip:
 	.space	1
 	.section	.bss.c_mlc_erase_count_value,"aw",%nobits
 	.align	1
-.LANCHOR63 = . + 0
+.LANCHOR51 = . + 0
 	.type	c_mlc_erase_count_value, %object
 	.size	c_mlc_erase_count_value, 2
 c_mlc_erase_count_value:
 	.space	2
 	.section	.bss.p_map_block_table,"aw",%nobits
 	.align	2
-.LANCHOR124 = . + 0
+.LANCHOR112 = . + 0
 	.type	p_map_block_table, %object
 	.size	p_map_block_table, 4
 p_map_block_table:
 	.space	4
+	.section	.rodata.__func__.7512,"a",%progbits
+.LANCHOR203 = . + 0
+	.type	__func__.7512, %object
+	.size	__func__.7512, 11
+__func__.7512:
+	.ascii	"FtlLoadBbt\000"
 	.section	.data.SamsungRefValue,"aw",%progbits
 .LANCHOR15 = . + 0
 	.type	SamsungRefValue, %object
@@ -21427,25 +21493,20 @@ NandOptPara:
 	.byte	0
 	.byte	0
 	.space	14
-	.section	.rodata.__func__.7373,"a",%progbits
-.LANCHOR223 = . + 0
-	.type	__func__.7373, %object
-	.size	__func__.7373, 13
-__func__.7373:
-	.ascii	"FtlProgPages\000"
 	.section	.bss.c_ftl_nand_blks_per_die,"aw",%nobits
 	.align	1
-.LANCHOR66 = . + 0
+.LANCHOR54 = . + 0
 	.type	c_ftl_nand_blks_per_die, %object
 	.size	c_ftl_nand_blks_per_die, 2
 c_ftl_nand_blks_per_die:
 	.space	2
-	.section	.rodata.__func__.8031,"a",%progbits
-.LANCHOR228 = . + 0
-	.type	__func__.8031, %object
-	.size	__func__.8031, 22
-__func__.8031:
-	.ascii	"FtlRecoverySuperblock\000"
+	.section	.bss.g_gc_cur_blk_valid_pages,"aw",%nobits
+	.align	1
+.LANCHOR234 = . + 0
+	.type	g_gc_cur_blk_valid_pages, %object
+	.size	g_gc_cur_blk_valid_pages, 2
+g_gc_cur_blk_valid_pages:
+	.space	2
 	.section	.bss.g_totle_read_sector,"aw",%nobits
 	.align	2
 .LANCHOR217 = . + 0
@@ -21455,7 +21516,7 @@ g_totle_read_sector:
 	.space	4
 	.section	.bss.c_ftl_nand_max_sys_blks,"aw",%nobits
 	.align	2
-.LANCHOR54 = . + 0
+.LANCHOR42 = . + 0
 	.type	c_ftl_nand_max_sys_blks, %object
 	.size	c_ftl_nand_max_sys_blks, 4
 c_ftl_nand_max_sys_blks:
@@ -21467,23 +21528,11 @@ c_ftl_nand_max_sys_blks:
 g_slc2KBNand:
 	.space	1
 	.section	.bss.gNandFlashIDBEccBits,"aw",%nobits
-.LANCHOR45 = . + 0
+.LANCHOR147 = . + 0
 	.type	gNandFlashIDBEccBits, %object
 	.size	gNandFlashIDBEccBits, 1
 gNandFlashIDBEccBits:
 	.space	1
-	.section	.rodata.__func__.8182,"a",%progbits
-.LANCHOR210 = . + 0
-	.type	__func__.8182, %object
-	.size	__func__.8182, 25
-__func__.8182:
-	.ascii	"allocate_data_superblock\000"
-	.section	.rodata.__func__.7745,"a",%progbits
-.LANCHOR213 = . + 0
-	.type	__func__.7745, %object
-	.size	__func__.7745, 31
-__func__.7745:
-	.ascii	"Ftl_write_map_blk_to_last_page\000"
 	.section	.data.Toshiba15RefValue,"aw",%progbits
 .LANCHOR12 = . + 0
 	.type	Toshiba15RefValue, %object
@@ -21586,28 +21635,46 @@ Toshiba15RefValue:
 	.byte	0
 	.section	.bss.g_gc_next_blk_1,"aw",%nobits
 	.align	1
-.LANCHOR150 = . + 0
+.LANCHOR138 = . + 0
 	.type	g_gc_next_blk_1, %object
 	.size	g_gc_next_blk_1, 2
 g_gc_next_blk_1:
 	.space	2
+	.section	.rodata.__func__.7749,"a",%progbits
+.LANCHOR213 = . + 0
+	.type	__func__.7749, %object
+	.size	__func__.7749, 31
+__func__.7749:
+	.ascii	"Ftl_write_map_blk_to_last_page\000"
+	.section	.rodata.__func__.7403,"a",%progbits
+.LANCHOR240 = . + 0
+	.type	__func__.7403, %object
+	.size	__func__.7403, 10
+__func__.7403:
+	.ascii	"ftl_write\000"
+	.section	.rodata.__func__.8186,"a",%progbits
+.LANCHOR210 = . + 0
+	.type	__func__.8186, %object
+	.size	__func__.8186, 25
+__func__.8186:
+	.ascii	"allocate_data_superblock\000"
 	.section	.bss.g_free_slc_blk_num,"aw",%nobits
 	.align	1
-.LANCHOR129 = . + 0
+.LANCHOR117 = . + 0
 	.type	g_free_slc_blk_num, %object
 	.size	g_free_slc_blk_num, 2
 g_free_slc_blk_num:
 	.space	2
 	.section	.bss.c_ftl_nand_map_region_num,"aw",%nobits
 	.align	1
-.LANCHOR82 = . + 0
+.LANCHOR70 = . + 0
 	.type	c_ftl_nand_map_region_num, %object
 	.size	c_ftl_nand_map_region_num, 2
 c_ftl_nand_map_region_num:
 	.space	2
 	.section	.bss.req_gc,"aw",%nobits
 	.align	2
-.LANCHOR135 = . + 0
+.LANCHOR123 = . + 0
 	.type	req_gc, %object
 	.size	req_gc, 4
 req_gc:
@@ -21619,23 +21686,22 @@ req_gc:
 	.size	gpNandc, 4
 gpNandc:
 	.space	4
-	.section	.bss.gpFlashSaveInfo,"aw",%nobits
-	.align	2
-.LANCHOR43 = . + 0
-	.type	gpFlashSaveInfo, %object
-	.size	gpFlashSaveInfo, 4
-gpFlashSaveInfo:
-	.space	4
+	.section	.rodata.__func__.8035,"a",%progbits
+.LANCHOR228 = . + 0
+	.type	__func__.8035, %object
+	.size	__func__.8035, 22
+__func__.8035:
+	.ascii	"FtlRecoverySuperblock\000"
 	.section	.bss.g_totle_vendor_block,"aw",%nobits
 	.align	1
-.LANCHOR86 = . + 0
+.LANCHOR74 = . + 0
 	.type	g_totle_vendor_block, %object
 	.size	g_totle_vendor_block, 2
 g_totle_vendor_block:
 	.space	2
 	.section	.bss.p_l2p_ram_map,"aw",%nobits
 	.align	2
-.LANCHOR114 = . + 0
+.LANCHOR102 = . + 0
 	.type	p_l2p_ram_map, %object
 	.size	p_l2p_ram_map, 4
 p_l2p_ram_map:
@@ -21647,7 +21713,7 @@ p_l2p_ram_map:
 FlashWaitBusyScheduleEn:
 	.space	4
 	.section	.bss.p_plane_order_table,"aw",%nobits
-.LANCHOR62 = . + 0
+.LANCHOR50 = . + 0
 	.type	p_plane_order_table, %object
 	.size	p_plane_order_table, 32
 p_plane_order_table:
@@ -21668,14 +21734,14 @@ g_totle_cache_write_count:
 	.space	4
 	.section	.bss.c_ftl_nand_byte_pre_oob,"aw",%nobits
 	.align	1
-.LANCHOR74 = . + 0
+.LANCHOR62 = . + 0
 	.type	c_ftl_nand_byte_pre_oob, %object
 	.size	c_ftl_nand_byte_pre_oob, 2
 c_ftl_nand_byte_pre_oob:
 	.space	2
 	.section	.bss.g_gc_bad_block_temp_tbl,"aw",%nobits
 	.align	1
-.LANCHOR152 = . + 0
+.LANCHOR140 = . + 0
 	.type	g_gc_bad_block_temp_tbl, %object
 	.size	g_gc_bad_block_temp_tbl, 34
 g_gc_bad_block_temp_tbl:
@@ -21685,13 +21751,26 @@ g_gc_bad_block_temp_tbl:
 	.size	gFlashSdrModeEn, 1
 gFlashSdrModeEn:
 	.space	1
+	.section	.rodata.__func__.7860,"a",%progbits
+.LANCHOR206 = . + 0
+	.type	__func__.7860, %object
+	.size	__func__.7860, 15
+__func__.7860:
+	.ascii	"FtlVpcTblFlush\000"
 	.section	.bss.p_data_block_list_tail,"aw",%nobits
 	.align	2
-.LANCHOR102 = . + 0
+.LANCHOR90 = . + 0
 	.type	p_data_block_list_tail, %object
 	.size	p_data_block_list_tail, 4
 p_data_block_list_tail:
 	.space	4
+	.section	.bss.g_power_lost_ecc_error_blk,"aw",%nobits
+	.align	1
+.LANCHOR229 = . + 0
+	.type	g_power_lost_ecc_error_blk, %object
+	.size	g_power_lost_ecc_error_blk, 2
+g_power_lost_ecc_error_blk:
+	.space	2
 	.section	.bss.gFlashInterfaceMode,"aw",%nobits
 .LANCHOR34 = . + 0
 	.type	gFlashInterfaceMode, %object
@@ -21700,7 +21779,7 @@ gFlashInterfaceMode:
 	.space	1
 	.section	.bss.p_map_block_ver_table,"aw",%nobits
 	.align	2
-.LANCHOR125 = . + 0
+.LANCHOR113 = . + 0
 	.type	p_map_block_ver_table, %object
 	.size	p_map_block_ver_table, 4
 p_map_block_ver_table:
@@ -21764,32 +21843,32 @@ ToshibaA19RefValue:
 	.byte	0
 	.section	.bss.g_totle_swl_count,"aw",%nobits
 	.align	2
-.LANCHOR139 = . + 0
+.LANCHOR127 = . + 0
 	.type	g_totle_swl_count, %object
 	.size	g_totle_swl_count, 4
 g_totle_swl_count:
 	.space	4
 	.section	.bss.gBbtInfo,"aw",%nobits
 	.align	2
-.LANCHOR90 = . + 0
+.LANCHOR78 = . + 0
 	.type	gBbtInfo, %object
 	.size	gBbtInfo, 60
 gBbtInfo:
 	.space	60
 	.section	.bss.c_ftl_nand_byte_pre_page,"aw",%nobits
 	.align	1
-.LANCHOR73 = . + 0
+.LANCHOR61 = . + 0
 	.type	c_ftl_nand_byte_pre_page, %object
 	.size	c_ftl_nand_byte_pre_page, 2
 c_ftl_nand_byte_pre_page:
 	.space	2
-	.section	.bss.g_power_lost_recovery_flag,"aw",%nobits
-	.align	1
-.LANCHOR230 = . + 0
-	.type	g_power_lost_recovery_flag, %object
-	.size	g_power_lost_recovery_flag, 2
-g_power_lost_recovery_flag:
-	.space	2
+	.section	.bss.req_gc_dst,"aw",%nobits
+	.align	2
+.LANCHOR178 = . + 0
+	.type	req_gc_dst, %object
+	.size	req_gc_dst, 4
+req_gc_dst:
+	.space	4
 	.section	.bss.gNandIDBResBlkNum,"aw",%nobits
 .LANCHOR1 = . + 0
 	.type	gNandIDBResBlkNum, %object
@@ -21812,14 +21891,14 @@ g_gc_refresh_block_temp_num:
 	.space	2
 	.section	.bss.g_tmp_data_superblock_id,"aw",%nobits
 	.align	1
-.LANCHOR138 = . + 0
+.LANCHOR126 = . + 0
 	.type	g_tmp_data_superblock_id, %object
 	.size	g_tmp_data_superblock_id, 2
 g_tmp_data_superblock_id:
 	.space	2
 	.section	.bss.c_ftl_nand_totle_phy_blks,"aw",%nobits
 	.align	2
-.LANCHOR58 = . + 0
+.LANCHOR46 = . + 0
 	.type	c_ftl_nand_totle_phy_blks, %object
 	.size	c_ftl_nand_totle_phy_blks, 4
 c_ftl_nand_totle_phy_blks:
@@ -21833,28 +21912,28 @@ ftl_gc_temp_block_bops_scan_page_addr:
 	.short	-1
 	.section	.bss.p_map_region_ppn_table,"aw",%nobits
 	.align	2
-.LANCHOR126 = . + 0
+.LANCHOR114 = . + 0
 	.type	p_map_region_ppn_table, %object
 	.size	p_map_region_ppn_table, 4
 p_map_region_ppn_table:
 	.space	4
-	.section	.bss.g_gc_cur_blk_valid_pages,"aw",%nobits
+	.section	.bss.c_ftl_nand_reserved_blks,"aw",%nobits
 	.align	1
-.LANCHOR234 = . + 0
-	.type	g_gc_cur_blk_valid_pages, %object
-	.size	g_gc_cur_blk_valid_pages, 2
-g_gc_cur_blk_valid_pages:
+.LANCHOR63 = . + 0
+	.type	c_ftl_nand_reserved_blks, %object
+	.size	c_ftl_nand_reserved_blks, 2
+c_ftl_nand_reserved_blks:
 	.space	2
 	.section	.bss.p_gc_page_info,"aw",%nobits
 	.align	2
-.LANCHOR148 = . + 0
+.LANCHOR136 = . + 0
 	.type	p_gc_page_info, %object
 	.size	p_gc_page_info, 4
 p_gc_page_info:
 	.space	4
 	.section	.bss.c_ftl_nand_l2pmap_ram_region_num,"aw",%nobits
 	.align	1
-.LANCHOR83 = . + 0
+.LANCHOR71 = . + 0
 	.type	c_ftl_nand_l2pmap_ram_region_num, %object
 	.size	c_ftl_nand_l2pmap_ram_region_num, 2
 c_ftl_nand_l2pmap_ram_region_num:
@@ -21866,12 +21945,12 @@ c_ftl_nand_l2pmap_ram_region_num:
 	.size	gc_discard_updated, 4
 gc_discard_updated:
 	.space	4
-	.section	.rodata.__func__.7758,"a",%progbits
-.LANCHOR214 = . + 0
-	.type	__func__.7758, %object
-	.size	__func__.7758, 16
-__func__.7758:
-	.ascii	"FtlMapWritePage\000"
+	.section	.rodata.__func__.8384,"a",%progbits
+.LANCHOR236 = . + 0
+	.type	__func__.8384, %object
+	.size	__func__.8384, 23
+__func__.8384:
+	.ascii	"rk_ftl_garbage_collect\000"
 	.section	.bss.g_ect_tbl_info_size,"aw",%nobits
 	.align	1
 .LANCHOR186 = . + 0
@@ -21886,15 +21965,9 @@ g_ect_tbl_info_size:
 	.size	g_all_blk_used_slc_mode, 4
 g_all_blk_used_slc_mode:
 	.space	4
-	.section	.rodata.__func__.7508,"a",%progbits
-.LANCHOR203 = . + 0
-	.type	__func__.7508, %object
-	.size	__func__.7508, 11
-__func__.7508:
-	.ascii	"FtlLoadBbt\000"
 	.section	.bss.c_ftl_nand_vendor_region_num,"aw",%nobits
 	.align	1
-.LANCHOR78 = . + 0
+.LANCHOR66 = . + 0
 	.type	c_ftl_nand_vendor_region_num, %object
 	.size	c_ftl_nand_vendor_region_num, 2
 c_ftl_nand_vendor_region_num:
@@ -21921,14 +21994,14 @@ ToshibaRefValue:
 	.byte	112
 	.section	.bss.g_l2p_last_update_region_id,"aw",%nobits
 	.align	1
-.LANCHOR115 = . + 0
+.LANCHOR103 = . + 0
 	.type	g_l2p_last_update_region_id, %object
 	.size	g_l2p_last_update_region_id, 2
 g_l2p_last_update_region_id:
 	.space	2
 	.section	.bss.g_gc_page_offset,"aw",%nobits
 	.align	1
-.LANCHOR147 = . + 0
+.LANCHOR135 = . + 0
 	.type	g_gc_page_offset, %object
 	.size	g_gc_page_offset, 2
 g_gc_page_offset:
@@ -21940,16 +22013,16 @@ g_gc_page_offset:
 	.size	gMasterTempBuf, 4
 gMasterTempBuf:
 	.space	4
-	.section	.bss.g_gc_blk_num,"aw",%nobits
-	.align	1
-.LANCHOR145 = . + 0
-	.type	g_gc_blk_num, %object
-	.size	g_gc_blk_num, 2
-g_gc_blk_num:
-	.space	2
+	.section	.bss.gFlashProgCheckBuffer,"aw",%nobits
+	.align	2
+.LANCHOR204 = . + 0
+	.type	gFlashProgCheckBuffer, %object
+	.size	gFlashProgCheckBuffer, 4
+gFlashProgCheckBuffer:
+	.space	4
 	.section	.bss.c_ftl_nand_max_map_blks,"aw",%nobits
 	.align	2
-.LANCHOR80 = . + 0
+.LANCHOR68 = . + 0
 	.type	c_ftl_nand_max_map_blks, %object
 	.size	c_ftl_nand_max_map_blks, 4
 c_ftl_nand_max_map_blks:
@@ -21963,21 +22036,21 @@ g_totle_read_page_count:
 	.space	4
 	.section	.bss.g_gc_num_req,"aw",%nobits
 	.align	2
-.LANCHOR131 = . + 0
+.LANCHOR119 = . + 0
 	.type	g_gc_num_req, %object
 	.size	g_gc_num_req, 4
 g_gc_num_req:
 	.space	4
 	.section	.bss.p_swl_mul_table,"aw",%nobits
 	.align	2
-.LANCHOR142 = . + 0
+.LANCHOR130 = . + 0
 	.type	p_swl_mul_table, %object
 	.size	p_swl_mul_table, 4
 p_swl_mul_table:
 	.space	4
 	.section	.bss.ftl_gc_temp_power_lost_recovery_flag,"aw",%nobits
 	.align	2
-.LANCHOR140 = . + 0
+.LANCHOR128 = . + 0
 	.type	ftl_gc_temp_power_lost_recovery_flag, %object
 	.size	ftl_gc_temp_power_lost_recovery_flag, 4
 ftl_gc_temp_power_lost_recovery_flag:
@@ -21989,11 +22062,17 @@ ftl_gc_temp_power_lost_recovery_flag:
 	.size	p_vendor_data_buf, 4
 p_vendor_data_buf:
 	.space	4
-	.section	.rodata.__func__.7875,"a",%progbits
+	.section	.rodata.__func__.8002,"a",%progbits
+.LANCHOR222 = . + 0
+	.type	__func__.8002, %object
+	.size	__func__.8002, 16
+__func__.8002:
+	.ascii	"FtlReUsePrevPpa\000"
+	.section	.rodata.__func__.7879,"a",%progbits
 .LANCHOR197 = . + 0
-	.type	__func__.7875, %object
-	.size	__func__.7875, 14
-__func__.7875:
+	.type	__func__.7879, %object
+	.size	__func__.7879, 14
+__func__.7879:
 	.ascii	"FtlScanSysBlk\000"
 	.section	.bss.p_vendor_region_ppn_table,"aw",%nobits
 	.align	2
@@ -22004,7 +22083,7 @@ p_vendor_region_ppn_table:
 	.space	4
 	.section	.bss.p_map_block_valid_page_count,"aw",%nobits
 	.align	2
-.LANCHOR120 = . + 0
+.LANCHOR108 = . + 0
 	.type	p_map_block_valid_page_count, %object
 	.size	p_map_block_valid_page_count, 4
 p_map_block_valid_page_count:
@@ -22025,14 +22104,14 @@ g_totle_l2p_write_count:
 	.space	4
 	.section	.bss.g_num_data_superblocks,"aw",%nobits
 	.align	1
-.LANCHOR103 = . + 0
+.LANCHOR91 = . + 0
 	.type	g_num_data_superblocks, %object
 	.size	g_num_data_superblocks, 2
 g_num_data_superblocks:
 	.space	2
 	.section	.bss.c_ftl_nand_blk_pre_plane,"aw",%nobits
 	.align	1
-.LANCHOR56 = . + 0
+.LANCHOR44 = . + 0
 	.type	c_ftl_nand_blk_pre_plane, %object
 	.size	c_ftl_nand_blk_pre_plane, 2
 c_ftl_nand_blk_pre_plane:
@@ -22051,19 +22130,19 @@ g_gc_head_data_block:
 	.size	g_totle_slc_erase_count, 4
 g_totle_slc_erase_count:
 	.space	4
-	.section	.rodata.__func__.8202,"a",%progbits
-.LANCHOR209 = . + 0
-	.type	__func__.8202, %object
-	.size	__func__.8202, 19
-__func__.8202:
-	.ascii	"get_new_active_ppa\000"
-	.section	.bss.req_gc_dst,"aw",%nobits
-	.align	2
-.LANCHOR178 = . + 0
-	.type	req_gc_dst, %object
-	.size	req_gc_dst, 4
-req_gc_dst:
-	.space	4
+	.section	.rodata.__func__.7685,"a",%progbits
+.LANCHOR100 = . + 0
+	.type	__func__.7685, %object
+	.size	__func__.7685, 22
+__func__.7685:
+	.ascii	"List_update_data_list\000"
+	.section	.bss.g_gc_blk_num,"aw",%nobits
+	.align	1
+.LANCHOR133 = . + 0
+	.type	g_gc_blk_num, %object
+	.size	g_gc_blk_num, 2
+g_gc_blk_num:
+	.space	2
 	.section	.bss.req_read,"aw",%nobits
 	.align	2
 .LANCHOR177 = . + 0
@@ -22080,17 +22159,11 @@ g_totle_avg_erase_count:
 	.space	4
 	.section	.bss.c_ftl_nand_planes_per_die,"aw",%nobits
 	.align	1
-.LANCHOR61 = . + 0
+.LANCHOR49 = . + 0
 	.type	c_ftl_nand_planes_per_die, %object
 	.size	c_ftl_nand_planes_per_die, 2
 c_ftl_nand_planes_per_die:
 	.space	2
-	.section	.rodata.__func__.7794,"a",%progbits
-.LANCHOR221 = . + 0
-	.type	__func__.7794, %object
-	.size	__func__.7794, 9
-__func__.7794:
-	.ascii	"log2phys\000"
 	.section	.bss.g_gc_merge_free_blk_threshold,"aw",%nobits
 	.align	1
 .LANCHOR174 = . + 0
@@ -22100,7 +22173,7 @@ g_gc_merge_free_blk_threshold:
 	.space	2
 	.section	.bss.g_MaxLpn,"aw",%nobits
 	.align	2
-.LANCHOR88 = . + 0
+.LANCHOR76 = . + 0
 	.type	g_MaxLpn, %object
 	.size	g_MaxLpn, 4
 g_MaxLpn:
@@ -22112,12 +22185,6 @@ g_MaxLpn:
 	.size	gpNandParaInfo, 4
 gpNandParaInfo:
 	.space	4
-	.section	.rodata.__func__.7651,"a",%progbits
-.LANCHOR108 = . + 0
-	.type	__func__.7651, %object
-	.size	__func__.7651, 17
-__func__.7651:
-	.ascii	"List_remove_node\000"
 	.section	.bss.g_LowFormat,"aw",%nobits
 	.align	2
 .LANCHOR237 = . + 0
@@ -22127,14 +22194,14 @@ g_LowFormat:
 	.space	4
 	.section	.bss.c_ftl_nand_type,"aw",%nobits
 	.align	1
-.LANCHOR59 = . + 0
+.LANCHOR47 = . + 0
 	.type	c_ftl_nand_type, %object
 	.size	c_ftl_nand_type, 2
 c_ftl_nand_type:
 	.space	2
 	.section	.bss.gSysFreeQueue,"aw",%nobits
 	.align	1
-.LANCHOR93 = . + 0
+.LANCHOR81 = . + 0
 	.type	gSysFreeQueue, %object
 	.size	gSysFreeQueue, 2056
 gSysFreeQueue:
@@ -22146,52 +22213,39 @@ gSysFreeQueue:
 	.size	slcPageToMlcPageTbl, 512
 slcPageToMlcPageTbl:
 	.space	512
-	.section	.rodata.__func__.8286,"a",%progbits
-.LANCHOR226 = . + 0
-	.type	__func__.8286, %object
-	.size	__func__.8286, 19
-__func__.8286:
-	.ascii	"FtlGcFreeTempBlock\000"
-	.section	.rodata.__func__.7313,"a",%progbits
+	.section	.rodata.__func__.7317,"a",%progbits
 .LANCHOR238 = . + 0
-	.type	__func__.7313, %object
-	.size	__func__.7313, 8
-__func__.7313:
+	.type	__func__.7317, %object
+	.size	__func__.7317, 8
+__func__.7317:
 	.ascii	"FtlInit\000"
 	.section	.bss.c_ftl_nand_sys_blks_per_plane,"aw",%nobits
 	.align	2
-.LANCHOR52 = . + 0
+.LANCHOR40 = . + 0
 	.type	c_ftl_nand_sys_blks_per_plane, %object
 	.size	c_ftl_nand_sys_blks_per_plane, 4
 c_ftl_nand_sys_blks_per_plane:
 	.space	4
-	.section	.rodata.__func__.8380,"a",%progbits
-.LANCHOR236 = . + 0
-	.type	__func__.8380, %object
-	.size	__func__.8380, 23
-__func__.8380:
-	.ascii	"rk_ftl_garbage_collect\000"
 	.section	.bss.g_buffer_superblock,"aw",%nobits
 	.align	2
-.LANCHOR110 = . + 0
+.LANCHOR98 = . + 0
 	.type	g_buffer_superblock, %object
 	.size	g_buffer_superblock, 48
 g_buffer_superblock:
 	.space	48
 	.section	.bss.p_sys_data_buf,"aw",%nobits
 	.align	2
-.LANCHOR98 = . + 0
+.LANCHOR86 = . + 0
 	.type	p_sys_data_buf, %object
 	.size	p_sys_data_buf, 4
 p_sys_data_buf:
 	.space	4
-	.section	.bss.c_ftl_nand_reserved_blks,"aw",%nobits
-	.align	1
-.LANCHOR75 = . + 0
-	.type	c_ftl_nand_reserved_blks, %object
-	.size	c_ftl_nand_reserved_blks, 2
-c_ftl_nand_reserved_blks:
-	.space	2
+	.section	.rodata.__func__.7722,"a",%progbits
+.LANCHOR101 = . + 0
+	.type	__func__.7722, %object
+	.size	__func__.7722, 26
+__func__.7722:
+	.ascii	"ftl_map_blk_alloc_new_blk\000"
 	.section	.bss.g_maxRegNum,"aw",%nobits
 .LANCHOR14 = . + 0
 	.type	g_maxRegNum, %object
@@ -22200,20 +22254,14 @@ g_maxRegNum:
 	.space	1
 	.section	.bss.p_gc_spare_buf,"aw",%nobits
 	.align	2
-.LANCHOR133 = . + 0
+.LANCHOR121 = . + 0
 	.type	p_gc_spare_buf, %object
 	.size	p_gc_spare_buf, 4
 p_gc_spare_buf:
 	.space	4
-	.section	.rodata.__func__.7681,"a",%progbits
-.LANCHOR112 = . + 0
-	.type	__func__.7681, %object
-	.size	__func__.7681, 22
-__func__.7681:
-	.ascii	"List_update_data_list\000"
 	.section	.bss.gNandFlashInfoBlockAddr,"aw",%nobits
 	.align	2
-.LANCHOR47 = . + 0
+.LANCHOR149 = . + 0
 	.type	gNandFlashInfoBlockAddr, %object
 	.size	gNandFlashInfoBlockAddr, 4
 gNandFlashInfoBlockAddr:
@@ -22233,14 +22281,14 @@ p_io_spare_buf:
 	.space	4
 	.section	.bss.c_ftl_vendor_part_size,"aw",%nobits
 	.align	1
-.LANCHOR65 = . + 0
+.LANCHOR53 = . + 0
 	.type	c_ftl_vendor_part_size, %object
 	.size	c_ftl_vendor_part_size, 2
 c_ftl_vendor_part_size:
 	.space	2
 	.section	.bss.c_ftl_nand_planes_num,"aw",%nobits
 	.align	1
-.LANCHOR53 = . + 0
+.LANCHOR41 = . + 0
 	.type	c_ftl_nand_planes_num, %object
 	.size	c_ftl_nand_planes_num, 2
 c_ftl_nand_planes_num:
@@ -22265,11 +22313,12 @@ p_io_data_buf_1:
 	.size	power_up_flag, 4
 power_up_flag:
 	.word	1
-	.section	.bss.gFlashOnfiModeEn,"aw",%nobits
-	.type	gFlashOnfiModeEn, %object
-	.size	gFlashOnfiModeEn, 1
-gFlashOnfiModeEn:
-	.space	1
+	.section	.rodata.__func__.8109,"a",%progbits
+.LANCHOR118 = . + 0
+	.type	__func__.8109, %object
+	.size	__func__.8109, 18
+__func__.8109:
+	.ascii	"SupperBlkListInit\000"
 	.section	.bss.g_totle_write_page_count,"aw",%nobits
 	.align	2
 .LANCHOR159 = . + 0
@@ -22284,12 +22333,6 @@ g_totle_write_page_count:
 	.size	g_totle_gc_page_count, 4
 g_totle_gc_page_count:
 	.space	4
-	.section	.rodata.__func__.7929,"a",%progbits
-.LANCHOR199 = . + 0
-	.type	__func__.7929, %object
-	.size	__func__.7929, 15
-__func__.7929:
-	.ascii	"FtlLoadSysInfo\000"
 	.section	.bss.g_min_erase_count,"aw",%nobits
 	.align	2
 .LANCHOR167 = . + 0
@@ -22299,29 +22342,23 @@ g_min_erase_count:
 	.space	4
 	.section	.bss.FtlUpdateVaildLpnCount,"aw",%nobits
 	.align	1
-.LANCHOR117 = . + 0
+.LANCHOR105 = . + 0
 	.type	FtlUpdateVaildLpnCount, %object
 	.size	FtlUpdateVaildLpnCount, 2
 FtlUpdateVaildLpnCount:
 	.space	2
-	.section	.rodata.__func__.8213,"a",%progbits
-.LANCHOR207 = . + 0
-	.type	__func__.8213, %object
-	.size	__func__.8213, 16
-__func__.8213:
-	.ascii	"update_vpc_list\000"
-	.section	.rodata.__func__.7778,"a",%progbits
-.LANCHOR116 = . + 0
-	.type	__func__.7778, %object
-	.size	__func__.7778, 22
-__func__.7778:
-	.ascii	"select_l2p_ram_region\000"
-	.section	.bss.g_cur_erase_blk,"aw",%nobits
+	.section	.rodata.__func__.7762,"a",%progbits
+.LANCHOR214 = . + 0
+	.type	__func__.7762, %object
+	.size	__func__.7762, 16
+__func__.7762:
+	.ascii	"FtlMapWritePage\000"
+	.section	.bss.p_sys_data_buf_1,"aw",%nobits
 	.align	2
-.LANCHOR89 = . + 0
-	.type	g_cur_erase_blk, %object
-	.size	g_cur_erase_blk, 4
-g_cur_erase_blk:
+.LANCHOR180 = . + 0
+	.type	p_sys_data_buf_1, %object
+	.size	p_sys_data_buf_1, 4
+p_sys_data_buf_1:
 	.space	4
 	.section	.bss.g_in_gc_progress,"aw",%nobits
 	.align	2
@@ -22337,23 +22374,23 @@ g_in_gc_progress:
 	.size	gNandChipMap, 32
 gNandChipMap:
 	.space	32
-	.section	.bss.gFlashPageBuffer1,"aw",%nobits
-	.align	2
-.LANCHOR41 = . + 0
-	.type	gFlashPageBuffer1, %object
-	.size	gFlashPageBuffer1, 4
-gFlashPageBuffer1:
-	.space	4
+	.section	.bss.g_gc_bad_block_gc_index,"aw",%nobits
+	.align	1
+.LANCHOR141 = . + 0
+	.type	g_gc_bad_block_gc_index, %object
+	.size	g_gc_bad_block_gc_index, 2
+g_gc_bad_block_gc_index:
+	.space	2
 	.section	.bss.c_ftl_nand_init_sys_blks_per_plane,"aw",%nobits
 	.align	2
-.LANCHOR81 = . + 0
+.LANCHOR69 = . + 0
 	.type	c_ftl_nand_init_sys_blks_per_plane, %object
 	.size	c_ftl_nand_init_sys_blks_per_plane, 4
 c_ftl_nand_init_sys_blks_per_plane:
 	.space	4
 	.section	.bss.p_free_data_block_list_head,"aw",%nobits
 	.align	2
-.LANCHOR105 = . + 0
+.LANCHOR93 = . + 0
 	.type	p_free_data_block_list_head, %object
 	.size	p_free_data_block_list_head, 4
 p_free_data_block_list_head:
@@ -22379,12 +22416,6 @@ gNandPhyInfo:
 	.size	gSysInfo, 12
 gSysInfo:
 	.space	12
-	.section	.rodata.__func__.8105,"a",%progbits
-.LANCHOR130 = . + 0
-	.type	__func__.8105, %object
-	.size	__func__.8105, 18
-__func__.8105:
-	.ascii	"SupperBlkListInit\000"
 	.section	.bss.g_gc_blk_index,"aw",%nobits
 	.align	1
 .LANCHOR175 = . + 0
@@ -22429,7 +22460,7 @@ gp_last_act_superblock:
 	.space	4
 	.section	.bss.c_ftl_nand_max_vendor_blks,"aw",%nobits
 	.align	1
-.LANCHOR77 = . + 0
+.LANCHOR65 = . + 0
 	.type	c_ftl_nand_max_vendor_blks, %object
 	.size	c_ftl_nand_max_vendor_blks, 2
 c_ftl_nand_max_vendor_blks:
@@ -22568,13 +22599,12 @@ random_seed:
 	.short	28406
 	.short	17598
 	.short	28087
-	.section	.bss.c_ftl_nand_sec_pre_page,"aw",%nobits
-	.align	1
-.LANCHOR71 = . + 0
-	.type	c_ftl_nand_sec_pre_page, %object
-	.size	c_ftl_nand_sec_pre_page, 2
-c_ftl_nand_sec_pre_page:
-	.space	2
+	.section	.rodata.__func__.7655,"a",%progbits
+.LANCHOR96 = . + 0
+	.type	__func__.7655, %object
+	.size	__func__.7655, 17
+__func__.7655:
+	.ascii	"List_remove_node\000"
 	.section	.bss.gNandMaxDie,"aw",%nobits
 .LANCHOR16 = . + 0
 	.type	gNandMaxDie, %object
@@ -22583,35 +22613,35 @@ gNandMaxDie:
 	.space	1
 	.section	.bss.p_gc_data_buf,"aw",%nobits
 	.align	2
-.LANCHOR132 = . + 0
+.LANCHOR120 = . + 0
 	.type	p_gc_data_buf, %object
 	.size	p_gc_data_buf, 4
 p_gc_data_buf:
 	.space	4
 	.section	.bss.g_MaxLbaSector,"aw",%nobits
 	.align	2
-.LANCHOR84 = . + 0
+.LANCHOR72 = . + 0
 	.type	g_MaxLbaSector, %object
 	.size	g_MaxLbaSector, 4
 g_MaxLbaSector:
 	.space	4
 	.section	.bss.p_erase_count_table,"aw",%nobits
 	.align	2
-.LANCHOR96 = . + 0
+.LANCHOR84 = . + 0
 	.type	p_erase_count_table, %object
 	.size	p_erase_count_table, 4
 p_erase_count_table:
 	.space	4
 	.section	.bss.p_vendor_block_table,"aw",%nobits
 	.align	2
-.LANCHOR87 = . + 0
+.LANCHOR75 = . + 0
 	.type	p_vendor_block_table, %object
 	.size	p_vendor_block_table, 4
 p_vendor_block_table:
 	.space	4
 	.section	.bss.p_data_block_list_head,"aw",%nobits
 	.align	2
-.LANCHOR100 = . + 0
+.LANCHOR88 = . + 0
 	.type	p_data_block_list_head, %object
 	.size	p_data_block_list_head, 4
 p_data_block_list_head:
@@ -22624,14 +22654,14 @@ gNandOptPara:
 	.space	32
 	.section	.bss.g_sys_save_data,"aw",%nobits
 	.align	2
-.LANCHOR143 = . + 0
+.LANCHOR131 = . + 0
 	.type	g_sys_save_data, %object
 	.size	g_sys_save_data, 48
 g_sys_save_data:
 	.space	48
 	.section	.bss.g_VaildLpn,"aw",%nobits
 	.align	2
-.LANCHOR118 = . + 0
+.LANCHOR106 = . + 0
 	.type	g_VaildLpn, %object
 	.size	g_VaildLpn, 4
 g_VaildLpn:
@@ -22650,20 +22680,24 @@ g_recovery_page_num:
 	.size	gTotleBlock, 2
 gTotleBlock:
 	.space	2
-	.section	.bss.gFlashSpareBuffer,"aw",%nobits
-	.align	2
-.LANCHOR241 = . + 0
-	.type	gFlashSpareBuffer, %object
-	.size	gFlashSpareBuffer, 4
-gFlashSpareBuffer:
-	.space	4
-	.section	.bss.gFlashProgCheckBuffer,"aw",%nobits
-	.align	2
-.LANCHOR204 = . + 0
-	.type	gFlashProgCheckBuffer, %object
-	.size	gFlashProgCheckBuffer, 4
-gFlashProgCheckBuffer:
-	.space	4
+	.section	.rodata.__func__.7782,"a",%progbits
+.LANCHOR104 = . + 0
+	.type	__func__.7782, %object
+	.size	__func__.7782, 22
+__func__.7782:
+	.ascii	"select_l2p_ram_region\000"
+	.section	.rodata.__func__.8222,"a",%progbits
+.LANCHOR208 = . + 0
+	.type	__func__.8222, %object
+	.size	__func__.8222, 20
+__func__.8222:
+	.ascii	"decrement_vpc_count\000"
+	.section	.bss.g_gc_refresh_block_temp_tbl,"aw",%nobits
+	.align	1
+	.type	g_gc_refresh_block_temp_tbl, %object
+	.size	g_gc_refresh_block_temp_tbl, 34
+g_gc_refresh_block_temp_tbl:
+	.space	34
 	.section	.bss.IDByte,"aw",%nobits
 	.align	2
 .LANCHOR22 = . + 0
@@ -22673,14 +22707,14 @@ IDByte:
 	.space	32
 	.section	.bss.g_gc_temp_superblock,"aw",%nobits
 	.align	2
-.LANCHOR111 = . + 0
+.LANCHOR99 = . + 0
 	.type	g_gc_temp_superblock, %object
 	.size	g_gc_temp_superblock, 48
 g_gc_temp_superblock:
 	.space	48
 	.section	.bss.c_ftl_nand_page_pre_slc_blk,"aw",%nobits
 	.align	1
-.LANCHOR69 = . + 0
+.LANCHOR57 = . + 0
 	.type	c_ftl_nand_page_pre_slc_blk, %object
 	.size	c_ftl_nand_page_pre_slc_blk, 2
 c_ftl_nand_page_pre_slc_blk:
@@ -22692,6 +22726,12 @@ c_ftl_nand_page_pre_slc_blk:
 	.size	gBlockPageAlignSize, 4
 gBlockPageAlignSize:
 	.space	4
+	.section	.rodata.__func__.8200,"a",%progbits
+.LANCHOR219 = . + 0
+	.type	__func__.8200, %object
+	.size	__func__.8200, 29
+__func__.8200:
+	.ascii	"allocate_new_data_superblock\000"
 	.section	.bss.g_gc_superblock,"aw",%nobits
 	.align	2
 .LANCHOR202 = . + 0
@@ -22699,22 +22739,16 @@ gBlockPageAlignSize:
 	.size	g_gc_superblock, 48
 g_gc_superblock:
 	.space	48
-	.section	.rodata.__func__.8196,"a",%progbits
-.LANCHOR219 = . + 0
-	.type	__func__.8196, %object
-	.size	__func__.8196, 29
-__func__.8196:
-	.ascii	"allocate_new_data_superblock\000"
 	.section	.bss.g_totle_sys_slc_erase_count,"aw",%nobits
 	.align	2
-.LANCHOR97 = . + 0
+.LANCHOR85 = . + 0
 	.type	g_totle_sys_slc_erase_count, %object
 	.size	g_totle_sys_slc_erase_count, 4
 g_totle_sys_slc_erase_count:
 	.space	4
 	.section	.bss.c_ftl_nand_blks_per_die_shift,"aw",%nobits
 	.align	1
-.LANCHOR67 = . + 0
+.LANCHOR55 = . + 0
 	.type	c_ftl_nand_blks_per_die_shift, %object
 	.size	c_ftl_nand_blks_per_die_shift, 2
 c_ftl_nand_blks_per_die_shift:
@@ -22726,6 +22760,12 @@ c_ftl_nand_blks_per_die_shift:
 	.size	g_SlcPartLbaEndSector, 4
 g_SlcPartLbaEndSector:
 	.space	4
+	.section	.rodata.__func__.8206,"a",%progbits
+.LANCHOR209 = . + 0
+	.type	__func__.8206, %object
+	.size	__func__.8206, 19
+__func__.8206:
+	.ascii	"get_new_active_ppa\000"
 	.section	.bss.g_gc_cur_blk_max_valid_pages,"aw",%nobits
 	.align	1
 .LANCHOR235 = . + 0
@@ -22742,14 +22782,14 @@ g_totle_discard_page_count:
 	.space	4
 	.section	.bss.c_ftl_nand_bbm_buf_size,"aw",%nobits
 	.align	1
-.LANCHOR91 = . + 0
+.LANCHOR79 = . + 0
 	.type	c_ftl_nand_bbm_buf_size, %object
 	.size	c_ftl_nand_bbm_buf_size, 2
 c_ftl_nand_bbm_buf_size:
 	.space	2
 	.section	.bss.gL2pMapInfo,"aw",%nobits
 	.align	2
-.LANCHOR122 = . + 0
+.LANCHOR110 = . + 0
 	.type	gL2pMapInfo, %object
 	.size	gL2pMapInfo, 44
 gL2pMapInfo:
@@ -22763,17 +22803,24 @@ g_gc_head_data_block_count:
 	.space	4
 	.section	.bss.gFlashPageBuffer0,"aw",%nobits
 	.align	2
-.LANCHOR44 = . + 0
+.LANCHOR146 = . + 0
 	.type	gFlashPageBuffer0, %object
 	.size	gFlashPageBuffer0, 4
 gFlashPageBuffer0:
 	.space	4
 	.section	.bss.g_req_cache,"aw",%nobits
 	.align	2
-.LANCHOR137 = . + 0
+.LANCHOR125 = . + 0
 	.type	g_req_cache, %object
 	.size	g_req_cache, 4
 g_req_cache:
+	.space	4
+	.section	.bss.gFlashPageBuffer1,"aw",%nobits
+	.align	2
+.LANCHOR143 = . + 0
+	.type	gFlashPageBuffer1, %object
+	.size	gFlashPageBuffer1, 4
+gFlashPageBuffer1:
 	.space	4
 	.section	.data.gFtlInitStatus,"aw",%progbits
 	.align	2
@@ -22784,17 +22831,11 @@ gFtlInitStatus:
 	.word	-1
 	.section	.bss.c_gc_page_buf_num,"aw",%nobits
 	.align	2
-.LANCHOR136 = . + 0
+.LANCHOR124 = . + 0
 	.type	c_gc_page_buf_num, %object
 	.size	c_gc_page_buf_num, 4
 c_gc_page_buf_num:
 	.space	4
-	.section	.rodata.__func__.7718,"a",%progbits
-.LANCHOR113 = . + 0
-	.type	__func__.7718, %object
-	.size	__func__.7718, 26
-__func__.7718:
-	.ascii	"ftl_map_blk_alloc_new_blk\000"
 	.section	.data.NandFlashParaTbl,"aw",%progbits
 	.align	1
 .LANCHOR26 = . + 0
@@ -24673,23 +24714,29 @@ NandFlashParaTbl:
 	.byte	0
 	.byte	0
 	.space	4
+	.section	.rodata.__func__.7736,"a",%progbits
+.LANCHOR212 = . + 0
+	.type	__func__.7736, %object
+	.size	__func__.7736, 15
+__func__.7736:
+	.ascii	"ftl_map_blk_gc\000"
 	.section	.bss.c_ftl_nand_page_pre_blk,"aw",%nobits
 	.align	1
-.LANCHOR68 = . + 0
+.LANCHOR56 = . + 0
 	.type	c_ftl_nand_page_pre_blk, %object
 	.size	c_ftl_nand_page_pre_blk, 2
 c_ftl_nand_page_pre_blk:
 	.space	2
 	.section	.bss.g_totle_map_block,"aw",%nobits
 	.align	1
-.LANCHOR123 = . + 0
+.LANCHOR111 = . + 0
 	.type	g_totle_map_block, %object
 	.size	g_totle_map_block, 2
 g_totle_map_block:
 	.space	2
 	.section	.bss.DeviceCapacity,"aw",%nobits
 	.align	2
-.LANCHOR76 = . + 0
+.LANCHOR64 = . + 0
 	.type	DeviceCapacity, %object
 	.size	DeviceCapacity, 4
 DeviceCapacity:
@@ -24703,39 +24750,37 @@ gp_ect_tbl_info:
 	.space	4
 	.section	.bss.c_ftl_nand_map_blks_per_plane,"aw",%nobits
 	.align	1
-.LANCHOR79 = . + 0
+.LANCHOR67 = . + 0
 	.type	c_ftl_nand_map_blks_per_plane, %object
 	.size	c_ftl_nand_map_blks_per_plane, 2
 c_ftl_nand_map_blks_per_plane:
 	.space	2
 	.section	.bss.p_l2p_map_buf,"aw",%nobits
 	.align	2
-.LANCHOR121 = . + 0
+.LANCHOR109 = . + 0
 	.type	p_l2p_map_buf, %object
 	.size	p_l2p_map_buf, 4
 p_l2p_map_buf:
 	.space	4
 	.section	.bss.g_recovery_page_min_ver,"aw",%nobits
 	.align	2
-.LANCHOR141 = . + 0
+.LANCHOR129 = . + 0
 	.type	g_recovery_page_min_ver, %object
 	.size	g_recovery_page_min_ver, 4
 g_recovery_page_min_ver:
 	.space	4
 	.section	.bss.g_active_superblock,"aw",%nobits
 	.align	2
-.LANCHOR109 = . + 0
+.LANCHOR97 = . + 0
 	.type	g_active_superblock, %object
 	.size	g_active_superblock, 48
 g_active_superblock:
 	.space	48
 	.section	.bss.g_gc_bad_block_temp_num,"aw",%nobits
 	.align	1
-.LANCHOR151 = . + 0
+.LANCHOR139 = . + 0
 	.type	g_gc_bad_block_temp_num, %object
 	.size	g_gc_bad_block_temp_num, 2
 g_gc_bad_block_temp_num:
 	.space	2
 	.hidden	free
-	.ident	"GCC: (Ubuntu/Linaro 4.6.3-1ubuntu5) 4.6.3"
-	.section	.note.GNU-stack,"",%progbits

commit 0fe38820d9e1384319dff86638bf28a90f6645aa
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Dec 14 08:54:50 2017 +0800

    rockchip: rk3229: update header macro
    
    Do not use a common name '_CONFIG_H_'
    
    Change-Id: I1b184e9663eb27a06ec89039b6b88b1d099119dc
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/evb_rk3229.h b/include/configs/evb_rk3229.h
index c73a100ebb..7f2d2fe1e5 100644
--- a/include/configs/evb_rk3229.h
+++ b/include/configs/evb_rk3229.h
@@ -4,8 +4,8 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 
-#ifndef __CONFIG_H
-#define __CONFIG_H
+#ifndef __RK322X_CONFIG_H
+#define __RK322X_CONFIG_H
 
 #include <configs/rk322x_common.h>
 

commit f011305a0a8e295ffe0a79f306edd29049100739
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Dec 13 17:34:43 2017 +0800

    rockchip: rk3128: move timer init to arch_cpu_init
    
    The board init is too late.
    
    Change-Id: Ie63e86c98644123d1f611280784252a0cc0ada2e
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3128-board.c b/arch/arm/mach-rockchip/rk3128-board.c
index c77fbde3be..8217fd52c8 100644
--- a/arch/arm/mach-rockchip/rk3128-board.c
+++ b/arch/arm/mach-rockchip/rk3128-board.c
@@ -13,7 +13,6 @@
 #include <asm/arch/periph.h>
 #include <asm/arch/grf_rk3128.h>
 #include <asm/arch/boot_mode.h>
-#include <asm/arch/timer.h>
 #include <power/charge_display.h>
 #include <power/regulator.h>
 #include <video_rockchip.h>
@@ -63,8 +62,6 @@ int board_init(void)
 {
 	int ret = 0;
 
-	rockchip_timer_init();
-
 	ret = regulators_enable_boot_on(false);
 	if (ret) {
 		debug("%s: Cannot enable boot on regulator\n", __func__);
diff --git a/arch/arm/mach-rockchip/rk3128/rk3128.c b/arch/arm/mach-rockchip/rk3128/rk3128.c
index ef0ed3bcd4..24c1ee8bf9 100644
--- a/arch/arm/mach-rockchip/rk3128/rk3128.c
+++ b/arch/arm/mach-rockchip/rk3128/rk3128.c
@@ -5,6 +5,7 @@
  */
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
+#include <asm/arch/timer.h>
 
 #define GRF_GPIO1C_IOMUX		0x200080c0
 #define SDMMC_INTMASK			0x10214024
@@ -34,6 +35,7 @@ int arch_cpu_init(void)
 	 */
 	writel(0, SDMMC_INTMASK);
 #endif
+	rockchip_timer_init();
 
 	return 0;
 }

commit 2f773ef5440243ad785422d9c7ebe4f4d88fbab0
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Dec 14 08:52:16 2017 +0800

    rockchip: resc_img: return err if some img missing
    
    We are not ablt to go on if we do not able to get some image which
    is must.
    
    Change-Id: I1cebd327ec894c688f57627518df85f6ff4aa836
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index b755b79742..2f026dc624 100644
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -177,12 +177,16 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 	/* Read boot/recovery and chenc if this is an AOSP img */
 	ret = part_get_info_by_name(dev_desc, boot_partname,
 					 &part_info);
-	if (ret < 0)
+	if (ret < 0) {
 		printf("fail to get %s part\n", boot_partname);
+		goto out;
+	}
 	andr_hdr = (void *)hdr;
 	ret = blk_dread(dev_desc, part_info.start, 1, andr_hdr);
-	if (ret != 1)
+	if (ret != 1) {
 		printf("%s read fail\n", __func__);
+		goto out;
+	}
 	ret = android_image_check_header(andr_hdr);
 	if (!ret) {
 		debug("%s Load resource from %s senond pos\n",
@@ -201,8 +205,10 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 		/* Read resource from Rockchip Resource partition */
 		ret = part_get_info_by_name(dev_desc, PART_RESOURCE,
 					 &part_info);
-		if (ret < 0)
+		if (ret < 0) {
 			printf("fail to get %s part\n", PART_RESOURCE);
+			goto out;
+		}
 		offset = part_info.start;
 		debug("%s Load resource from %s\n", __func__, part_info.name);
 	}

commit f5a168ec10a7f7c32e863018b76eeaa1404c9e8d
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Dec 11 18:04:44 2017 +0800

    rockchip: clk: remove not used file
    
    Change-Id: I29debf757749ca2a63a55d5b45a96d5170b51d85
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3128.c.bak b/drivers/clk/rockchip/clk_rk3128.c.bak
deleted file mode 100644
index cd6ebe96f2..0000000000
--- a/drivers/clk/rockchip/clk_rk3128.c.bak
+++ /dev/null
@@ -1,602 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:	GPL-2.0
- */
-
-#include <common.h>
-#include <clk-uclass.h>
-#include <dm.h>
-#include <errno.h>
-#include <syscon.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/cru_rk3128.h>
-#include <asm/arch/hardware.h>
-#include <bitfield.h>
-#include <dm/lists.h>
-#include <dt-bindings/clock/rk3128-cru.h>
-#include <linux/log2.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-enum {
-	VCO_MAX_HZ	= 2400U * 1000000,
-	VCO_MIN_HZ	= 600 * 1000000,
-	OUTPUT_MAX_HZ	= 2400U * 1000000,
-	OUTPUT_MIN_HZ	= 24 * 1000000,
-};
-
-#define DIV_TO_RATE(input_rate, div)	((input_rate) / ((div) + 1))
-
-#define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\
-	.refdiv = _refdiv,\
-	.fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ),\
-	.postdiv1 = _postdiv1, .postdiv2 = _postdiv2};
-
-/* use integer mode*/
-static const struct pll_div apll_init_cfg = PLL_DIVISORS(APLL_HZ, 1, 3, 1);
-static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 2, 1);
-
-static int rkclk_set_pll(struct rk3128_cru *cru, enum rk_clk_id clk_id,
-			 const struct pll_div *div)
-{
-	int pll_id = rk_pll_id(clk_id);
-	struct rk3128_pll *pll = &cru->pll[pll_id];
-
-	/* All PLLs have same VCO and output frequency range restrictions. */
-	uint vco_hz = OSC_HZ / 1000 * div->fbdiv / div->refdiv * 1000;
-	uint output_hz = vco_hz / div->postdiv1 / div->postdiv2;
-
-	debug("PLL at %p:fd=%d,rd=%d,pd1=%d,pd2=%d,vco=%uHz,output=%uHz\n",
-	      pll, div->fbdiv, div->refdiv, div->postdiv1,
-	      div->postdiv2, vco_hz, output_hz);
-	assert(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ &&
-	       output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ);
-
-	/* use integer mode */
-	rk_setreg(&pll->con1, 1 << PLL_DSMPD_SHIFT);
-	/* Power down */
-	rk_setreg(&pll->con1, 1 << PLL_PD_SHIFT);
-
-	rk_clrsetreg(&pll->con0,
-		     PLL_POSTDIV1_MASK | PLL_FBDIV_MASK,
-		     (div->postdiv1 << PLL_POSTDIV1_SHIFT) | div->fbdiv);
-	rk_clrsetreg(&pll->con1, PLL_POSTDIV2_MASK | PLL_REFDIV_MASK,
-		     (div->postdiv2 << PLL_POSTDIV2_SHIFT |
-		     div->refdiv << PLL_REFDIV_SHIFT));
-
-	/* Power Up */
-	rk_clrreg(&pll->con1, 1 << PLL_PD_SHIFT);
-
-	/* waiting for pll lock */
-	while (readl(&pll->con1) & (1 << PLL_LOCK_STATUS_SHIFT))
-		udelay(1);
-
-	return 0;
-}
-
-static int pll_para_config(u32 freq_hz, struct pll_div *div)
-{
-	u32 ref_khz = OSC_HZ / 1000, refdiv, fbdiv = 0;
-	u32 postdiv1, postdiv2 = 1;
-	u32 fref_khz;
-	u32 diff_khz, best_diff_khz;
-	const u32 max_refdiv = 63, max_fbdiv = 3200, min_fbdiv = 16;
-	const u32 max_postdiv1 = 7, max_postdiv2 = 7;
-	u32 vco_khz;
-	u32 freq_khz = freq_hz / 1000;
-
-	if (!freq_hz) {
-		printf("%s: the frequency can't be 0 Hz\n", __func__);
-		return -1;
-	}
-
-	postdiv1 = DIV_ROUND_UP(VCO_MIN_HZ / 1000, freq_khz);
-	if (postdiv1 > max_postdiv1) {
-		postdiv2 = DIV_ROUND_UP(postdiv1, max_postdiv1);
-		postdiv1 = DIV_ROUND_UP(postdiv1, postdiv2);
-	}
-
-	vco_khz = freq_khz * postdiv1 * postdiv2;
-
-	if (vco_khz < (VCO_MIN_HZ / 1000) || vco_khz > (VCO_MAX_HZ / 1000) ||
-	    postdiv2 > max_postdiv2) {
-		printf("%s: Cannot find out a supported VCO for Freq (%uHz)\n",
-		       __func__, freq_hz);
-		return -1;
-	}
-
-	div->postdiv1 = postdiv1;
-	div->postdiv2 = postdiv2;
-
-	best_diff_khz = vco_khz;
-	for (refdiv = 1; refdiv < max_refdiv && best_diff_khz; refdiv++) {
-		fref_khz = ref_khz / refdiv;
-
-		fbdiv = vco_khz / fref_khz;
-		if ((fbdiv >= max_fbdiv) || (fbdiv <= min_fbdiv))
-			continue;
-		diff_khz = vco_khz - fbdiv * fref_khz;
-		if (fbdiv + 1 < max_fbdiv && diff_khz > fref_khz / 2) {
-			fbdiv++;
-			diff_khz = fref_khz - diff_khz;
-		}
-
-		if (diff_khz >= best_diff_khz)
-			continue;
-
-		best_diff_khz = diff_khz;
-		div->refdiv = refdiv;
-		div->fbdiv = fbdiv;
-	}
-
-	if (best_diff_khz > 4 * (1000)) {
-		printf("%s: Failed to match output frequency %u bestis %u Hz\n",
-		       __func__, freq_hz,
-		       best_diff_khz * 1000);
-		return -1;
-	}
-	return 0;
-}
-
-static void rkclk_init(struct rk3128_cru *cru)
-{
-	u32 aclk_div;
-	u32 hclk_div;
-	u32 pclk_div;
-
-	/* pll enter slow-mode */
-	rk_clrsetreg(&cru->cru_mode_con,
-		     GPLL_MODE_MASK | APLL_MODE_MASK,
-		     GPLL_MODE_SLOW << GPLL_MODE_SHIFT |
-		     APLL_MODE_SLOW << APLL_MODE_SHIFT);
-
-	/* init pll */
-	rkclk_set_pll(cru, CLK_ARM, &apll_init_cfg);
-	rkclk_set_pll(cru, CLK_GENERAL, &gpll_init_cfg);
-
-	/*
-	 * select apll as cpu/core clock pll source and
-	 * set up dependent divisors for PERI and ACLK clocks.
-	 * core hz : apll = 1:1
-	 */
-	aclk_div = APLL_HZ / CORE_ACLK_HZ - 1;
-	assert((aclk_div + 1) * CORE_ACLK_HZ == APLL_HZ && aclk_div < 0x7);
-
-	pclk_div = APLL_HZ / CORE_PERI_HZ - 1;
-	assert((pclk_div + 1) * CORE_PERI_HZ == APLL_HZ && pclk_div < 0xf);
-
-	rk_clrsetreg(&cru->cru_clksel_con[0],
-		     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK,
-		     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
-		     0 << CORE_DIV_CON_SHIFT);
-
-	rk_clrsetreg(&cru->cru_clksel_con[1],
-		     CORE_ACLK_DIV_MASK | CORE_PERI_DIV_MASK,
-		     aclk_div << CORE_ACLK_DIV_SHIFT |
-		     pclk_div << CORE_PERI_DIV_SHIFT);
-
-	/*
-	 * select gpll as pd_bus bus clock source and
-	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
-	 */
-	aclk_div = GPLL_HZ / BUS_ACLK_HZ - 1;
-	assert((aclk_div + 1) * BUS_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
-
-	pclk_div = BUS_ACLK_HZ / BUS_PCLK_HZ - 1;
-	assert((pclk_div + 1) * BUS_PCLK_HZ == BUS_ACLK_HZ && pclk_div <= 0x7);
-
-	hclk_div = BUS_ACLK_HZ / BUS_HCLK_HZ - 1;
-	assert((hclk_div + 1) * BUS_HCLK_HZ == BUS_ACLK_HZ && hclk_div <= 0x3);
-
-	rk_clrsetreg(&cru->cru_clksel_con[0],
-		     BUS_ACLK_PLL_SEL_MASK | BUS_ACLK_DIV_MASK,
-		     BUS_ACLK_PLL_SEL_GPLL << BUS_ACLK_PLL_SEL_SHIFT |
-		     aclk_div << BUS_ACLK_DIV_SHIFT);
-
-	rk_clrsetreg(&cru->cru_clksel_con[1],
-		     BUS_PCLK_DIV_MASK | BUS_HCLK_DIV_MASK,
-		     pclk_div << BUS_PCLK_DIV_SHIFT |
-		     hclk_div << BUS_HCLK_DIV_SHIFT);
-
-	/*
-	 * select gpll as pd_peri bus clock source and
-	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
-	 */
-	aclk_div = GPLL_HZ / PERI_ACLK_HZ - 1;
-	assert((aclk_div + 1) * PERI_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f);
-
-	hclk_div = ilog2(PERI_ACLK_HZ / PERI_HCLK_HZ);
-	assert((1 << hclk_div) * PERI_HCLK_HZ ==
-		PERI_ACLK_HZ && (hclk_div < 0x4));
-
-	pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ);
-	assert((1 << pclk_div) * PERI_PCLK_HZ ==
-		PERI_ACLK_HZ && pclk_div < 0x8);
-
-	rk_clrsetreg(&cru->cru_clksel_con[10],
-		     PERI_PLL_SEL_MASK | PERI_PCLK_DIV_MASK |
-		     PERI_HCLK_DIV_MASK | PERI_ACLK_DIV_MASK,
-		     PERI_PLL_GPLL << PERI_PLL_SEL_SHIFT |
-		     pclk_div << PERI_PCLK_DIV_SHIFT |
-		     hclk_div << PERI_HCLK_DIV_SHIFT |
-		     aclk_div << PERI_ACLK_DIV_SHIFT);
-
-	/* PLL enter normal-mode */
-	rk_clrsetreg(&cru->cru_mode_con,
-		     GPLL_MODE_MASK | APLL_MODE_MASK | CPLL_MODE_MASK,
-		     GPLL_MODE_NORM << GPLL_MODE_SHIFT |
-		     APLL_MODE_NORM << APLL_MODE_SHIFT |
-		     CPLL_MODE_NORM << CPLL_MODE_SHIFT);
-
-	/*fix NAND controller  working clock max to 150Mhz */
-	rk_clrsetreg(&cru->cru_clksel_con[2],
-		     NANDC_PLL_SEL_MASK | NANDC_CLK_DIV_MASK,
-		     NANDC_PLL_SEL_GPLL << NANDC_PLL_SEL_SHIFT |
-		     3 << NANDC_CLK_DIV_SHIFT);
-}
-
-/* Get pll rate by id */
-static u32 rkclk_pll_get_rate(struct rk3128_cru *cru,
-			      enum rk_clk_id clk_id)
-{
-	u32 refdiv, fbdiv, postdiv1, postdiv2;
-	u32 con;
-	int pll_id = rk_pll_id(clk_id);
-	struct rk3128_pll *pll = &cru->pll[pll_id];
-	static u8 clk_shift[CLK_COUNT] = {
-		0xff, APLL_MODE_SHIFT, DPLL_MODE_SHIFT, CPLL_MODE_SHIFT,
-		GPLL_MODE_SHIFT, 0xff
-	};
-	static u32 clk_mask[CLK_COUNT] = {
-		0xff, APLL_MODE_MASK, DPLL_MODE_MASK, CPLL_MODE_MASK,
-		GPLL_MODE_MASK, 0xff
-	};
-	uint shift;
-	uint mask;
-
-	con = readl(&cru->cru_mode_con);
-	shift = clk_shift[clk_id];
-	mask = clk_mask[clk_id];
-
-	switch ((con & mask) >> shift) {
-	case GPLL_MODE_SLOW:
-		return OSC_HZ;
-	case GPLL_MODE_NORM:
-		/* normal mode */
-		con = readl(&pll->con0);
-		postdiv1 = (con & PLL_POSTDIV1_MASK) >> PLL_POSTDIV1_SHIFT;
-		fbdiv = (con & PLL_FBDIV_MASK) >> PLL_FBDIV_SHIFT;
-		con = readl(&pll->con1);
-		postdiv2 = (con & PLL_POSTDIV2_MASK) >> PLL_POSTDIV2_SHIFT;
-		refdiv = (con & PLL_REFDIV_MASK) >> PLL_REFDIV_SHIFT;
-		return (24 * fbdiv / (refdiv * postdiv1 * postdiv2)) * 1000000;
-	case GPLL_MODE_DEEP:
-	default:
-		return 32768;
-	}
-}
-
-static ulong rockchip_mmc_get_clk(struct rk3128_cru *cru, uint clk_general_rate,
-				  int periph)
-{
-	uint src_rate;
-	uint div, mux;
-	u32 con;
-
-	switch (periph) {
-	case HCLK_EMMC:
-	case SCLK_EMMC:
-	case SCLK_EMMC_SAMPLE:
-		con = readl(&cru->cru_clksel_con[12]);
-		mux = (con & EMMC_PLL_MASK) >> EMMC_PLL_SHIFT;
-		div = (con & EMMC_DIV_MASK) >> EMMC_DIV_SHIFT;
-		break;
-	case HCLK_SDMMC:
-	case SCLK_SDMMC:
-		con = readl(&cru->cru_clksel_con[11]);
-		mux = (con & MMC0_PLL_MASK) >> MMC0_PLL_SHIFT;
-		div = (con & MMC0_DIV_MASK) >> MMC0_DIV_SHIFT;
-		break;
-	default:
-		return -EINVAL;
-	}
-
-	src_rate = mux == EMMC_SEL_24M ? OSC_HZ : clk_general_rate;
-	return DIV_TO_RATE(src_rate, div);
-}
-
-static ulong rockchip_mmc_set_clk(struct rk3128_cru *cru, uint clk_general_rate,
-				  int periph, uint freq)
-{
-	int src_clk_div;
-	int mux;
-
-	debug("%s: clk_general_rate=%u\n", __func__, clk_general_rate);
-
-	/* mmc clock defaulg div 2 internal, need provide double in cru */
-	src_clk_div = DIV_ROUND_UP(clk_general_rate / 2, freq);
-
-	if (src_clk_div > 128) {
-		src_clk_div = DIV_ROUND_UP(OSC_HZ / 2, freq);
-		mux = EMMC_SEL_24M;
-	} else {
-		mux = EMMC_SEL_GPLL;
-	}
-
-	switch (periph) {
-	case HCLK_EMMC:
-		rk_clrsetreg(&cru->cru_clksel_con[12],
-			     EMMC_PLL_MASK | EMMC_DIV_MASK,
-			     mux << EMMC_PLL_SHIFT |
-			     (src_clk_div - 1) << EMMC_DIV_SHIFT);
-		break;
-	case HCLK_SDMMC:
-	case SCLK_SDMMC:
-		rk_clrsetreg(&cru->cru_clksel_con[11],
-			     MMC0_PLL_MASK | MMC0_DIV_MASK,
-			     mux << MMC0_PLL_SHIFT |
-			     (src_clk_div - 1) << MMC0_DIV_SHIFT);
-		break;
-	default:
-		return -EINVAL;
-	}
-
-	return rockchip_mmc_get_clk(cru, clk_general_rate, periph);
-}
-
-static ulong rk3128_peri_get_pclk(struct rk3128_cru *cru, ulong clk_id)
-{
-	u32 div, con;
-
-	switch (clk_id) {
-	case PCLK_I2C0:
-	case PCLK_I2C1:
-	case PCLK_I2C2:
-	case PCLK_I2C3:
-	case PCLK_PWM:
-		con = readl(&cru->cru_clksel_con[10]);
-		div = con >> 12 & 0x3;
-		break;
-	default:
-		printf("do not support this peripheral bus\n");
-		return -EINVAL;
-	}
-
-	return DIV_TO_RATE(PERI_ACLK_HZ, div);
-}
-
-static ulong rk3128_peri_set_pclk(struct rk3128_cru *cru, ulong clk_id, uint hz)
-{
-	int src_clk_div;
-
-	src_clk_div = PERI_ACLK_HZ / hz;
-	assert(src_clk_div - 1 < 4);
-
-	switch (clk_id) {
-	case PCLK_I2C0:
-	case PCLK_I2C1:
-	case PCLK_I2C2:
-	case PCLK_I2C3:
-	case PCLK_PWM:
-		rk_setreg(&cru->cru_clksel_con[10],
-			  ((src_clk_div - 1) << 12));
-		break;
-	default:
-		printf("do not support this peripheral bus\n");
-		return -EINVAL;
-	}
-
-	return DIV_TO_RATE(PERI_ACLK_HZ, src_clk_div);
-}
-
-static ulong rk3128_saradc_get_clk(struct rk3128_cru *cru)
-{
-	u32 div, val;
-
-	val = readl(&cru->cru_clksel_con[24]);
-	div = bitfield_extract(val, SARADC_DIV_CON_SHIFT,
-			       SARADC_DIV_CON_WIDTH);
-
-	return DIV_TO_RATE(OSC_HZ, div);
-}
-
-static ulong rk3128_saradc_set_clk(struct rk3128_cru *cru, uint hz)
-{
-	int src_clk_div;
-
-	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1;
-	assert(src_clk_div < 128);
-
-	rk_clrsetreg(&cru->cru_clksel_con[24],
-		     SARADC_DIV_CON_MASK,
-		     src_clk_div << SARADC_DIV_CON_SHIFT);
-
-	return rk3128_saradc_get_clk(cru);
-}
-
-static ulong rk3128_vop_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz)
-{
-	int src_clk_div;
-	struct pll_div cpll_config = {0};
-
-	src_clk_div = GPLL_HZ / hz;
-	assert(src_clk_div - 1 < 31);
-
-	switch (clk_id) {
-	case ACLK_VIO0:
-		rk_clrsetreg(&cru->cru_clksel_con[31],
-			     VIO0_PLL_MASK | VIO0_DIV_MASK,
-			     VIO0_SEL_GPLL << VIO0_PLL_SHIFT |
-			     (src_clk_div - 1) << VIO0_DIV_SHIFT);
-		break;
-	case ACLK_VIO1:
-		rk_clrsetreg(&cru->cru_clksel_con[31],
-			     VIO1_PLL_MASK | VIO1_DIV_MASK,
-			     VIO1_SEL_GPLL << VIO1_PLL_SHIFT |
-			     (src_clk_div - 1) << VIO1_DIV_SHIFT);
-		break;
-	case DCLK_LCDC:
-		if (pll_para_config(hz, &cpll_config))
-			return -1;
-		rkclk_set_pll(cru, CLK_CODEC, &cpll_config);
-
-		rk_clrsetreg(&cru->cru_clksel_con[27],
-			     DCLK_VOP_SEL_MASK | DCLK_VOP_DIV_CON_MASK,
-			     DCLK_VOP_PLL_SEL_CPLL << DCLK_VOP_SEL_SHIFT |
-			     (1 - 1) << DCLK_VOP_DIV_CON_SHIFT);
-		break;
-	default:
-		printf("do not support this vop freq\n");
-		return -EINVAL;
-	}
-
-	return hz;
-}
-
-static ulong rk3128_vop_get_rate(struct rk3128_cru *cru, ulong clk_id)
-{
-	u32 div, con, parent;
-
-	switch (clk_id) {
-	case ACLK_VIO0:
-		con = readl(&cru->cru_clksel_con[31]);
-		div = con  & 0x1f;
-		parent = GPLL_HZ;
-		break;
-	case ACLK_VIO1:
-		con = readl(&cru->cru_clksel_con[31]);
-		div = (con >> 8) & 0x1f;
-		parent = GPLL_HZ;
-		break;
-	case DCLK_LCDC:
-		con = readl(&cru->cru_clksel_con[27]);
-		div = (con >> 8) & 0xfff;
-		parent = rkclk_pll_get_rate(cru, CLK_CODEC);
-		break;
-	default:
-		return -ENOENT;
-	}
-	return DIV_TO_RATE(parent, div);
-}
-
-static ulong rk3128_clk_get_rate(struct clk *clk)
-{
-	struct rk3128_clk_priv *priv = dev_get_priv(clk->dev);
-
-	switch (clk->id) {
-	case 0 ... 63:
-		return rkclk_pll_get_rate(priv->cru, clk->id);
-	case PCLK_I2C0:
-	case PCLK_I2C1:
-	case PCLK_I2C2:
-	case PCLK_I2C3:
-	case PCLK_PWM:
-		return rk3128_peri_get_pclk(priv->cru, clk->id);
-	case SCLK_SARADC:
-		return rk3128_saradc_get_clk(priv->cru);
-	case DCLK_LCDC:
-	case ACLK_VIO0:
-	case ACLK_VIO1:
-		return rk3128_vop_get_rate(priv->cru, clk->id);
-	default:
-		return -ENOENT;
-	}
-}
-
-static ulong rk3128_clk_set_rate(struct clk *clk, ulong rate)
-{
-	struct rk3128_clk_priv *priv = dev_get_priv(clk->dev);
-	ulong new_rate, gclk_rate;
-
-	gclk_rate = rkclk_pll_get_rate(priv->cru, CLK_GENERAL);
-	switch (clk->id) {
-	case 0 ... 63:
-		return 0;
-	case DCLK_LCDC:
-	case ACLK_VIO0:
-	case ACLK_VIO1:
-		new_rate = rk3128_vop_set_clk(priv->cru,
-					      clk->id, rate);
-		break;
-	case HCLK_EMMC:
-		new_rate = rockchip_mmc_set_clk(priv->cru, gclk_rate,
-						clk->id, rate);
-		break;
-	case PCLK_I2C0:
-	case PCLK_I2C1:
-	case PCLK_I2C2:
-	case PCLK_I2C3:
-	case PCLK_PWM:
-		new_rate = rk3128_peri_set_pclk(priv->cru, clk->id, rate);
-		break;
-	case SCLK_SARADC:
-		new_rate = rk3128_saradc_set_clk(priv->cru, rate);
-		break;
-	default:
-		return -ENOENT;
-	}
-
-	return new_rate;
-}
-
-static struct clk_ops rk3128_clk_ops = {
-	.get_rate	= rk3128_clk_get_rate,
-	.set_rate	= rk3128_clk_set_rate,
-};
-
-static int rk3128_clk_probe(struct udevice *dev)
-{
-	struct rk3128_clk_priv *priv = dev_get_priv(dev);
-
-	priv->cru = (struct rk3128_cru *)dev_read_addr(dev);
-	rkclk_init(priv->cru);
-
-	return 0;
-}
-
-static int rk3128_clk_bind(struct udevice *dev)
-{
-	int ret;
-	struct udevice *sys_child;
-	struct sysreset_reg *priv;
-	u32 offset;
-
-	/* The reset driver does not have a device node, so bind it here */
-	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
-				 &sys_child);
-	if (ret) {
-		debug("Warning: No sysreset driver: ret=%d\n", ret);
-	} else {
-		priv = malloc(sizeof(struct sysreset_reg));
-		priv->glb_srst_fst_value = offsetof(struct rk3128_cru,
-						    cru_glb_srst_fst_value);
-		priv->glb_srst_snd_value = offsetof(struct rk3128_cru,
-						    cru_glb_srst_snd_value);
-		sys_child->priv = priv;
-	}
-
-	offset = offsetof(struct rk3128_cru, cru_softrst_con[0]);
-	ret = rockchip_reset_bind(dev, offset, 9);
-	if (ret)
-		debug("Warning: software reset driver bind faile\n");
-
-	return 0;
-}
-
-static const struct udevice_id rk3128_clk_ids[] = {
-	{ .compatible = "rockchip,rk3128-cru" },
-	{ .compatible = "rockchip,rk3126-cru" },
-	{ }
-};
-
-U_BOOT_DRIVER(rockchip_rk3128_cru) = {
-	.name		= "clk_rk3128",
-	.id		= UCLASS_CLK,
-	.of_match	= rk3128_clk_ids,
-	.priv_auto_alloc_size = sizeof(struct rk3128_clk_priv),
-	.ops		= &rk3128_clk_ops,
-	.bind		= rk3128_clk_bind,
-	.probe		= rk3128_clk_probe,
-};

commit 5ecf0ee53bba61db0a04402e4bb83e991658ffd0
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Dec 14 12:22:58 2017 +0800

    disk: part: use common api to lookup part driver
    
    Do not need to scan disk every time when we get part info
    by name.
    
    Change-Id: Id79a3a9065731815567055329a2f7f80b3c8c9d4
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/disk/part.c b/disk/part.c
index b007138600..96c2858ac9 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -638,26 +638,23 @@ cleanup:
 int part_get_info_by_name(struct blk_desc *dev_desc, const char *name,
 	disk_partition_t *info)
 {
-	struct part_driver *first_drv =
-		ll_entry_start(struct part_driver, part_driver);
-	const int n_drvs = ll_entry_count(struct part_driver, part_driver);
 	struct part_driver *part_drv;
+	int ret;
+	int i;
 
-	for (part_drv = first_drv; part_drv != first_drv + n_drvs; part_drv++) {
-		int ret;
-		int i;
-		for (i = 1; i < part_drv->max_entries; i++) {
-			ret = part_drv->get_info(dev_desc, i, info);
-			if (ret != 0) {
-				/* no more entries in table */
-				break;
-			}
-			if (strcmp(name, (const char *)info->name) == 0) {
-				/* matched */
-				return i;
-			}
+	part_drv = part_driver_lookup_type(dev_desc);
+	for (i = 1; i < part_drv->max_entries; i++) {
+		ret = part_drv->get_info(dev_desc, i, info);
+		if (ret != 0) {
+			/* no more entries in table */
+			break;
+		}
+		if (strcmp(name, (const char *)info->name) == 0) {
+			/* matched */
+			return i;
 		}
 	}
+
 	return -1;
 }
 

commit 067b22ddca2a4f0942c75a6d5e8748061887ad93
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Dec 14 14:24:31 2017 +0800

    disk: part: scan the disk if the part_type is unknow
    
    We can get the new part table when we write a new partition table to
    a blank disk with this patch, or else we have to reset the board
    to get new partition table.
    
    Change-Id: If6688149a4a3ae9d6f5731757a1b5831494a9152
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/disk/part.c b/disk/part.c
index c04e91af20..b007138600 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -24,16 +24,28 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 #ifdef HAVE_BLOCK_DEVICE
-static struct part_driver *part_driver_lookup_type(int part_type)
+static struct part_driver *part_driver_lookup_type(struct blk_desc *dev_desc)
 {
 	struct part_driver *drv =
 		ll_entry_start(struct part_driver, part_driver);
 	const int n_ents = ll_entry_count(struct part_driver, part_driver);
 	struct part_driver *entry;
 
-	for (entry = drv; entry != drv + n_ents; entry++) {
-		if (part_type == entry->part_type)
-			return entry;
+	if (dev_desc->part_type == PART_TYPE_UNKNOWN) {
+		for (entry = drv; entry != drv + n_ents; entry++) {
+			int ret;
+
+			ret = entry->test(dev_desc);
+			if (!ret) {
+				dev_desc->part_type = entry->part_type;
+				return entry;
+			}
+		}
+	} else {
+		for (entry = drv; entry != drv + n_ents; entry++) {
+			if (dev_desc->part_type == entry->part_type)
+				return entry;
+		}
 	}
 
 	/* Not found */
@@ -286,7 +298,7 @@ void part_print(struct blk_desc *dev_desc)
 {
 	struct part_driver *drv;
 
-	drv = part_driver_lookup_type(dev_desc->part_type);
+	drv = part_driver_lookup_type(dev_desc);
 	if (!drv) {
 		printf("## Unknown partition table type %x\n",
 		       dev_desc->part_type);
@@ -315,7 +327,7 @@ int part_get_info(struct blk_desc *dev_desc, int part,
 	info->type_guid[0] = 0;
 #endif
 
-	drv = part_driver_lookup_type(dev_desc->part_type);
+	drv = part_driver_lookup_type(dev_desc);
 	if (!drv) {
 		debug("## Unknown partition table type %x\n",
 		      dev_desc->part_type);

commit 1a3726ad9146f508bfaae6ce2b4e199829e7279d
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Dec 14 10:52:54 2017 +0800

    rockchip: boot_rkimg: fix wrong size for bootloader_message
    
    size in byte for malloc, and in block/512bytes for blk read.
    
    Change-Id: I0534a13838ff00452d9ca472d7caea03502cc058
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index d03e4315e1..f146a3e630 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -158,7 +158,8 @@ int rockchip_get_boot_mode(void)
 	struct blk_desc *dev_desc;
 	disk_partition_t part_info;
 	struct bootloader_message *bmsg;
-	int size = DIV_ROUND_UP(sizeof(struct bootloader_message), RK_BLK_SIZE);
+	int size = DIV_ROUND_UP(sizeof(struct bootloader_message), RK_BLK_SIZE)
+		   * RK_BLK_SIZE;
 	int ret;
 
 	if (boot_mode != -1)
@@ -173,7 +174,7 @@ int rockchip_get_boot_mode(void)
 	bmsg = memalign(ARCH_DMA_MINALIGN, size);
 	ret = blk_dread(dev_desc,
 			part_info.start + BOOTLOADER_MESSAGE_BLK_OFFSET,
-			size, bmsg);
+			size >> 9, bmsg);
 	if (ret < 0)
 		goto err;
 

commit b7c7eca21dd935db5981d3c7428f5c70b8ecd73d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Dec 7 16:47:56 2017 +0800

    make.sh: guide user how to obtain rkbin Responsity
    
    Change-Id: I74f6902da21cf0ea50298653fc029c410b0771bb
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index a5010a82e1..57f292daf1 100755
--- a/make.sh
+++ b/make.sh
@@ -33,7 +33,11 @@ pack_images()
 	if [ -d ${dst} ]; then
 		path=$(cd `dirname ${dst}`; pwd)
 	else
-		echo "Can't find '../rkbin/' or '../rkbin/tools/' Responsity, please download it before pack image!"
+		echo "\nCan't find '../rkbin/' or '../rkbin/tools/' Responsity, please download it before pack image!"
+		echo "How to obtain, 3 ways:"
+		echo "	1. Login your gerrit account: \"Projects\" -> \"List\" -> search rkbin Responsity"
+		echo "	2. Github Responsity: https://github.com/rockchip-linux/rkbin"
+		echo "	3. Download full release SDK Responsity\n"
 		exit 1
 	fi
 

commit 882c725118e0691f787d4b8c11ce9a7f10ebe608
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Dec 7 16:02:43 2017 +0800

    rockchip: add CRC32 image verify driver
    
    This CRC32 driver is from: remotes/origin/rkdevelop.
    RK format images is packed by mkknlimg tool, it adds the
    CRC32 checksum which is not standard into image header,
    so this CRC32 function is only used for rockchip platforms.
    
    Change-Id: Ia52c6efa9dede148b1cb448691380f2d3184cd5e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rockchip_crc.h b/arch/arm/include/asm/arch-rockchip/rockchip_crc.h
new file mode 100644
index 0000000000..c017394d12
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/rockchip_crc.h
@@ -0,0 +1,12 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __ROCKCHIP_CRC_H_
+#define __ROCKCHIP_CRC_H_
+
+u32 rockchip_crc_verify(unsigned char *data, u32 size);
+
+#endif
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 68675a89f8..cb80f26ac3 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -312,6 +312,12 @@ config ROCKCHIP_VENDOR_PARTITION
 	  This enable support to read/write vendor configuration data from/to
 	  this partition.
 
+config ROCKCHIP_CRC
+	bool "Rockchip CRC verify images"
+	help
+	  This enable support Rockchip CRC verify images. It takes a lot of time,
+	  so it is better only used for debug.
+
 config ROCKCHIP_SMCCC
 	bool "Rockchip SMCCC"
 	default y if ARM_SMCCC
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 2ef209a3ca..4ea4ff43ff 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -31,6 +31,7 @@ ifneq ($(CONFIG_ROCKCHIP_BOOT_MODE_REG),0)
 obj-y += boot_mode.o
 endif
 
+obj-$(CONFIG_ROCKCHIP_CRC) += rockchip_crc.o
 obj-$(CONFIG_ROCKCHIP_SMCCC) += rockchip_smccc.o
 obj-$(CONFIG_ROCKCHIP_VENDOR_PARTITION) += vendor.o
 obj-$(CONFIG_ROCKCHIP_RESOURCE_IMAGE) += resource_img.o
diff --git a/arch/arm/mach-rockchip/rockchip_crc.c b/arch/arm/mach-rockchip/rockchip_crc.c
new file mode 100644
index 0000000000..61ddbfb8d2
--- /dev/null
+++ b/arch/arm/mach-rockchip/rockchip_crc.c
@@ -0,0 +1,119 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/arch/rockchip_crc.h>
+
+#define tole(x) cpu_to_le32(x)
+
+/* Table of CRC-32's of all single-byte values (made by make_crc_table) */
+static const uint32_t crc_table[256] = {
+	tole(0x00000000L), tole(0x04c10db7L), tole(0x09821b6eL), tole(0x0d4316d9L),
+	tole(0x130436dcL), tole(0x17c53b6bL), tole(0x1a862db2L), tole(0x1e472005L),
+	tole(0x26086db8L), tole(0x22c9600fL), tole(0x2f8a76d6L), tole(0x2b4b7b61L),
+	tole(0x350c5b64L), tole(0x31cd56d3L), tole(0x3c8e400aL), tole(0x384f4dbdL),
+	tole(0x4c10db70L), tole(0x48d1d6c7L), tole(0x4592c01eL), tole(0x4153cda9L),
+	tole(0x5f14edacL), tole(0x5bd5e01bL), tole(0x5696f6c2L), tole(0x5257fb75L),
+	tole(0x6a18b6c8L), tole(0x6ed9bb7fL), tole(0x639aada6L), tole(0x675ba011L),
+	tole(0x791c8014L), tole(0x7ddd8da3L), tole(0x709e9b7aL), tole(0x745f96cdL),
+	tole(0x9821b6e0L), tole(0x9ce0bb57L), tole(0x91a3ad8eL), tole(0x9562a039L),
+	tole(0x8b25803cL), tole(0x8fe48d8bL), tole(0x82a79b52L), tole(0x866696e5L),
+	tole(0xbe29db58L), tole(0xbae8d6efL), tole(0xb7abc036L), tole(0xb36acd81L),
+	tole(0xad2ded84L), tole(0xa9ece033L), tole(0xa4aff6eaL), tole(0xa06efb5dL),
+	tole(0xd4316d90L), tole(0xd0f06027L), tole(0xddb376feL), tole(0xd9727b49L),
+	tole(0xc7355b4cL), tole(0xc3f456fbL), tole(0xceb74022L), tole(0xca764d95L),
+	tole(0xf2390028L), tole(0xf6f80d9fL), tole(0xfbbb1b46L), tole(0xff7a16f1L),
+	tole(0xe13d36f4L), tole(0xe5fc3b43L), tole(0xe8bf2d9aL), tole(0xec7e202dL),
+	tole(0x34826077L), tole(0x30436dc0L), tole(0x3d007b19L), tole(0x39c176aeL),
+	tole(0x278656abL), tole(0x23475b1cL), tole(0x2e044dc5L), tole(0x2ac54072L),
+	tole(0x128a0dcfL), tole(0x164b0078L), tole(0x1b0816a1L), tole(0x1fc91b16L),
+	tole(0x018e3b13L), tole(0x054f36a4L), tole(0x080c207dL), tole(0x0ccd2dcaL),
+	tole(0x7892bb07L), tole(0x7c53b6b0L), tole(0x7110a069L), tole(0x75d1addeL),
+	tole(0x6b968ddbL), tole(0x6f57806cL), tole(0x621496b5L), tole(0x66d59b02L),
+	tole(0x5e9ad6bfL), tole(0x5a5bdb08L), tole(0x5718cdd1L), tole(0x53d9c066L),
+	tole(0x4d9ee063L), tole(0x495fedd4L), tole(0x441cfb0dL), tole(0x40ddf6baL),
+	tole(0xaca3d697L), tole(0xa862db20L), tole(0xa521cdf9L), tole(0xa1e0c04eL),
+	tole(0xbfa7e04bL), tole(0xbb66edfcL), tole(0xb625fb25L), tole(0xb2e4f692L),
+	tole(0x8aabbb2fL), tole(0x8e6ab698L), tole(0x8329a041L), tole(0x87e8adf6L),
+	tole(0x99af8df3L), tole(0x9d6e8044L), tole(0x902d969dL), tole(0x94ec9b2aL),
+	tole(0xe0b30de7L), tole(0xe4720050L), tole(0xe9311689L), tole(0xedf01b3eL),
+	tole(0xf3b73b3bL), tole(0xf776368cL), tole(0xfa352055L), tole(0xfef42de2L),
+	tole(0xc6bb605fL), tole(0xc27a6de8L), tole(0xcf397b31L), tole(0xcbf87686L),
+	tole(0xd5bf5683L), tole(0xd17e5b34L), tole(0xdc3d4dedL), tole(0xd8fc405aL),
+	tole(0x6904c0eeL), tole(0x6dc5cd59L), tole(0x6086db80L), tole(0x6447d637L),
+	tole(0x7a00f632L), tole(0x7ec1fb85L), tole(0x7382ed5cL), tole(0x7743e0ebL),
+	tole(0x4f0cad56L), tole(0x4bcda0e1L), tole(0x468eb638L), tole(0x424fbb8fL),
+	tole(0x5c089b8aL), tole(0x58c9963dL), tole(0x558a80e4L), tole(0x514b8d53L),
+	tole(0x25141b9eL), tole(0x21d51629L), tole(0x2c9600f0L), tole(0x28570d47L),
+	tole(0x36102d42L), tole(0x32d120f5L), tole(0x3f92362cL), tole(0x3b533b9bL),
+	tole(0x031c7626L), tole(0x07dd7b91L), tole(0x0a9e6d48L), tole(0x0e5f60ffL),
+	tole(0x101840faL), tole(0x14d94d4dL), tole(0x199a5b94L), tole(0x1d5b5623L),
+	tole(0xf125760eL), tole(0xf5e47bb9L), tole(0xf8a76d60L), tole(0xfc6660d7L),
+	tole(0xe22140d2L), tole(0xe6e04d65L), tole(0xeba35bbcL), tole(0xef62560bL),
+	tole(0xd72d1bb6L), tole(0xd3ec1601L), tole(0xdeaf00d8L), tole(0xda6e0d6fL),
+	tole(0xc4292d6aL), tole(0xc0e820ddL), tole(0xcdab3604L), tole(0xc96a3bb3L),
+	tole(0xbd35ad7eL), tole(0xb9f4a0c9L), tole(0xb4b7b610L), tole(0xb076bba7L),
+	tole(0xae319ba2L), tole(0xaaf09615L), tole(0xa7b380ccL), tole(0xa3728d7bL),
+	tole(0x9b3dc0c6L), tole(0x9ffccd71L), tole(0x92bfdba8L), tole(0x967ed61fL),
+	tole(0x8839f61aL), tole(0x8cf8fbadL), tole(0x81bbed74L), tole(0x857ae0c3L),
+	tole(0x5d86a099L), tole(0x5947ad2eL), tole(0x5404bbf7L), tole(0x50c5b640L),
+	tole(0x4e829645L), tole(0x4a439bf2L), tole(0x47008d2bL), tole(0x43c1809cL),
+	tole(0x7b8ecd21L), tole(0x7f4fc096L), tole(0x720cd64fL), tole(0x76cddbf8L),
+	tole(0x688afbfdL), tole(0x6c4bf64aL), tole(0x6108e093L), tole(0x65c9ed24L),
+	tole(0x11967be9L), tole(0x1557765eL), tole(0x18146087L), tole(0x1cd56d30L),
+	tole(0x02924d35L), tole(0x06534082L), tole(0x0b10565bL), tole(0x0fd15becL),
+	tole(0x379e1651L), tole(0x335f1be6L), tole(0x3e1c0d3fL), tole(0x3add0088L),
+	tole(0x249a208dL), tole(0x205b2d3aL), tole(0x2d183be3L), tole(0x29d93654L),
+	tole(0xc5a71679L), tole(0xc1661bceL), tole(0xcc250d17L), tole(0xc8e400a0L),
+	tole(0xd6a320a5L), tole(0xd2622d12L), tole(0xdf213bcbL), tole(0xdbe0367cL),
+	tole(0xe3af7bc1L), tole(0xe76e7676L), tole(0xea2d60afL), tole(0xeeec6d18L),
+	tole(0xf0ab4d1dL), tole(0xf46a40aaL), tole(0xf9295673L), tole(0xfde85bc4L),
+	tole(0x89b7cd09L), tole(0x8d76c0beL), tole(0x8035d667L), tole(0x84f4dbd0L),
+	tole(0x9ab3fbd5L), tole(0x9e72f662L), tole(0x9331e0bbL), tole(0x97f0ed0cL),
+	tole(0xafbfa0b1L), tole(0xab7ead06L), tole(0xa63dbbdfL), tole(0xa2fcb668L),
+	tole(0xbcbb966dL), tole(0xb87a9bdaL), tole(0xb5398d03L), tole(0xb1f880b4L)
+};
+
+#define DO_CRC(x) crc = tab[((crc >> 24) ^ (x)) & 255] ^ (crc << 8)
+
+static uint32_t crc32_rk(uint32_t crc, const unsigned char *s, uint32_t len)
+{
+	const uint32_t *tab;
+
+	tab = crc_table;
+	crc = cpu_to_le32(crc);
+
+	do {
+		DO_CRC(*s++);
+	} while (--len);
+
+	return le32_to_cpu(crc);
+}
+
+#undef DO_CRC
+
+u32 rockchip_crc_verify(unsigned char *data, u32 size)
+{
+	u32 crc_check = 0, crc_calc = 0;
+	int i = 0;
+
+	if (size <= 4)
+		return 0;
+
+	size -= 4;
+	for (i = 3; i >= 0; i--)
+		crc_check = (crc_check << 8) + (*(data + size + i));
+
+	crc_calc = crc32_rk(0, data, size);
+
+	debug("%s: crc_check=0x%x, crc_calc=0x%x\n",
+	      __func__, crc_check, crc_calc);
+
+	if (crc_calc == crc_check)
+		return crc_check;
+
+	return 0;
+}

commit 5059d297b0c0091c93398c39d56d3bdaa88b318e
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Dec 8 17:49:34 2017 +0800

    rockchip: config: add a bootcmd for rkimg
    
    Try emmc first, and then nand;
    Try boot_android first, and then bootrkp;
    
    Change-Id: I21ae59bbfe420adc66409766aca05d44db7e19aa
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/evb_rk3128.h b/include/configs/evb_rk3128.h
index 69e300605f..56ea754554 100644
--- a/include/configs/evb_rk3128.h
+++ b/include/configs/evb_rk3128.h
@@ -20,4 +20,7 @@
 		"stdout=serial,vidconsole\0" \
 		"stderr=serial,vidconsole\0"
 
+#undef CONFIG_BOOTCOMMAND
+#define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
+
 #endif
diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index 082dd1d43b..5b3fdb5ddb 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -61,6 +61,12 @@
 	"name=security,size=2M,uuid=${uuid_gpt_security};" \
 	"name=userdata,size=-,uuid=${uuid_gpt_userdata};"
 
+#define RKIMG_BOOTCOMMAND \
+	"if mmc dev 0; then setenv devtype mmc; setenv devnum 0;" \
+	"else if rknand dev 0; then setenv devtype mmc; setenv devnum 0; fi;" \
+	"fi; boot_android ${devtype} ${devnum};" \
+	"bootrkp;"
+
 #endif
 
 /*

commit 3c186af272c70be971f6669ce67ff1c9f93b8f37
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Dec 8 16:19:47 2017 +0800

    rockchip: rk3229: config: updpate block api to rkimg api
    
    Change-Id: Ic73e266835f17509d7a45af589dd11d2df79fc14
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index c124cd7b94..32c52ca461 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -10,7 +10,7 @@ CONFIG_TPL_MAX_SIZE=28672
 CONFIG_TPL_STACK=0x10088000
 CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
-CONFIG_ROCKCHIP_BLOCK_API=y
+CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_TARGET_EVB_RK3229=y
 CONFIG_SPL_STACK_R_ADDR=0x60600000
diff --git a/configs/gva-rk3229_defconfig b/configs/gva-rk3229_defconfig
index b036fa784e..f8a58e86df 100644
--- a/configs/gva-rk3229_defconfig
+++ b/configs/gva-rk3229_defconfig
@@ -10,7 +10,7 @@ CONFIG_TPL_MAX_SIZE=28672
 CONFIG_TPL_STACK=0x10088000
 CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
-CONFIG_ROCKCHIP_BLOCK_API=y
+CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_TARGET_GVA_RK3229=y
 CONFIG_SPL_STACK_R_ADDR=0x60600000

commit 6442f219ba8b20e38565d205151e8caa369aeb5b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Dec 8 16:18:30 2017 +0800

    rockchip: clk: rk322x: update assert for periph hclk/pclk
    
    This is a fix to:
    f04b6e2 rockchip: rk322x: fix pd_bus hclk/pclk
    
    Change-Id: Ia57554a8f09e44b576c59c60273247dd7fcef10d
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c
index ce7d62a0e4..bc9055ee63 100644
--- a/drivers/clk/rockchip/clk_rk322x.c
+++ b/drivers/clk/rockchip/clk_rk322x.c
@@ -124,10 +124,8 @@ static void rkclk_init(struct rk322x_cru *cru)
 	assert((aclk_div + 1) * BUS_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
 
 	pclk_div = BUS_ACLK_HZ / BUS_PCLK_HZ - 1;
-	assert((pclk_div + 1) * BUS_PCLK_HZ == GPLL_HZ && pclk_div <= 0x7);
 
 	hclk_div = BUS_ACLK_HZ / BUS_HCLK_HZ - 1;
-	assert((hclk_div + 1) * BUS_HCLK_HZ == GPLL_HZ && hclk_div <= 0x3);
 
 	rk_clrsetreg(&cru->cru_clksel_con[0],
 		     BUS_ACLK_PLL_SEL_MASK | BUS_ACLK_DIV_MASK,

commit f54f0bc2eec914f0cec058beda1ed623068052f2
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Dec 8 16:14:47 2017 +0800

    rockchip: rk3036: clk: update periph hclk/pclk
    
    periph hclk/pclk parent is aclk, not gpll.
    
    Change-Id: Ic59abb7964f5efd627f9b76c13643e2b83af6e96
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3036.c b/drivers/clk/rockchip/clk_rk3036.c
index 32b250f97c..761f032d81 100644
--- a/drivers/clk/rockchip/clk_rk3036.c
+++ b/drivers/clk/rockchip/clk_rk3036.c
@@ -116,17 +116,17 @@ static void rkclk_init(struct rk3036_cru *cru)
 		     pclk_div << CORE_PERI_DIV_SHIFT);
 
 	/*
-	 * select apll as pd_bus bus clock source and
+	 * select gpll as pd_bus bus clock source and
 	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
 	 */
 	aclk_div = GPLL_HZ / BUS_ACLK_HZ - 1;
 	assert((aclk_div + 1) * BUS_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
 
-	pclk_div = GPLL_HZ / BUS_PCLK_HZ - 1;
-	assert((pclk_div + 1) * BUS_PCLK_HZ == GPLL_HZ && pclk_div <= 0x7);
+	pclk_div = BUS_ACLK_HZ / BUS_PCLK_HZ - 1;
+	assert((pclk_div + 1) * BUS_PCLK_HZ == BUS_ACLK_HZ && pclk_div <= 0x7);
 
-	hclk_div = GPLL_HZ / BUS_HCLK_HZ - 1;
-	assert((hclk_div + 1) * BUS_HCLK_HZ == GPLL_HZ && hclk_div <= 0x3);
+	hclk_div = BUS_ACLK_HZ / BUS_HCLK_HZ - 1;
+	assert((hclk_div + 1) * BUS_HCLK_HZ == BUS_ACLK_HZ && hclk_div <= 0x3);
 
 	rk_clrsetreg(&cru->cru_clksel_con[0],
 		     BUS_ACLK_PLL_SEL_MASK | BUS_ACLK_DIV_MASK,

commit b5381a6c8c317b6d23b5117358f02799fef14f2f
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Dec 8 11:56:54 2017 +0800

    rockchip: config: add a default partition table for rkimg
    
    Rockchip use it's own partition table for product like android.
    
    Change-Id: I1c46c7aebd07ff0b433c4ebeba97673983297205
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index a6a6096341..082dd1d43b 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -42,6 +42,25 @@
 	"name=boot,size=112M,bootable,uuid=${uuid_gpt_boot};" \
 	"name=rootfs,size=-,uuid="ROOT_UUID
 
+#define PARTS_RKIMG \
+	"uuid_disk=${uuid_gpt_disk};" \
+	"name=uboot,start=8MB,size=4MB,uuid=${uuid_gpt_loader2};" \
+	"name=trust,size=4M,uuid=${uuid_gpt_atf};" \
+	"name=misc,size=4MB,uuid=${uuid_gpt_misc};" \
+	"name=resource,size=16MB,uuid=${uuid_gpt_resource};" \
+	"name=kernel,size=32M,uuid=${uuid_gpt_kernel};" \
+	"name=boot,size=32M,bootable,uuid=${uuid_gpt_boot};" \
+	"name=recovery,size=32M,uuid=${uuid_gpt_recovery};" \
+	"name=backup,size=112M,uuid=${uuid_gpt_backup};" \
+	"name=cache,size=512M,uuid=${uuid_gpt_cache};" \
+	"name=system,size=2048M,uuid=${uuid_gpt_system};" \
+	"name=metadata,size=16M,uuid=${uuid_gpt_metadata};" \
+	"name=vendor,size=32M,uuid=${uuid_gpt_vendor};" \
+	"name=oem,size=32M,uuid=${uuid_gpt_oem};" \
+	"name=frp,size=512K,uuid=${uuid_gpt_frp};" \
+	"name=security,size=2M,uuid=${uuid_gpt_security};" \
+	"name=userdata,size=-,uuid=${uuid_gpt_userdata};"
+
 #endif
 
 /*

commit c446d7743f79994ca33bf4f55290c3933fa8f18b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Dec 8 11:18:22 2017 +0800

    rockchip: rk312x-config: update config with new api
    
    Change-Id: Id912e2a63e57fe82dffdd678fa9574f08e18bd30
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/bnd-d708-rk3126_defconfig b/configs/bnd-d708-rk3126_defconfig
index ab1756c172..1059dc5f59 100644
--- a/configs/bnd-d708-rk3126_defconfig
+++ b/configs/bnd-d708-rk3126_defconfig
@@ -2,10 +2,10 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_ROCKCHIP_RK3128=y
 CONFIG_ROCKCHIP_RK3126=y
-CONFIG_ROCKCHIP_BLOCK_API=y
-CONFIG_ROCKCHIP_PARAM=y
 CONFIG_ROCKCHIP_RESOURCE_IMAGE=y
-CONFIG_ROCKCHIP_PARTITION_BOOT=y
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_RKPARM_PARTITION=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3126-bnd-d708"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
diff --git a/configs/evb-rk3126_defconfig b/configs/evb-rk3126_defconfig
index 7d8120860b..8c55012136 100644
--- a/configs/evb-rk3126_defconfig
+++ b/configs/evb-rk3126_defconfig
@@ -2,14 +2,15 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_ROCKCHIP_RK3128=y
 CONFIG_ROCKCHIP_RK3126=y
-CONFIG_ROCKCHIP_BLOCK_API=y
-CONFIG_ROCKCHIP_PARAM=y
 CONFIG_ROCKCHIP_RESOURCE_IMAGE=y
-CONFIG_ROCKCHIP_PARTITION_BOOT=y
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_RKPARM_PARTITION=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3126-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_FASTBOOT=y
 CONFIG_USB_FUNCTION_FASTBOOT=y
 CONFIG_CMD_FASTBOOT=y
@@ -19,6 +20,8 @@ CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y

commit ab03cc9f18441ad8569825369916e3dd8b720c53
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Nov 29 17:59:14 2017 +0800

    rockchip: remove blk and parameter
    
    We use blk_desc instead of interface from BLOCK_API, and move parameter
    into disk/ as a standard partition format.
    
    Change-Id: I6923ef1c23fa6ba1d614dfca079599e87c123ccc
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/bootrkp.h b/arch/arm/include/asm/arch-rockchip/bootrkp.h
deleted file mode 100644
index f1110ac06d..0000000000
--- a/arch/arm/include/asm/arch-rockchip/bootrkp.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#ifndef __BOOTRKP_H_
-#define __BOOTRKP_H_
-
-enum android_boot_mode {
-	ANDROID_BOOT_MODE_NORMAL = 0,
-
-	/* "recovery" mode is triggered by the "reboot recovery" command or
-	 * equivalent adb/fastboot command. It can also be triggered by writing
-	 * "boot-recovery" in the BCB message. This mode should boot the
-	 * recovery kernel.
-	 */
-	ANDROID_BOOT_MODE_RECOVERY,
-
-	/* "bootloader" mode is triggered by the "reboot bootloader" command or
-	 * equivalent adb/fastboot command. It can also be triggered by writing
-	 * "bootonce-bootloader" in the BCB message. This mode should boot into
-	 * fastboot.
-	 */
-	ANDROID_BOOT_MODE_BOOTLOADER,
-};
-
-int rockchip_get_boot_mode(void);
-
-#endif
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 7f59383b41..68675a89f8 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -298,19 +298,6 @@ config RKIMG_BOOTLOADER
 	  with dtb and uboot/kernel logo bmp, vendor storage for custom info
 	  like SN and MAC address.
 
-config ROCKCHIP_BLOCK_API
-	bool "Rockchip block device api support"
-	help
-	  This enable read access to block device on
-	  rockchip platform.
-
-config ROCKCHIP_PARAM
-	bool "Rockchip parameter support"
-	depends on ROCKCHIP_BLOCK_API
-	help
-	  This enable support to get partition from rockchip
-	  parameter
-
 config ROCKCHIP_RESOURCE_IMAGE
 	bool "Enable support for rockchip resource image"
 	depends on RKIMG_BOOTLOADER
@@ -318,12 +305,6 @@ config ROCKCHIP_RESOURCE_IMAGE
 	  This enables support to get dtb or logo files from
 	  rockchip resource image format partition.
 
-config ROCKCHIP_PARTITION_BOOT
-	bool "Enable support for booting system from rockchip format partition"
-	depends on ROCKCHIP_RESOURCE_IMAGE
-	help
-	  This enables support for bootimg system from rockchip format partition
-
 config ROCKCHIP_VENDOR_PARTITION
 	bool "Rockchip vendor storage partition support"
 	depends on RKIMG_BOOTLOADER
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index b58aa37620..2ef209a3ca 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -32,12 +32,8 @@ obj-y += boot_mode.o
 endif
 
 obj-$(CONFIG_ROCKCHIP_SMCCC) += rockchip_smccc.o
-
-obj-$(CONFIG_ROCKCHIP_BLOCK_API) += blk.o
 obj-$(CONFIG_ROCKCHIP_VENDOR_PARTITION) += vendor.o
-obj-$(CONFIG_ROCKCHIP_PARAM) += rockchip_parameter.o
 obj-$(CONFIG_ROCKCHIP_RESOURCE_IMAGE) += resource_img.o
-obj-$(CONFIG_ROCKCHIP_PARTITION_BOOT) += bootrkp.o
 obj-$(CONFIG_ROCKCHIP_RK3066) += rk3066-board.o
 obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board.o
 obj-$(CONFIG_ROCKCHIP_RK3128) += rk3128-board.o
diff --git a/arch/arm/mach-rockchip/blk.c b/arch/arm/mach-rockchip/blk.c
deleted file mode 100644
index f231287f17..0000000000
--- a/arch/arm/mach-rockchip/blk.c
+++ /dev/null
@@ -1,207 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <blk.h>
-#include <dm.h>
-#include <mmc.h>
-#include <rknand.h>
-#include <spi.h>
-#include <spi_flash.h>
-#include "rockchip_blk.h"
-
-struct blkdev {
-	int if_type;
-	int devnum;
-	ulong (*write)(struct blkdev *blkdev, lbaint_t start, lbaint_t blkcnt, const void *buffer);
-	ulong (*read)(struct blkdev *blkdev, lbaint_t start, lbaint_t blkcnt, void *buffer);
-	void *priv;
-};
-
-static struct blkdev *blkdev;
-
-struct mmc *mmcblk_dev_init(int dev)
-{
-	struct mmc *mmcdev;
-
-	mmcdev = find_mmc_device(dev);
-	if (!mmcdev) {
-		printf("no mmc device at slot %x\n", dev);
-		return NULL;
-	}
-
-	if (mmc_init(mmcdev))
-		return NULL;
-
-	return mmcdev;
-}
-
-static struct spi_flash *spi_flash_init(int dev)
-{
-	struct spi_flash *flash;
-	struct udevice *udev;
-	int ret;
-
-	ret = spi_flash_probe_bus_cs(0, 0, 0, 0, &udev);
-	if (ret) {
-		printf("Failed to initialize SPI flash(error %d)\n", ret);
-		return NULL;
-	}
-
-	flash = dev_get_uclass_priv(udev);
-
-	return flash;
-}
-
-ulong blk_read(struct blkdev* blkdev, lbaint_t start, lbaint_t blkcnt, void *buffer)
-{
-	struct blk_desc *desc;
-	const char *if_name;
-	ulong n;
-
-	if_name = blk_get_if_type_name(blkdev->if_type);
-	desc = blk_get_dev(if_name, blkdev->devnum);
-	n = blk_dread(desc, start, blkcnt, buffer);
-
-	return n == blkcnt ? 0 : 1;
-}
-
-ulong blk_write(struct blkdev *blkdev, lbaint_t start, lbaint_t blkcnt, const void *buffer)
-{
-	struct blk_desc *desc;
-	const char *if_name;
-	ulong n;
-
-	if_name = blk_get_if_type_name(blkdev->if_type);
-	desc = blk_get_dev(if_name, blkdev->devnum);
-	n = blk_dwrite(desc, start, blkcnt, buffer);
-
-	return n == blkcnt ? 0 : 1;
-}
-
-ulong sf_read(struct blkdev *blkdev, lbaint_t start, lbaint_t blkcnt, void *buffer)
-{
-	struct spi_flash *flash = (struct spi_flash *)blkdev->priv;
-	u32 offset = start << 9;
-	size_t len = blkcnt << 9;
-
-	return spi_flash_read(flash, offset, len, buffer);
-}
-
-ulong sf_write(struct blkdev *blkdev, lbaint_t start, lbaint_t blkcnt, const void *buffer)
-{
-	struct spi_flash *flash = (struct spi_flash *)blkdev->priv;
-	u32 offset = start << 9;
-	size_t len = blkcnt << 9;
-
-	return spi_flash_write(flash, offset, len, buffer);
-}
-
-static int get_bootdev_if_type(int dev)
-{
-	int if_type;
-
-	switch (dev) {
-	case BOOT_FROM_EMMC:
-		if_type = IF_TYPE_MMC;
-		break;
-	case BOOT_FROM_FLASH:
-		if_type = IF_TYPE_RKNAND;
-		break;
-	default:
-		if_type = dev;
-		break;
-	}
-
-	return if_type;
-}
-
-static struct blkdev *blkdev_init(void)
-{
-	struct blkdev *blkdev;
-	int dev;
-	int if_type;
-	void *priv;
-
-
-	dev = get_bootdev_type();
-	if_type = get_bootdev_if_type(dev);
-
-	if (if_type == IF_TYPE_MMC) {
-		priv = mmcblk_dev_init(0);
-	} else if (if_type == IF_TYPE_RKNAND) {
-		priv = (void *)rknand_scan_namespace();
-	} else if (if_type == BOOT_FROM_SPI_NOR) {
-		priv = spi_flash_init(0);
-	}
-
-	blkdev = malloc(sizeof(*blkdev));
-	if (!blkdev) {
-		printf("out of memory for blkdev\n");
-		return NULL;
-	}
-
-	blkdev->if_type = if_type;
-	blkdev->devnum = 0;
-	blkdev ->priv = priv;
-	if ((if_type == IF_TYPE_MMC) || (if_type == IF_TYPE_RKNAND)) {
-		blkdev->read = blk_read;
-		blkdev->write = blk_write;
-	} else if (if_type == BOOT_FROM_SPI_NOR) {
-		blkdev->read = sf_read;
-		blkdev->write = sf_write;
-	}
-
-	return blkdev;
-}
-
-int blkdev_read(void *buffer, u32 blk, u32 cnt)
-{
-	if (!blkdev) {
-		blkdev = blkdev_init();
-		if (!blkdev)
-			return -ENODEV;
-	}
-
-	return blkdev->read(blkdev, blk, cnt, buffer);
-}
-
-
-int blkdev_write(void *buffer, u32 blk, u32 cnt)
-{
-	if (!blkdev) {
-		blkdev = blkdev_init();
-		if (!blkdev)
-			return -ENODEV;
-	}
-
-	return blkdev->write(blkdev, blk, cnt, buffer);
-}
-
-/* Gets the storage type of the current device */
-int get_bootdev_type(void)
-{
-	int type = 0;
-
-	#ifdef CONFIG_EMMC_BOOT
-		type = BOOT_FROM_EMMC;
-	#endif /* CONFIG_EMMC_BOOT */
-	#ifdef CONFIG_QSPI_BOOT
-		type = BOOT_FROM_SPI_NAND;
-	#endif /* CONFIG_QSPI_BOOT */
-	#ifdef CONFIG_NAND_BOOT
-		type = BOOT_FROM_FLASH;
-	#endif /* CONFIG_NAND_BOOT */
-	#ifdef CONFIG_NOR_BOOT
-		type = BOOT_FROM_SPI_NOR;
-	#endif /* CONFIG_NOR_BOOT */
-
-	/* For current use(Only EMMC support!) */
-	if (!type)
-		type = BOOT_FROM_EMMC;
-
-	return type;
-}
diff --git a/arch/arm/mach-rockchip/bootrkp.c b/arch/arm/mach-rockchip/bootrkp.c
deleted file mode 100644
index 6840eb0a1b..0000000000
--- a/arch/arm/mach-rockchip/bootrkp.c
+++ /dev/null
@@ -1,233 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <bootm.h>
-#include <linux/list.h>
-#include <libfdt.h>
-#include <malloc.h>
-#include <asm/arch/bootrkp.h>
-#include <asm/arch/resource_img.h>
-#include "rockchip_parameter.h"
-#include "rockchip_blk.h"
-
-#define TAG_KERNEL			0x4C4E524B
-
-#define PART_MISC			"misc"
-#define PART_KERNEL			"kernel"
-#define PART_BOOT			"boot"
-#define PART_RECOVERY			"recovery"
-
-#define DTB_FILE			"rk-kernel.dtb"
-
-#define BOOTLOADER_MESSAGE_OFFSET_IN_MISC	(16 * 1024)
-#define BOOTLOADER_MESSAGE_BLK_OFFSET		(BOOTLOADER_MESSAGE_OFFSET_IN_MISC >> 9)
-
-struct bootloader_message {
-	char command[32];
-	char status[32];
-	char recovery[768];
-
-	/*
-         * The 'recovery' field used to be 1024 bytes.  It has only ever
-	 * been used to store the recovery command line, so 768 bytes
-	 * should be plenty.  We carve off the last 256 bytes to store the
-	 * stage string (for multistage packages) and possible future
-	 * expansion.
-         */
-	char stage[32];
-	char slot_suffix[32];
-	char reserved[192];
-};
-
-struct rockchip_image {
-	uint32_t tag;
-	uint32_t size;
-	int8_t image[1];
-	uint32_t crc;
-};
-
-#if !defined(CONFIG_ARM64)
-#ifdef CONFIG_LMB
-static void boot_start_lmb(bootm_headers_t *images)
-{
-	ulong		mem_start;
-	phys_size_t	mem_size;
-
-	lmb_init(&images->lmb);
-
-	mem_start = env_get_bootm_low();
-	mem_size = env_get_bootm_size();
-
-	lmb_add(&images->lmb, (phys_addr_t)mem_start, mem_size);
-
-	arch_lmb_reserve(&images->lmb);
-	board_lmb_reserve(&images->lmb);
-}
-#else
-static inline void boot_start_lmb(bootm_headers_t *images) { }
-#endif
-
-static void boot_lmb_init(bootm_headers_t *images)
-{
-	boot_start_lmb(images);
-	images->state = BOOTM_STATE_OS_GO;
-}
-#endif
-
-static int read_boot_mode_from_misc(struct blk_part *misc)
-{
-	struct bootloader_message *bmsg;
-	int size = DIV_ROUND_UP(sizeof(struct bootloader_message),
-				RK_BLK_SIZE) * RK_BLK_SIZE;
-	int ret = 0;
-
-	bmsg = memalign(ARCH_DMA_MINALIGN, size);
-	ret = blkdev_read(bmsg, misc->from + BOOTLOADER_MESSAGE_BLK_OFFSET,
-			  size >> 9);
-	if (ret < 0)
-		goto out;
-
-	if (!strcmp(bmsg->command, "boot-recovery")) {
-		printf("boot mode: recovery\n");
-		ret = ANDROID_BOOT_MODE_RECOVERY;
-	} else {
-		printf("boot mode: normal\n");
-		ret = ANDROID_BOOT_MODE_NORMAL;
-	}
-
-out:
-	free(bmsg);
-	return ret;
-}
-
-/*
- * non-OTA packaged kernel.img & boot.img
- * return the image size on success, and a
- * negative value on error.
- */
-static int read_rockchip_image(struct blk_part *part, void *dst)
-{
-	struct rockchip_image *img;
-	int header_len = 8;
-	int cnt;
-	int ret;
-
-	img = memalign(ARCH_DMA_MINALIGN, RK_BLK_SIZE);
-	if (!img) {
-		printf("out of memory\n");
-		return -ENOMEM;
-	}
-
-	/* read first block with header imformation */
-	ret = blkdev_read(img, part->from, 1);
-	if (ret < 0)
-		goto err;
-	if (img->tag != TAG_KERNEL) {
-		printf("%s: invalid image tag(0x%x)\n", part->name, img->tag);
-		ret = -ENODEV;
-		goto err;
-	}
-
-	memcpy(dst, img->image, RK_BLK_SIZE - header_len);
-	/*
-	 * read the rest blks
-	 * total size  = image size + 8 bytes header + 4 bytes crc32
-	 */
-	cnt = DIV_ROUND_UP(img->size + 8 + 4, RK_BLK_SIZE);
-	ret = blkdev_read(dst + RK_BLK_SIZE - header_len,
-			  part->from + 1, cnt - 1);
-	if (!ret)
-		ret = img->size;
-err:
-	free(img);
-	return ret;
-}
-
-int rockchip_get_boot_mode(void)
-{
-	struct blk_part *misc;
-	int boot_mode;
-
-	misc = rockchip_get_blk_part(PART_MISC);
-	if (misc)
-		boot_mode = read_boot_mode_from_misc(misc);
-	else
-		boot_mode = ANDROID_BOOT_MODE_RECOVERY;
-
-	return boot_mode;
-}
-
-static int do_bootrkp(cmd_tbl_t *cmdtp, int flag, int argc,
-		      char * const argv[])
-{
-	ulong fdt_addr_r = env_get_ulong("fdt_addr_r", 16, 0);
-	ulong ramdisk_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0);
-	ulong kernel_addr_r = env_get_ulong("kernel_addr_r", 16, 0x480000);
-	struct blk_part *boot;
-	struct blk_part *kernel;
-	ulong ramdisk_size;
-	ulong kernel_size;
-	ulong fdt_size;
-	int boot_mode;
-	int ret = 0;
-
-	boot_mode = rockchip_get_boot_mode();
-
-	if (boot_mode == ANDROID_BOOT_MODE_RECOVERY)
-		boot = rockchip_get_blk_part(PART_RECOVERY);
-	else
-		boot = rockchip_get_blk_part(PART_BOOT);
-	kernel = rockchip_get_blk_part(PART_KERNEL);
-
-	if (!kernel || !boot) {
-		ret = CMD_RET_FAILURE;
-		goto out;
-	}
-
-	kernel_size = read_rockchip_image(kernel, (void *)kernel_addr_r);
-	if (kernel_size < 0) {
-		ret = CMD_RET_FAILURE;
-		goto out;
-	}
-
-	ramdisk_size = read_rockchip_image(boot, (void *)ramdisk_addr_r);
-	if (ramdisk_size < 0) {
-		ret = CMD_RET_FAILURE;
-		goto out;
-	}
-
-	fdt_size = rockchip_read_resource_file((void *)fdt_addr_r, DTB_FILE, 0, 0);
-	if (fdt_size < 0) {
-		ret = CMD_RET_FAILURE;
-		goto out;
-	}
-
-	printf("kernel   @ 0x%08lx (0x%08lx)\n", kernel_addr_r, kernel_size);
-	printf("ramdisk  @ 0x%08lx (0x%08lx)\n", ramdisk_addr_r, ramdisk_size);
-#if defined(CONFIG_ARM64)
-	char cmdbuf[64];
-	sprintf(cmdbuf, "booti 0x%lx 0x%lx:0x%lx 0x%lx",
-		kernel_addr_r, ramdisk_addr_r, ramdisk_size, fdt_addr_r);
-	run_command(cmdbuf, 0);
-#else
-	boot_lmb_init(&images);
-	images.ep = kernel_addr_r;
-	images.initrd_start = ramdisk_addr_r;
-	images.initrd_end = ramdisk_addr_r + ramdisk_size;
-	images.ft_addr = (void *)fdt_addr_r;
-	images.ft_len = fdt_totalsize(fdt_addr_r);
-	do_bootm_linux(0, 0, NULL, &images);
-#endif
-out:
-	return ret;
-}
-
-U_BOOT_CMD(
-	bootrkp,  CONFIG_SYS_MAXARGS,     1,      do_bootrkp,
-	"boot Linux Image image from rockchip partition storage",
-	""
-);
diff --git a/arch/arm/mach-rockchip/rockchip_blk.h b/arch/arm/mach-rockchip/rockchip_blk.h
deleted file mode 100644
index f6040d0b7b..0000000000
--- a/arch/arm/mach-rockchip/rockchip_blk.h
+++ /dev/null
@@ -1,20 +0,0 @@
-#ifndef __RK_BLK_H_
-#define __RK_BLK_H_
-
-/*
- * boot device type define
- * 1:flash 2:emmc 4:sdcard0 8:sdcard1
- */
-#define BOOT_FROM_FLASH		(1 << 0)
-#define BOOT_FROM_EMMC		(1 << 1)
-#define BOOT_FROM_SD0		(1 << 2)
-#define BOOT_FROM_SD1		(1 << 3)
-#define BOOT_FROM_SPI_NOR	(1 << 4)
-#define BOOT_FROM_RAM		(1 << 5)
-#define BOOT_FROM_SPI_NAND	(1 << 6)
-
-int blkdev_read(void *buffer, u32 blk, u32 cnt);
-int blkdev_write(void *buffer, u32 blk, u32 cnt);
-int get_bootdev_type(void);
-
-#endif
diff --git a/arch/arm/mach-rockchip/rockchip_parameter.c b/arch/arm/mach-rockchip/rockchip_parameter.c
deleted file mode 100644
index afb6f8a8fa..0000000000
--- a/arch/arm/mach-rockchip/rockchip_parameter.c
+++ /dev/null
@@ -1,110 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <malloc.h>
-#include "rockchip_parameter.h"
-#include "rockchip_blk.h"
-
-#define MAX_PARAM_SIZE			(1024 * 64)
-
-struct rockchip_param {
-	u32 tag;
-	u32 length;
-	char params[1];
-	u32 crc;
-};
-
-static LIST_HEAD(parts_head);
-
-static int rockchip_param_parse(char *param)
-{
-	struct blk_part *part;
-	const char *cmdline = strstr(param, "CMDLINE:");
-	char *cmdline_end = strstr(cmdline, "\n"); /* end by '\n' */
-	const char *blkdev_parts = strstr(cmdline, "mtdparts");
-	const char *blkdev_def = strchr(blkdev_parts, ':') + 1;
-	char *next = (char *)blkdev_def;
-	char *pend;
-	int len;
-	unsigned long size, from;
-
-	if (!cmdline) {
-		printf("invalid parameter\n");
-		return -EINVAL;
-	}
-
-	*cmdline_end = '\0';
-	debug("%s", cmdline);
-	/* skip "CMDLINE:" */
-	env_update("bootargs", cmdline + strlen("CMDLINE:"));
-
-	while (*next) {
-		if (*next == '-') {
-			size = (~0UL);
-			next++;
-		} else {
-			size = simple_strtoul(next, &next, 16);
-		}
-		next++;
-		from = simple_strtoul(next, &next, 16);
-		next++;
-		pend =  strchr(next, ')');
-		if (!pend)
-			break;
-		len = min_t(int, pend - next, PART_NAME_SIZE);
-		part = malloc(sizeof(*part));
-		if (!part) {
-			printf("out of memory\n");
-			break;
-		}
-		part->from = from;
-		part->size = size;
-		strncpy(part->name, next, len);
-		part->name[len] = '\0';
-		next = strchr(next, ',');
-		next++;
-		list_add_tail(&part->node, &parts_head);
-		debug("0x%lx@0x%lx(%s)\n", part->size, part->from, part->name);
-	}
-
-	return 0;
-}
-
-static int rockchip_init_param(void)
-{
-	struct rockchip_param *param;
-
-	param = memalign(ARCH_DMA_MINALIGN, MAX_PARAM_SIZE);
-	if (!param) {
-		printf("out of memory\n");
-		return -ENOMEM;
-	}
-
-	blkdev_read(param, RK_PARAM_OFFSET, MAX_PARAM_SIZE >> 9);
-
-	return rockchip_param_parse(param->params);
-
-}
-
-struct blk_part *rockchip_get_blk_part(const char *name)
-{
-	struct blk_part *part;
-	struct list_head *node;
-
-	if (list_empty(&parts_head))
-		rockchip_init_param();
-
-	list_for_each(node, &parts_head) {
-		part = list_entry(node, struct blk_part, node);
-		if (!strcmp(part->name, name))
-			return part;
-	}
-
-	return NULL;
-}
-
-
diff --git a/arch/arm/mach-rockchip/rockchip_parameter.h b/arch/arm/mach-rockchip/rockchip_parameter.h
deleted file mode 100644
index 46d32a2a8b..0000000000
--- a/arch/arm/mach-rockchip/rockchip_parameter.h
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#ifndef _ROCKCHIP_PARAMS_H_
-#define _ROCKCHIP_PARAMS_H_
-
-#include <linux/list.h>
-
-#define RK_PARAM_OFFSET			0x2000
-#define PART_NAME_SIZE			32
-#define RK_BLK_SIZE			(1 << 9)
-
-struct blk_part {
-	char name[PART_NAME_SIZE];
-	unsigned long from;
-	unsigned long size;
-	struct list_head node;
-};
-
-struct blk_part *rockchip_get_blk_part(const char *name);
-
-#endif

commit 891380b57d864bc35a1f86adcc090c47557b18c2
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Nov 23 15:19:45 2017 +0800

    cmd: boot_android: support legacy aosp image from rockchip
    
    New cmd usage:
    boot_android mmc 0
    
    update boot_android:
    - do not need provide argv for misc partition and slot
    - If CONFIG_ROCKCHIP_RESOURCE_IMAGE is enabled, try to get dtb from resource
    partition.
    
    Change-Id: I7242880f9cde916ca10d677ddac07790c66a07a4
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/cmd/boot_android.c b/cmd/boot_android.c
index 9c3294e21f..a9c195ae0b 100644
--- a/cmd/boot_android.c
+++ b/cmd/boot_android.c
@@ -22,9 +22,8 @@ static int do_boot_android(cmd_tbl_t *cmdtp, int flag, int argc,
 	int ret = CMD_RET_SUCCESS;
 	char *addr_arg_endp, *addr_str;
 	struct blk_desc *dev_desc;
-	disk_partition_t part_info;
 
-	if (argc < 4)
+	if (argc < 3)
 		return CMD_RET_USAGE;
 	if (argc > 5)
 		return CMD_RET_USAGE;
@@ -34,20 +33,20 @@ static int do_boot_android(cmd_tbl_t *cmdtp, int flag, int argc,
 		if (addr_arg_endp == argv[4] || *addr_arg_endp != '\0')
 			return CMD_RET_USAGE;
 	} else {
-		addr_str = env_get("loadaddr");
+		addr_str = env_get("kernel_addr_r");
 		if (addr_str)
 			load_address = simple_strtoul(addr_str, NULL, 16);
 		else
 			load_address = CONFIG_SYS_LOAD_ADDR;
 	}
 
-	if (part_get_info_by_dev_and_name_or_num(argv[1], argv[2],
-						 &dev_desc, &part_info) < 0) {
+	dev_desc = blk_get_dev(argv[1], simple_strtoul(argv[2], NULL, 16));
+	if (!dev_desc) {
+		printf("Could not get %s %s\n", argv[1], argv[2]);
 		return CMD_RET_FAILURE;
 	}
 
-	ret = android_bootloader_boot_flow(dev_desc, &part_info, argv[3],
-					   load_address);
+	ret = android_bootloader_boot_flow(dev_desc, load_address);
 	if (ret < 0) {
 		printf("Android boot failed, error %d.\n", ret);
 		return CMD_RET_FAILURE;
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index efda47d18a..3f562258f8 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -12,17 +12,26 @@
 #include <common.h>
 #include <malloc.h>
 #include <fs.h>
+#include <boot_rkimg.h>
 
 #define ANDROID_PARTITION_BOOT "boot"
+#define ANDROID_PARTITION_MISC "misc"
 #define ANDROID_PARTITION_OEM  "oem"
+#define ANDROID_PARTITION_RECOVERY  "recovery"
 #define ANDROID_PARTITION_SYSTEM "system"
 
 #define ANDROID_ARG_SLOT_SUFFIX "androidboot.slot_suffix="
 #define ANDROID_ARG_ROOT "root="
 #define ANDROID_ARG_SERIALNO "androidboot.serialno="
+#ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
+#define ANDROID_ARG_FDT_FILENAME "rk-kernel.dtb"
+#define BOOTLOADER_MESSAGE_OFFSET_IN_MISC	(16 * 1024)
+#define BOOTLOADER_MESSAGE_BLK_OFFSET	(BOOTLOADER_MESSAGE_OFFSET_IN_MISC >> 9)
+#else
 #define ANDROID_ARG_FDT_FILENAME "kernel.dtb"
+#endif
 
-static int android_bootloader_message_load(
+int android_bootloader_message_load(
 	struct blk_desc *dev_desc,
 	const disk_partition_t *part_info,
 	struct android_bootloader_message *message)
@@ -34,7 +43,12 @@ static int android_bootloader_message_load(
 		return -1;
 	}
 
+#ifdef CONFIG_ROCKCHIP_BOOTLOADER
+	if (blk_dread(dev_desc, part_info->start + BOOTLOADER_MESSAGE_BLK_OFFSET,
+	     message_blocks, message) !=
+#else
 	if (blk_dread(dev_desc, part_info->start, message_blocks, message) !=
+#endif
 	    message_blocks) {
 		printf("Could not read from misc partition\n");
 		return -1;
@@ -140,7 +154,7 @@ static int android_part_get_info_by_name_suffix(struct blk_desc *dev_desc,
 	if (!part_name)
 		return -1;
 	strcpy(part_name, base_name);
-	if (slot_suffix)
+	if (slot_suffix && (slot_suffix[0] != '\0'))
 		strcat(part_name, slot_suffix);
 
 	part_num = part_get_info_by_name(dev_desc, part_name, part_info);
@@ -162,6 +176,7 @@ static int android_bootloader_boot_bootloader(void)
 	return -1;
 }
 
+#ifdef CONFIG_SUPPORT_OEM_DTB
 static int android_bootloader_get_fdt(const char *part_name,
 		const char *load_file_name)
 {
@@ -221,6 +236,7 @@ static int android_bootloader_get_fdt(const char *part_name,
 
 	return 0;
 }
+#endif
 
 int android_bootloader_boot_kernel(unsigned long kernel_address)
 {
@@ -229,12 +245,6 @@ int android_bootloader_boot_kernel(unsigned long kernel_address)
 	char *bootm_args[] = {
 		"bootm", kernel_addr_str, kernel_addr_str, fdt_addr, NULL };
 
-	if (!android_bootloader_get_fdt(ANDROID_PARTITION_OEM,
-					ANDROID_ARG_FDT_FILENAME)) {
-		fdt_addr = env_get("fdt_addr_r");
-		bootm_args[3] = fdt_addr;
-	}
-
 	sprintf(kernel_addr_str, "0x%lx", kernel_address);
 
 	printf("Booting kernel at %s with fdt at %s...\n\n\n",
@@ -344,23 +354,28 @@ char *android_assemble_cmdline(const char *slot_suffix,
 }
 
 int android_bootloader_boot_flow(struct blk_desc *dev_desc,
-				 const disk_partition_t *misc_part_info,
-				 const char *slot,
-				 unsigned long kernel_address)
+				 unsigned long load_address)
 {
 	enum android_boot_mode mode;
 	disk_partition_t boot_part_info;
-	disk_partition_t system_part_info;
-	int boot_part_num, system_part_num;
+	disk_partition_t misc_part_info;
+	int part_num;
 	int ret;
 	char *command_line;
 	char slot_suffix[3];
 	const char *mode_cmdline = NULL;
+	char *boot_partname = ANDROID_PARTITION_BOOT;
+	ulong fdt_addr;
 
-	/* Determine the boot mode and clear its value for the next boot if
-	 * needed.
+	/*
+	 * 1. Load MISC partition and determine the boot mode
+	 *   clear its value for the next boot if needed.
 	 */
-	mode = android_bootloader_load_and_clear_mode(dev_desc, misc_part_info);
+	part_num = part_get_info_by_name(dev_desc, ANDROID_PARTITION_MISC,
+					 &misc_part_info);
+	if (part_num < 0)
+		printf("%s Could not find misc partition\n", __func__);
+	mode = android_bootloader_load_and_clear_mode(dev_desc, &misc_part_info);
 	printf("ANDROID: reboot reason: \"%s\"\n", android_boot_mode_str(mode));
 
 	switch (mode) {
@@ -375,6 +390,9 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 		/* In recovery mode we still boot the kernel from "boot" but
 		 * don't skip the initramfs so it boots to recovery.
 		 */
+#ifndef CONFIG_AVB_LIBAVB_USER
+		boot_partname = ANDROID_PARTITION_RECOVERY;
+#endif
 		break;
 	case ANDROID_BOOT_MODE_BOOTLOADER:
 		/* Bootloader mode enters fastboot. If this operation fails we
@@ -385,40 +403,38 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	}
 
 	slot_suffix[0] = '\0';
-	if (slot && slot[0]) {
-		slot_suffix[0] = '_';
-		slot_suffix[1] = slot[0];
-		slot_suffix[2] = '\0';
-	}
+#ifdef CONFIG_AVB_LIBAVB_USER
+	/*TODO: get from pre-loader or misc partition*/
+	slot_suffix[0] = '_';
+	slot_suffix[1] = 'a';
+	slot_suffix[2] = '\0';
+#endif
 
-	/* Load the kernel from the desired "boot" partition. */
-	boot_part_num =
+	/*
+	 * 2. Load the boot/recovery from the desired "boot" partition.
+	 * Determine if this is an AOSP image.
+	 */
+	part_num =
 	    android_part_get_info_by_name_suffix(dev_desc,
-						 ANDROID_PARTITION_BOOT,
+						 boot_partname,
 						 slot_suffix, &boot_part_info);
-	if (boot_part_num < 0)
+	if (part_num < 0) {
+		printf("%s Could not found bootable partition %s\n", __func__,
+		       boot_partname);
 		return -1;
+	}
 	debug("ANDROID: Loading kernel from \"%s\", partition %d.\n",
-	      boot_part_info.name, boot_part_num);
+	      boot_part_info.name, part_num);
 
-	system_part_num =
-	    android_part_get_info_by_name_suffix(dev_desc,
-						 ANDROID_PARTITION_SYSTEM,
-						 slot_suffix,
-						 &system_part_info);
-	if (system_part_num < 0)
-		return -1;
-	debug("ANDROID: Using system image from \"%s\", partition %d.\n",
-	      system_part_info.name, system_part_num);
-
-	ret = android_image_load(dev_desc, &boot_part_info, kernel_address,
+	ret = android_image_load(dev_desc, &boot_part_info, load_address,
 				 -1UL);
-	if (ret < 0)
+	if (ret < 0) {
+		printf("%s %s part load fail\n", __func__, boot_part_info.name);
 		return ret;
+	}
 
 	/* Set Android root variables. */
 	env_set_ulong("android_root_devnum", dev_desc->devnum);
-	env_set_ulong("android_root_partnum", system_part_num);
 	env_set("android_slotsufix", slot_suffix);
 
 	/* Assemble the command line */
@@ -427,7 +443,17 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 
 	debug("ANDROID: bootargs: \"%s\"\n", command_line);
 
-	android_bootloader_boot_kernel(kernel_address);
+#ifdef CONFIG_SUPPORT_OEM_DTB
+	if (android_bootloader_get_fdt(ANDROID_PARTITION_OEM,
+				       ANDROID_ARG_FDT_FILENAME)) {
+		printf("Can not get the fdt data from oem!\n");
+	}
+#else
+	ret = android_image_get_fdt((void *)load_address, &fdt_addr);
+	if (!ret)
+		env_set_ulong("fdt_addr", fdt_addr);
+#endif
+	android_bootloader_boot_kernel(load_address);
 
 	/* TODO: If the kernel doesn't boot mark the selected slot as bad. */
 	return -1;
diff --git a/include/android_bootloader.h b/include/android_bootloader.h
index 97e36ed49a..cd6a4995ef 100644
--- a/include/android_bootloader.h
+++ b/include/android_bootloader.h
@@ -34,16 +34,12 @@ enum android_boot_mode {
  * Message. On success it doesn't return.
  *
  * @dev_desc:		device where to load the kernel and system to boot from.
- * @misc_part_info:	the "misc" partition descriptor in 'dev_desc'.
- * @slot:		the boot slot to boot from.
- * @kernel_address:	address where to load the kernel if needed.
+ * @load_address:	address where to load the boot img if needed.
  *
  * @return a negative number in case of error, otherwise it doesn't return.
  */
 int android_bootloader_boot_flow(struct blk_desc *dev_desc,
-				 const disk_partition_t *misc_part_info,
-				 const char *slot,
-				 unsigned long kernel_address);
+				 unsigned long load_address);
 
 /** android_avb_boot_flow - Execute the Android Bootloader Flow.
  * This fuction use to select and boot kernel through ab_suffix.

commit 5bd6dc275b949cd766db6845bda625e4a09b98d3
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Dec 8 10:19:47 2017 +0800

    rockchip: vendor: update to block api instead of rkblk
    
    Use block API for vendor storage access.
    
    Change-Id: I1e00812688cb1d9264fa4a3e1c1551f179d0a931
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index fce8fc6a31..7f59383b41 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -325,11 +325,11 @@ config ROCKCHIP_PARTITION_BOOT
 	  This enables support for bootimg system from rockchip format partition
 
 config ROCKCHIP_VENDOR_PARTITION
-        bool "Rockchip vendor partition support"
-        depends on ROCKCHIP_BLOCK_API
-        help
-          This enable support to read/write vendor configuration data from/to
-	  this partition
+	bool "Rockchip vendor storage partition support"
+	depends on RKIMG_BOOTLOADER
+	help
+	  This enable support to read/write vendor configuration data from/to
+	  this partition.
 
 config ROCKCHIP_SMCCC
 	bool "Rockchip SMCCC"
diff --git a/arch/arm/mach-rockchip/vendor.c b/arch/arm/mach-rockchip/vendor.c
index b1c08e2d43..627e123339 100644
--- a/arch/arm/mach-rockchip/vendor.c
+++ b/arch/arm/mach-rockchip/vendor.c
@@ -7,8 +7,7 @@
 #include <common.h>
 #include <malloc.h>
 #include <asm/arch/vendor.h>
-
-#include "rockchip_blk.h"
+#include <boot_rkimg.h>
 
 /* tag for vendor check */
 #define VENDOR_TAG		0x524B5644
@@ -107,12 +106,14 @@ static int bootdev_type;
 /**********************************************************/
 static int vendor_ops(u8 *buffer, u32 addr, u32 n_sec, int write)
 {
+	struct blk_desc *dev_desc;
 	unsigned int lba = 0;
 	int ret = 0;
 
+	dev_desc = rockchip_get_bootdev();
 	/* Get the offset address according to the device type */
-	switch (bootdev_type) {
-	case BOOT_FROM_EMMC:
+	switch (dev_desc->if_type) {
+	case IF_TYPE_MMC:
 		/*
 		 * The location of VendorStorage in Flash is shown in the
 		 * following figure. The starting address of the VendorStorage
@@ -125,9 +126,9 @@ static int vendor_ops(u8 *buffer, u32 addr, u32 n_sec, int write)
 		lba = EMMC_VENDOR_PART_OFFSET;
 		debug("[Vednor INFO]:VendorStorage offset address=0x%x\n", lba);
 		break;
-	case BOOT_FROM_FLASH:
-	case BOOT_FROM_SPI_NOR:
-	case BOOT_FROM_SPI_NAND:
+	case IF_TYPE_RKNAND:
+	case IF_TYPE_SPINOR:
+	case IF_TYPE_SPINAND:
 		/*
 		 * The location of VendorStorage in Flash is shown in the
 		 * following figure. The starting address of the VendorStorage
@@ -147,9 +148,9 @@ static int vendor_ops(u8 *buffer, u32 addr, u32 n_sec, int write)
 	}
 	if (!ret) {
 		if (write)
-			ret = blkdev_write(buffer, lba + addr, n_sec);
+			ret = blk_dwrite(dev_desc, lba + addr, n_sec, buffer);
 		else
-			ret = blkdev_read(buffer, lba + addr, n_sec);
+			ret = blk_dread(dev_desc, lba + addr, n_sec, buffer);
 	}
 	debug("[Vednor INFO]:op=%s, ret=%d\n", write ? "write" : "read", ret);
 
@@ -180,25 +181,26 @@ int vendor_storage_init(void)
 	u32 max_index = 0;
 	u16 data_offset, hash_offset;
 	u16 version2_offset, part_size;
+	struct blk_desc *dev_desc;
 
-	bootdev_type = get_bootdev_type();
-	if (!bootdev_type) {
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
 		printf("[Vednor ERROR]:Invalid boot device type(%d)\n",
 		       bootdev_type);
 		return -ENODEV;
 	}
 
-	switch (bootdev_type) {
-	case BOOT_FROM_EMMC:
+	switch (dev_desc->if_type) {
+	case IF_TYPE_MMC:
 		size = EMMC_VENDOR_INFO_SIZE;
 		part_size = EMMC_VENDOR_PART_BLKS;
 		data_offset = EMMC_VENDOR_DATA_OFFSET;
 		hash_offset = EMMC_VENDOR_HASH_OFFSET;
 		version2_offset = EMMC_VENDOR_VERSION2_OFFSET;
 		break;
-	case BOOT_FROM_FLASH:
-	case BOOT_FROM_SPI_NOR:
-	case BOOT_FROM_SPI_NAND:
+	case IF_TYPE_RKNAND:
+	case IF_TYPE_SPINOR:
+	case IF_TYPE_SPINAND:
 		size = FLASH_VENDOR_INFO_SIZE;
 		part_size = FLASH_VENDOR_PART_BLKS;
 		data_offset = FLASH_VENDOR_DATA_OFFSET;
@@ -313,13 +315,13 @@ int vendor_storage_write(u16 id, void *pbuf, u16 size)
 	}
 
 	switch (bootdev_type) {
-	case BOOT_FROM_EMMC:
+	case IF_TYPE_MMC:
 		part_size = EMMC_VENDOR_PART_BLKS;
 		max_item_num = EMMC_VENDOR_ITEM_NUM;
 		break;
-	case BOOT_FROM_FLASH:
-	case BOOT_FROM_SPI_NOR:
-	case BOOT_FROM_SPI_NAND:
+	case IF_TYPE_RKNAND:
+	case IF_TYPE_SPINOR:
+	case IF_TYPE_SPINAND:
 		part_size = FLASH_VENDOR_PART_BLKS;
 		max_item_num = FLASH_VENDOR_ITEM_NUM;
 		break;
@@ -393,13 +395,13 @@ void vendor_test_reset(void)
 	u32 size;
 
 	switch (bootdev_type) {
-	case BOOT_FROM_EMMC:
+	case IF_TYPE_MMC:
 		size = EMMC_VENDOR_INFO_SIZE;
 		part_size = EMMC_VENDOR_PART_BLKS;
 		break;
-	case BOOT_FROM_FLASH:
-	case BOOT_FROM_SPI_NOR:
-	case BOOT_FROM_SPI_NAND:
+	case IF_TYPE_RKNAND:
+	case IF_TYPE_SPINOR:
+	case IF_TYPE_SPINAND:
 		size = FLASH_VENDOR_INFO_SIZE;
 		part_size = FLASH_VENDOR_PART_BLKS;
 		break;
@@ -443,14 +445,14 @@ int vendor_storage_test(void)
 	 * allocable memory for each item.
 	 */
 	switch (bootdev_type) {
-	case BOOT_FROM_EMMC:
+	case IF_TYPE_MMC:
 		item_num = EMMC_VENDOR_ITEM_NUM;
 		total_size = (u32)vendor_info.hash - (u32)vendor_info.data;
 		size = total_size/item_num;
 		break;
-	case BOOT_FROM_FLASH:
-	case BOOT_FROM_SPI_NOR:
-	case BOOT_FROM_SPI_NAND:
+	case IF_TYPE_RKNAND:
+	case IF_TYPE_SPINOR:
+	case IF_TYPE_SPINAND:
 		item_num = FLASH_VENDOR_ITEM_NUM;
 		total_size = (u32)vendor_info.hash - (u32)vendor_info.data;
 		size = total_size/item_num;
diff --git a/include/blk.h b/include/blk.h
index 25a6bcd1c6..9cf5466662 100644
--- a/include/blk.h
+++ b/include/blk.h
@@ -33,6 +33,8 @@ enum if_type {
 	IF_TYPE_SYSTEMACE,
 	IF_TYPE_NVME,
 	IF_TYPE_RKNAND,
+	IF_TYPE_SPINAND,
+	IF_TYPE_SPINOR,
 
 	IF_TYPE_COUNT,			/* Number of interface types */
 };

commit a12bbc3452901a5566b36cd371f8d0375143dff9
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Nov 27 14:51:09 2017 +0800

    rockchip: resource: support gpt via block api
    
    - support both gpt and rkparameter
    - using blk_desc for read/write instead of rkblk api
    - add a rockchip_get_resource_file() API for those image alread in RAM;
    - try to get resource from AOSP boot.img/recovery.img first instead of
      RESOURCE partition.
    
    Change-Id: If7eb53723821b48e26a392bb18a3114faf35748a
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/resource_img.h b/arch/arm/include/asm/arch-rockchip/resource_img.h
index af4596250a..0e4ea83fe9 100644
--- a/arch/arm/include/asm/arch-rockchip/resource_img.h
+++ b/arch/arm/include/asm/arch-rockchip/resource_img.h
@@ -16,4 +16,6 @@
  */
 int rockchip_read_resource_file(void *buf, const char *name,
 				int offset, int len);
+int rockchip_get_resource_file(void *buf, const char *name);
+
 #endif
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 186c9e2a49..fce8fc6a31 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -313,7 +313,7 @@ config ROCKCHIP_PARAM
 
 config ROCKCHIP_RESOURCE_IMAGE
 	bool "Enable support for rockchip resource image"
-	depends on ROCKCHIP_PARAM
+	depends on RKIMG_BOOTLOADER
 	help
 	  This enables support to get dtb or logo files from
 	  rockchip resource image format partition.
diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 9a5d46fff9..b755b79742 100644
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -7,8 +7,11 @@
 #include <malloc.h>
 #include <linux/list.h>
 #include <asm/arch/resource_img.h>
-#include "rockchip_parameter.h"
-#include "rockchip_blk.h"
+#include <boot_rkimg.h>
+#ifdef CONFIG_ANDROID_BOOT_IMAGE
+#include <android_bootloader.h>
+#include <android_image.h>
+#endif
 
 #define PART_RESOURCE			"resource"
 #define RESOURCE_MAGIC			"RSCE"
@@ -90,10 +93,9 @@ struct resource_file {
 	uint32_t	f_offset;
 	uint32_t	f_size;
 	struct list_head link;
+	uint32_t 	rsce_base;	/* Base addr of resource */
 };
 
-static struct blk_part *rsce_blk;
-
 static LIST_HEAD(entrys_head);
 
 static int resource_image_check_header(const struct resource_img_hdr *hdr)
@@ -117,7 +119,7 @@ static int resource_image_check_header(const struct resource_img_hdr *hdr)
 	return ret;
 }
 
-static int add_file_to_list(struct resource_entry *entry)
+static int add_file_to_list(struct resource_entry *entry, int rsce_base)
 {
 	struct resource_file *file;
 
@@ -131,6 +133,7 @@ static int add_file_to_list(struct resource_entry *entry)
 		return -ENOMEM;
 	}
 	strcpy(file->name, entry->name);
+	file->rsce_base = rsce_base;
 	file->f_offset = entry->f_offset;
 	file->f_size = entry->f_size;
 	list_add_tail(&file->link, &entrys_head);
@@ -140,28 +143,72 @@ static int add_file_to_list(struct resource_entry *entry)
 	return 0;
 }
 
-static int read_file_info_from_blk_dev(void)
+static int init_resource_list(struct resource_img_hdr *hdr)
 {
-	struct resource_img_hdr *hdr;
 	struct resource_entry *entry;
 	void *content;
 	int size;
 	int ret;
 	int e_num;
+	int offset = 0;
+	int mode = 0;
+	struct blk_desc *dev_desc;
+	struct andr_img_hdr *andr_hdr;
+	disk_partition_t part_info;
+	char *boot_partname = PART_BOOT;
 
-	rsce_blk = rockchip_get_blk_part(PART_RESOURCE);
-	if (!rsce_blk) {
-		printf("no resource partition found\n");
-		return  -ENODEV;
+	if (hdr) {
+		content = (void *)(hdr + hdr->c_offset);
+		goto init_list;
 	}
 
+	dev_desc = rockchip_get_bootdev();
 	hdr = memalign(ARCH_DMA_MINALIGN, RK_BLK_SIZE);
 	if (!hdr) {
-		printf("out of memory!\n");
+		printf("%s out of memory!\n", __func__);
 		return -ENOMEM;
 	}
 
-	ret = blkdev_read(hdr, rsce_blk->from, 1);
+#ifdef CONFIG_ANDROID_BOOT_IMAGE
+	/* Get boot mode from misc */
+	mode = rockchip_get_boot_mode();
+	if (mode == BOOT_MODE_RECOVERY)
+		boot_partname = PART_RECOVERY;
+	/* Read boot/recovery and chenc if this is an AOSP img */
+	ret = part_get_info_by_name(dev_desc, boot_partname,
+					 &part_info);
+	if (ret < 0)
+		printf("fail to get %s part\n", boot_partname);
+	andr_hdr = (void *)hdr;
+	ret = blk_dread(dev_desc, part_info.start, 1, andr_hdr);
+	if (ret != 1)
+		printf("%s read fail\n", __func__);
+	ret = android_image_check_header(andr_hdr);
+	if (!ret) {
+		debug("%s Load resource from %s senond pos\n",
+		      __func__, part_info.name);
+		/* Read resource from second offset */
+		offset = part_info.start;
+		offset += andr_hdr->page_size;
+		offset += ALIGN(andr_hdr->kernel_size, andr_hdr->page_size);
+		offset += ALIGN(andr_hdr->ramdisk_size, andr_hdr->page_size);
+	} else {
+		/* Set mode to 0 in for recovery is not valid AOSP img */
+		mode = 0;
+	}
+#endif
+	if (!mode) {
+		/* Read resource from Rockchip Resource partition */
+		ret = part_get_info_by_name(dev_desc, PART_RESOURCE,
+					 &part_info);
+		if (ret < 0)
+			printf("fail to get %s part\n", PART_RESOURCE);
+		offset = part_info.start;
+		debug("%s Load resource from %s\n", __func__, part_info.name);
+	}
+
+	hdr = (void *)andr_hdr;
+	ret = blk_dread(dev_desc, offset, 1, hdr);
 	if (ret < 0)
 		goto out;
 	ret = resource_image_check_header(hdr);
@@ -173,15 +220,16 @@ static int read_file_info_from_blk_dev(void)
 		printf("alloc memory for content failed\n");
 		goto out;
 	}
-	ret = blkdev_read(content, rsce_blk->from + hdr->c_offset,
-			  hdr->e_blks * hdr->e_nums);
+	ret = blk_dread(dev_desc, offset + hdr->c_offset,
+			hdr->e_blks * hdr->e_nums, content);
 	if (ret < 0)
 		goto err;
 
+init_list:
 	for (e_num = 0; e_num < hdr->e_nums; e_num++) {
 		size = e_num * hdr->e_blks * RK_BLK_SIZE;
 		entry = (struct resource_entry *)(content + size);
-		add_file_to_list(entry);
+		add_file_to_list(entry, offset);
 	}
 
 err:
@@ -193,14 +241,13 @@ out:
 }
 
 static struct resource_file *get_file_info(struct resource_img_hdr *hdr,
-					   const void *content,
 					   const char *name)
 {
 	struct resource_file *file;
 	struct list_head *node;
 
 	if (list_empty(&entrys_head))
-		read_file_info_from_blk_dev();
+		init_resource_list(hdr);
 
 	list_for_each(node, &entrys_head) {
 		file = list_entry(node, struct resource_file, link);
@@ -211,6 +258,15 @@ static struct resource_file *get_file_info(struct resource_img_hdr *hdr,
 	return NULL;
 }
 
+int rockchip_get_resource_file(void *buf, const char *name)
+{
+	struct resource_file *file;
+
+	file = get_file_info(buf, name);
+
+	return file->f_offset;
+}
+
 /*
  * read file from resource partition
  * @buf: destination buf to store file data;
@@ -224,8 +280,9 @@ int rockchip_read_resource_file(void *buf, const char *name,
 	struct resource_file *file;
 	int ret = 0;
 	int blks;
+	struct blk_desc *dev_desc;
 
-	file = get_file_info(NULL, NULL, name);
+	file = get_file_info(NULL, name);
 	if (!file) {
 		printf("Can't find file:%s\n", name);
 		return -ENOENT;
@@ -234,7 +291,9 @@ int rockchip_read_resource_file(void *buf, const char *name,
 	if (len <= 0 || len > file->f_size)
 		len = file->f_size;
 	blks = DIV_ROUND_UP(len, RK_BLK_SIZE);
-	ret = blkdev_read(buf, rsce_blk->from + file->f_offset + offset, blks);
+	dev_desc = rockchip_get_bootdev();
+	ret = blk_dread(dev_desc, file->rsce_base + file->f_offset + offset,
+			blks, buf);
 	if (!ret)
 		ret = len;
 

commit d3ff9cf90a7dc8e8fcf30bb113e6e11612b9ac9c
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Dec 7 18:09:36 2017 +0800

    rockchip: charge_animation: update for rkimg api
    
    Change-Id: If3157382c05717d363c42f045abcc12489ffec64
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 7b0126b898..0662357b29 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -4,17 +4,17 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 
-#include <asm/suspend.h>
-#include <asm/arch/rockchip_smccc.h>
-#include <asm/arch/bootrkp.h>
 #include <common.h>
+#include <boot_rkimg.h>
 #include <console.h>
 #include <dm.h>
 #include <errno.h>
 #include <key.h>
+#include <pwm.h>
 #include <irq-generic.h>
+#include <asm/arch/rockchip_smccc.h>
+#include <asm/suspend.h>
 #include <linux/input.h>
-#include <pwm.h>
 #include <power/charge_display.h>
 #include <power/fuel_gauge.h>
 #include <power/pmic.h>
@@ -245,9 +245,9 @@ static int charge_animation_show(struct udevice *dev)
 		return 0;
 	}
 
-#ifdef CONFIG_ROCKCHIP_PARTITION_BOOT
+#ifdef CONFIG_RKIMG_BOOTLOADER
 	boot_mode = rockchip_get_boot_mode();
-	if (boot_mode != ANDROID_BOOT_MODE_NORMAL) {
+	if (boot_mode != BOOT_MODE_NORMAL) {
 		debug("exit charge, due to boot mode: %d\n", boot_mode);
 		return 0;
 	}

commit 270f9eac7344026498482195a2c7f1b1c2a42a13
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Dec 7 15:32:31 2017 +0800

    image-android: add a api to get fdt from boot img
    
    Get the dtb file from boot img second position or inside resource for
    Rockchip image.
    
    Change-Id: I843366b32f79ea8fb320d695d79420607a496d68
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/image-android.c b/common/image-android.c
index e6976d0e63..ac4ea46ab1 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -147,6 +147,28 @@ int android_image_get_ramdisk(const struct andr_img_hdr *hdr,
 	return 0;
 }
 
+int android_image_get_fdt(const struct andr_img_hdr *hdr,
+			      ulong *rd_data)
+{
+	if (!hdr->second_size) {
+		*rd_data = 0;
+		return -1;
+	}
+
+	printf("FDT load addr 0x%08x size %u KiB\n",
+	       hdr->second_addr, DIV_ROUND_UP(hdr->second_size, 1024));
+
+	*rd_data = (unsigned long)hdr;
+	*rd_data += hdr->page_size;
+	*rd_data += ALIGN(hdr->kernel_size, hdr->page_size);
+	*rd_data += ALIGN(hdr->ramdisk_size, hdr->page_size);
+
+#ifdef CONFIG_ROCKCHIP_BOOTLOADER
+	rockchip_get_resource_file(rd_data, "rk-kernel.dtb");
+#endif
+	return 0;
+}
+
 long android_image_load(struct blk_desc *dev_desc,
 			const disk_partition_t *part_info,
 			unsigned long load_address,
diff --git a/include/image.h b/include/image.h
index 300a72a4b5..fe0febabaa 100644
--- a/include/image.h
+++ b/include/image.h
@@ -1234,6 +1234,8 @@ int android_image_get_kernel(const struct andr_img_hdr *hdr, int verify,
 			     ulong *os_data, ulong *os_len);
 int android_image_get_ramdisk(const struct andr_img_hdr *hdr,
 			      ulong *rd_data, ulong *rd_len);
+int android_image_get_fdt(const struct andr_img_hdr *hdr,
+			      ulong *rd_data);
 ulong android_image_get_end(const struct andr_img_hdr *hdr);
 ulong android_image_get_kload(const struct andr_img_hdr *hdr);
 void android_print_contents(const struct andr_img_hdr *hdr);

commit a0e58cf2cc5f85a68cc478474f369913a3320283
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Dec 7 15:02:05 2017 +0800

    cmd: bootrkp: add a cmd for rockchip rkimg bootloader
    
    'bootrkp' will find the boot device and find all necessary images.
    Basically, these partitions are must:
    Kernel.img: kernel Image
    Resource.img: kernel dtb and logo
    system.img: rootfs
    
    Change-Id: Iba3df2535705fa3ed529377f44f041fa2294ce60
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 502002de95..b8df092e79 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -773,6 +773,16 @@ config CMD_ANDROID_AB_SELECT
 	  is used by the new A/B update model where one slot is updated in the
 	  background while running from the other slot.
 
+config CMD_BOOT_ROCKCHIP
+	bool "boot_rockchip"
+	default n
+	depends on RKIMG_BOOTLOADER
+	help
+	  Performs the Rockchip Bootloader boot flow, loading the appropriate
+	  Rockchip image (normal kernel, boot, resource and revocery)
+	  and booting it. The boot mode is determined by the contents of the
+	  Rockchip bootloader helper.
+
 config CMD_MMC
 	bool "mmc"
 	help
diff --git a/cmd/Makefile b/cmd/Makefile
index 29fb14aa25..f8396ce585 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -25,6 +25,7 @@ obj-$(CONFIG_CMD_BEDBUG) += bedbug.o
 obj-$(CONFIG_CMD_BLOCK_CACHE) += blkcache.o
 obj-$(CONFIG_CMD_BMP) += bmp.o
 obj-$(CONFIG_CMD_BOOT_ANDROID) += boot_android.o
+obj-$(CONFIG_CMD_BOOT_ROCKCHIP) += bootrkp.o
 obj-$(CONFIG_CMD_BOOTEFI) += bootefi.o
 obj-$(CONFIG_CMD_BOOTMENU) += bootmenu.o
 obj-$(CONFIG_CMD_BOOTSTAGE) += bootstage.o
diff --git a/cmd/bootrkp.c b/cmd/bootrkp.c
new file mode 100644
index 0000000000..6c5943f32c
--- /dev/null
+++ b/cmd/bootrkp.c
@@ -0,0 +1,36 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <android_bootloader.h>
+#include <boot_rkimg.h>
+
+static int do_boot_rockchip(cmd_tbl_t *cmdtp, int flag, int argc,
+		      char * const argv[])
+{
+	disk_partition_t part_info;
+	struct blk_desc *dev_desc;
+	int mode = 0;
+	char *boot_partname = PART_BOOT;
+	int ret = 0;
+
+	dev_desc = rockchip_get_bootdev();
+	mode = rockchip_get_boot_mode();
+	if (mode == BOOT_MODE_RECOVERY)
+		boot_partname = PART_RECOVERY;
+	ret = part_get_info_by_name(dev_desc, boot_partname, &part_info);
+
+	if(boot_rockchip_image(dev_desc, &part_info))
+		ret = CMD_RET_FAILURE;
+
+	return ret;
+}
+
+U_BOOT_CMD(
+	boot_rockchip,  CONFIG_SYS_MAXARGS,     1,      do_boot_rockchip,
+	"boot Linux Image image from rockchip partition storage",
+	""
+);

commit 06621a79d4e261209a03bd5d8f82b78fcd3f8888
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Dec 7 14:58:47 2017 +0800

    rockchip: add rkimg bootloader support
    
    Rockchip use rkimg bootloader to boot Android during development cycle and for
    other OS, typical content kernel.img with zImage/Image, boot.img and
    recovery.img with Ramdisk, packed with 'KNRL' header; and resource.img
    with dtb and uboot/kernel logo bmp, vendor storage for custom info
    like SN and MAC address.
    
    Change-Id: I400195a5e622437f234f22d6675a5e96db9085c6
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 02106f4a28..186c9e2a49 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -288,6 +288,16 @@ config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
 config SPL_MMC_SUPPORT
 	default y if !SPL_ROCKCHIP_BACK_TO_BROM
 
+config RKIMG_BOOTLOADER
+	bool "Support for Rockchip Image Bootloader boot flow"
+	default n
+	help
+	  Rockchip use this to boot Android during development cycle and for
+	  other OS, typical content kernel.img with zImage/Image, boot.img and
+	  recovery.img with Ramdisk, packed with 'KNRL' header; and resource.img
+	  with dtb and uboot/kernel logo bmp, vendor storage for custom info
+	  like SN and MAC address.
+
 config ROCKCHIP_BLOCK_API
 	bool "Rockchip block device api support"
 	help
diff --git a/common/Makefile b/common/Makefile
index 232cd85213..1757f39dd8 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -110,7 +110,7 @@ obj-$(CONFIG_$(SPL_TPL_)FIT_SIGNATURE) += image-sig.o
 obj-$(CONFIG_IO_TRACE) += iotrace.o
 obj-y += memsize.o
 obj-y += stdio.o
-
+obj-$(CONFIG_RKIMG_BOOTLOADER) += boot_rkimg.o
 # This option is not just y/n - it can have a numeric value
 ifdef CONFIG_FASTBOOT_FLASH
 obj-y += image-sparse.o
diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
new file mode 100644
index 0000000000..d03e4315e1
--- /dev/null
+++ b/common/boot_rkimg.c
@@ -0,0 +1,257 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <bootm.h>
+#include <linux/list.h>
+#include <libfdt.h>
+#include <malloc.h>
+#include <asm/arch/resource_img.h>
+#include <boot_rkimg.h>
+
+#define TAG_KERNEL			0x4C4E524B
+
+#define DTB_FILE			"rk-kernel.dtb"
+
+#define BOOTLOADER_MESSAGE_OFFSET_IN_MISC	(16 * 1024)
+#define BOOTLOADER_MESSAGE_BLK_OFFSET		(BOOTLOADER_MESSAGE_OFFSET_IN_MISC >> 9)
+
+struct bootloader_message {
+	char command[32];
+	char status[32];
+	char recovery[768];
+
+	/*
+         * The 'recovery' field used to be 1024 bytes.  It has only ever
+	 * been used to store the recovery command line, so 768 bytes
+	 * should be plenty.  We carve off the last 256 bytes to store the
+	 * stage string (for multistage packages) and possible future
+	 * expansion.
+         */
+	char stage[32];
+	char slot_suffix[32];
+	char reserved[192];
+};
+
+struct rockchip_image {
+	uint32_t tag;
+	uint32_t size;
+	int8_t image[1];
+	uint32_t crc;
+};
+
+#if !defined(CONFIG_ARM64)
+#ifdef CONFIG_LMB
+static void boot_start_lmb(bootm_headers_t *images)
+{
+	ulong		mem_start;
+	phys_size_t	mem_size;
+
+	lmb_init(&images->lmb);
+
+	mem_start = env_get_bootm_low();
+	mem_size = env_get_bootm_size();
+
+	lmb_add(&images->lmb, (phys_addr_t)mem_start, mem_size);
+
+	arch_lmb_reserve(&images->lmb);
+	board_lmb_reserve(&images->lmb);
+}
+#else
+static inline void boot_start_lmb(bootm_headers_t *images) { }
+#endif
+
+static void boot_lmb_init(bootm_headers_t *images)
+{
+	boot_start_lmb(images);
+	images->state = BOOTM_STATE_OS_GO;
+}
+#endif
+
+/*
+ * non-OTA packaged kernel.img & boot.img
+ * return the image size on success, and a
+ * negative value on error.
+ */
+static int read_rockchip_image(struct blk_desc *dev_desc,
+			       disk_partition_t *part_info,
+			       void *dst)
+{
+	struct rockchip_image *img;
+	int header_len = 8;
+	int cnt;
+	int ret;
+
+	img = memalign(ARCH_DMA_MINALIGN, RK_BLK_SIZE);
+	if (!img) {
+		printf("out of memory\n");
+		return -ENOMEM;
+	}
+
+	/* read first block with header imformation */
+	ret = blk_dread(dev_desc, part_info->start, 1, img);
+	if (ret < 0)
+		goto err;
+	if (img->tag != TAG_KERNEL) {
+		printf("%s: invalid image tag(0x%x)\n", part_info->name, img->tag);
+		ret = -EINVAL;
+		goto err;
+	}
+
+	memcpy(dst, img->image, RK_BLK_SIZE - header_len);
+	/*
+	 * read the rest blks
+	 * total size  = image size + 8 bytes header + 4 bytes crc32
+	 */
+	cnt = DIV_ROUND_UP(img->size + 8 + 4, RK_BLK_SIZE);
+	ret = blk_dread(dev_desc, part_info->start + 1, cnt - 1,
+			dst + RK_BLK_SIZE - header_len);
+	if (!ret)
+		ret = img->size;
+err:
+	free(img);
+	return ret;
+}
+
+/* Gets the storage type of the current device */
+int get_bootdev_type(void)
+{
+	int type = 0;
+
+	#ifdef CONFIG_EMMC_BOOT
+		type = IF_TYPE_MMC;
+	#endif /* CONFIG_EMMC_BOOT */
+	#ifdef CONFIG_QSPI_BOOT
+		type = IF_TYPE_SPI_NAND;
+	#endif /* CONFIG_QSPI_BOOT */
+	#ifdef CONFIG_NAND_BOOT
+		type = IF_TYPE_RKNAND;
+	#endif /* CONFIG_NAND_BOOT */
+	#ifdef CONFIG_NOR_BOOT
+		type = IF_TYPE_SPI_NOR;
+	#endif /* CONFIG_NOR_BOOT */
+
+	/* For current use(Only EMMC support!) */
+	if (!type)
+		type = IF_TYPE_MMC;
+
+	return type;
+}
+
+struct blk_desc *rockchip_get_bootdev(void)
+{
+	struct blk_desc *dev_desc;
+	int dev_type;
+
+	dev_type = get_bootdev_type();
+	dev_desc = blk_get_devnum_by_type(dev_type, 0);
+
+	return dev_desc;
+}
+
+static int boot_mode = -1;
+int rockchip_get_boot_mode(void)
+{
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+	struct bootloader_message *bmsg;
+	int size = DIV_ROUND_UP(sizeof(struct bootloader_message), RK_BLK_SIZE);
+	int ret;
+
+	if (boot_mode != -1)
+		return boot_mode;
+
+	dev_desc = rockchip_get_bootdev();
+	ret = part_get_info_by_name(dev_desc, PART_MISC,
+			&part_info);
+	if (ret < 0)
+		printf("get part %s fail %d\n", PART_MISC, ret);
+
+	bmsg = memalign(ARCH_DMA_MINALIGN, size);
+	ret = blk_dread(dev_desc,
+			part_info.start + BOOTLOADER_MESSAGE_BLK_OFFSET,
+			size, bmsg);
+	if (ret < 0)
+		goto err;
+
+	if (!strcmp(bmsg->command, "boot-recovery")) {
+		printf("boot mode: recovery\n");
+		ret = BOOT_MODE_RECOVERY;
+	} else {
+		printf("boot mode: normal\n");
+		ret = BOOT_MODE_NORMAL;
+	}
+	boot_mode = ret;
+err:
+	free(bmsg);
+
+	return ret;
+}
+
+int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
+{
+	ulong fdt_addr_r = env_get_ulong("fdt_addr_r", 16, 0);
+	ulong ramdisk_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0);
+	ulong kernel_addr_r = env_get_ulong("kernel_addr_r", 16, 0x480000);
+	disk_partition_t kernel_part;
+	ulong ramdisk_size;
+	ulong kernel_size;
+	ulong fdt_size;
+	int ret = 0;
+	int part_num;
+
+	printf("=Booting Rockchip format image=\n");
+	part_num = part_get_info_by_name(dev_desc, PART_KERNEL,
+					 &kernel_part);
+
+	if (part_num < 0 || !boot_part) {
+		printf("%s krenel or boot part info error\n", __func__);
+		ret = -EINVAL;
+		goto out;
+	}
+
+	kernel_size = read_rockchip_image(dev_desc, &kernel_part,
+					  (void *)kernel_addr_r);
+	if (kernel_size < 0) {
+		printf("%s krenel part read error\n", __func__);
+		ret = -EINVAL;
+		goto out;
+	}
+
+	ramdisk_size = read_rockchip_image(dev_desc, boot_part,
+					   (void *)ramdisk_addr_r);
+	if (ramdisk_size < 0) {
+		printf("%s ramdisk part read error\n", __func__);
+		ret = -EINVAL;
+		goto out;
+	}
+
+	fdt_size = rockchip_read_resource_file((void *)fdt_addr_r, DTB_FILE, 0, 0);
+	if (fdt_size < 0) {
+		printf("%s fdt read error\n", __func__);
+		ret = -EINVAL;
+		goto out;
+	}
+
+	printf("kernel   @ 0x%08lx (0x%08lx)\n", kernel_addr_r, kernel_size);
+	printf("ramdisk  @ 0x%08lx (0x%08lx)\n", ramdisk_addr_r, ramdisk_size);
+#if defined(CONFIG_ARM64)
+	char cmdbuf[64];
+	sprintf(cmdbuf, "booti 0x%lx 0x%lx:0x%lx 0x%lx",
+		kernel_addr_r, ramdisk_addr_r, ramdisk_size, fdt_addr_r);
+	run_command(cmdbuf, 0);
+#else
+	boot_lmb_init(&images);
+	images.ep = kernel_addr_r;
+	images.initrd_start = ramdisk_addr_r;
+	images.initrd_end = ramdisk_addr_r + ramdisk_size;
+	images.ft_addr = (void *)fdt_addr_r;
+	images.ft_len = fdt_totalsize(fdt_addr_r);
+	do_bootm_linux(0, 0, NULL, &images);
+#endif
+out:
+	return ret;
+}
diff --git a/include/boot_rkimg.h b/include/boot_rkimg.h
new file mode 100644
index 0000000000..f59bf2e41b
--- /dev/null
+++ b/include/boot_rkimg.h
@@ -0,0 +1,29 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __BOOT_ROCKCHIP_H_
+#define __BOOT_ROCKCHIP_H_
+
+/* This is a copy from Android boot loader */
+enum _boot_mode {
+	BOOT_MODE_NORMAL = 0,
+	BOOT_MODE_RECOVERY,
+	BOOT_MODE_BOOTLOADER,
+};
+
+
+#define PART_MISC			"misc"
+#define PART_KERNEL			"kernel"
+#define PART_BOOT			"boot"
+#define PART_RECOVERY			"recovery"
+
+#define RK_BLK_SIZE 512
+
+int rockchip_get_boot_mode(void);
+int boot_rockchip_image(struct blk_desc *dev, disk_partition_t *boot_part);
+struct blk_desc *rockchip_get_bootdev(void);
+
+#endif

commit 82198b5ccd31ca903c84f3d16e015ca704af852c
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Dec 6 15:09:31 2017 +0800

    disk: part_rockchip: add new partition type for rockchip parameter
    
    Rockchip parameter parameter is a partition type like cmdline partition,
    widely used in rockchip legacy system.
    
    Change-Id: I107748733c4cfed22f3a2ef8716033211eafdf7c
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/disk/Kconfig b/disk/Kconfig
index 9396562120..1489e6569f 100644
--- a/disk/Kconfig
+++ b/disk/Kconfig
@@ -117,4 +117,14 @@ config PARTITION_TYPE_GUID
 	  Activate the configuration of GUID type
 	  for EFI partition
 
+config RKPARM_PARTITION
+	bool "Enable Rockchip parameter partition table"
+	depends on PARTITIONS
+	help
+	  Say Y here if you would like to use device under U-Boot which
+	  were partitioned using Rockchip parameter.
+
+config SPL_ROCKCHIP_PARTITION
+	bool "Enable Rockchip partition table for SPL"
+
 endmenu
diff --git a/disk/Makefile b/disk/Makefile
index 12c0531689..97a23830f3 100644
--- a/disk/Makefile
+++ b/disk/Makefile
@@ -13,3 +13,4 @@ obj-$(CONFIG_$(SPL_)DOS_PARTITION)   += part_dos.o
 obj-$(CONFIG_$(SPL_)ISO_PARTITION)   += part_iso.o
 obj-$(CONFIG_$(SPL_)AMIGA_PARTITION) += part_amiga.o
 obj-$(CONFIG_$(SPL_)EFI_PARTITION)   += part_efi.o
+obj-$(CONFIG_$(SPL_)RKPARM_PARTITION)   += part_rkparm.o
diff --git a/disk/part_rkparm.c b/disk/part_rkparm.c
new file mode 100644
index 0000000000..a9af237a1e
--- /dev/null
+++ b/disk/part_rkparm.c
@@ -0,0 +1,199 @@
+/*
+ * (C) Copyright 2017 rkparm Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <malloc.h>
+
+#ifdef HAVE_BLOCK_DEVICE
+#define RK_PARAM_OFFSET			0x2000
+#define MAX_PARAM_SIZE			(1024 * 64)
+
+struct rkparm_param {
+	u32 tag;
+	u32 length;
+	char params[1];
+	u32 crc;
+};
+
+struct rkparm_part {
+	char name[PART_NAME_LEN];
+	unsigned long start;
+	unsigned long size;
+	struct list_head node;
+};
+
+
+static LIST_HEAD(parts_head);
+
+static int rkparm_param_parse(char *param, struct list_head *parts_head)
+{
+	struct rkparm_part *part;
+	const char *cmdline = strstr(param, "CMDLINE:");
+	char *cmdline_end = strstr(cmdline, "\n"); /* end by '\n' */
+	const char *blkdev_parts = strstr(cmdline, "mtdparts");
+	const char *blkdev_def = strchr(blkdev_parts, ':') + 1;
+	char *next = (char *)blkdev_def;
+	char *pend;
+	int len;
+	unsigned long size, start;
+
+	if (!cmdline) {
+		printf("invalid parameter\n");
+		return -EINVAL;
+	}
+
+	*cmdline_end = '\0';
+	/* skip "CMDLINE:" */
+	env_update("bootargs", cmdline + strlen("CMDLINE:"));
+
+	while (*next) {
+		if (*next == '-') {
+			size = (~0UL);
+			next++;
+		} else {
+			size = simple_strtoul(next, &next, 16);
+		}
+		next++;
+		start = simple_strtoul(next, &next, 16);
+		next++;
+		pend =  strchr(next, ')');
+		if (!pend)
+			break;
+		len = min_t(int, pend - next, PART_NAME_LEN);
+		part = malloc(sizeof(*part));
+		if (!part) {
+			printf("out of memory\n");
+			break;
+		}
+		part->start = start;
+		part->size = size;
+		strncpy(part->name, next, len);
+		part->name[len] = '\0';
+		next = strchr(next, ',');
+		next++;
+		list_add_tail(&part->node, parts_head);
+	}
+
+	return 0;
+}
+
+static int rkparm_init_param(struct blk_desc *dev_desc,
+				struct list_head *parts_head)
+{
+	struct rkparm_param *param;
+	int ret;
+
+	param = memalign(ARCH_DMA_MINALIGN, MAX_PARAM_SIZE);
+	if (!param) {
+		printf("out of memory\n");
+		return -ENOMEM;
+	}
+
+	ret = blk_dread(dev_desc, RK_PARAM_OFFSET, MAX_PARAM_SIZE >> 9,
+			(ulong *)param);
+	if (ret < 0) {
+		printf("%s param read fail\n", __func__);
+		return -EINVAL;
+	}
+
+	return rkparm_param_parse(param->params, parts_head);
+
+}
+
+static void part_print_rkparm(struct blk_desc *dev_desc)
+{
+	int ret = 0;
+	struct list_head *node;
+	struct rkparm_part *p = NULL;
+	int i = 0;
+
+	if (list_empty(&parts_head))
+		ret = rkparm_init_param(dev_desc, &parts_head);
+
+	if (ret) {
+		printf("%s Invalid rkparm parameter\n", __func__);
+		return;
+	}
+
+	printf("Part\tStart LBA\tSize\t\tName\n");
+	list_for_each(node, &parts_head) {
+		p = list_entry(node, struct rkparm_part, node);
+		printf("%3d\t0x%08lx\t0x%08lx\t%s\n", (i++ + 1),
+		       p->start, p->size, p->name);
+	}
+
+
+	return;
+}
+
+static int part_get_info_rkparm(struct blk_desc *dev_desc, int idx,
+		      disk_partition_t *info)
+{
+	struct list_head *node;
+	struct rkparm_part *p = NULL;
+	int part_num = 1;
+	int ret = 0;
+
+	if (idx < 1) {
+		printf("%s Invalid partition no.%d\n", __func__, idx);
+		return -EINVAL;
+	}
+
+	if (list_empty(&parts_head))
+		ret = rkparm_init_param(dev_desc, &parts_head);
+
+	if (ret) {
+		printf("%s Invalid rkparm partition\n", __func__);
+		return -1;
+	}
+
+	list_for_each(node, &parts_head) {
+		p = list_entry(node, struct rkparm_part, node);
+		if (idx == part_num)
+			break;
+		part_num ++;
+	}
+
+	if (part_num > idx) {
+		printf("%s Invalid partition no.%d\n", __func__, idx);
+		return -EINVAL;
+	}
+
+	info->start = p->start;
+	info->size = p->size << 9;
+	info->blksz = dev_desc->blksz;
+
+	sprintf((char *)info->name, "%s", p->name);
+	strcpy((char *)info->type, "U-Boot");
+	info->bootable = 0;
+
+	return 0;
+}
+
+static int part_test_rkparm(struct blk_desc *dev_desc)
+{
+	int ret = 0;
+
+	if (list_empty(&parts_head))
+		ret = rkparm_init_param(dev_desc, &parts_head);
+	if (ret)
+		ret = -1;
+
+	return ret;
+}
+/*
+ * Add an 'b_' prefix so it comes before 'dos' and after 'a_efi' in the linker
+ * list. We need to check EFI first, and then rkparm partition
+ */
+U_BOOT_PART_TYPE(b_rkparm) = {
+	.name		= "RKPARM",
+	.part_type	= PART_TYPE_RKPARM,
+	.max_entries	= GPT_ENTRY_NUMBERS,
+	.get_info	= part_get_info_ptr(part_get_info_rkparm),
+	.print		= part_print_ptr(part_print_rkparm),
+	.test		= part_test_rkparm,
+};
+#endif
diff --git a/include/part.h b/include/part.h
index 0d5c99836b..5739a2d37b 100644
--- a/include/part.h
+++ b/include/part.h
@@ -29,6 +29,7 @@ struct block_drvr {
 #define PART_TYPE_ISO		0x03
 #define PART_TYPE_AMIGA		0x04
 #define PART_TYPE_EFI		0x05
+#define PART_TYPE_RKPARM	0x06
 
 /* maximum number of partition entries supported by search */
 #define DOS_ENTRY_NUMBERS	8

commit f1e236acd5781d3907d4a8bf9248487bd819de90
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Nov 27 19:59:45 2017 +0800

    UPSTREAM: rockchip: board: evb_rv1108: update README
    
    After commit d962e5dadc2c("rockchip: mkimage: use spl_boot0 for all Rockchip SoCs"),
    the mkimage will not pad the Tag memroy, so we shoud
    pass a Taged ddr.bin/spl.bin to it.
    
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    (cherry picked from commit dca4740930c77c465b9645e0a6928c3710b21cdd)
    
    Change-Id: I83e99669e90fda662d176f8f687785609e364312
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/board/rockchip/evb_rv1108/README b/board/rockchip/evb_rv1108/README
index 58895960e9..79a97c3138 100644
--- a/board/rockchip/evb_rv1108/README
+++ b/board/rockchip/evb_rv1108/README
@@ -3,12 +3,11 @@ Here is the step-by-step to boot U-Boot on rv1108 evb.
 Get ddr init binary
 ==============================================================================
   > git clone  https://github.com/rockchip-linux/rkbin.git
-  > dd if=./rkbin/rv1x/rv1108ddr.bin of=ddr.bin bs=4 skip=1
 
 Compile  U-Boot
 ===========================
   > make CROSS_COMPILE=arm-linux-gnueabi- evb-rv1108_defconfig  all
-  > ./tools/mkimage  -n rv1108 -T rksd -d ddr.bin spl.bin
+  > ./tools/mkimage  -n rv1108 -T rksd -d ../rkbin/rv1x/rv1108ddr_v1.00.bin spl.bin
   > cat spl.bin u-boot.bin > u-boot.img
 
 Flash the image by rkdeveloptool
@@ -16,7 +15,7 @@ Flash the image by rkdeveloptool
 rkdeveloptool can get from https://github.com/rockchip-linux/rkdeveloptool.git
 
 Power on(or reset with RESET KEY) with MASKROM KEY preesed, and then:
-  > rkdeveloptool db ./rkbin/rv1x/RV1108_usb_boot.bin
+  > rkdeveloptool db ./rkbin/rv1x/rv1108usbboot_v1.00.bin
   > rkdeveloptool wl 0x40 u-boot.img
   > rkdeveloptool RD
 

commit df3e17bde5d906390f6d5e02dbf8b10007e161bb
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Thu Dec 7 10:25:54 2017 +0800

    lib: optee_client: Fix compile error.
    
    this bug make compile error when we compile all code in android.
    
    Change-Id: Id9b8673576bee13c4df0990bd068548fa11458bf
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/Makefile b/lib/optee_clientApi/Makefile
index de8a3b4058..7d402989e7 100644
--- a/lib/optee_clientApi/Makefile
+++ b/lib/optee_clientApi/Makefile
@@ -13,4 +13,4 @@ obj-y += 258be795-f9ca-40e6-a8699ce6886c5d5d.o
 
 lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.o: lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c
 lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c: lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta
-	$(q)lib/optee_clientApi/tabinary_to_cfile.py --prefix keymaster --TA $< --out $@
+	$(srctree)/lib/optee_clientApi/tabinary_to_cfile.py --prefix keymaster --TA $< --out $@

commit 2d1049f50b25c0229adf6e1c312fc9def42eb3d0
Author: Xing Zheng <zhengxing@rock-chips.com>
Date:   Wed Dec 6 17:34:00 2017 +0800

    board: rockchip: add rk3288-evb-rk1608 board support
    
    The rk3288-evb-rk1608 is a development/evaluation for RK3288
    and RK1608. The RK3288 as Host AP, and the RK1608 as a
    Dual-cores DSP coprocessor, it provides high-performance
    professional computing capabilities to Host AP.
    
    They communicate with each other through MIPI and SPI. There
    is a good host environment on host RK3288, we can easily debug
    RK1608.
    
    Also, the rk3288-evb-rk1608 is different with rk3288-evb, so
    we need to add a independent BSP configuration for rk3288-evb-rk1608.
    
    Change-Id: I75ec0e14ee88acd9de7f809d7e88bca97a77a5c2
    Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>

diff --git a/arch/arm/dts/rk3288-evb-rk1608.dts b/arch/arm/dts/rk3288-evb-rk1608.dts
new file mode 100644
index 0000000000..5e8635c05b
--- /dev/null
+++ b/arch/arm/dts/rk3288-evb-rk1608.dts
@@ -0,0 +1,58 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+ X11
+ */
+
+/dts-v1/;
+#include "rk3288-evb-rk1608.dtsi"
+
+/ {
+	model = "Evb-RK3288-RK1608";
+	compatible = "rockchip,rk3288-evb-rk1608", "rockchip,rk3288";
+
+	chosen {
+		stdout-path = &uart2;
+	};
+};
+
+&dmc {
+	rockchip,pctl-timing = <0x29a 0xc8 0x1f8 0x42 0x4e 0x4 0xea 0xa
+		0x5 0x0 0xa 0x7 0x19 0x24 0xa 0x7
+		0x5 0xa 0x5 0x200 0x5 0x10 0x40 0x0
+		0x1 0x7 0x7 0x4 0xc 0x43 0x100 0x0
+		0x5 0x0>;
+	rockchip,phy-timing = <0x48f9aab4 0xea0910 0x1002c200
+		0xa60 0x40 0x10 0x0>;
+	/* Add a dummy value to cause of-platdata think this is bytes */
+	rockchip,sdram-params = <0x30B25564 0x627 3 666000000 3 9 1>;
+};
+
+&pinctrl {
+	u-boot,dm-pre-reloc;
+};
+
+&pwm1 {
+	status = "okay";
+};
+
+&uart2 {
+	u-boot,dm-pre-reloc;
+	reg-shift = <2>;
+};
+
+&sdmmc {
+	u-boot,dm-pre-reloc;
+};
+
+&emmc {
+	u-boot,dm-pre-reloc;
+};
+
+&gpio3 {
+	u-boot,dm-pre-reloc;
+};
+
+&gpio8 {
+	u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/rk3288-evb-rk1608.dtsi b/arch/arm/dts/rk3288-evb-rk1608.dtsi
new file mode 100644
index 0000000000..4f51961579
--- /dev/null
+++ b/arch/arm/dts/rk3288-evb-rk1608.dtsi
@@ -0,0 +1,455 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+ X11
+ */
+
+#include "rk3288.dtsi"
+
+/ {
+	memory {
+		reg = <0 0x80000000>;
+	};
+
+	ext_gmac: external-gmac-clock {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <125000000>;
+		clock-output-names = "ext_gmac";
+	};
+
+	vcc_sys: vsys-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_sys";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+		regulator-boot-on;
+	};
+
+	vcc_flash: flash-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_flash";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		vin-supply = <&vcc_io>;
+	};
+
+	vcc_5v: usb-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_5v";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+		regulator-boot-on;
+		vin-supply = <&vcc_sys>;
+	};
+
+	vcc_host_5v: usb-host-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&host_vbus_drv>;
+		regulator-name = "vcc_host_5v";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+		vin-supply = <&vcc_5v>;
+	};
+
+	vcc_otg_5v: usb-otg-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&otg_vbus_drv>;
+		regulator-name = "vcc_otg_5v";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+		vin-supply = <&vcc_5v>;
+	};
+
+	backlight: backlight {
+		compatible = "pwm-backlight";
+		power-supply = <&vcc_sys>;
+		enable-gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
+		brightness-levels = <
+			  0   1   2   3   4   5   6   7
+			  8   9  10  11  12  13  14  15
+			 16  17  18  19  20  21  22  23
+			 24  25  26  27  28  29  30  31
+			 32  33  34  35  36  37  38  39
+			 40  41  42  43  44  45  46  47
+			 48  49  50  51  52  53  54  55
+			 56  57  58  59  60  61  62  63
+			 64  65  66  67  68  69  70  71
+			 72  73  74  75  76  77  78  79
+			 80  81  82  83  84  85  86  87
+			 88  89  90  91  92  93  94  95
+			 96  97  98  99 100 101 102 103
+			104 105 106 107 108 109 110 111
+			112 113 114 115 116 117 118 119
+			120 121 122 123 124 125 126 127
+			128 129 130 131 132 133 134 135
+			136 137 138 139 140 141 142 143
+			144 145 146 147 148 149 150 151
+			152 153 154 155 156 157 158 159
+			160 161 162 163 164 165 166 167
+			168 169 170 171 172 173 174 175
+			176 177 178 179 180 181 182 183
+			184 185 186 187 188 189 190 191
+			192 193 194 195 196 197 198 199
+			200 201 202 203 204 205 206 207
+			208 209 210 211 212 213 214 215
+			216 217 218 219 220 221 222 223
+			224 225 226 227 228 229 230 231
+			232 233 234 235 236 237 238 239
+			240 241 242 243 244 245 246 247
+			248 249 250 251 252 253 254 255>;
+		default-brightness-level = <50>;
+		pwms = <&pwm0 0 25000 0>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwm0_pin>;
+		pwm-delay-us = <10000>;
+		status = "disabled";
+	};
+
+	panel: panel {
+		compatible = "simple-panel";
+		power-supply = <&vcc_io>;
+		backlight = <&backlight>;
+		enable-gpios = <&gpio7 3 GPIO_ACTIVE_HIGH>;
+		status = "disabled";
+	};
+};
+
+&cpu0 {
+	cpu0-supply = <&vdd_cpu>;
+};
+
+&emmc {
+	broken-cd;
+	bus-width = <8>;
+	cap-mmc-highspeed;
+	disable-wp;
+	non-removable;
+	num-slots = <1>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_pwr>, <&emmc_bus8>;
+	vmmc-supply = <&vcc_io>;
+	vqmmc-supply = <&vcc_flash>;
+	status = "okay";
+};
+
+&gmac {
+	phy-mode = "rgmii";
+	clock_in_out = "input";
+	snps,reset-gpio = <&gpio4 7 0>;
+	snps,reset-active-low;
+	snps,reset-delays-us = <0 10000 1000000>;
+	assigned-clocks = <&cru SCLK_MAC>;
+	assigned-clock-parents = <&ext_gmac>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&rgmii_pins>;
+	tx_delay = <0x30>;
+	rx_delay = <0x10>;
+	status = "okay";
+};
+
+&i2c0 {
+	clock-frequency = <400000>;
+	status = "okay";
+
+	vdd_cpu: syr827@40 {
+		compatible = "silergy,syr827";
+		fcs,suspend-voltage-selector = <1>;
+		reg = <0x40>;
+		regulator-name = "vdd_cpu";
+		regulator-min-microvolt = <850000>;
+		regulator-max-microvolt = <1350000>;
+		regulator-always-on;
+		regulator-boot-on;
+		vin-supply = <&vcc_sys>;
+	};
+
+	vdd_gpu: syr828@41 {
+		compatible = "silergy,syr828";
+		fcs,suspend-voltage-selector = <1>;
+		reg = <0x41>;
+		regulator-name = "vdd_gpu";
+		regulator-min-microvolt = <850000>;
+		regulator-max-microvolt = <1350000>;
+		regulator-always-on;
+		vin-supply = <&vcc_sys>;
+	};
+
+	hym8563: hym8563@51 {
+		compatible = "haoyu,hym8563";
+		reg = <0x51>;
+		#clock-cells = <0>;
+		clock-frequency = <32768>;
+		clock-output-names = "xin32k";
+		interrupt-parent = <&gpio7>;
+		interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&rtc_int>;
+	};
+
+	act8846: act8846@5a {
+		compatible = "active-semi,act8846";
+		reg = <0x5a>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwr_hold>;
+		system-power-controller;
+
+		regulators {
+			vcc_ddr: REG1 {
+				regulator-name = "vcc_ddr";
+				regulator-min-microvolt = <1200000>;
+				regulator-max-microvolt = <1200000>;
+				regulator-always-on;
+			};
+
+			vcc_io: REG2 {
+				regulator-name = "vcc_io";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+			};
+
+			vdd_log: REG3 {
+				regulator-name = "vdd_log";
+				regulator-min-microvolt = <1100000>;
+				regulator-max-microvolt = <1100000>;
+				regulator-always-on;
+			};
+
+			vcc_20: REG4 {
+				regulator-name = "vcc_20";
+				regulator-min-microvolt = <2000000>;
+				regulator-max-microvolt = <2000000>;
+				regulator-always-on;
+			};
+
+			vccio_sd: REG5 {
+				regulator-name = "vccio_sd";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+			};
+
+			vdd10_lcd: REG6 {
+				regulator-name = "vdd10_lcd";
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+				regulator-always-on;
+			};
+
+			vcca_codec: REG7 {
+				regulator-name = "vcca_codec";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+			};
+
+			vcc_tp: REG8 {
+				regulator-name = "vcca_33";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+			};
+
+			vccio_pmu: REG9 {
+				regulator-name = "vccio_pmu";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+			};
+
+			vdd_10: REG10 {
+				regulator-name = "vdd_10";
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+				regulator-always-on;
+			};
+
+			vcc_18: REG11 {
+				regulator-name = "vcc_18";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+			};
+
+			vcc18_lcd: REG12 {
+				regulator-name = "vcc18_lcd";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+			};
+		};
+	};
+};
+
+&i2c1 {
+	status = "okay";
+};
+
+&i2c2 {
+	status = "okay";
+};
+
+&i2c4 {
+	status = "okay";
+};
+
+&i2c5 {
+	status = "okay";
+};
+
+&pinctrl {
+	pcfg_output_high: pcfg-output-high {
+		output-high;
+	};
+
+	pcfg_output_low: pcfg-output-low {
+		output-low;
+	};
+
+	act8846 {
+		pwr_hold: pwr-hold {
+			rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_output_high>;
+		};
+	};
+
+	hym8563 {
+		rtc_int: rtc-int {
+			rockchip,pins = <0 4 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+
+	sdmmc {
+		sdmmc_pwr: sdmmc-pwr {
+			rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	usb_host {
+		host_vbus_drv: host-vbus-drv {
+			rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	usb_otg {
+		otg_vbus_drv: otg-vbus-drv {
+			rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};
+
+&pwm0 {
+	status = "okay";
+};
+
+&saradc {
+	vref-supply = <&vcc_18>;
+	status = "okay";
+};
+
+&sdio0 {
+	broken-cd;
+	bus-width = <4>;
+	disable-wp;
+	non-removable;
+	num-slots = <1>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sdio0_bus4>, <&sdio0_cmd>, <&sdio0_clk>;
+	vmmc-supply = <&vcc_18>;
+	status = "disabled";
+};
+
+&sdmmc {
+	bus-width = <4>;
+	cap-mmc-highspeed;
+	cap-sd-highspeed;
+	card-detect-delay = <200>;
+	disable-wp;
+	num-slots = <1>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sdmmc_clk>, <&sdmmc_cmd>, <&sdmmc_cd>, <&sdmmc_bus4>;
+	vmmc-supply = <&vccio_sd>;
+	status = "okay";
+};
+
+&spi0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&spi0_clk>, <&spi0_cs0>, <&spi0_tx>, <&spi0_rx>, <&spi0_cs1>;
+	status = "okay";
+};
+
+&uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_xfer>, <&uart0_cts>, <&uart0_rts>;
+	status = "okay";
+};
+
+&uart1 {
+	status = "okay";
+};
+
+&uart2 {
+	status = "okay";
+};
+
+&uart3 {
+	status = "okay";
+};
+
+&usb_host1 {
+	status = "okay";
+};
+
+&usb_otg {
+	status = "okay";
+};
+
+&vopb {
+	status = "okay";
+};
+
+&vopb_mmu {
+	status = "okay";
+};
+
+&vopl {
+	status = "okay";
+};
+
+&vopl_mmu {
+	status = "okay";
+};
+
+&mipi_dsi0 {
+	status = "disabled";
+	rockchip,panel = <&panel>;
+	display-timings {
+		timing0 {
+			bits-per-pixel = <24>;
+			clock-frequency = <160000000>;
+			hfront-porch = <120>;
+			hsync-len = <20>;
+			hback-porch = <21>;
+			hactive = <1200>;
+			vfront-porch = <21>;
+			vsync-len = <3>;
+			vback-porch = <18>;
+			vactive = <1920>;
+			hsync-active = <0>;
+			vsync-active = <0>;
+			de-active = <1>;
+			pixelclk-active = <0>;
+		};
+	};
+};
+
+&wdt {
+	status = "okay";
+};
diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig
index 9da8c8109d..1fecdd4add 100644
--- a/arch/arm/mach-rockchip/rk3288/Kconfig
+++ b/arch/arm/mach-rockchip/rk3288/Kconfig
@@ -39,6 +39,17 @@ config TARGET_EVB_RK3288
 	  also includes on-board eMMC and 2GB of SDRAM. Expansion connectors
 	  provide access to display pins, I2C, SPI, UART and GPIOs.
 
+config TARGET_EVB_RK3288_RK1608
+	bool "Evb-RK3288-RK1608"
+	select BOARD_LATE_INIT
+	help
+	  The EVB-RK3288-RK1608 includes a Host AP RK3288 and a DSP coprocessor
+	  RK1608. The EVB can help us to develop the RK1608 easily through a
+	  good RK3288 host environment. On the RK3288 side, there are 2 USB
+	  ports, MIPI, micro-SD card, WiFi and Gigabit Ethernet, It also
+	  includes on-board eMMC and 2GB of DDR3. Expansion connectors provide
+	  access to display pins, I2C, SPI, UART and GPIOs.
+
 config TARGET_FENNEC_RK3288
 	bool "Fennec-RK3288"
 	select BOARD_LATE_INIT
@@ -151,6 +162,8 @@ source "board/radxa/rock2/Kconfig"
 
 source "board/rockchip/evb_rk3288/Kconfig"
 
+source "board/rockchip/evb_rk3288_rk1608/Kconfig"
+
 source "board/rockchip/fennec_rk3288/Kconfig"
 
 source "board/rockchip/tinker_rk3288/Kconfig"
diff --git a/board/rockchip/evb_rk3288_rk1608/Kconfig b/board/rockchip/evb_rk3288_rk1608/Kconfig
new file mode 100644
index 0000000000..317fa88607
--- /dev/null
+++ b/board/rockchip/evb_rk3288_rk1608/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_EVB_RK3288_RK1608
+
+config SYS_BOARD
+	default "evb_rk3288_rk1608"
+
+config SYS_VENDOR
+	default "rockchip"
+
+config SYS_CONFIG_NAME
+	default "evb_rk3288_rk1608"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+
+endif
diff --git a/board/rockchip/evb_rk3288_rk1608/MAINTAINERS b/board/rockchip/evb_rk3288_rk1608/MAINTAINERS
new file mode 100644
index 0000000000..a5a0f36eed
--- /dev/null
+++ b/board/rockchip/evb_rk3288_rk1608/MAINTAINERS
@@ -0,0 +1,6 @@
+EVB-RK3288-RK1608
+M:	Xing Zheng <zhengxing@rock-chips.com>
+S:	Maintained
+F:	board/rockchip/evb_rk3288_rk1608
+F:	include/configs/evb_rk3288_rk1608.h
+F:	configs/evb-rk3288-rk1608_defconfig
diff --git a/board/rockchip/evb_rk3288_rk1608/Makefile b/board/rockchip/evb_rk3288_rk1608/Makefile
new file mode 100644
index 0000000000..cad3527c97
--- /dev/null
+++ b/board/rockchip/evb_rk3288_rk1608/Makefile
@@ -0,0 +1,7 @@
+#
+# (C) Copyright 2017 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y += evb-rk3288-rk1608.o
diff --git a/board/rockchip/evb_rk3288_rk1608/evb-rk3288-rk1608.c b/board/rockchip/evb_rk3288_rk1608/evb-rk3288-rk1608.c
new file mode 100644
index 0000000000..db332b4872
--- /dev/null
+++ b/board/rockchip/evb_rk3288_rk1608/evb-rk3288-rk1608.c
@@ -0,0 +1,15 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <spl.h>
+
+void board_boot_order(u32 *spl_boot_list)
+{
+	/* eMMC prior to sdcard. */
+	spl_boot_list[0] = BOOT_DEVICE_MMC2;
+	spl_boot_list[1] = BOOT_DEVICE_MMC1;
+}
diff --git a/configs/evb-rk3288-rk1608_defconfig b/configs/evb-rk3288-rk1608_defconfig
new file mode 100644
index 0000000000..f81bf138cb
--- /dev/null
+++ b/configs/evb-rk3288-rk1608_defconfig
@@ -0,0 +1,82 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_ROCKCHIP_RK3288=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_TARGET_EVB_RK3288_RK1608=y
+CONFIG_SPL_STACK_R_ADDR=0x80000
+CONFIG_DEFAULT_DEVICE_TREE="rk3288-evb-rk1608"
+CONFIG_DEBUG_UART=y
+# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_SILENT_CONSOLE=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_PMIC=y
+CONFIG_CMD_REGULATOR=y
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_ISO_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_SPL_PARTITION_UUIDS=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+# CONFIG_SPL_PINCTRL_FULL is not set
+CONFIG_PINCTRL_ROCKCHIP_RK3288=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_ACT8846=y
+CONFIG_REGULATOR_ACT8846=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_DEBUG_UART_BASE=0xff690000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x320a
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_VIDEO_ROCKCHIP_MAX_YRES=1200
+CONFIG_DISPLAY_ROCKCHIP_MIPI=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_CMD_DHRYSTONE=y
+CONFIG_ERRNO_STR=y
diff --git a/include/configs/evb_rk3288_rk1608.h b/include/configs/evb_rk3288_rk1608.h
new file mode 100644
index 0000000000..8efd300d44
--- /dev/null
+++ b/include/configs/evb_rk3288_rk1608.h
@@ -0,0 +1,15 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define ROCKCHIP_DEVICE_SETTINGS
+#include <configs/rk3288_common.h>
+
+#define CONFIG_SYS_MMC_ENV_DEV 0
+
+#endif

commit 8676c3314ab8b01fb8e3c63bdbae4d781c689bc1
Author: Caesar Wang <wxt@rock-chips.com>
Date:   Wed Nov 29 15:03:19 2017 +0800

    rockchip/rk3036: sdram: update the ddr for 400MHz
    
    As the emac need get the 50MHz frequency and the parent clock is dpll,
    So we will update this to fix it.
    
    Change-Id: I5b8f344dab263e9e0df72bf521394984b59ea9fe
    Signed-off-by: Caesar Wang <wxt@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
index e6e8bff219..ffcf4de65f 100644
--- a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
+++ b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
@@ -34,12 +34,12 @@ struct rk3036_sdram_priv {
 	struct rk3036_ddr_config ddr_config;
 };
 
-/* use integer mode, 396MHz dpll setting
+/* use integer mode, 800MHz dpll setting
  * refdiv, fbdiv, postdiv1, postdiv2
  */
-const struct pll_div dpll_init_cfg = {1, 66, 2, 1};
+const struct pll_div dpll_init_cfg = {1, 100, 3, 1};
 
-/* 396Mhz ddr timing */
+/* 400Mhz ddr timing */
 const struct rk3036_ddr_timing ddr_timing = {0x18c,
 	{0x18c, 0xc8, 0x1f4, 0x27, 0x4e,
 	0x4, 0x8b, 0x06, 0x03, 0x0, 0x06, 0x05, 0x0f, 0x15, 0x06, 0x04, 0x04,

commit 85993e5ff6b7f6c516c99c89174cb49572f5eb32
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Mon Nov 27 17:58:39 2017 +0800

    drm/rockchip: Complete missing header files
    
    Change-Id: I36c1a0663afbedcfc82b1f6a71d9e8f8fa6ac26b
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>

diff --git a/include/linux/dw_hdmi.h b/include/linux/dw_hdmi.h
new file mode 100644
index 0000000000..83b65e9b92
--- /dev/null
+++ b/include/linux/dw_hdmi.h
@@ -0,0 +1,161 @@
+/*
+ * Copyright (C) 2011 Freescale Semiconductor, Inc.
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+#ifndef __DW_HDMI__
+#define __DW_HDMI__
+
+/**
+ * DOC: Supported input formats and encodings
+ *
+ * Depending on the Hardware configuration of the Controller IP, it supports
+ * a subset of the following input formats and encodings on its internal
+ * 48bit bus.
+ *
+ * +----------------------+----------------------------------+------------------------------+
+ * + Format Name          + Format Code                      + Encodings                    +
+ * +----------------------+----------------------------------+------------------------------+
+ * + RGB 4:4:4 8bit       + ``MEDIA_BUS_FMT_RGB888_1X24``    + ``V4L2_YCBCR_ENC_DEFAULT``   +
+ * +----------------------+----------------------------------+------------------------------+
+ * + RGB 4:4:4 10bits     + ``MEDIA_BUS_FMT_RGB101010_1X30`` + ``V4L2_YCBCR_ENC_DEFAULT``   +
+ * +----------------------+----------------------------------+------------------------------+
+ * + RGB 4:4:4 12bits     + ``MEDIA_BUS_FMT_RGB121212_1X36`` + ``V4L2_YCBCR_ENC_DEFAULT``   +
+ * +----------------------+----------------------------------+------------------------------+
+ * + RGB 4:4:4 16bits     + ``MEDIA_BUS_FMT_RGB161616_1X48`` + ``V4L2_YCBCR_ENC_DEFAULT``   +
+ * +----------------------+----------------------------------+------------------------------+
+ * + YCbCr 4:4:4 8bit     + ``MEDIA_BUS_FMT_YUV8_1X24``      + ``V4L2_YCBCR_ENC_601``       +
+ * +                      +                                  + or ``V4L2_YCBCR_ENC_709``    +
+ * +                      +                                  + or ``V4L2_YCBCR_ENC_XV601``  +
+ * +                      +                                  + or ``V4L2_YCBCR_ENC_XV709``  +
+ * +----------------------+----------------------------------+------------------------------+
+ * + YCbCr 4:4:4 10bits   + ``MEDIA_BUS_FMT_YUV10_1X30``     + ``V4L2_YCBCR_ENC_601``       +
+ * +                      +                                  + or ``V4L2_YCBCR_ENC_709``    +
+ * +                      +                                  + or ``V4L2_YCBCR_ENC_XV601``  +
+ * +                      +                                  + or ``V4L2_YCBCR_ENC_XV709``  +
+ * +----------------------+----------------------------------+------------------------------+
+ * + YCbCr 4:4:4 12bits   + ``MEDIA_BUS_FMT_YUV12_1X36``     + ``V4L2_YCBCR_ENC_601``       +
+ * +                      +                                  + or ``V4L2_YCBCR_ENC_709``    +
+ * +                      +                                  + or ``V4L2_YCBCR_ENC_XV601``  +
+ * +                      +                                  + or ``V4L2_YCBCR_ENC_XV709``  +
+ * +----------------------+----------------------------------+------------------------------+
+ * + YCbCr 4:4:4 16bits   + ``MEDIA_BUS_FMT_YUV16_1X48``     + ``V4L2_YCBCR_ENC_601``       +
+ * +                      +                                  + or ``V4L2_YCBCR_ENC_709``    +
+ * +                      +                                  + or ``V4L2_YCBCR_ENC_XV601``  +
+ * +                      +                                  + or ``V4L2_YCBCR_ENC_XV709``  +
+ * +----------------------+----------------------------------+------------------------------+
+ * + YCbCr 4:2:2 8bit     + ``MEDIA_BUS_FMT_UYVY8_1X16``     + ``V4L2_YCBCR_ENC_601``       +
+ * +                      +                                  + or ``V4L2_YCBCR_ENC_709``    +
+ * +----------------------+----------------------------------+------------------------------+
+ * + YCbCr 4:2:2 10bits   + ``MEDIA_BUS_FMT_UYVY10_1X20``    + ``V4L2_YCBCR_ENC_601``       +
+ * +                      +                                  + or ``V4L2_YCBCR_ENC_709``    +
+ * +----------------------+----------------------------------+------------------------------+
+ * + YCbCr 4:2:2 12bits   + ``MEDIA_BUS_FMT_UYVY12_1X24``    + ``V4L2_YCBCR_ENC_601``       +
+ * +                      +                                  + or ``V4L2_YCBCR_ENC_709``    +
+ * +----------------------+----------------------------------+------------------------------+
+ * + YCbCr 4:2:0 8bit     + ``MEDIA_BUS_FMT_UYYVYY8_0_5X24`` + ``V4L2_YCBCR_ENC_601``       +
+ * +                      +                                  + or ``V4L2_YCBCR_ENC_709``    +
+ * +----------------------+----------------------------------+------------------------------+
+ * + YCbCr 4:2:0 10bits   + ``MEDIA_BUS_FMT_UYYVYY10_0_5X30``+ ``V4L2_YCBCR_ENC_601``       +
+ * +                      +                                  + or ``V4L2_YCBCR_ENC_709``    +
+ * +----------------------+----------------------------------+------------------------------+
+ * + YCbCr 4:2:0 12bits   + ``MEDIA_BUS_FMT_UYYVYY12_0_5X36``+ ``V4L2_YCBCR_ENC_601``       +
+ * +                      +                                  + or ``V4L2_YCBCR_ENC_709``    +
+ * +----------------------+----------------------------------+------------------------------+
+ * + YCbCr 4:2:0 16bits   + ``MEDIA_BUS_FMT_UYYVYY16_0_5X48``+ ``V4L2_YCBCR_ENC_601``       +
+ * +                      +                                  + or ``V4L2_YCBCR_ENC_709``    +
+ * +----------------------+----------------------------------+------------------------------+
+ */
+
+enum {
+	DW_HDMI_RES_8,
+	DW_HDMI_RES_10,
+	DW_HDMI_RES_12,
+	DW_HDMI_RES_MAX,
+};
+
+enum dw_hdmi_devtype {
+	IMX6Q_HDMI,
+	IMX6DL_HDMI,
+	RK3228_HDMI,
+	RK3288_HDMI,
+	RK3328_HDMI,
+	RK3366_HDMI,
+	RK3368_HDMI,
+	RK3399_HDMI,
+};
+
+struct dw_hdmi_audio_tmds_n {
+	unsigned long tmds;
+	unsigned int n_32k;
+	unsigned int n_44k1;
+	unsigned int n_48k;
+};
+
+enum dw_hdmi_phy_type {
+	DW_HDMI_PHY_DWC_HDMI_TX_PHY = 0x00,
+	DW_HDMI_PHY_DWC_MHL_PHY_HEAC = 0xb2,
+	DW_HDMI_PHY_DWC_MHL_PHY = 0xc2,
+	DW_HDMI_PHY_DWC_HDMI_3D_TX_PHY_HEAC = 0xe2,
+	DW_HDMI_PHY_DWC_HDMI_3D_TX_PHY = 0xf2,
+	DW_HDMI_PHY_DWC_HDMI20_TX_PHY = 0xf3,
+	DW_HDMI_PHY_VENDOR_PHY = 0xfe,
+};
+
+struct dw_hdmi_mpll_config {
+	unsigned long mpixelclock;
+	struct {
+		u16 cpce;
+		u16 gmp;
+	} res[DW_HDMI_RES_MAX];
+};
+
+struct dw_hdmi_curr_ctrl {
+	unsigned long mpixelclock;
+	u16 curr[DW_HDMI_RES_MAX];
+};
+
+struct dw_hdmi_phy_config {
+	unsigned long mpixelclock;
+	u16 sym_ctr;    /*clock symbol and transmitter control*/
+	u16 term;       /*transmission termination value*/
+	u16 vlev_ctr;   /* voltage level control */
+};
+
+struct dw_hdmi_phy_ops {
+	int (*init)(struct dw_hdmi *hdmi, void *data,
+		    struct drm_display_mode *mode);
+	void (*disable)(struct dw_hdmi *hdmi, void *data);
+	enum drm_connector_status (*read_hpd)(struct dw_hdmi *hdmi, void *data);
+};
+
+struct dw_hdmi_plat_data {
+	enum dw_hdmi_devtype dev_type;
+	unsigned long input_bus_format;
+	unsigned long input_bus_encoding;
+	u32 vop_sel_bit;
+	u32 grf_vop_sel_reg;
+	/* Vendor PHY support */
+	const struct dw_hdmi_phy_ops *phy_ops;
+	const struct dw_hdmi_audio_tmds_n *tmds_n_table;
+	const char *phy_name;
+	void *phy_data;
+
+	/* Synopsys PHY support */
+	const struct dw_hdmi_mpll_config *mpll_cfg;
+	const struct dw_hdmi_curr_ctrl *cur_ctr;
+	const struct dw_hdmi_phy_config *phy_config;
+	int (*configure_phy)(struct dw_hdmi *hdmi,
+			     const struct dw_hdmi_plat_data *pdata,
+			     unsigned long mpixelclock);
+	unsigned long (*get_input_bus_format)(void *data);
+	unsigned long (*get_output_bus_format)(void *data);
+	unsigned long (*get_enc_in_encoding)(void *data);
+	unsigned long (*get_enc_out_encoding)(void *data);
+};
+
+#endif /* __IMX_HDMI_H__ */

commit 50982e19a8336049bc49dbf4b9beb03d4ec4a301
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Wed Dec 6 09:57:09 2017 +0800

    rockchip: evb_rv1108: read zImage from offset 0xc0000
    
    Load kernel image(zImage + dtb) start block 0x600.
    
    Change-Id: I426e6834a42e994a215332fa04bf6b1d0751006d
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/include/configs/evb_rv1108.h b/include/configs/evb_rv1108.h
index ff3531b321..c02ce65b28 100644
--- a/include/configs/evb_rv1108.h
+++ b/include/configs/evb_rv1108.h
@@ -19,7 +19,7 @@
 	""
 #define CONFIG_BOOTCOMMAND						\
 	"sf probe;"							\
-	"sf read 0x62000000 0x140800 0x500000;"				\
+	"sf read 0x62000000 0xc0000 0x500000;"				\
 	"dcache off;"							\
 	"go 0x62000000"
 

commit b4e776703f81c7d502d6eac6911110d52f17229d
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Wed Dec 6 09:56:29 2017 +0800

    rockchip: evb_rv1108: enable ROCKCHIP_SFC
    
    This enable Rockchip Serial Flash controller for
    SPI Nor divices.
    
    Change-Id: I5ee3a0697336be04b5619e4592a2c49de7099cf9
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig
index 1713cc6468..c7ef594071 100644
--- a/configs/evb-rv1108_defconfig
+++ b/configs/evb-rv1108_defconfig
@@ -43,6 +43,7 @@ CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0x10210000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_ROCKCHIP_SFC=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y

commit c1cd6cb672251f2568450829c103d57efa450247
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Tue Aug 8 09:43:39 2017 +0800

    driver: spi: add rockchip sfc support
    
    SFC stands for Serial Flash Controller on some
    rockchip platforms such as RV1108 / RK3128.
    
    This patch add support for it with Standard,Dual,Quad
    mode.
    
    Change-Id: Iaf60a789d4806371679fd0c0e1b2adf4fc04f85c
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 3c5582a950..e168ed6b15 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -99,6 +99,14 @@ config ROCKCHIP_SPI
 	  This uses driver model and requires a device tree binding to
 	  operate.
 
+config ROCKCHIP_SFC
+	bool "Rockchip SFC driver"
+	help
+	  Enable the Rockchip SFC driver, used to access SPI NOR flash
+	  on Rockchip SoCs.
+	  This uses driver model and requires a device tree binding to
+	  operate.
+
 config SANDBOX_SPI
 	bool "Sandbox SPI driver"
 	depends on SANDBOX && DM
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 9f8b86de76..052c6082b0 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -38,6 +38,7 @@ obj-$(CONFIG_MXS_SPI) += mxs_spi.o
 obj-$(CONFIG_OMAP3_SPI) += omap3_spi.o
 obj-$(CONFIG_PIC32_SPI) += pic32_spi.o
 obj-$(CONFIG_ROCKCHIP_SPI) += rk_spi.o
+obj-$(CONFIG_ROCKCHIP_SFC) += rockchip_sfc.o
 obj-$(CONFIG_SANDBOX_SPI) += sandbox_spi.o
 obj-$(CONFIG_SH_SPI) += sh_spi.o
 obj-$(CONFIG_SH_QSPI) += sh_qspi.o
diff --git a/drivers/spi/rockchip_sfc.c b/drivers/spi/rockchip_sfc.c
new file mode 100644
index 0000000000..4388e51920
--- /dev/null
+++ b/drivers/spi/rockchip_sfc.c
@@ -0,0 +1,402 @@
+/*
+ * sfc driver for rockchip
+ *
+ * (C) Copyright 2008-2016 Rockchip Electronics
+ * Yifeng.zhao, Software Engineering, <zhao0116@gmail.com>.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <dt-structs.h>
+#include <errno.h>
+#include <spi.h>
+#include <linux/errno.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/periph.h>
+#include <dm/pinctrl.h>
+#include "rockchip_sfc.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+enum rockchip_sfc_if_type {
+	IF_TYPE_STD,
+	IF_TYPE_DUAL,
+	IF_TYPE_QUAD,
+};
+
+struct rockchip_sfc_platdata {
+	s32 frequency;
+	fdt_addr_t base;
+};
+
+struct rockchip_sfc {
+	struct rockchip_sfc_reg *regbase;
+	struct clk clk;
+	unsigned int max_freq;
+	unsigned int mode;
+	unsigned int speed_hz;
+	u32 cmd;
+	u32 addr;
+};
+
+static int rockchip_sfc_ofdata_to_platdata(struct udevice *bus)
+{
+	struct rockchip_sfc_platdata *plat = dev_get_platdata(bus);
+	struct rockchip_sfc *sfc = dev_get_priv(bus);
+	const void *blob = gd->fdt_blob;
+	int node = dev_of_offset(bus);
+	int subnode;
+	int ret;
+
+	plat->base = devfdt_get_addr(bus);
+
+	ret = clk_get_by_index(bus, 0, &sfc->clk);
+	if (ret < 0) {
+		debug("Could not get clock for %s: %d\n", bus->name, ret);
+		return ret;
+	}
+
+	subnode = fdt_first_subnode(blob, node);
+	if (subnode < 0) {
+		debug("Error: subnode with SPI flash config missing!\n");
+		return -ENODEV;
+	}
+
+	plat->frequency = fdtdec_get_int(blob, subnode, "spi-max-frequency",
+					 100000000);
+
+	return 0;
+}
+
+static int rockchip_sfc_probe(struct udevice *bus)
+{
+	struct rockchip_sfc_platdata *plat = dev_get_platdata(bus);
+	struct rockchip_sfc *sfc = dev_get_priv(bus);
+	int ret;
+
+	sfc->regbase = (struct rockchip_sfc_reg *)plat->base;
+
+	sfc->max_freq = plat->frequency;
+
+	ret = clk_set_rate(&sfc->clk, sfc->max_freq);
+	if (ret < 0) {
+		debug("%s: Failed to set clock: %d\n", __func__, ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int rockchip_sfc_reset(struct rockchip_sfc *sfc)
+{
+	struct rockchip_sfc_reg *regs = sfc->regbase;
+	int tbase = get_timer(0);
+	u32 rcvr;
+	int ret = 0;
+
+	writel(SFC_RESET, &regs->rcvr);
+	do {
+		rcvr = readl(&regs->rcvr);
+		if (get_timer(tbase) > 1000) {
+			debug("sfc reset timeout\n");
+			ret =  -ETIMEDOUT;
+			break;
+		}
+		udelay(1);
+	} while (rcvr);
+
+	writel(0xFFFFFFFF, &regs->iclr);
+
+	debug("sfc reset\n");
+
+	return ret;
+}
+
+static u8 rockchip_sfc_get_if_type(struct rockchip_sfc *sfc)
+{
+	int type = IF_TYPE_STD;
+
+	if (sfc->cmd & SFC_WR) {
+		if (sfc->mode & SPI_TX_QUAD)
+			type = IF_TYPE_QUAD;
+		else if (sfc->mode & SPI_TX_DUAL)
+			type = IF_TYPE_DUAL;
+		else
+			type = IF_TYPE_STD;
+	} else {
+		if (sfc->mode & SPI_RX_QUAD)
+			type = IF_TYPE_QUAD;
+		else if (sfc->mode & SPI_RX_DUAL)
+			type = IF_TYPE_DUAL;
+		else
+			type = IF_TYPE_STD;
+	}
+
+	return type;
+}
+
+static void rockchip_sfc_setup_xfer(struct rockchip_sfc *sfc)
+{
+	struct rockchip_sfc_reg *regs = sfc->regbase;
+	u32 val = 0x02;
+	u32 fsr = readl(&regs->fsr);
+	u32 sr = readl(&regs->sr);
+	u8 data_width = IF_TYPE_STD;
+
+	if (!(fsr & SFC_TX_EMPTY) || !(fsr & SFC_RX_EMPTY) || (sr & SFC_BUSY))
+		rockchip_sfc_reset(sfc);
+
+	if (sfc->cmd & SFC_ADDR_XBITS)
+		data_width = rockchip_sfc_get_if_type(sfc);
+
+	val |= (data_width << SFC_DATA_WIDTH_SHIFT);
+
+	writel(val, &regs->ctrl);
+	writel(sfc->cmd, &regs->cmd);
+	if (sfc->cmd & SFC_ADDR_XBITS)
+		writel(sfc->addr, &regs->addr);
+}
+
+static int rockchip_sfc_do_dma_xfer(struct rockchip_sfc *sfc, u32 *buffer)
+{
+	struct rockchip_sfc_reg *regs = sfc->regbase;
+	int timeout = 1000;
+	int ret = 0;
+	int risr;
+	unsigned long tbase;
+
+	rockchip_sfc_setup_xfer(sfc);
+
+	writel(0xFFFFFFFF, &regs->iclr);
+	writel((u32)buffer, &regs->dmaaddr);
+	writel(SFC_DMA_START, &regs->dmatr);
+
+	tbase = get_timer(0);
+	do {
+		udelay(1);
+		risr = readl(&regs->risr);
+		if (get_timer(tbase) > timeout) {
+			debug("dma timeout\n");
+			ret = -ETIMEDOUT;
+			break;
+		}
+	} while (!(risr & TRANS_FINISH_INT));
+
+	writel(0xFFFFFFFF, &regs->iclr);
+
+	return ret;
+}
+
+static int rockchip_sfc_dma_xfer(struct rockchip_sfc *sfc, u32 *buf, u32 len)
+{
+	u32 trb;
+	u32 *p32_data = buf;
+	int ret = 0;
+
+	while (len) {
+		trb = min(len, (u32)SFC_MAX_TRB);
+		sfc->cmd |= (trb << SFC_TRB_SHIFT);
+		ret = rockchip_sfc_do_dma_xfer(sfc, p32_data);
+		if (ret < 0)
+			break;
+		len -= trb;
+		sfc->addr += trb;
+		p32_data += (trb >> 2);
+	}
+
+	return ret;
+}
+
+static int rockchip_sfc_wait_fifo_ready(struct rockchip_sfc *sfc, int wr,
+					u32 timeout)
+{
+	struct rockchip_sfc_reg *regs = sfc->regbase;
+	unsigned long tbase = get_timer(0);
+	u8 level;
+	u32 fsr;
+
+	do {
+		fsr = readl(&regs->fsr);
+		if (wr)
+			level = (fsr & SFC_TXLV_MASK) >> SFC_TXLV_SHIFT;
+		else
+			level = (fsr & SFC_RXLV_MASK) >> SFC_RXLV_SHIFT;
+		if (get_timer(tbase) > timeout)
+			return -ETIMEDOUT;
+		udelay(1);
+	} while (!level);
+
+	return level;
+}
+
+static int rockchip_sfc_write(struct rockchip_sfc *sfc, u32 *buf, u32 len)
+{
+	struct rockchip_sfc_reg *regs = sfc->regbase;
+	u32 bytes = len & 0x3;
+	u32 words = len >> 2;
+	u32 tx_level = 0;
+	u32 val = 0;
+	u8 count;
+
+	while (words) {
+		tx_level = rockchip_sfc_wait_fifo_ready(sfc, 1, 1000);
+		if (tx_level <= 0)
+			return tx_level;
+		count = min(words, tx_level);
+		writesl(&regs->data, buf, count);
+		buf += count;
+		words -= count;
+	}
+
+	/* handle the last none word aligned bytes */
+	if (bytes) {
+		tx_level = rockchip_sfc_wait_fifo_ready(sfc, 1, 1000);
+		if (tx_level <= 0)
+			return tx_level;
+		memcpy(&val, buf, bytes);
+		writel(val, &regs->data);
+	}
+
+	return 0;
+}
+
+static int rockchip_sfc_read(struct rockchip_sfc *sfc, u32 *buf, u32 len)
+{
+	struct rockchip_sfc_reg *regs = sfc->regbase;
+	u32 bytes = len & 0x3;
+	u32 words = len >> 2;
+	u32 rx_level = 0;
+	u32 count;
+	u32 val;
+
+	while (words) {
+		rx_level = rockchip_sfc_wait_fifo_ready(sfc, 0, 1000);
+		if (rx_level <= 0)
+			return rx_level;
+		count = min(words, rx_level);
+		readsl(&regs->data, buf, count);
+		buf += count;
+		words -= count;
+	}
+
+	/* handle the last none word aligned bytes */
+	if (bytes) {
+		rx_level = rockchip_sfc_wait_fifo_ready(sfc, 0, 1000);
+		if (rx_level <= 0)
+			return rx_level;
+		val = readl(&regs->data);
+		memcpy(buf, &val, bytes);
+	}
+
+	return 0;
+}
+
+static int rockchip_sfc_pio_xfer(struct rockchip_sfc *sfc, u32 *buf, u32 len)
+{
+	int ret = 0;
+	int rw = sfc->cmd & SFC_WR;
+
+	sfc->cmd |= (len << SFC_TRB_SHIFT);
+	rockchip_sfc_setup_xfer(sfc);
+
+	if (len) {
+		if (rw)
+			ret = rockchip_sfc_write(sfc, buf, len);
+		else
+			ret = rockchip_sfc_read(sfc, buf, len);
+	}
+
+	return ret;
+}
+
+static int rockchip_sfc_do_xfer(struct rockchip_sfc *sfc, u32 *buf, u32 len)
+{
+	int ret = 0;
+
+	if (!(len & 0x03) && (len >= 4))
+		ret = rockchip_sfc_dma_xfer(sfc, buf, len);
+	else
+		ret = rockchip_sfc_pio_xfer(sfc, buf, len);
+
+	return ret;
+}
+
+static int rockchip_sfc_xfer(struct udevice *dev, unsigned int bitlen,
+			     const void *dout, void *din, unsigned long flags)
+{
+	struct udevice *bus = dev->parent;
+	struct rockchip_sfc *sfc = dev_get_priv(bus);
+	int len = bitlen >> 3;
+	u8 *pcmd = (u8 *)dout;
+	int ret = 0;
+
+	if (flags & SPI_XFER_BEGIN) {
+		sfc->cmd = pcmd[0];
+		if (len >= 4) {
+			sfc->cmd |= SFC_ADDR_24BITS | (((len - 4) * 8) << 8);
+			sfc->addr = pcmd[3] | (pcmd[2] << 8) | (pcmd[1] << 16);
+		}
+	}
+
+	if (flags == (SPI_XFER_BEGIN | SPI_XFER_END))
+		len = 0;
+
+	if (flags & SPI_XFER_END) {
+		if (dout && len)
+			sfc->cmd |= SFC_WR;
+
+		if (din)
+			ret = rockchip_sfc_do_xfer(sfc, (u32 *)din, len);
+		else if (dout)
+			ret = rockchip_sfc_do_xfer(sfc, (u32 *)dout, len);
+	}
+
+	return ret;
+}
+
+static int rockchip_sfc_set_speed(struct udevice *bus, uint speed)
+{
+	struct rockchip_sfc *sfc = dev_get_priv(bus);
+
+	if (speed > sfc->max_freq)
+		speed = sfc->max_freq;
+
+	sfc->speed_hz = speed;
+
+	return 0;
+}
+
+static int rockchip_sfc_set_mode(struct udevice *bus, uint mode)
+{
+	struct rockchip_sfc *sfc = dev_get_priv(bus);
+
+	sfc->mode = mode;
+
+	return 0;
+}
+
+static const struct dm_spi_ops rockchip_sfc_ops = {
+	.xfer		= rockchip_sfc_xfer,
+	.set_speed	= rockchip_sfc_set_speed,
+	.set_mode	= rockchip_sfc_set_mode,
+};
+
+static const struct udevice_id rockchip_sfc_ids[] = {
+	{ .compatible = "rockchip,sfc" },
+	{ }
+};
+
+U_BOOT_DRIVER(rockchip_sfc_driver) = {
+	.name	= "rockchip_sfc",
+	.id	= UCLASS_SPI,
+	.of_match = rockchip_sfc_ids,
+	.ops	= &rockchip_sfc_ops,
+	.ofdata_to_platdata = rockchip_sfc_ofdata_to_platdata,
+	.platdata_auto_alloc_size = sizeof(struct rockchip_sfc_platdata),
+	.priv_auto_alloc_size = sizeof(struct rockchip_sfc),
+	.probe	= rockchip_sfc_probe,
+};
diff --git a/drivers/spi/rockchip_sfc.h b/drivers/spi/rockchip_sfc.h
new file mode 100644
index 0000000000..b8650564ed
--- /dev/null
+++ b/drivers/spi/rockchip_sfc.h
@@ -0,0 +1,82 @@
+/*
+ * sfc driver for rockchip
+ *
+ * (C) Copyright 2008-2016 Rockchip Electronics
+ * Yifeng.zhao, Software Engineering, <zhao0116@gmail.com>.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __RK_SFC_H
+#define __RK_SFC_H
+
+struct rockchip_sfc_reg {
+	u32 ctrl;
+	u32 imr;
+	u32 iclr;
+	u32 ftlr;
+	u32 rcvr;
+	u32 ax;
+	u32 abit;
+	u32 isr;
+	u32 fsr;
+	u32 sr;
+	u32 risr;
+	u32 reserved[21];
+	u32 dmatr;
+	u32 dmaaddr;
+	u32 reserved1[30];
+	u32 cmd;
+	u32 addr;
+	u32 data;
+};
+check_member(rockchip_sfc_reg, data, 0x108);
+
+/*SFC_CTRL*/
+#define SFC_DATA_WIDTH_SHIFT	12
+#define SFC_DATA_WIDTH_MASK	GENMASK(13, 12)
+#define SFC_ADDR_WIDTH_SHIFT	10
+#define SFC_ADDR_WIDTH_MASK	GENMASK(11, 10)
+#define SFC_CMD_WIDTH_SHIT	8
+#define SFC_CMD_WIDTH_MASK	GENMASK(9, 8)
+#define SFC_DATA_SHIFT_NEGETIVE	BIT(1)
+
+/*SFC_CMD*/
+#define SFC_WR			BIT(12)
+#define SFC_ADDR_0BITS		(0 << 14)
+#define SFC_ADDR_24BITS		(1 << 14)
+#define SFC_ADDR_32BITS		(2 << 14)
+#define SFC_ADDR_XBITS		(3 << 14)
+#define SFC_TRB_SHIFT		(16)
+#define SFC_TRB_MASK		GENMASK(29, 16)
+
+/* Dma start trigger signal. Auto cleared after write */
+#define SFC_DMA_START		BIT(0)
+
+#define SFC_RESET		BIT(0)
+
+/*SFC_FSR*/
+#define SFC_RXLV_SHIFT		(16)
+#define SFC_RXLV_MASK		GENMASK(20, 16)
+#define SFC_TXLV_SHIFT		(8)
+#define SFC_TXLV_MASK		GENMASK(12, 8)
+#define SFC_RX_FULL		BIT(3)	/* rx fifo full */
+#define SFC_RX_EMPTY		BIT(2)	/* rx fifo empty */
+#define SFC_TX_EMPTY		BIT(1)	/* tx fifo empty */
+#define SFC_TX_FULL		BIT(0)	/* tx fifo full */
+
+#define SFC_BUSY		BIT(0)	/* sfc busy flag */
+
+/*SFC_RISR*/
+#define DMA_FINISH_INT		BIT(7)        /* dma interrupt */
+#define SPI_ERR_INT		BIT(6)        /* Nspi error interrupt */
+#define AHB_ERR_INT		BIT(5)        /* Ahb bus error interrupt */
+#define TRANS_FINISH_INT	BIT(4)        /* Transfer finish interrupt */
+#define TX_EMPTY_INT		BIT(3)        /* Tx fifo empty interrupt */
+#define TX_OF_INT		BIT(2)        /* Tx fifo overflow interrupt */
+#define RX_UF_INT		BIT(1)        /* Rx fifo underflow interrupt */
+#define RX_FULL_INT		BIT(0)        /* Rx fifo full interrupt */
+
+#define SFC_MAX_TRB		(1024 << 3)
+
+#endif

commit 6f775b34e5e8c9b7fbab688106843cc588fc208e
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Tue Aug 8 09:40:25 2017 +0800

    sf: add support for GD25Q256
    
    Add support for GD25Q256, a 32MiB SPI Nor
    flash from Gigadevice.
    
    Change-Id: Id28c00189058971580406270e708a126c94c0461
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 839cdbe1b0..357b3bcfd4 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -37,6 +37,7 @@ enum spi_nor_option_flags {
 #define SPI_FLASH_CFI_MFR_SST		0xbf
 #define SPI_FLASH_CFI_MFR_WINBOND	0xef
 #define SPI_FLASH_CFI_MFR_ATMEL		0x1f
+#define SPI_FLASH_CIF_MFR_GIGADEVICE	0xc8
 
 /* Erase commands */
 #define CMD_ERASE_4K			0x20
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 34f68881ed..d39c24251d 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -807,7 +807,7 @@ int stm_unlock(struct spi_flash *flash, u32 ofs, size_t len)
 #endif
 
 
-#ifdef CONFIG_SPI_FLASH_MACRONIX
+#if defined(CONFIG_SPI_FLASH_MACRONIX) || defined(CONFIG_SPI_FLASH_GIGADEVICE)
 static int macronix_quad_enable(struct spi_flash *flash)
 {
 	u8 qeb_status;
@@ -892,8 +892,9 @@ static int set_quad_mode(struct spi_flash *flash,
 			 const struct spi_flash_info *info)
 {
 	switch (JEDEC_MFR(info)) {
-#ifdef CONFIG_SPI_FLASH_MACRONIX
+#if defined(CONFIG_SPI_FLASH_MACRONIX) || defined(CONFIG_SPI_FLASH_GIGADEVICE)
 	case SPI_FLASH_CFI_MFR_MACRONIX:
+	case SPI_FLASH_CIF_MFR_GIGADEVICE:
 		return macronix_quad_enable(flash);
 #endif
 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c
index c4ccf48af4..bb43231b16 100644
--- a/drivers/mtd/spi/spi_flash_ids.c
+++ b/drivers/mtd/spi/spi_flash_ids.c
@@ -65,6 +65,7 @@ const struct spi_flash_info spi_flash_ids[] = {
 #ifdef CONFIG_SPI_FLASH_GIGADEVICE	/* GIGADEVICE */
 	{"gd25q64b",	   INFO(0xc84017, 0x0, 64 * 1024,   128, SECT_4K) },
 	{"gd25lq32",	   INFO(0xc86016, 0x0, 64 * 1024,    64, SECT_4K) },
+	{"GD25Q256",       INFO(0xc84019, 0x0, 64 * 1024,   512, RD_FULL | WR_QPP | SECT_4K)},
 #endif
 #ifdef CONFIG_SPI_FLASH_ISSI		/* ISSI */
 	{"is25lp032",	   INFO(0x9d6016, 0x0, 64 * 1024,    64, 0) },

commit b49168b2b67bcad4975cc5886a59f4eb6fc204ef
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Thu Nov 30 14:18:08 2017 +0800

    rockchip: bootrkp: set return errno when failed to get image
    
    We should return a errno when failed to get a valid image.
    
    Change-Id: I2290539bc5c874312940cedc9325cc16146ce6ce
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/bootrkp.c b/arch/arm/mach-rockchip/bootrkp.c
index bea42a5a30..6840eb0a1b 100644
--- a/arch/arm/mach-rockchip/bootrkp.c
+++ b/arch/arm/mach-rockchip/bootrkp.c
@@ -128,6 +128,7 @@ static int read_rockchip_image(struct blk_part *part, void *dst)
 		goto err;
 	if (img->tag != TAG_KERNEL) {
 		printf("%s: invalid image tag(0x%x)\n", part->name, img->tag);
+		ret = -ENODEV;
 		goto err;
 	}
 

commit e1ec45d2ebd447dc16525156f6c03d89d05b7880
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 29 17:18:36 2017 +0800

    rk312x: add arch_cpu_init implementation
    
    1. set read latency configure;
    2. set lcdc cpu axi qos priority level;
    3. set GPIO1_C1 iomux to gpio, default sdcard_detn;
    4. disable interrupt of rk3126.
    
    Change-Id: Iebd980e68f4a9fccbf8d620bac0f103571e1d4de
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3128/rk3128.c b/arch/arm/mach-rockchip/rk3128/rk3128.c
index 9d6e3b1ee1..ef0ed3bcd4 100644
--- a/arch/arm/mach-rockchip/rk3128/rk3128.c
+++ b/arch/arm/mach-rockchip/rk3128/rk3128.c
@@ -3,10 +3,37 @@
  *
  * SPDX-License-Identifier:     GPL-2.0+
  */
+#include <asm/io.h>
+#include <asm/arch/hardware.h>
+
+#define GRF_GPIO1C_IOMUX		0x200080c0
+#define SDMMC_INTMASK			0x10214024
+#define READLATENCY_VAL			0x3f
+#define BUS_MSCH_QOS_BASE		0x10128014
+#define	CPU_AXI_QOS_PRIORITY_BASE	0x1012f188
+#define CPU_AXI_QOS_PRIORITY_LEVEL(h, l) \
+	((((h) & 3) << 8) | (((h) & 3) << 2) | ((l) & 3))
 
 int arch_cpu_init(void)
 {
 	/* We do some SoC one time setting here. */
 
+	/* Read latency configure */
+	writel(READLATENCY_VAL, BUS_MSCH_QOS_BASE);
+
+	/* Set lcdc cpu axi qos priority level */
+	writel(CPU_AXI_QOS_PRIORITY_LEVEL(3, 3), CPU_AXI_QOS_PRIORITY_BASE);
+
+	/* Set GPIO1_C1 iomux to gpio, default sdcard_detn */
+	writel(0x00040000, GRF_GPIO1C_IOMUX);
+
+#ifdef CONFIG_ROCKCHIP_RK3126
+	/*
+	 * Disable interrupt, otherwise it always generates wakeup signal. This
+	 * is an IC hardware issue.
+	 */
+	writel(0, SDMMC_INTMASK);
+#endif
+
 	return 0;
 }

commit 8535e8778232c61c036d12dc59b6c2b0e800093c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 29 17:22:12 2017 +0800

    rockchip: configs: evb-rk3126: add CONFIG_ROCKCHIP_RK3126
    
    drivers can use the macro to distinguish RK3128 and RK3126
    
    Change-Id: I9dac767a4db114cfbc0ae13d52d7499cc8db3096
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-rk3126_defconfig b/configs/evb-rk3126_defconfig
index aa6320ddc6..7d8120860b 100644
--- a/configs/evb-rk3126_defconfig
+++ b/configs/evb-rk3126_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_ROCKCHIP_RK3128=y
+CONFIG_ROCKCHIP_RK3126=y
 CONFIG_ROCKCHIP_BLOCK_API=y
 CONFIG_ROCKCHIP_PARAM=y
 CONFIG_ROCKCHIP_RESOURCE_IMAGE=y

commit f151ed19e05cfc2fdb9e73867b60122f1b23dcdc
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 29 17:20:29 2017 +0800

    rockchip: configs: bnd-d708: add CONFIG_ROCKCHIP_RK3126
    
    drivers can use the macro to distinguish RK3128 and RK3126
    
    Change-Id: I518c0097eb2191f911f3fdde0289dce9e19851cf
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/bnd-d708-rk3126_defconfig b/configs/bnd-d708-rk3126_defconfig
index d686968e2f..ab1756c172 100644
--- a/configs/bnd-d708-rk3126_defconfig
+++ b/configs/bnd-d708-rk3126_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_ROCKCHIP_RK3128=y
+CONFIG_ROCKCHIP_RK3126=y
 CONFIG_ROCKCHIP_BLOCK_API=y
 CONFIG_ROCKCHIP_PARAM=y
 CONFIG_ROCKCHIP_RESOURCE_IMAGE=y

commit e1048023de17ca19896cda00dd3751d50d0eb64d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 29 17:39:34 2017 +0800

    rockchip: Kconfig: add ROCKCHIP_RK3126 option
    
    RK3126 can use most code from RK3128, but at some situations we have
    to distinguish between RK3126 and RK3128, so this macro gives help.
    It is usually selected in rk3126 board defconfig.
    
    Change-Id: Ifd8588efb0441bd58129d9942aaacec8232f1f20
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 782146f53f..02106f4a28 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -22,6 +22,16 @@ config ROCKCHIP_RK3128
 	  and video codec support. Peripherals include Gigabit Ethernet,
 	  USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
 
+if ROCKCHIP_RK3128
+
+config ROCKCHIP_RK3126
+	bool "Support Rockchip RK3126 "
+	help
+	  RK3126 can use most code from RK3128, but at some situations we have
+	  to distinguish between RK3126 and RK3128, so this macro gives help.
+	  It is usually selected in rk3126 board defconfig.
+endif
+
 config ROCKCHIP_RK3066
 	bool "Support Rockchip RK3066"
 	select CPU_V7

commit de9a6cd2f90847d3b74950e6bb9f1ac0067846bb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Nov 28 21:12:09 2017 +0800

    make.sh: support pack uboot.img
    
    Change-Id: Iaa95a69b20850f0b842c76b1d8a9d8cdcc0e7be5
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 7a355fc6ed..a5010a82e1 100755
--- a/make.sh
+++ b/make.sh
@@ -24,7 +24,26 @@ select_toolchain()
 	fi
 	echo toolchain: ${TOOLCHAIN}
 }
+
+pack_images()
+{
+	local sys_text_base dst
+
+	dst=../rkbin/tools
+	if [ -d ${dst} ]; then
+		path=$(cd `dirname ${dst}`; pwd)
+	else
+		echo "Can't find '../rkbin/' or '../rkbin/tools/' Responsity, please download it before pack image!"
+		exit 1
+	fi
+
+	sys_text_base=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${DSTDIR}/out/include/autoconf.mk|tr -d '\r'`
+	echo U-Boot entry point address: ${sys_text_base}
+	${path}/tools/loaderimage --pack --uboot ${DSTDIR}/out/u-boot.bin uboot.img ${sys_text_base}
+}
+
 echo "make for ${BOARD}_defconfig by -j${JOB}"
 make ${BOARD}_defconfig O=${DSTDIR}/out
 select_toolchain
 make CROSS_COMPILE=${TOOLCHAIN}  all --jobs=${JOB} O=${DSTDIR}/out
+pack_images

commit b177a917da8501bfb58e1b8ec506011f9bd1e9ea
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 27 16:57:51 2017 +0800

    power: charge animation: add system suspend support
    
    cpu0 will trap into ATF for system suspend, ATF can
    lead system to a extrem low power state.
    
    Change-Id: I1fad3671a11ed41d22533d21fb0df656b4a84e82
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 5cd7b604ca..7b0126b898 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -4,12 +4,15 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 
+#include <asm/suspend.h>
+#include <asm/arch/rockchip_smccc.h>
 #include <asm/arch/bootrkp.h>
 #include <common.h>
 #include <console.h>
 #include <dm.h>
 #include <errno.h>
 #include <key.h>
+#include <irq-generic.h>
 #include <linux/input.h>
 #include <pwm.h>
 #include <power/charge_display.h>
@@ -21,15 +24,8 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define LONG_PRESSED_TIME			2000 /* 2s */
 #define IMAGE_SHOW_RESET			-1
 
-enum key_event {
-	KEY_NOT_PRESSED = 0,
-	KEY_SHORT_PRESSED,
-	KEY_LONG_PRESSED,
-};
-
 struct charge_image {
 	const char *name;
 	int soc;
@@ -167,60 +163,61 @@ static int charge_animation_ofdata_to_platdata(struct udevice *dev)
 	return 0;
 }
 
-static int check_key_press(struct udevice *dev, bool restar_time)
+static int check_key_press(struct udevice *dev)
 {
-	static unsigned long pressed_time;
-	static int old_state;
-	int report = KEY_NOT_PRESSED;
-	int state;
-
-	/* just for restart time */
-	if (restar_time) {
-		pressed_time = get_timer(0);
-		goto out;
-	}
+	u32 state;
 
 	state = key_read(dev);
-	if (state < 0) {
+	if (state < 0)
 		printf("read power key failed: %d\n", state);
-		goto out;
-	}
 
-	/* Start time is not initialized, let's do it */
-	if (!pressed_time && (state == KEY_PRESS_DOWN)) {
-		pressed_time = get_timer(0);
-		return KEY_NOT_PRESSED;
-	} else {
-		debug("key state = %d\n", state);
-
-		if (state == KEY_PRESS_DOWN) {
-			if (get_timer(pressed_time) >= LONG_PRESSED_TIME) {
-				report = KEY_LONG_PRESSED;
-				pressed_time = 0;
-				old_state = KEY_LONG_PRESSED;
-				printf("power key long pressed...\n");
-			}
+	if (state == KEY_PRESS_LONG_DOWN)
+		printf("power key long pressed...\n");
+	else if (state == KEY_PRESS_DOWN)
+		printf("power key short pressed...\n");
+
+	return state;
+}
+
+static int system_suspend_enter(void)
+{
+	/*
+	 * TODO: enter low power mode:
+	 * 3. auto turn off screen when timout;
+	 * 4. power key wakeup;
+	 * 5. timer period wakeup for pmic fg ?
+	 */
+	if (IS_ENABLED(CONFIG_ARM_SMCCC)) {
+		printf("\nSystem suspend: ");
+		putc('1');
+		local_irq_disable();
+		putc('2');
+		irqs_suspend();
+		putc('3');
+		putc('\n');
+
+		/* Trap into ATF for low power mode */
+		cpu_suspend(0, psci_system_suspend);
+
+		putc('\n');
+		putc('3');
+		irqs_resume();
+		putc('2');
+		local_irq_enable();
+		putc('1');
+		putc('\n');
+
 		/*
-		 * If you don't check 'old_state != KEY_LONG_PRESSED', it will
-		 * treat 'key long pressed' release as a 'short key pressed'
-		 * release.
+		 * We must wait for key release event finish, otherwise
+		 * we may read key state too early.
 		 */
-		} else if ((state == KEY_PRESS_UP) &&
-			   (old_state != KEY_LONG_PRESSED)) {
-			report = KEY_SHORT_PRESSED;
-			old_state = report;
-			pressed_time = 0;
-			printf("power key short pressed...\n");
-		} else {
-			report = KEY_NOT_PRESSED;
-			old_state = report;
-			pressed_time = 0;
-			debug("power key Not pressed...\n");
-		}
+		mdelay(300);
+	} else {
+		printf("\nWfi\n");
+		wfi();
 	}
 
-out:
-	return report;
+	return 0;
 }
 
 static int charge_animation_show(struct udevice *dev)
@@ -379,15 +376,7 @@ static int charge_animation_show(struct udevice *dev)
 			debug("SHOW: %s\n", image[show_idx].name);
 			rockchip_show_bmp(image[show_idx].name);
 		} else {
-			/*
-			 * TODO: enter low power mode:
-			 *
-			 * 1. cut off some regualtors;
-			 * 2. set 24MHZ for some PLLs;
-			 * 3. auto turn off screen when timout;
-			 * 4. power key wakeup;
-			 * 5. timer period wakeup for pmic fg ?
-			 */
+			system_suspend_enter();
 		}
 
 		mdelay(5);
@@ -409,8 +398,8 @@ static int charge_animation_show(struct udevice *dev)
 		 * Short key event: turn on/off screen;
 		 * Long key event: show logo and boot system or still charging.
 		 */
-		key_state = check_key_press(pwrkey, false);
-		if (key_state == KEY_SHORT_PRESSED) {
+		key_state = check_key_press(pwrkey);
+		if (key_state == KEY_PRESS_DOWN) {
 			/* NULL means show nothing, ie. turn off screen */
 			if (screen_on)
 				rockchip_show_bmp(NULL);
@@ -435,7 +424,7 @@ static int charge_animation_show(struct udevice *dev)
 				screen_on = false;
 			else
 				screen_on = true;
-		} else if (key_state == KEY_LONG_PRESSED) {
+		} else if (key_state == KEY_PRESS_LONG_DOWN) {
 			/* Only long pressed while screen off needs screen_on true */
 			if (!screen_on)
 				screen_on = true;
@@ -445,8 +434,6 @@ static int charge_animation_show(struct udevice *dev)
 				printf("soc=%d%%, threshold soc=%d%%\n",
 				       soc, pdata->power_on_soc_threshold);
 				printf("Low power, unable to boot, charging...\n");
-				/* 'true': just for clear time of check key */
-				check_key_press(pwrkey, true);
 				show_idx = image_num - 1;
 				continue;
 			}
@@ -455,8 +442,6 @@ static int charge_animation_show(struct udevice *dev)
 				printf("voltage=%dmv, threshold voltage=%dmv\n",
 				       voltage, pdata->power_on_voltage_threshold);
 				printf("Low power, unable to boot, charging...\n");
-				/* 'true': just for clear time of check key */
-				check_key_press(pwrkey, true);
 				show_idx = image_num - 1;
 				continue;
 			}

commit 3ccaecfa6fefcfca9326285e5137b8b476c02d3c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Nov 28 18:22:59 2017 +0800

    input: rk8xx pwrkey: use irq to detect key event
    
    because we support U-Boot system suspend and trap into ATF,
    we have to make pwrkey as wakeup source, so that we must
    register pmic_int as an irq.
    
    we found reading 'get_timer(0)' will return a large value in
    the interrupt routine and I don't find out what happend now,
    so I add the 'get_ms()' which reads arm gerneric timer tick
    direcly.
    
    we clean all PMIC interrupt status for safety to avoid pmic_int
    hold in low level which make PMIC can't respond to interrupt any
    more.
    
    Change-Id: I46ff81030696f4672faa9fc81141952e52fd5ba9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/rk8xx_pwrkey.c b/drivers/input/rk8xx_pwrkey.c
index cabdd3ce2c..497eac4314 100644
--- a/drivers/input/rk8xx_pwrkey.c
+++ b/drivers/input/rk8xx_pwrkey.c
@@ -10,9 +10,16 @@
 #include <linux/input.h>
 #include <power/pmic.h>
 #include <power/rk8xx_pmic.h>
+#include <irq-generic.h>
+#include <asm/arch/periph.h>
+#include <dm/pinctrl.h>
 
 #define	RK816_INT_STS_REG1	0x49
 #define	RK816_INT_MSK_REG1	0x4a
+#define	RK816_INT_STS_REG2	0x4c
+#define	RK816_INT_MSK_REG2	0x4d
+#define	RK816_INT_STS_REG3	0x4e
+#define	RK816_INT_MSK_REG3	0x4f
 #define RK816_PWRON_RISE_INT	(1 << 6)
 #define RK816_PWRON_FALL_INT	(1 << 5)
 
@@ -26,41 +33,156 @@ struct key_data {
 	u8 int_msk_reg;
 	u8 pwron_rise_int;
 	u8 pwron_fall_int;
+	struct reg_data *init_reg;
+	u32 init_reg_num;
+	struct reg_data *irq_reg;
+	u32 irq_reg_num;
+	uint64_t key_down_t;
+	uint64_t key_up_t;
 };
 
+struct reg_data {
+	u8 reg;
+	u8 val;
+};
+
+static struct reg_data rk816_init_reg[] = {
+	/* only enable rise/fall interrupt */
+	{ RK816_INT_MSK_REG1, 0x9f },
+	{ RK816_INT_MSK_REG2, 0xff },
+	{ RK816_INT_MSK_REG3, 0xff },
+	/* clear all interrupt states */
+	{ RK816_INT_STS_REG1, 0xff },
+	{ RK816_INT_STS_REG2, 0xff },
+	{ RK816_INT_STS_REG3, 0xff },
+};
+
+static struct reg_data rk816_irq_reg[] = {
+	/* clear all interrupt states */
+	{ RK816_INT_STS_REG1, 0xff },
+	{ RK816_INT_STS_REG2, 0xff },
+	{ RK816_INT_STS_REG3, 0xff },
+};
+
+static struct reg_data rk805_irq_reg[] = {
+	/* clear all interrupt states */
+	{ RK805_INT_STS_REG, 0xff },
+};
+
+static struct reg_data rk805_init_reg[] = {
+	/* only enable rise/fall interrupt */
+	{ RK805_INT_MSK_REG, 0x7e },
+	/* clear all interrupt states */
+	{ RK805_INT_STS_REG, 0xff },
+};
+
+static inline uint64_t arch_counter_get_cntpct(void)
+{
+	uint64_t cval = 0;
+
+	isb();
+#ifdef CONFIG_ARM64
+	asm volatile("mrs %0, cntpct_el0" : "=r" (cval));
+#else
+	asm volatile ("mrrc p15, 0, %Q0, %R0, c14" : "=r" (cval));
+#endif
+	return cval;
+}
+
+static uint64_t get_ms(uint64_t base)
+{
+	return (arch_counter_get_cntpct() / 24000UL) - base;
+}
+
 static int rk8xx_pwrkey_read(struct udevice *dev)
 {
 	struct key_data *key = dev_get_priv(dev);
-	int status = KEY_PRESS_NONE;
-	int ret, val;
+	u32 report = KEY_PRESS_NONE;
+
+	if ((key->key_up_t > key->key_down_t) &&
+	    (key->key_up_t - key->key_down_t) >= KEY_LONG_DOWN_MS) {
+		debug("%s: long key ms: %llu\n", __func__, key->key_up_t - key->key_down_t);
+		key->key_up_t = 0;
+		key->key_down_t = 0;
+		report = KEY_PRESS_LONG_DOWN;
+	} else if (key->key_down_t && get_ms(key->key_down_t) >= KEY_LONG_DOWN_MS) {
+		debug("%s: long key (hold) ms: %llu\n", __func__, key->key_up_t - key->key_down_t);
+		key->key_up_t = 0;
+		key->key_down_t = 0;
+		report = KEY_PRESS_LONG_DOWN;
+	} else if ((key->key_up_t > key->key_down_t) &&
+		   (key->key_up_t - key->key_down_t) < KEY_LONG_DOWN_MS) {
+		debug("%s: short key ms: %llu\n", __func__, key->key_up_t - key->key_down_t);
+		key->key_up_t = 0;
+		key->key_down_t = 0;
+		report = KEY_PRESS_DOWN;
+	} else {
+		debug("%s: key up: %llu, down: %llu\n", __func__, key->key_up_t, key->key_down_t);
+	}
 
+	return report;
+}
+
+static void pwrkey_irq_handler(int irq, void *data)
+{
+	struct udevice *dev = data;
+	struct key_data *key = dev_get_priv(dev);
+	int ret, val, i;
+
+	/* read status */
 	val = pmic_reg_read(dev->parent, key->int_sts_reg);
 	if (val < 0) {
 		printf("%s: i2c read failed, ret=%d\n", __func__, val);
-		return val;
+		return;
 	}
 
-	if (val & key->pwron_fall_int)
-		status = KEY_PRESS_DOWN;
+	/* fall event */
+	if (val & key->pwron_fall_int) {
+		key->key_down_t = get_ms(0);
+		printf("%s: key down: %llu ms\n", __func__, key->key_down_t);
+	}
 
-	/* Must check pwron rise behind of fall !! */
+	/* rise event */
 	if (val & key->pwron_rise_int) {
-		/* Clear fall when detect rise */
-		ret = pmic_reg_write(dev->parent, key->int_sts_reg,
-				     key->pwron_fall_int | key->pwron_rise_int);
+		key->key_up_t = get_ms(0);
+		printf("%s: key up: %llu ms\n", __func__, key->key_up_t);
+	}
+
+	/* clear intertup */
+	for (i = 0; i < key->irq_reg_num; i++) {
+		ret = pmic_reg_write(dev->parent,
+				     key->irq_reg[i].reg,
+				     key->irq_reg[i].val);
 		if (ret < 0) {
-			printf("%s: i2c write failed, ret=%d\n", __func__, val);
-			return ret;
+			printf("%s: i2c write reg 0x%x failed, ret=%d\n",
+			       __func__, key->irq_reg[i].reg, ret);
 		}
+	}
+}
+
+static int pwrkey_interrupt_init(struct udevice *dev)
+{
+	u32 interrupt[2], phandle;
+	int irq, ret;
+
+	phandle = dev_read_u32_default(dev->parent, "interrupt-parent", -1);
+	if (phandle < 0) {
+		printf("failed get 'interrupt-parent', ret=%d\n", phandle);
+		return phandle;
+	}
 
-		status = KEY_PRESS_UP;
+	ret = dev_read_u32_array(dev->parent, "interrupts", interrupt, 2);
+	if (ret) {
+		printf("failed get 'interrupt', ret=%d\n", ret);
+		return ret;
 	}
 
-	debug("%s: int sts = 0x%x msk = 0x%x\n",
-	      __func__, pmic_reg_read(dev->parent, key->int_sts_reg),
-	      pmic_reg_read(dev->parent, key->int_msk_reg));
+	irq = phandle_gpio_to_irq(phandle, interrupt[0]);
+	irq_install_handler(irq, pwrkey_irq_handler, dev);
+	irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);
+	irq_handler_enable(irq);
 
-	return status;
+	return 0;
 }
 
 static const struct dm_key_ops key_ops = {
@@ -73,7 +195,7 @@ static int rk8xx_pwrkey_probe(struct udevice *dev)
 {
 	struct rk8xx_priv *rk8xx = dev_get_priv(dev->parent);
 	struct key_data *key = dev_get_priv(dev);
-	int ret, val;
+	int ret, i;
 
 	switch (rk8xx->variant) {
 	case RK805_ID:
@@ -81,6 +203,10 @@ static int rk8xx_pwrkey_probe(struct udevice *dev)
 		key->int_msk_reg = RK805_INT_MSK_REG;
 		key->pwron_rise_int = RK805_PWRON_RISE_INT;
 		key->pwron_fall_int = RK805_PWRON_FALL_INT;
+		key->init_reg = rk805_init_reg;
+		key->init_reg_num = ARRAY_SIZE(rk805_init_reg);
+		key->irq_reg = rk805_irq_reg;
+		key->irq_reg_num = ARRAY_SIZE(rk805_irq_reg);
 		break;
 
 	case RK816_ID:
@@ -88,36 +214,29 @@ static int rk8xx_pwrkey_probe(struct udevice *dev)
 		key->int_msk_reg = RK816_INT_MSK_REG1;
 		key->pwron_rise_int = RK816_PWRON_RISE_INT;
 		key->pwron_fall_int = RK816_PWRON_FALL_INT;
+		key->init_reg = rk816_init_reg;
+		key->init_reg_num = ARRAY_SIZE(rk816_init_reg);
+		key->irq_reg = rk816_irq_reg;
+		key->irq_reg_num = ARRAY_SIZE(rk816_irq_reg);
 		break;
 
 	default:
 		return -EINVAL;
 	}
 
-	/* Clear states */
-	ret = pmic_reg_write(dev->parent, key->int_sts_reg,
-			     key->pwron_rise_int | key->pwron_fall_int);
-	if (ret < 0) {
-		printf("%s: i2c write failed, ret=%d\n", __func__, ret);
-		return ret;
-	}
-
-	val = pmic_reg_read(dev->parent, key->int_msk_reg);
-	if (val < 0) {
-		printf("%s: i2c read failed, ret=%d\n", __func__, val);
-		return val;
-	}
-
-	/* enable fall and rise interrupt */
-	val = 0xff;
-	val &= ~(key->pwron_rise_int | key->pwron_fall_int);
-	ret = pmic_reg_write(dev->parent, key->int_msk_reg, val);
-	if (ret < 0) {
-		printf("%s: i2c write failed, ret=%d\n", __func__, val);
-		return ret;
+	/* mask and clear intertup */
+	for (i = 0; i < key->init_reg_num; i++) {
+		ret = pmic_reg_write(dev->parent,
+				     key->init_reg[i].reg,
+				     key->init_reg[i].val);
+		if (ret < 0) {
+			printf("%s: i2c write reg 0x%x failed, ret=%d\n",
+			       __func__, key->init_reg[i].reg, ret);
+			return ret;
+		}
 	}
 
-	return 0;
+	return pwrkey_interrupt_init(dev);
 }
 
 U_BOOT_DRIVER(rk8xx_pwrkey) = {

commit c315aab89c33d8a3ee8ec59d2fdc53fa9ce94b6d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Nov 28 18:25:53 2017 +0800

    dm: key.h: add key state
    
    add KEY_PRESS_LONG_DOWN and KEY_LONG_DOWN_MS.
    
    Change-Id: I3877a3562779a44b29c31820c583f187530778f8
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/key.h b/include/key.h
index 16bf4cac5b..f5fe4fb5fe 100644
--- a/include/key.h
+++ b/include/key.h
@@ -7,10 +7,13 @@
 #ifndef _KEY_H_
 #define _KEY_H_
 
+#define KEY_LONG_DOWN_MS	2000
+
 enum key_state {
 	KEY_PRESS_NONE,
 	KEY_PRESS_UP,
 	KEY_PRESS_DOWN,
+	KEY_PRESS_LONG_DOWN,
 };
 
 struct dm_key_ops {

commit 965c1b10639ba6b6c3ac6b594cb31f89ea6e3936
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 27 16:57:21 2017 +0800

    rockchip: rk3128: enable CONFIG_ARM_SMCCC
    
    Change-Id: I4776c9603a91814df3371a55d573d513dbc95dd4
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 8210c0743a..782146f53f 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -15,6 +15,7 @@ config ROCKCHIP_RK3128
 	bool "Support Rockchip RK3128"
 	select CPU_V7
 	select GICV2
+	select ARM_SMCCC
 	help
 	  The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
 	  including NEON and GPU, Mali-400 graphics, several DDR3 options

commit f270a3f8f1778b63ebcf6fb34fac70a2ccfdae9c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 27 16:56:36 2017 +0800

    rockchip: add rockchip smccc support
    
    It supports rockchip platforms individual conversation
    between U-Boot and ATF via ARM SMCCC.
    
    Change-Id: I75077219f409e075bd3d0b312b2d85c205d6a96f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h b/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
new file mode 100644
index 0000000000..7a2b0a7420
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
@@ -0,0 +1,16 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __ROCKCHIP_SMCCC_H__
+#define __ROCKCHIP_SMCCC_H__
+
+/* Stand PSCI system suspend */
+int psci_system_suspend(unsigned long unused);
+
+int sip_smc_set_suspend_mode(unsigned long ctrl,
+			     unsigned long config1,
+			     unsigned long config2);
+#endif
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index c61adedbb7..8210c0743a 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -310,6 +310,12 @@ config ROCKCHIP_VENDOR_PARTITION
           This enable support to read/write vendor configuration data from/to
 	  this partition
 
+config ROCKCHIP_SMCCC
+	bool "Rockchip SMCCC"
+	default y if ARM_SMCCC
+	help
+	  This enable support for Rockchip SMC calls
+
 config GICV2
 	bool "ARM GICv2"
 
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index ba38e97623..b58aa37620 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -31,6 +31,8 @@ ifneq ($(CONFIG_ROCKCHIP_BOOT_MODE_REG),0)
 obj-y += boot_mode.o
 endif
 
+obj-$(CONFIG_ROCKCHIP_SMCCC) += rockchip_smccc.o
+
 obj-$(CONFIG_ROCKCHIP_BLOCK_API) += blk.o
 obj-$(CONFIG_ROCKCHIP_VENDOR_PARTITION) += vendor.o
 obj-$(CONFIG_ROCKCHIP_PARAM) += rockchip_parameter.o
diff --git a/arch/arm/mach-rockchip/rockchip_smccc.c b/arch/arm/mach-rockchip/rockchip_smccc.c
new file mode 100644
index 0000000000..ea56758e0d
--- /dev/null
+++ b/arch/arm/mach-rockchip/rockchip_smccc.c
@@ -0,0 +1,50 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <asm/arch/rockchip_smccc.h>
+#include <asm/io.h>
+#include <asm/psci.h>
+#include <asm/suspend.h>
+#include <linux/arm-smccc.h>
+
+#ifdef CONFIG_ARM64
+#define ARM_PSCI_1_0_SYSTEM_SUSPEND	ARM_PSCI_1_0_FN64_SYSTEM_SUSPEND
+#else
+#define ARM_PSCI_1_0_SYSTEM_SUSPEND	ARM_PSCI_1_0_FN_SYSTEM_SUSPEND
+#endif
+
+/* Rockchip platform SiP call ID */
+#define SIP_SUSPEND_MODE		0x82000003
+
+static struct arm_smccc_res __invoke_sip_fn_smc(unsigned long function_id,
+						unsigned long arg0,
+						unsigned long arg1,
+						unsigned long arg2)
+{
+	struct arm_smccc_res res;
+
+	arm_smccc_smc(function_id, arg0, arg1, arg2, 0, 0, 0, 0, &res);
+	return res;
+}
+
+int psci_system_suspend(unsigned long unused)
+{
+	struct arm_smccc_res res;
+
+	res = __invoke_sip_fn_smc(ARM_PSCI_1_0_SYSTEM_SUSPEND,
+				  virt_to_phys(cpu_resume), 0, 0);
+	return res.a0;
+}
+
+int sip_smc_set_suspend_mode(unsigned long ctrl,
+			     unsigned long config1,
+			     unsigned long config2)
+{
+	struct arm_smccc_res res;
+
+	res = __invoke_sip_fn_smc(SIP_SUSPEND_MODE, ctrl, config1, config2);
+	return res.a0;
+}

commit ed837edf989da43204ef4e9b5d8d34b82d38dd8c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 27 16:05:30 2017 +0800

    irq: support irq suspend and resume
    
    U-Boot will support cpu suspend/resume, cpu and logic may
    lose power, this patch guarantees gic works normally.
    
    Change-Id: I8ebee881fa27fea075502f962f9faabaa8264f67
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/irq/irq-generic.c b/drivers/irq/irq-generic.c
index ab7d5493e5..c7ad094db6 100644
--- a/drivers/irq/irq-generic.c
+++ b/drivers/irq/irq-generic.c
@@ -180,6 +180,32 @@ void irq_free_handler(int irq)
 	irqs_desc[irq].data = NULL;
 }
 
+int irqs_suspend(void)
+{
+	int err;
+
+	err = gic_irq_chip->irq_suspend();
+	if (err) {
+		printf("ERROR: irqs suspend failed\n");
+		return err;
+	}
+
+	return 0;
+}
+
+int irqs_resume(void)
+{
+	int err;
+
+	err = gic_irq_chip->irq_resume();
+	if (err) {
+		printf("ERROR: irqs resume failed\n");
+		return err;
+	}
+
+	return 0;
+}
+
 #ifdef CONFIG_ARM64
 static void cpu_local_irq_enable(void)
 {
diff --git a/drivers/irq/irq-gic.c b/drivers/irq/irq-gic.c
index 3b1c91db9d..8907cc5a73 100644
--- a/drivers/irq/irq-gic.c
+++ b/drivers/irq/irq-gic.c
@@ -10,6 +10,11 @@
 #include <irq-generic.h>
 #include "irq-gic.h"
 
+#define gicd_readl(offset)	readl(GICD_BASE + (offset))
+#define gicc_readl(offset)	readl(GICC_BASE + (offset))
+#define gicd_writel(v, offset)	writel(v, GICD_BASE + (offset))
+#define gicc_writel(v, offset)	writel(v, GICC_BASE + (offset))
+
 typedef enum INT_TRIG {
 	INT_LEVEL_TRIGGER,
 	INT_EDGE_TRIGGER
@@ -243,6 +248,112 @@ static int gic_irq_get(void)
 #endif
 }
 
+struct gic_dist_data {
+	uint32_t ctlr;
+	uint32_t icfgr[DIV_ROUND_UP(1020, 16)];
+	uint32_t itargetsr[DIV_ROUND_UP(1020, 4)];
+	uint32_t ipriorityr[DIV_ROUND_UP(1020, 4)];
+	uint32_t igroupr[DIV_ROUND_UP(1020, 32)];
+	uint32_t ispendr[DIV_ROUND_UP(1020, 32)];
+	uint32_t isenabler[DIV_ROUND_UP(1020, 32)];
+};
+
+struct gic_cpu_data {
+	uint32_t ctlr;
+	uint32_t pmr;
+};
+
+static struct gic_dist_data gicd_save;
+static struct gic_cpu_data gicc_save;
+
+#define IRQ_REG_X4(irq)		(4 * ((irq) / 4))
+#define IRQ_REG_X16(irq)	(4 * ((irq) / 16))
+#define IRQ_REG_X32(irq)	(4 * ((irq) / 32))
+
+static int gic_irq_suspend(void)
+{
+	int irq_nr, i, irq;
+
+	/* irq nr */
+	irq_nr = ((gicd_readl(GICD_TYPER) & 0x1f) + 1) * 32;
+	if (irq_nr > 1020)
+		irq_nr = 1020;
+
+	/* GICC save */
+	gicc_save.ctlr = gicc_readl(GICC_CTLR);
+	gicc_save.pmr = gicc_readl(GICC_PMR);
+
+	/* GICD save */
+	gicd_save.ctlr = gicd_readl(GICD_CTLR);
+
+	for (i = 0, irq = 0; irq < irq_nr; irq += 16)
+		gicd_save.icfgr[i++] = gicd_readl(GICD_ICFGR + IRQ_REG_X16(irq));
+
+	for (i = 0, irq = 0; irq < irq_nr; irq += 4)
+		gicd_save.itargetsr[i++] = gicd_readl(GICD_ITARGETSRn + IRQ_REG_X4(irq));
+
+	for (i = 0, irq = 0; irq < irq_nr; irq += 4)
+		gicd_save.ipriorityr[i++] = gicd_readl(GICD_IPRIORITYRn + IRQ_REG_X4(irq));
+
+	for (i = 0, irq = 0; irq < irq_nr; irq += 32)
+		gicd_save.igroupr[i++] = gicd_readl(GICD_IGROUPRn + IRQ_REG_X32(irq));
+
+	for (i = 0, irq = 0; irq < irq_nr; irq += 32)
+		gicd_save.ispendr[i++] = gicd_readl(GICD_ISPENDRn + IRQ_REG_X32(irq));
+
+	for (i = 0, irq = 0; irq < irq_nr; irq += 32)
+		gicd_save.isenabler[i++] = gicd_readl(GICD_ISENABLERn + IRQ_REG_X32(irq));
+
+	dsb();
+
+	return 0;
+}
+
+static int gic_irq_resume(void)
+{
+	int irq_nr, i, irq;
+
+	irq_nr = ((gicd_readl(GICD_TYPER) & 0x1f) + 1) * 32;
+	if (irq_nr > 1020)
+		irq_nr = 1020;
+
+	/* Disable ctrl register */
+	gicc_writel(0, GICC_CTLR);
+	gicd_writel(0, GICD_CTLR);
+	dsb();
+
+	/* Clear all interrupt */
+	for (i = 0, irq = 0; irq < irq_nr; irq += 32)
+		gicd_writel(0xffffffff, GICD_ICENABLERn + IRQ_REG_X32(irq));
+
+	for (i = 0, irq = 0; irq < irq_nr; irq += 16)
+		gicd_writel(gicd_save.icfgr[i++], GICD_ICFGR + IRQ_REG_X16(irq));
+
+	for (i = 0, irq = 0; irq < irq_nr; irq += 4)
+		gicd_writel(gicd_save.itargetsr[i++], GICD_ITARGETSRn + IRQ_REG_X4(irq));
+
+	for (i = 0, irq = 0; irq < irq_nr; irq += 4)
+		gicd_writel(gicd_save.ipriorityr[i++], GICD_IPRIORITYRn + IRQ_REG_X4(irq));
+
+	for (i = 0, irq = 0; irq < irq_nr; irq += 32)
+		gicd_writel(gicd_save.igroupr[i++], GICD_IGROUPRn + IRQ_REG_X32(irq));
+
+	for (i = 0, irq = 0; irq < irq_nr; irq += 32)
+		gicd_writel(gicd_save.isenabler[i++], GICD_ISENABLERn + IRQ_REG_X32(irq));
+
+	for (i = 0, irq = 0; irq < irq_nr; irq += 32)
+		gicd_writel(gicd_save.ispendr[i++], GICD_ISPENDRn + IRQ_REG_X32(irq));
+	dsb();
+
+	gicc_writel(gicc_save.pmr, GICC_PMR);
+	gicc_writel(gicc_save.ctlr, GICC_CTLR);
+	gicd_writel(gicd_save.ctlr, GICD_CTLR);
+	dsb();
+
+	return 0;
+}
+
+/**************************************regs save and resume**************************/
 static int gic_irq_init(void)
 {
 	/* GICV3 done in: arch/arm/cpu/armv8/start.S */
@@ -276,6 +387,8 @@ static int gic_irq_init(void)
 static struct irq_chip gic_irq_chip = {
 	.name		= "gic-irq-chip",
 	.irq_init	= gic_irq_init,
+	.irq_suspend	= gic_irq_suspend,
+	.irq_resume	= gic_irq_resume,
 	.irq_get	= gic_irq_get,
 	.irq_enable	= gic_irq_enable,
 	.irq_disable	= gic_irq_disable,
diff --git a/include/irq-generic.h b/include/irq-generic.h
index f16c8e5ca0..8bb3ee8769 100644
--- a/include/irq-generic.h
+++ b/include/irq-generic.h
@@ -47,6 +47,8 @@ enum {
 struct irq_chip {
 	const char	*name;
 	int		(*irq_init)(void);
+	int		(*irq_suspend)(void);
+	int		(*irq_resume)(void);
 	int		(*irq_get)(void);
 	int		(*irq_enable)(int irq);
 	int		(*irq_disable)(int irq);
@@ -61,6 +63,8 @@ void irq_free_handler(int irq);
 int irq_set_irq_type(int irq, unsigned int type);
 int irq_handler_enable(int irq);
 int irq_handler_disable(int irq);
+int irqs_suspend(void);
+int irqs_resume(void);
 int gpio_to_irq(struct gpio_desc *gpio);
 
 /*

commit e917b032f55e0f08148a4d30153e4ee7980ec08f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 27 16:02:51 2017 +0800

    regulator: rk8xx: add regulator suspend state setting implement
    
    Change-Id: I194f3bd7f9d7c03d9b8b15030d7448363b37af99
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/rk8xx.c b/drivers/power/regulator/rk8xx.c
index 6d4a243855..355c945a3b 100644
--- a/drivers/power/regulator/rk8xx.c
+++ b/drivers/power/regulator/rk8xx.c
@@ -33,73 +33,73 @@
 #define RK818_USB_ILIM_SEL_MASK		0x0f
 #define RK818_USB_CHG_SD_VSEL_MASK	0x70
 
-
 struct rk8xx_reg_info {
 	uint min_uv;
 	uint step_uv;
 	s8 vsel_reg;
+	s8 vsel_sleep_reg;
 	u8 vsel_mask;
 };
 
 static const struct rk8xx_reg_info rk808_buck[] = {
-	{ 712500, 12500, REG_BUCK1_ON_VSEL, RK808_BUCK_VSEL_MASK, },
-	{ 712500, 12500, REG_BUCK2_ON_VSEL, RK808_BUCK_VSEL_MASK, },
-	{ 712500, 12500, -1, RK808_BUCK_VSEL_MASK, },
-	{ 1800000, 100000, REG_BUCK4_ON_VSEL, RK808_BUCK4_VSEL_MASK, },
+	{ 712500,   12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, RK808_BUCK_VSEL_MASK, },
+	{ 712500,   12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, RK808_BUCK_VSEL_MASK, },
+	{ 712500,   12500, -1, -1, RK808_BUCK_VSEL_MASK, },
+	{ 1800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, RK808_BUCK4_VSEL_MASK, },
 };
 
 static const struct rk8xx_reg_info rk816_buck[] = {
 	/* buck 1 */
-	{ 712500, 12500, REG_BUCK1_ON_VSEL, RK818_BUCK_VSEL_MASK, },
-	{ 1800000, 200000, REG_BUCK1_ON_VSEL, RK818_BUCK_VSEL_MASK, },
-	{ 2300000, 0, REG_BUCK1_ON_VSEL, RK818_BUCK_VSEL_MASK, },
+	{  712500,  12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, RK818_BUCK_VSEL_MASK, },
+	{ 1800000, 200000, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, RK818_BUCK_VSEL_MASK, },
+	{ 2300000,      0, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, RK818_BUCK_VSEL_MASK, },
 	/* buck 2 */
-	{ 712500, 12500, REG_BUCK2_ON_VSEL, RK818_BUCK_VSEL_MASK, },
-	{ 1800000, 200000, REG_BUCK2_ON_VSEL, RK818_BUCK_VSEL_MASK, },
-	{ 2300000, 0, REG_BUCK2_ON_VSEL, RK818_BUCK_VSEL_MASK, },
+	{  712500,  12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, RK818_BUCK_VSEL_MASK, },
+	{ 1800000, 200000, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, RK818_BUCK_VSEL_MASK, },
+	{ 2300000,      0, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, RK818_BUCK_VSEL_MASK, },
 	/* buck 3 */
-	{ 712500, 12500, -1, RK818_BUCK_VSEL_MASK, },
+	{ 712500, 12500, -1, -1, RK818_BUCK_VSEL_MASK, },
 	/* buck 4 */
-	{ 800000, 100000, REG_BUCK4_ON_VSEL, RK818_BUCK4_VSEL_MASK, },
+	{  800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, RK818_BUCK4_VSEL_MASK, },
 };
 
 static const struct rk8xx_reg_info rk818_buck[] = {
-	{ 712500, 12500, REG_BUCK1_ON_VSEL, RK818_BUCK_VSEL_MASK, },
-	{ 712500, 12500, REG_BUCK2_ON_VSEL, RK818_BUCK_VSEL_MASK, },
-	{ 712500, 12500, -1, RK818_BUCK_VSEL_MASK, },
-	{ 1800000, 100000, REG_BUCK4_ON_VSEL, RK818_BUCK4_VSEL_MASK, },
+	{ 712500,   12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, RK818_BUCK_VSEL_MASK, },
+	{ 712500,   12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, RK818_BUCK_VSEL_MASK, },
+	{ 712500,   12500, -1, -1, RK818_BUCK_VSEL_MASK, },
+	{ 1800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, RK818_BUCK4_VSEL_MASK, },
 };
 
 #ifdef ENABLE_DRIVER
 static const struct rk8xx_reg_info rk808_ldo[] = {
-	{ 1800000, 100000, REG_LDO1_ON_VSEL, RK808_LDO_VSEL_MASK, },
-	{ 1800000, 100000, REG_LDO2_ON_VSEL, RK808_LDO_VSEL_MASK, },
-	{ 800000, 100000, REG_LDO3_ON_VSEL, RK808_BUCK4_VSEL_MASK, },
-	{ 1800000, 100000, REG_LDO4_ON_VSEL, RK808_LDO_VSEL_MASK, },
-	{ 1800000, 100000, REG_LDO5_ON_VSEL, RK808_LDO_VSEL_MASK, },
-	{ 800000, 100000, REG_LDO6_ON_VSEL, RK808_LDO_VSEL_MASK, },
-	{ 800000, 100000, REG_LDO7_ON_VSEL, RK808_LDO_VSEL_MASK, },
-	{ 1800000, 100000, REG_LDO8_ON_VSEL, RK808_LDO_VSEL_MASK, },
+	{ 1800000, 100000, REG_LDO1_ON_VSEL, REG_LDO1_SLP_VSEL, RK808_LDO_VSEL_MASK, },
+	{ 1800000, 100000, REG_LDO2_ON_VSEL, REG_LDO2_SLP_VSEL, RK808_LDO_VSEL_MASK, },
+	{  800000, 100000, REG_LDO3_ON_VSEL, REG_LDO3_SLP_VSEL, RK808_BUCK4_VSEL_MASK, },
+	{ 1800000, 100000, REG_LDO4_ON_VSEL, REG_LDO4_SLP_VSEL, RK808_LDO_VSEL_MASK, },
+	{ 1800000, 100000, REG_LDO5_ON_VSEL, REG_LDO5_SLP_VSEL, RK808_LDO_VSEL_MASK, },
+	{  800000, 100000, REG_LDO6_ON_VSEL, REG_LDO6_SLP_VSEL, RK808_LDO_VSEL_MASK, },
+	{  800000, 100000, REG_LDO7_ON_VSEL, REG_LDO7_SLP_VSEL, RK808_LDO_VSEL_MASK, },
+	{ 1800000, 100000, REG_LDO8_ON_VSEL, REG_LDO8_SLP_VSEL, RK808_LDO_VSEL_MASK, },
 };
 
 static const struct rk8xx_reg_info rk816_ldo[] = {
-	{ 800000, 100000, REG_LDO1_ON_VSEL, RK818_LDO_VSEL_MASK, },
-	{ 800000, 100000, REG_LDO2_ON_VSEL, RK818_LDO_VSEL_MASK, },
-	{ 800000, 100000, REG_LDO3_ON_VSEL, RK818_LDO_VSEL_MASK, },
-	{ 800000, 100000, REG_LDO4_ON_VSEL, RK818_LDO_VSEL_MASK, },
-	{ 800000, 100000, REG_LDO5_ON_VSEL, RK818_LDO_VSEL_MASK, },
-	{ 800000, 100000, REG_LDO6_ON_VSEL, RK818_LDO_VSEL_MASK, },
+	{ 800000, 100000, REG_LDO1_ON_VSEL, REG_LDO1_SLP_VSEL, RK818_LDO_VSEL_MASK, },
+	{ 800000, 100000, REG_LDO2_ON_VSEL, REG_LDO2_SLP_VSEL, RK818_LDO_VSEL_MASK, },
+	{ 800000, 100000, REG_LDO3_ON_VSEL, REG_LDO3_SLP_VSEL, RK818_LDO_VSEL_MASK, },
+	{ 800000, 100000, REG_LDO4_ON_VSEL, REG_LDO4_SLP_VSEL, RK818_LDO_VSEL_MASK, },
+	{ 800000, 100000, REG_LDO5_ON_VSEL, REG_LDO5_SLP_VSEL, RK818_LDO_VSEL_MASK, },
+	{ 800000, 100000, REG_LDO6_ON_VSEL, REG_LDO6_SLP_VSEL, RK818_LDO_VSEL_MASK, },
 };
 
 static const struct rk8xx_reg_info rk818_ldo[] = {
-	{ 1800000, 100000, REG_LDO1_ON_VSEL, RK818_LDO_VSEL_MASK, },
-	{ 1800000, 100000, REG_LDO2_ON_VSEL, RK818_LDO_VSEL_MASK, },
-	{ 800000, 100000, REG_LDO3_ON_VSEL, RK818_LDO3_ON_VSEL_MASK, },
-	{ 1800000, 100000, REG_LDO4_ON_VSEL, RK818_LDO_VSEL_MASK, },
-	{ 1800000, 100000, REG_LDO5_ON_VSEL, RK818_LDO_VSEL_MASK, },
-	{ 800000, 100000, REG_LDO6_ON_VSEL, RK818_LDO_VSEL_MASK, },
-	{ 800000, 100000, REG_LDO7_ON_VSEL, RK818_LDO_VSEL_MASK, },
-	{ 1800000, 100000, REG_LDO8_ON_VSEL, RK818_LDO_VSEL_MASK, },
+	{ 1800000, 100000, REG_LDO1_ON_VSEL, REG_LDO1_SLP_VSEL, RK818_LDO_VSEL_MASK, },
+	{ 1800000, 100000, REG_LDO2_ON_VSEL, REG_LDO2_SLP_VSEL, RK818_LDO_VSEL_MASK, },
+	{  800000, 100000, REG_LDO3_ON_VSEL, REG_LDO3_SLP_VSEL, RK818_LDO3_ON_VSEL_MASK, },
+	{ 1800000, 100000, REG_LDO4_ON_VSEL, REG_LDO4_SLP_VSEL, RK818_LDO_VSEL_MASK, },
+	{ 1800000, 100000, REG_LDO5_ON_VSEL, REG_LDO5_SLP_VSEL, RK818_LDO_VSEL_MASK, },
+	{  800000, 100000, REG_LDO6_ON_VSEL, REG_LDO6_SLP_VSEL, RK818_LDO_VSEL_MASK, },
+	{  800000, 100000, REG_LDO7_ON_VSEL, REG_LDO7_SLP_VSEL, RK818_LDO_VSEL_MASK, },
+	{ 1800000, 100000, REG_LDO8_ON_VSEL, REG_LDO8_SLP_VSEL, RK818_LDO_VSEL_MASK, },
 };
 #endif
 
@@ -153,6 +153,21 @@ static int _buck_set_value(struct udevice *pmic, int buck, int uvolt)
 	return pmic_clrsetbits(pmic, info->vsel_reg, mask, val);
 }
 
+static int _buck_set_suspend_value(struct udevice *pmic, int buck, int uvolt)
+{
+	const struct rk8xx_reg_info *info = get_buck_reg(pmic, buck, uvolt);
+	int mask = info->vsel_mask;
+	int val;
+
+	if (info->vsel_sleep_reg == -1)
+		return -ENOSYS;
+	val = (uvolt - info->min_uv) / info->step_uv;
+	debug("%s: reg=%x, mask=%x, val=%x\n", __func__, info->vsel_sleep_reg, mask,
+	      val);
+
+	return pmic_clrsetbits(pmic, info->vsel_sleep_reg, mask, val);
+}
+
 static int _buck_get_enable(struct udevice *pmic, int buck)
 {
 	struct rk8xx_priv *priv = dev_get_priv(pmic);
@@ -181,7 +196,6 @@ static int _buck_get_enable(struct udevice *pmic, int buck)
 	return ret & mask ? true : false;
 }
 
-
 static int _buck_set_enable(struct udevice *pmic, int buck, bool enable)
 {
 	uint mask, value, en_reg;
@@ -227,6 +241,33 @@ static int _buck_set_enable(struct udevice *pmic, int buck, bool enable)
 	return ret;
 }
 
+static int _buck_set_suspend_enable(struct udevice *pmic, int buck, bool enable)
+{
+	uint mask;
+	int ret;
+	struct rk8xx_priv *priv = dev_get_priv(pmic);
+
+	switch (priv->variant) {
+	case RK805_ID:
+	case RK816_ID:
+		mask = 1 << buck;
+		ret = pmic_clrsetbits(pmic, RK816_REG_DCDC_SLP_EN, mask,
+				      enable ? mask : 0);
+		break;
+
+	case RK808_ID:
+	case RK818_ID:
+		mask = 1 << buck;
+		ret = pmic_clrsetbits(pmic, REG_SLEEP_SET_OFF1, mask,
+				      enable ? 0 : mask);
+		break;
+	default:
+		ret = -EINVAL;
+	}
+
+	return ret;
+}
+
 #ifdef ENABLE_DRIVER
 static const struct rk8xx_reg_info *get_ldo_reg(struct udevice *pmic,
 					     int num)
@@ -272,7 +313,6 @@ static int _ldo_get_enable(struct udevice *pmic, int ldo)
 	return ret & mask ? true : false;
 }
 
-
 static int _ldo_set_enable(struct udevice *pmic, int ldo, bool enable)
 {
 	struct rk8xx_priv *priv = dev_get_priv(pmic);
@@ -306,6 +346,30 @@ static int _ldo_set_enable(struct udevice *pmic, int ldo, bool enable)
 	return ret;
 }
 
+static int _ldo_set_suspend_enable(struct udevice *pmic, int ldo, bool enable)
+{
+	struct rk8xx_priv *priv = dev_get_priv(pmic);
+	uint mask;
+	int ret = 0;
+
+	switch (priv->variant) {
+	case RK805_ID:
+	case RK816_ID:
+		mask = 1 << ldo;
+		ret = pmic_clrsetbits(pmic, RK816_REG_LDO_SLP_EN, mask,
+				      enable ? mask : 0);
+		break;
+	case RK808_ID:
+	case RK818_ID:
+		mask = 1 << ldo;
+		ret = pmic_clrsetbits(pmic, REG_SLEEP_SET_OFF2, mask,
+				      enable ? 0 : mask);
+		break;
+	}
+
+	return ret;
+}
+
 static int buck_get_value(struct udevice *dev)
 {
 	int buck = dev->driver_data - 1;
@@ -330,6 +394,13 @@ static int buck_set_value(struct udevice *dev, int uvolt)
 	return _buck_set_value(dev->parent, buck, uvolt);
 }
 
+static int buck_set_suspend_value(struct udevice *dev, int uvolt)
+{
+	int buck = dev->driver_data - 1;
+
+	return _buck_set_suspend_value(dev->parent, buck, uvolt);
+}
+
 static int buck_set_enable(struct udevice *dev, bool enable)
 {
 	int buck = dev->driver_data - 1;
@@ -337,6 +408,13 @@ static int buck_set_enable(struct udevice *dev, bool enable)
 	return _buck_set_enable(dev->parent, buck, enable);
 }
 
+static int buck_set_suspend_enable(struct udevice *dev, bool enable)
+{
+	int buck = dev->driver_data - 1;
+
+	return _buck_set_suspend_enable(dev->parent, buck, enable);
+}
+
 static int buck_get_enable(struct udevice *dev)
 {
 	int buck = dev->driver_data - 1;
@@ -377,6 +455,22 @@ static int ldo_set_value(struct udevice *dev, int uvolt)
 	return pmic_clrsetbits(dev->parent, info->vsel_reg, mask, val);
 }
 
+static int ldo_set_suspend_value(struct udevice *dev, int uvolt)
+{
+	int ldo = dev->driver_data - 1;
+	const struct rk8xx_reg_info *info = get_ldo_reg(dev->parent, ldo);
+	int mask = info->vsel_mask;
+	int val;
+
+	if (info->vsel_sleep_reg == -1)
+		return -ENOSYS;
+	val = (uvolt - info->min_uv) / info->step_uv;
+	debug("%s: reg=%x, mask=%x, val=%x\n", __func__, info->vsel_sleep_reg, mask,
+	      val);
+
+	return pmic_clrsetbits(dev->parent, info->vsel_sleep_reg, mask, val);
+}
+
 static int ldo_set_enable(struct udevice *dev, bool enable)
 {
 	int ldo = dev->driver_data - 1;
@@ -384,6 +478,13 @@ static int ldo_set_enable(struct udevice *dev, bool enable)
 	return _ldo_set_enable(dev->parent, ldo, enable);
 }
 
+static int ldo_set_suspend_enable(struct udevice *dev, bool enable)
+{
+	int ldo = dev->driver_data - 1;
+
+	return _ldo_set_suspend_enable(dev->parent, ldo, enable);
+}
+
 static int ldo_get_enable(struct udevice *dev)
 {
 	int ldo = dev->driver_data - 1;
@@ -456,15 +557,19 @@ static int rk8xx_switch_probe(struct udevice *dev)
 static const struct dm_regulator_ops rk8xx_buck_ops = {
 	.get_value  = buck_get_value,
 	.set_value  = buck_set_value,
+	.set_suspend_value = buck_set_suspend_value,
 	.get_enable = buck_get_enable,
 	.set_enable = buck_set_enable,
+	.set_suspend_enable = buck_set_suspend_enable,
 };
 
 static const struct dm_regulator_ops rk8xx_ldo_ops = {
 	.get_value  = ldo_get_value,
 	.set_value  = ldo_set_value,
+	.set_suspend_value = ldo_set_suspend_value,
 	.get_enable = ldo_get_enable,
 	.set_enable = ldo_set_enable,
+	.set_suspend_enable = ldo_set_suspend_enable,
 };
 
 static const struct dm_regulator_ops rk8xx_switch_ops = {
diff --git a/include/power/rk8xx_pmic.h b/include/power/rk8xx_pmic.h
index b1482b78ce..699fd87dba 100644
--- a/include/power/rk8xx_pmic.h
+++ b/include/power/rk8xx_pmic.h
@@ -173,6 +173,8 @@ enum {
 enum {
 	RK816_REG_DCDC_EN1 = 0x23,
 	RK816_REG_DCDC_EN2,
+	RK816_REG_DCDC_SLP_EN,
+	RK816_REG_LDO_SLP_EN,
 	RK816_REG_LDO_EN1 = 0x27,
 	RK816_REG_LDO_EN2,
 };

commit fbc6dab9388e181eb1e6f7b06a5e27b77d7a826d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 27 16:02:07 2017 +0800

    dm: regulator: support regulator set suspend state
    
    support parse regulator standard property:
            regulator-off-in-suspend;
            regulator-suspend-microvolt;
    
    Change-Id: I59bf60b28293e891b4d2817462efb36447c46887
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/regulator-uclass.c b/drivers/power/regulator/regulator-uclass.c
index 426a933d66..a2aab2b4cf 100644
--- a/drivers/power/regulator/regulator-uclass.c
+++ b/drivers/power/regulator/regulator-uclass.c
@@ -55,6 +55,23 @@ int regulator_set_value(struct udevice *dev, int uV)
 	return ops->set_value(dev, uV);
 }
 
+int regulator_set_suspend_value(struct udevice *dev, int uV)
+{
+	const struct dm_regulator_ops *ops = dev_get_driver_ops(dev);
+	struct dm_regulator_uclass_platdata *uc_pdata;
+
+	uc_pdata = dev_get_uclass_platdata(dev);
+	if (uc_pdata->min_uV != -ENODATA && uV < uc_pdata->min_uV)
+		return -EINVAL;
+	if (uc_pdata->max_uV != -ENODATA && uV > uc_pdata->max_uV)
+		return -EINVAL;
+
+	if (!ops || !ops->set_suspend_value)
+		return -ENOSYS;
+
+	return ops->set_suspend_value(dev, uV);
+}
+
 /*
  * To be called with at most caution as there is no check
  * before setting the actual voltage value.
@@ -116,6 +133,16 @@ int regulator_set_enable(struct udevice *dev, bool enable)
 	return ops->set_enable(dev, enable);
 }
 
+int regulator_set_suspend_enable(struct udevice *dev, bool enable)
+{
+	const struct dm_regulator_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->set_suspend_enable)
+		return -ENOSYS;
+
+	return ops->set_suspend_enable(dev, enable);
+}
+
 int regulator_get_mode(struct udevice *dev)
 {
 	const struct dm_regulator_ops *ops = dev_get_driver_ops(dev);
@@ -181,6 +208,11 @@ int regulator_autoset(struct udevice *dev)
 	int ret = 0;
 
 	uc_pdata = dev_get_uclass_platdata(dev);
+
+	ret = regulator_set_suspend_enable(dev, uc_pdata->suspend_on);
+	if (!ret && uc_pdata->suspend_on)
+		ret = regulator_set_suspend_value(dev, uc_pdata->suspend_uV);
+
 	if (!uc_pdata->always_on && !uc_pdata->boot_on)
 		return -EMEDIUMTYPE;
 
@@ -306,6 +338,7 @@ static int regulator_post_bind(struct udevice *dev)
 static int regulator_pre_probe(struct udevice *dev)
 {
 	struct dm_regulator_uclass_platdata *uc_pdata;
+	ofnode node;
 
 	uc_pdata = dev_get_uclass_platdata(dev);
 	if (!uc_pdata)
@@ -323,6 +356,16 @@ static int regulator_pre_probe(struct udevice *dev)
 	uc_pdata->always_on = dev_read_bool(dev, "regulator-always-on");
 	uc_pdata->boot_on = dev_read_bool(dev, "regulator-boot-on");
 
+	node = dev_read_subnode(dev, "regulator-state-mem");
+	if (ofnode_valid(node)) {
+		uc_pdata->suspend_on = !ofnode_read_bool(node, "regulator-off-in-suspend");
+		if (ofnode_read_u32(node, "regulator-suspend-microvolt", &uc_pdata->suspend_uV))
+			uc_pdata->suspend_uV = uc_pdata->max_uA;
+	} else {
+		uc_pdata->suspend_on = true;
+		uc_pdata->suspend_uV = uc_pdata->max_uA;
+	}
+
 	/* Those values are optional (-ENODATA if unset) */
 	if ((uc_pdata->min_uV != -ENODATA) &&
 	    (uc_pdata->max_uV != -ENODATA) &&
diff --git a/include/power/regulator.h b/include/power/regulator.h
index 2bbc1e51b3..ea1bf995bb 100644
--- a/include/power/regulator.h
+++ b/include/power/regulator.h
@@ -176,6 +176,8 @@ struct dm_regulator_uclass_platdata {
 	int flags;
 	u8 ctrl_reg;
 	u8 volt_reg;
+	bool suspend_on;
+	u32 suspend_uV;
 };
 
 /* Regulator device operations */
@@ -191,6 +193,7 @@ struct dm_regulator_ops {
 	 */
 	int (*get_value)(struct udevice *dev);
 	int (*set_value)(struct udevice *dev, int uV);
+	int (*set_suspend_value)(struct udevice *dev, int uV);
 
 	/**
 	 * The regulator output current function calls operates on a micro Amps.
@@ -215,6 +218,7 @@ struct dm_regulator_ops {
 	 */
 	int (*get_enable)(struct udevice *dev);
 	int (*set_enable)(struct udevice *dev, bool enable);
+	int (*set_suspend_enable)(struct udevice *dev, bool enable);
 
 	/**
 	 * The 'get/set_mode()' function calls should operate on a driver-
@@ -260,6 +264,15 @@ int regulator_get_value(struct udevice *dev);
  */
 int regulator_set_value(struct udevice *dev, int uV);
 
+/**
+ * regulator_set_suspend_value: set the suspend microvoltage value of a given regulator.
+ *
+ * @dev    - pointer to the regulator device
+ * @uV     - the output suspend value to set [micro Volts]
+ * @return - 0 on success or -errno val if fails
+ */
+int regulator_set_suspend_value(struct udevice *dev, int uV);
+
 /**
  * regulator_set_value_force: set the microvoltage value of a given regulator
  *			      without any min-,max condition check
@@ -304,6 +317,15 @@ int regulator_get_enable(struct udevice *dev);
  */
 int regulator_set_enable(struct udevice *dev, bool enable);
 
+/**
+ * regulator_set_suspend_enable: set regulator suspend enable state
+ *
+ * @dev    - pointer to the regulator device
+ * @enable - set true or false
+ * @return - 0 on success or -errno val if fails
+ */
+int regulator_set_suspend_enable(struct udevice *dev, bool enable);
+
 /**
  * regulator_get_mode: get active operation mode id of a given regulator
  *

commit 1367bfe31ccef7a093c26e55a34c6e16400bceb9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Nov 14 21:10:17 2017 +0800

    power: charge animation: implement dm charge display callbacks
    
    Change-Id: I3c38f16dbeafd4defdf4533b7d516060fdca9cf2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index d9ae07db99..5cd7b604ca 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -6,6 +6,7 @@
 
 #include <asm/arch/bootrkp.h>
 #include <common.h>
+#include <console.h>
 #include <dm.h>
 #include <errno.h>
 #include <key.h>
@@ -51,7 +52,7 @@ struct charge_animation_pdata {
 	bool auto_start_kernel;
 };
 
-static int charge_animation_threshold_soc(struct udevice *dev)
+static int charge_animation_get_power_on_soc(struct udevice *dev)
 {
 	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
 
@@ -61,7 +62,7 @@ static int charge_animation_threshold_soc(struct udevice *dev)
 	return pdata->power_on_soc_threshold;
 }
 
-static int charge_animation_threshold_voltage(struct udevice *dev)
+static int charge_animation_get_power_on_voltage(struct udevice *dev)
 {
 	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
 
@@ -71,6 +72,52 @@ static int charge_animation_threshold_voltage(struct udevice *dev)
 	return pdata->power_on_voltage_threshold;
 }
 
+static int charge_animation_get_screen_on_voltage(struct udevice *dev)
+{
+	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
+
+	if (!pdata)
+		return -ENOSYS;
+
+	return pdata->screen_on_voltage_threshold;
+}
+
+static int charge_animation_set_power_on_soc(struct udevice *dev, int val)
+{
+	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
+
+	if (!pdata)
+		return -ENOSYS;
+
+	pdata->power_on_soc_threshold = val;
+
+	return 0;
+}
+
+static int charge_animation_set_power_on_voltage(struct udevice *dev, int val)
+{
+	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
+
+	if (!pdata)
+		return -ENOSYS;
+
+	pdata->power_on_voltage_threshold = val;
+
+	return 0;
+}
+
+static int charge_animation_set_screen_on_voltage(struct udevice *dev, int val)
+{
+	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
+
+	if (!pdata)
+		return -ENOSYS;
+
+	pdata->screen_on_voltage_threshold = val;
+
+	return 0;
+}
+
 /*
  * IF you want to use your own charge images, please:
  *
@@ -435,6 +482,14 @@ static int charge_animation_show(struct udevice *dev)
 				break;
 			}
 		}
+
+		/* Step6: Exit by ctrl+c */
+		if (ctrlc()) {
+			if (voltage >= pdata->screen_on_voltage_threshold)
+				rockchip_show_logo();
+			printf("Exit charge, due to ctrl+c\n");
+			break;
+		}
 	}
 
 	ms = get_timer(charge_start);
@@ -450,8 +505,12 @@ static int charge_animation_show(struct udevice *dev)
 }
 
 static const struct dm_charge_display_ops charge_animation_ops = {
-	.get_power_on_soc = charge_animation_threshold_soc,
-	.get_power_on_voltage = charge_animation_threshold_voltage,
+	.get_power_on_soc = charge_animation_get_power_on_soc,
+	.get_power_on_voltage = charge_animation_get_power_on_voltage,
+	.get_screen_on_voltage = charge_animation_get_screen_on_voltage,
+	.set_power_on_soc = charge_animation_set_power_on_soc,
+	.set_power_on_voltage = charge_animation_set_power_on_voltage,
+	.set_screen_on_voltage = charge_animation_set_screen_on_voltage,
 	.show = charge_animation_show,
 };
 

commit 05b73bbbfe7617d18be96c9b5a2c30da356496a8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Nov 14 21:09:12 2017 +0800

    cmd: charge: support command parameter
    
    This is maily for debug. the format is:
    charge <power on soc> <power on voltage> <screen on voltage>
    
    Change-Id: I821d574a386eb2eddd03ef50f543f96cb05b620e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/cmd/charge.c b/cmd/charge.c
index 805fdb30f7..a9ee0d4306 100644
--- a/cmd/charge.c
+++ b/cmd/charge.c
@@ -12,10 +12,11 @@
 static int charge_display(cmd_tbl_t *cmdtp, int flag, int argc,
 			  char *const argv[])
 {
-	int ret;
+	int on_soc, on_voltage, screen_voltage;
+	int ret, save[3];
 	struct udevice *dev;
 
-	if (argc != 1)
+	if (argc != 4 && argc != 1)
 		return CMD_RET_USAGE;
 
 	ret = uclass_get_device(UCLASS_CHARGE_DISPLAY, 0, &dev);
@@ -28,11 +29,38 @@ static int charge_display(cmd_tbl_t *cmdtp, int flag, int argc,
 		return 0;
 	}
 
-	return charge_display_show(dev);
+	if (argc == 4) {
+		save[0] = charge_display_get_power_on_soc(dev);
+		save[1] = charge_display_get_power_on_voltage(dev);
+		save[2] = charge_display_get_screen_on_voltage(dev);
+
+		on_soc = simple_strtoul(argv[1], NULL, 0);
+		on_voltage = simple_strtoul(argv[2], NULL, 0);
+		screen_voltage = simple_strtoul(argv[3], NULL, 0);
+		debug("new: on_soc=%d, on_voltage=%d, screen_voltage=%d\n",
+		      on_soc, on_voltage, screen_voltage);
+
+		charge_display_set_power_on_soc(dev, on_soc);
+		charge_display_set_power_on_voltage(dev, on_voltage);
+		charge_display_set_screen_on_voltage(dev, screen_voltage);
+
+		charge_display_show(dev);
+
+		charge_display_set_power_on_soc(dev, save[0]);
+		charge_display_set_power_on_voltage(dev, save[1]);
+		charge_display_set_screen_on_voltage(dev, save[2]);
+
+	} else if (argc == 1) {
+		charge_display_show(dev);
+	} else {
+		return CMD_RET_USAGE;
+	}
+
+	return 0;
 }
 
-U_BOOT_CMD(
-	charge, 1, 0, charge_display,
-	"Charge display",
-	""
+U_BOOT_CMD(charge, 4, 0, charge_display,
+	   "Charge display",
+	   "-charge\n"
+	   "-charge <power on soc> <power on voltage> <screen on voltage>"
 );

commit 0cd6d3b96ff337995ff290b22e24325c43229bad
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Nov 14 21:07:53 2017 +0800

    dm: charge display: add interface to get and update fdt parameter
    
    Change-Id: Ie2ab5c8c68fb629fd7628310f8a67084ef751f21
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge-display-uclass.c b/drivers/power/charge-display-uclass.c
index 41bed07ce8..d3899b972f 100644
--- a/drivers/power/charge-display-uclass.c
+++ b/drivers/power/charge-display-uclass.c
@@ -29,6 +29,16 @@ int charge_display_get_power_on_voltage(struct udevice *dev)
 	return ops->get_power_on_voltage(dev);
 }
 
+int charge_display_get_screen_on_voltage(struct udevice *dev)
+{
+	const struct dm_charge_display_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->get_screen_on_voltage)
+		return -ENOSYS;
+
+	return ops->get_screen_on_voltage(dev);
+}
+
 int charge_display_show(struct udevice *dev)
 {
 	const struct dm_charge_display_ops *ops = dev_get_driver_ops(dev);
@@ -39,6 +49,36 @@ int charge_display_show(struct udevice *dev)
 	return ops->show(dev);
 }
 
+int charge_display_set_power_on_soc(struct udevice *dev, int val)
+{
+	const struct dm_charge_display_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->set_power_on_soc)
+		return -ENOSYS;
+
+	return ops->set_power_on_soc(dev, val);
+}
+
+int charge_display_set_power_on_voltage(struct udevice *dev, int val)
+{
+	const struct dm_charge_display_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->set_power_on_voltage)
+		return -ENOSYS;
+
+	return ops->set_power_on_voltage(dev, val);
+}
+
+int charge_display_set_screen_on_voltage(struct udevice *dev, int val)
+{
+	const struct dm_charge_display_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->set_screen_on_voltage)
+		return -ENOSYS;
+
+	return ops->set_screen_on_voltage(dev, val);
+}
+
 UCLASS_DRIVER(charge_display) = {
 	.id	= UCLASS_CHARGE_DISPLAY,
 	.name	= "charge_display",
diff --git a/include/power/charge_display.h b/include/power/charge_display.h
index 9c3486ea52..2fc9b3adec 100644
--- a/include/power/charge_display.h
+++ b/include/power/charge_display.h
@@ -10,11 +10,20 @@
 struct dm_charge_display_ops {
 	int (*get_power_on_soc)(struct udevice *dev);
 	int (*get_power_on_voltage)(struct udevice *dev);
+	int (*get_screen_on_voltage)(struct udevice *dev);
+	int (*set_power_on_soc)(struct udevice *dev, int val);
+	int (*set_power_on_voltage)(struct udevice *dev, int val);
+	int (*set_screen_on_voltage)(struct udevice *dev, int val);
 	int (*show)(struct udevice *dev);
 };
 
 int charge_display_get_power_on_soc(struct udevice *dev);
 int charge_display_get_power_on_voltage(struct udevice *dev);
+int charge_display_get_screen_on_voltage(struct udevice *dev);
+int charge_display_set_power_on_soc(struct udevice *dev, int val);
+int charge_display_set_power_on_voltage(struct udevice *dev, int val);
+int charge_display_set_screen_on_voltage(struct udevice *dev, int val);
+
 int charge_display_show(struct udevice *dev);
 
 #endif

commit 54457d1a884a18b96123c4e20af753864956e4c6
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Nov 29 14:17:07 2017 +0800

    rockchip: rk3126-bnd: enable boot_android
    
    Change-Id: I2e7268d1d49033bdf8c922a8dcfc235cb6fa78b4
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/bnd-d708-rk3126_defconfig b/configs/bnd-d708-rk3126_defconfig
index c86f8c4518..d686968e2f 100644
--- a/configs/bnd-d708-rk3126_defconfig
+++ b/configs/bnd-d708-rk3126_defconfig
@@ -9,6 +9,7 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3126-bnd-d708"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_FASTBOOT=y
 CONFIG_USB_FUNCTION_FASTBOOT=y
 CONFIG_CMD_FASTBOOT=y
@@ -19,6 +20,8 @@ CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_NAND_BOOT=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y

commit 275460b66e641e5aa6e6313c2e5f8028bae3ca34
Author: Jerry Xu <xbl@rock-chips.com>
Date:   Wed Nov 29 15:27:02 2017 +0800

    rockchip: dts: rk312x: support mipi dsi
    
    Change-Id: I76ec4888c9f66dbab95b6c289270934cd190ef01
    Signed-off-by: Jerry Xu <xbl@rock-chips.com>

diff --git a/arch/arm/dts/rk3126-bnd-d708.dts b/arch/arm/dts/rk3126-bnd-d708.dts
index 2f8feb7c96..a185e73ee2 100644
--- a/arch/arm/dts/rk3126-bnd-d708.dts
+++ b/arch/arm/dts/rk3126-bnd-d708.dts
@@ -17,16 +17,6 @@
 		stdout-path = &uart2;
 	};
 
-	vcc5v0_otg: vcc5v0-otg-drv {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc5v0_otg";
-		gpio = <&gpio0 26 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&otg_vbus_drv>;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-	};
-
 	vcc5v0_host: vcc5v0-host-drv {
 		compatible = "regulator-fixed";
 		regulator-name = "vcc5v0_host";
@@ -117,6 +107,71 @@
 	};
 };
 
+&mipi_dphy {
+	status = "okay";
+};
+
+&dsi {
+	status = "okay";
+
+	panel@0 {
+		u-boot,dm-pre-reloc;
+		compatible = "simple-panel-dsi";
+		reg = <0>;
+		backlight = <&backlight>;
+		power-supply = <&ldo6>;
+		power-invert = <1>;
+		enable-gpios = <&gpio2 RK_PC3 GPIO_ACTIVE_HIGH>;
+		reset-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_LOW>;
+		prepare-delay-ms = <20>;
+		reset-delay-ms = <20>;
+		init-delay-ms = <20>;
+		enable-delay-ms = <120>;
+		disable-delay-ms = <20>;
+		unprepare-delay-ms = <20>;
+
+		width-mm = <153>;
+		height-mm = <85>;
+
+		dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
+			      MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
+		dsi,format = <MIPI_DSI_FMT_RGB888>;
+		dsi,lanes = <4>;
+		status = "okay";
+
+		panel-init-sequence = [
+			05 1e 01 01
+			15 00 02 80 47
+			15 00 02 81 40
+			15 00 02 82 04
+			15 00 02 83 77
+			15 00 02 84 0f
+			15 00 02 85 70
+			15 78 02 86 70
+		];
+
+		display-timings {
+			native-mode = <&timing0>;
+
+			timing0: timing0 {
+				clock-frequency = <49500000>;
+				hactive = <1024>;
+				hfront-porch = <120>;
+				hsync-len = <40>;
+				hback-porch = <120>;
+				vactive = <600>;
+				vfront-porch = <14>;
+				vsync-len = <4>;
+				vback-porch = <14>;
+				hsync-active = <0>;
+				vsync-active = <0>;
+				de-active = <0>;
+				pixelclk-active = <0>;
+			};
+		};
+	};
+};
+
 &i2c0 {
 	status = "okay";
 	clock-frequency = <400000>;
@@ -289,6 +344,10 @@
 	status = "okay";
 };
 
+&pwm0 {
+	status = "okay";
+};
+
 &u2phy {
 	status = "okay";
 };
@@ -310,7 +369,6 @@
 };
 
 &usb_otg {
-	vbus-supply = <&vcc5v0_otg>;
 	status = "okay";
 };
 
@@ -333,6 +391,14 @@
 	};
 };
 
+&route_dsi {
+	status = "okay";
+};
+
+&vop {
+	status = "okay";
+};
+
 &saradc {
 	status = "okay";
 };
diff --git a/arch/arm/dts/rk3128.dtsi b/arch/arm/dts/rk3128.dtsi
index c4bd95384b..fabb596fa3 100644
--- a/arch/arm/dts/rk3128.dtsi
+++ b/arch/arm/dts/rk3128.dtsi
@@ -9,6 +9,7 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/pinctrl/rockchip.h>
 #include <dt-bindings/clock/rk3128-cru.h>
+#include <dt-bindings/media/rockchip_mipi_dsi.h>
 #include "skeleton.dtsi"
 
 / {
@@ -385,6 +386,35 @@
 				reg = <1>;
 				remote-endpoint = <&lvds_in_vop>;
 			};
+
+			vop_out_dsi: endpoint@2 {
+				reg = <1>;
+				remote-endpoint = <&dsi_in_vop>;
+			};
+		};
+	};
+
+	dsi: dsi@10110000 {
+		compatible = "rockchip,rk312x-mipi-dsi";
+		reg = <0x10110000 0x4000>;
+		interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru PCLK_MIPI>, <&cru HCLK_VIO_H2P>, <&mipi_dphy>;
+		clock-names = "pclk", "h2p", "hs_clk";
+		resets = <&cru SRST_VIO_MIPI_DSI>;
+		reset-names = "apb";
+		phys = <&mipi_dphy>;
+		phy-names = "mipi_dphy";
+		rockchip,grf = <&grf>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+
+		ports {
+			port {
+				dsi_in_vop: endpoint {
+					remote-endpoint = <&vop_out_dsi>;
+				};
+			};
 		};
 	};
 
@@ -401,6 +431,14 @@
 				charge_logo,mode = "center";
 				connect = <&vop_out_lvds>;
 			};
+
+			route_dsi: route-dsi {
+				logo,uboot = "logo.bmp";
+				logo,kernel = "logo_kernel.bmp";
+				logo,mode = "fullscreen";
+				charge_logo,mode = "center";
+				connect = <&vop_out_dsi>;
+			};
 		};
 	};
 
@@ -510,6 +548,19 @@
 		status = "disabled";
 	};
 
+	mipi_dphy: mipi-dphy@20038000 {
+		compatible = "rockchip,rk312x-mipi-dphy";
+		reg = <0x20038000 0x4000>;
+		clocks = <&cru SCLK_MIPI_24M>, <&cru PCLK_MIPIPHY>, <&cru HCLK_VIO_H2P>;
+		clock-names = "ref", "pclk", "h2p";
+		clock-output-names = "mipi_dphy_pll";
+		#clock-cells = <0>;
+		resets = <&cru SRST_MIPIPHY_P>;
+		reset-names = "apb";
+		#phy-cells = <0>;
+		status = "disabled";
+	};
+
 	lvds: lvds@20038000 {
 		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3126-lvds";

commit 7d46341ee478732a8ac7052bf8c6dcfa6ef4d86e
Author: Jerry Xu <xbl@rock-chips.com>
Date:   Wed Nov 29 15:25:07 2017 +0800

    rockchip: include: rk3128-cru: add same clk define for mipi dsi
    
    Change-Id: I045ad0101c152648de2a0c53d160b2398367a6e4
    Signed-off-by: Jerry Xu <xbl@rock-chips.com>

diff --git a/include/dt-bindings/clock/rk3128-cru.h b/include/dt-bindings/clock/rk3128-cru.h
index 476268a78b..7ab50902c7 100644
--- a/include/dt-bindings/clock/rk3128-cru.h
+++ b/include/dt-bindings/clock/rk3128-cru.h
@@ -44,6 +44,7 @@
 #define SCLK_PVTM_CORE          123
 #define SCLK_PVTM_GPU           124
 #define SCLK_PVTM_VIDEO         125
+#define SCLK_MIPI_24M           148
 #define SCLK_MAC		151
 #define SCLK_MACREF		152
 #define SCLK_SFC		160
@@ -64,6 +65,7 @@
 #define PCLK_GPIO1		321
 #define PCLK_GPIO2		322
 #define PCLK_GPIO3		323
+#define PCLK_MIPI               325
 #define PCLK_GRF		329
 #define PCLK_I2C0		332
 #define PCLK_I2C1		333
@@ -80,6 +82,7 @@
 #define PCLK_PERI		363
 #define PCLK_DDRUPCTL		364
 #define PCLK_WDT		368
+#define PCLK_MIPIPHY            370
 
 /* hclk gates */
 #define HCLK_OTG0		449
@@ -91,6 +94,7 @@
 #define HCLK_I2S		462
 #define HCLK_LCDC		465
 #define HCLK_ROM		467
+#define HCLK_VIO_H2P            469
 #define HCLK_VIO_BUS		472
 #define HCLK_VCODEC		476
 #define HCLK_CPU		477
@@ -129,6 +133,7 @@
 #define SRST_GPIO0		32
 #define SRST_GPIO1		33
 #define SRST_GPIO2		34
+#define SRST_MIPIPHY_P          36
 #define SRST_UART0		39
 #define SRST_UART1		40
 #define SRST_UART2		41
@@ -186,5 +191,6 @@
 #define SRST_GPU_NIU_A		122
 
 #define SRST_DBG_P		131
+#define SRST_VIO_MIPI_DSI       137
 
 #endif

commit b1db1c31495a2f7592fe5d35e84833a2a9f6d252
Author: Jerry Xu <xbl@rock-chips.com>
Date:   Tue Nov 28 20:55:55 2017 +0800

    drm/rockchip: dsi-panel: support power-supply
    
    Change-Id: I6b3dfbe4c1539961423a2ebd74edaf7ce91fe0c9
    Signed-off-by: Jerry Xu <xbl@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_dsi_panel.c b/drivers/video/drm/rockchip_dsi_panel.c
old mode 100644
new mode 100755
index c1d4128eaf..fed1fbc5fb
--- a/drivers/video/drm/rockchip_dsi_panel.c
+++ b/drivers/video/drm/rockchip_dsi_panel.c
@@ -19,6 +19,7 @@
 #include <dm/device.h>
 #include <dm/uclass-internal.h>
 #include <backlight.h>
+#include <power/regulator.h>
 #include <asm/gpio.h>
 
 #include "rockchip_display.h"
@@ -54,6 +55,8 @@ struct rockchip_dsi_panel {
 
 	int bus_format;
 
+	struct udevice *power_supply;
+	bool power_invert;
 	struct udevice *backlight;
 	struct gpio_desc enable;
 	struct gpio_desc reset;
@@ -183,6 +186,14 @@ static int rockchip_dsi_panel_prepare(struct display_state *state)
 	struct rockchip_dsi_panel *panel = panel_state->private;
 	int ret;
 
+	if (panel->power_supply) {
+		ret = regulator_set_enable(panel->power_supply,
+					   panel->power_invert);
+		if (ret)
+			printf("%s: failed to enable power_supply",
+			       __func__);
+	}
+
 	dm_gpio_set_value(&panel->enable, 1);
 	msleep(panel->delay_prepare);
 
@@ -319,6 +330,16 @@ static int rockchip_dsi_panel_parse_dt(const void *blob, int node, struct rockch
 		return ret;
 	}
 
+	ret = uclass_get_device_by_phandle(UCLASS_REGULATOR, panel->dev,
+					   "power-supply",
+					   &panel->power_supply);
+	if (ret && ret != -ENOENT) {
+		printf("%s: Cannot get power supply: ret=%d\n", __func__, ret);
+		return ret;
+	}
+
+	panel->power_invert = !!fdtdec_get_int(blob, node, "power_invert", 0);
+
 	/* keep panel blank on init. */
 	dm_gpio_set_value(&panel->enable, 0);
 	dm_gpio_set_value(&panel->reset, 0);

commit 740d383426281565142a88dd1f3f36ebbf7e053a
Author: Jerry Xu <xbl@rock-chips.com>
Date:   Tue Nov 28 20:54:26 2017 +0800

    drm/rockchip: dphy: support rk312x
    
    Change-Id: I6810d2291407024de3024be01bf514e03258a813
    Signed-off-by: Jerry Xu <xbl@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_phy.c b/drivers/video/drm/rockchip_phy.c
index 6572735ab0..2c7f146953 100644
--- a/drivers/video/drm/rockchip_phy.c
+++ b/drivers/video/drm/rockchip_phy.c
@@ -26,6 +26,10 @@ static const struct rockchip_phy rockchip_rk3366_mipi_dphy_data = {
 static const struct rockchip_phy rockchip_rk3368_mipi_dphy_data = {
 	 .funcs = &inno_mipi_dphy_funcs,
 };
+
+static const struct rockchip_phy rockchip_rk312x_mipi_dphy_data = {
+	 .funcs = &inno_mipi_dphy_funcs,
+};
 #endif
 
 static const struct udevice_id rockchip_phy_ids[] = {
@@ -38,6 +42,10 @@ static const struct udevice_id rockchip_phy_ids[] = {
 	 .compatible = "rockchip,rk3368-mipi-dphy",
 	 .data = (ulong)&rockchip_rk3368_mipi_dphy_data,
 	},
+	{
+	 .compatible = "rockchip,rk312x-mipi-dphy",
+	 .data = (ulong)&rockchip_rk312x_mipi_dphy_data,
+	},
 #endif
 	{}
 };

commit b43d5222fe48dfb95ef4d5e5edc0f4a869ad670c
Author: Jerry Xu <xbl@rock-chips.com>
Date:   Tue Nov 28 20:52:22 2017 +0800

    drm/rockchip: support mipi dsi
    
    Change-Id: I2431121a010e05f241337124fb4d6b799b1a79ff
    Signed-off-by: Jerry Xu <xbl@rock-chips.com>

diff --git a/drivers/video/drm/Makefile b/drivers/video/drm/Makefile
index 352b2be2a1..9e865118fc 100644
--- a/drivers/video/drm/Makefile
+++ b/drivers/video/drm/Makefile
@@ -12,7 +12,6 @@ obj-$(CONFIG_DRM_ROCKCHIP_MIPI_DSI)	+= rockchip_mipi_dsi.o
 obj-$(CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI) += rockchip-dw-mipi-dsi.o \
 			rockchip-inno-mipi-dphy.o rockchip_dsi_panel.o
 obj-$(CONFIG_DRM_ROCKCHIP_DW_HDMI) += rockchip_dw_hdmi.o dw_hdmi.o
-obj-$(CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI) += rockchip-dw-mipi-dsi.o rockchip-inno-mipi-dphy.o
 obj-$(CONFIG_DRM_ROCKCHIP_ANALOGIX_DP) += rockchip_analogix_dp.o rockchip_analogix_dp_reg.o
 obj-$(CONFIG_DRM_ROCKCHIP_LVDS) += rockchip_lvds.o
 obj-$(CONFIG_DRM_ROCKCHIP_PANEL) += panel_simple.o
diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index ab1d7042df..55e068a9f1 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -46,13 +46,33 @@
 #define RK3288_DSI0_SEL_VOP_LIT		BIT(6)
 #define RK3288_DSI1_SEL_VOP_LIT		BIT(9)
 
+#define RK3288_GRF_SOC_CON9		0x0268
+
+#define RK3288_GRF_SOC_CON14		0x027c
+#define RK3288_TXRX_BASEDIR		BIT(15)
+#define RK3288_TXRX_MASTERSLAVEZ	BIT(14)
+#define RK3288_TXRX_CLKEN		BIT(12)
+
+#define RK3366_GRF_SOC_CON0		0x0400
+#define RK3366_DSI_SEL_VOP_LIT		BIT(2)
+
 #define RK3399_GRF_SOC_CON19		0x6250
 #define RK3399_DSI0_SEL_VOP_LIT		BIT(0)
 #define RK3399_DSI1_SEL_VOP_LIT		BIT(4)
 
 /* disable turnrequest, turndisable, forcetxstopmode, forcerxmode */
 #define RK3399_GRF_SOC_CON22		0x6258
-#define RK3399_GRF_DSI_MODE		0xffff0000
+#define RK3399_GRF_DSI0_MODE		0xffff0000
+/* disable turndisable, forcetxstopmode, forcerxmode, enable */
+#define RK3399_GRF_SOC_CON23		0x625c
+#define RK3399_GRF_DSI1_MODE1		0xffff0000
+#define RK3399_GRF_DSI1_ENABLE		0x000f000f
+/* disable basedir and enable clk*/
+#define RK3399_GRF_SOC_CON24		0x6260
+#define RK3399_TXRX_MASTERSLAVEZ	BIT(7)
+#define RK3399_TXRX_ENABLECLK		BIT(6)
+#define RK3399_TXRX_BASEDIR		BIT(5)
+#define RK3399_GRF_DSI1_MODE2		0x00600040
 
 #define DSI_VERSION			0x00
 #define DSI_PWR_UP			0x04
@@ -101,16 +121,22 @@
 #define ENABLE_CMD_MODE			BIT(0)
 
 #define DSI_VID_MODE_CFG		0x38
+#define VPG_EN				BIT(16)
 #define FRAME_BTA_ACK			BIT(14)
-#define ENABLE_LOW_POWER		(0x3f << 8)
-#define ENABLE_LOW_POWER_MASK		(0x3f << 8)
-#define VID_MODE_TYPE_BURST_SYNC_PULSES		0x2
-#define VID_MODE_TYPE_MASK			0x3
+#define LP_HFP_EN			BIT(13)
+#define LP_HBP_EN			BIT(12)
+#define ENABLE_LOW_POWER		(0xf << 8)
+#define ENABLE_LOW_POWER_MASK		(0xf << 8)
+#define VID_MODE_TYPE_BURST_SYNC_PULSES	0x0
+#define VID_MODE_TYPE_BURST_SYNC_EVENTS	0x1
+#define VID_MODE_TYPE_BURST		0x2
 
 #define DSI_VID_PKT_SIZE		0x3c
 #define VID_PKT_SIZE(p)			(((p) & 0x3fff) << 0)
 #define VID_PKT_MAX_SIZE		0x3fff
 
+#define DSI_VID_NUM_CHUMKS		0x40
+#define DSI_VID_NULL_PKT_SIZE		0x44
 #define DSI_VID_HSA_TIME		0x48
 #define DSI_VID_HBP_TIME		0x4c
 #define DSI_VID_HLINE_TIME		0x50
@@ -289,30 +315,51 @@ struct dw_mipi_dsi_plat_data {
 	u32 grf_switch_reg;
 	u32 grf_dsi0_mode;
 	u32 grf_dsi0_mode_reg;
+	u32 grf_dsi1_mode;
+	u32 grf_dsi1_mode_reg1;
+	u32 dsi1_basedir;
+	u32 dsi1_masterslavez;
+	u32 dsi1_enableclk;
+	u32 grf_dsi1_mode_reg2;
+	u32 grf_dsi1_cfg_reg;
 	unsigned int max_data_lanes;
 	u32 max_bit_rate_per_lane;
 	bool has_vop_sel;
+	bool vsync_quirk;
+};
+
+struct mipi_dphy {
+	/* Non-SNPS PHY */
+	const struct rockchip_phy *phy;
+
+	u16 input_div;
+	u16 feedback_div;
 };
 
 struct dw_mipi_dsi {
 	void *base;
 	void *grf;
+	const void *blob;
+	int node;
+
+	/* dual-channel */
+	struct dw_mipi_dsi *master;
+	struct dw_mipi_dsi *slave;
 
 	unsigned int lane_mbps; /* per lane */
 	u32 channel;
 	u32 lanes;
 	u32 format;
 	u32 mode_flags;
-	u16 input_div;
-	u16 feedback_div;
+	struct mipi_dphy dphy;
 	struct drm_display_mode *mode;
 
 	const struct dw_mipi_dsi_plat_data *pdata;
 };
 
 enum dw_mipi_dsi_mode {
-	DW_MIPI_DSI_CMD_MODE,
-	DW_MIPI_DSI_VID_MODE,
+	DSI_COMMAND_MODE,
+	DSI_VIDEO_MODE,
 };
 
 struct dphy_pll_testdin_map {
@@ -345,19 +392,6 @@ static int max_mbps_to_testdin(unsigned int max_mbps)
 	return -EINVAL;
 }
 
-/*
- * The controller should generate 2 frames before
- * preparing the peripheral.
- */
-static void dw_mipi_dsi_wait_for_two_frames(struct dw_mipi_dsi *dsi)
-{
-	int refresh, two_frames;
-
-	refresh = drm_mode_vrefresh(dsi->mode);
-	two_frames = DIV_ROUND_UP(MSEC_PER_SEC, refresh) * 2;
-	mdelay(two_frames);
-}
-
 static inline void dsi_write(struct dw_mipi_dsi *dsi, u32 reg, u32 val)
 {
 	writel(val, dsi->base + reg);
@@ -368,6 +402,56 @@ static inline u32 dsi_read(struct dw_mipi_dsi *dsi, u32 reg)
 	return readl(dsi->base + reg);
 }
 
+static int rockchip_wait_w_pld_fifo_not_full(struct dw_mipi_dsi *dsi)
+{
+	u32 sts;
+	int ret;
+
+	ret = readl_poll_timeout(dsi->base + DSI_CMD_PKT_STATUS,
+				 sts, !(sts & GEN_PLD_W_FULL), 10,
+				 CMD_PKT_STATUS_TIMEOUT_US);
+	if (ret < 0) {
+		printf("generic write payload fifo is full\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+static int rockchip_wait_cmd_fifo_not_full(struct dw_mipi_dsi *dsi)
+{
+	u32 sts;
+	int ret;
+
+	ret = readl_poll_timeout(dsi->base + DSI_CMD_PKT_STATUS,
+				 sts, !(sts & GEN_CMD_FULL), 10,
+				 CMD_PKT_STATUS_TIMEOUT_US);
+	if (ret < 0) {
+		printf("generic write cmd fifo is full\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+static int rockchip_wait_write_fifo_empty(struct dw_mipi_dsi *dsi)
+{
+	u32 sts;
+	u32 mask;
+	int ret;
+
+	mask = GEN_CMD_EMPTY | GEN_PLD_W_EMPTY;
+	ret = readl_poll_timeout(dsi->base + DSI_CMD_PKT_STATUS,
+				 sts, (sts & mask) == mask, 10,
+				 CMD_PKT_STATUS_TIMEOUT_US);
+	if (ret < 0) {
+		printf("generic write fifo is full\n");
+		return ret;
+	}
+
+	return 0;
+}
+
 static void dw_mipi_dsi_phy_write(struct dw_mipi_dsi *dsi, u8 test_code,
 				 u8 test_data)
 {
@@ -415,12 +499,13 @@ static int dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi)
 
 	dw_mipi_dsi_phy_write(dsi, 0x44, HSFREQRANGE_SEL(testdin));
 
+	dw_mipi_dsi_phy_write(dsi, 0x17, INPUT_DIVIDER(dsi->dphy.input_div));
+	val = LOOP_DIV_LOW_SEL(dsi->dphy.feedback_div) | LOW_PROGRAM_EN;
+	dw_mipi_dsi_phy_write(dsi, 0x18, val);
+	dw_mipi_dsi_phy_write(dsi, 0x19, PLL_LOOP_DIV_EN | PLL_INPUT_DIV_EN);
+	val = LOOP_DIV_HIGH_SEL(dsi->dphy.feedback_div) | HIGH_PROGRAM_EN;
+	dw_mipi_dsi_phy_write(dsi, 0x18, val);
 	dw_mipi_dsi_phy_write(dsi, 0x19, PLL_LOOP_DIV_EN | PLL_INPUT_DIV_EN);
-	dw_mipi_dsi_phy_write(dsi, 0x17, INPUT_DIVIDER(dsi->input_div));
-	dw_mipi_dsi_phy_write(dsi, 0x18, LOOP_DIV_LOW_SEL(dsi->feedback_div) |
-					 LOW_PROGRAM_EN);
-	dw_mipi_dsi_phy_write(dsi, 0x18, LOOP_DIV_HIGH_SEL(dsi->feedback_div) |
-					 HIGH_PROGRAM_EN);
 
 	dw_mipi_dsi_phy_write(dsi, 0x20, POWER_CONTROL | INTERNAL_REG_CURRENT |
 					 BIAS_BLOCK_ON | BANDGAP_ON);
@@ -437,20 +522,20 @@ static int dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi)
 					 BANDGAP_SEL(BANDGAP_96_10));
 
 	dw_mipi_dsi_phy_write(dsi, 0x70, TLP_PROGRAM_EN | 0xf);
-	dw_mipi_dsi_phy_write(dsi, 0x71, THS_PRE_PROGRAM_EN | 0x55);
+	dw_mipi_dsi_phy_write(dsi, 0x71, THS_PRE_PROGRAM_EN | 0x2d);
 	dw_mipi_dsi_phy_write(dsi, 0x72, THS_ZERO_PROGRAM_EN | 0xa);
 
 	dsi_write(dsi, DSI_PHY_RSTZ, PHY_ENFORCEPLL | PHY_ENABLECLK |
 				     PHY_UNRSTZ | PHY_UNSHUTDOWNZ);
 
-	ret = readx_poll_timeout(readl, dsi->base + DSI_PHY_STATUS,
+	ret = readl_poll_timeout(dsi->base + DSI_PHY_STATUS,
 				 val, val & LOCK, 1000, PHY_STATUS_TIMEOUT_US);
 	if (ret < 0) {
 		printf("failed to wait for phy lock state\n");
 		return ret;
 	}
 
-	ret = readx_poll_timeout(readl, dsi->base + DSI_PHY_STATUS,
+	ret = readl_poll_timeout(dsi->base + DSI_PHY_STATUS,
 				 val, val & STOP_STATE_CLK_LANE, 1000,
 				 PHY_STATUS_TIMEOUT_US);
 	if (ret < 0)
@@ -459,137 +544,160 @@ static int dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi)
 	return ret;
 }
 
-static unsigned long dw_mipi_dsi_set_pll(struct dw_mipi_dsi *dsi,
-					 unsigned long rate)
+static unsigned long rockchip_dsi_calc_bandwidth(struct dw_mipi_dsi *dsi)
 {
-	unsigned int i, pre;
-	unsigned long pllref, tmp;
-	unsigned int m = 1, n = 1;
-
-	pllref = 24000000;
-	tmp = pllref;
-
-	for (i = 1; i < 6; i++) {
-		pre = pllref / i;
-		if ((tmp > (rate % pre)) && (rate / pre < 512)) {
-			tmp = rate % pre;
-			n = i;
-			m = rate / pre;
-		}
-		if (tmp == 0)
-			break;
-	}
-
-	dsi->input_div = n;
-	dsi->feedback_div = m;
-
-	return pllref * m / n;
-}
-
-static unsigned long dw_mipi_dsi_calc_link_bandwidth(struct dw_mipi_dsi *dsi)
-{
-	unsigned long mpclk, tmp;
-	unsigned int target_mbps = 1000, max_mbps;
 	int bpp;
-
+	unsigned long mpclk, tmp;
+	unsigned long target_mbps = 1000;
+	unsigned int max_mbps;
+	int lanes;
+	int rate;
+
+	/* optional override of the desired bandwidth */
+	rate = fdt_getprop_u32_default_node(dsi->blob, dsi->node, 0,
+					     "rockchip,lane-rate", -1);
+	if (rate > 0) {
+		return rate;
+	}
 	max_mbps = dsi->pdata->max_bit_rate_per_lane / USEC_PER_SEC;
 
 	bpp = mipi_dsi_pixel_format_to_bpp(dsi->format);
 	if (bpp < 0) {
-		printf("failed to get bpp for pixel format %d\n", dsi->format);
-		return bpp;
+		printf("failed to get bpp for pixel format %d\n",
+			dsi->format);
+		bpp = 24;
 	}
 
+	lanes = dsi->slave ? dsi->lanes * 2 : dsi->lanes;
+
 	mpclk = DIV_ROUND_UP(dsi->mode->clock, MSEC_PER_SEC);
 	if (mpclk) {
 		/* take 1 / 0.9, since mbps must big than bandwidth of RGB */
-		tmp = mpclk * (bpp / dsi->lanes) * 10 / 9;
+		tmp = mpclk * (bpp / lanes) * 10 / 9;
 		if (tmp < max_mbps)
 			target_mbps = tmp;
 		else
 			printf("DPHY clock frequency is out of range\n");
 	}
 
-	return target_mbps * USEC_PER_SEC;
+	return target_mbps;
 }
 
-static int dw_mipi_dsi_gen_pkt_hdr_write(struct dw_mipi_dsi *dsi, u32 val)
+static int dw_mipi_dsi_get_lane_bps(struct dw_mipi_dsi *dsi)
 {
-	int ret;
-	int sts = 0;
+	unsigned int i, pre;
+	unsigned long pllref, tmp;
+	unsigned int m = 1, n = 1;
+	unsigned long target_mbps;
 
-	ret = readx_poll_timeout(readl, dsi->base + DSI_CMD_PKT_STATUS,
-				 sts, !(sts & GEN_CMD_FULL), 1000,
-				 CMD_PKT_STATUS_TIMEOUT_US);
-	if (ret < 0) {
-		printf("failed to get available command FIFO\n");
-		return ret;
-	}
+	if (dsi->master)
+		return 0;
 
-	dsi_write(dsi, DSI_GEN_HDR, val);
+	target_mbps = rockchip_dsi_calc_bandwidth(dsi);
 
-	ret = readx_poll_timeout(readl, dsi->base + DSI_CMD_PKT_STATUS,
-				 sts, sts & (GEN_CMD_EMPTY | GEN_PLD_W_EMPTY),
-				 1000, CMD_PKT_STATUS_TIMEOUT_US);
-	if (ret < 0) {
-		printf("failed to write command FIFO\n");
-		return ret;
+	/* ref clk : 24MHz*/
+	pllref = 24;
+	tmp = pllref;
+
+	for (i = 1; i < 6; i++) {
+		pre = pllref / i;
+		if ((tmp > (target_mbps % pre)) && (target_mbps / pre < 512)) {
+			tmp = target_mbps % pre;
+			n = i;
+			m = target_mbps / pre;
+		}
+		if (tmp == 0)
+			break;
+	}
+
+	dsi->lane_mbps = pllref / n * m;
+	dsi->dphy.input_div = n;
+	dsi->dphy.feedback_div = m;
+	if (dsi->slave) {
+		dsi->slave->lane_mbps = dsi->lane_mbps;
+		dsi->slave->dphy.input_div = n;
+		dsi->slave->dphy.feedback_div = m;
 	}
 
 	return 0;
 }
 
-static int dw_mipi_dsi_short_write(struct dw_mipi_dsi *dsi,
-				   const struct mipi_dsi_msg *msg)
+static void rockchip_set_transfer_mode(struct dw_mipi_dsi *dsi, int flags)
 {
-	const u16 *tx_buf = msg->tx_buf;
-	u32 val = GEN_HDATA(*tx_buf) | GEN_HTYPE(msg->type);
-
-	if (msg->tx_len > 2) {
-		printf("too long tx buf length %zu for short write\n",
-		       msg->tx_len);
-		return -EINVAL;
+	if (flags & MIPI_DSI_MSG_USE_LPM) {
+		dsi_write(dsi, DSI_CMD_MODE_CFG, CMD_MODE_ALL_LP);
+		dsi_write(dsi, DSI_LPCLK_CTRL, 0);
+	} else {
+		dsi_write(dsi, DSI_CMD_MODE_CFG, 0);
+		dsi_write(dsi, DSI_LPCLK_CTRL, PHY_TXREQUESTCLKHS);
 	}
-
-	return dw_mipi_dsi_gen_pkt_hdr_write(dsi, val);
 }
 
-static int dw_mipi_dsi_long_write(struct dw_mipi_dsi *dsi,
-				  const struct mipi_dsi_msg *msg)
+static ssize_t rockchip_dsi_send_packet(struct dw_mipi_dsi *dsi,
+					const struct mipi_dsi_msg *msg)
 {
-	const u32 *tx_buf = msg->tx_buf;
-	int len = msg->tx_len, pld_data_bytes = sizeof(*tx_buf), ret;
-	u32 val = GEN_HDATA(msg->tx_len) | GEN_HTYPE(msg->type);
-	u32 remainder = 0;
-	u32 sts = 0;
-
-	if (msg->tx_len < 3) {
-		printf("wrong tx buf length %zu for long write\n",
-		       msg->tx_len);
-		return -EINVAL;
+	struct mipi_dsi_packet packet;
+	int ret;
+	int val;
+
+	/* create a packet to the DSI protocol */
+	ret = mipi_dsi_create_packet(&packet, msg);
+	if (ret) {
+		printf("failed to create packet: %d\n", ret);
+		return ret;
 	}
 
-	while (DIV_ROUND_UP(len, pld_data_bytes)) {
-		if (len < pld_data_bytes) {
-			memcpy(&remainder, tx_buf, len);
-			dsi_write(dsi, DSI_GEN_PLD_DATA, remainder);
-			len = 0;
+	rockchip_set_transfer_mode(dsi, msg->flags);
+
+	/* Send payload,  */
+	while (DIV_ROUND_UP(packet.payload_length, 4)) {
+		/*
+		 * Alternatively, you can always keep the FIFO
+		 * nearly full by monitoring the FIFO state until
+		 * it is not full, and then writea single word of data.
+		 * This solution is more resource consuming
+		 * but it simultaneously avoids FIFO starvation,
+		 * making it possible to use FIFO sizes smaller than
+		 * the amount of data of the longest packet to be written.
+		 */
+		ret = rockchip_wait_w_pld_fifo_not_full(dsi);
+		if (ret)
+			return ret;
+
+		if (packet.payload_length < 4) {
+			/* send residu payload */
+			val = 0;
+			memcpy(&val, packet.payload, packet.payload_length);
+			dsi_write(dsi, DSI_GEN_PLD_DATA, val);
+			packet.payload_length = 0;
 		} else {
-			dsi_write(dsi, DSI_GEN_PLD_DATA, *tx_buf);
-			tx_buf++;
-			len -= pld_data_bytes;
+			val = get_unaligned_le32(packet.payload);
+			dsi_write(dsi, DSI_GEN_PLD_DATA, val);
+			packet.payload += 4;
+			packet.payload_length -= 4;
 		}
+	}
+
+	ret = rockchip_wait_cmd_fifo_not_full(dsi);
+	if (ret)
+		return ret;
+
+	/* Send packet header */
+	val = get_unaligned_le32(packet.header);
+	dsi_write(dsi, DSI_GEN_HDR, val);
+
+	ret = rockchip_wait_write_fifo_empty(dsi);
+	if (ret)
+		return ret;
 
-		ret = readx_poll_timeout(readl, dsi->base + DSI_CMD_PKT_STATUS,
-					 sts, !(sts & GEN_PLD_W_FULL), 1000,
-					 CMD_PKT_STATUS_TIMEOUT_US);
-		if (ret < 0) {
-			printf("failed to get available write payload FIFO\n");
+	if (dsi->slave) {
+		ret = rockchip_dsi_send_packet(dsi->slave, msg);
+		if (ret) {
+			printf("failed to send command through dsi slave, ret = %d\n", ret);
 			return ret;
 		}
 	}
-
-	return dw_mipi_dsi_gen_pkt_hdr_write(dsi, val);
+	return 0;
 }
 
 static ssize_t rockchip_dw_mipi_dsi_transfer(struct display_state *state,
@@ -597,35 +705,22 @@ static ssize_t rockchip_dw_mipi_dsi_transfer(struct display_state *state,
 {
 	struct connector_state *conn_state = &state->conn_state;
 	struct dw_mipi_dsi *dsi = conn_state->private;
-	int ret;
-
-	switch (msg->type) {
-	case MIPI_DSI_DCS_SHORT_WRITE:
-	case MIPI_DSI_DCS_SHORT_WRITE_PARAM:
-	case MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM:
-	case MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM:
-	case MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM:
-	case MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE:
-		ret = dw_mipi_dsi_short_write(dsi, msg);
-		break;
-	case MIPI_DSI_DCS_LONG_WRITE:
-	case MIPI_DSI_GENERIC_LONG_WRITE:
-		ret = dw_mipi_dsi_long_write(dsi, msg);
-		break;
-	default:
-		printf("unsupport packet data type: %d\n", msg->type);
-		ret = -EINVAL;
-		break;
-	}
 
-	return ret;
+	return rockchip_dsi_send_packet(dsi, msg);
 }
 
 static void dw_mipi_dsi_video_mode_config(struct dw_mipi_dsi *dsi)
 {
 	u32 val;
 
-	val = VID_MODE_TYPE_BURST_SYNC_PULSES | ENABLE_LOW_POWER;
+	val = LP_HFP_EN | ENABLE_LOW_POWER;
+
+	if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST)
+		val |= VID_MODE_TYPE_BURST;
+	else if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE)
+		val |= VID_MODE_TYPE_BURST_SYNC_PULSES;
+	else
+		val |= VID_MODE_TYPE_BURST_SYNC_EVENTS;
 
 	dsi_write(dsi, DSI_VID_MODE_CFG, val);
 }
@@ -633,32 +728,43 @@ static void dw_mipi_dsi_video_mode_config(struct dw_mipi_dsi *dsi)
 static void dw_mipi_dsi_set_mode(struct dw_mipi_dsi *dsi,
 				 enum dw_mipi_dsi_mode mode)
 {
-	if (mode == DW_MIPI_DSI_CMD_MODE) {
-		dsi_write(dsi, DSI_PWR_UP, RESET);
+	if (mode == DSI_COMMAND_MODE) {
 		dsi_write(dsi, DSI_MODE_CFG, ENABLE_CMD_MODE);
-		dsi_write(dsi, DSI_PWR_UP, POWERUP);
 	} else {
 		dsi_write(dsi, DSI_PWR_UP, RESET);
+		dsi_write(dsi, DSI_LPCLK_CTRL, PHY_TXREQUESTCLKHS);
 		dsi_write(dsi, DSI_MODE_CFG, ENABLE_VIDEO_MODE);
-		dw_mipi_dsi_video_mode_config(dsi);
 		dsi_write(dsi, DSI_PWR_UP, POWERUP);
 	}
 }
 
 static void dw_mipi_dsi_disable(struct dw_mipi_dsi *dsi)
 {
+	dw_mipi_dsi_set_mode(dsi, DSI_COMMAND_MODE);
+
+	/* host */
+	dsi_write(dsi, DSI_LPCLK_CTRL, 0);
 	dsi_write(dsi, DSI_PWR_UP, RESET);
+
+	/* phy */
 	dsi_write(dsi, DSI_PHY_RSTZ, PHY_RSTZ);
+
+	if (dsi->slave)
+		dw_mipi_dsi_disable(dsi->slave);
 }
 
 static void dw_mipi_dsi_init(struct dw_mipi_dsi *dsi)
 {
+	u32 esc_clk_div;
+
 	dsi_write(dsi, DSI_PWR_UP, RESET);
 	dsi_write(dsi, DSI_PHY_RSTZ, PHY_DISFORCEPLL | PHY_DISABLECLK
 		  | PHY_RSTZ | PHY_SHUTDOWNZ);
+
+	/* The maximum value of the escape clock frequency is 20MHz */
+	esc_clk_div = DIV_ROUND_UP(dsi->lane_mbps >> 3, 20);
 	dsi_write(dsi, DSI_CLKMGR_CFG, TO_CLK_DIVIDSION(10) |
-		  TX_ESC_CLK_DIVIDSION(7));
-	dsi_write(dsi, DSI_LPCLK_CTRL, PHY_TXREQUESTCLKHS);
+		  TX_ESC_CLK_DIVIDSION(esc_clk_div));
 }
 
 static void dw_mipi_dsi_dpi_config(struct dw_mipi_dsi *dsi,
@@ -681,11 +787,14 @@ static void dw_mipi_dsi_dpi_config(struct dw_mipi_dsi *dsi,
 		break;
 	}
 
-	if (!(mode->flags & DRM_MODE_FLAG_PVSYNC))
+	if (mode->flags & DRM_MODE_FLAG_NVSYNC)
 		val |= VSYNC_ACTIVE_LOW;
-	if (!(mode->flags & DRM_MODE_FLAG_PHSYNC))
+	if (mode->flags & DRM_MODE_FLAG_NHSYNC)
 		val |= HSYNC_ACTIVE_LOW;
 
+	if (dsi->pdata->vsync_quirk)
+		val ^= VSYNC_ACTIVE_LOW;
+
 	dsi_write(dsi, DSI_DPI_VCID, DPI_VID(dsi->channel));
 	dsi_write(dsi, DSI_DPI_COLOR_CODING, color);
 	dsi_write(dsi, DSI_DPI_CFG_POL, val);
@@ -701,36 +810,41 @@ static void dw_mipi_dsi_packet_handler_config(struct dw_mipi_dsi *dsi)
 static void dw_mipi_dsi_video_packet_config(struct dw_mipi_dsi *dsi,
 					    struct drm_display_mode *mode)
 {
-	dsi_write(dsi, DSI_VID_PKT_SIZE, VID_PKT_SIZE(mode->hdisplay));
+	int pkt_size;
+
+	if (dsi->slave || dsi->master)
+		pkt_size = VID_PKT_SIZE(mode->hdisplay / 2 + 4);
+	else
+		pkt_size = VID_PKT_SIZE(mode->hdisplay);
+
+	dsi_write(dsi, DSI_VID_PKT_SIZE, pkt_size);
 }
 
 static void dw_mipi_dsi_command_mode_config(struct dw_mipi_dsi *dsi)
 {
 	dsi_write(dsi, DSI_TO_CNT_CFG, HSTX_TO_CNT(1000) | LPRX_TO_CNT(1000));
 	dsi_write(dsi, DSI_BTA_TO_CNT, 0xd00);
-	dsi_write(dsi, DSI_CMD_MODE_CFG, CMD_MODE_ALL_LP);
-	dsi_write(dsi, DSI_MODE_CFG, ENABLE_CMD_MODE);
 }
 
 /* Get lane byte clock cycles. */
-static u32 dw_mipi_dsi_get_hcomponent_lbcc(struct dw_mipi_dsi *dsi,
+static int dw_mipi_dsi_get_hcomponent_lbcc(struct dw_mipi_dsi *dsi,
 					   u32 hcomponent)
 {
-	u32 frac, lbcc;
+	u32 lbcc;
 
 	lbcc = hcomponent * dsi->lane_mbps * MSEC_PER_SEC / 8;
 
-	frac = lbcc % dsi->mode->clock;
-	lbcc = lbcc / dsi->mode->clock;
-	if (frac)
-		lbcc++;
+	if (dsi->mode->clock == 0) {
+		printf("dsi mode clock is 0!\n");
+		return 0;
+	}
 
-	return lbcc;
+	return DIV_ROUND_CLOSEST(lbcc, dsi->mode->clock);
 }
 
 static void dw_mipi_dsi_line_timer_config(struct dw_mipi_dsi *dsi)
 {
-	u32 htotal, hsa, hbp, lbcc;
+	int htotal, hsa, hbp, lbcc;
 	struct drm_display_mode *mode = dsi->mode;
 
 	htotal = mode->htotal;
@@ -786,10 +900,19 @@ static void dw_mipi_dsi_clear_err(struct dw_mipi_dsi *dsi)
 	dsi_write(dsi, DSI_INT_MSK1, 0);
 }
 
+const struct dw_mipi_dsi_plat_data rk312x_mipi_dsi_drv_data = {
+	.max_data_lanes = 4,
+	.max_bit_rate_per_lane = 1000000000,
+	.vsync_quirk = true,
+};
+
 const struct dw_mipi_dsi_plat_data rk3288_mipi_dsi_drv_data = {
 	.dsi0_en_bit = RK3288_DSI0_SEL_VOP_LIT,
 	.dsi1_en_bit = RK3288_DSI1_SEL_VOP_LIT,
 	.grf_switch_reg = RK3288_GRF_SOC_CON6,
+	.dsi1_basedir = RK3288_TXRX_BASEDIR,
+	.dsi1_masterslavez = RK3288_TXRX_MASTERSLAVEZ,
+	.grf_dsi1_cfg_reg = RK3288_GRF_SOC_CON14,
 	.max_data_lanes = 4,
 	.max_bit_rate_per_lane = 1500000000,
 	.has_vop_sel = true,
@@ -812,8 +935,14 @@ const struct dw_mipi_dsi_plat_data rk3399_mipi_dsi_drv_data = {
 	.dsi0_en_bit = RK3399_DSI0_SEL_VOP_LIT,
 	.dsi1_en_bit = RK3399_DSI1_SEL_VOP_LIT,
 	.grf_switch_reg = RK3399_GRF_SOC_CON19,
-	.grf_dsi0_mode = RK3399_GRF_DSI_MODE,
+	.grf_dsi0_mode = RK3399_GRF_DSI0_MODE,
 	.grf_dsi0_mode_reg = RK3399_GRF_SOC_CON22,
+	.grf_dsi1_mode = RK3399_GRF_DSI1_MODE1,
+	.grf_dsi1_mode_reg1 = RK3399_GRF_SOC_CON23,
+	.dsi1_basedir = RK3399_TXRX_BASEDIR,
+	.dsi1_masterslavez = RK3399_TXRX_MASTERSLAVEZ,
+	.dsi1_enableclk = RK3399_TXRX_ENABLECLK,
+	.grf_dsi1_mode_reg2 = RK3399_GRF_SOC_CON24,
 	.max_data_lanes = 4,
 	.max_bit_rate_per_lane = 1500000000,
 	.has_vop_sel = true,
@@ -824,6 +953,52 @@ static int dw_mipi_dsi_clk_enable(struct dw_mipi_dsi *dsi)
 	return 0;
 }
 
+static int rockchip_dsi_dual_channel_probe(struct dw_mipi_dsi *master)
+{
+	int node0, node1;
+	struct dw_mipi_dsi *slave = NULL;
+
+	node0 = fdt_getprop_u32_default_node(master->blob, master->node, 0,
+					       "rockchip,dual-channel", -1);
+	if (node0 < 0)
+		return 0;
+
+	node1 = fdt_node_offset_by_phandle(master->blob, node0);
+	if (node1 < 0) {
+		printf("failed to find dsi slave node\n");
+		return -ENODEV;
+	}
+
+	if (!fdt_device_is_available(master->blob, node1)) {
+		printf("dsi slave node is not available\n");
+		return -ENODEV;
+	}
+
+	slave = malloc(sizeof(*slave));
+	if (!slave)
+		return -ENOMEM;
+
+	memset(slave, 0, sizeof(*slave));
+
+	master->lanes /= 2;
+	master->slave = slave;
+	slave->master = master;
+
+	slave->blob = master->blob;
+	slave->node = node1;
+	slave->base = (void *)fdtdec_get_addr_size_auto_noparent(slave->blob,
+								 node1, "reg",
+								 0, NULL, false);
+	slave->pdata = master->pdata;
+	slave->dphy.phy = master->dphy.phy;
+	slave->lanes = master->lanes;
+	slave->format = master->format;
+	slave->mode_flags = master->mode_flags;
+	slave->channel = master->channel;
+
+	return 0;
+}
+
 static int rockchip_dw_mipi_dsi_init(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
@@ -832,16 +1007,27 @@ static int rockchip_dw_mipi_dsi_init(struct display_state *state)
 	int mipi_node = conn_state->node;
 	struct dw_mipi_dsi *dsi;
 	int panel;
+	int ret;
 
 	dsi = malloc(sizeof(*dsi));
 	if (!dsi)
 		return -ENOMEM;
+	memset(dsi, 0, sizeof(*dsi));
 
 	dsi->base = (void *)fdtdec_get_addr_size_auto_noparent(state->blob,
 						mipi_node, "reg", 0, NULL, false);
+
+	dsi->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	if (dsi->grf <= 0) {
+		printf("%s: Get syscon grf failed (ret=%p)\n",
+			__func__, dsi->grf);
+		return -ENXIO;
+	}
+
 	dsi->pdata = pdata;
+	dsi->blob = state->blob;
+	dsi->node = mipi_node;
 	conn_state->private = dsi;
-	conn_state->type = DRM_MODE_CONNECTOR_DSI;
 	conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
 
 	panel = fdt_subnode_offset(state->blob, mipi_node, "panel");
@@ -862,12 +1048,13 @@ static int rockchip_dw_mipi_dsi_init(struct display_state *state)
 	FDT_GET_INT(dsi->mode_flags, "dsi,mode_flags");
 	FDT_GET_INT(dsi->channel, "reg");
 
-	dsi->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	if (dsi->grf <= 0) {
-		printf("%s: Get syscon grf failed (ret=%p)\n",
-		      __func__, dsi->grf);
-		return  -ENXIO;
-	}
+	ret = rockchip_dsi_dual_channel_probe(dsi);
+	if (ret)
+		return ret;
+
+	conn_state->type = DRM_MODE_CONNECTOR_DSI;
+	if (dsi->slave)
+		conn_state->output_type = ROCKCHIP_OUTPUT_DSI_DUAL_CHANNEL;
 
 	return 0;
 }
@@ -877,79 +1064,150 @@ static void rockchip_dw_mipi_dsi_deinit(struct display_state *state)
 	struct connector_state *conn_state = &state->conn_state;
 	struct dw_mipi_dsi *dsi = conn_state->private;
 
+	if (dsi->slave)
+		free(dsi->slave);
 	free(dsi);
 }
 
-static int rockchip_dw_mipi_dsi_prepare(struct display_state *state)
+static void rockchip_dw_dsi_pre_init(struct display_state *state,
+				     struct dw_mipi_dsi *dsi)
 {
 	struct connector_state *conn_state = &state->conn_state;
-	struct dw_mipi_dsi *dsi = conn_state->private;
 	unsigned long bw, rate;
 
 	dsi->mode = &conn_state->mode;
 
 	dw_mipi_dsi_clk_enable(dsi);
 
-	rockchip_phy_power_on(state);
 
-	bw = dw_mipi_dsi_calc_link_bandwidth(dsi);
-
-	if (conn_state->phy)
-		rate = rockchip_phy_set_pll(state, bw);
-	else
-		rate = dw_mipi_dsi_set_pll(dsi, bw);
-
-	dsi->lane_mbps = rate / USEC_PER_SEC;
+	if (conn_state->phy) {
+		bw = rockchip_dsi_calc_bandwidth(dsi);
+		rate = rockchip_phy_set_pll(state, bw * USEC_PER_SEC);
+		dsi->lane_mbps = rate / USEC_PER_SEC;
+		rockchip_phy_power_on(state);
+	} else {
+		dw_mipi_dsi_get_lane_bps(dsi);
+	}
 
 	printf("final DSI-Link bandwidth: %u Mbps x %d\n",
 	       dsi->lane_mbps, dsi->lanes);
 
+	if (dsi->slave)
+		rockchip_dw_dsi_pre_init(state, dsi->slave);
+}
+
+static void rockchip_dw_dsi_host_init(struct dw_mipi_dsi *dsi)
+{
 	dw_mipi_dsi_init(dsi);
 	dw_mipi_dsi_dpi_config(dsi, dsi->mode);
 	dw_mipi_dsi_packet_handler_config(dsi);
 	dw_mipi_dsi_video_mode_config(dsi);
 	dw_mipi_dsi_video_packet_config(dsi, dsi->mode);
 	dw_mipi_dsi_command_mode_config(dsi);
+	dw_mipi_dsi_set_mode(dsi, DSI_COMMAND_MODE);
 	dw_mipi_dsi_line_timer_config(dsi);
 	dw_mipi_dsi_vertical_timing_config(dsi);
 	dw_mipi_dsi_dphy_timing_config(dsi);
 	dw_mipi_dsi_dphy_interface_config(dsi);
 	dw_mipi_dsi_clear_err(dsi);
+}
+
+static int
+rockchip_dsi_grf_config(const struct dw_mipi_dsi_plat_data *pdata,
+			struct dw_mipi_dsi *dsi, int vop_id)
+{
+	int val;
+
+	if (pdata->grf_dsi0_mode_reg)
+		writel(pdata->grf_dsi0_mode,
+		       dsi->grf + pdata->grf_dsi0_mode_reg);
+
+	if (dsi->slave) {
+		if (vop_id)
+			val = pdata->dsi0_en_bit |
+			      (pdata->dsi0_en_bit << 16) |
+			      pdata->dsi1_en_bit |
+			      (pdata->dsi1_en_bit << 16);
+		else
+			val = (pdata->dsi0_en_bit << 16) |
+			      (pdata->dsi1_en_bit << 16);
+
+		if (pdata->grf_switch_reg)
+			writel(val, dsi->grf + pdata->grf_switch_reg);
+
+		val = pdata->dsi1_masterslavez |
+		      (pdata->dsi1_masterslavez << 16) |
+		      (pdata->dsi1_basedir << 16);
+		if (pdata->grf_dsi1_cfg_reg)
+			writel(val, dsi->grf + pdata->grf_dsi1_cfg_reg);
+
+		if (pdata->grf_dsi0_mode_reg)
+			writel(pdata->grf_dsi0_mode,
+			       dsi->grf + pdata->grf_dsi0_mode_reg);
+		if (pdata->grf_dsi1_mode_reg1)
+			writel(pdata->grf_dsi1_mode,
+			       dsi->grf + pdata->grf_dsi1_mode_reg1);
+		if (pdata->grf_dsi1_mode_reg2)
+			writel(RK3399_GRF_DSI1_MODE2,
+			       dsi->grf + pdata->grf_dsi1_mode_reg2);
+		if (pdata->grf_dsi1_mode_reg1)
+			writel(RK3399_GRF_DSI1_ENABLE,
+			       dsi->grf + pdata->grf_dsi1_mode_reg1);
+	} else {
+		if (pdata->grf_switch_reg) {
+			if (vop_id)
+				val = pdata->dsi0_en_bit |
+				      (pdata->dsi0_en_bit << 16);
+			else
+				val = pdata->dsi0_en_bit << 16;
+
+			writel(val, dsi->grf + pdata->grf_switch_reg);
+		}
+	}
+	debug("vop %s output to dsi0\n", (vop_id) ? "LIT" : "BIG");
 
 	return 0;
 }
 
-static int rockchip_dw_mipi_dsi_enable(struct display_state *state)
+static void rockchip_dw_dsi_controller_init(struct dw_mipi_dsi *dsi)
+{
+	rockchip_dw_dsi_host_init(dsi);
+
+	mdelay(10);
+	dw_mipi_dsi_phy_init(dsi);
+
+	if (dsi->slave)
+		rockchip_dw_dsi_controller_init(dsi->slave);
+}
+
+static int rockchip_dw_mipi_dsi_prepare(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
 	struct crtc_state *crtc_state = &state->crtc_state;
 	const struct rockchip_connector *connector = conn_state->connector;
 	const struct dw_mipi_dsi_plat_data *pdata = connector->data;
 	struct dw_mipi_dsi *dsi = conn_state->private;
-	u32 val;
 
-	if (pdata->grf_dsi0_mode_reg)
-		writel(pdata->grf_dsi0_mode,
-		       dsi->grf + pdata->grf_dsi0_mode_reg);
+	rockchip_dsi_grf_config(pdata, dsi, crtc_state->crtc_id);
 
-	if (!conn_state->phy)
-		dw_mipi_dsi_phy_init(dsi);
-	dw_mipi_dsi_wait_for_two_frames(dsi);
+	rockchip_dw_dsi_pre_init(state, dsi);
 
-	dw_mipi_dsi_set_mode(dsi, DW_MIPI_DSI_VID_MODE);
+	rockchip_dw_dsi_controller_init(dsi);
 
 	if (!pdata->has_vop_sel)
 		return 0;
 
-	if (pdata->grf_switch_reg) {
-		if (crtc_state->crtc_id)
-			val = pdata->dsi0_en_bit | (pdata->dsi0_en_bit << 16);
-		else
-			val = pdata->dsi0_en_bit << 16;
+	return 0;
+}
 
-		writel(val, dsi->grf + pdata->grf_switch_reg);
-	}
-	debug("vop %s output to dsi0\n", (crtc_state->crtc_id) ? "LIT" : "BIG");
+static int rockchip_dw_mipi_dsi_enable(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct dw_mipi_dsi *dsi = conn_state->private;
+
+	dw_mipi_dsi_set_mode(dsi, DSI_VIDEO_MODE);
+	if (dsi->slave)
+		dw_mipi_dsi_set_mode(dsi->slave, DSI_VIDEO_MODE);
 
 	return 0;
 }
@@ -959,16 +1217,12 @@ static int rockchip_dw_mipi_dsi_disable(struct display_state *state)
 	struct connector_state *conn_state = &state->conn_state;
 	struct dw_mipi_dsi *dsi = conn_state->private;
 
-	dw_mipi_dsi_set_mode(dsi, DW_MIPI_DSI_CMD_MODE);
-	dw_mipi_dsi_set_mode(dsi, DW_MIPI_DSI_VID_MODE);
-
 	/*
 	 * This is necessary to make sure the peripheral will be driven
 	 * normally when the display is enabled again later.
 	 */
 	mdelay(120);
 
-	dw_mipi_dsi_set_mode(dsi, DW_MIPI_DSI_CMD_MODE);
 	dw_mipi_dsi_disable(dsi);
 	return 0;
 }
@@ -1002,6 +1256,11 @@ const struct rockchip_connector rk3399_mipi_dsi_data = {
 	 .data = &rk3399_mipi_dsi_drv_data,
 };
 
+static const struct rockchip_connector rk312x_mipi_dsi_data = {
+	 .funcs = &rockchip_dw_mipi_dsi_funcs,
+	 .data = &rk312x_mipi_dsi_drv_data,
+};
+
 static const struct udevice_id rockchip_mipi_dsi_ids[] = {
 	{
 	 .compatible = "rockchip,rk3288-mipi-dsi",
@@ -1015,7 +1274,11 @@ static const struct udevice_id rockchip_mipi_dsi_ids[] = {
 	},{
 	 .compatible = "rockchip,rk3399-mipi-dsi",
 	 .data = (ulong)&rk3399_mipi_dsi_data,
-	}, {}
+	},{
+	 .compatible = "rockchip,rk312x-mipi-dsi",
+	 .data = (ulong)&rk312x_mipi_dsi_data,
+	},
+	{}
 };
 
 U_BOOT_DRIVER(rockchip_mipi_dsi) = {

commit 2ff77a3ca1d35de3092a57ebe9d5154b23230bcd
Author: Jerry Xu <xbl@rock-chips.com>
Date:   Tue Nov 28 20:47:47 2017 +0800

    rockchip: configs: bnd-d708: support mipi dsi
    
    Change-Id: Iee84fb31c0cd6a8d9a680cdf7c2e7fcf7dd13781
    Signed-off-by: Jerry Xu <xbl@rock-chips.com>

diff --git a/configs/bnd-d708-rk3126_defconfig b/configs/bnd-d708-rk3126_defconfig
index 8801ba6175..c86f8c4518 100644
--- a/configs/bnd-d708-rk3126_defconfig
+++ b/configs/bnd-d708-rk3126_defconfig
@@ -70,8 +70,10 @@ CONFIG_G_DNL_VENDOR_NUM=0x2207
 CONFIG_G_DNL_PRODUCT_NUM=0x310c
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
+CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_DISPLAY_ROCKCHIP_MIPI=y
 CONFIG_DRM_ROCKCHIP=y
-CONFIG_DRM_ROCKCHIP_LVDS=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_ERRNO_STR=y

commit de2eadf240155c3d7c89c7fe7d0088f1a12d1293
Author: Jerry Xu <xbl@rock-chips.com>
Date:   Tue Nov 28 20:33:43 2017 +0800

    rockchip: include: add some define for mipi dsi
    
    Change-Id: Ia125dff2293d4b41a26265ad46236f0429633753
    Signed-off-by: Jerry Xu <xbl@rock-chips.com>

diff --git a/include/dt-bindings/media/rockchip_mipi_dsi.h b/include/dt-bindings/media/rockchip_mipi_dsi.h
index 469d8c4358..78b915a946 100644
--- a/include/dt-bindings/media/rockchip_mipi_dsi.h
+++ b/include/dt-bindings/media/rockchip_mipi_dsi.h
@@ -7,6 +7,8 @@
 #ifndef __ROCKCHIP_MIPI_DSI_H__
 #define __ROCKCHIP_MIPI_DSI_H__
 
+#define BIT(nr)			(1UL << (nr))
+
 /* request ACK from peripheral */
 #define MIPI_DSI_MSG_REQ_ACK	BIT(0)
 /* use Low Power Mode to transmit message */
@@ -39,10 +41,15 @@
 /* transmit data in low power */
 #define MIPI_DSI_MODE_LPM		BIT(11)
 
-#define MIPI_DSI_DCS_POWER_MODE_DISPLAY (1 << 2)
-#define MIPI_DSI_DCS_POWER_MODE_NORMAL  (1 << 3)
-#define MIPI_DSI_DCS_POWER_MODE_SLEEP   (1 << 4)
-#define MIPI_DSI_DCS_POWER_MODE_PARTIAL (1 << 5)
-#define MIPI_DSI_DCS_POWER_MODE_IDLE    (1 << 6)
+#define MIPI_DSI_DCS_POWER_MODE_DISPLAY	BIT(2)
+#define MIPI_DSI_DCS_POWER_MODE_NORMAL	BIT(3)
+#define MIPI_DSI_DCS_POWER_MODE_SLEEP	BIT(4)
+#define MIPI_DSI_DCS_POWER_MODE_PARTIAL	BIT(5)
+#define MIPI_DSI_DCS_POWER_MODE_IDLE	BIT(6)
+
+#define MIPI_DSI_FMT_RGB888		0
+#define MIPI_DSI_FMT_RGB666		1
+#define MIPI_DSI_FMT_RGB666_PACKED	2
+#define MIPI_DSI_FMT_RGB565		3
 
 #endif /* __ROCKCHIP_MIPI_DSI__ */

commit 9ea7f399ea2a6ca5fc55c2b427c0f4fe9b17a814
Author: Zhaoyifeng <zyf@rock-chips.com>
Date:   Wed Nov 29 11:41:40 2017 +0800

    drivers: rknand: add part type detect
    
    bug: part type unknown issue
    => rknand part 0
    
    Change-Id: Ibb84249d4110fcadfbdb3f2c3a9ce2da2b520b2f
    Signed-off-by: Zhaoyifeng <zyf@rock-chips.com>

diff --git a/drivers/rknand/rknand.c b/drivers/rknand/rknand.c
index 06d31cef72..44fa20e1f5 100644
--- a/drivers/rknand/rknand.c
+++ b/drivers/rknand/rknand.c
@@ -146,7 +146,7 @@ static int rknand_blk_probe(struct udevice *udev)
 	sprintf(desc->vendor, "0x%.4x", 0x2207);
 	memcpy(desc->product, "rknand", sizeof("rknand"));
 	memcpy(desc->revision, "V1.00", sizeof("V1.00"));
-	/* part_init(desc); */
+	part_init(desc);
 	return 0;
 }
 

commit 692e3bb125b01104e9a6df687b34c20b03c3b988
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Nov 28 17:29:30 2017 +0800

    rockchip: clk: don't reture error when not found reset driver
    
    It's OK to continue work without reset driver.
    
    Change-Id: I7addc19cd0a6fbbc3ebd07c1686067e5e8f4225f
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3128.c.bak b/drivers/clk/rockchip/clk_rk3128.c.bak
new file mode 100644
index 0000000000..cd6ebe96f2
--- /dev/null
+++ b/drivers/clk/rockchip/clk_rk3128.c.bak
@@ -0,0 +1,602 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#include <common.h>
+#include <clk-uclass.h>
+#include <dm.h>
+#include <errno.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk3128.h>
+#include <asm/arch/hardware.h>
+#include <bitfield.h>
+#include <dm/lists.h>
+#include <dt-bindings/clock/rk3128-cru.h>
+#include <linux/log2.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+enum {
+	VCO_MAX_HZ	= 2400U * 1000000,
+	VCO_MIN_HZ	= 600 * 1000000,
+	OUTPUT_MAX_HZ	= 2400U * 1000000,
+	OUTPUT_MIN_HZ	= 24 * 1000000,
+};
+
+#define DIV_TO_RATE(input_rate, div)	((input_rate) / ((div) + 1))
+
+#define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\
+	.refdiv = _refdiv,\
+	.fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ),\
+	.postdiv1 = _postdiv1, .postdiv2 = _postdiv2};
+
+/* use integer mode*/
+static const struct pll_div apll_init_cfg = PLL_DIVISORS(APLL_HZ, 1, 3, 1);
+static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 2, 1);
+
+static int rkclk_set_pll(struct rk3128_cru *cru, enum rk_clk_id clk_id,
+			 const struct pll_div *div)
+{
+	int pll_id = rk_pll_id(clk_id);
+	struct rk3128_pll *pll = &cru->pll[pll_id];
+
+	/* All PLLs have same VCO and output frequency range restrictions. */
+	uint vco_hz = OSC_HZ / 1000 * div->fbdiv / div->refdiv * 1000;
+	uint output_hz = vco_hz / div->postdiv1 / div->postdiv2;
+
+	debug("PLL at %p:fd=%d,rd=%d,pd1=%d,pd2=%d,vco=%uHz,output=%uHz\n",
+	      pll, div->fbdiv, div->refdiv, div->postdiv1,
+	      div->postdiv2, vco_hz, output_hz);
+	assert(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ &&
+	       output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ);
+
+	/* use integer mode */
+	rk_setreg(&pll->con1, 1 << PLL_DSMPD_SHIFT);
+	/* Power down */
+	rk_setreg(&pll->con1, 1 << PLL_PD_SHIFT);
+
+	rk_clrsetreg(&pll->con0,
+		     PLL_POSTDIV1_MASK | PLL_FBDIV_MASK,
+		     (div->postdiv1 << PLL_POSTDIV1_SHIFT) | div->fbdiv);
+	rk_clrsetreg(&pll->con1, PLL_POSTDIV2_MASK | PLL_REFDIV_MASK,
+		     (div->postdiv2 << PLL_POSTDIV2_SHIFT |
+		     div->refdiv << PLL_REFDIV_SHIFT));
+
+	/* Power Up */
+	rk_clrreg(&pll->con1, 1 << PLL_PD_SHIFT);
+
+	/* waiting for pll lock */
+	while (readl(&pll->con1) & (1 << PLL_LOCK_STATUS_SHIFT))
+		udelay(1);
+
+	return 0;
+}
+
+static int pll_para_config(u32 freq_hz, struct pll_div *div)
+{
+	u32 ref_khz = OSC_HZ / 1000, refdiv, fbdiv = 0;
+	u32 postdiv1, postdiv2 = 1;
+	u32 fref_khz;
+	u32 diff_khz, best_diff_khz;
+	const u32 max_refdiv = 63, max_fbdiv = 3200, min_fbdiv = 16;
+	const u32 max_postdiv1 = 7, max_postdiv2 = 7;
+	u32 vco_khz;
+	u32 freq_khz = freq_hz / 1000;
+
+	if (!freq_hz) {
+		printf("%s: the frequency can't be 0 Hz\n", __func__);
+		return -1;
+	}
+
+	postdiv1 = DIV_ROUND_UP(VCO_MIN_HZ / 1000, freq_khz);
+	if (postdiv1 > max_postdiv1) {
+		postdiv2 = DIV_ROUND_UP(postdiv1, max_postdiv1);
+		postdiv1 = DIV_ROUND_UP(postdiv1, postdiv2);
+	}
+
+	vco_khz = freq_khz * postdiv1 * postdiv2;
+
+	if (vco_khz < (VCO_MIN_HZ / 1000) || vco_khz > (VCO_MAX_HZ / 1000) ||
+	    postdiv2 > max_postdiv2) {
+		printf("%s: Cannot find out a supported VCO for Freq (%uHz)\n",
+		       __func__, freq_hz);
+		return -1;
+	}
+
+	div->postdiv1 = postdiv1;
+	div->postdiv2 = postdiv2;
+
+	best_diff_khz = vco_khz;
+	for (refdiv = 1; refdiv < max_refdiv && best_diff_khz; refdiv++) {
+		fref_khz = ref_khz / refdiv;
+
+		fbdiv = vco_khz / fref_khz;
+		if ((fbdiv >= max_fbdiv) || (fbdiv <= min_fbdiv))
+			continue;
+		diff_khz = vco_khz - fbdiv * fref_khz;
+		if (fbdiv + 1 < max_fbdiv && diff_khz > fref_khz / 2) {
+			fbdiv++;
+			diff_khz = fref_khz - diff_khz;
+		}
+
+		if (diff_khz >= best_diff_khz)
+			continue;
+
+		best_diff_khz = diff_khz;
+		div->refdiv = refdiv;
+		div->fbdiv = fbdiv;
+	}
+
+	if (best_diff_khz > 4 * (1000)) {
+		printf("%s: Failed to match output frequency %u bestis %u Hz\n",
+		       __func__, freq_hz,
+		       best_diff_khz * 1000);
+		return -1;
+	}
+	return 0;
+}
+
+static void rkclk_init(struct rk3128_cru *cru)
+{
+	u32 aclk_div;
+	u32 hclk_div;
+	u32 pclk_div;
+
+	/* pll enter slow-mode */
+	rk_clrsetreg(&cru->cru_mode_con,
+		     GPLL_MODE_MASK | APLL_MODE_MASK,
+		     GPLL_MODE_SLOW << GPLL_MODE_SHIFT |
+		     APLL_MODE_SLOW << APLL_MODE_SHIFT);
+
+	/* init pll */
+	rkclk_set_pll(cru, CLK_ARM, &apll_init_cfg);
+	rkclk_set_pll(cru, CLK_GENERAL, &gpll_init_cfg);
+
+	/*
+	 * select apll as cpu/core clock pll source and
+	 * set up dependent divisors for PERI and ACLK clocks.
+	 * core hz : apll = 1:1
+	 */
+	aclk_div = APLL_HZ / CORE_ACLK_HZ - 1;
+	assert((aclk_div + 1) * CORE_ACLK_HZ == APLL_HZ && aclk_div < 0x7);
+
+	pclk_div = APLL_HZ / CORE_PERI_HZ - 1;
+	assert((pclk_div + 1) * CORE_PERI_HZ == APLL_HZ && pclk_div < 0xf);
+
+	rk_clrsetreg(&cru->cru_clksel_con[0],
+		     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK,
+		     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
+		     0 << CORE_DIV_CON_SHIFT);
+
+	rk_clrsetreg(&cru->cru_clksel_con[1],
+		     CORE_ACLK_DIV_MASK | CORE_PERI_DIV_MASK,
+		     aclk_div << CORE_ACLK_DIV_SHIFT |
+		     pclk_div << CORE_PERI_DIV_SHIFT);
+
+	/*
+	 * select gpll as pd_bus bus clock source and
+	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
+	 */
+	aclk_div = GPLL_HZ / BUS_ACLK_HZ - 1;
+	assert((aclk_div + 1) * BUS_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
+
+	pclk_div = BUS_ACLK_HZ / BUS_PCLK_HZ - 1;
+	assert((pclk_div + 1) * BUS_PCLK_HZ == BUS_ACLK_HZ && pclk_div <= 0x7);
+
+	hclk_div = BUS_ACLK_HZ / BUS_HCLK_HZ - 1;
+	assert((hclk_div + 1) * BUS_HCLK_HZ == BUS_ACLK_HZ && hclk_div <= 0x3);
+
+	rk_clrsetreg(&cru->cru_clksel_con[0],
+		     BUS_ACLK_PLL_SEL_MASK | BUS_ACLK_DIV_MASK,
+		     BUS_ACLK_PLL_SEL_GPLL << BUS_ACLK_PLL_SEL_SHIFT |
+		     aclk_div << BUS_ACLK_DIV_SHIFT);
+
+	rk_clrsetreg(&cru->cru_clksel_con[1],
+		     BUS_PCLK_DIV_MASK | BUS_HCLK_DIV_MASK,
+		     pclk_div << BUS_PCLK_DIV_SHIFT |
+		     hclk_div << BUS_HCLK_DIV_SHIFT);
+
+	/*
+	 * select gpll as pd_peri bus clock source and
+	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
+	 */
+	aclk_div = GPLL_HZ / PERI_ACLK_HZ - 1;
+	assert((aclk_div + 1) * PERI_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f);
+
+	hclk_div = ilog2(PERI_ACLK_HZ / PERI_HCLK_HZ);
+	assert((1 << hclk_div) * PERI_HCLK_HZ ==
+		PERI_ACLK_HZ && (hclk_div < 0x4));
+
+	pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ);
+	assert((1 << pclk_div) * PERI_PCLK_HZ ==
+		PERI_ACLK_HZ && pclk_div < 0x8);
+
+	rk_clrsetreg(&cru->cru_clksel_con[10],
+		     PERI_PLL_SEL_MASK | PERI_PCLK_DIV_MASK |
+		     PERI_HCLK_DIV_MASK | PERI_ACLK_DIV_MASK,
+		     PERI_PLL_GPLL << PERI_PLL_SEL_SHIFT |
+		     pclk_div << PERI_PCLK_DIV_SHIFT |
+		     hclk_div << PERI_HCLK_DIV_SHIFT |
+		     aclk_div << PERI_ACLK_DIV_SHIFT);
+
+	/* PLL enter normal-mode */
+	rk_clrsetreg(&cru->cru_mode_con,
+		     GPLL_MODE_MASK | APLL_MODE_MASK | CPLL_MODE_MASK,
+		     GPLL_MODE_NORM << GPLL_MODE_SHIFT |
+		     APLL_MODE_NORM << APLL_MODE_SHIFT |
+		     CPLL_MODE_NORM << CPLL_MODE_SHIFT);
+
+	/*fix NAND controller  working clock max to 150Mhz */
+	rk_clrsetreg(&cru->cru_clksel_con[2],
+		     NANDC_PLL_SEL_MASK | NANDC_CLK_DIV_MASK,
+		     NANDC_PLL_SEL_GPLL << NANDC_PLL_SEL_SHIFT |
+		     3 << NANDC_CLK_DIV_SHIFT);
+}
+
+/* Get pll rate by id */
+static u32 rkclk_pll_get_rate(struct rk3128_cru *cru,
+			      enum rk_clk_id clk_id)
+{
+	u32 refdiv, fbdiv, postdiv1, postdiv2;
+	u32 con;
+	int pll_id = rk_pll_id(clk_id);
+	struct rk3128_pll *pll = &cru->pll[pll_id];
+	static u8 clk_shift[CLK_COUNT] = {
+		0xff, APLL_MODE_SHIFT, DPLL_MODE_SHIFT, CPLL_MODE_SHIFT,
+		GPLL_MODE_SHIFT, 0xff
+	};
+	static u32 clk_mask[CLK_COUNT] = {
+		0xff, APLL_MODE_MASK, DPLL_MODE_MASK, CPLL_MODE_MASK,
+		GPLL_MODE_MASK, 0xff
+	};
+	uint shift;
+	uint mask;
+
+	con = readl(&cru->cru_mode_con);
+	shift = clk_shift[clk_id];
+	mask = clk_mask[clk_id];
+
+	switch ((con & mask) >> shift) {
+	case GPLL_MODE_SLOW:
+		return OSC_HZ;
+	case GPLL_MODE_NORM:
+		/* normal mode */
+		con = readl(&pll->con0);
+		postdiv1 = (con & PLL_POSTDIV1_MASK) >> PLL_POSTDIV1_SHIFT;
+		fbdiv = (con & PLL_FBDIV_MASK) >> PLL_FBDIV_SHIFT;
+		con = readl(&pll->con1);
+		postdiv2 = (con & PLL_POSTDIV2_MASK) >> PLL_POSTDIV2_SHIFT;
+		refdiv = (con & PLL_REFDIV_MASK) >> PLL_REFDIV_SHIFT;
+		return (24 * fbdiv / (refdiv * postdiv1 * postdiv2)) * 1000000;
+	case GPLL_MODE_DEEP:
+	default:
+		return 32768;
+	}
+}
+
+static ulong rockchip_mmc_get_clk(struct rk3128_cru *cru, uint clk_general_rate,
+				  int periph)
+{
+	uint src_rate;
+	uint div, mux;
+	u32 con;
+
+	switch (periph) {
+	case HCLK_EMMC:
+	case SCLK_EMMC:
+	case SCLK_EMMC_SAMPLE:
+		con = readl(&cru->cru_clksel_con[12]);
+		mux = (con & EMMC_PLL_MASK) >> EMMC_PLL_SHIFT;
+		div = (con & EMMC_DIV_MASK) >> EMMC_DIV_SHIFT;
+		break;
+	case HCLK_SDMMC:
+	case SCLK_SDMMC:
+		con = readl(&cru->cru_clksel_con[11]);
+		mux = (con & MMC0_PLL_MASK) >> MMC0_PLL_SHIFT;
+		div = (con & MMC0_DIV_MASK) >> MMC0_DIV_SHIFT;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	src_rate = mux == EMMC_SEL_24M ? OSC_HZ : clk_general_rate;
+	return DIV_TO_RATE(src_rate, div);
+}
+
+static ulong rockchip_mmc_set_clk(struct rk3128_cru *cru, uint clk_general_rate,
+				  int periph, uint freq)
+{
+	int src_clk_div;
+	int mux;
+
+	debug("%s: clk_general_rate=%u\n", __func__, clk_general_rate);
+
+	/* mmc clock defaulg div 2 internal, need provide double in cru */
+	src_clk_div = DIV_ROUND_UP(clk_general_rate / 2, freq);
+
+	if (src_clk_div > 128) {
+		src_clk_div = DIV_ROUND_UP(OSC_HZ / 2, freq);
+		mux = EMMC_SEL_24M;
+	} else {
+		mux = EMMC_SEL_GPLL;
+	}
+
+	switch (periph) {
+	case HCLK_EMMC:
+		rk_clrsetreg(&cru->cru_clksel_con[12],
+			     EMMC_PLL_MASK | EMMC_DIV_MASK,
+			     mux << EMMC_PLL_SHIFT |
+			     (src_clk_div - 1) << EMMC_DIV_SHIFT);
+		break;
+	case HCLK_SDMMC:
+	case SCLK_SDMMC:
+		rk_clrsetreg(&cru->cru_clksel_con[11],
+			     MMC0_PLL_MASK | MMC0_DIV_MASK,
+			     mux << MMC0_PLL_SHIFT |
+			     (src_clk_div - 1) << MMC0_DIV_SHIFT);
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return rockchip_mmc_get_clk(cru, clk_general_rate, periph);
+}
+
+static ulong rk3128_peri_get_pclk(struct rk3128_cru *cru, ulong clk_id)
+{
+	u32 div, con;
+
+	switch (clk_id) {
+	case PCLK_I2C0:
+	case PCLK_I2C1:
+	case PCLK_I2C2:
+	case PCLK_I2C3:
+	case PCLK_PWM:
+		con = readl(&cru->cru_clksel_con[10]);
+		div = con >> 12 & 0x3;
+		break;
+	default:
+		printf("do not support this peripheral bus\n");
+		return -EINVAL;
+	}
+
+	return DIV_TO_RATE(PERI_ACLK_HZ, div);
+}
+
+static ulong rk3128_peri_set_pclk(struct rk3128_cru *cru, ulong clk_id, uint hz)
+{
+	int src_clk_div;
+
+	src_clk_div = PERI_ACLK_HZ / hz;
+	assert(src_clk_div - 1 < 4);
+
+	switch (clk_id) {
+	case PCLK_I2C0:
+	case PCLK_I2C1:
+	case PCLK_I2C2:
+	case PCLK_I2C3:
+	case PCLK_PWM:
+		rk_setreg(&cru->cru_clksel_con[10],
+			  ((src_clk_div - 1) << 12));
+		break;
+	default:
+		printf("do not support this peripheral bus\n");
+		return -EINVAL;
+	}
+
+	return DIV_TO_RATE(PERI_ACLK_HZ, src_clk_div);
+}
+
+static ulong rk3128_saradc_get_clk(struct rk3128_cru *cru)
+{
+	u32 div, val;
+
+	val = readl(&cru->cru_clksel_con[24]);
+	div = bitfield_extract(val, SARADC_DIV_CON_SHIFT,
+			       SARADC_DIV_CON_WIDTH);
+
+	return DIV_TO_RATE(OSC_HZ, div);
+}
+
+static ulong rk3128_saradc_set_clk(struct rk3128_cru *cru, uint hz)
+{
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1;
+	assert(src_clk_div < 128);
+
+	rk_clrsetreg(&cru->cru_clksel_con[24],
+		     SARADC_DIV_CON_MASK,
+		     src_clk_div << SARADC_DIV_CON_SHIFT);
+
+	return rk3128_saradc_get_clk(cru);
+}
+
+static ulong rk3128_vop_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz)
+{
+	int src_clk_div;
+	struct pll_div cpll_config = {0};
+
+	src_clk_div = GPLL_HZ / hz;
+	assert(src_clk_div - 1 < 31);
+
+	switch (clk_id) {
+	case ACLK_VIO0:
+		rk_clrsetreg(&cru->cru_clksel_con[31],
+			     VIO0_PLL_MASK | VIO0_DIV_MASK,
+			     VIO0_SEL_GPLL << VIO0_PLL_SHIFT |
+			     (src_clk_div - 1) << VIO0_DIV_SHIFT);
+		break;
+	case ACLK_VIO1:
+		rk_clrsetreg(&cru->cru_clksel_con[31],
+			     VIO1_PLL_MASK | VIO1_DIV_MASK,
+			     VIO1_SEL_GPLL << VIO1_PLL_SHIFT |
+			     (src_clk_div - 1) << VIO1_DIV_SHIFT);
+		break;
+	case DCLK_LCDC:
+		if (pll_para_config(hz, &cpll_config))
+			return -1;
+		rkclk_set_pll(cru, CLK_CODEC, &cpll_config);
+
+		rk_clrsetreg(&cru->cru_clksel_con[27],
+			     DCLK_VOP_SEL_MASK | DCLK_VOP_DIV_CON_MASK,
+			     DCLK_VOP_PLL_SEL_CPLL << DCLK_VOP_SEL_SHIFT |
+			     (1 - 1) << DCLK_VOP_DIV_CON_SHIFT);
+		break;
+	default:
+		printf("do not support this vop freq\n");
+		return -EINVAL;
+	}
+
+	return hz;
+}
+
+static ulong rk3128_vop_get_rate(struct rk3128_cru *cru, ulong clk_id)
+{
+	u32 div, con, parent;
+
+	switch (clk_id) {
+	case ACLK_VIO0:
+		con = readl(&cru->cru_clksel_con[31]);
+		div = con  & 0x1f;
+		parent = GPLL_HZ;
+		break;
+	case ACLK_VIO1:
+		con = readl(&cru->cru_clksel_con[31]);
+		div = (con >> 8) & 0x1f;
+		parent = GPLL_HZ;
+		break;
+	case DCLK_LCDC:
+		con = readl(&cru->cru_clksel_con[27]);
+		div = (con >> 8) & 0xfff;
+		parent = rkclk_pll_get_rate(cru, CLK_CODEC);
+		break;
+	default:
+		return -ENOENT;
+	}
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rk3128_clk_get_rate(struct clk *clk)
+{
+	struct rk3128_clk_priv *priv = dev_get_priv(clk->dev);
+
+	switch (clk->id) {
+	case 0 ... 63:
+		return rkclk_pll_get_rate(priv->cru, clk->id);
+	case PCLK_I2C0:
+	case PCLK_I2C1:
+	case PCLK_I2C2:
+	case PCLK_I2C3:
+	case PCLK_PWM:
+		return rk3128_peri_get_pclk(priv->cru, clk->id);
+	case SCLK_SARADC:
+		return rk3128_saradc_get_clk(priv->cru);
+	case DCLK_LCDC:
+	case ACLK_VIO0:
+	case ACLK_VIO1:
+		return rk3128_vop_get_rate(priv->cru, clk->id);
+	default:
+		return -ENOENT;
+	}
+}
+
+static ulong rk3128_clk_set_rate(struct clk *clk, ulong rate)
+{
+	struct rk3128_clk_priv *priv = dev_get_priv(clk->dev);
+	ulong new_rate, gclk_rate;
+
+	gclk_rate = rkclk_pll_get_rate(priv->cru, CLK_GENERAL);
+	switch (clk->id) {
+	case 0 ... 63:
+		return 0;
+	case DCLK_LCDC:
+	case ACLK_VIO0:
+	case ACLK_VIO1:
+		new_rate = rk3128_vop_set_clk(priv->cru,
+					      clk->id, rate);
+		break;
+	case HCLK_EMMC:
+		new_rate = rockchip_mmc_set_clk(priv->cru, gclk_rate,
+						clk->id, rate);
+		break;
+	case PCLK_I2C0:
+	case PCLK_I2C1:
+	case PCLK_I2C2:
+	case PCLK_I2C3:
+	case PCLK_PWM:
+		new_rate = rk3128_peri_set_pclk(priv->cru, clk->id, rate);
+		break;
+	case SCLK_SARADC:
+		new_rate = rk3128_saradc_set_clk(priv->cru, rate);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return new_rate;
+}
+
+static struct clk_ops rk3128_clk_ops = {
+	.get_rate	= rk3128_clk_get_rate,
+	.set_rate	= rk3128_clk_set_rate,
+};
+
+static int rk3128_clk_probe(struct udevice *dev)
+{
+	struct rk3128_clk_priv *priv = dev_get_priv(dev);
+
+	priv->cru = (struct rk3128_cru *)dev_read_addr(dev);
+	rkclk_init(priv->cru);
+
+	return 0;
+}
+
+static int rk3128_clk_bind(struct udevice *dev)
+{
+	int ret;
+	struct udevice *sys_child;
+	struct sysreset_reg *priv;
+	u32 offset;
+
+	/* The reset driver does not have a device node, so bind it here */
+	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
+				 &sys_child);
+	if (ret) {
+		debug("Warning: No sysreset driver: ret=%d\n", ret);
+	} else {
+		priv = malloc(sizeof(struct sysreset_reg));
+		priv->glb_srst_fst_value = offsetof(struct rk3128_cru,
+						    cru_glb_srst_fst_value);
+		priv->glb_srst_snd_value = offsetof(struct rk3128_cru,
+						    cru_glb_srst_snd_value);
+		sys_child->priv = priv;
+	}
+
+	offset = offsetof(struct rk3128_cru, cru_softrst_con[0]);
+	ret = rockchip_reset_bind(dev, offset, 9);
+	if (ret)
+		debug("Warning: software reset driver bind faile\n");
+
+	return 0;
+}
+
+static const struct udevice_id rk3128_clk_ids[] = {
+	{ .compatible = "rockchip,rk3128-cru" },
+	{ .compatible = "rockchip,rk3126-cru" },
+	{ }
+};
+
+U_BOOT_DRIVER(rockchip_rk3128_cru) = {
+	.name		= "clk_rk3128",
+	.id		= UCLASS_CLK,
+	.of_match	= rk3128_clk_ids,
+	.priv_auto_alloc_size = sizeof(struct rk3128_clk_priv),
+	.ops		= &rk3128_clk_ops,
+	.bind		= rk3128_clk_bind,
+	.probe		= rk3128_clk_probe,
+};
diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c
index 1388b44d98..db79ffe3bd 100644
--- a/drivers/clk/rockchip/clk_rk3328.c
+++ b/drivers/clk/rockchip/clk_rk3328.c
@@ -627,7 +627,7 @@ static int rk3328_clk_bind(struct udevice *dev)
 		sf_child->priv = sf_priv;
 	}
 
-	return ret;
+	return 0;
 }
 
 static const struct udevice_id rk3328_clk_ids[] = {
diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c
index 4a37bc9556..f185215702 100644
--- a/drivers/clk/rockchip/clk_rk3368.c
+++ b/drivers/clk/rockchip/clk_rk3368.c
@@ -556,7 +556,7 @@ static int rk3368_clk_bind(struct udevice *dev)
 		sf_child->priv = sf_priv;
 	}
 
-	return ret;
+	return 0;
 }
 
 static const struct udevice_id rk3368_clk_ids[] = {

commit 2acdadc03f793d497034539c156e101b5d5e9bce
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Nov 28 09:57:39 2017 +0800

    rockchip: rk3036: sdram: correct setting for pll integer mode
    
    According to rk3036 TRM, should be set to '1' for the pll
    integer mode, while the '0' means the frac mode.
    
    Change-Id: Ibd35723d471e3091d8846c700aca128ac5ca0327
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
index f59db3dd5f..e6e8bff219 100644
--- a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
+++ b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
@@ -333,7 +333,7 @@ static void rkdclk_init(struct rk3036_sdram_priv *priv)
 		     DPLL_MODE_SLOW << DPLL_MODE_SHIFT);
 
 	/* use integer mode */
-	rk_clrreg(&pll->con1, 1 << PLL_DSMPD_SHIFT);
+	rk_setreg(&pll->con1, 1 << PLL_DSMPD_SHIFT);
 
 	rk_clrsetreg(&pll->con0,
 		     PLL_POSTDIV1_MASK | PLL_FBDIV_MASK,

commit c659cba98404451969fe579cfcf13b5c579928b6
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Nov 28 09:54:39 2017 +0800

    rockchip: rk3036: update clock driver for ddr
    
    After the MASK MACRO update, we need to update the driver at the same time.
    This is a fix to:
    37943aa rockchip: rk3036: clean mask definition for cru reg
    
    Change-Id: I23504454f5df17cff332ca5096928f1079e83bf6
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
index 51b2406dbb..f59db3dd5f 100644
--- a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
+++ b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
@@ -329,19 +329,17 @@ static void rkdclk_init(struct rk3036_sdram_priv *priv)
 	struct rk3036_pll *pll = &priv->cru->pll[1];
 
 	/* pll enter slow-mode */
-	rk_clrsetreg(&priv->cru->cru_mode_con,
-		     DPLL_MODE_MASK << DPLL_MODE_SHIFT,
+	rk_clrsetreg(&priv->cru->cru_mode_con, DPLL_MODE_MASK,
 		     DPLL_MODE_SLOW << DPLL_MODE_SHIFT);
 
 	/* use integer mode */
 	rk_clrreg(&pll->con1, 1 << PLL_DSMPD_SHIFT);
 
 	rk_clrsetreg(&pll->con0,
-		     PLL_POSTDIV1_MASK << PLL_POSTDIV1_SHIFT | PLL_FBDIV_MASK,
+		     PLL_POSTDIV1_MASK | PLL_FBDIV_MASK,
 		     (dpll_init_cfg.postdiv1 << PLL_POSTDIV1_SHIFT) |
 			dpll_init_cfg.fbdiv);
-	rk_clrsetreg(&pll->con1, PLL_POSTDIV2_MASK << PLL_POSTDIV2_SHIFT |
-			PLL_REFDIV_MASK << PLL_REFDIV_SHIFT,
+	rk_clrsetreg(&pll->con1, PLL_POSTDIV2_MASK | PLL_REFDIV_MASK,
 			(dpll_init_cfg.postdiv2 << PLL_POSTDIV2_SHIFT |
 			 dpll_init_cfg.refdiv << PLL_REFDIV_SHIFT));
 
@@ -350,8 +348,7 @@ static void rkdclk_init(struct rk3036_sdram_priv *priv)
 		rockchip_udelay(1);
 
 	/* PLL enter normal-mode */
-	rk_clrsetreg(&priv->cru->cru_mode_con,
-		     DPLL_MODE_MASK << DPLL_MODE_SHIFT,
+	rk_clrsetreg(&priv->cru->cru_mode_con, DPLL_MODE_MASK,
 		     DPLL_MODE_NORM << DPLL_MODE_SHIFT);
 }
 

commit 5ce558eee1d84a2b85f2bbc4c4547c8ea1c1dae4
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Nov 28 09:50:22 2017 +0800

    rockchip: rk3036: fix pll config for correct frequency
    
    There is a fixed div-2 between PLL and clk_ddr/clk_ddrphy,
    so we need to double to pll output and then ddr can work
    in correct frequency.
    
    Change-Id: I53141ddf7679bd6e2f414b2ce0171f8e0df65297
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
index 460dd6074e..51b2406dbb 100644
--- a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
+++ b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
@@ -37,7 +37,7 @@ struct rk3036_sdram_priv {
 /* use integer mode, 396MHz dpll setting
  * refdiv, fbdiv, postdiv1, postdiv2
  */
-const struct pll_div dpll_init_cfg = {1, 50, 3, 1};
+const struct pll_div dpll_init_cfg = {1, 66, 2, 1};
 
 /* 396Mhz ddr timing */
 const struct rk3036_ddr_timing ddr_timing = {0x18c,

commit 4aacf5882fdfd9976f22bb12fc43a39fc826bbe9
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Tue Nov 28 08:42:02 2017 +0800

    rockchip: configs: bnd-d708: enable nand support
    
    Board bnd-d708 uses nand as the system storage,
    so enable nand support here.
    
    Change-Id: Ia56e6c5e47196f45432261b6b895d8b0fdcb1de5
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/configs/bnd-d708-rk3126_defconfig b/configs/bnd-d708-rk3126_defconfig
index 18afe17745..8801ba6175 100644
--- a/configs/bnd-d708-rk3126_defconfig
+++ b/configs/bnd-d708-rk3126_defconfig
@@ -16,6 +16,7 @@ CONFIG_FASTBOOT_BUF_ADDR=0x60800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_NAND_BOOT=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
 CONFIG_CMD_MMC=y
@@ -48,6 +49,7 @@ CONFIG_CHARGE_ANIMATION=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_DM_RESET=y
+CONFIG_RKNAND=y
 CONFIG_DEBUG_UART_BASE=0x20068000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2

commit d2f223262266422489b98e8e33a686014c7a5e56
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Nov 27 16:38:06 2017 +0800

    rockchip: blk: add support for rknand and spi
    
    MMC and RKNAND are under blk framework, so they
    can be accessed via blk_dread/dwrite, and the SPI
    Nor Flash is under spi framework, which need to
    accessed by spi_flash_read/write.
    
    Change-Id: Ieaefc571846d29d5ca779c501661378e456fed95
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/blk.c b/arch/arm/mach-rockchip/blk.c
index c94148a525..f231287f17 100644
--- a/arch/arm/mach-rockchip/blk.c
+++ b/arch/arm/mach-rockchip/blk.c
@@ -5,10 +5,23 @@
  */
 
 #include <common.h>
+#include <blk.h>
+#include <dm.h>
 #include <mmc.h>
+#include <rknand.h>
+#include <spi.h>
+#include <spi_flash.h>
 #include "rockchip_blk.h"
 
-static struct mmc *mmc;
+struct blkdev {
+	int if_type;
+	int devnum;
+	ulong (*write)(struct blkdev *blkdev, lbaint_t start, lbaint_t blkcnt, const void *buffer);
+	ulong (*read)(struct blkdev *blkdev, lbaint_t start, lbaint_t blkcnt, void *buffer);
+	void *priv;
+};
+
+static struct blkdev *blkdev;
 
 struct mmc *mmcblk_dev_init(int dev)
 {
@@ -26,53 +39,146 @@ struct mmc *mmcblk_dev_init(int dev)
 	return mmcdev;
 }
 
-static int mmcblk_read(struct mmc *mmcdev, void *buffer, u32 blk, u32 cnt)
+static struct spi_flash *spi_flash_init(int dev)
 {
-	u32 n;
+	struct spi_flash *flash;
+	struct udevice *udev;
+	int ret;
+
+	ret = spi_flash_probe_bus_cs(0, 0, 0, 0, &udev);
+	if (ret) {
+		printf("Failed to initialize SPI flash(error %d)\n", ret);
+		return NULL;
+	}
+
+	flash = dev_get_uclass_priv(udev);
 
-	debug("\nMMC read: block # 0x%x, count 0x%x  to %p... ", blk, cnt, buffer);
+	return flash;
+}
 
-	n = blk_dread(mmc_get_blk_desc(mmcdev), blk, cnt, buffer);
+ulong blk_read(struct blkdev* blkdev, lbaint_t start, lbaint_t blkcnt, void *buffer)
+{
+	struct blk_desc *desc;
+	const char *if_name;
+	ulong n;
 
-	debug("%d blocks read: %s\n", n, (n == cnt) ? "OK" : "ERROR");
+	if_name = blk_get_if_type_name(blkdev->if_type);
+	desc = blk_get_dev(if_name, blkdev->devnum);
+	n = blk_dread(desc, start, blkcnt, buffer);
 
-	return (n == cnt) ? 0 : -EIO;
+	return n == blkcnt ? 0 : 1;
 }
 
+ulong blk_write(struct blkdev *blkdev, lbaint_t start, lbaint_t blkcnt, const void *buffer)
+{
+	struct blk_desc *desc;
+	const char *if_name;
+	ulong n;
 
-int blkdev_read(void *buffer, u32 blk, u32 cnt)
+	if_name = blk_get_if_type_name(blkdev->if_type);
+	desc = blk_get_dev(if_name, blkdev->devnum);
+	n = blk_dwrite(desc, start, blkcnt, buffer);
+
+	return n == blkcnt ? 0 : 1;
+}
+
+ulong sf_read(struct blkdev *blkdev, lbaint_t start, lbaint_t blkcnt, void *buffer)
 {
-	if (!mmc) {
-		mmc = mmcblk_dev_init(env_get_ulong("mmcdev", 10, 0));
-		if (!mmc)
-			return -ENODEV;
+	struct spi_flash *flash = (struct spi_flash *)blkdev->priv;
+	u32 offset = start << 9;
+	size_t len = blkcnt << 9;
+
+	return spi_flash_read(flash, offset, len, buffer);
+}
+
+ulong sf_write(struct blkdev *blkdev, lbaint_t start, lbaint_t blkcnt, const void *buffer)
+{
+	struct spi_flash *flash = (struct spi_flash *)blkdev->priv;
+	u32 offset = start << 9;
+	size_t len = blkcnt << 9;
+
+	return spi_flash_write(flash, offset, len, buffer);
+}
+
+static int get_bootdev_if_type(int dev)
+{
+	int if_type;
+
+	switch (dev) {
+	case BOOT_FROM_EMMC:
+		if_type = IF_TYPE_MMC;
+		break;
+	case BOOT_FROM_FLASH:
+		if_type = IF_TYPE_RKNAND;
+		break;
+	default:
+		if_type = dev;
+		break;
 	}
 
-	return mmcblk_read(mmc, buffer, blk, cnt);
+	return if_type;
 }
 
-static int mmcblk_write(struct mmc *mmcdev, void *buffer, u32 blk, u32 cnt)
+static struct blkdev *blkdev_init(void)
 {
-	u32 n;
+	struct blkdev *blkdev;
+	int dev;
+	int if_type;
+	void *priv;
+
+
+	dev = get_bootdev_type();
+	if_type = get_bootdev_if_type(dev);
+
+	if (if_type == IF_TYPE_MMC) {
+		priv = mmcblk_dev_init(0);
+	} else if (if_type == IF_TYPE_RKNAND) {
+		priv = (void *)rknand_scan_namespace();
+	} else if (if_type == BOOT_FROM_SPI_NOR) {
+		priv = spi_flash_init(0);
+	}
+
+	blkdev = malloc(sizeof(*blkdev));
+	if (!blkdev) {
+		printf("out of memory for blkdev\n");
+		return NULL;
+	}
 
-	debug("\nMMC write: block # 0x%x, count 0x%x  from %p... ",
-	      blk, cnt, buffer);
+	blkdev->if_type = if_type;
+	blkdev->devnum = 0;
+	blkdev ->priv = priv;
+	if ((if_type == IF_TYPE_MMC) || (if_type == IF_TYPE_RKNAND)) {
+		blkdev->read = blk_read;
+		blkdev->write = blk_write;
+	} else if (if_type == BOOT_FROM_SPI_NOR) {
+		blkdev->read = sf_read;
+		blkdev->write = sf_write;
+	}
 
-	n = blk_dwrite(mmc_get_blk_desc(mmcdev), blk, cnt, buffer);
-	debug("%d blocks write: %s\n", n, (n == cnt) ? "OK" : "ERROR");
+	return blkdev;
+}
 
-	return (n == cnt) ? 0 : -EIO;
+int blkdev_read(void *buffer, u32 blk, u32 cnt)
+{
+	if (!blkdev) {
+		blkdev = blkdev_init();
+		if (!blkdev)
+			return -ENODEV;
+	}
+
+	return blkdev->read(blkdev, blk, cnt, buffer);
 }
 
+
 int blkdev_write(void *buffer, u32 blk, u32 cnt)
 {
-	if (!mmc) {
-		mmc = mmcblk_dev_init(env_get_ulong("mmcdev", 10, 0));
-		if (!mmc)
+	if (!blkdev) {
+		blkdev = blkdev_init();
+		if (!blkdev)
 			return -ENODEV;
 	}
 
-	return mmcblk_write(mmc, buffer, blk, cnt);
+	return blkdev->write(blkdev, blk, cnt, buffer);
 }
 
 /* Gets the storage type of the current device */
@@ -99,4 +205,3 @@ int get_bootdev_type(void)
 
 	return type;
 }
-

commit a039a64ff13ce49ce6c85d0afdf585d3260b14fb
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Nov 27 11:10:51 2017 +0800

    rockchip: fix a variable typo in function get_bootdev_type
    
    Change-Id: I73d5ac6570eff0a0405f14184dbaadd29ba38a99
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/blk.c b/arch/arm/mach-rockchip/blk.c
index 0396a83d23..c94148a525 100644
--- a/arch/arm/mach-rockchip/blk.c
+++ b/arch/arm/mach-rockchip/blk.c
@@ -87,7 +87,7 @@ int get_bootdev_type(void)
 		type = BOOT_FROM_SPI_NAND;
 	#endif /* CONFIG_QSPI_BOOT */
 	#ifdef CONFIG_NAND_BOOT
-		typpe = BOOT_FROM_FLASH;
+		type = BOOT_FROM_FLASH;
 	#endif /* CONFIG_NAND_BOOT */
 	#ifdef CONFIG_NOR_BOOT
 		type = BOOT_FROM_SPI_NOR;

commit 27e702b6e5f0ea6f7c6ef1dfdfa218216c878d71
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Nov 22 15:22:23 2017 +0800

    rockchip: clk: add compatible for rk3126
    
    kernel dts may use rk3126 or rk3128, sync it to work with kernel dtb.
    
    Change-Id: Id582f403605d3be16ab53f6088f576d90ed5bd1e
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c
index 2bd67c7f83..944ccc066f 100644
--- a/drivers/clk/rockchip/clk_rk3128.c
+++ b/drivers/clk/rockchip/clk_rk3128.c
@@ -595,6 +595,7 @@ static int rk3128_clk_bind(struct udevice *dev)
 
 static const struct udevice_id rk3128_clk_ids[] = {
 	{ .compatible = "rockchip,rk3128-cru" },
+	{ .compatible = "rockchip,rk3126-cru" },
 	{ }
 };
 

commit 0bb3aadfba8a31a4e4db3b618931243b09cdec9c
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Nov 22 15:21:00 2017 +0800

    rockchip: clk: rk3128: update hclk/pclk assert
    
    Update assert compare target, we use BUS_ACLK_HZ instead of GPLL
    
    Change-Id: Ic5acf6f2045e9db45523f2468df74119eb8f23e2
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c
index 100f4688dd..2bd67c7f83 100644
--- a/drivers/clk/rockchip/clk_rk3128.c
+++ b/drivers/clk/rockchip/clk_rk3128.c
@@ -185,10 +185,10 @@ static void rkclk_init(struct rk3128_cru *cru)
 	assert((aclk_div + 1) * BUS_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
 
 	pclk_div = BUS_ACLK_HZ / BUS_PCLK_HZ - 1;
-	assert((pclk_div + 1) * BUS_PCLK_HZ == GPLL_HZ && pclk_div <= 0x7);
+	assert((pclk_div + 1) * BUS_PCLK_HZ == BUS_ACLK_HZ && pclk_div <= 0x7);
 
 	hclk_div = BUS_ACLK_HZ / BUS_HCLK_HZ - 1;
-	assert((hclk_div + 1) * BUS_HCLK_HZ == GPLL_HZ && hclk_div <= 0x3);
+	assert((hclk_div + 1) * BUS_HCLK_HZ == BUS_ACLK_HZ && hclk_div <= 0x3);
 
 	rk_clrsetreg(&cru->cru_clksel_con[0],
 		     BUS_ACLK_PLL_SEL_MASK | BUS_ACLK_DIV_MASK,

commit a25359fbffadc069a38d082ecbe82d7a495b1a92
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Nov 22 15:12:13 2017 +0800

    rockchip: rk3128: update compatible for usb
    
    Use "rockchip,rk3128-usb" for the compatible to both work with
    U-Boot and kernel dts.
    
    Change-Id: Ib6016c3961cbc2793ad49ec1be9466b1da914950
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3128-board.c b/arch/arm/mach-rockchip/rk3128-board.c
index 7fc4deefdd..c77fbde3be 100644
--- a/arch/arm/mach-rockchip/rk3128-board.c
+++ b/arch/arm/mach-rockchip/rk3128-board.c
@@ -114,7 +114,7 @@ int board_usb_init(int index, enum usb_init_type init)
 
 	/* find the usb_otg node */
 	node = fdt_node_offset_by_compatible(blob, -1,
-					"rockchip,rk3288-usb");
+					"rockchip,rk3128-usb");
 
 	while (node > 0) {
 		mode = fdt_getprop(blob, node, "dr_mode", NULL);

commit b8e90bad40711b5c6772391d5e26733dd40ce9e5
Author: Zhaoyifeng <zyf@rock-chips.com>
Date:   Fri Nov 24 14:48:15 2017 +0800

    driver: rknand: fix nand driver initialization failure
    
    The nand driver used dma to tranfer data and need flush cache.
    
    Change-Id: I8441621a6d411a45bfaccc0a0c1302da6d900741
    Signed-off-by: Zhaoyifeng <zyf@rock-chips.com>

diff --git a/drivers/rknand/rk_ftl_arm_v7.S b/drivers/rknand/rk_ftl_arm_v7.S
index dd234e0d3a..0c82460803 100644
--- a/drivers/rknand/rk_ftl_arm_v7.S
+++ b/drivers/rknand/rk_ftl_arm_v7.S
@@ -2525,150 +2525,154 @@ NandcSendDumpDataDone:
 	.thumb_func
 	.type	NandcXferStart, %function
 NandcXferStart:
-	@ args = 8, pretend = 0, frame = 32
+	@ args = 8, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	sub	sp, sp, #32
-	ldr	r4, [sp, #68]
-	ldr	r6, [sp, #64]
-	cbnz	r4, .L351
-	adds	r7, r6, #0
+	sub	sp, sp, #24
+	mov	r4, r1
+	ldr	r1, [sp, #60]
+	ldr	r8, [sp, #56]
+	cbnz	r1, .L351
+	adds	r1, r8, #0
 	it	ne
-	movne	r7, #1
+	movne	r1, #1
 	b	.L340
 .L351:
-	movs	r7, #1
+	movs	r1, #1
 .L340:
 	ldr	r5, .L354
-	mov	r8, #16
-	ldr	r4, [r5, r0, lsl #3]
+	mov	ip, #16
+	ldr	r6, [r5, r0, lsl #3]
 	add	r0, r5, r0, lsl #3
-	ldrb	ip, [r0, #4]	@ zero_extendqisi2
-	movs	r0, #0
-	ldr	r5, [r4, #12]
-	bfi	r5, r8, #8, #8
-	bfi	r5, r0, #3, #1
-	bfi	r0, r1, #1, #1
-	bfi	r5, ip, #5, #3
-	orr	r0, r0, #8
-	mov	ip, #1
-	bfi	r0, ip, #5, #2
-	lsr	r3, r3, ip
-	orr	r0, r0, #536870912
-	orr	r0, r0, #1024
-	bfi	r0, r3, #4, #1
+	movs	r5, #0
+	ldrb	r0, [r0, #4]	@ zero_extendqisi2
+	ldr	r7, [r6, #12]
+	bfi	r7, ip, #8, #8
+	bfi	r7, r5, #3, #1
+	bfi	r5, r4, #1, #1
+	bfi	r7, r0, #5, #3
+	orr	r5, r5, #8
+	movs	r0, #1
+	bfi	r5, r0, #5, #2
+	lsr	r3, r3, r0
+	orr	r5, r5, #536870912
+	orr	r5, r5, #1024
+	bfi	r5, r3, #4, #1
 	ldr	r3, .L354+4
 	ldr	r3, [r3, #0]
 	cmp	r3, #3
 	bls	.L341
-	ldr	r3, [r4, #16]
-	str	r3, [sp, #28]
-	ldr	r3, [sp, #28]
+	ldr	r3, [r6, #16]
+	str	r3, [sp, #20]
+	ldr	r3, [sp, #20]
 	bfc	r3, #2, #1
-	str	r3, [sp, #28]
-	cmp	r7, #0
-	beq	.L342
+	str	r3, [sp, #20]
 	cmp	r1, #0
-	beq	.L343
+	beq	.L342
+	cbz	r4, .L343
 	ldr	r3, .L354+8
-	str	r1, [sp, #8]
 	str	r2, [sp, #4]
 	ldr	r3, [r3, #0]
 	cmp	r3, #24
 	ite	hi
 	movhi	r3, #128
 	movls	r3, #64
-	str	r3, [sp, #16]
-	lsr	r3, r2, ip
-	str	r3, [sp, #20]
-	ldr	r3, .L354+12
-	ldr	ip, [sp, #68]
-	ldr	r3, [r3, #4]
+	str	r3, [sp, #8]
+	lsr	r3, r2, r0
 	str	r3, [sp, #12]
+	ldr	r3, .L354+12
+	ldr	r0, [sp, #60]
+	ldr	lr, [r3, #4]
 	movs	r3, #0
-	mov	r7, r3
+	mov	r1, r3
 	b	.L345
 .L348:
-	ldr	r1, [sp, #68]
-	lsr	fp, r3, #2
-	cbz	r1, .L346
-	ldrh	sl, [ip, #2]
-	ldr	r2, [sp, #12]
-	ldrh	r8, [ip], #4
-	orr	r8, r8, sl, lsl #16
-	str	r8, [r2, fp, lsl #2]
+	ldr	r2, [sp, #60]
+	lsr	ip, r3, #2
+	cbz	r2, .L346
+	ldrh	fp, [r0, #2]
+	ldrh	sl, [r0], #4
+	orr	sl, sl, fp, lsl #16
+	str	sl, [lr, ip, lsl #2]
 	b	.L347
 .L346:
-	ldr	r2, [sp, #12]
-	mov	r1, #-1
-	str	r1, [r2, fp, lsl #2]
+	mov	r2, #-1
+	str	r2, [lr, ip, lsl #2]
 .L347:
-	ldr	r1, [sp, #16]
-	adds	r7, r7, #1
-	adds	r3, r3, r1
+	ldr	r2, [sp, #8]
+	adds	r1, r1, #1
+	adds	r3, r3, r2
 .L345:
-	ldr	r2, [sp, #20]
-	cmp	r7, r2
+	ldr	r2, [sp, #12]
+	cmp	r1, r2
 	bcc	.L348
-	ldr	r1, [sp, #8]
 	ldr	r2, [sp, #4]
 .L343:
 	adds	r2, r2, #1
-	ldr	r3, .L354+12
+	ldr	sl, .L354+12
 	asrs	r2, r2, #1
-	bfi	r0, r2, #22, #6
-	cbnz	r6, .L353
-	ldr	r2, [r3, #0]
+	bfi	r5, r2, #22, #6
+	cmp	r8, #0
+	bne	.L353
+	ldr	r0, [sl, #0]
 	b	.L349
 .L353:
-	mov	r2, r6
+	mov	r0, r8
 .L349:
-	ldr	r7, [r3, #4]
-	mov	ip, #1
-	str	r2, [r3, #8]
-	str	ip, [r3, #24]
-	str	r2, [r3, #16]
-	str	r7, [r3, #20]
-	str	r7, [r3, #12]
-	movs	r3, #0
-	str	r2, [r4, #20]
+	ldr	r3, [sl, #4]
+	ubfx	fp, r5, #22, #5
+	str	r0, [sl, #8]
+	add	r1, r0, fp, lsl #10
+	str	r0, [sl, #16]
+	str	r3, [sl, #12]
+	str	r3, [sl, #20]
+	bl	flush_dcache_range
+	ldr	r0, [sl, #12]
+	add	r1, r0, fp, lsl #7
+	bl	flush_dcache_range
+	movs	r3, #1
+	str	r3, [sl, #24]
 	movs	r2, #16
-	str	r7, [r4, #24]
-	str	r3, [sp, #28]
-	ldr	r3, [sp, #28]
+	ldr	r3, [sl, #16]
+	str	r3, [r6, #20]
+	ldr	r3, [sl, #20]
+	str	r3, [r6, #24]
+	movs	r3, #0
+	str	r3, [sp, #20]
+	tst	r8, #3
+	ldr	r3, [sp, #20]
 	bfi	r3, r2, #9, #5
-	str	r3, [sp, #28]
-	ldr	r3, [sp, #28]
+	str	r3, [sp, #20]
+	ldr	r3, [sp, #20]
 	orr	r3, r3, #448
-	str	r3, [sp, #28]
-	lsls	r3, r6, #30
+	str	r3, [sp, #20]
 	bne	.L350
-	ldr	r3, [sp, #28]
+	ldr	r3, [sp, #20]
 	movs	r2, #2
 	bfi	r3, r2, #3, #3
-	str	r3, [sp, #28]
+	str	r3, [sp, #20]
 .L350:
-	ldr	r3, [sp, #28]
-	rsbs	r1, r1, #1
+	ldr	r3, [sp, #20]
+	rsbs	r4, r4, #1
 	it	cc
-	movcc	r1, #0
+	movcc	r4, #0
 	orr	r3, r3, #4
-	str	r3, [sp, #28]
-	ldr	r3, [sp, #28]
-	bfi	r3, r1, #1, #1
-	str	r3, [sp, #28]
-	ldr	r3, [sp, #28]
+	str	r3, [sp, #20]
+	ldr	r3, [sp, #20]
+	bfi	r3, r4, #1, #1
+	str	r3, [sp, #20]
+	ldr	r3, [sp, #20]
 	orr	r3, r3, #1
-	str	r3, [sp, #28]
+	str	r3, [sp, #20]
 .L342:
-	ldr	r3, [sp, #28]
-	str	r3, [r4, #16]
+	ldr	r3, [sp, #20]
+	str	r3, [r6, #16]
 .L341:
-	str	r5, [r4, #12]
-	str	r0, [r4, #8]
-	orr	r0, r0, #4
-	str	r0, [r4, #8]
-	add	sp, sp, #32
+	str	r7, [r6, #12]
+	str	r5, [r6, #8]
+	orr	r5, r5, #4
+	str	r5, [r6, #8]
+	add	sp, sp, #24
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
 .L355:
 	.align	2
@@ -2687,77 +2691,91 @@ NandcXferStart:
 NandcXferComp:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L372
+	ldr	r3, .L373
 	push	{r0, r1, r2, r4, r5, lr}
 	ldr	r4, [r3, r0, lsl #3]
-	ldr	r3, .L372+4
+	ldr	r3, .L373+4
 	ldr	r3, [r3, #0]
 	cmp	r3, #3
-	bls	.L368
+	bls	.L369
 	ldr	r2, [r4, #16]
-	lsls	r0, r2, #29
-	bpl	.L368
+	lsls	r2, r2, #29
+	bpl	.L369
 	ldr	r2, [r4, #16]
-	lsls	r1, r2, #30
-	bpl	.L364
+	lsls	r0, r2, #30
+	bpl	.L365
 	ldr	r2, [r4, #8]
 	str	r2, [sp, #0]
-	b	.L371
+	b	.L372
 .L362:
 	cmp	r3, #5
-	bls	.L371
+	bls	.L372
 	ldr	r2, [r4, #0]
 	str	r2, [sp, #4]
 	ldr	r2, [sp, #4]
-	lsls	r2, r2, #18
-	bpl	.L371
+	lsls	r1, r2, #18
+	bpl	.L372
 	ldr	r2, [sp, #4]
-	lsls	r0, r2, #14
+	lsls	r2, r2, #14
 	bmi	.L361
-.L371:
+.L372:
 	ldr	r1, [r4, #28]
 	ldr	r2, [sp, #0]
 	ubfx	r1, r1, #16, #5
 	ubfx	r2, r2, #22, #6
 	cmp	r1, r2
 	blt	.L362
-	b	.L361
-.L364:
+.L361:
+	ldr	r4, .L373+8
+	ldr	r3, [r4, #24]
+	cbz	r3, .L363
+	ldr	r1, [sp, #0]
+	ldr	r0, [r4, #16]
+	ubfx	r1, r1, #22, #5
+	add	r1, r0, r1, lsl #10
+	bl	invalidate_dcache_range
+	ldr	r1, [sp, #0]
+	ldr	r0, [r4, #20]
+	ubfx	r1, r1, #22, #5
+	add	r1, r0, r1, lsl #7
+	bl	invalidate_dcache_range
+	b	.L363
+.L365:
 	ldr	r3, [r4, #8]
 	str	r3, [sp, #0]
 	ldr	r3, [sp, #0]
-	lsls	r1, r3, #11
-	bpl	.L364
-	ldr	r5, .L372+8
+	lsls	r5, r3, #11
+	bpl	.L365
+	ldr	r5, .L373+12
 	ldr	r3, [r5, #0]
-	cbz	r3, .L365
+	cbz	r3, .L366
 	mov	r0, r4
 	bl	NandcSendDumpDataStart
-.L365:
+.L366:
 	ldr	r3, [r5, #0]
-	cbz	r3, .L361
+	cbz	r3, .L363
 	mov	r0, r4
 	bl	NandcSendDumpDataDone
-.L361:
-	ldr	r3, .L372+12
+.L363:
+	ldr	r3, .L373+8
 	movs	r2, #0
 	str	r2, [r3, #24]
 	b	.L356
-.L368:
+.L369:
 	ldr	r3, [r4, #8]
 	str	r3, [sp, #0]
 	ldr	r3, [sp, #0]
-	lsls	r2, r3, #11
-	bpl	.L368
+	lsls	r0, r3, #11
+	bpl	.L369
 .L356:
 	pop	{r1, r2, r3, r4, r5, pc}
-.L373:
+.L374:
 	.align	2
-.L372:
+.L373:
 	.word	.LANCHOR5
 	.word	.LANCHOR37
-	.word	.LANCHOR39
 	.word	.LANCHOR38
+	.word	.LANCHOR39
 	.size	NandcXferComp, .-NandcXferComp
 	.section	.text.NandcCopy1KB,"ax",%progbits
 	.align	1
@@ -2775,14 +2793,14 @@ NandcCopy1KB:
 	ldr	r5, [sp, #16]
 	add	r6, r0, #512
 	add	r2, r2, r4, lsl #9
-	bne	.L375
-	cbz	r3, .L376
+	bne	.L376
+	cbz	r3, .L377
 	mov	r0, r2
 	mov	r1, r3
 	mov	r2, #1024
 	bl	memcpy
-.L376:
-	cbz	r5, .L374
+.L377:
+	cbz	r5, .L375
 	lsrs	r4, r4, #1
 	ldrb	r2, [r5, #1]	@ zero_extendqisi2
 	lsls	r3, r4, #4
@@ -2797,14 +2815,14 @@ NandcCopy1KB:
 	orr	r3, r3, r2, lsl #24
 	str	r3, [r6, r4]
 	pop	{r4, r5, r6, pc}
-.L375:
-	cbz	r3, .L378
+.L376:
+	cbz	r3, .L379
 	mov	r1, r2
 	mov	r0, r3
 	mov	r2, #1024
 	bl	memcpy
-.L378:
-	cbz	r5, .L374
+.L379:
+	cbz	r5, .L375
 	lsrs	r4, r4, #1
 	lsls	r3, r4, #4
 	lsls	r4, r4, #6
@@ -2817,7 +2835,7 @@ NandcCopy1KB:
 	lsrs	r3, r3, #24
 	strb	r2, [r5, #2]
 	strb	r3, [r5, #3]
-.L374:
+.L375:
 	pop	{r4, r5, r6, pc}
 	.size	NandcCopy1KB, .-NandcCopy1KB
 	.section	.text.NandcXferData,"ax",%progbits
@@ -2833,21 +2851,21 @@ NandcXferData:
 	sub	sp, sp, #88
 	mov	r4, r3
 	mov	fp, r3
-	ldr	r3, .L417
+	ldr	r3, .L418
 	mov	r6, r0
 	str	r1, [sp, #12]
 	lsls	r1, r4, #26
 	mov	sl, r2
 	ldr	r5, [sp, #120]
 	ldr	r8, [r3, r0, lsl #3]
-	bne	.L380
-	cbnz	r5, .L381
+	bne	.L381
+	cbnz	r5, .L382
 	add	r0, sp, #20
 	movs	r1, #255
 	movs	r2, #64
 	add	r5, sp, #20
 	bl	memset
-.L381:
+.L382:
 	movs	r3, #0
 	mov	r0, r6
 	ldr	r1, [sp, #12]
@@ -2858,10 +2876,10 @@ NandcXferData:
 	bl	NandcXferComp
 	ldr	r3, [sp, #12]
 	cmp	r3, #0
-	bne	.L404
-	ldr	r3, .L417+4
+	bne	.L405
+	ldr	r3, .L418+4
 	lsr	r0, sl, #1
-	ldr	r1, .L417+8
+	ldr	r1, .L418+8
 	ldr	r4, [r3, #0]
 	ldr	r3, [sp, #12]
 	cmp	r4, #24
@@ -2869,8 +2887,8 @@ NandcXferData:
 	movhi	r4, #128
 	movls	r4, #64
 	mov	r2, r3
-	b	.L384
-.L385:
+	b	.L385
+.L386:
 	ldr	r7, [r1, #4]
 	lsrs	r3, r3, #2
 	adds	r2, r2, #1
@@ -2884,30 +2902,30 @@ NandcXferData:
 	strb	r3, [r5, #3]
 	adds	r5, r5, #4
 	mov	r3, r6
-.L384:
+.L385:
 	cmp	r2, r0
 	add	r6, r3, r4
-	bcc	.L385
-	ldr	r3, .L417+4
+	bcc	.L386
+	ldr	r3, .L418+4
 	lsr	sl, sl, #2
 	ldr	r0, [r3, #0]
-	ldr	r3, .L417+12
+	ldr	r3, .L418+12
 	ldr	r1, [r3, #0]
 	movs	r3, #0
 	mov	r4, r3
-	b	.L386
-.L392:
+	b	.L387
+.L393:
 	add	r2, r3, #8
 	ldr	r2, [r8, r2, lsl #2]
 	str	r2, [sp, #84]
 	ldr	r2, [sp, #84]
 	lsls	r2, r2, #29
-	bmi	.L407
+	bmi	.L408
 	ldr	r2, [sp, #84]
 	ands	r2, r2, #32768
-	bne	.L407
+	bne	.L408
 	cmp	r1, #5
-	bls	.L388
+	bls	.L389
 	ldr	r7, [sp, #84]
 	ldr	r5, [sp, #84]
 	ldr	r6, [sp, #84]
@@ -2920,19 +2938,19 @@ NandcXferData:
 	orr	r2, r6, r2, lsl #5
 	cmp	r5, r2
 	ldr	r5, [sp, #84]
-	bls	.L389
+	bls	.L390
 	ldr	r2, [sp, #84]
 	ubfx	r5, r5, #3, #5
 	ubfx	r2, r2, #27, #1
-	b	.L416
-.L389:
+	b	.L417
+.L390:
 	ldr	r2, [sp, #84]
 	ubfx	r5, r5, #16, #5
 	ubfx	r2, r2, #29, #1
-	b	.L416
-.L388:
+	b	.L417
+.L389:
 	cmp	r1, #3
-	bls	.L390
+	bls	.L391
 	ldr	r7, [sp, #84]
 	ldr	r5, [sp, #84]
 	ldr	r6, [sp, #84]
@@ -2945,45 +2963,45 @@ NandcXferData:
 	orr	r2, r6, r2, lsl #5
 	cmp	r5, r2
 	ldr	r5, [sp, #84]
-	bls	.L391
+	bls	.L392
 	ldr	r2, [sp, #84]
 	ubfx	r5, r5, #3, #5
 	ubfx	r2, r2, #28, #1
-	b	.L416
-.L391:
+	b	.L417
+.L392:
 	ldr	r2, [sp, #84]
 	ubfx	r5, r5, #16, #5
 	ubfx	r2, r2, #30, #1
-.L416:
+.L417:
 	orr	r2, r5, r2, lsl #5
-.L390:
+.L391:
 	cmp	r4, r2
 	it	cc
 	movcc	r4, r2
-	b	.L387
-.L407:
+	b	.L388
+.L408:
 	mov	r4, #-1
-.L387:
+.L388:
 	adds	r3, r3, #1
-.L386:
+.L387:
 	cmp	r3, sl
-	bcs	.L382
+	bcs	.L383
 	cmp	r0, #0
-	bne	.L392
-	b	.L382
-.L404:
+	bne	.L393
+	b	.L383
+.L405:
 	movs	r4, #0
-.L382:
+.L383:
 	movs	r3, #0
 	str	r3, [r8, #16]
-	b	.L393
-.L380:
+	b	.L394
+.L381:
 	ldr	r3, [sp, #12]
 	mov	r7, #0
 	cmp	r3, #1
-	bne	.L414
-	b	.L394
-.L397:
+	bne	.L415
+	b	.L395
+.L398:
 	cmp	r5, #0
 	ite	ne
 	movne	r3, #2
@@ -3008,12 +3026,12 @@ NandcXferData:
 	mov	r0, r6
 	bl	NandcXferComp
 	add	fp, fp, #1024
-.L394:
+.L395:
 	cmp	r7, sl
-	bcc	.L397
+	bcc	.L398
 	movs	r4, #0
-	b	.L393
-.L414:
+	b	.L394
+.L415:
 	mov	r1, r7
 	movs	r2, #2
 	mov	r3, r7
@@ -3021,15 +3039,15 @@ NandcXferData:
 	str	r7, [sp, #4]
 	mov	r4, r7
 	bl	NandcXferStart
-	b	.L398
-.L402:
+	b	.L399
+.L403:
 	mov	r0, r6
 	bl	NandcXferComp
 	ldr	r3, [r8, #32]
 	add	ip, r7, #2
 	cmp	ip, sl
 	str	r3, [sp, #84]
-	bcs	.L399
+	bcs	.L400
 	movs	r3, #0
 	mov	r0, r6
 	str	r3, [sp, #0]
@@ -3040,10 +3058,10 @@ NandcXferData:
 	str	ip, [sp, #8]
 	bl	NandcXferStart
 	ldr	ip, [sp, #8]
-.L399:
+.L400:
 	ldr	r3, [sp, #84]
-	lsls	r3, r3, #29
-	bmi	.L411
+	lsls	r1, r3, #29
+	bmi	.L412
 	ldr	r2, [sp, #84]
 	ldr	r3, [sp, #84]
 	ubfx	r2, r2, #3, #5
@@ -3052,10 +3070,10 @@ NandcXferData:
 	cmp	r4, r3
 	it	cc
 	movcc	r4, r3
-	b	.L400
-.L411:
+	b	.L401
+.L412:
 	mov	r4, #-1
-.L400:
+.L401:
 	cmp	r5, #0
 	ite	ne
 	movne	r3, #2
@@ -3072,30 +3090,30 @@ NandcXferData:
 	bl	NandcCopy1KB
 	ldr	ip, [sp, #8]
 	mov	r7, ip
-.L398:
+.L399:
 	cmp	r7, sl
-	bcc	.L402
-.L393:
-	ldr	r3, .L417+12
+	bcc	.L403
+.L394:
+	ldr	r3, .L418+12
 	ldr	r3, [r3, #0]
 	cmp	r3, #5
-	bls	.L403
+	bls	.L404
 	ldr	r3, [sp, #12]
-	cbnz	r3, .L403
+	cbnz	r3, .L404
 	ldr	r3, [r8, #0]
 	and	r2, r3, #139264
 	cmp	r2, #139264
-	bne	.L403
+	bne	.L404
 	mov	r4, #-1
 	orr	r3, r3, #131072
 	str	r3, [r8, #0]
-.L403:
+.L404:
 	mov	r0, r4
 	add	sp, sp, #88
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L418:
+.L419:
 	.align	2
-.L417:
+.L418:
 	.word	.LANCHOR5
 	.word	.LANCHOR36
 	.word	.LANCHOR38
@@ -3112,27 +3130,27 @@ FlashProgPage:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r8, r3
-	ldr	r3, .L422
+	ldr	r3, .L423
 	mov	r5, r1
 	mov	r6, r2
 	mov	r4, r0
 	ldrb	r7, [r3, #9]	@ zero_extendqisi2
-	cbnz	r0, .L420
-	ldr	r3, .L422+4
-	ldr	r2, .L422+8
+	cbnz	r0, .L421
+	ldr	r3, .L423+4
+	ldr	r2, .L423+8
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	ldr	r2, [r2, #0]
 	muls	r3, r2, r3
 	cmp	r1, r3
-	bcs	.L420
-	ldr	r3, .L422+12
+	bcs	.L421
+	ldr	r3, .L423+12
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbnz	r3, .L421
+	cbnz	r3, .L422
 	subs	r7, r7, #2
-	b	.L420
-.L421:
+	b	.L421
+.L422:
 	movs	r7, #4
-.L420:
+.L421:
 	mov	r0, r4
 	bl	NandcWaitFlashReady
 	mov	r0, r4
@@ -3159,9 +3177,9 @@ FlashProgPage:
 	bl	NandcFlashDeCs
 	and	r0, r5, #1
 	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
-.L423:
+.L424:
 	.align	2
-.L422:
+.L423:
 	.word	.LANCHOR18
 	.word	.LANCHOR1
 	.word	.LANCHOR2
@@ -3176,36 +3194,36 @@ FlashProgPage:
 FlashPageProgMsbFFData:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L432
+	ldr	r3, .L433
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	mov	r4, r2
-	ldr	r2, .L432+4
+	ldr	r2, .L433+4
 	mov	r8, r0
 	ldr	r3, [r3, #0]
 	mov	r7, r1
 	ldrb	r2, [r2, #0]	@ zero_extendqisi2
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
-	cbz	r2, .L425
-	ldr	r2, .L432+8
+	cbz	r2, .L426
+	ldr	r2, .L433+8
 	ldr	r1, [r2, #0]
-	ldr	r2, .L432+12
+	ldr	r2, .L433+12
 	cmp	r1, r2
-	beq	.L424
-.L425:
+	beq	.L425
+.L426:
 	subs	r2, r3, #5
 	cmp	r2, #2
-	bls	.L429
+	bls	.L430
 	cmp	r3, #68
-	beq	.L429
+	beq	.L430
 	cmp	r3, #35
-	beq	.L429
+	beq	.L430
 	cmp	r3, #19
-	bne	.L424
-	b	.L429
-.L430:
+	bne	.L425
+	b	.L430
+.L431:
 	ldrh	r3, [sl, r4, lsl #1]
 	cmp	r3, fp
-	bne	.L424
+	bne	.L425
 	movs	r1, #255
 	mov	r2, #32768
 	ldr	r0, [r5, #0]
@@ -3217,22 +3235,22 @@ FlashPageProgMsbFFData:
 	movs	r3, #0
 	bl	FlashProgPage
 	uxth	r4, r4
-	b	.L431
-.L429:
-	ldr	r6, .L432
+	b	.L432
+.L430:
+	ldr	r6, .L433
 	movw	fp, #65535
-	ldr	sl, .L432+20
-	ldr	r5, .L432+16
-.L431:
+	ldr	sl, .L433+20
+	ldr	r5, .L433+16
+.L432:
 	ldr	r3, [r6, #0]
 	ldrh	r3, [r3, #10]
 	cmp	r3, r4
-	bhi	.L430
-.L424:
+	bhi	.L431
+.L425:
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L433:
+.L434:
 	.align	2
-.L432:
+.L433:
 	.word	.LANCHOR23
 	.word	.LANCHOR7
 	.word	.LANCHOR40
@@ -3251,21 +3269,21 @@ FlashReadRawPage:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r8, r3
-	ldr	r3, .L437
+	ldr	r3, .L438
 	mov	r6, r1
 	mov	r5, r2
 	mov	r4, r0
 	ldrb	r7, [r3, #9]	@ zero_extendqisi2
-	cbnz	r0, .L435
-	ldr	r3, .L437+4
-	ldr	r2, .L437+8
+	cbnz	r0, .L436
+	ldr	r3, .L438+4
+	ldr	r2, .L438+8
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	ldr	r2, [r2, #0]
 	muls	r3, r2, r3
 	cmp	r1, r3
 	it	cc
 	movcc	r7, #4
-.L435:
+.L436:
 	mov	r0, r4
 	bl	NandcWaitFlashReady
 	mov	r0, r4
@@ -3286,9 +3304,9 @@ FlashReadRawPage:
 	bl	NandcFlashDeCs
 	mov	r0, r5
 	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
-.L438:
+.L439:
 	.align	2
-.L437:
+.L438:
 	.word	.LANCHOR18
 	.word	.LANCHOR1
 	.word	.LANCHOR2
@@ -3304,7 +3322,7 @@ HynixReadRetrial:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
 	mov	sl, r2
-	ldr	r2, .L454
+	ldr	r2, .L455
 	mov	r7, r3
 	mov	r6, r0
 	str	r1, [sp, #4]
@@ -3312,7 +3330,7 @@ HynixReadRetrial:
 	mov	r8, #0
 	ldrb	fp, [r2, #2]	@ zero_extendqisi2
 	mov	r5, #-1
-	ldr	r2, .L454+4
+	ldr	r2, .L455+4
 	ldrb	r4, [r3, #12]	@ zero_extendqisi2
 	ldr	r2, [r2, #0]
 	ldrb	r2, [r2, #19]	@ zero_extendqisi2
@@ -3320,10 +3338,10 @@ HynixReadRetrial:
 	it	eq
 	ldrbeq	r4, [r3, #20]	@ zero_extendqisi2
 	bl	NandcWaitFlashReady
-	b	.L441
-.L446:
+	b	.L442
+.L447:
 	adds	r4, r4, #1
-	ldr	r2, .L454
+	ldr	r2, .L455
 	mov	r0, r6
 	uxtb	r4, r4
 	cmp	r4, fp
@@ -3339,33 +3357,33 @@ HynixReadRetrial:
 	mov	r2, sl
 	bl	FlashReadRawPage
 	adds	r3, r0, #1
-	beq	.L443
-	ldr	r2, .L454+8
+	beq	.L444
+	ldr	r2, .L455+8
 	cmp	r5, #-1
 	it	eq
 	moveq	r5, r0
 	ldrb	r3, [r2, #0]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r0, r3, lsr #2
-	bcc	.L452
+	bcc	.L453
 	movs	r7, #0
 	mov	sl, r7
-.L443:
+.L444:
 	add	r8, r8, #1
-.L441:
+.L442:
 	cmp	r8, fp
-	bcc	.L446
-	b	.L445
-.L452:
+	bcc	.L447
+	b	.L446
+.L453:
 	mov	r5, r0
-.L445:
-	ldr	r3, .L454+4
+.L446:
+	ldr	r3, .L455+4
 	ldr	r3, [r3, #0]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	cmp	r3, #7
-	ldr	r3, .L454
+	ldr	r3, .L455
 	add	r6, r3, r6
-	ldr	r3, .L454+8
+	ldr	r3, .L455+8
 	it	eq
 	strbeq	r4, [r6, #20]
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
@@ -3373,21 +3391,22 @@ HynixReadRetrial:
 	strbne	r4, [r6, #12]
 	add	r3, r3, r3, lsl #1
 	cmp	r5, r3, lsr #2
-	bcc	.L449
+	bcc	.L450
 	cmp	r5, #-1
 	ite	eq
 	moveq	r5, #-1
 	movne	r5, #256
-.L449:
+.L450:
 	mov	r0, r5
 	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L455:
+.L456:
 	.align	2
-.L454:
+.L455:
 	.word	.LANCHOR31
 	.word	.LANCHOR23
 	.word	.LANCHOR29
 	.size	HynixReadRetrial, .-HynixReadRetrial
+	.global	__aeabi_idiv
 	.section	.text.MicronReadRetrial,"ax",%progbits
 	.align	1
 	.global	MicronReadRetrial
@@ -3398,26 +3417,28 @@ MicronReadRetrial:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	sub	sp, sp, #24
 	mov	fp, r3
-	ldr	r3, .L470
-	str	r2, [sp, #20]
+	ldr	r3, .L471
 	mov	sl, r0
-	ldr	r2, .L470+4
+	sub	sp, sp, #24
+	ldrb	r0, [r3, #0]	@ zero_extendqisi2
+	ldr	r3, .L471+4
 	str	r1, [sp, #16]
+	str	r2, [sp, #20]
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	cbnz	r2, .L457
-	add	r3, r3, r3, lsl #1
-	ubfx	r3, r3, #2, #8
-	b	.L469
-.L457:
-	lsrs	r3, r3, #2
-.L469:
+	cbnz	r3, .L458
+	add	r0, r0, r0, lsl #1
+	ubfx	r0, r0, #2, #8
+	b	.L470
+.L458:
+	movs	r1, #3
+	bl	__aeabi_idiv
+	uxtb	r0, r0
+.L470:
+	str	r0, [sp, #12]
 	mov	r0, sl
-	str	r3, [sp, #12]
 	bl	NandcWaitFlashReady
-	ldr	r3, .L470+8
+	ldr	r3, .L471+8
 	mov	r8, #0
 	mov	r4, #-1
 	ldr	r6, [r3, sl, lsl #3]
@@ -3426,8 +3447,8 @@ MicronReadRetrial:
 	adds	r7, r7, #8
 	lsls	r7, r7, #8
 	adds	r5, r6, r7
-	b	.L459
-.L463:
+	b	.L460
+.L464:
 	movs	r2, #239
 	movs	r3, #137
 	str	r2, [r5, #8]
@@ -3448,26 +3469,26 @@ MicronReadRetrial:
 	bl	FlashReadRawPage
 	ldr	ip, [sp, #8]
 	adds	r2, r0, #1
-	beq	.L460
+	beq	.L461
 	ldr	r3, [sp, #12]
 	cmp	r4, #-1
 	it	eq
 	moveq	r4, r0
 	cmp	r0, r3
-	bcc	.L467
+	bcc	.L468
 	mov	fp, #0
 	str	fp, [sp, #20]
-.L460:
+.L461:
 	mov	r8, ip
-.L459:
-	ldr	r2, .L470+12
+.L460:
+	ldr	r2, .L471+12
 	ldrb	r3, [r2, #0]	@ zero_extendqisi2
 	cmp	r8, r3
-	bcc	.L463
-	b	.L462
-.L467:
+	bcc	.L464
+	b	.L463
+.L468:
 	mov	r4, r0
-.L462:
+.L463:
 	movs	r3, #239
 	movs	r0, #200
 	str	r3, [r5, #8]
@@ -3481,8 +3502,8 @@ MicronReadRetrial:
 	str	r3, [r6, r7]
 	ldr	r3, [sp, #12]
 	cmp	r4, r3
-	bcc	.L464
-	ldr	r0, .L470+16
+	bcc	.L465
+	ldr	r0, .L471+16
 	mov	r1, r8
 	ldr	r2, [sp, #16]
 	mov	r3, r8
@@ -3492,13 +3513,13 @@ MicronReadRetrial:
 	movne	r4, #256
 	str	r4, [sp, #0]
 	bl	printf
-.L464:
+.L465:
 	mov	r0, r4
 	add	sp, sp, #24
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L471:
+.L472:
 	.align	2
-.L470:
+.L471:
 	.word	.LANCHOR29
 	.word	.LANCHOR7
 	.word	.LANCHOR5
@@ -3520,7 +3541,7 @@ SamsungReadRetrial:
 	mov	r6, r3
 	mov	fp, r1
 	bl	NandcWaitFlashReady
-	ldr	r3, .L482
+	ldr	r3, .L483
 	movs	r5, #1
 	mov	r4, #-1
 	ldr	r2, [r3, r7, lsl #3]
@@ -3528,8 +3549,8 @@ SamsungReadRetrial:
 	ldrb	sl, [r3, #4]	@ zero_extendqisi2
 	add	sl, sl, #8
 	add	sl, r2, sl, lsl #8
-	b	.L473
-.L477:
+	b	.L474
+.L478:
 	mov	r0, sl
 	uxtb	r1, r5
 	bl	SamsungSetRRPara
@@ -3539,47 +3560,47 @@ SamsungReadRetrial:
 	mov	r3, r6
 	bl	FlashReadRawPage
 	adds	r1, r0, #1
-	beq	.L474
-	ldr	r2, .L482+4
+	beq	.L475
+	ldr	r2, .L483+4
 	cmp	r4, #-1
 	it	eq
 	moveq	r4, r0
 	ldrb	r3, [r2, #0]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r0, r3, lsr #2
-	bcc	.L480
+	bcc	.L481
 	movs	r6, #0
 	mov	r8, r6
-.L474:
+.L475:
 	adds	r5, r5, #1
-.L473:
-	ldr	r2, .L482+8
+.L474:
+	ldr	r2, .L483+8
 	ldrb	r3, [r2, #0]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	cmp	r5, r3
-	bcc	.L477
-	b	.L476
-.L480:
+	bcc	.L478
+	b	.L477
+.L481:
 	mov	r4, r0
-.L476:
+.L477:
 	movs	r1, #0
 	mov	r0, sl
 	bl	SamsungSetRRPara
-	ldr	r3, .L482+4
+	ldr	r3, .L483+4
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, lsr #2
-	bcc	.L478
+	bcc	.L479
 	cmp	r4, #-1
 	ite	eq
 	moveq	r4, #-1
 	movne	r4, #256
-.L478:
+.L479:
 	mov	r0, r4
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L483:
+.L484:
 	.align	2
-.L482:
+.L483:
 	.word	.LANCHOR5
 	.word	.LANCHOR29
 	.word	.LANCHOR42
@@ -3599,69 +3620,69 @@ ToshibaReadRetrial:
 	mov	r8, r3
 	str	r1, [sp, #4]
 	bl	NandcWaitFlashReady
-	ldr	r3, .L506
+	ldr	r3, .L507
 	ldr	r2, [r3, r7, lsl #3]
 	add	r3, r3, r7, lsl #3
 	ldrb	r4, [r3, #4]	@ zero_extendqisi2
-	ldr	r3, .L506+4
+	ldr	r3, .L507+4
 	adds	r4, r4, #8
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	add	r4, r2, r4, lsl #8
 	subs	r3, r3, #67
 	cmp	r3, #1
-	bls	.L501
-	ldr	r3, .L506+8
+	bls	.L502
+	ldr	r3, .L507+8
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L502
+	cbz	r3, .L503
 	movs	r0, #0
 	mov	sl, #1
 	bl	NandcSetDdrMode
-	b	.L486
-.L502:
+	b	.L487
+.L503:
 	mov	sl, r3
-.L486:
+.L487:
 	movs	r3, #92
 	str	r3, [r4, #8]
 	movs	r3, #197
 	str	r3, [r4, #8]
-	b	.L485
-.L501:
+	b	.L486
+.L502:
 	mov	sl, #0
-.L485:
+.L486:
 	movs	r6, #1
 	mov	r5, #-1
-	b	.L487
-.L496:
-	ldr	r1, .L506+4
+	b	.L488
+.L497:
+	ldr	r1, .L507+4
 	mov	r0, r4
 	ldrb	r3, [r1, #0]	@ zero_extendqisi2
 	uxtb	r1, r6
 	subs	r3, r3, #67
 	cmp	r3, #1
-	bhi	.L488
+	bhi	.L489
 	bl	SandiskSetRRPara
-	b	.L489
-.L488:
-	bl	ToshibaSetRRPara
+	b	.L490
 .L489:
-	ldr	r2, .L506+4
+	bl	ToshibaSetRRPara
+.L490:
+	ldr	r2, .L507+4
 	ldrb	r3, [r2, #0]	@ zero_extendqisi2
 	cmp	r3, #34
-	bne	.L490
-	ldr	r1, .L506+12
+	bne	.L491
+	ldr	r1, .L507+12
 	ldrb	r3, [r1, #0]	@ zero_extendqisi2
 	subs	r3, r3, #3
 	cmp	r6, r3
-	bne	.L490
+	bne	.L491
 	movs	r2, #179
 	str	r2, [r4, #8]
-.L490:
+.L491:
 	movs	r3, #38
 	str	r3, [r4, #8]
 	movs	r3, #93
 	str	r3, [r4, #8]
 	cmp	sl, #0
-	beq	.L491
+	beq	.L492
 	movs	r0, #4
 	bl	NandcSetDdrMode
 	ldr	r1, [sp, #4]
@@ -3674,75 +3695,75 @@ ToshibaReadRetrial:
 	str	r3, [sp, #0]
 	bl	NandcSetDdrMode
 	ldr	r3, [sp, #0]
-	b	.L492
-.L491:
+	b	.L493
+.L492:
 	mov	r3, r8
 	mov	r0, r7
 	ldr	r1, [sp, #4]
 	mov	r2, fp
 	bl	FlashReadRawPage
 	mov	r3, r0
-.L492:
+.L493:
 	adds	r0, r3, #1
-	beq	.L493
-	ldr	r1, .L506+16
+	beq	.L494
+	ldr	r1, .L507+16
 	cmp	r5, #-1
 	it	eq
 	moveq	r5, r3
 	ldrb	r2, [r1, #0]	@ zero_extendqisi2
 	add	r2, r2, r2, lsl #1
 	cmp	r3, r2, lsr #2
-	bcc	.L504
+	bcc	.L505
 	mov	r8, #0
 	mov	fp, r8
-.L493:
+.L494:
 	adds	r6, r6, #1
-.L487:
-	ldr	r2, .L506+12
+.L488:
+	ldr	r2, .L507+12
 	ldrb	r3, [r2, #0]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	cmp	r6, r3
-	bcc	.L496
-	b	.L495
-.L504:
+	bcc	.L497
+	b	.L496
+.L505:
 	mov	r5, r3
-.L495:
-	ldr	r3, .L506+4
+.L496:
+	ldr	r3, .L507+4
 	movs	r1, #0
 	mov	r0, r4
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	subs	r3, r3, #67
 	cmp	r3, #1
-	bhi	.L497
+	bhi	.L498
 	bl	SandiskSetRRPara
-	b	.L498
-.L497:
-	bl	ToshibaSetRRPara
+	b	.L499
 .L498:
+	bl	ToshibaSetRRPara
+.L499:
 	movs	r3, #255
 	str	r3, [r4, #8]
-	ldr	r3, .L506+16
+	ldr	r3, .L507+16
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r5, r3, lsr #2
-	bcc	.L499
+	bcc	.L500
 	cmp	r5, #-1
 	ite	eq
 	moveq	r5, #-1
 	movne	r5, #256
-.L499:
+.L500:
 	mov	r0, r7
 	bl	NandcWaitFlashReady
 	cmp	sl, #0
-	beq	.L500
+	beq	.L501
 	movs	r0, #4
 	bl	NandcSetDdrMode
-.L500:
+.L501:
 	mov	r0, r5
 	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L507:
+.L508:
 	.align	2
-.L506:
+.L507:
 	.word	.LANCHOR5
 	.word	.LANCHOR11
 	.word	.LANCHOR35
@@ -3760,14 +3781,14 @@ FlashSavePhyInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	movs	r5, #0
-	ldr	r7, .L515
-	ldr	r8, .L515+60
-	ldr	sl, .L515+64
+	ldr	r7, .L516
+	ldr	r8, .L516+60
+	ldr	sl, .L516+64
 	ldr	r3, [r7, #0]
-	ldr	fp, .L515+48
-	ldr	r6, .L515+4
+	ldr	fp, .L516+48
+	ldr	r6, .L516+4
 	str	r3, [r8, #0]
-	ldr	r3, .L515+8
+	ldr	r3, .L516+8
 	ldrb	r0, [r3, #0]	@ zero_extendqisi2
 	bl	FlashBchSel
 	movs	r1, #0
@@ -3775,43 +3796,43 @@ FlashSavePhyInfo:
 	ldr	r0, [r7, #0]
 	bl	memset
 	ldr	r0, [r8, #0]
-	ldr	r3, .L515+12
+	ldr	r3, .L516+12
 	movs	r2, #32
-	ldr	r1, .L515+16
+	ldr	r1, .L516+16
 	str	sl, [r0, #0]
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	strh	r3, [r0, #12]	@ movhi
-	ldr	r3, .L515+20
+	ldr	r3, .L516+20
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	strh	r3, [r0, #14]	@ movhi
-	ldr	r3, .L515+24
+	ldr	r3, .L516+24
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	str	r3, [r0, #1076]
 	adds	r0, r0, #16
 	bl	memcpy
 	ldr	r0, [r8, #0]
-	ldr	r1, .L515+28
+	ldr	r1, .L516+28
 	movs	r2, #8
 	adds	r0, r0, #80
 	bl	memcpy
 	ldr	r0, [r8, #0]
-	ldr	r1, .L515+32
+	ldr	r1, .L516+32
 	movs	r2, #32
 	adds	r0, r0, #96
 	bl	memcpy
 	ldr	r0, [r8, #0]
-	ldr	r1, .L515+36
+	ldr	r1, .L516+36
 	movs	r2, #32
 	adds	r0, r0, #160
 	bl	memcpy
 	ldr	r0, [r8, #0]
-	ldr	r1, .L515+40
+	ldr	r1, .L516+40
 	movs	r2, #32
 	adds	r0, r0, #192
 	bl	memcpy
 	ldr	r0, [r8, #0]
 	mov	r2, #852
-	ldr	r1, .L515+44
+	ldr	r1, .L516+44
 	adds	r0, r0, #224
 	bl	memcpy
 	ldr	r4, [r8, #0]
@@ -3826,7 +3847,7 @@ FlashSavePhyInfo:
 	movs	r0, #0
 	bl	flash_enter_slc_mode
 	mov	r4, r5
-.L511:
+.L512:
 	movs	r0, #0
 	ldr	r1, [r6, #0]
 	mov	r2, r0
@@ -3845,7 +3866,7 @@ FlashSavePhyInfo:
 	ldr	r2, [r7, #0]
 	adds	r1, r1, #1
 	bl	FlashProgPage
-	ldr	r3, .L515+48
+	ldr	r3, .L516+48
 	movs	r0, #0
 	ldr	r1, [r6, #0]
 	muls	r1, r4, r1
@@ -3853,32 +3874,32 @@ FlashSavePhyInfo:
 	mov	r3, r0
 	bl	FlashReadRawPage
 	adds	r0, r0, #1
-	beq	.L509
+	beq	.L510
 	ldr	fp, [r8, #0]
 	ldr	r3, [fp, #0]
 	cmp	r3, sl
-	bne	.L509
+	bne	.L510
 	add	r0, fp, #12
 	movw	r1, #2036
 	bl	JSHash
 	ldr	r3, [fp, #8]
 	cmp	r3, r0
-	bne	.L509
-	ldr	r3, .L515+52
+	bne	.L510
+	ldr	r3, .L516+52
 	adds	r2, r4, #1
 	adds	r5, r5, #1
 	str	r2, [r3, #0]
-	ldr	r3, .L515+56
+	ldr	r3, .L516+56
 	ldr	r2, [r6, #0]
 	muls	r2, r4, r2
 	cmp	r5, #1
 	str	r2, [r3, #0]
-	bhi	.L510
-.L509:
+	bhi	.L511
+.L510:
 	adds	r4, r4, #1
 	cmp	r4, #4
-	bne	.L511
-.L510:
+	bne	.L512
+.L511:
 	movs	r0, #0
 	bl	flash_exit_slc_mode
 	cmp	r5, #0
@@ -3886,9 +3907,9 @@ FlashSavePhyInfo:
 	moveq	r0, #-1
 	movne	r0, #0
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L516:
+.L517:
 	.align	2
-.L515:
+.L516:
 	.word	.LANCHOR44
 	.word	.LANCHOR2
 	.word	.LANCHOR45
@@ -3919,37 +3940,37 @@ FlashReadIdbDataRaw:
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, lr}
 	movs	r2, #4
 	mov	r8, r0
-	ldr	r1, .L528
+	ldr	r1, .L529
 	add	r0, sp, #12
 	bl	memcpy
-	ldr	r3, .L528+4
+	ldr	r3, .L529+4
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	str	r3, [sp, #4]
-	ldr	r3, .L528+8
+	ldr	r3, .L529+8
 	ldr	r2, [r3, #0]
-	ldr	r3, .L528+12
+	ldr	r3, .L529+12
 	cmp	r2, r3
-	bne	.L518
+	bne	.L519
 	movs	r0, #0
 	bl	flash_enter_slc_mode
-.L518:
+.L519:
 	mov	r0, r8
 	movs	r1, #0
 	mov	r2, #2048
 	mov	r7, #-1
 	bl	memset
 	movs	r4, #2
-	ldr	sl, .L528+32
-	ldr	fp, .L528+36
-	ldr	r6, .L528+16
-	b	.L519
-.L526:
+	ldr	sl, .L529+32
+	ldr	fp, .L529+36
+	ldr	r6, .L529+16
+	b	.L520
+.L527:
 	movs	r5, #0
-.L521:
+.L522:
 	add	r3, sp, #12
 	ldrb	r0, [r3, r5]	@ zero_extendqisi2
 	bl	FlashBchSel
-	ldr	r3, .L528+16
+	ldr	r3, .L529+16
 	movs	r0, #0
 	ldr	r1, [fp, #0]
 	muls	r1, r4, r1
@@ -3957,19 +3978,19 @@ FlashReadIdbDataRaw:
 	mov	r3, r0
 	bl	FlashReadRawPage
 	adds	r0, r0, #1
-	bne	.L520
+	bne	.L521
 	adds	r5, r5, #1
 	cmp	r5, #4
-	bne	.L521
-	b	.L522
-.L520:
+	bne	.L522
+	b	.L523
+.L521:
 	ldr	r3, [r6, #0]
 	ldr	r2, [r3, #0]
-	ldr	r3, .L528+20
+	ldr	r3, .L529+20
 	cmp	r2, r3
-	bne	.L522
+	bne	.L523
 	add	r3, sp, #16
-	ldr	r0, .L528+24
+	ldr	r0, .L529+24
 	adds	r5, r3, r5
 	ldrb	r1, [r5, #-4]	@ zero_extendqisi2
 	bl	printf
@@ -3980,39 +4001,39 @@ FlashReadIdbDataRaw:
 	ldr	r3, [r6, #0]
 	ldr	r3, [r3, #512]
 	strb	r3, [sl, #0]
-	ldr	r3, .L528+28
+	ldr	r3, .L529+28
 	ldr	r2, [r3, #0]
 	cmp	r2, r4
-	bls	.L525
+	bls	.L526
 	str	r4, [r3, #0]
 	movs	r7, #0
 	bl	FlashSavePhyInfo
-.L522:
+.L523:
 	adds	r4, r4, #1
-.L519:
+.L520:
 	ldrb	r3, [sl, #0]	@ zero_extendqisi2
 	cmp	r4, r3
-	bcc	.L526
-	b	.L523
-.L525:
+	bcc	.L527
+	b	.L524
+.L526:
 	movs	r7, #0
-.L523:
+.L524:
 	ldr	r0, [sp, #4]
 	bl	FlashBchSel
-	ldr	r3, .L528+8
+	ldr	r3, .L529+8
 	ldr	r2, [r3, #0]
-	ldr	r3, .L528+12
+	ldr	r3, .L529+12
 	cmp	r2, r3
-	bne	.L524
+	bne	.L525
 	movs	r0, #0
 	bl	flash_exit_slc_mode
-.L524:
+.L525:
 	mov	r0, r7
 	add	sp, sp, #16
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L529:
+.L530:
 	.align	2
-.L528:
+.L529:
 	.word	.LANCHOR48
 	.word	.LANCHOR29
 	.word	.LANCHOR40
@@ -4035,25 +4056,25 @@ FlashLoadPhyInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, lr}
 	movs	r2, #4
-	ldr	sl, .L542+40
+	ldr	sl, .L543+40
 	add	r0, sp, #12
-	ldr	r1, .L542
+	ldr	r1, .L543
 	movs	r4, #0
 	bl	memcpy
-	ldr	r5, .L542+4
+	ldr	r5, .L543+4
 	ldr	r3, [sl, #0]
 	mov	r0, r4
-	ldr	r6, .L542+8
+	ldr	r6, .L543+8
 	mov	r8, #4
 	mov	r7, #-1
 	str	r3, [r5, #0]
-	ldr	r3, .L542+12
+	ldr	r3, .L543+12
 	ldrh	r2, [r6, #10]
 	str	r4, [r3, #0]
 	str	r2, [sp, #4]
 	bl	flash_enter_slc_mode
-	b	.L531
-.L533:
+	b	.L532
+.L534:
 	add	r3, sp, #12
 	ldrb	r0, [r3, r6]	@ zero_extendqisi2
 	bl	FlashBchSel
@@ -4063,96 +4084,96 @@ FlashLoadPhyInfo:
 	mov	r3, r0
 	bl	FlashReadRawPage
 	adds	r0, r0, #1
-	bne	.L532
+	bne	.L533
 	movs	r0, #0
 	mov	r1, fp
 	ldr	r2, [sl, #0]
 	mov	r3, r0
 	bl	FlashReadRawPage
 	adds	r0, r0, #1
-	bne	.L532
+	bne	.L533
 	adds	r6, r6, #1
 	cmp	r6, #4
-	beq	.L534
-	b	.L533
-.L532:
+	beq	.L535
+	b	.L534
+.L533:
 	ldr	r6, [r5, #0]
-	ldr	r2, .L542+16
+	ldr	r2, .L543+16
 	ldr	r3, [r6, #0]
 	cmp	r3, r2
-	bne	.L534
-	cbnz	r7, .L535
-	ldr	r3, .L542+8
+	bne	.L535
+	cbnz	r7, .L536
+	ldr	r3, .L543+8
 	mov	r0, r4
 	ldrh	r1, [r3, #10]
 	bl	__aeabi_uidiv
-	ldr	r3, .L542+20
+	ldr	r3, .L543+20
 	adds	r0, r0, #1
 	str	r0, [r3, #0]
 	mov	r0, r7
-	b	.L541
-.L535:
+	b	.L542
+.L536:
 	add	r0, r6, #12
 	movw	r1, #2036
 	bl	JSHash
 	ldr	r3, [r6, #8]
 	cmp	r3, r0
-	bne	.L534
+	bne	.L535
 	add	r1, r6, #160
 	movs	r2, #32
-	ldr	r0, .L542+8
+	ldr	r0, .L543+8
 	bl	memcpy
 	ldr	r1, [r5, #0]
 	movs	r2, #32
-	ldr	r0, .L542+24
+	ldr	r0, .L543+24
 	adds	r1, r1, #192
 	bl	memcpy
 	ldr	r1, [r5, #0]
 	mov	r2, #852
-	ldr	r0, .L542+28
+	ldr	r0, .L543+28
 	adds	r1, r1, #224
 	bl	memcpy
 	ldr	r6, [r5, #0]
-	ldr	r3, .L542+32
+	ldr	r3, .L543+32
 	mov	r0, r4
 	ldr	r2, [r6, #1076]
 	strb	r2, [r3, #0]
-	ldr	r3, .L542+12
+	ldr	r3, .L543+12
 	str	r4, [r3, #0]
-	ldr	r3, .L542+8
+	ldr	r3, .L543+8
 	ldrh	r1, [r3, #10]
 	bl	__aeabi_uidiv
-	ldr	r3, .L542+20
+	ldr	r3, .L543+20
 	adds	r0, r0, #1
 	str	r0, [r3, #0]
 	cmp	r0, #1
-	bne	.L537
+	bne	.L538
 	movs	r2, #2
 	str	r2, [r3, #0]
-.L537:
+.L538:
 	ldrh	r2, [r6, #14]
 	movs	r7, #0
-	ldr	r3, .L542+36
+	ldr	r3, .L543+36
 	strb	r2, [r3, #0]
-.L534:
+.L535:
 	ldr	r2, [sp, #4]
 	subs	r8, r8, #1
 	add	r4, r4, r2
-	beq	.L538
-.L531:
+	beq	.L539
+.L532:
 	add	fp, r4, #1
 	movs	r6, #0
-	b	.L533
-.L538:
+	b	.L534
+.L539:
 	mov	r0, r8
-.L541:
+.L542:
 	bl	flash_exit_slc_mode
 	mov	r0, r7
 	add	sp, sp, #16
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L543:
+.L544:
 	.align	2
-.L542:
+.L543:
 	.word	.LANCHOR48
 	.word	.LANCHOR43
 	.word	.LANCHOR18
@@ -4176,7 +4197,7 @@ FlashDdrTunningRead:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	mov	sl, r3
-	ldr	r3, .L564
+	ldr	r3, .L565
 	sub	sp, sp, #24
 	mov	fp, r2
 	str	r0, [sp, #8]
@@ -4184,16 +4205,16 @@ FlashDdrTunningRead:
 	str	r1, [sp, #12]
 	ldr	r3, [r3, #304]
 	str	r3, [sp, #20]
-	ldr	r3, .L564+4
+	ldr	r3, .L565+4
 	ldr	r7, [r3, #0]
 	ldr	r3, [sp, #56]
 	cmp	r7, #7
 	ite	hi
 	movhi	r7, #12
 	movls	r7, #6
-	cbz	r3, .L556
+	cbz	r3, .L557
 	movs	r0, #1
-	ldr	r4, .L564+8
+	ldr	r4, .L565+8
 	bl	FlashSetInterfaceMode
 	movs	r0, #1
 	bl	NandcSetMode
@@ -4210,31 +4231,31 @@ FlashDdrTunningRead:
 	ldrb	r0, [r4, #0]	@ zero_extendqisi2
 	bl	NandcSetMode
 	cmp	r8, #-1
-	beq	.L547
+	beq	.L548
 	mov	r2, r8
-	ldr	r0, .L564+12
+	ldr	r0, .L565+12
 	ldr	r1, [sp, #12]
 	bl	printf
-	ldr	r3, .L564+16
+	ldr	r3, .L565+16
 	ldr	r2, [r3, #0]
 	adds	r2, r2, #1
 	str	r2, [r3, #0]
 	cmp	r2, #2048
-	bcc	.L547
+	bcc	.L548
 	movs	r2, #0
 	str	r2, [r3, #0]
 	mov	sl, r2
 	mov	fp, r2
-	b	.L546
-.L556:
+	b	.L547
+.L557:
 	mov	r8, #1024
-.L546:
+.L547:
 	movs	r4, #0
 	mov	r6, #-1
 	mov	ip, r4
 	mov	r5, r4
 	str	r4, [sp, #16]
-.L552:
+.L553:
 	uxtb	r0, r7
 	str	ip, [sp, #4]
 	bl	NandcSetDdrPara
@@ -4246,71 +4267,71 @@ FlashDdrTunningRead:
 	add	r3, r8, #1
 	ldr	ip, [sp, #4]
 	cmp	r0, r3
-	bhi	.L548
+	bhi	.L549
 	cmp	r0, #2
-	bhi	.L558
+	bhi	.L559
 	adds	r5, r5, #1
 	cmp	r5, #9
-	bls	.L558
+	bls	.L559
 	subs	r4, r7, r5
 	mov	r8, r0
 	movs	r6, #0
-	b	.L550
-.L548:
+	b	.L551
+.L549:
 	cmp	ip, r5
-	bcs	.L559
+	bcs	.L560
 	cmp	r5, #7
 	rsb	r3, r5, r4
 	str	r3, [sp, #16]
-	bhi	.L551
+	bhi	.L552
 	mov	ip, r5
-	b	.L559
-.L558:
+	b	.L560
+.L559:
 	movs	r6, #0
 	mov	r4, r7
 	mov	r8, r0
 	mov	sl, r6
 	mov	fp, r6
-	b	.L549
-.L559:
+	b	.L550
+.L560:
 	movs	r5, #0
-.L549:
+.L550:
 	adds	r7, r7, #2
 	cmp	r7, #69
-	bls	.L552
-.L550:
-	cmp	ip, r5
-	bcc	.L553
+	bls	.L553
 .L551:
+	cmp	ip, r5
+	bcc	.L554
+.L552:
 	ldr	r4, [sp, #16]
-.L553:
-	cbz	r4, .L554
-	ldr	r0, .L564+20
+.L554:
+	cbz	r4, .L555
+	ldr	r0, .L565+20
 	mov	r1, r4
 	bl	printf
 	uxtb	r0, r4
 	bl	NandcSetDdrPara
-.L554:
-	cbz	r6, .L547
-	ldr	r0, .L564+24
+.L555:
+	cbz	r6, .L548
+	ldr	r0, .L565+24
 	ldr	r1, [sp, #8]
 	ldr	r2, [sp, #12]
 	bl	printf
 	ldr	r3, [sp, #56]
-	cbz	r3, .L561
+	cbz	r3, .L562
 	ldr	r3, [sp, #20]
 	ubfx	r0, r3, #8, #8
 	bl	NandcSetDdrPara
-	b	.L547
-.L561:
+	b	.L548
+.L562:
 	mov	r8, r6
-.L547:
+.L548:
 	mov	r0, r8
 	add	sp, sp, #24
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L565:
+.L566:
 	.align	2
-.L564:
+.L565:
 	.word	.LANCHOR30
 	.word	.LANCHOR37
 	.word	.LANCHOR34
@@ -4330,7 +4351,7 @@ FlashDdrParaScan:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r6, r0
-	ldr	r5, .L571
+	ldr	r5, .L572
 	movs	r4, #0
 	mov	r7, r1
 	ldrb	r0, [r5, #0]	@ zero_extendqisi2
@@ -4350,29 +4371,29 @@ FlashDdrParaScan:
 	mov	r0, r6
 	bl	FlashReadRawPage
 	adds	r0, r0, #1
-	beq	.L567
+	beq	.L568
 	cmp	r8, #-1
-	bne	.L568
-.L567:
+	bne	.L569
+.L568:
 	ldrb	r3, [r5, #0]	@ zero_extendqisi2
 	lsls	r3, r3, #31
-	bpl	.L568
+	bpl	.L569
 	movs	r0, #1
 	bl	FlashSetInterfaceMode
 	movs	r0, #1
 	bl	NandcSetMode
 	movs	r2, #0
-	b	.L570
-.L568:
+	b	.L571
+.L569:
 	movs	r2, #1
-.L570:
-	ldr	r3, .L571+4
+.L571:
+	ldr	r3, .L572+4
 	movs	r0, #0
 	strb	r2, [r3, #0]
 	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
-.L572:
+.L573:
 	.align	2
-.L571:
+.L572:
 	.word	.LANCHOR34
 	.word	.LANCHOR35
 	.size	FlashDdrParaScan, .-FlashDdrParaScan
@@ -4393,11 +4414,11 @@ FlashReadPage:
 	bl	FlashReadRawPage
 	adds	r3, r0, #1
 	mov	r4, r0
-	bne	.L574
-	ldr	r6, .L579
+	bne	.L575
+	ldr	r6, .L580
 	ldrb	fp, [r6, #0]	@ zero_extendqisi2
 	cmp	fp, #0
-	beq	.L575
+	beq	.L576
 	movs	r3, #0
 	mov	r0, r5
 	strb	r3, [r6, #0]
@@ -4407,12 +4428,12 @@ FlashReadPage:
 	bl	FlashReadRawPage
 	strb	fp, [r6, #0]
 	adds	r6, r0, #1
-	bne	.L578
-.L575:
-	ldr	r3, .L579+4
+	bne	.L579
+.L576:
+	ldr	r3, .L580+4
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L574
-	ldr	r3, .L579+8
+	cbz	r3, .L575
+	ldr	r3, .L580+8
 	mov	r0, r5
 	mov	r1, r7
 	mov	r2, r8
@@ -4424,23 +4445,23 @@ FlashReadPage:
 	bl	FlashDdrTunningRead
 	mov	r4, r0
 	adds	r0, r0, #1
-	beq	.L576
-	ldr	r3, .L579+12
+	beq	.L577
+	ldr	r3, .L580+12
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	cmp	r4, r3, lsr #1
-	bls	.L574
-.L576:
+	bls	.L575
+.L577:
 	ubfx	r0, r6, #8, #8
 	bl	NandcSetDdrPara
-	b	.L574
-.L578:
+	b	.L575
+.L579:
 	mov	r4, r0
-.L574:
-	ldr	fp, .L579+24
+.L575:
+	ldr	fp, .L580+24
 	ldr	r6, [fp, #0]
-	cbz	r6, .L577
+	cbz	r6, .L578
 	adds	r1, r4, #1
-	bne	.L577
+	bne	.L578
 	mov	r1, r7
 	mov	r2, r8
 	mov	r3, sl
@@ -4449,14 +4470,14 @@ FlashReadPage:
 	mov	r2, r5
 	mov	r3, r7
 	mov	r4, r0
-	ldr	r0, .L579+16
+	ldr	r0, .L580+16
 	mov	r1, r4
 	bl	printf
 	adds	r2, r4, #1
-	bne	.L577
-	ldr	r3, .L579+20
+	bne	.L578
+	ldr	r3, .L580+20
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L577
+	cbz	r3, .L578
 	mov	r0, r5
 	bl	flash_enter_slc_mode
 	ldr	r4, [fp, #0]
@@ -4466,12 +4487,14 @@ FlashReadPage:
 	mov	r3, sl
 	blx	r4
 	mov	r4, r0
-.L577:
+	mov	r0, r5
+	bl	flash_exit_slc_mode
+.L578:
 	mov	r0, r4
 	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L580:
+.L581:
 	.align	2
-.L579:
+.L580:
 	.word	.LANCHOR4
 	.word	.LANCHOR35
 	.word	.LANCHOR30
@@ -4492,14 +4515,14 @@ Ftl_log2:
 	@ link register save eliminated.
 	movs	r2, #1
 	movs	r3, #0
-	b	.L582
-.L583:
+	b	.L583
+.L584:
 	adds	r3, r3, #1
 	lsls	r2, r2, #1
 	uxth	r3, r3
-.L582:
+.L583:
 	cmp	r2, r0
-	bls	.L583
+	bls	.L584
 	subs	r3, r3, #1
 	uxth	r0, r3
 	bx	lr
@@ -4526,31 +4549,31 @@ FtlSysBlkNumInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L588
+	ldr	r3, .L589
 	cmp	r0, #23
 	it	ls
 	movls	r0, #24
-	ldr	r2, .L588+4
+	ldr	r2, .L589+4
 	str	r0, [r3, #0]
-	ldr	r3, .L588+8
+	ldr	r3, .L589+8
 	ldrh	r3, [r3, #0]
 	muls	r3, r0, r3
 	str	r3, [r2, #0]
-	ldr	r2, .L588+12
+	ldr	r2, .L589+12
 	ldrh	r2, [r2, #0]
 	subs	r0, r2, r0
-	ldr	r2, .L588+16
+	ldr	r2, .L589+16
 	strh	r0, [r2, #0]	@ movhi
 	movs	r0, #0
-	ldr	r2, .L588+20
+	ldr	r2, .L589+20
 	ldr	r2, [r2, #0]
 	subs	r3, r2, r3
-	ldr	r2, .L588+24
+	ldr	r2, .L589+24
 	str	r3, [r2, #0]
 	bx	lr
-.L589:
+.L590:
 	.align	2
-.L588:
+.L589:
 	.word	.LANCHOR52
 	.word	.LANCHOR54
 	.word	.LANCHOR53
@@ -4559,7 +4582,6 @@ FtlSysBlkNumInit:
 	.word	.LANCHOR58
 	.word	.LANCHOR57
 	.size	FtlSysBlkNumInit, .-FtlSysBlkNumInit
-	.global	__aeabi_idiv
 	.section	.text.FtlConstantsInit,"ax",%progbits
 	.align	1
 	.global	FtlConstantsInit
@@ -4573,29 +4595,29 @@ FtlConstantsInit:
 	mov	r4, r0
 	ldrh	r7, [r0, #8]
 	sub	sp, sp, #32
-	ldr	r3, .L605
+	ldr	r3, .L607
 	ldrh	r1, [r0, #10]
 	ldrh	r0, [r0, #12]
 	strh	r7, [r3, #0]	@ movhi
-	ldr	r3, .L605+4
+	ldr	r3, .L607+4
 	ldrh	ip, [r4, #14]
-	ldr	r2, .L605+8
+	ldr	r2, .L607+8
 	strh	r1, [r3, #0]	@ movhi
-	ldr	r3, .L605+12
+	ldr	r3, .L607+12
 	strh	r0, [r3, #0]	@ movhi
-	ldr	r3, .L605+16
+	ldr	r3, .L607+16
 	strh	ip, [r3, #0]	@ movhi
 	movs	r3, #0
-.L591:
+.L592:
 	strb	r3, [r3, r2]
 	adds	r3, r3, #1
 	cmp	r3, #32
-	bne	.L591
+	bne	.L592
 	ldrh	r2, [r4, #14]
 	ldrh	r3, [r4, #20]
 	cmp	r3, r2, lsr #8
-	bcs	.L592
-	ldr	r3, .L605+8
+	bcs	.L593
+	ldr	r3, .L607+8
 	uxtb	sl, r0
 	movs	r2, #0
 	subs	r6, r3, r0
@@ -4607,8 +4629,8 @@ FtlConstantsInit:
 	rsb	r5, r8, #0
 	uxtb	r5, r5
 	str	r6, [sp, #28]
-	b	.L593
-.L594:
+	b	.L594
+.L595:
 	ldr	r2, [sp, #12]
 	add	fp, r6, r5
 	add	lr, lr, #1
@@ -4617,8 +4639,8 @@ FtlConstantsInit:
 	add	fp, r6, r2
 	ldr	r2, [sp, #16]
 	strb	fp, [r2, r3]
-	b	.L595
-.L603:
+	b	.L596
+.L605:
 	ldr	fp, [sp, #24]
 	movs	r3, #0
 	mov	r6, r3
@@ -4631,77 +4653,77 @@ FtlConstantsInit:
 	str	fp, [sp, #16]
 	add	fp, r5, sl
 	str	fp, [sp, #20]
-.L595:
+.L596:
 	add	r6, r6, r8
 	cmp	lr, r1
 	add	r3, r3, r0
 	uxtb	r6, r6
-	bcc	.L594
+	bcc	.L595
 	ldr	r2, [sp, #4]
 	adds	r5, r5, #1
 	adds	r2, r2, #1
 	uxtb	r5, r5
-.L593:
+.L594:
 	cmp	r2, r0
-	bcc	.L603
-	ldr	r3, .L605+4
+	bcc	.L605
+	ldr	r3, .L607+4
 	lsls	r1, r1, #1
 	lsr	ip, ip, #1
 	strh	r1, [r3, #0]	@ movhi
-	ldr	r3, .L605+16
+	ldr	r3, .L607+16
 	strh	ip, [r3, #0]	@ movhi
-.L592:
-	ldr	r3, .L605+20
+.L593:
+	ldr	r3, .L607+20
 	movs	r2, #5
 	movs	r1, #0
 	cmp	r7, #1
 	strh	r2, [r3, #0]	@ movhi
-	ldr	r2, .L605+24
+	ldr	r2, .L607+24
 	it	eq
 	strheq	r7, [r3, #0]	@ movhi
-	ldr	r3, .L605+28
+	ldr	r3, .L607+28
 	strh	r1, [r2, #0]	@ movhi
 	mov	r2, #4352
 	strh	r2, [r3, #0]	@ movhi
-	ldr	r2, .L605+32
+	ldr	r2, .L607+32
 	ldrb	r8, [r2, #0]	@ zero_extendqisi2
 	cmp	r8, #0
-	beq	.L597
+	beq	.L598
 	mov	r2, #384
 	strh	r2, [r3, #0]	@ movhi
-.L597:
-	ldr	r3, .L605+4
+.L598:
+	ldr	r3, .L607+4
 	ldrh	r5, [r3, #0]
 	muls	r5, r0, r5
-	ldr	r3, .L605+36
+	ldr	r3, .L607+36
 	uxth	r5, r5
 	strh	r5, [r3, #0]	@ movhi
-	ldr	r3, .L605+16
+	ldr	r3, .L607+16
 	ldrh	r6, [r3, #0]
 	muls	r0, r6, r0
-	ldr	r3, .L605+40
+	ldr	r3, .L607+40
 	uxth	r0, r0
 	strh	r0, [r3, #0]	@ movhi
 	bl	Ftl_log2
-	ldr	r3, .L605+44
+	ldr	r3, .L607+44
 	ldrh	fp, [r4, #16]
 	ldrh	r1, [r4, #18]
 	ldrh	sl, [r4, #20]
 	mul	r2, fp, r5
 	strh	r0, [r3, #0]	@ movhi
 	mov	r0, sl
-	ldr	r3, .L605+48
+	ldr	r3, .L607+48
 	strh	fp, [r3, #0]	@ movhi
-	ldr	r3, .L605+52
+	ldr	r3, .L607+52
 	strh	r1, [r3, #0]	@ movhi
-	ldr	r3, .L605+56
+	ldr	r3, .L607+56
 	strh	r2, [r3, #0]	@ movhi
-	ldr	r3, .L605+60
+	ldr	r3, .L607+60
 	strh	sl, [r3, #0]	@ movhi
 	str	r1, [sp, #8]
 	bl	Ftl_log2
-	ldr	r3, .L605+64
-	ldr	r2, .L605+68
+	ldr	r3, .L607+64
+	ldr	r2, .L607+68
 	ldr	r1, [sp, #8]
 	mul	r1, r1, sl
 	strh	r0, [r3, #0]	@ movhi
@@ -4709,26 +4731,26 @@ FtlConstantsInit:
 	mov	r7, r0
 	uxth	r3, r3
 	strh	r3, [r2, #0]	@ movhi
-	ldr	r2, .L605+72
+	ldr	r2, .L607+72
 	lsrs	r3, r3, #8
 	cmp	r6, #1024
 	strh	r3, [r2, #0]	@ movhi
 	ldrh	r2, [r4, #26]
-	ldr	r3, .L605+76
-	ldr	r4, .L605+28
+	ldr	r3, .L607+76
+	ldr	r4, .L607+28
 	strh	r2, [r3, #0]	@ movhi
 	mul	r2, r6, r5
-	ldr	r3, .L605+80
+	ldr	r3, .L607+80
 	ldrh	r0, [r4, #0]
 	str	r2, [r3, #0]
 	it	hi
 	uxtbhi	r2, r6
-	ldr	r3, .L605+24
+	ldr	r3, .L607+24
 	it	hi
 	strhhi	r2, [r3, #0]	@ movhi
 	lsls	r0, r0, #3
 	ldrh	r2, [r3, #0]
-	ldr	r3, .L605+84
+	ldr	r3, .L607+84
 	subs	r2, r6, r2
 	muls	r2, r5, r2
 	mul	r2, sl, r2
@@ -4736,92 +4758,109 @@ FtlConstantsInit:
 	asr	r2, fp, #11
 	str	r2, [r3, #0]
 	bl	__aeabi_idiv
-	ldr	r3, .L605+88
+	ldr	r3, .L607+88
 	uxth	r0, r0
 	strh	r0, [r3, #0]	@ movhi
 	cmp	r0, #4
-	bhi	.L599
+	bhi	.L600
 	movs	r2, #4
 	strh	r2, [r3, #0]	@ movhi
-.L599:
+.L600:
 	cmp	r8, #0
-	beq	.L600
+	beq	.L601
 	mov	r3, #640
 	strh	r3, [r4, #0]	@ movhi
-.L600:
+.L601:
 	ldrh	r2, [r4, #0]
 	lsls	r6, r6, #6
-	ldr	r3, .L605+92
+	ldr	r3, .L607+92
 	mov	r1, r5
-	ldr	r4, .L605+96
+	ldr	r4, .L607+96
 	asr	r2, r2, r7
 	adds	r7, r7, #9
 	asr	r6, r6, r7
 	adds	r2, r2, #2
 	strh	r2, [r3, #0]	@ movhi
 	uxth	r6, r6
-	ldr	r3, .L605+100
+	ldr	r3, .L607+100
 	mul	r2, r5, r6
 	strh	r6, [r3, #0]	@ movhi
-	ldr	r3, .L605+104
+	ldr	r3, .L607+104
 	adds	r6, r6, #8
 	str	r2, [r3, #0]
-	ldr	r3, .L605+88
+	ldr	r3, .L607+88
 	ldrh	r0, [r3, #0]
 	bl	__aeabi_uidiv
 	cmp	r5, #1
 	uxtah	r6, r6, r0
 	str	r6, [r4, #0]
-	bne	.L601
+	bne	.L602
 	adds	r6, r6, #4
 	str	r6, [r4, #0]
-.L601:
+.L602:
 	ldrh	r0, [r4, #0]
 	bl	FtlSysBlkNumInit
 	ldr	r2, [r4, #0]
-	ldr	r3, .L605+108
+	ldr	r3, .L607+108
 	str	r2, [r3, #0]
-	ldr	r3, .L605+112
-	ldr	r2, [r3, #0]
-	ldr	r3, .L605+48
-	lsls	r2, r2, #2
+	movs	r2, #24
+	ldr	r3, .L607+112
+	ldr	r1, [r3, #0]
+	ldr	r3, .L607+48
+	lsls	r1, r1, #2
 	ldrh	r3, [r3, #0]
-	muls	r2, r3, r2
-	ldr	r3, .L605+64
+	muls	r1, r3, r1
+	ldr	r3, .L607+64
 	ldrh	r3, [r3, #0]
 	adds	r3, r3, #9
-	lsr	r2, r2, r3
-	ldr	r3, .L605+116
-	adds	r2, r2, #2
-	strh	r2, [r3, #0]	@ movhi
-	movs	r2, #24
-	ldr	r3, .L605+120
+	lsr	r1, r1, r3
+	ldr	r3, .L607+116
+	adds	r1, r1, #2
+	uxth	r1, r1
+	strh	r1, [r3, #0]	@ movhi
+	ldr	r3, .L607+120
 	strh	r2, [r3, #0]	@ movhi
 	movs	r2, #0
-	ldr	r3, .L605+124
+	ldr	r3, .L607+124
 	str	r2, [r3, #0]
-	ldr	r2, .L605+88
-	ldrh	r0, [r2, #0]
-	adds	r3, r0, #3
+	ldr	r2, .L607+88
+	ldrh	r4, [r2, #0]
+	adds	r3, r4, #3
 	strh	r3, [r2, #0]	@ movhi
-	ldr	r3, .L605+104
-	ldr	r1, [r3, #0]
-	adds	r4, r1, #3
-	str	r4, [r3, #0]
-	ldr	r4, .L605+128
-	ldrb	r4, [r4, #0]	@ zero_extendqisi2
-	cbz	r4, .L602
-	adds	r0, r0, #4
-	adds	r1, r1, #5
-	strh	r0, [r2, #0]	@ movhi
-	str	r1, [r3, #0]
-.L602:
+	ldr	r3, .L607+104
+	ldr	r0, [r3, #0]
+	adds	r5, r0, #3
+	str	r5, [r3, #0]
+	ldr	r5, .L607+128
+	ldrb	r5, [r5, #0]	@ zero_extendqisi2
+	cbz	r5, .L603
+	adds	r4, r4, #4
+	adds	r0, r0, #5
+	strh	r4, [r2, #0]	@ movhi
+	str	r0, [r3, #0]
+.L603:
+	ldr	r3, .L607+132
+	movs	r2, #0
+	strh	r2, [r3, #0]	@ movhi
+	ldr	r2, .L607+136
+	ldrh	r2, [r2, #0]
+	lsrs	r0, r2, #3
+	add	r2, r0, r2, lsl #1
+	adds	r2, r2, #52
+	add	r1, r2, r1, lsl #2
+	ldr	r2, .L607+60
+	ldrh	r2, [r2, #0]
+	cmp	r1, r2, lsl #9
+	bcs	.L604
+	movs	r2, #1
+	strh	r2, [r3, #0]	@ movhi
+.L604:
 	movs	r0, #0
 	add	sp, sp, #32
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L606:
+.L608:
 	.align	2
-.L605:
+.L607:
 	.word	.LANCHOR59
 	.word	.LANCHOR60
 	.word	.LANCHOR62
@@ -4855,6 +4894,8 @@ FtlConstantsInit:
 	.word	.LANCHOR83
 	.word	.LANCHOR84
 	.word	.LANCHOR7
+	.word	.LANCHOR85
+	.word	.LANCHOR55
 	.size	FtlConstantsInit, .-FtlConstantsInit
 	.section	.text.IsBlkInVendorPart,"ax",%progbits
 	.align	1
@@ -4865,39 +4906,39 @@ FtlConstantsInit:
 IsBlkInVendorPart:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L614
+	ldr	r3, .L616
 	push	{r4, lr}
 	ldrh	r3, [r3, #0]
-	cbz	r3, .L612
-	ldr	r3, .L614+4
+	cbz	r3, .L614
+	ldr	r3, .L616+4
 	ldrh	r1, [r3, #0]
-	ldr	r3, .L614+8
+	ldr	r3, .L616+8
 	ldr	r2, [r3, #0]
 	movs	r3, #0
-	b	.L609
-.L611:
+	b	.L611
+.L613:
 	ldrh	r4, [r2], #2
 	cmp	r4, r0
-	beq	.L613
+	beq	.L615
 	adds	r3, r3, #1
 	uxth	r3, r3
-.L609:
+.L611:
 	cmp	r3, r1
-	bne	.L611
+	bne	.L613
 	movs	r0, #0
 	pop	{r4, pc}
-.L613:
+.L615:
 	movs	r0, #1
 	pop	{r4, pc}
-.L612:
+.L614:
 	mov	r0, r3
 	pop	{r4, pc}
-.L615:
+.L617:
 	.align	2
-.L614:
-	.word	.LANCHOR85
-	.word	.LANCHOR77
+.L616:
 	.word	.LANCHOR86
+	.word	.LANCHOR77
+	.word	.LANCHOR87
 	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
 	.section	.text.FtlGetCap,"ax",%progbits
 	.align	1
@@ -4909,12 +4950,12 @@ FtlGetCap:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L617
+	ldr	r3, .L619
 	ldr	r0, [r3, #0]
 	bx	lr
-.L618:
+.L620:
 	.align	2
-.L617:
+.L619:
 	.word	.LANCHOR84
 	.size	FtlGetCap, .-FtlGetCap
 	.section	.text.FtlGetCapacity,"ax",%progbits
@@ -4927,12 +4968,12 @@ FtlGetCapacity:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L620
+	ldr	r3, .L622
 	ldr	r0, [r3, #0]
 	bx	lr
-.L621:
+.L623:
 	.align	2
-.L620:
+.L622:
 	.word	.LANCHOR84
 	.size	FtlGetCapacity, .-FtlGetCapacity
 	.section	.text.ftl_get_density,"ax",%progbits
@@ -4945,12 +4986,12 @@ ftl_get_density:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L623
+	ldr	r3, .L625
 	ldr	r0, [r3, #0]
 	bx	lr
-.L624:
+.L626:
 	.align	2
-.L623:
+.L625:
 	.word	.LANCHOR84
 	.size	ftl_get_density, .-ftl_get_density
 	.section	.text.FtlGetLpn,"ax",%progbits
@@ -4963,13 +5004,13 @@ FtlGetLpn:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L626
+	ldr	r3, .L628
 	ldr	r0, [r3, #0]
 	bx	lr
-.L627:
+.L629:
 	.align	2
-.L626:
-	.word	.LANCHOR87
+.L628:
+	.word	.LANCHOR88
 	.size	FtlGetLpn, .-FtlGetLpn
 	.section	.text.FtlGetCurEraseBlock,"ax",%progbits
 	.align	1
@@ -4981,16 +5022,16 @@ FtlGetCurEraseBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L629
-	ldr	r3, .L629+4
+	ldr	r2, .L631
+	ldr	r3, .L631+4
 	ldr	r0, [r2, #0]
 	ldrh	r3, [r3, #0]
 	muls	r0, r3, r0
 	bx	lr
-.L630:
+.L632:
 	.align	2
-.L629:
-	.word	.LANCHOR88
+.L631:
+	.word	.LANCHOR89
 	.word	.LANCHOR53
 	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
 	.section	.text.FtlGetAllBlockNum,"ax",%progbits
@@ -5003,15 +5044,15 @@ FtlGetAllBlockNum:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L632
-	ldr	r3, .L632+4
+	ldr	r2, .L634
+	ldr	r3, .L634+4
 	ldrh	r0, [r2, #0]
 	ldrh	r3, [r3, #0]
 	muls	r0, r3, r0
 	bx	lr
-.L633:
+.L635:
 	.align	2
-.L632:
+.L634:
 	.word	.LANCHOR53
 	.word	.LANCHOR56
 	.size	FtlGetAllBlockNum, .-FtlGetAllBlockNum
@@ -5024,7 +5065,7 @@ FtlGetAllBlockNum:
 FtlBbmMapBadBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L635
+	ldr	r3, .L637
 	push	{r0, r1, r2, r4, r5, r6, r7, lr}
 	mov	r5, r0
 	ldrh	r4, [r3, #0]
@@ -5033,7 +5074,7 @@ FtlBbmMapBadBlock:
 	bl	__aeabi_uidiv
 	uxth	r2, r0
 	mls	r3, r4, r2, r5
-	ldr	r4, .L635+4
+	ldr	r4, .L637+4
 	add	r1, r4, r2, lsl #2
 	ldr	r0, [r1, #28]
 	uxth	r3, r3
@@ -5045,18 +5086,18 @@ FtlBbmMapBadBlock:
 	str	r1, [r0, r6, lsl #2]
 	str	r1, [sp, #0]
 	mov	r1, r5
-	ldr	r0, .L635+8
+	ldr	r0, .L637+8
 	bl	printf
 	ldrh	r3, [r4, #6]
 	movs	r0, #0
 	adds	r3, r3, #1
 	strh	r3, [r4, #6]	@ movhi
 	pop	{r1, r2, r3, r4, r5, r6, r7, pc}
-.L636:
+.L638:
 	.align	2
-.L635:
+.L637:
 	.word	.LANCHOR66
-	.word	.LANCHOR89
+	.word	.LANCHOR90
 	.word	.LC8
 	.size	FtlBbmMapBadBlock, .-FtlBbmMapBadBlock
 	.global	__aeabi_uidivmod
@@ -5069,7 +5110,7 @@ FtlBbmMapBadBlock:
 FtlBbmIsBadBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L638
+	ldr	r3, .L640
 	push	{r4, r5, r6, lr}
 	mov	r6, r0
 	ldrh	r5, [r3, #0]
@@ -5079,7 +5120,7 @@ FtlBbmIsBadBlock:
 	uxth	r4, r1
 	mov	r1, r5
 	bl	__aeabi_uidiv
-	ldr	r3, .L638+4
+	ldr	r3, .L640+4
 	lsrs	r2, r4, #5
 	and	r4, r4, #31
 	uxth	r0, r0
@@ -5089,11 +5130,11 @@ FtlBbmIsBadBlock:
 	lsr	r0, r0, r4
 	and	r0, r0, #1
 	pop	{r4, r5, r6, pc}
-.L639:
+.L641:
 	.align	2
-.L638:
+.L640:
 	.word	.LANCHOR66
-	.word	.LANCHOR89
+	.word	.LANCHOR90
 	.size	FtlBbmIsBadBlock, .-FtlBbmIsBadBlock
 	.section	.text.FtlBbtInfoPrint,"ax",%progbits
 	.align	1
@@ -5116,33 +5157,33 @@ FtlBbtInfoPrint:
 FtlBbt2Bitmap:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L646
+	ldr	r3, .L648
 	push	{r4, r5, r6, r7, r8, lr}
 	mov	r6, r0
 	ldrh	r2, [r3, #0]
 	mov	r0, r1
 	mov	r5, r1
 	movs	r1, #0
-	ldr	r7, .L646+4
+	ldr	r7, .L648+4
 	movs	r4, #0
 	lsls	r2, r2, #2
 	movw	r8, #65535
 	bl	memset
-.L644:
+.L646:
 	ldrh	r3, [r6, r4]
 	cmp	r3, r8
-	beq	.L641
+	beq	.L643
 	ldrh	r2, [r7, #0]
 	cmp	r2, r3
-	bhi	.L643
-	ldr	r1, .L646+8
+	bhi	.L645
+	ldr	r1, .L648+8
 	movs	r2, #79
-	ldr	r0, .L646+12
+	ldr	r0, .L648+12
 	bl	printf
-	ldr	r0, .L646+16
-	ldr	r1, .L646+20
+	ldr	r0, .L648+16
+	ldr	r1, .L648+20
 	bl	printf
-.L643:
+.L645:
 	ldrh	r2, [r6, r4]
 	movs	r1, #1
 	adds	r4, r4, #2
@@ -5153,15 +5194,15 @@ FtlBbt2Bitmap:
 	ldr	r1, [r5, r3, lsl #2]
 	orr	r2, r1, r2
 	str	r2, [r5, r3, lsl #2]
-	bne	.L644
-.L641:
+	bne	.L646
+.L643:
 	pop	{r4, r5, r6, r7, r8, pc}
-.L647:
+.L649:
 	.align	2
-.L646:
-	.word	.LANCHOR90
-	.word	.LANCHOR66
+.L648:
 	.word	.LANCHOR91
+	.word	.LANCHOR66
+	.word	.LANCHOR92
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
@@ -5176,7 +5217,7 @@ FtlBbtMemInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r0, .L649
+	ldr	r0, .L651
 	movw	r3, #65535
 	movs	r1, #255
 	movs	r2, #16
@@ -5185,10 +5226,10 @@ FtlBbtMemInit:
 	strh	r3, [r0, #6]	@ movhi
 	adds	r0, r0, #12
 	b	memset
-.L650:
+.L652:
 	.align	2
-.L649:
-	.word	.LANCHOR89
+.L651:
+	.word	.LANCHOR90
 	.size	FtlBbtMemInit, .-FtlBbtMemInit
 	.section	.text.V2P_block,"ax",%progbits
 	.align	1
@@ -5201,13 +5242,13 @@ V2P_block:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r7, r1
-	ldr	r3, .L652
+	ldr	r3, .L654
 	mov	r6, r0
 	ldrh	r4, [r3, #0]
 	muls	r7, r4, r7
 	mov	r1, r4
 	bl	__aeabi_uidiv
-	ldr	r3, .L652+4
+	ldr	r3, .L654+4
 	mov	r1, r4
 	ldrh	r5, [r3, #0]
 	mla	r5, r0, r5, r7
@@ -5216,9 +5257,9 @@ V2P_block:
 	adds	r1, r5, r1
 	uxth	r0, r1
 	pop	{r3, r4, r5, r6, r7, pc}
-.L653:
+.L655:
 	.align	2
-.L652:
+.L654:
 	.word	.LANCHOR61
 	.word	.LANCHOR66
 	.size	V2P_block, .-V2P_block
@@ -5231,11 +5272,11 @@ V2P_block:
 P2V_plane:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L655
+	ldr	r3, .L657
 	push	{r4, r5, r6, lr}
 	mov	r6, r0
 	ldrh	r4, [r3, #0]
-	ldr	r3, .L655+4
+	ldr	r3, .L657+4
 	ldrh	r1, [r3, #0]
 	bl	__aeabi_uidiv
 	mov	r1, r4
@@ -5245,9 +5286,9 @@ P2V_plane:
 	adds	r1, r5, r1
 	uxth	r0, r1
 	pop	{r4, r5, r6, pc}
-.L656:
+.L658:
 	.align	2
-.L655:
+.L657:
 	.word	.LANCHOR61
 	.word	.LANCHOR66
 	.size	P2V_plane, .-P2V_plane
@@ -5261,18 +5302,18 @@ P2V_block_in_plane:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L658
+	ldr	r3, .L660
 	ldrh	r1, [r3, #0]
 	bl	__aeabi_uidivmod
-	ldr	r3, .L658+4
+	ldr	r3, .L660+4
 	uxth	r0, r1
 	ldrh	r1, [r3, #0]
 	bl	__aeabi_uidiv
 	uxth	r0, r0
 	pop	{r3, pc}
-.L659:
+.L661:
 	.align	2
-.L658:
+.L660:
 	.word	.LANCHOR66
 	.word	.LANCHOR61
 	.size	P2V_block_in_plane, .-P2V_block_in_plane
@@ -5287,14 +5328,14 @@ ftl_cmp_data_ver:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	cmp	r0, r1
-	bls	.L661
+	bls	.L663
 	subs	r0, r0, r1
 	cmp	r0, #-2147483648
 	ite	hi
 	movhi	r0, #0
 	movls	r0, #1
 	bx	lr
-.L661:
+.L663:
 	subs	r0, r1, r0
 	cmp	r0, #-2147483648
 	ite	ls
@@ -5311,7 +5352,7 @@ ftl_cmp_data_ver:
 FtlFreeSysBlkQueueInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L664
+	ldr	r3, .L666
 	mov	r2, #2048
 	push	{r4, lr}
 	movs	r4, #0
@@ -5324,10 +5365,10 @@ FtlFreeSysBlkQueueInit:
 	bl	memset
 	mov	r0, r4
 	pop	{r4, pc}
-.L665:
+.L667:
 	.align	2
-.L664:
-	.word	.LANCHOR92
+.L666:
+	.word	.LANCHOR93
 	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
 	.section	.text.FtlFreeSysBlkQueueEmpty,"ax",%progbits
 	.align	1
@@ -5339,16 +5380,16 @@ FtlFreeSysBlkQueueEmpty:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L667
+	ldr	r3, .L669
 	ldrh	r0, [r3, #6]
 	rsbs	r0, r0, #1
 	it	cc
 	movcc	r0, #0
 	bx	lr
-.L668:
+.L670:
 	.align	2
-.L667:
-	.word	.LANCHOR92
+.L669:
+	.word	.LANCHOR93
 	.size	FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty
 	.section	.text.FtlFreeSysBlkQueueFull,"ax",%progbits
 	.align	1
@@ -5360,16 +5401,16 @@ FtlFreeSysBlkQueueFull:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L670
+	ldr	r3, .L672
 	ldrh	r0, [r3, #6]
 	sub	r2, r0, #1024
 	rsbs	r0, r2, #0
 	adc	r0, r0, r2
 	bx	lr
-.L671:
+.L673:
 	.align	2
-.L670:
-	.word	.LANCHOR92
+.L672:
+	.word	.LANCHOR93
 	.size	FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull
 	.section	.text.FtlFreeSysBlkQueueIn,"ax",%progbits
 	.align	1
@@ -5382,13 +5423,16 @@ FtlFreeSysBlkQueueIn:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	mov	r4, r0
-	ldr	r3, .L675
+	ldr	r3, .L677
 	ldrh	r3, [r3, #6]
 	cmp	r3, #1024
-	beq	.L672
-	cbz	r1, .L674
+	beq	.L674
+	cbz	r1, .L676
+	ldr	r3, .L677+4
+	ldr	r3, [r3, #0]
+	cbnz	r3, .L676
 	bl	P2V_block_in_plane
-	ldr	r3, .L675+4
+	ldr	r3, .L677+8
 	movs	r1, #1
 	mov	r2, r1
 	mov	r5, r0
@@ -5396,17 +5440,17 @@ FtlFreeSysBlkQueueIn:
 	lsls	r3, r4, #10
 	str	r3, [r0, #4]
 	bl	FlashEraseBlocks
-	ldr	r3, .L675+8
+	ldr	r3, .L677+12
 	ldr	r3, [r3, #0]
 	ldrh	r2, [r3, r5, lsl #1]
 	adds	r2, r2, #1
 	strh	r2, [r3, r5, lsl #1]	@ movhi
-	ldr	r3, .L675+12
+	ldr	r3, .L677+16
 	ldr	r2, [r3, #0]
 	adds	r2, r2, #1
 	str	r2, [r3, #0]
-.L674:
-	ldr	r3, .L675
+.L676:
+	ldr	r3, .L677
 	ldrh	r2, [r3, #6]
 	adds	r2, r2, #1
 	strh	r2, [r3, #6]	@ movhi
@@ -5416,15 +5460,16 @@ FtlFreeSysBlkQueueIn:
 	bic	r2, r2, #64512
 	strh	r2, [r3, #4]	@ movhi
 	strh	r4, [r3, r1, lsl #1]	@ movhi
-.L672:
+.L674:
 	pop	{r3, r4, r5, pc}
-.L676:
+.L678:
 	.align	2
-.L675:
-	.word	.LANCHOR92
+.L677:
 	.word	.LANCHOR93
 	.word	.LANCHOR94
 	.word	.LANCHOR95
+	.word	.LANCHOR96
+	.word	.LANCHOR97
 	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
 	.section	.text.FtlFreeSysBLkSort,"ax",%progbits
 	.align	1
@@ -5437,11 +5482,11 @@ FtlFreeSysBLkSort:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, sl, lr}
 	movs	r4, #0
-	ldr	r5, .L687
-	ldr	r7, .L687+4
-	ldr	r6, .L687+8
-	b	.L678
-.L679:
+	ldr	r5, .L689
+	ldr	r7, .L689+4
+	ldr	r6, .L689+8
+	b	.L680
+.L681:
 	add	r8, r4, r8
 	add	r8, r8, #4
 	ldrh	r0, [r5, r8, lsl #1]
@@ -5452,24 +5497,24 @@ FtlFreeSysBLkSort:
 	str	r2, [r3, r4, lsl #2]
 	adds	r4, r4, #1
 	uxth	r4, r4
-.L678:
+.L680:
 	ldrh	ip, [r5, #6]
 	ldrh	r8, [r5, #2]
 	cmp	r4, ip
-	bcc	.L679
-	ldr	r3, .L687+4
+	bcc	.L681
+	ldr	r3, .L689+4
 	add	r6, ip, #-1
-	ldr	r4, .L687
+	ldr	r4, .L689
 	ldr	r1, [r3, #0]
 	movs	r3, #0
-	b	.L680
-.L685:
+	b	.L682
+.L687:
 	adds	r5, r3, #1
 	mov	r2, r3
 	uxth	r5, r5
 	mov	r0, r5
-	b	.L681
-.L683:
+	b	.L683
+.L685:
 	ldr	r7, [r1, r0, lsl #2]
 	ldr	sl, [r1, r2, lsl #2]
 	cmp	sl, r7
@@ -5477,11 +5522,11 @@ FtlFreeSysBLkSort:
 	movhi	r2, r0
 	adds	r0, r0, #1
 	uxth	r0, r0
-.L681:
+.L683:
 	cmp	r0, ip
-	bcc	.L683
+	bcc	.L685
 	cmp	r3, r2
-	beq	.L684
+	beq	.L686
 	ldr	r0, [r1, r2, lsl #2]
 	ldr	r7, [r1, r3, lsl #2]
 	str	r7, [r1, r2, lsl #2]
@@ -5494,58 +5539,75 @@ FtlFreeSysBLkSort:
 	ldrh	r7, [r4, r3, lsl #1]
 	strh	r7, [r4, r2, lsl #1]	@ movhi
 	strh	r0, [r4, r3, lsl #1]	@ movhi
-.L684:
+.L686:
 	mov	r3, r5
-.L680:
+.L682:
 	cmp	r3, r6
-	blt	.L685
+	blt	.L687
 	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
-.L688:
+.L690:
 	.align	2
-.L687:
-	.word	.LANCHOR92
+.L689:
+	.word	.LANCHOR93
+	.word	.LANCHOR98
 	.word	.LANCHOR96
-	.word	.LANCHOR94
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
-	.section	.text.IsInFreeQueue,"ax",%progbits
+	.section	.text.remove_from_free_sys_Queue,"ax",%progbits
 	.align	1
-	.global	IsInFreeQueue
+	.global	remove_from_free_sys_Queue
 	.thumb
 	.thumb_func
-	.type	IsInFreeQueue, %function
-IsInFreeQueue:
+	.type	remove_from_free_sys_Queue, %function
+remove_from_free_sys_Queue:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L695
-	push	{r4, r5, lr}
-	ldrh	r1, [r2, #6]
-	cmp	r1, #1024
-	beq	.L693
-	ldrh	r4, [r2, #2]
-	movs	r3, #0
-	b	.L691
-.L692:
-	adds	r5, r3, r4
-	lsls	r5, r5, #22
-	add	r5, r2, r5, lsr #21
-	ldrh	r5, [r5, #8]
-	cmp	r5, r0
-	beq	.L694
-	adds	r3, r3, #1
-.L691:
-	cmp	r3, r1
-	bcc	.L692
-.L693:
-	movs	r0, #0
-	pop	{r4, r5, pc}
-.L694:
+	ldr	r3, .L697
+	mov	r1, r0
+	push	{r4, r5, r6, lr}
+	ldrh	r0, [r3, #6]
+	cbz	r0, .L692
+	ldrh	r2, [r3, #2]
+	movs	r5, #0
+	b	.L693
+.L695:
+	adds	r6, r5, r2
+	ldr	r4, .L697
+	lsls	r6, r6, #22
+	add	r6, r3, r6, lsr #21
+	ldrh	r6, [r6, #8]
+	cmp	r6, r1
+	bne	.L694
+	ldr	r0, .L697+4
+	bl	printf
+	ldrh	r3, [r4, #2]
 	movs	r0, #1
-	pop	{r4, r5, pc}
-.L696:
+	adds	r5, r5, r3
+	adds	r2, r3, #4
+	adds	r3, r3, #1
+	lsls	r5, r5, #22
+	ldrh	r2, [r4, r2, lsl #1]
+	bic	r3, r3, #64512
+	strh	r3, [r4, #2]	@ movhi
+	add	r5, r4, r5, lsr #21
+	ldrh	r3, [r4, #6]
+	strh	r2, [r5, #8]	@ movhi
+	subs	r3, r3, #1
+	strh	r3, [r4, #6]	@ movhi
+	pop	{r4, r5, r6, pc}
+.L694:
+	adds	r5, r5, #1
+.L693:
+	cmp	r5, r0
+	bcc	.L695
+	movs	r0, #0
+.L692:
+	pop	{r4, r5, r6, pc}
+.L698:
 	.align	2
-.L695:
-	.word	.LANCHOR92
-	.size	IsInFreeQueue, .-IsInFreeQueue
+.L697:
+	.word	.LANCHOR93
+	.word	.LC12
+	.size	remove_from_free_sys_Queue, .-remove_from_free_sys_Queue
 	.section	.text.FtlFreeSysBlkQueueOut,"ax",%progbits
 	.align	1
 	.global	FtlFreeSysBlkQueueOut
@@ -5555,10 +5617,11 @@ IsInFreeQueue:
 FtlFreeSysBlkQueueOut:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	ldr	r3, .L700
+	push	{r3, r4, r5, r6, r7, lr}
+	ldr	r3, .L703
 	ldrh	r1, [r3, #6]
-	cbz	r1, .L699
+	cmp	r1, #0
+	beq	.L702
 	ldrh	r2, [r3, #2]
 	subs	r1, r1, #1
 	strh	r1, [r3, #6]	@ movhi
@@ -5567,42 +5630,51 @@ FtlFreeSysBlkQueueOut:
 	bic	r2, r2, #64512
 	strh	r2, [r3, #2]	@ movhi
 	ldrh	r4, [r3, r0, lsl #1]
-	ldr	r3, .L700+4
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L698
+	ldr	r3, .L703+4
+	ldr	r7, [r3, #0]
+	cbnz	r7, .L700
 	mov	r0, r4
+	ldr	r6, .L703+8
 	bl	P2V_block_in_plane
-	ldr	r3, .L700+8
-	movs	r1, #1
-	mov	r2, r1
-	mov	r5, r0
-	ldr	r0, [r3, #0]
 	lsls	r3, r4, #10
+	mov	r5, r0
+	ldr	r0, [r6, #0]
 	str	r3, [r0, #4]
+	ldr	r3, .L703+12
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L701
+	mov	r1, r7
+	movs	r2, #1
+	bl	FlashEraseBlocks
+.L701:
+	movs	r1, #1
+	ldr	r0, [r6, #0]
+	mov	r2, r1
 	bl	FlashEraseBlocks
-	ldr	r3, .L700+12
+	ldr	r3, .L703+16
 	ldr	r3, [r3, #0]
 	ldrh	r2, [r3, r5, lsl #1]
 	adds	r2, r2, #1
 	strh	r2, [r3, r5, lsl #1]	@ movhi
-	ldr	r3, .L700+16
+	ldr	r3, .L703+20
 	ldr	r2, [r3, #0]
 	adds	r2, r2, #1
 	str	r2, [r3, #0]
-	b	.L698
-.L699:
+	b	.L700
+.L702:
 	movw	r4, #65535
-.L698:
+.L700:
 	mov	r0, r4
-	pop	{r3, r4, r5, pc}
-.L701:
+	pop	{r3, r4, r5, r6, r7, pc}
+.L704:
 	.align	2
-.L700:
-	.word	.LANCHOR92
-	.word	.LANCHOR7
+.L703:
 	.word	.LANCHOR93
 	.word	.LANCHOR94
 	.word	.LANCHOR95
+	.word	.LANCHOR7
+	.word	.LANCHOR96
+	.word	.LANCHOR97
 	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
 	.section	.text.insert_data_list,"ax",%progbits
 	.align	1
@@ -5613,13 +5685,13 @@ FtlFreeSysBlkQueueOut:
 insert_data_list:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L718
+	ldr	r3, .L721
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	sub	sp, sp, #24
 	ldrh	fp, [r3, #0]
 	cmp	r0, fp
-	bcs	.L703
-	ldr	r3, .L718+4
+	bcs	.L706
+	ldr	r3, .L721+4
 	movs	r6, #6
 	muls	r6, r0, r6
 	ldr	r1, [r3, #0]
@@ -5627,29 +5699,29 @@ insert_data_list:
 	adds	r2, r1, r6
 	strh	r3, [r1, r6]	@ movhi
 	strh	r3, [r2, #2]	@ movhi
-	ldr	r3, .L718+8
+	ldr	r3, .L721+8
 	ldr	r5, [r3, #0]
 	cmp	r5, #0
-	beq	.L717
-.L704:
-	ldr	r3, .L718+12
+	beq	.L720
+.L707:
+	ldr	r3, .L721+12
 	ldrh	r4, [r2, #4]
 	ldr	ip, [r3, #0]
 	lsls	r3, r0, #1
 	ldrh	r7, [ip, r0, lsl #1]
-	cbz	r4, .L713
+	cbz	r4, .L716
 	muls	r4, r7, r4
-	b	.L716
-.L713:
-	mov	r4, #-1
+	b	.L719
 .L716:
+	mov	r4, #-1
+.L719:
 	str	r4, [sp, #8]
 	subs	r4, r5, r1
-	ldr	r7, .L718+16
+	ldr	r7, .L721+16
 	mov	sl, r2
 	asrs	r4, r4, #1
 	muls	r4, r7, r4
-	ldr	r7, .L718+20
+	ldr	r7, .L721+20
 	uxth	r4, r4
 	str	ip, [sp, #4]
 	ldr	r7, [r7, #0]
@@ -5658,84 +5730,84 @@ insert_data_list:
 	str	r7, [sp, #12]
 	mov	r3, r5
 	movs	r7, #0
-.L711:
+.L714:
 	adds	r7, r7, #1
 	uxth	r7, r7
 	cmp	r7, fp
-	bhi	.L703
+	bhi	.L706
 	cmp	r0, r4
-	beq	.L703
+	beq	.L706
 	ldr	r2, [sp, #4]
 	lsl	r8, r4, #1
 	str	r8, [sp, #16]
 	ldrh	r8, [r2, r4, lsl #1]
 	ldrh	r2, [r3, #4]
-	cbz	r2, .L714
+	cbz	r2, .L717
 	mul	r2, r2, r8
-	b	.L706
-.L714:
+	b	.L709
+.L717:
 	mov	r2, #-1
-.L706:
+.L709:
 	ldr	r8, [sp, #8]
 	cmp	r2, r8
-	bne	.L707
+	bne	.L710
 	ldr	r2, [sp, #12]
 	ldr	ip, [sp, #16]
 	ldrh	r8, [r2, ip]
 	ldr	r2, [sp, #20]
 	ldrh	ip, [r2, #0]
 	cmp	r8, ip
-	bcc	.L709
-	b	.L715
-.L707:
-	bhi	.L715
-.L709:
+	bcc	.L712
+	b	.L718
+.L710:
+	bhi	.L718
+.L712:
 	ldrh	r2, [r3, #0]
 	movw	r8, #65535
 	cmp	r2, r8
-	bne	.L710
+	bne	.L713
 	mov	r2, sl
 	strh	r0, [r3, #0]	@ movhi
-	ldr	r3, .L718+24
+	ldr	r3, .L721+24
 	strh	r4, [r2, #2]	@ movhi
-	b	.L717
-.L710:
+	b	.L720
+.L713:
 	mov	ip, #6
 	mov	r4, r2
 	mla	r3, ip, r2, r1
-	b	.L711
-.L715:
+	b	.L714
+.L718:
 	strh	r4, [r1, r6]	@ movhi
 	mov	r2, sl
 	ldrh	r4, [r3, #2]
 	cmp	r3, r5
 	strh	r4, [r2, #2]	@ movhi
-	bne	.L712
+	bne	.L715
 	strh	r0, [r3, #2]	@ movhi
-	ldr	r3, .L718+8
-.L717:
+	ldr	r3, .L721+8
+.L720:
 	str	r2, [r3, #0]
-	b	.L703
-.L712:
+	b	.L706
+.L715:
 	ldrh	r2, [r3, #2]
 	movs	r4, #6
 	strh	r0, [r3, #2]	@ movhi
 	muls	r2, r4, r2
 	strh	r0, [r1, r2]	@ movhi
-.L703:
+.L706:
 	movs	r0, #0
 	add	sp, sp, #24
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L719:
+.L722:
 	.align	2
-.L718:
+.L721:
 	.word	.LANCHOR55
-	.word	.LANCHOR97
-	.word	.LANCHOR98
 	.word	.LANCHOR99
-	.word	-1431655765
-	.word	.LANCHOR94
 	.word	.LANCHOR100
+	.word	.LANCHOR101
+	.word	-1431655765
+	.word	.LANCHOR96
+	.word	.LANCHOR102
 	.size	insert_data_list, .-insert_data_list
 	.section	.text.INSERT_DATA_LIST,"ax",%progbits
 	.align	1
@@ -5748,31 +5820,31 @@ INSERT_DATA_LIST:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	insert_data_list
-	ldr	r2, .L722
+	ldr	r2, .L725
 	ldrh	r3, [r2, #0]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r2, #0]	@ movhi
-	ldr	r2, .L722+4
+	ldr	r2, .L725+4
 	ldrh	r2, [r2, #0]
 	cmp	r2, r3
-	bcs	.L720
-	ldr	r1, .L722+8
-	movs	r2, #196
-	ldr	r0, .L722+12
+	bcs	.L723
+	ldr	r1, .L725+8
+	movs	r2, #205
+	ldr	r0, .L725+12
 	bl	printf
-	ldr	r0, .L722+16
-	ldr	r1, .L722+20
+	ldr	r0, .L725+16
+	ldr	r1, .L725+20
 	pop	{r3, lr}
 	b	printf
-.L720:
-	pop	{r3, pc}
 .L723:
+	pop	{r3, pc}
+.L726:
 	.align	2
-.L722:
-	.word	.LANCHOR101
+.L725:
+	.word	.LANCHOR103
 	.word	.LANCHOR55
-	.word	.LANCHOR102
+	.word	.LANCHOR104
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
@@ -5789,67 +5861,67 @@ insert_free_list:
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	movw	r8, #65535
 	cmp	r0, r8
-	beq	.L725
-	ldr	r3, .L732
+	beq	.L728
+	ldr	r3, .L735
 	mov	fp, #6
 	mul	r6, fp, r0
 	ldr	r2, [r3, #0]
-	ldr	r3, .L732+4
+	ldr	r3, .L735+4
 	adds	r1, r2, r6
 	ldr	r4, [r3, #0]
 	strh	r8, [r1, #2]	@ movhi
 	strh	r8, [r2, r6]	@ movhi
-	cbz	r4, .L731
-.L726:
-	ldr	r3, .L732+8
+	cbz	r4, .L734
+.L729:
+	ldr	r3, .L735+8
 	subs	r5, r4, r2
 	asrs	r5, r5, #1
 	ldr	ip, [r3, #0]
-	ldr	r3, .L732+12
+	ldr	r3, .L735+12
 	muls	r5, r3, r5
 	mov	r3, r4
 	uxth	r5, r5
 	ldrh	sl, [ip, r0, lsl #1]
-.L729:
+.L732:
 	ldrh	r7, [ip, r5, lsl #1]
 	cmp	r7, sl
-	bcs	.L727
+	bcs	.L730
 	ldrh	r7, [r3, #0]
 	cmp	r7, r8
-	bne	.L728
+	bne	.L731
 	strh	r5, [r1, #2]	@ movhi
 	strh	r0, [r3, #0]	@ movhi
-	b	.L725
-.L728:
+	b	.L728
+.L731:
 	mla	r3, fp, r7, r2
 	mov	r5, r7
-	b	.L729
-.L727:
+	b	.L732
+.L730:
 	ldrh	r7, [r3, #2]
 	cmp	r3, r4
 	strh	r5, [r2, r6]	@ movhi
 	strh	r7, [r1, #2]	@ movhi
-	bne	.L730
+	bne	.L733
 	strh	r0, [r3, #2]	@ movhi
-	ldr	r3, .L732+4
-.L731:
+	ldr	r3, .L735+4
+.L734:
 	str	r1, [r3, #0]
-	b	.L725
-.L730:
+	b	.L728
+.L733:
 	ldrh	r1, [r3, #2]
 	movs	r4, #6
 	strh	r0, [r3, #2]	@ movhi
 	muls	r1, r4, r1
 	strh	r0, [r2, r1]	@ movhi
-.L725:
+.L728:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L733:
+.L736:
 	.align	2
-.L732:
-	.word	.LANCHOR97
-	.word	.LANCHOR103
-	.word	.LANCHOR94
+.L735:
+	.word	.LANCHOR99
+	.word	.LANCHOR105
+	.word	.LANCHOR96
 	.word	-1431655765
 	.size	insert_free_list, .-insert_free_list
 	.section	.text.INSERT_FREE_LIST,"ax",%progbits
@@ -5863,31 +5935,31 @@ INSERT_FREE_LIST:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	insert_free_list
-	ldr	r2, .L736
+	ldr	r2, .L739
 	ldrh	r3, [r2, #0]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r2, #0]	@ movhi
-	ldr	r2, .L736+4
+	ldr	r2, .L739+4
 	ldrh	r2, [r2, #0]
 	cmp	r2, r3
-	bcs	.L734
-	ldr	r1, .L736+8
-	movs	r2, #189
-	ldr	r0, .L736+12
+	bcs	.L737
+	ldr	r1, .L739+8
+	movs	r2, #198
+	ldr	r0, .L739+12
 	bl	printf
-	ldr	r0, .L736+16
-	ldr	r1, .L736+20
+	ldr	r0, .L739+16
+	ldr	r1, .L739+20
 	pop	{r3, lr}
 	b	printf
-.L734:
-	pop	{r3, pc}
 .L737:
+	pop	{r3, pc}
+.L740:
 	.align	2
-.L736:
-	.word	.LANCHOR104
+.L739:
+	.word	.LANCHOR106
 	.word	.LANCHOR55
-	.word	.LANCHOR105
+	.word	.LANCHOR107
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
@@ -5904,57 +5976,57 @@ List_remove_node:
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r6, #6
 	muls	r6, r1, r6
-	ldr	r3, .L744
+	ldr	r3, .L747
 	mov	r5, r0
 	ldr	r7, [r3, #0]
 	movw	r3, #65535
 	adds	r4, r7, r6
 	ldrh	r2, [r4, #2]
 	cmp	r2, r3
-	bne	.L739
+	bne	.L742
 	ldr	r3, [r0, #0]
 	cmp	r4, r3
-	beq	.L739
-	ldr	r1, .L744+4
-	mov	r2, #354
-	ldr	r0, .L744+8
+	beq	.L742
+	ldr	r1, .L747+4
+	movw	r2, #363
+	ldr	r0, .L747+8
 	bl	printf
-	ldr	r0, .L744+12
-	ldr	r1, .L744+16
+	ldr	r0, .L747+12
+	ldr	r1, .L747+16
 	bl	printf
-.L739:
+.L742:
 	ldr	r3, [r5, #0]
 	movw	r2, #65535
 	cmp	r4, r3
 	ldrh	r3, [r7, r6]
-	bne	.L740
+	bne	.L743
 	cmp	r3, r2
-	bne	.L741
+	bne	.L744
 	movs	r3, #0
 	str	r3, [r5, #0]
-	b	.L742
-.L741:
-	ldr	r1, .L744
+	b	.L745
+.L744:
+	ldr	r1, .L747
 	movs	r0, #6
 	ldr	r1, [r1, #0]
 	mla	r3, r0, r3, r1
 	str	r3, [r5, #0]
 	strh	r2, [r3, #2]	@ movhi
-	b	.L742
-.L740:
+	b	.L745
+.L743:
 	cmp	r3, r2
 	ldrh	r2, [r4, #2]
-	bne	.L743
+	bne	.L746
 	cmp	r2, r3
-	beq	.L742
-	ldr	r1, .L744
+	beq	.L745
+	ldr	r1, .L747
 	movs	r0, #6
 	muls	r2, r0, r2
 	ldr	r1, [r1, #0]
 	strh	r3, [r1, r2]	@ movhi
-	b	.L742
-.L743:
-	ldr	r1, .L744
+	b	.L745
+.L746:
+	ldr	r1, .L747
 	movs	r0, #6
 	ldr	r1, [r1, #0]
 	mla	r5, r0, r3, r1
@@ -5962,17 +6034,17 @@ List_remove_node:
 	ldrh	r2, [r4, #2]
 	muls	r0, r2, r0
 	strh	r3, [r1, r0]	@ movhi
-.L742:
+.L745:
 	movw	r3, #65535
 	movs	r0, #0
 	strh	r3, [r7, r6]	@ movhi
 	strh	r3, [r4, #2]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.L745:
+.L748:
 	.align	2
-.L744:
-	.word	.LANCHOR97
-	.word	.LANCHOR106
+.L747:
+	.word	.LANCHOR99
+	.word	.LANCHOR108
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
@@ -5988,24 +6060,24 @@ List_pop_index_node:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	ldr	r3, [r0, #0]
 	push	{r4, r5, r6, lr}
-	cbz	r3, .L751
-	ldr	r2, .L752
+	cbz	r3, .L754
+	ldr	r2, .L755
 	movw	r6, #65535
 	movs	r5, #6
 	ldr	r4, [r2, #0]
-	b	.L748
-.L750:
+	b	.L751
+.L753:
 	mla	r3, r5, r2, r4
 	subs	r1, r1, #1
 	uxth	r1, r1
-.L748:
-	cbz	r1, .L749
+.L751:
+	cbz	r1, .L752
 	ldrh	r2, [r3, #0]
 	cmp	r2, r6
-	bne	.L750
-.L749:
+	bne	.L753
+.L752:
 	subs	r4, r3, r4
-	ldr	r3, .L752+4
+	ldr	r3, .L755+4
 	asrs	r4, r4, #1
 	muls	r4, r3, r4
 	uxth	r4, r4
@@ -6013,28 +6085,15 @@ List_pop_index_node:
 	bl	List_remove_node
 	mov	r0, r4
 	pop	{r4, r5, r6, pc}
-.L751:
+.L754:
 	movw	r0, #65535
 	pop	{r4, r5, r6, pc}
-.L753:
+.L756:
 	.align	2
-.L752:
-	.word	.LANCHOR97
+.L755:
+	.word	.LANCHOR99
 	.word	-1431655765
 	.size	List_pop_index_node, .-List_pop_index_node
-	.section	.text.List_pop_head_node,"ax",%progbits
-	.align	1
-	.global	List_pop_head_node
-	.thumb
-	.thumb_func
-	.type	List_pop_head_node, %function
-List_pop_head_node:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	movs	r1, #0
-	b	List_pop_index_node
-	.size	List_pop_head_node, .-List_pop_head_node
 	.section	.text.List_get_gc_head_node,"ax",%progbits
 	.align	1
 	.global	List_get_gc_head_node
@@ -6044,41 +6103,41 @@ List_pop_head_node:
 List_get_gc_head_node:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L761
+	ldr	r3, .L763
 	push	{r4, lr}
 	ldr	r3, [r3, #0]
-	cbz	r3, .L760
-	ldr	r2, .L761+4
+	cbz	r3, .L762
+	ldr	r2, .L763+4
 	movw	r1, #65535
 	movs	r4, #6
 	ldr	r2, [r2, #0]
-	b	.L757
-.L759:
+	b	.L759
+.L761:
 	mla	r3, r4, r3, r2
 	subs	r0, r0, #1
 	uxth	r0, r0
-.L757:
-	cbz	r0, .L758
+.L759:
+	cbz	r0, .L760
 	ldrh	r3, [r3, #0]
 	cmp	r3, r1
-	bne	.L759
+	bne	.L761
 	mov	r0, r1
 	pop	{r4, pc}
-.L758:
+.L760:
 	subs	r3, r3, r2
-	ldr	r0, .L761+8
+	ldr	r0, .L763+8
 	asrs	r3, r3, #1
 	muls	r0, r3, r0
 	uxth	r0, r0
 	pop	{r4, pc}
-.L760:
+.L762:
 	movw	r0, #65535
 	pop	{r4, pc}
-.L762:
+.L764:
 	.align	2
-.L761:
-	.word	.LANCHOR98
-	.word	.LANCHOR97
+.L763:
+	.word	.LANCHOR100
+	.word	.LANCHOR99
 	.word	-1431655765
 	.size	List_get_gc_head_node, .-List_get_gc_head_node
 	.section	.text.List_update_data_list,"ax",%progbits
@@ -6090,30 +6149,30 @@ List_get_gc_head_node:
 List_update_data_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L772
+	ldr	r3, .L774
 	push	{r4, r5, r6, r7, r8, lr}
 	mov	r4, r0
 	ldrh	r3, [r3, #0]
 	cmp	r3, r0
-	beq	.L764
-	ldr	r3, .L772+4
+	beq	.L766
+	ldr	r3, .L774+4
 	ldrh	r3, [r3, #0]
 	cmp	r3, r0
-	beq	.L764
-	ldr	r3, .L772+8
+	beq	.L766
+	ldr	r3, .L774+8
 	ldrh	r3, [r3, #0]
 	cmp	r3, r0
-	beq	.L764
-	ldr	r3, .L772+12
+	beq	.L766
+	ldr	r3, .L774+12
 	movs	r7, #6
 	muls	r7, r0, r7
 	ldr	r8, [r3, #0]
-	ldr	r3, .L772+16
+	ldr	r3, .L774+16
 	add	r5, r8, r7
 	ldr	r3, [r3, #0]
 	cmp	r5, r3
-	beq	.L764
-	ldr	r3, .L772+20
+	beq	.L766
+	ldr	r3, .L774+20
 	movw	r2, #65535
 	ldrh	r6, [r5, #4]
 	ldr	r3, [r3, #0]
@@ -6123,35 +6182,35 @@ List_update_data_list:
 	it	eq
 	moveq	r6, #-1
 	cmp	r3, r2
-	bne	.L766
+	bne	.L768
 	ldrh	r2, [r8, r7]
 	cmp	r2, r3
-	bne	.L766
-	ldr	r1, .L772+24
-	movw	r2, #445
-	ldr	r0, .L772+28
+	bne	.L768
+	ldr	r1, .L774+24
+	movw	r2, #481
+	ldr	r0, .L774+28
 	bl	printf
-	ldr	r0, .L772+32
-	ldr	r1, .L772+36
+	ldr	r0, .L774+32
+	ldr	r1, .L774+36
 	bl	printf
-.L766:
+.L768:
 	ldrh	r3, [r5, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L767
+	bne	.L769
 	ldrh	r2, [r8, r7]
 	cmp	r2, r3
-	beq	.L764
-.L767:
-	ldr	r2, .L772+12
+	beq	.L766
+.L769:
+	ldr	r2, .L774+12
 	movs	r1, #6
 	ldr	r2, [r2, #0]
 	mla	r3, r1, r3, r2
-	ldr	r1, .L772+40
+	ldr	r1, .L774+40
 	subs	r2, r3, r2
 	asrs	r2, r2, #1
 	muls	r2, r1, r2
-	ldr	r1, .L772+20
+	ldr	r1, .L774+20
 	uxth	r2, r2
 	ldrh	r3, [r3, #4]
 	ldr	r1, [r1, #0]
@@ -6160,44 +6219,44 @@ List_update_data_list:
 	it	eq
 	moveq	r3, #-1
 	cmp	r6, r3
-	bcs	.L764
-	ldr	r5, .L772+44
+	bcs	.L766
+	ldr	r5, .L774+44
 	mov	r1, r4
-	ldr	r0, .L772+16
+	ldr	r0, .L774+16
 	bl	List_remove_node
 	ldrh	r3, [r5, #0]
-	cbnz	r3, .L769
-	ldr	r1, .L772+24
-	mov	r2, #456
-	ldr	r0, .L772+28
+	cbnz	r3, .L771
+	ldr	r1, .L774+24
+	mov	r2, #492
+	ldr	r0, .L774+28
 	bl	printf
-	ldr	r0, .L772+32
-	ldr	r1, .L772+36
+	ldr	r0, .L774+32
+	ldr	r1, .L774+36
 	bl	printf
-.L769:
+.L771:
 	ldrh	r3, [r5, #0]
 	mov	r0, r4
 	subs	r3, r3, #1
 	strh	r3, [r5, #0]	@ movhi
 	bl	INSERT_DATA_LIST
-.L764:
+.L766:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, pc}
-.L773:
+.L775:
 	.align	2
-.L772:
-	.word	.LANCHOR107
-	.word	.LANCHOR108
+.L774:
 	.word	.LANCHOR109
-	.word	.LANCHOR97
-	.word	.LANCHOR98
-	.word	.LANCHOR99
 	.word	.LANCHOR110
+	.word	.LANCHOR111
+	.word	.LANCHOR99
+	.word	.LANCHOR100
+	.word	.LANCHOR101
+	.word	.LANCHOR112
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
 	.word	-1431655765
-	.word	.LANCHOR101
+	.word	.LANCHOR103
 	.size	List_update_data_list, .-List_update_data_list
 	.section	.text.ftl_free_no_use_map_blk,"ax",%progbits
 	.align	1
@@ -6219,47 +6278,47 @@ ftl_free_no_use_map_blk:
 	mov	r0, r5
 	bl	memset
 	movs	r2, #0
-	b	.L775
-.L779:
+	b	.L777
+.L781:
 	ldr	r1, [r7, r2, lsl #2]
 	movs	r3, #0
 	ubfx	r1, r1, #10, #16
-	b	.L776
-.L778:
+	b	.L778
+.L780:
 	ldrh	r0, [r6, r3, lsl #1]
 	cmp	r0, r1
-	bne	.L777
+	bne	.L779
 	ldrh	r0, [r5, r3, lsl #1]
 	adds	r0, r0, #1
 	strh	r0, [r5, r3, lsl #1]	@ movhi
-.L777:
+.L779:
 	adds	r3, r3, #1
 	uxth	r3, r3
-.L776:
+.L778:
 	ldrh	r0, [r4, #10]
 	cmp	r0, r3
-	bhi	.L778
+	bhi	.L780
 	adds	r2, r2, #1
 	uxth	r2, r2
-.L775:
+.L777:
 	ldrh	r3, [r4, #6]
 	cmp	r3, r2
-	bhi	.L779
+	bhi	.L781
 	mov	sl, #0
 	ldrh	r3, [r5, #0]
 	mov	r7, sl
-	ldr	r2, .L785
-	b	.L780
-.L784:
+	ldr	r2, .L787
+	b	.L782
+.L786:
 	ldrh	r1, [r4, #0]
 	cmp	r1, r7
-	bne	.L781
+	bne	.L783
 	ldrh	r1, [r2, #0]
 	ldrh	r0, [r4, #2]
 	cmp	r0, r1
 	it	cc
 	strhcc	r1, [r5, r7, lsl #1]	@ movhi
-.L781:
+.L783:
 	ldrh	r8, [r5, r7, lsl #1]
 	lsl	fp, r7, #1
 	cmp	r3, r8
@@ -6267,9 +6326,9 @@ ftl_free_no_use_map_blk:
 	movhi	sl, r7
 	movhi	r3, r8
 	cmp	r8, #0
-	bne	.L783
+	bne	.L785
 	ldrh	r0, [r6, fp]
-	cbz	r0, .L783
+	cbz	r0, .L785
 	movs	r1, #1
 	stmia	sp, {r2, r3}
 	bl	FtlFreeSysBlkQueueIn
@@ -6278,18 +6337,18 @@ ftl_free_no_use_map_blk:
 	ldrh	r1, [r4, #8]
 	subs	r1, r1, #1
 	strh	r1, [r4, #8]	@ movhi
-.L783:
+.L785:
 	adds	r7, r7, #1
 	uxth	r7, r7
-.L780:
+.L782:
 	ldrh	r1, [r4, #10]
 	cmp	r1, r7
-	bhi	.L784
+	bhi	.L786
 	mov	r0, sl
 	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L786:
+.L788:
 	.align	2
-.L785:
+.L787:
 	.word	.LANCHOR69
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.section	.text.ftl_map_blk_alloc_new_blk,"ax",%progbits
@@ -6306,15 +6365,15 @@ ftl_map_blk_alloc_new_blk:
 	ldrh	r2, [r0, #10]
 	movs	r5, #0
 	ldr	r3, [r0, #12]
-	b	.L788
-.L791:
+	b	.L790
+.L793:
 	mov	r7, r3
 	adds	r3, r3, #2
 	ldrh	r6, [r7, #0]
-	cbnz	r6, .L789
+	cbnz	r6, .L791
 	bl	FtlFreeSysBlkQueueOut
 	strh	r0, [r7, #0]	@ movhi
-	cbz	r0, .L790
+	cbz	r0, .L792
 	ldr	r3, [r4, #28]
 	strh	r6, [r4, #2]	@ movhi
 	adds	r3, r3, #1
@@ -6323,31 +6382,31 @@ ftl_map_blk_alloc_new_blk:
 	strh	r5, [r4, #0]	@ movhi
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	b	.L790
-.L789:
+	b	.L792
+.L791:
 	adds	r5, r5, #1
 	uxth	r5, r5
-.L788:
-	cmp	r5, r2
-	bne	.L791
 .L790:
+	cmp	r5, r2
+	bne	.L793
+.L792:
 	ldrh	r3, [r4, #10]
 	cmp	r3, r5
-	bhi	.L792
-	ldr	r1, .L793
-	movw	r2, #553
-	ldr	r0, .L793+4
+	bhi	.L794
+	ldr	r1, .L795
+	movw	r2, #594
+	ldr	r0, .L795+4
 	bl	printf
-	ldr	r0, .L793+8
-	ldr	r1, .L793+12
+	ldr	r0, .L795+8
+	ldr	r1, .L795+12
 	bl	printf
-.L792:
+.L794:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L794:
+.L796:
 	.align	2
-.L793:
-	.word	.LANCHOR111
+.L795:
+	.word	.LANCHOR113
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
@@ -6361,93 +6420,93 @@ ftl_map_blk_alloc_new_blk:
 select_l2p_ram_region:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L807
+	ldr	r2, .L809
 	movw	r1, #65535
 	push	{r3, r4, r5, r6, r7, lr}
-	ldr	r3, .L807+4
+	ldr	r3, .L809+4
 	ldr	r0, [r2, #0]
 	movs	r2, #0
 	mov	r4, r2
 	ldrh	r3, [r3, #0]
-	b	.L796
-.L798:
+	b	.L798
+.L800:
 	adds	r2, r2, #12
 	adds	r5, r0, r2
 	ldrh	r5, [r5, #-12]
 	cmp	r5, r1
-	beq	.L797
+	beq	.L799
 	adds	r4, r4, #1
 	uxth	r4, r4
-.L796:
+.L798:
 	cmp	r4, r3
-	bne	.L798
+	bne	.L800
 	movs	r1, #0
 	mov	r4, r3
 	mov	r6, #-2147483648
 	mov	r2, r1
-	b	.L799
-.L801:
+	b	.L801
+.L803:
 	adds	r5, r0, r1
 	ldr	r5, [r5, #4]
 	cmp	r5, #0
-	blt	.L800
+	blt	.L802
 	cmp	r5, r6
 	itt	cc
 	movcc	r6, r5
 	movcc	r4, r2
-.L800:
+.L802:
 	adds	r2, r2, #1
 	adds	r1, r1, #12
 	uxth	r2, r2
-.L799:
+.L801:
 	cmp	r2, r3
-	bne	.L801
+	bne	.L803
 	cmp	r4, r3
-	bcc	.L797
-	ldr	r2, .L807+8
+	bcc	.L799
+	ldr	r2, .L809+8
 	movs	r1, #0
 	mov	r4, r3
 	mov	r5, #-1
 	ldrh	r7, [r2, #0]
 	mov	r2, r1
-	b	.L802
-.L804:
+	b	.L804
+.L806:
 	adds	r6, r0, r1
 	ldr	r6, [r6, #4]
 	cmp	r6, r5
-	bcs	.L803
+	bcs	.L805
 	ldrh	ip, [r0, r1]
 	cmp	ip, r7
 	it	ne
 	movne	r5, r6
 	it	ne
 	movne	r4, r2
-.L803:
+.L805:
 	adds	r2, r2, #1
 	adds	r1, r1, #12
 	uxth	r2, r2
-.L802:
+.L804:
 	cmp	r2, r3
-	bne	.L804
+	bne	.L806
 	cmp	r4, r2
-	bcc	.L797
-	ldr	r1, .L807+12
-	mov	r2, #756
-	ldr	r0, .L807+16
+	bcc	.L799
+	ldr	r1, .L809+12
+	movw	r2, #826
+	ldr	r0, .L809+16
 	bl	printf
-	ldr	r0, .L807+20
-	ldr	r1, .L807+24
+	ldr	r0, .L809+20
+	ldr	r1, .L809+24
 	bl	printf
-.L797:
+.L799:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, pc}
-.L808:
+.L810:
 	.align	2
-.L807:
-	.word	.LANCHOR112
-	.word	.LANCHOR83
-	.word	.LANCHOR113
+.L809:
 	.word	.LANCHOR114
+	.word	.LANCHOR83
+	.word	.LANCHOR115
+	.word	.LANCHOR116
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
@@ -6461,46 +6520,46 @@ select_l2p_ram_region:
 FtlUpdateVaildLpn:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L815
+	ldr	r3, .L817
 	push	{r4, r5, lr}
 	ldrh	r2, [r3, #0]
 	adds	r1, r2, #1
 	cmp	r2, #4
 	strh	r1, [r3, #0]	@ movhi
 	mov	r2, r3
-	bhi	.L810
-	cbz	r0, .L809
-.L810:
+	bhi	.L812
+	cbz	r0, .L811
+.L812:
 	movs	r3, #0
 	strh	r3, [r2, #0]	@ movhi
-	ldr	r2, .L815+4
+	ldr	r2, .L817+4
 	movw	r4, #65535
 	ldrh	r5, [r2, #0]
-	ldr	r2, .L815+8
+	ldr	r2, .L817+8
 	ldr	r1, [r2, #0]
 	mov	r2, r3
-	b	.L812
-.L814:
+	b	.L814
+.L816:
 	ldrh	r0, [r1], #2
 	cmp	r0, r4
 	it	ne
 	addne	r3, r3, r0
 	adds	r2, r2, #1
 	uxth	r2, r2
-.L812:
+.L814:
 	cmp	r2, r5
-	bne	.L814
-	ldr	r2, .L815+12
+	bne	.L816
+	ldr	r2, .L817+12
 	str	r3, [r2, #0]
-.L809:
+.L811:
 	pop	{r4, r5, pc}
-.L816:
+.L818:
 	.align	2
-.L815:
-	.word	.LANCHOR115
+.L817:
+	.word	.LANCHOR117
 	.word	.LANCHOR55
-	.word	.LANCHOR99
-	.word	.LANCHOR116
+	.word	.LANCHOR101
+	.word	.LANCHOR118
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
 	.section	.text.ftl_set_blk_mode,"ax",%progbits
 	.align	1
@@ -6512,29 +6571,29 @@ ftl_set_blk_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L821
+	ldr	r3, .L823
 	lsrs	r2, r0, #5
 	and	r0, r0, #31
 	uxth	r2, r2
 	ldr	r3, [r3, #0]
-	cbz	r1, .L818
+	cbz	r1, .L820
 	movs	r1, #1
 	lsl	r0, r1, r0
 	ldr	r1, [r3, r2, lsl #2]
 	orrs	r0, r0, r1
-	b	.L820
-.L818:
+	b	.L822
+.L820:
 	movs	r1, #1
 	lsl	r0, r1, r0
 	ldr	r1, [r3, r2, lsl #2]
 	bic	r0, r1, r0
-.L820:
+.L822:
 	str	r0, [r3, r2, lsl #2]
 	bx	lr
-.L822:
+.L824:
 	.align	2
-.L821:
-	.word	.LANCHOR117
+.L823:
+	.word	.LANCHOR119
 	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
 	.section	.text.ftl_get_blk_mode,"ax",%progbits
 	.align	1
@@ -6546,7 +6605,7 @@ ftl_get_blk_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L824
+	ldr	r3, .L826
 	lsrs	r2, r0, #5
 	and	r0, r0, #31
 	ldr	r3, [r3, #0]
@@ -6554,10 +6613,10 @@ ftl_get_blk_mode:
 	lsr	r0, r3, r0
 	and	r0, r0, #1
 	bx	lr
-.L825:
+.L827:
 	.align	2
-.L824:
-	.word	.LANCHOR117
+.L826:
+	.word	.LANCHOR119
 	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
 	.section	.text.FtlL2PDataInit,"ax",%progbits
 	.align	1
@@ -6568,15 +6627,15 @@ ftl_get_blk_mode:
 FtlL2PDataInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L829
+	ldr	r3, .L831
 	movs	r1, #0
 	push	{r4, r5, r6, r7, r8, lr}
 	ldr	r2, [r3, #0]
-	ldr	r3, .L829+4
-	ldr	r5, .L829+8
-	ldr	r4, .L829+12
+	ldr	r3, .L831+4
+	ldr	r5, .L831+8
+	ldr	r4, .L831+12
 	lsls	r2, r2, #1
-	ldr	r6, .L829+16
+	ldr	r6, .L831+16
 	ldr	r0, [r3, #0]
 	bl	memset
 	ldrh	r3, [r4, #0]
@@ -6585,73 +6644,74 @@ FtlL2PDataInit:
 	muls	r2, r3, r2
 	ldr	r0, [r5, #0]
 	bl	memset
-	ldr	r3, .L829+20
+	ldr	r3, .L831+20
 	ldrh	r7, [r6, #0]
 	ldr	ip, [r5, #0]
 	movw	r5, #65535
 	ldr	r2, [r3, #0]
 	movs	r3, #0
 	ldrh	r6, [r4, #0]
-	mov	r1, r3
+	mov	r0, r3
 	mov	r4, r3
-	b	.L827
-.L828:
-	adds	r1, r1, #1
+	b	.L829
+.L830:
+	adds	r0, r0, #1
 	bic	r3, r3, #3
 	add	r3, ip, r3
 	str	r3, [r2, #-4]
-	uxth	r1, r1
+	uxth	r0, r0
 	mov	r3, r8
 	str	r4, [r2, #-8]
 	strh	r5, [r2, #-12]	@ movhi
-.L827:
+.L829:
 	adds	r2, r2, #12
-	cmp	r1, r7
+	cmp	r0, r7
 	add	r8, r3, r6
-	movw	r0, #65535
-	bne	.L828
-	ldr	r2, .L829
-	ldr	r3, .L829+24
+	movw	r1, #65535
+	bne	.L830
+	ldr	r2, .L831
+	ldr	r3, .L831+24
 	ldr	r2, [r2, #0]
-	strh	r0, [r3, #2]	@ movhi
-	strh	r0, [r3, #0]	@ movhi
+	strh	r1, [r3, #2]	@ movhi
+	strh	r1, [r3, #0]	@ movhi
 	strh	r2, [r3, #10]	@ movhi
 	movw	r2, #61634
 	strh	r2, [r3, #4]	@ movhi
-	ldr	r2, .L829+28
+	ldr	r2, .L831+28
+	strh	r1, [r3, #40]	@ movhi
 	ldrh	r2, [r2, #0]
 	strh	r2, [r3, #8]	@ movhi
-	ldr	r2, .L829+32
+	ldr	r2, .L831+32
 	ldrh	r2, [r2, #0]
 	strh	r2, [r3, #6]	@ movhi
-	ldr	r2, .L829+36
+	ldr	r2, .L831+36
 	ldr	r2, [r2, #0]
 	str	r2, [r3, #12]
-	ldr	r2, .L829+40
+	ldr	r2, .L831+40
 	ldr	r2, [r2, #0]
 	str	r2, [r3, #16]
-	ldr	r2, .L829+4
+	ldr	r2, .L831+4
 	ldr	r2, [r2, #0]
 	str	r2, [r3, #20]
-	ldr	r2, .L829+44
+	ldr	r2, .L831+44
 	ldr	r2, [r2, #0]
 	str	r2, [r3, #24]
 	pop	{r4, r5, r6, r7, r8, pc}
-.L830:
+.L832:
 	.align	2
-.L829:
+.L831:
 	.word	.LANCHOR80
-	.word	.LANCHOR118
-	.word	.LANCHOR119
-	.word	.LANCHOR73
-	.word	.LANCHOR83
-	.word	.LANCHOR112
 	.word	.LANCHOR120
 	.word	.LANCHOR121
-	.word	.LANCHOR82
+	.word	.LANCHOR73
+	.word	.LANCHOR83
+	.word	.LANCHOR114
 	.word	.LANCHOR122
 	.word	.LANCHOR123
+	.word	.LANCHOR82
 	.word	.LANCHOR124
+	.word	.LANCHOR125
+	.word	.LANCHOR126
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
 	.section	.text.ftl_sb_update_avl_pages,"ax",%progbits
 	.align	1
@@ -6664,51 +6724,51 @@ ftl_sb_update_avl_pages:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	movs	r3, #0
 	strh	r3, [r0, #4]	@ movhi
-	ldr	r3, .L838
+	ldr	r3, .L840
 	push	{r4, r5, r6, r7, lr}
 	movw	r4, #65535
 	ldrh	r3, [r3, #0]
-	b	.L832
-.L834:
+	b	.L834
+.L836:
 	add	r5, r2, #8
 	ldrh	r5, [r0, r5, lsl #1]
 	cmp	r5, r4
-	beq	.L833
+	beq	.L835
 	ldrh	r5, [r0, #4]
 	adds	r5, r5, #1
 	strh	r5, [r0, #4]	@ movhi
-.L833:
+.L835:
 	adds	r2, r2, #1
 	uxth	r2, r2
-.L832:
+.L834:
 	cmp	r2, r3
-	bcc	.L834
-	ldr	r2, .L838+4
+	bcc	.L836
+	ldr	r2, .L840+4
 	mov	r4, r0
 	movw	r5, #65535
 	mvns	r1, r1
 	ldrh	r6, [r2, #0]
 	movs	r2, #0
-	b	.L835
-.L837:
+	b	.L837
+.L839:
 	ldrh	r7, [r4, #16]
 	cmp	r7, r5
-	beq	.L836
+	beq	.L838
 	ldrh	r7, [r0, #4]
 	adds	r7, r6, r7
 	adds	r7, r7, r1
 	strh	r7, [r0, #4]	@ movhi
-.L836:
+.L838:
 	adds	r2, r2, #1
 	adds	r4, r4, #2
 	uxth	r2, r2
-.L835:
+.L837:
 	cmp	r2, r3
-	bne	.L837
+	bne	.L839
 	pop	{r4, r5, r6, r7, pc}
-.L839:
+.L841:
 	.align	2
-.L838:
+.L840:
 	.word	.LANCHOR53
 	.word	.LANCHOR68
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
@@ -6721,29 +6781,29 @@ ftl_sb_update_avl_pages:
 make_superblock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L847
+	ldr	r3, .L849
 	ldrh	r2, [r0, #0]
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	mov	r4, r0
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bcc	.L841
-	ldr	r1, .L847+4
-	movw	r2, #2145
-	ldr	r0, .L847+8
+	bcc	.L843
+	ldr	r1, .L849+4
+	movw	r2, #2296
+	ldr	r0, .L849+8
 	bl	printf
-	ldr	r0, .L847+12
-	ldr	r1, .L847+16
+	ldr	r0, .L849+12
+	ldr	r1, .L849+16
 	bl	printf
-.L841:
+.L843:
 	movs	r5, #0
-	ldr	r8, .L847+40
+	ldr	r8, .L849+40
 	strh	r5, [r4, #4]	@ movhi
 	movw	r6, #65535
 	strb	r5, [r4, #7]
-	ldr	r7, .L847+20
-	b	.L842
-.L844:
+	ldr	r7, .L849+20
+	b	.L844
+.L846:
 	ldrb	r0, [r7, r5]	@ zero_extendqisi2
 	add	sl, r5, #8
 	ldrh	r1, [r4, #0]
@@ -6751,58 +6811,58 @@ make_superblock:
 	strh	r6, [r4, sl, lsl #1]	@ movhi
 	mov	fp, r0
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L843
+	cbnz	r0, .L845
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	strh	fp, [r4, sl, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	strb	r3, [r4, #7]
-.L843:
+.L845:
 	adds	r5, r5, #1
 	uxth	r5, r5
-.L842:
+.L844:
 	ldrh	r3, [r8, #0]
 	cmp	r3, r5
-	bhi	.L844
-	ldr	r2, .L847+24
+	bhi	.L846
+	ldr	r2, .L849+24
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r2, #0]
 	muls	r3, r2, r3
 	strh	r3, [r4, #4]	@ movhi
 	movs	r3, #0
 	strb	r3, [r4, #9]
-	ldr	r3, .L847+28
+	ldr	r3, .L849+28
 	ldr	r3, [r3, #0]
-	cbz	r3, .L845
-	ldr	r3, .L847+32
+	cbz	r3, .L847
+	ldr	r3, .L849+32
 	ldrh	r2, [r4, #0]
 	ldr	r3, [r3, #0]
 	ldrh	r3, [r3, r2, lsl #1]
 	cmp	r3, #59
-	bhi	.L845
+	bhi	.L847
 	movs	r3, #1
 	strb	r3, [r4, #9]
-.L845:
-	ldr	r3, .L847+36
+.L847:
+	ldr	r3, .L849+36
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L846
+	cbz	r3, .L848
 	movs	r3, #1
 	strb	r3, [r4, #9]
-.L846:
+.L848:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L848:
+.L850:
 	.align	2
-.L847:
+.L849:
 	.word	.LANCHOR55
-	.word	.LANCHOR125
+	.word	.LANCHOR127
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
 	.word	.LANCHOR62
 	.word	.LANCHOR68
-	.word	.LANCHOR126
-	.word	.LANCHOR94
-	.word	.LANCHOR7
+	.word	.LANCHOR128
+	.word	.LANCHOR96
+	.word	.LANCHOR0
 	.word	.LANCHOR53
 	.size	make_superblock, .-make_superblock
 	.section	.text.SupperBlkListInit,"ax",%progbits
@@ -6812,143 +6872,150 @@ make_superblock:
 	.thumb_func
 	.type	SupperBlkListInit, %function
 SupperBlkListInit:
-	@ args = 0, pretend = 0, frame = 0
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L860
+	ldr	r2, .L862
+	ldr	r3, .L862+4
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
 	movs	r1, #0
-	ldr	r3, .L860+4
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	movs	r6, #0
 	ldrh	r3, [r3, #0]
-	mov	r7, r6
+	movs	r5, #0
 	ldr	r0, [r2, #0]
 	movs	r2, #6
 	muls	r2, r3, r2
-	mov	r4, r6
+	mov	r4, r5
 	bl	memset
-	ldr	r3, .L860+8
-	ldr	sl, .L860+68
-	str	r6, [r3, #0]
-	ldr	r3, .L860+12
-	str	r6, [r3, #0]
-	ldr	r3, .L860+16
-	str	r6, [r3, #0]
-	ldr	r3, .L860+20
-	strh	r6, [r3, #0]	@ movhi
-	ldr	r3, .L860+24
-	strh	r6, [r3, #0]	@ movhi
-	b	.L850
-.L852:
-	ldr	r2, .L860+28
+	ldr	r3, .L862+8
+	mov	r8, r5
+	mov	sl, r5
+	str	r5, [r3, #0]
+	ldr	r3, .L862+12
+	str	r5, [r3, #0]
+	ldr	r3, .L862+16
+	str	r5, [r3, #0]
+	ldr	r3, .L862+20
+	strh	r5, [r3, #0]	@ movhi
+	ldr	r3, .L862+24
+	strh	r5, [r3, #0]	@ movhi
+	ldr	r3, .L862+28
+	strh	r5, [r3, #0]	@ movhi
+	b	.L852
+.L854:
+	ldr	r2, .L862+32
 	mov	r1, r4
-	ldrb	r0, [r2, r8]	@ zero_extendqisi2
+	ldrb	r0, [r2, r7]	@ zero_extendqisi2
+	str	ip, [sp, #4]
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L851
-	ldrh	r3, [fp, #0]
-	adds	r5, r5, r3
-	uxth	r5, r5
-.L851:
-	add	r8, r8, #1
-	uxth	r8, r8
-	b	.L857
+	ldr	ip, [sp, #4]
+	cbnz	r0, .L853
+	ldrh	r2, [fp, #0]
+	adds	r6, r6, r2
+	uxth	r6, r6
+.L853:
+	adds	r7, r7, #1
+	b	.L859
+.L861:
+	movs	r7, #0
+	uxth	r3, r4
+	ldr	fp, .L862+76
+	mov	ip, r4
+	mov	r6, r7
+	mov	r4, r3
 .L859:
-	movs	r5, #0
-	ldr	fp, .L860+72
-	mov	r8, r5
-.L857:
-	ldr	r2, .L860+32
-	ldrh	r3, [r2, #0]
-	cmp	r3, r8
-	bhi	.L852
-	cbz	r5, .L853
-	mov	r1, r5
+	ldr	r3, .L862+36
+	ldrh	r2, [r3, #0]
+	cmp	r7, r2
+	blt	.L854
+	mov	r4, ip
+	cbz	r6, .L855
+	sxth	r1, r6
 	mov	r0, #32768
 	bl	__aeabi_idiv
-	uxth	r5, r0
-	b	.L854
-.L853:
-	ldr	r3, .L860+36
+	uxth	r6, r0
+	b	.L856
+.L855:
+	ldr	r3, .L862+40
 	movw	r2, #65535
 	ldr	r3, [r3, #0]
-	strh	r2, [r3, r4, lsl #1]	@ movhi
-.L854:
-	ldr	r3, .L860
-	movs	r2, #6
+	strh	r2, [r3, ip, lsl #1]	@ movhi
+.L856:
+	ldr	r3, .L862
 	ldr	r3, [r3, #0]
-	mla	r3, r2, r4, r3
-	strh	r5, [r3, #4]	@ movhi
-	ldr	r3, .L860+40
+	adds	r3, r3, r5
+	strh	r6, [r3, #4]	@ movhi
+	ldr	r3, .L862+44
 	ldrh	r3, [r3, #0]
-	cmp	r3, r4
-	beq	.L855
-	ldr	r3, .L860+44
+	cmp	r4, r3
+	beq	.L857
+	ldr	r3, .L862+48
 	ldrh	r3, [r3, #0]
-	cmp	r3, r4
-	beq	.L855
-	ldr	r3, .L860+48
+	cmp	r4, r3
+	beq	.L857
+	ldr	r3, .L862+52
 	ldrh	r3, [r3, #0]
-	cmp	r3, r4
-	beq	.L855
-	ldr	r3, .L860+36
+	cmp	r4, r3
+	beq	.L857
+	ldr	r3, .L862+40
+	uxth	r0, r4
 	ldr	r3, [r3, #0]
 	ldrh	r3, [r3, r4, lsl #1]
-	cbnz	r3, .L856
-	adds	r6, r6, #1
-	mov	r0, r4
-	uxth	r6, r6
+	cbnz	r3, .L858
+	add	r8, r8, #1
+	uxth	r8, r8
 	bl	INSERT_FREE_LIST
-	b	.L855
-.L856:
-	adds	r7, r7, #1
-	mov	r0, r4
-	uxth	r7, r7
+	b	.L857
+.L858:
+	add	sl, sl, #1
+	uxth	sl, sl
 	bl	INSERT_DATA_LIST
-.L855:
+.L857:
 	adds	r4, r4, #1
-	uxth	r4, r4
-.L850:
-	ldrh	r3, [sl, #0]
+	adds	r5, r5, #6
+.L852:
+	ldr	r2, .L862+56
+	ldrh	r3, [r2, #0]
 	cmp	r4, r3
-	bcc	.L859
-	ldr	r2, .L860+20
-	strh	r7, [r2, #0]	@ movhi
-	ldr	r2, .L860+24
-	strh	r6, [r2, #0]	@ movhi
-	adds	r6, r7, r6
-	cmp	r6, r3
-	ble	.L858
-	ldr	r1, .L860+52
-	movw	r2, #2209
-	ldr	r0, .L860+56
+	blt	.L861
+	ldr	r2, .L862+20
+	strh	sl, [r2, #0]	@ movhi
+	ldr	r2, .L862+24
+	strh	r8, [r2, #0]	@ movhi
+	add	r8, sl, r8
+	cmp	r8, r3
+	ble	.L860
+	ldr	r1, .L862+60
+	movw	r2, #2366
+	ldr	r0, .L862+64
 	bl	printf
-	ldr	r0, .L860+60
-	ldr	r1, .L860+64
+	ldr	r0, .L862+68
+	ldr	r1, .L862+72
 	bl	printf
-.L858:
+.L860:
 	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L861:
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L863:
 	.align	2
-.L860:
-	.word	.LANCHOR97
+.L862:
+	.word	.LANCHOR99
 	.word	.LANCHOR56
-	.word	.LANCHOR103
-	.word	.LANCHOR98
+	.word	.LANCHOR105
 	.word	.LANCHOR100
-	.word	.LANCHOR101
-	.word	.LANCHOR104
+	.word	.LANCHOR102
+	.word	.LANCHOR103
+	.word	.LANCHOR106
+	.word	.LANCHOR129
 	.word	.LANCHOR62
 	.word	.LANCHOR53
-	.word	.LANCHOR99
-	.word	.LANCHOR107
-	.word	.LANCHOR108
+	.word	.LANCHOR101
 	.word	.LANCHOR109
-	.word	.LANCHOR127
+	.word	.LANCHOR110
+	.word	.LANCHOR111
+	.word	.LANCHOR55
+	.word	.LANCHOR130
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
-	.word	.LANCHOR55
 	.word	.LANCHOR68
 	.size	SupperBlkListInit, .-SupperBlkListInit
 	.section	.text.update_multiplier_value,"ax",%progbits
@@ -6964,44 +7031,44 @@ update_multiplier_value:
 	movs	r4, #0
 	mov	r6, r0
 	mov	r5, r4
-	ldr	sl, .L867+8
-	ldr	r8, .L867+12
-	ldr	r7, .L867
-	b	.L863
-.L865:
+	ldr	sl, .L869+8
+	ldr	r8, .L869+12
+	ldr	r7, .L869
+	b	.L865
+.L867:
 	mov	r1, r6
 	ldrb	r0, [r8, r5]	@ zero_extendqisi2
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L864
+	cbnz	r0, .L866
 	ldrh	r3, [r7, #0]
 	adds	r4, r4, r3
 	uxth	r4, r4
-.L864:
+.L866:
 	adds	r5, r5, #1
 	uxth	r5, r5
-.L863:
+.L865:
 	ldrh	r3, [sl, #0]
 	cmp	r3, r5
-	bhi	.L865
-	cbz	r4, .L866
+	bhi	.L867
+	cbz	r4, .L868
 	mov	r1, r4
 	mov	r0, #32768
 	bl	__aeabi_idiv
 	uxth	r4, r0
-.L866:
-	ldr	r3, .L867+4
+.L868:
+	ldr	r3, .L869+4
 	movs	r2, #6
 	movs	r0, #0
 	ldr	r3, [r3, #0]
 	mla	r6, r2, r6, r3
 	strh	r4, [r6, #4]	@ movhi
 	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
-.L868:
+.L870:
 	.align	2
-.L867:
+.L869:
 	.word	.LANCHOR68
-	.word	.LANCHOR97
+	.word	.LANCHOR99
 	.word	.LANCHOR53
 	.word	.LANCHOR62
 	.size	update_multiplier_value, .-update_multiplier_value
@@ -7015,28 +7082,28 @@ GetFreeBlockMinEraseCount:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L872
+	ldr	r3, .L874
 	ldr	r0, [r3, #0]
-	cbz	r0, .L870
-	ldr	r3, .L872+4
+	cbz	r0, .L872
+	ldr	r3, .L874+4
 	ldr	r3, [r3, #0]
 	subs	r0, r0, r3
-	ldr	r3, .L872+8
+	ldr	r3, .L874+8
 	asrs	r0, r0, #1
 	muls	r0, r3, r0
-	ldr	r3, .L872+12
+	ldr	r3, .L874+12
 	uxth	r0, r0
 	ldr	r3, [r3, #0]
 	ldrh	r0, [r3, r0, lsl #1]
-.L870:
+.L872:
 	bx	lr
-.L873:
+.L875:
 	.align	2
-.L872:
-	.word	.LANCHOR103
-	.word	.LANCHOR97
+.L874:
+	.word	.LANCHOR105
+	.word	.LANCHOR99
 	.word	-1431655765
-	.word	.LANCHOR94
+	.word	.LANCHOR96
 	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
 	.section	.text.GetFreeBlockMaxEraseCount,"ax",%progbits
 	.align	1
@@ -7047,11 +7114,11 @@ GetFreeBlockMinEraseCount:
 GetFreeBlockMaxEraseCount:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L881
+	ldr	r3, .L883
 	push	{r4, r5, r6, lr}
 	ldr	r3, [r3, #0]
-	cbz	r3, .L880
-	ldr	r2, .L881+4
+	cbz	r3, .L882
+	ldr	r2, .L883+4
 	movs	r1, #7
 	movw	r5, #65535
 	ldrh	r2, [r2, #0]
@@ -7060,43 +7127,43 @@ GetFreeBlockMaxEraseCount:
 	cmp	r0, r2
 	it	gt
 	uxthgt	r0, r2
-	ldr	r2, .L881+8
+	ldr	r2, .L883+8
 	movs	r6, #6
 	ldr	r1, [r2, #0]
-	ldr	r2, .L881+12
+	ldr	r2, .L883+12
 	subs	r3, r3, r1
 	asrs	r3, r3, #1
 	muls	r3, r2, r3
 	movs	r2, #0
 	uxth	r3, r3
-	b	.L877
-.L879:
+	b	.L879
+.L881:
 	mul	r4, r6, r3
 	ldrh	r4, [r1, r4]
 	cmp	r4, r5
-	beq	.L878
+	beq	.L880
 	adds	r2, r2, #1
 	mov	r3, r4
 	uxth	r2, r2
-.L877:
+.L879:
 	cmp	r2, r0
-	bne	.L879
-.L878:
-	ldr	r2, .L881+16
+	bne	.L881
+.L880:
+	ldr	r2, .L883+16
 	ldr	r2, [r2, #0]
 	ldrh	r0, [r2, r3, lsl #1]
 	pop	{r4, r5, r6, pc}
-.L880:
+.L882:
 	mov	r0, r3
 	pop	{r4, r5, r6, pc}
-.L882:
+.L884:
 	.align	2
-.L881:
-	.word	.LANCHOR103
-	.word	.LANCHOR104
-	.word	.LANCHOR97
+.L883:
+	.word	.LANCHOR105
+	.word	.LANCHOR106
+	.word	.LANCHOR99
 	.word	-1431655765
-	.word	.LANCHOR94
+	.word	.LANCHOR96
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
 	.section	.text.free_data_superblock,"ax",%progbits
 	.align	1
@@ -7110,19 +7177,19 @@ free_data_superblock:
 	movw	r2, #65535
 	cmp	r0, r2
 	push	{r3, lr}
-	beq	.L884
-	ldr	r2, .L885
+	beq	.L886
+	ldr	r2, .L887
 	movs	r1, #0
 	ldr	r2, [r2, #0]
 	strh	r1, [r2, r0, lsl #1]	@ movhi
 	bl	INSERT_FREE_LIST
-.L884:
+.L886:
 	movs	r0, #0
 	pop	{r3, pc}
-.L886:
+.L888:
 	.align	2
-.L885:
-	.word	.LANCHOR99
+.L887:
+	.word	.LANCHOR101
 	.size	free_data_superblock, .-free_data_superblock
 	.section	.text.FtlGcBufInit,"ax",%progbits
 	.align	1
@@ -7133,29 +7200,29 @@ free_data_superblock:
 FtlGcBufInit:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L892
+	ldr	r3, .L894
 	movs	r2, #0
 	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
 	mov	r4, r2
 	str	r2, [r3, #0]
-	ldr	r3, .L892+4
+	ldr	r3, .L894+4
 	ldrh	ip, [r3, #0]
-	ldr	r3, .L892+8
+	ldr	r3, .L894+8
 	ldr	r7, [r3, #0]
-	ldr	r3, .L892+12
+	ldr	r3, .L894+12
 	ldr	r6, [r3, #0]
-	ldr	r3, .L892+16
+	ldr	r3, .L894+16
 	ldr	r1, [r3, #0]
-	ldr	r3, .L892+20
+	ldr	r3, .L894+20
 	ldrh	r5, [r3, #0]
-	ldr	r3, .L892+24
+	ldr	r3, .L894+24
 	str	r5, [sp, #4]
 	ldrh	fp, [r3, #0]
-	ldr	r3, .L892+28
+	ldr	r3, .L894+28
 	ldr	r0, [r3, #0]
 	mov	r3, r2
-	b	.L888
-.L889:
+	b	.L890
+.L891:
 	movs	r5, #1
 	bic	r4, r4, #3
 	adds	r3, r3, r5
@@ -7170,30 +7237,30 @@ FtlGcBufInit:
 	mov	r4, r8
 	str	r2, [r0, #-24]
 	mov	r2, sl
-.L888:
+.L890:
 	adds	r1, r1, #12
 	ldr	r5, [sp, #4]
 	adds	r0, r0, #36
 	cmp	r3, ip
 	add	r8, r4, r5
 	add	sl, r2, fp
-	bne	.L889
-	ldr	r1, .L892+8
+	bne	.L891
+	ldr	r1, .L894+8
 	movs	r4, #12
-	ldr	r2, .L892+32
+	ldr	r2, .L894+32
 	mov	fp, #0
 	ldr	ip, [r1, #0]
-	ldr	r1, .L892+20
+	ldr	r1, .L894+20
 	ldr	r8, [r2, #0]
-	ldr	r2, .L892+16
+	ldr	r2, .L894+16
 	ldrh	r7, [r1, #0]
-	ldr	r1, .L892+12
+	ldr	r1, .L894+12
 	ldr	r2, [r2, #0]
 	ldr	r6, [r1, #0]
-	ldr	r1, .L892+24
+	ldr	r1, .L894+24
 	ldrh	r5, [r1, #0]
-	b	.L890
-.L891:
+	b	.L892
+.L893:
 	mul	r1, r4, r3
 	mul	r0, r7, r3
 	add	sl, r2, r1
@@ -7207,22 +7274,22 @@ FtlGcBufInit:
 	bic	r1, r1, #3
 	adds	r1, r6, r1
 	str	r1, [sl, #4]
-.L890:
+.L892:
 	cmp	r3, r8
-	bcc	.L891
+	bcc	.L893
 	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L893:
+.L895:
 	.align	2
-.L892:
-	.word	.LANCHOR128
-	.word	.LANCHOR53
-	.word	.LANCHOR129
-	.word	.LANCHOR130
+.L894:
 	.word	.LANCHOR131
-	.word	.LANCHOR73
-	.word	.LANCHOR74
+	.word	.LANCHOR53
 	.word	.LANCHOR132
 	.word	.LANCHOR133
+	.word	.LANCHOR134
+	.word	.LANCHOR73
+	.word	.LANCHOR74
+	.word	.LANCHOR135
+	.word	.LANCHOR136
 	.size	FtlGcBufInit, .-FtlGcBufInit
 	.section	.text.FtlVariablesInit,"ax",%progbits
 	.align	1
@@ -7235,37 +7302,37 @@ FtlVariablesInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #0
-	ldr	r3, .L895
+	ldr	r3, .L897
 	movw	r2, #65535
-	ldr	r5, .L895+4
+	ldr	r5, .L897+4
 	mov	r1, r4
 	str	r4, [r3, #0]
-	ldr	r3, .L895+8
+	ldr	r3, .L897+8
 	strh	r2, [r3, #0]	@ movhi
 	mov	r2, #-1
-	ldr	r3, .L895+12
+	ldr	r3, .L897+12
 	str	r4, [r3, #0]
-	ldr	r3, .L895+16
+	ldr	r3, .L897+16
 	str	r4, [r3, #0]
-	ldr	r3, .L895+20
+	ldr	r3, .L897+20
 	str	r2, [r3, #0]
-	ldr	r3, .L895+24
+	ldr	r3, .L897+24
 	str	r4, [r3, #0]
-	ldr	r3, .L895+28
+	ldr	r3, .L897+28
 	strh	r4, [r3, #0]	@ movhi
-	ldr	r3, .L895+32
+	ldr	r3, .L897+32
 	ldrh	r2, [r3, #0]
-	ldr	r3, .L895+36
+	ldr	r3, .L897+36
 	lsls	r2, r2, #1
 	ldr	r0, [r3, #0]
 	bl	memset
 	ldrh	r2, [r5, #0]
-	ldr	r3, .L895+40
+	ldr	r3, .L897+40
 	mov	r1, r4
 	lsls	r2, r2, #1
 	ldr	r0, [r3, #0]
 	bl	memset
-	ldr	r3, .L895+44
+	ldr	r3, .L897+44
 	ldrh	r2, [r5, #0]
 	mov	r1, r4
 	ldr	r0, [r3, #0]
@@ -7273,33 +7340,33 @@ FtlVariablesInit:
 	bl	memset
 	mov	r1, r4
 	movs	r2, #48
-	ldr	r0, .L895+48
+	ldr	r0, .L897+48
 	bl	memset
 	mov	r1, r4
 	mov	r2, #512
-	ldr	r0, .L895+52
+	ldr	r0, .L897+52
 	bl	memset
 	bl	FtlGcBufInit
 	bl	FtlL2PDataInit
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L896:
+.L898:
 	.align	2
-.L895:
-	.word	.LANCHOR134
-	.word	.LANCHOR56
-	.word	.LANCHOR135
-	.word	.LANCHOR136
+.L897:
 	.word	.LANCHOR137
+	.word	.LANCHOR56
 	.word	.LANCHOR138
-	.word	.LANCHOR126
-	.word	.LANCHOR85
-	.word	.LANCHOR77
-	.word	.LANCHOR86
-	.word	.LANCHOR94
 	.word	.LANCHOR139
 	.word	.LANCHOR140
 	.word	.LANCHOR141
+	.word	.LANCHOR128
+	.word	.LANCHOR86
+	.word	.LANCHOR77
+	.word	.LANCHOR87
+	.word	.LANCHOR96
+	.word	.LANCHOR142
+	.word	.LANCHOR143
+	.word	.LANCHOR144
 	.size	FtlVariablesInit, .-FtlVariablesInit
 	.section	.text.FtlGcBufFree,"ax",%progbits
 	.align	1
@@ -7310,50 +7377,50 @@ FtlVariablesInit:
 FtlGcBufFree:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L904
+	ldr	r3, .L906
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	movs	r5, #36
 	ldr	r6, [r3, #0]
-	ldr	r3, .L904+4
+	ldr	r3, .L906+4
 	ldr	r4, [r3, #0]
 	movs	r3, #0
 	mov	fp, r3
-	b	.L898
-.L901:
+	b	.L900
+.L903:
 	mov	ip, #12
 	mul	r3, ip, r2
 	add	sl, r4, r3
 	ldr	ip, [r4, r3]
 	ldr	r3, [r7, #8]
 	cmp	ip, r3
-	bne	.L899
+	bne	.L901
 	mov	r3, r8
 	str	fp, [sl, #8]
-	b	.L900
-.L899:
+	b	.L902
+.L901:
 	adds	r2, r2, #1
 	uxth	r2, r2
-.L903:
+.L905:
 	cmp	r2, r6
-	bcc	.L901
+	bcc	.L903
 	mov	r3, r8
-.L900:
+.L902:
 	adds	r3, r3, #1
 	uxth	r3, r3
-.L898:
+.L900:
 	cmp	r3, r1
-	bcs	.L897
+	bcs	.L899
 	mla	r7, r5, r3, r0
 	movs	r2, #0
 	mov	r8, r3
-	b	.L903
-.L897:
+	b	.L905
+.L899:
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L905:
+.L907:
 	.align	2
-.L904:
-	.word	.LANCHOR133
-	.word	.LANCHOR131
+.L906:
+	.word	.LANCHOR136
+	.word	.LANCHOR134
 	.size	FtlGcBufFree, .-FtlGcBufFree
 	.section	.text.FtlGcBufAlloc,"ax",%progbits
 	.align	1
@@ -7364,49 +7431,49 @@ FtlGcBufFree:
 FtlGcBufAlloc:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L913
+	ldr	r3, .L915
 	push	{r4, r5, r6, r7, r8, sl, lr}
 	movs	r7, #12
 	ldr	r8, [r3, #0]
 	movs	r6, #1
-	ldr	r3, .L913+4
+	ldr	r3, .L915+4
 	movs	r5, #36
 	ldr	ip, [r3, #0]
 	movs	r3, #0
-	b	.L907
-.L910:
+	b	.L909
+.L912:
 	mla	r4, r7, r2, ip
 	ldr	sl, [r4, #8]
 	cmp	sl, #0
-	bne	.L908
+	bne	.L910
 	mla	r2, r5, r3, r0
 	str	r6, [r4, #8]
 	ldr	sl, [r4, #0]
 	ldr	r4, [r4, #4]
 	str	sl, [r2, #8]
 	str	r4, [r2, #12]
-	b	.L909
-.L908:
+	b	.L911
+.L910:
 	adds	r2, r2, #1
 	uxth	r2, r2
-	b	.L911
-.L912:
+	b	.L913
+.L914:
 	movs	r2, #0
-.L911:
+.L913:
 	cmp	r2, r8
-	bcc	.L910
-.L909:
+	bcc	.L912
+.L911:
 	adds	r3, r3, #1
 	uxth	r3, r3
-.L907:
+.L909:
 	cmp	r3, r1
-	bcc	.L912
+	bcc	.L914
 	pop	{r4, r5, r6, r7, r8, sl, pc}
-.L914:
+.L916:
 	.align	2
-.L913:
-	.word	.LANCHOR133
-	.word	.LANCHOR131
+.L915:
+	.word	.LANCHOR136
+	.word	.LANCHOR134
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
 	.section	.text.IsBlkInGcList,"ax",%progbits
 	.align	1
@@ -7417,32 +7484,32 @@ FtlGcBufAlloc:
 IsBlkInGcList:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L920
+	ldr	r3, .L922
 	push	{r4, lr}
 	ldrh	r1, [r3, #0]
-	ldr	r3, .L920+4
+	ldr	r3, .L922+4
 	ldr	r2, [r3, #0]
 	movs	r3, #0
-	b	.L916
-.L918:
+	b	.L918
+.L920:
 	ldrh	r4, [r2], #2
 	cmp	r4, r0
-	beq	.L919
+	beq	.L921
 	adds	r3, r3, #1
 	uxth	r3, r3
-.L916:
+.L918:
 	cmp	r3, r1
-	bne	.L918
+	bne	.L920
 	movs	r0, #0
 	pop	{r4, pc}
-.L919:
+.L921:
 	movs	r0, #1
 	pop	{r4, pc}
-.L921:
+.L923:
 	.align	2
-.L920:
-	.word	.LANCHOR142
-	.word	.LANCHOR143
+.L922:
+	.word	.LANCHOR145
+	.word	.LANCHOR146
 	.size	IsBlkInGcList, .-IsBlkInGcList
 	.section	.text.FtlGcUpdatePage,"ax",%progbits
 	.align	1
@@ -7459,31 +7526,31 @@ FtlGcUpdatePage:
 	mov	r5, r1
 	mov	r6, r2
 	bl	P2V_block_in_plane
-	ldr	r3, .L926
+	ldr	r3, .L928
 	ldrh	r7, [r3, #0]
-	ldr	r3, .L926+4
+	ldr	r3, .L928+4
 	ldr	r2, [r3, #0]
 	movs	r3, #0
 	mov	r1, r2
-	b	.L923
-.L925:
+	b	.L925
+.L927:
 	ldrh	ip, [r1], #2
 	cmp	ip, r0
-	beq	.L924
+	beq	.L926
 	adds	r3, r3, #1
 	uxth	r3, r3
-.L923:
+.L925:
 	cmp	r3, r7
-	bne	.L925
+	bne	.L927
 	strh	r0, [r2, r3, lsl #1]	@ movhi
-	ldr	r3, .L926
+	ldr	r3, .L928
 	ldrh	r2, [r3, #0]
 	adds	r2, r2, #1
 	strh	r2, [r3, #0]	@ movhi
-.L924:
-	ldr	r0, .L926+8
+.L926:
+	ldr	r0, .L928+8
 	movs	r1, #12
-	ldr	r3, .L926+12
+	ldr	r3, .L928+12
 	ldr	r0, [r0, #0]
 	ldrh	r2, [r3, #0]
 	muls	r1, r2, r1
@@ -7494,13 +7561,13 @@ FtlGcUpdatePage:
 	str	r6, [r7, #8]
 	strh	r2, [r3, #0]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.L927:
+.L929:
 	.align	2
-.L926:
-	.word	.LANCHOR142
-	.word	.LANCHOR143
+.L928:
 	.word	.LANCHOR145
-	.word	.LANCHOR144
+	.word	.LANCHOR146
+	.word	.LANCHOR148
+	.word	.LANCHOR147
 	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
 	.section	.text.FtlGcPageVarInit,"ax",%progbits
 	.align	1
@@ -7511,20 +7578,20 @@ FtlGcUpdatePage:
 FtlGcPageVarInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L929
+	ldr	r2, .L931
 	movs	r3, #0
 	push	{r4, lr}
 	movs	r1, #255
 	strh	r3, [r2, #0]	@ movhi
-	ldr	r4, .L929+4
-	ldr	r2, .L929+8
+	ldr	r4, .L931+4
+	ldr	r2, .L931+8
 	strh	r3, [r2, #0]	@ movhi
 	ldrh	r2, [r4, #0]
-	ldr	r3, .L929+12
+	ldr	r3, .L931+12
 	lsls	r2, r2, #1
 	ldr	r0, [r3, #0]
 	bl	memset
-	ldr	r2, .L929+16
+	ldr	r2, .L931+16
 	ldrh	r3, [r4, #0]
 	movs	r1, #255
 	ldr	r0, [r2, #0]
@@ -7533,15 +7600,51 @@ FtlGcPageVarInit:
 	bl	memset
 	pop	{r4, lr}
 	b	FtlGcBufInit
-.L930:
+.L932:
 	.align	2
-.L929:
-	.word	.LANCHOR142
-	.word	.LANCHOR70
-	.word	.LANCHOR144
-	.word	.LANCHOR143
+.L931:
 	.word	.LANCHOR145
+	.word	.LANCHOR70
+	.word	.LANCHOR147
+	.word	.LANCHOR146
+	.word	.LANCHOR148
 	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
+	.section	.text.FtlGcRefreshOpenBlock,"ax",%progbits
+	.align	1
+	.global	FtlGcRefreshOpenBlock
+	.thumb
+	.thumb_func
+	.type	FtlGcRefreshOpenBlock, %function
+FtlGcRefreshOpenBlock:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, lr}
+	ldr	r4, .L936
+	ldrh	r5, [r4, #0]
+	cmp	r5, r0
+	beq	.L934
+	ldr	r3, .L936+4
+	ldrh	r1, [r3, #0]
+	cmp	r1, r0
+	beq	.L934
+	movw	r2, #65535
+	cmp	r5, r2
+	bne	.L935
+	strh	r0, [r4, #0]	@ movhi
+	b	.L934
+.L935:
+	cmp	r1, r2
+	it	eq
+	strheq	r0, [r3, #0]	@ movhi
+.L934:
+	movs	r0, #0
+	pop	{r4, r5, pc}
+.L937:
+	.align	2
+.L936:
+	.word	.LANCHOR149
+	.word	.LANCHOR150
+	.size	FtlGcRefreshOpenBlock, .-FtlGcRefreshOpenBlock
 	.section	.text.FtlGcRefreshBlock,"ax",%progbits
 	.align	1
 	.global	FtlGcRefreshBlock
@@ -7552,31 +7655,31 @@ FtlGcRefreshBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, lr}
-	ldr	r4, .L934
+	ldr	r4, .L941
 	ldrh	r5, [r4, #0]
 	cmp	r5, r0
-	beq	.L932
-	ldr	r3, .L934+4
+	beq	.L939
+	ldr	r3, .L941+4
 	ldrh	r1, [r3, #0]
 	cmp	r1, r0
-	beq	.L932
+	beq	.L939
 	movw	r2, #65535
 	cmp	r5, r2
-	bne	.L933
+	bne	.L940
 	strh	r0, [r4, #0]	@ movhi
-	b	.L932
-.L933:
+	b	.L939
+.L940:
 	cmp	r1, r2
 	it	eq
 	strheq	r0, [r3, #0]	@ movhi
-.L932:
+.L939:
 	movs	r0, #0
 	pop	{r4, r5, pc}
-.L935:
+.L942:
 	.align	2
-.L934:
-	.word	.LANCHOR146
-	.word	.LANCHOR147
+.L941:
+	.word	.LANCHOR149
+	.word	.LANCHOR150
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
 	.section	.text.FtlGcMarkBadPhyBlk,"ax",%progbits
 	.align	1
@@ -7592,49 +7695,49 @@ FtlGcMarkBadPhyBlk:
 	bl	P2V_block_in_plane
 	mov	r5, r0
 	bl	FtlGcRefreshBlock
-	ldr	r3, .L941
+	ldr	r3, .L948
 	ldr	r3, [r3, #0]
-	cbz	r3, .L937
-	ldr	r3, .L941+4
+	cbz	r3, .L944
+	ldr	r3, .L948+4
 	ldr	r3, [r3, #0]
 	ldrh	r2, [r3, r5, lsl #1]
 	cmp	r2, #29
-	bls	.L937
+	bls	.L944
 	subs	r2, r2, #30
 	strh	r2, [r3, r5, lsl #1]	@ movhi
-.L937:
-	ldr	r3, .L941+8
-	ldr	r2, .L941+12
+.L944:
+	ldr	r3, .L948+8
+	ldr	r2, .L948+12
 	ldrh	r1, [r3, #0]
 	movs	r3, #0
-	b	.L938
-.L940:
+	b	.L945
+.L947:
 	ldrh	r0, [r2, #2]!
 	cmp	r0, r4
-	beq	.L939
+	beq	.L946
 	adds	r3, r3, #1
 	uxth	r3, r3
-.L938:
+.L945:
 	cmp	r3, r1
-	bne	.L940
+	bne	.L947
 	cmp	r3, #15
-	bhi	.L939
-	ldr	r2, .L941+16
+	bhi	.L946
+	ldr	r2, .L948+16
 	strh	r4, [r2, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
-	ldr	r2, .L941+8
+	ldr	r2, .L948+8
 	strh	r3, [r2, #0]	@ movhi
-.L939:
+.L946:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L942:
+.L949:
 	.align	2
-.L941:
-	.word	.LANCHOR126
-	.word	.LANCHOR94
-	.word	.LANCHOR148
-	.word	.LANCHOR149-2
-	.word	.LANCHOR149
+.L948:
+	.word	.LANCHOR128
+	.word	.LANCHOR96
+	.word	.LANCHOR151
+	.word	.LANCHOR152-2
+	.word	.LANCHOR152
 	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
 	.section	.text.FtlGcReFreshBadBlk,"ax",%progbits
 	.align	1
@@ -7645,23 +7748,23 @@ FtlGcMarkBadPhyBlk:
 FtlGcReFreshBadBlk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L946
+	ldr	r3, .L953
 	push	{r4, lr}
 	ldrh	r3, [r3, #0]
-	cbz	r3, .L944
-	ldr	r2, .L946+4
+	cbz	r3, .L951
+	ldr	r2, .L953+4
 	ldrh	r1, [r2, #0]
 	movw	r2, #65535
 	cmp	r1, r2
-	bne	.L944
-	ldr	r4, .L946+8
+	bne	.L951
+	ldr	r4, .L953+8
 	ldrh	r2, [r4, #0]
 	cmp	r2, r3
-	bcc	.L945
+	bcc	.L952
 	movs	r3, #0
 	strh	r3, [r4, #0]	@ movhi
-.L945:
-	ldr	r3, .L946+12
+.L952:
+	ldr	r3, .L953+12
 	ldrh	r2, [r4, #0]
 	ldrh	r0, [r3, r2, lsl #1]
 	bl	P2V_block_in_plane
@@ -7669,16 +7772,16 @@ FtlGcReFreshBadBlk:
 	ldrh	r3, [r4, #0]
 	adds	r3, r3, #1
 	strh	r3, [r4, #0]	@ movhi
-.L944:
+.L951:
 	movs	r0, #0
 	pop	{r4, pc}
-.L947:
+.L954:
 	.align	2
-.L946:
-	.word	.LANCHOR148
-	.word	.LANCHOR146
-	.word	.LANCHOR150
+.L953:
+	.word	.LANCHOR151
 	.word	.LANCHOR149
+	.word	.LANCHOR153
+	.word	.LANCHOR152
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
 	.section	.text.ftl_memset,"ax",%progbits
 	.align	1
@@ -7726,11 +7829,11 @@ rknand_get_clk_rate:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r0, .L952
+	ldr	r0, .L959
 	bx	lr
-.L953:
+.L960:
 	.align	2
-.L952:
+.L959:
 	.word	148000000
 	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
 	.section	.text.ftl_malloc,"ax",%progbits
@@ -7755,81 +7858,85 @@ ftl_malloc:
 FtlMemInit:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L960
+	ldr	r3, .L967
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	movs	r1, #0
-	str	r1, [r3, #0]
+	strh	r1, [r3, #0]	@ movhi
 	movs	r5, #12
-	ldr	r3, .L960+4
-	ldr	r2, .L960+8
-	ldr	r4, .L960+12
+	ldr	r3, .L967+4
+	ldr	r2, .L967+8
+	ldr	r4, .L967+12
 	str	r1, [r3, #0]
-	ldr	r3, .L960+16
+	ldr	r3, .L967+16
 	ldrh	r0, [r4, #0]
-	ldr	r8, .L960+296
+	ldr	r8, .L967+304
 	str	r1, [r3, #0]
-	ldr	r3, .L960+20
+	ldr	r3, .L967+20
 	lsls	r0, r0, #1
-	ldr	r7, .L960+24
+	ldr	r7, .L967+24
+	str	r1, [r3, #0]
+	ldr	r3, .L967+28
 	str	r1, [r3, #0]
-	ldr	r3, .L960+28
+	ldr	r3, .L967+32
 	str	r1, [r3, #0]
-	ldr	r3, .L960+32
+	ldr	r3, .L967+36
 	str	r1, [r3, #0]
-	ldr	r3, .L960+36
+	ldr	r3, .L967+40
 	str	r1, [r3, #0]
-	ldr	r3, .L960+40
+	ldr	r3, .L967+44
 	str	r1, [r3, #0]
-	ldr	r3, .L960+44
+	ldr	r3, .L967+48
 	str	r1, [r3, #0]
-	ldr	r3, .L960+48
+	ldr	r3, .L967+52
 	str	r1, [r3, #0]
-	ldr	r3, .L960+52
+	ldr	r3, .L967+56
 	str	r1, [r3, #0]
-	ldr	r3, .L960+56
+	ldr	r3, .L967+60
 	str	r1, [r3, #0]
-	ldr	r3, .L960+60
+	ldr	r3, .L967+64
 	str	r1, [r3, #0]
-	ldr	r3, .L960+64
+	ldr	r3, .L967+68
 	str	r1, [r3, #0]
-	ldr	r3, .L960+68
+	ldr	r3, .L967+72
 	str	r1, [r3, #0]
-	ldr	r3, .L960+72
+	ldr	r3, .L967+76
 	str	r1, [r3, #0]
-	ldr	r3, .L960+76
+	ldr	r3, .L967+80
 	str	r1, [r3, #0]
 	movw	r3, #65535
 	str	r3, [r2, #0]
-	ldr	r2, .L960+80
+	ldr	r2, .L967+84
 	str	r1, [r2, #0]
-	ldr	r2, .L960+84
+	ldr	r2, .L967+88
 	str	r1, [r2, #0]
-	ldr	r2, .L960+88
+	ldr	r2, .L967+92
 	str	r1, [r2, #0]
-	ldr	r2, .L960+92
+	ldr	r2, .L967+96
 	strh	r3, [r2, #0]	@ movhi
-	ldr	r2, .L960+96
+	ldr	r2, .L967+100
 	strh	r3, [r2, #0]	@ movhi
 	movs	r2, #32
-	ldr	r3, .L960+100
+	ldr	r3, .L967+104
 	strh	r2, [r3, #0]	@ movhi
 	movs	r2, #128
-	ldr	r3, .L960+104
+	ldr	r3, .L967+108
 	strh	r2, [r3, #0]	@ movhi
-	ldr	r3, .L960+108
+	ldr	r3, .L967+112
 	strh	r1, [r3, #0]	@ movhi
-	ldr	r3, .L960+112
+	ldr	r3, .L967+116
 	strh	r1, [r3, #0]	@ movhi
-	ldr	r3, .L960+116
+	ldr	r3, .L967+120
+	strh	r1, [r3, #0]	@ movhi
+	ldr	r3, .L967+124
 	strh	r1, [r3, #0]	@ movhi
 	str	r1, [sp, #4]
 	bl	ftl_malloc
-	ldr	r3, .L960+120
+	ldr	r3, .L967+128
 	str	r0, [r3, #0]
 	ldrh	r0, [r4, #0]
 	muls	r0, r5, r0
 	bl	ftl_malloc
-	ldr	r3, .L960+124
+	ldr	r3, .L967+132
 	movs	r4, #36
 	str	r0, [r3, #0]
 	ldrh	r3, [r8, #0]
@@ -7837,24 +7944,24 @@ FtlMemInit:
 	lsls	r6, r4, #2
 	mov	r0, r6
 	bl	ftl_malloc
-	ldr	r3, .L960+128
+	ldr	r3, .L967+136
 	str	r0, [r3, #0]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L960+132
+	ldr	r3, .L967+140
 	str	r0, [r3, #0]
 	mov	r0, r6
 	bl	ftl_malloc
-	ldr	r3, .L960+136
-	ldr	r6, .L960+140
+	ldr	r3, .L967+144
+	ldr	r6, .L967+148
 	str	r0, [r3, #0]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L960+144
+	ldr	r3, .L967+152
 	str	r0, [r3, #0]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L960+148
+	ldr	r3, .L967+156
 	ldrh	r4, [r6, #0]
 	str	r0, [r3, #0]
 	mov	r0, r4
@@ -7863,153 +7970,158 @@ FtlMemInit:
 	adds	r3, r3, #1
 	str	r3, [r7, #0]
 	bl	ftl_malloc
-	ldr	r3, .L960+152
+	ldr	r3, .L967+160
 	str	r0, [r3, #0]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L960+156
+	ldr	r3, .L967+164
 	str	r0, [r3, #0]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L960+160
+	ldr	r3, .L967+168
 	str	r0, [r3, #0]
 	ldr	r0, [r7, #0]
 	muls	r0, r4, r0
 	bl	ftl_malloc
-	ldr	r3, .L960+164
+	ldr	r3, .L967+172
 	str	r0, [r3, #0]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L960+168
+	ldr	r3, .L967+176
 	str	r0, [r3, #0]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L960+172
-	ldr	r4, .L960+176
+	ldr	r3, .L967+180
+	ldr	r4, .L967+184
 	str	r0, [r3, #0]
 	ldr	r0, [r7, #0]
 	muls	r0, r5, r0
 	bl	ftl_malloc
-	ldr	r3, .L960+180
+	ldr	r3, .L967+188
 	ldrh	r8, [r8, #0]
 	str	r0, [r3, #0]
 	ldrh	r3, [r4, #0]
 	mul	r8, r8, r3
 	mov	r0, r8
 	bl	ftl_malloc
-	ldr	r3, .L960+184
+	ldr	r3, .L967+192
 	str	r0, [r3, #0]
 	lsl	r0, r8, #2
 	bl	ftl_malloc
-	ldr	r3, .L960+188
+	ldr	r3, .L967+196
 	str	r0, [r3, #0]
 	ldrh	r3, [r4, #0]
 	ldr	r0, [r7, #0]
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r4, .L960+192
-	ldr	r3, .L960+196
-	ldr	r7, .L960+200
+	ldr	r4, .L967+200
+	ldr	r3, .L967+204
+	ldr	r7, .L967+208
 	str	r0, [r3, #0]
 	ldrh	r0, [r4, #0]
 	lsls	r0, r0, #1
 	uxth	r0, r0
 	strh	r0, [r7, #0]	@ movhi
 	bl	ftl_malloc
-	ldr	r3, .L960+204
+	ldr	r3, .L967+212
 	str	r0, [r3, #0]
 	ldrh	r0, [r7, #0]
 	addw	r0, r0, #547
 	lsrs	r0, r0, #9
 	strh	r0, [r7, #0]	@ movhi
-	ldr	r7, .L960+208
+	ldr	r7, .L967+216
 	lsls	r0, r0, #9
 	bl	ftl_malloc
-	ldr	r3, .L960+212
+	ldr	r3, .L967+220
 	str	r0, [r3, #0]
 	adds	r0, r0, #32
-	ldr	r3, .L960+216
+	ldr	r3, .L967+224
 	str	r0, [r3, #0]
 	ldrh	r0, [r4, #0]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L960+220
+	ldr	r3, .L967+228
 	str	r0, [r3, #0]
 	ldr	r3, [r7, #0]
 	lsl	r8, r3, #1
 	mov	r0, r8
 	bl	ftl_malloc
-	ldr	r3, .L960+224
+	ldr	r3, .L967+232
 	str	r0, [r3, #0]
 	mov	r0, r8
 	bl	ftl_malloc
-	ldr	r3, .L960+228
-	ldr	r8, .L960+300
+	ldr	r3, .L967+236
+	ldr	r8, .L967+308
 	str	r0, [r3, #0]
 	ldrh	r0, [r4, #0]
 	lsrs	r0, r0, #3
 	adds	r0, r0, #4
 	bl	ftl_malloc
-	ldr	r3, .L960+232
+	ldr	r3, .L967+240
 	str	r0, [r3, #0]
 	ldrh	r0, [r8, #0]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L960+236
+	ldr	r3, .L967+244
 	str	r0, [r3, #0]
 	ldrh	r0, [r8, #0]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L960+240
+	ldr	r3, .L967+248
 	str	r0, [r3, #0]
 	ldrh	r0, [r8, #0]
-	ldr	r8, .L960+304
+	ldr	r8, .L967+312
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L960+244
+	ldr	r3, .L967+252
 	str	r0, [r3, #0]
 	ldrh	r0, [r8, #0]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L960+248
+	ldr	r3, .L967+256
 	ldrh	r2, [r8, #0]
 	ldr	r1, [sp, #4]
 	lsls	r2, r2, #2
 	str	r0, [r3, #0]
 	bl	memset
-	ldr	r3, .L960+252
-	ldrh	r0, [r3, #0]
-	lsls	r0, r0, #2
+	ldr	r3, .L967+260
+	ldrh	r8, [r3, #0]
+	lsl	r8, r8, #2
+	mov	r0, r8
+	bl	ftl_malloc
+	ldr	r3, .L967+264
+	str	r0, [r3, #0]
+	mov	r0, r8
 	bl	ftl_malloc
-	ldr	r3, .L960+256
+	ldr	r3, .L967+268
 	str	r0, [r3, #0]
 	ldr	r0, [r7, #0]
-	ldr	r7, .L960+260
+	ldr	r7, .L967+272
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L960+264
+	ldr	r3, .L967+276
 	str	r0, [r3, #0]
 	ldrh	r0, [r7, #0]
 	muls	r0, r5, r0
 	bl	ftl_malloc
-	ldr	r3, .L960+268
-	ldr	r5, .L960+272
+	ldr	r3, .L967+280
+	ldr	r5, .L967+284
 	str	r0, [r3, #0]
 	ldrh	r3, [r7, #0]
 	ldrh	r0, [r6, #0]
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L960+276
+	ldr	r3, .L967+288
 	str	r0, [r3, #0]
 	movs	r0, #6
 	ldrh	r3, [r4, #0]
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L960+280
-	ldr	r4, .L960+284
+	ldr	r3, .L967+292
+	ldr	r4, .L967+296
 	ldrh	r2, [r5, #0]
 	str	r0, [r3, #0]
-	ldr	r3, .L960+288
+	ldr	r3, .L967+300
 	ldrh	r3, [r3, #0]
 	adds	r3, r3, #31
 	lsrs	r3, r3, #5
@@ -8017,123 +8129,127 @@ FtlMemInit:
 	muls	r3, r2, r3
 	lsls	r0, r3, #2
 	bl	ftl_malloc
-	ldr	r2, .L960+292
-	ldrh	r4, [r4, #0]
-	movs	r1, #1
-	mov	r3, r2
-	ldrh	r5, [r5, #0]
-	lsls	r4, r4, #2
-	str	r0, [r3, #28]!
-	mov	r0, r4
-	b	.L956
-.L961:
+	b	.L968
+.L969:
 	.align	2
-.L960:
-	.word	.LANCHOR151
-	.word	.LANCHOR152
-	.word	.LANCHOR167
-	.word	.LANCHOR70
-	.word	.LANCHOR153
+.L967:
+	.word	.LANCHOR129
 	.word	.LANCHOR154
-	.word	.LANCHOR133
+	.word	.LANCHOR170
+	.word	.LANCHOR70
 	.word	.LANCHOR155
 	.word	.LANCHOR156
+	.word	.LANCHOR136
 	.word	.LANCHOR157
 	.word	.LANCHOR158
 	.word	.LANCHOR159
 	.word	.LANCHOR160
 	.word	.LANCHOR161
 	.word	.LANCHOR162
-	.word	.LANCHOR95
 	.word	.LANCHOR163
 	.word	.LANCHOR164
 	.word	.LANCHOR165
+	.word	.LANCHOR97
 	.word	.LANCHOR166
+	.word	.LANCHOR167
 	.word	.LANCHOR168
 	.word	.LANCHOR169
-	.word	.LANCHOR88
-	.word	.LANCHOR146
-	.word	.LANCHOR147
-	.word	.LANCHOR170
 	.word	.LANCHOR171
 	.word	.LANCHOR172
-	.word	.LANCHOR148
+	.word	.LANCHOR89
+	.word	.LANCHOR149
 	.word	.LANCHOR150
-	.word	.LANCHOR143
-	.word	.LANCHOR145
 	.word	.LANCHOR173
 	.word	.LANCHOR174
 	.word	.LANCHOR175
-	.word	.LANCHOR73
-	.word	.LANCHOR93
-	.word	.LANCHOR132
-	.word	.LANCHOR96
+	.word	.LANCHOR151
 	.word	.LANCHOR176
+	.word	.LANCHOR153
+	.word	.LANCHOR146
+	.word	.LANCHOR148
 	.word	.LANCHOR177
-	.word	.LANCHOR129
 	.word	.LANCHOR178
 	.word	.LANCHOR179
-	.word	.LANCHOR74
-	.word	.LANCHOR131
+	.word	.LANCHOR73
+	.word	.LANCHOR95
+	.word	.LANCHOR135
+	.word	.LANCHOR98
 	.word	.LANCHOR180
 	.word	.LANCHOR181
-	.word	.LANCHOR56
-	.word	.LANCHOR130
+	.word	.LANCHOR132
 	.word	.LANCHOR182
-	.word	.LANCHOR139
-	.word	.LANCHOR80
 	.word	.LANCHOR183
-	.word	.LANCHOR94
-	.word	.LANCHOR99
-	.word	.LANCHOR122
-	.word	.LANCHOR118
-	.word	.LANCHOR117
-	.word	.LANCHOR86
+	.word	.LANCHOR74
+	.word	.LANCHOR134
 	.word	.LANCHOR184
 	.word	.LANCHOR185
+	.word	.LANCHOR56
+	.word	.LANCHOR133
 	.word	.LANCHOR186
-	.word	.LANCHOR82
+	.word	.LANCHOR142
+	.word	.LANCHOR80
+	.word	.LANCHOR187
+	.word	.LANCHOR96
+	.word	.LANCHOR101
 	.word	.LANCHOR124
+	.word	.LANCHOR120
+	.word	.LANCHOR119
+	.word	.LANCHOR87
+	.word	.LANCHOR188
+	.word	.LANCHOR189
+	.word	.LANCHOR190
+	.word	.LANCHOR82
+	.word	.LANCHOR126
+	.word	.LANCHOR191
 	.word	.LANCHOR83
-	.word	.LANCHOR123
-	.word	.LANCHOR112
+	.word	.LANCHOR125
+	.word	.LANCHOR114
 	.word	.LANCHOR60
-	.word	.LANCHOR119
-	.word	.LANCHOR97
-	.word	.LANCHOR90
+	.word	.LANCHOR121
+	.word	.LANCHOR99
+	.word	.LANCHOR91
 	.word	.LANCHOR66
-	.word	.LANCHOR89
 	.word	.LANCHOR53
 	.word	.LANCHOR77
 	.word	.LANCHOR78
-.L957:
+.L968:
+	ldr	r2, .L970
+	ldrh	r4, [r4, #0]
+	movs	r1, #1
+	mov	r3, r2
+	ldrh	r5, [r5, #0]
+	lsls	r4, r4, #2
+	str	r0, [r3, #28]!
+	mov	r0, r4
+	b	.L963
+.L964:
 	ldr	r6, [r2, #28]
 	adds	r1, r1, #1
 	adds	r6, r6, r0
 	adds	r0, r0, r4
 	str	r6, [r3, #4]!
-.L956:
+.L963:
 	cmp	r1, r5
-	bcc	.L957
-	ldr	r0, .L962
+	bcc	.L964
+	ldr	r0, .L970
 	movs	r3, #0
 	mov	r2, r3
 	add	r0, r0, r1, lsl #2
-	b	.L958
-.L959:
+	b	.L965
+.L966:
 	adds	r4, r0, r3
 	adds	r1, r1, #1
 	adds	r3, r3, #4
 	str	r2, [r4, #28]
-.L958:
+.L965:
 	cmp	r1, #7
-	bls	.L959
+	bls	.L966
 	movs	r0, #0
 	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
-.L963:
+.L971:
 	.align	2
-.L962:
-	.word	.LANCHOR89
+.L970:
+	.word	.LANCHOR90
 	.size	FtlMemInit, .-FtlMemInit
 	.section	.text.NandcInit,"ax",%progbits
 	.align	1
@@ -8146,9 +8262,9 @@ NandcInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r2, #1
-	ldr	r3, .L965
+	ldr	r3, .L973
 	movs	r4, #0
-	ldr	r5, .L965+4
+	ldr	r5, .L973+4
 	stmia	r3, {r0, r4}
 	str	r2, [r3, #12]
 	movs	r2, #2
@@ -8159,19 +8275,19 @@ NandcInit:
 	str	r2, [r3, #28]
 	str	r0, [r3, #24]
 	str	r0, [r5, #0]
-	ldr	r2, .L965+8
+	ldr	r2, .L973+8
 	ldr	r3, [r0, #0]
 	and	r3, r3, #253952
 	ubfx	r1, r3, #13, #1
 	str	r1, [r2, #0]
-	ldr	r2, .L965+12
+	ldr	r2, .L973+12
 	and	r3, r3, #245760
 	ldr	r1, [r0, #352]
 	orr	r3, r3, #256
 	ubfx	r1, r1, #16, #4
 	str	r1, [r2, #0]
 	ldr	r1, [r0, #352]
-	ldr	r2, .L965+16
+	ldr	r2, .L973+16
 	str	r1, [r2, #0]
 	str	r3, [r0, #0]
 	str	r4, [r0, #336]
@@ -8181,29 +8297,29 @@ NandcInit:
 	movw	r2, #8322
 	mov	r0, #36864
 	str	r2, [r3, #344]
-	ldr	r2, .L965+20
+	ldr	r2, .L973+20
 	str	r2, [r3, #304]
 	bl	ftl_malloc
-	ldr	r3, .L965+24
+	ldr	r3, .L973+24
 	str	r0, [r3, #0]
-	ldr	r3, .L965+28
+	ldr	r3, .L973+28
 	str	r0, [r3, #0]
 	add	r0, r0, #32768
 	str	r4, [r3, #24]
 	str	r0, [r3, #4]
-	ldr	r3, .L965+32
+	ldr	r3, .L973+32
 	str	r4, [r3, #0]
 	pop	{r3, r4, r5, pc}
-.L966:
+.L974:
 	.align	2
-.L965:
+.L973:
 	.word	.LANCHOR5
 	.word	.LANCHOR30
-	.word	.LANCHOR187
+	.word	.LANCHOR192
 	.word	.LANCHOR37
 	.word	.LANCHOR40
 	.word	1710593
-	.word	.LANCHOR188
+	.word	.LANCHOR193
 	.word	.LANCHOR38
 	.word	.LANCHOR39
 	.size	NandcInit, .-NandcInit
@@ -8292,12 +8408,12 @@ rk_ftl_get_capacity:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L973
+	ldr	r3, .L981
 	ldr	r0, [r3, #0]
 	bx	lr
-.L974:
+.L982:
 	.align	2
-.L973:
+.L981:
 	.word	.LANCHOR84
 	.size	rk_ftl_get_capacity, .-rk_ftl_get_capacity
 	.section	.text.rknand_print_hex,"ax",%progbits
@@ -8316,49 +8432,49 @@ rknand_print_hex:
 	mov	r5, r2
 	mov	r8, r3
 	mov	r6, r7
-	b	.L976
-.L982:
-	cbnz	r7, .L977
-	ldr	r0, .L984
+	b	.L984
+.L990:
+	cbnz	r7, .L985
+	ldr	r0, .L992
 	mov	r1, sl
 	mov	r2, r6
 	bl	printf
-.L977:
+.L985:
 	cmp	r5, #4
-	ldr	r0, .L984+4
-	bne	.L978
+	ldr	r0, .L992+4
+	bne	.L986
 	ldr	r1, [r4, r6, lsl #2]
-	b	.L983
-.L978:
+	b	.L991
+.L986:
 	cmp	r5, #2
 	ite	eq
 	ldrsheq	r1, [r4, r6, lsl #1]
 	ldrbne	r1, [r4, r6]	@ zero_extendqisi2
-.L983:
+.L991:
 	adds	r7, r7, #1
 	bl	printf
 	cmp	r7, #15
-	bls	.L981
-	ldr	r0, .L984+8
+	bls	.L989
+	ldr	r0, .L992+8
 	movs	r7, #0
-	ldr	r1, .L984+12
+	ldr	r1, .L992+12
 	bl	printf
-.L981:
+.L989:
 	adds	r6, r6, #1
-.L976:
+.L984:
 	cmp	r6, r8
-	bne	.L982
-	ldr	r0, .L984+8
-	ldr	r1, .L984+12
+	bne	.L990
+	ldr	r0, .L992+8
+	ldr	r1, .L992+12
 	pop	{r3, r4, r5, r6, r7, r8, sl, lr}
 	b	printf
-.L985:
+.L993:
 	.align	2
-.L984:
-	.word	.LC12
+.L992:
 	.word	.LC13
-	.word	.LC10
 	.word	.LC14
+	.word	.LC10
+	.word	.LC15
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.FlashReadSlc2KPages,"ax",%progbits
 	.align	1
@@ -8369,7 +8485,7 @@ rknand_print_hex:
 FlashReadSlc2KPages:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1000
+	ldr	r3, .L1008
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	sub	sp, sp, #24
 	mov	r7, r1
@@ -8377,9 +8493,9 @@ FlashReadSlc2KPages:
 	str	r2, [sp, #12]
 	mov	r4, r0
 	movs	r6, #0
-	ldr	sl, .L1000+28
-	b	.L987
-.L996:
+	ldr	sl, .L1008+28
+	b	.L995
+.L1004:
 	subs	r3, r7, r6
 	ldr	r1, [sp, #12]
 	add	r2, sp, #20
@@ -8388,16 +8504,16 @@ FlashReadSlc2KPages:
 	str	r3, [sp, #0]
 	add	r3, sp, #16
 	bl	LogAddr2PhyAddr
-	ldr	r1, .L1000+4
+	ldr	r1, .L1008+4
 	ldr	r3, [sp, #16]
 	ldrb	r2, [r1, #0]	@ zero_extendqisi2
 	cmp	r3, r2
-	bcc	.L988
+	bcc	.L996
 	mov	r3, #-1
 	str	r3, [r4, #0]
-	b	.L989
-.L988:
-	ldr	r2, .L1000+8
+	b	.L997
+.L996:
+	ldr	r2, .L1008+8
 	ldrb	r5, [r2, r3]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	NandcWaitFlashReady
@@ -8422,13 +8538,13 @@ FlashReadSlc2KPages:
 	mov	r0, r5
 	bl	FlashReadCmd
 	ldr	r3, [r4, #8]
-	cbz	r3, .L990
+	cbz	r3, .L998
 	add	r3, r3, #2048
-.L990:
+.L998:
 	ldr	r2, [r4, #12]
-	cbz	r2, .L991
+	cbz	r2, .L999
 	adds	r2, r2, #8
-.L991:
+.L999:
 	movs	r1, #0
 	str	r2, [sp, #0]
 	mov	r0, r5
@@ -8438,7 +8554,7 @@ FlashReadSlc2KPages:
 	mov	r0, r5
 	str	r3, [sp, #8]
 	bl	NandcFlashDeCs
-	ldr	r2, .L1000+12
+	ldr	r2, .L1008+12
 	ldr	r3, [sp, #8]
 	ldrb	r2, [r2, #0]	@ zero_extendqisi2
 	cmp	r3, fp
@@ -8446,70 +8562,70 @@ FlashReadSlc2KPages:
 	movcc	r3, fp
 	add	r2, r2, r2, lsl #1
 	cmp	r3, r2, lsr #2
-	bls	.L992
+	bls	.L1000
 	cmp	r3, #-1
 	ite	eq
 	moveq	r3, #-1
 	movne	r3, #256
-.L992:
+.L1000:
 	adds	r2, r3, #1
 	str	r3, [r4, #0]
-	beq	.L993
+	beq	.L1001
 	cmp	r3, #256
-	beq	.L993
+	beq	.L1001
 	movs	r3, #0
 	str	r3, [r4, #0]
-.L993:
+.L1001:
 	ldr	r3, [r4, #12]
-	cbz	r3, .L994
+	cbz	r3, .L1002
 	ldr	r2, [r3, #8]
 	adds	r0, r2, #1
-	bne	.L994
+	bne	.L1002
 	ldr	r3, [r3, #0]
 	adds	r3, r3, #1
 	it	ne
 	strne	r2, [r4, #0]
-.L994:
+.L1002:
 	ldr	r3, [r4, #0]
 	adds	r1, r3, #1
-	bne	.L989
-	ldr	r2, .L1000+12
+	bne	.L997
+	ldr	r2, .L1008+12
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1000+16
+	ldr	r0, .L1008+16
 	ldrb	r2, [r2, #0]	@ zero_extendqisi2
 	bl	printf
 	ldr	r1, [r4, #8]
-	cbz	r1, .L995
-	ldr	r0, .L1000+20
+	cbz	r1, .L1003
+	ldr	r0, .L1008+20
 	movs	r2, #4
 	movs	r3, #8
 	bl	rknand_print_hex
-.L995:
+.L1003:
 	ldr	r1, [r4, #12]
-	cbz	r1, .L989
+	cbz	r1, .L997
 	movs	r2, #4
-	ldr	r0, .L1000+24
+	ldr	r0, .L1008+24
 	mov	r3, r2
 	bl	rknand_print_hex
-.L989:
+.L997:
 	adds	r6, r6, #1
 	adds	r4, r4, #36
-.L987:
+.L995:
 	cmp	r6, r7
-	bne	.L996
+	bne	.L1004
 	movs	r0, #0
 	add	sp, sp, #24
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1001:
+.L1009:
 	.align	2
-.L1000:
+.L1008:
 	.word	.LANCHOR18
 	.word	.LANCHOR16
 	.word	.LANCHOR19
 	.word	.LANCHOR29
-	.word	.LC15
 	.word	.LC16
 	.word	.LC17
+	.word	.LC18
 	.word	.LANCHOR2
 	.size	FlashReadSlc2KPages, .-FlashReadSlc2KPages
 	.section	.text.FlashReadPages,"ax",%progbits
@@ -8521,24 +8637,24 @@ FlashReadSlc2KPages:
 FlashReadPages:
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1050
+	ldr	r3, .L1058
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	sub	sp, sp, #48
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
 	str	r0, [sp, #12]
 	str	r1, [sp, #32]
 	str	r3, [sp, #28]
-	ldr	r3, .L1050+4
+	ldr	r3, .L1058+4
 	str	r2, [sp, #20]
 	ldrb	r4, [r3, #0]	@ zero_extendqisi2
 	str	r4, [sp, #36]
-	ldr	r4, .L1050+8
+	ldr	r4, .L1058+8
 	ldrb	r4, [r4, #0]	@ zero_extendqisi2
 	cmp	r4, #0
-	beq	.L1036
+	beq	.L1044
 	bl	FlashReadSlc2KPages
-	b	.L1004
-.L1035:
+	b	.L1012
+.L1043:
 	movs	r3, #36
 	ldr	r4, [sp, #12]
 	add	r2, sp, #44
@@ -8554,99 +8670,99 @@ FlashReadPages:
 	str	r3, [sp, #0]
 	add	r3, sp, #40
 	bl	LogAddr2PhyAddr
-	ldr	r2, .L1050+12
+	ldr	r2, .L1058+12
 	ldr	r3, [sp, #40]
 	ldrb	r2, [r2, #0]	@ zero_extendqisi2
 	cmp	r3, r2
 	mov	r8, r0
-	bcc	.L1005
+	bcc	.L1013
 	ldr	r1, [sp, #12]
 	mov	r3, #-1
 	ldr	r4, [sp, #16]
 	str	r3, [r1, r4]
-	b	.L1006
-.L1005:
-	ldr	r2, .L1050+16
+	b	.L1014
+.L1013:
+	ldr	r2, .L1058+16
 	ldrb	r4, [r2, r3]	@ zero_extendqisi2
-	ldr	r3, .L1050+20
+	ldr	r3, .L1058+20
 	mov	r0, r4
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	cmp	r3, #0
 	it	eq
 	moveq	r8, #0
 	bl	NandcWaitFlashReady
-	ldr	r3, .L1050+24
+	ldr	r3, .L1058+24
 	ldr	r3, [r3, #0]
 	ldrb	r0, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r0, #1
 	cmp	r3, #6
-	bhi	.L1008
-	ldr	r2, .L1050+28
+	bhi	.L1016
+	ldr	r2, .L1058+28
 	cmp	r0, #7
 	add	r1, r2, r4
 	ldrb	r3, [r1, #12]	@ zero_extendqisi2
 	it	eq
 	ldrbeq	r3, [r1, #20]	@ zero_extendqisi2
-	ldr	r1, .L1050+32
+	ldr	r1, .L1058+32
 	ldrb	r1, [r1, r4]	@ zero_extendqisi2
 	cmp	r1, r3
-	beq	.L1008
+	beq	.L1016
 	ldrb	r1, [r2, #1]	@ zero_extendqisi2
 	mov	r0, r4
-	ldr	r2, .L1050+36
+	ldr	r2, .L1058+36
 	bl	HynixSetRRPara
-.L1008:
+.L1016:
 	mov	r0, r4
 	and	r5, r5, #-2147483648
 	str	r5, [sp, #24]
 	bl	NandcFlashCs
 	ldr	r2, [sp, #20]
 	cmp	r2, #1
-	beq	.L1010
+	beq	.L1018
 	ldr	r5, [sp, #24]
-	cbz	r5, .L1011
-.L1010:
-	ldr	r3, .L1050+40
+	cbz	r5, .L1019
+.L1018:
+	ldr	r3, .L1058+40
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1011
+	cbz	r3, .L1019
 	mov	r0, r4
 	bl	flash_enter_slc_mode
-	b	.L1012
-.L1011:
+	b	.L1020
+.L1019:
 	mov	r0, r4
 	bl	flash_exit_slc_mode
-.L1012:
+.L1020:
 	mov	r5, r7
 	movs	r6, #0
 	mov	r7, r8
-.L1049:
+.L1057:
 	ldr	r1, [sp, #44]
 	adds	r2, r1, #1
-	bne	.L1014
+	bne	.L1022
 	cmp	r4, #255
-	beq	.L1038
-.L1014:
-	cbz	r7, .L1016
-	ldr	r3, .L1050+44
+	beq	.L1046
+.L1022:
+	cbz	r7, .L1024
+	ldr	r3, .L1058+44
 	mov	r0, r4
 	ldr	r2, [r3, #0]
 	adds	r2, r1, r2
 	bl	FlashReadDpCmd
-	b	.L1017
-.L1016:
+	b	.L1025
+.L1024:
 	mov	r0, r4
 	bl	FlashReadCmd
-.L1017:
+.L1025:
 	mov	r0, r4
 	bl	NandcWaitFlashReady
-	cbz	r7, .L1015
+	cbz	r7, .L1023
 	mov	r0, r4
 	ldr	r1, [sp, #44]
 	bl	FlashReadDpDataOutCmd
-	b	.L1015
-.L1038:
+	b	.L1023
+.L1046:
 	movs	r7, #0
-.L1015:
+.L1023:
 	ldr	r3, [r5, #12]
 	movs	r1, #0
 	mov	r0, r4
@@ -8654,22 +8770,22 @@ FlashReadPages:
 	str	r3, [sp, #0]
 	ldr	r3, [r5, #8]
 	bl	NandcXferData
-	ldr	r1, .L1050+4
+	ldr	r1, .L1058+4
 	ldrb	r3, [r1, #0]	@ zero_extendqisi2
-	cbz	r3, .L1040
+	cbz	r3, .L1048
 	adds	r3, r0, #1
-	bne	.L1040
+	bne	.L1048
 	strb	r6, [r1, #0]
 	movs	r7, #0
-	b	.L1049
-.L1040:
+	b	.L1057
+.L1048:
 	mov	r8, r7
 	mov	r7, r5
 	mov	r6, r8
 	mov	r5, r0
 	cmp	r8, #0
-	beq	.L1019
-	ldr	r2, .L1050+44
+	beq	.L1027
+	ldr	r2, .L1058+44
 	mov	r0, r4
 	ldr	r3, [sp, #44]
 	ldr	r1, [r2, #0]
@@ -8691,18 +8807,18 @@ FlashReadPages:
 	ite	ne
 	movne	r6, r8
 	moveq	r6, #0
-.L1019:
+.L1027:
 	mov	r0, r4
 	bl	NandcFlashDeCs
 	ldr	r3, [sp, #36]
-	ldr	r2, .L1050+4
+	ldr	r2, .L1058+4
 	adds	r0, r5, #1
 	strb	r3, [r2, #0]
-	bne	.L1023
-	ldr	r3, .L1050+48
+	bne	.L1031
+	ldr	r3, .L1058+48
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1021
-	ldr	r3, .L1050+52
+	cbz	r3, .L1029
+	ldr	r3, .L1058+52
 	mov	r0, r4
 	ldr	r1, [sp, #44]
 	ldr	r3, [r3, #0]
@@ -8714,73 +8830,73 @@ FlashReadPages:
 	bl	FlashDdrTunningRead
 	adds	r1, r0, #1
 	mov	r5, r0
-	beq	.L1022
-	ldr	r3, .L1050+56
+	beq	.L1030
+	ldr	r3, .L1058+56
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	cmp	r0, r3, lsr #1
-	bls	.L1043
-.L1022:
+	bls	.L1051
+.L1030:
 	ubfx	r0, r6, #8, #8
 	bl	NandcSetDdrPara
 	adds	r2, r5, #1
-	bne	.L1043
-.L1021:
-	ldr	r3, .L1050+60
+	bne	.L1051
+.L1029:
+	ldr	r3, .L1058+60
 	mov	r0, r4
 	ldr	r1, [sp, #44]
 	ldr	r2, [r7, #8]
 	ldr	r6, [r3, #0]
 	ldr	r3, [r7, #12]
 	cmp	r6, #0
-	beq	.L1024
+	beq	.L1032
 	blx	r6
 	adds	r3, r0, #1
 	mov	r5, r0
-	bne	.L1045
-	ldr	r3, .L1050+24
+	bne	.L1053
+	ldr	r3, .L1058+24
 	ldr	r3, [r3, #0]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	cmp	r3, #6
-	bhi	.L1026
-	ldr	r2, .L1050+28
+	bhi	.L1034
+	ldr	r2, .L1058+28
 	mov	r0, r4
 	movs	r3, #0
 	ldrb	r1, [r2, #1]	@ zero_extendqisi2
 	adds	r2, r2, #4
 	bl	HynixSetRRPara
-.L1026:
+.L1034:
 	ldr	r1, [sp, #44]
 	mov	r0, r4
 	ldr	r2, [r7, #8]
 	ldr	r3, [r7, #12]
 	bl	FlashReadRawPage
-	ldr	r3, .L1050+56
+	ldr	r3, .L1058+56
 	ldr	r1, [r7, #4]
 	ldrb	r2, [r3, #0]	@ zero_extendqisi2
 	mov	r5, r0
-	ldr	r0, .L1050+64
+	ldr	r0, .L1058+64
 	mov	r3, r5
 	bl	printf
 	adds	r6, r5, #1
-	bne	.L1045
-	ldr	r3, .L1050+40
+	bne	.L1053
+	ldr	r3, .L1058+40
 	ldrb	r6, [r3, #0]	@ zero_extendqisi2
 	cmp	r6, #0
-	beq	.L1025
+	beq	.L1033
 	ldr	r1, [sp, #20]
 	mov	r0, r4
 	cmp	r1, #1
-	beq	.L1027
+	beq	.L1035
 	ldr	r2, [sp, #24]
-	cbz	r2, .L1028
-.L1027:
+	cbz	r2, .L1036
+.L1035:
 	bl	flash_enter_slc_mode
-	b	.L1029
-.L1028:
+	b	.L1037
+.L1036:
 	bl	flash_exit_slc_mode
-.L1029:
-	ldr	r3, .L1050+60
+.L1037:
+	ldr	r3, .L1058+60
 	mov	r0, r4
 	ldr	r1, [sp, #44]
 	ldr	r2, [r7, #8]
@@ -8788,20 +8904,20 @@ FlashReadPages:
 	ldr	r3, [r7, #12]
 	blx	r5
 	mov	r5, r0
-	b	.L1045
-.L1024:
+	b	.L1053
+.L1032:
 	bl	FlashReadRawPage
 	mov	r5, r0
-	b	.L1025
-.L1051:
+	b	.L1033
+.L1059:
 	.align	2
-.L1050:
+.L1058:
 	.word	.LANCHOR18
 	.word	.LANCHOR4
 	.word	.LANCHOR0
 	.word	.LANCHOR16
 	.word	.LANCHOR19
-	.word	.LANCHOR189
+	.word	.LANCHOR194
 	.word	.LANCHOR23
 	.word	.LANCHOR31
 	.word	.LANCHOR32
@@ -8812,109 +8928,109 @@ FlashReadPages:
 	.word	.LANCHOR30
 	.word	.LANCHOR29
 	.word	.LANCHOR51
-	.word	.LC18
-.L1043:
+	.word	.LC19
+.L1051:
 	movs	r6, #0
-.L1023:
-	ldr	r3, .L1052
+.L1031:
+	ldr	r3, .L1060
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r5, r3, lsr #2
-	bls	.L1025
-	ldr	r3, .L1052+4
+	bls	.L1033
+	ldr	r3, .L1060+4
 	ldr	r3, [r3, #0]
 	cmp	r3, #0
 	it	eq
 	moveq	r5, #256
-	b	.L1025
-.L1045:
+	b	.L1033
+.L1053:
 	movs	r6, #0
-.L1025:
+.L1033:
 	ldr	r1, [sp, #12]
 	adds	r0, r5, #1
 	ldr	r3, [sp, #16]
 	str	r5, [r1, r3]
-	beq	.L1030
+	beq	.L1038
 	cmp	r5, #256
-	beq	.L1030
+	beq	.L1038
 	ldr	r2, [sp, #16]
 	movs	r3, #0
 	str	r3, [r1, r2]
-.L1030:
+.L1038:
 	ldr	r1, [sp, #16]
 	ldr	r2, [sp, #12]
 	ldr	r3, [r2, r1]
 	adds	r1, r3, #1
-	bne	.L1031
-	ldr	r2, .L1052
+	bne	.L1039
+	ldr	r2, .L1060
 	ldr	r1, [r7, #4]
-	ldr	r0, .L1052+8
+	ldr	r0, .L1060+8
 	ldrb	r2, [r2, #0]	@ zero_extendqisi2
 	bl	printf
 	ldr	r1, [r7, #12]
-	cbz	r1, .L1031
+	cbz	r1, .L1039
 	movs	r2, #4
-	ldr	r0, .L1052+12
+	ldr	r0, .L1060+12
 	mov	r3, r2
 	bl	rknand_print_hex
-.L1031:
-	cbz	r6, .L1032
-	ldr	r3, .L1052
+.L1039:
+	cbz	r6, .L1040
+	ldr	r3, .L1060
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	sl, r3, lsr #2
-	bls	.L1033
-	ldr	r3, .L1052+4
+	bls	.L1041
+	ldr	r3, .L1060+4
 	ldr	r3, [r3, #0]
 	cmp	r3, #0
 	it	eq
 	moveq	sl, #256
-.L1033:
+.L1041:
 	ldr	r1, [sp, #12]
 	movs	r2, #36
 	add	r3, fp, #1
 	muls	r3, r2, r3
 	cmp	sl, #-1
 	str	sl, [r1, r3]
-	beq	.L1032
+	beq	.L1040
 	cmp	sl, #256
-	beq	.L1032
+	beq	.L1040
 	movs	r2, #0
 	str	r2, [r1, r3]
-.L1032:
+.L1040:
 	ldr	r2, [sp, #20]
 	add	fp, fp, r6
 	cmp	r2, #1
-	beq	.L1034
+	beq	.L1042
 	ldr	r3, [sp, #24]
-	cbz	r3, .L1006
-.L1034:
-	ldr	r3, .L1052+16
+	cbz	r3, .L1014
+.L1042:
+	ldr	r3, .L1060+16
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1006
+	cbz	r3, .L1014
 	mov	r0, r4
 	bl	flash_exit_slc_mode
-.L1006:
+.L1014:
 	add	fp, fp, #1
-	b	.L1003
-.L1036:
+	b	.L1011
+.L1044:
 	mov	sl, r4
 	mov	fp, r4
-.L1003:
+.L1011:
 	ldr	r4, [sp, #32]
 	cmp	fp, r4
-	bcc	.L1035
+	bcc	.L1043
 	movs	r0, #0
-.L1004:
+.L1012:
 	add	sp, sp, #48
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1053:
+.L1061:
 	.align	2
-.L1052:
+.L1060:
 	.word	.LANCHOR29
 	.word	.LANCHOR51
-	.word	.LC15
-	.word	.LC17
+	.word	.LC16
+	.word	.LC18
 	.word	.LANCHOR7
 	.size	FlashReadPages, .-FlashReadPages
 	.section	.text.FtlGcScanTempBlk,"ax",%progbits
@@ -8926,187 +9042,194 @@ FlashReadPages:
 FtlGcScanTempBlk:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1078
+	ldr	r3, .L1085
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r5, r0
-	ldrh	r4, [r3, #0]
+	mov	r4, r0
+	ldrh	r5, [r3, #0]
 	movw	r3, #65535
 	sub	sp, sp, #24
-	cmp	r4, r3
-	beq	.L1072
-	cbnz	r4, .L1055
-	b	.L1056
-.L1072:
-	movs	r4, #0
-.L1055:
-	ldr	r3, .L1078+4
+	cmp	r5, r3
+	beq	.L1081
+	cbnz	r5, .L1063
+	b	.L1064
+.L1081:
+	movs	r5, #0
+.L1063:
+	ldr	r3, .L1085+4
 	ldrh	r3, [r3, #0]
 	cmp	r1, r3
-	bne	.L1057
-.L1056:
+	bne	.L1065
+.L1064:
 	bl	FtlGcPageVarInit
-.L1057:
-	mov	sl, #-1
-	movw	r8, #65535
-.L1069:
-	ldrh	r3, [r5, #0]
+.L1065:
+	ldr	r8, .L1085+44
+	movw	sl, #65535
+	mov	r3, #-1
+	str	r3, [sp, #20]
+.L1078:
+	ldrh	r3, [r4, #0]
 	movs	r2, #0
-	strb	r2, [r5, #8]
-	cmp	r3, r8
-	beq	.L1058
-.L1059:
-	mov	fp, sl
-.L1076:
-	ldr	r3, .L1078+8
-	ldr	r2, .L1078+12
-	ldr	r0, .L1078+16
+	strb	r2, [r4, #8]
+	cmp	r3, sl
+	beq	.L1066
+.L1067:
+	mov	r7, r4
+.L1083:
+	ldr	r3, .L1085+8
+	mov	r2, r7
+	ldr	r6, .L1085+12
+	ldr	ip, [r8, #0]
 	ldr	lr, [r3, #0]
-	ldr	r3, .L1078+20
-	ldr	ip, [r2, #0]
-	mov	r2, r5
-	ldrh	sl, [r0, #0]
-	ldrh	r7, [r3, #0]
+	ldr	r3, .L1085+16
+	ldrh	fp, [r6, #0]
+	ldrh	r6, [r3, #0]
 	movs	r3, #0
-	mov	r6, r3
-	str	ip, [sp, #8]
-	str	r5, [sp, #4]
-	b	.L1060
-.L1062:
+	mov	r4, r3
+	stmia	sp, {r6, ip}
+	b	.L1068
+.L1070:
 	ldrh	r0, [r2, #16]
-	cmp	r0, r8
-	beq	.L1061
-	ldr	r5, [sp, #8]
+	cmp	r0, sl
+	beq	.L1069
+	ldr	r6, [sp, #4]
 	mov	ip, #36
-	orr	r0, r4, r0, lsl #10
-	mla	r1, ip, r6, r5
+	orr	r0, r5, r0, lsl #10
+	mla	r1, ip, r4, r6
+	ldr	r6, [sp, #0]
 	str	r0, [r1, #4]
 	movs	r0, #0
 	str	r0, [r1, #8]
-	mul	r0, r7, r6
-	adds	r6, r6, #1
-	uxth	r6, r6
+	mul	r0, r6, r4
+	adds	r4, r4, #1
+	uxth	r4, r4
 	bic	r0, r0, #3
 	add	r0, lr, r0
 	str	r0, [r1, #12]
-.L1061:
+.L1069:
 	adds	r3, r3, #1
 	adds	r2, r2, #2
 	uxth	r3, r3
-.L1060:
-	cmp	r3, sl
-	bne	.L1062
-	ldr	r2, .L1078+12
-	mov	r1, r6
-	movs	r7, #0
-	ldr	r5, [sp, #4]
-	mov	sl, r7
-	ldr	r0, [r2, #0]
+.L1068:
+	cmp	r3, fp
+	bne	.L1070
+	ldr	r0, [r8, #0]
+	mov	r1, r4
 	movs	r2, #0
+	movs	r6, #0
 	bl	FlashReadPages
-	b	.L1063
-.L1070:
-	ldr	r0, .L1078+12
-	ldr	r3, [r0, #0]
-	adds	r2, r3, r7
+	mov	fp, r6
+	b	.L1071
+.L1079:
+	ldr	r3, [r8, #0]
+	adds	r2, r3, r6
 	ldr	r1, [r2, #4]
-	str	r2, [sp, #20]
+	str	r2, [sp, #16]
 	ubfx	r0, r1, #10, #16
-	str	r3, [sp, #16]
-	str	r1, [sp, #12]
+	str	r3, [sp, #12]
+	str	r1, [sp, #8]
 	bl	P2V_plane
-	ldr	r3, [sp, #16]
-	ldr	r1, [sp, #12]
-	ldr	r2, [sp, #20]
-	ldr	r3, [r3, r7]
-	cbnz	r3, .L1064
+	ldr	r3, [sp, #12]
+	ldr	r1, [sp, #8]
+	ldr	r2, [sp, #16]
+	ldr	r3, [r3, r6]
+	cbnz	r3, .L1072
 	ldr	r3, [r2, #12]
-	adds	r7, r7, #36
+	adds	r6, r6, #36
 	ldrh	r2, [r3, #0]
-	cmp	r2, r8
-	bne	.L1065
-	ldr	r3, .L1078+24
+	cmp	r2, sl
+	bne	.L1073
+	ldr	r3, .L1085+20
 	movs	r1, #1
 	mov	r2, r0
-	mov	sl, fp
+	mov	r4, r7
 	str	r1, [r3, #0]
-	b	.L1058
-.L1065:
-	add	sl, sl, #1
+	b	.L1066
+.L1073:
+	add	fp, fp, #1
 	ldr	r0, [r3, #12]
 	ldr	r2, [r3, #8]
 	bl	FtlGcUpdatePage
-	uxth	sl, sl
-	b	.L1063
-.L1064:
-	ldr	r2, .L1078+28
-	mov	sl, fp
-	ldr	r2, [r2, #0]
-	cbnz	r2, .L1066
-	ldr	r2, .L1078+32
-	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	cbz	r2, .L1067
-.L1066:
-	ldr	r2, .L1078+36
-	ldrh	r0, [r5, #0]
-	ldr	r2, [r2, #0]
-	ldrh	r2, [r2, r0, lsl #1]
-	cmp	r2, #119
-	bls	.L1074
-.L1067:
-	cmp	r3, #-1
-	it	eq
-	moveq	sl, r1
-	b	.L1068
+	uxth	fp, fp
+	b	.L1071
+.L1072:
+	mov	fp, r1
+	ldr	r0, .L1085+24
+	ldrh	r1, [r7, #0]
+	mov	r2, fp
+	bl	printf
+	ldr	r3, .L1085+28
+	mov	r4, r7
+	ldr	r3, [r3, #0]
+	cbnz	r3, .L1074
+	ldr	r3, .L1085+32
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L1075
 .L1074:
-	mov	sl, r1
-.L1068:
-	ldr	r3, .L1078+40
-	movs	r4, #0
-	ldrh	r2, [r5, #0]
+	ldr	r3, .L1085+36
+	ldrh	r2, [r4, #0]
 	ldr	r3, [r3, #0]
-	strh	r4, [r3, r2, lsl #1]	@ movhi
-	ldrh	r0, [r5, #0]
+	ldrh	r3, [r3, r2, lsl #1]
+	cmp	r3, #119
+	bls	.L1076
+.L1075:
+	ldr	r3, [r8, #0]
+	ldr	r3, [r3, r6]
+	adds	r3, r3, #1
+	bne	.L1077
+.L1076:
+	ldr	r3, [r8, #0]
+	adds	r6, r3, r6
+	ldr	r6, [r6, #4]
+	str	r6, [sp, #20]
+.L1077:
+	ldr	r3, .L1085+40
+	movs	r5, #0
+	ldrh	r2, [r4, #0]
+	ldr	r3, [r3, #0]
+	strh	r5, [r3, r2, lsl #1]	@ movhi
+	ldrh	r0, [r4, #0]
 	bl	INSERT_FREE_LIST
-	strh	r8, [r5, #0]	@ movhi
+	strh	sl, [r4, #0]	@ movhi
 	bl	FtlGcPageVarInit
-	b	.L1069
-.L1063:
-	cmp	sl, r6
-	bne	.L1070
-	ldr	r3, .L1078+4
-	adds	r4, r4, #1
-	uxth	r4, r4
+	b	.L1078
+.L1071:
+	cmp	fp, r4
+	bne	.L1079
+	ldr	r3, .L1085+4
+	adds	r5, r5, #1
+	uxth	r5, r5
 	ldrh	r3, [r3, #0]
-	cmp	r3, r4
-	bhi	.L1076
-	mov	sl, fp
+	cmp	r3, r5
+	bhi	.L1083
+	mov	r4, r7
 	movs	r2, #0
-.L1058:
-	ldr	r3, .L1078
-	mov	r0, r5
+.L1066:
+	ldr	r3, .L1085
+	mov	r0, r4
 	movw	r1, #65535
-	strh	r4, [r5, #2]	@ movhi
-	strb	r2, [r5, #6]
+	strh	r5, [r4, #2]	@ movhi
+	strb	r2, [r4, #6]
 	strh	r1, [r3, #0]	@ movhi
-	mov	r1, r4
+	mov	r1, r5
 	bl	ftl_sb_update_avl_pages
-	mov	r0, sl
+	ldr	r0, [sp, #20]
 	add	sp, sp, #24
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1079:
+.L1086:
 	.align	2
-.L1078:
-	.word	.LANCHOR190
+.L1085:
+	.word	.LANCHOR195
 	.word	.LANCHOR68
-	.word	.LANCHOR130
-	.word	.LANCHOR173
+	.word	.LANCHOR133
 	.word	.LANCHOR53
 	.word	.LANCHOR74
-	.word	.LANCHOR137
-	.word	.LANCHOR126
+	.word	.LANCHOR140
+	.word	.LC20
+	.word	.LANCHOR128
 	.word	.LANCHOR7
-	.word	.LANCHOR94
-	.word	.LANCHOR99
+	.word	.LANCHOR96
+	.word	.LANCHOR101
+	.word	.LANCHOR177
 	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
 	.section	.text.FtlScanSysBlk,"ax",%progbits
 	.align	1
@@ -9117,49 +9240,49 @@ FtlGcScanTempBlk:
 FtlScanSysBlk:
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1141
+	ldr	r3, .L1148
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	movs	r4, #0
-	ldr	r5, .L1141+4
+	ldr	r5, .L1148+4
 	sub	sp, sp, #40
 	strh	r4, [r3, #0]	@ movhi
 	mov	r1, r4
-	ldr	r3, .L1141+8
+	ldr	r3, .L1148+8
 	ldr	r2, [r5, #0]
-	ldr	r7, .L1141+12
+	ldr	r7, .L1148+12
 	strh	r4, [r3, #0]	@ movhi
-	ldr	r3, .L1141+16
+	ldr	r3, .L1148+16
 	lsls	r2, r2, #2
 	ldr	r0, [r3, #0]
 	bl	memset
 	ldr	r2, [r5, #0]
-	ldr	r3, .L1141+20
+	ldr	r3, .L1148+20
 	mov	r1, r4
-	ldr	r5, .L1141+24
+	ldr	r5, .L1148+24
 	lsls	r2, r2, #1
 	ldr	r0, [r3, #0]
 	bl	memset
-	ldr	r3, .L1141+28
+	ldr	r3, .L1148+28
 	ldrh	r2, [r5, #0]
 	mov	r1, r4
 	ldr	r0, [r3, #0]
 	lsls	r2, r2, #2
 	bl	memset
-	ldr	r3, .L1141+32
+	ldr	r3, .L1148+32
 	ldrh	r2, [r5, #0]
 	mov	r1, r4
 	ldr	r0, [r3, #0]
 	lsls	r2, r2, #1
 	bl	memset
-	ldr	r0, .L1141+36
+	ldr	r0, .L1148+36
 	movs	r1, #255
 	movs	r2, #12
 	bl	memset
-	ldr	r3, .L1141+40
+	ldr	r3, .L1148+40
 	ldrh	r3, [r3, #0]
 	str	r3, [sp, #24]
-	b	.L1081
-.L1083:
+	b	.L1088
+.L1090:
 	ldrb	r0, [fp, r4]	@ zero_extendqisi2
 	ldr	r1, [sp, #24]
 	str	r3, [sp, #4]
@@ -9168,7 +9291,7 @@ FtlScanSysBlk:
 	bl	FtlBbmIsBadBlock
 	ldr	r2, [sp, #8]
 	ldr	r3, [sp, #4]
-	cbnz	r0, .L1082
+	cbnz	r0, .L1089
 	ldr	r1, [r7, #0]
 	lsls	r2, r2, #10
 	ldr	r0, [r6, #0]
@@ -9183,34 +9306,34 @@ FtlScanSysBlk:
 	adds	r2, r0, r2
 	str	r2, [r1, #12]
 	uxth	r3, r3
-.L1082:
+.L1089:
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L1118
-.L1130:
+	b	.L1125
+.L1137:
 	movs	r3, #0
-	ldr	fp, .L1141+76
-	ldr	r8, .L1141+80
+	ldr	fp, .L1148+76
+	ldr	r8, .L1148+80
 	mov	r4, r3
-	ldr	r6, .L1141+44
+	ldr	r6, .L1148+44
 	mov	sl, #36
-	ldr	r5, .L1141+48
+	ldr	r5, .L1148+48
 	str	r3, [sp, #20]
-.L1118:
-	ldr	r1, .L1141+52
+.L1125:
+	ldr	r1, .L1148+52
 	ldrh	r2, [r1, #0]
 	cmp	r2, r4
-	bhi	.L1083
+	bhi	.L1090
 	str	r3, [sp, #20]
 	cmp	r3, #0
-	beq	.L1084
+	beq	.L1091
 	ldr	r0, [r7, #0]
 	mov	r1, r3
 	movs	r2, #1
 	movs	r6, #0
 	bl	FlashReadPages
 	str	r6, [sp, #32]
-.L1117:
+.L1124:
 	ldr	r3, [r7, #0]
 	adds	r2, r3, r6
 	ldr	r3, [r3, r6]
@@ -9218,9 +9341,9 @@ FtlScanSysBlk:
 	adds	r3, r3, #1
 	ldr	r4, [r2, #12]
 	ubfx	r5, r5, #10, #16
-	bne	.L1085
+	bne	.L1092
 	mov	r8, #16
-.L1087:
+.L1094:
 	ldr	r0, [r7, #0]
 	movs	r1, #1
 	mov	r2, r1
@@ -9232,79 +9355,79 @@ FtlScanSysBlk:
 	ldrh	r3, [r4, #0]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1086
-	ldr	r1, .L1141+12
+	bne	.L1093
+	ldr	r1, .L1148+12
 	mov	r2, #-1
 	ldr	r3, [r1, #0]
 	str	r2, [r3, r6]
-	b	.L1085
-.L1086:
+	b	.L1092
+.L1093:
 	ldr	r3, [r7, #0]
 	ldr	r3, [r3, r6]
 	adds	r3, r3, #1
-	bne	.L1085
+	bne	.L1092
 	add	r8, r8, #-1
 	uxth	r8, r8
 	cmp	r8, #0
-	bne	.L1087
-.L1085:
+	bne	.L1094
+.L1092:
 	ldr	r3, [r7, #0]
 	ldr	r3, [r3, r6]
 	adds	r3, r3, #1
-	beq	.L1088
-	ldr	r2, .L1141+56
+	beq	.L1095
+	ldr	r2, .L1148+56
 	ldr	r3, [r4, #4]
 	ldr	r1, [r2, #0]
 	adds	r0, r1, #1
-	beq	.L1089
+	beq	.L1096
 	cmp	r1, r3
-	bhi	.L1090
-.L1089:
+	bhi	.L1097
+.L1096:
 	adds	r1, r3, #1
-	beq	.L1090
+	beq	.L1097
 	adds	r3, r3, #1
 	str	r3, [r2, #0]
-.L1090:
+.L1097:
 	ldrh	r3, [r4, #0]
 	movw	r2, #61604
 	cmp	r3, r2
-	beq	.L1093
-	bhi	.L1096
+	beq	.L1100
+	bhi	.L1103
 	movw	r2, #61574
 	cmp	r3, r2
-	bne	.L1091
-	b	.L1139
-.L1096:
+	bne	.L1098
+	b	.L1146
+.L1103:
 	movw	r2, #61634
 	cmp	r3, r2
-	beq	.L1094
+	beq	.L1101
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1091
-	b	.L1140
-.L1094:
-	ldr	r3, .L1141
-	ldr	r8, .L1141+4
+	bne	.L1098
+	b	.L1147
+.L1101:
+	ldr	r3, .L1148
+	ldr	r8, .L1148+4
 	ldrh	r2, [r3, #0]
 	ldr	r3, [r8, #0]
 	cmp	r2, r3
-	bls	.L1097
-	ldr	r1, .L1141+60
-	movw	r2, #1183
-	ldr	r0, .L1141+64
+	bls	.L1104
+	ldr	r1, .L1148+60
+	movw	r2, #1269
+	ldr	r0, .L1148+64
 	bl	printf
-	ldr	r0, .L1141+68
-	ldr	r1, .L1141+72
+	ldr	r0, .L1148+68
+	ldr	r1, .L1148+72
 	bl	printf
-.L1097:
+.L1104:
 	ldr	r3, [r8, #0]
 	mov	ip, #0
-	ldr	r1, .L1141
+	ldr	r1, .L1148
 	uxth	r2, r3
 	str	r3, [sp, #12]
 	subs	r3, r2, #1
 	ldrh	r0, [r1, #0]
-	ldr	r1, .L1141+16
+	ldr	r1, .L1148+16
 	uxth	r3, r3
 	subs	r2, r2, r0
 	subs	r2, r2, #1
@@ -9315,8 +9438,8 @@ FtlScanSysBlk:
 	add	sl, r1, fp, lsl #2
 	str	sl, [sp, #16]
 	mov	sl, r5
-	b	.L1098
-.L1104:
+	b	.L1105
+.L1111:
 	rsb	r2, ip, fp
 	str	r2, [sp, #28]
 	ldr	r2, [sp, #16]
@@ -9326,20 +9449,20 @@ FtlScanSysBlk:
 	str	r5, [sp, #16]
 	ldr	r5, [r2, #0]
 	cmp	r8, r5
-	bls	.L1099
+	bls	.L1106
 	ldr	ip, [r1, #0]
 	mov	r5, sl
 	str	r2, [sp, #16]
 	cmp	ip, #0
-	bne	.L1100
+	bne	.L1107
 	ldr	r2, [sp, #12]
 	cmp	r0, r2
-	beq	.L1100
+	beq	.L1107
 	add	ip, r0, #1
-	ldr	r0, .L1141
+	ldr	r0, .L1148
 	strh	ip, [r0, #0]	@ movhi
-.L1100:
-	ldr	r0, .L1141+20
+.L1107:
+	ldr	r0, .L1148+20
 	sxth	sl, r3
 	mov	fp, r3
 	str	sl, [sp, #12]
@@ -9347,98 +9470,98 @@ FtlScanSysBlk:
 	ldr	ip, [r0, #0]
 	movs	r0, #0
 	mov	r8, ip
-	b	.L1101
-.L1102:
+	b	.L1108
+.L1109:
 	ldr	sl, [r1, #4]!
 	adds	r0, r0, #1
 	uxth	r0, r0
 	str	sl, [r3], #4
 	ldrh	sl, [ip, #2]!
 	strh	sl, [r8], #2	@ movhi
-.L1101:
+.L1108:
 	ldr	r2, [sp, #12]
 	sxth	sl, r0
 	cmp	sl, r2
-	bne	.L1102
+	bne	.L1109
 	ldr	r1, [r4, #4]
 	mov	r3, fp
 	ldr	r2, [sp, #16]
 	ldr	sl, [sp, #28]
 	str	r1, [r2, #0]
-	ldr	r2, .L1141+20
+	ldr	r2, .L1148+20
 	ldr	r2, [r2, #0]
 	strh	r5, [r2, sl, lsl #1]	@ movhi
-	b	.L1103
-.L1099:
+	b	.L1110
+.L1106:
 	subs	r3, r3, #1
 	uxth	r3, r3
-.L1098:
+.L1105:
 	ldr	r5, [sp, #36]
 	sxth	r2, r3
 	cmp	r2, r5
-	bgt	.L1104
+	bgt	.L1111
 	mov	r5, sl
-.L1103:
+.L1110:
 	sxth	r3, r3
 	cmp	r3, #0
-	blt	.L1091
-	ldr	r2, .L1141
-	ldr	r0, .L1141+4
+	blt	.L1098
+	ldr	r2, .L1148
+	ldr	r0, .L1148+4
 	ldrh	r1, [r2, #0]
 	ldr	r0, [r0, #0]
 	subs	r0, r0, r1
 	subs	r0, r0, #1
 	sxth	r0, r0
 	cmp	r3, r0
-	bgt	.L1091
+	bgt	.L1098
 	adds	r1, r1, #1
 	strh	r1, [r2, #0]	@ movhi
-	ldr	r2, .L1141+16
+	ldr	r2, .L1148+16
 	ldr	r1, [r4, #4]
 	ldr	r2, [r2, #0]
 	str	r1, [r2, r3, lsl #2]
-	ldr	r2, .L1141+20
-	b	.L1137
-.L1142:
+	ldr	r2, .L1148+20
+	b	.L1144
+.L1149:
 	.align	2
-.L1141:
-	.word	.LANCHOR121
-	.word	.LANCHOR80
-	.word	.LANCHOR85
-	.word	.LANCHOR173
+.L1148:
 	.word	.LANCHOR123
-	.word	.LANCHOR122
-	.word	.LANCHOR77
-	.word	.LANCHOR185
+	.word	.LANCHOR80
 	.word	.LANCHOR86
-	.word	.LANCHOR191
+	.word	.LANCHOR177
+	.word	.LANCHOR125
+	.word	.LANCHOR124
+	.word	.LANCHOR77
+	.word	.LANCHOR189
+	.word	.LANCHOR87
+	.word	.LANCHOR196
 	.word	.LANCHOR55
-	.word	.LANCHOR130
+	.word	.LANCHOR133
 	.word	.LANCHOR74
 	.word	.LANCHOR53
-	.word	.LANCHOR153
-	.word	.LANCHOR192
+	.word	.LANCHOR156
+	.word	.LANCHOR197
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
 	.word	.LANCHOR62
-	.word	.LANCHOR129
-.L1139:
-	ldr	r3, .L1143
-	ldr	r8, .L1143+28
+	.word	.LANCHOR132
+.L1146:
+	ldr	r3, .L1150
+	ldr	r8, .L1150+28
 	ldrh	r2, [r3, #0]
 	ldrh	r3, [r8, #0]
 	cmp	r2, r3
-	bls	.L1105
-	ldr	r1, .L1143+4
-	movw	r2, #1230
-	ldr	r0, .L1143+8
+	bls	.L1112
+	ldr	r1, .L1150+4
+	movw	r2, #1316
+	ldr	r0, .L1150+8
 	bl	printf
-	ldr	r0, .L1143+12
-	ldr	r1, .L1143+16
+	ldr	r0, .L1150+12
+	ldr	r1, .L1150+16
 	bl	printf
-.L1105:
-	ldr	r1, .L1143
+.L1112:
+	ldr	r1, .L1150
 	mov	ip, #0
 	ldrh	r8, [r8, #0]
 	ldrh	r0, [r1, #0]
@@ -9447,14 +9570,14 @@ FtlScanSysBlk:
 	uxth	r3, r2
 	subs	r2, r2, r0
 	str	r2, [sp, #36]
-	ldr	r2, .L1143+20
+	ldr	r2, .L1150+20
 	sxth	fp, r3
 	ldr	r1, [r2, #0]
 	add	sl, r1, fp, lsl #2
 	str	sl, [sp, #28]
 	mov	sl, r5
-	b	.L1106
-.L1112:
+	b	.L1113
+.L1119:
 	ldr	r2, [sp, #28]
 	add	ip, ip, #1
 	ldr	r8, [r4, #4]
@@ -9462,19 +9585,19 @@ FtlScanSysBlk:
 	str	r5, [sp, #28]
 	ldr	r5, [r2, #0]
 	cmp	r8, r5
-	bls	.L1107
+	bls	.L1114
 	ldr	ip, [r1, #0]
 	mov	r5, sl
 	cmp	ip, #0
-	bne	.L1108
+	bne	.L1115
 	ldr	sl, [sp, #16]
 	cmp	r0, sl
-	beq	.L1108
+	beq	.L1115
 	add	ip, r0, #1
-	ldr	r0, .L1143
+	ldr	r0, .L1150
 	strh	ip, [r0, #0]	@ movhi
-.L1108:
-	ldr	r0, .L1143+24
+.L1115:
+	ldr	r0, .L1150+24
 	sxth	sl, r3
 	mov	fp, r3
 	str	sl, [sp, #16]
@@ -9483,109 +9606,109 @@ FtlScanSysBlk:
 	ldr	ip, [r0, #0]
 	movs	r0, #0
 	mov	r8, ip
-	b	.L1109
-.L1110:
+	b	.L1116
+.L1117:
 	ldr	sl, [r1, #4]!
 	adds	r0, r0, #1
 	uxth	r0, r0
 	str	sl, [r3], #4
 	ldrh	sl, [r8, #2]!
 	strh	sl, [ip], #2	@ movhi
-.L1109:
+.L1116:
 	ldr	r2, [sp, #16]
 	sxth	sl, r0
 	cmp	sl, r2
-	bne	.L1110
+	bne	.L1117
 	ldr	r2, [sp, #28]
 	mov	r3, fp
 	ldr	r1, [r4, #4]
 	ldr	sl, [sp, #12]
 	str	r1, [r2, #0]
-	ldr	r2, .L1143+24
+	ldr	r2, .L1150+24
 	ldr	r2, [r2, #0]
 	strh	r5, [r2, sl, lsl #1]	@ movhi
-	b	.L1111
-.L1107:
+	b	.L1118
+.L1114:
 	subs	r3, r3, #1
 	uxth	r3, r3
-.L1106:
+.L1113:
 	ldr	r5, [sp, #36]
 	rsb	r2, ip, fp
 	str	r2, [sp, #12]
 	cmp	r2, r5
-	bgt	.L1112
+	bgt	.L1119
 	mov	r5, sl
-.L1111:
+.L1118:
 	sxth	r3, r3
 	cmp	r3, #0
-	blt	.L1091
-	ldr	r0, .L1143+28
-	ldr	r2, .L1143
+	blt	.L1098
+	ldr	r0, .L1150+28
+	ldr	r2, .L1150
 	ldrh	r0, [r0, #0]
 	ldrh	r1, [r2, #0]
 	subs	r0, r0, #1
 	subs	r0, r0, r1
 	sxth	r0, r0
 	cmp	r3, r0
-	bgt	.L1091
+	bgt	.L1098
 	adds	r1, r1, #1
 	strh	r1, [r2, #0]	@ movhi
-	ldr	r2, .L1143+20
+	ldr	r2, .L1150+20
 	ldr	r1, [r4, #4]
 	ldr	r2, [r2, #0]
 	str	r1, [r2, r3, lsl #2]
-	ldr	r2, .L1143+24
-.L1137:
+	ldr	r2, .L1150+24
+.L1144:
 	ldr	r2, [r2, #0]
 	strh	r5, [r2, r3, lsl #1]	@ movhi
-	b	.L1091
-.L1093:
-	ldr	r8, .L1143+32
+	b	.L1098
+.L1100:
+	ldr	r8, .L1150+32
 	movw	sl, #65535
 	ldrh	r3, [r8, #0]
 	cmp	r3, sl
-	bne	.L1113
+	bne	.L1120
 	ldr	r3, [r4, #4]
 	strh	r5, [r8, #0]	@ movhi
 	str	r3, [r8, #8]
-	b	.L1091
-.L1113:
+	b	.L1098
+.L1120:
 	ldrh	r0, [r8, #4]
 	movw	ip, #65535
 	cmp	r0, ip
-	beq	.L1114
+	beq	.L1121
 	movs	r1, #1
 	bl	FtlFreeSysBlkQueueIn
-.L1114:
+.L1121:
 	ldr	r2, [r4, #4]
 	ldr	r1, [r8, #8]
-	ldr	r3, .L1143+32
+	ldr	r3, .L1150+32
 	cmp	r1, r2
-	bcs	.L1115
+	bcs	.L1122
 	ldrh	r1, [r3, #0]
 	str	r2, [r3, #8]
 	strh	r5, [r3, #0]	@ movhi
 	strh	r1, [r3, #4]	@ movhi
-	b	.L1091
-.L1115:
+	b	.L1098
+.L1122:
 	strh	r5, [r3, #4]	@ movhi
-	b	.L1091
-.L1140:
+	b	.L1098
+.L1147:
 	mov	r0, r5
-	b	.L1138
-.L1088:
-	ldr	r1, .L1143+36
+	b	.L1145
+.L1095:
+	ldr	r1, .L1150+36
 	mov	r0, r5
 	ldrb	r3, [r1, #0]	@ zero_extendqisi2
-	cbz	r3, .L1116
-.L1138:
+	cbz	r3, .L1123
+.L1145:
 	movs	r1, #0
-	b	.L1136
-.L1116:
+	b	.L1143
+.L1123:
 	movs	r1, #1
-.L1136:
+.L1143:
 	bl	FtlFreeSysBlkQueueIn
-.L1091:
+.L1098:
 	ldr	r5, [sp, #32]
 	adds	r6, r6, #36
 	adds	r3, r5, #1
@@ -9593,36 +9716,36 @@ FtlScanSysBlk:
 	uxth	r3, r3
 	str	r3, [sp, #32]
 	cmp	r3, r5
-	bne	.L1117
-.L1084:
+	bne	.L1124
+.L1091:
 	ldr	sl, [sp, #24]
 	add	r3, sl, #1
 	uxth	r3, r3
 	str	r3, [sp, #24]
-.L1081:
-	ldr	r3, .L1143+40
+.L1088:
+	ldr	r3, .L1150+40
 	ldr	ip, [sp, #24]
 	ldrh	r3, [r3, #0]
 	cmp	r3, ip
-	bhi	.L1130
-	ldr	r3, .L1143+44
+	bhi	.L1137
+	ldr	r3, .L1150+44
 	ldr	r1, [r3, #0]
 	ldrh	r3, [r1, #0]
-	cbnz	r3, .L1119
-	ldr	r2, .L1143+48
+	cbnz	r3, .L1126
+	ldr	r2, .L1150+48
 	ldrh	r2, [r2, #0]
-	cbz	r2, .L1119
-	ldr	r2, .L1143+52
+	cbz	r2, .L1126
+	ldr	r2, .L1150+52
 	ldr	r4, [r2, #0]
 	mov	r2, r1
-	b	.L1120
-.L1123:
+	b	.L1127
+.L1130:
 	ldrh	r5, [r2], #2
 	adds	r3, r3, #1
-	cbz	r5, .L1120
-	ldr	r3, .L1143+56
+	cbz	r5, .L1127
+	ldr	r3, .L1150+56
 	sxth	r0, r0
-	ldr	ip, .L1143+52
+	ldr	ip, .L1150+52
 	mov	sl, r1
 	add	r6, r1, r0, lsl #1
 	ldr	r5, [r3, #0]
@@ -9631,8 +9754,8 @@ FtlScanSysBlk:
 	mov	r4, r3
 	add	r7, r5, r0, lsl #2
 	mov	fp, r3
-	b	.L1121
-.L1122:
+	b	.L1128
+.L1129:
 	ldrh	r1, [r6, r2]
 	strh	r1, [sl, r2]	@ movhi
 	ldr	r1, [r7, r3]
@@ -9640,37 +9763,37 @@ FtlScanSysBlk:
 	adds	r3, r3, #4
 	strh	fp, [r6, r2]	@ movhi
 	adds	r2, r2, #2
-.L1121:
+.L1128:
 	ldr	r1, [ip, #0]
 	add	r8, r4, r0
 	adds	r4, r4, #1
 	cmp	r8, r1
-	bcc	.L1122
-	b	.L1119
-.L1120:
+	bcc	.L1129
+	b	.L1126
+.L1127:
 	cmp	r3, r4
 	uxth	r0, r3
-	bne	.L1123
-.L1119:
-	ldr	r3, .L1143+24
+	bne	.L1130
+.L1126:
+	ldr	r3, .L1150+24
 	ldr	r0, [r3, #0]
 	ldrh	r3, [r0, #0]
 	cmp	r3, #0
-	bne	.L1124
-	ldr	r2, .L1143
+	bne	.L1131
+	ldr	r2, .L1150
 	ldrh	r2, [r2, #0]
 	cmp	r2, #0
-	beq	.L1124
-	ldr	r2, .L1143+28
+	beq	.L1131
+	ldr	r2, .L1150+28
 	ldrh	r4, [r2, #0]
 	mov	r2, r0
-	b	.L1125
-.L1128:
+	b	.L1132
+.L1135:
 	ldrh	r5, [r2], #2
 	adds	r3, r3, #1
 	cmp	r5, #0
-	beq	.L1125
-	ldr	r3, .L1143+20
+	beq	.L1132
+	ldr	r3, .L1150+20
 	sxth	r1, r1
 	subs	r6, r1, r6
 	add	r7, r0, r1, lsl #1
@@ -9680,8 +9803,8 @@ FtlScanSysBlk:
 	mov	r4, r3
 	add	r0, r0, r6, lsl #1
 	add	ip, r5, r1, lsl #2
-	b	.L1126
-.L1127:
+	b	.L1133
+.L1134:
 	ldrh	r8, [r7, r2]
 	ldr	sl, [ip, r3]
 	strh	r8, [r0, r2]	@ movhi
@@ -9691,1082 +9814,749 @@ FtlScanSysBlk:
 	adds	r3, r3, #4
 	strh	r8, [r7, r2]	@ movhi
 	adds	r2, r2, #2
-.L1126:
-	ldr	r8, .L1143+28
+.L1133:
+	ldr	r8, .L1150+28
 	add	sl, r4, r1
 	adds	r4, r4, #1
 	ldrh	r8, [r8, #0]
 	cmp	sl, r8
-	blt	.L1127
-	b	.L1124
-.L1144:
+	blt	.L1134
+	b	.L1131
+.L1151:
 	.align	2
-.L1143:
-	.word	.LANCHOR85
-	.word	.LANCHOR192
+.L1150:
+	.word	.LANCHOR86
+	.word	.LANCHOR197
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
-	.word	.LANCHOR185
-	.word	.LANCHOR86
+	.word	.LANCHOR189
+	.word	.LANCHOR87
 	.word	.LANCHOR77
-	.word	.LANCHOR191
+	.word	.LANCHOR196
 	.word	.LANCHOR7
 	.word	.LANCHOR56
-	.word	.LANCHOR122
-	.word	.LANCHOR121
-	.word	.LANCHOR80
+	.word	.LANCHOR124
 	.word	.LANCHOR123
-.L1125:
+	.word	.LANCHOR80
+	.word	.LANCHOR125
+.L1132:
 	cmp	r3, r4
 	uxth	r1, r3
 	mov	r6, r3
-	blt	.L1128
-.L1124:
-	ldr	r3, .L1145
+	blt	.L1135
+.L1131:
+	ldr	r3, .L1152
 	ldrh	r2, [r3, #0]
-	ldr	r3, .L1145+4
+	ldr	r3, .L1152+4
 	ldr	r3, [r3, #0]
 	cmp	r2, r3
-	bls	.L1129
-	ldr	r1, .L1145+8
-	movw	r2, #1364
-	ldr	r0, .L1145+12
+	bls	.L1136
+	ldr	r1, .L1152+8
+	movw	r2, #1450
+	ldr	r0, .L1152+12
 	bl	printf
-	ldr	r0, .L1145+16
-	ldr	r1, .L1145+20
+	ldr	r0, .L1152+16
+	ldr	r1, .L1152+20
 	bl	printf
-.L1129:
+.L1136:
 	movs	r0, #0
 	add	sp, sp, #40
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1146:
+.L1153:
 	.align	2
-.L1145:
-	.word	.LANCHOR121
+.L1152:
+	.word	.LANCHOR123
 	.word	.LANCHOR80
-	.word	.LANCHOR192
+	.word	.LANCHOR197
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
-	.section	.text.FtlVendorPartRead,"ax",%progbits
+	.section	.text.FtlGetLastWrittenPage,"ax",%progbits
 	.align	1
-	.global	FtlVendorPartRead
+	.global	FtlGetLastWrittenPage
 	.thumb
 	.thumb_func
-	.type	FtlVendorPartRead, %function
-FtlVendorPartRead:
-	@ args = 0, pretend = 0, frame = 48
+	.type	FtlGetLastWrittenPage, %function
+FtlGetLastWrittenPage:
+	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1157
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r8, r2
-	ldrh	sl, [r3, #0]
-	adds	r2, r1, r0
-	ldr	r3, .L1157+4
-	sub	sp, sp, #48
-	mov	r6, r0
+	cmp	r1, #1
+	push	{r4, r5, r6, r7, r8, sl, lr}
+	sub	sp, sp, #108
+	it	eq
+	ldreq	r3, .L1165
 	mov	r5, r1
-	ldrh	r3, [r3, #0]
-	cmp	r2, r3
-	bhi	.L1155
-	lsr	sl, r0, sl
+	it	ne
+	ldrne	r3, .L1165+4
+	add	sl, sp, #68
+	lsl	r8, r0, #10
+	movs	r1, #1
+	mov	r0, sl
+	mov	r2, r5
+	ldrh	r4, [r3, #0]
+	add	r3, sp, #4
+	str	r3, [sp, #80]
 	movs	r7, #0
-	lsl	sl, sl, #2
-	b	.L1149
-.L1154:
-	ldr	r1, .L1157+8
-	mov	r0, r6
-	ldr	r2, .L1157+12
-	ldr	r3, [r1, #0]
-	ldrh	r4, [r2, #0]
-	mov	r1, r4
-	ldr	fp, [r3, sl]
-	bl	__aeabi_uidivmod
-	uxth	r3, r1
-	subs	r4, r4, r3
+	subs	r4, r4, #1
+	str	r7, [sp, #76]
 	uxth	r4, r4
-	cmp	r4, r5
-	it	hi
-	uxthhi	r4, r5
-	cmp	fp, #0
-	beq	.L1151
-	ldr	r1, .L1157+16
-	add	r0, sp, #12
-	str	fp, [sp, #16]
-	ldr	r2, [r1, #0]
+	sxth	r3, r4
+	orr	r3, r3, r8
+	str	r3, [sp, #72]
+	bl	FlashReadPages
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #1
+	bne	.L1158
+	b	.L1163
+.L1161:
+	adds	r6, r6, r3
 	movs	r1, #1
-	str	r3, [sp, #4]
-	str	r2, [sp, #20]
-	movs	r2, #0
-	str	r2, [sp, #24]
-	mov	r2, r1
+	mov	r0, sl
+	mov	r2, r5
+	add	r6, r6, r6, lsr #31
+	ubfx	r6, r6, #1, #16
+	sxth	r3, r6
+	orr	r3, r3, r8
+	str	r3, [sp, #72]
 	bl	FlashReadPages
-	ldr	r2, [sp, #12]
 	ldr	r3, [sp, #4]
-	mov	r0, r8
-	cmp	r2, #-1
-	it	eq
-	moveq	r7, #-1
-	ldr	r2, .L1157+16
-	ldr	r1, [r2, #0]
-	lsls	r2, r4, #9
-	add	r1, r1, r3, lsl #9
-	bl	memcpy
-	b	.L1153
-.L1151:
-	mov	r0, r8
-	mov	r1, fp
-	lsls	r2, r4, #9
-	bl	memset
-.L1153:
-	subs	r5, r5, r4
-	adds	r6, r6, r4
-	add	r8, r8, r4, lsl #9
-	add	sl, sl, #4
-.L1149:
-	cmp	r5, #0
-	bne	.L1154
-	b	.L1148
-.L1155:
-	mov	r7, #-1
-.L1148:
-	mov	r0, r7
-	add	sp, sp, #48
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+	adds	r3, r3, #1
+	bne	.L1159
+	ldr	r3, [sp, #8]
+	adds	r3, r3, #1
+	bne	.L1159
+	ldr	r3, [sp, #68]
+	adds	r3, r3, #1
+	beq	.L1159
+	subs	r4, r6, #1
+	uxth	r4, r4
+	b	.L1163
+.L1159:
+	adds	r6, r6, #1
+	uxth	r7, r6
+.L1163:
+	sxth	r6, r7
+	sxth	r3, r4
+	cmp	r6, r3
+	ble	.L1161
 .L1158:
+	sxth	r0, r4
+	add	sp, sp, #108
+	pop	{r4, r5, r6, r7, r8, sl, pc}
+.L1166:
 	.align	2
-.L1157:
-	.word	.LANCHOR72
-	.word	.LANCHOR65
-	.word	.LANCHOR186
-	.word	.LANCHOR71
-	.word	.LANCHOR177
-	.size	FtlVendorPartRead, .-FtlVendorPartRead
-	.section	.text.Ftl_load_ext_data,"ax",%progbits
+.L1165:
+	.word	.LANCHOR69
+	.word	.LANCHOR68
+	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
+	.section	.text.FtlLoadSysInfo,"ax",%progbits
 	.align	1
-	.global	Ftl_load_ext_data
+	.global	FtlLoadSysInfo
 	.thumb
 	.thumb_func
-	.type	Ftl_load_ext_data, %function
-Ftl_load_ext_data:
-	@ args = 0, pretend = 0, frame = 0
+	.type	FtlLoadSysInfo, %function
+FtlLoadSysInfo:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	movs	r0, #0
-	ldr	r4, .L1163
-	movs	r1, #1
-	ldr	r5, .L1163+4
-	mov	r2, r4
-	bl	FtlVendorPartRead
-	ldr	r3, [r4, #0]
-	cmp	r3, r5
-	beq	.L1160
-	mov	r0, r4
-	movs	r1, #0
-	mov	r2, #512
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	movs	r4, #0
+	ldr	r6, .L1188
+	mov	r1, r4
+	ldr	r5, .L1188+4
+	ldr	r8, .L1188+60
+	ldr	r3, [r6, #0]
+	str	r4, [r5, #8]
+	str	r3, [r5, #12]
+	ldr	r3, .L1188+8
+	ldrh	r2, [r3, #0]
+	ldr	r3, .L1188+12
+	lsls	r2, r2, #1
+	ldr	r0, [r3, #0]
 	bl	memset
-	str	r5, [r4, #0]
-.L1160:
-	ldr	r2, [r4, #0]
-	ldr	r3, .L1163
-	cmp	r2, r5
-	bne	.L1161
-	ldr	r1, [r3, #88]
-	ldr	r2, .L1163+8
-	str	r1, [r2, #0]
-	ldr	r1, [r3, #92]
-	ldr	r2, .L1163+12
-	str	r1, [r2, #0]
-	ldr	r1, [r3, #8]
-	ldr	r2, .L1163+16
-	str	r1, [r2, #0]
-	ldr	r1, [r3, #12]
-	ldr	r2, .L1163+20
-	str	r1, [r2, #0]
-	ldr	r1, [r3, #16]
-	ldr	r2, .L1163+24
-	str	r1, [r2, #0]
-	ldr	r1, [r3, #20]
-	ldr	r2, .L1163+28
-	str	r1, [r2, #0]
-	ldr	r1, [r3, #28]
-	ldr	r2, .L1163+32
-	str	r1, [r2, #0]
-	ldr	r1, [r3, #32]
-	ldr	r2, .L1163+36
-	str	r1, [r2, #0]
-	ldr	r1, [r3, #36]
-	ldr	r2, .L1163+40
-	str	r1, [r2, #0]
-	ldr	r1, [r3, #40]
-	ldr	r2, .L1163+44
-	str	r1, [r2, #0]
-	ldr	r1, [r3, #44]
-	ldr	r2, .L1163+48
-	str	r1, [r2, #0]
-	ldr	r1, [r3, #48]
-	ldr	r2, .L1163+52
-	str	r1, [r2, #0]
-	ldr	r2, [r3, #60]
-	ldr	r3, .L1163+56
-	str	r2, [r3, #0]
-.L1161:
-	ldr	r3, .L1163+60
-	movs	r2, #0
-	str	r2, [r3, #0]
-	ldr	r3, .L1163
-	ldr	r2, [r3, #68]
-	ldr	r3, .L1163+64
+	ldrh	r0, [r8, #0]
+	movw	r3, #65535
+	cmp	r0, r3
+	beq	.L1184
+	movs	r1, #1
+	mov	fp, r8
+	bl	FtlGetLastWrittenPage
+	uxth	sl, r0
+	mov	r7, r0
+	add	r3, sl, #1
+	strh	r3, [r8, #2]	@ movhi
+	ldr	r8, .L1188+160
+	ldr	r3, .L1188+16
+	b	.L1169
+.L1172:
+	ldrh	r1, [fp, #0]
+	sxth	r2, sl
+	subs	r2, r2, r4
+	ldr	r0, .L1188+4
+	orr	r2, r2, r1, lsl #10
+	str	r2, [r5, #4]
+	ldr	r2, [r8, #0]
+	movs	r1, #1
+	str	r2, [r5, #8]
+	mov	r2, r1
+	str	r3, [sp, #4]
+	bl	FlashReadPages
+	ldr	r2, [r5, #0]
+	ldr	r3, [sp, #4]
+	adds	r2, r2, #1
+	beq	.L1170
+	ldr	r2, [r8, #0]
+	ldr	r2, [r2, #0]
 	cmp	r2, r3
-	bne	.L1162
-	ldr	r3, .L1163+68
-	movs	r2, #1
-	ldr	r0, .L1163+72
-	ldr	r1, .L1163+76
-	str	r2, [r3, #0]
-	bl	printf
-.L1162:
-	ldr	r3, .L1163+80
+	bne	.L1170
+	ldr	r2, [r6, #0]
+	ldrh	r1, [r2, #0]
+	movw	r2, #61604
+	cmp	r1, r2
+	beq	.L1171
+.L1170:
+	adds	r4, r4, #1
+.L1169:
+	subs	r2, r7, r4
+	lsls	r2, r2, #16
+	bpl	.L1172
+	b	.L1187
+.L1171:
+	ldr	r3, .L1188+8
 	ldrh	r2, [r3, #0]
-	ldr	r3, .L1163+84
+	ldr	r3, .L1188+20
+	adds	r2, r2, #24
+	ldrh	r3, [r3, #0]
+	cmp	r3, r2, lsl #1
+	bcs	.L1174
+	ldr	r1, .L1188+24
+	mov	r2, #1512
+	ldr	r0, .L1188+28
+	bl	printf
+	ldr	r0, .L1188+32
+	ldr	r1, .L1188+36
+	bl	printf
+.L1174:
+	ldr	r4, .L1188+4
+	movs	r2, #48
+	ldr	r5, .L1188+8
+	ldr	r0, .L1188+40
+	ldr	r1, [r4, #8]
+	bl	memcpy
+	ldr	r3, .L1188+12
+	ldrh	r2, [r5, #0]
+	ldr	r1, [r4, #8]
 	ldr	r0, [r3, #0]
-	ldr	r3, .L1163+32
-	ldr	r3, [r3, #0]
-	mla	r0, r0, r2, r3
-	ldr	r3, .L1163+88
-	ldrh	r1, [r3, #0]
+	adds	r1, r1, #48
+	lsls	r2, r2, #1
+	bl	memcpy
+	ldrh	r2, [r5, #0]
+	ldr	r0, .L1188+44
+	add	r1, r2, #24
+	ldr	r3, [r4, #8]
+	lsrs	r2, r2, #3
+	lsrs	r1, r1, #1
+	ldr	r0, [r0, #0]
+	adds	r2, r2, #4
+	add	r1, r3, r1, lsl #2
+	bl	memcpy
+	ldr	r3, .L1188+48
+	ldrh	r3, [r3, #0]
+	cbz	r3, .L1175
+	ldrh	r3, [r5, #0]
+	ldr	r2, .L1188+52
+	ldr	r0, .L1188+56
+	lsrs	r1, r3, #3
+	add	r1, r1, r3, lsl #1
+	ldrh	r2, [r2, #0]
+	adds	r1, r1, #52
+	ldr	r3, [r4, #8]
+	ubfx	r1, r1, #2, #14
+	ldr	r0, [r0, #0]
+	lsls	r2, r2, #2
+	add	r1, r3, r1, lsl #2
+	bl	memcpy
+.L1175:
+	ldr	r3, .L1188+40
+	ldr	r2, .L1188+16
+	ldr	r1, [r3, #0]
+	cmp	r1, r2
+	bne	.L1184
+	ldrh	r4, [r3, #8]
+	ldr	r2, .L1188+60
+	strh	r4, [r2, #6]	@ movhi
+	ldrb	r2, [r3, #10]	@ zero_extendqisi2
+	ldr	r3, .L1188+64
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	bne	.L1184
+	ldr	r3, .L1188+68
+	ldr	r2, .L1188+72
+	str	r4, [r3, #0]
+	ldr	r3, .L1188+76
+	ldrh	r3, [r3, #0]
+	muls	r3, r4, r3
+	str	r3, [r2, #0]
+	ldr	r2, .L1188+80
+	ldrh	r2, [r2, #0]
+	muls	r3, r2, r3
+	ldr	r2, .L1188+84
+	str	r3, [r2, #0]
+	ldr	r3, .L1188+88
+	ldr	r5, [r3, #0]
+	ldr	r3, .L1188+92
+	ldrh	r0, [r3, #6]
+	ldr	r3, .L1188+96
+	subs	r0, r5, r0
+	subs	r0, r0, r4
+	ldrh	r1, [r3, #0]
 	bl	__aeabi_uidiv
-	ldr	r3, .L1163+92
-	str	r0, [r3, #0]
-	pop	{r3, r4, r5, pc}
-.L1164:
+	ldr	r3, .L1188+100
+	cmp	r4, r5
+	strh	r0, [r3, #0]	@ movhi
+	bls	.L1176
+	ldr	r1, .L1188+24
+	movw	r2, #1539
+	ldr	r0, .L1188+28
+	bl	printf
+	ldr	r0, .L1188+32
+	ldr	r1, .L1188+36
+	bl	printf
+.L1176:
+	ldr	r3, .L1188+40
+	ldr	r2, .L1188+104
+	ldrh	r1, [r3, #16]
+	ldrh	r0, [r3, #14]
+	ldrh	r5, [r3, #18]
+	lsrs	r4, r1, #6
+	and	r1, r1, #63
+	strb	r1, [r2, #6]
+	ldrb	r1, [r3, #11]	@ zero_extendqisi2
+	strh	r4, [r2, #2]	@ movhi
+	movw	r4, #65535
+	strh	r0, [r2, #0]	@ movhi
+	strb	r1, [r2, #8]
+	movs	r2, #0
+	ldr	r1, .L1188+108
+	strh	r2, [r1, #2]	@ movhi
+	strh	r4, [r1, #0]	@ movhi
+	strb	r2, [r1, #6]
+	strb	r2, [r1, #8]
+	ldr	r1, .L1188+112
+	strh	r5, [r1, #0]	@ movhi
+	ldrh	r5, [r3, #20]
+	lsrs	r6, r5, #6
+	and	r5, r5, #63
+	strb	r5, [r1, #6]
+	ldrb	r5, [r3, #12]	@ zero_extendqisi2
+	strh	r6, [r1, #2]	@ movhi
+	strb	r5, [r1, #8]
+	ldr	r1, .L1188+116
+	ldrh	r5, [r3, #22]
+	strh	r5, [r1, #0]	@ movhi
+	ldrh	r5, [r3, #24]
+	lsrs	r6, r5, #6
+	and	r5, r5, #63
+	strb	r5, [r1, #6]
+	ldrb	r5, [r3, #13]	@ zero_extendqisi2
+	strh	r6, [r1, #2]	@ movhi
+	strb	r5, [r1, #8]
+	ldr	r1, .L1188+120
+	ldr	r5, [r3, #32]
+	str	r2, [r1, #0]
+	ldr	r1, .L1188+124
+	str	r2, [r1, #0]
+	ldr	r1, .L1188+128
+	str	r2, [r1, #0]
+	ldr	r1, .L1188+132
+	str	r2, [r1, #0]
+	ldr	r1, .L1188+136
+	str	r5, [r1, #0]
+	ldr	r1, .L1188+140
+	str	r2, [r1, #0]
+	ldr	r1, .L1188+144
+	str	r2, [r1, #0]
+	ldr	r1, .L1188+148
+	str	r2, [r1, #0]
+	ldr	r2, .L1188+152
+	ldr	r1, [r3, #40]
+	ldr	r5, [r2, #0]
+	cmp	r1, r5
+	it	hi
+	strhi	r1, [r2, #0]
+	ldr	r2, [r3, #36]
+	ldr	r3, .L1188+156
+	ldr	r1, [r3, #0]
+	cmp	r2, r1
+	it	hi
+	strhi	r2, [r3, #0]
+	cmp	r0, r4
+	beq	.L1179
+	ldr	r0, .L1188+104
+	bl	make_superblock
+.L1179:
+	ldr	r0, .L1188+112
+	movw	r4, #65535
+	ldrh	r3, [r0, #0]
+	cmp	r3, r4
+	beq	.L1180
+	bl	make_superblock
+.L1180:
+	ldr	r0, .L1188+116
+	ldrh	r3, [r0, #0]
+	cmp	r3, r4
+	beq	.L1181
+	bl	make_superblock
+.L1181:
+	ldr	r0, .L1188+108
+	movw	r3, #65535
+	ldrh	r2, [r0, #0]
+	cmp	r2, r3
+	beq	.L1185
+	bl	make_superblock
+	b	.L1185
+.L1184:
+	mov	r0, #-1
+	b	.L1168
+.L1185:
+	movs	r0, #0
+.L1168:
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L1187:
+	ldr	r1, .L1188+24
+	movw	r2, #1510
+	ldr	r0, .L1188+28
+	bl	printf
+	ldr	r1, .L1188+36
+	ldr	r0, .L1188+32
+	bl	printf
+	b	.L1171
+.L1189:
 	.align	2
-.L1163:
-	.word	.LANCHOR141
+.L1188:
+	.word	.LANCHOR184
+	.word	.LANCHOR198
+	.word	.LANCHOR55
+	.word	.LANCHOR101
 	.word	1179929683
-	.word	.LANCHOR193
-	.word	.LANCHOR194
-	.word	.LANCHOR155
-	.word	.LANCHOR156
-	.word	.LANCHOR160
-	.word	.LANCHOR159
-	.word	.LANCHOR162
-	.word	.LANCHOR95
-	.word	.LANCHOR157
+	.word	.LANCHOR73
+	.word	.LANCHOR199
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR143
+	.word	.LANCHOR119
+	.word	.LANCHOR85
+	.word	.LANCHOR82
+	.word	.LANCHOR191
+	.word	.LANCHOR196
+	.word	.LANCHOR60
+	.word	.LANCHOR200
+	.word	.LANCHOR88
+	.word	.LANCHOR68
+	.word	.LANCHOR71
+	.word	.LANCHOR84
+	.word	.LANCHOR57
+	.word	.LANCHOR90
+	.word	.LANCHOR53
+	.word	.LANCHOR201
+	.word	.LANCHOR109
+	.word	.LANCHOR202
+	.word	.LANCHOR110
+	.word	.LANCHOR111
 	.word	.LANCHOR158
+	.word	.LANCHOR159
 	.word	.LANCHOR163
+	.word	.LANCHOR162
 	.word	.LANCHOR164
-	.word	.LANCHOR152
-	.word	.LANCHOR151
-	.word	305432421
-	.word	.LANCHOR126
-	.word	.LC10
-	.word	.LC19
-	.word	.LANCHOR63
+	.word	.LANCHOR165
+	.word	.LANCHOR166
 	.word	.LANCHOR161
-	.word	.LANCHOR55
-	.word	.LANCHOR195
-	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
-	.section	.text.FtlLoadEctTbl,"ax",%progbits
-	.align	1
-	.global	FtlLoadEctTbl
-	.thumb
-	.thumb_func
-	.type	FtlLoadEctTbl, %function
-FtlLoadEctTbl:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	movs	r0, #64
-	ldr	r4, .L1167
-	ldr	r5, .L1167+4
-	ldr	r2, [r4, #0]
-	ldrh	r1, [r5, #0]
-	bl	FtlVendorPartRead
-	ldr	r3, [r4, #0]
-	ldr	r2, [r3, #0]
-	ldr	r3, .L1167+8
-	cmp	r2, r3
-	beq	.L1166
-	ldr	r1, .L1167+12
-	ldr	r0, .L1167+16
-	bl	printf
-	ldrh	r2, [r5, #0]
-	ldr	r0, [r4, #0]
-	movs	r1, #0
-	lsls	r2, r2, #9
-	bl	memset
-.L1166:
-	movs	r0, #0
-	pop	{r3, r4, r5, pc}
-.L1168:
-	.align	2
-.L1167:
-	.word	.LANCHOR183
-	.word	.LANCHOR182
-	.word	1112818501
-	.word	.LC20
-	.word	.LC10
-	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
-	.section	.text.load_l2p_region,"ax",%progbits
+	.word	.LANCHOR156
+	.word	.LANCHOR157
+	.word	.LANCHOR98
+	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
+	.section	.text.FtlLoadBbt,"ax",%progbits
 	.align	1
-	.global	load_l2p_region
+	.global	FtlLoadBbt
 	.thumb
 	.thumb_func
-	.type	load_l2p_region, %function
-load_l2p_region:
-	@ args = 0, pretend = 0, frame = 0
+	.type	FtlLoadBbt, %function
+FtlLoadBbt:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1174
-	push	{r4, r5, r6, r7, r8, lr}
-	mov	r4, r0
-	ldrh	r3, [r3, #0]
-	mov	r8, r1
-	cmp	r3, r0
-	bcs	.L1170
-	ldr	r1, .L1174+4
-	movw	r2, #467
-	ldr	r0, .L1174+8
-	bl	printf
-	ldr	r0, .L1174+12
-	ldr	r1, .L1174+16
-	bl	printf
-.L1170:
-	ldr	r3, .L1174+20
-	ldr	r7, .L1174+24
-	ldr	r3, [r3, #0]
-	ldr	r6, [r3, r4, lsl #2]
-	movs	r3, #12
-	cbnz	r6, .L1171
-	mul	r5, r3, r8
-	ldr	r3, [r7, #0]
-	movs	r1, #255
-	adds	r3, r3, r5
-	ldr	r0, [r3, #8]
-	ldr	r3, .L1174+28
-	ldrh	r2, [r3, #0]
-	bl	memset
-	ldr	r3, [r7, #0]
-	adds	r2, r3, r5
-	strh	r4, [r3, r5]	@ movhi
-	str	r6, [r2, #4]
-	b	.L1172
-.L1171:
-	ldr	r5, .L1174+32
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	movs	r3, #0
+	ldr	r6, .L1209
+	movw	sl, #61649
+	str	r3, [r6, #8]
+	ldr	r3, .L1209+4
+	ldr	r4, [r3, #0]
+	str	r4, [r6, #12]
+	bl	FtlBbtMemInit
+	ldr	r3, .L1209+8
+	mov	r8, r3
+	ldrh	r5, [r3, #0]
+	subs	r5, r5, #1
+	uxth	r5, r5
+	b	.L1191
+.L1195:
 	movs	r1, #1
+	ldr	r0, .L1209
 	mov	r2, r1
-	mov	r0, r5
-	str	r6, [r5, #4]
-	mul	r6, r3, r8
-	ldr	r3, [r7, #0]
-	adds	r3, r3, r6
-	ldr	r3, [r3, #8]
-	str	r3, [r5, #8]
-	ldr	r3, .L1174+36
-	ldr	r3, [r3, #0]
-	str	r3, [r5, #12]
+	lsls	r3, r5, #10
+	str	r3, [r6, #4]
 	bl	FlashReadPages
-	ldr	r3, [r5, #12]
-	ldrh	r3, [r3, #8]
-	cmp	r3, r4
-	beq	.L1173
-	ldr	r1, .L1174+4
-	mov	r2, #488
-	ldr	r0, .L1174+8
-	bl	printf
-	ldr	r0, .L1174+12
-	ldr	r1, .L1174+16
-	bl	printf
-.L1173:
-	ldr	r3, .L1174+24
-	movs	r1, #0
-	ldr	r3, [r3, #0]
-	adds	r2, r3, r6
-	strh	r4, [r3, r6]	@ movhi
-	str	r1, [r2, #4]
-.L1172:
-	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, pc}
-.L1175:
-	.align	2
-.L1174:
-	.word	.LANCHOR82
-	.word	.LANCHOR196
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.word	.LANCHOR124
-	.word	.LANCHOR112
-	.word	.LANCHOR73
-	.word	.LANCHOR197
-	.word	.LANCHOR180
-	.size	load_l2p_region, .-load_l2p_region
-	.section	.text.FtlGetLastWrittenPage,"ax",%progbits
-	.align	1
-	.global	FtlGetLastWrittenPage
-	.thumb
-	.thumb_func
-	.type	FtlGetLastWrittenPage, %function
-FtlGetLastWrittenPage:
-	@ args = 0, pretend = 0, frame = 104
-	@ frame_needed = 0, uses_anonymous_args = 0
-	cmp	r1, #1
-	push	{r4, r5, r6, r7, r8, sl, lr}
-	sub	sp, sp, #108
-	it	eq
-	ldreq	r3, .L1187
-	mov	r5, r1
-	it	ne
-	ldrne	r3, .L1187+4
-	add	sl, sp, #68
-	lsl	r8, r0, #10
+	ldr	r3, [r6, #0]
+	ldr	r7, .L1209
+	adds	r3, r3, #1
+	bne	.L1192
+	ldr	r3, [r6, #4]
 	movs	r1, #1
-	mov	r0, sl
-	mov	r2, r5
-	ldrh	r4, [r3, #0]
-	add	r3, sp, #4
-	str	r3, [sp, #80]
-	movs	r7, #0
-	subs	r4, r4, #1
-	str	r7, [sp, #76]
-	uxth	r4, r4
-	sxth	r3, r4
-	orr	r3, r3, r8
-	str	r3, [sp, #72]
+	mov	r0, r7
+	mov	r2, r1
+	adds	r3, r3, #1
+	str	r3, [r6, #4]
 	bl	FlashReadPages
-	ldr	r3, [sp, #4]
+.L1192:
+	ldr	r3, [r7, #0]
 	adds	r3, r3, #1
-	bne	.L1180
-	b	.L1185
-.L1183:
-	adds	r6, r6, r3
+	beq	.L1193
+	ldrh	r3, [r4, #0]
+	cmp	r3, sl
+	bne	.L1193
+	ldr	r3, .L1209+12
+	ldr	r2, [r4, #4]
+	strh	r5, [r3, #0]	@ movhi
+	str	r2, [r3, #8]
+	ldrh	r2, [r4, #8]
+	strh	r2, [r3, #4]	@ movhi
+	b	.L1194
+.L1193:
+	subs	r5, r5, #1
+	uxth	r5, r5
+.L1191:
+	ldrh	r3, [r8, #0]
+	subs	r3, r3, #47
+	cmp	r3, r5
+	ble	.L1195
+.L1194:
+	ldr	r5, .L1209+12
+	movw	r3, #65535
+	ldrh	r2, [r5, #0]
+	cmp	r2, r3
+	beq	.L1206
+	ldrh	r2, [r5, #4]
+	cmp	r2, r3
+	beq	.L1197
+	ldr	r6, .L1209
 	movs	r1, #1
-	mov	r0, sl
-	mov	r2, r5
-	add	r6, r6, r6, lsr #31
-	ubfx	r6, r6, #1, #16
-	sxth	r3, r6
-	orr	r3, r3, r8
-	str	r3, [sp, #72]
+	lsls	r2, r2, #10
+	mov	r0, r6
+	str	r2, [r6, #4]
+	mov	r2, r1
 	bl	FlashReadPages
-	ldr	r3, [sp, #4]
-	adds	r3, r3, #1
-	bne	.L1181
-	ldr	r3, [sp, #8]
-	adds	r3, r3, #1
-	bne	.L1181
-	ldr	r3, [sp, #68]
+	ldr	r3, [r6, #0]
 	adds	r3, r3, #1
-	beq	.L1181
-	subs	r4, r6, #1
-	uxth	r4, r4
-	b	.L1185
-.L1181:
-	adds	r6, r6, #1
-	uxth	r7, r6
-.L1185:
-	sxth	r6, r7
-	sxth	r3, r4
-	cmp	r6, r3
-	ble	.L1183
-.L1180:
-	sxth	r0, r4
-	add	sp, sp, #108
-	pop	{r4, r5, r6, r7, r8, sl, pc}
-.L1188:
-	.align	2
-.L1187:
-	.word	.LANCHOR69
-	.word	.LANCHOR68
-	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
-	.section	.text.FtlLoadSysInfo,"ax",%progbits
-	.align	1
-	.global	FtlLoadSysInfo
-	.thumb
-	.thumb_func
-	.type	FtlLoadSysInfo, %function
-FtlLoadSysInfo:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	movs	r4, #0
+	beq	.L1197
+	ldrh	r2, [r4, #0]
+	movw	r3, #61649
+	cmp	r2, r3
+	bne	.L1197
+	ldr	r3, [r4, #4]
+	ldr	r2, [r5, #8]
+	cmp	r3, r2
+	bls	.L1197
+	ldrh	r2, [r5, #4]
+	str	r3, [r5, #8]
+	ldrh	r3, [r4, #8]
+	strh	r2, [r5, #0]	@ movhi
+	strh	r3, [r5, #4]	@ movhi
+.L1197:
+	ldr	fp, .L1209+12
+	movs	r1, #1
+	movs	r5, #0
 	ldr	r6, .L1209
-	mov	r1, r4
-	ldr	r5, .L1209+4
 	ldr	r8, .L1209+48
-	ldr	r3, [r6, #0]
-	str	r4, [r5, #8]
-	str	r3, [r5, #12]
-	ldr	r3, .L1209+8
-	ldrh	r2, [r3, #0]
-	ldr	r3, .L1209+12
-	lsls	r2, r2, #1
-	ldr	r0, [r3, #0]
-	bl	memset
-	ldrh	r0, [r8, #0]
-	movw	r3, #65535
-	cmp	r0, r3
-	beq	.L1205
-	movs	r1, #1
-	mov	fp, r8
+	ldrh	r0, [fp, #0]
 	bl	FtlGetLastWrittenPage
 	uxth	sl, r0
 	mov	r7, r0
 	add	r3, sl, #1
-	strh	r3, [r8, #2]	@ movhi
-	ldr	r8, .L1209+148
-	ldr	r3, .L1209+16
-	b	.L1191
-.L1194:
+	strh	r3, [fp, #2]	@ movhi
+	sxth	sl, sl
+	movw	r3, #61649
+	b	.L1198
+.L1201:
 	ldrh	r1, [fp, #0]
-	sxth	r2, sl
-	subs	r2, r2, r4
-	ldr	r0, .L1209+4
+	rsb	r2, r5, sl
+	ldr	r0, .L1209
 	orr	r2, r2, r1, lsl #10
-	str	r2, [r5, #4]
+	str	r2, [r6, #4]
 	ldr	r2, [r8, #0]
 	movs	r1, #1
-	str	r2, [r5, #8]
-	mov	r2, r1
 	str	r3, [sp, #4]
+	str	r2, [r6, #8]
+	mov	r2, r1
 	bl	FlashReadPages
-	ldr	r2, [r5, #0]
+	ldr	r2, [r6, #0]
 	ldr	r3, [sp, #4]
 	adds	r2, r2, #1
-	beq	.L1192
-	ldr	r2, [r8, #0]
-	ldr	r2, [r2, #0]
+	beq	.L1199
+	ldrh	r2, [r4, #0]
 	cmp	r2, r3
-	bne	.L1192
-	ldr	r2, [r6, #0]
-	ldrh	r1, [r2, #0]
-	movw	r2, #61604
-	cmp	r1, r2
-	beq	.L1193
-.L1192:
-	adds	r4, r4, #1
-.L1191:
-	subs	r2, r7, r4
-	lsls	r2, r2, #16
-	bpl	.L1194
+	beq	.L1200
+.L1199:
+	adds	r5, r5, #1
+.L1198:
+	subs	r2, r7, r5
+	lsls	r1, r2, #16
+	bpl	.L1201
 	b	.L1208
-.L1193:
-	ldr	r3, .L1209+8
-	ldrh	r2, [r3, #0]
+.L1200:
+	ldr	r3, .L1209+12
+	ldrh	r2, [r4, #10]
+	ldrh	r0, [r4, #12]
+	strh	r2, [r3, #6]	@ movhi
+	movw	r3, #65535
+	cmp	r0, r3
+	beq	.L1203
+	ldr	r3, .L1209+16
+	ldr	r2, [r3, #0]
+	cmp	r0, r2
+	beq	.L1203
 	ldr	r3, .L1209+20
-	adds	r2, r2, #24
 	ldrh	r3, [r3, #0]
-	cmp	r3, r2, lsl #1
-	bcs	.L1196
-	ldr	r1, .L1209+24
-	movw	r2, #1426
-	ldr	r0, .L1209+28
+	lsrs	r3, r3, #2
+	cmp	r2, r3
+	bcs	.L1203
+	cmp	r0, r3
+	bcs	.L1203
+	bl	FtlSysBlkNumInit
+.L1203:
+	ldr	r5, .L1209+24
+	movs	r4, #0
+	ldr	r8, .L1209+52
+	ldr	r7, .L1209+28
+	ldr	r6, .L1209
+	b	.L1204
+.L1205:
+	ldrh	r2, [r7, #0]
+	ldr	r1, [r6, #8]
+	ldr	r0, [r5, #4]!
+	lsls	r2, r2, #2
+	mla	r1, r4, r2, r1
+	bl	memcpy
+	adds	r4, r4, #1
+.L1204:
+	ldrh	r3, [r8, #0]
+	cmp	r4, r3
+	bcc	.L1205
+	movs	r0, #0
+	b	.L1196
+.L1206:
+	mov	r0, #-1
+.L1196:
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L1208:
+	ldr	r1, .L1209+32
+	mov	r2, #336
+	ldr	r0, .L1209+36
 	bl	printf
-	ldr	r0, .L1209+32
-	ldr	r1, .L1209+36
+	ldr	r1, .L1209+40
+	ldr	r0, .L1209+44
 	bl	printf
-.L1196:
-	ldr	r5, .L1209+4
-	movs	r2, #48
-	ldr	r4, .L1209+40
-	ldr	r6, .L1209+8
-	ldr	r1, [r5, #8]
-	mov	r0, r4
-	bl	memcpy
-	ldr	r3, .L1209+12
-	ldrh	r2, [r6, #0]
-	ldr	r1, [r5, #8]
-	ldr	r0, [r3, #0]
-	adds	r1, r1, #48
-	lsls	r2, r2, #1
-	bl	memcpy
-	ldrh	r2, [r6, #0]
-	ldr	r0, .L1209+44
-	add	r1, r2, #24
-	ldr	r3, [r5, #8]
-	lsrs	r2, r2, #3
-	lsrs	r1, r1, #1
-	adds	r2, r2, #4
-	ldr	r0, [r0, #0]
-	add	r1, r3, r1, lsl #2
-	bl	memcpy
-	ldr	r2, [r4, #0]
-	ldr	r3, .L1209+16
-	cmp	r2, r3
-	bne	.L1205
-	ldr	r3, .L1209+48
-	ldrh	r5, [r4, #8]
-	ldrb	r2, [r4, #10]	@ zero_extendqisi2
-	strh	r5, [r3, #6]	@ movhi
-	ldr	r3, .L1209+52
-	ldrh	r3, [r3, #0]
-	cmp	r2, r3
-	bne	.L1205
-	ldr	r3, .L1209+56
-	ldr	r2, .L1209+60
-	str	r5, [r3, #0]
-	ldr	r3, .L1209+64
-	ldrh	r3, [r3, #0]
-	muls	r3, r5, r3
-	str	r3, [r2, #0]
-	ldr	r2, .L1209+68
-	ldrh	r2, [r2, #0]
-	muls	r3, r2, r3
-	ldr	r2, .L1209+72
-	str	r3, [r2, #0]
-	ldr	r3, .L1209+76
-	ldr	r4, [r3, #0]
-	ldr	r3, .L1209+80
-	ldrh	r0, [r3, #6]
-	ldr	r3, .L1209+84
-	subs	r0, r4, r0
-	subs	r0, r0, r5
-	ldrh	r1, [r3, #0]
-	bl	__aeabi_uidiv
-	ldr	r3, .L1209+88
-	cmp	r5, r4
-	strh	r0, [r3, #0]	@ movhi
-	bls	.L1197
-	ldr	r1, .L1209+24
-	mov	r2, #1448
-	ldr	r0, .L1209+28
-	bl	printf
-	ldr	r0, .L1209+32
-	ldr	r1, .L1209+36
-	bl	printf
-.L1197:
-	ldr	r3, .L1209+40
-	ldr	r2, .L1209+92
-	ldrh	r1, [r3, #16]
-	ldrh	r0, [r3, #14]
-	ldrh	r5, [r3, #18]
-	lsrs	r4, r1, #6
-	and	r1, r1, #63
-	strb	r1, [r2, #6]
-	ldrb	r1, [r3, #11]	@ zero_extendqisi2
-	strh	r4, [r2, #2]	@ movhi
-	movw	r4, #65535
-	strh	r0, [r2, #0]	@ movhi
-	strb	r1, [r2, #8]
-	movs	r2, #0
-	ldr	r1, .L1209+96
-	strh	r2, [r1, #2]	@ movhi
-	strh	r4, [r1, #0]	@ movhi
-	strb	r2, [r1, #6]
-	strb	r2, [r1, #8]
-	ldr	r1, .L1209+100
-	strh	r5, [r1, #0]	@ movhi
-	ldrh	r5, [r3, #20]
-	lsrs	r6, r5, #6
-	and	r5, r5, #63
-	strb	r5, [r1, #6]
-	ldrb	r5, [r3, #12]	@ zero_extendqisi2
-	strh	r6, [r1, #2]	@ movhi
-	strb	r5, [r1, #8]
-	ldr	r1, .L1209+104
-	ldrh	r5, [r3, #22]
-	strh	r5, [r1, #0]	@ movhi
-	ldrh	r5, [r3, #24]
-	lsrs	r6, r5, #6
-	and	r5, r5, #63
-	strb	r5, [r1, #6]
-	ldrb	r5, [r3, #13]	@ zero_extendqisi2
-	strh	r6, [r1, #2]	@ movhi
-	strb	r5, [r1, #8]
-	ldr	r1, .L1209+108
-	ldr	r5, [r3, #32]
-	str	r2, [r1, #0]
-	ldr	r1, .L1209+112
-	str	r2, [r1, #0]
-	ldr	r1, .L1209+116
-	str	r2, [r1, #0]
-	ldr	r1, .L1209+120
-	str	r2, [r1, #0]
-	ldr	r1, .L1209+124
-	str	r5, [r1, #0]
-	ldr	r1, .L1209+128
-	str	r2, [r1, #0]
-	ldr	r1, .L1209+132
-	str	r2, [r1, #0]
-	ldr	r1, .L1209+136
-	str	r2, [r1, #0]
-	ldr	r2, .L1209+140
-	ldr	r1, [r3, #40]
-	ldr	r5, [r2, #0]
-	cmp	r1, r5
-	it	hi
-	strhi	r1, [r2, #0]
-	ldr	r2, [r3, #36]
-	ldr	r3, .L1209+144
-	ldr	r1, [r3, #0]
-	cmp	r2, r1
-	it	hi
-	strhi	r2, [r3, #0]
-	cmp	r0, r4
-	beq	.L1200
-	ldr	r0, .L1209+92
-	bl	make_superblock
-.L1200:
-	ldr	r0, .L1209+100
-	movw	r4, #65535
-	ldrh	r3, [r0, #0]
-	cmp	r3, r4
-	beq	.L1201
-	bl	make_superblock
-.L1201:
-	ldr	r0, .L1209+104
-	ldrh	r3, [r0, #0]
-	cmp	r3, r4
-	beq	.L1202
-	bl	make_superblock
-.L1202:
-	ldr	r0, .L1209+96
-	movw	r3, #65535
-	ldrh	r2, [r0, #0]
-	cmp	r2, r3
-	beq	.L1206
-	bl	make_superblock
-	b	.L1206
-.L1205:
-	mov	r0, #-1
-	b	.L1190
-.L1206:
-	movs	r0, #0
-.L1190:
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1208:
-	ldr	r1, .L1209+24
-	mov	r2, #1424
-	ldr	r0, .L1209+28
-	bl	printf
-	ldr	r1, .L1209+36
-	ldr	r0, .L1209+32
-	bl	printf
-	b	.L1193
+	b	.L1200
 .L1210:
 	.align	2
 .L1209:
-	.word	.LANCHOR180
-	.word	.LANCHOR197
-	.word	.LANCHOR55
-	.word	.LANCHOR99
-	.word	1179929683
-	.word	.LANCHOR73
 	.word	.LANCHOR198
+	.word	.LANCHOR184
+	.word	.LANCHOR66
+	.word	.LANCHOR90
+	.word	.LANCHOR52
+	.word	.LANCHOR56
+	.word	.LANCHOR90+24
+	.word	.LANCHOR91
+	.word	.LANCHOR203
 	.word	.LC9
-	.word	.LC10
 	.word	.LC11
-	.word	.LANCHOR140
-	.word	.LANCHOR117
-	.word	.LANCHOR191
+	.word	.LC10
+	.word	.LANCHOR98
 	.word	.LANCHOR60
-	.word	.LANCHOR199
-	.word	.LANCHOR87
-	.word	.LANCHOR68
-	.word	.LANCHOR71
-	.word	.LANCHOR84
-	.word	.LANCHOR57
-	.word	.LANCHOR89
-	.word	.LANCHOR53
-	.word	.LANCHOR200
-	.word	.LANCHOR107
-	.word	.LANCHOR201
-	.word	.LANCHOR108
-	.word	.LANCHOR109
-	.word	.LANCHOR155
-	.word	.LANCHOR156
-	.word	.LANCHOR160
-	.word	.LANCHOR159
-	.word	.LANCHOR161
-	.word	.LANCHOR162
-	.word	.LANCHOR163
-	.word	.LANCHOR158
-	.word	.LANCHOR153
-	.word	.LANCHOR154
-	.word	.LANCHOR96
-	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
-	.section	.text.FtlLoadBbt,"ax",%progbits
+	.size	FtlLoadBbt, .-FtlLoadBbt
+	.section	.text.FtlLoadFactoryBbt,"ax",%progbits
 	.align	1
-	.global	FtlLoadBbt
+	.global	FtlLoadFactoryBbt
 	.thumb
 	.thumb_func
-	.type	FtlLoadBbt, %function
-FtlLoadBbt:
+	.type	FtlLoadFactoryBbt, %function
+FtlLoadFactoryBbt:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1218
 	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	movs	r3, #0
-	ldr	r6, .L1230
-	movw	sl, #61649
-	str	r3, [r6, #8]
-	ldr	r3, .L1230+4
-	ldr	r4, [r3, #0]
-	str	r4, [r6, #12]
-	bl	FtlBbtMemInit
-	ldr	r3, .L1230+8
-	mov	r8, r3
-	ldrh	r5, [r3, #0]
-	subs	r5, r5, #1
-	uxth	r5, r5
+	movs	r5, #0
+	ldr	r7, .L1218+4
+	ldr	r3, [r3, #0]
+	ldr	r6, .L1218+8
+	ldr	r8, .L1218+20
+	str	r3, [r7, #8]
+	ldr	r3, .L1218+12
+	ldr	sl, [r3, #0]
+	ldr	r3, .L1218+16
+	str	sl, [r7, #12]
 	b	.L1212
+.L1217:
+	ldrh	r4, [r8, #0]
+	movw	r2, #65535
+	movw	fp, #61664
+	strh	r2, [r6], #2	@ movhi
+	subs	r4, r4, #1
+	uxth	r4, r4
+	b	.L1213
 .L1216:
+	mla	r2, r2, r5, r4
 	movs	r1, #1
-	ldr	r0, .L1230
-	mov	r2, r1
-	lsls	r3, r5, #10
-	str	r3, [r6, #4]
-	bl	FlashReadPages
-	ldr	r3, [r6, #0]
-	ldr	r7, .L1230
-	adds	r3, r3, #1
-	bne	.L1213
-	ldr	r3, [r6, #4]
-	movs	r1, #1
-	mov	r0, r7
+	ldr	r0, .L1218+4
+	lsls	r2, r2, #10
+	str	r2, [r7, #4]
 	mov	r2, r1
-	adds	r3, r3, #1
-	str	r3, [r6, #4]
+	str	r3, [sp, #4]
 	bl	FlashReadPages
-.L1213:
-	ldr	r3, [r7, #0]
-	adds	r3, r3, #1
+	ldr	r2, [r7, #0]
+	ldr	r3, [sp, #4]
+	adds	r2, r2, #1
 	beq	.L1214
-	ldrh	r3, [r4, #0]
-	cmp	r3, sl
+	ldrh	r2, [sl, #0]
+	cmp	r2, fp
 	bne	.L1214
-	ldr	r3, .L1230+12
-	ldr	r2, [r4, #4]
-	strh	r5, [r3, #0]	@ movhi
-	str	r2, [r3, #8]
-	ldrh	r2, [r4, #8]
-	strh	r2, [r3, #4]	@ movhi
+	strh	r4, [r6, #-2]	@ movhi
 	b	.L1215
 .L1214:
-	subs	r5, r5, #1
-	uxth	r5, r5
-.L1212:
-	ldrh	r3, [r8, #0]
-	subs	r3, r3, #47
-	cmp	r3, r5
+	subs	r4, r4, #1
+	uxth	r4, r4
+.L1213:
+	ldrh	r2, [r8, #0]
+	sub	r1, r2, #15
+	cmp	r1, r4
 	ble	.L1216
 .L1215:
-	ldr	r5, .L1230+12
-	movw	r3, #65535
-	ldrh	r2, [r5, #0]
-	cmp	r2, r3
-	beq	.L1227
-	ldrh	r2, [r5, #4]
-	cmp	r2, r3
-	beq	.L1218
-	ldr	r6, .L1230
-	movs	r1, #1
-	lsls	r2, r2, #10
-	mov	r0, r6
-	str	r2, [r6, #4]
-	mov	r2, r1
-	bl	FlashReadPages
-	ldr	r3, [r6, #0]
-	adds	r3, r3, #1
-	beq	.L1218
-	ldrh	r2, [r4, #0]
-	movw	r3, #61649
-	cmp	r2, r3
-	bne	.L1218
-	ldr	r3, [r4, #4]
-	ldr	r2, [r5, #8]
-	cmp	r3, r2
-	bls	.L1218
-	ldrh	r2, [r5, #4]
-	str	r3, [r5, #8]
-	ldrh	r3, [r4, #8]
-	strh	r2, [r5, #0]	@ movhi
-	strh	r3, [r5, #4]	@ movhi
-.L1218:
-	ldr	fp, .L1230+12
-	movs	r1, #1
-	movs	r5, #0
-	ldr	r6, .L1230
-	ldr	r8, .L1230+48
-	ldrh	r0, [fp, #0]
-	bl	FtlGetLastWrittenPage
-	uxth	sl, r0
-	mov	r7, r0
-	add	r3, sl, #1
-	strh	r3, [fp, #2]	@ movhi
-	sxth	sl, sl
-	movw	r3, #61649
-	b	.L1219
-.L1222:
-	ldrh	r1, [fp, #0]
-	rsb	r2, r5, sl
-	ldr	r0, .L1230
-	orr	r2, r2, r1, lsl #10
-	str	r2, [r6, #4]
-	ldr	r2, [r8, #0]
-	movs	r1, #1
-	str	r3, [sp, #4]
-	str	r2, [r6, #8]
-	mov	r2, r1
-	bl	FlashReadPages
-	ldr	r2, [r6, #0]
-	ldr	r3, [sp, #4]
-	adds	r2, r2, #1
-	beq	.L1220
-	ldrh	r2, [r4, #0]
-	cmp	r2, r3
-	beq	.L1221
-.L1220:
-	adds	r5, r5, #1
-.L1219:
-	subs	r2, r7, r5
-	lsls	r1, r2, #16
-	bpl	.L1222
-	b	.L1229
-.L1221:
-	ldr	r3, .L1230+12
-	ldrh	r2, [r4, #10]
-	ldrh	r0, [r4, #12]
-	strh	r2, [r3, #6]	@ movhi
-	movw	r3, #65535
-	cmp	r0, r3
-	beq	.L1224
-	ldr	r3, .L1230+16
-	ldr	r2, [r3, #0]
-	cmp	r0, r2
-	beq	.L1224
-	ldr	r3, .L1230+20
-	ldrh	r3, [r3, #0]
-	lsrs	r3, r3, #2
-	cmp	r2, r3
-	bcs	.L1224
-	cmp	r0, r3
-	bcs	.L1224
-	bl	FtlSysBlkNumInit
-.L1224:
-	ldr	r5, .L1230+24
-	movs	r4, #0
-	ldr	r8, .L1230+52
-	ldr	r7, .L1230+28
-	ldr	r6, .L1230
-	b	.L1225
-.L1226:
-	ldrh	r2, [r7, #0]
-	ldr	r1, [r6, #8]
-	ldr	r0, [r5, #4]!
-	lsls	r2, r2, #2
-	mla	r1, r4, r2, r1
-	bl	memcpy
-	adds	r4, r4, #1
-.L1225:
-	ldrh	r3, [r8, #0]
-	cmp	r4, r3
-	bcc	.L1226
-	movs	r0, #0
-	b	.L1217
-.L1227:
-	mov	r0, #-1
-.L1217:
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1229:
-	ldr	r1, .L1230+32
-	mov	r2, #332
-	ldr	r0, .L1230+36
-	bl	printf
-	ldr	r1, .L1230+40
-	ldr	r0, .L1230+44
-	bl	printf
-	b	.L1221
-.L1231:
-	.align	2
-.L1230:
-	.word	.LANCHOR197
-	.word	.LANCHOR180
-	.word	.LANCHOR66
-	.word	.LANCHOR89
-	.word	.LANCHOR52
-	.word	.LANCHOR56
-	.word	.LANCHOR89+24
-	.word	.LANCHOR90
-	.word	.LANCHOR202
-	.word	.LC9
-	.word	.LC11
-	.word	.LC10
-	.word	.LANCHOR96
-	.word	.LANCHOR60
-	.size	FtlLoadBbt, .-FtlLoadBbt
-	.section	.text.FtlLoadFactoryBbt,"ax",%progbits
-	.align	1
-	.global	FtlLoadFactoryBbt
-	.thumb
-	.thumb_func
-	.type	FtlLoadFactoryBbt, %function
-FtlLoadFactoryBbt:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1239
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	movs	r5, #0
-	ldr	r7, .L1239+4
-	ldr	r3, [r3, #0]
-	ldr	r6, .L1239+8
-	ldr	r8, .L1239+20
-	str	r3, [r7, #8]
-	ldr	r3, .L1239+12
-	ldr	sl, [r3, #0]
-	ldr	r3, .L1239+16
-	str	sl, [r7, #12]
-	b	.L1233
-.L1238:
-	ldrh	r4, [r8, #0]
-	movw	r2, #65535
-	movw	fp, #61664
-	strh	r2, [r6], #2	@ movhi
-	subs	r4, r4, #1
-	uxth	r4, r4
-	b	.L1234
-.L1237:
-	mla	r2, r2, r5, r4
-	movs	r1, #1
-	ldr	r0, .L1239+4
-	lsls	r2, r2, #10
-	str	r2, [r7, #4]
-	mov	r2, r1
-	str	r3, [sp, #4]
-	bl	FlashReadPages
-	ldr	r2, [r7, #0]
-	ldr	r3, [sp, #4]
-	adds	r2, r2, #1
-	beq	.L1235
-	ldrh	r2, [sl, #0]
-	cmp	r2, fp
-	bne	.L1235
-	strh	r4, [r6, #-2]	@ movhi
-	b	.L1236
-.L1235:
-	subs	r4, r4, #1
-	uxth	r4, r4
-.L1234:
-	ldrh	r2, [r8, #0]
-	sub	r1, r2, #15
-	cmp	r1, r4
-	ble	.L1237
-.L1236:
 	adds	r5, r5, #1
-.L1233:
+.L1212:
 	ldrh	r2, [r3, #0]
 	cmp	r5, r2
-	bcc	.L1238
+	bcc	.L1217
 	movs	r0, #0
 	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1240:
+.L1219:
 	.align	2
-.L1239:
-	.word	.LANCHOR96
-	.word	.LANCHOR197
-	.word	.LANCHOR89+12
-	.word	.LANCHOR180
+.L1218:
+	.word	.LANCHOR98
+	.word	.LANCHOR198
+	.word	.LANCHOR90+12
+	.word	.LANCHOR184
 	.word	.LANCHOR60
 	.word	.LANCHOR66
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
@@ -10785,13 +10575,13 @@ FlashProgSlc2KPages:
 	mov	fp, r1
 	str	r3, [sp, #12]
 	mov	r5, r0
-	ldr	r3, .L1259
+	ldr	r3, .L1238
 	movs	r6, #0
 	str	r2, [sp, #8]
-	ldr	r7, .L1259+4
+	ldr	r7, .L1238+4
 	ldrb	r8, [r3, #9]	@ zero_extendqisi2
-	b	.L1242
-.L1249:
+	b	.L1221
+.L1228:
 	rsb	r3, r6, fp
 	ldr	r1, [sp, #8]
 	add	r2, sp, #56
@@ -10800,16 +10590,16 @@ FlashProgSlc2KPages:
 	str	r3, [sp, #0]
 	add	r3, sp, #60
 	bl	LogAddr2PhyAddr
-	ldr	r1, .L1259+8
+	ldr	r1, .L1238+8
 	ldr	r3, [sp, #60]
 	ldrb	r2, [r1, #0]	@ zero_extendqisi2
 	cmp	r3, r2
-	bcc	.L1243
+	bcc	.L1222
 	mov	r3, #-1
 	str	r3, [r5, #0]
-	b	.L1244
-.L1243:
-	ldr	r2, .L1259+12
+	b	.L1223
+.L1222:
+	ldr	r2, .L1238+12
 	ldrb	r4, [r2, r3]	@ zero_extendqisi2
 	mov	r0, r4
 	bl	NandcWaitFlashReady
@@ -10843,13 +10633,13 @@ FlashProgSlc2KPages:
 	mov	r0, r4
 	bl	FlashProgFirstCmd
 	ldr	r3, [r5, #8]
-	cbz	r3, .L1246
+	cbz	r3, .L1225
 	add	r3, r3, #2048
-.L1246:
+.L1225:
 	ldr	r2, [r5, #12]
-	cbz	r2, .L1247
+	cbz	r2, .L1226
 	adds	r2, r2, #8
-.L1247:
+.L1226:
 	movs	r1, #1
 	str	r2, [sp, #0]
 	mov	r0, r4
@@ -10871,31 +10661,31 @@ FlashProgSlc2KPages:
 	movmi	r3, #-1
 	strmi	r3, [r5, #0]
 	bl	NandcFlashDeCs
-.L1244:
+.L1223:
 	adds	r6, r6, #1
 	adds	r5, r5, #36
-.L1242:
+.L1221:
 	cmp	r6, fp
-	bne	.L1249
+	bne	.L1228
 	ldr	r3, [sp, #12]
 	cmp	r3, #0
-	beq	.L1250
+	beq	.L1229
 	movs	r5, #0
 	add	r4, sl, #8
-	ldr	r6, .L1259+16
+	ldr	r6, .L1238+16
 	mov	sl, r5
-	ldr	r8, .L1259+36
-	b	.L1251
-.L1256:
+	ldr	r8, .L1238+36
+	b	.L1230
+.L1235:
 	ldr	r3, [r4, #-8]
 	sub	r7, r4, #8
 	adds	r3, r3, #1
-	bne	.L1252
+	bne	.L1231
 	ldr	r1, [r4, #-4]
-	ldr	r0, .L1259+20
+	ldr	r0, .L1238+20
 	bl	printf
-	b	.L1253
-.L1252:
+	b	.L1232
+.L1231:
 	rsb	r3, sl, fp
 	mov	r0, r7
 	ldr	r1, [sp, #8]
@@ -10924,60 +10714,60 @@ FlashProgSlc2KPages:
 	bl	FlashReadPages
 	ldr	r5, [sp, #20]
 	adds	r0, r5, #1
-	bne	.L1254
-	ldr	r0, .L1259+24
+	bne	.L1233
+	ldr	r0, .L1238+24
 	ldr	r1, [r4, #-4]
 	bl	printf
 	str	r5, [r4, #-8]
-.L1254:
+.L1233:
 	ldr	r3, [r4, #4]
-	cbz	r3, .L1255
+	cbz	r3, .L1234
 	ldr	r2, [r3, #0]
 	ldr	r3, [r8, #0]
 	ldr	r3, [r3, #0]
 	cmp	r2, r3
-	beq	.L1255
-	ldr	r0, .L1259+28
+	beq	.L1234
+	ldr	r0, .L1238+28
 	ldr	r1, [r4, #-4]
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4, #-8]
-.L1255:
+.L1234:
 	ldr	r3, [r4, #0]
-	cbz	r3, .L1253
+	cbz	r3, .L1232
 	ldr	r2, [r3, #0]
 	ldr	r3, [r6, #0]
 	ldr	r3, [r3, #0]
 	cmp	r2, r3
-	beq	.L1253
-	ldr	r0, .L1259+32
+	beq	.L1232
+	ldr	r0, .L1238+32
 	ldr	r1, [r4, #-4]
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4, #-8]
-.L1253:
+.L1232:
 	add	sl, sl, #1
 	adds	r4, r4, #36
-.L1251:
+.L1230:
 	cmp	sl, fp
-	bne	.L1256
-.L1250:
+	bne	.L1235
+.L1229:
 	movs	r0, #0
 	add	sp, sp, #64
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1260:
+.L1239:
 	.align	2
-.L1259:
+.L1238:
 	.word	.LANCHOR18
 	.word	.LANCHOR2
 	.word	.LANCHOR16
 	.word	.LANCHOR19
-	.word	.LANCHOR203
+	.word	.LANCHOR204
 	.word	.LC21
 	.word	.LC22
 	.word	.LC23
 	.word	.LC24
-	.word	.LANCHOR204
+	.word	.LANCHOR205
 	.size	FlashProgSlc2KPages, .-FlashProgSlc2KPages
 	.section	.text.FlashProgPages,"ax",%progbits
 	.align	1
@@ -10990,7 +10780,7 @@ FlashProgPages:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	sub	sp, sp, #72
-	ldr	r4, .L1288
+	ldr	r4, .L1267
 	mov	r8, r0
 	str	r1, [sp, #8]
 	mov	fp, r2
@@ -10998,16 +10788,16 @@ FlashProgPages:
 	ldr	r4, [r4, #0]
 	ldrb	r4, [r4, #19]	@ zero_extendqisi2
 	str	r4, [sp, #20]
-	ldr	r4, .L1288+4
+	ldr	r4, .L1267+4
 	ldrb	r4, [r4, #9]	@ zero_extendqisi2
 	str	r4, [sp, #12]
-	ldr	r4, .L1288+8
+	ldr	r4, .L1267+8
 	ldrb	r5, [r4, #0]	@ zero_extendqisi2
 	cmp	r5, #0
-	beq	.L1285
+	beq	.L1264
 	bl	FlashProgSlc2KPages
-	b	.L1263
-.L1275:
+	b	.L1242
+.L1254:
 	ldr	r1, [sp, #8]
 	movs	r4, #36
 	muls	r4, r5, r4
@@ -11020,56 +10810,56 @@ FlashProgPages:
 	str	r3, [sp, #0]
 	add	r3, sp, #68
 	bl	LogAddr2PhyAddr
-	ldr	r3, .L1288+12
+	ldr	r3, .L1267+12
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	mov	r7, r0
 	ldr	r0, [sp, #68]
 	cmp	r0, r3
-	bcc	.L1264
+	bcc	.L1243
 	mov	r3, #-1
 	str	r3, [r8, r4]
-	b	.L1265
-.L1264:
-	ldr	r3, .L1288+16
+	b	.L1244
+.L1243:
+	ldr	r3, .L1267+16
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	cmp	r3, #0
 	it	eq
 	moveq	r7, #0
 	add	r3, sl, r0, lsl #4
 	ldr	r3, [r3, #8]
-	cbz	r3, .L1267
+	cbz	r3, .L1246
 	uxtb	r0, r0
 	bl	FlashWaitCmdDone
-.L1267:
+.L1246:
 	ldr	r2, [sp, #68]
-	ldr	r1, .L1288+20
+	ldr	r1, .L1267+20
 	add	r3, r1, r2, lsl #4
 	movs	r1, #0
 	str	r1, [r3, #12]
 	ldr	r1, [sp, #64]
 	str	r6, [r3, #8]
 	str	r1, [r3, #4]
-	cbz	r7, .L1268
+	cbz	r7, .L1247
 	adds	r1, r5, #1
 	movs	r0, #36
 	mla	r1, r0, r1, r8
 	str	r1, [r3, #12]
-.L1268:
-	ldr	r3, .L1288+24
+.L1247:
+	ldr	r3, .L1267+24
 	ldrb	r4, [r3, r2]	@ zero_extendqisi2
 	lsls	r2, r2, #4
-	ldr	r3, .L1288+12
+	ldr	r3, .L1267+12
 	mov	r0, r4
 	strb	r4, [sl, r2]
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1269
+	bne	.L1248
 	bl	NandcWaitFlashReady
-	b	.L1270
-.L1269:
+	b	.L1249
+.L1248:
 	bl	NandcFlashCs
 	ldr	r2, [sp, #68]
-	ldr	r3, .L1288+28
+	ldr	r3, .L1267+28
 	mov	r0, r4
 	ldr	r1, [sp, #64]
 	ldr	r2, [r3, r2, lsl #2]
@@ -11079,34 +10869,34 @@ FlashProgPages:
 	bl	FlashWaitReadyEN
 	mov	r0, r4
 	bl	NandcFlashDeCs
-.L1270:
+.L1249:
 	ldr	r2, [sp, #20]
 	subs	r3, r2, #1
 	cmp	r3, #6
-	bhi	.L1271
-	ldr	r3, .L1288+32
+	bhi	.L1250
+	ldr	r3, .L1267+32
 	ldrb	r3, [r3, r4]	@ zero_extendqisi2
-	cbz	r3, .L1271
-	ldr	r3, .L1288+36
+	cbz	r3, .L1250
+	ldr	r3, .L1267+36
 	mov	r0, r4
 	adds	r2, r3, #4
 	ldrb	r1, [r3, #1]	@ zero_extendqisi2
 	movs	r3, #0
 	bl	HynixSetRRPara
-.L1271:
+.L1250:
 	mov	r0, r4
 	bl	NandcFlashCs
 	cmp	fp, #1
 	mov	r0, r4
-	bne	.L1272
-	ldr	r3, .L1288+40
+	bne	.L1251
+	ldr	r3, .L1267+40
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1272
+	cbz	r3, .L1251
 	bl	flash_enter_slc_mode
-	b	.L1273
-.L1272:
+	b	.L1252
+.L1251:
 	bl	flash_exit_slc_mode
-.L1273:
+.L1252:
 	mov	r0, r4
 	ldr	r1, [sp, #64]
 	bl	FlashProgFirstCmd
@@ -11117,11 +10907,11 @@ FlashProgPages:
 	str	r3, [sp, #0]
 	ldr	r3, [r6, #8]
 	bl	NandcXferData
-	cbz	r7, .L1274
+	cbz	r7, .L1253
 	mov	r0, r4
 	ldr	r1, [sp, #64]
 	bl	FlashProgDpFirstCmd
-	ldr	r3, .L1288+28
+	ldr	r3, .L1267+28
 	ldr	r2, [sp, #68]
 	mov	r0, r4
 	ldr	r1, [sp, #64]
@@ -11130,7 +10920,7 @@ FlashProgPages:
 	it	ne
 	movne	r2, #1
 	bl	FlashWaitReadyEN
-	ldr	r3, .L1288+44
+	ldr	r3, .L1267+44
 	mov	r0, r4
 	ldr	r1, [r3, #0]
 	ldr	r3, [sp, #64]
@@ -11146,62 +10936,62 @@ FlashProgPages:
 	ldr	r2, [sp, #12]
 	ldr	r3, [r3, #8]
 	bl	NandcXferData
-.L1274:
+.L1253:
 	mov	r0, r4
 	ldr	r1, [sp, #64]
 	bl	FlashProgSecondCmd
 	mov	r0, r4
 	bl	NandcFlashDeCs
 	adds	r5, r5, r7
-.L1265:
+.L1244:
 	adds	r5, r5, #1
-	b	.L1262
-.L1285:
-	ldr	sl, .L1288+20
-.L1262:
+	b	.L1241
+.L1264:
+	ldr	sl, .L1267+20
+.L1241:
 	ldr	r1, [sp, #8]
 	cmp	r5, r1
-	bcc	.L1275
+	bcc	.L1254
 	movs	r4, #0
-	ldr	r7, .L1288+12
-	ldr	r6, .L1288+40
-	ldr	r5, .L1288+20
-	b	.L1276
-.L1278:
+	ldr	r7, .L1267+12
+	ldr	r6, .L1267+40
+	ldr	r5, .L1267+20
+	b	.L1255
+.L1257:
 	uxtb	r0, r4
 	bl	FlashWaitCmdDone
 	cmp	fp, #1
-	bne	.L1277
+	bne	.L1256
 	ldrb	r3, [r6, #0]	@ zero_extendqisi2
-	cbz	r3, .L1277
+	cbz	r3, .L1256
 	lsls	r3, r4, #4
 	ldrb	r0, [r5, r3]	@ zero_extendqisi2
 	bl	flash_exit_slc_mode
-.L1277:
+.L1256:
 	adds	r4, r4, #1
-.L1276:
+.L1255:
 	ldrb	r3, [r7, #0]	@ zero_extendqisi2
 	cmp	r4, r3
-	bcc	.L1278
+	bcc	.L1257
 	ldr	r2, [sp, #16]
 	cmp	r2, #0
-	beq	.L1287
+	beq	.L1266
 	movs	r5, #0
 	add	r4, r8, #8
-	ldr	r6, .L1288+48
+	ldr	r6, .L1267+48
 	mov	sl, r5
-	ldr	r8, .L1288+68
-	b	.L1279
-.L1284:
+	ldr	r8, .L1267+68
+	b	.L1258
+.L1263:
 	ldr	r3, [r4, #-8]
 	sub	r7, r4, #8
 	adds	r3, r3, #1
-	bne	.L1280
+	bne	.L1259
 	ldr	r1, [r4, #-4]
-	ldr	r0, .L1288+52
+	ldr	r0, .L1267+52
 	bl	printf
-	b	.L1281
-.L1280:
+	b	.L1260
+.L1259:
 	ldr	r1, [sp, #8]
 	mov	r0, r7
 	add	r2, sp, #64
@@ -11231,49 +11021,49 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	r5, [sp, #28]
 	adds	r2, r5, #1
-	bne	.L1282
-	ldr	r0, .L1288+56
+	bne	.L1261
+	ldr	r0, .L1267+56
 	ldr	r1, [r4, #-4]
 	bl	printf
 	str	r5, [r4, #-8]
-.L1282:
+.L1261:
 	ldr	r3, [r4, #4]
-	cbz	r3, .L1283
+	cbz	r3, .L1262
 	ldr	r2, [r3, #0]
 	ldr	r3, [r8, #0]
 	ldr	r3, [r3, #0]
 	cmp	r2, r3
-	beq	.L1283
-	ldr	r0, .L1288+60
+	beq	.L1262
+	ldr	r0, .L1267+60
 	ldr	r1, [r4, #-4]
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4, #-8]
-.L1283:
+.L1262:
 	ldr	r3, [r4, #0]
-	cbz	r3, .L1281
+	cbz	r3, .L1260
 	ldr	r2, [r3, #0]
 	ldr	r3, [r6, #0]
 	ldr	r3, [r3, #0]
 	cmp	r2, r3
-	beq	.L1281
-	ldr	r0, .L1288+64
+	beq	.L1260
+	ldr	r0, .L1267+64
 	ldr	r1, [r4, #-4]
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4, #-8]
-.L1281:
+.L1260:
 	add	sl, sl, #1
 	adds	r4, r4, #36
-.L1279:
+.L1258:
 	ldr	r2, [sp, #8]
 	cmp	sl, r2
-	bne	.L1284
+	bne	.L1263
 	movs	r0, #0
-	b	.L1263
-.L1289:
+	b	.L1242
+.L1268:
 	.align	2
-.L1288:
+.L1267:
 	.word	.LANCHOR23
 	.word	.LANCHOR18
 	.word	.LANCHOR0
@@ -11286,15 +11076,15 @@ FlashProgPages:
 	.word	.LANCHOR31
 	.word	.LANCHOR7
 	.word	.LANCHOR2
-	.word	.LANCHOR203
+	.word	.LANCHOR204
 	.word	.LC21
 	.word	.LC22
 	.word	.LC23
 	.word	.LC24
-	.word	.LANCHOR204
-.L1287:
+	.word	.LANCHOR205
+.L1266:
 	ldr	r0, [sp, #16]
-.L1263:
+.L1242:
 	add	sp, sp, #72
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
 	.size	FlashProgPages, .-FlashProgPages
@@ -11307,104 +11097,128 @@ FlashProgPages:
 FtlVpcTblFlush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1281
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r8, #0
-	ldr	r4, .L1302
-	ldr	sl, .L1302+88
-	ldr	fp, .L1302+92
-	ldr	r6, .L1302+4
-	ldr	r0, [sl, #0]
-	ldr	r5, [fp, #0]
-	ldrh	r3, [r4, #0]
+	ldr	r3, [r3, #0]
+	cmp	r3, #0
+	bne	.L1270
+	ldr	r2, .L1281+4
+	ldr	r6, .L1281+8
+	ldr	r4, .L1281+12
+	ldr	r0, [r2, #0]
+	ldr	r2, .L1281+16
+	ldr	r7, .L1281+20
 	str	r0, [r6, #8]
+	ldr	r5, [r2, #0]
+	ldr	r2, .L1281+24
 	str	r5, [r6, #12]
-	strh	r3, [r5, #2]	@ movhi
-	movw	r3, #61604
-	strh	r3, [r5, #0]	@ movhi
-	ldr	r3, [r4, #8]
-	ldr	r7, .L1302+8
-	ldr	r1, .L1302+12
-	str	r3, [r5, #4]
-	ldr	r3, .L1302+16
-	str	r8, [r5, #8]
-	str	r8, [r5, #12]
-	stmia	r7, {r1, r3}
-	ldrh	r3, [r4, #6]
-	strh	r3, [r7, #8]	@ movhi
-	ldr	r3, .L1302+20
+	ldrh	r1, [r2, #0]
+	str	r3, [r5, #12]
+	strh	r1, [r5, #2]	@ movhi
+	movw	r1, #61604
+	strh	r1, [r5, #0]	@ movhi
+	ldr	r1, [r2, #8]
+	str	r3, [r5, #8]
+	ldr	r3, .L1281+28
+	str	r1, [r5, #4]
+	stmia	r4, {r3, r7}
+	ldrh	r3, [r2, #6]
+	strh	r3, [r4, #8]	@ movhi
+	ldr	r3, .L1281+32
 	ldrh	r3, [r3, #0]
-	strb	r3, [r7, #10]
-	ldr	r3, .L1302+24
+	strb	r3, [r4, #10]
+	ldr	r3, .L1281+36
 	ldrh	r2, [r3, #0]
 	ldrh	r1, [r3, #2]
-	strh	r2, [r7, #14]	@ movhi
+	strh	r2, [r4, #14]	@ movhi
 	ldrb	r2, [r3, #6]	@ zero_extendqisi2
 	ldrb	r3, [r3, #8]	@ zero_extendqisi2
 	orr	r2, r2, r1, lsl #6
-	strh	r2, [r7, #16]	@ movhi
-	strb	r3, [r7, #11]
-	ldr	r3, .L1302+28
+	strh	r2, [r4, #16]	@ movhi
+	strb	r3, [r4, #11]
+	ldr	r3, .L1281+40
 	ldrh	r2, [r3, #0]
 	ldrh	r1, [r3, #2]
-	strh	r2, [r7, #18]	@ movhi
+	strh	r2, [r4, #18]	@ movhi
 	ldrb	r2, [r3, #6]	@ zero_extendqisi2
 	ldrb	r3, [r3, #8]	@ zero_extendqisi2
 	orr	r2, r2, r1, lsl #6
-	strh	r2, [r7, #20]	@ movhi
-	strb	r3, [r7, #12]
-	ldr	r3, .L1302+32
+	strh	r2, [r4, #20]	@ movhi
+	strb	r3, [r4, #12]
+	ldr	r3, .L1281+44
 	ldrh	r2, [r3, #0]
-	strh	r2, [r7, #22]	@ movhi
 	ldrh	r1, [r3, #2]
+	strh	r2, [r4, #22]	@ movhi
 	ldrb	r2, [r3, #6]	@ zero_extendqisi2
-	ldrb	r3, [r3, #8]	@ zero_extendqisi2
 	orr	r2, r2, r1, lsl #6
+	strh	r2, [r4, #24]	@ movhi
+	ldrb	r3, [r3, #8]	@ zero_extendqisi2
 	movs	r1, #255
-	strh	r2, [r7, #24]	@ movhi
-	strb	r3, [r7, #13]
-	ldr	r3, .L1302+36
+	strb	r3, [r4, #13]
+	ldr	r3, .L1281+48
 	ldr	r3, [r3, #0]
-	str	r3, [r7, #32]
-	ldr	r3, .L1302+40
+	str	r3, [r4, #32]
+	ldr	r3, .L1281+52
 	ldr	r3, [r3, #0]
-	str	r3, [r7, #40]
-	ldr	r3, .L1302+44
+	str	r3, [r4, #40]
+	ldr	r3, .L1281+56
 	ldr	r3, [r3, #0]
-	str	r3, [r7, #36]
-	ldr	r3, .L1302+48
+	str	r3, [r4, #36]
+	ldr	r3, .L1281+60
 	ldrh	r2, [r3, #0]
 	bl	memset
-	mov	r1, r7
-	ldr	r7, .L1302+52
+	mov	r1, r4
+	ldr	r4, .L1281+64
 	movs	r2, #48
 	ldr	r0, [r6, #8]
 	bl	memcpy
-	ldr	r3, .L1302+56
-	ldrh	r2, [r7, #0]
+	ldr	r3, .L1281+68
+	ldrh	r2, [r4, #0]
 	ldr	r0, [r6, #8]
 	ldr	r1, [r3, #0]
 	lsls	r2, r2, #1
 	adds	r0, r0, #48
 	bl	memcpy
-	ldrh	r2, [r7, #0]
+	ldrh	r2, [r4, #0]
 	ldr	r3, [r6, #8]
-	mov	r7, r8
 	add	r0, r2, #24
 	lsrs	r2, r2, #3
 	lsrs	r0, r0, #1
 	adds	r2, r2, #4
 	add	r0, r3, r0, lsl #2
-	ldr	r3, .L1302+60
+	ldr	r3, .L1281+72
 	ldr	r1, [r3, #0]
 	bl	memcpy
-	mov	r0, r8
+	ldr	r3, .L1281+76
+	ldrh	r3, [r3, #0]
+	cbz	r3, .L1271
+	ldrh	r3, [r4, #0]
+	ldr	r1, [r6, #8]
+	lsrs	r0, r3, #3
+	add	r0, r0, r3, lsl #1
+	ldr	r3, .L1281+80
+	adds	r0, r0, #52
+	ubfx	r0, r0, #2, #14
+	ldrh	r2, [r3, #0]
+	ldr	r3, .L1281+84
+	add	r0, r1, r0, lsl #2
+	lsls	r2, r2, #2
+	ldr	r1, [r3, #0]
+	bl	memcpy
+.L1271:
+	movs	r0, #0
+	ldr	r6, .L1281+8
 	bl	FtlUpdateVaildLpn
+	ldr	sl, .L1281+4
+	ldr	fp, .L1281+16
+	movs	r7, #0
+	ldr	r4, .L1281+24
 	movw	r8, #65535
-.L1301:
+.L1280:
 	ldr	r3, [sl, #0]
 	movs	r1, #1
 	ldrh	r2, [r4, #0]
-	ldr	r0, .L1302+4
+	ldr	r0, .L1281+8
 	str	r3, [r6, #8]
 	ldr	r3, [fp, #0]
 	str	r3, [r6, #12]
@@ -11414,19 +11228,19 @@ FtlVpcTblFlush:
 	str	r3, [r6, #4]
 	mov	r3, r1
 	bl	FlashProgPages
-	ldr	r3, .L1302+64
+	ldr	r3, .L1281+88
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3, #0]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1292
+	blt	.L1273
 	ldrh	r3, [r4, #0]
 	ldrh	r8, [r4, #4]
 	strh	r3, [r4, #4]	@ movhi
 	movs	r3, #0
 	strh	r3, [r4, #2]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r2, .L1302+40
+	ldr	r2, .L1281+52
 	ldr	r3, [r2, #0]
 	adds	r1, r3, #1
 	str	r1, [r2, #0]
@@ -11439,85 +11253,93 @@ FtlVpcTblFlush:
 	str	r3, [r5, #4]
 	mov	r3, r1
 	strh	r0, [r5, #2]	@ movhi
-	ldr	r0, .L1302+4
+	ldr	r0, .L1281+8
 	bl	FlashProgPages
-.L1292:
+.L1273:
 	ldrh	r3, [r4, #2]
 	ldr	r2, [r6, #0]
 	adds	r3, r3, #1
-	adds	r2, r2, #1
+	adds	r1, r2, #1
 	uxth	r3, r3
 	strh	r3, [r4, #2]	@ movhi
-	bne	.L1293
+	bne	.L1274
 	cmp	r3, #1
-	bne	.L1294
-	ldr	r1, .L1302+68
-	mov	r2, #1096
-	ldr	r0, .L1302+72
+	bne	.L1275
+	ldr	r1, .L1281+92
+	movw	r2, #1180
+	ldr	r0, .L1281+96
 	bl	printf
-	ldr	r0, .L1302+76
-	ldr	r1, .L1302+80
+	ldr	r0, .L1281+100
+	ldr	r1, .L1281+104
 	bl	printf
-.L1294:
-	ldr	r2, .L1302
+.L1275:
+	ldr	r2, .L1281+24
 	ldrh	r3, [r2, #2]
 	cmp	r3, #1
-	bne	.L1295
-	ldr	r3, .L1302+64
+	bne	.L1276
+	ldr	r3, .L1281+88
 	ldrh	r3, [r3, #0]
 	subs	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
-.L1295:
+.L1276:
 	adds	r7, r7, #1
 	uxth	r7, r7
 	cmp	r7, #3
-	bls	.L1301
-	ldr	r3, .L1302+4
+	bls	.L1280
+	ldr	r3, .L1281+8
 	mov	r2, r7
-	ldr	r0, .L1302+84
+	ldr	r0, .L1281+108
 	ldr	r1, [r3, #4]
 	bl	printf
-.L1297:
-	b	.L1297
-.L1293:
+	ldr	r3, .L1281
+	movs	r2, #1
+	str	r2, [r3, #0]
+	b	.L1270
+.L1274:
 	cmp	r3, #1
-	beq	.L1301
+	beq	.L1280
+	cmp	r2, #256
+	beq	.L1280
 	movw	r3, #65535
 	cmp	r8, r3
-	beq	.L1298
+	beq	.L1270
 	mov	r0, r8
 	movs	r1, #1
 	bl	FtlFreeSysBlkQueueIn
-.L1298:
+.L1270:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1303:
+.L1282:
 	.align	2
-.L1302:
-	.word	.LANCHOR191
-	.word	.LANCHOR197
-	.word	.LANCHOR140
+.L1281:
+	.word	.LANCHOR94
+	.word	.LANCHOR98
+	.word	.LANCHOR198
+	.word	.LANCHOR143
+	.word	.LANCHOR184
+	.word	1342177351
+	.word	.LANCHOR196
 	.word	1179929683
-	.word	1342177344
 	.word	.LANCHOR60
-	.word	.LANCHOR107
-	.word	.LANCHOR108
 	.word	.LANCHOR109
-	.word	.LANCHOR161
-	.word	.LANCHOR153
-	.word	.LANCHOR154
+	.word	.LANCHOR110
+	.word	.LANCHOR111
+	.word	.LANCHOR164
+	.word	.LANCHOR156
+	.word	.LANCHOR157
 	.word	.LANCHOR73
 	.word	.LANCHOR55
-	.word	.LANCHOR99
-	.word	.LANCHOR117
+	.word	.LANCHOR101
+	.word	.LANCHOR119
+	.word	.LANCHOR85
+	.word	.LANCHOR82
+	.word	.LANCHOR126
 	.word	.LANCHOR69
-	.word	.LANCHOR205
+	.word	.LANCHOR206
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
 	.word	.LC25
-	.word	.LANCHOR96
-	.word	.LANCHOR180
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
 	.section	.text.FtlBbmTblFlush,"ax",%progbits
 	.align	1
@@ -11528,24 +11350,27 @@ FtlVpcTblFlush:
 FtlBbmTblFlush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1316
+	ldr	r3, .L1295
 	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	movs	r1, #0
+	ldr	r4, [r3, #0]
+	cmp	r4, #0
+	bne	.L1284
+	ldr	r3, .L1295+4
+	mov	r1, r4
+	ldr	r7, .L1295+8
+	ldr	r5, .L1295+12
 	ldr	r0, [r3, #0]
-	movs	r4, #0
-	ldr	r3, .L1316+4
-	ldr	r7, .L1316+8
-	ldr	r5, .L1316+12
-	ldr	r3, [r3, #0]
+	ldr	r3, .L1295+16
+	ldr	r8, .L1295+52
 	str	r0, [r7, #8]
-	ldr	r8, .L1316+48
+	ldr	r3, [r3, #0]
+	ldr	sl, .L1295+56
 	str	r3, [r7, #12]
-	ldr	r3, .L1316+16
-	ldr	sl, .L1316+52
+	ldr	r3, .L1295+20
 	ldrh	r2, [r3, #0]
 	bl	memset
-	b	.L1305
-.L1306:
+	b	.L1285
+.L1286:
 	ldrh	r2, [sl, #0]
 	ldr	r3, [r7, #8]
 	ldr	r1, [r5, #4]!
@@ -11554,11 +11379,11 @@ FtlBbmTblFlush:
 	adds	r4, r4, #1
 	add	r0, r3, r0, lsl #2
 	bl	memcpy
-.L1305:
+.L1285:
 	ldrh	r3, [r8, #0]
-	ldr	r6, .L1316+8
+	ldr	r6, .L1295+8
 	cmp	r4, r3
-	blt	.L1306
+	blt	.L1286
 	ldr	r5, [r6, #12]
 	movs	r2, #16
 	movs	r1, #255
@@ -11568,9 +11393,9 @@ FtlBbmTblFlush:
 	bl	memset
 	movw	r3, #61649
 	strh	r3, [r5, #0]	@ movhi
-	ldr	r3, .L1316+20
-	ldr	sl, .L1316
-	ldr	fp, .L1316+4
+	ldr	r3, .L1295+24
+	ldr	sl, .L1295+4
+	ldr	fp, .L1295+16
 	ldr	r2, [r3, #8]
 	str	r2, [r5, #4]
 	ldrh	r2, [r3, #0]
@@ -11579,16 +11404,16 @@ FtlBbmTblFlush:
 	ldrh	r3, [r3, #6]
 	strh	r2, [r5, #8]	@ movhi
 	strh	r3, [r5, #10]	@ movhi
-	ldr	r3, .L1316+24
+	ldr	r3, .L1295+28
 	ldr	r3, [r3, #0]
 	strh	r3, [r5, #12]	@ movhi
-	b	.L1315
-.L1312:
+	b	.L1294
+.L1291:
 	mov	r8, #1
-.L1315:
+.L1294:
 	ldr	r3, [sl, #0]
 	movs	r1, #0
-	ldr	r4, .L1316+20
+	ldr	r4, .L1295+24
 	ldrh	r0, [r5, #10]
 	str	r3, [r6, #8]
 	str	r1, [r6, #0]
@@ -11600,19 +11425,19 @@ FtlBbmTblFlush:
 	str	r3, [r6, #4]
 	ldrh	r3, [r4, #4]
 	str	r0, [sp, #0]
-	ldr	r0, .L1316+28
+	ldr	r0, .L1295+32
 	bl	printf
 	movs	r1, #1
 	mov	r2, r1
 	mov	r3, r1
-	ldr	r0, .L1316+8
+	ldr	r0, .L1295+8
 	bl	FlashProgPages
-	ldr	r3, .L1316+32
+	ldr	r3, .L1295+36
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3, #0]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1308
+	blt	.L1288
 	ldrh	r2, [r4, #0]
 	movs	r1, #0
 	ldr	r3, [r4, #8]
@@ -11624,7 +11449,7 @@ FtlBbmTblFlush:
 	strh	r2, [r5, #8]	@ movhi
 	ldrh	r3, [r4, #4]
 	strh	r2, [r4, #4]	@ movhi
-	ldr	r2, .L1316+36
+	ldr	r2, .L1295+40
 	strh	r3, [r4, #0]	@ movhi
 	lsls	r3, r3, #10
 	str	r3, [r6, #4]
@@ -11633,54 +11458,58 @@ FtlBbmTblFlush:
 	str	r3, [r0, #4]
 	bl	FlashEraseBlocks
 	movs	r1, #1
-	ldr	r0, .L1316+8
+	ldr	r0, .L1295+8
 	mov	r2, r1
 	mov	r3, r1
 	bl	FlashProgPages
-.L1308:
-	ldr	r3, .L1316+20
+.L1288:
+	ldr	r3, .L1295+24
 	ldrh	r2, [r3, #2]
 	adds	r2, r2, #1
 	strh	r2, [r3, #2]	@ movhi
 	ldr	r3, [r6, #0]
 	adds	r3, r3, #1
-	bne	.L1309
+	bne	.L1289
 	adds	r7, r7, #1
-	ldr	r0, .L1316+40
+	ldr	r0, .L1295+44
 	ldr	r1, [r6, #4]
 	uxth	r7, r7
 	bl	printf
 	cmp	r7, #3
-	bls	.L1315
-	ldr	r3, .L1316+8
+	bls	.L1294
+	ldr	r3, .L1295+8
 	mov	r2, r7
-	ldr	r0, .L1316+44
+	ldr	r0, .L1295+48
 	ldr	r1, [r3, #4]
 	bl	printf
-.L1311:
-	b	.L1311
-.L1309:
+	ldr	r3, .L1295
+	movs	r2, #1
+	str	r2, [r3, #0]
+	b	.L1284
+.L1289:
 	cmp	r8, #0
-	beq	.L1312
+	beq	.L1291
+.L1284:
 	movs	r0, #0
 	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1317:
+.L1296:
 	.align	2
-.L1316:
-	.word	.LANCHOR96
-	.word	.LANCHOR180
-	.word	.LANCHOR197
-	.word	.LANCHOR89+24
+.L1295:
+	.word	.LANCHOR94
+	.word	.LANCHOR98
+	.word	.LANCHOR198
+	.word	.LANCHOR90+24
+	.word	.LANCHOR184
 	.word	.LANCHOR73
-	.word	.LANCHOR89
+	.word	.LANCHOR90
 	.word	.LANCHOR52
 	.word	.LC26
 	.word	.LANCHOR69
-	.word	.LANCHOR93
+	.word	.LANCHOR95
 	.word	.LC27
 	.word	.LC28
 	.word	.LANCHOR60
-	.word	.LANCHOR90
+	.word	.LANCHOR91
 	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
 	.section	.text.FtlGcFreeBadSuperBlk,"ax",%progbits
 	.align	1
@@ -11693,22 +11522,22 @@ FtlGcFreeBadSuperBlk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
 	mov	sl, r0
-	ldr	r5, .L1328
+	ldr	r5, .L1307
 	ldrh	r3, [r5, #0]
-	cbnz	r3, .L1327
-	b	.L1320
-.L1326:
-	ldr	r3, .L1328+4
+	cbnz	r3, .L1306
+	b	.L1299
+.L1305:
+	ldr	r3, .L1307+4
 	mov	r1, sl
 	mov	fp, #0
 	ldrb	r0, [r3, r4]	@ zero_extendqisi2
 	bl	V2P_block
 	mov	r3, r0
-	b	.L1321
-.L1325:
+	b	.L1300
+.L1304:
 	ldrh	r2, [r7, fp, lsl #1]
 	cmp	r2, r3
-	bne	.L1322
+	bne	.L1301
 	mov	r0, r3
 	str	r3, [sp, #4]
 	bl	FtlBbmMapBadBlock
@@ -11716,46 +11545,46 @@ FtlGcFreeBadSuperBlk:
 	ldrh	r1, [r5, #0]
 	mov	r2, fp
 	ldr	r3, [sp, #4]
-	b	.L1323
-.L1324:
+	b	.L1302
+.L1303:
 	adds	r0, r2, #1
 	ldrh	lr, [r6, r0, lsl #1]
 	strh	lr, [r6, r2, lsl #1]	@ movhi
 	uxth	r2, r0
-.L1323:
+.L1302:
 	cmp	r2, r1
-	bcc	.L1324
+	bcc	.L1303
 	subs	r1, r1, #1
 	strh	r1, [r5, #0]	@ movhi
-.L1322:
+.L1301:
 	add	fp, fp, #1
 	uxth	fp, fp
-.L1321:
+.L1300:
 	ldrh	r2, [r5, #0]
 	cmp	r2, fp
-	bhi	.L1325
+	bhi	.L1304
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L1319
-.L1327:
-	ldr	r7, .L1328+8
+	b	.L1298
+.L1306:
+	ldr	r7, .L1307+8
 	movs	r4, #0
-	ldr	r8, .L1328+12
+	ldr	r8, .L1307+12
 	mov	r6, r7
-.L1319:
+.L1298:
 	ldrh	r3, [r8, #0]
 	cmp	r3, r4
-	bhi	.L1326
+	bhi	.L1305
 	bl	FtlGcReFreshBadBlk
-.L1320:
+.L1299:
 	movs	r0, #0
 	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1329:
+.L1308:
 	.align	2
-.L1328:
-	.word	.LANCHOR148
+.L1307:
+	.word	.LANCHOR151
 	.word	.LANCHOR62
-	.word	.LANCHOR149
+	.word	.LANCHOR152
 	.word	.LANCHOR53
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
 	.section	.text.update_vpc_list,"ax",%progbits
@@ -11769,46 +11598,46 @@ update_vpc_list:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	mov	r4, r0
-	ldr	r3, .L1340
+	ldr	r3, .L1319
 	ldr	r3, [r3, #0]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	bne	.L1331
-	ldr	r2, .L1340+4
+	bne	.L1310
+	ldr	r2, .L1319+4
 	ldrh	r1, [r2, #0]
 	cmp	r1, r0
-	bne	.L1332
+	bne	.L1311
 	movw	r3, #65535
 	strh	r3, [r2, #0]	@ movhi
-	b	.L1333
-.L1332:
-	ldr	r2, .L1340+8
+	b	.L1312
+.L1311:
+	ldr	r2, .L1319+8
 	ldrh	r2, [r2, #0]
 	cmp	r2, r0
-	beq	.L1334
-	ldr	r2, .L1340+12
+	beq	.L1313
+	ldr	r2, .L1319+12
 	ldrh	r2, [r2, #0]
 	cmp	r2, r0
-	beq	.L1334
-	ldr	r2, .L1340+16
+	beq	.L1313
+	ldr	r2, .L1319+16
 	ldrh	r2, [r2, #0]
 	cmp	r2, r0
-	beq	.L1334
-.L1333:
-	ldr	r5, .L1340+20
+	beq	.L1313
+.L1312:
+	ldr	r5, .L1319+20
 	mov	r1, r4
-	ldr	r0, .L1340+24
+	ldr	r0, .L1319+24
 	bl	List_remove_node
 	ldrh	r3, [r5, #0]
-	cbnz	r3, .L1335
-	ldr	r1, .L1340+28
-	movw	r2, #2809
-	ldr	r0, .L1340+32
+	cbnz	r3, .L1314
+	ldr	r1, .L1319+28
+	movw	r2, #3039
+	ldr	r0, .L1319+32
 	bl	printf
-	ldr	r0, .L1340+36
-	ldr	r1, .L1340+40
+	ldr	r0, .L1319+36
+	ldr	r1, .L1319+40
 	bl	printf
-.L1335:
+.L1314:
 	ldrh	r3, [r5, #0]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -11816,46 +11645,46 @@ update_vpc_list:
 	bl	free_data_superblock
 	mov	r0, r4
 	bl	FtlGcFreeBadSuperBlk
-	ldr	r3, .L1340+44
+	ldr	r3, .L1319+44
 	ldrh	r2, [r3, #0]
 	ldrh	r3, [r5, #0]
 	adds	r2, r2, r3
-	ldr	r3, .L1340+48
+	ldr	r3, .L1319+48
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	ble	.L1339
-	ldr	r1, .L1340+28
-	movw	r2, #2812
-	ldr	r0, .L1340+32
+	ble	.L1318
+	ldr	r1, .L1319+28
+	movw	r2, #3042
+	ldr	r0, .L1319+32
 	bl	printf
-	ldr	r1, .L1340+40
-	ldr	r0, .L1340+36
+	ldr	r1, .L1319+40
+	ldr	r0, .L1319+36
 	bl	printf
-	b	.L1339
-.L1331:
+	b	.L1318
+.L1310:
 	bl	List_update_data_list
 	movs	r3, #0
-	b	.L1334
-.L1339:
+	b	.L1313
+.L1318:
 	movs	r3, #1
-.L1334:
+.L1313:
 	mov	r0, r3
 	pop	{r3, r4, r5, pc}
-.L1341:
+.L1320:
 	.align	2
-.L1340:
-	.word	.LANCHOR99
-	.word	.LANCHOR201
-	.word	.LANCHOR107
-	.word	.LANCHOR108
-	.word	.LANCHOR109
+.L1319:
 	.word	.LANCHOR101
-	.word	.LANCHOR98
-	.word	.LANCHOR206
+	.word	.LANCHOR202
+	.word	.LANCHOR109
+	.word	.LANCHOR110
+	.word	.LANCHOR111
+	.word	.LANCHOR103
+	.word	.LANCHOR100
+	.word	.LANCHOR207
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
-	.word	.LANCHOR104
+	.word	.LANCHOR106
 	.word	.LANCHOR55
 	.size	update_vpc_list, .-update_vpc_list
 	.section	.text.decrement_vpc_count,"ax",%progbits
@@ -11871,87 +11700,87 @@ decrement_vpc_count:
 	cmp	r0, r3
 	push	{r4, r5, r6, lr}
 	mov	r4, r0
-	beq	.L1343
-	ldr	r6, .L1349
+	beq	.L1322
+	ldr	r6, .L1328
 	ldr	r3, [r6, #0]
 	ldrh	r5, [r3, r0, lsl #1]
-	cbnz	r5, .L1344
+	cbnz	r5, .L1323
 	mov	r1, r4
-	ldr	r0, .L1349+4
+	ldr	r0, .L1328+4
 	mov	r2, r5
 	bl	printf
 	ldr	r3, [r6, #0]
 	ldrh	r4, [r3, r4, lsl #1]
 	cmp	r4, #0
-	bne	.L1345
-	ldr	r1, .L1349+8
-	movw	r2, #2827
-	ldr	r0, .L1349+12
+	bne	.L1324
+	ldr	r1, .L1328+8
+	movw	r2, #3057
+	ldr	r0, .L1328+12
 	mov	r5, r4
 	bl	printf
-	ldr	r0, .L1349+16
-	ldr	r1, .L1349+20
+	ldr	r0, .L1328+16
+	ldr	r1, .L1328+20
 	bl	printf
-	b	.L1345
-.L1344:
+	b	.L1324
+.L1323:
 	subs	r5, r5, #1
 	strh	r5, [r3, r0, lsl #1]	@ movhi
-.L1343:
-	ldr	r6, .L1349+24
+.L1322:
+	ldr	r6, .L1328+24
 	movw	r3, #65535
 	ldrh	r0, [r6, #0]
 	cmp	r0, r3
-	bne	.L1346
+	bne	.L1325
 	strh	r4, [r6, #0]	@ movhi
-	b	.L1348
-.L1346:
+	b	.L1327
+.L1325:
 	cmp	r0, r4
-	beq	.L1348
+	beq	.L1327
 	bl	update_vpc_list
-	ldr	r3, .L1349+28
+	ldr	r3, .L1328+28
 	strh	r4, [r6, #0]	@ movhi
 	ldr	r2, [r3, #0]
-	ldr	r3, .L1349+32
+	ldr	r3, .L1328+32
 	ldr	r3, [r3, #0]
 	subs	r3, r2, r3
-	ldr	r2, .L1349+36
+	ldr	r2, .L1328+36
 	adds	r5, r0, #0
 	it	ne
 	movne	r5, #1
 	asrs	r3, r3, #1
 	muls	r3, r2, r3
-	ldr	r2, .L1349
+	ldr	r2, .L1328
 	uxth	r3, r3
 	ldr	r2, [r2, #0]
 	ldrh	r2, [r2, r3, lsl #1]
-	cbnz	r2, .L1345
+	cbnz	r2, .L1324
 	cmp	r4, r3
-	beq	.L1345
-	ldr	r1, .L1349+8
-	movw	r2, #2843
-	ldr	r0, .L1349+12
+	beq	.L1324
+	ldr	r1, .L1328+8
+	movw	r2, #3079
+	ldr	r0, .L1328+12
 	bl	printf
-	ldr	r1, .L1349+20
-	ldr	r0, .L1349+16
+	ldr	r1, .L1328+20
+	ldr	r0, .L1328+16
 	bl	printf
-	b	.L1345
-.L1348:
+	b	.L1324
+.L1327:
 	movs	r5, #0
-.L1345:
+.L1324:
 	mov	r0, r5
 	pop	{r4, r5, r6, pc}
-.L1350:
+.L1329:
 	.align	2
-.L1349:
-	.word	.LANCHOR99
+.L1328:
+	.word	.LANCHOR101
 	.word	.LC29
-	.word	.LANCHOR207
+	.word	.LANCHOR208
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
-	.word	.LANCHOR135
-	.word	.LANCHOR98
-	.word	.LANCHOR97
+	.word	.LANCHOR138
+	.word	.LANCHOR100
+	.word	.LANCHOR99
 	.word	-1431655765
 	.size	decrement_vpc_count, .-decrement_vpc_count
 	.section	.text.get_new_active_ppa,"ax",%progbits
@@ -11968,133 +11797,133 @@ get_new_active_ppa:
 	movw	r3, #65535
 	cmp	r2, r3
 	mov	r4, r0
-	bne	.L1352
-	ldr	r1, .L1367
-	movw	r2, #2749
-	ldr	r0, .L1367+4
+	bne	.L1331
+	ldr	r1, .L1346
+	movw	r2, #2979
+	ldr	r0, .L1346+4
 	bl	printf
-	ldr	r0, .L1367+8
-	ldr	r1, .L1367+12
+	ldr	r0, .L1346+8
+	ldr	r1, .L1346+12
 	bl	printf
-.L1352:
-	ldr	r3, .L1367+16
+.L1331:
+	ldr	r3, .L1346+16
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bne	.L1353
-	ldr	r1, .L1367
-	movw	r2, #2750
-	ldr	r0, .L1367+4
+	bne	.L1332
+	ldr	r1, .L1346
+	movw	r2, #2980
+	ldr	r0, .L1346+4
 	bl	printf
-	ldr	r0, .L1367+8
-	ldr	r1, .L1367+12
+	ldr	r0, .L1346+8
+	ldr	r1, .L1346+12
 	bl	printf
-.L1353:
+.L1332:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1354
-	ldr	r1, .L1367
-	movw	r2, #2751
-	ldr	r0, .L1367+4
+	cbnz	r3, .L1333
+	ldr	r1, .L1346
+	movw	r2, #2981
+	ldr	r0, .L1346+4
 	bl	printf
-	ldr	r0, .L1367+8
-	ldr	r1, .L1367+12
+	ldr	r0, .L1346+8
+	ldr	r1, .L1346+12
 	bl	printf
-.L1354:
+.L1333:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	movs	r7, #0
 	movw	r6, #65535
 	strb	r7, [r4, #10]
 	adds	r3, r3, #8
-	ldr	sl, .L1367+24
-	ldr	r8, .L1367+28
+	ldr	sl, .L1346+24
+	ldr	r8, .L1346+28
 	ldrh	r3, [r4, r3, lsl #1]
-	ldr	r5, .L1367+20
-	b	.L1355
-.L1356:
+	ldr	r5, .L1346+20
+	b	.L1334
+.L1335:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	ldrh	r2, [r5, #0]
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	strb	r3, [r4, #6]
 	cmp	r2, r3
-	bne	.L1357
+	bne	.L1336
 	ldrh	r3, [r4, #2]
 	strb	r7, [r4, #6]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
-.L1357:
+.L1336:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r3, [r4, r3, lsl #1]
-.L1355:
+.L1334:
 	cmp	r3, r6
-	beq	.L1356
+	beq	.L1335
 	ldrb	r2, [r4, #8]	@ zero_extendqisi2
 	cmp	r2, #1
-	bne	.L1358
+	bne	.L1337
 	ldrb	r2, [sl, #0]	@ zero_extendqisi2
-	cbnz	r2, .L1358
+	cbnz	r2, .L1337
 	ldrh	r2, [r4, #2]
 	ldrh	r2, [r8, r2, lsl #1]
 	cmp	r2, r6
-	bne	.L1358
+	bne	.L1337
 	ldrh	r3, [r4, #4]
 	ldrh	r0, [r4, #0]
 	subs	r3, r3, #1
 	strh	r3, [r4, #4]	@ movhi
 	bl	decrement_vpc_count
-	b	.L1356
-.L1358:
+	b	.L1335
+.L1337:
 	ldrh	r5, [r4, #2]
 	movw	r6, #65535
-	ldr	sl, .L1367+20
+	ldr	sl, .L1346+20
 	mov	r8, r6
-	ldr	r7, .L1367+24
+	ldr	r7, .L1346+24
 	orr	r5, r5, r3, lsl #10
 	ldrh	r3, [r4, #4]
 	subs	r3, r3, #1
 	strh	r3, [r4, #4]	@ movhi
-.L1363:
+.L1342:
 	ldrh	r2, [sl, #0]
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-.L1360:
+.L1339:
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, r2
-	bne	.L1359
+	bne	.L1338
 	ldrh	r3, [r4, #2]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
-.L1359:
+.L1338:
 	add	r1, r3, #8
 	ldrh	r1, [r4, r1, lsl #1]
 	cmp	r1, r6
-	beq	.L1360
+	beq	.L1339
 	strb	r3, [r4, #6]
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1361
+	bne	.L1340
 	ldrb	r2, [r7, #0]	@ zero_extendqisi2
 	ldrh	r3, [r4, #2]
-	cbnz	r2, .L1365
-	ldr	r2, .L1367+28
+	cbnz	r2, .L1344
+	ldr	r2, .L1346+28
 	ldrh	r3, [r2, r3, lsl #1]
 	cmp	r3, r8
-	bne	.L1361
+	bne	.L1340
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L1361
+	cbz	r3, .L1340
 	subs	r3, r3, #1
 	ldrh	r0, [r4, #0]
 	strh	r3, [r4, #4]	@ movhi
 	bl	decrement_vpc_count
-	b	.L1363
-.L1365:
-	ldr	r2, .L1367+32
+	b	.L1342
+.L1344:
+	ldr	r2, .L1346+32
 	ldrh	r2, [r2, #0]
 	cmp	r3, r2
-	bcc	.L1361
-	ldr	r3, .L1367+36
+	bcc	.L1340
+	ldr	r3, .L1346+36
 	ldrh	r2, [r4, #0]
 	ldrh	r1, [r4, #4]
 	ldr	r3, [r3, #0]
@@ -12104,32 +11933,32 @@ get_new_active_ppa:
 	movs	r3, #0
 	strh	r3, [r4, #4]	@ movhi
 	mov	r2, r3	@ movhi
-	ldr	r3, .L1367+16
+	ldr	r3, .L1346+16
 	strb	r2, [r4, #6]
 	ldrh	r3, [r3, #0]
 	strh	r3, [r4, #2]	@ movhi
-.L1361:
-	ldr	r3, .L1367+16
+.L1340:
+	ldr	r3, .L1346+16
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bne	.L1364
+	bne	.L1343
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L1364
-	ldr	r1, .L1367
-	movw	r2, #2795
-	ldr	r0, .L1367+4
+	cbz	r3, .L1343
+	ldr	r1, .L1346
+	movw	r2, #3025
+	ldr	r0, .L1346+4
 	bl	printf
-	ldr	r0, .L1367+8
-	ldr	r1, .L1367+12
+	ldr	r0, .L1346+8
+	ldr	r1, .L1346+12
 	bl	printf
-.L1364:
+.L1343:
 	mov	r0, r5
 	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
-.L1368:
+.L1347:
 	.align	2
-.L1367:
-	.word	.LANCHOR208
+.L1346:
+	.word	.LANCHOR209
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
@@ -12138,7 +11967,7 @@ get_new_active_ppa:
 	.word	.LANCHOR7
 	.word	.LANCHOR9
 	.word	.LANCHOR69
-	.word	.LANCHOR99
+	.word	.LANCHOR101
 	.size	get_new_active_ppa, .-get_new_active_ppa
 	.section	.text.FtlSlcSuperblockCheck,"ax",%progbits
 	.align	1
@@ -12153,47 +11982,47 @@ FtlSlcSuperblockCheck:
 	mov	r4, r0
 	ldrh	r3, [r0, #4]
 	cmp	r3, #0
-	beq	.L1369
+	beq	.L1348
 	ldrh	r3, [r0, #0]
 	movw	r5, #65535
 	cmp	r3, r5
-	beq	.L1369
+	beq	.L1348
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	movs	r6, #0
-	ldr	sl, .L1375+4
+	ldr	sl, .L1354+4
 	adds	r3, r3, #8
-	ldr	r8, .L1375+20
-	ldr	r7, .L1375
+	ldr	r8, .L1354+20
+	ldr	r7, .L1354
 	ldrh	r3, [r0, r3, lsl #1]
-	b	.L1371
-.L1372:
+	b	.L1350
+.L1351:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	ldrh	r2, [r7, #0]
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	strb	r3, [r4, #6]
 	cmp	r2, r3
-	bne	.L1373
+	bne	.L1352
 	ldrh	r3, [r4, #2]
 	strb	r6, [r4, #6]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
-.L1373:
+.L1352:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r3, [r4, r3, lsl #1]
-.L1371:
+.L1350:
 	cmp	r3, r5
-	beq	.L1372
+	beq	.L1351
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1374
+	bne	.L1353
 	ldrb	r2, [sl, #0]	@ zero_extendqisi2
-	cbnz	r2, .L1374
+	cbnz	r2, .L1353
 	ldrh	r2, [r4, #2]
 	ldrh	r2, [r8, r2, lsl #1]
 	cmp	r2, r5
-	bne	.L1374
+	bne	.L1353
 	ldrh	r3, [r4, #4]
 	ldrh	r0, [r4, #0]
 	subs	r3, r3, #1
@@ -12201,24 +12030,24 @@ FtlSlcSuperblockCheck:
 	bl	decrement_vpc_count
 	ldrh	r3, [r4, #4]
 	cmp	r3, #0
-	bne	.L1372
+	bne	.L1351
 	ldrh	r2, [r4, #2]
 	strb	r3, [r4, #6]
 	adds	r2, r2, #1
 	strh	r2, [r4, #2]	@ movhi
 	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
-.L1374:
-	ldr	r2, .L1375+4
+.L1353:
+	ldr	r2, .L1354+4
 	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	cbz	r2, .L1369
+	cbz	r2, .L1348
 	cmp	r3, #1
-	bne	.L1369
-	ldr	r3, .L1375+8
+	bne	.L1348
+	ldr	r3, .L1354+8
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bcc	.L1369
-	ldr	r3, .L1375+12
+	bcc	.L1348
+	ldr	r3, .L1354+12
 	ldrh	r2, [r4, #0]
 	ldrh	r1, [r4, #4]
 	ldr	r3, [r3, #0]
@@ -12228,19 +12057,19 @@ FtlSlcSuperblockCheck:
 	movs	r3, #0
 	strh	r3, [r4, #4]	@ movhi
 	mov	r2, r3	@ movhi
-	ldr	r3, .L1375+16
+	ldr	r3, .L1354+16
 	strb	r2, [r4, #6]
 	ldrh	r3, [r3, #0]
 	strh	r3, [r4, #2]	@ movhi
-.L1369:
+.L1348:
 	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
-.L1376:
+.L1355:
 	.align	2
-.L1375:
+.L1354:
 	.word	.LANCHOR53
 	.word	.LANCHOR7
 	.word	.LANCHOR69
-	.word	.LANCHOR99
+	.word	.LANCHOR101
 	.word	.LANCHOR68
 	.word	.LANCHOR9
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
@@ -12253,103 +12082,108 @@ FtlSlcSuperblockCheck:
 allocate_data_superblock:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1401
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	mov	r4, r0
-	ldr	r7, .L1419
+	ldr	r3, [r3, #0]
 	sub	sp, sp, #24
-	ldr	r8, .L1419+100
-.L1416:
-	ldr	r1, .L1419+4
+	cmp	r3, #0
+	bne	.L1357
+	ldr	r7, .L1401+4
+	ldr	r8, .L1401+104
+.L1397:
+	ldr	r1, .L1401+8
 	ldrh	r2, [r7, #0]
 	ldrh	r3, [r1, #0]
 	adds	r2, r2, r3
-	ldr	r3, .L1419+8
+	ldr	r3, .L1401+12
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	ble	.L1379
-	ldr	r1, .L1419+12
-	movw	r2, #2594
-	ldr	r0, .L1419+16
+	ble	.L1359
+	ldr	r1, .L1401+16
+	movw	r2, #2815
+	ldr	r0, .L1401+20
 	bl	printf
-	ldr	r0, .L1419+20
-	ldr	r1, .L1419+24
+	ldr	r0, .L1401+24
+	ldr	r1, .L1401+28
 	bl	printf
-.L1379:
-	ldr	r3, .L1419+28
+.L1359:
+	ldr	r3, .L1401+32
 	cmp	r4, r3
-	bne	.L1380
-	ldr	r3, .L1419+32
+	bne	.L1360
+	ldr	r3, .L1401+36
 	ldrh	r2, [r7, #0]
 	ldr	r3, [r3, #0]
 	lsrs	r1, r2, #1
 	adds	r0, r1, #1
 	mul	r5, r3, r2
 	add	r0, r0, r5, lsr #2
-	ldr	r5, .L1419+36
+	ldr	r5, .L1401+40
 	uxth	r0, r0
 	ldr	r5, [r5, #0]
-	cbz	r5, .L1408
-	ldr	r5, .L1419+40
+	cbz	r5, .L1389
+	ldr	r5, .L1401+44
 	ldr	r5, [r5, #0]
 	cmp	r5, #29
-	bhi	.L1408
+	bhi	.L1389
 	cmp	r5, #2
-	bls	.L1413
+	bls	.L1394
 	lsls	r0, r2, #31
-	bpl	.L1381
-	cbz	r3, .L1410
-	b	.L1381
-.L1380:
+	bpl	.L1361
+	cbz	r3, .L1391
+	b	.L1361
+.L1360:
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1413
-	ldr	r3, .L1419+44
+	bne	.L1394
+	ldr	r3, .L1401+48
 	ldrh	r3, [r3, #0]
 	cmp	r3, #1
-	beq	.L1413
-	ldr	r3, .L1419+48
+	beq	.L1394
+	ldr	r3, .L1401+52
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbnz	r3, .L1413
-	ldr	r2, .L1419+36
+	cbnz	r3, .L1394
+	ldr	r2, .L1401+40
 	ldrh	r3, [r7, #0]
 	ldr	r2, [r2, #0]
 	lsrs	r1, r3, #3
-	cbz	r2, .L1381
-	ldr	r2, .L1419+40
+	cbz	r2, .L1361
+	ldr	r2, .L1401+44
 	ldr	r2, [r2, #0]
 	cmp	r2, #1
-	bhi	.L1381
+	bhi	.L1361
 	movs	r1, #7
 	muls	r1, r3, r1
 	lsrs	r1, r1, #3
-	b	.L1381
-.L1408:
+	b	.L1361
+.L1389:
 	mov	r1, r0
-.L1381:
-	cbz	r1, .L1382
+.L1361:
+	cbz	r1, .L1362
 	subs	r1, r1, #1
 	uxth	r1, r1
-	b	.L1382
-.L1410:
+	b	.L1362
+.L1391:
 	mov	r1, r3
-	b	.L1382
-.L1413:
+	b	.L1362
+.L1394:
 	movs	r1, #0
-.L1382:
-	ldr	r0, .L1419+52
+.L1362:
+	ldr	r0, .L1401+56
+	ldrb	r2, [r4, #8]	@ zero_extendqisi2
 	bl	List_pop_index_node
 	ldrh	r3, [r7, #0]
 	uxth	r5, r0
-	cbnz	r3, .L1383
-	ldr	r1, .L1419+12
-	movw	r2, #2614
-	ldr	r0, .L1419+16
+	cbnz	r3, .L1363
+	ldr	r1, .L1401+16
+	movw	r2, #2835
+	ldr	r0, .L1401+20
 	bl	printf
-	ldr	r0, .L1419+20
-	ldr	r1, .L1419+24
+	ldr	r0, .L1401+24
+	ldr	r1, .L1401+28
 	bl	printf
-.L1383:
-	ldr	r2, .L1419
+.L1363:
+	ldr	r2, .L1401+4
 	mov	r0, r4
 	ldrh	r3, [r2, #0]
 	subs	r3, r3, #1
@@ -12357,45 +12191,45 @@ allocate_data_superblock:
 	strh	r5, [r4, #0]	@ movhi
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1384
-	ldr	r3, .L1419+56
+	cbnz	r3, .L1364
+	ldr	r3, .L1401+60
 	movw	r2, #65535
-	ldr	r1, .L1419+4
+	ldr	r1, .L1401+8
 	ldr	r3, [r3, #0]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
 	ldrh	r3, [r1, #0]
 	ldrh	r2, [r7, #0]
 	adds	r2, r2, r3
-	ldr	r3, .L1419+8
+	ldr	r3, .L1401+12
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	ble	.L1416
-	ldr	r1, .L1419+12
-	movw	r2, #2625
-	ldr	r0, .L1419+16
+	ble	.L1397
+	ldr	r1, .L1401+16
+	movw	r2, #2847
+	ldr	r0, .L1401+20
 	bl	printf
-	ldr	r1, .L1419+24
-	ldr	r0, .L1419+20
+	ldr	r1, .L1401+28
+	ldr	r0, .L1401+24
 	bl	printf
-	b	.L1416
-.L1384:
-	ldr	r1, .L1419+4
+	b	.L1397
+.L1364:
+	ldr	r1, .L1401+8
 	ldrh	r2, [r7, #0]
 	ldrh	r3, [r1, #0]
 	adds	r2, r2, r3
-	ldr	r3, .L1419+8
+	ldr	r3, .L1401+12
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	ble	.L1386
-	ldr	r1, .L1419+12
-	movw	r2, #2628
-	ldr	r0, .L1419+16
+	ble	.L1366
+	ldr	r1, .L1401+16
+	movw	r2, #2850
+	ldr	r0, .L1401+20
 	bl	printf
-	ldr	r0, .L1419+20
-	ldr	r1, .L1419+24
+	ldr	r0, .L1401+24
+	ldr	r1, .L1401+28
 	bl	printf
-.L1386:
-	ldr	r3, .L1419+60
+.L1366:
+	ldr	r3, .L1401+64
 	movs	r6, #0
 	ldr	lr, [r8, #0]
 	mov	sl, r4
@@ -12406,14 +12240,14 @@ allocate_data_superblock:
 	stmia	sp, {r4, lr}
 	str	r3, [sp, #20]
 	mov	r3, lr
-	b	.L1387
-.L1389:
+	b	.L1367
+.L1369:
 	str	r0, [r3, #8]
 	movw	r4, #65535
 	str	r0, [r3, #12]
 	ldrh	ip, [r1, #16]
 	cmp	ip, r4
-	beq	.L1388
+	beq	.L1368
 	ldr	r4, [sp, #4]
 	mov	lr, #36
 	lsl	ip, ip, #10
@@ -12421,154 +12255,170 @@ allocate_data_superblock:
 	adds	r6, r6, #1
 	uxth	r6, r6
 	str	ip, [fp, #4]
-.L1388:
+.L1368:
 	adds	r2, r2, #1
 	adds	r3, r3, #36
 	adds	r1, r1, #2
 	uxth	r2, r2
-.L1387:
+.L1367:
 	ldr	r4, [sp, #20]
 	cmp	r2, r4
-	bne	.L1389
+	bne	.L1369
 	ldr	r4, [sp, #0]
-	cbnz	r6, .L1390
-	ldr	r1, .L1419+12
-	mov	r2, #2640
-	ldr	r0, .L1419+16
+	cbnz	r6, .L1370
+	ldr	r1, .L1401+16
+	movw	r2, #2862
+	ldr	r0, .L1401+20
 	bl	printf
-	ldr	r0, .L1419+20
-	ldr	r1, .L1419+24
+	ldr	r0, .L1401+24
+	ldr	r1, .L1401+28
 	bl	printf
-.L1390:
-	ldr	r3, .L1419+36
+.L1370:
+	ldr	r3, .L1401+40
 	ldr	r3, [r3, #0]
-	cbz	r3, .L1391
-	ldr	r3, .L1419+64
+	cbz	r3, .L1371
+	ldr	r3, .L1401+68
 	cmp	r4, r3
-	bne	.L1391
-	ldr	r3, .L1419+68
+	bne	.L1371
+	ldr	r3, .L1401+72
 	ldr	r3, [r3, #0]
 	ldrh	r3, [r3, r5, lsl #1]
 	cmp	r3, #30
-	bls	.L1391
+	bls	.L1371
 	movs	r3, #0
 	strb	r3, [r4, #8]
-.L1391:
-	ldr	r3, .L1419+72
+.L1371:
+	ldr	r3, .L1401+76
 	ldrh	r3, [r3, #0]
 	cmp	r3, r5
-	bne	.L1392
-	ldr	r1, .L1419+12
-	movw	r2, #2647
-	ldr	r0, .L1419+16
+	bne	.L1372
+	ldr	r1, .L1401+16
+	movw	r2, #2869
+	ldr	r0, .L1401+20
 	bl	printf
-	ldr	r0, .L1419+20
-	ldr	r1, .L1419+24
+	ldr	r0, .L1401+24
+	ldr	r1, .L1401+28
 	bl	printf
-.L1392:
-	ldr	r3, .L1419+68
+.L1372:
+	ldr	r3, .L1401+72
 	ldrb	r2, [r4, #8]	@ zero_extendqisi2
 	ldr	r3, [r3, #0]
-	cbnz	r2, .L1393
+	cbnz	r2, .L1373
 	ldrh	r2, [r3, r5, lsl #1]
-	cbz	r2, .L1394
-	ldr	r1, .L1419+76
+	cbz	r2, .L1374
+	ldr	r1, .L1401+80
 	ldrh	r1, [r1, #0]
 	adds	r2, r2, r1
-	b	.L1417
-.L1394:
+	b	.L1398
+.L1374:
 	movs	r2, #2
-.L1417:
+.L1398:
 	strh	r2, [r3, r5, lsl #1]	@ movhi
 	mov	r0, r5
-	ldr	r3, .L1419+80
+	ldr	r3, .L1401+84
 	movs	r1, #0
 	ldr	r2, [r3, #0]
 	adds	r2, r2, #1
 	str	r2, [r3, #0]
-	b	.L1418
-.L1393:
+	b	.L1399
+.L1373:
 	ldrh	r2, [r3, r5, lsl #1]
 	mov	r0, r5
 	movs	r1, #1
 	adds	r2, r2, #1
 	strh	r2, [r3, r5, lsl #1]	@ movhi
-	ldr	r3, .L1419+84
+	ldr	r3, .L1401+88
 	ldr	r2, [r3, #0]
 	adds	r2, r2, #1
 	str	r2, [r3, #0]
-.L1418:
+.L1399:
 	bl	ftl_set_blk_mode
-	ldr	r3, .L1419+68
+	ldr	r3, .L1401+72
 	lsl	fp, r5, #1
 	str	fp, [sp, #20]
 	ldr	r3, [r3, #0]
 	ldrh	r2, [r3, r5, lsl #1]
-	ldr	r3, .L1419+88
+	ldr	r3, .L1401+92
 	ldr	r1, [r3, #0]
 	cmp	r2, r1
 	it	hi
 	strhi	r2, [r3, #0]
-	ldr	r3, .L1419+76
+	ldr	r3, .L1401+80
 	ldrh	r2, [r3, #0]
-	ldr	r3, .L1419+80
+	ldr	r3, .L1401+84
 	ldr	r0, [r3, #0]
-	ldr	r3, .L1419+84
+	ldr	r3, .L1401+88
 	ldr	r3, [r3, #0]
 	mla	r0, r0, r2, r3
-	ldr	r3, .L1419+8
+	ldr	r3, .L1401+12
 	ldrh	r1, [r3, #0]
 	bl	__aeabi_uidiv
-	ldr	r3, .L1419+92
+	ldr	r3, .L1401+96
 	str	r0, [r3, #0]
-	ldr	r3, .L1419+96
+	ldr	r3, .L1401+100
 	ldr	r3, [r3, #0]
 	ldr	r2, [r3, #16]
 	adds	r2, r2, #1
 	str	r2, [r3, #16]
 	ldr	r3, [r8, #0]
 	movs	r2, #0
-	b	.L1398
-.L1420:
+	b	.L1378
+.L1402:
 	.align	2
-.L1419:
-	.word	.LANCHOR104
-	.word	.LANCHOR101
+.L1401:
+	.word	.LANCHOR94
+	.word	.LANCHOR106
+	.word	.LANCHOR103
 	.word	.LANCHOR55
-	.word	.LANCHOR209
+	.word	.LANCHOR210
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
-	.word	.LANCHOR109
-	.word	.LANCHOR166
-	.word	.LANCHOR126
-	.word	.LANCHOR164
+	.word	.LANCHOR111
+	.word	.LANCHOR169
+	.word	.LANCHOR128
+	.word	.LANCHOR167
 	.word	.LANCHOR59
 	.word	.LANCHOR7
-	.word	.LANCHOR103
-	.word	.LANCHOR99
+	.word	.LANCHOR105
+	.word	.LANCHOR101
 	.word	.LANCHOR53
-	.word	.LANCHOR107
-	.word	.LANCHOR94
-	.word	.LANCHOR201
+	.word	.LANCHOR109
+	.word	.LANCHOR96
+	.word	.LANCHOR202
 	.word	.LANCHOR63
-	.word	.LANCHOR161
-	.word	.LANCHOR162
-	.word	.LANCHOR163
-	.word	.LANCHOR195
-	.word	.LANCHOR183
-	.word	.LANCHOR93
-.L1399:
+	.word	.LANCHOR164
+	.word	.LANCHOR165
+	.word	.LANCHOR166
+	.word	.LANCHOR211
+	.word	.LANCHOR187
+	.word	.LANCHOR95
+.L1379:
 	adds	r2, r2, #1
 	ldr	r1, [r3, #-32]
 	uxth	r2, r2
 	bic	r1, r1, #1020
 	bic	r1, r1, #3
 	str	r1, [r3, #-32]
-.L1398:
+.L1378:
 	adds	r3, r3, #36
 	cmp	r2, r6
-	bne	.L1399
+	bne	.L1379
+	ldr	r3, .L1403
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L1380
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	ldr	r0, [r8, #0]
+	cmp	r3, #1
+	bne	.L1381
+	movs	r1, #0
+	b	.L1400
+.L1381:
+	movs	r1, #1
+.L1400:
+	mov	r2, r6
+	bl	FlashEraseBlocks
+.L1380:
 	ldrb	r1, [r4, #8]	@ zero_extendqisi2
 	mov	r2, r6
 	mov	fp, #0
@@ -12579,52 +12429,52 @@ allocate_data_superblock:
 	mov	r5, fp
 	mov	r6, r4
 	mov	r4, fp
-	b	.L1400
-.L1402:
+	b	.L1382
+.L1384:
 	ldr	r1, [r8, #0]
 	add	r0, r1, fp
 	ldr	r1, [r1, fp]
 	adds	r2, r1, #1
-	bne	.L1401
+	bne	.L1383
 	ldr	r0, [r0, #4]
 	adds	r5, r5, #1
 	str	r1, [sp, #16]
 	ubfx	r0, r0, #10, #16
-	str	r3, [sp, #12]
-	str	ip, [sp, #8]
+	str	r3, [sp, #8]
+	str	ip, [sp, #12]
 	bl	FtlBbmMapBadBlock
 	ldr	r1, [sp, #16]
 	strh	r1, [sl, #16]	@ movhi
 	ldrb	r1, [r6, #7]	@ zero_extendqisi2
 	subs	r1, r1, #1
 	strb	r1, [r6, #7]
-	ldr	ip, [sp, #8]
-	ldr	r3, [sp, #12]
-.L1401:
+	ldr	ip, [sp, #12]
+	ldr	r3, [sp, #8]
+.L1383:
 	adds	r4, r4, #1
 	add	fp, fp, #36
 	add	sl, sl, #2
 	uxth	r4, r4
-.L1400:
+.L1382:
 	cmp	r4, r3
-	bne	.L1402
+	bne	.L1384
 	mov	r3, r5
 	mov	r4, r6
 	mov	r5, ip
-	cbz	r3, .L1403
+	cbz	r3, .L1385
 	mov	r0, ip
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L1403:
+.L1385:
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1404
-	ldr	r3, .L1421
+	cbnz	r3, .L1386
+	ldr	r3, .L1403+4
 	movw	r2, #65535
 	ldr	r3, [r3, #0]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
-	b	.L1416
-.L1404:
-	ldr	r2, .L1421+4
+	b	.L1397
+.L1386:
+	ldr	r2, .L1403+8
 	ldr	fp, [sp, #20]
 	ldrh	r2, [r2, #0]
 	muls	r3, r2, r3
@@ -12632,39 +12482,40 @@ allocate_data_superblock:
 	strh	r2, [r4, #2]	@ movhi
 	strb	r2, [r4, #6]
 	uxth	r3, r3
-	ldr	r2, .L1421+8
+	ldr	r2, .L1403+12
 	strh	r5, [r4, #0]	@ movhi
 	strh	r3, [r4, #4]	@ movhi
 	ldr	r1, [r2, #0]
 	str	r1, [r4, #12]
 	adds	r1, r1, #1
 	str	r1, [r2, #0]
-	ldr	r2, .L1421
+	ldr	r2, .L1403+4
 	ldr	r2, [r2, #0]
 	strh	r3, [r2, fp]	@ movhi
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L1405
+	cbz	r3, .L1387
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1406
-.L1405:
-	ldr	r1, .L1421+12
-	movw	r2, #2700
-	ldr	r0, .L1421+16
+	cbnz	r3, .L1357
+.L1387:
+	ldr	r1, .L1403+16
+	mov	r2, #2928
+	ldr	r0, .L1403+20
 	bl	printf
-	ldr	r0, .L1421+20
-	ldr	r1, .L1421+24
+	ldr	r0, .L1403+24
+	ldr	r1, .L1403+28
 	bl	printf
-.L1406:
+.L1357:
 	movs	r0, #0
 	add	sp, sp, #24
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1422:
+.L1404:
 	.align	2
-.L1421:
-	.word	.LANCHOR99
+.L1403:
+	.word	.LANCHOR7
+	.word	.LANCHOR101
 	.word	.LANCHOR68
-	.word	.LANCHOR153
-	.word	.LANCHOR209
+	.word	.LANCHOR156
+	.word	.LANCHOR210
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
@@ -12678,67 +12529,72 @@ allocate_data_superblock:
 FtlSuperblockPowerLostFix:
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1430
+	ldr	r3, .L1414
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	mov	r4, r0
-	ldrb	r7, [r3, #0]	@ zero_extendqisi2
+	ldrb	r6, [r3, #0]	@ zero_extendqisi2
 	sub	sp, sp, #40
-	cbz	r7, .L1424
-	ldrb	r7, [r0, #8]	@ zero_extendqisi2
-	sub	r5, r7, #1
-	rsbs	r7, r5, #0
-	adc	r7, r7, r5
-.L1424:
-	mov	r8, #7
-	mov	r5, #-1
-	ldr	sl, .L1430+16
-	ldr	fp, .L1430+20
-	ldr	r6, .L1430+4
-	b	.L1425
-.L1428:
+	cbz	r6, .L1413
+	ldrb	r6, [r0, #8]	@ zero_extendqisi2
+	cmp	r6, #1
+	bne	.L1412
+	ldrh	r5, [r0, #4]
+	b	.L1406
+.L1412:
+	movs	r6, #0
+.L1413:
+	movs	r5, #12
+.L1406:
+	mov	r7, #-1
+	ldr	sl, .L1414+12
+	ldr	fp, .L1414+16
+	ldr	r8, .L1414+20
+	b	.L1407
+.L1410:
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L1426
+	cbz	r3, .L1408
 	mov	r0, r4
 	bl	get_new_active_ppa
 	str	r0, [sp, #8]
 	adds	r0, r0, #1
-	beq	.L1426
+	beq	.L1408
 	ldr	r3, [sl, #0]
 	add	r0, sp, #4
 	ldr	r2, [fp, #0]
-	ldr	r1, [r6, #0]
+	subs	r5, r5, #1
+	ldr	r1, [r8, #0]
 	str	r3, [sp, #12]
 	ldrh	r3, [r4, #0]
 	str	r2, [sp, #16]
-	str	r5, [sp, #20]
+	str	r7, [sp, #20]
 	strh	r3, [r2, #2]	@ movhi
 	movs	r3, #0
 	str	r1, [r2, #4]
 	strh	r3, [r2, #0]	@ movhi
-	str	r5, [r2, #8]
-	str	r5, [r2, #12]
+	str	r7, [r2, #8]
+	str	r7, [r2, #12]
 	adds	r2, r1, #1
 	cmp	r2, #-1
 	it	eq
 	moveq	r2, r3
 	movs	r1, #1
-	str	r2, [r6, #0]
-	mov	r2, r7
+	str	r2, [r8, #0]
+	mov	r2, r6
 	bl	FlashProgPages
 	ldrh	r0, [r4, #0]
 	bl	decrement_vpc_count
-.L1425:
-	subs	r8, r8, #1
-	bne	.L1428
-.L1426:
-	ldr	r3, .L1430+8
+.L1407:
+	cmp	r5, #0
+	bne	.L1410
+.L1408:
+	ldr	r3, .L1414+4
 	ldrh	r2, [r4, #0]
 	ldrh	r1, [r4, #4]
 	ldr	r3, [r3, #0]
 	ldrh	r0, [r3, r2, lsl #1]
 	subs	r1, r0, r1
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L1430+12
+	ldr	r3, .L1414+8
 	ldrh	r3, [r3, #0]
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
@@ -12746,15 +12602,15 @@ FtlSuperblockPowerLostFix:
 	strh	r3, [r4, #4]	@ movhi
 	add	sp, sp, #40
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1431:
+.L1415:
 	.align	2
-.L1430:
+.L1414:
 	.word	.LANCHOR7
-	.word	.LANCHOR154
-	.word	.LANCHOR99
+	.word	.LANCHOR101
 	.word	.LANCHOR68
-	.word	.LANCHOR96
-	.word	.LANCHOR180
+	.word	.LANCHOR98
+	.word	.LANCHOR184
+	.word	.LANCHOR157
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
 	.section	.text.FtlLowFormatEraseBlock,"ax",%progbits
 	.align	1
@@ -12765,24 +12621,27 @@ FtlSuperblockPowerLostFix:
 FtlLowFormatEraseBlock:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1462
+	ldr	r3, .L1447
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	sub	sp, sp, #24
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	movs	r6, #0
-	str	r0, [sp, #12]
+	ldr	r6, [r3, #0]
 	mov	r8, r1
-	mov	r4, r6
+	str	r0, [sp, #12]
+	cmp	r6, #0
+	bne	.L1440
+	ldr	r3, .L1447+4
 	mov	r5, r6
-	str	r3, [sp, #8]
+	mov	r4, r6
+	ldr	sl, .L1447+28
 	movs	r7, #36
-	ldr	r3, .L1462+4
-	ldr	sl, .L1462+24
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	str	r3, [sp, #8]
+	ldr	r3, .L1447+8
 	str	r0, [r3, #0]
-	b	.L1433
-.L1437:
+	b	.L1418
+.L1422:
 	mul	r3, r7, r6
-	ldr	r1, .L1462+8
+	ldr	r1, .L1447+12
 	ldr	fp, [sl, #0]
 	movs	r0, #0
 	str	r0, [fp, r3]
@@ -12791,106 +12650,106 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	str	r0, [sp, #4]
 	cmp	r8, #0
-	beq	.L1434
+	beq	.L1419
 	bl	IsBlkInVendorPart
-	cbnz	r0, .L1435
-.L1434:
+	cbnz	r0, .L1420
+.L1419:
 	ldr	r0, [sp, #4]
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L1436
-	mul	r3, r7, r4
+	cbnz	r0, .L1421
+	mul	r3, r7, r5
 	ldr	r2, [sl, #0]
 	ldr	ip, [sp, #4]
 	adds	r2, r2, r3
 	add	r3, fp, r3
 	lsl	r1, ip, #10
 	str	r0, [r3, #8]
-	ldr	r0, .L1462+12
+	ldr	r0, .L1447+16
 	str	r1, [r2, #4]
 	ldrh	r2, [r0, #0]
-	muls	r2, r4, r2
-	ldr	r0, .L1462+16
-	adds	r4, r4, #1
+	muls	r2, r5, r2
+	ldr	r0, .L1447+20
+	adds	r5, r5, #1
 	bic	r2, r2, #3
-	uxth	r4, r4
+	uxth	r5, r5
 	ldr	r1, [r0, #0]
 	adds	r2, r1, r2
 	str	r2, [r3, #12]
-	b	.L1435
-.L1436:
-	adds	r5, r5, #1
-	uxth	r5, r5
-.L1435:
+	b	.L1420
+.L1421:
+	adds	r4, r4, #1
+	uxth	r4, r4
+.L1420:
 	adds	r6, r6, #1
 	uxth	r6, r6
-.L1433:
-	ldr	r1, .L1462+20
+.L1418:
+	ldr	r1, .L1447+24
 	ldrh	r3, [r1, #0]
 	cmp	r3, r6
-	bhi	.L1437
-	cmp	r4, #0
-	beq	.L1439
+	bhi	.L1422
+	cmp	r5, #0
+	beq	.L1417
 	ldr	r2, [sp, #8]
 	mov	sl, #0
-	ldr	r7, .L1462+24
+	ldr	r7, .L1447+28
 	mov	fp, sl
 	adds	r6, r2, #0
-	mov	r2, r4
+	mov	r2, r5
 	it	ne
 	movne	r6, #1
 	ldr	r0, [r7, #0]
 	mov	r1, r6
 	bl	FlashEraseBlocks
-.L1441:
+.L1426:
 	ldr	r3, [r7, #0]
 	add	r2, r3, sl
 	ldr	r3, [r3, sl]
 	adds	r3, r3, #1
-	bne	.L1440
+	bne	.L1425
 	ldr	r0, [r2, #4]
-	adds	r5, r5, #1
+	adds	r4, r4, #1
 	ubfx	r0, r0, #10, #16
-	uxth	r5, r5
+	uxth	r4, r4
 	bl	FtlBbmMapBadBlock
-.L1440:
+.L1425:
 	add	fp, fp, #1
 	add	sl, sl, #36
 	uxth	fp, fp
-	cmp	fp, r4
-	bne	.L1441
+	cmp	fp, r5
+	bne	.L1426
 	cmp	r8, #0
-	beq	.L1455
-	ldr	r3, .L1462+28
+	beq	.L1441
+	ldr	r3, .L1447+32
 	ldrh	r3, [r3, #0]
-	str	r3, [sp, #8]
-	ldr	r3, .L1462
+	str	r3, [sp, #4]
+	ldr	r3, .L1447+4
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbnz	r3, .L1456
-	ldr	ip, [sp, #8]
+	cbnz	r3, .L1442
+	ldr	ip, [sp, #4]
 	movs	r6, #1
 	lsr	ip, ip, #2
-	str	ip, [sp, #4]
-	b	.L1442
-.L1455:
+	str	ip, [sp, #8]
+	b	.L1427
+.L1441:
 	mov	ip, #6
-	str	ip, [sp, #4]
-	mov	ip, #1
 	str	ip, [sp, #8]
-	b	.L1442
-.L1456:
-	movs	r6, #1
-	str	r6, [sp, #4]
+	mov	ip, #1
+	str	ip, [sp, #4]
+	b	.L1427
 .L1442:
-	ldr	sl, .L1462+24
+	movs	r6, #1
+	str	r6, [sp, #8]
+.L1427:
+	ldr	sl, .L1447+28
 	movs	r7, #0
-.L1450:
+.L1435:
 	mov	fp, #0
-	mov	r4, fp
-	b	.L1443
-.L1446:
+	mov	r5, fp
+	b	.L1428
+.L1431:
 	mov	ip, #36
 	ldr	r2, [sl, #0]
-	ldr	r1, .L1462+8
+	ldr	r1, .L1447+12
 	movs	r0, #0
 	mul	r3, ip, fp
 	str	r2, [sp, #16]
@@ -12900,127 +12759,133 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	str	r0, [sp, #20]
 	cmp	r8, #0
-	beq	.L1444
+	beq	.L1429
 	bl	IsBlkInVendorPart
-	cbnz	r0, .L1445
-.L1444:
+	cbnz	r0, .L1430
+.L1429:
 	ldr	r0, [sp, #20]
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L1445
+	cbnz	r0, .L1430
 	ldr	r2, [sp, #16]
 	mov	ip, #36
 	ldr	r1, [sp, #20]
-	ldr	r0, .L1462+32
-	mla	r3, ip, r4, r2
+	ldr	r0, .L1447+36
+	mla	r3, ip, r5, r2
 	add	r2, r7, r1, lsl #10
-	ldr	r1, .L1462+12
+	ldr	r1, .L1447+16
 	str	r2, [r3, #4]
 	ldr	r2, [r0, #0]
-	ldr	r0, .L1462+36
+	ldr	r0, .L1447+40
 	str	r2, [r3, #8]
 	ldrh	r2, [r1, #0]
-	muls	r2, r4, r2
-	adds	r4, r4, #1
+	muls	r2, r5, r2
+	adds	r5, r5, #1
 	ldr	r1, [r0, #0]
 	bic	r2, r2, #3
-	uxth	r4, r4
+	uxth	r5, r5
 	adds	r2, r1, r2
 	str	r2, [r3, #12]
-.L1445:
+.L1430:
 	add	fp, fp, #1
 	uxth	fp, fp
-.L1443:
-	ldr	r1, .L1462+20
+.L1428:
+	ldr	r1, .L1447+24
 	ldrh	r3, [r1, #0]
 	cmp	r3, fp
-	bhi	.L1446
-	cmp	r4, #0
-	beq	.L1439
-	mov	r1, r4
+	bhi	.L1431
+	cmp	r5, #0
+	beq	.L1417
+	mov	r1, r5
 	mov	r2, r6
 	ldr	r0, [sl, #0]
 	movs	r3, #1
 	mov	fp, #0
 	bl	FlashProgPages
 	mov	ip, r8
-	mov	r8, r6
-	mov	r6, r4
-	mov	r4, fp
-.L1449:
+	mov	r8, r7
+	mov	r7, r6
+	mov	r6, r5
+	mov	r5, fp
+.L1434:
 	ldr	r2, [sl, #0]
 	add	r1, r2, fp
 	ldr	r2, [r2, fp]
-	cbz	r2, .L1448
+	cbz	r2, .L1433
 	ldr	r0, [r1, #4]
-	adds	r5, r5, #1
+	adds	r4, r4, #1
 	str	ip, [sp, #0]
 	ubfx	r0, r0, #10, #16
-	uxth	r5, r5
+	uxth	r4, r4
 	bl	FtlBbmMapBadBlock
 	ldr	ip, [sp, #0]
-.L1448:
-	adds	r4, r4, #1
+.L1433:
+	adds	r5, r5, #1
 	add	fp, fp, #36
-	uxth	r4, r4
-	cmp	r4, r6
-	bne	.L1449
-	mov	r4, r6
-	mov	r6, r8
+	uxth	r5, r5
+	cmp	r5, r6
+	bne	.L1434
+	mov	r5, r6
+	mov	r6, r7
+	mov	r7, r8
 	mov	r8, ip
-	ldr	ip, [sp, #4]
-	add	r7, r7, ip
 	ldr	ip, [sp, #8]
+	add	r7, r7, ip
+	ldr	ip, [sp, #4]
 	uxth	r7, r7
 	cmp	r7, ip
-	bcc	.L1450
+	bcc	.L1435
 	movs	r7, #0
-	ldr	fp, .L1462+24
+	ldr	fp, .L1447+28
 	mov	sl, r7
-.L1452:
+.L1437:
 	cmp	r8, #0
-	beq	.L1451
+	beq	.L1436
 	ldr	r3, [fp, #0]
 	adds	r2, r3, r7
 	ldr	r3, [r3, r7]
-	cbnz	r3, .L1451
+	cbnz	r3, .L1436
 	ldr	r0, [r2, #4]
 	movs	r1, #1
 	ubfx	r0, r0, #10, #16
 	bl	FtlFreeSysBlkQueueIn
-.L1451:
+.L1436:
 	add	sl, sl, #1
 	adds	r7, r7, #36
 	uxth	sl, sl
-	cmp	sl, r4
-	bne	.L1452
+	cmp	sl, r5
+	bne	.L1437
 	ldr	r0, [sp, #12]
 	cmp	r0, #63
-	bls	.L1453
+	bls	.L1438
 	cmp	r8, #0
-	beq	.L1439
-.L1453:
-	ldr	r3, .L1462+24
+	beq	.L1417
+.L1438:
+	ldr	r3, .L1447+28
 	mov	r1, r6
-	mov	r2, r4
+	mov	r2, r5
 	ldr	r0, [r3, #0]
 	bl	FlashEraseBlocks
-.L1439:
-	mov	r0, r5
+	b	.L1417
+.L1440:
+	movs	r4, #0
+.L1417:
+	mov	r0, r4
 	add	sp, sp, #24
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1463:
+.L1448:
 	.align	2
-.L1462:
+.L1447:
+	.word	.LANCHOR94
 	.word	.LANCHOR7
-	.word	.LANCHOR88
+	.word	.LANCHOR89
 	.word	.LANCHOR62
 	.word	.LANCHOR74
-	.word	.LANCHOR181
+	.word	.LANCHOR185
 	.word	.LANCHOR53
-	.word	.LANCHOR93
+	.word	.LANCHOR95
 	.word	.LANCHOR69
-	.word	.LANCHOR178
-	.word	.LANCHOR179
+	.word	.LANCHOR182
+	.word	.LANCHOR183
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
 	.section	.text.FlashTestBlk,"ax",%progbits
 	.align	1
@@ -13031,15 +12896,15 @@ FtlLowFormatEraseBlock:
 FlashTestBlk:
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1469
+	ldr	r3, .L1454
 	push	{r4, r5, lr}
 	mov	r4, r0
 	ldr	r3, [r3, #0]
 	sub	sp, sp, #108
 	cmp	r0, r3
-	bcc	.L1467
-.L1466:
-	ldr	r5, .L1469+4
+	bcc	.L1452
+.L1451:
+	ldr	r5, .L1454+4
 	add	r0, sp, #4
 	movs	r1, #165
 	movs	r2, #32
@@ -13071,16 +12936,16 @@ FlashTestBlk:
 	movne	r4, #-1
 	moveq	r4, #0
 	bl	FlashEraseBlocks
-	b	.L1465
-.L1467:
+	b	.L1450
+.L1452:
 	movs	r4, #0
-.L1465:
+.L1450:
 	mov	r0, r4
 	add	sp, sp, #108
 	pop	{r4, r5, pc}
-.L1470:
+.L1455:
 	.align	2
-.L1469:
+.L1454:
 	.word	.LANCHOR46
 	.word	.LANCHOR41
 	.size	FlashTestBlk, .-FlashTestBlk
@@ -13096,114 +12961,164 @@ ftl_map_blk_gc:
 	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
 	mov	r4, r0
 	ldr	r5, [r0, #12]
-	ldr	sl, [r0, #24]
+	ldr	fp, [r0, #24]
 	bl	ftl_free_no_use_map_blk
-	ldrh	r3, [r4, #10]
+	ldrh	r7, [r4, #10]
 	ldrh	r2, [r4, #8]
-	subs	r3, r3, #4
+	subs	r3, r7, #4
 	cmp	r2, r3
-	blt	.L1472
-	uxth	r0, r0
-	ldrh	r7, [r5, r0, lsl #1]
+	bge	.L1457
+	ldrh	r2, [r4, #40]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L1458
+	ldr	r3, .L1471
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	bcc	.L1458
+.L1457:
+	ldrh	r1, [r4, #40]
+	movw	r3, #65535
+	uxth	r6, r0
+	cmp	r1, r3
+	beq	.L1459
+	ldr	r2, .L1471
+	ldrh	r3, [r4, #2]
+	ldrh	r2, [r2, #0]
+	cmp	r2, r3
+	bhi	.L1459
+	mov	r0, r5
+	movs	r2, #0
+	b	.L1460
+.L1462:
+	ldrh	lr, [r0], #2
+	cmp	lr, r1
+	beq	.L1470
+	adds	r2, r2, #1
+	uxth	r2, r2
+.L1460:
+	cmp	r2, r7
+	bne	.L1462
+	b	.L1461
+.L1470:
+	mov	r6, r2
+.L1461:
+	ldr	r0, .L1471+4
+	ldrh	r2, [r5, r2, lsl #1]
+	bl	printf
+	movw	r3, #65535
+	strh	r3, [r4, #40]	@ movhi
+.L1459:
+	ldrh	r7, [r5, r6, lsl #1]
+	lsls	r2, r6, #1
 	cmp	r7, #0
-	beq	.L1472
+	beq	.L1458
 	ldr	r3, [r4, #32]
 	cmp	r3, #0
-	bne	.L1472
-	movs	r2, #1
-	str	r2, [r4, #32]
-	strh	r3, [r5, r0, lsl #1]	@ movhi
+	bne	.L1458
+	movs	r1, #1
+	str	r1, [r4, #32]
+	strh	r3, [r5, r2]	@ movhi
 	ldrh	r3, [r4, #8]
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	ldr	r3, .L1480
+	ldr	r3, .L1471
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bcc	.L1473
+	bcc	.L1463
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L1473:
+.L1463:
 	movs	r5, #0
-	ldr	r6, .L1480+4
-	ldr	fp, .L1480+28
-	mov	r8, r7
-	b	.L1474
-.L1478:
+	ldr	r6, .L1471+8
+	ldr	sl, .L1471+40
+	b	.L1464
+.L1468:
 	lsls	r3, r5, #2
 	str	r3, [sp, #4]
-	ldr	r3, [sl, r5, lsl #2]
-	cmp	r8, r3, lsr #10
-	bne	.L1475
-	ldr	r2, [fp, #0]
+	ldr	r3, [fp, r5, lsl #2]
+	cmp	r7, r3, lsr #10
+	bne	.L1465
+	ldr	r2, [sl, #0]
 	movs	r1, #1
-	ldr	r0, .L1480+4
 	str	r3, [r6, #4]
+	ldr	r0, .L1471+8
 	str	r2, [r6, #8]
-	ldr	r2, .L1480+8
-	ldr	r7, [r2, #0]
+	ldr	r2, .L1471+12
+	ldr	r8, [r2, #0]
 	mov	r2, r1
-	str	r7, [r6, #12]
+	str	r8, [r6, #12]
 	bl	FlashReadPages
-	ldrh	r3, [r7, #8]
+	ldrh	r3, [r8, #8]
 	cmp	r3, r5
-	beq	.L1476
-	ldr	r1, .L1480+12
-	movw	r2, #585
-	ldr	r0, .L1480+16
+	beq	.L1466
+	ldr	r1, .L1471+16
+	movw	r2, #638
+	ldr	r0, .L1471+20
 	bl	printf
-	ldr	r0, .L1480+20
-	ldr	r1, .L1480+24
+	ldr	r0, .L1471+24
+	ldr	r1, .L1471+28
 	bl	printf
-.L1476:
-	ldr	r3, .L1480+4
+.L1466:
+	ldr	r3, .L1471+8
 	ldr	r3, [r3, #0]
 	adds	r3, r3, #1
-	bne	.L1477
+	bne	.L1467
 	ldr	r2, [sp, #4]
 	movs	r3, #0
-	str	r3, [sl, r2]
-	b	.L1475
-.L1477:
+	ldr	r0, .L1471+32
+	str	r3, [fp, r2]
+	ldrh	r2, [r8, #8]
+	ldr	r1, [r6, #4]
+	bl	printf
+	ldr	r2, .L1471+36
+	movs	r3, #1
+	str	r3, [r2, #0]
+	b	.L1465
+.L1467:
 	mov	r0, r4
 	mov	r1, r5
 	ldr	r2, [r6, #8]
 	bl	FtlMapWritePage
-.L1475:
+.L1465:
 	adds	r5, r5, #1
 	uxth	r5, r5
-.L1474:
+.L1464:
 	ldrh	r3, [r4, #6]
 	cmp	r3, r5
-	bhi	.L1478
-	mov	r7, r8
-	mov	r0, r8
+	bhi	.L1468
+	mov	r0, r7
 	movs	r1, #1
 	bl	FtlFreeSysBlkQueueIn
 	movs	r3, #0
 	str	r3, [r4, #32]
-.L1472:
-	ldr	r3, .L1480
+.L1458:
+	ldr	r3, .L1471
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bcc	.L1479
+	bcc	.L1469
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L1479:
+.L1469:
 	movs	r0, #0
 	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1481:
+.L1472:
 	.align	2
-.L1480:
+.L1471:
 	.word	.LANCHOR69
-	.word	.LANCHOR197
-	.word	.LANCHOR180
-	.word	.LANCHOR210
+	.word	.LC30
+	.word	.LANCHOR198
+	.word	.LANCHOR184
+	.word	.LANCHOR212
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
-	.word	.LANCHOR176
+	.word	.LC31
+	.word	.LANCHOR94
+	.word	.LANCHOR180
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
 	.section	.text.Ftl_write_map_blk_to_last_page,"ax",%progbits
 	.align	1
@@ -13214,24 +13129,28 @@ ftl_map_blk_gc:
 Ftl_write_map_blk_to_last_page:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	movw	r2, #65535
-	ldrh	r3, [r0, #0]
+	ldr	r3, .L1480
+	push	{r4, r5, r6, r7, r8, lr}
 	mov	r4, r0
+	ldr	r6, [r3, #0]
 	ldr	r5, [r0, #12]
+	ldr	r8, [r0, #24]
+	cmp	r6, #0
+	bne	.L1474
+	ldrh	r3, [r0, #0]
+	movw	r2, #65535
 	cmp	r3, r2
-	ldr	r7, [r0, #24]
-	bne	.L1483
+	bne	.L1475
 	ldrh	r3, [r0, #8]
-	cbz	r3, .L1484
-	ldr	r1, .L1489
-	movw	r2, #613
-	ldr	r0, .L1489+4
+	cbz	r3, .L1476
+	ldr	r1, .L1480+4
+	movw	r2, #670
+	ldr	r0, .L1480+8
 	bl	printf
-	ldr	r0, .L1489+8
-	ldr	r1, .L1489+12
+	ldr	r0, .L1480+12
+	ldr	r1, .L1480+16
 	bl	printf
-.L1484:
+.L1476:
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
@@ -13243,17 +13162,17 @@ Ftl_write_map_blk_to_last_page:
 	ldr	r3, [r4, #28]
 	adds	r3, r3, #1
 	str	r3, [r4, #28]
-	b	.L1485
-.L1483:
+	b	.L1474
+.L1475:
 	ldrh	r5, [r5, r3, lsl #1]
 	movs	r1, #255
-	ldr	r2, .L1489+16
+	ldr	r2, .L1480+20
 	ldrh	r3, [r0, #2]
-	ldr	r6, .L1489+20
+	ldr	r7, .L1480+24
 	orr	r3, r3, r5, lsl #10
 	str	r3, [r2, #4]
-	ldr	r3, .L1489+24
-	ldr	r0, [r6, #0]
+	ldr	r3, .L1480+28
+	ldr	r0, [r7, #0]
 	ldr	r3, [r3, #0]
 	str	r0, [r2, #8]
 	str	r3, [r2, #12]
@@ -13264,34 +13183,34 @@ Ftl_write_map_blk_to_last_page:
 	ldrh	r2, [r4, #4]
 	strh	r5, [r3, #2]	@ movhi
 	strh	r2, [r3, #0]	@ movhi
-	ldr	r3, .L1489+28
+	ldr	r3, .L1480+32
 	ldrh	r2, [r3, #0]
 	lsls	r2, r2, #3
 	bl	memset
-	movs	r3, #0
 	ldrh	r0, [r4, #6]
-	mov	r2, r3
-	ldr	r1, [r6, #0]
-	b	.L1486
-.L1488:
-	ldr	r6, [r7], #4
-	cmp	r5, r6, lsr #10
-	bne	.L1487
-	adds	r2, r2, #1
-	uxth	r2, r2
-	str	r3, [r1, r2, lsl #3]
-	add	r6, r1, r2, lsl #3
-	ldr	lr, [r7, #-4]
-	str	lr, [r6, #4]
-.L1487:
+	ldr	r1, [r7, #0]
+	mov	r2, r8
+	mov	r3, r6
+	b	.L1477
+.L1479:
+	ldr	r7, [r2], #4
+	cmp	r5, r7, lsr #10
+	bne	.L1478
 	adds	r3, r3, #1
-.L1486:
-	uxth	r6, r3
-	cmp	r6, r0
-	bcc	.L1488
+	uxth	r3, r3
+	str	r6, [r1, r3, lsl #3]
+	add	r7, r1, r3, lsl #3
+	ldr	lr, [r2, #-4]
+	str	lr, [r7, #4]
+.L1478:
+	adds	r6, r6, #1
+.L1477:
+	uxth	r7, r6
+	cmp	r7, r0
+	bcc	.L1479
 	movs	r1, #1
 	movs	r3, #0
-	ldr	r0, .L1489+16
+	ldr	r0, .L1480+20
 	mov	r2, r1
 	bl	FlashProgPages
 	ldrh	r3, [r4, #2]
@@ -13299,19 +13218,20 @@ Ftl_write_map_blk_to_last_page:
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	bl	ftl_map_blk_gc
-.L1485:
+.L1474:
 	movs	r0, #0
-	pop	{r3, r4, r5, r6, r7, pc}
-.L1490:
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1481:
 	.align	2
-.L1489:
-	.word	.LANCHOR211
+.L1480:
+	.word	.LANCHOR94
+	.word	.LANCHOR213
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
-	.word	.LANCHOR197
-	.word	.LANCHOR96
-	.word	.LANCHOR180
+	.word	.LANCHOR198
+	.word	.LANCHOR98
+	.word	.LANCHOR184
 	.word	.LANCHOR69
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
 	.section	.text.FtlMapWritePage,"ax",%progbits
@@ -13323,138 +13243,144 @@ Ftl_write_map_blk_to_last_page:
 FtlMapWritePage:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1496
 	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
 	mov	r4, r0
-	ldr	r7, .L1507
-	movs	r6, #0
-	ldr	r8, .L1507+32
-	ldr	r5, .L1507+4
-	ldr	fp, .L1507+36
+	ldr	r6, [r3, #0]
 	stmia	sp, {r1, r2}
-.L1505:
-	ldr	r3, [r7, #0]
+	cmp	r6, #0
+	bne	.L1483
+	ldr	r8, .L1496+32
+	ldr	sl, .L1496+36
+	ldr	r5, .L1496+4
+	ldr	fp, .L1496+40
+.L1495:
+	ldr	r3, [r8, #0]
 	ldrh	r2, [r4, #2]
 	adds	r3, r3, #1
-	str	r3, [r7, #0]
-	ldrh	r3, [r8, #0]
+	str	r3, [r8, #0]
+	ldrh	r3, [sl, #0]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	bge	.L1493
+	bge	.L1485
 	ldrh	r3, [r4, #0]
 	movw	r1, #65535
 	cmp	r3, r1
-	bne	.L1494
-.L1493:
+	bne	.L1486
+.L1485:
 	mov	r0, r4
 	bl	Ftl_write_map_blk_to_last_page
-.L1494:
+.L1486:
 	ldrh	r2, [r4, #0]
 	ldr	r3, [r4, #12]
 	ldrh	r3, [r3, r2, lsl #1]
-	cbnz	r3, .L1495
-	ldr	r1, .L1507+8
-	movw	r2, #671
-	ldr	r0, .L1507+12
+	cbnz	r3, .L1487
+	ldr	r1, .L1496+8
+	movw	r2, #731
+	ldr	r0, .L1496+12
 	bl	printf
-	ldr	r0, .L1507+16
-	ldr	r1, .L1507+20
+	ldr	r0, .L1496+16
+	ldr	r1, .L1496+20
 	bl	printf
-.L1495:
+.L1487:
 	ldrh	r2, [r4, #0]
 	ldrh	r3, [r4, #10]
 	cmp	r2, r3
-	bcc	.L1496
-	ldr	r1, .L1507+8
-	mov	r2, #672
-	ldr	r0, .L1507+12
+	bcc	.L1488
+	ldr	r1, .L1496+8
+	mov	r2, #732
+	ldr	r0, .L1496+12
 	bl	printf
-	ldr	r0, .L1507+16
-	ldr	r1, .L1507+20
+	ldr	r0, .L1496+16
+	ldr	r1, .L1496+20
 	bl	printf
-.L1496:
+.L1488:
 	ldrh	r2, [r4, #0]
 	movs	r1, #0
 	ldr	r3, [r4, #12]
 	ldr	r0, [fp, #0]
-	ldrh	sl, [r3, r2, lsl #1]
+	ldrh	r7, [r3, r2, lsl #1]
 	ldr	r2, [sp, #4]
 	ldrh	r3, [r4, #2]
 	str	r0, [r5, #12]
 	str	r2, [r5, #8]
 	movs	r2, #16
-	orr	r3, r3, sl, lsl #10
+	orr	r3, r3, r7, lsl #10
 	str	r3, [r5, #4]
 	bl	memset
 	ldr	r3, [r5, #12]
 	ldr	r2, [r4, #28]
 	ldr	r1, [sp, #0]
-	ldr	r0, .L1507+4
+	ldr	r0, .L1496+4
 	str	r2, [r3, #4]
 	ldrh	r2, [r4, #4]
 	strh	r1, [r3, #8]	@ movhi
 	movs	r1, #1
-	strh	sl, [r3, #2]	@ movhi
+	strh	r7, [r3, #2]	@ movhi
 	strh	r2, [r3, #0]	@ movhi
 	mov	r2, r1
 	mov	r3, r1
 	bl	FlashProgPages
-	ldrh	r3, [r4, #2]
-	ldr	r2, [r5, #0]
-	adds	r3, r3, #1
+	ldrh	r2, [r4, #2]
+	ldr	r3, [r5, #0]
 	adds	r2, r2, #1
-	uxth	r3, r3
-	strh	r3, [r4, #2]	@ movhi
-	bne	.L1497
-	ldr	r0, .L1507+24
+	adds	r1, r3, #1
+	uxth	r2, r2
+	strh	r2, [r4, #2]	@ movhi
+	bne	.L1489
+	ldr	r0, .L1496+24
 	adds	r6, r6, #1
 	ldr	r1, [r5, #4]
 	bl	printf
 	ldrh	r3, [r4, #2]
 	uxth	r6, r6
 	cmp	r3, #2
-	bhi	.L1498
-	ldrh	r3, [r8, #0]
+	bhi	.L1490
+	ldrh	r3, [sl, #0]
 	subs	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
-.L1498:
+.L1490:
 	cmp	r6, #3
-	bls	.L1499
-	ldr	r3, .L1507+4
+	bls	.L1495
+	ldr	r3, .L1496+4
 	mov	r2, r6
-	ldr	r0, .L1507+28
+	ldr	r0, .L1496+28
 	ldr	r1, [r3, #4]
 	bl	printf
-.L1500:
-	b	.L1500
-.L1499:
-	ldr	r3, [r4, #32]
-	cmp	r3, #0
-	beq	.L1505
-.L1506:
-	b	.L1506
-.L1497:
-	cmp	r3, #1
-	beq	.L1505
-	ldr	r3, .L1507+4
-	movs	r0, #0
+	ldr	r3, .L1496
+	movs	r2, #1
+	str	r2, [r3, #0]
+	b	.L1483
+.L1489:
+	cbz	r3, .L1492
+	strh	r7, [r4, #40]	@ movhi
+.L1492:
+	cmp	r2, #1
+	beq	.L1495
+	cmp	r3, #256
+	beq	.L1495
+	ldr	r3, .L1496+4
 	ldr	r1, [sp, #0]
 	ldr	r2, [r3, #4]
 	ldr	r3, [r4, #24]
 	str	r2, [r3, r1, lsl #2]
+.L1483:
+	movs	r0, #0
 	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1508:
+.L1497:
 	.align	2
-.L1507:
-	.word	.LANCHOR159
-	.word	.LANCHOR197
-	.word	.LANCHOR212
+.L1496:
+	.word	.LANCHOR94
+	.word	.LANCHOR198
+	.word	.LANCHOR214
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
-	.word	.LC30
-	.word	.LC31
+	.word	.LC32
+	.word	.LC33
+	.word	.LANCHOR162
 	.word	.LANCHOR69
-	.word	.LANCHOR180
+	.word	.LANCHOR184
 	.size	FtlMapWritePage, .-FtlMapWritePage
 	.section	.text.FtlMapBlkWriteDumpData,"ax",%progbits
 	.align	1
@@ -13471,27 +13397,31 @@ FtlMapBlkWriteDumpData:
 	ldrh	r6, [r0, #6]
 	ldr	r8, [r0, #24]
 	cmp	r3, #0
-	beq	.L1509
+	beq	.L1498
 	movs	r3, #0
 	str	r3, [r0, #36]
-	ldr	r3, .L1515
-	ldr	r5, .L1515+4
+	ldr	r3, .L1504
+	ldr	r3, [r3, #0]
+	cmp	r3, #0
+	bne	.L1498
+	ldr	r3, .L1504+4
+	ldr	r5, .L1504+8
 	ldr	r3, [r3, #0]
 	str	r3, [r5, #8]
-	ldr	r3, .L1515+8
+	ldr	r3, .L1504+12
 	ldr	r7, [r3, #0]
 	ldrh	r3, [r0, #2]
 	str	r7, [r5, #12]
-	cbz	r3, .L1511
-	ldr	r2, .L1515+12
+	cbz	r3, .L1500
+	ldr	r2, .L1504+16
 	ldrh	r2, [r2, #0]
 	subs	r2, r2, #1
 	cmp	r3, r2
-	bge	.L1511
+	bge	.L1500
 	ldrh	r2, [r0, #0]
 	movw	r1, #65535
 	cmp	r2, r1
-	beq	.L1511
+	beq	.L1500
 	ldr	r1, [r0, #12]
 	subs	r3, r3, #1
 	mov	r0, r5
@@ -13503,85 +13433,370 @@ FtlMapBlkWriteDumpData:
 	bl	FlashReadPages
 	ldr	r3, [r5, #0]
 	adds	r3, r3, #1
-	beq	.L1511
+	beq	.L1500
 	ldr	r3, [r4, #24]
 	ldrh	r1, [r7, #8]
 	ldr	r2, [r3, r1, lsl #2]
 	ldr	r3, [r5, #4]
 	cmp	r2, r3
-	bne	.L1511
+	bne	.L1500
 	mov	r0, r4
-	b	.L1514
-.L1511:
+	b	.L1503
+.L1500:
 	subs	r6, r6, #1
-	ldr	r5, .L1515+4
+	ldr	r5, .L1504+8
 	uxth	r6, r6
 	ldr	r3, [r8, r6, lsl #2]
 	str	r3, [r5, #4]
-	cbz	r3, .L1512
+	cbz	r3, .L1501
 	movs	r1, #1
 	mov	r0, r5
 	mov	r2, r1
 	bl	FlashReadPages
-	b	.L1513
-.L1512:
-	ldr	r3, .L1515+16
+	b	.L1502
+.L1501:
+	ldr	r3, .L1504+20
 	movs	r1, #255
 	ldr	r0, [r5, #8]
 	ldrh	r2, [r3, #0]
 	bl	memset
-.L1513:
+.L1502:
 	mov	r0, r4
 	mov	r1, r6
-.L1514:
+.L1503:
 	ldr	r2, [r5, #8]
 	pop	{r4, r5, r6, r7, r8, lr}
 	b	FtlMapWritePage
-.L1509:
+.L1498:
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1516:
+.L1505:
 	.align	2
-.L1515:
-	.word	.LANCHOR176
-	.word	.LANCHOR197
+.L1504:
+	.word	.LANCHOR94
 	.word	.LANCHOR180
+	.word	.LANCHOR198
+	.word	.LANCHOR184
 	.word	.LANCHOR69
 	.word	.LANCHOR73
 	.size	FtlMapBlkWriteDumpData, .-FtlMapBlkWriteDumpData
-	.section	.text.FtlVendorPartWrite,"ax",%progbits
+	.section	.text.FtlVendorPartRead,"ax",%progbits
 	.align	1
-	.global	FtlVendorPartWrite
+	.global	FtlVendorPartRead
 	.thumb
 	.thumb_func
-	.type	FtlVendorPartWrite, %function
-FtlVendorPartWrite:
+	.type	FtlVendorPartRead, %function
+FtlVendorPartRead:
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1527
+	ldr	r3, .L1517
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	sub	sp, sp, #56
-	ldrh	sl, [r3, #0]
-	mov	r6, r0
-	ldr	r3, .L1527+4
-	mov	r4, r1
-	str	r2, [sp, #8]
+	mov	fp, r2
+	ldrh	r6, [r3, #0]
 	adds	r2, r1, r0
+	ldr	r3, .L1517+4
+	sub	sp, sp, #56
+	mov	r7, r0
+	mov	r5, r1
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bhi	.L1525
-	lsr	sl, r0, sl
-	mov	fp, #0
-	ldr	r7, .L1527+8
-	lsl	r3, sl, #2
+	bhi	.L1515
+	lsr	r6, r0, r6
+	ldr	r8, .L1517+28
+	lsls	r3, r6, #2
+	str	r3, [sp, #8]
+	movs	r3, #0
 	str	r3, [sp, #4]
-	b	.L1519
-.L1524:
-	ldr	r2, .L1527+12
-	mov	r0, r6
+	b	.L1508
+.L1514:
+	ldr	r2, .L1517+8
+	mov	r0, r7
 	ldr	r3, [r2, #0]
-	ldr	r2, [sp, #4]
-	ldr	r3, [r3, r2]
-	ldr	r2, .L1527+16
+	ldr	r2, [sp, #8]
+	ldr	sl, [r3, r2]
+	ldr	r3, .L1517+12
+	ldrh	r4, [r3, #0]
+	mov	r1, r4
+	bl	__aeabi_uidivmod
+	uxth	r1, r1
+	str	r1, [sp, #12]
+	subs	r4, r4, r1
+	uxth	r4, r4
+	cmp	r4, r5
+	it	hi
+	uxthhi	r4, r5
+	cmp	sl, #0
+	beq	.L1510
+	ldr	r3, [r8, #0]
+	movs	r1, #1
+	mov	r2, r1
+	add	r0, sp, #20
+	str	sl, [sp, #24]
+	str	r3, [sp, #28]
+	movs	r3, #0
+	str	r3, [sp, #32]
+	bl	FlashReadPages
+	ldr	r3, [sp, #20]
+	ldr	r2, [sp, #4]
+	cmp	r3, #-1
+	it	eq
+	moveq	r2, #-1
+	str	r2, [sp, #4]
+	ldr	r2, .L1517+16
+	ldr	r3, [r2, #0]
+	cmp	r3, #256
+	bne	.L1512
+	mov	r1, r6
+	mov	r2, sl
+	ldr	r0, .L1517+20
+	bl	printf
+	ldr	r0, .L1517+24
+	mov	r1, r6
+	ldr	r2, [r8, #0]
+	bl	FtlMapWritePage
+.L1512:
+	ldr	r3, [sp, #12]
+	mov	r0, fp
+	ldr	r1, [r8, #0]
+	lsls	r2, r4, #9
+	add	r1, r1, r3, lsl #9
+	bl	memcpy
+	b	.L1513
+.L1510:
+	mov	r0, fp
+	mov	r1, sl
+	lsls	r2, r4, #9
+	bl	memset
+.L1513:
+	ldr	r3, [sp, #8]
+	adds	r6, r6, #1
+	subs	r5, r5, r4
+	adds	r7, r7, r4
+	add	fp, fp, r4, lsl #9
+	adds	r3, r3, #4
+	str	r3, [sp, #8]
+.L1508:
+	cmp	r5, #0
+	bne	.L1514
+	b	.L1507
+.L1515:
+	mov	r3, #-1
+	str	r3, [sp, #4]
+.L1507:
+	ldr	r0, [sp, #4]
+	add	sp, sp, #56
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L1518:
+	.align	2
+.L1517:
+	.word	.LANCHOR72
+	.word	.LANCHOR65
+	.word	.LANCHOR190
+	.word	.LANCHOR71
+	.word	.LANCHOR198
+	.word	.LC34
+	.word	.LANCHOR215
+	.word	.LANCHOR181
+	.size	FtlVendorPartRead, .-FtlVendorPartRead
+	.section	.text.Ftl_load_ext_data,"ax",%progbits
+	.align	1
+	.global	Ftl_load_ext_data
+	.thumb
+	.thumb_func
+	.type	Ftl_load_ext_data, %function
+Ftl_load_ext_data:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	movs	r0, #0
+	ldr	r4, .L1523
+	movs	r1, #1
+	ldr	r5, .L1523+4
+	mov	r2, r4
+	bl	FtlVendorPartRead
+	ldr	r3, [r4, #0]
+	cmp	r3, r5
+	beq	.L1520
+	mov	r0, r4
+	movs	r1, #0
+	mov	r2, #512
+	bl	memset
+	str	r5, [r4, #0]
+.L1520:
+	ldr	r2, [r4, #0]
+	ldr	r3, .L1523
+	cmp	r2, r5
+	bne	.L1521
+	ldr	r1, [r3, #88]
+	ldr	r2, .L1523+8
+	str	r1, [r2, #0]
+	ldr	r1, [r3, #92]
+	ldr	r2, .L1523+12
+	str	r1, [r2, #0]
+	ldr	r1, [r3, #8]
+	ldr	r2, .L1523+16
+	str	r1, [r2, #0]
+	ldr	r1, [r3, #12]
+	ldr	r2, .L1523+20
+	str	r1, [r2, #0]
+	ldr	r1, [r3, #16]
+	ldr	r2, .L1523+24
+	str	r1, [r2, #0]
+	ldr	r1, [r3, #20]
+	ldr	r2, .L1523+28
+	str	r1, [r2, #0]
+	ldr	r1, [r3, #28]
+	ldr	r2, .L1523+32
+	str	r1, [r2, #0]
+	ldr	r1, [r3, #32]
+	ldr	r2, .L1523+36
+	str	r1, [r2, #0]
+	ldr	r1, [r3, #36]
+	ldr	r2, .L1523+40
+	str	r1, [r2, #0]
+	ldr	r1, [r3, #40]
+	ldr	r2, .L1523+44
+	str	r1, [r2, #0]
+	ldr	r1, [r3, #44]
+	ldr	r2, .L1523+48
+	str	r1, [r2, #0]
+	ldr	r1, [r3, #48]
+	ldr	r2, .L1523+52
+	str	r1, [r2, #0]
+	ldr	r2, [r3, #60]
+	ldr	r3, .L1523+56
+	str	r2, [r3, #0]
+.L1521:
+	ldr	r3, .L1523+60
+	movs	r2, #0
+	str	r2, [r3, #0]
+	ldr	r3, .L1523
+	ldr	r2, [r3, #68]
+	ldr	r3, .L1523+64
+	cmp	r2, r3
+	bne	.L1522
+	ldr	r3, .L1523+68
+	movs	r2, #1
+	ldr	r0, .L1523+72
+	ldr	r1, .L1523+76
+	str	r2, [r3, #0]
+	bl	printf
+.L1522:
+	ldr	r3, .L1523+80
+	ldrh	r2, [r3, #0]
+	ldr	r3, .L1523+84
+	ldr	r0, [r3, #0]
+	ldr	r3, .L1523+32
+	ldr	r3, [r3, #0]
+	mla	r0, r0, r2, r3
+	ldr	r3, .L1523+88
+	ldrh	r1, [r3, #0]
+	bl	__aeabi_uidiv
+	ldr	r3, .L1523+92
+	str	r0, [r3, #0]
+	pop	{r3, r4, r5, pc}
+.L1524:
+	.align	2
+.L1523:
+	.word	.LANCHOR144
+	.word	1179929683
+	.word	.LANCHOR216
+	.word	.LANCHOR217
+	.word	.LANCHOR158
+	.word	.LANCHOR159
+	.word	.LANCHOR163
+	.word	.LANCHOR162
+	.word	.LANCHOR165
+	.word	.LANCHOR97
+	.word	.LANCHOR160
+	.word	.LANCHOR161
+	.word	.LANCHOR166
+	.word	.LANCHOR167
+	.word	.LANCHOR155
+	.word	.LANCHOR154
+	.word	305432421
+	.word	.LANCHOR128
+	.word	.LC10
+	.word	.LC35
+	.word	.LANCHOR63
+	.word	.LANCHOR164
+	.word	.LANCHOR55
+	.word	.LANCHOR211
+	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
+	.section	.text.FtlLoadEctTbl,"ax",%progbits
+	.align	1
+	.global	FtlLoadEctTbl
+	.thumb
+	.thumb_func
+	.type	FtlLoadEctTbl, %function
+FtlLoadEctTbl:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	movs	r0, #64
+	ldr	r4, .L1527
+	ldr	r5, .L1527+4
+	ldr	r2, [r4, #0]
+	ldrh	r1, [r5, #0]
+	bl	FtlVendorPartRead
+	ldr	r3, [r4, #0]
+	ldr	r2, [r3, #0]
+	ldr	r3, .L1527+8
+	cmp	r2, r3
+	beq	.L1526
+	ldr	r1, .L1527+12
+	ldr	r0, .L1527+16
+	bl	printf
+	ldrh	r2, [r5, #0]
+	ldr	r0, [r4, #0]
+	movs	r1, #0
+	lsls	r2, r2, #9
+	bl	memset
+.L1526:
+	movs	r0, #0
+	pop	{r3, r4, r5, pc}
+.L1528:
+	.align	2
+.L1527:
+	.word	.LANCHOR187
+	.word	.LANCHOR186
+	.word	1112818501
+	.word	.LC36
+	.word	.LC10
+	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
+	.section	.text.FtlVendorPartWrite,"ax",%progbits
+	.align	1
+	.global	FtlVendorPartWrite
+	.thumb
+	.thumb_func
+	.type	FtlVendorPartWrite, %function
+FtlVendorPartWrite:
+	@ args = 0, pretend = 0, frame = 56
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1539
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	sub	sp, sp, #56
+	ldrh	sl, [r3, #0]
+	mov	r6, r0
+	ldr	r3, .L1539+4
+	mov	r4, r1
+	str	r2, [sp, #8]
+	adds	r2, r1, r0
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	bhi	.L1537
+	lsr	sl, r0, sl
+	mov	fp, #0
+	ldr	r7, .L1539+8
+	lsl	r3, sl, #2
+	str	r3, [sp, #4]
+	b	.L1531
+.L1536:
+	ldr	r2, .L1539+12
+	mov	r0, r6
+	ldr	r3, [r2, #0]
+	ldr	r2, [sp, #4]
+	ldr	r3, [r3, r2]
+	ldr	r2, .L1539+16
 	ldrh	r8, [r2, #0]
 	str	r3, [sp, #0]
 	mov	r1, r8
@@ -13594,9 +13809,9 @@ FtlVendorPartWrite:
 	cmp	r5, r4
 	it	hi
 	uxthhi	r5, r4
-	cbz	r3, .L1521
+	cbz	r3, .L1533
 	cmp	r5, r8
-	beq	.L1521
+	beq	.L1533
 	str	r3, [sp, #24]
 	movs	r1, #1
 	ldr	r3, [r7, #0]
@@ -13606,14 +13821,14 @@ FtlVendorPartWrite:
 	movs	r3, #0
 	str	r3, [sp, #32]
 	bl	FlashReadPages
-	b	.L1522
-.L1521:
-	ldr	r3, .L1527+20
+	b	.L1534
+.L1533:
+	ldr	r3, .L1539+20
 	movs	r1, #0
 	ldr	r0, [r7, #0]
 	ldrh	r2, [r3, #0]
 	bl	memset
-.L1522:
+.L1534:
 	ldr	r3, [sp, #12]
 	lsl	r8, r5, #9
 	ldr	r0, [r7, #0]
@@ -13624,7 +13839,7 @@ FtlVendorPartWrite:
 	adds	r6, r6, r5
 	bl	memcpy
 	mov	r1, sl
-	ldr	r0, .L1527+24
+	ldr	r0, .L1539+24
 	add	sl, sl, #1
 	ldr	r2, [r7, #0]
 	bl	FtlMapWritePage
@@ -13637,26 +13852,26 @@ FtlVendorPartWrite:
 	cmp	r0, #-1
 	it	eq
 	moveq	fp, #-1
-.L1519:
+.L1531:
 	cmp	r4, #0
-	bne	.L1524
-	b	.L1518
-.L1525:
+	bne	.L1536
+	b	.L1530
+.L1537:
 	mov	fp, #-1
-.L1518:
+.L1530:
 	mov	r0, fp
 	add	sp, sp, #56
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1528:
+.L1540:
 	.align	2
-.L1527:
+.L1539:
 	.word	.LANCHOR72
 	.word	.LANCHOR65
-	.word	.LANCHOR177
-	.word	.LANCHOR186
+	.word	.LANCHOR181
+	.word	.LANCHOR190
 	.word	.LANCHOR71
 	.word	.LANCHOR73
-	.word	.LANCHOR213
+	.word	.LANCHOR215
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.section	.text.Ftl_save_ext_data,"ax",%progbits
 	.align	1
@@ -13668,80 +13883,80 @@ Ftl_save_ext_data:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L1531
-	ldr	r3, .L1531+4
+	ldr	r2, .L1543
+	ldr	r3, .L1543+4
 	ldr	r1, [r2, #0]
 	cmp	r1, r3
-	bne	.L1529
-	ldr	r3, .L1531+8
+	bne	.L1541
+	ldr	r3, .L1543+8
 	movs	r0, #0
 	movs	r1, #1
 	str	r3, [r2, #4]
-	ldr	r3, .L1531+12
+	ldr	r3, .L1543+12
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #88]
-	ldr	r3, .L1531+16
+	ldr	r3, .L1543+16
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #92]
-	ldr	r3, .L1531+20
+	ldr	r3, .L1543+20
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #8]
-	ldr	r3, .L1531+24
+	ldr	r3, .L1543+24
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #12]
-	ldr	r3, .L1531+28
+	ldr	r3, .L1543+28
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #16]
-	ldr	r3, .L1531+32
+	ldr	r3, .L1543+32
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #20]
-	ldr	r3, .L1531+36
+	ldr	r3, .L1543+36
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #28]
-	ldr	r3, .L1531+40
+	ldr	r3, .L1543+40
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #32]
-	ldr	r3, .L1531+44
+	ldr	r3, .L1543+44
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #36]
-	ldr	r3, .L1531+48
+	ldr	r3, .L1543+48
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #40]
-	ldr	r3, .L1531+52
+	ldr	r3, .L1543+52
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #44]
-	ldr	r3, .L1531+56
+	ldr	r3, .L1543+56
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #48]
-	ldr	r3, .L1531+60
+	ldr	r3, .L1543+60
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #60]
-	ldr	r3, .L1531+64
+	ldr	r3, .L1543+64
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #64]
 	b	FtlVendorPartWrite
-.L1529:
+.L1541:
 	bx	lr
-.L1532:
+.L1544:
 	.align	2
-.L1531:
-	.word	.LANCHOR141
+.L1543:
+	.word	.LANCHOR144
 	.word	1179929683
-	.word	1342177344
-	.word	.LANCHOR193
-	.word	.LANCHOR194
-	.word	.LANCHOR155
-	.word	.LANCHOR156
-	.word	.LANCHOR160
+	.word	1342177351
+	.word	.LANCHOR216
+	.word	.LANCHOR217
+	.word	.LANCHOR158
 	.word	.LANCHOR159
+	.word	.LANCHOR163
 	.word	.LANCHOR162
-	.word	.LANCHOR95
-	.word	.LANCHOR157
-	.word	.LANCHOR158
-	.word	.LANCHOR163
-	.word	.LANCHOR164
-	.word	.LANCHOR152
-	.word	.LANCHOR151
+	.word	.LANCHOR165
+	.word	.LANCHOR97
+	.word	.LANCHOR160
+	.word	.LANCHOR161
+	.word	.LANCHOR166
+	.word	.LANCHOR167
+	.word	.LANCHOR155
+	.word	.LANCHOR154
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
 	.section	.text.FtlEctTblFlush,"ax",%progbits
 	.align	1
@@ -13753,43 +13968,43 @@ FtlEctTblFlush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L1540
+	ldr	r3, .L1552
 	ldr	r3, [r3, #0]
-	cbz	r3, .L1538
-	ldr	r3, .L1540+4
+	cbz	r3, .L1550
+	ldr	r3, .L1552+4
 	ldr	r3, [r3, #0]
 	cmp	r3, #29
 	ite	ls
 	movls	r3, #4
 	movhi	r3, #32
-	b	.L1534
-.L1538:
+	b	.L1546
+.L1550:
 	movs	r3, #32
-.L1534:
-	ldr	r2, .L1540+8
+.L1546:
+	ldr	r2, .L1552+8
 	ldrh	r1, [r2, #0]
 	cmp	r1, #31
-	bhi	.L1535
+	bhi	.L1547
 	movs	r3, #1
 	adds	r1, r1, #1
 	strh	r1, [r2, #0]	@ movhi
-.L1535:
-	ldr	r2, .L1540+12
-	cbnz	r0, .L1536
+.L1547:
+	ldr	r2, .L1552+12
+	cbnz	r0, .L1548
 	ldr	r1, [r2, #0]
 	ldr	r0, [r1, #20]
 	ldr	r1, [r1, #16]
 	adds	r3, r3, r0
 	cmp	r1, r3
-	bcc	.L1537
-.L1536:
+	bcc	.L1549
+.L1548:
 	ldr	r2, [r2, #0]
 	movs	r0, #64
 	ldr	r3, [r2, #16]
 	str	r3, [r2, #20]
-	ldr	r3, .L1540+16
+	ldr	r3, .L1552+16
 	str	r3, [r2, #0]
-	ldr	r3, .L1540+20
+	ldr	r3, .L1552+20
 	ldrh	r1, [r3, #0]
 	lsls	r3, r1, #9
 	str	r3, [r2, #12]
@@ -13800,18 +14015,18 @@ FtlEctTblFlush:
 	str	r3, [r2, #4]
 	bl	FtlVendorPartWrite
 	bl	Ftl_save_ext_data
-.L1537:
+.L1549:
 	movs	r0, #0
 	pop	{r3, pc}
-.L1541:
+.L1553:
 	.align	2
-.L1540:
-	.word	.LANCHOR126
-	.word	.LANCHOR164
-	.word	.LANCHOR214
-	.word	.LANCHOR183
+.L1552:
+	.word	.LANCHOR128
+	.word	.LANCHOR167
+	.word	.LANCHOR218
+	.word	.LANCHOR187
 	.word	1112818501
-	.word	.LANCHOR182
+	.word	.LANCHOR186
 	.size	FtlEctTblFlush, .-FtlEctTblFlush
 	.section	.text.flush_l2p_region,"ax",%progbits
 	.align	1
@@ -13825,8 +14040,8 @@ flush_l2p_region:
 	push	{r3, r4, r5, lr}
 	movs	r4, #12
 	muls	r4, r0, r4
-	ldr	r5, .L1543
-	ldr	r0, .L1543+4
+	ldr	r5, .L1555
+	ldr	r0, .L1555+4
 	ldr	r2, [r5, #0]
 	adds	r3, r2, r4
 	ldrh	r1, [r2, r4]
@@ -13839,225 +14054,12 @@ flush_l2p_region:
 	bic	r3, r3, #-2147483648
 	str	r3, [r4, #4]
 	pop	{r3, r4, r5, pc}
-.L1544:
-	.align	2
-.L1543:
-	.word	.LANCHOR112
-	.word	.LANCHOR120
-	.size	flush_l2p_region, .-flush_l2p_region
-	.section	.text.log2phys,"ax",%progbits
-	.align	1
-	.global	log2phys
-	.thumb
-	.thumb_func
-	.type	log2phys, %function
-log2phys:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1555
-	push	{r4, r5, r6, r7, r8, lr}
-	movs	r5, #1
-	ldrh	r3, [r3, #0]
-	mov	r6, r1
-	mov	r7, r2
-	adds	r3, r3, #7
-	lsr	r4, r0, r3
-	lsl	r5, r5, r3
-	ldr	r3, .L1555+4
-	subs	r5, r5, #1
-	ands	r5, r5, r0
-	uxth	r4, r4
-	ldr	r3, [r3, #0]
-	uxth	r5, r5
-	cmp	r0, r3
-	bcc	.L1546
-	ldr	r1, .L1555+8
-	movw	r2, #781
-	ldr	r0, .L1555+12
-	bl	printf
-	ldr	r0, .L1555+16
-	ldr	r1, .L1555+20
-	bl	printf
-.L1546:
-	ldr	r3, .L1555+24
-	ldrh	r1, [r3, #0]
-	ldr	r3, .L1555+28
-	ldr	r2, [r3, #0]
-	movs	r3, #0
-	mov	r8, r3
-	b	.L1547
-.L1553:
-	adds	r3, r3, #12
-	adds	r0, r2, r3
-	ldrh	r0, [r0, #-12]
-	cmp	r0, r4
-	bne	.L1548
-.L1549:
-	ldr	r2, .L1555+28
-	movs	r3, #12
-	ldr	r2, [r2, #0]
-	mla	r3, r3, r8, r2
-	cbnz	r7, .L1550
-	ldr	r3, [r3, #8]
-	ldr	r3, [r3, r5, lsl #2]
-	str	r3, [r6, #0]
-	b	.L1551
-.L1550:
-	ldr	r1, [r6, #0]
-	ldr	r2, [r3, #8]
-	str	r1, [r2, r5, lsl #2]
-	ldr	r2, [r3, #4]
-	orr	r2, r2, #-2147483648
-	str	r2, [r3, #4]
-	ldr	r3, .L1555+32
-	strh	r4, [r3, #0]	@ movhi
-.L1551:
-	ldr	r3, .L1555+28
-	movs	r2, #12
-	ldr	r3, [r3, #0]
-	mla	r3, r2, r8, r3
-	ldr	r2, [r3, #4]
-	adds	r1, r2, #1
-	beq	.L1552
-	adds	r2, r2, #1
-	str	r2, [r3, #4]
-.L1552:
-	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, pc}
-.L1548:
-	add	r8, r8, #1
-	uxth	r8, r8
-.L1547:
-	cmp	r8, r1
-	bne	.L1553
-	bl	select_l2p_ram_region
-	movs	r3, #12
-	ldr	r2, .L1555+28
-	ldr	r2, [r2, #0]
-	mul	r3, r3, r0
-	mov	r8, r0
-	adds	r1, r2, r3
-	ldrh	r2, [r2, r3]
-	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L1554
-	ldr	r3, [r1, #4]
-	cmp	r3, #0
-	bge	.L1554
-	bl	flush_l2p_region
-.L1554:
-	mov	r0, r4
-	mov	r1, r8
-	bl	load_l2p_region
-	b	.L1549
 .L1556:
 	.align	2
 .L1555:
-	.word	.LANCHOR72
-	.word	.LANCHOR87
-	.word	.LANCHOR215
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.word	.LANCHOR83
-	.word	.LANCHOR112
-	.word	.LANCHOR113
-	.size	log2phys, .-log2phys
-	.section	.text.FtlReUsePrevPpa,"ax",%progbits
-	.align	1
-	.global	FtlReUsePrevPpa
-	.thumb
-	.thumb_func
-	.type	FtlReUsePrevPpa, %function
-FtlReUsePrevPpa:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r4, r5, r6, r7, lr}
-	mov	r6, r0
-	ubfx	r0, r1, #10, #16
-	str	r1, [sp, #4]
-	bl	P2V_block_in_plane
-	ldr	r3, .L1564
-	ldr	r3, [r3, #0]
-	ldrh	r2, [r3, r0, lsl #1]
-	mov	r4, r0
-	cmp	r2, #0
-	bne	.L1558
-	ldr	r3, .L1564+4
-	ldr	r3, [r3, #0]
-	cmp	r3, #0
-	beq	.L1559
-	ldr	r1, .L1564+8
-	movs	r5, #6
-	ldr	r0, .L1564+12
-	ldrh	r7, [r1, #0]
-	ldr	r1, .L1564+16
-	ldr	r1, [r1, #0]
-	subs	r3, r3, r1
-	asrs	r3, r3, #1
-	muls	r3, r0, r3
-	movw	r0, #65535
-	uxth	r3, r3
-	b	.L1560
-.L1563:
-	cmp	r3, r4
-	bne	.L1561
-	ldr	r5, .L1564+8
-	mov	r1, r4
-	ldr	r0, .L1564+4
-	bl	List_remove_node
-	ldrh	r3, [r5, #0]
-	cbnz	r3, .L1562
-	ldr	r1, .L1564+20
-	movw	r2, #1677
-	ldr	r0, .L1564+24
-	bl	printf
-	ldr	r0, .L1564+28
-	ldr	r1, .L1564+32
-	bl	printf
-.L1562:
-	ldrh	r3, [r5, #0]
-	mov	r0, r4
-	subs	r3, r3, #1
-	strh	r3, [r5, #0]	@ movhi
-	bl	INSERT_DATA_LIST
-	ldr	r3, .L1564
-	ldr	r3, [r3, #0]
-	ldrh	r2, [r3, r4, lsl #1]
-	b	.L1558
-.L1561:
-	muls	r3, r5, r3
-	ldrh	r3, [r1, r3]
-	cmp	r3, r0
-	beq	.L1559
-	adds	r2, r2, #1
-	uxth	r2, r2
-.L1560:
-	cmp	r2, r7
-	bne	.L1563
-	b	.L1559
-.L1558:
-	adds	r2, r2, #1
-	strh	r2, [r3, r4, lsl #1]	@ movhi
-.L1559:
-	mov	r0, r6
-	add	r1, sp, #4
-	movs	r2, #1
-	bl	log2phys
-	pop	{r1, r2, r3, r4, r5, r6, r7, pc}
-.L1565:
-	.align	2
-.L1564:
-	.word	.LANCHOR99
-	.word	.LANCHOR103
-	.word	.LANCHOR104
-	.word	-1431655765
-	.word	.LANCHOR97
-	.word	.LANCHOR216
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
+	.word	.LANCHOR114
+	.word	.LANCHOR122
+	.size	flush_l2p_region, .-flush_l2p_region
 	.section	.text.l2p_flush,"ax",%progbits
 	.align	1
 	.global	l2p_flush
@@ -14069,32 +14071,32 @@ l2p_flush:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r4, #0
-	ldr	r7, .L1570
+	ldr	r7, .L1561
 	movs	r5, #12
-	ldr	r6, .L1570+4
-	b	.L1567
-.L1569:
+	ldr	r6, .L1561+4
+	b	.L1558
+.L1560:
 	ldr	r3, [r6, #0]
 	mla	r3, r5, r4, r3
 	ldr	r3, [r3, #4]
 	cmp	r3, #0
-	bge	.L1568
+	bge	.L1559
 	mov	r0, r4
 	bl	flush_l2p_region
-.L1568:
+.L1559:
 	adds	r4, r4, #1
 	uxth	r4, r4
-.L1567:
+.L1558:
 	ldrh	r3, [r7, #0]
 	cmp	r3, r4
-	bhi	.L1569
+	bhi	.L1560
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1571:
+.L1562:
 	.align	2
-.L1570:
+.L1561:
 	.word	.LANCHOR83
-	.word	.LANCHOR112
+	.word	.LANCHOR114
 	.size	l2p_flush, .-l2p_flush
 	.section	.text.allocate_new_data_superblock,"ax",%progbits
 	.align	1
@@ -14105,1120 +14107,1606 @@ l2p_flush:
 allocate_new_data_superblock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1584
+	ldr	r3, .L1576
 	push	{r4, r5, r6, lr}
 	mov	r4, r0
 	ldrh	r5, [r0, #0]
 	ldrh	r3, [r3, #0]
 	cmp	r3, r5
-	bhi	.L1573
-	ldr	r1, .L1584+4
-	movw	r2, #2707
-	ldr	r0, .L1584+8
+	bcs	.L1564
+	ldr	r1, .L1576+4
+	movw	r2, #2936
+	ldr	r0, .L1576+8
 	bl	printf
-	ldr	r0, .L1584+12
-	ldr	r1, .L1584+16
+	ldr	r0, .L1576+12
+	ldr	r1, .L1576+16
 	bl	printf
-.L1573:
+.L1564:
+	ldr	r3, .L1576+20
+	ldr	r3, [r3, #0]
+	cmp	r3, #0
+	bne	.L1565
 	movw	r3, #65535
 	cmp	r5, r3
-	beq	.L1574
-	ldr	r3, .L1584+20
+	beq	.L1566
+	ldr	r3, .L1576+24
 	mov	r0, r5
 	ldr	r3, [r3, #0]
 	ldrh	r3, [r3, r5, lsl #1]
-	cbz	r3, .L1575
+	cbz	r3, .L1567
 	bl	INSERT_DATA_LIST
-	b	.L1574
-.L1575:
+	b	.L1566
+.L1567:
 	bl	INSERT_FREE_LIST
-.L1574:
+.L1566:
 	movs	r3, #0
 	strb	r3, [r4, #8]
-	ldr	r3, .L1584+24
+	ldr	r3, .L1576+28
 	cmp	r4, r3
-	beq	.L1576
-	ldr	r3, .L1584+28
+	beq	.L1568
+	ldr	r3, .L1576+32
 	ldrh	r3, [r3, #0]
 	cmp	r3, #1
-	beq	.L1576
-	ldr	r2, .L1584+32
+	beq	.L1568
+	ldr	r2, .L1576+36
 	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	cbz	r2, .L1577
-.L1576:
+	cbz	r2, .L1569
+.L1568:
 	movs	r3, #1
 	strb	r3, [r4, #8]
-	b	.L1578
-.L1577:
-	ldr	r2, .L1584+36
+	b	.L1570
+.L1569:
+	ldr	r2, .L1576+40
 	cmp	r4, r2
-	bne	.L1578
+	bne	.L1570
 	cmp	r3, #3
-	beq	.L1579
-	ldr	r3, .L1584+40
+	beq	.L1571
+	ldr	r3, .L1576+44
 	ldr	r3, [r3, #0]
 	cmp	r3, #1
-	bne	.L1580
-.L1579:
+	bne	.L1572
+.L1571:
 	movs	r3, #1
 	strb	r3, [r2, #8]
-.L1580:
-	ldr	r3, .L1584+44
+.L1572:
+	ldr	r3, .L1576+48
 	ldr	r3, [r3, #0]
-	cbz	r3, .L1578
-	ldr	r3, .L1584+48
+	cbz	r3, .L1570
+	ldr	r3, .L1576+52
 	ldr	r3, [r3, #0]
 	cmp	r3, #29
-	bhi	.L1578
-	ldr	r3, .L1584+36
+	bhi	.L1570
+	ldr	r3, .L1576+40
 	movs	r2, #1
 	strb	r2, [r3, #8]
-.L1578:
-	ldr	r6, .L1584+52
+.L1570:
+	ldr	r6, .L1576+56
 	movw	r3, #65535
 	ldrh	r0, [r6, #0]
 	cmp	r0, r3
-	beq	.L1581
+	beq	.L1573
 	cmp	r5, r0
-	bne	.L1582
-	ldr	r3, .L1584+20
+	bne	.L1574
+	ldr	r3, .L1576+24
 	ldr	r3, [r3, #0]
 	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L1583
-.L1582:
+	cbz	r3, .L1575
+.L1574:
 	bl	update_vpc_list
-.L1583:
+.L1575:
 	movw	r3, #65535
 	strh	r3, [r6, #0]	@ movhi
-.L1581:
+.L1573:
 	mov	r0, r4
 	bl	allocate_data_superblock
 	bl	l2p_flush
 	movs	r0, #0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
+.L1565:
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L1585:
+.L1577:
 	.align	2
-.L1584:
+.L1576:
 	.word	.LANCHOR55
-	.word	.LANCHOR217
+	.word	.LANCHOR219
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
-	.word	.LANCHOR99
-	.word	.LANCHOR108
-	.word	.LANCHOR59
+	.word	.LANCHOR94
+	.word	.LANCHOR101
+	.word	.LANCHOR110
+	.word	.LANCHOR59
 	.word	.LANCHOR7
-	.word	.LANCHOR107
-	.word	.LANCHOR152
-	.word	.LANCHOR126
-	.word	.LANCHOR164
-	.word	.LANCHOR135
+	.word	.LANCHOR109
+	.word	.LANCHOR155
+	.word	.LANCHOR128
+	.word	.LANCHOR167
+	.word	.LANCHOR138
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
-	.section	.text.FtlProgPages,"ax",%progbits
+	.section	.text.FtlMapTblRecovery,"ax",%progbits
 	.align	1
-	.global	FtlProgPages
+	.global	FtlMapTblRecovery
 	.thumb
 	.thumb_func
-	.type	FtlProgPages, %function
-FtlProgPages:
+	.type	FtlMapTblRecovery, %function
+FtlMapTblRecovery:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r4, r3
-	ldr	r3, .L1602
-	mov	r5, r0
-	str	r1, [sp, #4]
-	ldrb	r7, [r3, #0]	@ zero_extendqisi2
-	cbz	r7, .L1587
-	ldrb	r7, [r4, #8]	@ zero_extendqisi2
-	sub	r2, r7, #1
-	rsbs	r7, r2, #0
-	adc	r7, r7, r2
-.L1587:
-	mov	r0, r5
-	ldr	r1, [sp, #4]
-	mov	r2, r7
-	ldrb	r3, [r4, #9]	@ zero_extendqisi2
-	bl	FlashProgPages
-	mov	sl, #0
-	ldr	r6, .L1602+4
-	ldr	fp, .L1602+36
-	b	.L1588
-.L1591:
-	ldr	r0, [r5, #4]
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-	ldrh	r3, [r4, #0]
-	cmp	r3, r0
-	bne	.L1589
-	ldr	r2, [r6, #0]
-	ldrh	r1, [r4, #4]
-	ldrh	r0, [r2, r3, lsl #1]
-	subs	r1, r0, r1
-	strh	r1, [r2, r3, lsl #1]	@ movhi
-	ldr	r2, .L1602+8
-	strb	r8, [r4, #6]
-	strh	r8, [r4, #4]	@ movhi
-	ldrh	r3, [r2, #0]
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r4, r0
+	sub	sp, sp, #24
+	ldr	fp, [r0, #24]
+	ldr	r3, [r4, #16]
+	movs	r1, #0
+	ldrh	sl, [r4, #6]
+	ldr	r0, [r0, #12]
+	str	r3, [sp, #20]
+	ldrh	r3, [r4, #8]
+	lsl	r2, sl, #2
+	str	r0, [sp, #12]
+	mov	r0, fp
+	ldr	r6, .L1615
+	str	r3, [sp, #16]
+	bl	memset
+	ldr	r1, .L1615+4
+	movs	r2, #0
+	mov	r8, r2
+	str	r2, [r4, #32]
+	str	r2, [r4, #28]
+	ldr	r3, [r1, #0]
+	str	r3, [r6, #8]
+	ldr	r3, .L1615+8
+	ldr	r5, [r3, #0]
+	movw	r3, #65535
+	str	r5, [r6, #12]
+	strh	r3, [r4, #0]	@ movhi
 	strh	r3, [r4, #2]	@ movhi
+	movs	r3, #1
+	str	r3, [r4, #36]
+	ldr	r3, [sp, #12]
+	mov	r7, r3
+	mov	r3, fp
+	mov	fp, sl
+	mov	sl, r4
+	b	.L1579
+.L1593:
+	ldr	r0, [sp, #16]
+	subs	r2, r0, #1
+	cmp	r8, r2
+	bne	.L1580
+	sxth	r6, r1
+	mov	r7, r1
+	ldr	r1, [sp, #12]
+	mov	r4, sl
+	mov	sl, fp
+	mov	fp, r3
+	add	r8, r1, r6, lsl #1
+	ldrh	r0, [r1, r6, lsl #1]
+	movs	r1, #1
+	bl	FtlGetLastWrittenPage
+	strh	r7, [r4, #0]	@ movhi
+	ldr	r7, .L1615
+	uxth	r3, r0
+	ldr	r0, [sp, #20]
+	adds	r2, r3, #1
+	strh	r2, [r4, #2]	@ movhi
+	sxth	r3, r3
+	ldr	r2, [r0, r6, lsl #2]
+	movs	r6, #0
+	str	r2, [r4, #28]
+	b	.L1581
+.L1584:
+	ldrh	r2, [r8, #0]
+	movs	r1, #1
+	ldr	r0, .L1615
+	orr	r2, r6, r2, lsl #10
+	str	r2, [r7, #4]
+	mov	r2, r1
+	str	r3, [sp, #8]
+	bl	FlashReadPages
+	ldr	r2, [r7, #0]
+	ldr	r3, [sp, #8]
+	adds	r2, r2, #1
+	beq	.L1582
+	ldrh	r2, [r5, #8]
+	cmp	r2, sl
+	bcs	.L1583
+	ldrh	r0, [r5, #0]
+	ldrh	r1, [r4, #4]
+	cmp	r0, r1
+	bne	.L1583
+	ldr	r1, [r7, #4]
+	str	r1, [fp, r2, lsl #2]
+	b	.L1583
+.L1582:
+	ldrh	r2, [r8, #0]
+	strh	r2, [r4, #40]	@ movhi
+.L1583:
+	adds	r6, r6, #1
+.L1581:
+	sxth	r2, r6
+	cmp	r3, r2
+	bge	.L1584
+	b	.L1585
+.L1580:
+	ldr	r1, .L1615+4
+	ldr	r0, .L1615+12
+	ldr	r2, [r1, #0]
+	ldrh	r1, [r7], #2
+	str	r2, [r6, #8]
+	ldrh	r2, [r0, #0]
+	ldr	r0, .L1615
+	subs	r2, r2, #1
+	orr	r2, r2, r1, lsl #10
+	movs	r1, #1
+	str	r2, [r6, #4]
+	mov	r2, r1
+	str	r3, [sp, #8]
+	bl	FlashReadPages
+	ldr	r2, [r6, #0]
+	ldr	r3, [sp, #8]
+	adds	r2, r2, #1
+	beq	.L1606
+	ldrh	r1, [r5, #0]
+	ldrh	r2, [sl, #4]
+	cmp	r1, r2
+	bne	.L1606
+	ldrh	r2, [r5, #8]
+	movw	r1, #64245
+	cmp	r2, r1
+	bne	.L1606
+	ldr	r2, .L1615+12
+	movs	r1, #0
+	ldr	r0, .L1615+4
+	mov	lr, r3
+	ldrh	r4, [r2, #0]
+	ldr	r2, [r0, #0]
+	subs	r4, r4, #1
+	b	.L1587
 .L1589:
-	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1590
-	mov	r0, r4
-	bl	allocate_new_data_superblock
-.L1590:
-	ldr	r0, [r5, #4]
-	ldr	r3, [fp, #96]
-	ubfx	r0, r0, #10, #16
-	adds	r3, r3, #1
-	str	r3, [fp, #96]
-	bl	FtlGcMarkBadPhyBlk
-	mov	r0, r4
-	bl	get_new_active_ppa
+	ldrh	r0, [r2, #0]
+	cmp	r0, fp
+	itt	cc
+	ldrcc	r3, [r2, #4]
+	strcc	r3, [lr, r0, lsl #2]
+	adds	r1, r1, #1
+	adds	r2, r2, #8
+.L1587:
+	cmp	r1, r4
+	blt	.L1589
+	mov	r3, lr
+	b	.L1590
+.L1592:
+	ldrh	r2, [r7, #-2]
 	movs	r1, #1
-	mov	r2, r7
-	str	r0, [r5, #4]
-	str	r0, [sp, #12]
-	mov	r0, r5
-	ldrb	r3, [r4, #9]	@ zero_extendqisi2
-	bl	FlashProgPages
-	b	.L1600
-.L1601:
-	mov	r8, #0
-.L1600:
-	ldr	r3, [r5, #0]
-	adds	r3, r3, #1
+	ldr	r0, .L1615
+	orr	r2, r4, r2, lsl #10
+	str	r2, [r6, #4]
+	mov	r2, r1
+	str	ip, [sp, #8]
+	bl	FlashReadPages
+	ldr	r2, [r6, #0]
+	ldr	ip, [sp, #8]
+	adds	r2, r2, #1
 	beq	.L1591
-	ldr	r3, .L1602+12
-	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+	ldrh	r2, [r5, #8]
+	cmp	r2, fp
+	bcs	.L1591
+	ldrh	r1, [sl, #4]
+	ldrh	r0, [r5, #0]
+	cmp	r0, r1
+	itt	eq
+	ldreq	r1, [r6, #4]
+	streq	r1, [r8, r2, lsl #2]
+.L1591:
+	adds	r4, r4, #1
+	b	.L1610
+.L1606:
+	mov	ip, r8
+	movs	r4, #0
+	mov	r8, r3
+.L1610:
+	ldr	r1, .L1615+12
+	ldrh	r2, [r1, #0]
+	cmp	r4, r2
+	blt	.L1592
+	mov	r3, r8
+	mov	r8, ip
+.L1590:
+	add	r8, r8, #1
+.L1579:
+	ldr	r2, [sp, #16]
+	uxth	r1, r8
+	cmp	r8, r2
+	blt	.L1593
+	mov	r4, sl
+.L1585:
+	ldr	r3, .L1615+16
+	cmp	r4, r3
+	bne	.L1594
+	ldr	r3, .L1615+20
 	ldrh	r3, [r3, #0]
+	cmp	r3, #0
+	bne	.L1607
+	b	.L1594
+.L1601:
+	ldr	r3, [r8, #0]
+	lsls	r4, r7, #2
+	ldr	r3, [r3, r7, lsl #2]
+	subs	r2, r3, #1
+	adds	r2, r2, #3
+	bhi	.L1596
+	ldr	r2, [r6, #0]
+	ldr	r2, [r2, r7, lsl #2]
+	cmp	r3, r2
+	beq	.L1596
+	ldr	r0, .L1615+4
+	movs	r1, #1
+	str	r3, [sl, #4]
+	ldr	r2, [r0, #0]
+	ldr	r0, .L1615
+	str	r2, [sl, #8]
+	ldr	r2, .L1615+8
+	ldr	r5, [r2, #0]
+	mov	r2, r1
+	str	r5, [sl, #12]
+	bl	FlashReadPages
+	ldr	r3, [sl, #0]
+	adds	r3, r3, #1
+	beq	.L1609
+	ldr	r3, .L1615+16
+	ldrh	r2, [r5, #0]
+	ldrh	r3, [r3, #4]
 	cmp	r2, r3
-	bcc	.L1592
-	ldr	r1, .L1602+16
-	mov	r2, #1464
-	ldr	r0, .L1602+20
-	bl	printf
-	ldr	r0, .L1602+24
-	ldr	r1, .L1602+28
-	bl	printf
-.L1592:
-	ldr	r3, [r5, #4]
-	str	r3, [sp, #12]
-	cbz	r7, .L1593
-	orr	r3, r3, #-2147483648
-	str	r3, [sp, #12]
-.L1593:
-	movs	r2, #1
-	ldr	r0, [r5, #16]
-	add	r1, sp, #12
-	bl	log2phys
-	ldr	r3, [r5, #12]
-	ldr	r0, [r3, #12]
-	adds	r3, r0, #1
-	beq	.L1594
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
+	bne	.L1609
+	ldr	fp, [r5, #4]
+	b	.L1597
+.L1609:
+	mov	fp, #0
+.L1597:
 	ldr	r3, [r6, #0]
-	ldrh	r2, [r3, r0, lsl #1]
-	mov	r8, r0
-	cbnz	r2, .L1595
-	ldr	r0, .L1602+32
-	mov	r1, r8
+	movs	r1, #1
+	mov	r2, r1
+	ldr	r0, .L1615
+	ldr	r3, [r3, r4]
+	str	r3, [sl, #4]
+	bl	FlashReadPages
+	ldr	r1, [r5, #4]
+	cmp	fp, r1
+	bls	.L1596
+	ldr	r2, [r8, #0]
+	ldr	r3, [r6, #0]
+	ldr	r0, .L1615+24
+	str	r1, [sp, #0]
+	ldr	r1, [r2, r4]
+	ldr	r2, [r3, r4]
+	mov	r3, fp
 	bl	printf
+	ldr	r3, [r8, #0]
+	ldr	r2, [r6, #0]
+	ldr	r1, [r3, r4]
+	str	r1, [r2, r4]
+	movs	r2, #0
+	ldr	r0, [r3, r4]
+	ldr	r3, .L1615+28
+	ubfx	r0, r0, #10, #16
+	ldr	r1, [sp, #12]
+	ldrh	r3, [r3, #0]
+	b	.L1598
+.L1599:
+	ldrh	r4, [r1], #2
+	adds	r2, r2, #1
+	cmp	r4, r0
+	beq	.L1596
+.L1598:
+	cmp	r2, r3
+	blt	.L1599
+	b	.L1613
+.L1614:
+	ldr	r1, [sp, #12]
+	strh	r0, [r1, r3, lsl #1]	@ movhi
+	ldr	r3, .L1615+28
+	ldrh	r2, [r3, #0]
+	adds	r2, r2, #1
+	strh	r2, [r3, #0]	@ movhi
+	bl	remove_from_free_sys_Queue
+.L1596:
+	adds	r7, r7, #1
+	b	.L1595
+.L1616:
+	.align	2
+.L1615:
+	.word	.LANCHOR198
+	.word	.LANCHOR98
+	.word	.LANCHOR184
+	.word	.LANCHOR69
+	.word	.LANCHOR122
+	.word	.LANCHOR85
+	.word	.LC37
+	.word	.LANCHOR123
+.L1607:
+	ldr	r8, .L1617+16
+	movs	r7, #0
+	ldr	r6, .L1617
+	ldr	sl, .L1617+20
+	str	r4, [sp, #16]
 .L1595:
-	mov	r0, r8
-	bl	decrement_vpc_count
+	ldr	r2, .L1617+4
+	ldrh	r3, [r2, #0]
+	cmp	r7, r3
+	bcc	.L1601
+	ldr	r4, [sp, #16]
 .L1594:
-	add	sl, sl, #1
-	adds	r5, r5, #36
-.L1588:
-	ldr	r3, [sp, #4]
-	cmp	sl, r3
-	bne	.L1601
-	ldr	r3, .L1602+12
-	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+	mov	r0, r4
+	bl	ftl_free_no_use_map_blk
+	ldr	r3, .L1617+8
+	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bcc	.L1586
-	ldr	r1, .L1602+16
-	movw	r2, #1481
-	ldr	r0, .L1602+20
-	bl	printf
-	ldr	r0, .L1602+24
-	ldr	r1, .L1602+28
-	bl	printf
-.L1586:
-	pop	{r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1603:
-	.align	2
+	bne	.L1602
+	mov	r0, r4
+	bl	ftl_map_blk_alloc_new_blk
 .L1602:
-	.word	.LANCHOR7
-	.word	.LANCHOR99
-	.word	.LANCHOR68
-	.word	.LANCHOR53
-	.word	.LANCHOR218
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.word	.LC32
-	.word	.LANCHOR141
-	.size	FtlProgPages, .-FtlProgPages
-	.section	.text.FtlCacheWriteBack,"ax",%progbits
+	mov	r0, r4
+	bl	ftl_map_blk_gc
+	mov	r0, r4
+	bl	ftl_map_blk_gc
+	movs	r0, #0
+	add	sp, sp, #24
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L1613:
+	ldr	r2, .L1617+12
+	ldr	r2, [r2, #0]
+	cmp	r3, r2
+	bcs	.L1596
+	b	.L1614
+.L1618:
+	.align	2
+.L1617:
+	.word	.LANCHOR126
+	.word	.LANCHOR82
+	.word	.LANCHOR69
+	.word	.LANCHOR80
+	.word	.LANCHOR191
+	.word	.LANCHOR198
+	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
+	.section	.text.FtlLoadMapInfo,"ax",%progbits
 	.align	1
-	.global	FtlCacheWriteBack
+	.global	FtlLoadMapInfo
 	.thumb
 	.thumb_func
-	.type	FtlCacheWriteBack, %function
-FtlCacheWriteBack:
+	.type	FtlLoadMapInfo, %function
+FtlLoadMapInfo:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, lr}
-	ldr	r4, .L1606
-	ldr	r0, [r4, #0]
-	cbz	r0, .L1605
-	ldr	r3, .L1606+4
-	movs	r1, #1
-	movs	r2, #0
-	ldr	r3, [r3, #0]
-	bl	FtlProgPages
-	movs	r3, #0
-	str	r3, [r4, #0]
-.L1605:
+	push	{r3, lr}
+	bl	FtlL2PDataInit
+	ldr	r0, .L1620
+	bl	FtlMapTblRecovery
 	movs	r0, #0
-	pop	{r4, pc}
-.L1607:
+	pop	{r3, pc}
+.L1621:
 	.align	2
-.L1606:
-	.word	.LANCHOR134
-	.word	.LANCHOR219
-	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
-	.section	.text.FtlGcFreeTempBlock,"ax",%progbits
+.L1620:
+	.word	.LANCHOR122
+	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
+	.section	.text.FtlLoadVonderInfo,"ax",%progbits
 	.align	1
-	.global	FtlGcFreeTempBlock
+	.global	FtlLoadVonderInfo
 	.thumb
 	.thumb_func
-	.type	FtlGcFreeTempBlock, %function
-FtlGcFreeTempBlock:
-	@ args = 0, pretend = 0, frame = 8
+	.type	FtlLoadVonderInfo, %function
+FtlLoadVonderInfo:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	ldr	r0, .L1624
-	ldr	r3, .L1624+4
-	ldrh	r4, [r0, #0]
-	ldrh	r1, [r3, #0]
-	movw	r3, #65535
-	cmp	r4, r3
-	beq	.L1609
-	bl	FtlGcScanTempBlk
-	str	r0, [sp, #4]
-	adds	r0, r0, #1
-	beq	.L1609
-	ldr	r3, .L1624+8
+	push	{r3, lr}
+	ldr	r3, .L1623
+	ldr	r0, .L1623+4
+	ldrh	r3, [r3, #0]
+	strh	r3, [r0, #10]	@ movhi
+	movw	r3, #61574
+	strh	r3, [r0, #4]	@ movhi
+	ldr	r3, .L1623+8
+	ldrh	r3, [r3, #0]
+	strh	r3, [r0, #8]	@ movhi
+	ldr	r3, .L1623+12
+	ldrh	r3, [r3, #0]
+	strh	r3, [r0, #6]	@ movhi
+	ldr	r3, .L1623+16
 	ldr	r3, [r3, #0]
-	ldrh	r2, [r3, r4, lsl #1]
-	cmp	r2, #4
-	bls	.L1610
-	subs	r2, r2, #5
-	movs	r0, #1
-	strh	r2, [r3, r4, lsl #1]	@ movhi
-	bl	FtlEctTblFlush
-.L1610:
-	ldr	r3, .L1624+12
+	str	r3, [r0, #12]
+	ldr	r3, .L1623+20
 	ldr	r3, [r3, #0]
-	cbnz	r3, .L1611
-	ldr	r3, .L1624+16
-	ldr	r0, [sp, #4]
-	ldr	r2, [r3, #96]
-	ubfx	r0, r0, #10, #16
-	adds	r2, r2, #1
-	str	r2, [r3, #96]
-	bl	FtlBbmMapBadBlock
-	bl	FtlBbmTblFlush
-.L1611:
-	ldr	r3, .L1624+12
-	movs	r2, #0
-	movs	r4, #1
-	str	r2, [r3, #0]
-	b	.L1612
-.L1609:
-	ldr	r5, .L1624
-	movs	r4, #0
-	ldr	r3, .L1624+12
-	ldrh	r2, [r5, #0]
-	str	r4, [r3, #0]
+	str	r3, [r0, #16]
+	ldr	r3, .L1623+24
+	ldr	r3, [r3, #0]
+	str	r3, [r0, #20]
+	ldr	r3, .L1623+28
+	ldr	r3, [r3, #0]
+	str	r3, [r0, #24]
 	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L1612
-	bl	FtlCacheWriteBack
-	ldr	r3, .L1624+20
-	ldr	r1, .L1624+4
-	ldrh	r2, [r3, #0]
-	ldrh	r1, [r1, #0]
-	ldrb	r3, [r5, #7]	@ zero_extendqisi2
-	muls	r3, r1, r3
-	cmp	r2, r3
-	beq	.L1613
-	ldr	r1, .L1624+24
-	movs	r2, #161
-	ldr	r0, .L1624+28
+	strh	r3, [r0, #40]	@ movhi
+	bl	FtlMapTblRecovery
+	movs	r0, #0
+	pop	{r3, pc}
+.L1624:
+	.align	2
+.L1623:
+	.word	.LANCHOR77
+	.word	.LANCHOR215
+	.word	.LANCHOR86
+	.word	.LANCHOR78
+	.word	.LANCHOR87
+	.word	.LANCHOR189
+	.word	.LANCHOR188
+	.word	.LANCHOR190
+	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
+	.section	.text.load_l2p_region,"ax",%progbits
+	.align	1
+	.global	load_l2p_region
+	.thumb
+	.thumb_func
+	.type	load_l2p_region, %function
+load_l2p_region:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, r8, sl, lr}
+	mov	r4, r0
+	ldr	r3, .L1631
+	mov	r7, r1
+	ldrh	r3, [r3, #0]
+	cmp	r3, r0
+	bcs	.L1626
+	ldr	r1, .L1631+4
+	movw	r2, #503
+	ldr	r0, .L1631+8
 	bl	printf
-	ldr	r0, .L1624+32
-	ldr	r1, .L1624+36
+	ldr	r0, .L1631+12
+	ldr	r1, .L1631+16
 	bl	printf
-.L1613:
-	ldr	r3, .L1624
-	movs	r5, #0
-	ldr	r2, .L1624+40
-	ldr	r4, .L1624+4
-	ldrh	r1, [r3, #0]
-	ldr	r2, [r2, #0]
-	ldrh	r4, [r4, #0]
-	ldrb	r0, [r3, #7]	@ zero_extendqisi2
-	muls	r0, r4, r0
-	strh	r0, [r2, r1, lsl #1]	@ movhi
-	ldr	r1, .L1624+44
-	ldr	r2, .L1624+20
-	ldr	fp, .L1624+68
-	ldr	r0, [r1, #0]
-	mov	sl, r2
-	ldrh	r4, [r2, #0]
-	ldr	r8, .L1624+72
-	adds	r0, r4, r0
-	str	r0, [r1, #0]
-	b	.L1614
-.L1618:
-	ldr	r7, [fp, #0]
-	movs	r6, #12
-	muls	r6, r5, r6
+.L1626:
+	ldr	r3, .L1631+20
+	ldr	r8, .L1631+44
+	ldr	r3, [r3, #0]
+	ldr	r6, [r3, r4, lsl #2]
+	movs	r3, #12
+	cbnz	r6, .L1627
+	muls	r7, r3, r7
 	ldr	r3, [r8, #0]
-	adds	r4, r7, r6
-	ldr	r2, [r4, #8]
-	cmp	r2, r3
-	bcc	.L1615
-	ldr	r1, .L1624+24
-	movs	r2, #166
-	ldr	r0, .L1624+28
-	bl	printf
-	ldr	r0, .L1624+32
-	ldr	r1, .L1624+36
-	bl	printf
-.L1615:
-	movs	r2, #0
-	ldr	r0, [r4, #8]
-	add	r1, sp, #4
-	bl	log2phys
-	ldr	r0, [sp, #4]
-	ldr	r3, [r7, r6]
-	cmp	r0, r3
-	bne	.L1616
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-	adds	r1, r4, #4
-	movs	r2, #1
-	mov	r6, r0
-	ldr	r0, [r4, #8]
-	bl	log2phys
-	mov	r0, r6
-	b	.L1623
-.L1616:
-	ldr	r3, [r4, #4]
-	cmp	r0, r3
-	beq	.L1617
-	ldr	r3, .L1624
-	ldrh	r0, [r3, #0]
-.L1623:
-	bl	decrement_vpc_count
-.L1617:
-	adds	r5, r5, #1
-	uxth	r5, r5
-.L1614:
-	ldrh	r3, [sl, #0]
-	cmp	r3, r5
-	bhi	.L1618
-	movw	r0, #65535
-	ldr	r4, .L1624
-	bl	decrement_vpc_count
-	ldr	r3, .L1624+40
-	ldrh	r0, [r4, #0]
+	movs	r1, #255
+	adds	r3, r3, r7
+	ldr	r0, [r3, #8]
+	ldr	r3, .L1631+24
+	ldrh	r2, [r3, #0]
+	bl	memset
+	ldr	r3, [r8, #0]
+	adds	r2, r3, r7
+	strh	r4, [r3, r7]	@ movhi
+	str	r6, [r2, #4]
+	b	.L1628
+.L1627:
+	muls	r7, r3, r7
+	ldr	r3, [r8, #0]
+	ldr	r5, .L1631+28
+	movs	r1, #1
+	adds	r3, r3, r7
+	mov	r2, r1
+	mov	r0, r5
+	ldr	r3, [r3, #8]
+	str	r6, [r5, #4]
+	str	r3, [r5, #8]
+	ldr	r3, .L1631+32
 	ldr	r3, [r3, #0]
-	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L1619
-	bl	INSERT_DATA_LIST
-	b	.L1620
-.L1619:
-	bl	INSERT_FREE_LIST
-.L1620:
-	ldr	r3, .L1624+20
-	movw	r5, #65535
-	strh	r5, [r4, #0]	@ movhi
-	movs	r4, #0
-	strh	r4, [r3, #0]	@ movhi
-	ldr	r3, .L1624+48
-	strh	r4, [r3, #0]	@ movhi
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
-	ldr	r3, .L1624+52
-	ldr	r2, .L1624+56
-	movs	r1, #3
-	ldrh	r3, [r3, #0]
-	ldrh	r2, [r2, #0]
-	muls	r2, r1, r2
-	cmp	r3, r2, lsr #2
-	ble	.L1612
-	ldr	r3, .L1624+60
-	movs	r2, #20
-	strh	r5, [r3, #0]	@ movhi
-	ldr	r3, .L1624+64
-	strh	r2, [r3, #0]	@ movhi
-.L1612:
-	mov	r0, r4
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1625:
+	str	r3, [r5, #12]
+	bl	FlashReadPages
+	ldr	r3, [r5, #0]
+	ldr	sl, [r5, #12]
+	cmp	r3, #256
+	bne	.L1629
+	mov	r2, r6
+	mov	r1, r4
+	ldr	r0, .L1631+36
+	lsrs	r6, r6, #10
+	bl	printf
+	ldr	r3, [r8, #0]
+	ldr	r0, .L1631+40
+	mov	r1, r4
+	adds	r3, r3, r7
+	strh	r6, [r0, #40]	@ movhi
+	ldr	r2, [r3, #8]
+	bl	FtlMapWritePage
+.L1629:
+	ldrh	r3, [sl, #8]
+	cmp	r3, r4
+	beq	.L1630
+	ldr	r1, .L1631+4
+	movw	r2, #529
+	ldr	r0, .L1631+8
+	bl	printf
+	ldr	r0, .L1631+12
+	ldr	r1, .L1631+16
+	bl	printf
+.L1630:
+	ldr	r3, .L1631+44
+	movs	r1, #0
+	ldr	r3, [r3, #0]
+	adds	r2, r3, r7
+	strh	r4, [r3, r7]	@ movhi
+	str	r1, [r2, #4]
+.L1628:
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
+.L1632:
 	.align	2
-.L1624:
-	.word	.LANCHOR109
-	.word	.LANCHOR68
-	.word	.LANCHOR94
-	.word	.LANCHOR137
-	.word	.LANCHOR141
-	.word	.LANCHOR144
+.L1631:
+	.word	.LANCHOR82
 	.word	.LANCHOR220
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
-	.word	.LANCHOR99
-	.word	.LANCHOR155
-	.word	.LANCHOR142
-	.word	.LANCHOR104
-	.word	.LANCHOR200
-	.word	.LANCHOR201
-	.word	.LANCHOR170
-	.word	.LANCHOR145
-	.word	.LANCHOR87
-	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
-	.section	.text.Ftl_gc_temp_data_write_back,"ax",%progbits
+	.word	.LANCHOR126
+	.word	.LANCHOR73
+	.word	.LANCHOR198
+	.word	.LANCHOR184
+	.word	.LC38
+	.word	.LANCHOR122
+	.word	.LANCHOR114
+	.size	load_l2p_region, .-load_l2p_region
+	.section	.text.log2phys,"ax",%progbits
 	.align	1
-	.global	Ftl_gc_temp_data_write_back
+	.global	log2phys
 	.thumb
 	.thumb_func
-	.type	Ftl_gc_temp_data_write_back, %function
-Ftl_gc_temp_data_write_back:
+	.type	log2phys, %function
+log2phys:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	ldr	r3, .L1635
-	ldrb	r2, [r3, #0]	@ zero_extendqisi2
-	ldr	r3, .L1635+4
-	cbz	r2, .L1627
-	ldr	r2, [r3, #0]
-	lsls	r2, r2, #31
-	bpl	.L1627
-	ldr	r2, .L1635+8
-	ldrh	r2, [r2, #4]
-	cmp	r2, #0
-	bne	.L1632
-.L1627:
-	ldr	r4, .L1635+12
-	movs	r2, #0
-	ldr	r1, [r3, #0]
-	mov	r3, r2
-	movs	r5, #0
-	ldr	r7, .L1635+4
-	ldr	r0, [r4, #0]
-	movs	r6, #36
-	bl	FlashProgPages
-	b	.L1629
-.L1631:
-	mul	r3, r6, r5
-	ldr	r1, [r4, #0]
-	adds	r2, r1, r3
-	ldr	r1, [r1, r3]
-	adds	r0, r1, #1
-	bne	.L1630
-	ldr	r3, .L1635+8
-	movs	r5, #0
-	ldr	r0, .L1635+16
-	ldrh	r4, [r3, #0]
-	ldr	r0, [r0, #0]
-	strh	r5, [r0, r4, lsl #1]	@ movhi
-	strh	r1, [r3, #0]	@ movhi
-	ldr	r3, .L1635+20
-	ldr	r0, [r2, #4]
-	ldr	r1, [r3, #96]
-	ubfx	r0, r0, #10, #16
-	adds	r1, r1, #1
-	str	r1, [r3, #96]
-	bl	FtlBbmMapBadBlock
-	bl	FtlBbmTblFlush
-	bl	FtlGcPageVarInit
-	b	.L1634
-.L1630:
-	ldr	r3, [r2, #12]
-	adds	r5, r5, #1
-	ldr	r1, [r2, #4]
+	ldr	r3, .L1643
+	push	{r4, r5, r6, r7, r8, lr}
+	movs	r5, #1
+	ldrh	r3, [r3, #0]
+	mov	r6, r1
+	mov	r7, r2
+	adds	r3, r3, #7
+	lsr	r4, r0, r3
+	lsl	r5, r5, r3
+	ldr	r3, .L1643+4
+	subs	r5, r5, #1
+	ands	r5, r5, r0
+	uxth	r4, r4
+	ldr	r3, [r3, #0]
 	uxth	r5, r5
-	ldr	r0, [r3, #12]
-	ldr	r2, [r3, #8]
-	bl	FtlGcUpdatePage
-.L1629:
-	ldr	r1, [r7, #0]
-	cmp	r5, r1
-	bcc	.L1631
-	ldr	r3, .L1635+12
-	ldr	r0, [r3, #0]
-	bl	FtlGcBufFree
-	ldr	r3, .L1635+4
-	movs	r0, #0
-	str	r0, [r3, #0]
-	ldr	r3, .L1635+8
-	ldrh	r3, [r3, #4]
-	cbnz	r3, .L1628
-	movs	r0, #1
-	bl	FtlGcFreeTempBlock
+	cmp	r0, r3
+	bcc	.L1634
+	ldr	r1, .L1643+8
+	movw	r2, #851
+	ldr	r0, .L1643+12
+	bl	printf
+	ldr	r0, .L1643+16
+	ldr	r1, .L1643+20
+	bl	printf
 .L1634:
-	movs	r0, #1
-	pop	{r3, r4, r5, r6, r7, pc}
-.L1632:
+	ldr	r3, .L1643+24
+	ldrh	r1, [r3, #0]
+	ldr	r3, .L1643+28
+	ldr	r2, [r3, #0]
+	movs	r3, #0
+	mov	r8, r3
+	b	.L1635
+.L1641:
+	adds	r3, r3, #12
+	adds	r0, r2, r3
+	ldrh	r0, [r0, #-12]
+	cmp	r0, r4
+	bne	.L1636
+.L1637:
+	ldr	r2, .L1643+28
+	movs	r3, #12
+	ldr	r2, [r2, #0]
+	mla	r3, r3, r8, r2
+	cbnz	r7, .L1638
+	ldr	r3, [r3, #8]
+	ldr	r3, [r3, r5, lsl #2]
+	str	r3, [r6, #0]
+	b	.L1639
+.L1638:
+	ldr	r1, [r6, #0]
+	ldr	r2, [r3, #8]
+	str	r1, [r2, r5, lsl #2]
+	ldr	r2, [r3, #4]
+	orr	r2, r2, #-2147483648
+	str	r2, [r3, #4]
+	ldr	r3, .L1643+32
+	strh	r4, [r3, #0]	@ movhi
+.L1639:
+	ldr	r3, .L1643+28
+	movs	r2, #12
+	ldr	r3, [r3, #0]
+	mla	r3, r2, r8, r3
+	ldr	r2, [r3, #4]
+	adds	r0, r2, #1
+	beq	.L1640
+	adds	r2, r2, #1
+	str	r2, [r3, #4]
+.L1640:
 	movs	r0, #0
-.L1628:
-	pop	{r3, r4, r5, r6, r7, pc}
+	pop	{r4, r5, r6, r7, r8, pc}
 .L1636:
-	.align	2
+	add	r8, r8, #1
+	uxth	r8, r8
 .L1635:
-	.word	.LANCHOR7
-	.word	.LANCHOR128
-	.word	.LANCHOR109
-	.word	.LANCHOR174
-	.word	.LANCHOR99
-	.word	.LANCHOR141
-	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
-	.section	.text.FtlGcPageRecovery,"ax",%progbits
-	.align	1
-	.global	FtlGcPageRecovery
-	.thumb
-	.thumb_func
-	.type	FtlGcPageRecovery, %function
-FtlGcPageRecovery:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	ldr	r4, .L1639
-	ldr	r5, .L1639+4
-	ldrh	r1, [r4, #0]
-	mov	r0, r5
-	bl	FtlGcScanTempBlk
-	ldrh	r2, [r5, #2]
-	ldrh	r3, [r4, #0]
-	cmp	r2, r3
-	bcc	.L1637
-	ldr	r0, .L1639+8
-	bl	FtlMapBlkWriteDumpData
-	movs	r0, #0
-	bl	FtlGcFreeTempBlock
-	ldr	r3, .L1639+12
-	movs	r2, #0
-	str	r2, [r3, #0]
-.L1637:
-	pop	{r3, r4, r5, pc}
-.L1640:
-	.align	2
-.L1639:
-	.word	.LANCHOR68
-	.word	.LANCHOR109
-	.word	.LANCHOR120
-	.word	.LANCHOR137
-	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
-	.section	.text.Ftl_get_new_temp_ppa,"ax",%progbits
-	.align	1
-	.global	Ftl_get_new_temp_ppa
-	.thumb
-	.thumb_func
-	.type	Ftl_get_new_temp_ppa, %function
-Ftl_get_new_temp_ppa:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	movw	r3, #65535
-	ldr	r5, .L1644
-	ldrh	r2, [r5, #0]
+	cmp	r8, r1
+	bne	.L1641
+	bl	select_l2p_ram_region
+	movs	r3, #12
+	ldr	r2, .L1643+28
+	ldr	r2, [r2, #0]
+	mul	r3, r3, r0
+	mov	r8, r0
+	adds	r1, r2, r3
+	ldrh	r2, [r2, r3]
+	movw	r3, #65535
 	cmp	r2, r3
 	beq	.L1642
-	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1643
+	ldr	r3, [r1, #4]
+	cmp	r3, #0
+	bge	.L1642
+	bl	flush_l2p_region
 .L1642:
-	bl	FtlCacheWriteBack
-	movs	r0, #0
-	bl	FtlGcFreeTempBlock
-	ldr	r0, .L1644
-	movs	r4, #0
-	strb	r4, [r5, #8]
-	bl	allocate_data_superblock
-	ldr	r3, .L1644+4
-	strh	r4, [r3, #0]	@ movhi
-	ldr	r3, .L1644+8
-	strh	r4, [r3, #0]	@ movhi
-	bl	l2p_flush
 	mov	r0, r4
-	bl	FtlEctTblFlush
-	bl	FtlVpcTblFlush
-.L1643:
-	ldr	r0, .L1644
-	pop	{r3, r4, r5, lr}
-	b	get_new_active_ppa
-.L1645:
-	.align	2
+	mov	r1, r8
+	bl	load_l2p_region
+	b	.L1637
 .L1644:
-	.word	.LANCHOR109
-	.word	.LANCHOR142
-	.word	.LANCHOR144
-	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
-	.section	.text.ftl_discard,"ax",%progbits
+	.align	2
+.L1643:
+	.word	.LANCHOR72
+	.word	.LANCHOR88
+	.word	.LANCHOR221
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR83
+	.word	.LANCHOR114
+	.word	.LANCHOR115
+	.size	log2phys, .-log2phys
+	.section	.text.FtlReUsePrevPpa,"ax",%progbits
 	.align	1
-	.global	ftl_discard
+	.global	FtlReUsePrevPpa
 	.thumb
 	.thumb_func
-	.type	ftl_discard, %function
-ftl_discard:
+	.type	FtlReUsePrevPpa, %function
+FtlReUsePrevPpa:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1655
-	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	mov	r4, r2
+	push	{r0, r1, r2, r4, r5, r6, r7, lr}
+	mov	r6, r0
+	ubfx	r0, r1, #10, #16
+	str	r1, [sp, #4]
+	bl	P2V_block_in_plane
+	ldr	r3, .L1652
 	ldr	r3, [r3, #0]
-	adds	r2, r2, r1
-	mov	r6, r1
-	cmp	r2, r3
-	bhi	.L1652
-	cmp	r4, #31
-	bls	.L1653
-	bl	FtlCacheWriteBack
-	ldr	r3, .L1655+4
-	mov	r0, r6
-	ldrh	r7, [r3, #0]
-	mov	r1, r7
-	bl	__aeabi_uidiv
-	mls	r6, r0, r7, r6
-	mov	r5, r0
-	uxth	r6, r6
-	cbz	r6, .L1648
-	subs	r6, r7, r6
-	adds	r5, r0, #1
-	cmp	r6, r4
-	it	cs
-	movcs	r6, r4
-	uxth	r6, r6
-	subs	r4, r4, r6
-.L1648:
-	mov	r3, #-1
-	ldr	r8, .L1655+4
-	str	r3, [sp, #4]
-	ldr	r7, .L1655+8
-	ldr	r6, .L1655+12
-	b	.L1649
+	ldrh	r2, [r3, r0, lsl #1]
+	mov	r4, r0
+	cmp	r2, #0
+	bne	.L1646
+	ldr	r3, .L1652+4
+	ldr	r3, [r3, #0]
+	cmp	r3, #0
+	beq	.L1647
+	ldr	r1, .L1652+8
+	movs	r5, #6
+	ldr	r0, .L1652+12
+	ldrh	r7, [r1, #0]
+	ldr	r1, .L1652+16
+	ldr	r1, [r1, #0]
+	subs	r3, r3, r1
+	asrs	r3, r3, #1
+	muls	r3, r0, r3
+	movw	r0, #65535
+	uxth	r3, r3
+	b	.L1648
 .L1651:
-	movs	r2, #0
-	mov	r0, r5
-	mov	r1, sp
-	bl	log2phys
-	ldr	r3, [sp, #0]
-	adds	r3, r3, #1
-	beq	.L1650
-	ldr	r3, [r7, #0]
-	add	r1, sp, #4
-	movs	r2, #1
-	mov	r0, r5
-	adds	r3, r3, #1
-	str	r3, [r7, #0]
-	ldr	r3, [r6, #0]
-	adds	r3, r3, #1
-	str	r3, [r6, #0]
-	bl	log2phys
-	ldr	r0, [sp, #0]
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-	bl	decrement_vpc_count
+	cmp	r3, r4
+	bne	.L1649
+	ldr	r5, .L1652+8
+	mov	r1, r4
+	ldr	r0, .L1652+4
+	bl	List_remove_node
+	ldrh	r3, [r5, #0]
+	cbnz	r3, .L1650
+	ldr	r1, .L1652+20
+	movw	r2, #1823
+	ldr	r0, .L1652+24
+	bl	printf
+	ldr	r0, .L1652+28
+	ldr	r1, .L1652+32
+	bl	printf
 .L1650:
-	ldrh	r3, [r8, #0]
-	adds	r5, r5, #1
-	subs	r4, r4, r3
+	ldrh	r3, [r5, #0]
+	mov	r0, r4
+	subs	r3, r3, #1
+	strh	r3, [r5, #0]	@ movhi
+	bl	INSERT_DATA_LIST
+	ldr	r3, .L1652
+	ldr	r3, [r3, #0]
+	ldrh	r2, [r3, r4, lsl #1]
+	b	.L1646
 .L1649:
-	ldrh	r3, [r8, #0]
-	cmp	r4, r3
-	bcs	.L1651
-	ldr	r3, .L1655+8
-	mov	r4, #0
-	ldr	r2, [r3, #0]
-	cmp	r2, #32
-	bls	.L1654
-	str	r4, [r3, #0]
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
-	b	.L1654
-.L1652:
-	mov	r0, #-1
-	b	.L1647
-.L1653:
-	movs	r0, #0
+	muls	r3, r5, r3
+	ldrh	r3, [r1, r3]
+	cmp	r3, r0
+	beq	.L1647
+	adds	r2, r2, #1
+	uxth	r2, r2
+.L1648:
+	cmp	r2, r7
+	bne	.L1651
 	b	.L1647
-.L1654:
-	mov	r0, r4
+.L1646:
+	adds	r2, r2, #1
+	strh	r2, [r3, r4, lsl #1]	@ movhi
 .L1647:
-	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
-.L1656:
-	.align	2
-.L1655:
-	.word	.LANCHOR84
-	.word	.LANCHOR71
-	.word	.LANCHOR221
-	.word	.LANCHOR157
-	.size	ftl_discard, .-ftl_discard
-	.section	.text.FtlSysFlush,"ax",%progbits
-	.align	1
-	.global	FtlSysFlush
-	.thumb
-	.thumb_func
-	.type	FtlSysFlush, %function
-FtlSysFlush:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	bl	FtlCacheWriteBack
-	bl	l2p_flush
-	movs	r0, #1
-	bl	FtlEctTblFlush
-	bl	FtlVpcTblFlush
-	movs	r0, #0
-	pop	{r3, pc}
-	.size	FtlSysFlush, .-FtlSysFlush
-	.section	.text.FtlDeInit,"ax",%progbits
-	.align	1
-	.global	FtlDeInit
-	.thumb
-	.thumb_func
-	.type	FtlDeInit, %function
-FtlDeInit:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	ldr	r3, .L1660
-	ldr	r3, [r3, #0]
-	cmp	r3, #1
-	bne	.L1659
-	bl	FtlSysFlush
-.L1659:
-	movs	r0, #0
-	pop	{r3, pc}
-.L1661:
+	mov	r0, r6
+	add	r1, sp, #4
+	movs	r2, #1
+	bl	log2phys
+	pop	{r1, r2, r3, r4, r5, r6, r7, pc}
+.L1653:
 	.align	2
-.L1660:
+.L1652:
+	.word	.LANCHOR101
+	.word	.LANCHOR105
+	.word	.LANCHOR106
+	.word	-1431655765
+	.word	.LANCHOR99
 	.word	.LANCHOR222
-	.size	FtlDeInit, .-FtlDeInit
-	.section	.text.rk_ftl_de_init,"ax",%progbits
-	.align	1
-	.global	rk_ftl_de_init
-	.thumb
-	.thumb_func
-	.type	rk_ftl_de_init, %function
-rk_ftl_de_init:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	bl	rk_nand_de_init
-	bl	FtlDeInit
-	pop	{r3, lr}
-	b	rk_nand_de_init
-	.size	rk_ftl_de_init, .-rk_ftl_de_init
-	.section	.text.FtlMapTblRecovery,"ax",%progbits
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
+	.section	.text.FtlProgPages,"ax",%progbits
 	.align	1
-	.global	FtlMapTblRecovery
+	.global	FtlProgPages
 	.thumb
 	.thumb_func
-	.type	FtlMapTblRecovery, %function
-FtlMapTblRecovery:
+	.type	FtlProgPages, %function
+FtlProgPages:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r4, r0
-	ldr	r3, [r0, #12]
-	movs	r1, #0
-	ldrh	sl, [r0, #6]
-	ldr	fp, [r0, #24]
-	str	r3, [sp, #8]
-	ldr	r3, [r0, #16]
-	lsl	r2, sl, #2
-	ldr	r6, .L1683
-	str	r3, [sp, #12]
-	ldrh	r3, [r0, #8]
-	mov	r0, fp
-	str	r3, [sp, #4]
-	bl	memset
-	ldr	r1, .L1683+4
-	movs	r2, #0
-	mov	r8, r2
-	str	r2, [r4, #32]
-	str	r2, [r4, #28]
-	ldr	r3, [r1, #0]
-	str	r3, [r6, #8]
-	ldr	r3, .L1683+8
-	ldr	r5, [r3, #0]
-	movw	r3, #65535
-	str	r5, [r6, #12]
-	strh	r3, [r4, #0]	@ movhi
+	mov	r4, r3
+	ldr	r3, .L1670
+	mov	r5, r0
+	str	r1, [sp, #4]
+	ldrb	r7, [r3, #0]	@ zero_extendqisi2
+	cbz	r7, .L1655
+	ldrb	r7, [r4, #8]	@ zero_extendqisi2
+	sub	r2, r7, #1
+	rsbs	r7, r2, #0
+	adc	r7, r7, r2
+.L1655:
+	mov	r0, r5
+	ldr	r1, [sp, #4]
+	mov	r2, r7
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	bl	FlashProgPages
+	mov	sl, #0
+	ldr	r6, .L1670+4
+	ldr	fp, .L1670+36
+	b	.L1656
+.L1659:
+	ldr	r0, [r5, #4]
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	ldrh	r3, [r4, #0]
+	cmp	r3, r0
+	bne	.L1657
+	ldr	r2, [r6, #0]
+	ldrh	r1, [r4, #4]
+	ldrh	r0, [r2, r3, lsl #1]
+	subs	r1, r0, r1
+	strh	r1, [r2, r3, lsl #1]	@ movhi
+	ldr	r2, .L1670+8
+	strb	r8, [r4, #6]
+	strh	r8, [r4, #4]	@ movhi
+	ldrh	r3, [r2, #0]
 	strh	r3, [r4, #2]	@ movhi
-	movs	r3, #1
-	str	r3, [r4, #36]
-	ldr	r3, [sp, #8]
-	mov	r7, r3
-	mov	r3, fp
-	mov	fp, sl
-	mov	sl, r4
-	b	.L1664
-.L1677:
-	ldr	r0, [sp, #4]
-	subs	r2, r0, #1
-	cmp	r8, r2
-	bne	.L1665
-	sxth	r6, r1
-	mov	r4, sl
-	mov	sl, fp
-	mov	fp, r3
-	ldr	r3, [sp, #8]
-	mov	r7, r1
+.L1657:
+	ldrh	r3, [r4, #4]
+	cbnz	r3, .L1658
+	mov	r0, r4
+	bl	allocate_new_data_superblock
+.L1658:
+	ldr	r0, [r5, #4]
+	ldr	r3, [fp, #96]
+	ubfx	r0, r0, #10, #16
+	adds	r3, r3, #1
+	str	r3, [fp, #96]
+	bl	FtlGcMarkBadPhyBlk
+	mov	r0, r4
+	bl	get_new_active_ppa
 	movs	r1, #1
-	add	r3, r3, r6, lsl #1
-	str	r3, [sp, #4]
-	ldr	r3, [sp, #8]
-	ldrh	r0, [r3, r6, lsl #1]
-	bl	FtlGetLastWrittenPage
-	ldr	r1, [sp, #12]
-	strh	r7, [r4, #0]	@ movhi
-	ldr	r7, .L1683
-	uxth	r0, r0
-	adds	r3, r0, #1
-	strh	r3, [r4, #2]	@ movhi
-	ldr	r3, [r1, r6, lsl #2]
-	sxth	r8, r0
-	movs	r6, #0
-	str	r3, [r4, #28]
-	b	.L1666
+	mov	r2, r7
+	str	r0, [r5, #4]
+	str	r0, [sp, #12]
+	mov	r0, r5
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	bl	FlashProgPages
+	b	.L1668
+.L1669:
+	mov	r8, #0
 .L1668:
-	ldr	r2, [sp, #4]
-	movs	r1, #1
-	ldr	r0, .L1683
-	ldrh	r3, [r2, #0]
-	mov	r2, r1
-	orr	r3, r6, r3, lsl #10
-	str	r3, [r7, #4]
-	bl	FlashReadPages
-	ldr	r3, [r7, #0]
+	ldr	r3, [r5, #0]
 	adds	r3, r3, #1
-	beq	.L1667
-	ldrh	r3, [r5, #8]
-	cmp	r3, sl
-	bcs	.L1667
-	ldrh	r2, [r4, #4]
-	ldrh	r1, [r5, #0]
-	cmp	r1, r2
-	itt	eq
-	ldreq	r2, [r7, #4]
-	streq	r2, [fp, r3, lsl #2]
-.L1667:
-	adds	r6, r6, #1
-.L1666:
-	sxth	r3, r6
-	cmp	r8, r3
-	bge	.L1668
-	b	.L1669
-.L1665:
-	ldr	r0, .L1683+4
-	ldrh	r1, [r7], #2
-	ldr	r2, [r0, #0]
-	ldr	r0, .L1683+12
-	str	r2, [r6, #8]
-	ldrh	r2, [r0, #0]
-	ldr	r0, .L1683
-	subs	r2, r2, #1
-	orr	r2, r2, r1, lsl #10
-	movs	r1, #1
-	str	r2, [r6, #4]
-	mov	r2, r1
-	str	r3, [sp, #0]
-	bl	FlashReadPages
-	ldr	r2, [r6, #0]
-	ldr	r3, [sp, #0]
-	adds	r2, r2, #1
-	beq	.L1681
-	ldrh	r1, [r5, #0]
-	ldrh	r2, [sl, #4]
-	cmp	r1, r2
-	bne	.L1681
-	ldrh	r2, [r5, #8]
-	movw	r1, #64245
-	cmp	r2, r1
-	bne	.L1681
-	ldr	r2, .L1683+12
-	movs	r1, #0
-	ldr	r0, .L1683+4
-	mov	lr, r3
-	ldrh	r4, [r2, #0]
-	ldr	r2, [r0, #0]
-	subs	r4, r4, #1
-	b	.L1671
-.L1673:
-	ldrh	r0, [r2, #0]
-	cmp	r0, fp
-	itt	cc
-	ldrcc	r3, [r2, #4]
-	strcc	r3, [lr, r0, lsl #2]
-	adds	r1, r1, #1
-	adds	r2, r2, #8
+	beq	.L1659
+	ldr	r3, .L1670+12
+	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	bcc	.L1660
+	ldr	r1, .L1670+16
+	movw	r2, #1550
+	ldr	r0, .L1670+20
+	bl	printf
+	ldr	r0, .L1670+24
+	ldr	r1, .L1670+28
+	bl	printf
+.L1660:
+	ldr	r3, [r5, #4]
+	str	r3, [sp, #12]
+	cbz	r7, .L1661
+	orr	r3, r3, #-2147483648
+	str	r3, [sp, #12]
+.L1661:
+	movs	r2, #1
+	ldr	r0, [r5, #16]
+	add	r1, sp, #12
+	bl	log2phys
+	ldr	r3, [r5, #12]
+	ldr	r0, [r3, #12]
+	adds	r3, r0, #1
+	beq	.L1662
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	ldr	r3, [r6, #0]
+	ldrh	r2, [r3, r0, lsl #1]
+	mov	r8, r0
+	cbnz	r2, .L1663
+	ldr	r0, .L1670+32
+	mov	r1, r8
+	bl	printf
+.L1663:
+	mov	r0, r8
+	bl	decrement_vpc_count
+.L1662:
+	add	sl, sl, #1
+	adds	r5, r5, #36
+.L1656:
+	ldr	r3, [sp, #4]
+	cmp	sl, r3
+	bne	.L1669
+	ldr	r3, .L1670+12
+	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	bcc	.L1654
+	ldr	r1, .L1670+16
+	movw	r2, #1567
+	ldr	r0, .L1670+20
+	bl	printf
+	ldr	r0, .L1670+24
+	ldr	r1, .L1670+28
+	bl	printf
+.L1654:
+	pop	{r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
 .L1671:
-	cmp	r1, r4
-	blt	.L1673
-	mov	r3, lr
-	b	.L1674
-.L1676:
-	ldrh	r2, [r7, #-2]
+	.align	2
+.L1670:
+	.word	.LANCHOR7
+	.word	.LANCHOR101
+	.word	.LANCHOR68
+	.word	.LANCHOR53
+	.word	.LANCHOR223
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LC39
+	.word	.LANCHOR144
+	.size	FtlProgPages, .-FtlProgPages
+	.section	.text.FtlCacheWriteBack,"ax",%progbits
+	.align	1
+	.global	FtlCacheWriteBack
+	.thumb
+	.thumb_func
+	.type	FtlCacheWriteBack, %function
+FtlCacheWriteBack:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, lr}
+	ldr	r4, .L1674
+	ldr	r0, [r4, #0]
+	cbz	r0, .L1673
+	ldr	r3, .L1674+4
 	movs	r1, #1
-	ldr	r0, .L1683
-	orr	r2, r4, r2, lsl #10
-	str	r2, [r6, #4]
-	mov	r2, r1
-	str	ip, [sp, #0]
-	bl	FlashReadPages
-	ldr	r2, [r6, #0]
-	ldr	ip, [sp, #0]
-	adds	r2, r2, #1
-	beq	.L1675
-	ldrh	r2, [r5, #8]
-	cmp	r2, fp
-	bcs	.L1675
-	ldrh	r1, [sl, #4]
-	ldrh	r0, [r5, #0]
-	cmp	r0, r1
-	itt	eq
-	ldreq	r1, [r6, #4]
-	streq	r1, [r8, r2, lsl #2]
+	movs	r2, #0
+	ldr	r3, [r3, #0]
+	bl	FtlProgPages
+	movs	r3, #0
+	str	r3, [r4, #0]
+.L1673:
+	movs	r0, #0
+	pop	{r4, pc}
 .L1675:
-	adds	r4, r4, #1
-	b	.L1682
-.L1681:
-	mov	ip, r8
-	movs	r4, #0
-	mov	r8, r3
-.L1682:
-	ldr	r1, .L1683+12
-	ldrh	r2, [r1, #0]
-	cmp	r4, r2
-	blt	.L1676
-	mov	r3, r8
-	mov	r8, ip
+	.align	2
 .L1674:
-	add	r8, r8, #1
-.L1664:
-	ldr	r2, [sp, #4]
-	uxth	r1, r8
-	cmp	r8, r2
-	blt	.L1677
-	mov	r4, sl
-.L1669:
-	mov	r0, r4
-	bl	ftl_free_no_use_map_blk
-	ldr	r3, .L1683+12
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r3, #0]
-	cmp	r2, r3
-	bne	.L1678
-	mov	r0, r4
-	bl	ftl_map_blk_alloc_new_blk
+	.word	.LANCHOR137
+	.word	.LANCHOR224
+	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
+	.section	.text.FtlSysFlush,"ax",%progbits
+	.align	1
+	.global	FtlSysFlush
+	.thumb
+	.thumb_func
+	.type	FtlSysFlush, %function
+FtlSysFlush:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	ldr	r3, .L1678
+	ldr	r3, [r3, #0]
+	cbnz	r3, .L1677
+	bl	FtlCacheWriteBack
+	bl	l2p_flush
+	movs	r0, #1
+	bl	FtlEctTblFlush
+	bl	FtlVpcTblFlush
+.L1677:
+	movs	r0, #0
+	pop	{r3, pc}
+.L1679:
+	.align	2
 .L1678:
+	.word	.LANCHOR94
+	.size	FtlSysFlush, .-FtlSysFlush
+	.section	.text.FtlDeInit,"ax",%progbits
+	.align	1
+	.global	FtlDeInit
+	.thumb
+	.thumb_func
+	.type	FtlDeInit, %function
+FtlDeInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	ldr	r3, .L1682
+	ldr	r3, [r3, #0]
+	cmp	r3, #1
+	bne	.L1681
+	bl	FtlSysFlush
+.L1681:
+	movs	r0, #0
+	pop	{r3, pc}
+.L1683:
+	.align	2
+.L1682:
+	.word	.LANCHOR225
+	.size	FtlDeInit, .-FtlDeInit
+	.section	.text.rk_ftl_de_init,"ax",%progbits
+	.align	1
+	.global	rk_ftl_de_init
+	.thumb
+	.thumb_func
+	.type	rk_ftl_de_init, %function
+rk_ftl_de_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	bl	rk_nand_de_init
+	bl	FtlDeInit
+	pop	{r3, lr}
+	b	rk_nand_de_init
+	.size	rk_ftl_de_init, .-rk_ftl_de_init
+	.section	.text.FtlGcFreeTempBlock,"ax",%progbits
+	.align	1
+	.global	FtlGcFreeTempBlock
+	.thumb
+	.thumb_func
+	.type	FtlGcFreeTempBlock, %function
+FtlGcFreeTempBlock:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1703
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	ldrh	r1, [r3, #0]
+	ldr	r3, .L1703+4
+	ldr	r3, [r3, #0]
+	cmp	r3, #0
+	bne	.L1699
+	ldr	r0, .L1703+8
+	movw	r3, #65535
+	ldrh	r4, [r0, #0]
+	cmp	r4, r3
+	beq	.L1687
+	bl	FtlGcScanTempBlk
+	str	r0, [sp, #4]
+	adds	r0, r0, #1
+	beq	.L1687
+	ldr	r3, .L1703+12
+	ldr	r3, [r3, #0]
+	ldrh	r2, [r3, r4, lsl #1]
+	cmp	r2, #4
+	bls	.L1688
+	subs	r2, r2, #5
+	movs	r0, #1
+	strh	r2, [r3, r4, lsl #1]	@ movhi
+	bl	FtlEctTblFlush
+.L1688:
+	ldr	r3, .L1703+16
+	ldr	r3, [r3, #0]
+	cbnz	r3, .L1689
+	ldr	r3, .L1703+20
+	ldr	r0, [sp, #4]
+	ldr	r2, [r3, #96]
+	ubfx	r0, r0, #10, #16
+	adds	r2, r2, #1
+	str	r2, [r3, #96]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+.L1689:
+	ldr	r3, .L1703+16
+	movs	r2, #0
+	movs	r4, #1
+	str	r2, [r3, #0]
+	b	.L1686
+.L1687:
+	ldr	r5, .L1703+8
+	movs	r4, #0
+	ldr	r3, .L1703+16
+	ldrh	r2, [r5, #0]
+	str	r4, [r3, #0]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L1686
+	bl	FtlCacheWriteBack
+	ldr	r3, .L1703+24
+	ldr	r1, .L1703
+	ldrh	r2, [r3, #0]
+	ldrh	r1, [r1, #0]
+	ldrb	r3, [r5, #7]	@ zero_extendqisi2
+	muls	r3, r1, r3
+	cmp	r2, r3
+	beq	.L1690
+	ldr	r1, .L1703+28
+	movs	r2, #163
+	ldr	r0, .L1703+32
+	bl	printf
+	ldr	r0, .L1703+36
+	ldr	r1, .L1703+40
+	bl	printf
+.L1690:
+	ldr	r3, .L1703+8
+	movs	r5, #0
+	ldr	r2, .L1703+44
+	ldr	r4, .L1703
+	ldrh	r1, [r3, #0]
+	ldr	r2, [r2, #0]
+	ldrh	r4, [r4, #0]
+	ldrb	r0, [r3, #7]	@ zero_extendqisi2
+	muls	r0, r4, r0
+	strh	r0, [r2, r1, lsl #1]	@ movhi
+	ldr	r1, .L1703+48
+	ldr	r2, .L1703+24
+	ldr	fp, .L1703+80
+	ldr	r0, [r1, #0]
+	mov	sl, r2
+	ldrh	r4, [r2, #0]
+	ldr	r8, .L1703+84
+	adds	r0, r4, r0
+	str	r0, [r1, #0]
+	b	.L1691
+.L1695:
+	ldr	r7, [fp, #0]
+	movs	r6, #12
+	muls	r6, r5, r6
+	ldr	r3, [r8, #0]
+	adds	r4, r7, r6
+	ldr	r2, [r4, #8]
+	cmp	r2, r3
+	bcc	.L1692
+	ldr	r1, .L1703+28
+	movs	r2, #168
+	ldr	r0, .L1703+32
+	bl	printf
+	ldr	r0, .L1703+36
+	ldr	r1, .L1703+40
+	bl	printf
+.L1692:
+	movs	r2, #0
+	ldr	r0, [r4, #8]
+	add	r1, sp, #4
+	bl	log2phys
+	ldr	r0, [sp, #4]
+	ldr	r3, [r7, r6]
+	cmp	r0, r3
+	bne	.L1693
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	adds	r1, r4, #4
+	movs	r2, #1
+	mov	r6, r0
+	ldr	r0, [r4, #8]
+	bl	log2phys
+	mov	r0, r6
+	b	.L1702
+.L1693:
+	ldr	r3, [r4, #4]
+	cmp	r0, r3
+	beq	.L1694
+	ldr	r3, .L1703+8
+	ldrh	r0, [r3, #0]
+.L1702:
+	bl	decrement_vpc_count
+.L1694:
+	adds	r5, r5, #1
+	uxth	r5, r5
+.L1691:
+	ldrh	r3, [sl, #0]
+	cmp	r3, r5
+	bhi	.L1695
+	movw	r0, #65535
+	ldr	r4, .L1703+8
+	bl	decrement_vpc_count
+	ldr	r3, .L1703+52
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L1696
+	ldr	r0, .L1703+56
+	ldrh	r1, [r4, #0]
+	bl	printf
+.L1696:
+	ldr	r3, .L1703+44
+	ldrh	r0, [r4, #0]
+	ldr	r3, [r3, #0]
+	ldrh	r3, [r3, r0, lsl #1]
+	cbz	r3, .L1697
+	bl	INSERT_DATA_LIST
+	b	.L1698
+.L1697:
+	bl	INSERT_FREE_LIST
+.L1698:
+	ldr	r3, .L1703+8
+	movw	r5, #65535
+	movs	r4, #0
+	strh	r5, [r3, #0]	@ movhi
+	ldr	r3, .L1703+24
+	strh	r4, [r3, #0]	@ movhi
+	ldr	r3, .L1703+60
+	strh	r4, [r3, #0]	@ movhi
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	ldr	r3, .L1703+64
+	ldr	r2, .L1703+68
+	movs	r1, #3
+	ldrh	r3, [r3, #0]
+	ldrh	r2, [r2, #0]
+	muls	r2, r1, r2
+	cmp	r3, r2, lsr #2
+	ble	.L1686
+	ldr	r3, .L1703+72
+	movs	r2, #20
+	strh	r5, [r3, #0]	@ movhi
+	ldr	r3, .L1703+76
+	strh	r2, [r3, #0]	@ movhi
+	b	.L1686
+.L1699:
+	movs	r4, #0
+.L1686:
 	mov	r0, r4
-	bl	ftl_map_blk_gc
-	mov	r0, r4
-	bl	ftl_map_blk_gc
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L1704:
+	.align	2
+.L1703:
+	.word	.LANCHOR68
+	.word	.LANCHOR94
+	.word	.LANCHOR111
+	.word	.LANCHOR96
+	.word	.LANCHOR140
+	.word	.LANCHOR144
+	.word	.LANCHOR147
+	.word	.LANCHOR226
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR101
+	.word	.LANCHOR158
+	.word	.LANCHOR7
+	.word	.LC40
+	.word	.LANCHOR145
+	.word	.LANCHOR106
+	.word	.LANCHOR201
+	.word	.LANCHOR202
+	.word	.LANCHOR173
+	.word	.LANCHOR148
+	.word	.LANCHOR88
+	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
+	.section	.text.Ftl_gc_temp_data_write_back,"ax",%progbits
+	.align	1
+	.global	Ftl_gc_temp_data_write_back
+	.thumb
+	.thumb_func
+	.type	Ftl_gc_temp_data_write_back, %function
+Ftl_gc_temp_data_write_back:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	ldr	r3, .L1714
+	ldrb	r2, [r3, #0]	@ zero_extendqisi2
+	ldr	r3, .L1714+4
+	cbz	r2, .L1706
+	ldr	r2, [r3, #0]
+	lsls	r2, r2, #31
+	bpl	.L1706
+	ldr	r2, .L1714+8
+	ldrh	r2, [r2, #4]
+	cmp	r2, #0
+	bne	.L1711
+.L1706:
+	ldr	r4, .L1714+12
+	movs	r2, #0
+	ldr	r1, [r3, #0]
+	mov	r3, r2
+	movs	r5, #0
+	ldr	r7, .L1714+4
+	ldr	r0, [r4, #0]
+	movs	r6, #36
+	bl	FlashProgPages
+	b	.L1708
+.L1710:
+	mul	r3, r6, r5
+	ldr	r1, [r4, #0]
+	adds	r2, r1, r3
+	ldr	r1, [r1, r3]
+	adds	r0, r1, #1
+	bne	.L1709
+	ldr	r3, .L1714+8
+	movs	r5, #0
+	ldr	r0, .L1714+16
+	ldrh	r4, [r3, #0]
+	ldr	r0, [r0, #0]
+	strh	r5, [r0, r4, lsl #1]	@ movhi
+	strh	r1, [r3, #0]	@ movhi
+	ldr	r3, .L1714+20
+	ldr	r0, [r2, #4]
+	ldr	r1, [r3, #96]
+	ubfx	r0, r0, #10, #16
+	adds	r1, r1, #1
+	str	r1, [r3, #96]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	bl	FtlGcPageVarInit
+	b	.L1713
+.L1709:
+	ldr	r3, [r2, #12]
+	adds	r5, r5, #1
+	ldr	r1, [r2, #4]
+	uxth	r5, r5
+	ldr	r0, [r3, #12]
+	ldr	r2, [r3, #8]
+	bl	FtlGcUpdatePage
+.L1708:
+	ldr	r1, [r7, #0]
+	cmp	r5, r1
+	bcc	.L1710
+	ldr	r3, .L1714+12
+	ldr	r0, [r3, #0]
+	bl	FtlGcBufFree
+	ldr	r3, .L1714+4
 	movs	r0, #0
-	add	sp, sp, #16
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1684:
+	str	r0, [r3, #0]
+	ldr	r3, .L1714+8
+	ldrh	r3, [r3, #4]
+	cbnz	r3, .L1707
+	movs	r0, #1
+	bl	FtlGcFreeTempBlock
+.L1713:
+	movs	r0, #1
+	pop	{r3, r4, r5, r6, r7, pc}
+.L1711:
+	movs	r0, #0
+.L1707:
+	pop	{r3, r4, r5, r6, r7, pc}
+.L1715:
 	.align	2
-.L1683:
-	.word	.LANCHOR197
-	.word	.LANCHOR96
-	.word	.LANCHOR180
-	.word	.LANCHOR69
-	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
-	.section	.text.FtlLoadMapInfo,"ax",%progbits
+.L1714:
+	.word	.LANCHOR7
+	.word	.LANCHOR131
+	.word	.LANCHOR111
+	.word	.LANCHOR178
+	.word	.LANCHOR101
+	.word	.LANCHOR144
+	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
+	.section	.text.Ftl_get_new_temp_ppa,"ax",%progbits
 	.align	1
-	.global	FtlLoadMapInfo
+	.global	Ftl_get_new_temp_ppa
 	.thumb
 	.thumb_func
-	.type	FtlLoadMapInfo, %function
-FtlLoadMapInfo:
+	.type	Ftl_get_new_temp_ppa, %function
+Ftl_get_new_temp_ppa:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	bl	FtlL2PDataInit
-	ldr	r0, .L1686
-	bl	FtlMapTblRecovery
+	push	{r3, r4, r5, lr}
+	movw	r3, #65535
+	ldr	r5, .L1719
+	ldrh	r2, [r5, #0]
+	cmp	r2, r3
+	beq	.L1717
+	ldrh	r3, [r5, #4]
+	cbnz	r3, .L1718
+.L1717:
+	bl	FtlCacheWriteBack
 	movs	r0, #0
-	pop	{r3, pc}
-.L1687:
+	bl	FtlGcFreeTempBlock
+	ldr	r0, .L1719
+	movs	r4, #0
+	strb	r4, [r5, #8]
+	bl	allocate_data_superblock
+	ldr	r3, .L1719+4
+	strh	r4, [r3, #0]	@ movhi
+	ldr	r3, .L1719+8
+	strh	r4, [r3, #0]	@ movhi
+	bl	l2p_flush
+	mov	r0, r4
+	bl	FtlEctTblFlush
+	bl	FtlVpcTblFlush
+.L1718:
+	ldr	r0, .L1719
+	pop	{r3, r4, r5, lr}
+	b	get_new_active_ppa
+.L1720:
 	.align	2
-.L1686:
-	.word	.LANCHOR120
-	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
-	.section	.text.FtlLoadVonderInfo,"ax",%progbits
+.L1719:
+	.word	.LANCHOR111
+	.word	.LANCHOR145
+	.word	.LANCHOR147
+	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
+	.section	.text.FtlGcPageRecovery,"ax",%progbits
 	.align	1
-	.global	FtlLoadVonderInfo
+	.global	FtlGcPageRecovery
 	.thumb
 	.thumb_func
-	.type	FtlLoadVonderInfo, %function
-FtlLoadVonderInfo:
+	.type	FtlGcPageRecovery, %function
+FtlGcPageRecovery:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	ldr	r3, .L1689
-	ldr	r0, .L1689+4
-	ldrh	r3, [r3, #0]
-	strh	r3, [r0, #10]	@ movhi
-	movw	r3, #61574
-	strh	r3, [r0, #4]	@ movhi
-	ldr	r3, .L1689+8
-	ldrh	r3, [r3, #0]
-	strh	r3, [r0, #8]	@ movhi
-	ldr	r3, .L1689+12
-	ldrh	r3, [r3, #0]
-	strh	r3, [r0, #6]	@ movhi
-	ldr	r3, .L1689+16
-	ldr	r3, [r3, #0]
-	str	r3, [r0, #12]
-	ldr	r3, .L1689+20
-	ldr	r3, [r3, #0]
-	str	r3, [r0, #16]
-	ldr	r3, .L1689+24
-	ldr	r3, [r3, #0]
-	str	r3, [r0, #20]
-	ldr	r3, .L1689+28
+	push	{r3, r4, r5, lr}
+	ldr	r4, .L1723
+	ldr	r5, .L1723+4
+	ldrh	r1, [r4, #0]
+	mov	r0, r5
+	bl	FtlGcScanTempBlk
+	ldrh	r2, [r5, #2]
+	ldrh	r3, [r4, #0]
+	cmp	r2, r3
+	bcc	.L1721
+	ldr	r0, .L1723+8
+	bl	FtlMapBlkWriteDumpData
+	movs	r0, #0
+	bl	FtlGcFreeTempBlock
+	ldr	r3, .L1723+12
+	movs	r2, #0
+	str	r2, [r3, #0]
+.L1721:
+	pop	{r3, r4, r5, pc}
+.L1724:
+	.align	2
+.L1723:
+	.word	.LANCHOR68
+	.word	.LANCHOR111
+	.word	.LANCHOR122
+	.word	.LANCHOR140
+	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
+	.section	.text.ftl_discard,"ax",%progbits
+	.align	1
+	.global	ftl_discard
+	.thumb
+	.thumb_func
+	.type	ftl_discard, %function
+ftl_discard:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1734
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	mov	r4, r2
 	ldr	r3, [r3, #0]
-	str	r3, [r0, #24]
-	bl	FtlMapTblRecovery
+	adds	r2, r2, r1
+	mov	r6, r1
+	cmp	r2, r3
+	bhi	.L1731
+	cmp	r4, #31
+	bls	.L1732
+	bl	FtlCacheWriteBack
+	ldr	r3, .L1734+4
+	mov	r0, r6
+	ldrh	r7, [r3, #0]
+	mov	r1, r7
+	bl	__aeabi_uidiv
+	mls	r6, r0, r7, r6
+	mov	r5, r0
+	uxth	r6, r6
+	cbz	r6, .L1727
+	subs	r6, r7, r6
+	adds	r5, r0, #1
+	cmp	r6, r4
+	it	cs
+	movcs	r6, r4
+	uxth	r6, r6
+	subs	r4, r4, r6
+.L1727:
+	mov	r3, #-1
+	ldr	r8, .L1734+4
+	str	r3, [sp, #4]
+	ldr	r7, .L1734+8
+	ldr	r6, .L1734+12
+	b	.L1728
+.L1730:
+	movs	r2, #0
+	mov	r0, r5
+	mov	r1, sp
+	bl	log2phys
+	ldr	r3, [sp, #0]
+	adds	r3, r3, #1
+	beq	.L1729
+	ldr	r3, [r7, #0]
+	add	r1, sp, #4
+	movs	r2, #1
+	mov	r0, r5
+	adds	r3, r3, #1
+	str	r3, [r7, #0]
+	ldr	r3, [r6, #0]
+	adds	r3, r3, #1
+	str	r3, [r6, #0]
+	bl	log2phys
+	ldr	r0, [sp, #0]
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	bl	decrement_vpc_count
+.L1729:
+	ldrh	r3, [r8, #0]
+	adds	r5, r5, #1
+	subs	r4, r4, r3
+.L1728:
+	ldrh	r3, [r8, #0]
+	cmp	r4, r3
+	bcs	.L1730
+	ldr	r3, .L1734+8
+	mov	r4, #0
+	ldr	r2, [r3, #0]
+	cmp	r2, #32
+	bls	.L1733
+	str	r4, [r3, #0]
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	b	.L1733
+.L1731:
+	mov	r0, #-1
+	b	.L1726
+.L1732:
 	movs	r0, #0
-	pop	{r3, pc}
-.L1690:
+	b	.L1726
+.L1733:
+	mov	r0, r4
+.L1726:
+	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
+.L1735:
 	.align	2
-.L1689:
-	.word	.LANCHOR77
-	.word	.LANCHOR213
-	.word	.LANCHOR85
-	.word	.LANCHOR78
-	.word	.LANCHOR86
-	.word	.LANCHOR185
-	.word	.LANCHOR184
-	.word	.LANCHOR186
-	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
+.L1734:
+	.word	.LANCHOR84
+	.word	.LANCHOR71
+	.word	.LANCHOR227
+	.word	.LANCHOR160
+	.size	ftl_discard, .-ftl_discard
 	.section	.text.FtlRecoverySuperblock,"ax",%progbits
 	.align	1
 	.global	FtlRecoverySuperblock
@@ -15226,106 +15714,106 @@ FtlLoadVonderInfo:
 	.thumb_func
 	.type	FtlRecoverySuperblock, %function
 FtlRecoverySuperblock:
-	@ args = 0, pretend = 0, frame = 72
+	@ args = 0, pretend = 0, frame = 64
 	@ frame_needed = 0, uses_anonymous_args = 0
 	ldrh	r2, [r0, #0]
 	movw	r3, #65535
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	cmp	r2, r3
-	sub	sp, sp, #72
+	sub	sp, sp, #64
 	mov	r4, r0
-	beq	.L1692
+	beq	.L1737
 	ldrh	r5, [r0, #2]
-	ldr	r2, .L1784
-	str	r5, [sp, #24]
+	ldr	r2, .L1829
+	str	r5, [sp, #20]
 	ldrb	r5, [r0, #6]	@ zero_extendqisi2
 	ldrh	r2, [r2, #0]
-	str	r5, [sp, #36]
-	ldr	r5, [sp, #24]
+	str	r5, [sp, #28]
+	ldr	r5, [sp, #20]
 	cmp	r2, r5
 	mov	r5, #0
-	bne	.L1693
+	bne	.L1738
 	mov	r3, r5	@ movhi
 	strh	r5, [r0, #4]	@ movhi
-	b	.L1781
-.L1693:
+	b	.L1826
+.L1738:
 	ldrh	r0, [r0, #16]
-	b	.L1694
-.L1695:
+	b	.L1739
+.L1740:
 	adds	r5, r5, #1
 	uxth	r5, r5
 	add	r2, r5, #8
 	ldrh	r0, [r4, r2, lsl #1]
-.L1694:
+.L1739:
 	cmp	r0, r3
-	beq	.L1695
+	beq	.L1740
 	ldrb	r1, [r4, #8]	@ zero_extendqisi2
 	cmp	r1, #1
-	bne	.L1696
+	bne	.L1741
 	bl	FtlGetLastWrittenPage
-	adds	r3, r0, #1
+	adds	r2, r0, #1
 	mov	r6, r0
-	beq	.L1697
-	ldr	r3, .L1784+4
+	beq	.L1742
+	ldr	r3, .L1829+4
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbnz	r3, .L1776
-	ldr	r3, .L1784+8
+	cbnz	r3, .L1821
+	ldr	r3, .L1829+8
 	ldrh	r7, [r3, r0, lsl #1]
-	b	.L1766
-.L1696:
+	b	.L1811
+.L1741:
 	movs	r1, #0
 	bl	FtlGetLastWrittenPage
+	adds	r3, r0, #1
 	mov	r6, r0
-	adds	r0, r0, #1
-	beq	.L1697
-.L1776:
+	beq	.L1742
+.L1821:
 	mov	r7, r6
-.L1766:
-	ldr	r3, .L1784+12
+.L1811:
+	ldr	r3, .L1829+12
 	movs	r5, #0
-	str	r4, [sp, #48]
+	str	r4, [sp, #44]
 	mov	r2, r4
 	ldrh	fp, [r3, #0]
-	ldr	r3, .L1784+16
+	ldr	r3, .L1829+16
 	ldr	sl, [r3, #0]
-	ldr	r3, .L1784+20
+	ldr	r3, .L1829+20
 	ldr	r8, [r3, #0]
-	ldr	r3, .L1784+24
+	ldr	r3, .L1829+24
 	ldrh	ip, [r3, #0]
 	mov	r3, r5
-	b	.L1699
-.L1697:
-	ldr	r3, [sp, #24]
-	cbz	r3, .L1700
-	ldr	r1, .L1784+28
-	movw	r2, #1748
-	ldr	r0, .L1784+32
+	b	.L1744
+.L1742:
+	ldr	r3, [sp, #20]
+	cbz	r3, .L1745
+	ldr	r1, .L1829+28
+	movw	r2, #1894
+	ldr	r0, .L1829+32
 	bl	printf
-	ldr	r0, .L1784+36
-	ldr	r1, .L1784+40
+	ldr	r0, .L1829+36
+	ldr	r1, .L1829+40
 	bl	printf
-.L1700:
-	ldr	r3, [sp, #36]
-	cbz	r3, .L1701
+.L1745:
+	ldr	r3, [sp, #28]
+	cbz	r3, .L1746
 	cmp	r3, r5
-	beq	.L1701
-	ldr	r1, .L1784+28
-	movw	r2, #1749
-	ldr	r0, .L1784+32
+	beq	.L1746
+	ldr	r1, .L1829+28
+	movw	r2, #1895
+	ldr	r0, .L1829+32
 	bl	printf
-	ldr	r0, .L1784+36
-	ldr	r1, .L1784+40
+	ldr	r0, .L1829+36
+	ldr	r1, .L1829+40
 	bl	printf
-.L1701:
+.L1746:
 	movs	r3, #0
 	strh	r3, [r4, #2]	@ movhi
 	strb	r3, [r4, #6]
-	b	.L1692
-.L1703:
+	b	.L1737
+.L1748:
 	ldrh	r0, [r2, #16]
 	movw	lr, #65535
 	cmp	r0, lr
-	beq	.L1702
+	beq	.L1747
 	mov	lr, #36
 	orr	r0, r7, r0, lsl #10
 	mla	r1, lr, r5, sl
@@ -15338,556 +15826,565 @@ FtlRecoverySuperblock:
 	bic	r0, r0, #3
 	add	r0, r8, r0
 	str	r0, [r1, #12]
-.L1702:
+.L1747:
 	adds	r3, r3, #1
 	adds	r2, r2, #2
 	uxth	r3, r3
-.L1699:
+.L1744:
 	cmp	r3, fp
-	bne	.L1703
+	bne	.L1748
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1768
-	ldr	r3, .L1784+4
+	bne	.L1813
+	ldr	r3, .L1829+4
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	adds	r3, r3, #0
 	it	ne
 	movne	r3, #1
-	b	.L1777
-.L1768:
+	b	.L1822
+.L1813:
 	movs	r3, #0
-.L1777:
-	ldr	r8, .L1784+16
+.L1822:
+	ldr	r8, .L1829+16
 	mov	r1, r5
-	str	r3, [sp, #32]
-	mov	fp, r7
-	ldr	r2, [sp, #32]
+	str	r3, [sp, #24]
+	mov	fp, #0
+	ldr	r2, [sp, #24]
+	mov	sl, fp
 	ldr	r0, [r8, #0]
 	bl	FlashReadPages
-	ldr	r2, .L1784+44
-	ldr	sl, [r8, #0]
-	uxth	ip, r7
-	movw	r8, #65535
-	str	r8, [sp, #16]
-	ldr	r3, [r2, #0]
-	mov	r8, #0
-	str	r3, [sp, #20]
-	mov	r3, r6
-	mov	r6, sl
-	mov	sl, ip
-	b	.L1705
-.L1710:
-	ldr	r1, [r6, #0]
-	cbnz	r1, .L1706
-	ldr	ip, [r6, #12]
-	ldr	r7, [ip, #4]
-	adds	r1, r7, #1
-	beq	.L1707
-	ldr	r1, [r2, #0]
-	mov	r0, r7
-	str	r2, [sp, #12]
-	str	r3, [sp, #4]
+	ldr	r3, .L1829+44
+	movw	ip, #65535
 	str	ip, [sp, #8]
+	ldr	r2, [r3, #0]
+	str	r2, [sp, #12]
+	uxth	r2, r7
+	str	r2, [sp, #16]
+	b	.L1750
+.L1755:
+	ldr	r3, .L1829+16
+	ldr	r2, [r3, #0]
+	add	r3, r2, fp
+	ldr	r2, [r2, fp]
+	cbnz	r2, .L1751
+	ldr	r3, [r3, #12]
+	ldr	r8, [r3, #4]
+	cmp	r8, #-1
+	beq	.L1752
+	ldr	r2, .L1829+44
+	mov	r0, r8
+	ldr	r1, [r2, #0]
+	str	r3, [sp, #0]
 	bl	ftl_cmp_data_ver
-	ldr	r2, [sp, #12]
-	ldr	r3, [sp, #4]
-	ldr	ip, [sp, #8]
-	cbz	r0, .L1707
-	adds	r7, r7, #1
-	str	r7, [r2, #0]
-.L1707:
-	ldr	r1, [ip, #0]
-	adds	r1, r1, #1
-	bne	.L1708
-	uxth	r6, r3
-	ldr	r3, .L1784+16
+	ldr	r3, [sp, #0]
+	cbz	r0, .L1752
+	ldr	r0, .L1829+44
+	add	r2, r8, #1
+	str	r2, [r0, #0]
+.L1752:
+	ldr	r3, [r3, #0]
+	adds	r3, r3, #1
+	bne	.L1753
+	ldr	r3, .L1829+16
 	movs	r2, #36
-	mov	r7, fp
+	uxth	r6, r6
 	ldr	r3, [r3, #0]
-	mla	r3, r2, r8, r3
-	b	.L1778
-.L1706:
-	str	sl, [sp, #16]
-.L1708:
-	add	r8, r8, #1
-	adds	r6, r6, #36
-	uxth	r8, r8
-.L1705:
-	cmp	r8, r5
-	bne	.L1710
-	adds	r6, r3, #1
-	ldr	r3, .L1784+16
-	mov	r7, fp
+	mla	r3, r2, sl, r3
+	b	.L1823
+.L1751:
+	ldr	r1, [r3, #4]
+	ldr	r0, .L1829+48
+	bl	printf
+	ldr	r2, [sp, #16]
+	ldrh	r3, [r4, #0]
+	ldr	r0, .L1829+52
+	str	r2, [sp, #8]
+	strh	r3, [r0, #0]	@ movhi
+.L1753:
+	add	sl, sl, #1
+	add	fp, fp, #36
+	uxth	sl, sl
+.L1750:
+	cmp	sl, r5
+	bne	.L1755
+	ldr	r3, .L1829+16
+	adds	r6, r6, #1
 	uxth	r6, r6
 	ldr	r3, [r3, #0]
-.L1778:
+.L1823:
 	ldr	r0, [r3, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_plane
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	str	r0, [sp, #28]
-	bne	.L1711
-	ldr	r2, .L1784+4
+	str	r0, [sp, #16]
+	bne	.L1756
+	ldr	r2, .L1829+4
 	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	cbnz	r2, .L1711
-	ldr	r2, .L1784+8
+	cbnz	r2, .L1756
+	ldr	r2, .L1829+8
 	ldrh	r6, [r2, r6, lsl #1]
-.L1711:
-	ldr	r2, .L1784
+.L1756:
+	ldr	r2, .L1829
 	ldrh	r2, [r2, #0]
 	cmp	r2, r6
-	bne	.L1712
+	bne	.L1757
 	movs	r2, #0
 	strh	r6, [r4, #2]	@ movhi
 	strb	r2, [r4, #6]
 	strh	r2, [r4, #4]	@ movhi
-.L1712:
-	ldr	r5, [sp, #24]
+.L1757:
+	ldr	r5, [sp, #20]
 	cmp	r6, r5
-	bne	.L1713
-	ldr	r8, [sp, #28]
-	ldr	r5, [sp, #36]
+	bne	.L1758
+	ldr	r8, [sp, #16]
+	ldr	r5, [sp, #28]
 	cmp	r8, r5
-	bne	.L1713
+	bne	.L1758
 	mov	r0, r4
 	mov	r1, r6
 	mov	r2, r8
-	b	.L1782
-.L1713:
-	ldr	r2, [sp, #20]
-	ldr	r8, [sp, #16]
+	b	.L1827
+.L1758:
+	ldr	r2, [sp, #12]
+	ldr	r8, [sp, #8]
 	subs	r5, r2, #1
 	movw	r2, #65535
 	cmp	r8, r2
-	bne	.L1714
+	bne	.L1759
 	cmp	r3, #0
-	bne	.L1715
-.L1714:
-	ldr	r2, .L1784+48
+	bne	.L1760
+.L1759:
+	ldr	r2, .L1829+56
 	uxth	r3, r7
-	ldr	r0, [sp, #24]
+	ldr	r0, [sp, #20]
 	ldr	r1, [r2, #0]
 	adds	r1, r1, #1
 	it	eq
 	streq	r5, [r2, #0]
 	ldr	r2, [r2, #0]
-	str	r2, [sp, #16]
+	str	r2, [sp, #8]
 	adds	r2, r0, #7
 	cmp	r3, r2
-	ble	.L1769
+	ble	.L1814
 	subs	r7, r3, #7
 	uxth	r7, r7
-	b	.L1717
-.L1769:
-	ldr	r7, [sp, #24]
-.L1717:
+	b	.L1762
+.L1814:
+	ldr	r7, [sp, #20]
+.L1762:
 	mov	fp, #-1
 	mov	r8, r3
 	mov	sl, fp
 	mov	r3, r6
 	mov	r6, r5
-	b	.L1718
-.L1720:
+	b	.L1763
+.L1765:
 	ldrh	r0, [r1, #16]
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1719
-	ldr	r3, [sp, #20]
+	beq	.L1764
+	ldr	r3, [sp, #12]
 	mov	lr, #36
 	orr	r0, r7, r0, lsl #10
 	mla	ip, lr, r5, r3
 	adds	r5, r5, #1
 	uxth	r5, r5
 	str	r0, [ip, #4]
-.L1719:
+.L1764:
 	adds	r2, r2, #1
 	adds	r1, r1, #2
 	uxth	r2, r2
-.L1731:
-	ldr	r0, [sp, #44]
+.L1776:
+	ldr	r0, [sp, #36]
 	cmp	r2, r0
-	bne	.L1720
-	ldr	ip, .L1784+16
+	bne	.L1765
+	ldr	ip, .L1829+16
 	mov	r1, r5
-	ldr	r3, [sp, #40]
-	ldr	r2, [sp, #32]
+	ldr	r3, [sp, #32]
+	ldr	r2, [sp, #24]
 	ldr	r0, [ip, #0]
-	str	r3, [sp, #4]
-	str	ip, [sp, #8]
+	stmia	sp, {r3, ip}
 	bl	FlashReadPages
-	ldr	r2, .L1784+4
+	ldr	r2, .L1829+4
 	movs	r0, #0
-	ldr	ip, [sp, #8]
-	ldr	r3, [sp, #4]
+	ldr	ip, [sp, #4]
+	ldr	r3, [sp, #0]
 	ldrb	r2, [r2, #0]	@ zero_extendqisi2
 	ldr	r1, [ip, #0]
 	mov	ip, r3
-	str	r5, [sp, #40]
-	str	r2, [sp, #20]
-	ldr	r2, .L1784+48
+	str	r5, [sp, #32]
+	str	r2, [sp, #12]
+	ldr	r2, .L1829+56
 	ldr	r2, [r2, #0]
-	b	.L1721
-.L1785:
+	b	.L1766
+.L1830:
 	.align	2
-.L1784:
+.L1829:
 	.word	.LANCHOR68
 	.word	.LANCHOR7
 	.word	.LANCHOR8
 	.word	.LANCHOR53
-	.word	.LANCHOR173
-	.word	.LANCHOR130
+	.word	.LANCHOR177
+	.word	.LANCHOR133
 	.word	.LANCHOR74
-	.word	.LANCHOR223
+	.word	.LANCHOR228
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
-	.word	.LANCHOR154
-	.word	.LANCHOR138
-.L1729:
+	.word	.LANCHOR157
+	.word	.LC41
+	.word	.LANCHOR229
+	.word	.LANCHOR141
+.L1774:
 	ldr	r3, [r1, #0]
-	cbnz	r3, .L1722
+	cbnz	r3, .L1767
 	ldr	r3, [r1, #12]
 	movw	r5, #65535
 	ldrh	lr, [r3, #0]
 	cmp	lr, r5
-	beq	.L1771
+	beq	.L1816
 	ldr	r3, [r3, #4]
 	adds	r5, r3, #1
-	beq	.L1771
+	beq	.L1816
 	cmp	fp, #-1
-	bne	.L1723
-	ldr	r5, .L1786
+	bne	.L1768
+	ldr	r5, .L1831
 	ldrh	lr, [r5, r7, lsl #1]
 	movw	r5, #65535
 	cmp	lr, r5
-	bne	.L1724
-	ldr	r5, [sp, #20]
-	cbz	r5, .L1723
-.L1724:
+	bne	.L1769
+	ldr	r5, [sp, #12]
+	cmp	r5, #0
+	beq	.L1768
+.L1769:
 	cmp	r2, r6
 	ite	ne
 	movne	fp, r2
 	moveq	fp, #-1
-	b	.L1723
-.L1722:
-	ldr	r3, .L1786+4
+	b	.L1768
+.L1767:
+	ldr	r1, .L1831+4
 	mov	r5, r6
-	ldrb	r1, [r4, #8]	@ zero_extendqisi2
+	ldrh	r0, [r4, #0]
 	mov	r6, ip
+	ldr	r3, .L1831+8
+	strh	r0, [r1, #0]	@ movhi
+	ldrb	r1, [r4, #8]	@ zero_extendqisi2
 	str	r2, [r3, #0]
 	cmp	r1, #0
-	bne	.L1715
-	ldr	r1, .L1786
+	bne	.L1760
+	ldr	r1, .L1831
 	ldrh	r0, [r1, r7, lsl #1]
 	movw	r1, #65535
 	cmp	r0, r1
-	bne	.L1725
+	bne	.L1770
 	cmp	fp, #-1
-	beq	.L1726
+	beq	.L1771
 	str	fp, [r3, #0]
-	b	.L1715
-.L1726:
-	ldr	r0, [sp, #16]
+	b	.L1760
+.L1771:
+	ldr	r0, [sp, #8]
 	cmp	r0, r5
-	beq	.L1783
+	beq	.L1828
 	str	r0, [r3, #0]
-	b	.L1715
-.L1725:
+	b	.L1760
+.L1770:
 	cmp	sl, r5
-	beq	.L1728
+	beq	.L1773
 	cmp	sl, #-1
-	beq	.L1715
+	beq	.L1760
 	str	sl, [r3, #0]
-	b	.L1715
-.L1728:
+	b	.L1760
+.L1773:
 	cmp	r2, r5
-	beq	.L1715
-.L1783:
+	beq	.L1760
+.L1828:
 	subs	r2, r2, #1
-	b	.L1779
-.L1771:
+	b	.L1824
+.L1816:
 	mov	r3, r2
 	mov	r2, sl
-.L1723:
+.L1768:
 	adds	r0, r0, #1
 	mov	sl, r2
 	adds	r1, r1, #36
 	mov	r2, r3
 	uxth	r0, r0
-.L1721:
-	ldr	r3, [sp, #40]
+.L1766:
+	ldr	r3, [sp, #32]
 	cmp	r0, r3
-	bne	.L1729
+	bne	.L1774
 	adds	r7, r7, #1
-	ldr	r1, .L1786+4
+	ldr	r1, .L1831+8
 	mov	r3, ip
 	uxth	r7, r7
 	str	r2, [r1, #0]
-.L1718:
+.L1763:
 	cmp	r7, r8
-	bhi	.L1730
-	ldr	r5, .L1786+8
+	bhi	.L1775
+	ldr	r5, .L1831+12
 	mov	r1, r4
-	ldr	r2, .L1786+12
-	str	r3, [sp, #40]
+	ldr	r2, .L1831+16
+	str	r3, [sp, #32]
 	ldrh	lr, [r5, #0]
 	movs	r5, #0
 	ldr	r2, [r2, #0]
-	str	lr, [sp, #44]
-	str	r2, [sp, #20]
+	str	lr, [sp, #36]
+	str	r2, [sp, #12]
 	mov	r2, r5
-	b	.L1731
-.L1730:
+	b	.L1776
+.L1775:
 	mov	r5, r6
 	mov	r6, r3
-	ldr	r3, .L1786+4
+	ldr	r3, .L1831+8
 	mov	r2, #-1
-.L1779:
+.L1824:
 	str	r2, [r3, #0]
-.L1715:
-	ldr	r3, .L1786+16
+.L1760:
+	ldr	r3, .L1831+20
 	movs	r2, #1
-	ldr	r0, .L1786+20
-	ldr	r7, .L1786+12
+	ldr	r0, .L1831+24
+	ldr	r7, .L1831+16
 	strh	r2, [r3, #0]	@ movhi
 	bl	FtlMapBlkWriteDumpData
-	ldr	sl, [sp, #24]
-	str	r6, [sp, #20]
-.L1732:
-	ldr	r3, .L1786+24
+	ldr	sl, [sp, #20]
+	str	r6, [sp, #12]
+.L1777:
+	ldr	r3, .L1831+28
 	movs	r6, #0
-	ldr	r0, .L1786+8
+	ldr	r0, .L1831+12
 	mov	r2, r4
 	ldr	lr, [r7, #0]
 	ldrb	fp, [r3, #0]	@ zero_extendqisi2
 	mov	r3, r6
 	ldrh	ip, [r0, #0]
-	b	.L1733
-.L1736:
+	b	.L1778
+.L1781:
 	ldrh	r0, [r2, #16]
 	movw	r1, #65535
 	cmp	r0, r1
-	beq	.L1734
+	beq	.L1779
 	mov	r8, #36
 	orr	r0, sl, r0, lsl #10
 	mla	r1, r8, r6, lr
 	str	r0, [r1, #4]
 	ldrb	r8, [r4, #8]	@ zero_extendqisi2
 	cmp	r8, #1
-	bne	.L1735
+	bne	.L1780
 	cmp	fp, #0
-	beq	.L1735
+	beq	.L1780
 	orr	r0, r0, #-2147483648
 	str	r0, [r1, #4]
-.L1735:
+.L1780:
 	adds	r6, r6, #1
 	uxth	r6, r6
-.L1734:
+.L1779:
 	adds	r3, r3, #1
 	adds	r2, r2, #2
 	uxth	r3, r3
-.L1733:
+.L1778:
 	cmp	r3, ip
-	bne	.L1736
+	bne	.L1781
 	ldr	r0, [r7, #0]
 	mov	r1, r6
-	ldr	r2, [sp, #32]
+	ldr	r2, [sp, #24]
 	mov	r8, #0
 	bl	FlashReadPages
 	movs	r3, #36
-	str	sl, [sp, #40]
+	str	sl, [sp, #32]
 	muls	r3, r6, r3
-	str	r3, [sp, #52]
-	b	.L1737
-.L1761:
+	str	r3, [sp, #40]
+	b	.L1782
+.L1806:
 	ldr	r3, [r7, #0]
 	add	sl, r3, r8
 	ldr	r6, [sl, #4]
 	ubfx	r0, r6, #10, #16
-	str	r6, [sp, #68]
+	str	r6, [sp, #60]
 	bl	P2V_plane
-	ldr	ip, [sp, #40]
-	ldr	r3, [sp, #24]
+	ldr	ip, [sp, #32]
+	ldr	r3, [sp, #20]
 	cmp	ip, r3
-	bcc	.L1738
-	bne	.L1739
-	ldr	r3, [sp, #36]
+	bcc	.L1783
+	bne	.L1784
+	ldr	r3, [sp, #28]
 	cmp	r0, r3
-	bcc	.L1738
-.L1739:
-	ldr	ip, [sp, #40]
-	ldr	r3, [sp, #20]
+	bcc	.L1783
+.L1784:
+	ldr	ip, [sp, #32]
+	ldr	r3, [sp, #12]
 	cmp	ip, r3
-	bne	.L1740
-	ldr	ip, [sp, #28]
+	bne	.L1785
+	ldr	ip, [sp, #16]
 	cmp	r0, ip
-	beq	.L1775
-.L1740:
+	beq	.L1820
+.L1785:
 	ldr	r3, [sl, #0]
 	adds	r3, r3, #1
-	beq	.L1742
+	beq	.L1787
 	ldr	r6, [sl, #12]
-	movw	lr, #61589
-	ldrh	r3, [r6, #0]
-	cmp	r3, lr
-	bne	.L1749
-.L1743:
+	movw	r3, #61589
+	ldrh	r2, [r6, #0]
+	cmp	r2, r3
+	bne	.L1794
+.L1788:
 	ldr	r5, [r6, #4]
 	adds	r3, r5, #1
-	beq	.L1744
-	ldr	sl, .L1786+28
+	beq	.L1789
+	ldr	sl, .L1831+32
 	mov	r0, r5
 	ldr	r1, [sl, #0]
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L1744
+	cbz	r0, .L1789
 	adds	r3, r5, #1
 	str	r3, [sl, #0]
-.L1744:
+.L1789:
 	ldr	sl, [r6, #8]
-	add	r1, sp, #64
+	add	r1, sp, #56
 	ldr	r3, [r6, #12]
 	movs	r2, #0
 	mov	r0, sl
-	str	r3, [sp, #60]
+	str	r3, [sp, #52]
 	bl	log2phys
-	ldr	r0, .L1786+4
+	ldr	r0, .L1831+8
 	ldr	r1, [r0, #0]
 	adds	r0, r1, #1
-	beq	.L1745
+	beq	.L1790
 	mov	r0, r5
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1745
-	ldr	r3, [sp, #60]
+	beq	.L1790
+	ldr	r3, [sp, #52]
 	adds	r1, r3, #1
-	beq	.L1746
+	beq	.L1791
 	ldr	r0, [r7, #0]
 	movs	r2, #0
 	add	r0, r0, r8
 	ldr	r1, [r0, #12]
 	str	r3, [r0, #4]
-	str	r1, [sp, #16]
+	str	r1, [sp, #8]
 	movs	r1, #1
 	bl	FlashReadPages
-	ldr	r3, [sp, #16]
+	ldr	r3, [sp, #8]
 	ldr	r3, [r3, #4]
-	str	r3, [sp, #44]
+	str	r3, [sp, #36]
 	ldr	r3, [r7, #0]
 	add	fp, r3, r8
 	ldr	r3, [r3, r8]
 	adds	r3, r3, #1
-	bne	.L1747
-	b	.L1748
-.L1746:
-	ldr	r3, [sp, #68]
-	ldr	r2, [sp, #64]
+	bne	.L1792
+	b	.L1793
+.L1791:
+	ldr	r3, [sp, #60]
+	ldr	r2, [sp, #56]
 	cmp	r2, r3
-	bne	.L1749
+	bne	.L1794
 	mov	r0, sl
-	add	r1, sp, #60
+	add	r1, sp, #52
 	movs	r2, #1
 	bl	log2phys
-.L1749:
+.L1794:
 	ldrh	r0, [r4, #0]
-	b	.L1780
-.L1747:
-	ldr	r3, [sp, #16]
+	b	.L1825
+.L1792:
+	ldr	r3, [sp, #8]
 	ldr	r6, [r3, #8]
 	cmp	r6, sl
-	bne	.L1748
-	ldr	r1, .L1786+4
+	bne	.L1793
+	ldr	r1, .L1831+8
 	ldr	r0, [r1, #0]
-	ldr	r1, [sp, #44]
+	ldr	r1, [sp, #36]
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L1748
-	ldr	r3, [sp, #64]
-	ldr	r2, [sp, #68]
-	cmp	r3, r2
-	beq	.L1753
-.L1750:
+	cbz	r0, .L1793
+	ldr	r3, [sp, #56]
 	ldr	r2, [sp, #60]
 	cmp	r3, r2
-	beq	.L1748
+	beq	.L1798
+.L1795:
+	ldr	r2, [sp, #52]
+	cmp	r3, r2
+	beq	.L1793
 	adds	r2, r3, #1
-	beq	.L1751
+	beq	.L1796
 	ldr	r2, [fp, #12]
 	mov	r0, fp
 	str	r3, [fp, #4]
 	movs	r1, #1
-	str	r2, [sp, #16]
+	str	r2, [sp, #8]
 	movs	r2, #0
 	bl	FlashReadPages
-	b	.L1752
-.L1751:
+	b	.L1797
+.L1796:
 	str	r3, [fp, #0]
-.L1752:
+.L1797:
 	ldr	r3, [r7, #0]
 	ldr	r3, [r3, r8]
 	adds	r3, r3, #1
-	beq	.L1753
-	ldr	r3, [sp, #16]
-	ldr	r1, .L1786+4
+	beq	.L1798
+	ldr	r3, [sp, #8]
+	ldr	r1, .L1831+8
 	ldr	sl, [r3, #4]
 	ldr	r0, [r1, #0]
 	mov	r1, sl
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L1753
-	ldr	r0, [sp, #44]
+	cbz	r0, .L1798
+	ldr	r0, [sp, #36]
 	mov	r1, sl
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L1748
-.L1753:
+	cbz	r0, .L1793
+.L1798:
 	mov	r0, r6
-	ldr	r1, [sp, #60]
+	ldr	r1, [sp, #52]
 	bl	FtlReUsePrevPpa
-.L1748:
+.L1793:
 	ldrh	r0, [r4, #0]
 	mov	r3, #-1
-	str	r3, [sp, #60]
+	str	r3, [sp, #52]
 	bl	decrement_vpc_count
-	b	.L1755
-.L1787:
+	b	.L1800
+.L1832:
 	.align	2
-.L1786:
+.L1831:
 	.word	.LANCHOR9
-	.word	.LANCHOR138
+	.word	.LANCHOR229
+	.word	.LANCHOR141
 	.word	.LANCHOR53
-	.word	.LANCHOR173
-	.word	.LANCHOR224
-	.word	.LANCHOR120
+	.word	.LANCHOR177
+	.word	.LANCHOR230
+	.word	.LANCHOR122
 	.word	.LANCHOR7
-	.word	.LANCHOR154
-.L1745:
-	ldr	r3, [sp, #68]
-	ldr	r2, [sp, #64]
+	.word	.LANCHOR157
+.L1790:
+	ldr	r3, [sp, #60]
+	ldr	r2, [sp, #56]
 	cmp	r2, r3
-	beq	.L1755
+	beq	.L1800
 	movs	r2, #1
 	mov	r0, sl
-	add	r1, sp, #68
+	add	r1, sp, #60
 	bl	log2phys
-	ldr	fp, [sp, #64]
+	ldr	fp, [sp, #56]
 	cmp	fp, #-1
-	beq	.L1755
-	ldr	r3, [sp, #60]
+	beq	.L1800
+	ldr	r3, [sp, #52]
 	cmp	fp, r3
-	beq	.L1755
+	beq	.L1800
 	ubfx	r0, fp, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L1788
+	ldr	r3, .L1833
 	ldrh	r3, [r3, #0]
 	cmp	r3, r0
-	beq	.L1756
-	ldr	r3, .L1788+4
+	beq	.L1801
+	ldr	r3, .L1833+4
 	ldrh	r3, [r3, #0]
 	cmp	r3, r0
-	beq	.L1756
-	ldr	r3, .L1788+8
+	beq	.L1801
+	ldr	r3, .L1833+8
 	ldrh	r3, [r3, #0]
 	cmp	r3, r0
-	bne	.L1755
-.L1756:
+	bne	.L1800
+.L1801:
 	ldr	r0, [r7, #0]
 	movs	r1, #1
 	movs	r2, #0
@@ -15898,150 +16395,160 @@ FtlRecoverySuperblock:
 	ldr	r1, [r6, #4]
 	ldr	r3, [r3, #0]
 	adds	r3, r3, #1
-	beq	.L1755
+	beq	.L1800
 	mov	r0, r5
 	bl	ftl_cmp_data_ver
-	cbnz	r0, .L1755
+	cbnz	r0, .L1800
 	mov	r0, sl
-	add	r1, sp, #64
+	add	r1, sp, #56
 	movs	r2, #1
 	bl	log2phys
-.L1755:
-	ldr	r0, [sp, #60]
+.L1800:
+	ldr	r0, [sp, #52]
 	adds	r3, r0, #1
-	beq	.L1738
+	beq	.L1783
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L1788+12
+	ldr	r3, .L1833+12
 	ldrh	r3, [r3, #0]
 	cmp	r3, r0
 	mov	r6, r0
-	bhi	.L1757
-	ldr	r1, .L1788+16
-	movw	r2, #2027
-	ldr	r0, .L1788+20
+	bhi	.L1802
+	ldr	r1, .L1833+16
+	movw	r2, #2177
+	ldr	r0, .L1833+20
 	bl	printf
-	ldr	r0, .L1788+24
-	ldr	r1, .L1788+28
+	ldr	r0, .L1833+24
+	ldr	r1, .L1833+28
 	bl	printf
-.L1757:
-	ldr	r3, .L1788+32
+.L1802:
+	ldr	r3, .L1833+32
 	ldr	r3, [r3, #0]
 	ldrh	r3, [r3, r6, lsl #1]
-	cbz	r3, .L1758
+	cbz	r3, .L1803
 	mov	r0, r6
-.L1780:
+.L1825:
 	bl	decrement_vpc_count
-	b	.L1738
-.L1758:
+	b	.L1783
+.L1803:
 	mov	r1, r6
-	ldr	r0, .L1788+36
+	ldr	r0, .L1833+36
 	bl	printf
-	b	.L1738
-.L1742:
-	ldr	r2, .L1788+40
-	ldr	r3, [r2, #0]
+	b	.L1783
+.L1787:
+	ldrh	r3, [r4, #0]
+	mov	r1, r6
+	ldr	r2, .L1833+40
+	ldr	r0, .L1833+44
+	strh	r3, [r2, #0]	@ movhi
+	mov	r2, r5
+	bl	printf
+	ldr	r0, .L1833+48
+	ldr	r3, [r0, #0]
 	cmp	r3, #31
-	bhi	.L1759
-	ldr	r0, .L1788+44
-	str	r6, [r0, r3, lsl #2]
+	bhi	.L1804
+	ldr	r2, [sp, #60]
+	ldr	r1, .L1833+52
+	str	r2, [r1, r3, lsl #2]
 	adds	r3, r3, #1
-	str	r3, [r2, #0]
-.L1759:
+	str	r3, [r0, #0]
+.L1804:
 	ldrh	r0, [r4, #0]
 	bl	decrement_vpc_count
-	ldr	r1, .L1788+48
-	ldr	r3, [r1, #0]
-	adds	r0, r3, #1
-	bne	.L1760
-	str	r5, [r1, #0]
-	b	.L1738
-.L1760:
+	ldr	r2, .L1833+56
+	ldr	r3, [r2, #0]
+	adds	r1, r3, #1
+	bne	.L1805
+	str	r5, [r2, #0]
+	b	.L1783
+.L1805:
 	cmp	r3, r5
 	itt	hi
-	ldrhi	r2, .L1788+48
-	strhi	r5, [r2, #0]
-.L1738:
+	ldrhi	r3, .L1833+56
+	strhi	r5, [r3, #0]
+.L1783:
 	add	r8, r8, #36
-.L1737:
-	ldr	r3, [sp, #52]
-	cmp	r8, r3
-	bne	.L1761
-	ldr	sl, [sp, #40]
+.L1782:
+	ldr	ip, [sp, #40]
+	cmp	r8, ip
+	bne	.L1806
+	ldr	sl, [sp, #32]
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	add	sl, sl, #1
 	cmp	r3, #1
 	uxth	sl, sl
-	bne	.L1762
-	ldr	r3, .L1788+52
+	bne	.L1807
+	ldr	r3, .L1833+60
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1762
-	ldr	r3, .L1788+56
+	cbz	r3, .L1807
+	ldr	r3, .L1833+64
 	ldrh	r3, [r3, #0]
 	cmp	r3, sl
-	bne	.L1762
-	ldr	r8, [sp, #20]
-	cmp	r8, sl
-	beq	.L1775
-.L1762:
-	ldr	r3, .L1788+60
+	bne	.L1807
+	ldr	r3, [sp, #12]
+	cmp	r3, sl
+	beq	.L1820
+.L1807:
+	ldr	r3, .L1833+68
 	ldrh	r3, [r3, #0]
 	cmp	sl, r3
-	bne	.L1732
-	ldr	r2, .L1788+64
+	bne	.L1777
+	ldr	r2, .L1833+72
 	movs	r3, #0
 	strh	sl, [r4, #2]	@ movhi
 	strh	r3, [r4, #4]	@ movhi
 	ldrh	r1, [r2, #0]
 	movw	r2, #65535
-	ldr	r0, [sp, #48]
-	b	.L1763
-.L1765:
+	ldr	r0, [sp, #44]
+	b	.L1808
+.L1810:
 	adds	r0, r0, #2
 	ldrh	r5, [r0, #14]
 	cmp	r5, r2
-	beq	.L1764
-.L1781:
+	beq	.L1809
+.L1826:
 	strb	r3, [r4, #6]
-	b	.L1692
-.L1764:
+	b	.L1737
+.L1809:
 	adds	r3, r3, #1
 	uxth	r3, r3
-.L1763:
+.L1808:
 	cmp	r3, r1
-	bne	.L1765
-	b	.L1692
-.L1775:
-.L1741:
-	ldr	r6, [sp, #20]
+	bne	.L1810
+	b	.L1737
+.L1820:
+.L1786:
+	ldr	r6, [sp, #12]
 	mov	r0, r4
-	ldr	r3, [sp, #28]
+	ldr	r5, [sp, #16]
 	mov	r1, r6
-	mov	r2, r3
+	mov	r2, r5
 	strh	r6, [r4, #2]	@ movhi
-	strb	r3, [r4, #6]
-.L1782:
+	strb	r5, [r4, #6]
+.L1827:
 	bl	ftl_sb_update_avl_pages
-.L1692:
+.L1737:
 	movs	r0, #0
-	add	sp, sp, #72
+	add	sp, sp, #64
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1789:
+.L1834:
 	.align	2
-.L1788:
-	.word	.LANCHOR107
-	.word	.LANCHOR108
+.L1833:
 	.word	.LANCHOR109
+	.word	.LANCHOR110
+	.word	.LANCHOR111
 	.word	.LANCHOR55
-	.word	.LANCHOR223
+	.word	.LANCHOR228
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
-	.word	.LANCHOR99
-	.word	.LC33
-	.word	.LANCHOR225
-	.word	.LANCHOR226
-	.word	.LANCHOR138
+	.word	.LANCHOR101
+	.word	.LC42
+	.word	.LANCHOR229
+	.word	.LC43
+	.word	.LANCHOR231
+	.word	.LANCHOR232
+	.word	.LANCHOR141
 	.word	.LANCHOR7
 	.word	.LANCHOR69
 	.word	.LANCHOR68
@@ -16058,13 +16565,13 @@ FtlPowerLostRecovery:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #0
-	ldr	r3, .L1791
-	ldr	r5, .L1791+4
+	ldr	r3, .L1836
+	ldr	r5, .L1836+4
 	str	r4, [r3, #0]
 	mov	r0, r5
 	bl	FtlRecoverySuperblock
 	mov	r0, r5
-	ldr	r5, .L1791+8
+	ldr	r5, .L1836+8
 	bl	FtlSlcSuperblockCheck
 	mov	r0, r5
 	bl	FtlRecoverySuperblock
@@ -16075,12 +16582,12 @@ FtlPowerLostRecovery:
 	bl	decrement_vpc_count
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L1792:
+.L1837:
 	.align	2
-.L1791:
-	.word	.LANCHOR225
-	.word	.LANCHOR107
-	.word	.LANCHOR108
+.L1836:
+	.word	.LANCHOR231
+	.word	.LANCHOR109
+	.word	.LANCHOR110
 	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
 	.section	.text.FtlSysBlkInit,"ax",%progbits
 	.align	1
@@ -16091,23 +16598,25 @@ FtlPowerLostRecovery:
 FtlSysBlkInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1803
+	ldr	r3, .L1848
 	movs	r2, #0
-	push	{r4, lr}
+	push	{r4, r5, r6, lr}
+	movw	r4, #65535
 	strh	r2, [r3, #0]	@ movhi
-	ldr	r3, .L1803+4
+	ldr	r3, .L1848+4
+	strh	r4, [r3, #0]	@ movhi
+	ldr	r3, .L1848+8
 	ldrh	r0, [r3, #0]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlScanSysBlk
-	ldr	r3, .L1803+8
-	ldrh	r2, [r3, #0]
-	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L1799
+	ldr	r3, .L1848+12
+	ldrh	r3, [r3, #0]
+	cmp	r3, r4
+	beq	.L1844
 	bl	FtlLoadSysInfo
 	mov	r4, r0
 	cmp	r0, #0
-	bne	.L1800
+	bne	.L1845
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -16117,105 +16626,94 @@ FtlSysBlkInit:
 	bl	FtlPowerLostRecovery
 	movs	r0, #1
 	bl	FtlUpdateVaildLpn
-	ldr	r3, .L1803+12
+	ldr	r3, .L1848+16
 	ldrh	r1, [r3, #0]
-	ldr	r3, .L1803+16
+	ldr	r3, .L1848+20
 	ldr	r2, [r3, #0]
 	mov	r3, r4
-	b	.L1795
-.L1797:
+	b	.L1840
+.L1842:
 	adds	r0, r2, r4
 	adds	r4, r4, #12
 	ldr	r0, [r0, #4]
 	cmp	r0, #0
-	blt	.L1796
+	blt	.L1841
 	adds	r3, r3, #1
-.L1795:
+.L1840:
 	cmp	r3, r1
-	blt	.L1797
-	b	.L1802
-.L1796:
-	ldr	r0, .L1803+20
+	blt	.L1842
+	b	.L1847
+.L1841:
+	ldr	r5, .L1848+24
+	movs	r6, #0
+	ldr	r4, .L1848+28
+	mov	r0, r5
 	bl	FtlSuperblockPowerLostFix
-	ldr	r0, .L1803+24
+	mov	r0, r4
 	bl	FtlSuperblockPowerLostFix
-	ldr	r0, .L1803+28
+	ldr	r3, .L1848+32
+	ldrh	r2, [r5, #0]
+	ldrh	r1, [r5, #4]
+	ldr	r3, [r3, #0]
+	ldrh	r0, [r3, r2, lsl #1]
+	subs	r1, r0, r1
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	ldr	r2, .L1848+36
+	ldrh	r0, [r4, #4]
+	strb	r6, [r5, #6]
+	ldrh	r1, [r2, #0]
+	strh	r6, [r5, #4]	@ movhi
+	strh	r1, [r5, #2]	@ movhi
+	ldrh	r1, [r4, #0]
+	ldrh	r5, [r3, r1, lsl #1]
+	subs	r0, r5, r0
+	strh	r0, [r3, r1, lsl #1]	@ movhi
+	ldrh	r3, [r2, #0]
+	ldr	r0, .L1848+40
+	strb	r6, [r4, #6]
+	strh	r3, [r4, #2]	@ movhi
+	strh	r6, [r4, #4]	@ movhi
 	bl	FtlMapBlkWriteDumpData
-	ldr	r0, .L1803+32
+	ldr	r0, .L1848+44
 	bl	FtlMapBlkWriteDumpData
-	ldr	r3, .L1803+36
+	ldr	r3, .L1848+48
 	ldrh	r2, [r3, #30]
 	adds	r2, r2, #1
 	strh	r2, [r3, #30]	@ movhi
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
 	bl	FtlVpcTblFlush
-	movs	r0, #0
-	pop	{r4, pc}
-.L1799:
+	mov	r0, r6
+	pop	{r4, r5, r6, pc}
+.L1844:
 	mov	r0, #-1
-	pop	{r4, pc}
-.L1800:
+	pop	{r4, r5, r6, pc}
+.L1845:
 	mov	r0, #-1
-	pop	{r4, pc}
-.L1802:
-	ldr	r3, .L1803
+	pop	{r4, r5, r6, pc}
+.L1847:
+	ldr	r3, .L1848
 	ldrh	r0, [r3, #0]
 	cmp	r0, #0
-	bne	.L1796
-	pop	{r4, pc}
-.L1804:
+	bne	.L1841
+	pop	{r4, r5, r6, pc}
+.L1849:
 	.align	2
-.L1803:
-	.word	.LANCHOR224
+.L1848:
+	.word	.LANCHOR230
+	.word	.LANCHOR229
 	.word	.LANCHOR54
-	.word	.LANCHOR191
+	.word	.LANCHOR196
 	.word	.LANCHOR83
-	.word	.LANCHOR112
-	.word	.LANCHOR107
-	.word	.LANCHOR108
-	.word	.LANCHOR120
-	.word	.LANCHOR213
-	.word	.LANCHOR140
+	.word	.LANCHOR114
+	.word	.LANCHOR109
+	.word	.LANCHOR110
+	.word	.LANCHOR101
+	.word	.LANCHOR68
+	.word	.LANCHOR122
+	.word	.LANCHOR215
+	.word	.LANCHOR143
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
-	.section	.text.FtlInit,"ax",%progbits
-	.align	1
-	.global	FtlInit
-	.thumb
-	.thumb_func
-	.type	FtlInit, %function
-FtlInit:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, lr}
-	mov	r3, #-1
-	ldr	r4, .L1807
-	movs	r2, #0
-	str	r3, [r4, #0]
-	ldr	r3, .L1807+4
-	str	r2, [r3, #0]
-	bl	FtlConstantsInit
-	bl	FtlMemInit
-	bl	FtlVariablesInit
-	ldr	r3, .L1807+8
-	ldrh	r0, [r3, #0]
-	bl	FtlFreeSysBlkQueueInit
-	bl	FtlLoadBbt
-	cbnz	r0, .L1806
-	bl	FtlSysBlkInit
-	cbnz	r0, .L1806
-	movs	r3, #1
-	str	r3, [r4, #0]
-.L1806:
-	movs	r0, #0
-	pop	{r4, pc}
-.L1808:
-	.align	2
-.L1807:
-	.word	.LANCHOR222
-	.word	.LANCHOR227
-	.word	.LANCHOR54
-	.size	FtlInit, .-FtlInit
 	.section	.text.rk_ftl_garbage_collect,"ax",%progbits
 	.align	1
 	.global	rk_ftl_garbage_collect
@@ -16225,201 +16723,205 @@ FtlInit:
 rk_ftl_garbage_collect:
 	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1871
+	ldr	r3, .L1912
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	sub	sp, sp, #32
+	ldr	r2, [r3, #0]
+	cmp	r2, #0
+	bne	.L1901
+	ldr	r3, .L1912+4
 	ldr	r3, [r3, #0]
 	cmp	r3, #0
-	bne	.L1861
-	ldr	r2, .L1871+4
+	bne	.L1902
+	ldr	r2, .L1912+8
 	ldrh	r2, [r2, #0]
 	cmp	r2, #47
-	bls	.L1862
-	ldr	r3, .L1871+8
+	bls	.L1903
+	ldr	r3, .L1912+12
 	movw	r5, #65535
 	ldrh	r4, [r3, #0]
 	cmp	r4, r5
-	beq	.L1811
-	ldr	r1, .L1871+12
+	beq	.L1852
+	ldr	r1, .L1912+16
 	ldrh	r2, [r1, #0]
 	cmp	r2, r5
 	itt	eq
 	strheq	r4, [r1, #0]	@ movhi
 	strheq	r2, [r3, #0]	@ movhi
-.L1811:
+.L1852:
 	cmp	r0, #0
-	bne	.L1863
-	ldr	r3, .L1871+16
+	bne	.L1904
+	ldr	r3, .L1912+20
 	ldrh	r3, [r3, #0]
 	cmp	r3, #24
-	bhi	.L1864
-	ldr	r2, .L1871+20
+	bhi	.L1905
+	ldr	r2, .L1912+24
 	cmp	r3, #16
 	ldrh	r4, [r2, #0]
-	bls	.L1814
+	bls	.L1855
 	lsrs	r4, r4, #5
-	b	.L1813
-.L1814:
+	b	.L1854
+.L1855:
 	cmp	r3, #12
-	bls	.L1815
+	bls	.L1856
 	lsrs	r4, r4, #4
-	b	.L1813
-.L1815:
+	b	.L1854
+.L1856:
 	cmp	r3, #8
-	bls	.L1813
+	bls	.L1854
 	lsrs	r4, r4, #2
-	b	.L1813
-.L1864:
+	b	.L1854
+.L1905:
 	movs	r4, #1
-.L1813:
-	ldr	r2, .L1871+24
+.L1854:
+	ldr	r2, .L1912+28
 	ldrh	r1, [r2, #0]
 	cmp	r1, r3
 	mov	r1, r2
-	bcs	.L1817
-	ldr	r3, .L1871+28
+	bcs	.L1858
+	ldr	r3, .L1912+32
 	movw	r0, #65535
 	ldrh	r3, [r3, #0]
 	cmp	r3, r0
-	bne	.L1818
-	ldr	r0, .L1871+12
+	bne	.L1859
+	ldr	r0, .L1912+16
 	ldrh	r0, [r0, #0]
 	cmp	r0, r3
-	bne	.L1818
-	ldr	r3, .L1871+32
+	bne	.L1859
+	ldr	r3, .L1912+36
 	ldrh	r0, [r3, #0]
-	cbnz	r0, .L1819
-	ldr	r3, .L1871+36
+	cbnz	r0, .L1860
+	ldr	r3, .L1912+40
 	movs	r1, #3
 	ldr	r3, [r3, #0]
 	muls	r1, r3, r1
-	ldr	r3, .L1871+40
+	ldr	r3, .L1912+44
 	ldr	r3, [r3, #0]
 	cmp	r3, r1, lsr #2
-	bcs	.L1820
-.L1819:
-	ldr	r3, .L1871+44
+	bcs	.L1861
+.L1860:
+	ldr	r3, .L1912+48
 	movs	r2, #3
 	ldrh	r3, [r3, #0]
 	muls	r2, r3, r2
-	ldr	r3, .L1871+24
+	ldr	r3, .L1912+28
 	asrs	r2, r2, #2
 	strh	r2, [r3, #0]	@ movhi
-	b	.L1821
-.L1820:
+	b	.L1862
+.L1861:
 	movs	r3, #18
 	strh	r3, [r2, #0]	@ movhi
-.L1821:
-	ldr	r3, .L1871+48
+.L1862:
+	ldr	r3, .L1912+52
 	movs	r2, #0
 	str	r2, [r3, #0]
-	b	.L1810
-.L1818:
-	ldr	r3, .L1871+44
+	b	.L1851
+.L1859:
+	ldr	r3, .L1912+48
 	movs	r2, #3
 	ldrh	r3, [r3, #0]
 	muls	r3, r2, r3
 	asrs	r3, r3, #2
 	strh	r3, [r1, #0]	@ movhi
-.L1817:
-	ldr	r3, .L1871+52
+.L1858:
+	ldr	r3, .L1912+56
 	ldrh	r3, [r3, #0]
-	cbz	r3, .L1812
+	cbz	r3, .L1853
 	adds	r4, r4, #32
 	uxth	r4, r4
-	b	.L1812
-.L1863:
+	b	.L1853
+.L1904:
 	movs	r4, #1
-.L1812:
-	ldr	r3, .L1871+56
+.L1853:
+	ldr	r3, .L1912+60
 	ldrh	r2, [r3, #0]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1823
-	ldr	r3, .L1871+12
+	bne	.L1864
+	ldr	r3, .L1912+16
 	ldrh	r1, [r3, #0]
 	cmp	r1, r2
-	beq	.L1824
-	ldr	r0, .L1871+60
+	beq	.L1865
+	ldr	r0, .L1912+64
 	ldr	r0, [r0, #0]
 	ldrh	r1, [r0, r1, lsl #1]
-	cbnz	r1, .L1825
+	cbnz	r1, .L1866
 	strh	r2, [r3, #0]	@ movhi
-.L1825:
+.L1866:
 	ldrh	r1, [r3, #0]
-	ldr	r2, .L1871+56
+	ldr	r2, .L1912+60
 	strh	r1, [r2, #0]	@ movhi
 	movw	r2, #65535
 	strh	r2, [r3, #0]	@ movhi
-.L1824:
-	ldr	r5, .L1871+56
+.L1865:
+	ldr	r5, .L1912+60
 	movw	r6, #65535
 	movs	r3, #0
 	ldrh	r0, [r5, #0]
 	strb	r3, [r5, #8]
 	cmp	r0, r6
-	beq	.L1823
+	beq	.L1864
 	bl	IsBlkInGcList
-	cbz	r0, .L1826
+	cbz	r0, .L1867
 	strh	r6, [r5, #0]	@ movhi
-.L1826:
-	ldr	r3, .L1871+64
-	ldr	r6, .L1871+56
+.L1867:
+	ldr	r3, .L1912+68
+	ldr	r6, .L1912+60
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1827
+	cbz	r3, .L1868
 	ldrh	r0, [r6, #0]
 	bl	ftl_get_blk_mode
 	strb	r0, [r6, #8]
-.L1827:
+.L1868:
 	ldrh	r2, [r6, #0]
 	movw	r3, #65535
-	ldr	r5, .L1871+56
+	ldr	r5, .L1912+60
 	cmp	r2, r3
-	beq	.L1823
+	beq	.L1864
 	mov	r0, r5
 	bl	make_superblock
-	ldr	r2, .L1871+68
+	ldr	r2, .L1912+72
 	movs	r3, #0
 	strh	r3, [r5, #2]	@ movhi
 	strb	r3, [r5, #6]
 	strh	r3, [r2, #0]	@ movhi
-	ldr	r3, .L1871+60
+	ldr	r3, .L1912+64
 	ldrh	r2, [r5, #0]
 	ldr	r3, [r3, #0]
 	ldrh	r2, [r3, r2, lsl #1]
-	ldr	r3, .L1871+72
+	ldr	r3, .L1912+76
 	strh	r2, [r3, #0]	@ movhi
-.L1823:
-	ldr	r2, .L1871+56
-	ldr	r1, .L1871+76
+.L1864:
+	ldr	r2, .L1912+60
+	ldr	r1, .L1912+80
 	ldrh	r3, [r2, #0]
 	ldrh	r1, [r1, #0]
 	cmp	r1, r3
-	beq	.L1828
-	ldr	r1, .L1871+80
+	beq	.L1869
+	ldr	r1, .L1912+84
 	ldrh	r1, [r1, #0]
 	cmp	r1, r3
-	bne	.L1865
-.L1829:
-.L1828:
+	bne	.L1906
+.L1870:
+.L1869:
 	movw	r3, #65535
 	strh	r3, [r2, #0]	@ movhi
-	b	.L1870
-.L1865:
-	ldr	r6, .L1871+84
-	ldr	r7, .L1871+88
-.L1867:
-	ldr	r3, .L1871+56
+	b	.L1911
+.L1906:
+	ldr	r6, .L1912+88
+	ldr	r7, .L1912+92
+.L1908:
+	ldr	r3, .L1912+60
 	movw	r2, #65535
 	ldrh	r8, [r3, #0]
 	cmp	r8, r2
-	bne	.L1831
-	ldr	r2, .L1871+48
+	bne	.L1872
+	ldr	r2, .L1912+52
 	mov	sl, r3
-	ldr	fp, .L1871+60
+	ldr	fp, .L1912+64
 	movs	r1, #0
 	str	r1, [r2, #0]
-.L1866:
+.L1907:
 	ldrh	r1, [r6, #0]
 	mov	r0, r1
 	str	r1, [sp, #8]
@@ -16427,173 +16929,175 @@ rk_ftl_garbage_collect:
 	uxth	r5, r0
 	strh	r5, [sl, #0]	@ movhi
 	cmp	r5, r8
-	bne	.L1833
-	ldr	r3, .L1871+84
+	bne	.L1874
+	ldr	r3, .L1912+88
 	movs	r2, #0
 	movs	r0, #8
 	strh	r2, [r3, #0]	@ movhi
-	b	.L1810
-.L1833:
+	b	.L1851
+.L1874:
 	mov	r0, r5
 	bl	IsBlkInGcList
 	ldr	r2, [sp, #8]
 	adds	r3, r2, #1
-	cbnz	r0, .L1868
-.L1834:
-	ldr	r1, .L1871+20
+	cbnz	r0, .L1909
+.L1875:
+	ldr	r1, .L1912+24
 	uxth	r0, r3
 	ldr	r3, [fp, #0]
 	strh	r0, [r6, #0]	@ movhi
 	ldrh	ip, [r1, #0]
-	ldr	r1, .L1871+92
+	ldr	r1, .L1912+96
 	ldrh	r2, [r3, r5, lsl #1]
 	ldrh	r1, [r1, #0]
 	mul	r1, r1, ip
 	cmp	r2, r1, asr #1
-	bgt	.L1836
+	bgt	.L1877
 	cmp	r0, #48
-	bls	.L1837
+	bls	.L1878
 	cmp	r2, #8
-	bls	.L1837
-	ldr	r2, .L1871+96
+	bls	.L1878
+	ldr	r2, .L1912+100
 	ldrh	r2, [r2, #0]
 	cmp	r2, #35
-	bhi	.L1837
-.L1836:
+	bhi	.L1878
+.L1877:
 	movs	r2, #0
 	strh	r2, [r6, #0]	@ movhi
-.L1837:
+.L1878:
 	ldrh	r2, [r3, r5, lsl #1]
-	ldr	r3, .L1871+56
+	ldr	r3, .L1912+60
 	cmp	r2, r1
-	blt	.L1838
+	blt	.L1879
 	movw	r2, #65535
 	strh	r2, [r3, #0]	@ movhi
-	ldr	r3, .L1871+84
+	ldr	r3, .L1912+88
 	movs	r2, #0
 	strh	r2, [r3, #0]	@ movhi
-	b	.L1870
-.L1838:
-	cbnz	r2, .L1839
+	b	.L1911
+.L1879:
+	cmp	r2, #0
+	bne	.L1880
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	ldrh	r3, [r6, #0]
 	adds	r3, r3, #1
-.L1868:
+.L1909:
 	strh	r3, [r6, #0]	@ movhi
-	b	.L1866
-.L1872:
+	b	.L1907
+.L1913:
 	.align	2
-.L1871:
-	.word	.LANCHOR165
-	.word	.LANCHOR101
-	.word	.LANCHOR147
-	.word	.LANCHOR146
-	.word	.LANCHOR104
+.L1912:
+	.word	.LANCHOR94
+	.word	.LANCHOR168
+	.word	.LANCHOR103
+	.word	.LANCHOR150
+	.word	.LANCHOR149
+	.word	.LANCHOR106
 	.word	.LANCHOR68
-	.word	.LANCHOR170
-	.word	.LANCHOR109
-	.word	.LANCHOR228
-	.word	.LANCHOR87
-	.word	.LANCHOR116
-	.word	.LANCHOR200
-	.word	.LANCHOR166
-	.word	.LANCHOR148
+	.word	.LANCHOR173
+	.word	.LANCHOR111
+	.word	.LANCHOR233
+	.word	.LANCHOR88
+	.word	.LANCHOR118
 	.word	.LANCHOR201
-	.word	.LANCHOR99
+	.word	.LANCHOR169
+	.word	.LANCHOR151
+	.word	.LANCHOR202
+	.word	.LANCHOR101
 	.word	.LANCHOR7
-	.word	.LANCHOR229
-	.word	.LANCHOR230
-	.word	.LANCHOR107
-	.word	.LANCHOR108
-	.word	.LANCHOR172
-	.word	.LANCHOR132
+	.word	.LANCHOR234
+	.word	.LANCHOR235
+	.word	.LANCHOR109
+	.word	.LANCHOR110
+	.word	.LANCHOR175
+	.word	.LANCHOR135
 	.word	.LANCHOR53
-	.word	.LANCHOR142
-.L1839:
+	.word	.LANCHOR145
+.L1880:
 	movs	r2, #0
 	strb	r2, [r3, #8]
-	ldr	r2, .L1873
+	ldr	r2, .L1914
 	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	cbz	r2, .L1840
+	cbz	r2, .L1881
 	mov	r0, r5
 	str	r3, [sp, #4]
 	bl	ftl_get_blk_mode
 	ldr	r3, [sp, #4]
 	strb	r0, [r3, #8]
-.L1840:
-	ldr	r5, .L1873+4
-	ldr	r3, .L1873+8
+.L1881:
+	ldr	r5, .L1914+4
+	ldr	r3, .L1914+8
 	ldrh	r2, [r5, #0]
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bne	.L1841
-	ldr	r1, .L1873+12
-	mov	r2, #772
-	ldr	r0, .L1873+16
+	bne	.L1882
+	ldr	r1, .L1914+12
+	movw	r2, #835
+	ldr	r0, .L1914+16
 	bl	printf
-	ldr	r0, .L1873+20
-	ldr	r1, .L1873+24
+	ldr	r0, .L1914+20
+	ldr	r1, .L1914+24
 	bl	printf
-.L1841:
-	ldr	r3, .L1873+28
+.L1882:
+	ldr	r3, .L1914+28
 	ldrh	r2, [r5, #0]
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bne	.L1842
-	ldr	r1, .L1873+12
-	movw	r2, #773
-	ldr	r0, .L1873+16
+	bne	.L1883
+	ldr	r1, .L1914+12
+	mov	r2, #836
+	ldr	r0, .L1914+16
 	bl	printf
-	ldr	r0, .L1873+20
-	ldr	r1, .L1873+24
+	ldr	r0, .L1914+20
+	ldr	r1, .L1914+24
 	bl	printf
-.L1842:
-	ldr	r5, .L1873+4
-	ldr	r3, .L1873+32
+.L1883:
+	ldr	r5, .L1914+4
+	ldr	r3, .L1914+32
 	ldrh	r2, [r5, #0]
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bne	.L1843
-	ldr	r1, .L1873+12
-	movw	r2, #774
-	ldr	r0, .L1873+16
+	bne	.L1884
+	ldr	r1, .L1914+12
+	movw	r2, #837
+	ldr	r0, .L1914+16
 	bl	printf
-	ldr	r0, .L1873+20
-	ldr	r1, .L1873+24
+	ldr	r0, .L1914+20
+	ldr	r1, .L1914+24
 	bl	printf
-.L1843:
-	ldr	r0, .L1873+4
+.L1884:
+	ldr	r0, .L1914+4
 	bl	make_superblock
-	ldr	r1, .L1873+36
+	ldr	r1, .L1914+36
 	movs	r3, #0
 	ldrh	r0, [r5, #0]
 	strh	r3, [r1, #0]	@ movhi
-	ldr	r1, .L1873+40
+	ldr	r1, .L1914+40
 	ldr	r1, [r1, #0]
 	ldrh	r0, [r1, r0, lsl #1]
-	ldr	r1, .L1873+44
+	ldr	r1, .L1914+44
 	strh	r3, [r5, #2]	@ movhi
 	strb	r3, [r5, #6]
 	strh	r0, [r1, #0]	@ movhi
-.L1831:
-	ldr	r3, .L1873+48
+.L1872:
+	ldr	r3, .L1914+48
 	movs	r2, #1
 	str	r2, [r3, #0]
-	ldr	r3, .L1873+52
+	ldr	r3, .L1914+52
 	ldrh	r3, [r3, #0]
 	str	r3, [sp, #8]
-	ldr	r3, .L1873
+	ldr	r3, .L1914
 	ldrb	r2, [r3, #0]	@ zero_extendqisi2
-	ldr	r3, .L1873+4
-	cbz	r2, .L1844
+	ldr	r3, .L1914+4
+	cbz	r2, .L1885
 	ldrb	r2, [r3, #8]	@ zero_extendqisi2
 	cmp	r2, #1
-	bne	.L1844
-	ldr	r2, .L1873+56
+	bne	.L1885
+	ldr	r2, .L1914+56
 	ldrh	r2, [r2, #0]
 	str	r2, [sp, #8]
-.L1844:
+.L1885:
 	ldrh	r3, [r3, #2]
 	ldr	r8, [sp, #8]
 	adds	r2, r3, r4
@@ -16604,24 +17108,24 @@ rk_ftl_garbage_collect:
 	movs	r3, #0
 	str	r4, [sp, #20]
 	str	r3, [sp, #12]
-	b	.L1846
-.L1848:
+	b	.L1887
+.L1889:
 	ldrh	r1, [r2, #2]!
 	movw	r8, #65535
 	cmp	r1, r8
-	beq	.L1847
+	beq	.L1888
 	mla	r8, r0, r5, lr
 	adds	r5, r5, #1
 	orr	r1, r4, r1, lsl #10
 	uxth	r5, r5
 	str	r1, [r8, #4]
-.L1847:
+.L1888:
 	adds	r3, r3, #1
 	uxth	r3, r3
-.L1855:
+.L1896:
 	cmp	r3, ip
-	bne	.L1848
-	ldr	r3, .L1873+4
+	bne	.L1889
+	ldr	r3, .L1914+4
 	mov	r1, r5
 	ldr	r0, [r7, #0]
 	movs	r4, #0
@@ -16629,29 +17133,29 @@ rk_ftl_garbage_collect:
 	ldrb	r2, [r3, #8]	@ zero_extendqisi2
 	bl	FlashReadPages
 	str	r4, [sp, #16]
-	b	.L1849
-.L1853:
+	b	.L1890
+.L1894:
 	ldr	r3, [r7, #0]
 	adds	r2, r3, r4
 	ldr	r3, [r3, r4]
 	ldr	r5, [r2, #12]
 	adds	r3, r3, #1
-	beq	.L1850
+	beq	.L1891
 	ldrh	r3, [r5, #0]
 	movw	r8, #61589
 	cmp	r3, r8
-	bne	.L1850
+	bne	.L1891
 	ldr	r8, [r5, #8]
 	cmp	r8, #-1
-	bne	.L1851
-	ldr	r1, .L1873+12
-	mov	r2, #812
-	ldr	r0, .L1873+16
+	bne	.L1892
+	ldr	r1, .L1914+12
+	mov	r2, #876
+	ldr	r0, .L1914+16
 	bl	printf
-	ldr	r0, .L1873+20
-	ldr	r1, .L1873+24
+	ldr	r0, .L1914+20
+	ldr	r1, .L1914+24
 	bl	printf
-.L1851:
+.L1892:
 	movs	r2, #0
 	add	r1, sp, #28
 	mov	r0, r8
@@ -16662,30 +17166,30 @@ rk_ftl_garbage_collect:
 	bic	r1, r1, #-2147483648
 	ldr	r3, [r2, #4]
 	cmp	r1, r3
-	bne	.L1850
-	ldr	r0, .L1873+36
+	bne	.L1891
+	ldr	r0, .L1914+36
 	mov	fp, #36
-	ldr	r8, .L1873+72
+	ldr	r8, .L1914+72
 	ldr	r2, [r2, #16]
 	ldrh	r3, [r0, #0]
 	ldr	r1, [r8, #0]
 	adds	r3, r3, #1
 	strh	r3, [r0, #0]	@ movhi
-	ldr	r0, .L1873+60
+	ldr	r0, .L1914+60
 	ldr	r3, [r0, #0]
 	mla	r3, fp, r1, r3
 	str	r2, [r3, #16]
 	str	r3, [sp, #4]
 	bl	Ftl_get_new_temp_ppa
 	ldr	r3, [sp, #4]
-	ldr	r1, .L1873+60
+	ldr	r1, .L1914+60
 	ldr	r2, [r1, #0]
 	str	r0, [r3, #4]
 	ldr	r3, [r8, #0]
 	ldr	r0, [r7, #0]
 	mla	r2, fp, r3, r2
 	adds	r0, r0, r4
-	ldr	fp, .L1873+32
+	ldr	fp, .L1914+32
 	adds	r3, r3, #1
 	ldr	r1, [r0, #8]
 	str	r1, [r2, #8]
@@ -16696,45 +17200,45 @@ rk_ftl_garbage_collect:
 	str	r2, [r5, #12]
 	ldrh	r2, [fp, #0]
 	strh	r2, [r5, #2]	@ movhi
-	ldr	r2, .L1873+64
+	ldr	r2, .L1914+64
 	str	r3, [r8, #0]
 	ldr	r2, [r2, #0]
 	str	r2, [r5, #4]
 	bl	FtlGcBufAlloc
-	ldr	r3, .L1873
+	ldr	r3, .L1914
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbnz	r3, .L1852
+	cbnz	r3, .L1893
 	ldrb	r3, [fp, #7]	@ zero_extendqisi2
 	ldr	r2, [r8, #0]
 	cmp	r2, r3
-	beq	.L1852
+	beq	.L1893
 	ldrh	r3, [fp, #4]
-	cbnz	r3, .L1850
-.L1852:
+	cbnz	r3, .L1891
+.L1893:
 	bl	Ftl_gc_temp_data_write_back
 	cmp	r0, #0
-	bne	.L1869
-.L1850:
+	bne	.L1910
+.L1891:
 	ldr	r8, [sp, #16]
 	adds	r4, r4, #36
 	add	r3, r8, #1
 	uxth	r3, r3
 	str	r3, [sp, #16]
-.L1849:
+.L1890:
 	ldr	r3, [sp, #16]
 	cmp	r3, sl
-	bne	.L1853
+	bne	.L1894
 	ldr	r8, [sp, #12]
 	add	r8, r8, #1
 	str	r8, [sp, #12]
-.L1846:
+.L1887:
 	ldr	r8, [sp, #12]
-	ldr	r2, .L1873+4
+	ldr	r2, .L1914+4
 	uxth	r3, r8
 	ldr	r8, [sp, #20]
 	cmp	r3, r8
-	bcs	.L1854
-	ldr	r3, .L1873+68
+	bcs	.L1895
+	ldr	r3, .L1914+68
 	movs	r5, #0
 	ldrh	r4, [r2, #2]
 	movs	r0, #36
@@ -16744,8 +17248,8 @@ rk_ftl_garbage_collect:
 	ldr	r3, [sp, #12]
 	adds	r4, r4, r3
 	mov	r3, r5
-	b	.L1855
-.L1854:
+	b	.L1896
+.L1895:
 	ldrh	r3, [r2, #2]
 	ldr	r4, [sp, #20]
 	ldr	r8, [sp, #8]
@@ -16753,102 +17257,287 @@ rk_ftl_garbage_collect:
 	uxth	r4, r4
 	strh	r4, [r2, #2]	@ movhi
 	cmp	r4, r8
-	bcs	.L1856
-	ldr	r3, .L1873+36
-	ldrh	r2, [r3, #0]
-	ldr	r3, .L1873+44
-	ldrh	r3, [r3, #0]
-	cmp	r2, r3
-	bne	.L1857
-.L1856:
-	ldr	r3, .L1873+72
+	bcc	.L1897
+	ldr	r3, .L1914+72
 	ldr	r3, [r3, #0]
-	cbz	r3, .L1858
+	cbz	r3, .L1898
 	bl	Ftl_gc_temp_data_write_back
-	cbz	r0, .L1858
-.L1869:
-	ldr	r3, .L1873+48
+	cbz	r0, .L1898
+.L1910:
+	ldr	r3, .L1914+48
 	movs	r2, #0
 	str	r2, [r3, #0]
-.L1870:
-	ldr	r3, .L1873+76
+.L1911:
+	ldr	r3, .L1914+76
 	ldrh	r0, [r3, #0]
-	b	.L1810
-.L1874:
+	b	.L1851
+.L1898:
+	ldr	r3, .L1914+36
+	ldrh	r0, [r3, #0]
+	cbnz	r0, .L1899
+	ldr	r3, .L1914+4
+	ldr	r2, .L1914+40
+	ldrh	r1, [r3, #0]
+	ldr	r2, [r2, #0]
+	ldrh	r4, [r2, r1, lsl #1]
+	cbz	r4, .L1899
+	strh	r0, [r2, r1, lsl #1]	@ movhi
+	ldrh	r0, [r3, #0]
+	bl	update_vpc_list
+	bl	FtlCacheWriteBack
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+.L1899:
+	ldr	r3, .L1914+4
+	movw	r2, #65535
+	strh	r2, [r3, #0]	@ movhi
+.L1897:
+	ldr	r3, .L1914+80
+	ldrh	r0, [r3, #0]
+	cmp	r0, #2
+	bhi	.L1900
+	ldr	r3, .L1914+52
+	ldrh	r4, [r3, #0]
+	b	.L1908
+.L1900:
+	ldr	r3, .L1914+48
+	movs	r2, #0
+	adds	r0, r0, #1
+	str	r2, [r3, #0]
+	b	.L1851
+.L1915:
+	.align	2
+.L1914:
+	.word	.LANCHOR7
+	.word	.LANCHOR202
+	.word	.LANCHOR109
+	.word	.LANCHOR236
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR110
+	.word	.LANCHOR111
+	.word	.LANCHOR234
+	.word	.LANCHOR101
+	.word	.LANCHOR235
+	.word	.LANCHOR168
+	.word	.LANCHOR68
+	.word	.LANCHOR69
+	.word	.LANCHOR178
+	.word	.LANCHOR157
+	.word	.LANCHOR53
+	.word	.LANCHOR131
+	.word	.LANCHOR233
+	.word	.LANCHOR106
+.L1901:
+	movs	r0, #0
+	b	.L1851
+.L1902:
+	mov	r0, r2
+	b	.L1851
+.L1903:
+	mov	r0, r3
+.L1851:
+	add	sp, sp, #32
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
+	.section	.text.ftl_fix_nand_power_lost_error,"ax",%progbits
+	.align	1
+	.global	ftl_fix_nand_power_lost_error
+	.thumb
+	.thumb_func
+	.type	ftl_fix_nand_power_lost_error, %function
+ftl_fix_nand_power_lost_error:
+	@ args = 0, pretend = 0, frame = 48
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1925
+	push	{r4, r5, r6, r7, r8, lr}
+	sub	sp, sp, #48
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L1916
+	ldr	r3, .L1925+4
+	ldr	r5, .L1925+8
+	ldr	r8, .L1925+32
+	ldrh	r4, [r3, #0]
+	ldr	r3, [r5, #0]
+	ldr	r7, .L1925+12
+	mov	r1, r4
+	ldr	r0, .L1925+16
+	lsls	r6, r4, #1
+	ldrh	r2, [r3, r4, lsl #1]
+	bl	printf
+	ldrh	r0, [r8, #0]
+	bl	FtlGcRefreshOpenBlock
+	ldrh	r0, [r7, #0]
+	bl	FtlGcRefreshOpenBlock
+	mov	r0, r8
+	bl	allocate_new_data_superblock
+	mov	r0, r7
+	bl	allocate_new_data_superblock
+	movw	r7, #4097
+	b	.L1918
+.L1920:
+	movs	r0, #1
+	mov	r1, r0
+	bl	rk_ftl_garbage_collect
+	ldr	r3, [r5, #0]
+	ldrh	r3, [r3, r6]
+	cbz	r3, .L1919
+.L1918:
+	subs	r7, r7, #1
+	bne	.L1920
+.L1919:
+	ldr	r5, .L1925+8
+	mov	r1, r4
+	ldr	r0, .L1925+16
+	ldr	r3, [r5, #0]
+	ldrh	r2, [r3, r4, lsl #1]
+	bl	printf
+	ldr	r3, [r5, #0]
+	ldrh	r5, [r3, r4, lsl #1]
+	cmp	r5, #0
+	bne	.L1921
+	add	r6, sp, #48
+	mov	r0, sp
+	movs	r7, #36
+	strh	r4, [r6, #-48]!	@ movhi
+	adds	r6, r6, #14
+	bl	make_superblock
+	ldr	r3, .L1925+20
+	movw	lr, #65535
+	mov	r1, r5
+	ldrh	r8, [r3, #0]
+	ldr	r3, .L1925+24
+	ldr	ip, [r3, #0]
+	mov	r3, r5
+	b	.L1922
+.L1924:
+	ldrh	r0, [r6, #2]!
+	cmp	r0, lr
+	beq	.L1923
+	mla	r2, r7, r5, ip
+	adds	r5, r5, #1
+	lsls	r0, r0, #10
+	uxth	r5, r5
+	str	r0, [r2, #4]
+	str	r1, [r2, #8]
+	str	r1, [r2, #12]
+.L1923:
+	adds	r3, r3, #1
+	uxth	r3, r3
+.L1922:
+	cmp	r3, r8
+	bne	.L1924
+	ldr	r3, .L1925+8
+	mov	r1, r4
+	ldr	r0, .L1925+28
+	ldr	r3, [r3, #0]
+	ldrh	r2, [r3, r4, lsl #1]
+	ldr	r4, .L1925+24
+	bl	printf
+	movs	r1, #0
+	mov	r2, r5
+	ldr	r0, [r4, #0]
+	bl	FlashEraseBlocks
+	ldr	r0, [r4, #0]
+	movs	r1, #1
+	mov	r2, r5
+	bl	FlashEraseBlocks
+.L1921:
+	ldr	r3, .L1925+4
+	movw	r2, #65535
+	strh	r2, [r3, #0]	@ movhi
+.L1916:
+	add	sp, sp, #48
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1926:
 	.align	2
-.L1873:
+.L1925:
 	.word	.LANCHOR7
-	.word	.LANCHOR201
-	.word	.LANCHOR107
-	.word	.LANCHOR231
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.word	.LANCHOR108
-	.word	.LANCHOR109
 	.word	.LANCHOR229
-	.word	.LANCHOR99
-	.word	.LANCHOR230
-	.word	.LANCHOR165
-	.word	.LANCHOR68
-	.word	.LANCHOR69
-	.word	.LANCHOR174
-	.word	.LANCHOR154
+	.word	.LANCHOR101
+	.word	.LANCHOR110
+	.word	.LC44
 	.word	.LANCHOR53
-	.word	.LANCHOR128
-	.word	.LANCHOR228
-.L1858:
-	ldr	r3, .L1875
-	ldrh	r0, [r3, #0]
-	cbnz	r0, .L1859
-	ldr	r3, .L1875+4
-	ldr	r2, .L1875+8
-	ldrh	r1, [r3, #0]
-	ldr	r2, [r2, #0]
-	ldrh	r4, [r2, r1, lsl #1]
-	cbz	r4, .L1859
-	strh	r0, [r2, r1, lsl #1]	@ movhi
-	ldrh	r0, [r3, #0]
-	bl	update_vpc_list
-	bl	FtlCacheWriteBack
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
-.L1859:
-	ldr	r3, .L1875+4
-	movw	r2, #65535
-	strh	r2, [r3, #0]	@ movhi
-.L1857:
-	ldr	r3, .L1875+12
+	.word	.LANCHOR95
+	.word	.LC45
+	.word	.LANCHOR109
+	.size	ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error
+	.section	.text.FtlInit,"ax",%progbits
+	.align	1
+	.global	FtlInit
+	.thumb
+	.thumb_func
+	.type	FtlInit, %function
+FtlInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.L1928:
+	push	{r3, r4, r5, lr}
+	mov	r3, #-1
+	ldr	r2, .L1935
+	mov	r5, r0
+	ldr	r4, .L1935+4
+	ldr	r1, .L1935+8
+	ldr	r0, .L1935+12
+	str	r3, [r4, #0]
+	movs	r3, #0
+	str	r3, [r2, #0]
+	ldr	r2, .L1935+16
+	str	r3, [r2, #0]
+	bl	printf
+	mov	r0, r5
+	bl	FtlConstantsInit
+	bl	FtlMemInit
+	bl	FtlVariablesInit
+	ldr	r3, .L1935+20
 	ldrh	r0, [r3, #0]
-	cmp	r0, #2
-	bhi	.L1860
-	ldr	r3, .L1875+16
-	ldrh	r4, [r3, #0]
-	b	.L1867
-.L1860:
-	ldr	r3, .L1875+20
-	movs	r2, #0
-	adds	r0, r0, #1
-	str	r2, [r3, #0]
-	b	.L1810
-.L1861:
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlLoadBbt
+	cbz	r0, .L1929
+	ldr	r0, .L1935+24
+	b	.L1934
+.L1929:
+	bl	FtlSysBlkInit
+	cbz	r0, .L1931
+	ldr	r0, .L1935+28
+.L1934:
+	ldr	r1, .L1935+32
+	bl	printf
+	b	.L1930
+.L1931:
+	movs	r1, #1
+	str	r1, [r4, #0]
+	bl	rk_ftl_garbage_collect
+	ldr	r3, .L1935+36
+	ldrh	r3, [r3, #0]
+	cmp	r3, #15
+	bhi	.L1930
+	mov	r4, #1024
+.L1932:
+	movs	r0, #1
+	mov	r1, r0
+	bl	rk_ftl_garbage_collect
+	subs	r4, r4, #1
+	bne	.L1932
+.L1930:
 	movs	r0, #0
-	b	.L1810
-.L1862:
-	mov	r0, r3
-.L1810:
-	add	sp, sp, #32
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1876:
+	pop	{r3, r4, r5, pc}
+.L1936:
 	.align	2
-.L1875:
-	.word	.LANCHOR229
-	.word	.LANCHOR201
-	.word	.LANCHOR99
-	.word	.LANCHOR104
-	.word	.LANCHOR68
-	.word	.LANCHOR165
-	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
+.L1935:
+	.word	.LANCHOR237
+	.word	.LANCHOR225
+	.word	.LC46
+	.word	.LC10
+	.word	.LANCHOR94
+	.word	.LANCHOR54
+	.word	.LC47
+	.word	.LC48
+	.word	.LANCHOR238
+	.word	.LANCHOR106
+	.size	FtlInit, .-FtlInit
 	.section	.text.ftl_write,"ax",%progbits
 	.align	1
 	.global	ftl_write
@@ -16864,28 +17553,28 @@ ftl_write:
 	mov	r5, r1
 	str	r2, [sp, #12]
 	str	r3, [sp, #4]
-	bne	.L1878
+	bne	.L1938
 	add	r0, r1, #256
 	mov	r1, r2
 	mov	r2, r3
 	bl	FtlVendorPartWrite
-	b	.L1879
-.L1878:
-	ldr	r3, .L1920
+	b	.L1939
+.L1938:
+	ldr	r3, .L1980
 	ldr	r0, [sp, #12]
 	ldr	r3, [r3, #0]
 	adds	r7, r0, r1
 	cmp	r7, r3
-	bhi	.L1910
-	ldr	r3, .L1920+4
+	bhi	.L1970
+	ldr	r3, .L1980+4
 	ldr	r0, [r3, #0]
-	adds	r1, r0, #1
-	beq	.L1879
-	ldr	r3, .L1920+8
+	adds	r3, r0, #1
+	beq	.L1939
+	ldr	r3, .L1980+8
 	mov	r2, #2048
-	mov	r0, r5
+	mov	r0, r1
 	str	r2, [r3, #0]
-	ldr	r3, .L1920+12
+	ldr	r3, .L1980+12
 	ldrh	r6, [r3, #0]
 	mov	r1, r6
 	bl	__aeabi_uidiv
@@ -16893,7 +17582,7 @@ ftl_write:
 	mov	sl, r0
 	subs	r0, r7, #1
 	bl	__aeabi_uidiv
-	ldr	r3, .L1920+16
+	ldr	r3, .L1980+16
 	ldr	r2, [r3, #0]
 	rsb	r4, sl, r0
 	str	r0, [sp, #24]
@@ -16901,16 +17590,16 @@ ftl_write:
 	str	r1, [sp, #0]
 	adds	r2, r1, r2
 	str	r2, [r3, #0]
-	ldr	r3, .L1920+20
+	ldr	r3, .L1980+20
 	ldr	r7, [r3, #0]
-	cbz	r7, .L1880
+	cbz	r7, .L1940
 	ldr	r3, [r7, #16]
 	cmp	sl, r3
-	beq	.L1881
+	beq	.L1941
 	bl	FtlCacheWriteBack
-	b	.L1880
-.L1881:
-	ldr	r3, .L1920+24
+	b	.L1940
+.L1941:
+	ldr	r3, .L1980+24
 	mov	r1, r6
 	mov	r0, r5
 	ldr	r2, [r3, #0]
@@ -16929,7 +17618,7 @@ ftl_write:
 	mov	r2, r8
 	bl	memcpy
 	cmp	r4, #0
-	beq	.L1912
+	beq	.L1972
 	ldr	r3, [sp, #12]
 	adds	r5, r5, r6
 	ldr	r0, [sp, #4]
@@ -16940,36 +17629,36 @@ ftl_write:
 	str	r0, [sp, #4]
 	bl	FtlCacheWriteBack
 	str	r4, [sp, #0]
-.L1880:
+.L1940:
 	mov	r4, sl
 	str	sl, [sp, #20]
-	ldr	r6, .L1920+28
+	ldr	r6, .L1980+28
 	mov	sl, r5
-	b	.L1882
-.L1909:
-	ldr	r1, .L1920+32
+	b	.L1942
+.L1969:
+	ldr	r1, .L1980+32
 	ldrb	r2, [r6, #6]	@ zero_extendqisi2
 	ldrh	r3, [r1, #0]
 	cmp	r2, r3
-	bcc	.L1883
-	ldr	r1, .L1920+36
-	mov	r2, #1544
-	ldr	r0, .L1920+40
+	bcc	.L1943
+	ldr	r1, .L1980+36
+	movw	r2, #1630
+	ldr	r0, .L1980+40
 	bl	printf
-	ldr	r0, .L1920+44
-	ldr	r1, .L1920+48
+	ldr	r0, .L1980+44
+	ldr	r1, .L1980+48
 	bl	printf
-.L1883:
-	ldr	r2, .L1920+28
+.L1943:
+	ldr	r2, .L1980+28
 	ldrh	r3, [r2, #4]
-	cbnz	r3, .L1884
+	cbnz	r3, .L1944
 	bl	FtlCacheWriteBack
-	ldr	r0, .L1920+28
+	ldr	r0, .L1980+28
 	bl	allocate_new_data_superblock
-.L1884:
+.L1944:
 	ldrb	r3, [r6, #7]	@ zero_extendqisi2
 	ldrh	r2, [r6, #4]
-	ldr	r1, .L1920+32
+	ldr	r1, .L1980+32
 	lsls	r3, r3, #2
 	ldr	r0, [sp, #0]
 	cmp	r3, r2
@@ -16982,29 +17671,29 @@ ftl_write:
 	ldrh	r3, [r1, #0]
 	str	r0, [sp, #8]
 	cmp	r2, r3
-	bcc	.L1885
-	ldr	r1, .L1920+36
-	movw	r2, #1577
-	ldr	r0, .L1920+40
+	bcc	.L1945
+	ldr	r1, .L1980+36
+	movw	r2, #1663
+	ldr	r0, .L1980+40
 	bl	printf
-	ldr	r0, .L1920+44
-	ldr	r1, .L1920+48
+	ldr	r0, .L1980+44
+	ldr	r1, .L1980+48
 	bl	printf
-.L1885:
+.L1945:
 	movs	r3, #0
-	ldr	r5, .L1920+52
+	ldr	r5, .L1980+52
 	str	r3, [sp, #16]
-	b	.L1886
-.L1905:
+	b	.L1946
+.L1965:
 	ldrh	r3, [r6, #4]
 	cmp	r3, #0
-	beq	.L1913
+	beq	.L1973
 	movs	r2, #0
 	add	r1, sp, #76
 	mov	r0, r4
 	movs	r7, #36
 	bl	log2phys
-	ldr	r0, .L1920+28
+	ldr	r0, .L1980+28
 	bl	get_new_active_ppa
 	ldr	r3, [sp, #16]
 	muls	r7, r3, r7
@@ -17012,13 +17701,13 @@ ftl_write:
 	adds	r3, r3, r7
 	str	r4, [r3, #16]
 	str	r0, [r3, #4]
-	ldr	r0, .L1920+56
+	ldr	r0, .L1980+56
 	ldrh	r2, [r0, #0]
 	ldr	r0, [sp, #16]
 	mul	r1, r2, r0
 	lsrs	r1, r1, #2
 	str	r1, [sp, #32]
-	ldr	r1, .L1920+60
+	ldr	r1, .L1980+60
 	ldr	r0, [sp, #32]
 	ldr	r1, [r1, #0]
 	add	r8, r1, r0, lsl #2
@@ -17028,14 +17717,14 @@ ftl_write:
 	movs	r1, #0
 	bl	memset
 	ldr	r1, [sp, #20]
-	ldr	r3, .L1920+12
+	ldr	r3, .L1980+12
 	cmp	r4, r1
-	beq	.L1888
+	beq	.L1948
 	ldr	r2, [sp, #24]
 	cmp	r4, r2
-	bne	.L1915
-	b	.L1919
-.L1888:
+	bne	.L1975
+	b	.L1979
+.L1948:
 	ldrh	fp, [r3, #0]
 	mov	r0, sl
 	mov	r1, fp
@@ -17046,8 +17735,8 @@ ftl_write:
 	cmp	fp, r3
 	it	cs
 	movcs	fp, r3
-	b	.L1891
-.L1919:
+	b	.L1951
+.L1979:
 	ldr	r0, [sp, #12]
 	ldrh	fp, [r3, #0]
 	movs	r3, #0
@@ -17055,39 +17744,39 @@ ftl_write:
 	str	r3, [sp, #28]
 	mls	fp, r4, fp, r2
 	uxth	fp, fp
-.L1891:
-	ldr	r3, .L1920+12
+.L1951:
+	ldr	r3, .L1980+12
 	ldrh	r3, [r3, #0]
 	cmp	fp, r3
-	bne	.L1892
+	bne	.L1952
 	ldr	r0, [sp, #20]
 	ldr	r3, [r5, #0]
 	cmp	r4, r0
 	add	r7, r3, r7
-	bne	.L1893
+	bne	.L1953
 	ldr	r1, [sp, #4]
 	str	r1, [r7, #8]
-	b	.L1894
-.L1893:
+	b	.L1954
+.L1953:
 	mul	r3, fp, r4
 	ldr	r2, [sp, #4]
 	rsb	r3, sl, r3
 	add	r3, r2, r3, lsl #9
-	b	.L1918
-.L1892:
+	b	.L1978
+.L1952:
 	ldr	r3, [sp, #20]
 	cmp	r4, r3
 	ldr	r3, [r5, #0]
 	it	eq
-	ldreq	r2, .L1920+64
+	ldreq	r2, .L1980+64
 	add	r3, r3, r7
 	it	ne
-	ldrne	r2, .L1920+68
+	ldrne	r2, .L1980+68
 	ldr	r2, [r2, #0]
 	str	r2, [r3, #8]
 	ldr	r3, [sp, #76]
-	adds	r2, r3, #1
-	beq	.L1897
+	adds	r1, r3, #1
+	beq	.L1957
 	str	r3, [sp, #44]
 	movs	r1, #1
 	ldr	r3, [r5, #0]
@@ -17102,102 +17791,102 @@ ftl_write:
 	bl	FlashReadPages
 	ldr	r3, [sp, #40]
 	adds	r3, r3, #1
-	bne	.L1898
-	ldr	r3, .L1920+72
+	bne	.L1958
+	ldr	r3, .L1980+72
 	ldr	r2, [r3, #72]
 	adds	r2, r2, #1
 	str	r2, [r3, #72]
-	b	.L1899
-.L1898:
+	b	.L1959
+.L1958:
 	ldr	r1, [r8, #8]
 	cmp	r1, r4
-	beq	.L1900
-	ldr	r3, .L1920+72
-	ldr	r0, .L1920+76
+	beq	.L1960
+	ldr	r3, .L1980+72
+	ldr	r0, .L1980+76
 	ldr	r2, [r3, #72]
 	adds	r2, r2, #1
 	str	r2, [r3, #72]
 	mov	r2, r4
 	bl	printf
-.L1900:
+.L1960:
 	ldr	r3, [r8, #8]
 	cmp	r3, r4
-	beq	.L1899
-	ldr	r1, .L1920+36
-	movw	r2, #1630
-	ldr	r0, .L1920+40
+	beq	.L1959
+	ldr	r1, .L1980+36
+	movw	r2, #1716
+	ldr	r0, .L1980+40
 	bl	printf
-	ldr	r1, .L1920+48
-	ldr	r0, .L1920+44
+	ldr	r1, .L1980+48
+	ldr	r0, .L1980+44
 	bl	printf
-	b	.L1899
-.L1897:
+	b	.L1959
+.L1957:
 	ldr	r3, [r5, #0]
 	movs	r1, #0
 	adds	r3, r3, r7
 	ldr	r0, [r3, #8]
-	ldr	r3, .L1920+80
+	ldr	r3, .L1980+80
 	ldrh	r2, [r3, #0]
 	bl	memset
-.L1899:
+.L1959:
 	ldr	r0, [sp, #20]
 	ldr	r3, [r5, #0]
 	cmp	r4, r0
 	add	r3, r3, r7
-	bne	.L1901
+	bne	.L1961
 	ldr	r0, [r3, #8]
 	ldr	r3, [sp, #28]
 	ldr	r1, [sp, #4]
 	add	r0, r0, r3, lsl #9
-	b	.L1917
-.L1921:
+	b	.L1977
+.L1981:
 	.align	2
-.L1920:
+.L1980:
 	.word	.LANCHOR84
-	.word	.LANCHOR222
-	.word	.LANCHOR232
+	.word	.LANCHOR225
+	.word	.LANCHOR239
 	.word	.LANCHOR71
-	.word	.LANCHOR156
-	.word	.LANCHOR134
-	.word	.LANCHOR158
-	.word	.LANCHOR107
+	.word	.LANCHOR159
+	.word	.LANCHOR137
+	.word	.LANCHOR161
+	.word	.LANCHOR109
 	.word	.LANCHOR53
-	.word	.LANCHOR233
+	.word	.LANCHOR240
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
-	.word	.LANCHOR175
-	.word	.LANCHOR74
-	.word	.LANCHOR181
-	.word	.LANCHOR178
 	.word	.LANCHOR179
-	.word	.LANCHOR141
-	.word	.LC34
+	.word	.LANCHOR74
+	.word	.LANCHOR185
+	.word	.LANCHOR182
+	.word	.LANCHOR183
+	.word	.LANCHOR144
+	.word	.LC49
 	.word	.LANCHOR73
-.L1901:
-	ldr	r2, .L1922
+.L1961:
+	ldr	r2, .L1982
 	ldr	r0, [r3, #8]
 	ldrh	r1, [r2, #0]
 	muls	r1, r4, r1
 	ldr	r2, [sp, #4]
 	rsb	r1, sl, r1
 	add	r1, r2, r1, lsl #9
-.L1917:
+.L1977:
 	lsl	r2, fp, #9
 	bl	memcpy
 	ldr	r3, [sp, #24]
 	cmp	r4, r3
-	bne	.L1894
+	bne	.L1954
 	ldrh	r3, [r6, #4]
-	cbz	r3, .L1894
+	cbz	r3, .L1954
 	ldr	r3, [r5, #0]
 	adds	r7, r3, r7
-	ldr	r3, .L1922+4
+	ldr	r3, .L1982+4
 	str	r7, [r3, #0]
-	ldr	r3, .L1922+8
+	ldr	r3, .L1982+8
 	str	r6, [r3, #0]
-	b	.L1894
-.L1915:
+	b	.L1954
+.L1975:
 	ldr	r2, [r5, #0]
 	ldrh	r3, [r3, #0]
 	muls	r3, r4, r3
@@ -17205,36 +17894,36 @@ ftl_write:
 	rsb	r3, sl, r3
 	adds	r7, r2, r7
 	add	r3, r0, r3, lsl #9
-.L1918:
+.L1978:
 	str	r3, [r7, #8]
-.L1894:
-	ldr	r1, .L1922+12
+.L1954:
+	ldr	r1, .L1982+12
 	ldrb	r2, [r6, #6]	@ zero_extendqisi2
 	ldrh	r3, [r1, #0]
 	cmp	r2, r3
-	bcc	.L1903
-	ldr	r1, .L1922+16
-	movw	r2, #1651
-	ldr	r0, .L1922+20
+	bcc	.L1963
+	ldr	r1, .L1982+16
+	movw	r2, #1737
+	ldr	r0, .L1982+20
 	bl	printf
-	ldr	r0, .L1922+24
-	ldr	r1, .L1922+28
+	ldr	r0, .L1982+24
+	ldr	r1, .L1982+28
 	bl	printf
-.L1903:
+.L1963:
 	ldr	r2, [sp, #36]
 	movw	r3, #61589
 	ldr	r0, [sp, #32]
 	strh	r3, [r2, r0, lsl #2]	@ movhi
-	ldr	r3, .L1922+32
+	ldr	r3, .L1982+32
 	ldr	r2, [r3, #0]
 	str	r2, [r8, #4]
 	adds	r2, r2, #1
 	str	r2, [r3, #0]
 	adds	r2, r2, #1
-	bne	.L1904
+	bne	.L1964
 	movs	r2, #0
 	str	r2, [r3, #0]
-.L1904:
+.L1964:
 	ldr	r3, [sp, #76]
 	str	r4, [r8, #8]
 	adds	r4, r4, #1
@@ -17244,83 +17933,83 @@ ftl_write:
 	ldr	r3, [sp, #16]
 	adds	r3, r3, #1
 	str	r3, [sp, #16]
-.L1886:
+.L1946:
 	ldr	r3, [sp, #16]
 	ldr	r0, [sp, #8]
 	cmp	r3, r0
-	bne	.L1905
-	b	.L1887
-.L1913:
+	bne	.L1965
+	b	.L1947
+.L1973:
 	ldr	r3, [sp, #16]
 	str	r3, [sp, #8]
-.L1887:
-	ldr	r3, .L1922+4
+.L1947:
+	ldr	r3, .L1982+4
 	ldr	r3, [r3, #0]
-	cbz	r3, .L1906
+	cbz	r3, .L1966
 	ldr	r0, [sp, #8]
 	subs	r0, r0, #1
 	str	r0, [sp, #8]
-	beq	.L1907
+	beq	.L1967
 	ldr	r1, [sp, #0]
 	subs	r1, r1, #1
 	str	r1, [sp, #0]
-.L1906:
-	ldr	r3, .L1922+36
+.L1966:
+	ldr	r3, .L1982+36
 	movs	r2, #0
 	ldr	r1, [sp, #8]
 	ldr	r0, [r3, #0]
-	ldr	r3, .L1922+40
+	ldr	r3, .L1982+40
 	bl	FtlProgPages
 	ldr	r2, [sp, #0]
 	ldr	r3, [sp, #8]
 	cmp	r2, r3
-	bcs	.L1908
-	ldr	r1, .L1922+16
-	movw	r2, #1666
-	ldr	r0, .L1922+20
+	bcs	.L1968
+	ldr	r1, .L1982+16
+	mov	r2, #1752
+	ldr	r0, .L1982+20
 	bl	printf
-	ldr	r0, .L1922+24
-	ldr	r1, .L1922+28
+	ldr	r0, .L1982+24
+	ldr	r1, .L1982+28
 	bl	printf
-.L1908:
+.L1968:
 	ldr	r0, [sp, #0]
 	ldr	r1, [sp, #8]
 	subs	r0, r0, r1
 	str	r0, [sp, #0]
-.L1882:
+.L1942:
 	ldr	r2, [sp, #0]
 	cmp	r2, #0
-	bne	.L1909
-.L1907:
+	bne	.L1969
+.L1967:
 	ldr	sl, [sp, #20]
 	movs	r0, #0
 	ldr	r3, [sp, #24]
 	rsb	r1, sl, r3
 	bl	rk_ftl_garbage_collect
 	movs	r0, #0
-	b	.L1879
-.L1910:
+	b	.L1939
+.L1970:
 	mov	r0, #-1
-	b	.L1879
-.L1912:
+	b	.L1939
+.L1972:
 	mov	r0, r4
-.L1879:
+.L1939:
 	add	sp, sp, #80
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1923:
+.L1983:
 	.align	2
-.L1922:
+.L1982:
 	.word	.LANCHOR71
-	.word	.LANCHOR134
-	.word	.LANCHOR219
+	.word	.LANCHOR137
+	.word	.LANCHOR224
 	.word	.LANCHOR53
-	.word	.LANCHOR233
+	.word	.LANCHOR240
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
-	.word	.LANCHOR154
-	.word	.LANCHOR175
-	.word	.LANCHOR107
+	.word	.LANCHOR157
+	.word	.LANCHOR179
+	.word	.LANCHOR109
 	.size	ftl_write, .-ftl_write
 	.section	.text.ftl_read,"ax",%progbits
 	.align	1
@@ -17337,27 +18026,27 @@ ftl_read:
 	mov	r4, r1
 	mov	r7, r3
 	str	r2, [sp, #36]
-	bne	.L1925
+	bne	.L1985
 	add	r0, r1, #256
 	mov	r1, r2
 	mov	r2, r3
 	bl	FtlVendorPartRead
 	str	r0, [sp, #12]
-	b	.L1926
-.L1925:
+	b	.L1986
+.L1985:
 	ldr	r3, [sp, #36]
 	adds	r3, r3, r1
 	str	r3, [sp, #16]
-	ldr	r3, .L1958
+	ldr	r3, .L2018
 	ldr	r1, [sp, #16]
 	ldr	r3, [r3, #0]
 	cmp	r1, r3
-	bhi	.L1946
-	ldr	r3, .L1958+4
+	bhi	.L2006
+	ldr	r3, .L2018+4
 	ldr	r3, [r3, #0]
 	adds	r2, r3, #1
-	beq	.L1947
-	ldr	fp, .L1958+48
+	beq	.L2007
+	ldr	fp, .L2018+48
 	bl	FtlCacheWriteBack
 	mov	r0, r4
 	mov	sl, #0
@@ -17378,54 +18067,54 @@ ftl_read:
 	str	sl, [sp, #12]
 	adds	r3, r3, r0
 	str	r3, [sp, #8]
-	ldr	r3, .L1958+8
+	ldr	r3, .L2018+8
 	ldr	r1, [sp, #8]
 	str	r0, [sp, #24]
 	ldr	r2, [r3, #0]
 	adds	r2, r1, r2
 	str	r2, [r3, #0]
-	b	.L1953
-.L1945:
+	b	.L2013
+.L2005:
 	movs	r2, #0
 	mov	r0, r6
 	add	r1, sp, #68
 	bl	log2phys
 	ldr	r3, [sp, #68]
-	adds	r4, r3, #1
-	bne	.L1954
-	b	.L1957
-.L1931:
+	adds	r0, r3, #1
+	bne	.L2014
+	b	.L2017
+.L1991:
 	mla	r0, r0, r6, r4
 	cmp	r0, r8
-	bcc	.L1930
+	bcc	.L1990
 	ldr	r3, [sp, #16]
 	cmp	r0, r3
-	bcs	.L1930
+	bcs	.L1990
 	rsb	r0, r8, r0
 	movs	r1, #0
 	mov	r2, #512
 	add	r0, r7, r0, lsl #9
 	bl	memset
-.L1930:
+.L1990:
 	adds	r4, r4, #1
-	b	.L1928
-.L1957:
+	b	.L1988
+.L2017:
 	movs	r4, #0
-.L1928:
+.L1988:
 	ldrh	r0, [fp, #0]
 	cmp	r4, r0
-	bcc	.L1931
-	b	.L1932
-.L1954:
-	ldr	r2, .L1958+12
+	bcc	.L1991
+	b	.L1992
+.L2014:
+	ldr	r2, .L2018+12
 	movs	r4, #36
 	ldr	r2, [r2, #0]
 	mla	r4, r4, r5, r2
 	str	r3, [r4, #4]
 	ldr	r3, [sp, #20]
 	cmp	r6, r3
-	bne	.L1933
-	ldr	r3, .L1958+16
+	bne	.L1993
+	ldr	r3, .L2018+16
 	mov	r0, r8
 	ldr	r3, [r3, #0]
 	str	r3, [r4, #8]
@@ -17442,14 +18131,14 @@ ftl_read:
 	movcc	r1, r2
 	str	r1, [sp, #32]
 	cmp	r1, r3
-	bne	.L1934
+	bne	.L1994
 	str	r7, [r4, #8]
-	b	.L1934
-.L1933:
+	b	.L1994
+.L1993:
 	ldr	r3, [sp, #24]
 	cmp	r6, r3
-	bne	.L1935
-	ldr	r3, .L1958+20
+	bne	.L1995
+	ldr	r3, .L2018+20
 	ldrh	r2, [fp, #0]
 	ldr	r1, [sp, #16]
 	ldr	r3, [r3, #0]
@@ -17457,18 +18146,18 @@ ftl_read:
 	mul	r3, r2, r6
 	rsb	sl, r3, r1
 	cmp	sl, r2
-	bne	.L1934
-	b	.L1955
-.L1935:
+	bne	.L1994
+	b	.L2015
+.L1995:
 	ldrh	r3, [fp, #0]
 	muls	r3, r6, r3
-.L1955:
+.L2015:
 	rsb	r3, r8, r3
 	add	r3, r7, r3, lsl #9
 	str	r3, [r4, #8]
-.L1934:
-	ldr	r3, .L1958+24
-	ldr	r2, .L1958+28
+.L1994:
+	ldr	r3, .L2018+24
+	ldr	r2, .L2018+28
 	str	r6, [r4, #16]
 	ldrh	r3, [r3, #0]
 	muls	r3, r5, r3
@@ -17477,20 +18166,20 @@ ftl_read:
 	bic	r3, r3, #3
 	adds	r3, r2, r3
 	str	r3, [r4, #12]
-.L1932:
+.L1992:
 	ldr	r3, [sp, #8]
 	adds	r6, r6, #1
 	subs	r3, r3, #1
 	str	r3, [sp, #8]
-	beq	.L1936
-	ldr	r3, .L1958+32
+	beq	.L1996
+	ldr	r3, .L2018+32
 	ldrh	r3, [r3, #0]
 	cmp	r5, r3, lsl #2
-	bne	.L1953
-.L1936:
+	bne	.L2013
+.L1996:
 	cmp	r5, #0
-	beq	.L1953
-	ldr	r4, .L1958+12
+	beq	.L2013
+	ldr	r4, .L2018+12
 	mov	r1, r5
 	movs	r2, #0
 	ldr	r0, [r4, #0]
@@ -17506,7 +18195,7 @@ ftl_read:
 	str	r3, [sp, #52]
 	movs	r3, #0
 	str	r3, [sp, #28]
-.L1944:
+.L2004:
 	movs	r6, #36
 	ldr	r3, [sp, #28]
 	muls	r6, r3, r6
@@ -17515,110 +18204,110 @@ ftl_read:
 	adds	r3, r3, r6
 	ldr	r2, [r3, #16]
 	cmp	r2, r1
-	bne	.L1938
+	bne	.L1998
 	ldr	r1, [r3, #8]
-	ldr	r3, .L1958+16
+	ldr	r3, .L2018+16
 	ldr	r3, [r3, #0]
 	cmp	r1, r3
-	bne	.L1939
+	bne	.L1999
 	ldr	r3, [sp, #44]
 	mov	r0, r7
 	ldr	r2, [sp, #48]
 	adds	r1, r1, r3
-	b	.L1956
-.L1938:
+	b	.L2016
+.L1998:
 	ldr	r1, [sp, #24]
 	cmp	r2, r1
-	bne	.L1939
-	ldr	r2, .L1958+20
+	bne	.L1999
+	ldr	r2, .L2018+20
 	ldr	r1, [r3, #8]
 	ldr	r3, [r2, #0]
 	cmp	r1, r3
-	bne	.L1939
+	bne	.L1999
 	ldrh	r0, [fp, #0]
 	ldr	r3, [sp, #24]
 	muls	r0, r3, r0
 	rsb	r0, r8, r0
 	ldr	r2, [sp, #52]
 	add	r0, r7, r0, lsl #9
-.L1956:
+.L2016:
 	bl	memcpy
-.L1939:
+.L1999:
 	ldr	r3, [r4, #0]
 	adds	r2, r3, r6
 	ldr	r3, [r3, r6]
-	adds	r0, r3, #1
-	bne	.L1940
-	ldr	r2, .L1958+36
+	adds	r1, r3, #1
+	bne	.L2000
+	ldr	r2, .L2018+36
 	str	r3, [sp, #12]
 	ldr	r1, [r2, #72]
 	adds	r1, r1, #1
 	str	r1, [r2, #72]
-	b	.L1941
-.L1940:
+	b	.L2001
+.L2000:
 	cmp	r3, #256
-	bne	.L1941
+	bne	.L2001
 	ldr	r0, [r2, #4]
 	movw	r6, #2049
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	str	r0, [sp, #56]
 	bl	FtlGcRefreshBlock
-.L1943:
+.L2003:
 	subs	r6, r6, #1
-	beq	.L1942
+	beq	.L2002
 	movs	r0, #1
 	mov	r1, r0
 	bl	rk_ftl_garbage_collect
-	ldr	r1, .L1958+40
+	ldr	r1, .L2018+40
 	ldr	r2, [sp, #56]
 	ldrh	r3, [r1, #0]
 	cmp	r3, r2
-	beq	.L1943
-.L1942:
+	beq	.L2003
+.L2002:
 	bl	FtlSysFlush
-.L1941:
+.L2001:
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
 	str	r3, [sp, #28]
 	cmp	r3, r5
-	bne	.L1944
+	bne	.L2004
 	ldr	r6, [sp, #60]
 	movs	r5, #0
-.L1953:
+.L2013:
 	ldr	r3, [sp, #8]
 	cmp	r3, #0
-	bne	.L1945
-	ldr	r3, .L1958+44
+	bne	.L2005
+	ldr	r3, .L2018+44
 	ldrh	r3, [r3, #0]
-	cbz	r3, .L1926
+	cbz	r3, .L1986
 	ldr	r0, [sp, #8]
 	movs	r1, #1
 	bl	rk_ftl_garbage_collect
-	b	.L1926
-.L1946:
+	b	.L1986
+.L2006:
 	mov	r3, #-1
-.L1947:
+.L2007:
 	str	r3, [sp, #12]
-.L1926:
+.L1986:
 	ldr	r0, [sp, #12]
 	add	sp, sp, #72
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1959:
+.L2019:
 	.align	2
-.L1958:
+.L2018:
 	.word	.LANCHOR84
-	.word	.LANCHOR222
-	.word	.LANCHOR160
-	.word	.LANCHOR173
-	.word	.LANCHOR178
-	.word	.LANCHOR179
+	.word	.LANCHOR225
+	.word	.LANCHOR163
+	.word	.LANCHOR177
+	.word	.LANCHOR182
+	.word	.LANCHOR183
 	.word	.LANCHOR74
-	.word	.LANCHOR181
+	.word	.LANCHOR185
 	.word	.LANCHOR53
-	.word	.LANCHOR141
-	.word	.LANCHOR201
-	.word	.LANCHOR148
+	.word	.LANCHOR144
+	.word	.LANCHOR202
+	.word	.LANCHOR151
 	.word	.LANCHOR71
 	.size	ftl_read, .-ftl_read
 	.section	.text.FlashReadFacBbtData,"ax",%progbits
@@ -17631,16 +18320,16 @@ FlashReadFacBbtData:
 	@ args = 0, pretend = 0, frame = 48
 	@ frame_needed = 0, uses_anonymous_args = 0
 	mov	r3, r2
-	ldr	r2, .L1969
+	ldr	r2, .L2029
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	mov	r6, r1
 	ldrh	sl, [r2, #14]
 	sub	sp, sp, #48
 	ldrh	r1, [r2, #12]
 	mov	r4, r0
-	ldr	r2, .L1969+4
+	ldr	r2, .L2029+4
 	movw	fp, #61664
-	ldr	r7, .L1969+8
+	ldr	r7, .L2029+8
 	mul	sl, sl, r1
 	ldr	r2, [r2, #0]
 	str	r2, [sp, #20]
@@ -17651,8 +18340,8 @@ FlashReadFacBbtData:
 	str	r2, [sp, #24]
 	uxth	r5, r5
 	sub	sl, sl, #15
-	b	.L1961
-.L1967:
+	b	.L2021
+.L2027:
 	add	r2, r5, r8
 	movs	r1, #1
 	add	r0, sp, #12
@@ -17664,19 +18353,19 @@ FlashReadFacBbtData:
 	ldr	r2, [sp, #12]
 	ldr	r3, [sp, #4]
 	adds	r2, r2, #1
-	beq	.L1962
+	beq	.L2022
 	ldr	r2, [r7, #0]
 	ldrh	r2, [r2, #0]
 	cmp	r2, fp
-	bne	.L1962
-	cbz	r4, .L1968
-	cbnz	r6, .L1964
-	ldr	r2, .L1969+4
+	bne	.L2022
+	cbz	r4, .L2028
+	cbnz	r6, .L2024
+	ldr	r2, .L2029+4
 	movs	r0, #1
-	ldr	r5, .L1969+12
+	ldr	r5, .L2029+12
 	ldr	r2, [r2, #0]
-	b	.L1965
-.L1966:
+	b	.L2025
+.L2026:
 	ubfx	r1, r6, #5, #16
 	and	r7, r6, #31
 	adds	r6, r6, #1
@@ -17685,44 +18374,44 @@ FlashReadFacBbtData:
 	uxth	r6, r6
 	orr	r7, lr, r7
 	str	r7, [r2, r1, lsl #2]
-.L1965:
+.L2025:
 	ldr	r1, [r5, #0]
 	cmp	r6, r1
-	bcc	.L1966
-.L1964:
-	ldr	r2, .L1969+4
+	bcc	.L2026
+.L2024:
+	ldr	r2, .L2029+4
 	mov	r0, r4
 	ldr	r1, [r2, #0]
 	mov	r2, r3
 	bl	memcpy
 	movs	r2, #4
-	ldr	r0, .L1969+16
+	ldr	r0, .L2029+16
 	mov	r1, r4
 	mov	r3, r2
 	bl	rknand_print_hex
 	movs	r0, #0
-	b	.L1963
-.L1962:
+	b	.L2023
+.L2022:
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L1961:
+.L2021:
 	cmp	sl, r5
-	ble	.L1967
+	ble	.L2027
 	mov	r0, #-1
-	b	.L1963
-.L1968:
+	b	.L2023
+.L2028:
 	mov	r0, r4
-.L1963:
+.L2023:
 	add	sp, sp, #48
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1970:
+.L2030:
 	.align	2
-.L1969:
+.L2029:
 	.word	.LANCHOR28
 	.word	.LANCHOR44
-	.word	.LANCHOR234
+	.word	.LANCHOR241
 	.word	.LANCHOR46
-	.word	.LC35
+	.word	.LC50
 	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
 	.section	.text.FlashGetBadBlockList,"ax",%progbits
 	.align	1
@@ -17735,8 +18424,8 @@ FlashGetBadBlockList:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r5, r0
-	ldr	r3, .L1978
-	ldr	r6, .L1978+4
+	ldr	r3, .L2038
+	ldr	r6, .L2038+4
 	ldr	r3, [r3, #0]
 	ldr	r0, [r6, #0]
 	ldrb	r2, [r3, #13]	@ zero_extendqisi2
@@ -17747,43 +18436,43 @@ FlashGetBadBlockList:
 	lsrs	r2, r2, #3
 	bl	FlashReadFacBbtData
 	adds	r0, r0, #1
-	beq	.L1977
+	beq	.L2037
 	movs	r2, #0
 	lsrs	r0, r4, #4
 	ldr	r6, [r6, #0]
 	mov	r3, r2
 	subs	r4, r4, #1
 	movs	r1, #1
-	b	.L1973
-.L1975:
+	b	.L2033
+.L2035:
 	lsrs	r7, r2, #5
 	and	ip, r2, #31
 	lsl	ip, r1, ip
 	ldr	r7, [r6, r7, lsl #2]
 	tst	ip, r7
-	beq	.L1974
+	beq	.L2034
 	strh	r2, [r5, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	uxth	r3, r3
-.L1974:
+.L2034:
 	cmp	r3, r0
-	bcs	.L1977
+	bcs	.L2037
 	adds	r2, r2, #1
 	uxth	r2, r2
-.L1973:
+.L2033:
 	cmp	r2, r4
-	blt	.L1975
-	b	.L1972
-.L1977:
+	blt	.L2035
+	b	.L2032
+.L2037:
 	movs	r3, #0
-.L1972:
+.L2032:
 	movw	r2, #65535
 	movs	r0, #0
 	strh	r2, [r5, r3, lsl #1]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1979:
+.L2039:
 	.align	2
-.L1978:
+.L2038:
 	.word	.LANCHOR23
 	.word	.LANCHOR41
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
@@ -17796,21 +18485,24 @@ FlashGetBadBlockList:
 FtlMakeBbt:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2059
 	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	ldr	r4, [r3, #0]
+	cmp	r4, #0
+	bne	.L2041
+	ldr	r5, .L2059+4
 	bl	FtlBbtMemInit
-	movs	r4, #0
-	ldr	r5, .L1998
+	ldr	r6, .L2059+8
 	bl	FtlLoadFactoryBbt
-	ldr	r6, .L1998+4
 	add	r2, r5, #12
 	str	r2, [sp, #4]
-	b	.L1981
-.L1987:
-	ldr	r3, .L1998+8
+	b	.L2042
+.L2048:
+	ldr	r3, .L2059+12
 	ldr	r2, [sp, #4]
-	ldr	r8, .L1998+20
+	ldr	r8, .L2059+24
 	ldr	r0, [r3, #0]
-	ldr	r3, .L1998+12
+	ldr	r3, .L2059+16
 	str	r0, [r8, #8]
 	ldr	sl, [r3, #0]
 	ldrh	r3, [r2], #2
@@ -17818,7 +18510,7 @@ FtlMakeBbt:
 	str	r2, [sp, #4]
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L1982
+	beq	.L2043
 	ldrh	r7, [r6, #0]
 	movs	r1, #1
 	mov	r2, r1
@@ -17833,8 +18525,8 @@ FtlMakeBbt:
 	ldr	r1, [r8, #8]
 	lsrs	r2, r2, #3
 	bl	memcpy
-	b	.L1983
-.L1982:
+	b	.L2044
+.L2043:
 	mov	r1, r4
 	bl	FlashGetBadBlockList
 	ldr	r1, [r5, #28]
@@ -17847,20 +18539,20 @@ FtlMakeBbt:
 	mov	r4, sl
 	mov	sl, r3
 	uxth	fp, fp
-	b	.L1996
-.L1985:
+	b	.L2057
+.L2046:
 	add	fp, fp, #-1
 	uxth	fp, fp
-.L1996:
+.L2057:
 	ldrh	r0, [r6, #0]
 	mla	r0, r5, r0, fp
 	uxth	r0, r0
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L1985
+	beq	.L2046
 	ldr	r3, [sp, #4]
 	movs	r1, #0
-	ldr	r2, .L1998+12
+	ldr	r2, .L2059+16
 	strh	fp, [r3, #-2]	@ movhi
 	ldr	r0, [r2, #0]
 	movs	r2, #16
@@ -17878,91 +18570,91 @@ FtlMakeBbt:
 	ldr	r1, [sl, #28]
 	lsls	r3, r7, #10
 	str	r3, [r8, #4]
-	ldr	r3, .L1998+16
+	ldr	r3, .L2059+20
 	ldrh	r2, [r3, #0]
 	lsls	r2, r2, #2
 	bl	memcpy
 	movs	r1, #1
 	mov	r2, r1
-	ldr	r0, .L1998+20
+	ldr	r0, .L2059+24
 	bl	FlashEraseBlocks
 	movs	r1, #1
 	mov	r3, r1
-	ldr	r0, .L1998+20
+	ldr	r0, .L2059+24
 	mov	r2, r1
 	bl	FlashProgPages
 	ldr	r3, [r8, #0]
 	adds	r3, r3, #1
-	bne	.L1997
+	bne	.L2058
 	uxth	r0, r7
 	bl	FtlBbmMapBadBlock
-	b	.L1996
-.L1997:
+	b	.L2057
+.L2058:
 	mov	r4, r5
 	mov	r5, sl
-.L1983:
+.L2044:
 	uxth	r0, r7
 	adds	r4, r4, #1
 	bl	FtlBbmMapBadBlock
 	adds	r5, r5, #4
-.L1981:
-	ldr	r2, .L1998+24
+.L2042:
+	ldr	r2, .L2059+28
 	ldrh	r3, [r2, #0]
 	cmp	r4, r3
-	bcc	.L1987
+	bcc	.L2048
 	movs	r4, #0
-	ldr	r5, .L1998+28
-	b	.L1988
-.L1989:
+	ldr	r5, .L2059+32
+	b	.L2049
+.L2050:
 	mov	r0, r4
 	adds	r4, r4, #1
 	bl	FtlBbmMapBadBlock
 	uxth	r4, r4
-.L1988:
+.L2049:
 	ldrh	r3, [r5, #0]
 	cmp	r3, r4
-	bhi	.L1989
-	ldr	r5, .L1998
+	bhi	.L2050
+	ldr	r5, .L2059+4
 	movw	r6, #65535
 	ldrh	r4, [r5, #12]
 	subs	r4, r4, #1
 	uxth	r4, r4
-	b	.L1990
-.L1995:
+	b	.L2051
+.L2056:
 	mov	r0, r4
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L1991
+	beq	.L2052
 	mov	r0, r4
 	bl	FlashTestBlk
-	cbz	r0, .L1992
+	cbz	r0, .L2053
 	mov	r0, r4
 	bl	FtlBbmMapBadBlock
-	b	.L1991
-.L1992:
+	b	.L2052
+.L2053:
 	ldrh	r3, [r5, #0]
 	cmp	r3, r6
-	bne	.L1993
+	bne	.L2054
 	strh	r4, [r5, #0]	@ movhi
-	b	.L1991
-.L1993:
-	ldr	r3, .L1998
+	b	.L2052
+.L2054:
+	ldr	r3, .L2059+4
 	strh	r4, [r3, #4]	@ movhi
-	b	.L1994
-.L1991:
+	b	.L2055
+.L2052:
 	subs	r4, r4, #1
 	uxth	r4, r4
-.L1990:
+.L2051:
 	ldrh	r3, [r5, #12]
 	subs	r3, r3, #47
 	cmp	r3, r4
-	ble	.L1995
-.L1994:
-	ldr	r4, .L1998
+	ble	.L2056
+.L2055:
+	ldr	r4, .L2059+4
 	movs	r5, #0
-	ldr	r3, .L1998+32
-	movs	r1, #1
+	ldr	r3, .L2059+36
 	movs	r2, #2
+	movs	r1, #1
 	str	r5, [r4, #8]
 	ldr	r0, [r3, #0]
 	ldrh	r3, [r4, #0]
@@ -17987,20 +18679,22 @@ FtlMakeBbt:
 	strh	r2, [r4, #0]	@ movhi
 	strh	r3, [r4, #4]	@ movhi
 	bl	FtlBbmTblFlush
-	mov	r0, r5
+.L2041:
+	movs	r0, #0
 	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1999:
+.L2060:
 	.align	2
-.L1998:
-	.word	.LANCHOR89
-	.word	.LANCHOR66
-	.word	.LANCHOR96
-	.word	.LANCHOR180
+.L2059:
+	.word	.LANCHOR94
 	.word	.LANCHOR90
-	.word	.LANCHOR197
+	.word	.LANCHOR66
+	.word	.LANCHOR98
+	.word	.LANCHOR184
+	.word	.LANCHOR91
+	.word	.LANCHOR198
 	.word	.LANCHOR60
 	.word	.LANCHOR75
-	.word	.LANCHOR93
+	.word	.LANCHOR95
 	.size	FtlMakeBbt, .-FtlMakeBbt
 	.section	.text.FtlLowFormat,"ax",%progbits
 	.align	1
@@ -18011,45 +18705,48 @@ FtlMakeBbt:
 FtlLowFormat:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L2021
-	movs	r3, #0
+	ldr	r3, .L2082
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	ldr	r3, [r3, #0]
+	cmp	r3, #0
+	bne	.L2062
+	ldr	r2, .L2082+4
 	str	r3, [r2, #0]
-	ldr	r2, .L2021+4
+	ldr	r2, .L2082+8
 	str	r3, [r2, #0]
-	ldr	r3, .L2021+8
+	ldr	r3, .L2082+12
 	ldrh	r0, [r3, #0]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	r0, .L2001
+	cbz	r0, .L2063
 	bl	FtlMakeBbt
-.L2001:
-	ldr	r3, .L2021+12
-	ldr	r2, .L2021+16
+.L2063:
+	ldr	r3, .L2082+16
+	ldr	r2, .L2082+20
 	ldrh	r4, [r3, #0]
-	ldr	r3, .L2021+20
+	ldr	r3, .L2082+24
 	lsls	r4, r4, #7
 	ldr	r0, [r3, #0]
-	ldr	r3, .L2021+24
+	ldr	r3, .L2082+28
 	ldr	r1, [r3, #0]
 	movs	r3, #0
-	b	.L2002
-.L2003:
+	b	.L2064
+.L2065:
 	mvns	r5, r3
 	orr	r5, r3, r5, lsl #16
 	str	r5, [r0, r3, lsl #2]
 	str	r2, [r1, r3, lsl #2]
 	adds	r3, r3, #1
 	uxth	r3, r3
-.L2002:
+.L2064:
 	cmp	r3, r4
-	blt	.L2003
-	ldr	r3, .L2021+28
+	blt	.L2065
+	ldr	r3, .L2082+32
 	movs	r4, #0
-	ldr	r6, .L2021+32
+	ldr	r6, .L2082+36
 	ldrh	r5, [r3, #0]
-	b	.L2004
-.L2005:
+	b	.L2066
+.L2067:
 	mov	r0, r5
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
@@ -18057,47 +18754,47 @@ FtlLowFormat:
 	uxth	r5, r5
 	adds	r4, r4, r0
 	uxth	r4, r4
-.L2004:
+.L2066:
 	ldrh	r3, [r6, #0]
 	cmp	r3, r5
-	bhi	.L2005
-	ldr	r3, .L2021+36
+	bhi	.L2067
+	ldr	r3, .L2082+40
 	ldrh	r1, [r3, #0]
 	subs	r3, r4, #2
 	cmp	r3, r1, lsl #1
-	bgt	.L2006
-.L2010:
+	bgt	.L2068
+.L2072:
 	movs	r4, #0
-	ldr	r6, .L2021+28
+	ldr	r6, .L2082+32
 	mov	r5, r4
-	b	.L2007
-.L2006:
+	b	.L2069
+.L2068:
 	mov	r0, r4
-	ldr	r5, .L2021+32
+	ldr	r5, .L2082+36
 	bl	__aeabi_uidiv
-	ldr	r3, .L2021+40
+	ldr	r3, .L2082+44
 	ldr	r3, [r3, #0]
 	adds	r0, r0, r3
 	uxth	r0, r0
 	bl	FtlSysBlkNumInit
-	ldr	r3, .L2021+8
+	ldr	r3, .L2082+12
 	ldrh	r0, [r3, #0]
 	bl	FtlFreeSysBlkQueueInit
-	ldr	r3, .L2021+28
+	ldr	r3, .L2082+32
 	ldrh	r4, [r3, #0]
-	b	.L2008
-.L2009:
+	b	.L2070
+.L2071:
 	mov	r0, r4
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
 	adds	r4, r4, #1
 	uxth	r4, r4
-.L2008:
+.L2070:
 	ldrh	r3, [r5, #0]
 	cmp	r3, r4
-	bhi	.L2009
-	b	.L2010
-.L2011:
+	bhi	.L2071
+	b	.L2072
+.L2073:
 	mov	r0, r5
 	movs	r1, #0
 	bl	FtlLowFormatEraseBlock
@@ -18105,19 +18802,19 @@ FtlLowFormat:
 	uxth	r5, r5
 	adds	r4, r4, r0
 	uxth	r4, r4
-.L2007:
+.L2069:
 	ldrh	r3, [r6, #0]
 	cmp	r3, r5
-	bhi	.L2011
-	ldr	r3, .L2021+32
-	ldr	r8, .L2021+64
-	ldr	sl, .L2021+68
+	bhi	.L2073
+	ldr	r3, .L2082+36
+	ldr	r8, .L2082+68
+	ldr	sl, .L2082+72
 	ldrh	r2, [r3, #0]
-	ldr	r3, .L2021+44
+	ldr	r3, .L2082+48
 	str	r2, [r3, #0]
-	ldr	r3, .L2021+48
+	ldr	r3, .L2082+52
 	ldr	fp, [r3, #0]
-	ldr	r3, .L2021+36
+	ldr	r3, .L2082+40
 	mov	r0, fp
 	ldrh	r5, [r3, #0]
 	mov	r1, r5
@@ -18130,7 +18827,7 @@ FtlLowFormat:
 	muls	r3, r5, r3
 	cmp	r4, r3
 	str	r0, [sl, #0]
-	ble	.L2012
+	ble	.L2074
 	rsb	r0, r4, fp
 	mov	r1, r5
 	bl	__aeabi_uidiv
@@ -18138,113 +18835,113 @@ FtlLowFormat:
 	lsrs	r0, r0, #5
 	adds	r0, r0, #24
 	strh	r0, [r8, #0]	@ movhi
-.L2012:
-	ldr	r3, .L2021+52
+.L2074:
+	ldr	r3, .L2082+56
 	ldr	r3, [r3, #0]
 	cmp	r3, #1
-	bne	.L2013
+	bne	.L2075
 	mov	r0, r4
 	mov	r1, r5
 	bl	__aeabi_uidiv
-	ldr	r8, .L2021+64
+	ldr	r8, .L2082+68
 	ldrh	sl, [r8, #0]
 	uxtah	r0, sl, r0
 	add	sl, sl, r0, lsr #2
 	strh	sl, [r8, #0]	@ movhi
-.L2013:
-	ldr	r3, .L2021+56
+.L2075:
+	ldr	r3, .L2082+60
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L2014
+	cbz	r3, .L2076
 	mov	r0, r4
 	mov	r1, r5
 	bl	__aeabi_uidiv
-	ldr	r8, .L2021+64
+	ldr	r8, .L2082+68
 	ldrh	sl, [r8, #0]
 	uxtah	r0, sl, r0
 	add	sl, sl, r0, lsr #2
 	strh	sl, [r8, #0]	@ movhi
-.L2014:
-	ldr	r3, .L2021+60
+.L2076:
+	ldr	r3, .L2082+64
 	ldrh	r3, [r3, #0]
-	cbz	r3, .L2015
-	ldr	r2, .L2021+64
+	cbz	r3, .L2077
+	ldr	r2, .L2082+68
 	ldrh	r1, [r2, #0]
 	add	r1, r1, r3, lsr #1
 	strh	r1, [r2, #0]	@ movhi
 	mul	r1, r5, r3
 	cmp	r1, r4
-	ble	.L2015
-	ldr	r1, .L2021+68
+	ble	.L2077
+	ldr	r1, .L2082+72
 	adds	r3, r3, #32
 	adds	r7, r7, r3
 	strh	r7, [r2, #0]	@ movhi
 	str	r6, [r1, #0]
-.L2015:
-	ldr	r3, .L2021+68
-	ldr	r2, .L2021+64
-	ldr	r6, .L2021+72
+.L2077:
+	ldr	r3, .L2082+72
+	ldr	r2, .L2082+68
+	ldr	r6, .L2082+76
 	ldr	r1, [r3, #0]
 	ldrh	r2, [r2, #0]
-	ldr	r4, .L2021+76
+	ldr	r4, .L2082+80
 	subs	r2, r1, r2
 	muls	r5, r2, r5
-	ldr	r2, .L2021+80
+	ldr	r2, .L2082+84
 	str	r5, [r2, #0]
-	ldr	r2, .L2021+84
+	ldr	r2, .L2082+88
 	ldrh	r2, [r2, #0]
 	muls	r5, r2, r5
 	str	r5, [r3, #0]
-	ldr	r3, .L2021+12
+	ldr	r3, .L2082+16
 	ldrh	r3, [r3, #0]
 	muls	r5, r3, r5
-	ldr	r3, .L2021+88
+	ldr	r3, .L2082+92
 	str	r5, [r3, #0]
 	movw	r5, #65535
 	bl	FtlBbmTblFlush
-	ldr	r3, .L2021+32
+	ldr	r3, .L2082+36
 	movs	r1, #0
 	ldr	r0, [r6, #0]
 	ldrh	r2, [r3, #0]
 	lsls	r2, r2, #1
 	bl	memset
-	ldr	r2, .L2021+92
+	ldr	r2, .L2082+96
 	movs	r3, #0
 	strh	r3, [r4, #2]	@ movhi
 	strb	r3, [r4, #6]
 	movs	r1, #255
 	str	r3, [r2, #0]
-	ldr	r2, .L2021+96
+	ldr	r2, .L2082+100
 	strh	r3, [r4, #0]	@ movhi
 	strh	r3, [r2, #2]	@ movhi
 	strb	r3, [r2, #6]
 	strb	r3, [r2, #8]
 	movs	r3, #1
 	strb	r3, [r4, #8]
-	ldr	r3, .L2021+28
+	ldr	r3, .L2082+32
 	strh	r5, [r2, #0]	@ movhi
 	ldrh	r2, [r3, #0]
-	ldr	r3, .L2021+100
+	ldr	r3, .L2082+104
 	lsrs	r2, r2, #3
 	ldr	r0, [r3, #0]
 	bl	memset
-.L2016:
-	ldr	r7, .L2021+76
+.L2078:
+	ldr	r7, .L2082+80
 	mov	r0, r7
 	bl	make_superblock
 	ldrb	r2, [r4, #7]	@ zero_extendqisi2
-	ldr	r3, .L2021+72
-	cbnz	r2, .L2017
+	ldr	r3, .L2082+76
+	cbnz	r2, .L2079
 	ldrh	r2, [r4, #0]
 	ldr	r3, [r6, #0]
 	strh	r5, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r4, #0]
 	adds	r3, r3, #1
 	strh	r3, [r4, #0]	@ movhi
-	b	.L2016
-.L2017:
-	ldr	r2, .L2021
+	b	.L2078
+.L2079:
+	ldr	r2, .L2082+4
 	movw	r6, #65535
-	ldr	r4, .L2021+104
+	ldr	r4, .L2082+108
 	ldrh	r0, [r7, #4]
 	ldr	r1, [r2, #0]
 	str	r1, [r7, #12]
@@ -18262,52 +18959,53 @@ FtlLowFormat:
 	strh	r2, [r4, #0]	@ movhi
 	movs	r2, #1
 	strb	r2, [r4, #8]
-.L2018:
-	ldr	r5, .L2021+104
+.L2080:
+	ldr	r5, .L2082+108
 	mov	r0, r5
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L2019
+	bne	.L2081
 	ldrh	r2, [r4, #0]
 	ldr	r3, [r7, #0]
 	strh	r6, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r4, #0]
 	adds	r3, r3, #1
 	strh	r3, [r4, #0]	@ movhi
-	b	.L2018
-.L2022:
+	b	.L2080
+.L2083:
 	.align	2
-.L2021:
-	.word	.LANCHOR153
-	.word	.LANCHOR154
+.L2082:
+	.word	.LANCHOR94
+	.word	.LANCHOR156
+	.word	.LANCHOR157
 	.word	.LANCHOR54
 	.word	.LANCHOR71
 	.word	168778952
-	.word	.LANCHOR178
-	.word	.LANCHOR179
+	.word	.LANCHOR182
+	.word	.LANCHOR183
 	.word	.LANCHOR55
 	.word	.LANCHOR56
 	.word	.LANCHOR53
 	.word	.LANCHOR81
-	.word	.LANCHOR88
+	.word	.LANCHOR89
 	.word	.LANCHOR57
-	.word	.LANCHOR126
+	.word	.LANCHOR128
 	.word	.LANCHOR7
 	.word	.LANCHOR64
+	.word	.LANCHOR201
+	.word	.LANCHOR88
+	.word	.LANCHOR101
+	.word	.LANCHOR109
 	.word	.LANCHOR200
-	.word	.LANCHOR87
-	.word	.LANCHOR99
-	.word	.LANCHOR107
-	.word	.LANCHOR199
 	.word	.LANCHOR68
 	.word	.LANCHOR84
-	.word	.LANCHOR116
-	.word	.LANCHOR201
-	.word	.LANCHOR117
-	.word	.LANCHOR108
-.L2019:
-	ldr	r4, .L2023
+	.word	.LANCHOR118
+	.word	.LANCHOR202
+	.word	.LANCHOR119
+	.word	.LANCHOR110
+.L2081:
+	ldr	r4, .L2084
 	ldrh	r1, [r5, #4]
 	ldrh	r2, [r5, #0]
 	ldr	r3, [r4, #0]
@@ -18315,16 +19013,16 @@ FtlLowFormat:
 	adds	r3, r3, #1
 	str	r3, [r4, #0]
 	movw	r5, #65535
-	ldr	r3, .L2023+4
+	ldr	r3, .L2084+4
 	ldr	r3, [r3, #0]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L2023+8
+	ldr	r3, .L2084+8
 	strh	r5, [r3, #0]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L2023+12
+	ldr	r3, .L2084+12
 	movs	r2, #0
 	strh	r2, [r3, #2]	@ movhi
-	ldr	r2, .L2023+16
+	ldr	r2, .L2084+16
 	strh	r5, [r3, #4]	@ movhi
 	ldr	r2, [r2, #0]
 	strh	r2, [r3, #6]	@ movhi
@@ -18335,22 +19033,22 @@ FtlLowFormat:
 	strh	r0, [r3, #0]	@ movhi
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	r0, .L2020
-	ldr	r3, .L2023+20
+	cbnz	r0, .L2062
+	ldr	r3, .L2084+20
 	movs	r2, #1
 	str	r2, [r3, #0]
-.L2020:
+.L2062:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L2024:
+.L2085:
 	.align	2
-.L2023:
-	.word	.LANCHOR153
-	.word	.LANCHOR99
-	.word	.LANCHOR109
-	.word	.LANCHOR191
-	.word	.LANCHOR199
-	.word	.LANCHOR222
+.L2084:
+	.word	.LANCHOR156
+	.word	.LANCHOR101
+	.word	.LANCHOR111
+	.word	.LANCHOR196
+	.word	.LANCHOR200
+	.word	.LANCHOR225
 	.size	FtlLowFormat, .-FtlLowFormat
 	.section	.text.HynixGetReadRetryDefault,"ax",%progbits
 	.align	1
@@ -18361,7 +19059,7 @@ FtlLowFormat:
 HynixGetReadRetryDefault:
 	@ args = 0, pretend = 0, frame = 64
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2114
+	ldr	r3, .L2175
 	movs	r2, #172
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	mov	r4, r0
@@ -18375,16 +19073,16 @@ HynixGetReadRetryDefault:
 	strb	r0, [r3, #5]
 	strb	r1, [r3, #6]
 	strb	r2, [r3, #7]
-	bne	.L2026
+	bne	.L2087
 	movs	r2, #167
 	strb	r2, [r3, #4]
-	ldr	r3, .L2114+4
+	ldr	r3, .L2175+4
 	movs	r2, #247
 	strb	r2, [r3, #17]
-	b	.L2081
-.L2026:
+	b	.L2142
+.L2087:
 	cmp	r4, #3
-	bne	.L2028
+	bne	.L2089
 	movs	r2, #176
 	strb	r2, [r3, #4]
 	movs	r2, #177
@@ -18400,10 +19098,10 @@ HynixGetReadRetryDefault:
 	movs	r2, #182
 	strb	r2, [r3, #10]
 	movs	r2, #183
-	b	.L2108
-.L2028:
+	b	.L2169
+.L2089:
 	cmp	r4, #4
-	bne	.L2029
+	bne	.L2090
 	movs	r5, #204
 	strb	r0, [r3, #9]
 	strb	r5, [r3, #4]
@@ -18416,14 +19114,14 @@ HynixGetReadRetryDefault:
 	strb	r5, [r3, #7]
 	movs	r5, #205
 	strb	r5, [r3, #8]
-.L2108:
+.L2169:
 	movs	r6, #8
 	strb	r2, [r3, #11]
 	mov	r5, r6
-	b	.L2027
-.L2029:
+	b	.L2088
+.L2090:
 	cmp	r4, #5
-	bne	.L2030
+	bne	.L2091
 	movs	r2, #56
 	movs	r6, #8
 	strb	r2, [r3, #4]
@@ -18433,10 +19131,10 @@ HynixGetReadRetryDefault:
 	strb	r2, [r3, #6]
 	movs	r2, #59
 	strb	r2, [r3, #7]
-	b	.L2107
-.L2030:
+	b	.L2168
+.L2091:
 	cmp	r4, #6
-	bne	.L2031
+	bne	.L2092
 	movs	r2, #14
 	movs	r6, #12
 	strb	r2, [r3, #4]
@@ -18446,10 +19144,10 @@ HynixGetReadRetryDefault:
 	strb	r2, [r3, #6]
 	movs	r2, #17
 	strb	r2, [r3, #7]
-	b	.L2107
-.L2031:
+	b	.L2168
+.L2092:
 	cmp	r4, #7
-	bne	.L2081
+	bne	.L2142
 	movs	r2, #176
 	movs	r6, #12
 	strb	r2, [r3, #4]
@@ -18472,21 +19170,21 @@ HynixGetReadRetryDefault:
 	strb	r2, [r3, #12]
 	movs	r2, #213
 	strb	r2, [r3, #13]
-	b	.L2027
-.L2081:
+	b	.L2088
+.L2142:
 	movs	r6, #7
-.L2107:
+.L2168:
 	movs	r5, #4
-.L2027:
+.L2088:
 	subs	r3, r4, #1
 	cmp	r3, #1
-	bhi	.L2103
-	b	.L2112
-.L2038:
-	ldr	r3, .L2114+8
+	bhi	.L2164
+	b	.L2173
+.L2099:
+	ldr	r3, .L2175+8
 	mov	sl, #0
-	ldr	r1, .L2114+12
-	ldr	r4, .L2114+16
+	ldr	r1, .L2175+12
+	ldr	r4, .L2175+16
 	ldrb	r2, [r3, r7]	@ zero_extendqisi2
 	ldr	r0, [r1, r2, lsl #3]
 	add	r4, r4, r2, lsl #6
@@ -18495,7 +19193,7 @@ HynixGetReadRetryDefault:
 	movs	r2, #55
 	adds	r3, r3, #8
 	add	r3, r0, r3, lsl #8
-.L2034:
+.L2095:
 	add	r1, r8, sl
 	str	r2, [r3, #8]
 	movs	r0, #80
@@ -18511,26 +19209,26 @@ HynixGetReadRetryDefault:
 	ldr	r2, [sp, #8]
 	uxtb	r1, sl
 	cmp	r1, r5
-	bcc	.L2034
+	bcc	.L2095
 	movs	r3, #0
-	b	.L2035
-.L2036:
+	b	.L2096
+.L2097:
 	ldrb	ip, [sl, r2, lsl #2]	@ zero_extendqisi2
 	ldrb	r0, [r4, r3]	@ zero_extendqisi2
 	add	r0, ip, r0
 	strb	r0, [r1, r2, lsl #3]
 	adds	r2, r2, #1
 	cmp	r2, #7
-	bne	.L2036
+	bne	.L2097
 	adds	r3, r3, #1
 	cmp	r3, #4
-	beq	.L2037
-.L2035:
+	beq	.L2098
+.L2096:
 	movs	r2, #1
 	adds	r1, r4, r3
 	add	sl, fp, r3
-	b	.L2036
-.L2037:
+	b	.L2097
+.L2098:
 	adds	r7, r7, #1
 	movs	r3, #0
 	strb	r3, [r4, #16]
@@ -18541,21 +19239,21 @@ HynixGetReadRetryDefault:
 	strb	r3, [r4, #48]
 	strb	r3, [r4, #41]
 	strb	r3, [r4, #49]
-	b	.L2032
-.L2112:
-	ldr	r8, .L2114
+	b	.L2093
+.L2173:
+	ldr	r8, .L2175
 	movs	r7, #0
-	ldr	fp, .L2114+4
-.L2032:
-	ldr	r3, .L2114+20
+	ldr	fp, .L2175+4
+.L2093:
+	ldr	r3, .L2175+20
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	cmp	r3, r7
-	bhi	.L2038
-	b	.L2039
-.L2103:
+	bhi	.L2099
+	b	.L2100
+.L2164:
 	subs	r3, r4, #3
 	cmp	r3, #4
-	bhi	.L2039
+	bhi	.L2100
 	smulbb	r3, r5, r6
 	str	r6, [sp, #48]
 	asrs	r2, r3, #2
@@ -18567,12 +19265,12 @@ HynixGetReadRetryDefault:
 	str	r2, [sp, #24]
 	uxtb	r3, r3
 	str	r3, [sp, #56]
-	b	.L2040
-.L2080:
-	ldr	r3, .L2114+8
+	b	.L2101
+.L2141:
+	ldr	r3, .L2175+8
 	ldr	fp, [sp, #20]
 	ldrb	r6, [r3, fp]	@ zero_extendqisi2
-	ldr	r3, .L2114+12
+	ldr	r3, .L2175+12
 	mov	r0, r6
 	ldr	sl, [r3, r6, lsl #3]
 	add	r3, r3, r6, lsl #3
@@ -18585,46 +19283,46 @@ HynixGetReadRetryDefault:
 	bl	NandcWaitFlashReady
 	cmp	r4, #7
 	sxth	r3, r6
-	beq	.L2041
-	ldr	r1, .L2114+16
+	beq	.L2102
+	ldr	r1, .L2175+16
 	add	r3, r1, r3, lsl #6
-	b	.L2109
-.L2041:
+	b	.L2170
+.L2102:
 	lsls	r1, r3, #7
 	add	r3, r1, r3, lsl #5
-	ldr	r1, .L2114+24
+	ldr	r1, .L2175+24
 	adds	r3, r1, r3
-.L2109:
+.L2170:
 	str	r3, [sp, #32]
 	movs	r3, #54
 	cmp	r4, #4
 	str	r3, [r7, #8]
-	bne	.L2043
+	bne	.L2104
 	movs	r3, #255
 	str	r3, [r7, #4]
 	movs	r3, #64
 	str	r3, [sl, r8]
 	movs	r3, #204
-	b	.L2110
-.L2043:
+	b	.L2171
+.L2104:
 	subs	r3, r4, #5
 	cmp	r3, #1
-	bhi	.L2045
-	ldr	r3, .L2114
+	bhi	.L2106
+	ldr	r3, .L2175
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
 	str	r3, [r7, #4]
 	movs	r3, #82
-	b	.L2111
-.L2045:
+	b	.L2172
+.L2106:
 	movs	r3, #174
 	str	r3, [r7, #4]
 	movs	r3, #0
 	str	r3, [sl, r8]
 	movs	r3, #176
-.L2110:
+.L2171:
 	str	r3, [r7, #4]
 	movs	r3, #77
-.L2111:
+.L2172:
 	str	r3, [sl, r8]
 	movs	r3, #22
 	str	r3, [r7, #8]
@@ -18654,94 +19352,94 @@ HynixGetReadRetryDefault:
 	mov	r1, ip
 	str	ip, [sp, #36]
 	cmp	r1, #1
-	bls	.L2083
+	bls	.L2144
 	cmp	r4, #7
 	ite	eq
 	moveq	r1, #32
 	movne	r1, #2
-	b	.L2049
-.L2083:
+	b	.L2110
+.L2144:
 	movs	r1, #16
-.L2049:
-	ldr	r3, .L2114+28
+.L2110:
+	ldr	r3, .L2175+28
 	ldr	r2, [r3, #0]
 	movs	r3, #0
-.L2050:
+.L2111:
 	ldr	r0, [r7, #0]
 	strb	r0, [r2, r3]
 	adds	r3, r3, #1
 	uxtb	r0, r3
 	cmp	r0, r1
-	bcc	.L2050
+	bcc	.L2111
 	cmp	r4, #7
-	bne	.L2051
+	bne	.L2112
 	movs	r3, #0
-.L2053:
+.L2114:
 	ldrb	r1, [r2, #0]	@ zero_extendqisi2
 	cmp	r1, #12
-	beq	.L2052
+	beq	.L2113
 	ldrb	r1, [r2, #1]	@ zero_extendqisi2
 	cmp	r1, #10
-	beq	.L2052
+	beq	.L2113
 	adds	r3, r3, #1
 	adds	r2, r2, #4
 	uxtb	r3, r3
 	cmp	r3, #8
-	bne	.L2053
-	b	.L2054
-.L2052:
+	bne	.L2114
+	b	.L2115
+.L2113:
 	cmp	r3, #6
-	bls	.L2055
-.L2054:
-	ldr	r0, .L2114+32
+	bls	.L2116
+.L2115:
+	ldr	r0, .L2175+32
 	movs	r1, #0
 	bl	printf
-.L2056:
-	b	.L2056
-.L2051:
+.L2117:
+	b	.L2117
+.L2112:
 	cmp	r4, #6
-	bne	.L2055
+	bne	.L2116
 	movs	r3, #0
-.L2057:
+.L2118:
 	ldrb	r1, [r2], #1	@ zero_extendqisi2
 	cmp	r1, #12
-	beq	.L2055
+	beq	.L2116
 	ldrb	r1, [r2, #7]	@ zero_extendqisi2
 	cmp	r1, #4
-	beq	.L2055
+	beq	.L2116
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, #8
-	bne	.L2057
-	b	.L2113
-.L2059:
-	b	.L2059
-.L2115:
+	bne	.L2118
+	b	.L2174
+.L2120:
+	b	.L2120
+.L2176:
 	.align	2
-.L2114:
+.L2175:
 	.word	.LANCHOR31
-	.word	.LANCHOR235
+	.word	.LANCHOR242
 	.word	.LANCHOR19
 	.word	.LANCHOR5
 	.word	.LANCHOR31+20
 	.word	.LANCHOR16
 	.word	.LANCHOR31+28
 	.word	.LANCHOR44
-	.word	.LC36
-.L2055:
-	ldr	r0, .L2116
+	.word	.LC51
+.L2116:
+	ldr	r0, .L2177
 	movs	r3, #0
 	ldr	r0, [r0, #0]
 	str	r0, [sp, #40]
-.L2060:
+.L2121:
 	ldr	r2, [r7, #0]
 	ldr	r1, [sp, #40]
 	strb	r2, [r1, r3]
 	adds	r3, r3, #1
 	ldr	r2, [sp, #52]
 	cmp	r3, r2
-	blt	.L2060
-	ldr	r3, .L2116
+	blt	.L2121
+	ldr	r3, .L2177
 	movs	r2, #8
 	ldr	ip, [sp, #24]
 	ldr	r1, [r3, #0]
@@ -18749,10 +19447,10 @@ HynixGetReadRetryDefault:
 	lsl	fp, ip, #3
 	str	r0, [sp, #44]
 	adds	r0, r1, r0
-.L2062:
+.L2123:
 	movs	r3, #0
 	mov	lr, r3
-.L2061:
+.L2122:
 	ldr	ip, [r0, r3]
 	add	lr, lr, #1
 	mvn	ip, ip
@@ -18760,15 +19458,15 @@ HynixGetReadRetryDefault:
 	ldr	ip, [sp, #24]
 	adds	r3, r3, #4
 	cmp	lr, ip
-	blt	.L2061
+	blt	.L2122
 	subs	r2, r2, #1
 	add	r0, r0, fp
-	bne	.L2062
+	bne	.L2123
 	mov	lr, r1
 	str	r2, [sp, #16]
 	str	r5, [sp, #60]
-	b	.L2063
-.L2067:
+	b	.L2124
+.L2128:
 	movs	r0, #1
 	mov	fp, #16
 	str	r3, [sp, #4]
@@ -18776,7 +19474,7 @@ HynixGetReadRetryDefault:
 	movs	r0, #0
 	mov	ip, r0
 	str	fp, [sp, #28]
-.L2065:
+.L2126:
 	ldr	fp, [lr, r0]
 	ldr	r3, [sp, #44]
 	and	fp, r5, fp
@@ -18787,92 +19485,92 @@ HynixGetReadRetryDefault:
 	addeq	ip, ip, #1
 	subs	r3, r3, #1
 	str	r3, [sp, #28]
-	bne	.L2065
+	bne	.L2126
 	ldr	r3, [sp, #4]
 	cmp	ip, #8
 	it	hi
 	orrhi	r2, r2, r5
 	adds	r3, r3, #1
 	cmp	r3, #32
-	bne	.L2067
+	bne	.L2128
 	ldr	fp, [sp, #16]
 	ldr	ip, [sp, #24]
 	add	fp, fp, #1
 	str	r2, [lr], #4
 	cmp	fp, ip
 	str	fp, [sp, #16]
-	bge	.L2085
-.L2063:
+	bge	.L2146
+.L2124:
 	movs	r2, #0
 	mov	r3, r2
-	b	.L2067
-.L2085:
+	b	.L2128
+.L2146:
 	movs	r3, #0
 	ldr	r5, [sp, #60]
 	mov	r2, r3
-.L2068:
+.L2129:
 	ldr	r0, [r1, r3]
-	cbnz	r0, .L2069
+	cbnz	r0, .L2130
 	adds	r2, r2, #1
-.L2069:
+.L2130:
 	adds	r3, r3, #4
 	cmp	r3, #32
-	bne	.L2068
+	bne	.L2129
 	cmp	r2, #7
-	ble	.L2070
-	ldr	r0, .L2116+4
+	ble	.L2131
+	ldr	r0, .L2177+4
 	movs	r2, #1
 	mov	r3, #1024
 	bl	rknand_print_hex
-	ldr	r0, .L2116+8
+	ldr	r0, .L2177+8
 	movs	r1, #0
 	bl	printf
-.L2071:
-	b	.L2071
-.L2070:
+.L2132:
+	b	.L2132
+.L2131:
 	cmp	r4, #6
-	beq	.L2086
+	beq	.L2147
 	cmp	r4, #7
 	ite	eq
 	moveq	r0, #10
 	movne	r0, #8
 	str	r0, [sp, #16]
-	b	.L2072
-.L2086:
+	b	.L2133
+.L2147:
 	movs	r1, #4
 	str	r1, [sp, #16]
-.L2072:
-	cbz	r5, .L2073
+.L2133:
+	cbz	r5, .L2134
 	ldr	r2, [sp, #56]
 	add	lr, r2, #1
-	b	.L2074
-.L2073:
+	b	.L2135
+.L2134:
 	mov	lr, #1
-.L2074:
+.L2135:
 	ldr	r0, [sp, #40]
 	movs	r2, #0
 	ldr	r1, [sp, #32]
 	mov	fp, r4
-	b	.L2075
-.L2076:
+	b	.L2136
+.L2137:
 	ldrb	ip, [r4], #1	@ zero_extendqisi2
 	strb	ip, [r1, r3]
 	adds	r3, r3, #1
 	uxtb	ip, r3
 	cmp	ip, r5
-	bcc	.L2076
+	bcc	.L2137
 	ldr	ip, [sp, #48]
 	adds	r2, r2, #1
 	ldr	r3, [sp, #16]
 	add	r0, r0, lr
 	cmp	r2, ip
 	add	r1, r1, r3
-	bge	.L2077
-.L2075:
+	bge	.L2138
+.L2136:
 	mov	r4, r0
 	movs	r3, #0
-	b	.L2076
-.L2077:
+	b	.L2137
+.L2138:
 	movs	r3, #255
 	mov	r0, r6
 	str	r3, [r7, #8]
@@ -18880,10 +19578,10 @@ HynixGetReadRetryDefault:
 	bl	NandcWaitFlashReady
 	ldr	r1, [sp, #36]
 	cmp	r1, #1
-	bhi	.L2078
+	bhi	.L2139
 	movs	r3, #54
 	str	r3, [r7, #8]
-	ldr	r3, .L2116+12
+	ldr	r3, .L2177+12
 	mov	r1, #-1
 	ldr	r0, [sp, #20]
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
@@ -18893,41 +19591,41 @@ HynixGetReadRetryDefault:
 	movs	r3, #22
 	str	r3, [r7, #8]
 	bl	FlashReadCmd
-	b	.L2079
-.L2078:
+	b	.L2140
+.L2139:
 	movs	r3, #56
 	str	r3, [r7, #8]
-.L2079:
+.L2140:
 	mov	r0, r6
 	bl	NandcWaitFlashReady
 	ldr	r2, [sp, #20]
 	adds	r3, r2, #1
 	uxtb	r3, r3
 	str	r3, [sp, #20]
-.L2040:
-	ldr	r0, .L2116+16
+.L2101:
+	ldr	r0, .L2177+16
 	ldr	r2, [sp, #20]
 	ldrb	r3, [r0, #0]	@ zero_extendqisi2
 	cmp	r3, r2
-	bhi	.L2080
+	bhi	.L2141
 	ldr	r6, [sp, #48]
-.L2039:
-	ldr	r3, .L2116+12
+.L2100:
+	ldr	r3, .L2177+12
 	strb	r5, [r3, #1]
 	strb	r6, [r3, #2]
 	add	sp, sp, #64
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L2113:
+.L2174:
 	movs	r1, #0
-	ldr	r0, .L2116+8
+	ldr	r0, .L2177+8
 	bl	printf
-	b	.L2059
-.L2117:
+	b	.L2120
+.L2178:
 	.align	2
-.L2116:
+.L2177:
 	.word	.LANCHOR44
-	.word	.LC37
-	.word	.LC36
+	.word	.LC52
+	.word	.LC51
 	.word	.LANCHOR31
 	.word	.LANCHOR16
 	.size	HynixGetReadRetryDefault, .-HynixGetReadRetryDefault
@@ -18943,75 +19641,75 @@ FlashGetReadRetryDefault:
 	@ link register save eliminated.
 	mov	r3, r0
 	cmp	r0, #0
-	beq	.L2118
+	beq	.L2179
 	subs	r2, r0, #1
 	cmp	r2, #6
-	bhi	.L2120
+	bhi	.L2181
 	b	HynixGetReadRetryDefault
-.L2120:
+.L2181:
 	cmp	r0, #49
-	bne	.L2121
-	ldr	r0, .L2129
+	bne	.L2182
+	ldr	r0, .L2190
 	movs	r2, #64
-	ldr	r1, .L2129+4
+	ldr	r1, .L2190+4
 	strb	r3, [r0, #0]
 	movs	r3, #4
 	strb	r3, [r0, #1]
 	movs	r3, #15
 	strb	r3, [r0, #2]
 	adds	r0, r0, #4
-	b	.L2127
-.L2121:
+	b	.L2188
+.L2182:
 	cmp	r0, #33
-	beq	.L2122
+	beq	.L2183
 	cmp	r0, #65
-	beq	.L2122
+	beq	.L2183
 	cmp	r0, #66
-	bne	.L2123
-.L2122:
-	ldr	r0, .L2129
+	bne	.L2184
+.L2183:
+	ldr	r0, .L2190
 	strb	r3, [r0, #0]
 	movs	r3, #4
-	b	.L2128
-.L2123:
+	b	.L2189
+.L2184:
 	cmp	r0, #34
-	beq	.L2124
+	beq	.L2185
 	cmp	r0, #67
-	bne	.L2125
-.L2124:
-	ldr	r0, .L2129
+	bne	.L2186
+.L2185:
+	ldr	r0, .L2190
 	strb	r3, [r0, #0]
 	movs	r3, #5
-.L2128:
+.L2189:
 	strb	r3, [r0, #1]
 	movs	r2, #45
 	movs	r3, #7
-	ldr	r1, .L2129+8
+	ldr	r1, .L2190+8
 	strb	r3, [r0, #2]
 	adds	r0, r0, #4
-	b	.L2127
-.L2125:
+	b	.L2188
+.L2186:
 	cmp	r0, #35
-	beq	.L2126
+	beq	.L2187
 	cmp	r0, #68
-	bne	.L2118
-.L2126:
-	ldr	r0, .L2129
+	bne	.L2179
+.L2187:
+	ldr	r0, .L2190
 	movs	r2, #95
-	ldr	r1, .L2129+12
+	ldr	r1, .L2190+12
 	strb	r3, [r0, #0]
 	movs	r3, #5
 	strb	r3, [r0, #1]
 	movs	r3, #17
 	strb	r3, [r0, #2]
 	adds	r0, r0, #4
-.L2127:
+.L2188:
 	b	memcpy
-.L2118:
+.L2179:
 	bx	lr
-.L2130:
+.L2191:
 	.align	2
-.L2129:
+.L2190:
 	.word	.LANCHOR31
 	.word	.LANCHOR15
 	.word	.LANCHOR10
@@ -19031,51 +19729,51 @@ FlashInit:
 	sub	sp, sp, #24
 	mov	r0, #32768
 	bl	ftl_malloc
-	ldr	r3, .L2180
+	ldr	r3, .L2238
 	movs	r5, #0
-	ldr	r8, .L2180+84
+	ldr	r8, .L2238+84
 	mov	r6, r5
 	str	r0, [r3, #0]
 	mov	r0, #32768
 	bl	ftl_malloc
-	ldr	r3, .L2180+4
+	ldr	r3, .L2238+4
 	str	r0, [r3, #0]
 	mov	r0, #4096
 	bl	ftl_malloc
-	ldr	r3, .L2180+8
+	ldr	r3, .L2238+8
 	str	r0, [r3, #0]
 	mov	r0, #32768
 	bl	ftl_malloc
-	ldr	r3, .L2180+12
+	ldr	r3, .L2238+12
 	str	r0, [r3, #0]
 	mov	r0, #4096
 	bl	ftl_malloc
-	ldr	r3, .L2180+16
-	ldr	r2, .L2180+20
+	ldr	r3, .L2238+16
+	ldr	r2, .L2238+20
 	str	r0, [r3, #0]
 	movs	r3, #50
 	strb	r3, [r2, #0]
 	mov	r0, r4
-	ldr	r2, .L2180+24
-	ldr	r4, .L2180+28
+	ldr	r2, .L2238+24
+	ldr	r4, .L2238+28
 	strb	r3, [r2, #0]
 	movs	r2, #128
-	ldr	r3, .L2180+32
+	ldr	r3, .L2238+32
 	mov	r7, r4
 	str	r5, [r3, #0]
-	ldr	r3, .L2180+36
+	ldr	r3, .L2238+36
 	str	r2, [r3, #0]
 	movs	r2, #60
-	ldr	r3, .L2180+40
+	ldr	r3, .L2238+40
 	strb	r5, [r3, #0]
-	ldr	r3, .L2180+44
+	ldr	r3, .L2238+44
 	str	r5, [r3, #0]
-	ldr	r3, .L2180+48
+	ldr	r3, .L2238+48
 	strb	r5, [r3, #0]
-	ldr	r3, .L2180+52
+	ldr	r3, .L2238+52
 	strb	r2, [r3, #0]
 	bl	NandcInit
-.L2136:
+.L2197:
 	uxtb	r3, r6
 	str	r3, [sp, #16]
 	mov	r0, r3
@@ -19116,10 +19814,10 @@ FlashInit:
 	subs	r3, r2, #1
 	uxtb	r3, r3
 	cmp	r3, #253
-	bhi	.L2132
+	bhi	.L2193
 	ldrb	r1, [r4, #2]	@ zero_extendqisi2
 	ldrb	r3, [r4, #1]	@ zero_extendqisi2
-	ldr	r0, .L2180+56
+	ldr	r0, .L2238+56
 	str	r1, [sp, #0]
 	ldrb	r1, [r4, #3]	@ zero_extendqisi2
 	str	r1, [sp, #4]
@@ -19129,87 +19827,87 @@ FlashInit:
 	str	r1, [sp, #12]
 	adds	r1, r6, #1
 	bl	printf
-.L2132:
-	cbnz	r6, .L2133
+.L2193:
+	cbnz	r6, .L2194
 	ldrb	r3, [r7, #0]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, #253
-	bhi	.L2172
+	bhi	.L2231
 	ldrb	r3, [r7, #1]	@ zero_extendqisi2
 	cmp	r3, #255
-	beq	.L2172
-.L2133:
+	beq	.L2231
+.L2194:
 	ldrb	r3, [r5, r7]	@ zero_extendqisi2
 	cmp	r3, #181
-	bne	.L2135
+	bne	.L2196
 	movs	r3, #44
 	strb	r3, [r5, r7]
-.L2135:
+.L2196:
 	adds	r6, r6, #1
 	adds	r5, r5, #8
 	adds	r4, r4, #8
 	cmp	r6, #4
-	bne	.L2136
-	ldr	r3, .L2180+28
+	bne	.L2197
+	ldr	r3, .L2238+28
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	cmp	r3, #173
-	beq	.L2137
-	ldr	r3, .L2180+60
+	beq	.L2198
+	ldr	r3, .L2238+60
 	ldr	r0, [r3, #0]
 	bl	NandcSetDdrMode
-.L2137:
+.L2198:
 	movs	r1, #0
 	mov	r2, #852
-	ldr	r0, .L2180+64
+	ldr	r0, .L2238+64
 	bl	memset
-	ldr	r2, .L2180+68
-	ldr	r3, .L2180+72
+	ldr	r2, .L2238+68
+	ldr	r3, .L2238+72
 	str	r2, [r3, #0]
 	movs	r2, #0
-	ldr	r3, .L2180+76
+	ldr	r3, .L2238+76
 	strb	r2, [r3, #0]
-	ldr	r3, .L2180+28
+	ldr	r3, .L2238+28
 	ldrb	r3, [r3, #1]	@ zero_extendqisi2
 	cmp	r3, #241
-	beq	.L2138
+	beq	.L2199
 	cmp	r3, #218
-	beq	.L2138
+	beq	.L2199
 	cmp	r3, #220
-	bne	.L2139
-.L2138:
-	ldr	r2, .L2180+48
+	bne	.L2200
+.L2199:
+	ldr	r2, .L2238+48
 	movs	r1, #1
-	ldr	r0, .L2180+28
+	ldr	r0, .L2238+28
 	strb	r1, [r2, #0]
 	movs	r2, #16
-	ldr	r1, .L2180+20
+	ldr	r1, .L2238+20
 	ldrb	r4, [r0, #0]	@ zero_extendqisi2
 	strb	r2, [r1, #0]
 	cmp	r4, #152
-	ldr	r1, .L2180+52
+	ldr	r1, .L2238+52
 	strb	r2, [r1, #0]
-	ldr	r2, .L2180+80
+	ldr	r2, .L2238+80
 	strb	r4, [r2, #1]
-	bne	.L2140
+	bne	.L2201
 	ldrsb	r0, [r0, #4]
 	cmp	r0, #0
-	blt	.L2140
+	blt	.L2201
 	movs	r0, #24
 	strb	r0, [r1, #0]
-.L2140:
+.L2201:
 	cmp	r3, #218
-	bne	.L2141
+	bne	.L2202
 	mov	r1, #2048
-	b	.L2177
-.L2181:
+	b	.L2236
+.L2239:
 	.align	2
-.L2180:
+.L2238:
 	.word	.LANCHOR44
 	.word	.LANCHOR41
-	.word	.LANCHOR234
-	.word	.LANCHOR203
+	.word	.LANCHOR241
 	.word	.LANCHOR204
+	.word	.LANCHOR205
 	.word	.LANCHOR1
 	.word	.LANCHOR49
 	.word	.LANCHOR22
@@ -19219,118 +19917,118 @@ FlashInit:
 	.word	.LANCHOR50
 	.word	.LANCHOR0
 	.word	.LANCHOR45
-	.word	.LC38
-	.word	.LANCHOR187
+	.word	.LC53
+	.word	.LANCHOR192
 	.word	.LANCHOR31
 	.word	.LANCHOR18
 	.word	.LANCHOR23
 	.word	.LANCHOR4
-	.word	.LANCHOR236
+	.word	.LANCHOR243
 	.word	.LANCHOR5
-.L2141:
+.L2202:
 	cmp	r3, #220
-	bne	.L2142
+	bne	.L2203
 	mov	r1, #4096
-.L2177:
+.L2236:
 	strh	r1, [r2, #14]	@ movhi
 	strb	r3, [r2, #2]
-.L2142:
-	ldr	r1, .L2182
+.L2203:
+	ldr	r1, .L2240
 	movs	r2, #32
-	ldr	r0, .L2182+4
+	ldr	r0, .L2240+4
 	bl	memcpy
-	ldr	r0, .L2182+8
-	ldr	r1, .L2182+12
+	ldr	r0, .L2240+8
+	ldr	r1, .L2240+12
 	movs	r2, #32
 	bl	memcpy
-.L2139:
-	ldr	r3, .L2182+16
+.L2200:
+	ldr	r3, .L2240+16
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L2143
+	bne	.L2204
 	bl	FlashLoadPhyInfoInRam
-	cbnz	r0, .L2144
-	ldr	r3, .L2182+20
-	ldr	r4, .L2182+24
+	cbnz	r0, .L2205
+	ldr	r3, .L2240+20
+	ldr	r4, .L2240+24
 	ldr	r3, [r3, #0]
 	ldrh	r0, [r3, #16]
 	ubfx	r0, r0, #8, #3
 	strb	r0, [r4, #0]
 	lsls	r2, r0, #31
-	bmi	.L2144
-	ldr	r3, .L2182+28
+	bmi	.L2205
+	ldr	r3, .L2240+28
 	movs	r2, #1
 	strb	r2, [r3, #0]
 	bl	FlashSetInterfaceMode
 	ldrb	r0, [r4, #0]	@ zero_extendqisi2
 	bl	NandcSetMode
-.L2144:
-	ldr	r4, .L2182+20
+.L2205:
+	ldr	r4, .L2240+20
 	ldr	r3, [r4, #0]
 	ldrb	r2, [r3, #26]	@ zero_extendqisi2
-	ldr	r3, .L2182+32
+	ldr	r3, .L2240+32
 	strb	r2, [r3, #0]
 	bl	FlashLoadPhyInfo
 	cmp	r0, #0
-	beq	.L2143
+	beq	.L2204
 	ldr	r3, [r4, #0]
-	ldr	r0, .L2182+36
+	ldr	r0, .L2240+36
 	ldrh	r1, [r3, #14]
 	bl	printf
 	bl	FlashLoadPhyInfoInRam
 	adds	r3, r0, #1
-	beq	.L2134
+	beq	.L2195
 	bl	FlashDieInfoInit
 	ldr	r3, [r4, #0]
 	ldrb	r0, [r3, #19]	@ zero_extendqisi2
 	bl	FlashGetReadRetryDefault
-	ldr	r1, .L2182+40
+	ldr	r1, .L2240+40
 	ldr	r3, [r4, #0]
 	ldrh	r1, [r1, #0]
 	ldrb	r2, [r3, #9]	@ zero_extendqisi2
 	addw	r1, r1, #4095
 	cmp	r2, r1, lsr #12
-	blt	.L2145
+	blt	.L2206
 	ldrh	r1, [r3, #14]
 	adds	r1, r1, #255
 	cmp	r2, r1, lsr #8
-	bge	.L2146
-.L2145:
+	bge	.L2207
+.L2206:
 	ldrh	r2, [r3, #14]
 	bic	r2, r2, #255
 	strh	r2, [r3, #14]	@ movhi
-.L2146:
-	ldr	r3, .L2182+24
+.L2207:
+	ldr	r3, .L2240+24
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	tst	r3, #6
-	beq	.L2147
+	beq	.L2208
 	bl	FlashSavePhyInfo
-	ldr	r3, .L2182+44
+	ldr	r3, .L2240+44
 	movs	r0, #0
 	ldr	r1, [r3, #0]
 	bl	FlashDdrParaScan
-.L2147:
+.L2208:
 	bl	FlashSavePhyInfo
-.L2143:
-	ldr	r5, .L2182+20
-	ldr	r2, .L2182+32
-	ldr	r4, .L2182+48
+.L2204:
+	ldr	r5, .L2240+20
+	ldr	r2, .L2240+32
+	ldr	r4, .L2240+48
 	ldr	r3, [r5, #0]
 	ldrb	r1, [r3, #26]	@ zero_extendqisi2
 	ldrb	r6, [r3, #18]	@ zero_extendqisi2
 	strb	r1, [r2, #0]
-	ldr	r1, .L2182+52
+	ldr	r1, .L2240+52
 	ldrh	r2, [r3, #16]
 	ubfx	r0, r2, #7, #1
 	strb	r0, [r1, #0]
-	ldr	r1, .L2182+56
+	ldr	r1, .L2240+56
 	ubfx	r0, r2, #3, #1
 	strb	r0, [r1, #0]
 	ubfx	r0, r2, #4, #1
-	ldr	r1, .L2182+60
+	ldr	r1, .L2240+60
 	ubfx	r2, r2, #8, #3
 	strb	r0, [r1, #0]
-	ldr	r1, .L2182+24
+	ldr	r1, .L2240+24
 	ldrh	r0, [r3, #10]
 	strb	r2, [r1, #0]
 	movs	r2, #0
@@ -19344,245 +20042,220 @@ FlashInit:
 	ldr	r3, [r5, #0]
 	ldrh	r2, [r3, #16]
 	lsls	r0, r2, #25
-	bpl	.L2148
+	bpl	.L2209
 	ldrb	r0, [r3, #19]	@ zero_extendqisi2
-	ldr	r2, .L2182+64
-	ldr	r3, .L2182+68
+	ldr	r2, .L2240+64
+	ldr	r3, .L2240+68
 	ldrb	r1, [r2, #1]	@ zero_extendqisi2
 	strb	r0, [r3, #0]
-	ldr	r3, .L2182+72
+	ldr	r3, .L2240+72
 	strb	r1, [r3, #0]
 	ldrb	r1, [r2, #2]	@ zero_extendqisi2
-	ldr	r3, .L2182+76
+	ldr	r3, .L2240+76
 	strb	r1, [r3, #0]
 	subs	r1, r0, #1
 	cmp	r1, #6
-	bhi	.L2149
-	ldr	r3, .L2182+80
+	bhi	.L2210
+	ldr	r3, .L2240+80
 	str	r3, [r4, #0]
 	subs	r3, r0, #5
 	cmp	r3, #1
-	bhi	.L2150
-	ldr	r3, .L2182+84
+	bhi	.L2211
+	ldr	r3, .L2240+84
 	movs	r2, #1
 	str	r2, [r3, #0]
-	b	.L2151
-.L2150:
+	b	.L2212
+.L2211:
 	cmp	r0, #7
-	beq	.L2174
-.L2151:
-	ldr	r1, .L2182+88
-	b	.L2152
-.L2174:
+	beq	.L2233
+.L2212:
+	ldr	r1, .L2240+88
+	b	.L2213
+.L2233:
 	add	r1, r2, #28
-.L2152:
+.L2213:
 	movs	r3, #0
 	mov	r2, r3
-.L2154:
+.L2215:
 	ldrsb	r4, [r1, r2]
-	cbnz	r4, .L2153
+	cbnz	r4, .L2214
 	adds	r3, r3, #1
-.L2153:
+.L2214:
 	adds	r2, r2, #1
 	cmp	r2, #32
-	bne	.L2154
+	bne	.L2215
 	cmp	r3, #27
-	bls	.L2148
+	bls	.L2209
 	bl	FlashGetReadRetryDefault
 	bl	FlashSavePhyInfo
-	b	.L2148
-.L2149:
+	b	.L2209
+.L2210:
 	sub	r2, r0, #17
 	cmp	r2, #2
-	bhi	.L2155
-	ldr	r2, .L2182+92
+	bhi	.L2216
+	ldr	r2, .L2240+92
 	str	r2, [r4, #0]
 	movs	r2, #7
 	cmp	r0, #19
 	strb	r2, [r3, #0]
-	bne	.L2148
+	bne	.L2209
 	movs	r2, #15
-	b	.L2178
-.L2155:
+	b	.L2237
+.L2216:
 	cmp	r0, #33
-	beq	.L2156
+	beq	.L2217
 	cmp	r0, #65
-	beq	.L2156
+	beq	.L2217
 	cmp	r0, #66
-	bne	.L2157
-.L2156:
-	ldr	r2, .L2182+96
-	ldr	r3, .L2182+48
+	bne	.L2218
+.L2217:
+	ldr	r2, .L2240+96
+	ldr	r3, .L2240+48
 	str	r2, [r3, #0]
 	movs	r2, #4
-	ldr	r3, .L2182+72
+	ldr	r3, .L2240+72
 	strb	r2, [r3, #0]
 	movs	r2, #7
-	ldr	r3, .L2182+76
-	b	.L2178
-.L2157:
+	ldr	r3, .L2240+76
+	b	.L2237
+.L2218:
 	cmp	r0, #67
-	beq	.L2158
+	beq	.L2219
 	cmp	r0, #34
-	beq	.L2158
+	beq	.L2219
 	cmp	r0, #35
-	beq	.L2158
+	beq	.L2219
 	cmp	r0, #68
-	bne	.L2159
-.L2158:
-	ldr	r2, .L2182+96
-	ldr	r3, .L2182+48
+	bne	.L2220
+.L2219:
+	ldr	r2, .L2240+96
+	ldr	r3, .L2240+48
 	str	r2, [r3, #0]
 	movs	r2, #7
-	ldr	r3, .L2182+76
+	ldr	r3, .L2240+76
 	cmp	r0, #35
 	strb	r2, [r3, #0]
-	beq	.L2160
+	beq	.L2221
 	cmp	r0, #68
-	bne	.L2161
-.L2160:
+	bne	.L2222
+.L2221:
 	movs	r2, #17
 	strb	r2, [r3, #0]
-.L2161:
+.L2222:
 	subs	r0, r0, #67
-	ldr	r3, .L2182+72
+	ldr	r3, .L2240+72
 	cmp	r0, #1
-	bhi	.L2162
+	bhi	.L2223
 	movs	r2, #4
-.L2178:
+.L2237:
 	strb	r2, [r3, #0]
-	b	.L2148
-.L2162:
+	b	.L2209
+.L2223:
 	movs	r2, #5
-	b	.L2178
-.L2159:
+	b	.L2237
+.L2241:
+	.align	2
+.L2240:
+	.word	.LANCHOR27+32
+	.word	.LANCHOR6
+	.word	.LANCHOR18
+	.word	.LANCHOR243
+	.word	.LANCHOR0
+	.word	.LANCHOR23
+	.word	.LANCHOR34
+	.word	.LANCHOR35
+	.word	.LANCHOR7
+	.word	.LC54
+	.word	.LANCHOR24
+	.word	.LANCHOR47
+	.word	.LANCHOR51
+	.word	.LANCHOR4
+	.word	.LANCHOR194
+	.word	.LANCHOR33
+	.word	.LANCHOR31
+	.word	.LANCHOR11
+	.word	.LANCHOR14
+	.word	.LANCHOR42
+	.word	HynixReadRetrial
+	.word	.LANCHOR39
+	.word	.LANCHOR31+20
+	.word	MicronReadRetrial
+	.word	ToshibaReadRetrial
+.L2220:
 	cmp	r0, #49
-	bne	.L2148
-	ldr	r2, .L2182+100
-	ldr	r3, .L2182+48
+	bne	.L2209
+	ldr	r2, .L2242
+	ldr	r3, .L2242+4
 	str	r2, [r3, #0]
-.L2148:
-	ldr	r3, .L2182+104
+.L2209:
+	ldr	r3, .L2242+8
 	ldr	r2, [r3, #0]
-	ldr	r3, .L2182+108
+	ldr	r3, .L2242+12
 	cmp	r2, r3
-	bne	.L2163
-	ldr	r3, .L2182+32
+	bne	.L2224
+	ldr	r3, .L2242+16
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L2163
-	ldr	r3, .L2182+20
+	cbz	r3, .L2224
+	ldr	r3, .L2242+20
 	movs	r2, #0
 	ldr	r3, [r3, #0]
 	strb	r2, [r3, #18]
-.L2163:
-	ldr	r3, .L2182+112
+.L2224:
+	ldr	r3, .L2242+24
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	cmp	r3, #44
-	bne	.L2164
-	ldr	r3, .L2182+28
+	bne	.L2225
+	ldr	r3, .L2242+28
 	ldrb	r2, [r3, #0]	@ zero_extendqisi2
-	cbz	r2, .L2164
+	cbz	r2, .L2225
 	movs	r2, #0
 	movs	r0, #1
 	strb	r2, [r3, #0]
 	bl	FlashSetInterfaceMode
 	movs	r0, #1
 	bl	NandcSetMode
-.L2164:
+.L2225:
 	movs	r0, #0
 	bl	flash_enter_slc_mode
-	ldr	r3, .L2182+24
+	ldr	r3, .L2242+32
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	tst	r3, #6
-	beq	.L2165
-	ldr	r2, .L2182+28
+	beq	.L2226
+	ldr	r2, .L2242+28
 	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	cbnz	r2, .L2166
+	cbnz	r2, .L2227
 	lsls	r1, r3, #31
-	bmi	.L2165
-.L2166:
-	ldr	r3, .L2182+44
+	bmi	.L2226
+.L2227:
+	ldr	r3, .L2242+36
 	movs	r0, #0
 	ldr	r1, [r3, #0]
 	bl	FlashDdrParaScan
-.L2165:
+.L2226:
+	ldr	r4, .L2242+20
 	movs	r0, #0
 	bl	flash_exit_slc_mode
-	ldr	r3, .L2182+20
-	ldr	r3, [r3, #0]
+	mov	r8, #16
+	ldr	r3, [r4, #0]
 	ldrb	r0, [r3, #20]	@ zero_extendqisi2
 	bl	FlashBchSel
-	ldr	r0, .L2182+116
+	ldr	r0, .L2242+40
 	bl	FlashReadIdbDataRaw
-	ldr	r3, .L2182+120
-	cmp	r0, #0
-	bne	.L2167
-	ldr	r2, .L2182+124
-	ldrb	r1, [r3, #0]	@ zero_extendqisi2
-	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	cmp	r1, r2
-	it	hi
-	strbhi	r2, [r3, #0]
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cmp	r3, #15
-	bhi	.L2169
-	movs	r2, #16
-	ldr	r3, .L2182+120
-	b	.L2179
-.L2183:
-	.align	2
-.L2182:
-	.word	.LANCHOR27+32
-	.word	.LANCHOR6
-	.word	.LANCHOR18
-	.word	.LANCHOR236
-	.word	.LANCHOR0
-	.word	.LANCHOR23
-	.word	.LANCHOR34
-	.word	.LANCHOR35
-	.word	.LANCHOR7
-	.word	.LC39
-	.word	.LANCHOR24
-	.word	.LANCHOR47
-	.word	.LANCHOR51
-	.word	.LANCHOR4
-	.word	.LANCHOR189
-	.word	.LANCHOR33
-	.word	.LANCHOR31
-	.word	.LANCHOR11
-	.word	.LANCHOR14
-	.word	.LANCHOR42
-	.word	HynixReadRetrial
-	.word	.LANCHOR39
-	.word	.LANCHOR31+20
-	.word	MicronReadRetrial
-	.word	ToshibaReadRetrial
-	.word	SamsungReadRetrial
-	.word	.LANCHOR40
-	.word	1446522928
-	.word	.LANCHOR22
-	.word	.LANCHOR25
-	.word	.LANCHOR1
-	.word	.LANCHOR49
-.L2167:
-	movs	r2, #16
-.L2179:
-	strb	r2, [r3, #0]
-.L2169:
-	ldr	r3, .L2184
-	ldr	r4, .L2184+4
-	ldr	r5, [r3, #0]
+	ldr	r5, [r4, #0]
+	ldr	r3, .L2242+44
+	ldr	r4, .L2242+48
 	ldrb	r1, [r5, #12]	@ zero_extendqisi2
+	strb	r8, [r3, #0]
 	ldrh	r6, [r5, #10]
-	ldrh	r7, [r5, #14]
 	strh	r1, [r4, #8]	@ movhi
-	mov	r0, r6
 	ldrb	r3, [r5, #7]	@ zero_extendqisi2
+	mov	r0, r6
+	ldrh	r7, [r5, #14]
 	str	r3, [r4, #4]
-	ldr	r3, .L2184+8
+	ldr	r3, .L2242+24
 	ldr	r3, [r3, #0]
 	str	r3, [r4, #0]
-	ldr	r3, .L2184+12
+	ldr	r3, .L2242+52
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	strh	r3, [r4, #10]	@ movhi
 	ldrb	r3, [r5, #13]	@ zero_extendqisi2
@@ -19596,43 +20269,48 @@ FlashInit:
 	muls	r6, r3, r6
 	strh	r2, [r4, #24]	@ movhi
 	uxth	r6, r6
-	ldr	r2, .L2184+16
+	ldr	r2, .L2242+56
 	strh	r3, [r4, #20]	@ movhi
 	strh	r6, [r4, #22]	@ movhi
-	ldrb	r1, [r2, #0]	@ zero_extendqisi2
-	strh	r1, [r4, #26]	@ movhi
-	ldr	r1, .L2184+20
-	ldrb	r1, [r1, #0]	@ zero_extendqisi2
-	cmp	r1, #1
-	bne	.L2170
+	ldrb	r2, [r2, #0]	@ zero_extendqisi2
+	strh	r8, [r4, #26]	@ movhi
+	cmp	r2, #1
+	bne	.L2229
 	lsls	r3, r3, #1
-	movs	r1, #16
 	lsrs	r7, r7, #1
 	strh	r3, [r4, #20]	@ movhi
 	lsls	r6, r6, #1
 	movs	r3, #8
-	strb	r1, [r2, #0]
 	strh	r7, [r4, #14]	@ movhi
 	strh	r6, [r4, #22]	@ movhi
 	strh	r3, [r4, #26]	@ movhi
-.L2170:
+.L2229:
 	ldrb	r0, [r5, #20]	@ zero_extendqisi2
 	bl	FlashBchSel
 	movs	r0, #0
-	b	.L2134
-.L2172:
+	b	.L2195
+.L2231:
 	mvn	r0, #1
-.L2134:
+.L2195:
 	add	sp, sp, #24
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L2185:
+.L2243:
 	.align	2
-.L2184:
+.L2242:
+	.word	SamsungReadRetrial
+	.word	.LANCHOR51
+	.word	.LANCHOR40
+	.word	1446522928
+	.word	.LANCHOR7
 	.word	.LANCHOR23
-	.word	.LANCHOR28
 	.word	.LANCHOR22
-	.word	.LANCHOR16
+	.word	.LANCHOR35
+	.word	.LANCHOR34
+	.word	.LANCHOR47
+	.word	.LANCHOR25
 	.word	.LANCHOR1
+	.word	.LANCHOR28
+	.word	.LANCHOR16
 	.word	.LANCHOR0
 	.size	FlashInit, .-FlashInit
 	.section	.text.rk_ftl_init,"ax",%progbits
@@ -19647,20 +20325,20 @@ rk_ftl_init:
 	push	{r4, lr}
 	bl	FlashInit
 	mov	r4, r0
-	cbnz	r0, .L2187
-	ldr	r0, .L2188
+	cbnz	r0, .L2245
+	ldr	r0, .L2246
 	bl	FtlInit
-.L2187:
+.L2245:
 	mov	r1, r4
-	ldr	r0, .L2188+4
+	ldr	r0, .L2246+4
 	bl	printf
 	mov	r0, r4
 	pop	{r4, pc}
-.L2189:
+.L2247:
 	.align	2
-.L2188:
+.L2246:
 	.word	.LANCHOR28
-	.word	.LC40
+	.word	.LC55
 	.size	rk_ftl_init, .-rk_ftl_init
 	.global	gc_ink_free_return_value
 	.global	FtlUpdateVaildLpnCount
@@ -19678,6 +20356,8 @@ rk_ftl_init:
 	.global	gSlcNandParaInfo
 	.global	gNandParaInfo
 	.global	NandFlashParaTbl
+	.global	g_page_map_check_enable
+	.global	g_power_lost_ecc_error_blk
 	.global	g_power_lost_recovery_flag
 	.global	c_mlc_erase_count_value
 	.global	g_recovery_ppa_tbl
@@ -19709,6 +20389,9 @@ rk_ftl_init:
 	.global	g_gc_blk_index
 	.global	g_gc_merge_free_blk_threshold
 	.global	g_gc_free_blk_threshold
+	.global	g_gc_refresh_block_temp_tbl
+	.global	g_free_slc_blk_num
+	.global	g_gc_refresh_block_temp_num
 	.global	g_gc_bad_block_temp_tbl
 	.global	g_gc_bad_block_gc_index
 	.global	g_gc_bad_block_temp_num
@@ -19742,6 +20425,7 @@ rk_ftl_init:
 	.global	p_vendor_block_valid_page_count
 	.global	p_vendor_block_table
 	.global	g_totle_map_block
+	.global	p_map_region_ppn_check_table
 	.global	p_map_region_ppn_table
 	.global	p_map_block_ver_table
 	.global	p_map_block_valid_page_count
@@ -19779,6 +20463,7 @@ rk_ftl_init:
 	.global	gSysFreeQueue
 	.global	gSysInfo
 	.global	gBbtInfo
+	.global	g_flash_read_only_en
 	.global	g_inkDie_check_enable
 	.global	g_SlcPartLbaEndSector
 	.global	g_MaxLbn
@@ -19884,34 +20569,34 @@ rk_ftl_init:
 	.byte	16
 	.section	.bss.g_recovery_ppa_tbl,"aw",%nobits
 	.align	2
-.LANCHOR226 = . + 0
+.LANCHOR232 = . + 0
 	.type	g_recovery_ppa_tbl, %object
 	.size	g_recovery_ppa_tbl, 128
 g_recovery_ppa_tbl:
 	.space	128
 	.section	.bss.p_blk_mode_table,"aw",%nobits
 	.align	2
-.LANCHOR117 = . + 0
+.LANCHOR119 = . + 0
 	.type	p_blk_mode_table, %object
 	.size	p_blk_mode_table, 4
 p_blk_mode_table:
 	.space	4
-	.section	.rodata.__func__.8224,"a",%progbits
-.LANCHOR220 = . + 0
-	.type	__func__.8224, %object
-	.size	__func__.8224, 19
-__func__.8224:
-	.ascii	"FtlGcFreeTempBlock\000"
+	.section	.rodata.__func__.7399,"a",%progbits
+.LANCHOR240 = . + 0
+	.type	__func__.7399, %object
+	.size	__func__.7399, 10
+__func__.7399:
+	.ascii	"ftl_write\000"
 	.section	.bss.p_gc_blk_tbl,"aw",%nobits
 	.align	2
-.LANCHOR143 = . + 0
+.LANCHOR146 = . + 0
 	.type	p_gc_blk_tbl, %object
 	.size	p_gc_blk_tbl, 4
 p_gc_blk_tbl:
 	.space	4
 	.section	.bss.g_ect_tbl_power_up_flush,"aw",%nobits
 	.align	1
-.LANCHOR214 = . + 0
+.LANCHOR218 = . + 0
 	.type	g_ect_tbl_power_up_flush, %object
 	.size	g_ect_tbl_power_up_flush, 2
 g_ect_tbl_power_up_flush:
@@ -19950,6 +20635,12 @@ gNandParaInfo:
 	.byte	0
 	.byte	0
 	.space	4
+	.section	.rodata.__func__.8085,"a",%progbits
+.LANCHOR127 = . + 0
+	.type	__func__.8085, %object
+	.size	__func__.8085, 16
+__func__.8085:
+	.ascii	"make_superblock\000"
 	.section	.bss.gNandRandomizer,"aw",%nobits
 .LANCHOR4 = . + 0
 	.type	gNandRandomizer, %object
@@ -19964,7 +20655,7 @@ gNandRandomizer:
 gDieOp:
 	.space	128
 	.section	.data.refValueDefault,"aw",%progbits
-.LANCHOR235 = . + 0
+.LANCHOR242 = . + 0
 	.type	refValueDefault, %object
 	.size	refValueDefault, 28
 refValueDefault:
@@ -20004,17 +20695,11 @@ gFlashToggleModeEn:
 	.space	1
 	.section	.bss.g_sys_ext_data,"aw",%nobits
 	.align	2
-.LANCHOR141 = . + 0
+.LANCHOR144 = . + 0
 	.type	g_sys_ext_data, %object
 	.size	g_sys_ext_data, 512
 g_sys_ext_data:
 	.space	512
-	.section	.rodata.__func__.8120,"a",%progbits
-.LANCHOR209 = . + 0
-	.type	__func__.8120, %object
-	.size	__func__.8120, 25
-__func__.8120:
-	.ascii	"allocate_data_superblock\000"
 	.section	.bss.c_ftl_nand_page_pre_super_blk,"aw",%nobits
 	.align	1
 .LANCHOR70 = . + 0
@@ -20024,7 +20709,7 @@ c_ftl_nand_page_pre_super_blk:
 	.space	2
 	.section	.bss.g_inkDie_check_enable,"aw",%nobits
 	.align	2
-.LANCHOR126 = . + 0
+.LANCHOR128 = . + 0
 	.type	g_inkDie_check_enable, %object
 	.size	g_inkDie_check_enable, 4
 g_inkDie_check_enable:
@@ -20035,16 +20720,22 @@ g_inkDie_check_enable:
 	.size	gNandFlashEccBits, 1
 gNandFlashEccBits:
 	.space	1
+	.section	.rodata.__func__.7688,"a",%progbits
+.LANCHOR220 = . + 0
+	.type	__func__.7688, %object
+	.size	__func__.7688, 16
+__func__.7688:
+	.ascii	"load_l2p_region\000"
 	.section	.bss.c_ftl_nand_data_op_blks_per_plane,"aw",%nobits
 	.align	1
-.LANCHOR200 = . + 0
+.LANCHOR201 = . + 0
 	.type	c_ftl_nand_data_op_blks_per_plane, %object
 	.size	c_ftl_nand_data_op_blks_per_plane, 2
 c_ftl_nand_data_op_blks_per_plane:
 	.space	2
 	.section	.bss.p_sys_data_buf_1,"aw",%nobits
 	.align	2
-.LANCHOR176 = . + 0
+.LANCHOR180 = . + 0
 	.type	p_sys_data_buf_1, %object
 	.size	p_sys_data_buf_1, 4
 p_sys_data_buf_1:
@@ -20055,12 +20746,6 @@ p_sys_data_buf_1:
 	.size	g_maxRetryCount, 1
 g_maxRetryCount:
 	.space	1
-	.section	.rodata.__func__.7721,"a",%progbits
-.LANCHOR212 = . + 0
-	.type	__func__.7721, %object
-	.size	__func__.7721, 16
-__func__.7721:
-	.ascii	"FtlMapWritePage\000"
 	.section	.bss.gMultiPageProgEn,"aw",%nobits
 .LANCHOR33 = . + 0
 	.type	gMultiPageProgEn, %object
@@ -20074,6 +20759,12 @@ gMultiPageProgEn:
 	.size	gMasterInfo, 32
 gMasterInfo:
 	.space	32
+	.section	.bss.g_gc_refresh_block_temp_tbl,"aw",%nobits
+	.align	1
+	.type	g_gc_refresh_block_temp_tbl, %object
+	.size	g_gc_refresh_block_temp_tbl, 34
+g_gc_refresh_block_temp_tbl:
+	.space	34
 	.section	.bss.gReadRetryInfo,"aw",%nobits
 .LANCHOR31 = . + 0
 	.type	gReadRetryInfo, %object
@@ -20095,14 +20786,14 @@ gToggleModeClkDiv:
 	.space	4
 	.section	.bss.p_valid_page_count_table,"aw",%nobits
 	.align	2
-.LANCHOR99 = . + 0
+.LANCHOR101 = . + 0
 	.type	p_valid_page_count_table, %object
 	.size	p_valid_page_count_table, 4
 p_valid_page_count_table:
 	.space	4
 	.section	.bss.req_erase,"aw",%nobits
 	.align	2
-.LANCHOR93 = . + 0
+.LANCHOR95 = . + 0
 	.type	req_erase, %object
 	.size	req_erase, 4
 req_erase:
@@ -20134,7 +20825,7 @@ gNandIDBResBlkNumSaveInFlash:
 	.space	1
 	.section	.bss.g_MaxLbn,"aw",%nobits
 	.align	2
-.LANCHOR199 = . + 0
+.LANCHOR200 = . + 0
 	.type	g_MaxLbn, %object
 	.size	g_MaxLbn, 4
 g_MaxLbn:
@@ -20145,39 +20836,32 @@ g_MaxLbn:
 	.size	g_retryMode, 1
 g_retryMode:
 	.space	1
-	.section	.bss.gMasterTempBuf,"aw",%nobits
-	.align	2
-.LANCHOR188 = . + 0
-	.type	gMasterTempBuf, %object
-	.size	gMasterTempBuf, 4
-gMasterTempBuf:
-	.space	4
+	.section	.bss.g_page_map_check_enable,"aw",%nobits
+	.align	1
+.LANCHOR85 = . + 0
+	.type	g_page_map_check_enable, %object
+	.size	g_page_map_check_enable, 2
+g_page_map_check_enable:
+	.space	2
 	.section	.rodata.__func__.7617,"a",%progbits
-.LANCHOR106 = . + 0
+.LANCHOR107 = . + 0
 	.type	__func__.7617, %object
 	.size	__func__.7617, 17
 __func__.7617:
-	.ascii	"List_remove_node\000"
-	.section	.bss.gpFlashSaveInfo,"aw",%nobits
-	.align	2
-.LANCHOR43 = . + 0
-	.type	gpFlashSaveInfo, %object
-	.size	gpFlashSaveInfo, 4
-gpFlashSaveInfo:
-	.space	4
+	.ascii	"INSERT_FREE_LIST\000"
+	.section	.rodata.__func__.7462,"a",%progbits
+.LANCHOR92 = . + 0
+	.type	__func__.7462, %object
+	.size	__func__.7462, 14
+__func__.7462:
+	.ascii	"FtlBbt2Bitmap\000"
 	.section	.bss.g_GlobalSysVersion,"aw",%nobits
 	.align	2
-.LANCHOR153 = . + 0
+.LANCHOR156 = . + 0
 	.type	g_GlobalSysVersion, %object
 	.size	g_GlobalSysVersion, 4
 g_GlobalSysVersion:
 	.space	4
-	.section	.rodata.__func__.7840,"a",%progbits
-.LANCHOR192 = . + 0
-	.type	__func__.7840, %object
-	.size	__func__.7840, 14
-__func__.7840:
-	.ascii	"FtlScanSysBlk\000"
 	.section	.bss.gpReadRetrial,"aw",%nobits
 	.align	2
 .LANCHOR51 = . + 0
@@ -20210,23 +20894,23 @@ gpReadRetrial:
 .LC11:
 	.ascii	"!!!!! FTL sys Error !!!!!\000"
 .LC12:
-	.ascii	"%s 0x%x:\000"
+	.ascii	"remove_from_free_sys_Queue %x\012\000"
 .LC13:
-	.ascii	"%x \000"
+	.ascii	"%s 0x%x:\000"
 .LC14:
-	.ascii	"\000"
+	.ascii	"%x \000"
 .LC15:
-	.ascii	"Read pageadd=%x  ecc=%x err=%x\012\000"
+	.ascii	"\000"
 .LC16:
-	.ascii	"data:\000"
+	.ascii	"Read pageadd=%x  ecc=%x err=%x\012\000"
 .LC17:
-	.ascii	"spare:\000"
+	.ascii	"data:\000"
 .LC18:
-	.ascii	"ReadRetry pageadd=%x ecc=%x err=%x\012\000"
+	.ascii	"spare:\000"
 .LC19:
-	.ascii	"slc mode\000"
+	.ascii	"ReadRetry pageadd=%x ecc=%x err=%x\012\000"
 .LC20:
-	.ascii	"no ect\000"
+	.ascii	"FtlGcScanTempBlkError ID %x %x!!!!!!! \012\000"
 .LC21:
 	.ascii	"prog error: = %x\012\000"
 .LC22:
@@ -20246,26 +20930,57 @@ gpReadRetrial:
 .LC29:
 	.ascii	"decrement_vpc_count %x = %d\012\000"
 .LC30:
-	.ascii	"FtlMapWritePage error = %x \012\000"
+	.ascii	"ftl_map_blk_gc blk info: %x %x %x\012\000"
 .LC31:
-	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
+	.ascii	"page map lost: %x %x\012\000"
 .LC32:
-	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
+	.ascii	"FtlMapWritePage error = %x \012\000"
 .LC33:
-	.ascii	"spuer block %x vpn is 0\012 \000"
+	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
 .LC34:
-	.ascii	"FtlWrite: lpa error:%x %x\012\000"
+	.ascii	"FtlVendorPartRead refresh = %x phyAddr = %x\012\000"
 .LC35:
-	.ascii	"BBT:\000"
+	.ascii	"slc mode\000"
 .LC36:
-	.ascii	"otp error! %d\000"
+	.ascii	"no ect\000"
 .LC37:
-	.ascii	"rr\000"
+	.ascii	"page map lost %x %x %x %x\012\000"
 .LC38:
-	.ascii	"No.%d FLASH ID:%x %x %x %x %x %x\012\000"
+	.ascii	"load_l2p_region refresh = %x phyAddr = %x\012\000"
 .LC39:
-	.ascii	"FlashLoadPhyInfo fail %x!!\012\000"
+	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
 .LC40:
+	.ascii	"GC des block %x done\012\000"
+.LC41:
+	.ascii	"RSB refresh addr %x \012\000"
+.LC42:
+	.ascii	"spuer block %x vpn is 0\012 \000"
+.LC43:
+	.ascii	"g_recovery_ppa %x ver %x\012 \000"
+.LC44:
+	.ascii	"fix power lost blk = %x vpc=%x\012\000"
+.LC45:
+	.ascii	"erase power lost blk = %x vpc=%x\012\000"
+.LC46:
+	.ascii	"FTL version: 5.0.47 20171110\000"
+.LC47:
+	.ascii	"...%s: no bad block mapping table, format device\012"
+	.ascii	"\000"
+.LC48:
+	.ascii	"...%s FtlSysBlkInit error ,format device!\012\000"
+.LC49:
+	.ascii	"FtlWrite: lpa error:%x %x\012\000"
+.LC50:
+	.ascii	"BBT:\000"
+.LC51:
+	.ascii	"otp error! %d\000"
+.LC52:
+	.ascii	"rr\000"
+.LC53:
+	.ascii	"No.%d FLASH ID:%x %x %x %x %x %x\012\000"
+.LC54:
+	.ascii	"FlashLoadPhyInfo fail %x!!\012\000"
+.LC55:
 	.ascii	"FtlInit %x\012\000"
 	.section	.bss.gNandFlashIdbBlockAddr,"aw",%nobits
 	.align	2
@@ -20276,28 +20991,33 @@ gNandFlashIdbBlockAddr:
 	.space	4
 	.section	.bss.req_sys,"aw",%nobits
 	.align	2
-.LANCHOR197 = . + 0
+.LANCHOR198 = . + 0
 	.type	req_sys, %object
 	.size	req_sys, 36
 req_sys:
 	.space	36
-	.section	.bss.gFlashSpareBuffer,"aw",%nobits
-	.align	2
-.LANCHOR234 = . + 0
-	.type	gFlashSpareBuffer, %object
-	.size	gFlashSpareBuffer, 4
-gFlashSpareBuffer:
-	.space	4
+	.section	.rodata.__func__.7998,"a",%progbits
+.LANCHOR222 = . + 0
+	.type	__func__.7998, %object
+	.size	__func__.7998, 16
+__func__.7998:
+	.ascii	"FtlReUsePrevPpa\000"
+	.section	.rodata.__func__.7856,"a",%progbits
+.LANCHOR206 = . + 0
+	.type	__func__.7856, %object
+	.size	__func__.7856, 15
+__func__.7856:
+	.ascii	"FtlVpcTblFlush\000"
 	.section	.bss.p_vendor_block_ver_table,"aw",%nobits
 	.align	2
-.LANCHOR185 = . + 0
+.LANCHOR189 = . + 0
 	.type	p_vendor_block_ver_table, %object
 	.size	p_vendor_block_ver_table, 4
 p_vendor_block_ver_table:
 	.space	4
 	.section	.bss.g_gc_next_blk,"aw",%nobits
 	.align	1
-.LANCHOR146 = . + 0
+.LANCHOR149 = . + 0
 	.type	g_gc_next_blk, %object
 	.size	g_gc_next_blk, 2
 g_gc_next_blk:
@@ -20316,12 +21036,19 @@ mlcPageToSlcPageTbl:
 	.size	c_ftl_nand_sec_pre_page_shift, 2
 c_ftl_nand_sec_pre_page_shift:
 	.space	2
-	.section	.rodata.__func__.8134,"a",%progbits
-.LANCHOR217 = . + 0
-	.type	__func__.8134, %object
-	.size	__func__.8134, 29
-__func__.8134:
-	.ascii	"allocate_new_data_superblock\000"
+	.section	.bss.g_flash_read_only_en,"aw",%nobits
+	.align	2
+.LANCHOR94 = . + 0
+	.type	g_flash_read_only_en, %object
+	.size	g_flash_read_only_en, 4
+g_flash_read_only_en:
+	.space	4
+	.section	.rodata.__func__.8218,"a",%progbits
+.LANCHOR208 = . + 0
+	.type	__func__.8218, %object
+	.size	__func__.8218, 20
+__func__.8218:
+	.ascii	"decrement_vpc_count\000"
 	.section	.bss.read_retry_cur_offset,"aw",%nobits
 .LANCHOR32 = . + 0
 	.type	read_retry_cur_offset, %object
@@ -20330,7 +21057,7 @@ read_retry_cur_offset:
 	.space	4
 	.section	.bss.p_vendor_block_valid_page_count,"aw",%nobits
 	.align	2
-.LANCHOR184 = . + 0
+.LANCHOR188 = . + 0
 	.type	p_vendor_block_valid_page_count, %object
 	.size	p_vendor_block_valid_page_count, 4
 p_vendor_block_valid_page_count:
@@ -20342,29 +21069,36 @@ p_vendor_block_valid_page_count:
 	.size	gNandcVer, 4
 gNandcVer:
 	.space	4
+	.section	.rodata.__func__.7732,"a",%progbits
+.LANCHOR212 = . + 0
+	.type	__func__.7732, %object
+	.size	__func__.7732, 15
+__func__.7732:
+	.ascii	"ftl_map_blk_gc\000"
 	.section	.bss.g_num_free_superblocks,"aw",%nobits
 	.align	1
-.LANCHOR104 = . + 0
+.LANCHOR106 = . + 0
 	.type	g_num_free_superblocks, %object
 	.size	g_num_free_superblocks, 2
 g_num_free_superblocks:
 	.space	2
 	.section	.bss.p_data_block_list_table,"aw",%nobits
 	.align	2
-.LANCHOR97 = . + 0
+.LANCHOR99 = . + 0
 	.type	p_data_block_list_table, %object
 	.size	p_data_block_list_table, 4
 p_data_block_list_table:
 	.space	4
-	.section	.rodata.__func__.7894,"a",%progbits
-.LANCHOR198 = . + 0
-	.type	__func__.7894, %object
-	.size	__func__.7894, 15
-__func__.7894:
-	.ascii	"FtlLoadSysInfo\000"
+	.section	.bss.g_power_lost_ecc_error_blk,"aw",%nobits
+	.align	1
+.LANCHOR229 = . + 0
+	.type	g_power_lost_ecc_error_blk, %object
+	.size	g_power_lost_ecc_error_blk, 2
+g_power_lost_ecc_error_blk:
+	.space	2
 	.section	.bss.g_gc_skip_write_count,"aw",%nobits
 	.align	2
-.LANCHOR169 = . + 0
+.LANCHOR172 = . + 0
 	.type	g_gc_skip_write_count, %object
 	.size	g_gc_skip_write_count, 4
 g_gc_skip_write_count:
@@ -20376,19 +21110,19 @@ g_gc_skip_write_count:
 	.size	c_ftl_nand_data_blks_per_plane, 2
 c_ftl_nand_data_blks_per_plane:
 	.space	2
-	.section	.bss.gc_ink_free_return_value,"aw",%nobits
-	.align	1
-.LANCHOR228 = . + 0
-	.type	gc_ink_free_return_value, %object
-	.size	gc_ink_free_return_value, 2
-gc_ink_free_return_value:
-	.space	2
-	.section	.rodata.__func__.7583,"a",%progbits
-.LANCHOR105 = . + 0
-	.type	__func__.7583, %object
-	.size	__func__.7583, 17
-__func__.7583:
-	.ascii	"INSERT_FREE_LIST\000"
+	.section	.bss.p_map_region_ppn_check_table,"aw",%nobits
+	.align	2
+.LANCHOR191 = . + 0
+	.type	p_map_region_ppn_check_table, %object
+	.size	p_map_region_ppn_check_table, 4
+p_map_region_ppn_check_table:
+	.space	4
+	.section	.bss.gMultiPageReadEn,"aw",%nobits
+.LANCHOR194 = . + 0
+	.type	gMultiPageReadEn, %object
+	.size	gMultiPageReadEn, 1
+gMultiPageReadEn:
+	.space	1
 	.section	.bss.DieAddrs,"aw",%nobits
 	.align	2
 .LANCHOR20 = . + 0
@@ -20398,20 +21132,21 @@ DieAddrs:
 	.space	32
 	.section	.bss.g_totle_mlc_erase_count,"aw",%nobits
 	.align	2
-.LANCHOR161 = . + 0
+.LANCHOR164 = . + 0
 	.type	g_totle_mlc_erase_count, %object
 	.size	g_totle_mlc_erase_count, 4
 g_totle_mlc_erase_count:
 	.space	4
-	.section	.rodata.__func__.7587,"a",%progbits
-.LANCHOR102 = . + 0
-	.type	__func__.7587, %object
-	.size	__func__.7587, 17
-__func__.7587:
-	.ascii	"INSERT_DATA_LIST\000"
+	.section	.bss.gFlashProgCheckSpareBuffer,"aw",%nobits
+	.align	2
+.LANCHOR205 = . + 0
+	.type	gFlashProgCheckSpareBuffer, %object
+	.size	gFlashProgCheckSpareBuffer, 4
+gFlashProgCheckSpareBuffer:
+	.space	4
 	.section	.data.gSlcNandParaInfo,"aw",%progbits
 	.align	1
-.LANCHOR236 = . + 0
+.LANCHOR243 = . + 0
 	.type	gSlcNandParaInfo, %object
 	.size	gSlcNandParaInfo, 32
 gSlcNandParaInfo:
@@ -20441,16 +21176,22 @@ gSlcNandParaInfo:
 	.byte	0
 	.byte	0
 	.space	4
+	.section	.rodata.__func__.7621,"a",%progbits
+.LANCHOR104 = . + 0
+	.type	__func__.7621, %object
+	.size	__func__.7621, 17
+__func__.7621:
+	.ascii	"INSERT_DATA_LIST\000"
 	.section	.bss.p_sys_spare_buf,"aw",%nobits
 	.align	2
-.LANCHOR180 = . + 0
+.LANCHOR184 = . + 0
 	.type	p_sys_spare_buf, %object
 	.size	p_sys_spare_buf, 4
 p_sys_spare_buf:
 	.space	4
 	.section	.bss.g_gc_bad_block_gc_index,"aw",%nobits
 	.align	1
-.LANCHOR150 = . + 0
+.LANCHOR153 = . + 0
 	.type	g_gc_bad_block_gc_index, %object
 	.size	g_gc_bad_block_gc_index, 2
 g_gc_bad_block_gc_index:
@@ -20463,27 +21204,21 @@ gNandFlashResEndPageAddr:
 	.space	4
 	.section	.bss.gp_gc_page_buf_info,"aw",%nobits
 	.align	2
-.LANCHOR131 = . + 0
+.LANCHOR134 = . + 0
 	.type	gp_gc_page_buf_info, %object
 	.size	gp_gc_page_buf_info, 4
 gp_gc_page_buf_info:
 	.space	4
-	.section	.bss.g_gc_cur_blk_max_valid_pages,"aw",%nobits
+	.section	.bss.gc_ink_free_return_value,"aw",%nobits
 	.align	1
-.LANCHOR230 = . + 0
-	.type	g_gc_cur_blk_max_valid_pages, %object
-	.size	g_gc_cur_blk_max_valid_pages, 2
-g_gc_cur_blk_max_valid_pages:
+.LANCHOR233 = . + 0
+	.type	gc_ink_free_return_value, %object
+	.size	gc_ink_free_return_value, 2
+gc_ink_free_return_value:
 	.space	2
-	.section	.rodata.__func__.7474,"a",%progbits
-.LANCHOR202 = . + 0
-	.type	__func__.7474, %object
-	.size	__func__.7474, 11
-__func__.7474:
-	.ascii	"FtlLoadBbt\000"
 	.section	.bss.g_totle_write_sector,"aw",%nobits
 	.align	2
-.LANCHOR193 = . + 0
+.LANCHOR216 = . + 0
 	.type	g_totle_write_sector, %object
 	.size	g_totle_write_sector, 4
 g_totle_write_sector:
@@ -20503,7 +21238,7 @@ gpNandc1:
 	.space	4
 	.section	.bss.g_in_swl_replace,"aw",%nobits
 	.align	2
-.LANCHOR166 = . + 0
+.LANCHOR169 = . + 0
 	.type	g_in_swl_replace, %object
 	.size	g_in_swl_replace, 4
 g_in_swl_replace:
@@ -20517,7 +21252,7 @@ FlashDdrTunningReadCount:
 	.space	4
 	.section	.bss.gBootDdrMode,"aw",%nobits
 	.align	2
-.LANCHOR187 = . + 0
+.LANCHOR192 = . + 0
 	.type	gBootDdrMode, %object
 	.size	gBootDdrMode, 4
 gBootDdrMode:
@@ -20537,7 +21272,7 @@ c_mlc_erase_count_value:
 	.space	2
 	.section	.bss.p_map_block_table,"aw",%nobits
 	.align	2
-.LANCHOR122 = . + 0
+.LANCHOR124 = . + 0
 	.type	p_map_block_table, %object
 	.size	p_map_block_table, 4
 p_map_block_table:
@@ -20611,12 +21346,6 @@ SamsungRefValue:
 	.byte	12
 	.byte	2
 	.byte	0
-	.section	.rodata.__func__.8140,"a",%progbits
-.LANCHOR208 = . + 0
-	.type	__func__.8140, %object
-	.size	__func__.8140, 19
-__func__.8140:
-	.ascii	"get_new_active_ppa\000"
 	.section	.data.NandOptPara,"aw",%progbits
 .LANCHOR27 = . + 0
 	.type	NandOptPara, %object
@@ -20698,6 +21427,12 @@ NandOptPara:
 	.byte	0
 	.byte	0
 	.space	14
+	.section	.rodata.__func__.7373,"a",%progbits
+.LANCHOR223 = . + 0
+	.type	__func__.7373, %object
+	.size	__func__.7373, 13
+__func__.7373:
+	.ascii	"FtlProgPages\000"
 	.section	.bss.c_ftl_nand_blks_per_die,"aw",%nobits
 	.align	1
 .LANCHOR66 = . + 0
@@ -20705,15 +21440,15 @@ NandOptPara:
 	.size	c_ftl_nand_blks_per_die, 2
 c_ftl_nand_blks_per_die:
 	.space	2
-	.section	.rodata.__func__.7364,"a",%progbits
-.LANCHOR233 = . + 0
-	.type	__func__.7364, %object
-	.size	__func__.7364, 10
-__func__.7364:
-	.ascii	"ftl_write\000"
+	.section	.rodata.__func__.8031,"a",%progbits
+.LANCHOR228 = . + 0
+	.type	__func__.8031, %object
+	.size	__func__.8031, 22
+__func__.8031:
+	.ascii	"FtlRecoverySuperblock\000"
 	.section	.bss.g_totle_read_sector,"aw",%nobits
 	.align	2
-.LANCHOR194 = . + 0
+.LANCHOR217 = . + 0
 	.type	g_totle_read_sector, %object
 	.size	g_totle_read_sector, 4
 g_totle_read_sector:
@@ -20731,12 +21466,24 @@ c_ftl_nand_max_sys_blks:
 	.size	g_slc2KBNand, 1
 g_slc2KBNand:
 	.space	1
-	.section	.rodata.__func__.7743,"a",%progbits
-.LANCHOR114 = . + 0
-	.type	__func__.7743, %object
-	.size	__func__.7743, 22
-__func__.7743:
-	.ascii	"select_l2p_ram_region\000"
+	.section	.bss.gNandFlashIDBEccBits,"aw",%nobits
+.LANCHOR45 = . + 0
+	.type	gNandFlashIDBEccBits, %object
+	.size	gNandFlashIDBEccBits, 1
+gNandFlashIDBEccBits:
+	.space	1
+	.section	.rodata.__func__.8182,"a",%progbits
+.LANCHOR210 = . + 0
+	.type	__func__.8182, %object
+	.size	__func__.8182, 25
+__func__.8182:
+	.ascii	"allocate_data_superblock\000"
+	.section	.rodata.__func__.7745,"a",%progbits
+.LANCHOR213 = . + 0
+	.type	__func__.7745, %object
+	.size	__func__.7745, 31
+__func__.7745:
+	.ascii	"Ftl_write_map_blk_to_last_page\000"
 	.section	.data.Toshiba15RefValue,"aw",%progbits
 .LANCHOR12 = . + 0
 	.type	Toshiba15RefValue, %object
@@ -20839,17 +21586,18 @@ Toshiba15RefValue:
 	.byte	0
 	.section	.bss.g_gc_next_blk_1,"aw",%nobits
 	.align	1
-.LANCHOR147 = . + 0
+.LANCHOR150 = . + 0
 	.type	g_gc_next_blk_1, %object
 	.size	g_gc_next_blk_1, 2
 g_gc_next_blk_1:
 	.space	2
-	.section	.rodata.__func__.7820,"a",%progbits
-.LANCHOR205 = . + 0
-	.type	__func__.7820, %object
-	.size	__func__.7820, 15
-__func__.7820:
-	.ascii	"FtlVpcTblFlush\000"
+	.section	.bss.g_free_slc_blk_num,"aw",%nobits
+	.align	1
+.LANCHOR129 = . + 0
+	.type	g_free_slc_blk_num, %object
+	.size	g_free_slc_blk_num, 2
+g_free_slc_blk_num:
+	.space	2
 	.section	.bss.c_ftl_nand_map_region_num,"aw",%nobits
 	.align	1
 .LANCHOR82 = . + 0
@@ -20859,7 +21607,7 @@ c_ftl_nand_map_region_num:
 	.space	2
 	.section	.bss.req_gc,"aw",%nobits
 	.align	2
-.LANCHOR132 = . + 0
+.LANCHOR135 = . + 0
 	.type	req_gc, %object
 	.size	req_gc, 4
 req_gc:
@@ -20870,17 +21618,24 @@ req_gc:
 	.type	gpNandc, %object
 	.size	gpNandc, 4
 gpNandc:
+	.space	4
+	.section	.bss.gpFlashSaveInfo,"aw",%nobits
+	.align	2
+.LANCHOR43 = . + 0
+	.type	gpFlashSaveInfo, %object
+	.size	gpFlashSaveInfo, 4
+gpFlashSaveInfo:
 	.space	4
 	.section	.bss.g_totle_vendor_block,"aw",%nobits
 	.align	1
-.LANCHOR85 = . + 0
+.LANCHOR86 = . + 0
 	.type	g_totle_vendor_block, %object
 	.size	g_totle_vendor_block, 2
 g_totle_vendor_block:
 	.space	2
 	.section	.bss.p_l2p_ram_map,"aw",%nobits
 	.align	2
-.LANCHOR112 = . + 0
+.LANCHOR114 = . + 0
 	.type	p_l2p_ram_map, %object
 	.size	p_l2p_ram_map, 4
 p_l2p_ram_map:
@@ -20906,17 +21661,10 @@ DieCsIndex:
 	.space	8
 	.section	.bss.g_totle_cache_write_count,"aw",%nobits
 	.align	2
-.LANCHOR158 = . + 0
+.LANCHOR161 = . + 0
 	.type	g_totle_cache_write_count, %object
 	.size	g_totle_cache_write_count, 4
 g_totle_cache_write_count:
-	.space	4
-	.section	.bss.g_gc_num_req,"aw",%nobits
-	.align	2
-.LANCHOR128 = . + 0
-	.type	g_gc_num_req, %object
-	.size	g_gc_num_req, 4
-g_gc_num_req:
 	.space	4
 	.section	.bss.c_ftl_nand_byte_pre_oob,"aw",%nobits
 	.align	1
@@ -20927,7 +21675,7 @@ c_ftl_nand_byte_pre_oob:
 	.space	2
 	.section	.bss.g_gc_bad_block_temp_tbl,"aw",%nobits
 	.align	1
-.LANCHOR149 = . + 0
+.LANCHOR152 = . + 0
 	.type	g_gc_bad_block_temp_tbl, %object
 	.size	g_gc_bad_block_temp_tbl, 34
 g_gc_bad_block_temp_tbl:
@@ -20939,7 +21687,7 @@ gFlashSdrModeEn:
 	.space	1
 	.section	.bss.p_data_block_list_tail,"aw",%nobits
 	.align	2
-.LANCHOR100 = . + 0
+.LANCHOR102 = . + 0
 	.type	p_data_block_list_tail, %object
 	.size	p_data_block_list_tail, 4
 p_data_block_list_tail:
@@ -20952,7 +21700,7 @@ gFlashInterfaceMode:
 	.space	1
 	.section	.bss.p_map_block_ver_table,"aw",%nobits
 	.align	2
-.LANCHOR123 = . + 0
+.LANCHOR125 = . + 0
 	.type	p_map_block_ver_table, %object
 	.size	p_map_block_ver_table, 4
 p_map_block_ver_table:
@@ -21016,14 +21764,14 @@ ToshibaA19RefValue:
 	.byte	0
 	.section	.bss.g_totle_swl_count,"aw",%nobits
 	.align	2
-.LANCHOR136 = . + 0
+.LANCHOR139 = . + 0
 	.type	g_totle_swl_count, %object
 	.size	g_totle_swl_count, 4
 g_totle_swl_count:
 	.space	4
 	.section	.bss.gBbtInfo,"aw",%nobits
 	.align	2
-.LANCHOR89 = . + 0
+.LANCHOR90 = . + 0
 	.type	gBbtInfo, %object
 	.size	gBbtInfo, 60
 gBbtInfo:
@@ -21037,7 +21785,7 @@ c_ftl_nand_byte_pre_page:
 	.space	2
 	.section	.bss.g_power_lost_recovery_flag,"aw",%nobits
 	.align	1
-.LANCHOR224 = . + 0
+.LANCHOR230 = . + 0
 	.type	g_power_lost_recovery_flag, %object
 	.size	g_power_lost_recovery_flag, 2
 g_power_lost_recovery_flag:
@@ -21055,16 +21803,16 @@ gNandIDBResBlkNum:
 	.size	gNandcDumpWriteEn, 4
 gNandcDumpWriteEn:
 	.space	4
-	.section	.bss.gFlashProgCheckSpareBuffer,"aw",%nobits
-	.align	2
-.LANCHOR204 = . + 0
-	.type	gFlashProgCheckSpareBuffer, %object
-	.size	gFlashProgCheckSpareBuffer, 4
-gFlashProgCheckSpareBuffer:
-	.space	4
+	.section	.bss.g_gc_refresh_block_temp_num,"aw",%nobits
+	.align	1
+.LANCHOR176 = . + 0
+	.type	g_gc_refresh_block_temp_num, %object
+	.size	g_gc_refresh_block_temp_num, 2
+g_gc_refresh_block_temp_num:
+	.space	2
 	.section	.bss.g_tmp_data_superblock_id,"aw",%nobits
 	.align	1
-.LANCHOR135 = . + 0
+.LANCHOR138 = . + 0
 	.type	g_tmp_data_superblock_id, %object
 	.size	g_tmp_data_superblock_id, 2
 g_tmp_data_superblock_id:
@@ -21076,23 +21824,30 @@ g_tmp_data_superblock_id:
 	.size	c_ftl_nand_totle_phy_blks, 4
 c_ftl_nand_totle_phy_blks:
 	.space	4
+	.section	.data.ftl_gc_temp_block_bops_scan_page_addr,"aw",%progbits
+	.align	1
+.LANCHOR195 = . + 0
+	.type	ftl_gc_temp_block_bops_scan_page_addr, %object
+	.size	ftl_gc_temp_block_bops_scan_page_addr, 2
+ftl_gc_temp_block_bops_scan_page_addr:
+	.short	-1
 	.section	.bss.p_map_region_ppn_table,"aw",%nobits
 	.align	2
-.LANCHOR124 = . + 0
+.LANCHOR126 = . + 0
 	.type	p_map_region_ppn_table, %object
 	.size	p_map_region_ppn_table, 4
 p_map_region_ppn_table:
 	.space	4
 	.section	.bss.g_gc_cur_blk_valid_pages,"aw",%nobits
 	.align	1
-.LANCHOR229 = . + 0
+.LANCHOR234 = . + 0
 	.type	g_gc_cur_blk_valid_pages, %object
 	.size	g_gc_cur_blk_valid_pages, 2
 g_gc_cur_blk_valid_pages:
 	.space	2
 	.section	.bss.p_gc_page_info,"aw",%nobits
 	.align	2
-.LANCHOR145 = . + 0
+.LANCHOR148 = . + 0
 	.type	p_gc_page_info, %object
 	.size	p_gc_page_info, 4
 p_gc_page_info:
@@ -21106,37 +21861,37 @@ c_ftl_nand_l2pmap_ram_region_num:
 	.space	2
 	.section	.bss.gc_discard_updated,"aw",%nobits
 	.align	2
-.LANCHOR221 = . + 0
+.LANCHOR227 = . + 0
 	.type	gc_discard_updated, %object
 	.size	gc_discard_updated, 4
 gc_discard_updated:
 	.space	4
-	.section	.rodata.__func__.7759,"a",%progbits
-.LANCHOR215 = . + 0
-	.type	__func__.7759, %object
-	.size	__func__.7759, 9
-__func__.7759:
-	.ascii	"log2phys\000"
+	.section	.rodata.__func__.7758,"a",%progbits
+.LANCHOR214 = . + 0
+	.type	__func__.7758, %object
+	.size	__func__.7758, 16
+__func__.7758:
+	.ascii	"FtlMapWritePage\000"
 	.section	.bss.g_ect_tbl_info_size,"aw",%nobits
 	.align	1
-.LANCHOR182 = . + 0
+.LANCHOR186 = . + 0
 	.type	g_ect_tbl_info_size, %object
 	.size	g_ect_tbl_info_size, 2
 g_ect_tbl_info_size:
 	.space	2
 	.section	.bss.g_all_blk_used_slc_mode,"aw",%nobits
 	.align	2
-.LANCHOR152 = . + 0
+.LANCHOR155 = . + 0
 	.type	g_all_blk_used_slc_mode, %object
 	.size	g_all_blk_used_slc_mode, 4
 g_all_blk_used_slc_mode:
 	.space	4
-	.section	.rodata.__func__.8040,"a",%progbits
-.LANCHOR125 = . + 0
-	.type	__func__.8040, %object
-	.size	__func__.8040, 16
-__func__.8040:
-	.ascii	"make_superblock\000"
+	.section	.rodata.__func__.7508,"a",%progbits
+.LANCHOR203 = . + 0
+	.type	__func__.7508, %object
+	.size	__func__.7508, 11
+__func__.7508:
+	.ascii	"FtlLoadBbt\000"
 	.section	.bss.c_ftl_nand_vendor_region_num,"aw",%nobits
 	.align	1
 .LANCHOR78 = . + 0
@@ -21146,7 +21901,7 @@ c_ftl_nand_vendor_region_num:
 	.space	2
 	.section	.bss.g_ftl_nand_free_count,"aw",%nobits
 	.align	2
-.LANCHOR232 = . + 0
+.LANCHOR239 = . + 0
 	.type	g_ftl_nand_free_count, %object
 	.size	g_ftl_nand_free_count, 4
 g_ftl_nand_free_count:
@@ -21166,27 +21921,28 @@ ToshibaRefValue:
 	.byte	112
 	.section	.bss.g_l2p_last_update_region_id,"aw",%nobits
 	.align	1
-.LANCHOR113 = . + 0
+.LANCHOR115 = . + 0
 	.type	g_l2p_last_update_region_id, %object
 	.size	g_l2p_last_update_region_id, 2
 g_l2p_last_update_region_id:
 	.space	2
 	.section	.bss.g_gc_page_offset,"aw",%nobits
 	.align	1
-.LANCHOR144 = . + 0
+.LANCHOR147 = . + 0
 	.type	g_gc_page_offset, %object
 	.size	g_gc_page_offset, 2
 g_gc_page_offset:
 	.space	2
-	.section	.rodata.__func__.8060,"a",%progbits
-.LANCHOR127 = . + 0
-	.type	__func__.8060, %object
-	.size	__func__.8060, 18
-__func__.8060:
-	.ascii	"SupperBlkListInit\000"
+	.section	.bss.gMasterTempBuf,"aw",%nobits
+	.align	2
+.LANCHOR193 = . + 0
+	.type	gMasterTempBuf, %object
+	.size	gMasterTempBuf, 4
+gMasterTempBuf:
+	.space	4
 	.section	.bss.g_gc_blk_num,"aw",%nobits
 	.align	1
-.LANCHOR142 = . + 0
+.LANCHOR145 = . + 0
 	.type	g_gc_blk_num, %object
 	.size	g_gc_blk_num, 2
 g_gc_blk_num:
@@ -21200,82 +21956,76 @@ c_ftl_nand_max_map_blks:
 	.space	4
 	.section	.bss.g_totle_read_page_count,"aw",%nobits
 	.align	2
-.LANCHOR160 = . + 0
+.LANCHOR163 = . + 0
 	.type	g_totle_read_page_count, %object
 	.size	g_totle_read_page_count, 4
 g_totle_read_page_count:
 	.space	4
-	.section	.rodata.__func__.7648,"a",%progbits
-.LANCHOR110 = . + 0
-	.type	__func__.7648, %object
-	.size	__func__.7648, 22
-__func__.7648:
-	.ascii	"List_update_data_list\000"
+	.section	.bss.g_gc_num_req,"aw",%nobits
+	.align	2
+.LANCHOR131 = . + 0
+	.type	g_gc_num_req, %object
+	.size	g_gc_num_req, 4
+g_gc_num_req:
+	.space	4
 	.section	.bss.p_swl_mul_table,"aw",%nobits
 	.align	2
-.LANCHOR139 = . + 0
+.LANCHOR142 = . + 0
 	.type	p_swl_mul_table, %object
 	.size	p_swl_mul_table, 4
 p_swl_mul_table:
 	.space	4
 	.section	.bss.ftl_gc_temp_power_lost_recovery_flag,"aw",%nobits
 	.align	2
-.LANCHOR137 = . + 0
+.LANCHOR140 = . + 0
 	.type	ftl_gc_temp_power_lost_recovery_flag, %object
 	.size	ftl_gc_temp_power_lost_recovery_flag, 4
 ftl_gc_temp_power_lost_recovery_flag:
 	.space	4
 	.section	.bss.p_vendor_data_buf,"aw",%nobits
 	.align	2
-.LANCHOR177 = . + 0
+.LANCHOR181 = . + 0
 	.type	p_vendor_data_buf, %object
 	.size	p_vendor_data_buf, 4
 p_vendor_data_buf:
 	.space	4
-	.section	.data.gc_tmp_blk_bops_scan_addr,"aw",%progbits
-	.align	1
-.LANCHOR190 = . + 0
-	.type	gc_tmp_blk_bops_scan_addr, %object
-	.size	gc_tmp_blk_bops_scan_addr, 2
-gc_tmp_blk_bops_scan_addr:
-	.short	-1
-	.section	.rodata.__func__.8315,"a",%progbits
-.LANCHOR231 = . + 0
-	.type	__func__.8315, %object
-	.size	__func__.8315, 23
-__func__.8315:
-	.ascii	"rk_ftl_garbage_collect\000"
+	.section	.rodata.__func__.7875,"a",%progbits
+.LANCHOR197 = . + 0
+	.type	__func__.7875, %object
+	.size	__func__.7875, 14
+__func__.7875:
+	.ascii	"FtlScanSysBlk\000"
 	.section	.bss.p_vendor_region_ppn_table,"aw",%nobits
 	.align	2
-.LANCHOR186 = . + 0
+.LANCHOR190 = . + 0
 	.type	p_vendor_region_ppn_table, %object
 	.size	p_vendor_region_ppn_table, 4
 p_vendor_region_ppn_table:
 	.space	4
 	.section	.bss.p_map_block_valid_page_count,"aw",%nobits
 	.align	2
-.LANCHOR118 = . + 0
+.LANCHOR120 = . + 0
 	.type	p_map_block_valid_page_count, %object
 	.size	p_map_block_valid_page_count, 4
 p_map_block_valid_page_count:
 	.space	4
 	.section	.bss.req_prgm,"aw",%nobits
 	.align	2
-.LANCHOR175 = . + 0
+.LANCHOR179 = . + 0
 	.type	req_prgm, %object
 	.size	req_prgm, 4
 req_prgm:
 	.space	4
 	.section	.bss.g_totle_l2p_write_count,"aw",%nobits
 	.align	2
-.LANCHOR159 = . + 0
+.LANCHOR162 = . + 0
 	.type	g_totle_l2p_write_count, %object
 	.size	g_totle_l2p_write_count, 4
 g_totle_l2p_write_count:
 	.space	4
 	.section	.bss.g_num_data_superblocks,"aw",%nobits
 	.align	1
-.LANCHOR101 = . + 0
+.LANCHOR103 = . + 0
 	.type	g_num_data_superblocks, %object
 	.size	g_num_data_superblocks, 2
 g_num_data_superblocks:
@@ -21289,41 +22039,41 @@ c_ftl_nand_blk_pre_plane:
 	.space	2
 	.section	.bss.g_gc_head_data_block,"aw",%nobits
 	.align	2
-.LANCHOR167 = . + 0
+.LANCHOR170 = . + 0
 	.type	g_gc_head_data_block, %object
 	.size	g_gc_head_data_block, 4
 g_gc_head_data_block:
 	.space	4
 	.section	.bss.g_totle_slc_erase_count,"aw",%nobits
 	.align	2
-.LANCHOR162 = . + 0
+.LANCHOR165 = . + 0
 	.type	g_totle_slc_erase_count, %object
 	.size	g_totle_slc_erase_count, 4
 g_totle_slc_erase_count:
 	.space	4
-	.section	.rodata.__func__.7685,"a",%progbits
-.LANCHOR111 = . + 0
-	.type	__func__.7685, %object
-	.size	__func__.7685, 26
-__func__.7685:
-	.ascii	"ftl_map_blk_alloc_new_blk\000"
+	.section	.rodata.__func__.8202,"a",%progbits
+.LANCHOR209 = . + 0
+	.type	__func__.8202, %object
+	.size	__func__.8202, 19
+__func__.8202:
+	.ascii	"get_new_active_ppa\000"
 	.section	.bss.req_gc_dst,"aw",%nobits
 	.align	2
-.LANCHOR174 = . + 0
+.LANCHOR178 = . + 0
 	.type	req_gc_dst, %object
 	.size	req_gc_dst, 4
 req_gc_dst:
 	.space	4
 	.section	.bss.req_read,"aw",%nobits
 	.align	2
-.LANCHOR173 = . + 0
+.LANCHOR177 = . + 0
 	.type	req_read, %object
 	.size	req_read, 4
 req_read:
 	.space	4
 	.section	.bss.g_totle_avg_erase_count,"aw",%nobits
 	.align	2
-.LANCHOR195 = . + 0
+.LANCHOR211 = . + 0
 	.type	g_totle_avg_erase_count, %object
 	.size	g_totle_avg_erase_count, 4
 g_totle_avg_erase_count:
@@ -21335,28 +22085,22 @@ g_totle_avg_erase_count:
 	.size	c_ftl_nand_planes_per_die, 2
 c_ftl_nand_planes_per_die:
 	.space	2
-	.section	.rodata.__func__.7427,"a",%progbits
-.LANCHOR91 = . + 0
-	.type	__func__.7427, %object
-	.size	__func__.7427, 14
-__func__.7427:
-	.ascii	"FtlBbt2Bitmap\000"
+	.section	.rodata.__func__.7794,"a",%progbits
+.LANCHOR221 = . + 0
+	.type	__func__.7794, %object
+	.size	__func__.7794, 9
+__func__.7794:
+	.ascii	"log2phys\000"
 	.section	.bss.g_gc_merge_free_blk_threshold,"aw",%nobits
 	.align	1
-.LANCHOR171 = . + 0
+.LANCHOR174 = . + 0
 	.type	g_gc_merge_free_blk_threshold, %object
 	.size	g_gc_merge_free_blk_threshold, 2
 g_gc_merge_free_blk_threshold:
 	.space	2
-	.section	.rodata.__func__.7986,"a",%progbits
-.LANCHOR223 = . + 0
-	.type	__func__.7986, %object
-	.size	__func__.7986, 22
-__func__.7986:
-	.ascii	"FtlRecoverySuperblock\000"
 	.section	.bss.g_MaxLpn,"aw",%nobits
 	.align	2
-.LANCHOR87 = . + 0
+.LANCHOR88 = . + 0
 	.type	g_MaxLpn, %object
 	.size	g_MaxLpn, 4
 g_MaxLpn:
@@ -21368,9 +22112,15 @@ g_MaxLpn:
 	.size	gpNandParaInfo, 4
 gpNandParaInfo:
 	.space	4
+	.section	.rodata.__func__.7651,"a",%progbits
+.LANCHOR108 = . + 0
+	.type	__func__.7651, %object
+	.size	__func__.7651, 17
+__func__.7651:
+	.ascii	"List_remove_node\000"
 	.section	.bss.g_LowFormat,"aw",%nobits
 	.align	2
-.LANCHOR227 = . + 0
+.LANCHOR237 = . + 0
 	.type	g_LowFormat, %object
 	.size	g_LowFormat, 4
 g_LowFormat:
@@ -21384,7 +22134,7 @@ c_ftl_nand_type:
 	.space	2
 	.section	.bss.gSysFreeQueue,"aw",%nobits
 	.align	1
-.LANCHOR92 = . + 0
+.LANCHOR93 = . + 0
 	.type	gSysFreeQueue, %object
 	.size	gSysFreeQueue, 2056
 gSysFreeQueue:
@@ -21396,6 +22146,18 @@ gSysFreeQueue:
 	.size	slcPageToMlcPageTbl, 512
 slcPageToMlcPageTbl:
 	.space	512
+	.section	.rodata.__func__.8286,"a",%progbits
+.LANCHOR226 = . + 0
+	.type	__func__.8286, %object
+	.size	__func__.8286, 19
+__func__.8286:
+	.ascii	"FtlGcFreeTempBlock\000"
+	.section	.rodata.__func__.7313,"a",%progbits
+.LANCHOR238 = . + 0
+	.type	__func__.7313, %object
+	.size	__func__.7313, 8
+__func__.7313:
+	.ascii	"FtlInit\000"
 	.section	.bss.c_ftl_nand_sys_blks_per_plane,"aw",%nobits
 	.align	2
 .LANCHOR52 = . + 0
@@ -21403,16 +22165,22 @@ slcPageToMlcPageTbl:
 	.size	c_ftl_nand_sys_blks_per_plane, 4
 c_ftl_nand_sys_blks_per_plane:
 	.space	4
+	.section	.rodata.__func__.8380,"a",%progbits
+.LANCHOR236 = . + 0
+	.type	__func__.8380, %object
+	.size	__func__.8380, 23
+__func__.8380:
+	.ascii	"rk_ftl_garbage_collect\000"
 	.section	.bss.g_buffer_superblock,"aw",%nobits
 	.align	2
-.LANCHOR108 = . + 0
+.LANCHOR110 = . + 0
 	.type	g_buffer_superblock, %object
 	.size	g_buffer_superblock, 48
 g_buffer_superblock:
 	.space	48
 	.section	.bss.p_sys_data_buf,"aw",%nobits
 	.align	2
-.LANCHOR96 = . + 0
+.LANCHOR98 = . + 0
 	.type	p_sys_data_buf, %object
 	.size	p_sys_data_buf, 4
 p_sys_data_buf:
@@ -21432,18 +22200,17 @@ g_maxRegNum:
 	.space	1
 	.section	.bss.p_gc_spare_buf,"aw",%nobits
 	.align	2
-.LANCHOR130 = . + 0
+.LANCHOR133 = . + 0
 	.type	p_gc_spare_buf, %object
 	.size	p_gc_spare_buf, 4
 p_gc_spare_buf:
 	.space	4
-	.section	.bss.gFlashProgCheckBuffer,"aw",%nobits
-	.align	2
-.LANCHOR203 = . + 0
-	.type	gFlashProgCheckBuffer, %object
-	.size	gFlashProgCheckBuffer, 4
-gFlashProgCheckBuffer:
-	.space	4
+	.section	.rodata.__func__.7681,"a",%progbits
+.LANCHOR112 = . + 0
+	.type	__func__.7681, %object
+	.size	__func__.7681, 22
+__func__.7681:
+	.ascii	"List_update_data_list\000"
 	.section	.bss.gNandFlashInfoBlockAddr,"aw",%nobits
 	.align	2
 .LANCHOR47 = . + 0
@@ -21459,7 +22226,7 @@ p_valid_page_count_check_table:
 	.space	4
 	.section	.bss.p_io_spare_buf,"aw",%nobits
 	.align	2
-.LANCHOR181 = . + 0
+.LANCHOR185 = . + 0
 	.type	p_io_spare_buf, %object
 	.size	p_io_spare_buf, 4
 p_io_spare_buf:
@@ -21480,14 +22247,14 @@ c_ftl_nand_planes_num:
 	.space	2
 	.section	.bss.p_io_data_buf_0,"aw",%nobits
 	.align	2
-.LANCHOR178 = . + 0
+.LANCHOR182 = . + 0
 	.type	p_io_data_buf_0, %object
 	.size	p_io_data_buf_0, 4
 p_io_data_buf_0:
 	.space	4
 	.section	.bss.p_io_data_buf_1,"aw",%nobits
 	.align	2
-.LANCHOR179 = . + 0
+.LANCHOR183 = . + 0
 	.type	p_io_data_buf_1, %object
 	.size	p_io_data_buf_1, 4
 p_io_data_buf_1:
@@ -21505,42 +22272,60 @@ gFlashOnfiModeEn:
 	.space	1
 	.section	.bss.g_totle_write_page_count,"aw",%nobits
 	.align	2
-.LANCHOR156 = . + 0
+.LANCHOR159 = . + 0
 	.type	g_totle_write_page_count, %object
 	.size	g_totle_write_page_count, 4
 g_totle_write_page_count:
 	.space	4
 	.section	.bss.g_totle_gc_page_count,"aw",%nobits
 	.align	2
-.LANCHOR155 = . + 0
+.LANCHOR158 = . + 0
 	.type	g_totle_gc_page_count, %object
 	.size	g_totle_gc_page_count, 4
 g_totle_gc_page_count:
 	.space	4
+	.section	.rodata.__func__.7929,"a",%progbits
+.LANCHOR199 = . + 0
+	.type	__func__.7929, %object
+	.size	__func__.7929, 15
+__func__.7929:
+	.ascii	"FtlLoadSysInfo\000"
 	.section	.bss.g_min_erase_count,"aw",%nobits
 	.align	2
-.LANCHOR164 = . + 0
+.LANCHOR167 = . + 0
 	.type	g_min_erase_count, %object
 	.size	g_min_erase_count, 4
 g_min_erase_count:
 	.space	4
 	.section	.bss.FtlUpdateVaildLpnCount,"aw",%nobits
 	.align	1
-.LANCHOR115 = . + 0
+.LANCHOR117 = . + 0
 	.type	FtlUpdateVaildLpnCount, %object
 	.size	FtlUpdateVaildLpnCount, 2
 FtlUpdateVaildLpnCount:
 	.space	2
+	.section	.rodata.__func__.8213,"a",%progbits
+.LANCHOR207 = . + 0
+	.type	__func__.8213, %object
+	.size	__func__.8213, 16
+__func__.8213:
+	.ascii	"update_vpc_list\000"
+	.section	.rodata.__func__.7778,"a",%progbits
+.LANCHOR116 = . + 0
+	.type	__func__.7778, %object
+	.size	__func__.7778, 22
+__func__.7778:
+	.ascii	"select_l2p_ram_region\000"
 	.section	.bss.g_cur_erase_blk,"aw",%nobits
 	.align	2
-.LANCHOR88 = . + 0
+.LANCHOR89 = . + 0
 	.type	g_cur_erase_blk, %object
 	.size	g_cur_erase_blk, 4
 g_cur_erase_blk:
 	.space	4
 	.section	.bss.g_in_gc_progress,"aw",%nobits
 	.align	2
-.LANCHOR165 = . + 0
+.LANCHOR168 = . + 0
 	.type	g_in_gc_progress, %object
 	.size	g_in_gc_progress, 4
 g_in_gc_progress:
@@ -21566,15 +22351,9 @@ gFlashPageBuffer1:
 	.size	c_ftl_nand_init_sys_blks_per_plane, 4
 c_ftl_nand_init_sys_blks_per_plane:
 	.space	4
-	.section	.rodata.__func__.8151,"a",%progbits
-.LANCHOR206 = . + 0
-	.type	__func__.8151, %object
-	.size	__func__.8151, 16
-__func__.8151:
-	.ascii	"update_vpc_list\000"
 	.section	.bss.p_free_data_block_list_head,"aw",%nobits
 	.align	2
-.LANCHOR103 = . + 0
+.LANCHOR105 = . + 0
 	.type	p_free_data_block_list_head, %object
 	.size	p_free_data_block_list_head, 4
 p_free_data_block_list_head:
@@ -21586,12 +22365,6 @@ p_free_data_block_list_head:
 	.size	gNandIDataBuf, 2048
 gNandIDataBuf:
 	.space	2048
-	.section	.bss.gNandFlashIDBEccBits,"aw",%nobits
-.LANCHOR45 = . + 0
-	.type	gNandFlashIDBEccBits, %object
-	.size	gNandFlashIDBEccBits, 1
-gNandFlashIDBEccBits:
-	.space	1
 	.section	.bss.gNandPhyInfo,"aw",%nobits
 	.align	2
 .LANCHOR28 = . + 0
@@ -21601,55 +22374,55 @@ gNandPhyInfo:
 	.space	28
 	.section	.bss.gSysInfo,"aw",%nobits
 	.align	2
-.LANCHOR191 = . + 0
+.LANCHOR196 = . + 0
 	.type	gSysInfo, %object
 	.size	gSysInfo, 12
 gSysInfo:
 	.space	12
-	.section	.bss.gMultiPageReadEn,"aw",%nobits
-.LANCHOR189 = . + 0
-	.type	gMultiPageReadEn, %object
-	.size	gMultiPageReadEn, 1
-gMultiPageReadEn:
-	.space	1
+	.section	.rodata.__func__.8105,"a",%progbits
+.LANCHOR130 = . + 0
+	.type	__func__.8105, %object
+	.size	__func__.8105, 18
+__func__.8105:
+	.ascii	"SupperBlkListInit\000"
 	.section	.bss.g_gc_blk_index,"aw",%nobits
 	.align	1
-.LANCHOR172 = . + 0
+.LANCHOR175 = . + 0
 	.type	g_gc_blk_index, %object
 	.size	g_gc_blk_index, 2
 g_gc_blk_index:
 	.space	2
 	.section	.bss.g_gc_free_blk_threshold,"aw",%nobits
 	.align	1
-.LANCHOR170 = . + 0
+.LANCHOR173 = . + 0
 	.type	g_gc_free_blk_threshold, %object
 	.size	g_gc_free_blk_threshold, 2
 g_gc_free_blk_threshold:
 	.space	2
 	.section	.bss.g_max_erase_count,"aw",%nobits
 	.align	2
-.LANCHOR163 = . + 0
+.LANCHOR166 = . + 0
 	.type	g_max_erase_count, %object
 	.size	g_max_erase_count, 4
 g_max_erase_count:
 	.space	4
 	.section	.bss.gVendorBlkInfo,"aw",%nobits
 	.align	2
-.LANCHOR213 = . + 0
+.LANCHOR215 = . + 0
 	.type	gVendorBlkInfo, %object
-	.size	gVendorBlkInfo, 40
+	.size	gVendorBlkInfo, 44
 gVendorBlkInfo:
-	.space	40
+	.space	44
 	.section	.bss.g_GlobalDataVersion,"aw",%nobits
 	.align	2
-.LANCHOR154 = . + 0
+.LANCHOR157 = . + 0
 	.type	g_GlobalDataVersion, %object
 	.size	g_GlobalDataVersion, 4
 g_GlobalDataVersion:
 	.space	4
 	.section	.bss.gp_last_act_superblock,"aw",%nobits
 	.align	2
-.LANCHOR219 = . + 0
+.LANCHOR224 = . + 0
 	.type	gp_last_act_superblock, %object
 	.size	gp_last_act_superblock, 4
 gp_last_act_superblock:
@@ -21808,25 +22581,13 @@ c_ftl_nand_sec_pre_page:
 	.size	gNandMaxDie, 1
 gNandMaxDie:
 	.space	1
-	.section	.rodata.__func__.7708,"a",%progbits
-.LANCHOR211 = . + 0
-	.type	__func__.7708, %object
-	.size	__func__.7708, 31
-__func__.7708:
-	.ascii	"Ftl_write_map_blk_to_last_page\000"
 	.section	.bss.p_gc_data_buf,"aw",%nobits
 	.align	2
-.LANCHOR129 = . + 0
+.LANCHOR132 = . + 0
 	.type	p_gc_data_buf, %object
 	.size	p_gc_data_buf, 4
 p_gc_data_buf:
 	.space	4
-	.section	.rodata.__func__.7953,"a",%progbits
-.LANCHOR216 = . + 0
-	.type	__func__.7953, %object
-	.size	__func__.7953, 16
-__func__.7953:
-	.ascii	"FtlReUsePrevPpa\000"
 	.section	.bss.g_MaxLbaSector,"aw",%nobits
 	.align	2
 .LANCHOR84 = . + 0
@@ -21836,21 +22597,21 @@ g_MaxLbaSector:
 	.space	4
 	.section	.bss.p_erase_count_table,"aw",%nobits
 	.align	2
-.LANCHOR94 = . + 0
+.LANCHOR96 = . + 0
 	.type	p_erase_count_table, %object
 	.size	p_erase_count_table, 4
 p_erase_count_table:
 	.space	4
 	.section	.bss.p_vendor_block_table,"aw",%nobits
 	.align	2
-.LANCHOR86 = . + 0
+.LANCHOR87 = . + 0
 	.type	p_vendor_block_table, %object
 	.size	p_vendor_block_table, 4
 p_vendor_block_table:
 	.space	4
 	.section	.bss.p_data_block_list_head,"aw",%nobits
 	.align	2
-.LANCHOR98 = . + 0
+.LANCHOR100 = . + 0
 	.type	p_data_block_list_head, %object
 	.size	p_data_block_list_head, 4
 p_data_block_list_head:
@@ -21863,21 +22624,21 @@ gNandOptPara:
 	.space	32
 	.section	.bss.g_sys_save_data,"aw",%nobits
 	.align	2
-.LANCHOR140 = . + 0
+.LANCHOR143 = . + 0
 	.type	g_sys_save_data, %object
 	.size	g_sys_save_data, 48
 g_sys_save_data:
 	.space	48
 	.section	.bss.g_VaildLpn,"aw",%nobits
 	.align	2
-.LANCHOR116 = . + 0
+.LANCHOR118 = . + 0
 	.type	g_VaildLpn, %object
 	.size	g_VaildLpn, 4
 g_VaildLpn:
 	.space	4
 	.section	.bss.g_recovery_page_num,"aw",%nobits
 	.align	2
-.LANCHOR225 = . + 0
+.LANCHOR231 = . + 0
 	.type	g_recovery_page_num, %object
 	.size	g_recovery_page_num, 4
 g_recovery_page_num:
@@ -21889,12 +22650,20 @@ g_recovery_page_num:
 	.size	gTotleBlock, 2
 gTotleBlock:
 	.space	2
-	.section	.rodata.__func__.7695,"a",%progbits
-.LANCHOR210 = . + 0
-	.type	__func__.7695, %object
-	.size	__func__.7695, 15
-__func__.7695:
-	.ascii	"ftl_map_blk_gc\000"
+	.section	.bss.gFlashSpareBuffer,"aw",%nobits
+	.align	2
+.LANCHOR241 = . + 0
+	.type	gFlashSpareBuffer, %object
+	.size	gFlashSpareBuffer, 4
+gFlashSpareBuffer:
+	.space	4
+	.section	.bss.gFlashProgCheckBuffer,"aw",%nobits
+	.align	2
+.LANCHOR204 = . + 0
+	.type	gFlashProgCheckBuffer, %object
+	.size	gFlashProgCheckBuffer, 4
+gFlashProgCheckBuffer:
+	.space	4
 	.section	.bss.IDByte,"aw",%nobits
 	.align	2
 .LANCHOR22 = . + 0
@@ -21904,7 +22673,7 @@ IDByte:
 	.space	32
 	.section	.bss.g_gc_temp_superblock,"aw",%nobits
 	.align	2
-.LANCHOR109 = . + 0
+.LANCHOR111 = . + 0
 	.type	g_gc_temp_superblock, %object
 	.size	g_gc_temp_superblock, 48
 g_gc_temp_superblock:
@@ -21925,14 +22694,20 @@ gBlockPageAlignSize:
 	.space	4
 	.section	.bss.g_gc_superblock,"aw",%nobits
 	.align	2
-.LANCHOR201 = . + 0
+.LANCHOR202 = . + 0
 	.type	g_gc_superblock, %object
 	.size	g_gc_superblock, 48
 g_gc_superblock:
 	.space	48
+	.section	.rodata.__func__.8196,"a",%progbits
+.LANCHOR219 = . + 0
+	.type	__func__.8196, %object
+	.size	__func__.8196, 29
+__func__.8196:
+	.ascii	"allocate_new_data_superblock\000"
 	.section	.bss.g_totle_sys_slc_erase_count,"aw",%nobits
 	.align	2
-.LANCHOR95 = . + 0
+.LANCHOR97 = . + 0
 	.type	g_totle_sys_slc_erase_count, %object
 	.size	g_totle_sys_slc_erase_count, 4
 g_totle_sys_slc_erase_count:
@@ -21944,53 +22719,48 @@ g_totle_sys_slc_erase_count:
 	.size	c_ftl_nand_blks_per_die_shift, 2
 c_ftl_nand_blks_per_die_shift:
 	.space	2
-	.section	.rodata.__func__.8156,"a",%progbits
-.LANCHOR207 = . + 0
-	.type	__func__.8156, %object
-	.size	__func__.8156, 20
-__func__.8156:
-	.ascii	"decrement_vpc_count\000"
 	.section	.bss.g_SlcPartLbaEndSector,"aw",%nobits
 	.align	2
-.LANCHOR151 = . + 0
+.LANCHOR154 = . + 0
 	.type	g_SlcPartLbaEndSector, %object
 	.size	g_SlcPartLbaEndSector, 4
 g_SlcPartLbaEndSector:
 	.space	4
+	.section	.bss.g_gc_cur_blk_max_valid_pages,"aw",%nobits
+	.align	1
+.LANCHOR235 = . + 0
+	.type	g_gc_cur_blk_max_valid_pages, %object
+	.size	g_gc_cur_blk_max_valid_pages, 2
+g_gc_cur_blk_max_valid_pages:
+	.space	2
 	.section	.bss.g_totle_discard_page_count,"aw",%nobits
 	.align	2
-.LANCHOR157 = . + 0
+.LANCHOR160 = . + 0
 	.type	g_totle_discard_page_count, %object
 	.size	g_totle_discard_page_count, 4
 g_totle_discard_page_count:
 	.space	4
 	.section	.bss.c_ftl_nand_bbm_buf_size,"aw",%nobits
 	.align	1
-.LANCHOR90 = . + 0
+.LANCHOR91 = . + 0
 	.type	c_ftl_nand_bbm_buf_size, %object
 	.size	c_ftl_nand_bbm_buf_size, 2
 c_ftl_nand_bbm_buf_size:
 	.space	2
 	.section	.bss.gL2pMapInfo,"aw",%nobits
 	.align	2
-.LANCHOR120 = . + 0
+.LANCHOR122 = . + 0
 	.type	gL2pMapInfo, %object
-	.size	gL2pMapInfo, 40
+	.size	gL2pMapInfo, 44
 gL2pMapInfo:
-	.space	40
+	.space	44
 	.section	.bss.g_gc_head_data_block_count,"aw",%nobits
 	.align	2
-.LANCHOR168 = . + 0
+.LANCHOR171 = . + 0
 	.type	g_gc_head_data_block_count, %object
 	.size	g_gc_head_data_block_count, 4
 g_gc_head_data_block_count:
 	.space	4
-	.section	.rodata.__func__.7338,"a",%progbits
-.LANCHOR218 = . + 0
-	.type	__func__.7338, %object
-	.size	__func__.7338, 13
-__func__.7338:
-	.ascii	"FtlProgPages\000"
 	.section	.bss.gFlashPageBuffer0,"aw",%nobits
 	.align	2
 .LANCHOR44 = . + 0
@@ -22000,25 +22770,31 @@ gFlashPageBuffer0:
 	.space	4
 	.section	.bss.g_req_cache,"aw",%nobits
 	.align	2
-.LANCHOR134 = . + 0
+.LANCHOR137 = . + 0
 	.type	g_req_cache, %object
 	.size	g_req_cache, 4
 g_req_cache:
 	.space	4
 	.section	.data.gFtlInitStatus,"aw",%progbits
 	.align	2
-.LANCHOR222 = . + 0
+.LANCHOR225 = . + 0
 	.type	gFtlInitStatus, %object
 	.size	gFtlInitStatus, 4
 gFtlInitStatus:
 	.word	-1
 	.section	.bss.c_gc_page_buf_num,"aw",%nobits
 	.align	2
-.LANCHOR133 = . + 0
+.LANCHOR136 = . + 0
 	.type	c_gc_page_buf_num, %object
 	.size	c_gc_page_buf_num, 4
 c_gc_page_buf_num:
 	.space	4
+	.section	.rodata.__func__.7718,"a",%progbits
+.LANCHOR113 = . + 0
+	.type	__func__.7718, %object
+	.size	__func__.7718, 26
+__func__.7718:
+	.ascii	"ftl_map_blk_alloc_new_blk\000"
 	.section	.data.NandFlashParaTbl,"aw",%progbits
 	.align	1
 .LANCHOR26 = . + 0
@@ -23906,7 +24682,7 @@ c_ftl_nand_page_pre_blk:
 	.space	2
 	.section	.bss.g_totle_map_block,"aw",%nobits
 	.align	1
-.LANCHOR121 = . + 0
+.LANCHOR123 = . + 0
 	.type	g_totle_map_block, %object
 	.size	g_totle_map_block, 2
 g_totle_map_block:
@@ -23920,17 +24696,11 @@ DeviceCapacity:
 	.space	4
 	.section	.bss.gp_ect_tbl_info,"aw",%nobits
 	.align	2
-.LANCHOR183 = . + 0
+.LANCHOR187 = . + 0
 	.type	gp_ect_tbl_info, %object
 	.size	gp_ect_tbl_info, 4
 gp_ect_tbl_info:
 	.space	4
-	.section	.rodata.__func__.7655,"a",%progbits
-.LANCHOR196 = . + 0
-	.type	__func__.7655, %object
-	.size	__func__.7655, 16
-__func__.7655:
-	.ascii	"load_l2p_region\000"
 	.section	.bss.c_ftl_nand_map_blks_per_plane,"aw",%nobits
 	.align	1
 .LANCHOR79 = . + 0
@@ -23940,28 +24710,28 @@ c_ftl_nand_map_blks_per_plane:
 	.space	2
 	.section	.bss.p_l2p_map_buf,"aw",%nobits
 	.align	2
-.LANCHOR119 = . + 0
+.LANCHOR121 = . + 0
 	.type	p_l2p_map_buf, %object
 	.size	p_l2p_map_buf, 4
 p_l2p_map_buf:
 	.space	4
 	.section	.bss.g_recovery_page_min_ver,"aw",%nobits
 	.align	2
-.LANCHOR138 = . + 0
+.LANCHOR141 = . + 0
 	.type	g_recovery_page_min_ver, %object
 	.size	g_recovery_page_min_ver, 4
 g_recovery_page_min_ver:
 	.space	4
 	.section	.bss.g_active_superblock,"aw",%nobits
 	.align	2
-.LANCHOR107 = . + 0
+.LANCHOR109 = . + 0
 	.type	g_active_superblock, %object
 	.size	g_active_superblock, 48
 g_active_superblock:
 	.space	48
 	.section	.bss.g_gc_bad_block_temp_num,"aw",%nobits
 	.align	1
-.LANCHOR148 = . + 0
+.LANCHOR151 = . + 0
 	.type	g_gc_bad_block_temp_num, %object
 	.size	g_gc_bad_block_temp_num, 2
 g_gc_bad_block_temp_num:

commit f312c7e47abcd342da8b8e6a635ab0aacab2228c
Author: Shunqing Chen <csq@rock-chips.com>
Date:   Fri Nov 17 17:23:44 2017 +0800

    rockchip: i2c: rk3228: support i2c for rk3228 SoC
    
    Change-Id: I94e308893462928a8dd92993261c939bf1e26195
    Signed-off-by: Shunqing Chen <csq@rock-chips.com>
    (cherry picked from commit 82a1cec1a4789ca34c6067ad7d1b27a66c1316ac)

diff --git a/drivers/i2c/rk_i2c.c b/drivers/i2c/rk_i2c.c
index a051893c4a..4c0d95adf6 100644
--- a/drivers/i2c/rk_i2c.c
+++ b/drivers/i2c/rk_i2c.c
@@ -398,6 +398,7 @@ static const struct udevice_id rockchip_i2c_ids[] = {
 	{ .compatible = "rockchip,rk3288-i2c" },
 	{ .compatible = "rockchip,rk3328-i2c" },
 	{ .compatible = "rockchip,rk3399-i2c" },
+	{ .compatible = "rockchip,rk3228-i2c" },
 	{ }
 };
 

commit f492fc00668915c59921e0c63b252aa09a7aed81
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Nov 17 11:06:24 2017 +0800

    rockchip: rk3126: add bnd-d708 board support
    
    Change-Id: Iaf6c81dcc2eb8623f5234d7f2e32b47e536b1c32
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 378e43e097..0032a21377 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -31,6 +31,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
 	rk3036-sdk.dtb \
 	rk3066a-mk808.dtb \
 	rk3126-evb.dtb \
+	rk3126-bnd-d708.dtb \
 	rk3128-evb.dtb \
 	rk3188-radxarock.dtb \
 	rk3288-evb.dtb \
diff --git a/arch/arm/dts/rk3126-bnd-d708.dts b/arch/arm/dts/rk3126-bnd-d708.dts
new file mode 100644
index 0000000000..2f8feb7c96
--- /dev/null
+++ b/arch/arm/dts/rk3126-bnd-d708.dts
@@ -0,0 +1,338 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include "rk3128.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Rockchip RK3126 bnd-d708 board";
+	compatible = "rockchip,rk3128-evb", "rockchip,rk3128";
+
+	chosen {
+		stdout-path = &uart2;
+	};
+
+	vcc5v0_otg: vcc5v0-otg-drv {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc5v0_otg";
+		gpio = <&gpio0 26 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&otg_vbus_drv>;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+	};
+
+	vcc5v0_host: vcc5v0-host-drv {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc5v0_host";
+		gpio = <&gpio2 23 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&host_vbus_drv>;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+	};
+
+	vcc_backlight: vcc-backlight {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_backlight";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+	};
+
+	backlight: backlight {
+		compatible = "pwm-backlight";
+		brightness-levels = <
+			255 169 168 168 167 166 166 165
+			164 164 163 162 162 161 160 160
+			159 158 158 157 156 156 155 154
+			154 153 152 152 151 150 150 149
+			148 148 147 146 146 145 144 144
+			143 142 142 141 140 140 139 138
+			138 137 136 136 135 134 134 133
+			132 132 131 130 130 129 128 128
+			127 126 126 125 124 124 123 122
+			122 121 120 120 119 118 118 117
+			116 116 115 114 114 113 112 112
+			111 110 110 109 108 108 107 106
+			106 105 104 104 103 102 102 101
+			100 100  99  98  98  97  96  96
+			 95  94  94  93  92  92  91  90
+			 90  89  88  88  87  86  86  85
+			 84  84  83  82  82  81  80  80
+			 79  78  78  77  76  76  75  74
+			 74  73  72  72  71  70  70  69
+			 68  68  67  66  66  65  64  64
+			 63  62  62  61  60  60  59  58
+			 58  57  56  56  55  54  54  53
+			 52  52  51  50  50  49  48  48
+			 47  46  46  45  44  44  43  42
+			 42  41  40  40  39  38  38  37
+			 36  36  35  34  34  33  32  32
+			 31  30  30  29  28  28  27  26
+			 26  25  24  24  23  22  22  21
+			 20  20  19  18  18  17  16  16
+			 15  14  14  13  12  12  11  10
+			 10   9   8   8   7   6   6   5
+			  4   4   3   2   1   1   1   0>;
+		default-brightness-level = <128>;
+		pwms = <&pwm0 0 25000 0>;
+		enable-gpios = <&gpio2 RK_PB6 GPIO_ACTIVE_HIGH>;
+		power-supply = <&vcc_backlight>;
+		status = "okay";
+	};
+
+	adc-keys {
+		compatible = "adc-keys";
+		io-channels = <&saradc 2>;
+		io-channel-names = "buttons";
+		poll-interval = <100>;
+		keyup-threshold-microvolt = <3300000>;
+
+		button-up {
+			label = "Volume Up";
+			linux,code = <KEY_VOLUMEUP>;
+			press-threshold-microvolt = <0>;
+		};
+
+		button-down {
+			label = "Volume Down";
+			linux,code = <KEY_VOLUMEDOWN>;
+			press-threshold-microvolt = <1650000>;
+		};
+	};
+
+	charge-animation {
+		compatible = "charge-animation";
+		screen-on-voltage-threshold = <3350>;
+		power-on-voltage-threshold = <3450>;
+		power-on-soc-threshold = <0>;
+		status = "okay";
+	};
+};
+
+&i2c0 {
+	status = "okay";
+	clock-frequency = <400000>;
+
+	rk816: pmic@1a {
+		compatible = "rockchip,rk816";
+		reg = <0x1a>;
+		interrupt-parent = <&gpio0>;
+		interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pmic_int_l>;
+		rockchip,system-power-controller;
+		wakeup-source;
+		gpio-controller;
+		#gpio-cells = <2>;
+		#clock-cells = <1>;
+		clock-output-names = "xin32k", "rk816-clkout2";
+
+		gpio {
+			status = "okay";
+		};
+
+		pwrkey {
+			status = "okay";
+		};
+
+		rtc {
+			status = "okay";
+		};
+
+		battery {
+			compatible = "rk816-battery";
+			ocv_table = < 3400 3654 3686 3710 3744 3775 3803
+						  3825 3843 3858 3870 3886 3916 3955
+						  3988 4010 4023 4032 4049 4080 4151 >;
+			design_capacity = <2000>;
+			design_qmax = <2200>;
+			bat_res = <120>;
+			max_input_current = <2000>;
+			max_chrg_current = <1000>;
+			max_chrg_voltage = <4200>;
+			sleep_enter_current = <300>;
+			sleep_exit_current = <300>;
+			sleep_filter_current = <100>;
+			power_off_thresd = <3500>;
+			zero_algorithm_vol = <3800>;
+			max_soc_offset = <60>;
+			monitor_sec = <5>;
+			virtual_power = <0>;
+			power_dc2otg = <0>;
+			dc_det_adc = <0>;
+		};
+
+		regulators {
+
+			vdd_arm: DCDC_REG1{
+				regulator-name= "vdd_arm";
+				regulator-min-microvolt = <750000>;
+				regulator-max-microvolt = <1500000>;
+				regulator-ramp-delay = <6001>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <900000>;
+				};
+			};
+
+			vdd_log: DCDC_REG2 {
+				regulator-name= "vdd_logic";
+				regulator-min-microvolt = <750000>;
+				regulator-max-microvolt = <1500000>;
+				regulator-ramp-delay = <6001>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1000000>;
+				};
+			};
+
+			vcc_ddr: DCDC_REG3 {
+				regulator-name = "vcc_ddr";
+				regulator-always-on;
+				regulator-boot-on;
+			};
+
+			vcc_io: DCDC_REG4 {
+				regulator-name = "vcc_io";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3000000>;
+				};
+			};
+
+			vcc28_cif: LDO_REG1 {
+				regulator-name = "vcc28_cif";
+				regulator-min-microvolt = <2800000>;
+				regulator-max-microvolt = <2800000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcc18_cif: LDO_REG2 {
+				regulator-name = "vcc18_cif";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vdd_11: LDO_REG3 {
+				regulator-name = "vdd_11";
+				regulator-min-microvolt = <1100000>;
+				regulator-max-microvolt = <1100000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1100000>;
+				};
+			};
+
+			ldo4: LDO_REG4 {
+				regulator-name= "ldo4";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			ldo5: LDO_REG5 {
+				regulator-name= "ldo5";
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3000000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			ldo6: LDO_REG6 {
+				regulator-name= "ldo6";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3300000>;
+				};
+			};
+		};
+	};
+};
+
+&nandc {
+	status = "okay";
+};
+
+&u2phy {
+	status = "okay";
+};
+
+&u2phy_otg {
+	status = "okay";
+};
+
+&u2phy_host {
+	status = "okay";
+};
+
+&usb_host_ehci {
+	status = "okay";
+};
+
+&usb_host_ohci {
+	status = "okay";
+};
+
+&usb_otg {
+	vbus-supply = <&vcc5v0_otg>;
+	status = "okay";
+};
+
+&pinctrl {
+	usb_otg {
+		otg_vbus_drv: host-vbus-drv {
+			rockchip,pins = <0 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	usb_host {
+		host_vbus_drv: host-vbus-drv {
+			rockchip,pins = <2 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	pmic_int_l: pmic-int-l {
+			rockchip,pins =
+				<0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
+	};
+};
+
+&saradc {
+	status = "okay";
+};
diff --git a/configs/bnd-d708-rk3126_defconfig b/configs/bnd-d708-rk3126_defconfig
new file mode 100644
index 0000000000..18afe17745
--- /dev/null
+++ b/configs/bnd-d708-rk3126_defconfig
@@ -0,0 +1,76 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_ROCKCHIP_RK3128=y
+CONFIG_ROCKCHIP_BLOCK_API=y
+CONFIG_ROCKCHIP_PARAM=y
+CONFIG_ROCKCHIP_RESOURCE_IMAGE=y
+CONFIG_ROCKCHIP_PARTITION_BOOT=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3126-bnd-d708"
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_FASTBOOT=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_CMD_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x60800800
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_BMP=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_CHARGE_DISPLAY=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_ROCKCHIP_RK3128=y
+CONFIG_DM_FUEL_GAUGE=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_DM_CHARGE_DISPLAY=y
+CONFIG_CHARGE_ANIMATION=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_DEBUG_UART_BASE=0x20068000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x310c
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_LVDS=y
+CONFIG_LCD=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_ERRNO_STR=y
+CONFIG_TEST_ROCKCHIP=y

commit 2ffd0cc6471a3ff735add1d658365f9288fa455a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 20 11:07:37 2017 +0800

    ARM: dts: rk3128: fix i2c2 address typo
    
    Change-Id: I798374f2c7625c92809aa51613efcb3e6895a177
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3128.dtsi b/arch/arm/dts/rk3128.dtsi
index bed21b4bf8..c4bd95384b 100644
--- a/arch/arm/dts/rk3128.dtsi
+++ b/arch/arm/dts/rk3128.dtsi
@@ -533,7 +533,7 @@
 
 	i2c0: i2c0@20072000 {
 		compatible = "rockchip,rk3128-i2c", "rockchip,rk3288-i2c";
-		reg = <20072000 0x1000>;
+		reg = <0x20072000 0x1000>;
 		interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
 		#address-cells = <1>;
 		#size-cells = <0>;

commit e9cfb932f981cf94c2771cd8a60277cf3f85f019
Author: Cody Xie <cody.xie@rock-chips.com>
Date:   Mon Nov 20 12:50:35 2017 +0800

    rockchip: efuse: Fix compile warning.
    
    Change-Id: I57b331c0e2bdc713c60e1f636b66a11cdf3ef015
    Signed-off-by: Cody Xie <cody.xie@rock-chips.com>
    (cherry picked from commit d3f8f6517e8b2073aff51d6a35528baeb35d2153)

diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c
index 1b060b7aa6..b4ad19cfe8 100644
--- a/drivers/misc/rockchip-efuse.c
+++ b/drivers/misc/rockchip-efuse.c
@@ -209,19 +209,19 @@ static int rockchip_efuse_ofdata_to_platdata(struct udevice *dev)
 static const struct udevice_id rockchip_efuse_ids[] = {
 	{
 		.compatible = "rockchip,rockchip-efuse",
-		.data = (void *)&rockchip_rk3288_efuse_read,
+		.data = (ulong)&rockchip_rk3288_efuse_read,
 	},
 	{
 		.compatible = "rockchip,rk3066a-efuse",
-		.data = (void *)&rockchip_rk3288_efuse_read,
+		.data = (ulong)&rockchip_rk3288_efuse_read,
 	},
 	{
 		.compatible = "rockchip,rk3188-efuse",
-		.data = (void *)&rockchip_rk3288_efuse_read,
+		.data = (ulong)&rockchip_rk3288_efuse_read,
 	},
 	{
 		.compatible = "rockchip,rk322x-efuse",
-		.data = (void *)&rockchip_rk3288_efuse_read,
+		.data = (ulong)&rockchip_rk3288_efuse_read,
 	},
 	{
 		.compatible = "rockchip,rk3399-efuse",

commit 95a5167379ba2d7f27e907afb5b00f2474376791
Author: Cody Xie <cody.xie@rock-chips.com>
Date:   Mon Nov 20 12:51:01 2017 +0800

    libavb: Fix compile warning.
    
    Change-Id: I6a36f02348e61c166334221edc157ee8a261253a
    Signed-off-by: Cody Xie <cody.xie@rock-chips.com>
    (cherry picked from commit a0e0ea07af830fdf873fb874a7e76264597bca3b)

diff --git a/lib/avb/rk_libavb/avb_sysdeps_posix.c b/lib/avb/rk_libavb/avb_sysdeps_posix.c
index 44ca777ce1..562f9214be 100644
--- a/lib/avb/rk_libavb/avb_sysdeps_posix.c
+++ b/lib/avb/rk_libavb/avb_sysdeps_posix.c
@@ -56,7 +56,6 @@ size_t avb_strlen(const char* str) {
 
 void avb_abort(void) {
   abort();
-return;
 }
 
 void avb_print(const char* message) {

commit f6762129cedbb0a18ada56c11ec32acc901152c6
Author: Cody Xie <cody.xie@rock-chips.com>
Date:   Mon Nov 20 12:50:18 2017 +0800

    rockchip: rk322x: Fix compile warning.
    
    Change-Id: I52b94730e87bbefb8cccb371c7a246c0980345fc
    Signed-off-by: Cody Xie <cody.xie@rock-chips.com>
    (cherry picked from commit 4ed43066238174127e72758fbed3725eb95c6b97)

diff --git a/arch/arm/mach-rockchip/rk322x-board.c b/arch/arm/mach-rockchip/rk322x-board.c
index 88281abc0c..fdfdb5bc4c 100644
--- a/arch/arm/mach-rockchip/rk322x-board.c
+++ b/arch/arm/mach-rockchip/rk322x-board.c
@@ -12,6 +12,7 @@
 #include <asm/gpio.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/periph.h>
+#include <asm/arch/timer.h>
 #include <asm/arch/grf_rk322x.h>
 #include <asm/arch/boot_mode.h>
 
@@ -37,6 +38,19 @@ struct tos_parameter_t {
 	s64 reserve[8];
 };
 
+#if defined(CONFIG_USB_FUNCTION_FASTBOOT)
+int fb_set_reboot_flag(void)
+{
+	struct rk322x_grf *grf;
+
+	printf("Setting reboot to fastboot flag ...\n");
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	/* Set boot mode to fastboot */
+	writel(BOOT_FASTBOOT, &grf->os_reg[0]);
+
+	return 0;
+}
+
 #define FASTBOOT_KEY_GPIO 43 /* GPIO1_B3 */
 static int fastboot_key_pressed(void)
 {
@@ -44,6 +58,7 @@ static int fastboot_key_pressed(void)
 	gpio_direction_input(FASTBOOT_KEY_GPIO);
 	return !gpio_get_value(FASTBOOT_KEY_GPIO);
 }
+#endif
 
 __weak int rk_board_late_init(void)
 {
@@ -52,10 +67,12 @@ __weak int rk_board_late_init(void)
 
 int board_late_init(void)
 {
+#if defined(CONFIG_USB_FUNCTION_FASTBOOT)
 	if (fastboot_key_pressed()) {
 		printf("fastboot key pressed!\n");
 		fb_set_reboot_flag();
 	}
+#endif
 
 	setup_boot_mode();
 
@@ -171,16 +188,3 @@ int board_usb_cleanup(int index, enum usb_init_type init)
 }
 #endif
 
-#if defined(CONFIG_USB_FUNCTION_FASTBOOT)
-int fb_set_reboot_flag(void)
-{
-	struct rk322x_grf *grf;
-
-	printf("Setting reboot to fastboot flag ...\n");
-	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	/* Set boot mode to fastboot */
-	writel(BOOT_FASTBOOT, &grf->os_reg[0]);
-
-	return 0;
-}
-#endif

commit f337c9f71544a430370ef1bd10f550651b9f18ea
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Mon Nov 20 19:08:56 2017 +0800

    common: edid: Fix some warning
    
    Change-Id: I65483b598fa89bd871913f58ad00935f6dadaa95
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>

diff --git a/common/edid.c b/common/edid.c
index 0eb8984021..adfe8f6952 100644
--- a/common/edid.c
+++ b/common/edid.c
@@ -1442,14 +1442,14 @@ static void decode_mode(u8 *buf, struct drm_display_mode *mode)
  *
  * Returns true if @vendor is in @edid, false otherwise
  */
-static bool edid_vendor(struct edid1_info *edid, char *vendor)
+static bool edid_vendor(struct edid *edid, char *vendor)
 {
 	char edid_vendor[3];
 
-	edid_vendor[0] = ((edid->manufacturer_name[0] & 0x7c) >> 2) + '@';
-	edid_vendor[1] = (((edid->manufacturer_name[0] & 0x3) << 3) |
-			  ((edid->manufacturer_name[1] & 0xe0) >> 5)) + '@';
-	edid_vendor[2] = (edid->manufacturer_name[1] & 0x1f) + '@';
+	edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
+	edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
+			  ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
+	edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
 
 	return !strncmp(edid_vendor, vendor, 3);
 }
@@ -1487,6 +1487,32 @@ static bool cea_is_hdmi_vsdb_present(struct edid_cea861_info *info)
 	return false;
 }
 
+static int drm_get_vrefresh(const struct drm_display_mode *mode)
+{
+	int refresh = 0;
+	unsigned int calc_val;
+
+	if (mode->vrefresh > 0) {
+		refresh = mode->vrefresh;
+	} else if (mode->htotal > 0 && mode->vtotal > 0) {
+		int vtotal;
+
+		vtotal = mode->vtotal;
+		/* work out vrefresh the value will be x1000 */
+		calc_val = (mode->clock * 1000);
+		calc_val /= mode->htotal;
+		refresh = (calc_val + vtotal / 2) / vtotal;
+
+		if (mode->flags & DRM_MODE_FLAG_INTERLACE)
+			refresh *= 2;
+		if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
+			refresh /= 2;
+		if (mode->vscan > 1)
+			refresh /= mode->vscan;
+	}
+	return refresh;
+}
+
 int edid_get_drm_mode(u8 *buf, int buf_size, struct drm_display_mode *mode,
 		      int *panel_bits_per_colourp)
 {
@@ -1977,7 +2003,7 @@ struct drm_display_mode *drm_cvt_mode(int hdisplay, int vdisplay, int vrefresh,
 		/* 3) Nominal HSync width (% of line period) - default 8 */
 #define CVT_HSYNC_PERCENTAGE	8
 		unsigned int hblank_percentage;
-		int vsyncandback_porch, vback_porch, hblank;
+		int vsyncandback_porch, hblank;
 
 		/* estimated the horizontal period */
 		tmp1 = HV_FACTOR * 1000000  -
@@ -1992,8 +2018,9 @@ struct drm_display_mode *drm_cvt_mode(int hdisplay, int vdisplay, int vrefresh,
 			vsyncandback_porch = vsync + CVT_MIN_V_PORCH;
 		else
 			vsyncandback_porch = tmp1;
-		/* 10. Find number of lines in back porch */
-		vback_porch = vsyncandback_porch - vsync;
+		/* 10. Find number of lines in back porch
+		 *		vback_porch = vsyncandback_porch - vsync;
+		 */
 		drm_mode->vtotal = vdisplay_rnd + 2 * vmargin +
 				vsyncandback_porch + CVT_MIN_V_PORCH;
 		/* 5) Definition of Horizontal blanking time limitation */
@@ -2203,9 +2230,8 @@ static bool drm_valid_hdmi_vic(u8 vic)
 }
 
 static void drm_add_hdmi_modes(struct hdmi_edid_data *data,
-			       struct drm_display_mode *mode)
+			       const struct drm_display_mode *mode)
 {
-	int ret;
 	struct drm_display_mode *mode_buf = data->mode_buf;
 
 	mode_buf[(data->modes)++] = *mode;
@@ -2327,8 +2353,7 @@ static
 int do_y420vdb_modes(const u8 *svds, u8 svds_len, struct drm_hdmi_info *hdmi,
 		     struct hdmi_edid_data *data)
 {
-	int modes = 0, i, ret;
-	struct drm_display_mode *mode_buf = data->mode_buf;
+	int modes = 0, i;
 
 	for (i = 0; i < svds_len; i++) {
 		u8 vic = svd_to_vic(svds[i]);
@@ -2371,7 +2396,7 @@ stereo_match_mandatory(const struct drm_display_mode *mode,
 	return mode->hdisplay == stereo_mode->width &&
 	       mode->vdisplay == stereo_mode->height &&
 	       interlaced == (stereo_mode->flags & DRM_MODE_FLAG_INTERLACE) &&
-	       drm_mode_vrefresh(mode) == stereo_mode->vrefresh;
+	       drm_get_vrefresh(mode) == stereo_mode->vrefresh;
 }
 
 static int add_hdmi_mandatory_stereo_modes(struct hdmi_edid_data *data)
@@ -2450,8 +2475,6 @@ static int add_3d_struct_modes(struct hdmi_edid_data *data, u16 structure,
 
 static int add_hdmi_mode(struct hdmi_edid_data *data, u8 vic)
 {
-	struct drm_display_mode *newmode;
-
 	if (!drm_valid_hdmi_vic(vic)) {
 		debug("Unknown HDMI VIC: %d\n", vic);
 		return 0;
@@ -3007,7 +3030,7 @@ static void drm_add_display_info(struct hdmi_edid_data *data, struct edid *edid)
 		break;
 	}
 
-	debug("%s: Assigning EDID-1.4 digital sink color depth as %d bpc.\n",
+	debug("Assigning EDID-1.4 digital sink color depth as %d bpc.\n",
 	      info->bpc);
 
 	info->color_formats |= DRM_COLOR_FORMAT_RGB444;
@@ -3020,12 +3043,10 @@ static void drm_add_display_info(struct hdmi_edid_data *data, struct edid *edid)
 static
 int add_cea_modes(struct hdmi_edid_data *data, struct edid *edid)
 {
-	struct edid_cea861_info *info;
 	const u8 *cea = drm_find_cea_extension(edid);
 	const u8 *db, *hdmi = NULL, *video = NULL;
 	u8 dbl, hdmi_len, video_len = 0;
 	int modes = 0;
-	u8 end, i = 0;
 
 	if (cea && cea_revision(cea) >= 3) {
 		int i, start, end;
@@ -3261,7 +3282,7 @@ struct drm_display_mode *drm_mode_detailed(struct edid *edid,
 
 set_refresh:
 
-	mode->vrefresh = drm_mode_vrefresh(mode);
+	mode->vrefresh = drm_get_vrefresh(mode);
 
 	return mode;
 }
@@ -3718,7 +3739,7 @@ static struct drm_display_mode *drm_mode_find_dmt(
 			continue;
 		if (vsize != ptr->vdisplay)
 			continue;
-		if (fresh != drm_mode_vrefresh(ptr))
+		if (fresh != drm_get_vrefresh(ptr))
 			continue;
 		if (rb != mode_is_rb(ptr))
 			continue;
@@ -3755,9 +3776,8 @@ drm_gtf_mode_complex(int hdisplay, int vdisplay,
 	int top_margin, bottom_margin;
 	int interlace;
 	unsigned int hfreq_est;
-	int vsync_plus_bp, vback_porch;
-	unsigned int vtotal_lines, vfieldrate_est, hperiod;
-	unsigned int vfield_rate, vframe_rate;
+	int vsync_plus_bp;
+	unsigned int vtotal_lines;
 	int left_margin, right_margin;
 	unsigned int total_active_pixels, ideal_duty_cycle;
 	unsigned int hblank, total_pixels, pixel_freq;
@@ -3817,23 +3837,28 @@ drm_gtf_mode_complex(int hdisplay, int vdisplay,
 	/* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */
 	vsync_plus_bp = MIN_VSYNC_PLUS_BP * hfreq_est / 1000;
 	vsync_plus_bp = (vsync_plus_bp + 500) / 1000;
-	/*  9. Find the number of lines in V back porch alone: */
-	vback_porch = vsync_plus_bp - V_SYNC_RQD;
+	/*  9. Find the number of lines in V back porch alone:
+	 *	vback_porch = vsync_plus_bp - V_SYNC_RQD;
+	 */
 	/*  10. Find the total number of lines in Vertical field period: */
 	vtotal_lines = vdisplay_rnd + top_margin + bottom_margin +
 			vsync_plus_bp + GTF_MIN_V_PORCH;
-	/*  11. Estimate the Vertical field frequency: */
-	vfieldrate_est = hfreq_est / vtotal_lines;
-	/*  12. Find the actual horizontal period: */
-	hperiod = 1000000 / (vfieldrate_rqd * vtotal_lines);
-
-	/*  13. Find the actual Vertical field frequency: */
-	vfield_rate = hfreq_est / vtotal_lines;
-	/*  14. Find the Vertical frame frequency: */
-	if (interlaced)
-		vframe_rate = vfield_rate / 2;
-	else
-		vframe_rate = vfield_rate;
+	/*  11. Estimate the Vertical field frequency:
+	 *  vfieldrate_est = hfreq_est / vtotal_lines;
+	 */
+
+	/*  12. Find the actual horizontal period:
+	 *	hperiod = 1000000 / (vfieldrate_rqd * vtotal_lines);
+	 */
+	/*  13. Find the actual Vertical field frequency:
+	 *	vfield_rate = hfreq_est / vtotal_lines;
+	 */
+	/*  14. Find the Vertical frame frequency:
+	 *	if (interlaced)
+	 *		vframe_rate = vfield_rate / 2;
+	 *	else
+	 *		vframe_rate = vfield_rate;
+	 */
 	/*  15. Find number of pixels in left margin: */
 	if (margins)
 		left_margin = (hdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
@@ -3973,7 +3998,7 @@ static struct drm_display_mode *
 drm_mode_std(struct hdmi_edid_data *data, struct edid *edid,
 	     struct std_timing *t)
 {
-	struct drm_display_mode *m, *mode = NULL;
+	struct drm_display_mode *mode = NULL;
 	int i, hsize, vsize;
 	int vrefresh_rate;
 	int num = data->modes;
@@ -4021,7 +4046,7 @@ drm_mode_std(struct hdmi_edid_data *data, struct edid *edid,
 	for (i = 0; i < num; i++)
 		if (data->mode_buf[i].hdisplay == hsize &&
 		    data->mode_buf[i].hdisplay &&
-		    drm_mode_vrefresh(&data->mode_buf[i]) == vrefresh_rate)
+		    drm_get_vrefresh(&data->mode_buf[i]) == vrefresh_rate)
 			return NULL;
 
 	/* HDTV hack, part 2 */
@@ -4249,7 +4274,7 @@ static u8 drm_match_hdmi_mode(const struct drm_display_mode *to_match)
 static int
 add_alternate_cea_modes(struct hdmi_edid_data *data, struct edid *edid)
 {
-	struct drm_display_mode *mode, *tmp;
+	struct drm_display_mode *mode;
 	int i, num, modes = 0;
 
 	/* Don't add CEA modes if the CEA extension block is missing */
@@ -4389,7 +4414,7 @@ drm_display_mode *drm_displayid_detailed(struct displayid_detailed_timings_1
 		vsync_positive ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
 
 	if (timings->flags & 0x80)
-	mode->vrefresh = drm_mode_vrefresh(mode);
+	mode->vrefresh = drm_get_vrefresh(mode);
 
 	return mode;
 }
@@ -4487,7 +4512,7 @@ mode_in_vsync_range(const struct drm_display_mode *mode,
 	vmax = t[6];
 	if (edid->revision >= 4)
 		vmax += ((t[4] & 0x02) ? 255 : 0);
-	vsync = drm_mode_vrefresh(mode);
+	vsync = drm_get_vrefresh(mode);
 
 	return (vsync <= vmax && vsync >= vmin);
 }
@@ -4548,7 +4573,7 @@ static bool valid_inferred_mode(struct hdmi_edid_data *data,
 		m = &data->mode_buf[i];
 		if (mode->hdisplay == m->hdisplay &&
 		    mode->vdisplay == m->vdisplay &&
-		    drm_mode_vrefresh(mode) == drm_mode_vrefresh(m))
+		    drm_get_vrefresh(mode) == drm_get_vrefresh(m))
 			return false; /* duplicated */
 		if (mode->hdisplay <= m->hdisplay &&
 		    mode->vdisplay <= m->vdisplay)
@@ -4712,7 +4737,7 @@ add_inferred_modes(struct hdmi_edid_data *data, struct edid *edid)
 static void edid_fixup_preferred(struct hdmi_edid_data *data,
 				 u32 quirks)
 {
-	struct drm_display_mode *t, *cur_mode, *preferred_mode;
+	struct drm_display_mode *cur_mode, *preferred_mode;
 	int i, target_refresh = 0;
 	int num = data->modes;
 	int cur_vrefresh, preferred_vrefresh;
@@ -4738,9 +4763,9 @@ static void edid_fixup_preferred(struct hdmi_edid_data *data,
 			preferred_mode = cur_mode;
 
 		cur_vrefresh = cur_mode->vrefresh ?
-		cur_mode->vrefresh : drm_mode_vrefresh(cur_mode);
+		cur_mode->vrefresh : drm_get_vrefresh(cur_mode);
 		preferred_vrefresh = preferred_mode->vrefresh ?
-		preferred_mode->vrefresh : drm_mode_vrefresh(preferred_mode);
+		preferred_mode->vrefresh : drm_get_vrefresh(preferred_mode);
 		/* At a given size, try to get closest to target refresh */
 		if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
 		    MODE_REFRESH_DIFF(cur_vrefresh, target_refresh) <

commit 8f7c31646f1f4c9f772dafe69c73d3e362f0a759
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Thu Nov 16 14:18:14 2017 +0800

    drm/rockchip: Using get device function to get display device.
    
    If the uclass_find_device_by_of_offset display device probe function won't be
    called. Display device's pinctrl will not take effect. SO we use
    uclass_get_device_by_of_offset to get display device.
    
    Change-Id: I1329eb5b5ffca7609dfc52bcc5623476f99bc8b0
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 5a746d579f..c5ef626907 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -918,7 +918,7 @@ static int rockchip_display_probe(struct udevice *dev)
 			       fdt_get_name(blob, child, NULL));
 			continue;
 		}
-		ret = uclass_find_device_by_of_offset(UCLASS_DISPLAY, conn_node, &conn_dev);
+		ret = uclass_get_device_by_of_offset(UCLASS_DISPLAY, conn_node, &conn_dev);
 		if (ret) {
 			printf("Warn: %s: can't find connector driver\n",
 			       fdt_get_name(blob, child, NULL));

commit f5e7d251111abcb792372f8aa5f10b29ae81f10b
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Mon Oct 30 15:09:22 2017 +0800

    drm/rockchip: Support drm dw-hdmi
    
    Add drm hdmi refer to kernel. Support Synopsys PHY HDMI,
    RK3399 has been tested.
    
    Change-Id: Iaae35ff15333cd1082149e016157c66ec3a6f3a6
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>

diff --git a/drivers/video/drm/Kconfig b/drivers/video/drm/Kconfig
index 3f262e6e8a..08aebd99d1 100644
--- a/drivers/video/drm/Kconfig
+++ b/drivers/video/drm/Kconfig
@@ -15,6 +15,14 @@ config DRM_ROCKCHIP_PANEL
 config DRM_ROCKCHIP_DSI_PANEL
 	bool
 
+config DRM_ROCKCHIP_DW_HDMI
+	bool "Rockchip specific extensions for Synopsys DW HDMI"
+	depends on DRM_ROCKCHIP
+	help
+	 This selects support for Rockchip SoC specific extensions
+	 for the Synopsys DesignWare HDMI driver. If you want to
+	 enable HDMI on, you should selet this option.
+
 config DRM_ROCKCHIP_MIPI_DSI
 	bool
 
diff --git a/drivers/video/drm/Makefile b/drivers/video/drm/Makefile
old mode 100755
new mode 100644
index 8ecbad06d8..352b2be2a1
--- a/drivers/video/drm/Makefile
+++ b/drivers/video/drm/Makefile
@@ -11,6 +11,8 @@ obj-y += rockchip_display.o rockchip_crtc.o rockchip_phy.o \
 obj-$(CONFIG_DRM_ROCKCHIP_MIPI_DSI)	+= rockchip_mipi_dsi.o
 obj-$(CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI) += rockchip-dw-mipi-dsi.o \
 			rockchip-inno-mipi-dphy.o rockchip_dsi_panel.o
+obj-$(CONFIG_DRM_ROCKCHIP_DW_HDMI) += rockchip_dw_hdmi.o dw_hdmi.o
+obj-$(CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI) += rockchip-dw-mipi-dsi.o rockchip-inno-mipi-dphy.o
 obj-$(CONFIG_DRM_ROCKCHIP_ANALOGIX_DP) += rockchip_analogix_dp.o rockchip_analogix_dp_reg.o
 obj-$(CONFIG_DRM_ROCKCHIP_LVDS) += rockchip_lvds.o
 obj-$(CONFIG_DRM_ROCKCHIP_PANEL) += panel_simple.o
diff --git a/drivers/video/drm/dw_hdmi.c b/drivers/video/drm/dw_hdmi.c
new file mode 100644
index 0000000000..746afcd0f6
--- /dev/null
+++ b/drivers/video/drm/dw_hdmi.c
@@ -0,0 +1,2246 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <fdtdec.h>
+#include <fdt_support.h>
+#include <malloc.h>
+#include <syscon.h>
+#include <asm/arch-rockchip/clock.h>
+#include <edid.h>
+#include <linux/hdmi.h>
+#include <linux/media-bus-format.h>
+#include <linux/dw_hdmi.h>
+#include <asm/io.h>
+#include "rockchip_display.h"
+#include "rockchip_crtc.h"
+#include "rockchip_connector.h"
+#include "dw_hdmi.h"
+
+/*
+ * Unless otherwise noted, entries in this table are 100% optimization.
+ * Values can be obtained from hdmi_compute_n() but that function is
+ * slow so we pre-compute values we expect to see.
+ *
+ * All 32k and 48k values are expected to be the same (due to the way
+ * the math works) for any rate that's an exact kHz.
+ */
+static const struct dw_hdmi_audio_tmds_n common_tmds_n_table[] = {
+	{ .tmds = 25175000, .n_32k = 4096, .n_44k1 = 12854, .n_48k = 6144, },
+	{ .tmds = 25200000, .n_32k = 4096, .n_44k1 = 5656, .n_48k = 6144, },
+	{ .tmds = 27000000, .n_32k = 4096, .n_44k1 = 5488, .n_48k = 6144, },
+	{ .tmds = 28320000, .n_32k = 4096, .n_44k1 = 5586, .n_48k = 6144, },
+	{ .tmds = 30240000, .n_32k = 4096, .n_44k1 = 5642, .n_48k = 6144, },
+	{ .tmds = 31500000, .n_32k = 4096, .n_44k1 = 5600, .n_48k = 6144, },
+	{ .tmds = 32000000, .n_32k = 4096, .n_44k1 = 5733, .n_48k = 6144, },
+	{ .tmds = 33750000, .n_32k = 4096, .n_44k1 = 6272, .n_48k = 6144, },
+	{ .tmds = 36000000, .n_32k = 4096, .n_44k1 = 5684, .n_48k = 6144, },
+	{ .tmds = 40000000, .n_32k = 4096, .n_44k1 = 5733, .n_48k = 6144, },
+	{ .tmds = 49500000, .n_32k = 4096, .n_44k1 = 5488, .n_48k = 6144, },
+	{ .tmds = 50000000, .n_32k = 4096, .n_44k1 = 5292, .n_48k = 6144, },
+	{ .tmds = 54000000, .n_32k = 4096, .n_44k1 = 5684, .n_48k = 6144, },
+	{ .tmds = 65000000, .n_32k = 4096, .n_44k1 = 7056, .n_48k = 6144, },
+	{ .tmds = 68250000, .n_32k = 4096, .n_44k1 = 5376, .n_48k = 6144, },
+	{ .tmds = 71000000, .n_32k = 4096, .n_44k1 = 7056, .n_48k = 6144, },
+	{ .tmds = 72000000, .n_32k = 4096, .n_44k1 = 5635, .n_48k = 6144, },
+	{ .tmds = 73250000, .n_32k = 4096, .n_44k1 = 14112, .n_48k = 6144, },
+	{ .tmds = 74250000, .n_32k = 4096, .n_44k1 = 6272, .n_48k = 6144, },
+	{ .tmds = 75000000, .n_32k = 4096, .n_44k1 = 5880, .n_48k = 6144, },
+	{ .tmds = 78750000, .n_32k = 4096, .n_44k1 = 5600, .n_48k = 6144, },
+	{ .tmds = 78800000, .n_32k = 4096, .n_44k1 = 5292, .n_48k = 6144, },
+	{ .tmds = 79500000, .n_32k = 4096, .n_44k1 = 4704, .n_48k = 6144, },
+	{ .tmds = 83500000, .n_32k = 4096, .n_44k1 = 7056, .n_48k = 6144, },
+	{ .tmds = 85500000, .n_32k = 4096, .n_44k1 = 5488, .n_48k = 6144, },
+	{ .tmds = 88750000, .n_32k = 4096, .n_44k1 = 14112, .n_48k = 6144, },
+	{ .tmds = 97750000, .n_32k = 4096, .n_44k1 = 14112, .n_48k = 6144, },
+	{ .tmds = 101000000, .n_32k = 4096, .n_44k1 = 7056, .n_48k = 6144, },
+	{ .tmds = 106500000, .n_32k = 4096, .n_44k1 = 4704, .n_48k = 6144, },
+	{ .tmds = 108000000, .n_32k = 4096, .n_44k1 = 5684, .n_48k = 6144, },
+	{ .tmds = 115500000, .n_32k = 4096, .n_44k1 = 5712, .n_48k = 6144, },
+	{ .tmds = 119000000, .n_32k = 4096, .n_44k1 = 5544, .n_48k = 6144, },
+	{ .tmds = 135000000, .n_32k = 4096, .n_44k1 = 5488, .n_48k = 6144, },
+	{ .tmds = 146250000, .n_32k = 4096, .n_44k1 = 6272, .n_48k = 6144, },
+	{ .tmds = 148500000, .n_32k = 4096, .n_44k1 = 5488, .n_48k = 6144, },
+	{ .tmds = 154000000, .n_32k = 4096, .n_44k1 = 5544, .n_48k = 6144, },
+	{ .tmds = 162000000, .n_32k = 4096, .n_44k1 = 5684, .n_48k = 6144, },
+
+	/* For 297 MHz+ HDMI spec have some other rule for setting N */
+	{ .tmds = 297000000, .n_32k = 3073, .n_44k1 = 4704, .n_48k = 5120, },
+	{ .tmds = 594000000, .n_32k = 3073, .n_44k1 = 9408, .n_48k = 10240, },
+
+	/* End of table */
+	{ .tmds = 0,         .n_32k = 0,    .n_44k1 = 0,    .n_48k = 0, },
+};
+
+static const u16 csc_coeff_default[3][4] = {
+	{ 0x2000, 0x0000, 0x0000, 0x0000 },
+	{ 0x0000, 0x2000, 0x0000, 0x0000 },
+	{ 0x0000, 0x0000, 0x2000, 0x0000 }
+};
+
+static const u16 csc_coeff_rgb_out_eitu601[3][4] = {
+	{ 0x2000, 0x6926, 0x74fd, 0x010e },
+	{ 0x2000, 0x2cdd, 0x0000, 0x7e9a },
+	{ 0x2000, 0x0000, 0x38b4, 0x7e3b }
+};
+
+static const u16 csc_coeff_rgb_out_eitu709[3][4] = {
+	{ 0x2000, 0x7106, 0x7a02, 0x00a7 },
+	{ 0x2000, 0x3264, 0x0000, 0x7e6d },
+	{ 0x2000, 0x0000, 0x3b61, 0x7e25 }
+};
+
+static const u16 csc_coeff_rgb_in_eitu601[3][4] = {
+	{ 0x2591, 0x1322, 0x074b, 0x0000 },
+	{ 0x6535, 0x2000, 0x7acc, 0x0200 },
+	{ 0x6acd, 0x7534, 0x2000, 0x0200 }
+};
+
+static const u16 csc_coeff_rgb_in_eitu709[3][4] = {
+	{ 0x2dc5, 0x0d9b, 0x049e, 0x0000 },
+	{ 0x62f0, 0x2000, 0x7d11, 0x0200 },
+	{ 0x6756, 0x78ab, 0x2000, 0x0200 }
+};
+
+struct hdmi_vmode {
+	bool mdataenablepolarity;
+
+	unsigned int mpixelclock;
+	unsigned int mpixelrepetitioninput;
+	unsigned int mpixelrepetitionoutput;
+};
+
+struct hdmi_data_info {
+	unsigned int enc_in_bus_format;
+	unsigned int enc_out_bus_format;
+	unsigned int enc_in_encoding;
+	unsigned int enc_out_encoding;
+	unsigned int pix_repet_factor;
+	struct hdmi_vmode video_mode;
+};
+
+struct dw_hdmi_phy_data {
+	enum dw_hdmi_phy_type type;
+	const char *name;
+	unsigned int gen;
+	bool has_svsret;
+	int (*configure)(struct dw_hdmi *hdmi,
+			 const struct dw_hdmi_plat_data *pdata,
+			 unsigned long mpixelclock);
+};
+
+struct dw_hdmi {
+	enum dw_hdmi_devtype dev_type;
+	unsigned int version;
+	struct hdmi_data_info hdmi_data;
+	struct hdmi_edid_data edid_data;
+	const struct dw_hdmi_plat_data *plat_data;
+
+	int vic;
+	int io_width;
+
+	unsigned long bus_format;
+	bool cable_plugin;
+	bool sink_is_hdmi;
+	bool sink_has_audio;
+	void *regs;
+	void *grf;
+
+	struct {
+		const struct dw_hdmi_phy_ops *ops;
+		const char *name;
+		void *data;
+		bool enabled;
+	} phy;
+
+	struct drm_display_mode previous_mode;
+
+	unsigned int sample_rate;
+	unsigned int audio_cts;
+	unsigned int audio_n;
+	bool audio_enable;
+
+	void (*write)(struct dw_hdmi *hdmi, u8 val, int offset);
+	u8 (*read)(struct dw_hdmi *hdmi, int offset);
+};
+
+static void dw_hdmi_writel(struct dw_hdmi *hdmi, u8 val, int offset)
+{
+	writel(val, hdmi->regs + (offset << 2));
+}
+
+static u8 dw_hdmi_readl(struct dw_hdmi *hdmi, int offset)
+{
+	return readl(hdmi->regs + (offset << 2));
+}
+
+static void dw_hdmi_writeb(struct dw_hdmi *hdmi, u8 val, int offset)
+{
+	writeb(val, hdmi->regs + offset);
+}
+
+static u8 dw_hdmi_readb(struct dw_hdmi *hdmi, int offset)
+{
+	return readb(hdmi->regs + offset);
+}
+
+static inline void hdmi_writeb(struct dw_hdmi *hdmi, u8 val, int offset)
+{
+	hdmi->write(hdmi, val, offset);
+}
+
+static inline u8 hdmi_readb(struct dw_hdmi *hdmi, int offset)
+{
+	return hdmi->read(hdmi, offset);
+}
+
+static void hdmi_modb(struct dw_hdmi *hdmi, u8 data, u8 mask, unsigned reg)
+{
+	u8 val = hdmi_readb(hdmi, reg) & ~mask;
+
+	val |= data & mask;
+	hdmi_writeb(hdmi, val, reg);
+}
+
+static void hdmi_mask_writeb(struct dw_hdmi *hdmi, u8 data, unsigned int reg,
+			     u8 shift, u8 mask)
+{
+	hdmi_modb(hdmi, data << shift, mask, reg);
+}
+
+static bool hdmi_bus_fmt_is_rgb(unsigned int bus_format)
+{
+	switch (bus_format) {
+	case MEDIA_BUS_FMT_RGB888_1X24:
+	case MEDIA_BUS_FMT_RGB101010_1X30:
+	case MEDIA_BUS_FMT_RGB121212_1X36:
+	case MEDIA_BUS_FMT_RGB161616_1X48:
+		return true;
+
+	default:
+		return false;
+	}
+}
+
+static bool hdmi_bus_fmt_is_yuv444(unsigned int bus_format)
+{
+	switch (bus_format) {
+	case MEDIA_BUS_FMT_YUV8_1X24:
+	case MEDIA_BUS_FMT_YUV10_1X30:
+	case MEDIA_BUS_FMT_YUV12_1X36:
+	case MEDIA_BUS_FMT_YUV16_1X48:
+		return true;
+
+	default:
+		return false;
+	}
+}
+
+static bool hdmi_bus_fmt_is_yuv422(unsigned int bus_format)
+{
+	switch (bus_format) {
+	case MEDIA_BUS_FMT_UYVY8_1X16:
+	case MEDIA_BUS_FMT_UYVY10_1X20:
+	case MEDIA_BUS_FMT_UYVY12_1X24:
+		return true;
+
+	default:
+		return false;
+	}
+}
+
+static bool hdmi_bus_fmt_is_yuv420(unsigned int bus_format)
+{
+	switch (bus_format) {
+	case MEDIA_BUS_FMT_UYYVYY8_0_5X24:
+	case MEDIA_BUS_FMT_UYYVYY10_0_5X30:
+	case MEDIA_BUS_FMT_UYYVYY12_0_5X36:
+	case MEDIA_BUS_FMT_UYYVYY16_0_5X48:
+		return true;
+
+	default:
+		return false;
+	}
+}
+
+static int hdmi_bus_fmt_color_depth(unsigned int bus_format)
+{
+	switch (bus_format) {
+	case MEDIA_BUS_FMT_RGB888_1X24:
+	case MEDIA_BUS_FMT_YUV8_1X24:
+	case MEDIA_BUS_FMT_UYVY8_1X16:
+	case MEDIA_BUS_FMT_UYYVYY8_0_5X24:
+		return 8;
+
+	case MEDIA_BUS_FMT_RGB101010_1X30:
+	case MEDIA_BUS_FMT_YUV10_1X30:
+	case MEDIA_BUS_FMT_UYVY10_1X20:
+	case MEDIA_BUS_FMT_UYYVYY10_0_5X30:
+		return 10;
+
+	case MEDIA_BUS_FMT_RGB121212_1X36:
+	case MEDIA_BUS_FMT_YUV12_1X36:
+	case MEDIA_BUS_FMT_UYVY12_1X24:
+	case MEDIA_BUS_FMT_UYYVYY12_0_5X36:
+		return 12;
+
+	case MEDIA_BUS_FMT_RGB161616_1X48:
+	case MEDIA_BUS_FMT_YUV16_1X48:
+	case MEDIA_BUS_FMT_UYYVYY16_0_5X48:
+		return 16;
+
+	default:
+		return 0;
+	}
+}
+
+static int is_color_space_conversion(struct dw_hdmi *hdmi)
+{
+	return hdmi->hdmi_data.enc_in_bus_format !=
+	hdmi->hdmi_data.enc_out_bus_format;
+}
+
+static int is_color_space_decimation(struct dw_hdmi *hdmi)
+{
+	if (!hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format))
+		return 0;
+
+	if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_in_bus_format) ||
+	    hdmi_bus_fmt_is_yuv444(hdmi->hdmi_data.enc_in_bus_format))
+		return 1;
+
+	return 0;
+}
+
+static inline void hdmi_phy_test_clear(struct dw_hdmi *hdmi,
+				       unsigned char bit)
+{
+	hdmi_modb(hdmi, bit << HDMI_PHY_TST0_TSTCLR_OFFSET,
+		  HDMI_PHY_TST0_TSTCLR_MASK, HDMI_PHY_TST0);
+}
+
+static inline void hdmi_phy_test_enable(struct dw_hdmi *hdmi,
+					unsigned char bit)
+{
+	hdmi_modb(hdmi, bit << HDMI_PHY_TST0_TSTEN_OFFSET,
+		  HDMI_PHY_TST0_TSTEN_MASK, HDMI_PHY_TST0);
+}
+
+static inline void hdmi_phy_test_clock(struct dw_hdmi *hdmi,
+				       unsigned char bit)
+{
+	hdmi_modb(hdmi, bit << HDMI_PHY_TST0_TSTCLK_OFFSET,
+		  HDMI_PHY_TST0_TSTCLK_MASK, HDMI_PHY_TST0);
+}
+
+static inline void hdmi_phy_test_din(struct dw_hdmi *hdmi,
+				     unsigned char bit)
+{
+	hdmi_writeb(hdmi, bit, HDMI_PHY_TST1);
+}
+
+static inline void hdmi_phy_test_dout(struct dw_hdmi *hdmi,
+				      unsigned char bit)
+{
+	hdmi_writeb(hdmi, bit, HDMI_PHY_TST2);
+}
+
+static bool hdmi_phy_wait_i2c_done(struct dw_hdmi *hdmi, int msec)
+{
+	u32 val;
+
+	while ((val = hdmi_readb(hdmi, HDMI_IH_I2CMPHY_STAT0) & 0x3) == 0) {
+		if (msec-- == 0)
+			return false;
+		udelay(1000);
+	}
+	hdmi_writeb(hdmi, val, HDMI_IH_I2CMPHY_STAT0);
+
+	return true;
+}
+
+static void dw_hdmi_phy_i2c_write(struct dw_hdmi *hdmi, unsigned short data,
+				  unsigned char addr)
+{
+	hdmi_writeb(hdmi, 0xFF, HDMI_IH_I2CMPHY_STAT0);
+	hdmi_writeb(hdmi, addr, HDMI_PHY_I2CM_ADDRESS_ADDR);
+	hdmi_writeb(hdmi, (unsigned char)(data >> 8),
+		    HDMI_PHY_I2CM_DATAO_1_ADDR);
+	hdmi_writeb(hdmi, (unsigned char)(data >> 0),
+		    HDMI_PHY_I2CM_DATAO_0_ADDR);
+	hdmi_writeb(hdmi, HDMI_PHY_I2CM_OPERATION_ADDR_WRITE,
+		    HDMI_PHY_I2CM_OPERATION_ADDR);
+	hdmi_phy_wait_i2c_done(hdmi, 1000);
+}
+
+static void dw_hdmi_phy_enable_powerdown(struct dw_hdmi *hdmi, bool enable)
+{
+	hdmi_mask_writeb(hdmi, !enable, HDMI_PHY_CONF0,
+			 HDMI_PHY_CONF0_PDZ_OFFSET,
+			 HDMI_PHY_CONF0_PDZ_MASK);
+}
+
+static void dw_hdmi_phy_enable_tmds(struct dw_hdmi *hdmi, u8 enable)
+{
+	hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
+			 HDMI_PHY_CONF0_ENTMDS_OFFSET,
+			 HDMI_PHY_CONF0_ENTMDS_MASK);
+}
+
+static void dw_hdmi_phy_enable_svsret(struct dw_hdmi *hdmi, u8 enable)
+{
+	hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
+			 HDMI_PHY_CONF0_SVSRET_OFFSET,
+			 HDMI_PHY_CONF0_SVSRET_MASK);
+}
+
+static void dw_hdmi_phy_gen2_pddq(struct dw_hdmi *hdmi, u8 enable)
+{
+	hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
+			 HDMI_PHY_CONF0_GEN2_PDDQ_OFFSET,
+			 HDMI_PHY_CONF0_GEN2_PDDQ_MASK);
+}
+
+static void dw_hdmi_phy_gen2_txpwron(struct dw_hdmi *hdmi, u8 enable)
+{
+	hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
+			 HDMI_PHY_CONF0_GEN2_TXPWRON_OFFSET,
+			 HDMI_PHY_CONF0_GEN2_TXPWRON_MASK);
+}
+
+static void dw_hdmi_phy_sel_data_en_pol(struct dw_hdmi *hdmi, u8 enable)
+{
+	hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
+			 HDMI_PHY_CONF0_SELDATAENPOL_OFFSET,
+			 HDMI_PHY_CONF0_SELDATAENPOL_MASK);
+}
+
+static void dw_hdmi_phy_sel_interface_control(struct dw_hdmi *hdmi, u8 enable)
+{
+	hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
+			 HDMI_PHY_CONF0_SELDIPIF_OFFSET,
+			 HDMI_PHY_CONF0_SELDIPIF_MASK);
+}
+
+static void dw_hdmi_phy_power_off(struct dw_hdmi *hdmi)
+{
+	const struct dw_hdmi_phy_data *phy = hdmi->phy.data;
+	unsigned int i;
+	u16 val;
+
+	if (phy->gen == 1) {
+		dw_hdmi_phy_enable_tmds(hdmi, 0);
+		dw_hdmi_phy_enable_powerdown(hdmi, true);
+		return;
+	}
+
+	dw_hdmi_phy_gen2_txpwron(hdmi, 0);
+
+	/*
+	 * Wait for TX_PHY_LOCK to be deasserted to indicate that the PHY went
+	 * to low power mode.
+	 */
+	for (i = 0; i < 5; ++i) {
+		val = hdmi_readb(hdmi, HDMI_PHY_STAT0);
+		if (!(val & HDMI_PHY_TX_PHY_LOCK))
+			break;
+
+		udelay(2000);
+	}
+
+	if (val & HDMI_PHY_TX_PHY_LOCK)
+		printf("PHY failed to power down\n");
+	else
+		printf("PHY powered down in %u iterations\n", i);
+
+	dw_hdmi_phy_gen2_pddq(hdmi, 1);
+}
+
+static int dw_hdmi_phy_power_on(struct dw_hdmi *hdmi)
+{
+	const struct dw_hdmi_phy_data *phy = hdmi->phy.data;
+	unsigned int i;
+	u8 val;
+
+	if (phy->gen == 1) {
+		dw_hdmi_phy_enable_powerdown(hdmi, false);
+
+		/* Toggle TMDS enable. */
+		dw_hdmi_phy_enable_tmds(hdmi, 0);
+		dw_hdmi_phy_enable_tmds(hdmi, 1);
+		return 0;
+	}
+
+	dw_hdmi_phy_gen2_txpwron(hdmi, 1);
+	dw_hdmi_phy_gen2_pddq(hdmi, 0);
+
+	/* Wait for PHY PLL lock */
+	for (i = 0; i < 5; ++i) {
+		val = hdmi_readb(hdmi, HDMI_PHY_STAT0) & HDMI_PHY_TX_PHY_LOCK;
+		if (val)
+			break;
+
+		udelay(2000);
+	}
+
+	if (!val) {
+		printf("PHY PLL failed to lock\n");
+		return -ETIMEDOUT;
+	}
+
+	printf("PHY PLL locked %u iterations\n", i);
+	return 0;
+}
+
+/*
+ * PHY configuration function for the DWC HDMI 3D TX PHY. Based on the available
+ * information the DWC MHL PHY has the same register layout and is thus also
+ * supported by this function.
+ */
+static
+int hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi *hdmi,
+				      const struct dw_hdmi_plat_data *pdata,
+				      unsigned long mpixelclock)
+{
+	const struct dw_hdmi_mpll_config *mpll_config = pdata->mpll_cfg;
+	const struct dw_hdmi_curr_ctrl *curr_ctrl = pdata->cur_ctr;
+	const struct dw_hdmi_phy_config *phy_config = pdata->phy_config;
+
+	/* PLL/MPLL Cfg - always match on final entry */
+	for (; mpll_config->mpixelclock != ~0UL; mpll_config++)
+		if (mpixelclock <= mpll_config->mpixelclock)
+			break;
+
+	for (; curr_ctrl->mpixelclock != ~0UL; curr_ctrl++)
+		if (mpixelclock <= curr_ctrl->mpixelclock)
+			break;
+
+	for (; phy_config->mpixelclock != ~0UL; phy_config++)
+		if (mpixelclock <= phy_config->mpixelclock)
+			break;
+
+	if (mpll_config->mpixelclock == ~0UL ||
+	    curr_ctrl->mpixelclock == ~0UL ||
+	    phy_config->mpixelclock == ~0UL)
+		return -EINVAL;
+
+	/*
+	 * RK3399 mpll clock source is vpll, also is vop clock source.
+	 * vpll rate is twice of mpixelclock in YCBCR420 mode, we need
+	 * to enable mpll pre-divider.
+	 */
+	if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format) &&
+	    (hdmi->dev_type == RK3399_HDMI || hdmi->dev_type == RK3368_HDMI))
+		dw_hdmi_phy_i2c_write(hdmi, mpll_config->res[0].cpce | 4,
+				      HDMI_3D_TX_PHY_CPCE_CTRL);
+	else
+		dw_hdmi_phy_i2c_write(hdmi, mpll_config->res[0].cpce,
+				      HDMI_3D_TX_PHY_CPCE_CTRL);
+	dw_hdmi_phy_i2c_write(hdmi, mpll_config->res[0].gmp,
+			      HDMI_3D_TX_PHY_GMPCTRL);
+	dw_hdmi_phy_i2c_write(hdmi, curr_ctrl->curr[0],
+			      HDMI_3D_TX_PHY_CURRCTRL);
+
+	dw_hdmi_phy_i2c_write(hdmi, 0, HDMI_3D_TX_PHY_PLLPHBYCTRL);
+	dw_hdmi_phy_i2c_write(hdmi, HDMI_3D_TX_PHY_MSM_CTRL_CKO_SEL_FB_CLK,
+			      HDMI_3D_TX_PHY_MSM_CTRL);
+
+	dw_hdmi_phy_i2c_write(hdmi, 0x0004, HDMI_3D_TX_PHY_TXTERM);
+	dw_hdmi_phy_i2c_write(hdmi, 0x8009,
+			      HDMI_3D_TX_PHY_CKSYMTXCTRL);
+	dw_hdmi_phy_i2c_write(hdmi, 0x0272,
+			      HDMI_3D_TX_PHY_VLEVCTRL);
+
+	/* Override and disable clock termination. */
+	dw_hdmi_phy_i2c_write(hdmi, HDMI_3D_TX_PHY_CKCALCTRL_OVERRIDE,
+			      HDMI_3D_TX_PHY_CKCALCTRL);
+	return 0;
+}
+
+static const struct dw_hdmi_phy_data dw_hdmi_phys[] = {
+	{
+		.type = DW_HDMI_PHY_DWC_HDMI_TX_PHY,
+		.name = "DWC HDMI TX PHY",
+		.gen = 1,
+	}, {
+		.type = DW_HDMI_PHY_DWC_MHL_PHY_HEAC,
+		.name = "DWC MHL PHY + HEAC PHY",
+		.gen = 2,
+		.has_svsret = true,
+		.configure = hdmi_phy_configure_dwc_hdmi_3d_tx,
+	}, {
+		.type = DW_HDMI_PHY_DWC_MHL_PHY,
+		.name = "DWC MHL PHY",
+		.gen = 2,
+		.has_svsret = true,
+		.configure = hdmi_phy_configure_dwc_hdmi_3d_tx,
+	}, {
+		.type = DW_HDMI_PHY_DWC_HDMI_3D_TX_PHY_HEAC,
+		.name = "DWC HDMI 3D TX PHY + HEAC PHY",
+		.gen = 2,
+		.configure = hdmi_phy_configure_dwc_hdmi_3d_tx,
+	}, {
+		.type = DW_HDMI_PHY_DWC_HDMI_3D_TX_PHY,
+		.name = "DWC HDMI 3D TX PHY",
+		.gen = 2,
+		.configure = hdmi_phy_configure_dwc_hdmi_3d_tx,
+	}, {
+		.type = DW_HDMI_PHY_DWC_HDMI20_TX_PHY,
+		.name = "DWC HDMI 2.0 TX PHY",
+		.gen = 2,
+		.has_svsret = true,
+		.configure = hdmi_phy_configure_dwc_hdmi_3d_tx,
+	}, {
+		.type = DW_HDMI_PHY_VENDOR_PHY,
+		.name = "Vendor PHY",
+	}
+};
+
+/* ddc i2c master reset */
+static void rockchip_dw_hdmi_i2cm_reset(struct dw_hdmi *hdmi)
+{
+	hdmi_writeb(hdmi, 0x00, HDMI_I2CM_SOFTRSTZ);
+	udelay(100);
+}
+
+static void rockchip_dw_hdmi_i2cm_mask_int(struct dw_hdmi *hdmi, int mask)
+{
+	if (!mask) {
+		hdmi_writeb(hdmi, HDMI_I2CM_INT_DONE_POL, HDMI_I2CM_INT);
+		hdmi_writeb(hdmi, HDMI_I2CM_CTLINT_NAC_POL |
+			    HDMI_I2CM_CTLINT_ARB_POL, HDMI_I2CM_CTLINT);
+		hdmi_writeb(hdmi, 0x00, HDMI_IH_MUTE_I2CM_STAT0);
+	} else {
+		hdmi_writeb(hdmi, 0xff, HDMI_I2CM_INT);
+		hdmi_writeb(hdmi, 0xff, HDMI_I2CM_CTLINT);
+	}
+}
+
+static u16 i2c_count(u16 sfrclock, u16 sclmintime)
+{
+	unsigned long tmp_scl_period = 0;
+
+	if (((sfrclock * sclmintime) % I2C_DIV_FACTOR) != 0)
+		tmp_scl_period = (unsigned long)((sfrclock * sclmintime) +
+				(I2C_DIV_FACTOR - ((sfrclock * sclmintime) %
+				I2C_DIV_FACTOR))) / I2C_DIV_FACTOR;
+	else
+		tmp_scl_period = (unsigned long)(sfrclock * sclmintime) /
+				I2C_DIV_FACTOR;
+
+	return (u16)(tmp_scl_period);
+}
+
+static void rockchip_dw_hdmi_i2cm_clk_init(struct dw_hdmi *hdmi)
+{
+	int value;
+
+	/* Set DDC I2C CLK which divided from DDC_CLK. */
+	value = i2c_count(24000, EDID_I2C_MIN_SS_SCL_HIGH_TIME);
+	hdmi_writeb(hdmi, value & 0xff,
+		    HDMI_I2CM_SS_SCL_HCNT_0_ADDR);
+	hdmi_writeb(hdmi, (value >> 8) & 0xff,
+		    HDMI_I2CM_SS_SCL_HCNT_1_ADDR);
+	value = i2c_count(24000, EDID_I2C_MIN_SS_SCL_LOW_TIME);
+	hdmi_writeb(hdmi, value & 0xff,
+		    HDMI_I2CM_SS_SCL_LCNT_0_ADDR);
+	hdmi_writeb(hdmi, (value >> 8) & 0xff,
+		    HDMI_I2CM_SS_SCL_LCNT_1_ADDR);
+	hdmi_modb(hdmi, HDMI_I2CM_DIV_STD_MODE,
+		  HDMI_I2CM_DIV_FAST_STD_MODE, HDMI_I2CM_DIV);
+}
+
+/*set read/write offset,set read/write mode*/
+static void rockchip_dw_hdmi_i2cm_write_request(struct dw_hdmi *hdmi,
+						u8 offset, u8 data)
+{
+	hdmi_writeb(hdmi, offset, HDMI_I2CM_ADDRESS);
+	hdmi_writeb(hdmi, data, HDMI_I2CM_DATAO);
+	hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_WRITE, HDMI_I2CM_OPERATION_READ);
+}
+
+static void rockchip_dw_hdmi_i2cm_read_request(struct dw_hdmi *hdmi,
+					       u8 offset)
+{
+	hdmi_writeb(hdmi, offset, HDMI_I2CM_ADDRESS);
+	hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_READ, HDMI_I2CM_OPERATION);
+}
+
+static void rockchip_dw_hdmi_i2cm_write_data(struct dw_hdmi *hdmi,
+					     u8 data, u8 offset)
+{
+	u8 interrupt = 0;
+	int trytime = 2;
+	int i = 20;
+
+	while (trytime-- > 0) {
+		rockchip_dw_hdmi_i2cm_write_request(hdmi, offset, data);
+		while (i--) {
+			udelay(1000);
+			interrupt = hdmi_readb(hdmi, HDMI_IH_I2CM_STAT0);
+			if (interrupt)
+				hdmi_writeb(hdmi,
+					    interrupt, HDMI_IH_I2CM_STAT0);
+
+			if (interrupt & (m_SCDC_READREQ |
+					 m_I2CM_DONE | m_I2CM_ERROR))
+				break;
+		}
+
+		if (interrupt & m_I2CM_DONE) {
+			printf("[%s] write offset %02x data %02x success\n",
+			       __func__, offset, data);
+			trytime = 0;
+		} else if ((interrupt & m_I2CM_ERROR) || (i == -1)) {
+			printf("[%s] write data error\n", __func__);
+			rockchip_dw_hdmi_i2cm_reset(hdmi);
+		}
+	}
+}
+
+static int rockchip_dw_hdmi_i2cm_read_data(struct dw_hdmi *hdmi, u8 offset)
+{
+	u8 interrupt = 0, val = 0;
+	int trytime = 2;
+	int i = 20;
+
+	while (trytime-- > 0) {
+		rockchip_dw_hdmi_i2cm_read_request(hdmi, offset);
+		while (i--) {
+			udelay(1000);
+			interrupt = hdmi_readb(hdmi, HDMI_IH_I2CM_STAT0);
+			if (interrupt)
+				hdmi_writeb(hdmi, HDMI_IH_I2CM_STAT0,
+					    interrupt);
+
+			if (interrupt & (m_SCDC_READREQ |
+				m_I2CM_DONE | m_I2CM_ERROR))
+				break;
+		}
+
+		if (interrupt & m_I2CM_DONE) {
+			val = hdmi_readb(hdmi, HDMI_I2CM_DATAI);
+			trytime = 0;
+		} else if ((interrupt & m_I2CM_ERROR) || (i == -1)) {
+			printf("[%s] read data error\n", __func__);
+			rockchip_dw_hdmi_i2cm_reset(hdmi);
+		}
+	}
+	return val;
+}
+
+static int rockchip_dw_hdmi_scdc_get_sink_version(struct dw_hdmi *hdmi)
+{
+	return rockchip_dw_hdmi_i2cm_read_data(hdmi, SCDC_SINK_VERSION);
+}
+
+static void rockchip_dw_hdmi_scdc_set_source_version(struct dw_hdmi *hdmi,
+						     u8 version)
+{
+	rockchip_dw_hdmi_i2cm_write_data(hdmi, version, SCDC_SOURCE_VERSION);
+}
+
+static void rockchip_dw_hdmi_scdc_init(struct dw_hdmi *hdmi)
+{
+	rockchip_dw_hdmi_i2cm_reset(hdmi);
+	rockchip_dw_hdmi_i2cm_mask_int(hdmi, 1);
+	rockchip_dw_hdmi_i2cm_clk_init(hdmi);
+	/* set scdc i2c addr */
+	hdmi_writeb(hdmi, DDC_I2C_SCDC_ADDR, HDMI_I2CM_SLAVE);
+	rockchip_dw_hdmi_i2cm_mask_int(hdmi, 0);/*enable interrupt*/
+}
+
+static int rockchip_dw_hdmi_scrambling_enable(struct dw_hdmi *hdmi,
+					      int enable)
+{
+	int stat;
+
+	rockchip_dw_hdmi_scdc_init(hdmi);
+	stat = rockchip_dw_hdmi_i2cm_read_data(hdmi,
+					       SCDC_TMDS_CONFIG);
+	if (stat < 0) {
+		debug("Failed to read tmds config\n");
+		return false;
+	}
+
+	if (enable == 1) {
+		/* Write on Rx the bit Scrambling_Enable, register 0x20 */
+		stat |= SCDC_SCRAMBLING_ENABLE;
+		rockchip_dw_hdmi_i2cm_write_data(hdmi, stat, SCDC_TMDS_CONFIG);
+		/* TMDS software reset request */
+		hdmi_writeb(hdmi, (u8)~HDMI_MC_SWRSTZ_TMDSSWRST_REQ,
+			    HDMI_MC_SWRSTZ);
+		/* Enable/Disable Scrambling */
+		hdmi_writeb(hdmi, 1, HDMI_FC_SCRAMBLER_CTRL);
+	} else {
+		/* Enable/Disable Scrambling */
+		hdmi_writeb(hdmi, 0, HDMI_FC_SCRAMBLER_CTRL);
+		/* TMDS software reset request */
+		hdmi_writeb(hdmi, (u8)~HDMI_MC_SWRSTZ_TMDSSWRST_REQ,
+			    HDMI_MC_SWRSTZ);
+		/* Write on Rx the bit Scrambling_Enable, register 0x20 */
+		stat &= ~SCDC_SCRAMBLING_ENABLE;
+		rockchip_dw_hdmi_i2cm_write_data(hdmi, stat, SCDC_TMDS_CONFIG);
+	}
+
+	return 0;
+}
+
+static void rockchip_dw_hdmi_scdc_set_tmds_rate(struct dw_hdmi *hdmi)
+{
+	int stat;
+
+	rockchip_dw_hdmi_scdc_init(hdmi);
+	stat = rockchip_dw_hdmi_i2cm_read_data(hdmi,
+					       SCDC_TMDS_CONFIG);
+	if (hdmi->hdmi_data.video_mode.mpixelclock > 340000000)
+		stat |= SCDC_TMDS_BIT_CLOCK_RATIO_BY_40;
+	else
+		stat &= ~SCDC_TMDS_BIT_CLOCK_RATIO_BY_40;
+	rockchip_dw_hdmi_i2cm_write_data(hdmi, stat,
+					 SCDC_TMDS_CONFIG);
+}
+
+static int hdmi_phy_configure(struct dw_hdmi *hdmi)
+{
+	const struct dw_hdmi_phy_data *phy = hdmi->phy.data;
+	const struct dw_hdmi_plat_data *pdata = hdmi->plat_data;
+	unsigned long mpixelclock = hdmi->hdmi_data.video_mode.mpixelclock;
+	int ret, sink_version;
+
+	dw_hdmi_phy_power_off(hdmi);
+
+	/* Control for TMDS Bit Period/TMDS Clock-Period Ratio */
+	if (hdmi->edid_data.display_info.hdmi.scdc.supported)
+		rockchip_dw_hdmi_scdc_set_tmds_rate(hdmi);
+
+	/* Leave low power consumption mode by asserting SVSRET. */
+	if (phy->has_svsret)
+		dw_hdmi_phy_enable_svsret(hdmi, 1);
+
+	/* PHY reset. The reset signal is active high on Gen2 PHYs. */
+	hdmi_writeb(hdmi, HDMI_MC_PHYRSTZ_PHYRSTZ, HDMI_MC_PHYRSTZ);
+	hdmi_writeb(hdmi, 0, HDMI_MC_PHYRSTZ);
+
+	hdmi_writeb(hdmi, HDMI_MC_HEACPHY_RST_ASSERT, HDMI_MC_HEACPHY_RST);
+
+	hdmi_phy_test_clear(hdmi, 1);
+	hdmi_writeb(hdmi, HDMI_PHY_I2CM_SLAVE_ADDR_PHY_GEN2,
+		    HDMI_PHY_I2CM_SLAVE_ADDR);
+	hdmi_phy_test_clear(hdmi, 0);
+
+	/* Write to the PHY as configured by the platform */
+	if (pdata->configure_phy)
+		ret = pdata->configure_phy(hdmi, pdata, mpixelclock);
+	else
+		ret = phy->configure(hdmi, pdata, mpixelclock);
+	if (ret) {
+		printf("PHY configuration failed (clock %lu)\n",
+		       mpixelclock);
+		return ret;
+	}
+
+	/* Wait for resuming transmission of TMDS clock and data */
+	if (mpixelclock > 340000000)
+		mdelay(100);
+
+	return dw_hdmi_phy_power_on(hdmi);
+}
+
+static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data,
+			    struct drm_display_mode *mode)
+{
+	int i, ret;
+
+	/* HDMI Phy spec says to do the phy initialization sequence twice */
+	for (i = 0; i < 2; i++) {
+		dw_hdmi_phy_sel_data_en_pol(hdmi, 1);
+		dw_hdmi_phy_sel_interface_control(hdmi, 0);
+		ret = hdmi_phy_configure(hdmi);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+static void dw_hdmi_phy_disable(struct dw_hdmi *hdmi, void *data)
+{
+	dw_hdmi_phy_power_off(hdmi);
+}
+
+static enum drm_connector_status dw_hdmi_phy_read_hpd(struct dw_hdmi *hdmi,
+						      void *data)
+{
+	return hdmi_readb(hdmi, HDMI_PHY_STAT0) & HDMI_PHY_HPD ?
+		connector_status_connected : connector_status_disconnected;
+}
+
+static const struct dw_hdmi_phy_ops dw_hdmi_synopsys_phy_ops = {
+	.init = dw_hdmi_phy_init,
+	.disable = dw_hdmi_phy_disable,
+	.read_hpd = dw_hdmi_phy_read_hpd,
+};
+
+static int dw_hdmi_detect_phy(struct dw_hdmi *hdmi)
+{
+	unsigned int i;
+	u8 phy_type;
+
+	phy_type = hdmi_readb(hdmi, HDMI_CONFIG2_ID);
+
+	/*
+	 * RK3228 and RK3328 phy_type is DW_HDMI_PHY_DWC_HDMI20_TX_PHY,
+	 * but it has a vedor phy.
+	 */
+	if (phy_type == DW_HDMI_PHY_VENDOR_PHY ||
+	    hdmi->dev_type == RK3328_HDMI ||
+	    hdmi->dev_type == RK3228_HDMI) {
+		/* Vendor PHYs require support from the glue layer. */
+		if (!hdmi->plat_data->phy_ops || !hdmi->plat_data->phy_name) {
+			printf(
+				"Vendor HDMI PHY not supported by glue layer\n");
+			return -ENODEV;
+		}
+
+		hdmi->phy.ops = hdmi->plat_data->phy_ops;
+		hdmi->phy.data = hdmi->plat_data->phy_data;
+		hdmi->phy.name = hdmi->plat_data->phy_name;
+		return 0;
+	}
+
+	/* Synopsys PHYs are handled internally. */
+	for (i = 0; i < ARRAY_SIZE(dw_hdmi_phys); ++i) {
+		if (dw_hdmi_phys[i].type == phy_type) {
+			hdmi->phy.ops = &dw_hdmi_synopsys_phy_ops;
+			hdmi->phy.name = dw_hdmi_phys[i].name;
+			hdmi->phy.data = (void *)&dw_hdmi_phys[i];
+
+			if (!dw_hdmi_phys[i].configure &&
+			    !hdmi->plat_data->configure_phy) {
+				printf("%s requires platform support\n",
+				       hdmi->phy.name);
+				return -ENODEV;
+			}
+
+			return 0;
+		}
+	}
+
+	printf("Unsupported HDMI PHY type (%02x)\n", phy_type);
+	return -ENODEV;
+}
+
+static void hdmi_av_composer(struct dw_hdmi *hdmi,
+			     const struct drm_display_mode *mode)
+{
+	u8 inv_val = 0;
+	struct hdmi_vmode *vmode = &hdmi->hdmi_data.video_mode;
+	struct drm_hdmi_info *hdmi_info = &hdmi->edid_data.display_info.hdmi;
+	int bytes, hblank, vblank, h_de_hs, v_de_vs, hsync_len, vsync_len;
+	unsigned int hdisplay, vdisplay;
+
+	vmode->mpixelclock = mode->clock * 1000;
+	if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format))
+		vmode->mpixelclock /= 2;
+	if ((mode->flags & DRM_MODE_FLAG_3D_MASK) ==
+		DRM_MODE_FLAG_3D_FRAME_PACKING)
+		vmode->mpixelclock *= 2;
+	printf("final pixclk = %d\n", vmode->mpixelclock);
+
+	/* Set up HDMI_FC_INVIDCONF
+	 * fc_invidconf.HDCP_keepout must be set (1'b1)
+	 * when activate the scrambler feature.
+	 */
+	inv_val = (vmode->mpixelclock > 340000000 ||
+		   hdmi_info->scdc.scrambling.low_rates ?
+		   HDMI_FC_INVIDCONF_HDCP_KEEPOUT_ACTIVE :
+		   HDMI_FC_INVIDCONF_HDCP_KEEPOUT_INACTIVE);
+
+	inv_val |= mode->flags & DRM_MODE_FLAG_PVSYNC ?
+		HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_ACTIVE_HIGH :
+		HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_ACTIVE_LOW;
+
+	inv_val |= mode->flags & DRM_MODE_FLAG_PHSYNC ?
+		HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_ACTIVE_HIGH :
+		HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_ACTIVE_LOW;
+
+	inv_val |= (vmode->mdataenablepolarity ?
+		HDMI_FC_INVIDCONF_DE_IN_POLARITY_ACTIVE_HIGH :
+		HDMI_FC_INVIDCONF_DE_IN_POLARITY_ACTIVE_LOW);
+
+	if (hdmi->vic == 39)
+		inv_val |= HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_ACTIVE_HIGH;
+	else
+		inv_val |= mode->flags & DRM_MODE_FLAG_INTERLACE ?
+			HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_ACTIVE_HIGH :
+			HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_ACTIVE_LOW;
+
+	inv_val |= mode->flags & DRM_MODE_FLAG_INTERLACE ?
+		HDMI_FC_INVIDCONF_IN_I_P_INTERLACED :
+		HDMI_FC_INVIDCONF_IN_I_P_PROGRESSIVE;
+
+	inv_val |= hdmi->sink_is_hdmi ?
+		HDMI_FC_INVIDCONF_DVI_MODEZ_HDMI_MODE :
+		HDMI_FC_INVIDCONF_DVI_MODEZ_DVI_MODE;
+
+	hdmi_writeb(hdmi, inv_val, HDMI_FC_INVIDCONF);
+
+	hdisplay = mode->hdisplay;
+	hblank = mode->htotal - mode->hdisplay;
+	h_de_hs = mode->hsync_start - mode->hdisplay;
+	hsync_len = mode->hsync_end - mode->hsync_start;
+
+	/*
+	 * When we're setting a YCbCr420 mode, we need
+	 * to adjust the horizontal timing to suit.
+	 */
+	/*
+	 * When we're setting a YCbCr420 mode, we need
+	 * to adjust the horizontal timing to suit.
+	 */
+	if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format)) {
+		hdisplay /= 2;
+		hblank /= 2;
+		h_de_hs /= 2;
+		hsync_len /= 2;
+	}
+
+	vdisplay = mode->vdisplay;
+	vblank = mode->vtotal - mode->vdisplay;
+	v_de_vs = mode->vsync_start - mode->vdisplay;
+	vsync_len = mode->vsync_end - mode->vsync_start;
+
+	/*
+	 * When we're setting an interlaced mode, we need
+	 * to adjust the vertical timing to suit.
+	 */
+	if (mode->flags & DRM_MODE_FLAG_INTERLACE) {
+		vdisplay /= 2;
+		vblank /= 2;
+		v_de_vs /= 2;
+		vsync_len /= 2;
+	} else if ((mode->flags & DRM_MODE_FLAG_3D_MASK) ==
+		DRM_MODE_FLAG_3D_FRAME_PACKING) {
+		vdisplay += mode->vtotal;
+	}
+
+	/* Scrambling Control */
+	if (hdmi_info->scdc.supported) {
+		if (vmode->mpixelclock > 340000000 ||
+		    hdmi_info->scdc.scrambling.low_rates) {
+			bytes = rockchip_dw_hdmi_scdc_get_sink_version(hdmi);
+			rockchip_dw_hdmi_scdc_set_source_version(hdmi, bytes);
+			rockchip_dw_hdmi_scrambling_enable(hdmi, 1);
+		} else {
+			rockchip_dw_hdmi_scrambling_enable(hdmi, 0);
+		}
+	}
+
+	/* Set up horizontal active pixel width */
+	hdmi_writeb(hdmi, hdisplay >> 8, HDMI_FC_INHACTV1);
+	hdmi_writeb(hdmi, hdisplay, HDMI_FC_INHACTV0);
+
+	/* Set up vertical active lines */
+	hdmi_writeb(hdmi, vdisplay >> 8, HDMI_FC_INVACTV1);
+	hdmi_writeb(hdmi, vdisplay, HDMI_FC_INVACTV0);
+
+	/* Set up horizontal blanking pixel region width */
+	hdmi_writeb(hdmi, hblank >> 8, HDMI_FC_INHBLANK1);
+	hdmi_writeb(hdmi, hblank, HDMI_FC_INHBLANK0);
+
+	/* Set up vertical blanking pixel region width */
+	hdmi_writeb(hdmi, vblank, HDMI_FC_INVBLANK);
+
+	/* Set up HSYNC active edge delay width (in pixel clks) */
+	hdmi_writeb(hdmi, h_de_hs >> 8, HDMI_FC_HSYNCINDELAY1);
+	hdmi_writeb(hdmi, h_de_hs, HDMI_FC_HSYNCINDELAY0);
+
+	/* Set up VSYNC active edge delay (in lines) */
+	hdmi_writeb(hdmi, v_de_vs, HDMI_FC_VSYNCINDELAY);
+
+	/* Set up HSYNC active pulse width (in pixel clks) */
+	hdmi_writeb(hdmi, hsync_len >> 8, HDMI_FC_HSYNCINWIDTH1);
+	hdmi_writeb(hdmi, hsync_len, HDMI_FC_HSYNCINWIDTH0);
+
+	/* Set up VSYNC active edge delay (in lines) */
+	hdmi_writeb(hdmi, vsync_len, HDMI_FC_VSYNCINWIDTH);
+}
+
+static void dw_hdmi_update_csc_coeffs(struct dw_hdmi *hdmi)
+{
+	const u16 (*csc_coeff)[3][4] = &csc_coeff_default;
+	unsigned i;
+	u32 csc_scale = 1;
+
+	if (is_color_space_conversion(hdmi)) {
+		if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format)) {
+			if (hdmi->hdmi_data.enc_out_encoding ==
+						V4L2_YCBCR_ENC_601)
+				csc_coeff = &csc_coeff_rgb_out_eitu601;
+			else
+				csc_coeff = &csc_coeff_rgb_out_eitu709;
+		} else if (hdmi_bus_fmt_is_rgb(
+					hdmi->hdmi_data.enc_in_bus_format)) {
+			if (hdmi->hdmi_data.enc_out_encoding ==
+						V4L2_YCBCR_ENC_601)
+				csc_coeff = &csc_coeff_rgb_in_eitu601;
+			else
+				csc_coeff = &csc_coeff_rgb_in_eitu709;
+			csc_scale = 0;
+		}
+	}
+
+	/* The CSC registers are sequential, alternating MSB then LSB */
+	for (i = 0; i < ARRAY_SIZE(csc_coeff_default[0]); i++) {
+		u16 coeff_a = (*csc_coeff)[0][i];
+		u16 coeff_b = (*csc_coeff)[1][i];
+		u16 coeff_c = (*csc_coeff)[2][i];
+
+		hdmi_writeb(hdmi, coeff_a & 0xff, HDMI_CSC_COEF_A1_LSB + i * 2);
+		hdmi_writeb(hdmi, coeff_a >> 8, HDMI_CSC_COEF_A1_MSB + i * 2);
+		hdmi_writeb(hdmi, coeff_b & 0xff, HDMI_CSC_COEF_B1_LSB + i * 2);
+		hdmi_writeb(hdmi, coeff_b >> 8, HDMI_CSC_COEF_B1_MSB + i * 2);
+		hdmi_writeb(hdmi, coeff_c & 0xff, HDMI_CSC_COEF_C1_LSB + i * 2);
+		hdmi_writeb(hdmi, coeff_c >> 8, HDMI_CSC_COEF_C1_MSB + i * 2);
+	}
+
+	hdmi_modb(hdmi, csc_scale, HDMI_CSC_SCALE_CSCSCALE_MASK,
+		  HDMI_CSC_SCALE);
+}
+
+static int is_color_space_interpolation(struct dw_hdmi *hdmi)
+{
+	if (!hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_in_bus_format))
+		return 0;
+
+	if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format) ||
+	    hdmi_bus_fmt_is_yuv444(hdmi->hdmi_data.enc_out_bus_format))
+		return 1;
+
+	return 0;
+}
+
+static void hdmi_video_csc(struct dw_hdmi *hdmi)
+{
+	int color_depth = 0;
+	int interpolation = HDMI_CSC_CFG_INTMODE_DISABLE;
+	int decimation = 0;
+
+	/* YCC422 interpolation to 444 mode */
+	if (is_color_space_interpolation(hdmi))
+		interpolation = HDMI_CSC_CFG_INTMODE_CHROMA_INT_FORMULA1;
+	else if (is_color_space_decimation(hdmi))
+		decimation = HDMI_CSC_CFG_DECMODE_CHROMA_INT_FORMULA3;
+
+	switch (hdmi_bus_fmt_color_depth(hdmi->hdmi_data.enc_out_bus_format)) {
+	case 8:
+		color_depth = HDMI_CSC_SCALE_CSC_COLORDE_PTH_24BPP;
+		break;
+	case 10:
+		color_depth = HDMI_CSC_SCALE_CSC_COLORDE_PTH_30BPP;
+		break;
+	case 12:
+		color_depth = HDMI_CSC_SCALE_CSC_COLORDE_PTH_36BPP;
+		break;
+	case 16:
+		color_depth = HDMI_CSC_SCALE_CSC_COLORDE_PTH_48BPP;
+		break;
+
+	default:
+		return;
+	}
+
+	/* Configure the CSC registers */
+	hdmi_writeb(hdmi, interpolation | decimation, HDMI_CSC_CFG);
+	hdmi_modb(hdmi, color_depth, HDMI_CSC_SCALE_CSC_COLORDE_PTH_MASK,
+		  HDMI_CSC_SCALE);
+
+	dw_hdmi_update_csc_coeffs(hdmi);
+}
+
+static void dw_hdmi_enable_video_path(struct dw_hdmi *hdmi)
+{
+	u8 clkdis;
+
+	/* control period minimum duration */
+	hdmi_writeb(hdmi, 12, HDMI_FC_CTRLDUR);
+	hdmi_writeb(hdmi, 32, HDMI_FC_EXCTRLDUR);
+	hdmi_writeb(hdmi, 1, HDMI_FC_EXCTRLSPAC);
+
+	/* Set to fill TMDS data channels */
+	hdmi_writeb(hdmi, 0x0B, HDMI_FC_CH0PREAM);
+	hdmi_writeb(hdmi, 0x16, HDMI_FC_CH1PREAM);
+	hdmi_writeb(hdmi, 0x21, HDMI_FC_CH2PREAM);
+
+	/* Enable pixel clock and tmds data path */
+	clkdis = 0x7F;
+	clkdis &= ~HDMI_MC_CLKDIS_PIXELCLK_DISABLE;
+	hdmi_writeb(hdmi, clkdis, HDMI_MC_CLKDIS);
+
+	clkdis &= ~HDMI_MC_CLKDIS_TMDSCLK_DISABLE;
+	hdmi_writeb(hdmi, clkdis, HDMI_MC_CLKDIS);
+
+	/* Enable csc path */
+	if (is_color_space_conversion(hdmi)) {
+		clkdis &= ~HDMI_MC_CLKDIS_CSCCLK_DISABLE;
+		hdmi_writeb(hdmi, clkdis, HDMI_MC_CLKDIS);
+	}
+
+	/* Enable pixel repetition path */
+	if (hdmi->hdmi_data.video_mode.mpixelrepetitioninput) {
+		clkdis &= ~HDMI_MC_CLKDIS_PREPCLK_DISABLE;
+		hdmi_writeb(hdmi, clkdis, HDMI_MC_CLKDIS);
+	}
+
+	/* Enable color space conversion if needed */
+	if (is_color_space_conversion(hdmi))
+		hdmi_writeb(hdmi, HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_IN_PATH,
+			    HDMI_MC_FLOWCTRL);
+	else
+		hdmi_writeb(hdmi, HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_BYPASS,
+			    HDMI_MC_FLOWCTRL);
+}
+
+static void dw_hdmi_clear_overflow(struct dw_hdmi *hdmi)
+{
+	unsigned int count;
+	unsigned int i;
+	u8 val;
+
+	/*
+	 * Under some circumstances the Frame Composer arithmetic unit can miss
+	 * an FC register write due to being busy processing the previous one.
+	 * The issue can be worked around by issuing a TMDS software reset and
+	 * then write one of the FC registers several times.
+	 *
+	 * The number of iterations matters and depends on the HDMI TX revision
+	 * (and possibly on the platform). So far only i.MX6Q (v1.30a) and
+	 * i.MX6DL (v1.31a) have been identified as needing the workaround, with
+	 * 4 and 1 iterations respectively.
+	 */
+
+	switch (hdmi->version) {
+	case 0x130a:
+		count = 4;
+		break;
+	case 0x131a:
+		count = 1;
+		break;
+	default:
+		return;
+	}
+
+	/* TMDS software reset */
+	hdmi_writeb(hdmi, (u8)~HDMI_MC_SWRSTZ_TMDSSWRST_REQ, HDMI_MC_SWRSTZ);
+
+	val = hdmi_readb(hdmi, HDMI_FC_INVIDCONF);
+	for (i = 0; i < count; i++)
+		hdmi_writeb(hdmi, val, HDMI_FC_INVIDCONF);
+}
+
+static void hdmi_disable_overflow_interrupts(struct dw_hdmi *hdmi)
+{
+	hdmi_writeb(hdmi, HDMI_IH_MUTE_FC_STAT2_OVERFLOW_MASK,
+		    HDMI_IH_MUTE_FC_STAT2);
+}
+
+static void hdmi_video_packetize(struct dw_hdmi *hdmi)
+{
+	unsigned int color_depth = 0;
+	unsigned int remap_size = HDMI_VP_REMAP_YCC422_16bit;
+	unsigned int output_select = HDMI_VP_CONF_OUTPUT_SELECTOR_PP;
+	struct hdmi_data_info *hdmi_data = &hdmi->hdmi_data;
+	u8 val, vp_conf;
+
+	if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format) ||
+	    hdmi_bus_fmt_is_yuv444(hdmi->hdmi_data.enc_out_bus_format) ||
+	    hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format)) {
+		switch (hdmi_bus_fmt_color_depth(
+					hdmi->hdmi_data.enc_out_bus_format)) {
+		case 8:
+			color_depth = 0;
+			output_select = HDMI_VP_CONF_OUTPUT_SELECTOR_BYPASS;
+			break;
+		case 10:
+			color_depth = 5;
+			break;
+		case 12:
+			color_depth = 6;
+			break;
+		case 16:
+			color_depth = 7;
+			break;
+		default:
+			output_select = HDMI_VP_CONF_OUTPUT_SELECTOR_BYPASS;
+		}
+	} else if (hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format)) {
+		switch (hdmi_bus_fmt_color_depth(
+					hdmi->hdmi_data.enc_out_bus_format)) {
+		case 0:
+		case 8:
+			remap_size = HDMI_VP_REMAP_YCC422_16bit;
+			break;
+		case 10:
+			remap_size = HDMI_VP_REMAP_YCC422_20bit;
+			break;
+		case 12:
+			remap_size = HDMI_VP_REMAP_YCC422_24bit;
+			break;
+
+		default:
+			return;
+		}
+		output_select = HDMI_VP_CONF_OUTPUT_SELECTOR_YCC422;
+	} else {
+		return;
+	}
+
+	/* set the packetizer registers */
+	val = ((color_depth << HDMI_VP_PR_CD_COLOR_DEPTH_OFFSET) &
+		HDMI_VP_PR_CD_COLOR_DEPTH_MASK) |
+		((hdmi_data->pix_repet_factor <<
+		HDMI_VP_PR_CD_DESIRED_PR_FACTOR_OFFSET) &
+		HDMI_VP_PR_CD_DESIRED_PR_FACTOR_MASK);
+	hdmi_writeb(hdmi, val, HDMI_VP_PR_CD);
+
+	hdmi_modb(hdmi, HDMI_VP_STUFF_PR_STUFFING_STUFFING_MODE,
+		  HDMI_VP_STUFF_PR_STUFFING_MASK, HDMI_VP_STUFF);
+
+	/* Data from pixel repeater block */
+	if (hdmi_data->pix_repet_factor > 0) {
+		vp_conf = HDMI_VP_CONF_PR_EN_ENABLE |
+			  HDMI_VP_CONF_BYPASS_SELECT_PIX_REPEATER;
+	} else { /* data from packetizer block */
+		vp_conf = HDMI_VP_CONF_PR_EN_DISABLE |
+			  HDMI_VP_CONF_BYPASS_SELECT_VID_PACKETIZER;
+	}
+
+	hdmi_modb(hdmi, vp_conf,
+		  HDMI_VP_CONF_PR_EN_MASK |
+		  HDMI_VP_CONF_BYPASS_SELECT_MASK, HDMI_VP_CONF);
+
+	hdmi_modb(hdmi, 1 << HDMI_VP_STUFF_IDEFAULT_PHASE_OFFSET,
+		  HDMI_VP_STUFF_IDEFAULT_PHASE_MASK, HDMI_VP_STUFF);
+
+	hdmi_writeb(hdmi, remap_size, HDMI_VP_REMAP);
+
+	if (output_select == HDMI_VP_CONF_OUTPUT_SELECTOR_PP) {
+		vp_conf = HDMI_VP_CONF_BYPASS_EN_DISABLE |
+			  HDMI_VP_CONF_PP_EN_ENABLE |
+			  HDMI_VP_CONF_YCC422_EN_DISABLE;
+	} else if (output_select == HDMI_VP_CONF_OUTPUT_SELECTOR_YCC422) {
+		vp_conf = HDMI_VP_CONF_BYPASS_EN_DISABLE |
+			  HDMI_VP_CONF_PP_EN_DISABLE |
+			  HDMI_VP_CONF_YCC422_EN_ENABLE;
+	} else if (output_select == HDMI_VP_CONF_OUTPUT_SELECTOR_BYPASS) {
+		vp_conf = HDMI_VP_CONF_BYPASS_EN_ENABLE |
+			  HDMI_VP_CONF_PP_EN_DISABLE |
+			  HDMI_VP_CONF_YCC422_EN_DISABLE;
+	} else {
+		return;
+	}
+
+	hdmi_modb(hdmi, vp_conf,
+		  HDMI_VP_CONF_BYPASS_EN_MASK | HDMI_VP_CONF_PP_EN_ENMASK |
+		  HDMI_VP_CONF_YCC422_EN_MASK, HDMI_VP_CONF);
+
+	hdmi_modb(hdmi, HDMI_VP_STUFF_PP_STUFFING_STUFFING_MODE |
+			HDMI_VP_STUFF_YCC422_STUFFING_STUFFING_MODE,
+		  HDMI_VP_STUFF_PP_STUFFING_MASK |
+		  HDMI_VP_STUFF_YCC422_STUFFING_MASK, HDMI_VP_STUFF);
+
+	hdmi_modb(hdmi, output_select, HDMI_VP_CONF_OUTPUT_SELECTOR_MASK,
+		  HDMI_VP_CONF);
+}
+
+static void hdmi_video_sample(struct dw_hdmi *hdmi)
+{
+	int color_format = 0;
+	u8 val;
+
+	switch (hdmi->hdmi_data.enc_in_bus_format) {
+	case MEDIA_BUS_FMT_RGB888_1X24:
+		color_format = 0x01;
+		break;
+	case MEDIA_BUS_FMT_RGB101010_1X30:
+		color_format = 0x03;
+		break;
+	case MEDIA_BUS_FMT_RGB121212_1X36:
+		color_format = 0x05;
+		break;
+	case MEDIA_BUS_FMT_RGB161616_1X48:
+		color_format = 0x07;
+		break;
+
+	case MEDIA_BUS_FMT_YUV8_1X24:
+	case MEDIA_BUS_FMT_UYYVYY8_0_5X24:
+		color_format = 0x09;
+		break;
+	case MEDIA_BUS_FMT_YUV10_1X30:
+	case MEDIA_BUS_FMT_UYYVYY10_0_5X30:
+		color_format = 0x0B;
+		break;
+	case MEDIA_BUS_FMT_YUV12_1X36:
+	case MEDIA_BUS_FMT_UYYVYY12_0_5X36:
+		color_format = 0x0D;
+		break;
+	case MEDIA_BUS_FMT_YUV16_1X48:
+	case MEDIA_BUS_FMT_UYYVYY16_0_5X48:
+		color_format = 0x0F;
+		break;
+
+	case MEDIA_BUS_FMT_UYVY8_1X16:
+		color_format = 0x16;
+		break;
+	case MEDIA_BUS_FMT_UYVY10_1X20:
+		color_format = 0x14;
+		break;
+	case MEDIA_BUS_FMT_UYVY12_1X24:
+		color_format = 0x12;
+		break;
+
+	default:
+		return;
+	}
+
+	val = HDMI_TX_INVID0_INTERNAL_DE_GENERATOR_DISABLE |
+		((color_format << HDMI_TX_INVID0_VIDEO_MAPPING_OFFSET) &
+		HDMI_TX_INVID0_VIDEO_MAPPING_MASK);
+	hdmi_writeb(hdmi, val, HDMI_TX_INVID0);
+
+	/* Enable TX stuffing: When DE is inactive, fix the output data to 0 */
+	val = HDMI_TX_INSTUFFING_BDBDATA_STUFFING_ENABLE |
+		HDMI_TX_INSTUFFING_RCRDATA_STUFFING_ENABLE |
+		HDMI_TX_INSTUFFING_GYDATA_STUFFING_ENABLE;
+	hdmi_writeb(hdmi, val, HDMI_TX_INSTUFFING);
+	hdmi_writeb(hdmi, 0x0, HDMI_TX_GYDATA0);
+	hdmi_writeb(hdmi, 0x0, HDMI_TX_GYDATA1);
+	hdmi_writeb(hdmi, 0x0, HDMI_TX_RCRDATA0);
+	hdmi_writeb(hdmi, 0x0, HDMI_TX_RCRDATA1);
+	hdmi_writeb(hdmi, 0x0, HDMI_TX_BCBDATA0);
+	hdmi_writeb(hdmi, 0x0, HDMI_TX_BCBDATA1);
+}
+
+static void hdmi_enable_overflow_interrupts(struct dw_hdmi *hdmi)
+{
+	hdmi_writeb(hdmi, 0, HDMI_FC_MASK2);
+	hdmi_writeb(hdmi, 0, HDMI_IH_MUTE_FC_STAT2);
+}
+
+static void dw_hdmi_disable(struct dw_hdmi *hdmi)
+{
+	if (hdmi->phy.enabled) {
+		hdmi->phy.ops->disable(hdmi, hdmi->phy.data);
+		hdmi->phy.enabled = false;
+	}
+}
+
+static void hdmi_config_AVI(struct dw_hdmi *hdmi, struct drm_display_mode *mode)
+{
+	struct hdmi_avi_infoframe frame;
+	u8 val;
+	bool is_hdmi2 = false;
+
+	if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format) ||
+	    hdmi->edid_data.display_info.hdmi.scdc.supported)
+		is_hdmi2 = true;
+	/* Initialise info frame from DRM mode */
+	drm_hdmi_avi_infoframe_from_display_mode(&frame, mode, is_hdmi2);
+
+	if (hdmi_bus_fmt_is_yuv444(hdmi->hdmi_data.enc_out_bus_format))
+		frame.colorspace = HDMI_COLORSPACE_YUV444;
+	else if (hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format))
+		frame.colorspace = HDMI_COLORSPACE_YUV422;
+	else if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format))
+		frame.colorspace = HDMI_COLORSPACE_YUV420;
+	else
+		frame.colorspace = HDMI_COLORSPACE_RGB;
+
+	/* Set up colorimetry */
+	switch (hdmi->hdmi_data.enc_out_encoding) {
+	case V4L2_YCBCR_ENC_601:
+		if (hdmi->hdmi_data.enc_in_encoding == V4L2_YCBCR_ENC_XV601)
+			frame.colorimetry = HDMI_COLORIMETRY_EXTENDED;
+		else
+			frame.colorimetry = HDMI_COLORIMETRY_ITU_601;
+		frame.extended_colorimetry =
+				HDMI_EXTENDED_COLORIMETRY_XV_YCC_601;
+		break;
+	case V4L2_YCBCR_ENC_709:
+		if (hdmi->hdmi_data.enc_in_encoding == V4L2_YCBCR_ENC_XV709)
+			frame.colorimetry = HDMI_COLORIMETRY_EXTENDED;
+		else
+			frame.colorimetry = HDMI_COLORIMETRY_ITU_709;
+		frame.extended_colorimetry =
+				HDMI_EXTENDED_COLORIMETRY_XV_YCC_709;
+		break;
+	default: /* Carries no data */
+		frame.colorimetry = HDMI_COLORIMETRY_ITU_601;
+		frame.extended_colorimetry =
+				HDMI_EXTENDED_COLORIMETRY_XV_YCC_601;
+		break;
+	}
+
+	frame.scan_mode = HDMI_SCAN_MODE_NONE;
+
+	/*
+	 * The Designware IP uses a different byte format from standard
+	 * AVI info frames, though generally the bits are in the correct
+	 * bytes.
+	 */
+
+	/*
+	 * AVI data byte 1 differences: Colorspace in bits 0,1,7 rather than
+	 * 5,6,7, active aspect present in bit 6 rather than 4.
+	 */
+	val = (frame.scan_mode & 3) << 4 | (frame.colorspace & 0x3);
+	if (frame.active_aspect & 15)
+		val |= HDMI_FC_AVICONF0_ACTIVE_FMT_INFO_PRESENT;
+	if (frame.top_bar || frame.bottom_bar)
+		val |= HDMI_FC_AVICONF0_BAR_DATA_HORIZ_BAR;
+	if (frame.left_bar || frame.right_bar)
+		val |= HDMI_FC_AVICONF0_BAR_DATA_VERT_BAR;
+	hdmi_writeb(hdmi, val, HDMI_FC_AVICONF0);
+
+	/* AVI data byte 2 differences: none */
+	val = ((frame.colorimetry & 0x3) << 6) |
+	      ((frame.picture_aspect & 0x3) << 4) |
+	      (frame.active_aspect & 0xf);
+	hdmi_writeb(hdmi, val, HDMI_FC_AVICONF1);
+
+	/* AVI data byte 3 differences: none */
+	val = ((frame.extended_colorimetry & 0x7) << 4) |
+	      ((frame.quantization_range & 0x3) << 2) |
+	      (frame.nups & 0x3);
+	if (frame.itc)
+		val |= HDMI_FC_AVICONF2_IT_CONTENT_VALID;
+	hdmi_writeb(hdmi, val, HDMI_FC_AVICONF2);
+
+	/* AVI data byte 4 differences: none */
+	val = frame.video_code & 0x7f;
+	hdmi_writeb(hdmi, val, HDMI_FC_AVIVID);
+
+	/* AVI Data Byte 5- set up input and output pixel repetition */
+	val = (((hdmi->hdmi_data.video_mode.mpixelrepetitioninput + 1) <<
+		HDMI_FC_PRCONF_INCOMING_PR_FACTOR_OFFSET) &
+		HDMI_FC_PRCONF_INCOMING_PR_FACTOR_MASK) |
+		((hdmi->hdmi_data.video_mode.mpixelrepetitionoutput <<
+		HDMI_FC_PRCONF_OUTPUT_PR_FACTOR_OFFSET) &
+		HDMI_FC_PRCONF_OUTPUT_PR_FACTOR_MASK);
+	hdmi_writeb(hdmi, val, HDMI_FC_PRCONF);
+
+	/*
+	 * AVI data byte 5 differences: content type in 0,1 rather than 4,5,
+	 * ycc range in bits 2,3 rather than 6,7
+	 */
+	val = ((frame.ycc_quantization_range & 0x3) << 2) |
+	      (frame.content_type & 0x3);
+	hdmi_writeb(hdmi, val, HDMI_FC_AVICONF3);
+
+	/* AVI Data Bytes 6-13 */
+	hdmi_writeb(hdmi, frame.top_bar & 0xff, HDMI_FC_AVIETB0);
+	hdmi_writeb(hdmi, (frame.top_bar >> 8) & 0xff, HDMI_FC_AVIETB1);
+	hdmi_writeb(hdmi, frame.bottom_bar & 0xff, HDMI_FC_AVISBB0);
+	hdmi_writeb(hdmi, (frame.bottom_bar >> 8) & 0xff, HDMI_FC_AVISBB1);
+	hdmi_writeb(hdmi, frame.left_bar & 0xff, HDMI_FC_AVIELB0);
+	hdmi_writeb(hdmi, (frame.left_bar >> 8) & 0xff, HDMI_FC_AVIELB1);
+	hdmi_writeb(hdmi, frame.right_bar & 0xff, HDMI_FC_AVISRB0);
+	hdmi_writeb(hdmi, (frame.right_bar >> 8) & 0xff, HDMI_FC_AVISRB1);
+}
+
+static void hdmi_config_vendor_specific_infoframe(struct dw_hdmi *hdmi,
+						  struct drm_display_mode *mode)
+{
+	struct hdmi_vendor_infoframe frame;
+	u8 buffer[10];
+	ssize_t err;
+
+	/* Disable HDMI vendor specific infoframe send */
+	hdmi_mask_writeb(hdmi, 0, HDMI_FC_DATAUTO0, HDMI_FC_DATAUTO0_VSD_OFFSET,
+			 HDMI_FC_DATAUTO0_VSD_MASK);
+
+	err = drm_hdmi_vendor_infoframe_from_display_mode(&frame, mode);
+	if (err < 0)
+		/*
+		 * Going into that statement does not means vendor infoframe
+		 * fails. It just informed us that vendor infoframe is not
+		 * needed for the selected mode. Only 4k or stereoscopic 3D
+		 * mode requires vendor infoframe. So just simply return.
+		 */
+		return;
+
+	err = hdmi_vendor_infoframe_pack(&frame, buffer, sizeof(buffer));
+	if (err < 0) {
+		printf("Failed to pack vendor infoframe: %zd\n", err);
+		return;
+	}
+
+	/* Set the length of HDMI vendor specific InfoFrame payload */
+	hdmi_writeb(hdmi, buffer[2], HDMI_FC_VSDSIZE);
+
+	/* Set 24bit IEEE Registration Identifier */
+	hdmi_writeb(hdmi, buffer[4], HDMI_FC_VSDIEEEID0);
+	hdmi_writeb(hdmi, buffer[5], HDMI_FC_VSDIEEEID1);
+	hdmi_writeb(hdmi, buffer[6], HDMI_FC_VSDIEEEID2);
+
+	/* Set HDMI_Video_Format and HDMI_VIC/3D_Structure */
+	hdmi_writeb(hdmi, buffer[7], HDMI_FC_VSDPAYLOAD0);
+	hdmi_writeb(hdmi, buffer[8], HDMI_FC_VSDPAYLOAD1);
+
+	if (frame.s3d_struct >= HDMI_3D_STRUCTURE_SIDE_BY_SIDE_HALF)
+		hdmi_writeb(hdmi, buffer[9], HDMI_FC_VSDPAYLOAD2);
+
+	/* Packet frame interpolation */
+	hdmi_writeb(hdmi, 1, HDMI_FC_DATAUTO1);
+
+	/* Auto packets per frame and line spacing */
+	hdmi_writeb(hdmi, 0x11, HDMI_FC_DATAUTO2);
+
+	/* Configures the Frame Composer On RDRB mode */
+	hdmi_mask_writeb(hdmi, 1, HDMI_FC_DATAUTO0, HDMI_FC_DATAUTO0_VSD_OFFSET,
+			 HDMI_FC_DATAUTO0_VSD_MASK);
+}
+
+static void hdmi_set_cts_n(struct dw_hdmi *hdmi, unsigned int cts,
+			   unsigned int n)
+{
+	/* Must be set/cleared first */
+	hdmi_modb(hdmi, 0, HDMI_AUD_CTS3_CTS_MANUAL, HDMI_AUD_CTS3);
+
+	/* nshift factor = 0 */
+	hdmi_modb(hdmi, 0, HDMI_AUD_CTS3_N_SHIFT_MASK, HDMI_AUD_CTS3);
+
+	hdmi_writeb(hdmi, ((cts >> 16) & HDMI_AUD_CTS3_AUDCTS19_16_MASK) |
+		    HDMI_AUD_CTS3_CTS_MANUAL, HDMI_AUD_CTS3);
+	hdmi_writeb(hdmi, (cts >> 8) & 0xff, HDMI_AUD_CTS2);
+	hdmi_writeb(hdmi, cts & 0xff, HDMI_AUD_CTS1);
+
+	hdmi_writeb(hdmi, (n >> 16) & 0x0f, HDMI_AUD_N3);
+	hdmi_writeb(hdmi, (n >> 8) & 0xff, HDMI_AUD_N2);
+	hdmi_writeb(hdmi, n & 0xff, HDMI_AUD_N1);
+}
+
+static int hdmi_match_tmds_n_table(struct dw_hdmi *hdmi,
+				   unsigned long pixel_clk,
+				   unsigned long freq)
+{
+	const struct dw_hdmi_plat_data *plat_data = hdmi->plat_data;
+	const struct dw_hdmi_audio_tmds_n *tmds_n = NULL;
+	int i;
+
+	if (plat_data->tmds_n_table) {
+		for (i = 0; plat_data->tmds_n_table[i].tmds != 0; i++) {
+			if (pixel_clk == plat_data->tmds_n_table[i].tmds) {
+				tmds_n = &plat_data->tmds_n_table[i];
+				break;
+			}
+		}
+	}
+
+	if (!tmds_n) {
+		for (i = 0; common_tmds_n_table[i].tmds != 0; i++) {
+			if (pixel_clk == common_tmds_n_table[i].tmds) {
+				tmds_n = &common_tmds_n_table[i];
+				break;
+			}
+		}
+	}
+
+	if (!tmds_n)
+		return -ENOENT;
+
+	switch (freq) {
+	case 32000:
+		return tmds_n->n_32k;
+	case 44100:
+	case 88200:
+	case 176400:
+		return (freq / 44100) * tmds_n->n_44k1;
+	case 48000:
+	case 96000:
+	case 192000:
+		return (freq / 48000) * tmds_n->n_48k;
+	default:
+		return -ENOENT;
+	}
+}
+
+static u64 hdmi_audio_math_diff(unsigned int freq, unsigned int n,
+				unsigned int pixel_clk)
+{
+	u64 final, diff;
+	u64 cts;
+
+	final = (u64)pixel_clk * n;
+
+	cts = final;
+	do_div(cts, 128 * freq);
+
+	diff = final - (u64)cts * (128 * freq);
+
+	return diff;
+}
+
+static unsigned int hdmi_compute_n(struct dw_hdmi *hdmi,
+				   unsigned long pixel_clk,
+				   unsigned long freq)
+{
+	unsigned int min_n = DIV_ROUND_UP((128 * freq), 1500);
+	unsigned int max_n = (128 * freq) / 300;
+	unsigned int ideal_n = (128 * freq) / 1000;
+	unsigned int best_n_distance = ideal_n;
+	unsigned int best_n = 0;
+	u64 best_diff = U64_MAX;
+	int n;
+
+	/* If the ideal N could satisfy the audio math, then just take it */
+	if (hdmi_audio_math_diff(freq, ideal_n, pixel_clk) == 0)
+		return ideal_n;
+
+	for (n = min_n; n <= max_n; n++) {
+		u64 diff = hdmi_audio_math_diff(freq, n, pixel_clk);
+
+		if (diff < best_diff || (diff == best_diff &&
+					 abs(n - ideal_n) < best_n_distance)) {
+			best_n = n;
+			best_diff = diff;
+			best_n_distance = abs(best_n - ideal_n);
+		}
+
+		/*
+		 * The best N already satisfy the audio math, and also be
+		 * the closest value to ideal N, so just cut the loop.
+		 */
+		if ((best_diff == 0) && (abs(n - ideal_n) > best_n_distance))
+			break;
+	}
+
+	return best_n;
+}
+
+static unsigned int hdmi_find_n(struct dw_hdmi *hdmi, unsigned long pixel_clk,
+				unsigned long sample_rate)
+{
+	int n;
+
+	n = hdmi_match_tmds_n_table(hdmi, pixel_clk, sample_rate);
+	if (n > 0)
+		return n;
+
+	printf("Rate %lu missing; compute N dynamically\n",
+	       pixel_clk);
+
+	return hdmi_compute_n(hdmi, pixel_clk, sample_rate);
+}
+
+static
+void hdmi_set_clk_regenerator(struct dw_hdmi *hdmi, unsigned long pixel_clk,
+			      unsigned int sample_rate)
+{
+	unsigned long ftdms = pixel_clk;
+	unsigned int n, cts;
+	u64 tmp;
+
+	n = hdmi_find_n(hdmi, pixel_clk, sample_rate);
+
+	/*
+	 * Compute the CTS value from the N value.  Note that CTS and N
+	 * can be up to 20 bits in total, so we need 64-bit math.  Also
+	 * note that our TDMS clock is not fully accurate; it is accurate
+	 * to kHz.  This can introduce an unnecessary remainder in the
+	 * calculation below, so we don't try to warn about that.
+	 */
+	tmp = (u64)ftdms * n;
+	do_div(tmp, 128 * sample_rate);
+	cts = tmp;
+
+	printf("%s: fs=%uHz ftdms=%lu.%03luMHz N=%d cts=%d\n", __func__,
+	       sample_rate, ftdms / 1000000, (ftdms / 1000) % 1000, n, cts);
+
+	hdmi->audio_n = n;
+	hdmi->audio_cts = cts;
+	hdmi_set_cts_n(hdmi, cts, hdmi->audio_enable ? n : 0);
+}
+
+static void hdmi_clk_regenerator_update_pixel_clock(struct dw_hdmi *hdmi)
+{
+	hdmi_set_clk_regenerator(hdmi, hdmi->hdmi_data.video_mode.mpixelclock,
+				 hdmi->sample_rate);
+}
+
+static void hdmi_enable_audio_clk(struct dw_hdmi *hdmi)
+{
+	hdmi_modb(hdmi, 0, HDMI_MC_CLKDIS_AUDCLK_DISABLE, HDMI_MC_CLKDIS);
+}
+
+void dw_hdmi_set_sample_rate(struct dw_hdmi *hdmi, unsigned int rate)
+{
+	hdmi->sample_rate = rate;
+	hdmi_set_clk_regenerator(hdmi, hdmi->hdmi_data.video_mode.mpixelclock,
+				 hdmi->sample_rate);
+}
+
+static int dw_hdmi_setup(struct dw_hdmi *hdmi,
+			 struct drm_display_mode *mode)
+{
+	int ret;
+	void *data = hdmi->plat_data->phy_data;
+
+	hdmi_disable_overflow_interrupts(hdmi);
+
+	if (!hdmi->vic)
+		printf("Non-CEA mode used in HDMI\n");
+	else
+		printf("CEA mode used vic=%d\n", hdmi->vic);
+
+	if (hdmi->plat_data->get_enc_out_encoding)
+		hdmi->hdmi_data.enc_out_encoding =
+			hdmi->plat_data->get_enc_out_encoding(data);
+	else if ((hdmi->vic == 6) || (hdmi->vic == 7) ||
+		 (hdmi->vic == 21) || (hdmi->vic == 22) ||
+		 (hdmi->vic == 2) || (hdmi->vic == 3) ||
+		 (hdmi->vic == 17) || (hdmi->vic == 18))
+		hdmi->hdmi_data.enc_out_encoding = V4L2_YCBCR_ENC_601;
+	else
+		hdmi->hdmi_data.enc_out_encoding = V4L2_YCBCR_ENC_709;
+
+	if (mode->flags & DRM_MODE_FLAG_DBLCLK) {
+		hdmi->hdmi_data.video_mode.mpixelrepetitionoutput = 1;
+		hdmi->hdmi_data.video_mode.mpixelrepetitioninput = 1;
+	} else {
+		hdmi->hdmi_data.video_mode.mpixelrepetitionoutput = 0;
+		hdmi->hdmi_data.video_mode.mpixelrepetitioninput = 0;
+	}
+
+	/* TOFIX: Get input format from plat data or fallback to RGB888 */
+	if (hdmi->plat_data->get_input_bus_format)
+		hdmi->hdmi_data.enc_in_bus_format =
+			hdmi->plat_data->get_input_bus_format(data);
+	else if (hdmi->plat_data->input_bus_format)
+		hdmi->hdmi_data.enc_in_bus_format =
+			hdmi->plat_data->input_bus_format;
+	else
+		hdmi->hdmi_data.enc_in_bus_format =
+			MEDIA_BUS_FMT_RGB888_1X24;
+
+	/* TOFIX: Default to RGB888 output format */
+	if (hdmi->plat_data->get_output_bus_format)
+		hdmi->hdmi_data.enc_out_bus_format =
+			hdmi->plat_data->get_output_bus_format(data);
+	else
+		hdmi->hdmi_data.enc_out_bus_format =
+			MEDIA_BUS_FMT_RGB888_1X24;
+
+	/* TOFIX: Get input encoding from plat data or fallback to none */
+	if (hdmi->plat_data->get_enc_in_encoding)
+		hdmi->hdmi_data.enc_in_encoding =
+			hdmi->plat_data->get_enc_in_encoding(data);
+	else if (hdmi->plat_data->input_bus_encoding)
+		hdmi->hdmi_data.enc_in_encoding =
+			hdmi->plat_data->input_bus_encoding;
+	else
+		hdmi->hdmi_data.enc_in_encoding = V4L2_YCBCR_ENC_DEFAULT;
+	/*
+	 * According to the dw-hdmi specification 6.4.2
+	 * vp_pr_cd[3:0]:
+	 * 0000b: No pixel repetition (pixel sent only once)
+	 * 0001b: Pixel sent two times (pixel repeated once)
+	 */
+	hdmi->hdmi_data.pix_repet_factor =
+		(mode->flags & DRM_MODE_FLAG_DBLCLK) ? 1 : 0;
+	hdmi->hdmi_data.video_mode.mdataenablepolarity = true;
+
+	/* HDMI Initialization Step B.1 */
+	hdmi_av_composer(hdmi, mode);
+
+	/* HDMI Initialization Step B.2 */
+	ret = hdmi->phy.ops->init(hdmi, hdmi->phy.data, &hdmi->previous_mode);
+	if (ret)
+		return ret;
+	hdmi->phy.enabled = true;
+
+	/* HDMI Initializateion Step B.3 */
+	dw_hdmi_enable_video_path(hdmi);
+
+	/* HDMI Initialization Step E - Configure audio */
+	if (hdmi->sink_has_audio) {
+		printf("sink has audio support\n");
+		hdmi_clk_regenerator_update_pixel_clock(hdmi);
+		hdmi_enable_audio_clk(hdmi);
+	}
+
+	/* not for DVI mode */
+	if (hdmi->sink_is_hdmi) {
+		printf("%s HDMI mode\n", __func__);
+
+		/* HDMI Initialization Step F - Configure AVI InfoFrame */
+		hdmi_config_AVI(hdmi, mode);
+		hdmi_config_vendor_specific_infoframe(hdmi, mode);
+	} else {
+		printf("%s DVI mode\n", __func__);
+	}
+
+	hdmi_video_packetize(hdmi);
+	hdmi_video_csc(hdmi);
+	hdmi_video_sample(hdmi);
+	dw_hdmi_clear_overflow(hdmi);
+	if (hdmi->cable_plugin && hdmi->sink_is_hdmi)
+		hdmi_enable_overflow_interrupts(hdmi);
+
+	return 0;
+}
+
+int dw_hdmi_detect_hotplug(struct dw_hdmi *hdmi)
+{
+	return hdmi->phy.ops->read_hpd(hdmi, hdmi->phy.data);
+}
+
+static int dw_hdmi_set_reg_wr(struct dw_hdmi *hdmi)
+{
+	switch (hdmi->io_width) {
+	case 4:
+		hdmi->write = dw_hdmi_writel;
+		hdmi->read = dw_hdmi_readl;
+		break;
+	case 1:
+		hdmi->write = dw_hdmi_writeb;
+		hdmi->read = dw_hdmi_readb;
+		break;
+	default:
+		printf("reg-io-width must be 1 or 4\n");
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static void initialize_hdmi_mutes(struct dw_hdmi *hdmi)
+{
+	/*mute unnecessary interrupt, only enable hpd */
+	hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_FC_STAT0);
+	hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_FC_STAT1);
+	hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_FC_STAT2);
+	hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_AS_STAT0);
+	hdmi_writeb(hdmi, 0xfe, HDMI_IH_MUTE_PHY_STAT0);
+	hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_I2CM_STAT0);
+	hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_CEC_STAT0);
+	hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_VP_STAT0);
+	hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_I2CMPHY_STAT0);
+	hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_AHBDMAAUD_STAT0);
+	hdmi_writeb(hdmi, 0xf1, HDMI_PHY_MASK0);
+
+	/*Force output black*/
+	dw_hdmi_writel(hdmi, 0x00, HDMI_FC_DBGTMDS2);
+	dw_hdmi_writel(hdmi, 0x00, HDMI_FC_DBGTMDS1);
+	dw_hdmi_writel(hdmi, 0x00, HDMI_FC_DBGTMDS0);
+}
+
+static void dw_hdmi_dev_init(struct dw_hdmi *hdmi)
+{
+	hdmi->version = (hdmi_readb(hdmi, HDMI_DESIGN_ID) << 8)
+		      | (hdmi_readb(hdmi, HDMI_REVISION_ID) << 0);
+
+	dw_hdmi_phy_power_off(hdmi);
+	initialize_hdmi_mutes(hdmi);
+}
+
+static int dw_hdmi_read_edid(struct dw_hdmi *hdmi,
+			     int block, unsigned char *buff)
+{
+	int i = 0, n = 0, index = 0, ret = -1, trytime = 2;
+	int offset = (block % 2) * 0x80;
+	int interrupt = 0;
+
+	rockchip_dw_hdmi_i2cm_reset(hdmi);
+
+	/* Set DDC I2C CLK which divided from DDC_CLK to 100KHz. */
+	rockchip_dw_hdmi_i2cm_clk_init(hdmi);
+
+	/* Enable I2C interrupt for reading edid */
+	rockchip_dw_hdmi_i2cm_mask_int(hdmi, 0);
+
+	hdmi_writeb(hdmi, DDC_I2C_EDID_ADDR, HDMI_I2CM_SLAVE);
+	hdmi_writeb(hdmi, DDC_I2C_SEG_ADDR, HDMI_I2CM_SEGADDR);
+	hdmi_writeb(hdmi, block / 2, HDMI_I2CM_SEGPTR);
+
+	while (trytime--) {
+		for (n = 0; n < HDMI_EDID_BLOCK_SIZE / 8; n++) {
+			hdmi_writeb(hdmi, offset + 8 * n, HDMI_I2CM_ADDRESS);
+			/*enable extend sequential read operation*/
+			if (block == 0)
+				hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_READ8,
+					    HDMI_I2CM_OPERATION);
+			else
+				hdmi_writeb(hdmi,
+					    HDMI_I2CM_OPERATION_READ8_EXT,
+					    HDMI_I2CM_OPERATION);
+
+			i = 20;
+			while (i--) {
+				mdelay(1);
+				interrupt = hdmi_readb(hdmi,
+						       HDMI_IH_I2CM_STAT0);
+				if (interrupt) {
+					hdmi_writeb(hdmi,
+						    interrupt,
+						    HDMI_IH_I2CM_STAT0);
+				}
+
+				if (interrupt &
+				    (m_SCDC_READREQ |
+				     m_I2CM_DONE |
+				     m_I2CM_ERROR))
+					break;
+				mdelay(4);
+			}
+
+			if (interrupt & m_I2CM_DONE) {
+				for (index = 0; index < 8; index++)
+					buff[8 * n + index] =
+					hdmi_readb(hdmi, HDMI_I2CM_READ_BUFF0
+						   + index);
+
+				if (n == HDMI_EDID_BLOCK_SIZE / 8 - 1) {
+					ret = 0;
+					printf("[%s] edid read success\n",
+					       __func__);
+					goto exit;
+				}
+				continue;
+			} else if ((interrupt & m_I2CM_ERROR) || (i == -1)) {
+				printf("[%s] edid read error\n", __func__);
+				rockchip_dw_hdmi_i2cm_reset(hdmi);
+				break;
+			}
+		}
+
+		printf("[%s] edid try times %d\n", __func__, trytime);
+		mdelay(100);
+	}
+
+exit:
+	/* Disable I2C interrupt */
+	rockchip_dw_hdmi_i2cm_mask_int(hdmi, 1);
+	return ret;
+}
+
+static int drm_do_get_edid(struct dw_hdmi *hdmi, u8 *edid)
+{
+	int i, j, block_num, ret;
+
+	/* base block fetch */
+	for (i = 0; i < 3; i++) {
+		ret = dw_hdmi_read_edid(hdmi, 0, edid);
+		if (!ret)
+			break;
+	}
+
+	if (ret) {
+		printf("get base block failed\n");
+		goto err;
+	}
+
+	/* get the number of extensions */
+	block_num = edid[0x7e];
+
+	for (j = 1; j <= block_num; j++) {
+		for (i = 0; i < 3; i++) {
+			ret = dw_hdmi_read_edid(hdmi, j, &edid[0x80 * j]);
+			if (!ret)
+				break;
+		}
+	}
+
+	if (ret) {
+		printf("get extensions failed\n");
+		goto err;
+	}
+
+	return 0;
+
+err:
+	memset(edid, 0, HDMI_EDID_BLOCK_SIZE);
+	return -EFAULT;
+}
+
+void dw_hdmi_audio_enable(struct dw_hdmi *hdmi)
+{
+	hdmi->audio_enable = true;
+	hdmi_set_cts_n(hdmi, hdmi->audio_cts, hdmi->audio_n);
+}
+
+void dw_hdmi_audio_disable(struct dw_hdmi *hdmi)
+{
+	hdmi->audio_enable = false;
+	hdmi_set_cts_n(hdmi, hdmi->audio_cts, 0);
+}
+
+int rockchip_dw_hdmi_init(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	const struct rockchip_connector *connector = conn_state->connector;
+	const struct dw_hdmi_plat_data *pdata = connector->data;
+	struct crtc_state *crtc_state = &state->crtc_state;
+	struct dw_hdmi *hdmi;
+	struct drm_display_mode *mode_buf;
+	int hdmi_node = conn_state->node;
+	u32 val;
+
+	hdmi = malloc(sizeof(struct dw_hdmi));
+	if (!hdmi)
+		return -ENOMEM;
+
+	memset(hdmi, 0, sizeof(struct dw_hdmi));
+
+	mode_buf = malloc(MODE_LEN * sizeof(struct drm_display_mode));
+	if (!mode_buf)
+		return -ENOMEM;
+	memset(mode_buf, 0, MODE_LEN * sizeof(struct drm_display_mode));
+
+	hdmi->regs = (void *)fdtdec_get_addr_size_auto_noparent(state->blob,
+					hdmi_node, "reg", 0, NULL, false);
+	hdmi->io_width = fdtdec_get_int(state->blob, hdmi_node,
+					"reg-io-width", -1);
+	hdmi->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	if (hdmi->grf <= 0) {
+		printf("%s: Get syscon grf failed (ret=%p)\n",
+		       __func__, hdmi->grf);
+		return -ENXIO;
+	}
+
+	dw_hdmi_set_reg_wr(hdmi);
+
+	if (crtc_state->crtc_id)
+		val = ((1 << pdata->vop_sel_bit) |
+		       (1 << (16 + pdata->vop_sel_bit)));
+	else
+		val = ((0 << pdata->vop_sel_bit) |
+		       (1 << (16 + pdata->vop_sel_bit)));
+	writel(val, hdmi->grf + pdata->grf_vop_sel_reg);
+
+	conn_state->type = DRM_MODE_CONNECTOR_HDMIA;
+	conn_state->output_mode = ROCKCHIP_OUT_MODE_AAAA;
+
+	hdmi->dev_type = pdata->dev_type;
+	hdmi->plat_data = pdata;
+	hdmi->edid_data.mode_buf = mode_buf;
+	hdmi->sample_rate = 48000;
+
+	conn_state->private = hdmi;
+	dw_hdmi_detect_phy(hdmi);
+	dw_hdmi_dev_init(hdmi);
+
+	return 0;
+}
+
+void rockchip_dw_hdmi_deinit(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct dw_hdmi *hdmi = conn_state->private;
+
+	if (hdmi->edid_data.mode_buf)
+		free(hdmi->edid_data.mode_buf);
+	if (hdmi)
+		free(hdmi);
+}
+
+int rockchip_dw_hdmi_prepare(struct display_state *state)
+{
+	return 0;
+}
+
+int rockchip_dw_hdmi_enable(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct drm_display_mode *mode = &conn_state->mode;
+	struct dw_hdmi *hdmi = conn_state->private;
+
+	if (!hdmi)
+		return -EFAULT;
+
+	dw_hdmi_setup(hdmi, mode);
+
+	return 0;
+}
+
+int rockchip_dw_hdmi_disable(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct dw_hdmi *hdmi = conn_state->private;
+
+	dw_hdmi_disable(hdmi);
+	return 0;
+}
+
+int rockchip_dw_hdmi_get_timing(struct display_state *state)
+{
+	int ret;
+	struct connector_state *conn_state = &state->conn_state;
+	struct drm_display_mode *mode = &conn_state->mode;
+	struct dw_hdmi *hdmi = conn_state->private;
+
+	if (!hdmi)
+		return -EFAULT;
+	ret = drm_do_get_edid(hdmi, conn_state->edid);
+	if (!ret) {
+		ret = drm_add_edid_modes(&hdmi->edid_data, conn_state->edid);
+
+		if (ret > 0) {
+			hdmi->sink_is_hdmi =
+				drm_detect_hdmi_monitor(conn_state->edid);
+			hdmi->sink_has_audio = false;
+			*mode = *hdmi->edid_data.preferred_mode;
+			hdmi->vic = drm_match_cea_mode(mode);
+
+			return 0;
+		}
+	}
+
+	/* if can't get edid timing, use default resolution. */
+	printf("can't get edid timing\n");
+	hdmi->vic = HDMI_VIDEO_DEFAULT_MODE;
+	hdmi->sink_is_hdmi = true;
+	hdmi->sink_has_audio = false;
+	mode->hdisplay = 1280;
+	mode->hsync_start = 1390;
+	mode->hsync_end = 1430;
+	mode->htotal = 1650;
+	mode->vdisplay = 720;
+	mode->vsync_start = 725;
+	mode->vsync_end = 730;
+	mode->vtotal = 750;
+	mode->clock = 74250;
+	mode->flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC;
+
+	return 0;
+}
+
+int rockchip_dw_hdmi_detect(struct display_state *state)
+{
+	int ret;
+	struct connector_state *conn_state = &state->conn_state;
+	struct dw_hdmi *hdmi = conn_state->private;
+
+	if (!hdmi)
+		return -EFAULT;
+
+	ret = dw_hdmi_detect_hotplug(hdmi);
+
+	return ret;
+}
+
+int rockchip_dw_hdmi_get_edid(struct display_state *state)
+{
+	int ret;
+	struct connector_state *conn_state = &state->conn_state;
+	struct dw_hdmi *hdmi = conn_state->private;
+
+	ret = drm_do_get_edid(hdmi, conn_state->edid);
+
+	return ret;
+}
+
diff --git a/drivers/video/drm/dw_hdmi.h b/drivers/video/drm/dw_hdmi.h
new file mode 100644
index 0000000000..5f9c48befa
--- /dev/null
+++ b/drivers/video/drm/dw_hdmi.h
@@ -0,0 +1,1342 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _ROCKCHIP_HDMI_H_
+#define _ROCKCHIP_HDMI_H_
+
+#define HDMI_DESIGN_ID                          0x0000
+#define HDMI_REVISION_ID                        0x0001
+#define HDMI_PRODUCT_ID0                        0x0002
+#define HDMI_PRODUCT_ID1                        0x0003
+#define HDMI_CONFIG0_ID                         0x0004
+#define HDMI_CONFIG1_ID                         0x0005
+#define HDMI_CONFIG2_ID                         0x0006
+#define HDMI_CONFIG3_ID                         0x0007
+
+/* Interrupt Registers */
+#define HDMI_IH_FC_STAT0                        0x0100
+#define HDMI_IH_FC_STAT1                        0x0101
+#define HDMI_IH_FC_STAT2                        0x0102
+#define HDMI_IH_AS_STAT0                        0x0103
+#define HDMI_IH_PHY_STAT0                       0x0104
+#define HDMI_IH_I2CM_STAT0                      0x0105
+#define m_SCDC_READREQ                          BIT(2)
+#define m_I2CM_DONE                             BIT(1)
+#define m_I2CM_ERROR                            BIT(0)
+#define HDMI_IH_CEC_STAT0                       0x0106
+#define HDMI_IH_VP_STAT0                        0x0107
+#define HDMI_IH_I2CMPHY_STAT0                   0x0108
+#define HDMI_IH_AHBDMAAUD_STAT0                 0x0109
+
+#define HDMI_IH_MUTE_FC_STAT0                   0x0180
+#define HDMI_IH_MUTE_FC_STAT1                   0x0181
+#define HDMI_IH_MUTE_FC_STAT2                   0x0182
+#define HDMI_IH_MUTE_AS_STAT0                   0x0183
+#define HDMI_IH_MUTE_PHY_STAT0                  0x0184
+#define HDMI_IH_MUTE_I2CM_STAT0                 0x0185
+#define HDMI_IH_MUTE_CEC_STAT0                  0x0186
+#define HDMI_IH_MUTE_VP_STAT0                   0x0187
+#define HDMI_IH_MUTE_I2CMPHY_STAT0              0x0188
+#define HDMI_IH_MUTE_AHBDMAAUD_STAT0            0x0189
+#define HDMI_IH_MUTE                            0x01FF
+
+/* Video Sample Registers */
+#define HDMI_TX_INVID0                          0x0200
+#define HDMI_TX_INSTUFFING                      0x0201
+#define HDMI_TX_GYDATA0                         0x0202
+#define HDMI_TX_GYDATA1                         0x0203
+#define HDMI_TX_RCRDATA0                        0x0204
+#define HDMI_TX_RCRDATA1                        0x0205
+#define HDMI_TX_BCBDATA0                        0x0206
+#define HDMI_TX_BCBDATA1                        0x0207
+
+/* Video Packetizer Registers */
+#define HDMI_VP_STATUS                          0x0800
+#define HDMI_VP_PR_CD                           0x0801
+#define HDMI_VP_STUFF                           0x0802
+#define HDMI_VP_REMAP                           0x0803
+#define HDMI_VP_CONF                            0x0804
+#define HDMI_VP_STAT                            0x0805
+#define HDMI_VP_INT                             0x0806
+#define HDMI_VP_MASK                            0x0807
+#define HDMI_VP_POL                             0x0808
+
+/* Frame Composer Registers */
+#define HDMI_FC_INVIDCONF                       0x1000
+#define HDMI_FC_INHACTV0                        0x1001
+#define HDMI_FC_INHACTV1                        0x1002
+#define HDMI_FC_INHBLANK0                       0x1003
+#define HDMI_FC_INHBLANK1                       0x1004
+#define HDMI_FC_INVACTV0                        0x1005
+#define HDMI_FC_INVACTV1                        0x1006
+#define HDMI_FC_INVBLANK                        0x1007
+#define HDMI_FC_HSYNCINDELAY0                   0x1008
+#define HDMI_FC_HSYNCINDELAY1                   0x1009
+#define HDMI_FC_HSYNCINWIDTH0                   0x100A
+#define HDMI_FC_HSYNCINWIDTH1                   0x100B
+#define HDMI_FC_VSYNCINDELAY                    0x100C
+#define HDMI_FC_VSYNCINWIDTH                    0x100D
+#define HDMI_FC_INFREQ0                         0x100E
+#define HDMI_FC_INFREQ1                         0x100F
+#define HDMI_FC_INFREQ2                         0x1010
+#define HDMI_FC_CTRLDUR                         0x1011
+#define HDMI_FC_EXCTRLDUR                       0x1012
+#define HDMI_FC_EXCTRLSPAC                      0x1013
+#define HDMI_FC_CH0PREAM                        0x1014
+#define HDMI_FC_CH1PREAM                        0x1015
+#define HDMI_FC_CH2PREAM                        0x1016
+#define HDMI_FC_AVICONF3                        0x1017
+#define HDMI_FC_GCP                             0x1018
+#define HDMI_FC_AVICONF0                        0x1019
+#define HDMI_FC_AVICONF1                        0x101A
+#define HDMI_FC_AVICONF2                        0x101B
+#define HDMI_FC_AVIVID                          0x101C
+#define HDMI_FC_AVIETB0                         0x101D
+#define HDMI_FC_AVIETB1                         0x101E
+#define HDMI_FC_AVISBB0                         0x101F
+#define HDMI_FC_AVISBB1                         0x1020
+#define HDMI_FC_AVIELB0                         0x1021
+#define HDMI_FC_AVIELB1                         0x1022
+#define HDMI_FC_AVISRB0                         0x1023
+#define HDMI_FC_AVISRB1                         0x1024
+#define HDMI_FC_AUDICONF0                       0x1025
+#define HDMI_FC_AUDICONF1                       0x1026
+#define HDMI_FC_AUDICONF2                       0x1027
+#define HDMI_FC_AUDICONF3                       0x1028
+#define HDMI_FC_VSDIEEEID0                      0x1029
+#define HDMI_FC_VSDSIZE                         0x102A
+#define HDMI_FC_VSDIEEEID1                      0x1030
+#define HDMI_FC_VSDIEEEID2                      0x1031
+#define HDMI_FC_VSDPAYLOAD0                     0x1032
+#define HDMI_FC_VSDPAYLOAD1                     0x1033
+#define HDMI_FC_VSDPAYLOAD2                     0x1034
+#define HDMI_FC_VSDPAYLOAD3                     0x1035
+#define HDMI_FC_VSDPAYLOAD4                     0x1036
+#define HDMI_FC_VSDPAYLOAD5                     0x1037
+#define HDMI_FC_VSDPAYLOAD6                     0x1038
+#define HDMI_FC_VSDPAYLOAD7                     0x1039
+#define HDMI_FC_VSDPAYLOAD8                     0x103A
+#define HDMI_FC_VSDPAYLOAD9                     0x103B
+#define HDMI_FC_VSDPAYLOAD10                    0x103C
+#define HDMI_FC_VSDPAYLOAD11                    0x103D
+#define HDMI_FC_VSDPAYLOAD12                    0x103E
+#define HDMI_FC_VSDPAYLOAD13                    0x103F
+#define HDMI_FC_VSDPAYLOAD14                    0x1040
+#define HDMI_FC_VSDPAYLOAD15                    0x1041
+#define HDMI_FC_VSDPAYLOAD16                    0x1042
+#define HDMI_FC_VSDPAYLOAD17                    0x1043
+#define HDMI_FC_VSDPAYLOAD18                    0x1044
+#define HDMI_FC_VSDPAYLOAD19                    0x1045
+#define HDMI_FC_VSDPAYLOAD20                    0x1046
+#define HDMI_FC_VSDPAYLOAD21                    0x1047
+#define HDMI_FC_VSDPAYLOAD22                    0x1048
+#define HDMI_FC_VSDPAYLOAD23                    0x1049
+#define HDMI_FC_SPDVENDORNAME0                  0x104A
+#define HDMI_FC_SPDVENDORNAME1                  0x104B
+#define HDMI_FC_SPDVENDORNAME2                  0x104C
+#define HDMI_FC_SPDVENDORNAME3                  0x104D
+#define HDMI_FC_SPDVENDORNAME4                  0x104E
+#define HDMI_FC_SPDVENDORNAME5                  0x104F
+#define HDMI_FC_SPDVENDORNAME6                  0x1050
+#define HDMI_FC_SPDVENDORNAME7                  0x1051
+#define HDMI_FC_SDPPRODUCTNAME0                 0x1052
+#define HDMI_FC_SDPPRODUCTNAME1                 0x1053
+#define HDMI_FC_SDPPRODUCTNAME2                 0x1054
+#define HDMI_FC_SDPPRODUCTNAME3                 0x1055
+#define HDMI_FC_SDPPRODUCTNAME4                 0x1056
+#define HDMI_FC_SDPPRODUCTNAME5                 0x1057
+#define HDMI_FC_SDPPRODUCTNAME6                 0x1058
+#define HDMI_FC_SDPPRODUCTNAME7                 0x1059
+#define HDMI_FC_SDPPRODUCTNAME8                 0x105A
+#define HDMI_FC_SDPPRODUCTNAME9                 0x105B
+#define HDMI_FC_SDPPRODUCTNAME10                0x105C
+#define HDMI_FC_SDPPRODUCTNAME11                0x105D
+#define HDMI_FC_SDPPRODUCTNAME12                0x105E
+#define HDMI_FC_SDPPRODUCTNAME13                0x105F
+#define HDMI_FC_SDPPRODUCTNAME14                0x1060
+#define HDMI_FC_SPDPRODUCTNAME15                0x1061
+#define HDMI_FC_SPDDEVICEINF                    0x1062
+#define HDMI_FC_AUDSCONF                        0x1063
+#define HDMI_FC_AUDSSTAT                        0x1064
+#define HDMI_FC_AUDSCHNLS0                      0x1067
+#define HDMI_FC_AUDSCHNLS1                      0x1068
+#define HDMI_FC_AUDSCHNLS2                      0x1069
+#define HDMI_FC_AUDSCHNLS3                      0x106a
+#define HDMI_FC_AUDSCHNLS4                      0x106b
+#define HDMI_FC_AUDSCHNLS5                      0x106c
+#define HDMI_FC_AUDSCHNLS6                      0x106d
+#define HDMI_FC_AUDSCHNLS7                      0x106e
+#define HDMI_FC_AUDSCHNLS8                      0x106f
+#define HDMI_FC_DATACH0FILL                     0x1070
+#define HDMI_FC_DATACH1FILL                     0x1071
+#define HDMI_FC_DATACH2FILL                     0x1072
+#define HDMI_FC_CTRLQHIGH                       0x1073
+#define HDMI_FC_CTRLQLOW                        0x1074
+#define HDMI_FC_ACP0                            0x1075
+#define HDMI_FC_ACP28                           0x1076
+#define HDMI_FC_ACP27                           0x1077
+#define HDMI_FC_ACP26                           0x1078
+#define HDMI_FC_ACP25                           0x1079
+#define HDMI_FC_ACP24                           0x107A
+#define HDMI_FC_ACP23                           0x107B
+#define HDMI_FC_ACP22                           0x107C
+#define HDMI_FC_ACP21                           0x107D
+#define HDMI_FC_ACP20                           0x107E
+#define HDMI_FC_ACP19                           0x107F
+#define HDMI_FC_ACP18                           0x1080
+#define HDMI_FC_ACP17                           0x1081
+#define HDMI_FC_ACP16                           0x1082
+#define HDMI_FC_ACP15                           0x1083
+#define HDMI_FC_ACP14                           0x1084
+#define HDMI_FC_ACP13                           0x1085
+#define HDMI_FC_ACP12                           0x1086
+#define HDMI_FC_ACP11                           0x1087
+#define HDMI_FC_ACP10                           0x1088
+#define HDMI_FC_ACP9                            0x1089
+#define HDMI_FC_ACP8                            0x108A
+#define HDMI_FC_ACP7                            0x108B
+#define HDMI_FC_ACP6                            0x108C
+#define HDMI_FC_ACP5                            0x108D
+#define HDMI_FC_ACP4                            0x108E
+#define HDMI_FC_ACP3                            0x108F
+#define HDMI_FC_ACP2                            0x1090
+#define HDMI_FC_ACP1                            0x1091
+#define HDMI_FC_ISCR1_0                         0x1092
+#define HDMI_FC_ISCR1_16                        0x1093
+#define HDMI_FC_ISCR1_15                        0x1094
+#define HDMI_FC_ISCR1_14                        0x1095
+#define HDMI_FC_ISCR1_13                        0x1096
+#define HDMI_FC_ISCR1_12                        0x1097
+#define HDMI_FC_ISCR1_11                        0x1098
+#define HDMI_FC_ISCR1_10                        0x1099
+#define HDMI_FC_ISCR1_9                         0x109A
+#define HDMI_FC_ISCR1_8                         0x109B
+#define HDMI_FC_ISCR1_7                         0x109C
+#define HDMI_FC_ISCR1_6                         0x109D
+#define HDMI_FC_ISCR1_5                         0x109E
+#define HDMI_FC_ISCR1_4                         0x109F
+#define HDMI_FC_ISCR1_3                         0x10A0
+#define HDMI_FC_ISCR1_2                         0x10A1
+#define HDMI_FC_ISCR1_1                         0x10A2
+#define HDMI_FC_ISCR2_15                        0x10A3
+#define HDMI_FC_ISCR2_14                        0x10A4
+#define HDMI_FC_ISCR2_13                        0x10A5
+#define HDMI_FC_ISCR2_12                        0x10A6
+#define HDMI_FC_ISCR2_11                        0x10A7
+#define HDMI_FC_ISCR2_10                        0x10A8
+#define HDMI_FC_ISCR2_9                         0x10A9
+#define HDMI_FC_ISCR2_8                         0x10AA
+#define HDMI_FC_ISCR2_7                         0x10AB
+#define HDMI_FC_ISCR2_6                         0x10AC
+#define HDMI_FC_ISCR2_5                         0x10AD
+#define HDMI_FC_ISCR2_4                         0x10AE
+#define HDMI_FC_ISCR2_3                         0x10AF
+#define HDMI_FC_ISCR2_2                         0x10B0
+#define HDMI_FC_ISCR2_1                         0x10B1
+#define HDMI_FC_ISCR2_0                         0x10B2
+#define HDMI_FC_DATAUTO0                        0x10B3
+#define HDMI_FC_DATAUTO1                        0x10B4
+#define HDMI_FC_DATAUTO2                        0x10B5
+#define HDMI_FC_DATMAN                          0x10B6
+#define HDMI_FC_DATAUTO3                        0x10B7
+#define HDMI_FC_RDRB0                           0x10B8
+#define HDMI_FC_RDRB1                           0x10B9
+#define HDMI_FC_RDRB2                           0x10BA
+#define HDMI_FC_RDRB3                           0x10BB
+#define HDMI_FC_RDRB4                           0x10BC
+#define HDMI_FC_RDRB5                           0x10BD
+#define HDMI_FC_RDRB6                           0x10BE
+#define HDMI_FC_RDRB7                           0x10BF
+#define HDMI_FC_STAT0                           0x10D0
+#define HDMI_FC_INT0                            0x10D1
+#define HDMI_FC_MASK0                           0x10D2
+#define HDMI_FC_POL0                            0x10D3
+#define HDMI_FC_STAT1                           0x10D4
+#define HDMI_FC_INT1                            0x10D5
+#define HDMI_FC_MASK1                           0x10D6
+#define HDMI_FC_POL1                            0x10D7
+#define HDMI_FC_STAT2                           0x10D8
+#define HDMI_FC_INT2                            0x10D9
+#define HDMI_FC_MASK2                           0x10DA
+#define HDMI_FC_POL2                            0x10DB
+#define HDMI_FC_PRCONF                          0x10E0
+#define HDMI_FC_SCRAMBLER_CTRL                  0x10E1
+
+#define HDMI_FC_GMD_STAT                        0x1100
+#define HDMI_FC_GMD_EN                          0x1101
+#define HDMI_FC_GMD_UP                          0x1102
+#define HDMI_FC_GMD_CONF                        0x1103
+#define HDMI_FC_GMD_HB                          0x1104
+#define HDMI_FC_GMD_PB0                         0x1105
+#define HDMI_FC_GMD_PB1                         0x1106
+#define HDMI_FC_GMD_PB2                         0x1107
+#define HDMI_FC_GMD_PB3                         0x1108
+#define HDMI_FC_GMD_PB4                         0x1109
+#define HDMI_FC_GMD_PB5                         0x110A
+#define HDMI_FC_GMD_PB6                         0x110B
+#define HDMI_FC_GMD_PB7                         0x110C
+#define HDMI_FC_GMD_PB8                         0x110D
+#define HDMI_FC_GMD_PB9                         0x110E
+#define HDMI_FC_GMD_PB10                        0x110F
+#define HDMI_FC_GMD_PB11                        0x1110
+#define HDMI_FC_GMD_PB12                        0x1111
+#define HDMI_FC_GMD_PB13                        0x1112
+#define HDMI_FC_GMD_PB14                        0x1113
+#define HDMI_FC_GMD_PB15                        0x1114
+#define HDMI_FC_GMD_PB16                        0x1115
+#define HDMI_FC_GMD_PB17                        0x1116
+#define HDMI_FC_GMD_PB18                        0x1117
+#define HDMI_FC_GMD_PB19                        0x1118
+#define HDMI_FC_GMD_PB20                        0x1119
+#define HDMI_FC_GMD_PB21                        0x111A
+#define HDMI_FC_GMD_PB22                        0x111B
+#define HDMI_FC_GMD_PB23                        0x111C
+#define HDMI_FC_GMD_PB24                        0x111D
+#define HDMI_FC_GMD_PB25                        0x111E
+#define HDMI_FC_GMD_PB26                        0x111F
+#define HDMI_FC_GMD_PB27                        0x1120
+
+#define HDMI_FC_DBGFORCE                        0x1200
+#define HDMI_FC_DBGAUD0CH0                      0x1201
+#define HDMI_FC_DBGAUD1CH0                      0x1202
+#define HDMI_FC_DBGAUD2CH0                      0x1203
+#define HDMI_FC_DBGAUD0CH1                      0x1204
+#define HDMI_FC_DBGAUD1CH1                      0x1205
+#define HDMI_FC_DBGAUD2CH1                      0x1206
+#define HDMI_FC_DBGAUD0CH2                      0x1207
+#define HDMI_FC_DBGAUD1CH2                      0x1208
+#define HDMI_FC_DBGAUD2CH2                      0x1209
+#define HDMI_FC_DBGAUD0CH3                      0x120A
+#define HDMI_FC_DBGAUD1CH3                      0x120B
+#define HDMI_FC_DBGAUD2CH3                      0x120C
+#define HDMI_FC_DBGAUD0CH4                      0x120D
+#define HDMI_FC_DBGAUD1CH4                      0x120E
+#define HDMI_FC_DBGAUD2CH4                      0x120F
+#define HDMI_FC_DBGAUD0CH5                      0x1210
+#define HDMI_FC_DBGAUD1CH5                      0x1211
+#define HDMI_FC_DBGAUD2CH5                      0x1212
+#define HDMI_FC_DBGAUD0CH6                      0x1213
+#define HDMI_FC_DBGAUD1CH6                      0x1214
+#define HDMI_FC_DBGAUD2CH6                      0x1215
+#define HDMI_FC_DBGAUD0CH7                      0x1216
+#define HDMI_FC_DBGAUD1CH7                      0x1217
+#define HDMI_FC_DBGAUD2CH7                      0x1218
+#define HDMI_FC_DBGTMDS0                        0x1219
+#define HDMI_FC_DBGTMDS1                        0x121A
+#define HDMI_FC_DBGTMDS2                        0x121B
+
+/* HDMI Source PHY Registers */
+#define HDMI_PHY_CONF0                          0x3000
+#define HDMI_PHY_TST0                           0x3001
+#define HDMI_PHY_TST1                           0x3002
+#define HDMI_PHY_TST2                           0x3003
+#define HDMI_PHY_STAT0                          0x3004
+#define HDMI_PHY_INT0                           0x3005
+#define HDMI_PHY_MASK0                          0x3006
+#define HDMI_PHY_POL0                           0x3007
+
+/* HDMI Master PHY Registers */
+#define HDMI_PHY_I2CM_SLAVE_ADDR                0x3020
+#define HDMI_PHY_I2CM_ADDRESS_ADDR              0x3021
+#define HDMI_PHY_I2CM_DATAO_1_ADDR              0x3022
+#define HDMI_PHY_I2CM_DATAO_0_ADDR              0x3023
+#define HDMI_PHY_I2CM_DATAI_1_ADDR              0x3024
+#define HDMI_PHY_I2CM_DATAI_0_ADDR              0x3025
+#define HDMI_PHY_I2CM_OPERATION_ADDR            0x3026
+#define HDMI_PHY_I2CM_INT_ADDR                  0x3027
+#define HDMI_PHY_I2CM_CTLINT_ADDR               0x3028
+#define HDMI_PHY_I2CM_DIV_ADDR                  0x3029
+#define HDMI_PHY_I2CM_SOFTRSTZ_ADDR             0x302a
+#define HDMI_PHY_I2CM_SS_SCL_HCNT_1_ADDR        0x302b
+#define HDMI_PHY_I2CM_SS_SCL_HCNT_0_ADDR        0x302c
+#define HDMI_PHY_I2CM_SS_SCL_LCNT_1_ADDR        0x302d
+#define HDMI_PHY_I2CM_SS_SCL_LCNT_0_ADDR        0x302e
+#define HDMI_PHY_I2CM_FS_SCL_HCNT_1_ADDR        0x302f
+#define HDMI_PHY_I2CM_FS_SCL_HCNT_0_ADDR        0x3030
+#define HDMI_PHY_I2CM_FS_SCL_LCNT_1_ADDR        0x3031
+#define HDMI_PHY_I2CM_FS_SCL_LCNT_0_ADDR        0x3032
+
+/* Audio Sampler Registers */
+#define HDMI_AUD_CONF0                          0x3100
+#define HDMI_AUD_CONF1                          0x3101
+#define HDMI_AUD_INT                            0x3102
+#define HDMI_AUD_CONF2                          0x3103
+#define HDMI_AUD_N1                             0x3200
+#define HDMI_AUD_N2                             0x3201
+#define HDMI_AUD_N3                             0x3202
+#define HDMI_AUD_CTS1                           0x3203
+#define HDMI_AUD_CTS2                           0x3204
+#define HDMI_AUD_CTS3                           0x3205
+#define HDMI_AUD_INPUTCLKFS                     0x3206
+#define HDMI_AUD_SPDIFINT			                  0x3302
+#define HDMI_AUD_CONF0_HBR                      0x3400
+#define HDMI_AUD_HBR_STATUS                     0x3401
+#define HDMI_AUD_HBR_INT                        0x3402
+#define HDMI_AUD_HBR_POL                        0x3403
+#define HDMI_AUD_HBR_MASK                       0x3404
+
+/*
+ * Generic Parallel Audio Interface Registers
+ * Not used as GPAUD interface is not enabled in hw
+ */
+#define HDMI_GP_CONF0                           0x3500
+#define HDMI_GP_CONF1                           0x3501
+#define HDMI_GP_CONF2                           0x3502
+#define HDMI_GP_STAT                            0x3503
+#define HDMI_GP_INT                             0x3504
+#define HDMI_GP_MASK                            0x3505
+#define HDMI_GP_POL                             0x3506
+
+/* Audio DMA Registers */
+#define HDMI_AHB_DMA_CONF0                      0x3600
+#define HDMI_AHB_DMA_START                      0x3601
+#define HDMI_AHB_DMA_STOP                       0x3602
+#define HDMI_AHB_DMA_THRSLD                     0x3603
+#define HDMI_AHB_DMA_STRADDR0                   0x3604
+#define HDMI_AHB_DMA_STRADDR1                   0x3605
+#define HDMI_AHB_DMA_STRADDR2                   0x3606
+#define HDMI_AHB_DMA_STRADDR3                   0x3607
+#define HDMI_AHB_DMA_STPADDR0                   0x3608
+#define HDMI_AHB_DMA_STPADDR1                   0x3609
+#define HDMI_AHB_DMA_STPADDR2                   0x360a
+#define HDMI_AHB_DMA_STPADDR3                   0x360b
+#define HDMI_AHB_DMA_BSTADDR0                   0x360c
+#define HDMI_AHB_DMA_BSTADDR1                   0x360d
+#define HDMI_AHB_DMA_BSTADDR2                   0x360e
+#define HDMI_AHB_DMA_BSTADDR3                   0x360f
+#define HDMI_AHB_DMA_MBLENGTH0                  0x3610
+#define HDMI_AHB_DMA_MBLENGTH1                  0x3611
+#define HDMI_AHB_DMA_STAT                       0x3612
+#define HDMI_AHB_DMA_INT                        0x3613
+#define HDMI_AHB_DMA_MASK                       0x3614
+#define HDMI_AHB_DMA_POL                        0x3615
+#define HDMI_AHB_DMA_CONF1                      0x3616
+#define HDMI_AHB_DMA_BUFFSTAT                   0x3617
+#define HDMI_AHB_DMA_BUFFINT                    0x3618
+#define HDMI_AHB_DMA_BUFFMASK                   0x3619
+#define HDMI_AHB_DMA_BUFFPOL                    0x361a
+
+/* Main Controller Registers */
+#define HDMI_MC_SFRDIV                          0x4000
+#define HDMI_MC_CLKDIS                          0x4001
+#define HDMI_MC_SWRSTZ                          0x4002
+#define HDMI_MC_OPCTRL                          0x4003
+#define HDMI_MC_FLOWCTRL                        0x4004
+#define HDMI_MC_PHYRSTZ                         0x4005
+#define HDMI_MC_LOCKONCLOCK                     0x4006
+#define HDMI_MC_HEACPHY_RST                     0x4007
+
+/* Color Space  Converter Registers */
+#define HDMI_CSC_CFG                            0x4100
+#define HDMI_CSC_SCALE                          0x4101
+#define HDMI_CSC_COEF_A1_MSB                    0x4102
+#define HDMI_CSC_COEF_A1_LSB                    0x4103
+#define HDMI_CSC_COEF_A2_MSB                    0x4104
+#define HDMI_CSC_COEF_A2_LSB                    0x4105
+#define HDMI_CSC_COEF_A3_MSB                    0x4106
+#define HDMI_CSC_COEF_A3_LSB                    0x4107
+#define HDMI_CSC_COEF_A4_MSB                    0x4108
+#define HDMI_CSC_COEF_A4_LSB                    0x4109
+#define HDMI_CSC_COEF_B1_MSB                    0x410A
+#define HDMI_CSC_COEF_B1_LSB                    0x410B
+#define HDMI_CSC_COEF_B2_MSB                    0x410C
+#define HDMI_CSC_COEF_B2_LSB                    0x410D
+#define HDMI_CSC_COEF_B3_MSB                    0x410E
+#define HDMI_CSC_COEF_B3_LSB                    0x410F
+#define HDMI_CSC_COEF_B4_MSB                    0x4110
+#define HDMI_CSC_COEF_B4_LSB                    0x4111
+#define HDMI_CSC_COEF_C1_MSB                    0x4112
+#define HDMI_CSC_COEF_C1_LSB                    0x4113
+#define HDMI_CSC_COEF_C2_MSB                    0x4114
+#define HDMI_CSC_COEF_C2_LSB                    0x4115
+#define HDMI_CSC_COEF_C3_MSB                    0x4116
+#define HDMI_CSC_COEF_C3_LSB                    0x4117
+#define HDMI_CSC_COEF_C4_MSB                    0x4118
+#define HDMI_CSC_COEF_C4_LSB                    0x4119
+
+/* HDCP Encryption Engine Registers */
+#define HDMI_A_HDCPCFG0                         0x5000
+#define HDMI_A_HDCPCFG1                         0x5001
+#define HDMI_A_HDCPOBS0                         0x5002
+#define HDMI_A_HDCPOBS1                         0x5003
+#define HDMI_A_HDCPOBS2                         0x5004
+#define HDMI_A_HDCPOBS3                         0x5005
+#define HDMI_A_APIINTCLR                        0x5006
+#define HDMI_A_APIINTSTAT                       0x5007
+#define HDMI_A_APIINTMSK                        0x5008
+#define HDMI_A_VIDPOLCFG                        0x5009
+#define HDMI_A_OESSWCFG                         0x500A
+#define HDMI_A_TIMER1SETUP0                     0x500B
+#define HDMI_A_TIMER1SETUP1                     0x500C
+#define HDMI_A_TIMER2SETUP0                     0x500D
+#define HDMI_A_TIMER2SETUP1                     0x500E
+#define HDMI_A_100MSCFG                         0x500F
+#define HDMI_A_2SCFG0                           0x5010
+#define HDMI_A_2SCFG1                           0x5011
+#define HDMI_A_5SCFG0                           0x5012
+#define HDMI_A_5SCFG1                           0x5013
+#define HDMI_A_SRMVERLSB                        0x5014
+#define HDMI_A_SRMVERMSB                        0x5015
+#define HDMI_A_SRMCTRL                          0x5016
+#define HDMI_A_SFRSETUP                         0x5017
+#define HDMI_A_I2CHSETUP                        0x5018
+#define HDMI_A_INTSETUP                         0x5019
+#define HDMI_A_PRESETUP                         0x501A
+#define HDMI_A_SRM_BASE                         0x5020
+
+/* CEC Engine Registers */
+#define HDMI_CEC_CTRL                           0x7D00
+#define HDMI_CEC_STAT                           0x7D01
+#define HDMI_CEC_MASK                           0x7D02
+#define HDMI_CEC_POLARITY                       0x7D03
+#define HDMI_CEC_INT                            0x7D04
+#define HDMI_CEC_ADDR_L                         0x7D05
+#define HDMI_CEC_ADDR_H                         0x7D06
+#define HDMI_CEC_TX_CNT                         0x7D07
+#define HDMI_CEC_RX_CNT                         0x7D08
+#define HDMI_CEC_TX_DATA0                       0x7D10
+#define HDMI_CEC_TX_DATA1                       0x7D11
+#define HDMI_CEC_TX_DATA2                       0x7D12
+#define HDMI_CEC_TX_DATA3                       0x7D13
+#define HDMI_CEC_TX_DATA4                       0x7D14
+#define HDMI_CEC_TX_DATA5                       0x7D15
+#define HDMI_CEC_TX_DATA6                       0x7D16
+#define HDMI_CEC_TX_DATA7                       0x7D17
+#define HDMI_CEC_TX_DATA8                       0x7D18
+#define HDMI_CEC_TX_DATA9                       0x7D19
+#define HDMI_CEC_TX_DATA10                      0x7D1a
+#define HDMI_CEC_TX_DATA11                      0x7D1b
+#define HDMI_CEC_TX_DATA12                      0x7D1c
+#define HDMI_CEC_TX_DATA13                      0x7D1d
+#define HDMI_CEC_TX_DATA14                      0x7D1e
+#define HDMI_CEC_TX_DATA15                      0x7D1f
+#define HDMI_CEC_RX_DATA0                       0x7D20
+#define HDMI_CEC_RX_DATA1                       0x7D21
+#define HDMI_CEC_RX_DATA2                       0x7D22
+#define HDMI_CEC_RX_DATA3                       0x7D23
+#define HDMI_CEC_RX_DATA4                       0x7D24
+#define HDMI_CEC_RX_DATA5                       0x7D25
+#define HDMI_CEC_RX_DATA6                       0x7D26
+#define HDMI_CEC_RX_DATA7                       0x7D27
+#define HDMI_CEC_RX_DATA8                       0x7D28
+#define HDMI_CEC_RX_DATA9                       0x7D29
+#define HDMI_CEC_RX_DATA10                      0x7D2a
+#define HDMI_CEC_RX_DATA11                      0x7D2b
+#define HDMI_CEC_RX_DATA12                      0x7D2c
+#define HDMI_CEC_RX_DATA13                      0x7D2d
+#define HDMI_CEC_RX_DATA14                      0x7D2e
+#define HDMI_CEC_RX_DATA15                      0x7D2f
+#define HDMI_CEC_LOCK                           0x7D30
+#define HDMI_CEC_WKUPCTRL                       0x7D31
+
+/* I2C Master Registers (E-DDC) */
+#define HDMI_I2CM_SLAVE                         0x7E00
+#define HDMI_I2CM_ADDRESS                       0x7E01
+#define HDMI_I2CM_DATAO                         0x7E02
+#define HDMI_I2CM_DATAI                         0x7E03
+#define HDMI_I2CM_OPERATION                     0x7E04
+#define HDMI_I2CM_INT                           0x7E05
+#define HDMI_I2CM_CTLINT                        0x7E06
+#define HDMI_I2CM_DIV                           0x7E07
+#define HDMI_I2CM_SEGADDR                       0x7E08
+#define HDMI_I2CM_SOFTRSTZ                      0x7E09
+#define HDMI_I2CM_SEGPTR                        0x7E0A
+#define HDMI_I2CM_SS_SCL_HCNT_1_ADDR            0x7E0B
+#define HDMI_I2CM_SS_SCL_HCNT_0_ADDR            0x7E0C
+#define HDMI_I2CM_SS_SCL_LCNT_1_ADDR            0x7E0D
+#define HDMI_I2CM_SS_SCL_LCNT_0_ADDR            0x7E0E
+#define HDMI_I2CM_FS_SCL_HCNT_1_ADDR            0x7E0F
+#define HDMI_I2CM_FS_SCL_HCNT_0_ADDR            0x7E10
+#define HDMI_I2CM_FS_SCL_LCNT_1_ADDR            0x7E11
+#define HDMI_I2CM_FS_SCL_LCNT_0_ADDR            0x7E12
+#define HDMI_I2CM_SDA_HOLD                      0x7E13
+#define HDMI_I2CM_SCDC_READ_UPDATE              0x7E14
+#define HDMI_I2CM_READ_REQ_EN_MSK               BIT(4)
+#define HDMI_I2CM_READ_REQ_EN_OFFSET            4
+#define HDMI_I2CM_READ_UPDATE_MSK               BIT(0)
+#define HDMI_I2CM_READ_UPDATE_OFFSET            0
+#define HDMI_I2CM_I2CM_UPRD_VSYNC_EN_MSK        BIT(5)
+#define HDMI_I2CM_I2CM_UPRD_VSYNC_EN_OFFSET     5
+#define	HDMI_I2CM_READ_BUFF0                    0x7E20
+#define	HDMI_I2CM_SCDC_UPDATE0                  0x7E30
+#define	HDMI_I2CM_SCDC_UPDATE1                  0x7E31
+#define DDC_I2C_EDID_ADDR                       0x50
+#define DDC_I2C_SEG_ADDR                        0x30
+#define DDC_I2C_SCDC_ADDR                       0x54
+#define HDMI_EDID_BLOCK_SIZE                    128
+#define EDID_I2C_MIN_SS_SCL_HIGH_TIME           9625
+#define EDID_I2C_MIN_SS_SCL_LOW_TIME            10000
+#define I2C_DIV_FACTOR                          1000000
+
+/* SCDC Registers */
+#define SCDC_SINK_VERSION 0x01
+#define SCDC_SOURCE_VERSION 0x02
+
+#define SCDC_UPDATE_0 0x10
+#define SCDC_READ_REQUEST_TEST BIT(2)
+#define SCDC_CED_UPDATE BIT(1)
+#define SCDC_STATUS_UPDATE BIT(0)
+#define SCDC_UPDATE_1 0x11
+
+#define SCDC_TMDS_CONFIG 0x20
+#define SCDC_TMDS_BIT_CLOCK_RATIO_BY_40 BIT(1)
+#define SCDC_TMDS_BIT_CLOCK_RATIO_BY_10 (0 << 1)
+#define SCDC_SCRAMBLING_ENABLE BIT(0)
+#define SCDC_SCRAMBLER_STATUS 0x21
+#define SCDC_SCRAMBLING_STATUS BIT(0)
+
+#define SCDC_CONFIG_0 0x30
+#define SCDC_READ_REQUEST_ENABLE BIT(0)
+
+#define SCDC_STATUS_FLAGS_0 0x40
+#define SCDC_CH2_LOCK BIT(3)
+#define SCDC_CH1_LOCK BIT(2)
+#define SCDC_CH0_LOCK BIT(1)
+#define SCDC_CH_LOCK_MASK (SCDC_CH2_LOCK | SCDC_CH1_LOCK | SCDC_CH0_LOCK)
+#define SCDC_CLOCK_DETECT BIT(0)
+#define SCDC_STATUS_FLAGS_1 0x41
+
+#define SCDC_ERR_DET_0_L 0x50
+#define SCDC_ERR_DET_0_H 0x51
+#define SCDC_ERR_DET_1_L 0x52
+#define SCDC_ERR_DET_1_H 0x53
+#define SCDC_ERR_DET_2_L 0x54
+#define SCDC_ERR_DET_2_H 0x55
+#define SCDC_CHANNEL_VALID BIT(7)
+#define SCDC_ERR_DET_CHECKSUM 0x56
+
+#define SCDC_TEST_CONFIG_0 0xc0
+#define SCDC_TEST_READ_REQUEST BIT(7)
+#define SCDC_TEST_READ_REQUEST_DELAY(x) ((x) & 0x7f)
+
+#define SCDC_MANUFACTURER_IEEE_OUI 0xd0
+#define SCDC_MANUFACTURER_IEEE_OUI_SIZE 3
+#define SCDC_DEVICE_ID 0xd3
+#define SCDC_DEVICE_ID_SIZE 8
+#define SCDC_DEVICE_HARDWARE_REVISION 0xdb
+#define SCDC_DEVICE_HARDWARE_REVISION_MAJOR(x) (((x) >> 4) & 0xf)
+#define SCDC_DEVICE_HARDWARE_REVISION_MINOR(x) (((x) >> 0) & 0xf)
+#define SCDC_DEVICE_SOFTWARE_MAJOR_REVISION 0xdc
+#define SCDC_DEVICE_SOFTWARE_MINOR_REVISION 0xdd
+
+#define SCDC_MANUFACTURER_SPECIFIC 0xde
+#define SCDC_MANUFACTURER_SPECIFIC_SIZE 34
+
+enum {
+/* PRODUCT_ID0 field values */
+	HDMI_PRODUCT_ID0_HDMI_TX = 0xa0,
+
+/* PRODUCT_ID1 field values */
+	HDMI_PRODUCT_ID1_HDCP = 0xc0,
+	HDMI_PRODUCT_ID1_HDMI_RX = 0x02,
+	HDMI_PRODUCT_ID1_HDMI_TX = 0x01,
+
+/* CONFIG0_ID field values */
+	HDMI_CONFIG0_I2S = 0x10,
+
+/* CONFIG1_ID field values */
+	HDMI_CONFIG1_AHB = 0x01,
+
+/* CONFIG3_ID field values */
+	HDMI_CONFIG3_AHBAUDDMA = 0x02,
+	HDMI_CONFIG3_GPAUD = 0x01,
+
+/* IH_FC_INT2 field values */
+	HDMI_IH_FC_INT2_OVERFLOW_MASK = 0x03,
+	HDMI_IH_FC_INT2_LOW_PRIORITY_OVERFLOW = 0x02,
+	HDMI_IH_FC_INT2_HIGH_PRIORITY_OVERFLOW = 0x01,
+
+/* IH_FC_STAT2 field values */
+	HDMI_IH_FC_STAT2_OVERFLOW_MASK = 0x03,
+	HDMI_IH_FC_STAT2_LOW_PRIORITY_OVERFLOW = 0x02,
+	HDMI_IH_FC_STAT2_HIGH_PRIORITY_OVERFLOW = 0x01,
+
+/* IH_PHY_STAT0 field values */
+	HDMI_IH_PHY_STAT0_RX_SENSE3 = 0x20,
+	HDMI_IH_PHY_STAT0_RX_SENSE2 = 0x10,
+	HDMI_IH_PHY_STAT0_RX_SENSE1 = 0x8,
+	HDMI_IH_PHY_STAT0_RX_SENSE0 = 0x4,
+	HDMI_IH_PHY_STAT0_TX_PHY_LOCK = 0x2,
+	HDMI_IH_PHY_STAT0_HPD = 0x1,
+
+/* IH_I2CM_STAT0 and IH_MUTE_I2CM_STAT0 field values */
+	HDMI_IH_I2CM_STAT0_DONE = 0x2,
+	HDMI_IH_I2CM_STAT0_ERROR = 0x1,
+
+/* IH_MUTE_I2CMPHY_STAT0 field values */
+	HDMI_IH_MUTE_I2CMPHY_STAT0_I2CMPHYDONE = 0x2,
+	HDMI_IH_MUTE_I2CMPHY_STAT0_I2CMPHYERROR = 0x1,
+
+/* IH_AHBDMAAUD_STAT0 field values */
+	HDMI_IH_AHBDMAAUD_STAT0_ERROR = 0x20,
+	HDMI_IH_AHBDMAAUD_STAT0_LOST = 0x10,
+	HDMI_IH_AHBDMAAUD_STAT0_RETRY = 0x08,
+	HDMI_IH_AHBDMAAUD_STAT0_DONE = 0x04,
+	HDMI_IH_AHBDMAAUD_STAT0_BUFFFULL = 0x02,
+	HDMI_IH_AHBDMAAUD_STAT0_BUFFEMPTY = 0x01,
+
+/* IH_MUTE_FC_STAT2 field values */
+	HDMI_IH_MUTE_FC_STAT2_OVERFLOW_MASK = 0x03,
+	HDMI_IH_MUTE_FC_STAT2_LOW_PRIORITY_OVERFLOW = 0x02,
+	HDMI_IH_MUTE_FC_STAT2_HIGH_PRIORITY_OVERFLOW = 0x01,
+
+/* IH_MUTE_AHBDMAAUD_STAT0 field values */
+	HDMI_IH_MUTE_AHBDMAAUD_STAT0_ERROR = 0x20,
+	HDMI_IH_MUTE_AHBDMAAUD_STAT0_LOST = 0x10,
+	HDMI_IH_MUTE_AHBDMAAUD_STAT0_RETRY = 0x08,
+	HDMI_IH_MUTE_AHBDMAAUD_STAT0_DONE = 0x04,
+	HDMI_IH_MUTE_AHBDMAAUD_STAT0_BUFFFULL = 0x02,
+	HDMI_IH_MUTE_AHBDMAAUD_STAT0_BUFFEMPTY = 0x01,
+
+/* IH_MUTE field values */
+	HDMI_IH_MUTE_MUTE_WAKEUP_INTERRUPT = 0x2,
+	HDMI_IH_MUTE_MUTE_ALL_INTERRUPT = 0x1,
+
+/* TX_INVID0 field values */
+	HDMI_TX_INVID0_INTERNAL_DE_GENERATOR_MASK = 0x80,
+	HDMI_TX_INVID0_INTERNAL_DE_GENERATOR_ENABLE = 0x80,
+	HDMI_TX_INVID0_INTERNAL_DE_GENERATOR_DISABLE = 0x00,
+	HDMI_TX_INVID0_VIDEO_MAPPING_MASK = 0x1F,
+	HDMI_TX_INVID0_VIDEO_MAPPING_OFFSET = 0,
+
+/* TX_INSTUFFING field values */
+	HDMI_TX_INSTUFFING_BDBDATA_STUFFING_MASK = 0x4,
+	HDMI_TX_INSTUFFING_BDBDATA_STUFFING_ENABLE = 0x4,
+	HDMI_TX_INSTUFFING_BDBDATA_STUFFING_DISABLE = 0x0,
+	HDMI_TX_INSTUFFING_RCRDATA_STUFFING_MASK = 0x2,
+	HDMI_TX_INSTUFFING_RCRDATA_STUFFING_ENABLE = 0x2,
+	HDMI_TX_INSTUFFING_RCRDATA_STUFFING_DISABLE = 0x0,
+	HDMI_TX_INSTUFFING_GYDATA_STUFFING_MASK = 0x1,
+	HDMI_TX_INSTUFFING_GYDATA_STUFFING_ENABLE = 0x1,
+	HDMI_TX_INSTUFFING_GYDATA_STUFFING_DISABLE = 0x0,
+
+/* VP_PR_CD field values */
+	HDMI_VP_PR_CD_COLOR_DEPTH_MASK = 0xF0,
+	HDMI_VP_PR_CD_COLOR_DEPTH_OFFSET = 4,
+	HDMI_VP_PR_CD_DESIRED_PR_FACTOR_MASK = 0x0F,
+	HDMI_VP_PR_CD_DESIRED_PR_FACTOR_OFFSET = 0,
+
+/* VP_STUFF field values */
+	HDMI_VP_STUFF_IDEFAULT_PHASE_MASK = 0x20,
+	HDMI_VP_STUFF_IDEFAULT_PHASE_OFFSET = 5,
+	HDMI_VP_STUFF_IFIX_PP_TO_LAST_MASK = 0x10,
+	HDMI_VP_STUFF_IFIX_PP_TO_LAST_OFFSET = 4,
+	HDMI_VP_STUFF_ICX_GOTO_P0_ST_MASK = 0x8,
+	HDMI_VP_STUFF_ICX_GOTO_P0_ST_OFFSET = 3,
+	HDMI_VP_STUFF_YCC422_STUFFING_MASK = 0x4,
+	HDMI_VP_STUFF_YCC422_STUFFING_STUFFING_MODE = 0x4,
+	HDMI_VP_STUFF_YCC422_STUFFING_DIRECT_MODE = 0x0,
+	HDMI_VP_STUFF_PP_STUFFING_MASK = 0x2,
+	HDMI_VP_STUFF_PP_STUFFING_STUFFING_MODE = 0x2,
+	HDMI_VP_STUFF_PP_STUFFING_DIRECT_MODE = 0x0,
+	HDMI_VP_STUFF_PR_STUFFING_MASK = 0x1,
+	HDMI_VP_STUFF_PR_STUFFING_STUFFING_MODE = 0x1,
+	HDMI_VP_STUFF_PR_STUFFING_DIRECT_MODE = 0x0,
+
+/* VP_CONF field values */
+	HDMI_VP_CONF_BYPASS_EN_MASK = 0x40,
+	HDMI_VP_CONF_BYPASS_EN_ENABLE = 0x40,
+	HDMI_VP_CONF_BYPASS_EN_DISABLE = 0x00,
+	HDMI_VP_CONF_PP_EN_ENMASK = 0x20,
+	HDMI_VP_CONF_PP_EN_ENABLE = 0x20,
+	HDMI_VP_CONF_PP_EN_DISABLE = 0x00,
+	HDMI_VP_CONF_PR_EN_MASK = 0x10,
+	HDMI_VP_CONF_PR_EN_ENABLE = 0x10,
+	HDMI_VP_CONF_PR_EN_DISABLE = 0x00,
+	HDMI_VP_CONF_YCC422_EN_MASK = 0x8,
+	HDMI_VP_CONF_YCC422_EN_ENABLE = 0x8,
+	HDMI_VP_CONF_YCC422_EN_DISABLE = 0x0,
+	HDMI_VP_CONF_BYPASS_SELECT_MASK = 0x4,
+	HDMI_VP_CONF_BYPASS_SELECT_VID_PACKETIZER = 0x4,
+	HDMI_VP_CONF_BYPASS_SELECT_PIX_REPEATER = 0x0,
+	HDMI_VP_CONF_OUTPUT_SELECTOR_MASK = 0x3,
+	HDMI_VP_CONF_OUTPUT_SELECTOR_BYPASS = 0x3,
+	HDMI_VP_CONF_OUTPUT_SELECTOR_YCC422 = 0x1,
+	HDMI_VP_CONF_OUTPUT_SELECTOR_PP = 0x0,
+
+/* VP_REMAP field values */
+	HDMI_VP_REMAP_MASK = 0x3,
+	HDMI_VP_REMAP_YCC422_24bit = 0x2,
+	HDMI_VP_REMAP_YCC422_20bit = 0x1,
+	HDMI_VP_REMAP_YCC422_16bit = 0x0,
+
+/* FC_INVIDCONF field values */
+	HDMI_FC_INVIDCONF_HDCP_KEEPOUT_MASK = 0x80,
+	HDMI_FC_INVIDCONF_HDCP_KEEPOUT_ACTIVE = 0x80,
+	HDMI_FC_INVIDCONF_HDCP_KEEPOUT_INACTIVE = 0x00,
+	HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_MASK = 0x40,
+	HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_ACTIVE_HIGH = 0x40,
+	HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_ACTIVE_LOW = 0x00,
+	HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_MASK = 0x20,
+	HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_ACTIVE_HIGH = 0x20,
+	HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_ACTIVE_LOW = 0x00,
+	HDMI_FC_INVIDCONF_DE_IN_POLARITY_MASK = 0x10,
+	HDMI_FC_INVIDCONF_DE_IN_POLARITY_ACTIVE_HIGH = 0x10,
+	HDMI_FC_INVIDCONF_DE_IN_POLARITY_ACTIVE_LOW = 0x00,
+	HDMI_FC_INVIDCONF_DVI_MODEZ_MASK = 0x8,
+	HDMI_FC_INVIDCONF_DVI_MODEZ_HDMI_MODE = 0x8,
+	HDMI_FC_INVIDCONF_DVI_MODEZ_DVI_MODE = 0x0,
+	HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_MASK = 0x2,
+	HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_ACTIVE_HIGH = 0x2,
+	HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_ACTIVE_LOW = 0x0,
+	HDMI_FC_INVIDCONF_IN_I_P_MASK = 0x1,
+	HDMI_FC_INVIDCONF_IN_I_P_INTERLACED = 0x1,
+	HDMI_FC_INVIDCONF_IN_I_P_PROGRESSIVE = 0x0,
+
+/* FC_AUDICONF0 field values */
+	HDMI_FC_AUDICONF0_CC_OFFSET = 4,
+	HDMI_FC_AUDICONF0_CC_MASK = 0x70,
+	HDMI_FC_AUDICONF0_CT_OFFSET = 0,
+	HDMI_FC_AUDICONF0_CT_MASK = 0xF,
+
+/* FC_AUDICONF1 field values */
+	HDMI_FC_AUDICONF1_SS_OFFSET = 3,
+	HDMI_FC_AUDICONF1_SS_MASK = 0x18,
+	HDMI_FC_AUDICONF1_SF_OFFSET = 0,
+	HDMI_FC_AUDICONF1_SF_MASK = 0x7,
+
+/* FC_AUDICONF3 field values */
+	HDMI_FC_AUDICONF3_LFEPBL_OFFSET = 5,
+	HDMI_FC_AUDICONF3_LFEPBL_MASK = 0x60,
+	HDMI_FC_AUDICONF3_DM_INH_OFFSET = 4,
+	HDMI_FC_AUDICONF3_DM_INH_MASK = 0x10,
+	HDMI_FC_AUDICONF3_LSV_OFFSET = 0,
+	HDMI_FC_AUDICONF3_LSV_MASK = 0xF,
+
+/* FC_AUDSCHNLS0 field values */
+	HDMI_FC_AUDSCHNLS0_CGMSA_OFFSET = 4,
+	HDMI_FC_AUDSCHNLS0_CGMSA_MASK = 0x30,
+	HDMI_FC_AUDSCHNLS0_COPYRIGHT_OFFSET = 0,
+	HDMI_FC_AUDSCHNLS0_COPYRIGHT_MASK = 0x01,
+
+/* FC_AUDSCHNLS3-6 field values */
+	HDMI_FC_AUDSCHNLS3_OIEC_CH0_OFFSET = 0,
+	HDMI_FC_AUDSCHNLS3_OIEC_CH0_MASK = 0x0f,
+	HDMI_FC_AUDSCHNLS3_OIEC_CH1_OFFSET = 4,
+	HDMI_FC_AUDSCHNLS3_OIEC_CH1_MASK = 0xf0,
+	HDMI_FC_AUDSCHNLS4_OIEC_CH2_OFFSET = 0,
+	HDMI_FC_AUDSCHNLS4_OIEC_CH2_MASK = 0x0f,
+	HDMI_FC_AUDSCHNLS4_OIEC_CH3_OFFSET = 4,
+	HDMI_FC_AUDSCHNLS4_OIEC_CH3_MASK = 0xf0,
+
+	HDMI_FC_AUDSCHNLS5_OIEC_CH0_OFFSET = 0,
+	HDMI_FC_AUDSCHNLS5_OIEC_CH0_MASK = 0x0f,
+	HDMI_FC_AUDSCHNLS5_OIEC_CH1_OFFSET = 4,
+	HDMI_FC_AUDSCHNLS5_OIEC_CH1_MASK = 0xf0,
+	HDMI_FC_AUDSCHNLS6_OIEC_CH2_OFFSET = 0,
+	HDMI_FC_AUDSCHNLS6_OIEC_CH2_MASK = 0x0f,
+	HDMI_FC_AUDSCHNLS6_OIEC_CH3_OFFSET = 4,
+	HDMI_FC_AUDSCHNLS6_OIEC_CH3_MASK = 0xf0,
+
+/* HDMI_FC_AUDSCHNLS7 field values */
+	HDMI_FC_AUDSCHNLS7_ACCURACY_OFFSET = 4,
+	HDMI_FC_AUDSCHNLS7_ACCURACY_MASK = 0x30,
+	HDMI_FC_AUDSCHNLS7_SAMPFREQ_OFFSET = 0,
+	HDMI_FC_AUDSCHNLS7_SAMPFREQ_MASK = 0x0f,
+
+/* HDMI_FC_AUDSCHNLS8 field values */
+	HDMI_FC_AUDSCHNLS8_ORIGSAMPFREQ_MASK = 0xf0,
+	HDMI_FC_AUDSCHNLS8_ORIGSAMPFREQ_OFFSET = 4,
+	HDMI_FC_AUDSCHNLS8_WORDLEGNTH_MASK = 0x0f,
+	HDMI_FC_AUDSCHNLS8_WORDLEGNTH_OFFSET = 0,
+
+/* HDMI_FC_AUDSCHNLS Sample Rate */
+	HDMI_FC_AUDSCHNLS_32K = 0x3,
+	HDMI_FC_AUDSCHNLS_441K = 0x0,
+	HDMI_FC_AUDSCHNLS_48K = 0x2,
+	HDMI_FC_AUDSCHNLS_882K = 0x8,
+	HDMI_FC_AUDSCHNLS_96K = 0xa,
+	HDMI_FC_AUDSCHNLS_1764K = 0xc,
+	HDMI_FC_AUDSCHNLS_192K = 0xe,
+
+/* FC_AUDSCONF field values */
+	HDMI_FC_AUDSCONF_AUD_PACKET_SAMPFIT_MASK = 0xF0,
+	HDMI_FC_AUDSCONF_AUD_PACKET_SAMPFIT_OFFSET = 4,
+	HDMI_FC_AUDSCONF_AUD_PACKET_LAYOUT_MASK = 0x1,
+	HDMI_FC_AUDSCONF_AUD_PACKET_LAYOUT_OFFSET = 0,
+	HDMI_FC_AUDSCONF_AUD_PACKET_LAYOUT_LAYOUT1 = 0x1,
+	HDMI_FC_AUDSCONF_AUD_PACKET_LAYOUT_LAYOUT0 = 0x0,
+
+/* FC_STAT2 field values */
+	HDMI_FC_STAT2_OVERFLOW_MASK = 0x03,
+	HDMI_FC_STAT2_LOW_PRIORITY_OVERFLOW = 0x02,
+	HDMI_FC_STAT2_HIGH_PRIORITY_OVERFLOW = 0x01,
+
+/* FC_INT2 field values */
+	HDMI_FC_INT2_OVERFLOW_MASK = 0x03,
+	HDMI_FC_INT2_LOW_PRIORITY_OVERFLOW = 0x02,
+	HDMI_FC_INT2_HIGH_PRIORITY_OVERFLOW = 0x01,
+
+/* FC_MASK2 field values */
+	HDMI_FC_MASK2_OVERFLOW_MASK = 0x03,
+	HDMI_FC_MASK2_LOW_PRIORITY_OVERFLOW = 0x02,
+	HDMI_FC_MASK2_HIGH_PRIORITY_OVERFLOW = 0x01,
+
+/* FC_PRCONF field values */
+	HDMI_FC_PRCONF_INCOMING_PR_FACTOR_MASK = 0xF0,
+	HDMI_FC_PRCONF_INCOMING_PR_FACTOR_OFFSET = 4,
+	HDMI_FC_PRCONF_OUTPUT_PR_FACTOR_MASK = 0x0F,
+	HDMI_FC_PRCONF_OUTPUT_PR_FACTOR_OFFSET = 0,
+
+/* FC_AVICONF0-FC_AVICONF3 field values */
+	HDMI_FC_AVICONF0_PIX_FMT_MASK = 0x03,
+	HDMI_FC_AVICONF0_PIX_FMT_RGB = 0x00,
+	HDMI_FC_AVICONF0_PIX_FMT_YCBCR422 = 0x01,
+	HDMI_FC_AVICONF0_PIX_FMT_YCBCR444 = 0x02,
+	HDMI_FC_AVICONF0_ACTIVE_FMT_MASK = 0x40,
+	HDMI_FC_AVICONF0_ACTIVE_FMT_INFO_PRESENT = 0x40,
+	HDMI_FC_AVICONF0_ACTIVE_FMT_NO_INFO = 0x00,
+	HDMI_FC_AVICONF0_BAR_DATA_MASK = 0x0C,
+	HDMI_FC_AVICONF0_BAR_DATA_NO_DATA = 0x00,
+	HDMI_FC_AVICONF0_BAR_DATA_VERT_BAR = 0x04,
+	HDMI_FC_AVICONF0_BAR_DATA_HORIZ_BAR = 0x08,
+	HDMI_FC_AVICONF0_BAR_DATA_VERT_HORIZ_BAR = 0x0C,
+	HDMI_FC_AVICONF0_SCAN_INFO_MASK = 0x30,
+	HDMI_FC_AVICONF0_SCAN_INFO_OVERSCAN = 0x10,
+	HDMI_FC_AVICONF0_SCAN_INFO_UNDERSCAN = 0x20,
+	HDMI_FC_AVICONF0_SCAN_INFO_NODATA = 0x00,
+
+	HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_MASK = 0x0F,
+	HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_USE_CODED = 0x08,
+	HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_4_3 = 0x09,
+	HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_16_9 = 0x0A,
+	HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_14_9 = 0x0B,
+	HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_MASK = 0x30,
+	HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_NO_DATA = 0x00,
+	HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_4_3 = 0x10,
+	HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_16_9 = 0x20,
+	HDMI_FC_AVICONF1_COLORIMETRY_MASK = 0xC0,
+	HDMI_FC_AVICONF1_COLORIMETRY_NO_DATA = 0x00,
+	HDMI_FC_AVICONF1_COLORIMETRY_SMPTE = 0x40,
+	HDMI_FC_AVICONF1_COLORIMETRY_ITUR = 0x80,
+	HDMI_FC_AVICONF1_COLORIMETRY_EXTENDED_INFO = 0xC0,
+
+	HDMI_FC_AVICONF2_SCALING_MASK = 0x03,
+	HDMI_FC_AVICONF2_SCALING_NONE = 0x00,
+	HDMI_FC_AVICONF2_SCALING_HORIZ = 0x01,
+	HDMI_FC_AVICONF2_SCALING_VERT = 0x02,
+	HDMI_FC_AVICONF2_SCALING_HORIZ_VERT = 0x03,
+	HDMI_FC_AVICONF2_RGB_QUANT_MASK = 0x0C,
+	HDMI_FC_AVICONF2_RGB_QUANT_DEFAULT = 0x00,
+	HDMI_FC_AVICONF2_RGB_QUANT_LIMITED_RANGE = 0x04,
+	HDMI_FC_AVICONF2_RGB_QUANT_FULL_RANGE = 0x08,
+	HDMI_FC_AVICONF2_EXT_COLORIMETRY_MASK = 0x70,
+	HDMI_FC_AVICONF2_EXT_COLORIMETRY_XVYCC601 = 0x00,
+	HDMI_FC_AVICONF2_EXT_COLORIMETRY_XVYCC709 = 0x10,
+	HDMI_FC_AVICONF2_EXT_COLORIMETRY_SYCC601 = 0x20,
+	HDMI_FC_AVICONF2_EXT_COLORIMETRY_ADOBE_YCC601 = 0x30,
+	HDMI_FC_AVICONF2_EXT_COLORIMETRY_ADOBE_RGB = 0x40,
+	HDMI_FC_AVICONF2_IT_CONTENT_MASK = 0x80,
+	HDMI_FC_AVICONF2_IT_CONTENT_NO_DATA = 0x00,
+	HDMI_FC_AVICONF2_IT_CONTENT_VALID = 0x80,
+
+	HDMI_FC_AVICONF3_IT_CONTENT_TYPE_MASK = 0x03,
+	HDMI_FC_AVICONF3_IT_CONTENT_TYPE_GRAPHICS = 0x00,
+	HDMI_FC_AVICONF3_IT_CONTENT_TYPE_PHOTO = 0x01,
+	HDMI_FC_AVICONF3_IT_CONTENT_TYPE_CINEMA = 0x02,
+	HDMI_FC_AVICONF3_IT_CONTENT_TYPE_GAME = 0x03,
+	HDMI_FC_AVICONF3_QUANT_RANGE_MASK = 0x0C,
+	HDMI_FC_AVICONF3_QUANT_RANGE_LIMITED = 0x00,
+	HDMI_FC_AVICONF3_QUANT_RANGE_FULL = 0x04,
+
+/* FC_DBGFORCE field values */
+	HDMI_FC_DBGFORCE_FORCEAUDIO = 0x10,
+	HDMI_FC_DBGFORCE_FORCEVIDEO = 0x1,
+
+/* FC_DATAUTO0 field values */
+	HDMI_FC_DATAUTO0_VSD_MASK = 0x08,
+	HDMI_FC_DATAUTO0_VSD_OFFSET = 3,
+
+/* PHY_CONF0 field values */
+	HDMI_PHY_CONF0_PDZ_MASK = 0x80,
+	HDMI_PHY_CONF0_PDZ_OFFSET = 7,
+	HDMI_PHY_CONF0_ENTMDS_MASK = 0x40,
+	HDMI_PHY_CONF0_ENTMDS_OFFSET = 6,
+	HDMI_PHY_CONF0_SVSRET_MASK = 0x20,
+	HDMI_PHY_CONF0_SVSRET_OFFSET = 5,
+	HDMI_PHY_CONF0_GEN2_PDDQ_MASK = 0x10,
+	HDMI_PHY_CONF0_GEN2_PDDQ_OFFSET = 4,
+	HDMI_PHY_CONF0_GEN2_TXPWRON_MASK = 0x8,
+	HDMI_PHY_CONF0_GEN2_TXPWRON_OFFSET = 3,
+	HDMI_PHY_CONF0_GEN2_ENHPDRXSENSE_MASK = 0x4,
+	HDMI_PHY_CONF0_GEN2_ENHPDRXSENSE_OFFSET = 2,
+	HDMI_PHY_CONF0_SELDATAENPOL_MASK = 0x2,
+	HDMI_PHY_CONF0_SELDATAENPOL_OFFSET = 1,
+	HDMI_PHY_CONF0_SELDIPIF_MASK = 0x1,
+	HDMI_PHY_CONF0_SELDIPIF_OFFSET = 0,
+
+/* PHY_TST0 field values */
+	HDMI_PHY_TST0_TSTCLR_MASK = 0x20,
+	HDMI_PHY_TST0_TSTCLR_OFFSET = 5,
+	HDMI_PHY_TST0_TSTEN_MASK = 0x10,
+	HDMI_PHY_TST0_TSTEN_OFFSET = 4,
+	HDMI_PHY_TST0_TSTCLK_MASK = 0x1,
+	HDMI_PHY_TST0_TSTCLK_OFFSET = 0,
+
+/* PHY_STAT0 field values */
+	HDMI_PHY_RX_SENSE3 = 0x80,
+	HDMI_PHY_RX_SENSE2 = 0x40,
+	HDMI_PHY_RX_SENSE1 = 0x20,
+	HDMI_PHY_RX_SENSE0 = 0x10,
+	HDMI_PHY_HPD = 0x02,
+	HDMI_PHY_TX_PHY_LOCK = 0x01,
+
+/* PHY_I2CM_SLAVE_ADDR field values */
+	HDMI_PHY_I2CM_SLAVE_ADDR_PHY_GEN2 = 0x69,
+	HDMI_PHY_I2CM_SLAVE_ADDR_HEAC_PHY = 0x49,
+
+/* PHY_I2CM_OPERATION_ADDR field values */
+	HDMI_PHY_I2CM_OPERATION_ADDR_WRITE = 0x10,
+	HDMI_PHY_I2CM_OPERATION_ADDR_READ = 0x1,
+
+/* HDMI_PHY_I2CM_INT_ADDR */
+	HDMI_PHY_I2CM_INT_ADDR_DONE_POL = 0x08,
+	HDMI_PHY_I2CM_INT_ADDR_DONE_MASK = 0x04,
+
+/* HDMI_PHY_I2CM_CTLINT_ADDR */
+	HDMI_PHY_I2CM_CTLINT_ADDR_NAC_POL = 0x80,
+	HDMI_PHY_I2CM_CTLINT_ADDR_NAC_MASK = 0x40,
+	HDMI_PHY_I2CM_CTLINT_ADDR_ARBITRATION_POL = 0x08,
+	HDMI_PHY_I2CM_CTLINT_ADDR_ARBITRATION_MASK = 0x04,
+
+/* AUD_CONF0 field values */
+	HDMI_AUD_CONF0_SW_RESET = 0x80,
+	HDMI_AUD_CONF0_I2S_2CHANNEL_ENABLE = 0x21,
+	HDMI_AUD_CONF0_I2S_4CHANNEL_ENABLE = 0x23,
+	HDMI_AUD_CONF0_I2S_6CHANNEL_ENABLE = 0x27,
+	HDMI_AUD_CONF0_I2S_8CHANNEL_ENABLE = 0x2F,
+	HDMI_AUD_CONF0_I2S_ALL_ENABLE = 0x2F,
+
+/* AUD_INT field values */
+	HDMI_AUD_INT_FIFO_EMPTY_MSK = BIT(3),
+	HDMI_AUD_INT_FIFO_FULL_MSK = BIT(2),
+
+/* AUD_CONF1 field values */
+	HDMI_AUD_CONF1_MODE_I2S = 0x00,
+	HDMI_AUD_CONF1_MODE_RIGHT_J = 0x02,
+	HDMI_AUD_CONF1_MODE_LEFT_J = 0x04,
+	HDMI_AUD_CONF1_WIDTH_16 = 0x10,
+	HDMI_AUD_CONF1_WIDTH_21 = 0x15,
+	HDMI_AUD_CONF1_WIDTH_24 = 0x18,
+
+/* AUD_CONF2 filed values */
+	HDMI_AUD_CONF2_HBR = 0x1,
+	HDMI_AUD_CONF2_NLPCM = 0x2,
+	HDMI_AUD_CONF2_INSERT_PCUV = 0x04,
+
+/* AUD_CTS3 field values */
+	HDMI_AUD_CTS3_N_SHIFT_OFFSET = 5,
+	HDMI_AUD_CTS3_N_SHIFT_MASK = 0xe0,
+	HDMI_AUD_CTS3_N_SHIFT_1 = 0,
+	HDMI_AUD_CTS3_N_SHIFT_16 = 0x20,
+	HDMI_AUD_CTS3_N_SHIFT_32 = 0x40,
+	HDMI_AUD_CTS3_N_SHIFT_64 = 0x60,
+	HDMI_AUD_CTS3_N_SHIFT_128 = 0x80,
+	HDMI_AUD_CTS3_N_SHIFT_256 = 0xa0,
+	/* note that the CTS3 MANUAL bit has been removed from our part. */
+	HDMI_AUD_CTS3_CTS_MANUAL = 0x10,
+	HDMI_AUD_CTS3_AUDCTS19_16_MASK = 0x0f,
+
+/* HDMI_AUD_INPUTCLKFS field values */
+	HDMI_AUD_INPUTCLKFS_128FS = 0,
+	HDMI_AUD_INPUTCLKFS_256FS = 1,
+	HDMI_AUD_INPUTCLKFS_512FS = 2,
+	HDMI_AUD_INPUTCLKFS_64FS = 4,
+
+/* AHB_DMA_CONF0 field values */
+	HDMI_AHB_DMA_CONF0_SW_FIFO_RST_OFFSET = 7,
+	HDMI_AHB_DMA_CONF0_SW_FIFO_RST_MASK = 0x80,
+	HDMI_AHB_DMA_CONF0_HBR = 0x10,
+	HDMI_AHB_DMA_CONF0_EN_HLOCK_OFFSET = 3,
+	HDMI_AHB_DMA_CONF0_EN_HLOCK_MASK = 0x08,
+	HDMI_AHB_DMA_CONF0_INCR_TYPE_OFFSET = 1,
+	HDMI_AHB_DMA_CONF0_INCR_TYPE_MASK = 0x06,
+	HDMI_AHB_DMA_CONF0_INCR4 = 0x0,
+	HDMI_AHB_DMA_CONF0_INCR8 = 0x2,
+	HDMI_AHB_DMA_CONF0_INCR16 = 0x4,
+	HDMI_AHB_DMA_CONF0_BURST_MODE = 0x1,
+
+/* HDMI_AHB_DMA_START field values */
+	HDMI_AHB_DMA_START_START_OFFSET = 0,
+	HDMI_AHB_DMA_START_START_MASK = 0x01,
+
+/* HDMI_AHB_DMA_STOP field values */
+	HDMI_AHB_DMA_STOP_STOP_OFFSET = 0,
+	HDMI_AHB_DMA_STOP_STOP_MASK = 0x01,
+
+/* AHB_DMA_STAT, AHB_DMA_INT, AHB_DMA_MASK, AHB_DMA_POL field values */
+	HDMI_AHB_DMA_DONE = 0x80,
+	HDMI_AHB_DMA_RETRY_SPLIT = 0x40,
+	HDMI_AHB_DMA_LOSTOWNERSHIP = 0x20,
+	HDMI_AHB_DMA_ERROR = 0x10,
+	HDMI_AHB_DMA_FIFO_THREMPTY = 0x04,
+	HDMI_AHB_DMA_FIFO_FULL = 0x02,
+	HDMI_AHB_DMA_FIFO_EMPTY = 0x01,
+
+/* AHB_DMA_BUFFSTAT, AHB_DMA_BUFFINT,AHB_DMA_BUFFMASK,AHB_DMA_BUFFPOL values */
+	HDMI_AHB_DMA_BUFFSTAT_FULL = 0x02,
+	HDMI_AHB_DMA_BUFFSTAT_EMPTY = 0x01,
+
+/* MC_CLKDIS field values */
+	HDMI_MC_CLKDIS_HDCPCLK_DISABLE = 0x40,
+	HDMI_MC_CLKDIS_CECCLK_DISABLE = 0x20,
+	HDMI_MC_CLKDIS_CSCCLK_DISABLE = 0x10,
+	HDMI_MC_CLKDIS_AUDCLK_DISABLE = 0x8,
+	HDMI_MC_CLKDIS_PREPCLK_DISABLE = 0x4,
+	HDMI_MC_CLKDIS_TMDSCLK_DISABLE = 0x2,
+	HDMI_MC_CLKDIS_PIXELCLK_DISABLE = 0x1,
+
+/* MC_SWRSTZ field values */
+	HDMI_MC_SWRSTZ_TMDSSWRST_REQ = 0x02,
+
+/* MC_FLOWCTRL field values */
+	HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_MASK = 0x1,
+	HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_IN_PATH = 0x1,
+	HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_BYPASS = 0x0,
+
+/* MC_PHYRSTZ field values */
+	HDMI_MC_PHYRSTZ_PHYRSTZ = 0x01,
+
+/* MC_HEACPHY_RST field values */
+	HDMI_MC_HEACPHY_RST_ASSERT = 0x1,
+	HDMI_MC_HEACPHY_RST_DEASSERT = 0x0,
+
+/* CSC_CFG field values */
+	HDMI_CSC_CFG_INTMODE_MASK = 0x30,
+	HDMI_CSC_CFG_INTMODE_OFFSET = 4,
+	HDMI_CSC_CFG_INTMODE_DISABLE = 0x00,
+	HDMI_CSC_CFG_INTMODE_CHROMA_INT_FORMULA1 = 0x10,
+	HDMI_CSC_CFG_INTMODE_CHROMA_INT_FORMULA2 = 0x20,
+	HDMI_CSC_CFG_DECMODE_MASK = 0x3,
+	HDMI_CSC_CFG_DECMODE_OFFSET = 0,
+	HDMI_CSC_CFG_DECMODE_DISABLE = 0x0,
+	HDMI_CSC_CFG_DECMODE_CHROMA_INT_FORMULA1 = 0x1,
+	HDMI_CSC_CFG_DECMODE_CHROMA_INT_FORMULA2 = 0x2,
+	HDMI_CSC_CFG_DECMODE_CHROMA_INT_FORMULA3 = 0x3,
+
+/* CSC_SCALE field values */
+	HDMI_CSC_SCALE_CSC_COLORDE_PTH_MASK = 0xF0,
+	HDMI_CSC_SCALE_CSC_COLORDE_PTH_24BPP = 0x00,
+	HDMI_CSC_SCALE_CSC_COLORDE_PTH_30BPP = 0x50,
+	HDMI_CSC_SCALE_CSC_COLORDE_PTH_36BPP = 0x60,
+	HDMI_CSC_SCALE_CSC_COLORDE_PTH_48BPP = 0x70,
+	HDMI_CSC_SCALE_CSCSCALE_MASK = 0x03,
+
+/* A_HDCPCFG0 field values */
+	HDMI_A_HDCPCFG0_ELVENA_MASK = 0x80,
+	HDMI_A_HDCPCFG0_ELVENA_ENABLE = 0x80,
+	HDMI_A_HDCPCFG0_ELVENA_DISABLE = 0x00,
+	HDMI_A_HDCPCFG0_I2CFASTMODE_MASK = 0x40,
+	HDMI_A_HDCPCFG0_I2CFASTMODE_ENABLE = 0x40,
+	HDMI_A_HDCPCFG0_I2CFASTMODE_DISABLE = 0x00,
+	HDMI_A_HDCPCFG0_BYPENCRYPTION_MASK = 0x20,
+	HDMI_A_HDCPCFG0_BYPENCRYPTION_ENABLE = 0x20,
+	HDMI_A_HDCPCFG0_BYPENCRYPTION_DISABLE = 0x00,
+	HDMI_A_HDCPCFG0_SYNCRICHECK_MASK = 0x10,
+	HDMI_A_HDCPCFG0_SYNCRICHECK_ENABLE = 0x10,
+	HDMI_A_HDCPCFG0_SYNCRICHECK_DISABLE = 0x00,
+	HDMI_A_HDCPCFG0_AVMUTE_MASK = 0x8,
+	HDMI_A_HDCPCFG0_AVMUTE_ENABLE = 0x8,
+	HDMI_A_HDCPCFG0_AVMUTE_DISABLE = 0x0,
+	HDMI_A_HDCPCFG0_RXDETECT_MASK = 0x4,
+	HDMI_A_HDCPCFG0_RXDETECT_ENABLE = 0x4,
+	HDMI_A_HDCPCFG0_RXDETECT_DISABLE = 0x0,
+	HDMI_A_HDCPCFG0_EN11FEATURE_MASK = 0x2,
+	HDMI_A_HDCPCFG0_EN11FEATURE_ENABLE = 0x2,
+	HDMI_A_HDCPCFG0_EN11FEATURE_DISABLE = 0x0,
+	HDMI_A_HDCPCFG0_HDMIDVI_MASK = 0x1,
+	HDMI_A_HDCPCFG0_HDMIDVI_HDMI = 0x1,
+	HDMI_A_HDCPCFG0_HDMIDVI_DVI = 0x0,
+
+/* A_HDCPCFG1 field values */
+	HDMI_A_HDCPCFG1_DISSHA1CHECK_MASK = 0x8,
+	HDMI_A_HDCPCFG1_DISSHA1CHECK_DISABLE = 0x8,
+	HDMI_A_HDCPCFG1_DISSHA1CHECK_ENABLE = 0x0,
+	HDMI_A_HDCPCFG1_PH2UPSHFTENC_MASK = 0x4,
+	HDMI_A_HDCPCFG1_PH2UPSHFTENC_ENABLE = 0x4,
+	HDMI_A_HDCPCFG1_PH2UPSHFTENC_DISABLE = 0x0,
+	HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_MASK = 0x2,
+	HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_DISABLE = 0x2,
+	HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_ENABLE = 0x0,
+	HDMI_A_HDCPCFG1_SWRESET_MASK = 0x1,
+	HDMI_A_HDCPCFG1_SWRESET_ASSERT = 0x0,
+
+/* A_VIDPOLCFG field values */
+	HDMI_A_VIDPOLCFG_UNENCRYPTCONF_MASK = 0x60,
+	HDMI_A_VIDPOLCFG_UNENCRYPTCONF_OFFSET = 5,
+	HDMI_A_VIDPOLCFG_DATAENPOL_MASK = 0x10,
+	HDMI_A_VIDPOLCFG_DATAENPOL_ACTIVE_HIGH = 0x10,
+	HDMI_A_VIDPOLCFG_DATAENPOL_ACTIVE_LOW = 0x0,
+	HDMI_A_VIDPOLCFG_VSYNCPOL_MASK = 0x8,
+	HDMI_A_VIDPOLCFG_VSYNCPOL_ACTIVE_HIGH = 0x8,
+	HDMI_A_VIDPOLCFG_VSYNCPOL_ACTIVE_LOW = 0x0,
+	HDMI_A_VIDPOLCFG_HSYNCPOL_MASK = 0x2,
+	HDMI_A_VIDPOLCFG_HSYNCPOL_ACTIVE_HIGH = 0x2,
+	HDMI_A_VIDPOLCFG_HSYNCPOL_ACTIVE_LOW = 0x0,
+
+/* I2CM_OPERATION field values */
+	HDMI_I2CM_OPERATION_WRITE = 0x10,
+	HDMI_I2CM_OPERATION_READ8_EXT = 0x8,
+	HDMI_I2CM_OPERATION_READ8 = 0x4,
+	HDMI_I2CM_OPERATION_READ_EXT = 0x2,
+	HDMI_I2CM_OPERATION_READ = 0x1,
+
+/* I2CM_INT field values */
+	HDMI_I2CM_INT_DONE_POL = 0x8,
+	HDMI_I2CM_INT_DONE_MASK = 0x4,
+
+/* I2CM_CTLINT field values */
+	HDMI_I2CM_CTLINT_NAC_POL = 0x80,
+	HDMI_I2CM_CTLINT_NAC_MASK = 0x40,
+	HDMI_I2CM_CTLINT_ARB_POL = 0x8,
+	HDMI_I2CM_CTLINT_ARB_MASK = 0x4,
+
+/* I2CM_DIV field values */
+	HDMI_I2CM_DIV_FAST_STD_MODE = 0x8,
+	HDMI_I2CM_DIV_FAST_MODE = 0x8,
+	HDMI_I2CM_DIV_STD_MODE = 0,
+
+/* HDMI_MC_SWRSTZ filed values */
+	HDMI_MC_SWRSTZ_I2S_RESET_MSK = BIT(3),
+};
+
+/*
+ * HDMI 3D TX PHY registers
+ */
+#define HDMI_3D_TX_PHY_PWRCTRL			0x00
+#define HDMI_3D_TX_PHY_SERDIVCTRL		0x01
+#define HDMI_3D_TX_PHY_SERCKCTRL		0x02
+#define HDMI_3D_TX_PHY_SERCKKILLCTRL		0x03
+#define HDMI_3D_TX_PHY_TXRESCTRL		0x04
+#define HDMI_3D_TX_PHY_CKCALCTRL		0x05
+#define HDMI_3D_TX_PHY_CPCE_CTRL		0x06
+#define HDMI_3D_TX_PHY_TXCLKMEASCTRL		0x07
+#define HDMI_3D_TX_PHY_TXMEASCTRL		0x08
+#define HDMI_3D_TX_PHY_CKSYMTXCTRL		0x09
+#define HDMI_3D_TX_PHY_CMPSEQCTRL		0x0a
+#define HDMI_3D_TX_PHY_CMPPWRCTRL		0x0b
+#define HDMI_3D_TX_PHY_CMPMODECTRL		0x0c
+#define HDMI_3D_TX_PHY_MEASCTRL			0x0d
+#define HDMI_3D_TX_PHY_VLEVCTRL			0x0e
+#define HDMI_3D_TX_PHY_D2ACTRL			0x0f
+#define HDMI_3D_TX_PHY_CURRCTRL			0x10
+#define HDMI_3D_TX_PHY_DRVANACTRL		0x11
+#define HDMI_3D_TX_PHY_PLLMEASCTRL		0x12
+#define HDMI_3D_TX_PHY_PLLPHBYCTRL		0x13
+#define HDMI_3D_TX_PHY_GRP_CTRL			0x14
+#define HDMI_3D_TX_PHY_GMPCTRL			0x15
+#define HDMI_3D_TX_PHY_MPLLMEASCTRL		0x16
+#define HDMI_3D_TX_PHY_MSM_CTRL			0x17
+#define HDMI_3D_TX_PHY_SCRPB_STATUS		0x18
+#define HDMI_3D_TX_PHY_TXTERM			0x19
+#define HDMI_3D_TX_PHY_PTRPT_ENBL		0x1a
+#define HDMI_3D_TX_PHY_PATTERNGEN		0x1b
+#define HDMI_3D_TX_PHY_SDCAP_MODE		0x1c
+#define HDMI_3D_TX_PHY_SCOPEMODE		0x1d
+#define HDMI_3D_TX_PHY_DIGTXMODE		0x1e
+#define HDMI_3D_TX_PHY_STR_STATUS		0x1f
+#define HDMI_3D_TX_PHY_SCOPECNT0		0x20
+#define HDMI_3D_TX_PHY_SCOPECNT1		0x21
+#define HDMI_3D_TX_PHY_SCOPECNT2		0x22
+#define HDMI_3D_TX_PHY_SCOPECNTCLK		0x23
+#define HDMI_3D_TX_PHY_SCOPESAMPLE		0x24
+#define HDMI_3D_TX_PHY_SCOPECNTMSB01		0x25
+#define HDMI_3D_TX_PHY_SCOPECNTMSB2CK		0x26
+
+/* HDMI_3D_TX_PHY_CKCALCTRL values */
+#define HDMI_3D_TX_PHY_CKCALCTRL_OVERRIDE		BIT(15)
+
+/* HDMI_3D_TX_PHY_MSM_CTRL values */
+#define HDMI_3D_TX_PHY_MSM_CTRL_MPLL_PH_SEL_CK		BIT(13)
+#define HDMI_3D_TX_PHY_MSM_CTRL_CKO_SEL_CLK_REF_MPLL	(0 << 1)
+#define HDMI_3D_TX_PHY_MSM_CTRL_CKO_SEL_OFF		BIT(1)
+#define HDMI_3D_TX_PHY_MSM_CTRL_CKO_SEL_PCLK		(2 << 1)
+#define HDMI_3D_TX_PHY_MSM_CTRL_CKO_SEL_FB_CLK		(3 << 1)
+#define HDMI_3D_TX_PHY_MSM_CTRL_SCOPE_CK_SEL		BIT(0)
+
+/* HDMI_3D_TX_PHY_PTRPT_ENBL values */
+#define HDMI_3D_TX_PHY_PTRPT_ENBL_OVERRIDE		BIT(15)
+#define HDMI_3D_TX_PHY_PTRPT_ENBL_PG_SKIP_BIT2		BIT(8)
+#define HDMI_3D_TX_PHY_PTRPT_ENBL_PG_SKIP_BIT1		BIT(7)
+#define HDMI_3D_TX_PHY_PTRPT_ENBL_PG_SKIP_BIT0		BIT(6)
+#define HDMI_3D_TX_PHY_PTRPT_ENBL_CK_REF_ENB		BIT(5)
+#define HDMI_3D_TX_PHY_PTRPT_ENBL_RCAL_ENB		BIT(4)
+#define HDMI_3D_TX_PHY_PTRPT_ENBL_TX_CLK_ALIGN_ENB	BIT(3)
+#define HDMI_3D_TX_PHY_PTRPT_ENBL_TX_READY		BIT(2)
+#define HDMI_3D_TX_PHY_PTRPT_ENBL_CKO_WORD_ENB		BIT(1)
+#define HDMI_3D_TX_PHY_PTRPT_ENBL_REFCLK_ENB		BIT(0)
+
+#define HDMI_VIDEO_DEFAULT_MODE 4
+
+enum v4l2_ycbcr_encoding {
+	/*
+	 * Mapping of V4L2_YCBCR_ENC_DEFAULT to actual encodings for the
+	 * various colorspaces:
+	 *
+	 * V4L2_COLORSPACE_SMPTE170M, V4L2_COLORSPACE_470_SYSTEM_M,
+	 * V4L2_COLORSPACE_470_SYSTEM_BG, V4L2_COLORSPACE_ADOBERGB and
+	 * V4L2_COLORSPACE_JPEG: V4L2_YCBCR_ENC_601
+	 *
+	 * V4L2_COLORSPACE_REC709 and V4L2_COLORSPACE_DCI_P3: V4L2_YCBCR_ENC_709
+	 *
+	 * V4L2_COLORSPACE_SRGB: V4L2_YCBCR_ENC_SYCC
+	 *
+	 * V4L2_COLORSPACE_BT2020: V4L2_YCBCR_ENC_BT2020
+	 *
+	 * V4L2_COLORSPACE_SMPTE240M: V4L2_YCBCR_ENC_SMPTE240M
+	 */
+	V4L2_YCBCR_ENC_DEFAULT        = 0,
+
+	/* ITU-R 601 -- SDTV */
+	V4L2_YCBCR_ENC_601            = 1,
+
+	/* Rec. 709 -- HDTV */
+	V4L2_YCBCR_ENC_709            = 2,
+
+	/* ITU-R 601/EN 61966-2-4 Extended Gamut -- SDTV */
+	V4L2_YCBCR_ENC_XV601          = 3,
+
+	/* Rec. 709/EN 61966-2-4 Extended Gamut -- HDTV */
+	V4L2_YCBCR_ENC_XV709          = 4,
+
+	/* sYCC (Y'CbCr encoding of sRGB) */
+	V4L2_YCBCR_ENC_SYCC           = 5,
+
+	/* BT.2020 Non-constant Luminance Y'CbCr */
+	V4L2_YCBCR_ENC_BT2020         = 6,
+
+	/* BT.2020 Constant Luminance Y'CbcCrc */
+	V4L2_YCBCR_ENC_BT2020_CONST_LUM = 7,
+
+	/* SMPTE 240M -- Obsolete HDTV */
+	V4L2_YCBCR_ENC_SMPTE240M      = 8,
+};
+
+/* Color Space Conversion Mode */
+enum {
+	CSC_RGB_0_255_TO_RGB_16_235_8BIT,
+	CSC_RGB_0_255_TO_RGB_16_235_10BIT,
+	CSC_RGB_0_255_TO_ITU601_16_235_8BIT,
+	CSC_RGB_0_255_TO_ITU601_16_235_10BIT,
+	CSC_RGB_0_255_TO_ITU709_16_235_8BIT,
+	CSC_RGB_0_255_TO_ITU709_16_235_10BIT,
+	CSC_ITU601_16_235_TO_RGB_0_255_8BIT,
+	CSC_ITU709_16_235_TO_RGB_0_255_8BIT,
+	CSC_ITU601_16_235_TO_RGB_16_235_8BIT,
+	CSC_ITU709_16_235_TO_RGB_16_235_8BIT
+};
+
+enum drm_connector_status {
+	connector_status_disconnected = 0,
+	connector_status_connected = 1,
+};
+
+enum {
+	STANDARD_MODE = 0,
+	FAST_MODE
+};
+
+#endif /* _ROCKCHIP_HDMI_H_ */
diff --git a/drivers/video/drm/rockchip_dw_hdmi.c b/drivers/video/drm/rockchip_dw_hdmi.c
new file mode 100644
index 0000000000..d951d146ab
--- /dev/null
+++ b/drivers/video/drm/rockchip_dw_hdmi.c
@@ -0,0 +1,184 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm/device.h>
+#include <linux/dw_hdmi.h>
+#include "rockchip_display.h"
+#include "rockchip_crtc.h"
+#include "rockchip_connector.h"
+#include "dw_hdmi.h"
+#include "rockchip_dw_hdmi.h"
+
+#define HDMI_SEL_LCDC(x, bit)  ((((x) & 1) << bit) | (1 << (16 + bit)))
+#define RK3288_GRF_SOC_CON6		0x025C
+#define RK3288_HDMI_LCDC_SEL		BIT(4)
+#define RK3399_GRF_SOC_CON20		0x6250
+#define RK3399_HDMI_LCDC_SEL		BIT(6)
+
+static const struct dw_hdmi_mpll_config rockchip_mpll_cfg[] = {
+	{
+		30666000, {
+			{ 0x00b3, 0x0000 },
+			{ 0x2153, 0x0000 },
+			{ 0x40f3, 0x0000 },
+		},
+	},  {
+		36800000, {
+			{ 0x00b3, 0x0000 },
+			{ 0x2153, 0x0000 },
+			{ 0x40a2, 0x0001 },
+		},
+	},  {
+		46000000, {
+			{ 0x00b3, 0x0000 },
+			{ 0x2142, 0x0001 },
+			{ 0x40a2, 0x0001 },
+		},
+	},  {
+		61333000, {
+			{ 0x0072, 0x0001 },
+			{ 0x2142, 0x0001 },
+			{ 0x40a2, 0x0001 },
+		},
+	},  {
+		73600000, {
+			{ 0x0072, 0x0001 },
+			{ 0x2142, 0x0001 },
+			{ 0x4061, 0x0002 },
+		},
+	},  {
+		92000000, {
+			{ 0x0072, 0x0001 },
+			{ 0x2145, 0x0002 },
+			{ 0x4061, 0x0002 },
+		},
+	},  {
+		122666000, {
+			{ 0x0051, 0x0002 },
+			{ 0x2145, 0x0002 },
+			{ 0x4061, 0x0002 },
+		},
+	},  {
+		147200000, {
+			{ 0x0051, 0x0002 },
+			{ 0x2145, 0x0002 },
+			{ 0x4064, 0x0003 },
+		},
+	},  {
+		184000000, {
+			{ 0x0051, 0x0002 },
+			{ 0x214c, 0x0003 },
+			{ 0x4064, 0x0003 },
+		},
+	},  {
+		226666000, {
+			{ 0x0040, 0x0003 },
+			{ 0x214c, 0x0003 },
+			{ 0x4064, 0x0003 },
+		},
+	},  {
+		272000000, {
+			{ 0x0040, 0x0003 },
+			{ 0x214c, 0x0003 },
+			{ 0x5a64, 0x0003 },
+		},
+	},  {
+		340000000, {
+			{ 0x0040, 0x0003 },
+			{ 0x3b4c, 0x0003 },
+			{ 0x5a64, 0x0003 },
+		},
+	},  {
+		600000000, {
+			{ 0x1a40, 0x0003 },
+			{ 0x3b4c, 0x0003 },
+			{ 0x5a64, 0x0003 },
+		},
+	},  {
+		~0UL, {
+			{ 0x0000, 0x0000 },
+			{ 0x0000, 0x0000 },
+			{ 0x0000, 0x0000 },
+		},
+	}
+};
+
+static const struct dw_hdmi_curr_ctrl rockchip_cur_ctr[] = {
+	/*      pixelclk    bpp8    bpp10   bpp12 */
+	{
+		600000000, { 0x0000, 0x0000, 0x0000 },
+	},  {
+		~0UL,      { 0x0000, 0x0000, 0x0000},
+	}
+};
+
+static const struct dw_hdmi_phy_config rockchip_phy_config[] = {
+	/*pixelclk   symbol   term   vlev*/
+	{ 74250000,  0x8009, 0x0004, 0x0272},
+	{ 165000000, 0x802b, 0x0004, 0x0209},
+	{ 297000000, 0x8039, 0x0005, 0x028d},
+	{ 594000000, 0x8039, 0x0000, 0x019d},
+	{ ~0UL,	     0x0000, 0x0000, 0x0000}
+};
+
+static const struct rockchip_connector_funcs rockchip_dw_hdmi_funcs = {
+	.init = rockchip_dw_hdmi_init,
+	.deinit = rockchip_dw_hdmi_deinit,
+	.prepare = rockchip_dw_hdmi_prepare,
+	.enable = rockchip_dw_hdmi_enable,
+	.disable = rockchip_dw_hdmi_disable,
+	.get_timing = rockchip_dw_hdmi_get_timing,
+	.detect = rockchip_dw_hdmi_detect,
+	.get_edid = rockchip_dw_hdmi_get_edid,
+};
+
+static const struct dw_hdmi_plat_data rk3288_hdmi_drv_data = {
+	.vop_sel_bit = 4,
+	.grf_vop_sel_reg = RK3288_GRF_SOC_CON6,
+	.dev_type   = RK3288_HDMI,
+};
+
+static const struct dw_hdmi_plat_data rk3399_hdmi_drv_data = {
+	.vop_sel_bit = 6,
+	.grf_vop_sel_reg = RK3399_GRF_SOC_CON20,
+	.mpll_cfg   = rockchip_mpll_cfg,
+	.cur_ctr    = rockchip_cur_ctr,
+	.phy_config = rockchip_phy_config,
+	.dev_type   = RK3399_HDMI,
+};
+
+static const struct rockchip_connector rk3399_dw_hdmi_data = {
+	.funcs = &rockchip_dw_hdmi_funcs,
+	.data = &rk3399_hdmi_drv_data,
+};
+
+static const struct rockchip_connector rk3288_dw_hdmi_data = {
+	.funcs = &rockchip_dw_hdmi_funcs,
+	.data = &rk3288_hdmi_drv_data,
+};
+
+static int rockchip_dw_hdmi_probe(struct udevice *dev)
+{
+	return 0;
+}
+
+static const struct udevice_id rockchip_dw_hdmi_ids[] = {
+	{
+	 .compatible = "rockchip,rk3399-dw-hdmi",
+	 .data = (ulong)&rk3399_dw_hdmi_data,
+	}, {
+	 .compatible = "rockchip,rk3288-dw-hdmi",
+	 .data = (ulong)&rk3288_dw_hdmi_data,
+	}, {}
+};
+
+U_BOOT_DRIVER(rockchip_dw_hdmi) = {
+	.name = "rockchip_dw_hdmi",
+	.id = UCLASS_DISPLAY,
+	.of_match = rockchip_dw_hdmi_ids,
+	.probe	= rockchip_dw_hdmi_probe,
+};
diff --git a/drivers/video/drm/rockchip_dw_hdmi.h b/drivers/video/drm/rockchip_dw_hdmi.h
new file mode 100644
index 0000000000..bf09bbaa18
--- /dev/null
+++ b/drivers/video/drm/rockchip_dw_hdmi.h
@@ -0,0 +1,22 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#ifndef _ROCKCHIP_DW_HDMI_REG_H_
+#define _ROCKCHIP_DW_HDMI_REG_H_
+
+/*
+ * Rockchip connector callbacks.
+ * If you want to know the details, please refer to rockchip_connector.h
+ */
+int rockchip_dw_hdmi_init(struct display_state *state);
+void rockchip_dw_hdmi_deinit(struct display_state *state);
+int rockchip_dw_hdmi_prepare(struct display_state *state);
+int rockchip_dw_hdmi_enable(struct display_state *state);
+int rockchip_dw_hdmi_disable(struct display_state *state);
+int rockchip_dw_hdmi_get_timing(struct display_state *state);
+int rockchip_dw_hdmi_detect(struct display_state *state);
+int rockchip_dw_hdmi_get_edid(struct display_state *state);
+
+#endif /* _ROCKCHIP_DW_HDMI_REG_H_ */

commit 21016d27c500da4326bdc59cd3505fcd85d236db
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Mon Oct 30 14:45:52 2017 +0800

    common: edid: Add more detailed edid parsing
    
    The original edid parsing methods are too simple. The
    new parsing methods are carried from kernel.
    
    Change-Id: I28b9b14e1bc76c38366f41d23f0e01ac779780d0
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>

diff --git a/common/edid.c b/common/edid.c
index 9de7e2f92d..0eb8984021 100644
--- a/common/edid.c
+++ b/common/edid.c
@@ -8,15 +8,1257 @@
  *
  * Contains stolen code from ddcprobe project which is:
  * Copyright (C) Nalin Dahyabhai <bigfun@pobox.com>
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
  */
 
 #include <common.h>
+#include <compiler.h>
+#include <div64.h>
+#include <drm_modes.h>
 #include <edid.h>
 #include <errno.h>
 #include <fdtdec.h>
+#include <malloc.h>
+#include <linux/compat.h>
 #include <linux/ctype.h>
+#include <linux/fb.h>
+#include <linux/hdmi.h>
 #include <linux/string.h>
-#include <drm_modes.h>
+
+#define EDID_EST_TIMINGS 16
+#define EDID_STD_TIMINGS 8
+#define EDID_DETAILED_TIMINGS 4
+#define BITS_PER_LONG 64
+#define BIT_WORD(nr)             ((nr) / BITS_PER_LONG)
+#define BITMAP_FIRST_WORD_MASK(start) (~0UL << ((start) & (BITS_PER_LONG - 1)))
+#define BITMAP_LAST_WORD_MASK(nbits) (~0UL >> (-(nbits) & (BITS_PER_LONG - 1)))
+#define EDID_PRODUCT_ID(e) ((e)->prod_code[0] | ((e)->prod_code[1] << 8))
+#define version_greater(edid, maj, min) \
+	(((edid)->version > (maj)) || \
+	 ((edid)->version == (maj) && (edid)->revision > (min)))
+
+/*
+ * EDID blocks out in the wild have a variety of bugs, try to collect
+ * them here (note that userspace may work around broken monitors first,
+ * but fixes should make their way here so that the kernel "just works"
+ * on as many displays as possible).
+ */
+
+/* First detailed mode wrong, use largest 60Hz mode */
+#define EDID_QUIRK_PREFER_LARGE_60		BIT(0)
+/* Reported 135MHz pixel clock is too high, needs adjustment */
+#define EDID_QUIRK_135_CLOCK_TOO_HIGH		BIT(1)
+/* Prefer the largest mode at 75 Hz */
+#define EDID_QUIRK_PREFER_LARGE_75		BIT(2)
+/* Detail timing is in cm not mm */
+#define EDID_QUIRK_DETAILED_IN_CM		BIT(3)
+/* Detailed timing descriptors have bogus size values, so just take the
+ * maximum size and use that.
+ */
+#define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE	BIT(4)
+/* Monitor forgot to set the first detailed is preferred bit. */
+#define EDID_QUIRK_FIRST_DETAILED_PREFERRED	BIT(5)
+/* use +hsync +vsync for detailed mode */
+#define EDID_QUIRK_DETAILED_SYNC_PP		BIT(6)
+/* Force reduced-blanking timings for detailed modes */
+#define EDID_QUIRK_FORCE_REDUCED_BLANKING	BIT(7)
+/* Force 8bpc */
+#define EDID_QUIRK_FORCE_8BPC			BIT(8)
+/* Force 12bpc */
+#define EDID_QUIRK_FORCE_12BPC			BIT(9)
+/* Force 6bpc */
+#define EDID_QUIRK_FORCE_6BPC			BIT(10)
+/* Force 10bpc */
+#define EDID_QUIRK_FORCE_10BPC			BIT(11)
+
+struct detailed_mode_closure {
+	struct edid *edid;
+	struct hdmi_edid_data *data;
+	u32 quirks;
+	int modes;
+};
+
+#define LEVEL_DMT	0
+#define LEVEL_GTF	1
+#define LEVEL_GTF2	2
+#define LEVEL_CVT	3
+
+static struct edid_quirk {
+	char vendor[4];
+	int product_id;
+	u32 quirks;
+} edid_quirk_list[] = {
+	/* Acer AL1706 */
+	{ "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
+	/* Acer F51 */
+	{ "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
+	/* Unknown Acer */
+	{ "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
+
+	/* AEO model 0 reports 8 bpc, but is a 6 bpc panel */
+	{ "AEO", 0, EDID_QUIRK_FORCE_6BPC },
+
+	/* Belinea 10 15 55 */
+	{ "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
+	{ "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
+
+	/* Envision Peripherals, Inc. EN-7100e */
+	{ "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
+	/* Envision EN2028 */
+	{ "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
+
+	/* Funai Electronics PM36B */
+	{ "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
+	  EDID_QUIRK_DETAILED_IN_CM },
+
+	/* LGD panel of HP zBook 17 G2, eDP 10 bpc, but reports unknown bpc */
+	{ "LGD", 764, EDID_QUIRK_FORCE_10BPC },
+
+	/* LG Philips LCD LP154W01-A5 */
+	{ "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
+	{ "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
+
+	/* Philips 107p5 CRT */
+	{ "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
+
+	/* Proview AY765C */
+	{ "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
+
+	/* Samsung SyncMaster 205BW.  Note: irony */
+	{ "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
+	/* Samsung SyncMaster 22[5-6]BW */
+	{ "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
+	{ "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
+
+	/* Sony PVM-2541A does up to 12 bpc, but only reports max 8 bpc */
+	{ "SNY", 0x2541, EDID_QUIRK_FORCE_12BPC },
+
+	/* ViewSonic VA2026w */
+	{ "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING },
+
+	/* Medion MD 30217 PG */
+	{ "MED", 0x7b8, EDID_QUIRK_PREFER_LARGE_75 },
+
+	/* Panel in Samsung NP700G7A-S01PL notebook reports 6bpc */
+	{ "SEC", 0xd033, EDID_QUIRK_FORCE_8BPC },
+
+	/* Rotel RSX-1058 forwards sink's EDID but only does HDMI 1.1*/
+	{ "ETR", 13896, EDID_QUIRK_FORCE_8BPC },
+};
+
+/*
+ * Probably taken from CEA-861 spec.
+ * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c.
+ *
+ * Index using the VIC.
+ */
+static const struct drm_display_mode edid_cea_modes[] = {
+	/* 0 - dummy, VICs start at 1 */
+	{ },
+	/* 1 - 640x480@60Hz */
+	{ DRM_MODE(25175, 640, 656,
+		   752, 800, 480, 490, 492, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 2 - 720x480@60Hz */
+	{ DRM_MODE(27000, 720, 736,
+		   798, 858, 480, 489, 495, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 3 - 720x480@60Hz */
+	{ DRM_MODE(27000, 720, 736,
+		   798, 858, 480, 489, 495, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 4 - 1280x720@60Hz */
+	{ DRM_MODE(74250, 1280, 1390,
+		   1430, 1650, 720, 725, 730, 750, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 5 - 1920x1080i@60Hz */
+	{ DRM_MODE(74250, 1920, 2008,
+		   2052, 2200, 1080, 1084, 1094, 1125, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
+			DRM_MODE_FLAG_INTERLACE),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 6 - 720(1440)x480i@60Hz */
+	{ DRM_MODE(13500, 720, 739,
+		   801, 858, 480, 488, 494, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 7 - 720(1440)x480i@60Hz */
+	{ DRM_MODE(13500, 720, 739,
+		   801, 858, 480, 488, 494, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 8 - 720(1440)x240@60Hz */
+	{ DRM_MODE(13500, 720, 739,
+		   801, 858, 240, 244, 247, 262, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_DBLCLK),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 9 - 720(1440)x240@60Hz */
+	{ DRM_MODE(13500, 720, 739,
+		   801, 858, 240, 244, 247, 262, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_DBLCLK),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 10 - 2880x480i@60Hz */
+	{ DRM_MODE(54000, 2880, 2956,
+		   3204, 3432, 480, 488, 494, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_INTERLACE),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 11 - 2880x480i@60Hz */
+	{ DRM_MODE(54000, 2880, 2956,
+		   3204, 3432, 480, 488, 494, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_INTERLACE),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 12 - 2880x240@60Hz */
+	{ DRM_MODE(54000, 2880, 2956,
+		   3204, 3432, 240, 244, 247, 262, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 13 - 2880x240@60Hz */
+	{ DRM_MODE(54000, 2880, 2956,
+		   3204, 3432, 240, 244, 247, 262, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 14 - 1440x480@60Hz */
+	{ DRM_MODE(54000, 1440, 1472,
+		   1596, 1716, 480, 489, 495, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 15 - 1440x480@60Hz */
+	{ DRM_MODE(54000, 1440, 1472,
+		   1596, 1716, 480, 489, 495, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 16 - 1920x1080@60Hz */
+	{ DRM_MODE(148500, 1920, 2008,
+		   2052, 2200, 1080, 1084, 1089, 1125, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 17 - 720x576@50Hz */
+	{ DRM_MODE(27000, 720, 732,
+		   796, 864, 576, 581, 586, 625, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 18 - 720x576@50Hz */
+	{ DRM_MODE(27000, 720, 732,
+		   796, 864, 576, 581, 586, 625, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 19 - 1280x720@50Hz */
+	{ DRM_MODE(74250, 1280, 1720,
+		   1760, 1980, 720, 725, 730, 750, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 20 - 1920x1080i@50Hz */
+	{ DRM_MODE(74250, 1920, 2448,
+		   2492, 2640, 1080, 1084, 1094, 1125, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
+			DRM_MODE_FLAG_INTERLACE),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 21 - 720(1440)x576i@50Hz */
+	{ DRM_MODE(13500, 720, 732,
+		   795, 864, 576, 580, 586, 625, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 22 - 720(1440)x576i@50Hz */
+	{ DRM_MODE(13500, 720, 732,
+		   795, 864, 576, 580, 586, 625, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 23 - 720(1440)x288@50Hz */
+	{ DRM_MODE(13500, 720, 732,
+		   795, 864, 288, 290, 293, 312, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_DBLCLK),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 24 - 720(1440)x288@50Hz */
+	{ DRM_MODE(13500, 720, 732,
+		   795, 864, 288, 290, 293, 312, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_DBLCLK),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 25 - 2880x576i@50Hz */
+	{ DRM_MODE(54000, 2880, 2928,
+		   3180, 3456, 576, 580, 586, 625, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_INTERLACE),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 26 - 2880x576i@50Hz */
+	{ DRM_MODE(54000, 2880, 2928,
+		   3180, 3456, 576, 580, 586, 625, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_INTERLACE),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 27 - 2880x288@50Hz */
+	{ DRM_MODE(54000, 2880, 2928,
+		   3180, 3456, 288, 290, 293, 312, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 28 - 2880x288@50Hz */
+	{ DRM_MODE(54000, 2880, 2928,
+		   3180, 3456, 288, 290, 293, 312, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 29 - 1440x576@50Hz */
+	{ DRM_MODE(54000, 1440, 1464,
+		   1592, 1728, 576, 581, 586, 625, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 30 - 1440x576@50Hz */
+	{ DRM_MODE(54000, 1440, 1464,
+		   1592, 1728, 576, 581, 586, 625, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 31 - 1920x1080@50Hz */
+	{ DRM_MODE(148500, 1920, 2448,
+		   2492, 2640, 1080, 1084, 1089, 1125, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 32 - 1920x1080@24Hz */
+	{ DRM_MODE(74250, 1920, 2558,
+		   2602, 2750, 1080, 1084, 1089, 1125, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 33 - 1920x1080@25Hz */
+	{ DRM_MODE(74250, 1920, 2448,
+		   2492, 2640, 1080, 1084, 1089, 1125, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 34 - 1920x1080@30Hz */
+	{ DRM_MODE(74250, 1920, 2008,
+		   2052, 2200, 1080, 1084, 1089, 1125, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 35 - 2880x480@60Hz */
+	{ DRM_MODE(108000, 2880, 2944,
+		   3192, 3432, 480, 489, 495, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 36 - 2880x480@60Hz */
+	{ DRM_MODE(108000, 2880, 2944,
+		   3192, 3432, 480, 489, 495, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 37 - 2880x576@50Hz */
+	{ DRM_MODE(108000, 2880, 2928,
+		   3184, 3456, 576, 581, 586, 625, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 38 - 2880x576@50Hz */
+	{ DRM_MODE(108000, 2880, 2928,
+		   3184, 3456, 576, 581, 586, 625, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 39 - 1920x1080i@50Hz */
+	{ DRM_MODE(72000, 1920, 1952,
+		   2120, 2304, 1080, 1126, 1136, 1250, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_INTERLACE),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 40 - 1920x1080i@100Hz */
+	{ DRM_MODE(148500, 1920, 2448,
+		   2492, 2640, 1080, 1084, 1094, 1125, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
+			DRM_MODE_FLAG_INTERLACE),
+	  .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 41 - 1280x720@100Hz */
+	{ DRM_MODE(148500, 1280, 1720,
+		   1760, 1980, 720, 725, 730, 750, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 42 - 720x576@100Hz */
+	{ DRM_MODE(54000, 720, 732,
+		   796, 864, 576, 581, 586, 625, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 43 - 720x576@100Hz */
+	{ DRM_MODE(54000, 720, 732,
+		   796, 864, 576, 581, 586, 625, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 44 - 720(1440)x576i@100Hz */
+	{ DRM_MODE(27000, 720, 732,
+		   795, 864, 576, 580, 586, 625, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
+	  .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 45 - 720(1440)x576i@100Hz */
+	{ DRM_MODE(27000, 720, 732,
+		   795, 864, 576, 580, 586, 625, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
+	  .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 46 - 1920x1080i@120Hz */
+	{ DRM_MODE(148500, 1920, 2008,
+		   2052, 2200, 1080, 1084, 1094, 1125, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
+			DRM_MODE_FLAG_INTERLACE),
+	  .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 47 - 1280x720@120Hz */
+	{ DRM_MODE(148500, 1280, 1390,
+		   1430, 1650, 720, 725, 730, 750, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 48 - 720x480@120Hz */
+	{ DRM_MODE(54000, 720, 736,
+		   798, 858, 480, 489, 495, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 49 - 720x480@120Hz */
+	{ DRM_MODE(54000, 720, 736,
+		   798, 858, 480, 489, 495, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 50 - 720(1440)x480i@120Hz */
+	{ DRM_MODE(27000, 720, 739,
+		   801, 858, 480, 488, 494, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
+	  .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 51 - 720(1440)x480i@120Hz */
+	{ DRM_MODE(27000, 720, 739,
+		   801, 858, 480, 488, 494, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
+	  .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 52 - 720x576@200Hz */
+	{ DRM_MODE(108000, 720, 732,
+		   796, 864, 576, 581, 586, 625, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 53 - 720x576@200Hz */
+	{ DRM_MODE(108000, 720, 732,
+		   796, 864, 576, 581, 586, 625, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 54 - 720(1440)x576i@200Hz */
+	{ DRM_MODE(54000, 720, 732,
+		   795, 864, 576, 580, 586, 625, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
+	  .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 55 - 720(1440)x576i@200Hz */
+	{ DRM_MODE(54000, 720, 732,
+		   795, 864, 576, 580, 586, 625, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
+	  .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 56 - 720x480@240Hz */
+	{ DRM_MODE(108000, 720, 736,
+		   798, 858, 480, 489, 495, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 57 - 720x480@240Hz */
+	{ DRM_MODE(108000, 720, 736,
+		   798, 858, 480, 489, 495, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 58 - 720(1440)x480i@240 */
+	{ DRM_MODE(54000, 720, 739,
+		   801, 858, 480, 488, 494, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
+	  .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 59 - 720(1440)x480i@240 */
+	{ DRM_MODE(54000, 720, 739,
+		   801, 858, 480, 488, 494, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
+	  .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 60 - 1280x720@24Hz */
+	{ DRM_MODE(59400, 1280, 3040,
+		   3080, 3300, 720, 725, 730, 750, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 61 - 1280x720@25Hz */
+	{ DRM_MODE(74250, 1280, 3700,
+		   3740, 3960, 720, 725, 730, 750, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 62 - 1280x720@30Hz */
+	{ DRM_MODE(74250, 1280, 3040,
+		   3080, 3300, 720, 725, 730, 750, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 63 - 1920x1080@120Hz */
+	{ DRM_MODE(297000, 1920, 2008,
+		   2052, 2200, 1080, 1084, 1089, 1125, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 64 - 1920x1080@100Hz */
+	{ DRM_MODE(297000, 1920, 2448,
+		   2492, 2640, 1080, 1084, 1089, 1125, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 65 - 1280x720@24Hz */
+	{ DRM_MODE(59400, 1280, 3040,
+		   3080, 3300, 720, 725, 730, 750, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 66 - 1280x720@25Hz */
+	{ DRM_MODE(74250, 1280, 3700,
+		   3740, 3960, 720, 725, 730, 750, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 67 - 1280x720@30Hz */
+	{ DRM_MODE(74250, 1280, 3040,
+		   3080, 3300, 720, 725, 730, 750, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 68 - 1280x720@50Hz */
+	{ DRM_MODE(74250, 1280, 1720,
+		   1760, 1980, 720, 725, 730, 750, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 69 - 1280x720@60Hz */
+	{ DRM_MODE(74250, 1280, 1390,
+		   1430, 1650, 720, 725, 730, 750, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 70 - 1280x720@100Hz */
+	{ DRM_MODE(148500, 1280, 1720,
+		   1760, 1980, 720, 725, 730, 750, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 71 - 1280x720@120Hz */
+	{ DRM_MODE(148500, 1280, 1390,
+		   1430, 1650, 720, 725, 730, 750, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 72 - 1920x1080@24Hz */
+	{ DRM_MODE(74250, 1920, 2558,
+		   2602, 2750, 1080, 1084, 1089, 1125, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 73 - 1920x1080@25Hz */
+	{ DRM_MODE(74250, 1920, 2448,
+		   2492, 2640, 1080, 1084, 1089, 1125, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 74 - 1920x1080@30Hz */
+	{ DRM_MODE(74250, 1920, 2008,
+		   2052, 2200, 1080, 1084, 1089, 1125, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 75 - 1920x1080@50Hz */
+	{ DRM_MODE(148500, 1920, 2448,
+		   2492, 2640, 1080, 1084, 1089, 1125, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 76 - 1920x1080@60Hz */
+	{ DRM_MODE(148500, 1920, 2008,
+		   2052, 2200, 1080, 1084, 1089, 1125, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 77 - 1920x1080@100Hz */
+	{ DRM_MODE(297000, 1920, 2448,
+		   2492, 2640, 1080, 1084, 1089, 1125, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 78 - 1920x1080@120Hz */
+	{ DRM_MODE(297000, 1920, 2008,
+		   2052, 2200, 1080, 1084, 1089, 1125, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 79 - 1680x720@24Hz */
+	{ DRM_MODE(59400, 1680, 3040,
+		3080, 3300, 720, 725, 730, 750, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 80 - 1680x720@25Hz */
+	{ DRM_MODE(59400, 1680, 2908,
+		2948, 3168, 720, 725, 730, 750, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 81 - 1680x720@30Hz */
+	{ DRM_MODE(59400, 1680, 2380,
+		2420, 2640, 720, 725, 730, 750, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 82 - 1680x720@50Hz */
+	{ DRM_MODE(82500, 1680, 1940,
+		1980, 2200, 720, 725, 730, 750, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 83 - 1680x720@60Hz */
+	{ DRM_MODE(99000, 1680, 1940,
+		1980, 2200, 720, 725, 730, 750, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 84 - 1680x720@100Hz */
+	{ DRM_MODE(165000, 1680, 1740,
+		1780, 2000, 720, 725, 730, 825, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 85 - 1680x720@120Hz */
+	{ DRM_MODE(198000, 1680, 1740,
+		1780, 2000, 720, 725, 730, 825, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 86 - 2560x1080@24Hz */
+	{ DRM_MODE(99000, 2560, 3558,
+		3602, 3750, 1080, 1084, 1089, 1100, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 87 - 2560x1080@25Hz */
+	{ DRM_MODE(90000, 2560, 3008,
+		3052, 3200, 1080, 1084, 1089, 1125, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 88 - 2560x1080@30Hz */
+	{ DRM_MODE(118800, 2560, 3328,
+		3372, 3520, 1080, 1084, 1089, 1125, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 89 - 2560x1080@50Hz */
+	{ DRM_MODE(185625, 2560, 3108,
+		3152, 3300, 1080, 1084, 1089, 1125, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 90 - 2560x1080@60Hz */
+	{ DRM_MODE(198000, 2560, 2808,
+		2852, 3000, 1080, 1084, 1089, 1100, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 91 - 2560x1080@100Hz */
+	{ DRM_MODE(371250, 2560, 2778,
+		2822, 2970, 1080, 1084, 1089, 1250, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 92 - 2560x1080@120Hz */
+	{ DRM_MODE(495000, 2560, 3108,
+		3152, 3300, 1080, 1084, 1089, 1250, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 93 - 3840x2160p@24Hz 16:9 */
+	{ DRM_MODE(297000, 3840, 5116,
+		5204, 5500, 2160, 2168, 2178, 2250, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 94 - 3840x2160p@25Hz 16:9 */
+	{ DRM_MODE(297000, 3840, 4896,
+		4984, 5280, 2160, 2168, 2178, 2250, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 95 - 3840x2160p@30Hz 16:9 */
+	{ DRM_MODE(297000, 3840, 4016,
+		4104, 4400, 2160, 2168, 2178, 2250, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 96 - 3840x2160p@50Hz 16:9 */
+	{ DRM_MODE(594000, 3840, 4896,
+		4984, 5280, 2160, 2168, 2178, 2250, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 97 - 3840x2160p@60Hz 16:9 */
+	{ DRM_MODE(594000, 3840, 4016,
+		4104, 4400, 2160, 2168, 2178, 2250, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 98 - 4096x2160p@24Hz 256:135 */
+	{ DRM_MODE(297000, 4096, 5116,
+		5204, 5500, 2160, 2168, 2178, 2250, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
+	/* 99 - 4096x2160p@25Hz 256:135 */
+	{ DRM_MODE(297000, 4096, 5064,
+		5152, 5280, 2160, 2168, 2178, 2250, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
+	/* 100 - 4096x2160p@30Hz 256:135 */
+	{ DRM_MODE(297000, 4096, 4184,
+		4272, 4400, 2160, 2168, 2178, 2250, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
+	/* 101 - 4096x2160p@50Hz 256:135 */
+	{ DRM_MODE(594000, 4096, 5064,
+		5152, 5280, 2160, 2168, 2178, 2250, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
+	/* 102 - 4096x2160p@60Hz 256:135 */
+	{ DRM_MODE(594000, 4096, 4184,
+		4272, 4400, 2160, 2168, 2178, 2250, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
+	/* 103 - 3840x2160p@24Hz 64:27 */
+	{ DRM_MODE(297000, 3840, 5116,
+		5204, 5500, 2160, 2168, 2178, 2250, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 104 - 3840x2160p@25Hz 64:27 */
+	{ DRM_MODE(297000, 3840, 4016,
+		4104, 4400, 2160, 2168, 2178, 2250, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 105 - 3840x2160p@30Hz 64:27 */
+	{ DRM_MODE(297000, 3840, 4016,
+		4104, 4400, 2160, 2168, 2178, 2250, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 106 - 3840x2160p@50Hz 64:27 */
+	{ DRM_MODE(594000, 3840, 4896,
+		4984, 5280, 2160, 2168, 2178, 2250, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 107 - 3840x2160p@60Hz 64:27 */
+	{ DRM_MODE(594000, 3840, 4016,
+		4104, 4400, 2160, 2168, 2178, 2250, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+};
+
+/*
+ * HDMI 1.4 4k modes. Index using the VIC.
+ */
+static const struct drm_display_mode edid_4k_modes[] = {
+	/* 0 - dummy, VICs start at 1 */
+	{ },
+	/* 1 - 3840x2160@30Hz */
+	{ DRM_MODE(297000,
+		   3840, 4016, 4104, 4400,
+		   2160, 2168, 2178, 2250, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 30, },
+	/* 2 - 3840x2160@25Hz */
+	{ DRM_MODE(297000,
+		   3840, 4896, 4984, 5280,
+		   2160, 2168, 2178, 2250, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 25, },
+	/* 3 - 3840x2160@24Hz */
+	{ DRM_MODE(297000,
+		   3840, 5116, 5204, 5500,
+		   2160, 2168, 2178, 2250, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 24, },
+	/* 4 - 4096x2160@24Hz (SMPTE) */
+	{ DRM_MODE(297000,
+		   4096, 5116, 5204, 5500,
+		   2160, 2168, 2178, 2250, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 24, },
+};
+
+/*
+ * Autogenerated from the DMT spec.
+ * This table is copied from xfree86/modes/xf86EdidModes.c.
+ */
+static const struct drm_display_mode drm_dmt_modes[] = {
+	/* 0x01 - 640x350@85Hz */
+	{ DRM_MODE(31500, 640, 672,
+		   736, 832, 350, 382, 385, 445, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x02 - 640x400@85Hz */
+	{ DRM_MODE(31500, 640, 672,
+		   736, 832, 400, 401, 404, 445, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x03 - 720x400@85Hz */
+	{ DRM_MODE(35500, 720, 756,
+		   828, 936, 400, 401, 404, 446, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x04 - 640x480@60Hz */
+	{ DRM_MODE(25175, 640, 656,
+		   752, 800, 480, 490, 492, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x05 - 640x480@72Hz */
+	{ DRM_MODE(31500, 640, 664,
+		   704, 832, 480, 489, 492, 520, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x06 - 640x480@75Hz */
+	{ DRM_MODE(31500, 640, 656,
+		   720, 840, 480, 481, 484, 500, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x07 - 640x480@85Hz */
+	{ DRM_MODE(36000, 640, 696,
+		   752, 832, 480, 481, 484, 509, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x08 - 800x600@56Hz */
+	{ DRM_MODE(36000, 800, 824,
+		   896, 1024, 600, 601, 603, 625, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x09 - 800x600@60Hz */
+	{ DRM_MODE(40000, 800, 840,
+		   968, 1056, 600, 601, 605, 628, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x0a - 800x600@72Hz */
+	{ DRM_MODE(50000, 800, 856,
+		   976, 1040, 600, 637, 643, 666, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x0b - 800x600@75Hz */
+	{ DRM_MODE(49500, 800, 816,
+		   896, 1056, 600, 601, 604, 625, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x0c - 800x600@85Hz */
+	{ DRM_MODE(56250, 800, 832,
+		   896, 1048, 600, 601, 604, 631, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x0d - 800x600@120Hz RB */
+	{ DRM_MODE(73250, 800, 848,
+		   880, 960, 600, 603, 607, 636, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x0e - 848x480@60Hz */
+	{ DRM_MODE(33750, 848, 864,
+		   976, 1088, 480, 486, 494, 517, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x0f - 1024x768@43Hz, interlace */
+	{ DRM_MODE(44900, 1024, 1032,
+		   1208, 1264, 768, 768, 772, 817, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
+		   DRM_MODE_FLAG_INTERLACE) },
+	/* 0x10 - 1024x768@60Hz */
+	{ DRM_MODE(65000, 1024, 1048,
+		   1184, 1344, 768, 771, 777, 806, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x11 - 1024x768@70Hz */
+	{ DRM_MODE(75000, 1024, 1048,
+		   1184, 1328, 768, 771, 777, 806, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x12 - 1024x768@75Hz */
+	{ DRM_MODE(78750, 1024, 1040,
+		   1136, 1312, 768, 769, 772, 800, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x13 - 1024x768@85Hz */
+	{ DRM_MODE(94500, 1024, 1072,
+		   1168, 1376, 768, 769, 772, 808, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x14 - 1024x768@120Hz RB */
+	{ DRM_MODE(115500, 1024, 1072,
+		   1104, 1184, 768, 771, 775, 813, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x15 - 1152x864@75Hz */
+	{ DRM_MODE(108000, 1152, 1216,
+		   1344, 1600, 864, 865, 868, 900, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x55 - 1280x720@60Hz */
+	{ DRM_MODE(74250, 1280, 1390,
+		   1430, 1650, 720, 725, 730, 750, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x16 - 1280x768@60Hz RB */
+	{ DRM_MODE(68250, 1280, 1328,
+		   1360, 1440, 768, 771, 778, 790, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x17 - 1280x768@60Hz */
+	{ DRM_MODE(79500, 1280, 1344,
+		   1472, 1664, 768, 771, 778, 798, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x18 - 1280x768@75Hz */
+	{ DRM_MODE(102250, 1280, 1360,
+		   1488, 1696, 768, 771, 778, 805, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x19 - 1280x768@85Hz */
+	{ DRM_MODE(117500, 1280, 1360,
+		   1496, 1712, 768, 771, 778, 809, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x1a - 1280x768@120Hz RB */
+	{ DRM_MODE(140250, 1280, 1328,
+		   1360, 1440, 768, 771, 778, 813, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x1b - 1280x800@60Hz RB */
+	{ DRM_MODE(71000, 1280, 1328,
+		   1360, 1440, 800, 803, 809, 823, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x1c - 1280x800@60Hz */
+	{ DRM_MODE(83500, 1280, 1352,
+		   1480, 1680, 800, 803, 809, 831, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x1d - 1280x800@75Hz */
+	{ DRM_MODE(106500, 1280, 1360,
+		   1488, 1696, 800, 803, 809, 838, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x1e - 1280x800@85Hz */
+	{ DRM_MODE(122500, 1280, 1360,
+		   1496, 1712, 800, 803, 809, 843, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x1f - 1280x800@120Hz RB */
+	{ DRM_MODE(146250, 1280, 1328,
+		   1360, 1440, 800, 803, 809, 847, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x20 - 1280x960@60Hz */
+	{ DRM_MODE(108000, 1280, 1376,
+		   1488, 1800, 960, 961, 964, 1000, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x21 - 1280x960@85Hz */
+	{ DRM_MODE(148500, 1280, 1344,
+		   1504, 1728, 960, 961, 964, 1011, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x22 - 1280x960@120Hz RB */
+	{ DRM_MODE(175500, 1280, 1328,
+		   1360, 1440, 960, 963, 967, 1017, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x23 - 1280x1024@60Hz */
+	{ DRM_MODE(108000, 1280, 1328,
+		   1440, 1688, 1024, 1025, 1028, 1066, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x24 - 1280x1024@75Hz */
+	{ DRM_MODE(135000, 1280, 1296,
+		   1440, 1688, 1024, 1025, 1028, 1066, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x25 - 1280x1024@85Hz */
+	{ DRM_MODE(157500, 1280, 1344,
+		   1504, 1728, 1024, 1025, 1028, 1072, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x26 - 1280x1024@120Hz RB */
+	{ DRM_MODE(187250, 1280, 1328,
+		   1360, 1440, 1024, 1027, 1034, 1084, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x27 - 1360x768@60Hz */
+	{ DRM_MODE(85500, 1360, 1424,
+		   1536, 1792, 768, 771, 777, 795, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x28 - 1360x768@120Hz RB */
+	{ DRM_MODE(148250, 1360, 1408,
+		   1440, 1520, 768, 771, 776, 813, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x51 - 1366x768@60Hz */
+	{ DRM_MODE(85500, 1366, 1436,
+		   1579, 1792, 768, 771, 774, 798, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x56 - 1366x768@60Hz */
+	{ DRM_MODE(72000, 1366, 1380,
+		   1436, 1500, 768, 769, 772, 800, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x29 - 1400x1050@60Hz RB */
+	{ DRM_MODE(101000, 1400, 1448,
+		   1480, 1560, 1050, 1053, 1057, 1080, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x2a - 1400x1050@60Hz */
+	{ DRM_MODE(121750, 1400, 1488,
+		   1632, 1864, 1050, 1053, 1057, 1089, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x2b - 1400x1050@75Hz */
+	{ DRM_MODE(156000, 1400, 1504,
+		   1648, 1896, 1050, 1053, 1057, 1099, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x2c - 1400x1050@85Hz */
+	{ DRM_MODE(179500, 1400, 1504,
+		   1656, 1912, 1050, 1053, 1057, 1105, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x2d - 1400x1050@120Hz RB */
+	{ DRM_MODE(208000, 1400, 1448,
+		   1480, 1560, 1050, 1053, 1057, 1112, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x2e - 1440x900@60Hz RB */
+	{ DRM_MODE(88750, 1440, 1488,
+		   1520, 1600, 900, 903, 909, 926, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x2f - 1440x900@60Hz */
+	{ DRM_MODE(106500, 1440, 1520,
+		   1672, 1904, 900, 903, 909, 934, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x30 - 1440x900@75Hz */
+	{ DRM_MODE(136750, 1440, 1536,
+		   1688, 1936, 900, 903, 909, 942, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x31 - 1440x900@85Hz */
+	{ DRM_MODE(157000, 1440, 1544,
+		   1696, 1952, 900, 903, 909, 948, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x32 - 1440x900@120Hz RB */
+	{ DRM_MODE(182750, 1440, 1488,
+		   1520, 1600, 900, 903, 909, 953, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x53 - 1600x900@60Hz */
+	{ DRM_MODE(108000, 1600, 1624,
+		   1704, 1800, 900, 901, 904, 1000, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x33 - 1600x1200@60Hz */
+	{ DRM_MODE(162000, 1600, 1664,
+		   1856, 2160, 1200, 1201, 1204, 1250, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x34 - 1600x1200@65Hz */
+	{ DRM_MODE(175500, 1600, 1664,
+		   1856, 2160, 1200, 1201, 1204, 1250, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x35 - 1600x1200@70Hz */
+	{ DRM_MODE(189000, 1600, 1664,
+		   1856, 2160, 1200, 1201, 1204, 1250, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x36 - 1600x1200@75Hz */
+	{ DRM_MODE(202500, 1600, 1664,
+		   1856, 2160, 1200, 1201, 1204, 1250, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x37 - 1600x1200@85Hz */
+	{ DRM_MODE(229500, 1600, 1664,
+		   1856, 2160, 1200, 1201, 1204, 1250, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x38 - 1600x1200@120Hz RB */
+	{ DRM_MODE(268250, 1600, 1648,
+		   1680, 1760, 1200, 1203, 1207, 1271, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x39 - 1680x1050@60Hz RB */
+	{ DRM_MODE(119000, 1680, 1728,
+		   1760, 1840, 1050, 1053, 1059, 1080, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x3a - 1680x1050@60Hz */
+	{ DRM_MODE(146250, 1680, 1784,
+		   1960, 2240, 1050, 1053, 1059, 1089, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x3b - 1680x1050@75Hz */
+	{ DRM_MODE(187000, 1680, 1800,
+		   1976, 2272, 1050, 1053, 1059, 1099, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x3c - 1680x1050@85Hz */
+	{ DRM_MODE(214750, 1680, 1808,
+		   1984, 2288, 1050, 1053, 1059, 1105, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x3d - 1680x1050@120Hz RB */
+	{ DRM_MODE(245500, 1680, 1728,
+		   1760, 1840, 1050, 1053, 1059, 1112, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x3e - 1792x1344@60Hz */
+	{ DRM_MODE(204750, 1792, 1920,
+		   2120, 2448, 1344, 1345, 1348, 1394, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x3f - 1792x1344@75Hz */
+	{ DRM_MODE(261000, 1792, 1888,
+		   2104, 2456, 1344, 1345, 1348, 1417, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x40 - 1792x1344@120Hz RB */
+	{ DRM_MODE(333250, 1792, 1840,
+		   1872, 1952, 1344, 1347, 1351, 1423, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x41 - 1856x1392@60Hz */
+	{ DRM_MODE(218250, 1856, 1952,
+		   2176, 2528, 1392, 1393, 1396, 1439, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x42 - 1856x1392@75Hz */
+	{ DRM_MODE(288000, 1856, 1984,
+		   2208, 2560, 1392, 1393, 1396, 1500, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x43 - 1856x1392@120Hz RB */
+	{ DRM_MODE(356500, 1856, 1904,
+		   1936, 2016, 1392, 1395, 1399, 1474, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x52 - 1920x1080@60Hz */
+	{ DRM_MODE(148500, 1920, 2008,
+		   2052, 2200, 1080, 1084, 1089, 1125, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x44 - 1920x1200@60Hz RB */
+	{ DRM_MODE(154000, 1920, 1968,
+		   2000, 2080, 1200, 1203, 1209, 1235, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x45 - 1920x1200@60Hz */
+	{ DRM_MODE(193250, 1920, 2056,
+		   2256, 2592, 1200, 1203, 1209, 1245, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x46 - 1920x1200@75Hz */
+	{ DRM_MODE(245250, 1920, 2056,
+		   2264, 2608, 1200, 1203, 1209, 1255, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x47 - 1920x1200@85Hz */
+	{ DRM_MODE(281250, 1920, 2064,
+		   2272, 2624, 1200, 1203, 1209, 1262, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x48 - 1920x1200@120Hz RB */
+	{ DRM_MODE(317000, 1920, 1968,
+		   2000, 2080, 1200, 1203, 1209, 1271, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x49 - 1920x1440@60Hz */
+	{ DRM_MODE(234000, 1920, 2048,
+		   2256, 2600, 1440, 1441, 1444, 1500, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x4a - 1920x1440@75Hz */
+	{ DRM_MODE(297000, 1920, 2064,
+		   2288, 2640, 1440, 1441, 1444, 1500, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x4b - 1920x1440@120Hz RB */
+	{ DRM_MODE(380500, 1920, 1968,
+		   2000, 2080, 1440, 1443, 1447, 1525, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x54 - 2048x1152@60Hz */
+	{ DRM_MODE(162000, 2048, 2074,
+		   2154, 2250, 1152, 1153, 1156, 1200, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x4c - 2560x1600@60Hz RB */
+	{ DRM_MODE(268500, 2560, 2608,
+		   2640, 2720, 1600, 1603, 1609, 1646, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x4d - 2560x1600@60Hz */
+	{ DRM_MODE(348500, 2560, 2752,
+		   3032, 3504, 1600, 1603, 1609, 1658, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x4e - 2560x1600@75Hz */
+	{ DRM_MODE(443250, 2560, 2768,
+		   3048, 3536, 1600, 1603, 1609, 1672, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x4f - 2560x1600@85Hz */
+	{ DRM_MODE(505250, 2560, 2768,
+		   3048, 3536, 1600, 1603, 1609, 1682, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x50 - 2560x1600@120Hz RB */
+	{ DRM_MODE(552750, 2560, 2608,
+		   2640, 2720, 1600, 1603, 1609, 1694, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x57 - 4096x2160@60Hz RB */
+	{ DRM_MODE(556744, 4096, 4104,
+		   4136, 4176, 2160, 2208, 2216, 2222, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x58 - 4096x2160@59.94Hz RB */
+	{ DRM_MODE(556188, 4096, 4104,
+		   4136, 4176, 2160, 2208, 2216, 2222, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+};
+
+/*
+ * These more or less come from the DMT spec.  The 720x400 modes are
+ * inferred from historical 80x25 practice.  The 640x480@67 and 832x624@75
+ * modes are old-school Mac modes.  The EDID spec says the 1152x864@75 mode
+ * should be 1152x870, again for the Mac, but instead we use the x864 DMT
+ * mode.
+ *
+ * The DMT modes have been fact-checked; the rest are mild guesses.
+ */
+static const struct drm_display_mode edid_est_modes[] = {
+	/* 800x600@60Hz */
+	{ DRM_MODE(40000, 800, 840,
+		   968, 1056, 600, 601, 605, 628, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 800x600@56Hz */
+	{ DRM_MODE(36000, 800, 824,
+		   896, 1024, 600, 601, 603,  625, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 640x480@75Hz */
+	{ DRM_MODE(31500, 640, 656,
+		   720, 840, 480, 481, 484, 500, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 640x480@72Hz */
+	{ DRM_MODE(31500, 640, 664,
+		   704,  832, 480, 489, 492, 520, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 640x480@67Hz */
+	{ DRM_MODE(30240, 640, 704,
+		   768,  864, 480, 483, 486, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 640x480@60Hz */
+	{ DRM_MODE(25175, 640, 656,
+		   752, 800, 480, 490, 492, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 720x400@88Hz */
+	{ DRM_MODE(35500, 720, 738,
+		   846, 900, 400, 421, 423,  449, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 720x400@70Hz */
+	{ DRM_MODE(28320, 720, 738,
+		   846,  900, 400, 412, 414, 449, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 1280x1024@75Hz */
+	{ DRM_MODE(135000, 1280, 1296,
+		   1440, 1688, 1024, 1025, 1028, 1066, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 1024x768@75Hz */
+	{ DRM_MODE(78750, 1024, 1040,
+		   1136, 1312,  768, 769, 772, 800, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 1024x768@70Hz */
+	{ DRM_MODE(75000, 1024, 1048,
+		   1184, 1328, 768, 771, 777, 806, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 1024x768@60Hz */
+	{ DRM_MODE(65000, 1024, 1048,
+		   1184, 1344, 768, 771, 777, 806, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 1024x768@43Hz */
+	{ DRM_MODE(44900, 1024, 1032,
+		   1208, 1264, 768, 768, 776, 817, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
+		   DRM_MODE_FLAG_INTERLACE) },
+	/* 832x624@75Hz */
+	{ DRM_MODE(57284, 832, 864,
+		   928, 1152, 624, 625, 628, 667, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 800x600@75Hz */
+	{ DRM_MODE(49500, 800, 816,
+		   896, 1056, 600, 601, 604,  625, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 800x600@72Hz */
+	{ DRM_MODE(50000, 800, 856,
+		   976, 1040, 600, 637, 643, 666, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 1152x864@75Hz */
+	{ DRM_MODE(108000, 1152, 1216,
+		   1344, 1600, 864, 865, 868, 900, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+};
+
+struct minimode {
+	short w;
+	short h;
+	short r;
+	short rb;
+};
+
+static const struct minimode est3_modes[] = {
+	/* byte 6 */
+	{ 640, 350, 85, 0 },
+	{ 640, 400, 85, 0 },
+	{ 720, 400, 85, 0 },
+	{ 640, 480, 85, 0 },
+	{ 848, 480, 60, 0 },
+	{ 800, 600, 85, 0 },
+	{ 1024, 768, 85, 0 },
+	{ 1152, 864, 75, 0 },
+	/* byte 7 */
+	{ 1280, 768, 60, 1 },
+	{ 1280, 768, 60, 0 },
+	{ 1280, 768, 75, 0 },
+	{ 1280, 768, 85, 0 },
+	{ 1280, 960, 60, 0 },
+	{ 1280, 960, 85, 0 },
+	{ 1280, 1024, 60, 0 },
+	{ 1280, 1024, 85, 0 },
+	/* byte 8 */
+	{ 1360, 768, 60, 0 },
+	{ 1440, 900, 60, 1 },
+	{ 1440, 900, 60, 0 },
+	{ 1440, 900, 75, 0 },
+	{ 1440, 900, 85, 0 },
+	{ 1400, 1050, 60, 1 },
+	{ 1400, 1050, 60, 0 },
+	{ 1400, 1050, 75, 0 },
+	/* byte 9 */
+	{ 1400, 1050, 85, 0 },
+	{ 1680, 1050, 60, 1 },
+	{ 1680, 1050, 60, 0 },
+	{ 1680, 1050, 75, 0 },
+	{ 1680, 1050, 85, 0 },
+	{ 1600, 1200, 60, 0 },
+	{ 1600, 1200, 65, 0 },
+	{ 1600, 1200, 70, 0 },
+	/* byte 10 */
+	{ 1600, 1200, 75, 0 },
+	{ 1600, 1200, 85, 0 },
+	{ 1792, 1344, 60, 0 },
+	{ 1792, 1344, 75, 0 },
+	{ 1856, 1392, 60, 0 },
+	{ 1856, 1392, 75, 0 },
+	{ 1920, 1200, 60, 1 },
+	{ 1920, 1200, 60, 0 },
+	/* byte 11 */
+	{ 1920, 1200, 75, 0 },
+	{ 1920, 1200, 85, 0 },
+	{ 1920, 1440, 60, 0 },
+	{ 1920, 1440, 75, 0 },
+};
+
+static const struct minimode extra_modes[] = {
+	{ 1024, 576,  60, 0 },
+	{ 1366, 768,  60, 0 },
+	{ 1600, 900,  60, 0 },
+	{ 1680, 945,  60, 0 },
+	{ 1920, 1080, 60, 0 },
+	{ 2048, 1152, 60, 0 },
+	{ 2048, 1536, 60, 0 },
+};
 
 int edid_check_info(struct edid1_info *edid_info)
 {
@@ -193,6 +1435,25 @@ static void decode_mode(u8 *buf, struct drm_display_mode *mode)
 	      mode->vtotal, vborder);
 }
 
+/**
+ * edid_vendor - match a string against EDID's obfuscated vendor field
+ * @edid: EDID to match
+ * @vendor: vendor string
+ *
+ * Returns true if @vendor is in @edid, false otherwise
+ */
+static bool edid_vendor(struct edid1_info *edid, char *vendor)
+{
+	char edid_vendor[3];
+
+	edid_vendor[0] = ((edid->manufacturer_name[0] & 0x7c) >> 2) + '@';
+	edid_vendor[1] = (((edid->manufacturer_name[0] & 0x3) << 3) |
+			  ((edid->manufacturer_name[1] & 0xe0) >> 5)) + '@';
+	edid_vendor[2] = (edid->manufacturer_name[1] & 0x1f) + '@';
+
+	return !strncmp(edid_vendor, vendor, 3);
+}
+
 /**
  * Check if HDMI vendor specific data block is present in CEA block
  * @param info	CEA extension block
@@ -331,7 +1592,6 @@ int edid_get_timing(u8 *buf, int buf_size, struct display_timing *timing,
 	return 0;
 }
 
-
 /**
  * Snip the tailing whitespace/return of a string.
  *
@@ -350,7 +1610,7 @@ static char *snip(char *string)
 	s = &string[strlen(string) - 1];
 
 	while (s >= string && (isspace(*s) || *s == '\n' || *s == '\r' ||
-			*s == '\0'))
+	       *s == '\0'))
 		*(s--) = '\0';
 
 	return string;
@@ -390,8 +1650,8 @@ static void edid_print_dtd(struct edid_monitor_descriptor *monitor,
 			       monitor->data.range_data.vertical_max,
 			       monitor->data.range_data.pixel_clock_max * 10);
 	} else {
-		uint32_t pixclock, h_active, h_blanking, v_active, v_blanking;
-		uint32_t h_total, v_total, vfreq;
+		u32 pixclock, h_active, h_blanking, v_active, v_blanking;
+		u32 h_total, v_total, vfreq;
 
 		pixclock = EDID_DETAILED_TIMING_PIXEL_CLOCK(*timing);
 		h_active = EDID_DETAILED_TIMING_HORIZONTAL_ACTIVE(*timing);
@@ -430,7 +1690,7 @@ void edid_print_info(struct edid1_info *edid_info)
 	int i;
 	char manufacturer[4];
 	unsigned int have_timing = 0;
-	uint32_t serial_number;
+	u32 serial_number;
 
 	if (edid_check_info(edid_info)) {
 		printf("Not a valid EDID\n");
@@ -535,7 +1795,7 @@ void edid_print_info(struct edid1_info *edid_info)
 		    ((xres != 0) && (xres != 1)) ||
 		    ((vfreq != 0) && (vfreq != 1))) {
 			switch (EDID1_INFO_STANDARD_TIMING_ASPECT(*edid_info,
-					i)) {
+				i)) {
 			case ASPECT_625:
 				aspect = 6250;
 				break;
@@ -567,3 +1827,3438 @@ void edid_print_info(struct edid1_info *edid_info)
 	if (!have_timing)
 		printf("\tNone\n");
 }
+
+/**
+ * drm_mode_create - create a new display mode
+ *
+ * Create a new, cleared drm_display_mode.
+ *
+ * Returns:
+ * Pointer to new mode on success, NULL on error.
+ */
+static struct drm_display_mode *drm_mode_create(void)
+{
+	struct drm_display_mode *nmode;
+
+	nmode = malloc(sizeof(struct drm_display_mode));
+	memset(nmode, 0, sizeof(struct drm_display_mode));
+	if (!nmode)
+		return NULL;
+
+	return nmode;
+}
+
+/**
+ * drm_mode_destroy - remove a mode
+ * @mode: mode to remove
+ *
+ */
+static void drm_mode_destroy(struct drm_display_mode *mode)
+{
+	if (!mode)
+		return;
+
+	kfree(mode);
+}
+
+/**
+ * drm_cvt_mode -create a modeline based on the CVT algorithm
+ * @hdisplay: hdisplay size
+ * @vdisplay: vdisplay size
+ * @vrefresh: vrefresh rate
+ * @reduced: whether to use reduced blanking
+ * @interlaced: whether to compute an interlaced mode
+ * @margins: whether to add margins (borders)
+ *
+ * This function is called to generate the modeline based on CVT algorithm
+ * according to the hdisplay, vdisplay, vrefresh.
+ * It is based from the VESA(TM) Coordinated Video Timing Generator by
+ * Graham Loveridge April 9, 2003 available at
+ * http://www.elo.utfsm.cl/~elo212/docs/CVTd6r1.xls
+ *
+ * And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt.c.
+ * What I have done is to translate it by using integer calculation.
+ *
+ * Returns:
+ * The modeline based on the CVT algorithm stored in a drm_display_mode object.
+ * The display mode object is allocated with drm_mode_create(). Returns NULL
+ * when no mode could be allocated.
+ */
+static
+struct drm_display_mode *drm_cvt_mode(int hdisplay, int vdisplay, int vrefresh,
+				      bool reduced, bool interlaced,
+				      bool margins)
+{
+#define HV_FACTOR			1000
+	/* 1) top/bottom margin size (% of height) - default: 1.8, */
+#define	CVT_MARGIN_PERCENTAGE		18
+	/* 2) character cell horizontal granularity (pixels) - default 8 */
+#define	CVT_H_GRANULARITY		8
+	/* 3) Minimum vertical porch (lines) - default 3 */
+#define	CVT_MIN_V_PORCH			3
+	/* 4) Minimum number of vertical back porch lines - default 6 */
+#define	CVT_MIN_V_BPORCH		6
+	/* Pixel Clock step (kHz) */
+#define CVT_CLOCK_STEP			250
+	struct drm_display_mode *drm_mode;
+	unsigned int vfieldrate, hperiod;
+	int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync;
+	int interlace;
+
+	/* allocate the drm_display_mode structure. If failure, we will
+	 * return directly
+	 */
+	drm_mode = drm_mode_create();
+	if (!drm_mode)
+		return NULL;
+
+	/* the CVT default refresh rate is 60Hz */
+	if (!vrefresh)
+		vrefresh = 60;
+
+	/* the required field fresh rate */
+	if (interlaced)
+		vfieldrate = vrefresh * 2;
+	else
+		vfieldrate = vrefresh;
+
+	/* horizontal pixels */
+	hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY);
+
+	/* determine the left&right borders */
+	hmargin = 0;
+	if (margins) {
+		hmargin = hdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
+		hmargin -= hmargin % CVT_H_GRANULARITY;
+	}
+	/* find the total active pixels */
+	drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin;
+
+	/* find the number of lines per field */
+	if (interlaced)
+		vdisplay_rnd = vdisplay / 2;
+	else
+		vdisplay_rnd = vdisplay;
+
+	/* find the top & bottom borders */
+	vmargin = 0;
+	if (margins)
+		vmargin = vdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
+
+	drm_mode->vdisplay = vdisplay + 2 * vmargin;
+
+	/* Interlaced */
+	if (interlaced)
+		interlace = 1;
+	else
+		interlace = 0;
+
+	/* Determine VSync Width from aspect ratio */
+	if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay))
+		vsync = 4;
+	else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay))
+		vsync = 5;
+	else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay))
+		vsync = 6;
+	else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay))
+		vsync = 7;
+	else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay))
+		vsync = 7;
+	else /* custom */
+		vsync = 10;
+
+	if (!reduced) {
+		/* simplify the GTF calculation */
+		/* 4) Minimum time of vertical sync + back porch interval
+		 * default 550.0
+		 */
+		int tmp1, tmp2;
+#define CVT_MIN_VSYNC_BP	550
+		/* 3) Nominal HSync width (% of line period) - default 8 */
+#define CVT_HSYNC_PERCENTAGE	8
+		unsigned int hblank_percentage;
+		int vsyncandback_porch, vback_porch, hblank;
+
+		/* estimated the horizontal period */
+		tmp1 = HV_FACTOR * 1000000  -
+				CVT_MIN_VSYNC_BP * HV_FACTOR * vfieldrate;
+		tmp2 = (vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH) * 2 +
+				interlace;
+		hperiod = tmp1 * 2 / (tmp2 * vfieldrate);
+
+		tmp1 = CVT_MIN_VSYNC_BP * HV_FACTOR / hperiod + 1;
+		/* 9. Find number of lines in sync + backporch */
+		if (tmp1 < (vsync + CVT_MIN_V_PORCH))
+			vsyncandback_porch = vsync + CVT_MIN_V_PORCH;
+		else
+			vsyncandback_porch = tmp1;
+		/* 10. Find number of lines in back porch */
+		vback_porch = vsyncandback_porch - vsync;
+		drm_mode->vtotal = vdisplay_rnd + 2 * vmargin +
+				vsyncandback_porch + CVT_MIN_V_PORCH;
+		/* 5) Definition of Horizontal blanking time limitation */
+		/* Gradient (%/kHz) - default 600 */
+#define CVT_M_FACTOR	600
+		/* Offset (%) - default 40 */
+#define CVT_C_FACTOR	40
+		/* Blanking time scaling factor - default 128 */
+#define CVT_K_FACTOR	128
+		/* Scaling factor weighting - default 20 */
+#define CVT_J_FACTOR	20
+#define CVT_M_PRIME	(CVT_M_FACTOR * CVT_K_FACTOR / 256)
+#define CVT_C_PRIME	((CVT_C_FACTOR - CVT_J_FACTOR) * CVT_K_FACTOR / 256 + \
+			 CVT_J_FACTOR)
+		/* 12. Find ideal blanking duty cycle from formula */
+		hblank_percentage = CVT_C_PRIME * HV_FACTOR - CVT_M_PRIME *
+					hperiod / 1000;
+		/* 13. Blanking time */
+		if (hblank_percentage < 20 * HV_FACTOR)
+			hblank_percentage = 20 * HV_FACTOR;
+		hblank = drm_mode->hdisplay * hblank_percentage /
+			 (100 * HV_FACTOR - hblank_percentage);
+		hblank -= hblank % (2 * CVT_H_GRANULARITY);
+		/* 14. find the total pixels per line */
+		drm_mode->htotal = drm_mode->hdisplay + hblank;
+		drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2;
+		drm_mode->hsync_start = drm_mode->hsync_end -
+			(drm_mode->htotal * CVT_HSYNC_PERCENTAGE) / 100;
+		drm_mode->hsync_start += CVT_H_GRANULARITY -
+			drm_mode->hsync_start % CVT_H_GRANULARITY;
+		/* fill the Vsync values */
+		drm_mode->vsync_start = drm_mode->vdisplay + CVT_MIN_V_PORCH;
+		drm_mode->vsync_end = drm_mode->vsync_start + vsync;
+	} else {
+		/* Reduced blanking */
+		/* Minimum vertical blanking interval time - default 460 */
+#define CVT_RB_MIN_VBLANK	460
+		/* Fixed number of clocks for horizontal sync */
+#define CVT_RB_H_SYNC		32
+		/* Fixed number of clocks for horizontal blanking */
+#define CVT_RB_H_BLANK		160
+		/* Fixed number of lines for vertical front porch - default 3*/
+#define CVT_RB_VFPORCH		3
+		int vbilines;
+		int tmp1, tmp2;
+		/* 8. Estimate Horizontal period. */
+		tmp1 = HV_FACTOR * 1000000 -
+			CVT_RB_MIN_VBLANK * HV_FACTOR * vfieldrate;
+		tmp2 = vdisplay_rnd + 2 * vmargin;
+		hperiod = tmp1 / (tmp2 * vfieldrate);
+		/* 9. Find number of lines in vertical blanking */
+		vbilines = CVT_RB_MIN_VBLANK * HV_FACTOR / hperiod + 1;
+		/* 10. Check if vertical blanking is sufficient */
+		if (vbilines < (CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH))
+			vbilines = CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH;
+		/* 11. Find total number of lines in vertical field */
+		drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + vbilines;
+		/* 12. Find total number of pixels in a line */
+		drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK;
+		/* Fill in HSync values */
+		drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2;
+		drm_mode->hsync_start = drm_mode->hsync_end - CVT_RB_H_SYNC;
+		/* Fill in VSync values */
+		drm_mode->vsync_start = drm_mode->vdisplay + CVT_RB_VFPORCH;
+		drm_mode->vsync_end = drm_mode->vsync_start + vsync;
+	}
+	/* 15/13. Find pixel clock frequency (kHz for xf86) */
+	drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod;
+	drm_mode->clock -= drm_mode->clock % CVT_CLOCK_STEP;
+	/* 18/16. Find actual vertical frame frequency */
+	/* ignore - just set the mode flag for interlaced */
+	if (interlaced) {
+		drm_mode->vtotal *= 2;
+		drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
+	}
+
+	if (reduced)
+		drm_mode->flags |= (DRM_MODE_FLAG_PHSYNC |
+					DRM_MODE_FLAG_NVSYNC);
+	else
+		drm_mode->flags |= (DRM_MODE_FLAG_PVSYNC |
+					DRM_MODE_FLAG_NHSYNC);
+
+	return drm_mode;
+}
+
+static int
+cea_db_payload_len(const u8 *db)
+{
+	return db[0] & 0x1f;
+}
+
+static int
+cea_db_extended_tag(const u8 *db)
+{
+	return db[1];
+}
+
+static int
+cea_db_tag(const u8 *db)
+{
+	return db[0] >> 5;
+}
+
+#define for_each_cea_db(cea, i, start, end) \
+	for ((i) = (start); (i) < (end) && (i) + \
+	cea_db_payload_len(&(cea)[(i)]) < \
+	(end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1)
+
+static int
+cea_revision(const u8 *cea)
+{
+	return cea[1];
+}
+
+static int
+cea_db_offsets(const u8 *cea, int *start, int *end)
+{
+	/* Data block offset in CEA extension block */
+	*start = 4;
+	*end = cea[2];
+	if (*end == 0)
+		*end = 127;
+	if (*end < 4 || *end > 127)
+		return -ERANGE;
+
+	/*
+	 * XXX: cea[2] is equal to the real value minus one in some sink edid.
+	 */
+	if (*end != 4) {
+		int i;
+
+		i = *start;
+		while (i < (*end) &&
+		       i + cea_db_payload_len(&(cea)[i]) < (*end))
+			i += cea_db_payload_len(&(cea)[i]) + 1;
+
+		if (cea_db_payload_len(&(cea)[i]) &&
+		    i + cea_db_payload_len(&(cea)[i]) == (*end))
+			(*end)++;
+	}
+
+	return 0;
+}
+
+static bool cea_db_is_hdmi_vsdb(const u8 *db)
+{
+	int hdmi_id;
+
+	if (cea_db_tag(db) != EDID_CEA861_DB_VENDOR)
+		return false;
+
+	if (cea_db_payload_len(db) < 5)
+		return false;
+
+	hdmi_id = db[1] | (db[2] << 8) | (db[3] << 16);
+
+	return hdmi_id == HDMI_IEEE_OUI;
+}
+
+static bool cea_db_is_hdmi_forum_vsdb(const u8 *db)
+{
+	unsigned int oui;
+
+	if (cea_db_tag(db) != EDID_CEA861_DB_VENDOR)
+		return false;
+
+	if (cea_db_payload_len(db) < 7)
+		return false;
+
+	oui = db[3] << 16 | db[2] << 8 | db[1];
+
+	return oui == HDMI_FORUM_IEEE_OUI;
+}
+
+static bool cea_db_is_y420cmdb(const u8 *db)
+{
+	if (cea_db_tag(db) != EDID_CEA861_DB_USE_EXTENDED)
+		return false;
+
+	if (!cea_db_payload_len(db))
+		return false;
+
+	if (cea_db_extended_tag(db) != EXT_VIDEO_CAP_BLOCK_Y420CMDB)
+		return false;
+
+	return true;
+}
+
+static bool cea_db_is_y420vdb(const u8 *db)
+{
+	if (cea_db_tag(db) != EDID_CEA861_DB_USE_EXTENDED)
+		return false;
+
+	if (!cea_db_payload_len(db))
+		return false;
+
+	if (cea_db_extended_tag(db) != EXT_VIDEO_DATA_BLOCK_420)
+		return false;
+
+	return true;
+}
+
+static bool drm_valid_hdmi_vic(u8 vic)
+{
+	return vic > 0 && vic < ARRAY_SIZE(edid_4k_modes);
+}
+
+static void drm_add_hdmi_modes(struct hdmi_edid_data *data,
+			       struct drm_display_mode *mode)
+{
+	int ret;
+	struct drm_display_mode *mode_buf = data->mode_buf;
+
+	mode_buf[(data->modes)++] = *mode;
+}
+
+static bool drm_valid_cea_vic(u8 vic)
+{
+	return vic > 0 && vic < ARRAY_SIZE(edid_cea_modes);
+}
+
+static u8 svd_to_vic(u8 svd)
+{
+	/* 0-6 bit vic, 7th bit native mode indicator */
+	if ((svd >= 1 &&  svd <= 64) || (svd >= 129 && svd <= 192))
+		return svd & 127;
+
+	return svd;
+}
+
+static struct drm_display_mode *
+drm_display_mode_from_vic_index(const u8 *video_db, u8 video_len,
+				u8 video_index)
+{
+	struct drm_display_mode *newmode;
+	u8 vic;
+
+	if (!video_db || video_index >= video_len)
+		return NULL;
+
+	/* CEA modes are numbered 1..127 */
+	vic = svd_to_vic(video_db[video_index]);
+	if (!drm_valid_cea_vic(vic))
+		return NULL;
+
+	newmode = drm_mode_create();
+	if (!newmode)
+		return NULL;
+
+	*newmode = edid_cea_modes[vic];
+	newmode->vrefresh = 0;
+
+	return newmode;
+}
+
+static void bitmap_set(unsigned long *map, unsigned int start, int len)
+{
+	unsigned long *p = map + BIT_WORD(start);
+	const unsigned int size = start + len;
+	int bits_to_set = BITS_PER_LONG - (start % BITS_PER_LONG);
+	unsigned long mask_to_set = BITMAP_FIRST_WORD_MASK(start);
+
+	while (len - bits_to_set >= 0) {
+		*p |= mask_to_set;
+		len -= bits_to_set;
+		bits_to_set = BITS_PER_LONG;
+		mask_to_set = ~0UL;
+		p++;
+	}
+	if (len) {
+		mask_to_set &= BITMAP_LAST_WORD_MASK(size);
+		*p |= mask_to_set;
+	}
+}
+
+static void
+drm_add_cmdb_modes(u8 svd, struct drm_hdmi_info *hdmi)
+{
+	u8 vic = svd_to_vic(svd);
+
+	if (!drm_valid_cea_vic(vic))
+		return;
+
+	bitmap_set(hdmi->y420_cmdb_modes, vic, 1);
+}
+
+static int
+do_cea_modes(const u8 *db, u8 len, struct drm_hdmi_info *hdmi,
+	     struct hdmi_edid_data *data)
+{
+	int i, modes = 0;
+
+	for (i = 0; i < len; i++) {
+		struct drm_display_mode *mode;
+
+		mode = drm_display_mode_from_vic_index(db, len, i);
+		if (mode) {
+			/*
+			 * YCBCR420 capability block contains a bitmap which
+			 * gives the index of CEA modes from CEA VDB, which
+			 * can support YCBCR 420 sampling output also (apart
+			 * from RGB/YCBCR444 etc).
+			 * For example, if the bit 0 in bitmap is set,
+			 * first mode in VDB can support YCBCR420 output too.
+			 * Add YCBCR420 modes only if sink is HDMI 2.0 capable.
+			 */
+			if (i < 64 && hdmi->y420_cmdb_map & (1ULL << i))
+				drm_add_cmdb_modes(db[i], hdmi);
+			drm_add_hdmi_modes(data, mode);
+			drm_mode_destroy(mode);
+			modes++;
+		}
+	}
+
+	return modes;
+}
+
+/*
+ * do_y420vdb_modes - Parse YCBCR 420 only modes
+ * @data: the structure that save parsed hdmi edid data
+ * @svds: start of the data block of CEA YCBCR 420 VDB
+ * @svds_len: length of the CEA YCBCR 420 VDB
+ * @hdmi: runtime information about the connected HDMI sink
+ *
+ * Parse the CEA-861-F YCBCR 420 Video Data Block (Y420VDB)
+ * which contains modes which can be supported in YCBCR 420
+ * output format only.
+ */
+static
+int do_y420vdb_modes(const u8 *svds, u8 svds_len, struct drm_hdmi_info *hdmi,
+		     struct hdmi_edid_data *data)
+{
+	int modes = 0, i, ret;
+	struct drm_display_mode *mode_buf = data->mode_buf;
+
+	for (i = 0; i < svds_len; i++) {
+		u8 vic = svd_to_vic(svds[i]);
+
+		if (!drm_valid_cea_vic(vic))
+			continue;
+
+		bitmap_set(hdmi->y420_vdb_modes, vic, 1);
+		drm_add_hdmi_modes(data, &edid_cea_modes[vic]);
+		modes++;
+	}
+
+	return modes;
+}
+
+struct stereo_mandatory_mode {
+	int width, height, vrefresh;
+	unsigned int flags;
+};
+
+static const struct stereo_mandatory_mode stereo_mandatory_modes[] = {
+	{ 1920, 1080, 24, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
+	{ 1920, 1080, 24, DRM_MODE_FLAG_3D_FRAME_PACKING },
+	{ 1920, 1080, 50,
+	  DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF },
+	{ 1920, 1080, 60,
+	  DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF },
+	{ 1280, 720,  50, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
+	{ 1280, 720,  50, DRM_MODE_FLAG_3D_FRAME_PACKING },
+	{ 1280, 720,  60, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
+	{ 1280, 720,  60, DRM_MODE_FLAG_3D_FRAME_PACKING }
+};
+
+static bool
+stereo_match_mandatory(const struct drm_display_mode *mode,
+		       const struct stereo_mandatory_mode *stereo_mode)
+{
+	unsigned int interlaced = mode->flags & DRM_MODE_FLAG_INTERLACE;
+
+	return mode->hdisplay == stereo_mode->width &&
+	       mode->vdisplay == stereo_mode->height &&
+	       interlaced == (stereo_mode->flags & DRM_MODE_FLAG_INTERLACE) &&
+	       drm_mode_vrefresh(mode) == stereo_mode->vrefresh;
+}
+
+static int add_hdmi_mandatory_stereo_modes(struct hdmi_edid_data *data)
+{
+	const struct drm_display_mode *mode;
+	int num = data->modes, modes = 0, i, k;
+
+	for (k = 0; k < num; k++) {
+		mode = &data->mode_buf[k];
+		for (i = 0; i < ARRAY_SIZE(stereo_mandatory_modes); i++) {
+			const struct stereo_mandatory_mode *mandatory;
+			struct drm_display_mode *new_mode;
+
+			if (!stereo_match_mandatory(mode,
+						    &stereo_mandatory_modes[i]))
+				continue;
+
+			mandatory = &stereo_mandatory_modes[i];
+			new_mode = drm_mode_create();
+			if (!new_mode)
+				continue;
+
+			*new_mode = *mode;
+			new_mode->flags |= mandatory->flags;
+			drm_add_hdmi_modes(data, new_mode);
+			drm_mode_destroy(new_mode);
+			modes++;
+		}
+	}
+
+	return modes;
+}
+
+static int add_3d_struct_modes(struct hdmi_edid_data *data, u16 structure,
+			       const u8 *video_db, u8 video_len, u8 video_index)
+{
+	struct drm_display_mode *newmode;
+	int modes = 0;
+
+	if (structure & (1 << 0)) {
+		newmode = drm_display_mode_from_vic_index(video_db,
+							  video_len,
+							  video_index);
+		if (newmode) {
+			newmode->flags |= DRM_MODE_FLAG_3D_FRAME_PACKING;
+			drm_add_hdmi_modes(data, newmode);
+			modes++;
+			drm_mode_destroy(newmode);
+		}
+	}
+	if (structure & (1 << 6)) {
+		newmode = drm_display_mode_from_vic_index(video_db,
+							  video_len,
+							  video_index);
+		if (newmode) {
+			newmode->flags |= DRM_MODE_FLAG_3D_TOP_AND_BOTTOM;
+			drm_add_hdmi_modes(data, newmode);
+			modes++;
+			drm_mode_destroy(newmode);
+		}
+	}
+	if (structure & (1 << 8)) {
+		newmode = drm_display_mode_from_vic_index(video_db,
+							  video_len,
+							  video_index);
+		if (newmode) {
+			newmode->flags |= DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF;
+			drm_add_hdmi_modes(data, newmode);
+			modes++;
+			drm_mode_destroy(newmode);
+		}
+	}
+
+	return modes;
+}
+
+static int add_hdmi_mode(struct hdmi_edid_data *data, u8 vic)
+{
+	struct drm_display_mode *newmode;
+
+	if (!drm_valid_hdmi_vic(vic)) {
+		debug("Unknown HDMI VIC: %d\n", vic);
+		return 0;
+	}
+
+	drm_add_hdmi_modes(data, &edid_4k_modes[vic]);
+
+	return 1;
+}
+
+/*
+ * do_hdmi_vsdb_modes - Parse the HDMI Vendor Specific data block
+ * @db: start of the CEA vendor specific block
+ * @len: length of the CEA block payload, ie. one can access up to db[len]
+ *
+ * Parses the HDMI VSDB looking for modes to add to @data. This function
+ * also adds the stereo 3d modes when applicable.
+ */
+static int
+do_hdmi_vsdb_modes(const u8 *db, u8 len, const u8 *video_db, u8 video_len,
+		   struct hdmi_edid_data *data)
+{
+	int modes = 0, offset = 0, i, multi_present = 0, multi_len;
+	u8 vic_len, hdmi_3d_len = 0;
+	u16 mask;
+	u16 structure_all;
+
+	if (len < 8)
+		goto out;
+
+	/* no HDMI_Video_Present */
+	if (!(db[8] & (1 << 5)))
+		goto out;
+
+	/* Latency_Fields_Present */
+	if (db[8] & (1 << 7))
+		offset += 2;
+
+	/* I_Latency_Fields_Present */
+	if (db[8] & (1 << 6))
+		offset += 2;
+
+	/* the declared length is not long enough for the 2 first bytes
+	 * of additional video format capabilities
+	 */
+	if (len < (8 + offset + 2))
+		goto out;
+
+	/* 3D_Present */
+	offset++;
+	if (db[8 + offset] & (1 << 7)) {
+		modes += add_hdmi_mandatory_stereo_modes(data);
+
+		/* 3D_Multi_present */
+		multi_present = (db[8 + offset] & 0x60) >> 5;
+	}
+
+	offset++;
+	vic_len = db[8 + offset] >> 5;
+	hdmi_3d_len = db[8 + offset] & 0x1f;
+
+	for (i = 0; i < vic_len && len >= (9 + offset + i); i++) {
+		u8 vic;
+
+		vic = db[9 + offset + i];
+		modes += add_hdmi_mode(data, vic);
+	}
+
+	offset += 1 + vic_len;
+
+	if (multi_present == 1)
+		multi_len = 2;
+	else if (multi_present == 2)
+		multi_len = 4;
+	else
+		multi_len = 0;
+
+	if (len < (8 + offset + hdmi_3d_len - 1))
+		goto out;
+
+	if (hdmi_3d_len < multi_len)
+		goto out;
+
+	if (multi_present == 1 || multi_present == 2) {
+		/* 3D_Structure_ALL */
+		structure_all = (db[8 + offset] << 8) | db[9 + offset];
+
+		/* check if 3D_MASK is present */
+		if (multi_present == 2)
+			mask = (db[10 + offset] << 8) | db[11 + offset];
+		else
+			mask = 0xffff;
+
+		for (i = 0; i < 16; i++) {
+			if (mask & (1 << i))
+				modes += add_3d_struct_modes(data,
+						structure_all,
+						video_db,
+						video_len, i);
+		}
+	}
+
+	offset += multi_len;
+
+	for (i = 0; i < (hdmi_3d_len - multi_len); i++) {
+		int vic_index;
+		struct drm_display_mode *newmode = NULL;
+		unsigned int newflag = 0;
+		bool detail_present;
+
+		detail_present = ((db[8 + offset + i] & 0x0f) > 7);
+
+		if (detail_present && (i + 1 == hdmi_3d_len - multi_len))
+			break;
+
+		/* 2D_VIC_order_X */
+		vic_index = db[8 + offset + i] >> 4;
+
+		/* 3D_Structure_X */
+		switch (db[8 + offset + i] & 0x0f) {
+		case 0:
+			newflag = DRM_MODE_FLAG_3D_FRAME_PACKING;
+			break;
+		case 6:
+			newflag = DRM_MODE_FLAG_3D_TOP_AND_BOTTOM;
+			break;
+		case 8:
+			/* 3D_Detail_X */
+			if ((db[9 + offset + i] >> 4) == 1)
+				newflag = DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF;
+			break;
+		}
+
+		if (newflag != 0) {
+			newmode = drm_display_mode_from_vic_index(
+								  video_db,
+								  video_len,
+								  vic_index);
+
+			if (newmode) {
+				newmode->flags |= newflag;
+				drm_add_hdmi_modes(data, newmode);
+				modes++;
+				drm_mode_destroy(newmode);
+			}
+		}
+
+		if (detail_present)
+			i++;
+	}
+
+out:
+	return modes;
+}
+
+/**
+ * edid_get_quirks - return quirk flags for a given EDID
+ * @edid: EDID to process
+ *
+ * This tells subsequent routines what fixes they need to apply.
+ */
+static u32 edid_get_quirks(struct edid *edid)
+{
+	struct edid_quirk *quirk;
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
+		quirk = &edid_quirk_list[i];
+
+		if (edid_vendor(edid, quirk->vendor) &&
+		    (EDID_PRODUCT_ID(edid) == quirk->product_id))
+			return quirk->quirks;
+	}
+
+	return 0;
+}
+
+static void drm_parse_y420cmdb_bitmap(struct hdmi_edid_data *data,
+				      const u8 *db)
+{
+	struct drm_display_info *info = &data->display_info;
+	struct drm_hdmi_info *hdmi = &info->hdmi;
+	u8 map_len = cea_db_payload_len(db) - 1;
+	u8 count;
+	u64 map = 0;
+
+	if (map_len == 0) {
+		/* All CEA modes support ycbcr420 sampling also.*/
+		hdmi->y420_cmdb_map = U64_MAX;
+		info->color_formats |= DRM_COLOR_FORMAT_YCRCB420;
+		return;
+	}
+
+	/*
+	 * This map indicates which of the existing CEA block modes
+	 * from VDB can support YCBCR420 output too. So if bit=0 is
+	 * set, first mode from VDB can support YCBCR420 output too.
+	 * We will parse and keep this map, before parsing VDB itself
+	 * to avoid going through the same block again and again.
+	 *
+	 * Spec is not clear about max possible size of this block.
+	 * Clamping max bitmap block size at 8 bytes. Every byte can
+	 * address 8 CEA modes, in this way this map can address
+	 * 8*8 = first 64 SVDs.
+	 */
+	if (map_len > 8)
+		map_len = 8;
+
+	for (count = 0; count < map_len; count++)
+		map |= (u64)db[2 + count] << (8 * count);
+
+	if (map)
+		info->color_formats |= DRM_COLOR_FORMAT_YCRCB420;
+
+	hdmi->y420_cmdb_map = map;
+}
+
+static void drm_parse_ycbcr420_deep_color_info(struct hdmi_edid_data *data,
+					       const u8 *db)
+{
+	u8 dc_mask;
+	struct drm_hdmi_info *hdmi = &data->display_info.hdmi;
+
+	dc_mask = db[7] & DRM_EDID_YCBCR420_DC_MASK;
+	hdmi->y420_dc_modes |= dc_mask;
+}
+
+static void drm_parse_hdmi_forum_vsdb(struct hdmi_edid_data *data,
+				      const u8 *hf_vsdb)
+{
+	struct drm_display_info *display = &data->display_info;
+	struct drm_hdmi_info *hdmi = &display->hdmi;
+
+	if (hf_vsdb[6] & 0x80) {
+		hdmi->scdc.supported = true;
+		if (hf_vsdb[6] & 0x40)
+			hdmi->scdc.read_request = true;
+	}
+
+	/*
+	 * All HDMI 2.0 monitors must support scrambling at rates > 340 MHz.
+	 * And as per the spec, three factors confirm this:
+	 * * Availability of a HF-VSDB block in EDID (check)
+	 * * Non zero Max_TMDS_Char_Rate filed in HF-VSDB (let's check)
+	 * * SCDC support available (let's check)
+	 * Lets check it out.
+	 */
+
+	if (hf_vsdb[5]) {
+		/* max clock is 5000 KHz times block value */
+		u32 max_tmds_clock = hf_vsdb[5] * 5000;
+		struct drm_scdc *scdc = &hdmi->scdc;
+
+		if (max_tmds_clock > 340000) {
+			display->max_tmds_clock = max_tmds_clock;
+			debug("HF-VSDB: max TMDS clock %d kHz\n",
+			      display->max_tmds_clock);
+		}
+
+		if (scdc->supported) {
+			scdc->scrambling.supported = true;
+
+			/* Few sinks support scrambling for cloks < 340M */
+			if ((hf_vsdb[6] & 0x8))
+				scdc->scrambling.low_rates = true;
+		}
+	}
+
+	drm_parse_ycbcr420_deep_color_info(data, hf_vsdb);
+}
+
+static void drm_parse_hdmi_deep_color_info(struct hdmi_edid_data *data,
+					   const u8 *hdmi)
+{
+	struct drm_display_info *info = &data->display_info;
+	unsigned int dc_bpc = 0;
+
+	/* HDMI supports at least 8 bpc */
+	info->bpc = 8;
+
+	if (cea_db_payload_len(hdmi) < 6)
+		return;
+
+	if (hdmi[6] & DRM_EDID_HDMI_DC_30) {
+		dc_bpc = 10;
+		info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_30;
+		debug("HDMI sink does deep color 30.\n");
+	}
+
+	if (hdmi[6] & DRM_EDID_HDMI_DC_36) {
+		dc_bpc = 12;
+		info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_36;
+		debug("HDMI sink does deep color 36.\n");
+	}
+
+	if (hdmi[6] & DRM_EDID_HDMI_DC_48) {
+		dc_bpc = 16;
+		info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_48;
+		debug("HDMI sink does deep color 48.\n");
+	}
+
+	if (dc_bpc == 0) {
+		debug("No deep color support on this HDMI sink.\n");
+		return;
+	}
+
+	debug("Assigning HDMI sink color depth as %d bpc.\n", dc_bpc);
+	info->bpc = dc_bpc;
+
+	/* YCRCB444 is optional according to spec. */
+	if (hdmi[6] & DRM_EDID_HDMI_DC_Y444) {
+		info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_Y444;
+		debug("HDMI sink does YCRCB444 in deep color.\n");
+	}
+
+	/*
+	 * Spec says that if any deep color mode is supported at all,
+	 * then deep color 36 bit must be supported.
+	 */
+	if (!(hdmi[6] & DRM_EDID_HDMI_DC_36))
+		debug("HDMI sink should do DC_36, but does not!\n");
+}
+
+/*
+ * Search EDID for CEA extension block.
+ */
+static u8 *drm_find_edid_extension(struct edid *edid, int ext_id)
+{
+	u8 *edid_ext = NULL;
+	int i;
+
+	/* No EDID or EDID extensions */
+	if (!edid || !edid->extensions)
+		return NULL;
+
+	/* Find CEA extension */
+	for (i = 0; i < edid->extensions; i++) {
+		edid_ext = (u8 *)edid + EDID_SIZE * (i + 1);
+		if (edid_ext[0] == ext_id)
+			break;
+	}
+
+	if (i == edid->extensions)
+		return NULL;
+
+	return edid_ext;
+}
+
+static u8 *drm_find_cea_extension(struct edid *edid)
+{
+	return drm_find_edid_extension(edid, 0x02);
+}
+
+#define AUDIO_BLOCK	0x01
+#define VIDEO_BLOCK     0x02
+#define VENDOR_BLOCK    0x03
+#define SPEAKER_BLOCK	0x04
+#define EDID_BASIC_AUDIO BIT(6)
+
+/**
+ * drm_detect_hdmi_monitor - detect whether monitor is HDMI
+ * @edid: monitor EDID information
+ *
+ * Parse the CEA extension according to CEA-861-B.
+ *
+ * Return: True if the monitor is HDMI, false if not or unknown.
+ */
+bool drm_detect_hdmi_monitor(struct edid *edid)
+{
+	u8 *edid_ext;
+	int i;
+	int start_offset, end_offset;
+
+	edid_ext = drm_find_cea_extension(edid);
+	if (!edid_ext)
+		return false;
+
+	if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
+		return false;
+
+	/*
+	 * Because HDMI identifier is in Vendor Specific Block,
+	 * search it from all data blocks of CEA extension.
+	 */
+	for_each_cea_db(edid_ext, i, start_offset, end_offset) {
+		if (cea_db_is_hdmi_vsdb(&edid_ext[i]))
+			return true;
+	}
+
+	return false;
+}
+
+/**
+ * drm_detect_monitor_audio - check monitor audio capability
+ * @edid: EDID block to scan
+ *
+ * Monitor should have CEA extension block.
+ * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic
+ * audio' only. If there is any audio extension block and supported
+ * audio format, assume at least 'basic audio' support, even if 'basic
+ * audio' is not defined in EDID.
+ *
+ * Return: True if the monitor supports audio, false otherwise.
+ */
+bool drm_detect_monitor_audio(struct edid *edid)
+{
+	u8 *edid_ext;
+	int i, j;
+	bool has_audio = false;
+	int start_offset, end_offset;
+
+	edid_ext = drm_find_cea_extension(edid);
+	if (!edid_ext)
+		goto end;
+
+	has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0);
+
+	if (has_audio) {
+		printf("Monitor has basic audio support\n");
+		goto end;
+	}
+
+	if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
+		goto end;
+
+	for_each_cea_db(edid_ext, i, start_offset, end_offset) {
+		if (cea_db_tag(&edid_ext[i]) == AUDIO_BLOCK) {
+			has_audio = true;
+			for (j = 1; j < cea_db_payload_len(&edid_ext[i]) + 1;
+			     j += 3)
+				debug("CEA audio format %d\n",
+				      (edid_ext[i + j] >> 3) & 0xf);
+			goto end;
+		}
+	}
+end:
+	return has_audio;
+}
+
+static void
+drm_parse_hdmi_vsdb_video(struct hdmi_edid_data *data, const u8 *db)
+{
+	struct drm_display_info *info = &data->display_info;
+	u8 len = cea_db_payload_len(db);
+
+	if (len >= 6)
+		info->dvi_dual = db[6] & 1;
+	if (len >= 7)
+		info->max_tmds_clock = db[7] * 5000;
+
+	drm_parse_hdmi_deep_color_info(data, db);
+}
+
+static void drm_parse_cea_ext(struct hdmi_edid_data *data,
+			      struct edid *edid)
+{
+	struct drm_display_info *info = &data->display_info;
+	const u8 *edid_ext;
+	int i, start, end;
+
+	edid_ext = drm_find_cea_extension(edid);
+	if (!edid_ext)
+		return;
+
+	info->cea_rev = edid_ext[1];
+
+	/* The existence of a CEA block should imply RGB support */
+	info->color_formats = DRM_COLOR_FORMAT_RGB444;
+	if (edid_ext[3] & EDID_CEA_YCRCB444)
+		info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
+	if (edid_ext[3] & EDID_CEA_YCRCB422)
+		info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
+
+	if (cea_db_offsets(edid_ext, &start, &end))
+		return;
+
+	for_each_cea_db(edid_ext, i, start, end) {
+		const u8 *db = &edid_ext[i];
+
+		if (cea_db_is_hdmi_vsdb(db))
+			drm_parse_hdmi_vsdb_video(data, db);
+		if (cea_db_is_hdmi_forum_vsdb(db))
+			drm_parse_hdmi_forum_vsdb(data, db);
+		if (cea_db_is_y420cmdb(db))
+			drm_parse_y420cmdb_bitmap(data, db);
+	}
+}
+
+static void drm_add_display_info(struct hdmi_edid_data *data, struct edid *edid)
+{
+	struct drm_display_info *info = &data->display_info;
+
+	info->width_mm = edid->width_cm * 10;
+	info->height_mm = edid->height_cm * 10;
+
+	/* driver figures it out in this case */
+	info->bpc = 0;
+	info->color_formats = 0;
+	info->cea_rev = 0;
+	info->max_tmds_clock = 0;
+	info->dvi_dual = false;
+	info->edid_hdmi_dc_modes = 0;
+
+	memset(&info->hdmi, 0, sizeof(info->hdmi));
+
+	if (edid->revision < 3)
+		return;
+
+	if (!(edid->input & DRM_EDID_INPUT_DIGITAL))
+		return;
+
+	drm_parse_cea_ext(data, edid);
+
+	/*
+	 * Digital sink with "DFP 1.x compliant TMDS" according to EDID 1.3?
+	 *
+	 * For such displays, the DFP spec 1.0, section 3.10 "EDID support"
+	 * tells us to assume 8 bpc color depth if the EDID doesn't have
+	 * extensions which tell otherwise.
+	 */
+	if ((info->bpc == 0) && (edid->revision < 4) &&
+	    (edid->input & DRM_EDID_DIGITAL_TYPE_DVI)) {
+		info->bpc = 8;
+		debug("Assigning DFP sink color depth as %d bpc.\n", info->bpc);
+	}
+
+	/* Only defined for 1.4 with digital displays */
+	if (edid->revision < 4)
+		return;
+
+	switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) {
+	case DRM_EDID_DIGITAL_DEPTH_6:
+		info->bpc = 6;
+		break;
+	case DRM_EDID_DIGITAL_DEPTH_8:
+		info->bpc = 8;
+		break;
+	case DRM_EDID_DIGITAL_DEPTH_10:
+		info->bpc = 10;
+		break;
+	case DRM_EDID_DIGITAL_DEPTH_12:
+		info->bpc = 12;
+		break;
+	case DRM_EDID_DIGITAL_DEPTH_14:
+		info->bpc = 14;
+		break;
+	case DRM_EDID_DIGITAL_DEPTH_16:
+		info->bpc = 16;
+		break;
+	case DRM_EDID_DIGITAL_DEPTH_UNDEF:
+	default:
+		info->bpc = 0;
+		break;
+	}
+
+	debug("%s: Assigning EDID-1.4 digital sink color depth as %d bpc.\n",
+	      info->bpc);
+
+	info->color_formats |= DRM_COLOR_FORMAT_RGB444;
+	if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444)
+		info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
+	if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422)
+		info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
+}
+
+static
+int add_cea_modes(struct hdmi_edid_data *data, struct edid *edid)
+{
+	struct edid_cea861_info *info;
+	const u8 *cea = drm_find_cea_extension(edid);
+	const u8 *db, *hdmi = NULL, *video = NULL;
+	u8 dbl, hdmi_len, video_len = 0;
+	int modes = 0;
+	u8 end, i = 0;
+
+	if (cea && cea_revision(cea) >= 3) {
+		int i, start, end;
+
+		if (cea_db_offsets(cea, &start, &end))
+			return 0;
+
+		for_each_cea_db(cea, i, start, end) {
+			db = &cea[i];
+			dbl = cea_db_payload_len(db);
+
+			if (cea_db_tag(db) == EDID_CEA861_DB_VIDEO) {
+				video = db + 1;
+				video_len = dbl;
+				modes += do_cea_modes(video, dbl,
+						      &data->hdmi_info, data);
+			} else if (cea_db_is_hdmi_vsdb(db)) {
+				hdmi = db;
+				hdmi_len = dbl;
+			} else if (cea_db_is_y420vdb(db)) {
+				const u8 *vdb420 = &db[2];
+
+				/* Add 4:2:0(only) modes present in EDID */
+				modes += do_y420vdb_modes(vdb420, dbl - 1,
+							  &data->hdmi_info,
+							  data);
+			}
+		}
+	}
+
+	/*
+	 * We parse the HDMI VSDB after having added the cea modes as we will
+	 * be patching their flags when the sink supports stereo 3D.
+	 */
+	if (hdmi)
+		modes += do_hdmi_vsdb_modes(hdmi, hdmi_len, video,
+					    video_len, data);
+
+	return modes;
+}
+
+typedef void detailed_cb(struct detailed_timing *timing, void *closure);
+
+static
+void cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
+{
+	int i, n = 0;
+	u8 d = ext[0x02];
+	u8 *det_base = ext + d;
+
+	n = (127 - d) / 18;
+	for (i = 0; i < n; i++)
+		cb((struct detailed_timing *)(det_base + 18 * i), closure);
+}
+
+static
+void vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
+{
+	unsigned int i, n = min((int)ext[0x02], 6);
+	u8 *det_base = ext + 5;
+
+	if (ext[0x01] != 1)
+		return; /* unknown version */
+
+	for (i = 0; i < n; i++)
+		cb((struct detailed_timing *)(det_base + 18 * i), closure);
+}
+
+static
+void drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
+{
+	int i;
+	struct edid *edid = (struct edid *)raw_edid;
+
+	if (!edid)
+		return;
+
+	for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
+		cb(&edid->detailed_timings[i], closure);
+
+	for (i = 1; i <= raw_edid[0x7e]; i++) {
+		u8 *ext = raw_edid + (i * EDID_SIZE);
+
+		switch (*ext) {
+		case CEA_EXT:
+			cea_for_each_detailed_block(ext, cb, closure);
+			break;
+		case VTB_EXT:
+			vtb_for_each_detailed_block(ext, cb, closure);
+			break;
+		default:
+			break;
+		}
+	}
+}
+
+/*
+ * EDID is delightfully ambiguous about how interlaced modes are to be
+ * encoded.  Our internal representation is of frame height, but some
+ * HDTV detailed timings are encoded as field height.
+ *
+ * The format list here is from CEA, in frame size.  Technically we
+ * should be checking refresh rate too.  Whatever.
+ */
+static void
+drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
+			    struct detailed_pixel_timing *pt)
+{
+	int i;
+
+	static const struct {
+		int w, h;
+	} cea_interlaced[] = {
+		{ 1920, 1080 },
+		{  720,  480 },
+		{ 1440,  480 },
+		{ 2880,  480 },
+		{  720,  576 },
+		{ 1440,  576 },
+		{ 2880,  576 },
+	};
+
+	if (!(pt->misc & DRM_EDID_PT_INTERLACED))
+		return;
+
+	for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) {
+		if ((mode->hdisplay == cea_interlaced[i].w) &&
+		    (mode->vdisplay == cea_interlaced[i].h / 2)) {
+			mode->vdisplay *= 2;
+			mode->vsync_start *= 2;
+			mode->vsync_end *= 2;
+			mode->vtotal *= 2;
+			mode->vtotal |= 1;
+		}
+	}
+
+	mode->flags |= DRM_MODE_FLAG_INTERLACE;
+}
+
+/**
+ * drm_mode_detailed - create a new mode from an EDID detailed timing section
+ * @edid: EDID block
+ * @timing: EDID detailed timing info
+ * @quirks: quirks to apply
+ *
+ * An EDID detailed timing block contains enough info for us to create and
+ * return a new struct drm_display_mode.
+ */
+static
+struct drm_display_mode *drm_mode_detailed(struct edid *edid,
+					   struct detailed_timing *timing,
+					   u32 quirks)
+{
+	struct drm_display_mode *mode;
+	struct detailed_pixel_timing *pt = &timing->data.pixel_data;
+	unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
+	unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
+	unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
+	unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
+	unsigned hsync_offset =
+		(pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 |
+		pt->hsync_offset_lo;
+	unsigned hsync_pulse_width =
+		(pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 |
+		pt->hsync_pulse_width_lo;
+	unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) <<
+		2 | pt->vsync_offset_pulse_width_lo >> 4;
+	unsigned vsync_pulse_width =
+		(pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 |
+		(pt->vsync_offset_pulse_width_lo & 0xf);
+
+	/* ignore tiny modes */
+	if (hactive < 64 || vactive < 64)
+		return NULL;
+
+	if (pt->misc & DRM_EDID_PT_STEREO) {
+		debug("stereo mode not supported\n");
+		return NULL;
+	}
+	if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC))
+		debug("composite sync not supported\n");
+
+	/* it is incorrect if hsync/vsync width is zero */
+	if (!hsync_pulse_width || !vsync_pulse_width) {
+		debug("Incorrect Detailed timing. "
+		      "Wrong Hsync/Vsync pulse width\n");
+		return NULL;
+	}
+
+	if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) {
+		mode = drm_cvt_mode(hactive, vactive, 60, true, false, false);
+		if (!mode)
+			return NULL;
+
+		goto set_refresh;
+	}
+
+	mode = drm_mode_create();
+	if (!mode)
+		return NULL;
+
+	if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
+		timing->pixel_clock = cpu_to_le16(1088);
+
+	mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
+
+	mode->hdisplay = hactive;
+	mode->hsync_start = mode->hdisplay + hsync_offset;
+	mode->hsync_end = mode->hsync_start + hsync_pulse_width;
+	mode->htotal = mode->hdisplay + hblank;
+
+	mode->vdisplay = vactive;
+	mode->vsync_start = mode->vdisplay + vsync_offset;
+	mode->vsync_end = mode->vsync_start + vsync_pulse_width;
+	mode->vtotal = mode->vdisplay + vblank;
+
+	/* Some EDIDs have bogus h/vtotal values */
+	if (mode->hsync_end > mode->htotal)
+		mode->htotal = mode->hsync_end + 1;
+	if (mode->vsync_end > mode->vtotal)
+		mode->vtotal = mode->vsync_end + 1;
+
+	drm_mode_do_interlace_quirk(mode, pt);
+
+	if (quirks & EDID_QUIRK_DETAILED_SYNC_PP)
+		pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE |
+			DRM_EDID_PT_VSYNC_POSITIVE;
+
+	mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
+		DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
+	mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
+		DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
+
+set_refresh:
+
+	mode->vrefresh = drm_mode_vrefresh(mode);
+
+	return mode;
+}
+
+/*
+ * Calculate the alternate clock for the CEA mode
+ * (60Hz vs. 59.94Hz etc.)
+ */
+static unsigned int
+cea_mode_alternate_clock(const struct drm_display_mode *cea_mode)
+{
+	unsigned int clock = cea_mode->clock;
+
+	if (cea_mode->vrefresh % 6 != 0)
+		return clock;
+
+	/*
+	 * edid_cea_modes contains the 59.94Hz
+	 * variant for 240 and 480 line modes,
+	 * and the 60Hz variant otherwise.
+	 */
+	if (cea_mode->vdisplay == 240 || cea_mode->vdisplay == 480)
+		clock = DIV_ROUND_CLOSEST(clock * 1001, 1000);
+	else
+		clock = DIV_ROUND_CLOSEST(clock * 1000, 1001);
+
+	return clock;
+}
+
+/**
+ * drm_mode_equal_no_clocks_no_stereo - test modes for equality
+ * @mode1: first mode
+ * @mode2: second mode
+ *
+ * Check to see if @mode1 and @mode2 are equivalent, but
+ * don't check the pixel clocks nor the stereo layout.
+ *
+ * Returns:
+ * True if the modes are equal, false otherwise.
+ */
+
+static
+bool drm_mode_equal_no_clocks_no_stereo(const struct drm_display_mode *mode1,
+					const struct drm_display_mode *mode2)
+{
+	unsigned int flags_mask =
+		~(DRM_MODE_FLAG_3D_MASK | DRM_MODE_FLAG_420_MASK);
+
+	if (mode1->hdisplay == mode2->hdisplay &&
+	    mode1->hsync_start == mode2->hsync_start &&
+	    mode1->hsync_end == mode2->hsync_end &&
+	    mode1->htotal == mode2->htotal &&
+	    mode1->vdisplay == mode2->vdisplay &&
+	    mode1->vsync_start == mode2->vsync_start &&
+	    mode1->vsync_end == mode2->vsync_end &&
+	    mode1->vtotal == mode2->vtotal &&
+	    mode1->vscan == mode2->vscan &&
+	    (mode1->flags & flags_mask) == (mode2->flags & flags_mask))
+		return true;
+
+	return false;
+}
+
+/**
+ * drm_mode_equal_no_clocks - test modes for equality
+ * @mode1: first mode
+ * @mode2: second mode
+ *
+ * Check to see if @mode1 and @mode2 are equivalent, but
+ * don't check the pixel clocks.
+ *
+ * Returns:
+ * True if the modes are equal, false otherwise.
+ */
+static bool drm_mode_equal_no_clocks(const struct drm_display_mode *mode1,
+				     const struct drm_display_mode *mode2)
+{
+	if ((mode1->flags & DRM_MODE_FLAG_3D_MASK) !=
+	    (mode2->flags & DRM_MODE_FLAG_3D_MASK))
+		return false;
+
+	return drm_mode_equal_no_clocks_no_stereo(mode1, mode2);
+}
+
+static
+u8 drm_match_cea_mode_clock_tolerance(const struct drm_display_mode *to_match,
+				      unsigned int clock_tolerance)
+{
+	u8 vic;
+
+	if (!to_match->clock)
+		return 0;
+
+	for (vic = 1; vic < ARRAY_SIZE(edid_cea_modes); vic++) {
+		const struct drm_display_mode *cea_mode = &edid_cea_modes[vic];
+		unsigned int clock1, clock2;
+
+		/* Check both 60Hz and 59.94Hz */
+		clock1 = cea_mode->clock;
+		clock2 = cea_mode_alternate_clock(cea_mode);
+
+		if (abs(to_match->clock - clock1) > clock_tolerance &&
+		    abs(to_match->clock - clock2) > clock_tolerance)
+			continue;
+
+		if (drm_mode_equal_no_clocks(to_match, cea_mode))
+			return vic;
+	}
+
+	return 0;
+}
+
+static unsigned int
+hdmi_mode_alternate_clock(const struct drm_display_mode *hdmi_mode)
+{
+	if (hdmi_mode->vdisplay == 4096 && hdmi_mode->hdisplay == 2160)
+		return hdmi_mode->clock;
+
+	return cea_mode_alternate_clock(hdmi_mode);
+}
+
+static
+u8 drm_match_hdmi_mode_clock_tolerance(const struct drm_display_mode *to_match,
+				       unsigned int clock_tolerance)
+{
+	u8 vic;
+
+	if (!to_match->clock)
+		return 0;
+
+	for (vic = 1; vic < ARRAY_SIZE(edid_4k_modes); vic++) {
+		const struct drm_display_mode *hdmi_mode = &edid_4k_modes[vic];
+		unsigned int clock1, clock2;
+
+		/* Make sure to also match alternate clocks */
+		clock1 = hdmi_mode->clock;
+		clock2 = hdmi_mode_alternate_clock(hdmi_mode);
+
+		if (abs(to_match->clock - clock1) > clock_tolerance &&
+		    abs(to_match->clock - clock2) > clock_tolerance)
+			continue;
+
+		if (drm_mode_equal_no_clocks(to_match, hdmi_mode))
+			return vic;
+	}
+
+	return 0;
+}
+
+static void fixup_detailed_cea_mode_clock(struct drm_display_mode *mode)
+{
+	const struct drm_display_mode *cea_mode;
+	int clock1, clock2, clock;
+	u8 vic;
+	const char *type;
+
+	/*
+	 * allow 5kHz clock difference either way to account for
+	 * the 10kHz clock resolution limit of detailed timings.
+	 */
+	vic = drm_match_cea_mode_clock_tolerance(mode, 5);
+	if (drm_valid_cea_vic(vic)) {
+		type = "CEA";
+		cea_mode = &edid_cea_modes[vic];
+		clock1 = cea_mode->clock;
+		clock2 = cea_mode_alternate_clock(cea_mode);
+	} else {
+		vic = drm_match_hdmi_mode_clock_tolerance(mode, 5);
+		if (drm_valid_hdmi_vic(vic)) {
+			type = "HDMI";
+			cea_mode = &edid_4k_modes[vic];
+			clock1 = cea_mode->clock;
+			clock2 = hdmi_mode_alternate_clock(cea_mode);
+		} else {
+			return;
+		}
+	}
+
+	/* pick whichever is closest */
+	if (abs(mode->clock - clock1) < abs(mode->clock - clock2))
+		clock = clock1;
+	else
+		clock = clock2;
+
+	if (mode->clock == clock)
+		return;
+
+	debug("detailed mode matches %s VIC %d, adjusting clock %d -> %d\n",
+	      type, vic, mode->clock, clock);
+	mode->clock = clock;
+}
+
+static void
+do_detailed_mode(struct detailed_timing *timing, void *c)
+{
+	struct detailed_mode_closure *closure = c;
+	struct drm_display_mode *newmode;
+
+	if (timing->pixel_clock) {
+		newmode = drm_mode_detailed(
+					    closure->edid, timing,
+					    closure->quirks);
+		if (!newmode)
+			return;
+
+		/*
+		 * Detailed modes are limited to 10kHz pixel clock resolution,
+		 * so fix up anything that looks like CEA/HDMI mode,
+		 * but the clock is just slightly off.
+		 */
+		fixup_detailed_cea_mode_clock(newmode);
+		drm_add_hdmi_modes(closure->data, newmode);
+		drm_mode_destroy(newmode);
+		closure->modes++;
+	}
+}
+
+/*
+ * add_detailed_modes - Add modes from detailed timings
+ * @data: attached data
+ * @edid: EDID block to scan
+ * @quirks: quirks to apply
+ */
+static int
+add_detailed_modes(struct hdmi_edid_data *data, struct edid *edid,
+		   u32 quirks)
+{
+	struct detailed_mode_closure closure = {
+		.data = data,
+		.edid = edid,
+		.quirks = quirks,
+	};
+
+	drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure);
+
+	return closure.modes;
+}
+
+static int drm_cvt_modes(struct hdmi_edid_data *data,
+			 struct detailed_timing *timing)
+{
+	int i, j, modes = 0;
+	struct drm_display_mode *newmode;
+	struct cvt_timing *cvt;
+	const int rates[] = { 60, 85, 75, 60, 50 };
+	const u8 empty[3] = { 0, 0, 0 };
+
+	for (i = 0; i < 4; i++) {
+		int uninitialized_var(width), height;
+
+		cvt = &timing->data.other_data.data.cvt[i];
+
+		if (!memcmp(cvt->code, empty, 3))
+			continue;
+
+		height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
+		switch (cvt->code[1] & 0x0c) {
+		case 0x00:
+			width = height * 4 / 3;
+			break;
+		case 0x04:
+			width = height * 16 / 9;
+			break;
+		case 0x08:
+			width = height * 16 / 10;
+			break;
+		case 0x0c:
+			width = height * 15 / 9;
+			break;
+		}
+
+		for (j = 1; j < 5; j++) {
+			if (cvt->code[2] & (1 << j)) {
+				newmode = drm_cvt_mode(width, height,
+						       rates[j], j == 0,
+						       false, false);
+				if (newmode) {
+					drm_add_hdmi_modes(data, newmode);
+					modes++;
+					drm_mode_destroy(newmode);
+				}
+			}
+		}
+	}
+
+	return modes;
+}
+
+static void
+do_cvt_mode(struct detailed_timing *timing, void *c)
+{
+	struct detailed_mode_closure *closure = c;
+	struct detailed_non_pixel *data = &timing->data.other_data;
+
+	if (data->type == EDID_DETAIL_CVT_3BYTE)
+		closure->modes += drm_cvt_modes(closure->data, timing);
+}
+
+static int
+add_cvt_modes(struct hdmi_edid_data *data, struct edid *edid)
+{
+	struct detailed_mode_closure closure = {
+		.data = data,
+		.edid = edid,
+	};
+
+	if (version_greater(edid, 1, 2))
+		drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure);
+
+	/* XXX should also look for CVT codes in VTB blocks */
+
+	return closure.modes;
+}
+
+static void
+find_gtf2(struct detailed_timing *t, void *data)
+{
+	u8 *r = (u8 *)t;
+
+	if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02)
+		*(u8 **)data = r;
+}
+
+/* Secondary GTF curve kicks in above some break frequency */
+static int
+drm_gtf2_hbreak(struct edid *edid)
+{
+	u8 *r = NULL;
+
+	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
+	return r ? (r[12] * 2) : 0;
+}
+
+static int
+drm_gtf2_2c(struct edid *edid)
+{
+	u8 *r = NULL;
+
+	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
+	return r ? r[13] : 0;
+}
+
+static int
+drm_gtf2_m(struct edid *edid)
+{
+	u8 *r = NULL;
+
+	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
+	return r ? (r[15] << 8) + r[14] : 0;
+}
+
+static int
+drm_gtf2_k(struct edid *edid)
+{
+	u8 *r = NULL;
+
+	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
+	return r ? r[16] : 0;
+}
+
+static int
+drm_gtf2_2j(struct edid *edid)
+{
+	u8 *r = NULL;
+
+	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
+	return r ? r[17] : 0;
+}
+
+/**
+ * standard_timing_level - get std. timing level(CVT/GTF/DMT)
+ * @edid: EDID block to scan
+ */
+static int standard_timing_level(struct edid *edid)
+{
+	if (edid->revision >= 2) {
+		if (edid->revision >= 4 &&
+		    (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
+			return LEVEL_CVT;
+		if (drm_gtf2_hbreak(edid))
+			return LEVEL_GTF2;
+		return LEVEL_GTF;
+	}
+	return LEVEL_DMT;
+}
+
+/*
+ * 0 is reserved.  The spec says 0x01 fill for unused timings.  Some old
+ * monitors fill with ascii space (0x20) instead.
+ */
+static int
+bad_std_timing(u8 a, u8 b)
+{
+	return (a == 0x00 && b == 0x00) ||
+	       (a == 0x01 && b == 0x01) ||
+	       (a == 0x20 && b == 0x20);
+}
+
+static void
+is_rb(struct detailed_timing *t, void *data)
+{
+	u8 *r = (u8 *)t;
+
+	if (r[3] == EDID_DETAIL_MONITOR_RANGE)
+		if (r[15] & 0x10)
+			*(bool *)data = true;
+}
+
+/* EDID 1.4 defines this explicitly.  For EDID 1.3, we guess, badly. */
+static bool
+drm_monitor_supports_rb(struct edid *edid)
+{
+	if (edid->revision >= 4) {
+		bool ret = false;
+
+		drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
+		return ret;
+	}
+
+	return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
+}
+
+static bool
+mode_is_rb(const struct drm_display_mode *mode)
+{
+	return (mode->htotal - mode->hdisplay == 160) &&
+	       (mode->hsync_end - mode->hdisplay == 80) &&
+	       (mode->hsync_end - mode->hsync_start == 32) &&
+	       (mode->vsync_start - mode->vdisplay == 3);
+}
+
+/*
+ * drm_mode_find_dmt - Create a copy of a mode if present in DMT
+ * @hsize: Mode width
+ * @vsize: Mode height
+ * @fresh: Mode refresh rate
+ * @rb: Mode reduced-blanking-ness
+ *
+ * Walk the DMT mode list looking for a match for the given parameters.
+ *
+ * Return: A newly allocated copy of the mode, or NULL if not found.
+ */
+static struct drm_display_mode *drm_mode_find_dmt(
+					   int hsize, int vsize, int fresh,
+					   bool rb)
+{
+	int i;
+	struct drm_display_mode *newmode;
+
+	for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
+		const struct drm_display_mode *ptr = &drm_dmt_modes[i];
+
+		if (hsize != ptr->hdisplay)
+			continue;
+		if (vsize != ptr->vdisplay)
+			continue;
+		if (fresh != drm_mode_vrefresh(ptr))
+			continue;
+		if (rb != mode_is_rb(ptr))
+			continue;
+
+		newmode = drm_mode_create();
+		*newmode = *ptr;
+		return newmode;
+	}
+
+	return NULL;
+}
+
+static struct drm_display_mode *
+drm_gtf_mode_complex(int hdisplay, int vdisplay,
+		     int vrefresh, bool interlaced, int margins,
+		     int GTF_M, int GTF_2C, int GTF_K, int GTF_2J)
+{	/* 1) top/bottom margin size (% of height) - default: 1.8, */
+#define	GTF_MARGIN_PERCENTAGE		18
+	/* 2) character cell horizontal granularity (pixels) - default 8 */
+#define	GTF_CELL_GRAN			8
+	/* 3) Minimum vertical porch (lines) - default 3 */
+#define	GTF_MIN_V_PORCH			1
+	/* width of vsync in lines */
+#define V_SYNC_RQD			3
+	/* width of hsync as % of total line */
+#define H_SYNC_PERCENT			8
+	/* min time of vsync + back porch (microsec) */
+#define MIN_VSYNC_PLUS_BP		550
+	/* C' and M' are part of the Blanking Duty Cycle computation */
+#define GTF_C_PRIME	((((GTF_2C - GTF_2J) * GTF_K / 256) + GTF_2J) / 2)
+#define GTF_M_PRIME	(GTF_K * GTF_M / 256)
+	struct drm_display_mode *drm_mode;
+	unsigned int hdisplay_rnd, vdisplay_rnd, vfieldrate_rqd;
+	int top_margin, bottom_margin;
+	int interlace;
+	unsigned int hfreq_est;
+	int vsync_plus_bp, vback_porch;
+	unsigned int vtotal_lines, vfieldrate_est, hperiod;
+	unsigned int vfield_rate, vframe_rate;
+	int left_margin, right_margin;
+	unsigned int total_active_pixels, ideal_duty_cycle;
+	unsigned int hblank, total_pixels, pixel_freq;
+	int hsync, hfront_porch, vodd_front_porch_lines;
+	unsigned int tmp1, tmp2;
+
+	drm_mode = drm_mode_create();
+	if (!drm_mode)
+		return NULL;
+
+	/* 1. In order to give correct results, the number of horizontal
+	 * pixels requested is first processed to ensure that it is divisible
+	 * by the character size, by rounding it to the nearest character
+	 * cell boundary:
+	 */
+	hdisplay_rnd = (hdisplay + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
+	hdisplay_rnd = hdisplay_rnd * GTF_CELL_GRAN;
+
+	/* 2. If interlace is requested, the number of vertical lines assumed
+	 * by the calculation must be halved, as the computation calculates
+	 * the number of vertical lines per field.
+	 */
+	if (interlaced)
+		vdisplay_rnd = vdisplay / 2;
+	else
+		vdisplay_rnd = vdisplay;
+
+	/* 3. Find the frame rate required: */
+	if (interlaced)
+		vfieldrate_rqd = vrefresh * 2;
+	else
+		vfieldrate_rqd = vrefresh;
+
+	/* 4. Find number of lines in Top margin: */
+	top_margin = 0;
+	if (margins)
+		top_margin = (vdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
+				1000;
+	/* 5. Find number of lines in bottom margin: */
+	bottom_margin = top_margin;
+
+	/* 6. If interlace is required, then set variable interlace: */
+	if (interlaced)
+		interlace = 1;
+	else
+		interlace = 0;
+
+	/* 7. Estimate the Horizontal frequency */
+	{
+		tmp1 = (1000000  - MIN_VSYNC_PLUS_BP * vfieldrate_rqd) / 500;
+		tmp2 = (vdisplay_rnd + 2 * top_margin + GTF_MIN_V_PORCH) *
+				2 + interlace;
+		hfreq_est = (tmp2 * 1000 * vfieldrate_rqd) / tmp1;
+	}
+
+	/* 8. Find the number of lines in V sync + back porch */
+	/* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */
+	vsync_plus_bp = MIN_VSYNC_PLUS_BP * hfreq_est / 1000;
+	vsync_plus_bp = (vsync_plus_bp + 500) / 1000;
+	/*  9. Find the number of lines in V back porch alone: */
+	vback_porch = vsync_plus_bp - V_SYNC_RQD;
+	/*  10. Find the total number of lines in Vertical field period: */
+	vtotal_lines = vdisplay_rnd + top_margin + bottom_margin +
+			vsync_plus_bp + GTF_MIN_V_PORCH;
+	/*  11. Estimate the Vertical field frequency: */
+	vfieldrate_est = hfreq_est / vtotal_lines;
+	/*  12. Find the actual horizontal period: */
+	hperiod = 1000000 / (vfieldrate_rqd * vtotal_lines);
+
+	/*  13. Find the actual Vertical field frequency: */
+	vfield_rate = hfreq_est / vtotal_lines;
+	/*  14. Find the Vertical frame frequency: */
+	if (interlaced)
+		vframe_rate = vfield_rate / 2;
+	else
+		vframe_rate = vfield_rate;
+	/*  15. Find number of pixels in left margin: */
+	if (margins)
+		left_margin = (hdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
+				1000;
+	else
+		left_margin = 0;
+
+	/* 16.Find number of pixels in right margin: */
+	right_margin = left_margin;
+	/* 17.Find total number of active pixels in image and left and right */
+	total_active_pixels = hdisplay_rnd + left_margin + right_margin;
+	/* 18.Find the ideal blanking duty cycle from blanking duty cycle */
+	ideal_duty_cycle = GTF_C_PRIME * 1000 -
+				(GTF_M_PRIME * 1000000 / hfreq_est);
+	/* 19.Find the number of pixels in the blanking time to the nearest
+	 * double character cell:
+	 */
+	hblank = total_active_pixels * ideal_duty_cycle /
+			(100000 - ideal_duty_cycle);
+	hblank = (hblank + GTF_CELL_GRAN) / (2 * GTF_CELL_GRAN);
+	hblank = hblank * 2 * GTF_CELL_GRAN;
+	/* 20.Find total number of pixels: */
+	total_pixels = total_active_pixels + hblank;
+	/* 21.Find pixel clock frequency: */
+	pixel_freq = total_pixels * hfreq_est / 1000;
+	/* Stage 1 computations are now complete; I should really pass
+	 * the results to another function and do the Stage 2 computations,
+	 * but I only need a few more values so I'll just append the
+	 * computations here for now
+	 */
+
+	/* 17. Find the number of pixels in the horizontal sync period: */
+	hsync = H_SYNC_PERCENT * total_pixels / 100;
+	hsync = (hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
+	hsync = hsync * GTF_CELL_GRAN;
+	/* 18. Find the number of pixels in horizontal front porch period */
+	hfront_porch = hblank / 2 - hsync;
+	/*  36. Find the number of lines in the odd front porch period: */
+	vodd_front_porch_lines = GTF_MIN_V_PORCH;
+
+	/* finally, pack the results in the mode struct */
+	drm_mode->hdisplay = hdisplay_rnd;
+	drm_mode->hsync_start = hdisplay_rnd + hfront_porch;
+	drm_mode->hsync_end = drm_mode->hsync_start + hsync;
+	drm_mode->htotal = total_pixels;
+	drm_mode->vdisplay = vdisplay_rnd;
+	drm_mode->vsync_start = vdisplay_rnd + vodd_front_porch_lines;
+	drm_mode->vsync_end = drm_mode->vsync_start + V_SYNC_RQD;
+	drm_mode->vtotal = vtotal_lines;
+
+	drm_mode->clock = pixel_freq;
+
+	if (interlaced) {
+		drm_mode->vtotal *= 2;
+		drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
+	}
+
+	if (GTF_M == 600 && GTF_2C == 80 && GTF_K == 128 && GTF_2J == 40)
+		drm_mode->flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC;
+	else
+		drm_mode->flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC;
+
+	return drm_mode;
+}
+
+/**
+ * drm_gtf_mode - create the mode based on the GTF algorithm
+ * @hdisplay: hdisplay size
+ * @vdisplay: vdisplay size
+ * @vrefresh: vrefresh rate.
+ * @interlaced: whether to compute an interlaced mode
+ * @margins: desired margin (borders) size
+ *
+ * return the mode based on GTF algorithm
+ *
+ * This function is to create the mode based on the GTF algorithm.
+ * Generalized Timing Formula is derived from:
+ *	GTF Spreadsheet by Andy Morrish (1/5/97)
+ *	available at http://www.vesa.org
+ *
+ * And it is copied from the file of xserver/hw/xfree86/modes/xf86gtf.c.
+ * What I have done is to translate it by using integer calculation.
+ * I also refer to the function of fb_get_mode in the file of
+ * drivers/video/fbmon.c
+ *
+ * Standard GTF parameters:
+ * M = 600
+ * C = 40
+ * K = 128
+ * J = 20
+ *
+ * Returns:
+ * The modeline based on the GTF algorithm stored in a drm_display_mode object.
+ * The display mode object is allocated with drm_mode_create(). Returns NULL
+ * when no mode could be allocated.
+ */
+static struct drm_display_mode *
+drm_gtf_mode(int hdisplay, int vdisplay, int vrefresh,
+	     bool interlaced, int margins)
+{
+	return drm_gtf_mode_complex(hdisplay, vdisplay, vrefresh,
+				    interlaced, margins,
+				    600, 40 * 2, 128, 20 * 2);
+}
+
+/** drm_mode_hsync - get the hsync of a mode
+ * @mode: mode
+ *
+ * Returns:
+ * @modes's hsync rate in kHz, rounded to the nearest integer. Calculates the
+ * value first if it is not yet set.
+ */
+static int drm_mode_hsync(const struct drm_display_mode *mode)
+{
+	unsigned int calc_val;
+
+	if (mode->htotal < 0)
+		return 0;
+
+	calc_val = (mode->clock * 1000) / mode->htotal; /* hsync in Hz */
+	calc_val += 500;				/* round to 1000Hz */
+	calc_val /= 1000;				/* truncate to kHz */
+
+	return calc_val;
+}
+
+/**
+ * drm_mode_std - convert standard mode info (width, height, refresh) into mode
+ * @data: the structure that save parsed hdmi edid data
+ * @edid: EDID block to scan
+ * @t: standard timing params
+ *
+ * Take the standard timing params (in this case width, aspect, and refresh)
+ * and convert them into a real mode using CVT/GTF/DMT.
+ */
+static struct drm_display_mode *
+drm_mode_std(struct hdmi_edid_data *data, struct edid *edid,
+	     struct std_timing *t)
+{
+	struct drm_display_mode *m, *mode = NULL;
+	int i, hsize, vsize;
+	int vrefresh_rate;
+	int num = data->modes;
+	unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
+		>> EDID_TIMING_ASPECT_SHIFT;
+	unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
+		>> EDID_TIMING_VFREQ_SHIFT;
+	int timing_level = standard_timing_level(edid);
+
+	if (bad_std_timing(t->hsize, t->vfreq_aspect))
+		return NULL;
+
+	/* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
+	hsize = t->hsize * 8 + 248;
+	/* vrefresh_rate = vfreq + 60 */
+	vrefresh_rate = vfreq + 60;
+	/* the vdisplay is calculated based on the aspect ratio */
+	if (aspect_ratio == 0) {
+		if (edid->revision < 3)
+			vsize = hsize;
+		else
+			vsize = (hsize * 10) / 16;
+	} else if (aspect_ratio == 1) {
+		vsize = (hsize * 3) / 4;
+	} else if (aspect_ratio == 2) {
+		vsize = (hsize * 4) / 5;
+	} else {
+		vsize = (hsize * 9) / 16;
+	}
+
+	/* HDTV hack, part 1 */
+	if (vrefresh_rate == 60 &&
+	    ((hsize == 1360 && vsize == 765) ||
+	     (hsize == 1368 && vsize == 769))) {
+		hsize = 1366;
+		vsize = 768;
+	}
+
+	/*
+	 * If we already has a mode for this size and refresh
+	 * rate (because it came from detailed or CVT info), use that
+	 * instead.  This way we don't have to guess at interlace or
+	 * reduced blanking.
+	 */
+	for (i = 0; i < num; i++)
+		if (data->mode_buf[i].hdisplay == hsize &&
+		    data->mode_buf[i].hdisplay &&
+		    drm_mode_vrefresh(&data->mode_buf[i]) == vrefresh_rate)
+			return NULL;
+
+	/* HDTV hack, part 2 */
+	if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) {
+		mode = drm_cvt_mode(1366, 768, vrefresh_rate, 0, 0,
+				    false);
+		mode->hdisplay = 1366;
+		mode->hsync_start = mode->hsync_start - 1;
+		mode->hsync_end = mode->hsync_end - 1;
+		return mode;
+	}
+
+	/* check whether it can be found in default mode table */
+	if (drm_monitor_supports_rb(edid)) {
+		mode = drm_mode_find_dmt(hsize, vsize, vrefresh_rate,
+					 true);
+		if (mode)
+			return mode;
+	}
+
+	mode = drm_mode_find_dmt(hsize, vsize, vrefresh_rate, false);
+	if (mode)
+		return mode;
+
+	/* okay, generate it */
+	switch (timing_level) {
+	case LEVEL_DMT:
+		break;
+	case LEVEL_GTF:
+		mode = drm_gtf_mode(hsize, vsize, vrefresh_rate, 0, 0);
+		break;
+	case LEVEL_GTF2:
+		/*
+		 * This is potentially wrong if there's ever a monitor with
+		 * more than one ranges section, each claiming a different
+		 * secondary GTF curve.  Please don't do that.
+		 */
+		mode = drm_gtf_mode(hsize, vsize, vrefresh_rate, 0, 0);
+		if (!mode)
+			return NULL;
+		if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) {
+			drm_mode_destroy(mode);
+			mode = drm_gtf_mode_complex(hsize, vsize,
+						    vrefresh_rate, 0, 0,
+						    drm_gtf2_m(edid),
+						    drm_gtf2_2c(edid),
+						    drm_gtf2_k(edid),
+						    drm_gtf2_2j(edid));
+		}
+		break;
+	case LEVEL_CVT:
+		mode = drm_cvt_mode(hsize, vsize, vrefresh_rate, 0, 0,
+				    false);
+		break;
+	}
+
+	return mode;
+}
+
+static void
+do_standard_modes(struct detailed_timing *timing, void *c)
+{
+	struct detailed_mode_closure *closure = c;
+	struct detailed_non_pixel *data = &timing->data.other_data;
+	struct edid *edid = closure->edid;
+
+	if (data->type == EDID_DETAIL_STD_MODES) {
+		int i;
+
+		for (i = 0; i < 6; i++) {
+			struct std_timing *std;
+			struct drm_display_mode *newmode;
+
+			std = &data->data.timings[i];
+			newmode = drm_mode_std(closure->data, edid, std);
+			if (newmode) {
+				drm_add_hdmi_modes(closure->data, newmode);
+				closure->modes++;
+				drm_mode_destroy(newmode);
+			}
+		}
+	}
+}
+
+/**
+ * add_standard_modes - get std. modes from EDID and add them
+ * @data: data to add mode(s) to
+ * @edid: EDID block to scan
+ *
+ * Standard modes can be calculated using the appropriate standard (DMT,
+ * GTF or CVT. Grab them from @edid and add them to the list.
+ */
+static int
+add_standard_modes(struct hdmi_edid_data *data, struct edid *edid)
+{
+	int i, modes = 0;
+	struct detailed_mode_closure closure = {
+		.data = data,
+		.edid = edid,
+	};
+
+	for (i = 0; i < EDID_STD_TIMINGS; i++) {
+		struct drm_display_mode *newmode;
+
+		newmode = drm_mode_std(data, edid,
+				       &edid->standard_timings[i]);
+		if (newmode) {
+			drm_add_hdmi_modes(data, newmode);
+			modes++;
+			drm_mode_destroy(newmode);
+		}
+	}
+
+	if (version_greater(edid, 1, 0))
+		drm_for_each_detailed_block((u8 *)edid, do_standard_modes,
+					    &closure);
+
+	/* XXX should also look for standard codes in VTB blocks */
+
+	return modes + closure.modes;
+}
+
+static int
+drm_est3_modes(struct hdmi_edid_data *data, struct detailed_timing *timing)
+{
+	int i, j, m, modes = 0;
+	struct drm_display_mode *mode;
+	u8 *est = ((u8 *)timing) + 6;
+
+	for (i = 0; i < 6; i++) {
+		for (j = 7; j >= 0; j--) {
+			m = (i * 8) + (7 - j);
+			if (m >= ARRAY_SIZE(est3_modes))
+				break;
+			if (est[i] & (1 << j)) {
+				mode = drm_mode_find_dmt(
+							 est3_modes[m].w,
+							 est3_modes[m].h,
+							 est3_modes[m].r,
+							 est3_modes[m].rb);
+				if (mode) {
+					drm_add_hdmi_modes(data, mode);
+					modes++;
+					drm_mode_destroy(mode);
+				}
+			}
+		}
+	}
+
+	return modes;
+}
+
+static void
+do_established_modes(struct detailed_timing *timing, void *c)
+{
+	struct detailed_mode_closure *closure = c;
+	struct detailed_non_pixel *data = &timing->data.other_data;
+
+	if (data->type == EDID_DETAIL_EST_TIMINGS)
+		closure->modes += drm_est3_modes(closure->data, timing);
+}
+
+/**
+ * add_established_modes - get est. modes from EDID and add them
+ * @data: data to add mode(s) to
+ * @edid: EDID block to scan
+ *
+ * Each EDID block contains a bitmap of the supported "established modes" list
+ * (defined above).  Tease them out and add them to the modes list.
+ */
+static int
+add_established_modes(struct hdmi_edid_data *data, struct edid *edid)
+{
+	unsigned long est_bits = edid->established_timings.t1 |
+		(edid->established_timings.t2 << 8) |
+		((edid->established_timings.mfg_rsvd & 0x80) << 9);
+	int i, modes = 0;
+	struct detailed_mode_closure closure = {
+		.data = data,
+		.edid = edid,
+	};
+
+	for (i = 0; i <= EDID_EST_TIMINGS; i++) {
+		if (est_bits & (1 << i)) {
+			struct drm_display_mode *newmode = drm_mode_create();
+			*newmode = edid_est_modes[i];
+			if (newmode) {
+				drm_add_hdmi_modes(data, newmode);
+				modes++;
+				drm_mode_destroy(newmode);
+			}
+		}
+	}
+
+	if (version_greater(edid, 1, 0))
+		drm_for_each_detailed_block((u8 *)edid,
+					    do_established_modes, &closure);
+
+	return modes + closure.modes;
+}
+
+static u8 drm_match_hdmi_mode(const struct drm_display_mode *to_match)
+{
+	u8 vic;
+
+	if (!to_match->clock)
+		return 0;
+
+	for (vic = 1; vic < ARRAY_SIZE(edid_4k_modes); vic++) {
+		const struct drm_display_mode *hdmi_mode = &edid_4k_modes[vic];
+		unsigned int clock1, clock2;
+
+		/* Make sure to also match alternate clocks */
+		clock1 = hdmi_mode->clock;
+		clock2 = hdmi_mode_alternate_clock(hdmi_mode);
+
+		if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) ||
+		     KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
+		    drm_mode_equal_no_clocks_no_stereo(to_match, hdmi_mode))
+			return vic;
+	}
+	return 0;
+}
+
+static int
+add_alternate_cea_modes(struct hdmi_edid_data *data, struct edid *edid)
+{
+	struct drm_display_mode *mode, *tmp;
+	int i, num, modes = 0;
+
+	/* Don't add CEA modes if the CEA extension block is missing */
+	if (!drm_find_cea_extension(edid))
+		return 0;
+
+	/*
+	 * Go through all probed modes and create a new mode
+	 * with the alternate clock for certain CEA modes.
+	 */
+	num = data->modes;
+
+	for (i = 0; i < num; i++) {
+		const struct drm_display_mode *cea_mode = NULL;
+		struct drm_display_mode *newmode;
+		u8 vic;
+		unsigned int clock1, clock2;
+
+		mode = &data->mode_buf[i];
+		vic = drm_match_cea_mode(mode);
+
+		if (drm_valid_cea_vic(vic)) {
+			cea_mode = &edid_cea_modes[vic];
+			clock2 = cea_mode_alternate_clock(cea_mode);
+		} else {
+			vic = drm_match_hdmi_mode(mode);
+			if (drm_valid_hdmi_vic(vic)) {
+				cea_mode = &edid_4k_modes[vic];
+				clock2 = hdmi_mode_alternate_clock(cea_mode);
+			}
+		}
+
+		if (!cea_mode)
+			continue;
+
+		clock1 = cea_mode->clock;
+
+		if (clock1 == clock2)
+			continue;
+
+		if (mode->clock != clock1 && mode->clock != clock2)
+			continue;
+
+		newmode = drm_mode_create();
+		*newmode = *cea_mode;
+		if (!newmode)
+			continue;
+
+		/* Carry over the stereo flags */
+		newmode->flags |= mode->flags & DRM_MODE_FLAG_3D_MASK;
+
+		/*
+		 * The current mode could be either variant. Make
+		 * sure to pick the "other" clock for the new mode.
+		 */
+		if (mode->clock != clock1)
+			newmode->clock = clock1;
+		else
+			newmode->clock = clock2;
+
+		drm_add_hdmi_modes(data, newmode);
+		modes++;
+		drm_mode_destroy(newmode);
+	}
+
+	return modes;
+}
+
+static u8 *drm_find_displayid_extension(struct edid *edid)
+{
+	return drm_find_edid_extension(edid, DISPLAYID_EXT);
+}
+
+static int validate_displayid(u8 *displayid, int length, int idx)
+{
+	int i;
+	u8 csum = 0;
+	struct displayid_hdr *base;
+
+	base = (struct displayid_hdr *)&displayid[idx];
+
+	debug("base revision 0x%x, length %d, %d %d\n",
+	      base->rev, base->bytes, base->prod_id, base->ext_count);
+
+	if (base->bytes + 5 > length - idx)
+		return -EINVAL;
+	for (i = idx; i <= base->bytes + 5; i++)
+		csum += displayid[i];
+	if (csum) {
+		debug("DisplayID checksum invalid, remainder is %d\n", csum);
+		return -EINVAL;
+	}
+	return 0;
+}
+
+static struct
+drm_display_mode *drm_displayid_detailed(struct displayid_detailed_timings_1
+					      *timings)
+{
+	struct drm_display_mode *mode;
+	unsigned pixel_clock = (timings->pixel_clock[0] |
+				(timings->pixel_clock[1] << 8) |
+				(timings->pixel_clock[2] << 16));
+	unsigned hactive = (timings->hactive[0] | timings->hactive[1] << 8) + 1;
+	unsigned hblank = (timings->hblank[0] | timings->hblank[1] << 8) + 1;
+	unsigned hsync = (timings->hsync[0] |
+		(timings->hsync[1] & 0x7f) << 8) + 1;
+	unsigned hsync_width = (timings->hsw[0] | timings->hsw[1] << 8) + 1;
+	unsigned vactive = (timings->vactive[0] |
+		timings->vactive[1] << 8) + 1;
+	unsigned vblank = (timings->vblank[0] | timings->vblank[1] << 8) + 1;
+	unsigned vsync = (timings->vsync[0] |
+		(timings->vsync[1] & 0x7f) << 8) + 1;
+	unsigned vsync_width = (timings->vsw[0] | timings->vsw[1] << 8) + 1;
+	bool hsync_positive = (timings->hsync[1] >> 7) & 0x1;
+	bool vsync_positive = (timings->vsync[1] >> 7) & 0x1;
+
+	mode = drm_mode_create();
+	if (!mode)
+		return NULL;
+
+	mode->clock = pixel_clock * 10;
+	mode->hdisplay = hactive;
+	mode->hsync_start = mode->hdisplay + hsync;
+	mode->hsync_end = mode->hsync_start + hsync_width;
+	mode->htotal = mode->hdisplay + hblank;
+
+	mode->vdisplay = vactive;
+	mode->vsync_start = mode->vdisplay + vsync;
+	mode->vsync_end = mode->vsync_start + vsync_width;
+	mode->vtotal = mode->vdisplay + vblank;
+
+	mode->flags = 0;
+	mode->flags |=
+		hsync_positive ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
+	mode->flags |=
+		vsync_positive ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
+
+	if (timings->flags & 0x80)
+	mode->vrefresh = drm_mode_vrefresh(mode);
+
+	return mode;
+}
+
+static int add_displayid_detailed_1_modes(struct hdmi_edid_data *data,
+					  struct displayid_block *block)
+{
+	struct displayid_detailed_timing_block *det;
+	int i;
+	int num_timings;
+	struct drm_display_mode *newmode;
+	int num_modes = 0;
+
+	det = (struct displayid_detailed_timing_block *)block;
+	/* blocks must be multiple of 20 bytes length */
+	if (block->num_bytes % 20)
+		return 0;
+
+	num_timings = block->num_bytes / 20;
+	for (i = 0; i < num_timings; i++) {
+		struct displayid_detailed_timings_1 *timings =
+			&det->timings[i];
+
+		newmode = drm_displayid_detailed(timings);
+		if (!newmode)
+			continue;
+
+		drm_add_hdmi_modes(data, newmode);
+		num_modes++;
+		drm_mode_destroy(newmode);
+	}
+	return num_modes;
+}
+
+static int add_displayid_detailed_modes(struct hdmi_edid_data *data,
+					struct edid *edid)
+{
+	u8 *displayid;
+	int ret;
+	int idx = 1;
+	int length = EDID_SIZE;
+	struct displayid_block *block;
+	int num_modes = 0;
+
+	displayid = drm_find_displayid_extension(edid);
+	if (!displayid)
+		return 0;
+
+	ret = validate_displayid(displayid, length, idx);
+	if (ret)
+		return 0;
+
+	idx += sizeof(struct displayid_hdr);
+	while (block = (struct displayid_block *)&displayid[idx],
+	       idx + sizeof(struct displayid_block) <= length &&
+	       idx + sizeof(struct displayid_block) + block->num_bytes <=
+	       length && block->num_bytes > 0) {
+		idx += block->num_bytes + sizeof(struct displayid_block);
+		switch (block->tag) {
+		case DATA_BLOCK_TYPE_1_DETAILED_TIMING:
+			num_modes +=
+				add_displayid_detailed_1_modes(data, block);
+			break;
+		}
+	}
+	return num_modes;
+}
+
+static bool
+mode_in_hsync_range(const struct drm_display_mode *mode,
+		    struct edid *edid, u8 *t)
+{
+	int hsync, hmin, hmax;
+
+	hmin = t[7];
+	if (edid->revision >= 4)
+		hmin += ((t[4] & 0x04) ? 255 : 0);
+	hmax = t[8];
+	if (edid->revision >= 4)
+		hmax += ((t[4] & 0x08) ? 255 : 0);
+	hsync = drm_mode_hsync(mode);
+
+	return (hsync <= hmax && hsync >= hmin);
+}
+
+static bool
+mode_in_vsync_range(const struct drm_display_mode *mode,
+		    struct edid *edid, u8 *t)
+{
+	int vsync, vmin, vmax;
+
+	vmin = t[5];
+	if (edid->revision >= 4)
+		vmin += ((t[4] & 0x01) ? 255 : 0);
+	vmax = t[6];
+	if (edid->revision >= 4)
+		vmax += ((t[4] & 0x02) ? 255 : 0);
+	vsync = drm_mode_vrefresh(mode);
+
+	return (vsync <= vmax && vsync >= vmin);
+}
+
+static u32
+range_pixel_clock(struct edid *edid, u8 *t)
+{
+	/* unspecified */
+	if (t[9] == 0 || t[9] == 255)
+		return 0;
+
+	/* 1.4 with CVT support gives us real precision, yay */
+	if (edid->revision >= 4 && t[10] == 0x04)
+		return (t[9] * 10000) - ((t[12] >> 2) * 250);
+
+	/* 1.3 is pathetic, so fuzz up a bit */
+	return t[9] * 10000 + 5001;
+}
+
+static bool
+mode_in_range(const struct drm_display_mode *mode, struct edid *edid,
+	      struct detailed_timing *timing)
+{
+	u32 max_clock;
+	u8 *t = (u8 *)timing;
+
+	if (!mode_in_hsync_range(mode, edid, t))
+		return false;
+
+	if (!mode_in_vsync_range(mode, edid, t))
+		return false;
+
+	max_clock = range_pixel_clock(edid, t);
+	if (max_clock)
+		if (mode->clock > max_clock)
+			return false;
+
+	/* 1.4 max horizontal check */
+	if (edid->revision >= 4 && t[10] == 0x04)
+		if (t[13] && mode->hdisplay > 8 *
+		    (t[13] + (256 * (t[12] & 0x3))))
+			return false;
+
+	if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
+		return false;
+
+	return true;
+}
+
+static bool valid_inferred_mode(struct hdmi_edid_data *data,
+				const struct drm_display_mode *mode)
+{
+	const struct drm_display_mode *m;
+	bool ok = false;
+	int i;
+
+	for (i = 0; i < data->modes; i++) {
+		m = &data->mode_buf[i];
+		if (mode->hdisplay == m->hdisplay &&
+		    mode->vdisplay == m->vdisplay &&
+		    drm_mode_vrefresh(mode) == drm_mode_vrefresh(m))
+			return false; /* duplicated */
+		if (mode->hdisplay <= m->hdisplay &&
+		    mode->vdisplay <= m->vdisplay)
+			ok = true;
+	}
+	return ok;
+}
+
+static int
+drm_dmt_modes_for_range(struct hdmi_edid_data *data, struct edid *edid,
+			struct detailed_timing *timing)
+{
+	int i, modes = 0;
+
+	for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
+		if (mode_in_range(drm_dmt_modes + i, edid, timing) &&
+		    valid_inferred_mode(data, drm_dmt_modes + i)) {
+			drm_add_hdmi_modes(data, &drm_dmt_modes[i]);
+			modes++;
+		}
+	}
+
+	return modes;
+}
+
+/* fix up 1366x768 mode from 1368x768;
+ * GFT/CVT can't express 1366 width which isn't dividable by 8
+ */
+static void fixup_mode_1366x768(struct drm_display_mode *mode)
+{
+	if (mode->hdisplay == 1368 && mode->vdisplay == 768) {
+		mode->hdisplay = 1366;
+		mode->hsync_start--;
+		mode->hsync_end--;
+	}
+}
+
+static int
+drm_gtf_modes_for_range(struct hdmi_edid_data *data, struct edid *edid,
+			struct detailed_timing *timing)
+{
+	int i, modes = 0;
+	struct drm_display_mode *newmode;
+
+	for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
+		const struct minimode *m = &extra_modes[i];
+
+		newmode = drm_gtf_mode(m->w, m->h, m->r, 0, 0);
+		if (!newmode)
+			return modes;
+
+		fixup_mode_1366x768(newmode);
+		if (!mode_in_range(newmode, edid, timing) ||
+		    !valid_inferred_mode(data, newmode)) {
+			drm_mode_destroy(newmode);
+			continue;
+		}
+
+		drm_add_hdmi_modes(data, newmode);
+		modes++;
+		drm_mode_destroy(newmode);
+	}
+
+	return modes;
+}
+
+static int
+drm_cvt_modes_for_range(struct hdmi_edid_data *data, struct edid *edid,
+			struct detailed_timing *timing)
+{
+	int i, modes = 0;
+	struct drm_display_mode *newmode;
+	bool rb = drm_monitor_supports_rb(edid);
+
+	for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
+		const struct minimode *m = &extra_modes[i];
+
+		newmode = drm_cvt_mode(m->w, m->h, m->r, rb, 0, 0);
+		if (!newmode)
+			return modes;
+
+		fixup_mode_1366x768(newmode);
+		if (!mode_in_range(newmode, edid, timing) ||
+		    !valid_inferred_mode(data, newmode)) {
+			drm_mode_destroy(newmode);
+			continue;
+		}
+
+		drm_add_hdmi_modes(data, newmode);
+		modes++;
+		drm_mode_destroy(newmode);
+	}
+
+	return modes;
+}
+
+static void
+do_inferred_modes(struct detailed_timing *timing, void *c)
+{
+	struct detailed_mode_closure *closure = c;
+	struct detailed_non_pixel *data = &timing->data.other_data;
+	struct detailed_data_monitor_range *range = &data->data.range;
+
+	if (data->type != EDID_DETAIL_MONITOR_RANGE)
+		return;
+
+	closure->modes += drm_dmt_modes_for_range(closure->data,
+						  closure->edid,
+						  timing);
+
+	if (!version_greater(closure->edid, 1, 1))
+		return; /* GTF not defined yet */
+
+	switch (range->flags) {
+	case 0x02: /* secondary gtf, XXX could do more */
+	case 0x00: /* default gtf */
+		closure->modes += drm_gtf_modes_for_range(closure->data,
+							  closure->edid,
+							  timing);
+		break;
+	case 0x04: /* cvt, only in 1.4+ */
+		if (!version_greater(closure->edid, 1, 3))
+			break;
+
+		closure->modes += drm_cvt_modes_for_range(closure->data,
+							  closure->edid,
+							  timing);
+		break;
+	case 0x01: /* just the ranges, no formula */
+	default:
+		break;
+	}
+}
+
+static int
+add_inferred_modes(struct hdmi_edid_data *data, struct edid *edid)
+{
+	struct detailed_mode_closure closure = {
+		.data = data,
+		.edid = edid,
+	};
+
+	if (version_greater(edid, 1, 0))
+		drm_for_each_detailed_block((u8 *)edid, do_inferred_modes,
+					    &closure);
+
+	return closure.modes;
+}
+
+#define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
+#define MODE_REFRESH_DIFF(c, t) (abs((c) - (t)))
+
+/**
+ * edid_fixup_preferred - set preferred modes based on quirk list
+ * @data: the structure that save parsed hdmi edid data
+ * @quirks: quirks list
+ *
+ * Walk the mode list, clearing the preferred status
+ * on existing modes and setting it anew for the right mode ala @quirks.
+ */
+static void edid_fixup_preferred(struct hdmi_edid_data *data,
+				 u32 quirks)
+{
+	struct drm_display_mode *t, *cur_mode, *preferred_mode;
+	int i, target_refresh = 0;
+	int num = data->modes;
+	int cur_vrefresh, preferred_vrefresh;
+
+	if (!num)
+		return;
+
+	preferred_mode = data->preferred_mode;
+
+	if (quirks & EDID_QUIRK_PREFER_LARGE_60)
+		target_refresh = 60;
+	if (quirks & EDID_QUIRK_PREFER_LARGE_75)
+		target_refresh = 75;
+
+	for (i = 0; i < num; i++) {
+		cur_mode = &data->mode_buf[i];
+
+		if (cur_mode == preferred_mode)
+			continue;
+
+		/* Largest mode is preferred */
+		if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
+			preferred_mode = cur_mode;
+
+		cur_vrefresh = cur_mode->vrefresh ?
+		cur_mode->vrefresh : drm_mode_vrefresh(cur_mode);
+		preferred_vrefresh = preferred_mode->vrefresh ?
+		preferred_mode->vrefresh : drm_mode_vrefresh(preferred_mode);
+		/* At a given size, try to get closest to target refresh */
+		if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
+		    MODE_REFRESH_DIFF(cur_vrefresh, target_refresh) <
+		    MODE_REFRESH_DIFF(preferred_vrefresh, target_refresh)) {
+			preferred_mode = cur_mode;
+		}
+	}
+	data->preferred_mode = preferred_mode;
+}
+
+static const u8 edid_header[] = {
+	0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
+};
+
+/**
+ * drm_edid_header_is_valid - sanity check the header of the base EDID block
+ * @raw_edid: pointer to raw base EDID block
+ *
+ * Sanity check the header of the base EDID block.
+ *
+ * Return: 8 if the header is perfect, down to 0 if it's totally wrong.
+ */
+static int drm_edid_header_is_valid(const u8 *raw_edid)
+{
+	int i, score = 0;
+
+	for (i = 0; i < sizeof(edid_header); i++)
+		if (raw_edid[i] == edid_header[i])
+			score++;
+
+	return score;
+}
+
+static int drm_edid_block_checksum(const u8 *raw_edid)
+{
+	int i;
+	u8 csum = 0;
+
+	for (i = 0; i < EDID_SIZE; i++)
+		csum += raw_edid[i];
+
+	return csum;
+}
+
+static bool drm_edid_is_zero(const u8 *in_edid, int length)
+{
+	if (memchr_inv(in_edid, 0, length))
+		return false;
+
+	return true;
+}
+
+/**
+ * drm_edid_block_valid - Sanity check the EDID block (base or extension)
+ * @raw_edid: pointer to raw EDID block
+ * @block: type of block to validate (0 for base, extension otherwise)
+ * @print_bad_edid: if true, dump bad EDID blocks to the console
+ * @edid_corrupt: if true, the header or checksum is invalid
+ *
+ * Validate a base or extension EDID block and optionally dump bad blocks to
+ * the console.
+ *
+ * Return: True if the block is valid, false otherwise.
+ */
+static
+bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid,
+			  bool *edid_corrupt)
+{
+	u8 csum;
+	int edid_fixup = 6;
+	struct edid *edid = (struct edid *)raw_edid;
+
+	if ((!raw_edid))
+		return false;
+
+	if (block == 0) {
+		int score = drm_edid_header_is_valid(raw_edid);
+
+		if (score == 8) {
+			if (edid_corrupt)
+				*edid_corrupt = false;
+		} else if (score >= edid_fixup) {
+			/* Displayport Link CTS Core 1.2 rev1.1 test 4.2.2.6
+			 * The corrupt flag needs to be set here otherwise, the
+			 * fix-up code here will correct the problem, the
+			 * checksum is correct and the test fails
+			 */
+			if (edid_corrupt)
+				*edid_corrupt = true;
+			debug("Fixing header, your hardware may be failing\n");
+			memcpy(raw_edid, edid_header, sizeof(edid_header));
+		} else {
+			if (edid_corrupt)
+				*edid_corrupt = true;
+			goto bad;
+		}
+	}
+
+	csum = drm_edid_block_checksum(raw_edid);
+	if (csum) {
+		if (print_bad_edid) {
+			debug("EDID checksum is invalid, remainder is %d\n",
+			      csum);
+		}
+
+		if (edid_corrupt)
+			*edid_corrupt = true;
+
+		/* allow CEA to slide through, switches mangle this */
+		if (raw_edid[0] != 0x02)
+			goto bad;
+	}
+
+	/* per-block-type checks */
+	switch (raw_edid[0]) {
+	case 0: /* base */
+		if (edid->version != 1) {
+			debug("EDID has major version %d, instead of 1\n",
+			      edid->version);
+			goto bad;
+		}
+
+		if (edid->revision > 4)
+			debug("minor > 4, assuming backward compatibility\n");
+		break;
+
+	default:
+		break;
+	}
+
+	return true;
+
+bad:
+	if (print_bad_edid) {
+		if (drm_edid_is_zero(raw_edid, EDID_SIZE)) {
+			debug("EDID block is all zeroes\n");
+		} else {
+			debug("Raw EDID:\n");
+			print_hex_dump(KERN_ERR, " \t", DUMP_PREFIX_NONE, 16, 1,
+				       raw_edid, EDID_SIZE, false);
+		}
+	}
+	return false;
+}
+
+/**
+ * drm_edid_is_valid - sanity check EDID data
+ * @edid: EDID data
+ *
+ * Sanity-check an entire EDID record (including extensions)
+ *
+ * Return: True if the EDID data is valid, false otherwise.
+ */
+static bool drm_edid_is_valid(struct edid *edid)
+{
+	int i;
+	u8 *raw = (u8 *)edid;
+
+	if (!edid)
+		return false;
+
+	for (i = 0; i <= edid->extensions; i++)
+		if (!drm_edid_block_valid(raw + i * EDID_SIZE, i, true, NULL))
+			return false;
+
+	return true;
+}
+
+/**
+ * drm_add_edid_modes - add modes from EDID data, if available
+ * @data: data we're probing
+ * @edid: EDID data
+ *
+ * Add the specified modes to the data's mode list.
+ *
+ * Return: The number of modes added or 0 if we couldn't find any.
+ */
+int drm_add_edid_modes(struct hdmi_edid_data *data, u8 *raw_edid)
+{
+	int num_modes = 0;
+	u32 quirks;
+	struct edid *edid = (struct edid *)raw_edid;
+
+	if (!edid) {
+		debug("no edid\n");
+		return 0;
+	}
+
+	if (!drm_edid_is_valid(edid)) {
+		debug("EDID invalid\n");
+		return 0;
+	}
+
+	if (!data->mode_buf) {
+		debug("mode buff is null\n");
+		return 0;
+	}
+
+	quirks = edid_get_quirks(edid);
+	/*
+	 * CEA-861-F adds ycbcr capability map block, for HDMI 2.0 sinks.
+	 * To avoid multiple parsing of same block, lets parse that map
+	 * from sink info, before parsing CEA modes.
+	 */
+	drm_add_display_info(data, edid);
+
+	/*
+	 * EDID spec says modes should be preferred in this order:
+	 * - preferred detailed mode
+	 * - other detailed modes from base block
+	 * - detailed modes from extension blocks
+	 * - CVT 3-byte code modes
+	 * - standard timing codes
+	 * - established timing codes
+	 * - modes inferred from GTF or CVT range information
+	 *
+	 * We get this pretty much right.
+	 *
+	 * XXX order for additional mode types in extension blocks?
+	 */
+	num_modes += add_detailed_modes(data, edid, quirks);
+	num_modes += add_cvt_modes(data, edid);
+	num_modes += add_standard_modes(data, edid);
+	num_modes += add_established_modes(data, edid);
+	num_modes += add_cea_modes(data, edid);
+	num_modes += add_alternate_cea_modes(data, edid);
+	num_modes += add_displayid_detailed_modes(data, edid);
+
+	if (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)
+		num_modes += add_inferred_modes(data, edid);
+
+	if (num_modes > 0)
+		data->preferred_mode = &data->mode_buf[0];
+
+	if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
+		edid_fixup_preferred(data, quirks);
+
+	if (quirks & EDID_QUIRK_FORCE_6BPC)
+		data->display_info.bpc = 6;
+
+	if (quirks & EDID_QUIRK_FORCE_8BPC)
+		data->display_info.bpc = 8;
+
+	if (quirks & EDID_QUIRK_FORCE_10BPC)
+		data->display_info.bpc = 10;
+
+	if (quirks & EDID_QUIRK_FORCE_12BPC)
+		data->display_info.bpc = 12;
+
+	return num_modes;
+}
+
+static int hdmi_avi_infoframe_init(struct hdmi_avi_infoframe *frame)
+{
+	memset(frame, 0, sizeof(*frame));
+
+	frame->type = HDMI_INFOFRAME_TYPE_AVI;
+	frame->version = 2;
+	frame->length = HDMI_AVI_INFOFRAME_SIZE;
+
+	return 0;
+}
+
+u8 drm_match_cea_mode(struct drm_display_mode *to_match)
+{
+	u8 vic;
+
+	if (!to_match->clock) {
+		printf("can't find to match\n");
+		return 0;
+	}
+
+	for (vic = 1; vic < ARRAY_SIZE(edid_cea_modes); vic++) {
+		const struct drm_display_mode *cea_mode = &edid_cea_modes[vic];
+		unsigned int clock1, clock2;
+
+		/* Check both 60Hz and 59.94Hz */
+		clock1 = cea_mode->clock;
+		clock2 = cea_mode_alternate_clock(cea_mode);
+		if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) ||
+		     KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
+		    drm_mode_equal_no_clocks_no_stereo(to_match, cea_mode))
+			return vic;
+	}
+
+	return 0;
+}
+
+static enum hdmi_picture_aspect drm_get_cea_aspect_ratio(const u8 video_code)
+{
+	return edid_cea_modes[video_code].picture_aspect_ratio;
+}
+
+int
+drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame,
+					 struct drm_display_mode *mode,
+					 bool is_hdmi2_sink)
+{
+	int err;
+
+	if (!frame || !mode)
+		return -EINVAL;
+
+	err = hdmi_avi_infoframe_init(frame);
+	if (err < 0)
+		return err;
+
+	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
+		frame->pixel_repeat = 1;
+
+	frame->video_code = drm_match_cea_mode(mode);
+
+	/*
+	 * HDMI 1.4 VIC range: 1 <= VIC <= 64 (CEA-861-D) but
+	 * HDMI 2.0 VIC range: 1 <= VIC <= 107 (CEA-861-F). So we
+	 * have to make sure we dont break HDMI 1.4 sinks.
+	 */
+	if (!is_hdmi2_sink && frame->video_code > 64)
+		frame->video_code = 0;
+
+	/*
+	 * HDMI spec says if a mode is found in HDMI 1.4b 4K modes
+	 * we should send its VIC in vendor infoframes, else send the
+	 * VIC in AVI infoframes. Lets check if this mode is present in
+	 * HDMI 1.4b 4K modes
+	 */
+	if (frame->video_code) {
+		u8 vendor_if_vic = drm_match_hdmi_mode(mode);
+		bool is_s3d = mode->flags & DRM_MODE_FLAG_3D_MASK;
+
+		if (drm_valid_hdmi_vic(vendor_if_vic) && !is_s3d)
+			frame->video_code = 0;
+	}
+
+	frame->picture_aspect = HDMI_PICTURE_ASPECT_NONE;
+
+	/*
+	 * Populate picture aspect ratio from either
+	 * user input (if specified) or from the CEA mode list.
+	 */
+	if (mode->picture_aspect_ratio == HDMI_PICTURE_ASPECT_4_3 ||
+	    mode->picture_aspect_ratio == HDMI_PICTURE_ASPECT_16_9)
+		frame->picture_aspect = mode->picture_aspect_ratio;
+	else if (frame->video_code > 0)
+		frame->picture_aspect = drm_get_cea_aspect_ratio(
+						frame->video_code);
+
+	frame->active_aspect = HDMI_ACTIVE_ASPECT_PICTURE;
+	frame->scan_mode = HDMI_SCAN_MODE_UNDERSCAN;
+
+	return 0;
+}
+
+/**
+ * hdmi_vendor_infoframe_init() - initialize an HDMI vendor infoframe
+ * @frame: HDMI vendor infoframe
+ *
+ * Returns 0 on success or a negative error code on failure.
+ */
+static int hdmi_vendor_infoframe_init(struct hdmi_vendor_infoframe *frame)
+{
+	memset(frame, 0, sizeof(*frame));
+
+	frame->type = HDMI_INFOFRAME_TYPE_VENDOR;
+	frame->version = 1;
+
+	frame->oui = HDMI_IEEE_OUI;
+
+	/*
+	 * 0 is a valid value for s3d_struct, so we use a special "not set"
+	 * value
+	 */
+	frame->s3d_struct = HDMI_3D_STRUCTURE_INVALID;
+
+	return 0;
+}
+
+static enum hdmi_3d_structure
+s3d_structure_from_display_mode(const struct drm_display_mode *mode)
+{
+	u32 layout = mode->flags & DRM_MODE_FLAG_3D_MASK;
+
+	switch (layout) {
+	case DRM_MODE_FLAG_3D_FRAME_PACKING:
+		return HDMI_3D_STRUCTURE_FRAME_PACKING;
+	case DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE:
+		return HDMI_3D_STRUCTURE_FIELD_ALTERNATIVE;
+	case DRM_MODE_FLAG_3D_LINE_ALTERNATIVE:
+		return HDMI_3D_STRUCTURE_LINE_ALTERNATIVE;
+	case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL:
+		return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_FULL;
+	case DRM_MODE_FLAG_3D_L_DEPTH:
+		return HDMI_3D_STRUCTURE_L_DEPTH;
+	case DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH:
+		return HDMI_3D_STRUCTURE_L_DEPTH_GFX_GFX_DEPTH;
+	case DRM_MODE_FLAG_3D_TOP_AND_BOTTOM:
+		return HDMI_3D_STRUCTURE_TOP_AND_BOTTOM;
+	case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF:
+		return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_HALF;
+	default:
+		return HDMI_3D_STRUCTURE_INVALID;
+	}
+}
+
+int
+drm_hdmi_vendor_infoframe_from_display_mode(struct hdmi_vendor_infoframe *frame,
+					    struct drm_display_mode *mode)
+{
+	int err;
+	u32 s3d_flags;
+	u8 vic;
+
+	if (!frame || !mode)
+		return -EINVAL;
+
+	vic = drm_match_hdmi_mode(mode);
+
+	s3d_flags = mode->flags & DRM_MODE_FLAG_3D_MASK;
+
+	if (!vic && !s3d_flags)
+		return -EINVAL;
+
+	if (vic && s3d_flags)
+		return -EINVAL;
+
+	err = hdmi_vendor_infoframe_init(frame);
+	if (err < 0)
+		return err;
+
+	if (vic)
+		frame->vic = vic;
+	else
+		frame->s3d_struct = s3d_structure_from_display_mode(mode);
+
+	return 0;
+}
+
+static u8 hdmi_infoframe_checksum(u8 *ptr, size_t size)
+{
+	u8 csum = 0;
+	size_t i;
+
+	/* compute checksum */
+	for (i = 0; i < size; i++)
+		csum += ptr[i];
+
+	return 256 - csum;
+}
+
+static void hdmi_infoframe_set_checksum(void *buffer, size_t size)
+{
+	u8 *ptr = buffer;
+
+	ptr[3] = hdmi_infoframe_checksum(buffer, size);
+}
+
+/**
+ * hdmi_vendor_infoframe_pack() - write a HDMI vendor infoframe to binary buffer
+ * @frame: HDMI infoframe
+ * @buffer: destination buffer
+ * @size: size of buffer
+ *
+ * Packs the information contained in the @frame structure into a binary
+ * representation that can be written into the corresponding controller
+ * registers. Also computes the checksum as required by section 5.3.5 of
+ * the HDMI 1.4 specification.
+ *
+ * Returns the number of bytes packed into the binary buffer or a negative
+ * error code on failure.
+ */
+ssize_t hdmi_vendor_infoframe_pack(struct hdmi_vendor_infoframe *frame,
+				   void *buffer, size_t size)
+{
+	u8 *ptr = buffer;
+	size_t length;
+
+	/* empty info frame */
+	if (frame->vic == 0 && frame->s3d_struct == HDMI_3D_STRUCTURE_INVALID)
+		return -EINVAL;
+
+	/* only one of those can be supplied */
+	if (frame->vic != 0 && frame->s3d_struct != HDMI_3D_STRUCTURE_INVALID)
+		return -EINVAL;
+
+	/* for side by side (half) we also need to provide 3D_Ext_Data */
+	if (frame->s3d_struct >= HDMI_3D_STRUCTURE_SIDE_BY_SIDE_HALF)
+		frame->length = 6;
+	else
+		frame->length = 5;
+
+	length = HDMI_INFOFRAME_HEADER_SIZE + frame->length;
+
+	if (size < length)
+		return -ENOSPC;
+
+	memset(buffer, 0, size);
+
+	ptr[0] = frame->type;
+	ptr[1] = frame->version;
+	ptr[2] = frame->length;
+	ptr[3] = 0; /* checksum */
+
+	/* HDMI OUI */
+	ptr[4] = 0x03;
+	ptr[5] = 0x0c;
+	ptr[6] = 0x00;
+
+	if (frame->vic) {
+		ptr[7] = 0x1 << 5;	/* video format */
+		ptr[8] = frame->vic;
+	} else {
+		ptr[7] = 0x2 << 5;	/* video format */
+		ptr[8] = (frame->s3d_struct & 0xf) << 4;
+		if (frame->s3d_struct >= HDMI_3D_STRUCTURE_SIDE_BY_SIDE_HALF)
+			ptr[9] = (frame->s3d_ext_data & 0xf) << 4;
+	}
+
+	hdmi_infoframe_set_checksum(buffer, length);
+
+	return length;
+}
diff --git a/include/drm_modes.h b/include/drm_modes.h
index 6e9121a0c8..bc8d569f63 100644
--- a/include/drm_modes.h
+++ b/include/drm_modes.h
@@ -7,6 +7,14 @@
 #ifndef _DRM_MODES_H
 #define _DRM_MODES_H
 
+#define DRM_MODE_TYPE_BUILTIN	BIT(0)
+#define DRM_MODE_TYPE_CLOCK_C	(BIT(1) | DRM_MODE_TYPE_BUILTIN)
+#define DRM_MODE_TYPE_CRTC_C	(BIT(2) | DRM_MODE_TYPE_BUILTIN)
+#define DRM_MODE_TYPE_PREFERRED	BIT(3)
+#define DRM_MODE_TYPE_DEFAULT	BIT(4)
+#define DRM_MODE_TYPE_USERDEF	BIT(5)
+#define DRM_MODE_TYPE_DRIVER	BIT(6)
+
 /* Video mode flags */
 /* bit compatible with the xorg definitions. */
 #define DRM_MODE_FLAG_PHSYNC			(1 << 0)
@@ -62,6 +70,7 @@ struct drm_display_mode {
 	int vrefresh;
 	int vscan;
 	unsigned int flags;
+	int picture_aspect_ratio;
 };
 
 #endif
diff --git a/include/edid.h b/include/edid.h
index 9f3276c080..06698db9c3 100644
--- a/include/edid.h
+++ b/include/edid.h
@@ -8,24 +8,65 @@
  *
  * Contains stolen code from ddcprobe project which is:
  * Copyright (C) Nalin Dahyabhai <bigfun@pobox.com>
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
  */
 
 #ifndef __EDID_H_
 #define __EDID_H_
 
+#include <div64.h>
 #include <linux/types.h>
 
 /* Size of the EDID data */
 #define EDID_SIZE	128
 #define EDID_EXT_SIZE	256
+#define MODE_LEN	120
+
+#define CEA_EXT	    0x02
+#define VTB_EXT	    0x10
+#define DI_EXT	    0x40
+#define LS_EXT	    0x50
+#define MI_EXT	    0x60
+#define DISPLAYID_EXT 0x70
+
+#define EDID_TIMING_ASPECT_SHIFT 6
+#define EDID_TIMING_ASPECT_MASK  (0x3 << EDID_TIMING_ASPECT_SHIFT)
+
+/* need to add 60 */
+#define EDID_TIMING_VFREQ_SHIFT  0
+#define EDID_TIMING_VFREQ_MASK   (0x3f << EDID_TIMING_VFREQ_SHIFT)
 
 /* OUI of HDMI vendor specific data block */
 #define HDMI_IEEE_OUI 0x000c03
 
+/* drm mode 4k and 3d */
+#define DRM_MODE_FLAG_420_MASK			(0x03 << 23)
+#define  DRM_MODE_FLAG_420			BIT(23)
+#define  DRM_MODE_FLAG_420_ONLY			BIT(24)
+
+#define DRM_MODE_FLAG_3D_MASK			(0x1f << 14)
+#define  DRM_MODE_FLAG_3D_NONE			(0 << 14)
+#define  DRM_MODE_FLAG_3D_FRAME_PACKING		BIT(14)
+#define  DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE	(2 << 14)
+#define  DRM_MODE_FLAG_3D_LINE_ALTERNATIVE	(3 << 14)
+#define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL	(4 << 14)
+#define  DRM_MODE_FLAG_3D_L_DEPTH		(5 << 14)
+#define  DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH	(6 << 14)
+#define  DRM_MODE_FLAG_3D_TOP_AND_BOTTOM	(7 << 14)
+#define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF	(8 << 14)
+
+#define BITS_PER_BYTE         8
+#define BITS_TO_LONGS(nr)     DIV_ROUND_UP(nr, BITS_PER_BYTE * sizeof(long))
 #define GET_BIT(_x, _pos) \
 	(((_x) >> (_pos)) & 1)
 #define GET_BITS(_x, _pos_msb, _pos_lsb) \
 	(((_x) >> (_pos_lsb)) & ((1 << ((_pos_msb) - (_pos_lsb) + 1)) - 1))
+#define DRM_MODE(c, hd, hss, hse, ht, vd, vss, vse, vt, vs, f) \
+	.clock = (c), \
+	.hdisplay = (hd), .hsync_start = (hss), .hsync_end = (hse), \
+	.htotal = (ht), .vdisplay = (vd), \
+	.vsync_start = (vss), .vsync_end = (vse), .vtotal = (vt), \
+	.vscan = (vs), .flags = (f)
 
 /* Aspect ratios used in EDID info. */
 enum edid_aspect {
@@ -35,6 +76,129 @@ enum edid_aspect {
 	ASPECT_5625,
 };
 
+struct est_timings {
+	u8 t1;
+	u8 t2;
+	u8 mfg_rsvd;
+} __packed;
+
+/* 00=16:10, 01=4:3, 10=5:4, 11=16:9 */
+#define EDID_TIMING_ASPECT_SHIFT 6
+#define EDID_TIMING_ASPECT_MASK  (0x3 << EDID_TIMING_ASPECT_SHIFT)
+
+/* need to add 60 */
+#define EDID_TIMING_VFREQ_SHIFT  0
+#define EDID_TIMING_VFREQ_MASK   (0x3f << EDID_TIMING_VFREQ_SHIFT)
+
+struct std_timing {
+	u8 hsize; /* need to multiply by 8 then add 248 */
+	u8 vfreq_aspect;
+} __packed;
+
+struct detailed_pixel_timing {
+	u8 hactive_lo;
+	u8 hblank_lo;
+	u8 hactive_hblank_hi;
+	u8 vactive_lo;
+	u8 vblank_lo;
+	u8 vactive_vblank_hi;
+	u8 hsync_offset_lo;
+	u8 hsync_pulse_width_lo;
+	u8 vsync_offset_pulse_width_lo;
+	u8 hsync_vsync_offset_pulse_width_hi;
+	u8 width_mm_lo;
+	u8 height_mm_lo;
+	u8 width_height_mm_hi;
+	u8 hborder;
+	u8 vborder;
+	u8 misc;
+} __packed;
+
+/* If it's not pixel timing, it'll be one of the below */
+struct detailed_data_string {
+	u8 str[13];
+} __packed;
+
+struct detailed_data_monitor_range {
+	u8 min_vfreq;
+	u8 max_vfreq;
+	u8 min_hfreq_khz;
+	u8 max_hfreq_khz;
+	u8 pixel_clock_mhz; /* need to multiply by 10 */
+	u8 flags;
+	union {
+		struct {
+			u8 reserved;
+			u8 hfreq_start_khz; /* need to multiply by 2 */
+			u8 c; /* need to divide by 2 */
+			__le16 m;
+			u8 k;
+			u8 j; /* need to divide by 2 */
+		} __packed gtf2;
+		struct {
+			u8 version;
+			u8 data1; /* high 6 bits: extra clock resolution */
+			u8 data2; /* plus low 2 of above: max hactive */
+			u8 supported_aspects;
+			u8 flags; /* preferred aspect and blanking support */
+			u8 supported_scalings;
+			u8 preferred_refresh;
+		} __packed cvt;
+	} formula;
+} __packed;
+
+struct detailed_data_wpindex {
+	u8 white_yx_lo; /* Lower 2 bits each */
+	u8 white_x_hi;
+	u8 white_y_hi;
+	u8 gamma; /* need to divide by 100 then add 1 */
+} __packed;
+
+struct detailed_data_color_point {
+	u8 windex1;
+	u8 wpindex1[3];
+	u8 windex2;
+	u8 wpindex2[3];
+} __packed;
+
+struct cvt_timing {
+	u8 code[3];
+} __packed;
+
+struct detailed_non_pixel {
+	u8 pad1;
+	u8 type; /* ff=serial, fe=string, fd=monitor range, fc=monitor name
+		  * fb=color point data, fa=standard timing data,
+		  * f9=undefined, f8=mfg. reserved
+		  */
+	u8 pad2;
+	union {
+		struct detailed_data_string str;
+		struct detailed_data_monitor_range range;
+		struct detailed_data_wpindex color;
+		struct std_timing timings[6];
+		struct cvt_timing cvt[4];
+	} data;
+} __packed;
+
+#define EDID_DETAIL_EST_TIMINGS 0xf7
+#define EDID_DETAIL_CVT_3BYTE 0xf8
+#define EDID_DETAIL_COLOR_MGMT_DATA 0xf9
+#define EDID_DETAIL_STD_MODES 0xfa
+#define EDID_DETAIL_MONITOR_CPDATA 0xfb
+#define EDID_DETAIL_MONITOR_NAME 0xfc
+#define EDID_DETAIL_MONITOR_RANGE 0xfd
+#define EDID_DETAIL_MONITOR_STRING 0xfe
+#define EDID_DETAIL_MONITOR_SERIAL 0xff
+
+struct detailed_timing {
+	__le16 pixel_clock; /* need to multiply by 10 KHz */
+	union {
+		struct detailed_pixel_timing pixel_data;
+		struct detailed_non_pixel other_data;
+	} data;
+} __packed;
+
 /* Detailed timing information used in EDID v1.x */
 struct edid_detailed_timing {
 	unsigned char pixel_clock[2];
@@ -126,6 +290,58 @@ struct edid_monitor_descriptor {
 	} data;
 } __attribute__ ((__packed__));
 
+#define DRM_EDID_INPUT_SERRATION_VSYNC (1 << 0)
+#define DRM_EDID_INPUT_SYNC_ON_GREEN   (1 << 1)
+#define DRM_EDID_INPUT_COMPOSITE_SYNC  (1 << 2)
+#define DRM_EDID_INPUT_SEPARATE_SYNCS  (1 << 3)
+#define DRM_EDID_INPUT_BLANK_TO_BLACK  (1 << 4)
+#define DRM_EDID_INPUT_VIDEO_LEVEL     (3 << 5)
+#define DRM_EDID_INPUT_DIGITAL         (1 << 7)
+#define DRM_EDID_DIGITAL_DEPTH_MASK    (7 << 4)
+#define DRM_EDID_DIGITAL_DEPTH_UNDEF   (0 << 4)
+#define DRM_EDID_DIGITAL_DEPTH_6       (1 << 4)
+#define DRM_EDID_DIGITAL_DEPTH_8       (2 << 4)
+#define DRM_EDID_DIGITAL_DEPTH_10      (3 << 4)
+#define DRM_EDID_DIGITAL_DEPTH_12      (4 << 4)
+#define DRM_EDID_DIGITAL_DEPTH_14      (5 << 4)
+#define DRM_EDID_DIGITAL_DEPTH_16      (6 << 4)
+#define DRM_EDID_DIGITAL_DEPTH_RSVD    (7 << 4)
+#define DRM_EDID_DIGITAL_TYPE_UNDEF    (0)
+#define DRM_EDID_DIGITAL_TYPE_DVI      (1)
+#define DRM_EDID_DIGITAL_TYPE_HDMI_A   (2)
+#define DRM_EDID_DIGITAL_TYPE_HDMI_B   (3)
+#define DRM_EDID_DIGITAL_TYPE_MDDI     (4)
+#define DRM_EDID_DIGITAL_TYPE_DP       (5)
+
+#define DRM_EDID_FEATURE_DEFAULT_GTF      (1 << 0)
+#define DRM_EDID_FEATURE_PREFERRED_TIMING (1 << 1)
+#define DRM_EDID_FEATURE_STANDARD_COLOR   (1 << 2)
+/* If analog */
+#define DRM_EDID_FEATURE_DISPLAY_TYPE     (3 << 3) /* 00=mono, 01=rgb, 10=non-rgb, 11=unknown */
+/* If digital */
+#define DRM_EDID_FEATURE_COLOR_MASK	  (3 << 3)
+#define DRM_EDID_FEATURE_RGB		  (0 << 3)
+#define DRM_EDID_FEATURE_RGB_YCRCB444	  (1 << 3)
+#define DRM_EDID_FEATURE_RGB_YCRCB422	  (2 << 3)
+#define DRM_EDID_FEATURE_RGB_YCRCB	  (3 << 3) /* both 4:4:4 and 4:2:2 */
+
+#define DRM_EDID_FEATURE_PM_ACTIVE_OFF    (1 << 5)
+#define DRM_EDID_FEATURE_PM_SUSPEND       (1 << 6)
+#define DRM_EDID_FEATURE_PM_STANDBY       (1 << 7)
+
+#define DRM_EDID_HDMI_DC_48               (1 << 6)
+#define DRM_EDID_HDMI_DC_36               (1 << 5)
+#define DRM_EDID_HDMI_DC_30               (1 << 4)
+#define DRM_EDID_HDMI_DC_Y444             (1 << 3)
+
+/* YCBCR 420 deep color modes */
+#define DRM_EDID_YCBCR420_DC_48		  (1 << 2)
+#define DRM_EDID_YCBCR420_DC_36		  (1 << 1)
+#define DRM_EDID_YCBCR420_DC_30		  (1 << 0)
+#define DRM_EDID_YCBCR420_DC_MASK (DRM_EDID_YCBCR420_DC_48 | \
+				    DRM_EDID_YCBCR420_DC_36 | \
+				    DRM_EDID_YCBCR420_DC_30)
+
 struct edid1_info {
 	unsigned char header[8];
 	unsigned char manufacturer_name[2];
@@ -242,8 +458,19 @@ enum edid_cea861_db_types {
 	EDID_CEA861_DB_VIDEO = 0x02,
 	EDID_CEA861_DB_VENDOR = 0x03,
 	EDID_CEA861_DB_SPEAKER = 0x04,
+	EDID_CEA861_DB_USE_EXTENDED = 0x07,
 };
 
+#define EXT_VIDEO_CAPABILITY_BLOCK 0x00
+#define EXT_VIDEO_DATA_BLOCK_420        0x0E
+#define EXT_VIDEO_CAP_BLOCK_Y420CMDB 0x0F
+#define EDID_BASIC_AUDIO        BIT(6)
+#define EDID_CEA_YCRCB444       BIT(5)
+#define EDID_CEA_YCRCB422       BIT(4)
+#define EDID_CEA_VCDB_QS        BIT(6)
+
+#define EXT_VIDEO_DATA_BLOCK_420 0x0E
+
 struct edid_cea861_info {
 	unsigned char extension_tag;
 #define EDID_CEA861_EXTENSION_TAG	0x02
@@ -267,6 +494,222 @@ struct edid_cea861_info {
 	GET_BITS((_x).data[offset], 4, 0)
 } __attribute__ ((__packed__));
 
+#define DATA_BLOCK_PRODUCT_ID 0x00
+#define DATA_BLOCK_DISPLAY_PARAMETERS 0x01
+#define DATA_BLOCK_COLOR_CHARACTERISTICS 0x02
+#define DATA_BLOCK_TYPE_1_DETAILED_TIMING 0x03
+#define DATA_BLOCK_TYPE_2_DETAILED_TIMING 0x04
+#define DATA_BLOCK_TYPE_3_SHORT_TIMING 0x05
+#define DATA_BLOCK_TYPE_4_DMT_TIMING 0x06
+#define DATA_BLOCK_VESA_TIMING 0x07
+#define DATA_BLOCK_CEA_TIMING 0x08
+#define DATA_BLOCK_VIDEO_TIMING_RANGE 0x09
+#define DATA_BLOCK_PRODUCT_SERIAL_NUMBER 0x0a
+#define DATA_BLOCK_GP_ASCII_STRING 0x0b
+#define DATA_BLOCK_DISPLAY_DEVICE_DATA 0x0c
+#define DATA_BLOCK_INTERFACE_POWER_SEQUENCING 0x0d
+#define DATA_BLOCK_TRANSFER_CHARACTERISTICS 0x0e
+#define DATA_BLOCK_DISPLAY_INTERFACE 0x0f
+#define DATA_BLOCK_STEREO_DISPLAY_INTERFACE 0x10
+#define DATA_BLOCK_TILED_DISPLAY 0x12
+
+struct displayid_hdr {
+	u8 rev;
+	u8 bytes;
+	u8 prod_id;
+	u8 ext_count;
+} __packed;
+
+struct displayid_block {
+	u8 tag;
+	u8 rev;
+	u8 num_bytes;
+} __packed;
+
+struct displayid_detailed_timings_1 {
+	u8 pixel_clock[3];
+	u8 flags;
+	u8 hactive[2];
+	u8 hblank[2];
+	u8 hsync[2];
+	u8 hsw[2];
+	u8 vactive[2];
+	u8 vblank[2];
+	u8 vsync[2];
+	u8 vsw[2];
+} __packed;
+
+struct displayid_detailed_timing_block {
+	struct displayid_block base;
+	struct displayid_detailed_timings_1 timings[0];
+};
+
+/**
+ * struct drm_scrambling: sink's scrambling support.
+ */
+struct drm_scrambling {
+	/**
+	 * @supported: scrambling supported for rates > 340 Mhz.
+	 */
+	bool supported;
+	/**
+	 * @low_rates: scrambling supported for rates <= 340 Mhz.
+	 */
+	bool low_rates;
+};
+
+/**
+ * struct drm_scdc - Information about scdc capabilities of a HDMI 2.0 sink
+ *
+ * Provides SCDC register support and capabilities related information on a
+ * HDMI 2.0 sink. In case of a HDMI 1.4 sink, all parameter must be 0.
+ */
+
+struct drm_scdc {
+	/**
+	 * @supported: status control & data channel present.
+	 */
+	bool supported;
+	/**
+	 * @read_request: sink is capable of generating scdc read request.
+	 */
+	bool read_request;
+	/**
+	 * @scrambling: sink's scrambling capabilities
+	 */
+	struct drm_scrambling scrambling;
+};
+
+/**
+ * struct drm_hdmi_info - runtime information about the connected HDMI sink
+ *
+ * Describes if a given display supports advanced HDMI 2.0 features.
+ * This information is available in CEA-861-F extension blocks (like HF-VSDB).
+ */
+struct drm_hdmi_info {
+	struct drm_scdc scdc;
+
+	/**
+	 * @y420_vdb_modes: bitmap of modes which can support ycbcr420
+	 * output only (not normal RGB/YCBCR444/422 outputs). There are total
+	 * 107 VICs defined by CEA-861-F spec, so the size is 128 bits to map
+	 * upto 128 VICs;
+	 */
+	unsigned long y420_vdb_modes[BITS_TO_LONGS(128)];
+
+	/**
+	 * @y420_cmdb_modes: bitmap of modes which can support ycbcr420
+	 * output also, along with normal HDMI outputs. There are total 107
+	 * VICs defined by CEA-861-F spec, so the size is 128 bits to map upto
+	 * 128 VICs;
+	 */
+	unsigned long y420_cmdb_modes[BITS_TO_LONGS(128)];
+
+	/** @y420_cmdb_map: bitmap of SVD index, to extraxt vcb modes */
+	u64 y420_cmdb_map;
+
+	/** @y420_dc_modes: bitmap of deep color support index */
+	u8 y420_dc_modes;
+};
+
+enum subpixel_order {
+	subpixelunknown = 0,
+	subpixelhorizontalrgb,
+	subpixelhorizontalbgr,
+	subpixelverticalrgb,
+	subpixelverticalbgr,
+	subpixelnone,
+};
+
+#define DRM_COLOR_FORMAT_RGB444         BIT(0)
+#define DRM_COLOR_FORMAT_YCRCB444       BIT(1)
+#define DRM_COLOR_FORMAT_YCRCB422       BIT(2)
+#define DRM_COLOR_FORMAT_YCRCB420       BIT(3)
+
+/*
+ * Describes a given display (e.g. CRT or flat panel) and its limitations.
+ */
+struct drm_display_info {
+	char name[32];
+
+	/* Physical size */
+	unsigned int width_mm;
+	unsigned int height_mm;
+
+	/* Clock limits FIXME: storage format */
+	unsigned int min_vfreq, max_vfreq;
+	unsigned int min_hfreq, max_hfreq;
+	unsigned int pixel_clock;
+	unsigned int bpc;
+
+	enum subpixel_order subpixel_order;
+	u32 color_formats;
+
+	const u32 *bus_formats;
+	unsigned int num_bus_formats;
+
+	/**
+	 * @max_tmds_clock: Maximum TMDS clock rate supported by the
+	 * sink in kHz. 0 means undefined.
+	 */
+	int max_tmds_clock;
+
+	/**
+	 * @dvi_dual: Dual-link DVI sink?
+	 */
+	bool dvi_dual;
+
+	/* Mask of supported hdmi deep color modes */
+	u8 edid_hdmi_dc_modes;
+
+	u8 cea_rev;
+
+	/**
+	 * @hdmi: advance features of a HDMI sink.
+	 */
+	struct drm_hdmi_info hdmi;
+};
+
+struct edid {
+	u8 header[8];
+	/* Vendor & product info */
+	u8 mfg_id[2];
+	u8 prod_code[2];
+	u32 serial; /* FIXME: byte order */
+	u8 mfg_week;
+	u8 mfg_year;
+	/* EDID version */
+	u8 version;
+	u8 revision;
+	/* Display info: */
+	u8 input;
+	u8 width_cm;
+	u8 height_cm;
+	u8 gamma;
+	u8 features;
+	/* Color characteristics */
+	u8 red_green_lo;
+	u8 black_white_lo;
+	u8 red_x;
+	u8 red_y;
+	u8 green_x;
+	u8 green_y;
+	u8 blue_x;
+	u8 blue_y;
+	u8 white_x;
+	u8 white_y;
+	/* Est. timings and mfg rsvd timings*/
+	struct est_timings established_timings;
+	/* Standard timings 1-8*/
+	struct std_timing standard_timings[8];
+	/* Detailing timings 1-4 */
+	struct detailed_timing detailed_timings[4];
+	/* Number of 128 byte ext. blocks */
+	u8 extensions;
+	/* Checksum */
+	u8 checksum;
+} __packed;
+
 /**
  * Print the EDID info.
  *
@@ -296,9 +739,9 @@ int edid_check_checksum(u8 *edid_block);
  *
  * @param edid	The EDID info
  * @param hmin	Returns the minimum horizontal rate
- * @param hmax	Returns the maxium horizontal rate
+ * @param hmax	Returns the maximum horizontal rate
  * @param vmin	Returns the minimum vertical rate
- * @param vmax	Returns the maxium vertical rate
+ * @param vmax	Returns the maximum vertical rate
  * @return 0 on success, or -1 on error
  */
 int edid_get_ranges(struct edid1_info *edid, unsigned int *hmin,
@@ -308,6 +751,14 @@ int edid_get_ranges(struct edid1_info *edid, unsigned int *hmin,
 struct drm_display_mode;
 struct display_timing;
 
+struct hdmi_edid_data {
+	struct drm_display_mode *preferred_mode;
+	int modes;
+	struct drm_hdmi_info hdmi_info;
+	struct drm_display_mode *mode_buf;
+	struct drm_display_info display_info;
+};
+
 /**
  * edid_get_timing() - Get basic digital display parameters
  *
@@ -323,5 +774,8 @@ int edid_get_timing(u8 *buf, int buf_size, struct display_timing *timing,
 		    int *panel_bits_per_colourp);
 int edid_get_drm_mode(u8 *buf, int buf_size, struct drm_display_mode *mode,
 		      int *panel_bits_per_colourp);
+int drm_add_edid_modes(struct hdmi_edid_data *data, u8 *edid);
+bool drm_detect_hdmi_monitor(struct edid *edid);
+bool drm_detect_monitor_audio(struct edid *edid);
 
 #endif /* __EDID_H_ */
diff --git a/include/linux/hdmi.h b/include/linux/hdmi.h
new file mode 100644
index 0000000000..041034ff00
--- /dev/null
+++ b/include/linux/hdmi.h
@@ -0,0 +1,326 @@
+/*
+ * Copyright (C) 2012 Avionic Design GmbH
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sub license,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef __LINUX_HDMI_H_
+#define __LINUX_HDMI_H_
+
+#include <linux/types.h>
+
+enum hdmi_infoframe_type {
+	HDMI_INFOFRAME_TYPE_VENDOR = 0x81,
+	HDMI_INFOFRAME_TYPE_AVI = 0x82,
+	HDMI_INFOFRAME_TYPE_SPD = 0x83,
+	HDMI_INFOFRAME_TYPE_AUDIO = 0x84,
+};
+
+#define HDMI_IEEE_OUI 0x000c03
+#define HDMI_FORUM_IEEE_OUI 0xc45dd8
+#define HDMI_INFOFRAME_HEADER_SIZE  4
+#define HDMI_AVI_INFOFRAME_SIZE    13
+#define HDMI_SPD_INFOFRAME_SIZE    25
+#define HDMI_AUDIO_INFOFRAME_SIZE  10
+
+#define HDMI_INFOFRAME_SIZE(type)	\
+	(HDMI_INFOFRAME_HEADER_SIZE + HDMI_ ## type ## _INFOFRAME_SIZE)
+
+struct hdmi_any_infoframe {
+	enum hdmi_infoframe_type type;
+	unsigned char version;
+	unsigned char length;
+};
+
+enum hdmi_colorspace {
+	HDMI_COLORSPACE_RGB,
+	HDMI_COLORSPACE_YUV422,
+	HDMI_COLORSPACE_YUV444,
+	HDMI_COLORSPACE_YUV420,
+	HDMI_COLORSPACE_RESERVED4,
+	HDMI_COLORSPACE_RESERVED5,
+	HDMI_COLORSPACE_RESERVED6,
+	HDMI_COLORSPACE_IDO_DEFINED,
+};
+
+enum hdmi_scan_mode {
+	HDMI_SCAN_MODE_NONE,
+	HDMI_SCAN_MODE_OVERSCAN,
+	HDMI_SCAN_MODE_UNDERSCAN,
+	HDMI_SCAN_MODE_RESERVED,
+};
+
+enum hdmi_colorimetry {
+	HDMI_COLORIMETRY_NONE,
+	HDMI_COLORIMETRY_ITU_601,
+	HDMI_COLORIMETRY_ITU_709,
+	HDMI_COLORIMETRY_EXTENDED,
+};
+
+enum hdmi_picture_aspect {
+	HDMI_PICTURE_ASPECT_NONE,
+	HDMI_PICTURE_ASPECT_4_3,
+	HDMI_PICTURE_ASPECT_16_9,
+	HDMI_PICTURE_ASPECT_64_27,
+	HDMI_PICTURE_ASPECT_256_135,
+	HDMI_PICTURE_ASPECT_RESERVED,
+};
+
+enum hdmi_active_aspect {
+	HDMI_ACTIVE_ASPECT_16_9_TOP = 2,
+	HDMI_ACTIVE_ASPECT_14_9_TOP = 3,
+	HDMI_ACTIVE_ASPECT_16_9_CENTER = 4,
+	HDMI_ACTIVE_ASPECT_PICTURE = 8,
+	HDMI_ACTIVE_ASPECT_4_3 = 9,
+	HDMI_ACTIVE_ASPECT_16_9 = 10,
+	HDMI_ACTIVE_ASPECT_14_9 = 11,
+	HDMI_ACTIVE_ASPECT_4_3_SP_14_9 = 13,
+	HDMI_ACTIVE_ASPECT_16_9_SP_14_9 = 14,
+	HDMI_ACTIVE_ASPECT_16_9_SP_4_3 = 15,
+};
+
+enum hdmi_extended_colorimetry {
+	HDMI_EXTENDED_COLORIMETRY_XV_YCC_601,
+	HDMI_EXTENDED_COLORIMETRY_XV_YCC_709,
+	HDMI_EXTENDED_COLORIMETRY_S_YCC_601,
+	HDMI_EXTENDED_COLORIMETRY_ADOBE_YCC_601,
+	HDMI_EXTENDED_COLORIMETRY_ADOBE_RGB,
+
+	/* The following EC values are only defined in CEA-861-F. */
+	HDMI_EXTENDED_COLORIMETRY_BT2020_CONST_LUM,
+	HDMI_EXTENDED_COLORIMETRY_BT2020,
+	HDMI_EXTENDED_COLORIMETRY_RESERVED,
+};
+
+enum hdmi_quantization_range {
+	HDMI_QUANTIZATION_RANGE_DEFAULT,
+	HDMI_QUANTIZATION_RANGE_LIMITED,
+	HDMI_QUANTIZATION_RANGE_FULL,
+	HDMI_QUANTIZATION_RANGE_RESERVED,
+};
+
+/* non-uniform picture scaling */
+enum hdmi_nups {
+	HDMI_NUPS_UNKNOWN,
+	HDMI_NUPS_HORIZONTAL,
+	HDMI_NUPS_VERTICAL,
+	HDMI_NUPS_BOTH,
+};
+
+enum hdmi_ycc_quantization_range {
+	HDMI_YCC_QUANTIZATION_RANGE_LIMITED,
+	HDMI_YCC_QUANTIZATION_RANGE_FULL,
+};
+
+enum hdmi_content_type {
+	HDMI_CONTENT_TYPE_GRAPHICS,
+	HDMI_CONTENT_TYPE_PHOTO,
+	HDMI_CONTENT_TYPE_CINEMA,
+	HDMI_CONTENT_TYPE_GAME,
+};
+
+struct hdmi_avi_infoframe {
+	enum hdmi_infoframe_type type;
+	unsigned char version;
+	unsigned char length;
+	enum hdmi_colorspace colorspace;
+	enum hdmi_scan_mode scan_mode;
+	enum hdmi_colorimetry colorimetry;
+	enum hdmi_picture_aspect picture_aspect;
+	enum hdmi_active_aspect active_aspect;
+	bool itc;
+	enum hdmi_extended_colorimetry extended_colorimetry;
+	enum hdmi_quantization_range quantization_range;
+	enum hdmi_nups nups;
+	unsigned char video_code;
+	enum hdmi_ycc_quantization_range ycc_quantization_range;
+	enum hdmi_content_type content_type;
+	unsigned char pixel_repeat;
+	unsigned short top_bar;
+	unsigned short bottom_bar;
+	unsigned short left_bar;
+	unsigned short right_bar;
+};
+
+enum hdmi_spd_sdi {
+	HDMI_SPD_SDI_UNKNOWN,
+	HDMI_SPD_SDI_DSTB,
+	HDMI_SPD_SDI_DVDP,
+	HDMI_SPD_SDI_DVHS,
+	HDMI_SPD_SDI_HDDVR,
+	HDMI_SPD_SDI_DVC,
+	HDMI_SPD_SDI_DSC,
+	HDMI_SPD_SDI_VCD,
+	HDMI_SPD_SDI_GAME,
+	HDMI_SPD_SDI_PC,
+	HDMI_SPD_SDI_BD,
+	HDMI_SPD_SDI_SACD,
+	HDMI_SPD_SDI_HDDVD,
+	HDMI_SPD_SDI_PMP,
+};
+
+struct hdmi_spd_infoframe {
+	enum hdmi_infoframe_type type;
+	unsigned char version;
+	unsigned char length;
+	char vendor[8];
+	char product[16];
+	enum hdmi_spd_sdi sdi;
+};
+
+enum hdmi_audio_coding_type {
+	HDMI_AUDIO_CODING_TYPE_STREAM,
+	HDMI_AUDIO_CODING_TYPE_PCM,
+	HDMI_AUDIO_CODING_TYPE_AC3,
+	HDMI_AUDIO_CODING_TYPE_MPEG1,
+	HDMI_AUDIO_CODING_TYPE_MP3,
+	HDMI_AUDIO_CODING_TYPE_MPEG2,
+	HDMI_AUDIO_CODING_TYPE_AAC_LC,
+	HDMI_AUDIO_CODING_TYPE_DTS,
+	HDMI_AUDIO_CODING_TYPE_ATRAC,
+	HDMI_AUDIO_CODING_TYPE_DSD,
+	HDMI_AUDIO_CODING_TYPE_EAC3,
+	HDMI_AUDIO_CODING_TYPE_DTS_HD,
+	HDMI_AUDIO_CODING_TYPE_MLP,
+	HDMI_AUDIO_CODING_TYPE_DST,
+	HDMI_AUDIO_CODING_TYPE_WMA_PRO,
+	HDMI_AUDIO_CODING_TYPE_CXT,
+};
+
+enum hdmi_audio_sample_size {
+	HDMI_AUDIO_SAMPLE_SIZE_STREAM,
+	HDMI_AUDIO_SAMPLE_SIZE_16,
+	HDMI_AUDIO_SAMPLE_SIZE_20,
+	HDMI_AUDIO_SAMPLE_SIZE_24,
+};
+
+enum hdmi_audio_sample_frequency {
+	HDMI_AUDIO_SAMPLE_FREQUENCY_STREAM,
+	HDMI_AUDIO_SAMPLE_FREQUENCY_32000,
+	HDMI_AUDIO_SAMPLE_FREQUENCY_44100,
+	HDMI_AUDIO_SAMPLE_FREQUENCY_48000,
+	HDMI_AUDIO_SAMPLE_FREQUENCY_88200,
+	HDMI_AUDIO_SAMPLE_FREQUENCY_96000,
+	HDMI_AUDIO_SAMPLE_FREQUENCY_176400,
+	HDMI_AUDIO_SAMPLE_FREQUENCY_192000,
+};
+
+enum hdmi_audio_coding_type_ext {
+	/* Refer to Audio Coding Type (CT) field in Data Byte 1 */
+	HDMI_AUDIO_CODING_TYPE_EXT_CT,
+
+	/*
+	 * The next three CXT values are defined in CEA-861-E only.
+	 * They do not exist in older versions, and in CEA-861-F they are
+	 * defined as 'Not in use'.
+	 */
+	HDMI_AUDIO_CODING_TYPE_EXT_HE_AAC,
+	HDMI_AUDIO_CODING_TYPE_EXT_HE_AAC_V2,
+	HDMI_AUDIO_CODING_TYPE_EXT_MPEG_SURROUND,
+
+	/* The following CXT values are only defined in CEA-861-F. */
+	HDMI_AUDIO_CODING_TYPE_EXT_MPEG4_HE_AAC,
+	HDMI_AUDIO_CODING_TYPE_EXT_MPEG4_HE_AAC_V2,
+	HDMI_AUDIO_CODING_TYPE_EXT_MPEG4_AAC_LC,
+	HDMI_AUDIO_CODING_TYPE_EXT_DRA,
+	HDMI_AUDIO_CODING_TYPE_EXT_MPEG4_HE_AAC_SURROUND,
+	HDMI_AUDIO_CODING_TYPE_EXT_MPEG4_AAC_LC_SURROUND = 10,
+};
+
+struct hdmi_audio_infoframe {
+	enum hdmi_infoframe_type type;
+	unsigned char version;
+	unsigned char length;
+	unsigned char channels;
+	enum hdmi_audio_coding_type coding_type;
+	enum hdmi_audio_sample_size sample_size;
+	enum hdmi_audio_sample_frequency sample_frequency;
+	enum hdmi_audio_coding_type_ext coding_type_ext;
+	unsigned char channel_allocation;
+	unsigned char level_shift_value;
+	bool downmix_inhibit;
+
+};
+
+enum hdmi_3d_structure {
+	HDMI_3D_STRUCTURE_INVALID = -1,
+	HDMI_3D_STRUCTURE_FRAME_PACKING = 0,
+	HDMI_3D_STRUCTURE_FIELD_ALTERNATIVE,
+	HDMI_3D_STRUCTURE_LINE_ALTERNATIVE,
+	HDMI_3D_STRUCTURE_SIDE_BY_SIDE_FULL,
+	HDMI_3D_STRUCTURE_L_DEPTH,
+	HDMI_3D_STRUCTURE_L_DEPTH_GFX_GFX_DEPTH,
+	HDMI_3D_STRUCTURE_TOP_AND_BOTTOM,
+	HDMI_3D_STRUCTURE_SIDE_BY_SIDE_HALF = 8,
+};
+
+struct hdmi_vendor_infoframe {
+	enum hdmi_infoframe_type type;
+	unsigned char version;
+	unsigned char length;
+	unsigned int oui;
+	u8 vic;
+	enum hdmi_3d_structure s3d_struct;
+	unsigned int s3d_ext_data;
+};
+
+union hdmi_vendor_any_infoframe {
+	struct {
+		enum hdmi_infoframe_type type;
+		unsigned char version;
+		unsigned char length;
+		unsigned int oui;
+	} any;
+	struct hdmi_vendor_infoframe hdmi;
+};
+
+/**
+ * union hdmi_infoframe: overall union of all abstract infoframe representations
+ * @any: generic infoframe
+ * @avi: avi infoframe
+ * @spd: spd infoframe
+ * @vendor: union of all vendor infoframes
+ * @audio: audio infoframe
+ *
+ * This is used by the generic pack function. This works since all infoframes
+ * have the same header which also indicates which type of infoframe should be
+ * packed.
+ */
+union hdmi_infoframe {
+	struct hdmi_any_infoframe any;
+	struct hdmi_avi_infoframe avi;
+	struct hdmi_spd_infoframe spd;
+	union hdmi_vendor_any_infoframe vendor;
+	struct hdmi_audio_infoframe audio;
+};
+
+ssize_t hdmi_vendor_infoframe_pack(struct hdmi_vendor_infoframe *frame,
+				   void *buffer, size_t size);
+int
+drm_hdmi_vendor_infoframe_from_display_mode(struct hdmi_vendor_infoframe *frame,
+					    struct drm_display_mode *mode);
+int
+drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame,
+					 struct drm_display_mode *mode,
+					 bool is_hdmi2_sink);
+u8 drm_match_cea_mode(struct drm_display_mode *to_match);
+
+#endif /* _DRM_HDMI_H */
diff --git a/include/linux/media-bus-format.h b/include/linux/media-bus-format.h
index 190d491d5b..37ca603fe2 100644
--- a/include/linux/media-bus-format.h
+++ b/include/linux/media-bus-format.h
@@ -2,6 +2,7 @@
  * Media Bus API header
  *
  * Copyright (C) 2009, Guennadi Liakhovetski <g.liakhovetski@gmx.de>
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -57,6 +58,9 @@
 #define MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA	0x1012
 #define MEDIA_BUS_FMT_ARGB8888_1X32		0x100d
 #define MEDIA_BUS_FMT_RGB888_1X32_PADHI		0x100f
+#define MEDIA_BUS_FMT_RGB101010_1X30		0x1018
+#define MEDIA_BUS_FMT_RGB121212_1X36		0x1019
+#define MEDIA_BUS_FMT_RGB161616_1X48		0x101a
 
 /* YUV (including grey) - next is	0x2026 */
 #define MEDIA_BUS_FMT_Y8_1X8			0x2001
@@ -90,12 +94,18 @@
 #define MEDIA_BUS_FMT_YVYU10_1X20		0x200e
 #define MEDIA_BUS_FMT_VUY8_1X24			0x2024
 #define MEDIA_BUS_FMT_YUV8_1X24			0x2025
+#define MEDIA_BUS_FMT_UYYVYY8_0_5X24		0x2026
 #define MEDIA_BUS_FMT_UYVY12_1X24		0x2020
 #define MEDIA_BUS_FMT_VYUY12_1X24		0x2021
 #define MEDIA_BUS_FMT_YUYV12_1X24		0x2022
 #define MEDIA_BUS_FMT_YVYU12_1X24		0x2023
 #define MEDIA_BUS_FMT_YUV10_1X30		0x2016
+#define MEDIA_BUS_FMT_UYYVYY10_0_5X30		0x2027
 #define MEDIA_BUS_FMT_AYUV8_1X32		0x2017
+#define MEDIA_BUS_FMT_UYYVYY12_0_5X36		0x2028
+#define MEDIA_BUS_FMT_YUV12_1X36		0x2029
+#define MEDIA_BUS_FMT_YUV16_1X48		0x202a
+#define MEDIA_BUS_FMT_UYYVYY16_0_5X48		0x202b
 
 /* Bayer - next is	0x3019 */
 #define MEDIA_BUS_FMT_SBGGR8_1X8		0x3001

commit 5e7e40617c072f20dbaf33e6a32b8721eb8157e3
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Nov 13 15:26:40 2017 +0800

    test: rockchip: add bootrom download mode test
    
    Enter bootrom download mode by command: rktest brom_dnl
    
    Change-Id: I6120a885e5514a57c81fd469ce27a2472009c4fd
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/test/rockchip/Makefile b/test/rockchip/Makefile
index 0113a3724e..90c710ce44 100644
--- a/test/rockchip/Makefile
+++ b/test/rockchip/Makefile
@@ -12,3 +12,4 @@ obj-y += test-regulator.o
 obj-y += test-rknand.o
 obj-$(CONFIG_GMAC_ROCKCHIP) += test-eth.o
 obj-$(CONFIG_RK_IR) += test-ir.o
+obj-y += test-brom-dnl.o
diff --git a/test/rockchip/test-brom-dnl.c b/test/rockchip/test-brom-dnl.c
new file mode 100644
index 0000000000..85f60c5afc
--- /dev/null
+++ b/test/rockchip/test-brom-dnl.c
@@ -0,0 +1,9 @@
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/boot_mode.h>
+
+int board_brom_dnl_test(int argc, char * const argv[])
+{
+	writel(BOOT_BROM_DOWNLOAD, CONFIG_ROCKCHIP_BOOT_MODE_REG);
+	return do_reset(NULL, 0, 0, NULL);
+}
diff --git a/test/rockchip/test-rockchip.c b/test/rockchip/test-rockchip.c
index 22e369022a..d6e808bfb9 100644
--- a/test/rockchip/test-rockchip.c
+++ b/test/rockchip/test-rockchip.c
@@ -25,6 +25,7 @@ static board_module_t g_board_modules[] = {
 #if defined(CONFIG_RK_IR)
 	{ .name = "ir",		.test = board_ir_test },
 #endif
+	{ .name = "brom_dnl",	.test = board_brom_dnl_test}
 };
 
 static int do_rockchip_test(cmd_tbl_t *cmdtp, int flag,
diff --git a/test/rockchip/test-rockchip.h b/test/rockchip/test-rockchip.h
index 29930a4748..e628829a28 100644
--- a/test/rockchip/test-rockchip.h
+++ b/test/rockchip/test-rockchip.h
@@ -19,4 +19,6 @@ int board_eth_test(int argc, char * const argv[]);
 int board_ir_test(int argc, char * const argv[]);
 #endif
 
+int board_brom_dnl_test(int argc, char * const argv[]);
+
 #endif /* _TEST_ROCKCHIP_H */

commit 4334dc85d1eb7c8b1a1ae0db95e477b735c14e1b
Author: Cody Xie <cody.xie@rock-chips.com>
Date:   Tue Nov 14 19:34:56 2017 +0800

    gva_rk3229: Use GPIO1_B3 as key for fastboot.
    
    TODO:
    Switch back to SoM defined GPIO3_C4 when SoM HW ready.
    
    Change-Id: I58c4fc0b6ec330d3b5ebe62c974605c3a5111c8b
    Signed-off-by: Cody Xie <cody.xie@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk322x-board.c b/arch/arm/mach-rockchip/rk322x-board.c
index ce96538f6f..88281abc0c 100644
--- a/arch/arm/mach-rockchip/rk322x-board.c
+++ b/arch/arm/mach-rockchip/rk322x-board.c
@@ -37,7 +37,7 @@ struct tos_parameter_t {
 	s64 reserve[8];
 };
 
-#define FASTBOOT_KEY_GPIO 116 /* GPIO3_C4 */
+#define FASTBOOT_KEY_GPIO 43 /* GPIO1_B3 */
 static int fastboot_key_pressed(void)
 {
 	gpio_request(FASTBOOT_KEY_GPIO, "fastboot_key");

commit 5fbcd8b99c0c2d3205e9d4f6fe883e7a1ff90d24
Author: Cody Xie <cody.xie@rock-chips.com>
Date:   Wed Nov 15 16:10:33 2017 +0800

    rk322x: fastboot mode: Call fb_set_reboot_flag instead.
    
    Don't set env "preboot", set reboot flag instead.
    And let setup_boot_mode to do the mode change.
    
    Change-Id: I3de480fc306255f31a7ae99e2186e6345df36ca8
    Signed-off-by: Cody Xie <cody.xie@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk322x-board.c b/arch/arm/mach-rockchip/rk322x-board.c
index eeb68a1fc8..ce96538f6f 100644
--- a/arch/arm/mach-rockchip/rk322x-board.c
+++ b/arch/arm/mach-rockchip/rk322x-board.c
@@ -52,13 +52,13 @@ __weak int rk_board_late_init(void)
 
 int board_late_init(void)
 {
-	setup_boot_mode();
-
 	if (fastboot_key_pressed()) {
 		printf("fastboot key pressed!\n");
-		env_set("preboot", "setenv preboot; fastboot usb 0");
+		fb_set_reboot_flag();
 	}
 
+	setup_boot_mode();
+
 	return rk_board_late_init();
 }
 

commit 6dfc2752ce75a48760916cfbd9ec0eb9eac67ad5
Author: Weiwen Chen <cww@rock-chips.com>
Date:   Mon Nov 13 16:39:41 2017 +0800

    bootmode: add check key status to boot into fastboot mode
    
    Change-Id: Ib064a7b0208b7f59715b6563af23716f9e9fa9e3
    Signed-off-by: Weiwen Chen <cww@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk322x-board.c b/arch/arm/mach-rockchip/rk322x-board.c
index ee89c121bf..eeb68a1fc8 100644
--- a/arch/arm/mach-rockchip/rk322x-board.c
+++ b/arch/arm/mach-rockchip/rk322x-board.c
@@ -9,6 +9,7 @@
 #include <ram.h>
 #include <syscon.h>
 #include <asm/io.h>
+#include <asm/gpio.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/periph.h>
 #include <asm/arch/grf_rk322x.h>
@@ -36,6 +37,14 @@ struct tos_parameter_t {
 	s64 reserve[8];
 };
 
+#define FASTBOOT_KEY_GPIO 116 /* GPIO3_C4 */
+static int fastboot_key_pressed(void)
+{
+	gpio_request(FASTBOOT_KEY_GPIO, "fastboot_key");
+	gpio_direction_input(FASTBOOT_KEY_GPIO);
+	return !gpio_get_value(FASTBOOT_KEY_GPIO);
+}
+
 __weak int rk_board_late_init(void)
 {
 	return 0;
@@ -45,6 +54,11 @@ int board_late_init(void)
 {
 	setup_boot_mode();
 
+	if (fastboot_key_pressed()) {
+		printf("fastboot key pressed!\n");
+		env_set("preboot", "setenv preboot; fastboot usb 0");
+	}
+
 	return rk_board_late_init();
 }
 

commit 4d0fc6653425df6de128bc7911d38c65ce554ab6
Author: Andy Ye <Andy.Ye@rock-chips.com>
Date:   Tue Nov 7 15:21:45 2017 +0800

    fastboot:support attestation commands
    
    Change-Id: I984a107270991a9e9d60e907b9be4e0d0d462671
    Signed-off-by: Andy Ye <andy.ye@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 93e504d09f..3e867f34c7 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -28,6 +28,9 @@
 #ifdef CONFIG_FASTBOOT_FLASH_NAND_DEV
 #include <fb_nand.h>
 #endif
+#ifdef CONFIG_OPTEE_CLIENT
+#include <optee_include/OpteeClientInterface.h>
+#endif
 
 #define FASTBOOT_VERSION		"0.4"
 
@@ -435,13 +438,31 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req)
 		else
 			strcpy(response, "FAILValue not set");
 	} else if (strncmp("at-attest-dh", cmd, 12) == 0) {
-		char dh[32] = {0};
-
-		strncat(response, dh, chars_left);
+#ifdef CONFIG_OPTEE_CLIENT
+		char dhbuf[8];
+		uint32_t dh_len = 8;
+		uint32_t res = trusty_attest_dh((uint8_t *)dhbuf, &dh_len);
+		if (res)
+			strcpy(response, "FAILdh not set");
+		else
+			strncat(response, dhbuf, chars_left);
+#else
+		fastboot_tx_write_str("FAILnot implemented");
+		return;
+#endif
 	} else if (strncmp("at-attest-uuid", cmd, 14) == 0) {
+#ifdef CONFIG_OPTEE_CLIENT
 		char uuid[32] = {0};
-
-		strncat(response, uuid, chars_left);
+		uint32_t uuid_len = 32;
+		uint32_t res = trusty_attest_uuid((uint8_t *)uuid, &uuid_len);
+		if (res)
+			strcpy(response, "FAILuuid not set");
+		else
+			strncat(response, uuid, chars_left);
+#else
+		fastboot_tx_write_str("FAILnot implemented");
+		return;
+#endif
 	} else if (strncmp("at-vboot-state", cmd, 14) == 0) {
 		char uuid[32] = {0};
 
@@ -762,7 +783,7 @@ static void cb_upload(struct usb_ep *ep, struct usb_request *req)
 {
 	char response[FASTBOOT_RESPONSE_LEN];
 
-	upload_size = download_bytes;
+
 
 	printf("Starting upload of %d bytes\n", upload_size);
 
@@ -941,9 +962,41 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 	if (strncmp("unlock", cmd + 4, 8) == 0) {
 		fastboot_tx_write_str("FAILnot implemented");
 	} else if (strncmp("at-get-ca-request", cmd + 4, 17) == 0) {
+#ifdef CONFIG_OPTEE_CLIENT
+		uint8_t operation_start[128];
+		uint8_t out[256];
+		uint32_t operation_size = download_bytes;
+		uint32_t out_len = 256;
+		uint32_t res = 0;
+		memcpy(operation_start, (void *)CONFIG_FASTBOOT_BUF_ADDR, download_bytes);
+		res = trusty_attest_get_ca(operation_start, &operation_size, out, &out_len);
+		if (res) {
+			fastboot_tx_write_str("FAILtrusty_attest_get_ca failed");
+			return;
+		}
+		upload_size = out_len;
+		memcpy((void *)CONFIG_FASTBOOT_BUF_ADDR, out, out_len);
 		fastboot_tx_write_str("OKAY");
+#else
+		fastboot_tx_write_str("FAILnot implemented");
+		return;
+#endif
 	} else if (strncmp("at-set-ca-response", cmd + 4, 18) == 0) {
-		fastboot_tx_write_str("OKAY");
+#ifdef CONFIG_OPTEE_CLIENT
+		uint8_t ca_response[8*1024];
+		uint32_t ca_response_size = download_bytes;
+		uint32_t res = 0;
+		memcpy(ca_response, (void *)CONFIG_FASTBOOT_BUF_ADDR, download_bytes);
+		res = trusty_attest_set_ca(ca_response, &ca_response_size);
+		if (res) {
+			fastboot_tx_write_str("FAILtrusty_attest_set_ca failed");
+		} else {
+			fastboot_tx_write_str("OKAY");
+		}
+#else
+		fastboot_tx_write_str("FAILnot implemented");
+		return;
+#endif
 	} else if (strncmp("at-lock-vboot", cmd + 4, 13) == 0) {
 #ifdef CONFIG_AVB_LIBAVB_USER
 		uint8_t lock_state;

commit 6e7a7f7010d7f7a47c770257f9ce0c3cc3ab66e6
Author: Shunqing Chen <csq@rock-chips.com>
Date:   Fri Nov 17 17:32:59 2017 +0800

    rockchip: rk3229: gva: add cw201x support.
    
    Change-Id: Ic2717c89949d0361f4720dbcdc0fd6e6f098d078
    Signed-off-by: Shunqing Chen <csq@rock-chips.com>

diff --git a/arch/arm/dts/rk3229-gva.dts b/arch/arm/dts/rk3229-gva.dts
index 17a6708837..35b266e3b3 100644
--- a/arch/arm/dts/rk3229-gva.dts
+++ b/arch/arm/dts/rk3229-gva.dts
@@ -224,6 +224,26 @@
 			};
 		};
 	};
+
+	cw201x: cw2015@62 {
+		compatible = "cw201x";
+		status = "okay";
+		reg = <0x62>;
+		bat_config_info = <0x15 0x42 0x60 0x59 0x52 0x58 0x4D 0x48
+				   0x48 0x44 0x44 0x46 0x49 0x48 0x32 0x24
+				   0x20 0x17 0x13 0x0F 0x19 0x3E 0x51 0x45
+				   0x08 0x76 0x0B 0x85 0x0E 0x1C 0x2E 0x3E
+				   0x4D 0x52 0x52 0x57 0x3D 0x1B 0x6A 0x2D
+				   0x25 0x43 0x52 0x87 0x8F 0x91 0x94 0x52
+				   0x82 0x8C 0x92 0x96 0xFF 0x7B 0xBB 0xCB
+				   0x2F 0x7D 0x72 0xA5 0xB5 0xC1 0x46 0xAE>;
+		support_dc_adp = <1>;
+		dc_det_gpio = <88>;
+		dc_det_flag = <1>;
+		hw_id_check = <1>;
+		hw_id0_gpio = <86>;
+		hw_id1_gpio = <87>;
+	};
 };
 
 &cpu0 {

commit 384c6d153df5975ab8d237ce1ad74548a8d6b32f
Author: Shunqing Chen <csq@rock-chips.com>
Date:   Thu Nov 16 17:00:00 2017 +0800

    fuel gauge: add cw201x support.
    
    The CW2013 is a system-side used Fuel Gauging.
    
    Change-Id: Iac7c2d72bef36710a3e8966f2e58741d2ec421d9
    Signed-off-by: Shunqing Chen <csq@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/Kconfig b/drivers/power/fuel_gauge/Kconfig
index 3be00c67a3..7ba34aadaf 100644
--- a/drivers/power/fuel_gauge/Kconfig
+++ b/drivers/power/fuel_gauge/Kconfig
@@ -4,6 +4,13 @@ config DM_FUEL_GAUGE
 	help
 	  This adds a simple uclass for fuel gauge.
 
+config POWER_FG_CW201X
+	bool "CW201X Fuel gauge support"
+	depends on DM_FUEL_GAUGE
+	default y
+	help
+	  This adds support for CW201X fuel gauge support.
+
 config POWER_FG_RK818
 	bool "RK818 Fuel gauge support"
 	depends on DM_FUEL_GAUGE && PMIC_RK8XX
diff --git a/drivers/power/fuel_gauge/Makefile b/drivers/power/fuel_gauge/Makefile
index 5e9d2c6126..fa73ef770e 100644
--- a/drivers/power/fuel_gauge/Makefile
+++ b/drivers/power/fuel_gauge/Makefile
@@ -7,6 +7,7 @@
 
 obj-$(CONFIG_DM_FUEL_GAUGE) += fuel_gauge_uclass.o
 
+obj-$(CONFIG_POWER_FG_CW201X) += fg_cw201x.o
 obj-$(CONFIG_POWER_FG_MAX17042) += fg_max17042.o
 obj-$(CONFIG_POWER_FG_RK818) += fg_rk818.o
 obj-$(CONFIG_POWER_FG_RK816) += fg_rk816.o
diff --git a/drivers/power/fuel_gauge/fg_cw201x.c b/drivers/power/fuel_gauge/fg_cw201x.c
new file mode 100755
index 0000000000..eb14c116f0
--- /dev/null
+++ b/drivers/power/fuel_gauge/fg_cw201x.c
@@ -0,0 +1,354 @@
+/*
+ * (C) Copyright 2008-2015 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#include <common.h>
+#include <asm/gpio.h>
+#include <dm.h>
+#include <dm/device.h>
+#include <errno.h>
+#include <fdtdec.h>
+#include <i2c.h>
+#include <linux/usb/phy-rockchip-inno-usb2.h>
+#include <malloc.h>
+#include <power/battery.h>
+#include <power/fuel_gauge.h>
+#include <power/pmic.h>
+#include "fg_regs.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define COMPAT_ROCKCHIP_CW201X "cw201x"
+
+#define REG_VERSION		0x0
+#define REG_VCELL		0x2
+#define REG_SOC			0x4
+#define REG_RRT_ALERT		0x6
+#define REG_CONFIG		0x8
+#define REG_MODE		0xA
+#define REG_BATINFO		0x10
+
+#define MODE_SLEEP_MASK		(0x3 << 6)
+#define MODE_SLEEP		(0x3 << 6)
+#define MODE_NORMAL		(0x0 << 6)
+#define MODE_QUICK_START	(0x3 << 4)
+#define MODE_RESTART		(0xf << 0)
+
+#define CONFIG_UPDATE_FLG	(0x1 << 1)
+#define ATHD			(0x0 << 3)
+
+enum charger_type {
+	CHARGER_TYPE_NO = 0,
+	CHARGER_TYPE_USB,
+	CHARGER_TYPE_AC,
+	CHARGER_TYPE_DC,
+	CHARGER_TYPE_UNDEF,
+};
+
+struct cw201x_info {
+	struct udevice *dev;
+	int capacity;
+	u32 *cw_bat_config_info;
+	int divider_res1;
+	int divider_res2;
+	int hw_id_check;
+	int hw_id0;
+	int hw_id1;
+	int support_dc_adp;
+	int dc_det_gpio;
+	int dc_det_flag;
+};
+
+static u8 cw201x_read(struct cw201x_info *cw201x, u8 reg)
+{
+	u8 val;
+	int ret;
+
+	ret = dm_i2c_read(cw201x->dev, reg, &val, 1);
+	if (ret) {
+		debug("write error to device: %p register: %#x!",
+		      cw201x->dev, reg);
+		return ret;
+	}
+
+	return val;
+}
+
+static int cw201x_write(struct cw201x_info *cw201x, u8 reg, u8 val)
+{
+	int ret;
+
+	ret = dm_i2c_write(cw201x->dev, reg, &val, 1);
+	if (ret) {
+		debug("write error to device: %p register: %#x!",
+		      cw201x->dev, reg);
+		return ret;
+	}
+
+	return 0;
+}
+
+static u16 cw201x_read_half_word(struct cw201x_info *cw201x, int reg)
+{
+	u8 vall, valh;
+	u16 val;
+
+	valh = cw201x_read(cw201x, reg);
+	vall = cw201x_read(cw201x, reg + 1);
+	val = ((u16)valh << 8) | vall;
+
+	return val;
+}
+
+static int cw201x_ofdata_to_platdata(struct udevice *dev)
+{
+	const void *blob = gd->fdt_blob;
+	int node = dev_of_offset(dev);
+	struct cw201x_info *cw201x = dev_get_priv(dev);
+	int ret;
+	int len, size;
+	int hw_id0_val, hw_id1_val;
+
+	if (fdt_getprop(blob, node, "bat_config_info", &len)) {
+		len /= sizeof(u32);
+		size = sizeof(*cw201x->cw_bat_config_info) * len;
+		cw201x->cw_bat_config_info = calloc(size, 1);
+		if (!cw201x->cw_bat_config_info) {
+			debug("calloc cw_bat_config_info fail\n");
+			return -EINVAL;
+		}
+		ret = fdtdec_get_int_array(blob, node,
+					   "bat_config_info",
+					   cw201x->cw_bat_config_info, len);
+		if (ret) {
+			debug("fdtdec_get cw_bat_config_info fail\n");
+			return -EINVAL;
+		}
+	}
+
+	cw201x->support_dc_adp = fdtdec_get_int(blob, node,
+						"support_dc_adp", 0);
+	if (cw201x->support_dc_adp) {
+		cw201x->dc_det_gpio = fdtdec_get_int(blob, node,
+						     "dc_det_gpio", 0);
+		if (!cw201x->dc_det_gpio)
+			return -EINVAL;
+		gpio_request(cw201x->dc_det_gpio, "dc_det_gpio");
+		gpio_direction_input(cw201x->dc_det_gpio);
+
+		cw201x->dc_det_flag = fdtdec_get_int(blob, node,
+						     "dc_det_flag", 0);
+	}
+
+	cw201x->hw_id_check = fdtdec_get_int(blob, node, "hw_id_check", 0);
+	if (cw201x->hw_id_check) {
+		cw201x->hw_id0 = fdtdec_get_int(blob, node, "hw_id0_gpio", 0);
+		if (!cw201x->hw_id0)
+			return -EINVAL;
+		gpio_request(cw201x->hw_id0, "hw_id0_gpio");
+		gpio_direction_input(cw201x->hw_id0);
+		hw_id0_val = gpio_get_value(cw201x->hw_id0);
+
+		cw201x->hw_id1 = fdtdec_get_int(blob, node, "hw_id1_gpio", 0);
+		if (!cw201x->hw_id1)
+			return -EINVAL;
+		gpio_request(cw201x->hw_id1, "hw_id1_gpio");
+		gpio_direction_input(cw201x->hw_id1);
+		hw_id1_val = gpio_get_value(cw201x->hw_id1);
+
+		/* ID1 = 0, ID0 = 1 : Battery */
+		if (!hw_id0_val || hw_id1_val)
+			return -EINVAL;
+	}
+
+	cw201x->divider_res1 = fdtdec_get_int(blob, node, "divider_res1", 0);
+	cw201x->divider_res2 = fdtdec_get_int(blob, node, "divider_res2", 0);
+
+	return 0;
+}
+
+static int cw201x_get_vol(struct cw201x_info *cw201x)
+{
+	u16 value16, value16_1, value16_2, value16_3;
+	int voltage;
+	int res1, res2;
+
+	value16 = cw201x_read_half_word(cw201x, REG_VCELL);
+	if (value16 < 0)
+		return -1;
+
+	value16_1 = cw201x_read_half_word(cw201x, REG_VCELL);
+	if (value16_1 < 0)
+		return -1;
+
+	value16_2 = cw201x_read_half_word(cw201x, REG_VCELL);
+	if (value16_2 < 0)
+		return -1;
+
+	if (value16 > value16_1) {
+		value16_3 = value16;
+		value16 = value16_1;
+		value16_1 = value16_3;
+	}
+
+	if (value16_1 > value16_2) {
+		value16_3 = value16_1;
+		value16_1 = value16_2;
+		value16_2 = value16_3;
+	}
+
+	if (value16 > value16_1) {
+		value16_3 = value16;
+		value16 = value16_1;
+		value16_1 = value16_3;
+	}
+
+	voltage = value16_1 * 312 / 1024;
+
+	if (cw201x->divider_res1 &&
+	    cw201x->divider_res2) {
+		res1 = cw201x->divider_res1;
+		res2 = cw201x->divider_res2;
+		voltage = voltage * (res1 + res2) / res2;
+	}
+
+	debug("the cw201x voltage=%d\n", voltage);
+	return voltage;
+}
+
+static int cw201x_dwc_otg_check_dpdm(void)
+{
+#ifdef CONFIG_PHY_ROCKCHIP_INNO_USB2
+	return rockchip_chg_get_type();
+#else
+	debug("rockchip_chg_get_type() is not implement\n");
+	return CHARGER_TYPE_NO;
+#endif
+}
+
+static int cw201x_get_usb_state(struct cw201x_info *cw201x)
+{
+	int charger_type;
+
+	switch (cw201x_dwc_otg_check_dpdm()) {
+	case 0:
+		charger_type = CHARGER_TYPE_NO;
+		break;
+	case 1:
+	case 3:
+		charger_type = CHARGER_TYPE_USB;
+		break;
+	case 2:
+		charger_type = CHARGER_TYPE_AC;
+		break;
+	default:
+		charger_type = CHARGER_TYPE_NO;
+		break;
+	}
+
+	return charger_type;
+}
+
+static bool cw201x_get_dc_state(struct cw201x_info *cw201x)
+{
+	if (gpio_get_value(cw201x->dc_det_gpio) == cw201x->dc_det_flag)
+		return true;
+
+	return false;
+}
+
+static bool cw201x_check_charge(struct cw201x_info *cw201x)
+{
+	if (cw201x_get_usb_state(cw201x) != CHARGER_TYPE_NO)
+		return true;
+	if (cw201x_get_dc_state(cw201x))
+		return true;
+
+	return false;
+}
+
+static int cw201x_get_soc(struct cw201x_info *cw201x)
+{
+	int cap;
+
+	cap = cw201x_read(cw201x, REG_SOC);
+	if ((cap < 0) || (cap > 100))
+		cap = cw201x->capacity;
+
+	cw201x->capacity = cap;
+	return cw201x->capacity;
+}
+
+static int cw201x_update_get_soc(struct udevice *dev)
+{
+	struct cw201x_info *cw201x = dev_get_priv(dev);
+
+	return cw201x_get_soc(cw201x);
+}
+
+static int cw201x_update_get_voltage(struct udevice *dev)
+{
+	struct cw201x_info *cw201x = dev_get_priv(dev);
+
+	return cw201x_get_vol(cw201x);
+}
+
+static bool cw201x_update_get_chrg_online(struct udevice *dev)
+{
+	struct cw201x_info *cw201x = dev_get_priv(dev);
+
+	return cw201x_check_charge(cw201x);
+}
+
+static struct dm_fuel_gauge_ops cw201x_fg_ops = {
+	.get_soc = cw201x_update_get_soc,
+	.get_voltage = cw201x_update_get_voltage,
+	.get_chrg_online = cw201x_update_get_chrg_online,
+};
+
+static int cw201x_fg_cfg(struct cw201x_info *cw201x)
+{
+	u8 val = MODE_SLEEP;
+	int i;
+
+	if ((val & MODE_SLEEP_MASK) == MODE_SLEEP) {
+		val = MODE_NORMAL;
+		cw201x_write(cw201x, REG_MODE, val);
+	}
+
+	for (i = 0; i < 64; i++) {
+		cw201x_write(cw201x, REG_BATINFO + i,
+			     (u8)cw201x->cw_bat_config_info[i]);
+	}
+
+	return 0;
+}
+
+static int cw201x_fg_probe(struct udevice *dev)
+{
+	struct cw201x_info *cw201x = dev_get_priv(dev);
+
+	cw201x->dev = dev;
+	cw201x_fg_cfg(cw201x);
+
+	debug("vol: %d, soc: %d\n",
+	      cw201x_get_vol(cw201x), cw201x_get_soc(cw201x));
+
+	return 0;
+}
+
+static const struct udevice_id cw201x_ids[] = {
+	{ .compatible = "cw201x" },
+	{ }
+};
+
+U_BOOT_DRIVER(cw201x_fg) = {
+	.name = "cw201x_fg",
+	.id = UCLASS_FG,
+	.of_match = cw201x_ids,
+	.probe = cw201x_fg_probe,
+	.ofdata_to_platdata = cw201x_ofdata_to_platdata,
+	.ops = &cw201x_fg_ops,
+	.priv_auto_alloc_size = sizeof(struct cw201x_info),
+};

commit 4aa617558f6924256fa0e0150df1bffc229e81e7
Author: Andy Ye <Andy.Ye@rock-chips.com>
Date:   Tue Nov 7 14:11:53 2017 +0800

    lib: optee_client: add attestation protocol support using optee
    
    support attestation commands:
    at-attest-dh,at-attest-uuid,at-get-ca-request,at-set-ca-request
    
    Change-Id: I3fe94befa57a131e89dbe136c065a948b1631756
    Signed-off-by: Andy Ye <andy.ye@rock-chips.com>

diff --git a/include/optee_include/OpteeClientInterface.h b/include/optee_include/OpteeClientInterface.h
index 5f3089d367..9954cbf7aa 100644
--- a/include/optee_include/OpteeClientInterface.h
+++ b/include/optee_include/OpteeClientInterface.h
@@ -27,5 +27,10 @@ uint32_t trusty_write_vbootkey_hash(uint32_t *buf, uint32_t length);
 uint32_t trusty_read_vbootkey_enable_flag(uint8_t *flag);
 uint32_t trusty_read_permanent_attributes_flag(uint8_t *attributes);
 uint32_t trusty_write_permanent_attributes_flag(uint8_t attributes);
-
+uint32_t trusty_attest_dh(uint8_t *dh, uint32_t *dh_size);
+uint32_t trusty_attest_uuid(uint8_t *uuid, uint32_t *uuid_size);
+uint32_t trusty_attest_get_ca
+	(uint8_t *operation_start, uint32_t *operation_size,
+	 uint8_t *out, uint32_t *out_len);
+uint32_t trusty_attest_set_ca(uint8_t *ca_response, uint32_t *ca_response_size);
 #endif
diff --git a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c
deleted file mode 100644
index e9c3aadc3d..0000000000
--- a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c
+++ /dev/null
@@ -1,16634 +0,0 @@
-#include <stdint.h>
-#include <stddef.h>
-
-const uint8_t keymaster_data[] = {
-0x48, 0x53, 0x54, 0x4f, 0x00, 0x00, 0x00, 0x00,
-0x70, 0x06, 0x02, 0x00, 0x30, 0x48, 0x00, 0x70,
-0x20, 0x00, 0x00, 0x01, 0xfa, 0xf1, 0xef, 0x23,
-0x6e, 0xa3, 0x2e, 0xd9, 0x56, 0x3c, 0xb6, 0xba,
-0xa6, 0x3d, 0x60, 0x08, 0x6b, 0xe0, 0xe0, 0xd0,
-0x4c, 0x96, 0xb0, 0x72, 0xdf, 0x4e, 0xfa, 0xa7,
-0x79, 0x79, 0x93, 0xff, 0x0e, 0xf2, 0xf0, 0x25,
-0x90, 0x40, 0x71, 0x55, 0x95, 0xb8, 0x56, 0x83,
-0x30, 0x9a, 0x9b, 0x02, 0x9e, 0x30, 0x02, 0xfa,
-0x13, 0xad, 0x86, 0x5b, 0x76, 0xf7, 0x23, 0xda,
-0xc9, 0x40, 0xa1, 0x12, 0x20, 0x8f, 0xc6, 0x5a,
-0xed, 0x01, 0x0d, 0xc3, 0xe3, 0xcd, 0xc4, 0x00,
-0x90, 0xd5, 0x97, 0xf8, 0x24, 0x79, 0x9f, 0xab,
-0xaf, 0xc4, 0xf2, 0xe2, 0x67, 0xa2, 0xe2, 0x41,
-0x64, 0x8d, 0x3c, 0x91, 0xde, 0xc6, 0x5b, 0xe3,
-0xf5, 0xa6, 0x32, 0xbf, 0x64, 0xa6, 0xaf, 0xa3,
-0x18, 0xec, 0x24, 0x8d, 0x32, 0x95, 0x0a, 0xe6,
-0x63, 0x5c, 0xa6, 0x5d, 0x02, 0xa4, 0x5b, 0x06,
-0x95, 0x7e, 0xa8, 0xe3, 0x8f, 0xe6, 0xd5, 0xe4,
-0xd8, 0x8f, 0xba, 0x06, 0x1a, 0xa2, 0x7a, 0xd2,
-0x14, 0xe5, 0x75, 0xde, 0xd7, 0x8a, 0x63, 0x0d,
-0x51, 0x18, 0xc1, 0xfb, 0x78, 0xa3, 0xbd, 0x06,
-0x06, 0x1f, 0xa9, 0x8c, 0x1b, 0x9f, 0x46, 0xe8,
-0xd9, 0x77, 0x91, 0xc5, 0xf8, 0x9f, 0xd0, 0x8d,
-0x60, 0xdf, 0xb4, 0x6d, 0xe3, 0x7d, 0xf9, 0xab,
-0xff, 0x7b, 0xfe, 0x78, 0x7f, 0x2b, 0x67, 0x6c,
-0x3e, 0x6d, 0x7b, 0x47, 0xaa, 0x1f, 0xe6, 0x6e,
-0xa6, 0x94, 0xc3, 0x3c, 0xf7, 0x27, 0x3d, 0xbe,
-0x3e, 0xba, 0x69, 0x5d, 0x67, 0x98, 0xf0, 0x96,
-0x04, 0x6d, 0x01, 0xbb, 0x5f, 0x3b, 0x58, 0x57,
-0xe0, 0xbf, 0x8e, 0x6c, 0x32, 0xc2, 0x3d, 0x03,
-0xf4, 0xa5, 0x4a, 0xcd, 0x19, 0xc3, 0x9e, 0xfb,
-0xe0, 0xec, 0x25, 0xff, 0xb7, 0x67, 0x77, 0xe7,
-0x07, 0x0b, 0xb1, 0xa6, 0xb3, 0x5b, 0x5f, 0x97,
-0xa1, 0xc8, 0x83, 0x62, 0x6b, 0x2b, 0x1d, 0xf3,
-0xfd, 0x92, 0x3e, 0x45, 0x7f, 0x09, 0xf1, 0xcc,
-0xab, 0x59, 0xd6, 0xbd, 0x21, 0x7c, 0xec, 0xef,
-0x9d, 0xba, 0x52, 0x07, 0xf9, 0xd8, 0x92, 0xfb,
-0x8e, 0x11, 0x4d, 0xa1, 0x7f, 0x45, 0x4c, 0x46,
-0x01, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x28, 0x00,
-0x01, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00,
-0x34, 0x00, 0x00, 0x00, 0xf0, 0x03, 0x02, 0x00,
-0x02, 0x00, 0x00, 0x05, 0x34, 0x00, 0x20, 0x00,
-0x04, 0x00, 0x28, 0x00, 0x10, 0x00, 0x0f, 0x00,
-0x01, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x80, 0x32, 0x01, 0x00, 0x80, 0x32, 0x01, 0x00,
-0x07, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00,
-0x01, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x01, 0x00,
-0x00, 0x40, 0x01, 0x00, 0x00, 0x40, 0x01, 0x00,
-0xd2, 0x0d, 0x00, 0x00, 0x9a, 0xba, 0x00, 0x00,
-0x06, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00,
-0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00,
-0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x02, 0x00,
-0xc0, 0x02, 0x00, 0x00, 0xc0, 0x02, 0x00, 0x00,
-0x06, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00,
-0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00,
-0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x02, 0x00,
-0x78, 0x00, 0x00, 0x00, 0x78, 0x00, 0x00, 0x00,
-0x06, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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-0xd0, 0xf4, 0x00, 0x00, 0xd0, 0x74, 0x01, 0x00,
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-0x70, 0x31, 0x01, 0x00, 0x70, 0xb1, 0x01, 0x00,
-0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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-0x03, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00,
-0x10, 0x00, 0x00, 0x00, 0x2a, 0x00, 0x00, 0x00,
-0x09, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00,
-0x38, 0x32, 0x01, 0x00, 0x38, 0xb2, 0x01, 0x00,
-0x48, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00,
-0x04, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00,
-0x08, 0x00, 0x00, 0x00, 0x33, 0x00, 0x00, 0x00,
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-0x00, 0x40, 0x01, 0x00, 0x00, 0xc0, 0x01, 0x00,
-0xd2, 0x0d, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x39, 0x00, 0x00, 0x00,
-0x08, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
-0xd8, 0x4d, 0x01, 0x00, 0xd2, 0xcd, 0x01, 0x00,
-0xc2, 0xac, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x3e, 0x00, 0x00, 0x00,
-0x06, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x02, 0x00,
-0x78, 0x00, 0x00, 0x00, 0x0a, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00,
-0x08, 0x00, 0x00, 0x00, 0x47, 0x00, 0x00, 0x00,
-0x03, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00,
-0x78, 0x01, 0x02, 0x00, 0x78, 0x01, 0x02, 0x00,
-0xf3, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x4f, 0x00, 0x00, 0x00,
-0x05, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00,
-0x6c, 0x02, 0x02, 0x00, 0x6c, 0x02, 0x02, 0x00,
-0x54, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00,
-0x04, 0x00, 0x00, 0x00, 0x55, 0x00, 0x00, 0x00,
-0x01, 0x00, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0xc0, 0x02, 0x02, 0x00,
-0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
-0x01, 0x00, 0x00, 0x00, 0x5e, 0x00, 0x00, 0x00,
-0x03, 0x00, 0x00, 0x70, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x3f, 0x03, 0x02, 0x00,
-0x3a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x6e, 0x00, 0x00, 0x00,
-0x09, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00,
-0xa0, 0x31, 0x01, 0x00, 0xa0, 0xb1, 0x01, 0x00,
-0x98, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00,
-0x08, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
-0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x79, 0x03, 0x02, 0x00,
-0x77, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, };
-const uint32_t keymaster_size = 133028;
diff --git a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta
index 49e6582cc6..7de07bb0cf 100644
Binary files a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta and b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta differ
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index 9f309d0a44..7710c89a50 100644
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -1217,3 +1217,244 @@ uint32_t trusty_write_permanent_attributes_flag(uint8_t attributes)
 
 	return TeecResult;
 }
+
+uint32_t trusty_attest_dh(uint8_t *dh, uint32_t *dh_size)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID tempuuid = { 0x258be795, 0xf9ca, 0x40e6,
+				{ 0xa8, 0x69, 0x9c, 0xe6,
+				  0x88, 0x6c, 0x5d, 0x5d
+				}
+			     };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				      &TeecSession,
+				      TeecUuid,
+				      TEEC_LOGIN_PUBLIC,
+				      NULL,
+				      NULL,
+				      &ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = *dh_size;
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INOUT,
+						    TEEC_NONE,
+						    TEEC_NONE,
+						    TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					143,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	*dh_size = TeecOperation.params[0].tmpref.size;
+	memcpy(dh, SharedMem0.buffer, SharedMem0.size);
+
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+
+	TEEC_CloseSession(&TeecSession);
+	TeecResult = TEEC_FinalizeContext(&TeecContext);
+
+	return TeecResult;
+}
+
+uint32_t trusty_attest_uuid(uint8_t *uuid, uint32_t *uuid_size)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID tempuuid = { 0x258be795, 0xf9ca, 0x40e6,
+				{ 0xa8, 0x69, 0x9c, 0xe6,
+				  0x88, 0x6c, 0x5d, 0x5d
+				}
+			     };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				      &TeecSession,
+				      TeecUuid,
+				      TEEC_LOGIN_PUBLIC,
+				      NULL,
+				      NULL,
+				      &ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = *uuid_size;
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INOUT,
+						    TEEC_NONE,
+						    TEEC_NONE,
+						    TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					144,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	*uuid_size = TeecOperation.params[0].tmpref.size;
+	memcpy(uuid, SharedMem0.buffer, SharedMem0.size);
+
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+
+	TEEC_CloseSession(&TeecSession);
+	TeecResult = TEEC_FinalizeContext(&TeecContext);
+
+	return TeecResult;
+}
+
+uint32_t trusty_attest_get_ca(uint8_t *operation_start,
+			      uint32_t *operation_size,
+			      uint8_t *out,
+			      uint32_t *out_len)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+
+	OpteeClientApiLibInitialize();
+
+	TEEC_UUID tempuuid = { 0x258be795, 0xf9ca, 0x40e6,
+				{ 0xa8, 0x69, 0x9c, 0xe6,
+				  0x88, 0x6c, 0x5d, 0x5d
+				}
+			     };
+
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				      &TeecSession,
+				      TeecUuid,
+				      TEEC_LOGIN_PUBLIC,
+				      NULL,
+				      NULL,
+				      &ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = *operation_size;
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	memcpy(SharedMem0.buffer, operation_start, SharedMem0.size);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = *out_len;
+	SharedMem1.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INOUT,
+						    TEEC_MEMREF_TEMP_INOUT,
+						    TEEC_NONE,
+						    TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					145,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	*out_len = TeecOperation.params[1].tmpref.size;
+	memcpy(out, SharedMem1.buffer, SharedMem1.size);
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+
+	return TeecResult;
+}
+
+uint32_t trusty_attest_set_ca(uint8_t *ca_response, uint32_t *ca_response_size)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID tempuuid = { 0x258be795, 0xf9ca, 0x40e6,
+				{ 0xa8, 0x69, 0x9c, 0xe6,
+				  0x88, 0x6c, 0x5d, 0x5d
+				}
+			     };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				      &TeecSession,
+				      TeecUuid,
+				      TEEC_LOGIN_PUBLIC,
+				      NULL,
+				      NULL,
+				      &ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = *ca_response_size;
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	memcpy(SharedMem0.buffer, ca_response, SharedMem0.size);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INOUT,
+						    TEEC_NONE,
+						    TEEC_NONE,
+						    TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					146,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+
+	TEEC_CloseSession(&TeecSession);
+	TeecResult = TEEC_FinalizeContext(&TeecContext);
+
+	return TeecResult;
+}

commit 90e877b59cfff7acecfdea99df7acda8be1d6a39
Author: Weiwen Chen <cww@rock-chips.com>
Date:   Fri Nov 10 14:06:09 2017 +0800

    android: load fdt from the oem partition
    
    The fdt must be named of "kernel.dtb", and it's saved
    in the root dir of the oem partition.
    
    Change-Id: I70dc9cbbc295f23b08bf122df3b29bba7dacb82f
    Signed-off-by: Weiwen Chen <cww@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 7060b2e690..efda47d18a 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -14,11 +14,13 @@
 #include <fs.h>
 
 #define ANDROID_PARTITION_BOOT "boot"
+#define ANDROID_PARTITION_OEM  "oem"
 #define ANDROID_PARTITION_SYSTEM "system"
 
 #define ANDROID_ARG_SLOT_SUFFIX "androidboot.slot_suffix="
 #define ANDROID_ARG_ROOT "root="
 #define ANDROID_ARG_SERIALNO "androidboot.serialno="
+#define ANDROID_ARG_FDT_FILENAME "kernel.dtb"
 
 static int android_bootloader_message_load(
 	struct blk_desc *dev_desc,
@@ -227,6 +229,12 @@ int android_bootloader_boot_kernel(unsigned long kernel_address)
 	char *bootm_args[] = {
 		"bootm", kernel_addr_str, kernel_addr_str, fdt_addr, NULL };
 
+	if (!android_bootloader_get_fdt(ANDROID_PARTITION_OEM,
+					ANDROID_ARG_FDT_FILENAME)) {
+		fdt_addr = env_get("fdt_addr_r");
+		bootm_args[3] = fdt_addr;
+	}
+
 	sprintf(kernel_addr_str, "0x%lx", kernel_address);
 
 	printf("Booting kernel at %s with fdt at %s...\n\n\n",

commit 8ce4d2843d8b611cf7fec1d74f7648a03f16f714
Author: Weiwen Chen <cww@rock-chips.com>
Date:   Fri Nov 10 11:32:45 2017 +0800

    android: add api for loading fdt
    
    If user get the kernel fdt into the independent partition
    which is the ext4 filesystem, we can use this api to load
    fdt.
    
    Change-Id: I4fa494beffecb41e8c0e4c02f1e782d0291e2d05
    Signed-off-by: Weiwen Chen <cww@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 733c0580d3..7060b2e690 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -6,10 +6,12 @@
 
 #include <android_bootloader.h>
 #include <android_bootloader_message.h>
+#include <android_avb/avb_ops_user.h>
 
 #include <cli.h>
 #include <common.h>
 #include <malloc.h>
+#include <fs.h>
 
 #define ANDROID_PARTITION_BOOT "boot"
 #define ANDROID_PARTITION_SYSTEM "system"
@@ -158,6 +160,66 @@ static int android_bootloader_boot_bootloader(void)
 	return -1;
 }
 
+static int android_bootloader_get_fdt(const char *part_name,
+		const char *load_file_name)
+{
+	const char *dev_iface = "mmc";
+	struct blk_desc *dev_desc;
+	disk_partition_t boot_part_info;
+	char *fdt_addr = NULL;
+	char slot_suffix[5] = {0};
+	char dev_part[3] = {0};
+	loff_t bytes = 0;
+	loff_t pos = 0;
+	loff_t len_read;
+	unsigned long addr = 0;
+	int part_num = -1;
+	int dev_num = 0;
+	int ret;
+
+	dev_desc = blk_get_dev(dev_iface, dev_num);
+	if (!dev_desc) {
+		printf("Could not find %s %d\n", dev_iface, dev_num);
+		return -1;
+	}
+
+	memset(&boot_part_info, 0, sizeof(boot_part_info));
+
+#ifdef CONFIG_AVB_LIBAVB_USER
+	if (avb_get_current_slot(slot_suffix)) {
+		printf("ANDROID: Get Current Slot error.\n");
+		return -1;
+	}
+
+	part_num = android_part_get_info_by_name_suffix(dev_desc,
+					     part_name,
+					     slot_suffix, &boot_part_info);
+#else
+	part_num = part_get_info_by_name(dev_desc, part_name, &boot_part_info);
+	if (part_num < 0) {
+		printf("ANDROID: Could not find partition \"%s\"\n", part_name);
+		return -1;
+	}
+#endif
+
+	snprintf(dev_part, ARRAY_SIZE(dev_part), ":%x", part_num);
+	if (fs_set_blk_dev(dev_iface, dev_part, FS_TYPE_EXT))
+		return -1;
+
+	fdt_addr = env_get("fdt_addr_r");
+	if (!fdt_addr) {
+		printf("ANDROID: No Found FDT Load Address.\n");
+		return -1;
+	}
+	addr = simple_strtoul(fdt_addr, NULL, 16);
+
+	ret = fs_read(load_file_name, addr, pos, bytes, &len_read);
+	if (ret < 0)
+		return -1;
+
+	return 0;
+}
+
 int android_bootloader_boot_kernel(unsigned long kernel_address)
 {
 	char kernel_addr_str[12];

commit bf17c6275dad7d8f168a2a1517f6ac53fbe399c5
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Nov 17 11:09:55 2017 +0800

    androidboot: boot the system without a/b avb
    
    Support boot the system in the old mode, and there
    is no need to differentiate the _a or _b slot
    in the gpt table.
    
    Change-Id: I162e34a9bd0120db051f709faec06daf3bc0aa9c
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/cmd/boot_android.c b/cmd/boot_android.c
index 0861317d8c..9c3294e21f 100644
--- a/cmd/boot_android.c
+++ b/cmd/boot_android.c
@@ -751,6 +751,20 @@ int do_avb_flow(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 		strcat(root_data, command_line);
 		env_set("bootargs", root_data);
 		android_avb_boot_flow(boot_slot_select, load_address);
+	} else if (verify_flag == 'o') {
+		load_address = CONFIG_SYS_LOAD_ADDR;
+		strcat(slot_partition[1], requested_partitions[1]);
+		ops->get_unique_guid_for_partition(ops,
+						   slot_partition[1],
+						   guid_buf,
+						   guid_buf_size);
+		strcat(root_data, guid_buf);
+		command_line = android_assemble_cmdline(boot_slot_select,
+							mode_cmdline);
+		strcat(root_data, " ");
+		strcat(root_data, command_line);
+		env_set("bootargs", root_data);
+		android_boot_flow(load_address);
 	} else {
 		return CMD_RET_USAGE;
 	}

commit b3b934b63660f484b9aa2e398fdb8c4151402420
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Nov 17 10:55:00 2017 +0800

    android: boot the system without a/b and avb
    
    Change-Id: I9a6da661c9cf17e2e3190b55f18acd600f9b63f1
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 33388c585d..733c0580d3 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -388,3 +388,27 @@ int android_avb_boot_flow(char *slot_suffix, unsigned long kernel_address)
 	/* TODO: If the kernel doesn't boot mark the selected slot as bad. */
 	return -1;
 }
+
+int android_boot_flow(unsigned long kernel_address)
+{
+	const char *dev_iface = "mmc";
+	int dev_num = 0;
+	struct blk_desc *dev_desc;
+	disk_partition_t boot_part_info;
+	int ret;
+	dev_desc = blk_get_dev(dev_iface, dev_num);
+	if (!dev_desc) {
+		printf("Could not find %s %d\n", dev_iface, dev_num);
+		return -1;
+	}
+	/* Load the kernel from the desired "boot" partition. */
+	part_get_info_by_name(dev_desc, ANDROID_PARTITION_BOOT, &boot_part_info);
+	ret = android_image_load(dev_desc, &boot_part_info, kernel_address,
+				 -1UL);
+	if (ret < 0)
+		return ret;
+	android_bootloader_boot_kernel(kernel_address);
+
+	/* TODO: If the kernel doesn't boot mark the selected slot as bad. */
+	return -1;
+}
diff --git a/include/android_bootloader.h b/include/android_bootloader.h
index ef072a9374..97e36ed49a 100644
--- a/include/android_bootloader.h
+++ b/include/android_bootloader.h
@@ -73,4 +73,12 @@ char *android_assemble_cmdline(const char *slot_suffix,
  */
 int android_bootloader_boot_kernel(unsigned long kernel_address);
 
+/** android_bootloader_boot_kernel- Load and execute the kernel boot.
+ *
+ * @kernel_address:	address where to load the kernel if needed.
+ *
+ * @return a negative number in case of error, otherwise it doesn't return.
+ */
+int android_boot_flow(unsigned long kernel_address);
+
 #endif  /* __ANDROID_BOOTLOADER_H */

commit 9aed1a133698e1fd4bd90672d5b8ad0e0cdae58d
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Nov 14 22:33:59 2017 +0800

    androidboot: add some new info to cmdline
    
    The android things system need some avb info
    in the stage of u-boot, like VBH value and so
    on.
    
    Change-Id: Ia102931f3b0c912c7e1f34f668d8af0b45fa4a6e
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/cmd/boot_android.c b/cmd/boot_android.c
index 96fa50f08a..0861317d8c 100644
--- a/cmd/boot_android.c
+++ b/cmd/boot_android.c
@@ -647,6 +647,7 @@ int do_avb_flow(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	bool unlocked = true;
 	const char *mode_cmdline = NULL;
 	char root_data[70] = "root=PARTUUID=";
+	char avb_root_data[2000] = {0};
 	size_t guid_buf_size = 37;
 	char guid_buf[37];
 	char verify_flag;
@@ -718,18 +719,13 @@ int do_avb_flow(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 			return CMD_RET_FAILURE;
 		}
 
-		strcat(slot_partition[1], requested_partitions[1]);
-		strcat(slot_partition[1], slot_data->ab_suffix);
-		ops->get_unique_guid_for_partition(ops,
-						   slot_partition[1],
-						   guid_buf,
-						   guid_buf_size);
-		strcat(root_data, guid_buf);
 		command_line = android_assemble_cmdline(slot_data->ab_suffix,
 							mode_cmdline);
-		strcat(root_data, " ");
-		strcat(root_data, command_line);
-		env_set("bootargs", root_data);
+		strcat(avb_root_data, " ");
+		strcat(avb_root_data, command_line);
+		strcat(avb_root_data, " ");
+		strcat(avb_root_data, slot_data->cmdline);
+		env_set("bootargs", avb_root_data);
 		load_address = CONFIG_SYS_LOAD_ADDR;
 		if (avb_close_optee_client())
 			printf("Can not close optee client!\n");

commit 54fcf04fb5d81b5ec0cd78b0d3faef0106e005b4
Author: Cody Xie <cody.xie@rock-chips.com>
Date:   Fri Nov 17 13:22:55 2017 +0800

    gva_rk3229: Update README document.
    
    Change-Id: I423d625f4f92e4762a32162772f3858f8069723a
    Signed-off-by: Cody Xie <cody.xie@rock-chips.com>

diff --git a/board/rockchip/gva_rk3229/README b/board/rockchip/gva_rk3229/README
index 579ec4d812..434cc04010 100644
--- a/board/rockchip/gva_rk3229/README
+++ b/board/rockchip/gva_rk3229/README
@@ -9,6 +9,8 @@ Get the Source and prebuild binary
   > git clone https://github.com/rockchip-linux/rkdeveloptool.git
 
 Compile the OP-TEE
+(For Android Things Project, use the image bellow.
+<android root>/vendor/bsp/rockchip/security/optee/os/trust_with_ta.img)
 ===============
 
   > cd optee_os
@@ -18,6 +20,7 @@ Compile the OP-TEE
   > cp out/arm-plat-rockchip/core/tee-pager.bin ../u-boot/tee.bin
 
 Compile the U-Boot
+(For Android Things Project, use Android build system.)
 ==================
 
   > cd ../u-boot
@@ -31,11 +34,11 @@ Compile the U-Boot
 Compile the rkdeveloptool
 =======================
   Follow instructions in latest README
-  > cd ../rkflashtool
+  > cd ../rkdeveloptool
+  > sudo apt-get install libudev-dev libusb-1.0-0-dev dh-autoreconf
   > autoreconf -i
   > ./configure
   > make
-  > sudo make install
 
   Get rkdeveloptool in you Host in this step.
 
@@ -43,19 +46,23 @@ Both origin binaries and Tool are ready now, choose either option 1 or
 option 2 to deploy U-Boot.
 
 Package the image
+(For Android Things Project, use Android build system.)
 =================
 
   > cd ../u-boot
-  > rkbin/tools/loaderimage --pack --uboot u-boot-dtb.bin uboot.img
+  > rkbin/tools/loaderimage --pack --uboot u-boot-dtb.bin uboot.img 0x61000000
 
   Get uboot.img in this step.
 
 Flash the image to eMMC
+(For Android Things Project that supports AB update,
+please follow google's documents.)
 =======================
 Power on(or reset with RESET KEY) with MASKROM KEY preesed, and then:
   > cd ..
   > rkdeveloptool db rkbin/rk32/rk322x_loader_v1.04.232.bin
   > rkdeveloptool wl 0x4000 uboot.img
+  > rkdeveloptool wl 0x6000 trust.img
   > rkdeveloptool rd
 
 You should be able to get U-Boot log message with OP-TEE boot info.

commit 00412ace7105ebcf421f78984110375d07f80fec
Author: Francis Fan <francis.fan@rock-chips.com>
Date:   Tue Nov 7 18:46:55 2017 +0800

    gva_rk3229: add serialno init
    
    Change-Id: I6fc41b5480adfbd8456032e844d4f22f30c413a5
    Signed-off-by: Francis Fan <francis.fan@rock-chips.com>
    Signed-off-by: Cody Xie <cody.xie@rock-chips.com>

diff --git a/board/rockchip/gva_rk3229/gva_rk3229.c b/board/rockchip/gva_rk3229/gva_rk3229.c
index cacd2479c4..ece9ed57a9 100644
--- a/board/rockchip/gva_rk3229/gva_rk3229.c
+++ b/board/rockchip/gva_rk3229/gva_rk3229.c
@@ -6,14 +6,99 @@
 
 #include <common.h>
 #include <dm.h>
+#include <misc.h>
+#include <time.h>
 #include <asm/io.h>
+#include <asm/setup.h>
 #include <asm/arch/uart.h>
+#include <asm/arch/vendor.h>
+#include <configs/gva_rk3229.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
+/* define serialno max length, the max length is 512 Bytes
+ * The remaining bytes are used to ensure that the first 512 bytes
+ * are valid when executing 'env_set("serial#", value)'.
+ */
+#define VENDOR_SN_MAX	513
+/* These values are provided by the chip documentation */
+#define RK3229_CPUID_OFF  0x7
+#define RK3229_CPUID_LEN  0x10
+
+/*
+ * First obtain the serial number from vendor partition,
+ * if vendor partition is not initialized, then generate
+ * a default serial number according to CPU Id.
+ */
+int set_serialno(void)
+{
+	char serialno_str[VENDOR_SN_MAX];
+	struct udevice *dev;
+	u8 cpuid[RK3229_CPUID_LEN] = {0};
+	u8 low[RK3229_CPUID_LEN/2], high[RK3229_CPUID_LEN/2];
+	u64 serialno;
+	int ret, i;
+
+	/* Read serial number from vendor storage part */
+	memset(serialno_str, 0, VENDOR_SN_MAX);
+#ifdef CONFIG_VENDOR_STORAGE_API
+	ret = vendor_storage_read(VENDOR_SN_ID, serialno_str, (VENDOR_SN_MAX-1));
+	if (ret > 0) {
+		env_set("serial#", serialno_str);
+	} else {
+#endif
+#ifdef CONFIG_ROCKCHIP_EFUSE
+		/* retrieve the device */
+		ret = uclass_get_device_by_driver(UCLASS_MISC,
+						  DM_GET_DRIVER(rockchip_efuse), &dev);
+		if (ret) {
+			printf("%s: could not find efuse device\n", __func__);
+			return ret;
+		}
+		/* read the cpu_id range from the efuses */
+		ret = misc_read(dev, RK3229_CPUID_OFF, &cpuid, sizeof(cpuid));
+		if (ret) {
+			printf("%s: reading cpuid from the efuses failed\n", __func__);
+			return ret;
+		}
+#endif
+		/* Generate the serial number based on CPU ID */
+		for (i = 0; i < 8; i++) {
+			low[i] = cpuid[1 + (i << 1)];
+			high[i] = cpuid[i << 1];
+		}
+		serialno = crc32_no_comp(0, low, 8);
+		serialno |= (u64)crc32_no_comp(serialno, high, 8) << 32;
+		snprintf(serialno_str, sizeof(serialno_str), "%llx", serialno);
+
+		env_set("serial#", serialno_str);
+#ifdef CONFIG_VENDOR_STORAGE_API
+	}
+#endif
+	return 0;
+}
+
 #ifdef CONFIG_MISC_INIT_R
 int misc_init_r(void)
 {
+	set_serialno();
+
 	return 0;
 }
 #endif
+
+#ifdef CONFIG_SERIAL_TAG
+void get_board_serial(struct tag_serialnr *serialnr)
+{
+	char *serial_string;
+	u64 serial = 0;
+
+	serial_string = env_get("serial#");
+
+	if (serial_string)
+		serial = simple_strtoull(serial_string, NULL, 16);
+
+	serialnr->high = (u32)(serial >> 32);
+	serialnr->low = (u32)(serial & 0xffffffff);
+}
+#endif
diff --git a/include/configs/gva_rk3229.h b/include/configs/gva_rk3229.h
index ca958ebfe1..2847bdda16 100644
--- a/include/configs/gva_rk3229.h
+++ b/include/configs/gva_rk3229.h
@@ -9,6 +9,10 @@
 
 #include <configs/rk322x_common.h>
 
+/* Read CPUID and set "serial#" env. */
+#define CONFIG_MISC_INIT_R
+#define CONFIG_SERIAL_TAG
+#define CONFIG_ENV_OVERWRITE
 
 /* Store env in emmc */
 #undef CONFIG_ENV_SIZE

commit c9d8141cc65a6536931bb9d677aeebfebb38d3d2
Author: Cody Xie <cody.xie@rock-chips.com>
Date:   Fri Nov 17 10:49:01 2017 +0800

    gva_rk3229: Modify to bringup Android Things.
    
    Change-Id: Ie13341380f3526478ca35643e52ebbee741f9269
    Signed-off-by: Cody Xie <cody.xie@rock-chips.com>

diff --git a/arch/arm/dts/rk3229-gva.dts b/arch/arm/dts/rk3229-gva.dts
index 4c9b90e901..17a6708837 100644
--- a/arch/arm/dts/rk3229-gva.dts
+++ b/arch/arm/dts/rk3229-gva.dts
@@ -13,22 +13,15 @@
 	model = "RK3229 GVA/Android Things Board V1.0";
 	compatible = "rockchip,rk3229-gva", "rockchip,rk3229";
 
+	chosen {
+		stdout-path = &uart2;
+	};
+
 	memory@60000000 {
 		device_type = "memory";
 		reg = <0x60000000 0x40000000>;
 	};
 
-	reserved-memory {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		ranges;
-
-		trust_reserved: trust@0x68400000 {
-			 reg = <0x68400000 0xe00000>;
-			 no-map;
-		};
-	};
-
 	sdio_pwrseq: sdio-pwrseq {
 		compatible = "mmc-pwrseq-simple";
 		clocks = <&rk805 1>;
diff --git a/board/rockchip/gva_rk3229/MAINTAINERS b/board/rockchip/gva_rk3229/MAINTAINERS
index dfa1090c3e..2c3e2e0bd1 100644
--- a/board/rockchip/gva_rk3229/MAINTAINERS
+++ b/board/rockchip/gva_rk3229/MAINTAINERS
@@ -1,6 +1,6 @@
-EVB-RK3229
+GVA-RK3229
 M:      Kever Yang <kever.yang@rock-chips.com>
 S:      Maintained
-F:      board/rockchip/evb_rk3229
-F:      include/configs/evb_rk3229.h
-F:      configs/evb-rk3229_defconfig
+F:      board/rockchip/gva_rk3229
+F:      include/configs/gva_rk3229.h
+F:      configs/gva-rk3229_defconfig
diff --git a/board/rockchip/gva_rk3229/Makefile b/board/rockchip/gva_rk3229/Makefile
index 65dcd8be35..27cc3da993 100644
--- a/board/rockchip/gva_rk3229/Makefile
+++ b/board/rockchip/gva_rk3229/Makefile
@@ -1,7 +1,7 @@
 #
-# (C) Copyright 2015 Google, Inc
+# Copyright (C) 2017 Rockchip Electronic Co.,Ltd
 #
 # SPDX-License-Identifier:     GPL-2.0+
 #
 
-obj-y	+= evb_rk3229.o
+obj-y	+= gva_rk3229.o
diff --git a/board/rockchip/gva_rk3229/README b/board/rockchip/gva_rk3229/README
index 93328c75b2..579ec4d812 100644
--- a/board/rockchip/gva_rk3229/README
+++ b/board/rockchip/gva_rk3229/README
@@ -1,8 +1,8 @@
 Get the Source and prebuild binary
 ==================================
 
-  > mkdir ~/evb_rk3229
-  > cd ~/evb_rk3229
+  > mkdir ~/gva_rk3229
+  > cd ~/gva_rk3229
   > git clone git://git.denx.de/u-boot.git
   > git clone https://github.com/OP-TEE/optee_os.git
   > git clone https://github.com/rockchip-linux/rkbin.git
@@ -23,11 +23,10 @@ Compile the U-Boot
   > cd ../u-boot
   > export CROSS_COMPILE=arm-linux-gnueabihf-
   > export ARCH=arm
-  > make evb-rk3229_defconfig
-  > make
-  > make u-boot.itb
+  > make gva-rk3229_defconfig
+  > make u-boot-dtb.bin
 
-  Get tpl/u-boot-tpl.bin, spl/u-boot-spl.bin and u-boot.itb in this step.
+  Get u-boot-dtb.bin in this step.
 
 Compile the rkdeveloptool
 =======================
@@ -47,25 +46,18 @@ Package the image
 =================
 
   > cd ../u-boot
-  > tools/mkimage -n rk322x -T rksd -d tpl/u-boot-spl.bin idbloader.img
-  > cat spl/u-boot-spl.bin >> idbloader.img
+  > rkbin/tools/loaderimage --pack --uboot u-boot-dtb.bin uboot.img
 
-  Get idbloader.img in this step.
+  Get uboot.img in this step.
 
 Flash the image to eMMC
 =======================
 Power on(or reset with RESET KEY) with MASKROM KEY preesed, and then:
   > cd ..
   > rkdeveloptool db rkbin/rk32/rk322x_loader_v1.04.232.bin
-  > rkdeveloptool wl 64 u-boot/idbloader.img
-  > rkdeveloptool wl 0x4000 u-boot/u-boot.itb
+  > rkdeveloptool wl 0x4000 uboot.img
   > rkdeveloptool rd
 
-Flash the image to SD card
-==========================
-  > dd if=u-boot/idbloader.img of=/dev/sdb seek=64
-  > dd if=u-boot/u-boot.itb of=/dev/sdb seek=16384
-
 You should be able to get U-Boot log message with OP-TEE boot info.
 
 For more detail, please reference to:
diff --git a/configs/gva-rk3229_defconfig b/configs/gva-rk3229_defconfig
index fd5af2fd58..b036fa784e 100644
--- a/configs/gva-rk3229_defconfig
+++ b/configs/gva-rk3229_defconfig
@@ -12,14 +12,10 @@ CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_ROCKCHIP_BLOCK_API=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
-CONFIG_TARGET_EVB_RK3229=y
+CONFIG_TARGET_GVA_RK3229=y
 CONFIG_SPL_STACK_R_ADDR=0x60600000
 CONFIG_DEFAULT_DEVICE_TREE="rk3229-gva"
 CONFIG_DEBUG_UART=y
-CONFIG_FIT=y
-CONFIG_FIT_VERBOSE=y
-CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_SOURCE="board/rockchip/evb_rk3229/fit_spl_optee.its"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
@@ -78,6 +74,8 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Rockchip"
 CONFIG_G_DNL_VENDOR_NUM=0x18d1
 CONFIG_G_DNL_PRODUCT_NUM=0xd00d
+CONFIG_SHA1=y
+CONFIG_SHA256=y
 CONFIG_ERRNO_STR=y
 CONFIG_AVB_LIBAVB=y
 CONFIG_AVB_LIBAVB_AB=y
diff --git a/include/configs/gva_rk3229.h b/include/configs/gva_rk3229.h
index bbb734968c..ca958ebfe1 100644
--- a/include/configs/gva_rk3229.h
+++ b/include/configs/gva_rk3229.h
@@ -23,10 +23,10 @@
 #undef PARTS_DEFAULT
 #define PARTS_DEFAULT \
 	"uuid_disk=${uuid_gpt_disk};" \
-	"name=loader_a,start=4M,size=4M,uuid=${uuid_gpt_loader};" \
-	"name=loader_b,size=4M,uuid=${uuid_gpt_reserved};" \
-	"name=trust_a,size=4M,uuid=${uuid_gpt_reserved};" \
-	"name=trust_b,size=4M,uuid=${uuid_gpt_reserved};" \
+	"name=bootloader_a,start=4M,size=4M,uuid=${uuid_gpt_loader};" \
+	"name=bootloader_b,size=4M,uuid=${uuid_gpt_reserved};" \
+	"name=tos_a,size=4M,uuid=${uuid_gpt_reserved};" \
+	"name=tos_b,size=4M,uuid=${uuid_gpt_reserved};" \
 	"name=misc,size=4M,uuid=${uuid_gpt_misc};" \
 	"name=metadata,size=16M,uuid=${uuid_gpt_metadata};" \
 	"name=boot_a,size=32M,uuid=${uuid_gpt_boot_a};" \
@@ -35,6 +35,8 @@
 	"name=system_b,size=512M,uuid=${uuid_gpt_system_b};" \
 	"name=vendor_a,size=50M,uuid=${uuid_gpt_vendor_a};" \
 	"name=vendor_b,size=50M,uuid=${uuid_gpt_vendor_b};" \
+	"name=oem_a,size=32M,uuid=${uuid_gpt_oem_a};" \
+	"name=oem_b,size=32M,uuid=${uuid_gpt_oem_b};" \
 	"name=cache,size=100M,uuid=${uuid_gpt_cache};" \
 	"name=persist,size=4M,uuid=${uuid_gpt_persist};" \
 	"name=userdata,size=-,uuid=${uuid_gpt_userdata};\0" \
@@ -50,7 +52,7 @@
 #define CONFIG_SYS_BOOT_RAMDISK_HIGH
 #undef CONFIG_BOOTCOMMAND
 #define CONFIG_BOOTCOMMAND \
-	"boot_android mmc 0:7 a;" \
+	"bootavb flow v; " \
 
 /* Enable atags */
 #define CONFIG_SYS_BOOTPARAMS_LEN	(64*1024)

commit f795db4fdef86fea8f81660fbf3ff579999f5f6a
Author: Francis Fan <francis.fan@rock-chips.com>
Date:   Tue Nov 7 17:45:15 2017 +0800

    rockchip: rk3229: set CONFIG_ROCKCHIP_VENDOR_PARTITION to enable vendor api
    
    Change-Id: I51fb6f6c66bf4e2ebb24a833184f336be640cf57
    Signed-off-by: Francis Fan <francis.fan@rock-chips.com>
    Signed-off-by: Cody Xie <cody.xie@rock-chips.com>

diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index f63245b641..c124cd7b94 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -11,6 +11,7 @@ CONFIG_TPL_STACK=0x10088000
 CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_ROCKCHIP_BLOCK_API=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_TARGET_EVB_RK3229=y
 CONFIG_SPL_STACK_R_ADDR=0x60600000
 CONFIG_DEFAULT_DEVICE_TREE="rk3229-evb"

commit 991297a54a58dd03c193b4c31181814a71ad3b3c
Author: Francis Fan <francis.fan@rock-chips.com>
Date:   Tue Nov 7 17:37:29 2017 +0800

    rockchip: rk3229: set CONFIG_ROCKCHIP_BLOCK_API to enable block api
    
    Change-Id: I16d20e39df54441739ee59084f737b44a3d6caf0
    Signed-off-by: Francis Fan <francis.fan@rock-chips.com>
    Signed-off-by: Cody Xie <cody.xie@rock-chips.com>

diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index 91da20a0b6..f63245b641 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -10,6 +10,7 @@ CONFIG_TPL_MAX_SIZE=28672
 CONFIG_TPL_STACK=0x10088000
 CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_ROCKCHIP_BLOCK_API=y
 CONFIG_TARGET_EVB_RK3229=y
 CONFIG_SPL_STACK_R_ADDR=0x60600000
 CONFIG_DEFAULT_DEVICE_TREE="rk3229-evb"

commit ceecd5fea6de2781691f9680016d16f24249362f
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Oct 23 10:38:13 2017 +0800

    lib: avb: support the atx and public_key verify
    
    1.support the permanent attribute verify
    2.support the PRK, PIK, PSK certificate verify
    and then get the psk public_key, compare it with
    public_key in vbmeta.
    
    If the function is required, please open the macro
    AVB_VBMETA_PUBLIC_KEY_VALIDATE.
    
    Change-Id: Ifeab776c76f97fadd980671481ce27d203516673
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/android_avb/avb_atx_validate.h b/include/android_avb/avb_atx_validate.h
index f5804885b9..28d5be030d 100644
--- a/include/android_avb/avb_atx_validate.h
+++ b/include/android_avb/avb_atx_validate.h
@@ -43,6 +43,31 @@ extern "C" {
 #define AVB_ATX_PIK_VERSION_LOCATION 0x1000
 #define AVB_ATX_PSK_VERSION_LOCATION 0x1001
 
+/**
+ * read permanent attributes from rpmb
+ *
+ * @param atx_ops
+ *
+ * @param attributes The attributes inclue psk_public product id,
+ * 		     ref:AvbAtxPermanentAttributes.
+ *
+ * @return AvbIOResult
+ */
+AvbIOResult avb_read_perm_attr(AvbAtxOps* atx_ops,
+				      AvbAtxPermanentAttributes* attributes);
+
+/**
+ * read permanent attributes hash from efuse
+ *
+ * @param atx_ops
+ *
+ * @param attributes The attributes inclue psk_public product id,
+ * 		     ref:AvbAtxPermanentAttributes.
+ *
+ * @return AvbIOResult
+ */
+AvbIOResult avb_read_perm_attr_hash(AvbAtxOps* atx_ops,
+					   uint8_t hash[AVB_SHA256_DIGEST_SIZE]);
 /* An implementation of validate_vbmeta_public_key for Android Things. See
  * libavb/avb_ops.h for details on validate_vbmeta_public_key in general. This
  * implementation uses the metadata expected with Android Things vbmeta images
diff --git a/lib/avb/rk_libavb_atx/avb_atx_validate.c b/lib/avb/rk_libavb_atx/avb_atx_validate.c
index dbc6769313..4002038273 100644
--- a/lib/avb/rk_libavb_atx/avb_atx_validate.c
+++ b/lib/avb/rk_libavb_atx/avb_atx_validate.c
@@ -23,11 +23,40 @@
  */
 
 #include <android_avb/avb_atx_validate.h>
-
 #include <android_avb/avb_rsa.h>
 #include <android_avb/avb_sha.h>
 #include <android_avb/avb_sysdeps.h>
 #include <android_avb/avb_util.h>
+#include <optee_include/OpteeClientInterface.h>
+
+/* read permanent attributes from rpmb */
+AvbIOResult avb_read_perm_attr(AvbAtxOps* atx_ops,
+				      AvbAtxPermanentAttributes* attributes)
+{
+	if (attributes != NULL) {
+#ifdef CONFIG_OPTEE_CLIENT
+		trusty_read_permanent_attributes((uint8_t *)attributes,
+						 sizeof(struct AvbAtxPermanentAttributes));
+		return AVB_IO_RESULT_OK;
+#endif
+	}
+
+	return -1;
+}
+
+/*read permanent attributes hash from efuse */
+AvbIOResult avb_read_perm_attr_hash(AvbAtxOps* atx_ops,
+					   uint8_t hash[AVB_SHA256_DIGEST_SIZE])
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	if (trusty_read_attribute_hash((uint32_t *)hash, AVB_SHA256_DIGEST_SIZE / 4))
+		return -1;
+#else
+	avb_error("Please open the macro!\n");
+	return -1;
+#endif
+	return AVB_IO_RESULT_OK;
+}
 
 /* Computes the SHA256 |hash| of |length| bytes of |data|. */
 static void sha256(const uint8_t* data,
diff --git a/lib/avb/rk_libavb_user/avb_ops_user.c b/lib/avb/rk_libavb_user/avb_ops_user.c
index bf6c293684..887bb6b274 100644
--- a/lib/avb/rk_libavb_user/avb_ops_user.c
+++ b/lib/avb/rk_libavb_user/avb_ops_user.c
@@ -158,9 +158,20 @@ static AvbIOResult validate_vbmeta_public_key(
 	size_t public_key_metadata_length,
 	bool *out_is_trusted)
 {
+#ifdef AVB_VBMETA_PUBLIC_KEY_VALIDATE
+	if (out_is_trusted != NULL) {
+		avb_atx_validate_vbmeta_public_key(ops,
+						   public_key_data,
+						   public_key_length,
+						   public_key_metadata,
+						   public_key_metadata_length,
+						   out_is_trusted);
+	}
+#else
 	if (out_is_trusted != NULL) {
 		*out_is_trusted = true;
 	}
+#endif
 	return AVB_IO_RESULT_OK;
 }
 
@@ -293,6 +304,8 @@ AvbOps* avb_ops_user_new(void)
 	ops->ab_ops->read_ab_metadata = avb_ab_data_read;
 	ops->ab_ops->write_ab_metadata = avb_ab_data_write;
 	ops->ab_ops->init_ab_metadata = avb_ab_data_init;
+	ops->atx_ops->read_permanent_attributes = avb_read_perm_attr;
+	ops->atx_ops->read_permanent_attributes_hash = avb_read_perm_attr_hash;
 out:
 	return ops;
 }

commit 0916e43b542697b5028b6088dc33742933d88057
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Nov 3 18:25:07 2017 +0800

    fastboot: support fuse at-perm-attr writting efuse
    
    In the android things system, the command of fuse at-perm-attr
    is used to program the permanent attributes and its hash.The
    permanent attributes is written in eMMC RPMB, and its hash is
    writen in efuse.
    
    Change-Id: Ib0745100063d18b56e2dfcb638e0c9f7e2ef9b0a
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index a48b3e57f8..93e504d09f 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -985,12 +985,35 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 #endif
 	} else if (strncmp("fuse at-perm-attr", cmd + 4, 16) == 0) {
 #ifdef CONFIG_AVB_LIBAVB_USER
+		if (PERM_ATTR_TOTAL_SIZE != download_bytes) {
+			printf("Permanent attribute size is not equal!\n");
+			fastboot_tx_write_str("FAIL");
+			return;
+		}
+
 		if (avb_write_permanent_attributes((uint8_t *)
-						   CONFIG_FASTBOOT_BUF_ADDR,
-						   download_bytes))
+					       CONFIG_FASTBOOT_BUF_ADDR,
+					       download_bytes
+					       - PERM_ATTR_DIGEST_SIZE)) {
 			fastboot_tx_write_str("FAIL");
-		else
-			fastboot_tx_write_str("OKAY");
+			return;
+		}
+
+		if (avb_write_attribute_hash((uint8_t *)
+					     (CONFIG_FASTBOOT_BUF_ADDR
+					     + download_bytes
+					     - PERM_ATTR_DIGEST_SIZE),
+					     PERM_ATTR_DIGEST_SIZE)) {
+			fastboot_tx_write_str("FAIL");
+			return;
+		}
+
+		if (avb_write_perm_attr_flag(1)) {
+			fastboot_tx_write_str("FAIL");
+			return;
+		}
+
+		fastboot_tx_write_str("OKAY");
 #else
 		fastboot_tx_write_str("FAILnot implemented");
 #endif

commit fd717dcefea6deb8b59792cc2bf99c48549764c3
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Nov 8 16:04:05 2017 +0800

    lib: avb: support write efuse
    
    Write the permanent attributes hash to efuse.
    
    Change-Id: Id11586a66f055e7eb1a66997814f351509d49b21
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/android_avb/avb_ops_user.h b/include/android_avb/avb_ops_user.h
index 89ed4d5d24..ad57615aa6 100644
--- a/include/android_avb/avb_ops_user.h
+++ b/include/android_avb/avb_ops_user.h
@@ -224,4 +224,15 @@ int avb_write_vbootkey_hash(uint8_t *buf, uint8_t length);
  */
 int avb_close_optee_client(void);
 
+/**
+ * Write the permanent attributes hash.
+ *
+ * @param buf    The permanent attributes hash data.
+ *
+ * @param length The length of permanent attributes hash.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int avb_write_attribute_hash(uint8_t *buf, uint8_t length);
+
 #endif
diff --git a/lib/avb/rk_libavb_user/avb_ops_user.c b/lib/avb/rk_libavb_user/avb_ops_user.c
index d3e50c99bb..bf6c293684 100644
--- a/lib/avb/rk_libavb_user/avb_ops_user.c
+++ b/lib/avb/rk_libavb_user/avb_ops_user.c
@@ -466,3 +466,11 @@ int avb_close_optee_client(void)
 		return -1;
 	return 0;
 }
+
+int avb_write_attribute_hash(uint8_t *buf, uint8_t length)
+{
+	if (trusty_write_attribute_hash((uint32_t *)buf,
+	    (uint32_t)(length/sizeof(uint32_t))))
+		return -1;
+	return 0;
+}

commit 7b960a8a90538e615713a811177fe03585caee7c
Author: Weiwen Chen <cww@rock-chips.com>
Date:   Thu Nov 16 16:32:13 2017 +0800

    fastboot: mmc: add actual disk size to response
    
    If GPT buf is invalid, it will send actual disk size
    back. We can use this actual disk size to build correct
    GPT partition.
    
    Change-Id: Ia54112951b7b8daa6afe369bc16a037cdbe8db39
    Signed-off-by: Weiwen Chen <cww@rock-chips.com>

diff --git a/common/fb_mmc.c b/common/fb_mmc.c
index 6fddf5e86f..0c655ac9fa 100644
--- a/common/fb_mmc.c
+++ b/common/fb_mmc.c
@@ -293,6 +293,10 @@ void fb_mmc_flash_write(const char *cmd, void *download_buffer,
 {
 	struct blk_desc *dev_desc;
 	disk_partition_t info;
+#if CONFIG_IS_ENABLED(EFI_PARTITION)
+	u64 disksize = 0;
+	char reason[128] = {0};
+#endif
 
 	dev_desc = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV);
 	if (!dev_desc || dev_desc->type == DEV_TYPE_UNKNOWN) {
@@ -308,7 +312,14 @@ void fb_mmc_flash_write(const char *cmd, void *download_buffer,
 		if (is_valid_gpt_buf(dev_desc, download_buffer)) {
 			printf("%s: invalid GPT - refusing to write to flash\n",
 			       __func__);
-			fastboot_fail("invalid GPT partition", response);
+			disksize = dev_desc->blksz * cpu_to_le64(dev_desc->lba);
+			snprintf(reason, ARRAY_SIZE(reason),
+				 "%s - %s '%lld.%lld MiB')",
+					"invalid GPT partition",
+					"Actual Disk Size",
+					disksize/0x100000,
+					disksize%0x100000);
+			fastboot_fail(reason, response);
 			return;
 		}
 		if (write_mbr_and_gpt_partitions(dev_desc, download_buffer)) {

commit 271551c99a0abe2ab0b8f61a1f0efbe74d772507
Author: Weiwen Chen <cww@rock-chips.com>
Date:   Thu Nov 16 16:15:39 2017 +0800

    part: efi: add check gpt alternate_lba attribute
    
    Change-Id: I00b4dc9fe0c75ed57110682a3dc0b3fbaa3cbcc7
    Signed-off-by: Weiwen Chen <cww@rock-chips.com>

diff --git a/disk/part_efi.c b/disk/part_efi.c
index 2973d52f6a..b43b8b3d19 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -785,6 +785,14 @@ int is_valid_gpt_buf(struct blk_desc *dev_desc, void *buf)
 	/* determine start of GPT Header in the buffer */
 	gpt_h = buf + (GPT_PRIMARY_PARTITION_TABLE_LBA *
 		       dev_desc->blksz);
+
+	if ((le64_to_cpu(gpt_h->alternate_lba) + 1)
+			!= cpu_to_le64(dev_desc->lba)) {
+		printf("%s: failed checking '%s'\n", __func__,
+		       "invalid GPT Disk Size");
+		return -1;
+	}
+
 	if (validate_gpt_header(gpt_h, GPT_PRIMARY_PARTITION_TABLE_LBA,
 				dev_desc->lba))
 		return -1;

commit 5d3e2943595db6187114a583997ea4ac9f3c753f
Author: Francis Fan <francis.fan@rock-chips.com>
Date:   Tue Nov 7 17:49:31 2017 +0800

    rockchip: dts: rk322x: add efuse device node
    
    Change-Id: I7054a931a4cf742bd23e89477324b1eb1d953b8f
    Signed-off-by: Francis Fan <francis.fan@rock-chips.com>
    Signed-off-by: Cody Xie <cody.xie@rock-chips.com>

diff --git a/arch/arm/dts/rk322x.dtsi b/arch/arm/dts/rk322x.dtsi
index 22324f97b3..246013d604 100644
--- a/arch/arm/dts/rk322x.dtsi
+++ b/arch/arm/dts/rk322x.dtsi
@@ -213,6 +213,23 @@
 		status = "disabled";
 	};
 
+	efuse: efuse@11040000 {
+		compatible = "rockchip,rk322x-efuse";
+		reg = <0x11040000 0x20>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		clocks = <&cru PCLK_EFUSE_256>;
+		clock-names = "pclk_efuse";
+
+		/* Data cells */
+		efuse_id: id@7 {
+			reg = <0x7 0x10>;
+		};
+		cpu_leakage: cpu_leakage@17 {
+			reg = <0x17 0x1>;
+		};
+	};
+
 	i2c0: i2c@11050000 {
 		compatible = "rockchip,rk3228-i2c";
 		reg = <0x11050000 0x1000>;

commit 1df1c8728fb4a2076a9f7b2d5b9507d03984c368
Author: Cody Xie <cody.xie@rock-chips.com>
Date:   Thu Nov 16 14:46:06 2017 +0800

    gva-rk3229: Enable rockchip efuse driver.
    
    Change-Id: Icc10ec157c9c86ecb909d71766f0d16ae920b451
    Signed-off-by: Cody Xie <cody.xie@rock-chips.com>

diff --git a/board/rockchip/gva_rk3229/gva_rk3229.c b/board/rockchip/gva_rk3229/gva_rk3229.c
index a9a3a40ce8..cacd2479c4 100644
--- a/board/rockchip/gva_rk3229/gva_rk3229.c
+++ b/board/rockchip/gva_rk3229/gva_rk3229.c
@@ -10,3 +10,10 @@
 #include <asm/arch/uart.h>
 
 DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_MISC_INIT_R
+int misc_init_r(void)
+{
+	return 0;
+}
+#endif
diff --git a/configs/gva-rk3229_defconfig b/configs/gva-rk3229_defconfig
index ba71cc7dd1..fd5af2fd58 100644
--- a/configs/gva-rk3229_defconfig
+++ b/configs/gva-rk3229_defconfig
@@ -55,6 +55,8 @@ CONFIG_SPL_CLK=y
 CONFIG_TPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_ROCKCHIP_EFUSE=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y

commit b4fa32f0b6f1b0f30c7aa8c8df6133b3384f877f
Author: Francis Fan <francis.fan@rock-chips.com>
Date:   Tue Nov 7 17:50:11 2017 +0800

    rockchip: efuse: Support rk322x non-secure efuse.
    
    Change-Id: Ia25df975d21d7c97cf090f0d374074c2c5cd1a58
    Signed-off-by: Francis Fan <francis.fan@rock-chips.com>
    Signed-off-by: Cody Xie <cody.xie@rock-chips.com>

diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c
index 2e3bc9137a..1b060b7aa6 100644
--- a/drivers/misc/rockchip-efuse.c
+++ b/drivers/misc/rockchip-efuse.c
@@ -28,6 +28,17 @@
 #define RK3399_STROBE           BIT(1)
 #define RK3399_CSB              BIT(0)
 
+#define RK3288_A_SHIFT          6
+#define RK3288_A_MASK           0x3ff
+#define RK3288_NFUSES           32
+#define RK3288_BYTES_PER_FUSE   1
+#define RK3288_PGENB            BIT(3)
+#define RK3288_LOAD             BIT(2)
+#define RK3288_STROBE           BIT(1)
+#define RK3288_CSB              BIT(0)
+
+typedef int (*EFUSE_READ)(struct udevice *dev, int offset, void *buf, int size);
+
 struct rockchip_efuse_regs {
 	u32 ctrl;      /* 0x00  efuse control register */
 	u32 dout;      /* 0x04  efuse data out register */
@@ -54,7 +65,7 @@ static int dump_efuses(cmd_tbl_t *cmdtp, int flag,
 	 */
 
 	struct udevice *dev;
-	u8 fuses[128];
+	u8 fuses[128] = {0};
 	int ret;
 
 	/* retrieve the device */
@@ -78,7 +89,7 @@ static int dump_efuses(cmd_tbl_t *cmdtp, int flag,
 }
 
 U_BOOT_CMD(
-	rk3399_dump_efuses, 1, 1, dump_efuses,
+	rockchip_dump_efuses, 1, 1, dump_efuses,
 	"Dump the content of the efuses",
 	""
 );
@@ -128,10 +139,59 @@ static int rockchip_rk3399_efuse_read(struct udevice *dev, int offset,
 	return 0;
 }
 
+static int rockchip_rk3288_efuse_read(struct udevice *dev, int offset,
+				      void *buf, int size)
+{
+	struct rockchip_efuse_platdata *plat = dev_get_platdata(dev);
+	struct rockchip_efuse_regs *efuse =
+		(struct rockchip_efuse_regs *)plat->base;
+	u8 *buffer = buf;
+	int max_size = RK3288_NFUSES * RK3288_BYTES_PER_FUSE;
+
+	if (size > (max_size - offset))
+		size = max_size - offset;
+
+	/* Switch to read mode */
+	writel(RK3288_LOAD | RK3288_PGENB, &efuse->ctrl);
+	udelay(1);
+
+	while (size--) {
+		writel(readl(&efuse->ctrl) &
+				(~(RK3288_A_MASK << RK3288_A_SHIFT)),
+				&efuse->ctrl);
+		/* set addr */
+		writel(readl(&efuse->ctrl) |
+				((offset++ & RK3288_A_MASK) << RK3288_A_SHIFT),
+				&efuse->ctrl);
+		udelay(1);
+		/* strobe low to high */
+		writel(readl(&efuse->ctrl) |
+				RK3288_STROBE, &efuse->ctrl);
+		ndelay(60);
+		/* read data */
+		*buffer++ = readl(&efuse->dout);
+		/* reset strobe to low */
+		writel(readl(&efuse->ctrl) &
+				(~RK3288_STROBE), &efuse->ctrl);
+		udelay(1);
+	}
+
+	/* Switch to standby mode */
+	writel(RK3288_PGENB | RK3288_CSB, &efuse->ctrl);
+
+	return 0;
+}
+
 static int rockchip_efuse_read(struct udevice *dev, int offset,
 			       void *buf, int size)
 {
-	return rockchip_rk3399_efuse_read(dev, offset, buf, size);
+	EFUSE_READ efuse_read = NULL;
+
+	efuse_read = (EFUSE_READ)dev_get_driver_data(dev);
+	if (!efuse_read)
+		return -ENOSYS;
+
+	return (*efuse_read)(dev, offset, buf, size);
 }
 
 static const struct misc_ops rockchip_efuse_ops = {
@@ -147,7 +207,26 @@ static int rockchip_efuse_ofdata_to_platdata(struct udevice *dev)
 }
 
 static const struct udevice_id rockchip_efuse_ids[] = {
-	{ .compatible = "rockchip,rk3399-efuse" },
+	{
+		.compatible = "rockchip,rockchip-efuse",
+		.data = (void *)&rockchip_rk3288_efuse_read,
+	},
+	{
+		.compatible = "rockchip,rk3066a-efuse",
+		.data = (void *)&rockchip_rk3288_efuse_read,
+	},
+	{
+		.compatible = "rockchip,rk3188-efuse",
+		.data = (void *)&rockchip_rk3288_efuse_read,
+	},
+	{
+		.compatible = "rockchip,rk322x-efuse",
+		.data = (void *)&rockchip_rk3288_efuse_read,
+	},
+	{
+		.compatible = "rockchip,rk3399-efuse",
+		.data = (ulong)&rockchip_rk3399_efuse_read,
+	},
 	{}
 };
 

commit cd99aa821336764edd928f718f18202512f206f4
Author: Francis Fan <francis.fan@rock-chips.com>
Date:   Tue Nov 7 17:48:00 2017 +0800

    rockchip: rk322x: add PCLK_EFUSE_256 for dts file
    
    Change-Id: I46c4f0f80b54a72acdba107ea290a45c231c3dda
    Signed-off-by: Francis Fan <francis.fan@rock-chips.com>
    Signed-off-by: Cody Xie <cody.xie@rock-chips.com>

diff --git a/include/dt-bindings/clock/rk3228-cru.h b/include/dt-bindings/clock/rk3228-cru.h
index 13f9c864ca..1aa9e7c720 100644
--- a/include/dt-bindings/clock/rk3228-cru.h
+++ b/include/dt-bindings/clock/rk3228-cru.h
@@ -99,6 +99,8 @@
 
 #define CLK_NR_CLKS		(HCLK_PERI + 1)
 
+#define PCLK_EFUSE_256		327
+
 /* soft-reset indices */
 #define SRST_CORE0_PO		0
 #define SRST_CORE1_PO		1

commit 24b70d1ee058ab6858b7ac433bf2e697167dfb5e
Author: Cody Xie <cody.xie@rock-chips.com>
Date:   Thu Nov 16 14:37:46 2017 +0800

    gva-rk3229: Enable vendor storage related api.
    
    Change-Id: Iffb5761f2203592f9151c9c58d91e2678d9a781e
    Signed-off-by: Cody Xie <cody.xie@rock-chips.com>

diff --git a/configs/gva-rk3229_defconfig b/configs/gva-rk3229_defconfig
index ddcde563bf..ba71cc7dd1 100644
--- a/configs/gva-rk3229_defconfig
+++ b/configs/gva-rk3229_defconfig
@@ -10,6 +10,8 @@ CONFIG_TPL_MAX_SIZE=28672
 CONFIG_TPL_STACK=0x10088000
 CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_ROCKCHIP_BLOCK_API=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_TARGET_EVB_RK3229=y
 CONFIG_SPL_STACK_R_ADDR=0x60600000
 CONFIG_DEFAULT_DEVICE_TREE="rk3229-gva"

commit 263629555d5f42490c123e545ad25969a0a2b95a
Author: Cody Xie <cody.xie@rock-chips.com>
Date:   Wed Nov 15 15:53:57 2017 +0800

    rockchip: bootmode: Init mmc device for fastboot mode.
    
    This fixes issue that fastboot command failed with
    "MMC device -1 not found"
    
    Change-Id: Ifb136874aaf10dff3d3dc02043225407441085ca
    Signed-off-by: Cody Xie <cody.xie@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index ba3cf9fd27..d0dbff3bb8 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -69,6 +69,7 @@ int setup_boot_mode(void)
 {
 	void *reg;
 	int boot_mode;
+	char env_preboot[256] = {0};
 
 	rockchip_dnl_mode_check();
 
@@ -84,7 +85,15 @@ int setup_boot_mode(void)
 	switch (boot_mode) {
 	case BOOT_FASTBOOT:
 		printf("enter fastboot!\n");
-		env_set("preboot", "setenv preboot; fastboot usb 0");
+#if defined(CONFIG_FASTBOOT_FLASH_MMC_DEV)
+		snprintf(env_preboot, 256,
+				"setenv preboot; mmc dev %x; fastboot usb 0; ",
+				CONFIG_FASTBOOT_FLASH_MMC_DEV);
+#elif defined(CONFIG_FASTBOOT_FLASH_NAND_DEV)
+		snprintf(env_preboot, 256,
+				"setenv preboot; fastboot usb 0; ");
+#endif
+		env_set("preboot", env_preboot);
 		break;
 	case BOOT_UMS:
 		printf("enter UMS!\n");

commit e291f58fb4f581c35d6e3d2caebce877fc564945
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Nov 15 16:19:51 2017 +0800

    lib: avb: modify load boot partition size
    
    Load the boot image real size other than the
    boot partition size. If not, the uboot can not
    malloc a big buffer for the all boot partition.
    
    Change-Id: Ifc8d7cc1f214b94f6018c68cb03e8e9ce89781de
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/lib/avb/rk_libavb/avb_slot_verify.c b/lib/avb/rk_libavb/avb_slot_verify.c
index aab33d9657..342144f290 100644
--- a/lib/avb/rk_libavb/avb_slot_verify.c
+++ b/lib/avb/rk_libavb/avb_slot_verify.c
@@ -135,7 +135,7 @@ static AvbSlotVerifyResult load_and_verify_hash_partition(
 	 * since it's such a common workflow.
 	 */
 	image_size = hash_desc.image_size;
-	if (allow_verification_error) {
+	if (0) {
 		if (ops->get_size_of_partition == NULL) {
 			avb_errorv(part_name,
 			": The get_size_of_partition() operation is "

commit d7c30fe9d62d193d1b6222328950d53cb8d7c439
Author: Cody Xie <cody.xie@rock-chips.com>
Date:   Tue Nov 14 19:21:00 2017 +0800

    gva_rk3229: Add preboot commands.
    
    1. Select eMMC as default device.
    2. Enter fastboot mode if no partition table exists.
    
    Change-Id: I4416076353f6d9dc8365153c1edec1924754b072
    Signed-off-by: Cody Xie <cody.xie@rock-chips.com>

diff --git a/include/configs/gva_rk3229.h b/include/configs/gva_rk3229.h
index f42d40d277..bbb734968c 100644
--- a/include/configs/gva_rk3229.h
+++ b/include/configs/gva_rk3229.h
@@ -39,7 +39,13 @@
 	"name=persist,size=4M,uuid=${uuid_gpt_persist};" \
 	"name=userdata,size=-,uuid=${uuid_gpt_userdata};\0" \
 
-#define CONFIG_PREBOOT
+#undef CONFIG_PREBOOT
+#define CONFIG_PREBOOT \
+	"mmc dev 0; " \
+	"gpt guid mmc 0; " \
+	"if test $? = 1; then " \
+		"fastboot usb 0; " \
+	"fi; "
 
 #define CONFIG_SYS_BOOT_RAMDISK_HIGH
 #undef CONFIG_BOOTCOMMAND

commit d816b9732f5f3eab435aa72b25461f24b5bfb8ef
Author: Cody Xie <cody.xie@rock-chips.com>
Date:   Tue Nov 14 22:33:48 2017 +0800

    evb_rk3229: Add preboot commands.
    
    1. Select eMMC as default device.
    2. Enter fastboot mode if no partition table exists.
    
    Change-Id: Iebdf94c94605bd1165155bc7de027f364324cb19
    Signed-off-by: Cody Xie <cody.xie@rock-chips.com>

diff --git a/include/configs/evb_rk3229.h b/include/configs/evb_rk3229.h
index a74303385d..c73a100ebb 100644
--- a/include/configs/evb_rk3229.h
+++ b/include/configs/evb_rk3229.h
@@ -18,7 +18,13 @@
 
 #ifndef CONFIG_SPL_BUILD
 /* Enable gpt partition table */
-#define CONFIG_PREBOOT
+#undef CONFIG_PREBOOT
+#define CONFIG_PREBOOT \
+	"mmc dev 0; " \
+	"gpt guid mmc 0; " \
+	"if test $? = 1; then " \
+		"fastboot usb 0; " \
+	"fi; "
 
 #define CONFIG_SYS_BOOT_RAMDISK_HIGH
 

commit 0e3d235ecd97cbc9e139535ea44fcf5b13b83e81
Author: Cody Xie <cody.xie@rock-chips.com>
Date:   Fri Nov 10 13:19:26 2017 +0800

    androidboot: Pass "androidboot.serialno" to kernel cmdline.
    
    Change-Id: Ia0b693f2652ab35b2e29b1c23335f962b3943050
    Signed-off-by: Cody Xie <cody.xie@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 1f92f00d74..33388c585d 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -16,6 +16,7 @@
 
 #define ANDROID_ARG_SLOT_SUFFIX "androidboot.slot_suffix="
 #define ANDROID_ARG_ROOT "root="
+#define ANDROID_ARG_SERIALNO "androidboot.serialno="
 
 static int android_bootloader_message_load(
 	struct blk_desc *dev_desc,
@@ -214,8 +215,9 @@ char *android_assemble_cmdline(const char *slot_suffix,
 {
 	const char *cmdline_chunks[16];
 	const char **current_chunk = cmdline_chunks;
-	char *env_cmdline, *cmdline, *rootdev_input;
+	char *env_cmdline, *cmdline, *rootdev_input, *serialno;
 	char *allocated_suffix = NULL;
+	char *allocated_serialno = NULL;
 	char *allocated_rootdev = NULL;
 	unsigned long rootdev_len;
 
@@ -234,6 +236,17 @@ char *android_assemble_cmdline(const char *slot_suffix,
 		*(current_chunk++) = allocated_suffix;
 	}
 
+	serialno = env_get("serial#");
+	if (serialno) {
+		allocated_serialno = malloc(strlen(ANDROID_ARG_SERIALNO) +
+					  strlen(serialno) + 1);
+		memset(allocated_serialno, 0, strlen(ANDROID_ARG_SERIALNO) +
+				strlen(serialno) + 1);
+		strcpy(allocated_serialno, ANDROID_ARG_SERIALNO);
+		strcat(allocated_serialno, serialno);
+		*(current_chunk++) = allocated_serialno;
+	}
+
 	rootdev_input = env_get("android_rootdev");
 	if (rootdev_input) {
 		rootdev_len = strlen(ANDROID_ARG_ROOT) + CONFIG_SYS_CBSIZE + 1;

commit 374a999563f37fafc1d38863844ae294949f3f65
Author: Cody Xie <cody.xie@rock-chips.com>
Date:   Tue Nov 7 14:09:14 2017 +0800

    fastboot: usb: Add fastboot cmds to pass bootloadertest.
    
    TEST:
    python system/extra/tests/bootloader/bootloader.py --device-type iot
    
    TODO:
    "fastboot getvar all" is still NOT implemnted.
    Functions should be implemented with actual state.
    
    Change-Id: Ic757694622a5038a9766cedfde26c22935446347
    Signed-off-by: Cody Xie <cody.xie@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 8d32bdc973..a48b3e57f8 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -408,6 +408,20 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req)
 		strncat(response, FASTBOOT_VERSION, chars_left);
 	} else if (!strcmp_l1("bootloader-version", cmd)) {
 		strncat(response, U_BOOT_VERSION, chars_left);
+	} else if (!strcmp_l1("product", cmd)) {
+		strncat(response, CONFIG_SYS_BOARD, chars_left);
+	} else if (!strcmp_l1("variant", cmd)) {
+		strncat(response, "userdebug", chars_left);
+	} else if (!strcmp_l1("secure", cmd)) {
+		strncat(response, "no", chars_left);
+	} else if (!strcmp_l1("unlocked", cmd)) {
+		strncat(response, "yes", chars_left);
+	} else if (!strcmp_l1("off-mode-charge", cmd)) {
+		strncat(response, "0", chars_left);
+	} else if (!strcmp_l1("battery-voltage", cmd)) {
+		strncat(response, "7.4", chars_left);
+	} else if (!strcmp_l1("battery-soc-ok", cmd)) {
+		strncat(response, "yes", chars_left);
 	} else if (!strcmp_l1("downloadsize", cmd) ||
 		!strcmp_l1("max-download-size", cmd)) {
 		char str_num[12];
@@ -450,7 +464,7 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req)
 		char slot_surrent[8] = {0};
 
 		if (!avb_get_current_slot(slot_surrent))
-			strncat(response, slot_surrent, chars_left);
+			strncat(response, slot_surrent+1, chars_left);
 		else
 			strcpy(response, "FAILgeterror");
 #else
@@ -484,7 +498,9 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req)
 		cmd = strsep(&part_name, ":");
 		if (!strcmp(part_name, "boot") ||
 		    !strcmp(part_name, "system") ||
-		    !strcmp(part_name, "boot")) {
+		    !strcmp(part_name, "vendor") ||
+		    !strcmp(part_name, "vbmeta") ||
+		    !strcmp(part_name, "oem")) {
 			strncat(response, "yes", chars_left);
 		} else {
 			strcpy(response, "FAILno");
@@ -492,6 +508,60 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req)
 #else
 		fastboot_tx_write_str("FAILnot implemented");
 		return;
+#endif
+	} else if (!strncmp("slot-unbootable", cmd, 15)) {
+#ifdef CONFIG_AVB_LIBAVB_USER
+		char *slot_name = cmd;
+
+		cmd = strsep(&slot_name, ":");
+		if (!strcmp(slot_name, "a") ||
+		    !strcmp(slot_name, "b")) {
+			strncat(response, "no", chars_left);
+		} else {
+			strcpy(response, "FAILno");
+		}
+#else
+		fastboot_tx_write_str("FAILnot implemented");
+		return;
+#endif
+	} else if (!strncmp("slot-successful", cmd, 15)) {
+#ifdef CONFIG_AVB_LIBAVB_USER
+		char *slot_name = cmd;
+
+		cmd = strsep(&slot_name, ":");
+		if (!strcmp(slot_name, "a") ||
+		    !strcmp(slot_name, "b")) {
+			strncat(response, "no", chars_left);
+		} else {
+			strcpy(response, "FAILno");
+		}
+#else
+		fastboot_tx_write_str("FAILnot implemented");
+		return;
+#endif
+	} else if (!strncmp("slot-retry-count", cmd, 16)) {
+#ifdef CONFIG_AVB_LIBAVB_USER
+		char *slot_name = cmd;
+		char count[10] = {0};
+		static int cnt[2] = {0};
+
+		cmd = strsep(&slot_name, ":");
+		if (!strcmp(slot_name, "a")) {
+			sprintf(count, "%c", 0x30+cnt[0]);
+			strncat(response, count, chars_left);
+			if (cnt[0] > 0)
+				cnt[0]--;
+		} else if (!strcmp(slot_name, "b")) {
+			sprintf(count, "%c", 0x30+cnt[1]);
+			strncat(response, count, chars_left);
+			if (cnt[1] > 0)
+				cnt[1]--;
+		} else {
+			strcpy(response, "FAILno");
+		}
+#else
+		fastboot_tx_write_str("FAILnot implemented");
+		return;
 #endif
 	} else if (!strncmp("partition-type", cmd, 14) ||
 		   !strncmp("partition-size", cmd, 14)) {
@@ -775,7 +845,7 @@ static void cb_set_active(struct usb_ep *ep, struct usb_request *req)
 static void cb_flash(struct usb_ep *ep, struct usb_request *req)
 {
 	char *cmd = req->buf;
-	char response[FASTBOOT_RESPONSE_LEN];
+	char response[FASTBOOT_RESPONSE_LEN] = {0};
 #ifdef CONFIG_AVB_LIBAVB_USER
 	uint8_t flash_lock_state;
 

commit 8ddd5824c59745d58956299bb3125926155c599a
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Thu Nov 16 10:13:47 2017 +0800

    usb: gadget: add bos descriptor response for rockusb command
    
    Rockchip upgrade tool use bcdUSB (0x0201) field distinguishing maskrom
    or loader device at present. Unfortunately, it conflict with Windows 8
    and beyond which request BOS descriptor in this case that bcdUSB is set
    to 0x0201. This patch adds the HACK codes to fix it.
    
    Change-Id: I6a186139f79ba27f5d9e099493e9e742a29bbe40
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c
index d0ee7847b9..626117f075 100644
--- a/drivers/usb/gadget/composite.c
+++ b/drivers/usb/gadget/composite.c
@@ -271,6 +271,18 @@ static int count_configs(struct usb_composite_dev *cdev, unsigned type)
 	return count;
 }
 
+static int bos_desc(struct usb_composite_dev *cdev)
+{
+	struct usb_bos_descriptor	*bos = cdev->req->buf;
+
+	bos->bLength = USB_DT_BOS_SIZE;
+	bos->bDescriptorType = USB_DT_BOS;
+	bos->wTotalLength = cpu_to_le16(USB_DT_BOS_SIZE);
+	bos->bNumDeviceCaps = 0;
+
+	return le16_to_cpu(bos->wTotalLength);
+}
+
 static void device_qual(struct usb_composite_dev *cdev)
 {
 	struct usb_qualifier_descriptor	*qual = cdev->req->buf;
@@ -764,6 +776,18 @@ composite_setup(struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl)
 				value = min(w_length, (u16) value);
 			break;
 		case USB_DT_BOS:
+			/* HACK: only for rockusb command.
+			 * Rockchip upgrade tool use bcdUSB (0x0201) field
+			 * distinguishing maskrom or loader device at present.
+			 * Unfortunately, it conflict with Windows 8 and beyond
+			 * which request BOS descriptor in this case that bcdUSB
+			 * is set to 0x0201.
+			 */
+			if (!strncmp(cdev->driver->name, "rkusb_ums_dnl", 13)) {
+				value = bos_desc(cdev);
+				value = min(w_length, (u16) value);
+			}
+
 			/*
 			 * The USB compliance test (USB 2.0 Command Verifier)
 			 * issues this request. We should not run into the

commit ba437c8c987895da95fa841aaeea893b747ab0e5
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Mon Nov 13 17:46:11 2017 +0800

    usb: gadget: force rockchip vid and pid for rockusb
    
    This change amend USB VID & PID to Rockchip for rockusb.
    
    Change-Id: I3c94e442cc0190d2d3f13424470dd2d84af55eb0
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index b5d350a975..aa4b139945 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -48,9 +48,14 @@ struct rk_flash_info {
 
 int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
 {
-	/* Enumerate as a loader device */
-	if (IS_RKUSB_UMS_DNL(name))
+	if (IS_RKUSB_UMS_DNL(name)) {
+		/* Fix to Rockchip VID and PID */
+		dev->idVendor  = __constant_cpu_to_le16(0x2207);
+		dev->idProduct = __constant_cpu_to_le16(CONFIG_ROCKUSB_G_DNL_PID);
+
+		/* Enumerate as a loader device */
 		dev->bcdUSB = cpu_to_le16(0x0201);
+	}
 
 	return 0;
 }
diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index 3a2bf339b1..d883efcf9b 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -29,6 +29,7 @@
 
 #define CONFIG_ROCKCHIP_MAX_INIT_SIZE	(4 << 10)
 #define CONFIG_ROCKCHIP_CHIP_TAG	"RK30"
+#define CONFIG_ROCKUSB_G_DNL_PID	0x301A
 
 /* MMC/SD IP block */
 #define CONFIG_BOUNCE_BUFFER
diff --git a/include/configs/rk3066_common.h b/include/configs/rk3066_common.h
index 7e9664303d..5ed44e2073 100644
--- a/include/configs/rk3066_common.h
+++ b/include/configs/rk3066_common.h
@@ -36,6 +36,8 @@
 
 #define CONFIG_SYS_MAX_NAND_DEVICE	8
 
+#define CONFIG_ROCKUSB_G_DNL_PID	0x300A
+
 #ifdef CONFIG_TPL_BUILD
 #define CONFIG_SPL_TEXT_BASE		0x10080C04
 #define CONFIG_SPL_STACK		0x1008FFFF
diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h
index f311ebc2a9..3696b71960 100644
--- a/include/configs/rk3128_common.h
+++ b/include/configs/rk3128_common.h
@@ -30,6 +30,9 @@
 
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */
 
+#define CONFIG_ROCKUSB_G_DNL_PID	0x310C
+#define TEST_NUM_G
+
 /* MMC/SD IP block */
 #define CONFIG_BOUNCE_BUFFER
 
diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h
index b8f549cd9d..0fde4cc985 100644
--- a/include/configs/rk3188_common.h
+++ b/include/configs/rk3188_common.h
@@ -35,6 +35,7 @@
 
 #define CONFIG_ROCKCHIP_MAX_INIT_SIZE	(0x8000 - 0x800)
 #define CONFIG_ROCKCHIP_CHIP_TAG	"RK31"
+#define CONFIG_ROCKUSB_G_DNL_PID	0x310B
 
 #define CONFIG_SPL_TEXT_BASE		0x10080800
 /* spl size 32kb sram - 2kb bootrom */
diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h
index 62cb1b557f..d0e7fda38a 100644
--- a/include/configs/rk322x_common.h
+++ b/include/configs/rk322x_common.h
@@ -33,6 +33,7 @@
 
 #define CONFIG_ROCKCHIP_MAX_INIT_SIZE	(28 << 10)
 #define CONFIG_ROCKCHIP_CHIP_TAG	"RK32"
+#define CONFIG_ROCKUSB_G_DNL_PID	0x320B
 
 /* MMC/SD IP block */
 #define CONFIG_BOUNCE_BUFFER
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index b0e7c80529..2d1a41a040 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -36,6 +36,8 @@
 #define GICD_BASE			0xffc01000
 #define GICC_BASE			0xffc02000
 
+#define CONFIG_ROCKUSB_G_DNL_PID	0x320A
+
 /* MMC/SD IP block */
 #define CONFIG_BOUNCE_BUFFER
 
diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index c5aba94508..b7971782b5 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -30,6 +30,8 @@
 #define GICD_BASE			0xFF811000
 #define GICC_BASE			0xFF812000
 
+#define CONFIG_ROCKUSB_G_DNL_PID	0x320C
+
 /* MMC/SD IP block */
 #define CONFIG_BOUNCE_BUFFER
 
diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h
index 86d1a1c808..734dd63636 100644
--- a/include/configs/rk3368_common.h
+++ b/include/configs/rk3368_common.h
@@ -37,6 +37,8 @@
 #define GICD_BASE			0xffB71000
 #define GICC_BASE			0xffB72000
 
+#define CONFIG_ROCKUSB_G_DNL_PID	0x330A
+
 #define CONFIG_BOUNCE_BUFFER
 
 #ifndef CONFIG_SPL_BUILD
diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index 9873131be8..a9a7905723 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -38,6 +38,8 @@
 #define GICR_BASE			0xFEF00000
 #define GICC_BASE			0xFFF00000
 
+#define CONFIG_ROCKUSB_G_DNL_PID	0x330C
+
 /* MMC/SD IP block */
 #define CONFIG_BOUNCE_BUFFER
 #define CONFIG_ROCKCHIP_SDHCI_MAX_FREQ	200000000
diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h
index bfb11ffdff..93bda24782 100644
--- a/include/configs/rv1108_common.h
+++ b/include/configs/rv1108_common.h
@@ -27,6 +27,8 @@
 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_TEXT_BASE + 0x100000)
 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x2000000)
 
+#define CONFIG_ROCKUSB_G_DNL_PID	0x110A
+
 /* usb mass storage */
 #define CONFIG_USB_FUNCTION_MASS_STORAGE
 
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 9ce0c3f039..aeb490718e 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -1900,6 +1900,7 @@ CONFIG_ROCKCHIP_CHIP_TAG
 CONFIG_ROCKCHIP_MAX_INIT_SIZE
 CONFIG_ROCKCHIP_SDHCI_MAX_FREQ
 CONFIG_ROCKCHIP_USB2_PHY
+CONFIG_ROCKUSB_G_DNL_PID
 CONFIG_ROM_STUBS
 CONFIG_ROOTFS_OFFSET
 CONFIG_ROOTPATH

commit dd31eefe79c7c288965c32b3372353ab576c2850
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Tue Nov 14 10:39:28 2017 +0800

    cmd: rockusb: fix upgrade failed when gpt partitions exist
    
    We found rockusb upgraded failed when there had gpt partitions in
    system caused by total sectors checking, this change expose all mmc
    partitions for rockusb command.
    
    Change-Id: I8847c3c7885d17d47189c55765f97abb4965e8b4
    Reported-by: Joseph Chen <chenjh@rock-chips.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/cmd/rockusb.c b/cmd/rockusb.c
index 177f71ad21..1ffbb8fbae 100644
--- a/cmd/rockusb.c
+++ b/cmd/rockusb.c
@@ -96,14 +96,9 @@ static int rkusb_init(const char *devtype, const char *devnums_part_str)
 		g_rkusb->ums = ums_new;
 		cnt = g_rkusb->ums_cnt;
 
-		/* if partnum = 0, expose all partitions */
-		if (partnum == 0) {
-			g_rkusb->ums[cnt].start_sector = 0;
-			g_rkusb->ums[cnt].num_sectors = block_dev->lba;
-		} else {
-			g_rkusb->ums[cnt].start_sector = info.start;
-			g_rkusb->ums[cnt].num_sectors = info.size;
-		}
+		/* Expose all partitions for rockusb command */
+		g_rkusb->ums[cnt].start_sector = 0;
+		g_rkusb->ums[cnt].num_sectors = block_dev->lba;
 
 		g_rkusb->ums[cnt].read_sector = rkusb_read_sector;
 		g_rkusb->ums[cnt].write_sector = rkusb_write_sector;

commit b4a5485919805ced01a2052cdd9b0871cc28d500
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Nov 13 10:33:02 2017 +0800

    rockchip: rk3229: add gva som board support
    
    gva-rk3229 is a som based board design for Android Things project.
    
    Change-Id: I2e054407231a2549573d2302855c09b9795fdddd
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3229-gva.dts b/arch/arm/dts/rk3229-gva.dts
new file mode 100644
index 0000000000..4c9b90e901
--- /dev/null
+++ b/arch/arm/dts/rk3229-gva.dts
@@ -0,0 +1,289 @@
+/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+ X11
+ */
+
+/dts-v1/;
+
+#include "rk322x.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "RK3229 GVA/Android Things Board V1.0";
+	compatible = "rockchip,rk3229-gva", "rockchip,rk3229";
+
+	memory@60000000 {
+		device_type = "memory";
+		reg = <0x60000000 0x40000000>;
+	};
+
+	reserved-memory {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		trust_reserved: trust@0x68400000 {
+			 reg = <0x68400000 0xe00000>;
+			 no-map;
+		};
+	};
+
+	sdio_pwrseq: sdio-pwrseq {
+		compatible = "mmc-pwrseq-simple";
+		clocks = <&rk805 1>;
+		clock-names = "ext_clock";
+		pinctrl-names = "default";
+		pinctrl-0 = <&wifi_enable_h>;
+
+		/*
+		 * On the module itself this is one of these (depending
+		 * on the actual card populated):
+		 * - SDIO_RESET_L_WL_REG_ON
+		 * - PDN (power down when low)
+		 */
+		reset-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>; /* GPIO2_D2 */
+	};
+
+	vcc_host: vcc-host-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio3 20 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&host_vbus_drv>;
+		regulator-name = "vcc_host";
+		regulator-always-on;
+		regulator-boot-on;
+	};
+
+	wireless-bluetooth {
+		compatible = "bluetooth-platdata";
+		clocks = <&rk805 1>;
+		clock-names = "ext_clock";
+		uart_rts_gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
+		pinctrl-names = "default", "rts_gpio";
+		BT,reset_gpio    = <&gpio2 29 GPIO_ACTIVE_HIGH>;
+		BT,wake_gpio     = <&gpio3 27 GPIO_ACTIVE_HIGH>;
+		BT,wake_host_irq = <&gpio3 26 GPIO_ACTIVE_HIGH>;
+		status = "okay";
+	};
+
+	wireless-wlan {
+		compatible = "wlan-platdata";
+		rockchip,grf = <&grf>;
+		wifi_chip_type = "ap6255";
+		WIFI,host_wake_irq = <&gpio0 28 GPIO_ACTIVE_HIGH>;
+		status = "okay";
+	};
+
+	gpio_keys {
+		compatible = "gpio-keys";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		autorepeat;
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwr_key>;
+
+		power_key: power-key {
+			label = "GPIO Key Power";
+			gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
+			linux,code = <116>;
+			debounce-interval = <100>;
+			wakeup-source;
+		};
+	};
+};
+
+
+&i2c0 {
+	status = "okay";
+
+	rk805: rk805@18 {
+		compatible = "rockchip,rk805";
+		status = "okay";
+		reg = <0x18>;
+		interrupt-parent = <&gpio1>;
+		interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pmic_int_l>;
+		rockchip,system-power-controller;
+		wakeup-source;
+		gpio-controller;
+		#gpio-cells = <2>;
+		#clock-cells = <1>;
+		clock-output-names = "xin32k", "rk805-clkout2";
+
+		rtc {
+			status = "okay";
+		};
+
+		pwrkey {
+			status = "okay";
+		};
+
+		gpio {
+			status = "okay";
+		};
+
+		regulators {
+			compatible = "rk805-regulator";
+			status = "okay";
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			vdd_arm: RK805_DCDC1@0 {
+				regulator-compatible = "RK805_DCDC1";
+				regulator-name = "vdd_arm";
+				regulator-min-microvolt = <712500>;
+				regulator-max-microvolt = <1450000>;
+				regulator-initial-mode = <0x1>;
+				regulator-ramp-delay = <12500>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-state-mem {
+					regulator-mode = <0x2>;
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <950000>;
+				};
+			};
+
+			vdd_logic: RK805_DCDC2@1 {
+				regulator-compatible = "RK805_DCDC2";
+				regulator-name = "vdd_logic";
+				regulator-min-microvolt = <712500>;
+				regulator-max-microvolt = <1450000>;
+				regulator-initial-mode = <0x1>;
+				regulator-ramp-delay = <12500>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-state-mem {
+					regulator-mode = <0x2>;
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1000000>;
+				};
+			};
+
+			vcc_ddr: RK805_DCDC3@2 {
+				regulator-compatible = "RK805_DCDC3";
+				regulator-name = "vcc_ddr";
+				regulator-initial-mode = <0x1>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-state-mem {
+					regulator-mode = <0x2>;
+					regulator-on-in-suspend;
+				};
+			};
+
+			vcc_io: RK805_DCDC4@3 {
+				regulator-compatible = "RK805_DCDC4";
+				regulator-name = "vcc_io";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-initial-mode = <0x1>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-state-mem {
+					regulator-mode = <0x2>;
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3300000>;
+				};
+			};
+
+			vcc_18: RK805_LDO1@4 {
+				regulator-compatible = "RK805_LDO1";
+				regulator-name = "vcc_18";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vcc_18emmc: RK805_LDO2@5 {
+				regulator-compatible = "RK805_LDO2";
+				regulator-name = "vcc_18emmc";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vdd_10: RK805_LDO3@6 {
+				regulator-compatible = "RK805_LDO3";
+				regulator-name = "vdd_10";
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1000000>;
+				};
+			};
+		};
+	};
+};
+
+&cpu0 {
+	cpu-supply = <&vdd_arm>;
+};
+
+&pinctrl {
+	pmic {
+		pmic_int_l: pmic-int-l {
+			rockchip,pins = <1 12 RK_FUNC_GPIO &pcfg_pull_up>; /* gpio1_b4 */
+		};
+	};
+
+	sdio-pwrseq {
+		wifi_enable_h: wifi-enable-h {
+			rockchip,pins = <2 26 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	usb {
+		host_vbus_drv: host-vbus-drv {
+			rockchip,pins = <3 20 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	keys {
+		pwr_key: pwr-key {
+			rockchip,pins = <3 23 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+};
+
+&dmc {
+	rockchip,pctl-timing = <0x96 0xC8 0x1F3 0xF 0x8000004D 0x4 0x4E 0x6 0x3
+		0x0 0x6 0x5 0xC 0x10 0x6 0x4 0x4
+		0x5 0x4 0x200 0x3 0xA 0x40 0x0 0x1
+		0x5 0x5 0x3 0xC 0x1E 0x100 0x0 0x4
+		0x0 0x924>;
+	rockchip,phy-timing = <0x220 0x1 0x0 0x0 0x0 0x4 0x60>;
+	rockchip,sdram-params = <0x428B188 0x0 0x21 0x472 0x15
+		0 300 3 0 120>;
+};
+
+&emmc {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&uart2 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&usb20_otg {
+       status = "okay";
+};
diff --git a/arch/arm/mach-rockchip/rk322x/Kconfig b/arch/arm/mach-rockchip/rk322x/Kconfig
index dc8071e4f3..eebe63131d 100644
--- a/arch/arm/mach-rockchip/rk322x/Kconfig
+++ b/arch/arm/mach-rockchip/rk322x/Kconfig
@@ -4,6 +4,13 @@ config TARGET_EVB_RK3229
 	bool "EVB_RK3229"
 	select BOARD_LATE_INIT
 
+config TARGET_GVA_RK3229
+	bool "GVA RK3229 board"
+	select BOARD_LATE_INIT
+	help
+	  GVA RK3229 is a SOM and base-board combination based on RK3229. It
+	  target for Google Voice Assistant with Android Things project.
+
 config SYS_SOC
 	default "rockchip"
 
@@ -14,5 +21,6 @@ config SPL_SERIAL_SUPPORT
 	default y
 
 source "board/rockchip/evb_rk3229/Kconfig"
+source "board/rockchip/gva_rk3229/Kconfig"
 
 endif
diff --git a/board/rockchip/gva_rk3229/Kconfig b/board/rockchip/gva_rk3229/Kconfig
new file mode 100644
index 0000000000..61a5cad55e
--- /dev/null
+++ b/board/rockchip/gva_rk3229/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_GVA_RK3229
+
+config SYS_BOARD
+	default "gva_rk3229"
+
+config SYS_VENDOR
+	default "rockchip"
+
+config SYS_CONFIG_NAME
+	default "gva_rk3229"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+
+endif
diff --git a/board/rockchip/gva_rk3229/MAINTAINERS b/board/rockchip/gva_rk3229/MAINTAINERS
new file mode 100644
index 0000000000..dfa1090c3e
--- /dev/null
+++ b/board/rockchip/gva_rk3229/MAINTAINERS
@@ -0,0 +1,6 @@
+EVB-RK3229
+M:      Kever Yang <kever.yang@rock-chips.com>
+S:      Maintained
+F:      board/rockchip/evb_rk3229
+F:      include/configs/evb_rk3229.h
+F:      configs/evb-rk3229_defconfig
diff --git a/board/rockchip/gva_rk3229/Makefile b/board/rockchip/gva_rk3229/Makefile
new file mode 100644
index 0000000000..65dcd8be35
--- /dev/null
+++ b/board/rockchip/gva_rk3229/Makefile
@@ -0,0 +1,7 @@
+#
+# (C) Copyright 2015 Google, Inc
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y	+= evb_rk3229.o
diff --git a/board/rockchip/gva_rk3229/README b/board/rockchip/gva_rk3229/README
new file mode 100644
index 0000000000..93328c75b2
--- /dev/null
+++ b/board/rockchip/gva_rk3229/README
@@ -0,0 +1,72 @@
+Get the Source and prebuild binary
+==================================
+
+  > mkdir ~/evb_rk3229
+  > cd ~/evb_rk3229
+  > git clone git://git.denx.de/u-boot.git
+  > git clone https://github.com/OP-TEE/optee_os.git
+  > git clone https://github.com/rockchip-linux/rkbin.git
+  > git clone https://github.com/rockchip-linux/rkdeveloptool.git
+
+Compile the OP-TEE
+===============
+
+  > cd optee_os
+  > make clean
+  > make CROSS_COMPILE_ta_arm32=arm-none-eabi- PLATFORM=rockchip-rk322x
+  Get tee.bin in this step, copy it to U-Boot root dir:
+  > cp out/arm-plat-rockchip/core/tee-pager.bin ../u-boot/tee.bin
+
+Compile the U-Boot
+==================
+
+  > cd ../u-boot
+  > export CROSS_COMPILE=arm-linux-gnueabihf-
+  > export ARCH=arm
+  > make evb-rk3229_defconfig
+  > make
+  > make u-boot.itb
+
+  Get tpl/u-boot-tpl.bin, spl/u-boot-spl.bin and u-boot.itb in this step.
+
+Compile the rkdeveloptool
+=======================
+  Follow instructions in latest README
+  > cd ../rkflashtool
+  > autoreconf -i
+  > ./configure
+  > make
+  > sudo make install
+
+  Get rkdeveloptool in you Host in this step.
+
+Both origin binaries and Tool are ready now, choose either option 1 or
+option 2 to deploy U-Boot.
+
+Package the image
+=================
+
+  > cd ../u-boot
+  > tools/mkimage -n rk322x -T rksd -d tpl/u-boot-spl.bin idbloader.img
+  > cat spl/u-boot-spl.bin >> idbloader.img
+
+  Get idbloader.img in this step.
+
+Flash the image to eMMC
+=======================
+Power on(or reset with RESET KEY) with MASKROM KEY preesed, and then:
+  > cd ..
+  > rkdeveloptool db rkbin/rk32/rk322x_loader_v1.04.232.bin
+  > rkdeveloptool wl 64 u-boot/idbloader.img
+  > rkdeveloptool wl 0x4000 u-boot/u-boot.itb
+  > rkdeveloptool rd
+
+Flash the image to SD card
+==========================
+  > dd if=u-boot/idbloader.img of=/dev/sdb seek=64
+  > dd if=u-boot/u-boot.itb of=/dev/sdb seek=16384
+
+You should be able to get U-Boot log message with OP-TEE boot info.
+
+For more detail, please reference to:
+http://opensource.rock-chips.com/wiki_Boot_option
diff --git a/board/rockchip/gva_rk3229/gva_rk3229.c b/board/rockchip/gva_rk3229/gva_rk3229.c
new file mode 100644
index 0000000000..a9a3a40ce8
--- /dev/null
+++ b/board/rockchip/gva_rk3229/gva_rk3229.c
@@ -0,0 +1,12 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <asm/io.h>
+#include <asm/arch/uart.h>
+
+DECLARE_GLOBAL_DATA_PTR;
diff --git a/configs/gva-rk3229_defconfig b/configs/gva-rk3229_defconfig
new file mode 100644
index 0000000000..ddcde563bf
--- /dev/null
+++ b/configs/gva-rk3229_defconfig
@@ -0,0 +1,82 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x800
+CONFIG_ROCKCHIP_RK322X=y
+CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/rk322x/u-boot-tpl.lds"
+CONFIG_TPL_TEXT_BASE=0x10081004
+CONFIG_TPL_MAX_SIZE=28672
+CONFIG_TPL_STACK=0x10088000
+CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_TARGET_EVB_RK3229=y
+CONFIG_SPL_STACK_R_ADDR=0x60600000
+CONFIG_DEFAULT_DEVICE_TREE="rk3229-gva"
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_SOURCE="board/rockchip/evb_rk3229/fit_spl_optee.its"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
+CONFIG_SPL_OPTEE_SUPPORT=y
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_TPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_TPL_DM=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_TPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_TPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_TPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_ROCKCHIP_RK322X=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0x11030000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x18d1
+CONFIG_G_DNL_PRODUCT_NUM=0xd00d
+CONFIG_ERRNO_STR=y
+CONFIG_AVB_LIBAVB=y
+CONFIG_AVB_LIBAVB_AB=y
+CONFIG_AVB_LIBAVB_ATX=y
+CONFIG_AVB_LIBAVB_USER=y
+CONFIG_OPTEE_CLIENT=y
diff --git a/include/configs/gva_rk3229.h b/include/configs/gva_rk3229.h
new file mode 100644
index 0000000000..f42d40d277
--- /dev/null
+++ b/include/configs/gva_rk3229.h
@@ -0,0 +1,57 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __CONFIGS_GVA_RK3229_H
+#define __CONFIGS_GVA_RK3229_H
+
+#include <configs/rk322x_common.h>
+
+
+/* Store env in emmc */
+#undef CONFIG_ENV_SIZE
+#define CONFIG_ENV_SIZE                 (32 << 10)
+#define CONFIG_SYS_MMC_ENV_DEV          0
+#define CONFIG_SYS_MMC_ENV_PART         0
+#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
+#define CONFIG_SUPPORT_EMMC_RPMB
+
+#ifndef CONFIG_SPL_BUILD
+/* Enable gpt partition table */
+#undef PARTS_DEFAULT
+#define PARTS_DEFAULT \
+	"uuid_disk=${uuid_gpt_disk};" \
+	"name=loader_a,start=4M,size=4M,uuid=${uuid_gpt_loader};" \
+	"name=loader_b,size=4M,uuid=${uuid_gpt_reserved};" \
+	"name=trust_a,size=4M,uuid=${uuid_gpt_reserved};" \
+	"name=trust_b,size=4M,uuid=${uuid_gpt_reserved};" \
+	"name=misc,size=4M,uuid=${uuid_gpt_misc};" \
+	"name=metadata,size=16M,uuid=${uuid_gpt_metadata};" \
+	"name=boot_a,size=32M,uuid=${uuid_gpt_boot_a};" \
+	"name=boot_b,size=32M,uuid=${uuid_gpt_boot_b};" \
+	"name=system_a,size=512M,uuid=${uuid_gpt_system_a};" \
+	"name=system_b,size=512M,uuid=${uuid_gpt_system_b};" \
+	"name=vendor_a,size=50M,uuid=${uuid_gpt_vendor_a};" \
+	"name=vendor_b,size=50M,uuid=${uuid_gpt_vendor_b};" \
+	"name=cache,size=100M,uuid=${uuid_gpt_cache};" \
+	"name=persist,size=4M,uuid=${uuid_gpt_persist};" \
+	"name=userdata,size=-,uuid=${uuid_gpt_userdata};\0" \
+
+#define CONFIG_PREBOOT
+
+#define CONFIG_SYS_BOOT_RAMDISK_HIGH
+#undef CONFIG_BOOTCOMMAND
+#define CONFIG_BOOTCOMMAND \
+	"boot_android mmc 0:7 a;" \
+
+/* Enable atags */
+#define CONFIG_SYS_BOOTPARAMS_LEN	(64*1024)
+#define CONFIG_INITRD_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_CMDLINE_TAG
+
+#endif
+
+#endif

commit a2be733b20f6a3349ed1657dc10936fdb6808af9
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Nov 10 17:09:47 2017 +0800

    rockchip: evb-rk3399: update defconfig after rebase
    
    Change-Id: I81018850cc6612d2252558db53f864651c6f73d6
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index b39c38f399..4557c2b032 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -11,22 +11,24 @@ CONFIG_FIT=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_FIT_GENERATOR="board/rockchip/evb_rk3399/mk_fit_atf.sh"
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
 CONFIG_SPL_ATF_SUPPORT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x00800800
 CONFIG_FASTBOOT_BUF_SIZE=0x08000000
 CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=1
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_BMP=y
 CONFIG_CMD_TIME=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
@@ -60,7 +62,6 @@ CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
-CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF1A0000
 CONFIG_DEBUG_UART_CLOCK=24000000
@@ -88,8 +89,8 @@ CONFIG_USB_ETHER_RTL8152=y
 CONFIG_USB_ETHER_SMSC95XX=y
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
-CONFIG_DRM_ROCKCHIP=y
-CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
-CONFIG_LCD=y
+CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_VIDEO_ROCKCHIP_MAX_YRES=1200
+CONFIG_DISPLAY_ROCKCHIP_MIPI=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_ERRNO_STR=y

commit bcf2399d4d5b7e5de09abeca269da17e0e311ad3
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Nov 10 17:03:45 2017 +0800

    rockchip: evb-rk3229: update defconfig after rebase
    
    update defconfig after rebase from next-dev, mostly:
    - add boot_android, avb
    
    Change-Id: I44807f7ad51656fd350b5fe558ac47884c022934
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index e035e7c771..91da20a0b6 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -19,21 +19,19 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_FIT_SOURCE="board/rockchip/evb_rk3229/fit_spl_optee.its"
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 CONFIG_SPL_OPTEE_SUPPORT=y
-CONFIG_FASTBOOT=y
-CONFIG_USB_FUNCTION_FASTBOOT=y
-CONFIG_CMD_FASTBOOT=y
-CONFIG_ANDROID_BOOT_IMAGE=y
-CONFIG_FASTBOOT_BUF_ADDR=0x60800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
@@ -55,7 +53,6 @@ CONFIG_SPL_CLK=y
 CONFIG_TPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
-CONFIG_DM_RC=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
@@ -63,14 +60,12 @@ CONFIG_PINCTRL_ROCKCHIP_RK322X=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
-CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0x11030000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
-CONFIG_SPL_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_GADGET=y
@@ -80,3 +75,8 @@ CONFIG_G_DNL_MANUFACTURER="Rockchip"
 CONFIG_G_DNL_VENDOR_NUM=0x18d1
 CONFIG_G_DNL_PRODUCT_NUM=0xd00d
 CONFIG_ERRNO_STR=y
+CONFIG_AVB_LIBAVB=y
+CONFIG_AVB_LIBAVB_AB=y
+CONFIG_AVB_LIBAVB_ATX=y
+CONFIG_AVB_LIBAVB_USER=y
+CONFIG_OPTEE_CLIENT=y

commit 89e3937034cc4774be3ea626f36f6318b70f89bd
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Nov 10 16:59:33 2017 +0800

    rockchip: boot_mode: add rocovery mode
    
    Add recovery mode as one of reboot mode.
    
    Change-Id: I7288e8cc31eee213766dad45ed717aa16985abd5
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index 87ff3220a9..ba3cf9fd27 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -98,6 +98,10 @@ int setup_boot_mode(void)
 		printf("enter charging!\n");
 		env_set("preboot", "setenv preboot; charge");
 		break;
+	case BOOT_RECOVERY:
+		printf("enter Recovery mode!\n");
+		env_set("reboot_mode", "recovery");
+		break;
 	}
 
 	return 0;

commit 9f7ea89d5d531a16e3dec5041865c535a00a5f9d
Author: Wenping Zhang <wenping.zhang@rock-chips.com>
Date:   Wed Oct 18 15:43:32 2017 +0800

    androidboot: add BOOT_RECOVERY support
    
    if user input "reboot recovery" by adb or serial console,
    uboot will load recovery ramfs image to run.
    
    Change-Id: Ibad1709ed78938dbf1826446a0de5c822c6ce4e4
    Signed-off-by: Wenping Zhang <wenping.zhang@rock-chips.com>
    split boot_android and boot_mode int two commits.
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/cmd/boot_android.c b/cmd/boot_android.c
index fec7e729c0..96fa50f08a 100644
--- a/cmd/boot_android.c
+++ b/cmd/boot_android.c
@@ -674,7 +674,18 @@ int do_avb_flow(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 		printf("Enter boot-normal!\n");
 		mode_cmdline = "skip_initramfs";
 	} else {
-		mode_cmdline = "skip_initramfs";
+		/*
+		 * Firstly, confirm if there is a command in misc partition in
+		 * previous cases, and then we need to confirm whether user has
+		 * requested to enter recovery mode by entering "reboot recovery"
+		 * command through adb or serial console.
+		 */
+		char *env_rebootmode = env_get("reboot_mode");
+
+		if (env_rebootmode && !strcmp("recovery", env_rebootmode))
+			printf("Enter recovery mode by command 'reboot recovery'!\n");
+		else
+			mode_cmdline = "skip_initramfs";
 	}
 
 	avb_version = avb_version_string();

commit 3f55bd17ec79d4c1fff6548e4f9007cd9bb47bc1
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Nov 10 16:55:30 2017 +0800

    rockchip: bootmode: adapt fastboot cmd to google code
    
    Google change the fastboot cmd, update it.
    
    Change-Id: I50f03f8d4f2ba5679920553a055b24ecc0ba92b0
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index 4238dc9818..87ff3220a9 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -84,7 +84,7 @@ int setup_boot_mode(void)
 	switch (boot_mode) {
 	case BOOT_FASTBOOT:
 		printf("enter fastboot!\n");
-		env_set("preboot", "setenv preboot; fastboot usb0");
+		env_set("preboot", "setenv preboot; fastboot usb 0");
 		break;
 	case BOOT_UMS:
 		printf("enter UMS!\n");

commit 8fafb73c37984ebf461c50e0847123dc752e9c8d
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Sep 14 11:07:27 2017 +0800

    rockchip: rk322x: reserve memory for trsut TA
    
    U-boot must reserve memory for trsut TA if
    android system can call trust TA for security
    service.So u-boot can reserve memory using
    fixed parametar and obtaining parameter from
    trust TA.
    
    Change-Id: Idf869be3e041699914075ed5a2ce206e6dd262ff
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk322x-board.c b/arch/arm/mach-rockchip/rk322x-board.c
index 137479eb7d..ee89c121bf 100644
--- a/arch/arm/mach-rockchip/rk322x-board.c
+++ b/arch/arm/mach-rockchip/rk322x-board.c
@@ -16,6 +16,26 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#define TRUST_PARAMETER_OFFSET    (34 * 1024 * 1024)
+
+struct tos_parameter_t {
+	u32 version;
+	u32 checksum;
+	struct {
+		char name[8];
+		s64 phy_addr;
+		u32 size;
+		u32 flags;
+	}tee_mem;
+	struct {
+		char name[8];
+		s64 phy_addr;
+		u32 size;
+		u32 flags;
+	}drm_mem;
+	s64 reserve[8];
+};
+
 __weak int rk_board_late_init(void)
 {
 	return 0;
@@ -59,13 +79,26 @@ int board_init(void)
 
 int dram_init_banksize(void)
 {
-	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
-	gd->bd->bi_dram[0].size = 0x8400000;
-	/* Reserve 32M for OPTEE with TA */
-	gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE
+	struct tos_parameter_t *tos_parameter;
+	tos_parameter = (struct tos_parameter_t *)(CONFIG_SYS_SDRAM_BASE +
+			TRUST_PARAMETER_OFFSET);
+	if (tos_parameter->tee_mem.flags == 1) {
+		gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+		gd->bd->bi_dram[0].size = tos_parameter->tee_mem.phy_addr
+					- CONFIG_SYS_SDRAM_BASE;
+		gd->bd->bi_dram[1].start = tos_parameter->tee_mem.phy_addr +
+					tos_parameter->tee_mem.size;
+		gd->bd->bi_dram[1].size = gd->bd->bi_dram[0].start
+					+ gd->ram_size - gd->bd->bi_dram[1].start;
+	} else {
+		gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+		gd->bd->bi_dram[0].size = 0x8400000;
+		/* Reserve 32M for OPTEE with TA */
+		gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE
 				+ gd->bd->bi_dram[0].size + 0x2000000;
-	gd->bd->bi_dram[1].size = gd->bd->bi_dram[0].start
+		gd->bd->bi_dram[1].size = gd->bd->bi_dram[0].start
 				+ gd->ram_size - gd->bd->bi_dram[1].start;
+	}
 
 	return 0;
 }

commit ef52a073f0f0fbdc7152173f342b717a01437fa3
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Nov 3 17:27:27 2017 +0800

    fastboot: add missing brace in cb_flash()
    
    In the function cb_flash, we call avb_read_flash_lock_state
    in the conditional judgement, but we do not add brackets after
    the return.This cause the fastboot can not work well.
    
    Change-Id: Ib9bbd367d25bdc3e93e6db4444896caa114382a7
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index d46fde9212..8d32bdc973 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -779,9 +779,11 @@ static void cb_flash(struct usb_ep *ep, struct usb_request *req)
 #ifdef CONFIG_AVB_LIBAVB_USER
 	uint8_t flash_lock_state;
 
-	if (avb_read_flash_lock_state(&flash_lock_state))
+	if (avb_read_flash_lock_state(&flash_lock_state)) {
 		fastboot_tx_write_str("FAIL");
 		return;
+	}
+
 	if (flash_lock_state == 0) {
 		fastboot_tx_write_str("FAILThe device is locked, can not flash!");
 		printf("The device is locked, can not flash!\n");

commit 82ee22d4d330164fa24d6431ca69bf6133ec3143
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Oct 11 17:28:47 2017 +0800

    androidboot: support recovery and fastboot mode
    
    The system must support recovery and fastboot
    mode, so the u-boot must judge the boot command
    in the misc partition.
    
    Change-Id: I53c876eeefdc20ebe313a6a73d4cfac443fafa67
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/cmd/boot_android.c b/cmd/boot_android.c
index c986764b0f..fec7e729c0 100644
--- a/cmd/boot_android.c
+++ b/cmd/boot_android.c
@@ -13,6 +13,7 @@
 #include <common.h>
 #include <bootm.h>
 #include <command.h>
+#include <android_bootloader_message.h>
 
 static int do_boot_android(cmd_tbl_t *cmdtp, int flag, int argc,
 			   char * const argv[])
@@ -74,6 +75,60 @@ U_BOOT_CMD(
 );
 
 #ifdef CONFIG_AVB_LIBAVB_USER
+static int bootloader_message_read(struct android_bootloader_message *data)
+{
+	AvbOps *ops;
+	char requested_partitions[] = "misc";
+	size_t out_num_read;
+	char *buffer;
+
+	ops = avb_ops_user_new();
+	buffer = (char *)data;
+
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return CMD_RET_FAILURE;
+	}
+
+	if (ops->read_from_partition(ops, requested_partitions,
+				     0, 2048, buffer,
+				     &out_num_read) != 0) {
+		printf("do avb read error!\n");
+		avb_ops_user_free(ops);
+		return CMD_RET_FAILURE;
+	}
+
+	avb_ops_user_free(ops);
+
+	return CMD_RET_SUCCESS;
+}
+
+static int bootloader_message_write(struct android_bootloader_message *data)
+{
+	AvbOps *ops;
+	char requested_partitions[] = "misc";
+	char *buffer;
+
+	ops = avb_ops_user_new();
+	buffer = (char *)data;
+
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return CMD_RET_FAILURE;
+	}
+
+	if (ops->write_to_partition(ops, requested_partitions,
+				     0, 2048, buffer) != 0) {
+		printf("do avb write error!\n");
+		avb_ops_user_free(ops);
+		return CMD_RET_FAILURE;
+	}
+
+	avb_ops_user_free(ops);
+
+	return CMD_RET_SUCCESS;
+}
+
 int do_avb_init_ab_metadata(cmd_tbl_t *cmdtp, int flag,
 			    int argc, char * const argv[])
 {
@@ -592,14 +647,36 @@ int do_avb_flow(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	bool unlocked = true;
 	const char *mode_cmdline = NULL;
 	char root_data[70] = "root=PARTUUID=";
-	mode_cmdline = "skip_initramfs";
 	size_t guid_buf_size = 37;
 	char guid_buf[37];
 	char verify_flag;
 	char boot_slot_select[5];
+	struct android_bootloader_message data;
+	const char *fastboot_cmd = env_get("fastbootcmd");
 
 	if (argc != 2)
 		return CMD_RET_USAGE;
+
+	bootloader_message_read(&data);
+	if (!strcmp("bootonce-bootloader", data.command)) {
+		memset(data.command, 0, sizeof(data.command));
+		bootloader_message_write(&data);
+		if (fastboot_cmd) {
+			printf("bootonce-bootloader!\n");
+			return run_command(fastboot_cmd, CMD_FLAG_ENV);
+		} else {
+			printf("The fastbootcmd is NULL!\n");
+			return CMD_RET_SUCCESS;
+		}
+	} else if (!strcmp("boot-recovery", data.command)) {
+		printf("Enter boot-recovery!\n");
+	} else if(!strcmp("boot-normal", data.command)) {
+		printf("Enter boot-normal!\n");
+		mode_cmdline = "skip_initramfs";
+	} else {
+		mode_cmdline = "skip_initramfs";
+	}
+
 	avb_version = avb_version_string();
 	printf("Android avb version is %s.\n", avb_version);
 	ops = avb_ops_user_new();

commit 4e1bbe849d3f26647783cb425fa4e8010e31ac90
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Nov 2 16:31:40 2017 +0800

    fastboot: support oem fuse at-bootloader-vboot-key
    
    Change-Id: Ifd5a0edeaf43cf1b359125db6168d7e102bcf0bf
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 059cc3ad4b..d46fde9212 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -921,6 +921,23 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 			fastboot_tx_write_str("OKAY");
 #else
 		fastboot_tx_write_str("FAILnot implemented");
+#endif
+	} else if (strncmp("fuse at-bootloader-vboot-key", cmd + 4, 27) == 0) {
+#ifdef CONFIG_AVB_LIBAVB_USER
+		if (download_bytes != VBOOT_KEY_HASH_SIZE) {
+			fastboot_tx_write_str("FAIL");
+			printf("The vboot key size error!\n");
+		}
+
+		if (avb_write_vbootkey_hash((uint8_t *)
+					    CONFIG_FASTBOOT_BUF_ADDR,
+					    VBOOT_KEY_HASH_SIZE)) {
+			fastboot_tx_write_str("FAIL");
+			return;
+		}
+		fastboot_tx_write_str("OKAY");
+#else
+		fastboot_tx_write_str("FAILnot implemented");
 #endif
 	} else {
 		fastboot_tx_write_str("FAILunknown oem command");

commit cf7b148dc2268eee010bfabfcf1c3119a8af6847
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Nov 2 16:16:22 2017 +0800

    androidboot: free no use buffer
    
    If excute avb_ab_flow() failed, the free the
    no use buffer.
    
    Change-Id: I874f3367eceb35424b069a04a1ec35c37b46e639
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/cmd/boot_android.c b/cmd/boot_android.c
index bfe48708ac..c986764b0f 100644
--- a/cmd/boot_android.c
+++ b/cmd/boot_android.c
@@ -620,10 +620,12 @@ int do_avb_flow(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	if (verify_flag == 'v') {
 		debug("start with verify!\n");
 		if (avb_ab_flow(ops->ab_ops,
-			    requested_partitions,
-			    flags,
-			    AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE,
-			    &slot_data)) {
+				requested_partitions,
+				flags,
+				AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE,
+				&slot_data)) {
+			avb_slot_verify_data_free(slot_data);
+			avb_ops_user_free(ops);
 			printf("avb_ab_flow() error!\n");
 			return CMD_RET_FAILURE;
 		}
@@ -648,8 +650,6 @@ int do_avb_flow(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 		       slot_data->loaded_partitions->data,
 		       slot_data->loaded_partitions->data_size);
 		android_bootloader_boot_kernel(load_address);
-		avb_slot_verify_data_free(slot_data);
-		avb_ops_user_free(ops);
 	} else if (verify_flag == 'n') {
 		load_address = CONFIG_SYS_LOAD_ADDR;
 		avb_ab_slot_select(ops->ab_ops, boot_slot_select);

commit 708de1435a2fb38cb5e434c55b54087855fede8d
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Nov 2 16:10:37 2017 +0800

    androidboot: close optee client when start kernel
    
    Change-Id: I4b4626e8e2bc89c711988fe23245fa6e71ac7204
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/cmd/boot_android.c b/cmd/boot_android.c
index 27834bc73a..bfe48708ac 100644
--- a/cmd/boot_android.c
+++ b/cmd/boot_android.c
@@ -641,6 +641,9 @@ int do_avb_flow(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 		strcat(root_data, command_line);
 		env_set("bootargs", root_data);
 		load_address = CONFIG_SYS_LOAD_ADDR;
+		if (avb_close_optee_client())
+			printf("Can not close optee client!\n");
+
 		memcpy((uint8_t*)load_address,
 		       slot_data->loaded_partitions->data,
 		       slot_data->loaded_partitions->data_size);

commit 52b8c717cf31a68d8f2e0b4800537d47bf2f709c
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Nov 2 15:46:52 2017 +0800

    lib: avb: close optee client
    
    Change-Id: Iee7c991f7c06acbb064e016e11338cbf846be20d
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/android_avb/avb_ops_user.h b/include/android_avb/avb_ops_user.h
index 6fb4bacfbc..89ed4d5d24 100644
--- a/include/android_avb/avb_ops_user.h
+++ b/include/android_avb/avb_ops_user.h
@@ -215,4 +215,13 @@ int avb_read_vbootkey_hash(uint8_t *buf, uint8_t length);
  */
 int avb_write_vbootkey_hash(uint8_t *buf, uint8_t length);
 
+/**
+ * U-boot close the optee client when start kernel
+ * to prevent the optee client being invoking by other
+ * program.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int avb_close_optee_client(void);
+
 #endif
diff --git a/lib/avb/rk_libavb_user/avb_ops_user.c b/lib/avb/rk_libavb_user/avb_ops_user.c
index 32124bd3ad..d3e50c99bb 100644
--- a/lib/avb/rk_libavb_user/avb_ops_user.c
+++ b/lib/avb/rk_libavb_user/avb_ops_user.c
@@ -459,3 +459,10 @@ int avb_write_vbootkey_hash(uint8_t *buf, uint8_t length)
 		return -1;
 	return 0;
 }
+
+int avb_close_optee_client(void)
+{
+	if(trusty_notify_optee_uboot_end())
+		return -1;
+	return 0;
+}

commit 468df3b26a47b957e05f99cf210e1581ffb07eb2
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Fri Nov 3 11:51:52 2017 +0800

    lib: optee_client: add read vboot key flag func
    
    Change-Id: Id0405cc2b695f00b5d7586d01bd0b66279b24430
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/include/optee_include/OpteeClientInterface.h b/include/optee_include/OpteeClientInterface.h
index c1aa6c4d10..5f3089d367 100644
--- a/include/optee_include/OpteeClientInterface.h
+++ b/include/optee_include/OpteeClientInterface.h
@@ -24,6 +24,7 @@ uint32_t trusty_write_attribute_hash(uint32_t *buf, uint32_t length);
 uint32_t trusty_notify_optee_uboot_end(void);
 uint32_t trusty_read_vbootkey_hash(uint32_t *buf, uint32_t length);
 uint32_t trusty_write_vbootkey_hash(uint32_t *buf, uint32_t length);
+uint32_t trusty_read_vbootkey_enable_flag(uint8_t *flag);
 uint32_t trusty_read_permanent_attributes_flag(uint8_t *attributes);
 uint32_t trusty_write_permanent_attributes_flag(uint8_t attributes);
 
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index 6a57e3b7d6..9f309d0a44 100644
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -1027,6 +1027,64 @@ uint32_t trusty_write_vbootkey_hash(uint32_t *buf, uint32_t length)
 	return TeecResult;
 }
 
+uint32_t trusty_read_vbootkey_enable_flag(uint8_t *flag)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	uint32_t bootflag;
+
+	TEEC_UUID tempuuid = { 0x2d26d8a8, 0x5134, 0x4dd8, \
+			{ 0xb3, 0x2f, 0xb3, 0x4b, 0xce, 0xeb, 0xc4, 0x71 } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				&TeecSession,
+				TeecUuid,
+				TEEC_LOGIN_PUBLIC,
+				NULL,
+				NULL,
+				&ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = 1 * sizeof(uint32_t);
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_OUTPUT,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					5,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	if (TeecResult == TEEC_SUCCESS) {
+		memcpy(&bootflag, SharedMem0.buffer, SharedMem0.size);
+		if (bootflag == 0x000000FF)
+			*flag = 1;
+	}
+
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_CloseSession(&TeecSession);
+	TEEC_FinalizeContext(&TeecContext);
+
+	return TeecResult;
+}
+
 uint32_t trusty_read_permanent_attributes_flag(uint8_t *attributes)
 {
 	TEEC_Result TeecResult;

commit 4a872f4aa8369cafafa5dca780687b8552a7b5cb
Author: Wenping Zhang <wenping.zhang@rock-chips.com>
Date:   Fri Oct 20 09:19:01 2017 +0800

    rockchip: rk322x: speed up the emmc and the cpu.
    
    increase the cpu frequence to 816M, and enable mmc ddr mode
    for emmc.
    
    Change-Id: I93d6b3c625c73d5e75accfb26559930dd299e0e9
    Signed-off-by: Wenping Zhang <wenping.zhang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk322x.h b/arch/arm/include/asm/arch-rockchip/cru_rk322x.h
index a7999ca5af..c93609d5ce 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk322x.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk322x.h
@@ -11,11 +11,11 @@
 #define MHz		1000000
 #define OSC_HZ		(24 * MHz)
 
-#define APLL_HZ		(600 * MHz)
+#define APLL_HZ		(816 * MHz)
 #define GPLL_HZ		(594 * MHz)
 
-#define CORE_PERI_HZ	150000000
-#define CORE_ACLK_HZ	300000000
+#define CORE_PERI_HZ	204000000
+#define CORE_ACLK_HZ	408000000
 
 #define BUS_ACLK_HZ	148500000
 #define BUS_HCLK_HZ	148500000
diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index 250e6c8833..20c083db63 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -277,6 +277,7 @@ static int rockchip_dwmmc_probe(struct udevice *dev)
 	}
 #endif
 	dwmci_setup_cfg(&plat->cfg, host, priv->minmax[1], priv->minmax[0]);
+	plat->cfg.host_caps |= MMC_MODE_DDR_52MHz;
 	host->mmc = &plat->mmc;
 	host->mmc->priv = &priv->host;
 	host->mmc->dev = dev;

commit fe83bbf40d3910628895c2b0e325a6d8a8bdf8cf
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Nov 2 12:11:00 2017 +0800

    lib: avb: add reed/write vbootkey hash
    
    The android things require the soc-v key hash to be flashed
    using the fastboot. So these function can be used in fastboot
    to flash the key hash.
    
    Change-Id: I6e00f2e1e371793b6f0868356ac0a51090adfe5e
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/android_avb/avb_ops_user.h b/include/android_avb/avb_ops_user.h
index c232ee8320..6fb4bacfbc 100644
--- a/include/android_avb/avb_ops_user.h
+++ b/include/android_avb/avb_ops_user.h
@@ -30,6 +30,7 @@
 
 #define PERM_ATTR_DIGEST_SIZE 32
 #define PERM_ATTR_TOTAL_SIZE  1084
+#define VBOOT_KEY_HASH_SIZE   32
 
 /* Allocates an AvbOps instance suitable for use in Android userspace
  * on the device. Returns NULL on OOM.
@@ -188,4 +189,30 @@ int avb_read_perm_attr_flag(uint8_t *flag);
  */
 int avb_write_perm_attr_flag(uint8_t flag);
 
+/**
+ * The android things require the soc-v key hash to be flashed
+ * using the fastboot. So the function can be used in fastboot
+ * to flash the key hash.
+ *
+ * @param buf    The vboot key hash data.
+ *
+ * @param length The length of key hash.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int avb_read_vbootkey_hash(uint8_t *buf, uint8_t length);
+
+/**
+ * The android things require the soc-v key hash to be flashed
+ * using the fastboot. So the function can be used in fastboot
+ * to flash the key hash.
+ *
+ * @param buf    The vboot key hash data.
+ *
+ * @param length The length of key hash.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int avb_write_vbootkey_hash(uint8_t *buf, uint8_t length);
+
 #endif
diff --git a/lib/avb/rk_libavb_user/avb_ops_user.c b/lib/avb/rk_libavb_user/avb_ops_user.c
index 5152de7a11..32124bd3ad 100644
--- a/lib/avb/rk_libavb_user/avb_ops_user.c
+++ b/lib/avb/rk_libavb_user/avb_ops_user.c
@@ -443,3 +443,19 @@ int avb_write_perm_attr_flag(uint8_t flag)
 		return -1;
 	return 0;
 }
+
+int avb_read_vbootkey_hash(uint8_t *buf, uint8_t length)
+{
+	if (trusty_read_vbootkey_hash((uint32_t *)buf,
+				      (uint32_t)length / sizeof(uint32_t)))
+		return -1;
+	return 0;
+}
+
+int avb_write_vbootkey_hash(uint8_t *buf, uint8_t length)
+{
+	if (trusty_write_vbootkey_hash((uint32_t *)buf,
+				       (uint32_t)length / sizeof(uint32_t)))
+		return -1;
+	return 0;
+}

commit f74d184a88a9a5ea742eb0beab7e6175fc80f461
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Nov 2 10:25:36 2017 +0800

    lib: avb: add a permanent attribute flag
    
    Add a flag to indicate the permanent attributes
    have been written or not.
    
    Change-Id: Id0b22158772bdf18466205df5f08cb0ddb820fbf
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/android_avb/avb_ops_user.h b/include/android_avb/avb_ops_user.h
index a51a8c2715..c232ee8320 100644
--- a/include/android_avb/avb_ops_user.h
+++ b/include/android_avb/avb_ops_user.h
@@ -28,6 +28,9 @@
 #include <android_avb/libavb.h>
 #include <android_avb/avb_ab_flow.h>
 
+#define PERM_ATTR_DIGEST_SIZE 32
+#define PERM_ATTR_TOTAL_SIZE  1084
+
 /* Allocates an AvbOps instance suitable for use in Android userspace
  * on the device. Returns NULL on OOM.
  *
@@ -162,4 +165,27 @@ int avb_read_lock_state(uint8_t *lock_state);
  */
 int avb_write_lock_state(uint8_t lock_state);
 
+/**
+ * The android things uses fastboot to flash the permanent attributes.
+ * And if them were written, there must have a flag to indicate.
+ *
+ * @param flag   indicate the permanent attributes have been written
+ *               or not.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int avb_read_perm_attr_flag(uint8_t *flag);
+
+/**
+ * The android things uses fastboot to flash the permanent attributes.
+ * And if them were written, there must have a flag to indicate.
+ *
+ * @param flag   We can call this function to write the flag '1'
+ *               to indicate the permanent attributes has been
+ *               written.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int avb_write_perm_attr_flag(uint8_t flag);
+
 #endif
diff --git a/lib/avb/rk_libavb_user/avb_ops_user.c b/lib/avb/rk_libavb_user/avb_ops_user.c
index cc93eb4b76..5152de7a11 100644
--- a/lib/avb/rk_libavb_user/avb_ops_user.c
+++ b/lib/avb/rk_libavb_user/avb_ops_user.c
@@ -429,3 +429,17 @@ int avb_write_lock_state(uint8_t lock_state)
 		return -1;
 	return 0;
 }
+
+int avb_read_perm_attr_flag(uint8_t *flag)
+{
+	if (trusty_read_permanent_attributes_flag(flag))
+		return -1;
+	return 0;
+}
+
+int avb_write_perm_attr_flag(uint8_t flag)
+{
+	if (trusty_write_permanent_attributes_flag(flag))
+		return -1;
+	return 0;
+}

commit 5b09015999d90f1b63fe7fb436d72b0b8abbd6a1
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Nov 2 09:47:49 2017 +0800

    lib: avb: change the prefix of some functions to make them coincident
    
    Change-Id: Id876e6e49fb614e43d9f15cd9d24cee29aead223
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 9640d4f057..059cc3ad4b 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -438,7 +438,7 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req)
 		char temp;
 
 		slot_count[1] = '\0';
-		read_slot_count(&temp);
+		avb_read_slot_count(&temp);
 		slot_count[0] = temp + 0x30;
 		strncat(response, slot_count, chars_left);
 #else
@@ -449,7 +449,7 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req)
 #ifdef CONFIG_AVB_LIBAVB_USER
 		char slot_surrent[8] = {0};
 
-		if (!get_current_slot(slot_surrent))
+		if (!avb_get_current_slot(slot_surrent))
 			strncat(response, slot_surrent, chars_left);
 		else
 			strcpy(response, "FAILgeterror");
@@ -465,7 +465,7 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req)
 
 		memset(slot_suffixes_temp, 0, 4);
 		memset(slot_suffixes, 0, 9);
-		read_slot_suffixes(slot_suffixes_temp);
+		avb_read_slot_suffixes(slot_suffixes_temp);
 		while (slot_suffixes_temp[slot_cnt] != '\0') {
 			slot_suffixes[slot_cnt * 2]
 				= slot_suffixes_temp[slot_cnt];
@@ -754,10 +754,10 @@ static void cb_set_active(struct usb_ep *ep, struct usb_request *req)
 	unsigned int slot_number;
 	if (strncmp("a", cmd, 1) == 0) {
 		slot_number = 0;
-		set_slot_active(&slot_number);
+		avb_set_slot_active(&slot_number);
 	} else if (strncmp("b", cmd, 1) == 0) {
 		slot_number = 1;
-		set_slot_active(&slot_number);
+		avb_set_slot_active(&slot_number);
 	} else {
 		fastboot_tx_write_str("FAIL: unkown slot name");
 		return;
@@ -779,7 +779,7 @@ static void cb_flash(struct usb_ep *ep, struct usb_request *req)
 #ifdef CONFIG_AVB_LIBAVB_USER
 	uint8_t flash_lock_state;
 
-	if (read_flash_lock_state(&flash_lock_state))
+	if (avb_read_flash_lock_state(&flash_lock_state))
 		fastboot_tx_write_str("FAIL");
 		return;
 	if (flash_lock_state == 0) {
@@ -816,7 +816,7 @@ static void cb_flashing(struct usb_ep *ep, struct usb_request *req)
 #ifdef CONFIG_AVB_LIBAVB_USER
 		uint8_t flash_lock_state;
 		flash_lock_state = 0;
-		if (write_flash_lock_state(flash_lock_state))
+		if (avb_write_flash_lock_state(flash_lock_state))
 			fastboot_tx_write_str("FAIL");
 		else
 			fastboot_tx_write_str("OKAY");
@@ -827,7 +827,7 @@ static void cb_flashing(struct usb_ep *ep, struct usb_request *req)
 #ifdef CONFIG_AVB_LIBAVB_USER
 		uint8_t flash_lock_state;
 		flash_lock_state = 1;
-		if (write_flash_lock_state(flash_lock_state))
+		if (avb_write_flash_lock_state(flash_lock_state))
 			fastboot_tx_write_str("FAIL");
 		else
 			fastboot_tx_write_str("OKAY");
@@ -876,7 +876,7 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 #ifdef CONFIG_AVB_LIBAVB_USER
 		uint8_t lock_state;
 		lock_state = 0;
-		if (write_lock_state(lock_state))
+		if (avb_write_lock_state(lock_state))
 			fastboot_tx_write_str("FAIL");
 		else
 			fastboot_tx_write_str("OKAY");
@@ -886,13 +886,13 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 	} else if (strncmp("at-unlock-vboot", cmd + 4, 15) == 0) {
 #ifdef CONFIG_AVB_LIBAVB_USER
 		uint8_t lock_state;
-		if (read_lock_state(&lock_state))
+		if (avb_read_lock_state(&lock_state))
 			fastboot_tx_write_str("FAIL");
 		if (lock_state >> 1 == 1) {
 			fastboot_tx_write_str("FAILThe vboot is disable!");
 		} else {
 			lock_state = 1;
-			if (write_lock_state(lock_state))
+			if (avb_write_lock_state(lock_state))
 				fastboot_tx_write_str("FAIL");
 			else
 				fastboot_tx_write_str("OKAY");
@@ -904,7 +904,7 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 #ifdef CONFIG_AVB_LIBAVB_USER
 		uint8_t lock_state;
 		lock_state = 2;
-		if (write_lock_state(lock_state))
+		if (avb_write_lock_state(lock_state))
 			fastboot_tx_write_str("FAIL");
 		else
 			fastboot_tx_write_str("OKAY");
@@ -913,9 +913,9 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 #endif
 	} else if (strncmp("fuse at-perm-attr", cmd + 4, 16) == 0) {
 #ifdef CONFIG_AVB_LIBAVB_USER
-		if (write_permanent_attributes((uint8_t *)
-					       CONFIG_FASTBOOT_BUF_ADDR,
-					       download_bytes))
+		if (avb_write_permanent_attributes((uint8_t *)
+						   CONFIG_FASTBOOT_BUF_ADDR,
+						   download_bytes))
 			fastboot_tx_write_str("FAIL");
 		else
 			fastboot_tx_write_str("OKAY");
diff --git a/include/android_avb/avb_ops_user.h b/include/android_avb/avb_ops_user.h
index c84539d0e3..a51a8c2715 100644
--- a/include/android_avb/avb_ops_user.h
+++ b/include/android_avb/avb_ops_user.h
@@ -1,22 +1,165 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
 #ifndef AVB_OPS_USER_H_
 #define AVB_OPS_USER_H_
 
 #include <android_avb/libavb.h>
 #include <android_avb/avb_ab_flow.h>
 
-
-
+/* Allocates an AvbOps instance suitable for use in Android userspace
+ * on the device. Returns NULL on OOM.
+ *
+ * The returned AvbOps has the following characteristics:
+ *
+ * - The read_from_partition(), write_to_partition(), and
+ *   get_size_of_partition() operations are implemented, however for
+ *   these operations to work the fstab file on the device must have a
+ *   /misc entry using a by-name device file scheme and the containing
+ *   by-name/ subdirectory must have files for other partitions.
+ *
+ * - The remaining operations are implemented and never fails and
+ *   return the following values:
+ *   - validate_vbmeta_public_key(): always returns |true|.
+ *   - read_rollback_index(): returns 0 for any roolback index.
+ *   - write_rollback_index(): no-op.
+ *   - read_is_device_unlocked(): always returns |true|.
+ *   - get_unique_guid_for_partition(): always returns the empty string.
+ *
+ * - The |ab_ops| member will point to a valid AvbABOps instance
+ *   implemented via libavb_ab/. This should only be used if the AVB
+ *   A/B stack is used on the device. This is what is used in
+ *   bootctrl.avb boot control implementation.
+ *
+ * Free with avb_ops_user_free().
+ */
 AvbOps* avb_ops_user_new(void);
+
+/* Frees an AvbOps instance previously allocated with avb_ops_device_new(). */
 void avb_ops_user_free(AvbOps* ops);
-int read_slot_count(char *slot_count);
-int read_slot_suffixes(char *slot_suffixes);
-int set_slot_active(unsigned int *slot_number);
-int get_current_slot(char *select_slot);
-int read_permanent_attributes(uint8_t *attributes, uint32_t size);
-int write_permanent_attributes(uint8_t *attributes, uint32_t size);
-int read_flash_lock_state(uint8_t *flash_lock_state);
-int write_flash_lock_state(uint8_t flash_lock_state);
-int read_lock_state(uint8_t *lock_state);
-int write_lock_state(uint8_t lock_state);
+
+/**
+ * Provided to fastboot to read how many slot in this system.
+ *
+ * @param slot_count  We use parameter slot_count to obtain
+ *                    how many slots in the system.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int avb_read_slot_count(char *slot_count);
+
+/**
+ * The android things supply many slots, their name like '_a', '_b'.
+ * We can use this function to read current slot is '_a' or '_b'.
+ *
+ * @slot_suffixes  read value '_a' or '_b'.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int avb_read_slot_suffixes(char *slot_suffixes);
+
+/**
+ * Use this function to set which slot boot first.
+ *
+ * @param slot_number set '0' or '1'
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int avb_set_slot_active(unsigned int *slot_number);
+
+/**
+ * Get current slot: '_a' or '_b'.
+ *
+ * @param select_slot  obtain current slot.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int avb_get_current_slot(char *select_slot);
+
+/**
+ * The android things defines permanent attributes to
+ * store PSK_public, product id. We can use this function
+ * to read them.
+ *
+ * @param attributes  PSK_public, product id....
+ *
+ * @param size        The size of attributes.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int avb_read_permanent_attributes(uint8_t *attributes, uint32_t size);
+
+/**
+ * The android things defines permanent attributes to
+ * store PSK_public, product id. We can use this function
+ * to write them.
+ *
+ * @param attributes  PSK_public, product id....
+ *
+ * @param size        The size of attributes.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int avb_write_permanent_attributes(uint8_t *attributes, uint32_t size);
+
+/**
+ * The funtion can be use to read the device state to judge
+ * whether the device can be flash.
+ *
+ * @param flash_lock_state  A flag indicate the device flash state.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int avb_read_flash_lock_state(uint8_t *flash_lock_state);
+
+/**
+ * The function is provided to write device flash state.
+ *
+ * @param flash_lock_state   A flag indicate the device flash state.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int avb_write_flash_lock_state(uint8_t flash_lock_state);
+
+/**
+ * The android things use the flag of lock state to indicate
+ * whether the device can be booted when verified error.
+ *
+ * @param lock_state  A flag indicate the device lock state.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int avb_read_lock_state(uint8_t *lock_state);
+
+/**
+ * The android things use the flag of lock state to indicate
+ * whether the device can be booted when verified error.
+ *
+ * @param lock_state   A flag indicate the device lock state.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int avb_write_lock_state(uint8_t lock_state);
 
 #endif
diff --git a/lib/avb/rk_libavb_user/avb_ops_user.c b/lib/avb/rk_libavb_user/avb_ops_user.c
index 962fcf5423..cc93eb4b76 100644
--- a/lib/avb/rk_libavb_user/avb_ops_user.c
+++ b/lib/avb/rk_libavb_user/avb_ops_user.c
@@ -305,7 +305,7 @@ void avb_ops_user_free(AvbOps *ops)
 }
 
 
-int read_slot_count(char *slot_count)
+int avb_read_slot_count(char *slot_count)
 {
 	AvbOps* ops;
 	AvbABData ab_data;
@@ -326,7 +326,7 @@ int read_slot_count(char *slot_count)
 	return 0;
 }
 
-int read_slot_suffixes(char *slot_suffixes)
+int avb_read_slot_suffixes(char *slot_suffixes)
 {
 	AvbOps* ops;
 	AvbABData ab_data;
@@ -347,7 +347,7 @@ int read_slot_suffixes(char *slot_suffixes)
 	return 0;
 }
 
-int set_slot_active(unsigned int *slot_number)
+int avb_set_slot_active(unsigned int *slot_number)
 {
 	AvbOps* ops;
 	ops = avb_ops_user_new();
@@ -366,7 +366,7 @@ int set_slot_active(unsigned int *slot_number)
 	return 0;
 }
 
-int get_current_slot(char *select_slot)
+int avb_get_current_slot(char *select_slot)
 {
 	AvbOps* ops;
 	ops = avb_ops_user_new();
@@ -384,7 +384,7 @@ int get_current_slot(char *select_slot)
 	return 0;
 }
 
-int read_permanent_attributes(uint8_t *attributes, uint32_t size)
+int avb_read_permanent_attributes(uint8_t *attributes, uint32_t size)
 {
 	if(trusty_read_permanent_attributes(attributes, size) != 0) {
 		return -1;
@@ -393,7 +393,7 @@ int read_permanent_attributes(uint8_t *attributes, uint32_t size)
 	return 0;
 }
 
-int write_permanent_attributes(uint8_t *attributes, uint32_t size)
+int avb_write_permanent_attributes(uint8_t *attributes, uint32_t size)
 {
 	if(trusty_write_permanent_attributes(attributes, size) != 0) {
 		return -1;
@@ -402,28 +402,28 @@ int write_permanent_attributes(uint8_t *attributes, uint32_t size)
 	return 0;
 }
 
-int read_flash_lock_state(uint8_t *flash_lock_state)
+int avb_read_flash_lock_state(uint8_t *flash_lock_state)
 {
 	if (trusty_read_flash_lock_state(flash_lock_state))
 		return -1;
 	return 0;
 }
 
-int write_flash_lock_state(uint8_t flash_lock_state)
+int avb_write_flash_lock_state(uint8_t flash_lock_state)
 {
 	if (trusty_write_flash_lock_state(flash_lock_state))
 		return -1;
 	return 0;
 }
 
-int read_lock_state(uint8_t *lock_state)
+int avb_read_lock_state(uint8_t *lock_state)
 {
 	if (trusty_read_lock_state(lock_state))
 		return -1;
 	return 0;
 }
 
-int write_lock_state(uint8_t lock_state)
+int avb_write_lock_state(uint8_t lock_state)
 {
 	if (trusty_write_lock_state(lock_state))
 		return -1;

commit e13fd25b91c29650b15ba5aae9296a91795bb7e6
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Mon Oct 30 18:25:08 2017 +0800

    rockchip: mmc: add test case.
    
    Change-Id: I87e616c0a0f49f426b5e222fcc56cf5a170b3419
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/cmd/mmc.c b/cmd/mmc.c
index 94bd46f237..ae42200bfa 100644
--- a/cmd/mmc.c
+++ b/cmd/mmc.c
@@ -150,11 +150,62 @@ static int do_mmc_testrpmb(cmd_tbl_t *cmdtp,
 	debug("sizeof(value) %x\n ", sizeof(value));
 	if (value == 0x1122334455667788)
 		printf("good ! value==0x1122334455667788\n ");
-	uint8_t filename[] = "testfile1";
+	else
+		printf("error ! value!=0x1122334455667788\n ");
+
 	uint8_t data[] = "just a data";
-	write_to_keymaster(filename, sizeof(filename), data, sizeof(data));
+	uint8_t data_read[11];
+	trusty_write_permanent_attributes(data, sizeof(data));
+	trusty_read_permanent_attributes(data_read, sizeof(data));
+	printf("attribute: %s\n ", data_read);
+
+	trusty_notify_optee_uboot_end();
+	printf(" tell_optee_uboot_end \n ");
+	value = 0;
+	trusty_read_rollback_index(0x87654321, &value);
+	if (value == 0x1122334455667788)
+		printf(" value==0x1122334455667788 read still enable\n ");
+	else
+		printf(" good! value!=0x1122334455667788 read denied\n ");
 	return CMD_RET_SUCCESS;
 }
+
+static int do_mmc_testefuse(cmd_tbl_t *cmdtp,
+		int flag, int argc, char * const argv[])
+{
+	uint32_t buf32[8];
+	uint32_t outbuf32[8];
+
+	buf32[0] = 0x01020304;
+	buf32[1] = 0x05060708;
+	buf32[2] = 0x090a0b0c;
+	buf32[3] = 0x0d0e0f10;
+	buf32[4] = 0x11121314;
+	buf32[5] = 0x15161718;
+	buf32[6] = 0x191a1b1c;
+	buf32[7] = 0x1d1e1f20;
+
+	trusty_write_attribute_hash(buf32, 8);
+
+	trusty_read_attribute_hash(outbuf32, 8);
+
+	printf(" 0x%x  0x%x  0x%x  0x%x \n",
+		outbuf32[0], outbuf32[1], outbuf32[2], outbuf32[3]);
+	printf(" 0x%x  0x%x  0x%x  0x%x \n",
+		outbuf32[4], outbuf32[5], outbuf32[6], outbuf32[7]);
+
+	trusty_write_vbootkey_hash(buf32, 8);
+
+	trusty_read_vbootkey_hash(outbuf32, 8);
+
+	printf(" 0x%x  0x%x  0x%x  0x%x \n",
+		outbuf32[0], outbuf32[1], outbuf32[2], outbuf32[3]);
+	printf(" 0x%x  0x%x  0x%x  0x%x \n",
+		outbuf32[4], outbuf32[5], outbuf32[6], outbuf32[7]);
+
+	return CMD_RET_SUCCESS;
+}
+
 #endif
 
 #ifdef CONFIG_SUPPORT_EMMC_RPMB
@@ -921,6 +972,7 @@ static cmd_tbl_t cmd_mmc[] = {
 #endif
 #ifdef CONFIG_OPTEE_CLIENT
 	U_BOOT_CMD_MKENT(testrpmb, 1, 0, do_mmc_testrpmb, "", ""),
+	U_BOOT_CMD_MKENT(testefuse, 1, 0, do_mmc_testefuse, "", ""),
 #endif
 #ifdef CONFIG_SUPPORT_EMMC_RPMB
 	U_BOOT_CMD_MKENT(rpmb, CONFIG_SYS_MAXARGS, 1, do_mmcrpmb, "", ""),
@@ -988,6 +1040,7 @@ U_BOOT_CMD(
 #endif
 #ifdef CONFIG_OPTEE_CLIENT
 	"mmc testrpmb - test CA call static TA,and TA call rpmb in uboot\n"
+	"mmc testefuse - test CA call static TA,and TA read or write efuse\n"
 #endif
 #ifdef CONFIG_SUPPORT_EMMC_RPMB
 	"mmc rpmb read addr blk# cnt [address of auth-key] - block size is 256 bytes\n"

commit 095e2a82368f85b21ba902ec00863919dfd7bd89
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Mon Oct 30 18:14:52 2017 +0800

    lib: optee_client: add R&W attribute flag support.
    
    Change-Id: I682e1d9133c005022351c540f843f383703c7c65
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/include/optee_include/OpteeClientInterface.h b/include/optee_include/OpteeClientInterface.h
index 071f7ea1c2..c1aa6c4d10 100644
--- a/include/optee_include/OpteeClientInterface.h
+++ b/include/optee_include/OpteeClientInterface.h
@@ -24,5 +24,7 @@ uint32_t trusty_write_attribute_hash(uint32_t *buf, uint32_t length);
 uint32_t trusty_notify_optee_uboot_end(void);
 uint32_t trusty_read_vbootkey_hash(uint32_t *buf, uint32_t length);
 uint32_t trusty_write_vbootkey_hash(uint32_t *buf, uint32_t length);
+uint32_t trusty_read_permanent_attributes_flag(uint8_t *attributes);
+uint32_t trusty_write_permanent_attributes_flag(uint8_t attributes);
 
 #endif
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index 83d91f9e8b..6a57e3b7d6 100644
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -1026,3 +1026,136 @@ uint32_t trusty_write_vbootkey_hash(uint32_t *buf, uint32_t length)
 
 	return TeecResult;
 }
+
+uint32_t trusty_read_permanent_attributes_flag(uint8_t *attributes)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID tempuuid = { 0x258be795, 0xf9ca, 0x40e6,
+		{ 0xa8, 0x69, 0x9c, 0xe6, 0x88, 0x6c, 0x5d, 0x5d } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	debug("testmm start\n");
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				&TeecSession,
+				TeecUuid,
+				TEEC_LOGIN_PUBLIC,
+				NULL,
+				NULL,
+				&ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = sizeof("attributes_flag");
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	memcpy(SharedMem0.buffer, "attributes_flag", SharedMem0.size);
+
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = 1;
+	SharedMem1.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						TEEC_MEMREF_TEMP_INOUT,
+						TEEC_NONE,
+						TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					142,
+					&TeecOperation,
+					&ErrorOrigin);
+	if (TeecResult == TEEC_SUCCESS)
+		memcpy(attributes, SharedMem1.buffer, SharedMem1.size);
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+	TEEC_CloseSession(&TeecSession);
+	TEEC_FinalizeContext(&TeecContext);
+	debug("testmm end\n");
+
+	return TeecResult;
+}
+
+uint32_t trusty_write_permanent_attributes_flag(uint8_t attributes)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID tempuuid = { 0x258be795, 0xf9ca, 0x40e6,
+		{ 0xa8, 0x69, 0x9c, 0xe6, 0x88, 0x6c, 0x5d, 0x5d } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	debug("testmm start\n");
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				&TeecSession,
+				TeecUuid,
+				TEEC_LOGIN_PUBLIC,
+				NULL,
+				NULL,
+				&ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = sizeof("attributes_flag");
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	memcpy(SharedMem0.buffer, "attributes_flag", SharedMem0.size);
+
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = 1;
+	SharedMem1.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+
+	memcpy(SharedMem1.buffer, (char *)&attributes, SharedMem1.size);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						TEEC_MEMREF_TEMP_INOUT,
+						TEEC_NONE,
+						TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					141,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+	TEEC_CloseSession(&TeecSession);
+	TEEC_FinalizeContext(&TeecContext);
+	debug("testmm end\n");
+
+	return TeecResult;
+}

commit 46b2a054c352b4082b8c9bb0e66d06e517c74754
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Mon Oct 30 18:08:10 2017 +0800

    lib: optee_client: write attr to keymaster
    
    updata keymaster ta and write attributes to keymaster
    
    Change-Id: Iac3e64f7e4da1d6b5700d9f049d5fa8b1427b077
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c
index 0391f7c5e4..e9c3aadc3d 100644
--- a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c
+++ b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c
@@ -3,64 +3,64 @@
 
 const uint8_t keymaster_data[] = {
 0x48, 0x53, 0x54, 0x4f, 0x00, 0x00, 0x00, 0x00,
-0xfc, 0xfa, 0x02, 0x00, 0x30, 0x48, 0x00, 0x70,
-0x20, 0x00, 0x00, 0x01, 0x50, 0xf6, 0x8d, 0xb1,
-0x65, 0x28, 0xe8, 0x47, 0x09, 0xb2, 0x66, 0x2b,
-0xcb, 0x36, 0xab, 0x32, 0x8f, 0xcb, 0x33, 0xdb,
-0x64, 0xa3, 0x10, 0x5e, 0x35, 0xe6, 0xb4, 0xed,
-0x3e, 0xf8, 0x34, 0xc3, 0x0d, 0x1c, 0xef, 0x0a,
-0x8c, 0x0b, 0xf6, 0x92, 0xda, 0xba, 0xc4, 0x6a,
-0x29, 0x4d, 0x59, 0xc5, 0x2a, 0x45, 0x67, 0x15,
-0x1f, 0xa2, 0xcd, 0x5c, 0x2d, 0x10, 0xf1, 0x61,
-0x10, 0x8f, 0x48, 0x2a, 0x9b, 0x9d, 0x1f, 0x39,
-0xe0, 0x98, 0x63, 0x78, 0xb2, 0x5c, 0x90, 0xcb,
-0x56, 0x93, 0xac, 0x50, 0x53, 0xaa, 0x7d, 0xe9,
-0x7c, 0x35, 0x92, 0xf6, 0x29, 0x98, 0xef, 0x53,
-0xa8, 0x68, 0x54, 0x6f, 0x7c, 0x67, 0xa9, 0x8b,
-0xb8, 0x1c, 0x21, 0x0b, 0xea, 0xc8, 0x20, 0x6b,
-0xbe, 0x85, 0x8a, 0x9e, 0xb9, 0x04, 0x04, 0xd5,
-0x56, 0xe7, 0x69, 0x01, 0x43, 0x31, 0x61, 0xe3,
-0x43, 0xde, 0x92, 0x18, 0xf6, 0x80, 0x60, 0xd0,
-0x67, 0x7a, 0xed, 0xda, 0x86, 0x48, 0xf6, 0xfe,
-0xfd, 0xfe, 0xd9, 0x3a, 0x00, 0xd2, 0x77, 0x4a,
-0xad, 0xce, 0xa0, 0x3e, 0xd2, 0xbf, 0xf8, 0x94,
-0xe1, 0xf6, 0xdd, 0x56, 0x70, 0xa2, 0x7f, 0x8c,
-0xef, 0x95, 0xfb, 0xd5, 0x6c, 0xe3, 0x7b, 0x1a,
-0xb1, 0x22, 0xb3, 0xd9, 0x27, 0xea, 0x7b, 0xd2,
-0x27, 0x87, 0xfd, 0x6c, 0x2c, 0x7a, 0xd2, 0x08,
-0x1f, 0x6f, 0x06, 0x06, 0x81, 0x18, 0x0e, 0x45,
-0x73, 0xa5, 0x4d, 0xe6, 0xfe, 0x13, 0x4a, 0x44,
-0x01, 0xc8, 0x8e, 0x5b, 0xb3, 0x16, 0xb3, 0x3d,
-0x91, 0xbd, 0x08, 0x4e, 0xb5, 0x90, 0xe5, 0x10,
-0xab, 0x00, 0xf9, 0x71, 0x5a, 0x8d, 0x24, 0x95,
-0x10, 0xd5, 0x78, 0x51, 0x12, 0x10, 0x88, 0xdb,
-0x1f, 0x1d, 0xfe, 0x48, 0x13, 0x84, 0x1a, 0x10,
-0x46, 0xf2, 0x57, 0x76, 0x47, 0x6e, 0xa4, 0x60,
-0x7e, 0xbc, 0xa8, 0xf6, 0x73, 0xd3, 0xdd, 0xa9,
-0x10, 0xa1, 0x93, 0x48, 0xfc, 0x0f, 0x1e, 0x60,
-0x30, 0xd9, 0xf4, 0x89, 0x35, 0xec, 0x8d, 0x03,
-0x75, 0xa8, 0xf9, 0xfa, 0xb3, 0x35, 0x6a, 0xd9,
-0x34, 0xb6, 0xfb, 0xda, 0x7f, 0x45, 0x4c, 0x46,
+0x70, 0x06, 0x02, 0x00, 0x30, 0x48, 0x00, 0x70,
+0x20, 0x00, 0x00, 0x01, 0xfa, 0xf1, 0xef, 0x23,
+0x6e, 0xa3, 0x2e, 0xd9, 0x56, 0x3c, 0xb6, 0xba,
+0xa6, 0x3d, 0x60, 0x08, 0x6b, 0xe0, 0xe0, 0xd0,
+0x4c, 0x96, 0xb0, 0x72, 0xdf, 0x4e, 0xfa, 0xa7,
+0x79, 0x79, 0x93, 0xff, 0x0e, 0xf2, 0xf0, 0x25,
+0x90, 0x40, 0x71, 0x55, 0x95, 0xb8, 0x56, 0x83,
+0x30, 0x9a, 0x9b, 0x02, 0x9e, 0x30, 0x02, 0xfa,
+0x13, 0xad, 0x86, 0x5b, 0x76, 0xf7, 0x23, 0xda,
+0xc9, 0x40, 0xa1, 0x12, 0x20, 0x8f, 0xc6, 0x5a,
+0xed, 0x01, 0x0d, 0xc3, 0xe3, 0xcd, 0xc4, 0x00,
+0x90, 0xd5, 0x97, 0xf8, 0x24, 0x79, 0x9f, 0xab,
+0xaf, 0xc4, 0xf2, 0xe2, 0x67, 0xa2, 0xe2, 0x41,
+0x64, 0x8d, 0x3c, 0x91, 0xde, 0xc6, 0x5b, 0xe3,
+0xf5, 0xa6, 0x32, 0xbf, 0x64, 0xa6, 0xaf, 0xa3,
+0x18, 0xec, 0x24, 0x8d, 0x32, 0x95, 0x0a, 0xe6,
+0x63, 0x5c, 0xa6, 0x5d, 0x02, 0xa4, 0x5b, 0x06,
+0x95, 0x7e, 0xa8, 0xe3, 0x8f, 0xe6, 0xd5, 0xe4,
+0xd8, 0x8f, 0xba, 0x06, 0x1a, 0xa2, 0x7a, 0xd2,
+0x14, 0xe5, 0x75, 0xde, 0xd7, 0x8a, 0x63, 0x0d,
+0x51, 0x18, 0xc1, 0xfb, 0x78, 0xa3, 0xbd, 0x06,
+0x06, 0x1f, 0xa9, 0x8c, 0x1b, 0x9f, 0x46, 0xe8,
+0xd9, 0x77, 0x91, 0xc5, 0xf8, 0x9f, 0xd0, 0x8d,
+0x60, 0xdf, 0xb4, 0x6d, 0xe3, 0x7d, 0xf9, 0xab,
+0xff, 0x7b, 0xfe, 0x78, 0x7f, 0x2b, 0x67, 0x6c,
+0x3e, 0x6d, 0x7b, 0x47, 0xaa, 0x1f, 0xe6, 0x6e,
+0xa6, 0x94, 0xc3, 0x3c, 0xf7, 0x27, 0x3d, 0xbe,
+0x3e, 0xba, 0x69, 0x5d, 0x67, 0x98, 0xf0, 0x96,
+0x04, 0x6d, 0x01, 0xbb, 0x5f, 0x3b, 0x58, 0x57,
+0xe0, 0xbf, 0x8e, 0x6c, 0x32, 0xc2, 0x3d, 0x03,
+0xf4, 0xa5, 0x4a, 0xcd, 0x19, 0xc3, 0x9e, 0xfb,
+0xe0, 0xec, 0x25, 0xff, 0xb7, 0x67, 0x77, 0xe7,
+0x07, 0x0b, 0xb1, 0xa6, 0xb3, 0x5b, 0x5f, 0x97,
+0xa1, 0xc8, 0x83, 0x62, 0x6b, 0x2b, 0x1d, 0xf3,
+0xfd, 0x92, 0x3e, 0x45, 0x7f, 0x09, 0xf1, 0xcc,
+0xab, 0x59, 0xd6, 0xbd, 0x21, 0x7c, 0xec, 0xef,
+0x9d, 0xba, 0x52, 0x07, 0xf9, 0xd8, 0x92, 0xfb,
+0x8e, 0x11, 0x4d, 0xa1, 0x7f, 0x45, 0x4c, 0x46,
 0x01, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x28, 0x00,
 0x01, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00,
-0x34, 0x00, 0x00, 0x00, 0x7c, 0xf8, 0x02, 0x00,
+0x34, 0x00, 0x00, 0x00, 0xf0, 0x03, 0x02, 0x00,
 0x02, 0x00, 0x00, 0x05, 0x34, 0x00, 0x20, 0x00,
 0x04, 0x00, 0x28, 0x00, 0x10, 0x00, 0x0f, 0x00,
 0x01, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x78, 0x09, 0x02, 0x00, 0x78, 0x09, 0x02, 0x00,
+0x80, 0x32, 0x01, 0x00, 0x80, 0x32, 0x01, 0x00,
 0x07, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00,
-0x01, 0x00, 0x00, 0x00, 0x00, 0x90, 0x02, 0x00,
-0x00, 0x10, 0x02, 0x00, 0x00, 0x10, 0x02, 0x00,
-0x50, 0x06, 0x00, 0x00, 0x14, 0xb3, 0x00, 0x00,
+0x01, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x01, 0x00,
+0x00, 0x40, 0x01, 0x00, 0x00, 0x40, 0x01, 0x00,
+0xd2, 0x0d, 0x00, 0x00, 0x9a, 0xba, 0x00, 0x00,
 0x06, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00,
-0x01, 0x00, 0x00, 0x00, 0x00, 0xd0, 0x02, 0x00,
-0x00, 0xd0, 0x02, 0x00, 0x00, 0xd0, 0x02, 0x00,
-0x4c, 0x27, 0x00, 0x00, 0x4c, 0x27, 0x00, 0x00,
+0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00,
+0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x02, 0x00,
+0xc0, 0x02, 0x00, 0x00, 0xc0, 0x02, 0x00, 0x00,
 0x06, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00,
-0x02, 0x00, 0x00, 0x00, 0x00, 0xd0, 0x02, 0x00,
-0x00, 0xd0, 0x02, 0x00, 0x00, 0xd0, 0x02, 0x00,
+0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00,
+0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x02, 0x00,
 0x78, 0x00, 0x00, 0x00, 0x78, 0x00, 0x00, 0x00,
 0x06, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@@ -4139,9407 +4139,5507 @@ const uint8_t keymaster_data[] = {
 0x00, 0x00, 0x00, 0x00, 0x95, 0xe7, 0x8b, 0x25,
 0xca, 0xf9, 0xe6, 0x40, 0xa8, 0x69, 0x9c, 0xe6,
 0x88, 0x6c, 0x5d, 0x5d, 0x00, 0x08, 0x00, 0x00,
-0x0f, 0x00, 0x00, 0x00, 0x3d, 0x25, 0x01, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x84, 0xb0, 0xcd, 0xe9,
-0x02, 0x7e, 0xcd, 0xe9, 0x00, 0x45, 0x94, 0xb0,
-0x04, 0xaf, 0x78, 0x60, 0x7a, 0x4c, 0x7c, 0x44,
-0x04, 0x20, 0x00, 0x21, 0x79, 0x4b, 0xe3, 0x58,
-0x98, 0x47, 0xb8, 0x63, 0x01, 0x23, 0x7b, 0x63,
-0x40, 0xf2, 0x37, 0x43, 0x3b, 0x63, 0x02, 0x23,
-0xfb, 0x61, 0x75, 0x4b, 0x7b, 0x44, 0xfb, 0x62,
-0x16, 0x23, 0xbb, 0x62, 0x10, 0x23, 0x7b, 0x62,
-0x78, 0x6a, 0x00, 0x21, 0x6f, 0x4b, 0xe3, 0x58,
-0x98, 0x47, 0x38, 0x62, 0x07, 0xf1, 0x1c, 0x03,
-0xba, 0x6b, 0x00, 0x92, 0x78, 0x6b, 0x19, 0x46,
-0x04, 0x22, 0x3b, 0x6b, 0x6b, 0x4d, 0x65, 0x59,
-0xa8, 0x47, 0xf8, 0x63, 0xfa, 0x6b, 0x08, 0x23,
-0xcf, 0xf6, 0xff, 0x73, 0x9a, 0x42, 0x5f, 0xd1,
-0x07, 0xf1, 0x1c, 0x03, 0x00, 0x22, 0x00, 0x92,
-0xfa, 0x6a, 0x01, 0x92, 0xba, 0x6a, 0x02, 0x92,
-0xba, 0x6b, 0x03, 0x92, 0x78, 0x6b, 0x19, 0x46,
-0x04, 0x22, 0x3b, 0x6b, 0x60, 0x4d, 0x65, 0x59,
-0xa8, 0x47, 0xf8, 0x63, 0xfb, 0x6b, 0x00, 0x2b,
-0x0e, 0xd0, 0x5e, 0x4b, 0x7b, 0x44, 0x00, 0x93,
-0xfb, 0x6b, 0x01, 0x93, 0x5c, 0x4b, 0x7b, 0x44,
-0x18, 0x46, 0x40, 0x21, 0x02, 0x22, 0x01, 0x23,
-0x5a, 0x4d, 0x65, 0x59, 0xa8, 0x47, 0x91, 0xe0,
-0x59, 0x4b, 0x7b, 0x44, 0x00, 0x93, 0x59, 0x4b,
-0x7b, 0x44, 0x18, 0x46, 0x43, 0x21, 0x02, 0x22,
-0x01, 0x23, 0x54, 0x4d, 0x65, 0x59, 0xa8, 0x47,
-0x07, 0xf1, 0x0c, 0x03, 0x18, 0x46, 0x79, 0x6a,
-0x53, 0x4b, 0xe3, 0x58, 0x98, 0x47, 0xbb, 0x6b,
-0x1a, 0x68, 0x07, 0xf1, 0x0c, 0x03, 0x10, 0x46,
-0x19, 0x46, 0x7a, 0x6a, 0x4f, 0x4b, 0xe3, 0x58,
-0x98, 0x47, 0xf8, 0x63, 0xfb, 0x6b, 0x00, 0x2b,
-0x0e, 0xd0, 0x4d, 0x4b, 0x7b, 0x44, 0x00, 0x93,
-0xfb, 0x6b, 0x01, 0x93, 0x4b, 0x4b, 0x7b, 0x44,
-0x18, 0x46, 0x48, 0x21, 0x02, 0x22, 0x01, 0x23,
-0x42, 0x4d, 0x65, 0x59, 0xa8, 0x47, 0x61, 0xe0,
-0x47, 0x4b, 0x7b, 0x44, 0x00, 0x93, 0x47, 0x4b,
-0x7b, 0x44, 0x18, 0x46, 0x4b, 0x21, 0x02, 0x22,
-0x01, 0x23, 0x3c, 0x4d, 0x65, 0x59, 0xa8, 0x47,
-0xbb, 0x6b, 0x1b, 0x68, 0x18, 0x46, 0x00, 0x21,
-0x00, 0x22, 0x41, 0x4b, 0xe3, 0x58, 0x98, 0x47,
-0xf8, 0x63, 0xfb, 0x6b, 0x00, 0x2b, 0x0e, 0xd0,
-0x3e, 0x4b, 0x7b, 0x44, 0x00, 0x93, 0xfb, 0x6b,
-0x01, 0x93, 0x3d, 0x4b, 0x7b, 0x44, 0x18, 0x46,
-0x51, 0x21, 0x02, 0x22, 0x01, 0x23, 0x2f, 0x4d,
-0x65, 0x59, 0xa8, 0x47, 0x3a, 0xe0, 0x39, 0x4b,
-0x7b, 0x44, 0x00, 0x93, 0x38, 0x4b, 0x7b, 0x44,
-0x18, 0x46, 0x54, 0x21, 0x02, 0x22, 0x01, 0x23,
-0x28, 0x4d, 0x65, 0x59, 0xa8, 0x47, 0xbb, 0x6b,
-0x1a, 0x68, 0x07, 0xf1, 0x08, 0x03, 0x10, 0x46,
-0x39, 0x6a, 0x7a, 0x6a, 0x31, 0x4d, 0x65, 0x59,
-0xa8, 0x47, 0xf8, 0x63, 0xfb, 0x6b, 0x00, 0x2b,
-0x0e, 0xd0, 0x2f, 0x4b, 0x7b, 0x44, 0x00, 0x93,
-0xfb, 0x6b, 0x01, 0x93, 0x2d, 0x4b, 0x7b, 0x44,
-0x18, 0x46, 0x58, 0x21, 0x02, 0x22, 0x01, 0x23,
-0x1a, 0x4d, 0x65, 0x59, 0xa8, 0x47, 0x11, 0xe0,
-0x29, 0x4b, 0x7b, 0x44, 0x00, 0x93, 0x29, 0x4b,
-0x7b, 0x44, 0x18, 0x46, 0x5b, 0x21, 0x02, 0x22,
-0x01, 0x23, 0x14, 0x4d, 0x65, 0x59, 0xa8, 0x47,
-0x78, 0x68, 0x39, 0x6a, 0x7a, 0x6a, 0x24, 0x4b,
-0xe3, 0x58, 0x98, 0x47, 0xbb, 0x6b, 0x1b, 0x68,
-0x18, 0x46, 0x22, 0x4b, 0xe3, 0x58, 0x98, 0x47,
-0x38, 0x6a, 0x21, 0x4b, 0xe3, 0x58, 0x98, 0x47,
-0xfb, 0x6b, 0x18, 0x46, 0x40, 0x37, 0xbd, 0x46,
-0xdd, 0xe9, 0x00, 0x45, 0x02, 0xb0, 0x80, 0xbd,
-0x4a, 0xfd, 0x01, 0x00, 0x68, 0x01, 0x00, 0x00,
-0x18, 0xbd, 0x01, 0x00, 0x3c, 0x01, 0x00, 0x00,
-0x54, 0x02, 0x00, 0x00, 0xc8, 0xbc, 0x01, 0x00,
-0xea, 0xca, 0x01, 0x00, 0xa0, 0x00, 0x00, 0x00,
-0xd2, 0xbc, 0x01, 0x00, 0xd0, 0xca, 0x01, 0x00,
-0x48, 0x03, 0x00, 0x00, 0xf4, 0x02, 0x00, 0x00,
-0xb8, 0xbc, 0x01, 0x00, 0x8a, 0xca, 0x01, 0x00,
-0xc2, 0xbc, 0x01, 0x00, 0x70, 0xca, 0x01, 0x00,
-0xbc, 0x02, 0x00, 0x00, 0xbe, 0xbc, 0x01, 0x00,
-0x3c, 0xca, 0x01, 0x00, 0xc8, 0xbc, 0x01, 0x00,
-0x22, 0xca, 0x01, 0x00, 0x78, 0x01, 0x00, 0x00,
-0xb4, 0xbc, 0x01, 0x00, 0xea, 0xc9, 0x01, 0x00,
-0xbe, 0xbc, 0x01, 0x00, 0xd0, 0xc9, 0x01, 0x00,
-0xa4, 0x00, 0x00, 0x00, 0x30, 0x02, 0x00, 0x00,
-0x1c, 0x03, 0x00, 0x00, 0x83, 0xb0, 0xcd, 0xe9,
-0x01, 0x7e, 0x00, 0x94, 0x85, 0xb0, 0x00, 0xaf,
-0x78, 0x60, 0x0e, 0x4c, 0x7c, 0x44, 0x78, 0x68,
-0xff, 0xf7, 0xbc, 0xfe, 0xf8, 0x60, 0xfb, 0x68,
-0x00, 0x2b, 0x0b, 0xd0, 0x7a, 0x68, 0x0a, 0x4b,
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+0xa2, 0x80, 0x00, 0x00, 0x63, 0x7d, 0x00, 0x00,
+0x78, 0x80, 0x00, 0x00, 0x3f, 0x7d, 0x00, 0x00,
+0x54, 0x80, 0x00, 0x00, 0x13, 0x7d, 0x00, 0x00,
+0x28, 0x80, 0x00, 0x00, 0xeb, 0x7c, 0x00, 0x00,
+0x00, 0x80, 0x00, 0x00, 0xbb, 0x7c, 0x00, 0x00,
+0xd0, 0x7f, 0x00, 0x00, 0x8f, 0x7c, 0x00, 0x00,
+0xa4, 0x7f, 0x00, 0x00, 0x65, 0x7c, 0x00, 0x00,
+0x7a, 0x7f, 0x00, 0x00, 0x2d, 0x7c, 0x00, 0x00,
+0x3a, 0x7f, 0x00, 0x00, 0x13, 0xb5, 0x00, 0xf0,
+0xc2, 0xea, 0x04, 0x46, 0x98, 0xb1, 0x0b, 0x4b,
+0x01, 0x22, 0x40, 0xf2, 0x6b, 0x71, 0x7b, 0x44,
+0xcd, 0xe9, 0x00, 0x30, 0x08, 0x48, 0x13, 0x46,
+0x78, 0x44, 0x00, 0xf2, 0x5a, 0x20, 0x02, 0xf0,
+0x43, 0xf9, 0x20, 0x46, 0x02, 0xb0, 0xbd, 0xe8,
+0x10, 0x40, 0x02, 0xf0, 0xab, 0xbf, 0x02, 0xb0,
+0x10, 0xbd, 0x00, 0xbf, 0xa1, 0x7b, 0x00, 0x00,
+0xae, 0x7e, 0x00, 0x00, 0x13, 0xb5, 0x00, 0xf0,
+0x48, 0xec, 0x04, 0x46, 0x98, 0xb1, 0x0b, 0x4b,
+0x01, 0x22, 0x40, 0xf2, 0x74, 0x71, 0x7b, 0x44,
+0xcd, 0xe9, 0x00, 0x30, 0x08, 0x48, 0x13, 0x46,
+0x78, 0x44, 0x00, 0xf2, 0x6d, 0x20, 0x02, 0xf0,
+0x23, 0xf9, 0x20, 0x46, 0x02, 0xb0, 0xbd, 0xe8,
+0x10, 0x40, 0x02, 0xf0, 0x8b, 0xbf, 0x02, 0xb0,
+0x10, 0xbd, 0x00, 0xbf, 0x61, 0x7b, 0x00, 0x00,
+0x6e, 0x7e, 0x00, 0x00, 0x05, 0x4b, 0x7b, 0x44,
+0x1b, 0x68, 0x23, 0xb1, 0x1a, 0x68, 0x82, 0x42,
+0x01, 0xd0, 0x9b, 0x68, 0xf9, 0xe7, 0x18, 0x46,
+0x70, 0x47, 0x00, 0xbf, 0x9a, 0x96, 0x00, 0x00,
+0x08, 0xb5, 0x10, 0x4b, 0x7b, 0x44, 0x1b, 0x68,
+0xdb, 0xb1, 0x1a, 0x68, 0x82, 0x42, 0x16, 0xd1,
+0x9a, 0x68, 0xd9, 0x68, 0x0a, 0xb1, 0xd1, 0x60,
+0x02, 0xe0, 0x0b, 0x48, 0x78, 0x44, 0x41, 0x60,
+0xd9, 0x68, 0x18, 0x46, 0x0a, 0x60, 0xfc, 0xf7,
+0xcb, 0xfc, 0x08, 0x4a, 0x7a, 0x44, 0x13, 0x68,
+0x01, 0x3b, 0x13, 0x60, 0x2b, 0xb9, 0xbd, 0xe8,
+0x08, 0x40, 0xf5, 0xf7, 0x35, 0xbd, 0x9b, 0x68,
+0xe2, 0xe7, 0x08, 0xbd, 0x7c, 0x96, 0x00, 0x00,
+0x64, 0x96, 0x00, 0x00, 0x40, 0xa5, 0x00, 0x00,
+0x03, 0x48, 0x00, 0x21, 0x20, 0x22, 0x78, 0x44,
+0x04, 0x30, 0x02, 0xf0, 0xa9, 0xbf, 0x00, 0xbf,
+0x16, 0xa5, 0x00, 0x00, 0xdf, 0xf8, 0x98, 0x81,
+0x01, 0x28, 0x16, 0x46, 0x80, 0xb5, 0x99, 0x46,
+0x8e, 0xb0, 0x0f, 0x46, 0xf8, 0x44, 0x3f, 0xd0,
+0x02, 0xd3, 0x02, 0x28, 0x49, 0xd0, 0x70, 0xe0,
+0x08, 0x46, 0xff, 0xf7, 0xaf, 0xff, 0x00, 0x28,
+0x7d, 0xd1, 0x5e, 0x4d, 0x7d, 0x44, 0x2c, 0x68,
+0x01, 0x34, 0x01, 0x2c, 0x2c, 0x60, 0x13, 0xd0,
+0x10, 0x20, 0x4f, 0xf0, 0x00, 0x41, 0xfc, 0xf7,
+0x8b, 0xfc, 0x00, 0x28, 0x00, 0xf0, 0xa5, 0x80,
+0x00, 0x23, 0x07, 0x60, 0x43, 0x60, 0x83, 0x60,
+0x55, 0x4b, 0x7b, 0x44, 0x5a, 0x68, 0xc2, 0x60,
+0x10, 0x60, 0x08, 0x30, 0x58, 0x60, 0x62, 0xe0,
+0x95, 0xf8, 0x24, 0x30, 0x93, 0xb9, 0x02, 0xf0,
+0x0f, 0xff, 0x02, 0xf0, 0x87, 0xf8, 0x4f, 0x4b,
+0x58, 0xf8, 0x03, 0x30, 0x03, 0x93, 0x4e, 0x4b,
+0x03, 0x98, 0x58, 0xf8, 0x03, 0x30, 0x19, 0x68,
+0x01, 0xf0, 0x04, 0xfc, 0x00, 0xf0, 0xac, 0xfd,
+0x85, 0xf8, 0x24, 0x40, 0xf5, 0xf7, 0xda, 0xfc,
+0x00, 0x28, 0xd1, 0xd0, 0x04, 0x46, 0x4c, 0xe0,
+0x08, 0x46, 0xff, 0xf7, 0x73, 0xff, 0x00, 0x28,
+0x46, 0xd0, 0x40, 0x68, 0x00, 0x24, 0xf5, 0xf7,
+0xeb, 0xfc, 0x38, 0x46, 0xff, 0xf7, 0x78, 0xff,
+0x3f, 0xe0, 0x08, 0x46, 0xff, 0xf7, 0x66, 0xff,
+0x80, 0x46, 0x00, 0x28, 0x38, 0xd0, 0x06, 0xaf,
+0x3c, 0x4c, 0x05, 0xa9, 0x38, 0x46, 0x32, 0x46,
+0xfc, 0xf7, 0x86, 0xfa, 0x3d, 0x46, 0xdd, 0xf8,
+0x14, 0xe0, 0x0f, 0xcd, 0x7c, 0x44, 0x04, 0x34,
+0xc4, 0xf8, 0x24, 0xe0, 0x0f, 0xc4, 0x95, 0xe8,
+0x0f, 0x00, 0x84, 0xe8, 0x0f, 0x00, 0x49, 0x46,
+0x72, 0x46, 0xd8, 0xf8, 0x04, 0x00, 0x3b, 0x46,
+0xf7, 0xf7, 0xe0, 0xf8, 0x04, 0x46, 0x05, 0x99,
+0x30, 0x46, 0x3a, 0x46, 0xfc, 0xf7, 0x44, 0xfa,
+0x17, 0xe0, 0x2d, 0x4b, 0x00, 0x24, 0x01, 0x22,
+0x2c, 0x48, 0xd7, 0x21, 0x01, 0x94, 0x7b, 0x44,
+0x78, 0x44, 0x00, 0x93, 0x13, 0x46, 0x02, 0xf0,
+0x4b, 0xf8, 0x20, 0x46, 0x4f, 0xf0, 0xff, 0x34,
+0x02, 0xf0, 0xb4, 0xfe, 0x05, 0xe0, 0x38, 0x46,
+0xff, 0xf7, 0x2c, 0xff, 0x81, 0x46, 0x48, 0xb9,
+0x19, 0x4c, 0x23, 0x4b, 0x00, 0x22, 0x7b, 0x44,
+0x9a, 0x62, 0xff, 0xf7, 0x59, 0xff, 0x20, 0x46,
+0x00, 0xf0, 0x42, 0xe8, 0x0d, 0xf1, 0x18, 0x08,
+0x1e, 0x4c, 0x05, 0xa9, 0x40, 0x46, 0x32, 0x46,
+0xfc, 0xf7, 0x42, 0xfa, 0x45, 0x46, 0xdd, 0xf8,
+0x14, 0xe0, 0x0f, 0xcd, 0x7c, 0x44, 0x04, 0x34,
+0xc4, 0xf8, 0x24, 0xe0, 0x0f, 0xc4, 0x95, 0xe8,
+0x0f, 0x00, 0x84, 0xe8, 0x0f, 0x00, 0x41, 0x46,
+0x09, 0xf1, 0x04, 0x02, 0x70, 0x46, 0xf5, 0xf7,
+0x68, 0xfc, 0x04, 0x46, 0x05, 0x99, 0x30, 0x46,
+0x42, 0x46, 0xfc, 0xf7, 0x01, 0xfa, 0x00, 0x2c,
+0xd3, 0xd0, 0x38, 0x46, 0xff, 0xf7, 0x08, 0xff,
+0xcf, 0xe7, 0x02, 0x4c, 0xcd, 0xe7, 0x00, 0xbf,
+0x07, 0x00, 0xff, 0xff, 0x0c, 0x00, 0xff, 0xff,
+0x24, 0x87, 0x00, 0x00, 0xe0, 0xa4, 0x00, 0x00,
+0xce, 0x95, 0x00, 0x00, 0x24, 0x00, 0x00, 0x00,
+0x0c, 0x00, 0x00, 0x00, 0x38, 0xa4, 0x00, 0x00,
+0xa9, 0x79, 0x00, 0x00, 0x40, 0x7f, 0x00, 0x00,
+0xd6, 0xa3, 0x00, 0x00, 0xb0, 0xa3, 0x00, 0x00,
 0xe0, 0x40, 0x2d, 0xe9, 0x00, 0x70, 0xa0, 0xe3,
 0x00, 0x60, 0xa0, 0xe3, 0x00, 0x00, 0x00, 0xef,
 0xe0, 0x80, 0xbd, 0xe8, 0xe0, 0x40, 0x2d, 0xe9,
@@ -13736,4975 +9836,2813 @@ const uint8_t keymaster_data[] = {
 0x00, 0x00, 0x00, 0xef, 0xe0, 0x80, 0xbd, 0xe8,
 0xe0, 0x40, 0x2d, 0xe9, 0x4a, 0x70, 0xa0, 0xe3,
 0x00, 0x60, 0xa0, 0xe3, 0x00, 0x00, 0x00, 0xef,
-0xe0, 0x80, 0xbd, 0xe8, 0x4d, 0xf8, 0x04, 0x7d,
-0x83, 0xb0, 0x00, 0xaf, 0x78, 0x60, 0x7b, 0x68,
-0x10, 0x33, 0x18, 0x46, 0x0c, 0x37, 0xbd, 0x46,
-0x5d, 0xf8, 0x04, 0x7b, 0x70, 0x47, 0x00, 0xbf,
-0x4d, 0xf8, 0x04, 0x7d, 0x83, 0xb0, 0x00, 0xaf,
-0x78, 0x60, 0x7b, 0x68, 0x9b, 0x68, 0x01, 0x22,
-0x9b, 0x1a, 0x10, 0x3b, 0x18, 0x46, 0x0c, 0x37,
-0xbd, 0x46, 0x5d, 0xf8, 0x04, 0x7b, 0x70, 0x47,
-0x4d, 0xf8, 0x04, 0x7d, 0x83, 0xb0, 0x00, 0xaf,
-0x78, 0x60, 0x7b, 0x68, 0x10, 0x3b, 0x18, 0x46,
-0x0c, 0x37, 0xbd, 0x46, 0x5d, 0xf8, 0x04, 0x7b,
-0x70, 0x47, 0x00, 0xbf, 0x6d, 0xe9, 0x02, 0x7e,
-0x84, 0xb0, 0x00, 0xaf, 0x78, 0x60, 0x0c, 0x4b,
-0x7b, 0x44, 0x1b, 0x68, 0xfb, 0x60, 0x0b, 0xe0,
-0xf8, 0x68, 0xff, 0xf7, 0xc7, 0xff, 0x02, 0x46,
-0x7b, 0x68, 0x9a, 0x42, 0x01, 0xd1, 0x01, 0x23,
-0x06, 0xe0, 0xfb, 0x68, 0x1b, 0x68, 0xfb, 0x60,
-0xfb, 0x68, 0x00, 0x2b, 0xf0, 0xd1, 0x00, 0x23,
-0x18, 0x46, 0x10, 0x37, 0xbd, 0x46, 0x80, 0xbd,
-0xcc, 0xe9, 0x00, 0x00, 0x6d, 0xe9, 0x04, 0x45,
-0xcd, 0xe9, 0x02, 0x7e, 0x8c, 0xb0, 0x08, 0xaf,
-0xf8, 0x60, 0xb9, 0x60, 0x7a, 0x60, 0x3b, 0x60,
-0x11, 0x4d, 0x7d, 0x44, 0x38, 0x6a, 0xff, 0xf7,
-0xa5, 0xff, 0x04, 0x46, 0x38, 0x6a, 0xff, 0xf7,
-0xaf, 0xff, 0x02, 0x46, 0x0d, 0x4b, 0x7b, 0x44,
-0x00, 0x93, 0xbb, 0x68, 0x01, 0x93, 0x7b, 0x68,
-0x02, 0x93, 0x3b, 0x68, 0x03, 0x93, 0x3b, 0x6a,
-0x04, 0x93, 0x05, 0x94, 0x06, 0x92, 0x00, 0x20,
-0x00, 0x21, 0xfa, 0x68, 0x01, 0x23, 0x06, 0x4c,
-0x2c, 0x59, 0xa0, 0x47, 0x10, 0x37, 0xbd, 0x46,
-0xdd, 0xe9, 0x00, 0x45, 0x02, 0xb0, 0x80, 0xbd,
-0xce, 0xd0, 0x00, 0x00, 0xaa, 0xbb, 0x00, 0x00,
-0xa0, 0x00, 0x00, 0x00, 0x4d, 0xf8, 0x04, 0x7d,
-0x83, 0xb0, 0x00, 0xaf, 0x78, 0x60, 0x0e, 0x4b,
-0x7b, 0x44, 0x1a, 0x68, 0x7b, 0x68, 0x13, 0x44,
-0x0c, 0x4a, 0x7a, 0x44, 0x13, 0x60, 0x0c, 0x4b,
-0x7b, 0x44, 0x1b, 0x68, 0x01, 0x33, 0x0b, 0x4a,
-0x7a, 0x44, 0x13, 0x60, 0x0a, 0x4b, 0x7b, 0x44,
-0x5a, 0x68, 0x7b, 0x68, 0x13, 0x44, 0x09, 0x4a,
-0x7a, 0x44, 0x53, 0x60, 0x0c, 0x37, 0xbd, 0x46,
-0x5d, 0xf8, 0x04, 0x7b, 0x70, 0x47, 0x00, 0xbf,
-0xd8, 0x6a, 0x01, 0x00, 0xce, 0x6a, 0x01, 0x00,
-0xcc, 0x6a, 0x01, 0x00, 0xc4, 0x6a, 0x01, 0x00,
-0xbe, 0x6a, 0x01, 0x00, 0xb4, 0x6a, 0x01, 0x00,
-0x4d, 0xf8, 0x04, 0x7d, 0x83, 0xb0, 0x00, 0xaf,
-0x78, 0x60, 0x0e, 0x4b, 0x7b, 0x44, 0x1a, 0x68,
-0x7b, 0x68, 0xd3, 0x1a, 0x0c, 0x4a, 0x7a, 0x44,
-0x13, 0x60, 0x0c, 0x4b, 0x7b, 0x44, 0x1b, 0x68,
-0x01, 0x3b, 0x0b, 0x4a, 0x7a, 0x44, 0x13, 0x60,
-0x0a, 0x4b, 0x7b, 0x44, 0x5a, 0x68, 0x7b, 0x68,
-0xd3, 0x1a, 0x09, 0x4a, 0x7a, 0x44, 0x53, 0x60,
-0x0c, 0x37, 0xbd, 0x46, 0x5d, 0xf8, 0x04, 0x7b,
-0x70, 0x47, 0x00, 0xbf, 0x7c, 0x6a, 0x01, 0x00,
-0x72, 0x6a, 0x01, 0x00, 0x70, 0x6a, 0x01, 0x00,
-0x68, 0x6a, 0x01, 0x00, 0x62, 0x6a, 0x01, 0x00,
-0x58, 0x6a, 0x01, 0x00, 0x6d, 0xe9, 0x02, 0x7e,
-0x86, 0xb0, 0x02, 0xaf, 0x78, 0x60, 0x7b, 0x68,
-0xfb, 0x60, 0x7b, 0x68, 0x9b, 0x68, 0x01, 0x22,
-0x9b, 0x1a, 0xfa, 0x68, 0x13, 0x44, 0x1b, 0x78,
-0x1a, 0x46, 0xfb, 0x68, 0xdb, 0xb2, 0x83, 0xf0,
-0xc5, 0x03, 0x9a, 0x42, 0x0c, 0xd0, 0x7b, 0x68,
-0x00, 0x93, 0x01, 0x20, 0x07, 0x4b, 0x7b, 0x44,
-0x19, 0x46, 0xe3, 0x22, 0x06, 0x4b, 0x7b, 0x44,
-0xff, 0xf7, 0x50, 0xff, 0x00, 0x23, 0x00, 0xe0,
-0x01, 0x23, 0x18, 0x46, 0x10, 0x37, 0xbd, 0x46,
-0x80, 0xbd, 0x00, 0xbf, 0x7a, 0xbb, 0x00, 0x00,
-0x9e, 0xba, 0x00, 0x00, 0x4d, 0xf8, 0x0c, 0x4d,
-0xcd, 0xe9, 0x01, 0x7e, 0x87, 0xb0, 0x02, 0xaf,
-0x78, 0x60, 0x2c, 0x4c, 0x7c, 0x44, 0x7b, 0x68,
-0x00, 0x2b, 0x01, 0xd1, 0x00, 0x23, 0x49, 0xe0,
-0x7b, 0x68, 0x03, 0xf0, 0x03, 0x03, 0x00, 0x2b,
-0x0c, 0xd0, 0x27, 0x4b, 0x7b, 0x44, 0x18, 0x46,
-0x26, 0x4b, 0x7b, 0x44, 0x19, 0x46, 0xf2, 0x22,
-0x25, 0x4b, 0xe3, 0x58, 0x98, 0x47, 0x25, 0x4b,
-0xe3, 0x58, 0x98, 0x47, 0x7b, 0x68, 0x1b, 0x68,
-0xfb, 0x60, 0xfb, 0x68, 0x00, 0x2b, 0x13, 0xd0,
-0xfb, 0x68, 0x5b, 0x68, 0x5b, 0x68, 0x1a, 0x68,
-0x7b, 0x68, 0x9a, 0x42, 0x0c, 0xd0, 0xfb, 0x68,
-0x00, 0x93, 0x01, 0x20, 0x1c, 0x4b, 0x7b, 0x44,
-0x19, 0x46, 0xf6, 0x22, 0x1b, 0x4b, 0x7b, 0x44,
-0xff, 0xf7, 0x0c, 0xff, 0x00, 0x23, 0x1d, 0xe0,
-0x7b, 0x68, 0x5b, 0x68, 0x5b, 0x68, 0x1b, 0x68,
-0xfb, 0x60, 0xfb, 0x68, 0x00, 0x2b, 0x11, 0xd0,
-0xfb, 0x68, 0x1a, 0x68, 0x7b, 0x68, 0x9a, 0x42,
-0x0c, 0xd0, 0xfb, 0x68, 0x00, 0x93, 0x01, 0x20,
-0x11, 0x4b, 0x7b, 0x44, 0x19, 0x46, 0xfc, 0x22,
-0x10, 0x4b, 0x7b, 0x44, 0xff, 0xf7, 0xf2, 0xfe,
-0x00, 0x23, 0x03, 0xe0, 0x78, 0x68, 0xff, 0xf7,
-0x7d, 0xff, 0x03, 0x46, 0x18, 0x46, 0x14, 0x37,
-0xbd, 0x46, 0xdd, 0xe9, 0x00, 0x47, 0x02, 0xb0,
-0x5d, 0xf8, 0x04, 0xfb, 0x5c, 0xcf, 0x00, 0x00,
-0x64, 0xba, 0x00, 0x00, 0x7a, 0xba, 0x00, 0x00,
-0x14, 0x01, 0x00, 0x00, 0x2c, 0x03, 0x00, 0x00,
-0x02, 0xbb, 0x00, 0x00, 0x5a, 0xba, 0x00, 0x00,
-0xce, 0xba, 0x00, 0x00, 0x26, 0xba, 0x00, 0x00,
-0x4d, 0xf8, 0x0c, 0x4d, 0xcd, 0xe9, 0x01, 0x7e,
-0x83, 0xb0, 0x00, 0xaf, 0x14, 0x4c, 0x7c, 0x44,
-0x14, 0x4b, 0x7b, 0x44, 0x1b, 0x68, 0x7b, 0x60,
-0x16, 0xe0, 0x78, 0x68, 0xff, 0xf7, 0x7e, 0xff,
-0x03, 0x46, 0x00, 0x2b, 0x0d, 0xd1, 0x10, 0x4b,
-0x7b, 0x44, 0x18, 0x46, 0x0f, 0x4b, 0x7b, 0x44,
-0x19, 0x46, 0x4f, 0xf4, 0x85, 0x72, 0x0e, 0x4b,
-0xe3, 0x58, 0x98, 0x47, 0x0d, 0x4b, 0xe3, 0x58,
-0x98, 0x47, 0x7b, 0x68, 0x1b, 0x68, 0x7b, 0x60,
-0x7b, 0x68, 0x00, 0x2b, 0xe5, 0xd1, 0x01, 0x23,
-0x18, 0x46, 0x0c, 0x37, 0xbd, 0x46, 0xdd, 0xe9,
-0x00, 0x47, 0x02, 0xb0, 0x5d, 0xf8, 0x04, 0xfb,
-0x7a, 0xce, 0x00, 0x00, 0x2a, 0xe7, 0x00, 0x00,
-0xc4, 0xb9, 0x00, 0x00, 0x96, 0xb9, 0x00, 0x00,
-0x14, 0x01, 0x00, 0x00, 0x2c, 0x03, 0x00, 0x00,
-0x6d, 0xe9, 0x04, 0x45, 0xcd, 0xe9, 0x02, 0x7e,
-0x88, 0xb0, 0x02, 0xaf, 0x78, 0x60, 0x39, 0x60,
-0x44, 0x4c, 0x7c, 0x44, 0x00, 0x23, 0x7b, 0x61,
-0x01, 0x22, 0x7b, 0x68, 0x13, 0x44, 0x10, 0x33,
-0x3b, 0x61, 0x7b, 0x68, 0x00, 0x2b, 0x01, 0xda,
-0x00, 0x23, 0x73, 0xe0, 0x7b, 0x68, 0x00, 0x2b,
-0x03, 0xd1, 0x3d, 0x4b, 0x7b, 0x44, 0x1b, 0x68,
-0x6c, 0xe0, 0x3b, 0x68, 0x00, 0x2b, 0x13, 0xd0,
-0xb3, 0xf1, 0x00, 0x4f, 0x10, 0xd0, 0x39, 0x4b,
-0x7b, 0x44, 0x00, 0x93, 0x3b, 0x68, 0x01, 0x93,
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+0x17, 0x00, 0x00, 0x00, 0x84, 0x31, 0x01, 0x00,
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+0x17, 0x00, 0x00, 0x00, 0x90, 0x31, 0x01, 0x00,
+0x17, 0x00, 0x00, 0x00, 0x9c, 0x31, 0x01, 0x00,
+0x17, 0x00, 0x00, 0x00, 0x80, 0x31, 0x01, 0x00,
+0x17, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@@ -21032,209 +14045,6 @@ const uint8_t keymaster_data[] = {
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x30, 0x82, 0x02, 0x5d,
-0x02, 0x01, 0x00, 0x02, 0x81, 0x81, 0x00, 0xc0,
-0x83, 0x23, 0xdc, 0x56, 0x88, 0x1b, 0xb8, 0x30,
-0x20, 0x69, 0xf5, 0xb0, 0x85, 0x61, 0xc6, 0xee,
-0xbe, 0x7f, 0x05, 0xe2, 0xf5, 0xa8, 0x42, 0x04,
-0x8a, 0xbe, 0x8b, 0x47, 0xbe, 0x76, 0xfe, 0xae,
-0xf2, 0x5c, 0xf2, 0x9b, 0x2a, 0xfa, 0x32, 0x00,
-0x14, 0x16, 0x01, 0x42, 0x99, 0x89, 0xa1, 0x5f,
-0xcf, 0xc6, 0x81, 0x5e, 0xb3, 0x63, 0x58, 0x3c,
-0x2f, 0xd2, 0xf2, 0x0b, 0xe4, 0x98, 0x32, 0x83,
-0xdd, 0x81, 0x4b, 0x16, 0xd7, 0xe1, 0x85, 0x41,
-0x7a, 0xe5, 0x4a, 0xbc, 0x29, 0x6a, 0x3a, 0x6d,
-0xb5, 0xc0, 0x04, 0x08, 0x3b, 0x68, 0xc5, 0x56,
-0xc1, 0xf0, 0x23, 0x39, 0x91, 0x64, 0x19, 0x86,
-0x4d, 0x50, 0xb7, 0x4d, 0x40, 0xae, 0xca, 0x48,
-0x4c, 0x77, 0x35, 0x6c, 0x89, 0x5a, 0x0c, 0x27,
-0x5a, 0xbf, 0xac, 0x49, 0x9d, 0x5d, 0x7d, 0x23,
-0x62, 0xf2, 0x9c, 0x5e, 0x02, 0xe8, 0x71, 0x02,
-0x03, 0x01, 0x00, 0x01, 0x02, 0x81, 0x81, 0x00,
-0xbe, 0x86, 0x0b, 0x0b, 0x99, 0xa8, 0x02, 0xa6,
-0xfb, 0x1a, 0x59, 0x43, 0x8a, 0x7b, 0xb7, 0x15,
-0x06, 0x5b, 0x09, 0xa3, 0x6d, 0xc6, 0xe9, 0xca,
-0xcc, 0x6b, 0xf3, 0xc0, 0x2c, 0x34, 0xd7, 0xd7,
-0x9e, 0x94, 0xc6, 0x60, 0x64, 0x28, 0xd8, 0x8c,
-0x7b, 0x7f, 0x65, 0x77, 0xc1, 0xcd, 0xea, 0x64,
-0x07, 0x4a, 0xbe, 0x8e, 0x72, 0x86, 0xdf, 0x1f,
-0x08, 0x11, 0xdc, 0x97, 0x28, 0x26, 0x08, 0x68,
-0xde, 0x95, 0xd3, 0x2e, 0xfc, 0x96, 0xb6, 0xd0,
-0x84, 0xff, 0x27, 0x1a, 0x5f, 0x60, 0xde, 0xfc,
-0xc7, 0x03, 0xe7, 0xa3, 0x8e, 0x6e, 0x29, 0xba,
-0x9a, 0x3c, 0x5f, 0xc2, 0xc2, 0x80, 0x76, 0xb6,
-0xa8, 0x96, 0xaf, 0x1d, 0x34, 0xd7, 0x88, 0x28,
-0xce, 0x9b, 0xdd, 0xb1, 0xf3, 0x4f, 0x9c, 0x94,
-0x04, 0x43, 0x07, 0x81, 0x29, 0x8e, 0x20, 0x13,
-0x16, 0x72, 0x5b, 0xbd, 0xbc, 0x99, 0x3a, 0x41,
-0x02, 0x41, 0x00, 0xe1, 0xc6, 0xd9, 0x27, 0x64,
-0x6c, 0x09, 0x16, 0xec, 0x36, 0x82, 0x6d, 0x59,
-0x49, 0x83, 0x74, 0x0c, 0x21, 0xf1, 0xb0, 0x74,
-0xc4, 0xa1, 0xa5, 0x98, 0x67, 0xc6, 0x69, 0x79,
-0x5c, 0x85, 0xd3, 0xdc, 0x46, 0x4c, 0x5b, 0x92,
-0x9e, 0x94, 0xbf, 0xb3, 0x4e, 0x0d, 0xcc, 0x50,
-0x14, 0xb1, 0x0f, 0x13, 0x34, 0x1a, 0xb7, 0xfd,
-0xd5, 0xf6, 0x04, 0x14, 0xd2, 0xa3, 0x26, 0xca,
-0xd4, 0x1c, 0xc5, 0x02, 0x41, 0x00, 0xda, 0x48,
-0x59, 0x97, 0x78, 0x5c, 0xd5, 0x63, 0x0f, 0xb0,
-0xfd, 0x8c, 0x52, 0x54, 0xf9, 0x8e, 0x53, 0x8e,
-0x18, 0x98, 0x3a, 0xae, 0x9e, 0x6b, 0x7e, 0x6a,
-0x5a, 0x7b, 0x5d, 0x34, 0x37, 0x55, 0xb9, 0x21,
-0x8e, 0xbd, 0x40, 0x32, 0x0d, 0x28, 0x38, 0x7d,
-0x78, 0x9f, 0x76, 0xfa, 0x21, 0x8b, 0xcc, 0x2d,
-0x8b, 0x68, 0xa5, 0xf6, 0x41, 0x8f, 0xbb, 0xec,
-0xa5, 0x17, 0x9a, 0xb3, 0xaf, 0xbd, 0x02, 0x40,
-0x50, 0xfe, 0xfc, 0x32, 0x64, 0x95, 0x59, 0x61,
-0x6e, 0xd6, 0x53, 0x4e, 0x15, 0x45, 0x09, 0x32,
-0x9d, 0x93, 0xa3, 0xd8, 0x10, 0xdb, 0xe5, 0xbd,
-0xb9, 0x82, 0x29, 0x2c, 0xf7, 0x8b, 0xd8, 0xba,
-0xdb, 0x80, 0x20, 0xae, 0x8d, 0x57, 0xf4, 0xb7,
-0x1d, 0x05, 0x38, 0x6f, 0xfe, 0x9e, 0x9d, 0xb2,
-0x71, 0xca, 0x34, 0x77, 0xa3, 0x49, 0x99, 0xdb,
-0x76, 0xf8, 0xe5, 0xec, 0xe9, 0xc0, 0xd4, 0x9d,
-0x02, 0x40, 0x15, 0xb7, 0x4c, 0xf2, 0x7c, 0xce,
-0xff, 0x8b, 0xb3, 0x6b, 0xf0, 0x4d, 0x9d, 0x83,
-0x46, 0xb0, 0x9a, 0x2f, 0x70, 0xd2, 0xf4, 0x43,
-0x9b, 0x0f, 0x26, 0xac, 0x7e, 0x03, 0xf7, 0xe9,
-0xd1, 0xf7, 0x7d, 0x4b, 0x91, 0x5f, 0xd2, 0x9b,
-0x28, 0x23, 0xf0, 0x3a, 0xcb, 0x5d, 0x52, 0x00,
-0xe0, 0x85, 0x7f, 0xf2, 0xa8, 0x03, 0xe9, 0x3e,
-0xee, 0x96, 0xd6, 0x23, 0x5c, 0xe9, 0x54, 0x42,
-0xbc, 0x21, 0x02, 0x41, 0x00, 0x90, 0xa7, 0x45,
-0xda, 0x89, 0x70, 0xb2, 0xcd, 0x64, 0x96, 0x60,
-0x32, 0x42, 0x28, 0xc5, 0xf8, 0x28, 0x56, 0xff,
-0xd6, 0x65, 0xba, 0x9a, 0x85, 0xc8, 0xd6, 0x0f,
-0x1b, 0x8b, 0xee, 0x71, 0x7e, 0xcd, 0x2c, 0x72,
-0xea, 0xe0, 0x1d, 0xad, 0x86, 0xba, 0x76, 0x54,
-0xd4, 0xcf, 0x45, 0xad, 0xb5, 0xf1, 0xf2, 0xb3,
-0x1d, 0x9f, 0x81, 0x22, 0xcf, 0xa5, 0xf1, 0xa5,
-0x57, 0x0f, 0x9b, 0x2d, 0x25, 0x00, 0x00, 0x00,
-0x30, 0x77, 0x02, 0x01, 0x01, 0x04, 0x20, 0x21,
-0xe0, 0x86, 0x43, 0x2a, 0x15, 0x19, 0x84, 0x59,
-0xcf, 0x36, 0x3a, 0x50, 0xfc, 0x14, 0xc9, 0xda,
-0xad, 0xf9, 0x35, 0xf5, 0x27, 0xc2, 0xdf, 0xd7,
-0x1e, 0x4d, 0x6d, 0xbc, 0x42, 0xe5, 0x44, 0xa0,
-0x0a, 0x06, 0x08, 0x2a, 0x86, 0x48, 0xce, 0x3d,
-0x03, 0x01, 0x07, 0xa1, 0x44, 0x03, 0x42, 0x00,
-0x04, 0xeb, 0x9e, 0x79, 0xf8, 0x42, 0x63, 0x59,
-0xac, 0xcb, 0x2a, 0x91, 0x4c, 0x89, 0x86, 0xcc,
-0x70, 0xad, 0x90, 0x66, 0x93, 0x82, 0xa9, 0x73,
-0x26, 0x13, 0xfe, 0xac, 0xcb, 0xf8, 0x21, 0x27,
-0x4c, 0x21, 0x74, 0x97, 0x4a, 0x2a, 0xfe, 0xa5,
-0xb9, 0x4d, 0x7f, 0x66, 0xd4, 0xe0, 0x65, 0x10,
-0x66, 0x35, 0xbc, 0x53, 0xb7, 0xa0, 0xa3, 0xa6,
-0x71, 0x58, 0x3e, 0xdb, 0x3e, 0x11, 0xae, 0x10,
-0x14, 0x00, 0x00, 0x00, 0xfb, 0xda, 0x04, 0x89,
-0xa1, 0x58, 0x16, 0x0e, 0xa4, 0x02, 0xe9, 0x29,
-0xe3, 0xb6, 0x8f, 0x04, 0x30, 0x82, 0x02, 0x5d,
-0x02, 0x01, 0x00, 0x02, 0x81, 0x81, 0x00, 0xc0,
-0x83, 0x23, 0xdc, 0x56, 0x88, 0x1b, 0xb8, 0x30,
-0x20, 0x69, 0xf5, 0xb0, 0x85, 0x61, 0xc6, 0xee,
-0xbe, 0x7f, 0x05, 0xe2, 0xf5, 0xa8, 0x42, 0x04,
-0x8a, 0xbe, 0x8b, 0x47, 0xbe, 0x76, 0xfe, 0xae,
-0xf2, 0x5c, 0xf2, 0x9b, 0x2a, 0xfa, 0x32, 0x00,
-0x14, 0x16, 0x01, 0x42, 0x99, 0x89, 0xa1, 0x5f,
-0xcf, 0xc6, 0x81, 0x5e, 0xb3, 0x63, 0x58, 0x3c,
-0x2f, 0xd2, 0xf2, 0x0b, 0xe4, 0x98, 0x32, 0x83,
-0xdd, 0x81, 0x4b, 0x16, 0xd7, 0xe1, 0x85, 0x41,
-0x7a, 0xe5, 0x4a, 0xbc, 0x29, 0x6a, 0x3a, 0x6d,
-0xb5, 0xc0, 0x04, 0x08, 0x3b, 0x68, 0xc5, 0x56,
-0xc1, 0xf0, 0x23, 0x39, 0x91, 0x64, 0x19, 0x86,
-0x4d, 0x50, 0xb7, 0x4d, 0x40, 0xae, 0xca, 0x48,
-0x4c, 0x77, 0x35, 0x6c, 0x89, 0x5a, 0x0c, 0x27,
-0x5a, 0xbf, 0xac, 0x49, 0x9d, 0x5d, 0x7d, 0x23,
-0x62, 0xf2, 0x9c, 0x5e, 0x02, 0xe8, 0x71, 0x02,
-0x03, 0x01, 0x00, 0x01, 0x02, 0x81, 0x81, 0x00,
-0xbe, 0x86, 0x0b, 0x0b, 0x99, 0xa8, 0x02, 0xa6,
-0xfb, 0x1a, 0x59, 0x43, 0x8a, 0x7b, 0xb7, 0x15,
-0x06, 0x5b, 0x09, 0xa3, 0x6d, 0xc6, 0xe9, 0xca,
-0xcc, 0x6b, 0xf3, 0xc0, 0x2c, 0x34, 0xd7, 0xd7,
-0x9e, 0x94, 0xc6, 0x60, 0x64, 0x28, 0xd8, 0x8c,
-0x7b, 0x7f, 0x65, 0x77, 0xc1, 0xcd, 0xea, 0x64,
-0x07, 0x4a, 0xbe, 0x8e, 0x72, 0x86, 0xdf, 0x1f,
-0x08, 0x11, 0xdc, 0x97, 0x28, 0x26, 0x08, 0x68,
-0xde, 0x95, 0xd3, 0x2e, 0xfc, 0x96, 0xb6, 0xd0,
-0x84, 0xff, 0x27, 0x1a, 0x5f, 0x60, 0xde, 0xfc,
-0xc7, 0x03, 0xe7, 0xa3, 0x8e, 0x6e, 0x29, 0xba,
-0x9a, 0x3c, 0x5f, 0xc2, 0xc2, 0x80, 0x76, 0xb6,
-0xa8, 0x96, 0xaf, 0x1d, 0x34, 0xd7, 0x88, 0x28,
-0xce, 0x9b, 0xdd, 0xb1, 0xf3, 0x4f, 0x9c, 0x94,
-0x04, 0x43, 0x07, 0x81, 0x29, 0x8e, 0x20, 0x13,
-0x16, 0x72, 0x5b, 0xbd, 0xbc, 0x99, 0x3a, 0x41,
-0x02, 0x41, 0x00, 0xe1, 0xc6, 0xd9, 0x27, 0x64,
-0x6c, 0x09, 0x16, 0xec, 0x36, 0x82, 0x6d, 0x59,
-0x49, 0x83, 0x74, 0x0c, 0x21, 0xf1, 0xb0, 0x74,
-0xc4, 0xa1, 0xa5, 0x98, 0x67, 0xc6, 0x69, 0x79,
-0x5c, 0x85, 0xd3, 0xdc, 0x46, 0x4c, 0x5b, 0x92,
-0x9e, 0x94, 0xbf, 0xb3, 0x4e, 0x0d, 0xcc, 0x50,
-0x14, 0xb1, 0x0f, 0x13, 0x34, 0x1a, 0xb7, 0xfd,
-0xd5, 0xf6, 0x04, 0x14, 0xd2, 0xa3, 0x26, 0xca,
-0xd4, 0x1c, 0xc5, 0x02, 0x41, 0x00, 0xda, 0x48,
-0x59, 0x97, 0x78, 0x5c, 0xd5, 0x63, 0x0f, 0xb0,
-0xfd, 0x8c, 0x52, 0x54, 0xf9, 0x8e, 0x53, 0x8e,
-0x18, 0x98, 0x3a, 0xae, 0x9e, 0x6b, 0x7e, 0x6a,
-0x5a, 0x7b, 0x5d, 0x34, 0x37, 0x55, 0xb9, 0x21,
-0x8e, 0xbd, 0x40, 0x32, 0x0d, 0x28, 0x38, 0x7d,
-0x78, 0x9f, 0x76, 0xfa, 0x21, 0x8b, 0xcc, 0x2d,
-0x8b, 0x68, 0xa5, 0xf6, 0x41, 0x8f, 0xbb, 0xec,
-0xa5, 0x17, 0x9a, 0xb3, 0xaf, 0xbd, 0x02, 0x40,
-0x50, 0xfe, 0xfc, 0x32, 0x64, 0x95, 0x59, 0x61,
-0x6e, 0xd6, 0x53, 0x4e, 0x15, 0x45, 0x09, 0x32,
-0x9d, 0x93, 0xa3, 0xd8, 0x10, 0xdb, 0xe5, 0xbd,
-0xb9, 0x82, 0x29, 0x2c, 0xf7, 0x8b, 0xd8, 0xba,
-0xdb, 0x80, 0x20, 0xae, 0x8d, 0x57, 0xf4, 0xb7,
-0x1d, 0x05, 0x38, 0x6f, 0xfe, 0x9e, 0x9d, 0xb2,
-0x71, 0xca, 0x34, 0x77, 0xa3, 0x49, 0x99, 0xdb,
-0x76, 0xf8, 0xe5, 0xec, 0xe9, 0xc0, 0xd4, 0x9d,
-0x02, 0x40, 0x15, 0xb7, 0x4c, 0xf2, 0x7c, 0xce,
-0xff, 0x8b, 0xb3, 0x6b, 0xf0, 0x4d, 0x9d, 0x83,
-0x46, 0xb0, 0x9a, 0x2f, 0x70, 0xd2, 0xf4, 0x43,
-0x9b, 0x0f, 0x26, 0xac, 0x7e, 0x03, 0xf7, 0xe9,
-0xd1, 0xf7, 0x7d, 0x4b, 0x91, 0x5f, 0xd2, 0x9b,
-0x28, 0x23, 0xf0, 0x3a, 0xcb, 0x5d, 0x52, 0x00,
-0xe0, 0x85, 0x7f, 0xf2, 0xa8, 0x03, 0xe9, 0x3e,
-0xee, 0x96, 0xd6, 0x23, 0x5c, 0xe9, 0x54, 0x42,
-0xbc, 0x21, 0x02, 0x41, 0x00, 0x90, 0xa7, 0x45,
-0xda, 0x89, 0x70, 0xb2, 0xcd, 0x64, 0x96, 0x60,
-0x32, 0x42, 0x28, 0xc5, 0xf8, 0x28, 0x56, 0xff,
-0xd6, 0x65, 0xba, 0x9a, 0x85, 0xc8, 0xd6, 0x0f,
-0x1b, 0x8b, 0xee, 0x71, 0x7e, 0xcd, 0x2c, 0x72,
-0xea, 0xe0, 0x1d, 0xad, 0x86, 0xba, 0x76, 0x54,
-0xd4, 0xcf, 0x45, 0xad, 0xb5, 0xf1, 0xf2, 0xb3,
-0x1d, 0x9f, 0x81, 0x22, 0xcf, 0xa5, 0xf1, 0xa5,
-0x57, 0x0f, 0x9b, 0x2d, 0x25, 0x00, 0x00, 0x00,
-0x30, 0x77, 0x02, 0x01, 0x01, 0x04, 0x20, 0x21,
-0xe0, 0x86, 0x43, 0x2a, 0x15, 0x19, 0x84, 0x59,
-0xcf, 0x36, 0x3a, 0x50, 0xfc, 0x14, 0xc9, 0xda,
-0xad, 0xf9, 0x35, 0xf5, 0x27, 0xc2, 0xdf, 0xd7,
-0x1e, 0x4d, 0x6d, 0xbc, 0x42, 0xe5, 0x44, 0xa0,
-0x0a, 0x06, 0x08, 0x2a, 0x86, 0x48, 0xce, 0x3d,
-0x03, 0x01, 0x07, 0xa1, 0x44, 0x03, 0x42, 0x00,
-0x04, 0xeb, 0x9e, 0x79, 0xf8, 0x42, 0x63, 0x59,
-0xac, 0xcb, 0x2a, 0x91, 0x4c, 0x89, 0x86, 0xcc,
-0x70, 0xad, 0x90, 0x66, 0x93, 0x82, 0xa9, 0x73,
-0x26, 0x13, 0xfe, 0xac, 0xcb, 0xf8, 0x21, 0x27,
-0x4c, 0x21, 0x74, 0x97, 0x4a, 0x2a, 0xfe, 0xa5,
-0xb9, 0x4d, 0x7f, 0x66, 0xd4, 0xe0, 0x65, 0x10,
-0x66, 0x35, 0xbc, 0x53, 0xb7, 0xa0, 0xa3, 0xa6,
-0x71, 0x58, 0x3e, 0xdb, 0x3e, 0x11, 0xae, 0x10,
-0x14, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00,
-0x98, 0xe0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x8c, 0xe0, 0x01, 0x00, 0xb0, 0xe0, 0x01, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x8d, 0xe0, 0x01, 0x00,
-0xc4, 0xe0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x8e, 0xe0, 0x01, 0x00, 0xe0, 0xe0, 0x01, 0x00,
-0x01, 0x00, 0x00, 0x00, 0x90, 0xe0, 0x01, 0x00,
-0xf0, 0xe0, 0x01, 0x00, 0x01, 0x00, 0x00, 0x00,
-0x94, 0xe0, 0x01, 0x00, 0x04, 0xe1, 0x01, 0x00,
-0x04, 0x00, 0x00, 0x00, 0x14, 0xe1, 0x01, 0x00,
-0x28, 0xe1, 0x01, 0x00, 0x04, 0x00, 0x00, 0x00,
-0x3c, 0xe1, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x28, 0x16, 0x02, 0x00, 0x10, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x34, 0x16, 0x02, 0x00,
-0xf4, 0x97, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x40, 0x16, 0x02, 0x00,
-0x40, 0x16, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@@ -21566,6 +14376,467 @@ const uint8_t keymaster_data[] = {
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00,
+0x74, 0x23, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x76, 0xf5, 0x00, 0x00, 0x8a, 0x23, 0x01, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x75, 0xf5, 0x00, 0x00,
+0x9e, 0x23, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x74, 0xf5, 0x00, 0x00, 0xb7, 0x23, 0x01, 0x00,
+0x01, 0x00, 0x00, 0x00, 0x70, 0xf5, 0x00, 0x00,
+0xc7, 0x23, 0x01, 0x00, 0x01, 0x00, 0x00, 0x00,
+0x6c, 0xf5, 0x00, 0x00, 0xd8, 0x23, 0x01, 0x00,
+0x04, 0x00, 0x00, 0x00, 0xe7, 0x23, 0x01, 0x00,
+0xf9, 0x23, 0x01, 0x00, 0x04, 0x00, 0x00, 0x00,
+0x0c, 0x24, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x58, 0x40, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x60, 0x40, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x68, 0x40, 0x01, 0x00,
+0x68, 0x40, 0x01, 0x00, 0xfb, 0xda, 0x04, 0x89,
+0xa1, 0x58, 0x16, 0x0e, 0xa4, 0x02, 0xe9, 0x29,
+0xe3, 0xb6, 0x8f, 0x04, 0x30, 0x82, 0x02, 0x5d,
+0x02, 0x01, 0x00, 0x02, 0x81, 0x81, 0x00, 0xc0,
+0x83, 0x23, 0xdc, 0x56, 0x88, 0x1b, 0xb8, 0x30,
+0x20, 0x69, 0xf5, 0xb0, 0x85, 0x61, 0xc6, 0xee,
+0xbe, 0x7f, 0x05, 0xe2, 0xf5, 0xa8, 0x42, 0x04,
+0x8a, 0xbe, 0x8b, 0x47, 0xbe, 0x76, 0xfe, 0xae,
+0xf2, 0x5c, 0xf2, 0x9b, 0x2a, 0xfa, 0x32, 0x00,
+0x14, 0x16, 0x01, 0x42, 0x99, 0x89, 0xa1, 0x5f,
+0xcf, 0xc6, 0x81, 0x5e, 0xb3, 0x63, 0x58, 0x3c,
+0x2f, 0xd2, 0xf2, 0x0b, 0xe4, 0x98, 0x32, 0x83,
+0xdd, 0x81, 0x4b, 0x16, 0xd7, 0xe1, 0x85, 0x41,
+0x7a, 0xe5, 0x4a, 0xbc, 0x29, 0x6a, 0x3a, 0x6d,
+0xb5, 0xc0, 0x04, 0x08, 0x3b, 0x68, 0xc5, 0x56,
+0xc1, 0xf0, 0x23, 0x39, 0x91, 0x64, 0x19, 0x86,
+0x4d, 0x50, 0xb7, 0x4d, 0x40, 0xae, 0xca, 0x48,
+0x4c, 0x77, 0x35, 0x6c, 0x89, 0x5a, 0x0c, 0x27,
+0x5a, 0xbf, 0xac, 0x49, 0x9d, 0x5d, 0x7d, 0x23,
+0x62, 0xf2, 0x9c, 0x5e, 0x02, 0xe8, 0x71, 0x02,
+0x03, 0x01, 0x00, 0x01, 0x02, 0x81, 0x81, 0x00,
+0xbe, 0x86, 0x0b, 0x0b, 0x99, 0xa8, 0x02, 0xa6,
+0xfb, 0x1a, 0x59, 0x43, 0x8a, 0x7b, 0xb7, 0x15,
+0x06, 0x5b, 0x09, 0xa3, 0x6d, 0xc6, 0xe9, 0xca,
+0xcc, 0x6b, 0xf3, 0xc0, 0x2c, 0x34, 0xd7, 0xd7,
+0x9e, 0x94, 0xc6, 0x60, 0x64, 0x28, 0xd8, 0x8c,
+0x7b, 0x7f, 0x65, 0x77, 0xc1, 0xcd, 0xea, 0x64,
+0x07, 0x4a, 0xbe, 0x8e, 0x72, 0x86, 0xdf, 0x1f,
+0x08, 0x11, 0xdc, 0x97, 0x28, 0x26, 0x08, 0x68,
+0xde, 0x95, 0xd3, 0x2e, 0xfc, 0x96, 0xb6, 0xd0,
+0x84, 0xff, 0x27, 0x1a, 0x5f, 0x60, 0xde, 0xfc,
+0xc7, 0x03, 0xe7, 0xa3, 0x8e, 0x6e, 0x29, 0xba,
+0x9a, 0x3c, 0x5f, 0xc2, 0xc2, 0x80, 0x76, 0xb6,
+0xa8, 0x96, 0xaf, 0x1d, 0x34, 0xd7, 0x88, 0x28,
+0xce, 0x9b, 0xdd, 0xb1, 0xf3, 0x4f, 0x9c, 0x94,
+0x04, 0x43, 0x07, 0x81, 0x29, 0x8e, 0x20, 0x13,
+0x16, 0x72, 0x5b, 0xbd, 0xbc, 0x99, 0x3a, 0x41,
+0x02, 0x41, 0x00, 0xe1, 0xc6, 0xd9, 0x27, 0x64,
+0x6c, 0x09, 0x16, 0xec, 0x36, 0x82, 0x6d, 0x59,
+0x49, 0x83, 0x74, 0x0c, 0x21, 0xf1, 0xb0, 0x74,
+0xc4, 0xa1, 0xa5, 0x98, 0x67, 0xc6, 0x69, 0x79,
+0x5c, 0x85, 0xd3, 0xdc, 0x46, 0x4c, 0x5b, 0x92,
+0x9e, 0x94, 0xbf, 0xb3, 0x4e, 0x0d, 0xcc, 0x50,
+0x14, 0xb1, 0x0f, 0x13, 0x34, 0x1a, 0xb7, 0xfd,
+0xd5, 0xf6, 0x04, 0x14, 0xd2, 0xa3, 0x26, 0xca,
+0xd4, 0x1c, 0xc5, 0x02, 0x41, 0x00, 0xda, 0x48,
+0x59, 0x97, 0x78, 0x5c, 0xd5, 0x63, 0x0f, 0xb0,
+0xfd, 0x8c, 0x52, 0x54, 0xf9, 0x8e, 0x53, 0x8e,
+0x18, 0x98, 0x3a, 0xae, 0x9e, 0x6b, 0x7e, 0x6a,
+0x5a, 0x7b, 0x5d, 0x34, 0x37, 0x55, 0xb9, 0x21,
+0x8e, 0xbd, 0x40, 0x32, 0x0d, 0x28, 0x38, 0x7d,
+0x78, 0x9f, 0x76, 0xfa, 0x21, 0x8b, 0xcc, 0x2d,
+0x8b, 0x68, 0xa5, 0xf6, 0x41, 0x8f, 0xbb, 0xec,
+0xa5, 0x17, 0x9a, 0xb3, 0xaf, 0xbd, 0x02, 0x40,
+0x50, 0xfe, 0xfc, 0x32, 0x64, 0x95, 0x59, 0x61,
+0x6e, 0xd6, 0x53, 0x4e, 0x15, 0x45, 0x09, 0x32,
+0x9d, 0x93, 0xa3, 0xd8, 0x10, 0xdb, 0xe5, 0xbd,
+0xb9, 0x82, 0x29, 0x2c, 0xf7, 0x8b, 0xd8, 0xba,
+0xdb, 0x80, 0x20, 0xae, 0x8d, 0x57, 0xf4, 0xb7,
+0x1d, 0x05, 0x38, 0x6f, 0xfe, 0x9e, 0x9d, 0xb2,
+0x71, 0xca, 0x34, 0x77, 0xa3, 0x49, 0x99, 0xdb,
+0x76, 0xf8, 0xe5, 0xec, 0xe9, 0xc0, 0xd4, 0x9d,
+0x02, 0x40, 0x15, 0xb7, 0x4c, 0xf2, 0x7c, 0xce,
+0xff, 0x8b, 0xb3, 0x6b, 0xf0, 0x4d, 0x9d, 0x83,
+0x46, 0xb0, 0x9a, 0x2f, 0x70, 0xd2, 0xf4, 0x43,
+0x9b, 0x0f, 0x26, 0xac, 0x7e, 0x03, 0xf7, 0xe9,
+0xd1, 0xf7, 0x7d, 0x4b, 0x91, 0x5f, 0xd2, 0x9b,
+0x28, 0x23, 0xf0, 0x3a, 0xcb, 0x5d, 0x52, 0x00,
+0xe0, 0x85, 0x7f, 0xf2, 0xa8, 0x03, 0xe9, 0x3e,
+0xee, 0x96, 0xd6, 0x23, 0x5c, 0xe9, 0x54, 0x42,
+0xbc, 0x21, 0x02, 0x41, 0x00, 0x90, 0xa7, 0x45,
+0xda, 0x89, 0x70, 0xb2, 0xcd, 0x64, 0x96, 0x60,
+0x32, 0x42, 0x28, 0xc5, 0xf8, 0x28, 0x56, 0xff,
+0xd6, 0x65, 0xba, 0x9a, 0x85, 0xc8, 0xd6, 0x0f,
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+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@@ -23080,17 +16351,6 @@ const uint8_t keymaster_data[] = {
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00,
-0x50, 0xf0, 0x02, 0x00, 0x05, 0x00, 0x00, 0x00,
-0xf8, 0xdf, 0x02, 0x00, 0x06, 0x00, 0x00, 0x00,
-0x78, 0xd0, 0x02, 0x00, 0x0a, 0x00, 0x00, 0x00,
-0x56, 0x10, 0x00, 0x00, 0x0b, 0x00, 0x00, 0x00,
-0x10, 0x00, 0x00, 0x00, 0x15, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x11, 0x00, 0x00, 0x00,
-0x50, 0x01, 0x02, 0x00, 0x12, 0x00, 0x00, 0x00,
-0x28, 0x08, 0x00, 0x00, 0x13, 0x00, 0x00, 0x00,
-0x08, 0x00, 0x00, 0x00, 0xfa, 0xff, 0xff, 0x6f,
-0x14, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@@ -23099,1121 +16359,12 @@ const uint8_t keymaster_data[] = {
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x03, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x03, 0x00, 0x02, 0x00, 0x66, 0x00, 0x00, 0x00,
-0x61, 0xb0, 0x01, 0x00, 0x3c, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x76, 0x00, 0x00, 0x00,
-0x55, 0xcc, 0x00, 0x00, 0xf4, 0x01, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x92, 0x00, 0x00, 0x00,
-0x09, 0x74, 0x01, 0x00, 0x60, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x9b, 0x00, 0x00, 0x00,
-0xfd, 0x7f, 0x01, 0x00, 0x8e, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0xa7, 0x00, 0x00, 0x00,
-0x35, 0xb0, 0x00, 0x00, 0x60, 0x02, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0xb6, 0x00, 0x00, 0x00,
-0x95, 0x74, 0x01, 0x00, 0x6e, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0xcc, 0x00, 0x00, 0x00,
-0x70, 0x29, 0x01, 0x00, 0x18, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0xe4, 0x00, 0x00, 0x00,
-0xdc, 0x25, 0x01, 0x00, 0x14, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0xf0, 0x00, 0x00, 0x00,
-0x5d, 0xf6, 0x00, 0x00, 0xc4, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x01, 0x01, 0x00, 0x00,
-0xc1, 0x30, 0x01, 0x00, 0xc0, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x16, 0x01, 0x00, 0x00,
-0xc1, 0xa7, 0x01, 0x00, 0x10, 0x02, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x81, 0x02, 0x00, 0x00,
-0xa9, 0xb8, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x1e, 0x01, 0x00, 0x00,
-0x81, 0x31, 0x01, 0x00, 0x2c, 0x01, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x30, 0x01, 0x00, 0x00,
-0xf0, 0x25, 0x01, 0x00, 0x14, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x39, 0x01, 0x00, 0x00,
-0x49, 0xce, 0x00, 0x00, 0xb0, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x4e, 0x01, 0x00, 0x00,
-0x09, 0x09, 0x01, 0x00, 0xec, 0x01, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x2a, 0x0c, 0x00, 0x00,
-0x75, 0x7a, 0x01, 0x00, 0x70, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x61, 0x01, 0x00, 0x00,
-0x25, 0x5e, 0x01, 0x00, 0x2a, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x6b, 0x01, 0x00, 0x00,
-0x95, 0x75, 0x01, 0x00, 0x28, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x76, 0x01, 0x00, 0x00,
-0x65, 0x5b, 0x01, 0x00, 0x16, 0x01, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x13, 0x0e, 0x00, 0x00,
-0x5d, 0x59, 0x01, 0x00, 0x50, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x7e, 0x01, 0x00, 0x00,
-0xf9, 0xce, 0x00, 0x00, 0xb0, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x95, 0x01, 0x00, 0x00,
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-};
-const uint32_t keymaster_size = 195632;
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+0x10, 0x00, 0xf1, 0xff, 0xc4, 0x00, 0x00, 0x00,
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+0x2e, 0x38, 0x00, 0x47, 0x43, 0x43, 0x3a, 0x20,
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+0x31, 0x34, 0x31, 0x31, 0x31, 0x39, 0x20, 0x28,
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+0x6f, 0x6e, 0x20, 0x32, 0x31, 0x38, 0x32, 0x37,
+0x38, 0x5d, 0x00, 0x41, 0x39, 0x00, 0x00, 0x00,
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+0x65, 0x78, 0x2d, 0x41, 0x31, 0x35, 0x00, 0x06,
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+0x02, 0x12, 0x04, 0x17, 0x03, 0x18, 0x01, 0x1a,
+0x02, 0x1b, 0x03, 0x1c, 0x01, 0x1e, 0x04, 0x2a,
+0x01, 0x2c, 0x02, 0x44, 0x03, 0x00, 0x2e, 0x73,
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+0x01, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
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+0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00,
+0x01, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00,
+0x20, 0x00, 0x00, 0x00, 0x20, 0x80, 0x00, 0x00,
+0xb0, 0xf4, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x1a, 0x00, 0x00, 0x00,
+0x01, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00,
+0xd0, 0xf4, 0x00, 0x00, 0xd0, 0x74, 0x01, 0x00,
+0x9f, 0x3c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x2e, 0x00, 0x00, 0x00,
+0x01, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
+0x70, 0x31, 0x01, 0x00, 0x70, 0xb1, 0x01, 0x00,
+0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00,
+0x04, 0x00, 0x00, 0x00, 0x22, 0x00, 0x00, 0x00,
+0x0b, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00,
+0x78, 0x00, 0x02, 0x00, 0x78, 0x00, 0x02, 0x00,
+0x00, 0x01, 0x00, 0x00, 0x0a, 0x00, 0x00, 0x00,
+0x03, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00,
+0x10, 0x00, 0x00, 0x00, 0x2a, 0x00, 0x00, 0x00,
+0x09, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00,
+0x38, 0x32, 0x01, 0x00, 0x38, 0xb2, 0x01, 0x00,
+0x48, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00,
+0x04, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00,
+0x08, 0x00, 0x00, 0x00, 0x33, 0x00, 0x00, 0x00,
+0x01, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
+0x00, 0x40, 0x01, 0x00, 0x00, 0xc0, 0x01, 0x00,
+0xd2, 0x0d, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x39, 0x00, 0x00, 0x00,
+0x08, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
+0xd8, 0x4d, 0x01, 0x00, 0xd2, 0xcd, 0x01, 0x00,
+0xc2, 0xac, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x3e, 0x00, 0x00, 0x00,
+0x06, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x02, 0x00,
+0x78, 0x00, 0x00, 0x00, 0x0a, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00,
+0x08, 0x00, 0x00, 0x00, 0x47, 0x00, 0x00, 0x00,
+0x03, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00,
+0x78, 0x01, 0x02, 0x00, 0x78, 0x01, 0x02, 0x00,
+0xf3, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x4f, 0x00, 0x00, 0x00,
+0x05, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00,
+0x6c, 0x02, 0x02, 0x00, 0x6c, 0x02, 0x02, 0x00,
+0x54, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00,
+0x04, 0x00, 0x00, 0x00, 0x55, 0x00, 0x00, 0x00,
+0x01, 0x00, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0xc0, 0x02, 0x02, 0x00,
+0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
+0x01, 0x00, 0x00, 0x00, 0x5e, 0x00, 0x00, 0x00,
+0x03, 0x00, 0x00, 0x70, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x3f, 0x03, 0x02, 0x00,
+0x3a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x6e, 0x00, 0x00, 0x00,
+0x09, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00,
+0xa0, 0x31, 0x01, 0x00, 0xa0, 0xb1, 0x01, 0x00,
+0x98, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00,
+0x08, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
+0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x79, 0x03, 0x02, 0x00,
+0x77, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, };
+const uint32_t keymaster_size = 133028;
diff --git a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta
index d1a6989c04..49e6582cc6 100644
Binary files a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta and b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta differ
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index da3b16df5b..83d91f9e8b 100644
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -73,13 +73,12 @@ void test_optee(void)
 
 	TEEC_CloseSession(&TeecSession);
 
-	TeecResult = TEEC_FinalizeContext(&TeecContext);
+	TEEC_FinalizeContext(&TeecContext);
 
 	debug("testmm end\n");
 	debug("TeecResult %x\n", TeecResult);
 }
 
-
 static uint8_t b2hs_add_base(uint8_t in)
 {
 	if (in > 9)
@@ -162,15 +161,15 @@ uint32_t trusty_read_rollback_index(uint32_t slot, uint64_t *value)
 					0,
 					&TeecOperation,
 					&ErrorOrigin);
-
-	memcpy((char *)value, SharedMem1.buffer, SharedMem1.size);
+	if (TeecResult == TEEC_SUCCESS)
+		memcpy((char *)value, SharedMem1.buffer, SharedMem1.size);
 
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
 
 	TEEC_CloseSession(&TeecSession);
 
-	TeecResult = TEEC_FinalizeContext(&TeecContext);
+	TEEC_FinalizeContext(&TeecContext);
 
 	debug("testmm end\n");
 	return TeecResult;
@@ -240,7 +239,7 @@ uint32_t trusty_write_rollback_index(uint32_t slot, uint64_t value)
 
 	TEEC_CloseSession(&TeecSession);
 
-	TeecResult = TEEC_FinalizeContext(&TeecContext);
+	TEEC_FinalizeContext(&TeecContext);
 
 	debug("testmm end\n");
 
@@ -253,8 +252,8 @@ uint32_t trusty_read_permanent_attributes(uint8_t *attributes, uint32_t size)
 	TEEC_Context TeecContext;
 	TEEC_Session TeecSession;
 	uint32_t ErrorOrigin;
-	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
-		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
+	TEEC_UUID tempuuid = { 0x258be795, 0xf9ca, 0x40e6,
+		{ 0xa8, 0x69, 0x9c, 0xe6, 0x88, 0x6c, 0x5d, 0x5d } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
 
@@ -300,15 +299,15 @@ uint32_t trusty_read_permanent_attributes(uint8_t *attributes, uint32_t size)
 						TEEC_NONE);
 
 	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					0,
+					142,
 					&TeecOperation,
 					&ErrorOrigin);
-
-	memcpy(attributes, SharedMem1.buffer, SharedMem1.size);
+	if (TeecResult == TEEC_SUCCESS)
+		memcpy(attributes, SharedMem1.buffer, SharedMem1.size);
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
 	TEEC_CloseSession(&TeecSession);
-	TeecResult = TEEC_FinalizeContext(&TeecContext);
+	TEEC_FinalizeContext(&TeecContext);
 	debug("testmm end\n");
 
 	return TeecResult;
@@ -320,8 +319,8 @@ uint32_t trusty_write_permanent_attributes(uint8_t *attributes, uint32_t size)
 	TEEC_Context TeecContext;
 	TEEC_Session TeecSession;
 	uint32_t ErrorOrigin;
-	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
-		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
+	TEEC_UUID tempuuid = { 0x258be795, 0xf9ca, 0x40e6,
+		{ 0xa8, 0x69, 0x9c, 0xe6, 0x88, 0x6c, 0x5d, 0x5d } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
 
@@ -369,14 +368,14 @@ uint32_t trusty_write_permanent_attributes(uint8_t *attributes, uint32_t size)
 						TEEC_NONE);
 
 	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					1,
+					141,
 					&TeecOperation,
 					&ErrorOrigin);
 
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
 	TEEC_CloseSession(&TeecSession);
-	TeecResult = TEEC_FinalizeContext(&TeecContext);
+	TEEC_FinalizeContext(&TeecContext);
 	debug("testmm end\n");
 
 	return TeecResult;
@@ -439,12 +438,12 @@ uint32_t trusty_read_lock_state(uint8_t *lock_state)
 					0,
 					&TeecOperation,
 					&ErrorOrigin);
-
-	memcpy(lock_state, SharedMem1.buffer, SharedMem1.size);
+	if (TeecResult == TEEC_SUCCESS)
+		memcpy(lock_state, SharedMem1.buffer, SharedMem1.size);
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
 	TEEC_CloseSession(&TeecSession);
-	TeecResult = TEEC_FinalizeContext(&TeecContext);
+	TEEC_FinalizeContext(&TeecContext);
 	debug("testmm end\n");
 
 	return TeecResult;
@@ -512,7 +511,7 @@ uint32_t trusty_write_lock_state(uint8_t lock_state)
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
 	TEEC_CloseSession(&TeecSession);
-	TeecResult = TEEC_FinalizeContext(&TeecContext);
+	TEEC_FinalizeContext(&TeecContext);
 	debug("testmm end\n");
 
 	return TeecResult;
@@ -575,12 +574,12 @@ uint32_t trusty_read_flash_lock_state(uint8_t *flash_lock_state)
 					0,
 					&TeecOperation,
 					&ErrorOrigin);
-
-	memcpy(flash_lock_state, SharedMem1.buffer, SharedMem1.size);
+	if (TeecResult == TEEC_SUCCESS)
+		memcpy(flash_lock_state, SharedMem1.buffer, SharedMem1.size);
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
 	TEEC_CloseSession(&TeecSession);
-	TeecResult = TEEC_FinalizeContext(&TeecContext);
+	TEEC_FinalizeContext(&TeecContext);
 	debug("testmm end\n");
 
 	return TeecResult;
@@ -649,7 +648,7 @@ uint32_t trusty_write_flash_lock_state(uint8_t flash_lock_state)
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
 	TEEC_CloseSession(&TeecSession);
-	TeecResult = TEEC_FinalizeContext(&TeecContext);
+	TEEC_FinalizeContext(&TeecContext);
 	debug("testmm end\n");
 
 	return TeecResult;
@@ -721,7 +720,7 @@ uint32_t write_to_keymaster(uint8_t *filename,
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
 	TEEC_CloseSession(&TeecSession);
-	TeecResult = TEEC_FinalizeContext(&TeecContext);
+	TEEC_FinalizeContext(&TeecContext);
 	debug("testmm end\n");
 	debug("TeecResult %x\n", TeecResult);
 

commit 2cd27853d2f45c04381e1637528a15d28ee6666c
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Mon Oct 30 17:53:37 2017 +0800

    lib: optee_client: add R&W vboot key hash func
    
    uboot can read vboot key hash from efuse and write
    vboot key hash to efuse, secure boot will be enable
    after you write vboot key hash.
    
    Change-Id: Ibe7b2a5778a3f38e13a241261617f1be8537c88e
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/include/optee_include/OpteeClientInterface.h b/include/optee_include/OpteeClientInterface.h
index f1fed494e2..071f7ea1c2 100644
--- a/include/optee_include/OpteeClientInterface.h
+++ b/include/optee_include/OpteeClientInterface.h
@@ -22,5 +22,7 @@ uint32_t write_to_keymaster
 uint32_t trusty_read_attribute_hash(uint32_t *buf, uint32_t length);
 uint32_t trusty_write_attribute_hash(uint32_t *buf, uint32_t length);
 uint32_t trusty_notify_optee_uboot_end(void);
+uint32_t trusty_read_vbootkey_hash(uint32_t *buf, uint32_t length);
+uint32_t trusty_write_vbootkey_hash(uint32_t *buf, uint32_t length);
 
 #endif
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index b6674c82d9..da3b16df5b 100644
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -921,3 +921,109 @@ uint32_t trusty_notify_optee_uboot_end(void)
 	res |= notify_optee_efuse_ta();
 	return res;
 }
+
+uint32_t trusty_read_vbootkey_hash(uint32_t *buf, uint32_t length)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+
+	TEEC_UUID tempuuid = { 0x2d26d8a8, 0x5134, 0x4dd8, \
+			{ 0xb3, 0x2f, 0xb3, 0x4b, 0xce, 0xeb, 0xc4, 0x71 } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				&TeecSession,
+				TeecUuid,
+				TEEC_LOGIN_PUBLIC,
+				NULL,
+				NULL,
+				&ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = length * sizeof(uint32_t);
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_OUTPUT,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					3,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	if (TeecResult == TEEC_SUCCESS)
+		memcpy(buf, SharedMem0.buffer, SharedMem0.size);
+
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_CloseSession(&TeecSession);
+	TEEC_FinalizeContext(&TeecContext);
+
+	return TeecResult;
+}
+uint32_t trusty_write_vbootkey_hash(uint32_t *buf, uint32_t length)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+
+	TEEC_UUID tempuuid = { 0x2d26d8a8, 0x5134, 0x4dd8, \
+			{ 0xb3, 0x2f, 0xb3, 0x4b, 0xce, 0xeb, 0xc4, 0x71 } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				&TeecSession,
+				TeecUuid,
+				TEEC_LOGIN_PUBLIC,
+				NULL,
+				NULL,
+				&ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = length * sizeof(uint32_t);
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	memcpy(SharedMem0.buffer, buf, SharedMem0.size);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					4,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_CloseSession(&TeecSession);
+	TEEC_FinalizeContext(&TeecContext);
+
+	return TeecResult;
+}

commit 165396163ee1502fdaa9d187e17bae957d1d281f
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Mon Oct 30 17:43:25 2017 +0800

    lib: optee_client: notify optee when uboot end
    
    trusty_notify_optee_uboot_end() function is used before uboot
    jump into kernel, then optee will free memery and denied
    call some tipc functions, denied call read write attribute hash.
    
    Change-Id: I96b5687e1afd5bfdf1780ed1641f5fff2fc17eee
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/include/optee_include/OpteeClientInterface.h b/include/optee_include/OpteeClientInterface.h
index 0834ce3034..f1fed494e2 100644
--- a/include/optee_include/OpteeClientInterface.h
+++ b/include/optee_include/OpteeClientInterface.h
@@ -21,5 +21,6 @@ uint32_t write_to_keymaster
 	uint8_t *data, uint32_t data_size);
 uint32_t trusty_read_attribute_hash(uint32_t *buf, uint32_t length);
 uint32_t trusty_write_attribute_hash(uint32_t *buf, uint32_t length);
+uint32_t trusty_notify_optee_uboot_end(void);
 
 #endif
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index b998a2b480..b6674c82d9 100644
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -834,3 +834,90 @@ uint32_t trusty_write_attribute_hash(uint32_t *buf, uint32_t length)
 
 	return TeecResult;
 }
+
+uint32_t notify_optee_rpmb_ta(void)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID  tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				&TeecSession,
+				TeecUuid,
+				TEEC_LOGIN_PUBLIC,
+				NULL,
+				NULL,
+				&ErrorOrigin);
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					2,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	TEEC_CloseSession(&TeecSession);
+	TEEC_FinalizeContext(&TeecContext);
+
+	return TeecResult;
+}
+
+uint32_t notify_optee_efuse_ta(void)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID tempuuid = { 0x2d26d8a8, 0x5134, 0x4dd8, \
+			{ 0xb3, 0x2f, 0xb3, 0x4b, 0xce, 0xeb, 0xc4, 0x71 } };
+
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				&TeecSession,
+				TeecUuid,
+				TEEC_LOGIN_PUBLIC,
+				NULL,
+				NULL,
+				&ErrorOrigin);
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					2,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	TEEC_CloseSession(&TeecSession);
+	TEEC_FinalizeContext(&TeecContext);
+
+	return TeecResult;
+}
+
+uint32_t trusty_notify_optee_uboot_end(void)
+{
+	TEEC_Result res;
+	res = notify_optee_rpmb_ta();
+	res |= notify_optee_efuse_ta();
+	return res;
+}

commit 7b9ee69be599bd672f1111a38fad4e6b08c23c0f
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Mon Oct 30 17:36:30 2017 +0800

    lib: optee_client: add macro definition
    
    Change-Id: If6791e63a70190273b09c3cfa7f61490d7f5f0cd
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/include/optee_include/258be795-f9ca-40e6-a8699ce6886c5d5d.h b/include/optee_include/258be795-f9ca-40e6-a8699ce6886c5d5d.h
index a1df9239ed..2e07fbb105 100644
--- a/include/optee_include/258be795-f9ca-40e6-a8699ce6886c5d5d.h
+++ b/include/optee_include/258be795-f9ca-40e6-a8699ce6886c5d5d.h
@@ -3,6 +3,10 @@
  *
  * SPDX-License-Identifier:     GPL-2.0+
  */
+#ifndef _KEYMASTER_TA_H_
+#define _KEYMASTER_TA_H_
 
 extern const uint8_t keymaster_data[];
 extern const uint32_t keymaster_size;
+
+#endif /* _KEYMASTER_TA_H_ */
diff --git a/include/optee_include/OpteeClientApiLib.h b/include/optee_include/OpteeClientApiLib.h
index a88565fbff..8c68643e29 100644
--- a/include/optee_include/OpteeClientApiLib.h
+++ b/include/optee_include/OpteeClientApiLib.h
@@ -4,7 +4,12 @@
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
+#ifndef _OPTEE_CLIENT_APILIB_H_
+#define _OPTEE_CLIENT_APILIB_H_
+
 #include <optee_include/tee_base_types.h>
 #include <optee_include/tee_client_api.h>
 
 TEEC_Result OpteeClientApiLibInitialize(void);
+
+#endif /*_OPTEE_CLIENT_APILIB_H_*/
diff --git a/include/optee_include/OpteeClientImage.h b/include/optee_include/OpteeClientImage.h
index d18928480a..e67142cefc 100644
--- a/include/optee_include/OpteeClientImage.h
+++ b/include/optee_include/OpteeClientImage.h
@@ -14,4 +14,5 @@
 	0xee3206cb, 0x950a, 0x49eb, \
 	{ 0xbd, 0xd7, 0xc1, 0x95, 0xcb, 0x9b, 0x2e, 0xbf } \
 }
+
 #endif
diff --git a/include/optee_include/OpteeClientMem.h b/include/optee_include/OpteeClientMem.h
index 2e4c877b36..ba85f829c3 100644
--- a/include/optee_include/OpteeClientMem.h
+++ b/include/optee_include/OpteeClientMem.h
@@ -4,6 +4,8 @@
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
+#ifndef _OPTEE_CLIENT_MEM_H_
+#define _OPTEE_CLIENT_MEM_H_
 
 #include <linux/types.h>
 
@@ -12,3 +14,5 @@ void OpteeClientMemInit(void);
 void *OpteeClientMemAlloc(uint32_t length);
 
 void  OpteeClientMemFree(void *mem);
+
+#endif /*_OPTEE_CLIENT_MEM_H_*/
diff --git a/include/optee_include/OpteeClientRPC.h b/include/optee_include/OpteeClientRPC.h
index 3efa427d37..b4a3574532 100644
--- a/include/optee_include/OpteeClientRPC.h
+++ b/include/optee_include/OpteeClientRPC.h
@@ -4,6 +4,9 @@
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
+#ifndef _OPTEE_CLIENT_RPC_H_
+#define _OPTEE_CLIENT_RPC_H_
+
 #include <optee_include/tee_base_types.h>
 #include <optee_include/OpteeClientApiLib.h>
 
@@ -51,3 +54,5 @@ typedef struct s_rpmb_back {
 } EFI_RK_RPMB_DATA_PACKET_BACK;
 
 TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs);
+
+#endif /*_OPTEE_CLIENT_RPC_H_*/
diff --git a/include/optee_include/OpteeClientSMC.h b/include/optee_include/OpteeClientSMC.h
index 2bbcbe9063..d8b8bb2e1f 100644
--- a/include/optee_include/OpteeClientSMC.h
+++ b/include/optee_include/OpteeClientSMC.h
@@ -4,6 +4,8 @@
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
+#ifndef _OPTEE_CLIENT_SMC_H_
+#define _OPTEE_CLIENT_SMC_H_
 
 #include <optee_include/tee_base_types.h>
 #include <optee_include/OpteeClientApiLib.h>
@@ -24,3 +26,5 @@ TEEC_Result TEEC_SMC_InvokeCommand(TEEC_Session *session,
 
 TEEC_Result TEEC_SMC_RequestCancellation(TEEC_Operation *operation,
 				uint32_t *error_origin);
+
+#endif /*_OPTEE_CLIENT_SMC_H_*/

commit 6ef445a4c243003c1d9d75deaca03b2435d8c109
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Mon Oct 30 17:13:46 2017 +0800

    lib: optee_client: add support for R&W efuse
    
    Change-Id: I8b06523c5379f253994c3ad89aa3b354d79b4c45
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/include/optee_include/OpteeClientInterface.h b/include/optee_include/OpteeClientInterface.h
index 00b3599ab2..0834ce3034 100644
--- a/include/optee_include/OpteeClientInterface.h
+++ b/include/optee_include/OpteeClientInterface.h
@@ -19,5 +19,7 @@ uint32_t trusty_write_flash_lock_state(uint8_t flash_lock_state);
 uint32_t write_to_keymaster
 	(uint8_t *filename, uint32_t filename_size,
 	uint8_t *data, uint32_t data_size);
+uint32_t trusty_read_attribute_hash(uint32_t *buf, uint32_t length);
+uint32_t trusty_write_attribute_hash(uint32_t *buf, uint32_t length);
 
 #endif
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index 382d3299f5..b998a2b480 100644
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -727,3 +727,110 @@ uint32_t write_to_keymaster(uint8_t *filename,
 
 	return TeecResult;
 }
+
+uint32_t trusty_read_attribute_hash(uint32_t *buf, uint32_t length)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+
+	TEEC_UUID tempuuid = { 0x2d26d8a8, 0x5134, 0x4dd8, \
+			{ 0xb3, 0x2f, 0xb3, 0x4b, 0xce, 0xeb, 0xc4, 0x71 } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				&TeecSession,
+				TeecUuid,
+				TEEC_LOGIN_PUBLIC,
+				NULL,
+				NULL,
+				&ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = length * sizeof(uint32_t);
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_OUTPUT,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					0,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	if (TeecResult == TEEC_SUCCESS)
+		memcpy(buf, SharedMem0.buffer, SharedMem0.size);
+
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_CloseSession(&TeecSession);
+	TEEC_FinalizeContext(&TeecContext);
+
+	return TeecResult;
+}
+
+uint32_t trusty_write_attribute_hash(uint32_t *buf, uint32_t length)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+
+	TEEC_UUID tempuuid = { 0x2d26d8a8, 0x5134, 0x4dd8, \
+			{ 0xb3, 0x2f, 0xb3, 0x4b, 0xce, 0xeb, 0xc4, 0x71 } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				&TeecSession,
+				TeecUuid,
+				TEEC_LOGIN_PUBLIC,
+				NULL,
+				NULL,
+				&ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = length * sizeof(uint32_t);
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	memcpy(SharedMem0.buffer, buf, SharedMem0.size);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					1,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_CloseSession(&TeecSession);
+	TEEC_FinalizeContext(&TeecContext);
+
+	return TeecResult;
+}

commit ae8ec5e1394c5d98dfa1830d00daa005945fdb8e
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Mon Oct 30 16:55:11 2017 +0800

    lib: optee_client: change file name
    
    change OpteeClientTest.c to OpteeClientInterface.c
    
    Change-Id: I68b32a2a4757af655bd4eaa723067f024ff112ef
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/cmd/mmc.c b/cmd/mmc.c
index ca3721d90f..94bd46f237 100644
--- a/cmd/mmc.c
+++ b/cmd/mmc.c
@@ -8,7 +8,7 @@
 #include <command.h>
 #include <console.h>
 #include <mmc.h>
-#include <optee_include/OpteeClientTest.h>
+#include <optee_include/OpteeClientInterface.h>
 #include <optee_include/OpteeClientApiLib.h>
 
 static int curr_device = -1;
diff --git a/include/optee_include/OpteeClientTest.h b/include/optee_include/OpteeClientInterface.h
similarity index 100%
rename from include/optee_include/OpteeClientTest.h
rename to include/optee_include/OpteeClientInterface.h
diff --git a/lib/avb/rk_libavb_user/avb_ops_user.c b/lib/avb/rk_libavb_user/avb_ops_user.c
index b8ae4763c9..962fcf5423 100644
--- a/lib/avb/rk_libavb_user/avb_ops_user.c
+++ b/lib/avb/rk_libavb_user/avb_ops_user.c
@@ -35,7 +35,7 @@
 #include <android_avb/avb_ops_user.h>
 #include <android_avb/libavb_ab.h>
 #include <android_avb/avb_atx_validate.h>
-#include <optee_include/OpteeClientTest.h>
+#include <optee_include/OpteeClientInterface.h>
 
 static void byte_to_block(int64_t *offset,
 			  size_t *num_bytes,
diff --git a/lib/optee_clientApi/Makefile b/lib/optee_clientApi/Makefile
index 0cc40a7c18..de8a3b4058 100644
--- a/lib/optee_clientApi/Makefile
+++ b/lib/optee_clientApi/Makefile
@@ -5,7 +5,7 @@
 
 obj-y += OpteeClientMem.o
 obj-y += OpteeClientApiLib.o
-obj-y += OpteeClientTest.o
+obj-y += OpteeClientInterface.o
 obj-y += OpteeClientSMC.o
 obj-y += OpteeClientRPC.o
 obj-y += tee_smc-arm64.o
diff --git a/lib/optee_clientApi/OpteeClientTest.c b/lib/optee_clientApi/OpteeClientInterface.c
similarity index 100%
rename from lib/optee_clientApi/OpteeClientTest.c
rename to lib/optee_clientApi/OpteeClientInterface.c

commit 4397fdfd14cb55940ebae2015cc9c276de87b475
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Oct 25 22:15:30 2017 +0800

    androidboot: modify do_avb_flow
    
    In the fuction do_avb_flow, the return value of
    avb_ab_flow() must be judged. If not, the process
    can not return to u-boot command line when execute
    avb_ab_flow failing.
    
    Change-Id: I925c9c63cee2153d365ea78b286d8958624b106c
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/cmd/boot_android.c b/cmd/boot_android.c
index 49ed44e2aa..27834bc73a 100644
--- a/cmd/boot_android.c
+++ b/cmd/boot_android.c
@@ -619,11 +619,15 @@ int do_avb_flow(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	verify_flag = argv[1][0];
 	if (verify_flag == 'v') {
 		debug("start with verify!\n");
-		avb_ab_flow(ops->ab_ops,
+		if (avb_ab_flow(ops->ab_ops,
 			    requested_partitions,
 			    flags,
 			    AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE,
-			    &slot_data);
+			    &slot_data)) {
+			printf("avb_ab_flow() error!\n");
+			return CMD_RET_FAILURE;
+		}
+
 		strcat(slot_partition[1], requested_partitions[1]);
 		strcat(slot_partition[1], slot_data->ab_suffix);
 		ops->get_unique_guid_for_partition(ops,

commit e7e0443e3e5110fc23a736a95a15b53156b9e69e
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Oct 12 16:55:49 2017 +0800

    avb: modify the function read_from_partition and write_to_partition
    
    There is no need to malloc a space if offset
    and num_bytes is multiple of 512 in function
    read_from_partition.
    
    The blk_dwrite in write_to_partition do not
    return 1 if execute success. So do not need
    to judge the return value.
    
    Change-Id: Icd5681815640e86166d05ab3fc74f95d669621c7
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/lib/avb/rk_libavb_user/avb_ops_user.c b/lib/avb/rk_libavb_user/avb_ops_user.c
index ac7d2263ca..b8ae4763c9 100644
--- a/lib/avb/rk_libavb_user/avb_ops_user.c
+++ b/lib/avb/rk_libavb_user/avb_ops_user.c
@@ -72,14 +72,12 @@ static AvbIOResult read_from_partition(AvbOps* ops,
                                        size_t* out_num_read)
 {
 	char *dev_iface = "mmc";
-	char *buffer_temp;
 	int dev_num = 0;
 	struct blk_desc *dev_desc;
 	lbaint_t offset_blk, blkcnt;
 	disk_partition_t part_info;
 
 	byte_to_block(&offset, &num_bytes, &offset_blk, &blkcnt);
-	buffer_temp = malloc(512 * blkcnt);
 	dev_desc = blk_get_dev(dev_iface, dev_num);
 	if (!dev_desc) {
 		printf("Could not find %s %d\n", dev_iface, dev_num);
@@ -95,11 +93,17 @@ static AvbIOResult read_from_partition(AvbOps* ops,
 		blk_dread(dev_desc, part_info.start + offset_blk, blkcnt, buffer);
 		*out_num_read = blkcnt * 512;
 	} else {
+		char *buffer_temp;
+		buffer_temp = malloc(512 * blkcnt);
+		if (buffer_temp == NULL) {
+			printf("malloc error!\n");
+			return -1;
+		}
 		blk_dread(dev_desc, part_info.start + offset_blk, blkcnt, buffer_temp);
 		memcpy(buffer, buffer_temp + (offset % 512), num_bytes);
 		*out_num_read = num_bytes;
+		free(buffer_temp);
 	}
-	free(buffer_temp);
 
 	return AVB_IO_RESULT_OK;
 }
@@ -119,8 +123,11 @@ static AvbIOResult write_to_partition(AvbOps* ops,
 
 	byte_to_block(&offset, &num_bytes, &offset_blk, &blkcnt);
 	buffer_temp = malloc(512 * blkcnt);
+	if (buffer_temp == NULL) {
+		printf("malloc error!\n");
+		return -1;
+	}
 	memset(buffer_temp, 0, 512 * blkcnt);
-
 	dev_desc = blk_get_dev(dev_iface, dev_num);
 	if (!dev_desc) {
 		printf("Could not find %s %d\n", dev_iface, dev_num);
@@ -135,11 +142,9 @@ static AvbIOResult write_to_partition(AvbOps* ops,
 	if ((offset % 512 != 0) && (num_bytes % 512) != 0) {
 		blk_dread(dev_desc, part_info.start + offset_blk, blkcnt, buffer_temp);
 	}
-	memcpy(buffer_temp, buffer + (offset % 512), num_bytes);
 
-	if(blk_dwrite(dev_desc, part_info.start + offset_blk, blkcnt, buffer) != 1){
-		printf("Can't write %s partition",partition);
-	}
+	memcpy(buffer_temp, buffer + (offset % 512), num_bytes);
+	blk_dwrite(dev_desc, part_info.start + offset_blk, blkcnt, buffer);
 	free(buffer_temp);
 
 	return AVB_IO_RESULT_OK;

commit d8bd6e971f5ff7304840323d055f644bd32e41be
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Oct 12 16:53:05 2017 +0800

    fastboot: add new fastboot cmd
    
    fastboot oem at-lock-vboot
    fastboot oem at-unlock-vboot
    fastboot oem at-disable-unlock-vboot
    
    Change-Id: Id2ae9c64abab271fdc4abe385a68e7f156916e05
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 9de1731947..9640d4f057 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -873,11 +873,44 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 	} else if (strncmp("at-set-ca-response", cmd + 4, 18) == 0) {
 		fastboot_tx_write_str("OKAY");
 	} else if (strncmp("at-lock-vboot", cmd + 4, 13) == 0) {
+#ifdef CONFIG_AVB_LIBAVB_USER
+		uint8_t lock_state;
+		lock_state = 0;
+		if (write_lock_state(lock_state))
+			fastboot_tx_write_str("FAIL");
+		else
+			fastboot_tx_write_str("OKAY");
+#else
 		fastboot_tx_write_str("FAILnot implemented");
+#endif
 	} else if (strncmp("at-unlock-vboot", cmd + 4, 15) == 0) {
+#ifdef CONFIG_AVB_LIBAVB_USER
+		uint8_t lock_state;
+		if (read_lock_state(&lock_state))
+			fastboot_tx_write_str("FAIL");
+		if (lock_state >> 1 == 1) {
+			fastboot_tx_write_str("FAILThe vboot is disable!");
+		} else {
+			lock_state = 1;
+			if (write_lock_state(lock_state))
+				fastboot_tx_write_str("FAIL");
+			else
+				fastboot_tx_write_str("OKAY");
+		}
+#else
 		fastboot_tx_write_str("FAILnot implemented");
+#endif
 	} else if (strncmp("at-disable-unlock-vboot", cmd + 4, 23) == 0) {
+#ifdef CONFIG_AVB_LIBAVB_USER
+		uint8_t lock_state;
+		lock_state = 2;
+		if (write_lock_state(lock_state))
+			fastboot_tx_write_str("FAIL");
+		else
+			fastboot_tx_write_str("OKAY");
+#else
 		fastboot_tx_write_str("FAILnot implemented");
+#endif
 	} else if (strncmp("fuse at-perm-attr", cmd + 4, 16) == 0) {
 #ifdef CONFIG_AVB_LIBAVB_USER
 		if (write_permanent_attributes((uint8_t *)

commit 5170bcddeccbefffbf722320ea2de32ea64f4b1f
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Oct 12 16:06:48 2017 +0800

    avb: provide read/write vboot state function for fastboot
    
    Change-Id: I197868d00a24719ce504a25fb81dc1577d2a214e
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/android_avb/avb_ops_user.h b/include/android_avb/avb_ops_user.h
index 4a1ef7cc89..c84539d0e3 100644
--- a/include/android_avb/avb_ops_user.h
+++ b/include/android_avb/avb_ops_user.h
@@ -16,5 +16,7 @@ int read_permanent_attributes(uint8_t *attributes, uint32_t size);
 int write_permanent_attributes(uint8_t *attributes, uint32_t size);
 int read_flash_lock_state(uint8_t *flash_lock_state);
 int write_flash_lock_state(uint8_t flash_lock_state);
+int read_lock_state(uint8_t *lock_state);
+int write_lock_state(uint8_t lock_state);
 
 #endif
diff --git a/lib/avb/rk_libavb_user/avb_ops_user.c b/lib/avb/rk_libavb_user/avb_ops_user.c
index 1a00a47947..ac7d2263ca 100644
--- a/lib/avb/rk_libavb_user/avb_ops_user.c
+++ b/lib/avb/rk_libavb_user/avb_ops_user.c
@@ -410,3 +410,17 @@ int write_flash_lock_state(uint8_t flash_lock_state)
 		return -1;
 	return 0;
 }
+
+int read_lock_state(uint8_t *lock_state)
+{
+	if (trusty_read_lock_state(lock_state))
+		return -1;
+	return 0;
+}
+
+int write_lock_state(uint8_t lock_state)
+{
+	if (trusty_write_lock_state(lock_state))
+		return -1;
+	return 0;
+}

commit 7bc1707d3f3ba59b12ea6ed915e47e2b1099cd2e
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Oct 12 15:13:28 2017 +0800

    fastboot: support fastboot flashing lock/unlock
    
    The new fastboot cmd add the lock/unlock state.
    If the device is lock, fastboot can not flash
    the device. The fastboot flash just can flash
    the device if the device is unlock.
    
    Change-Id: Ic1fb3a3c32c47f4c80e0e26c1b675b2d6a88c3f6
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 6d821eb1ee..9de1731947 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -776,7 +776,18 @@ static void cb_flash(struct usb_ep *ep, struct usb_request *req)
 {
 	char *cmd = req->buf;
 	char response[FASTBOOT_RESPONSE_LEN];
+#ifdef CONFIG_AVB_LIBAVB_USER
+	uint8_t flash_lock_state;
 
+	if (read_flash_lock_state(&flash_lock_state))
+		fastboot_tx_write_str("FAIL");
+		return;
+	if (flash_lock_state == 0) {
+		fastboot_tx_write_str("FAILThe device is locked, can not flash!");
+		printf("The device is locked, can not flash!\n");
+		return;
+	}
+#endif
 	strsep(&cmd, ":");
 	if (!cmd) {
 		error("missing partition name");
@@ -802,9 +813,27 @@ static void cb_flashing(struct usb_ep *ep, struct usb_request *req)
 	char *cmd = req->buf;
 
 	if (strncmp("lock", cmd + 9, 4) == 0) {
+#ifdef CONFIG_AVB_LIBAVB_USER
+		uint8_t flash_lock_state;
+		flash_lock_state = 0;
+		if (write_flash_lock_state(flash_lock_state))
+			fastboot_tx_write_str("FAIL");
+		else
+			fastboot_tx_write_str("OKAY");
+#else
 		fastboot_tx_write_str("FAILnot implemented");
+#endif
 	} else if (strncmp("unlock", cmd + 9, 6) == 0) {
+#ifdef CONFIG_AVB_LIBAVB_USER
+		uint8_t flash_lock_state;
+		flash_lock_state = 1;
+		if (write_flash_lock_state(flash_lock_state))
+			fastboot_tx_write_str("FAIL");
+		else
+			fastboot_tx_write_str("OKAY");
+#else
 		fastboot_tx_write_str("FAILnot implemented");
+#endif
 	} else if (strncmp("lock_critical", cmd + 9, 12) == 0) {
 		fastboot_tx_write_str("FAILnot implemented");
 	} else if (strncmp("unlock_critical", cmd + 9, 14) == 0) {

commit 023e4d551636cf1836ff99cae4af36db9b38556c
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Oct 12 14:50:37 2017 +0800

    avb: provide read-write flash_lock_state functions for fastboot
    
    Change-Id: Id6135c58416b0b914d2de8b5d911bf9eb02c5c60
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/android_avb/avb_ops_user.h b/include/android_avb/avb_ops_user.h
index c3b725fe9d..4a1ef7cc89 100644
--- a/include/android_avb/avb_ops_user.h
+++ b/include/android_avb/avb_ops_user.h
@@ -14,5 +14,7 @@ int set_slot_active(unsigned int *slot_number);
 int get_current_slot(char *select_slot);
 int read_permanent_attributes(uint8_t *attributes, uint32_t size);
 int write_permanent_attributes(uint8_t *attributes, uint32_t size);
+int read_flash_lock_state(uint8_t *flash_lock_state);
+int write_flash_lock_state(uint8_t flash_lock_state);
 
 #endif
diff --git a/lib/avb/rk_libavb_user/avb_ops_user.c b/lib/avb/rk_libavb_user/avb_ops_user.c
index 0f6df5ba32..1a00a47947 100644
--- a/lib/avb/rk_libavb_user/avb_ops_user.c
+++ b/lib/avb/rk_libavb_user/avb_ops_user.c
@@ -396,3 +396,17 @@ int write_permanent_attributes(uint8_t *attributes, uint32_t size)
 
 	return 0;
 }
+
+int read_flash_lock_state(uint8_t *flash_lock_state)
+{
+	if (trusty_read_flash_lock_state(flash_lock_state))
+		return -1;
+	return 0;
+}
+
+int write_flash_lock_state(uint8_t flash_lock_state)
+{
+	if (trusty_write_flash_lock_state(flash_lock_state))
+		return -1;
+	return 0;
+}

commit ccc0859168ef2fcf0d6253fd753539b5a3e0c84f
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Oct 12 14:45:33 2017 +0800

    tipc: add read/write flashing lock state
    
    The new fastboot cmd need to store the flashing
    lock state in order to prevent flash. And the state
    is stored in rpmb. So the tipc provide the functions
    to read/write the flash_lock_state.
    
    Change-Id: Idf6eb7de7aff1b3257fcd70d0fc87ac7634de4d0
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/optee_include/OpteeClientTest.h b/include/optee_include/OpteeClientTest.h
index e7e63ef042..00b3599ab2 100644
--- a/include/optee_include/OpteeClientTest.h
+++ b/include/optee_include/OpteeClientTest.h
@@ -4,6 +4,9 @@
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
+#ifndef _OPTEECLIENTTEST_H_
+#define _OPTEECLIENTTEST_H_
+
 void test_optee(void);
 uint32_t trusty_read_rollback_index(uint32_t slot, uint64_t *value);
 uint32_t trusty_write_rollback_index(uint32_t slot, uint64_t value);
@@ -11,6 +14,10 @@ uint32_t trusty_read_permanent_attributes(uint8_t *attributes, uint32_t size);
 uint32_t trusty_write_permanent_attributes(uint8_t *attributes, uint32_t size);
 uint32_t trusty_read_lock_state(uint8_t *lock_state);
 uint32_t trusty_write_lock_state(uint8_t lock_state);
+uint32_t trusty_read_flash_lock_state(uint8_t *flash_lock_state);
+uint32_t trusty_write_flash_lock_state(uint8_t flash_lock_state);
 uint32_t write_to_keymaster
 	(uint8_t *filename, uint32_t filename_size,
 	uint8_t *data, uint32_t data_size);
+
+#endif
diff --git a/lib/optee_clientApi/OpteeClientTest.c b/lib/optee_clientApi/OpteeClientTest.c
index 791ac3a361..382d3299f5 100644
--- a/lib/optee_clientApi/OpteeClientTest.c
+++ b/lib/optee_clientApi/OpteeClientTest.c
@@ -518,6 +518,143 @@ uint32_t trusty_write_lock_state(uint8_t lock_state)
 	return TeecResult;
 }
 
+uint32_t trusty_read_flash_lock_state(uint8_t *flash_lock_state)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	debug("testmm start\n");
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				&TeecSession,
+				TeecUuid,
+				TEEC_LOGIN_PUBLIC,
+				NULL,
+				NULL,
+				&ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = sizeof("flash_lock_state");
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	memcpy(SharedMem0.buffer, "flash_lock_state", SharedMem0.size);
+
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = 1;
+	SharedMem1.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						TEEC_MEMREF_TEMP_INOUT,
+						TEEC_NONE,
+						TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					0,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	memcpy(flash_lock_state, SharedMem1.buffer, SharedMem1.size);
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+	TEEC_CloseSession(&TeecSession);
+	TeecResult = TEEC_FinalizeContext(&TeecContext);
+	debug("testmm end\n");
+
+	return TeecResult;
+}
+
+
+uint32_t trusty_write_flash_lock_state(uint8_t flash_lock_state)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID  tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	debug("testmm start\n");
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				&TeecSession,
+				TeecUuid,
+				TEEC_LOGIN_PUBLIC,
+				NULL,
+				NULL,
+				&ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = sizeof("flash_lock_state");
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	memcpy(SharedMem0.buffer, "flash_lock_state", SharedMem0.size);
+
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = 1;
+	SharedMem1.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+
+	memcpy(SharedMem1.buffer, &flash_lock_state, SharedMem1.size);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						TEEC_MEMREF_TEMP_INOUT,
+						TEEC_NONE,
+						TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					1,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+	TEEC_CloseSession(&TeecSession);
+	TeecResult = TEEC_FinalizeContext(&TeecContext);
+	debug("testmm end\n");
+
+	return TeecResult;
+}
+
 uint32_t write_to_keymaster(uint8_t *filename,
 		uint32_t filename_size,
 		uint8_t *data,

commit 4f3cd37c6062b594801b5c2fe35d26a60c7a0219
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Oct 12 14:38:41 2017 +0800

    fastboot: support fastboot oem fuse at-perm-attr
    
    Change-Id: I82631a9edb69bd100bd676120fd07fbddbf34a2a
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 431e5fb3ff..6d821eb1ee 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -850,7 +850,16 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 	} else if (strncmp("at-disable-unlock-vboot", cmd + 4, 23) == 0) {
 		fastboot_tx_write_str("FAILnot implemented");
 	} else if (strncmp("fuse at-perm-attr", cmd + 4, 16) == 0) {
+#ifdef CONFIG_AVB_LIBAVB_USER
+		if (write_permanent_attributes((uint8_t *)
+					       CONFIG_FASTBOOT_BUF_ADDR,
+					       download_bytes))
+			fastboot_tx_write_str("FAIL");
+		else
+			fastboot_tx_write_str("OKAY");
+#else
 		fastboot_tx_write_str("FAILnot implemented");
+#endif
 	} else {
 		fastboot_tx_write_str("FAILunknown oem command");
 	}

commit b71a2499bf8d56899f589b25b8da9a32ec106f21
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Oct 12 14:29:51 2017 +0800

    avb: provide some functions used by fastboot
    
    In the avb process, the pub_key must be verified
    by some permanent attributes.The permanent attributes
    is written by fastboot. So the write_permanent_attributes
    function is provided to write permanent attributes.
    the read_permanent_attributes functions is provided to
    verified the data.
    
    Change-Id: Ib448c31062e34ce7f15fc32ab141793755bacf8a
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/android_avb/avb_ops_user.h b/include/android_avb/avb_ops_user.h
index e6247bf656..c3b725fe9d 100644
--- a/include/android_avb/avb_ops_user.h
+++ b/include/android_avb/avb_ops_user.h
@@ -12,5 +12,7 @@ int read_slot_count(char *slot_count);
 int read_slot_suffixes(char *slot_suffixes);
 int set_slot_active(unsigned int *slot_number);
 int get_current_slot(char *select_slot);
+int read_permanent_attributes(uint8_t *attributes, uint32_t size);
+int write_permanent_attributes(uint8_t *attributes, uint32_t size);
 
 #endif
diff --git a/lib/avb/rk_libavb_user/avb_ops_user.c b/lib/avb/rk_libavb_user/avb_ops_user.c
index d4954a6a93..0f6df5ba32 100644
--- a/lib/avb/rk_libavb_user/avb_ops_user.c
+++ b/lib/avb/rk_libavb_user/avb_ops_user.c
@@ -379,7 +379,20 @@ int get_current_slot(char *select_slot)
 	return 0;
 }
 
+int read_permanent_attributes(uint8_t *attributes, uint32_t size)
+{
+	if(trusty_read_permanent_attributes(attributes, size) != 0) {
+		return -1;
+	}
 
+	return 0;
+}
 
+int write_permanent_attributes(uint8_t *attributes, uint32_t size)
+{
+	if(trusty_write_permanent_attributes(attributes, size) != 0) {
+		return -1;
+	}
 
-
+	return 0;
+}

commit 367cce4d64c5c63186fe56f729d0f5a3ae353669
Author: Xu Hongfei <xuhf@rock-chips.com>
Date:   Mon Sep 11 19:31:12 2017 +0800

    fastboot: add some new functions
    
    1.add the support of 'set_active' command
    2.add the support of 'get_staged' command
    3.parse the command of 'oem' and 'flashing'
    
    Change-Id: Ib890a938adfb65f537f5e1e2d5ae8055cc99073c
    Signed-off-by: Xu Hongfei <xuhf@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index a5c460b999..431e5fb3ff 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -21,6 +21,7 @@
 #include <linux/compiler.h>
 #include <version.h>
 #include <g_dnl.h>
+#include <android_avb/avb_ops_user.h>
 #ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV
 #include <fb_mmc.h>
 #endif
@@ -61,6 +62,9 @@ static inline struct f_fastboot *func_to_fastboot(struct usb_function *f)
 static struct f_fastboot *fastboot_func;
 static unsigned int download_size;
 static unsigned int download_bytes;
+static unsigned int upload_size;
+static unsigned int upload_bytes;
+static bool start_upload;
 
 static struct usb_endpoint_descriptor fs_ep_in = {
 	.bLength            = USB_DT_ENDPOINT_SIZE,
@@ -416,6 +420,98 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req)
 			strncat(response, s, chars_left);
 		else
 			strcpy(response, "FAILValue not set");
+	} else if (strncmp("at-attest-dh", cmd, 12) == 0) {
+		char dh[32] = {0};
+
+		strncat(response, dh, chars_left);
+	} else if (strncmp("at-attest-uuid", cmd, 14) == 0) {
+		char uuid[32] = {0};
+
+		strncat(response, uuid, chars_left);
+	} else if (strncmp("at-vboot-state", cmd, 14) == 0) {
+		char uuid[32] = {0};
+
+		strncat(response, uuid, chars_left);
+	} else if (!strcmp_l1("slot-count", cmd)) {
+#ifdef CONFIG_AVB_LIBAVB_USER
+		char slot_count[2];
+		char temp;
+
+		slot_count[1] = '\0';
+		read_slot_count(&temp);
+		slot_count[0] = temp + 0x30;
+		strncat(response, slot_count, chars_left);
+#else
+		fastboot_tx_write_str("FAILnot implemented");
+		return;
+#endif
+	} else if (!strcmp_l1("current-slot", cmd)) {
+#ifdef CONFIG_AVB_LIBAVB_USER
+		char slot_surrent[8] = {0};
+
+		if (!get_current_slot(slot_surrent))
+			strncat(response, slot_surrent, chars_left);
+		else
+			strcpy(response, "FAILgeterror");
+#else
+		fastboot_tx_write_str("FAILnot implemented");
+		return;
+#endif
+	} else if (!strcmp_l1("slot-suffixes", cmd)) {
+#ifdef CONFIG_AVB_LIBAVB_USER
+		char slot_suffixes_temp[4];
+		char slot_suffixes[9];
+		int slot_cnt = 0;
+
+		memset(slot_suffixes_temp, 0, 4);
+		memset(slot_suffixes, 0, 9);
+		read_slot_suffixes(slot_suffixes_temp);
+		while (slot_suffixes_temp[slot_cnt] != '\0') {
+			slot_suffixes[slot_cnt * 2]
+				= slot_suffixes_temp[slot_cnt];
+			slot_suffixes[slot_cnt * 2 + 1] = ',';
+			slot_cnt++;
+		}
+		strncat(response, slot_suffixes, chars_left);
+#else
+		fastboot_tx_write_str("FAILnot implemented");
+		return;
+#endif
+	} else if (!strncmp("has-slot", cmd, 8)) {
+#ifdef CONFIG_AVB_LIBAVB_USER
+		char *part_name = cmd;
+
+		cmd = strsep(&part_name, ":");
+		if (!strcmp(part_name, "boot") ||
+		    !strcmp(part_name, "system") ||
+		    !strcmp(part_name, "boot")) {
+			strncat(response, "yes", chars_left);
+		} else {
+			strcpy(response, "FAILno");
+		}
+#else
+		fastboot_tx_write_str("FAILnot implemented");
+		return;
+#endif
+	} else if (!strncmp("partition-type", cmd, 14) ||
+		   !strncmp("partition-size", cmd, 14)) {
+		disk_partition_t part_info;
+		struct blk_desc *dev_desc;
+		char *part_name = cmd;
+		char part_size_str[20];
+
+		cmd = strsep(&part_name, ":");
+		dev_desc = blk_get_dev("mmc", 0);
+		if (!dev_desc) {
+			strcpy(response, "FAILblock device not found");
+		} else if (part_get_info_by_name(dev_desc, part_name, &part_info) < 0) {
+			strcpy(response, "FAILpartition not found");
+		} else if (!strncmp("partition-type", cmd, 14)) {
+			strncat(response, (char *)part_info.type, chars_left);
+		} else if (!strncmp("partition-size", cmd, 14)) {
+			sprintf(part_size_str, "0x%016x", (int)part_info.size);
+			strncat(response, part_size_str, chars_left);
+		}
 	} else {
 		char *envstr;
 
@@ -536,6 +632,78 @@ static void cb_download(struct usb_ep *ep, struct usb_request *req)
 		req->complete = rx_handler_dl_image;
 		req->length = rx_bytes_expected(ep);
 	}
+
+	fastboot_tx_write_str(response);
+}
+
+static void tx_handler_ul(struct usb_ep *ep, struct usb_request *req)
+{
+	unsigned int xfer_size = 0;
+	unsigned int pre_dot_num, now_dot_num;
+	unsigned int remain_size = 0;
+	unsigned int transferred_size = req->actual;
+
+	if (req->status != 0) {
+		printf("Bad status: %d\n", req->status);
+		return;
+	}
+
+	if (start_upload) {
+		pre_dot_num = upload_bytes / BYTES_PER_DOT;
+		upload_bytes += transferred_size;
+		now_dot_num = upload_bytes / BYTES_PER_DOT;
+
+		if (pre_dot_num != now_dot_num) {
+			putc('.');
+			if (!(now_dot_num % 74))
+				putc('\n');
+		}
+	}
+
+	remain_size = upload_size - upload_bytes;
+	xfer_size = (remain_size > EP_BUFFER_SIZE) ?
+		    EP_BUFFER_SIZE : remain_size;
+
+	debug("%s: remain_size=%d, transferred_size=%d",
+	      __func__, remain_size, transferred_size);
+	debug("xfer_size=%d, upload_bytes=%d, upload_size=%d!\n",
+	      xfer_size, upload_bytes, upload_size);
+
+	if (remain_size <= 0) {
+		fastboot_func->in_req->complete = fastboot_complete;
+		fastboot_tx_write_str("OKAY");
+		printf("\nuploading of %d bytes finished\n", upload_bytes);
+		upload_bytes = 0;
+		upload_size = 0;
+		start_upload = false;
+		return;
+	}
+
+	/* Remove the transfer callback which response the upload */
+	/* request from host */
+	if (!upload_bytes)
+		start_upload = true;
+
+	fastboot_tx_write((char *)(CONFIG_FASTBOOT_BUF_ADDR + upload_bytes),
+			  xfer_size);
+}
+
+static void cb_upload(struct usb_ep *ep, struct usb_request *req)
+{
+	char response[FASTBOOT_RESPONSE_LEN];
+
+	upload_size = download_bytes;
+
+	printf("Starting upload of %d bytes\n", upload_size);
+
+	if (0 == upload_size) {
+		strcpy(response, "FAILdata invalid size");
+	} else {
+		start_upload = false;
+		sprintf(response, "DATA%08x", upload_size);
+		fastboot_func->in_req->complete = tx_handler_ul;
+	}
+
 	fastboot_tx_write_str(response);
 }
 
@@ -570,6 +738,39 @@ static void cb_continue(struct usb_ep *ep, struct usb_request *req)
 	fastboot_tx_write_str("OKAY");
 }
 
+static void cb_set_active(struct usb_ep *ep, struct usb_request *req)
+{
+	char *cmd = req->buf;
+
+	debug("%s: %s\n", __func__, cmd);
+
+	strsep(&cmd, ":");
+	if (!cmd) {
+		error("missing slot name");
+		fastboot_tx_write_str("FAIL: missing slot name");
+		return;
+	}
+#ifdef CONFIG_AVB_LIBAVB_USER
+	unsigned int slot_number;
+	if (strncmp("a", cmd, 1) == 0) {
+		slot_number = 0;
+		set_slot_active(&slot_number);
+	} else if (strncmp("b", cmd, 1) == 0) {
+		slot_number = 1;
+		set_slot_active(&slot_number);
+	} else {
+		fastboot_tx_write_str("FAIL: unkown slot name");
+		return;
+	}
+
+	fastboot_tx_write_str("OKAY");
+	return;
+#else
+	fastboot_tx_write_str("FAILnot implemented");
+	return;
+#endif
+}
+
 #ifdef CONFIG_FASTBOOT_FLASH
 static void cb_flash(struct usb_ep *ep, struct usb_request *req)
 {
@@ -596,9 +797,35 @@ static void cb_flash(struct usb_ep *ep, struct usb_request *req)
 }
 #endif
 
+static void cb_flashing(struct usb_ep *ep, struct usb_request *req)
+{
+	char *cmd = req->buf;
+
+	if (strncmp("lock", cmd + 9, 4) == 0) {
+		fastboot_tx_write_str("FAILnot implemented");
+	} else if (strncmp("unlock", cmd + 9, 6) == 0) {
+		fastboot_tx_write_str("FAILnot implemented");
+	} else if (strncmp("lock_critical", cmd + 9, 12) == 0) {
+		fastboot_tx_write_str("FAILnot implemented");
+	} else if (strncmp("unlock_critical", cmd + 9, 14) == 0) {
+		fastboot_tx_write_str("FAILnot implemented");
+	} else if (strncmp("get_unlock_ability", cmd + 9, 17) == 0) {
+		fastboot_tx_write_str("FAILnot implemented");
+	} else if (strncmp("get_unlock_bootloader_nonce", cmd + 4, 27) == 0) {
+		fastboot_tx_write_str("FAILnot implemented");
+	} else if (strncmp("unlock_bootloader", cmd + 9, 17) == 0) {
+		fastboot_tx_write_str("FAILnot implemented");
+	} else if (strncmp("lock_bootloader", cmd + 9, 15) == 0) {
+		fastboot_tx_write_str("FAILnot implemented");
+	} else {
+		fastboot_tx_write_str("FAILunknown flashing command");
+	}
+}
+
 static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 {
 	char *cmd = req->buf;
+
 #ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV
 	if (strncmp("format", cmd + 4, 6) == 0) {
 		char cmdbuf[32];
@@ -612,8 +839,19 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 #endif
 	if (strncmp("unlock", cmd + 4, 8) == 0) {
 		fastboot_tx_write_str("FAILnot implemented");
-	}
-	else {
+	} else if (strncmp("at-get-ca-request", cmd + 4, 17) == 0) {
+		fastboot_tx_write_str("OKAY");
+	} else if (strncmp("at-set-ca-response", cmd + 4, 18) == 0) {
+		fastboot_tx_write_str("OKAY");
+	} else if (strncmp("at-lock-vboot", cmd + 4, 13) == 0) {
+		fastboot_tx_write_str("FAILnot implemented");
+	} else if (strncmp("at-unlock-vboot", cmd + 4, 15) == 0) {
+		fastboot_tx_write_str("FAILnot implemented");
+	} else if (strncmp("at-disable-unlock-vboot", cmd + 4, 23) == 0) {
+		fastboot_tx_write_str("FAILnot implemented");
+	} else if (strncmp("fuse at-perm-attr", cmd + 4, 16) == 0) {
+		fastboot_tx_write_str("FAILnot implemented");
+	} else {
 		fastboot_tx_write_str("FAILunknown oem command");
 	}
 }
@@ -657,14 +895,24 @@ static const struct cmd_dispatch_info cmd_dispatch_info[] = {
 	}, {
 		.cmd = "download:",
 		.cb = cb_download,
+	}, {
+		.cmd = "upload",
+		.cb = cb_upload,
 	}, {
 		.cmd = "boot",
 		.cb = cb_boot,
 	}, {
 		.cmd = "continue",
 		.cb = cb_continue,
+	}, {
+		.cmd = "set_active",
+		.cb = cb_set_active,
 	},
 #ifdef CONFIG_FASTBOOT_FLASH
+	{
+		.cmd = "flashing",
+		.cb = cb_flashing,
+	},
 	{
 		.cmd = "flash",
 		.cb = cb_flash,

commit aa8829ac3748e8f11247872e028bf8107f59fd1a
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Oct 13 09:05:25 2017 +0800

    rockchip: dts: add 4GB ddr3 support for rk3399
    
    Change-Id: Ib268f96cc82e8e885c3554786d14c4b78881dfd8
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3399-sdram-ddr3-4G-1600.dtsi b/arch/arm/dts/rk3399-sdram-ddr3-4G-1600.dtsi
new file mode 100644
index 0000000000..745e2a5f2e
--- /dev/null
+++ b/arch/arm/dts/rk3399-sdram-ddr3-4G-1600.dtsi
@@ -0,0 +1,1536 @@
+/*
+ * (C) 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+&dmc {
+        rockchip,sdram-params = <
+		0x2
+		0xa
+		0x3
+		0x2
+		0x1
+		0x0
+		0xf
+		0xf
+		1
+		0x80151015
+		0x14040902
+		0x00000002
+		0x00006346
+		0x0000004c
+		0x00000000
+		0x2
+		0xa
+		0x3
+		0x2
+		0x1
+		0x0
+		0xf
+		0xf
+		1
+		0x80151015
+		0x14040902
+		0x00000002
+		0x00006346
+		0x0000004c
+		0x00000000
+		800
+		3
+		2
+		0xd
+		1
+		0x00000600
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000008
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000008
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000008
+		0x00000000
+		0x00000000
+		0x01000000
+		0x00000000
+		0x00000101
+		0x00020100
+		0x00027100
+		0x00061a80
+		0x02000200
+		0x08160200
+		0x00081600
+		0x04000816
+		0x26050004
+		0x1c0b061c
+		0x1c260500
+		0x001c0b06
+		0x061c2605
+		0x06001c0b
+		0x00000c04
+		0x0400db60
+		0x0c040605
+		0x0400db60
+		0x0c040605
+		0x0400db60
+		0x02030005
+		0x0b0c0b00
+		0x000c0b0c
+		0x14000a0a
+		0x00000a0a
+		0x00010000
+		0x03171717
+		0x000b0b0b
+		0x00000000
+		0x03010000
+		0x18580118
+		0x18580118
+		0x18580118
+		0x00000000
+		0x00050005
+		0x00140005
+		0x00140014
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x02000000
+		0x02000120
+		0x02000120
+		0x00000120
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000301
+		0x00000001
+		0x00000000
+		0x00000000
+		0x01000000
+		0x80104002
+		0x00040003
+		0x00040005
+		0x00030000
+		0x00050004
+		0x00000004
+		0x00040003
+		0x00040005
+		0x61600000
+		0x000030b0
+		0x30b06160
+		0x61600000
+		0x000030b0
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x08080800
+		0x00080808
+		0x00030200
+		0x00040700
+		0x00000302
+		0x02000407
+		0x00000003
+		0x00030f04
+		0x00070004
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00010000
+		0x00010000
+		0x20040020
+		0x00200400
+		0x01000400
+		0x00000b80
+		0x00000000
+		0x00000001
+		0x00000002
+		0x0000000e
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00a00000
+		0x00c80050
+		0x00c80000
+		0x005000a0
+		0x000000c8
+		0x00a000c8
+		0x00c80050
+		0x00c80000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00420c70
+		0x0c700018
+		0x00180042
+		0x00420c70
+		0x00000018
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00420c70
+		0x0c700018
+		0x00180042
+		0x00420c70
+		0x00000018
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x01000000
+		0x00000000
+		0x00000000
+		0x18151100
+		0x0000000c
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00020003
+		0x00400100
+		0x00000000
+		0x01000200
+		0x00000040
+		0x00020000
+		0x00400100
+		0x00000000
+		0x00000000
+		0x00000000
+		0x01010100
+		0x00000202
+		0x0a000001
+		0x01000f0f
+		0x00000000
+		0x00000000
+		0x00010003
+		0x00000c03
+		0x00000000
+		0x00000000
+		0x01000000
+		0x00010000
+		0x00000001
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+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
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+		0x00000000
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+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
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+		0x00000000
+		0x00000000
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+		0x00000000
+		0x00000000
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+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00800000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00400320
+		0x00000040
+		0x00000000
+		0x00000000
+		0x00000000
+		0x01000000
+		0x00020003
+		0x00000000
+		0x00000000
+		0x00000000
+		0x0000002a
+		0x00000015
+		0x00000015
+		0x0000002a
+		0x00000033
+		0x0000000c
+		0x0000000c
+		0x00000033
+		0x16a4a0e6
+		0x103f0000
+		0x0000003f
+		0x00030055
+		0x03000300
+		0x03000300
+		0x00000300
+		0x42080010
+		0x00000003
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00800000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00400320
+		0x00000040
+		0x00000000
+		0x00000000
+		0x00000000
+		0x01000000
+		0x00020003
+		0x00000000
+		0x00000000
+		0x00000000
+		0x0000002a
+		0x00000015
+		0x00000015
+		0x0000002a
+		0x00000033
+		0x0000000c
+		0x0000000c
+		0x00000033
+		0x1ee6b16a
+		0x103f0000
+		0x0000003f
+		0x00030055
+		0x03000300
+		0x03000300
+		0x00000300
+		0x42080010
+		0x00000003
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000001
+		0x00000000
+		0x01000005
+		0x04000f00
+		0x00020040
+		0x00020055
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00010100
+		0x00000601
+		0x00000000
+		0x00006400
+		0x01221102
+		0x00000000
+		0x00031f00
+		0x031f031f
+		0x031f031f
+		0x00030003
+		0x03000300
+		0x00000300
+		0x01221102
+		0x00000000
+		0x00000000
+		0x03020000
+		0x00000001
+		0x00008011
+		0x00000011
+		0x00000440
+		0x00000040
+		0x00004011
+		0x00004011
+		0x00004410
+		0x00004410
+		0x00004410
+		0x00004410
+		0x00004410
+		0x00004011
+		0x00004410
+		0x00004011
+		0x00004410
+		0x00004011
+		0x00004410
+		0x00000000
+		0x00000000
+		0x00000000
+		0x04000000
+		0x00000000
+		0x00000000
+		0x00000508
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0xe4000000
+		0x00000000
+		0x00000000
+		0x01010000
+		0x00000000
+	>;
+};

commit 99e29a1e831319b7af621cf13ab45f58a3158e97
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Oct 12 14:49:29 2017 +0800

    rockchip: rk3399-evb: add boot order for SPL
    
    add boot order for rk3399 evb/excavator/sapphire borad.
    
    Change-Id: I97c17a96e2a79fc3cc2b97f1a2b23bfb4e35c6a4
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts
index 0e5d8d79a1..a0ea589015 100644
--- a/arch/arm/dts/rk3399-evb.dts
+++ b/arch/arm/dts/rk3399-evb.dts
@@ -17,6 +17,7 @@
 
 	chosen {
 		stdout-path = &uart2;
+		u-boot,spl-boot-order = &sdhci, &sdmmc;
 	};
 
 	vdd_center: vdd-center {

commit f0864c7f9d9e35368339ead29f68dc800219673d
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Sep 20 15:24:54 2017 +0800

    androidboot: init slot_partition
    
    Change-Id: I1be603307523d245ef8961815a0df38786366d0d
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/cmd/boot_android.c b/cmd/boot_android.c
index aac7563692..49ed44e2aa 100644
--- a/cmd/boot_android.c
+++ b/cmd/boot_android.c
@@ -581,7 +581,7 @@ int do_avb_verify_partition(cmd_tbl_t *cmdtp, int flag,
 
 int do_avb_flow(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
-	char slot_partition[2][20];
+	char slot_partition[2][20] = {{0}, {0}};
 	unsigned long load_address;
 	AvbOps *ops;
 	const char *avb_version;

commit e8e29e8d8b70fc092891ebc18d0488d061d26c38
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Sep 18 09:37:32 2017 +0800

    androidboot: add new android boot cmds with avb.
    
    The android things boot must have avb function,
    then we add the fuction in file cmd/boot_android.c.
    In boot_android.c, we add bootavb flow v/n to
    bootload android system.
    
    The bootavb flow v bootload android system
    with avb.And bootavb flow n bootload android
    system as usual.
    
    Change-Id: I3064f8a4aebf2b4bfdb0cf6f0458f42438c27027
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/cmd/boot_android.c b/cmd/boot_android.c
index 0da6a7d056..aac7563692 100644
--- a/cmd/boot_android.c
+++ b/cmd/boot_android.c
@@ -5,8 +5,13 @@
  */
 
 #include <android_bootloader.h>
+#include <android_avb/avb_version.h>
+#include <android_avb/avb_ab_flow.h>
+#include <android_avb/avb_ops_user.h>
 #include <android_cmds.h>
+#include <malloc.h>
 #include <common.h>
+#include <bootm.h>
 #include <command.h>
 
 static int do_boot_android(cmd_tbl_t *cmdtp, int flag, int argc,
@@ -67,3 +72,671 @@ U_BOOT_CMD(
 	"      partition name whose label is 'part_name' will be looked up in\n"
 	"      the partition table. This is commonly the \"misc\" partition.\n"
 );
+
+#ifdef CONFIG_AVB_LIBAVB_USER
+int do_avb_init_ab_metadata(cmd_tbl_t *cmdtp, int flag,
+			    int argc, char * const argv[])
+{
+	AvbOps *ops;
+	AvbABData ab_data;
+
+	memset(&ab_data, 0, sizeof(AvbABData));
+	debug("sizeof(AvbABData) = %d\n", sizeof(AvbABData));
+	if (argc != 1)
+		return CMD_RET_USAGE;
+
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return CMD_RET_FAILURE;
+	}
+
+	ops->ab_ops->init_ab_metadata(&ab_data);
+	debug("init");
+	if (ops->ab_ops->write_ab_metadata(ops->ab_ops, &ab_data) != 0) {
+		printf("do_avb_init_ab_metadata error!\n");
+		avb_ops_user_free(ops);
+		return CMD_RET_FAILURE;
+	}
+
+	avb_ops_user_free(ops);
+
+	return CMD_RET_SUCCESS;
+}
+
+int do_avb_version(cmd_tbl_t *cmdtp, int flag, int argc,
+		   char * const argv[])
+{
+	const char *avb_version;
+
+	if (argc != 1)
+		return CMD_RET_USAGE;
+
+	avb_version = avb_version_string();
+	printf("Android avb version is %s.\n", avb_version);
+
+	return CMD_RET_SUCCESS;
+}
+
+int do_avb_ab_mark_slot_active(cmd_tbl_t *cmdtp, int flag,
+			       int argc, char * const argv[])
+{
+	AvbOps *ops;
+	unsigned int slot_number;
+
+	if (argc != 2)
+		return CMD_RET_USAGE;
+
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return CMD_RET_FAILURE;
+	}
+
+	slot_number = simple_strtoul(argv[1], NULL, 16);
+	if (avb_ab_mark_slot_active(ops->ab_ops, slot_number) != 0) {
+		printf("avb_ab_mark_slot_active error!\n");
+		avb_ops_user_free(ops);
+		return CMD_RET_FAILURE;
+	}
+
+	avb_ops_user_free(ops);
+
+	return CMD_RET_SUCCESS;
+}
+
+int do_avb_ab_mark_slot_unbootable(cmd_tbl_t *cmdtp, int flag,
+				   int argc, char * const argv[])
+{
+	AvbOps *ops;
+	unsigned int slot_number;
+
+	if (argc != 2)
+		return CMD_RET_USAGE;
+
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return CMD_RET_FAILURE;
+	}
+
+	slot_number = simple_strtoul(argv[1], NULL, 16);
+	if (avb_ab_mark_slot_unbootable(ops->ab_ops, slot_number) != 0) {
+		printf("do_avb_ab_mark_slot_unbootable error!\n");
+		avb_ops_user_free(ops);
+		return CMD_RET_FAILURE;
+	}
+
+	avb_ops_user_free(ops);
+
+	return CMD_RET_SUCCESS;
+}
+
+int do_avb_ab_mark_slot_successful(cmd_tbl_t *cmdtp, int flag,
+				   int argc, char * const argv[])
+{
+	AvbOps *ops;
+	unsigned int slot_number;
+
+	if (argc != 2)
+		return CMD_RET_USAGE;
+
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return CMD_RET_FAILURE;
+	}
+
+	slot_number = simple_strtoul(argv[1], NULL, 16);
+	if (avb_ab_mark_slot_successful(ops->ab_ops, slot_number) != 0) {
+		printf("do_avb_ab_mark_slot_successful error!\n");
+		avb_ops_user_free(ops);
+		return CMD_RET_FAILURE;
+	}
+
+	avb_ops_user_free(ops);
+
+	return CMD_RET_SUCCESS;
+}
+
+int do_avb_read_rollback_index(cmd_tbl_t *cmdtp, int flag,
+			       int argc, char * const argv[])
+{
+	AvbOps *ops;
+	uint64_t out_rollback_index;
+	size_t rollback_index_location;
+
+	if (argc != 2)
+		return CMD_RET_USAGE;
+
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return CMD_RET_FAILURE;
+	}
+
+	rollback_index_location = simple_strtoul(argv[1], NULL, 16);
+	if (ops->read_rollback_index(ops, rollback_index_location,
+				     &out_rollback_index) != 0) {
+		printf("do_avb_read_rollback_index error!\n");
+		avb_ops_user_free(ops);
+		return CMD_RET_FAILURE;
+	}
+
+	printf("out_rollback_index = %llx\n", out_rollback_index);
+	avb_ops_user_free(ops);
+
+	return CMD_RET_SUCCESS;
+}
+
+int do_avb_write_rollback_index(cmd_tbl_t *cmdtp, int flag,
+				int argc, char * const argv[])
+{
+	AvbOps *ops;
+	uint64_t out_rollback_index;
+	size_t rollback_index_location;
+
+	if (argc != 3)
+		return CMD_RET_USAGE;
+
+	rollback_index_location = simple_strtoul(argv[1], NULL, 16);
+	out_rollback_index = simple_strtoull(argv[2], NULL, 16);
+	debug("out_rollback_index = %llx\n", out_rollback_index);
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return CMD_RET_FAILURE;
+	}
+
+	if (ops->write_rollback_index(ops, rollback_index_location,
+				      out_rollback_index) != 0) {
+		printf("do_avb_write_rollback_index error!\n");
+		avb_ops_user_free(ops);
+		return CMD_RET_FAILURE;
+	}
+
+	avb_ops_user_free(ops);
+
+	return CMD_RET_SUCCESS;
+}
+
+int do_avb_read_is_device_unlocked(cmd_tbl_t *cmdtp, int flag,
+				   int argc, char * const argv[])
+{
+	AvbOps *ops;
+	bool out_is_unlocked;
+
+	if (argc != 1)
+		return CMD_RET_USAGE;
+
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return CMD_RET_FAILURE;
+	}
+
+	if (ops->read_is_device_unlocked(ops, &out_is_unlocked) != 0) {
+		printf("do_avb_read_is_device_unlocked error!\n");
+		avb_ops_user_free(ops);
+		return CMD_RET_FAILURE;
+	}
+
+	debug("out_is_unlocked = %d\n", out_is_unlocked);
+	avb_ops_user_free(ops);
+
+	return CMD_RET_SUCCESS;
+}
+int do_avb_write_is_device_unlocked(cmd_tbl_t *cmdtp, int flag,
+				    int argc, char * const argv[])
+{
+	AvbOps *ops;
+	bool out_is_unlocked;
+
+	if (argc != 2)
+		return CMD_RET_USAGE;
+
+	out_is_unlocked = simple_strtoul(argv[1], NULL, 16);
+	if ((out_is_unlocked != 0) || (out_is_unlocked != 1))
+		printf("enter out_is_unlocked value must is '0' or '1'\n");
+
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return CMD_RET_FAILURE;
+	}
+
+	if (ops->write_is_device_unlocked(ops, &out_is_unlocked) != 0) {
+		printf("do_avb_write_is_device_unlocked error!\n");
+		avb_ops_user_free(ops);
+		return CMD_RET_FAILURE;
+	}
+
+	debug("out_is_unlocked = %d\n", out_is_unlocked);
+	avb_ops_user_free(ops);
+
+	return CMD_RET_SUCCESS;
+}
+
+int do_avb_get_size_of_partition(cmd_tbl_t *cmdtp, int flag,
+				 int argc, char * const argv[])
+{
+	AvbOps *ops;
+	char *requested_partitions;
+	uint64_t out_size_in_bytes;
+
+	if (argc != 2)
+		return CMD_RET_USAGE;
+
+	requested_partitions = argv[1];
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return CMD_RET_FAILURE;
+	}
+
+	if (ops->get_size_of_partition(ops, requested_partitions,
+				       &out_size_in_bytes) != 0) {
+		printf("do_avb_get_size_of_partition error!\n");
+		avb_ops_user_free(ops);
+		return CMD_RET_FAILURE;
+	}
+
+	printf("partition size = %lld\n", out_size_in_bytes);
+	avb_ops_user_free(ops);
+
+	return CMD_RET_SUCCESS;
+}
+
+int do_avb_get_get_unique_guid_for_partition(cmd_tbl_t *cmdtp, int flag,
+					     int argc, char * const argv[])
+{
+	AvbOps *ops;
+	char *requested_partitions;
+	size_t guid_buf_size = 37;
+	char guid_buf[37];
+
+	if (argc != 2)
+		return CMD_RET_USAGE;
+
+	requested_partitions = argv[1];
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return CMD_RET_FAILURE;
+	}
+
+	if (ops->get_unique_guid_for_partition(ops, requested_partitions,
+					       guid_buf, guid_buf_size) != 0) {
+		printf("do_avb_get_get_unique_guid_for_partition error!\n");
+		avb_ops_user_free(ops);
+		return CMD_RET_FAILURE;
+	}
+
+	printf("guid = %s\n", guid_buf);
+	avb_ops_user_free(ops);
+
+	return CMD_RET_SUCCESS;
+}
+
+int do_avb_read(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+	AvbOps *ops;
+	char *requested_partitions;
+	int64_t offset_blk;
+	size_t blkcnt;
+	size_t out_num_read;
+	int i;
+	char *buffer;
+
+	if (argc != 4)
+		return CMD_RET_USAGE;
+
+	requested_partitions = argv[1];
+	offset_blk = simple_strtoul(argv[2], NULL, 16);
+	blkcnt = simple_strtoul(argv[3], NULL, 16);
+	ops = avb_ops_user_new();
+	buffer = (char *)malloc(blkcnt * 512);
+	if (buffer == NULL)
+		printf("malloc buffer failed!\n");
+
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return CMD_RET_FAILURE;
+	}
+
+	if (ops->read_from_partition(ops, requested_partitions,
+				     offset_blk, blkcnt, buffer,
+				     &out_num_read) != 0) {
+		printf("do avb read error!\n");
+		free(buffer);
+		avb_ops_user_free(ops);
+		return CMD_RET_FAILURE;
+	}
+
+	for (i = 0; i < 512 * blkcnt; i++)
+		printf("buffer %d = %d\n", i, buffer[i]);
+
+	free(buffer);
+	avb_ops_user_free(ops);
+
+	return CMD_RET_SUCCESS;
+}
+
+int do_avb_write(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+	AvbOps *ops;
+	char *requested_partitions;
+	int64_t offset_blk;
+	size_t blkcnt;
+	size_t out_num_read;
+	char *buffer;
+
+	if (argc != 4)
+		return CMD_RET_USAGE;
+
+	requested_partitions = argv[1];
+	offset_blk = simple_strtoul(argv[2], NULL, 16);
+	blkcnt = simple_strtoul(argv[3], NULL, 16);
+	ops = avb_ops_user_new();
+	buffer = (char *)malloc(blkcnt * 512);
+	if (buffer == NULL) {
+		printf("malloc buffer failed!\n");
+		return CMD_RET_FAILURE;
+	}
+
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return CMD_RET_FAILURE;
+	}
+	if (ops->read_from_partition(ops, requested_partitions, offset_blk,
+				     blkcnt, buffer, &out_num_read) != 0) {
+		printf("do_avb_write error!\n");
+		free(buffer);
+		avb_ops_user_free(ops);
+		return CMD_RET_FAILURE;
+	}
+
+	free(buffer);
+	avb_ops_user_free(ops);
+
+	return CMD_RET_SUCCESS;
+}
+
+int do_avb_load_ab_metadata(cmd_tbl_t *cmdtp, int flag,
+			    int argc, char * const argv[])
+{
+	AvbOps *ops;
+	AvbABData ab_data, ab_data_orig;
+	char *data;
+	int i;
+
+	if (argc != 1)
+		return CMD_RET_USAGE;
+
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return CMD_RET_FAILURE;
+	}
+
+	if (load_metadata(ops->ab_ops, &ab_data, &ab_data_orig) != 0) {
+		printf("do_avb_write_ab_metadata error!\n");
+		avb_ops_user_free(ops);
+		return CMD_RET_FAILURE;
+	}
+
+	data = (char *)&ab_data;
+	for (i = 0; i < 33; i++)
+		printf("%d\n", data[i]);
+
+	avb_ops_user_free(ops);
+
+	return CMD_RET_SUCCESS;
+}
+
+int do_avb_read_ab_metadata(cmd_tbl_t *cmdtp, int flag,
+			    int argc, char * const argv[])
+{
+	AvbOps *ops;
+	AvbABData ab_data;
+
+	if (argc != 1)
+		return CMD_RET_USAGE;
+
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return CMD_RET_FAILURE;
+	}
+
+	if (ops->ab_ops->read_ab_metadata(ops->ab_ops, &ab_data) != 0) {
+		printf("do_avb_write_ab_metadata error!\n");
+		avb_ops_user_free(ops);
+		return CMD_RET_FAILURE;
+	}
+
+	avb_ops_user_free(ops);
+
+	return CMD_RET_SUCCESS;
+}
+
+int do_avb_write_ab_metadata(cmd_tbl_t *cmdtp, int flag,
+			     int argc, char * const argv[])
+{
+	AvbOps *ops;
+	AvbABData ab_data;
+
+	if (argc != 1)
+		return CMD_RET_USAGE;
+
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return CMD_RET_FAILURE;
+	}
+
+	if (ops->ab_ops->write_ab_metadata(ops->ab_ops, &ab_data) != 0) {
+		printf("do_avb_write_ab_metadata error!\n");
+		avb_ops_user_free(ops);
+		return CMD_RET_FAILURE;
+	}
+
+	avb_ops_user_free(ops);
+
+	return CMD_RET_SUCCESS;
+}
+
+int do_avb_verify_partition(cmd_tbl_t *cmdtp, int flag,
+			    int argc, char * const argv[])
+{
+	AvbOps *ops;
+	const char *requested_partitions[1];
+	const char * slot_suffixes[2] = {"_a", "_b"};
+	AvbSlotVerifyFlags flags;
+	AvbSlotVerifyData *slot_data[2] = {NULL, NULL};
+	AvbSlotVerifyResult verify_result;
+	size_t n;
+
+	if (argc != 3)
+		return CMD_RET_USAGE;
+
+	requested_partitions[0] = argv[1];
+	n = simple_strtoul(argv[2], NULL, 16);
+	ops = avb_ops_user_new();
+	flags = AVB_SLOT_VERIFY_FLAGS_NONE;
+	verify_result =
+		avb_slot_verify(ops,
+				requested_partitions,
+				slot_suffixes[n],
+				flags,
+				AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE,
+				&slot_data[n]);
+	if (verify_result != 0)
+		return CMD_RET_FAILURE;
+
+	avb_ops_user_free(ops);
+
+	return CMD_RET_SUCCESS;
+}
+
+int do_avb_flow(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+	char slot_partition[2][20];
+	unsigned long load_address;
+	AvbOps *ops;
+	const char *avb_version;
+	AvbSlotVerifyData *slot_data;
+	AvbSlotVerifyFlags flags;
+	const char *requested_partitions[] = {"boot", "system", NULL};
+	char *command_line;
+	bool unlocked = true;
+	const char *mode_cmdline = NULL;
+	char root_data[70] = "root=PARTUUID=";
+	mode_cmdline = "skip_initramfs";
+	size_t guid_buf_size = 37;
+	char guid_buf[37];
+	char verify_flag;
+	char boot_slot_select[5];
+
+	if (argc != 2)
+		return CMD_RET_USAGE;
+	avb_version = avb_version_string();
+	printf("Android avb version is %s.\n", avb_version);
+	ops = avb_ops_user_new();
+	if (ops == NULL)
+		printf("avb_ops_user_new() failed!\n");
+
+	if (ops->read_is_device_unlocked(ops, &unlocked) != 0)
+		printf("Error determining whether device is unlocked.\n");
+
+	printf("read_is_device_unlocked() ops returned that device is %s\n",
+	       unlocked ? "UNLOCKED" : "LOCKED");
+
+	flags = AVB_SLOT_VERIFY_FLAGS_NONE;
+	if (unlocked)
+		flags |= AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR;
+
+	verify_flag = argv[1][0];
+	if (verify_flag == 'v') {
+		debug("start with verify!\n");
+		avb_ab_flow(ops->ab_ops,
+			    requested_partitions,
+			    flags,
+			    AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE,
+			    &slot_data);
+		strcat(slot_partition[1], requested_partitions[1]);
+		strcat(slot_partition[1], slot_data->ab_suffix);
+		ops->get_unique_guid_for_partition(ops,
+						   slot_partition[1],
+						   guid_buf,
+						   guid_buf_size);
+		strcat(root_data, guid_buf);
+		command_line = android_assemble_cmdline(slot_data->ab_suffix,
+							mode_cmdline);
+		strcat(root_data, " ");
+		strcat(root_data, command_line);
+		env_set("bootargs", root_data);
+		load_address = CONFIG_SYS_LOAD_ADDR;
+		memcpy((uint8_t*)load_address,
+		       slot_data->loaded_partitions->data,
+		       slot_data->loaded_partitions->data_size);
+		android_bootloader_boot_kernel(load_address);
+		avb_slot_verify_data_free(slot_data);
+		avb_ops_user_free(ops);
+	} else if (verify_flag == 'n') {
+		load_address = CONFIG_SYS_LOAD_ADDR;
+		avb_ab_slot_select(ops->ab_ops, boot_slot_select);
+		strcat(slot_partition[1], requested_partitions[1]);
+		strcat(slot_partition[1], boot_slot_select);
+		printf("%s\n", slot_partition[1]);
+		ops->get_unique_guid_for_partition(ops,
+						   slot_partition[1],
+						   guid_buf,
+						   guid_buf_size);
+		strcat(root_data, guid_buf);
+		command_line = android_assemble_cmdline(boot_slot_select,
+							mode_cmdline);
+		strcat(root_data, " ");
+		strcat(root_data, command_line);
+		env_set("bootargs", root_data);
+		android_avb_boot_flow(boot_slot_select, load_address);
+	} else {
+		return CMD_RET_USAGE;
+	}
+
+	return CMD_RET_SUCCESS;
+}
+
+static cmd_tbl_t cmd_avb[] = {
+	U_BOOT_CMD_MKENT(init, 1, 1, do_avb_init_ab_metadata, "", ""),
+	U_BOOT_CMD_MKENT(version, 1, 1, do_avb_version, "", ""),
+	U_BOOT_CMD_MKENT(slot_active, 2, 1,
+			 do_avb_ab_mark_slot_active, "", ""),
+	U_BOOT_CMD_MKENT(slot_unbootable, 2, 1,
+			 do_avb_ab_mark_slot_unbootable, "", ""),
+	U_BOOT_CMD_MKENT(slot_successful, 2, 1,
+			 do_avb_ab_mark_slot_successful, "", ""),
+	U_BOOT_CMD_MKENT(read_rollback, 2, 1,
+			 do_avb_read_rollback_index, "", ""),
+	U_BOOT_CMD_MKENT(write_rollback, 3, 1,
+			 do_avb_write_rollback_index, "", ""),
+	U_BOOT_CMD_MKENT(read_lock_status, 1, 1,
+			 do_avb_read_is_device_unlocked, "", ""),
+	U_BOOT_CMD_MKENT(write_lock_status, 2, 1,
+			 do_avb_write_is_device_unlocked, "", ""),
+	U_BOOT_CMD_MKENT(part_size, 2, 1,
+			 do_avb_get_size_of_partition, "", ""),
+	U_BOOT_CMD_MKENT(part_guid, 2, 1,
+			 do_avb_get_get_unique_guid_for_partition, "", ""),
+	U_BOOT_CMD_MKENT(read, 4, 1, do_avb_read, "", ""),
+	U_BOOT_CMD_MKENT(write, 4, 1, do_avb_write, "", ""),
+	U_BOOT_CMD_MKENT(loadabmisc, 1, 1, do_avb_load_ab_metadata, "", ""),
+	U_BOOT_CMD_MKENT(readabmisc, 1, 1, do_avb_read_ab_metadata, "", ""),
+	U_BOOT_CMD_MKENT(writeabmisc, 1, 1, do_avb_write_ab_metadata, "", ""),
+	U_BOOT_CMD_MKENT(verify, 3, 1, do_avb_verify_partition, "", ""),
+	U_BOOT_CMD_MKENT(flow, 2, 1, do_avb_flow, "", "")
+};
+
+static int do_boot_avb(cmd_tbl_t *cmdtp,
+		       int flag,
+		       int argc,
+		       char * const argv[])
+{
+	cmd_tbl_t *cp;
+
+	cp = find_cmd_tbl(argv[1], cmd_avb, ARRAY_SIZE(cmd_avb));
+
+	argc--;
+	argv++;
+
+	if (cp == NULL || argc > cp->maxargs)
+		return CMD_RET_USAGE;
+	if (flag == CMD_FLAG_REPEAT && !cp->repeatable)
+		return CMD_RET_SUCCESS;
+
+	return cp->cmd(cmdtp, flag, argc, argv);
+}
+
+U_BOOT_CMD(
+	bootavb, 29, 1, do_boot_avb,
+	"Execute the Android avb a/b boot flow.",
+	"init - initialize the avbabmeta\n"
+	"bootavb version - display info of bootavb version\n"
+	"bootavb slot_active cnt\n"
+	"bootavb slot_unbootable cnt\n"
+	"bootavb slot_successful cnt\n"
+	"bootavb read_rollback rollback_index_location\n"
+	"bootavb write_rollback rollback_index_location out_rollback_index\n"
+	"bootavb read_lock_status\n"
+	"bootavb write_lock_status 0 or 1\n"
+	"bootavb part_size partitions_name\n"
+	"bootavb part_guid partitions_name\n"
+	"bootavb read partition offset_blk cnt\n"
+	"bootavb write partition offset_blk cnt\n"
+	"bootavb loadabmisc\n"
+	"bootavb readabmisc\n"
+	"bootavb writeabmisc\n"
+	"bootavb verify partition slot_cnt;partion name without '_a' or '_b'\n"
+	"bootavb flow v/n\n"
+);
+#endif

commit 2d07abe11162ee250d26ea79314259c3f2c79bce
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Sep 18 09:00:49 2017 +0800

    tipc: change the tipc compile conditions
    
    Since the tipc is not used in tpl and
    spl, we just compile tipc and generate
    in u-boot.bin.
    
    Change-Id: Id2845aef127d209c8243cb4cfee8dfbd04ba1305
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/lib/Makefile b/lib/Makefile
index b3544d86c5..d242b7fe94 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -43,6 +43,7 @@ obj-$(CONFIG_TPM) += tpm.o
 obj-$(CONFIG_RBTREE)	+= rbtree.o
 obj-$(CONFIG_BITREVERSE) += bitrev.o
 obj-y += list_sort.o
+obj-$(CONFIG_OPTEE_CLIENT) += optee_clientApi/
 endif
 
 obj-$(CONFIG_$(SPL_TPL_)AVB_LIBAVB) += avb/rk_libavb/
@@ -50,8 +51,6 @@ obj-$(CONFIG_$(SPL_TPL_)AVB_LIBAVB_AB) += avb/rk_libavb_ab/
 obj-$(CONFIG_$(SPL_TPL_)AVB_LIBAVB_ATX) += avb/rk_libavb_atx/
 obj-$(CONFIG_$(SPL_TPL_)AVB_LIBAVB_USER) += avb/rk_libavb_user/
 
-obj-$(CONFIG_OPTEE_CLIENT) += optee_clientApi/
-
 obj-$(CONFIG_RSA) += rsa/
 obj-$(CONFIG_SHA1) += sha1.o
 obj-$(CONFIG_SHA256) += sha256.o

commit de183ed0f19bff9c440c2dfb906531b702bfad65
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Sep 18 08:45:36 2017 +0800

    android: declare some functions externally
    
    In file boot_android.c, we use some functions
    belong to common/android_bootloader.c. BUt these
    functions attribute are static. So we modify these
    functions used in the boot_android.c.
    
    And android_avb_boot_flow is added to boot a/b
    android system.
    
    Change-Id: I3ebc0a6fb24691ab1a0f8475220e16ca633412f1
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index fbfe3de50c..1f92f00d74 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -157,7 +157,7 @@ static int android_bootloader_boot_bootloader(void)
 	return -1;
 }
 
-static int android_bootloader_boot_kernel(unsigned long kernel_address)
+int android_bootloader_boot_kernel(unsigned long kernel_address)
 {
 	char kernel_addr_str[12];
 	char *fdt_addr = env_get("fdt_addr");
@@ -209,7 +209,7 @@ static char *strjoin(const char **chunks, char separator)
 /** android_assemble_cmdline - Assemble the command line to pass to the kernel
  * @return a newly allocated string
  */
-static char *android_assemble_cmdline(const char *slot_suffix,
+char *android_assemble_cmdline(const char *slot_suffix,
 				      const char *extra_args)
 {
 	const char *cmdline_chunks[16];
@@ -349,3 +349,29 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	/* TODO: If the kernel doesn't boot mark the selected slot as bad. */
 	return -1;
 }
+
+int android_avb_boot_flow(char *slot_suffix, unsigned long kernel_address)
+{
+	const char *dev_iface = "mmc";
+	int dev_num = 0;
+	struct blk_desc *dev_desc;
+	disk_partition_t boot_part_info;
+	int ret;
+	dev_desc = blk_get_dev(dev_iface, dev_num);
+	if (!dev_desc) {
+		printf("Could not find %s %d\n", dev_iface, dev_num);
+		return -1;
+	}
+	/* Load the kernel from the desired "boot" partition. */
+	android_part_get_info_by_name_suffix(dev_desc,
+					     ANDROID_PARTITION_BOOT,
+					     slot_suffix, &boot_part_info);
+	ret = android_image_load(dev_desc, &boot_part_info, kernel_address,
+				 -1UL);
+	if (ret < 0)
+		return ret;
+	android_bootloader_boot_kernel(kernel_address);
+
+	/* TODO: If the kernel doesn't boot mark the selected slot as bad. */
+	return -1;
+}
diff --git a/include/android_bootloader.h b/include/android_bootloader.h
index ddf6d76f64..ef072a9374 100644
--- a/include/android_bootloader.h
+++ b/include/android_bootloader.h
@@ -45,4 +45,32 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 				 const char *slot,
 				 unsigned long kernel_address);
 
+/** android_avb_boot_flow - Execute the Android Bootloader Flow.
+ * This fuction use to select and boot kernel through ab_suffix.
+ *
+ * @ab_suffix:		the boot slot to boot from.
+ * @kernel_address:	address where to load the kernel if needed.
+ *
+ * @return a negative number in case of error, otherwise it doesn't return.
+ */
+int android_avb_boot_flow(char *ab_suffix, unsigned long kernel_address);
+
+/** android_assemble_cmdline - Assemble args for cmdline.
+ *
+ * @ab_suffix:		the boot slot to boot from.
+ * @extra_args:   	select the args to command line.
+ *
+ * @return a negative number in case of error, otherwise it doesn't return.
+ */
+char *android_assemble_cmdline(const char *slot_suffix,
+			       const char *extra_args);
+
+/** android_bootloader_boot_kernel- Execute the kernel boot.
+ *
+ * @kernel_address:	address where to load the kernel if needed.
+ *
+ * @return a negative number in case of error, otherwise it doesn't return.
+ */
+int android_bootloader_boot_kernel(unsigned long kernel_address);
+
 #endif  /* __ANDROID_BOOTLOADER_H */

commit 38de3d97e46fd624a3204db1184c598e4b8cfa81
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Sep 15 17:30:57 2017 +0800

    avb: add avb config to spl and tpl
    
    Change-Id: Idc5102e29c4b66acacda554f3c61903606314025
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/lib/Makefile b/lib/Makefile
index b5199e5fbd..b3544d86c5 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -45,10 +45,10 @@ obj-$(CONFIG_BITREVERSE) += bitrev.o
 obj-y += list_sort.o
 endif
 
-obj-$(CONFIG_AVB_LIBAVB) += avb/rk_libavb/
-obj-$(CONFIG_AVB_LIBAVB_AB) += avb/rk_libavb_ab/
-obj-$(CONFIG_AVB_LIBAVB_ATX) += avb/rk_libavb_atx/
-obj-$(CONFIG_AVB_LIBAVB_USER) += avb/rk_libavb_user/
+obj-$(CONFIG_$(SPL_TPL_)AVB_LIBAVB) += avb/rk_libavb/
+obj-$(CONFIG_$(SPL_TPL_)AVB_LIBAVB_AB) += avb/rk_libavb_ab/
+obj-$(CONFIG_$(SPL_TPL_)AVB_LIBAVB_ATX) += avb/rk_libavb_atx/
+obj-$(CONFIG_$(SPL_TPL_)AVB_LIBAVB_USER) += avb/rk_libavb_user/
 
 obj-$(CONFIG_OPTEE_CLIENT) += optee_clientApi/
 
diff --git a/lib/avb/rk_libavb/Kconfig b/lib/avb/rk_libavb/Kconfig
index c569909bdb..71c8be3610 100644
--- a/lib/avb/rk_libavb/Kconfig
+++ b/lib/avb/rk_libavb/Kconfig
@@ -4,3 +4,17 @@ config AVB_LIBAVB
 	  The new android bootloader need to startup
 	  with a/b and avb.This config can add the
 	  AVB functions to u-boot.
+
+config SPL_AVB_LIBAVB
+	bool "Support running U-Boot AVB for spl"
+	help
+	  The new android bootloader need to startup
+	  with a/b and avb.This config can add the
+	  AVB functions to u-boot.
+
+config TPL_AVB_LIBAVB
+	bool "Support running U-Boot AVB for tpl"
+	help
+	  The new android bootloader need to startup
+	  with a/b and avb.This config can add the
+	  AVB functions to u-boot.
diff --git a/lib/avb/rk_libavb_ab/Kconfig b/lib/avb/rk_libavb_ab/Kconfig
index ae1a8095f3..d4a0dc279a 100644
--- a/lib/avb/rk_libavb_ab/Kconfig
+++ b/lib/avb/rk_libavb_ab/Kconfig
@@ -1,7 +1,23 @@
 config AVB_LIBAVB_AB
 	bool "Choose the a/b system and flow"
 	help
-	  In the android things system, there are 
+	  In the android things system, there are
+	  _a and _b or more systems. So we have to
+	  choose the _a or _b system to startup.
+	  This libavb_ab can suport these functions.
+
+config SPL_AVB_LIBAVB_AB
+	bool "Choose the a/b system and flow for spl"
+	help
+	  In the android things system, there are
+	  _a and _b or more systems. So we have to
+	  choose the _a or _b system to startup.
+	  This libavb_ab can suport these functions.
+
+config TPL_AVB_LIBAVB_AB
+	bool "Choose the a/b system and flow for tpl"
+	help
+	  In the android things system, there are
 	  _a and _b or more systems. So we have to
 	  choose the _a or _b system to startup.
 	  This libavb_ab can suport these functions.
diff --git a/lib/avb/rk_libavb_atx/Kconfig b/lib/avb/rk_libavb_atx/Kconfig
index f191d4d8bc..1c168baeec 100644
--- a/lib/avb/rk_libavb_atx/Kconfig
+++ b/lib/avb/rk_libavb_atx/Kconfig
@@ -4,3 +4,17 @@ config AVB_LIBAVB_ATX
 	  Android Things requires specific public key
 	  metadata and verification logic to correctly
 	  verify vbmeta public keys.
+
+config SPL_AVB_LIBAVB_ATX
+	bool "support vbmeta public key verify for SPL"
+	help
+	  Android Things requires specific public key
+	  metadata and verification logic to correctly
+	  verify vbmeta public keys.
+
+config TPL_AVB_LIBAVB_ATX
+	bool "support vbmeta public key verify for TPL"
+	help
+	  Android Things requires specific public key
+	  metadata and verification logic to correctly
+	  verify vbmeta public keys.
diff --git a/lib/avb/rk_libavb_user/Kconfig b/lib/avb/rk_libavb_user/Kconfig
index f6b3ca3c30..c27412fcba 100644
--- a/lib/avb/rk_libavb_user/Kconfig
+++ b/lib/avb/rk_libavb_user/Kconfig
@@ -2,6 +2,22 @@ config AVB_LIBAVB_USER
 	bool "Android AVB read/write hardware"
 	help
 	  This config support the android things system to
-	  read/write hardware image, like vbmeta, misc, and 
+	  read/write hardware image, like vbmeta, misc, and
+	  so on. And it can provide some a/b and avb information
+	  to fastboot and kernel.
+
+config SPL_AVB_LIBAVB_USER
+	bool "Android AVB read/write hardware for spl"
+	help
+	  This config support the android things system to
+	  read/write hardware image, like vbmeta, misc, and
+	  so on. And it can provide some a/b and avb information
+	  to fastboot and kernel.
+
+config TPL_AVB_LIBAVB_USER
+	bool "Android AVB read/write hardware for tpl"
+	help
+	  This config support the android things system to
+	  read/write hardware image, like vbmeta, misc, and
 	  so on. And it can provide some a/b and avb information
 	  to fastboot and kernel.

commit 844d3f39ae378293b1bde52c31006d8330937b46
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Sep 15 15:45:05 2017 +0800

    libavb_user: add config depended on tipc
    
    In the avb_ops_user.c file, we use some
    functions provided by tipc, so excute the
    functions may depend on tipc. If the config
    is not enable, it may compile fail.
    
    Change-Id: I323f7e8d675407f2ec2f9f5358d1696b3b118880
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/lib/avb/rk_libavb_user/avb_ops_user.c b/lib/avb/rk_libavb_user/avb_ops_user.c
index f16b0368a0..d4954a6a93 100644
--- a/lib/avb/rk_libavb_user/avb_ops_user.c
+++ b/lib/avb/rk_libavb_user/avb_ops_user.c
@@ -165,7 +165,9 @@ static AvbIOResult read_rollback_index(AvbOps *ops,
                                        uint64_t *out_rollback_index)
 {
 	if (out_rollback_index != NULL) {
+#ifdef CONFIG_OPTEE_CLIENT
 		trusty_read_rollback_index(rollback_index_location, out_rollback_index);
+#endif
 	}
 	return AVB_IO_RESULT_OK;
 }
@@ -174,14 +176,18 @@ static AvbIOResult write_rollback_index(AvbOps *ops,
                                         size_t rollback_index_location,
                                         uint64_t rollback_index)
 {
+#ifdef CONFIG_OPTEE_CLIENT
 	trusty_write_rollback_index(rollback_index_location, rollback_index);
+#endif
 	return AVB_IO_RESULT_OK;
 }
 
 static AvbIOResult read_is_device_unlocked(AvbOps *ops, bool *out_is_unlocked)
 {
 	if (out_is_unlocked != NULL) {
+#ifdef CONFIG_OPTEE_CLIENT
 		trusty_read_lock_state((uint8_t *)out_is_unlocked);
+#endif
 	}
 	return AVB_IO_RESULT_OK;
 }
@@ -189,7 +195,9 @@ static AvbIOResult read_is_device_unlocked(AvbOps *ops, bool *out_is_unlocked)
 static AvbIOResult write_is_device_unlocked(AvbOps *ops, bool *out_is_unlocked)
 {
 	if (out_is_unlocked != NULL) {
+#ifdef CONFIG_OPTEE_CLIENT
 		trusty_write_lock_state(*out_is_unlocked);
+#endif
 	}
 	return AVB_IO_RESULT_OK;
 }

commit 10a4cc1b3594adac014937f333f203b3286ed055
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Sep 15 09:50:38 2017 +0800

    rockchip: enable USB_FUNCTION_ROCKUSB
    
    Change-Id: I851b16cad86e723739898ee9e6016271463953be
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index e9504b2f30..84462f3b6a 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1118,6 +1118,7 @@ config ARCH_ROCKCHIP
 	imply FASTBOOT
 	imply FAT_WRITE
 	imply USB_FUNCTION_FASTBOOT
+	imply USB_FUNCTION_ROCKUSB
 	imply SPL_SYSRESET
 	imply TPL_SYSRESET
 	imply ADC

commit f70bed31127ef0e39242d637fad8390ab30112dc
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Sep 14 16:52:13 2017 +0800

    rockchip: evb-rk3229: enable RPMB
    
    Change-Id: Id608ebf485b56349f4b7aea47d4077ec7f664ac4
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/evb_rk3229.h b/include/configs/evb_rk3229.h
index 129b4a53ba..a74303385d 100644
--- a/include/configs/evb_rk3229.h
+++ b/include/configs/evb_rk3229.h
@@ -14,6 +14,7 @@
 #define CONFIG_SYS_MMC_ENV_DEV          0
 #define CONFIG_SYS_MMC_ENV_PART         0
 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
+#define CONFIG_SUPPORT_EMMC_RPMB
 
 #ifndef CONFIG_SPL_BUILD
 /* Enable gpt partition table */

commit 6c551138ca32fe8065f37a7a1dc1a0f3491313f1
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Sep 14 09:29:35 2017 +0800

    avb: create avb function for user use
    
    The libavb_user provide some fuctions to get
    a/b and avb information from misc or vbmeta
    partitions, which can be use in libavb...
    
    It also can use to enable or disable the verification
    function by using avb_user_verity_set in the file
    avb_user_verify.c.
    
    Since we use fastboot to program our firmware,
    some necessary function is provided to fastboot
    to get useful information, like slot number, current
    slot and so on.
    
    Some functions in the avb_ops_user.c, like read_rollback_index,
    depend on the OpteeClientTest.h.
    
    Change-Id: I94f77db30d5c7896724b5da3d218041ebdc1f46a
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/android_avb/avb_ops_user.h b/include/android_avb/avb_ops_user.h
new file mode 100644
index 0000000000..e6247bf656
--- /dev/null
+++ b/include/android_avb/avb_ops_user.h
@@ -0,0 +1,16 @@
+#ifndef AVB_OPS_USER_H_
+#define AVB_OPS_USER_H_
+
+#include <android_avb/libavb.h>
+#include <android_avb/avb_ab_flow.h>
+
+
+
+AvbOps* avb_ops_user_new(void);
+void avb_ops_user_free(AvbOps* ops);
+int read_slot_count(char *slot_count);
+int read_slot_suffixes(char *slot_suffixes);
+int set_slot_active(unsigned int *slot_number);
+int get_current_slot(char *select_slot);
+
+#endif
diff --git a/include/android_avb/avb_user_verification.h b/include/android_avb/avb_user_verification.h
new file mode 100644
index 0000000000..a0077cbe17
--- /dev/null
+++ b/include/android_avb/avb_user_verification.h
@@ -0,0 +1,63 @@
+/*
+ * Copyright (C) 2017 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#ifndef AVB_USER_VERIFICATION_H_
+#define AVB_USER_VERIFICATION_H_
+
+#include <android_avb/libavb.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Function to enable or disable verification for an entire slot. The
+ * passed in |ops| should be obtained via avb_ops_user_new(). The
+ * |ab_suffix| parameter should specify the slot to modify including
+ * the leading underscore (e.g. "_a" or "_b"). The
+ * |enable_verification| parameter should be set to |true| to enable
+ * dm-verification and |false| to disable.
+ *
+ * Returns |true| if the operation succeeded, otherwise |false|.
+ */
+bool avb_user_verification_set(AvbOps* ops,
+                               const char* ab_suffix,
+                               bool enable_verification);
+
+/* Gets whether verification is enabled for an entire slot. The passed
+ * in |ops| should be obtained via avb_ops_user_new(). The |ab_suffix|
+ * parameter should specify the slot to query including the leading
+ * underscore (e.g. "_a" or "_b"). The result is returned in the
+ * |out_verification_enabled| parameter.
+ *
+ * Returns |true| if the operation succeeded, otherwise |false|.
+ */
+bool avb_user_verification_get(AvbOps* ops,
+                               const char* ab_suffix,
+                               bool* out_verification_enabled);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_USER_VERIFICATION_H_ */
diff --git a/include/android_avb/avb_user_verity.h b/include/android_avb/avb_user_verity.h
new file mode 100644
index 0000000000..c8c2a6214b
--- /dev/null
+++ b/include/android_avb/avb_user_verity.h
@@ -0,0 +1,63 @@
+/*
+ * Copyright (C) 2017 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#ifndef AVB_USER_VERITY_H_
+#define AVB_USER_VERITY_H_
+
+#include <android_avb/libavb.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Function to enable or disable dm-verity for an entire slot. The
+ * passed in |ops| should be obtained via avb_ops_user_new(). The
+ * |ab_suffix| parameter should specify the slot to modify including
+ * the leading underscore (e.g. "_a" or "_b"). The |enable_verity|
+ * parameter should be set to |true| to enable dm-verity and |false|
+ * to disable.
+ *
+ * Returns |true| if the operation succeeded, otherwise |false|.
+ */
+bool avb_user_verity_set(AvbOps* ops,
+                         const char* ab_suffix,
+                         bool enable_verity);
+
+/* Gets whether dm-verity is enabled for an entire slot. The passed in
+ * |ops| should be obtained via avb_ops_user_new(). The |ab_suffix|
+ * parameter should specify the slot to query including the leading
+ * underscore (e.g. "_a" or "_b"). The result is returned in the
+ * |out_verity_enabled| parameter.
+ *
+ * Returns |true| if the operation succeeded, otherwise |false|.
+ */
+bool avb_user_verity_get(AvbOps* ops,
+                         const char* ab_suffix,
+                         bool* out_verity_enabled);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_USER_VERITY_H_ */
diff --git a/include/android_avb/libavb_user.h b/include/android_avb/libavb_user.h
new file mode 100644
index 0000000000..2bca7a5dcb
--- /dev/null
+++ b/include/android_avb/libavb_user.h
@@ -0,0 +1,41 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#ifndef LIBAVB_USER_H_
+#define LIBAVB_USER_H_
+
+#include <android_avb/libavb_ab.h>
+
+/* The AVB_INSIDE_LIBAVB_USER_H preprocessor symbol is used to enforce
+ * library users to include only this file. All public interfaces, and
+ * only public interfaces, must be included here.
+ */
+
+#define AVB_INSIDE_LIBAVB_USER_H
+#include <android_avb/avb_ops_user.h>
+#include <android_avb/avb_user_verification.h>
+#include <android_avb/avb_user_verity.h>
+#undef AVB_INSIDE_LIBAVB_USER_H
+
+#endif /* LIBAVB_USER_H_ */
diff --git a/lib/Kconfig b/lib/Kconfig
index 7ef02fa4d8..065f9c21f5 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -271,6 +271,7 @@ source lib/efi_loader/Kconfig
 source lib/avb/rk_libavb/Kconfig
 source lib/avb/rk_libavb_ab/Kconfig
 source lib/avb/rk_libavb_atx/Kconfig
+source lib/avb/rk_libavb_user/Kconfig
 source lib/optee_clientApi/Kconfig
 
 endmenu
diff --git a/lib/Makefile b/lib/Makefile
index 5c8570ef27..b5199e5fbd 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -48,6 +48,7 @@ endif
 obj-$(CONFIG_AVB_LIBAVB) += avb/rk_libavb/
 obj-$(CONFIG_AVB_LIBAVB_AB) += avb/rk_libavb_ab/
 obj-$(CONFIG_AVB_LIBAVB_ATX) += avb/rk_libavb_atx/
+obj-$(CONFIG_AVB_LIBAVB_USER) += avb/rk_libavb_user/
 
 obj-$(CONFIG_OPTEE_CLIENT) += optee_clientApi/
 
diff --git a/lib/avb/rk_libavb_user/Kconfig b/lib/avb/rk_libavb_user/Kconfig
new file mode 100644
index 0000000000..f6b3ca3c30
--- /dev/null
+++ b/lib/avb/rk_libavb_user/Kconfig
@@ -0,0 +1,7 @@
+config AVB_LIBAVB_USER
+	bool "Android AVB read/write hardware"
+	help
+	  This config support the android things system to
+	  read/write hardware image, like vbmeta, misc, and 
+	  so on. And it can provide some a/b and avb information
+	  to fastboot and kernel.
diff --git a/lib/avb/rk_libavb_user/Makefile b/lib/avb/rk_libavb_user/Makefile
new file mode 100644
index 0000000000..fe634018e3
--- /dev/null
+++ b/lib/avb/rk_libavb_user/Makefile
@@ -0,0 +1,3 @@
+obj-y	+= avb_ops_user.o
+obj-y	+= avb_user_verification.o
+obj-y	+= avb_user_verity.o
diff --git a/lib/avb/rk_libavb_user/avb_ops_user.c b/lib/avb/rk_libavb_user/avb_ops_user.c
new file mode 100644
index 0000000000..f16b0368a0
--- /dev/null
+++ b/lib/avb/rk_libavb_user/avb_ops_user.c
@@ -0,0 +1,377 @@
+/*
+ * Copyright (C) 2017 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <common.h>
+#include <image.h>
+#include <android_image.h>
+#include <malloc.h>
+#include <mapmem.h>
+#include <errno.h>
+#include <command.h>
+#include <mmc.h>
+#include <blk.h>
+#include <part.h>
+#include <android_avb/avb_ops_user.h>
+#include <android_avb/libavb_ab.h>
+#include <android_avb/avb_atx_validate.h>
+#include <optee_include/OpteeClientTest.h>
+
+static void byte_to_block(int64_t *offset,
+			  size_t *num_bytes,
+			  lbaint_t *offset_blk,
+			  lbaint_t *blkcnt)
+{
+	*offset_blk = (lbaint_t)(*offset / 512);
+	if (*num_bytes % 512 == 0) {
+		if (*offset % 512 == 0) {
+			*blkcnt = (lbaint_t)(*num_bytes / 512);
+		} else {
+			*blkcnt = (lbaint_t)(*num_bytes / 512) + 1;
+		}
+	} else {
+		if (*offset % 512 == 0) {
+			*blkcnt = (lbaint_t)(*num_bytes / 512) + 1;
+		} else {
+			if ((*offset % 512) + (*num_bytes % 512) < 512 ||
+			    (*offset % 512) + (*num_bytes % 512) == 512) {
+				*blkcnt = (lbaint_t)(*num_bytes / 512) + 1;
+			} else {
+				*blkcnt = (lbaint_t)(*num_bytes / 512) + 2;
+			}
+			
+		}
+	}
+}
+
+static AvbIOResult read_from_partition(AvbOps* ops,
+                                       const char* partition,
+                                       int64_t offset,
+                                       size_t num_bytes,
+                                       void* buffer,
+                                       size_t* out_num_read)
+{
+	char *dev_iface = "mmc";
+	char *buffer_temp;
+	int dev_num = 0;
+	struct blk_desc *dev_desc;
+	lbaint_t offset_blk, blkcnt;
+	disk_partition_t part_info;
+
+	byte_to_block(&offset, &num_bytes, &offset_blk, &blkcnt);
+	buffer_temp = malloc(512 * blkcnt);
+	dev_desc = blk_get_dev(dev_iface, dev_num);
+	if (!dev_desc) {
+		printf("Could not find %s %d\n", dev_iface, dev_num);
+		return -1;
+	}
+
+	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0) {
+		printf("Could not find \"%s\" partition\n", partition);
+		return -1;
+	}
+
+	if((offset % 512 == 0) && (num_bytes % 512 == 0)) {
+		blk_dread(dev_desc, part_info.start + offset_blk, blkcnt, buffer);
+		*out_num_read = blkcnt * 512;
+	} else {
+		blk_dread(dev_desc, part_info.start + offset_blk, blkcnt, buffer_temp);
+		memcpy(buffer, buffer_temp + (offset % 512), num_bytes);
+		*out_num_read = num_bytes;
+	}
+	free(buffer_temp);
+
+	return AVB_IO_RESULT_OK;
+}
+
+static AvbIOResult write_to_partition(AvbOps* ops,
+                                      const char* partition,
+                                      int64_t offset,
+                                      size_t num_bytes,
+                                      const void* buffer)
+{
+	const char *dev_iface = "mmc";
+	int dev_num = 0;
+	struct blk_desc *dev_desc;
+	char *buffer_temp;
+	disk_partition_t part_info;
+	lbaint_t offset_blk, blkcnt;
+
+	byte_to_block(&offset, &num_bytes, &offset_blk, &blkcnt);
+	buffer_temp = malloc(512 * blkcnt);
+	memset(buffer_temp, 0, 512 * blkcnt);
+
+	dev_desc = blk_get_dev(dev_iface, dev_num);
+	if (!dev_desc) {
+		printf("Could not find %s %d\n", dev_iface, dev_num);
+		return -1;
+	}
+
+	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0) {
+		printf("Could not find \"%s\" partition\n", partition);
+		return -1;
+	}
+
+	if ((offset % 512 != 0) && (num_bytes % 512) != 0) {
+		blk_dread(dev_desc, part_info.start + offset_blk, blkcnt, buffer_temp);
+	}
+	memcpy(buffer_temp, buffer + (offset % 512), num_bytes);
+
+	if(blk_dwrite(dev_desc, part_info.start + offset_blk, blkcnt, buffer) != 1){
+		printf("Can't write %s partition",partition);
+	}
+	free(buffer_temp);
+
+	return AVB_IO_RESULT_OK;
+}
+
+static AvbIOResult validate_vbmeta_public_key(
+	AvbOps *ops,
+	const uint8_t *public_key_data,
+	size_t public_key_length,
+	const uint8_t *public_key_metadata,
+	size_t public_key_metadata_length,
+	bool *out_is_trusted)
+{
+	if (out_is_trusted != NULL) {
+		*out_is_trusted = true;
+	}
+	return AVB_IO_RESULT_OK;
+}
+
+
+static AvbIOResult read_rollback_index(AvbOps *ops,
+                                       size_t rollback_index_location,
+                                       uint64_t *out_rollback_index)
+{
+	if (out_rollback_index != NULL) {
+		trusty_read_rollback_index(rollback_index_location, out_rollback_index);
+	}
+	return AVB_IO_RESULT_OK;
+}
+
+static AvbIOResult write_rollback_index(AvbOps *ops,
+                                        size_t rollback_index_location,
+                                        uint64_t rollback_index)
+{
+	trusty_write_rollback_index(rollback_index_location, rollback_index);
+	return AVB_IO_RESULT_OK;
+}
+
+static AvbIOResult read_is_device_unlocked(AvbOps *ops, bool *out_is_unlocked)
+{
+	if (out_is_unlocked != NULL) {
+		trusty_read_lock_state((uint8_t *)out_is_unlocked);
+	}
+	return AVB_IO_RESULT_OK;
+}
+
+static AvbIOResult write_is_device_unlocked(AvbOps *ops, bool *out_is_unlocked)
+{
+	if (out_is_unlocked != NULL) {
+		trusty_write_lock_state(*out_is_unlocked);
+	}
+	return AVB_IO_RESULT_OK;
+}
+
+static AvbIOResult get_size_of_partition(AvbOps *ops,
+                                         const char *partition,
+                                         uint64_t *out_size_in_bytes)
+{
+	const char *dev_iface = "mmc";
+	int dev_num = 0;
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+
+	dev_desc = blk_get_dev(dev_iface, dev_num);
+	if (!dev_desc) {
+		printf("Could not find %s %d\n", dev_iface, dev_num);
+		return -1;
+	}
+
+	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0) {
+		printf("Could not find \"%s\" partition\n", partition);
+		return -1;
+	}
+	*out_size_in_bytes = (part_info.size) * 512;
+	return AVB_IO_RESULT_OK;
+}
+
+static AvbIOResult get_unique_guid_for_partition(AvbOps *ops,
+                                                 const char *partition,
+                                                 char *guid_buf,
+                                                 size_t guid_buf_size)
+{
+	const char *dev_iface = "mmc";
+	int dev_num = 0;
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+	dev_desc = blk_get_dev(dev_iface, dev_num);
+	if (!dev_desc) {
+		printf("Could not find %s %d\n", dev_iface, dev_num);
+		return -1;
+	}
+
+	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0) {
+		printf("Could not find \"%s\" partition\n", partition);
+		return -1;
+	}
+	if (guid_buf != NULL && guid_buf_size > 0) {
+		memcpy(guid_buf, part_info.uuid, guid_buf_size);
+	}
+	return AVB_IO_RESULT_OK;
+}
+
+AvbOps* avb_ops_user_new(void)
+{
+	AvbOps* ops;
+
+	ops = calloc(1, sizeof(AvbOps));
+	if (ops == NULL) {
+		avb_error("Error allocating memory for AvbOps.\n");
+		goto out;
+	}
+
+	ops->ab_ops = calloc(1, sizeof(AvbABOps));
+	if (ops->ab_ops == NULL) {
+		avb_error("Error allocating memory for AvbABOps.\n");
+		free(ops);
+		goto out;
+	}
+	ops->atx_ops = calloc(1, sizeof(AvbAtxOps));
+	if (ops->atx_ops == NULL) {
+		avb_error("Error allocating memory for AvbAtxOps.\n");
+		free(ops->ab_ops);
+		free(ops);
+		goto out;
+	}
+	ops->ab_ops->ops = ops;
+	ops->atx_ops->ops = ops;
+
+	ops->read_from_partition = read_from_partition;
+	ops->write_to_partition = write_to_partition;
+	ops->validate_vbmeta_public_key = validate_vbmeta_public_key;
+	ops->read_rollback_index = read_rollback_index;
+	ops->write_rollback_index = write_rollback_index;
+	ops->read_is_device_unlocked = read_is_device_unlocked;
+	ops->write_is_device_unlocked = write_is_device_unlocked;
+	ops->get_unique_guid_for_partition = get_unique_guid_for_partition;
+	ops->get_size_of_partition = get_size_of_partition;
+	ops->ab_ops->read_ab_metadata = avb_ab_data_read;
+	ops->ab_ops->write_ab_metadata = avb_ab_data_write;
+	ops->ab_ops->init_ab_metadata = avb_ab_data_init;
+out:
+	return ops;
+}
+
+void avb_ops_user_free(AvbOps *ops)
+{
+	free(ops->ab_ops);
+	free(ops->atx_ops);
+	free(ops);
+}
+
+
+int read_slot_count(char *slot_count)
+{
+	AvbOps* ops;
+	AvbABData ab_data;
+	memset(&ab_data,0,sizeof(AvbABData));
+	ops = avb_ops_user_new();
+	printf("read_slot_count\n");
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return -1;
+	}
+	if (ops->ab_ops->read_ab_metadata(ops->ab_ops,&ab_data) != 0) {
+		printf("read_slot_count error!\n");
+		avb_ops_user_free(ops);
+		return -1;
+	}
+	*slot_count = ab_data.nb_slot;
+	avb_ops_user_free(ops);
+	return 0;
+}
+
+int read_slot_suffixes(char *slot_suffixes)
+{
+	AvbOps* ops;
+	AvbABData ab_data;
+	memset(&ab_data,0,sizeof(AvbABData));
+	ops = avb_ops_user_new();
+	printf("read_slot_suffixes\n");
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return -1;
+	}
+	if (ops->ab_ops->read_ab_metadata(ops->ab_ops,&ab_data) != 0) {
+		printf("read_slot_suffixes error!\n");
+		avb_ops_user_free(ops);
+		return -1;
+	}
+	memcpy(slot_suffixes,ab_data.slot_suffix,4);
+	avb_ops_user_free(ops);
+	return 0;
+}
+
+int set_slot_active(unsigned int *slot_number)
+{
+	AvbOps* ops;
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return -1;
+	}
+	printf("set_slot_active\n");
+	if (avb_ab_mark_slot_active(ops->ab_ops, *slot_number) != 0) {
+		printf("set_slot_active error!\n");
+		avb_ops_user_free(ops);
+		return -1;
+	}
+
+	avb_ops_user_free(ops);
+	return 0;
+}
+
+int get_current_slot(char *select_slot)
+{
+	AvbOps* ops;
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return -1;
+	}
+	if (avb_ab_slot_select(ops->ab_ops, select_slot) != 0) {
+		printf("get_current_slot error!\n");
+		avb_ops_user_free(ops);
+		return -1;
+	}
+
+	avb_ops_user_free(ops);
+	return 0;
+}
+
+
+
+
+
diff --git a/lib/avb/rk_libavb_user/avb_user_verification.c b/lib/avb/rk_libavb_user/avb_user_verification.c
new file mode 100644
index 0000000000..9b0e69d401
--- /dev/null
+++ b/lib/avb/rk_libavb_user/avb_user_verification.c
@@ -0,0 +1,214 @@
+/*
+ * Copyright (C) 2017 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_user_verification.h>
+
+/* Maximum allow length (in bytes) of a partition name, including
+ * ab_suffix.
+ */
+#define AVB_PART_NAME_MAX_SIZE 32
+
+/* Loads the toplevel AvbVBMetaImageHeader from the slot denoted by
+ * |ab_suffix| into |vbmeta_image|. No validation, verification, or
+ * byteswapping is performed.
+ *
+ * If successful, |true| is returned and the partition it was loaded
+ * from is returned in |out_partition_name| and the offset on said
+ * partition is returned in |out_vbmeta_offset|.
+ */
+static bool load_top_level_vbmeta_header(
+    AvbOps* ops,
+    const char* ab_suffix,
+    uint8_t vbmeta_image[AVB_VBMETA_IMAGE_HEADER_SIZE],
+    char out_partition_name[AVB_PART_NAME_MAX_SIZE],
+    uint64_t* out_vbmeta_offset) {
+  uint64_t vbmeta_offset = 0;
+  size_t num_read;
+  bool ret = false;
+  AvbIOResult io_res;
+
+  /* Construct full partition name. */
+  if (!avb_str_concat(out_partition_name,
+                      AVB_PART_NAME_MAX_SIZE,
+                      "vbmeta",
+                      6,
+                      ab_suffix,
+                      avb_strlen(ab_suffix))) {
+    avb_error("Partition name and suffix does not fit.\n");
+    goto out;
+  }
+
+  /* Only read the header, not the entire struct. */
+  io_res = ops->read_from_partition(ops,
+                                    out_partition_name,
+                                    vbmeta_offset,
+                                    AVB_VBMETA_IMAGE_HEADER_SIZE,
+                                    vbmeta_image,
+                                    &num_read);
+  if (io_res == AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION) {
+    AvbFooter footer;
+
+    /* Try looking for the vbmeta struct in 'boot' via the footer. */
+    if (!avb_str_concat(out_partition_name,
+                        AVB_PART_NAME_MAX_SIZE,
+                        "boot",
+                        4,
+                        ab_suffix,
+                        avb_strlen(ab_suffix))) {
+      avb_error("Partition name and suffix does not fit.\n");
+      goto out;
+    }
+    io_res = ops->read_from_partition(ops,
+                                      out_partition_name,
+                                      -AVB_FOOTER_SIZE,
+                                      AVB_FOOTER_SIZE,
+                                      &footer,
+                                      &num_read);
+    if (io_res != AVB_IO_RESULT_OK) {
+      avb_errorv("Error loading footer from partition '",
+                 out_partition_name,
+                 "'\n",
+                 NULL);
+      goto out;
+    }
+
+    if (avb_memcmp(footer.magic, AVB_FOOTER_MAGIC, AVB_FOOTER_MAGIC_LEN) != 0) {
+      avb_errorv("Data from '",
+                 out_partition_name,
+                 "' does not look like a vbmeta footer.\n",
+                 NULL);
+      goto out;
+    }
+
+    vbmeta_offset = avb_be64toh(footer.vbmeta_offset);
+    io_res = ops->read_from_partition(ops,
+                                      out_partition_name,
+                                      vbmeta_offset,
+                                      AVB_VBMETA_IMAGE_HEADER_SIZE,
+                                      vbmeta_image,
+                                      &num_read);
+  }
+
+  if (io_res != AVB_IO_RESULT_OK) {
+    avb_errorv(
+        "Error loading from partition '", out_partition_name, "'\n", NULL);
+    goto out;
+  }
+
+  if (out_vbmeta_offset != NULL) {
+    *out_vbmeta_offset = vbmeta_offset;
+  }
+
+  ret = true;
+
+out:
+  return ret;
+}
+
+bool avb_user_verification_get(AvbOps* ops,
+                               const char* ab_suffix,
+                               bool* out_verification_enabled) {
+  uint8_t vbmeta_image[AVB_VBMETA_IMAGE_HEADER_SIZE]; /* 256 bytes. */
+  char partition_name[AVB_PART_NAME_MAX_SIZE];        /* 32 bytes. */
+  AvbVBMetaImageHeader* header;
+  uint32_t flags;
+  bool ret = false;
+
+  if (!load_top_level_vbmeta_header(
+          ops, ab_suffix, vbmeta_image, partition_name, NULL)) {
+    goto out;
+  }
+
+  if (avb_memcmp(vbmeta_image, AVB_MAGIC, AVB_MAGIC_LEN) != 0) {
+    avb_errorv("Data from '",
+               partition_name,
+               "' does not look like a vbmeta header.\n",
+               NULL);
+    goto out;
+  }
+
+  /* Set/clear the VERIFICATION_DISABLED bit, as requested. */
+  header = (AvbVBMetaImageHeader*)vbmeta_image;
+  flags = avb_be32toh(header->flags);
+
+  if (out_verification_enabled != NULL) {
+    *out_verification_enabled =
+        !(flags & AVB_VBMETA_IMAGE_FLAGS_VERIFICATION_DISABLED);
+  }
+
+  ret = true;
+
+out:
+  return ret;
+}
+
+bool avb_user_verification_set(AvbOps* ops,
+                               const char* ab_suffix,
+                               bool enable_verification) {
+  uint8_t vbmeta_image[AVB_VBMETA_IMAGE_HEADER_SIZE]; /* 256 bytes. */
+  char partition_name[AVB_PART_NAME_MAX_SIZE];        /* 32 bytes. */
+  uint64_t vbmeta_offset;
+  AvbIOResult io_res;
+  AvbVBMetaImageHeader* header;
+  uint32_t flags;
+  bool ret = false;
+
+  if (!load_top_level_vbmeta_header(
+          ops, ab_suffix, vbmeta_image, partition_name, &vbmeta_offset)) {
+    goto out;
+  }
+
+  if (avb_memcmp(vbmeta_image, AVB_MAGIC, AVB_MAGIC_LEN) != 0) {
+    avb_errorv("Data from '",
+               partition_name,
+               "' does not look like a vbmeta header.\n",
+               NULL);
+    goto out;
+  }
+
+  /* Set/clear the VERIFICATION_DISABLED bit, as requested. */
+  header = (AvbVBMetaImageHeader*)vbmeta_image;
+  flags = avb_be32toh(header->flags);
+  flags &= ~AVB_VBMETA_IMAGE_FLAGS_VERIFICATION_DISABLED;
+  if (!enable_verification) {
+    flags |= AVB_VBMETA_IMAGE_FLAGS_VERIFICATION_DISABLED;
+  }
+  header->flags = avb_htobe32(flags);
+
+  /* Write the header. */
+  io_res = ops->write_to_partition(ops,
+                                   partition_name,
+                                   vbmeta_offset,
+                                   AVB_VBMETA_IMAGE_HEADER_SIZE,
+                                   vbmeta_image);
+  if (io_res != AVB_IO_RESULT_OK) {
+    avb_errorv("Error writing to partition '", partition_name, "'\n", NULL);
+    goto out;
+  }
+
+  ret = true;
+
+out:
+  return ret;
+}
diff --git a/lib/avb/rk_libavb_user/avb_user_verity.c b/lib/avb/rk_libavb_user/avb_user_verity.c
new file mode 100644
index 0000000000..e3f1a4d554
--- /dev/null
+++ b/lib/avb/rk_libavb_user/avb_user_verity.c
@@ -0,0 +1,213 @@
+/*
+ * Copyright (C) 2017 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_user_verity.h>
+
+/* Maximum allow length (in bytes) of a partition name, including
+ * ab_suffix.
+ */
+#define AVB_PART_NAME_MAX_SIZE 32
+
+/* Loads the toplevel AvbVBMetaImageHeader from the slot denoted by
+ * |ab_suffix| into |vbmeta_image|. No validation, verification, or
+ * byteswapping is performed.
+ *
+ * If successful, |true| is returned and the partition it was loaded
+ * from is returned in |out_partition_name| and the offset on said
+ * partition is returned in |out_vbmeta_offset|.
+ */
+static bool load_top_level_vbmeta_header(
+    AvbOps* ops,
+    const char* ab_suffix,
+    uint8_t vbmeta_image[AVB_VBMETA_IMAGE_HEADER_SIZE],
+    char out_partition_name[AVB_PART_NAME_MAX_SIZE],
+    uint64_t* out_vbmeta_offset) {
+  uint64_t vbmeta_offset = 0;
+  size_t num_read;
+  bool ret = false;
+  AvbIOResult io_res;
+
+  /* Construct full partition name. */
+  if (!avb_str_concat(out_partition_name,
+                      AVB_PART_NAME_MAX_SIZE,
+                      "vbmeta",
+                      6,
+                      ab_suffix,
+                      avb_strlen(ab_suffix))) {
+    avb_error("Partition name and suffix does not fit.\n");
+    goto out;
+  }
+
+  /* Only read the header, not the entire struct. */
+  io_res = ops->read_from_partition(ops,
+                                    out_partition_name,
+                                    vbmeta_offset,
+                                    AVB_VBMETA_IMAGE_HEADER_SIZE,
+                                    vbmeta_image,
+                                    &num_read);
+  if (io_res == AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION) {
+    AvbFooter footer;
+
+    /* Try looking for the vbmeta struct in 'boot' via the footer. */
+    if (!avb_str_concat(out_partition_name,
+                        AVB_PART_NAME_MAX_SIZE,
+                        "boot",
+                        4,
+                        ab_suffix,
+                        avb_strlen(ab_suffix))) {
+      avb_error("Partition name and suffix does not fit.\n");
+      goto out;
+    }
+    io_res = ops->read_from_partition(ops,
+                                      out_partition_name,
+                                      -AVB_FOOTER_SIZE,
+                                      AVB_FOOTER_SIZE,
+                                      &footer,
+                                      &num_read);
+    if (io_res != AVB_IO_RESULT_OK) {
+      avb_errorv("Error loading footer from partition '",
+                 out_partition_name,
+                 "'\n",
+                 NULL);
+      goto out;
+    }
+
+    if (avb_memcmp(footer.magic, AVB_FOOTER_MAGIC, AVB_FOOTER_MAGIC_LEN) != 0) {
+      avb_errorv("Data from '",
+                 out_partition_name,
+                 "' does not look like a vbmeta footer.\n",
+                 NULL);
+      goto out;
+    }
+
+    vbmeta_offset = avb_be64toh(footer.vbmeta_offset);
+    io_res = ops->read_from_partition(ops,
+                                      out_partition_name,
+                                      vbmeta_offset,
+                                      AVB_VBMETA_IMAGE_HEADER_SIZE,
+                                      vbmeta_image,
+                                      &num_read);
+  }
+
+  if (io_res != AVB_IO_RESULT_OK) {
+    avb_errorv(
+        "Error loading from partition '", out_partition_name, "'\n", NULL);
+    goto out;
+  }
+
+  if (out_vbmeta_offset != NULL) {
+    *out_vbmeta_offset = vbmeta_offset;
+  }
+
+  ret = true;
+
+out:
+  return ret;
+}
+
+bool avb_user_verity_get(AvbOps* ops,
+                         const char* ab_suffix,
+                         bool* out_verity_enabled) {
+  uint8_t vbmeta_image[AVB_VBMETA_IMAGE_HEADER_SIZE]; /* 256 bytes. */
+  char partition_name[AVB_PART_NAME_MAX_SIZE];        /* 32 bytes. */
+  AvbVBMetaImageHeader* header;
+  uint32_t flags;
+  bool ret = false;
+
+  if (!load_top_level_vbmeta_header(
+          ops, ab_suffix, vbmeta_image, partition_name, NULL)) {
+    goto out;
+  }
+
+  if (avb_memcmp(vbmeta_image, AVB_MAGIC, AVB_MAGIC_LEN) != 0) {
+    avb_errorv("Data from '",
+               partition_name,
+               "' does not look like a vbmeta header.\n",
+               NULL);
+    goto out;
+  }
+
+  /* Set/clear the HASHTREE_DISABLED bit, as requested. */
+  header = (AvbVBMetaImageHeader*)vbmeta_image;
+  flags = avb_be32toh(header->flags);
+
+  if (out_verity_enabled != NULL) {
+    *out_verity_enabled = !(flags & AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED);
+  }
+
+  ret = true;
+
+out:
+  return ret;
+}
+
+bool avb_user_verity_set(AvbOps* ops,
+                         const char* ab_suffix,
+                         bool enable_verity) {
+  uint8_t vbmeta_image[AVB_VBMETA_IMAGE_HEADER_SIZE]; /* 256 bytes. */
+  char partition_name[AVB_PART_NAME_MAX_SIZE];        /* 32 bytes. */
+  uint64_t vbmeta_offset;
+  AvbIOResult io_res;
+  AvbVBMetaImageHeader* header;
+  uint32_t flags;
+  bool ret = false;
+
+  if (!load_top_level_vbmeta_header(
+          ops, ab_suffix, vbmeta_image, partition_name, &vbmeta_offset)) {
+    goto out;
+  }
+
+  if (avb_memcmp(vbmeta_image, AVB_MAGIC, AVB_MAGIC_LEN) != 0) {
+    avb_errorv("Data from '",
+               partition_name,
+               "' does not look like a vbmeta header.\n",
+               NULL);
+    goto out;
+  }
+
+  /* Set/clear the HASHTREE_DISABLED bit, as requested. */
+  header = (AvbVBMetaImageHeader*)vbmeta_image;
+  flags = avb_be32toh(header->flags);
+  flags &= ~AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED;
+  if (!enable_verity) {
+    flags |= AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED;
+  }
+  header->flags = avb_htobe32(flags);
+
+  /* Write the header. */
+  io_res = ops->write_to_partition(ops,
+                                   partition_name,
+                                   vbmeta_offset,
+                                   AVB_VBMETA_IMAGE_HEADER_SIZE,
+                                   vbmeta_image);
+  if (io_res != AVB_IO_RESULT_OK) {
+    avb_errorv("Error writing to partition '", partition_name, "'\n", NULL);
+    goto out;
+  }
+
+  ret = true;
+
+out:
+  return ret;
+}

commit ea5fd1c643bd65fc08f6791c730f7e75032ac034
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Fri Sep 8 11:07:23 2017 +0800

    mmc: rpmb: Add interface functions
    
    Add interface functions for external programs,
    other functions can use it to read and write
    rpmb partitions.
    
    Change-Id: Ie94a6586077e1e9f4fc2924d283029f0a4a3e545
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/drivers/mmc/rpmb.c b/drivers/mmc/rpmb.c
index fcca28d914..dda84de781 100644
--- a/drivers/mmc/rpmb.c
+++ b/drivers/mmc/rpmb.c
@@ -350,3 +350,58 @@ int mmc_rpmb_write(struct mmc *mmc, void *addr, unsigned short blk,
 		return -1;
 	return cnt;
 }
+
+int read_counter(struct mmc *mmc, struct s_rpmb *requestpackets)
+{
+	if (mmc_rpmb_request(mmc, requestpackets, 1, false))
+		return -1;
+
+	if (mmc_rpmb_response(mmc, requestpackets, RPMB_RESP_WCOUNTER, 1))
+		return -1;
+
+	return 0;
+}
+
+int program_key(struct mmc *mmc, struct s_rpmb *requestpackets)
+{
+	if (mmc_rpmb_request(mmc, requestpackets, 1, true))
+		return -1;
+
+	memset(requestpackets, 0, sizeof(struct s_rpmb));
+
+	requestpackets->request = cpu_to_be16(RPMB_REQ_STATUS);
+
+	if (mmc_rpmb_request(mmc, requestpackets, 1, false))
+		return -1;
+
+	return mmc_rpmb_response(mmc, requestpackets, RPMB_RESP_KEY, 1);
+}
+
+int authenticated_read(struct mmc *mmc,
+	struct s_rpmb *requestpackets, uint16_t block_count)
+{
+	if (mmc_rpmb_request(mmc, requestpackets, 1, false))
+		return -1;
+
+	if (mmc_rpmb_response
+		(mmc, requestpackets, RPMB_RESP_READ_DATA, block_count))
+		return -1;
+
+	return 0;
+}
+
+int authenticated_write(struct mmc *mmc, struct s_rpmb *requestpackets)
+{
+	if (mmc_rpmb_request(mmc, requestpackets, 1, true))
+		return -1;
+
+	memset(requestpackets, 0, sizeof(struct s_rpmb));
+
+	requestpackets->request = cpu_to_be16(RPMB_REQ_STATUS);
+
+	if (mmc_rpmb_request(mmc, requestpackets, 1, false))
+		return -1;
+
+	return mmc_rpmb_response(mmc, requestpackets, RPMB_RESP_WRITE_DATA, 1);
+}
+
diff --git a/include/mmc.h b/include/mmc.h
index e7e21f0218..492b0434e7 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -336,6 +336,12 @@ int do_authenticatedread(struct s_rpmb *requestpackets, uint16_t block_count);
 int do_authenticatedwrite(struct s_rpmb *requestpackets);
 struct mmc *do_returnmmc(void);
 
+int read_counter(struct mmc *mmc, struct s_rpmb *requestpackets);
+int program_key(struct mmc *mmc, struct s_rpmb *requestpackets);
+int authenticated_read
+	(struct mmc *mmc, struct s_rpmb *requestpackets, uint16_t block_count);
+int authenticated_write(struct mmc *mmc, struct s_rpmb *requestpackets);
+
 /* Driver model support */
 
 /**

commit 87b8e6decf5c045a5720a2c26a393b4eb1e1e2bd
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Fri Sep 8 10:55:22 2017 +0800

    mmc: add mmc cmd to test tipc functions
    
    input mmc testrpmb to test store data to rpmb.
    
    Change-Id: I0b8361bd7a22fc7854e1a94ae4ae81972e523b3b
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/cmd/mmc.c b/cmd/mmc.c
index 7b9d5fe991..ca3721d90f 100644
--- a/cmd/mmc.c
+++ b/cmd/mmc.c
@@ -4,11 +4,12 @@
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
-
 #include <common.h>
 #include <command.h>
 #include <console.h>
 #include <mmc.h>
+#include <optee_include/OpteeClientTest.h>
+#include <optee_include/OpteeClientApiLib.h>
 
 static int curr_device = -1;
 
@@ -123,7 +124,120 @@ static int do_mmcinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return CMD_RET_SUCCESS;
 }
 
+#ifdef CONFIG_OPTEE_CLIENT
+static int do_mmc_testrpmb(cmd_tbl_t *cmdtp,
+		int flag, int argc, char * const argv[])
+{
+	struct mmc *mmc;
+
+	if (curr_device < 0) {
+		if (get_mmc_num() > 0) {
+			puts("MMC device available\n");
+			curr_device = 0;
+		} else {
+			puts("No MMC device available\n");
+			return 1;
+		}
+	}
+
+	mmc = init_mmc_device(curr_device, false);
+	if (!mmc)
+		return CMD_RET_FAILURE;
+
+	uint64_t value;
+	trusty_write_rollback_index(0x87654321, 0x1122334455667788);
+	trusty_read_rollback_index(0x87654321, &value);
+	debug("sizeof(value) %x\n ", sizeof(value));
+	if (value == 0x1122334455667788)
+		printf("good ! value==0x1122334455667788\n ");
+	uint8_t filename[] = "testfile1";
+	uint8_t data[] = "just a data";
+	write_to_keymaster(filename, sizeof(filename), data, sizeof(data));
+	return CMD_RET_SUCCESS;
+}
+#endif
+
 #ifdef CONFIG_SUPPORT_EMMC_RPMB
+char temp_original_part;
+int init_rpmb(void)
+{
+	struct mmc *mmc;
+
+	mmc = init_mmc_device(curr_device, false);
+	if (!mmc)
+		return CMD_RET_FAILURE;
+
+	if (!(mmc->version & MMC_VERSION_MMC)) {
+		printf("It is not a EMMC device\n");
+		return CMD_RET_FAILURE;
+	}
+	if (mmc->version < MMC_VERSION_4_41) {
+		printf("RPMB not supported before version 4.41\n");
+		return CMD_RET_FAILURE;
+	}
+
+		/* Switch to the RPMB partition */
+#ifndef CONFIG_BLK
+	temp_original_part = mmc->block_dev.hwpart;
+	debug("mmc->block_dev.hwpart\n");
+#else
+	temp_original_part = mmc_get_blk_desc(mmc)->hwpart;
+	debug("mmc_get_blk_desc(mmc)->hwpart\n");
+#endif
+	debug("init_rpmb temp_original_part = 0x%X\n", temp_original_part);
+	if (blk_select_hwpart_devnum
+		(IF_TYPE_MMC, curr_device, MMC_PART_RPMB) != 0)
+		return CMD_RET_FAILURE;
+
+	return CMD_RET_SUCCESS;
+}
+
+int finish_rpmb(void)
+{
+	/* Return to original partition */
+	debug("finish_rpmb temp_original_part = 0x%X\n", temp_original_part);
+	if (blk_select_hwpart_devnum
+		(IF_TYPE_MMC, curr_device, temp_original_part) != 0)
+		return CMD_RET_FAILURE;
+
+	return CMD_RET_SUCCESS;
+}
+
+int do_readcounter(struct s_rpmb *requestpackets)
+{
+	struct mmc *mmc = find_mmc_device(curr_device);
+
+	return read_counter(mmc, requestpackets);
+}
+
+int do_programkey(struct s_rpmb *requestpackets)
+{
+	struct mmc *mmc = find_mmc_device(curr_device);
+
+	return program_key(mmc, requestpackets);
+}
+
+int do_authenticatedread(struct s_rpmb *requestpackets, uint16_t block_count)
+{
+	struct mmc *mmc = find_mmc_device(curr_device);
+
+	return authenticated_read(mmc, requestpackets, block_count);
+}
+
+int do_authenticatedwrite(struct s_rpmb *requestpackets)
+{
+	struct mmc *mmc = find_mmc_device(curr_device);
+
+	return authenticated_write(mmc, requestpackets);
+}
+
+struct mmc *do_returnmmc(void)
+{
+	struct mmc *mmc = find_mmc_device(curr_device);
+
+	return mmc;
+}
+
 static int confirm_key_prog(void)
 {
 	puts("Warning: Programming authentication key can be done only once !\n"
@@ -805,6 +919,9 @@ static cmd_tbl_t cmd_mmc[] = {
 	U_BOOT_CMD_MKENT(partconf, 5, 0, do_mmc_partconf, "", ""),
 	U_BOOT_CMD_MKENT(rst-function, 3, 0, do_mmc_rst_func, "", ""),
 #endif
+#ifdef CONFIG_OPTEE_CLIENT
+	U_BOOT_CMD_MKENT(testrpmb, 1, 0, do_mmc_testrpmb, "", ""),
+#endif
 #ifdef CONFIG_SUPPORT_EMMC_RPMB
 	U_BOOT_CMD_MKENT(rpmb, CONFIG_SYS_MAXARGS, 1, do_mmcrpmb, "", ""),
 #endif
@@ -869,6 +986,9 @@ U_BOOT_CMD(
 	" - Change the RST_n_FUNCTION field of the specified device\n"
 	"   WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values.\n"
 #endif
+#ifdef CONFIG_OPTEE_CLIENT
+	"mmc testrpmb - test CA call static TA,and TA call rpmb in uboot\n"
+#endif
 #ifdef CONFIG_SUPPORT_EMMC_RPMB
 	"mmc rpmb read addr blk# cnt [address of auth-key] - block size is 256 bytes\n"
 	"mmc rpmb write addr blk# cnt <address of auth-key> - block size is 256 bytes\n"
@@ -888,3 +1008,4 @@ U_BOOT_CMD(
 	"display MMC info",
 	"- display info of the current MMC device"
 );
+
diff --git a/include/mmc.h b/include/mmc.h
index 75d2fbd453..e7e21f0218 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -299,6 +299,43 @@
 #define MMC_NUM_BOOT_PARTITION	2
 #define MMC_PART_RPMB           3       /* RPMB partition number */
 
+/* Sizes of RPMB data frame */
+#define RPMB_SZ_STUFF		196
+#define RPMB_SZ_MAC		32
+#define RPMB_SZ_DATA		256
+#define RPMB_SZ_NONCE		16
+
+/* Structure of RPMB data frame. */
+struct s_rpmb {
+	unsigned char stuff[RPMB_SZ_STUFF];
+	unsigned char mac[RPMB_SZ_MAC];
+	unsigned char data[RPMB_SZ_DATA];
+	unsigned char nonce[RPMB_SZ_NONCE];
+	unsigned int write_counter;
+	unsigned short address;
+	unsigned short block_count;
+	unsigned short result;
+	unsigned short request;
+} __packed;
+
+struct s_rpmb_verify {
+	unsigned char data[RPMB_SZ_DATA];
+	unsigned char nonce[RPMB_SZ_NONCE];
+	unsigned int write_counter;
+	unsigned short address;
+	unsigned short block_count;
+	unsigned short result;
+	unsigned short request;
+} __packed;
+
+int init_rpmb(void);
+int finish_rpmb(void);
+int do_readcounter(struct s_rpmb *requestpackets);
+int do_programkey(struct s_rpmb *requestpackets);
+int do_authenticatedread(struct s_rpmb *requestpackets, uint16_t block_count);
+int do_authenticatedwrite(struct s_rpmb *requestpackets);
+struct mmc *do_returnmmc(void);
+
 /* Driver model support */
 
 /**
@@ -711,3 +748,4 @@ int mmc_get_env_dev(void);
 struct blk_desc *mmc_get_blk_desc(struct mmc *mmc);
 
 #endif /* _MMC_H_ */
+

commit abdd24375050db7ce121b48477cc332d6c8c40f6
Author: hisping <hisping.lin@rock-chips.com>
Date:   Thu Aug 24 17:15:26 2017 +0800

    lib: add tipc functions
    
    tipc functions is used for uboot communicate
    with TEE. uboot can request service for secure
    store or secure algorithm.
    
    Change-Id: Ie44095aff4c044feceb5f362abf6e3d24ceb8d4c
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/include/optee_include/258be795-f9ca-40e6-a8699ce6886c5d5d.h b/include/optee_include/258be795-f9ca-40e6-a8699ce6886c5d5d.h
new file mode 100644
index 0000000000..a1df9239ed
--- /dev/null
+++ b/include/optee_include/258be795-f9ca-40e6-a8699ce6886c5d5d.h
@@ -0,0 +1,8 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+extern const uint8_t keymaster_data[];
+extern const uint32_t keymaster_size;
diff --git a/include/optee_include/OpteeClientApiLib.h b/include/optee_include/OpteeClientApiLib.h
new file mode 100644
index 0000000000..a88565fbff
--- /dev/null
+++ b/include/optee_include/OpteeClientApiLib.h
@@ -0,0 +1,10 @@
+/*
+ * Copyright 2017, Rockchip Electronics Co., Ltd
+ * hisping lin, <hisping.lin@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#include <optee_include/tee_base_types.h>
+#include <optee_include/tee_client_api.h>
+
+TEEC_Result OpteeClientApiLibInitialize(void);
diff --git a/include/optee_include/OpteeClientImage.h b/include/optee_include/OpteeClientImage.h
new file mode 100644
index 0000000000..d18928480a
--- /dev/null
+++ b/include/optee_include/OpteeClientImage.h
@@ -0,0 +1,17 @@
+/*
+ * Copyright 2017, Rockchip Electronics Co., Ltd
+ * hisping lin, <hisping.lin@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#ifndef __OPTEE_CLIENT_IMAGE_GUID_H__
+#define __OPTEE_CLIENT_IMAGE_GUID_H__
+
+#include <optee_include/tee_base_types.h>
+
+#define OPTEE_CLIENT_IMAGE_GUID \
+{ \
+	0xee3206cb, 0x950a, 0x49eb, \
+	{ 0xbd, 0xd7, 0xc1, 0x95, 0xcb, 0x9b, 0x2e, 0xbf } \
+}
+#endif
diff --git a/include/optee_include/OpteeClientMem.h b/include/optee_include/OpteeClientMem.h
new file mode 100644
index 0000000000..2e4c877b36
--- /dev/null
+++ b/include/optee_include/OpteeClientMem.h
@@ -0,0 +1,14 @@
+/*
+ * Copyright 2017, Rockchip Electronics Co., Ltd
+ * hisping lin, <hisping.lin@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <linux/types.h>
+
+void OpteeClientMemInit(void);
+
+void *OpteeClientMemAlloc(uint32_t length);
+
+void  OpteeClientMemFree(void *mem);
diff --git a/include/optee_include/OpteeClientRPC.h b/include/optee_include/OpteeClientRPC.h
new file mode 100644
index 0000000000..3efa427d37
--- /dev/null
+++ b/include/optee_include/OpteeClientRPC.h
@@ -0,0 +1,53 @@
+/*
+ * Copyright 2017, Rockchip Electronics Co., Ltd
+ * hisping lin, <hisping.lin@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#include <optee_include/tee_base_types.h>
+#include <optee_include/OpteeClientApiLib.h>
+
+typedef struct{
+	unsigned int Arg0;
+	unsigned int Arg1;
+	unsigned int Arg2;
+	unsigned int Arg3;
+	unsigned int Arg4;
+	unsigned int Arg5;
+	unsigned int Arg6;
+	unsigned int Arg7;
+} ARM_SMC_ARGS;
+
+#define RPMB_PACKET_DATA_TO_UINT16(d) ((d[0] << 8) + (d[1]))
+#define RPMB_PACKET_DATA_TO_UINT16(d) ((d[0] << 8) + (d[1]))
+#define RPMB_STUFF_DATA_SIZE                        196
+#define RPMB_KEY_MAC_SIZE                           32
+#define RPMB_DATA_SIZE                              256
+#define RPMB_NONCE_SIZE                             16
+#define RPMB_DATA_FRAME_SIZE                        512
+
+typedef struct rpmb_data_frame {
+	unsigned char stuff_bytes[RPMB_STUFF_DATA_SIZE];
+	unsigned char key_mac[RPMB_KEY_MAC_SIZE];
+	unsigned char data[RPMB_DATA_SIZE];
+	unsigned char nonce[RPMB_NONCE_SIZE];
+	unsigned char write_counter[4];
+	unsigned char address[2];
+	unsigned char block_count[2];
+	unsigned char op_result[2];
+	unsigned char msg_type[2];
+} EFI_RK_RPMB_DATA_PACKET;
+
+typedef struct s_rpmb_back {
+	unsigned char stuff[RPMB_STUFF_DATA_SIZE];
+	unsigned char mac[RPMB_KEY_MAC_SIZE];
+	unsigned char data[RPMB_DATA_SIZE];
+	unsigned char nonce[RPMB_NONCE_SIZE];
+	unsigned int write_counter;
+	unsigned short address;
+	unsigned short block_count;
+	unsigned short result;
+	unsigned short request;
+} EFI_RK_RPMB_DATA_PACKET_BACK;
+
+TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs);
diff --git a/include/optee_include/OpteeClientSMC.h b/include/optee_include/OpteeClientSMC.h
new file mode 100644
index 0000000000..2bbcbe9063
--- /dev/null
+++ b/include/optee_include/OpteeClientSMC.h
@@ -0,0 +1,26 @@
+/*
+ * Copyright 2017, Rockchip Electronics Co., Ltd
+ * hisping lin, <hisping.lin@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <optee_include/tee_base_types.h>
+#include <optee_include/OpteeClientApiLib.h>
+
+TEEC_Result TEEC_SMC_OpenSession(TEEC_Context * context,
+				TEEC_Session * session,
+				const TEEC_UUID * destination,
+				TEEC_Operation * operation,
+				uint32_t *error_origin);
+
+TEEC_Result TEEC_SMC_CloseSession(TEEC_Session *session,
+				uint32_t *error_origin);
+
+TEEC_Result TEEC_SMC_InvokeCommand(TEEC_Session *session,
+				uint32_t cmd_id,
+				TEEC_Operation *operation,
+				uint32_t *error_origin);
+
+TEEC_Result TEEC_SMC_RequestCancellation(TEEC_Operation *operation,
+				uint32_t *error_origin);
diff --git a/include/optee_include/OpteeClientTest.h b/include/optee_include/OpteeClientTest.h
new file mode 100644
index 0000000000..e7e63ef042
--- /dev/null
+++ b/include/optee_include/OpteeClientTest.h
@@ -0,0 +1,16 @@
+/*
+ * Copyright 2017, Rockchip Electronics Co., Ltd
+ * hisping lin, <hisping.lin@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+void test_optee(void);
+uint32_t trusty_read_rollback_index(uint32_t slot, uint64_t *value);
+uint32_t trusty_write_rollback_index(uint32_t slot, uint64_t value);
+uint32_t trusty_read_permanent_attributes(uint8_t *attributes, uint32_t size);
+uint32_t trusty_write_permanent_attributes(uint8_t *attributes, uint32_t size);
+uint32_t trusty_read_lock_state(uint8_t *lock_state);
+uint32_t trusty_write_lock_state(uint8_t lock_state);
+uint32_t write_to_keymaster
+	(uint8_t *filename, uint32_t filename_size,
+	uint8_t *data, uint32_t data_size);
diff --git a/include/optee_include/tee_api_defines.h b/include/optee_include/tee_api_defines.h
new file mode 100644
index 0000000000..75852bddf0
--- /dev/null
+++ b/include/optee_include/tee_api_defines.h
@@ -0,0 +1,441 @@
+/*
+ * Copyright 2017, Rockchip Electronics Co., Ltd
+ * hisping lin, <hisping.lin@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+/* Based on GP TEE Internal Core API Specification Version 1.1 */
+#ifndef TEE_API_DEFINES_H
+#define TEE_API_DEFINES_H
+
+#include <optee_include/tee_base_types.h>
+
+#define TEE_INT_CORE_API_SPEC_VERSION     0x0000000A
+
+#define TEE_HANDLE_NULL                   0
+
+#define TEE_TIMEOUT_INFINITE              0xFFFFFFFF
+
+/* API Error Codes */
+#define TEE_SUCCESS                       0x00000000
+#define TEE_ERROR_CORRUPT_OBJECT          0xF0100001
+#define TEE_ERROR_CORRUPT_OBJECT_2        0xF0100002
+#define TEE_ERROR_STORAGE_NOT_AVAILABLE   0xF0100003
+#define TEE_ERROR_STORAGE_NOT_AVAILABLE_2 0xF0100004
+#define TEE_ERROR_GENERIC                 0xFFFF0000
+#define TEE_ERROR_ACCESS_DENIED           0xFFFF0001
+#define TEE_ERROR_CANCEL                  0xFFFF0002
+#define TEE_ERROR_ACCESS_CONFLICT         0xFFFF0003
+#define TEE_ERROR_EXCESS_DATA             0xFFFF0004
+#define TEE_ERROR_BAD_FORMAT              0xFFFF0005
+#define TEE_ERROR_BAD_PARAMETERS          0xFFFF0006
+#define TEE_ERROR_BAD_STATE               0xFFFF0007
+#define TEE_ERROR_ITEM_NOT_FOUND          0xFFFF0008
+#define TEE_ERROR_NOT_IMPLEMENTED         0xFFFF0009
+#define TEE_ERROR_NOT_SUPPORTED           0xFFFF000A
+#define TEE_ERROR_NO_DATA                 0xFFFF000B
+#define TEE_ERROR_OUT_OF_MEMORY           0xFFFF000C
+#define TEE_ERROR_BUSY                    0xFFFF000D
+#define TEE_ERROR_COMMUNICATION           0xFFFF000E
+#define TEE_ERROR_SECURITY                0xFFFF000F
+#define TEE_ERROR_SHORT_BUFFER            0xFFFF0010
+#define TEE_ERROR_EXTERNAL_CANCEL         0xFFFF0011
+#define TEE_ERROR_OVERFLOW                0xFFFF300F
+#define TEE_ERROR_TARGET_DEAD             0xFFFF3024
+#define TEE_ERROR_STORAGE_NO_SPACE        0xFFFF3041
+#define TEE_ERROR_MAC_INVALID             0xFFFF3071
+#define TEE_ERROR_SIGNATURE_INVALID       0xFFFF3072
+#define TEE_ERROR_TIME_NOT_SET            0xFFFF5000
+#define TEE_ERROR_TIME_NEEDS_RESET        0xFFFF5001
+
+/*
+ * Proprietary error codes.
+ * All proprietary error codes should use the 0xF57E prefix.
+ */
+#define TEE_ERROR_SYSTEM_BUSY           0xF57E0000
+#define TEE_ERROR_FILE_NOT_FOUND        0xF57E0010
+
+/* Parameter Type Constants */
+#define TEE_PARAM_TYPE_NONE             0
+#define TEE_PARAM_TYPE_VALUE_INPUT      1
+#define TEE_PARAM_TYPE_VALUE_OUTPUT     2
+#define TEE_PARAM_TYPE_VALUE_INOUT      3
+#define TEE_PARAM_TYPE_MEMREF_INPUT     5
+#define TEE_PARAM_TYPE_MEMREF_OUTPUT    6
+#define TEE_PARAM_TYPE_MEMREF_INOUT     7
+
+/* Login Type Constants */
+#define TEE_LOGIN_PUBLIC                0x00000000
+#define TEE_LOGIN_USER                  0x00000001
+#define TEE_LOGIN_GROUP                 0x00000002
+#define TEE_LOGIN_APPLICATION           0x00000004
+#define TEE_LOGIN_APPLICATION_USER      0x00000005
+#define TEE_LOGIN_APPLICATION_GROUP     0x00000006
+#define TEE_LOGIN_TRUSTED_APP           0xF0000000
+
+/* Origin Code Constants */
+#define TEE_ORIGIN_API                  0x00000001
+#define TEE_ORIGIN_COMMS                0x00000002
+#define TEE_ORIGIN_TEE                  0x00000003
+#define TEE_ORIGIN_TRUSTED_APP          0x00000004
+
+/* Property Sets pseudo handles */
+#define TEE_PROPSET_TEE_IMPLEMENTATION  ((TEE_PropSetHandle)0xFFFFFFFD)
+#define TEE_PROPSET_CURRENT_CLIENT      ((TEE_PropSetHandle)0xFFFFFFFE)
+#define TEE_PROPSET_CURRENT_TA          ((TEE_PropSetHandle)0xFFFFFFFF)
+
+/* Memory Access Rights Constants */
+#define TEE_MEMORY_ACCESS_READ             0x00000001
+#define TEE_MEMORY_ACCESS_WRITE            0x00000002
+#define TEE_MEMORY_ACCESS_ANY_OWNER        0x00000004
+
+/* Other constants */
+#define TEE_STORAGE_PRIVATE                0x00000001
+
+#define TEE_DATA_FLAG_ACCESS_READ          0x00000001
+#define TEE_DATA_FLAG_ACCESS_WRITE         0x00000002
+#define TEE_DATA_FLAG_ACCESS_WRITE_META    0x00000004
+#define TEE_DATA_FLAG_SHARE_READ           0x00000010
+#define TEE_DATA_FLAG_SHARE_WRITE          0x00000020
+#define TEE_DATA_FLAG_EXCLUSIVE            0x00000400
+#define TEE_DATA_MAX_POSITION              0xFFFFFFFF
+#define TEE_OBJECT_ID_MAX_LEN              64
+#define TEE_USAGE_EXTRACTABLE              0x00000001
+#define TEE_USAGE_ENCRYPT                  0x00000002
+#define TEE_USAGE_DECRYPT                  0x00000004
+#define TEE_USAGE_MAC                      0x00000008
+#define TEE_USAGE_SIGN                     0x00000010
+#define TEE_USAGE_VERIFY                   0x00000020
+#define TEE_USAGE_DERIVE                   0x00000040
+#define TEE_HANDLE_FLAG_PERSISTENT         0x00010000
+#define TEE_HANDLE_FLAG_INITIALIZED        0x00020000
+#define TEE_HANDLE_FLAG_KEY_SET            0x00040000
+#define TEE_HANDLE_FLAG_EXPECT_TWO_KEYS    0x00080000
+#define TEE_OPERATION_CIPHER               1
+#define TEE_OPERATION_MAC                  3
+#define TEE_OPERATION_AE                   4
+#define TEE_OPERATION_DIGEST               5
+#define TEE_OPERATION_ASYMMETRIC_CIPHER    6
+#define TEE_OPERATION_ASYMMETRIC_SIGNATURE 7
+#define TEE_OPERATION_KEY_DERIVATION       8
+#define TEE_OPERATION_STATE_INITIAL        0x00000000
+#define TEE_OPERATION_STATE_ACTIVE         0x00000001
+
+/* Algorithm Identifiers */
+#define TEE_ALG_AES_ECB_NOPAD                   0x10000010
+#define TEE_ALG_AES_CBC_NOPAD                   0x10000110
+#define TEE_ALG_AES_CTR                         0x10000210
+#define TEE_ALG_AES_CTS                         0x10000310
+#define TEE_ALG_AES_XTS                         0x10000410
+#define TEE_ALG_AES_CBC_MAC_NOPAD               0x30000110
+#define TEE_ALG_AES_CBC_MAC_PKCS5               0x30000510
+#define TEE_ALG_AES_CMAC                        0x30000610
+#define TEE_ALG_AES_CCM                         0x40000710
+#define TEE_ALG_AES_GCM                         0x40000810
+#define TEE_ALG_DES_ECB_NOPAD                   0x10000011
+#define TEE_ALG_DES_CBC_NOPAD                   0x10000111
+#define TEE_ALG_DES_CBC_MAC_NOPAD               0x30000111
+#define TEE_ALG_DES_CBC_MAC_PKCS5               0x30000511
+#define TEE_ALG_DES3_ECB_NOPAD                  0x10000013
+#define TEE_ALG_DES3_CBC_NOPAD                  0x10000113
+#define TEE_ALG_DES3_CBC_MAC_NOPAD              0x30000113
+#define TEE_ALG_DES3_CBC_MAC_PKCS5              0x30000513
+#define TEE_ALG_RSASSA_PKCS1_V1_5_MD5           0x70001830
+#define TEE_ALG_RSASSA_PKCS1_V1_5_SHA1          0x70002830
+#define TEE_ALG_RSASSA_PKCS1_V1_5_SHA224        0x70003830
+#define TEE_ALG_RSASSA_PKCS1_V1_5_SHA256        0x70004830
+#define TEE_ALG_RSASSA_PKCS1_V1_5_SHA384        0x70005830
+#define TEE_ALG_RSASSA_PKCS1_V1_5_SHA512        0x70006830
+#define TEE_ALG_RSASSA_PKCS1_V1_5_MD5SHA1       0x7000F830
+#define TEE_ALG_RSASSA_PKCS1_PSS_MGF1_SHA1      0x70212930
+#define TEE_ALG_RSASSA_PKCS1_PSS_MGF1_SHA224    0x70313930
+#define TEE_ALG_RSASSA_PKCS1_PSS_MGF1_SHA256    0x70414930
+#define TEE_ALG_RSASSA_PKCS1_PSS_MGF1_SHA384    0x70515930
+#define TEE_ALG_RSASSA_PKCS1_PSS_MGF1_SHA512    0x70616930
+#define TEE_ALG_RSAES_PKCS1_V1_5                0x60000130
+#define TEE_ALG_RSAES_PKCS1_OAEP_MGF1_SHA1      0x60210230
+#define TEE_ALG_RSAES_PKCS1_OAEP_MGF1_SHA224    0x60310230
+#define TEE_ALG_RSAES_PKCS1_OAEP_MGF1_SHA256    0x60410230
+#define TEE_ALG_RSAES_PKCS1_OAEP_MGF1_SHA384    0x60510230
+#define TEE_ALG_RSAES_PKCS1_OAEP_MGF1_SHA512    0x60610230
+#define TEE_ALG_RSA_NOPAD                       0x60000030
+#define TEE_ALG_DSA_SHA1                        0x70002131
+#define TEE_ALG_DSA_SHA224                      0x70003131
+#define TEE_ALG_DSA_SHA256                      0x70004131
+#define TEE_ALG_DH_DERIVE_SHARED_SECRET         0x80000032
+#define TEE_ALG_MD5                             0x50000001
+#define TEE_ALG_SHA1                            0x50000002
+#define TEE_ALG_SHA224                          0x50000003
+#define TEE_ALG_SHA256                          0x50000004
+#define TEE_ALG_SHA384                          0x50000005
+#define TEE_ALG_SHA512                          0x50000006
+#define TEE_ALG_MD5SHA1                         0x5000000F
+#define TEE_ALG_HMAC_MD5                        0x30000001
+#define TEE_ALG_HMAC_SHA1                       0x30000002
+#define TEE_ALG_HMAC_SHA224                     0x30000003
+#define TEE_ALG_HMAC_SHA256                     0x30000004
+#define TEE_ALG_HMAC_SHA384                     0x30000005
+#define TEE_ALG_HMAC_SHA512                     0x30000006
+#define TEE_ALG_ECDSA_P192                      0x70001042
+#define TEE_ALG_ECDSA_P224                      0x70002042
+#define TEE_ALG_ECDSA_P256                      0x70003042
+#define TEE_ALG_ECDSA_P384                      0x70004042
+#define TEE_ALG_ECDSA_P521                      0x70005042
+#define TEE_ALG_ECDH_P192                       0x80001042
+#define TEE_ALG_ECDH_P224                       0x80002042
+#define TEE_ALG_ECDH_P256                       0x80003042
+#define TEE_ALG_ECDH_P384                       0x80004042
+#define TEE_ALG_ECDH_P521                       0x80005042
+
+/* Object Types */
+
+#define TEE_TYPE_AES                        0xA0000010
+#define TEE_TYPE_DES                        0xA0000011
+#define TEE_TYPE_DES3                       0xA0000013
+#define TEE_TYPE_HMAC_MD5                   0xA0000001
+#define TEE_TYPE_HMAC_SHA1                  0xA0000002
+#define TEE_TYPE_HMAC_SHA224                0xA0000003
+#define TEE_TYPE_HMAC_SHA256                0xA0000004
+#define TEE_TYPE_HMAC_SHA384                0xA0000005
+#define TEE_TYPE_HMAC_SHA512                0xA0000006
+#define TEE_TYPE_RSA_PUBLIC_KEY             0xA0000030
+#define TEE_TYPE_RSA_KEYPAIR                0xA1000030
+#define TEE_TYPE_DSA_PUBLIC_KEY             0xA0000031
+#define TEE_TYPE_DSA_KEYPAIR                0xA1000031
+#define TEE_TYPE_DH_KEYPAIR                 0xA1000032
+#define TEE_TYPE_ECDSA_PUBLIC_KEY           0xA0000041
+#define TEE_TYPE_ECDSA_KEYPAIR              0xA1000041
+#define TEE_TYPE_ECDH_PUBLIC_KEY            0xA0000042
+#define TEE_TYPE_ECDH_KEYPAIR               0xA1000042
+#define TEE_TYPE_GENERIC_SECRET             0xA0000000
+#define TEE_TYPE_CORRUPTED_OBJECT           0xA00000BE
+#define TEE_TYPE_DATA                       0xA00000BF
+
+/* List of Object or Operation Attributes */
+
+#define TEE_ATTR_SECRET_VALUE               0xC0000000
+#define TEE_ATTR_RSA_MODULUS                0xD0000130
+#define TEE_ATTR_RSA_PUBLIC_EXPONENT        0xD0000230
+#define TEE_ATTR_RSA_PRIVATE_EXPONENT       0xC0000330
+#define TEE_ATTR_RSA_PRIME1                 0xC0000430
+#define TEE_ATTR_RSA_PRIME2                 0xC0000530
+#define TEE_ATTR_RSA_EXPONENT1              0xC0000630
+#define TEE_ATTR_RSA_EXPONENT2              0xC0000730
+#define TEE_ATTR_RSA_COEFFICIENT            0xC0000830
+#define TEE_ATTR_DSA_PRIME                  0xD0001031
+#define TEE_ATTR_DSA_SUBPRIME               0xD0001131
+#define TEE_ATTR_DSA_BASE                   0xD0001231
+#define TEE_ATTR_DSA_PUBLIC_VALUE           0xD0000131
+#define TEE_ATTR_DSA_PRIVATE_VALUE          0xC0000231
+#define TEE_ATTR_DH_PRIME                   0xD0001032
+#define TEE_ATTR_DH_SUBPRIME                0xD0001132
+#define TEE_ATTR_DH_BASE                    0xD0001232
+#define TEE_ATTR_DH_X_BITS                  0xF0001332
+#define TEE_ATTR_DH_PUBLIC_VALUE            0xD0000132
+#define TEE_ATTR_DH_PRIVATE_VALUE           0xC0000232
+#define TEE_ATTR_RSA_OAEP_LABEL             0xD0000930
+#define TEE_ATTR_RSA_PSS_SALT_LENGTH        0xF0000A30
+#define TEE_ATTR_ECC_PUBLIC_VALUE_X         0xD0000141
+#define TEE_ATTR_ECC_PUBLIC_VALUE_Y         0xD0000241
+#define TEE_ATTR_ECC_PRIVATE_VALUE          0xC0000341
+#define TEE_ATTR_ECC_CURVE                  0xF0000441
+
+#define TEE_ATTR_BIT_PROTECTED		(1 << 28)
+#define TEE_ATTR_BIT_VALUE		(1 << 29)
+
+/* Panicked Functions Identification */
+/* TA Interface */
+#define TEE_PANIC_ID_TA_CLOSESESSIONENTRYPOINT      0x00000101
+#define TEE_PANIC_ID_TA_CREATEENTRYPOINT            0x00000102
+#define TEE_PANIC_ID_TA_DESTROYENTRYPOINT           0x00000103
+#define TEE_PANIC_ID_TA_INVOKECOMMANDENTRYPOINT     0x00000104
+#define TEE_PANIC_ID_TA_OPENSESSIONENTRYPOINT       0x00000105
+/* Property Access */
+#define TEE_PANIC_ID_TEE_ALLOCATEPROPERTYENUMERATOR 0x00000201
+#define TEE_PANIC_ID_TEE_FREEPROPERTYENUMERATOR     0x00000202
+#define TEE_PANIC_ID_TEE_GETNEXTPROPERTY            0x00000203
+#define TEE_PANIC_ID_TEE_GETPROPERTYASBINARYBLOCK   0x00000204
+#define TEE_PANIC_ID_TEE_GETPROPERTYASBOOL          0x00000205
+#define TEE_PANIC_ID_TEE_GETPROPERTYASIDENTITY      0x00000206
+#define TEE_PANIC_ID_TEE_GETPROPERTYASSTRING        0x00000207
+#define TEE_PANIC_ID_TEE_GETPROPERTYASU32           0x00000208
+#define TEE_PANIC_ID_TEE_GETPROPERTYASUUID          0x00000209
+#define TEE_PANIC_ID_TEE_GETPROPERTYNAME            0x0000020A
+#define TEE_PANIC_ID_TEE_RESETPROPERTYENUMERATOR    0x0000020B
+#define TEE_PANIC_ID_TEE_STARTPROPERTYENUMERATOR    0x0000020C
+/* Panic Function */
+#define TEE_PANIC_ID_TEE_PANIC                      0x00000301
+/* Internal Client API */
+#define TEE_PANIC_ID_TEE_CLOSETASESSION             0x00000401
+#define TEE_PANIC_ID_TEE_INVOKETACOMMAND            0x00000402
+#define TEE_PANIC_ID_TEE_OPENTASESSION              0x00000403
+/* Cancellation */
+#define TEE_PANIC_ID_TEE_GETCANCELLATIONFLAG        0x00000501
+#define TEE_PANIC_ID_TEE_MASKCANCELLATION           0x00000502
+#define TEE_PANIC_ID_TEE_UNMASKCANCELLATION         0x00000503
+/* Memory Management */
+#define TEE_PANIC_ID_TEE_CHECKMEMORYACCESSRIGHTS    0x00000601
+#define TEE_PANIC_ID_TEE_FREE                       0x00000602
+#define TEE_PANIC_ID_TEE_GETINSTANCEDATA            0x00000603
+#define TEE_PANIC_ID_TEE_MALLOC                     0x00000604
+#define TEE_PANIC_ID_TEE_MEMCOMPARE                 0x00000605
+#define TEE_PANIC_ID_TEE_MEMFILL                    0x00000606
+#define TEE_PANIC_ID_TEE_MEMMOVE                    0x00000607
+#define TEE_PANIC_ID_TEE_REALLOC                    0x00000608
+#define TEE_PANIC_ID_TEE_SETINSTANCEDATA            0x00000609
+/* Generic Object */
+#define TEE_PANIC_ID_TEE_CLOSEOBJECT                0x00000701
+#define TEE_PANIC_ID_TEE_GETOBJECTBUFFERATTRIBUTE   0x00000702
+/* deprecated */
+#define TEE_PANIC_ID_TEE_GETOBJECTINFO              0x00000703
+#define TEE_PANIC_ID_TEE_GETOBJECTVALUEATTRIBUTE    0x00000704
+/* deprecated */
+#define TEE_PANIC_ID_TEE_RESTRICTOBJECTUSAGE        0x00000705
+#define TEE_PANIC_ID_TEE_GETOBJECTINFO1             0x00000706
+#define TEE_PANIC_ID_TEE_RESTRICTOBJECTUSAGE1       0x00000707
+/* Transient Object */
+#define TEE_PANIC_ID_TEE_ALLOCATETRANSIENTOBJECT    0x00000801
+/* deprecated */
+#define TEE_PANIC_ID_TEE_COPYOBJECTATTRIBUTES       0x00000802
+#define TEE_PANIC_ID_TEE_FREETRANSIENTOBJECT        0x00000803
+#define TEE_PANIC_ID_TEE_GENERATEKEY                0x00000804
+#define TEE_PANIC_ID_TEE_INITREFATTRIBUTE           0x00000805
+#define TEE_PANIC_ID_TEE_INITVALUEATTRIBUTE         0x00000806
+#define TEE_PANIC_ID_TEE_POPULATETRANSIENTOBJECT    0x00000807
+#define TEE_PANIC_ID_TEE_RESETTRANSIENTOBJECT       0x00000808
+#define TEE_PANIC_ID_TEE_COPYOBJECTATTRIBUTES1      0x00000809
+/* Persistent Object */
+/* deprecated */
+#define TEE_PANIC_ID_TEE_CLOSEANDDELETEPERSISTENTOBJECT  0x00000901
+#define TEE_PANIC_ID_TEE_CREATEPERSISTENTOBJECT          0x00000902
+#define TEE_PANIC_ID_TEE_OPENPERSISTENTOBJECT            0x00000903
+#define TEE_PANIC_ID_TEE_RENAMEPERSISTENTOBJECT          0x00000904
+#define TEE_PANIC_ID_TEE_CLOSEANDDELETEPERSISTENTOBJECT1 0x00000905
+/* Persistent Object Enumeration */
+#define TEE_PANIC_ID_TEE_ALLOCATEPERSISTENTOBJECTENUMERATOR 0x00000A01
+#define TEE_PANIC_ID_TEE_FREEPERSISTENTOBJECTENUMERATOR     0x00000A02
+#define TEE_PANIC_ID_TEE_GETNEXTPERSISTENTOBJECT            0x00000A03
+#define TEE_PANIC_ID_TEE_RESETPERSISTENTOBJECTENUMERATOR    0x00000A04
+#define TEE_PANIC_ID_TEE_STARTPERSISTENTOBJECTENUMERATOR    0x00000A05
+/* Data Stream Access */
+#define TEE_PANIC_ID_TEE_READOBJECTDATA             0x00000B01
+#define TEE_PANIC_ID_TEE_SEEKOBJECTDATA             0x00000B02
+#define TEE_PANIC_ID_TEE_TRUNCATEOBJECTDATA         0x00000B03
+#define TEE_PANIC_ID_TEE_WRITEOBJECTDATA            0x00000B04
+/* Generic Operation */
+#define TEE_PANIC_ID_TEE_ALLOCATEOPERATION          0x00000C01
+#define TEE_PANIC_ID_TEE_COPYOPERATION              0x00000C02
+#define TEE_PANIC_ID_TEE_FREEOPERATION              0x00000C03
+#define TEE_PANIC_ID_TEE_GETOPERATIONINFO           0x00000C04
+#define TEE_PANIC_ID_TEE_RESETOPERATION             0x00000C05
+#define TEE_PANIC_ID_TEE_SETOPERATIONKEY            0x00000C06
+#define TEE_PANIC_ID_TEE_SETOPERATIONKEY2           0x00000C07
+#define TEE_PANIC_ID_TEE_GETOPERATIONINFOMULTIPLE   0x00000C08
+/* Message Digest */
+#define TEE_PANIC_ID_TEE_DIGESTDOFINAL              0x00000D01
+#define TEE_PANIC_ID_TEE_DIGESTUPDATE               0x00000D02
+/* Symmetric Cipher */
+#define TEE_PANIC_ID_TEE_CIPHERDOFINAL              0x00000E01
+#define TEE_PANIC_ID_TEE_CIPHERINIT                 0x00000E02
+#define TEE_PANIC_ID_TEE_CIPHERUPDATE               0x00000E03
+/* MAC */
+#define TEE_PANIC_ID_TEE_MACCOMPAREFINAL            0x00000F01
+#define TEE_PANIC_ID_TEE_MACCOMPUTEFINAL            0x00000F02
+#define TEE_PANIC_ID_TEE_MACINIT                    0x00000F03
+#define TEE_PANIC_ID_TEE_MACUPDATE                  0x00000F04
+/* Authenticated Encryption */
+#define TEE_PANIC_ID_TEE_AEDECRYPTFINAL             0x00001001
+#define TEE_PANIC_ID_TEE_AEENCRYPTFINAL             0x00001002
+#define TEE_PANIC_ID_TEE_AEINIT                     0x00001003
+#define TEE_PANIC_ID_TEE_AEUPDATE                   0x00001004
+#define TEE_PANIC_ID_TEE_AEUPDATEAAD                0x00001005
+/* Asymmetric */
+#define TEE_PANIC_ID_TEE_ASYMMETRICDECRYPT          0x00001101
+#define TEE_PANIC_ID_TEE_ASYMMETRICENCRYPT          0x00001102
+#define TEE_PANIC_ID_TEE_ASYMMETRICSIGNDIGEST       0x00001103
+#define TEE_PANIC_ID_TEE_ASYMMETRICVERIFYDIGEST     0x00001104
+/* Key Derivation */
+#define TEE_PANIC_ID_TEE_DERIVEKEY                  0x00001201
+/* Random Data Generation */
+#define TEE_PANIC_ID_TEE_GENERATERANDOM             0x00001301
+/* Time */
+#define TEE_PANIC_ID_TEE_GETREETIME                 0x00001401
+#define TEE_PANIC_ID_TEE_GETSYSTEMTIME              0x00001402
+#define TEE_PANIC_ID_TEE_GETTAPERSISTENTTIME        0x00001403
+#define TEE_PANIC_ID_TEE_SETTAPERSISTENTTIME        0x00001404
+#define TEE_PANIC_ID_TEE_WAIT                       0x00001405
+/* Memory Allocation and Size of Objects */
+#define TEE_PANIC_ID_TEE_BIGINTFMMCONTEXTSIZEINU32  0x00001501
+#define TEE_PANIC_ID_TEE_BIGINTFMMSIZEINU32         0x00001502
+/* Initialization */
+#define TEE_PANIC_ID_TEE_BIGINTINIT                 0x00001601
+#define TEE_PANIC_ID_TEE_BIGINTINITFMM              0x00001602
+#define TEE_PANIC_ID_TEE_BIGINTINITFMMCONTEXT       0x00001603
+/* Converter */
+#define TEE_PANIC_ID_TEE_BIGINTCONVERTFROMOCTETSTRING 0x00001701
+#define TEE_PANIC_ID_TEE_BIGINTCONVERTFROMS32         0x00001702
+#define TEE_PANIC_ID_TEE_BIGINTCONVERTTOOCTETSTRING   0x00001703
+#define TEE_PANIC_ID_TEE_BIGINTCONVERTTOS32           0x00001704
+/* Logical Operation */
+#define TEE_PANIC_ID_TEE_BIGINTCMP                  0x00001801
+#define TEE_PANIC_ID_TEE_BIGINTCMPS32               0x00001802
+#define TEE_PANIC_ID_TEE_BIGINTGETBIT               0x00001803
+#define TEE_PANIC_ID_TEE_BIGINTGETBITCOUNT          0x00001804
+#define TEE_PANIC_ID_TEE_BIGINTSHIFTRIGHT           0x00001805
+/* Basic Arithmetic */
+#define TEE_PANIC_ID_TEE_BIGINTADD                  0x00001901
+#define TEE_PANIC_ID_TEE_BIGINTDIV                  0x00001902
+#define TEE_PANIC_ID_TEE_BIGINTMUL                  0x00001903
+#define TEE_PANIC_ID_TEE_BIGINTNEG                  0x00001904
+#define TEE_PANIC_ID_TEE_BIGINTSQUARE               0x00001905
+#define TEE_PANIC_ID_TEE_BIGINTSUB                  0x00001906
+/* Modular Arithmetic */
+#define TEE_PANIC_ID_TEE_BIGINTADDMOD               0x00001A01
+#define TEE_PANIC_ID_TEE_BIGINTINVMOD               0x00001A02
+#define TEE_PANIC_ID_TEE_BIGINTMOD                  0x00001A03
+#define TEE_PANIC_ID_TEE_BIGINTMULMOD               0x00001A04
+#define TEE_PANIC_ID_TEE_BIGINTSQUAREMOD            0x00001A05
+#define TEE_PANIC_ID_TEE_BIGINTSUBMOD               0x00001A06
+/* Other Arithmetic */
+#define TEE_PANIC_ID_TEE_BIGINTCOMPUTEEXTENDEDGCD   0x00001B01
+#define TEE_PANIC_ID_TEE_BIGINTISPROBABLEPRIME      0x00001B02
+#define TEE_PANIC_ID_TEE_BIGINTRELATIVEPRIME        0x00001B03
+/* Fast Modular Multiplication */
+#define TEE_PANIC_ID_TEE_BIGINTCOMPUTEFMM           0x00001C01
+#define TEE_PANIC_ID_TEE_BIGINTCONVERTFROMFMM       0x00001C02
+#define TEE_PANIC_ID_TEE_BIGINTCONVERTTOFMM         0x00001C03
+
+/*
+ * The macro TEE_PARAM_TYPES can be used to construct a value that you can
+ * compare against an incoming paramTypes to check the type of all the
+ * parameters in one comparison, like in the following example:
+ * if (paramTypes != TEE_PARAM_TYPES(TEE_PARAM_TYPE_MEMREF_INPUT,
+ *                                  TEE_PARAM_TYPE_MEMREF_OUPUT,
+ *                                  TEE_PARAM_TYPE_NONE, TEE_PARAM_TYPE_NONE)) {
+ *      return TEE_ERROR_BAD_PARAMETERS;
+ *  }
+ */
+#define TEE_PARAM_TYPES(t0, t1, t2, t3) \
+	((t0) | ((t1) << 4) | ((t2) << 8) | ((t3) << 12))
+
+/*
+ * The macro TEE_PARAM_TYPE_GET can be used to extract the type of a given
+ * parameter from paramTypes if you need more fine-grained type checking.
+ */
+#define TEE_PARAM_TYPE_GET(t, i) ((((uint32_t)t) >> ((i)*4)) & 0xF)
+
+/*
+ * The macro TEE_PARAM_TYPE_SET can be used to load the type of a given
+ * parameter from paramTypes without specifying all types (TEE_PARAM_TYPES)
+ */
+#define TEE_PARAM_TYPE_SET(t, i) (((uint32_t)(t) & 0xF) << ((i)*4))
+
+/* Not specified in the standard */
+#define TEE_NUM_PARAMS  4
+
+/* TEE Arithmetical APIs */
+
+#define TEE_BigIntSizeInU32(n) ((((n)+31)/32)+2)
+
+#endif /* TEE_API_DEFINES_H */
diff --git a/include/optee_include/tee_api_types.h b/include/optee_include/tee_api_types.h
new file mode 100644
index 0000000000..d33b69fd06
--- /dev/null
+++ b/include/optee_include/tee_api_types.h
@@ -0,0 +1,199 @@
+/*
+ * Copyright 2017, Rockchip Electronics Co., Ltd
+ * hisping lin, <hisping.lin@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+/* Based on GP TEE Internal API Specification Version 0.11 */
+#ifndef TEE_API_TYPES_H
+#define TEE_API_TYPES_H
+
+#include <optee_include/tee_base_types.h>
+#include <optee_include/tee_api_defines.h>
+
+
+/*
+ * Common Definitions
+ */
+
+typedef uint32_t TEE_Result;
+
+typedef struct {
+	uint32_t timeLow;
+	uint16_t timeMid;
+	uint16_t timeHiAndVersion;
+	uint8_t clockSeqAndNode[8];
+} TEE_UUID;
+
+/*
+ * The TEE_Identity structure defines the full identity of a Client:
+ * - login is one of the TEE_LOGIN_XXX constants
+ * - uuid contains the client UUID or Nil if not applicable
+ */
+typedef struct {
+	uint32_t login;
+	TEE_UUID uuid;
+} TEE_Identity;
+
+/*
+ * This union describes one parameter passed by the Trusted Core Framework
+ * to the entry points TA_OpenSessionEntryPoint or
+ * TA_InvokeCommandEntryPoint or by the TA to the functions
+ * TEE_OpenTASession or TEE_InvokeTACommand.
+ *
+ * Which of the field value or memref to select is determined by the
+ * parameter type specified in the argument paramTypes passed to the entry
+ * point.
+*/
+typedef union {
+	struct {
+		void *buffer;
+		uint32_t size;
+	} memref;
+	struct {
+		uint32_t a;
+		uint32_t b;
+	} value;
+} TEE_Param;
+
+/*
+ * The type of opaque handles on TA Session. These handles are returned by
+ * the function TEE_OpenTASession.
+ */
+typedef struct __TEE_TASessionHandle *TEE_TASessionHandle;
+
+/*
+ * The type of opaque handles on property sets or enumerators. These
+ * handles are either one of the pseudo handles TEE_PROPSET_XXX or are
+ * returned by the function TEE_AllocatePropertyEnumerator.
+*/
+typedef struct __TEE_PropSetHandle *TEE_PropSetHandle;
+
+typedef struct __TEE_ObjectHandle *TEE_ObjectHandle;
+typedef struct __TEE_ObjectEnumHandle *TEE_ObjectEnumHandle;
+typedef struct __TEE_OperationHandle *TEE_OperationHandle;
+
+/*
+ * Storage Definitions
+ */
+
+typedef uint32_t TEE_ObjectType;
+
+typedef struct {
+	uint32_t objectType;
+	uint32_t keySize;
+	uint32_t maxKeySize;
+	uint32_t objectUsage;
+	uint32_t dataSize;
+	uint32_t dataPosition;
+	uint32_t handleFlags;
+} TEE_ObjectInfo;
+
+typedef enum {
+	TEE_DATA_SEEK_SET = 0,
+	TEE_DATA_SEEK_CUR = 1,
+	TEE_DATA_SEEK_END = 2
+} TEE_Whence;
+
+typedef struct {
+	uint32_t attributeID;
+	union {
+		struct {
+			void *buffer;
+			uint32_t length;
+		} ref;
+		struct {
+			uint32_t a, b;
+		} value;
+	} content;
+} TEE_Attribute;
+
+/* Cryptographic Operations API */
+
+typedef enum {
+	TEE_MODE_ENCRYPT = 0,
+	TEE_MODE_DECRYPT = 1,
+	TEE_MODE_SIGN = 2,
+	TEE_MODE_VERIFY = 3,
+	TEE_MODE_MAC = 4,
+	TEE_MODE_DIGEST = 5,
+	TEE_MODE_DERIVE = 6
+} TEE_OperationMode;
+
+typedef struct {
+	uint32_t algorithm;
+	uint32_t operationClass;
+	uint32_t mode;
+	uint32_t digestLength;
+	uint32_t maxKeySize;
+	uint32_t keySize;
+	uint32_t requiredKeyUsage;
+	uint32_t handleState;
+} TEE_OperationInfo;
+
+typedef struct {
+	uint32_t keySize;
+	uint32_t requiredKeyUsage;
+} TEE_OperationInfoKey;
+
+typedef struct {
+	uint32_t algorithm;
+	uint32_t operationClass;
+	uint32_t mode;
+	uint32_t digestLength;
+	uint32_t maxKeySize;
+	uint32_t handleState;
+	uint32_t operationState;
+	uint32_t numberOfKeys;
+	TEE_OperationInfoKey keyInformation[];
+} TEE_OperationInfoMultiple;
+
+/* Time & Date API */
+
+typedef struct {
+	uint32_t seconds;
+	uint32_t millis;
+} TEE_Time;
+
+/* TEE Arithmetical APIs */
+
+typedef uint32_t TEE_BigInt;
+
+typedef uint32_t TEE_BigIntFMM;
+
+typedef uint32_t TEE_BigIntFMMContext;
+
+/* Tee Secure Element APIs */
+
+typedef struct __TEE_SEServiceHandle *TEE_SEServiceHandle;
+typedef struct __TEE_SEReaderHandle *TEE_SEReaderHandle;
+typedef struct __TEE_SESessionHandle *TEE_SESessionHandle;
+typedef struct __TEE_SEChannelHandle *TEE_SEChannelHandle;
+
+typedef struct {
+	bool sePresent;
+	bool teeOnly;
+	bool selectResponseEnable;
+} TEE_SEReaderProperties;
+
+typedef struct {
+	uint8_t *buffer;
+	size_t bufferLen;
+} TEE_SEAID;
+
+/* Other definitions */
+typedef uint32_t TEE_ErrorOrigin;
+typedef void *TEE_Session;
+
+#define TEE_MEM_INPUT   0x00000001
+#define TEE_MEM_OUTPUT  0x00000002
+
+#define TEE_MEMREF_0_USED  0x00000001
+#define TEE_MEMREF_1_USED  0x00000002
+#define TEE_MEMREF_2_USED  0x00000004
+#define TEE_MEMREF_3_USED  0x00000008
+
+#define TEE_SE_READER_NAME_MAX	20
+
+#endif /* TEE_API_TYPES_H */
diff --git a/include/optee_include/tee_base_types.h b/include/optee_include/tee_base_types.h
new file mode 100644
index 0000000000..f7053dc477
--- /dev/null
+++ b/include/optee_include/tee_base_types.h
@@ -0,0 +1,2 @@
+#include <linux/types.h>
+
diff --git a/include/optee_include/tee_client_api.h b/include/optee_include/tee_client_api.h
new file mode 100644
index 0000000000..7d2af2eda2
--- /dev/null
+++ b/include/optee_include/tee_client_api.h
@@ -0,0 +1,531 @@
+/*
+ * Copyright 2017, Rockchip Electronics Co., Ltd
+ * hisping lin, <hisping.lin@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#ifndef TEE_CLIENT_API_H
+#define TEE_CLIENT_API_H
+
+#include <optee_include/tee_base_types.h>
+/*
+ * Defines the number of available memory references in an open session or
+ * invoke command operation payload.
+ */
+#define TEEC_CONFIG_PAYLOAD_REF_COUNT 4
+
+/**
+ * Defines the maximum size of a single shared memory block, in bytes, of both
+ * API allocated and API registered memory. The size is currently set to
+ * 512 * kB (512 * 1024).
+ */
+#define TEEC_CONFIG_SHAREDMEM_MAX_SIZE 0x8000
+
+/**
+ * Flag constants indicating the type of parameters encoded inside the
+ * operation payload (TEEC_Operation), Type is uint32_t.
+ *
+ * TEEC_NONE                   The Parameter is not used
+ *
+ * TEEC_VALUE_INPUT            The Parameter is a TEEC_Value tagged as input.
+ *
+ * TEEC_VALUE_OUTPUT           The Parameter is a TEEC_Value tagged as output.
+ *
+ * TEEC_VALUE_INOUT            The Parameter is a TEEC_Value tagged as both as
+ *                             input and output, i.e., for which both the
+ *                             behaviors of TEEC_VALUE_INPUT and
+ *                             TEEC_VALUE_OUTPUT apply.
+ *
+ * TEEC_MEMREF_TEMP_INPUT      The Parameter is a TEEC_TempMemoryReference
+ *                             describing a region of memory which needs to be
+ *                             temporarily registered for the duration of the
+ *                             Operation and is tagged as input.
+ *
+ * TEEC_MEMREF_TEMP_OUTPUT     Same as TEEC_MEMREF_TEMP_INPUT, but the Memory
+ *                             Reference is tagged as output. The
+ *                             Implementation may update the size field to
+ *                             reflect the required output size in some use
+ *                             cases.
+ *
+ * TEEC_MEMREF_TEMP_INOUT      A Temporary Memory Reference tagged as both
+ *                             input and output, i.e., for which both the
+ *                             behaviors of TEEC_MEMREF_TEMP_INPUT and
+ *                             TEEC_MEMREF_TEMP_OUTPUT apply.
+ *
+ * TEEC_MEMREF_WHOLE           The Parameter is a Registered Memory Reference
+ *                             that refers to the entirety of its parent Shared
+ *                             Memory block. The parameter structure is a
+ *                             TEEC_MemoryReference. In this structure, the
+ *                             Implementation MUST read only the parent field
+ *                             and MAY update the size field when the operation
+ *                             completes.
+ *
+ * TEEC_MEMREF_PARTIAL_INPUT   A Registered Memory Reference structure that
+ *                             refers to a partial region of its parent Shared
+ *                             Memory block and is tagged as input.
+ *
+ * TEEC_MEMREF_PARTIAL_OUTPUT  Registered Memory Reference structure that
+ *                             refers to a partial region of its parent Shared
+ *                             Memory block and is tagged as output.
+ *
+ * TEEC_MEMREF_PARTIAL_INOUT   The Registered Memory Reference structure that
+ *                             refers to a partial region of its parent Shared
+ *                             Memory block and is tagged as both input and
+ *                             output, i.e., for which both the behaviors of
+ *                             TEEC_MEMREF_PARTIAL_INPUT and
+ *                             TEEC_MEMREF_PARTIAL_OUTPUT apply.
+ */
+#define TEEC_NONE                   0x00000000
+#define TEEC_VALUE_INPUT            0x00000001
+#define TEEC_VALUE_OUTPUT           0x00000002
+#define TEEC_VALUE_INOUT            0x00000003
+#define TEEC_MEMREF_TEMP_INPUT      0x00000005
+#define TEEC_MEMREF_TEMP_OUTPUT     0x00000006
+#define TEEC_MEMREF_TEMP_INOUT      0x00000007
+#define TEEC_MEMREF_WHOLE           0x0000000C
+#define TEEC_MEMREF_PARTIAL_INPUT   0x0000000D
+#define TEEC_MEMREF_PARTIAL_OUTPUT  0x0000000E
+#define TEEC_MEMREF_PARTIAL_INOUT   0x0000000F
+
+/**
+ * Flag constants indicating the data transfer direction of memory in
+ * TEEC_Parameter. TEEC_MEM_INPUT signifies data transfer direction from the
+ * client application to the TEE. TEEC_MEM_OUTPUT signifies data transfer
+ * direction from the TEE to the client application. Type is uint32_t.
+ *
+ * TEEC_MEM_INPUT   The Shared Memory can carry data from the client
+ *                  application to the Trusted Application.
+ * TEEC_MEM_OUTPUT  The Shared Memory can carry data from the Trusted
+ *                  Application to the client application.
+ */
+#define TEEC_MEM_INPUT   0x00000001
+#define TEEC_MEM_OUTPUT  0x00000002
+
+/**
+ * Return values. Type is TEEC_Result
+ *
+ * TEEC_SUCCESS                 The operation was successful.
+ * TEEC_ERROR_GENERIC           Non-specific cause.
+ * TEEC_ERROR_ACCESS_DENIED     Access privileges are not sufficient.
+ * TEEC_ERROR_CANCEL            The operation was canceled.
+ * TEEC_ERROR_ACCESS_CONFLICT   Concurrent accesses caused conflict.
+ * TEEC_ERROR_EXCESS_DATA       Too much data for the requested operation was
+ *                              passed.
+ * TEEC_ERROR_BAD_FORMAT        Input data was of invalid format.
+ * TEEC_ERROR_BAD_PARAMETERS    Input parameters were invalid.
+ * TEEC_ERROR_BAD_STATE         Operation is not valid in the current state.
+ * TEEC_ERROR_ITEM_NOT_FOUND    The requested data item is not found.
+ * TEEC_ERROR_NOT_IMPLEMENTED   The requested operation should exist but is not
+ *                              yet implemented.
+ * TEEC_ERROR_NOT_SUPPORTED     The requested operation is valid but is not
+ *                              supported in this implementation.
+ * TEEC_ERROR_NO_DATA           Expected data was missing.
+ * TEEC_ERROR_OUT_OF_MEMORY     System ran out of resources.
+ * TEEC_ERROR_BUSY              The system is busy working on something else.
+ * TEEC_ERROR_COMMUNICATION     Communication with a remote party failed.
+ * TEEC_ERROR_SECURITY          A security fault was detected.
+ * TEEC_ERROR_SHORT_BUFFER      The supplied buffer is too short for the
+ *                              generated output.
+ * TEEC_ERROR_TARGET_DEAD       Trusted Application has panicked
+ *                              during the operation.
+ */
+
+/**
+ *  Standard defined error codes.
+ */
+#define TEEC_SUCCESS                0x00000000
+#define TEEC_ERROR_GENERIC          0xFFFF0000
+#define TEEC_ERROR_ACCESS_DENIED    0xFFFF0001
+#define TEEC_ERROR_CANCEL           0xFFFF0002
+#define TEEC_ERROR_ACCESS_CONFLICT  0xFFFF0003
+#define TEEC_ERROR_EXCESS_DATA      0xFFFF0004
+#define TEEC_ERROR_BAD_FORMAT       0xFFFF0005
+#define TEEC_ERROR_BAD_PARAMETERS   0xFFFF0006
+#define TEEC_ERROR_BAD_STATE        0xFFFF0007
+#define TEEC_ERROR_ITEM_NOT_FOUND   0xFFFF0008
+#define TEEC_ERROR_NOT_IMPLEMENTED  0xFFFF0009
+#define TEEC_ERROR_NOT_SUPPORTED    0xFFFF000A
+#define TEEC_ERROR_NO_DATA          0xFFFF000B
+#define TEEC_ERROR_OUT_OF_MEMORY    0xFFFF000C
+#define TEEC_ERROR_BUSY             0xFFFF000D
+#define TEEC_ERROR_COMMUNICATION    0xFFFF000E
+#define TEEC_ERROR_SECURITY         0xFFFF000F
+#define TEEC_ERROR_SHORT_BUFFER     0xFFFF0010
+#define TEEC_ERROR_TARGET_DEAD      0xFFFF3024
+
+/**
+ * Function error origins, of type TEEC_ErrorOrigin. These indicate where in
+ * the software stack a particular return value originates from.
+ *
+ * TEEC_ORIGIN_API          The error originated within the TEE Client API
+ *                          implementation.
+ * TEEC_ORIGIN_COMMS        The error originated within the underlying
+ *                          communications stack linking the rich OS with
+ *                          the TEE.
+ * TEEC_ORIGIN_TEE          The error originated within the common TEE code.
+ * TEEC_ORIGIN_TRUSTED_APP  The error originated within the Trusted Application
+ *                          code.
+ */
+#define TEEC_ORIGIN_API          0x00000001
+#define TEEC_ORIGIN_COMMS        0x00000002
+#define TEEC_ORIGIN_TEE          0x00000003
+#define TEEC_ORIGIN_TRUSTED_APP  0x00000004
+
+/**
+ * Session login methods, for use in TEEC_OpenSession() as parameter
+ * connectionMethod. Type is uint32_t.
+ *
+ * TEEC_LOGIN_PUBLIC       No login data is provided.
+ * TEEC_LOGIN_USER         Login data about the user running the Client
+ *                         Application process is provided.
+ * TEEC_LOGIN_GROUP        Login data about the group running the Client
+ *                         Application process is provided.
+ * TEEC_LOGIN_APPLICATION  Login data about the running Client Application
+ *                         itself is provided.
+ */
+#define TEEC_LOGIN_PUBLIC       0x00000000
+#define TEEC_LOGIN_USER         0x00000001
+#define TEEC_LOGIN_GROUP        0x00000002
+#define TEEC_LOGIN_APPLICATION  0x00000004
+
+/**
+ * Encode the paramTypes according to the supplied types.
+ *
+ * @param p0 The first param type.
+ * @param p1 The second param type.
+ * @param p2 The third param type.
+ * @param p3 The fourth param type.
+ */
+#define TEEC_PARAM_TYPES(p0, p1, p2, p3) \
+	((p0) | ((p1) << 4) | ((p2) << 8) | ((p3) << 12))
+
+/**
+ * Get the i_th param type from the paramType.
+ *
+ * @param p The paramType.
+ * @param i The i-th parameter to get the type for.
+ */
+#define TEEC_PARAM_TYPE_GET(p, i) (((p) >> (i * 4)) & 0xF)
+
+typedef uint32_t TEEC_Result;
+
+/**
+ * struct TEEC_Context - Represents a connection between a client application
+ * and a TEE.
+ */
+typedef struct {
+	char devname[256];
+	int fd;
+} TEEC_Context;
+
+/**
+ * This type contains a Universally Unique Resource Identifier (UUID) type as
+ * defined in RFC4122. These UUID values are used to identify Trusted
+ * Applications.
+ */
+typedef struct {
+	uint32_t timeLow;
+	uint16_t timeMid;
+	uint16_t timeHiAndVersion;
+	uint8_t clockSeqAndNode[8];
+} TEEC_UUID;
+
+/**
+ * struct TEEC_SharedMemory - Memory to transfer data between a client
+ * application and trusted code.
+ *
+ * @param buffer      The memory buffer which is to be, or has been, shared
+ *                    with the TEE.
+ * @param size        The size, in bytes, of the memory buffer.
+ * @param flags       Bit-vector which holds properties of buffer.
+ *                    The bit-vector can contain either or both of the
+ *                    TEEC_MEM_INPUT and TEEC_MEM_OUTPUT flags.
+ *
+ * A shared memory block is a region of memory allocated in the context of the
+ * client application memory space that can be used to transfer data between
+ * that client application and a trusted application. The user of this struct
+ * is responsible to populate the buffer pointer.
+ */
+typedef struct {
+	void *buffer;
+	size_t size;
+	uint32_t flags;
+	/*
+	 * Implementation-Defined
+	 *
+	 * These represent a pointer to an allocated buffer.
+	 * This can be different from the
+	 * "buffer" above if the caller tried to register
+	 * a buffer rather than allocate one.
+	 */
+	void   *alloc_buffer;
+} TEEC_SharedMemory;
+
+/**
+ * struct TEEC_TempMemoryReference - Temporary memory to transfer data between
+ * a client application and trusted code, only used for the duration of the
+ * operation.
+ *
+ * @param buffer  The memory buffer which is to be, or has been shared with
+ *                the TEE.
+ * @param size    The size, in bytes, of the memory buffer.
+ *
+ * A memory buffer that is registered temporarily for the duration of the
+ * operation to be called.
+ */
+typedef struct {
+	void *buffer;
+	size_t size;
+} TEEC_TempMemoryReference;
+
+/**
+ * struct TEEC_RegisteredMemoryReference - use a pre-registered or
+ * pre-allocated shared memory block of memory to transfer data between
+ * a client application and trusted code.
+ *
+ * @param parent  Points to a shared memory structure. The memory reference
+ *                may utilize the whole shared memory or only a part of it.
+ *                Must not be NULL
+ *
+ * @param size    The size, in bytes, of the memory buffer.
+ *
+ * @param offset  The offset, in bytes, of the referenced memory region from
+ *                the start of the shared memory block.
+ *
+ */
+typedef struct {
+	TEEC_SharedMemory *parent;
+	size_t size;
+	size_t offset;
+} TEEC_RegisteredMemoryReference;
+
+/**
+ * struct TEEC_Value - Small raw data container
+ *
+ * Instead of allocating a shared memory buffer this structure can be used
+ * to pass small raw data between a client application and trusted code.
+ *
+ * @param a  The first integer value.
+ *
+ * @param b  The second second value.
+ */
+typedef struct {
+	uint32_t a;
+	uint32_t b;
+} TEEC_Value;
+
+/**
+ * union TEEC_Parameter - Memory container to be used when passing data between
+ *                        client application and trusted code.
+ *
+ * Either the client uses a shared memory reference, parts of it or a small raw
+ * data container.
+ *
+ * @param tmpref  A temporary memory reference only valid for the duration
+ *                of the operation.
+ *
+ * @param memref  The entire shared memory or parts of it.
+ *
+ * @param value   The small raw data container to use
+ */
+typedef union {
+	TEEC_TempMemoryReference tmpref;
+	TEEC_RegisteredMemoryReference memref;
+	TEEC_Value value;
+} TEEC_Parameter;
+
+/**
+ * struct TEEC_Session - Represents a connection between a client application
+ * and a trusted application.
+ */
+typedef struct {
+	uint32_t id;
+} TEEC_Session;
+
+/**
+ * struct TEEC_Operation - Holds information and memory references used in
+ * TEEC_InvokeCommand().
+ *
+ * @param   started     Client must initialize to zero if it needs to cancel
+ *                      an operation about to be performed.
+ * @param   paramTypes  Type of data passed. Use TEEC_PARAMS_TYPE macro to
+ *                      create the correct flags.
+ *                      0 means TEEC_NONE is passed for all params.
+ * @param   params      Array of parameters of type TEEC_Parameter.
+ * @param   session     Internal pointer to the last session used by
+ *                      TEEC_InvokeCommand with this operation.
+ *
+ */
+typedef struct {
+	uint32_t started;
+	uint32_t paramTypes;
+	TEEC_Parameter params[TEEC_CONFIG_PAYLOAD_REF_COUNT];
+	/* Implementation-Defined */
+	TEEC_Session *session;
+	TEEC_SharedMemory memRefs[TEEC_CONFIG_PAYLOAD_REF_COUNT];
+	uint32_t flags;
+} TEEC_Operation;
+
+/**
+ * TEEC_InitializeContext() - Initializes a context holding connection
+ * information on the specific TEE, designated by the name string.
+
+ * @param name    A zero-terminated string identifying the TEE to connect to.
+ *                If name is set to NULL, the default TEE is connected to. NULL
+ *                is the only supported value in this version of the API
+ *                implementation.
+ *
+ * @param context The context structure which is to be initialized.
+ *
+ * @return TEEC_SUCCESS  The initialization was successful.
+ * @return TEEC_Result   Something failed.
+ */
+TEEC_Result TEEC_InitializeContext(const char *name, TEEC_Context *context);
+
+/**
+ * TEEC_FinalizeContext() - Destroys a context holding connection information
+ * on the specific TEE.
+ *
+ * This function destroys an initialized TEE context, closing the connection
+ * between the client application and the TEE. This function must only be
+ * called when all sessions related to this TEE context have been closed and
+ * all shared memory blocks have been released, otherwise an error will be
+ * returned.
+ *
+ * @param context       The context to be destroyed.
+ *
+ * @return TEEC_SUCCESS The function call was successful.
+ * @return TEEC_Result  Something failed.
+ */
+TEEC_Result TEEC_FinalizeContext(TEEC_Context *context);
+
+/**
+ * TEEC_OpenSession() - Opens a new session with the specified trusted
+ *                      application.
+ *
+ * @param context            The initialized TEE context structure in which
+ *                           scope to open the session.
+ * @param session            The session to initialize.
+ * @param destination        A structure identifying the trusted application
+ *                           with which to open a session.
+ *
+ * @param connectionMethod   The connection method to use.
+ * @param connectionData     Any data necessary to connect with the chosen
+ *                           connection method. Not supported, should be set to
+ *                           NULL.
+ * @param operation          An operation structure to use in the session. May
+ *                           be set to NULL to signify no operation structure
+ *                           needed.
+ *
+ * @param returnOrigin       A parameter which will hold the error origin if
+ *                           this function returns any value other than
+ *                           TEEC_SUCCESS.
+ *
+ * @return TEEC_SUCCESS      OpenSession successfully opened a new session.
+ * @return TEEC_Result       Something failed.
+ *
+ */
+TEEC_Result TEEC_OpenSession(TEEC_Context *context,
+			     TEEC_Session *session,
+			     const TEEC_UUID *destination,
+			     uint32_t connectionMethod,
+			     const void *connectionData,
+			     TEEC_Operation *operation,
+			     uint32_t *returnOrigin);
+
+/**
+ * TEEC_CloseSession() - Closes the session which has been opened with the
+ * specific trusted application.
+ *
+ * @param session The opened session to close.
+ */
+void TEEC_CloseSession(TEEC_Session *session);
+
+/**
+ * TEEC_InvokeCommand() - Executes a command in the specified trusted
+ * application.
+ *
+ * @param session        A handle to an open connection to the trusted
+ *                       application.
+ * @param commandID      Identifier of the command in the trusted application
+ *                       to invoke.
+ * @param operation      An operation structure to use in the invoke command.
+ *                       May be set to NULL to signify no operation structure
+ *                       needed.
+ * @param returnOrigin   A parameter which will hold the error origin if this
+ *                       function returns any value other than TEEC_SUCCESS.
+ *
+ * @return TEEC_SUCCESS  OpenSession successfully opened a new session.
+ * @return TEEC_Result   Something failed.
+ */
+TEEC_Result TEEC_InvokeCommand(TEEC_Session *session,
+			       uint32_t commandID,
+			       TEEC_Operation *operation,
+			       uint32_t *returnOrigin);
+
+/**
+ * TEEC_RegisterSharedMemory() - Register a block of existing memory as a
+ * shared block within the scope of the specified context.
+ *
+ * @param context    The initialized TEE context structure in which scope to
+ *                   open the session.
+ * @param sharedMem  pointer to the shared memory structure to register.
+ *
+ * @return TEEC_SUCCESS              The registration was successful.
+ * @return TEEC_ERROR_OUT_OF_MEMORY  Memory exhaustion.
+ * @return TEEC_Result               Something failed.
+ */
+TEEC_Result TEEC_RegisterSharedMemory(TEEC_Context *context,
+				      TEEC_SharedMemory *sharedMem);
+
+/**
+ * TEEC_AllocateSharedMemory() - Allocate shared memory for TEE.
+ *
+ * @param context     The initialized TEE context structure in which scope to
+ *                    open the session.
+ * @param sharedMem   Pointer to the allocated shared memory.
+ *
+ * @return TEEC_SUCCESS              The registration was successful.
+ * @return TEEC_ERROR_OUT_OF_MEMORY  Memory exhaustion.
+ * @return TEEC_Result               Something failed.
+ */
+TEEC_Result TEEC_AllocateSharedMemory(TEEC_Context *context,
+				      TEEC_SharedMemory *sharedMem);
+
+/**
+ * TEEC_ReleaseSharedMemory() - Free or deregister the shared memory.
+ *
+ * @param sharedMem  Pointer to the shared memory to be freed.
+ */
+void TEEC_ReleaseSharedMemory(TEEC_SharedMemory *sharedMemory);
+
+/**
+ * TEEC_RequestCancellation() - Request the cancellation of a pending open
+ *                              session or command invocation.
+ *
+ * @param operation Pointer to an operation previously passed to open session
+ *                  or invoke.
+ */
+void TEEC_RequestCancellation(TEEC_Operation *operation);
+
+/**
+ * Register a pre-allocated Trusted Application This is mainly intended for
+ * OS-FREE contexts or when a filesystem is not available.
+ *
+ * @param ta   Pointer to the trusted application binary
+ * @param size The size of the TA binary
+ *
+ * @return TEEC_SUCCESS if successful.
+ * @return TEEC_Result something failed.
+ */
+TEEC_Result TEEC_RegisterTA(const void *ta, const size_t size);
+
+/**
+ * Unregister a pre-allocated Trusted Application This is mainly intended for
+ * OS-FREE contexts or when a filesystem is not available.
+ *
+ * @param ta Pointer to the trusted application binary
+ */
+void TEEC_UnregisterTA(const void *ta);
+
+#endif
diff --git a/include/optee_include/tee_rpc.h b/include/optee_include/tee_rpc.h
new file mode 100644
index 0000000000..c6ddc6b3c1
--- /dev/null
+++ b/include/optee_include/tee_rpc.h
@@ -0,0 +1,43 @@
+/*
+ * Copyright 2017, Rockchip Electronics Co., Ltd
+ * hisping lin, <hisping.lin@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#ifndef TEE_RPC_H
+#define TEE_RPC_H
+
+#include <optee_include/tee_base_types.h>
+/*
+ * tee_rpc_invoke cmd definitions, keep in sync with tee-supplicant
+ */
+#define TEE_RPC_LOAD_TA		0x10000001
+#define TEE_RPC_FREE_TA		0x10000009
+#define TEE_RPC_RPMB_CMD	0x1000000A
+#define TEE_RPC_FS		0x10000010
+#define TEE_RPC_GET_TIME	0x10000011
+
+/* RPMB Related defines */
+#define TEE_RPC_RPMB_CMD_DATA_REQ       0x00
+#define TEE_RPC_RPMB_CMD_GET_DEV_INFO   0x01
+
+#define TEE_RPC_RPMB_MSG_TYPE_REQ_AUTH_KEY_PROGRAM          0x0001
+#define TEE_RPC_RPMB_MSG_TYPE_REQ_WRITE_COUNTER_VAL_READ    0x0002
+#define TEE_RPC_RPMB_MSG_TYPE_REQ_AUTH_DATA_WRITE           0x0003
+#define TEE_RPC_RPMB_MSG_TYPE_REQ_AUTH_DATA_READ            0x0004
+#define TEE_RPC_RPMB_MSG_TYPE_REQ_RESULT_READ               0x0005
+#define TEE_RPC_RPMB_MSG_TYPE_RESP_AUTH_KEY_PROGRAM         0x0100
+#define TEE_RPC_RPMB_MSG_TYPE_RESP_WRITE_COUNTER_VAL_READ   0x0200
+#define TEE_RPC_RPMB_MSG_TYPE_RESP_AUTH_DATA_WRITE          0x0300
+#define TEE_RPC_RPMB_MSG_TYPE_RESP_AUTH_DATA_READ           0x0400
+
+/* keep in sync with Linux driver */
+#define TEE_RPC_WAIT_MUTEX	0x20000000
+/* Values specific to TEE_RPC_WAIT_MUTEX */
+#define TEE_WAIT_MUTEX_SLEEP	0
+#define TEE_WAIT_MUTEX_WAKEUP	1
+#define TEE_WAIT_MUTEX_DELETE	2
+#define TEE_RPC_WAIT		0x30000000
+
+
+#endif
diff --git a/include/optee_include/tee_rpc_types.h b/include/optee_include/tee_rpc_types.h
new file mode 100644
index 0000000000..a90c1a63f9
--- /dev/null
+++ b/include/optee_include/tee_rpc_types.h
@@ -0,0 +1,37 @@
+/*
+ * Copyright 2017, Rockchip Electronics Co., Ltd
+ * hisping lin, <hisping.lin@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#ifndef TEE_RPC_TYPES_H
+#define TEE_RPC_TYPES_H
+
+#include <optee_include/tee_base_types.h>
+#include <optee_include/tee_api_types.h>
+
+struct tee_rpc_load_ta_cmd {
+	TEE_UUID uuid;
+	void *va;
+};
+
+struct tee_rpc_rpmb_cmd {
+	uint16_t cmd;
+	uint16_t dev_id;
+	uint16_t block_count;
+	/* variable length of data */
+	/* uint8_t data[]; REMOVED! */
+};
+
+#define TEE_RPC_RPMB_EMMC_CID_SIZE 16
+struct tee_rpc_rpmb_dev_info {
+	uint8_t cid[TEE_RPC_RPMB_EMMC_CID_SIZE];
+	/* EXT CSD-slice 168 "RPMB Size" */
+	uint8_t rpmb_size_mult;
+	/* EXT CSD-slice 222 "Reliable Write Sector Count" */
+	uint8_t rel_wr_sec_c;
+	/* Check the ret code and accept the data only if it is OK. */
+	uint8_t ret_code;
+};
+
+#endif
diff --git a/include/optee_include/teesmc.h b/include/optee_include/teesmc.h
new file mode 100644
index 0000000000..1bad06d0a8
--- /dev/null
+++ b/include/optee_include/teesmc.h
@@ -0,0 +1,676 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef TEESMC_H
+#define TEESMC_H
+
+#include <optee_include/tee_base_types.h>
+
+#ifndef ASM
+/*
+ * This section depends on uint64_t, uint32_t uint8_t already being
+ * defined. Since this file is used in several different environments
+ * (secure world OS and normal world Linux kernel to start with) where
+ * stdint.h may not be available it's the responsibility of the one
+ * including this file to provide those types.
+ */
+
+/*
+ * Trusted OS SMC interface.
+ *
+ * The SMC interface follows SMC Calling Convention
+ * (ARM_DEN0028A_SMC_Calling_Convention).
+ *
+ * The primary objective of this API is to provide a transport layer on
+ * which a Global Platform compliant TEE interfaces can be deployed. But the
+ * interface can also be used for other implementations.
+ *
+ * This file is divided in two parts.
+ * Part 1 deals with passing parameters to Trusted Applications running in
+ * a trusted OS in secure world.
+ * Part 2 deals with the lower level handling of the SMC.
+ */
+
+/*
+ *******************************************************************************
+ * Part 1 - passing parameters to Trusted Applications
+ *******************************************************************************
+ */
+
+/*
+ * Same values as TEE_PARAM_* from TEE Internal API
+ */
+#define TEESMC_ATTR_TYPE_NONE		0
+#define TEESMC_ATTR_TYPE_VALUE_INPUT	1
+#define TEESMC_ATTR_TYPE_VALUE_OUTPUT	2
+#define TEESMC_ATTR_TYPE_VALUE_INOUT	3
+#define TEESMC_ATTR_TYPE_MEMREF_INPUT	5
+#define TEESMC_ATTR_TYPE_MEMREF_OUTPUT	6
+#define TEESMC_ATTR_TYPE_MEMREF_INOUT	7
+
+#define TEESMC_ATTR_TYPE_MASK		0x7
+
+/*
+ * Meta parameter to be absorbed by the Secure OS and not passed
+ * to the Trusted Application.
+ *
+ * One example of this is a struct teesmc_meta_open_session which
+ * is added to TEESMC{32,64}_CMD_OPEN_SESSION.
+ */
+#define TEESMC_ATTR_META		0x8
+
+/*
+ * Used as an indication from normal world of compatible cache usage.
+ * 'I' stands for inner cache and 'O' for outer cache.
+ */
+#define TEESMC_ATTR_CACHE_I_NONCACHE	0x0
+#define TEESMC_ATTR_CACHE_I_WRITE_THR	0x1
+#define TEESMC_ATTR_CACHE_I_WRITE_BACK	0x2
+#define TEESMC_ATTR_CACHE_O_NONCACHE	0x0
+#define TEESMC_ATTR_CACHE_O_WRITE_THR	0x4
+#define TEESMC_ATTR_CACHE_O_WRITE_BACK	0x8
+
+#define TEESMC_ATTR_CACHE_NONCACHE	0x0
+#define TEESMC_ATTR_CACHE_DEFAULT	(TEESMC_ATTR_CACHE_I_WRITE_BACK | \
+					 TEESMC_ATTR_CACHE_O_WRITE_BACK)
+
+#define TEESMC_ATTR_CACHE_SHIFT		4
+#define TEESMC_ATTR_CACHE_MASK		0xf
+
+#define TEESMC_CMD_OPEN_SESSION		0
+#define TEESMC_CMD_INVOKE_COMMAND	1
+#define TEESMC_CMD_CLOSE_SESSION	2
+#define TEESMC_CMD_CANCEL		3
+
+/**
+ * struct teesmc32_param_memref - memory reference
+ * @buf_ptr: Address of the buffer
+ * @size: Size of the buffer
+ *
+ * Secure and normal world communicates pointer via physical address instead of
+ * the virtual address with is usually used for pointers. This is because
+ * Secure and normal world has completely independant memory mapping. Normal
+ * world can even have a hypervisor which need to translate the guest
+ * physical address (AKA IPA in ARM lingo) to a real physical address
+ * before passing the structure to secure world.
+ */
+struct teesmc32_param_memref {
+	uint32_t buf_ptr;
+	uint32_t size;
+};
+
+/**
+ * struct teesmc32_param_memref - memory reference
+ * @buf_ptr: Address of the buffer
+ * @size: Size of the buffer
+ *
+ * See description of struct teesmc32_param_memref.
+ */
+struct teesmc64_param_memref {
+	uint64_t buf_ptr;
+	uint64_t size;
+};
+
+/**
+ * struct teesmc32_param_value - values
+ * @a: first value
+ * @b: second value
+ */
+struct teesmc32_param_value {
+	uint32_t a;
+	uint32_t b;
+};
+
+/**
+ * struct teesmc64_param_value - values
+ * @a: first value
+ * @b: second value
+ */
+struct teesmc64_param_value {
+	uint64_t a;
+	uint64_t b;
+};
+
+/**
+ * struct teesmc32_param - parameter
+ * @attr: attributes
+ * @memref: a memory reference
+ * @value: a value
+ *
+ * attr & TEESMC_ATTR_TYPE_MASK indicates if memref or value is used in the
+ * union. TEESMC_ATTR_TYPE_VALUE_* indicates value and
+ * TEESMC_ATTR_TYPE_MEMREF_* indicates memref. TEESMC_ATTR_TYPE_NONE
+ * indicates that none of the members are used.
+ */
+struct teesmc32_param {
+	uint32_t attr;
+	union {
+		struct teesmc32_param_memref memref;
+		struct teesmc32_param_value value;
+	} u;
+};
+
+/**
+ * struct teesmc64_param - parameter
+ * @attr: attributes
+ * @memref: a memory reference
+ * @value: a value
+ *
+ * See description of union teesmc32_param.
+ */
+struct teesmc64_param {
+	uint64_t attr;
+	union {
+		struct teesmc64_param_memref memref;
+		struct teesmc64_param_value value;
+	} u;
+};
+
+/**
+ * struct teesmc32_arg - SMC argument for Trusted OS
+ * @cmd: Command, one of TEESMC_CMD_*
+ * @ta_func: Trusted Application function, specific to the Trusted Application,
+ *	     used if cmd == TEESMC_CMD_INVOKE_COMMAND
+ * @session: In parameter for all TEESMC_CMD_* except
+ *	     TEESMC_CMD_OPEN_SESSION where it's an output paramter instead
+ * @ret: return value
+ * @ret_origin: origin of the return value
+ * @num_params: number of parameters supplied to the OS Command
+ * @params: the parameters supplied to the OS Command
+ *
+ * All normal SMC calls to Trusted OS uses this struct. If cmd requires
+ * further information than what these field holds it can be passed as a
+ * parameter tagged as meta (setting the TEESMC_ATTR_META bit in
+ * corresponding param_attrs). This is used for TEESMC_CMD_OPEN_SESSION
+ * to pass a struct teesmc32_meta_open_session which is needed find the
+ * Trusted Application and to indicate the credentials of the client.
+ */
+struct teesmc32_arg {
+	uint32_t cmd;
+	uint32_t ta_func;
+	uint32_t session;
+	uint32_t ret;
+	uint32_t ret_origin;
+	uint32_t num_params;
+	/*
+	 * Commented out element used to visualize the layout dynamic part
+	 * of the struct. Note that this field is not available at all
+	 * if num_params == 0.
+	 *
+	 * params is accessed through the macro TEESMC32_GET_PARAMS
+	 *
+	 * struct teesmc32_param params[num_params];
+	 */
+};
+
+/**
+ * TEESMC32_GET_PARAMS - return pointer to union teesmc32_param *
+ *
+ * @x: Pointer to a struct teesmc32_arg
+ *
+ * Returns a pointer to the params[] inside a struct teesmc32_arg.
+ */
+#define TEESMC32_GET_PARAMS(x) \
+	(struct teesmc32_param *)(((struct teesmc32_arg *)(x)) + 1)
+
+/**
+ * TEESMC32_GET_ARG_SIZE - return size of struct teesmc32_arg
+ *
+ * @num_params: Number of parameters embedded in the struct teesmc32_arg
+ *
+ * Returns the size of the struct teesmc32_arg together with the number
+ * of embedded paramters.
+ */
+#define TEESMC32_GET_ARG_SIZE(num_params) \
+	(sizeof(struct teesmc32_arg) + \
+	 sizeof(struct teesmc32_param) * (num_params))
+
+/**
+ * struct teesmc64_arg - SMC argument for Trusted OS
+ * @cmd: OS Command, one of TEESMC_CMD_*
+ * @ta_func: Trusted Application function, specific to the Trusted Application
+ * @session: In parameter for all TEESMC_CMD_* but
+ *	     TEESMC_CMD_OPEN_SESSION
+ * @ret: return value
+ * @ret_origin: origin of the return value
+ * @num_params: number of parameters supplied to the OS Command
+ * @params: the parameters supplied to the OS Command
+ *
+ * See description of struct teesmc32_arg.
+ */
+struct teesmc64_arg {
+	uint64_t cmd;
+	uint64_t ta_func;
+	uint64_t session;
+	uint64_t ret;
+	uint64_t ret_origin;
+	uint64_t num_params;
+	/*
+	 * Commented out element used to visualize the layout dynamic part
+	 * of the struct. Note that this field is not available at all
+	 * if num_params == 0.
+	 *
+	 * params is accessed through the macro TEESMC64_GET_PARAMS
+	 *
+	 * struct teesmc64_param params[num_params];
+	 */
+};
+
+/**
+ * TEESMC64_GET_PARAMS - return pointer to union teesmc64_param *
+ *
+ * @x: Pointer to a struct teesmc64_arg
+ *
+ * Returns a pointer to the params[] inside a struct teesmc64_arg.
+ */
+#define TEESMC64_GET_PARAMS(x) \
+	(struct teesmc64_param *)(((struct teesmc64_arg *)(x)) + 1)
+
+/**
+ * TEESMC64_GET_ARG_SIZE - return size of struct teesmc64_arg
+ *
+ * @num_params: Number of parameters embedded in the struct teesmc64_arg
+ *
+ * Returns the size of the struct teesmc64_arg together with the number
+ * of embedded paramters.
+ */
+#define TEESMC64_GET_ARG_SIZE(num_params) \
+	(sizeof(struct teesmc64_arg) + \
+	 sizeof(struct teesmc64_param) * (num_params))
+
+#define TEESMC_UUID_LEN	16
+
+/**
+ * struct teesmc_meta_open_session - additional parameters for
+ *				     TEESMC32_CMD_OPEN_SESSION and
+ *				     TEESMC64_CMD_OPEN_SESSION
+ * @uuid: UUID of the Trusted Application
+ * @clnt_uuid: UUID of client
+ * @clnt_login: Login class of client, TEE_LOGIN_* if being Global Platform
+ *		compliant
+ *
+ * This struct is passed in the first parameter as an input memref tagged
+ * as meta on an TEESMC{32,64}_CMD_OPEN_SESSION cmd. It's important
+ * that it really is the first parameter to make it easy for an eventual
+ * hypervisor to inspect and possibly update clnt_* values.
+ */
+struct teesmc_meta_open_session {
+	uint8_t uuid[TEESMC_UUID_LEN];
+	uint8_t clnt_uuid[TEESMC_UUID_LEN];
+	uint32_t clnt_login;
+};
+
+
+#endif /*!ASM*/
+
+/*
+ *******************************************************************************
+ * Part 2 - low level SMC interaction
+ *******************************************************************************
+ */
+
+#define TEESMC_32			0
+#define TEESMC_64			0x40000000
+#define TEESMC_FAST_CALL		0x80000000
+#define TEESMC_STD_CALL			0
+
+#define TEESMC_OWNER_MASK		0x3F
+#define TEESMC_OWNER_SHIFT		24
+
+#define TEESMC_FUNC_MASK		0xFFFF
+
+#define TEESMC_IS_FAST_CALL(smc_val)	((smc_val) & TEESMC_FAST_CALL)
+#define TEESMC_IS_64(smc_val)		((smc_val) & TEESMC_64)
+#define TEESMC_FUNC_NUM(smc_val)	((smc_val) & TEESMC_FUNC_MASK)
+#define TEESMC_OWNER_NUM(smc_val)	(((smc_val) >> TEESMC_OWNER_SHIFT) & \
+					 TEESMC_OWNER_MASK)
+
+#define TEESMC_CALL_VAL(type, calling_convention, owner, func_num) \
+			((type) | (calling_convention) | \
+			(((owner) & TEESMC_OWNER_MASK) << TEESMC_OWNER_SHIFT) |\
+			((func_num) & TEESMC_FUNC_MASK))
+
+#define TEESMC_OWNER_ARCH		0
+#define TEESMC_OWNER_CPU		1
+#define TEESMC_OWNER_SIP		2
+#define TEESMC_OWNER_OEM		3
+#define TEESMC_OWNER_STANDARD		4
+#define TEESMC_OWNER_TRUSTED_APP	48
+#define TEESMC_OWNER_TRUSTED_OS		50
+
+#define TEESMC_OWNER_TRUSTED_OS_OPTEED	62
+#define TEESMC_OWNER_TRUSTED_OS_API	63
+
+/*
+ * Function specified by SMC Calling convention.
+ */
+#define TEESMC32_FUNCID_CALLS_COUNT	0xFF00
+#define TEESMC32_CALLS_COUNT \
+	TEESMC_CALL_VAL(TEESMC_32, TEESMC_FAST_CALL, \
+			TEESMC_OWNER_TRUSTED_OS_API, \
+			TEESMC32_FUNCID_CALLS_COUNT)
+
+/*
+ * Function specified by SMC Calling convention
+ *
+ * Return one of the following UIDs if using API specified in this file
+ * without further extentions:
+ * 65cb6b93-af0c-4617-8ed6-644a8d1140f8 : Only 32 bit calls are supported
+ * 65cb6b93-af0c-4617-8ed6-644a8d1140f9 : Both 32 and 64 bit calls are supported
+ */
+#define TEESMC_UID_R0			0x65cb6b93
+#define TEESMC_UID_R1			0xaf0c4617
+#define TEESMC_UID_R2			0x8ed6644a
+#define TEESMC_UID32_R3			0x8d1140f8
+#define TEESMC_UID64_R3			0x8d1140f9
+#define TEESMC32_FUNCID_CALLS_UID	0xFF01
+#define TEESMC32_CALLS_UID \
+	TEESMC_CALL_VAL(TEESMC_32, TEESMC_FAST_CALL, \
+			TEESMC_OWNER_TRUSTED_OS_API, \
+			TEESMC32_FUNCID_CALLS_UID)
+
+/*
+ * Function specified by SMC Calling convention
+ *
+ * Returns 1.0 if using API specified in this file without further extentions.
+ */
+#define TEESMC_REVISION_MAJOR	1
+#define TEESMC_REVISION_MINOR	0
+#define TEESMC32_FUNCID_CALLS_REVISION	0xFF03
+#define TEESMC32_CALLS_REVISION \
+	TEESMC_CALL_VAL(TEESMC_32, TEESMC_FAST_CALL, \
+			TEESMC_OWNER_TRUSTED_OS_API, \
+			TEESMC32_FUNCID_CALLS_REVISION)
+
+/*
+ * Get UUID of Trusted OS.
+ *
+ * Used by non-secure world to figure out which Trusted OS is installed.
+ * Note that returned UUID is the UUID of the Trusted OS, not of the API.
+ *
+ * Returns UUID in r0-4/w0-4 in the same way as TEESMC32_CALLS_UID
+ * described above.
+ */
+#define TEESMC_FUNCID_GET_OS_UUID	0
+#define TEESMC32_CALL_GET_OS_UUID \
+	TEESMC_CALL_VAL(TEESMC_32, TEESMC_FAST_CALL, TEESMC_OWNER_TRUSTED_OS, \
+			TEESMC_FUNCID_GET_OS_UUID)
+
+/*
+ * Get revision of Trusted OS.
+ *
+ * Used by non-secure world to figure out which version of the Trusted OS
+ * is installed. Note that the returned revision is the revision of the
+ * Trusted OS, not of the API.
+ *
+ * Returns revision in r0-1/w0-1 in the same way as TEESMC32_CALLS_REVISION
+ * described above.
+ */
+#define TEESMC_FUNCID_GET_OS_REVISION	1
+#define TEESMC32_CALL_GET_OS_REVISION \
+	TEESMC_CALL_VAL(TEESMC_32, TEESMC_FAST_CALL, TEESMC_OWNER_TRUSTED_OS, \
+			TEESMC_FUNCID_GET_OS_REVISION)
+
+
+
+/*
+ * Call with struct teesmc32_arg as argument
+ *
+ * Call register usage:
+ * r0/x0	SMC Function ID, TEESMC32_CALL_WITH_ARG
+ * r1/x1	Physical pointer to a struct teesmc32_arg
+ * r2-6/x2-6	Not used
+ * r7/x7	Hypervisor Client ID register
+ *
+ * Normal return register usage:
+ * r0/x0	Return value, TEESMC_RETURN_*
+ * r1-3/x1-3	Not used
+ * r4-7/x4-7	Preserved
+ *
+ * Ebusy return register usage:
+ * r0/x0	Return value, TEESMC_RETURN_EBUSY
+ * r1-3/x1-3	Preserved
+ * r4-7/x4-7	Preserved
+ *
+ * RPC return register usage:
+ * r0/x0	Return value, TEESMC_RETURN_IS_RPC(val)
+ * r1-2/x1-2	RPC parameters
+ * r3-7/x3-7	Resume information, must be preserved
+ *
+ * Possible return values:
+ * TEESMC_RETURN_UNKNOWN_FUNCTION	Trusted OS does not recognize this
+ *					function.
+ * TEESMC_RETURN_OK			Call completed, result updated in
+ *					the previously supplied struct
+ *					teesmc32_arg.
+ * TEESMC_RETURN_EBUSY			Trusted OS busy, try again later.
+ * TEESMC_RETURN_EBADADDR		Bad physcial pointer to struct
+ *					teesmc32_arg.
+ * TEESMC_RETURN_EBADCMD		Bad/unknown cmd in struct teesmc32_arg
+ * TEESMC_RETURN_IS_RPC()		Call suspended by RPC call to normal
+ *					world.
+ */
+#define TEESMC_FUNCID_CALL_WITH_ARG	2
+#define TEESMC32_CALL_WITH_ARG \
+	TEESMC_CALL_VAL(TEESMC_32, TEESMC_STD_CALL, TEESMC_OWNER_TRUSTED_OS, \
+	TEESMC_FUNCID_CALL_WITH_ARG)
+/* Same as TEESMC32_CALL_WITH_ARG but a "fast call". */
+#define TEESMC32_FASTCALL_WITH_ARG \
+	TEESMC_CALL_VAL(TEESMC_32, TEESMC_FAST_CALL, TEESMC_OWNER_TRUSTED_OS, \
+	TEESMC_FUNCID_CALL_WITH_ARG)
+
+/*
+ * Call with struct teesmc64_arg as argument
+ *
+ * See description of TEESMC32_CALL_WITH_ARG above, uses struct
+ * teesmc64_arg in x1 instead.
+ */
+#define TEESMC64_CALL_WITH_ARG \
+	TEESMC_CALL_VAL(TEESMC_64, TEESMC_STD_CALL, TEESMC_OWNER_TRUSTED_OS, \
+	TEESMC_FUNCID_CALL_WITH_ARG)
+/* Same as TEESMC64_CALL_WITH_ARG but a "fast call". */
+#define TEESMC64_FASTCALL_WITH_ARG \
+	TEESMC_CALL_VAL(TEESMC_64, TEESMC_FAST_CALL, TEESMC_OWNER_TRUSTED_OS, \
+	TEESMC_FUNCID_CALL_WITH_ARG)
+
+/*
+ * Resume from RPC (for example after processing an IRQ)
+ *
+ * Call register usage:
+ * r0/x0	SMC Function ID,
+ *		TEESMC32_CALL_RETURN_FROM_RPC or
+ *		TEESMC32_FASTCALL_RETURN_FROM_RPC
+ * r1-3/x1-3	Value of r1-3/x1-3 when TEESMC32_CALL_WITH_ARG returned
+ *		TEESMC_RETURN_RPC in r0/x0
+ *
+ * Return register usage is the same as for TEESMC32_CALL_WITH_ARG above.
+ *
+ * Possible return values
+ * TEESMC_RETURN_UNKNOWN_FUNCTION	Trusted OS does not recognize this
+ *					function.
+ * TEESMC_RETURN_OK			Original call completed, result
+ *					updated in the previously supplied.
+ *					struct teesmc32_arg
+ * TEESMC_RETURN_RPC			Call suspended by RPC call to normal
+ *					world.
+ * TEESMC_RETURN_EBUSY			Trusted OS busy, try again later.
+ * TEESMC_RETURN_ERESUME		Resume failed, the opaque resume
+ *					information was corrupt.
+ */
+#define TEESMC_FUNCID_RETURN_FROM_RPC	3
+#define TEESMC32_CALL_RETURN_FROM_RPC \
+	TEESMC_CALL_VAL(TEESMC_32, TEESMC_STD_CALL, TEESMC_OWNER_TRUSTED_OS, \
+			TEESMC_FUNCID_RETURN_FROM_RPC)
+/* Same as TEESMC32_CALL_RETURN_FROM_RPC but a "fast call". */
+#define TEESMC32_FASTCALL_RETURN_FROM_RPC \
+	TEESMC_CALL_VAL(TEESMC_32, TEESMC_STD_CALL, TEESMC_OWNER_TRUSTED_OS, \
+			TEESMC_FUNCID_RETURN_FROM_RPC)
+
+/*
+ * Resume from RPC (for example after processing an IRQ)
+ *
+ * See description of TEESMC32_CALL_RETURN_FROM_RPC above, used when
+ * it's a 64bit call that has returned.
+ */
+#define TEESMC64_CALL_RETURN_FROM_RPC \
+	TEESMC_CALL_VAL(TEESMC_64, TEESMC_STD_CALL, TEESMC_OWNER_TRUSTED_OS, \
+			TEESMC_FUNCID_RETURN_FROM_RPC)
+/* Same as TEESMC64_CALL_RETURN_FROM_RPC but a "fast call". */
+#define TEESMC64_FASTCALL_RETURN_FROM_RPC \
+	TEESMC_CALL_VAL(TEESMC_64, TEESMC_STD_CALL, TEESMC_OWNER_TRUSTED_OS, \
+			TEESMC_FUNCID_RETURN_FROM_RPC)
+
+#define TEESMC_RETURN_RPC_PREFIX_MASK	0xFFFF0000
+#define TEESMC_RETURN_RPC_PREFIX	0xFFFF0000
+#define TEESMC_RETURN_RPC_FUNC_MASK	0x0000FFFF
+
+#define TEESMC_RETURN_GET_RPC_FUNC(ret)	((ret) & TEESMC_RETURN_RPC_FUNC_MASK)
+
+#define TEESMC_RPC_VAL(func)		((func) | TEESMC_RETURN_RPC_PREFIX)
+
+/*
+ * Allocate argument memory for RPC parameter passing.
+ * Argument memory is used to hold a struct teesmc32_arg.
+ *
+ * "Call" register usage:
+ * r0/x0	This value, TEESMC_RETURN_RPC_ALLOC
+ * r1/x1	Size in bytes of required argument memory
+ * r2-7/x2-7	Resume information, must be preserved
+ *
+ * "Return" register usage:
+ * r0/x0	SMC Function ID, TEESMC32_CALL_RETURN_FROM_RPC if it was an
+ *		AArch32 SMC return or TEESMC64_CALL_RETURN_FROM_RPC for
+ *		AArch64 SMC return
+ * r1/x1	Physical pointer to allocated argument memory, 0 if size
+ *		was 0 or if memory can't be allocated
+ * r2-7/x2-7	Preserved
+ */
+#define TEESMC_RPC_FUNC_ALLOC_ARG	0
+#define TEESMC_RETURN_RPC_ALLOC_ARG	\
+	TEESMC_RPC_VAL(TEESMC_RPC_FUNC_ALLOC_ARG)
+
+/*
+ * Allocate payload memory for RPC parameter passing.
+ * Payload memory is used to hold the memory referred to by struct
+ * teesmc32_param_memref.
+ *
+ * "Call" register usage:
+ * r0/x0	This value, TEESMC_RETURN_RPC_ALLOC
+ * r1/x1	Size in bytes of required payload memory
+ * r2-7/x2-7	Resume information, must be preserved
+ *
+ * "Return" register usage:
+ * r0/x0	SMC Function ID, TEESMC32_CALL_RETURN_FROM_RPC if it was an
+ *		AArch32 SMC return or TEESMC64_CALL_RETURN_FROM_RPC for
+ *		AArch64 SMC return
+ * r1/x1	Physical pointer to allocated payload memory, 0 if size
+ *		was 0 or if memory can't be allocated
+ * r2-7/x2-7	Preserved
+ */
+#define TEESMC_RPC_FUNC_ALLOC_PAYLOAD	1
+#define TEESMC_RETURN_RPC_ALLOC_PAYLOAD	\
+	TEESMC_RPC_VAL(TEESMC_RPC_FUNC_ALLOC_PAYLOAD)
+
+/*
+ * Free memory previously allocated by TEESMC_RETURN_RPC_ALLOC_ARG.
+ *
+ * "Call" register usage:
+ * r0/x0	This value, TEESMC_RETURN_RPC_FREE
+ * r1/x1	Physical pointer to previously allocated argument memory
+ * r2-7/x2-7	Resume information, must be preserved
+ *
+ * "Return" register usage:
+ * r0/x0	SMC Function ID, TEESMC32_CALL_RETURN_FROM_RPC if it was an
+ *		AArch32 SMC return or TEESMC64_CALL_RETURN_FROM_RPC for
+ *		AArch64 SMC return
+ * r1/x1	Not used
+ * r2-7/x2-7	Preserved
+ */
+#define TEESMC_RPC_FUNC_FREE_ARG	2
+#define TEESMC_RETURN_RPC_FREE_ARG	TEESMC_RPC_VAL(TEESMC_RPC_FUNC_FREE_ARG)
+
+/*
+ * Free memory previously allocated by TEESMC_RETURN_RPC_ALLOC_PAYLOAD.
+ *
+ * "Call" register usage:
+ * r0/x0	This value, TEESMC_RETURN_RPC_FREE
+ * r1/x1	Physical pointer to previously allocated payload memory
+ * r3-7/x3-7	Resume information, must be preserved
+ *
+ * "Return" register usage:
+ * r0/x0	SMC Function ID, TEESMC32_CALL_RETURN_FROM_RPC if it was an
+ *		AArch32 SMC return or TEESMC64_CALL_RETURN_FROM_RPC for
+ *		AArch64 SMC return
+ * r1-2/x1-2	Not used
+ * r3-7/x3-7	Preserved
+ */
+#define TEESMC_RPC_FUNC_FREE_PAYLOAD	3
+#define TEESMC_RETURN_RPC_FREE_PAYLOAD	\
+	TEESMC_RPC_VAL(TEESMC_RPC_FUNC_FREE_PAYLOAD)
+
+/*
+ * Deliver an IRQ in normal world.
+ *
+ * "Call" register usage:
+ * r0/x0	TEESMC_RETURN_RPC_IRQ
+ * r1-7/x1-7	Resume information, must be preserved
+ *
+ * "Return" register usage:
+ * r0/x0	SMC Function ID, TEESMC32_CALL_RETURN_FROM_RPC if it was an
+ *		AArch32 SMC return or TEESMC64_CALL_RETURN_FROM_RPC for
+ *		AArch64 SMC return
+ * r1-7/x1-7	Preserved
+ */
+#define TEESMC_RPC_FUNC_IRQ		4
+#define TEESMC_RETURN_RPC_IRQ		TEESMC_RPC_VAL(TEESMC_RPC_FUNC_IRQ)
+
+/*
+ * Do an RPC request. The supplied struct teesmc{32,64}_arg tells which
+ * request to do and the paramters for the request. The following fields
+ * are used (the rest are unused):
+ * - cmd		the Request ID
+ * - ret		return value of the request, filled in by normal world
+ * - num_params		number of parameters for the request
+ * - params		the parameters
+ * - param_attrs	attributes of the parameters
+ *
+ * "Call" register usage:
+ * r0/x0	TEESMC_RETURN_RPC_CMD
+ * r1/x1	Physical pointer to a struct teesmc32_arg if returning from
+ *		a AArch32 SMC or a struct teesmc64_arg if returning from a
+ *		AArch64 SMC, must be preserved, only the data should
+ *		be updated
+ * r2-7/x2-7	Resume information, must be preserved
+ *
+ * "Return" register usage:
+ * r0/x0	SMC Function ID, TEESMC32_CALL_RETURN_FROM_RPC if it was an
+ *		AArch32 SMC return or TEESMC64_CALL_RETURN_FROM_RPC for
+ *		AArch64 SMC return
+ * r1-7/x1-7	Preserved
+ */
+#define TEESMC_RPC_FUNC_CMD		5
+#define TEESMC_RETURN_RPC_CMD		TEESMC_RPC_VAL(TEESMC_RPC_FUNC_CMD)
+
+
+/* Returned in r0 */
+#define TEESMC_RETURN_UNKNOWN_FUNCTION	0xFFFFFFFF
+
+/* Returned in r0 only from Trusted OS functions */
+#define TEESMC_RETURN_OK		0x0
+#define TEESMC_RETURN_EBUSY		0x1
+#define TEESMC_RETURN_ERESUME		0x2
+#define TEESMC_RETURN_EBADADDR		0x3
+#define TEESMC_RETURN_EBADCMD		0x4
+#define TEESMC_RETURN_IS_RPC(ret) \
+	(((ret) & TEESMC_RETURN_RPC_PREFIX_MASK) == TEESMC_RETURN_RPC_PREFIX)
+
+typedef struct teesmc32_arg             t_teesmc32_arg;
+typedef struct teesmc32_param           t_teesmc32_param;
+typedef struct teesmc_meta_open_session t_teesmc_meta_open_session;
+
+void tee_smc_call(ARM_SMC_ARGS *param);
+
+#endif /* TEESMC_H */
diff --git a/include/optee_include/teesmc_optee.h b/include/optee_include/teesmc_optee.h
new file mode 100644
index 0000000000..a2b7d6a5a9
--- /dev/null
+++ b/include/optee_include/teesmc_optee.h
@@ -0,0 +1,145 @@
+/*
+ * Copyright 2017, Rockchip Electronics Co., Ltd
+ * hisping lin, <hisping.lin@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#ifndef TEESMC_OPTEE_H
+#define TEESMC_OPTEE_H
+
+#include <optee_include/tee_base_types.h>
+
+#define TEESMC_OPTEE_RETURN_NOTAVAIL	0x5700
+
+/*
+ * Get Shared Memory Config
+ *
+ * Returns the Secure/Non-secure shared memory config.
+ *
+ * Call register usage:
+ * r0	SMC Function ID, TEESMC32_OPTEE_FASTCALL_GET_SHM_CONFIG
+ * r1-6	Not used
+ * r7	Hypervisor Client ID register
+ *
+ * Have config return register usage:
+ * r0	TEESMC_RETURN_OK
+ * r1	Physical address of start of SHM
+ * r2	Size of of SHM
+ * r3	1 if SHM is cached, 0 if uncached.
+ * r4-7	Preserved
+ *
+ * Not available register usage:
+ * r0	TEESMC_OPTEE_RETURN_NOTAVAIL
+ * r1-3 Not used
+ * r4-7	Preserved
+ */
+#define TEESMC_OPTEE_FUNCID_GET_SHM_CONFIG	0x5700
+#define TEESMC32_OPTEE_FASTCALL_GET_SHM_CONFIG \
+	TEESMC_CALL_VAL(TEESMC_32, TEESMC_FAST_CALL, TEESMC_OWNER_TRUSTED_OS, \
+			TEESMC_OPTEE_FUNCID_GET_SHM_CONFIG)
+
+/*
+ * Configures L2CC mutex
+ *
+ * Disables, enables usage of L2CC mutex. Returns or sets physical address
+ * of L2CC mutex.
+ *
+ * Call register usage:
+ * r0	SMC Function ID, TEESMC32_OPTEE_FASTCALL_L2CC_MUTEX
+ * r1	TEESMC_OPTEE_L2CC_MUTEX_GET_ADDR Get physical address of mutex
+ *	TEESMC_OPTEE_L2CC_MUTEX_SET_ADDR Set physical address of mutex
+ *	TEESMC_OPTEE_L2CC_MUTEX_ENABLE	 Enable usage of mutex
+ *	TEESMC_OPTEE_L2CC_MUTEX_DISABLE	 Disable usage of mutex
+ * r2	if r1 == TEESMC_OPTEE_L2CC_MUTEX_SET_ADDR, physical address of mutex
+ * r3-6	Not used
+ * r7	Hypervisor Client ID register
+ *
+ * Have config return register usage:
+ * r0	TEESMC_RETURN_OK
+ * r1	Preserved
+ * r2	if r1 == 0, physical address of L2CC mutex
+ * r3-7	Preserved
+ *
+ * Error return register usage:
+ * r0	TEESMC_OPTEE_RETURN_NOTAVAIL	Physical address not available
+ *	TEESMC_RETURN_EBADADDR		Bad supplied physical address
+ *	TEESMC_RETURN_EBADCMD		Unsupported value in r1
+ * r1-7	Preserved
+ */
+#define TEESMC_OPTEE_L2CC_MUTEX_GET_ADDR	0
+#define TEESMC_OPTEE_L2CC_MUTEX_SET_ADDR	1
+#define TEESMC_OPTEE_L2CC_MUTEX_ENABLE	2
+#define TEESMC_OPTEE_L2CC_MUTEX_DISABLE	3
+#define TEESMC_OPTEE_FUNCID_L2CC_MUTEX	0x5701
+#define TEESMC32_OPTEE_FASTCALL_L2CC_MUTEX \
+	TEESMC_CALL_VAL(TEESMC_32, TEESMC_FAST_CALL, TEESMC_OWNER_TRUSTED_OS, \
+			TEESMC_OPTEE_FUNCID_L2CC_MUTEX)
+
+/*
+ * Allocate payload memory for RPC parameter passing.
+ *
+ * "Call" register usage:
+ * r0/x0	This value, TEESMC_RETURN_OPTEE_RPC_ALLOC_PAYLOAD
+ * r1/x1	Size in bytes of required payload memory
+ * r2/x2	Not used
+ * r3-7/x3-7	Resume information, must be preserved
+ *
+ * "Return" register usage:
+ * r0/x0	SMC Function ID, TEESMC32_CALL_RETURN_FROM_RPC if it was an
+ *		AArch32 SMC return or TEESMC64_CALL_RETURN_FROM_RPC for
+ *		AArch64 SMC return
+ * r1/x1	Physical pointer to allocated payload memory, 0 if size
+ *		was 0 or if memory can't be allocated
+ * r2/x2	Shared memory cookie used when freeing the memory
+ * r3-7/x3-7	Preserved
+ */
+#define TEESMC_OPTEE_RPC_FUNC_ALLOC_PAYLOAD	0x5700
+#define TEESMC_RETURN_OPTEE_RPC_ALLOC_PAYLOAD	\
+		TEESMC_RPC_VAL(TEESMC_OPTEE_RPC_FUNC_ALLOC_PAYLOAD)
+
+
+/*
+ * Free memory previously allocated by TEESMC_RETURN_OPTEE_RPC_ALLOC_PAYLOAD
+ *
+ * "Call" register usage:
+ * r0/x0	This value, TEESMC_RETURN_OPTEE_RPC_FREE_PAYLOAD
+ * r1/x1	Shared memory cookie belonging to this payload memory
+ * r2-7/x2-7	Resume information, must be preserved
+ *
+ * "Return" register usage:
+ * r0/x0	SMC Function ID, TEESMC32_CALL_RETURN_FROM_RPC if it was an
+ *		AArch32 SMC return or TEESMC64_CALL_RETURN_FROM_RPC for
+ *		AArch64 SMC return
+ * r2-7/x2-7	Preserved
+ */
+#define TEESMC_OPTEE_RPC_FUNC_FREE_PAYLOAD		0x5701
+#define TEESMC_RETURN_OPTEE_RPC_FREE_PAYLOAD	\
+		TEESMC_RPC_VAL(TEESMC_OPTEE_RPC_FUNC_FREE_PAYLOAD)
+
+/*
+ * Overriding default UID of the API since the it has OP-TEE extensions
+ * 384fb3e0-e7f8-11e3-af63-0002a5d5c51b : Only 32 bit calls are supported
+ * 384fb3e0-e7f8-11e3-af63-0002a5d5c51c : Both 32 and 64 bit calls are supported
+ */
+#define TEESMC_OPTEE_UID_R0		0x384fb3e0
+#define TEESMC_OPTEE_UID_R1		0xe7f811e3
+#define TEESMC_OPTEE_UID_R2		0xaf630002
+#define TEESMC_OPTEE_UID32_R3		0xa5d5c51b
+#define TEESMC_OPTEE_UID64_R3		0xa5d5c51c
+
+#define TEESMC_OPTEE_REVISION_MAJOR	1
+#define TEESMC_OPTEE_REVISION_MINOR	0
+
+/*
+ * UUID for OP-TEE
+ * 486178e0-e7f8-11e3-bc5e-0002a5d5c51b
+ */
+#define TEESMC_OS_OPTEE_UUID_R0		0x486178e0
+#define TEESMC_OS_OPTEE_UUID_R1		0xe7f811e3
+#define TEESMC_OS_OPTEE_UUID_R2		0xbc5e0002
+#define TEESMC_OS_OPTEE_UUID_R3		0xa5d5c51b
+
+#define TEESMC_OS_OPTEE_REVISION_MAJOR	1
+#define TEESMC_OS_OPTEE_REVISION_MINOR	0
+
+#endif /*TEESMC_OPTEE_H*/
diff --git a/lib/Kconfig b/lib/Kconfig
index cf29e9b609..7ef02fa4d8 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -271,5 +271,6 @@ source lib/efi_loader/Kconfig
 source lib/avb/rk_libavb/Kconfig
 source lib/avb/rk_libavb_ab/Kconfig
 source lib/avb/rk_libavb_atx/Kconfig
+source lib/optee_clientApi/Kconfig
 
 endmenu
diff --git a/lib/Makefile b/lib/Makefile
index a74b72db15..5c8570ef27 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -49,6 +49,8 @@ obj-$(CONFIG_AVB_LIBAVB) += avb/rk_libavb/
 obj-$(CONFIG_AVB_LIBAVB_AB) += avb/rk_libavb_ab/
 obj-$(CONFIG_AVB_LIBAVB_ATX) += avb/rk_libavb_atx/
 
+obj-$(CONFIG_OPTEE_CLIENT) += optee_clientApi/
+
 obj-$(CONFIG_RSA) += rsa/
 obj-$(CONFIG_SHA1) += sha1.o
 obj-$(CONFIG_SHA256) += sha256.o
diff --git a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c
new file mode 100644
index 0000000000..0391f7c5e4
--- /dev/null
+++ b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c
@@ -0,0 +1,24460 @@
+#include <stdint.h>
+#include <stddef.h>
+
+const uint8_t keymaster_data[] = {
+0x48, 0x53, 0x54, 0x4f, 0x00, 0x00, 0x00, 0x00,
+0xfc, 0xfa, 0x02, 0x00, 0x30, 0x48, 0x00, 0x70,
+0x20, 0x00, 0x00, 0x01, 0x50, 0xf6, 0x8d, 0xb1,
+0x65, 0x28, 0xe8, 0x47, 0x09, 0xb2, 0x66, 0x2b,
+0xcb, 0x36, 0xab, 0x32, 0x8f, 0xcb, 0x33, 0xdb,
+0x64, 0xa3, 0x10, 0x5e, 0x35, 0xe6, 0xb4, 0xed,
+0x3e, 0xf8, 0x34, 0xc3, 0x0d, 0x1c, 0xef, 0x0a,
+0x8c, 0x0b, 0xf6, 0x92, 0xda, 0xba, 0xc4, 0x6a,
+0x29, 0x4d, 0x59, 0xc5, 0x2a, 0x45, 0x67, 0x15,
+0x1f, 0xa2, 0xcd, 0x5c, 0x2d, 0x10, 0xf1, 0x61,
+0x10, 0x8f, 0x48, 0x2a, 0x9b, 0x9d, 0x1f, 0x39,
+0xe0, 0x98, 0x63, 0x78, 0xb2, 0x5c, 0x90, 0xcb,
+0x56, 0x93, 0xac, 0x50, 0x53, 0xaa, 0x7d, 0xe9,
+0x7c, 0x35, 0x92, 0xf6, 0x29, 0x98, 0xef, 0x53,
+0xa8, 0x68, 0x54, 0x6f, 0x7c, 0x67, 0xa9, 0x8b,
+0xb8, 0x1c, 0x21, 0x0b, 0xea, 0xc8, 0x20, 0x6b,
+0xbe, 0x85, 0x8a, 0x9e, 0xb9, 0x04, 0x04, 0xd5,
+0x56, 0xe7, 0x69, 0x01, 0x43, 0x31, 0x61, 0xe3,
+0x43, 0xde, 0x92, 0x18, 0xf6, 0x80, 0x60, 0xd0,
+0x67, 0x7a, 0xed, 0xda, 0x86, 0x48, 0xf6, 0xfe,
+0xfd, 0xfe, 0xd9, 0x3a, 0x00, 0xd2, 0x77, 0x4a,
+0xad, 0xce, 0xa0, 0x3e, 0xd2, 0xbf, 0xf8, 0x94,
+0xe1, 0xf6, 0xdd, 0x56, 0x70, 0xa2, 0x7f, 0x8c,
+0xef, 0x95, 0xfb, 0xd5, 0x6c, 0xe3, 0x7b, 0x1a,
+0xb1, 0x22, 0xb3, 0xd9, 0x27, 0xea, 0x7b, 0xd2,
+0x27, 0x87, 0xfd, 0x6c, 0x2c, 0x7a, 0xd2, 0x08,
+0x1f, 0x6f, 0x06, 0x06, 0x81, 0x18, 0x0e, 0x45,
+0x73, 0xa5, 0x4d, 0xe6, 0xfe, 0x13, 0x4a, 0x44,
+0x01, 0xc8, 0x8e, 0x5b, 0xb3, 0x16, 0xb3, 0x3d,
+0x91, 0xbd, 0x08, 0x4e, 0xb5, 0x90, 0xe5, 0x10,
+0xab, 0x00, 0xf9, 0x71, 0x5a, 0x8d, 0x24, 0x95,
+0x10, 0xd5, 0x78, 0x51, 0x12, 0x10, 0x88, 0xdb,
+0x1f, 0x1d, 0xfe, 0x48, 0x13, 0x84, 0x1a, 0x10,
+0x46, 0xf2, 0x57, 0x76, 0x47, 0x6e, 0xa4, 0x60,
+0x7e, 0xbc, 0xa8, 0xf6, 0x73, 0xd3, 0xdd, 0xa9,
+0x10, 0xa1, 0x93, 0x48, 0xfc, 0x0f, 0x1e, 0x60,
+0x30, 0xd9, 0xf4, 0x89, 0x35, 0xec, 0x8d, 0x03,
+0x75, 0xa8, 0xf9, 0xfa, 0xb3, 0x35, 0x6a, 0xd9,
+0x34, 0xb6, 0xfb, 0xda, 0x7f, 0x45, 0x4c, 0x46,
+0x01, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x28, 0x00,
+0x01, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00,
+0x34, 0x00, 0x00, 0x00, 0x7c, 0xf8, 0x02, 0x00,
+0x02, 0x00, 0x00, 0x05, 0x34, 0x00, 0x20, 0x00,
+0x04, 0x00, 0x28, 0x00, 0x10, 0x00, 0x0f, 0x00,
+0x01, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x78, 0x09, 0x02, 0x00, 0x78, 0x09, 0x02, 0x00,
+0x07, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00,
+0x01, 0x00, 0x00, 0x00, 0x00, 0x90, 0x02, 0x00,
+0x00, 0x10, 0x02, 0x00, 0x00, 0x10, 0x02, 0x00,
+0x50, 0x06, 0x00, 0x00, 0x14, 0xb3, 0x00, 0x00,
+0x06, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00,
+0x01, 0x00, 0x00, 0x00, 0x00, 0xd0, 0x02, 0x00,
+0x00, 0xd0, 0x02, 0x00, 0x00, 0xd0, 0x02, 0x00,
+0x4c, 0x27, 0x00, 0x00, 0x4c, 0x27, 0x00, 0x00,
+0x06, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00,
+0x02, 0x00, 0x00, 0x00, 0x00, 0xd0, 0x02, 0x00,
+0x00, 0xd0, 0x02, 0x00, 0x00, 0xd0, 0x02, 0x00,
+0x78, 0x00, 0x00, 0x00, 0x78, 0x00, 0x00, 0x00,
+0x06, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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+0x55, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
+0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x4c, 0xf7, 0x02, 0x00, 0x7f, 0x00, 0x00, 0x00,
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+0xcb, 0xf7, 0x02, 0x00, 0x3a, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x6e, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00,
+0x02, 0x00, 0x00, 0x00, 0x50, 0x01, 0x02, 0x00,
+0x50, 0x81, 0x02, 0x00, 0xa0, 0x00, 0x00, 0x00,
+0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x04, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+0x01, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x05, 0xf8, 0x02, 0x00, 0x77, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+};
+const uint32_t keymaster_size = 195632;
diff --git a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta
new file mode 100644
index 0000000000..d1a6989c04
Binary files /dev/null and b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta differ
diff --git a/lib/optee_clientApi/Kconfig b/lib/optee_clientApi/Kconfig
new file mode 100644
index 0000000000..1b86310a6e
--- /dev/null
+++ b/lib/optee_clientApi/Kconfig
@@ -0,0 +1,7 @@
+config OPTEE_CLIENT
+	bool "Support OPTEE"
+	help
+	  U-boot can communicate with trust if
+	  the config is enable. This function can
+	  be use in android bootloader a/b and avb
+	  step.
diff --git a/lib/optee_clientApi/Makefile b/lib/optee_clientApi/Makefile
new file mode 100644
index 0000000000..0cc40a7c18
--- /dev/null
+++ b/lib/optee_clientApi/Makefile
@@ -0,0 +1,16 @@
+#Copyright 2012 The Chromium Authors
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y += OpteeClientMem.o
+obj-y += OpteeClientApiLib.o
+obj-y += OpteeClientTest.o
+obj-y += OpteeClientSMC.o
+obj-y += OpteeClientRPC.o
+obj-y += tee_smc-arm64.o
+obj-y += 258be795-f9ca-40e6-a8699ce6886c5d5d.o
+
+lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.o: lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c
+lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c: lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta
+	$(q)lib/optee_clientApi/tabinary_to_cfile.py --prefix keymaster --TA $< --out $@
diff --git a/lib/optee_clientApi/OpteeClientApiLib.c b/lib/optee_clientApi/OpteeClientApiLib.c
new file mode 100644
index 0000000000..8704be9057
--- /dev/null
+++ b/lib/optee_clientApi/OpteeClientApiLib.c
@@ -0,0 +1,321 @@
+/*
+ * Copyright 2017, Rockchip Electronics Co., Ltd
+ * hisping lin, <hisping.lin@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#include <common.h>
+#include <optee_include/OpteeClientApiLib.h>
+#include <optee_include/OpteeClientMem.h>
+#include <optee_include/OpteeClientSMC.h>
+
+/*
+ * Initlialize the library
+ */
+TEEC_Result OpteeClientApiLibInitialize(void)
+{
+	TEEC_Result status = TEEC_SUCCESS;
+
+	OpteeClientMemInit();
+
+	return status;
+}
+
+/*
+ * This function initializes a new TEE Context, connecting this Client
+ * application to the TEE indentified by the name name.
+ *
+ * name == NULL will give the default TEE.
+ *
+ * In this implementation only the default name is supported.
+ * If name != NULL then TEEC_ERROR_ITEM_NOT_FOUND is returned.
+ */
+TEEC_Result TEEC_InitializeContext(const char *name,
+				TEEC_Context *context)
+{
+	TEEC_Result teecresult = TEEC_SUCCESS;
+
+	debug("TEEC_InitializeContext Enter: name=%s  context=%s  0x%X\n",
+			name, context->devname, context->fd);
+
+	if (context == NULL) {
+		teecresult = TEEC_ERROR_BAD_PARAMETERS;
+		goto exit;
+	}
+
+	if (name != NULL) {
+		teecresult = TEEC_ERROR_ITEM_NOT_FOUND;
+		goto exit;
+	}
+
+	memset(context, 0, sizeof(*context));
+
+exit:
+	debug("TEEC_InitializeContext Exit : teecresult=0x%X\n\n", teecresult);
+	return teecresult;
+}
+
+/*
+ * This function destroys an initialized TEE Context, closing the connection
+ * between the Client and the TEE.
+ * The function implementation MUST do nothing if context is NULL
+ *
+ * There is nothing to do here since there is no context state.
+ */
+TEEC_Result TEEC_FinalizeContext(TEEC_Context *context)
+{
+	debug("TEEC_FinalizeContext Enter-Exit: context=0x%X\n",
+		(unsigned int)context);
+	return TEEC_SUCCESS;
+}
+
+/*
+ * Allocates or registers shared memory.
+ *
+ * Since EDK2 is configured flat with virtual memory == physical memory
+ * then we don't need to perform any special operations to get physical
+ * contiguous memory.
+ */
+TEEC_Result TEEC_AllocateSharedMemory(TEEC_Context *context,
+			TEEC_SharedMemory *shared_memory)
+{
+	TEEC_Result TeecResult = TEEC_SUCCESS;
+
+	debug("TEEC_AllocateSharedMemory Enter: context=%s 0x%X, shared_memory=0x%X\n",
+		context->devname, context->fd, shared_memory->size);
+
+	if ((context == NULL) || (shared_memory == NULL)) {
+		TeecResult = TEEC_ERROR_BAD_PARAMETERS;
+		goto Exit;
+	}
+
+	if (shared_memory->flags != 0) {
+		TeecResult = TEEC_ERROR_BAD_PARAMETERS;
+		goto Exit;
+	}
+
+	shared_memory->buffer = NULL;
+	shared_memory->alloc_buffer = 0;
+
+	debug("TEEC_AllocateSharedMemory: size=0x%X, flags=0x%X\n",
+			shared_memory->size, shared_memory->flags);
+
+	shared_memory->buffer = OpteeClientMemAlloc(shared_memory->size);
+	if (shared_memory->buffer == NULL) {
+		TeecResult = TEEC_ERROR_OUT_OF_MEMORY;
+		goto Exit;
+	}
+
+	shared_memory->alloc_buffer = shared_memory->buffer;
+
+Exit:
+	debug("TEEC_AllocateSharedMemory Exit : TeecResult=0x%X\n", TeecResult);
+	return TeecResult;
+}
+
+/*
+ * Releases shared memory.
+ *
+ * The optee_client implementation allows this to be called with a null pointer
+ * and null buffer but we'll assert this is not the case for better debugging.
+ */
+void TEEC_ReleaseSharedMemory(TEEC_SharedMemory *shared_memory)
+{
+	debug("TEEC_ReleaseSharedMemory Enter: shared_memory=0x%X\n",
+				shared_memory->size);
+
+	if (shared_memory == NULL)
+		goto Exit;
+
+	if (shared_memory->buffer == NULL)
+		goto Exit;
+
+	if (shared_memory->alloc_buffer != 0) {
+		OpteeClientMemFree(shared_memory->alloc_buffer);
+		shared_memory->alloc_buffer = 0;
+	}
+
+	shared_memory->buffer = NULL;
+	shared_memory->size = 0;
+
+Exit:
+	return;
+}
+
+/*
+ * Register shared memory
+ *
+ * If the supplied buffer is compatible we can use it as supplied otherwise
+ * we'll need to allocate a copy buffer for the transfer instead.
+ */
+TEEC_Result TEEC_RegisterSharedMemory(TEEC_Context *context,
+			TEEC_SharedMemory *shared_memory)
+{
+	TEEC_Result TeecResult = TEEC_SUCCESS;
+
+	if ((context == NULL) || (shared_memory == NULL)) {
+		TeecResult = TEEC_ERROR_BAD_PARAMETERS;
+		goto Exit;
+	}
+
+	if (shared_memory->buffer == NULL) {
+		TeecResult = TEEC_ERROR_BAD_PARAMETERS;
+		goto Exit;
+	}
+
+	shared_memory->alloc_buffer = 0;
+
+	phys_addr_t start = (phys_addr_t) shared_memory->buffer;
+
+	if ((start % 4096) != 0) {
+		TEEC_SharedMemory TempSharedMemory;
+		TempSharedMemory.size  = shared_memory->size;
+		TempSharedMemory.flags = shared_memory->flags;
+
+		TeecResult = TEEC_AllocateSharedMemory
+			(context, &TempSharedMemory);
+
+		if (TeecResult != TEEC_SUCCESS)
+			goto Exit;
+
+		shared_memory->alloc_buffer = TempSharedMemory.alloc_buffer;
+	}
+
+Exit:
+	debug("TEEC_RegisterSharedMemory Exit : TeecResult=0x%X\n", TeecResult);
+	return TeecResult;
+}
+
+/*
+ * This function opens a new Session between the Client application and the
+ * specified TEE application.
+ *
+ * Only connection_method == TEEC_LOGIN_PUBLIC is supported connection_data and
+ * operation shall be set to NULL.
+ */
+TEEC_Result TEEC_OpenSession(TEEC_Context *context,
+			TEEC_Session *session,
+			const TEEC_UUID *destination,
+			uint32_t connection_method,
+			const void *connection_data,
+			TEEC_Operation *operation,
+			uint32_t *error_origin)
+{
+	TEEC_Result TeecResult = TEEC_SUCCESS;
+	uint32_t TeecErrorOrigin = TEEC_ORIGIN_API;
+
+	debug("TEEC_OpenSession: session=0x%X, ...\n", session->id);
+
+	if ((context == NULL) || (session == NULL) || (destination == NULL)) {
+		TeecResult = TEEC_ERROR_BAD_PARAMETERS;
+		goto Exit;
+	}
+
+	if (connection_method != TEEC_LOGIN_PUBLIC) {
+		TeecResult = TEEC_ERROR_NOT_SUPPORTED;
+		goto Exit;
+	}
+
+	TEEC_Operation TeecNullOperation = {0};
+	TEEC_Operation *TeecOperation;
+
+	if (operation == NULL) {
+		memset(&TeecNullOperation, 0, sizeof(TEEC_Operation));
+		TeecOperation = &TeecNullOperation;
+	} else {
+		TeecOperation = operation;
+	}
+
+	TeecResult = TEEC_SMC_OpenSession(context, session, destination,
+				TeecOperation, &TeecErrorOrigin);
+
+Exit:
+	if (error_origin != NULL)
+		*error_origin = TeecErrorOrigin;
+
+	debug("TEEC_OpenSession Exit : TeecResult=0x%X, TeecErrorOrigin=0x%X\n\n",
+				TeecResult, TeecErrorOrigin);
+	return TeecResult;
+}
+
+/*
+ * This function closes a session which has been opened with a TEE
+ * application.
+ */
+void TEEC_CloseSession(TEEC_Session *session)
+{
+	TEEC_Result TeecResult = TEEC_SUCCESS;
+	uint32_t TeecErrorOrigin = TEEC_ORIGIN_API;
+
+	debug("TEEC_CloseSession Enter: session=0x%X\n", session->id);
+
+	if (session == NULL)
+		goto Exit;
+
+	TeecResult = TEEC_SMC_CloseSession(session, &TeecErrorOrigin);
+
+Exit:
+	debug("TEEC_CloseSession Exit : TeecResult=0x%X, TeecErrorOrigin=0x%X\n\n",
+			TeecResult, TeecErrorOrigin);
+	return;
+}
+
+/*
+ * Invokes a TEE command (secure service, sub-PA or whatever).
+ */
+TEEC_Result TEEC_InvokeCommand(TEEC_Session *session,
+				uint32_t cmd_id,
+				TEEC_Operation *operation,
+				uint32_t *error_origin)
+{
+	TEEC_Result TeecResult = TEEC_SUCCESS;
+	uint32_t TeecErrorOrigin = TEEC_ORIGIN_API;
+
+	debug("TEEC_InvokeCommand Enter: session=0x%X, cmd_id=0x%X\n",
+			session->id, cmd_id);
+
+	if (session == NULL) {
+		TeecResult = TEEC_ERROR_BAD_PARAMETERS;
+		goto Exit;
+	}
+
+	TEEC_Operation TeecNullOperation = {0};
+	TEEC_Operation *TeecOperation;
+
+	if (operation == NULL)
+		TeecOperation = &TeecNullOperation;
+	else
+		TeecOperation = operation;
+
+	TeecResult = TEEC_SMC_InvokeCommand(session, cmd_id,
+			TeecOperation, &TeecErrorOrigin);
+
+Exit:
+	if (error_origin != NULL)
+		*error_origin = TeecErrorOrigin;
+
+	debug("TEEC_InvokeCommand Exit : TeecResult=0x%X, TeecErrorOrigin=0x%X\n\n",
+				TeecResult, TeecErrorOrigin);
+
+	return TeecResult;
+}
+
+/*
+ * Request a cancellation of a in-progress operation (best effort)
+ */
+void TEEC_RequestCancellation(TEEC_Operation *operation)
+{
+	TEEC_Result TeecResult = TEEC_SUCCESS;
+	uint32_t TeecErrorOrigin = TEEC_ORIGIN_API;
+
+	if (operation == NULL)
+		goto Exit;
+
+	TeecResult = TEEC_SMC_RequestCancellation(operation, &TeecErrorOrigin);
+
+Exit:
+	debug("TEEC_RequestCancellation Exit : TeecResult=0x%X, TeecErrorOrigin=0x%X\n",
+			TeecResult, TeecErrorOrigin);
+
+	return;
+}
diff --git a/lib/optee_clientApi/OpteeClientMem.c b/lib/optee_clientApi/OpteeClientMem.c
new file mode 100644
index 0000000000..ac63037b22
--- /dev/null
+++ b/lib/optee_clientApi/OpteeClientMem.c
@@ -0,0 +1,154 @@
+/*
+ * Copyright 2017, Rockchip Electronics Co., Ltd
+ * hisping lin, <hisping.lin@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#include <common.h>
+#include <stdlib.h>
+#include <optee_include/OpteeClientMem.h>
+
+void *my_mem_start;
+uint32_t my_count;
+uint8_t *my_flag;
+typedef struct {
+	void *addrBlock;
+	uint32_t sizeBlock;
+	uint8_t used;
+} ALLOC_FLAG;
+ALLOC_FLAG alloc_flags[50];
+
+void my_malloc_init(void *start, uint32_t size)
+{
+	memset(start, 0, size);
+	my_mem_start = start;
+	my_count = size/4096;
+	my_flag = malloc(size/4096);
+	memset(my_flag, 0, size/4096);
+	memset(alloc_flags, 0, 50 * sizeof(ALLOC_FLAG));
+}
+
+void write_usedblock(void *addr, uint32_t size)
+{
+	uint8_t k;
+	for (k = 0; k < 50; k++) {
+		if (alloc_flags[k].used == 0) {
+			alloc_flags[k].used = 1;
+			alloc_flags[k].addrBlock = addr;
+			alloc_flags[k].sizeBlock = size;
+			break;
+		}
+	}
+}
+
+uint32_t find_sizeblock(void *addr)
+{
+	uint8_t k;
+	for (k = 0; k < 50; k++)
+		if (alloc_flags[k].used == 1 &&
+				alloc_flags[k].addrBlock == addr)
+			return alloc_flags[k].sizeBlock;
+
+	return 0;
+}
+
+void free_usedblock(void *addr)
+{
+	uint8_t k;
+	for (k = 0; k < 50; k++) {
+		if (alloc_flags[k].used == 1 &&
+				alloc_flags[k].addrBlock == addr) {
+			alloc_flags[k].used = 0;
+			alloc_flags[k].addrBlock = 0;
+			alloc_flags[k].sizeBlock = 0;
+			break;
+		}
+	}
+}
+
+void *my_malloc(uint32_t size)
+{
+	uint32_t i, j, k, num;
+
+	num = (size - 1) / 4096 + 1;
+
+	for (i = 0; i < my_count - num; i++) {
+		if (*(my_flag + i) == 0) {
+			for (j = 0; j < num; j++) {
+				if (*(my_flag + i + j) != 0)
+					break;
+			}
+			if (j == num) {
+				for (k = 0; k < num; k++) {
+					*(my_flag + i + k) = 1;
+					memset(my_mem_start +
+						(i + k) * 4096, 0, 4096);
+				}
+				debug(" malloc is: 0x%X  0x%X\n",
+					(int)i, (int)num);
+				write_usedblock((my_mem_start + i * 4096),
+					num * 4096);
+
+				return my_mem_start + (i * 4096);
+			}
+		}
+	}
+
+	return 0;
+}
+
+void my_free(void *ptr)
+{
+	uint32_t i, j, num, size;
+
+	if (ptr < my_mem_start)
+		return;
+
+	i = (ptr - my_mem_start) / 4096;
+	size = find_sizeblock(ptr);
+	free_usedblock(ptr);
+	if (size == 0)
+		return;
+
+	num = (size-1)/4096+1;
+	debug(" free is: 0x%X  0x%X\n", i, num);
+
+	for (j = 0; j < num; j++) {
+		*(my_flag + i + j) = 0;
+		memset(my_mem_start + (i + j) * 4096, 0, 4096);
+	}
+}
+
+/*
+ * Initlialize the memory component, for example providing the
+ * containing drivers handle.
+ */
+void OpteeClientMemInit(void)
+{
+#ifdef CONFIG_ROCKCHIP_RK3328
+	debug(" OpteeClientMemInit 64\n");
+	my_malloc_init(0x09200000, 0x00200000);
+#endif
+#ifdef CONFIG_ROCKCHIP_RK322X
+	debug(" OpteeClientMemInit 32\n");
+	my_malloc_init((void *)0x6910a000, 0x000e0000);
+#endif
+}
+
+/*
+ * Allocate a page aligned block of memory from the TrustZone
+ * shared memory block.
+ */
+void *OpteeClientMemAlloc(uint32_t length)
+{
+	return my_malloc(length);
+}
+
+/*
+ * Free a block of memory previously allocated using the
+ * OpteeClientMemAlloc function.
+ */
+void OpteeClientMemFree(void *mem)
+{
+	my_free(mem);
+}
diff --git a/lib/optee_clientApi/OpteeClientRPC.c b/lib/optee_clientApi/OpteeClientRPC.c
new file mode 100644
index 0000000000..3c03ac79d1
--- /dev/null
+++ b/lib/optee_clientApi/OpteeClientRPC.c
@@ -0,0 +1,562 @@
+/*
+ * Copyright 2017, Rockchip Electronics Co., Ltd
+ * hisping lin, <hisping.lin@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#include <common.h>
+#include <stdlib.h>
+#include <command.h>
+#include <mmc.h>
+#include <optee_include/OpteeClientMem.h>
+#include <optee_include/OpteeClientRPC.h>
+#include <optee_include/teesmc.h>
+#include <optee_include/teesmc_optee.h>
+#include <optee_include/tee_rpc_types.h>
+#include <optee_include/tee_rpc.h>
+#include <optee_include/258be795-f9ca-40e6-a8699ce6886c5d5d.h>
+
+/*
+ * Memory allocation.
+ * Currently treated the same for both arguments & payloads.
+ */
+TEEC_Result OpteeRpcAlloc(uint32_t Size, uint32_t *Address)
+{
+	TEEC_Result TeecResult = TEEC_SUCCESS;
+	uint32_t AllocAddress;
+
+	*Address = 0;
+
+	if (Size != 0) {
+		AllocAddress = (uint32_t) OpteeClientMemAlloc(Size);
+
+		if (AllocAddress == 0)
+			TeecResult = TEEC_ERROR_OUT_OF_MEMORY;
+		else
+			*Address = AllocAddress;
+	}
+	return TeecResult;
+}
+
+/*
+ * Memory free.
+ * Currently treated the same for both arguments & payloads.
+ */
+TEEC_Result OpteeRpcFree(uint32_t Address)
+{
+	OpteeClientMemFree((void *)Address);
+	return TEEC_SUCCESS;
+}
+
+/*
+ * Load a TA from storage into memory and provide it back to OpTEE.
+ * Param[0] = IN: struct tee_rpc_load_ta_cmd
+ * Param[1] = IN: all-zero OUT: TA Image allocated
+ */
+TEEC_Result OpteeRpcCmdLoadTa(t_teesmc32_arg *TeeSmc32Arg)
+{
+	TEEC_Result TeecResult = TEEC_SUCCESS;
+	t_teesmc32_param *TeeSmc32Param = NULL;
+	struct tee_rpc_load_ta_cmd *TeeLoadTaCmd = NULL;
+	uint32_t TeeLoadTaCmdSize = 0;
+
+	if (TeeSmc32Arg->num_params != 2) {
+		TeecResult = TEEC_ERROR_BAD_PARAMETERS;
+		goto Exit;
+	}
+
+	TeeSmc32Param = TEESMC32_GET_PARAMS(TeeSmc32Arg);
+	TeeLoadTaCmd = (struct tee_rpc_load_ta_cmd *)
+					TeeSmc32Param[0].u.memref.buf_ptr;
+	TeeLoadTaCmdSize = TeeSmc32Param[0].u.memref.size;
+
+	if ((TeeLoadTaCmd == NULL) ||
+		(TeeLoadTaCmdSize != sizeof(*TeeLoadTaCmd))) {
+		TeecResult = TEEC_ERROR_BAD_PARAMETERS;
+		goto Exit;
+	}
+
+	TEEC_Result Status = 0;
+	void *ImageData = NULL;
+	uint32_t ImageSize = 0;
+	uint32_t AllocAddress = 0;
+
+	ImageData = (void *)keymaster_data;
+	ImageSize = keymaster_size;
+
+	if (Status != 0) {
+		TeecResult = TEEC_ERROR_ITEM_NOT_FOUND;
+		goto Exit;
+	}
+
+	AllocAddress = (uint32_t) OpteeClientMemAlloc(ImageSize);
+
+	if (AllocAddress == 0) {
+		TeecResult = TEEC_ERROR_OUT_OF_MEMORY;
+		goto Exit;
+	}
+
+	memcpy((void *)AllocAddress, ImageData, ImageSize);
+
+	debug("...TA loaded at 0x%X of size 0x%X bytes\n",
+		AllocAddress, ImageSize);
+	debug("...AllocAddress[0] 0x%X ; AllocAddress[1] 0x%X bytes\n",
+		*(char *)AllocAddress, *(char *)(AllocAddress+1));
+
+	TeeLoadTaCmd->va = (void *)AllocAddress;
+
+	TeeSmc32Param[1].u.memref.buf_ptr = AllocAddress;
+	TeeSmc32Param[1].u.memref.size = ImageSize;
+
+Exit:
+	TeeSmc32Arg->ret = TeecResult;
+	TeeSmc32Arg->ret_origin = TEEC_ORIGIN_API;
+
+	debug("OpteeRpcCmdLoadTa Exit : TeecResult=0x%X\n", TeecResult);
+
+	return TeecResult;
+}
+
+/*
+ * Free a previously loaded TA and release the memory
+ * Param[0] = IN: TA Image to free
+ *
+ * Um, why is OpTEE holding on to this memory? The OS code suggests that OpTEE
+ * is using the binary in place out of shared memory but I don't understand how
+ * runtime modifications of the binary are being prevented if that's the case?
+ */
+TEEC_Result OpteeRpcCmdFreeTa(t_teesmc32_arg *TeeSmc32Arg)
+{
+	TEEC_Result TeecResult = TEEC_SUCCESS;
+	t_teesmc32_param *TeeSmc32Param = NULL;
+	uint32_t ImageSize = 0;
+	uint32_t AllocAddress = 0;
+
+	if (TeeSmc32Arg->num_params != 1) {
+		TeecResult = TEEC_ERROR_BAD_PARAMETERS;
+		goto Exit;
+	}
+
+	TeeSmc32Param = TEESMC32_GET_PARAMS(TeeSmc32Arg);
+
+	AllocAddress = TeeSmc32Param[0].u.memref.buf_ptr;
+	ImageSize = TeeSmc32Param[0].u.memref.size;
+
+	debug("OpteeRpcCmdFreeTa Enter: AllocAddress=0x%X, ImageSize=0x%X\n",
+			(uint32_t) AllocAddress, (uint32_t) ImageSize);
+
+	if (AllocAddress == 0) {
+		TeecResult = TEEC_ERROR_BAD_PARAMETERS;
+		goto Exit;
+	}
+
+	OpteeClientMemFree((void *)AllocAddress);
+
+Exit:
+	TeeSmc32Arg->ret = TeecResult;
+	TeeSmc32Arg->ret_origin = TEEC_ORIGIN_API;
+
+	debug("OpteeRpcCmdFreeTa Exit : TeecResult=0x%X\n", TeecResult);
+
+	return TeecResult;
+}
+
+/*
+ * Execute an RPMB storage operation.
+ */
+uint16_t global_block_count;
+TEEC_Result OpteeRpcCmdRpmb(t_teesmc32_arg *TeeSmc32Arg)
+{
+	struct tee_rpc_rpmb_dev_info *DevInfo;
+	TEEC_Result EfiStatus;
+	uint16_t RequestMsgType, i;
+	EFI_RK_RPMB_DATA_PACKET *RequestPackets;
+	EFI_RK_RPMB_DATA_PACKET *ResponsePackets;
+	EFI_RK_RPMB_DATA_PACKET *tempPackets;
+	EFI_RK_RPMB_DATA_PACKET_BACK *RequestPackets_back;
+	EFI_RK_RPMB_DATA_PACKET_BACK *tempPackets_back;
+	struct tee_rpc_rpmb_cmd *RpmbRequest;
+	TEEC_Result TeecResult = TEEC_SUCCESS;
+	t_teesmc32_param *TeeSmc32Param;
+	struct mmc *mmc;
+
+	debug("Entered RPMB RPC\n");
+
+	if (TeeSmc32Arg->num_params != 2) {
+		TeecResult = TEEC_ERROR_BAD_PARAMETERS;
+		goto Exit;
+	}
+
+	TeeSmc32Param = TEESMC32_GET_PARAMS(TeeSmc32Arg);
+	RpmbRequest = (struct tee_rpc_rpmb_cmd *)
+		TeeSmc32Param[0].u.memref.buf_ptr;
+	switch (RpmbRequest->cmd) {
+	case TEE_RPC_RPMB_CMD_DATA_REQ: {
+		RequestPackets = (EFI_RK_RPMB_DATA_PACKET *)(RpmbRequest + 1);
+		ResponsePackets = (EFI_RK_RPMB_DATA_PACKET *)
+		TeeSmc32Param[1].u.memref.buf_ptr;
+
+		global_block_count =
+			(RpmbRequest->block_count == 0 ?
+			1 : RpmbRequest->block_count);
+		RequestPackets_back =
+			malloc(sizeof(EFI_RK_RPMB_DATA_PACKET_BACK)
+			* global_block_count);
+		memcpy(RequestPackets_back->stuff,
+			RequestPackets->stuff_bytes,
+			RPMB_STUFF_DATA_SIZE);
+		memcpy(RequestPackets_back->mac,
+			RequestPackets->key_mac,
+			RPMB_KEY_MAC_SIZE);
+		memcpy(RequestPackets_back->data,
+			RequestPackets->data,
+			RPMB_DATA_SIZE);
+		memcpy(RequestPackets_back->nonce,
+			RequestPackets->nonce,
+			RPMB_NONCE_SIZE);
+		RequestPackets_back->write_counter =
+			((RequestPackets->write_counter[3]) << 24) +
+			((RequestPackets->write_counter[2]) << 16) +
+			((RequestPackets->write_counter[1]) << 8) +
+			(RequestPackets->write_counter[0]);
+		RequestPackets_back->address =
+			((RequestPackets->address[1]) << 8) +
+			(RequestPackets->address[0]);
+		RequestPackets_back->block_count =
+			((RequestPackets->block_count[1]) << 8) +
+			(RequestPackets->block_count[0]);
+		RequestPackets_back->result =
+			((RequestPackets->op_result[1]) << 8) +
+			(RequestPackets->op_result[0]);
+		RequestPackets_back->request =
+			((RequestPackets->msg_type[1]) << 8) +
+			(RequestPackets->msg_type[0]);
+
+		RequestMsgType = RPMB_PACKET_DATA_TO_UINT16(
+				RequestPackets->msg_type);
+
+		debug("RPMB Data request %d\n", RequestMsgType);
+
+		switch (RequestMsgType) {
+		case TEE_RPC_RPMB_MSG_TYPE_REQ_AUTH_KEY_PROGRAM: {
+			EfiStatus = init_rpmb();
+			if (EfiStatus != 0) {
+				TeecResult = TEEC_ERROR_GENERIC;
+				break;
+			}
+
+			EfiStatus = do_programkey((struct s_rpmb *)
+				RequestPackets_back);
+
+			if (EfiStatus != 0) {
+				TeecResult = TEEC_ERROR_GENERIC;
+				break;
+			}
+
+			EfiStatus = finish_rpmb();
+			if (EfiStatus != 0) {
+				TeecResult = TEEC_ERROR_GENERIC;
+				break;
+			}
+
+			break;
+		}
+
+		case TEE_RPC_RPMB_MSG_TYPE_REQ_WRITE_COUNTER_VAL_READ: {
+			EfiStatus = init_rpmb();
+			if (EfiStatus != 0) {
+				TeecResult = TEEC_ERROR_GENERIC;
+				break;
+			}
+
+			EfiStatus = do_readcounter((struct s_rpmb *)
+				RequestPackets_back);
+			if (EfiStatus != 0) {
+				TeecResult = TEEC_ERROR_GENERIC;
+				break;
+			}
+
+			EfiStatus = finish_rpmb();
+			if (EfiStatus != 0) {
+				TeecResult = TEEC_ERROR_GENERIC;
+				break;
+			}
+
+			break;
+		}
+
+		case TEE_RPC_RPMB_MSG_TYPE_REQ_AUTH_DATA_WRITE: {
+			EfiStatus = init_rpmb();
+			if (EfiStatus != 0) {
+				TeecResult = TEEC_ERROR_GENERIC;
+				break;
+			}
+
+			EfiStatus = do_authenticatedwrite((struct s_rpmb *)
+				RequestPackets_back);
+			if (EfiStatus != 0) {
+				TeecResult = TEEC_ERROR_GENERIC;
+				break;
+			}
+
+			EfiStatus = finish_rpmb();
+
+			if (EfiStatus != 0) {
+				TeecResult = TEEC_ERROR_GENERIC;
+				break;
+			}
+
+			break;
+		}
+
+		case TEE_RPC_RPMB_MSG_TYPE_REQ_AUTH_DATA_READ: {
+			EfiStatus = init_rpmb();
+			if (EfiStatus != 0) {
+				TeecResult = TEEC_ERROR_GENERIC;
+				break;
+			}
+
+			EfiStatus = do_authenticatedread((struct s_rpmb *)
+				RequestPackets_back, global_block_count);
+			if (EfiStatus != 0) {
+				TeecResult = TEEC_ERROR_GENERIC;
+				break;
+			}
+
+			EfiStatus = finish_rpmb();
+
+			if (EfiStatus != 0) {
+				TeecResult = TEEC_ERROR_GENERIC;
+				break;
+			}
+
+			break;
+		}
+
+		default:
+			TeecResult = TEEC_ERROR_BAD_PARAMETERS;
+			break;
+		}
+		debug("RPMB TeecResult %d\n", TeecResult);
+		break;
+	}
+
+	case TEE_RPC_RPMB_CMD_GET_DEV_INFO: {
+		mmc = do_returnmmc();
+
+		DevInfo = (struct tee_rpc_rpmb_dev_info *)
+		TeeSmc32Param[1].u.memref.buf_ptr;
+
+		DevInfo->cid[0] = (mmc->cid[0]) >> 24 & 0xff;
+		DevInfo->cid[1] = (mmc->cid[0]) >> 16 & 0xff;
+		DevInfo->cid[2] = (mmc->cid[0]) >> 8 & 0xff;
+		DevInfo->cid[3] = (mmc->cid[0]) & 0xff;
+		DevInfo->cid[4] = (mmc->cid[1]) >> 24 & 0xff;
+		DevInfo->cid[5] = (mmc->cid[1]) >> 16 & 0xff;
+		DevInfo->cid[6] = (mmc->cid[1]) >> 8 & 0xff;
+		DevInfo->cid[7] = (mmc->cid[1]) & 0xff;
+		DevInfo->cid[8] = (mmc->cid[2]) >> 24 & 0xff;
+		DevInfo->cid[9] = (mmc->cid[2]) >> 16 & 0xff;
+		DevInfo->cid[10] = (mmc->cid[2]) >> 8 & 0xff;
+		DevInfo->cid[11] = (mmc->cid[2]) & 0xff;
+		DevInfo->cid[12] = (mmc->cid[3]) >> 24 & 0xff;
+		DevInfo->cid[13] = (mmc->cid[3]) >> 16 & 0xff;
+		DevInfo->cid[14] = (mmc->cid[3]) >> 8 & 0xff;
+		DevInfo->cid[15] = (mmc->cid[3]) & 0xff;
+		DevInfo->rel_wr_sec_c = 1;
+		DevInfo->rpmb_size_mult =
+			(uint8_t)(mmc->capacity_rpmb / (128 * 1024));
+		DevInfo->ret_code = 0;
+
+		goto Exit;
+	}
+
+	default:
+		TeecResult = TEEC_ERROR_BAD_PARAMETERS;
+
+		goto Exit;
+	}
+
+	tempPackets = ResponsePackets;
+	tempPackets_back = RequestPackets_back;
+
+	for (i = 0; i < global_block_count; i++) {
+		memcpy(tempPackets->stuff_bytes,
+			tempPackets_back->stuff,
+			RPMB_STUFF_DATA_SIZE);
+		memcpy(tempPackets->key_mac,
+			tempPackets_back->mac,
+			RPMB_KEY_MAC_SIZE);
+		memcpy(tempPackets->data,
+			tempPackets_back->data,
+			RPMB_DATA_SIZE);
+		memcpy(tempPackets->nonce,
+			tempPackets_back->nonce,
+			RPMB_NONCE_SIZE);
+		tempPackets->write_counter[3] =
+			((tempPackets_back->write_counter) >> 24) & 0xFF;
+		tempPackets->write_counter[2] =
+			((tempPackets_back->write_counter) >> 16) & 0xFF;
+		tempPackets->write_counter[1] =
+			((tempPackets_back->write_counter) >> 8) & 0xFF;
+		tempPackets->write_counter[0] =
+			(tempPackets_back->write_counter) & 0xFF;
+		tempPackets->address[1] =
+			((tempPackets_back->address) >> 8) & 0xFF;
+		tempPackets->address[0] =
+			(tempPackets_back->address) & 0xFF;
+		tempPackets->block_count[1] =
+			((tempPackets_back->block_count) >> 8) & 0xFF;
+		tempPackets->block_count[0] =
+			(tempPackets_back->block_count) & 0xFF;
+		tempPackets->op_result[1] =
+			((tempPackets_back->result) >> 8) & 0xFF;
+		tempPackets->op_result[0] =
+			(tempPackets_back->result) & 0xFF;
+		tempPackets->msg_type[1] =
+			((tempPackets_back->request) >> 8) & 0xFF;
+		tempPackets->msg_type[0] =
+			(tempPackets_back->request) & 0xFF;
+		tempPackets++;
+		tempPackets_back++;
+	}
+
+	free(RequestPackets_back);
+
+Exit:
+	TeeSmc32Arg->ret = TeecResult;
+	TeeSmc32Arg->ret_origin = TEEC_ORIGIN_API;
+
+	return TeecResult;
+}
+
+/*
+ * Execute a normal world local file system operation.
+ */
+TEEC_Result OpteeRpcCmdFs(t_teesmc32_arg *TeeSmc32Arg)
+{
+	return TEEC_ERROR_NOT_IMPLEMENTED;
+}
+
+
+/*
+ * TBD.
+ */
+TEEC_Result OpteeRpcCmdGetTime(t_teesmc32_arg *TeeSmc32Arg)
+{
+	return TEEC_ERROR_NOT_IMPLEMENTED;
+}
+
+
+/*
+ * TBD.
+ */
+TEEC_Result OpteeRpcCmdWaitMutex(t_teesmc32_arg *TeeSmc32Arg)
+{
+	return TEEC_ERROR_NOT_IMPLEMENTED;
+}
+
+/*
+ * Handle the callback from secure world.
+ */
+TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs)
+{
+	TEEC_Result TeecResult = TEEC_SUCCESS;
+
+	debug("OpteeRpcCallback Enter: Arg0=0x%X, Arg1=0x%X, Arg2=0x%X\n",
+		ArmSmcArgs->Arg0, ArmSmcArgs->Arg1, ArmSmcArgs->Arg2);
+
+	switch (TEESMC_RETURN_GET_RPC_FUNC(ArmSmcArgs->Arg0)) {
+	case TEESMC_RPC_FUNC_ALLOC_ARG: {
+		TeecResult = OpteeRpcAlloc(ArmSmcArgs->Arg1, &ArmSmcArgs->Arg1);
+		break;
+	}
+
+	case TEESMC_RPC_FUNC_ALLOC_PAYLOAD: {
+		TeecResult = OpteeRpcAlloc(ArmSmcArgs->Arg1, &ArmSmcArgs->Arg1);
+		break;
+	}
+
+	case TEESMC_RPC_FUNC_FREE_ARG: {
+		TeecResult = OpteeRpcFree(ArmSmcArgs->Arg1);
+		break;
+	}
+
+	case TEESMC_RPC_FUNC_FREE_PAYLOAD: {
+		TeecResult = OpteeRpcFree(ArmSmcArgs->Arg1);
+		break;
+	}
+
+	case TEESMC_RPC_FUNC_IRQ: {
+		break;
+	}
+
+	case TEESMC_RPC_FUNC_CMD: {
+		t_teesmc32_arg *TeeSmc32Arg =
+			(t_teesmc32_arg *)ArmSmcArgs->Arg1;
+
+		switch (TeeSmc32Arg->cmd) {
+		case TEE_RPC_LOAD_TA: {
+			TeecResult = OpteeRpcCmdLoadTa(TeeSmc32Arg);
+			break;
+		}
+
+		case TEE_RPC_FREE_TA: {
+			TeecResult = OpteeRpcCmdFreeTa(TeeSmc32Arg);
+			break;
+		}
+
+		case TEE_RPC_RPMB_CMD: {
+			TeecResult = OpteeRpcCmdRpmb(TeeSmc32Arg);
+			break;
+		}
+
+		case TEE_RPC_FS: {
+			TeecResult = OpteeRpcCmdFs(TeeSmc32Arg);
+			break;
+		}
+
+		case TEE_RPC_GET_TIME: {
+			TeecResult = OpteeRpcCmdGetTime(TeeSmc32Arg);
+			break;
+		}
+
+		case TEE_RPC_WAIT_MUTEX: {
+			TeecResult = OpteeRpcCmdWaitMutex(TeeSmc32Arg);
+			break;
+		}
+
+		default: {
+			printf("...unsupported RPC CMD: cmd=0x%X\n",
+				TeeSmc32Arg->cmd);
+			TeecResult = TEEC_ERROR_NOT_IMPLEMENTED;
+			break;
+		}
+	}
+
+		break;
+	}
+
+	case TEESMC_OPTEE_RPC_FUNC_ALLOC_PAYLOAD: {
+		TeecResult = OpteeRpcAlloc(ArmSmcArgs->Arg1, &ArmSmcArgs->Arg1);
+		ArmSmcArgs->Arg2 = ArmSmcArgs->Arg1;
+		break;
+	}
+
+	case TEESMC_OPTEE_RPC_FUNC_FREE_PAYLOAD: {
+		TeecResult = OpteeRpcFree(ArmSmcArgs->Arg1);
+		break;
+	}
+
+	default: {
+		printf("...unsupported RPC : Arg0=0x%X\n", ArmSmcArgs->Arg0);
+		TeecResult = TEEC_ERROR_NOT_IMPLEMENTED;
+		break;
+	}
+	}
+
+	ArmSmcArgs->Arg0 = TEESMC32_CALL_RETURN_FROM_RPC;
+	debug("OpteeRpcCallback Exit : TeecResult=0x%X\n", TeecResult);
+
+	return TeecResult;
+}
diff --git a/lib/optee_clientApi/OpteeClientSMC.c b/lib/optee_clientApi/OpteeClientSMC.c
new file mode 100644
index 0000000000..b3df5d6f7f
--- /dev/null
+++ b/lib/optee_clientApi/OpteeClientSMC.c
@@ -0,0 +1,335 @@
+/*
+ * Copyright 2017, Rockchip Electronics Co., Ltd
+ * hisping lin, <hisping.lin@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#include <common.h>
+#include <optee_include/OpteeClientMem.h>
+#include <optee_include/OpteeClientSMC.h>
+#include <optee_include/OpteeClientRPC.h>
+#include <optee_include/teesmc.h>
+
+#define TEEC_SMC_DEFAULT_CACHE_ATTRIBUTES \
+	(TEESMC_ATTR_CACHE_DEFAULT << TEESMC_ATTR_CACHE_SHIFT);
+
+static void SetTeeSmc32Params(TEEC_Operation *operation,
+	t_teesmc32_param *TeeSmc32Param);
+static void GetTeeSmc32Params(t_teesmc32_param *TeeSmc32Param,
+	TEEC_Operation *operation);
+static TEEC_Result OpteeSmcCall(t_teesmc32_arg *TeeSmc32Arg);
+
+/*
+ * This function opens a new Session between the Client application and the
+ * specified TEE application.
+ *
+ * Only connection_method == TEEC_LOGIN_PUBLIC is supported connection_data and
+ * operation shall be set to NULL.
+ */
+TEEC_Result TEEC_SMC_OpenSession(TEEC_Context *context,
+				TEEC_Session *session,
+				const TEEC_UUID *destination,
+				TEEC_Operation  *operation,
+				uint32_t *error_origin)
+{
+	TEEC_Result TeecResult = TEEC_SUCCESS;
+	uint32_t TeeSmc32ArgLength;
+	uint32_t TeeSmcMetaSessionLength;
+
+	t_teesmc32_arg *TeeSmc32Arg = NULL;
+	t_teesmc32_param *TeeSmc32Param = NULL;
+	t_teesmc_meta_open_session *TeeSmcMetaSession = NULL;
+	static const uint32_t MetaNum = 1;
+
+	*error_origin = TEEC_ORIGIN_API;
+
+	TeeSmc32ArgLength =
+		TEESMC32_GET_ARG_SIZE(TEEC_CONFIG_PAYLOAD_REF_COUNT + MetaNum);
+
+	TeeSmc32Arg = (t_teesmc32_arg *)OpteeClientMemAlloc(TeeSmc32ArgLength);
+
+	if (TeeSmc32Arg == NULL) {
+		TeecResult = TEEC_ERROR_OUT_OF_MEMORY;
+		goto Exit;
+	}
+
+	memset(TeeSmc32Arg, 0, TeeSmc32ArgLength);
+
+	TeeSmcMetaSessionLength = sizeof(*TeeSmcMetaSession);
+
+	TeeSmcMetaSession = (t_teesmc_meta_open_session *)
+		OpteeClientMemAlloc(TeeSmcMetaSessionLength);
+
+	if (TeeSmcMetaSession == NULL) {
+		TeecResult = TEEC_ERROR_OUT_OF_MEMORY;
+		goto Exit;
+	}
+
+	memset(TeeSmcMetaSession, 0, TeeSmcMetaSessionLength);
+
+	TeeSmc32Arg->cmd = TEESMC_CMD_OPEN_SESSION;
+	TeeSmc32Arg->num_params = TEEC_CONFIG_PAYLOAD_REF_COUNT + MetaNum;
+
+	TeeSmc32Param = TEESMC32_GET_PARAMS(TeeSmc32Arg);
+
+	memcpy(&TeeSmcMetaSession->uuid,
+		destination,
+		sizeof(TeeSmcMetaSession->uuid));
+	TeeSmcMetaSession->clnt_login = TEEC_LOGIN_PUBLIC;
+
+	TeeSmc32Param[0].u.memref.buf_ptr = (uint32_t) TeeSmcMetaSession;
+	TeeSmc32Param[0].u.memref.size = sizeof(*TeeSmcMetaSession);
+
+#ifdef CONFIG_ROCKCHIP_RK3328
+	TeeSmc32Param[0].attr = TEESMC_ATTR_TYPE_MEMREF_INPUT |
+				TEESMC_ATTR_META              |
+				TEEC_SMC_DEFAULT_CACHE_ATTRIBUTES;
+#endif
+
+#ifdef CONFIG_ROCKCHIP_RK322X
+	TeeSmc32Param[0].attr = TEESMC_ATTR_TYPE_MEMREF_INPUT |
+				TEESMC_ATTR_META;
+#endif
+
+	SetTeeSmc32Params(operation, TeeSmc32Param + MetaNum);
+
+	*error_origin = TEEC_ORIGIN_COMMS;
+
+	TeecResult = OpteeSmcCall(TeeSmc32Arg);
+	if (TeecResult != TEEC_SUCCESS)
+		goto Exit;
+
+	session->id = TeeSmc32Arg->session;
+	TeecResult = TeeSmc32Arg->ret;
+	*error_origin = TeeSmc32Arg->ret_origin;
+
+	GetTeeSmc32Params(TeeSmc32Param + MetaNum, operation);
+
+Exit:
+	if (TeeSmc32Arg != NULL)
+		OpteeClientMemFree(TeeSmc32Arg);
+
+	if (TeeSmcMetaSession != NULL)
+		OpteeClientMemFree(TeeSmcMetaSession);
+
+	return TeecResult;
+}
+
+/*
+ * This function closes a session which has been opened with a TEE
+ * application.
+ *
+ * Note that the GP specification does not allow for this API to fail and return
+ * a failure code however we'll support this at the SMC level so we can get
+ * see debug information about such failures.
+ */
+TEEC_Result TEEC_SMC_CloseSession(TEEC_Session *session,
+				uint32_t *error_origin)
+{
+	TEEC_Result TeecResult = TEEC_SUCCESS;
+	uint32_t TeeSmc32ArgLength;
+	t_teesmc32_arg *TeeSmc32Arg = NULL;
+
+	*error_origin = TEEC_ORIGIN_API;
+
+	TeeSmc32ArgLength =
+		TEESMC32_GET_ARG_SIZE(TEEC_CONFIG_PAYLOAD_REF_COUNT);
+
+	TeeSmc32Arg = (t_teesmc32_arg *)OpteeClientMemAlloc(TeeSmc32ArgLength);
+
+	if (TeeSmc32Arg == NULL) {
+		TeecResult = TEEC_ERROR_OUT_OF_MEMORY;
+		goto Exit;
+	}
+
+	memset(TeeSmc32Arg, 0, TeeSmc32ArgLength);
+
+	TeeSmc32Arg->cmd = TEESMC_CMD_CLOSE_SESSION;
+	TeeSmc32Arg->session = session->id;
+
+	*error_origin = TEEC_ORIGIN_COMMS;
+
+	TeecResult = OpteeSmcCall(TeeSmc32Arg);
+
+	if (TeecResult != TEEC_SUCCESS)
+		goto Exit;
+
+	TeecResult = TeeSmc32Arg->ret;
+	*error_origin = TeeSmc32Arg->ret_origin;
+
+Exit:
+	if (TeeSmc32Arg != NULL)
+		OpteeClientMemFree(TeeSmc32Arg);
+
+	return TeecResult;
+}
+
+/*
+ * Invokes a TEE command (secure service, sub-PA or whatever).
+ */
+TEEC_Result TEEC_SMC_InvokeCommand(TEEC_Session *session,
+				uint32_t cmd_id,
+				TEEC_Operation *operation,
+				uint32_t *error_origin)
+{
+	TEEC_Result TeecResult = TEEC_SUCCESS;
+	uint32_t TeeSmc32ArgLength;
+	t_teesmc32_arg *TeeSmc32Arg = NULL;
+	t_teesmc32_param *TeeSmc32Param = NULL;
+
+	*error_origin = TEEC_ORIGIN_API;
+
+	TeeSmc32ArgLength =
+		TEESMC32_GET_ARG_SIZE(TEEC_CONFIG_PAYLOAD_REF_COUNT);
+
+	TeeSmc32Arg = (t_teesmc32_arg *)OpteeClientMemAlloc(TeeSmc32ArgLength);
+
+	if (TeeSmc32Arg == NULL) {
+		TeecResult = TEEC_ERROR_OUT_OF_MEMORY;
+		goto Exit;
+	}
+
+	memset(TeeSmc32Arg, 0, TeeSmc32ArgLength);
+
+	TeeSmc32Arg->cmd = TEESMC_CMD_INVOKE_COMMAND;
+	TeeSmc32Arg->ta_func = cmd_id;
+	TeeSmc32Arg->session = session->id;
+	TeeSmc32Arg->num_params = TEEC_CONFIG_PAYLOAD_REF_COUNT;
+
+	TeeSmc32Param = TEESMC32_GET_PARAMS(TeeSmc32Arg);
+
+	SetTeeSmc32Params(operation, TeeSmc32Param);
+
+	*error_origin = TEEC_ORIGIN_COMMS;
+
+	TeecResult = OpteeSmcCall(TeeSmc32Arg);
+	if (TeecResult != TEEC_SUCCESS)
+		goto Exit;
+
+	TeecResult = TeeSmc32Arg->ret;
+	*error_origin = TeeSmc32Arg->ret_origin;
+
+	GetTeeSmc32Params(TeeSmc32Param, operation);
+
+Exit:
+	if (TeeSmc32Arg != NULL)
+		OpteeClientMemFree(TeeSmc32Arg);
+
+
+	return TeecResult;
+}
+
+/*
+ * Request a cancellation of a in-progress operation (best effort)
+ *
+ * Note that the GP specification does not allow for this API to fail and return
+ * a failure code however we'll support this at the SMC level so we can get
+ * see debug information about such failures.
+ */
+TEEC_Result TEEC_SMC_RequestCancellation(TEEC_Operation *operation,
+					uint32_t *error_origin)
+{
+	return TEEC_ERROR_NOT_IMPLEMENTED;
+}
+
+/*
+ * Set the call parameter blocks in the
+ * SMC call based on the TEEC parameter supplied.
+ * This only handles the parameters supplied in
+ * the originating call and not those
+ * considered internal meta parameters and is
+ * thus constrained by the build
+ * constants exposed to callers.
+ */
+void SetTeeSmc32Params(TEEC_Operation *operation,
+						t_teesmc32_param *TeeSmc32Param)
+{
+	uint32_t ParamCount;
+
+	for (ParamCount = 0;
+		ParamCount < TEEC_CONFIG_PAYLOAD_REF_COUNT;
+		ParamCount++) {
+		uint32_t attr =
+			TEEC_PARAM_TYPE_GET(operation->paramTypes, ParamCount);
+
+		if (attr == TEEC_MEMREF_TEMP_INPUT ||
+			attr == TEEC_MEMREF_TEMP_OUTPUT ||
+			attr == TEEC_MEMREF_TEMP_INOUT) {
+#ifdef CONFIG_ROCKCHIP_RK3328
+			attr |= TEEC_SMC_DEFAULT_CACHE_ATTRIBUTES;
+			debug(" 3328 attr %x\n", attr);
+#endif
+#ifdef CONFIG_ROCKCHIP_RK322X
+			debug(" 322X attr %x\n", attr);
+#endif
+			TeeSmc32Param[ParamCount].attr = attr;
+			TeeSmc32Param[ParamCount].u.memref.buf_ptr =
+			(uint32_t)operation->params[ParamCount].tmpref.buffer;
+			TeeSmc32Param[ParamCount].u.memref.size =
+				operation->params[ParamCount].tmpref.size;
+		} else {
+			TeeSmc32Param[ParamCount].attr = attr;
+			TeeSmc32Param[ParamCount].u.value.a =
+				operation->params[ParamCount].value.a;
+			TeeSmc32Param[ParamCount].u.value.b =
+				operation->params[ParamCount].value.b;
+		}
+	}
+}
+
+/*
+ * Get the return parameter blocks from
+ * the SMC call into the TEEC parameter supplied.
+ * This only handles the parameters supplied
+ * in the originating call and not those
+ * considered internal meta parameters and
+ * is thus constrained by the build
+ * constants exposed to callers.
+ */
+void GetTeeSmc32Params(t_teesmc32_param *TeeSmc32Param,
+				TEEC_Operation *operation)
+{
+	uint32_t ParamCount;
+
+	for (ParamCount = 0;
+	ParamCount < TEEC_CONFIG_PAYLOAD_REF_COUNT;
+	ParamCount++) {
+		operation->params[ParamCount].value.a =
+			TeeSmc32Param[ParamCount].u.value.a;
+		operation->params[ParamCount].value.b =
+			TeeSmc32Param[ParamCount].u.value.b;
+	}
+}
+
+/*
+ * Populate the SMC registers and make
+ * the call with OpTEE specific handling.
+ */
+TEEC_Result OpteeSmcCall(t_teesmc32_arg *TeeSmc32Arg)
+{
+	TEEC_Result TeecResult = TEEC_SUCCESS;
+	ARM_SMC_ARGS ArmSmcArgs = {0};
+
+	ArmSmcArgs.Arg0 = TEESMC32_CALL_WITH_ARG;
+	ArmSmcArgs.Arg1 = (uint32_t) TeeSmc32Arg;
+
+	while (1) {
+		tee_smc_call(&ArmSmcArgs);
+
+		if (TEESMC_RETURN_IS_RPC(ArmSmcArgs.Arg0)) {
+			(void) OpteeRpcCallback(&ArmSmcArgs);
+		} else if (ArmSmcArgs.Arg0 == TEESMC_RETURN_UNKNOWN_FUNCTION) {
+			TeecResult = TEEC_ERROR_NOT_IMPLEMENTED;
+			break;
+		} else if (ArmSmcArgs.Arg0 != TEESMC_RETURN_OK) {
+			TeecResult = TEEC_ERROR_COMMUNICATION;
+			break;
+		} else {
+			TeecResult = TEEC_SUCCESS;
+			break;
+		}
+	}
+
+	return TeecResult;
+}
+
diff --git a/lib/optee_clientApi/OpteeClientTest.c b/lib/optee_clientApi/OpteeClientTest.c
new file mode 100644
index 0000000000..791ac3a361
--- /dev/null
+++ b/lib/optee_clientApi/OpteeClientTest.c
@@ -0,0 +1,592 @@
+/*
+ * Copyright 2017, Rockchip Electronics Co., Ltd
+ * hisping lin, <hisping.lin@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <optee_include/OpteeClientApiLib.h>
+#include <optee_include/tee_client_api.h>
+
+void test_optee(void)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	debug("testmm start\n");
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				&TeecSession,
+				TeecUuid,
+				TEEC_LOGIN_PUBLIC,
+				NULL,
+				NULL,
+				&ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = sizeof("filename_test");
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	memcpy(SharedMem0.buffer, "filename_test", SharedMem0.size);
+
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = 32;
+	SharedMem1.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+
+	memset(SharedMem1.buffer, 'a', SharedMem1.size);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						TEEC_MEMREF_TEMP_INOUT,
+						TEEC_NONE,
+						TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					1,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+
+	TEEC_CloseSession(&TeecSession);
+
+	TeecResult = TEEC_FinalizeContext(&TeecContext);
+
+	debug("testmm end\n");
+	debug("TeecResult %x\n", TeecResult);
+}
+
+
+static uint8_t b2hs_add_base(uint8_t in)
+{
+	if (in > 9)
+		return in + 55;
+	else
+		return in + 48;
+}
+
+uint32_t b2hs(uint8_t *b, uint8_t *hs, uint32_t blen, uint32_t hslen)
+{
+	uint32_t i = 0;
+
+	if (blen * 2 + 1 > hslen)
+		return 0;
+
+	for (; i < blen; i++) {
+		hs[i * 2 + 1] = b2hs_add_base(b[i] & 0xf);
+		hs[i * 2] = b2hs_add_base(b[i] >> 4);
+	}
+	hs[blen * 2] = 0;
+
+	return blen * 2;
+}
+
+
+uint32_t trusty_read_rollback_index(uint32_t slot, uint64_t *value)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+			{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+	uint8_t hs[9];
+
+	b2hs((uint8_t *)&slot, hs, 4, 9);
+	debug("testmm start\n");
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				&TeecSession,
+				TeecUuid,
+				TEEC_LOGIN_PUBLIC,
+				NULL,
+				NULL,
+				&ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = 8;
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	memcpy(SharedMem0.buffer, hs, SharedMem0.size);
+
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = 8;
+	SharedMem1.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						TEEC_MEMREF_TEMP_INOUT,
+						TEEC_NONE,
+						TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					0,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	memcpy((char *)value, SharedMem1.buffer, SharedMem1.size);
+
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+
+	TEEC_CloseSession(&TeecSession);
+
+	TeecResult = TEEC_FinalizeContext(&TeecContext);
+
+	debug("testmm end\n");
+	return TeecResult;
+}
+
+uint32_t trusty_write_rollback_index(uint32_t slot, uint64_t value)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+	uint8_t hs[9];
+	b2hs((uint8_t *)&slot, hs, 4, 9);
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				&TeecSession,
+				TeecUuid,
+				TEEC_LOGIN_PUBLIC,
+				NULL,
+				NULL,
+				&ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = 8;
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	memcpy(SharedMem0.buffer, hs, SharedMem0.size);
+
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = 8;
+	SharedMem1.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+
+	memcpy(SharedMem1.buffer, (char *)&value, SharedMem1.size);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						TEEC_MEMREF_TEMP_INOUT,
+						TEEC_NONE,
+						TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					1,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+
+	TEEC_CloseSession(&TeecSession);
+
+	TeecResult = TEEC_FinalizeContext(&TeecContext);
+
+	debug("testmm end\n");
+
+	return TeecResult;
+}
+
+uint32_t trusty_read_permanent_attributes(uint8_t *attributes, uint32_t size)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	debug("testmm start\n");
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				&TeecSession,
+				TeecUuid,
+				TEEC_LOGIN_PUBLIC,
+				NULL,
+				NULL,
+				&ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = sizeof("attributes");
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	memcpy(SharedMem0.buffer, "attributes", SharedMem0.size);
+
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = size;
+	SharedMem1.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						TEEC_MEMREF_TEMP_INOUT,
+						TEEC_NONE,
+						TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					0,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	memcpy(attributes, SharedMem1.buffer, SharedMem1.size);
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+	TEEC_CloseSession(&TeecSession);
+	TeecResult = TEEC_FinalizeContext(&TeecContext);
+	debug("testmm end\n");
+
+	return TeecResult;
+}
+
+uint32_t trusty_write_permanent_attributes(uint8_t *attributes, uint32_t size)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	debug("testmm start\n");
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				&TeecSession,
+				TeecUuid,
+				TEEC_LOGIN_PUBLIC,
+				NULL,
+				NULL,
+				&ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = sizeof("attributes");
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	memcpy(SharedMem0.buffer, "attributes", SharedMem0.size);
+
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = size;
+	SharedMem1.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+
+	memcpy(SharedMem1.buffer, attributes, SharedMem1.size);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						TEEC_MEMREF_TEMP_INOUT,
+						TEEC_NONE,
+						TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					1,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+	TEEC_CloseSession(&TeecSession);
+	TeecResult = TEEC_FinalizeContext(&TeecContext);
+	debug("testmm end\n");
+
+	return TeecResult;
+}
+
+uint32_t trusty_read_lock_state(uint8_t *lock_state)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	debug("testmm start\n");
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				&TeecSession,
+				TeecUuid,
+				TEEC_LOGIN_PUBLIC,
+				NULL,
+				NULL,
+				&ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = sizeof("lock_state");
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	memcpy(SharedMem0.buffer, "lock_state", SharedMem0.size);
+
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = 1;
+	SharedMem1.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						TEEC_MEMREF_TEMP_INOUT,
+						TEEC_NONE,
+						TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					0,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	memcpy(lock_state, SharedMem1.buffer, SharedMem1.size);
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+	TEEC_CloseSession(&TeecSession);
+	TeecResult = TEEC_FinalizeContext(&TeecContext);
+	debug("testmm end\n");
+
+	return TeecResult;
+}
+
+uint32_t trusty_write_lock_state(uint8_t lock_state)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID  tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	debug("testmm start\n");
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				&TeecSession,
+				TeecUuid,
+				TEEC_LOGIN_PUBLIC,
+				NULL,
+				NULL,
+				&ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = sizeof("lock_state");
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	memcpy(SharedMem0.buffer, "lock_state", SharedMem0.size);
+
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = 1;
+	SharedMem1.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+
+	memcpy(SharedMem1.buffer, &lock_state, SharedMem1.size);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						TEEC_MEMREF_TEMP_INOUT,
+						TEEC_NONE,
+						TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					1,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+	TEEC_CloseSession(&TeecSession);
+	TeecResult = TEEC_FinalizeContext(&TeecContext);
+	debug("testmm end\n");
+
+	return TeecResult;
+}
+
+uint32_t write_to_keymaster(uint8_t *filename,
+		uint32_t filename_size,
+		uint8_t *data,
+		uint32_t data_size)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+
+	TEEC_UUID tempuuid = { 0x258be795, 0xf9ca, 0x40e6,
+		{ 0xa8, 0x69, 0x9c, 0xe6, 0x88, 0x6c, 0x5d, 0x5d } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	debug("write_to_keymaster\n");
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				&TeecSession,
+				TeecUuid,
+				TEEC_LOGIN_PUBLIC,
+				NULL,
+				NULL,
+				&ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = filename_size;
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	memcpy(SharedMem0.buffer, filename, SharedMem0.size);
+
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = data_size;
+	SharedMem1.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+
+	memcpy(SharedMem1.buffer, data, SharedMem1.size);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						TEEC_MEMREF_TEMP_INOUT,
+						TEEC_NONE,
+						TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					139,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+	TEEC_CloseSession(&TeecSession);
+	TeecResult = TEEC_FinalizeContext(&TeecContext);
+	debug("testmm end\n");
+	debug("TeecResult %x\n", TeecResult);
+
+	return TeecResult;
+}
diff --git a/lib/optee_clientApi/tabinary_to_cfile.py b/lib/optee_clientApi/tabinary_to_cfile.py
new file mode 100755
index 0000000000..1574c271b6
--- /dev/null
+++ b/lib/optee_clientApi/tabinary_to_cfile.py
@@ -0,0 +1,58 @@
+#!/usr/bin/env python
+#
+# Copyright 2017, Rockchip Electronics Co., Ltd
+# hisping lin, <hisping.lin@rock-chips.com>
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+def get_args():
+	import argparse
+
+	parser = argparse.ArgumentParser()
+	parser.add_argument('--prefix', required=True, \
+		help='Prefix for the TA array in c file')
+
+	parser.add_argument('--out', required=True, \
+		help='Name of c file for the TA')
+
+	parser.add_argument('--TA', required=True, help='Name of TA')
+
+	return parser.parse_args()
+
+def main():
+	import array
+#	from Crypto.PublicKey import RSA
+#	from Crypto.Util.number import long_to_bytes
+
+	args = get_args();
+
+	f = open(args.TA, 'r')
+	TAdata = f.read()
+	f.close
+
+	f = open(args.out, 'w')
+
+	f.write("#include <stdint.h>\n");
+	f.write("#include <stddef.h>\n\n");
+
+#	f.write("const uint32_t " + args.prefix + "_exponent = " +
+#		str(key.publickey().e) + ";\n\n")
+
+	f.write("const uint8_t " + args.prefix + "_data[] = {\n")
+	i = 0;
+	for x in array.array("B", TAdata):
+		f.write("0x" + '{0:02x}'.format(x) + ",")
+		i = i + 1;
+		if i % 8 == 0:
+			f.write("\n");
+		else:
+			f.write(" ");
+	f.write("};\n");
+
+	f.write("const uint32_t " + args.prefix + "_size = " + str(i) + ";\n" )
+
+	f.close()
+
+if __name__ == "__main__":
+	main()
diff --git a/lib/optee_clientApi/tee_smc-arm64.S b/lib/optee_clientApi/tee_smc-arm64.S
new file mode 100644
index 0000000000..f28a94c277
--- /dev/null
+++ b/lib/optee_clientApi/tee_smc-arm64.S
@@ -0,0 +1,51 @@
+/*
+ * Copyright 2017, Rockchip Electronics Co., Ltd
+ * hisping lin, <hisping.lin@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <linux/linkage.h>
+
+#ifdef CONFIG_ARM64
+	.text
+
+#define SMC_PARAM_W0_OFFS	0
+#define SMC_PARAM_W2_OFFS	8
+#define SMC_PARAM_W4_OFFS	16
+#define SMC_PARAM_W6_OFFS	24
+
+	/* void tee_smc_call(struct smc_param *param); */
+	.globl	tee_smc_call
+ENTRY(tee_smc_call)
+	stp	x28, x30, [sp, #-16]!
+	mov	x28, x0
+	ldp	w0, w1, [x28, #SMC_PARAM_W0_OFFS]
+	ldp	w2, w3, [x28, #SMC_PARAM_W2_OFFS]
+	ldp	w4, w5, [x28, #SMC_PARAM_W4_OFFS]
+	ldp	w6, w7, [x28, #SMC_PARAM_W6_OFFS]
+	smc	#0
+	stp	w0, w1, [x28, #SMC_PARAM_W0_OFFS]
+	stp	w2, w3, [x28, #SMC_PARAM_W2_OFFS]
+	ldp	x28, x30, [sp], #16
+	ret
+ENDPROC(tee_smc_call)
+
+#else
+
+.text
+.balign 4
+.code 32
+
+	/* void tee_smc_call(struct smc_param *param); */
+	.globl	tee_smc_call
+ENTRY(tee_smc_call)
+	push	{r4-r8, lr}
+	mov	r8, r0
+	ldm	r8, {r0-r7}
+.arch_extension sec
+	smc	#0
+	stm	r8, {r0-r7}
+	pop	{r4-r8, pc}
+ENDPROC(tee_smc_call)
+#endif

commit 97a8a900793ea92b95c52783363400bc4fda2587
Author: hisping <hisping.lin@rock-chips.com>
Date:   Thu Aug 24 16:56:55 2017 +0800

    rockchip: rpmb: add support for multi block
    
    add support for uboot read Multi block data from
    rpmb partition and write Multi block data to rpmb partition.
    The previous patch can only read or write one block one time,
    and it affect reading and writing efficiency.
    
    Change-Id: I4b0b19a4a0d985e1d08930fdfbce13ffb847d2f8
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/drivers/mmc/rpmb.c b/drivers/mmc/rpmb.c
index 0b6b6222bd..fcca28d914 100644
--- a/drivers/mmc/rpmb.c
+++ b/drivers/mmc/rpmb.c
@@ -40,12 +40,6 @@
 #define RPMB_ERR_CNT_EXPIRED	0x80
 #define RPMB_ERR_MSK		0x7
 
-/* Sizes of RPMB data frame */
-#define RPMB_SZ_STUFF		196
-#define RPMB_SZ_MAC		32
-#define RPMB_SZ_DATA		256
-#define RPMB_SZ_NONCE		16
-
 #define SHA256_BLOCK_SIZE	64
 
 /* Error messages */
@@ -60,20 +54,6 @@ static const char * const rpmb_err_msg[] = {
 	"Authentication key not yet programmed",
 };
 
-
-/* Structure of RPMB data frame. */
-struct s_rpmb {
-	unsigned char stuff[RPMB_SZ_STUFF];
-	unsigned char mac[RPMB_SZ_MAC];
-	unsigned char data[RPMB_SZ_DATA];
-	unsigned char nonce[RPMB_SZ_NONCE];
-	unsigned int write_counter;
-	unsigned short address;
-	unsigned short block_count;
-	unsigned short result;
-	unsigned short request;
-};
-
 static int mmc_set_blockcount(struct mmc *mmc, unsigned int blockcount,
 			      bool is_rel_write)
 {
@@ -87,7 +67,7 @@ static int mmc_set_blockcount(struct mmc *mmc, unsigned int blockcount,
 
 	return mmc_send_cmd(mmc, &cmd, NULL);
 }
-static int mmc_rpmb_request(struct mmc *mmc, const struct s_rpmb *s,
+static int mmc_rpmb_request(struct mmc *mmc, const void *s,
 			    unsigned int count, bool is_rel_write)
 {
 	struct mmc_cmd cmd = {0};
@@ -107,7 +87,7 @@ static int mmc_rpmb_request(struct mmc *mmc, const struct s_rpmb *s,
 	cmd.resp_type = MMC_RSP_R1b;
 
 	data.src = (const char *)s;
-	data.blocks = 1;
+	data.blocks = count;
 	data.blocksize = MMC_MAX_BLOCK_LEN;
 	data.flags = MMC_DATA_WRITE;
 
@@ -121,13 +101,13 @@ static int mmc_rpmb_request(struct mmc *mmc, const struct s_rpmb *s,
 	return 0;
 }
 static int mmc_rpmb_response(struct mmc *mmc, struct s_rpmb *s,
-			     unsigned short expected)
+			     unsigned short expected, unsigned short cnt)
 {
 	struct mmc_cmd cmd = {0};
 	struct mmc_data data;
 	int ret;
 
-	ret = mmc_set_blockcount(mmc, 1, false);
+	ret = mmc_set_blockcount(mmc, cnt, false);
 	if (ret) {
 #ifdef CONFIG_MMC_RPMB_TRACE
 		printf("%s:mmc_set_blockcount-> %d\n", __func__, ret);
@@ -139,7 +119,7 @@ static int mmc_rpmb_response(struct mmc *mmc, struct s_rpmb *s,
 	cmd.resp_type = MMC_RSP_R1;
 
 	data.dest = (char *)s;
-	data.blocks = 1;
+	data.blocks = cnt;
 	data.blocksize = MMC_MAX_BLOCK_LEN;
 	data.flags = MMC_DATA_READ;
 
@@ -178,7 +158,7 @@ static int mmc_rpmb_status(struct mmc *mmc, unsigned short expected)
 		return -1;
 
 	/* Read the result */
-	return mmc_rpmb_response(mmc, rpmb_frame, expected);
+	return mmc_rpmb_response(mmc, rpmb_frame, expected, 1);
 }
 static void rpmb_hmac(unsigned char *key, unsigned char *buff, int len,
 		      unsigned char *output)
@@ -236,7 +216,7 @@ int mmc_rpmb_get_counter(struct mmc *mmc, unsigned long *pcounter)
 		return -1;
 
 	/* Read the result */
-	ret = mmc_rpmb_response(mmc, rpmb_frame, RPMB_RESP_WCOUNTER);
+	ret = mmc_rpmb_response(mmc, rpmb_frame, RPMB_RESP_WCOUNTER, 1);
 	if (ret)
 		return ret;
 
@@ -260,65 +240,113 @@ int mmc_rpmb_set_key(struct mmc *mmc, void *key)
 int mmc_rpmb_read(struct mmc *mmc, void *addr, unsigned short blk,
 		  unsigned short cnt, unsigned char *key)
 {
-	ALLOC_CACHE_ALIGN_BUFFER(struct s_rpmb, rpmb_frame, 1);
+	ALLOC_CACHE_ALIGN_BUFFER
+		(char, rpmb_frame_data,
+		sizeof(struct s_rpmb) * cnt);
+	ALLOC_CACHE_ALIGN_BUFFER
+		(char, rpmb_frame_data_verify,
+		sizeof(struct s_rpmb_verify) * cnt);
+	struct s_rpmb *rpmb_frame;
+	struct s_rpmb_verify *rpmb_frame_vrify;
 	int i;
 
+	memset(rpmb_frame_data, 0, sizeof(struct s_rpmb) * cnt);
+	memset(rpmb_frame_data_verify, 0, sizeof(struct s_rpmb_verify) * cnt);
+	rpmb_frame = (struct s_rpmb *)rpmb_frame_data;
+	rpmb_frame->address = cpu_to_be16(blk);
+	rpmb_frame->request = cpu_to_be16(RPMB_REQ_READ_DATA);
+	if (mmc_rpmb_request(mmc, rpmb_frame, 1, false)) {
+		printf("mmc_rpmb_read request error\n");
+		return -1;
+	}
+
+	if (mmc_rpmb_response
+			(mmc,
+			(struct s_rpmb *)rpmb_frame_data,
+			RPMB_RESP_READ_DATA, cnt)) {
+		printf("mmc_rpmb_read response error\n");
+		return -1;
+	}
+
 	for (i = 0; i < cnt; i++) {
-		/* Fill the request */
-		memset(rpmb_frame, 0, sizeof(struct s_rpmb));
-		rpmb_frame->address = cpu_to_be16(blk + i);
-		rpmb_frame->request = cpu_to_be16(RPMB_REQ_READ_DATA);
-		if (mmc_rpmb_request(mmc, rpmb_frame, 1, false))
-			break;
-
-		/* Read the result */
-		if (mmc_rpmb_response(mmc, rpmb_frame, RPMB_RESP_READ_DATA))
-			break;
-
-		/* Check the HMAC if key is provided */
-		if (key) {
-			unsigned char ret_hmac[RPMB_SZ_MAC];
-
-			rpmb_hmac(key, rpmb_frame->data, 284, ret_hmac);
-			if (memcmp(ret_hmac, rpmb_frame->mac, RPMB_SZ_MAC)) {
-				printf("MAC error on block #%d\n", i);
-				break;
-			}
-		}
-		/* Copy data */
+		rpmb_frame = (struct s_rpmb *)
+					(rpmb_frame_data +
+					i * sizeof(struct s_rpmb));
+
+		rpmb_frame_vrify = (struct s_rpmb_verify *)
+					(rpmb_frame_data_verify +
+					i * sizeof(struct s_rpmb_verify));
 		memcpy(addr + i * RPMB_SZ_DATA, rpmb_frame->data, RPMB_SZ_DATA);
+		memcpy(rpmb_frame_vrify->data, rpmb_frame->data, 284);
 	}
-	return i;
+
+	if (key) {
+		unsigned char ret_hmac[RPMB_SZ_MAC];
+		rpmb_hmac
+			(key, (unsigned char *)rpmb_frame_data_verify,
+			284 * cnt, ret_hmac);
+		if (memcmp(ret_hmac, rpmb_frame->mac, RPMB_SZ_MAC)) {
+			printf("MAC error on block #%d\n", i);
+			return -1;
+		}
+	}
+
+	return cnt;
 }
 int mmc_rpmb_write(struct mmc *mmc, void *addr, unsigned short blk,
 		  unsigned short cnt, unsigned char *key)
 {
-	ALLOC_CACHE_ALIGN_BUFFER(struct s_rpmb, rpmb_frame, 1);
+	struct s_rpmb *rpmb_frame;
+	struct s_rpmb_verify *rpmb_frame_vrify;
+	ALLOC_CACHE_ALIGN_BUFFER
+		(char, rpmb_frame_data,
+		sizeof(struct s_rpmb) * cnt);
+	ALLOC_CACHE_ALIGN_BUFFER
+		(char, rpmb_frame_data_verify,
+		sizeof(struct s_rpmb_verify) * cnt);
+
 	unsigned long wcount;
-	int i;
+	unsigned short i;
+	unsigned short temp;
 
+	temp = cnt - 1;
+	memset(rpmb_frame_data, 0, sizeof(struct s_rpmb) * cnt);
+	memset(rpmb_frame_data_verify, 0, sizeof(struct s_rpmb_verify) * cnt);
 	for (i = 0; i < cnt; i++) {
-		if (mmc_rpmb_get_counter(mmc, &wcount)) {
-			printf("Cannot read RPMB write counter\n");
-			break;
+		if (i == 0) {
+			if (mmc_rpmb_get_counter(mmc, &wcount)) {
+				printf("Cannot read RPMB write counter\n");
+				break;
+			}
 		}
 
-		/* Fill the request */
-		memset(rpmb_frame, 0, sizeof(struct s_rpmb));
+		rpmb_frame = (struct s_rpmb *)
+			(rpmb_frame_data +
+			i * sizeof(struct s_rpmb));
+		rpmb_frame_vrify = (struct s_rpmb_verify *)
+			(rpmb_frame_data_verify +
+			i * sizeof(struct s_rpmb_verify));
 		memcpy(rpmb_frame->data, addr + i * RPMB_SZ_DATA, RPMB_SZ_DATA);
-		rpmb_frame->address = cpu_to_be16(blk + i);
-		rpmb_frame->block_count = cpu_to_be16(1);
+		memcpy(rpmb_frame_vrify->data, addr +
+			i * RPMB_SZ_DATA, RPMB_SZ_DATA);
+		rpmb_frame->address = cpu_to_be16(blk);
+		rpmb_frame_vrify->address = cpu_to_be16(blk);
+		rpmb_frame->block_count = cpu_to_be16(cnt);
+		rpmb_frame_vrify->block_count = cpu_to_be16(cnt);
 		rpmb_frame->write_counter = cpu_to_be32(wcount);
+		rpmb_frame_vrify->write_counter = cpu_to_be32(wcount);
 		rpmb_frame->request = cpu_to_be16(RPMB_REQ_WRITE_DATA);
-		/* Computes HMAC */
-		rpmb_hmac(key, rpmb_frame->data, 284, rpmb_frame->mac);
-
-		if (mmc_rpmb_request(mmc, rpmb_frame, 1, true))
-			break;
-
-		/* Get status */
-		if (mmc_rpmb_status(mmc, RPMB_RESP_WRITE_DATA))
-			break;
+		rpmb_frame_vrify->request = cpu_to_be16(RPMB_REQ_WRITE_DATA);
+		if (i == temp) {
+			rpmb_hmac
+				(key, (unsigned char *)rpmb_frame_data_verify,
+				284 * cnt, rpmb_frame->mac);
+		}
 	}
-	return i;
+	if (mmc_rpmb_request(mmc, rpmb_frame_data, cnt, true))
+		return -1;
+
+	if (mmc_rpmb_status(mmc, RPMB_RESP_WRITE_DATA))
+		return -1;
+	return cnt;
 }

commit 3ccd4bb0b4c2a2e49ccce6f2748cdcff4bb293b6
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Sep 13 13:21:18 2017 +0800

    avb: support vbmeta key_pub verify
    
    Android Things requires specific public key
    metadata and verification logic to correctly
    verify vbmeta public keys.
    
    This commit provide fuction avb_atx_validate_vbmeta_public_key
    to verify the vbmeta.
    
    Change-Id: I227e93b342671b4395cbaa7dea2121cbf0d7234b
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/android_avb/avb_atx_ops.h b/include/android_avb/avb_atx_ops.h
new file mode 100644
index 0000000000..668a4e2b5b
--- /dev/null
+++ b/include/android_avb/avb_atx_ops.h
@@ -0,0 +1,70 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_ATX_H) && !defined(AVB_COMPILATION)
+#error \
+    "Never include this file directly, include libavb_atx/libavb_atx.h instead."
+#endif
+*/
+
+#ifndef AVB_ATX_OPS_H_
+#define AVB_ATX_OPS_H_
+
+#include <android_avb/libavb.h>
+
+#include <android_avb/avb_atx_types.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct AvbAtxOps;
+typedef struct AvbAtxOps AvbAtxOps;
+
+/* An extension to AvbOps required by avb_atx_validate_vbmeta_public_key(). */
+struct AvbAtxOps {
+  /* Operations from libavb. */
+  AvbOps* ops;
+
+  /* Reads permanent |attributes| data. There are no restrictions on where this
+   * data is stored. On success, returns AVB_IO_RESULT_OK and populates
+   * |attributes|.
+   */
+  AvbIOResult (*read_permanent_attributes)(
+      AvbAtxOps* atx_ops, AvbAtxPermanentAttributes* attributes);
+
+  /* Reads a |hash| of permanent attributes. This hash MUST be retrieved from a
+   * permanently read-only location (e.g. fuses) when a device is LOCKED. On
+   * success, returned AVB_IO_RESULT_OK and populates |hash|.
+   */
+  AvbIOResult (*read_permanent_attributes_hash)(
+      AvbAtxOps* atx_ops, uint8_t hash[AVB_SHA256_DIGEST_SIZE]);
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_ATX_OPS_H_ */
diff --git a/include/android_avb/avb_atx_types.h b/include/android_avb/avb_atx_types.h
new file mode 100644
index 0000000000..e52c11dfd8
--- /dev/null
+++ b/include/android_avb/avb_atx_types.h
@@ -0,0 +1,79 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+/*
+#if !defined(AVB_INSIDE_LIBAVB_ATX_H) && !defined(AVB_COMPILATION)
+#error \
+    "Never include this file directly, include libavb_atx/libavb_atx.h instead."
+#endif
+*/
+
+#ifndef AVB_ATX_TYPES_H_
+#define AVB_ATX_TYPES_H_
+
+#include <android_avb/libavb.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Size in bytes of an Android Things product ID. */
+#define AVB_ATX_PRODUCT_ID_SIZE 16
+
+/* Size in bytes of a serialized public key with a 4096-bit modulus. */
+#define AVB_ATX_PUBLIC_KEY_SIZE (sizeof(AvbRSAPublicKeyHeader) + 1024)
+
+/* Data structure of Android Things permanent attributes. */
+typedef struct AvbAtxPermanentAttributes {
+  uint32_t version;
+  uint8_t product_root_public_key[AVB_ATX_PUBLIC_KEY_SIZE];
+  uint8_t product_id[AVB_ATX_PRODUCT_ID_SIZE];
+} AVB_ATTR_PACKED AvbAtxPermanentAttributes;
+
+/* Data structure of signed fields in an Android Things certificate. */
+typedef struct AvbAtxCertificateSignedData {
+  uint32_t version;
+  uint8_t public_key[AVB_ATX_PUBLIC_KEY_SIZE];
+  uint8_t subject[AVB_SHA256_DIGEST_SIZE];
+  uint8_t usage[AVB_SHA256_DIGEST_SIZE];
+  uint64_t key_version;
+} AVB_ATTR_PACKED AvbAtxCertificateSignedData;
+
+/* Data structure of an Android Things certificate. */
+typedef struct AvbAtxCertificate {
+  AvbAtxCertificateSignedData signed_data;
+  uint8_t signature[AVB_RSA4096_NUM_BYTES];
+} AVB_ATTR_PACKED AvbAtxCertificate;
+
+/* Data structure of Android Things public key metadata in vbmeta. */
+typedef struct AvbAtxPublicKeyMetadata {
+  uint32_t version;
+  AvbAtxCertificate product_intermediate_key_certificate;
+  AvbAtxCertificate product_signing_key_certificate;
+} AVB_ATTR_PACKED AvbAtxPublicKeyMetadata;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_ATX_TYPES_H_ */
diff --git a/include/android_avb/avb_atx_validate.h b/include/android_avb/avb_atx_validate.h
new file mode 100644
index 0000000000..f5804885b9
--- /dev/null
+++ b/include/android_avb/avb_atx_validate.h
@@ -0,0 +1,79 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_ATX_H) && !defined(AVB_COMPILATION)
+#error \
+    "Never include this file directly, include libavb_atx/libavb_atx.h instead."
+#endif
+*/
+
+#ifndef AVB_ATX_VALIDATE_H_
+#define AVB_ATX_VALIDATE_H_
+
+#include <android_avb/avb_atx_ops.h>
+#include <android_avb/avb_atx_types.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Rollback index locations for Android Things key versions. */
+#define AVB_ATX_PIK_VERSION_LOCATION 0x1000
+#define AVB_ATX_PSK_VERSION_LOCATION 0x1001
+
+/* An implementation of validate_vbmeta_public_key for Android Things. See
+ * libavb/avb_ops.h for details on validate_vbmeta_public_key in general. This
+ * implementation uses the metadata expected with Android Things vbmeta images
+ * to perform validation on the public key. The ATX ops must be implemented.
+ * That is, |ops->atx_ops| must be valid.
+ *
+ * There are a multiple values that need verification:
+ *   - Permanent Product Attributes: A hash of these attributes is fused into
+ *                                   hardware. Consistency is checked.
+ *   - Product Root Key (PRK): This key is provided in permanent attributes and
+ *                             is the root authority for all Android Things
+ *                             products.
+ *   - Product Intermediate Key (PIK): This key is a rotated intermediary. It is
+ *                                     certified by the PRK.
+ *   - Product Signing Key (PSK): This key is a rotated authority for a specific
+ *                                Android Things product. It is certified by a
+ *                                PIK and must match |public_key_data|.
+ *   - Product ID: This value is provided in permanent attributes and is unique
+ *                 to a specific Android Things product. This value must match
+ *                 the subject of the PSK certificate.
+ */
+AvbIOResult avb_atx_validate_vbmeta_public_key(
+    AvbOps* ops,
+    const uint8_t* public_key_data,
+    size_t public_key_length,
+    const uint8_t* public_key_metadata,
+    size_t public_key_metadata_length,
+    bool* out_is_trusted);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_ATX_VALIDATE_H_ */
diff --git a/include/android_avb/libavb_atx.h b/include/android_avb/libavb_atx.h
new file mode 100644
index 0000000000..fc7c876a18
--- /dev/null
+++ b/include/android_avb/libavb_atx.h
@@ -0,0 +1,41 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#ifndef LIBAVB_ATX_H_
+#define LIBAVB_ATX_H_
+
+#include <android_avb/libavb.h>
+
+/* The AVB_INSIDE_LIBAVB_ATX_H preprocessor symbol is used to enforce
+ * library users to include only this file. All public interfaces, and
+ * only public interfaces, must be included here.
+ */
+
+#define AVB_INSIDE_LIBAVB_ATX_H
+#include <android_avb/avb_atx_ops.h>
+#include <android_avb/avb_atx_types.h>
+#include <android_avb/avb_atx_validate.h>
+#undef AVB_INSIDE_LIBAVB_ATX_H
+
+#endif /* LIBAVB_ATX_H_ */
diff --git a/lib/Kconfig b/lib/Kconfig
index 710cca7170..cf29e9b609 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -270,5 +270,6 @@ source lib/efi/Kconfig
 source lib/efi_loader/Kconfig
 source lib/avb/rk_libavb/Kconfig
 source lib/avb/rk_libavb_ab/Kconfig
+source lib/avb/rk_libavb_atx/Kconfig
 
 endmenu
diff --git a/lib/Makefile b/lib/Makefile
index b629ce6cd0..a74b72db15 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -47,6 +47,7 @@ endif
 
 obj-$(CONFIG_AVB_LIBAVB) += avb/rk_libavb/
 obj-$(CONFIG_AVB_LIBAVB_AB) += avb/rk_libavb_ab/
+obj-$(CONFIG_AVB_LIBAVB_ATX) += avb/rk_libavb_atx/
 
 obj-$(CONFIG_RSA) += rsa/
 obj-$(CONFIG_SHA1) += sha1.o
diff --git a/lib/avb/rk_libavb_atx/Kconfig b/lib/avb/rk_libavb_atx/Kconfig
new file mode 100644
index 0000000000..f191d4d8bc
--- /dev/null
+++ b/lib/avb/rk_libavb_atx/Kconfig
@@ -0,0 +1,6 @@
+config AVB_LIBAVB_ATX
+	bool "support vbmeta public key verify"
+	help
+	  Android Things requires specific public key
+	  metadata and verification logic to correctly
+	  verify vbmeta public keys.
diff --git a/lib/avb/rk_libavb_atx/Makefile b/lib/avb/rk_libavb_atx/Makefile
new file mode 100644
index 0000000000..3ffa57a0b1
--- /dev/null
+++ b/lib/avb/rk_libavb_atx/Makefile
@@ -0,0 +1 @@
+obj-y	+= avb_atx_validate.o
diff --git a/lib/avb/rk_libavb_atx/avb_atx_validate.c b/lib/avb/rk_libavb_atx/avb_atx_validate.c
new file mode 100644
index 0000000000..dbc6769313
--- /dev/null
+++ b/lib/avb/rk_libavb_atx/avb_atx_validate.c
@@ -0,0 +1,246 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_atx_validate.h>
+
+#include <android_avb/avb_rsa.h>
+#include <android_avb/avb_sha.h>
+#include <android_avb/avb_sysdeps.h>
+#include <android_avb/avb_util.h>
+
+/* Computes the SHA256 |hash| of |length| bytes of |data|. */
+static void sha256(const uint8_t* data,
+                   uint32_t length,
+                   uint8_t hash[AVB_SHA256_DIGEST_SIZE]) {
+  AvbSHA256Ctx context;
+  avb_sha256_init(&context);
+  avb_sha256_update(&context, data, length);
+  uint8_t* tmp = avb_sha256_final(&context);
+  avb_memcpy(hash, tmp, AVB_SHA256_DIGEST_SIZE);
+}
+
+/* Computes the SHA512 |hash| of |length| bytes of |data|. */
+static void sha512(const uint8_t* data,
+                   uint32_t length,
+                   uint8_t hash[AVB_SHA512_DIGEST_SIZE]) {
+  AvbSHA512Ctx context;
+  avb_sha512_init(&context);
+  avb_sha512_update(&context, data, length);
+  uint8_t* tmp = avb_sha512_final(&context);
+  avb_memcpy(hash, tmp, AVB_SHA512_DIGEST_SIZE);
+}
+
+/* Computes the SHA256 |hash| of a NUL-terminated |str|. */
+static void sha256_str(const char* str, uint8_t hash[AVB_SHA256_DIGEST_SIZE]) {
+  sha256((const uint8_t*)str, avb_strlen(str), hash);
+}
+
+/* Verifies structure and |expected_hash| of permanent |attributes|. */
+static bool verify_permanent_attributes(
+    const AvbAtxPermanentAttributes* attributes,
+    uint8_t expected_hash[AVB_SHA256_DIGEST_SIZE]) {
+  uint8_t hash[AVB_SHA256_DIGEST_SIZE];
+
+  if (attributes->version != 1) {
+    avb_error("Unsupported permanent attributes version.\n");
+    return false;
+  }
+  sha256((const uint8_t*)attributes, sizeof(AvbAtxPermanentAttributes), hash);
+  if (0 != avb_safe_memcmp(hash, expected_hash, AVB_SHA256_DIGEST_SIZE)) {
+    avb_error("Invalid permanent attributes.\n");
+    return false;
+  }
+  return true;
+}
+
+/* Verifies the format, key version, usage, and signature of a certificate. */
+static bool verify_certificate(AvbAtxCertificate* certificate,
+                               uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
+                               uint64_t minimum_key_version,
+                               uint8_t expected_usage[AVB_SHA256_DIGEST_SIZE]) {
+  const AvbAlgorithmData* algorithm_data;
+  uint8_t certificate_hash[AVB_SHA512_DIGEST_SIZE];
+
+  if (certificate->signed_data.version != 1) {
+    avb_error("Unsupported certificate format.\n");
+    return false;
+  }
+  algorithm_data = avb_get_algorithm_data(AVB_ALGORITHM_TYPE_SHA512_RSA4096);
+  sha512((const uint8_t*)&certificate->signed_data,
+         sizeof(AvbAtxCertificateSignedData),
+         certificate_hash);
+  if (!avb_rsa_verify(authority,
+                      AVB_ATX_PUBLIC_KEY_SIZE,
+                      certificate->signature,
+                      AVB_RSA4096_NUM_BYTES,
+                      certificate_hash,
+                      AVB_SHA512_DIGEST_SIZE,
+                      algorithm_data->padding,
+                      algorithm_data->padding_len)) {
+    avb_error("Invalid certificate signature.\n");
+    return false;
+  }
+  if (certificate->signed_data.key_version < minimum_key_version) {
+    avb_error("Key rollback detected.\n");
+    return false;
+  }
+  if (0 != avb_safe_memcmp(certificate->signed_data.usage,
+                           expected_usage,
+                           AVB_SHA256_DIGEST_SIZE)) {
+    avb_error("Invalid certificate usage.\n");
+    return false;
+  }
+  return true;
+}
+
+/* Verifies signature and fields of a PIK certificate. */
+static bool verify_pik_certificate(AvbAtxCertificate* certificate,
+                                   uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
+                                   uint64_t minimum_version) {
+  uint8_t expected_usage[AVB_SHA256_DIGEST_SIZE];
+
+  sha256_str("com.google.android.things.vboot.ca", expected_usage);
+  if (!verify_certificate(
+          certificate, authority, minimum_version, expected_usage)) {
+    avb_error("Invalid PIK certificate.\n");
+    return false;
+  }
+  return true;
+}
+
+/* Verifies signature and fields of a PSK certificate. */
+static bool verify_psk_certificate(
+    AvbAtxCertificate* certificate,
+    uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
+    uint64_t minimum_version,
+    uint8_t product_id[AVB_ATX_PRODUCT_ID_SIZE]) {
+  uint8_t expected_subject[AVB_SHA256_DIGEST_SIZE];
+  uint8_t expected_usage[AVB_SHA256_DIGEST_SIZE];
+
+  sha256_str("com.google.android.things.vboot", expected_usage);
+  if (!verify_certificate(
+          certificate, authority, minimum_version, expected_usage)) {
+    avb_error("Invalid PSK certificate.\n");
+    return false;
+  }
+  sha256(product_id, AVB_ATX_PRODUCT_ID_SIZE, expected_subject);
+  if (0 != avb_safe_memcmp(certificate->signed_data.subject,
+                           expected_subject,
+                           AVB_SHA256_DIGEST_SIZE)) {
+    avb_error("Product ID mismatch.\n");
+    return false;
+  }
+  return true;
+}
+
+AvbIOResult avb_atx_validate_vbmeta_public_key(
+    AvbOps* ops,
+    const uint8_t* public_key_data,
+    size_t public_key_length,
+    const uint8_t* public_key_metadata,
+    size_t public_key_metadata_length,
+    bool* out_is_trusted) {
+  AvbIOResult result = AVB_IO_RESULT_OK;
+  AvbAtxPermanentAttributes permanent_attributes;
+  uint8_t permanent_attributes_hash[AVB_SHA256_DIGEST_SIZE];
+  AvbAtxPublicKeyMetadata metadata;
+  uint64_t minimum_version;
+
+  /* Be pessimistic so we can exit early without having to remember to clear.
+   */
+  *out_is_trusted = false;
+
+  /* Read and verify permanent attributes. */
+  result = ops->atx_ops->read_permanent_attributes(ops->atx_ops,
+                                                   &permanent_attributes);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to read permanent attributes.\n");
+    return result;
+  }
+  result = ops->atx_ops->read_permanent_attributes_hash(
+      ops->atx_ops, permanent_attributes_hash);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to read permanent attributes hash.\n");
+    return result;
+  }
+  if (!verify_permanent_attributes(&permanent_attributes,
+                                   permanent_attributes_hash)) {
+    return AVB_IO_RESULT_OK;
+  }
+
+  /* Sanity check public key metadata. */
+  if (public_key_metadata_length != sizeof(AvbAtxPublicKeyMetadata)) {
+    avb_error("Invalid public key metadata.\n");
+    return AVB_IO_RESULT_OK;
+  }
+  avb_memcpy(&metadata, public_key_metadata, sizeof(AvbAtxPublicKeyMetadata));
+  if (metadata.version != 1) {
+    avb_error("Unsupported public key metadata.\n");
+    return AVB_IO_RESULT_OK;
+  }
+
+  /* Verify the PIK certificate. */
+  result = ops->read_rollback_index(
+      ops, AVB_ATX_PIK_VERSION_LOCATION, &minimum_version);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to read PIK minimum version.\n");
+    return result;
+  }
+  if (!verify_pik_certificate(&metadata.product_intermediate_key_certificate,
+                              permanent_attributes.product_root_public_key,
+                              minimum_version)) {
+    return AVB_IO_RESULT_OK;
+  }
+
+  /* Verify the PSK certificate. */
+  result = ops->read_rollback_index(
+      ops, AVB_ATX_PSK_VERSION_LOCATION, &minimum_version);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to read PSK minimum version.\n");
+    return result;
+  }
+  if (!verify_psk_certificate(
+          &metadata.product_signing_key_certificate,
+          metadata.product_intermediate_key_certificate.signed_data.public_key,
+          minimum_version,
+          permanent_attributes.product_id)) {
+    return AVB_IO_RESULT_OK;
+  }
+
+  /* Verify the PSK is the same key that verified vbmeta. */
+  if (public_key_length != AVB_ATX_PUBLIC_KEY_SIZE) {
+    avb_error("Public key length mismatch.\n");
+    return AVB_IO_RESULT_OK;
+  }
+  if (0 != avb_safe_memcmp(
+               metadata.product_signing_key_certificate.signed_data.public_key,
+               public_key_data,
+               AVB_ATX_PUBLIC_KEY_SIZE)) {
+    avb_error("Public key mismatch.\n");
+    return AVB_IO_RESULT_OK;
+  }
+
+  *out_is_trusted = true;
+  return AVB_IO_RESULT_OK;
+}

commit cf7c71c1bf6a7af45601b778885a81aaada5967e
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Sep 13 11:32:58 2017 +0800

    avb: add functions to choose a/b system
    
    This commit is based on google avb, and it
    can be getted by https://android.googlesource.com/platform/external/avb.
    
    This new rk_libavb_ab depend on rk_libavb.
    
    This commit provide some useful functions.
    The function of avb_ab_flow can be use to
    chose a/b system and flow.The other functions
    can be used to debug.
    
    Change-Id: I768272286898b36e9a64749ff30bc6ff0cb019a1
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/android_avb/avb_ab_flow.h b/include/android_avb/avb_ab_flow.h
new file mode 100644
index 0000000000..6b3d9e4e1c
--- /dev/null
+++ b/include/android_avb/avb_ab_flow.h
@@ -0,0 +1,279 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+/*
+#if !defined(AVB_INSIDE_LIBAVB_AB_H) && !defined(AVB_COMPILATION)
+#error \
+    "Never include this file directly, include libavb_ab/libavb_ab.h instead."
+#endif
+*/
+
+#ifndef AVB_AB_FLOW_H_
+#define AVB_AB_FLOW_H_
+
+#include <android_avb/avb_ab_ops.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Magic for the A/B struct when serialized. */
+#define AVB_AB_MAGIC "\0AB0"
+#define AVB_AB_MAGIC_LEN 4
+
+/* Versioning for the on-disk A/B metadata - keep in sync with avbtool. */
+#define AVB_AB_MAJOR_VERSION 1
+#define AVB_AB_MINOR_VERSION 0
+
+/* Size of AvbABData struct. */
+#define AVB_AB_DATA_SIZE 512
+
+/* Maximum values for slot data */
+#define AVB_AB_MAX_PRIORITY 15
+#define AVB_AB_MAX_TRIES_REMAINING 7
+
+/* Struct used for recording per-slot metadata.
+ *
+ * When serialized, data is stored in network byte-order.
+ */
+typedef struct AvbABSlotData {
+  /* Slot priority. Valid values range from 0 to AVB_AB_MAX_PRIORITY,
+   * both inclusive with 1 being the lowest and AVB_AB_MAX_PRIORITY
+   * being the highest. The special value 0 is used to indicate the
+   * slot is unbootable.
+   */
+  uint8_t priority : 4;
+
+  /* Number of times left attempting to boot this slot ranging from 0
+   * to AVB_AB_MAX_TRIES_REMAINING.
+   */
+  uint8_t tries_remaining : 3;
+
+  /* Non-zero if this slot has booted successfully, 0 otherwise. */
+  uint8_t successful_boot : 1;
+    /* 1 if this slot is corrupted from a dm-verity corruption, 0 */
+    /* otherwise. */
+    uint8_t verity_corrupted : 1;
+  /* Reserved for future use. */
+  uint8_t reserved : 7;
+} AVB_ATTR_PACKED AvbABSlotData;
+
+/* Struct used for recording A/B metadata.
+ *
+ * When serialized, data is stored in network byte-order.
+ */
+typedef struct AvbABData
+{
+	/* NUL terminated active slot suffix. */
+	char slot_suffix[4];
+	/* Magic number used for identification - see AVB_AB_MAGIC. */
+	uint8_t magic[AVB_AB_MAGIC_LEN];
+
+	/* Version of on-disk struct - see AVB_AB_{MAJOR,MINOR}_VERSION. */
+	uint8_t version_major;
+
+	/* Number of slots being managed. */
+	uint8_t nb_slot : 3;
+	/* Number of times left attempting to boot recovery. */
+	uint8_t recovery_tries_remaining : 3;
+	/* Padding to ensure |slots| field start eight bytes in. */
+	uint8_t reserved1[2];
+
+	/* Per-slot metadata. */
+	AvbABSlotData slots[4];
+
+	/* Reserved for future use. */
+	uint8_t reserved2[8];
+	//uint8_t reserved3[480];
+
+	/* CRC32 of all 28 bytes preceding this field. */
+	uint32_t crc32;
+	uint8_t version_minor;
+} AVB_ATTR_PACKED AvbABData;
+
+/* Copies |src| to |dest|, byte-swapping fields in the
+ * process. Returns false if the data is invalid (e.g. wrong magic,
+ * wrong CRC32 etc.), true otherwise.
+ */
+bool avb_ab_data_verify_and_byteswap(const AvbABData* src, AvbABData* dest);
+
+/* Copies |src| to |dest|, byte-swapping fields in the process. Also
+ * updates the |crc32| field in |dest|.
+ */
+void avb_ab_data_update_crc_and_byteswap(const AvbABData* src, AvbABData* dest);
+
+/* Initializes |data| such that it has two slots and both slots have
+ * maximum tries remaining. The CRC is not set.
+ */
+void avb_ab_data_init(AvbABData* data);
+
+/* Reads A/B metadata from the 'misc' partition using |ops|. Returned
+ * data is properly byteswapped. Returns AVB_IO_RESULT_OK on
+ * success, error code otherwise.
+ *
+ * If the data read from disk is invalid (e.g. wrong magic or CRC
+ * checksum failure), the metadata will be reset using
+ * avb_ab_data_init() and then written to disk.
+ */
+AvbIOResult avb_ab_data_read(AvbABOps* ab_ops, AvbABData* data);
+
+/* Load A/B metadata, like function avb_ab_data_read*/
+AvbIOResult load_metadata(AvbABOps* ab_ops,
+                                 AvbABData* ab_data,
+                                 AvbABData* ab_data_orig);
+
+/* Writes A/B metadata to the 'misc' partition using |ops|. This will
+ * byteswap and update the CRC as needed. Returns AVB_IO_RESULT_OK on
+ * success, error code otherwise.
+ */
+AvbIOResult avb_ab_data_write(AvbABOps* ab_ops, const AvbABData* data);
+
+/* Return codes used in avb_ab_flow(), see that function for
+ * documentation of each value.
+ */
+typedef enum {
+  AVB_AB_FLOW_RESULT_OK,
+  AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR,
+  AVB_AB_FLOW_RESULT_ERROR_OOM,
+  AVB_AB_FLOW_RESULT_ERROR_IO,
+  AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS,
+  AVB_AB_FLOW_RESULT_ERROR_INVALID_ARGUMENT
+} AvbABFlowResult;
+
+/* Get a textual representation of |result|. */
+const char* avb_ab_flow_result_to_string(AvbABFlowResult result);
+
+/* High-level function to select a slot to boot. The following
+ * algorithm is used:
+ *
+ * 1. A/B metadata is loaded and validated using the
+ * read_ab_metadata() operation. Typically this means it's read from
+ * the 'misc' partition and if it's invalid then it's reset using
+ * avb_ab_data_init() and this reset metadata is returned.
+ *
+ * 2. All bootable slots listed in the A/B metadata are verified using
+ * avb_slot_verify(). If a slot is invalid or if it fails verification
+ * (and AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR is not set, see
+ * below), it will be marked as unbootable in the A/B metadata and the
+ * metadata will be saved to disk before returning.
+ *
+ * 3. If there are no bootable slots, the value
+ * AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS is returned.
+ *
+ * 4. For each bootable slot, the Stored Rollback Indexes are updated
+ * such that for each rollback index location, the Stored Rollback
+ * Index is the largest number smaller than or equal to the Rollback
+ * Index of each slot.
+ *
+ * 5. The bootable slot with the highest priority is selected and
+ * returned in |out_data|. If this slot is already marked as
+ * successful, the A/B metadata is not modified. However, if the slot
+ * is not marked as bootable its |tries_remaining| count is
+ * decremented and the A/B metadata is saved to disk before returning.
+ * In either case the value AVB_AB_FLOW_RESULT_OK is returning.
+ *
+ * The partitions to load is given in |requested_partitions| as a
+ * NULL-terminated array of NUL-terminated strings. Typically the
+ * |requested_partitions| array only contains a single item for the
+ * boot partition, 'boot'.
+ *
+ * If the device is unlocked (and _only_ if it's unlocked), the
+ * AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR flag should be set
+ * in the |flags| parameter. This will allow considering slots as
+ * verified even when avb_slot_verify() returns
+ * AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED,
+ * AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION, or
+ * AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX for the slot in
+ * question.
+ *
+ * Note that neither androidboot.slot_suffix nor androidboot.slot are
+ * set in the |cmdline| field in |AvbSlotVerifyData| - you will have
+ * to pass these yourself.
+ *
+ * If a slot was selected and it verified then AVB_AB_FLOW_RESULT_OK
+ * is returned.
+ *
+ * If a slot was selected but it didn't verify then
+ * AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR is returned. This can
+ * only happen when the AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR
+ * flag is set.
+ *
+ * If an I/O operation - such as loading/saving metadata or checking
+ * rollback indexes - fail, the value AVB_AB_FLOW_RESULT_ERROR_IO is
+ * returned.
+ *
+ * If memory allocation fails, AVB_AB_FLOW_RESULT_ERROR_OOM is
+ * returned.
+ *
+ * If invalid arguments are passed,
+ * AVB_AB_FLOW_RESULT_ERROR_INVALID_ARGUMENT is returned. For example
+ * this can happen if using AVB_HASHTREE_ERROR_MODE_LOGGING without
+ * AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR.
+ *
+ * Reasonable behavior for handling AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS
+ * is to initiate device repair (which is device-dependent).
+ */
+AvbABFlowResult avb_ab_flow(AvbABOps* ab_ops,
+                            const char* const* requested_partitions,
+                            AvbSlotVerifyFlags flags,
+                            AvbHashtreeErrorMode hashtree_error_mode,
+                            AvbSlotVerifyData** out_data);
+
+AvbABFlowResult avb_ab_slot_select(AvbABOps* ab_ops,char select_slot[]);
+
+/* Marks the slot with the given slot number as active. Returns
+ * AVB_IO_RESULT_OK on success, error code otherwise.
+ *
+ * This function is typically used by the OS updater when completing
+ * an update. It can also used by the firmware for implementing the
+ * "set_active" command.
+ */
+AvbIOResult avb_ab_mark_slot_active(AvbABOps* ab_ops, unsigned int slot_number);
+
+/* Marks the slot with the given slot number as unbootable. Returns
+ * AVB_IO_RESULT_OK on success, error code otherwise.
+ *
+ * This function is typically used by the OS updater before writing to
+ * a slot.
+ */
+AvbIOResult avb_ab_mark_slot_unbootable(AvbABOps* ab_ops,
+                                        unsigned int slot_number);
+
+/* Marks the slot with the given slot number as having booted
+ * successfully. Returns AVB_IO_RESULT_OK on success, error code
+ * otherwise.
+ *
+ * Calling this on an unbootable slot is an error - AVB_IO_RESULT_OK
+ * will be returned yet the function will have no side-effects.
+ *
+ * This function is typically used by the OS updater after having
+ * confirmed that the slot works as intended.
+ */
+AvbIOResult avb_ab_mark_slot_successful(AvbABOps* ab_ops,
+                                        unsigned int slot_number);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_AB_FLOW_H_ */
diff --git a/include/android_avb/avb_ab_ops.h b/include/android_avb/avb_ab_ops.h
new file mode 100644
index 0000000000..d440e75b18
--- /dev/null
+++ b/include/android_avb/avb_ab_ops.h
@@ -0,0 +1,81 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_AB_H) && !defined(AVB_COMPILATION)
+#error \
+    "Never include this file directly, include libavb_ab/libavb_ab.h instead."
+#endif
+*/
+
+#ifndef AVB_AB_OPS_H_
+#define AVB_AB_OPS_H_
+
+#include <android_avb/libavb.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct AvbABOps;
+typedef struct AvbABOps AvbABOps;
+
+struct AvbABData;
+
+/* High-level operations/functions/methods for A/B that are platform
+ * dependent.
+ */
+struct AvbABOps {
+	/* Operations from libavb. */
+	AvbOps* ops;
+
+	/* Reads A/B metadata from persistent storage. Returned data is
+	 * properly byteswapped. Returns AVB_IO_RESULT_OK on success, error
+	 * code otherwise.
+	 *
+	 * If the data read is invalid (e.g. wrong magic or CRC checksum
+	 * failure), the metadata shoule be reset using avb_ab_data_init()
+	 * and then written to persistent storage.
+	 *
+	 * Implementations will typically want to use avb_ab_data_read()
+	 * here to use the 'misc' partition for persistent storage.
+	 */
+	AvbIOResult (*read_ab_metadata)(AvbABOps *ab_ops, struct AvbABData *data);
+
+	/* Writes A/B metadata to persistent storage. This will byteswap and
+	 * update the CRC as needed. Returns AVB_IO_RESULT_OK on success,
+	 * error code otherwise.
+	 *
+	 * Implementations will typically want to use avb_ab_data_write()
+	 * here to use the 'misc' partition for persistent storage.
+	 */
+	AvbIOResult (*write_ab_metadata)(AvbABOps *ab_ops, const struct AvbABData *data);
+	void (*init_ab_metadata)(struct AvbABData *data);
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_AB_OPS_H_ */
diff --git a/include/android_avb/libavb_ab.h b/include/android_avb/libavb_ab.h
new file mode 100644
index 0000000000..fcedfd61bf
--- /dev/null
+++ b/include/android_avb/libavb_ab.h
@@ -0,0 +1,40 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#ifndef LIBAVB_AB_H_
+#define LIBAVB_AB_H_
+
+#include <android_avb/libavb.h>
+
+/* The AVB_INSIDE_LIBAVB_AB_H preprocessor symbol is used to enforce
+ * library users to include only this file. All public interfaces, and
+ * only public interfaces, must be included here.
+ */
+
+#define AVB_INSIDE_LIBAVB_AB_H
+#include <android_avb/avb_ab_flow.h>
+#include <android_avb/avb_ab_ops.h>
+#undef AVB_INSIDE_LIBAVB_AB_H
+
+#endif /* LIBAVB_AB_H_ */
diff --git a/lib/Kconfig b/lib/Kconfig
index 96f2b269ce..710cca7170 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -269,5 +269,6 @@ endmenu
 source lib/efi/Kconfig
 source lib/efi_loader/Kconfig
 source lib/avb/rk_libavb/Kconfig
+source lib/avb/rk_libavb_ab/Kconfig
 
 endmenu
diff --git a/lib/Makefile b/lib/Makefile
index f949f447dd..b629ce6cd0 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -46,6 +46,7 @@ obj-y += list_sort.o
 endif
 
 obj-$(CONFIG_AVB_LIBAVB) += avb/rk_libavb/
+obj-$(CONFIG_AVB_LIBAVB_AB) += avb/rk_libavb_ab/
 
 obj-$(CONFIG_RSA) += rsa/
 obj-$(CONFIG_SHA1) += sha1.o
diff --git a/lib/avb/rk_libavb_ab/Kconfig b/lib/avb/rk_libavb_ab/Kconfig
new file mode 100644
index 0000000000..ae1a8095f3
--- /dev/null
+++ b/lib/avb/rk_libavb_ab/Kconfig
@@ -0,0 +1,7 @@
+config AVB_LIBAVB_AB
+	bool "Choose the a/b system and flow"
+	help
+	  In the android things system, there are 
+	  _a and _b or more systems. So we have to
+	  choose the _a or _b system to startup.
+	  This libavb_ab can suport these functions.
diff --git a/lib/avb/rk_libavb_ab/Makefile b/lib/avb/rk_libavb_ab/Makefile
new file mode 100644
index 0000000000..9b1aa04880
--- /dev/null
+++ b/lib/avb/rk_libavb_ab/Makefile
@@ -0,0 +1 @@
+obj-y	+= avb_ab_flow.o
diff --git a/lib/avb/rk_libavb_ab/avb_ab_flow.c b/lib/avb/rk_libavb_ab/avb_ab_flow.c
new file mode 100644
index 0000000000..9f1fa6df6e
--- /dev/null
+++ b/lib/avb/rk_libavb_ab/avb_ab_flow.c
@@ -0,0 +1,603 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#include <common.h>
+#include <image.h>
+#include <android_image.h>
+#include <malloc.h>
+#include <memalign.h>
+#include <mapmem.h>
+#include <errno.h>
+#include <command.h>
+#include <mmc.h>
+#include <blk.h>
+#include <part.h>
+#include <android_avb/libavb_ab.h>
+#include <config.h>
+#include <command.h>
+#include <environment.h>
+#include <linux/types.h>
+#include <api_public.h>
+#include <android_avb/libavb.h>
+#include <android_avb/avb_util.h>
+#include <android_avb/avb_ab_flow.h>
+
+
+bool avb_ab_data_verify_and_byteswap(const AvbABData* src, AvbABData* dest)
+{
+	/* Ensure magic is correct. */
+	if (avb_safe_memcmp(src->magic, AVB_AB_MAGIC, AVB_AB_MAGIC_LEN) != 0) {
+		avb_error("Magic is incorrect.\n");
+		return false;
+	}
+
+	avb_memcpy(dest, src, sizeof(AvbABData));
+	dest->crc32 = avb_be32toh(dest->crc32);
+
+	/* Ensure we don't attempt to access any fields if the major version
+	* is not supported.
+	*/
+	if (dest->version_major > AVB_AB_MAJOR_VERSION) {
+		avb_error("No support for given major version.\n");
+		return false;
+	}
+
+	/* Bail if CRC32 doesn't match. */
+	if (dest->crc32 !=
+		avb_crc32((const uint8_t*)dest, sizeof(AvbABData) - sizeof(uint32_t) - 1)) {
+		avb_error("CRC32 does not match.\n");
+		return false;
+	}
+
+	return true;
+}
+
+void avb_ab_data_update_crc_and_byteswap(const AvbABData* src,
+                                         AvbABData* dest)
+{
+	avb_memcpy(dest, src, sizeof(AvbABData));
+	dest->crc32 = avb_htobe32(
+		avb_crc32((const uint8_t*)dest, sizeof(AvbABData) - sizeof(uint32_t) - 1));
+}
+
+void avb_ab_data_init(AvbABData *data)
+{
+	avb_memset(data, '\0', sizeof(AvbABData));
+	avb_memcpy(data->magic, AVB_AB_MAGIC, AVB_AB_MAGIC_LEN);
+	data->nb_slot = 2;
+	data->slot_suffix[0] = 'a';
+	data->slot_suffix[1] = 'b';
+	data->slot_suffix[2] = '\0';
+	data->slot_suffix[3] = '\0';
+	data->version_major = AVB_AB_MAJOR_VERSION;
+	data->version_minor = AVB_AB_MINOR_VERSION;
+	data->slots[0].priority = AVB_AB_MAX_PRIORITY;
+	data->slots[0].tries_remaining = AVB_AB_MAX_TRIES_REMAINING;
+	data->slots[0].successful_boot = 0;
+	data->slots[1].priority = AVB_AB_MAX_PRIORITY - 1;
+	data->slots[1].tries_remaining = AVB_AB_MAX_TRIES_REMAINING;
+	data->slots[1].successful_boot = 0;
+}
+
+/* The AvbABData struct is stored 2048 bytes into the 'misc' partition
+ * following the 'struct bootloader_message' field. The struct is
+ * compatible with the guidelines in bootable/recovery/bootloader.h -
+ * e.g. it is stored in the |slot_suffix| field, starts with a
+ * NUL-byte, and is 32 bytes long.
+ */
+#define AB_METADATA_MISC_PARTITION_OFFSET 2048
+
+AvbIOResult avb_ab_data_read(AvbABOps* ab_ops, AvbABData* data)
+{
+	AvbOps* ops = ab_ops->ops;
+	ALLOC_CACHE_ALIGN_BUFFER(u8, serialized, 512);
+	size_t num_bytes_read;
+
+	memset(serialized,0,sizeof(u8) * 512);
+	ops->read_from_partition(ops,
+				"misc",
+				AB_METADATA_MISC_PARTITION_OFFSET,
+				512,
+				(AvbABData*)serialized,
+				&num_bytes_read);
+	if (!avb_ab_data_verify_and_byteswap((AvbABData*)serialized, data)) {
+	avb_error(
+		"Error validating A/B metadata from disk. "
+		"Resetting and writing new A/B metadata to disk.\n");
+		avb_ab_data_init(data);
+		return avb_ab_data_write(ab_ops, data);
+	}
+	return AVB_IO_RESULT_OK;
+}
+
+AvbIOResult avb_ab_data_write(AvbABOps* ab_ops, const AvbABData* data) {
+	AvbOps* ops = ab_ops->ops;
+	AvbIOResult io_ret;
+	ALLOC_CACHE_ALIGN_BUFFER(u8, temp, 512);
+	memset(temp,0,sizeof(u8) * 512);
+
+	avb_ab_data_update_crc_and_byteswap(data, (AvbABData*)temp);
+	io_ret = ops->write_to_partition(ops,
+                                   "misc",
+                                   AB_METADATA_MISC_PARTITION_OFFSET,
+                                   512,
+                                   temp);
+	if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+		return AVB_IO_RESULT_ERROR_OOM;
+	} else if (io_ret != AVB_IO_RESULT_OK) {
+		avb_error("Error writing A/B metadata.\n");
+		return AVB_IO_RESULT_ERROR_IO;
+	}
+	return AVB_IO_RESULT_OK;
+}
+
+static bool slot_is_bootable(AvbABSlotData* slot)
+{
+	return slot->priority > 0 &&
+		(slot->successful_boot || (slot->tries_remaining > 0));
+}
+
+static void slot_set_unbootable(AvbABSlotData* slot)
+{
+	slot->priority = 0;
+	slot->tries_remaining = 0;
+	slot->successful_boot = 0;
+}
+
+/* Ensure all unbootable and/or illegal states are marked as the
+ * canonical 'unbootable' state, e.g. priority=0, tries_remaining=0,
+ * and successful_boot=0.
+ */
+static void slot_normalize(AvbABSlotData* slot)
+{
+	if (slot->priority > 0) {
+		if (slot->tries_remaining == 0 && !slot->successful_boot) {
+		/* We've exhausted all tries -> unbootable. */
+		slot_set_unbootable(slot);
+	}
+	if (slot->tries_remaining > 0 && slot->successful_boot) {
+		/* Illegal state - avb_ab_mark_slot_successful() will clear
+		 * tries_remaining when setting successful_boot.
+		 */
+		slot_set_unbootable(slot);
+	}
+	} else {
+		slot_set_unbootable(slot);
+	}
+}
+
+static const char* slot_suffixes[2] = {"_a", "_b"};
+
+/* Helper function to load metadata - returns AVB_IO_RESULT_OK on
+ * success, error code otherwise.
+ */
+AvbIOResult load_metadata(AvbABOps *ab_ops,
+				AvbABData *ab_data,
+				AvbABData *ab_data_orig)
+{
+	AvbIOResult io_ret;
+	io_ret = ab_ops->read_ab_metadata(ab_ops,ab_data);
+	if(io_ret != AVB_IO_RESULT_OK) {
+		avb_error("I/O error while loading A/B metadata.\n");
+		return io_ret;
+	}
+
+	*ab_data_orig = *ab_data;
+	slot_normalize(&ab_data->slots[0]);
+	slot_normalize(&ab_data->slots[1]);
+	return AVB_IO_RESULT_OK;
+}
+
+
+/* Writes A/B metadata to disk only if it has changed - returns
+ * AVB_IO_RESULT_OK on success, error code otherwise.
+ */
+static AvbIOResult save_metadata_if_changed(AvbABOps* ab_ops,
+                                            AvbABData* ab_data,
+                                            AvbABData* ab_data_orig)
+{
+	if (avb_safe_memcmp(ab_data, ab_data_orig, sizeof(AvbABData)) != 0) {
+		avb_debug("Writing A/B metadata to disk.\n");
+		return ab_ops->write_ab_metadata(ab_ops, ab_data);
+	}
+	return AVB_IO_RESULT_OK;
+}
+
+AvbABFlowResult avb_ab_flow(AvbABOps* ab_ops,
+                            const char* const* requested_partitions,
+                            AvbSlotVerifyFlags flags,
+                            AvbHashtreeErrorMode hashtree_error_mode,
+                            AvbSlotVerifyData** out_data)
+{
+	AvbOps* ops = ab_ops->ops;
+	AvbSlotVerifyData* slot_data[2] = {NULL, NULL};
+	AvbSlotVerifyData* data = NULL;
+	AvbABFlowResult ret;
+	AvbABData ab_data, ab_data_orig;
+	size_t slot_index_to_boot, n;
+	AvbIOResult io_ret;
+	bool saw_and_allowed_verification_error = false;
+	io_ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
+	if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+		ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
+		goto out;
+	} else if (io_ret != AVB_IO_RESULT_OK) {
+		ret = AVB_AB_FLOW_RESULT_ERROR_IO;
+		goto out;
+	}
+
+	/* Validate all bootable slots. */
+	for (n = 0; n < 2; n++) {
+		if (slot_is_bootable(&ab_data.slots[n])) {
+			AvbSlotVerifyResult verify_result;
+			bool set_slot_unbootable = false;
+
+			verify_result = avb_slot_verify(ops,
+                                      requested_partitions,
+                                      slot_suffixes[n],
+                                      flags,
+                                      hashtree_error_mode,
+                                      &slot_data[n]);
+			switch (verify_result) {
+			case AVB_SLOT_VERIFY_RESULT_ERROR_OOM:
+				ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
+				goto out;
+
+			case AVB_SLOT_VERIFY_RESULT_ERROR_IO:
+				ret = AVB_AB_FLOW_RESULT_ERROR_IO;
+				goto out;
+
+			case AVB_SLOT_VERIFY_RESULT_OK:
+				break;
+
+			case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA:
+			case AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION:
+			/* Even with AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR
+		 	 * these mean game over.
+		 	 */
+				set_slot_unbootable = true;
+				break;
+
+			/* explicit fallthrough. */
+			case AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION:
+			case AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX:
+			case AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED:
+				if (flags & AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR) {
+				/* Do nothing since we allow this. */
+					avb_debugv("Allowing slot ",
+					slot_suffixes[n],
+					" which verified "
+					"with result ",
+					avb_slot_verify_result_to_string(verify_result),
+					" because "
+					"AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR "
+					"is set.\n",
+					NULL);
+					saw_and_allowed_verification_error = true;
+				} else {
+					set_slot_unbootable = true;
+				}
+				break;
+
+			case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT:
+				ret = AVB_AB_FLOW_RESULT_ERROR_INVALID_ARGUMENT;
+				goto out;
+			/* Do not add a 'default:' case here because of -Wswitch. */
+			}
+
+			if (set_slot_unbootable) {
+				avb_errorv("Error verifying slot ",
+					slot_suffixes[n],
+					" with result ",
+					avb_slot_verify_result_to_string(verify_result),
+					" - setting unbootable.\n",
+					NULL);
+				slot_set_unbootable(&ab_data.slots[n]);
+			}
+		}
+	}
+
+	if (slot_is_bootable(&ab_data.slots[0]) && slot_is_bootable(&ab_data.slots[1])) {
+		if (ab_data.slots[1].priority > ab_data.slots[0].priority) {
+			slot_index_to_boot = 1;
+		} else {
+			slot_index_to_boot = 0;
+		}
+		} else if (slot_is_bootable(&ab_data.slots[0])) {
+			slot_index_to_boot = 0;
+		} else if (slot_is_bootable(&ab_data.slots[1])) {
+			slot_index_to_boot = 1;
+		} else {
+		/* No bootable slots! */
+			avb_error("No bootable slots found.\n");
+			ret = AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS;
+			goto out;
+		}
+
+		/* Update stored rollback index such that the stored rollback index
+		 * is the largest value supporting all currently bootable slots. Do
+		 * this for every rollback index location.
+		 */
+		for (n = 0; n < AVB_MAX_NUMBER_OF_ROLLBACK_INDEX_LOCATIONS; n++) {
+			uint64_t rollback_index_value = 0;
+
+			if (slot_data[0] != NULL && slot_data[1] != NULL) {
+				uint64_t a_rollback_index = slot_data[0]->rollback_indexes[n];
+				uint64_t b_rollback_index = slot_data[1]->rollback_indexes[n];
+				rollback_index_value =
+				(a_rollback_index < b_rollback_index ? a_rollback_index
+								: b_rollback_index);
+			} else if (slot_data[0] != NULL) {
+				rollback_index_value = slot_data[0]->rollback_indexes[n];
+			} else if (slot_data[1] != NULL) {
+				rollback_index_value = slot_data[1]->rollback_indexes[n];
+			}
+
+			if (rollback_index_value != 0) {
+				uint64_t current_rollback_index_value;
+				io_ret = ops->read_rollback_index(ops, n, &current_rollback_index_value);
+				if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+					ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
+					goto out;
+			} else if (io_ret != AVB_IO_RESULT_OK) {
+				avb_error("Error getting rollback index for slot.\n");
+				ret = AVB_AB_FLOW_RESULT_ERROR_IO;
+				goto out;
+			}
+			if (current_rollback_index_value != rollback_index_value) {
+				io_ret = ops->write_rollback_index(ops, n, rollback_index_value);
+				if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+ 					ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
+					goto out;
+				} else if (io_ret != AVB_IO_RESULT_OK) {
+					avb_error("Error setting stored rollback index.\n");
+          				ret = AVB_AB_FLOW_RESULT_ERROR_IO;
+          				goto out;
+				}
+			}
+		}
+	}
+
+	/* Finally, select this slot. */
+	avb_assert(slot_data[slot_index_to_boot] != NULL);
+	data = slot_data[slot_index_to_boot];
+	slot_data[slot_index_to_boot] = NULL;
+	if (saw_and_allowed_verification_error) {
+		avb_assert(flags & AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR);
+		ret = AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR;
+	} else {
+		ret = AVB_AB_FLOW_RESULT_OK;
+	}
+
+	/* ... and decrement tries remaining, if applicable. */
+	if (!ab_data.slots[slot_index_to_boot].successful_boot &&
+		ab_data.slots[slot_index_to_boot].tries_remaining > 0) {
+		ab_data.slots[slot_index_to_boot].tries_remaining -= 1;
+	}
+
+out:
+	io_ret = save_metadata_if_changed(ab_ops, &ab_data, &ab_data_orig);
+	if (io_ret != AVB_IO_RESULT_OK) {
+		if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+		ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
+	} else {
+			ret = AVB_AB_FLOW_RESULT_ERROR_IO;
+		}
+		if (data != NULL) {
+			avb_slot_verify_data_free(data);
+			data = NULL;
+		}
+	}
+
+	for (n = 0; n < 2; n++) {
+		if (slot_data[n] != NULL) {
+			avb_slot_verify_data_free(slot_data[n]);
+		}
+	}
+
+	if (out_data != NULL) {
+		*out_data = data;
+	} else {
+		if (data != NULL) {
+			avb_slot_verify_data_free(data);
+		}
+	}
+
+	return ret;
+}
+
+AvbABFlowResult avb_ab_slot_select(AvbABOps* ab_ops,char select_slot[])
+{
+	AvbABFlowResult ret = 0;
+	AvbIOResult io_ret = 0;
+	AvbABData ab_data, ab_data_orig;
+	size_t slot_index_to_boot;
+	io_ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
+	if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+		ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
+		goto out;
+	} else if (io_ret != AVB_IO_RESULT_OK) {
+		ret = AVB_AB_FLOW_RESULT_ERROR_IO;
+		goto out;
+	}
+	if (slot_is_bootable(&ab_data.slots[0]) && slot_is_bootable(&ab_data.slots[1])) {
+		if (ab_data.slots[1].priority > ab_data.slots[0].priority) {
+			slot_index_to_boot = 1;
+		} else {
+			slot_index_to_boot = 0;
+		}
+	} else if(slot_is_bootable(&ab_data.slots[0])) {
+		slot_index_to_boot = 0;
+	} else if(slot_is_bootable(&ab_data.slots[1])) {
+		slot_index_to_boot = 1;
+	} else {
+		avb_error("No bootable slots found.\n");
+		ret = AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS;
+		goto out;
+	}
+	if (slot_index_to_boot == 0) {
+		select_slot[0] = '_';
+		select_slot[1] = 'a';
+		select_slot[2] = '\0';
+	} else if(slot_index_to_boot == 1) {
+		select_slot[0] = '_';
+		select_slot[1] = 'b';
+		select_slot[2] = '\0';
+	}
+out:
+	return ret;
+}
+
+AvbIOResult avb_ab_mark_slot_active(AvbABOps *ab_ops,
+                                    unsigned int slot_number)
+{
+	AvbABData ab_data, ab_data_orig;
+	unsigned int other_slot_number;
+	AvbIOResult ret;
+
+	if( slot_number > 1) {
+		avb_error("slot_number can not > 1");
+		return -1;
+	}
+	ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
+	if (ret != AVB_IO_RESULT_OK) {
+		goto out;
+	}
+	/* Make requested slot top priority, unsuccessful, and with max tries. */
+	ab_data.slots[slot_number].priority = AVB_AB_MAX_PRIORITY;
+	ab_data.slots[slot_number].tries_remaining = AVB_AB_MAX_TRIES_REMAINING;
+	ab_data.slots[slot_number].successful_boot = 0;
+
+	/* Ensure other slot doesn't have as high a priority. */
+	other_slot_number = 1 - slot_number;
+	if (ab_data.slots[other_slot_number].priority == AVB_AB_MAX_PRIORITY) {
+		ab_data.slots[other_slot_number].priority = AVB_AB_MAX_PRIORITY - 1;
+	}
+
+	ret = AVB_IO_RESULT_OK;
+
+out:
+	if (ret == AVB_IO_RESULT_OK) {
+		ret = save_metadata_if_changed(ab_ops, &ab_data, &ab_data_orig);
+	}
+	return ret;
+}
+
+AvbIOResult avb_ab_mark_slot_unbootable(AvbABOps *ab_ops,
+                                        unsigned int slot_number)
+{
+	AvbABData ab_data, ab_data_orig;
+	AvbIOResult ret;
+
+	if( slot_number > 1) {
+		avb_error("slot_number can not > 1");
+		return -1;
+	}
+
+	ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
+	if (ret != AVB_IO_RESULT_OK) {
+		goto out;
+	}
+
+	slot_set_unbootable(&ab_data.slots[slot_number]);
+
+	ret = AVB_IO_RESULT_OK;
+
+out:
+	if (ret == AVB_IO_RESULT_OK) {
+		ret = save_metadata_if_changed(ab_ops, &ab_data, &ab_data_orig);
+	}
+	return ret;
+}
+
+AvbIOResult avb_ab_mark_slot_successful(AvbABOps *ab_ops,
+                                        unsigned int slot_number)
+{
+	AvbABData ab_data, ab_data_orig;
+	AvbIOResult ret;
+
+	if( slot_number > 1) {
+		avb_error("slot_number can not > 1");
+		return -1;
+	}
+
+	ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
+	if (ret != AVB_IO_RESULT_OK) {
+		goto out;
+	}
+
+	if (!slot_is_bootable(&ab_data.slots[slot_number])) {
+		avb_error("Cannot mark unbootable slot as successful.\n");
+		ret = AVB_IO_RESULT_OK;
+		goto out;
+	}
+
+	ab_data.slots[slot_number].tries_remaining = 0;
+	ab_data.slots[slot_number].successful_boot = 1;
+
+	ret = AVB_IO_RESULT_OK;
+
+out:
+	if (ret == AVB_IO_RESULT_OK) {
+		ret = save_metadata_if_changed(ab_ops, &ab_data, &ab_data_orig);
+	}
+	return ret;
+}
+
+const char *avb_ab_flow_result_to_string(AvbABFlowResult result)
+{
+	const char* ret = NULL;
+
+	switch (result) {
+	case AVB_AB_FLOW_RESULT_OK:
+		ret = "OK";
+		break;
+
+	case AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR:
+		ret = "OK_WITH_VERIFICATION_ERROR";
+		break;
+
+	case AVB_AB_FLOW_RESULT_ERROR_OOM:
+		ret = "ERROR_OOM";
+		break;
+
+	case AVB_AB_FLOW_RESULT_ERROR_IO:
+		ret = "ERROR_IO";
+		break;
+
+	case AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS:
+		ret = "ERROR_NO_BOOTABLE_SLOTS";
+		break;
+	case AVB_AB_FLOW_RESULT_ERROR_INVALID_ARGUMENT:
+		ret = "ERROR_INVALID_ARGUMENT";
+		break;
+	/* Do not add a 'default:' case here because of -Wswitch. */
+	}
+
+	if (ret == NULL) {
+		avb_error("Unknown AvbABFlowResult value.\n");
+		ret = "(unknown)";
+	}
+
+	return ret;
+}

commit 5b69db0720b90f33ecb7fb666b196bfc90404185
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Sep 13 09:41:53 2017 +0800

    avb: add the google avb to lib
    
    The avb lib is provided by google, and it must be
    used in the android things to boot and verify
    android system. It can be getted in
    https://android.googlesource.com/platform/external/avb.
    
    Then we can use the functions suported by avb to program
    the a/b and avb code.
    
    Change-Id: I09371fe53cd50233a69533cfa09d5ebca5b10871
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/android_avb/avb_chain_partition_descriptor.h b/include/android_avb/avb_chain_partition_descriptor.h
new file mode 100644
index 0000000000..3e5395fec5
--- /dev/null
+++ b/include/android_avb/avb_chain_partition_descriptor.h
@@ -0,0 +1,74 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_CHAIN_PARTITION_DESCRIPTOR_H_
+#define AVB_CHAIN_PARTITION_DESCRIPTOR_H_
+
+#include <android_avb/avb_descriptor.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* A descriptor containing a pointer to signed integrity data stored
+ * on another partition. The descriptor contains the partition name in
+ * question (without the A/B suffix), the public key used to sign the
+ * integrity data, and rollback index location to use for rollback
+ * protection.
+ *
+ * Following this struct are |partition_name_len| bytes of the
+ * partition name (UTF-8 encoded) and |public_key_len| bytes of the
+ * public key.
+ *
+ * The |reserved| field is for future expansion and must be set to NUL
+ * bytes.
+ */
+typedef struct AvbChainPartitionDescriptor {
+  AvbDescriptor parent_descriptor;
+  uint32_t rollback_index_location;
+  uint32_t partition_name_len;
+  uint32_t public_key_len;
+  uint8_t reserved[64];
+} AVB_ATTR_PACKED AvbChainPartitionDescriptor;
+
+/* Copies |src| to |dest| and validates, byte-swapping fields in the
+ * process if needed. Returns true if valid, false if invalid.
+ *
+ * Data following the struct is not validated nor copied.
+ */
+bool avb_chain_partition_descriptor_validate_and_byteswap(
+    const AvbChainPartitionDescriptor* src,
+    AvbChainPartitionDescriptor* dest) AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_CHAIN_PARTITION_DESCRIPTOR_H_ */
diff --git a/include/android_avb/avb_crypto.h b/include/android_avb/avb_crypto.h
new file mode 100644
index 0000000000..a5b790cc55
--- /dev/null
+++ b/include/android_avb/avb_crypto.h
@@ -0,0 +1,167 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_CRYPTO_H_
+#define AVB_CRYPTO_H_
+
+#include <android_avb/avb_sysdeps.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Size of a RSA-2048 signature. */
+#define AVB_RSA2048_NUM_BYTES 256
+
+/* Size of a RSA-4096 signature. */
+#define AVB_RSA4096_NUM_BYTES 512
+
+/* Size of a RSA-8192 signature. */
+#define AVB_RSA8192_NUM_BYTES 1024
+
+/* Size in bytes of a SHA-256 digest. */
+#define AVB_SHA256_DIGEST_SIZE 32
+
+/* Size in bytes of a SHA-512 digest. */
+#define AVB_SHA512_DIGEST_SIZE 64
+
+/* Algorithms that can be used in the vbmeta image for
+ * verification. An algorithm consists of a hash type and a signature
+ * type.
+ *
+ * The data used to calculate the hash is the three blocks mentioned
+ * in the documentation for |AvbVBMetaImageHeader| except for the data
+ * in the "Authentication data" block.
+ *
+ * For signatures with RSA keys, PKCS v1.5 padding is used. The public
+ * key data is stored in the auxiliary data block, see
+ * |AvbRSAPublicKeyHeader| for the serialization format.
+ *
+ * Each algorithm type is described below:
+ *
+ * AVB_ALGORITHM_TYPE_NONE: There is no hash, no signature of the
+ * data, and no public key. The data cannot be verified. The fields
+ * |hash_size|, |signature_size|, and |public_key_size| must be zero.
+ *
+ * AVB_ALGORITHM_TYPE_SHA256_RSA2048: The hash function used is
+ * SHA-256, resulting in 32 bytes of hash digest data. This hash is
+ * signed with a 2048-bit RSA key. The field |hash_size| must be 32,
+ * |signature_size| must be 256, and the public key data must have
+ * |key_num_bits| set to 2048.
+ *
+ * AVB_ALGORITHM_TYPE_SHA256_RSA4096: Like above, but only with
+ * a 4096-bit RSA key and |signature_size| set to 512.
+ *
+ * AVB_ALGORITHM_TYPE_SHA256_RSA8192: Like above, but only with
+ * a 8192-bit RSA key and |signature_size| set to 1024.
+ *
+ * AVB_ALGORITHM_TYPE_SHA512_RSA2048: The hash function used is
+ * SHA-512, resulting in 64 bytes of hash digest data. This hash is
+ * signed with a 2048-bit RSA key. The field |hash_size| must be 64,
+ * |signature_size| must be 256, and the public key data must have
+ * |key_num_bits| set to 2048.
+ *
+ * AVB_ALGORITHM_TYPE_SHA512_RSA4096: Like above, but only with
+ * a 4096-bit RSA key and |signature_size| set to 512.
+ *
+ * AVB_ALGORITHM_TYPE_SHA512_RSA8192: Like above, but only with
+ * a 8192-bit RSA key and |signature_size| set to 1024.
+ */
+typedef enum {
+  AVB_ALGORITHM_TYPE_NONE,
+  AVB_ALGORITHM_TYPE_SHA256_RSA2048,
+  AVB_ALGORITHM_TYPE_SHA256_RSA4096,
+  AVB_ALGORITHM_TYPE_SHA256_RSA8192,
+  AVB_ALGORITHM_TYPE_SHA512_RSA2048,
+  AVB_ALGORITHM_TYPE_SHA512_RSA4096,
+  AVB_ALGORITHM_TYPE_SHA512_RSA8192,
+  _AVB_ALGORITHM_NUM_TYPES
+} AvbAlgorithmType;
+
+/* Holds algorithm-specific data. The |padding| is needed by avb_rsa_verify. */
+typedef struct {
+  const uint8_t* padding;
+  size_t padding_len;
+  size_t hash_len;
+} AvbAlgorithmData;
+
+/* Provides algorithm-specific data for a given |algorithm|. Returns NULL if
+ * |algorithm| is invalid.
+ */
+const AvbAlgorithmData* avb_get_algorithm_data(AvbAlgorithmType algorithm)
+    AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* The header for a serialized RSA public key.
+ *
+ * The size of the key is given by |key_num_bits|, for example 2048
+ * for a RSA-2048 key. By definition, a RSA public key is the pair (n,
+ * e) where |n| is the modulus (which can be represented in
+ * |key_num_bits| bits) and |e| is the public exponent. The exponent
+ * is not stored since it's assumed to always be 65537.
+ *
+ * To optimize verification, the key block includes two precomputed
+ * values, |n0inv| (fits in 32 bits) and |rr| and can always be
+ * represented in |key_num_bits|.
+
+ * The value |n0inv| is the value -1/n[0] (mod 2^32). The value |rr|
+ * is (2^key_num_bits)^2 (mod n).
+ *
+ * Following this header is |key_num_bits| bits of |n|, then
+ * |key_num_bits| bits of |rr|. Both values are stored with most
+ * significant bit first. Each serialized number takes up
+ * |key_num_bits|/8 bytes.
+ *
+ * All fields in this struct are stored in network byte order when
+ * serialized.  To generate a copy with fields swapped to native byte
+ * order, use the function avb_rsa_public_key_header_validate_and_byteswap().
+ *
+ * The avb_rsa_verify() function expects a key in this serialized
+ * format.
+ *
+ * The 'avbtool extract_public_key' command can be used to generate a
+ * serialized RSA public key.
+ */
+typedef struct AvbRSAPublicKeyHeader {
+  uint32_t key_num_bits;
+  uint32_t n0inv;
+} AVB_ATTR_PACKED AvbRSAPublicKeyHeader;
+
+/* Copies |src| to |dest| and validates, byte-swapping fields in the
+ * process if needed. Returns true if valid, false if invalid.
+ */
+bool avb_rsa_public_key_header_validate_and_byteswap(
+    const AvbRSAPublicKeyHeader* src,
+    AvbRSAPublicKeyHeader* dest) AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_CRYPTO_H_ */
diff --git a/include/android_avb/avb_descriptor.h b/include/android_avb/avb_descriptor.h
new file mode 100644
index 0000000000..9b0ef2a46f
--- /dev/null
+++ b/include/android_avb/avb_descriptor.h
@@ -0,0 +1,133 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_DESCRIPTOR_H_
+#define AVB_DESCRIPTOR_H_
+
+#include <android_avb/avb_sysdeps.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Well-known descriptor tags.
+ *
+ * AVB_DESCRIPTOR_TAG_PROPERTY: see |AvbPropertyDescriptor| struct.
+ * AVB_DESCRIPTOR_TAG_HASHTREE: see |AvbHashtreeDescriptor| struct.
+ * AVB_DESCRIPTOR_TAG_HASH: see |AvbHashDescriptor| struct.
+ * AVB_DESCRIPTOR_TAG_KERNEL_CMDLINE: see |AvbKernelCmdlineDescriptor| struct.
+ * AVB_DESCRIPTOR_TAG_CHAIN_PARTITION: see |AvbChainPartitionDescriptor| struct.
+ */
+typedef enum {
+  AVB_DESCRIPTOR_TAG_PROPERTY,
+  AVB_DESCRIPTOR_TAG_HASHTREE,
+  AVB_DESCRIPTOR_TAG_HASH,
+  AVB_DESCRIPTOR_TAG_KERNEL_CMDLINE,
+  AVB_DESCRIPTOR_TAG_CHAIN_PARTITION,
+} AvbDescriptorTag;
+
+/* The header for a serialized descriptor.
+ *
+ * A descriptor always have two fields, a |tag| (denoting its type,
+ * see the |AvbDescriptorTag| enumeration) and the size of the bytes
+ * following, |num_bytes_following|.
+ *
+ * For padding, |num_bytes_following| is always a multiple of 8.
+ */
+typedef struct AvbDescriptor {
+  uint64_t tag;
+  uint64_t num_bytes_following;
+} AVB_ATTR_PACKED AvbDescriptor;
+
+/* Copies |src| to |dest| and validates, byte-swapping fields in the
+ * process if needed. Returns true if valid, false if invalid.
+ *
+ * Data following the struct is not validated nor copied.
+ */
+bool avb_descriptor_validate_and_byteswap(
+    const AvbDescriptor* src, AvbDescriptor* dest) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Signature for callback function used in avb_descriptor_foreach().
+ * The passed in descriptor is given by |descriptor| and the
+ * |user_data| passed to avb_descriptor_foreach() function is in
+ * |user_data|. Return true to continue iterating, false to stop
+ * iterating.
+ *
+ * Note that |descriptor| points into the image passed to
+ * avb_descriptor_foreach() - all fields need to be byteswapped!
+ */
+typedef bool AvbDescriptorForeachFunc(const AvbDescriptor* descriptor,
+                                      void* user_data);
+
+/* Convenience function to iterate over all descriptors in an vbmeta
+ * image.
+ *
+ * The function given by |foreach_func| will be called for each
+ * descriptor. The given function should return true to continue
+ * iterating, false to stop.
+ *
+ * The |user_data| parameter will be passed to |foreach_func|.
+ *
+ * Returns false if the iteration was short-circuited, that is if
+ * an invocation of |foreach_func| returned false.
+ *
+ * Before using this function, you MUST verify |image_data| with
+ * avb_vbmeta_image_verify() and reject it unless it's signed by a known
+ * good public key. Additionally, |image_data| must be word-aligned.
+ */
+bool avb_descriptor_foreach(const uint8_t* image_data,
+                            size_t image_size,
+                            AvbDescriptorForeachFunc foreach_func,
+                            void* user_data);
+
+/* Gets all descriptors in a vbmeta image.
+ *
+ * The return value is a NULL-pointer terminated array of
+ * AvbDescriptor pointers. Free with avb_free() when you are done with
+ * it. If |out_num_descriptors| is non-NULL, the number of descriptors
+ * will be returned there.
+ *
+ * Note that each AvbDescriptor pointer in the array points into
+ * |image_data| - all fields need to be byteswapped!
+ *
+ * Before using this function, you MUST verify |image_data| with
+ * avb_vbmeta_image_verify() and reject it unless it's signed by a known
+ * good public key. Additionally, |image_data| must be word-aligned.
+ */
+const AvbDescriptor** avb_descriptor_get_all(const uint8_t* image_data,
+                                             size_t image_size,
+                                             size_t* out_num_descriptors)
+    AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_DESCRIPTOR_H_ */
diff --git a/include/android_avb/avb_footer.h b/include/android_avb/avb_footer.h
new file mode 100644
index 0000000000..48f2c378d5
--- /dev/null
+++ b/include/android_avb/avb_footer.h
@@ -0,0 +1,88 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_FOOTER_H_
+#define AVB_FOOTER_H_
+
+#include <android_avb/avb_sysdeps.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Magic for the footer. */
+#define AVB_FOOTER_MAGIC "AVBf"
+#define AVB_FOOTER_MAGIC_LEN 4
+
+/* Size of the footer. */
+#define AVB_FOOTER_SIZE 64
+
+/* The current footer version used - keep in sync with avbtool. */
+#define AVB_FOOTER_VERSION_MAJOR 1
+#define AVB_FOOTER_VERSION_MINOR 0
+
+/* The struct used as a footer used on partitions, used to find the
+ * AvbVBMetaImageHeader struct. This struct is always stored at the
+ * end of a partition.
+ */
+typedef struct AvbFooter {
+  /*   0: Four bytes equal to "AVBf" (AVB_FOOTER_MAGIC). */
+  uint8_t magic[AVB_FOOTER_MAGIC_LEN];
+  /*   4: The major version of the footer struct. */
+  uint32_t version_major;
+  /*   8: The minor version of the footer struct. */
+  uint32_t version_minor;
+
+  /*  12: The original size of the image on the partition. */
+  uint64_t original_image_size;
+
+  /*  20: The offset of the |AvbVBMetaImageHeader| struct. */
+  uint64_t vbmeta_offset;
+
+  /*  28: The size of the vbmeta block (header + auth + aux blocks). */
+  uint64_t vbmeta_size;
+
+  /*  36: Padding to ensure struct is size AVB_FOOTER_SIZE bytes. This
+   * must be set to zeroes.
+   */
+  uint8_t reserved[28];
+} AVB_ATTR_PACKED AvbFooter;
+
+/* Copies |src| to |dest| and validates, byte-swapping fields in the
+ * process if needed. Returns true if valid, false if invalid.
+ */
+bool avb_footer_validate_and_byteswap(const AvbFooter* src, AvbFooter* dest)
+    AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_FOOTER_H_ */
diff --git a/include/android_avb/avb_hash_descriptor.h b/include/android_avb/avb_hash_descriptor.h
new file mode 100644
index 0000000000..57333ad97a
--- /dev/null
+++ b/include/android_avb/avb_hash_descriptor.h
@@ -0,0 +1,75 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_HASH_DESCRIPTOR_H_
+#define AVB_HASH_DESCRIPTOR_H_
+
+#include <android_avb/avb_descriptor.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* A descriptor containing information about hash for an image.
+ *
+ * This descriptor is typically used for boot partitions to verify the
+ * entire kernel+initramfs image before executing it.
+ *
+ * Following this struct are |partition_name_len| bytes of the
+ * partition name (UTF-8 encoded), |salt_len| bytes of salt, and then
+ * |digest_len| bytes of the digest.
+ *
+ * The |reserved| field is for future expansion and must be set to NUL
+ * bytes.
+ */
+typedef struct AvbHashDescriptor {
+  AvbDescriptor parent_descriptor;
+  uint64_t image_size;
+  uint8_t hash_algorithm[32];
+  uint32_t partition_name_len;
+  uint32_t salt_len;
+  uint32_t digest_len;
+  uint8_t reserved[64];
+} AVB_ATTR_PACKED AvbHashDescriptor;
+
+/* Copies |src| to |dest| and validates, byte-swapping fields in the
+ * process if needed. Returns true if valid, false if invalid.
+ *
+ * Data following the struct is not validated nor copied.
+ */
+bool avb_hash_descriptor_validate_and_byteswap(const AvbHashDescriptor* src,
+                                               AvbHashDescriptor* dest)
+    AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_HASH_DESCRIPTOR_H_ */
diff --git a/include/android_avb/avb_hashtree_descriptor.h b/include/android_avb/avb_hashtree_descriptor.h
new file mode 100644
index 0000000000..e4e0218c0e
--- /dev/null
+++ b/include/android_avb/avb_hashtree_descriptor.h
@@ -0,0 +1,85 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_HASHTREE_DESCRIPTOR_H_
+#define AVB_HASHTREE_DESCRIPTOR_H_
+
+#include <android_avb/avb_descriptor.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* A descriptor containing information about a dm-verity hashtree.
+ *
+ * Hash-trees are used to verify large partitions typically containing
+ * file systems. See
+ * https://gitlab.com/cryptsetup/cryptsetup/wikis/DMVerity for more
+ * information about dm-verity.
+ *
+ * Following this struct are |partition_name_len| bytes of the
+ * partition name (UTF-8 encoded), |salt_len| bytes of salt, and then
+ * |root_digest_len| bytes of the root digest.
+ *
+ * The |reserved| field is for future expansion and must be set to NUL
+ * bytes.
+ */
+typedef struct AvbHashtreeDescriptor {
+  AvbDescriptor parent_descriptor;
+  uint32_t dm_verity_version;
+  uint64_t image_size;
+  uint64_t tree_offset;
+  uint64_t tree_size;
+  uint32_t data_block_size;
+  uint32_t hash_block_size;
+  uint32_t fec_num_roots;
+  uint64_t fec_offset;
+  uint64_t fec_size;
+  uint8_t hash_algorithm[32];
+  uint32_t partition_name_len;
+  uint32_t salt_len;
+  uint32_t root_digest_len;
+  uint8_t reserved[64];
+} AVB_ATTR_PACKED AvbHashtreeDescriptor;
+
+/* Copies |src| to |dest| and validates, byte-swapping fields in the
+ * process if needed. Returns true if valid, false if invalid.
+ *
+ * Data following the struct is not validated nor copied.
+ */
+bool avb_hashtree_descriptor_validate_and_byteswap(
+    const AvbHashtreeDescriptor* src,
+    AvbHashtreeDescriptor* dest) AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_HASHTREE_DESCRIPTOR_H_ */
diff --git a/include/android_avb/avb_kernel_cmdline_descriptor.h b/include/android_avb/avb_kernel_cmdline_descriptor.h
new file mode 100644
index 0000000000..aee042cded
--- /dev/null
+++ b/include/android_avb/avb_kernel_cmdline_descriptor.h
@@ -0,0 +1,83 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_KERNEL_CMDLINE_DESCRIPTOR_H_
+#define AVB_KERNEL_CMDLINE_DESCRIPTOR_H_
+
+#include <android_avb/avb_descriptor.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Flags for kernel command-line descriptors.
+ *
+ * AVB_KERNEL_CMDLINE_FLAGS_USE_ONLY_IF_HASHTREE_NOT_DISABLED: The
+ * cmdline will only be applied if hashtree verification is not
+ * disabled (cf. AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED).
+ *
+ * AVB_KERNEL_CMDLINE_FLAGS_USE_ONLY_IF_HASHTREE_DISABLED: The cmdline
+ * will only be applied if hashtree verification is disabled
+ * (cf. AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED).
+ */
+typedef enum {
+  AVB_KERNEL_CMDLINE_FLAGS_USE_ONLY_IF_HASHTREE_NOT_DISABLED = (1 << 0),
+  AVB_KERNEL_CMDLINE_FLAGS_USE_ONLY_IF_HASHTREE_DISABLED = (1 << 1)
+} AvbKernelCmdlineFlags;
+
+/* A descriptor containing information to be appended to the kernel
+ * command-line.
+ *
+ * The |flags| field contains flags from the AvbKernelCmdlineFlags
+ * enumeration.
+ *
+ * Following this struct are |kernel_cmdline_len| bytes with the
+ * kernel command-line (UTF-8 encoded).
+ */
+typedef struct AvbKernelCmdlineDescriptor {
+  AvbDescriptor parent_descriptor;
+  uint32_t flags;
+  uint32_t kernel_cmdline_length;
+} AVB_ATTR_PACKED AvbKernelCmdlineDescriptor;
+
+/* Copies |src| to |dest| and validates, byte-swapping fields in the
+ * process if needed. Returns true if valid, false if invalid.
+ *
+ * Data following the struct is not validated nor copied.
+ */
+bool avb_kernel_cmdline_descriptor_validate_and_byteswap(
+    const AvbKernelCmdlineDescriptor* src,
+    AvbKernelCmdlineDescriptor* dest) AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_KERNEL_CMDLINE_DESCRIPTOR_H_ */
diff --git a/include/android_avb/avb_ops.h b/include/android_avb/avb_ops.h
new file mode 100644
index 0000000000..0900b0e0be
--- /dev/null
+++ b/include/android_avb/avb_ops.h
@@ -0,0 +1,231 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_OPS_H_
+#define AVB_OPS_H_
+
+#include <android_avb/avb_sysdeps.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Return codes used for I/O operations.
+ *
+ * AVB_IO_RESULT_OK is returned if the requested operation was
+ * successful.
+ *
+ * AVB_IO_RESULT_ERROR_IO is returned if the underlying hardware (disk
+ * or other subsystem) encountered an I/O error.
+ *
+ * AVB_IO_RESULT_ERROR_OOM is returned if unable to allocate memory.
+ *
+ * AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION is returned if the requested
+ * partition does not exist.
+ *
+ * AVB_IO_RESULT_ERROR_RANGE_OUTSIDE_PARTITION is returned if the
+ * range of bytes requested to be read or written is outside the range
+ * of the partition.
+ */
+typedef enum {
+	AVB_IO_RESULT_OK,
+	AVB_IO_RESULT_ERROR_OOM,
+	AVB_IO_RESULT_ERROR_IO,
+	AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION,
+	AVB_IO_RESULT_ERROR_RANGE_OUTSIDE_PARTITION
+} AvbIOResult;
+
+struct AvbOps;
+typedef struct AvbOps AvbOps;
+
+/* Forward-declaration of operations in libavb_ab. */
+struct AvbABOps;
+
+/* Forward-declaration of operations in libavb_atx. */
+struct AvbAtxOps;
+
+/* High-level operations/functions/methods that are platform
+ * dependent.
+ *
+ * Operations may be added in the future so when implementing it
+ * always make sure to zero out sizeof(AvbOps) bytes of the struct to
+ * ensure that unimplemented operations are set to NULL.
+ */
+struct AvbOps {
+	/* This pointer can be used by the application/bootloader using
+	 * libavb and is typically used in each operation to get a pointer
+	 * to platform-specific resources. It cannot be used by libraries.
+	 */
+	void* user_data;
+
+	/* If libavb_ab is used, this should point to the
+	 * AvbABOps. Otherwise it must be set to NULL.
+	 */
+	struct AvbABOps* ab_ops;
+
+	/* If libavb_atx is used, this should point to the
+	 * AvbAtxOps. Otherwise it must be set to NULL.
+	 */
+	struct AvbAtxOps* atx_ops;
+
+	/* Reads |num_bytes| from offset |offset| from partition with name
+	 * |partition| (NUL-terminated UTF-8 string). If |offset| is
+	 * negative, its absolute value should be interpreted as the number
+	 * of bytes from the end of the partition.
+	 *
+	 * This function returns AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION if
+	 * there is no partition with the given name,
+	 * AVB_IO_RESULT_ERROR_RANGE_OUTSIDE_PARTITION if the requested
+	 * |offset| is outside the partition, and AVB_IO_RESULT_ERROR_IO if
+	 * there was an I/O error from the underlying I/O subsystem.  If the
+	 * operation succeeds as requested AVB_IO_RESULT_OK is returned and
+	 * the data is available in |buffer|.
+	 *
+	 * The only time partial I/O may occur is if reading beyond the end
+	 * of the partition. In this case the value returned in
+	 * |out_num_read| may be smaller than |num_bytes|.
+	 */
+	AvbIOResult (*read_from_partition)(AvbOps* ops,
+                                       const char* partition,
+                                       int64_t offset,
+                                       size_t num_bytes,
+                                       void* buffer,
+                                       size_t* out_num_read);
+
+	/* Writes |num_bytes| from |bffer| at offset |offset| to partition
+	 * with name |partition| (NUL-terminated UTF-8 string). If |offset|
+	 * is negative, its absolute value should be interpreted as the
+	 * number of bytes from the end of the partition.
+	 *
+	 * This function returns AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION if
+	 * there is no partition with the given name,
+	 * AVB_IO_RESULT_ERROR_RANGE_OUTSIDE_PARTITION if the requested
+	 * byterange goes outside the partition, and AVB_IO_RESULT_ERROR_IO
+	 * if there was an I/O error from the underlying I/O subsystem.  If
+	 * the operation succeeds as requested AVB_IO_RESULT_OK is
+	 * returned.
+	 *
+	 * This function never does any partial I/O, it either transfers all
+	 * of the requested bytes or returns an error.
+	 */
+	AvbIOResult (*write_to_partition)(AvbOps* ops,
+                                      const char* partition,
+                                      int64_t offset,
+                                      size_t num_bytes,
+                                      const void* buffer);
+
+	/* Checks if the given public key used to sign the 'vbmeta'
+	 * partition is trusted. Boot loaders typically compare this with
+	 * embedded key material generated with 'avbtool
+	 * extract_public_key'.
+	 *
+	 * The public key is in the array pointed to by |public_key_data|
+	 * and is of |public_key_length| bytes.
+	 *
+	 * If there is no public key metadata (set with the avbtool option
+	 * --public_key_metadata) then |public_key_metadata| will be set to
+	 * NULL. Otherwise this field points to the data which is
+	 * |public_key_metadata_length| bytes long.
+	 *
+	 * If AVB_IO_RESULT_OK is returned then |out_is_trusted| is set -
+	 * true if trusted or false if untrusted.
+	 */
+	AvbIOResult (*validate_vbmeta_public_key)(AvbOps* ops,
+                                            	  const uint8_t* public_key_data,
+                                            	  size_t public_key_length,
+                                            	  const uint8_t* public_key_metadata,
+                                            	  size_t public_key_metadata_length,
+                                            	  bool* out_is_trusted);
+
+	/* Gets the rollback index corresponding to the location given by
+	 * |rollback_index_location|. The value is returned in
+	 * |out_rollback_index|. Returns AVB_IO_RESULT_OK if the rollback
+	 * index was retrieved, otherwise an error code.
+	 *
+	 * A device may have a limited amount of rollback index locations (say,
+	 * one or four) so may error out if |rollback_index_location| exceeds
+	 * this number.
+	 */
+	AvbIOResult (*read_rollback_index)(AvbOps* ops,
+                                     	   size_t rollback_index_location,
+                                     	   uint64_t* out_rollback_index);
+
+	/* Sets the rollback index corresponding to the location given by
+	 * |rollback_index_location| to |rollback_index|. Returns
+	 * AVB_IO_RESULT_OK if the rollback index was set, otherwise an
+	 * error code.
+	 *
+	 * A device may have a limited amount of rollback index locations (say,
+	 * one or four) so may error out if |rollback_index_location| exceeds
+	 * this number.
+	 */
+	AvbIOResult (*write_rollback_index)(AvbOps* ops,
+                                      	    size_t rollback_index_location,
+                                      	    uint64_t rollback_index);
+
+	/* Gets whether the device is unlocked. The value is returned in
+	 * |out_is_unlocked| (true if unlocked, false otherwise). Returns
+	 * AVB_IO_RESULT_OK if the state was retrieved, otherwise an error
+	 * code.
+	 */
+	AvbIOResult (*read_is_device_unlocked)(AvbOps* ops, bool* out_is_unlocked);
+	AvbIOResult (*write_is_device_unlocked)(AvbOps* ops, bool* out_is_unlocked);
+
+	/* Gets the unique partition GUID for a partition with name in
+	 * |partition| (NUL-terminated UTF-8 string). The GUID is copied as
+	 * a string into |guid_buf| of size |guid_buf_size| and will be NUL
+	 * terminated. The string must be lower-case and properly
+	 * hyphenated. For example:
+	 *
+	 *  527c1c6d-6361-4593-8842-3c78fcd39219
+	 *
+	 * Returns AVB_IO_RESULT_OK on success, otherwise an error code.
+	 */
+	 AvbIOResult (*get_unique_guid_for_partition)(AvbOps* ops,
+                                                      const char* partition,
+                                                      char* guid_buf,
+                                                      size_t guid_buf_size);
+
+	/* Gets the size of a partition with the name in |partition|
+	 * (NUL-terminated UTF-8 string). Returns the value in
+	 * |out_size_num_bytes|.
+	 *
+	 * Returns AVB_IO_RESULT_OK on success, otherwise an error code.
+	 */
+	AvbIOResult (*get_size_of_partition)(AvbOps* ops,
+                                       	     const char* partition,
+                                             uint64_t* out_size_num_bytes);
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_OPS_H_ */
diff --git a/include/android_avb/avb_property_descriptor.h b/include/android_avb/avb_property_descriptor.h
new file mode 100644
index 0000000000..08409892a9
--- /dev/null
+++ b/include/android_avb/avb_property_descriptor.h
@@ -0,0 +1,109 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_PROPERTY_DESCRIPTOR_H_
+#define AVB_PROPERTY_DESCRIPTOR_H_
+
+#include <android_avb/avb_descriptor.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* A descriptor for properties (free-form key/value pairs).
+ *
+ * Following this struct are |key_num_bytes| bytes of key data,
+ * followed by a NUL byte, then |value_num_bytes| bytes of value data,
+ * followed by a NUL byte and then enough padding to make the combined
+ * size a multiple of 8.
+ */
+typedef struct AvbPropertyDescriptor {
+  AvbDescriptor parent_descriptor;
+  uint64_t key_num_bytes;
+  uint64_t value_num_bytes;
+} AVB_ATTR_PACKED AvbPropertyDescriptor;
+
+/* Copies |src| to |dest| and validates, byte-swapping fields in the
+ * process if needed. Returns true if valid, false if invalid.
+ *
+ * Data following the struct is not validated nor copied.
+ */
+bool avb_property_descriptor_validate_and_byteswap(
+    const AvbPropertyDescriptor* src,
+    AvbPropertyDescriptor* dest) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Convenience function for looking up the value for a property with
+ * name |key| in a vbmeta image. If |key_size| is 0, |key| must be
+ * NUL-terminated.
+ *
+ * The |image_data| parameter must be a pointer to a vbmeta image of
+ * size |image_size|.
+ *
+ * This function returns a pointer to the value inside the passed-in
+ * image or NULL if not found. Note that the value is always
+ * guaranteed to be followed by a NUL byte.
+ *
+ * If the value was found and |out_value_size| is not NULL, the size
+ * of the value is returned there.
+ *
+ * This function is O(n) in number of descriptors so if you need to
+ * look up a lot of values, you may want to build a more efficient
+ * lookup-table by manually walking all descriptors using
+ * avb_descriptor_foreach().
+ *
+ * Before using this function, you MUST verify |image_data| with
+ * avb_vbmeta_image_verify() and reject it unless it's signed by a
+ * known good public key.
+ */
+const char* avb_property_lookup(const uint8_t* image_data,
+                                size_t image_size,
+                                const char* key,
+                                size_t key_size,
+                                size_t* out_value_size)
+    AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Like avb_property_lookup() but parses the intial portions of the
+ * value as an unsigned 64-bit integer. Both decimal and hexadecimal
+ * representations (e.g. "0x2a") are supported. Returns false on
+ * failure and true on success. On success, the parsed value is
+ * returned in |out_value|.
+ */
+bool avb_property_lookup_uint64(const uint8_t* image_data,
+                                size_t image_size,
+                                const char* key,
+                                size_t key_size,
+                                uint64_t* out_value)
+    AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_PROPERTY_DESCRIPTOR_H_ */
diff --git a/include/android_avb/avb_rsa.h b/include/android_avb/avb_rsa.h
new file mode 100644
index 0000000000..728c215a31
--- /dev/null
+++ b/include/android_avb/avb_rsa.h
@@ -0,0 +1,75 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/* Copyright (c) 2011 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#ifdef AVB_INSIDE_LIBAVB_H
+#error "You can't include avb_rsa.h in the public header libavb.h."
+#endif
+
+/*
+#ifndef AVB_COMPILATION
+#error "Never include this file, it may only be used from internal avb code."
+#endif
+*/
+
+#ifndef AVB_RSA_H_
+#define AVB_RSA_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <android_avb/avb_crypto.h>
+#include <android_avb/avb_sysdeps.h>
+
+/* Using the key given by |key|, verify a RSA signature |sig| of
+ * length |sig_num_bytes| against an expected |hash| of length
+ * |hash_num_bytes|. The padding to expect must be passed in using
+ * |padding| of length |padding_num_bytes|.
+ *
+ * The data in |key| must match the format defined in
+ * |AvbRSAPublicKeyHeader|, including the two large numbers
+ * following. The |key_num_bytes| must be the size of the entire
+ * serialized key.
+ *
+ * Returns false if verification fails, true otherwise.
+ */
+bool avb_rsa_verify(const uint8_t* key,
+                    size_t key_num_bytes,
+                    const uint8_t* sig,
+                    size_t sig_num_bytes,
+                    const uint8_t* hash,
+                    size_t hash_num_bytes,
+                    const uint8_t* padding,
+                    size_t padding_num_bytes) AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_RSA_H_ */
diff --git a/include/android_avb/avb_sha.h b/include/android_avb/avb_sha.h
new file mode 100644
index 0000000000..94ac339a2d
--- /dev/null
+++ b/include/android_avb/avb_sha.h
@@ -0,0 +1,92 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#ifdef AVB_INSIDE_LIBAVB_H
+#error "You can't include avb_sha.h in the public header libavb.h."
+#endif
+
+/*
+#ifndef AVB_COMPILATION
+#error "Never include this file, it may only be used from internal avb code."
+#endif
+*/
+
+#ifndef AVB_SHA_H_
+#define AVB_SHA_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <android_avb/avb_crypto.h>
+#include <android_avb/avb_sysdeps.h>
+
+/* Block size in bytes of a SHA-256 digest. */
+#define AVB_SHA256_BLOCK_SIZE 64
+
+
+/* Block size in bytes of a SHA-512 digest. */
+#define AVB_SHA512_BLOCK_SIZE 128
+
+/* Data structure used for SHA-256. */
+typedef struct {
+  uint32_t h[8];
+  uint32_t tot_len;
+  uint32_t len;
+  uint8_t block[2 * AVB_SHA256_BLOCK_SIZE];
+  uint8_t buf[AVB_SHA256_DIGEST_SIZE]; /* Used for storing the final digest. */
+} AvbSHA256Ctx;
+
+/* Data structure used for SHA-512. */
+typedef struct {
+  uint64_t h[8];
+  uint32_t tot_len;
+  uint32_t len;
+  uint8_t block[2 * AVB_SHA512_BLOCK_SIZE];
+  uint8_t buf[AVB_SHA512_DIGEST_SIZE]; /* Used for storing the final digest. */
+} AvbSHA512Ctx;
+
+/* Initializes the SHA-256 context. */
+void avb_sha256_init(AvbSHA256Ctx* ctx);
+
+/* Updates the SHA-256 context with |len| bytes from |data|. */
+void avb_sha256_update(AvbSHA256Ctx* ctx, const uint8_t* data, uint32_t len);
+
+/* Returns the SHA-256 digest. */
+uint8_t* avb_sha256_final(AvbSHA256Ctx* ctx) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Initializes the SHA-512 context. */
+void avb_sha512_init(AvbSHA512Ctx* ctx);
+
+/* Updates the SHA-512 context with |len| bytes from |data|. */
+void avb_sha512_update(AvbSHA512Ctx* ctx, const uint8_t* data, uint32_t len);
+
+/* Returns the SHA-512 digest. */
+uint8_t* avb_sha512_final(AvbSHA512Ctx* ctx) AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_SHA_H_ */
diff --git a/include/android_avb/avb_slot_verify.h b/include/android_avb/avb_slot_verify.h
new file mode 100644
index 0000000000..a34a872a6f
--- /dev/null
+++ b/include/android_avb/avb_slot_verify.h
@@ -0,0 +1,341 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_SLOT_VERIFY_H_
+#define AVB_SLOT_VERIFY_H_
+
+#include <android_avb/avb_ops.h>
+#include <android_avb/avb_vbmeta_image.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Return codes used in avb_slot_verify(), see that function for
+ * documentation for each field.
+ *
+ * Use avb_slot_verify_result_to_string() to get a textual
+ * representation usable for error/debug output.
+ */
+typedef enum {
+  AVB_SLOT_VERIFY_RESULT_OK,
+  AVB_SLOT_VERIFY_RESULT_ERROR_OOM,
+  AVB_SLOT_VERIFY_RESULT_ERROR_IO,
+  AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION,
+  AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX,
+  AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED,
+  AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA,
+  AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION,
+  AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT
+} AvbSlotVerifyResult;
+
+/* Various error handling modes for when verification fails using a
+ * hashtree at runtime inside the HLOS.
+ *
+ * AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE means that the OS
+ * will invalidate the current slot and restart.
+ *
+ * AVB_HASHTREE_ERROR_MODE_RESTART means that the OS will restart.
+ *
+ * AVB_HASHTREE_ERROR_MODE_EIO means that an EIO error will be
+ * returned to applications.
+ *
+ * AVB_HASHTREE_ERROR_MODE_LOGGING means that errors will be logged
+ * and corrupt data may be returned to applications. This mode should
+ * be used ONLY for diagnostics and debugging. It cannot be used
+ * unless AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR is also
+ * used.
+ */
+typedef enum {
+  AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE,
+  AVB_HASHTREE_ERROR_MODE_RESTART,
+  AVB_HASHTREE_ERROR_MODE_EIO,
+  AVB_HASHTREE_ERROR_MODE_LOGGING
+} AvbHashtreeErrorMode;
+
+/* Flags that influence how avb_slot_verify() works.
+ *
+ * If AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR is NOT set then
+ * avb_slot_verify() will bail out as soon as an error is encountered
+ * and |out_data| is set only if AVB_SLOT_VERIFY_RESULT_OK is
+ * returned.
+ *
+ * Otherwise if AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR is set
+ * avb_slot_verify() will continue verification efforts and |out_data|
+ * is also set if AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED,
+ * AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION, or
+ * AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX is returned. It is
+ * undefined which error is returned if more than one distinct error
+ * is encountered. It is guaranteed that AVB_SLOT_VERIFY_RESULT_OK is
+ * returned if, and only if, there are no errors. This mode is needed
+ * to boot valid but unverified slots when the device is unlocked.
+ *
+ * Also, if AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR is set the
+ * contents loaded from |requested_partition| will be the contents of
+ * the entire partition instead of just the size specified in the hash
+ * descriptor.
+ */
+typedef enum {
+  AVB_SLOT_VERIFY_FLAGS_NONE = 0,
+  AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR = (1 << 0)
+} AvbSlotVerifyFlags;
+
+/* Get a textual representation of |result|. */
+const char* avb_slot_verify_result_to_string(AvbSlotVerifyResult result);
+
+/* Maximum number of rollback index locations supported. */
+#define AVB_MAX_NUMBER_OF_ROLLBACK_INDEX_LOCATIONS 32
+
+/* AvbPartitionData contains data loaded from partitions when using
+ * avb_slot_verify(). The |partition_name| field contains the name of
+ * the partition (without A/B suffix), |data| points to the loaded
+ * data which is |data_size| bytes long.
+ *
+ * Note that this is strictly less than the partition size - it's only
+ * the image stored there, not the entire partition nor any of the
+ * metadata.
+ */
+typedef struct {
+  char* partition_name;
+  uint8_t* data;
+  size_t data_size;
+} AvbPartitionData;
+
+/* AvbVBMetaData contains a vbmeta struct loaded from a partition when
+ * using avb_slot_verify(). The |partition_name| field contains the
+ * name of the partition (without A/B suffix), |vbmeta_data| points to
+ * the loaded data which is |vbmeta_size| bytes long.
+ *
+ * The |verify_result| field contains the result of
+ * avb_vbmeta_image_verify() on the data. This is guaranteed to be
+ * AVB_VBMETA_VERIFY_RESULT_OK for all vbmeta images if
+ * avb_slot_verify() returns AVB_SLOT_VERIFY_RESULT_OK.
+ *
+ * You can use avb_descriptor_get_all(), avb_descriptor_foreach(), and
+ * avb_vbmeta_image_header_to_host_byte_order() with this data.
+ */
+typedef struct {
+  char* partition_name;
+  uint8_t* vbmeta_data;
+  size_t vbmeta_size;
+  AvbVBMetaVerifyResult verify_result;
+} AvbVBMetaData;
+
+/* AvbSlotVerifyData contains data needed to boot a particular slot
+ * and is returned by avb_slot_verify() if partitions in a slot are
+ * successfully verified.
+ *
+ * All data pointed to by this struct - including data in each item in
+ * the |partitions| array - will be freed when the
+ * avb_slot_verify_data_free() function is called.
+ *
+ * The |ab_suffix| field is the copy of the of |ab_suffix| field
+ * passed to avb_slot_verify(). It is the A/B suffix of the slot. This
+ * value includes the leading underscore - typical values are "" (if
+ * no slots are in use), "_a" (for the first slot), and "_b" (for the
+ * second slot).
+ *
+ * The VBMeta images that were checked are available in the
+ * |vbmeta_images| field. The field |num_vbmeta_images| contains the
+ * number of elements in this array. The first element -
+ * vbmeta_images[0] - is guaranteed to be from the partition with the
+ * top-level vbmeta struct. This is usually the "vbmeta" partition in
+ * the requested slot but if there is no "vbmeta" partition it can
+ * also be the "boot" partition.
+ *
+ * The partitions loaded and verified from from the slot are
+ * accessible in the |loaded_partitions| array. The field
+ * |num_loaded_partitions| contains the number of elements in this
+ * array. The order of partitions in this array may not necessarily be
+ * the same order as in the passed-in |requested_partitions| array.
+ *
+ * Rollback indexes for the verified slot are stored in the
+ * |rollback_indexes| field. Note that avb_slot_verify() will NEVER
+ * modify stored_rollback_index[n] locations e.g. it will never use
+ * the write_rollback_index() AvbOps operation. Instead it is the job
+ * of the caller of avb_slot_verify() to do this based on e.g. A/B
+ * policy and other factors. See libavb_ab/avb_ab_flow.c for an
+ * example of how to do this.
+ *
+ * The |cmdline| field is a NUL-terminated string in UTF-8 resulting
+ * from concatenating all |AvbKernelCmdlineDescriptor| and then
+ * performing proper substitution of the variables
+ * $(ANDROID_SYSTEM_PARTUUID), $(ANDROID_BOOT_PARTUUID), and
+ * $(ANDROID_VBMETA_PARTUUID) using the
+ * get_unique_guid_for_partition() operation in |AvbOps|. Additionally
+ * $(ANDROID_VERITY_MODE) will be replaced with the proper dm-verity
+ * option depending on the value of |hashtree_error_mode|.
+ *
+ * Additionally, the |cmdline| field will have the following kernel
+ * command-line options set:
+ *
+ *   androidboot.veritymode: This is set to 'disabled' if the
+ *   AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED flag is set in top-level
+ *   vbmeta struct. Otherwise it is set to 'enforcing' if the
+ *   passed-in hashtree error mode is AVB_HASHTREE_ERROR_MODE_RESTART
+ *   or AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE, 'eio' if it's
+ *   set to AVB_HASHTREE_ERROR_MODE_EIO, and 'logging' if it's set to
+ *   AVB_HASHTREE_ERROR_MODE_LOGGING.
+ *
+ *   androidboot.vbmeta.invalidate_on_error: This is set to 'yes' only
+ *   if hashtree validation isn't disabled and the passed-in hashtree
+ *   error mode is AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE.
+ *
+ *   androidboot.vbmeta.device_state: set to "locked" or "unlocked"
+ *   depending on the result of the result of AvbOps's
+ *   read_is_unlocked() function.
+ *
+ *   androidboot.vbmeta.{hash_alg, size, digest}: Will be set to
+ *   the digest of all images in |vbmeta_images|.
+ *
+ *   androidboot.vbmeta.device: This is set to the value
+ *   PARTUUID=$(ANDROID_VBMETA_PARTUUID) before substitution so it
+ *   will end up pointing to the vbmeta partition for the verified
+ *   slot. If there is no vbmeta partition it will point to the boot
+ *   partition of the verified slot.
+ *
+ *   androidboot.vbmeta.avb_version: This is set to the decimal value
+ *   of AVB_VERSION_MAJOR followed by a dot followed by the decimal
+ *   value of AVB_VERSION_MINOR, for example "1.0" or "1.4". This
+ *   version number represents the vbmeta file format version
+ *   supported by libavb copy used in the boot loader. This is not
+ *   necessarily the same version number of the on-disk metadata for
+ *   the slot that was verified.
+ *
+ * Note that neither androidboot.slot_suffix nor androidboot.slot are
+ * set in the |cmdline| field in |AvbSlotVerifyData| - you will have
+ * to pass these yourself.
+ *
+ * Also note that androidboot.veritymode is set by libavb and since
+ * AVB only supports 'enforcing' and 'disabled' values, the boot
+ * loader is relieved of managing any state related to dm-verity or
+ * setting this cmdline parameter.
+ *
+ * This struct may grow in the future without it being considered an
+ * ABI break.
+ */
+typedef struct {
+  char* ab_suffix;
+  AvbVBMetaData* vbmeta_images;
+  size_t num_vbmeta_images;
+  AvbPartitionData* loaded_partitions;
+  size_t num_loaded_partitions;
+  char* cmdline;
+  uint64_t rollback_indexes[AVB_MAX_NUMBER_OF_ROLLBACK_INDEX_LOCATIONS];
+} AvbSlotVerifyData;
+
+/* Frees a |AvbSlotVerifyData| including all data it points to. */
+void avb_slot_verify_data_free(AvbSlotVerifyData* data);
+
+/* Performs a full verification of the slot identified by |ab_suffix|
+ * and load and verify the contents of the partitions whose name is in
+ * the NULL-terminated string array |requested_partitions| (each
+ * partition must use hash verification). If not using A/B, pass an
+ * empty string (e.g. "", not NULL) for |ab_suffix|. This parameter
+ * must include the leading underscore, for example "_a" should be
+ * used to refer to the first slot.
+ *
+ * Typically the |requested_partitions| array only contains a single
+ * item for the boot partition, 'boot'.
+ *
+ * Verification includes loading and verifying data from the 'vbmeta',
+ * the requested hash partitions, and possibly other partitions (with
+ * |ab_suffix| appended), inspecting rollback indexes, and checking if
+ * the public key used to sign the data is acceptable. The functions
+ * in |ops| will be used to do this.
+ *
+ * If |out_data| is not NULL, it will be set to a newly allocated
+ * |AvbSlotVerifyData| struct containing all the data needed to
+ * actually boot the slot. This data structure should be freed with
+ * avb_slot_verify_data_free() when you are done with it. See below
+ * for when this is returned.
+ *
+ * The |flags| parameter is used to influence the semantics of
+ * avb_slot_verify() - for example the
+ * AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR flag can be used to
+ * ignore verification errors which is something needed in the
+ * UNLOCKED state. See the AvbSlotVerifyFlags enumeration for details.
+ *
+ * The |hashtree_error_mode| parameter should be set to the desired
+ * error handling mode when hashtree validation fails inside the
+ * HLOS. This value isn't used by libavb per se - it is forwarded to
+ * the HLOS through the androidboot.veritymode and
+ * androidboot.vbmeta.invalidate_on_error cmdline parameters. See the
+ * AvbHashtreeErrorMode enumeration for details.
+ *
+ * Also note that |out_data| is never set if
+ * AVB_SLOT_VERIFY_RESULT_ERROR_OOM, AVB_SLOT_VERIFY_RESULT_ERROR_IO,
+ * or AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA is returned.
+ *
+ * AVB_SLOT_VERIFY_RESULT_OK is returned if everything is verified
+ * correctly and all public keys are accepted.
+ *
+ * AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED is returned if
+ * everything is verified correctly out but one or more public keys
+ * are not accepted. This includes the case where integrity data is
+ * not signed.
+ *
+ * AVB_SLOT_VERIFY_RESULT_ERROR_OOM is returned if unable to
+ * allocate memory.
+ *
+ * AVB_SLOT_VERIFY_RESULT_ERROR_IO is returned if an I/O error
+ * occurred while trying to load data or get a rollback index.
+ *
+ * AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION is returned if the data
+ * did not verify, e.g. the digest didn't match or signature checks
+ * failed.
+ *
+ * AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX is returned if a
+ * rollback index was less than its stored value.
+ *
+ * AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA is returned if some
+ * of the metadata is invalid or inconsistent.
+ *
+ * AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION is returned if
+ * some of the metadata requires a newer version of libavb than what
+ * is in use.
+ *
+ * AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT is returned if the
+ * caller passed invalid parameters, for example trying to use
+ * AVB_HASHTREE_ERROR_MODE_LOGGING without
+ * AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR.
+ */
+AvbSlotVerifyResult avb_slot_verify(AvbOps* ops,
+                                    const char* const* requested_partitions,
+                                    const char* ab_suffix,
+                                    AvbSlotVerifyFlags flags,
+                                    AvbHashtreeErrorMode hashtree_error_mode,
+                                    AvbSlotVerifyData** out_data);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_SLOT_VERIFY_H_ */
diff --git a/include/android_avb/avb_sysdeps.h b/include/android_avb/avb_sysdeps.h
new file mode 100644
index 0000000000..df7f1d2028
--- /dev/null
+++ b/include/android_avb/avb_sysdeps.h
@@ -0,0 +1,126 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_SYSDEPS_H_
+#define AVB_SYSDEPS_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Change these includes to match your platform to bring in the
+ * equivalent types available in a normal C runtime. At least things
+ * like uint8_t, uint64_t, and bool (with |false|, |true| keywords)
+ * must be present.
+ */
+#include <inttypes.h>
+#include <stdbool.h>
+#include <stddef.h>
+#ifdef CONFIG_USE_STDINT
+/* Provided by gcc. */
+#include <stdint.h>
+#else
+/* Type for `void *' pointers. */
+typedef unsigned long int uintptr_t;
+#endif
+
+/* If you don't have gcc or clang, these attribute macros may need to
+ * be adjusted.
+ */
+#define AVB_ATTR_WARN_UNUSED_RESULT __attribute__((warn_unused_result))
+#define AVB_ATTR_PACKED __attribute__((packed))
+#define AVB_ATTR_NO_RETURN __attribute__((noreturn))
+#define AVB_ATTR_SENTINEL __attribute__((__sentinel__))
+
+/* Size in bytes used for alignment. */
+#ifdef __LP64__
+#define AVB_ALIGNMENT_SIZE 8
+#else
+#define AVB_ALIGNMENT_SIZE 4
+#endif
+
+/* Compare |n| bytes in |src1| and |src2|.
+ *
+ * Returns an integer less than, equal to, or greater than zero if the
+ * first |n| bytes of |src1| is found, respectively, to be less than,
+ * to match, or be greater than the first |n| bytes of |src2|. */
+int avb_memcmp(const void* src1,
+               const void* src2,
+               size_t n) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Compare two strings.
+ *
+ * Return an integer less than, equal to, or greater than zero if |s1|
+ * is found, respectively, to be less than, to match, or be greater
+ * than |s2|.
+ */
+int avb_strcmp(const char* s1, const char* s2);
+
+/* Copy |n| bytes from |src| to |dest|. */
+void* avb_memcpy(void* dest, const void* src, size_t n);
+
+/* Set |n| bytes starting at |s| to |c|.  Returns |dest|. */
+void* avb_memset(void* dest, const int c, size_t n);
+
+/* Prints out a message. The string passed must be a NUL-terminated
+ * UTF-8 string.
+ */
+void avb_print(const char* message);
+
+/* Prints out a vector of strings. Each argument must point to a
+ * NUL-terminated UTF-8 string and NULL should be the last argument.
+ */
+void avb_printv(const char* message, ...) AVB_ATTR_SENTINEL;
+
+/* Aborts the program or reboots the device. */
+void avb_abort(void) AVB_ATTR_NO_RETURN;
+
+/* Allocates |size| bytes. Returns NULL if no memory is available,
+ * otherwise a pointer to the allocated memory.
+ *
+ * The memory is not initialized.
+ *
+ * The pointer returned is guaranteed to be word-aligned.
+ *
+ * The memory should be freed with avb_free() when you are done with it.
+ */
+void* avb_malloc_(size_t size) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Frees memory previously allocated with avb_malloc(). */
+void avb_free(void* ptr);
+
+/* Returns the lenght of |str|, excluding the terminating NUL-byte. */
+size_t avb_strlen(const char* str) AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_SYSDEPS_H_ */
diff --git a/include/android_avb/avb_util.h b/include/android_avb/avb_util.h
new file mode 100644
index 0000000000..6c04a880f0
--- /dev/null
+++ b/include/android_avb/avb_util.h
@@ -0,0 +1,273 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_UTIL_H_
+#define AVB_UTIL_H_
+
+#include <android_avb/avb_sysdeps.h>
+
+/* Converts a 32-bit unsigned integer from big-endian to host byte order. */
+uint32_t avb_be32toh(uint32_t in) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Converts a 64-bit unsigned integer from big-endian to host byte order. */
+uint64_t avb_be64toh(uint64_t in) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Converts a 32-bit unsigned integer from host to big-endian byte order. */
+uint32_t avb_htobe32(uint32_t in) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Converts a 64-bit unsigned integer from host to big-endian byte order. */
+uint64_t avb_htobe64(uint64_t in) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Compare |n| bytes starting at |s1| with |s2| and return 0 if they
+ * match, 1 if they don't.  Returns 0 if |n|==0, since no bytes
+ * mismatched.
+ *
+ * Time taken to perform the comparison is only dependent on |n| and
+ * not on the relationship of the match between |s1| and |s2|.
+ *
+ * Note that unlike avb_memcmp(), this only indicates inequality, not
+ * whether |s1| is less than or greater than |s2|.
+ */
+int avb_safe_memcmp(const void* s1,
+                    const void* s2,
+                    size_t n) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Adds |value_to_add| to |value| with overflow protection.
+ *
+ * Returns false if the addition overflows, true otherwise. In either
+ * case, |value| is always modified.
+ */
+bool avb_safe_add_to(uint64_t* value,
+                     uint64_t value_to_add) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Adds |a| and |b| with overflow protection, returning the value in
+ * |out_result|.
+ *
+ * It's permissible to pass NULL for |out_result| if you just want to
+ * check that the addition would not overflow.
+ *
+ * Returns false if the addition overflows, true otherwise.
+ */
+bool avb_safe_add(uint64_t* out_result,
+                  uint64_t a,
+                  uint64_t b) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Checks if |num_bytes| data at |data| is a valid UTF-8
+ * string. Returns true if valid UTF-8, false otherwise.
+ */
+bool avb_validate_utf8(const uint8_t* data,
+                       size_t num_bytes) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Concatenates |str1| (of |str1_len| bytes) and |str2| (of |str2_len|
+ * bytes) and puts the result in |buf| which holds |buf_size|
+ * bytes. The result is also guaranteed to be NUL terminated. Fail if
+ * there is not enough room in |buf| for the resulting string plus
+ * terminating NUL byte.
+ *
+ * Returns true if the operation succeeds, false otherwise.
+ */
+bool avb_str_concat(char* buf,
+                    size_t buf_size,
+                    const char* str1,
+                    size_t str1_len,
+                    const char* str2,
+                    size_t str2_len);
+
+/* Like avb_malloc_() but prints a error using avb_error() if memory
+ * allocation fails.
+ */
+void* avb_malloc(size_t size) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Like avb_malloc() but sets the memory with zeroes. */
+void* avb_calloc(size_t size) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Duplicates a NUL-terminated string. Returns NULL on OOM. */
+char* avb_strdup(const char* str) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Duplicates a NULL-terminated array of NUL-terminated strings by
+ * concatenating them. The returned string will be
+ * NUL-terminated. Returns NULL on OOM.
+ */
+char* avb_strdupv(const char* str,
+                  ...) AVB_ATTR_WARN_UNUSED_RESULT AVB_ATTR_SENTINEL;
+
+/* Finds the first occurrence of |needle| in the string |haystack|
+ * where both strings are NUL-terminated strings. The terminating NUL
+ * bytes are not compared.
+ *
+ * Returns NULL if not found, otherwise points into |haystack| for the
+ * first occurrence of |needle|.
+ */
+const char* avb_strstr(const char* haystack,
+                       const char* needle) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Finds the first occurrence of |str| in the NULL-terminated string
+ * array |strings|. Each element in |strings| must be
+ * NUL-terminated. The string given by |str| need not be
+ * NUL-terminated but its size must be given in |str_size|.
+ *
+ * Returns NULL if not found, otherwise points into |strings| for the
+ * first occurrence of |str|.
+ */
+const char* avb_strv_find_str(const char* const* strings,
+                              const char* str,
+                              size_t str_size);
+
+/* Replaces all occurrences of |search| with |replace| in |str|.
+ *
+ * Returns a newly allocated string or NULL if out of memory.
+ */
+char* avb_replace(const char* str,
+                  const char* search,
+                  const char* replace) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Calculates the CRC-32 for data in |buf| of size |buf_size|. */
+uint32_t avb_crc32(const uint8_t* buf, size_t buf_size);
+
+/* Returns the basename of |str|. This is defined as the last path
+ * component, assuming the normal POSIX separator '/'. If there are no
+ * separators, returns |str|.
+ */
+const char *avb_basename(const char* str);
+
+
+
+#define AVB_STRINGIFY(x) #x
+#define AVB_TO_STRING(x) AVB_STRINGIFY(x)
+
+#ifdef AVB_ENABLE_DEBUG
+/* Aborts the program if |expr| is false.
+ *
+ * This has no effect unless AVB_ENABLE_DEBUG is defined.
+ */
+#define avb_assert(expr)                     \
+  do {                                       \
+    if (!(expr)) {                           \
+      avb_fatal("assert fail: " #expr "\n"); \
+    }                                        \
+  } while (0)
+#else
+#define avb_assert(expr)
+#endif
+
+/* Aborts the program if reached.
+ *
+ * This has no effect unless AVB_ENABLE_DEBUG is defined.
+ */
+#ifdef AVB_ENABLE_DEBUG
+#define avb_assert_not_reached()         \
+  do {                                   \
+    avb_fatal("assert_not_reached()\n"); \
+  } while (0)
+#else
+#define avb_assert_not_reached()
+#endif
+
+/* Aborts the program if |addr| is not word-aligned.
+ *
+ * This has no effect unless AVB_ENABLE_DEBUG is defined.
+ */
+#define avb_assert_aligned(addr) \
+  avb_assert((((uintptr_t)addr) & (AVB_ALIGNMENT_SIZE - 1)) == 0)
+
+#ifdef AVB_ENABLE_DEBUG
+/* Print functions, used for diagnostics.
+ *
+ * These have no effect unless AVB_ENABLE_DEBUG is defined.
+ */
+#define avb_debug(message)              \
+  do {                                  \
+    avb_printv(avb_basename(__FILE__),  \
+               ":",                     \
+               AVB_TO_STRING(__LINE__), \
+               ": DEBUG: ",             \
+               message,                 \
+               NULL);                   \
+  } while (0)
+#define avb_debugv(message, ...)        \
+  do {                                  \
+    avb_printv(avb_basename(__FILE__),  \
+               ":",                     \
+               AVB_TO_STRING(__LINE__), \
+               ": DEBUG: ",             \
+               message,                 \
+               ##__VA_ARGS__);          \
+  } while (0)
+#else
+#define avb_debug(message)
+#define avb_debugv(message, ...)
+#endif
+
+/* Prints out a message. This is typically used if a runtime-error
+ * occurs.
+ */
+#define avb_error(message)              \
+  do {                                  \
+    avb_printv(avb_basename(__FILE__),  \
+               ":",                     \
+               AVB_TO_STRING(__LINE__), \
+               ": ERROR: ",             \
+               message,                 \
+               NULL);                   \
+  } while (0)
+#define avb_errorv(message, ...)        \
+  do {                                  \
+    avb_printv(avb_basename(__FILE__),  \
+               ":",                     \
+               AVB_TO_STRING(__LINE__), \
+               ": ERROR: ",             \
+               message,                 \
+               ##__VA_ARGS__);          \
+  } while (0)
+
+/* Prints out a message and calls avb_abort().
+ */
+#define avb_fatal(message)              \
+  do {                                  \
+    avb_printv(avb_basename(__FILE__),  \
+               ":",                     \
+               AVB_TO_STRING(__LINE__), \
+               ": FATAL: ",             \
+               message,                 \
+               NULL);                   \
+    avb_abort();                        \
+  } while (0)
+#define avb_fatalv(message, ...)        \
+  do {                                  \
+    avb_printv(avb_basename(__FILE__),  \
+               ":",                     \
+               AVB_TO_STRING(__LINE__), \
+               ": FATAL: ",             \
+               message,                 \
+               ##__VA_ARGS__);          \
+    avb_abort();                        \
+  } while (0)
+
+#endif /* AVB_UTIL_H_ */
diff --git a/include/android_avb/avb_vbmeta_image.h b/include/android_avb/avb_vbmeta_image.h
new file mode 100644
index 0000000000..ab78e0f4e8
--- /dev/null
+++ b/include/android_avb/avb_vbmeta_image.h
@@ -0,0 +1,293 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_VBMETA_IMAGE_H_
+#define AVB_VBMETA_IMAGE_H_
+
+#include <android_avb/avb_sysdeps.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <android_avb/avb_crypto.h>
+#include <android_avb/avb_descriptor.h>
+
+/* Size of the vbmeta image header. */
+#define AVB_VBMETA_IMAGE_HEADER_SIZE 256
+
+/* Magic for the vbmeta image header. */
+#define AVB_MAGIC "AVB0"
+#define AVB_MAGIC_LEN 4
+
+/* Maximum size of the release string including the terminating NUL byte. */
+#define AVB_RELEASE_STRING_SIZE 48
+
+/* Flags for the vbmeta image.
+ *
+ * AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED: If this flag is set,
+ * hashtree image verification will be disabled.
+ */
+typedef enum {
+  AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED = (1 << 0),
+  AVB_VBMETA_IMAGE_FLAGS_VERIFICATION_DISABLED = (1 << 1)
+} AvbVBMetaImageFlags;
+
+/* Binary format for header of the vbmeta image.
+ *
+ * The vbmeta image consists of three blocks:
+ *
+ *  +-----------------------------------------+
+ *  | Header data - fixed size                |
+ *  +-----------------------------------------+
+ *  | Authentication data - variable size     |
+ *  +-----------------------------------------+
+ *  | Auxiliary data - variable size          |
+ *  +-----------------------------------------+
+ *
+ * The "Header data" block is described by this struct and is always
+ * |AVB_VBMETA_IMAGE_HEADER_SIZE| bytes long.
+ *
+ * The "Authentication data" block is |authentication_data_block_size|
+ * bytes long and contains the hash and signature used to authenticate
+ * the vbmeta image. The type of the hash and signature is defined by
+ * the |algorithm_type| field.
+ *
+ * The "Auxiliary data" is |auxiliary_data_block_size| bytes long and
+ * contains the auxiliary data including the public key used to make
+ * the signature and descriptors.
+ *
+ * The public key is at offset |public_key_offset| with size
+ * |public_key_size| in this block. The size of the public key data is
+ * defined by the |algorithm_type| field. The format of the public key
+ * data is described in the |AvbRSAPublicKeyHeader| struct.
+ *
+ * The descriptors starts at |descriptors_offset| from the beginning
+ * of the "Auxiliary Data" block and take up |descriptors_size|
+ * bytes. Each descriptor is stored as a |AvbDescriptor| with tag and
+ * number of bytes following. The number of descriptors can be
+ * determined by walking this data until |descriptors_size| is
+ * exhausted.
+ *
+ * The size of each of the "Authentication data" and "Auxiliary data"
+ * blocks must be divisible by 64. This is to ensure proper alignment.
+ *
+ * Descriptors are free-form blocks stored in a part of the vbmeta
+ * image subject to the same integrity checks as the rest of the
+ * image. See the documentation for |AvbDescriptor| for well-known
+ * descriptors. See avb_descriptor_foreach() for a convenience
+ * function to iterate over descriptors.
+ *
+ * This struct is versioned, see the |required_libavb_version_major|
+ * and |required_libavb_version_minor| fields. This represents the
+ * minimum version of libavb required to verify the header and depends
+ * on the features (e.g. algorithms, descriptors) used. Note that this
+ * may be 1.0 even if generated by an avbtool from 1.4 but where no
+ * features introduced after 1.0 has been used. See the "Versioning
+ * and compatibility" section in the README.md file for more details.
+ *
+ * All fields are stored in network byte order when serialized. To
+ * generate a copy with fields swapped to native byte order, use the
+ * function avb_vbmeta_image_header_to_host_byte_order().
+ *
+ * Before reading and/or using any of this data, you MUST verify it
+ * using avb_vbmeta_image_verify() and reject it unless it's signed by
+ * a known good public key.
+ */
+typedef struct AvbVBMetaImageHeader {
+  /*   0: Four bytes equal to "AVB0" (AVB_MAGIC). */
+  uint8_t magic[AVB_MAGIC_LEN];
+
+  /*   4: The major version of libavb required for this header. */
+  uint32_t required_libavb_version_major;
+  /*   8: The minor version of libavb required for this header. */
+  uint32_t required_libavb_version_minor;
+
+  /*  12: The size of the signature block. */
+  uint64_t authentication_data_block_size;
+  /*  20: The size of the auxiliary data block. */
+  uint64_t auxiliary_data_block_size;
+
+  /*  28: The verification algorithm used, see |AvbAlgorithmType| enum. */
+  uint32_t algorithm_type;
+
+  /*  32: Offset into the "Authentication data" block of hash data. */
+  uint64_t hash_offset;
+  /*  40: Length of the hash data. */
+  uint64_t hash_size;
+
+  /*  48: Offset into the "Authentication data" block of signature data. */
+  uint64_t signature_offset;
+  /*  56: Length of the signature data. */
+  uint64_t signature_size;
+
+  /*  64: Offset into the "Auxiliary data" block of public key data. */
+  uint64_t public_key_offset;
+  /*  72: Length of the public key data. */
+  uint64_t public_key_size;
+
+  /*  80: Offset into the "Auxiliary data" block of public key metadata. */
+  uint64_t public_key_metadata_offset;
+  /*  88: Length of the public key metadata. Must be set to zero if there
+   *  is no public key metadata.
+   */
+  uint64_t public_key_metadata_size;
+
+  /*  96: Offset into the "Auxiliary data" block of descriptor data. */
+  uint64_t descriptors_offset;
+  /* 104: Length of descriptor data. */
+  uint64_t descriptors_size;
+
+  /* 112: The rollback index which can be used to prevent rollback to
+   *  older versions.
+   */
+  uint64_t rollback_index;
+
+  /* 120: Flags from the AvbVBMetaImageFlags enumeration. This must be
+   * set to zero if the vbmeta image is not a top-level image.
+   */
+  uint32_t flags;
+
+  /* 124: Reserved to ensure |release_string| start on a 16-byte
+   * boundary. Must be set to zeroes.
+   */
+  uint8_t reserved0[4];
+
+  /* 128: The release string from avbtool, e.g. "avbtool 1.0.0" or
+   * "avbtool 1.0.0 xyz_board Git-234abde89". Is guaranteed to be NUL
+   * terminated. Applications must not make assumptions about how this
+   * string is formatted.
+   */
+  uint8_t release_string[AVB_RELEASE_STRING_SIZE];
+
+  /* 176: Padding to ensure struct is size AVB_VBMETA_IMAGE_HEADER_SIZE
+   * bytes. This must be set to zeroes.
+   */
+  uint8_t reserved[80];
+} AVB_ATTR_PACKED AvbVBMetaImageHeader;
+
+/* Copies |src| to |dest|, byte-swapping fields in the process.
+ *
+ * Make sure you've verified |src| using avb_vbmeta_image_verify()
+ * before accessing the data and/or using this function.
+ */
+void avb_vbmeta_image_header_to_host_byte_order(const AvbVBMetaImageHeader* src,
+                                                AvbVBMetaImageHeader* dest);
+
+/* Return codes used in avb_vbmeta_image_verify().
+ *
+ * AVB_VBMETA_VERIFY_RESULT_OK is returned if the vbmeta image header
+ * is valid, the hash is correct and the signature is correct. Keep in
+ * mind that you still need to check that you know the public key used
+ * to sign the image, see avb_vbmeta_image_verify() for details.
+ *
+ * AVB_VBMETA_VERIFY_RESULT_OK_NOT_SIGNED is returned if the vbmeta
+ * image header is valid but there is no signature or hash.
+ *
+ * AVB_VBMETA_VERIFY_RESULT_INVALID_VBMETA_HEADER is returned if the
+ * header of the vbmeta image is invalid, for example, invalid magic
+ * or inconsistent data.
+ *
+ * AVB_VBMETA_VERIFY_RESULT_UNSUPPORTED_VERSION is returned if a) the
+ * vbmeta image requires a minimum version of libavb which exceeds the
+ * version of libavb used; or b) the vbmeta image major version
+ * differs from the major version of libavb in use.
+ *
+ * AVB_VBMETA_VERIFY_RESULT_HASH_MISMATCH is returned if the hash
+ * stored in the "Authentication data" block does not match the
+ * calculated hash.
+ *
+ * AVB_VBMETA_VERIFY_RESULT_SIGNATURE_MISMATCH is returned if the
+ * signature stored in the "Authentication data" block is invalid or
+ * doesn't match the public key stored in the vbmeta image.
+ */
+typedef enum {
+  AVB_VBMETA_VERIFY_RESULT_OK,
+  AVB_VBMETA_VERIFY_RESULT_OK_NOT_SIGNED,
+  AVB_VBMETA_VERIFY_RESULT_INVALID_VBMETA_HEADER,
+  AVB_VBMETA_VERIFY_RESULT_UNSUPPORTED_VERSION,
+  AVB_VBMETA_VERIFY_RESULT_HASH_MISMATCH,
+  AVB_VBMETA_VERIFY_RESULT_SIGNATURE_MISMATCH,
+} AvbVBMetaVerifyResult;
+
+/* Get a textual representation of |result|. */
+const char* avb_vbmeta_verify_result_to_string(AvbVBMetaVerifyResult result);
+
+/* Checks that vbmeta image at |data| of size |length| is a valid
+ * vbmeta image. The complete contents of the vbmeta image must be
+ * passed in. It's fine if |length| is bigger than the actual image,
+ * typically callers of this function will load the entire contents of
+ * the 'vbmeta_a' or 'vbmeta_b' partition and pass in its length (for
+ * example, 1 MiB).
+ *
+ * See the |AvbVBMetaImageHeader| struct for information about the
+ * three blocks (header, authentication, auxiliary) that make up a
+ * vbmeta image.
+ *
+ * If the function returns |AVB_VBMETA_VERIFY_RESULT_OK| and
+ * |out_public_key_data| is non-NULL, it will be set to point inside
+ * |data| for where the serialized public key data is stored and
+ * |out_public_key_length|, if non-NULL, will be set to the length of
+ * the public key data. If there is no public key in the metadata then
+ * |out_public_key_data| is set to NULL.
+ *
+ * See the |AvbVBMetaVerifyResult| enum for possible return values.
+ *
+ * VERY IMPORTANT:
+ *
+ *   1. Even if |AVB_VBMETA_VERIFY_RESULT_OK| is returned, you still
+ *      need to check that the public key embedded in the image
+ *      matches a known key! You can use 'avbtool extract_public_key'
+ *      to extract the key (at build time, then store it along your
+ *      code) and compare it to what is returned in
+ *      |out_public_key_data|.
+ *
+ *   2. You need to check the |rollback_index| field against a stored
+ *      value in NVRAM and reject the vbmeta image if the value in
+ *      NVRAM is bigger than |rollback_index|. You must also update
+ *      the value stored in NVRAM to the smallest value of
+ *      |rollback_index| field from boot images in all bootable and
+ *      authentic slots marked as GOOD.
+ *
+ * This is a low-level function to only verify the vbmeta data - you
+ * are likely looking for avb_slot_verify() instead for verifying
+ * integrity data for a whole set of partitions.
+ */
+AvbVBMetaVerifyResult avb_vbmeta_image_verify(
+    const uint8_t* data,
+    size_t length,
+    const uint8_t** out_public_key_data,
+    size_t* out_public_key_length) AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_VBMETA_IMAGE_H_ */
diff --git a/include/android_avb/avb_version.h b/include/android_avb/avb_version.h
new file mode 100644
index 0000000000..3479acc484
--- /dev/null
+++ b/include/android_avb/avb_version.h
@@ -0,0 +1,61 @@
+/*
+ * Copyright (C) 2017 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_VERSION_H_
+#define AVB_VERSION_H_
+
+#include <android_avb/avb_sysdeps.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* The version number of AVB - keep in sync with avbtool. */
+#define AVB_VERSION_MAJOR 1
+#define AVB_VERSION_MINOR 0
+#define AVB_VERSION_SUB 0
+
+/* Returns a NUL-terminated string for the libavb version in use.  The
+ * returned string usually looks like "%d.%d.%d". Applications must
+ * not make assumptions about the content of this string.
+ *
+ * Boot loaders should display this string in debug/diagnostics output
+ * to aid with debugging.
+ *
+ * This is similar to the string put in the |release_string| string
+ * field in the VBMeta struct by avbtool.
+ */
+const char* avb_version_string(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_VERSION_H_ */
diff --git a/include/android_avb/libavb.h b/include/android_avb/libavb.h
new file mode 100644
index 0000000000..596a8b7245
--- /dev/null
+++ b/include/android_avb/libavb.h
@@ -0,0 +1,50 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#ifndef LIBAVB_H_
+#define LIBAVB_H_
+
+/* The AVB_INSIDE_LIBAVB_H preprocessor symbol is used to enforce
+ * library users to include only this file. All public interfaces, and
+ * only public interfaces, must be included here.
+ */
+
+#define AVB_INSIDE_LIBAVB_H
+#include <android_avb/avb_chain_partition_descriptor.h>
+#include <android_avb/avb_crypto.h>
+#include <android_avb/avb_descriptor.h>
+#include <android_avb/avb_footer.h>
+#include <android_avb/avb_hash_descriptor.h>
+#include <android_avb/avb_hashtree_descriptor.h>
+#include <android_avb/avb_kernel_cmdline_descriptor.h>
+#include <android_avb/avb_ops.h>
+#include <android_avb/avb_property_descriptor.h>
+#include <android_avb/avb_slot_verify.h>
+#include <android_avb/avb_sysdeps.h>
+#include <android_avb/avb_util.h>
+#include <android_avb/avb_vbmeta_image.h>
+#include <android_avb/avb_version.h>
+#undef AVB_INSIDE_LIBAVB_H
+
+#endif /* LIBAVB_H_ */
diff --git a/lib/Kconfig b/lib/Kconfig
index 4554bb28ea..96f2b269ce 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -268,5 +268,6 @@ endmenu
 
 source lib/efi/Kconfig
 source lib/efi_loader/Kconfig
+source lib/avb/rk_libavb/Kconfig
 
 endmenu
diff --git a/lib/Makefile b/lib/Makefile
index 2eef1eb80e..f949f447dd 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -45,6 +45,8 @@ obj-$(CONFIG_BITREVERSE) += bitrev.o
 obj-y += list_sort.o
 endif
 
+obj-$(CONFIG_AVB_LIBAVB) += avb/rk_libavb/
+
 obj-$(CONFIG_RSA) += rsa/
 obj-$(CONFIG_SHA1) += sha1.o
 obj-$(CONFIG_SHA256) += sha256.o
diff --git a/lib/avb/rk_libavb/Kconfig b/lib/avb/rk_libavb/Kconfig
new file mode 100644
index 0000000000..c569909bdb
--- /dev/null
+++ b/lib/avb/rk_libavb/Kconfig
@@ -0,0 +1,6 @@
+config AVB_LIBAVB
+	bool "Support running U-Boot AVB"
+	help
+	  The new android bootloader need to startup
+	  with a/b and avb.This config can add the
+	  AVB functions to u-boot.
diff --git a/lib/avb/rk_libavb/Makefile b/lib/avb/rk_libavb/Makefile
new file mode 100644
index 0000000000..07ddb0cb9a
--- /dev/null
+++ b/lib/avb/rk_libavb/Makefile
@@ -0,0 +1,17 @@
+obj-y	+= avb_chain_partition_descriptor.o
+obj-y	+= avb_crc32.o
+obj-y	+= avb_crypto.o
+obj-y	+= avb_descriptor.o
+obj-y	+= avb_footer.o
+obj-y	+= avb_hash_descriptor.o
+obj-y	+= avb_hashtree_descriptor.o
+obj-y	+= avb_kernel_cmdline_descriptor.o
+obj-y	+= avb_property_descriptor.o
+obj-y	+= avb_rsa.o
+obj-y	+= avb_sha256.o
+obj-y	+= avb_sha512.o
+obj-y	+= avb_sysdeps_posix.o
+obj-y	+= avb_slot_verify.o
+obj-y	+= avb_util.o
+obj-y	+= avb_vbmeta_image.o
+obj-y	+= avb_version.o
diff --git a/lib/avb/rk_libavb/avb_chain_partition_descriptor.c b/lib/avb/rk_libavb/avb_chain_partition_descriptor.c
new file mode 100644
index 0000000000..145b01b560
--- /dev/null
+++ b/lib/avb/rk_libavb/avb_chain_partition_descriptor.c
@@ -0,0 +1,64 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_chain_partition_descriptor.h>
+#include <android_avb/avb_util.h>
+
+bool avb_chain_partition_descriptor_validate_and_byteswap(
+    const AvbChainPartitionDescriptor* src, AvbChainPartitionDescriptor* dest) {
+  uint64_t expected_size;
+
+  avb_memcpy(dest, src, sizeof(AvbChainPartitionDescriptor));
+
+  if (!avb_descriptor_validate_and_byteswap((const AvbDescriptor*)src,
+                                            (AvbDescriptor*)dest))
+    return false;
+
+  if (dest->parent_descriptor.tag != AVB_DESCRIPTOR_TAG_CHAIN_PARTITION) {
+    avb_error("Invalid tag for chain partition descriptor.\n");
+    return false;
+  }
+
+  dest->rollback_index_location = avb_be32toh(dest->rollback_index_location);
+  dest->partition_name_len = avb_be32toh(dest->partition_name_len);
+  dest->public_key_len = avb_be32toh(dest->public_key_len);
+
+  if (dest->rollback_index_location < 1) {
+    avb_error("Invalid rollback index location value.\n");
+    return false;
+  }
+
+  /* Check that partition_name and public_key are fully contained. */
+  expected_size = sizeof(AvbChainPartitionDescriptor) - sizeof(AvbDescriptor);
+  if (!avb_safe_add_to(&expected_size, dest->partition_name_len) ||
+      !avb_safe_add_to(&expected_size, dest->public_key_len)) {
+    avb_error("Overflow while adding up sizes.\n");
+    return false;
+  }
+  if (expected_size > dest->parent_descriptor.num_bytes_following) {
+    avb_error("Descriptor payload size overflow.\n");
+    return false;
+  }
+  return true;
+}
diff --git a/lib/avb/rk_libavb/avb_crc32.c b/lib/avb/rk_libavb/avb_crc32.c
new file mode 100644
index 0000000000..674dfe38c6
--- /dev/null
+++ b/lib/avb/rk_libavb/avb_crc32.c
@@ -0,0 +1,114 @@
+/*-
+ *  COPYRIGHT (C) 1986 Gary S. Brown.  You may use this program, or
+ *  code or tables extracted from it, as desired without restriction.
+ */
+
+/*
+ *  First, the polynomial itself and its table of feedback terms.  The
+ *  polynomial is
+ *  X^32+X^26+X^23+X^22+X^16+X^12+X^11+X^10+X^8+X^7+X^5+X^4+X^2+X^1+X^0
+ *
+ *  Note that we take it "backwards" and put the highest-order term in
+ *  the lowest-order bit.  The X^32 term is "implied"; the LSB is the
+ *  X^31 term, etc.  The X^0 term (usually shown as "+1") results in
+ *  the MSB being 1
+ *
+ *  Note that the usual hardware shift register implementation, which
+ *  is what we're using (we're merely optimizing it by doing eight-bit
+ *  chunks at a time) shifts bits into the lowest-order term.  In our
+ *  implementation, that means shifting towards the right.  Why do we
+ *  do it this way?  Because the calculated CRC must be transmitted in
+ *  order from highest-order term to lowest-order term.  UARTs transmit
+ *  characters in order from LSB to MSB.  By storing the CRC this way
+ *  we hand it to the UART in the order low-byte to high-byte; the UART
+ *  sends each low-bit to hight-bit; and the result is transmission bit
+ *  by bit from highest- to lowest-order term without requiring any bit
+ *  shuffling on our part.  Reception works similarly
+ *
+ *  The feedback terms table consists of 256, 32-bit entries.  Notes
+ *
+ *      The table can be generated at runtime if desired; code to do so
+ *      is shown later.  It might not be obvious, but the feedback
+ *      terms simply represent the results of eight shift/xor opera
+ *      tions for all combinations of data and CRC register values
+ *
+ *      The values must be right-shifted by eight bits by the "updcrc
+ *      logic; the shift must be unsigned (bring in zeroes).  On some
+ *      hardware you could probably optimize the shift in assembler by
+ *      using byte-swap instructions
+ *      polynomial $edb88320
+ *
+ *
+ * CRC32 code derived from work by Gary S. Brown.
+ */
+
+#include <android_avb/avb_sysdeps.h>
+#include <android_avb/avb_util.h>
+
+/* Code taken from FreeBSD 8 */
+
+static uint32_t crc32_tab[] = {
+    0x00000000, 0x77073096, 0xee0e612c, 0x990951ba, 0x076dc419, 0x706af48f,
+    0xe963a535, 0x9e6495a3, 0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988,
+    0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91, 0x1db71064, 0x6ab020f2,
+    0xf3b97148, 0x84be41de, 0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7,
+    0x136c9856, 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec, 0x14015c4f, 0x63066cd9,
+    0xfa0f3d63, 0x8d080df5, 0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172,
+    0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b, 0x35b5a8fa, 0x42b2986c,
+    0xdbbbc9d6, 0xacbcf940, 0x32d86ce3, 0x45df5c75, 0xdcd60dcf, 0xabd13d59,
+    0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116, 0x21b4f4b5, 0x56b3c423,
+    0xcfba9599, 0xb8bda50f, 0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924,
+    0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d, 0x76dc4190, 0x01db7106,
+    0x98d220bc, 0xefd5102a, 0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433,
+    0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818, 0x7f6a0dbb, 0x086d3d2d,
+    0x91646c97, 0xe6635c01, 0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e,
+    0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457, 0x65b0d9c6, 0x12b7e950,
+    0x8bbeb8ea, 0xfcb9887c, 0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65,
+    0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2, 0x4adfa541, 0x3dd895d7,
+    0xa4d1c46d, 0xd3d6f4fb, 0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0,
+    0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9, 0x5005713c, 0x270241aa,
+    0xbe0b1010, 0xc90c2086, 0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f,
+    0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4, 0x59b33d17, 0x2eb40d81,
+    0xb7bd5c3b, 0xc0ba6cad, 0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a,
+    0xead54739, 0x9dd277af, 0x04db2615, 0x73dc1683, 0xe3630b12, 0x94643b84,
+    0x0d6d6a3e, 0x7a6a5aa8, 0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1,
+    0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe, 0xf762575d, 0x806567cb,
+    0x196c3671, 0x6e6b06e7, 0xfed41b76, 0x89d32be0, 0x10da7a5a, 0x67dd4acc,
+    0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5, 0xd6d6a3e8, 0xa1d1937e,
+    0x38d8c2c4, 0x4fdff252, 0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b,
+    0xd80d2bda, 0xaf0a1b4c, 0x36034af6, 0x41047a60, 0xdf60efc3, 0xa867df55,
+    0x316e8eef, 0x4669be79, 0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236,
+    0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f, 0xc5ba3bbe, 0xb2bd0b28,
+    0x2bb45a92, 0x5cb36a04, 0xc2d7ffa7, 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d,
+    0x9b64c2b0, 0xec63f226, 0x756aa39c, 0x026d930a, 0x9c0906a9, 0xeb0e363f,
+    0x72076785, 0x05005713, 0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38,
+    0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21, 0x86d3d2d4, 0xf1d4e242,
+    0x68ddb3f8, 0x1fda836e, 0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777,
+    0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c, 0x8f659eff, 0xf862ae69,
+    0x616bffd3, 0x166ccf45, 0xa00ae278, 0xd70dd2ee, 0x4e048354, 0x3903b3c2,
+    0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db, 0xaed16a4a, 0xd9d65adc,
+    0x40df0b66, 0x37d83bf0, 0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9,
+    0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6, 0xbad03605, 0xcdd70693,
+    0x54de5729, 0x23d967bf, 0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94,
+    0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d};
+
+/*
+ * A function that calculates the CRC-32 based on the table above is
+ * given below for documentation purposes. An equivalent implementation
+ * of this function that's actually used in the kernel can be found
+ * in sys/libkern.h, where it can be inlined.
+ */
+
+static uint32_t crc32(uint32_t crc_in, const uint8_t* buf, int size) {
+  const uint8_t* p = buf;
+  uint32_t crc;
+
+  crc = crc_in ^ ~0U;
+  while (size--)
+    crc = crc32_tab[(crc ^ *p++) & 0xFF] ^ (crc >> 8);
+  return crc ^ ~0U;
+}
+
+uint32_t avb_crc32(const uint8_t* buf, size_t size) {
+  return crc32(0, buf, size);
+}
diff --git a/lib/avb/rk_libavb/avb_crypto.c b/lib/avb/rk_libavb/avb_crypto.c
new file mode 100644
index 0000000000..89c814803c
--- /dev/null
+++ b/lib/avb/rk_libavb/avb_crypto.c
@@ -0,0 +1,373 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_crypto.h>
+#include <android_avb/avb_rsa.h>
+#include <android_avb/avb_sha.h>
+#include <android_avb/avb_util.h>
+
+/* NOTE: The PKC1-v1.5 padding is a blob of binary DER of ASN.1 and is
+ * obtained from section 5.2.2 of RFC 4880.
+ */
+
+static const uint8_t
+    padding_RSA2048_SHA256[AVB_RSA2048_NUM_BYTES - AVB_SHA256_DIGEST_SIZE] = {
+        0x00, 0x01, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0x00, 0x30, 0x31, 0x30, 0x0d, 0x06, 0x09, 0x60, 0x86, 0x48, 0x01, 0x65,
+        0x03, 0x04, 0x02, 0x01, 0x05, 0x00, 0x04, 0x20};
+
+static const uint8_t
+    padding_RSA4096_SHA256[AVB_RSA4096_NUM_BYTES - AVB_SHA256_DIGEST_SIZE] = {
+        0x00, 0x01, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0x00, 0x30, 0x31, 0x30, 0x0d, 0x06, 0x09, 0x60,
+        0x86, 0x48, 0x01, 0x65, 0x03, 0x04, 0x02, 0x01, 0x05, 0x00, 0x04, 0x20};
+
+static const uint8_t
+    padding_RSA8192_SHA256[AVB_RSA8192_NUM_BYTES - AVB_SHA256_DIGEST_SIZE] = {
+        0x00, 0x01, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0x00, 0x30, 0x31, 0x30, 0x0d, 0x06, 0x09, 0x60, 0x86, 0x48, 0x01, 0x65,
+        0x03, 0x04, 0x02, 0x01, 0x05, 0x00, 0x04, 0x20};
+
+static const uint8_t
+    padding_RSA2048_SHA512[AVB_RSA2048_NUM_BYTES - AVB_SHA512_DIGEST_SIZE] = {
+        0x00, 0x01, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0x00, 0x30, 0x51, 0x30, 0x0d, 0x06, 0x09, 0x60,
+        0x86, 0x48, 0x01, 0x65, 0x03, 0x04, 0x02, 0x03, 0x05, 0x00, 0x04, 0x40};
+
+static const uint8_t
+    padding_RSA4096_SHA512[AVB_RSA4096_NUM_BYTES - AVB_SHA512_DIGEST_SIZE] = {
+        0x00, 0x01, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x30, 0x51, 0x30,
+        0x0d, 0x06, 0x09, 0x60, 0x86, 0x48, 0x01, 0x65, 0x03, 0x04, 0x02, 0x03,
+        0x05, 0x00, 0x04, 0x40};
+
+static const uint8_t
+    padding_RSA8192_SHA512[AVB_RSA8192_NUM_BYTES - AVB_SHA512_DIGEST_SIZE] = {
+        0x00, 0x01, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0x00, 0x30, 0x51, 0x30, 0x0d, 0x06, 0x09, 0x60,
+        0x86, 0x48, 0x01, 0x65, 0x03, 0x04, 0x02, 0x03, 0x05, 0x00, 0x04, 0x40};
+
+static AvbAlgorithmData algorithm_data[_AVB_ALGORITHM_NUM_TYPES] = {
+    /* AVB_ALGORITHM_TYPE_NONE */
+    {.padding = NULL, .padding_len = 0, .hash_len = 0},
+    /* AVB_ALGORITHM_TYPE_SHA256_RSA2048 */
+    {.padding = padding_RSA2048_SHA256,
+     .padding_len = sizeof(padding_RSA2048_SHA256),
+     .hash_len = AVB_SHA256_DIGEST_SIZE},
+    /* AVB_ALGORITHM_TYPE_SHA256_RSA4096 */
+    {.padding = padding_RSA4096_SHA256,
+     .padding_len = sizeof(padding_RSA4096_SHA256),
+     .hash_len = AVB_SHA256_DIGEST_SIZE},
+    /* AVB_ALGORITHM_TYPE_SHA256_RSA8192 */
+    {.padding = padding_RSA8192_SHA256,
+     .padding_len = sizeof(padding_RSA8192_SHA256),
+     .hash_len = AVB_SHA256_DIGEST_SIZE},
+    /* AVB_ALGORITHM_TYPE_SHA512_RSA2048 */
+    {.padding = padding_RSA2048_SHA512,
+     .padding_len = sizeof(padding_RSA2048_SHA512),
+     .hash_len = AVB_SHA512_DIGEST_SIZE},
+    /* AVB_ALGORITHM_TYPE_SHA512_RSA4096 */
+    {.padding = padding_RSA4096_SHA512,
+     .padding_len = sizeof(padding_RSA4096_SHA512),
+     .hash_len = AVB_SHA512_DIGEST_SIZE},
+    /* AVB_ALGORITHM_TYPE_SHA512_RSA8192 */
+    {.padding = padding_RSA8192_SHA512,
+     .padding_len = sizeof(padding_RSA8192_SHA512),
+     .hash_len = AVB_SHA512_DIGEST_SIZE},
+};
+
+const AvbAlgorithmData* avb_get_algorithm_data(AvbAlgorithmType algorithm) {
+  if (algorithm >= AVB_ALGORITHM_TYPE_NONE &&
+      algorithm < _AVB_ALGORITHM_NUM_TYPES) {
+    return &algorithm_data[algorithm];
+  }
+  return NULL;
+}
+
+bool avb_rsa_public_key_header_validate_and_byteswap(
+    const AvbRSAPublicKeyHeader* src, AvbRSAPublicKeyHeader* dest) {
+  avb_memcpy(dest, src, sizeof(AvbRSAPublicKeyHeader));
+
+  dest->key_num_bits = avb_be32toh(dest->key_num_bits);
+  dest->n0inv = avb_be32toh(dest->n0inv);
+
+  return true;
+}
diff --git a/lib/avb/rk_libavb/avb_descriptor.c b/lib/avb/rk_libavb/avb_descriptor.c
new file mode 100644
index 0000000000..ffe9add145
--- /dev/null
+++ b/lib/avb/rk_libavb/avb_descriptor.c
@@ -0,0 +1,160 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_descriptor.h>
+#include <android_avb/avb_util.h>
+#include <android_avb/avb_vbmeta_image.h>
+
+bool avb_descriptor_validate_and_byteswap(const AvbDescriptor* src,
+                                          AvbDescriptor* dest) {
+  dest->tag = avb_be64toh(src->tag);
+  dest->num_bytes_following = avb_be64toh(src->num_bytes_following);
+
+  if ((dest->num_bytes_following & 0x07) != 0) {
+    avb_error("Descriptor size is not divisible by 8.\n");
+    return false;
+  }
+  return true;
+}
+
+bool avb_descriptor_foreach(const uint8_t* image_data,
+                            size_t image_size,
+                            AvbDescriptorForeachFunc foreach_func,
+                            void* user_data) {
+  const AvbVBMetaImageHeader* header = NULL;
+  bool ret = false;
+  const uint8_t* image_end;
+  const uint8_t* desc_start;
+  const uint8_t* desc_end;
+  const uint8_t* p;
+
+  if (image_data == NULL) {
+    avb_error("image_data is NULL\n.");
+    goto out;
+  }
+
+  if (foreach_func == NULL) {
+    avb_error("foreach_func is NULL\n.");
+    goto out;
+  }
+
+  if (image_size < sizeof(AvbVBMetaImageHeader)) {
+    avb_error("Length is smaller than header.\n");
+    goto out;
+  }
+
+  /* Ensure magic is correct. */
+  if (avb_memcmp(image_data, AVB_MAGIC, AVB_MAGIC_LEN) != 0) {
+    avb_error("Magic is incorrect.\n");
+    goto out;
+  }
+
+  /* Careful, not byteswapped - also ensure it's aligned properly. */
+  avb_assert_aligned(image_data);
+  header = (const AvbVBMetaImageHeader*)image_data;
+  image_end = image_data + image_size;
+
+  desc_start = image_data + sizeof(AvbVBMetaImageHeader) +
+               avb_be64toh(header->authentication_data_block_size) +
+               avb_be64toh(header->descriptors_offset);
+
+  desc_end = desc_start + avb_be64toh(header->descriptors_size);
+
+  if (desc_start < image_data || desc_start > image_end ||
+      desc_end < image_data || desc_end > image_end || desc_end < desc_start) {
+    avb_error("Descriptors not inside passed-in data.\n");
+    goto out;
+  }
+
+  for (p = desc_start; p < desc_end;) {
+    const AvbDescriptor* dh = (const AvbDescriptor*)p;
+    avb_assert_aligned(dh);
+    uint64_t nb_following = avb_be64toh(dh->num_bytes_following);
+    uint64_t nb_total = sizeof(AvbDescriptor) + nb_following;
+
+    if ((nb_total & 7) != 0) {
+      avb_error("Invalid descriptor length.\n");
+      goto out;
+    }
+
+    if (nb_total + p < desc_start || nb_total + p > desc_end) {
+      avb_error("Invalid data in descriptors array.\n");
+      goto out;
+    }
+
+    if (foreach_func(dh, user_data) == 0) {
+      goto out;
+    }
+
+    p += nb_total;
+  }
+
+  ret = true;
+
+out:
+  return ret;
+}
+
+static bool count_descriptors(const AvbDescriptor* descriptor,
+                              void* user_data) {
+  size_t* num_descriptors = user_data;
+  *num_descriptors += 1;
+  return true;
+}
+
+typedef struct {
+  size_t descriptor_number;
+  const AvbDescriptor** descriptors;
+} SetDescriptorData;
+
+static bool set_descriptors(const AvbDescriptor* descriptor, void* user_data) {
+  SetDescriptorData* data = user_data;
+  data->descriptors[data->descriptor_number++] = descriptor;
+  return true;
+}
+
+const AvbDescriptor** avb_descriptor_get_all(const uint8_t* image_data,
+                                             size_t image_size,
+                                             size_t* out_num_descriptors) {
+  size_t num_descriptors = 0;
+  SetDescriptorData data;
+
+  avb_descriptor_foreach(
+      image_data, image_size, count_descriptors, &num_descriptors);
+
+  data.descriptor_number = 0;
+  data.descriptors =
+      avb_calloc(sizeof(const AvbDescriptor*) * (num_descriptors + 1));
+  if (data.descriptors == NULL) {
+    return NULL;
+  }
+  avb_descriptor_foreach(image_data, image_size, set_descriptors, &data);
+  avb_assert(data.descriptor_number == num_descriptors);
+
+  if (out_num_descriptors != NULL) {
+    *out_num_descriptors = num_descriptors;
+  }
+
+  return data.descriptors;
+}
diff --git a/lib/avb/rk_libavb/avb_footer.c b/lib/avb/rk_libavb/avb_footer.c
new file mode 100644
index 0000000000..31257d0949
--- /dev/null
+++ b/lib/avb/rk_libavb/avb_footer.c
@@ -0,0 +1,54 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_footer.h>
+#include <android_avb/avb_util.h>
+
+bool avb_footer_validate_and_byteswap(const AvbFooter* src, AvbFooter* dest) {
+  avb_memcpy(dest, src, sizeof(AvbFooter));
+
+  dest->version_major = avb_be32toh(dest->version_major);
+  dest->version_minor = avb_be32toh(dest->version_minor);
+
+  dest->original_image_size = avb_be64toh(dest->original_image_size);
+  dest->vbmeta_offset = avb_be64toh(dest->vbmeta_offset);
+  dest->vbmeta_size = avb_be64toh(dest->vbmeta_size);
+
+  /* Check that magic is correct. */
+  if (avb_safe_memcmp(dest->magic, AVB_FOOTER_MAGIC, AVB_FOOTER_MAGIC_LEN) !=
+      0) {
+    avb_error("Footer magic is incorrect.\n");
+    return false;
+  }
+
+  /* Ensure we don't attempt to access any fields if the footer major
+   * version is not supported.
+   */
+  if (dest->version_major > AVB_FOOTER_VERSION_MAJOR) {
+    avb_error("No support for footer version.\n");
+    return false;
+  }
+
+  return true;
+}
diff --git a/lib/avb/rk_libavb/avb_hash_descriptor.c b/lib/avb/rk_libavb/avb_hash_descriptor.c
new file mode 100644
index 0000000000..5444ca2d6a
--- /dev/null
+++ b/lib/avb/rk_libavb/avb_hash_descriptor.c
@@ -0,0 +1,61 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_hash_descriptor.h>
+#include <android_avb/avb_util.h>
+
+bool avb_hash_descriptor_validate_and_byteswap(const AvbHashDescriptor* src,
+                                               AvbHashDescriptor* dest) {
+  uint64_t expected_size;
+
+  avb_memcpy(dest, src, sizeof(AvbHashDescriptor));
+
+  if (!avb_descriptor_validate_and_byteswap((const AvbDescriptor*)src,
+                                            (AvbDescriptor*)dest))
+    return false;
+
+  if (dest->parent_descriptor.tag != AVB_DESCRIPTOR_TAG_HASH) {
+    avb_error("Invalid tag for hash descriptor.\n");
+    return false;
+  }
+
+  dest->image_size = avb_be64toh(dest->image_size);
+  dest->partition_name_len = avb_be32toh(dest->partition_name_len);
+  dest->salt_len = avb_be32toh(dest->salt_len);
+  dest->digest_len = avb_be32toh(dest->digest_len);
+
+  /* Check that partition_name, salt, and digest are fully contained. */
+  expected_size = sizeof(AvbHashDescriptor) - sizeof(AvbDescriptor);
+  if (!avb_safe_add_to(&expected_size, dest->partition_name_len) ||
+      !avb_safe_add_to(&expected_size, dest->salt_len) ||
+      !avb_safe_add_to(&expected_size, dest->digest_len)) {
+    avb_error("Overflow while adding up sizes.\n");
+    return false;
+  }
+  if (expected_size > dest->parent_descriptor.num_bytes_following) {
+    avb_error("Descriptor payload size overflow.\n");
+    return false;
+  }
+  return true;
+}
diff --git a/lib/avb/rk_libavb/avb_hashtree_descriptor.c b/lib/avb/rk_libavb/avb_hashtree_descriptor.c
new file mode 100644
index 0000000000..2b4b03da52
--- /dev/null
+++ b/lib/avb/rk_libavb/avb_hashtree_descriptor.c
@@ -0,0 +1,69 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_hashtree_descriptor.h>
+#include <android_avb/avb_util.h>
+
+bool avb_hashtree_descriptor_validate_and_byteswap(
+    const AvbHashtreeDescriptor* src, AvbHashtreeDescriptor* dest) {
+  uint64_t expected_size;
+
+  avb_memcpy(dest, src, sizeof(AvbHashtreeDescriptor));
+
+  if (!avb_descriptor_validate_and_byteswap((const AvbDescriptor*)src,
+                                            (AvbDescriptor*)dest))
+    return false;
+
+  if (dest->parent_descriptor.tag != AVB_DESCRIPTOR_TAG_HASHTREE) {
+    avb_error("Invalid tag for hashtree descriptor.\n");
+    return false;
+  }
+
+  dest->dm_verity_version = avb_be32toh(dest->dm_verity_version);
+  dest->image_size = avb_be64toh(dest->image_size);
+  dest->tree_offset = avb_be64toh(dest->tree_offset);
+  dest->tree_size = avb_be64toh(dest->tree_size);
+  dest->data_block_size = avb_be32toh(dest->data_block_size);
+  dest->hash_block_size = avb_be32toh(dest->hash_block_size);
+  dest->fec_num_roots = avb_be32toh(dest->fec_num_roots);
+  dest->fec_offset = avb_be64toh(dest->fec_offset);
+  dest->fec_size = avb_be64toh(dest->fec_size);
+  dest->partition_name_len = avb_be32toh(dest->partition_name_len);
+  dest->salt_len = avb_be32toh(dest->salt_len);
+  dest->root_digest_len = avb_be32toh(dest->root_digest_len);
+
+  /* Check that partition_name, salt, and root_digest are fully contained. */
+  expected_size = sizeof(AvbHashtreeDescriptor) - sizeof(AvbDescriptor);
+  if (!avb_safe_add_to(&expected_size, dest->partition_name_len) ||
+      !avb_safe_add_to(&expected_size, dest->salt_len) ||
+      !avb_safe_add_to(&expected_size, dest->root_digest_len)) {
+    avb_error("Overflow while adding up sizes.\n");
+    return false;
+  }
+  if (expected_size > dest->parent_descriptor.num_bytes_following) {
+    avb_error("Descriptor payload size overflow.\n");
+    return false;
+  }
+  return true;
+}
diff --git a/lib/avb/rk_libavb/avb_kernel_cmdline_descriptor.c b/lib/avb/rk_libavb/avb_kernel_cmdline_descriptor.c
new file mode 100644
index 0000000000..b33e19d997
--- /dev/null
+++ b/lib/avb/rk_libavb/avb_kernel_cmdline_descriptor.c
@@ -0,0 +1,58 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_kernel_cmdline_descriptor.h>
+#include <android_avb/avb_util.h>
+
+bool avb_kernel_cmdline_descriptor_validate_and_byteswap(
+    const AvbKernelCmdlineDescriptor* src, AvbKernelCmdlineDescriptor* dest) {
+  uint64_t expected_size;
+
+  avb_memcpy(dest, src, sizeof(AvbKernelCmdlineDescriptor));
+
+  if (!avb_descriptor_validate_and_byteswap((const AvbDescriptor*)src,
+                                            (AvbDescriptor*)dest))
+    return false;
+
+  if (dest->parent_descriptor.tag != AVB_DESCRIPTOR_TAG_KERNEL_CMDLINE) {
+    avb_error("Invalid tag for kernel cmdline descriptor.\n");
+    return false;
+  }
+
+  dest->flags = avb_be32toh(dest->flags);
+  dest->kernel_cmdline_length = avb_be32toh(dest->kernel_cmdline_length);
+
+  /* Check that kernel_cmdline is fully contained. */
+  expected_size = sizeof(AvbKernelCmdlineDescriptor) - sizeof(AvbDescriptor);
+  if (!avb_safe_add_to(&expected_size, dest->kernel_cmdline_length)) {
+    avb_error("Overflow while adding up sizes.\n");
+    return false;
+  }
+  if (expected_size > dest->parent_descriptor.num_bytes_following) {
+    avb_error("Descriptor payload size overflow.\n");
+    return false;
+  }
+
+  return true;
+}
diff --git a/lib/avb/rk_libavb/avb_property_descriptor.c b/lib/avb/rk_libavb/avb_property_descriptor.c
new file mode 100644
index 0000000000..f567fd7033
--- /dev/null
+++ b/lib/avb/rk_libavb/avb_property_descriptor.c
@@ -0,0 +1,185 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_property_descriptor.h>
+#include <android_avb/avb_util.h>
+
+bool avb_property_descriptor_validate_and_byteswap(
+    const AvbPropertyDescriptor* src, AvbPropertyDescriptor* dest) {
+  uint64_t expected_size;
+
+  avb_memcpy(dest, src, sizeof(AvbPropertyDescriptor));
+
+  if (!avb_descriptor_validate_and_byteswap((const AvbDescriptor*)src,
+                                            (AvbDescriptor*)dest))
+    return false;
+
+  if (dest->parent_descriptor.tag != AVB_DESCRIPTOR_TAG_PROPERTY) {
+    avb_error("Invalid tag for property descriptor.\n");
+    return false;
+  }
+
+  dest->key_num_bytes = avb_be64toh(dest->key_num_bytes);
+  dest->value_num_bytes = avb_be64toh(dest->value_num_bytes);
+
+  /* Check that key and value are fully contained. */
+  expected_size = sizeof(AvbPropertyDescriptor) - sizeof(AvbDescriptor) + 2;
+  if (!avb_safe_add_to(&expected_size, dest->key_num_bytes) ||
+      !avb_safe_add_to(&expected_size, dest->value_num_bytes)) {
+    avb_error("Overflow while adding up sizes.\n");
+    return false;
+  }
+  if (expected_size > dest->parent_descriptor.num_bytes_following) {
+    avb_error("Descriptor payload size overflow.\n");
+    return false;
+  }
+
+  return true;
+}
+
+typedef struct {
+  const char* key;
+  size_t key_size;
+  const char* ret_value;
+  size_t ret_value_size;
+} PropertyIteratorData;
+
+static bool property_lookup_desc_foreach(const AvbDescriptor* header,
+                                         void* user_data) {
+  PropertyIteratorData* data = (PropertyIteratorData*)user_data;
+  AvbPropertyDescriptor prop_desc;
+  const uint8_t* p;
+  bool ret = true;
+
+  if (header->tag != AVB_DESCRIPTOR_TAG_PROPERTY) {
+    goto out;
+  }
+
+  if (!avb_property_descriptor_validate_and_byteswap(
+          (const AvbPropertyDescriptor*)header, &prop_desc)) {
+    goto out;
+  }
+
+  p = (const uint8_t*)header;
+  if (p[sizeof(AvbPropertyDescriptor) + prop_desc.key_num_bytes] != 0) {
+    avb_error("No terminating NUL byte in key.\n");
+    goto out;
+  }
+
+  if (data->key_size == prop_desc.key_num_bytes) {
+    if (avb_memcmp(p + sizeof(AvbPropertyDescriptor),
+                   data->key,
+                   data->key_size) == 0) {
+      data->ret_value = (const char*)(p + sizeof(AvbPropertyDescriptor) +
+                                      prop_desc.key_num_bytes + 1);
+      data->ret_value_size = prop_desc.value_num_bytes;
+      /* Stop iterating. */
+      ret = false;
+      goto out;
+    }
+  }
+
+out:
+  return ret;
+}
+
+const char* avb_property_lookup(const uint8_t* image_data,
+                                size_t image_size,
+                                const char* key,
+                                size_t key_size,
+                                size_t* out_value_size) {
+  PropertyIteratorData data;
+
+  if (key_size == 0) {
+    key_size = avb_strlen(key);
+  }
+
+  data.key = key;
+  data.key_size = key_size;
+
+  if (avb_descriptor_foreach(
+          image_data, image_size, property_lookup_desc_foreach, &data) == 0) {
+    if (out_value_size != NULL) {
+      *out_value_size = data.ret_value_size;
+    }
+    return data.ret_value;
+  }
+
+  if (out_value_size != NULL) {
+    *out_value_size = 0;
+  }
+  return NULL;
+}
+
+bool avb_property_lookup_uint64(const uint8_t* image_data,
+                                size_t image_size,
+                                const char* key,
+                                size_t key_size,
+                                uint64_t* out_value) {
+  const char* value;
+  bool ret = false;
+  uint64_t parsed_val;
+  int base;
+  int n;
+
+  value = avb_property_lookup(image_data, image_size, key, key_size, NULL);
+  if (value == NULL) {
+    goto out;
+  }
+
+  base = 10;
+  if (avb_memcmp(value, "0x", 2) == 0) {
+    base = 16;
+    value += 2;
+  }
+
+  parsed_val = 0;
+  for (n = 0; value[n] != '\0'; n++) {
+    int c = value[n];
+    int digit;
+
+    parsed_val *= base;
+
+    if (c >= '0' && c <= '9') {
+      digit = c - '0';
+    } else if (base == 16 && c >= 'a' && c <= 'f') {
+      digit = c - 'a' + 10;
+    } else if (base == 16 && c >= 'A' && c <= 'F') {
+      digit = c - 'A' + 10;
+    } else {
+      avb_error("Invalid digit.\n");
+      goto out;
+    }
+
+    parsed_val += digit;
+  }
+
+  ret = true;
+  if (out_value != NULL) {
+    *out_value = parsed_val;
+  }
+
+out:
+  return ret;
+}
diff --git a/lib/avb/rk_libavb/avb_rsa.c b/lib/avb/rk_libavb/avb_rsa.c
new file mode 100644
index 0000000000..e2f62f113d
--- /dev/null
+++ b/lib/avb/rk_libavb/avb_rsa.c
@@ -0,0 +1,299 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/* Copyright (c) 2011 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Implementation of RSA signature verification which uses a pre-processed
+ * key for computation. The code extends libmincrypt RSA verification code to
+ * support multiple RSA key lengths and hash digest algorithms.
+ */
+
+#include <android_avb/avb_rsa.h>
+#include <android_avb/avb_sha.h>
+#include <android_avb/avb_util.h>
+#include <android_avb/avb_vbmeta_image.h>
+
+typedef struct Key {
+  unsigned int len; /* Length of n[] in number of uint32_t */
+  uint32_t n0inv;   /* -1 / n[0] mod 2^32 */
+  uint32_t* n;      /* modulus as array (host-byte order) */
+  uint32_t* rr;     /* R^2 as array (host-byte order) */
+} Key;
+
+Key* parse_key_data(const uint8_t* data, size_t length) {
+  AvbRSAPublicKeyHeader h;
+  Key* key = NULL;
+  size_t expected_length;
+  unsigned int i;
+  const uint8_t* n;
+  const uint8_t* rr;
+
+  if (!avb_rsa_public_key_header_validate_and_byteswap(
+          (const AvbRSAPublicKeyHeader*)data, &h)) {
+    avb_error("Invalid key.\n");
+    goto fail;
+  }
+
+  if (!(h.key_num_bits == 2048 || h.key_num_bits == 4096 ||
+        h.key_num_bits == 8192)) {
+    avb_error("Unexpected key length.\n");
+    goto fail;
+  }
+
+  expected_length = sizeof(AvbRSAPublicKeyHeader) + 2 * h.key_num_bits / 8;
+  if (length != expected_length) {
+    avb_error("Key does not match expected length.\n");
+    goto fail;
+  }
+
+  n = data + sizeof(AvbRSAPublicKeyHeader);
+  rr = data + sizeof(AvbRSAPublicKeyHeader) + h.key_num_bits / 8;
+
+  /* Store n and rr following the key header so we only have to do one
+   * allocation.
+   */
+  key = (Key*)(avb_malloc(sizeof(Key) + 2 * h.key_num_bits / 8));
+  if (key == NULL) {
+    goto fail;
+  }
+
+  key->len = h.key_num_bits / 32;
+  key->n0inv = h.n0inv;
+  key->n = (uint32_t*)(key + 1); /* Skip ahead sizeof(Key) bytes. */
+  key->rr = key->n + key->len;
+
+  /* Crypto-code below (modpowF4() and friends) expects the key in
+   * little-endian format (rather than the format we're storing the
+   * key in), so convert it.
+   */
+  for (i = 0; i < key->len; i++) {
+    key->n[i] = avb_be32toh(((uint32_t*)n)[key->len - i - 1]);
+    key->rr[i] = avb_be32toh(((uint32_t*)rr)[key->len - i - 1]);
+  }
+  return key;
+
+fail:
+  if (key != NULL) {
+    avb_free(key);
+  }
+  return NULL;
+}
+
+void free_parsed_key(Key* key) {
+  avb_free(key);
+}
+
+/* a[] -= mod */
+static void subM(const Key* key, uint32_t* a) {
+  int64_t A = 0;
+  uint32_t i;
+  for (i = 0; i < key->len; ++i) {
+    A += (uint64_t)a[i] - key->n[i];
+    a[i] = (uint32_t)A;
+    A >>= 32;
+  }
+}
+
+/* return a[] >= mod */
+static int geM(const Key* key, uint32_t* a) {
+  uint32_t i;
+  for (i = key->len; i;) {
+    --i;
+    if (a[i] < key->n[i]) {
+      return 0;
+    }
+    if (a[i] > key->n[i]) {
+      return 1;
+    }
+  }
+  return 1; /* equal */
+}
+
+/* montgomery c[] += a * b[] / R % mod */
+static void montMulAdd(const Key* key,
+                       uint32_t* c,
+                       const uint32_t a,
+                       const uint32_t* b) {
+  uint64_t A = (uint64_t)a * b[0] + c[0];
+  uint32_t d0 = (uint32_t)A * key->n0inv;
+  uint64_t B = (uint64_t)d0 * key->n[0] + (uint32_t)A;
+  uint32_t i;
+
+  for (i = 1; i < key->len; ++i) {
+    A = (A >> 32) + (uint64_t)a * b[i] + c[i];
+    B = (B >> 32) + (uint64_t)d0 * key->n[i] + (uint32_t)A;
+    c[i - 1] = (uint32_t)B;
+  }
+
+  A = (A >> 32) + (B >> 32);
+
+  c[i - 1] = (uint32_t)A;
+
+  if (A >> 32) {
+    subM(key, c);
+  }
+}
+
+/* montgomery c[] = a[] * b[] / R % mod */
+static void montMul(const Key* key, uint32_t* c, uint32_t* a, uint32_t* b) {
+  uint32_t i;
+  for (i = 0; i < key->len; ++i) {
+    c[i] = 0;
+  }
+  for (i = 0; i < key->len; ++i) {
+    montMulAdd(key, c, a[i], b);
+  }
+}
+
+/* In-place public exponentiation. (65537}
+ * Input and output big-endian byte array in inout.
+ */
+static void modpowF4(const Key* key, uint8_t* inout) {
+  uint32_t* a = (uint32_t*)avb_malloc(key->len * sizeof(uint32_t));
+  uint32_t* aR = (uint32_t*)avb_malloc(key->len * sizeof(uint32_t));
+  uint32_t* aaR = (uint32_t*)avb_malloc(key->len * sizeof(uint32_t));
+  if (a == NULL || aR == NULL || aaR == NULL) {
+    goto out;
+  }
+
+  uint32_t* aaa = aaR; /* Re-use location. */
+  int i;
+
+  /* Convert from big endian byte array to little endian word array. */
+  for (i = 0; i < (int)key->len; ++i) {
+    uint32_t tmp = (inout[((key->len - 1 - i) * 4) + 0] << 24) |
+                   (inout[((key->len - 1 - i) * 4) + 1] << 16) |
+                   (inout[((key->len - 1 - i) * 4) + 2] << 8) |
+                   (inout[((key->len - 1 - i) * 4) + 3] << 0);
+    a[i] = tmp;
+  }
+
+  montMul(key, aR, a, key->rr); /* aR = a * RR / R mod M   */
+  for (i = 0; i < 16; i += 2) {
+    montMul(key, aaR, aR, aR);  /* aaR = aR * aR / R mod M */
+    montMul(key, aR, aaR, aaR); /* aR = aaR * aaR / R mod M */
+  }
+  montMul(key, aaa, aR, a); /* aaa = aR * a / R mod M */
+
+  /* Make sure aaa < mod; aaa is at most 1x mod too large. */
+  if (geM(key, aaa)) {
+    subM(key, aaa);
+  }
+
+  /* Convert to bigendian byte array */
+  for (i = (int)key->len - 1; i >= 0; --i) {
+    uint32_t tmp = aaa[i];
+    *inout++ = (uint8_t)(tmp >> 24);
+    *inout++ = (uint8_t)(tmp >> 16);
+    *inout++ = (uint8_t)(tmp >> 8);
+    *inout++ = (uint8_t)(tmp >> 0);
+  }
+
+out:
+  if (a != NULL) {
+    avb_free(a);
+  }
+  if (aR != NULL) {
+    avb_free(aR);
+  }
+  if (aaR != NULL) {
+    avb_free(aaR);
+  }
+}
+
+/* Verify a RSA PKCS1.5 signature against an expected hash.
+ * Returns false on failure, true on success.
+ */
+bool avb_rsa_verify(const uint8_t* key,
+                    size_t key_num_bytes,
+                    const uint8_t* sig,
+                    size_t sig_num_bytes,
+                    const uint8_t* hash,
+                    size_t hash_num_bytes,
+                    const uint8_t* padding,
+                    size_t padding_num_bytes) {
+  uint8_t* buf = NULL;
+  Key* parsed_key = NULL;
+  bool success = false;
+
+  if (key == NULL || sig == NULL || hash == NULL || padding == NULL) {
+    avb_error("Invalid input.\n");
+    goto out;
+  }
+
+  parsed_key = parse_key_data(key, key_num_bytes);
+  if (parsed_key == NULL) {
+    avb_error("Error parsing key.\n");
+    goto out;
+  }
+
+  if (sig_num_bytes != (parsed_key->len * sizeof(uint32_t))) {
+    avb_error("Signature length does not match key length.\n");
+    goto out;
+  }
+
+  if (padding_num_bytes != sig_num_bytes - hash_num_bytes) {
+    avb_error("Padding length does not match hash and signature lengths.\n");
+    goto out;
+  }
+
+  buf = (uint8_t*)avb_malloc(sig_num_bytes);
+  if (buf == NULL) {
+    avb_error("Error allocating memory.\n");
+    goto out;
+  }
+  avb_memcpy(buf, sig, sig_num_bytes);
+
+  modpowF4(parsed_key, buf);
+
+  /* Check padding bytes.
+   *
+   * Even though there are probably no timing issues here, we use
+   * avb_safe_memcmp() just to be on the safe side.
+   */
+  if (avb_safe_memcmp(buf, padding, padding_num_bytes)) {
+    avb_error("Padding check failed.\n");
+    goto out;
+  }
+
+  /* Check hash. */
+  if (avb_safe_memcmp(buf + padding_num_bytes, hash, hash_num_bytes)) {
+    avb_error("Hash check failed.\n");
+    goto out;
+  }
+
+  success = true;
+
+out:
+  if (parsed_key != NULL) {
+    free_parsed_key(parsed_key);
+  }
+  if (buf != NULL) {
+    avb_free(buf);
+  }
+  return success;
+}
diff --git a/lib/avb/rk_libavb/avb_sha256.c b/lib/avb/rk_libavb/avb_sha256.c
new file mode 100644
index 0000000000..b6d30c112e
--- /dev/null
+++ b/lib/avb/rk_libavb/avb_sha256.c
@@ -0,0 +1,390 @@
+/* SHA-256 and SHA-512 implementation based on code by Oliver Gay
+ * <olivier.gay@a3.epfl.ch> under a BSD-style license. See below.
+ */
+
+/*
+ * FIPS 180-2 SHA-224/256/384/512 implementation
+ * Last update: 02/02/2007
+ * Issue date:  04/30/2005
+ *
+ * Copyright (C) 2005, 2007 Olivier Gay <olivier.gay@a3.epfl.ch>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the project nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE PROJECT AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE PROJECT OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <android_avb/avb_sha.h>
+
+#define SHFR(x, n) (x >> n)
+#define ROTR(x, n) ((x >> n) | (x << ((sizeof(x) << 3) - n)))
+#define ROTL(x, n) ((x << n) | (x >> ((sizeof(x) << 3) - n)))
+#define CH(x, y, z) ((x & y) ^ (~x & z))
+#define MAJ(x, y, z) ((x & y) ^ (x & z) ^ (y & z))
+
+#define SHA256_F1(x) (ROTR(x, 2) ^ ROTR(x, 13) ^ ROTR(x, 22))
+#define SHA256_F2(x) (ROTR(x, 6) ^ ROTR(x, 11) ^ ROTR(x, 25))
+#define SHA256_F3(x) (ROTR(x, 7) ^ ROTR(x, 18) ^ SHFR(x, 3))
+#define SHA256_F4(x) (ROTR(x, 17) ^ ROTR(x, 19) ^ SHFR(x, 10))
+
+#define UNPACK32(x, str)                 \
+  {                                      \
+    *((str) + 3) = (uint8_t)((x));       \
+    *((str) + 2) = (uint8_t)((x) >> 8);  \
+    *((str) + 1) = (uint8_t)((x) >> 16); \
+    *((str) + 0) = (uint8_t)((x) >> 24); \
+  }
+
+#define PACK32(str, x)                                                    \
+  {                                                                       \
+    *(x) = ((uint32_t) * ((str) + 3)) | ((uint32_t) * ((str) + 2) << 8) | \
+           ((uint32_t) * ((str) + 1) << 16) |                             \
+           ((uint32_t) * ((str) + 0) << 24);                              \
+  }
+
+/* Macros used for loops unrolling */
+
+#define SHA256_SCR(i) \
+  { w[i] = SHA256_F4(w[i - 2]) + w[i - 7] + SHA256_F3(w[i - 15]) + w[i - 16]; }
+
+#define SHA256_EXP(a, b, c, d, e, f, g, h, j)                               \
+  {                                                                         \
+    t1 = wv[h] + SHA256_F2(wv[e]) + CH(wv[e], wv[f], wv[g]) + sha256_k[j] + \
+         w[j];                                                              \
+    t2 = SHA256_F1(wv[a]) + MAJ(wv[a], wv[b], wv[c]);                       \
+    wv[d] += t1;                                                            \
+    wv[h] = t1 + t2;                                                        \
+  }
+
+static const uint32_t sha256_h0[8] = {0x6a09e667,
+                                      0xbb67ae85,
+                                      0x3c6ef372,
+                                      0xa54ff53a,
+                                      0x510e527f,
+                                      0x9b05688c,
+                                      0x1f83d9ab,
+                                      0x5be0cd19};
+
+static const uint32_t sha256_k[64] = {
+    0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5, 0x3956c25b, 0x59f111f1,
+    0x923f82a4, 0xab1c5ed5, 0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3,
+    0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174, 0xe49b69c1, 0xefbe4786,
+    0x0fc19dc6, 0x240ca1cc, 0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da,
+    0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7, 0xc6e00bf3, 0xd5a79147,
+    0x06ca6351, 0x14292967, 0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13,
+    0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85, 0xa2bfe8a1, 0xa81a664b,
+    0xc24b8b70, 0xc76c51a3, 0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070,
+    0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5, 0x391c0cb3, 0x4ed8aa4a,
+    0x5b9cca4f, 0x682e6ff3, 0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208,
+    0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2};
+
+/* SHA-256 implementation */
+void avb_sha256_init(AvbSHA256Ctx* ctx) {
+#ifndef UNROLL_LOOPS
+  int i;
+  for (i = 0; i < 8; i++) {
+    ctx->h[i] = sha256_h0[i];
+  }
+#else
+  ctx->h[0] = sha256_h0[0];
+  ctx->h[1] = sha256_h0[1];
+  ctx->h[2] = sha256_h0[2];
+  ctx->h[3] = sha256_h0[3];
+  ctx->h[4] = sha256_h0[4];
+  ctx->h[5] = sha256_h0[5];
+  ctx->h[6] = sha256_h0[6];
+  ctx->h[7] = sha256_h0[7];
+#endif /* !UNROLL_LOOPS */
+
+  ctx->len = 0;
+  ctx->tot_len = 0;
+}
+
+static void SHA256_transform(AvbSHA256Ctx* ctx,
+                             const uint8_t* message,
+                             unsigned int block_nb) {
+  uint32_t w[64];
+  uint32_t wv[8];
+  uint32_t t1, t2;
+  const unsigned char* sub_block;
+  int i;
+
+#ifndef UNROLL_LOOPS
+  int j;
+#endif
+
+  for (i = 0; i < (int)block_nb; i++) {
+    sub_block = message + (i << 6);
+
+#ifndef UNROLL_LOOPS
+    for (j = 0; j < 16; j++) {
+      PACK32(&sub_block[j << 2], &w[j]);
+    }
+
+    for (j = 16; j < 64; j++) {
+      SHA256_SCR(j);
+    }
+
+    for (j = 0; j < 8; j++) {
+      wv[j] = ctx->h[j];
+    }
+
+    for (j = 0; j < 64; j++) {
+      t1 = wv[7] + SHA256_F2(wv[4]) + CH(wv[4], wv[5], wv[6]) + sha256_k[j] +
+           w[j];
+      t2 = SHA256_F1(wv[0]) + MAJ(wv[0], wv[1], wv[2]);
+      wv[7] = wv[6];
+      wv[6] = wv[5];
+      wv[5] = wv[4];
+      wv[4] = wv[3] + t1;
+      wv[3] = wv[2];
+      wv[2] = wv[1];
+      wv[1] = wv[0];
+      wv[0] = t1 + t2;
+    }
+
+    for (j = 0; j < 8; j++) {
+      ctx->h[j] += wv[j];
+    }
+#else
+    PACK32(&sub_block[0], &w[0]);
+    PACK32(&sub_block[4], &w[1]);
+    PACK32(&sub_block[8], &w[2]);
+    PACK32(&sub_block[12], &w[3]);
+    PACK32(&sub_block[16], &w[4]);
+    PACK32(&sub_block[20], &w[5]);
+    PACK32(&sub_block[24], &w[6]);
+    PACK32(&sub_block[28], &w[7]);
+    PACK32(&sub_block[32], &w[8]);
+    PACK32(&sub_block[36], &w[9]);
+    PACK32(&sub_block[40], &w[10]);
+    PACK32(&sub_block[44], &w[11]);
+    PACK32(&sub_block[48], &w[12]);
+    PACK32(&sub_block[52], &w[13]);
+    PACK32(&sub_block[56], &w[14]);
+    PACK32(&sub_block[60], &w[15]);
+
+    SHA256_SCR(16);
+    SHA256_SCR(17);
+    SHA256_SCR(18);
+    SHA256_SCR(19);
+    SHA256_SCR(20);
+    SHA256_SCR(21);
+    SHA256_SCR(22);
+    SHA256_SCR(23);
+    SHA256_SCR(24);
+    SHA256_SCR(25);
+    SHA256_SCR(26);
+    SHA256_SCR(27);
+    SHA256_SCR(28);
+    SHA256_SCR(29);
+    SHA256_SCR(30);
+    SHA256_SCR(31);
+    SHA256_SCR(32);
+    SHA256_SCR(33);
+    SHA256_SCR(34);
+    SHA256_SCR(35);
+    SHA256_SCR(36);
+    SHA256_SCR(37);
+    SHA256_SCR(38);
+    SHA256_SCR(39);
+    SHA256_SCR(40);
+    SHA256_SCR(41);
+    SHA256_SCR(42);
+    SHA256_SCR(43);
+    SHA256_SCR(44);
+    SHA256_SCR(45);
+    SHA256_SCR(46);
+    SHA256_SCR(47);
+    SHA256_SCR(48);
+    SHA256_SCR(49);
+    SHA256_SCR(50);
+    SHA256_SCR(51);
+    SHA256_SCR(52);
+    SHA256_SCR(53);
+    SHA256_SCR(54);
+    SHA256_SCR(55);
+    SHA256_SCR(56);
+    SHA256_SCR(57);
+    SHA256_SCR(58);
+    SHA256_SCR(59);
+    SHA256_SCR(60);
+    SHA256_SCR(61);
+    SHA256_SCR(62);
+    SHA256_SCR(63);
+
+    wv[0] = ctx->h[0];
+    wv[1] = ctx->h[1];
+    wv[2] = ctx->h[2];
+    wv[3] = ctx->h[3];
+    wv[4] = ctx->h[4];
+    wv[5] = ctx->h[5];
+    wv[6] = ctx->h[6];
+    wv[7] = ctx->h[7];
+
+    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 0);
+    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 1);
+    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 2);
+    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 3);
+    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 4);
+    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 5);
+    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 6);
+    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 7);
+    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 8);
+    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 9);
+    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 10);
+    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 11);
+    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 12);
+    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 13);
+    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 14);
+    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 15);
+    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 16);
+    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 17);
+    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 18);
+    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 19);
+    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 20);
+    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 21);
+    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 22);
+    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 23);
+    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 24);
+    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 25);
+    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 26);
+    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 27);
+    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 28);
+    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 29);
+    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 30);
+    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 31);
+    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 32);
+    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 33);
+    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 34);
+    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 35);
+    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 36);
+    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 37);
+    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 38);
+    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 39);
+    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 40);
+    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 41);
+    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 42);
+    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 43);
+    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 44);
+    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 45);
+    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 46);
+    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 47);
+    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 48);
+    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 49);
+    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 50);
+    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 51);
+    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 52);
+    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 53);
+    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 54);
+    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 55);
+    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 56);
+    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 57);
+    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 58);
+    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 59);
+    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 60);
+    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 61);
+    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 62);
+    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 63);
+
+    ctx->h[0] += wv[0];
+    ctx->h[1] += wv[1];
+    ctx->h[2] += wv[2];
+    ctx->h[3] += wv[3];
+    ctx->h[4] += wv[4];
+    ctx->h[5] += wv[5];
+    ctx->h[6] += wv[6];
+    ctx->h[7] += wv[7];
+#endif /* !UNROLL_LOOPS */
+  }
+}
+
+void avb_sha256_update(AvbSHA256Ctx* ctx, const uint8_t* data, uint32_t len) {
+  unsigned int block_nb;
+  unsigned int new_len, rem_len, tmp_len;
+  const uint8_t* shifted_data;
+
+  tmp_len = AVB_SHA256_BLOCK_SIZE - ctx->len;
+  rem_len = len < tmp_len ? len : tmp_len;
+
+  avb_memcpy(&ctx->block[ctx->len], data, rem_len);
+
+  if (ctx->len + len < AVB_SHA256_BLOCK_SIZE) {
+    ctx->len += len;
+    return;
+  }
+
+  new_len = len - rem_len;
+  block_nb = new_len / AVB_SHA256_BLOCK_SIZE;
+
+  shifted_data = data + rem_len;
+
+  SHA256_transform(ctx, ctx->block, 1);
+  SHA256_transform(ctx, shifted_data, block_nb);
+
+  rem_len = new_len % AVB_SHA256_BLOCK_SIZE;
+
+  avb_memcpy(ctx->block, &shifted_data[block_nb << 6], rem_len);
+
+  ctx->len = rem_len;
+  ctx->tot_len += (block_nb + 1) << 6;
+}
+
+uint8_t* avb_sha256_final(AvbSHA256Ctx* ctx) {
+  unsigned int block_nb;
+  unsigned int pm_len;
+  unsigned int len_b;
+#ifndef UNROLL_LOOPS
+  int i;
+#endif
+
+  block_nb =
+      (1 + ((AVB_SHA256_BLOCK_SIZE - 9) < (ctx->len % AVB_SHA256_BLOCK_SIZE)));
+
+  len_b = (ctx->tot_len + ctx->len) << 3;
+  pm_len = block_nb << 6;
+
+  avb_memset(ctx->block + ctx->len, 0, pm_len - ctx->len);
+  ctx->block[ctx->len] = 0x80;
+  UNPACK32(len_b, ctx->block + pm_len - 4);
+
+  SHA256_transform(ctx, ctx->block, block_nb);
+
+#ifndef UNROLL_LOOPS
+  for (i = 0; i < 8; i++) {
+    UNPACK32(ctx->h[i], &ctx->buf[i << 2]);
+  }
+#else
+  UNPACK32(ctx->h[0], &ctx->buf[0]);
+  UNPACK32(ctx->h[1], &ctx->buf[4]);
+  UNPACK32(ctx->h[2], &ctx->buf[8]);
+  UNPACK32(ctx->h[3], &ctx->buf[12]);
+  UNPACK32(ctx->h[4], &ctx->buf[16]);
+  UNPACK32(ctx->h[5], &ctx->buf[20]);
+  UNPACK32(ctx->h[6], &ctx->buf[24]);
+  UNPACK32(ctx->h[7], &ctx->buf[28]);
+#endif /* !UNROLL_LOOPS */
+
+  return ctx->buf;
+}
diff --git a/lib/avb/rk_libavb/avb_sha512.c b/lib/avb/rk_libavb/avb_sha512.c
new file mode 100644
index 0000000000..cb4a2eeb41
--- /dev/null
+++ b/lib/avb/rk_libavb/avb_sha512.c
@@ -0,0 +1,388 @@
+/* SHA-256 and SHA-512 implementation based on code by Oliver Gay
+ * <olivier.gay@a3.epfl.ch> under a BSD-style license. See below.
+ */
+
+/*
+ * FIPS 180-2 SHA-224/256/384/512 implementation
+ * Last update: 02/02/2007
+ * Issue date:  04/30/2005
+ *
+ * Copyright (C) 2005, 2007 Olivier Gay <olivier.gay@a3.epfl.ch>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the project nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE PROJECT AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE PROJECT OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <android_avb/avb_sha.h>
+
+#define SHFR(x, n) (x >> n)
+#define ROTR(x, n) ((x >> n) | (x << ((sizeof(x) << 3) - n)))
+#define ROTL(x, n) ((x << n) | (x >> ((sizeof(x) << 3) - n)))
+#define CH(x, y, z) ((x & y) ^ (~x & z))
+#define MAJ(x, y, z) ((x & y) ^ (x & z) ^ (y & z))
+
+#define SHA512_F1(x) (ROTR(x, 28) ^ ROTR(x, 34) ^ ROTR(x, 39))
+#define SHA512_F2(x) (ROTR(x, 14) ^ ROTR(x, 18) ^ ROTR(x, 41))
+#define SHA512_F3(x) (ROTR(x, 1) ^ ROTR(x, 8) ^ SHFR(x, 7))
+#define SHA512_F4(x) (ROTR(x, 19) ^ ROTR(x, 61) ^ SHFR(x, 6))
+
+#define UNPACK32(x, str)                 \
+  {                                      \
+    *((str) + 3) = (uint8_t)((x));       \
+    *((str) + 2) = (uint8_t)((x) >> 8);  \
+    *((str) + 1) = (uint8_t)((x) >> 16); \
+    *((str) + 0) = (uint8_t)((x) >> 24); \
+  }
+
+#define UNPACK64(x, str)                         \
+  {                                              \
+    *((str) + 7) = (uint8_t)x;                   \
+    *((str) + 6) = (uint8_t)((uint64_t)x >> 8);  \
+    *((str) + 5) = (uint8_t)((uint64_t)x >> 16); \
+    *((str) + 4) = (uint8_t)((uint64_t)x >> 24); \
+    *((str) + 3) = (uint8_t)((uint64_t)x >> 32); \
+    *((str) + 2) = (uint8_t)((uint64_t)x >> 40); \
+    *((str) + 1) = (uint8_t)((uint64_t)x >> 48); \
+    *((str) + 0) = (uint8_t)((uint64_t)x >> 56); \
+  }
+
+#define PACK64(str, x)                                                        \
+  {                                                                           \
+    *(x) =                                                                    \
+        ((uint64_t) * ((str) + 7)) | ((uint64_t) * ((str) + 6) << 8) |        \
+        ((uint64_t) * ((str) + 5) << 16) | ((uint64_t) * ((str) + 4) << 24) | \
+        ((uint64_t) * ((str) + 3) << 32) | ((uint64_t) * ((str) + 2) << 40) | \
+        ((uint64_t) * ((str) + 1) << 48) | ((uint64_t) * ((str) + 0) << 56);  \
+  }
+
+/* Macros used for loops unrolling */
+
+#define SHA512_SCR(i) \
+  { w[i] = SHA512_F4(w[i - 2]) + w[i - 7] + SHA512_F3(w[i - 15]) + w[i - 16]; }
+
+#define SHA512_EXP(a, b, c, d, e, f, g, h, j)                               \
+  {                                                                         \
+    t1 = wv[h] + SHA512_F2(wv[e]) + CH(wv[e], wv[f], wv[g]) + sha512_k[j] + \
+         w[j];                                                              \
+    t2 = SHA512_F1(wv[a]) + MAJ(wv[a], wv[b], wv[c]);                       \
+    wv[d] += t1;                                                            \
+    wv[h] = t1 + t2;                                                        \
+  }
+
+static const uint64_t sha512_h0[8] = {0x6a09e667f3bcc908ULL,
+                                      0xbb67ae8584caa73bULL,
+                                      0x3c6ef372fe94f82bULL,
+                                      0xa54ff53a5f1d36f1ULL,
+                                      0x510e527fade682d1ULL,
+                                      0x9b05688c2b3e6c1fULL,
+                                      0x1f83d9abfb41bd6bULL,
+                                      0x5be0cd19137e2179ULL};
+
+static const uint64_t sha512_k[80] = {
+    0x428a2f98d728ae22ULL, 0x7137449123ef65cdULL, 0xb5c0fbcfec4d3b2fULL,
+    0xe9b5dba58189dbbcULL, 0x3956c25bf348b538ULL, 0x59f111f1b605d019ULL,
+    0x923f82a4af194f9bULL, 0xab1c5ed5da6d8118ULL, 0xd807aa98a3030242ULL,
+    0x12835b0145706fbeULL, 0x243185be4ee4b28cULL, 0x550c7dc3d5ffb4e2ULL,
+    0x72be5d74f27b896fULL, 0x80deb1fe3b1696b1ULL, 0x9bdc06a725c71235ULL,
+    0xc19bf174cf692694ULL, 0xe49b69c19ef14ad2ULL, 0xefbe4786384f25e3ULL,
+    0x0fc19dc68b8cd5b5ULL, 0x240ca1cc77ac9c65ULL, 0x2de92c6f592b0275ULL,
+    0x4a7484aa6ea6e483ULL, 0x5cb0a9dcbd41fbd4ULL, 0x76f988da831153b5ULL,
+    0x983e5152ee66dfabULL, 0xa831c66d2db43210ULL, 0xb00327c898fb213fULL,
+    0xbf597fc7beef0ee4ULL, 0xc6e00bf33da88fc2ULL, 0xd5a79147930aa725ULL,
+    0x06ca6351e003826fULL, 0x142929670a0e6e70ULL, 0x27b70a8546d22ffcULL,
+    0x2e1b21385c26c926ULL, 0x4d2c6dfc5ac42aedULL, 0x53380d139d95b3dfULL,
+    0x650a73548baf63deULL, 0x766a0abb3c77b2a8ULL, 0x81c2c92e47edaee6ULL,
+    0x92722c851482353bULL, 0xa2bfe8a14cf10364ULL, 0xa81a664bbc423001ULL,
+    0xc24b8b70d0f89791ULL, 0xc76c51a30654be30ULL, 0xd192e819d6ef5218ULL,
+    0xd69906245565a910ULL, 0xf40e35855771202aULL, 0x106aa07032bbd1b8ULL,
+    0x19a4c116b8d2d0c8ULL, 0x1e376c085141ab53ULL, 0x2748774cdf8eeb99ULL,
+    0x34b0bcb5e19b48a8ULL, 0x391c0cb3c5c95a63ULL, 0x4ed8aa4ae3418acbULL,
+    0x5b9cca4f7763e373ULL, 0x682e6ff3d6b2b8a3ULL, 0x748f82ee5defb2fcULL,
+    0x78a5636f43172f60ULL, 0x84c87814a1f0ab72ULL, 0x8cc702081a6439ecULL,
+    0x90befffa23631e28ULL, 0xa4506cebde82bde9ULL, 0xbef9a3f7b2c67915ULL,
+    0xc67178f2e372532bULL, 0xca273eceea26619cULL, 0xd186b8c721c0c207ULL,
+    0xeada7dd6cde0eb1eULL, 0xf57d4f7fee6ed178ULL, 0x06f067aa72176fbaULL,
+    0x0a637dc5a2c898a6ULL, 0x113f9804bef90daeULL, 0x1b710b35131c471bULL,
+    0x28db77f523047d84ULL, 0x32caab7b40c72493ULL, 0x3c9ebe0a15c9bebcULL,
+    0x431d67c49c100d4cULL, 0x4cc5d4becb3e42b6ULL, 0x597f299cfc657e2aULL,
+    0x5fcb6fab3ad6faecULL, 0x6c44198c4a475817ULL};
+
+/* SHA-512 implementation */
+
+void avb_sha512_init(AvbSHA512Ctx* ctx) {
+#ifdef UNROLL_LOOPS_SHA512
+  ctx->h[0] = sha512_h0[0];
+  ctx->h[1] = sha512_h0[1];
+  ctx->h[2] = sha512_h0[2];
+  ctx->h[3] = sha512_h0[3];
+  ctx->h[4] = sha512_h0[4];
+  ctx->h[5] = sha512_h0[5];
+  ctx->h[6] = sha512_h0[6];
+  ctx->h[7] = sha512_h0[7];
+#else
+  int i;
+
+  for (i = 0; i < 8; i++)
+    ctx->h[i] = sha512_h0[i];
+#endif /* UNROLL_LOOPS_SHA512 */
+
+  ctx->len = 0;
+  ctx->tot_len = 0;
+}
+
+static void SHA512_transform(AvbSHA512Ctx* ctx,
+                             const uint8_t* message,
+                             unsigned int block_nb) {
+  uint64_t w[80];
+  uint64_t wv[8];
+  uint64_t t1, t2;
+  const uint8_t* sub_block;
+  int i, j;
+
+  for (i = 0; i < (int)block_nb; i++) {
+    sub_block = message + (i << 7);
+
+#ifdef UNROLL_LOOPS_SHA512
+    PACK64(&sub_block[0], &w[0]);
+    PACK64(&sub_block[8], &w[1]);
+    PACK64(&sub_block[16], &w[2]);
+    PACK64(&sub_block[24], &w[3]);
+    PACK64(&sub_block[32], &w[4]);
+    PACK64(&sub_block[40], &w[5]);
+    PACK64(&sub_block[48], &w[6]);
+    PACK64(&sub_block[56], &w[7]);
+    PACK64(&sub_block[64], &w[8]);
+    PACK64(&sub_block[72], &w[9]);
+    PACK64(&sub_block[80], &w[10]);
+    PACK64(&sub_block[88], &w[11]);
+    PACK64(&sub_block[96], &w[12]);
+    PACK64(&sub_block[104], &w[13]);
+    PACK64(&sub_block[112], &w[14]);
+    PACK64(&sub_block[120], &w[15]);
+
+    SHA512_SCR(16);
+    SHA512_SCR(17);
+    SHA512_SCR(18);
+    SHA512_SCR(19);
+    SHA512_SCR(20);
+    SHA512_SCR(21);
+    SHA512_SCR(22);
+    SHA512_SCR(23);
+    SHA512_SCR(24);
+    SHA512_SCR(25);
+    SHA512_SCR(26);
+    SHA512_SCR(27);
+    SHA512_SCR(28);
+    SHA512_SCR(29);
+    SHA512_SCR(30);
+    SHA512_SCR(31);
+    SHA512_SCR(32);
+    SHA512_SCR(33);
+    SHA512_SCR(34);
+    SHA512_SCR(35);
+    SHA512_SCR(36);
+    SHA512_SCR(37);
+    SHA512_SCR(38);
+    SHA512_SCR(39);
+    SHA512_SCR(40);
+    SHA512_SCR(41);
+    SHA512_SCR(42);
+    SHA512_SCR(43);
+    SHA512_SCR(44);
+    SHA512_SCR(45);
+    SHA512_SCR(46);
+    SHA512_SCR(47);
+    SHA512_SCR(48);
+    SHA512_SCR(49);
+    SHA512_SCR(50);
+    SHA512_SCR(51);
+    SHA512_SCR(52);
+    SHA512_SCR(53);
+    SHA512_SCR(54);
+    SHA512_SCR(55);
+    SHA512_SCR(56);
+    SHA512_SCR(57);
+    SHA512_SCR(58);
+    SHA512_SCR(59);
+    SHA512_SCR(60);
+    SHA512_SCR(61);
+    SHA512_SCR(62);
+    SHA512_SCR(63);
+    SHA512_SCR(64);
+    SHA512_SCR(65);
+    SHA512_SCR(66);
+    SHA512_SCR(67);
+    SHA512_SCR(68);
+    SHA512_SCR(69);
+    SHA512_SCR(70);
+    SHA512_SCR(71);
+    SHA512_SCR(72);
+    SHA512_SCR(73);
+    SHA512_SCR(74);
+    SHA512_SCR(75);
+    SHA512_SCR(76);
+    SHA512_SCR(77);
+    SHA512_SCR(78);
+    SHA512_SCR(79);
+
+    wv[0] = ctx->h[0];
+    wv[1] = ctx->h[1];
+    wv[2] = ctx->h[2];
+    wv[3] = ctx->h[3];
+    wv[4] = ctx->h[4];
+    wv[5] = ctx->h[5];
+    wv[6] = ctx->h[6];
+    wv[7] = ctx->h[7];
+
+    j = 0;
+
+    do {
+      SHA512_EXP(0, 1, 2, 3, 4, 5, 6, 7, j);
+      j++;
+      SHA512_EXP(7, 0, 1, 2, 3, 4, 5, 6, j);
+      j++;
+      SHA512_EXP(6, 7, 0, 1, 2, 3, 4, 5, j);
+      j++;
+      SHA512_EXP(5, 6, 7, 0, 1, 2, 3, 4, j);
+      j++;
+      SHA512_EXP(4, 5, 6, 7, 0, 1, 2, 3, j);
+      j++;
+      SHA512_EXP(3, 4, 5, 6, 7, 0, 1, 2, j);
+      j++;
+      SHA512_EXP(2, 3, 4, 5, 6, 7, 0, 1, j);
+      j++;
+      SHA512_EXP(1, 2, 3, 4, 5, 6, 7, 0, j);
+      j++;
+    } while (j < 80);
+
+    ctx->h[0] += wv[0];
+    ctx->h[1] += wv[1];
+    ctx->h[2] += wv[2];
+    ctx->h[3] += wv[3];
+    ctx->h[4] += wv[4];
+    ctx->h[5] += wv[5];
+    ctx->h[6] += wv[6];
+    ctx->h[7] += wv[7];
+#else
+    for (j = 0; j < 16; j++) {
+      PACK64(&sub_block[j << 3], &w[j]);
+    }
+
+    for (j = 16; j < 80; j++) {
+      SHA512_SCR(j);
+    }
+
+    for (j = 0; j < 8; j++) {
+      wv[j] = ctx->h[j];
+    }
+
+    for (j = 0; j < 80; j++) {
+      t1 = wv[7] + SHA512_F2(wv[4]) + CH(wv[4], wv[5], wv[6]) + sha512_k[j] +
+           w[j];
+      t2 = SHA512_F1(wv[0]) + MAJ(wv[0], wv[1], wv[2]);
+      wv[7] = wv[6];
+      wv[6] = wv[5];
+      wv[5] = wv[4];
+      wv[4] = wv[3] + t1;
+      wv[3] = wv[2];
+      wv[2] = wv[1];
+      wv[1] = wv[0];
+      wv[0] = t1 + t2;
+    }
+
+    for (j = 0; j < 8; j++)
+      ctx->h[j] += wv[j];
+#endif /* UNROLL_LOOPS_SHA512 */
+  }
+}
+
+void avb_sha512_update(AvbSHA512Ctx* ctx, const uint8_t* data, uint32_t len) {
+  unsigned int block_nb;
+  unsigned int new_len, rem_len, tmp_len;
+  const uint8_t* shifted_data;
+
+  tmp_len = AVB_SHA512_BLOCK_SIZE - ctx->len;
+  rem_len = len < tmp_len ? len : tmp_len;
+
+  avb_memcpy(&ctx->block[ctx->len], data, rem_len);
+
+  if (ctx->len + len < AVB_SHA512_BLOCK_SIZE) {
+    ctx->len += len;
+    return;
+  }
+
+  new_len = len - rem_len;
+  block_nb = new_len / AVB_SHA512_BLOCK_SIZE;
+
+  shifted_data = data + rem_len;
+
+  SHA512_transform(ctx, ctx->block, 1);
+  SHA512_transform(ctx, shifted_data, block_nb);
+
+  rem_len = new_len % AVB_SHA512_BLOCK_SIZE;
+
+  avb_memcpy(ctx->block, &shifted_data[block_nb << 7], rem_len);
+
+  ctx->len = rem_len;
+  ctx->tot_len += (block_nb + 1) << 7;
+}
+
+uint8_t* avb_sha512_final(AvbSHA512Ctx* ctx) {
+  unsigned int block_nb;
+  unsigned int pm_len;
+  unsigned int len_b;
+
+#ifndef UNROLL_LOOPS_SHA512
+  int i;
+#endif
+
+  block_nb =
+      1 + ((AVB_SHA512_BLOCK_SIZE - 17) < (ctx->len % AVB_SHA512_BLOCK_SIZE));
+
+  len_b = (ctx->tot_len + ctx->len) << 3;
+  pm_len = block_nb << 7;
+
+  avb_memset(ctx->block + ctx->len, 0, pm_len - ctx->len);
+  ctx->block[ctx->len] = 0x80;
+  UNPACK32(len_b, ctx->block + pm_len - 4);
+
+  SHA512_transform(ctx, ctx->block, block_nb);
+
+#ifdef UNROLL_LOOPS_SHA512
+  UNPACK64(ctx->h[0], &ctx->buf[0]);
+  UNPACK64(ctx->h[1], &ctx->buf[8]);
+  UNPACK64(ctx->h[2], &ctx->buf[16]);
+  UNPACK64(ctx->h[3], &ctx->buf[24]);
+  UNPACK64(ctx->h[4], &ctx->buf[32]);
+  UNPACK64(ctx->h[5], &ctx->buf[40]);
+  UNPACK64(ctx->h[6], &ctx->buf[48]);
+  UNPACK64(ctx->h[7], &ctx->buf[56]);
+#else
+  for (i = 0; i < 8; i++)
+    UNPACK64(ctx->h[i], &ctx->buf[i << 3]);
+#endif /* UNROLL_LOOPS_SHA512 */
+
+  return ctx->buf;
+}
diff --git a/lib/avb/rk_libavb/avb_slot_verify.c b/lib/avb/rk_libavb/avb_slot_verify.c
new file mode 100644
index 0000000000..aab33d9657
--- /dev/null
+++ b/lib/avb/rk_libavb/avb_slot_verify.c
@@ -0,0 +1,1465 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_slot_verify.h>
+#include <android_avb/avb_chain_partition_descriptor.h>
+#include <android_avb/avb_footer.h>
+#include <android_avb/avb_hash_descriptor.h>
+#include <android_avb/avb_kernel_cmdline_descriptor.h>
+#include <android_avb/avb_sha.h>
+#include <android_avb/avb_util.h>
+#include <android_avb/avb_vbmeta_image.h>
+#include <android_avb/avb_version.h>
+
+/* Maximum allow length (in bytes) of a partition name, including
+ * ab_suffix.
+ */
+#define PART_NAME_MAX_SIZE 32
+
+/* Maximum number of partitions that can be loaded with avb_slot_verify(). */
+#define MAX_NUMBER_OF_LOADED_PARTITIONS 32
+
+/* Maximum number of vbmeta images that can be loaded with avb_slot_verify(). */
+#define MAX_NUMBER_OF_VBMETA_IMAGES 32
+
+/* Maximum size of a vbmeta image - 64 KiB. */
+#define VBMETA_MAX_SIZE (64 * 1024)
+
+/* Helper function to see if we should continue with verification in
+ * allow_verification_error=true mode if something goes wrong. See the
+ * comments for the avb_slot_verify() function for more information.
+ */
+static inline bool result_should_continue(AvbSlotVerifyResult result)
+{
+	switch (result) {
+	case AVB_SLOT_VERIFY_RESULT_ERROR_OOM:
+	case AVB_SLOT_VERIFY_RESULT_ERROR_IO:
+	case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA:
+	case AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION:
+	case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT:
+		return false;
+
+	case AVB_SLOT_VERIFY_RESULT_OK:
+	case AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION:
+	case AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX:
+	case AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED:
+		return true;
+  }
+
+  return false;
+}
+
+static AvbSlotVerifyResult load_and_verify_hash_partition(
+    AvbOps* ops,
+    const char* const* requested_partitions,
+    const char* ab_suffix,
+    bool allow_verification_error,
+    const AvbDescriptor* descriptor,
+    AvbSlotVerifyData* slot_data)
+{
+	AvbHashDescriptor hash_desc;
+	const uint8_t* desc_partition_name = NULL;
+	const uint8_t* desc_salt;
+	const uint8_t* desc_digest;
+	char part_name[PART_NAME_MAX_SIZE];
+	AvbSlotVerifyResult ret;
+	AvbIOResult io_ret;
+	uint8_t* image_buf = NULL;
+	size_t part_num_read;
+	uint8_t* digest;
+	size_t digest_len;
+	const char* found;
+	uint64_t image_size;
+
+	if (!avb_hash_descriptor_validate_and_byteswap(
+		(const AvbHashDescriptor*)descriptor, &hash_desc)) {
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+		goto out;
+	}
+	desc_partition_name = ((const uint8_t*)descriptor) + sizeof(AvbHashDescriptor);
+	desc_salt = desc_partition_name + hash_desc.partition_name_len;
+	desc_digest = desc_salt + hash_desc.salt_len;
+
+	if (!avb_validate_utf8(desc_partition_name, hash_desc.partition_name_len)) {
+		avb_error("Partition name is not valid UTF-8.\n");
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+		goto out;
+	}
+	/* Don't bother loading or validating unless the partition was
+	 * requested in the first place.
+	 */
+	found = avb_strv_find_str(requested_partitions,
+                            (const char*)desc_partition_name,
+                            hash_desc.partition_name_len);
+	if (found == NULL) {
+		ret = AVB_SLOT_VERIFY_RESULT_OK;
+		goto out;
+	}
+	if (!avb_str_concat(part_name,
+                      sizeof part_name,
+                      (const char*)desc_partition_name,
+                      hash_desc.partition_name_len,
+                      ab_suffix,
+                      avb_strlen(ab_suffix))) {
+		avb_error("Partition name and suffix does not fit.\n");
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+		goto out;
+	}
+	/* If we're allowing verification errors then hash_desc.image_size
+	 * may no longer match what's in the partition... so in this case
+	 * just load the entire partition.
+	 *
+	 * For example, this can happen if a developer does 'fastboot flash
+	 * boot /path/to/new/and/bigger/boot.img'. We want this to work
+	 * since it's such a common workflow.
+	 */
+	image_size = hash_desc.image_size;
+	if (allow_verification_error) {
+		if (ops->get_size_of_partition == NULL) {
+			avb_errorv(part_name,
+			": The get_size_of_partition() operation is "
+			"not implemented so we may not load the entire partition. "
+			"Please implement.",
+			NULL);
+		} else {
+			io_ret = ops->get_size_of_partition(ops, part_name, &image_size);
+			if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+				ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+				goto out;
+			} else if (io_ret != AVB_IO_RESULT_OK) {
+				avb_errorv(part_name, ": Error determining partition size.\n", NULL);
+				ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+				goto out;
+			}
+			avb_debugv(part_name, ": Loading entire partition.\n", NULL);
+		}
+	}
+	image_buf = avb_malloc(image_size);
+	if (image_buf == NULL) {
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+		goto out;
+	}
+	io_ret = ops->read_from_partition(ops, part_name, 0 /* offset */, 
+					image_size, image_buf, &part_num_read);
+	if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+		goto out;
+	} else if (io_ret != AVB_IO_RESULT_OK) {
+		avb_errorv(part_name, ": Error loading data from partition.\n", NULL);
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+		goto out;
+	}
+	if (part_num_read != image_size) {
+		avb_errorv(part_name, ": Read fewer than requested bytes.\n", NULL);
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+		goto out;
+	}
+
+	if (avb_strcmp((const char*)hash_desc.hash_algorithm, "sha256") == 0) {
+		AvbSHA256Ctx sha256_ctx;
+		avb_sha256_init(&sha256_ctx);
+		avb_sha256_update(&sha256_ctx, desc_salt, hash_desc.salt_len);
+		avb_sha256_update(&sha256_ctx, image_buf, hash_desc.image_size);
+		digest = avb_sha256_final(&sha256_ctx);
+		digest_len = AVB_SHA256_DIGEST_SIZE;
+	} else if (avb_strcmp((const char*)hash_desc.hash_algorithm, "sha512") == 0) {
+		AvbSHA512Ctx sha512_ctx;
+		avb_sha512_init(&sha512_ctx);
+		avb_sha512_update(&sha512_ctx, desc_salt, hash_desc.salt_len);
+		avb_sha512_update(&sha512_ctx, image_buf, hash_desc.image_size);
+		digest = avb_sha512_final(&sha512_ctx);
+		digest_len = AVB_SHA512_DIGEST_SIZE;
+	} else {
+		avb_errorv(part_name, ": Unsupported hash algorithm.\n", NULL);
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+		goto out;
+	}
+
+	if (digest_len != hash_desc.digest_len) {
+		avb_errorv(
+			part_name, ": Digest in descriptor not of expected size.\n", NULL);
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+		goto out;
+	}
+
+	if (avb_safe_memcmp(digest, desc_digest, digest_len) != 0) {
+		avb_errorv(part_name,
+			": Hash of data does not match digest in descriptor.\n",
+			NULL);
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION;
+		goto out;
+	}
+
+	ret = AVB_SLOT_VERIFY_RESULT_OK;
+
+out:
+	/* If it worked and something was loaded, copy to slot_data. */
+	if ((ret == AVB_SLOT_VERIFY_RESULT_OK || result_should_continue(ret)) &&
+		image_buf != NULL) {
+		AvbPartitionData* loaded_partition;
+		if (slot_data->num_loaded_partitions == MAX_NUMBER_OF_LOADED_PARTITIONS) {
+			avb_errorv(part_name, ": Too many loaded partitions.\n", NULL);
+			ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+			goto fail;
+		}
+		loaded_partition = &slot_data->loaded_partitions[slot_data->num_loaded_partitions++];
+		loaded_partition->partition_name = avb_strdup(found);
+		loaded_partition->data_size = image_size;
+		loaded_partition->data = image_buf;
+		image_buf = NULL;
+	}
+
+fail:
+	if (image_buf != NULL) {
+		avb_free(image_buf);
+	}
+	return ret;
+}
+
+static AvbSlotVerifyResult load_requested_partitions(
+	AvbOps* ops,
+	const char* const* requested_partitions,
+	const char* ab_suffix,
+	AvbSlotVerifyData* slot_data)
+{
+	AvbSlotVerifyResult ret;
+	uint8_t* image_buf = NULL;
+	size_t n;
+
+	if (ops->get_size_of_partition == NULL) {
+		avb_error("get_size_of_partition() not implemented.\n");
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT;
+		goto out;
+	}
+
+	for (n = 0; requested_partitions[n] != NULL; n++) {
+		char part_name[PART_NAME_MAX_SIZE];
+		AvbIOResult io_ret;
+		uint64_t image_size;
+		size_t part_num_read;
+		AvbPartitionData* loaded_partition;
+
+		if (!avb_str_concat(part_name,
+                        sizeof part_name,
+                        requested_partitions[n],
+                        avb_strlen(requested_partitions[n]),
+                        ab_suffix,
+                        avb_strlen(ab_suffix))) {
+ 			avb_error("Partition name and suffix does not fit.\n");
+			ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+			goto out;
+		}
+
+		io_ret = ops->get_size_of_partition(ops, part_name, &image_size);
+		if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+			ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+			goto out;
+		} else if (io_ret != AVB_IO_RESULT_OK) {
+			avb_errorv(part_name, ": Error determining partition size.\n", NULL);
+			ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+			goto out;
+		}
+		avb_debugv(part_name, ": Loading entire partition.\n", NULL);
+
+		image_buf = avb_malloc(image_size);
+		if (image_buf == NULL) {
+			ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+			goto out;
+		}
+
+		io_ret = ops->read_from_partition(
+		ops, part_name, 0 /* offset */, image_size, image_buf, &part_num_read);
+		if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+			ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+			goto out;
+		} else if (io_ret != AVB_IO_RESULT_OK) {
+			avb_errorv(part_name, ": Error loading data from partition.\n", NULL);
+			ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+			goto out;
+		}
+		if (part_num_read != image_size) {
+			avb_errorv(part_name, ": Read fewer than requested bytes.\n", NULL);
+			ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+			goto out;
+		}
+
+		/* Move to slot_data. */
+		if (slot_data->num_loaded_partitions == MAX_NUMBER_OF_LOADED_PARTITIONS) {
+			avb_errorv(part_name, ": Too many loaded partitions.\n", NULL);
+			ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+			goto out;
+		}
+		loaded_partition =
+			&slot_data->loaded_partitions[slot_data->num_loaded_partitions++];
+		loaded_partition->partition_name = avb_strdup(requested_partitions[n]);
+		if (loaded_partition->partition_name == NULL) {
+			ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+			goto out;
+		}
+		loaded_partition->data_size = image_size;
+		loaded_partition->data = image_buf;
+		image_buf = NULL;
+	}
+
+	ret = AVB_SLOT_VERIFY_RESULT_OK;
+
+out:
+	if (image_buf != NULL) {
+		avb_free(image_buf);
+	}
+	return ret;
+}
+
+static AvbSlotVerifyResult load_and_verify_vbmeta
+(
+	AvbOps* ops,
+	const char* const* requested_partitions,
+	const char* ab_suffix,
+	bool allow_verification_error,
+	AvbVBMetaImageFlags toplevel_vbmeta_flags,
+	int rollback_index_location,
+	const char* partition_name,
+	size_t partition_name_len,
+	const uint8_t* expected_public_key,
+	size_t expected_public_key_length,
+	AvbSlotVerifyData* slot_data,
+	AvbAlgorithmType* out_algorithm_type)
+{
+	char full_partition_name[PART_NAME_MAX_SIZE];
+	AvbSlotVerifyResult ret;
+	AvbIOResult io_ret;
+	size_t vbmeta_offset;
+	size_t vbmeta_size;
+	uint8_t* vbmeta_buf = NULL;
+	size_t vbmeta_num_read;
+	AvbVBMetaVerifyResult vbmeta_ret;
+	const uint8_t* pk_data;
+	size_t pk_len;
+	AvbVBMetaImageHeader vbmeta_header;
+	uint64_t stored_rollback_index;
+	const AvbDescriptor** descriptors = NULL;
+	size_t num_descriptors;
+	size_t n;
+	bool is_main_vbmeta;
+	bool is_vbmeta_partition;
+	AvbVBMetaData* vbmeta_image_data = NULL;
+
+	ret = AVB_SLOT_VERIFY_RESULT_OK;
+
+	avb_assert(slot_data != NULL);
+
+	/* Since we allow top-level vbmeta in 'boot', use
+	 * rollback_index_location to determine whether we're the main
+	 * vbmeta struct.
+	 */
+	is_main_vbmeta = (rollback_index_location == 0);
+	is_vbmeta_partition = (avb_strcmp(partition_name, "vbmeta") == 0);
+
+	if (!avb_validate_utf8((const uint8_t*)partition_name, partition_name_len)) {
+		avb_error("Partition name is not valid UTF-8.\n");
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+		goto out;
+	}
+
+	/* Construct full partition name. */
+	if (!avb_str_concat(full_partition_name,
+		sizeof full_partition_name,
+		partition_name,
+		partition_name_len,
+		ab_suffix,
+		avb_strlen(ab_suffix))) {
+		avb_error("Partition name and suffix does not fit.\n");
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+		goto out;
+	}
+
+	avb_debugv("Loading vbmeta struct from partition '",
+		full_partition_name,
+		"'.\n",
+		NULL);
+
+	/* If we're loading from the main vbmeta partition, the vbmeta
+	 * struct is in the beginning. Otherwise we have to locate it via a
+	 * footer.
+	 */
+	if (is_vbmeta_partition) {
+		vbmeta_offset = 0;
+		vbmeta_size = VBMETA_MAX_SIZE;
+	} else {
+		uint8_t footer_buf[AVB_FOOTER_SIZE];
+		size_t footer_num_read;
+		AvbFooter footer;
+
+		io_ret = ops->read_from_partition(ops,
+					full_partition_name,
+					-AVB_FOOTER_SIZE,
+					AVB_FOOTER_SIZE,
+					footer_buf,
+					&footer_num_read);
+		if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+			ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+			goto out;
+		} else if (io_ret != AVB_IO_RESULT_OK) {
+			avb_errorv(full_partition_name, ": Error loading footer.\n", NULL);
+			ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+			goto out;
+		}
+		avb_assert(footer_num_read == AVB_FOOTER_SIZE);
+
+		if (!avb_footer_validate_and_byteswap((const AvbFooter*)footer_buf,&footer)) {
+			avb_errorv(full_partition_name, ": Error validating footer.\n", NULL);
+			ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+			goto out;
+		}
+
+		/* Basic footer sanity check since the data is untrusted. */
+		if (footer.vbmeta_size > VBMETA_MAX_SIZE) {
+			avb_errorv(full_partition_name, ": Invalid vbmeta size in footer.\n", NULL);
+			ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+			goto out;
+		}
+
+		vbmeta_offset = footer.vbmeta_offset;
+		vbmeta_size = footer.vbmeta_size;
+	}
+
+	vbmeta_buf = avb_malloc(vbmeta_size);
+	if (vbmeta_buf == NULL) {
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+		goto out;
+	}
+	io_ret = ops->read_from_partition(ops,
+					full_partition_name,
+					vbmeta_offset,
+					vbmeta_size,
+					vbmeta_buf,
+					&vbmeta_num_read);
+	if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+		goto out;
+	} else if (io_ret != AVB_IO_RESULT_OK) {
+		/* If we're looking for 'vbmeta' but there is no such partition,
+		* go try to get it from the boot partition instead.
+		*/
+		if (is_main_vbmeta && io_ret == AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION && is_vbmeta_partition) {
+			avb_debugv(full_partition_name,
+			": No such partition. Trying 'boot' instead.\n",
+			NULL);
+			ret = load_and_verify_vbmeta(ops,
+					requested_partitions,
+					ab_suffix,
+					allow_verification_error,
+					0 /* toplevel_vbmeta_flags */,
+					0 /* rollback_index_location */,
+					"boot",
+					avb_strlen("boot"),
+					NULL /* expected_public_key */,
+					0 /* expected_public_key_length */,
+					slot_data,
+					out_algorithm_type);
+			goto out;
+		} else {
+			avb_errorv(full_partition_name, ": Error loading vbmeta data.\n", NULL);
+			ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+			goto out;
+		}
+	}
+	avb_assert(vbmeta_num_read <= vbmeta_size);
+	/* Check if the image is properly signed and get the public key used
+	 * to sign the image.
+	 */
+	vbmeta_ret = avb_vbmeta_image_verify(vbmeta_buf, vbmeta_num_read, &pk_data, &pk_len);
+	switch (vbmeta_ret) {
+	case AVB_VBMETA_VERIFY_RESULT_OK:
+		avb_assert(pk_data != NULL && pk_len > 0);
+		break;
+
+	case AVB_VBMETA_VERIFY_RESULT_OK_NOT_SIGNED:
+	case AVB_VBMETA_VERIFY_RESULT_HASH_MISMATCH:
+	case AVB_VBMETA_VERIFY_RESULT_SIGNATURE_MISMATCH:
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION;
+		avb_errorv(full_partition_name,
+			": Error verifying vbmeta image: ",
+			avb_vbmeta_verify_result_to_string(vbmeta_ret),
+			"\n",
+			NULL);
+		if (!allow_verification_error) {
+			goto out;
+		}
+		break;
+
+	case AVB_VBMETA_VERIFY_RESULT_INVALID_VBMETA_HEADER:
+		/* No way to continue this case. */
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+		avb_errorv(full_partition_name,
+			": Error verifying vbmeta image: invalid vbmeta header\n",
+			NULL);
+		goto out;
+
+	case AVB_VBMETA_VERIFY_RESULT_UNSUPPORTED_VERSION:
+		/* No way to continue this case. */
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION;
+		avb_errorv(full_partition_name,
+			": Error verifying vbmeta image: unsupported AVB version\n",
+			NULL);
+		goto out;
+	}
+
+	/* Byteswap the header. */
+	avb_vbmeta_image_header_to_host_byte_order((AvbVBMetaImageHeader*)vbmeta_buf,
+                                             &vbmeta_header);
+
+	/* If we're the toplevel, assign flags so they'll be passed down. */
+	if (is_main_vbmeta) {
+		toplevel_vbmeta_flags = (AvbVBMetaImageFlags)vbmeta_header.flags;
+	} else {
+		if (vbmeta_header.flags != 0) {
+			ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+			avb_errorv(full_partition_name,
+				": chained vbmeta image has non-zero flags\n",
+				NULL);
+			goto out;
+		}
+	}
+
+	/* Check if key used to make signature matches what is expected. */
+	if (pk_data != NULL) {
+		if (expected_public_key != NULL) {
+			avb_assert(!is_main_vbmeta);
+			if (expected_public_key_length != pk_len ||
+			avb_safe_memcmp(expected_public_key, pk_data, pk_len) != 0) {
+				avb_errorv(full_partition_name,
+					": Public key used to sign data does not match key in chain "
+					"partition descriptor.\n",
+					NULL);
+				ret = AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED;
+				if (!allow_verification_error) {
+					goto out;
+				}
+			}
+		} else {
+			bool key_is_trusted = false;
+			const uint8_t* pk_metadata = NULL;
+			size_t pk_metadata_len = 0;
+
+			if (vbmeta_header.public_key_metadata_size > 0) {
+				pk_metadata = vbmeta_buf + sizeof(AvbVBMetaImageHeader) +
+				vbmeta_header.authentication_data_block_size +
+				vbmeta_header.public_key_metadata_offset;
+				pk_metadata_len = vbmeta_header.public_key_metadata_size;
+			}
+
+			avb_assert(is_main_vbmeta);
+			io_ret = ops->validate_vbmeta_public_key(
+				ops, pk_data, pk_len, pk_metadata, pk_metadata_len, &key_is_trusted);
+			if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+				ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+				goto out;
+			} else if (io_ret != AVB_IO_RESULT_OK) {
+				avb_errorv(full_partition_name,
+				": Error while checking public key used to sign data.\n",
+				NULL);
+				ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+				goto out;
+			}
+			if (!key_is_trusted) {
+				avb_errorv(full_partition_name,
+				": Public key used to sign data rejected.\n",
+				NULL);
+				ret = AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED;
+				if (!allow_verification_error) {
+					goto out;
+				}
+			}
+		}
+	}
+
+	/* Check rollback index. */
+	io_ret = ops->read_rollback_index(
+		ops, rollback_index_location, &stored_rollback_index);
+	if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+		goto out;
+	} else if (io_ret != AVB_IO_RESULT_OK) {
+		avb_errorv(full_partition_name,
+			": Error getting rollback index for location.\n",
+			NULL);
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+		goto out;
+	}
+	if (vbmeta_header.rollback_index < stored_rollback_index) {
+		avb_errorv(
+			full_partition_name,
+			": Image rollback index is less than the stored rollback index.\n",
+			NULL);
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX;
+		if (!allow_verification_error) {
+			goto out;
+		}
+	}
+
+	/* Copy vbmeta to vbmeta_images before recursing. */
+	if (is_main_vbmeta) {
+		avb_assert(slot_data->num_vbmeta_images == 0);
+	} else {
+		avb_assert(slot_data->num_vbmeta_images > 0);
+	}
+	if (slot_data->num_vbmeta_images == MAX_NUMBER_OF_VBMETA_IMAGES) {
+		avb_errorv(full_partition_name, ": Too many vbmeta images.\n", NULL);
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+		goto out;
+	}
+	vbmeta_image_data = &slot_data->vbmeta_images[slot_data->num_vbmeta_images++];
+	vbmeta_image_data->partition_name = avb_strdup(partition_name);
+	vbmeta_image_data->vbmeta_data = vbmeta_buf;
+	/* Note that |vbmeta_buf| is actually |vbmeta_num_read| bytes long
+	 * and this includes data past the end of the image. Pass the
+	 * actual size of the vbmeta image. Also, no need to use
+	 * avb_safe_add() since the header has already been verified.
+	 */
+	vbmeta_image_data->vbmeta_size =
+	sizeof(AvbVBMetaImageHeader) +
+	vbmeta_header.authentication_data_block_size +
+	vbmeta_header.auxiliary_data_block_size;
+	vbmeta_image_data->verify_result = vbmeta_ret;
+  /* If verification has been disabled by setting a bit in the image,
+   * we're done... except that we need to load the entirety of the
+   * requested partitions.
+   */
+  if (vbmeta_header.flags & AVB_VBMETA_IMAGE_FLAGS_VERIFICATION_DISABLED) {
+    AvbSlotVerifyResult sub_ret;
+    avb_debugv(
+        full_partition_name, ": VERIFICATION_DISABLED bit is set.\n", NULL);
+    /* If load_requested_partitions() fail it is always a fatal
+     * failure (e.g. ERROR_INVALID_ARGUMENT, ERROR_OOM, etc.) rather
+     * than recoverable (e.g. one where result_should_continue()
+     * returns true) and we want to convey that error.
+     */
+    sub_ret = load_requested_partitions(
+        ops, requested_partitions, ab_suffix, slot_data);
+    if (sub_ret != AVB_SLOT_VERIFY_RESULT_OK) {
+      ret = sub_ret;
+    }
+    goto out;
+  }
+	/* Now go through all descriptors and take the appropriate action:
+	 *
+	 * - hash descriptor: Load data from partition, calculate hash, and
+	 *   checks that it matches what's in the hash descriptor.
+	 *
+	 * - hashtree descriptor: Do nothing since verification happens
+	 *   on-the-fly from within the OS.
+	 *
+	 * - chained partition descriptor: Load the footer, load the vbmeta
+	 *   image, verify vbmeta image (includes rollback checks, hash
+	 *   checks, bail on chained partitions).
+	 */
+	descriptors =
+	avb_descriptor_get_all(vbmeta_buf, vbmeta_num_read, &num_descriptors);
+	for (n = 0; n < num_descriptors; n++) {
+		AvbDescriptor desc;
+
+		if (!avb_descriptor_validate_and_byteswap(descriptors[n], &desc)) {
+			avb_errorv(full_partition_name, ": Descriptor is invalid.\n", NULL);
+			ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+			goto out;
+		}
+
+		switch (desc.tag) {
+		case AVB_DESCRIPTOR_TAG_HASH: {
+			AvbSlotVerifyResult sub_ret;
+			sub_ret = load_and_verify_hash_partition(ops,
+                                                 requested_partitions,
+                                                 ab_suffix,
+                                                 allow_verification_error,
+                                                 descriptors[n],
+                                                 slot_data);
+			if (sub_ret != AVB_SLOT_VERIFY_RESULT_OK) {
+				ret = sub_ret;
+				if (!allow_verification_error || !result_should_continue(ret)) {
+					goto out;
+				}
+			}
+		} break;
+
+		case AVB_DESCRIPTOR_TAG_CHAIN_PARTITION: {
+			AvbSlotVerifyResult sub_ret;
+			AvbChainPartitionDescriptor chain_desc;
+			const uint8_t* chain_partition_name;
+			const uint8_t* chain_public_key;
+
+			/* Only allow CHAIN_PARTITION descriptors in the main vbmeta image. */
+			if (!is_main_vbmeta) {
+				avb_errorv(full_partition_name,
+                     			": Encountered chain descriptor not in main image.\n",
+                     			NULL);
+				ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+				goto out;
+			}
+
+			if (!avb_chain_partition_descriptor_validate_and_byteswap(
+				(AvbChainPartitionDescriptor*)descriptors[n], &chain_desc)) {
+				avb_errorv(full_partition_name,
+                    			 ": Chain partition descriptor is invalid.\n",
+                    			 NULL);
+				ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+				goto out;
+			}
+
+			if (chain_desc.rollback_index_location == 0) {
+				avb_errorv(full_partition_name,
+                     			": Chain partition has invalid "
+                     			"rollback_index_location field.\n",
+                    			 NULL);
+				ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+				goto out;
+			}
+
+			chain_partition_name = ((const uint8_t*)descriptors[n]) +
+                               sizeof(AvbChainPartitionDescriptor);
+			chain_public_key = chain_partition_name + chain_desc.partition_name_len;
+
+			sub_ret = load_and_verify_vbmeta(ops,
+                                         requested_partitions,
+                                         ab_suffix,
+                                         allow_verification_error,
+                                         toplevel_vbmeta_flags,
+                                         chain_desc.rollback_index_location,
+                                         (const char*)chain_partition_name,
+                                         chain_desc.partition_name_len,
+                                         chain_public_key,
+                                         chain_desc.public_key_len,
+                                         slot_data,
+                                         NULL /* out_algorithm_type */);
+			if (sub_ret != AVB_SLOT_VERIFY_RESULT_OK) {
+				ret = sub_ret;
+				if (!result_should_continue(ret)) {
+					goto out;
+				}
+			}
+		} break;
+
+		case AVB_DESCRIPTOR_TAG_KERNEL_CMDLINE: {
+			const uint8_t* kernel_cmdline;
+			AvbKernelCmdlineDescriptor kernel_cmdline_desc;
+			bool apply_cmdline;
+
+			if (!avb_kernel_cmdline_descriptor_validate_and_byteswap(
+				(AvbKernelCmdlineDescriptor*)descriptors[n],
+				&kernel_cmdline_desc)) {
+				avb_errorv(full_partition_name,
+                     			": Kernel cmdline descriptor is invalid.\n",
+                     			NULL);
+				ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+				goto out;
+			}
+
+			kernel_cmdline = ((const uint8_t*)descriptors[n]) +
+				sizeof(AvbKernelCmdlineDescriptor);
+
+			if (!avb_validate_utf8(kernel_cmdline,
+                               kernel_cmdline_desc.kernel_cmdline_length)) {
+				avb_errorv(full_partition_name,
+                     			": Kernel cmdline is not valid UTF-8.\n",
+                     			NULL);
+				ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+				goto out;
+			}
+
+			/* Compare the flags for top-level VBMeta struct with flags in
+			 * the command-line descriptor so command-line snippets only
+			 * intended for a certain mode (dm-verity enabled/disabled)
+			 * are skipped if applicable.
+			 */
+			apply_cmdline = true;
+			if (toplevel_vbmeta_flags & AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED) {
+				if (kernel_cmdline_desc.flags &
+  					AVB_KERNEL_CMDLINE_FLAGS_USE_ONLY_IF_HASHTREE_NOT_DISABLED) {
+					apply_cmdline = false;
+				}
+			} else {
+				if (kernel_cmdline_desc.flags &
+					AVB_KERNEL_CMDLINE_FLAGS_USE_ONLY_IF_HASHTREE_DISABLED) {
+					apply_cmdline = false;
+				}
+			}
+
+			if (apply_cmdline) {
+				if (slot_data->cmdline == NULL) {
+					slot_data->cmdline =
+					avb_calloc(kernel_cmdline_desc.kernel_cmdline_length + 1);
+					if (slot_data->cmdline == NULL) {
+						ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+						goto out;
+					}
+					avb_memcpy(slot_data->cmdline,
+                       				kernel_cmdline,
+                       				kernel_cmdline_desc.kernel_cmdline_length);
+					} else {
+					/* new cmdline is: <existing_cmdline> + ' ' + <newcmdline> + '\0' */
+					size_t orig_size = avb_strlen(slot_data->cmdline);
+					size_t new_size =
+                				orig_size + 1 + kernel_cmdline_desc.kernel_cmdline_length + 1;
+					char* new_cmdline = avb_calloc(new_size);
+					if (new_cmdline == NULL) {
+						ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+						goto out;
+					}
+					avb_memcpy(new_cmdline, slot_data->cmdline, orig_size);
+					new_cmdline[orig_size] = ' ';
+					avb_memcpy(new_cmdline + orig_size + 1,
+ 					kernel_cmdline,
+					kernel_cmdline_desc.kernel_cmdline_length);
+					avb_free(slot_data->cmdline);
+					slot_data->cmdline = new_cmdline;
+				}
+			}
+		} break;
+
+		/* Explicit fall-through */
+		case AVB_DESCRIPTOR_TAG_PROPERTY:
+		case AVB_DESCRIPTOR_TAG_HASHTREE:
+		/* Do nothing. */
+		break;
+		}
+	}
+
+	if (rollback_index_location >= AVB_MAX_NUMBER_OF_ROLLBACK_INDEX_LOCATIONS) {
+		avb_errorv(
+		full_partition_name, ": Invalid rollback_index_location.\n", NULL);
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+		goto out;
+	}
+
+	slot_data->rollback_indexes[rollback_index_location] =
+		vbmeta_header.rollback_index;
+
+	if (out_algorithm_type != NULL) {
+		*out_algorithm_type = (AvbAlgorithmType)vbmeta_header.algorithm_type;
+	}
+
+out:
+	/* If |vbmeta_image_data| isn't NULL it means that it adopted
+	 * |vbmeta_buf| so in that case don't free it here.
+	 */
+	if (vbmeta_image_data == NULL) {
+		if (vbmeta_buf != NULL) {
+			avb_free(vbmeta_buf);
+		}
+	}
+	if (descriptors != NULL) {
+		avb_free(descriptors);
+	}
+	return ret;
+}
+
+#define NUM_GUIDS 3
+
+/* Substitutes all variables (e.g. $(ANDROID_SYSTEM_PARTUUID)) with
+ * values. Returns NULL on OOM, otherwise the cmdline with values
+ * replaced.
+ */
+static char* sub_cmdline(AvbOps* ops,
+                         const char* cmdline,
+                         const char* ab_suffix,
+                         bool using_boot_for_vbmeta)
+{
+	const char* part_name_str[NUM_GUIDS] = {"system", "boot", "vbmeta"};
+	const char* replace_str[NUM_GUIDS] = {"$(ANDROID_SYSTEM_PARTUUID)",
+                                        "$(ANDROID_BOOT_PARTUUID)",
+                                        "$(ANDROID_VBMETA_PARTUUID)"};
+	char* ret = NULL;
+	AvbIOResult io_ret;
+	size_t n;
+
+	/* Special-case for when the top-level vbmeta struct is in the boot
+	 * partition.
+	 */
+	if (using_boot_for_vbmeta) {
+		part_name_str[2] = "boot";
+	}
+
+	/* Replace unique partition GUIDs */
+	for (n = 0; n < NUM_GUIDS; n++) {
+		char part_name[PART_NAME_MAX_SIZE];
+		char guid_buf[37];
+
+		if (!avb_str_concat(part_name,
+                        	sizeof part_name,
+                        	part_name_str[n],
+                        	avb_strlen(part_name_str[n]),
+                        	ab_suffix,
+                        	avb_strlen(ab_suffix))) {
+			avb_error("Partition name and suffix does not fit.\n");
+			goto fail;
+		}
+
+		io_ret = ops->get_unique_guid_for_partition(
+			ops, part_name, guid_buf, sizeof guid_buf);
+		if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+			return NULL;
+		} else if (io_ret != AVB_IO_RESULT_OK) {
+			avb_error("Error getting unique GUID for partition.\n");
+			goto fail;
+		}
+
+		if (ret == NULL) {
+			ret = avb_replace(cmdline, replace_str[n], guid_buf);
+		} else {
+			char* new_ret = avb_replace(ret, replace_str[n], guid_buf);
+			avb_free(ret);
+ 			ret = new_ret;
+		}
+		if (ret == NULL) {
+			goto fail;
+		}
+	}
+
+	return ret;
+
+fail:
+	if (ret != NULL) {
+		avb_free(ret);
+	}
+	return NULL;
+}
+
+static int cmdline_append_option(AvbSlotVerifyData* slot_data,
+                                 const char* key,
+                                 const char* value)
+{
+	size_t offset, key_len, value_len;
+	char* new_cmdline;
+
+	key_len = avb_strlen(key);
+	value_len = avb_strlen(value);
+
+	offset = 0;
+	if (slot_data->cmdline != NULL) {
+		offset = avb_strlen(slot_data->cmdline);
+		if (offset > 0) {
+			offset += 1;
+		}
+	}
+
+	new_cmdline = avb_calloc(offset + key_len + value_len + 2);
+	if (new_cmdline == NULL) {
+		return 0;
+	}
+	if (offset > 0) {
+		avb_memcpy(new_cmdline, slot_data->cmdline, offset - 1);
+		new_cmdline[offset - 1] = ' ';
+	}
+	avb_memcpy(new_cmdline + offset, key, key_len);
+	new_cmdline[offset + key_len] = '=';
+	avb_memcpy(new_cmdline + offset + key_len + 1, value, value_len);
+	if (slot_data->cmdline != NULL) {
+		avb_free(slot_data->cmdline);
+	}
+	slot_data->cmdline = new_cmdline;
+
+	return 1;
+}
+
+#define AVB_MAX_DIGITS_UINT64 32
+
+/* Writes |value| to |digits| in base 10 followed by a NUL byte.
+ * Returns number of characters written excluding the NUL byte.
+ */
+static size_t uint64_to_base10(uint64_t value,
+                               char digits[AVB_MAX_DIGITS_UINT64])
+{
+	char rev_digits[AVB_MAX_DIGITS_UINT64];
+	size_t n, num_digits;
+
+	for (num_digits = 0; num_digits < AVB_MAX_DIGITS_UINT64 - 1;) {
+		rev_digits[num_digits++] = (value % 10) + '0';
+		value /= 10;
+		if (value == 0) {
+			break;
+		}
+	}
+
+	for (n = 0; n < num_digits; n++) {
+		digits[n] = rev_digits[num_digits - 1 - n];
+	}
+	digits[n] = '\0';
+	return n;
+}
+
+static int cmdline_append_version(AvbSlotVerifyData* slot_data,
+                                  const char* key,
+                                  uint64_t major_version,
+                                  uint64_t minor_version)
+{
+	char major_digits[AVB_MAX_DIGITS_UINT64];
+	char minor_digits[AVB_MAX_DIGITS_UINT64];
+	char combined[AVB_MAX_DIGITS_UINT64 * 2 + 1];
+	size_t num_major_digits, num_minor_digits;
+
+	num_major_digits = uint64_to_base10(major_version, major_digits);
+	num_minor_digits = uint64_to_base10(minor_version, minor_digits);
+	avb_memcpy(combined, major_digits, num_major_digits);
+	combined[num_major_digits] = '.';
+	avb_memcpy(combined + num_major_digits + 1, minor_digits, num_minor_digits);
+	combined[num_major_digits + 1 + num_minor_digits] = '\0';
+
+	return cmdline_append_option(slot_data, key, combined);
+}
+
+static int cmdline_append_uint64_base10(AvbSlotVerifyData* slot_data,
+                                        const char* key,
+                                        uint64_t value)
+{
+	char digits[AVB_MAX_DIGITS_UINT64];
+	uint64_to_base10(value, digits);
+	return cmdline_append_option(slot_data, key, digits);
+}
+
+static int cmdline_append_hex(AvbSlotVerifyData* slot_data,
+                              const char* key,
+                              const uint8_t* data,
+                              size_t data_len)
+{
+	char hex_digits[17] = "0123456789abcdef";
+	char* hex_data;
+	int ret;
+	size_t n;
+
+	hex_data = avb_malloc(data_len * 2 + 1);
+	if (hex_data == NULL) {
+		return 0;
+	}
+
+	for (n = 0; n < data_len; n++) {
+		hex_data[n * 2] = hex_digits[data[n] >> 4];
+		hex_data[n * 2 + 1] = hex_digits[data[n] & 0x0f];
+	}
+	hex_data[n * 2] = '\0';
+
+	ret = cmdline_append_option(slot_data, key, hex_data);
+	avb_free(hex_data);
+	return ret;
+}
+
+static AvbSlotVerifyResult append_options(
+    AvbOps* ops,
+    AvbSlotVerifyData* slot_data,
+    AvbVBMetaImageHeader* toplevel_vbmeta,
+    AvbAlgorithmType algorithm_type,
+    AvbHashtreeErrorMode hashtree_error_mode) {
+  AvbSlotVerifyResult ret;
+  const char* verity_mode = NULL;
+  bool is_device_unlocked;
+  AvbIOResult io_ret;
+
+  /* Add androidboot.vbmeta.device option. */
+  if (!cmdline_append_option(slot_data,
+                             "androidboot.vbmeta.device",
+                             "PARTUUID=$(ANDROID_VBMETA_PARTUUID)")) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto out;
+  }
+
+  /* Add androidboot.vbmeta.avb_version option. */
+  if (!cmdline_append_version(slot_data,
+                              "androidboot.vbmeta.avb_version",
+                              AVB_VERSION_MAJOR,
+                              AVB_VERSION_MINOR)) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto out;
+  }
+
+  /* Set androidboot.avb.device_state to "locked" or "unlocked". */
+  io_ret = ops->read_is_device_unlocked(ops, &is_device_unlocked);
+  if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto out;
+  } else if (io_ret != AVB_IO_RESULT_OK) {
+    avb_error("Error getting device state.\n");
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+    goto out;
+  }
+  if (!cmdline_append_option(slot_data,
+                             "androidboot.vbmeta.device_state",
+                             is_device_unlocked ? "unlocked" : "locked")) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto out;
+  }
+
+  /* Set androidboot.vbmeta.{hash_alg, size, digest} - use same hash
+   * function as is used to sign vbmeta.
+   */
+  switch (algorithm_type) {
+    /* Explicit fallthrough. */
+    case AVB_ALGORITHM_TYPE_NONE:
+    case AVB_ALGORITHM_TYPE_SHA256_RSA2048:
+    case AVB_ALGORITHM_TYPE_SHA256_RSA4096:
+    case AVB_ALGORITHM_TYPE_SHA256_RSA8192: {
+      AvbSHA256Ctx ctx;
+      size_t n, total_size = 0;
+      avb_sha256_init(&ctx);
+      for (n = 0; n < slot_data->num_vbmeta_images; n++) {
+        avb_sha256_update(&ctx,
+                          slot_data->vbmeta_images[n].vbmeta_data,
+                          slot_data->vbmeta_images[n].vbmeta_size);
+        total_size += slot_data->vbmeta_images[n].vbmeta_size;
+      }
+      if (!cmdline_append_option(
+              slot_data, "androidboot.vbmeta.hash_alg", "sha256") ||
+          !cmdline_append_uint64_base10(
+              slot_data, "androidboot.vbmeta.size", total_size) ||
+          !cmdline_append_hex(slot_data,
+                              "androidboot.vbmeta.digest",
+                              avb_sha256_final(&ctx),
+                              AVB_SHA256_DIGEST_SIZE)) {
+        ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+        goto out;
+      }
+    } break;
+    /* Explicit fallthrough. */
+    case AVB_ALGORITHM_TYPE_SHA512_RSA2048:
+    case AVB_ALGORITHM_TYPE_SHA512_RSA4096:
+    case AVB_ALGORITHM_TYPE_SHA512_RSA8192: {
+      AvbSHA512Ctx ctx;
+      size_t n, total_size = 0;
+      avb_sha512_init(&ctx);
+      for (n = 0; n < slot_data->num_vbmeta_images; n++) {
+        avb_sha512_update(&ctx,
+                          slot_data->vbmeta_images[n].vbmeta_data,
+                          slot_data->vbmeta_images[n].vbmeta_size);
+        total_size += slot_data->vbmeta_images[n].vbmeta_size;
+      }
+      if (!cmdline_append_option(
+              slot_data, "androidboot.vbmeta.hash_alg", "sha512") ||
+          !cmdline_append_uint64_base10(
+              slot_data, "androidboot.vbmeta.size", total_size) ||
+          !cmdline_append_hex(slot_data,
+                              "androidboot.vbmeta.digest",
+                              avb_sha512_final(&ctx),
+                              AVB_SHA512_DIGEST_SIZE)) {
+        ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+        goto out;
+      }
+    } break;
+    case _AVB_ALGORITHM_NUM_TYPES:
+      avb_assert_not_reached();
+      break;
+  }
+
+  /* Set androidboot.veritymode and androidboot.vbmeta.invalidate_on_error */
+  if (toplevel_vbmeta->flags & AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED) {
+    verity_mode = "disabled";
+  } else {
+    const char* dm_verity_mode = NULL;
+    char* new_ret;
+
+    switch (hashtree_error_mode) {
+      case AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE:
+        if (!cmdline_append_option(
+                slot_data, "androidboot.vbmeta.invalidate_on_error", "yes")) {
+          ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+          goto out;
+        }
+        verity_mode = "enforcing";
+        dm_verity_mode = "restart_on_corruption";
+        break;
+      case AVB_HASHTREE_ERROR_MODE_RESTART:
+        verity_mode = "enforcing";
+        dm_verity_mode = "restart_on_corruption";
+        break;
+      case AVB_HASHTREE_ERROR_MODE_EIO:
+        verity_mode = "eio";
+        /* For now there's no option to specify the EIO mode. So
+         * just use 'ignore_zero_blocks' since that's already set
+         * and dm-verity-target.c supports specifying this multiple
+         * times.
+         */
+        dm_verity_mode = "ignore_zero_blocks";
+        break;
+      case AVB_HASHTREE_ERROR_MODE_LOGGING:
+        verity_mode = "logging";
+        dm_verity_mode = "ignore_corruption";
+        break;
+    }
+    new_ret = avb_replace(
+        slot_data->cmdline, "$(ANDROID_VERITY_MODE)", dm_verity_mode);
+    avb_free(slot_data->cmdline);
+    slot_data->cmdline = new_ret;
+    if (slot_data->cmdline == NULL) {
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+      goto out;
+    }
+  }
+  if (!cmdline_append_option(
+          slot_data, "androidboot.veritymode", verity_mode)) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto out;
+  }
+
+  ret = AVB_SLOT_VERIFY_RESULT_OK;
+
+out:
+
+  return ret;
+}
+
+AvbSlotVerifyResult avb_slot_verify(AvbOps* ops,
+                                    const char* const* requested_partitions,
+                                    const char* ab_suffix,
+                                    AvbSlotVerifyFlags flags,
+                                    AvbHashtreeErrorMode hashtree_error_mode,
+                                    AvbSlotVerifyData** out_data)
+{
+	AvbSlotVerifyResult ret;
+	AvbSlotVerifyData* slot_data = NULL;
+	AvbAlgorithmType algorithm_type = AVB_ALGORITHM_TYPE_SHA256_RSA4096;
+	bool using_boot_for_vbmeta = false;
+	AvbVBMetaImageHeader toplevel_vbmeta;
+	bool allow_verification_error =
+		(flags & AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR);
+
+	/* Fail early if we're missing the AvbOps needed for slot verification.
+	 *
+	 * For now, handle get_size_of_partition() not being implemented. In
+	 * a later release we may change that.
+	 */
+	avb_assert(ops->read_is_device_unlocked != NULL);
+	avb_assert(ops->read_from_partition != NULL);
+	avb_assert(ops->validate_vbmeta_public_key != NULL);
+	avb_assert(ops->read_rollback_index != NULL);
+	avb_assert(ops->get_unique_guid_for_partition != NULL);
+	/* avb_assert(ops->get_size_of_partition != NULL); */
+
+	if (out_data != NULL) {
+		*out_data = NULL;
+	}
+
+	/* Allowing dm-verity errors defeats the purpose of verified boot so
+	 * only allow this if set up to allow verification errors
+	 * (e.g. typically only UNLOCKED mode).
+	 */
+	if (hashtree_error_mode == AVB_HASHTREE_ERROR_MODE_LOGGING &&
+		!allow_verification_error) {
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT;
+		goto fail;
+	}
+
+	slot_data = avb_calloc(sizeof(AvbSlotVerifyData));
+	if (slot_data == NULL) {
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+		goto fail;
+	}
+	slot_data->vbmeta_images =
+		avb_calloc(sizeof(AvbVBMetaData) * MAX_NUMBER_OF_VBMETA_IMAGES);
+	if (slot_data->vbmeta_images == NULL) {
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+		goto fail;
+	}
+	slot_data->loaded_partitions =
+		avb_calloc(sizeof(AvbPartitionData) * MAX_NUMBER_OF_LOADED_PARTITIONS);
+	if (slot_data->loaded_partitions == NULL) {
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+		goto fail;
+	}
+
+	ret = load_and_verify_vbmeta(ops,
+                               requested_partitions,
+                               ab_suffix,
+                               allow_verification_error,
+                               0 /* toplevel_vbmeta_flags */,
+                               0 /* rollback_index_location */,
+                               "vbmeta",
+                               avb_strlen("vbmeta"),
+                               NULL /* expected_public_key */,
+                               0 /* expected_public_key_length */,
+                               slot_data,
+                               &algorithm_type);
+	if (!allow_verification_error && ret != AVB_SLOT_VERIFY_RESULT_OK) {
+		goto fail;
+	}
+
+	/* If things check out, mangle the kernel command-line as needed. */
+	if (result_should_continue(ret)) {
+		if (avb_strcmp(slot_data->vbmeta_images[0].partition_name, "vbmeta") != 0) {
+		avb_assert(
+  			avb_strcmp(slot_data->vbmeta_images[0].partition_name, "boot") == 0);
+			using_boot_for_vbmeta = true;
+		}
+
+		/* Byteswap top-level vbmeta header since we'll need it below. */
+		avb_vbmeta_image_header_to_host_byte_order(
+        		(const AvbVBMetaImageHeader*)slot_data->vbmeta_images[0].vbmeta_data,
+        		&toplevel_vbmeta);
+
+		/* Fill in |ab_suffix| field. */
+		slot_data->ab_suffix = avb_strdup(ab_suffix);
+		if (slot_data->ab_suffix == NULL) {
+			ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+			goto fail;
+		}
+
+    /* If verification is disabled, we are done ... we specifically
+     * don't want to add any androidboot.* options since verification
+     * is disabled.
+     */
+    if (toplevel_vbmeta.flags & AVB_VBMETA_IMAGE_FLAGS_VERIFICATION_DISABLED) {
+      /* Since verification is disabled we didn't process any
+       * descriptors and thus there's no cmdline... so set root= such
+       * that the system partition is mounted.
+       */
+      avb_assert(slot_data->cmdline == NULL);
+      slot_data->cmdline =
+          avb_strdup("root=PARTUUID=$(ANDROID_SYSTEM_PARTUUID)");
+      if (slot_data->cmdline == NULL) {
+        ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+        goto fail;
+      }
+    } else {
+      /* Add options - any failure in append_options() is either an
+       * I/O or OOM error.
+       */
+      AvbSlotVerifyResult sub_ret = append_options(ops,
+                                                   slot_data,
+                                                   &toplevel_vbmeta,
+                                                   algorithm_type,
+                                                   hashtree_error_mode);
+      if (sub_ret != AVB_SLOT_VERIFY_RESULT_OK) {
+        ret = sub_ret;
+        goto fail;
+      }
+    }
+
+		/* Substitute $(ANDROID_SYSTEM_PARTUUID) and friends. */
+		if (slot_data->cmdline != NULL) {
+			char* new_cmdline;
+			new_cmdline = sub_cmdline(
+			ops, slot_data->cmdline, ab_suffix, using_boot_for_vbmeta);
+			if (new_cmdline == NULL) {
+				ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+				goto fail;
+			}
+			avb_free(slot_data->cmdline);
+			slot_data->cmdline = new_cmdline;
+		}
+
+		if (out_data != NULL) {
+			*out_data = slot_data;
+		} else {
+			avb_slot_verify_data_free(slot_data);
+		}
+	}
+
+	if (!allow_verification_error) {
+		avb_assert(ret == AVB_SLOT_VERIFY_RESULT_OK);
+	}
+
+	return ret;
+
+fail:
+	if (slot_data != NULL) {
+		avb_slot_verify_data_free(slot_data);
+	}
+	return ret;
+}
+
+void avb_slot_verify_data_free(AvbSlotVerifyData* data)
+{
+	if (data->ab_suffix != NULL) {
+		avb_free(data->ab_suffix);
+	}
+	if (data->cmdline != NULL) {
+		avb_free(data->cmdline);
+	}
+	if (data->vbmeta_images != NULL) {
+		size_t n;
+		for (n = 0; n < data->num_vbmeta_images; n++) {
+			AvbVBMetaData* vbmeta_image = &data->vbmeta_images[n];
+			if (vbmeta_image->partition_name != NULL) {
+				avb_free(vbmeta_image->partition_name);
+			}
+			if (vbmeta_image->vbmeta_data != NULL) {
+				avb_free(vbmeta_image->vbmeta_data);
+			}
+		}
+		avb_free(data->vbmeta_images);
+	}
+	if (data->loaded_partitions != NULL) {
+		size_t n;
+		for (n = 0; n < data->num_loaded_partitions; n++) {
+			AvbPartitionData* loaded_partition = &data->loaded_partitions[n];
+			if (loaded_partition->partition_name != NULL) {
+				avb_free(loaded_partition->partition_name);
+			}
+			if (loaded_partition->data != NULL) {
+				avb_free(loaded_partition->data);
+			}
+		}
+		avb_free(data->loaded_partitions);
+	}
+	avb_free(data);
+}
+
+const char* avb_slot_verify_result_to_string(AvbSlotVerifyResult result)
+{
+	const char* ret = NULL;
+
+	switch (result) {
+	case AVB_SLOT_VERIFY_RESULT_OK:
+		ret = "OK";
+		break;
+	case AVB_SLOT_VERIFY_RESULT_ERROR_OOM:
+		ret = "ERROR_OOM";
+ 		break;
+	case AVB_SLOT_VERIFY_RESULT_ERROR_IO:
+		ret = "ERROR_IO";
+		break;
+	case AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION:
+		ret = "ERROR_VERIFICATION";
+		break;
+	case AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX:
+		ret = "ERROR_ROLLBACK_INDEX";
+		break;
+	case AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED:
+		ret = "ERROR_PUBLIC_KEY_REJECTED";
+		break;
+	case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA:
+		ret = "ERROR_INVALID_METADATA";
+		break;
+	case AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION:
+		ret = "ERROR_UNSUPPORTED_VERSION";
+		break;
+	case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT:
+		ret = "ERROR_INVALID_ARGUMENT";
+		break;
+	/* Do not add a 'default:' case here because of -Wswitch. */
+	}
+
+	if (ret == NULL) {
+		avb_error("Unknown AvbSlotVerifyResult value.\n");
+		ret = "(unknown)";
+	}
+
+	return ret;
+}
diff --git a/lib/avb/rk_libavb/avb_sysdeps_posix.c b/lib/avb/rk_libavb/avb_sysdeps_posix.c
new file mode 100644
index 0000000000..44ca777ce1
--- /dev/null
+++ b/lib/avb/rk_libavb/avb_sysdeps_posix.c
@@ -0,0 +1,83 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+//#include <bits/endian.h>
+#include <common.h>
+#include <stdarg.h>
+#include <stdlib.h>
+#include <malloc.h>
+#include <errno.h>
+#include <asm/io.h>
+
+#include <android_avb/avb_sysdeps.h>
+
+void abort(void);
+
+int avb_memcmp(const void* src1, const void* src2, size_t n) {
+  return memcmp(src1, src2, n);
+}
+
+void* avb_memcpy(void* dest, const void* src, size_t n) {
+  return memcpy(dest, src, n);
+}
+
+void* avb_memset(void* dest, const int c, size_t n) {
+  return memset(dest, c, n);
+}
+
+int avb_strcmp(const char* s1, const char* s2) {
+  return strcmp(s1, s2);
+}
+
+size_t avb_strlen(const char* str) {
+  return strlen(str);
+}
+
+void avb_abort(void) {
+  abort();
+return;
+}
+
+void avb_print(const char* message) {
+  fprintf(stderr, "%s", message);
+}
+
+void avb_printv(const char* message, ...) {
+  va_list ap;
+  const char* m;
+
+  va_start(ap, message);
+  for (m = message; m != NULL; m = va_arg(ap, const char*)) {
+    fprintf(stderr, "%s", m);
+  }
+  va_end(ap);
+}
+
+void* avb_malloc_(size_t size) {
+  return malloc(size);
+}
+
+void avb_free(void* ptr) {
+  free(ptr);
+}
diff --git a/lib/avb/rk_libavb/avb_util.c b/lib/avb/rk_libavb/avb_util.c
new file mode 100644
index 0000000000..f18267a89e
--- /dev/null
+++ b/lib/avb/rk_libavb/avb_util.c
@@ -0,0 +1,404 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_util.h>
+#include <malloc.h>
+#include <stdarg.h>
+
+uint32_t avb_be32toh(uint32_t in) {
+  uint8_t* d = (uint8_t*)&in;
+  uint32_t ret;
+  ret = ((uint32_t)d[0]) << 24;
+  ret |= ((uint32_t)d[1]) << 16;
+  ret |= ((uint32_t)d[2]) << 8;
+  ret |= ((uint32_t)d[3]);
+  return ret;
+}
+
+uint64_t avb_be64toh(uint64_t in) {
+  uint8_t* d = (uint8_t*)&in;
+  uint64_t ret;
+  ret = ((uint64_t)d[0]) << 56;
+  ret |= ((uint64_t)d[1]) << 48;
+  ret |= ((uint64_t)d[2]) << 40;
+  ret |= ((uint64_t)d[3]) << 32;
+  ret |= ((uint64_t)d[4]) << 24;
+  ret |= ((uint64_t)d[5]) << 16;
+  ret |= ((uint64_t)d[6]) << 8;
+  ret |= ((uint64_t)d[7]);
+  return ret;
+}
+
+/* Converts a 32-bit unsigned integer from host to big-endian byte order. */
+uint32_t avb_htobe32(uint32_t in) {
+  union {
+    uint32_t word;
+    uint8_t bytes[4];
+  } ret;
+  ret.bytes[0] = (in >> 24) & 0xff;
+  ret.bytes[1] = (in >> 16) & 0xff;
+  ret.bytes[2] = (in >> 8) & 0xff;
+  ret.bytes[3] = in & 0xff;
+  return ret.word;
+}
+
+/* Converts a 64-bit unsigned integer from host to big-endian byte order. */
+uint64_t avb_htobe64(uint64_t in) {
+  union {
+    uint64_t word;
+    uint8_t bytes[8];
+  } ret;
+  ret.bytes[0] = (in >> 56) & 0xff;
+  ret.bytes[1] = (in >> 48) & 0xff;
+  ret.bytes[2] = (in >> 40) & 0xff;
+  ret.bytes[3] = (in >> 32) & 0xff;
+  ret.bytes[4] = (in >> 24) & 0xff;
+  ret.bytes[5] = (in >> 16) & 0xff;
+  ret.bytes[6] = (in >> 8) & 0xff;
+  ret.bytes[7] = in & 0xff;
+  return ret.word;
+}
+
+int avb_safe_memcmp(const void* s1, const void* s2, size_t n) {
+  const unsigned char* us1 = s1;
+  const unsigned char* us2 = s2;
+  int result = 0;
+
+  if (0 == n) {
+    return 0;
+  }
+
+  /*
+   * Code snippet without data-dependent branch due to Nate Lawson
+   * (nate@root.org) of Root Labs.
+   */
+  while (n--) {
+    result |= *us1++ ^ *us2++;
+  }
+
+  return result != 0;
+}
+
+bool avb_safe_add_to(uint64_t* value, uint64_t value_to_add) {
+  uint64_t original_value;
+
+  avb_assert(value != NULL);
+
+  original_value = *value;
+
+  *value += value_to_add;
+  if (*value < original_value) {
+    avb_error("Overflow when adding values.\n");
+    return false;
+  }
+
+  return true;
+}
+
+bool avb_safe_add(uint64_t* out_result, uint64_t a, uint64_t b) {
+  uint64_t dummy;
+  if (out_result == NULL) {
+    out_result = &dummy;
+  }
+  *out_result = a;
+  return avb_safe_add_to(out_result, b);
+}
+
+bool avb_validate_utf8(const uint8_t* data, size_t num_bytes) {
+  size_t n;
+  unsigned int num_cc;
+
+  for (n = 0, num_cc = 0; n < num_bytes; n++) {
+    uint8_t c = data[n];
+
+    if (num_cc > 0) {
+      if ((c & (0x80 | 0x40)) == 0x80) {
+        /* 10xx xxxx */
+      } else {
+        goto fail;
+      }
+      num_cc--;
+    } else {
+      if (c < 0x80) {
+        num_cc = 0;
+      } else if ((c & (0x80 | 0x40 | 0x20)) == (0x80 | 0x40)) {
+        /* 110x xxxx */
+        num_cc = 1;
+      } else if ((c & (0x80 | 0x40 | 0x20 | 0x10)) == (0x80 | 0x40 | 0x20)) {
+        /* 1110 xxxx */
+        num_cc = 2;
+      } else if ((c & (0x80 | 0x40 | 0x20 | 0x10 | 0x08)) ==
+                 (0x80 | 0x40 | 0x20 | 0x10)) {
+        /* 1111 0xxx */
+        num_cc = 3;
+      } else {
+        goto fail;
+      }
+    }
+  }
+
+  if (num_cc != 0) {
+    goto fail;
+  }
+
+  return true;
+
+fail:
+  return false;
+}
+
+bool avb_str_concat(char* buf,
+                    size_t buf_size,
+                    const char* str1,
+                    size_t str1_len,
+                    const char* str2,
+                    size_t str2_len) {
+  uint64_t combined_len;
+
+  if (!avb_safe_add(&combined_len, str1_len, str2_len)) {
+    avb_error("Overflow when adding string sizes.\n");
+    return false;
+  }
+
+  if (combined_len > buf_size - 1) {
+    avb_error("Insufficient buffer space.\n");
+    return false;
+  }
+
+  avb_memcpy(buf, str1, str1_len);
+  avb_memcpy(buf + str1_len, str2, str2_len);
+  buf[combined_len] = '\0';
+
+  return true;
+}
+
+void* avb_malloc(size_t size) {
+  void* ret = avb_malloc_(size);
+  if (ret == NULL) {
+    avb_error("Failed to allocate memory.\n");
+    return NULL;
+  }
+  return ret;
+}
+
+void* avb_calloc(size_t size) {
+  void* ret = avb_malloc(size);
+  if (ret == NULL) {
+    return NULL;
+  }
+
+  avb_memset(ret, '\0', size);
+  return ret;
+}
+
+char* avb_strdup(const char* str) {
+  size_t len = avb_strlen(str);
+  char* ret = avb_malloc(len + 1);
+  if (ret == NULL) {
+    return NULL;
+  }
+
+  avb_memcpy(ret, str, len);
+  ret[len] = '\0';
+
+  return ret;
+}
+
+const char* avb_strstr(const char* haystack, const char* needle) {
+  size_t n, m;
+
+  /* Look through |haystack| and check if the first character of
+   * |needle| matches. If so, check the rest of |needle|.
+   */
+  for (n = 0; haystack[n] != '\0'; n++) {
+    if (haystack[n] != needle[0]) {
+      continue;
+    }
+
+    for (m = 1;; m++) {
+      if (needle[m] == '\0') {
+        return haystack + n;
+      }
+
+      if (haystack[n + m] != needle[m]) {
+        break;
+      }
+    }
+  }
+
+  return NULL;
+}
+
+const char* avb_strv_find_str(const char* const* strings,
+                              const char* str,
+                              size_t str_size) {
+  size_t n;
+  for (n = 0; strings[n] != NULL; n++) {
+    if (avb_strlen(strings[n]) == str_size &&
+        avb_memcmp(strings[n], str, str_size) == 0) {
+      return strings[n];
+    }
+  }
+  return NULL;
+}
+
+char* avb_replace(const char* str, const char* search, const char* replace) {
+  char* ret = NULL;
+  size_t ret_len = 0;
+  size_t search_len, replace_len;
+  const char* str_after_last_replace;
+
+  search_len = avb_strlen(search);
+  replace_len = avb_strlen(replace);
+
+  str_after_last_replace = str;
+  while (*str != '\0') {
+    const char* s;
+    size_t num_before;
+    size_t num_new;
+
+    s = avb_strstr(str, search);
+    if (s == NULL) {
+      break;
+    }
+
+    num_before = s - str;
+
+    if (ret == NULL) {
+      num_new = num_before + replace_len + 1;
+      ret = avb_malloc(num_new);
+      if (ret == NULL) {
+        goto out;
+      }
+      avb_memcpy(ret, str, num_before);
+      avb_memcpy(ret + num_before, replace, replace_len);
+      ret[num_new - 1] = '\0';
+      ret_len = num_new - 1;
+    } else {
+      char* new_str;
+      num_new = ret_len + num_before + replace_len + 1;
+      new_str = avb_malloc(num_new);
+      if (ret == NULL) {
+        goto out;
+      }
+      avb_memcpy(new_str, ret, ret_len);
+      avb_memcpy(new_str + ret_len, str, num_before);
+      avb_memcpy(new_str + ret_len + num_before, replace, replace_len);
+      new_str[num_new - 1] = '\0';
+      avb_free(ret);
+      ret = new_str;
+      ret_len = num_new - 1;
+    }
+
+    str = s + search_len;
+    str_after_last_replace = str;
+  }
+
+  if (ret == NULL) {
+    ret = avb_strdup(str_after_last_replace);
+    if (ret == NULL) {
+      goto out;
+    }
+  } else {
+    size_t num_remaining = avb_strlen(str_after_last_replace);
+    size_t num_new = ret_len + num_remaining + 1;
+    char* new_str = avb_malloc(num_new);
+    if (ret == NULL) {
+      goto out;
+    }
+    avb_memcpy(new_str, ret, ret_len);
+    avb_memcpy(new_str + ret_len, str_after_last_replace, num_remaining);
+    new_str[num_new - 1] = '\0';
+    avb_free(ret);
+    ret = new_str;
+    ret_len = num_new - 1;
+  }
+
+out:
+  return ret;
+}
+
+/* We only support a limited amount of strings in avb_strdupv(). */
+#define AVB_STRDUPV_MAX_NUM_STRINGS 32
+
+char* avb_strdupv(const char* str, ...) {
+  va_list ap;
+  const char* strings[AVB_STRDUPV_MAX_NUM_STRINGS];
+  size_t lengths[AVB_STRDUPV_MAX_NUM_STRINGS];
+  size_t num_strings, n;
+  uint64_t total_length;
+  char *ret = NULL, *dest;
+
+  num_strings = 0;
+  total_length = 0;
+  va_start(ap, str);
+  do {
+    size_t str_len = avb_strlen(str);
+    strings[num_strings] = str;
+    lengths[num_strings] = str_len;
+    if (!avb_safe_add_to(&total_length, str_len)) {
+      avb_fatal("Overflow while determining total length.\n");
+      break;
+    }
+    num_strings++;
+    if (num_strings == AVB_STRDUPV_MAX_NUM_STRINGS) {
+      avb_fatal("Too many strings passed.\n");
+      break;
+    }
+    str = va_arg(ap, const char*);
+  } while (str != NULL);
+  va_end(ap);
+
+  ret = avb_malloc(total_length + 1);
+  if (ret == NULL) {
+    goto out;
+  }
+
+  dest = ret;
+  for (n = 0; n < num_strings; n++) {
+    avb_memcpy(dest, strings[n], lengths[n]);
+    dest += lengths[n];
+  }
+  *dest = '\0';
+  avb_assert(dest == ret + total_length);
+
+out:
+  return ret;
+}
+
+const char* avb_basename(const char* str) {
+  int64_t n;
+  size_t len;
+
+  len = avb_strlen(str);
+  if (len >= 2) {
+    for (n = len - 2; n >= 0; n--) {
+      if (str[n] == '/') {
+        return str + n + 1;
+      }
+    }
+  }
+  return str;
+}
+
diff --git a/lib/avb/rk_libavb/avb_vbmeta_image.c b/lib/avb/rk_libavb/avb_vbmeta_image.c
new file mode 100644
index 0000000000..76ea3ad230
--- /dev/null
+++ b/lib/avb/rk_libavb/avb_vbmeta_image.c
@@ -0,0 +1,310 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_vbmeta_image.h>
+#include <android_avb/avb_crypto.h>
+#include <android_avb/avb_rsa.h>
+#include <android_avb/avb_sha.h>
+#include <android_avb/avb_util.h>
+#include <android_avb/avb_version.h>
+
+AvbVBMetaVerifyResult avb_vbmeta_image_verify(
+    const uint8_t* data,
+    size_t length,
+    const uint8_t** out_public_key_data,
+    size_t* out_public_key_length)
+{
+	AvbVBMetaVerifyResult ret;
+	AvbVBMetaImageHeader h;
+	uint8_t* computed_hash;
+	const AvbAlgorithmData* algorithm;
+	AvbSHA256Ctx sha256_ctx;
+	AvbSHA512Ctx sha512_ctx;
+	const uint8_t* header_block;
+	const uint8_t* authentication_block;
+	const uint8_t* auxiliary_block;
+	int verification_result;
+
+	ret = AVB_VBMETA_VERIFY_RESULT_INVALID_VBMETA_HEADER;
+
+	if (out_public_key_data != NULL) {
+		*out_public_key_data = NULL;
+	}
+	if (out_public_key_length != NULL) {
+		*out_public_key_length = 0;
+	}
+
+	/* Ensure magic is correct. */
+	if (avb_safe_memcmp(data, AVB_MAGIC, AVB_MAGIC_LEN) != 0) {
+		avb_error("Magic is incorrect.\n");
+		goto out;
+	}
+
+	/* Before we byteswap, ensure length is long enough. */
+	if (length < sizeof(AvbVBMetaImageHeader)) {
+		avb_error("Length is smaller than header.\n");
+		goto out;
+	}
+	avb_vbmeta_image_header_to_host_byte_order((const AvbVBMetaImageHeader*)data,
+                                             &h);
+
+	/* Ensure we don't attempt to access any fields if we do not meet
+	 * the specified minimum version of libavb.
+	 */
+	if ((h.required_libavb_version_major != AVB_VERSION_MAJOR) ||
+		(h.required_libavb_version_minor > AVB_VERSION_MINOR)) {
+		avb_error("Mismatch between image version and libavb version.\n");
+		ret = AVB_VBMETA_VERIFY_RESULT_UNSUPPORTED_VERSION;
+		goto out;
+	}
+
+	/* Ensure |release_string| ends with a NUL byte. */
+	if (h.release_string[AVB_RELEASE_STRING_SIZE - 1] != '\0') {
+		avb_error("Release string does not end with a NUL byte.\n");
+		goto out;
+	}
+
+	/* Ensure inner block sizes are multiple of 64. */
+	if ((h.authentication_data_block_size & 0x3f) != 0 ||
+		(h.auxiliary_data_block_size & 0x3f) != 0) {
+		avb_error("Block size is not a multiple of 64.\n");
+		goto out;
+	}
+
+	/* Ensure block sizes all add up to at most |length|. */
+	uint64_t block_total = sizeof(AvbVBMetaImageHeader);
+	if (!avb_safe_add_to(&block_total, h.authentication_data_block_size) ||
+		!avb_safe_add_to(&block_total, h.auxiliary_data_block_size)) {
+		avb_error("Overflow while computing size of boot image.\n");
+		goto out;
+	}
+	if (block_total > length) {
+		avb_error("Block sizes add up to more than given length.\n");
+		goto out;
+	}
+
+	uintptr_t data_ptr = (uintptr_t)data;
+	/* Ensure passed in memory doesn't wrap. */
+	if (!avb_safe_add(NULL, (uint64_t)data_ptr, length)) {
+		avb_error("Boot image location and length mismatch.\n");
+		goto out;
+	}
+
+	/* Ensure hash and signature are entirely in the Authentication data block. */
+	uint64_t hash_end;
+	if (!avb_safe_add(&hash_end, h.hash_offset, h.hash_size) ||
+		hash_end > h.authentication_data_block_size) {
+		avb_error("Hash is not entirely in its block.\n");
+		goto out;
+	}
+	uint64_t signature_end;
+	if (!avb_safe_add(&signature_end, h.signature_offset, h.signature_size) ||
+		signature_end > h.authentication_data_block_size) {
+		avb_error("Signature is not entirely in its block.\n");
+		goto out;
+	}
+
+	/* Ensure public key is entirely in the Auxiliary data block. */
+	uint64_t pubkey_end;
+	if (!avb_safe_add(&pubkey_end, h.public_key_offset, h.public_key_size) ||
+		pubkey_end > h.auxiliary_data_block_size) {
+		avb_error("Public key is not entirely in its block.\n");
+		goto out;
+	}
+
+	/* Ensure public key metadata (if set) is entirely in the Auxiliary
+	 * data block. */
+	if (h.public_key_metadata_size > 0) {
+		uint64_t pubkey_md_end;
+		if (!avb_safe_add(&pubkey_md_end,
+			h.public_key_metadata_offset,
+			h.public_key_metadata_size) ||
+			pubkey_md_end > h.auxiliary_data_block_size) {
+			avb_error("Public key metadata is not entirely in its block.\n");
+			goto out;
+		}
+	}
+
+	/* Bail early if there's no hash or signature. */
+	if (h.algorithm_type == AVB_ALGORITHM_TYPE_NONE) {
+		ret = AVB_VBMETA_VERIFY_RESULT_OK_NOT_SIGNED;
+		goto out;
+	}
+
+	/* Ensure algorithm field is supported. */
+	algorithm = avb_get_algorithm_data(h.algorithm_type);
+	if (!algorithm) {
+		avb_error("Invalid or unknown algorithm.\n");
+		goto out;
+	}
+
+	/* Bail if the embedded hash size doesn't match the chosen algorithm. */
+	if (h.hash_size != algorithm->hash_len) {
+		avb_error("Embedded hash has wrong size.\n");
+		goto out;
+	}
+
+	/* No overflow checks needed from here-on after since all block
+	 * sizes and offsets have been verified above.
+	 */
+
+	header_block = data;
+	authentication_block = header_block + sizeof(AvbVBMetaImageHeader);
+	auxiliary_block = authentication_block + h.authentication_data_block_size;
+
+	switch (h.algorithm_type) {
+	/* Explicit fall-through: */
+	case AVB_ALGORITHM_TYPE_SHA256_RSA2048:
+	case AVB_ALGORITHM_TYPE_SHA256_RSA4096:
+	case AVB_ALGORITHM_TYPE_SHA256_RSA8192:
+		avb_sha256_init(&sha256_ctx);
+		avb_sha256_update(
+			&sha256_ctx, header_block, sizeof(AvbVBMetaImageHeader));
+		avb_sha256_update(
+			&sha256_ctx, auxiliary_block, h.auxiliary_data_block_size);
+		computed_hash = avb_sha256_final(&sha256_ctx);
+		break;
+	/* Explicit fall-through: */
+	case AVB_ALGORITHM_TYPE_SHA512_RSA2048:
+	case AVB_ALGORITHM_TYPE_SHA512_RSA4096:
+	case AVB_ALGORITHM_TYPE_SHA512_RSA8192:
+		avb_sha512_init(&sha512_ctx);
+		avb_sha512_update(
+			&sha512_ctx, header_block, sizeof(AvbVBMetaImageHeader));
+		avb_sha512_update(
+			&sha512_ctx, auxiliary_block, h.auxiliary_data_block_size);
+		computed_hash = avb_sha512_final(&sha512_ctx);
+		break;
+	default:
+		avb_error("Unknown algorithm.\n");
+		goto out;
+	}
+
+	if (avb_safe_memcmp(authentication_block + h.hash_offset,
+                      computed_hash,
+                      h.hash_size) != 0) {
+		avb_error("Hash does not match!\n");
+		ret = AVB_VBMETA_VERIFY_RESULT_HASH_MISMATCH;
+		goto out;
+	}
+
+	verification_result = avb_rsa_verify(auxiliary_block + h.public_key_offset,
+					h.public_key_size,
+					authentication_block + h.signature_offset,
+					h.signature_size,
+					authentication_block + h.hash_offset,
+					h.hash_size,
+					algorithm->padding,
+					algorithm->padding_len);
+
+	if (verification_result == 0) {
+		ret = AVB_VBMETA_VERIFY_RESULT_SIGNATURE_MISMATCH;
+		goto out;
+	}
+
+	if (h.public_key_size > 0) {
+		if (out_public_key_data != NULL) {
+			*out_public_key_data = auxiliary_block + h.public_key_offset;
+		}
+		if (out_public_key_length != NULL) {
+			*out_public_key_length = h.public_key_size;
+		}
+	}
+
+	ret = AVB_VBMETA_VERIFY_RESULT_OK;
+
+out:
+	return ret;
+}
+
+void avb_vbmeta_image_header_to_host_byte_order(const AvbVBMetaImageHeader* src,
+                                                AvbVBMetaImageHeader* dest)
+{
+	avb_memcpy(dest, src, sizeof(AvbVBMetaImageHeader));
+
+	dest->required_libavb_version_major =
+		avb_be32toh(dest->required_libavb_version_major);
+	dest->required_libavb_version_minor =
+		avb_be32toh(dest->required_libavb_version_minor);
+
+	dest->authentication_data_block_size =
+		avb_be64toh(dest->authentication_data_block_size);
+	dest->auxiliary_data_block_size =
+		avb_be64toh(dest->auxiliary_data_block_size);
+
+	dest->algorithm_type = avb_be32toh(dest->algorithm_type);
+
+	dest->hash_offset = avb_be64toh(dest->hash_offset);
+	dest->hash_size = avb_be64toh(dest->hash_size);
+
+	dest->signature_offset = avb_be64toh(dest->signature_offset);
+	dest->signature_size = avb_be64toh(dest->signature_size);
+
+	dest->public_key_offset = avb_be64toh(dest->public_key_offset);
+	dest->public_key_size = avb_be64toh(dest->public_key_size);
+
+	dest->public_key_metadata_offset =
+		avb_be64toh(dest->public_key_metadata_offset);
+	dest->public_key_metadata_size = avb_be64toh(dest->public_key_metadata_size);
+
+	dest->descriptors_offset = avb_be64toh(dest->descriptors_offset);
+	dest->descriptors_size = avb_be64toh(dest->descriptors_size);
+
+	dest->rollback_index = avb_be64toh(dest->rollback_index);
+	dest->flags = avb_be32toh(dest->flags);
+}
+
+const char* avb_vbmeta_verify_result_to_string(AvbVBMetaVerifyResult result)
+{
+	const char* ret = NULL;
+
+	switch (result) {
+	case AVB_VBMETA_VERIFY_RESULT_OK:
+		ret = "OK";
+		break;
+	case AVB_VBMETA_VERIFY_RESULT_OK_NOT_SIGNED:
+		ret = "OK_NOT_SIGNED";
+		break;
+	case AVB_VBMETA_VERIFY_RESULT_INVALID_VBMETA_HEADER:
+		ret = "INVALID_VBMETA_HEADER";
+		break;
+	case AVB_VBMETA_VERIFY_RESULT_UNSUPPORTED_VERSION:
+		ret = "UNSUPPORTED_VERSION";
+		break;
+	case AVB_VBMETA_VERIFY_RESULT_HASH_MISMATCH:
+		ret = "HASH_MISMATCH";
+		break;
+	case AVB_VBMETA_VERIFY_RESULT_SIGNATURE_MISMATCH:
+		ret = "SIGNATURE_MISMATCH";
+		break;
+	/* Do not add a 'default:' case here because of -Wswitch. */
+	}
+
+	if (ret == NULL) {
+		avb_error("Unknown AvbVBMetaVerifyResult value.\n");
+		ret = "(unknown)";
+	}
+
+	return ret;
+}
diff --git a/lib/avb/rk_libavb/avb_version.c b/lib/avb/rk_libavb/avb_version.c
new file mode 100644
index 0000000000..8137a7201a
--- /dev/null
+++ b/lib/avb/rk_libavb/avb_version.c
@@ -0,0 +1,34 @@
+/*
+ * Copyright (C) 2017 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/libavb.h>
+
+#define AVB_QUOTE(str) #str
+#define AVB_EXPAND_AND_QUOTE(str) AVB_QUOTE(str)
+
+/* Keep in sync with get_release_string() in avbtool. */
+const char* avb_version_string(void) {
+  return AVB_EXPAND_AND_QUOTE(AVB_VERSION_MAJOR) "." AVB_EXPAND_AND_QUOTE(
+      AVB_VERSION_MINOR) "." AVB_EXPAND_AND_QUOTE(AVB_VERSION_SUB);
+}

commit 03204b06ffc9f3c1dd9d98b430ee2c784d0c4f33
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 13 15:16:52 2017 +0800

    common: support static_assert()
    
    The static_assert() is support in C11, which may used in source code,
    use _Static_assert for it.
    
    Change-Id: Id029c4db3a899c9531c481e55541090e0b92e2b6
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/common.h b/include/common.h
index d5067cd1d0..017268929f 100644
--- a/include/common.h
+++ b/include/common.h
@@ -98,6 +98,11 @@ void __assert_fail(const char *assertion, const char *file, unsigned line,
 			##args, __FILE__, __LINE__, __func__);		\
 } while (0)
 
+#if (__STDC_VERSION__ >= 201112L) || defined(__cplusplus)
+# undef static_assert
+# define static_assert _Static_assert
+#endif
+
 #ifndef BUG
 #define BUG() do { \
 	printf("BUG: failure at %s:%d/%s()!\n", __FILE__, __LINE__, __FUNCTION__); \

commit 2be87fa7ea6a33093312000bd0c9b31c02ba2a7b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Aug 15 09:59:37 2017 +0800

    rockchip: rk3229: use google vid/pid
    
    Change-Id: I385cdbcd0d97a8ae680898aeb3669a6f00a41954
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index ffe7ee27e9..e035e7c771 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -77,6 +77,6 @@ CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x320a
+CONFIG_G_DNL_VENDOR_NUM=0x18d1
+CONFIG_G_DNL_PRODUCT_NUM=0xd00d
 CONFIG_ERRNO_STR=y

commit 2a132aff67810ce8071f79b3e188093dc8dc53c0
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Aug 15 09:56:18 2017 +0800

    rockchip: rk322x: reserve memory for trsut TA
    
    Change-Id: I10f271018b8aaaaeac4f23680b099b2df1947ab4
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk322x-board.c b/arch/arm/mach-rockchip/rk322x-board.c
index 1c931b03d7..137479eb7d 100644
--- a/arch/arm/mach-rockchip/rk322x-board.c
+++ b/arch/arm/mach-rockchip/rk322x-board.c
@@ -61,9 +61,9 @@ int dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
 	gd->bd->bi_dram[0].size = 0x8400000;
-	/* Reserve 0x200000 for OPTEE */
+	/* Reserve 32M for OPTEE with TA */
 	gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE
-				+ gd->bd->bi_dram[0].size + 0x200000;
+				+ gd->bd->bi_dram[0].size + 0x2000000;
 	gd->bd->bi_dram[1].size = gd->bd->bi_dram[0].start
 				+ gd->ram_size - gd->bd->bi_dram[1].start;
 

commit f5af8671dfbc99b1b7aa8ef66d922acb86f34abb
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Jul 25 16:55:19 2017 +0800

    rockchip: enable fastboot for firefly
    
    Change-Id: I8f0cbe975e8d63de3988bad7fe8593d460372cc9
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
index da9741c292..5d228af96c 100644
--- a/configs/firefly-rk3399_defconfig
+++ b/configs/firefly-rk3399_defconfig
@@ -23,7 +23,14 @@ CONFIG_FASTBOOT_BUF_SIZE=0x08000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_CMD_BOOTZ=y
+CONFIG_FASTBOOT=y
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
 # CONFIG_CMD_IMLS is not set
+CONFIG_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x00800800
 CONFIG_CMD_GPT=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
@@ -85,9 +92,21 @@ CONFIG_USB_ETHER_MCS7830=y
 CONFIG_USB_ETHER_RTL8152=y
 CONFIG_USB_ETHER_SMSC95XX=y
 CONFIG_USE_TINY_PRINTF=y
+CONFIG_ERRNO_STR=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DUALSPEED=y
+CONFIG_USB_GADGET_VBUS_DRAW=0
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x330c
-CONFIG_ERRNO_STR=y
+CONFIG_G_DNL_VENDOR_NUM=0x18d1
+CONFIG_G_DNL_PRODUCT_NUM=0xd00d
+CONFIG_FASTBOOT=y
+CONFIG_CMD_FASTBOOT=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_BUF_ADDR=0x00800800
+CONFIG_FASTBOOT_BUF_SIZE=0x08000000
+CONFIG_CMD_USB_MASS_STORAGE=y

commit 16d3892d4475248226624ef79474611db7095c7f
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Jul 25 16:52:03 2017 +0800

    fastboot: mmc: add response for all ack
    
    To pass the build.
    
    Change-Id: Ifafbb3bd586f4ff0a7def210720e4db16064ec4d
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/fb_mmc.c b/common/fb_mmc.c
index a499bc4ffe..6fddf5e86f 100644
--- a/common/fb_mmc.c
+++ b/common/fb_mmc.c
@@ -141,7 +141,8 @@ static void write_raw_image(struct blk_desc *dev_desc, disk_partition_t *info,
  */
 static lbaint_t fb_mmc_get_boot_header(struct blk_desc *dev_desc,
 				       disk_partition_t *info,
-				       struct andr_img_hdr *hdr)
+				       struct andr_img_hdr *hdr,
+				       char *response)
 {
 	ulong sector_size;		/* boot partition sector size */
 	lbaint_t hdr_sectors;		/* boot image header sectors count */
@@ -152,7 +153,7 @@ static lbaint_t fb_mmc_get_boot_header(struct blk_desc *dev_desc,
 	hdr_sectors = DIV_ROUND_UP(sizeof(struct andr_img_hdr), sector_size);
 	if (hdr_sectors == 0) {
 		error("invalid number of boot sectors: 0");
-		fastboot_fail("invalid number of boot sectors: 0");
+		fastboot_fail("invalid number of boot sectors: 0", response);
 		return 0;
 	}
 
@@ -160,7 +161,7 @@ static lbaint_t fb_mmc_get_boot_header(struct blk_desc *dev_desc,
 	res = blk_dread(dev_desc, info->start, hdr_sectors, (void *)hdr);
 	if (res != hdr_sectors) {
 		error("cannot read header from boot partition");
-		fastboot_fail("cannot read header from boot partition");
+		fastboot_fail("cannot read header from boot partition", response);
 		return 0;
 	}
 
@@ -168,7 +169,7 @@ static lbaint_t fb_mmc_get_boot_header(struct blk_desc *dev_desc,
 	res = android_image_check_header(hdr);
 	if (res != 0) {
 		error("bad boot image magic");
-		fastboot_fail("boot partition not initialized");
+		fastboot_fail("boot partition not initialized", response);
 		return 0;
 	}
 
@@ -186,7 +187,8 @@ static lbaint_t fb_mmc_get_boot_header(struct blk_desc *dev_desc,
  */
 static int fb_mmc_update_zimage(struct blk_desc *dev_desc,
 				void *download_buffer,
-				unsigned int download_bytes)
+				unsigned int download_bytes,
+				char *response)
 {
 	uintptr_t hdr_addr;			/* boot image header address */
 	struct andr_img_hdr *hdr;		/* boot image header */
@@ -206,7 +208,7 @@ static int fb_mmc_update_zimage(struct blk_desc *dev_desc,
 	res = part_get_info_by_name(dev_desc, BOOT_PARTITION_NAME, &info);
 	if (res < 0) {
 		error("cannot find boot partition");
-		fastboot_fail("cannot find boot partition");
+		fastboot_fail("cannot find boot partition", response);
 		return -1;
 	}
 
@@ -215,17 +217,17 @@ static int fb_mmc_update_zimage(struct blk_desc *dev_desc,
 	hdr = (struct andr_img_hdr *)hdr_addr;
 
 	/* Read boot image header */
-	hdr_sectors = fb_mmc_get_boot_header(dev_desc, &info, hdr);
+	hdr_sectors = fb_mmc_get_boot_header(dev_desc, &info, hdr, response);
 	if (hdr_sectors == 0) {
 		error("unable to read boot image header");
-		fastboot_fail("unable to read boot image header");
+		fastboot_fail("unable to read boot image header", response);
 		return -1;
 	}
 
 	/* Check if boot image has second stage in it (we don't support it) */
 	if (hdr->second_size > 0) {
 		error("moving second stage is not supported yet");
-		fastboot_fail("moving second stage is not supported yet");
+		fastboot_fail("moving second stage is not supported yet", response);
 		return -1;
 	}
 
@@ -243,7 +245,7 @@ static int fb_mmc_update_zimage(struct blk_desc *dev_desc,
 			ramdisk_buffer);
 	if (res != ramdisk_sectors) {
 		error("cannot read ramdisk from boot partition");
-		fastboot_fail("cannot read ramdisk from boot partition");
+		fastboot_fail("cannot read ramdisk from boot partition", response);
 		return -1;
 	}
 
@@ -252,7 +254,7 @@ static int fb_mmc_update_zimage(struct blk_desc *dev_desc,
 	res = blk_dwrite(dev_desc, info.start, hdr_sectors, (void *)hdr);
 	if (res == 0) {
 		error("cannot writeback boot image header");
-		fastboot_fail("cannot write back boot image header");
+		fastboot_fail("cannot write back boot image header", response);
 		return -1;
 	}
 
@@ -264,7 +266,7 @@ static int fb_mmc_update_zimage(struct blk_desc *dev_desc,
 			 download_buffer);
 	if (res == 0) {
 		error("cannot write new kernel");
-		fastboot_fail("cannot write new kernel");
+		fastboot_fail("cannot write new kernel", response);
 		return -1;
 	}
 
@@ -276,12 +278,12 @@ static int fb_mmc_update_zimage(struct blk_desc *dev_desc,
 			 ramdisk_buffer);
 	if (res == 0) {
 		error("cannot write back original ramdisk");
-		fastboot_fail("cannot write back original ramdisk");
+		fastboot_fail("cannot write back original ramdisk", response);
 		return -1;
 	}
 
 	puts("........ zImage was updated in boot partition\n");
-	fastboot_okay("");
+	fastboot_okay("", response);
 	return 0;
 }
 #endif
@@ -327,23 +329,23 @@ void fb_mmc_flash_write(const char *cmd, void *download_buffer,
 		if (is_valid_dos_buf(download_buffer)) {
 			printf("%s: invalid MBR - refusing to write to flash\n",
 			       __func__);
-			fastboot_fail("invalid MBR partition");
+			fastboot_fail("invalid MBR partition", response);
 			return;
 		}
 		if (write_mbr_partition(dev_desc, download_buffer)) {
 			printf("%s: writing MBR partition failed\n", __func__);
-			fastboot_fail("writing MBR partition failed");
+			fastboot_fail("writing MBR partition failed", response);
 			return;
 		}
 		printf("........ success\n");
-		fastboot_okay("");
+		fastboot_okay("", response);
 		return;
 	}
 #endif
 
 #ifdef CONFIG_ANDROID_BOOT_IMAGE
 	if (strncasecmp(cmd, "zimage", 6) == 0) {
-		fb_mmc_update_zimage(dev_desc, download_buffer, download_bytes);
+		fb_mmc_update_zimage(dev_desc, download_buffer, download_bytes, response);
 		return;
 	}
 #endif

commit 46eed855886811b48055ebd26652b1b6828f6f97
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Jul 25 16:51:00 2017 +0800

    android: do not compile android boot in SPL
    
    Change-Id: I2797754e320255f751aa9d02f168031dcaa50fb9
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/Makefile b/common/Makefile
index 463042f1a0..232cd85213 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -100,11 +100,11 @@ obj-y += malloc_simple.o
 endif
 endif
 obj-y += image.o
-obj-$(CONFIG_ANDROID_AB) += android_ab.o
-obj-$(CONFIG_ANDROID_BOOT_IMAGE) += image-android.o
+obj-$(CONFIG_$(SPL_TPL_)ANDROID_AB) += android_ab.o
+obj-$(CONFIG_$(SPL_TPL_)ANDROID_BOOT_IMAGE) += image-android.o
+obj-$(CONFIG_$(SPL_TPL_)ANDROID_BOOTLOADER) += android_bootloader.o
 obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += image-fdt.o
 obj-$(CONFIG_$(SPL_TPL_)FIT) += image-fit.o
-obj-$(CONFIG_ANDROID_BOOTLOADER) += android_bootloader.o
 obj-$(CONFIG_FIT_EMBED) += boot_fit.o common_fit.o
 obj-$(CONFIG_$(SPL_TPL_)FIT_SIGNATURE) += image-sig.o
 obj-$(CONFIG_IO_TRACE) += iotrace.o

commit a49a0552269958a5623fae5da5b6d3fc21c8da55
Author: Alex Deymo <deymo@google.com>
Date:   Fri Apr 21 18:03:08 2017 -0700

    android: Pass the ramdisk to the kernel.
    
    Android kernel image format can include an initramfs image in the same
    kernel partition. This patch passes the initramfs to the kernel, which
    in the normal boot mode ignores it by passing "skip_initramfs" in the
    command line.
    
    Bug: 34346003
    Test: `am broadcast -a android.intent.action.MASTER_CLEAR` factory
    reseted the device.
    
    Change-Id: I21d89e34a0f54badf3b2e3ad8981cef75f6d5edf

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 8ed3b378d6..fbfe3de50c 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -161,7 +161,8 @@ static int android_bootloader_boot_kernel(unsigned long kernel_address)
 {
 	char kernel_addr_str[12];
 	char *fdt_addr = env_get("fdt_addr");
-	char *bootm_args[] = { "bootm", kernel_addr_str, "-", fdt_addr, NULL };
+	char *bootm_args[] = {
+		"bootm", kernel_addr_str, kernel_addr_str, fdt_addr, NULL };
 
 	sprintf(kernel_addr_str, "0x%lx", kernel_address);
 

commit df6f4a1cdf82bcd055fc1a815251d47324102371
Author: Jocelyn Bohr <bohr@google.com>
Date:   Tue Apr 4 15:34:27 2017 -0700

    fastboot: Handle getvar for partition-size
    
    Bug: 36889156
    Test: Ran 'getvar partition-size:<partition>' for all partitions on rpi3
    Change-Id: Id85a1164ab382f43201a08d3f9d86eb42ad1e3cd

diff --git a/net/fastboot.c b/net/fastboot.c
index a5d059bb08..4ec3f09db0 100644
--- a/net/fastboot.c
+++ b/net/fastboot.c
@@ -280,19 +280,24 @@ static void fb_getvar(char *response)
 		} else {
 			write_fb_response("OKAY", "no", response);
 		}
-	} else if (!strncmp("partition-type", cmd_parameter, 14)) {
+	} else if (!strncmp("partition-type", cmd_parameter, 14) ||
+		   !strncmp("partition-size", cmd_parameter, 14)) {
 		disk_partition_t part_info;
 		struct blk_desc *dev_desc;
 		char *part_name = cmd_parameter;
+		char part_size_str[20];
 
 		cmd_parameter = strsep(&part_name, ":");
 		dev_desc = blk_get_dev("mmc", 0);
-		if (dev_desc == NULL) {
+		if (!dev_desc) {
 			write_fb_response("FAIL", "block device not found", response);
 		} else if (part_get_info_efi_by_name(dev_desc, part_name, &part_info) < 0) {
 			write_fb_response("FAIL", "partition not found", response);
-		} else {
+		} else if (!strncmp("partition-type", cmd_parameter, 14)) {
 			write_fb_response("OKAY", (char*)part_info.type, response);
+		} else if (!strncmp("partition-size", cmd_parameter, 14)) {
+			sprintf(part_size_str, "0x%016x", (int)part_info.size);
+			write_fb_response("OKAY", part_size_str, response);
 		}
 	} else {
 		printf("WARNING: unknown variable: %s\n", cmd_parameter);

commit 170e9eb9d1a08bef196b8c4ded4119cb531a8c1c
Author: Alex Deymo <deymo@google.com>
Date:   Sat Apr 1 23:00:59 2017 -0700

    android: Fix off-by-one error when joining strings
    
    When concatenating the strings to form a new command line in the
    android bootloader flow, the null-terminator was placed one byte after
    the end of the allocated string.
    
    Bug: None
    Test: booted a rpi3.
    Change-Id: I120e09a77bb1c27980e7ce2b5f9b8961424ed0c3

diff --git a/cmd/android_ab_select.c b/cmd/android_ab_select.c
index 512fa48d90..2e3a3116ba 100644
--- a/cmd/android_ab_select.c
+++ b/cmd/android_ab_select.c
@@ -35,7 +35,7 @@ static int do_android_ab_select(cmd_tbl_t *cmdtp, int flag, int argc,
 	/* Android standard slot names are 'a', 'b', ... */
 	slot[0] = ANDROID_BOOT_SLOT_NAME(ret);
 	slot[1] = '\0';
-	setenv(argv[1], slot);
+	env_set(argv[1], slot);
 	printf("ANDROID: Booting slot: %s\n", slot);
 	return CMD_RET_SUCCESS;
 }
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 5c659c7576..8ed3b378d6 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -200,7 +200,8 @@ static char *strjoin(const char **chunks, char separator)
 		*current = separator;
 		current++;
 	}
-	*current = '\0';
+	/* Replace the last separator by a \0. */
+	current[-1] = '\0';
 	return ret;
 }
 

commit 180cc7c60133d7a54b43ddb99014424402d0339e
Author: Alex Deymo <deymo@google.com>
Date:   Fri Mar 24 23:05:29 2017 -0700

    android: Implement A/B slot select.
    
    The android_bootloader_control struct defined in bootloader_message.h
    stored the A/B metadata used to decide which slot should we use to boot
    the device. This patch implements the bootloader side of the slot
    selection in a new "android_ab_select" command which decides the
    current slot and updates the metadata as needed.
    
    Bug: 32707546
    Test: Booted a rpi3, updated to the other slot.
    Change-Id: I9344ff5b76194160d2b466a50e84f4f423b1a98a

diff --git a/cmd/Kconfig b/cmd/Kconfig
index e989873deb..502002de95 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -762,6 +762,17 @@ config CMD_BOOT_ANDROID
 	  and booting it. The boot mode is determined by the contents of the
 	  Android Bootloader Message.
 
+config CMD_ANDROID_AB_SELECT
+	bool "android_ab_select"
+	default n
+	depends on ANDROID_AB
+	help
+	  On Android devices with more than one boot slot (multiple copies of
+	  the kernel and system images) this provides a command to select which
+	  slot should be used to boot from and register the boot attempt. This
+	  is used by the new A/B update model where one slot is updated in the
+	  background while running from the other slot.
+
 config CMD_MMC
 	bool "mmc"
 	help
diff --git a/cmd/Makefile b/cmd/Makefile
index 8f19d7dfe5..29fb14aa25 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -14,6 +14,8 @@ obj-y += version.o
 
 # command
 obj-$(CONFIG_CMD_AES) += aes.o
+obj-$(CONFIG_CMD_AMBAPP) += ambapp.o
+obj-$(CONFIG_CMD_ANDROID_AB_SELECT) += android_ab_select.o android_cmds.o
 obj-$(CONFIG_CMD_ARMFLASH) += armflash.o
 obj-y += blk_common.o
 obj-$(CONFIG_SOURCE) += source.o
@@ -77,7 +79,7 @@ obj-$(CONFIG_LED_STATUS_CMD) += legacy_led.o
 obj-$(CONFIG_CMD_LED) += led.o
 obj-$(CONFIG_CMD_LICENSE) += license.o
 obj-y += load.o
-obj-$(CONFIG_CMD_LOAD_ANDROID) += load_android.o
+obj-$(CONFIG_CMD_LOAD_ANDROID) += load_android.o android_cmds.o
 obj-$(CONFIG_LOGBUFFER) += log.o
 obj-$(CONFIG_ID_EEPROM) += mac.o
 obj-$(CONFIG_CMD_MD5SUM) += md5sum.o
diff --git a/cmd/android_ab_select.c b/cmd/android_ab_select.c
new file mode 100644
index 0000000000..512fa48d90
--- /dev/null
+++ b/cmd/android_ab_select.c
@@ -0,0 +1,56 @@
+/*
+ * Copyright (C) 2017 The Android Open Source Project
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#include <android_cmds.h>
+#include <android_ab.h>
+#include <common.h>
+#include <command.h>
+
+static int do_android_ab_select(cmd_tbl_t *cmdtp, int flag, int argc,
+				char * const argv[])
+{
+	int ret;
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+	char slot[2];
+
+	if (argc != 4)
+		return CMD_RET_USAGE;
+
+	/* Lookup the "misc" partition from argv[2] and argv[3] */
+	if (part_get_info_by_dev_and_name_or_num(argv[2], argv[3],
+						 &dev_desc, &part_info) < 0) {
+		return CMD_RET_FAILURE;
+	}
+
+	ret = android_ab_select(dev_desc, &part_info);
+	if (ret < 0) {
+		printf("Android boot failed, error %d.\n", ret);
+		return CMD_RET_FAILURE;
+	}
+
+	/* Android standard slot names are 'a', 'b', ... */
+	slot[0] = ANDROID_BOOT_SLOT_NAME(ret);
+	slot[1] = '\0';
+	setenv(argv[1], slot);
+	printf("ANDROID: Booting slot: %s\n", slot);
+	return CMD_RET_SUCCESS;
+}
+
+U_BOOT_CMD(
+	android_ab_select, 4, 0, do_android_ab_select,
+	"Select the slot used to boot from and register the boot attempt.",
+	"<slot_var_name> <interface> <dev[:part|;part_name]>\n"
+	"    - Load the slot metadata from the partition 'part' on\n"
+	"      device type 'interface' instance 'dev' and store the active\n"
+	"      slot in the 'slot_var_name' variable. This also updates the\n"
+	"      Android slot metadata with a boot attempt, which can cause\n"
+	"      successive calls to this function to return a different result\n"
+	"      if the returned slot runs out of boot attempts.\n"
+	"    - If 'part_name' is passed, preceded with a ; instead of :, the\n"
+	"      partition name whose label is 'part_name' will be looked up in\n"
+	"      the partition table. This is commonly the \"misc\" partition.\n"
+);
diff --git a/cmd/android_cmds.c b/cmd/android_cmds.c
new file mode 100644
index 0000000000..95265773ae
--- /dev/null
+++ b/cmd/android_cmds.c
@@ -0,0 +1,74 @@
+/*
+ * Copyright (C) 2017 The Android Open Source Project
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#include <android_cmds.h>
+
+#include <common.h>
+#include <part.h>
+
+/**
+ * part_get_info_by_dev_and_name - Parse a device number and partition name
+ * string in the form of "device_num;partition_name", for example "0;misc".
+ * If the partition is found, sets dev_desc and part_info accordingly with the
+ * information of the partition with the given partition_name.
+ *
+ * @dev_iface:		Device interface.
+ * @dev_part_str:	Input string argument, like "0;misc".
+ * @dev_desc:		Place to store the device description pointer.
+ * @part_info:		Place to store the partition information.
+ * @return 0 on success, or -1 on error
+ */
+static int part_get_info_by_dev_and_name(const char *dev_iface,
+					 const char *dev_part_str,
+					 struct blk_desc **dev_desc,
+					 disk_partition_t *part_info)
+{
+	char *ep;
+	const char *part_str;
+	int dev_num;
+
+	part_str = strchr(dev_part_str, ';');
+	if (!part_str || part_str == dev_part_str)
+		return -1;
+
+	dev_num = simple_strtoul(dev_part_str, &ep, 16);
+	if (ep != part_str) {
+		/* Not all the first part before the ; was parsed. */
+		return -1;
+	}
+	part_str++;
+
+	*dev_desc = blk_get_dev(dev_iface, dev_num);
+	if (!*dev_desc) {
+		printf("Could not find %s %d\n", dev_iface, dev_num);
+		return -1;
+	}
+	if (part_get_info_by_name(*dev_desc, part_str, part_info) < 0) {
+		printf("Could not find \"%s\" partition\n", part_str);
+		return -1;
+	}
+	return 0;
+}
+
+int part_get_info_by_dev_and_name_or_num(const char *dev_iface,
+					 const char *dev_part_str,
+					 struct blk_desc **dev_desc,
+					 disk_partition_t *part_info) {
+	/* Split the part_name if passed as "$dev_num;part_name". */
+	if (!part_get_info_by_dev_and_name(dev_iface, dev_part_str,
+					   dev_desc, part_info))
+		return 0;
+	/* Couldn't lookup by name, try looking up the partition description
+	 * directly.
+	 */
+	if (blk_get_device_part_str(dev_iface, dev_part_str,
+				    dev_desc, part_info, 1) < 0) {
+		printf("Couldn't find partition %s %s\n",
+		       dev_iface, dev_part_str);
+		return -1;
+	}
+	return 0;
+}
diff --git a/cmd/boot_android.c b/cmd/boot_android.c
index a2148e0238..0da6a7d056 100644
--- a/cmd/boot_android.c
+++ b/cmd/boot_android.c
@@ -5,53 +5,10 @@
  */
 
 #include <android_bootloader.h>
+#include <android_cmds.h>
 #include <common.h>
 #include <command.h>
 
-/**
- * part_get_info_by_dev_and_name - Parse a device number and partition name
- * string in the form of "device_num;partition_name", for example "0;misc".
- * If the partition is found, sets dev_desc and part_info accordingly with the
- * information of the partition with the given partition_name.
- *
- * @dev_iface:		Device interface.
- * @dev_part_str:	Input string argument, like "0;misc".
- * @dev_desc:		Place to put the device description pointer.
- * @part_info:		Place to put the partition information.
- * @return 0 on success, or -1 on error
- */
-static int part_get_info_by_dev_and_name(const char *dev_iface,
-					 const char *dev_part_str,
-					 struct blk_desc **dev_desc,
-					 disk_partition_t *part_info)
-{
-	char *ep;
-	const char *part_str;
-	int dev_num;
-
-	part_str = strchr(dev_part_str, ';');
-	if (!part_str)
-		return -1;
-
-	dev_num = simple_strtoul(dev_part_str, &ep, 16);
-	if (ep != part_str) {
-		/* Not all the first part before the ; was parsed. */
-		return -1;
-	}
-	part_str++;
-
-	*dev_desc = blk_get_dev(dev_iface, dev_num);
-	if (!*dev_desc) {
-		printf("Could not find %s %d\n", dev_iface, dev_num);
-		return -1;
-	}
-	if (part_get_info_by_name(*dev_desc, part_str, part_info) < 0) {
-		printf("Could not find \"%s\" partition\n", part_str);
-		return -1;
-	}
-	return 0;
-}
-
 static int do_boot_android(cmd_tbl_t *cmdtp, int flag, int argc,
 			   char * const argv[])
 {
@@ -60,8 +17,6 @@ static int do_boot_android(cmd_tbl_t *cmdtp, int flag, int argc,
 	char *addr_arg_endp, *addr_str;
 	struct blk_desc *dev_desc;
 	disk_partition_t part_info;
-	const char *misc_part_iface;
-	const char *misc_part_desc;
 
 	if (argc < 4)
 		return CMD_RET_USAGE;
@@ -80,21 +35,9 @@ static int do_boot_android(cmd_tbl_t *cmdtp, int flag, int argc,
 			load_address = CONFIG_SYS_LOAD_ADDR;
 	}
 
-	/* Lookup the "misc" partition from argv[1] and argv[2] */
-	misc_part_iface = argv[1];
-	misc_part_desc = argv[2];
-	/* Split the part_name if passed as "$dev_num;part_name". */
-	if (part_get_info_by_dev_and_name(misc_part_iface, misc_part_desc,
-					  &dev_desc, &part_info) < 0) {
-		/* Couldn't lookup by name from mmc, try looking up the
-		 * partition description directly.
-		 */
-		if (blk_get_device_part_str(misc_part_iface, misc_part_desc,
-					    &dev_desc, &part_info, 1) < 0) {
-			printf("Couldn't find partition %s %s\n",
-			       misc_part_iface, misc_part_desc);
-			return CMD_RET_FAILURE;
-		}
+	if (part_get_info_by_dev_and_name_or_num(argv[1], argv[2],
+						 &dev_desc, &part_info) < 0) {
+		return CMD_RET_FAILURE;
 	}
 
 	ret = android_bootloader_boot_flow(dev_desc, &part_info, argv[3],
diff --git a/common/Kconfig b/common/Kconfig
index f36ba427ed..fec9afff24 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -482,6 +482,16 @@ config ANDROID_BOOTLOADER
 	  recovery mode or bootloader mode) and, if enabled, the slot to boot
 	  from in devices with multiple boot slots (A/B devices).
 
+config ANDROID_AB
+	bool "Support for Android A/B updates"
+	default n
+	help
+	  If enabled, adds support for the new Android A/B update model. This
+	  allows the bootloader to select which slot to boot from based on the
+	  information provided by userspace via the Android boot_ctrl HAL. This
+	  allows a bootloader to try a new version of the system but roll back
+	  to previous version if the new one didn't boot all the way.
+
 config ANDROID_BOOT_IMAGE
 	bool "Enable support for Android Boot Images"
 	help
diff --git a/common/Makefile b/common/Makefile
index 5f936fdc53..463042f1a0 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -100,6 +100,7 @@ obj-y += malloc_simple.o
 endif
 endif
 obj-y += image.o
+obj-$(CONFIG_ANDROID_AB) += android_ab.o
 obj-$(CONFIG_ANDROID_BOOT_IMAGE) += image-android.o
 obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += image-fdt.o
 obj-$(CONFIG_$(SPL_TPL_)FIT) += image-fit.o
diff --git a/common/android_ab.c b/common/android_ab.c
new file mode 100644
index 0000000000..cfbf5301a5
--- /dev/null
+++ b/common/android_ab.c
@@ -0,0 +1,266 @@
+/*
+ * Copyright (C) 2017 The Android Open Source Project
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#include <android_ab.h>
+
+#include <android_bootloader_message.h>
+#include <common.h>
+#include <malloc.h>
+#include <u-boot/crc.h>
+
+/** android_boot_control_compute_crc - Compute the CRC-32 of the bootloader
+ * control struct. Only the bytes up to the crc32_le field are considered for
+ * the CRC-32 calculation.
+ */
+static uint32_t android_boot_control_compute_crc(
+		struct android_bootloader_control *abc)
+{
+	return crc32(0, (void *)abc, offsetof(typeof(*abc), crc32_le));
+}
+
+/** android_boot_control_default - Initialize android_bootloader_control to the
+ * default value which allows to boot all slots in order from the first one.
+ * This value should be used when the bootloader message is corrupted, but not
+ * when a valid message indicates that all slots are unbootable.
+ */
+void android_boot_control_default(struct android_bootloader_control *abc)
+{
+	int i;
+	const struct android_slot_metadata metadata = {
+		.priority = 15,
+		.tries_remaining = 7,
+		.successful_boot = 0,
+		.verity_corrupted = 0,
+		.reserved = 0
+	};
+	memcpy(abc->slot_suffix, "a\0\0\0", 4);
+	abc->magic = ANDROID_BOOT_CTRL_MAGIC;
+	abc->version = ANDROID_BOOT_CTRL_VERSION;
+	abc->nb_slot = ARRAY_SIZE(abc->slot_info);
+	memset(abc->reserved0, 0, sizeof(abc->reserved0));
+	for (i = 0; i < abc->nb_slot; ++i) {
+		abc->slot_info[i] = metadata;
+	}
+	memset(abc->reserved1, 0, sizeof(abc->reserved1));
+	abc->crc32_le = android_boot_control_compute_crc(abc);
+}
+
+/** android_boot_control_create_from_disk
+ * Load the boot_control struct from disk into newly allocated memory. This
+ * function allocates and returns an integer number of disk blocks, based on the
+ * block size of the passed device to help performing a read-modify-write
+ * operation on the boot_control struct. The boot_control struct offset (2 KiB)
+ * must be a multiple of the device block size, for simplicity.
+ * @dev_desc: device where to read the boot_control struct from.
+ * @part_info: partition in 'dev_desc' where to read from, normally the "misc"
+ *             partition should be used.
+ */
+static void *android_boot_control_create_from_disk(
+		struct blk_desc *dev_desc,
+		const disk_partition_t *part_info)
+{
+	ulong abc_offset, abc_blocks;
+	void *buf;
+
+	abc_offset = offsetof(struct android_bootloader_message_ab,
+			      slot_suffix);
+	if (abc_offset % part_info->blksz) {
+		printf("ANDROID: Boot control block not block aligned.\n");
+		return NULL;
+	}
+	abc_offset /= part_info->blksz;
+
+	abc_blocks = DIV_ROUND_UP(sizeof(struct android_bootloader_control),
+				  part_info->blksz);
+	if (abc_offset + abc_blocks > part_info->size) {
+		printf("ANDROID: boot control partition too small. Need at"
+		       " least %lu blocks but have %lu blocks.\n",
+		       abc_offset + abc_blocks, part_info->size);
+		return NULL;
+	}
+	buf = malloc(abc_blocks * part_info->blksz);
+	if (!buf)
+		return NULL;
+
+	if (blk_dread(dev_desc, part_info->start + abc_offset, abc_blocks,
+		      buf) != abc_blocks) {
+		printf("ANDROID: Could not read from boot control partition\n");
+		free(buf);
+		return NULL;
+	}
+	debug("ANDROID: Loaded ABC, %lu blocks.\n", abc_blocks);
+	return buf;
+}
+
+/** android_boot_control_store
+ * Store the loaded boot_control block back to the same location it was read
+ * from with android_boot_control_create_from_misc().
+ *
+ * @abc_data_block: pointer to the boot_control struct and the extra bytes after
+ *                  it up to the nearest block boundary.
+ * @dev_desc: device where we should write the boot_control struct.
+ * @part_info: partition on the 'dev_desc' where to write.
+ * @return 0 on success and -1 on error.
+ */
+static int android_boot_control_store(void *abc_data_block,
+				      struct blk_desc *dev_desc,
+				      const disk_partition_t *part_info)
+{
+	ulong abc_offset, abc_blocks;
+
+	abc_offset = offsetof(struct android_bootloader_message_ab,
+			      slot_suffix) / part_info->blksz;
+	abc_blocks = DIV_ROUND_UP(sizeof(struct android_bootloader_control),
+				  part_info->blksz);
+	if (blk_dwrite(dev_desc, part_info->start + abc_offset, abc_blocks,
+		       abc_data_block) != abc_blocks) {
+		printf("ANDROID: Could not write back the misc partition\n");
+		return -1;
+	}
+	return 0;
+}
+
+/** android_boot_compare_slots - compares two slots returning which slot is
+ * should we boot from among the two.
+ * @a: The first bootable slot metadata
+ * @b: The second bootable slot metadata
+ * @return negative if the slot "a" is better, positive of the slot "b" is
+ * better or 0 if they are equally good.
+ */
+static int android_ab_compare_slots(const struct android_slot_metadata *a,
+				    const struct android_slot_metadata *b)
+{
+	/* Higher priority is better */
+	if (a->priority != b->priority)
+		return b->priority - a->priority;
+
+	/* Higher successful_boot value is better, in case of same priority. */
+	if (a->successful_boot != b->successful_boot)
+		return b->successful_boot - a->successful_boot;
+
+	/* Higher tries_remaining is better to ensure round-robin. */
+	if (a->tries_remaining != b->tries_remaining)
+		return b->tries_remaining - a->tries_remaining;
+
+	return 0;
+}
+
+int android_ab_select(struct blk_desc *dev_desc, disk_partition_t *part_info)
+{
+	struct android_bootloader_control *abc;
+	u32 crc32_le;
+	int slot, i;
+	bool store_needed = false;
+	char slot_suffix[4];
+
+	abc = android_boot_control_create_from_disk(dev_desc, part_info);
+	if (!abc) {
+		/* This condition represents an actual problem with the code
+		 * or the board setup, like an invalid partition information.
+		 * Signal a repair mode and do not try to boot from either
+		 * slot.
+		 */
+		return -1;
+	}
+
+	crc32_le = android_boot_control_compute_crc(abc);
+	if (abc->crc32_le != crc32_le) {
+		printf("ANDROID: Invalid CRC-32 (expected %.8x, found %.8x), "
+		       "re-initializing A/B metadata.\n",
+		       crc32_le, abc->crc32_le);
+		android_boot_control_default(abc);
+		store_needed = true;
+	}
+
+	if (abc->magic != ANDROID_BOOT_CTRL_MAGIC) {
+		printf("ANDROID: Unknown A/B metadata: %.8x\n", abc->magic);
+		free(abc);
+		return -1;
+	}
+
+	if (abc->version > ANDROID_BOOT_CTRL_VERSION) {
+		printf("ANDROID: Unsupported A/B metadata version: %.8x\n",
+		       abc->version);
+		free(abc);
+		return -1;
+	}
+
+	/* At this point a valid boot control metadata is stored in abc,
+	 * followed by other reserved data in the same block.
+	 * We select a with the higher priority slot that
+	 *  - is not marked as corrupted and
+	 *  - either has tries_remaining > 0 or successful_boot is true.
+	 * If the slot selected has a false successful_boot, we also decrement
+	 * the tries_remaining until it eventually becomes unbootable because
+	 * tries_remaining reaches 0. This mechanism produces a bootloader
+	 * induced rollback, typically right after a failed update.
+	 */
+
+	/* Safety check: limit the number of slots. */
+	if (abc->nb_slot > ARRAY_SIZE(abc->slot_info)) {
+		abc->nb_slot = ARRAY_SIZE(abc->slot_info);
+		store_needed = true;
+	}
+
+	slot = -1;
+	for (i = 0; i < abc->nb_slot; ++i) {
+		if (abc->slot_info[i].verity_corrupted ||
+		    !abc->slot_info[i].tries_remaining) {
+			debug("ANDROID: unbootable slot %d tries: %d, "
+			      "corrupt: %d\n",
+			      i,
+			      abc->slot_info[i].tries_remaining,
+			      abc->slot_info[i].verity_corrupted);
+			continue;
+		}
+		debug("ANDROID: bootable slot %d pri: %d, tries: %d, "
+		      "corrupt: %d, successful: %d\n",
+		      i,
+		      abc->slot_info[i].priority,
+		      abc->slot_info[i].tries_remaining,
+		      abc->slot_info[i].verity_corrupted,
+		      abc->slot_info[i].successful_boot);
+
+		if (slot < 0 ||
+		    android_ab_compare_slots(&abc->slot_info[i],
+					     &abc->slot_info[slot]) < 0) {
+			slot = i;
+		}
+	}
+
+	if (slot >= 0 && !abc->slot_info[slot].successful_boot) {
+		printf("ANDROID: Attempting slot %c, tries remaining %d\n",
+		       ANDROID_BOOT_SLOT_NAME(slot),
+		       abc->slot_info[slot].tries_remaining);
+		abc->slot_info[slot].tries_remaining--;
+		store_needed = true;
+	}
+
+	if (slot >= 0) {
+		/* Legacy user-space requires this field to be set in the BCB.
+		 * Newer releases load this the slot suffix from the command
+		 * line or the device tree.
+		 */
+		memset(slot_suffix, 0, sizeof(slot_suffix));
+		slot_suffix[0] = ANDROID_BOOT_SLOT_NAME(slot);
+		if (memcmp(abc->slot_suffix, slot_suffix,
+			   sizeof(slot_suffix))) {
+			memcpy(abc->slot_suffix, slot_suffix,
+			       sizeof(slot_suffix));
+			store_needed = true;
+		}
+	}
+
+	if (store_needed) {
+		abc->crc32_le = android_boot_control_compute_crc(abc);
+		android_boot_control_store(abc, dev_desc, part_info);
+	}
+	free(abc);
+
+	if (slot < 0)
+		return -1;
+	return slot;
+}
diff --git a/include/android_ab.h b/include/android_ab.h
new file mode 100644
index 0000000000..c264e9b948
--- /dev/null
+++ b/include/android_ab.h
@@ -0,0 +1,30 @@
+/*
+ * Copyright (C) 2017 The Android Open Source Project
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#ifndef __ANDROID_AB_H
+#define __ANDROID_AB_H
+
+#include <common.h>
+
+/* Android standard boot slot names are 'a', 'b', 'c', ... */
+#define ANDROID_BOOT_SLOT_NAME(slot_num) ('a' + (slot_num))
+
+/** android_ab_select - Select the slot where to boot from.
+ * On Android devices with more than one boot slot (multiple copies of the
+ * kernel and system images) selects which slot should be used to boot from and
+ * registers the boot attempt. This is used in by the new A/B update model where
+ * one slot is updated in the background while running from the other slot. If
+ * the selected slot did not successfully boot in the past, a boot attempt is
+ * registered before returning from this function so it isn't selected
+ * indefinitely.
+ *
+ * @dev_desc:		Place to store the device description pointer.
+ * @part_info:		Place to store the partition information.
+ * @return the slot number (0-based) on success, or -1 on error.
+ */
+int android_ab_select(struct blk_desc *dev_desc, disk_partition_t *part_info);
+
+#endif
diff --git a/include/android_cmds.h b/include/android_cmds.h
new file mode 100644
index 0000000000..94df916835
--- /dev/null
+++ b/include/android_cmds.h
@@ -0,0 +1,32 @@
+/*
+ * Copyright (C) 2017 The Android Open Source Project
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#ifndef __ANDROID_CMDS_H
+#define __ANDROID_CMDS_H
+
+#include <common.h>
+
+/**
+ * part_get_info_by_dev_and_name_or_num - Parse a device number and partition
+ * description (either name or number) in the form of device number plus
+ * partition name separated by a ";" (like "device_num;partition_name") or
+ * a device number plus a partition number separated by a ":". For example both
+ * "0;misc" and "0:1" can be valid partition descriptions for a given interface.
+ * If the partition is found, sets dev_desc and part_info accordingly with the
+ * information of the partition.
+ *
+ * @dev_iface:		Device interface.
+ * @dev_part_str:	Input partition description, like "0;misc" or "0:1".
+ * @dev_desc:		Place to store the device description pointer.
+ * @part_info:		Place to store the partition information.
+ * @return 0 on success, or -1 on error
+ */
+int part_get_info_by_dev_and_name_or_num(const char *dev_iface,
+					 const char *dev_part_str,
+					 struct blk_desc **dev_desc,
+					 disk_partition_t *part_info);
+
+#endif

commit df7cce43619a94f77bb34c41cdc3d3336841d3e5
Author: Alex Deymo <deymo@google.com>
Date:   Fri Mar 24 22:17:26 2017 -0700

    boot_android: Drop the "mmc" restriction on the partition name.
    
    part_get_info_by_name() was extended to support more than just mmc/efi
    partitions. This patch remove this restriction from the
    part_get_info_by_dev_and_name() function.
    
    Bug: 32707546
    Test: Booted rpi3.
    Change-Id: If6399f7d24e99911b3b14a125a6bc1f472b7eecf

diff --git a/cmd/boot_android.c b/cmd/boot_android.c
index 04573b10d1..a2148e0238 100644
--- a/cmd/boot_android.c
+++ b/cmd/boot_android.c
@@ -14,7 +14,7 @@
  * If the partition is found, sets dev_desc and part_info accordingly with the
  * information of the partition with the given partition_name.
  *
- * @dev_iface:		Device interface. Only "mmc" is supported at the moment.
+ * @dev_iface:		Device interface.
  * @dev_part_str:	Input string argument, like "0;misc".
  * @dev_desc:		Place to put the device description pointer.
  * @part_info:		Place to put the partition information.
@@ -25,15 +25,10 @@ static int part_get_info_by_dev_and_name(const char *dev_iface,
 					 struct blk_desc **dev_desc,
 					 disk_partition_t *part_info)
 {
-#ifdef CONFIG_EFI_PARTITION
 	char *ep;
 	const char *part_str;
 	int dev_num;
 
-	/* We only support "mmc" for looking up partition names. */
-	if (strcmp(dev_iface, "mmc") != 0)
-		return -1;
-
 	part_str = strchr(dev_part_str, ';');
 	if (!part_str)
 		return -1;
@@ -45,9 +40,9 @@ static int part_get_info_by_dev_and_name(const char *dev_iface,
 	}
 	part_str++;
 
-	*dev_desc = blk_get_dev("mmc", dev_num);
+	*dev_desc = blk_get_dev(dev_iface, dev_num);
 	if (!*dev_desc) {
-		printf("Could not find mmc %d\n", dev_num);
+		printf("Could not find %s %d\n", dev_iface, dev_num);
 		return -1;
 	}
 	if (part_get_info_by_name(*dev_desc, part_str, part_info) < 0) {
@@ -55,9 +50,6 @@ static int part_get_info_by_dev_and_name(const char *dev_iface,
 		return -1;
 	}
 	return 0;
-#else
-	return -1;
-#endif  /* CONFIG_EFI_PARTITION */
 }
 
 static int do_boot_android(cmd_tbl_t *cmdtp, int flag, int argc,
@@ -117,12 +109,7 @@ static int do_boot_android(cmd_tbl_t *cmdtp, int flag, int argc,
 U_BOOT_CMD(
 	boot_android, 5, 0, do_boot_android,
 	"Execute the Android Bootloader flow.",
-	"<interface> <dev[:part"
-#if defined(CONFIG_EFI_PARTITION)
-	/* When EFI is enabled we also support looking up a partition name. */
-	"|;part_name"
-#endif	/* CONFIG_EFI_PARTITION */
-	"]> <slot> [<kernel_addr>]\n"
+	"<interface> <dev[:part|;part_name]> <slot> [<kernel_addr>]\n"
 	"    - Load the Boot Control Block (BCB) from the partition 'part' on\n"
 	"      device type 'interface' instance 'dev' to determine the boot\n"
 	"      mode, and load and execute the appropriate kernel.\n"
@@ -133,9 +120,7 @@ U_BOOT_CMD(
 	"      On Android devices with multiple slots, the pass 'slot' is\n"
 	"      used to load the appropriate kernel. The standard slot names\n"
 	"      are 'a' and 'b'.\n"
-#if defined(CONFIG_EFI_PARTITION)
 	"    - If 'part_name' is passed, preceded with a ; instead of :, the\n"
 	"      partition name whose label is 'part_name' will be looked up in\n"
 	"      the partition table. This is commonly the \"misc\" partition.\n"
-#endif	/* CONFIG_EFI_PARTITION */
 );

commit 806222402666e6df9c63adc56ae6a22832c53b3f
Author: Alex Deymo <deymo@google.com>
Date:   Fri Mar 24 21:33:43 2017 -0700

    boot_android: Pass the slot from the command.
    
    In order to support booting from either slot, this patch passes the
    slot name from the command line.
    
    Bug: 32707546
    Test: Booted rpi3.
    Change-Id: I30582bd8b1b95dc0f25b0c6624e7909ee4118bd0

diff --git a/cmd/boot_android.c b/cmd/boot_android.c
index 0c6bbf1722..04573b10d1 100644
--- a/cmd/boot_android.c
+++ b/cmd/boot_android.c
@@ -71,14 +71,14 @@ static int do_boot_android(cmd_tbl_t *cmdtp, int flag, int argc,
 	const char *misc_part_iface;
 	const char *misc_part_desc;
 
-	if (argc < 3)
+	if (argc < 4)
 		return CMD_RET_USAGE;
-	if (argc > 4)
+	if (argc > 5)
 		return CMD_RET_USAGE;
 
-	if (argc >= 4) {
-		load_address = simple_strtoul(argv[3], &addr_arg_endp, 16);
-		if (addr_arg_endp == argv[3] || *addr_arg_endp != '\0')
+	if (argc >= 5) {
+		load_address = simple_strtoul(argv[4], &addr_arg_endp, 16);
+		if (addr_arg_endp == argv[4] || *addr_arg_endp != '\0')
 			return CMD_RET_USAGE;
 	} else {
 		addr_str = env_get("loadaddr");
@@ -105,7 +105,8 @@ static int do_boot_android(cmd_tbl_t *cmdtp, int flag, int argc,
 		}
 	}
 
-	ret = android_bootloader_boot_flow(dev_desc, &part_info, load_address);
+	ret = android_bootloader_boot_flow(dev_desc, &part_info, argv[3],
+					   load_address);
 	if (ret < 0) {
 		printf("Android boot failed, error %d.\n", ret);
 		return CMD_RET_FAILURE;
@@ -114,14 +115,14 @@ static int do_boot_android(cmd_tbl_t *cmdtp, int flag, int argc,
 }
 
 U_BOOT_CMD(
-	boot_android, 4, 0, do_boot_android,
+	boot_android, 5, 0, do_boot_android,
 	"Execute the Android Bootloader flow.",
 	"<interface> <dev[:part"
 #if defined(CONFIG_EFI_PARTITION)
 	/* When EFI is enabled we also support looking up a partition name. */
 	"|;part_name"
 #endif	/* CONFIG_EFI_PARTITION */
-	"]> [<kernel_addr>]\n"
+	"]> <slot> [<kernel_addr>]\n"
 	"    - Load the Boot Control Block (BCB) from the partition 'part' on\n"
 	"      device type 'interface' instance 'dev' to determine the boot\n"
 	"      mode, and load and execute the appropriate kernel.\n"
@@ -129,6 +130,9 @@ U_BOOT_CMD(
 	"      the corresponding \"boot\" partition. In bootloader mode, the\n"
 	"      command defined in the \"fastbootcmd\" variable will be\n"
 	"      executed.\n"
+	"      On Android devices with multiple slots, the pass 'slot' is\n"
+	"      used to load the appropriate kernel. The standard slot names\n"
+	"      are 'a' and 'b'.\n"
 #if defined(CONFIG_EFI_PARTITION)
 	"    - If 'part_name' is passed, preceded with a ; instead of :, the\n"
 	"      partition name whose label is 'part_name' will be looked up in\n"
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index a8b457a886..5c659c7576 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -126,12 +126,17 @@ static int android_part_get_info_by_name_suffix(struct blk_desc *dev_desc,
 {
 	char *part_name;
 	int part_num;
+	size_t part_name_len;
 
-	part_name = malloc(strlen(base_name) + strlen(slot_suffix) + 1);
+	part_name_len = strlen(base_name) + 1;
+	if (slot_suffix)
+		part_name_len += strlen(slot_suffix);
+	part_name = malloc(part_name_len);
 	if (!part_name)
 		return -1;
 	strcpy(part_name, base_name);
-	strcat(part_name, slot_suffix);
+	if (slot_suffix)
+		strcat(part_name, slot_suffix);
 
 	part_num = part_get_info_by_name(dev_desc, part_name, part_info);
 	if (part_num < 0) {
@@ -255,6 +260,7 @@ static char *android_assemble_cmdline(const char *slot_suffix,
 
 int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 				 const disk_partition_t *misc_part_info,
+				 const char *slot,
 				 unsigned long kernel_address)
 {
 	enum android_boot_mode mode;
@@ -263,8 +269,7 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	int boot_part_num, system_part_num;
 	int ret;
 	char *command_line;
-	/* TODO: lookup the slot_suffix based on the BCB. */
-	const char *slot_suffix = "_a";
+	char slot_suffix[3];
 	const char *mode_cmdline = NULL;
 
 	/* Determine the boot mode and clear its value for the next boot if
@@ -294,6 +299,13 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 		return android_bootloader_boot_bootloader();
 	}
 
+	slot_suffix[0] = '\0';
+	if (slot && slot[0]) {
+		slot_suffix[0] = '_';
+		slot_suffix[1] = slot[0];
+		slot_suffix[2] = '\0';
+	}
+
 	/* Load the kernel from the desired "boot" partition. */
 	boot_part_num =
 	    android_part_get_info_by_name_suffix(dev_desc,
diff --git a/include/android_bootloader.h b/include/android_bootloader.h
index 947913e547..ddf6d76f64 100644
--- a/include/android_bootloader.h
+++ b/include/android_bootloader.h
@@ -33,10 +33,16 @@ enum android_boot_mode {
  * The boot mode is determined by the contents of the Android Bootloader
  * Message. On success it doesn't return.
  *
+ * @dev_desc:		device where to load the kernel and system to boot from.
+ * @misc_part_info:	the "misc" partition descriptor in 'dev_desc'.
+ * @slot:		the boot slot to boot from.
+ * @kernel_address:	address where to load the kernel if needed.
+ *
  * @return a negative number in case of error, otherwise it doesn't return.
  */
 int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 				 const disk_partition_t *misc_part_info,
+				 const char *slot,
 				 unsigned long kernel_address);
 
 #endif  /* __ANDROID_BOOTLOADER_H */

commit 06f4a8746e68c25013788a9d46f4abca1fd920a3
Author: Alex Deymo <deymo@google.com>
Date:   Thu Dec 1 14:21:51 2016 -0800

    Add "boot_android" command.
    
    The new "boot_android" command simply executes the Android Bootloader
    flow. This receives the location (interface, dev, partition) of the
    Android "misc" partition which is then used to lookup and infer the
    kernel and system images that should be booted.
    
    Bug: 32707546
    Test: Booted a rpi3 build with Android Things.
    Signed-off-by: Alex Deymo <deymo@google.com>
    
    Change-Id: Ibf3f31e38b159d42db7a0835b99ad7ec260fc2a7

diff --git a/README b/README
index c2818d6427..788564070e 100644
--- a/README
+++ b/README
@@ -1243,6 +1243,12 @@ The following options need to be configured:
 		sending again an USB request to the device.
 
 - Android Bootloader support:
+		CONFIG_CMD_BOOT_ANDROID
+		This enables the command "boot_android" which executes the
+		Android Bootloader flow. Enabling CONFIG_CMD_FASTBOOT is
+		recommended to support the Android Fastboot protocol as part
+		of the bootloader.
+
 		CONFIG_ANDROID_BOOTLOADER
 		This enables support for the Android bootloader flow. Android
 		devices can boot in normal mode, recovery mode or bootloader
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 833d98d8c6..e989873deb 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -752,6 +752,16 @@ config CMD_LOAD_ANDROID
 	  define the size and kernel address on the header, which are used by
 	  this command.
 
+config CMD_BOOT_ANDROID
+	bool "boot_android"
+	default n
+	depends on ANDROID_BOOTLOADER
+	help
+	  Performs the Android Bootloader boot flow, loading the appropriate
+	  Android image (normal kernel, recovery kernel or "bootloader" mode)
+	  and booting it. The boot mode is determined by the contents of the
+	  Android Bootloader Message.
+
 config CMD_MMC
 	bool "mmc"
 	help
diff --git a/cmd/Makefile b/cmd/Makefile
index f1c412160d..8f19d7dfe5 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -22,6 +22,7 @@ obj-$(CONFIG_CMD_BDI) += bdinfo.o
 obj-$(CONFIG_CMD_BEDBUG) += bedbug.o
 obj-$(CONFIG_CMD_BLOCK_CACHE) += blkcache.o
 obj-$(CONFIG_CMD_BMP) += bmp.o
+obj-$(CONFIG_CMD_BOOT_ANDROID) += boot_android.o
 obj-$(CONFIG_CMD_BOOTEFI) += bootefi.o
 obj-$(CONFIG_CMD_BOOTMENU) += bootmenu.o
 obj-$(CONFIG_CMD_BOOTSTAGE) += bootstage.o
diff --git a/cmd/boot_android.c b/cmd/boot_android.c
new file mode 100644
index 0000000000..0c6bbf1722
--- /dev/null
+++ b/cmd/boot_android.c
@@ -0,0 +1,137 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#include <android_bootloader.h>
+#include <common.h>
+#include <command.h>
+
+/**
+ * part_get_info_by_dev_and_name - Parse a device number and partition name
+ * string in the form of "device_num;partition_name", for example "0;misc".
+ * If the partition is found, sets dev_desc and part_info accordingly with the
+ * information of the partition with the given partition_name.
+ *
+ * @dev_iface:		Device interface. Only "mmc" is supported at the moment.
+ * @dev_part_str:	Input string argument, like "0;misc".
+ * @dev_desc:		Place to put the device description pointer.
+ * @part_info:		Place to put the partition information.
+ * @return 0 on success, or -1 on error
+ */
+static int part_get_info_by_dev_and_name(const char *dev_iface,
+					 const char *dev_part_str,
+					 struct blk_desc **dev_desc,
+					 disk_partition_t *part_info)
+{
+#ifdef CONFIG_EFI_PARTITION
+	char *ep;
+	const char *part_str;
+	int dev_num;
+
+	/* We only support "mmc" for looking up partition names. */
+	if (strcmp(dev_iface, "mmc") != 0)
+		return -1;
+
+	part_str = strchr(dev_part_str, ';');
+	if (!part_str)
+		return -1;
+
+	dev_num = simple_strtoul(dev_part_str, &ep, 16);
+	if (ep != part_str) {
+		/* Not all the first part before the ; was parsed. */
+		return -1;
+	}
+	part_str++;
+
+	*dev_desc = blk_get_dev("mmc", dev_num);
+	if (!*dev_desc) {
+		printf("Could not find mmc %d\n", dev_num);
+		return -1;
+	}
+	if (part_get_info_by_name(*dev_desc, part_str, part_info) < 0) {
+		printf("Could not find \"%s\" partition\n", part_str);
+		return -1;
+	}
+	return 0;
+#else
+	return -1;
+#endif  /* CONFIG_EFI_PARTITION */
+}
+
+static int do_boot_android(cmd_tbl_t *cmdtp, int flag, int argc,
+			   char * const argv[])
+{
+	unsigned long load_address;
+	int ret = CMD_RET_SUCCESS;
+	char *addr_arg_endp, *addr_str;
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+	const char *misc_part_iface;
+	const char *misc_part_desc;
+
+	if (argc < 3)
+		return CMD_RET_USAGE;
+	if (argc > 4)
+		return CMD_RET_USAGE;
+
+	if (argc >= 4) {
+		load_address = simple_strtoul(argv[3], &addr_arg_endp, 16);
+		if (addr_arg_endp == argv[3] || *addr_arg_endp != '\0')
+			return CMD_RET_USAGE;
+	} else {
+		addr_str = env_get("loadaddr");
+		if (addr_str)
+			load_address = simple_strtoul(addr_str, NULL, 16);
+		else
+			load_address = CONFIG_SYS_LOAD_ADDR;
+	}
+
+	/* Lookup the "misc" partition from argv[1] and argv[2] */
+	misc_part_iface = argv[1];
+	misc_part_desc = argv[2];
+	/* Split the part_name if passed as "$dev_num;part_name". */
+	if (part_get_info_by_dev_and_name(misc_part_iface, misc_part_desc,
+					  &dev_desc, &part_info) < 0) {
+		/* Couldn't lookup by name from mmc, try looking up the
+		 * partition description directly.
+		 */
+		if (blk_get_device_part_str(misc_part_iface, misc_part_desc,
+					    &dev_desc, &part_info, 1) < 0) {
+			printf("Couldn't find partition %s %s\n",
+			       misc_part_iface, misc_part_desc);
+			return CMD_RET_FAILURE;
+		}
+	}
+
+	ret = android_bootloader_boot_flow(dev_desc, &part_info, load_address);
+	if (ret < 0) {
+		printf("Android boot failed, error %d.\n", ret);
+		return CMD_RET_FAILURE;
+	}
+	return CMD_RET_SUCCESS;
+}
+
+U_BOOT_CMD(
+	boot_android, 4, 0, do_boot_android,
+	"Execute the Android Bootloader flow.",
+	"<interface> <dev[:part"
+#if defined(CONFIG_EFI_PARTITION)
+	/* When EFI is enabled we also support looking up a partition name. */
+	"|;part_name"
+#endif	/* CONFIG_EFI_PARTITION */
+	"]> [<kernel_addr>]\n"
+	"    - Load the Boot Control Block (BCB) from the partition 'part' on\n"
+	"      device type 'interface' instance 'dev' to determine the boot\n"
+	"      mode, and load and execute the appropriate kernel.\n"
+	"      In normal and recovery mode, the kernel will be loaded from\n"
+	"      the corresponding \"boot\" partition. In bootloader mode, the\n"
+	"      command defined in the \"fastbootcmd\" variable will be\n"
+	"      executed.\n"
+#if defined(CONFIG_EFI_PARTITION)
+	"    - If 'part_name' is passed, preceded with a ; instead of :, the\n"
+	"      partition name whose label is 'part_name' will be looked up in\n"
+	"      the partition table. This is commonly the \"misc\" partition.\n"
+#endif	/* CONFIG_EFI_PARTITION */
+);

commit 67dac67453c08a760320a21ccd076abd47c9c9f1
Author: Alex Deymo <deymo@google.com>
Date:   Wed Nov 9 12:04:28 2016 -0800

    Initial support for the Android Bootloader flow
    
    An Android Bootloader must comply with certain boot modes and change
    the kernel command line accordingly. This patch introduces the Android
    boot mode concept which determines whether the device should boot to
    one of the following:
     * recovery: which should boot to the recovery image,
     * bootloader: which should boot to the "bootloader" (fastboot) and
     * normal: which should boot to the system image.
    
    The boot mode is determined in part by the Boot Control Block (BCB)
    which is stored at the beginning of the "misc" partition. The BCB
    is defined in the "bootloader_message.h" file in AOSP, now copied
    here as android_bootloader_message.h with minor modifications.
    
    This patch implements the basic boot flow that loads and boots an
    Android kernel image assuming an A/B device which implies that it uses
    boot as recovery (BOARD_USES_RECOVERY_AS_BOOT in the BoardConfig.mk).
    This means that the recovery image shares the same kernel with the
    normal boot system image, but stores the recovery image as a ramdisk
    which is not used in normal mode.
    
    Among the limitations, this patch doesn't implement the A/B slot
    selection, it only boots from the slot "a".
    
    Bug: 31887729
    Test: Booted a rpi3 with this flow.
    
    Signed-off-by: Alex Deymo <deymo@google.com>
    Change-Id: Ia2932c6f398f1ae713f0cd9670828f84103dca38
    update setenv/getenv to env_set/env_get.
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/README b/README
index a46850c808..c2818d6427 100644
--- a/README
+++ b/README
@@ -1242,6 +1242,68 @@ The following options need to be configured:
 		entering dfuMANIFEST state. Host waits this timeout, before
 		sending again an USB request to the device.
 
+- Android Bootloader support:
+		CONFIG_ANDROID_BOOTLOADER
+		This enables support for the Android bootloader flow. Android
+		devices can boot in normal mode, recovery mode or bootloader
+		mode. The normal mode is the most common boot mode, but
+		recovery mode is often used to perform factory reset and OTA
+		(over-the-air) updates in the legacy updater. Also it is
+		possible for an Android system to request a reboot to the
+		"bootloader", which often means reboot to fastboot but may also
+		include a UI with a menu.
+
+		CONFIG_ANDROID_BOOT_IMAGE
+		This enables support for booting images which use the Android
+		image format header.
+
+- USB Device Android Fastboot support:
+		CONFIG_USB_FUNCTION_FASTBOOT
+		This enables the USB part of the fastboot gadget
+
+		CONFIG_CMD_FASTBOOT
+		This enables the command "fastboot" which enables the Android
+		fastboot mode for the platform's USB device. Fastboot is a USB
+		protocol for downloading images, flashing and device control
+		used on Android devices.
+		See doc/README.android-fastboot for more information.
+
+		CONFIG_FASTBOOT_BUF_ADDR
+		The fastboot protocol requires a large memory buffer for
+		downloads. Define this to the starting RAM address to use for
+		downloaded images.
+
+		CONFIG_FASTBOOT_BUF_SIZE
+		The fastboot protocol requires a large memory buffer for
+		downloads. This buffer should be as large as possible for a
+		platform. Define this to the size available RAM for fastboot.
+
+		CONFIG_FASTBOOT_FLASH
+		The fastboot protocol includes a "flash" command for writing
+		the downloaded image to a non-volatile storage device. Define
+		this to enable the "fastboot flash" command.
+
+		CONFIG_FASTBOOT_FLASH_MMC_DEV
+		The fastboot "flash" command requires additional information
+		regarding the non-volatile storage device. Define this to
+		the eMMC device that fastboot should use to store the image.
+
+		CONFIG_FASTBOOT_GPT_NAME
+		The fastboot "flash" command supports writing the downloaded
+		image to the Protective MBR and the Primary GUID Partition
+		Table. (Additionally, this downloaded image is post-processed
+		to generate and write the Backup GUID Partition Table.)
+		This occurs when the specified "partition name" on the
+		"fastboot flash" command line matches this value.
+		The default is "gpt" if undefined.
+
+		CONFIG_FASTBOOT_MBR_NAME
+		The fastboot "flash" command supports writing the downloaded
+		image to DOS MBR.
+		This occurs when the "partition name" specified on the
+		"fastboot flash" command line matches this value.
+		If not defined the default value "mbr" is used.
+
 - Journaling Flash filesystem support:
 		CONFIG_JFFS2_NAND
 		Define these for a default partition on a NAND device
diff --git a/common/Kconfig b/common/Kconfig
index 4d8cae9610..f36ba427ed 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -469,6 +469,24 @@ config BOARD_EARLY_INIT_F
 	  debug UART will be available if enabled.
 
 endmenu
+config ANDROID_BOOTLOADER
+	bool "Support for Android Bootloader boot flow"
+	default n
+	depends on ANDROID_BOOT_IMAGE
+	help
+	  If enabled, adds support to boot an Android device following the
+	  Android Bootloader boot flow. This flow requires an Android Bootloader
+	  to handle the Android Bootloader Message stored in the Boot Control
+	  Block (BCB), normally in the "misc" partition of an Android device.
+	  The BCB is used to determine the boot mode of the device (normal mode,
+	  recovery mode or bootloader mode) and, if enabled, the slot to boot
+	  from in devices with multiple boot slots (A/B devices).
+
+config ANDROID_BOOT_IMAGE
+	bool "Enable support for Android Boot Images"
+	help
+	  This enables support for booting images which use the Android
+	  image format header.
 
 menu "Security support"
 
diff --git a/common/Makefile b/common/Makefile
index a66a3fd6dd..5f936fdc53 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -103,6 +103,7 @@ obj-y += image.o
 obj-$(CONFIG_ANDROID_BOOT_IMAGE) += image-android.o
 obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += image-fdt.o
 obj-$(CONFIG_$(SPL_TPL_)FIT) += image-fit.o
+obj-$(CONFIG_ANDROID_BOOTLOADER) += android_bootloader.o
 obj-$(CONFIG_FIT_EMBED) += boot_fit.o common_fit.o
 obj-$(CONFIG_$(SPL_TPL_)FIT_SIGNATURE) += image-sig.o
 obj-$(CONFIG_IO_TRACE) += iotrace.o
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
new file mode 100644
index 0000000000..a8b457a886
--- /dev/null
+++ b/common/android_bootloader.c
@@ -0,0 +1,337 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#include <android_bootloader.h>
+#include <android_bootloader_message.h>
+
+#include <cli.h>
+#include <common.h>
+#include <malloc.h>
+
+#define ANDROID_PARTITION_BOOT "boot"
+#define ANDROID_PARTITION_SYSTEM "system"
+
+#define ANDROID_ARG_SLOT_SUFFIX "androidboot.slot_suffix="
+#define ANDROID_ARG_ROOT "root="
+
+static int android_bootloader_message_load(
+	struct blk_desc *dev_desc,
+	const disk_partition_t *part_info,
+	struct android_bootloader_message *message)
+{
+	ulong message_blocks = sizeof(struct android_bootloader_message) /
+	    part_info->blksz;
+	if (message_blocks > part_info->size) {
+		printf("misc partition too small.\n");
+		return -1;
+	}
+
+	if (blk_dread(dev_desc, part_info->start, message_blocks, message) !=
+	    message_blocks) {
+		printf("Could not read from misc partition\n");
+		return -1;
+	}
+	debug("ANDROID: Loaded BCB, %lu blocks.\n", message_blocks);
+	return 0;
+}
+
+static int android_bootloader_message_write(
+	struct blk_desc *dev_desc,
+	const disk_partition_t *part_info,
+	struct android_bootloader_message *message)
+{
+	ulong message_blocks = sizeof(struct android_bootloader_message) /
+	    part_info->blksz;
+	if (message_blocks > part_info->size) {
+		printf("misc partition too small.\n");
+		return -1;
+	}
+
+	if (blk_dwrite(dev_desc, part_info->start, message_blocks, message) !=
+	    message_blocks) {
+		printf("Could not write to misc partition\n");
+		return -1;
+	}
+	debug("ANDROID: Wrote new BCB, %lu blocks.\n", message_blocks);
+	return 0;
+}
+
+static enum android_boot_mode android_bootloader_load_and_clear_mode(
+	struct blk_desc *dev_desc,
+	const disk_partition_t *misc_part_info)
+{
+	struct android_bootloader_message bcb;
+
+#ifdef CONFIG_FASTBOOT
+	char *bootloader_str;
+
+	/* Check for message from bootloader stored in RAM from a previous boot.
+	 */
+	bootloader_str = (char *)CONFIG_FASTBOOT_BUF_ADDR;
+	if (!strcmp("reboot-bootloader", bootloader_str)) {
+		bootloader_str[0] = '\0';
+		return ANDROID_BOOT_MODE_BOOTLOADER;
+	}
+#endif
+
+	/* Check and update the BCB message if needed. */
+	if (android_bootloader_message_load(dev_desc, misc_part_info, &bcb) <
+	    0) {
+		printf("WARNING: Unable to load the BCB.\n");
+		return ANDROID_BOOT_MODE_NORMAL;
+	}
+
+	if (!strcmp("bootonce-bootloader", bcb.command)) {
+		/* Erase the message in the BCB since this value should be used
+		 * only once.
+		 */
+		memset(bcb.command, 0, sizeof(bcb.command));
+		android_bootloader_message_write(dev_desc, misc_part_info,
+						 &bcb);
+		return ANDROID_BOOT_MODE_BOOTLOADER;
+	}
+
+	if (!strcmp("boot-recovery", bcb.command))
+		return ANDROID_BOOT_MODE_RECOVERY;
+
+	return ANDROID_BOOT_MODE_NORMAL;
+}
+
+/**
+ * Return the reboot reason string for the passed boot mode.
+ *
+ * @param mode	The Android Boot mode.
+ * @return a pointer to the reboot reason string for mode.
+ */
+static const char *android_boot_mode_str(enum android_boot_mode mode)
+{
+	switch (mode) {
+	case ANDROID_BOOT_MODE_NORMAL:
+		return "(none)";
+	case ANDROID_BOOT_MODE_RECOVERY:
+		return "recovery";
+	case ANDROID_BOOT_MODE_BOOTLOADER:
+		return "bootloader";
+	}
+	return NULL;
+}
+
+static int android_part_get_info_by_name_suffix(struct blk_desc *dev_desc,
+						const char *base_name,
+						const char *slot_suffix,
+						disk_partition_t *part_info)
+{
+	char *part_name;
+	int part_num;
+
+	part_name = malloc(strlen(base_name) + strlen(slot_suffix) + 1);
+	if (!part_name)
+		return -1;
+	strcpy(part_name, base_name);
+	strcat(part_name, slot_suffix);
+
+	part_num = part_get_info_by_name(dev_desc, part_name, part_info);
+	if (part_num < 0) {
+		debug("ANDROID: Could not find partition \"%s\"\n", part_name);
+		part_num = -1;
+	}
+
+	free(part_name);
+	return part_num;
+}
+
+static int android_bootloader_boot_bootloader(void)
+{
+	const char *fastboot_cmd = env_get("fastbootcmd");
+
+	if (fastboot_cmd)
+		return run_command(fastboot_cmd, CMD_FLAG_ENV);
+	return -1;
+}
+
+static int android_bootloader_boot_kernel(unsigned long kernel_address)
+{
+	char kernel_addr_str[12];
+	char *fdt_addr = env_get("fdt_addr");
+	char *bootm_args[] = { "bootm", kernel_addr_str, "-", fdt_addr, NULL };
+
+	sprintf(kernel_addr_str, "0x%lx", kernel_address);
+
+	printf("Booting kernel at %s with fdt at %s...\n\n\n",
+	       kernel_addr_str, fdt_addr);
+	do_bootm(NULL, 0, 4, bootm_args);
+
+	return -1;
+}
+
+static char *strjoin(const char **chunks, char separator)
+{
+	int len, joined_len = 0;
+	char *ret, *current;
+	const char **p;
+
+	for (p = chunks; *p; p++)
+		joined_len += strlen(*p) + 1;
+
+	if (!joined_len) {
+		ret = malloc(1);
+		if (ret)
+			ret[0] = '\0';
+		return ret;
+	}
+
+	ret = malloc(joined_len);
+	current = ret;
+	if (!ret)
+		return ret;
+
+	for (p = chunks; *p; p++) {
+		len = strlen(*p);
+		memcpy(current, *p, len);
+		current += len;
+		*current = separator;
+		current++;
+	}
+	*current = '\0';
+	return ret;
+}
+
+/** android_assemble_cmdline - Assemble the command line to pass to the kernel
+ * @return a newly allocated string
+ */
+static char *android_assemble_cmdline(const char *slot_suffix,
+				      const char *extra_args)
+{
+	const char *cmdline_chunks[16];
+	const char **current_chunk = cmdline_chunks;
+	char *env_cmdline, *cmdline, *rootdev_input;
+	char *allocated_suffix = NULL;
+	char *allocated_rootdev = NULL;
+	unsigned long rootdev_len;
+
+	env_cmdline = env_get("bootargs");
+	if (env_cmdline)
+		*(current_chunk++) = env_cmdline;
+
+	/* The |slot_suffix| needs to be passed to the kernel to know what
+	 * slot to boot from.
+	 */
+	if (slot_suffix) {
+		allocated_suffix = malloc(strlen(ANDROID_ARG_SLOT_SUFFIX) +
+					  strlen(slot_suffix));
+		strcpy(allocated_suffix, ANDROID_ARG_SLOT_SUFFIX);
+		strcat(allocated_suffix, slot_suffix);
+		*(current_chunk++) = allocated_suffix;
+	}
+
+	rootdev_input = env_get("android_rootdev");
+	if (rootdev_input) {
+		rootdev_len = strlen(ANDROID_ARG_ROOT) + CONFIG_SYS_CBSIZE + 1;
+		allocated_rootdev = malloc(rootdev_len);
+		strcpy(allocated_rootdev, ANDROID_ARG_ROOT);
+		cli_simple_process_macros(rootdev_input,
+					  allocated_rootdev +
+					  strlen(ANDROID_ARG_ROOT));
+		/* Make sure that the string is null-terminated since the
+		 * previous could not copy to the end of the input string if it
+		 * is too big.
+		 */
+		allocated_rootdev[rootdev_len - 1] = '\0';
+		*(current_chunk++) = allocated_rootdev;
+	}
+
+	if (extra_args)
+		*(current_chunk++) = extra_args;
+
+	*(current_chunk++) = NULL;
+	cmdline = strjoin(cmdline_chunks, ' ');
+	free(allocated_suffix);
+	free(allocated_rootdev);
+	return cmdline;
+}
+
+int android_bootloader_boot_flow(struct blk_desc *dev_desc,
+				 const disk_partition_t *misc_part_info,
+				 unsigned long kernel_address)
+{
+	enum android_boot_mode mode;
+	disk_partition_t boot_part_info;
+	disk_partition_t system_part_info;
+	int boot_part_num, system_part_num;
+	int ret;
+	char *command_line;
+	/* TODO: lookup the slot_suffix based on the BCB. */
+	const char *slot_suffix = "_a";
+	const char *mode_cmdline = NULL;
+
+	/* Determine the boot mode and clear its value for the next boot if
+	 * needed.
+	 */
+	mode = android_bootloader_load_and_clear_mode(dev_desc, misc_part_info);
+	printf("ANDROID: reboot reason: \"%s\"\n", android_boot_mode_str(mode));
+
+	switch (mode) {
+	case ANDROID_BOOT_MODE_NORMAL:
+		/* In normal mode, we load the kernel from "boot" but append
+		 * "skip_initramfs" to the cmdline to make it ignore the
+		 * recovery initramfs in the boot partition.
+		 */
+		mode_cmdline = "skip_initramfs";
+		break;
+	case ANDROID_BOOT_MODE_RECOVERY:
+		/* In recovery mode we still boot the kernel from "boot" but
+		 * don't skip the initramfs so it boots to recovery.
+		 */
+		break;
+	case ANDROID_BOOT_MODE_BOOTLOADER:
+		/* Bootloader mode enters fastboot. If this operation fails we
+		 * simply return since we can't recover from this situation by
+		 * switching to another slot.
+		 */
+		return android_bootloader_boot_bootloader();
+	}
+
+	/* Load the kernel from the desired "boot" partition. */
+	boot_part_num =
+	    android_part_get_info_by_name_suffix(dev_desc,
+						 ANDROID_PARTITION_BOOT,
+						 slot_suffix, &boot_part_info);
+	if (boot_part_num < 0)
+		return -1;
+	debug("ANDROID: Loading kernel from \"%s\", partition %d.\n",
+	      boot_part_info.name, boot_part_num);
+
+	system_part_num =
+	    android_part_get_info_by_name_suffix(dev_desc,
+						 ANDROID_PARTITION_SYSTEM,
+						 slot_suffix,
+						 &system_part_info);
+	if (system_part_num < 0)
+		return -1;
+	debug("ANDROID: Using system image from \"%s\", partition %d.\n",
+	      system_part_info.name, system_part_num);
+
+	ret = android_image_load(dev_desc, &boot_part_info, kernel_address,
+				 -1UL);
+	if (ret < 0)
+		return ret;
+
+	/* Set Android root variables. */
+	env_set_ulong("android_root_devnum", dev_desc->devnum);
+	env_set_ulong("android_root_partnum", system_part_num);
+	env_set("android_slotsufix", slot_suffix);
+
+	/* Assemble the command line */
+	command_line = android_assemble_cmdline(slot_suffix, mode_cmdline);
+	env_set("bootargs", command_line);
+
+	debug("ANDROID: bootargs: \"%s\"\n", command_line);
+
+	android_bootloader_boot_kernel(kernel_address);
+
+	/* TODO: If the kernel doesn't boot mark the selected slot as bad. */
+	return -1;
+}
diff --git a/include/android_bootloader.h b/include/android_bootloader.h
new file mode 100644
index 0000000000..947913e547
--- /dev/null
+++ b/include/android_bootloader.h
@@ -0,0 +1,42 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#ifndef __ANDROID_BOOTLOADER_H
+#define __ANDROID_BOOTLOADER_H
+
+#include <common.h>
+
+enum android_boot_mode {
+	ANDROID_BOOT_MODE_NORMAL = 0,
+
+	/* "recovery" mode is triggered by the "reboot recovery" command or
+	 * equivalent adb/fastboot command. It can also be triggered by writing
+	 * "boot-recovery" in the BCB message. This mode should boot the
+	 * recovery kernel.
+	 */
+	ANDROID_BOOT_MODE_RECOVERY,
+
+	/* "bootloader" mode is triggered by the "reboot bootloader" command or
+	 * equivalent adb/fastboot command. It can also be triggered by writing
+	 * "bootonce-bootloader" in the BCB message. This mode should boot into
+	 * fastboot.
+	 */
+	ANDROID_BOOT_MODE_BOOTLOADER,
+};
+
+/** android_bootloader_boot_flow - Execute the Android Bootloader Flow.
+ * Performs the Android Bootloader boot flow, loading the appropriate Android
+ * image (normal kernel, recovery kernel or "bootloader" mode) and booting it.
+ * The boot mode is determined by the contents of the Android Bootloader
+ * Message. On success it doesn't return.
+ *
+ * @return a negative number in case of error, otherwise it doesn't return.
+ */
+int android_bootloader_boot_flow(struct blk_desc *dev_desc,
+				 const disk_partition_t *misc_part_info,
+				 unsigned long kernel_address);
+
+#endif  /* __ANDROID_BOOTLOADER_H */
diff --git a/include/android_bootloader_message.h b/include/android_bootloader_message.h
new file mode 100644
index 0000000000..2c2142dc6f
--- /dev/null
+++ b/include/android_bootloader_message.h
@@ -0,0 +1,174 @@
+/*
+ * This is from the Android Project,
+ * Repository: https://android.googlesource.com/platform/bootable/recovery/
+ * File: bootloader_message/include/bootloader_message/bootloader_message.h
+ * Commit: 8b309f6970ab3b7c53cc529c51a2cb44e1c7a7e1
+ *
+ * Copyright (C) 2008 The Android Open Source Project
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#ifndef __ANDROID_BOOTLOADER_MESSAGE_H
+#define __ANDROID_BOOTLOADER_MESSAGE_H
+
+/* compiler.h defines the types that otherwise are included from stdint.h and
+ * stddef.h
+ */
+#include <compiler.h>
+
+/* Spaces used by misc partition are as below:
+ * 0   - 2K     Bootloader Message
+ * 2K  - 16K    Used by Vendor's bootloader (the 2K - 4K range may be optionally used
+ *              as bootloader_message_ab struct)
+ * 16K - 64K    Used by uncrypt and recovery to store wipe_package for A/B devices
+ * Note that these offsets are admitted by bootloader,recovery and uncrypt, so they
+ * are not configurable without changing all of them.
+ */
+static const size_t ANDROID_BOOTLOADER_MESSAGE_OFFSET_IN_MISC = 0;
+static const size_t ANDROID_WIPE_PACKAGE_OFFSET_IN_MISC = 16 * 1024;
+
+/* Bootloader Message (2-KiB)
+ *
+ * This structure describes the content of a block in flash
+ * that is used for recovery and the bootloader to talk to
+ * each other.
+ *
+ * The command field is updated by linux when it wants to
+ * reboot into recovery or to update radio or bootloader firmware.
+ * It is also updated by the bootloader when firmware update
+ * is complete (to boot into recovery for any final cleanup)
+ *
+ * The status field is written by the bootloader after the
+ * completion of an "update-radio" or "update-hboot" command.
+ *
+ * The recovery field is only written by linux and used
+ * for the system to send a message to recovery or the
+ * other way around.
+ *
+ * The stage field is written by packages which restart themselves
+ * multiple times, so that the UI can reflect which invocation of the
+ * package it is.  If the value is of the format "#/#" (eg, "1/3"),
+ * the UI will add a simple indicator of that status.
+ *
+ * We used to have slot_suffix field for A/B boot control metadata in
+ * this struct, which gets unintentionally cleared by recovery or
+ * uncrypt. Move it into struct bootloader_message_ab to avoid the
+ * issue.
+ */
+struct android_bootloader_message {
+    char command[32];
+    char status[32];
+    char recovery[768];
+
+    /* The 'recovery' field used to be 1024 bytes.  It has only ever
+     * been used to store the recovery command line, so 768 bytes
+     * should be plenty.  We carve off the last 256 bytes to store the
+     * stage string (for multistage packages) and possible future
+     * expansion. */
+    char stage[32];
+
+    /* The 'reserved' field used to be 224 bytes when it was initially
+     * carved off from the 1024-byte recovery field. Bump it up to
+     * 1184-byte so that the entire bootloader_message struct rounds up
+     * to 2048-byte. */
+    char reserved[1184];
+};
+
+/**
+ * We must be cautious when changing the bootloader_message struct size,
+ * because A/B-specific fields may end up with different offsets.
+ */
+#if (__STDC_VERSION__ >= 201112L) || defined(__cplusplus)
+static_assert(sizeof(struct android_bootloader_message) == 2048,
+              "struct bootloader_message size changes, which may break A/B devices");
+#endif
+
+/**
+ * The A/B-specific bootloader message structure (4-KiB).
+ *
+ * We separate A/B boot control metadata from the regular bootloader
+ * message struct and keep it here. Everything that's A/B-specific
+ * stays after struct bootloader_message, which should be managed by
+ * the A/B-bootloader or boot control HAL.
+ *
+ * The slot_suffix field is used for A/B implementations where the
+ * bootloader does not set the androidboot.ro.boot.slot_suffix kernel
+ * commandline parameter. This is used by fs_mgr to mount /system and
+ * other partitions with the slotselect flag set in fstab. A/B
+ * implementations are free to use all 32 bytes and may store private
+ * data past the first NUL-byte in this field. It is encouraged, but
+ * not mandatory, to use 'struct bootloader_control' described below.
+ */
+struct android_bootloader_message_ab {
+    struct android_bootloader_message message;
+    char slot_suffix[32];
+
+    /* Round up the entire struct to 4096-byte. */
+    char reserved[2016];
+};
+
+/**
+ * Be cautious about the struct size change, in case we put anything post
+ * bootloader_message_ab struct (b/29159185).
+ */
+#if (__STDC_VERSION__ >= 201112L) || defined(__cplusplus)
+static_assert(sizeof(struct android_bootloader_message_ab) == 4096,
+              "struct bootloader_message_ab size changes");
+#endif
+
+#define ANDROID_BOOT_CTRL_MAGIC   0x42414342 /* Bootloader Control AB */
+#define ANDROID_BOOT_CTRL_VERSION 1
+
+struct android_slot_metadata {
+    /* Slot priority with 15 meaning highest priority, 1 lowest
+     * priority and 0 the slot is unbootable. */
+    uint8_t priority : 4;
+    /* Number of times left attempting to boot this slot. */
+    uint8_t tries_remaining : 3;
+    /* 1 if this slot has booted successfully, 0 otherwise. */
+    uint8_t successful_boot : 1;
+    /* 1 if this slot is corrupted from a dm-verity corruption, 0 */
+    /* otherwise. */
+    uint8_t verity_corrupted : 1;
+    /* Reserved for further use. */
+    uint8_t reserved : 7;
+} __attribute__((packed));
+
+/* Bootloader Control AB
+ *
+ * This struct can be used to manage A/B metadata. It is designed to
+ * be put in the 'slot_suffix' field of the 'bootloader_message'
+ * structure described above. It is encouraged to use the
+ * 'bootloader_control' structure to store the A/B metadata, but not
+ * mandatory.
+ */
+struct android_bootloader_control {
+    /* NUL terminated active slot suffix. */
+    char slot_suffix[4];
+    /* Bootloader Control AB magic number (see BOOT_CTRL_MAGIC). */
+    uint32_t magic;
+    /* Version of struct being used (see BOOT_CTRL_VERSION). */
+    uint8_t version;
+    /* Number of slots being managed. */
+    uint8_t nb_slot : 3;
+    /* Number of times left attempting to boot recovery. */
+    uint8_t recovery_tries_remaining : 3;
+    /* Ensure 4-bytes alignment for slot_info field. */
+    uint8_t reserved0[2];
+    /* Per-slot information.  Up to 4 slots. */
+    struct android_slot_metadata slot_info[4];
+    /* Reserved for further use. */
+    uint8_t reserved1[8];
+    /* CRC32 of all 28 bytes preceding this field (little endian
+     * format). */
+    uint32_t crc32_le;
+} __attribute__((packed));
+
+#if (__STDC_VERSION__ >= 201112L) || defined(__cplusplus)
+static_assert(sizeof(struct android_bootloader_control) ==
+              sizeof(((struct android_bootloader_message_ab *)0)->slot_suffix),
+              "struct bootloader_control has wrong size");
+#endif
+
+#endif  /* __ANDROID_BOOTLOADER_MESSAGE_H */

commit 76e2a5a6c67043440fb0ea4942cde9b08e260a9d
Author: Alex Deymo <deymo@google.com>
Date:   Mon Jan 9 20:36:34 2017 -0800

    Move Android Image loading logic to image-android.c
    
    This patch moves the Android Image loading logic from the load_android
    command to a new android_load_image() function in image-android.c so it
    can be re-used from other commands.
    
    Bug: 32707546
    Test: Booted the rpi3 with this patch.
    Signed-off-by: Alex Deymo <deymo@google.com>
    Change-Id: I12d206141ead1b94ebbcc90ee05512a276c7595a

diff --git a/cmd/load_android.c b/cmd/load_android.c
index e6c5930837..e2ca4fe6ca 100644
--- a/cmd/load_android.c
+++ b/cmd/load_android.c
@@ -1,21 +1,18 @@
 /*
-  * Copyright (C) 2008 The Android Open Source Project
+ * Copyright (C) 2016 The Android Open Source Project
  *
  * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #include <common.h>
 #include <command.h>
-#include <mapmem.h>
 
 static int do_load_android(cmd_tbl_t *cmdtp, int flag, int argc,
 			   char * const argv[])
 {
 	int boot_partition;
-	unsigned long load_address, blk_cnt, blk_read;
-	int ret = CMD_RET_SUCCESS;
+	unsigned long load_address;
 	char *addr_arg_endp, *addr_str;
-	void *buf;
 	struct blk_desc *dev_desc;
 	disk_partition_t part_info;
 
@@ -37,44 +34,19 @@ static int do_load_android(cmd_tbl_t *cmdtp, int flag, int argc,
 	}
 
 	boot_partition = blk_get_device_part_str(argv[1],
-	                                         (argc >= 3) ? argv[2] : NULL,
-	                                         &dev_desc, &part_info, 1);
+						 (argc >= 3) ? argv[2] : NULL,
+						 &dev_desc, &part_info, 1);
 	if (boot_partition < 0)
 		return CMD_RET_FAILURE;
 
-	/* We don't know the size of the Android image before reading the header
-	 * so we don't limit the size of the mapped memory. */
-	buf = map_sysmem(load_address, 0 /* size */);
-
-	/* Read the Android header first and then read the rest. */
-	if (blk_dread(dev_desc, part_info.start, 1, buf) != 1) {
-		ret = CMD_RET_FAILURE;
-	}
-
-	if (ret == CMD_RET_SUCCESS && android_image_check_header(buf) != 0) {
-		printf("\n** Invalid Android Image header on %s %d:%d **\n",
-		       argv[1], dev_desc->devnum, boot_partition);
-		ret = CMD_RET_FAILURE;
-	}
-	if (ret == CMD_RET_SUCCESS) {
-		blk_cnt = (android_image_get_end(buf) - (ulong)buf +
-		           part_info.blksz - 1) / part_info.blksz;
-		printf("\nLoading Android Image (%lu blocks) to 0x%lx... ",
-		       blk_cnt, load_address);
-		blk_read = blk_dread(dev_desc, part_info.start, blk_cnt, buf);
+	if (android_image_load(dev_desc, &part_info, load_address, -1UL) < 0) {
+		printf("Error loading Android Image from %s %d:%d to 0x%lx.\n",
+		       argv[1], dev_desc->devnum, boot_partition, load_address);
+		return CMD_RET_FAILURE;
 	}
-
-	unmap_sysmem(buf);
-	if (ret != CMD_RET_SUCCESS)
-		return ret;
-
-	printf("%lu blocks read: %s\n",
-	       blk_read, (blk_read == blk_cnt) ? "OK" : "ERROR");
-	return (blk_read == blk_cnt) ? CMD_RET_SUCCESS : CMD_RET_FAILURE;
+	return CMD_RET_SUCCESS;
 }
 
-
-#if defined(CONFIG_CMD_LOAD_ANDROID)
 U_BOOT_CMD(
 	load_android, 4, 0, do_load_android,
 	"load Android Boot image from storage.",
@@ -82,4 +54,3 @@ U_BOOT_CMD(
 	"    - Load a binary Android Boot image from the partition 'part' on\n"
 	"      device type 'interface' instance 'dev' to address 'addr'."
 );
-#endif	/* CONFIG_CMD_LOAD_ANDROID */
diff --git a/common/image-android.c b/common/image-android.c
index e74d0aafca..e6976d0e63 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -8,6 +8,7 @@
 #include <image.h>
 #include <android_image.h>
 #include <malloc.h>
+#include <mapmem.h>
 #include <errno.h>
 
 #define ANDROID_IMAGE_DEFAULT_KERNEL_ADDR	0x10008000
@@ -146,6 +147,56 @@ int android_image_get_ramdisk(const struct andr_img_hdr *hdr,
 	return 0;
 }
 
+long android_image_load(struct blk_desc *dev_desc,
+			const disk_partition_t *part_info,
+			unsigned long load_address,
+			unsigned long max_size) {
+	void *buf;
+	long blk_cnt, blk_read = 0;
+
+	if (max_size < part_info->blksz)
+		return -1;
+
+	/* We don't know the size of the Android image before reading the header
+	 * so we don't limit the size of the mapped memory.
+	 */
+	buf = map_sysmem(load_address, 0 /* size */);
+
+	/* Read the Android header first and then read the rest. */
+	if (blk_dread(dev_desc, part_info->start, 1, buf) != 1)
+		blk_read = -1;
+
+	if (!blk_read && android_image_check_header(buf) != 0) {
+		printf("** Invalid Android Image header **\n");
+		blk_read = -1;
+	}
+	if (!blk_read) {
+		blk_cnt = (android_image_get_end(buf) - (ulong)buf +
+			   part_info->blksz - 1) / part_info->blksz;
+		if (blk_cnt * part_info->blksz > max_size) {
+			debug("Android Image too big (%lu bytes, max %lu)\n",
+			      android_image_get_end(buf) - (ulong)buf,
+			      max_size);
+			blk_read = -1;
+		} else {
+			debug("Loading Android Image (%lu blocks) to 0x%lx... ",
+			      blk_cnt, load_address);
+			blk_read = blk_dread(dev_desc, part_info->start,
+					     blk_cnt, buf);
+		}
+	}
+
+	unmap_sysmem(buf);
+	if (blk_read < 0)
+		return blk_read;
+
+	debug("%lu blocks read: %s\n",
+	      blk_read, (blk_read == blk_cnt) ? "OK" : "ERROR");
+	if (blk_read != blk_cnt)
+		return -1;
+	return blk_read;
+}
+
 #if !defined(CONFIG_SPL_BUILD)
 /**
  * android_print_contents - prints out the contents of the Android format image
diff --git a/include/image.h b/include/image.h
index 10ff094709..300a72a4b5 100644
--- a/include/image.h
+++ b/include/image.h
@@ -1238,6 +1238,25 @@ ulong android_image_get_end(const struct andr_img_hdr *hdr);
 ulong android_image_get_kload(const struct andr_img_hdr *hdr);
 void android_print_contents(const struct andr_img_hdr *hdr);
 
+/** android_image_load - Load an Android Image from storage.
+ *
+ * Load an Android Image based on the header size in the storage. Return the
+ * number of bytes read from storage, which could be bigger than the actual
+ * Android Image as described in the header size. In case of error reading the
+ * image or if the image size needed to be read from disk is bigger than the
+ * the passed |max_size| a negative number is returned.
+ *
+ * @dev_desc:		The device where to read the image from
+ * @part_info:		The partition in |dev_desc| where to read the image from
+ * @load_address:	The address where the image will be loaded
+ * @max_size:		The maximum loaded size, in bytes
+ * @return the number of bytes read or a negative number in case of error.
+ */
+long android_image_load(struct blk_desc *dev_desc,
+			const disk_partition_t *part_info,
+			unsigned long load_address,
+			unsigned long max_size);
+
 #endif /* CONFIG_ANDROID_BOOT_IMAGE */
 
 /**

commit 95916cf3d65d30912db4e4078bca6c9ff67726bb
Author: Alex Deymo <deymo@google.com>
Date:   Fri Jan 27 15:18:05 2017 -0800

    Add PREUPLOAD.cfg.
    
    Add a PREUPLOAD.cfg file to check the patches before uploading them.
    
    Bug: None
    Test: repo upload
    Change-Id: I6266360503f5360f968fd0d83bbf209b6f72e43c

diff --git a/PREUPLOAD.cfg b/PREUPLOAD.cfg
new file mode 100644
index 0000000000..ca5a558549
--- /dev/null
+++ b/PREUPLOAD.cfg
@@ -0,0 +1,2 @@
+[Builtin Hooks]
+checkpatch = true

commit 9ec8daff33ec31bf37d9083ebc4441a35c42aaa5
Author: Jocelyn Bohr <bohr@google.com>
Date:   Tue Nov 22 17:33:40 2016 -0800

    Handle all commands and variables for "fastboot flashall"
    
    Implement the rest of the variables and fastboot commands for flashall.
    For A/B related commands, slot A is always selected.
    
    Bug: 31887729
    Test: "fastboot flashall" does not result in any unknown commands or
          variables
    
    Change-Id: Iec794a0a0805aeb744157ab25b417443a3fc7f5a

diff --git a/net/fastboot.c b/net/fastboot.c
index 194c57471f..a5d059bb08 100644
--- a/net/fastboot.c
+++ b/net/fastboot.c
@@ -9,6 +9,7 @@
 #include <fb_mmc.h>
 #include <net.h>
 #include <net/fastboot.h>
+#include <part.h>
 #include <stdlib.h>
 #include <version.h>
 
@@ -180,6 +181,9 @@ static void fastboot_send(struct fastboot_header fb_header, char *fastboot_data,
 			fb_continue(response);
 		} else if (!strncmp("reboot", cmd_string, 6)) {
 			fb_reboot(response);
+		} else if (!strcmp("set_active", cmd_string)) {
+			/* A/B not implemented, for now do nothing */
+			write_fb_response("OKAY", "", response);
 		} else {
 			error("command %s not implemented.\n", cmd_string);
 			write_fb_response("FAIL", "unrecognized command", response);
@@ -238,10 +242,11 @@ static void fb_getvar(char *response)
 		write_fb_response("FAIL", "missing var", response);
 	} else if (!strcmp("version", cmd_parameter)) {
 		write_fb_response("OKAY", FASTBOOT_VERSION, response);
-	} else if (!strcmp("bootloader-version", cmd_parameter)) {
+	} else if (!strcmp("bootloader-version", cmd_parameter) ||
+			!strcmp("version-bootloader", cmd_parameter)) {
 		write_fb_response("OKAY", U_BOOT_VERSION, response);
 	} else if (!strcmp("downloadsize", cmd_parameter) ||
-		!strcmp("max-download-size", cmd_parameter)) {
+			!strcmp("max-download-size", cmd_parameter)) {
 		char buf_size_str[12];
 		sprintf(buf_size_str, "0x%08x", CONFIG_FASTBOOT_BUF_SIZE);
 		write_fb_response("OKAY", buf_size_str, response);
@@ -252,6 +257,43 @@ static void fb_getvar(char *response)
 		} else {
 			write_fb_response("FAIL", "Value not set", response);
 		}
+	} else if (!strcmp("version-baseband", cmd_parameter)) {
+		write_fb_response("OKAY", "N/A", response);
+	} else if (!strcmp("product", cmd_parameter)) {
+		const char *board = getenv("board");
+		if (board) {
+			write_fb_response("OKAY", board, response);
+		} else {
+			write_fb_response("FAIL", "Board not set", response);
+		}
+	} else if (!strcmp("current-slot", cmd_parameter)) {
+		/* A/B not implemented, for now always return _a */
+		write_fb_response("OKAY", "_a", response);
+	} else if (!strcmp("slot-suffixes", cmd_parameter)) {
+		write_fb_response("OKAY", "_a,_b", response);
+	} else if (!strncmp("has-slot", cmd_parameter, 8)) {
+		char *part_name = cmd_parameter;
+
+		cmd_parameter = strsep(&part_name, ":");
+		if (!strcmp(part_name, "boot") || !strcmp(part_name, "system")) {
+			write_fb_response("OKAY", "yes", response);
+		} else {
+			write_fb_response("OKAY", "no", response);
+		}
+	} else if (!strncmp("partition-type", cmd_parameter, 14)) {
+		disk_partition_t part_info;
+		struct blk_desc *dev_desc;
+		char *part_name = cmd_parameter;
+
+		cmd_parameter = strsep(&part_name, ":");
+		dev_desc = blk_get_dev("mmc", 0);
+		if (dev_desc == NULL) {
+			write_fb_response("FAIL", "block device not found", response);
+		} else if (part_get_info_efi_by_name(dev_desc, part_name, &part_info) < 0) {
+			write_fb_response("FAIL", "partition not found", response);
+		} else {
+			write_fb_response("OKAY", (char*)part_info.type, response);
+		}
 	} else {
 		printf("WARNING: unknown variable: %s\n", cmd_parameter);
 		write_fb_response("FAIL", "Variable not implemented", response);

commit aba554cc34bdfc92eb13ef852a73d6bd82329f37
Author: Jocelyn Bohr <bohr@google.com>
Date:   Tue Nov 22 17:39:21 2016 -0800

    Handle slow MMC writes
    
    Flashing a 400Mb sparse system image takes ~10 minutes. The fastboot UDP
    protocol expects a response within 1 minute, so during long flash
    operations, the device must send fastboot "INFO" packets.
    
    This patch does the following:
      - Separate large writes into writes of size FASTBOOT_MAX_BLK_WRITE.
        This parameter was tuned by hand to result in a ~10 second write.
      - Keep a timer and send an INFO packet every 30 seconds.
      - Adjust the sequence number in the header of the fastboot OKAY packet
        to account for any INFO packets sent during flashing.
      - Reduce busywaiting in the bcm2835 MMC driver. This change is based on
        what the kernel does, and doesn't seem to corrupt the MMC. Without
        this change, "flashall" takes 25 minutes.
    
    Bug: 31887729
    Test: "fastboot -s udp:$RPI_IP flashall" works, rpi3 boots
          - Compute CRC checksum over every write to verify written data
            was not corrupted.
    
    Change-Id: Ib17ef6a85715705a8b5f722a8b7d3e5fd1a6625d

diff --git a/common/fb_common.c b/common/fb_common.c
index a1daaccd55..d6e41988e9 100644
--- a/common/fb_common.c
+++ b/common/fb_common.c
@@ -6,6 +6,9 @@
 
 #include <common.h>
 #include <fastboot.h>
+#ifdef CONFIG_UDP_FUNCTION_FASTBOOT
+#include <net/fastboot.h>
+#endif
 
 void fastboot_fail(const char *reason, char *response)
 {
@@ -20,3 +23,19 @@ void fastboot_okay(const char *reason, char *response)
 	strncpy(response, okay_str, FASTBOOT_RESPONSE_LEN);
 	strncat(response, reason, FASTBOOT_RESPONSE_LEN - strlen(okay_str) - 1);
 }
+
+void timed_send_info(ulong *start, const char *msg)
+{
+#ifdef CONFIG_UDP_FUNCTION_FASTBOOT
+	/* Initialize timer */
+	if (*start == 0) {
+		*start = get_timer(0);
+	}
+	ulong time = get_timer(*start);
+	/* Send INFO packet to host every 30 seconds */
+	if (time >= 30000) {
+		*start = get_timer(0);
+		fastboot_send_info(msg);
+	}
+#endif
+}
diff --git a/common/fb_mmc.c b/common/fb_mmc.c
index 50cae9b418..a499bc4ffe 100644
--- a/common/fb_mmc.c
+++ b/common/fb_mmc.c
@@ -30,6 +30,8 @@
 #endif
 
 #define BOOT_PARTITION_NAME "boot"
+#define FASTBOOT_MAX_BLK_WRITE 16384
+static ulong timer;
 
 struct fb_mmc_sparse {
 	struct blk_desc	*dev_desc;
@@ -57,13 +59,37 @@ static int part_get_info_by_name_or_alias(struct blk_desc *dev_desc,
 	return ret;
 }
 
+static lbaint_t fb_mmc_blk_write(struct blk_desc *block_dev, lbaint_t start,
+		lbaint_t blkcnt, const void *buffer)
+{
+	lbaint_t blk = start;
+	lbaint_t blks_written;
+	lbaint_t cur_blkcnt;
+	lbaint_t blks = 0;
+	int i;
+	for (i = 0; i < blkcnt; i += FASTBOOT_MAX_BLK_WRITE) {
+		cur_blkcnt = min((int)blkcnt-i, FASTBOOT_MAX_BLK_WRITE);
+		if (buffer != NULL) {
+			timed_send_info(&timer, "writing");
+			blks_written = blk_dwrite(block_dev, blk, cur_blkcnt,
+					buffer+(i*block_dev->blksz));
+		} else {
+			timed_send_info(&timer, "erasing");
+			blks_written = blk_derase(block_dev, blk, cur_blkcnt);
+		}
+		blk += blks_written;
+		blks += blks_written;
+	}
+	return blks;
+}
+
 static lbaint_t fb_mmc_sparse_write(struct sparse_storage *info,
 		lbaint_t blk, lbaint_t blkcnt, const void *buffer)
 {
 	struct fb_mmc_sparse *sparse = info->priv;
 	struct blk_desc *dev_desc = sparse->dev_desc;
 
-	return blk_dwrite(dev_desc, blk, blkcnt, buffer);
+	return fb_mmc_blk_write(dev_desc, blk, blkcnt, buffer);
 }
 
 static lbaint_t fb_mmc_sparse_reserve(struct sparse_storage *info,
@@ -91,7 +117,7 @@ static void write_raw_image(struct blk_desc *dev_desc, disk_partition_t *info,
 
 	puts("Flashing Raw Image\n");
 
-	blks = blk_dwrite(dev_desc, info->start, blkcnt, buffer);
+	blks = fb_mmc_blk_write(dev_desc, info->start, blkcnt, buffer);
 	if (blks != blkcnt) {
 		error("failed writing to device %d\n", dev_desc->devnum);
 		fastboot_fail("failed writing to device", response);
@@ -392,7 +418,7 @@ void fb_mmc_erase(const char *cmd, char *response)
 	printf("Erasing blocks " LBAFU " to " LBAFU " due to alignment\n",
 	       blks_start, blks_start + blks_size);
 
-	blks = blk_derase(dev_desc, blks_start, blks_size);
+	blks = fb_mmc_blk_write(dev_desc, blks_start, blks_size, NULL);
 	if (blks != blks_size) {
 		error("failed erasing from device %d", dev_desc->devnum);
 		fastboot_fail("failed erasing from device", response);
diff --git a/drivers/mmc/bcm2835_sdhci.c b/drivers/mmc/bcm2835_sdhci.c
index 3157354d2a..819bd88960 100644
--- a/drivers/mmc/bcm2835_sdhci.c
+++ b/drivers/mmc/bcm2835_sdhci.c
@@ -50,11 +50,6 @@
 #define MIN_FREQ 400000
 #define SDHCI_BUFFER 0x20
 
-struct bcm2835_sdhci_plat {
-	struct mmc_config cfg;
-	struct mmc mmc;
-};
-
 struct bcm2835_sdhci_host {
 	struct sdhci_host host;
 	uint twoticks_delay;
@@ -80,8 +75,7 @@ static inline void bcm2835_sdhci_raw_writel(struct sdhci_host *host, u32 val,
 	 * too)
 	 */
 	if (reg != SDHCI_BUFFER) {
-		while (timer_get_us() - bcm_host->last_write <
-		       bcm_host->twoticks_delay)
+		while (timer_get_us() - bcm_host->last_write < bcm_host->twoticks_delay)
 			;
 	}
 
diff --git a/include/fastboot.h b/include/fastboot.h
index 17bf12cac4..bc7ff2bb14 100644
--- a/include/fastboot.h
+++ b/include/fastboot.h
@@ -19,4 +19,17 @@
 void fastboot_fail(const char *reason, char *response);
 void fastboot_okay(const char *reason, char *response);
 
+/**
+ * Send an INFO packet during long commands based on timer. If
+ * CONFIG_UDP_FUNCTION_FASTBOOT is defined, an INFO packet is sent
+ * if the time is 30 seconds after start. Else, noop.
+ *
+ * TODO: Handle the situation where both UDP and USB fastboot are
+ *       enabled.
+ *
+ * @param start:  Time since last INFO packet was sent.
+ * @param msg:    String describing the reason for waiting
+ */
+void timed_send_info(ulong *start, const char *msg);
+
 #endif /* _FASTBOOT_H_ */
diff --git a/include/net/fastboot.h b/include/net/fastboot.h
index 10a5e39be1..538af29323 100644
--- a/include/net/fastboot.h
+++ b/include/net/fastboot.h
@@ -16,6 +16,12 @@
  * Wait for incoming fastboot comands.
  */
 void fastboot_start_server(void);
+/**
+ * Send an INFO packet during long commands
+ *
+ * @param msg: String describing the reason for waiting
+ */
+void fastboot_send_info(const char*);
 
 /**********************************************************************/
 
diff --git a/net/fastboot.c b/net/fastboot.c
index e1a2f223f3..194c57471f 100644
--- a/net/fastboot.c
+++ b/net/fastboot.c
@@ -67,6 +67,41 @@ static void boot_downloaded_image(void);
 static void cleanup_command_data(void);
 static void write_fb_response(const char*, const char*, char*);
 
+void fastboot_send_info(const char *msg)
+{
+	uchar *packet;
+	uchar *packet_base;
+	int len = 0;
+	char response[FASTBOOT_RESPONSE_LEN] = {0};
+
+	struct fastboot_header fb_response_header =
+	{
+		.id = FASTBOOT_FASTBOOT,
+		.flags = 0,
+		.seq = htons(fb_sequence_number)
+	};
+	++fb_sequence_number;
+	packet = net_tx_packet + net_eth_hdr_size() + IP_UDP_HDR_SIZE;
+	packet_base = packet;
+
+	/* Write headers */
+	memcpy(packet, &fb_response_header, sizeof(fb_response_header));
+	packet += sizeof(fb_response_header);
+	/* Write response */
+	write_fb_response("INFO", msg, response);
+	memcpy(packet, response, strlen(response));
+	packet += strlen(response);
+
+	len = packet-packet_base;
+
+	/* Save packet for retransmitting */
+	last_packet_len = len;
+	memcpy(last_packet, packet_base, last_packet_len);
+
+	net_send_udp_packet(net_server_ethaddr, fastboot_remote_ip,
+			    fastboot_remote_port, fastboot_our_port, len);
+}
+
 /**
  * Constructs and sends a packet in response to received fastboot packet
  *
@@ -149,6 +184,11 @@ static void fastboot_send(struct fastboot_header fb_header, char *fastboot_data,
 			error("command %s not implemented.\n", cmd_string);
 			write_fb_response("FAIL", "unrecognized command", response);
 		}
+		/* Sent some INFO packets, need to update sequence number in header */
+		if (fb_header.seq != fb_sequence_number) {
+			fb_response_header.seq = htons(fb_sequence_number);
+			memcpy(packet_base, &fb_response_header, sizeof(fb_response_header));
+		}
 		/* Write response to packet */
 		memcpy(packet, response, strlen(response));
 		packet += strlen(response);

commit 0eda6822d05eaee8a099ca3cef1340ef6daa57c5
Author: Jocelyn Bohr <bohr@google.com>
Date:   Thu Nov 10 11:40:45 2016 -0800

    Implement fastboot continue, reboot, reboot-bootloader, boot.
    
    Add functions to respond to fastboot continue, reboot, and
    reboot-bootloader. Continue continues the normal android boot process.
    Reboot-bootloader writes a message to the start of the fastboot
    buffer, to be parsed at the start of the android boot process. Boot
    boots the previously downloaded image from memory.
    
    Bug: 31887729
    Test: - Sending "continue" boots into android.
          - Sending "reboot" reboots the device.
          - Sending "reboot-bootloader" reboots the device, and the
            message persists in memory.
          - Sending "boot boot.img" boots into kernel.
    
    Change-Id: I8b14724de4612450ccc382bb7532edb993e6e8a4

diff --git a/net/fastboot.c b/net/fastboot.c
index d0b8b34b92..e1a2f223f3 100644
--- a/net/fastboot.c
+++ b/net/fastboot.c
@@ -61,6 +61,9 @@ static void fb_getvar(char*);
 static void fb_download(char*, unsigned int, char*);
 static void fb_flash(char*);
 static void fb_erase(char*);
+static void fb_continue(char*);
+static void fb_reboot(char*);
+static void boot_downloaded_image(void);
 static void cleanup_command_data(void);
 static void write_fb_response(const char*, const char*, char*);
 
@@ -136,6 +139,12 @@ static void fastboot_send(struct fastboot_header fb_header, char *fastboot_data,
 			fb_flash(response);
 		} else if (!strcmp("erase", cmd_string)) {
 			fb_erase(response);
+		} else if (!strcmp("boot", cmd_string)) {
+			write_fb_response("OKAY", "", response);
+		} else if (!strcmp("continue", cmd_string)) {
+			fb_continue(response);
+		} else if (!strncmp("reboot", cmd_string, 6)) {
+			fb_reboot(response);
 		} else {
 			error("command %s not implemented.\n", cmd_string);
 			write_fb_response("FAIL", "unrecognized command", response);
@@ -158,6 +167,18 @@ static void fastboot_send(struct fastboot_header fb_header, char *fastboot_data,
 	net_send_udp_packet(net_server_ethaddr, fastboot_remote_ip,
 			    fastboot_remote_port, fastboot_our_port, len);
 
+	/* Continue boot process after sending response */
+	if (!strncmp("OKAY", response, 4)) {
+		if (!strcmp("boot", cmd_string)) {
+			boot_downloaded_image();
+		} else if (!strcmp("continue", cmd_string)) {
+			run_command(getenv("bootcmd"), CMD_FLAG_ENV);
+		} else if (!strncmp("reboot", cmd_string, 6)) {
+			/* Matches reboot or reboot-bootloader */
+			do_reset(NULL, 0, 0, NULL);
+		}
+	}
+
 	/* OKAY and FAIL indicate command is complete */
 	if (!strncmp("OKAY", response, 4) ||
 			!strncmp("FAIL", response, 4)) {
@@ -273,6 +294,55 @@ static void fb_erase(char *response)
 	fb_mmc_erase(cmd_parameter, response);
 }
 
+/**
+ * Continues normal boot process by running "bootcmd". Writes
+ * to response.
+ *
+ * @param repsonse    Pointer to fastboot response buffer
+ */
+static void fb_continue(char *response)
+{
+	char *bootcmd;
+	bootcmd = getenv("bootcmd");
+	if (bootcmd) {
+		write_fb_response("OKAY", "", response);
+	} else {
+		write_fb_response("FAIL", "bootcmd not set", response);
+	}
+}
+
+/**
+ * Sets reboot bootloader flag if requested. Writes to response.
+ *
+ * @param repsonse    Pointer to fastboot response buffer
+ */
+static void fb_reboot(char *response)
+{
+	write_fb_response("OKAY", "", response);
+	if (!strcmp("reboot-bootloader", cmd_string)) {
+		strcpy((char*)CONFIG_FASTBOOT_BUF_ADDR, "reboot-bootloader");
+	}
+}
+
+/**
+ * Boots into downloaded image.
+ */
+static void boot_downloaded_image(void)
+{
+	char kernel_addr[12];
+	char *fdt_addr = getenv("fdt_addr_r");
+	char *bootm_args[] = { "bootm", kernel_addr, "-", fdt_addr, NULL };
+
+	sprintf(kernel_addr, "0x%lx", (long)CONFIG_FASTBOOT_BUF_ADDR);
+
+	printf("\nBooting kernel at %s with fdt at %s...\n\n\n",
+			kernel_addr, fdt_addr);
+	do_bootm(NULL, 0, 4, bootm_args);
+
+	/* This only happens if image is faulty so we start over. */
+	do_reset(NULL, 0, 0, NULL);
+}
+
 /**
  * Writes a response to response buffer of the form "$tag$reason".
  *

commit 8b464fa913ab295ac832e50d3964e04b34c2c337
Author: Jocelyn Bohr <bohr@google.com>
Date:   Wed Nov 9 11:24:08 2016 -0800

    Implement fastboot flash and erase.
    
    Add function to respond to fastboot flash and erase. Flash writes the
    previously downloaded image to indicated partition. Erase clears the
    indicated partition. fb_flash and fb_erase are essentially wrappers
    for fb_mmc_flash_write and fb_mmc_erase, which are implemented in
    common/fb_mmc.c.
    
    Added common/fb_common.c, where fastboot_okay/fail are implemented.
    common/fb_mmc.c assumes fasboot_okay() and fastboot_fail() are
    implemented, but they were tied to the fastboot USB implementation.
    This refactor adds the response string as a parameter to
    fastboot_okay/fail, instead of modifying a global.
    
    Bug: 31887729
    Test: FLASH:
          - Create file "foo" containing 2048 chars = "-"
          - Start "fastboot udp" on device and run
            "fastboot -s udp:$RPI_IP flash misc foo" from host
          - From U-boot console, read into memory the first 4 blocks from
            misc partition, observe each byte is "-".
    
          ERASE
          - Start "fastboot udp" on device and run
            "fastboot -s udp:$RPI_IP erase misc" from host
              - From U-boot console, read into memory many blocks from misc
            partition, observe each byte is 0x00
    
              Configs that use fastboot USB implementation still build.
    
    Change-Id: I5bd54868990bd9d5736d0969b3db240c2926eeec

diff --git a/common/Makefile b/common/Makefile
index 1b56cf9a70..a66a3fd6dd 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -120,6 +120,10 @@ obj-y += fb_nand.o
 endif
 endif
 
+ifneq ($(or $(CONFIG_USB_FUNCTION_FASTBOOT),$(CONFIG_UDP_FUNCTION_FASTBOOT)),)
+obj-y += fb_common.o
+endif
+
 ifdef CONFIG_CMD_EEPROM_LAYOUT
 obj-y += eeprom/eeprom_field.o eeprom/eeprom_layout.o
 endif
diff --git a/common/fb_common.c b/common/fb_common.c
new file mode 100644
index 0000000000..a1daaccd55
--- /dev/null
+++ b/common/fb_common.c
@@ -0,0 +1,22 @@
+/*
+* Copyright (C) 2016 The Android Open Source Project
+*
+* SPDX-License-Identifier: BSD-2-Clause
+*/
+
+#include <common.h>
+#include <fastboot.h>
+
+void fastboot_fail(const char *reason, char *response)
+{
+	const char *fail_str = "FAIL";
+	strncpy(response, fail_str, FASTBOOT_RESPONSE_LEN);
+	strncat(response, reason, FASTBOOT_RESPONSE_LEN - strlen(fail_str) - 1);
+}
+
+void fastboot_okay(const char *reason, char *response)
+{
+	const char *okay_str = "OKAY";
+	strncpy(response, okay_str, FASTBOOT_RESPONSE_LEN);
+	strncat(response, reason, FASTBOOT_RESPONSE_LEN - strlen(okay_str) - 1);
+}
diff --git a/common/fb_mmc.c b/common/fb_mmc.c
index 26d60b88d0..50cae9b418 100644
--- a/common/fb_mmc.c
+++ b/common/fb_mmc.c
@@ -74,7 +74,7 @@ static lbaint_t fb_mmc_sparse_reserve(struct sparse_storage *info,
 
 static void write_raw_image(struct blk_desc *dev_desc, disk_partition_t *info,
 		const char *part_name, void *buffer,
-		unsigned int download_bytes)
+		unsigned int download_bytes, char *response)
 {
 	lbaint_t blkcnt;
 	lbaint_t blks;
@@ -85,7 +85,7 @@ static void write_raw_image(struct blk_desc *dev_desc, disk_partition_t *info,
 
 	if (blkcnt > info->size) {
 		error("too large for partition: '%s'\n", part_name);
-		fastboot_fail("too large for partition");
+		fastboot_fail("too large for partition", response);
 		return;
 	}
 
@@ -94,13 +94,13 @@ static void write_raw_image(struct blk_desc *dev_desc, disk_partition_t *info,
 	blks = blk_dwrite(dev_desc, info->start, blkcnt, buffer);
 	if (blks != blkcnt) {
 		error("failed writing to device %d\n", dev_desc->devnum);
-		fastboot_fail("failed writing to device");
+		fastboot_fail("failed writing to device", response);
 		return;
 	}
 
 	printf("........ wrote " LBAFU " bytes to '%s'\n", blkcnt * info->blksz,
 	       part_name);
-	fastboot_okay("");
+	fastboot_okay("", response);
 }
 
 #ifdef CONFIG_ANDROID_BOOT_IMAGE
@@ -261,7 +261,7 @@ static int fb_mmc_update_zimage(struct blk_desc *dev_desc,
 #endif
 
 void fb_mmc_flash_write(const char *cmd, void *download_buffer,
-			unsigned int download_bytes)
+			unsigned int download_bytes, char *response)
 {
 	struct blk_desc *dev_desc;
 	disk_partition_t info;
@@ -269,7 +269,7 @@ void fb_mmc_flash_write(const char *cmd, void *download_buffer,
 	dev_desc = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV);
 	if (!dev_desc || dev_desc->type == DEV_TYPE_UNKNOWN) {
 		error("invalid mmc device\n");
-		fastboot_fail("invalid mmc device");
+		fastboot_fail("invalid mmc device", response);
 		return;
 	}
 
@@ -280,16 +280,17 @@ void fb_mmc_flash_write(const char *cmd, void *download_buffer,
 		if (is_valid_gpt_buf(dev_desc, download_buffer)) {
 			printf("%s: invalid GPT - refusing to write to flash\n",
 			       __func__);
-			fastboot_fail("invalid GPT partition");
+			fastboot_fail("invalid GPT partition", response);
 			return;
 		}
 		if (write_mbr_and_gpt_partitions(dev_desc, download_buffer)) {
 			printf("%s: writing GPT partitions failed\n", __func__);
-			fastboot_fail("writing GPT partitions failed");
+			fastboot_fail(
+				      "writing GPT partitions failed", response);
 			return;
 		}
 		printf("........ success\n");
-		fastboot_okay("");
+		fastboot_okay("", response);
 		return;
 	}
 #endif
@@ -323,7 +324,7 @@ void fb_mmc_flash_write(const char *cmd, void *download_buffer,
 
 	if (part_get_info_by_name_or_alias(dev_desc, cmd, &info) < 0) {
 		error("cannot find partition: '%s'\n", cmd);
-		fastboot_fail("cannot find partition");
+		fastboot_fail("cannot find partition", response);
 		return;
 	}
 
@@ -344,14 +345,14 @@ void fb_mmc_flash_write(const char *cmd, void *download_buffer,
 
 		sparse.priv = &sparse_priv;
 		write_sparse_image(&sparse, cmd, download_buffer,
-				   download_bytes);
+				   download_bytes, response);
 	} else {
 		write_raw_image(dev_desc, &info, cmd, download_buffer,
-				download_bytes);
+				download_bytes, response);
 	}
 }
 
-void fb_mmc_erase(const char *cmd)
+void fb_mmc_erase(const char *cmd, char *response)
 {
 	int ret;
 	struct blk_desc *dev_desc;
@@ -361,21 +362,21 @@ void fb_mmc_erase(const char *cmd)
 
 	if (mmc == NULL) {
 		error("invalid mmc device");
-		fastboot_fail("invalid mmc device");
+		fastboot_fail("invalid mmc device", response);
 		return;
 	}
 
 	dev_desc = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV);
 	if (!dev_desc || dev_desc->type == DEV_TYPE_UNKNOWN) {
 		error("invalid mmc device");
-		fastboot_fail("invalid mmc device");
+		fastboot_fail("invalid mmc device", response);
 		return;
 	}
 
 	ret = part_get_info_by_name_or_alias(dev_desc, cmd, &info);
 	if (ret < 0) {
 		error("cannot find partition: '%s'", cmd);
-		fastboot_fail("cannot find partition");
+		fastboot_fail("cannot find partition", response);
 		return;
 	}
 
@@ -394,11 +395,11 @@ void fb_mmc_erase(const char *cmd)
 	blks = blk_derase(dev_desc, blks_start, blks_size);
 	if (blks != blks_size) {
 		error("failed erasing from device %d", dev_desc->devnum);
-		fastboot_fail("failed erasing from device");
+		fastboot_fail("failed erasing from device", response);
 		return;
 	}
 
 	printf("........ erased " LBAFU " bytes from '%s'\n",
 	       blks_size * info.blksz, cmd);
-	fastboot_okay("");
+	fastboot_okay("", response);
 }
diff --git a/common/fb_nand.c b/common/fb_nand.c
index 3d027d4375..49c6023e74 100644
--- a/common/fb_nand.c
+++ b/common/fb_nand.c
@@ -32,7 +32,8 @@ __weak int board_fastboot_write_partition_setup(char *name)
 
 static int fb_nand_lookup(const char *partname,
 			  struct mtd_info **mtd,
-			  struct part_info **part)
+			  struct part_info **part
+			  char *response)
 {
 	struct mtd_device *dev;
 	int ret;
@@ -41,21 +42,21 @@ static int fb_nand_lookup(const char *partname,
 	ret = mtdparts_init();
 	if (ret) {
 		error("Cannot initialize MTD partitions\n");
-		fastboot_fail("cannot init mtdparts");
+		fastboot_fail("cannot init mtdparts", response);
 		return ret;
 	}
 
 	ret = find_dev_and_part(partname, &dev, &pnum, part);
 	if (ret) {
 		error("cannot find partition: '%s'", partname);
-		fastboot_fail("cannot find partition");
+		fastboot_fail("cannot find partition", response);
 		return ret;
 	}
 
 	if (dev->id->type != MTD_DEV_TYPE_NAND) {
 		error("partition '%s' is not stored on a NAND device",
 		      partname);
-		fastboot_fail("not a NAND device");
+		fastboot_fail("not a NAND device", response);
 		return -EINVAL;
 	}
 
@@ -146,16 +147,16 @@ static lbaint_t fb_nand_sparse_reserve(struct sparse_storage *info,
 }
 
 void fb_nand_flash_write(const char *cmd, void *download_buffer,
-			 unsigned int download_bytes)
+			 unsigned int download_bytes, char *response)
 {
 	struct part_info *part;
 	struct mtd_info *mtd = NULL;
 	int ret;
 
-	ret = fb_nand_lookup(cmd, &mtd, &part);
+	ret = fb_nand_lookup(cmd, &mtd, &part, response);
 	if (ret) {
 		error("invalid NAND device");
-		fastboot_fail("invalid NAND device");
+		fastboot_fail("invalid NAND device", response);
 		return;
 	}
 
@@ -181,7 +182,7 @@ void fb_nand_flash_write(const char *cmd, void *download_buffer,
 
 		sparse.priv = &sparse_priv;
 		write_sparse_image(&sparse, cmd, download_buffer,
-				   download_bytes);
+				   download_bytes, response);
 	} else {
 		printf("Flashing raw image at offset 0x%llx\n",
 		       part->offset);
@@ -194,23 +195,23 @@ void fb_nand_flash_write(const char *cmd, void *download_buffer,
 	}
 
 	if (ret) {
-		fastboot_fail("error writing the image");
+		fastboot_fail("error writing the image", response);
 		return;
 	}
 
-	fastboot_okay("");
+	fastboot_okay("", response);
 }
 
-void fb_nand_erase(const char *cmd)
+void fb_nand_erase(const char *cmd, char *response)
 {
 	struct part_info *part;
 	struct mtd_info *mtd = NULL;
 	int ret;
 
-	ret = fb_nand_lookup(cmd, &mtd, &part);
+	ret = fb_nand_lookup(cmd, &mtd, &part, response);
 	if (ret) {
 		error("invalid NAND device");
-		fastboot_fail("invalid NAND device");
+		fastboot_fail("invalid NAND device", response);
 		return;
 	}
 
@@ -221,9 +222,9 @@ void fb_nand_erase(const char *cmd)
 	ret = _fb_nand_erase(mtd, part);
 	if (ret) {
 		error("failed erasing from device %s", mtd->name);
-		fastboot_fail("failed erasing from device");
+		fastboot_fail("failed erasing from device", response);
 		return;
 	}
 
-	fastboot_okay("");
+	fastboot_okay("", response);
 }
diff --git a/common/image-sparse.c b/common/image-sparse.c
index ddf5772cf8..f1382bd351 100644
--- a/common/image-sparse.c
+++ b/common/image-sparse.c
@@ -51,7 +51,7 @@
 
 void write_sparse_image(
 		struct sparse_storage *info, const char *part_name,
-		void *data, unsigned sz)
+		void *data, unsigned sz, char *response)
 {
 	lbaint_t blk;
 	lbaint_t blkcnt;
@@ -101,7 +101,7 @@ void write_sparse_image(
 	if (offset) {
 		printf("%s: Sparse image block size issue [%u]\n",
 		       __func__, sparse_header->blk_sz);
-		fastboot_fail("sparse image block size issue");
+		fastboot_fail("sparse image block size issue", response);
 		return;
 	}
 
@@ -137,7 +137,7 @@ void write_sparse_image(
 			if (chunk_header->total_sz !=
 			    (sparse_header->chunk_hdr_sz + chunk_data_sz)) {
 				fastboot_fail(
-					"Bogus chunk size for chunk type Raw");
+					"Bogus chunk size for chunk type Raw", response);
 				return;
 			}
 
@@ -146,7 +146,7 @@ void write_sparse_image(
 				    "%s: Request would exceed partition size!\n",
 				    __func__);
 				fastboot_fail(
-				    "Request would exceed partition size!");
+				    "Request would exceed partition size!", response);
 				return;
 			}
 
@@ -157,7 +157,7 @@ void write_sparse_image(
 				       __func__, "Write failed, block #",
 				       blk, blks);
 				fastboot_fail(
-					      "flash write failure");
+					      "flash write failure", response);
 				return;
 			}
 			blk += blks;
@@ -170,7 +170,7 @@ void write_sparse_image(
 			if (chunk_header->total_sz !=
 			    (sparse_header->chunk_hdr_sz + sizeof(uint32_t))) {
 				fastboot_fail(
-					"Bogus chunk size for chunk type FILL");
+					"Bogus chunk size for chunk type FILL", response);
 				return;
 			}
 
@@ -181,7 +181,7 @@ void write_sparse_image(
 						ARCH_DMA_MINALIGN));
 			if (!fill_buf) {
 				fastboot_fail(
-					"Malloc failed for: CHUNK_TYPE_FILL");
+					"Malloc failed for: CHUNK_TYPE_FILL", response);
 				return;
 			}
 
@@ -199,7 +199,7 @@ void write_sparse_image(
 				    "%s: Request would exceed partition size!\n",
 				    __func__);
 				fastboot_fail(
-				    "Request would exceed partition size!");
+				    "Request would exceed partition size!", response);
 				return;
 			}
 
@@ -215,7 +215,7 @@ void write_sparse_image(
 					       "Write failed, block #",
 					       blk, j);
 					fastboot_fail(
-						      "flash write failure");
+						      "flash write failure", response);
 					free(fill_buf);
 					return;
 				}
@@ -236,7 +236,7 @@ void write_sparse_image(
 			if (chunk_header->total_sz !=
 			    sparse_header->chunk_hdr_sz) {
 				fastboot_fail(
-					"Bogus chunk size for chunk type Dont Care");
+					"Bogus chunk size for chunk type Dont Care", response);
 				return;
 			}
 			total_blocks += chunk_header->chunk_sz;
@@ -246,7 +246,7 @@ void write_sparse_image(
 		default:
 			printf("%s: Unknown chunk type: %x\n", __func__,
 			       chunk_header->chunk_type);
-			fastboot_fail("Unknown chunk type");
+			fastboot_fail("Unknown chunk type", response);
 			return;
 		}
 	}
@@ -256,9 +256,9 @@ void write_sparse_image(
 	printf("........ wrote %u bytes to '%s'\n", bytes_written, part_name);
 
 	if (total_blocks != sparse_header->total_blks)
-		fastboot_fail("sparse image write failure");
+		fastboot_fail("sparse image write failure", response);
 	else
-		fastboot_okay("");
+		fastboot_okay("", response);
 
 	return;
 }
diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index f3382a965b..a5c460b999 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -150,21 +150,6 @@ static struct usb_gadget_strings *fastboot_strings[] = {
 static void rx_handler_command(struct usb_ep *ep, struct usb_request *req);
 static int strcmp_l1(const char *s1, const char *s2);
 
-
-static char *fb_response_str;
-
-void fastboot_fail(const char *reason)
-{
-	strncpy(fb_response_str, "FAIL\0", 5);
-	strncat(fb_response_str, reason, FASTBOOT_RESPONSE_LEN - 4 - 1);
-}
-
-void fastboot_okay(const char *reason)
-{
-	strncpy(fb_response_str, "OKAY\0", 5);
-	strncat(fb_response_str, reason, FASTBOOT_RESPONSE_LEN - 4 - 1);
-}
-
 static void fastboot_complete(struct usb_ep *ep, struct usb_request *req)
 {
 	int status = req->status;
@@ -598,18 +583,14 @@ static void cb_flash(struct usb_ep *ep, struct usb_request *req)
 		return;
 	}
 
-	/* initialize the response buffer */
-	fb_response_str = response;
-
-	fastboot_fail("no flash device defined");
+	fastboot_fail("no flash device defined", response);
 #ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV
 	fb_mmc_flash_write(cmd, (void *)CONFIG_FASTBOOT_BUF_ADDR,
-			   download_bytes);
+				download_bytes, response);
 #endif
 #ifdef CONFIG_FASTBOOT_FLASH_NAND_DEV
-	fb_nand_flash_write(cmd,
-			    (void *)CONFIG_FASTBOOT_BUF_ADDR,
-			    download_bytes);
+	fb_nand_flash_write(cmd, (void *)CONFIG_FASTBOOT_BUF_ADDR,
+				download_bytes, response);
 #endif
 	fastboot_tx_write_str(response);
 }
@@ -650,15 +631,12 @@ static void cb_erase(struct usb_ep *ep, struct usb_request *req)
 		return;
 	}
 
-	/* initialize the response buffer */
-	fb_response_str = response;
-
-	fastboot_fail("no flash device defined");
+	fastboot_fail("no flash device defined", response);
 #ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV
-	fb_mmc_erase(cmd);
+	fb_mmc_erase(cmd, response);
 #endif
 #ifdef CONFIG_FASTBOOT_FLASH_NAND_DEV
-	fb_nand_erase(cmd);
+	fb_nand_erase(cmd, response);
 #endif
 	fastboot_tx_write_str(response);
 }
diff --git a/include/fastboot.h b/include/fastboot.h
index 616631e9aa..17bf12cac4 100644
--- a/include/fastboot.h
+++ b/include/fastboot.h
@@ -14,9 +14,9 @@
 #define _FASTBOOT_H_
 
 /* The 64 defined bytes plus \0 */
-#define FASTBOOT_RESPONSE_LEN	(64 + 1)
+#define FASTBOOT_RESPONSE_LEN (64 + 1)
 
-void fastboot_fail(const char *reason);
-void fastboot_okay(const char *reason);
+void fastboot_fail(const char *reason, char *response);
+void fastboot_okay(const char *reason, char *response);
 
 #endif /* _FASTBOOT_H_ */
diff --git a/include/fb_mmc.h b/include/fb_mmc.h
index 12b99cb5ee..402ba9b1b4 100644
--- a/include/fb_mmc.h
+++ b/include/fb_mmc.h
@@ -5,5 +5,5 @@
  */
 
 void fb_mmc_flash_write(const char *cmd, void *download_buffer,
-			unsigned int download_bytes);
-void fb_mmc_erase(const char *cmd);
+			unsigned int download_bytes, char *response);
+void fb_mmc_erase(const char *cmd, char *response);
diff --git a/include/fb_nand.h b/include/fb_nand.h
index aaf7cf7ae8..88bdf3690d 100644
--- a/include/fb_nand.h
+++ b/include/fb_nand.h
@@ -6,5 +6,5 @@
  */
 
 void fb_nand_flash_write(const char *cmd, void *download_buffer,
-			 unsigned int download_bytes);
-void fb_nand_erase(const char *cmd);
+			 unsigned int download_bytes, char *response);
+void fb_nand_erase(const char *cmd, char *response);
diff --git a/include/image-sparse.h b/include/image-sparse.h
index b0cc5007f7..967bb6a897 100644
--- a/include/image-sparse.h
+++ b/include/image-sparse.h
@@ -37,4 +37,4 @@ static inline int is_sparse_image(void *buf)
 }
 
 void write_sparse_image(struct sparse_storage *info, const char *part_name,
-			void *data, unsigned sz);
+			void *data, unsigned sz, char *response);
diff --git a/net/fastboot.c b/net/fastboot.c
index 1ae9d262e5..d0b8b34b92 100644
--- a/net/fastboot.c
+++ b/net/fastboot.c
@@ -5,6 +5,8 @@
 */
 
 #include <common.h>
+#include <fastboot.h>
+#include <fb_mmc.h>
 #include <net.h>
 #include <net/fastboot.h>
 #include <stdlib.h>
@@ -29,7 +31,6 @@ struct __attribute__((packed)) fastboot_header {
 #define PACKET_SIZE 1024
 #define FASTBOOT_HEADER_SIZE sizeof(struct fastboot_header)
 #define DATA_SIZE (PACKET_SIZE - FASTBOOT_HEADER_SIZE)
-#define FASTBOOT_RESPONSE_LEN (64 + 1)
 #define FASTBOOT_VERSION "0.4"
 
 /* Sequence number sent for every packet */
@@ -58,6 +59,8 @@ static int fastboot_our_port;
 
 static void fb_getvar(char*);
 static void fb_download(char*, unsigned int, char*);
+static void fb_flash(char*);
+static void fb_erase(char*);
 static void cleanup_command_data(void);
 static void write_fb_response(const char*, const char*, char*);
 
@@ -129,6 +132,10 @@ static void fastboot_send(struct fastboot_header fb_header, char *fastboot_data,
 			fb_getvar(response);
 		} else if (!strcmp("download", cmd_string)) {
 			fb_download(fastboot_data, fastboot_data_len, response);
+		} else if (!strcmp("flash", cmd_string)) {
+			fb_flash(response);
+		} else if (!strcmp("erase", cmd_string)) {
+			fb_erase(response);
 		} else {
 			error("command %s not implemented.\n", cmd_string);
 			write_fb_response("FAIL", "unrecognized command", response);
@@ -243,6 +250,29 @@ static void fb_download(char *fastboot_data, unsigned int fastboot_data_len,
 	}
 }
 
+/**
+ * Writes the previously downloaded image to the partition indicated by
+ * cmd_parameter. Writes to response.
+ *
+ * @param repsonse    Pointer to fastboot response buffer
+ */
+static void fb_flash(char *response)
+{
+	fb_mmc_flash_write(cmd_parameter, (void*)CONFIG_FASTBOOT_BUF_ADDR,
+			image_size, response);
+}
+
+/**
+ * Erases the partition indicated by cmd_parameter (clear to 0x00s). Writes
+ * to response.
+ *
+ * @param repsonse    Pointer to fastboot response buffer
+ */
+static void fb_erase(char *response)
+{
+	fb_mmc_erase(cmd_parameter, response);
+}
+
 /**
  * Writes a response to response buffer of the form "$tag$reason".
  *

commit 45930fc17be7eeb48062e3585b4cdc21607e8584
Author: Jocelyn Bohr <bohr@google.com>
Date:   Tue Nov 8 15:26:38 2016 -0800

    Implement fastboot download.
    
    Adds function to respond to fastboot download, and copy downloaded
    image to buffer in RAM.
    
    Bug: 31887729
    Test: - Create file "foo" containing 2048 chars = "-"
          - Start "fastboot udp" on device and run
            "fastboot -s udp:$RPI_IP flash boot foo" from host
          - Observe that rpi received 2048 bytes of data, and
            CONFIG_FASTBOOT_BUF_ADDR contains "-"*2048
    
    Change-Id: Ib42378448627b48c629af89f39a0394db93c3824

diff --git a/net/fastboot.c b/net/fastboot.c
index 4b192710ee..1ae9d262e5 100644
--- a/net/fastboot.c
+++ b/net/fastboot.c
@@ -45,6 +45,11 @@ static unsigned int last_packet_len = 0;
 static char *cmd_string = NULL;
 static char *cmd_parameter = NULL;
 
+/* Fastboot download parameters */
+static unsigned int bytes_received = 0;
+static unsigned int bytes_expected = 0;
+static unsigned int image_size = 0;
+
 static struct in_addr fastboot_remote_ip;
 /* The UDP port at their end */
 static int fastboot_remote_port;
@@ -52,6 +57,7 @@ static int fastboot_remote_port;
 static int fastboot_our_port;
 
 static void fb_getvar(char*);
+static void fb_download(char*, unsigned int, char*);
 static void cleanup_command_data(void);
 static void write_fb_response(const char*, const char*, char*);
 
@@ -121,6 +127,8 @@ static void fastboot_send(struct fastboot_header fb_header, char *fastboot_data,
 			}
 		} else if (!strcmp("getvar", cmd_string)) {
 			fb_getvar(response);
+		} else if (!strcmp("download", cmd_string)) {
+			fb_download(fastboot_data, fastboot_data_len, response);
 		} else {
 			error("command %s not implemented.\n", cmd_string);
 			write_fb_response("FAIL", "unrecognized command", response);
@@ -182,6 +190,59 @@ static void fb_getvar(char *response)
 	}
 }
 
+/**
+ * Copies image data from fastboot_data to CONFIG_FASTBOOT_BUF_ADDR.
+ * Writes to response.
+ *
+ * @param fastboot_data        Pointer to received fastboot data
+ * @param fastboot_data_len    Length of received fastboot data
+ * @param repsonse             Pointer to fastboot response buffer
+ */
+static void fb_download(char *fastboot_data, unsigned int fastboot_data_len,
+		char *response)
+{
+	char *tmp;
+
+	if (bytes_expected == 0) {
+		if (cmd_parameter == NULL) {
+			write_fb_response("FAIL", "Expected command parameter", response);
+			return;
+		}
+		bytes_expected = simple_strtoul(cmd_parameter, &tmp, 16);
+		if (bytes_expected == 0) {
+			write_fb_response("FAIL", "Expected nonzero image size", response);
+			return;
+		}
+	}
+	if (fastboot_data_len == 0 && bytes_received == 0) {
+		/* Nothing to download yet. Response is of the form:
+		 * [DATA|FAIL]$cmd_parameter
+		 *
+		 * where cmd_parameter is an 8 digit hexadecimal number
+		 */
+		if (bytes_expected > CONFIG_FASTBOOT_BUF_SIZE) {
+			write_fb_response("FAIL", cmd_parameter, response);
+		} else {
+			write_fb_response("DATA", cmd_parameter, response);
+		}
+	} else if (fastboot_data_len == 0 && (bytes_received >= bytes_expected)) {
+		/* Download complete. Respond with "OKAY" */
+		write_fb_response("OKAY", "", response);
+		image_size = bytes_received;
+		bytes_expected = bytes_received = 0;
+	} else {
+		if (fastboot_data_len == 0 ||
+				(bytes_received + fastboot_data_len) > bytes_expected) {
+			write_fb_response("FAIL", "Received invalid data length", response);
+			return;
+		}
+		/* Download data to CONFIG_FASTBOOT_BUF_ADDR */
+		memcpy((void*)CONFIG_FASTBOOT_BUF_ADDR + bytes_received, fastboot_data,
+				fastboot_data_len);
+		bytes_received += fastboot_data_len;
+	}
+}
+
 /**
  * Writes a response to response buffer of the form "$tag$reason".
  *

commit 02ad78925c7d198b08fbeca995163189ee18def5
Author: Jocelyn Bohr <bohr@google.com>
Date:   Tue Nov 8 12:58:15 2016 -0800

    Handle Fastboot packet types, implement getvar.
    
    This patch adds functionality to parse Fastboot packet types, and send
    a response to getvar commands.
    
    Bug: 31887729
    Test: Responds to getvar commands with correct values for variables
          version, bootloader-version, downloadsize, serialno.
    
    Change-Id: I752a6119d3019745f20defbb1f0c13dba1f24221

diff --git a/net/fastboot.c b/net/fastboot.c
index eefd648df4..4b192710ee 100644
--- a/net/fastboot.c
+++ b/net/fastboot.c
@@ -28,6 +28,9 @@ struct __attribute__((packed)) fastboot_header {
 
 #define PACKET_SIZE 1024
 #define FASTBOOT_HEADER_SIZE sizeof(struct fastboot_header)
+#define DATA_SIZE (PACKET_SIZE - FASTBOOT_HEADER_SIZE)
+#define FASTBOOT_RESPONSE_LEN (64 + 1)
+#define FASTBOOT_VERSION "0.4"
 
 /* Sequence number sent for every packet */
 static unsigned short fb_sequence_number = 1;
@@ -38,19 +41,30 @@ static const unsigned short fb_udp_version = 1;
 static uchar last_packet[PACKET_SIZE];
 static unsigned int last_packet_len = 0;
 
+/* Parsed from first fastboot command packet */
+static char *cmd_string = NULL;
+static char *cmd_parameter = NULL;
+
 static struct in_addr fastboot_remote_ip;
 /* The UDP port at their end */
 static int fastboot_remote_port;
 /* The UDP port at our end */
 static int fastboot_our_port;
 
+static void fb_getvar(char*);
+static void cleanup_command_data(void);
+static void write_fb_response(const char*, const char*, char*);
+
 /**
  * Constructs and sends a packet in response to received fastboot packet
  *
- * @param fb_header    Header for response packet
- * @param retransmit   Nonzero if sending last sent packet
+ * @param fb_header            Header for response packet
+ * @param fastboot_data        Pointer to received fastboot data
+ * @param fastboot_data_len    Length of received fastboot data
+ * @param retransmit           Nonzero if sending last sent packet
  */
-static void fastboot_send(struct fastboot_header fb_header, uchar retransmit)
+static void fastboot_send(struct fastboot_header fb_header, char *fastboot_data,
+		unsigned int fastboot_data_len, uchar retransmit)
 {
 	uchar *packet;
 	uchar *packet_base;
@@ -58,6 +72,7 @@ static void fastboot_send(struct fastboot_header fb_header, uchar retransmit)
 	const char *error_msg = "An error occurred.";
 	short tmp;
 	struct fastboot_header fb_response_header = fb_header;
+	char response[FASTBOOT_RESPONSE_LEN] = {0};
 	/*
 	 *	We will always be sending some sort of packet, so
 	 *	cobble together the packet headers now.
@@ -96,6 +111,24 @@ static void fastboot_send(struct fastboot_header fb_header, uchar retransmit)
 		packet += strlen(error_msg);
 		break;
 	case FASTBOOT_FASTBOOT:
+		if (cmd_string == NULL) {
+			/* Parse command and send ack */
+			cmd_parameter = fastboot_data;
+			cmd_string = strsep(&cmd_parameter, ":");
+			cmd_string = strdup(cmd_string);
+			if (cmd_parameter) {
+				cmd_parameter = strdup(cmd_parameter);
+			}
+		} else if (!strcmp("getvar", cmd_string)) {
+			fb_getvar(response);
+		} else {
+			error("command %s not implemented.\n", cmd_string);
+			write_fb_response("FAIL", "unrecognized command", response);
+		}
+		/* Write response to packet */
+		memcpy(packet, response, strlen(response));
+		packet += strlen(response);
+		break;
 	default:
 		error("ID %d not implemented.\n", fb_header.id);
 		return;
@@ -109,6 +142,75 @@ static void fastboot_send(struct fastboot_header fb_header, uchar retransmit)
 
 	net_send_udp_packet(net_server_ethaddr, fastboot_remote_ip,
 			    fastboot_remote_port, fastboot_our_port, len);
+
+	/* OKAY and FAIL indicate command is complete */
+	if (!strncmp("OKAY", response, 4) ||
+			!strncmp("FAIL", response, 4)) {
+		cleanup_command_data();
+	}
+}
+
+/**
+ * Writes ascii string specified by cmd_parameter to response.
+ *
+ * @param repsonse    Pointer to fastboot response buffer
+ */
+static void fb_getvar(char *response)
+{
+
+	if (cmd_parameter == NULL) {
+		write_fb_response("FAIL", "missing var", response);
+	} else if (!strcmp("version", cmd_parameter)) {
+		write_fb_response("OKAY", FASTBOOT_VERSION, response);
+	} else if (!strcmp("bootloader-version", cmd_parameter)) {
+		write_fb_response("OKAY", U_BOOT_VERSION, response);
+	} else if (!strcmp("downloadsize", cmd_parameter) ||
+		!strcmp("max-download-size", cmd_parameter)) {
+		char buf_size_str[12];
+		sprintf(buf_size_str, "0x%08x", CONFIG_FASTBOOT_BUF_SIZE);
+		write_fb_response("OKAY", buf_size_str, response);
+	} else if (!strcmp("serialno", cmd_parameter)) {
+		const char *tmp = getenv("serial#");
+		if (tmp) {
+			write_fb_response("OKAY", tmp, response);
+		} else {
+			write_fb_response("FAIL", "Value not set", response);
+		}
+	} else {
+		printf("WARNING: unknown variable: %s\n", cmd_parameter);
+		write_fb_response("FAIL", "Variable not implemented", response);
+	}
+}
+
+/**
+ * Writes a response to response buffer of the form "$tag$reason".
+ *
+ * @param tag         The first part of the response
+ * @param reason      The second part of the response
+ * @param repsonse    Pointer to fastboot response buffer
+ */
+static void write_fb_response(const char* tag, const char *reason,
+		char *response)
+{
+	strncpy(response, tag, strlen(tag));
+	strncat(response, reason, FASTBOOT_RESPONSE_LEN - strlen(tag) - 1);
+}
+
+/**
+ * Frees any resources allocated during current fastboot command.
+ */
+static void cleanup_command_data(void)
+{
+	/* cmd_parameter and cmd_string potentially point to memory allocated by
+	 * strdup
+	 */
+	if (cmd_parameter) {
+		free(cmd_parameter);
+	}
+	if (cmd_string) {
+		free(cmd_string);
+	}
+	cmd_parameter = cmd_string = NULL;
 }
 
 /**
@@ -124,6 +226,8 @@ static void fastboot_handler(uchar *packet, unsigned dport, struct in_addr sip,
 		unsigned sport, unsigned len)
 {
 	struct fastboot_header fb_header;
+	char fastboot_data[DATA_SIZE] = {0};
+	unsigned int fastboot_data_len = 0;
 
 	if (dport != fastboot_our_port) {
 		return;
@@ -143,22 +247,26 @@ static void fastboot_handler(uchar *packet, unsigned dport, struct in_addr sip,
 
 	switch (fb_header.id) {
 	case FASTBOOT_QUERY:
-		fastboot_send(fb_header, 0);
+		fastboot_send(fb_header, fastboot_data, 0, 0);
 		break;
 	case FASTBOOT_INIT:
+	case FASTBOOT_FASTBOOT:
+		fastboot_data_len = len;
+		if (len > 0) {
+			memcpy(fastboot_data, packet, len);
+		}
 		if (fb_header.seq == fb_sequence_number) {
-			fastboot_send(fb_header, 0);
+			fastboot_send(fb_header, fastboot_data, fastboot_data_len, 0);
 			fb_sequence_number++;
 		} else if (fb_header.seq == fb_sequence_number - 1) {
 			/* Retransmit last sent packet */
-			fastboot_send(fb_header, 1);
+			fastboot_send(fb_header, fastboot_data, fastboot_data_len, 1);
 		}
 		break;
-	case FASTBOOT_FASTBOOT:
 	default:
 		error("ID %d not implemented.\n", fb_header.id);
 		fb_header.id = FASTBOOT_ERROR;
-		fastboot_send(fb_header, 0);
+		fastboot_send(fb_header, fastboot_data, 0, 0);
 		break;
 	}
 }

commit 965eda410b8d28439dc1ba4f76061880d72978fd
Author: Jocelyn Bohr <bohr@google.com>
Date:   Mon Nov 7 08:43:55 2016 -0800

    Add support for fastboot command over UDP
    
    The Raspberry Pi does not support USB device mode, so fastboot over
    USB does not work. This patch adds support for and partially
    implements the device side fastboot UDP protocol as a U-boot command.
    It requires an ip address set and ethernet initialized.
    
    - Modify U-boot fastboot command to do fastboot over UDP
    - Add net/fastboot.c, which implements fastboot server functions
    - Handle QUERY and INIT fastboot packets
    - Add CONFIG_UDP_FUNCION_FASTBOOT to enable fastboot over UDP
    
    Bug: 31887729
    Test: Tested with fastboot, responds correctly to query and init
          packets.
    
    Change-Id: I4045abaf7a4455d756b7c1c00215afaa90c70a6e

diff --git a/cmd/fastboot.c b/cmd/fastboot.c
index 488822a2ee..3e24fa0bd2 100644
--- a/cmd/fastboot.c
+++ b/cmd/fastboot.c
@@ -11,18 +11,37 @@
 #include <command.h>
 #include <console.h>
 #include <g_dnl.h>
+#include <net.h>
 #include <usb.h>
 
 static int do_fastboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 {
+#ifdef CONFIG_USB_FUNCTION_FASTBOOT
 	int controller_index;
 	char *usb_controller;
 	int ret;
+#endif
 
 	if (argc < 2)
 		return CMD_RET_USAGE;
 
-	usb_controller = argv[1];
+	if (!strcmp(argv[1], "udp")) {
+#ifndef CONFIG_UDP_FUNCTION_FASTBOOT
+		error("Fastboot UDP not enabled\n");
+		return -1;
+#else
+		return do_fastboot_udp(cmdtp, flag, argc, argv);
+#endif
+	}
+
+	if (strcmp(argv[1], "usb") || argc < 3)
+		return CMD_RET_USAGE;
+
+#ifndef CONFIG_USB_FUNCTION_FASTBOOT
+	error("Fastboot USB not enabled\n");
+	return -1;
+#else
+	usb_controller = argv[2];
 	controller_index = simple_strtoul(usb_controller, NULL, 0);
 
 	ret = board_usb_init(controller_index, USB_INIT_DEVICE);
@@ -59,11 +78,14 @@ exit:
 	board_usb_cleanup(controller_index, USB_INIT_DEVICE);
 
 	return ret;
+#endif
 }
 
 U_BOOT_CMD(
-	fastboot, 2, 1, do_fastboot,
-	"use USB Fastboot protocol",
-	"<USB_controller>\n"
-	"    - run as a fastboot usb device"
+	fastboot, 3, 1, do_fastboot,
+	"use USB or UDP Fastboot protocol",
+	"[usb,udp] <USB_controller>\n"
+	" - run as a fastboot usb or udp device\n"
+	"   usb: specify <USB_controller>\n"
+	"   udp: requires ip_addr set and ethernet initialized\n"
 );
diff --git a/cmd/fastboot/Kconfig b/cmd/fastboot/Kconfig
index a2638a8bba..453cc49057 100644
--- a/cmd/fastboot/Kconfig
+++ b/cmd/fastboot/Kconfig
@@ -11,17 +11,25 @@ config USB_FUNCTION_FASTBOOT
 	help
 	  This enables the USB part of the fastboot gadget.
 
+config UDP_FUNCTION_FASTBOOT
+	select NET
+	bool "Enable fastboot protocol over UDP"
+	help
+	  This enables the fastboot protocol over UDP.
+
 config CMD_FASTBOOT
 	bool "Enable FASTBOOT command"
+	depends on USB_FUNCTION_FASTBOOT || UDP_FUNCTION_FASTBOOT
 	help
 	  This enables the command "fastboot" which enables the Android
-	  fastboot mode for the platform's USB device. Fastboot is a USB
-	  protocol for downloading images, flashing and device control
-	  used on Android devices.
+	  fastboot mode for the platform. Fastboot is a protocol for
+	  downloading images, flashing and device control used on
+	  Android devices. Fastboot requires either network stack
+	  enabled or support for acting as a USB device.
 
 	  See doc/README.android-fastboot for more information.
 
-if USB_FUNCTION_FASTBOOT
+if USB_FUNCTION_FASTBOOT || UDP_FUNCTION_FASTBOOT
 
 config FASTBOOT_BUF_ADDR
 	hex "Define FASTBOOT buffer address"
@@ -74,29 +82,6 @@ config FASTBOOT_FLASH_MMC_DEV
 	  regarding the non-volatile storage device. Define this to
 	  the eMMC device that fastboot should use to store the image.
 
-config FASTBOOT_GPT_NAME
-	string "Target name for updating GPT"
-	depends on FASTBOOT_FLASH
-	default "gpt"
-	help
-	  The fastboot "flash" command supports writing the downloaded
-	  image to the Protective MBR and the Primary GUID Partition
-	  Table. (Additionally, this downloaded image is post-processed
-	  to generate and write the Backup GUID Partition Table.)
-	  This occurs when the specified "partition name" on the
-	  "fastboot flash" command line matches the value defined here.
-	  The default target name for updating GPT is "gpt".
-
-config FASTBOOT_MBR_NAME
-	string "Target name for updating MBR"
-	depends on FASTBOOT_FLASH
-	default "mbr"
-	help
-	  The fastboot "flash" command allows to write the downloaded image
-	  to the Master Boot Record. This occurs when the "partition name"
-	  specified on the "fastboot flash" command line matches the value
-	  defined here. The default target name for updating MBR is "mbr".
-
-endif # USB_FUNCTION_FASTBOOT
+endif # USB_FUNCTION_FASTBOOT || UDP_FUNCTION_FASTBOOT
 
 endif # FASTBOOT
diff --git a/cmd/net.c b/cmd/net.c
index d7c776aacf..1727198c86 100644
--- a/cmd/net.c
+++ b/cmd/net.c
@@ -70,6 +70,12 @@ U_BOOT_CMD(
 );
 #endif
 
+#ifdef CONFIG_UDP_FUNCTION_FASTBOOT
+int do_fastboot_udp(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+{
+	return netboot_common(FASTBOOT, cmdtp, argc, argv);
+}
+#endif
 
 #ifdef CONFIG_CMD_RARP
 int do_rarpb(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
diff --git a/include/net.h b/include/net.h
index 455b48f6c7..109c15e283 100644
--- a/include/net.h
+++ b/include/net.h
@@ -538,7 +538,7 @@ extern int		net_restart_wrap;	/* Tried all network devices */
 
 enum proto_t {
 	BOOTP, RARP, ARP, TFTPGET, DHCP, PING, DNS, NFS, CDP, NETCONS, SNTP,
-	TFTPSRV, TFTPPUT, LINKLOCAL
+	TFTPSRV, TFTPPUT, LINKLOCAL, FASTBOOT
 };
 
 extern char	net_boot_file_name[1024];/* Boot File name */
@@ -552,6 +552,10 @@ extern char *net_dns_resolve;		/* The host to resolve  */
 extern char *net_dns_env_var;		/* the env var to put the ip into */
 #endif
 
+#if defined(CONFIG_UDP_FUNCTION_FASTBOOT)
+int do_fastboot_udp(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]);
+#endif
+
 #if defined(CONFIG_CMD_PING)
 extern struct in_addr net_ping_ip;	/* the ip address to ping */
 #endif
diff --git a/include/net/fastboot.h b/include/net/fastboot.h
new file mode 100644
index 0000000000..10a5e39be1
--- /dev/null
+++ b/include/net/fastboot.h
@@ -0,0 +1,22 @@
+/*
+* Copyright (C) 2016 The Android Open Source Project
+*
+* SPDX-License-Identifier: BSD-2-Clause
+*/
+
+#ifndef __NET_FASTBOOT_H__
+#define __NET_FASTBOOT_H__
+
+/**********************************************************************/
+/*
+ *	Global functions and variables.
+ */
+
+/**
+ * Wait for incoming fastboot comands.
+ */
+void fastboot_start_server(void);
+
+/**********************************************************************/
+
+#endif /* __NET_FASTBOOT_H__ */
diff --git a/net/Makefile b/net/Makefile
index ae54eee5af..6dfd82e647 100644
--- a/net/Makefile
+++ b/net/Makefile
@@ -30,3 +30,4 @@ obj-$(CONFIG_CMD_NET)  += tftp.o
 # sprintf(buf, index ? "foo%d" : "foo", index)
 # and this is intentional usage.
 CFLAGS_eth_common.o += -Wno-format-extra-args
+obj-$(CONFIG_UDP_FUNCTION_FASTBOOT)  += fastboot.o
diff --git a/net/fastboot.c b/net/fastboot.c
new file mode 100644
index 0000000000..eefd648df4
--- /dev/null
+++ b/net/fastboot.c
@@ -0,0 +1,177 @@
+/*
+* Copyright (C) 2016 The Android Open Source Project
+*
+* SPDX-License-Identifier: BSD-2-Clause
+*/
+
+#include <common.h>
+#include <net.h>
+#include <net/fastboot.h>
+#include <stdlib.h>
+#include <version.h>
+
+/* Fastboot port # defined in spec */
+#define WELL_KNOWN_PORT 5554
+
+enum {
+	FASTBOOT_ERROR = 0,
+	FASTBOOT_QUERY = 1,
+	FASTBOOT_INIT = 2,
+	FASTBOOT_FASTBOOT = 3,
+};
+
+struct __attribute__((packed)) fastboot_header {
+	uchar id;
+	uchar flags;
+	unsigned short seq;
+};
+
+#define PACKET_SIZE 1024
+#define FASTBOOT_HEADER_SIZE sizeof(struct fastboot_header)
+
+/* Sequence number sent for every packet */
+static unsigned short fb_sequence_number = 1;
+static const unsigned short fb_packet_size = PACKET_SIZE;
+static const unsigned short fb_udp_version = 1;
+
+/* Keep track of last packet for resubmission */
+static uchar last_packet[PACKET_SIZE];
+static unsigned int last_packet_len = 0;
+
+static struct in_addr fastboot_remote_ip;
+/* The UDP port at their end */
+static int fastboot_remote_port;
+/* The UDP port at our end */
+static int fastboot_our_port;
+
+/**
+ * Constructs and sends a packet in response to received fastboot packet
+ *
+ * @param fb_header    Header for response packet
+ * @param retransmit   Nonzero if sending last sent packet
+ */
+static void fastboot_send(struct fastboot_header fb_header, uchar retransmit)
+{
+	uchar *packet;
+	uchar *packet_base;
+	int len = 0;
+	const char *error_msg = "An error occurred.";
+	short tmp;
+	struct fastboot_header fb_response_header = fb_header;
+	/*
+	 *	We will always be sending some sort of packet, so
+	 *	cobble together the packet headers now.
+	 */
+	packet = net_tx_packet + net_eth_hdr_size() + IP_UDP_HDR_SIZE;
+	packet_base = packet;
+
+	/* Resend last packet */
+	if (retransmit) {
+		memcpy(packet, last_packet, last_packet_len);
+		net_send_udp_packet(net_server_ethaddr, fastboot_remote_ip,
+				    fastboot_remote_port, fastboot_our_port, last_packet_len);
+		return;
+	}
+
+	fb_response_header.seq = htons(fb_response_header.seq);
+	memcpy(packet, &fb_response_header, sizeof(fb_response_header));
+	packet += sizeof(fb_response_header);
+
+	switch (fb_header.id) {
+	case FASTBOOT_QUERY:
+		tmp = htons(fb_sequence_number);
+		memcpy(packet, &tmp, sizeof(tmp));
+		packet += sizeof(tmp);
+		break;
+	case FASTBOOT_INIT:
+		tmp = htons(fb_udp_version);
+		memcpy(packet, &tmp, sizeof(tmp));
+		packet += sizeof(tmp);
+		tmp = htons(fb_packet_size);
+		memcpy(packet, &tmp, sizeof(tmp));
+		packet += sizeof(tmp);
+		break;
+	case FASTBOOT_ERROR:
+		memcpy(packet, error_msg, strlen(error_msg));
+		packet += strlen(error_msg);
+		break;
+	case FASTBOOT_FASTBOOT:
+	default:
+		error("ID %d not implemented.\n", fb_header.id);
+		return;
+	}
+
+	len = packet-packet_base;
+
+	/* Save packet for retransmitting */
+	last_packet_len = len;
+	memcpy(last_packet, packet_base, last_packet_len);
+
+	net_send_udp_packet(net_server_ethaddr, fastboot_remote_ip,
+			    fastboot_remote_port, fastboot_our_port, len);
+}
+
+/**
+ * Incoming UDP packet handler.
+ *
+ * @param packet  Pointer to incoming UDP packet
+ * @param dport   Destination UDP port
+ * @param sip     Source IP address
+ * @param sport   Source UDP port
+ * @param len     Packet length
+ */
+static void fastboot_handler(uchar *packet, unsigned dport, struct in_addr sip,
+		unsigned sport, unsigned len)
+{
+	struct fastboot_header fb_header;
+
+	if (dport != fastboot_our_port) {
+		return;
+	}
+
+	fastboot_remote_ip = sip;
+	fastboot_remote_port = sport;
+
+	if (len < FASTBOOT_HEADER_SIZE || len > PACKET_SIZE) {
+		return;
+	}
+	memcpy(&fb_header, packet, sizeof(fb_header));
+	fb_header.flags = 0;
+	fb_header.seq = ntohs(fb_header.seq);
+	packet += sizeof(fb_header);
+	len -= sizeof(fb_header);
+
+	switch (fb_header.id) {
+	case FASTBOOT_QUERY:
+		fastboot_send(fb_header, 0);
+		break;
+	case FASTBOOT_INIT:
+		if (fb_header.seq == fb_sequence_number) {
+			fastboot_send(fb_header, 0);
+			fb_sequence_number++;
+		} else if (fb_header.seq == fb_sequence_number - 1) {
+			/* Retransmit last sent packet */
+			fastboot_send(fb_header, 1);
+		}
+		break;
+	case FASTBOOT_FASTBOOT:
+	default:
+		error("ID %d not implemented.\n", fb_header.id);
+		fb_header.id = FASTBOOT_ERROR;
+		fastboot_send(fb_header, 0);
+		break;
+	}
+}
+
+void fastboot_start_server(void)
+{
+	printf("Using %s device\n", eth_get_name());
+	printf("Listening for fastboot command on %pI4\n", &net_ip);
+
+	fastboot_our_port = WELL_KNOWN_PORT;
+
+	net_set_udp_handler(fastboot_handler);
+
+	/* zero out server ether in case the server ip has changed */
+	memset(net_server_ethaddr, 0, 6);
+}
diff --git a/net/net.c b/net/net.c
index 4259c9e321..3469a456ea 100644
--- a/net/net.c
+++ b/net/net.c
@@ -87,6 +87,9 @@
 #include <environment.h>
 #include <errno.h>
 #include <net.h>
+#if defined(CONFIG_UDP_FUNCTION_FASTBOOT)
+#include <net/fastboot.h>
+#endif
 #include <net/tftp.h>
 #if defined(CONFIG_LED_STATUS)
 #include <miiphy.h>
@@ -453,6 +456,11 @@ restart:
 			tftp_start_server();
 			break;
 #endif
+#ifdef CONFIG_UDP_FUNCTION_FASTBOOT
+		case FASTBOOT:
+			fastboot_start_server();
+			break;
+#endif
 #if defined(CONFIG_CMD_DHCP)
 		case DHCP:
 			bootp_reset();
@@ -1324,6 +1332,7 @@ common:
 		/* Fall through */
 
 	case NETCONS:
+	case FASTBOOT:
 	case TFTPSRV:
 		if (net_ip.s_addr == 0) {
 			puts("*** ERROR: `ipaddr' not set\n");

commit 83a51ebaaad9be5e90ca18534919101787559789
Author: Alex Deymo <deymo@google.com>
Date:   Mon Oct 3 17:38:26 2016 -0700

    Add 'load_android' command to load Android images.
    
    Android kernel images include a header that specifies addresses and
    kernel size. This patch adds a command to load these images from
    storage without specifying the size or address of them, and parsing
    them from the header instead.
    
    Bug: 31636643
    Change-Id: I84a9cf82cff78ce2299b1981c4f6f9a5720e4d0d

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 87b56e2c92..833d98d8c6 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -743,6 +743,15 @@ config CMD_LOADS
 	help
 	  Load an S-Record file over serial line
 
+config CMD_LOAD_ANDROID
+	bool "load_android"
+	default n
+	depends on ANDROID_BOOT_IMAGE
+	help
+	  Load an Android Boot image from storage. The Android Boot images
+	  define the size and kernel address on the header, which are used by
+	  this command.
+
 config CMD_MMC
 	bool "mmc"
 	help
diff --git a/cmd/Makefile b/cmd/Makefile
index 868113eab2..f1c412160d 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -76,6 +76,7 @@ obj-$(CONFIG_LED_STATUS_CMD) += legacy_led.o
 obj-$(CONFIG_CMD_LED) += led.o
 obj-$(CONFIG_CMD_LICENSE) += license.o
 obj-y += load.o
+obj-$(CONFIG_CMD_LOAD_ANDROID) += load_android.o
 obj-$(CONFIG_LOGBUFFER) += log.o
 obj-$(CONFIG_ID_EEPROM) += mac.o
 obj-$(CONFIG_CMD_MD5SUM) += md5sum.o
diff --git a/cmd/load_android.c b/cmd/load_android.c
new file mode 100644
index 0000000000..e6c5930837
--- /dev/null
+++ b/cmd/load_android.c
@@ -0,0 +1,85 @@
+/*
+  * Copyright (C) 2008 The Android Open Source Project
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#include <common.h>
+#include <command.h>
+#include <mapmem.h>
+
+static int do_load_android(cmd_tbl_t *cmdtp, int flag, int argc,
+			   char * const argv[])
+{
+	int boot_partition;
+	unsigned long load_address, blk_cnt, blk_read;
+	int ret = CMD_RET_SUCCESS;
+	char *addr_arg_endp, *addr_str;
+	void *buf;
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+
+	if (argc < 2)
+		return CMD_RET_USAGE;
+	if (argc > 4)
+		return CMD_RET_USAGE;
+
+	if (argc >= 4) {
+		load_address = simple_strtoul(argv[3], &addr_arg_endp, 16);
+		if (addr_arg_endp == argv[3] || *addr_arg_endp != '\0')
+			return CMD_RET_USAGE;
+	} else {
+		addr_str = env_get("loadaddr");
+		if (addr_str != NULL)
+			load_address = simple_strtoul(addr_str, NULL, 16);
+		else
+			load_address = CONFIG_SYS_LOAD_ADDR;
+	}
+
+	boot_partition = blk_get_device_part_str(argv[1],
+	                                         (argc >= 3) ? argv[2] : NULL,
+	                                         &dev_desc, &part_info, 1);
+	if (boot_partition < 0)
+		return CMD_RET_FAILURE;
+
+	/* We don't know the size of the Android image before reading the header
+	 * so we don't limit the size of the mapped memory. */
+	buf = map_sysmem(load_address, 0 /* size */);
+
+	/* Read the Android header first and then read the rest. */
+	if (blk_dread(dev_desc, part_info.start, 1, buf) != 1) {
+		ret = CMD_RET_FAILURE;
+	}
+
+	if (ret == CMD_RET_SUCCESS && android_image_check_header(buf) != 0) {
+		printf("\n** Invalid Android Image header on %s %d:%d **\n",
+		       argv[1], dev_desc->devnum, boot_partition);
+		ret = CMD_RET_FAILURE;
+	}
+	if (ret == CMD_RET_SUCCESS) {
+		blk_cnt = (android_image_get_end(buf) - (ulong)buf +
+		           part_info.blksz - 1) / part_info.blksz;
+		printf("\nLoading Android Image (%lu blocks) to 0x%lx... ",
+		       blk_cnt, load_address);
+		blk_read = blk_dread(dev_desc, part_info.start, blk_cnt, buf);
+	}
+
+	unmap_sysmem(buf);
+	if (ret != CMD_RET_SUCCESS)
+		return ret;
+
+	printf("%lu blocks read: %s\n",
+	       blk_read, (blk_read == blk_cnt) ? "OK" : "ERROR");
+	return (blk_read == blk_cnt) ? CMD_RET_SUCCESS : CMD_RET_FAILURE;
+}
+
+
+#if defined(CONFIG_CMD_LOAD_ANDROID)
+U_BOOT_CMD(
+	load_android, 4, 0, do_load_android,
+	"load Android Boot image from storage.",
+	"<interface> [<dev[:part]> [<addr>]]\n"
+	"    - Load a binary Android Boot image from the partition 'part' on\n"
+	"      device type 'interface' instance 'dev' to address 'addr'."
+);
+#endif	/* CONFIG_CMD_LOAD_ANDROID */

commit dd3908179b0c80b0920894c24e3134371749c9a9
Author: Alex Deymo <deymo@google.com>
Date:   Fri Sep 23 10:28:10 2016 -0700

    rpi: Capture the device tree passed from the bootloader.
    
    The Raspberry Pi bootloader (bootcode.bin and start.elf) will load
    the device tree from the same FAT partition and combine it with
    device tree overlays specified in config.txt. This device tree is then
    passed to the kernel (in this case U-Boot) in the r2 register.
    
    This patch retrieves the machine id (r1 register) and the device tree
    (r2 register) passed to U-Boot and store those in environment variables
    on boot so boot scripts can refer to those and pass them to the kernel.
    
    When CONFIG_OF_BOARD is defined, the same device tree passed to U-Boot
    will be used in lieu of bundling one with the U-Boot image at build
    time.
    
    Bug: 31636643
    Test: Booted a Raspberry Pi3 passing the DT from the bootloader.
    Change-Id: Ibf9c754719b3e0f41d20382833abf853ba7613e2

diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c
index 530f149617..10b386901d 100644
--- a/board/raspberrypi/rpi/rpi.c
+++ b/board/raspberrypi/rpi/rpi.c
@@ -348,11 +348,72 @@ static void set_serial_number(void)
 	env_set("serial#", serial_string);
 }
 
+/* Save parameters passed from the bootloader. Initialize these in a non-zero
+ * value to force them to be placed in .data instead of .bss since the .bss
+ * section will be initialized with 0 later in the boot process. */
+static u32 _saved_boot_r0 = 1;
+static u32 _saved_boot_r1 = 2;
+static u32 _saved_boot_r2 = 3;
+
+void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3) {
+	_saved_boot_r0 = r0;
+	_saved_boot_r1 = r1;
+	_saved_boot_r2 = r2;
+	save_boot_params_ret();
+}
+
+/* Returns whether we got passed a FDT from the bootloader. If it was passed,
+ * it returns the address of it. Otherwise returns NULL.
+ *
+ * The RPi start.elf passes important system configuration like memory sizes
+ * and overlays attached as configured in the config.txt file via a Device Tree.
+ *
+ * start.elf determines whether the kernel (in this case U-Boot) supports DT by
+ * looking at a the tail of the kernel file which is added by mkknlimg tool in
+ * the following repository:
+ *
+ * https://github.com/raspberrypi/tools/blob/master/mkimage/knlinfo
+ *
+ * To force start.elf to pass a combined, ready-to-go DT, you have to use the
+ * mkknlimg tool on the kernel the raspberry bootloader is using, that is, the
+ * u-boot.bin image:
+ *
+ * ./mkknlimg --dtok u-boot.bin /boot/u-boot.bin
+ */
+static void* rpi_passed_fdt(void)
+{
+	if (_saved_boot_r0 != 0 || fdt_check_header((void *)_saved_boot_r2))
+		return NULL;
+	return (void *)_saved_boot_r2;
+}
+
+void* board_fdt_blob_setup(void)
+{
+	return rpi_passed_fdt();
+}
+
+static void set_boot_args(void)
+{
+	struct fdt_header *passed_fdt = rpi_passed_fdt();
+	if (passed_fdt == NULL)
+		return;
+
+	/* Set the machine id from r1 register and FDT from register r2. */
+	setenv_hex("machid", _saved_boot_r1);
+	setenv_hex("fdt_addr_r", _saved_boot_r2);
+
+	/* Setting fdt_high forces the updated FDT generated by U-Boot to be
+	 * placed at this address. We choose to place it 512 KiB before the
+	 * passed FDT, limiting the FDT size to 512 KiB. */
+	setenv_hex("fdt_high", _saved_boot_r2 - 512 * 1024);
+}
+
 int misc_init_r(void)
 {
 	set_fdt_addr();
 	set_fdtfile();
 	set_usbethaddr();
+	set_boot_args();
 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
 	set_board_info();
 #endif

commit 8f9ff705552d803cd6fcf6cb109cc3b9bedc7ab8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Nov 10 18:23:42 2017 +0800

    power: charge animation: exit charge if not boot normal mode
    
    exactly for exit charge when detect boot recovery mode now.
    
    Change-Id: I72cdc6cab58d1a825f6a9f036abc0cf13dbcc443
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 8ef6f14365..d9ae07db99 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -4,6 +4,7 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 
+#include <asm/arch/bootrkp.h>
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
@@ -192,6 +193,7 @@ static int charge_animation_show(struct udevice *dev)
 	int start_idx = 0, show_idx = -1;
 	int soc, voltage, key_state;
 	int i, charging = 1;
+	int boot_mode;
 
 	/* If there is preboot command, exit */
 	if (preboot) {
@@ -199,6 +201,13 @@ static int charge_animation_show(struct udevice *dev)
 		return 0;
 	}
 
+#ifdef CONFIG_ROCKCHIP_PARTITION_BOOT
+	boot_mode = rockchip_get_boot_mode();
+	if (boot_mode != ANDROID_BOOT_MODE_NORMAL) {
+		debug("exit charge, due to boot mode: %d\n", boot_mode);
+		return 0;
+	}
+#endif
 	/* Not charger online, exit */
 	charging = fuel_gauge_get_chrg_online(fg);
 	if (charging <= 0)

commit 145fcb5cde3e8f856e58e61ec8b6f030c5ba652e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Nov 10 18:21:48 2017 +0800

    rockchip: add rockchip_get_boot_mode function
    
    Change-Id: Ie1cc9353f05456ad3965260cb0f72bfb2d8a775b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/bootrkp.h b/arch/arm/include/asm/arch-rockchip/bootrkp.h
new file mode 100644
index 0000000000..f1110ac06d
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/bootrkp.h
@@ -0,0 +1,30 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __BOOTRKP_H_
+#define __BOOTRKP_H_
+
+enum android_boot_mode {
+	ANDROID_BOOT_MODE_NORMAL = 0,
+
+	/* "recovery" mode is triggered by the "reboot recovery" command or
+	 * equivalent adb/fastboot command. It can also be triggered by writing
+	 * "boot-recovery" in the BCB message. This mode should boot the
+	 * recovery kernel.
+	 */
+	ANDROID_BOOT_MODE_RECOVERY,
+
+	/* "bootloader" mode is triggered by the "reboot bootloader" command or
+	 * equivalent adb/fastboot command. It can also be triggered by writing
+	 * "bootonce-bootloader" in the BCB message. This mode should boot into
+	 * fastboot.
+	 */
+	ANDROID_BOOT_MODE_BOOTLOADER,
+};
+
+int rockchip_get_boot_mode(void);
+
+#endif
diff --git a/arch/arm/mach-rockchip/bootrkp.c b/arch/arm/mach-rockchip/bootrkp.c
index fe25c469b3..bea42a5a30 100644
--- a/arch/arm/mach-rockchip/bootrkp.c
+++ b/arch/arm/mach-rockchip/bootrkp.c
@@ -9,6 +9,7 @@
 #include <linux/list.h>
 #include <libfdt.h>
 #include <malloc.h>
+#include <asm/arch/bootrkp.h>
 #include <asm/arch/resource_img.h>
 #include "rockchip_parameter.h"
 #include "rockchip_blk.h"
@@ -25,24 +26,6 @@
 #define BOOTLOADER_MESSAGE_OFFSET_IN_MISC	(16 * 1024)
 #define BOOTLOADER_MESSAGE_BLK_OFFSET		(BOOTLOADER_MESSAGE_OFFSET_IN_MISC >> 9)
 
-enum android_boot_mode {
-	ANDROID_BOOT_MODE_NORMAL = 0,
-
-	/* "recovery" mode is triggered by the "reboot recovery" command or
-	 * equivalent adb/fastboot command. It can also be triggered by writing
-	 * "boot-recovery" in the BCB message. This mode should boot the
-	 * recovery kernel.
-	 */
-	ANDROID_BOOT_MODE_RECOVERY,
-
-	/* "bootloader" mode is triggered by the "reboot bootloader" command or
-	 * equivalent adb/fastboot command. It can also be triggered by writing
-	 * "bootonce-bootloader" in the BCB message. This mode should boot into
-	 * fastboot.
-	 */
-	ANDROID_BOOT_MODE_BOOTLOADER,
-};
-
 struct bootloader_message {
 	char command[32];
 	char status[32];
@@ -163,6 +146,20 @@ err:
 	return ret;
 }
 
+int rockchip_get_boot_mode(void)
+{
+	struct blk_part *misc;
+	int boot_mode;
+
+	misc = rockchip_get_blk_part(PART_MISC);
+	if (misc)
+		boot_mode = read_boot_mode_from_misc(misc);
+	else
+		boot_mode = ANDROID_BOOT_MODE_RECOVERY;
+
+	return boot_mode;
+}
+
 static int do_bootrkp(cmd_tbl_t *cmdtp, int flag, int argc,
 		      char * const argv[])
 {
@@ -171,18 +168,13 @@ static int do_bootrkp(cmd_tbl_t *cmdtp, int flag, int argc,
 	ulong kernel_addr_r = env_get_ulong("kernel_addr_r", 16, 0x480000);
 	struct blk_part *boot;
 	struct blk_part *kernel;
-	struct blk_part *misc;
 	ulong ramdisk_size;
 	ulong kernel_size;
 	ulong fdt_size;
 	int boot_mode;
 	int ret = 0;
 
-	misc = rockchip_get_blk_part(PART_MISC);
-	if (misc)
-		boot_mode = read_boot_mode_from_misc(misc);
-	else
-		boot_mode = ANDROID_BOOT_MODE_RECOVERY;
+	boot_mode = rockchip_get_boot_mode();
 
 	if (boot_mode == ANDROID_BOOT_MODE_RECOVERY)
 		boot = rockchip_get_blk_part(PART_RECOVERY);

commit dd9a11eaf4c9eb4ce49dc449988625c2c825d4f5
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Fri Nov 10 11:23:37 2017 +0800

    rockchip: rk3128: check bootmode from pmu_sys_reg0
    
    To keep synchronization with other paltforms, RK312x
    will also check all bootmode information from one
    register--PMU_SYS_REG0(0x0x100a0038).
    
    This change should based on rk3126_ddr_300MHz_v2.09.bin
    
    Change-Id: Ia09c87a2d55337b4d6f3ddc58f1a8dfcef8bb4a2
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index db3ef48973..c61adedbb7 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -223,7 +223,7 @@ config TPL_ROCKCHIP_BACK_TO_BROM
 config ROCKCHIP_BOOT_MODE_REG
 	hex "Rockchip boot mode flag register address"
 	default 0x200081c8 if ROCKCHIP_RK3036
-	default 0x200081c8 if ROCKCHIP_RK3128
+	default 0x100a0038 if ROCKCHIP_RK3128
 	default 0x20004040 if ROCKCHIP_RK3188
 	default 0x110005c8 if ROCKCHIP_RK322X
 	default 0xff730094 if ROCKCHIP_RK3288
diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index 08653c1f0a..4238dc9818 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -72,10 +72,7 @@ int setup_boot_mode(void)
 
 	rockchip_dnl_mode_check();
 
-	if (of_machine_is_compatible("rockchip,rk3128"))
-		reg = (void *)0x100a0038;
-	else
-		reg = (void *)CONFIG_ROCKCHIP_BOOT_MODE_REG;
+	reg = (void *)CONFIG_ROCKCHIP_BOOT_MODE_REG;
 
 	boot_mode = readl(reg);
 

commit bab2d2c3600f035fc878e551ab3dd278f88d6462
Author: David Wu <david.wu@rock-chips.com>
Date:   Fri Nov 10 09:20:35 2017 +0800

    clk: rockchip: Use common interface for pclk_peri
    
    The peripherals pclk rate is the same, use a common interface
    for peripherals like i2c, pwm and etc.
    
    Change-Id: Id9668400f2bb24be397adee312da5365e09c9237
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c
index 038c34a1da..100f4688dd 100644
--- a/drivers/clk/rockchip/clk_rk3128.c
+++ b/drivers/clk/rockchip/clk_rk3128.c
@@ -347,7 +347,7 @@ static ulong rockchip_mmc_set_clk(struct rk3128_cru *cru, uint clk_general_rate,
 	return rockchip_mmc_get_clk(cru, clk_general_rate, periph);
 }
 
-static ulong rk3128_i2c_get_clk(struct rk3128_cru *cru, ulong clk_id)
+static ulong rk3128_peri_get_pclk(struct rk3128_cru *cru, ulong clk_id)
 {
 	u32 div, con;
 
@@ -356,18 +356,19 @@ static ulong rk3128_i2c_get_clk(struct rk3128_cru *cru, ulong clk_id)
 	case PCLK_I2C1:
 	case PCLK_I2C2:
 	case PCLK_I2C3:
+	case PCLK_PWM:
 		con = readl(&cru->cru_clksel_con[10]);
 		div = con >> 12 & 0x3;
 		break;
 	default:
-		printf("do not support this i2c bus\n");
+		printf("do not support this peripheral bus\n");
 		return -EINVAL;
 	}
 
 	return DIV_TO_RATE(PERI_ACLK_HZ, div);
 }
 
-static ulong rk3128_i2c_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz)
+static ulong rk3128_peri_set_pclk(struct rk3128_cru *cru, ulong clk_id, uint hz)
 {
 	int src_clk_div;
 
@@ -379,11 +380,12 @@ static ulong rk3128_i2c_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz)
 	case PCLK_I2C1:
 	case PCLK_I2C2:
 	case PCLK_I2C3:
+	case PCLK_PWM:
 		rk_setreg(&cru->cru_clksel_con[10],
 			  ((src_clk_div - 1) << 12));
 		break;
 	default:
-		printf("do not support this i2c bus\n");
+		printf("do not support this peripheral bus\n");
 		return -EINVAL;
 	}
 
@@ -491,7 +493,8 @@ static ulong rk3128_clk_get_rate(struct clk *clk)
 	case PCLK_I2C1:
 	case PCLK_I2C2:
 	case PCLK_I2C3:
-		return rk3128_i2c_get_clk(priv->cru, clk->id);
+	case PCLK_PWM:
+		return rk3128_peri_get_pclk(priv->cru, clk->id);
 	case SCLK_SARADC:
                 return rk3128_saradc_get_clk(priv->cru);
 	case DCLK_LCDC:
@@ -526,7 +529,8 @@ static ulong rk3128_clk_set_rate(struct clk *clk, ulong rate)
 	case PCLK_I2C1:
 	case PCLK_I2C2:
 	case PCLK_I2C3:
-		new_rate = rk3128_i2c_set_clk(priv->cru, clk->id, rate);
+	case PCLK_PWM:
+		new_rate = rk3128_peri_set_pclk(priv->cru, clk->id, rate);
 		break;
 	case SCLK_SARADC:
 		new_rate = rk3128_saradc_set_clk(priv->cru, rate);

commit e630a69b2d40b72a01980750f6798ae5030b9103
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Nov 8 14:21:11 2017 +0800

    rockchip: test: Add ethernet test cases
    
    1. Add phy loopback test
    2. Add delayline array scaned
    3. Add delayline setting
    4. Add dhcp boot from network
    
    Change-Id: I00abc1c7acb4659b78e29bffc12f0964e5d02937
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/test/rockchip/Makefile b/test/rockchip/Makefile
index e0c18d728b..0113a3724e 100644
--- a/test/rockchip/Makefile
+++ b/test/rockchip/Makefile
@@ -10,4 +10,5 @@ obj-y += test-key.o
 obj-y += test-emmc.o
 obj-y += test-regulator.o
 obj-y += test-rknand.o
+obj-$(CONFIG_GMAC_ROCKCHIP) += test-eth.o
 obj-$(CONFIG_RK_IR) += test-ir.o
diff --git a/test/rockchip/test-eth.c b/test/rockchip/test-eth.c
new file mode 100644
index 0000000000..364e106f54
--- /dev/null
+++ b/test/rockchip/test-eth.c
@@ -0,0 +1,309 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <asm/io.h>
+#include <adc.h>
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <fdtdec.h>
+#include <malloc.h>
+#include <irq-generic.h>
+#include <irq-platform.h>
+#include <miiphy.h>
+#include <net.h>
+#include <phy.h>
+#include "test-rockchip.h"
+
+#define LOOPBACK_TEST_HDR_SIZE		14
+#define LOOPBACK_TEST_DATA_SIZE		1500
+#define LOOPBACK_TEST_FRAME_SIZE	(14 + 1500)
+
+#define MAX_TX_DELAY_LINE		0X7F
+#define MAX_RX_DELAY_LINE		0X7F
+
+/* MAC configuration register definitions */
+#define FRAMEBURSTENABLE		(1 << 21)
+#define MII_PORTSELECT			(1 << 15)
+#define FES_100				(1 << 14)
+#define DISABLERXOWN			(1 << 13)
+#define FULLDPLXMODE			(1 << 11)
+
+enum loopback_speed {
+	LOOPBACK_SPEED_10	= 10,
+	LOOPBACK_SPEED_100	= 100,
+	LOOPBACK_SPEED_1000	= 1000
+};
+
+extern void gmac_set_rgmii(struct udevice *dev, u32 tx_delay, u32 rx_delay);
+
+static struct phy_device *get_current_phydev(void)
+{
+	struct mii_dev *bus = mdio_get_current_dev();
+	int i;
+
+	for (i = 0; i < PHY_MAX_ADDR; i++) {
+		if (bus->phymap[i])
+			return bus->phymap[i];
+	}
+
+	return NULL;
+}
+
+static void create_lbtest_frame(uchar *data, unsigned int frame_size)
+{
+	memset(data, 0xFF, frame_size);
+	frame_size &= ~1;
+	memset(data + (frame_size / 2), 0xAA, frame_size / 2 - 1);
+}
+
+static void alter_lbtest_frame(uchar *data, unsigned int frame_size,
+			       unsigned int tx, unsigned int rx)
+{
+	frame_size &= ~1;
+	memset(data + (frame_size / 2 + tx), 0xBE, 1);
+	memset(data + (frame_size / 2 + rx), 0xAF, 1);
+}
+
+static int check_lbtest_frame(uchar *tx_data, uchar *rx_data,
+			      unsigned int frame_size)
+{
+	int i;
+
+	for (i = 0; i < frame_size; i++) {
+		if (tx_data[i] != rx_data[i])
+			return 13;
+	}
+
+	return 0;
+}
+
+static void eth_setup_loopback_test(struct udevice *current, int speed)
+{
+	struct phy_device *phydev = get_current_phydev();
+	struct eth_pdata *pdata = dev_get_platdata(current);
+	u32 conf;
+	int val;
+
+	if (!phydev) {
+		printf("%s, can't get phydev\n", __func__);
+		return;
+	}
+
+	/* set mac ctrl register */
+	conf = readl(pdata->iobase);
+	if (speed != LOOPBACK_SPEED_1000)
+		conf |= MII_PORTSELECT;
+	else
+		conf &= ~MII_PORTSELECT;
+
+	if (speed == LOOPBACK_SPEED_100)
+		conf |= FES_100;
+
+	if (phydev->duplex)
+		conf |= FULLDPLXMODE;
+	writel(conf, pdata->iobase);
+
+	/* set phy ctrl register */
+	val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
+	val &= ~(BMCR_ANENABLE | BMCR_PDOWN);
+	val |= BMCR_LOOPBACK;
+	if (speed == LOOPBACK_SPEED_1000) {
+		val |= BMCR_SPEED1000;
+		val &= ~BMCR_SPEED100;
+	} else if (speed == LOOPBACK_SPEED_100) {
+		val &= ~BMCR_SPEED1000;
+		val |= BMCR_SPEED100;
+	} else if (speed == LOOPBACK_SPEED_10) {
+		val &= ~BMCR_SPEED1000;
+		val &= ~BMCR_SPEED100;
+	}
+	val |= BMCR_FULLDPLX;
+	phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, val);
+}
+
+static int eth_run_loopback_test(struct udevice *current, int speed, int delay_test)
+{
+	int flags = ETH_RECV_CHECK_DEVICE;
+	uchar *tx_pkt, *rx_packet;
+	int ret, length, success = 0;
+	u32 i, j;
+
+	/* make sure the net_tx_packet is initialized (net_init() was called) */
+	assert(net_tx_packet != NULL);
+	if (net_tx_packet == NULL)
+		return -EINVAL;
+
+	net_set_ether(net_tx_packet, net_bcast_ethaddr, LOOPBACK_TEST_DATA_SIZE);
+	tx_pkt = (uchar *)net_tx_packet + LOOPBACK_TEST_HDR_SIZE;
+	create_lbtest_frame(tx_pkt, LOOPBACK_TEST_DATA_SIZE);
+	udelay(50000);
+
+	for (i = 0x0; i < MAX_TX_DELAY_LINE; i++) {
+		if (delay_test)
+			printf("[0x%02x]:", i);
+		for (j = 0x0; j < MAX_RX_DELAY_LINE; j++) {
+			if (delay_test)
+				gmac_set_rgmii(current, i, j);
+
+			alter_lbtest_frame(tx_pkt, LOOPBACK_TEST_DATA_SIZE, i, j);
+			net_send_packet(net_tx_packet, LOOPBACK_TEST_FRAME_SIZE);
+
+			/*
+			 * Make sure that mac have enough delay time to
+			 * receive packet.
+			 */
+			if (speed == LOOPBACK_SPEED_10)
+				udelay(2000);
+			else if (speed == LOOPBACK_SPEED_100)
+				udelay(2000);
+			else
+				/* The default is 1000M speed */
+				udelay(200);
+
+			length = eth_get_ops(current)->recv(current, flags, &rx_packet);
+			if (length > 0) {
+				if (!check_lbtest_frame(net_tx_packet, rx_packet,
+							LOOPBACK_TEST_FRAME_SIZE)) {
+					printf("*");
+					success++;
+					ret = 0;
+				} else {
+					printf("x");
+					ret = -EINVAL;
+				}
+			} else if (length == 0) {
+				ret = -EBUSY;
+				printf("?");
+			} else {
+				ret = length;
+				printf(" ");
+			}
+
+			if (length >= 0 && eth_get_ops(current)->free_pkt)
+				eth_get_ops(current)->free_pkt(current, rx_packet,
+							       length);
+
+			/* Only run loopback test once */
+			if (!delay_test) {
+				printf("\n");
+				return ret;
+			}
+		}
+		printf("\n");
+	}
+
+	if (delay_test && success > 0)
+		ret = 0;
+
+	return ret;
+}
+
+static int ethernet_init(void)
+{
+	int ret = -EINVAL;
+
+	net_init();
+	eth_halt();
+	eth_set_current();
+	ret = eth_init();
+	if (ret < 0) {
+		eth_halt();
+		return ret;
+	}
+
+	return ret;
+}
+
+static int eth_loopback_test(int speed, int delay_test)
+{
+	struct udevice *current;
+	int ret;
+
+	current = eth_get_dev();
+	if (!current || !device_active(current))
+		return -EINVAL;
+
+	eth_setup_loopback_test(current, speed);
+	ret = ethernet_init();
+	if (ret) {
+		printf("%s, ethernet_init error: %d\n", __func__, ret);
+		return ret;
+	}
+
+	ret = eth_run_loopback_test(current, speed, delay_test);
+
+	return ret;
+}
+
+static void do_eth_help(void)
+{
+	printf("Usage:\n");
+	printf("rktest eth loopback speed - Test the phy loopback, speed is 1000/100/10, need to unplug the RJ45 cable\n");
+	printf("rktest eth delaytest - Get the loopback-passed tx_delay/rx_delay array, need to unplug the RJ45 cable\n");
+	printf("rktest eth delayline tx_delay rx_delay - Delay value is 0x00~0x7f\n");
+	printf("rktest eth dhcp address IP:file - Boot image via network using DHCP/TFTP protocol, example: rktest eth dhcp 0x62000000 192.168.1.100:Image\n");
+}
+
+int board_eth_test(int argc, char * const argv[])
+{
+	int ret;
+	char cmd_eth[512] = {0};
+	int i, speed;
+	u32 tx_delay, rx_delay;
+	struct udevice *current;
+
+	current = eth_get_dev();
+	if (!current || !device_active(current))
+		return -EINVAL;
+
+	switch (argc) {
+	case 3:
+		if (!strncmp(argv[2], "delaytest", sizeof("delaytest"))) {
+			/* Force 1000 speed test */
+			speed = LOOPBACK_SPEED_1000;
+			ret = eth_loopback_test(speed, 1);
+			return ret;
+		} else if (!strncmp(argv[2], "help", sizeof("help"))) {
+			do_eth_help();
+			return 0;
+		}
+		break;
+	case 4:
+		if (!strncmp(argv[2], "loopback", sizeof("loopback"))) {
+			speed = strtoul(argv[3], NULL, 0);
+			ret = eth_loopback_test(speed, 0);
+			return ret;
+		}
+		break;
+	case 5:
+		if (!strncmp(argv[2], "delayline", sizeof("delayline"))) {
+			tx_delay = strtoul(argv[3], NULL, 0);
+			rx_delay = strtoul(argv[4], NULL, 0);
+			gmac_set_rgmii(current, tx_delay, rx_delay);
+			return 0;
+		}
+		break;
+	default:
+		break;
+	}
+
+	for (i = 2; i < argc; i++) {
+		strncat(cmd_eth, argv[i], sizeof(cmd_eth));
+		if (i < argc - 1)
+			strncat(cmd_eth, " ", sizeof(" "));
+	}
+
+	/* run dhcp/tftp test */
+	ret = cli_simple_run_command(cmd_eth, 0);
+	if (ret < 0) {
+		printf("DHCP test error: %d\n", ret);
+		return ret;
+	}
+
+
+	return 0;
+}
diff --git a/test/rockchip/test-rockchip.c b/test/rockchip/test-rockchip.c
index bae1177574..22e369022a 100644
--- a/test/rockchip/test-rockchip.c
+++ b/test/rockchip/test-rockchip.c
@@ -19,6 +19,9 @@ static board_module_t g_board_modules[] = {
 	{ .name = "emmc",	.test = board_emmc_test },
 	{ .name = "regulator",	.test = board_regulator_test },
 	{ .name = "rknand",	.test = board_rknand_test },
+#if defined(CONFIG_GMAC_ROCKCHIP)
+	{ .name = "eth",        .test = board_eth_test },
+#endif
 #if defined(CONFIG_RK_IR)
 	{ .name = "ir",		.test = board_ir_test },
 #endif
diff --git a/test/rockchip/test-rockchip.h b/test/rockchip/test-rockchip.h
index 5287b2d35f..29930a4748 100644
--- a/test/rockchip/test-rockchip.h
+++ b/test/rockchip/test-rockchip.h
@@ -12,7 +12,9 @@ int board_key_test(int argc, char * const argv[]);
 int board_emmc_test(int argc, char * const argv[]);
 int board_regulator_test(int argc, char * const argv[]);
 int board_rknand_test(int argc, char * const argv[]);
-
+#if defined(CONFIG_GMAC_ROCKCHIP)
+int board_eth_test(int argc, char * const argv[]);
+#endif
 #if defined(CONFIG_RK_IR)
 int board_ir_test(int argc, char * const argv[]);
 #endif

commit 1eb9d0643a39b2b0034ca80cffba6d5a2da4f754
Author: David Wu <david.wu@rock-chips.com>
Date:   Fri Nov 10 09:11:39 2017 +0800

    net: gmac_rockchip: export set_rgmii delayline function
    
    We will use the common interface to set gamc rgmii sometimes,
    but the set_rgmii is a private ops. So abstract an exposed
    interface out for use.
    
    Change-Id: Ie1cd15033465ff324b77de389e57d32b28c3d389
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/net/gmac_rockchip.c b/drivers/net/gmac_rockchip.c
index 586ccbff0a..49cba41f52 100644
--- a/drivers/net/gmac_rockchip.c
+++ b/drivers/net/gmac_rockchip.c
@@ -40,6 +40,17 @@ struct rk_gmac_ops {
 	void (*set_to_rgmii)(struct gmac_rockchip_platdata *pdata);
 };
 
+void gmac_set_rgmii(struct udevice *dev, u32 tx_delay, u32 rx_delay)
+{
+	struct gmac_rockchip_platdata *pdata = dev_get_platdata(dev);
+	struct rk_gmac_ops *ops =
+		(struct rk_gmac_ops *)dev_get_driver_data(dev);
+
+	pdata->tx_delay = tx_delay;
+	pdata->rx_delay = rx_delay;
+
+	ops->set_to_rgmii(pdata);
+}
 
 static int gmac_rockchip_ofdata_to_platdata(struct udevice *dev)
 {

commit 885d92d43062d951777ed3e54c9759bd7dc58e96
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 9 14:36:43 2017 +0800

    rockchip: boot_mode: add 'reboot charge' support
    
    Change-Id: Id64bedc1d0c0774d809a2aa54947aebe7fb8eebe
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index 3d71abcb07..08653c1f0a 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -97,6 +97,10 @@ int setup_boot_mode(void)
 		printf("enter Rockusb!\n");
 		env_set("preboot", "setenv preboot; rockusb 0 mmc 0");
 		break;
+	case BOOT_CHARGING:
+		printf("enter charging!\n");
+		env_set("preboot", "setenv preboot; charge");
+		break;
 	}
 
 	return 0;

commit f21199c15e3087199e41574dc37ad61b7d2fe18c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 9 11:59:33 2017 +0800

    include: rk3128_common: enable preboot command
    
    Change-Id: Iedf21914fd85ba8d817b7c6fe4cf0920453407fc
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h
index ade2594f1e..f311ebc2a9 100644
--- a/include/configs/rk3128_common.h
+++ b/include/configs/rk3128_common.h
@@ -49,6 +49,7 @@
 #define CONFIG_SF_DEFAULT_SPEED 20000000
 
 #ifndef CONFIG_SPL_BUILD
+#define CONFIG_PREBOOT
 
 /* usb mass storage */
 #define CONFIG_USB_FUNCTION_MASS_STORAGE

commit 55aee569aa10441d2373d2b33e12b8625a52230f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 9 11:54:05 2017 +0800

    rockchip: parameter: mtdpart address uses cmdline directly
    
    1. rename RK_BLK_OFFSET to RK_PARAM_OFFSET;
    2. parameter.txt should promise partition address is physical.
    
    Change-Id: Ibadc0589c14f6e48475e4db8526535b8a986d944
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rockchip_parameter.c b/arch/arm/mach-rockchip/rockchip_parameter.c
index ff26a4bfd5..afb6f8a8fa 100644
--- a/arch/arm/mach-rockchip/rockchip_parameter.c
+++ b/arch/arm/mach-rockchip/rockchip_parameter.c
@@ -61,7 +61,7 @@ static int rockchip_param_parse(char *param)
 			printf("out of memory\n");
 			break;
 		}
-		part->from = from + RK_BLK_OFFSET;
+		part->from = from;
 		part->size = size;
 		strncpy(part->name, next, len);
 		part->name[len] = '\0';
@@ -84,7 +84,7 @@ static int rockchip_init_param(void)
 		return -ENOMEM;
 	}
 
-	blkdev_read(param, RK_BLK_OFFSET, MAX_PARAM_SIZE >> 9);
+	blkdev_read(param, RK_PARAM_OFFSET, MAX_PARAM_SIZE >> 9);
 
 	return rockchip_param_parse(param->params);
 
diff --git a/arch/arm/mach-rockchip/rockchip_parameter.h b/arch/arm/mach-rockchip/rockchip_parameter.h
index b77a1599d9..46d32a2a8b 100644
--- a/arch/arm/mach-rockchip/rockchip_parameter.h
+++ b/arch/arm/mach-rockchip/rockchip_parameter.h
@@ -9,7 +9,7 @@
 
 #include <linux/list.h>
 
-#define RK_BLK_OFFSET			0x2000
+#define RK_PARAM_OFFSET			0x2000
 #define PART_NAME_SIZE			32
 #define RK_BLK_SIZE			(1 << 9)
 

commit 4853871c4fb9f678cbe7086523938685e934616f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 8 18:03:55 2017 +0800

    rockchip: boot mode: use rockusb download mode as first selection
    
    If failed, we fall back to bootrom download mode.
    
    Change-Id: I003a496d1162e56c459ed54b7d69930a48d91210
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index c6ebdf2e01..3d71abcb07 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -8,6 +8,7 @@
 #include <adc.h>
 #include <asm/io.h>
 #include <asm/arch/boot_mode.h>
+#include <cli.h>
 #include <dm.h>
 #include <fdtdec.h>
 
@@ -56,7 +57,9 @@ __weak int rockchip_dnl_key_pressed(void)
 void rockchip_dnl_mode_check(void)
 {
 	if (rockchip_dnl_key_pressed()) {
-		printf("download key pressed, entering download mode...");
+		printf("download key pressed, entering download mode...\n");
+		/* If failed, we fall back to bootrom download mode */
+		cli_simple_run_command("rockusb 0 mmc 0", 0);
 		set_back_to_bootrom_dnl_flag();
 		do_reset(NULL, 0, 0, NULL);
 	}

commit a8b9d0264602fa5fae47f085125bea1667f70789
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 9 11:34:10 2017 +0800

    power: charge animation: exit charge if detect preboot command.
    
    charge animation will call fuel gauge to set charge current according
    to adapter before exit, it promises lower power battery has enough power
    supply during some long time preboot command execution.
    
    Change-Id: I7fe5b19a0a48422528956310d5ee272ef556b840
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index c68a04aa92..8ef6f14365 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -183,6 +183,7 @@ static int charge_animation_show(struct udevice *dev)
 	struct udevice *pwrkey = priv->pwrkey;
 	struct udevice *pmic = priv->pmic;
 	struct udevice *fg = priv->fg;
+	const char *preboot = env_get("preboot");
 	int image_num = priv->image_num;
 	bool ever_lowpower_screen_off = false;
 	bool screen_on = true;
@@ -192,6 +193,12 @@ static int charge_animation_show(struct udevice *dev)
 	int soc, voltage, key_state;
 	int i, charging = 1;
 
+	/* If there is preboot command, exit */
+	if (preboot) {
+		debug("preboot: %s\n", preboot);
+		return 0;
+	}
+
 	/* Not charger online, exit */
 	charging = fuel_gauge_get_chrg_online(fg);
 	if (charging <= 0)

commit 80d1262bcee06cd20b7fa11777ce8fc868b9b05f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 9 10:11:20 2017 +0800

    rk3128: fix typo of CONFIG_DM_CHARGE_DISPLAY
    
    Change-Id: I67b5f5d75fab2d97310b8ff81ee3dd906a160449
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3128-board.c b/arch/arm/mach-rockchip/rk3128-board.c
index 0e2af0b852..7fc4deefdd 100644
--- a/arch/arm/mach-rockchip/rk3128-board.c
+++ b/arch/arm/mach-rockchip/rk3128-board.c
@@ -20,7 +20,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#ifdef CONFIG_CHARGE_DISPLAY
+#ifdef CONFIG_DM_CHARGE_DISPLAY
 static int charge_display(void)
 {
 	int ret;
@@ -48,7 +48,7 @@ int board_late_init(void)
 {
 	setup_boot_mode();
 
-#ifdef CONFIG_CHARGE_DISPLAY
+#ifdef CONFIG_DM_CHARGE_DISPLAY
 	charge_display();
 #endif
 

commit 0130bb7851cd19353cbe25a9559b5993e4e3b0ca
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 9 11:33:20 2017 +0800

    fuel gauge: rk816: initialize charge current at probe
    
    Change-Id: Ia2d9a22b39eecaf5a965971caef5bed953f2bf1b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk816.c b/drivers/power/fuel_gauge/fg_rk816.c
index 3ca9df47c8..700deb5597 100644
--- a/drivers/power/fuel_gauge/fg_rk816.c
+++ b/drivers/power/fuel_gauge/fg_rk816.c
@@ -983,12 +983,14 @@ static int rk816_fg_init(struct battery_info *di)
 	 */
 	rk816_bat_init_rsoc(di);
 	rk816_bat_init_chrg_config(di);
+	di->chrg_type = rk816_bat_get_charger_type(di);
 	di->voltage_avg = rk816_bat_get_avg_voltage(di);
 	di->voltage_ocv = rk816_bat_get_ocv_voltage(di);
 	di->current_avg = rk816_bat_get_avg_current(di);
 	di->sm_linek = rk816_bat_calc_linek(di);
 	di->finish_chrg_base = get_timer(0);
 	di->pwr_vol = di->voltage_avg;
+	rk816_bat_charger_setting(di, di->chrg_type);
 
 	printf("Battery: soc=%d%%, voltage=%dmv\n", di->dsoc, di->voltage_avg);
 

commit 462e467ddfe296e85ef1ad723d44a3c843c36af2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 8 16:27:05 2017 +0800

    fuel gauge: rk816: first power on must do rsoc initialization
    
    clean up conditons that allow do rsoc initialization:
    1. PMIC is first power on;
    2. dsoc or voltage is under threshold value.
    
    Change-Id: Icd5fb5eb72653a38f901b95a3d5e07cfac8c8a7b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk816.c b/drivers/power/fuel_gauge/fg_rk816.c
index c98546484f..3ca9df47c8 100644
--- a/drivers/power/fuel_gauge/fg_rk816.c
+++ b/drivers/power/fuel_gauge/fg_rk816.c
@@ -921,30 +921,45 @@ static int rk816_bat_get_charger_type(struct battery_info *di)
 	return rk816_bat_get_usb_state(di);
 }
 
-void rk816_bat_init_rsoc(struct battery_info *di)
+static bool rk816_bat_is_under_threshold(struct battery_info *di)
 {
+	bool initialize = false;
 #ifdef CONFIG_DM_CHARGE_DISPLAY
 	struct udevice *dev;
 	int soc, voltage, est_voltage;
-	int ret;
+	int err;
 
-	ret = uclass_find_first_device(UCLASS_CHARGE_DISPLAY, &dev);
-	if (!ret) {
+	err = uclass_find_first_device(UCLASS_CHARGE_DISPLAY, &dev);
+	if (!err) {
 		est_voltage = rk816_bat_get_avg_voltage(di);
 		soc = charge_display_get_power_on_soc(dev);
 		voltage = charge_display_get_power_on_voltage(dev);
 		DBG("threshold: %d%%, %dmv; now: %d%%, %dmv\n",
 		    soc, voltage, di->dsoc, est_voltage);
-		if ((di->dsoc >= soc) && (est_voltage >= voltage))
-			return;
+		if ((di->dsoc <= soc) || (est_voltage <= voltage))
+			initialize = true;
 	}
 #endif
 
-	if (rk816_bat_get_charger_type(di) == NO_CHARGER)
+	return initialize;
+}
+
+void rk816_bat_init_rsoc(struct battery_info *di)
+{
+	bool initialize = false;
+
+	di->is_first_power_on = is_rk816_bat_first_poweron(di);
+	/* If first power on, we must do initialization */
+	if (di->is_first_power_on)
+		initialize = true;
+	/* Only charger online and under threshold, we do initialization */
+	else if (rk816_bat_get_charger_type(di) != NO_CHARGER)
+		initialize = rk816_bat_is_under_threshold(di);
+
+	if (!initialize)
 		return;
 
 	di->pwroff_min = rk816_bat_get_pwroff_min(di);
-	di->is_first_power_on = is_rk816_bat_first_poweron(di);
 	di->is_sw_reset = rk816_bat_ocv_sw_reset(di);
 
 	if (di->is_first_power_on || di->is_sw_reset)
@@ -975,6 +990,8 @@ static int rk816_fg_init(struct battery_info *di)
 	di->finish_chrg_base = get_timer(0);
 	di->pwr_vol = di->voltage_avg;
 
+	printf("Battery: soc=%d%%, voltage=%dmv\n", di->dsoc, di->voltage_avg);
+
 	return 0;
 }
 

commit 7a4d1b540601cf674de4f85400b71859f689c9b3
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Nov 10 15:27:45 2017 +0800

    rockchip: update boot0 hook
    
    armv7 SPL: TAG(overwrite 'b 1f')+'b reset' + ARM_VECTORS
    armv7 U-Boot: ARM_VECTORS
    armv8 SPL: TAG(overwrite 'b 1f')+'b reset' + Reserved_iram(rk3399)
    armv8 U-Boot: 'b reset'
    
    Change-Id: I0ebb3e57d138c02e8781e50dbe775925cd0d71e0
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/boot0.h b/arch/arm/include/asm/arch-rockchip/boot0.h
index af3a733e98..65b4213231 100644
--- a/arch/arm/include/asm/arch-rockchip/boot0.h
+++ b/arch/arm/include/asm/arch-rockchip/boot0.h
@@ -26,7 +26,6 @@
 	 */
 	b 1f	 /* if overwritten, entry-address is at the next word */
 1:
-#endif
 #if CONFIG_IS_ENABLED(ROCKCHIP_EARLYRETURN_TO_BROM)
 	adr     r3, entry_counter
 	ldr	r0, [r3]
@@ -40,6 +39,15 @@ entry_counter:
 	.word   0
 #endif
 	b reset
+
+#if defined(CONFIG_ROCKCHIP_RK3399)
+	.space CONFIG_ROCKCHIP_SPL_RESERVE_IRAM	/* space for the ATF data */
+#endif
+
+#elif defined(CONFIG_ARM64) /* U-Boot for arm64 */
+	b reset
+#endif
+
 #if !defined(CONFIG_ARM64)
 	/*
 	 * For armv7, the addr '_start' will used as vector start address
@@ -49,7 +57,3 @@ entry_counter:
 _start:
 	ARM_VECTORS
 #endif
-
-#if defined(CONFIG_ROCKCHIP_RK3399) && defined(CONFIG_SPL_BUILD)
-	.space CONFIG_ROCKCHIP_SPL_RESERVE_IRAM	/* space for the ATF data */
-#endif

commit f4fc5f8dd310dab3c111745ca758dab5c22a4b85
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Nov 9 19:34:04 2017 -0800

    arm: irq: do not enable irq in SPL/TPL
    
    Change-Id: I6a9b8b883ede2e45e2c5760c633f04bd9ab4fe4e
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S
index 7a21560416..b5ada61062 100644
--- a/arch/arm/cpu/armv8/start.S
+++ b/arch/arm/cpu/armv8/start.S
@@ -231,7 +231,7 @@ ENDPROC(apply_core_errata)
 WEAK(lowlevel_init)
 	mov	x29, lr			/* Save LR */
 
-#if defined(CONFIG_GICV2) || defined(CONFIG_GICV3)
+#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_IRQ)
 	branch_if_slave x0, 1f
 	ldr	x0, =GICD_BASE
 	bl	gic_init_secure
@@ -246,7 +246,7 @@ WEAK(lowlevel_init)
 #endif
 #endif
 
-#if defined(CONFIG_IRQ)
+#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_IRQ)
 	/*
 	 * Setting HCR_EL2.TGE AMO IMO FMO for exception rounting to EL2
 	 */
diff --git a/arch/arm/lib/gic_64.S b/arch/arm/lib/gic_64.S
index febd967e28..1e80fb93c2 100644
--- a/arch/arm/lib/gic_64.S
+++ b/arch/arm/lib/gic_64.S
@@ -108,7 +108,7 @@ ENTRY(gic_init_secure_percpu)
 	mov	w11, #0x1		/* Enable SGI 0 */
 	str	w11, [x10, GICR_ISENABLERn]
 
-#ifdef CONFIG_IRQ
+#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_IRQ)
 	/* Rockchip: check elx */
 	switch_el x0, el3_sre, el2_sre, el1_sre
 
diff --git a/arch/arm/lib/interrupts.c b/arch/arm/lib/interrupts.c
index 6b8ec16776..69cf54bd59 100644
--- a/arch/arm/lib/interrupts.c
+++ b/arch/arm/lib/interrupts.c
@@ -26,7 +26,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#ifndef CONFIG_IRQ
+#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_IRQ)
 int interrupt_init (void)
 {
 	/*
@@ -156,7 +156,7 @@ void do_fiq (struct pt_regs *pt_regs)
 	bad_mode ();
 }
 
-#ifndef CONFIG_IRQ
+#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_IRQ)
 void do_irq (struct pt_regs *pt_regs)
 {
 	efi_restore_gd();
diff --git a/arch/arm/lib/interrupts_64.c b/arch/arm/lib/interrupts_64.c
index e151f80625..65e313e844 100644
--- a/arch/arm/lib/interrupts_64.c
+++ b/arch/arm/lib/interrupts_64.c
@@ -9,7 +9,7 @@
 #include <linux/compiler.h>
 #include <efi_loader.h>
 
-#ifndef CONFIG_IRQ
+#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_IRQ)
 int interrupt_init(void)
 {
 	return 0;
@@ -93,7 +93,7 @@ void do_sync(struct pt_regs *pt_regs, unsigned int esr)
 	panic("Resetting CPU ...\n");
 }
 
-#ifndef CONFIG_IRQ
+#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_IRQ)
 /*
  * do_irq handles the Irq exception.
  */
diff --git a/arch/arm/lib/stack.c b/arch/arm/lib/stack.c
index 5f15e34ed5..67e01b9865 100644
--- a/arch/arm/lib/stack.c
+++ b/arch/arm/lib/stack.c
@@ -25,7 +25,7 @@ int arch_reserve_stacks(void)
 	gd->irq_sp = gd->start_addr_sp;
 
 # if !defined(CONFIG_ARM64)
-#ifdef CONFIG_IRQ
+#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_IRQ)
 #ifndef CONFIG_IRQ_STACK_SIZE
 #define CONFIG_IRQ_STACK_SIZE	8192
 #endif
diff --git a/arch/arm/lib/vectors.S b/arch/arm/lib/vectors.S
index 7079641213..9896b60652 100644
--- a/arch/arm/lib/vectors.S
+++ b/arch/arm/lib/vectors.S
@@ -147,7 +147,7 @@ IRQ_STACK_START_IN:
 	.word	0x0badc0de
 #endif
 
-#ifdef CONFIG_IRQ
+#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_IRQ)
 /* IRQ stack memory (calculated at run-time) */
 .globl IRQ_STACK_START
 IRQ_STACK_START:
@@ -280,7 +280,7 @@ not_used:
 
 	.align	5
 irq:
-#ifdef CONFIG_IRQ
+#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_IRQ)
 	get_irq_stack
 	irq_save_user_regs
 	bl	do_irq
diff --git a/drivers/Makefile b/drivers/Makefile
index 9f961fd3ed..b00a2ca1ae 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -16,7 +16,7 @@ obj-$(CONFIG_$(SPL_TPL_)SERIAL_SUPPORT) += serial/
 obj-$(CONFIG_$(SPL_TPL_)SPI_FLASH_SUPPORT) += mtd/spi/
 obj-$(CONFIG_$(SPL_TPL_)SPI_SUPPORT) += spi/
 obj-$(CONFIG_$(SPL_TPL_)TIMER) += timer/
-obj-$(CONFIG_IRQ) += irq/
+obj-$(CONFIG_$(SPL_TPL_)IRQ) += irq/
 
 ifndef CONFIG_TPL_BUILD
 ifdef CONFIG_SPL_BUILD

commit cd5a540c8ac727a1012de70f577391479075cda8
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Oct 12 14:51:26 2017 +0800

    rockchip: clk: update configure_cpu code order for rk3399
    
    The definition of function configure_cpu() need before rkclk_init().
    
    Change-Id: I791fe6d670af6f36e755978c144c47aaabd8e1b6
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index bfa3a29dd4..95976ac4ae 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -398,85 +398,6 @@ static int pll_para_config(u32 freq_hz, struct pll_div *div)
 	return 0;
 }
 
-#ifdef CONFIG_SPL_BUILD
-static void rkclk_init(struct rk3399_cru *cru)
-{
-	u32 aclk_div;
-	u32 hclk_div;
-	u32 pclk_div;
-
-	rk3399_configure_cpu(cru, APLL_L_600_MHZ);
-	/*
-	 * some cru registers changed by bootrom, we'd better reset them to
-	 * reset/default values described in TRM to avoid confusion in kernel.
-	 * Please consider these three lines as a fix of bootrom bug.
-	 */
-	rk_clrsetreg(&cru->clksel_con[12], 0xffff, 0x4101);
-	rk_clrsetreg(&cru->clksel_con[19], 0xffff, 0x033f);
-	rk_clrsetreg(&cru->clksel_con[56], 0x0003, 0x0003);
-
-	/* configure gpll cpll */
-	rkclk_set_pll(&cru->gpll_con[0], &gpll_init_cfg);
-	rkclk_set_pll(&cru->cpll_con[0], &cpll_init_cfg);
-
-	/* configure perihp aclk, hclk, pclk */
-	aclk_div = GPLL_HZ / PERIHP_ACLK_HZ - 1;
-	assert((aclk_div + 1) * PERIHP_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f);
-
-	hclk_div = PERIHP_ACLK_HZ / PERIHP_HCLK_HZ - 1;
-	assert((hclk_div + 1) * PERIHP_HCLK_HZ ==
-	       PERIHP_ACLK_HZ && (hclk_div < 0x4));
-
-	pclk_div = PERIHP_ACLK_HZ / PERIHP_PCLK_HZ - 1;
-	assert((pclk_div + 1) * PERIHP_PCLK_HZ ==
-	       PERIHP_ACLK_HZ && (pclk_div < 0x7));
-
-	rk_clrsetreg(&cru->clksel_con[14],
-		     PCLK_PERIHP_DIV_CON_MASK | HCLK_PERIHP_DIV_CON_MASK |
-		     ACLK_PERIHP_PLL_SEL_MASK | ACLK_PERIHP_DIV_CON_MASK,
-		     pclk_div << PCLK_PERIHP_DIV_CON_SHIFT |
-		     hclk_div << HCLK_PERIHP_DIV_CON_SHIFT |
-		     ACLK_PERIHP_PLL_SEL_GPLL << ACLK_PERIHP_PLL_SEL_SHIFT |
-		     aclk_div << ACLK_PERIHP_DIV_CON_SHIFT);
-
-	/* configure perilp0 aclk, hclk, pclk */
-	aclk_div = GPLL_HZ / PERILP0_ACLK_HZ - 1;
-	assert((aclk_div + 1) * PERILP0_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f);
-
-	hclk_div = PERILP0_ACLK_HZ / PERILP0_HCLK_HZ - 1;
-	assert((hclk_div + 1) * PERILP0_HCLK_HZ ==
-	       PERILP0_ACLK_HZ && (hclk_div < 0x4));
-
-	pclk_div = PERILP0_ACLK_HZ / PERILP0_PCLK_HZ - 1;
-	assert((pclk_div + 1) * PERILP0_PCLK_HZ ==
-	       PERILP0_ACLK_HZ && (pclk_div < 0x7));
-
-	rk_clrsetreg(&cru->clksel_con[23],
-		     PCLK_PERILP0_DIV_CON_MASK | HCLK_PERILP0_DIV_CON_MASK |
-		     ACLK_PERILP0_PLL_SEL_MASK | ACLK_PERILP0_DIV_CON_MASK,
-		     pclk_div << PCLK_PERILP0_DIV_CON_SHIFT |
-		     hclk_div << HCLK_PERILP0_DIV_CON_SHIFT |
-		     ACLK_PERILP0_PLL_SEL_GPLL << ACLK_PERILP0_PLL_SEL_SHIFT |
-		     aclk_div << ACLK_PERILP0_DIV_CON_SHIFT);
-
-	/* perilp1 hclk select gpll as source */
-	hclk_div = GPLL_HZ / PERILP1_HCLK_HZ - 1;
-	assert((hclk_div + 1) * PERILP1_HCLK_HZ ==
-	       GPLL_HZ && (hclk_div < 0x1f));
-
-	pclk_div = PERILP1_HCLK_HZ / PERILP1_HCLK_HZ - 1;
-	assert((pclk_div + 1) * PERILP1_HCLK_HZ ==
-	       PERILP1_HCLK_HZ && (hclk_div < 0x7));
-
-	rk_clrsetreg(&cru->clksel_con[25],
-		     PCLK_PERILP1_DIV_CON_MASK | HCLK_PERILP1_DIV_CON_MASK |
-		     HCLK_PERILP1_PLL_SEL_MASK,
-		     pclk_div << PCLK_PERILP1_DIV_CON_SHIFT |
-		     hclk_div << HCLK_PERILP1_DIV_CON_SHIFT |
-		     HCLK_PERILP1_PLL_SEL_GPLL << HCLK_PERILP1_PLL_SEL_SHIFT);
-}
-#endif
-
 void rk3399_configure_cpu(struct rk3399_cru *cru,
 			  enum apll_l_frequencies apll_l_freq)
 {
@@ -990,6 +911,85 @@ static struct clk_ops rk3399_clk_ops = {
 	.set_rate = rk3399_clk_set_rate,
 };
 
+#ifdef CONFIG_SPL_BUILD
+static void rkclk_init(struct rk3399_cru *cru)
+{
+	u32 aclk_div;
+	u32 hclk_div;
+	u32 pclk_div;
+
+	rk3399_configure_cpu(cru, APLL_L_600_MHZ);
+	/*
+	 * some cru registers changed by bootrom, we'd better reset them to
+	 * reset/default values described in TRM to avoid confusion in kernel.
+	 * Please consider these three lines as a fix of bootrom bug.
+	 */
+	rk_clrsetreg(&cru->clksel_con[12], 0xffff, 0x4101);
+	rk_clrsetreg(&cru->clksel_con[19], 0xffff, 0x033f);
+	rk_clrsetreg(&cru->clksel_con[56], 0x0003, 0x0003);
+
+	/* configure gpll cpll */
+	rkclk_set_pll(&cru->gpll_con[0], &gpll_init_cfg);
+	rkclk_set_pll(&cru->cpll_con[0], &cpll_init_cfg);
+
+	/* configure perihp aclk, hclk, pclk */
+	aclk_div = GPLL_HZ / PERIHP_ACLK_HZ - 1;
+	assert((aclk_div + 1) * PERIHP_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f);
+
+	hclk_div = PERIHP_ACLK_HZ / PERIHP_HCLK_HZ - 1;
+	assert((hclk_div + 1) * PERIHP_HCLK_HZ ==
+	       PERIHP_ACLK_HZ && (hclk_div < 0x4));
+
+	pclk_div = PERIHP_ACLK_HZ / PERIHP_PCLK_HZ - 1;
+	assert((pclk_div + 1) * PERIHP_PCLK_HZ ==
+	       PERIHP_ACLK_HZ && (pclk_div < 0x7));
+
+	rk_clrsetreg(&cru->clksel_con[14],
+		     PCLK_PERIHP_DIV_CON_MASK | HCLK_PERIHP_DIV_CON_MASK |
+		     ACLK_PERIHP_PLL_SEL_MASK | ACLK_PERIHP_DIV_CON_MASK,
+		     pclk_div << PCLK_PERIHP_DIV_CON_SHIFT |
+		     hclk_div << HCLK_PERIHP_DIV_CON_SHIFT |
+		     ACLK_PERIHP_PLL_SEL_GPLL << ACLK_PERIHP_PLL_SEL_SHIFT |
+		     aclk_div << ACLK_PERIHP_DIV_CON_SHIFT);
+
+	/* configure perilp0 aclk, hclk, pclk */
+	aclk_div = GPLL_HZ / PERILP0_ACLK_HZ - 1;
+	assert((aclk_div + 1) * PERILP0_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f);
+
+	hclk_div = PERILP0_ACLK_HZ / PERILP0_HCLK_HZ - 1;
+	assert((hclk_div + 1) * PERILP0_HCLK_HZ ==
+	       PERILP0_ACLK_HZ && (hclk_div < 0x4));
+
+	pclk_div = PERILP0_ACLK_HZ / PERILP0_PCLK_HZ - 1;
+	assert((pclk_div + 1) * PERILP0_PCLK_HZ ==
+	       PERILP0_ACLK_HZ && (pclk_div < 0x7));
+
+	rk_clrsetreg(&cru->clksel_con[23],
+		     PCLK_PERILP0_DIV_CON_MASK | HCLK_PERILP0_DIV_CON_MASK |
+		     ACLK_PERILP0_PLL_SEL_MASK | ACLK_PERILP0_DIV_CON_MASK,
+		     pclk_div << PCLK_PERILP0_DIV_CON_SHIFT |
+		     hclk_div << HCLK_PERILP0_DIV_CON_SHIFT |
+		     ACLK_PERILP0_PLL_SEL_GPLL << ACLK_PERILP0_PLL_SEL_SHIFT |
+		     aclk_div << ACLK_PERILP0_DIV_CON_SHIFT);
+
+	/* perilp1 hclk select gpll as source */
+	hclk_div = GPLL_HZ / PERILP1_HCLK_HZ - 1;
+	assert((hclk_div + 1) * PERILP1_HCLK_HZ ==
+	       GPLL_HZ && (hclk_div < 0x1f));
+
+	pclk_div = PERILP1_HCLK_HZ / PERILP1_HCLK_HZ - 1;
+	assert((pclk_div + 1) * PERILP1_HCLK_HZ ==
+	       PERILP1_HCLK_HZ && (hclk_div < 0x7));
+
+	rk_clrsetreg(&cru->clksel_con[25],
+		     PCLK_PERILP1_DIV_CON_MASK | HCLK_PERILP1_DIV_CON_MASK |
+		     HCLK_PERILP1_PLL_SEL_MASK,
+		     pclk_div << PCLK_PERILP1_DIV_CON_SHIFT |
+		     hclk_div << HCLK_PERILP1_DIV_CON_SHIFT |
+		     HCLK_PERILP1_PLL_SEL_GPLL << HCLK_PERILP1_PLL_SEL_SHIFT);
+}
+#endif
+
 static int rk3399_clk_probe(struct udevice *dev)
 {
 #ifdef CONFIG_SPL_BUILD

commit 564ceadd6fc12d66584ebabe34fe52c02c2090fc
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Nov 9 15:41:18 2017 +0800

    rockchip: clk: continue work if there is no pmu reset driver
    
    Change-Id: I8011a932df63f82ded8d5713fef103153e751d5d
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 231c94fe70..bfa3a29dd4 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -1227,20 +1227,22 @@ static int rk3399_pmuclk_bind(struct udevice *dev)
 {
 	int ret = 0;
 	struct udevice *sf_child;
-	struct softreset_reg *sf_priv = malloc(sizeof(struct softreset_reg));
+	struct softreset_reg *sf_priv;
 
 	ret = device_bind_driver_to_node(dev, "rockchip_reset",
 					 "reset", dev_ofnode(dev),
 					 &sf_child);
-	if (ret)
+	if (ret) {
 		debug("Warning: No rockchip reset driver: ret=%d\n", ret);
+	} else {
+		sf_priv = malloc(sizeof(struct softreset_reg));
+		sf_priv->sf_reset_offset = offsetof(struct rk3399_pmucru,
+						    pmucru_softrst_con[0]);
+		sf_priv->sf_reset_num = 2;
+		sf_child->priv = sf_priv;
+	}
 
-	sf_priv->sf_reset_offset = offsetof(struct rk3399_pmucru,
-					    pmucru_softrst_con[0]);
-	sf_priv->sf_reset_num = 2;
-	sf_child->priv = sf_priv;
-
-	return ret;
+	return 0;
 }
 
 static const struct udevice_id rk3399_pmuclk_ids[] = {

commit f90455d7bab10c284f4470a1ba7843628da018e2
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Nov 9 12:40:07 2017 +0800

    rockchip: inno-phy: Fix a compile warning
    
    In file included from drivers/phy/phy-rockchip-inno-usb2.c:8:0:
    
    ./arch/arm/include/asm/arch/clock.h:93:29: warning: 'struct udevice'
    declared inside parameter list [enabled by default]
    
    ./arch/arm/include/asm/arch/clock.h:93:29: warning: its scope is only
    this definition or declaration, which is probably not what you want
    [enabled by default]
    
    Change-Id: I2a17d469c70897b2a2024c71054b72c76b409f4e
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index 168f2da817..7a6fcb1b12 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -4,12 +4,12 @@
  * SPDX-License-Identifier:    GPL-2.0+
  */
 
-#include <asm/io.h>
-#include <asm/arch/clock.h>
 #include <common.h>
 #include <dm.h>
 #include <generic-phy.h>
 #include <syscon.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
 
 #define U2PHY_BIT_WRITEABLE_SHIFT	16
 #define CHG_DCD_MAX_RETRIES		6

commit de2f83b25a91ccefd8e525f0013efbf204ebb81f
Author: Shawn Lin <shawn.lin@rock-chips.com>
Date:   Wed Nov 8 15:40:40 2017 +0800

    rockchip: test: Make start LBA mandatory for emmc test
    
    Support reading start LBA from test command and so that
    the developer could understand which area is cleared by
    the emmc write test, and he/she recovery the image respectively
    from the flashing tool by looking into the parameter file.
    
    Change-Id: Ie050c44bb7ef5c4f0edd5f80370da12420500f08
    Suggested-by:  Joseph Chen <chenjh@rock-chips.com>
    Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

diff --git a/test/rockchip/test-emmc.c b/test/rockchip/test-emmc.c
index a7b301e91e..05406d3eac 100644
--- a/test/rockchip/test-emmc.c
+++ b/test/rockchip/test-emmc.c
@@ -9,25 +9,28 @@
 #include <common.h>
 #include <irq-generic.h>
 #include <irq-platform.h>
+#include <linux/compat.h>
 #include <malloc.h>
 #include "test-rockchip.h"
 
 int board_emmc_test(int argc, char * const argv[])
 {
 	u8 *write_buffer, *read_buffer;
-	u32 i, blocks = 0;
+	u32 i, blocks = 0, lba;
 	unsigned long ts;
 	int err = 0;
 	char cmd_mmc[512] = {0};
 
-	blocks = simple_strtoul(argv[2], NULL, 0);
-	if (!blocks) {
-		printf("Usage: rktest emmc blocks\n");
-		printf("8129 <= blocks <= 30000\n");
+	if (argc < 4) {
+		printf("Usage: rktest emmc start_lba blocks\n");
+		printf("blocks should be from 8129 to 30000\n");
 		err = -EINVAL;
 		goto err_wb;
 	}
 
+	lba = simple_strtoul(argv[2], NULL, 0);
+	blocks = simple_strtoul(argv[3], NULL, 0);
+
 	if (blocks % 2)
 		/* Round up */
 		blocks += 1;
@@ -44,14 +47,14 @@ int board_emmc_test(int argc, char * const argv[])
 
 	/* 1. Prepare memory */
 
-	write_buffer = (u8 *)kmalloc(sizeof(u8) * blocks * 512);
+	write_buffer = (u8 *)kmalloc(sizeof(u8) * blocks * 512, GFP_KERNEL);
 	if (!write_buffer) {
 		printf("No memory for write_buffer!\n");
 		err = -ENOMEM;
 		goto err_wb;
 	}
 
-	read_buffer = (u8 *)kmalloc(sizeof(u8) * blocks * 512);
+	read_buffer = (u8 *)kmalloc(sizeof(u8) * blocks * 512, GFP_KERNEL);
 	if (!read_buffer) {
 		printf("No memory for read_buffer!\n");
 		err = -ENOMEM;
@@ -65,8 +68,8 @@ int board_emmc_test(int argc, char * const argv[])
 
 	/* 2. Prepare and start cli command */
 
-	snprintf(cmd_mmc, sizeof(cmd_mmc), "mmc write 0x%x 0x1000 0x%x",
-		 (u32)write_buffer, blocks);
+	snprintf(cmd_mmc, sizeof(cmd_mmc), "mmc write 0x%x 0x%x 0x%x",
+		 (u32)write_buffer, lba, blocks);
 	ts = get_timer(0);
 	err = cli_simple_run_command(cmd_mmc, 0);
 	ts = get_timer(0) - ts;
@@ -76,8 +79,8 @@ int board_emmc_test(int argc, char * const argv[])
 	printf("eMMC write: size %dMB, used %ldms, speed %ldMB/s\n",
 		blocks / 2048, ts, (blocks >> 1) / ts);
 
-	snprintf(cmd_mmc, sizeof(cmd_mmc), "mmc read 0x%x 0x1000 0x%x",
-		 (u32)read_buffer, blocks);
+	snprintf(cmd_mmc, sizeof(cmd_mmc), "mmc read 0x%x 0x%x 0x%x",
+		 (u32)read_buffer, lba, blocks);
 	ts = get_timer(0);
 	err = cli_simple_run_command(cmd_mmc, 0);
 	ts = get_timer(0) - ts;
@@ -99,10 +102,10 @@ int board_emmc_test(int argc, char * const argv[])
 	}
 
 err_mw:
-	free(read_buffer);
+	kfree(read_buffer);
 	read_buffer = NULL;
 err_rb:
-	free(write_buffer);
+	kfree(write_buffer);
 	write_buffer = NULL;
 err_wb:
 	return err;

commit a52e8dd4da202de14100f589a10fa9fd2db799e0
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Wed Nov 8 15:36:48 2017 +0800

    usb: gadget: dwc2: avoid reset core before devices connected
    
    Theoretically, the UDC register need not reconfig when GINTSTS.USBRst
    is set, and only do core reset if the devices was connected before.
    This change adds _connected_ flag to check the devices was really
    connected or not. As an optimization, reset device address to zero
    while GINTSTS.USBRst is set.
    
    This patch fix usb connect failed when continuously perform the
    'fastboot reboot-bootloader' command.
    
    Change-Id: I6a78228e147d2274329d922ac3f3ffef19492e7e
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/gadget/dwc2_udc_otg.c b/drivers/usb/gadget/dwc2_udc_otg.c
index cb44374e81..8c0967fea5 100644
--- a/drivers/usb/gadget/dwc2_udc_otg.c
+++ b/drivers/usb/gadget/dwc2_udc_otg.c
@@ -169,6 +169,7 @@ static void udc_disable(struct dwc2_udc *dev)
 	dev->ep0state = WAIT_FOR_SETUP;
 	dev->gadget.speed = USB_SPEED_UNKNOWN;
 	dev->usb_address = 0;
+	dev->connected = 0;
 
 	otg_phy_off(dev);
 }
diff --git a/drivers/usb/gadget/dwc2_udc_otg_priv.h b/drivers/usb/gadget/dwc2_udc_otg_priv.h
index c40ecf8aca..a0dd2c826e 100644
--- a/drivers/usb/gadget/dwc2_udc_otg_priv.h
+++ b/drivers/usb/gadget/dwc2_udc_otg_priv.h
@@ -86,6 +86,7 @@ struct dwc2_udc {
 	unsigned char usb_address;
 
 	unsigned req_pending:1, req_std:1;
+	unsigned connected:1;
 };
 
 #define ep_is_in(EP) (((EP)->bEndpointAddress&USB_DIR_IN) == USB_DIR_IN)
diff --git a/drivers/usb/gadget/dwc2_udc_otg_regs.h b/drivers/usb/gadget/dwc2_udc_otg_regs.h
index c94396afc0..7f5a7ab9a3 100644
--- a/drivers/usb/gadget/dwc2_udc_otg_regs.h
+++ b/drivers/usb/gadget/dwc2_udc_otg_regs.h
@@ -238,6 +238,7 @@ struct dwc2_usbotg_reg {
 #define DEV_SPEED_FULL_SPEED_11         (0x3 << 0)
 #define EP_MISS_CNT(x)                  (x << 18)
 #define DEVICE_ADDRESS(x)               (x << 4)
+#define DCFG_DEVADDR_MASK		(0x7f << 4)
 
 /* Core Reset Register (GRSTCTL) */
 #define TX_FIFO_FLUSH                   (0x1 << 5)
diff --git a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
index 0d6d2fba8a..554936a493 100644
--- a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
+++ b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
@@ -544,6 +544,9 @@ static int dwc2_udc_irq(int irq, void *_dev)
 	}
 
 	if (intr_status & INT_RESET) {
+		u32 temp;
+		u32 connected = dev->connected;
+
 		usb_status = readl(&reg->gotgctl);
 		debug_cond(DEBUG_ISR,
 			"\tReset interrupt - (GOTGCTL):0x%x\n", usb_status);
@@ -554,7 +557,15 @@ static int dwc2_udc_irq(int irq, void *_dev)
 				debug_cond(DEBUG_ISR,
 					"\t\tOTG core got reset (%d)!!\n",
 					reset_available);
-				reconfig_usbd(dev);
+				/* Reset device address to zero */
+				temp = readl(&reg->dcfg);
+				temp &= ~DCFG_DEVADDR_MASK;
+				writel(temp, &reg->dcfg);
+
+				/* Soft reset the core if connected */
+				if (connected)
+					reconfig_usbd(dev);
+
 				dev->ep0state = WAIT_FOR_SETUP;
 				reset_available = 0;
 				dwc2_udc_pre_setup();
@@ -1348,7 +1359,7 @@ static void dwc2_ep0_setup(struct dwc2_udc *dev)
 			if (usb_ctrl->bRequestType
 				!= (USB_TYPE_STANDARD | USB_RECIP_DEVICE))
 				break;
-
+			dev->connected = 1;
 			udc_set_address(dev, usb_ctrl->wValue);
 			return;
 

commit d007e7964b7dc0a173d2571cb6fc9f18ebaf2c7f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Nov 7 09:24:17 2017 +0800

    arm: armv8: introduce cpu suspend and resume support
    
    Just like linux, it supports cpu save and restore context
    during enter and exit low power mode. With this patch, cpu
    is able to suspend with core power off.
    
    Workflow for trap into ATF for system suspend:
            cpu_suspend
               -> cpu_do_suspend
                  -> arch specific fn: int (*fn)(unsigned long)
                      -> psci_system_suspend(deliver 'cpu_resume()' address to ATF)
                         -> ATF system suspend
                         <- ATF system resume
                  <- cpu_resume
               <- cpu_do_resume
            next instruction
    
    Notice: If needed, you should remember to save and restore GIC by yourself.
    
    Change-Id: I7a7c4989ba0845f5b6880c55a6ea6c47724c99df
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile
index 1249547436..b8c31aead8 100644
--- a/arch/arm/cpu/armv8/Makefile
+++ b/arch/arm/cpu/armv8/Makefile
@@ -18,6 +18,12 @@ obj-y	+= tlb.o
 obj-y	+= transition.o
 obj-y	+= fwcall.o
 obj-y	+= cpu-dt.o
+
+ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
+obj-y	+= ../armv7/suspend.o
+obj-y	+= sleep.o
+endif
+
 obj-$(CONFIG_ARM_SMCCC)		+= smccc-call.o
 
 ifndef CONFIG_SPL_BUILD
diff --git a/arch/arm/cpu/armv8/sleep.S b/arch/arm/cpu/armv8/sleep.S
new file mode 100644
index 0000000000..74ddbeda3e
--- /dev/null
+++ b/arch/arm/cpu/armv8/sleep.S
@@ -0,0 +1,194 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <asm/macro.h>
+#include <asm-offsets.h>
+#include <asm/psci.h>
+#include <config.h>
+#include <linux/linkage.h>
+
+	.globl cpu_suspend
+	.globl cpu_do_suspend
+	.globl cpu_suspend_save
+	.globl cpu_resume
+	.globl cpu_do_resume
+
+/*
+ * int cpu_suspend(unsigned long arg, int (*fn)(unsigned long))
+ * @arg will be passed to fn as argument
+ * return value: 0 - cpu resumed from suspended state.
+ *		 -1 - cpu not suspended.
+ */
+ENTRY(cpu_suspend)
+	/*
+	 * Save x8~x30(lr is x30, sp is x29), total (23 + 1 reserved)*8=192
+	 */
+	stp	x29, lr, [sp, #-192]!
+	/* Reserve 8-byte after x8, just for offset with 16-byte aligned */
+	str	x8, [sp, #16]
+	stp	x9, x10, [sp, #32]
+	stp	x11, x12, [sp, #48]
+	stp	x13, x14, [sp, #64]
+	stp	x15, x16, [sp, #80]
+	stp	x17, x18, [sp, #96]
+	stp	x19, x20, [sp,#112]
+	stp	x21, x22, [sp,#128]
+	stp	x23, x24, [sp,#144]
+	stp	x25, x26, [sp,#160]
+	stp	x27, x28, [sp,#176]
+
+	mov	x19, sp
+	mov	x20, x0
+	mov	x21, x1
+
+	/* Save arch specific suspend fn and arg to stack */
+	sub	sp, sp, #PM_CTX_SIZE
+	stp	x0, x1, [sp, #-16]!
+
+	/* x18 is gd, save it to _suspend_gd !! */
+	adr	x0, _suspend_gd
+	str	x18, [x0]
+
+	/* x0: pm_ctx;	x1: sp where restore x8~x30 from */
+	add	x0, sp, #16
+	mov	x1, x19
+	bl	cpu_suspend_save
+
+	adr	lr, aborted
+	/* Jump to arch specific suspend */
+	mov	x0, x20
+	br	x21
+
+	/* Should never reach here, otherwise failed */
+aborted:
+	/* cpu not suspended */
+	add	sp, sp, #(16 + PM_CTX_SIZE)
+	/* Return -1 to the caller */
+	mov	x0, #(-1)
+
+suspend_return:
+	ldr	x8, [sp, #16]
+	ldp	x9, x10, [sp, #32]
+	ldp	x11, x12, [sp, #48]
+	ldp	x13, x14, [sp, #64]
+	ldp	x15, x16, [sp, #80]
+	ldp	x17, x18, [sp, #96]
+	ldp	x19, x20, [sp,#112]
+	ldp	x21, x22, [sp,#128]
+	ldp	x23, x24, [sp,#144]
+	ldp	x25, x26, [sp,#160]
+	ldp	x27, x28, [sp,#176]
+	ldp	x29, lr, [sp], #192
+	ret
+ENDPROC(cpu_suspend)
+
+ENTRY(cpu_do_suspend)
+	/*
+	 * Save temporary x2~x12, total: 11*8=88, maybe you need not so many
+	 * registers now, but I save them for future extendion.
+	 */
+	stp	x2,  x3, [sp, #-88]!
+	stp	x4,  x5, [sp, #16]
+	stp	x6,  x7, [sp, #32]
+	stp	x8,  x9, [sp, #48]
+	stp	x10, x11, [sp,#64]
+	str	x12, [sp, #80]
+
+	/*
+	 * Save core registers.
+	 *
+	 * Note: If you want to add/sub the register here,
+	 *	 remember update suspend_regs[] of struct pm_ctx.
+	 */
+	mrs	x2, vbar_el2
+	mrs	x3, cptr_el2
+	mrs	x4, ttbr0_el2
+	mrs	x5, tcr_el2
+	mrs	x6, mair_el2
+	mrs	x7, cntvoff_el2
+	mrs	x8, sctlr_el2
+	mrs	x9, hcr_el2
+	mrs	x10, daif
+
+	stp	x2,  x3, [x0, #0]
+	stp	x4,  x5, [x0, #16]
+	stp	x6,  x7, [x0, #32]
+	stp	x8,  x9, [x0, #48]
+	str	x10, [x0, #64]
+
+	/* Restore temporary x2~x12 */
+	ldp	x4,  x5, [sp, #16]
+	ldp	x6,  x7, [sp, #32]
+	ldp	x8,  x9, [sp, #48]
+	ldp	x10, x11, [sp,#64]
+	ldr	x12, [sp, #80]
+	ldp	x2,  x3, [sp], #88
+	ret
+ENDPROC(cpu_do_suspend)
+
+ENTRY(cpu_resume)
+	/* Disable interrupt */
+	msr       daifset, #0x03
+
+	/* Load gd !! */
+	adr x1, _suspend_gd
+	ldr x2, [x1]
+
+	/* Get pm_ctx */
+	add x2, x2, #PM_CTX_PHYS
+	ldr x0, [x2]
+
+	/* Need x0=x0-16, because cpu_do_resume needs it */
+	ldp	x1, lr, [x0], #16
+	mov	sp, x1
+	ret
+ENDPROC(cpu_resume)
+
+/*
+ * void sm_do_cpu_do_resume(paddr suspend_regs) __noreturn;
+ * Restore the registers stored when cpu_do_suspend
+ * x0 points to the physical base address of the suspend_regs
+ * field of struct pm_ctx.
+ */
+ENTRY(cpu_do_resume)
+	/*
+	 * Invalidate local tlb entries before turning on MMU !!!
+	 */
+	tlbi	alle2
+	dsb	sy
+	isb
+
+	ldp	x2, x3, [x0]
+	ldp	x4, x5, [x0, #16]
+	ldp	x6, x7, [x0, #32]
+	ldp	x8, x9, [x0, #48]
+	ldp	x10, x11, [x0, #64]
+	ldr	x12, [x0, #80]
+
+	/* Restore core register */
+	msr	vbar_el2, x2
+	msr	cptr_el2, x3
+	msr	ttbr0_el2, x4
+	msr	tcr_el2, x5
+	msr	mair_el2, x6
+	msr	cntvoff_el2, x7
+	msr	hcr_el2, x9
+
+	/* Enable MMU here */
+	msr	sctlr_el2, x8
+	dsb	sy
+	isb
+
+	/* resume interrupt */
+	msr	daif, x10
+
+	mov	x0, #0
+	b	suspend_return
+ENDPROC(cpu_do_resume)
+
+.align 8
+_suspend_gd:
+	.long	0x0

commit 5492555290751859631312c831537632d8e653d3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Nov 7 09:07:40 2017 +0800

    arm: armv7: introduce cpu suspend and resume support
    
    Just like linux, it supports cpu save and restore context
    during enter and exit low power mode. With this patch, cpu
    is able to suspend with core power off.
    
    Workflow for trap into ATF for system suspend:
            cpu_suspend
               -> cpu_do_suspend
                  -> arch specific fn: int (*fn)(unsigned long)
                      -> psci_system_suspend(deliver 'cpu_resume()' address to ATF)
                         -> ATF system suspend
                         <- ATF system resume
                  <- cpu_resume
               <- cpu_do_resume
            next instruction
    
    Notice: If needed, you should remember to save and restore GIC by yourself.
    
    Change-Id: I5cb6fb6ac5b6a7f4ec4a975b0fc38250b000b28e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile
index b14ee54519..aca89142f0 100644
--- a/arch/arm/cpu/armv7/Makefile
+++ b/arch/arm/cpu/armv7/Makefile
@@ -12,6 +12,11 @@ obj-y	+= cache_v7.o cache_v7_asm.o
 obj-y	+= cpu.o cp15.o
 obj-y	+= syslib.o
 
+ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
+obj-y	+= suspend.o
+obj-y	+= sleep.o
+endif
+
 ifneq ($(CONFIG_SKIP_LOWLEVEL_INIT),y)
 obj-y	+= lowlevel_init.o
 endif
diff --git a/arch/arm/cpu/armv7/sleep.S b/arch/arm/cpu/armv7/sleep.S
new file mode 100644
index 0000000000..b3ea3c1b88
--- /dev/null
+++ b/arch/arm/cpu/armv7/sleep.S
@@ -0,0 +1,185 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <asm/arm32_macros.S>
+#include <asm/macro.h>
+#include <asm-offsets.h>
+#include <asm/psci.h>
+#include <config.h>
+#include <linux/linkage.h>
+
+	.globl cpu_suspend
+	.globl cpu_do_suspend
+	.globl cpu_suspend_save
+	.globl cpu_resume
+	.globl cpu_do_resume
+
+/*
+ * int cpu_suspend(unsigned long arg, int (*fn)(unsigned long))
+ * @arg will be passed to fn as argument
+ * return value: 0 - cpu resumed from suspended state.
+ *		 -1 - cpu not suspended.
+ */
+ENTRY(cpu_suspend)
+	push	{r4 - r12, lr}
+
+	mov	r5, sp
+	sub	sp, sp, #PM_CTX_SIZE
+	push	{r0, r1}
+
+	/* r9 is gd, save it to _suspend_gd !!! */
+	adr	r4, _suspend_gd
+	str	r9, [r4]
+
+	mov	r1, r5
+	add	r0, sp, #8
+	blx	cpu_suspend_save
+
+	adr	lr, aborted
+	/* Jump to arch specific suspend */
+	pop	{r0, pc}
+
+aborted:
+	/* cpu not suspended */
+	add	sp, sp, #PM_CTX_SIZE
+	/* Return -1 to the caller */
+	mov	r0, #(-1)
+
+suspend_return:
+	pop	{r4 - r12, pc}
+ENDPROC(cpu_suspend)
+
+ENTRY(cpu_do_suspend)
+	push	{r4 - r11}
+
+	read_midr r4
+	ubfx	r5, r4, #4, #12
+	ldr     r4, CORTEX_A7_PART_NUM
+	cmp	r5, r4
+	beq	a7_suspend
+	ldr     r4, CORTEX_A9_PART_NUM
+	cmp	r5, r4
+	beq	a9_suspend
+
+	/* cpu not supported */
+	b	.
+
+	/* A9 needs PCR/DIAG */
+a9_suspend:
+	read_pcr r4
+	read_diag r5
+	stmia	r0!, {r4 - r5}
+
+a7_suspend:
+	read_fcseidr r4
+	read_tpidruro r5
+	stmia	r0!, {r4 - r5}
+
+	read_dacr  r4
+	read_ttbr0 r5
+	read_ttbr1 r6
+	read_ttbcr r7
+	read_sctlr r8
+	read_actlr r9
+	read_cpacr r10
+	stmia	r0!, {r4 - r10}
+
+	read_prrr r4
+	read_nmrr r5
+	read_vbar r6
+	mrs r7, CPSR
+	stmia	r0, {r4 - r7}
+
+	pop	{r4 - r11}
+	bx	lr
+ENDPROC(cpu_do_suspend)
+
+ENTRY(cpu_resume)
+	/* Disable interrupt */
+	cpsid	aif
+
+	/* Load gd !! */
+	adr r1, _suspend_gd
+	ldr r2, [r1]
+
+	/* Get pm_ctx */
+	add r2, r2, #PM_CTX_PHYS
+	ldr r0, [r2]
+
+	/* Need to use r0!, because cpu_do_resume needs it */
+	ldmia	r0!, {sp, pc}
+ENDPROC(cpu_resume)
+
+/*
+ * void sm_do_cpu_do_resume(paddr suspend_regs) __noreturn;
+ * Restore the registers stored when cpu_do_suspend
+ * r0 points to the physical base address of the suspend_regs
+ * field of struct pm_ctx.
+ */
+ENTRY(cpu_do_resume)
+	read_midr r4
+	ubfx	r5, r4, #4, #12
+	ldr     r4, CORTEX_A7_PART_NUM
+	cmp	r5, r4
+	beq	a7_resume
+
+	/*
+	 * A9 needs PCR/DIAG
+	 */
+	ldmia   r0!, {r4 - r5}
+	write_pcr r4
+	write_diag r5
+
+a7_resume:
+	/* v7 resume */
+	mov	ip, #0
+
+	/* Invalidate icache to PoU */
+	write_iciallu
+	/* set reserved context */
+	write_contextidr ip
+
+	ldmia	r0!, {r4 - r5}
+	write_fcseidr r4
+	write_tpidruro r5
+
+	ldmia	r0!, {r4 - r10}
+	/* Invalidate entire TLB */
+	write_tlbiall
+	write_dacr r4
+	write_ttbr0 r5
+	write_ttbr1 r6
+	write_ttbcr r7
+
+	ldmia	r0, {r4 - r7}
+	write_prrr  r4
+	write_nmrr  r5
+	write_vbar  r6
+
+	write_actlr r9
+	write_cpacr r10
+	write_bpiall
+	isb
+	dsb
+
+	/* MMU will be enabled here */
+	write_sctlr r8
+	isb
+
+	/* Restore interrupt */
+	msr CPSR_c, r7
+
+	mov	r0, #0
+	b	suspend_return
+ENDPROC(cpu_do_resume)
+
+.align 4
+_suspend_gd:
+	.word	0x0
+CORTEX_A7_PART_NUM:
+	.word	0xC07
+CORTEX_A9_PART_NUM:
+	.word	0xC09
diff --git a/arch/arm/cpu/armv7/suspend.c b/arch/arm/cpu/armv7/suspend.c
new file mode 100644
index 0000000000..2b97561255
--- /dev/null
+++ b/arch/arm/cpu/armv7/suspend.c
@@ -0,0 +1,23 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <asm/suspend.h>
+#include <common.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+void cpu_suspend_save(struct pm_ctx *ctx, unsigned long sp)
+{
+	gd->pm_ctx_phys = (phys_addr_t)ctx;
+
+	/* The content will be passed to cpu_do_resume as register sp */
+	ctx->sp = sp;
+	ctx->cpu_resume_addr = (phys_addr_t)cpu_do_resume;
+
+	cpu_do_suspend(ctx->suspend_regs);
+
+	flush_dcache_all();
+}
diff --git a/arch/arm/include/asm/arm32_macros.S b/arch/arm/include/asm/arm32_macros.S
new file mode 100644
index 0000000000..e6d4f0745e
--- /dev/null
+++ b/arch/arm/include/asm/arm32_macros.S
@@ -0,0 +1,264 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+	/* Please keep them sorted based on the CRn register */
+	.macro read_midr reg
+	mrc     p15, 0, \reg, c0, c0, 0
+	.endm
+
+	.macro read_ctr reg
+	mrc	p15, 0, \reg, c0, c0, 1
+	.endm
+
+	.macro read_mpidr reg
+	mrc	p15, 0, \reg, c0, c0, 5
+	.endm
+
+	.macro read_sctlr reg
+	mrc	p15, 0, \reg, c1, c0, 0
+	.endm
+
+	.macro write_sctlr reg
+	mcr	p15, 0, \reg, c1, c0, 0
+	.endm
+
+	.macro write_actlr reg
+	mcr	p15, 0, \reg, c1, c0, 1
+	.endm
+
+	.macro read_actlr reg
+	mrc	p15, 0, \reg, c1, c0, 1
+	.endm
+
+	.macro write_cpacr reg
+	mcr	p15, 0, \reg, c1, c0, 2
+	.endm
+
+	.macro read_cpacr reg
+	mrc	p15, 0, \reg, c1, c0, 2
+	.endm
+
+	.macro read_scr reg
+	mrc	p15, 0, \reg, c1, c1, 0
+	.endm
+
+	.macro write_scr reg
+	mcr	p15, 0, \reg, c1, c1, 0
+	.endm
+
+	.macro write_nsacr reg
+	mcr	p15, 0, \reg, c1, c1, 2
+	.endm
+
+	.macro read_nsacr reg
+	mrc	p15, 0, \reg, c1, c1, 2
+	.endm
+
+	.macro write_ttbr0 reg
+	mcr	p15, 0, \reg, c2, c0, 0
+	.endm
+
+	.macro read_ttbr0 reg
+	mrc	p15, 0, \reg, c2, c0, 0
+	.endm
+
+	.macro write_ttbr1 reg
+	mcr	p15, 0, \reg, c2, c0, 1
+	.endm
+
+	.macro read_ttbr1 reg
+	mrc	p15, 0, \reg, c2, c0, 1
+	.endm
+
+	.macro write_ttbcr reg
+	mcr	p15, 0, \reg, c2, c0, 2
+	.endm
+
+	.macro read_ttbcr reg
+	mrc	p15, 0, \reg, c2, c0, 2
+	.endm
+
+
+	.macro write_dacr reg
+	mcr	p15, 0, \reg, c3, c0, 0
+	.endm
+
+	.macro read_dacr reg
+	mrc	p15, 0, \reg, c3, c0, 0
+	.endm
+
+	.macro read_dfsr reg
+	mrc	p15, 0, \reg, c5, c0, 0
+	.endm
+
+	.macro write_icialluis
+	/*
+	 * Invalidate all instruction caches to PoU, Inner Shareable
+	 * (register ignored)
+	 */
+	mcr	p15, 0, r0, c7, c1, 0
+	.endm
+
+	.macro write_bpiallis
+	/*
+	 * Invalidate entire branch predictor array, Inner Shareable
+	 * (register ignored)
+	 */
+	mcr	p15, 0, r0, c7, c1, 6
+	.endm
+
+	.macro write_iciallu
+	/* Invalidate all instruction caches to PoU (register ignored) */
+	mcr	p15, 0, r0, c7, c5, 0
+	.endm
+
+	.macro write_icimvau reg
+	/* Instruction cache invalidate by MVA */
+	mcr	p15, 0, \reg, c7, c5, 1
+	.endm
+
+	.macro write_bpiall
+	/* Invalidate entire branch predictor array (register ignored) */
+	mcr	p15, 0, r0, c7, c5, 6
+	.endm
+
+	.macro write_dcimvac reg
+	/* Data cache invalidate by MVA */
+	mcr	p15, 0, \reg, c7, c6, 1
+	.endm
+
+	.macro write_dcisw reg
+	/* Data cache invalidate by set/way */
+	mcr	p15, 0, \reg, c7, c6, 2
+	.endm
+
+	.macro write_dccmvac reg
+	/* Data cache clean by MVA */
+	mcr	p15, 0, \reg, c7, c10, 1
+	.endm
+
+	.macro write_dccsw reg
+	/* Data cache clean by set/way */
+	mcr	p15, 0, \reg, c7, c10, 2
+	.endm
+
+	.macro write_dccimvac reg
+	/* Data cache invalidate by MVA */
+	mcr	p15, 0, \reg, c7, c14, 1
+	.endm
+
+	.macro write_dccisw reg
+	/* Data cache clean and invalidate by set/way */
+	mcr	p15, 0, \reg, c7, c14, 2
+	.endm
+
+	.macro write_tlbiall
+	/* Invalidate entire unified TLB (register ignored) */
+	mcr	p15, 0, r0, c8, c7, 0
+	.endm
+
+	.macro write_tlbiallis
+	/* Invalidate entire unified TLB Inner Sharable (register ignored) */
+	mcr	p15, 0, r0, c8, c3, 0
+	.endm
+
+	.macro write_tlbiasidis reg
+	/* Invalidate unified TLB by ASID Inner Sharable */
+	mcr	p15, 0, \reg, c8, c3, 2
+	.endm
+
+	.macro write_tlbimvaais reg
+	/* Invalidate unified TLB by MVA all ASID Inner Sharable */
+	mcr	p15, 0, \reg, c8, c3, 3
+	.endm
+
+	.macro write_prrr reg
+	mcr	p15, 0, \reg, c10, c2, 0
+	.endm
+
+	.macro read_prrr reg
+	mrc	p15, 0, \reg, c10, c2, 0
+	.endm
+
+	.macro write_nmrr reg
+	mcr	p15, 0, \reg, c10, c2, 1
+	.endm
+
+	.macro read_nmrr reg
+	mrc	p15, 0, \reg, c10, c2, 1
+	.endm
+
+	.macro read_vbar reg
+	mrc	p15, 0, \reg, c12, c0, 0
+	.endm
+
+	.macro write_vbar reg
+	mcr	p15, 0, \reg, c12, c0, 0
+	.endm
+
+	.macro write_mvbar reg
+	mcr	p15, 0, \reg, c12, c0, 1
+	.endm
+
+	.macro read_mvbar reg
+	mrc	p15, 0, \reg, c12, c0, 1
+	.endm
+
+	.macro write_fcseidr reg
+	mcr	p15, 0, \reg, c13, c0, 0
+	.endm
+
+	.macro read_fcseidr reg
+	mrc	p15, 0, \reg, c13, c0, 0
+	.endm
+
+	.macro write_contextidr reg
+	mcr	p15, 0, \reg, c13, c0, 1
+	.endm
+
+	.macro read_contextidr reg
+	mrc	p15, 0, \reg, c13, c0, 1
+	.endm
+
+	.macro write_tpidruro reg
+	mcr	p15, 0, \reg, c13, c0, 3
+	.endm
+
+	.macro read_tpidruro reg
+	mrc	p15, 0, \reg, c13, c0, 3
+	.endm
+
+	.macro read_clidr reg
+	/* Cache Level ID Register */
+	mrc	p15, 1, \reg, c0, c0, 1
+	.endm
+
+	.macro read_ccsidr reg
+	/* Cache Size ID Registers */
+	mrc	p15, 1, \reg, c0, c0, 0
+	.endm
+
+	.macro write_csselr reg
+	/* Cache Size Selection Register */
+	mcr	p15, 2, \reg, c0, c0, 0
+	.endm
+
+	/* Cortex A9: pcr, diag registers */
+	.macro write_pcr reg
+       mcr  p15, 0, \reg, c15, c0, 0
+       .endm
+
+       .macro read_pcr reg
+       mrc  p15, 0, \reg, c15, c0, 0
+       .endm
+
+       .macro write_diag reg
+       mcr  p15, 0, \reg, c15, c0, 1
+       .endm
+
+       .macro read_diag reg
+       mrc  p15, 0, \reg, c15, c0, 1
+       .endm
diff --git a/arch/arm/include/asm/suspend.h b/arch/arm/include/asm/suspend.h
new file mode 100644
index 0000000000..ac7ba35753
--- /dev/null
+++ b/arch/arm/include/asm/suspend.h
@@ -0,0 +1,25 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef SUSPEND_H
+#define SUSPEND_H
+#include <common.h>
+#include <asm-generic/global_data.h>
+
+/* suspend/resume core functions */
+void cpu_suspend_save(struct pm_ctx *ptr, unsigned long sp);
+void cpu_do_suspend(unsigned long *ptr);
+
+void cpu_resume(void);
+void cpu_do_resume(void);
+
+/*
+ * Exported to platform suspend, arg will be passed to fn as r0
+ * Return value: 0  - cpu resumed from suspended state.
+ *               -1 - cpu not suspended.
+ */
+int cpu_suspend(unsigned long arg, int (*fn)(unsigned long));
+#endif
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index 944f58195c..dc2d6e8ce4 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -24,6 +24,13 @@
 #include <membuff.h>
 #include <linux/list.h>
 
+/* Never change the sequence of members !!! */
+struct pm_ctx {
+	unsigned long sp;
+	phys_addr_t cpu_resume_addr;
+	unsigned long suspend_regs[15];
+};
+
 typedef struct global_data {
 	bd_t *bd;
 	unsigned long flags;
@@ -114,6 +121,7 @@ typedef struct global_data {
 	struct bootstage_data *bootstage;	/* Bootstage information */
 	struct bootstage_data *new_bootstage;	/* Relocated bootstage info */
 #endif
+	phys_addr_t pm_ctx_phys;
 } gd_t;
 #endif
 
diff --git a/lib/asm-offsets.c b/lib/asm-offsets.c
index b04f7c6297..07b15497df 100644
--- a/lib/asm-offsets.c
+++ b/lib/asm-offsets.c
@@ -38,5 +38,8 @@ int main(void)
 
 	DEFINE(GD_START_ADDR_SP, offsetof(struct global_data, start_addr_sp));
 
+	DEFINE(PM_CTX_SIZE, sizeof(struct pm_ctx));
+	DEFINE(PM_CTX_PHYS, offsetof(struct global_data, pm_ctx_phys));
+
 	return 0;
 }

commit 6f00aaa2074b4c20dbde307e76d63acb3fc80c64
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Wed Nov 8 20:42:43 2017 +0800

    rockchip: blk: remove cache operation
    
    The underlying drivers should be responsible
    for the cache operation.
    
    Change-Id: Iff19807fc5f72295e721511081846e34291d7770
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/blk.c b/arch/arm/mach-rockchip/blk.c
index 2ffc8119a1..0396a83d23 100644
--- a/arch/arm/mach-rockchip/blk.c
+++ b/arch/arm/mach-rockchip/blk.c
@@ -29,13 +29,11 @@ struct mmc *mmcblk_dev_init(int dev)
 static int mmcblk_read(struct mmc *mmcdev, void *buffer, u32 blk, u32 cnt)
 {
 	u32 n;
-	ulong start = (ulong)buffer;
 
 	debug("\nMMC read: block # 0x%x, count 0x%x  to %p... ", blk, cnt, buffer);
 
 	n = blk_dread(mmc_get_blk_desc(mmcdev), blk, cnt, buffer);
-	/* invalidate cache after read via dma */
-	invalidate_dcache_range(start, start + cnt * 512);
+
 	debug("%d blocks read: %s\n", n, (n == cnt) ? "OK" : "ERROR");
 
 	return (n == cnt) ? 0 : -EIO;

commit 2b0c24e04f61a0b8667c3995f73c8b8ac2312876
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Wed Nov 8 17:30:59 2017 +0800

    rockchip: configs: enable ROCKCHIP_PARTITION_BOOT
    
    This enable bootrkp command to boot a system from
    rockchip format partition.
    
    Change-Id: Ia7a1bdaccafc85393cc5156e41d8f44d500af7b8
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/configs/evb-rk3126_defconfig b/configs/evb-rk3126_defconfig
index e8d78868d3..aa6320ddc6 100644
--- a/configs/evb-rk3126_defconfig
+++ b/configs/evb-rk3126_defconfig
@@ -4,6 +4,7 @@ CONFIG_ROCKCHIP_RK3128=y
 CONFIG_ROCKCHIP_BLOCK_API=y
 CONFIG_ROCKCHIP_PARAM=y
 CONFIG_ROCKCHIP_RESOURCE_IMAGE=y
+CONFIG_ROCKCHIP_PARTITION_BOOT=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3126-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y

commit efe731c26f1a0c08784d0e480be0b0b2c71eebf7
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Wed Nov 8 11:31:13 2017 +0800

    rockchip: boot mode: parse adc channel from dts
    
    Most the current rockchip based boards use adc channel
    1 detect the download key, but there ares also some
    boards like rk312x base plaform use adc channel2.
    So we parse the adc channel from dts if we can get
    it, otherwise we use the channel 1 as default.
    
    Change-Id: I2fccb7bf73db67100d7e800f87ac34ac651bba34
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index c43a924de1..c6ebdf2e01 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -9,6 +9,9 @@
 #include <asm/io.h>
 #include <asm/arch/boot_mode.h>
 #include <dm.h>
+#include <fdtdec.h>
+
+DECLARE_GLOBAL_DATA_PTR;
 
 void set_back_to_bootrom_dnl_flag(void)
 {
@@ -27,9 +30,19 @@ void set_back_to_bootrom_dnl_flag(void)
 
 __weak int rockchip_dnl_key_pressed(void)
 {
+	const void *blob = gd->fdt_blob;
 	unsigned int val;
+	int channel = 1;
+	int node;
+	u32 chns[2];
+
+	node = fdt_node_offset_by_compatible(blob, 0, "adc-keys");
+	if (node >= 0) {
+	       if (!fdtdec_get_int_array(blob, node, "io-channels", chns, 2))
+		       channel = chns[1];
+	}
 
-	if (adc_channel_single_shot("saradc", 1, &val)) {
+	if (adc_channel_single_shot("saradc", channel, &val)) {
 		printf("%s adc_channel_single_shot fail!\n", __func__);
 		return false;
 	}

commit 692bb812fbfd0d32048c9f5689cb876eb4154764
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Wed Oct 11 15:01:31 2017 +0800

    FROMLIST: rockchip: check download key before bootup
    
    Enter download mode if the download key pressed.
    
    Change-Id: I4827884e1b974bf42d5a38c138c827d079d5983f
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index e9fc42d9c5..c43a924de1 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -5,15 +5,56 @@
  */
 
 #include <common.h>
+#include <adc.h>
 #include <asm/io.h>
 #include <asm/arch/boot_mode.h>
 #include <dm.h>
 
+void set_back_to_bootrom_dnl_flag(void)
+{
+	writel(BOOT_BROM_DOWNLOAD, CONFIG_ROCKCHIP_BOOT_MODE_REG);
+}
+
+/*
+ * detect download key status by adc, most rockchip
+ * based boards use adc sample the download key status,
+ * but there are also some use gpio. So it's better to
+ * make this a weak function that can be override by
+ * some special boards.
+ */
+#define KEY_DOWN_MIN_VAL	0
+#define KEY_DOWN_MAX_VAL	30
+
+__weak int rockchip_dnl_key_pressed(void)
+{
+	unsigned int val;
+
+	if (adc_channel_single_shot("saradc", 1, &val)) {
+		printf("%s adc_channel_single_shot fail!\n", __func__);
+		return false;
+	}
+
+	if ((val >= KEY_DOWN_MIN_VAL) && (val <= KEY_DOWN_MAX_VAL))
+		return true;
+	else
+		return false;
+}
+
+void rockchip_dnl_mode_check(void)
+{
+	if (rockchip_dnl_key_pressed()) {
+		printf("download key pressed, entering download mode...");
+		set_back_to_bootrom_dnl_flag();
+		do_reset(NULL, 0, 0, NULL);
+	}
+}
+
 int setup_boot_mode(void)
 {
 	void *reg;
 	int boot_mode;
 
+	rockchip_dnl_mode_check();
 
 	if (of_machine_is_compatible("rockchip,rk3128"))
 		reg = (void *)0x100a0038;

commit 47a9f8fc78083662daba3035042874973bd67db3
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Wed Oct 11 15:00:49 2017 +0800

    FROMLIST: rockchip: add support for enter to bootrom download mode
    
    Rockchip bootrom will enter download mode if it returns from
    spl/tpl with a non-zero value and couldn't find a valid image
    in the backup partition.
    This patch provide a method to instruct the system to back to
    bootrom download mode by checking the BROM_DOWNLOAD_FLAG register.
    As the bootrom download function relys on some modules such as
    interrupts, so we need to back to bootrom as early as possbile
    before the tpl/spl code override the interrupt configurations.
    
    Change-Id: Ib07315127573f1cc38e158f69679ba4e27857cf2
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
    Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/boot_mode.h b/arch/arm/include/asm/arch-rockchip/boot_mode.h
index 163b2e7b04..6b2a610cf4 100644
--- a/arch/arm/include/asm/arch-rockchip/boot_mode.h
+++ b/arch/arm/include/asm/arch-rockchip/boot_mode.h
@@ -15,7 +15,11 @@
 #define BOOT_CHARGING		(REBOOT_FLAG + 11)
 /* enter usb mass storage mode */
 #define BOOT_UMS		(REBOOT_FLAG + 12)
+/* enter bootrom download mode */
+#define BOOT_BROM_DOWNLOAD	0xEF08A53C
 
+#ifndef __ASSEMBLY__
 int setup_boot_mode(void);
+#endif
 
 #endif
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 0f6bb7a5c4..db3ef48973 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -184,6 +184,7 @@ config ROCKCHIP_RK3399
 	select DEBUG_UART_BOARD_INIT
 	select GICV3
 	select BOARD_LATE_INIT
+	select ROCKCHIP_BROM_HELPER
 	help
 	  The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
 	  and quad-core Cortex-A53.
diff --git a/arch/arm/mach-rockchip/bootrom.c b/arch/arm/mach-rockchip/bootrom.c
index e369fdc25a..bef2a90d1f 100644
--- a/arch/arm/mach-rockchip/bootrom.c
+++ b/arch/arm/mach-rockchip/bootrom.c
@@ -6,6 +6,8 @@
 
 #include <common.h>
 #include <asm/arch/bootrom.h>
+#include <asm/arch/boot_mode.h>
+#include <asm/io.h>
 #include <asm/setjmp.h>
 #include <asm/system.h>
 
@@ -15,12 +17,45 @@
  */
 static jmp_buf brom_ctx __section(".data");
 
+static void _back_to_bootrom(enum rockchip_bootrom_cmd brom_cmd)
+{
+	longjmp(brom_ctx, brom_cmd);
+}
+
 void back_to_bootrom(enum rockchip_bootrom_cmd brom_cmd)
 {
 #if CONFIG_IS_ENABLED(LIBCOMMON_SUPPORT)
 	puts("Returning to boot ROM...\n");
 #endif
-	longjmp(brom_ctx, brom_cmd);
+	_back_to_bootrom(brom_cmd);
+}
+
+/*
+ * we back to bootrom download mode if get a
+ * BOOT_BROM_DOWNLOAD flag in boot mode register
+ *
+ * note: the boot mode register is configured by
+ * application(next stage bootloader, kernel, etc),
+ * and the bootrom never check this register, so we need
+ * to check it and back to bootrom at very early bootstage(before
+ * some basic configurations(such as interrupts) been
+ * changed by TPL/SPL, as the bootrom download operation
+ * relys on many default settings(such as interrupts) by
+ * it's self.
+ */
+static bool check_back_to_brom_dnl_flag(void)
+{
+	u32 boot_mode;
+
+	if (CONFIG_ROCKCHIP_BOOT_MODE_REG) {
+		boot_mode = readl(CONFIG_ROCKCHIP_BOOT_MODE_REG);
+		if (boot_mode == BOOT_BROM_DOWNLOAD) {
+			writel(0, CONFIG_ROCKCHIP_BOOT_MODE_REG);
+			return true;
+		}
+	}
+
+	return false;
 }
 
 /*
@@ -34,6 +69,8 @@ int save_boot_params(void)
 
 	switch (ret) {
 	case 0:
+		if (check_back_to_brom_dnl_flag())
+			_back_to_bootrom(BROM_BOOT_ENTER_DNL);
 		/*
 		 * This is the initial pass through this function
 		 * (i.e. saving the context), setjmp just setup up the
@@ -54,7 +91,13 @@ int save_boot_params(void)
 		 */
 		ret = 0;
 		break;
-
+	case BROM_BOOT_ENTER_DNL:
+		/*
+		 * A non-zero return value will instruct the BROM enter
+		 * download mode.
+		 */
+		ret = 1;
+		break;
 	default:
 #if CONFIG_IS_ENABLED(LIBCOMMON_SUPPORT)
 		puts("FATAL: unexpected command to back_to_bootrom()\n");

commit be55ced34eeedacc1031dd96a7603d20b1a58381
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Wed Oct 11 15:00:16 2017 +0800

    FROMLIST: rockchip: make boot_mode related codes reused across all platforms
    
    setup_boot_mode function use the same logic but different
    mode register address across all the rockchip platforms,
    so it's better to make this function reused across all the
    platforms, and let the mode register address setting from
    the config file.
    
    Also add support for rk312x soc which is a little
    special: the bootrom download flag is stored in
    a grf register but the other boot mode flags are
    stored in anohter pmugrf register.
    
    Change-Id: I2e6a0ba870626adb837975c08094250d47767dac
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>

diff --git a/arch/arm/include/asm/arch-rockchip/boot_mode.h b/arch/arm/include/asm/arch-rockchip/boot_mode.h
index bd65f60bf2..163b2e7b04 100644
--- a/arch/arm/include/asm/arch-rockchip/boot_mode.h
+++ b/arch/arm/include/asm/arch-rockchip/boot_mode.h
@@ -16,4 +16,6 @@
 /* enter usb mass storage mode */
 #define BOOT_UMS		(REBOOT_FLAG + 12)
 
+int setup_boot_mode(void);
+
 #endif
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 0c7ea79fae..0f6bb7a5c4 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -183,6 +183,7 @@ config ROCKCHIP_RK3399
 	select SPL_DRIVERS_MISC_SUPPORT
 	select DEBUG_UART_BOARD_INIT
 	select GICV3
+	select BOARD_LATE_INIT
 	help
 	  The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
 	  and quad-core Cortex-A53.
@@ -218,6 +219,21 @@ config TPL_ROCKCHIP_BACK_TO_BROM
           SPL will return to the boot rom, which will then load the U-Boot
           binary to keep going on.
 
+config ROCKCHIP_BOOT_MODE_REG
+	hex "Rockchip boot mode flag register address"
+	default 0x200081c8 if ROCKCHIP_RK3036
+	default 0x200081c8 if ROCKCHIP_RK3128
+	default 0x20004040 if ROCKCHIP_RK3188
+	default 0x110005c8 if ROCKCHIP_RK322X
+	default 0xff730094 if ROCKCHIP_RK3288
+	default 0xff738200 if ROCKCHIP_RK3368
+	default 0xff320300 if ROCKCHIP_RK3399
+	default 0x10300580 if ROCKCHIP_RV1108
+	default 0
+	help
+	  The Soc will enter to different boot mode(defined in asm/arch/boot_mode.h)
+	  according to the value from this register.
+
 config ROCKCHIP_SPL_RESERVE_IRAM
 	hex "Size of IRAM reserved in SPL"
 	default 0x4000
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 9b408ba674..ba38e97623 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -26,6 +26,11 @@ obj-spl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-spl.o spl-boot-order.o
 obj-spl-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board-spl.o spl-boot-order.o
 
 ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
+
+ifneq ($(CONFIG_ROCKCHIP_BOOT_MODE_REG),0)
+obj-y += boot_mode.o
+endif
+
 obj-$(CONFIG_ROCKCHIP_BLOCK_API) += blk.o
 obj-$(CONFIG_ROCKCHIP_VENDOR_PARTITION) += vendor.o
 obj-$(CONFIG_ROCKCHIP_PARAM) += rockchip_parameter.o
diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
new file mode 100644
index 0000000000..e9fc42d9c5
--- /dev/null
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -0,0 +1,46 @@
+/*
+ * (C) Copyright 2016 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/boot_mode.h>
+#include <dm.h>
+
+int setup_boot_mode(void)
+{
+	void *reg;
+	int boot_mode;
+
+
+	if (of_machine_is_compatible("rockchip,rk3128"))
+		reg = (void *)0x100a0038;
+	else
+		reg = (void *)CONFIG_ROCKCHIP_BOOT_MODE_REG;
+
+	boot_mode = readl(reg);
+
+	debug("boot mode %x.\n", boot_mode);
+
+	/* Clear boot mode */
+	writel(BOOT_NORMAL, reg);
+
+	switch (boot_mode) {
+	case BOOT_FASTBOOT:
+		printf("enter fastboot!\n");
+		env_set("preboot", "setenv preboot; fastboot usb0");
+		break;
+	case BOOT_UMS:
+		printf("enter UMS!\n");
+		env_set("preboot", "setenv preboot; ums mmc 0");
+		break;
+	case BOOT_LOADER:
+		printf("enter Rockusb!\n");
+		env_set("preboot", "setenv preboot; rockusb 0 mmc 0");
+		break;
+	}
+
+	return 0;
+}
diff --git a/arch/arm/mach-rockchip/rk3036-board.c b/arch/arm/mach-rockchip/rk3036-board.c
index 1f11f8e6af..a5d257168f 100644
--- a/arch/arm/mach-rockchip/rk3036-board.c
+++ b/arch/arm/mach-rockchip/rk3036-board.c
@@ -19,34 +19,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define GRF_BASE	0x20008000
-
-static void setup_boot_mode(void)
-{
-	struct rk3036_grf *const grf = (void *)GRF_BASE;
-	int boot_mode = readl(&grf->os_reg[4]);
-
-	debug("boot mode %x.\n", boot_mode);
-
-	/* Clear boot mode */
-	writel(BOOT_NORMAL, &grf->os_reg[4]);
-
-	switch (boot_mode) {
-	case BOOT_FASTBOOT:
-		printf("enter fastboot!\n");
-		env_set("preboot", "setenv preboot; fastboot usb0");
-		break;
-	case BOOT_UMS:
-		printf("enter UMS!\n");
-		env_set("preboot", "setenv preboot; ums mmc 0");
-		break;
-	case BOOT_LOADER:
-		printf("enter Rockusb!\n");
-		env_set("preboot", "setenv preboot; rockusb 0 mmc 0");
-		break;
-	}
-}
-
 __weak int rk_board_late_init(void)
 {
 	return 0;
diff --git a/arch/arm/mach-rockchip/rk3128-board.c b/arch/arm/mach-rockchip/rk3128-board.c
index 55ea7f1836..0e2af0b852 100644
--- a/arch/arm/mach-rockchip/rk3128-board.c
+++ b/arch/arm/mach-rockchip/rk3128-board.c
@@ -20,34 +20,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define PMU_BASE	0x100a0000
-
-static void setup_boot_mode(void)
-{
-	struct rk3128_pmu *const pmu = (void *)PMU_BASE;
-	int boot_mode = readl(&pmu->sys_reg[0]);
-
-	debug("boot mode %x.\n", boot_mode);
-
-	/* Clear boot mode */
-	writel(BOOT_NORMAL, &pmu->sys_reg[0]);
-
-	switch (boot_mode) {
-	case BOOT_FASTBOOT:
-		printf("enter fastboot!\n");
-		env_set("preboot", "setenv preboot; fastboot usb0");
-		break;
-	case BOOT_UMS:
-		printf("enter UMS!\n");
-		env_set("preboot", "setenv preboot; ums mmc 0");
-		break;
-	case BOOT_LOADER:
-		printf("enter Rockusb!\n");
-		env_set("preboot", "setenv preboot; rockusb 0 mmc 0");
-		break;
-	}
-}
-
 #ifdef CONFIG_CHARGE_DISPLAY
 static int charge_display(void)
 {
diff --git a/arch/arm/mach-rockchip/rk3188-board.c b/arch/arm/mach-rockchip/rk3188-board.c
index 622e046dc0..3d4aadebfe 100644
--- a/arch/arm/mach-rockchip/rk3188-board.c
+++ b/arch/arm/mach-rockchip/rk3188-board.c
@@ -24,6 +24,8 @@ int board_late_init(void)
 {
 	struct rk3188_grf *grf;
 
+	setup_boot_mode();
+
 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 	if (IS_ERR(grf)) {
 		error("grf syscon returned %ld\n", PTR_ERR(grf));
diff --git a/arch/arm/mach-rockchip/rk322x-board.c b/arch/arm/mach-rockchip/rk322x-board.c
index d97be336b6..1c931b03d7 100644
--- a/arch/arm/mach-rockchip/rk322x-board.c
+++ b/arch/arm/mach-rockchip/rk322x-board.c
@@ -16,34 +16,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define GRF_BASE	0x11000000
-
-static void setup_boot_mode(void)
-{
-	struct rk322x_grf *const grf = (void *)GRF_BASE;
-	int boot_mode = readl(&grf->os_reg[0]);
-
-	debug("boot mode %x.\n", boot_mode);
-
-	/* Clear boot mode */
-	writel(BOOT_NORMAL, &grf->os_reg[0]);
-
-	switch (boot_mode) {
-	case BOOT_FASTBOOT:
-		printf("enter fastboot!\n");
-		env_set("preboot", "setenv preboot; fastboot usb0");
-		break;
-	case BOOT_UMS:
-		printf("enter UMS!\n");
-		env_set("preboot", "setenv preboot; ums mmc 0");
-		break;
-	case BOOT_LOADER:
-		printf("enter Rockusb!\n");
-		env_set("preboot", "setenv preboot; rockusb 0 mmc 0");
-		break;
-	}
-}
-
 __weak int rk_board_late_init(void)
 {
 	return 0;
diff --git a/arch/arm/mach-rockchip/rk3288-board.c b/arch/arm/mach-rockchip/rk3288-board.c
index 9ec1d420a2..9e69ced931 100644
--- a/arch/arm/mach-rockchip/rk3288-board.c
+++ b/arch/arm/mach-rockchip/rk3288-board.c
@@ -24,35 +24,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define PMU_BASE	0xff730000
-
-static void setup_boot_mode(void)
-{
-	struct rk3288_pmu *const pmu = (void *)PMU_BASE;
-	int boot_mode = readl(&pmu->sys_reg[0]);
-
-	debug("boot mode %x.\n", boot_mode);
-
-	/* Clear boot mode */
-	writel(BOOT_NORMAL, &pmu->sys_reg[0]);
-
-	switch (boot_mode) {
-	case BOOT_FASTBOOT:
-		printf("enter fastboot!\n");
-		env_set("preboot", "setenv preboot; fastboot usb0");
-		break;
-	case BOOT_UMS:
-		printf("enter UMS!\n");
-		env_set("preboot", "setenv preboot; if mmc dev 0;"
-		       "then ums mmc 0; else ums mmc 1;fi");
-		break;
-	case BOOT_LOADER:
-		printf("enter Rockusb!\n");
-		env_set("preboot", "setenv preboot; rockusb 0 mmc 0");
-		break;
-	}
-}
-
 __weak int rk_board_late_init(void)
 {
 	return 0;
diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c
index ea449c8f5a..f2f2f75e32 100644
--- a/arch/arm/mach-rockchip/rk3399/rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
@@ -64,35 +64,6 @@ int arch_cpu_init(void)
 	return 0;
 }
 
-static void setup_boot_mode(void)
-{
-	struct rk3399_pmugrf_regs *pmugrf;
-	int boot_mode;
-
-	pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);;
-	boot_mode = readl(&pmugrf->os_reg0);
-	debug("boot mode %x\n", boot_mode);
-
-	/* Clear boot mode */
-	writel(BOOT_NORMAL, &pmugrf->os_reg0);
-
-	switch (boot_mode) {
-	case BOOT_FASTBOOT:
-		printf("enter fastboot!\n");
-		env_set("preboot", "setenv preboot; fastboot usb0");
-		break;
-	case BOOT_UMS:
-		printf("enter UMS!\n");
-		env_set("preboot", "setenv preboot; if mmc dev 0;"
-		       "then ums mmc 0; else ums mmc 1;fi");
-		break;
-	case BOOT_LOADER:
-		printf("enter Rockusb!\n");
-		env_set("preboot", "setenv preboot; rockusb 0 mmc 0");
-		break;
-	}
-}
-
 int board_late_init(void)
 {
 	setup_boot_mode();

commit 6053e13978f0bf4a68516b00e4f1652401aa7e25
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Oct 10 16:21:18 2017 +0200

    UPSTREAM: rockchip: mkimage: remove unused code-paths (spl_boot0 is now implied)
    
    With all targets converted to generate prepadded images, this removes
    the spl_boot0 field from our config structure and removes the unused
    code-path (for images that are not prepadded): i.e. spl_boot0 is now
    implied as 'true' and the code is specialised by removing the other
    case.
    
    Change-Id: Ib3d90539acb72e01c31a9da819ba8b46134bcb5e
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index e72111028f..cc16ec0b36 100644
--- a/tools/rkcommon.c
+++ b/tools/rkcommon.c
@@ -58,9 +58,6 @@ struct header1_info {
  * @spl_hdr:		Boot ROM requires a 4-bytes spl header
  * @spl_size:		Spl size(include extra 4-bytes spl header)
  * @spl_rc4:		RC4 encode the SPL binary (same key as header)
- * @spl_boot0:          A new-style (ARM_SOC_BOOT0_HOOK) image that should
- *                      have the boot magic (e.g. 'RK33') written to its first
- *                      word.
  */
 
 struct spl_info {
@@ -68,20 +65,19 @@ struct spl_info {
 	const char *spl_hdr;
 	const uint32_t spl_size;
 	const bool spl_rc4;
-	const bool spl_boot0;
 };
 
 static struct spl_info spl_infos[] = {
-	{ "rk3036", "RK30", 0x1000, false, true },
-	{ "rk3066", "RK30", 0x8000, true, false },
-	{ "rk3128", "RK31", 0x1800, false, true },
-	{ "rk3188", "RK31", 0x8000 - 0x800, true, true },
-	{ "rk322x", "RK32", 0x8000 - 0x1000, false, true },
-	{ "rk3288", "RK32", 0x8000, false, true },
-	{ "rk3328", "RK32", 0x8000 - 0x1000, false, true },
-	{ "rk3368", "RK33", 0x8000 - 0x1000, false, true },
-	{ "rk3399", "RK33", 0x30000 - 0x2000, false, true },
-	{ "rv1108", "RK11", 0x1800, false, true },
+	{ "rk3036", "RK30", 0x1000, false },
+	{ "rk3066", "RK30", 0x8000, true, },
+	{ "rk3128", "RK31", 0x1800, false },
+	{ "rk3188", "RK31", 0x8000 - 0x800, true },
+	{ "rk322x", "RK32", 0x8000 - 0x1000, false },
+	{ "rk3288", "RK32", 0x8000, false },
+	{ "rk3328", "RK32", 0x8000 - 0x1000, false },
+	{ "rk3368", "RK33", 0x8000 - 0x1000, false },
+	{ "rk3399", "RK33", 0x30000 - 0x2000, false },
+	{ "rv1108", "RK11", 0x1800, false },
 };
 
 static unsigned char rc4_key[16] = {
@@ -159,16 +155,6 @@ bool rkcommon_need_rc4_spl(struct image_tool_params *params)
 	return info->spl_rc4;
 }
 
-bool rkcommon_spl_is_boot0(struct image_tool_params *params)
-{
-	struct spl_info *info = rkcommon_get_spl_info(params->imagename);
-
-	/*
-	 * info would not be NULL, because of we checked params before.
-	 */
-	return info->spl_boot0;
-}
-
 static void rkcommon_set_header0(void *buf, uint file_size, uint max_size,
 				 struct image_tool_params *params)
 {
@@ -368,15 +354,12 @@ int rkcommon_vrec_header(struct image_tool_params *params,
 	 * have the first 4 bytes reserved for the spl_name).  Reserving
 	 * these 4 bytes is done using the BOOT0_HOOK infrastructure.
 	 *
-	 * Depending on this, the header is either 0x800 (if this is a
-	 * 'boot0'-style payload, which has reserved 4 bytes at the
-	 * beginning for the 'spl_name' and expects us to overwrite
-	 * its first 4 bytes) or 0x804 bytes in length.
+	 * The header is always at 0x800 (as we now use a payload
+	 * prepadded using the boot0 hook for all targets): the first
+	 * 4 bytes of these images can safely be overwritten using the
+	 * boot magic.
 	 */
-	if (rkcommon_spl_is_boot0(params))
-		tparams->header_size = RK_SPL_HDR_START;
-	else
-		tparams->header_size = RK_SPL_HDR_START + 4;
+	tparams->header_size = RK_SPL_HDR_START;
 
 	/* Allocate, clear and install the header */
 	tparams->hdr = malloc(tparams->header_size);
diff --git a/tools/rkcommon.h b/tools/rkcommon.h
index cd357c71d0..8fd147a4e0 100644
--- a/tools/rkcommon.h
+++ b/tools/rkcommon.h
@@ -44,14 +44,6 @@ const char *rkcommon_get_spl_hdr(struct image_tool_params *params);
  */
 int rkcommon_get_spl_size(struct image_tool_params *params);
 
-/**
- * rkcommon_spl_is_boot0() - is magic included in spl
- *
- * Returns true if magic (for example RK30) is included in spl
- */
-
-bool rkcommon_spl_is_boot0(struct image_tool_params *params);
-
 /**
  * rkcommon_set_header() - set up the header for a Rockchip boot image
  *
diff --git a/tools/rknand.c b/tools/rknand.c
index 690af2de4b..c93f053203 100644
--- a/tools/rknand.c
+++ b/tools/rknand.c
@@ -63,8 +63,7 @@ static void rknand_fill_ninfo(struct image_tool_params *params)
 	ninfo.tplsize = rknand_get_file_size(ninfo.tplfile);
 	ninfo.splsize = rknand_get_file_size(ninfo.splfile);
 
-	ninfo.tplpaddedsize = ROUND(ninfo.tplsize + 
-		(rkcommon_spl_is_boot0(params) ? 0 : 4), RKNAND_SECT_LEN);
+	ninfo.tplpaddedsize = ROUND(ninfo.tplsize, RKNAND_SECT_LEN);
 
 	ninfo.splpaddedsize = ROUND(ninfo.splsize, RKNAND_SECT_LEN);
 

commit 397403c7e477b32ce70ce32375dda21668f02d37
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Oct 10 16:21:17 2017 +0200

    UPSTREAM: rockchip: rk3188: move CONFIG_SPL_* entries from rk3188_common.h to Kconfig
    
    There still are a few CONFIG_SPL_* options selected using defines from
    rk3188_common.h instead of via Kconfig.  This migrates those over to
    Kconfig.
    
    Change-Id: Ib5190f8478a38613879a0182503ad1c720640384
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index ea58b24e05..0c7ea79fae 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -41,8 +41,13 @@ config ROCKCHIP_RK3188
 	select CPU_V7
 	select SPL_BOARD_INIT if SPL
 	select SUPPORT_SPL
-	select SUPPORT_TPL
 	select SPL
+	select SPL_CLK
+	select SPL_PINCTRL
+	select SPL_REGMAP
+	select SPL_SYSCON
+	select SPL_RAM
+	select SPL_DRIVERS_MISC_SUPPORT
 	select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
 	select BOARD_LATE_INIT
 	select ROCKCHIP_BROM_HELPER
diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h
index e8ce801984..b8f549cd9d 100644
--- a/include/configs/rk3188_common.h
+++ b/include/configs/rk3188_common.h
@@ -40,12 +40,6 @@
 /* spl size 32kb sram - 2kb bootrom */
 #define CONFIG_SPL_MAX_SIZE		(0x8000 - 0x800)
 #define CONFIG_SPL_FRAMEWORK		1
-#define CONFIG_SPL_CLK			1
-#define CONFIG_SPL_PINCTRL		1
-#define CONFIG_SPL_REGMAP		1
-#define CONFIG_SPL_SYSCON		1
-#define CONFIG_SPL_RAM			1
-#define CONFIG_SPL_DRIVERS_MISC_SUPPORT	1
 #define CONFIG_ROCKCHIP_SERIAL		1
 
 #define CONFIG_SPL_STACK		0x10087fff

commit 50b28820e7eddd833d282d14d49fe7024b2f9e3d
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Oct 10 16:21:16 2017 +0200

    UPSTREAM: rockchip: back-to-bootrom: allow passing a cmd to the bootrom
    
    The BROM supports forcing it to enter download-mode, if an appropriate
    result/cmd-word is returned to it.  There already is a series to
    support this in review, so this prepares the (newly C-version) of the
    back-to-bootrom code to accept a cmd to passed on to the BROM.
    
    All the existing call-sites are adjusted to match the changed function
    signature.
    
    Also sync the support to rk3036 / rk3228
    
    Change-Id: I1ea9bc12d6d84a75c043754b0eba7b8959e81d69
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: Andy Yan <andy.yan@rock-chips.com>
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/bootrom.h b/arch/arm/include/asm/arch-rockchip/bootrom.h
index 9b0f6ade04..21994a65ee 100644
--- a/arch/arm/include/asm/arch-rockchip/bootrom.h
+++ b/arch/arm/include/asm/arch-rockchip/bootrom.h
@@ -24,6 +24,9 @@ extern u32 SAVE_SP_ADDR;
  * download mode, ...).
  *
  * This function does not return.
+ *
+ * @brom_cmd: indicates how the bootrom should continue the boot
+ *            sequence (e.g. load the next stage)
  */
 enum rockchip_bootrom_cmd {
 	/*
@@ -35,5 +38,5 @@ enum rockchip_bootrom_cmd {
 	BROM_BOOT_ENTER_DNL,      /* have BROM enter download-mode */
 };
 
-void back_to_bootrom(void);
+void back_to_bootrom(enum rockchip_bootrom_cmd brom_cmd);
 #endif
diff --git a/arch/arm/mach-rockchip/bootrom.c b/arch/arm/mach-rockchip/bootrom.c
index 7b9b307a89..e369fdc25a 100644
--- a/arch/arm/mach-rockchip/bootrom.c
+++ b/arch/arm/mach-rockchip/bootrom.c
@@ -15,12 +15,12 @@
  */
 static jmp_buf brom_ctx __section(".data");
 
-void back_to_bootrom(void)
+void back_to_bootrom(enum rockchip_bootrom_cmd brom_cmd)
 {
 #if CONFIG_IS_ENABLED(LIBCOMMON_SUPPORT)
 	puts("Returning to boot ROM...\n");
 #endif
-	longjmp(brom_ctx, BROM_BOOT_NEXTSTAGE);
+	longjmp(brom_ctx, brom_cmd);
 }
 
 /*
diff --git a/arch/arm/mach-rockchip/rk3036-board-spl.c b/arch/arm/mach-rockchip/rk3036-board-spl.c
index 9458201bd3..550e3a1521 100644
--- a/arch/arm/mach-rockchip/rk3036-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3036-board-spl.c
@@ -40,7 +40,7 @@ void board_init_f(ulong dummy)
 	sdram_init();
 
 	/* return to maskrom */
-	back_to_bootrom();
+	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
 }
 
 /* Place Holders */
diff --git a/arch/arm/mach-rockchip/rk3066-board-tpl.c b/arch/arm/mach-rockchip/rk3066-board-tpl.c
index 5dcac90b52..03efe399e5 100644
--- a/arch/arm/mach-rockchip/rk3066-board-tpl.c
+++ b/arch/arm/mach-rockchip/rk3066-board-tpl.c
@@ -81,7 +81,7 @@ void board_init_f(ulong dummy)
 
 void board_return_to_bootrom(void)
 {
-	back_to_bootrom();
+	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
 }
 
 u32 spl_boot_device(void)
diff --git a/arch/arm/mach-rockchip/rk3188-board-spl.c b/arch/arm/mach-rockchip/rk3188-board-spl.c
index 05d4ae682f..8e3b8ae3ba 100644
--- a/arch/arm/mach-rockchip/rk3188-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3188-board-spl.c
@@ -158,7 +158,7 @@ void board_init_f(ulong dummy)
 
 	setup_arm_clock();
 #if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
-	back_to_bootrom();
+	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
 #endif
 }
 
@@ -219,7 +219,7 @@ void spl_board_init(void)
 
 	preloader_console_init();
 #if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
-	back_to_bootrom();
+	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
 #endif
 	return;
 
diff --git a/arch/arm/mach-rockchip/rk322x-board-tpl.c b/arch/arm/mach-rockchip/rk322x-board-tpl.c
index 5277dd6b9f..278e9d1d64 100644
--- a/arch/arm/mach-rockchip/rk322x-board-tpl.c
+++ b/arch/arm/mach-rockchip/rk322x-board-tpl.c
@@ -76,6 +76,6 @@ void board_init_f(ulong dummy)
 	/* Disable the ddr secure region setting to make it non-secure */
 	rk_clrreg(SGRF_DDR_CON0, 0x4000);
 #if defined(CONFIG_TPL_ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_TPL_BOARD_INIT)
-	back_to_bootrom();
+	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
 #endif
 }
diff --git a/arch/arm/mach-rockchip/rk3288-board-spl.c b/arch/arm/mach-rockchip/rk3288-board-spl.c
index 6b7bf85d8d..6fa4909872 100644
--- a/arch/arm/mach-rockchip/rk3288-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3288-board-spl.c
@@ -250,7 +250,7 @@ void board_init_f(ulong dummy)
 		return;
 	}
 #if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
-	back_to_bootrom();
+	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
 #endif
 }
 
@@ -317,7 +317,7 @@ void spl_board_init(void)
 
 	preloader_console_init();
 #if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
-	back_to_bootrom();
+	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
 #endif
 	return;
 err:
diff --git a/arch/arm/mach-rockchip/rk3328-board-tpl.c b/arch/arm/mach-rockchip/rk3328-board-tpl.c
index 1c74ff29ea..0b8a0e16e4 100644
--- a/arch/arm/mach-rockchip/rk3328-board-tpl.c
+++ b/arch/arm/mach-rockchip/rk3328-board-tpl.c
@@ -78,7 +78,7 @@ void board_debug_uart_init(void)
 
 void board_return_to_bootrom(void)
 {
-	back_to_bootrom();
+	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
 }
 
 u32 spl_boot_device(void)
diff --git a/arch/arm/mach-rockchip/rk3368-board-tpl.c b/arch/arm/mach-rockchip/rk3368-board-tpl.c
index b3e6ffa781..60d5aeade9 100644
--- a/arch/arm/mach-rockchip/rk3368-board-tpl.c
+++ b/arch/arm/mach-rockchip/rk3368-board-tpl.c
@@ -148,7 +148,7 @@ void board_init_f(ulong dummy)
 
 void board_return_to_bootrom(void)
 {
-	back_to_bootrom();
+	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
 }
 
 u32 spl_boot_device(void)
diff --git a/arch/arm/mach-rockchip/rk3399-board-spl.c b/arch/arm/mach-rockchip/rk3399-board-spl.c
index be3636f85b..cae09da0c6 100644
--- a/arch/arm/mach-rockchip/rk3399-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3399-board-spl.c
@@ -161,7 +161,7 @@ void spl_board_init(void)
 
 	preloader_console_init();
 #if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
-	back_to_bootrom();
+	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
 #endif
 
 	return;

commit 3513fb1ea591c4d64d1da3f20fbacd3043e27943
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Oct 10 16:21:14 2017 +0200

    UPSTREAM: rockchip: back-to-bootrom: replace assembly-implementation with C-code
    
    The back-to-bootrom implementation for Rockchip has always relied on
    the stack-pointer being valid on entry, so there was little reason to
    have this as an assembly implementation.
    
    This provides a new C-only implementation of save_boot_params and
    back_to_bootrom (relying on setjmp/longjmp) and removes the older
    assembly-only implementation.
    
    Change-Id: Ic20320dbbb71744386107686120475943442cdd7
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: Andy Yan <andy.yan@rock-chips.com>
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/bootrom.h b/arch/arm/include/asm/arch-rockchip/bootrom.h
index 92eb8783a3..9b0f6ade04 100644
--- a/arch/arm/include/asm/arch-rockchip/bootrom.h
+++ b/arch/arm/include/asm/arch-rockchip/bootrom.h
@@ -1,5 +1,6 @@
 /*
  * (C) Copyright 2017 Heiko Stuebner <heiko@sntech.de>
+ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
  *
  * SPDX-License-Identifier:	GPL-2.0
  */
@@ -14,14 +15,25 @@
 extern u32 SAVE_SP_ADDR;
 
 /**
- * Hand control back to the bootrom to load another
- * boot stage.
+ * back_to_bootrom() - return to bootrom (for TPL/SPL), passing a
+ *                     result code
+ *
+ * Transfer control back to the Rockchip BROM, restoring necessary
+ * register context and passing a command/result code to the BROM
+ * to instruct its next actions (e.g. continue boot sequence, enter
+ * download mode, ...).
+ *
+ * This function does not return.
  */
-void back_to_bootrom(void);
+enum rockchip_bootrom_cmd {
+	/*
+	* These can not start at 0, as 0 has a special meaning
+	* for setjmp().
+	*/
 
-/**
- * Assembler component for the above (do not call this directly)
- */
-void _back_to_bootrom_s(void);
+	BROM_BOOT_NEXTSTAGE = 1,  /* continue boot-sequence */
+	BROM_BOOT_ENTER_DNL,      /* have BROM enter download-mode */
+};
 
+void back_to_bootrom(void);
 #endif
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index ba1bbab017..9b408ba674 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -8,8 +8,8 @@
 # this may have entered from ATF with the stack-pointer pointing to
 # inaccessible/protected memory (and the bootrom-helper assumes that
 # the stack-pointer is valid before switching to the U-Boot stack).
-obj-spl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o save_boot_param.o
-obj-tpl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o save_boot_param.o
+obj-spl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o
+obj-tpl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o
 
 obj-tpl-$(CONFIG_ROCKCHIP_RK3066) += rk3066-board-tpl.o
 obj-tpl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-tpl.o
diff --git a/arch/arm/mach-rockchip/bootrom.c b/arch/arm/mach-rockchip/bootrom.c
index 8380e4e006..7b9b307a89 100644
--- a/arch/arm/mach-rockchip/bootrom.c
+++ b/arch/arm/mach-rockchip/bootrom.c
@@ -6,11 +6,61 @@
 
 #include <common.h>
 #include <asm/arch/bootrom.h>
+#include <asm/setjmp.h>
+#include <asm/system.h>
+
+/*
+ * Force the jmp_buf to the data-section, as .bss will not be valid
+ * when save_boot_params is invoked.
+ */
+static jmp_buf brom_ctx __section(".data");
 
 void back_to_bootrom(void)
 {
 #if CONFIG_IS_ENABLED(LIBCOMMON_SUPPORT)
 	puts("Returning to boot ROM...\n");
 #endif
-	_back_to_bootrom_s();
+	longjmp(brom_ctx, BROM_BOOT_NEXTSTAGE);
+}
+
+/*
+ * All Rockchip BROM implementations enter with a valid stack-pointer,
+ * so this can safely be implemented in C (providing a single
+ * implementation both for ARMv7 and AArch64).
+ */
+int save_boot_params(void)
+{
+	int  ret = setjmp(brom_ctx);
+
+	switch (ret) {
+	case 0:
+		/*
+		 * This is the initial pass through this function
+		 * (i.e. saving the context), setjmp just setup up the
+		 * brom_ctx: transfer back into the startup-code at
+		 * 'save_boot_params_ret' and let the compiler know
+		 * that this will not return.
+		 */
+		save_boot_params_ret();
+		while (true)
+			/* does not return */;
+		break;
+
+	case BROM_BOOT_NEXTSTAGE:
+		/*
+		 * To instruct the BROM to boot the next stage, we
+		 * need to return 0 to it: i.e. we need to rewrite
+		 * the return code once more.
+		 */
+		ret = 0;
+		break;
+
+	default:
+#if CONFIG_IS_ENABLED(LIBCOMMON_SUPPORT)
+		puts("FATAL: unexpected command to back_to_bootrom()\n");
+#endif
+		hang();
+	};
+
+	return ret;
 }
diff --git a/arch/arm/mach-rockchip/save_boot_param.S b/arch/arm/mach-rockchip/save_boot_param.S
deleted file mode 100644
index 50fce207a5..0000000000
--- a/arch/arm/mach-rockchip/save_boot_param.S
+++ /dev/null
@@ -1,69 +0,0 @@
-/*
- * (C) Copyright 2016 Rockchip Electronics Co., Ltd
- * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <linux/linkage.h>
-
-#if defined(CONFIG_ARM64)
-.globl	SAVE_SP_ADDR
-SAVE_SP_ADDR:
-	.quad 0
-
-ENTRY(save_boot_params)
-	sub	sp, sp, #0x60
-	stp	x29, x30, [sp, #0x50]
-	stp	x27, x28, [sp, #0x40]
-	stp	x25, x26, [sp, #0x30]
-	stp	x23, x24, [sp, #0x20]
-	stp	x21, x22, [sp, #0x10]
-	stp	x19, x20, [sp, #0]
-	ldr	x8, =SAVE_SP_ADDR
-	mov	x9, sp
-	str	x9, [x8]
-	b	save_boot_params_ret  /* back to my caller */
-ENDPROC(save_boot_params)
-
-.globl _back_to_bootrom_s
-ENTRY(_back_to_bootrom_s)
-	ldr	x0, =SAVE_SP_ADDR
-	ldr	x0, [x0]
-	mov	sp, x0
-	ldp	x29, x30, [sp, #0x50]
-	ldp	x27, x28, [sp, #0x40]
-	ldp	x25, x26, [sp, #0x30]
-	ldp	x23, x24, [sp, #0x20]
-	ldp	x21, x22, [sp, #0x10]
-	ldp	x19, x20, [sp]
-	add	sp, sp, #0x60
-	mov	x0, xzr
-	ret
-ENDPROC(_back_to_bootrom_s)
-#else
-.globl	SAVE_SP_ADDR
-SAVE_SP_ADDR:
-	.word 0
-
-/*
- * void save_boot_params
- *
- * Save sp, lr, r1~r12
- */
-ENTRY(save_boot_params)
-	push	{r1-r12, lr}
-	ldr	r0, =SAVE_SP_ADDR
-	str	sp, [r0]
-	b	save_boot_params_ret		@ back to my caller
-ENDPROC(save_boot_params)
-
-
-.globl _back_to_bootrom_s
-ENTRY(_back_to_bootrom_s)
-	ldr	r0, =SAVE_SP_ADDR
-	ldr	sp, [r0]
-	mov	r0, #0
-	pop	{r1-r12, pc}
-ENDPROC(_back_to_bootrom_s)
-#endif

commit 885cc66f31834683d956a7c82e6e6d783a363d00
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Oct 10 16:21:15 2017 +0200

    UPSTREAM: rockchip: rk3188: use boot0 hook to load up SPL in 2 steps
    
    For the RK3188, the BROM will attempt to load up the first stage
    image (SPL for the RK3188) in two steps: first 1KB to offset 0x800
    in the SRAM and then the remainder to offset 0xc00 in the SRAM.
    It always enters at 0x804, though.
    
    With this changeset, the RK3188 boot removes the TPL (stub) stage and
    builds a single SPL binary that utilizes the early back-to-bootrom via
    the boot0-hook.
    
    Consequently, the passing of the saved boot params via pmu->os_reg[2]
    is also removed.
    
    Change-Id: I1ced867bbf232db323cf7be95cc6653bc3b50ea6
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 3a4e788342..ea58b24e05 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -43,7 +43,7 @@ config ROCKCHIP_RK3188
 	select SUPPORT_SPL
 	select SUPPORT_TPL
 	select SPL
-	select TPL
+	select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
 	select BOARD_LATE_INIT
 	select ROCKCHIP_BROM_HELPER
 	help
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 814b641506..ba1bbab017 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -12,7 +12,6 @@ obj-spl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o save_boot_param.o
 obj-tpl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o save_boot_param.o
 
 obj-tpl-$(CONFIG_ROCKCHIP_RK3066) += rk3066-board-tpl.o
-obj-tpl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-tpl.o
 obj-tpl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-tpl.o
 obj-tpl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-tpl.o
 obj-tpl-$(CONFIG_ROCKCHIP_RK3328) += rk3328-board-tpl.o
diff --git a/arch/arm/mach-rockchip/rk3188-board-spl.c b/arch/arm/mach-rockchip/rk3188-board-spl.c
index d3866bf029..05d4ae682f 100644
--- a/arch/arm/mach-rockchip/rk3188-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3188-board-spl.c
@@ -101,7 +101,6 @@ static int setup_arm_clock(void)
 void board_init_f(ulong dummy)
 {
 	struct udevice *pinctrl, *dev;
-	struct rk3188_pmu *pmu;
 	int ret;
 
 	/* Example code showing how to enable the debug UART on RK3188 */
@@ -145,15 +144,6 @@ void board_init_f(ulong dummy)
 		return;
 	}
 
-	/*
-	 * Recover the bootrom's stackpointer.
-	 * For whatever reason needs to run after rockchip_get_clk.
-	 */
-	pmu = syscon_get_first_range(ROCKCHIP_SYSCON_PMU);
-	if (IS_ERR(pmu))
-		error("pmu syscon returned %ld\n", PTR_ERR(pmu));
-	SAVE_SP_ADDR = readl(&pmu->sys_reg[2]);
-
 	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
 	if (ret) {
 		debug("Pinctrl init failed: %d\n", ret);
diff --git a/arch/arm/mach-rockchip/rk3188-board-tpl.c b/arch/arm/mach-rockchip/rk3188-board-tpl.c
deleted file mode 100644
index b458ef6ea8..0000000000
--- a/arch/arm/mach-rockchip/rk3188-board-tpl.c
+++ /dev/null
@@ -1,86 +0,0 @@
-/*
- * (C) Copyright 2015 Google, Inc
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <debug_uart.h>
-#include <spl.h>
-#include <asm/io.h>
-#include <asm/arch/bootrom.h>
-#include <asm/arch/pmu_rk3188.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/* track how often we were entered */
-static int rk3188_num_entries __attribute__ ((section(".data")));
-
-#define PMU_BASE	0x20004000
-#define SPL_ENTRY	0x10080C00
-
-static void jump_to_spl(void)
-{
-	typedef void __noreturn (*image_entry_noargs_t)(void);
-
-	struct rk3188_pmu * const pmu = (void *)PMU_BASE;
-	image_entry_noargs_t tpl_entry =
-		(image_entry_noargs_t)(unsigned long)SPL_ENTRY;
-
-	/* Store the SAVE_SP_ADDR in a location shared with SPL. */
-	writel(SAVE_SP_ADDR, &pmu->sys_reg[2]);
-	tpl_entry();
-}
-
-void board_init_f(ulong dummy)
-{
-	/* Example code showing how to enable the debug UART on RK3188 */
-#ifdef EARLY_UART
-#include <asm/arch/grf_rk3188.h>
-	/* Enable early UART on the RK3188 */
-#define GRF_BASE	0x20008000
-	struct rk3188_grf * const grf = (void *)GRF_BASE;
-
-	rk_clrsetreg(&grf->gpio1b_iomux,
-		     GPIO1B1_MASK << GPIO1B1_SHIFT |
-		     GPIO1B0_MASK << GPIO1B0_SHIFT,
-		     GPIO1B1_UART2_SOUT << GPIO1B1_SHIFT |
-		     GPIO1B0_UART2_SIN << GPIO1B0_SHIFT);
-	/*
-	 * Debug UART can be used from here if required:
-	 *
-	 * debug_uart_init();
-	 * printch('a');
-	 * printhex8(0x1234);
-	 * printascii("string");
-	 */
-	debug_uart_init();
-
-	printch('t');
-	printch('p');
-	printch('l');
-	printch('-');
-	printch(rk3188_num_entries + 1 + '0');
-	printch('\n');
-#endif
-
-	rk3188_num_entries++;
-
-	if (rk3188_num_entries == 1) {
-		/*
-		 * The original loader did some very basic integrity
-		 * checking at this point, but the remaining few bytes
-		 * could be used for any improvement making sense
-		 * really early on.
-		 */
-
-		back_to_bootrom();
-	} else {
-		/*
-		 * TPL part of the loader should now wait for us
-		 * at offset 0xC00 in the sram. Should never return
-		 * from there.
-		 */
-		jump_to_spl();
-	}
-}
diff --git a/doc/README.rockchip b/doc/README.rockchip
index 07cc727e98..2fc6ed0200 100644
--- a/doc/README.rockchip
+++ b/doc/README.rockchip
@@ -158,17 +158,17 @@ described above, but the image creation needs a bit more care.
 
 The bootrom of rk3188 expects to find a small 1kb loader which returns
 control to the bootrom, after which it will load the real loader, which
-can then be up to 29kb in size and does the regular ddr init.
+can then be up to 29kb in size and does the regular ddr init.  This is
+handled by a single image (built as the SPL stage) that tests whether
+it is handled for the first or second time via code executed from the
+boot0-hook.
 
 Additionally the rk3188 requires everything the bootrom loads to be
 rc4-encrypted. Except for the very first stage the bootrom always reads
 and decodes 2kb pages, so files should be sized accordingly.
 
 # copy tpl, pad to 1020 bytes and append spl
-cat tpl/u-boot-tpl.bin > tplspl.bin
-truncate -s 1020 tplspl.bin
-cat spl/u-boot-spl.bin >> tplspl.bin
-tools/mkimage -n rk3188 -T rksd -d tplspl.bin out
+tools/mkimage -n rk3188 -T rksd -d spl/u-boot-spl.bin out
 
 # truncate, encode and append u-boot.bin
 truncate -s %2048 u-boot.bin
diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h
index 7bd67e9ef5..e8ce801984 100644
--- a/include/configs/rk3188_common.h
+++ b/include/configs/rk3188_common.h
@@ -36,14 +36,9 @@
 #define CONFIG_ROCKCHIP_MAX_INIT_SIZE	(0x8000 - 0x800)
 #define CONFIG_ROCKCHIP_CHIP_TAG	"RK31"
 
-#ifdef CONFIG_TPL_BUILD
-#define CONFIG_SPL_TEXT_BASE		0x10080804
-/* tpl size 1kb - 4byte RK31 header */
-#define CONFIG_SPL_MAX_SIZE		(0x400 - 0x4)
-#elif defined(CONFIG_SPL_BUILD)
-/* spl size 32kb sram - 2kb bootrom - 1kb spl */
-#define CONFIG_SPL_MAX_SIZE		(0x8000 - 0xC00)
-#define CONFIG_SPL_TEXT_BASE		0x10080C00
+#define CONFIG_SPL_TEXT_BASE		0x10080800
+/* spl size 32kb sram - 2kb bootrom */
+#define CONFIG_SPL_MAX_SIZE		(0x8000 - 0x800)
 #define CONFIG_SPL_FRAMEWORK		1
 #define CONFIG_SPL_CLK			1
 #define CONFIG_SPL_PINCTRL		1
@@ -52,7 +47,6 @@
 #define CONFIG_SPL_RAM			1
 #define CONFIG_SPL_DRIVERS_MISC_SUPPORT	1
 #define CONFIG_ROCKCHIP_SERIAL		1
-#endif
 
 #define CONFIG_SPL_STACK		0x10087fff
 

commit c1da286a086ecbd7b2ee6837047dcc5707cf985f
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Oct 10 16:21:13 2017 +0200

    UPSTREAM: arm: provide a PCS-compliant setjmp implementation
    
    The previous setjmp-implementation (as a static inline function that
    contained an 'asm volatile' sequence) was extremely fragile: (some
    versions of) GCC optimised the set of registers.  One critical example
    was the removal of 'r9' from the clobber list, if -ffixed-reg9 was
    supplied.
    
    To increase robustness and ensure PCS-compliant behaviour, the setjmp
    and longjmp implementation are now in assembly and closely match what
    one would expect to find in a libc implementation.
    
    Change-Id: I9403d28218f03cdf84b1e8cbd4d3d4eef790e9b9
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: Andy Yan <andy.yan@rock-chips.com>
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/include/asm/setjmp.h b/arch/arm/include/asm/setjmp.h
index c3399a7e15..517beebdea 100644
--- a/arch/arm/include/asm/setjmp.h
+++ b/arch/arm/include/asm/setjmp.h
@@ -1,6 +1,6 @@
 /*
- * (C) Copyright 2016
- * Alexander Graf <agraf@suse.de>
+ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
+ * (C) Copyright 2016 Alexander Graf <agraf@suse.de>
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
@@ -8,89 +8,21 @@
 #ifndef _SETJMP_H_
 #define _SETJMP_H_	1
 
+/*
+ * This really should be opaque, but the EFI implementation wrongly
+ * assumes that a 'struct jmp_buf_data' is defined.
+ */
 struct jmp_buf_data {
-	ulong target;
-	ulong regs[5];
-	int ret;
-};
-
-typedef struct jmp_buf_data jmp_buf[1];
-
-static inline int setjmp(jmp_buf jmp)
-{
-	jmp->ret = 0;
-
-#ifdef CONFIG_ARM64
-	asm volatile(
-		"adr x1, jmp_target\n"
-		"str x1, %0\n"
-		"stp x26, x27, %1\n"
-		"stp x28, x29, %2\n"
-		"mov x1, sp\n"
-		"str x1, %3\n"
-		"jmp_target: "
-		: "=m" (jmp->target), "=m" (jmp->regs[0]),
-		  "=m" (jmp->regs[2]), "=m" (jmp->regs[4])
-		:
-		: "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7",
-		  "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15",
-		  "x16", "x17", "x18", "x19", "x20", "x21", "x22",
-		  "x23", "x24", "x25", /* x26, x27, x28, x29, sp */
-		  "x30", "cc", "memory");
-#else
-	asm volatile(
-#if CONFIG_IS_ENABLED(SYS_THUMB_BUILD)
-		".align 2\n"
-		"adr r0, jmp_target\n"
-		"add r0, r0, $1\n"
+#if defined(__aarch64__)
+	u64  regs[13];
 #else
-		"adr r0, jmp_target\n"
-#endif
-		"mov r1, %0\n"
-		"mov r2, sp\n"
-		"stm r1!, {r0, r2, r4, r5, r6, r7}\n"
-		".align 2\n"
-		"jmp_target: \n"
-		:
-		: "l" (&jmp->target)
-		: "r0", "r1", "r2", "r3", /* "r4", "r5", "r6", "r7", */
-		  "r8", "r9", "r10", "r11", /* sp, */ "ip", "lr",
-		  "cc", "memory");
-#endif
-
-	return jmp->ret;
-}
-
-static inline __noreturn void longjmp(jmp_buf jmp, int ret)
-{
-	jmp->ret = ret;
-
-#ifdef CONFIG_ARM64
-	asm volatile(
-		"ldr x0, %0\n"
-		"ldr x1, %3\n"
-		"mov sp, x1\n"
-		"ldp x26, x27, %1\n"
-		"ldp x28, x25, %2\n"
-		"mov x29, x25\n"
-		"br x0\n"
-		:
-		: "m" (jmp->target), "m" (jmp->regs[0]), "m" (jmp->regs[2]),
-		  "m" (jmp->regs[4])
-		: "x0", "x1", "x25", "x26", "x27", "x28");
-#else
-	asm volatile(
-		"mov r1, %0\n"
-		"ldm r1!, {r0, r2, r4, r5, r6, r7}\n"
-		"mov sp, r2\n"
-		"bx r0\n"
-		:
-		: "l" (&jmp->target)
-		: "r1");
+	u32  regs[10];  /* r4-r9, sl, fp, sp, lr */
 #endif
+};
 
-	while (1) { }
-}
+typedef struct jmp_buf_data jmp_buf[1];
 
+int setjmp(jmp_buf jmp);
+void longjmp(jmp_buf jmp, int ret);
 
 #endif /* _SETJMP_H_ */
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 6e1c436933..abffa10c85 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -17,6 +17,12 @@ else
 obj-y	+= vectors.o crt0.o
 endif
 
+ifdef CONFIG_ARM64
+obj-y   += setjmp_aarch64.o
+else
+obj-y   += setjmp.o
+endif
+
 ifndef CONFIG_SPL_BUILD
 ifdef CONFIG_ARM64
 obj-y	+= relocate_64.o
diff --git a/arch/arm/lib/setjmp.S b/arch/arm/lib/setjmp.S
new file mode 100644
index 0000000000..6746e5e2cc
--- /dev/null
+++ b/arch/arm/lib/setjmp.S
@@ -0,0 +1,37 @@
+/*
+ * (C) 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <config.h>
+#include <asm/assembler.h>
+#include <linux/linkage.h>
+
+.pushsection .text.setjmp, "ax"
+ENTRY(setjmp)
+	/*
+	 * A subroutine must preserve the contents of the registers
+	 * r4-r8, r10, r11 (v1-v5, v7 and v8) and SP (and r9 in PCS
+	 * variants that designate r9 as v6).
+	 */
+	mov  ip, sp
+	stm  a1, {v1-v8, ip, lr}
+	mov  a1, #0
+	bx   lr
+ENDPROC(setjmp)
+.popsection
+
+.pushsection .text.longjmp, "ax"
+ENTRY(longjmp)
+	ldm  a1, {v1-v8, ip, lr}
+	mov  sp, ip
+	mov  a1, a2
+	/* If we were passed a return value of zero, return one instead */
+	cmp  a1, #0
+	bne  1f
+	mov  a1, #1
+1:
+	bx   lr
+ENDPROC(longjmp)
+.popsection
diff --git a/arch/arm/lib/setjmp_aarch64.S b/arch/arm/lib/setjmp_aarch64.S
new file mode 100644
index 0000000000..b68edb86d6
--- /dev/null
+++ b/arch/arm/lib/setjmp_aarch64.S
@@ -0,0 +1,42 @@
+/*
+ * (C) 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <config.h>
+#include <asm/macro.h>
+#include <linux/linkage.h>
+
+.pushsection .text.setjmp, "ax"
+ENTRY(setjmp)
+	/* Preserve all callee-saved registers and the SP */
+	stp  x19, x20, [x0,#0]
+	stp  x21, x22, [x0,#16]
+	stp  x23, x24, [x0,#32]
+	stp  x25, x26, [x0,#48]
+	stp  x27, x28, [x0,#64]
+	stp  x29, x30, [x0,#80]
+	mov  x2, sp
+	str  x2, [x0, #96]
+	mov  x0, #0
+	ret
+ENDPROC(setjmp)
+.popsection
+
+.pushsection .text.longjmp, "ax"
+ENTRY(longjmp)
+	ldp  x19, x20, [x0,#0]
+	ldp  x21, x22, [x0,#16]
+	ldp  x23, x24, [x0,#32]
+	ldp  x25, x26, [x0,#48]
+	ldp  x27, x28, [x0,#64]
+	ldp  x29, x30, [x0,#80]
+	ldr  x2, [x0,#96]
+	mov  sp, x2
+	/* Move the return value in place, but return 1 if passed 0. */
+	adds x0, xzr, x1
+	csinc x0, x0, xzr, ne
+	ret
+ENDPROC(longjmp)
+.popsection

commit b04bb64b8ff963f472e54a2b0aae7f26be17eca2
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Oct 10 16:21:12 2017 +0200

    UPSTREAM: arm: mark save_boot_params_ret as a function
    
    As no '.type' was set for save_boot_params_ret in start.S, binutils
    did not track whether it was emitted as A32 or T32.  By properly
    marking save_boot_params_ret as a potential function entry, we can
    make sure that the compiler will insert the appropriate instructions
    for branching to save_boot_params_ret both for call-sites emitted as
    A32 and T32.
    
    Change-Id: I51807d61cd8655853f672ab0baeae641b16a0493
    Reported-by: Andy Yan <andy.yan@rock-chips.com>
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: Andy Yan <andy.yan@rock-chips.com>
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 7b84a7a0f1..95a0b5224b 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -31,6 +31,7 @@
 
 	.globl	reset
 	.globl	save_boot_params_ret
+	.type   save_boot_params_ret,%function
 #ifdef CONFIG_ARMV7_LPAE
 	.global	switch_to_hypervisor_ret
 #endif

commit b13b818cb6b4665022ac998f2a6a292708690a34
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Oct 10 16:21:11 2017 +0200

    UPSTREAM: arm: make save_boot_params_ret prototype visible for AArch64
    
    The save_boot_params_ret() prototype (for those of us, that have a
    valid SP on entry and can implement save_boot_params() in C), was
    previously only defined for !defined(CONFIG_ARM64).
    
    This moves the declaration to a common block to ensure the prototype
    is available to everyone that might need it.
    
    Change-Id: Ic4c217ba9a3e6ded2106c75fec315351c925d639
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: Andy Yan <andy.yan@rock-chips.com>
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index 79bd19af7d..e2af2969e0 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -332,37 +332,6 @@ void psci_arch_init(void);
 
 #ifndef __ASSEMBLY__
 
-/**
- * save_boot_params() - Save boot parameters before starting reset sequence
- *
- * If you provide this function it will be called immediately U-Boot starts,
- * both for SPL and U-Boot proper.
- *
- * All registers are unchanged from U-Boot entry. No registers need be
- * preserved.
- *
- * This is not a normal C function. There is no stack. Return by branching to
- * save_boot_params_ret.
- *
- * void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3);
- */
-
-/**
- * save_boot_params_ret() - Return from save_boot_params()
- *
- * If you provide save_boot_params(), then you should jump back to this
- * function when done. Try to preserve all registers.
- *
- * If your implementation of save_boot_params() is in C then it is acceptable
- * to simply call save_boot_params_ret() at the end of your function. Since
- * there is no link register set up, you cannot just exit the function. U-Boot
- * will return to the (initialised) value of lr, and likely crash/hang.
- *
- * If your implementation of save_boot_params() is in assembler then you
- * should use 'b' or 'bx' to return to save_boot_params_ret.
- */
-void save_boot_params_ret(void);
-
 #ifdef CONFIG_ARMV7_LPAE
 void switch_to_hypervisor_ret(void);
 #endif
@@ -555,6 +524,37 @@ void mmu_page_table_flush(unsigned long start, unsigned long stop);
 #endif /* CONFIG_ARM64 */
 
 #ifndef __ASSEMBLY__
+/**
+ * save_boot_params() - Save boot parameters before starting reset sequence
+ *
+ * If you provide this function it will be called immediately U-Boot starts,
+ * both for SPL and U-Boot proper.
+ *
+ * All registers are unchanged from U-Boot entry. No registers need be
+ * preserved.
+ *
+ * This is not a normal C function. There is no stack. Return by branching to
+ * save_boot_params_ret.
+ *
+ * void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3);
+ */
+
+/**
+ * save_boot_params_ret() - Return from save_boot_params()
+ *
+ * If you provide save_boot_params(), then you should jump back to this
+ * function when done. Try to preserve all registers.
+ *
+ * If your implementation of save_boot_params() is in C then it is acceptable
+ * to simply call save_boot_params_ret() at the end of your function. Since
+ * there is no link register set up, you cannot just exit the function. U-Boot
+ * will return to the (initialised) value of lr, and likely crash/hang.
+ *
+ * If your implementation of save_boot_params() is in assembler then you
+ * should use 'b' or 'bx' to return to save_boot_params_ret.
+ */
+void save_boot_params_ret(void);
+
 /**
  * Change the cache settings for a region.
  *

commit dff737c455661368aa97eb8d242ddb80da34e081
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Oct 10 16:21:10 2017 +0200

    UPSTREAM: rockchip: boot0 hook: support early return for RK3188/RK3066-style BROM
    
    Some Rockchip BROM versions (e.g. the RK3188 and RK3066) first read 1KB data
    from NAND into SRAM and executes it. Then, following a return to bootrom, the
    BROM loads additional code to SRAM (not overwriting the first block read) and
    reenters at the same address as the first time.
    
    To support booting either a TPL (on the RK3066) or SPL (on the RK3188) using
    this model of having to count entries, this commit adds code to the boot0
    hook to track the number of entries and handle them accordingly.
    
    Change-Id: Ib7c0e9fc517ff7c040ba948ea4a570538d623760
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
    Tested-by: Andy Yan <andy.yan@rock-chips.com>
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/boot0.h b/arch/arm/include/asm/arch-rockchip/boot0.h
index f7c614669c..af3a733e98 100644
--- a/arch/arm/include/asm/arch-rockchip/boot0.h
+++ b/arch/arm/include/asm/arch-rockchip/boot0.h
@@ -19,12 +19,25 @@
 	 * beginning of the executable.	 However, as we want to keep
 	 * this generic and make it applicable to builds that are like
 	 * the RK3368 (TPL needs this, SPL doesn't) or the RK3399 (no
-	 * TPL, but extra space needed in the SPL), we simply repeat
-	 * the 'b reset' with the expectation that the first one will
-	 * be overwritten, if this is the first stage contained in the
-	 * final image created with mkimage)...
+	 * TPL, but extra space needed in the SPL), we simply insert
+	 * a branch-to-next-instruction-word with the expectation that
+	 * the first one may be overwritten, if this is the first stage
+	 * contained in the final image created with mkimage)...
 	 */
-	b reset	 /* may be overwritten --- should be 'nop' or a 'b reset' */
+	b 1f	 /* if overwritten, entry-address is at the next word */
+1:
+#endif
+#if CONFIG_IS_ENABLED(ROCKCHIP_EARLYRETURN_TO_BROM)
+	adr     r3, entry_counter
+	ldr	r0, [r3]
+	cmp	r0, #1           /* check if entry_counter == 1 */
+	beq	reset            /* regular bootup */
+	add     r0, #1
+	str	r0, [r3]         /* increment the entry_counter in memory */
+	mov     r0, #0           /* return 0 to the BROM to signal 'OK' */
+	bx	lr               /* return control to the BROM */
+entry_counter:
+	.word   0
 #endif
 	b reset
 #if !defined(CONFIG_ARM64)
@@ -32,7 +45,7 @@
 	 * For armv7, the addr '_start' will used as vector start address
 	 * and write to VBAR register, which needs to aligned to 0x20.
 	 */
-	.align(5)
+	.align(5), 0x0
 _start:
 	ARM_VECTORS
 #endif
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 34d1606d3b..3a4e788342 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -224,6 +224,34 @@ config ROCKCHIP_SPL_RESERVE_IRAM
 config ROCKCHIP_BROM_HELPER
 	bool
 
+config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
+        bool "SPL requires early-return (for RK3188-style BROM) to BROM"
+	depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
+	help
+	  Some Rockchip BROM variants (e.g. on the RK3188) load the
+	  first stage in segments and enter multiple times. E.g. on
+	  the RK3188, the first 1KB of the first stage are loaded
+	  first and entered; after returning to the BROM, the
+	  remainder of the first stage is loaded, but the BROM
+	  re-enters at the same address/to the same code as previously.
+
+	  This enables support code in the BOOT0 hook for the SPL stage
+	  to allow multiple entries.
+
+config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
+        bool "TPL requires early-return (for RK3188-style BROM) to BROM"
+	depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
+	help
+	  Some Rockchip BROM variants (e.g. on the RK3188) load the
+	  first stage in segments and enter multiple times. E.g. on
+	  the RK3188, the first 1KB of the first stage are loaded
+	  first and entered; after returning to the BROM, the
+	  remainder of the first stage is loaded, but the BROM
+	  re-enters at the same address/to the same code as previously.
+
+	  This enables support code in the BOOT0 hook for the TPL stage
+	  to allow multiple entries.
+
 config SPL_MMC_SUPPORT
 	default y if !SPL_ROCKCHIP_BACK_TO_BROM
 

commit d2d9d8243e00415d3726b95b9d2d136849fd908d
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Oct 10 16:21:09 2017 +0200

    UPSTREAM: bcm281xx: boot0 hook: adjust to unified boot0 semantics
    
    This updates the BCM281xx boot0-hook to the updated boot0 semantics
    by emitting _start and the vector table before the boot0 hook (as
    was the case before).
    
    Change-Id: Ia176a1b26c2275500855e699010ed73443c7b251
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-bcm281xx/boot0.h b/arch/arm/include/asm/arch-bcm281xx/boot0.h
index a747bd3823..28f05ba32d 100644
--- a/arch/arm/include/asm/arch-bcm281xx/boot0.h
+++ b/arch/arm/include/asm/arch-bcm281xx/boot0.h
@@ -5,5 +5,7 @@
  */
 
 /* BOOT0 header information */
+_start:
+	ARM_VECTORS
 	.word	0xbabeface
 	.word	_end - _start

commit 05b25c8bf30a77beb555abb8f65e78bd2f21b5de
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Oct 10 16:21:08 2017 +0200

    UPSTREAM: bcm235xx: boot0 hook: adjust to unified boot0 semantics
    
    This updates the BCM235xx boot0-hook to the updated boot0 semantics
    by emitting _start and the vector table before the boot0 hook (as
    was the case before).
    
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    
    Version-changes: 5
    - ran 'whitespace-cleanup'
    
    Change-Id: I415c48016ce1aa5592a180f16f6f4d83227e9d38
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-bcm235xx/boot0.h b/arch/arm/include/asm/arch-bcm235xx/boot0.h
index a747bd3823..28f05ba32d 100644
--- a/arch/arm/include/asm/arch-bcm235xx/boot0.h
+++ b/arch/arm/include/asm/arch-bcm235xx/boot0.h
@@ -5,5 +5,7 @@
  */
 
 /* BOOT0 header information */
+_start:
+	ARM_VECTORS
 	.word	0xbabeface
 	.word	_end - _start

commit c0f2ab29ad948eb70cf9983b447944e95765329b
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Oct 10 16:21:07 2017 +0200

    UPSTREAM: socfpga: boot0 hook: adjust to unified boot0 semantics
    
    With the updated boot0 semantics (i.e. giving the boot0-hook control
    over when and where the vector table is emitted), the boot0-hook for
    the socfpga needs to be adjusted.
    
    Change-Id: Ie970d3cffb39c60003810dd862ee86e26b22f6f4
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-socfpga/include/mach/boot0.h b/arch/arm/mach-socfpga/include/mach/boot0.h
index 22d9e7f7af..d6b9435d33 100644
--- a/arch/arm/mach-socfpga/include/mach/boot0.h
+++ b/arch/arm/mach-socfpga/include/mach/boot0.h
@@ -7,6 +7,9 @@
 #ifndef __BOOT0_H
 #define __BOOT0_H
 
+_start:
+	ARM_VECTORS
+
 #ifdef CONFIG_SPL_BUILD
 	.balignl 64,0xf33db33f;
 

commit cf883384376395106cfba2982ff10d45a5d259c7
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Oct 10 16:21:06 2017 +0200

    UPSTREAM: rockchip: rk3036: use aligned address for SPL_TEXT_BASE
    
    With the boot0-hook inserting the additional padding to receive our
    SPL magic, the SPL_TEXT_BASE can be aligned again.
    
    Change-Id: I938b95ff1ab639047bf86cd975900a2242cd4ac2
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index 4ed8f5a6c7..3a2bf339b1 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -25,7 +25,7 @@
 #define CONFIG_SYS_INIT_SP_ADDR		0x60100000
 #define CONFIG_SYS_LOAD_ADDR		0x60800800
 #define CONFIG_SPL_STACK		0x10081fff
-#define CONFIG_SPL_TEXT_BASE		0x10081004
+#define CONFIG_SPL_TEXT_BASE		0x10081000
 
 #define CONFIG_ROCKCHIP_MAX_INIT_SIZE	(4 << 10)
 #define CONFIG_ROCKCHIP_CHIP_TAG	"RK30"

commit 24c5e2fff9f6b97078216aae3f00184f5570a3c6
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Oct 10 16:21:05 2017 +0200

    UPSTREAM: rockchip: rk3288: use aligned address for SPL_TEXT_BASE
    
    After we use boot0 hook, we can use offset '000' instead of '004' as
    SPL_TEXT_BASE.
    
    Change-Id: Ic29be8ee07382b641865281041e25aa8a8a61333
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    [Updated tag in commit summary:]
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index 707febecbb..b0e7c80529 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -31,7 +31,7 @@
 #define CONFIG_SYS_INIT_SP_ADDR		0x00100000
 #define CONFIG_SYS_LOAD_ADDR		0x00800800
 #define CONFIG_SPL_STACK		0xff718000
-#define CONFIG_SPL_TEXT_BASE		0xff704004
+#define CONFIG_SPL_TEXT_BASE		0xff704000
 
 #define GICD_BASE			0xffc01000
 #define GICC_BASE			0xffc02000

commit 6bd5a2c444a54b1708cf43f0eca7e3e41701febc
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Oct 10 16:21:04 2017 +0200

    UPSTREAM: rockchip: mkimage: use spl_boot0 for all Rockchip SoCs
    
    Enable the spl_boot0 in SPL and use the pre-padding TAG memory,
    the mkimage do not need to pad it but only need to replace the value
    with correct TAG value.
    
    Change-Id: I5ae7b402c9958774acd9eac95e9417c48854c035
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index 8c18e0567c..e72111028f 100644
--- a/tools/rkcommon.c
+++ b/tools/rkcommon.c
@@ -45,7 +45,7 @@ struct header0_info {
 };
 
 /**
- * struct header1_info
+ * struct header1 info
  */
 struct header1_info {
 	uint32_t magic;
@@ -72,16 +72,16 @@ struct spl_info {
 };
 
 static struct spl_info spl_infos[] = {
-	{ "rk3036", "RK30", 0x1000, false, false },
+	{ "rk3036", "RK30", 0x1000, false, true },
 	{ "rk3066", "RK30", 0x8000, true, false },
-	{ "rk3128", "RK31", 0x1800, false, false },
-	{ "rk3188", "RK31", 0x8000 - 0x800, true, false },
-	{ "rk322x", "RK32", 0x8000 - 0x1000, false, false },
-	{ "rk3288", "RK32", 0x8000, false, false },
+	{ "rk3128", "RK31", 0x1800, false, true },
+	{ "rk3188", "RK31", 0x8000 - 0x800, true, true },
+	{ "rk322x", "RK32", 0x8000 - 0x1000, false, true },
+	{ "rk3288", "RK32", 0x8000, false, true },
 	{ "rk3328", "RK32", 0x8000 - 0x1000, false, true },
 	{ "rk3368", "RK33", 0x8000 - 0x1000, false, true },
 	{ "rk3399", "RK33", 0x30000 - 0x2000, false, true },
-	{ "rv1108", "RK11", 0x1800, false, false},
+	{ "rv1108", "RK11", 0x1800, false, true },
 };
 
 static unsigned char rc4_key[16] = {

commit 947101c3a47e1a56240f4418475ff9eeb1d39047
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Oct 10 16:21:03 2017 +0200

    FROMLIST: rockchip: enable boot0-hook for all Rockchip SoCs
    
    Rockchip SoCs bootrom design is like this:
    - First 2KB or 4KB internal memory is for bootrom stack and heap;
    - Then the first 4-byte suppose to be a TAG like 'RK33';
    - The the following memory address end with '0004' is the first
      instruction load and running by bootrom;
    
    Let's use the boot0 hook to reserve the first 4-byte tag for all
    the Rockchip SoCs.
    
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems>
    [Commit message:]
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    
    Change-Id: I2d3fbb1b3c1a5986c8c789cb3730b8c51596323a
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 194394ec4f..e9504b2f30 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1113,6 +1113,7 @@ config ARCH_ROCKCHIP
 	select DM_PWM
 	select DM_REGULATOR
 	select CMD_ROCKUSB if USB_GADGET_DOWNLOAD
+	select ENABLE_ARM_SOC_BOOT0_HOOK
 	imply CMD_FASTBOOT
 	imply FASTBOOT
 	imply FAT_WRITE
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 98ab2b4c77..34d1606d3b 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -103,7 +103,6 @@ config ROCKCHIP_RK3328
 	imply SPL_SERIAL_SUPPORT
 	imply TPL_SERIAL_SUPPORT
 	imply SPL_SEPARATE_BSS
-	select ENABLE_ARM_SOC_BOOT0_HOOK
 	select DEBUG_UART_BOARD_INIT
 	select SYS_NS16550
 	help
@@ -139,7 +138,6 @@ config ROCKCHIP_RK3368
 	imply SPL_SEPARATE_BSS
 	imply SPL_SERIAL_SUPPORT
 	imply TPL_SERIAL_SUPPORT
-	select ENABLE_ARM_SOC_BOOT0_HOOK
 	select DEBUG_UART_BOARD_INIT
 	select SYS_NS16550
 	select GICV2
@@ -178,7 +176,6 @@ config ROCKCHIP_RK3399
 	select SPL_SEPARATE_BSS
 	select SPL_SERIAL_SUPPORT
 	select SPL_DRIVERS_MISC_SUPPORT
-	select ENABLE_ARM_SOC_BOOT0_HOOK
 	select DEBUG_UART_BOARD_INIT
 	select GICV3
 	help

commit 5577f8545fd4b8b9671fcd67b4f2cc093eed63db
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Oct 10 16:21:02 2017 +0200

    FROMLIST: rockchip: boot0: align to 0x20 for armv7 '_start'
    
    The '_start' is using as vector table base address, and will write
    to VBAR register, so it needs to be aligned to 0x20 for armv7.
    
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    [Updated to current code base:]
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    
    Change-Id: If3c151e7071f8d9556827bb05cfd38892b1c17f3
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/boot0.h b/arch/arm/include/asm/arch-rockchip/boot0.h
index 455d8428d8..f7c614669c 100644
--- a/arch/arm/include/asm/arch-rockchip/boot0.h
+++ b/arch/arm/include/asm/arch-rockchip/boot0.h
@@ -6,12 +6,13 @@
 
 /*
  * Execution starts on the instruction following this 4-byte header
- * (containing the magic 'RK33').
+ * (containing the magic 'RK30', 'RK31', 'RK32' or 'RK33').  This
+ * magic constant will be written into the final image by the rkimage
+ * tool, but we need to reserve space for it here.
  *
  * To make life easier for everyone, we build the SPL binary with
  * space for this 4-byte header already included in the binary.
  */
-
 #ifdef CONFIG_SPL_BUILD
 	/*
 	 * We need to add 4 bytes of space for the 'RK33' at the
@@ -26,6 +27,15 @@
 	b reset	 /* may be overwritten --- should be 'nop' or a 'b reset' */
 #endif
 	b reset
+#if !defined(CONFIG_ARM64)
+	/*
+	 * For armv7, the addr '_start' will used as vector start address
+	 * and write to VBAR register, which needs to aligned to 0x20.
+	 */
+	.align(5)
+_start:
+	ARM_VECTORS
+#endif
 
 #if defined(CONFIG_ROCKCHIP_RK3399) && defined(CONFIG_SPL_BUILD)
 	.space CONFIG_ROCKCHIP_SPL_RESERVE_IRAM	/* space for the ATF data */

commit 733d51d5a7b2cc3e474f4230ed87302b14b826a9
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Oct 10 16:21:01 2017 +0200

    FROMLIST: arm: boot0 hook: move boot0 hook before '_start'
    
    The boot0 hook on ARM does not insert its payload before the vector
    table. This is both a mismatch with thec comment above it and
    contradict usage of the boot0 hook on ARM64.
    
    To fix this (and unify the semantics for ARM and ARM64), we change the
    boot0-hook semantics on ARM to match those on ARM64:
      (1) if a boot0-hook is present it is inserted at the start of
          the image
      (2) if a boot0-hook is present, emitting the ARM vector table
          (and the _start) symbol are suppressed in vectors.S and
          the boot0-hook has full control over where and when it
          wants to emit these
    
    Change-Id: Ibd3b7c18a6a32f90372d315659f68511d92ca648
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/boot0.h b/arch/arm/include/asm/arch-rockchip/boot0.h
index 72d264bcbe..455d8428d8 100644
--- a/arch/arm/include/asm/arch-rockchip/boot0.h
+++ b/arch/arm/include/asm/arch-rockchip/boot0.h
@@ -1,4 +1,3 @@
-
 /*
  * Copyright 2017 Theobroma Systems Design und Consulting GmbH
  *
diff --git a/arch/arm/lib/vectors.S b/arch/arm/lib/vectors.S
index d25cf4585c..7079641213 100644
--- a/arch/arm/lib/vectors.S
+++ b/arch/arm/lib/vectors.S
@@ -15,6 +15,22 @@
 
 #include <config.h>
 
+/*
+ * A macro to allow insertion of an ARM exception vector either
+ * for the non-boot0 case or by a boot0-header.
+ */
+        .macro ARM_VECTORS
+	b	reset
+	ldr	pc, _undefined_instruction
+	ldr	pc, _software_interrupt
+	ldr	pc, _prefetch_abort
+	ldr	pc, _data_abort
+	ldr	pc, _not_used
+	ldr	pc, _irq
+	ldr	pc, _fiq
+	.endm
+
+
 /*
  *************************************************************************
  *
@@ -35,6 +51,23 @@
 
 	.section ".vectors", "ax"
 
+#if defined(CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK)
+/*
+ * Various SoCs need something special and SoC-specific up front in
+ * order to boot, allow them to set that in their boot0.h file and then
+ * use it here.
+ *
+ * To allow a boot0 hook to insert a 'special' sequence after the vector
+ * table (e.g. for the socfpga), the presence of a boot0 hook supresses
+ * the below vector table and assumes that the vector table is filled in
+ * by the boot0 hook.  The requirements for a boot0 hook thus are:
+ *   (1) defines '_start:' as appropriate
+ *   (2) inserts the vector table using ARM_VECTORS as appropriate
+ */
+#include <asm/arch/boot0.h>
+
+#else
+
 /*
  *************************************************************************
  *
@@ -46,28 +79,11 @@
  */
 
 _start:
-
 #ifdef CONFIG_SYS_DV_NOR_BOOT_CFG
 	.word	CONFIG_SYS_DV_NOR_BOOT_CFG
 #endif
-
-	b	reset
-	ldr	pc, _undefined_instruction
-	ldr	pc, _software_interrupt
-	ldr	pc, _prefetch_abort
-	ldr	pc, _data_abort
-	ldr	pc, _not_used
-	ldr	pc, _irq
-	ldr	pc, _fiq
-
-#ifdef CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK
-/*
- * Various SoCs need something special and SoC-specific up front in
- * order to boot, allow them to set that in their boot0.h file and then
- * use it here.
- */
-#include <asm/arch/boot0.h>
-#endif
+	ARM_VECTORS
+#endif /* !defined(CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK) */
 
 /*
  *************************************************************************

commit ed2668e8cfc65555be33f0bd4635869129ebc49b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Nov 6 16:55:43 2017 +0800

    rockchip: rk3066: add defconfig for rk3066-evb
    
    Change-Id: Ia6ed2885c0bd3200691405d0b25720b3f281a755
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3066_defconfig b/configs/evb-rk3066_defconfig
new file mode 100644
index 0000000000..b512094db5
--- /dev/null
+++ b/configs/evb-rk3066_defconfig
@@ -0,0 +1,118 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_ROCKCHIP_RK3066=y
+CONFIG_TARGET_MK808_RK3066=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3066a-evb"
+CONFIG_CMD_REGULATOR=y
+CONFIG_CLK=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_RAM=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_USE_PRIVATE_LIBGCC=y
+CONFIG_CMD_DHRYSTONE=y
+CONFIG_ERRNO_STR=y
+CONFIG_SYS_NS16550=y
+CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
+CONFIG_BOOTDELAY=1
+CONFIG_CONSOLE_MUX=y
+CONFIG_DISPLAY_BOARDINFO=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_CMD_BOOTZ=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_CACHE=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_SYSRESET=y
+CONFIG_CMD_MMC=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_DM_MMC=y
+CONFIG_CMD_GPT=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_EFI_PARTITION is not set
+CONFIG_CMD_BOOTEFI is not set
+CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set
+CONFIG_EFI_LOADER is not set
+CONFIG_CMD_GPIO=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_GENERIC=y
+CONFIG_PINCTRL_ROCKCHIP_RK3066=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_BASE=0x20064000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_STORAGE=y
+CONFIG_CMD_USB=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DUALSPEED=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DWC2_OTG_PHY=y
+CONFIG_USB_GADGET_VBUS_DRAW=500 
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x300a
+CONFIG_BOARD_LATE_INIT=y
+CONFIG_MTD_DEVICE=y
+CONFIG_NAND_ROCKCHIP=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_MTD_PARTITIONS=y
+CONFIG_NAND=y
+CONFIG_DFU_NAND=y
+CONFIG_USB_FUNCTION_DFU=y
+CONFIG_DFU_RAM=y
+CONFIG_CMD_DFU=y
+CONFIG_SPL_BLK=y
+CONFIG_SPL_CLK=y
+CONFIG_SPL_DFU_RAM=y
+CONFIG_SPL_DFU_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_SPL_RAM=y
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_ADDR=0x70000000
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200000
+CONFIG_SPL_SYSCON=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_SPL_USB_GADGET_SUPPORT=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+# CONFIG_SPL_USE_ARCH_MEMCPY is not set
+# CONFIG_SPL_USE_ARCH_MEMSET is not set
+# CONFIG_TPL_USE_ARCH_MEMCPY is not set
+# CONFIG_TPL_USE_ARCH_MEMSET is not set
+# CONFIG_SPL_SIMPLE_BUS is not set
+# CONFIG_SPL_PINCTRL_FULL is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+# CONFIG_SPL_BOARD_INIT is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_EXT_SUPPORT is not set
+# CONFIG_SPL_LIBDISK_SUPPORT is not set
+# CONFIG_SPL_MMC_SUPPORT is not set
+CONFIG_TPL_BOOTROM_SUPPORT=y
+CONFIG_TPL_CLK=y
+CONFIG_TPL_DM=y
+CONFIG_TPL_DM_SERIAL=y
+# CONFIG_TPL_DRIVERS_MISC_SUPPORT is not set
+CONFIG_TPL_OF_CONTROL=y
+CONFIG_TPL_OF_PLATDATA=y
+CONFIG_TPL_RAM=y
+CONFIG_TPL_REGMAP=y
+CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_TPL_SERIAL_SUPPORT=y
+CONFIG_TPL_SYSCON=y
+CONFIG_TPL_TINY_MEMSET=y

commit 07c36383992614f42a23ba2ec450e0c52f88dd90
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Nov 6 16:55:27 2017 +0800

    rockchip: rk3066: add evb dts
    
    Change-Id: Iac9c8eba309e9d76debf61137ef7e31edf943ea7
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3066a-evb.dts b/arch/arm/dts/rk3066a-evb.dts
new file mode 100644
index 0000000000..dc48edc517
--- /dev/null
+++ b/arch/arm/dts/rk3066a-evb.dts
@@ -0,0 +1,193 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:     GPL-2.0+ or X11
+ */
+
+/dts-v1/;
+#include "rk3066a.dtsi"
+
+/ {
+	model = "Rockchip RK3066a Evaluation board";
+	compatible = "rockchip,rk3066-evb", "rockchip,rk3066a";
+
+	chosen {
+		stdout-path = "serial2:115200n8";
+	};
+
+	memory@60000000 {
+		reg = <0x60000000 0x40000000>;
+		device_type = "memory";
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		blue {
+			label = "mk808:blue:power";
+			gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+			linux,default-trigger = "default-on";
+		};
+	};
+
+	vcc_io: vcc-io {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_io";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+	};
+
+	vcc_host: usb-host-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio0 6 GPIO_ACTIVE_HIGH>;
+		pinctrl-0 = <&host_drv>;
+		pinctrl-names = "default";
+		regulator-always-on;
+		regulator-name = "host-pwr";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		startup-delay-us = <100000>;
+		vin-supply = <&vcc_io>;
+	};
+
+	vcc_otg: usb-otg-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio0 5 GPIO_ACTIVE_HIGH>;
+		pinctrl-0 = <&otg_drv>;
+		pinctrl-names = "default";
+		regulator-always-on;
+		regulator-name = "vcc_otg";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		startup-delay-us = <100000>;
+		vin-supply = <&vcc_io>;
+	};
+
+	vcc_sd: sdmmc-regulator {
+		compatible = "regulator-fixed";
+		gpio = <&gpio3 7 GPIO_ACTIVE_LOW>;
+		pinctrl-0 = <&sdmmc_pwr>;
+		pinctrl-names = "default";
+		regulator-name = "vcc_sd";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		startup-delay-us = <100000>;
+		vin-supply = <&vcc_io>;
+	};
+
+	vcc_wifi: sdio-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio3 24 GPIO_ACTIVE_HIGH>;
+		pinctrl-0 = <&wifi_pwr>;
+		pinctrl-names = "default";
+		regulator-name = "vcc_wifi";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		startup-delay-us = <100000>;
+		vin-supply = <&vcc_io>;
+	};
+};
+
+&dmc {
+	compatible = "rockchip,rk3066-dmc", "syscon";
+	rockchip,pctl-timing = <0x12c 0xc8 0x1f4 0x1e 0x4e 0x4 0x69 0x6
+		0x3 0x0 0x6 0x5 0xc 0x10 0x6 0x4
+		0x4 0x5 0x4 0x200 0x3 0xa 0x40 0x0
+		0x1 0x5 0x5 0x3 0xc 0x1e 0x100 0x0
+		0x4 0x0>;
+	rockchip,phy-timing = <0x208c6690 0x690878 0x10022a00
+		0x220 0x40 0x0 0x0>;
+	rockchip,sdram-params = <0x24716310 0 2 300000000 3 9 0>;
+};
+
+&emmc {
+	status = "okay";
+};
+
+&mmc0 {
+	bus-width = <4>;
+	cap-mmc-highspeed;
+	cap-sd-highspeed;
+	num-slots = <1>;
+	vmmc-supply = <&vcc_sd>;
+	status = "okay";
+};
+
+&mmc1 {
+	bus-width = <4>;
+	disable-wp;
+	non-removable;
+	num-slots = <1>;
+	pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_bus4>;
+	pinctrl-names = "default";
+	vmmc-supply = <&vcc_wifi>;
+	status = "okay";
+};
+
+&nandc {
+	u-boot,dm-spl;
+	status = "okay";
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	nand@0 {
+		u-boot,dm-spl;
+		reg = <0>;
+		nand-ecc-mode = "hw_syndrome";
+		nand-ecc-strength = <40>;
+		nand-ecc-step-size = <1024>;
+		rockchip,protect-bootrom-blocks;
+	};
+};
+
+&pinctrl {
+	usb-host {
+		host_drv: host-drv {
+			rockchip,pins = <RK_GPIO0 6 RK_FUNC_GPIO &pcfg_pull_default>;
+		};
+	};
+
+	usb-otg {
+		otg_drv: otg-drv {
+			rockchip,pins = <RK_GPIO0 5 RK_FUNC_GPIO &pcfg_pull_default>;
+		};
+	};
+
+	sdmmc {
+		sdmmc_pwr: sdmmc-pwr {
+			rockchip,pins = <RK_GPIO3 7 RK_FUNC_GPIO &pcfg_pull_default>;
+		};
+	};
+
+	sdio {
+		wifi_pwr: wifi-pwr {
+			rockchip,pins = <RK_GPIO3 24 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};
+
+&uart2 {
+	status = "okay";
+	u-boot,dm-pre-reloc;
+};
+
+&usb_host {
+	status = "okay";
+};
+
+&usb_otg {
+	u-boot,dm-spl;
+	status = "okay";
+};
+
+&usbphy {
+	status = "okay";
+};
+
+&wdt {
+	status = "okay";
+};

commit 95b9017fdc6e1eb246645f1a8e026b1608b621a9
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Nov 6 16:32:30 2017 +0800

    rockchip: dts: rk3066: fix mmc frequency and order
    
    U-Boot using 'mmc0 = &emmc' to assign the mmc number.
    'max-frequency' is needed for mmc probe.
    
    Change-Id: I7d163558004019f6897ae4c503b0c2a0d0d905c3
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3xxx.dtsi b/arch/arm/dts/rk3xxx.dtsi
index d1c205b589..35c2b15980 100644
--- a/arch/arm/dts/rk3xxx.dtsi
+++ b/arch/arm/dts/rk3xxx.dtsi
@@ -19,9 +19,9 @@
 		i2c2 = &i2c2;
 		i2c3 = &i2c3;
 		i2c4 = &i2c4;
-		mshc0 = &emmc;
-		mshc1 = &mmc0;
-		mshc2 = &mmc1;
+		mmc0 = &emmc;
+		mmc1 = &mmc0;
+		mmc2 = &mmc1;
 		serial0 = &uart0;
 		serial1 = &uart1;
 		serial2 = &uart2;
@@ -188,6 +188,7 @@
 	mmc0: dwmmc@10214000 {
 		compatible = "rockchip,rk2928-dw-mshc";
 		reg = <0x10214000 0x1000>;
+		max-frequency = <37500000>;
 		interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>;
 		clock-names = "biu", "ciu";
@@ -198,6 +199,7 @@
 	mmc1: dwmmc@10218000 {
 		compatible = "rockchip,rk2928-dw-mshc";
 		reg = <0x10218000 0x1000>;
+		max-frequency = <37500000>;
 		interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>;
 		clock-names = "biu", "ciu";
@@ -208,6 +210,7 @@
 	emmc: dwmmc@1021c000 {
 		compatible = "rockchip,rk2928-dw-mshc";
 		reg = <0x1021c000 0x1000>;
+		max-frequency = <37500000>;
 		interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>;
 		clock-names = "biu", "ciu";

commit 337e8c3e6ab86cfcd2e9e165e9e2d88ea8d9d210
Author: Paweł Jarosz <paweljarosz3691@gmail.com>
Date:   Thu Aug 17 15:15:56 2017 +0200

    mmc: dw_mmc: rockchip: add support for rk3066 sdmmc
    
    This patch enables support for the Rockchip RK3066 SD/MMC controller,
    which is based on Designware IP. The device supports SD, SDIO, MMC and eMMC.
    
    Change-Id: I3724634928c5e2a8c0b187f953081e8e0faa3ec0
    Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
    Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index 4e607bfec4..250e6c8833 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -294,6 +294,7 @@ static int rockchip_dwmmc_bind(struct udevice *dev)
 
 static const struct udevice_id rockchip_dwmmc_ids[] = {
 	{ .compatible = "rockchip,rk3288-dw-mshc" },
+	{ .compatible = "rockchip,rk2928-dw-mshc" },
 	{ }
 };
 

commit 39abf9c1e9e8da96605fbd2bb0ab43fbac75abcd
Author: Paweł Jarosz <paweljarosz3691@gmail.com>
Date:   Thu Aug 17 15:15:40 2017 +0200

    mmc: dw_mmc: support transfer mode autodetection
    
    dw_mmc supports two transfer modes in u-boot: idma and fifo.
    This patch adds autodetection of transfer mode and eliminates setting this in host config struct
    
    Change-Id: I0eafb78c3fd171827664e320b8959f3c5e27094a
    Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index cae88ac08e..1603f15f07 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -574,6 +574,7 @@ static int dwmci_set_ios(struct mmc *mmc)
 static int dwmci_init(struct mmc *mmc)
 {
 	struct dwmci_host *host = mmc->priv;
+	uint32_t use_dma;
 
 	if (host->board_init)
 		host->board_init(host);
@@ -585,6 +586,13 @@ static int dwmci_init(struct mmc *mmc)
 		return -EIO;
 	}
 
+	use_dma = SDMMC_GET_TRANS_MODE(dwmci_readl(host, DWMCI_HCON));
+	if (use_dma == DMA_INTERFACE_IDMA) {
+		host->fifo_mode = 0;
+	} else {
+		host->fifo_mode = 1;
+	}
+
 	/* Enumerate at 400KHz */
 	dwmci_setup_bus(host, mmc->cfg->f_min);
 
diff --git a/include/dwmmc.h b/include/dwmmc.h
index 9edbdf65c5..2003f40b60 100644
--- a/include/dwmmc.h
+++ b/include/dwmmc.h
@@ -115,6 +115,10 @@
 #define RX_WMARK_SHIFT		16
 #define RX_WMARK_MASK		(0xfff << RX_WMARK_SHIFT)
 
+/* HCON Register */
+#define DMA_INTERFACE_IDMA		(0x0)
+#define SDMMC_GET_TRANS_MODE(x)		(((x)>>16) & 0x3)
+
 #define DWMCI_IDMAC_OWN		(1 << 31)
 #define DWMCI_IDMAC_CH		(1 << 4)
 #define DWMCI_IDMAC_FS		(1 << 3)

commit b9370edc3d75f5f5a0e59f8e46afb5d4b9432324
Author: Paweł Jarosz <paweljarosz3691@gmail.com>
Date:   Thu Aug 17 15:14:45 2017 +0200

    rockchip: board: rk3066: convert board_usb_init to live tree functions
    
    Use live tree functions to fill dwc2_plat_otg_data structure in board_usb_init.
    
    Change-Id: Iea1055a77e7f42ec65627bc82ad5a7924910e9b0
    Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3066-board.c b/arch/arm/mach-rockchip/rk3066-board.c
index 8fa06a2525..2b96eb2d41 100644
--- a/arch/arm/mach-rockchip/rk3066-board.c
+++ b/arch/arm/mach-rockchip/rk3066-board.c
@@ -90,55 +90,17 @@ static struct dwc2_plat_otg_data rk3066_otg_data = {
 
 int board_usb_init(int index, enum usb_init_type init)
 {
-	int node, phy_node;
-	const char *mode;
-	bool matched = false;
-	const void *blob = gd->fdt_blob;
-	u32 grf_phy_offset;
-
-	/* find the usb_otg node */
-	node = fdt_node_offset_by_compatible(blob, -1,
-					"rockchip,rk3066-usb");
-
-	while (node > 0) {
-		mode = fdt_getprop(blob, node, "dr_mode", NULL);
-		if (mode && strcmp(mode, "otg") == 0) {
-			matched = true;
-			break;
-		}
-
-		node = fdt_node_offset_by_compatible(blob, node,
-					"rockchip,rk3066-usb");
-	}
-	if (!matched) {
-		debug("Not found usb_otg device\n");
-		return -ENODEV;
-	}
-	rk3066_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
+	ofnode otg_node;
+	u32 reg;
 
-	node = fdtdec_lookup_phandle(blob, node, "phys");
-	if (node <= 0) {
-		debug("Not found usb phy device\n");
+	otg_node = ofnode_path("/usb@10180000");
+	if (!ofnode_valid(otg_node)) {
+		debug("Not found usb otg device\n");
 		return -ENODEV;
 	}
 
-	phy_node = fdt_parent_offset(blob, node);
-	if (phy_node <= 0) {
-		debug("Not found usb phy device\n");
-		return -ENODEV;
-	}
-
-	rk3066_otg_data.phy_of_node = phy_node;
-	grf_phy_offset = fdtdec_get_addr(blob, node, "reg");
-
-	node = fdt_node_offset_by_compatible(blob, -1,
-					"rockchip,rk3066-grf");
-	if (node <= 0) {
-		debug("Not found grf device\n");
-		return -ENODEV;
-	}
-	rk3066_otg_data.regs_phy = grf_phy_offset +
-				fdtdec_get_addr(blob, node, "reg");
+	ofnode_read_u32(otg_node, "reg", &reg);
+	rk3066_otg_data.regs_otg = reg;
 
 	return dwc2_udc_probe(&rk3066_otg_data);
 }

commit b2dae9bd9403401d39334379a6dcd91daa8a92d8
Author: Paweł Jarosz <paweljarosz3691@gmail.com>
Date:   Thu Aug 17 15:13:26 2017 +0200

    rockchip: rk3066: add mk808 board files
    
    mk808 is a tv stick with two usb ports, micro sd card slot, hdmi and
    nand onboard.
    
    Change-Id: I317c516f2023eec59c46195dd8280684137f977c
    Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
    Acked-by: Simon Glass <sjg@chromium.org>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index fcf0f71e5a..378e43e097 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -29,6 +29,7 @@ dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \
 dtb-$(CONFIG_EXYNOS7420) += exynos7420-espresso7420.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += \
 	rk3036-sdk.dtb \
+	rk3066a-mk808.dtb \
 	rk3126-evb.dtb \
 	rk3128-evb.dtb \
 	rk3188-radxarock.dtb \
diff --git a/arch/arm/dts/rk3066a-mk808.dts b/arch/arm/dts/rk3066a-mk808.dts
new file mode 100644
index 0000000000..0a452d7006
--- /dev/null
+++ b/arch/arm/dts/rk3066a-mk808.dts
@@ -0,0 +1,189 @@
+/*
+ * Copyright (c) 2017 Paweł Jarosz <paweljarosz3691@gmail.com>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+ or X11
+ */
+
+/dts-v1/;
+#include "rk3066a.dtsi"
+
+/ {
+	model = "Rikomagic MK808";
+	compatible = "rikomagic,mk808", "rockchip,rk3066a";
+
+	chosen {
+		stdout-path = "serial2:115200n8";
+	};
+
+	memory@60000000 {
+		reg = <0x60000000 0x40000000>;
+		device_type = "memory";
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		blue {
+			label = "mk808:blue:power";
+			gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+			linux,default-trigger = "default-on";
+		};
+	};
+
+	vcc_io: vcc-io {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_io";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+	};
+
+	vcc_host: usb-host-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio0 6 GPIO_ACTIVE_HIGH>;
+		pinctrl-0 = <&host_drv>;
+		pinctrl-names = "default";
+		regulator-always-on;
+		regulator-name = "host-pwr";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		startup-delay-us = <100000>;
+		vin-supply = <&vcc_io>;
+	};
+
+	vcc_otg: usb-otg-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio0 5 GPIO_ACTIVE_HIGH>;
+		pinctrl-0 = <&otg_drv>;
+		pinctrl-names = "default";
+		regulator-always-on;
+		regulator-name = "vcc_otg";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		startup-delay-us = <100000>;
+		vin-supply = <&vcc_io>;
+	};
+
+	vcc_sd: sdmmc-regulator {
+		compatible = "regulator-fixed";
+		gpio = <&gpio3 7 GPIO_ACTIVE_LOW>;
+		pinctrl-0 = <&sdmmc_pwr>;
+		pinctrl-names = "default";
+		regulator-name = "vcc_sd";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		startup-delay-us = <100000>;
+		vin-supply = <&vcc_io>;
+	};
+
+	vcc_wifi: sdio-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio3 24 GPIO_ACTIVE_HIGH>;
+		pinctrl-0 = <&wifi_pwr>;
+		pinctrl-names = "default";
+		regulator-name = "vcc_wifi";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		startup-delay-us = <100000>;
+		vin-supply = <&vcc_io>;
+	};
+};
+
+&dmc {
+	compatible = "rockchip,rk3066-dmc", "syscon";
+	rockchip,pctl-timing = <0x12c 0xc8 0x1f4 0x1e 0x4e 0x4 0x69 0x6
+		0x3 0x0 0x6 0x5 0xc 0x10 0x6 0x4
+		0x4 0x5 0x4 0x200 0x3 0xa 0x40 0x0
+		0x1 0x5 0x5 0x3 0xc 0x1e 0x100 0x0
+		0x4 0x0>;
+	rockchip,phy-timing = <0x208c6690 0x690878 0x10022a00
+		0x220 0x40 0x0 0x0>;
+	rockchip,sdram-params = <0x24716310 0 2 300000000 3 9 0>;
+};
+
+&mmc0 {
+	bus-width = <4>;
+	cap-mmc-highspeed;
+	cap-sd-highspeed;
+	num-slots = <1>;
+	vmmc-supply = <&vcc_sd>;
+	status = "okay";
+};
+
+&mmc1 {
+	bus-width = <4>;
+	disable-wp;
+	non-removable;
+	num-slots = <1>;
+	pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_bus4>;
+	pinctrl-names = "default";
+	vmmc-supply = <&vcc_wifi>;
+	status = "okay";
+};
+
+&nandc {
+	u-boot,dm-spl;
+	status = "okay";
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	nand@0 {
+		u-boot,dm-spl;
+		reg = <0>;
+		nand-ecc-mode = "hw_syndrome";
+		nand-ecc-strength = <40>;
+		nand-ecc-step-size = <1024>;
+		rockchip,protect-bootrom-blocks;
+	};
+};
+
+&pinctrl {
+	usb-host {
+		host_drv: host-drv {
+			rockchip,pins = <RK_GPIO0 6 RK_FUNC_GPIO &pcfg_pull_default>;
+		};
+	};
+
+	usb-otg {
+		otg_drv: otg-drv {
+			rockchip,pins = <RK_GPIO0 5 RK_FUNC_GPIO &pcfg_pull_default>;
+		};
+	};
+
+	sdmmc {
+		sdmmc_pwr: sdmmc-pwr {
+			rockchip,pins = <RK_GPIO3 7 RK_FUNC_GPIO &pcfg_pull_default>;
+		};
+	};
+
+	sdio {
+		wifi_pwr: wifi-pwr {
+			rockchip,pins = <RK_GPIO3 24 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};
+
+&uart2 {
+	status = "okay";
+	u-boot,dm-pre-reloc;
+};
+
+&usb_host {
+	status = "okay";
+};
+
+&usb_otg {
+	u-boot,dm-spl;
+	status = "okay";
+};
+
+&usbphy {
+	status = "okay";
+};
+
+&wdt {
+	status = "okay";
+};
diff --git a/arch/arm/mach-rockchip/rk3066/Kconfig b/arch/arm/mach-rockchip/rk3066/Kconfig
index 89a48d2951..b5277fe53f 100644
--- a/arch/arm/mach-rockchip/rk3066/Kconfig
+++ b/arch/arm/mach-rockchip/rk3066/Kconfig
@@ -26,4 +26,6 @@ config TPL_LIBCOMMON_SUPPORT
 config TPL_LIBGENERIC_SUPPORT
         default y
 
+source "board/rikomagic/mk808_rk3066/Kconfig"
+
 endif
diff --git a/board/rikomagic/mk808_rk3066/Kconfig b/board/rikomagic/mk808_rk3066/Kconfig
new file mode 100644
index 0000000000..0da0a17542
--- /dev/null
+++ b/board/rikomagic/mk808_rk3066/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_MK808_RK3066
+
+config SYS_BOARD
+	default "mk808_rk3066"
+
+config SYS_VENDOR
+	default "rikomagic"
+
+config SYS_CONFIG_NAME
+	default "mk808_rk3066"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+
+endif
diff --git a/board/rikomagic/mk808_rk3066/MAINTAINERS b/board/rikomagic/mk808_rk3066/MAINTAINERS
new file mode 100644
index 0000000000..65b5cbdc24
--- /dev/null
+++ b/board/rikomagic/mk808_rk3066/MAINTAINERS
@@ -0,0 +1,6 @@
+MK808
+M:	Paweł Jarosz <paweljarosz3691@gmail.com>
+S:	Maintained
+F:	include/configs/mk808_rk3066.h
+F:	configs/mk808-rk3066_defconfig
+F:	board/rikomagic/mk808_rk3066
diff --git a/board/rikomagic/mk808_rk3066/Makefile b/board/rikomagic/mk808_rk3066/Makefile
new file mode 100644
index 0000000000..ef5ba56c4f
--- /dev/null
+++ b/board/rikomagic/mk808_rk3066/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (c) 2017 Paweł‚ Jarosz <paweljarosz3691@gmail.com>
+#
+# SPDX-License-Identifier:      GPL-2.0+
+#
+
+obj-y	+= mk808_rk3066.o
diff --git a/board/rikomagic/mk808_rk3066/mk808_rk3066.c b/board/rikomagic/mk808_rk3066/mk808_rk3066.c
new file mode 100644
index 0000000000..e5d66fe729
--- /dev/null
+++ b/board/rikomagic/mk808_rk3066/mk808_rk3066.c
@@ -0,0 +1,10 @@
+/*
+ * (C) Copyright 2017 Paweł Jarosz <paweljarosz3691@gmail.com>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
diff --git a/configs/mk808_defconfig b/configs/mk808_defconfig
new file mode 100644
index 0000000000..b37532d973
--- /dev/null
+++ b/configs/mk808_defconfig
@@ -0,0 +1,117 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_ROCKCHIP_RK3066=y
+CONFIG_TARGET_MK808_RK3066=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3066a-mk808"
+CONFIG_CMD_REGULATOR=y
+CONFIG_CLK=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_RAM=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_USE_PRIVATE_LIBGCC=y
+CONFIG_CMD_DHRYSTONE=y
+CONFIG_ERRNO_STR=y
+CONFIG_SYS_NS16550=y
+CONFIG_BOOTDELAY=1
+CONFIG_CONSOLE_MUX=y
+CONFIG_DISPLAY_BOARDINFO=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_CMD_BOOTZ=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_CACHE=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_SYSRESET=y
+CONFIG_CMD_MMC=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_DM_MMC=y
+CONFIG_CMD_GPT=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_EFI_PARTITION is not set
+CONFIG_CMD_BOOTEFI is not set
+CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set
+CONFIG_EFI_LOADER is not set
+CONFIG_CMD_GPIO=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_GENERIC=y
+CONFIG_PINCTRL_ROCKCHIP_RK3066=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_BASE=0x20064000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_STORAGE=y
+CONFIG_CMD_USB=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DUALSPEED=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DWC2_OTG_PHY=y
+CONFIG_USB_GADGET_VBUS_DRAW=500 
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x300a
+CONFIG_BOARD_LATE_INIT=y
+CONFIG_MTD_DEVICE=y
+CONFIG_NAND_ROCKCHIP=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_MTD_PARTITIONS=y
+CONFIG_NAND=y
+CONFIG_DFU_NAND=y
+CONFIG_USB_FUNCTION_DFU=y
+CONFIG_DFU_RAM=y
+CONFIG_CMD_DFU=y
+CONFIG_SPL_BLK=y
+CONFIG_SPL_CLK=y
+CONFIG_SPL_DFU_RAM=y
+CONFIG_SPL_DFU_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_SPL_RAM=y
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_ADDR=0x70000000
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200000
+CONFIG_SPL_SYSCON=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_SPL_USB_GADGET_SUPPORT=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+# CONFIG_SPL_USE_ARCH_MEMCPY is not set
+# CONFIG_SPL_USE_ARCH_MEMSET is not set
+# CONFIG_TPL_USE_ARCH_MEMCPY is not set
+# CONFIG_TPL_USE_ARCH_MEMSET is not set
+# CONFIG_SPL_SIMPLE_BUS is not set
+# CONFIG_SPL_PINCTRL_FULL is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+# CONFIG_SPL_BOARD_INIT is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_EXT_SUPPORT is not set
+# CONFIG_SPL_LIBDISK_SUPPORT is not set
+# CONFIG_SPL_MMC_SUPPORT is not set
+CONFIG_TPL_BOOTROM_SUPPORT=y
+CONFIG_TPL_CLK=y
+CONFIG_TPL_DM=y
+CONFIG_TPL_DM_SERIAL=y
+# CONFIG_TPL_DRIVERS_MISC_SUPPORT is not set
+CONFIG_TPL_OF_CONTROL=y
+CONFIG_TPL_OF_PLATDATA=y
+CONFIG_TPL_RAM=y
+CONFIG_TPL_REGMAP=y
+CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_TPL_SERIAL_SUPPORT=y
+CONFIG_TPL_SYSCON=y
+CONFIG_TPL_TINY_MEMSET=y
diff --git a/include/configs/mk808_rk3066.h b/include/configs/mk808_rk3066.h
new file mode 100644
index 0000000000..d6b1fc813a
--- /dev/null
+++ b/include/configs/mk808_rk3066.h
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2017 Paweł Jarosz <paweljarosz3691@gmail.com>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+/*
+ * Using bootrom layout for rockchip-idb* and spl*. Size is nand erase size.
+ */
+#define MTDPARTS_DEFAULT \
+		"mtdparts=rockchip-nand.0:" \
+			"4M(idb)," \
+			"4M(idb.backup)," \
+			"4M(spl)," \
+			"4M(spl.backup1)," \
+			"4M(spl.backup2)," \
+			"4M(spl.backup3)," \
+			"4M(spl.backup4)," \
+			"4M(u-boot)," \
+			"4M(u-boot.backup)," \
+			"4M(u-boot-env)," \
+			"4M(u-boot-env.backup)," \
+			"16M(kernel)," \
+			"32M(initrd)," \
+			"-(rootfs)"
+
+#define DFU_ALT_INFO_NAND \
+		"idb raw 0x0 0x400000;" \
+		"idb.backup raw 0x400000 0x400000;" \
+		"spl raw 0x800000 0x400000;" \
+		"spl.backup1 raw 0xC00000 0x400000;" \
+		"spl.backup2 raw 0x1000000 0x400000;" \
+		"spl.backup3 raw 0x1400000 0x400000;" \
+		"spl.backup4 raw 0x1800000 0x400000;" \
+		"u-boot raw 0x1C00000 0x400000;" \
+		"u-boot.backup raw 0x2000000 0x400000;" \
+		"u-boot-env raw 0x2400000 0x400000;" \
+		"u-boot-env.backup raw 0x2800000 0x400000;" \
+		"kernel raw 0x2C00000 0x1000000;" \
+		"initrd raw 0x3C00000 0x2000000"
+
+#define DFU_ALT_INFO_RAM \
+	"tpl.bin ram 0x10080C00 0x10000;" \
+	"spl.bin ram 0x60000000 0x40000;" \
+	"u-boot.bin ram 0x60408000 0x80000"
+
+#define ROCKCHIP_DEVICE_SETTINGS \
+	"mtdparts=" MTDPARTS_DEFAULT "\0" \
+	"dfu_alt_info=" DFU_ALT_INFO_NAND "\0" \
+	"dfu_alt_info_ram=" DFU_ALT_INFO_RAM "\0"
+
+#define CONFIG_SYS_DFU_DATA_BUF_SIZE		SZ_4M
+#define CONFIG_SYS_NAND_U_BOOT_OFFS		0x01c00000
+#define CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND	0x02000000
+
+#include <configs/rk3066_common.h>
+
+#endif
+

commit ca3cef26db1792e7dd9a538b61010072d5994d01
Author: Paweł Jarosz <paweljarosz3691@gmail.com>
Date:   Thu Aug 17 15:14:58 2017 +0200

    ARM: dts: rockchip: prefer u-boot, dm-pre-reloc rather than u-boot, dm-spl
    
    rk3xxx.dtsi is used by rk3188 and rk3066. rk3188 uses alocated data in spl but rk3066 needs it in tpl.
    
    Change-Id: I6e3ca3d45a6764421e441eba24e68ad7b8bec745
    Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3xxx.dtsi b/arch/arm/dts/rk3xxx.dtsi
index 6d9e36d235..d1c205b589 100644
--- a/arch/arm/dts/rk3xxx.dtsi
+++ b/arch/arm/dts/rk3xxx.dtsi
@@ -135,7 +135,7 @@
 	};
 
 	noc: syscon@10128000 {
-		u-boot,dm-spl;
+		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3188-noc", "syscon";
 		reg = <0x10128000 0x2000>;
 	};
@@ -218,13 +218,13 @@
 	pmu: pmu@20004000 {
 		compatible = "rockchip,rk3066-pmu", "syscon";
 		reg = <0x20004000 0x100>;
-		u-boot,dm-spl;
+		u-boot,dm-pre-reloc;
 	};
 
 	grf: grf@20008000 {
 		compatible = "syscon";
 		reg = <0x20008000 0x200>;
-		u-boot,dm-spl;
+		u-boot,dm-pre-reloc;
 	};
 
 	dmc: dmc@20020000 {
@@ -238,7 +238,7 @@
 		       0x20040000 0x294>;
 		clocks = <&cru PCLK_DDRUPCTL>, <&cru PCLK_PUBL>;
 		clock-names = "pclk_ddrupctl", "pclk_publ";
-		u-boot,dm-spl;
+		u-boot,dm-pre-reloc;
 	};
 
 	i2c0: i2c@2002d000 {

commit 907f97732fc211f3f09aaf0b09be5a4858f50f0d
Author: Paweł Jarosz <paweljarosz3691@gmail.com>
Date:   Thu Aug 17 15:16:54 2017 +0200

    mtd: nand: spl: allow build nand_bbt, nand_ids and nand_util
    
    This patch allows building of nand_bbt, nand_ids, nand_util for nand drivers that need it.
    
    Change-Id: I20beea9442a13bce926a5a2be24e3e2a69cf1b2d
    Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index f5d191dd1c..6067b89837 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -18,6 +18,9 @@ obj-$(CONFIG_SPL_NAND_LOAD) += nand_spl_load.o
 obj-$(CONFIG_SPL_NAND_ECC) += nand_ecc.o
 obj-$(CONFIG_SPL_NAND_BASE) += nand_base.o
 obj-$(CONFIG_SPL_NAND_INIT) += nand.o
+obj-$(CONFIG_SPL_NAND_BBT) += nand_bbt.o
+obj-$(CONFIG_SPL_NAND_IDS) += nand_ids.o
+obj-$(CONFIG_SPL_NAND_UTIL) += nand_util.o
 ifeq ($(CONFIG_SPL_ENV_SUPPORT),y)
 obj-$(CONFIG_ENV_IS_IN_NAND) += nand_util.o
 endif

commit 200006a30c30614226b04047ebcec8305f2b4e20
Author: Paweł Jarosz <paweljarosz3691@gmail.com>
Date:   Thu Aug 17 15:16:39 2017 +0200

    dfu: fix spl build
    
    In current state dfu depends on cmd/mtdparts.c which isn't build in SPL.
    This patch resolves it by cutting out unwanted code in SPL build.
    
    Change-Id: I7b25d3991d2b4e3a4c50b90fa6cac760472650b2
    Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/dfu/dfu_nand.c b/drivers/dfu/dfu_nand.c
index 6dc9ff7aea..23dfc8e519 100644
--- a/drivers/dfu/dfu_nand.c
+++ b/drivers/dfu/dfu_nand.c
@@ -192,8 +192,9 @@ unsigned int dfu_polltimeout_nand(struct dfu_entity *dfu)
 int dfu_fill_entity_nand(struct dfu_entity *dfu, char *devstr, char *s)
 {
 	char *st;
+#ifndef CONFIG_SPL_BUILD
 	int ret, dev, part;
-
+#endif
 	dfu->data.nand.ubi = 0;
 	dfu->dev_type = DFU_DEV_NAND;
 	st = strsep(&s, " ");
@@ -203,6 +204,7 @@ int dfu_fill_entity_nand(struct dfu_entity *dfu, char *devstr, char *s)
 		s++;
 		dfu->data.nand.size = simple_strtoul(s, &s, 16);
 	} else if ((!strcmp(st, "part")) || (!strcmp(st, "partubi"))) {
+#ifndef CONFIG_SPL_BUILD
 		char mtd_id[32];
 		struct mtd_device *mtd_dev;
 		u8 part_num;
@@ -229,6 +231,7 @@ int dfu_fill_entity_nand(struct dfu_entity *dfu, char *devstr, char *s)
 		dfu->data.nand.size = pi->size;
 		if (!strcmp(st, "partubi"))
 			dfu->data.nand.ubi = 1;
+#endif
 	} else {
 		printf("%s: Memory layout (%s) not supported!\n", __func__, st);
 		return -1;

commit 6f14746b0c5977b93f126c43b2a80198758399b9
Author: Paweł Jarosz <paweljarosz3691@gmail.com>
Date:   Thu Aug 17 15:14:30 2017 +0200

    rockchip: mkimage: add support for rockchip nand boot image
    
    The Rockchip boot ROM requires a particular file format for booting from NAND:
    
    * It starts with 512-byte, rc4 encoded header and is aligned to nand page size
    
    * Then first 2KB of first stage loader (tpl) aligned to nand page size
    * n empty pages
    
    * second 2KB of first stage loader (tpl) aligned to nand page size
    * n empty pages
    
    * ...
    
    * first 2KB of second stage loader (spl) aligned to nand page size
    * n empty pages
    
    * second 2KB of first stage loader (spl) aligned to nand page size
    * n empty pages
    
    * ...
    
    Size of spl and tpl must be aligned to 2KB.
    
    example usage for nand with page size 16384 and one empty page in iteration:
    
        # mkimage -n rk3066 -T rknand -d ./u-boot/tpl/u-boot-tpl.bin:./u-boot/spl/u-boot-spl.bin -X 16384,1 out
    
    Change-Id: Ie4ecb50637449251956a868272ce51ef489c7a1e
    Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/image.c b/common/image.c
index a058eb85e1..f5f6cd235b 100644
--- a/common/image.c
+++ b/common/image.c
@@ -167,6 +167,7 @@ static const table_entry_t uimage_type[] = {
 	{	IH_TYPE_FPGA,       "fpga",       "FPGA Image" },
 	{       IH_TYPE_TEE,        "tee",        "Trusted Execution Environment Image",},
 	{	IH_TYPE_FIRMWARE_IVT, "firmware_ivt", "Firmware with HABv4 IVT" },
+	{	IH_TYPE_RKNAND,     "rknand",     "Rockchip NAND Boot Image" },
 	{	-1,		    "",		  "",			},
 };
 
diff --git a/include/image.h b/include/image.h
index 1f4bfda2f3..10ff094709 100644
--- a/include/image.h
+++ b/include/image.h
@@ -269,6 +269,7 @@ enum {
 	IH_TYPE_VYBRIDIMAGE,	/* VYBRID .vyb Image */
 	IH_TYPE_TEE,            /* Trusted Execution Environment OS Image */
 	IH_TYPE_FIRMWARE_IVT,		/* Firmware Image with HABv4 IVT */
+	IH_TYPE_RKNAND,			/* Rockchip NAND Boot Image	*/
 
 	IH_TYPE_COUNT,			/* Number of image types */
 };
diff --git a/tools/Makefile b/tools/Makefile
index a0db19d6b0..8e1009bf6c 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -79,7 +79,7 @@ RSA_OBJS-$(CONFIG_FIT_SIGNATURE) := $(addprefix lib/rsa/, \
 					rsa-sign.o rsa-verify.o rsa-checksum.o \
 					rsa-mod-exp.o)
 
-ROCKCHIP_OBS = lib/rc4.o rkcommon.o rkimage.o rksd.o rkspi.o
+ROCKCHIP_OBS = lib/rc4.o rkcommon.o rkimage.o rknand.o rksd.o rkspi.o
 
 # common objs for dumpimage and mkimage
 dumpimage-mkimage-objs := aisimage.o \
diff --git a/tools/imagetool.h b/tools/imagetool.h
index a8d505423b..0b2a707037 100644
--- a/tools/imagetool.h
+++ b/tools/imagetool.h
@@ -77,6 +77,7 @@ struct image_tool_params {
 	bool quiet;		/* Don't output text in normal operation */
 	unsigned int external_offset;	/* Add padding to external data */
 	const char *engine_id;	/* Engine to use for signing */
+	char *extraparams;	/* Extra parameters for img creation (-X) */
 };
 
 /*
diff --git a/tools/mkimage.c b/tools/mkimage.c
index 28ff35e670..ffc91d2319 100644
--- a/tools/mkimage.c
+++ b/tools/mkimage.c
@@ -144,7 +144,7 @@ static void process_args(int argc, char **argv)
 	int opt;
 
 	while ((opt = getopt(argc, argv,
-			     "a:A:b:c:C:d:D:e:Ef:Fk:i:K:ln:N:p:O:rR:qsT:vVx")) != -1) {
+			     "a:A:b:c:C:d:D:e:Ef:Fk:i:K:ln:N:p:O:rR:qsT:vVxX:")) != -1) {
 		switch (opt) {
 		case 'a':
 			params.addr = strtoull(optarg, &ptr, 16);
@@ -279,6 +279,9 @@ static void process_args(int argc, char **argv)
 		case 'x':
 			params.xflag++;
 			break;
+		case 'X':
+			params.extraparams = optarg;
+			break;
 		default:
 			usage("Invalid option");
 		}
@@ -416,7 +419,8 @@ int main(int argc, char **argv)
 		exit (retval);
 	}
 
-	if ((params.type != IH_TYPE_MULTI) && (params.type != IH_TYPE_SCRIPT)) {
+	if ((params.type != IH_TYPE_MULTI) && (params.type != IH_TYPE_SCRIPT) &&
+	    (params.type != IH_TYPE_RKNAND)) {
 		dfd = open(params.datafile, O_RDONLY | O_BINARY);
 		if (dfd < 0) {
 			fprintf(stderr, "%s: Can't open %s: %s\n",
diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index 9fae9bc2c6..8c18e0567c 100644
--- a/tools/rkcommon.c
+++ b/tools/rkcommon.c
@@ -73,6 +73,7 @@ struct spl_info {
 
 static struct spl_info spl_infos[] = {
 	{ "rk3036", "RK30", 0x1000, false, false },
+	{ "rk3066", "RK30", 0x8000, true, false },
 	{ "rk3128", "RK31", 0x1800, false, false },
 	{ "rk3188", "RK31", 0x8000 - 0x800, true, false },
 	{ "rk322x", "RK32", 0x8000 - 0x1000, false, false },
@@ -168,7 +169,7 @@ bool rkcommon_spl_is_boot0(struct image_tool_params *params)
 	return info->spl_boot0;
 }
 
-static void rkcommon_set_header0(void *buf, uint file_size,
+static void rkcommon_set_header0(void *buf, uint file_size, uint max_size,
 				 struct image_tool_params *params)
 {
 	struct header0_info *hdr = buf;
@@ -195,12 +196,13 @@ static void rkcommon_set_header0(void *buf, uint file_size,
 	 * see https://lists.denx.de/pipermail/u-boot/2017-May/293267.html
 	 * for a more detailed explanation by Andy Yan
 	 */
-	hdr->init_boot_size = hdr->init_size + RK_MAX_BOOT_SIZE / RK_BLK_SIZE;
+	hdr->init_boot_size = hdr->init_size + DIV_ROUND_UP(max_size, RK_BLK_SIZE);
+	hdr->init_boot_size = ROUND(hdr->init_boot_size, 4);
 
 	rc4_encode(buf, RK_BLK_SIZE, rc4_key);
 }
 
-int rkcommon_set_header(void *buf, uint file_size,
+int rkcommon_set_header(void *buf, uint file_size, uint max_size,
 			struct image_tool_params *params)
 {
 	struct header1_info *hdr = buf + RK_SPL_HDR_START;
@@ -208,7 +210,7 @@ int rkcommon_set_header(void *buf, uint file_size,
 	if (file_size > rkcommon_get_spl_size(params))
 		return -ENOSPC;
 
-	rkcommon_set_header0(buf, file_size, params);
+	rkcommon_set_header0(buf, file_size, max_size, params);
 
 	/* Set up the SPL name (i.e. copy spl_hdr over) */
 	memcpy(&hdr->magic, rkcommon_get_spl_hdr(params), RK_SPL_HDR_SIZE);
diff --git a/tools/rkcommon.h b/tools/rkcommon.h
index 8790f1ceab..cd357c71d0 100644
--- a/tools/rkcommon.h
+++ b/tools/rkcommon.h
@@ -44,6 +44,14 @@ const char *rkcommon_get_spl_hdr(struct image_tool_params *params);
  */
 int rkcommon_get_spl_size(struct image_tool_params *params);
 
+/**
+ * rkcommon_spl_is_boot0() - is magic included in spl
+ *
+ * Returns true if magic (for example RK30) is included in spl
+ */
+
+bool rkcommon_spl_is_boot0(struct image_tool_params *params);
+
 /**
  * rkcommon_set_header() - set up the header for a Rockchip boot image
  *
@@ -53,7 +61,7 @@ int rkcommon_get_spl_size(struct image_tool_params *params);
  * @file_size:	Size of the file we want the boot ROM to load, in bytes
  * @return 0 if OK, -ENOSPC if too large
  */
-int rkcommon_set_header(void *buf, uint file_size,
+int rkcommon_set_header(void *buf, uint file_size, uint max_size,
 			struct image_tool_params *params);
 
 /**
diff --git a/tools/rknand.c b/tools/rknand.c
new file mode 100644
index 0000000000..690af2de4b
--- /dev/null
+++ b/tools/rknand.c
@@ -0,0 +1,156 @@
+/*
+ * Copyright (c) 2017 Paweł Jarosz <paweljarosz3691@gmail.com>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include "imagetool.h"
+#include <image.h>
+#include <rc4.h>
+#include "mkimage.h"
+#include "rkcommon.h"
+
+enum {
+	RKNAND_SECT_LEN = RK_BLK_SIZE * 4,
+};
+
+struct rknand_info {
+	uint32_t pagesize;
+	uint32_t skippages;
+	uint32_t tplsize;
+	uint32_t splsize;
+	uint32_t tplpaddedsize;
+	uint32_t splpaddedsize;
+	uint32_t itersize;
+	uint32_t tplsplsize;
+	char *tplfile;
+	char *splfile;
+};
+
+struct rknand_info ninfo;
+
+static uint32_t rknand_get_file_size(char *filename)
+{
+	int dfd;
+	struct stat sbuf;
+
+	dfd = open(filename, O_RDONLY | O_BINARY);
+	if (dfd < 0) {
+		fprintf(stderr, "Can't open %s: %s\n", filename, strerror(errno));
+		exit(EXIT_FAILURE);
+	}
+
+	if (fstat(dfd, &sbuf) < 0) {
+		fprintf(stderr, "Can't stat %s: %s\n", filename, strerror(errno));
+		exit(EXIT_FAILURE);
+	}
+
+	close(dfd);
+
+	return sbuf.st_size;
+}
+
+static void rknand_fill_ninfo(struct image_tool_params *params)
+{
+	sscanf(params->extraparams, "%u,%u", &ninfo.pagesize, &ninfo.skippages);
+
+	ninfo.tplfile = params->datafile;
+	if ((ninfo.splfile = strchr(params->datafile, ':')) != NULL) {
+		*ninfo.splfile = '\0';
+		ninfo.splfile += 1;
+	}
+
+	ninfo.tplsize = rknand_get_file_size(ninfo.tplfile);
+	ninfo.splsize = rknand_get_file_size(ninfo.splfile);
+
+	ninfo.tplpaddedsize = ROUND(ninfo.tplsize + 
+		(rkcommon_spl_is_boot0(params) ? 0 : 4), RKNAND_SECT_LEN);
+
+	ninfo.splpaddedsize = ROUND(ninfo.splsize, RKNAND_SECT_LEN);
+
+	ninfo.itersize = ninfo.pagesize * (ninfo.skippages + 1);
+	ninfo.tplsplsize = ((ninfo.tplpaddedsize + ninfo.splpaddedsize) /
+		     RKNAND_SECT_LEN) * ninfo.itersize;
+}
+
+static void rknand_set_header(void *buf, struct stat *sbuf, int ifd,
+			     struct image_tool_params *params)
+{
+	int sector, sploffset, splfd, ret;
+
+	ret = rkcommon_set_header(buf, ninfo.tplsize, ninfo.splsize, params);
+	if (ret) {
+		printf("Warning: TPL image is too large (size %#x) and will "
+		       "not boot\n", ninfo.tplsize);
+	}
+
+	if ((splfd = open(ninfo.splfile, O_RDONLY | O_BINARY)) < 0) {
+		fprintf (stderr, "%s: Can't open %s: %s\n",
+			params->cmdname, ninfo.splfile, strerror(errno));
+		exit (EXIT_FAILURE);
+	}
+
+	sploffset = RKNAND_SECT_LEN + ninfo.tplpaddedsize;
+	if (read(splfd, buf + sploffset, ninfo.splsize) != ninfo.splsize) {
+		fprintf (stderr, "%s: Read error on %s: %s\n",
+			params->cmdname, ninfo.splfile, strerror(errno));
+		exit (EXIT_FAILURE);
+	}
+	close(splfd);
+
+	if (rkcommon_need_rc4_spl(params))
+		rkcommon_rc4_encode_spl(buf, sploffset, ninfo.splpaddedsize);
+
+	/*
+	 * Spread the image out so we only use the first 2KB of each pagesize
+	 * region. This is a feature of the NAND format required by the Rockchip
+	 * boot ROM.
+	 */
+	for (sector = ninfo.tplsplsize / ninfo.itersize - 1; sector >= 0; sector--) {
+		memmove(buf + sector * ninfo.itersize + ninfo.pagesize,
+			buf + (sector + 1) * RKNAND_SECT_LEN, RKNAND_SECT_LEN);
+
+		if (sector < (ninfo.tplsplsize / ninfo.itersize - 1))
+			memset(buf + sector * ninfo.itersize  + ninfo.pagesize +
+			       RKNAND_SECT_LEN, 0xFF, ninfo.itersize -
+			       RKNAND_SECT_LEN);
+	}
+	memset(buf + RKNAND_SECT_LEN, 0xFF, ninfo.pagesize - RKNAND_SECT_LEN);
+	memset(buf + ninfo.tplsplsize - ninfo.pagesize + RKNAND_SECT_LEN, 0xFF,
+	       ninfo.pagesize - RKNAND_SECT_LEN);
+}
+
+static int rknand_check_image_type(uint8_t type)
+{
+	if (type == IH_TYPE_RKNAND)
+		return EXIT_SUCCESS;
+	else
+		return EXIT_FAILURE;
+}
+
+static int rknand_vrec_header(struct image_tool_params *params,
+			     struct image_type_params *tparams)
+{
+	rknand_fill_ninfo(params);
+	rkcommon_vrec_header(params, tparams, RKNAND_SECT_LEN);
+
+	return ninfo.tplsplsize - tparams->header_size - ninfo.tplsize;
+}
+
+/*
+ * rknand parameters
+ */
+U_BOOT_IMAGE_TYPE(
+	rknand,
+	"Rockchip NAND Boot Image support",
+	0,
+	NULL,
+	rkcommon_check_params,
+	rkcommon_verify_header,
+	rkcommon_print_header,
+	rknand_set_header,
+	NULL,
+	rknand_check_image_type,
+	NULL,
+	rknand_vrec_header
+);
diff --git a/tools/rksd.c b/tools/rksd.c
index c56153d2ca..164c1fbcb7 100644
--- a/tools/rksd.c
+++ b/tools/rksd.c
@@ -26,7 +26,7 @@ static void rksd_set_header(void *buf,  struct stat *sbuf,  int ifd,
 	 * header).
 	 */
 	size = params->file_size - RK_SPL_HDR_START;
-	ret = rkcommon_set_header(buf, size, params);
+	ret = rkcommon_set_header(buf, size, RK_MAX_BOOT_SIZE, params);
 	if (ret) {
 		/* TODO(sjg@chromium.org): This method should return an error */
 		printf("Warning: SPL image is too large (size %#x) and will "
diff --git a/tools/rkspi.c b/tools/rkspi.c
index 4332ce1765..5005051d39 100644
--- a/tools/rkspi.c
+++ b/tools/rkspi.c
@@ -25,7 +25,7 @@ static void rkspi_set_header(void *buf, struct stat *sbuf, int ifd,
 	int ret;
 
 	size = params->orig_file_size;
-	ret = rkcommon_set_header(buf, size, params);
+	ret = rkcommon_set_header(buf, size, RK_MAX_BOOT_SIZE, params);
 	debug("size %x\n", size);
 	if (ret) {
 		/* TODO(sjg@chromium.org): This method should return an error */

commit a3584243c99c9a2c2276ef4cef5ab2dd7306bc5b
Author: Paweł Jarosz <paweljarosz3691@gmail.com>
Date:   Thu Aug 17 15:14:09 2017 +0200

    mtd: nand: add the rockchip nand controller driver
    
    Add basic Rockchip nand driver.
    
    Driver in current state has 16, 24, 40, 60 per 1024B BCH/ECC ability and 8 bit asynchronous flash interface support. Other features will come later.
    
    Change-Id: I8e766afe7358a2357d75cfe094c4cd6fe92bd281
    Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 85b26d6088..b43d86d050 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -76,6 +76,12 @@ config NAND_PXA3XX
 	  This enables the driver for the NAND flash device found on
 	  PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2).
 
+config NAND_ROCKCHIP
+	bool "Support for NAND on Rockchip SoCs"
+	select SYS_NAND_SELF_INIT
+	---help---
+	Enable support for Rockchip nand.
+
 config NAND_SUNXI
 	bool "Support for NAND on Allwinner SoCs"
 	depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 9f7d9d6ff7..f5d191dd1c 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -66,6 +66,7 @@ obj-$(CONFIG_NAND_OMAP_ELM) += omap_elm.o
 obj-$(CONFIG_NAND_PLAT) += nand_plat.o
 obj-$(CONFIG_NAND_SUNXI) += sunxi_nand.o
 obj-$(CONFIG_NAND_ZYNQ) += zynq_nand.o
+obj-$(CONFIG_NAND_ROCKCHIP) += rockchip_nand.o
 
 else  # minimal SPL drivers
 
diff --git a/drivers/mtd/nand/rockchip_nand.c b/drivers/mtd/nand/rockchip_nand.c
new file mode 100644
index 0000000000..d8f443972a
--- /dev/null
+++ b/drivers/mtd/nand/rockchip_nand.c
@@ -0,0 +1,660 @@
+/*
+ * Copyright (c) 2017 Yifeng Zhao <yifeng.zhao@rock-chips.com>
+ * Copyright (c) 2017 Paweł Jarosz <paweljarosz3691@gmail.com>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <fdtdec.h>
+#include <inttypes.h>
+#include <nand.h>
+#include <linux/kernel.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/partitions.h>
+#include <linux/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define NANDC_V6_BOOTROM_ECC	24
+#define	NANDC_V6_NUM_BANKS	8
+#define NANDC_V6_DEF_TIMEOUT	20000
+#define NANDC_V6_READ		0
+#define NANDC_V6_WRITE		1
+
+#define	NANDC_REG_V6_FMCTL	0x00
+#define	NANDC_REG_V6_FMWAIT	0x04
+#define	NANDC_REG_V6_FLCTL	0x08
+#define	NANDC_REG_V6_BCHCTL	0x0c
+#define	NANDC_REG_V6_DMA_CFG	0x10
+#define	NANDC_REG_V6_DMA_BUF0	0x14
+#define	NANDC_REG_V6_DMA_BUF1	0x18
+#define	NANDC_REG_V6_DMA_ST	0x1C
+#define	NANDC_REG_V6_BCHST	0x20
+#define	NANDC_REG_V6_RANDMZ	0x150
+#define	NANDC_REG_V6_VER	0x160
+#define	NANDC_REG_V6_INTEN	0x16C
+#define	NANDC_REG_V6_INTCLR 	0x170
+#define	NANDC_REG_V6_INTST	0x174
+#define	NANDC_REG_V6_SPARE0	0x200
+#define	NANDC_REG_V6_SPARE1	0x230
+#define	NANDC_REG_V6_BANK0	0x800
+#define	NANDC_REG_V6_SRAM0	0x1000
+#define	NANDC_REG_V6_SRAM_SIZE	0x400
+
+#define NANDC_REG_V6_DATA	0x00
+#define NANDC_REG_V6_ADDR	0x04
+#define NANDC_REG_V6_CMD	0x08
+
+/* FMCTL */
+#define NANDC_V6_FM_WP		BIT(8)
+#define NANDC_V6_FM_CE_SEL_M	0xFF
+#define NANDC_V6_FM_CE_SEL(x)	(1 << (x))
+#define NANDC_V6_FM_FREADY	BIT(9)
+
+/* FLCTL */
+#define NANDC_V6_FL_RST		BIT(0)
+#define NANDC_V6_FL_DIR_S	0x1
+#define NANDC_V6_FL_XFER_START	BIT(2)
+#define NANDC_V6_FL_XFER_EN	BIT(3)
+#define NANDC_V6_FL_ST_BUF_S	0x4
+#define NANDC_V6_FL_XFER_COUNT	BIT(5)
+#define NANDC_V6_FL_ACORRECT	BIT(10)
+#define NANDC_V6_FL_XFER_READY	BIT(20)
+
+/* BCHCTL */
+#define NAND_V6_BCH_REGION_S	0x5
+#define NAND_V6_BCH_REGION_M	0x7	
+
+/* BCHST */
+#define NANDC_V6_BCH0_ST_ERR	BIT(2)
+#define NANDC_V6_BCH1_ST_ERR	BIT(15)
+#define NANDC_V6_ECC_ERR_CNT0(x) ((((x & (0x1F << 3)) >> 3) \
+				| ((x & (1 << 27)) >> 22)) & 0x3F)
+#define NANDC_V6_ECC_ERR_CNT1(x) ((((x & (0x1F << 16)) >> 16) \
+				| ((x & (1 << 29)) >> 24)) & 0x3F)
+
+struct rk_nand {
+	uint32_t banks[NANDC_V6_NUM_BANKS];
+	struct nand_hw_control controller;
+	uint32_t ecc_strength;
+	struct mtd_info mtd;
+	bool bootromblocks;
+	void __iomem *regs;
+	int selected_bank;
+};
+
+static struct nand_ecclayout nand_oob_fix = {
+	.eccbytes = 24,
+	.eccpos = {
+		   4, 5, 6, 7, 8, 9, 10},
+	.oobfree = {
+		{.offset = 0,
+		 .length = 4} }
+};
+
+static inline struct rk_nand *to_rknand(struct nand_hw_control *ctrl)
+{
+	return container_of(ctrl, struct rk_nand, controller);
+}
+
+static void rockchip_nand_init(struct rk_nand *rknand)
+{
+	writel(0, rknand->regs + NANDC_REG_V6_RANDMZ);
+	writel(0, rknand->regs + NANDC_REG_V6_DMA_CFG);
+	writel(0, rknand->regs + NANDC_REG_V6_BCHCTL);
+	writel(NANDC_V6_FM_WP, rknand->regs + NANDC_REG_V6_FMCTL);
+	writel(0x1081, rknand->regs + NANDC_REG_V6_FMWAIT);
+}
+
+static void rockchip_nand_select_chip(struct mtd_info *mtd, int chipnr)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct rk_nand *rknand = to_rknand(chip->controller);
+	void __iomem *bank_base;
+	uint32_t reg;
+	int banknr;
+
+	reg = readl(rknand->regs + NANDC_REG_V6_FMCTL);
+	reg &= ~NANDC_V6_FM_CE_SEL_M;
+
+	if (chipnr == -1) {
+		banknr = -1;
+	} else {
+		banknr = rknand->banks[chipnr];
+		bank_base = rknand->regs + NANDC_REG_V6_BANK0 + banknr * 0x100;
+
+		chip->IO_ADDR_R = bank_base;
+		chip->IO_ADDR_W = bank_base;
+
+		reg |= 1 << banknr;
+	}
+	writel(reg, rknand->regs + NANDC_REG_V6_FMCTL);
+
+	rknand->selected_bank = banknr;
+}
+
+static void rockchip_nand_cmd_ctrl(struct mtd_info *mtd,
+				   int dat,
+				   unsigned int ctrl)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct rk_nand *rknand = to_rknand(chip->controller);
+	void __iomem *bank_base = rknand->regs + NANDC_REG_V6_BANK0
+				+ rknand->selected_bank * 0x100;
+
+	if (ctrl & NAND_CTRL_CHANGE) {
+		if (ctrl & NAND_ALE)
+			bank_base += NANDC_REG_V6_ADDR;
+		else if (ctrl & NAND_CLE)
+			bank_base += NANDC_REG_V6_CMD;
+		chip->IO_ADDR_W = bank_base;
+	}
+
+	if (dat != NAND_CMD_NONE)
+		writeb(dat & 0xFF, chip->IO_ADDR_W);
+}
+
+static void rockchip_nand_read_buf(struct mtd_info *mtd,
+				   uint8_t *buf,
+				   int len)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct rk_nand *rknand = to_rknand(chip->controller);
+	int offs = 0;
+	void __iomem *bank_base = rknand->regs + NANDC_REG_V6_BANK0
+				+ rknand->selected_bank * 0x100;
+
+	for (offs = 0; offs < len; offs++)
+		buf[offs] = readb(bank_base);
+}
+
+static void rockchip_nand_write_buf(struct mtd_info *mtd,
+				    const uint8_t *buf,
+				    int len)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct rk_nand *rknand = to_rknand(chip->controller);
+	int offs = 0;
+	void __iomem *bank_base = rknand->regs + NANDC_REG_V6_BANK0
+				+ rknand->selected_bank * 0x100;
+
+	for (offs = 0; offs < len; offs++)
+		writeb(buf[offs], bank_base);
+}
+
+static uint8_t rockchip_nand_read_byte(struct mtd_info *mtd)
+{
+	uint8_t ret;
+
+	rockchip_nand_read_buf(mtd, &ret, 1);
+
+	return ret;
+}
+
+static int rockchip_nand_dev_ready(struct mtd_info *mtd)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct rk_nand *rknand = to_rknand(chip->controller);
+
+	if (readl(rknand->regs + NANDC_REG_V6_FMCTL) & NANDC_V6_FM_FREADY)
+		return 1;
+
+	return 0;
+}
+
+static int rockchip_nand_hw_ecc_setup(struct mtd_info *mtd,
+				      struct nand_ecc_ctrl *ecc,
+				      uint32_t strength)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct rk_nand *rknand = to_rknand(chip->controller);
+	u32 reg;
+
+	ecc->strength = strength;
+	ecc->bytes = DIV_ROUND_UP(ecc->strength * 14, 8);
+	ecc->bytes = ALIGN(ecc->bytes, 2);
+
+	switch (ecc->strength) {
+	case 60:
+		reg = 0x00040010;
+		break;
+	case 40:
+		reg = 0x00040000;
+		break;
+	case 24:
+		reg = 0x00000010;
+		break;
+	case 16:
+		reg = 0x00000000;
+		break;
+	default:
+		return -EINVAL;
+	}
+	writel(reg, rknand->regs + NANDC_REG_V6_BCHCTL);
+
+	return 0;
+}
+
+static void rockchip_nand_pio_xfer_start(struct rk_nand *rknand,
+					 u8 dir,
+					 u8 st_buf)
+{
+	u32 reg;
+
+	reg = readl(rknand->regs + NANDC_REG_V6_BCHCTL);
+	reg = (reg & (~(NAND_V6_BCH_REGION_M << NAND_V6_BCH_REGION_S))) |
+	      (rknand->selected_bank << NAND_V6_BCH_REGION_S);
+	writel(reg, rknand->regs + NANDC_REG_V6_BCHCTL);
+
+	reg = (dir << NANDC_V6_FL_DIR_S) | (st_buf << NANDC_V6_FL_ST_BUF_S) |
+	      NANDC_V6_FL_XFER_EN | NANDC_V6_FL_XFER_COUNT |
+	      NANDC_V6_FL_ACORRECT;
+	writel(reg, rknand->regs + NANDC_REG_V6_FLCTL);
+
+	reg |= NANDC_V6_FL_XFER_START;
+	writel(reg, rknand->regs + NANDC_REG_V6_FLCTL);
+}
+
+static int rockchip_nand_wait_pio_xfer_done(struct rk_nand *rknand)
+{
+	int timeout = NANDC_V6_DEF_TIMEOUT;
+	int reg;
+
+	while (timeout--) {
+		reg = readl(rknand->regs + NANDC_REG_V6_FLCTL);
+
+		if ((reg & NANDC_V6_FL_XFER_READY) != 0)
+			break;
+
+		udelay(1);
+	}
+
+	if (timeout == 0)
+		return -1;
+
+	return 0;
+}
+
+static void rockchip_nand_read_extra_oob(struct mtd_info *mtd, u8 *oob)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct nand_ecc_ctrl *ecc = &chip->ecc;
+	int offset = ((ecc->bytes + ecc->prepad) * ecc->steps);
+	int len = mtd->oobsize - offset;
+
+	if (len <= 0)
+		return;
+
+	chip->cmdfunc(mtd, NAND_CMD_RNDOUT, offset + mtd->writesize, -1);
+
+	rockchip_nand_read_buf(mtd, oob + offset, len);
+}
+
+static void rockchip_nand_write_extra_oob(struct mtd_info *mtd, u8 *oob)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct nand_ecc_ctrl *ecc = &chip->ecc;
+	int offset = ((ecc->bytes + ecc->prepad) * ecc->steps);
+	int len = mtd->oobsize - offset;
+
+	if (len <= 0)
+		return;
+
+	chip->cmdfunc(mtd, NAND_CMD_RNDIN, offset + mtd->writesize, -1);
+
+	rockchip_nand_write_buf(mtd, oob + offset, len);
+}
+
+
+static int rockchip_nand_hw_syndrome_pio_read_page(struct mtd_info *mtd,
+						   struct nand_chip *chip,
+						   uint8_t *buf,
+						   int oob_required,
+						   int page)
+{
+	struct rk_nand *rknand = to_rknand(chip->controller);
+	struct nand_ecc_ctrl *ecc = &chip->ecc;
+	void __iomem *sram_base = rknand->regs + NANDC_REG_V6_SRAM0;
+	unsigned int max_bitflips = 0;
+	int ret, step, bch_st;
+	int offset = page * mtd->writesize;
+
+	if (rknand->bootromblocks && (offset < (7 * mtd->erasesize)))
+		rockchip_nand_hw_ecc_setup(mtd, ecc, NANDC_V6_BOOTROM_ECC);
+
+	rockchip_nand_pio_xfer_start(rknand, NANDC_V6_READ, 0);
+
+	for (step = 0; step < ecc->steps; step++) {
+		int data_off = step * ecc->size;
+		int oob_off = step * (ecc->bytes + ecc->prepad);
+		u8 *data = buf + data_off;
+		u8 *oob = chip->oob_poi + oob_off;
+
+		ret = rockchip_nand_wait_pio_xfer_done(rknand);
+		if (ret)
+			return ret;
+
+		bch_st = readl(rknand->regs + NANDC_REG_V6_BCHST);
+
+		if (bch_st & NANDC_V6_BCH0_ST_ERR) {
+			mtd->ecc_stats.failed++;
+			max_bitflips = -1;
+		} else {
+			ret = NANDC_V6_ECC_ERR_CNT0(bch_st);
+			mtd->ecc_stats.corrected += ret;
+			max_bitflips = max_t(unsigned int, max_bitflips, ret);
+		}
+
+		if ((step + 1) < ecc->steps)
+			rockchip_nand_pio_xfer_start(rknand, NANDC_V6_READ,
+					      		(step + 1) & 0x1);
+
+		memcpy_fromio(data, sram_base + NANDC_REG_V6_SRAM_SIZE *
+			     				(step & 1), ecc->size);
+
+		if (step & 1)
+			memcpy_fromio(oob, rknand->regs + NANDC_REG_V6_SPARE1, 4);
+		else
+			memcpy_fromio(oob, rknand->regs + NANDC_REG_V6_SPARE0, 4);
+	}
+
+	rockchip_nand_read_extra_oob(mtd, chip->oob_poi);
+
+	if (rknand->bootromblocks)
+		rockchip_nand_hw_ecc_setup(mtd, ecc, rknand->ecc_strength);
+
+	return max_bitflips;
+}
+
+static uint32_t rockchip_nand_make_bootrom_compat(struct mtd_info *mtd,
+						  int page,
+						  const u8 *oob,
+						  bool bootromblocks)
+{
+	int pages_per_block = mtd->erasesize / mtd->writesize;
+	int offset = page * mtd->writesize;
+
+	if ((offset < (2 * mtd->erasesize)) || !(page % 2) ||
+	    (offset >= (7 * mtd->erasesize)) || !bootromblocks)
+		return oob[3] | (oob[2] << 8) | (oob[1] << 16) | (oob[0] << 24);
+
+	return (page % pages_per_block + 1) * 4;
+}
+
+static int rockchip_nand_hw_syndrome_pio_write_page(struct mtd_info *mtd,
+						    struct nand_chip *chip,
+						    const uint8_t *buf,
+						    int oob_required,
+						    int page)
+{
+	struct rk_nand *rknand = to_rknand(chip->controller);
+	struct nand_ecc_ctrl *ecc = &chip->ecc;
+	void __iomem *sram_base = rknand->regs + NANDC_REG_V6_SRAM0;
+	int ret, index, step = 0;
+	int offset = page * mtd->writesize;
+	int data_off = step * ecc->size;
+	int oob_off = step * (ecc->bytes + ecc->prepad);
+	const u8 *data = buf + data_off;
+	const u8 *oob = chip->oob_poi + oob_off;
+
+	if (rknand->bootromblocks && (offset < (7 * mtd->erasesize)))
+		rockchip_nand_hw_ecc_setup(mtd, ecc, NANDC_V6_BOOTROM_ECC);
+
+	index = rockchip_nand_make_bootrom_compat(mtd, page, oob,
+					   rknand->bootromblocks);
+
+	memcpy_toio(sram_base, data, ecc->size);
+	memcpy_toio(rknand->regs + NANDC_REG_V6_SPARE0, &index, ecc->prepad);
+
+	for (step = 1; step <= ecc->steps; step++) {
+		rockchip_nand_pio_xfer_start(rknand, NANDC_V6_WRITE,
+					     (step - 1) & 0x1);
+
+		data_off = step * ecc->size;
+		oob_off = step * (ecc->bytes + ecc->prepad);
+		data = buf + data_off;
+		oob = chip->oob_poi + oob_off;
+
+		if (step < ecc->steps) {
+			memcpy_toio(sram_base + NANDC_REG_V6_SRAM_SIZE * 
+				    (step & 1), data, ecc->size);
+			if (step & 1)
+				memcpy_toio(rknand->regs + NANDC_REG_V6_SPARE1,
+					    oob, ecc->prepad);
+			else
+				memcpy_toio(rknand->regs + NANDC_REG_V6_SPARE0,
+					    oob, ecc->prepad);
+		}
+
+		ret = rockchip_nand_wait_pio_xfer_done(rknand);
+		if (ret)
+			return ret;
+	}
+
+	rockchip_nand_write_extra_oob(mtd, chip->oob_poi);
+
+	rockchip_nand_hw_ecc_setup(mtd, ecc, rknand->ecc_strength);
+
+	return 0;
+}
+
+static const u8 strengths[] = {60, 40, 24, 16};
+
+static int rockchip_nand_ecc_max_strength(struct mtd_info *mtd,
+					  struct nand_ecc_ctrl *ecc)
+{
+	uint32_t max_strength, index;
+	
+	max_strength = ((mtd->oobsize / ecc->steps) - ecc->prepad) * 8 / 14;
+
+	for (index = 0; index < ARRAY_SIZE(strengths); index++)
+		if (max_strength >= strengths[index])
+			break;
+
+	if (index >= ARRAY_SIZE(strengths))
+		return -ENOTSUPP;
+
+	return strengths[index];
+}
+
+static bool rockchip_nand_strength_is_valid(int strength)
+{
+	uint32_t index;
+
+	for (index = 0; index < ARRAY_SIZE(strengths); index++)
+		if (strength == strengths[index])
+			break;
+
+	if (index == ARRAY_SIZE(strengths))
+		return false;
+
+	return true;
+}
+
+static int rockchip_nand_hw_ecc_ctrl_init(struct mtd_info *mtd,
+					  struct nand_ecc_ctrl *ecc)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct rk_nand *rknand = to_rknand(chip->controller);
+	uint32_t strength;
+	int index;
+
+	ecc->prepad = 4;
+	ecc->steps = mtd->writesize / ecc->size;
+
+	if (fdtdec_get_bool(gd->fdt_blob, chip->flash_node,
+			    "rockchip,protect-bootrom-blocks"))
+                rknand->bootromblocks = true;
+	else
+		rknand->bootromblocks = false;
+
+	if (rockchip_nand_strength_is_valid(ecc->strength))
+		strength = ecc->strength;
+	else
+		strength = rockchip_nand_ecc_max_strength(mtd, ecc);
+
+	rockchip_nand_hw_ecc_setup(mtd, ecc, strength);
+
+	rknand->ecc_strength = ecc->strength;
+
+	nand_oob_fix.eccbytes = ecc->bytes * ecc->steps;
+	for (index = 0; index < ecc->bytes; index++)
+		nand_oob_fix.eccpos[index] = index + ecc->prepad;
+	ecc->layout = &nand_oob_fix;
+
+	if (mtd->oobsize < ((ecc->bytes + ecc->prepad) * ecc->steps)) {
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int rockchip_nand_ecc_init(struct mtd_info *mtd,
+				  struct nand_ecc_ctrl *ecc)
+{
+	int ret;
+
+	switch (ecc->mode) {
+	case NAND_ECC_HW_SYNDROME:
+		ret = rockchip_nand_hw_ecc_ctrl_init(mtd, ecc);
+		if (ret)
+			return ret;
+		ecc->read_page =  rockchip_nand_hw_syndrome_pio_read_page;
+		ecc->write_page = rockchip_nand_hw_syndrome_pio_write_page;
+		break;
+	case NAND_ECC_SOFT_BCH:
+	case NAND_ECC_NONE:
+	case NAND_ECC_SOFT:
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int rockchip_nand_chip_init(int node, struct rk_nand *rknand, int devnum)
+{
+	const void *blob = gd->fdt_blob;
+	struct nand_chip *chip;
+	struct mtd_info *mtd;
+	int ret;
+
+	chip = kzalloc(sizeof(*chip), GFP_KERNEL);
+
+	chip->chip_delay = 50;
+	chip->flash_node = node;
+	chip->select_chip = rockchip_nand_select_chip;
+	chip->cmd_ctrl = rockchip_nand_cmd_ctrl;
+	chip->read_buf = rockchip_nand_read_buf;
+	chip->write_buf = rockchip_nand_write_buf;
+	chip->read_byte = rockchip_nand_read_byte;
+	chip->dev_ready = rockchip_nand_dev_ready;
+	chip->controller = &rknand->controller;
+
+	rknand->banks[devnum] = fdtdec_get_int(blob, node, "reg", -1);
+
+	if (rknand->banks[devnum] < 0)
+		return -EINVAL;
+
+	mtd = nand_to_mtd(chip);
+	mtd->name = "rknand";
+
+	ret = nand_scan_ident(mtd, 1, NULL);
+	if (ret)
+		return ret;
+
+	ret = rockchip_nand_ecc_init(mtd, &chip->ecc);
+	if (ret) {
+		debug("rockchip_nand_ecc_init failed: %d\n", ret);
+		return ret;
+	}
+
+	ret = nand_scan_tail(mtd);
+	if (ret) {
+		debug("nand_scan_tail failed: %d\n", ret);
+		return ret;
+	}
+
+	ret = nand_register(devnum, mtd);
+	if (ret) {
+		debug("Failed to register mtd device: %d\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int rockchip_nand_chips_init(int node, struct rk_nand *rknand)
+{
+	const void *blob = gd->fdt_blob;
+	int nand_node;
+	int ret, i = 0;
+
+	for (nand_node = fdt_first_subnode(blob, node); nand_node >= 0;
+	     nand_node = fdt_next_subnode(blob, nand_node)) {
+		ret = rockchip_nand_chip_init(nand_node, rknand, i++);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+void board_nand_init(void)
+{
+	const void *blob = gd->fdt_blob;
+	struct rk_nand *rknand;
+	fdt_addr_t regs;
+	int node;
+	int ret;
+
+	rknand = kzalloc(sizeof(*rknand), GFP_KERNEL);
+
+	node = fdtdec_next_compatible(blob, 0, COMPAT_ROCKCHIP_NANDC);
+
+	if (node < 0) {
+		debug("Nand node not found\n");
+		goto err;
+	}
+
+	if (!fdtdec_get_is_enabled(blob, node)) {
+		debug("Nand disabled in device tree\n");
+		goto err;
+	}
+
+	regs = fdtdec_get_addr(blob, node, "reg");
+	if (regs == FDT_ADDR_T_NONE) {
+		debug("Nand address not found\n");
+		goto err;
+	}
+
+	rknand->regs = (void *)regs;
+
+	spin_lock_init(&rknand->controller.lock);
+	init_waitqueue_head(&rknand->controller.wq);
+
+	rockchip_nand_init(rknand);
+
+	ret = rockchip_nand_chips_init(node, rknand);
+	if (ret) {
+		debug("Failed to init nand chips\n");
+		goto err;
+	}
+
+	return;
+err:
+	kfree(rknand);
+}
+
+int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst)
+{
+	struct mtd_info *mtd;
+
+	mtd = get_nand_dev_by_index(0);
+	return nand_read_skip_bad(mtd, offs, &size, NULL, size, (u_char *)dst);
+}
+
+void nand_deselect(void) {}
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 1ba02be8e1..5592527fda 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -159,6 +159,7 @@ enum fdt_compat_id {
 	COMPAT_ALTERA_SOCFPGA_F2SDR0,           /* SoCFPGA fpga2SDRAM0 bridge */
 	COMPAT_ALTERA_SOCFPGA_F2SDR1,           /* SoCFPGA fpga2SDRAM1 bridge */
 	COMPAT_ALTERA_SOCFPGA_F2SDR2,           /* SoCFPGA fpga2SDRAM2 bridge */
+	COMPAT_ROCKCHIP_NANDC,			/* Rockchip NAND controller */
 
 	COMPAT_COUNT,
 };
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 107a892e79..4a8a8d74e0 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -70,6 +70,7 @@ static const char * const compat_names[COMPAT_COUNT] = {
 	COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
 	COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
 	COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
+	COMPAT(ROCKCHIP_NANDC, "rockchip,nandc"),
 };
 
 const char *fdtdec_get_compatible(enum fdt_compat_id id)

commit 037e9613716cc4390b62bec80663cc03a097d082
Author: Paweł Jarosz <paweljarosz3691@gmail.com>
Date:   Thu Aug 17 15:13:54 2017 +0200

    mtd: nand: add support for the Sandisk SDTNQGAMA chip
    
    Sandisk SDTNQGAMA is a 8GB size, 3.3V 8 bit chip with 16KB page size, 1KB write size and 40 bit ecc support
    
    Change-Id: I7ff291de7406a6d43e99bc5fb8781a50abfd56ac
    Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/mtd/nand/nand_ids.c b/drivers/mtd/nand/nand_ids.c
index d36f9006c9..7bd9f7d417 100644
--- a/drivers/mtd/nand/nand_ids.c
+++ b/drivers/mtd/nand/nand_ids.c
@@ -58,6 +58,9 @@ struct nand_flash_dev nand_flash_ids[] = {
 	{"TC58NVG6D2 64G 3.3V 8-bit",
 		{ .id = {0x98, 0xde, 0x94, 0x82, 0x76, 0x56, 0x04, 0x20} },
 		  SZ_8K, SZ_8K, SZ_2M, 0, 8, 640, NAND_ECC_INFO(40, SZ_1K) },
+	{"SDTNQGAMA 64G 3.3V 8-bit",
+		{ .id = {0x45, 0xde, 0x94, 0x93, 0x76, 0x57} },
+		  SZ_16K, SZ_8K, SZ_4M, 0, 6, 1280, NAND_ECC_INFO(40, SZ_1K) },
 	{"SDTNRGAMA 64G 3.3V 8-bit",
 		{ .id = {0x45, 0xde, 0x94, 0x93, 0x76, 0x50} },
 		  SZ_16K, SZ_8K, SZ_4M, 0, 6, 1280, NAND_ECC_INFO(40, SZ_1K) },

commit ffd0ed872a57915d44462dcef2beb66ba50c151a
Author: Paweł Jarosz <paweljarosz3691@gmail.com>
Date:   Thu Aug 17 15:13:42 2017 +0200

    rockchip: rk3066: add sdram driver
    
    Add rockchip rk3066 sdram driver
    
    Change-Id: I6f8dff6707e61e5f57868a0897be503aa5c1deb7
    Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
    Acked-by: Simon Glass <sjg@chromium.org>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3066/Makefile b/arch/arm/mach-rockchip/rk3066/Makefile
index 61b7fd41a6..7663b6a2f9 100644
--- a/arch/arm/mach-rockchip/rk3066/Makefile
+++ b/arch/arm/mach-rockchip/rk3066/Makefile
@@ -5,4 +5,5 @@
 #
 
 obj-y += clk_rk3066.o
+obj-y += sdram_rk3066.o
 obj-y += syscon_rk3066.o
diff --git a/arch/arm/mach-rockchip/rk3066/sdram_rk3066.c b/arch/arm/mach-rockchip/rk3066/sdram_rk3066.c
new file mode 100644
index 0000000000..e7475b8965
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3066/sdram_rk3066.c
@@ -0,0 +1,943 @@
+/*
+ * (C) Copyright 2015 Google, Inc
+ * Copyright 2014 Rockchip Inc.
+ *
+ * SPDX-License-Identifier:     GPL-2.0
+ *
+ * Adapted from the very similar rk3188 ddr init.
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <dt-structs.h>
+#include <errno.h>
+#include <ram.h>
+#include <regmap.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk3066.h>
+#include <asm/arch/ddr_rk3188.h>
+#include <asm/arch/grf_rk3066.h>
+#include <asm/arch/pmu_rk3188.h>
+#include <asm/arch/sdram.h>
+#include <asm/arch/sdram_common.h>
+#include <linux/err.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct chan_info {
+	struct rk3288_ddr_pctl *pctl;
+	struct rk3288_ddr_publ *publ;
+	struct rk3188_msch *msch;
+};
+
+struct dram_info {
+	struct chan_info chan[1];
+	struct ram_info info;
+	struct clk ddr_clk;
+	struct rk3066_cru *cru;
+	struct rk3066_grf *grf;
+	struct rk3066_sgrf *sgrf;
+	struct rk3188_pmu *pmu;
+};
+
+struct rk3066_sdram_params {
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+	struct dtd_rockchip_rk3066_dmc of_plat;
+#endif
+	struct rk3288_sdram_channel ch[2];
+	struct rk3288_sdram_pctl_timing pctl_timing;
+	struct rk3288_sdram_phy_timing phy_timing;
+	struct rk3288_base_params base;
+	int num_channels;
+	struct regmap *map;
+};
+
+const int ddrconf_table[] = {
+	/*
+	 * [5:4] row(13+n)
+	 * [1:0] col(9+n), assume bw=2
+	 * row	    col,bw
+	 */
+	0,
+	(2 << DDRCONF_ROW_SHIFT) | 1 << DDRCONF_COL_SHIFT,
+	(1 << DDRCONF_ROW_SHIFT) | 1 << DDRCONF_COL_SHIFT,
+	(0 << DDRCONF_ROW_SHIFT) | 1 << DDRCONF_COL_SHIFT,
+	(2 << DDRCONF_ROW_SHIFT) | 2 << DDRCONF_COL_SHIFT,
+	(1 << DDRCONF_ROW_SHIFT) | 2 << DDRCONF_COL_SHIFT,
+	(0 << DDRCONF_ROW_SHIFT) | 2 << DDRCONF_COL_SHIFT,
+	(1 << DDRCONF_ROW_SHIFT) | 0 << DDRCONF_COL_SHIFT,
+	(0 << DDRCONF_ROW_SHIFT) | 0 << DDRCONF_COL_SHIFT,
+	0,
+	0,
+	0,
+	0,
+	0,
+	0,
+	0,
+};
+
+#define TEST_PATTEN	0x5aa5f00f
+#define DQS_GATE_TRAINING_ERROR_RANK0	(1 << 4)
+#define DQS_GATE_TRAINING_ERROR_RANK1	(2 << 4)
+
+#ifdef CONFIG_TPL_BUILD
+static void copy_to_reg(u32 *dest, const u32 *src, u32 n)
+{
+	int i;
+
+	for (i = 0; i < n / sizeof(u32); i++) {
+		writel(*src, dest);
+		src++;
+		dest++;
+	}
+}
+
+static void ddr_reset(struct rk3066_cru *cru, u32 ch, u32 ctl, u32 phy)
+{
+	u32 phy_ctl_srstn_shift = 13;
+	u32 ctl_psrstn_shift = 11;
+	u32 ctl_srstn_shift = 10;
+	u32 phy_psrstn_shift = 9;
+	u32 phy_srstn_shift = 8;
+
+	rk_clrsetreg(&cru->cru_softrst_con[5],
+		     1 << phy_ctl_srstn_shift | 1 << ctl_psrstn_shift |
+		     1 << ctl_srstn_shift | 1 << phy_psrstn_shift |
+		     1 << phy_srstn_shift,
+		     phy << phy_ctl_srstn_shift | ctl << ctl_psrstn_shift |
+		     ctl << ctl_srstn_shift | phy << phy_psrstn_shift |
+		     phy << phy_srstn_shift);
+}
+
+static void ddr_phy_ctl_reset(struct rk3066_cru *cru, u32 ch, u32 n)
+{
+	u32 phy_ctl_srstn_shift = 13;
+
+	rk_clrsetreg(&cru->cru_softrst_con[5],
+		     1 << phy_ctl_srstn_shift, n << phy_ctl_srstn_shift);
+}
+
+static void phy_pctrl_reset(struct rk3066_cru *cru,
+			    struct rk3288_ddr_publ *publ,
+			    int channel)
+{
+	int i;
+
+	ddr_reset(cru, channel, 1, 1);
+	udelay(1);
+	clrbits_le32(&publ->acdllcr, ACDLLCR_DLLSRST);
+	for (i = 0; i < 4; i++)
+		clrbits_le32(&publ->datx8[i].dxdllcr, DXDLLCR_DLLSRST);
+
+	udelay(10);
+	setbits_le32(&publ->acdllcr, ACDLLCR_DLLSRST);
+	for (i = 0; i < 4; i++)
+		setbits_le32(&publ->datx8[i].dxdllcr, DXDLLCR_DLLSRST);
+
+	udelay(10);
+	ddr_reset(cru, channel, 1, 0);
+	udelay(10);
+	ddr_reset(cru, channel, 0, 0);
+	udelay(10);
+}
+
+static void phy_dll_bypass_set(struct rk3288_ddr_publ *publ,
+	u32 freq)
+{
+	int i;
+
+	if (freq <= 250000000) {
+		if (freq <= 150000000)
+			clrbits_le32(&publ->dllgcr, SBIAS_BYPASS);
+		else
+			setbits_le32(&publ->dllgcr, SBIAS_BYPASS);
+		setbits_le32(&publ->acdllcr, ACDLLCR_DLLDIS);
+		for (i = 0; i < 4; i++)
+			setbits_le32(&publ->datx8[i].dxdllcr,
+				     DXDLLCR_DLLDIS);
+
+		setbits_le32(&publ->pir, PIR_DLLBYP);
+	} else {
+		clrbits_le32(&publ->dllgcr, SBIAS_BYPASS);
+		clrbits_le32(&publ->acdllcr, ACDLLCR_DLLDIS);
+		for (i = 0; i < 4; i++) {
+			clrbits_le32(&publ->datx8[i].dxdllcr,
+				     DXDLLCR_DLLDIS);
+		}
+
+		clrbits_le32(&publ->pir, PIR_DLLBYP);
+	}
+}
+
+static void dfi_cfg(struct rk3288_ddr_pctl *pctl, u32 dramtype)
+{
+	writel(DFI_INIT_START, &pctl->dfistcfg0);
+	writel(DFI_DRAM_CLK_SR_EN | DFI_DRAM_CLK_DPD_EN,
+	       &pctl->dfistcfg1);
+	writel(DFI_PARITY_INTR_EN | DFI_PARITY_EN, &pctl->dfistcfg2);
+	writel(7 << TLP_RESP_TIME_SHIFT | LP_SR_EN | LP_PD_EN,
+	       &pctl->dfilpcfg0);
+
+	writel(2 << TCTRL_DELAY_TIME_SHIFT, &pctl->dfitctrldelay);
+	writel(1 << TPHY_WRDATA_TIME_SHIFT, &pctl->dfitphywrdata);
+	writel(0xf << TPHY_RDLAT_TIME_SHIFT, &pctl->dfitphyrdlat);
+	writel(2 << TDRAM_CLK_DIS_TIME_SHIFT, &pctl->dfitdramclkdis);
+	writel(2 << TDRAM_CLK_EN_TIME_SHIFT, &pctl->dfitdramclken);
+	writel(1, &pctl->dfitphyupdtype0);
+
+	/* cs0 and cs1 write odt enable */
+	writel((RANK0_ODT_WRITE_SEL | RANK1_ODT_WRITE_SEL),
+	       &pctl->dfiodtcfg);
+	/* odt write length */
+	writel(7 << ODT_LEN_BL8_W_SHIFT, &pctl->dfiodtcfg1);
+	/* phyupd and ctrlupd disabled */
+	writel(0, &pctl->dfiupdcfg);
+}
+
+static void ddr_set_ddr3_mode(struct rk3066_grf *grf, uint channel,
+			      bool ddr3_mode)
+{
+	uint mask, val;
+
+	mask = MSCH4_MAINDDR3_MASK << MSCH4_MAINDDR3_SHIFT;
+	val = ddr3_mode << MSCH4_MAINDDR3_SHIFT;
+	rk_clrsetreg(&grf->soc_con2, mask, val);
+}
+
+static void ddr_rank_2_row15en(struct rk3066_grf *grf, bool enable)
+{
+	uint mask, val;
+
+	mask = RANK_TO_ROW15_EN_MASK << RANK_TO_ROW15_EN_SHIFT;
+	val = enable << RANK_TO_ROW15_EN_SHIFT;
+	rk_clrsetreg(&grf->soc_con2, mask, val);
+}
+
+static void pctl_cfg(int channel, struct rk3288_ddr_pctl *pctl,
+		     struct rk3066_sdram_params *sdram_params,
+		     struct rk3066_grf *grf)
+{
+	copy_to_reg(&pctl->togcnt1u, &sdram_params->pctl_timing.togcnt1u,
+		    sizeof(sdram_params->pctl_timing));
+	switch (sdram_params->base.dramtype) {
+	case DDR3:
+		if (sdram_params->phy_timing.mr[1] & DDR3_DLL_DISABLE) {
+			writel(sdram_params->pctl_timing.tcl - 3,
+			       &pctl->dfitrddataen);
+		} else {
+			writel(sdram_params->pctl_timing.tcl - 2,
+			       &pctl->dfitrddataen);
+		}
+		writel(sdram_params->pctl_timing.tcwl - 1,
+		       &pctl->dfitphywrlat);
+		writel(0 << MDDR_LPDDR2_CLK_STOP_IDLE_SHIFT | DDR3_EN |
+		       DDR2_DDR3_BL_8 | (6 - 4) << TFAW_SHIFT | PD_EXIT_SLOW |
+		       1 << PD_TYPE_SHIFT | 0 << PD_IDLE_SHIFT,
+		       &pctl->mcfg);
+		ddr_set_ddr3_mode(grf, channel, true);
+		break;
+	}
+
+	setbits_le32(&pctl->scfg, 1);
+}
+
+static void phy_cfg(const struct chan_info *chan, int channel,
+		    struct rk3066_sdram_params *sdram_params)
+{
+	struct rk3288_ddr_publ *publ = chan->publ;
+	struct rk3188_msch *msch = chan->msch;
+	uint ddr_freq_mhz = sdram_params->base.ddr_freq / 1000000;
+	u32 dinit2;
+	int i;
+
+	dinit2 = DIV_ROUND_UP(ddr_freq_mhz * 200000, 1000);
+	/* DDR PHY Timing */
+	copy_to_reg(&publ->dtpr[0], &sdram_params->phy_timing.dtpr0,
+		    sizeof(sdram_params->phy_timing));
+	writel(sdram_params->base.noc_timing, &msch->ddrtiming);
+	writel(0x3f, &msch->readlatency);
+	writel(DIV_ROUND_UP(ddr_freq_mhz * 5120, 1000) << PRT_DLLLOCK_SHIFT |
+	       DIV_ROUND_UP(ddr_freq_mhz * 50, 1000) << PRT_DLLSRST_SHIFT |
+	       8 << PRT_ITMSRST_SHIFT, &publ->ptr[0]);
+	writel(DIV_ROUND_UP(ddr_freq_mhz * 500000, 1000) << PRT_DINIT0_SHIFT |
+	       DIV_ROUND_UP(ddr_freq_mhz * 400, 1000) << PRT_DINIT1_SHIFT,
+	       &publ->ptr[1]);
+	writel(min(dinit2, 0x1ffffU) << PRT_DINIT2_SHIFT |
+	       DIV_ROUND_UP(ddr_freq_mhz * 1000, 1000) << PRT_DINIT3_SHIFT,
+	       &publ->ptr[2]);
+
+	switch (sdram_params->base.dramtype) {
+	case DDR3:
+		clrbits_le32(&publ->pgcr, 0x1f);
+		clrsetbits_le32(&publ->dcr, DDRMD_MASK << DDRMD_SHIFT,
+				DDRMD_DDR3 << DDRMD_SHIFT);
+		break;
+	}
+	if (sdram_params->base.odt) {
+		/*dynamic RTT enable */
+		for (i = 0; i < 4; i++)
+			setbits_le32(&publ->datx8[i].dxgcr, DQSRTT | DQRTT);
+	} else {
+		/*dynamic RTT disable */
+		for (i = 0; i < 4; i++)
+			clrbits_le32(&publ->datx8[i].dxgcr, DQSRTT | DQRTT);
+	}
+}
+
+static void phy_init(struct rk3288_ddr_publ *publ)
+{
+	setbits_le32(&publ->pir, PIR_INIT | PIR_DLLSRST
+		| PIR_DLLLOCK | PIR_ZCAL | PIR_ITMSRST | PIR_CLRSR);
+	udelay(1);
+	while ((readl(&publ->pgsr) &
+		(PGSR_IDONE | PGSR_DLDONE | PGSR_ZCDONE)) !=
+		(PGSR_IDONE | PGSR_DLDONE | PGSR_ZCDONE))
+		;
+}
+
+static void send_command(struct rk3288_ddr_pctl *pctl, u32 rank,
+			 u32 cmd, u32 arg)
+{
+	writel((START_CMD | (rank << 20) | arg | cmd), &pctl->mcmd);
+	udelay(1);
+	while (readl(&pctl->mcmd) & START_CMD)
+		;
+}
+
+static inline void send_command_op(struct rk3288_ddr_pctl *pctl,
+				   u32 rank, u32 cmd, u32 ma, u32 op)
+{
+	send_command(pctl, rank, cmd, (ma & LPDDR2_MA_MASK) << LPDDR2_MA_SHIFT |
+		     (op & LPDDR2_OP_MASK) << LPDDR2_OP_SHIFT);
+}
+
+static void memory_init(struct rk3288_ddr_publ *publ,
+			u32 dramtype)
+{
+	setbits_le32(&publ->pir,
+		     (PIR_INIT | PIR_DRAMINIT | PIR_LOCKBYP
+		      | PIR_ZCALBYP | PIR_CLRSR | PIR_ICPC
+		      | (dramtype == DDR3 ? PIR_DRAMRST : 0)));
+	udelay(1);
+	while ((readl(&publ->pgsr) & (PGSR_IDONE | PGSR_DLDONE))
+		!= (PGSR_IDONE | PGSR_DLDONE))
+		;
+}
+
+static void move_to_config_state(struct rk3288_ddr_publ *publ,
+				 struct rk3288_ddr_pctl *pctl)
+{
+	unsigned int state;
+
+	while (1) {
+		state = readl(&pctl->stat) & PCTL_STAT_MSK;
+
+		switch (state) {
+		case LOW_POWER:
+			writel(WAKEUP_STATE, &pctl->sctl);
+			while ((readl(&pctl->stat) & PCTL_STAT_MSK)
+				!= ACCESS)
+				;
+			/* wait DLL lock */
+			while ((readl(&publ->pgsr) & PGSR_DLDONE)
+				!= PGSR_DLDONE)
+				;
+			/*
+			 * if at low power state,need wakeup first,
+			 * and then enter the config, so
+			 * fallthrough
+			 */
+		case ACCESS:
+			/* fallthrough */
+		case INIT_MEM:
+			writel(CFG_STATE, &pctl->sctl);
+			while ((readl(&pctl->stat) & PCTL_STAT_MSK) != CONFIG)
+				;
+			break;
+		case CONFIG:
+			return;
+		default:
+			break;
+		}
+	}
+}
+
+static void set_bandwidth_ratio(const struct chan_info *chan, int channel,
+				u32 n, struct rk3066_grf *grf)
+{
+	struct rk3288_ddr_pctl *pctl = chan->pctl;
+	struct rk3288_ddr_publ *publ = chan->publ;
+	struct rk3188_msch *msch = chan->msch;
+
+	if (n == 1) {
+		setbits_le32(&pctl->ppcfg, 1);
+		setbits_le32(&msch->ddrtiming, 1 << 31);
+		/* Data Byte disable*/
+		clrbits_le32(&publ->datx8[2].dxgcr, 1);
+		clrbits_le32(&publ->datx8[3].dxgcr, 1);
+		/* disable DLL */
+		setbits_le32(&publ->datx8[2].dxdllcr, DXDLLCR_DLLDIS);
+		setbits_le32(&publ->datx8[3].dxdllcr, DXDLLCR_DLLDIS);
+	} else {
+		clrbits_le32(&pctl->ppcfg, 1);
+		clrbits_le32(&msch->ddrtiming, 1 << 31);
+		/* Data Byte enable*/
+		setbits_le32(&publ->datx8[2].dxgcr, 1);
+		setbits_le32(&publ->datx8[3].dxgcr, 1);
+
+		/* enable DLL */
+		clrbits_le32(&publ->datx8[2].dxdllcr, DXDLLCR_DLLDIS);
+		clrbits_le32(&publ->datx8[3].dxdllcr, DXDLLCR_DLLDIS);
+		/* reset DLL */
+		clrbits_le32(&publ->datx8[2].dxdllcr, DXDLLCR_DLLSRST);
+		clrbits_le32(&publ->datx8[3].dxdllcr, DXDLLCR_DLLSRST);
+		udelay(10);
+		setbits_le32(&publ->datx8[2].dxdllcr, DXDLLCR_DLLSRST);
+		setbits_le32(&publ->datx8[3].dxdllcr, DXDLLCR_DLLSRST);
+	}
+	setbits_le32(&pctl->dfistcfg0, 1 << 2);
+}
+
+static int data_training(const struct chan_info *chan, int channel,
+			 struct rk3066_sdram_params *sdram_params)
+{
+	unsigned int j;
+	int ret = 0;
+	u32 rank;
+	int i;
+	u32 step[2] = { PIR_QSTRN, PIR_RVTRN };
+	struct rk3288_ddr_publ *publ = chan->publ;
+	struct rk3288_ddr_pctl *pctl = chan->pctl;
+
+	/* disable auto refresh */
+	writel(0, &pctl->trefi);
+
+	if (sdram_params->base.dramtype != LPDDR3)
+		setbits_le32(&publ->pgcr, 1 << PGCR_DQSCFG_SHIFT);
+	rank = sdram_params->ch[channel].rank | 1;
+	for (j = 0; j < ARRAY_SIZE(step); j++) {
+		/*
+		 * trigger QSTRN and RVTRN
+		 * clear DTDONE status
+		 */
+		setbits_le32(&publ->pir, PIR_CLRSR);
+
+		/* trigger DTT */
+		setbits_le32(&publ->pir,
+			     PIR_INIT | step[j] | PIR_LOCKBYP | PIR_ZCALBYP |
+			     PIR_CLRSR);
+		udelay(1);
+		/* wait echo byte DTDONE */
+		while ((readl(&publ->datx8[0].dxgsr[0]) & rank)
+			!= rank)
+			;
+		while ((readl(&publ->datx8[1].dxgsr[0]) & rank)
+			!= rank)
+			;
+		if (!(readl(&pctl->ppcfg) & 1)) {
+			while ((readl(&publ->datx8[2].dxgsr[0])
+				& rank) != rank)
+				;
+			while ((readl(&publ->datx8[3].dxgsr[0])
+				& rank) != rank)
+				;
+		}
+		if (readl(&publ->pgsr) &
+		    (PGSR_DTERR | PGSR_RVERR | PGSR_RVEIRR)) {
+			ret = -1;
+			break;
+		}
+	}
+	/* send some auto refresh to complement the lost while DTT */
+	for (i = 0; i < (rank > 1 ? 8 : 4); i++)
+		send_command(pctl, rank, REF_CMD, 0);
+
+	if (sdram_params->base.dramtype != LPDDR3)
+		clrbits_le32(&publ->pgcr, 1 << PGCR_DQSCFG_SHIFT);
+
+	/* resume auto refresh */
+	writel(sdram_params->pctl_timing.trefi, &pctl->trefi);
+
+	return ret;
+}
+
+static void move_to_access_state(const struct chan_info *chan)
+{
+	struct rk3288_ddr_publ *publ = chan->publ;
+	struct rk3288_ddr_pctl *pctl = chan->pctl;
+	unsigned int state;
+
+	while (1) {
+		state = readl(&pctl->stat) & PCTL_STAT_MSK;
+
+		switch (state) {
+		case LOW_POWER:
+			if (((readl(&pctl->stat) >> LP_TRIG_SHIFT) &
+					LP_TRIG_MASK) == 1)
+				return;
+
+			writel(WAKEUP_STATE, &pctl->sctl);
+			while ((readl(&pctl->stat) & PCTL_STAT_MSK) != ACCESS)
+				;
+			/* wait DLL lock */
+			while ((readl(&publ->pgsr) & PGSR_DLDONE)
+				!= PGSR_DLDONE)
+				;
+			break;
+		case INIT_MEM:
+			writel(CFG_STATE, &pctl->sctl);
+			while ((readl(&pctl->stat) & PCTL_STAT_MSK) != CONFIG)
+				;
+			/* fallthrough */
+		case CONFIG:
+			writel(GO_STATE, &pctl->sctl);
+			while ((readl(&pctl->stat) & PCTL_STAT_MSK) == CONFIG)
+				;
+			break;
+		case ACCESS:
+			return;
+		default:
+			break;
+		}
+	}
+}
+
+static void dram_cfg_rbc(const struct chan_info *chan, u32 chnum,
+			 struct rk3066_sdram_params *sdram_params)
+{
+	struct rk3288_ddr_publ *publ = chan->publ;
+
+	if (sdram_params->ch[chnum].bk == 3)
+		clrsetbits_le32(&publ->dcr, PDQ_MASK << PDQ_SHIFT,
+				1 << PDQ_SHIFT);
+	else
+		clrbits_le32(&publ->dcr, PDQ_MASK << PDQ_SHIFT);
+
+	writel(sdram_params->base.ddrconfig, &chan->msch->ddrconf);
+}
+
+static void dram_all_config(const struct dram_info *dram,
+			    struct rk3066_sdram_params *sdram_params)
+{
+	unsigned int chan;
+	u32 sys_reg = 0;
+
+	sys_reg |= sdram_params->base.dramtype << SYS_REG_DDRTYPE_SHIFT;
+	sys_reg |= (sdram_params->num_channels - 1) << SYS_REG_NUM_CH_SHIFT;
+	for (chan = 0; chan < sdram_params->num_channels; chan++) {
+		const struct rk3288_sdram_channel *info =
+			&sdram_params->ch[chan];
+
+		sys_reg |= info->row_3_4 << SYS_REG_ROW_3_4_SHIFT(chan);
+		sys_reg |= 1 << SYS_REG_CHINFO_SHIFT(chan);
+		sys_reg |= (info->rank - 1) << SYS_REG_RANK_SHIFT(chan);
+		sys_reg |= (info->col - 9) << SYS_REG_COL_SHIFT(chan);
+		sys_reg |= info->bk == 3 ? 0 : 1 << SYS_REG_BK_SHIFT(chan);
+		sys_reg |= (info->cs0_row - 13) << SYS_REG_CS0_ROW_SHIFT(chan);
+		sys_reg |= (info->cs1_row - 13) << SYS_REG_CS1_ROW_SHIFT(chan);
+		sys_reg |= (2 >> info->bw) << SYS_REG_BW_SHIFT(chan);
+		sys_reg |= (2 >> info->dbw) << SYS_REG_DBW_SHIFT(chan);
+
+		dram_cfg_rbc(&dram->chan[chan], chan, sdram_params);
+	}
+	if (sdram_params->ch[0].rank == 2)
+		ddr_rank_2_row15en(dram->grf, 0);
+	else
+		ddr_rank_2_row15en(dram->grf, 1);
+
+	writel(sys_reg, &dram->pmu->sys_reg[2]);
+}
+
+static int sdram_rank_bw_detect(struct dram_info *dram, int channel,
+		struct rk3066_sdram_params *sdram_params)
+{
+	int reg;
+	int need_trainig = 0;
+	const struct chan_info *chan = &dram->chan[channel];
+	struct rk3288_ddr_publ *publ = chan->publ;
+
+	ddr_rank_2_row15en(dram->grf, 0);
+
+	if (data_training(chan, channel, sdram_params) < 0) {
+		debug("first data training fail!\n");
+		reg = readl(&publ->datx8[0].dxgsr[0]);
+		/* Check the result for rank 0 */
+		if ((channel == 0) && (reg & DQS_GATE_TRAINING_ERROR_RANK0)) {
+			debug("data training fail!\n");
+			return -EIO;
+		}
+
+		/* Check the result for rank 1 */
+		if (reg & DQS_GATE_TRAINING_ERROR_RANK1) {
+			sdram_params->ch[channel].rank = 1;
+			clrsetbits_le32(&publ->pgcr, 0xF << 18,
+					sdram_params->ch[channel].rank << 18);
+			need_trainig = 1;
+		}
+		reg = readl(&publ->datx8[2].dxgsr[0]);
+		if (reg & (1 << 4)) {
+			sdram_params->ch[channel].bw = 1;
+			set_bandwidth_ratio(chan, channel,
+					    sdram_params->ch[channel].bw,
+					    dram->grf);
+			need_trainig = 1;
+		}
+	}
+	/* Assume the Die bit width are the same with the chip bit width */
+	sdram_params->ch[channel].dbw = sdram_params->ch[channel].bw;
+
+	if (need_trainig &&
+	    (data_training(chan, channel, sdram_params) < 0)) {
+		if (sdram_params->base.dramtype == LPDDR3) {
+			ddr_phy_ctl_reset(dram->cru, channel, 1);
+			udelay(10);
+			ddr_phy_ctl_reset(dram->cru, channel, 0);
+			udelay(10);
+		}
+		debug("2nd data training failed!");
+		return -EIO;
+	}
+
+	return 0;
+}
+
+/*
+ * Detect ram columns and rows.
+ * @dram: dram info struct
+ * @channel: channel number to handle
+ * @sdram_params: sdram parameters, function will fill in col and row values
+ *
+ * Returns 0 or negative on error.
+ */
+static int sdram_col_row_detect(struct dram_info *dram, int channel,
+		struct rk3066_sdram_params *sdram_params)
+{
+	int row, col;
+	unsigned int addr;
+	const struct chan_info *chan = &dram->chan[channel];
+	struct rk3288_ddr_pctl *pctl = chan->pctl;
+	struct rk3288_ddr_publ *publ = chan->publ;
+	int ret = 0;
+
+	/* Detect col */
+	for (col = 11; col >= 9; col--) {
+		writel(0, CONFIG_SYS_SDRAM_BASE);
+		addr = CONFIG_SYS_SDRAM_BASE +
+			(1 << (col + sdram_params->ch[channel].bw - 1));
+		writel(TEST_PATTEN, addr);
+		if ((readl(addr) == TEST_PATTEN) &&
+		    (readl(CONFIG_SYS_SDRAM_BASE) == 0))
+			break;
+	}
+	if (col == 8) {
+		debug("Col detect error\n");
+		ret = -EINVAL;
+		goto out;
+	} else {
+		sdram_params->ch[channel].col = col;
+	}
+
+	ddr_rank_2_row15en(dram->grf, 1);
+	move_to_config_state(publ, pctl);
+	writel(1, &chan->msch->ddrconf);
+	move_to_access_state(chan);
+	/* Detect row, max 15,min13 in rk3066*/
+	for (row = 16; row >= 13; row--) {
+		writel(0, CONFIG_SYS_SDRAM_BASE);
+		addr = CONFIG_SYS_SDRAM_BASE + (1 << (row + 15 - 1));
+		writel(TEST_PATTEN, addr);
+		if ((readl(addr) == TEST_PATTEN) &&
+		    (readl(CONFIG_SYS_SDRAM_BASE) == 0))
+			break;
+	}
+	if (row == 12) {
+		debug("Row detect error\n");
+		ret = -EINVAL;
+	} else {
+		sdram_params->ch[channel].cs1_row = row;
+		sdram_params->ch[channel].row_3_4 = 0;
+		debug("chn %d col %d, row %d\n", channel, col, row);
+		sdram_params->ch[channel].cs0_row = row;
+	}
+
+out:
+	return ret;
+}
+
+static int sdram_get_niu_config(struct rk3066_sdram_params *sdram_params)
+{
+	int i, tmp, size, ret = 0;
+
+	tmp = sdram_params->ch[0].col - 9;
+	tmp -= (sdram_params->ch[0].bw == 2) ? 0 : 1;
+	tmp |= ((sdram_params->ch[0].cs0_row - 13) << 4);
+	size = sizeof(ddrconf_table)/sizeof(ddrconf_table[0]);
+	for (i = 0; i < size; i++)
+		if (tmp == ddrconf_table[i])
+			break;
+	if (i >= size) {
+		debug("niu config not found\n");
+		ret = -EINVAL;
+	} else {
+		debug("niu config %d\n", i);
+		sdram_params->base.ddrconfig = i;
+	}
+
+	return ret;
+}
+
+static int sdram_init(struct dram_info *dram,
+		      struct rk3066_sdram_params *sdram_params)
+{
+	int channel;
+	int zqcr;
+	int ret;
+
+	if ((sdram_params->base.dramtype == DDR3 &&
+	     sdram_params->base.ddr_freq > 800000000)) {
+		debug("SDRAM frequency is too high!");
+		return -E2BIG;
+	}
+
+	ret = clk_set_rate(&dram->ddr_clk, sdram_params->base.ddr_freq);
+	if (ret) {
+		debug("Could not set DDR clock\n");
+		return ret;
+	}
+
+	for (channel = 0; channel < 1; channel++) {
+		const struct chan_info *chan = &dram->chan[channel];
+		struct rk3288_ddr_pctl *pctl = chan->pctl;
+		struct rk3288_ddr_publ *publ = chan->publ;
+
+		phy_pctrl_reset(dram->cru, publ, channel);
+		phy_dll_bypass_set(publ, sdram_params->base.ddr_freq);
+
+		dfi_cfg(pctl, sdram_params->base.dramtype);
+
+		pctl_cfg(channel, pctl, sdram_params, dram->grf);
+
+		phy_cfg(chan, channel, sdram_params);
+
+		phy_init(publ);
+
+		writel(POWER_UP_START, &pctl->powctl);
+		while (!(readl(&pctl->powstat) & POWER_UP_DONE))
+			;
+
+		memory_init(publ, sdram_params->base.dramtype);
+		move_to_config_state(publ, pctl);
+
+		/* Using 32bit bus width for detect */
+		sdram_params->ch[channel].bw = 2;
+		set_bandwidth_ratio(chan, channel,
+				    sdram_params->ch[channel].bw, dram->grf);
+		/*
+		 * set cs, using n=3 for detect
+		 * CS0, n=1
+		 * CS1, n=2
+		 * CS0 & CS1, n = 3
+		 */
+		sdram_params->ch[channel].rank = 2,
+		clrsetbits_le32(&publ->pgcr, 0xF << 18,
+				(sdram_params->ch[channel].rank | 1) << 18);
+
+		/* DS=40ohm,ODT=155ohm */
+		zqcr = 1 << ZDEN_SHIFT | 2 << PU_ONDIE_SHIFT |
+			2 << PD_ONDIE_SHIFT | 0x19 << PU_OUTPUT_SHIFT |
+			0x19 << PD_OUTPUT_SHIFT;
+		writel(zqcr, &publ->zq1cr[0]);
+		writel(zqcr, &publ->zq0cr[0]);
+
+		/* Detect the rank and bit-width with data-training */
+		writel(1, &chan->msch->ddrconf);
+		sdram_rank_bw_detect(dram, channel, sdram_params);
+
+		if (sdram_params->base.dramtype == LPDDR3) {
+			u32 i;
+			writel(0, &pctl->mrrcfg0);
+			for (i = 0; i < 17; i++)
+				send_command_op(pctl, 1, MRR_CMD, i, 0);
+		}
+		writel(4, &chan->msch->ddrconf);
+		move_to_access_state(chan);
+		/* DDR3 and LPDDR3 are always 8 bank, no need detect */
+		sdram_params->ch[channel].bk = 3;
+		/* Detect Col and Row number*/
+		ret = sdram_col_row_detect(dram, channel, sdram_params);
+		if (ret)
+			goto error;
+	}
+	/* Find NIU DDR configuration */
+	ret = sdram_get_niu_config(sdram_params);
+	if (ret)
+		goto error;
+
+	dram_all_config(dram, sdram_params);
+	debug("%s done\n", __func__);
+
+	return 0;
+error:
+	debug("DRAM init failed!\n");
+	hang();
+}
+#endif /* CONFIG_TPL_BUILD */
+
+#ifdef CONFIG_TPL_BUILD
+static int setup_sdram(struct udevice *dev)
+{
+	struct dram_info *priv = dev_get_priv(dev);
+	struct rk3066_sdram_params *params = dev_get_platdata(dev);
+
+	return sdram_init(priv, params);
+}
+
+static int rk3066_dmc_ofdata_to_platdata(struct udevice *dev)
+{
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	struct rk3066_sdram_params *params = dev_get_platdata(dev);
+	const void *blob = gd->fdt_blob;
+	int node = dev_of_offset(dev);
+	int ret;
+
+	/* rk3066 supports only one-channel */
+	params->num_channels = 1;
+	ret = fdtdec_get_int_array(blob, node, "rockchip,pctl-timing",
+				   (u32 *)&params->pctl_timing,
+				   sizeof(params->pctl_timing) / sizeof(u32));
+	if (ret) {
+		debug("%s: Cannot read rockchip,pctl-timing\n", __func__);
+		return -EINVAL;
+	}
+	ret = fdtdec_get_int_array(blob, node, "rockchip,phy-timing",
+				   (u32 *)&params->phy_timing,
+				   sizeof(params->phy_timing) / sizeof(u32));
+	if (ret) {
+		debug("%s: Cannot read rockchip,phy-timing\n", __func__);
+		return -EINVAL;
+	}
+	ret = fdtdec_get_int_array(blob, node, "rockchip,sdram-params",
+				   (u32 *)&params->base,
+				   sizeof(params->base) / sizeof(u32));
+	if (ret) {
+		debug("%s: Cannot read rockchip,sdram-params\n", __func__);
+		return -EINVAL;
+	}
+	ret = regmap_init_mem(dev, &params->map);
+	if (ret)
+		return ret;
+#endif
+
+	return 0;
+}
+#endif /* CONFIG_TPL_BUILD */
+
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+static int conv_of_platdata(struct udevice *dev)
+{
+	struct rk3066_sdram_params *plat = dev_get_platdata(dev);
+	struct dtd_rockchip_rk3066_dmc *of_plat = &plat->of_plat;
+	int ret;
+
+	memcpy(&plat->pctl_timing, of_plat->rockchip_pctl_timing,
+	       sizeof(plat->pctl_timing));
+	memcpy(&plat->phy_timing, of_plat->rockchip_phy_timing,
+	       sizeof(plat->phy_timing));
+	memcpy(&plat->base, of_plat->rockchip_sdram_params, sizeof(plat->base));
+	/* rk3066 supports dual-channel, set default channel num to 2 */
+	plat->num_channels = 1;
+	ret = regmap_init_mem_platdata(dev, of_plat->reg,
+				       ARRAY_SIZE(of_plat->reg) / 2,
+				       &plat->map);
+	if (ret)
+		return ret;
+	return 0;
+}
+#endif
+
+static int rk3066_dmc_probe(struct udevice *dev)
+{
+#ifdef CONFIG_TPL_BUILD
+	struct rk3066_sdram_params *plat = dev_get_platdata(dev);
+#endif
+	struct dram_info *priv = dev_get_priv(dev);
+	struct regmap *map;
+	int ret;
+	struct udevice *dev_clk;
+
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+	ret = conv_of_platdata(dev);
+	if (ret)
+		return ret;
+#endif
+	map = syscon_get_regmap_by_driver_data(ROCKCHIP_SYSCON_NOC);
+	if (IS_ERR(map))
+		return PTR_ERR(map);
+	priv->chan[0].msch = regmap_get_range(map, 0);
+
+	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	priv->pmu = syscon_get_first_range(ROCKCHIP_SYSCON_PMU);
+
+#ifdef CONFIG_TPL_BUILD
+	priv->chan[0].pctl = regmap_get_range(plat->map, 0);
+	priv->chan[0].publ = regmap_get_range(plat->map, 1);
+#endif
+	ret = rockchip_get_clk(&dev_clk);
+	if (ret)
+		return ret;
+	priv->ddr_clk.id = CLK_DDR;
+
+	ret = clk_request(dev_clk, &priv->ddr_clk);
+	if (ret)
+		return ret;
+
+	priv->cru = rockchip_get_cru();
+	if (IS_ERR(priv->cru))
+		return PTR_ERR(priv->cru);
+#ifdef CONFIG_TPL_BUILD
+	ret = setup_sdram(dev);
+	if (ret)
+		return ret;
+#endif
+	priv->info.base = CONFIG_SYS_SDRAM_BASE;
+	priv->info.size = rockchip_sdram_size(
+				(phys_addr_t)&priv->pmu->sys_reg[2]);
+
+	return 0;
+}
+
+static int rk3066_dmc_get_info(struct udevice *dev, struct ram_info *info)
+{
+	struct dram_info *priv = dev_get_priv(dev);
+
+	*info = priv->info;
+
+	return 0;
+}
+
+static struct ram_ops rk3066_dmc_ops = {
+	.get_info = rk3066_dmc_get_info,
+};
+
+static const struct udevice_id rk3066_dmc_ids[] = {
+	{ .compatible = "rockchip,rk3066-dmc" },
+	{ }
+};
+
+U_BOOT_DRIVER(dmc_rk3066) = {
+	.name = "rockchip_rk3066_dmc",
+	.id = UCLASS_RAM,
+	.of_match = rk3066_dmc_ids,
+	.ops = &rk3066_dmc_ops,
+#ifdef CONFIG_TPL_BUILD
+	.ofdata_to_platdata = rk3066_dmc_ofdata_to_platdata,
+#endif
+	.probe = rk3066_dmc_probe,
+	.priv_auto_alloc_size = sizeof(struct dram_info),
+#ifdef CONFIG_TPL_BUILD
+	.platdata_auto_alloc_size = sizeof(struct rk3066_sdram_params),
+#endif
+};

commit 7ea94c784707858653acd0d883e64bb544c7e319
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 2 10:31:15 2017 +0800

    rockchip: test: key: use ctrl+c to exit test
    
    This is more flexible for users to determine exit or not
    
    Change-Id: Idcd9ad605b8615062fafae485cd2f297ed021fee
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/test/rockchip/test-key.c b/test/rockchip/test-key.c
index 8a3cf6348f..bd76ba96f5 100644
--- a/test/rockchip/test-key.c
+++ b/test/rockchip/test-key.c
@@ -7,6 +7,7 @@
 #include <asm/io.h>
 #include <adc.h>
 #include <common.h>
+#include <console.h>
 #include <dm.h>
 #include <errno.h>
 #include <fdtdec.h>
@@ -298,17 +299,14 @@ static int key_test(struct key_info *keys)
 	unsigned int adcval;
 	int adc_h, adc_l;
 	int err, i;
-	ulong start;
 
 	if (g_key_count == 0) {
 		printf("Find total 0 keys, finish test\n");
 		goto out;
 	}
 
-	printf("\nYou have 30s to test keys, press or release them, start!\n");
-
-	start = get_timer(0);
-	while (get_timer(start) <= 30000) {
+	printf("\nPress or release keys(Exit test by 'ctrl + c').. Start!\n");
+	while (!ctrlc()) {
 		mdelay(100);
 		for (i = 0, key = keys; i < g_key_count; i++, key++) {
 			if (key->type == ADC_KEY) {

commit 3557321365ac81accd4541fcf63bd3b114b48b2a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 2 10:38:24 2017 +0800

    rockchip: test: adjust position of guide info
    
    Change-Id: Ibd674a7fea9c8b109e5766d98ef80c15fb612633
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/test/rockchip/test-rockchip.c b/test/rockchip/test-rockchip.c
index f9310b46f7..bae1177574 100644
--- a/test/rockchip/test-rockchip.c
+++ b/test/rockchip/test-rockchip.c
@@ -31,6 +31,7 @@ static int do_rockchip_test(cmd_tbl_t *cmdtp, int flag,
 	board_module_t *module = NULL;
 	char *module_name = NULL;
 	int index = 0, err = 0;
+	bool found = false;
 
 	if (argc >= 2) {
 		module_name = argv[1];
@@ -42,13 +43,16 @@ static int do_rockchip_test(cmd_tbl_t *cmdtp, int flag,
 	if (!module_name)
 		return 0;
 
-	printf("***********************************************************\n");
-	printf("Rockchip Board Module [%s] Test start.\n", module_name);
-	printf("***********************************************************\n");
 
 	for (index = 0; index < ARRAY_SIZE(g_board_modules); index++) {
 		module = &g_board_modules[index];
 		if (module && !strcmp(module->name, module_name)) {
+			found = true;
+
+			printf("***********************************************************\n");
+			printf("Rockchip Board Module [%s] Test start.\n", module_name);
+			printf("***********************************************************\n");
+
 			ms_start = get_timer(0);
 
 			err = module->test(argc, argv);
@@ -58,13 +62,17 @@ static int do_rockchip_test(cmd_tbl_t *cmdtp, int flag,
 				sec = ms / 1000;
 				ms = ms % 1000;
 			}
+
+			printf("-----------------------------------------------------------\n");
+			printf("Rockchip Board Module [%s] Test end <%s>.. Total: %lu.%lus\n",
+			       module->name, err ? "FAILED" : "PASS", sec, ms);
+			printf("-----------------------------------------------------------\n\n\n");
 		}
 	}
 
-	printf("-----------------------------------------------------------\n");
-	printf("Rockchip Board Module [%s] Test end <%s>.. Total: %lu.%lus\n",
-	       module->name, err ? "FAILED" : "PASS", sec, ms);
-	printf("-----------------------------------------------------------\n\n\n");
+	if (!found)
+		printf("Rockchip Board Module [%s] is not support !\n",
+		       module_name);
 
 	return 0;
 }

commit 81ae24d4d6f45da9a0cf3245efb1a9125e729595
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Nov 6 16:34:10 2017 +0800

    fastboot: add buffer addr for RK3066
    
    Change-Id: I0d39e50063ab040d1027d342081bc63a19c9389b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/cmd/fastboot/Kconfig b/cmd/fastboot/Kconfig
index fb0c5da94c..a2638a8bba 100644
--- a/cmd/fastboot/Kconfig
+++ b/cmd/fastboot/Kconfig
@@ -29,8 +29,8 @@ config FASTBOOT_BUF_ADDR
 	default 0x81000000 if ARCH_OMAP2PLUS
 	default 0x42000000 if ARCH_SUNXI && !MACH_SUN9I
 	default 0x22000000 if ARCH_SUNXI && MACH_SUN9I
-	default 0x60800800 if ROCKCHIP_RK3036 || ROCKCHIP_RK3188 || \
-				ROCKCHIP_RK322X
+	default 0x60800800 if ROCKCHIP_RK3036 || ROCKCHIP_RK3066 || \
+				ROCKCHIP_RK3188 || ROCKCHIP_RK322X
 	default 0x800800 if ROCKCHIP_RK3288 || ROCKCHIP_RK3329 || \
 				ROCKCHIP_RK3399
 	default 0x280000 if ROCKCHIP_RK3368

commit 578306ea5a9e72388e3930c64346fda70f22e63e
Author: Paweł Jarosz <paweljarosz3691@gmail.com>
Date:   Thu Aug 17 15:13:11 2017 +0200

    rockchip: rk3066: add core support
    
    Add core skeleton for rk3066
    
    Change-Id: I9fac85baaf671ac598c1c759b0f387b83ba9c21c
    Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 41a7363d3a..98ab2b4c77 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -21,6 +21,21 @@ config ROCKCHIP_RK3128
 	  and video codec support. Peripherals include Gigabit Ethernet,
 	  USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
 
+config ROCKCHIP_RK3066
+	bool "Support Rockchip RK3066"
+	select CPU_V7
+	select SUPPORT_SPL
+	select SUPPORT_TPL
+	select SPL
+	select TPL
+	select BOARD_LATE_INIT
+	select ROCKCHIP_BROM_HELPER
+	help
+	  The Rockchip RK3066 is a ARM-based SoC with a dual-core Cortex-A9
+	  including NEON and GPU, Mali-400 graphics, several DDR3 options
+	  and video codec support. Peripherals include ethernet, USB2 host
+	  and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
+
 config ROCKCHIP_RK3188
 	bool "Support Rockchip RK3188"
 	select CPU_V7
@@ -255,6 +270,7 @@ config GICV3
 	bool "ARM GICv3"
 
 source "arch/arm/mach-rockchip/rk3036/Kconfig"
+source "arch/arm/mach-rockchip/rk3066/Kconfig"
 source "arch/arm/mach-rockchip/rk3128/Kconfig"
 source "arch/arm/mach-rockchip/rk3188/Kconfig"
 source "arch/arm/mach-rockchip/rk322x/Kconfig"
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index dbaaf7d527..814b641506 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -11,12 +11,14 @@
 obj-spl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o save_boot_param.o
 obj-tpl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o save_boot_param.o
 
+obj-tpl-$(CONFIG_ROCKCHIP_RK3066) += rk3066-board-tpl.o
 obj-tpl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-tpl.o
 obj-tpl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-tpl.o
 obj-tpl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-tpl.o
 obj-tpl-$(CONFIG_ROCKCHIP_RK3328) += rk3328-board-tpl.o
 
 obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o
+obj-spl-$(CONFIG_ROCKCHIP_RK3066) += rk3066-board-spl.o
 obj-spl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-spl.o
 obj-spl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-spl.o spl-boot-order.o
 obj-spl-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-spl.o
@@ -30,6 +32,7 @@ obj-$(CONFIG_ROCKCHIP_VENDOR_PARTITION) += vendor.o
 obj-$(CONFIG_ROCKCHIP_PARAM) += rockchip_parameter.o
 obj-$(CONFIG_ROCKCHIP_RESOURCE_IMAGE) += resource_img.o
 obj-$(CONFIG_ROCKCHIP_PARTITION_BOOT) += bootrkp.o
+obj-$(CONFIG_ROCKCHIP_RK3066) += rk3066-board.o
 obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board.o
 obj-$(CONFIG_ROCKCHIP_RK3128) += rk3128-board.o
 obj-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board.o
@@ -44,6 +47,7 @@ obj-y += rk_timer.o
 endif
 
 obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036/
+obj-$(CONFIG_ROCKCHIP_RK3066) += rk3066/
 obj-$(CONFIG_ROCKCHIP_RK3128) += rk3128/
 ifndef CONFIG_TPL_BUILD
 obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188/
diff --git a/arch/arm/mach-rockchip/rk3066-board-spl.c b/arch/arm/mach-rockchip/rk3066-board-spl.c
new file mode 100644
index 0000000000..9acdd83dae
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3066-board-spl.c
@@ -0,0 +1,139 @@
+/*
+ * (C) Copyright 2015 Google, Inc
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <clk.h>
+#include <common.h>
+#include <debug_uart.h>
+#include <dm.h>
+#include <fdtdec.h>
+#include <led.h>
+#include <malloc.h>
+#include <ram.h>
+#include <spl.h>
+#include <syscon.h>
+#include <asm/gpio.h>
+#include <asm/io.h>
+#include <asm/arch/bootrom.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/periph.h>
+#include <asm/arch/pmu_rk3188.h>
+#include <asm/arch/sdram.h>
+#include <asm/arch/timer.h>
+#include <dm/pinctrl.h>
+#include <dm/root.h>
+#include <dm/test.h>
+#include <dm/util.h>
+#include <power/regulator.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+u32 spl_boot_device(void)
+{
+	return BOOT_DEVICE_NAND;
+}
+
+void board_init_f(ulong dummy)
+{
+	struct udevice *pinctrl, *dev;
+	int ret;
+
+	debug_uart_init();
+
+	ret = spl_early_init();
+	if (ret) {
+		debug("spl_early_init() failed: %d\n", ret);
+		hang();
+	}
+
+	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
+	if (ret) {
+		debug("Pinctrl init failed: %d\n", ret);
+		return;
+	}
+
+	ret = rockchip_get_clk(&dev);
+	if (ret) {
+		debug("CLK init failed: %d\n", ret);
+		return;
+	}
+
+	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
+	if (ret) {
+		debug("DRAM init failed: %d\n", ret);
+		return;
+	}
+}
+
+void spl_board_init(void)
+{
+	struct udevice *pinctrl;
+	int ret;
+
+	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
+	if (ret) {
+		debug("%s: Cannot find pinctrl device\n", __func__);
+		goto err;
+	}
+
+#ifdef CONFIG_SPL_MMC_SUPPORT
+	ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_SDCARD);
+	if (ret) {
+		debug("%s: Failed to set up SD card\n", __func__);
+		goto err;
+	}
+#endif
+
+	/* Enable debug UART */
+	ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART_DBG);
+	if (ret) {
+		debug("%s: Failed to set up console UART\n", __func__);
+		goto err;
+	}
+
+	preloader_console_init();
+
+	return;
+
+err:
+	debug("spl_board_init: Error %d\n", ret);
+
+	/* No way to report error here */
+	hang();
+}
+
+#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
+#include <usb.h>
+#include <usb/dwc2_udc.h>
+
+static struct dwc2_plat_otg_data rk3066_otg_data = {
+	.rx_fifo_sz	= 275,
+	.np_tx_fifo_sz	= 16,
+	.tx_fifo_sz	= 256,
+};
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+	ofnode otg_node;
+	u32 reg;
+
+	otg_node = ofnode_path("/usb@10180000");
+	if (!ofnode_valid(otg_node)) {
+		debug("Not found usb otg device\n");
+		return -ENODEV;
+	}
+
+	ofnode_read_u32(otg_node, "reg", &reg);
+	rk3066_otg_data.regs_otg = reg;
+
+	return dwc2_udc_probe(&rk3066_otg_data);
+}
+
+int board_usb_cleanup(int index, enum usb_init_type init)
+{
+	return 0;
+}
+#endif
diff --git a/arch/arm/mach-rockchip/rk3066-board-tpl.c b/arch/arm/mach-rockchip/rk3066-board-tpl.c
new file mode 100644
index 0000000000..5dcac90b52
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3066-board-tpl.c
@@ -0,0 +1,90 @@
+/*
+ * (C) Copyright 2015 Google, Inc
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <clk.h>
+#include <common.h>
+#include <debug_uart.h>
+#include <dm.h>
+#include <ram.h>
+#include <spl.h>
+#include <asm/io.h>
+#include <asm/arch/bootrom.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/ddr_rk3188.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/grf_rk3066.h>
+#include <asm/arch/pmu_rk3188.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define RK3066_TIMER_CONTROL	0x8
+#define GRF_BASE	0x20008000
+
+static int setup_arm_clock(void)
+{
+	struct udevice *dev;
+	struct clk clk;
+	int ret;
+
+	ret = rockchip_get_clk(&dev);
+	if (ret)
+		return ret;
+
+	clk.id = CLK_ARM;
+	ret = clk_request(dev, &clk);
+	if (ret < 0)
+		return ret;
+
+	ret = clk_set_rate(&clk, 600000000);
+
+	clk_free(&clk);
+	return ret;
+}
+
+void board_init_f(ulong dummy)
+{
+	struct rk3066_grf * const grf = (void *)GRF_BASE;
+	struct udevice *dev;
+	int ret;
+
+	/* Enable early UART on the RK3066 */
+	rk_clrsetreg(&grf->gpio1b_iomux,
+		     GPIO1B1_MASK | GPIO1B0_MASK,
+		     GPIO1B1_UART2_SOUT << GPIO1B1_SHIFT |
+		     GPIO1B0_UART2_SIN << GPIO1B0_SHIFT);
+
+	debug_uart_init();
+
+	printascii("U-Boot TPL board init\n");
+
+	ret = spl_early_init();
+	if (ret) {
+		debug("spl_early_init() failed: %d\n", ret);
+		hang();
+	}
+
+	/* Reset and enable Timer0 */
+	writel(0, CONFIG_SYS_TIMER_BASE);
+	rk_clrsetreg(CONFIG_SYS_TIMER_BASE + RK3066_TIMER_CONTROL, 0x1, 0x1);
+
+	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
+	if (ret) {
+		debug("DRAM init failed: %d\n", ret);
+		return;
+	}
+
+	setup_arm_clock();
+}
+
+void board_return_to_bootrom(void)
+{
+	back_to_bootrom();
+}
+
+u32 spl_boot_device(void)
+{
+	return BOOT_DEVICE_BOOTROM;
+}
diff --git a/arch/arm/mach-rockchip/rk3066-board.c b/arch/arm/mach-rockchip/rk3066-board.c
new file mode 100644
index 0000000000..8fa06a2525
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3066-board.c
@@ -0,0 +1,150 @@
+/*
+ * (C) Copyright 2017 Paweł Jarosz <paweljarosz3691@gmail.com>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <ram.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/grf_rk3066.h>
+#include <asm/arch/periph.h>
+#include <asm/arch/pmu_rk3188.h>
+#include <asm/arch/boot_mode.h>
+#include <asm/gpio.h>
+#include <dm/pinctrl.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_late_init(void)
+{
+	struct rk3066_grf *grf;
+
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	if (IS_ERR(grf)) {
+		debug("grf syscon returned %ld\n", PTR_ERR(grf));
+		return PTR_ERR(grf);
+	}
+	/* enable noc remap to mimic legacy loaders */
+	rk_clrsetreg(&grf->soc_con0, NOC_REMAP_MASK, NOC_REMAP_MASK);
+
+	return 0;
+}
+
+int board_init(void)
+{
+#if defined(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM)
+	struct udevice *pinctrl;
+	int ret;
+
+	/*
+	 * We need to implement sdcard iomux here for the further
+	 * initialization, otherwise, it'll hit sdcard command sending
+	 * timeout exception.
+	 */
+	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
+	if (ret) {
+		debug("%s: Cannot find pinctrl device\n", __func__);
+		goto err;
+	}
+	ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_SDCARD);
+	if (ret) {
+		debug("%s: Failed to set up SD card\n", __func__);
+		goto err;
+	}
+
+	return 0;
+err:
+	debug("board_init: Error %d\n", ret);
+
+	/* No way to report error here */
+	hang();
+
+	return -1;
+#else
+	return 0;
+#endif
+}
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+void enable_caches(void)
+{
+	/* Enable D-cache. I-cache is already enabled in start.S */
+	dcache_enable();
+}
+#endif
+
+#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
+#include <usb.h>
+#include <usb/dwc2_udc.h>
+
+static struct dwc2_plat_otg_data rk3066_otg_data = {
+	.rx_fifo_sz	= 275,
+	.np_tx_fifo_sz	= 16,
+	.tx_fifo_sz	= 256,
+};
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+	int node, phy_node;
+	const char *mode;
+	bool matched = false;
+	const void *blob = gd->fdt_blob;
+	u32 grf_phy_offset;
+
+	/* find the usb_otg node */
+	node = fdt_node_offset_by_compatible(blob, -1,
+					"rockchip,rk3066-usb");
+
+	while (node > 0) {
+		mode = fdt_getprop(blob, node, "dr_mode", NULL);
+		if (mode && strcmp(mode, "otg") == 0) {
+			matched = true;
+			break;
+		}
+
+		node = fdt_node_offset_by_compatible(blob, node,
+					"rockchip,rk3066-usb");
+	}
+	if (!matched) {
+		debug("Not found usb_otg device\n");
+		return -ENODEV;
+	}
+	rk3066_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
+
+	node = fdtdec_lookup_phandle(blob, node, "phys");
+	if (node <= 0) {
+		debug("Not found usb phy device\n");
+		return -ENODEV;
+	}
+
+	phy_node = fdt_parent_offset(blob, node);
+	if (phy_node <= 0) {
+		debug("Not found usb phy device\n");
+		return -ENODEV;
+	}
+
+	rk3066_otg_data.phy_of_node = phy_node;
+	grf_phy_offset = fdtdec_get_addr(blob, node, "reg");
+
+	node = fdt_node_offset_by_compatible(blob, -1,
+					"rockchip,rk3066-grf");
+	if (node <= 0) {
+		debug("Not found grf device\n");
+		return -ENODEV;
+	}
+	rk3066_otg_data.regs_phy = grf_phy_offset +
+				fdtdec_get_addr(blob, node, "reg");
+
+	return dwc2_udc_probe(&rk3066_otg_data);
+}
+
+int board_usb_cleanup(int index, enum usb_init_type init)
+{
+	return 0;
+}
+#endif
diff --git a/arch/arm/mach-rockchip/rk3066/Kconfig b/arch/arm/mach-rockchip/rk3066/Kconfig
new file mode 100644
index 0000000000..89a48d2951
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3066/Kconfig
@@ -0,0 +1,29 @@
+if ROCKCHIP_RK3066
+
+config TARGET_MK808_RK3066
+        bool "MK808_RK3066"
+	help
+	  MK808 is a tv stick with usb host and otg, microsd card slot, hdmi and wifi.
+
+config SYS_SOC
+        default "rockchip"
+
+config SYS_MALLOC_F_LEN
+        default 0x0800
+
+config SPL_LIBCOMMON_SUPPORT
+        default y
+
+config SPL_LIBGENERIC_SUPPORT
+        default y
+
+config SPL_SERIAL_SUPPORT
+        default y
+
+config TPL_LIBCOMMON_SUPPORT
+        default y
+
+config TPL_LIBGENERIC_SUPPORT
+        default y
+
+endif
diff --git a/arch/arm/mach-rockchip/rk3066/Makefile b/arch/arm/mach-rockchip/rk3066/Makefile
new file mode 100644
index 0000000000..61b7fd41a6
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3066/Makefile
@@ -0,0 +1,8 @@
+#
+# Copyright (c) 2017 Paweł Jarosz <paweljarosz3691@gmail.com>
+#
+# SPDX-License-Identifier:      GPL-2.0+
+#
+
+obj-y += clk_rk3066.o
+obj-y += syscon_rk3066.o
diff --git a/arch/arm/mach-rockchip/rk3066/clk_rk3066.c b/arch/arm/mach-rockchip/rk3066/clk_rk3066.c
new file mode 100644
index 0000000000..ae529027f8
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3066/clk_rk3066.c
@@ -0,0 +1,33 @@
+/*
+ * Copyright (C) 2016 Google, Inc
+ * Written by Simon Glass <sjg@chromium.org>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk3066.h>
+
+int rockchip_get_clk(struct udevice **devp)
+{
+	return uclass_get_device_by_driver(UCLASS_CLK,
+			DM_GET_DRIVER(rockchip_rk3066a_cru), devp);
+}
+
+void *rockchip_get_cru(void)
+{
+	struct rk3066_clk_priv *priv;
+	struct udevice *dev;
+	int ret;
+
+	ret = rockchip_get_clk(&dev);
+	if (ret)
+		return ERR_PTR(ret);
+
+	priv = dev_get_priv(dev);
+
+	return priv->cru;
+}
diff --git a/arch/arm/mach-rockchip/rk3066/syscon_rk3066.c b/arch/arm/mach-rockchip/rk3066/syscon_rk3066.c
new file mode 100644
index 0000000000..57b2376182
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3066/syscon_rk3066.c
@@ -0,0 +1,54 @@
+/*
+ * (C) Copyright 2015 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+
+static const struct udevice_id rk3066_syscon_ids[] = {
+	{ .compatible = "rockchip,rk3188-noc", .data = ROCKCHIP_SYSCON_NOC },
+	{ .compatible = "rockchip,rk3066-grf", .data = ROCKCHIP_SYSCON_GRF },
+	{ .compatible = "rockchip,rk3066-pmu", .data = ROCKCHIP_SYSCON_PMU },
+	{ }
+};
+
+U_BOOT_DRIVER(syscon_rk3066) = {
+	.name = "rk3066_syscon",
+	.id = UCLASS_SYSCON,
+	.of_match = rk3066_syscon_ids,
+};
+
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+static int rk3066_syscon_bind_of_platdata(struct udevice *dev)
+{
+	dev->driver_data = dev->driver->of_match->data;
+	debug("syscon: %s %d\n", dev->name, (uint)dev->driver_data);
+
+	return 0;
+}
+
+U_BOOT_DRIVER(rockchip_rk3188_noc) = {
+	.name = "rockchip_rk3188_noc",
+	.id = UCLASS_SYSCON,
+	.of_match = rk3066_syscon_ids,
+	.bind = rk3066_syscon_bind_of_platdata,
+};
+
+U_BOOT_DRIVER(rockchip_rk3066_grf) = {
+	.name = "rockchip_rk3066_grf",
+	.id = UCLASS_SYSCON,
+	.of_match = rk3066_syscon_ids + 1,
+	.bind = rk3066_syscon_bind_of_platdata,
+};
+
+U_BOOT_DRIVER(rockchip_rk3066_pmu) = {
+	.name = "rockchip_rk3066_pmu",
+	.id = UCLASS_SYSCON,
+	.of_match = rk3066_syscon_ids + 2,
+	.bind = rk3066_syscon_bind_of_platdata,
+};
+#endif
diff --git a/include/configs/rk3066_common.h b/include/configs/rk3066_common.h
new file mode 100644
index 0000000000..7e9664303d
--- /dev/null
+++ b/include/configs/rk3066_common.h
@@ -0,0 +1,97 @@
+/*
+ * Copyright (c) 2017 Paweł Jarosz <paweljarosz3691@gmail.com>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __CONFIG_RK3066_COMMON_H
+#define __CONFIG_RK3066_COMMON_H
+
+#include <asm/arch/hardware.h>
+#include "rockchip-common.h"
+
+#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
+#define CONFIG_SYS_MAXARGS		16
+#define CONFIG_BAUDRATE			115200
+#define CONFIG_SYS_MALLOC_LEN		(64 << 20)
+#define CONFIG_SYS_CBSIZE		256
+
+#define CONFIG_SYS_SDRAM_BASE		0x60000000
+#define CONFIG_NR_DRAM_BANKS		1
+#define SDRAM_BANK_SIZE			(1024UL << 20UL)
+#define SDRAM_MAX_SIZE			CONFIG_NR_DRAM_BANKS * SDRAM_BANK_SIZE
+
+#define CONFIG_SYS_TIMER_RATE		24000000
+#define CONFIG_SYS_TIMER_BASE		0x20038000
+#define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMER_BASE + 4)
+#define CONFIG_SYS_TIMER_COUNTS_DOWN
+
+#define CONFIG_SYS_TEXT_BASE		0x60408000
+#define CONFIG_SYS_INIT_SP_ADDR		0x78000000
+#define CONFIG_SYS_LOAD_ADDR		0x70800800
+
+#define CONFIG_SYS_NS16550_MEM32
+#define CONFIG_BOUNCE_BUFFER
+#define CONFIG_SPL_FRAMEWORK
+
+#define CONFIG_SYS_MAX_NAND_DEVICE	8
+
+#ifdef CONFIG_TPL_BUILD
+#define CONFIG_SPL_TEXT_BASE		0x10080C04
+#define CONFIG_SPL_STACK		0x1008FFFF
+/* tpl size max 32kb - 4byte RK30 header */
+#define CONFIG_SPL_MAX_SIZE		(0x8000 - 0x4)
+#elif defined(CONFIG_SPL_BUILD)
+/* spl size max 200k */
+#define CONFIG_SPL_MAX_SIZE		0x32000
+#define CONFIG_SPL_TEXT_BASE		0x60000000
+#define CONFIG_SPL_STACK		0x1008FFFF
+#define CONFIG_SPL_BOARD_INIT
+#define CONFIG_SPL_NAND_DRIVERS
+#define CONFIG_SPL_NAND_LOAD
+#define CONFIG_SPL_NAND_ECC
+#define CONFIG_SPL_NAND_BASE
+#define CONFIG_SPL_NAND_INIT
+#define CONFIG_SPL_NAND_BBT
+#define CONFIG_SPL_NAND_IDS
+#define CONFIG_SPL_NAND_UTIL
+#define CONFIG_SPL_NAND_RAW_ONLY
+#define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_DST	CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_SIZE	0x80000
+#define CONFIG_EXTRA_ENV_SETTINGS ROCKCHIP_DEVICE_SETTINGS
+#define CONFIG_MTD_DEVICE
+#endif
+
+#include <config_distro_defaults.h>
+
+#ifndef CONFIG_SPL_BUILD
+
+#define CONFIG_USB_FUNCTION_MASS_STORAGE
+
+#define CONFIG_MTD_DEVICE
+#define MTDIDS_DEFAULT			"nand0=rockchip-nand.0"
+
+#define ENV_MEM_LAYOUT_SETTINGS \
+	"scriptaddr=0x60000000\0" \
+	"pxefile_addr_r=0x60100000\0" \
+	"fdt_addr_r=0x61f00000\0" \
+	"kernel_addr_r=0x62000000\0" \
+	"ramdisk_addr_r=0x64000000\0"
+
+#include <config_distro_bootcmd.h>
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	"fdt_high=0x6fffffff\0" \
+	"initrd_high=0x6fffffff\0" \
+	"partitions=" PARTS_DEFAULT \
+	"mtdids=" MTDIDS_DEFAULT "\0" \
+	ENV_MEM_LAYOUT_SETTINGS \
+	ROCKCHIP_DEVICE_SETTINGS \
+	BOOTENV
+
+#endif
+
+#define CONFIG_PREBOOT
+
+#endif

commit 2c67c6667b5a71f797886cb45c2da62bef53bbb9
Author: Paweł Jarosz <paweljarosz3691@gmail.com>
Date:   Thu Aug 17 15:12:57 2017 +0200

    rockchip: rk3066: add rk3066 platform devicetree file
    
    rk3066 peripherials include usb, i2c, pwm, gpio, sdio, sdmmc, emmc, spi,
    watchdog and uart
    
    Change-Id: I38f07257bab251f043031028f2739ec9c861d014
    Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3066a.dtsi b/arch/arm/dts/rk3066a.dtsi
new file mode 100644
index 0000000000..92ee1c2aa0
--- /dev/null
+++ b/arch/arm/dts/rk3066a.dtsi
@@ -0,0 +1,707 @@
+/*
+ * Copyright (c) 2013 MundoReader S.L.
+ * Author: Heiko Stuebner <heiko@sntech.de>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/clock/rk3066a-cru.h>
+#include "rk3xxx.dtsi"
+
+/ {
+	compatible = "rockchip,rk3066a";
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		enable-method = "rockchip,rk3066-smp";
+
+		cpu0: cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a9";
+			next-level-cache = <&L2>;
+			reg = <0x0>;
+			operating-points = <
+				/* kHz    uV */
+				1416000 1300000
+				1200000 1175000
+				1008000 1125000
+				816000  1125000
+				600000  1100000
+				504000  1100000
+				312000  1075000
+			>;
+			clock-latency = <40000>;
+			clocks = <&cru ARMCLK>;
+		};
+		cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a9";
+			next-level-cache = <&L2>;
+			reg = <0x1>;
+		};
+	};
+
+	sram: sram@10080000 {
+		compatible = "mmio-sram";
+		reg = <0x10080000 0x10000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0x10080000 0x10000>;
+
+		smp-sram@0 {
+			compatible = "rockchip,rk3066-smp-sram";
+			reg = <0x0 0x50>;
+		};
+	};
+
+	i2s0: i2s@10118000 {
+		compatible = "rockchip,rk3066-i2s";
+		reg = <0x10118000 0x2000>;
+		interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2s0_bus>;
+		dmas = <&dmac1_s 4>, <&dmac1_s 5>;
+		dma-names = "tx", "rx";
+		clock-names = "i2s_hclk", "i2s_clk";
+		clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>;
+		rockchip,playback-channels = <8>;
+		rockchip,capture-channels = <2>;
+		status = "disabled";
+	};
+
+	i2s1: i2s@1011a000 {
+		compatible = "rockchip,rk3066-i2s";
+		reg = <0x1011a000 0x2000>;
+		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2s1_bus>;
+		dmas = <&dmac1_s 6>, <&dmac1_s 7>;
+		dma-names = "tx", "rx";
+		clock-names = "i2s_hclk", "i2s_clk";
+		clocks = <&cru HCLK_I2S1>, <&cru SCLK_I2S1>;
+		rockchip,playback-channels = <2>;
+		rockchip,capture-channels = <2>;
+		status = "disabled";
+	};
+
+	i2s2: i2s@1011c000 {
+		compatible = "rockchip,rk3066-i2s";
+		reg = <0x1011c000 0x2000>;
+		interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2s2_bus>;
+		dmas = <&dmac1_s 9>, <&dmac1_s 10>;
+		dma-names = "tx", "rx";
+		clock-names = "i2s_hclk", "i2s_clk";
+		clocks = <&cru HCLK_I2S2>, <&cru SCLK_I2S2>;
+		rockchip,playback-channels = <2>;
+		rockchip,capture-channels = <2>;
+		status = "disabled";
+	};
+
+	nandc: nandc@10500000 {
+		compatible = "rockchip,nandc";
+		reg = <0x10500000 0x2000>;
+		interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+		clock-names = "hclk";
+		clocks = <&cru HCLK_NANDC0>;
+		status = "disabled";
+	};
+
+	cru: clock-controller@20000000 {
+		compatible = "rockchip,rk3066a-cru";
+		reg = <0x20000000 0x1000>;
+		rockchip,grf = <&grf>;
+		u-boot,dm-pre-reloc;
+
+		#clock-cells = <1>;
+		#reset-cells = <1>;
+		assigned-clocks = <&cru PLL_CPLL>, <&cru PLL_GPLL>,
+				  <&cru ACLK_CPU>, <&cru HCLK_CPU>,
+				  <&cru PCLK_CPU>, <&cru ACLK_PERI>,
+				  <&cru HCLK_PERI>, <&cru PCLK_PERI>;
+		assigned-clock-rates = <400000000>, <594000000>,
+				       <300000000>, <150000000>,
+				       <75000000>, <300000000>,
+				       <150000000>, <75000000>;
+	};
+
+	timer@2000e000 {
+		compatible = "snps,dw-apb-timer-osc";
+		reg = <0x2000e000 0x100>;
+		interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_TIMER2>, <&cru PCLK_TIMER2>;
+		clock-names = "timer", "pclk";
+	};
+
+	efuse: efuse@20010000 {
+		compatible = "rockchip,rk3066a-efuse";
+		reg = <0x20010000 0x4000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		clocks = <&cru PCLK_EFUSE>;
+		clock-names = "pclk_efuse";
+
+		cpu_leakage: cpu_leakage@17 {
+			reg = <0x17 0x1>;
+		};
+	};
+
+	timer@20038000 {
+		compatible = "snps,dw-apb-timer-osc";
+		reg = <0x20038000 0x100>;
+		interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_TIMER0>, <&cru PCLK_TIMER0>;
+		clock-names = "timer", "pclk";
+	};
+
+	timer@2003a000 {
+		compatible = "snps,dw-apb-timer-osc";
+		reg = <0x2003a000 0x100>;
+		interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_TIMER1>, <&cru PCLK_TIMER1>;
+		clock-names = "timer", "pclk";
+	};
+
+	tsadc: tsadc@20060000 {
+		compatible = "rockchip,rk3066-tsadc";
+		reg = <0x20060000 0x100>;
+		clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
+		clock-names = "saradc", "apb_pclk";
+		interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+		#io-channel-cells = <1>;
+		resets = <&cru SRST_TSADC>;
+		reset-names = "saradc-apb";
+		status = "disabled";
+	};
+
+	usbphy: phy {
+		compatible = "rockchip,rk3066a-usb-phy", "rockchip,rk3288-usb-phy";
+		rockchip,grf = <&grf>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+
+		usbphy0: usb-phy@17c {
+			#phy-cells = <0>;
+			reg = <0x17c>;
+			clocks = <&cru SCLK_OTGPHY0>;
+			clock-names = "phyclk";
+			#clock-cells = <0>;
+		};
+
+		usbphy1: usb-phy@188 {
+			#phy-cells = <0>;
+			reg = <0x188>;
+			clocks = <&cru SCLK_OTGPHY1>;
+			clock-names = "phyclk";
+			#clock-cells = <0>;
+		};
+	};
+
+	pinctrl: pinctrl {
+		compatible = "rockchip,rk3066a-pinctrl";
+		rockchip,grf = <&grf>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		u-boot,dm-pre-reloc;
+
+		gpio0: gpio0@20034000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x20034000 0x100>;
+			interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru PCLK_GPIO0>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio1: gpio1@2003c000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x2003c000 0x100>;
+			interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru PCLK_GPIO1>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio2: gpio2@2003e000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x2003e000 0x100>;
+			interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru PCLK_GPIO2>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio3: gpio3@20080000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x20080000 0x100>;
+			interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru PCLK_GPIO3>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio4: gpio4@20084000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x20084000 0x100>;
+			interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru PCLK_GPIO4>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio6: gpio6@2000a000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x2000a000 0x100>;
+			interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru PCLK_GPIO6>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		pcfg_pull_default: pcfg_pull_default {
+			bias-pull-pin-default;
+		};
+
+		pcfg_pull_none: pcfg_pull_none {
+			bias-disable;
+		};
+
+		emac {
+			emac_xfer: emac-xfer {
+				rockchip,pins = <RK_GPIO1 16 RK_FUNC_2 &pcfg_pull_none>, /* mac_clk */
+						<RK_GPIO1 17 RK_FUNC_2 &pcfg_pull_none>, /* tx_en */
+						<RK_GPIO1 18 RK_FUNC_2 &pcfg_pull_none>, /* txd1 */
+						<RK_GPIO1 19 RK_FUNC_2 &pcfg_pull_none>, /* txd0 */
+						<RK_GPIO1 20 RK_FUNC_2 &pcfg_pull_none>, /* rx_err */
+						<RK_GPIO1 21 RK_FUNC_2 &pcfg_pull_none>, /* crs_dvalid */
+						<RK_GPIO1 22 RK_FUNC_2 &pcfg_pull_none>, /* rxd1 */
+						<RK_GPIO1 23 RK_FUNC_2 &pcfg_pull_none>; /* rxd0 */
+			};
+
+			emac_mdio: emac-mdio {
+				rockchip,pins = <RK_GPIO1 24 RK_FUNC_2 &pcfg_pull_none>, /* mac_md */
+						<RK_GPIO1 25 RK_FUNC_2 &pcfg_pull_none>; /* mac_mdclk */
+			};
+		};
+
+		emmc {
+			emmc_clk: emmc-clk {
+				rockchip,pins = <RK_GPIO3 31 RK_FUNC_2 &pcfg_pull_default>;
+			};
+
+			emmc_cmd: emmc-cmd {
+				rockchip,pins = <RK_GPIO4 9 RK_FUNC_2 &pcfg_pull_default>;
+			};
+
+			emmc_rst: emmc-rst {
+				rockchip,pins = <RK_GPIO4 10 RK_FUNC_2 &pcfg_pull_default>;
+			};
+
+			/*
+			 * The data pins are shared between nandc and emmc and
+			 * not accessible through pinctrl. Also they should've
+			 * been already set correctly by firmware, as
+			 * flash/emmc is the boot-device.
+			 */
+		};
+
+		i2c0 {
+			i2c0_xfer: i2c0-xfer {
+				rockchip,pins = <RK_GPIO2 28 RK_FUNC_1 &pcfg_pull_none>,
+						<RK_GPIO2 29 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		i2c1 {
+			i2c1_xfer: i2c1-xfer {
+				rockchip,pins = <RK_GPIO2 30 RK_FUNC_1 &pcfg_pull_none>,
+						<RK_GPIO2 31 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		i2c2 {
+			i2c2_xfer: i2c2-xfer {
+				rockchip,pins = <RK_GPIO3 0 RK_FUNC_1 &pcfg_pull_none>,
+						<RK_GPIO3 1 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		i2c3 {
+			i2c3_xfer: i2c3-xfer {
+				rockchip,pins = <RK_GPIO3 2 RK_FUNC_2 &pcfg_pull_none>,
+						<RK_GPIO3 3 RK_FUNC_2 &pcfg_pull_none>;
+			};
+		};
+
+		i2c4 {
+			i2c4_xfer: i2c4-xfer {
+				rockchip,pins = <RK_GPIO3 4 RK_FUNC_1 &pcfg_pull_none>,
+						<RK_GPIO3 5 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		pwm0 {
+			pwm0_out: pwm0-out {
+				rockchip,pins = <RK_GPIO0 3 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		pwm1 {
+			pwm1_out: pwm1-out {
+				rockchip,pins = <RK_GPIO0 4 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		pwm2 {
+			pwm2_out: pwm2-out {
+				rockchip,pins = <RK_GPIO0 30 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		pwm3 {
+			pwm3_out: pwm3-out {
+				rockchip,pins = <RK_GPIO0 31 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		spi0 {
+			spi0_clk: spi0-clk {
+				rockchip,pins = <RK_GPIO1 5 RK_FUNC_2 &pcfg_pull_default>;
+			};
+			spi0_cs0: spi0-cs0 {
+				rockchip,pins = <RK_GPIO1 4 RK_FUNC_2 &pcfg_pull_default>;
+			};
+			spi0_tx: spi0-tx {
+				rockchip,pins = <RK_GPIO1 7 RK_FUNC_2 &pcfg_pull_default>;
+			};
+			spi0_rx: spi0-rx {
+				rockchip,pins = <RK_GPIO1 6 RK_FUNC_2 &pcfg_pull_default>;
+			};
+			spi0_cs1: spi0-cs1 {
+				rockchip,pins = <RK_GPIO4 15 RK_FUNC_1 &pcfg_pull_default>;
+			};
+		};
+
+		spi1 {
+			spi1_clk: spi1-clk {
+				rockchip,pins = <RK_GPIO2 19 RK_FUNC_2 &pcfg_pull_default>;
+			};
+			spi1_cs0: spi1-cs0 {
+				rockchip,pins = <RK_GPIO2 20 RK_FUNC_2 &pcfg_pull_default>;
+			};
+			spi1_rx: spi1-rx {
+				rockchip,pins = <RK_GPIO2 22 RK_FUNC_2 &pcfg_pull_default>;
+			};
+			spi1_tx: spi1-tx {
+				rockchip,pins = <RK_GPIO2 21 RK_FUNC_2 &pcfg_pull_default>;
+			};
+			spi1_cs1: spi1-cs1 {
+				rockchip,pins = <RK_GPIO2 23 RK_FUNC_2 &pcfg_pull_default>;
+			};
+		};
+
+		uart0 {
+			uart0_xfer: uart0-xfer {
+				rockchip,pins = <RK_GPIO1 0 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO1 1 RK_FUNC_1 &pcfg_pull_default>;
+			};
+
+			uart0_cts: uart0-cts {
+				rockchip,pins = <RK_GPIO1 2 RK_FUNC_1 &pcfg_pull_default>;
+			};
+
+			uart0_rts: uart0-rts {
+				rockchip,pins = <RK_GPIO1 3 RK_FUNC_1 &pcfg_pull_default>;
+			};
+		};
+
+		uart1 {
+			uart1_xfer: uart1-xfer {
+				rockchip,pins = <RK_GPIO1 4 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO1 5 RK_FUNC_1 &pcfg_pull_default>;
+			};
+
+			uart1_cts: uart1-cts {
+				rockchip,pins = <RK_GPIO1 6 RK_FUNC_1 &pcfg_pull_default>;
+			};
+
+			uart1_rts: uart1-rts {
+				rockchip,pins = <RK_GPIO1 7 RK_FUNC_1 &pcfg_pull_default>;
+			};
+		};
+
+		uart2 {
+			uart2_xfer: uart2-xfer {
+				rockchip,pins = <RK_GPIO1 8 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO1 9 RK_FUNC_1 &pcfg_pull_default>;
+			};
+			/* no rts / cts for uart2 */
+		};
+
+		uart3 {
+			uart3_xfer: uart3-xfer {
+				rockchip,pins = <RK_GPIO3 27 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO3 28 RK_FUNC_1 &pcfg_pull_default>;
+			};
+
+			uart3_cts: uart3-cts {
+				rockchip,pins = <RK_GPIO3 29 RK_FUNC_1 &pcfg_pull_default>;
+			};
+
+			uart3_rts: uart3-rts {
+				rockchip,pins = <RK_GPIO3 30 RK_FUNC_1 &pcfg_pull_default>;
+			};
+		};
+
+		sd0 {
+			sd0_clk: sd0-clk {
+				rockchip,pins = <RK_GPIO3 8 RK_FUNC_1 &pcfg_pull_default>;
+			};
+
+			sd0_cmd: sd0-cmd {
+				rockchip,pins = <RK_GPIO3 9 RK_FUNC_1 &pcfg_pull_default>;
+			};
+
+			sd0_cd: sd0-cd {
+				rockchip,pins = <RK_GPIO3 14 RK_FUNC_1 &pcfg_pull_default>;
+			};
+
+			sd0_wp: sd0-wp {
+				rockchip,pins = <RK_GPIO3 15 RK_FUNC_1 &pcfg_pull_default>;
+			};
+
+			sd0_bus1: sd0-bus-width1 {
+				rockchip,pins = <RK_GPIO3 10 RK_FUNC_1 &pcfg_pull_default>;
+			};
+
+			sd0_bus4: sd0-bus-width4 {
+				rockchip,pins = <RK_GPIO3 10 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO3 11 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO3 12 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO3 13 RK_FUNC_1 &pcfg_pull_default>;
+			};
+		};
+
+		sd1 {
+			sd1_clk: sd1-clk {
+				rockchip,pins = <RK_GPIO3 21 RK_FUNC_1 &pcfg_pull_default>;
+			};
+
+			sd1_cmd: sd1-cmd {
+				rockchip,pins = <RK_GPIO3 16 RK_FUNC_1 &pcfg_pull_default>;
+			};
+
+			sd1_cd: sd1-cd {
+				rockchip,pins = <RK_GPIO3 22 RK_FUNC_1 &pcfg_pull_default>;
+			};
+
+			sd1_wp: sd1-wp {
+				rockchip,pins = <RK_GPIO3 23 RK_FUNC_1 &pcfg_pull_default>;
+			};
+
+			sd1_bus1: sd1-bus-width1 {
+				rockchip,pins = <RK_GPIO3 17 RK_FUNC_1 &pcfg_pull_default>;
+			};
+
+			sd1_bus4: sd1-bus-width4 {
+				rockchip,pins = <RK_GPIO3 17 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO3 18 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO3 19 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO3 20 RK_FUNC_1 &pcfg_pull_default>;
+			};
+		};
+
+		i2s0 {
+			i2s0_bus: i2s0-bus {
+				rockchip,pins = <RK_GPIO0 7 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO0 8 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO0 9 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO0 10 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO0 11 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO0 12 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO0 13 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO0 14 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO0 15 RK_FUNC_1 &pcfg_pull_default>;
+			};
+		};
+
+		i2s1 {
+			i2s1_bus: i2s1-bus {
+				rockchip,pins = <RK_GPIO0 16 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO0 17 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO0 18 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO0 19 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO0 20 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO0 21 RK_FUNC_1 &pcfg_pull_default>;
+			};
+		};
+
+		i2s2 {
+			i2s2_bus: i2s2-bus {
+				rockchip,pins = <RK_GPIO0 24 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO0 25 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO0 26 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO0 27 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO0 28 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO0 29 RK_FUNC_1 &pcfg_pull_default>;
+			};
+		};
+	};
+};
+
+&grf {
+	compatible = "rockchip,rk3066-grf", "syscon";
+};
+
+&i2c0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c0_xfer>;
+};
+
+&i2c1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c1_xfer>;
+};
+
+&i2c2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c2_xfer>;
+};
+
+&i2c3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c3_xfer>;
+};
+
+&i2c4 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c4_xfer>;
+};
+
+&mmc0 {
+	clock-frequency = <50000000>;
+	dmas = <&dmac2 1>;
+	dma-names = "rx-tx";
+	max-frequency = <50000000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_cd &sd0_bus4>;
+	u-boot,dm-pre-reloc;
+};
+
+&mmc1 {
+	dmas = <&dmac2 3>;
+	dma-names = "rx-tx";
+	pinctrl-names = "default";
+	pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_cd &sd1_bus4>;
+};
+
+&emmc {
+	dmas = <&dmac2 4>;
+	dma-names = "rx-tx";
+};
+
+&pwm0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pwm0_out>;
+};
+
+&pwm1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pwm1_out>;
+};
+
+&pwm2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pwm2_out>;
+};
+
+&pwm3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pwm3_out>;
+};
+
+&spi0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&spi0_clk &spi0_tx &spi0_rx &spi0_cs0>;
+};
+
+&spi1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&spi1_clk &spi1_tx &spi1_rx &spi1_cs0>;
+};
+
+&uart0 {
+	compatible = "rockchip,rk3066-uart", "snps,dw-apb-uart";
+	dmas = <&dmac1_s 0>, <&dmac1_s 1>;
+	dma-names = "tx", "rx";
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_xfer>;
+};
+
+&uart1 {
+	compatible = "rockchip,rk3066-uart", "snps,dw-apb-uart";
+	dmas = <&dmac1_s 2>, <&dmac1_s 3>;
+	dma-names = "tx", "rx";
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart1_xfer>;
+};
+
+&uart2 {
+	compatible = "rockchip,rk3066-uart", "snps,dw-apb-uart";
+	dmas = <&dmac2 6>, <&dmac2 7>;
+	dma-names = "tx", "rx";
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart2_xfer>;
+};
+
+&uart3 {
+	compatible = "rockchip,rk3066-uart", "snps,dw-apb-uart";
+	dmas = <&dmac2 8>, <&dmac2 9>;
+	dma-names = "tx", "rx";
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart3_xfer>;
+};
+
+&wdt {
+	compatible = "rockchip,rk3066-wdt", "snps,dw-wdt";
+};
+
+&emac {
+	compatible = "rockchip,rk3066-emac";
+};

commit 4931c6fb28511c3f74ac546161ce1d3223c9e536
Author: Paweł Jarosz <paweljarosz3691@gmail.com>
Date:   Thu Aug 17 15:12:44 2017 +0200

    rockchip: rk3066: add clock driver for rk3066 soc
    
    Add clock driver for rk3066 platform.
    
    Change-Id: I15527fb77c3b9a46a25df2ff51f4a78cf3808ea0
    Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3066.h b/arch/arm/include/asm/arch-rockchip/cru_rk3066.h
new file mode 100644
index 0000000000..c4a6951633
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3066.h
@@ -0,0 +1,189 @@
+/*
+ * (C) Copyright 2016 Heiko Stuebner <heiko@sntech.de>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#ifndef _ASM_ARCH_CRU_RK3066_H
+#define _ASM_ARCH_CRU_RK3066_H
+
+#define OSC_HZ		(24 * 1000 * 1000)
+
+#define APLL_HZ		(1416 * 1000000)
+#define APLL_SAFE_HZ	(600 * 1000000)
+#define GPLL_HZ		(594 * 1000000)
+#define CPLL_HZ		(384 * 1000000)
+
+/* The SRAM is clocked off aclk_cpu, so we want to max it out for boot speed */
+#define CPU_ACLK_HZ	297000000
+#define CPU_HCLK_HZ	148500000
+#define CPU_PCLK_HZ	74250000
+#define CPU_H2P_HZ	74250000
+
+#define PERI_ACLK_HZ	148500000
+#define PERI_HCLK_HZ	148500000
+#define PERI_PCLK_HZ	74250000
+
+/* Private data for the clock driver - used by rockchip_get_cru() */
+struct rk3066_clk_priv {
+	struct rk3066_grf *grf;
+	struct rk3066_cru *cru;
+	ulong rate;
+	bool has_bwadj;
+};
+
+struct rk3066_cru {
+	struct rk3066_pll {
+		u32 con0;
+		u32 con1;
+		u32 con2;
+		u32 con3;
+	} pll[4];
+	u32 cru_mode_con;
+	u32 cru_clksel_con[35];
+	u32 cru_clkgate_con[10];
+	u32 reserved1[2];
+	u32 cru_glb_srst_fst_value;
+	u32 cru_glb_srst_snd_value;
+	u32 reserved2[2];
+	u32 cru_softrst_con[9];
+	u32 cru_misc_con;
+	u32 reserved3[2];
+	u32 cru_glb_cnt_th;
+};
+check_member(rk3066_cru, cru_glb_cnt_th, 0x0140);
+
+/* CRU_CLKSEL0_CON */
+enum {
+	/* a9_core_div: core = core_src / (a9_core_div + 1) */
+	A9_CORE_DIV_SHIFT	= 9,
+	A9_CORE_DIV_MASK	= 0x1f << A9_CORE_DIV_SHIFT,
+	CORE_PLL_SHIFT		= 8,
+	CORE_PLL_MASK		= 1 << CORE_PLL_SHIFT,
+	CORE_PLL_SELECT_APLL	= 0,
+	CORE_PLL_SELECT_GPLL,
+
+	/* core peri div: core:core_peri = 2:1, 4:1, 8:1 or 16:1 */
+	CORE_PERI_DIV_SHIFT	= 6,
+	CORE_PERI_DIV_MASK	= 3 << CORE_PERI_DIV_SHIFT,
+
+	/* aclk_cpu pll selection */
+	CPU_ACLK_PLL_SHIFT	= 5,
+	CPU_ACLK_PLL_MASK	= 1 << CPU_ACLK_PLL_SHIFT,
+	CPU_ACLK_PLL_SELECT_APLL	= 0,
+	CPU_ACLK_PLL_SELECT_GPLL,
+
+	/* a9_cpu_div: aclk_cpu = cpu_src / (a9_cpu_div + 1) */
+	A9_CPU_DIV_SHIFT	= 0,
+	A9_CPU_DIV_MASK		= 0x1f << A9_CPU_DIV_SHIFT,
+};
+
+/* CRU_CLKSEL1_CON */
+enum {
+	/* ahb2apb_pclk_div: hclk_cpu:pclk_cpu = 1:1, 2:1 or 4:1 */
+	AHB2APB_DIV_SHIFT	= 14,
+	AHB2APB_DIV_MASK	= 3 << AHB2APB_DIV_SHIFT,
+
+	/* cpu_pclk_div: aclk_cpu:pclk_cpu = 1:1, 2:1, 4:1 or 8:1 */
+	CPU_PCLK_DIV_SHIFT	= 12,
+	CPU_PCLK_DIV_MASK	= 3 << CPU_PCLK_DIV_SHIFT,
+
+	/* cpu_hclk_div: aclk_cpu:hclk_cpu = 1:1, 2:1 or 4:1 */
+	CPU_HCLK_DIV_SHIFT	= 8,
+	CPU_HCLK_DIV_MASK	= 3 << CPU_HCLK_DIV_SHIFT,
+
+	/* core_aclk_div: cire:aclk_core = 1:1, 2:1, 3:1, 4:1 or 8:1 */
+	CORE_ACLK_DIV_SHIFT	= 3,
+	CORE_ACLK_DIV_MASK	= 7 << CORE_ACLK_DIV_SHIFT,
+};
+
+/* CRU_CLKSEL10_CON */
+enum {
+	PERI_SEL_PLL_SHIFT	= 15,
+	PERI_SEL_PLL_MASK	= 1 << PERI_SEL_PLL_SHIFT,
+	PERI_SEL_CPLL		= 0,
+	PERI_SEL_GPLL,
+
+	/* peri pclk div: aclk_bus:pclk_bus = 1:1, 2:1, 4:1 or 8:1 */
+	PERI_PCLK_DIV_SHIFT	= 12,
+	PERI_PCLK_DIV_MASK	= 3 << PERI_PCLK_DIV_SHIFT,
+
+	/* peripheral bus hclk div:aclk_bus: hclk_bus = 1:1, 2:1 or 4:1 */
+	PERI_HCLK_DIV_SHIFT	= 8,
+	PERI_HCLK_DIV_MASK	= 3 << PERI_HCLK_DIV_SHIFT,
+
+	/* peri aclk div: aclk_peri = periph_src / (peri_aclk_div + 1) */
+	PERI_ACLK_DIV_SHIFT	= 0,
+	PERI_ACLK_DIV_MASK	= 0x1f << PERI_ACLK_DIV_SHIFT,
+};
+/* CRU_CLKSEL11_CON */
+enum {
+	MMC0_DIV_SHIFT		= 0,
+	MMC0_DIV_MASK		= 0x3f << MMC0_DIV_SHIFT,
+};
+
+/* CRU_CLKSEL12_CON */
+enum {
+	UART_PLL_SHIFT		= 15,
+	UART_PLL_MASK		= 1 << UART_PLL_SHIFT,
+	UART_PLL_SELECT_GENERAL	= 0,
+	UART_PLL_SELECT_CODEC,
+
+	EMMC_DIV_SHIFT		= 8,
+	EMMC_DIV_MASK		= 0x3f << EMMC_DIV_SHIFT,
+
+	SDIO_DIV_SHIFT		= 0,
+	SDIO_DIV_MASK		= 0x3f << SDIO_DIV_SHIFT,
+};
+
+/* CRU_CLKSEL25_CON */
+enum {
+	SPI1_DIV_SHIFT		= 8,
+	SPI1_DIV_MASK		= 0x7f << SPI1_DIV_SHIFT,
+
+	SPI0_DIV_SHIFT		= 0,
+	SPI0_DIV_MASK		= 0x7f << SPI0_DIV_SHIFT,
+};
+
+/* CRU_MODE_CON */
+enum {
+	GPLL_MODE_SHIFT		= 12,
+	GPLL_MODE_MASK		= 3 << GPLL_MODE_SHIFT,
+	GPLL_MODE_SLOW		= 0,
+	GPLL_MODE_NORMAL,
+	GPLL_MODE_DEEP,
+
+	CPLL_MODE_SHIFT		= 8,
+	CPLL_MODE_MASK		= 3 << CPLL_MODE_SHIFT,
+	CPLL_MODE_SLOW		= 0,
+	CPLL_MODE_NORMAL,
+	CPLL_MODE_DEEP,
+
+	DPLL_MODE_SHIFT		= 4,
+	DPLL_MODE_MASK		= 3 << DPLL_MODE_SHIFT,
+	DPLL_MODE_SLOW		= 0,
+	DPLL_MODE_NORMAL,
+	DPLL_MODE_DEEP,
+
+	APLL_MODE_SHIFT		= 0,
+	APLL_MODE_MASK		= 3 << APLL_MODE_SHIFT,
+	APLL_MODE_SLOW		= 0,
+	APLL_MODE_NORMAL,
+	APLL_MODE_DEEP,
+};
+
+/* CRU_APLL_CON0 */
+enum {
+	CLKR_SHIFT		= 8,
+	CLKR_MASK		= 0x3f << CLKR_SHIFT,
+
+	CLKOD_SHIFT		= 0,
+	CLKOD_MASK		= 0x3f << CLKOD_SHIFT,
+};
+
+/* CRU_APLL_CON1 */
+enum {
+	CLKF_SHIFT		= 0,
+	CLKF_MASK		= 0x1fff << CLKF_SHIFT,
+};
+
+#endif
diff --git a/drivers/clk/rockchip/Makefile b/drivers/clk/rockchip/Makefile
index eae0ef6a9f..c662de1230 100644
--- a/drivers/clk/rockchip/Makefile
+++ b/drivers/clk/rockchip/Makefile
@@ -5,6 +5,7 @@
 #
 
 obj-$(CONFIG_ROCKCHIP_RK3036) += clk_rk3036.o
+obj-$(CONFIG_ROCKCHIP_RK3066) += clk_rk3066.o
 obj-$(CONFIG_ROCKCHIP_RK3128) += clk_rk3128.o
 obj-$(CONFIG_ROCKCHIP_RK3188) += clk_rk3188.o
 obj-$(CONFIG_ROCKCHIP_RK322X) += clk_rk322x.o
diff --git a/drivers/clk/rockchip/clk_rk3066.c b/drivers/clk/rockchip/clk_rk3066.c
new file mode 100644
index 0000000000..e15273268e
--- /dev/null
+++ b/drivers/clk/rockchip/clk_rk3066.c
@@ -0,0 +1,611 @@
+/*
+ * (C) Copyright 2015 Google, Inc
+ * (C) Copyright 2016 Heiko Stuebner <heiko@sntech.de>
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#include <common.h>
+#include <clk-uclass.h>
+#include <dm.h>
+#include <dt-structs.h>
+#include <errno.h>
+#include <mapmem.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk3066.h>
+#include <asm/arch/grf_rk3066.h>
+#include <asm/arch/hardware.h>
+#include <dt-bindings/clock/rk3066a-cru.h>
+#include <dm/device-internal.h>
+#include <dm/lists.h>
+#include <dm/uclass-internal.h>
+#include <linux/log2.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+enum rk3066_clk_type {
+	RK3066_CRU,
+	RK3066A_CRU,
+};
+
+struct rk3066_clk_plat {
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+	struct dtd_rockchip_rk3066a_cru dtd;
+#endif
+};
+
+struct pll_div {
+	u32 nr;
+	u32 nf;
+	u32 no;
+};
+
+enum {
+	VCO_MAX_HZ	= 1416U * 1000000,
+	VCO_MIN_HZ	= 300 * 1000000,
+	OUTPUT_MAX_HZ	= 1416U * 1000000,
+	OUTPUT_MIN_HZ	= 30 * 1000000,
+	FREF_MAX_HZ	= 1416U * 1000000,
+	FREF_MIN_HZ	= 30 * 1000,
+};
+
+enum {
+	/* PLL CON0 */
+	PLL_OD_MASK		= 0x0f,
+
+	/* PLL CON1 */
+	PLL_NF_MASK		= 0x1fff,
+
+	/* PLL CON2 */
+	PLL_BWADJ_MASK		= 0x0fff,
+
+	/* PLL CON3 */
+	PLL_RESET_SHIFT		= 5,
+
+	/* GRF_SOC_STATUS0 */
+	SOCSTS_DPLL_LOCK	= 1 << 4,
+	SOCSTS_APLL_LOCK	= 1 << 5,
+	SOCSTS_CPLL_LOCK	= 1 << 6,
+	SOCSTS_GPLL_LOCK	= 1 << 7,
+};
+
+#define RATE_TO_DIV(input_rate, output_rate) \
+	((input_rate) / (output_rate) - 1);
+
+#define DIV_TO_RATE(input_rate, div)	((input_rate) / ((div) + 1))
+
+#define PLL_DIVISORS(hz, _nr, _no) {\
+	.nr = _nr, .nf = (u32)((u64)hz * _nr * _no / OSC_HZ), .no = _no};\
+	_Static_assert(((u64)hz * _nr * _no / OSC_HZ) * OSC_HZ /\
+		       (_nr * _no) == hz, #hz "Hz cannot be hit with PLL "\
+		       "divisors on line " __stringify(__LINE__));
+
+/* Keep divisors as low as possible to reduce jitter and power usage */
+#ifdef CONFIG_TPL_BUILD
+static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 2);
+static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 1, 2);
+#endif
+
+static int rkclk_set_pll(struct rk3066_cru *cru, enum rk_clk_id clk_id,
+			 const struct pll_div *div, bool has_bwadj)
+{
+	int pll_id = rk_pll_id(clk_id);
+	struct rk3066_pll *pll = &cru->pll[pll_id];
+	/* All PLLs have same VCO and output frequency range restrictions. */
+	uint vco_hz = OSC_HZ / 1000 * div->nf / div->nr * 1000;
+	uint output_hz = vco_hz / div->no;
+
+	debug("PLL at %x: nf=%d, nr=%d, no=%d, vco=%u Hz, output=%u Hz\n",
+	      (uint)pll, div->nf, div->nr, div->no, vco_hz, output_hz);
+	assert(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ &&
+	       output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ &&
+	       (div->no == 1 || !(div->no % 2)));
+
+	/* enter reset */
+	rk_setreg(&pll->con3, 1 << PLL_RESET_SHIFT);
+
+	rk_clrsetreg(&pll->con0,
+		     CLKR_MASK | PLL_OD_MASK,
+		     ((div->nr - 1) << CLKR_SHIFT) | (div->no - 1));
+	rk_clrsetreg(&pll->con1, CLKF_MASK, div->nf - 1);
+
+	if (has_bwadj)
+		rk_clrsetreg(&pll->con2, PLL_BWADJ_MASK, (div->nf >> 1) - 1);
+
+	udelay(10);
+
+	/* return from reset */
+	rk_clrreg(&pll->con3, 1 << PLL_RESET_SHIFT);
+
+	return 0;
+}
+
+static int rkclk_configure_ddr(struct rk3066_cru *cru, struct rk3066_grf *grf,
+			       unsigned int hz, bool has_bwadj)
+{
+	static const struct pll_div dpll_cfg[] = {
+		{.nf = 25, .nr = 2, .no = 1},
+		{.nf = 400, .nr = 9, .no = 2},
+		{.nf = 500, .nr = 9, .no = 2},
+		{.nf = 100, .nr = 3, .no = 1},
+	};
+	int cfg;
+
+	switch (hz) {
+	case 300000000:
+		cfg = 0;
+		break;
+	case 533000000:	/* actually 533.3P MHz */
+		cfg = 1;
+		break;
+	case 666000000:	/* actually 666.6P MHz */
+		cfg = 2;
+		break;
+	case 800000000:
+		cfg = 3;
+		break;
+	default:
+		debug("Unsupported SDRAM frequency");
+		return -EINVAL;
+	}
+
+	/* pll enter slow-mode */
+	rk_clrsetreg(&cru->cru_mode_con, DPLL_MODE_MASK,
+		     DPLL_MODE_SLOW << DPLL_MODE_SHIFT);
+
+	rkclk_set_pll(cru, CLK_DDR, &dpll_cfg[cfg], has_bwadj);
+
+	/* wait for pll lock */
+	while (!(readl(&grf->soc_status0) & SOCSTS_DPLL_LOCK))
+		udelay(1);
+
+	/* PLL enter normal-mode */
+	rk_clrsetreg(&cru->cru_mode_con, DPLL_MODE_MASK,
+		     DPLL_MODE_NORMAL << DPLL_MODE_SHIFT);
+
+	return 0;
+}
+
+static int rkclk_configure_cpu(struct rk3066_cru *cru, struct rk3066_grf *grf,
+			      unsigned int hz, bool has_bwadj)
+{
+	static const struct pll_div apll_cfg[] = {
+		{.nf = 50, .nr = 1, .no = 2},
+		{.nf = 59, .nr = 1, .no = 1},
+	};
+	int div_core_peri, div_aclk_core, cfg;
+
+	/*
+	 * We support two possible frequencies, the safe 600MHz
+	 * which will work with default pmic settings and will
+	 * be set to get away from the 24MHz default and
+	 * the maximum of 1.416Ghz, which boards can set if they
+	 * were able to get pmic support for it.
+	 */
+	switch (hz) {
+	case APLL_SAFE_HZ:
+		cfg = 0;
+		div_core_peri = 1;
+		div_aclk_core = 3;
+		break;
+	case APLL_HZ:
+		cfg = 1;
+		div_core_peri = 2;
+		div_aclk_core = 3;
+		break;
+	default:
+		debug("Unsupported ARMCLK frequency");
+		return -EINVAL;
+	}
+
+	/* pll enter slow-mode */
+	rk_clrsetreg(&cru->cru_mode_con, APLL_MODE_MASK,
+		     APLL_MODE_SLOW << APLL_MODE_SHIFT);
+
+	rkclk_set_pll(cru, CLK_ARM, &apll_cfg[cfg], has_bwadj);
+
+	/* waiting for pll lock */
+	while (!(readl(&grf->soc_status0) & SOCSTS_APLL_LOCK))
+		udelay(1);
+
+	/* Set divider for peripherals attached to the cpu core. */
+	rk_clrsetreg(&cru->cru_clksel_con[0],
+		CORE_PERI_DIV_MASK,
+		div_core_peri << CORE_PERI_DIV_SHIFT);
+
+	/* set up dependent divisor for aclk_core */
+	rk_clrsetreg(&cru->cru_clksel_con[1],
+		CORE_ACLK_DIV_MASK,
+		div_aclk_core << CORE_ACLK_DIV_SHIFT);
+
+	/* PLL enter normal-mode */
+	rk_clrsetreg(&cru->cru_mode_con, APLL_MODE_MASK,
+		     APLL_MODE_NORMAL << APLL_MODE_SHIFT);
+
+	return hz;
+}
+
+/* Get pll rate by id */
+static uint32_t rkclk_pll_get_rate(struct rk3066_cru *cru,
+				   enum rk_clk_id clk_id)
+{
+	uint32_t nr, no, nf;
+	uint32_t con;
+	int pll_id = rk_pll_id(clk_id);
+	struct rk3066_pll *pll = &cru->pll[pll_id];
+	static u8 clk_shift[CLK_COUNT] = {
+		0xff, APLL_MODE_SHIFT, DPLL_MODE_SHIFT, CPLL_MODE_SHIFT,
+		GPLL_MODE_SHIFT
+	};
+	uint shift;
+
+	con = readl(&cru->cru_mode_con);
+	shift = clk_shift[clk_id];
+	switch ((con >> shift) & APLL_MODE_MASK >> APLL_MODE_SHIFT) {
+	case APLL_MODE_SLOW:
+		return OSC_HZ;
+	case APLL_MODE_NORMAL:
+		/* normal mode */
+		con = readl(&pll->con0);
+		no = ((con >> CLKOD_SHIFT) & (CLKOD_MASK >> CLKOD_SHIFT)) + 1;
+		nr = ((con >> CLKR_SHIFT) & (CLKR_MASK >> CLKR_SHIFT)) + 1;
+		con = readl(&pll->con1);
+		nf = ((con >> CLKF_SHIFT) & (CLKF_MASK >> CLKF_SHIFT)) + 1;
+
+		return (24 * nf / (nr * no)) * 1000000;
+	case APLL_MODE_DEEP:
+	default:
+		return 32768;
+	}
+}
+
+static ulong rockchip_mmc_get_clk(struct rk3066_cru *cru, uint gclk_rate,
+				  int periph)
+{
+	uint div;
+	u32 con;
+
+	switch (periph) {
+	case HCLK_EMMC:
+		con = readl(&cru->cru_clksel_con[12]);
+		div = (con >> EMMC_DIV_SHIFT) & EMMC_DIV_MASK >> EMMC_DIV_SHIFT;
+		break;
+	case HCLK_SDMMC:
+		con = readl(&cru->cru_clksel_con[11]);
+		div = (con >> MMC0_DIV_SHIFT) & MMC0_DIV_MASK >> MMC0_DIV_SHIFT;
+		break;
+	case HCLK_SDIO:
+		con = readl(&cru->cru_clksel_con[12]);
+		div = (con >> SDIO_DIV_SHIFT) & SDIO_DIV_MASK >> SDIO_DIV_SHIFT;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return DIV_TO_RATE(gclk_rate, div);
+}
+
+static ulong rockchip_mmc_set_clk(struct rk3066_cru *cru, uint gclk_rate,
+				  int  periph, uint freq)
+{
+	int src_clk_div;
+
+	debug("%s: gclk_rate=%u\n", __func__, gclk_rate);
+	src_clk_div = RATE_TO_DIV(gclk_rate, freq);
+	if (src_clk_div > 0x3f)
+		src_clk_div = 0x3f;
+
+	switch (periph) {
+	case HCLK_EMMC:
+		rk_clrsetreg(&cru->cru_clksel_con[12],
+			     EMMC_DIV_MASK,
+			     src_clk_div << EMMC_DIV_SHIFT);
+		break;
+	case HCLK_SDMMC:
+		rk_clrsetreg(&cru->cru_clksel_con[11],
+			     MMC0_DIV_MASK,
+			     src_clk_div << MMC0_DIV_SHIFT);
+		break;
+	case HCLK_SDIO:
+		rk_clrsetreg(&cru->cru_clksel_con[12],
+			     SDIO_DIV_MASK,
+			     src_clk_div << SDIO_DIV_SHIFT);
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return rockchip_mmc_get_clk(cru, gclk_rate, periph);
+}
+
+static ulong rockchip_spi_get_clk(struct rk3066_cru *cru, uint gclk_rate,
+				  int periph)
+{
+	uint div;
+	u32 con;
+
+	switch (periph) {
+	case SCLK_SPI0:
+		con = readl(&cru->cru_clksel_con[25]);
+		div = (con >> SPI0_DIV_SHIFT) & SPI0_DIV_MASK >> SPI0_DIV_SHIFT;
+		break;
+	case SCLK_SPI1:
+		con = readl(&cru->cru_clksel_con[25]);
+		div = (con >> SPI1_DIV_SHIFT) & SPI1_DIV_MASK >> SPI1_DIV_SHIFT;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return DIV_TO_RATE(gclk_rate, div);
+}
+
+static ulong rockchip_spi_set_clk(struct rk3066_cru *cru, uint gclk_rate,
+				  int periph, uint freq)
+{
+	int src_clk_div = RATE_TO_DIV(gclk_rate, freq);
+
+	switch (periph) {
+	case SCLK_SPI0:
+		assert(src_clk_div <= SPI0_DIV_MASK >> SPI0_DIV_SHIFT);
+		rk_clrsetreg(&cru->cru_clksel_con[25],
+			     SPI0_DIV_MASK,
+			     src_clk_div << SPI0_DIV_SHIFT);
+		break;
+	case SCLK_SPI1:
+		assert(src_clk_div <= SPI1_DIV_MASK >> SPI1_DIV_SHIFT);
+		rk_clrsetreg(&cru->cru_clksel_con[25],
+			     SPI1_DIV_MASK,
+			     src_clk_div << SPI1_DIV_SHIFT);
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return rockchip_spi_get_clk(cru, gclk_rate, periph);
+}
+#ifdef CONFIG_TPL_BUILD
+static void rkclk_init(struct rk3066_cru *cru, struct rk3066_grf *grf,
+		       bool has_bwadj)
+{
+	u32 aclk_div, hclk_div, pclk_div, h2p_div;
+
+	/* pll enter slow-mode */
+	rk_clrsetreg(&cru->cru_mode_con,
+		     GPLL_MODE_MASK |
+		     CPLL_MODE_MASK,
+		     GPLL_MODE_SLOW << GPLL_MODE_SHIFT |
+		     CPLL_MODE_SLOW << CPLL_MODE_SHIFT);
+
+	/* init pll */
+	rkclk_set_pll(cru, CLK_GENERAL, &gpll_init_cfg, has_bwadj);
+	rkclk_set_pll(cru, CLK_CODEC, &cpll_init_cfg, has_bwadj);
+
+	/* waiting for pll lock */
+	while ((readl(&grf->soc_status0) &
+			(SOCSTS_CPLL_LOCK | SOCSTS_GPLL_LOCK)) !=
+			(SOCSTS_CPLL_LOCK | SOCSTS_GPLL_LOCK))
+		udelay(1);
+
+	/*
+	 * cpu clock pll source selection and
+	 * reparent aclk_cpu_pre from apll to gpll
+	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
+	 */
+	aclk_div = RATE_TO_DIV(GPLL_HZ, CPU_ACLK_HZ);
+	assert((aclk_div + 1) * CPU_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f);
+
+	rk_clrsetreg(&cru->cru_clksel_con[0],
+		     CPU_ACLK_PLL_MASK |
+		     A9_CPU_DIV_MASK,
+		     CPU_ACLK_PLL_SELECT_GPLL << CPU_ACLK_PLL_SHIFT |
+		     aclk_div << A9_CPU_DIV_SHIFT);
+
+	hclk_div = ilog2(CPU_ACLK_HZ / CPU_HCLK_HZ);
+	assert((1 << hclk_div) * CPU_HCLK_HZ == CPU_ACLK_HZ && hclk_div < 0x3);
+	pclk_div = ilog2(CPU_ACLK_HZ / CPU_PCLK_HZ);
+	assert((1 << pclk_div) * CPU_PCLK_HZ == CPU_ACLK_HZ && pclk_div < 0x4);
+	h2p_div = ilog2(CPU_HCLK_HZ / CPU_H2P_HZ);
+	assert((1 << h2p_div) * CPU_H2P_HZ == CPU_HCLK_HZ && pclk_div < 0x3);
+
+	rk_clrsetreg(&cru->cru_clksel_con[1],
+		     AHB2APB_DIV_MASK |
+		     CPU_PCLK_DIV_MASK |
+		     CPU_HCLK_DIV_MASK,
+		     h2p_div << AHB2APB_DIV_SHIFT |
+		     pclk_div << CPU_PCLK_DIV_SHIFT |
+		     hclk_div << CPU_HCLK_DIV_SHIFT);
+
+	/*
+	 * peri clock pll source selection and
+	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
+	 */
+	aclk_div = GPLL_HZ / PERI_ACLK_HZ - 1;
+	assert((aclk_div + 1) * PERI_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f);
+
+	hclk_div = ilog2(PERI_ACLK_HZ / PERI_HCLK_HZ);
+	assert((1 << hclk_div) * PERI_HCLK_HZ ==
+		PERI_ACLK_HZ && (hclk_div < 0x4));
+
+	pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ);
+	assert((1 << pclk_div) * PERI_PCLK_HZ ==
+		PERI_ACLK_HZ && (pclk_div < 0x4));
+
+	rk_clrsetreg(&cru->cru_clksel_con[10],
+		     PERI_PCLK_DIV_MASK |
+		     PERI_HCLK_DIV_MASK |
+		     PERI_ACLK_DIV_MASK,
+		     PERI_SEL_GPLL << PERI_SEL_PLL_SHIFT |
+		     pclk_div << PERI_PCLK_DIV_SHIFT |
+		     hclk_div << PERI_HCLK_DIV_SHIFT |
+		     aclk_div << PERI_ACLK_DIV_SHIFT);
+
+	/* PLL enter normal-mode */
+	rk_clrsetreg(&cru->cru_mode_con,
+		     GPLL_MODE_MASK |
+		     CPLL_MODE_MASK,
+		     GPLL_MODE_NORMAL << GPLL_MODE_SHIFT |
+		     CPLL_MODE_NORMAL << CPLL_MODE_SHIFT);
+
+	rockchip_mmc_set_clk(cru, PERI_HCLK_HZ, HCLK_SDMMC, 16000000);
+}
+#endif
+
+static ulong rk3066_clk_get_rate(struct clk *clk)
+{
+	struct rk3066_clk_priv *priv = dev_get_priv(clk->dev);
+	ulong new_rate, gclk_rate;
+
+	gclk_rate = rkclk_pll_get_rate(priv->cru, CLK_GENERAL);
+	switch (clk->id) {
+	case 1 ... 4:
+		new_rate = rkclk_pll_get_rate(priv->cru, clk->id);
+		break;
+	case HCLK_EMMC:
+	case HCLK_SDMMC:
+	case HCLK_SDIO:
+		new_rate = rockchip_mmc_get_clk(priv->cru, PERI_HCLK_HZ,
+						clk->id);
+		break;
+	case SCLK_SPI0:
+	case SCLK_SPI1:
+		new_rate = rockchip_spi_get_clk(priv->cru, PERI_PCLK_HZ,
+						clk->id);
+		break;
+	case PCLK_I2C0:
+	case PCLK_I2C1:
+	case PCLK_I2C2:
+	case PCLK_I2C3:
+	case PCLK_I2C4:
+		return gclk_rate;
+	default:
+		return -ENOENT;
+	}
+
+	return new_rate;
+}
+
+static ulong rk3066_clk_set_rate(struct clk *clk, ulong rate)
+{
+	struct rk3066_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3066_cru *cru = priv->cru;
+	ulong new_rate;
+
+	switch (clk->id) {
+	case PLL_APLL:
+		new_rate = rkclk_configure_cpu(priv->cru, priv->grf, rate,
+					       priv->has_bwadj);
+		break;
+	case CLK_DDR:
+		new_rate = rkclk_configure_ddr(priv->cru, priv->grf, rate,
+					       priv->has_bwadj);
+		break;
+	case HCLK_EMMC:
+	case HCLK_SDMMC:
+	case HCLK_SDIO:
+		new_rate = rockchip_mmc_set_clk(cru, PERI_HCLK_HZ,
+						clk->id, rate);
+		break;
+	case SCLK_SPI0:
+	case SCLK_SPI1:
+		new_rate = rockchip_spi_set_clk(cru, PERI_PCLK_HZ,
+						clk->id, rate);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return new_rate;
+}
+
+static struct clk_ops rk3066_clk_ops = {
+	.get_rate	= rk3066_clk_get_rate,
+	.set_rate	= rk3066_clk_set_rate,
+};
+
+static int rk3066_clk_ofdata_to_platdata(struct udevice *dev)
+{
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	struct rk3066_clk_priv *priv = dev_get_priv(dev);
+
+	priv->cru = (struct rk3066_cru *)devfdt_get_addr(dev);
+#endif
+
+	return 0;
+}
+
+static int rk3066_clk_probe(struct udevice *dev)
+{
+	struct rk3066_clk_priv *priv = dev_get_priv(dev);
+
+	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	if (IS_ERR(priv->grf))
+		return PTR_ERR(priv->grf);
+
+#ifdef CONFIG_TPL_BUILD
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+	struct rk3066_clk_plat *plat = dev_get_platdata(dev);
+
+	priv->cru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);
+#endif
+
+	rkclk_init(priv->cru, priv->grf, 1);
+#endif
+
+	return 0;
+}
+
+static int rk3066_clk_bind(struct udevice *dev)
+{
+	int ret;
+	struct udevice *sys_child, *sf_child;
+	struct sysreset_reg *priv;
+	struct softreset_reg *sf_priv;
+
+	/* The reset driver does not have a device node, so bind it here */
+	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
+				 &sys_child);
+	if (ret) {
+		debug("Warning: No sysreset driver: ret=%d\n", ret);
+	} else {
+		priv = malloc(sizeof(struct sysreset_reg));
+		priv->glb_srst_fst_value = offsetof(struct rk3066_cru,
+						    cru_glb_srst_fst_value);
+		priv->glb_srst_snd_value = offsetof(struct rk3066_cru,
+						    cru_glb_srst_snd_value);
+		sys_child->priv = priv;
+	}
+
+	ret = device_bind_driver_to_node(dev, "rockchip_reset", "reset",
+					 dev_ofnode(dev), &sf_child);
+	if (ret) {
+		debug("Warning: No rockchip reset driver: ret=%d\n", ret);
+	} else {
+		sf_priv = malloc(sizeof(struct softreset_reg));
+		sf_priv->sf_reset_offset = offsetof(struct rk3066_cru,
+						    cru_softrst_con[0]);
+		sf_priv->sf_reset_num = 9;
+		sf_child->priv = sf_priv;
+	}
+
+	return 0;
+}
+
+static const struct udevice_id rk3066_clk_ids[] = {
+	{ .compatible = "rockchip,rk3066a-cru" },
+	{ }
+};
+
+U_BOOT_DRIVER(rockchip_rk3066a_cru) = {
+	.name			= "rockchip_rk3066a_cru",
+	.id			= UCLASS_CLK,
+	.of_match		= rk3066_clk_ids,
+	.priv_auto_alloc_size	= sizeof(struct rk3066_clk_priv),
+	.platdata_auto_alloc_size = sizeof(struct rk3066_clk_plat),
+	.ops			= &rk3066_clk_ops,
+	.bind			= rk3066_clk_bind,
+	.ofdata_to_platdata	= rk3066_clk_ofdata_to_platdata,
+	.probe			= rk3066_clk_probe,
+};

commit 37012861905e16177ee6ce2621aadcf534e62def
Author: Paweł Jarosz <paweljarosz3691@gmail.com>
Date:   Thu Aug 17 15:12:16 2017 +0200

    rockchip: rk3066: add rk3066 pinctrl driver
    
    Add driver supporting pin multiplexing on rk3066 platform.
    
    Change-Id: Ibb8edea574939e646f1e3a09165d3ecfa1a283b6
    Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/periph.h b/arch/arm/include/asm/arch-rockchip/periph.h
index 9f4bc2e107..6c8c77dddb 100644
--- a/arch/arm/include/asm/arch-rockchip/periph.h
+++ b/arch/arm/include/asm/arch-rockchip/periph.h
@@ -43,6 +43,7 @@ enum periph_id {
 	PERIPH_ID_HDMI,
 	PERIPH_ID_GMAC,
 	PERIPH_ID_SFC,
+	PERIPH_ID_NAND,
 
 	PERIPH_ID_COUNT,
 
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index 35a7c62963..4d0e958c41 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -178,6 +178,15 @@ config PINCTRL_ROCKCHIP_RK3128
 	  the GPIO definitions and pin control functions for each available
 	  multiplex function.
 
+config PINCTRL_ROCKCHIP_RK3066
+        bool "Rockchip rk3066 pin control driver"
+        depends on DM
+        help
+          Support pin multiplexing control on Rockchip rk3066 SoCs. The driver is
+          controlled by a device tree node which contains both the GPIO
+          definitions and pin control functions for each available multiplex
+          function.
+
 config PINCTRL_ROCKCHIP_RK3188
 	bool "Rockchip rk3188 pin control driver"
 	depends on DM
diff --git a/drivers/pinctrl/rockchip/Makefile b/drivers/pinctrl/rockchip/Makefile
index f09c6e17b4..f846229ab2 100644
--- a/drivers/pinctrl/rockchip/Makefile
+++ b/drivers/pinctrl/rockchip/Makefile
@@ -5,6 +5,7 @@
 #
 
 obj-$(CONFIG_PINCTRL_ROCKCHIP_RK3036) += pinctrl_rk3036.o
+obj-$(CONFIG_PINCTRL_ROCKCHIP_RK3066) += pinctrl_rk3066.o
 obj-$(CONFIG_PINCTRL_ROCKCHIP_RK3128) += pinctrl_rk3128.o
 obj-$(CONFIG_PINCTRL_ROCKCHIP_RK3188) += pinctrl_rk3188.o
 obj-$(CONFIG_PINCTRL_ROCKCHIP_RK322X) += pinctrl_rk322x.o
diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3066.c b/drivers/pinctrl/rockchip/pinctrl_rk3066.c
new file mode 100644
index 0000000000..79e0a54d42
--- /dev/null
+++ b/drivers/pinctrl/rockchip/pinctrl_rk3066.c
@@ -0,0 +1,340 @@
+/*
+ * Pinctrl driver for Rockchip 3066 SoCs
+ * (C) Copyright 2017 Paweł Jarosz <paweljarosz3691@gmail.com>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/device.h>
+#include <errno.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/grf_rk3066.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/periph.h>
+#include <dm/pinctrl.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct rk3066_pinctrl_priv {
+	struct rk3066_grf *grf;
+};
+
+static void pinctrl_rk3066_pwm_config(struct rk3066_grf *grf, int pwm_id)
+{
+	switch (pwm_id) {
+	case PERIPH_ID_PWM0:
+		rk_clrsetreg(&grf->gpio0a_iomux, GPIO0A3_MASK,
+			     GPIO0A3_PWM0 << GPIO0A3_SHIFT);
+		break;
+	case PERIPH_ID_PWM1:
+		rk_clrsetreg(&grf->gpio0a_iomux, GPIO0A4_MASK,
+			     GPIO0A4_PWM1 << GPIO0A4_SHIFT);
+		break;
+	case PERIPH_ID_PWM2:
+		rk_clrsetreg(&grf->gpio0d_iomux, GPIO0D6_MASK,
+			     GPIO0D6_PWM2 << GPIO0D6_SHIFT);
+		break;
+	case PERIPH_ID_PWM3:
+		rk_clrsetreg(&grf->gpio0d_iomux, GPIO0D7_MASK,
+			     GPIO0D7_PWM3 << GPIO0D7_SHIFT);
+		break;
+	default:
+		debug("pwm id = %d iomux error!\n", pwm_id);
+		break;
+	}
+}
+
+static void pinctrl_rk3066_i2c_config(struct rk3066_grf *grf, int i2c_id)
+{
+	switch (i2c_id) {
+	case PERIPH_ID_I2C0:
+		rk_clrsetreg(&grf->gpio2d_iomux,
+			     GPIO2D4_MASK | GPIO2D5_MASK,
+			     GPIO2D4_I2C0_SDA << GPIO2D4_SHIFT |
+			     GPIO2D5_I2C0_SCL << GPIO2D5_SHIFT);
+		rk_clrsetreg(&grf->soc_con1, 1 << RKI2C0_SEL_SHIFT,
+					     1 << RKI2C0_SEL_SHIFT);
+		break;
+	case PERIPH_ID_I2C1:
+		rk_clrsetreg(&grf->gpio2d_iomux,
+			     GPIO2D6_MASK | GPIO2D7_MASK,
+			     GPIO2D6_I2C1_SDA << GPIO2D6_SHIFT |
+			     GPIO2D7_I2C1_SCL << GPIO2D7_SHIFT);
+		rk_clrsetreg(&grf->soc_con1, 1 << RKI2C1_SEL_SHIFT,
+					     1 << RKI2C1_SEL_SHIFT);
+		break;
+	case PERIPH_ID_I2C2:
+		rk_clrsetreg(&grf->gpio3a_iomux,
+			     GPIO3A1_MASK | GPIO3A0_MASK,
+			     GPIO3A1_I2C2_SCL << GPIO3A1_SHIFT |
+			     GPIO3A0_I2C2_SDA << GPIO3A0_SHIFT);
+		rk_clrsetreg(&grf->soc_con1, 1 << RKI2C2_SEL_SHIFT,
+					     1 << RKI2C2_SEL_SHIFT);
+	case PERIPH_ID_I2C3:
+		rk_clrsetreg(&grf->gpio3a_iomux,
+			     GPIO3A3_MASK | GPIO3A2_MASK,
+			     GPIO3A3_I2C3_SCL << GPIO3A3_SHIFT |
+			     GPIO3A2_I2C3_SDA << GPIO3A2_SHIFT);
+		rk_clrsetreg(&grf->soc_con1, 1 << RKI2C3_SEL_SHIFT,
+					     1 << RKI2C3_SEL_SHIFT);
+	case PERIPH_ID_I2C4:
+		rk_clrsetreg(&grf->gpio3a_iomux,
+			     GPIO3A5_MASK | GPIO3A4_MASK,
+			     GPIO3A5_I2C4_SCL << GPIO3A5_SHIFT |
+			     GPIO3A4_I2C4_SDA << GPIO3A4_SHIFT);
+		rk_clrsetreg(&grf->soc_con1, 1 << RKI2C4_SEL_SHIFT,
+					     1 << RKI2C4_SEL_SHIFT);
+		break;
+	}
+}
+
+static void pinctrl_rk3066_spi_config(struct rk3066_grf *grf, int spi_id, int cs)
+{
+	switch (spi_id) {
+	case PERIPH_ID_SPI0:
+		rk_clrsetreg(&grf->gpio1a_iomux,
+			     GPIO1A7_MASK | GPIO1A6_MASK | GPIO1A5_MASK,
+			     GPIO1A7_SPI0_TXD << GPIO1A7_SHIFT |
+			     GPIO1A6_SPI0_RXD << GPIO1A6_SHIFT |
+			     GPIO1A5_SPI0_CLK << GPIO1A5_SHIFT);
+		if(cs == 0)
+			rk_clrsetreg(&grf->gpio1a_iomux,
+				     GPIO1A4_MASK,
+				     GPIO1A4_SPI0_CSN0 << GPIO1A4_SHIFT);
+		else
+			rk_clrsetreg(&grf->gpio4b_iomux,
+				     GPIO4B7_MASK,
+				     GPIO4B7_SPI0_CSN1 << GPIO4B7_SHIFT);
+		break;
+	case PERIPH_ID_SPI1:
+		rk_clrsetreg(&grf->gpio2c_iomux,
+			     GPIO2C5_MASK | GPIO2C6_MASK | GPIO2C3_MASK,
+			     GPIO2C5_SPI1_TXD << GPIO2C5_SHIFT |
+			     GPIO2C6_SPI1_RXD << GPIO2C6_SHIFT |
+			     GPIO2C3_SPI1_CLK << GPIO2C3_SHIFT);
+		if(cs == 0)
+			rk_clrsetreg(&grf->gpio2c_iomux,
+				     GPIO2C4_MASK,
+				     GPIO2C4_SPI1_CSN0 << GPIO2C4_SHIFT);
+		else
+			rk_clrsetreg(&grf->gpio2c_iomux,
+				     GPIO2C7_MASK,
+				     GPIO2C7_SPI1_CSN1 << GPIO2C7_SHIFT);
+		break;
+	}
+}
+
+static void pinctrl_rk3066_uart_config(struct rk3066_grf *grf, int uart_id)
+{
+	switch (uart_id) {
+	case PERIPH_ID_UART0:
+		rk_clrsetreg(&grf->gpio1a_iomux,
+			     GPIO1A2_MASK | GPIO1A3_MASK |
+			     GPIO1A0_MASK | GPIO1A1_MASK,
+			     GPIO1A2_UART0_CTS_N << GPIO1A2_SHIFT |
+			     GPIO1A3_UART0_RTS_N << GPIO1A3_SHIFT |
+			     GPIO1A0_UART0_SIN << GPIO1A0_SHIFT |
+			     GPIO1A1_UART0_SOUT << GPIO1A1_SHIFT);
+		break;
+	case PERIPH_ID_UART1:
+		rk_clrsetreg(&grf->gpio1a_iomux,
+			     GPIO1A7_MASK | GPIO1A6_MASK |
+			     GPIO1A5_MASK | GPIO1A4_MASK,
+			     GPIO1A7_UART1_RTS_N << GPIO1A7_SHIFT |
+			     GPIO1A6_UART1_CTS_N << GPIO1A6_SHIFT |
+			     GPIO1A5_UART1_SOUT << GPIO1A5_SHIFT |
+			     GPIO1A4_UART1_SIN << GPIO1A4_SHIFT);
+		break;
+	case PERIPH_ID_UART2:
+		rk_clrsetreg(&grf->gpio1b_iomux,
+			     GPIO1B1_MASK | GPIO1B0_MASK,
+			     GPIO1B1_UART2_SOUT << GPIO1B1_SHIFT |
+			     GPIO1B0_UART2_SIN << GPIO1B0_SHIFT);
+		break;
+	case PERIPH_ID_UART3:
+		rk_clrsetreg(&grf->gpio3d_iomux,
+			     GPIO3D6_MASK | GPIO3D5_MASK |
+			     GPIO3D4_MASK | GPIO3D3_MASK,
+			     GPIO3D6_UART3_RTS_N << GPIO3D6_SHIFT |
+			     GPIO3D5_UART3_CTS_N << GPIO3D5_SHIFT |
+			     GPIO3D4_UART3_SOUT << GPIO3D4_SHIFT |
+			     GPIO3D3_UART3_SIN << GPIO3D3_SHIFT);
+		break;
+	}
+}
+
+static void pinctrl_rk3066_sdmmc_config(struct rk3066_grf *grf, int mmc_id)
+{
+	switch (mmc_id) {
+	case PERIPH_ID_EMMC:
+		rk_clrsetreg(&grf->soc_con0,
+			     EMMC_FLASH_SEL_MASK,
+			     1 << EMMC_FLASH_SEL_SHIFT);
+		rk_clrsetreg(&grf->gpio3d_iomux,
+			     GPIO3D7_MASK,
+			     GPIO3D7_EMMC_CLKOUT << GPIO3D7_SHIFT);
+		rk_clrsetreg(&grf->gpio4b_iomux,
+			     GPIO4B2_MASK | GPIO4B1_MASK,
+			     GPIO4B2_EMMC_RSTN_OUT << GPIO4B2_SHIFT |
+			     GPIO4B1_EMMC_CMD << GPIO4B1_SHIFT);
+		break;
+	case PERIPH_ID_SDCARD:
+		rk_clrsetreg(&grf->gpio3b_iomux, 0xffff,
+			     GPIO3B7_SDMMC0_WRITE_PRT << GPIO3B7_SHIFT |
+			     GPIO3B6_SDMMC0_DETECT_N << GPIO3B6_SHIFT |
+			     GPIO3B5_SDMMC0_DATA3 << GPIO3B5_SHIFT |
+			     GPIO3B4_SDMMC0_DATA2 << GPIO3B4_SHIFT |
+			     GPIO3B3_SDMMC0_DATA1 << GPIO3B3_SHIFT |
+			     GPIO3B2_SDMMC0_DATA0 << GPIO3B2_SHIFT |
+			     GPIO3B1_SDMMC0_CMD << GPIO3B1_SHIFT |
+			     GPIO3B0_SDMMC0_CLKOUT << GPIO3B0_SHIFT);
+		break;
+	}
+}
+
+static void pinctrl_rk3066_nand_config(struct rk3066_grf *grf)
+{
+	rk_clrsetreg(&grf->soc_con0,
+		     EMMC_FLASH_SEL_MASK,
+		     0 << EMMC_FLASH_SEL_SHIFT);
+	rk_clrsetreg(&grf->gpio3d_iomux,
+		     GPIO3D7_MASK,
+		     GPIO3D7_FLASH_DQS << GPIO3D7_SHIFT);
+}
+
+static int rk3066_pinctrl_request(struct udevice *dev, int func, int flags)
+{
+	struct rk3066_pinctrl_priv *priv = dev_get_priv(dev);
+
+	debug("%s: func=%x, flags=%x\n", __func__, func, flags);
+	switch (func) {
+	case PERIPH_ID_PWM0:
+	case PERIPH_ID_PWM1:
+	case PERIPH_ID_PWM2:
+	case PERIPH_ID_PWM3:
+		pinctrl_rk3066_pwm_config(priv->grf, func);
+		break;
+	case PERIPH_ID_I2C0:
+	case PERIPH_ID_I2C1:
+	case PERIPH_ID_I2C2:
+	case PERIPH_ID_I2C3:
+	case PERIPH_ID_I2C4:
+		pinctrl_rk3066_i2c_config(priv->grf, func);
+		break;
+	case PERIPH_ID_SPI0:
+	case PERIPH_ID_SPI1:
+		pinctrl_rk3066_spi_config(priv->grf, func, flags);
+		break;
+	case PERIPH_ID_UART0:
+	case PERIPH_ID_UART1:
+	case PERIPH_ID_UART2:
+	case PERIPH_ID_UART3:
+		pinctrl_rk3066_uart_config(priv->grf, func);
+		break;
+	case PERIPH_ID_EMMC:
+	case PERIPH_ID_SDCARD:
+		pinctrl_rk3066_sdmmc_config(priv->grf, func);
+		break;
+	case PERIPH_ID_NAND:
+		pinctrl_rk3066_nand_config(priv->grf);
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int rk3066_pinctrl_get_periph_id(struct udevice *dev,
+					struct udevice *periph)
+{
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	u32 cell[3];
+	int ret;
+
+	ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(periph),
+				   "interrupts", cell, ARRAY_SIZE(cell));
+	if (ret < 0)
+		return -EINVAL;
+
+	switch (cell[1]) {
+	case 23:
+		return PERIPH_ID_SDCARD;
+	case 25:
+		return PERIPH_ID_EMMC;
+	case 27:
+		return PERIPH_ID_NAND;
+	case 34:
+		return PERIPH_ID_UART0;
+	case 35:
+		return PERIPH_ID_UART1;
+	case 36:
+		return PERIPH_ID_UART2;
+	case 37:
+		return PERIPH_ID_UART3;
+	case 38:
+		return PERIPH_ID_SPI0;
+	case 39:
+		return PERIPH_ID_SPI1;
+	case 40:
+		return PERIPH_ID_I2C0;
+	case 41:
+		return PERIPH_ID_I2C1;
+	case 42:
+		return PERIPH_ID_I2C2;
+	case 43:
+		return PERIPH_ID_I2C3;
+	case 30:
+		return PERIPH_ID_PWM0;
+	}
+#endif
+	return -ENOENT;
+}
+
+static int rk3066_pinctrl_set_state_simple(struct udevice *dev,
+					   struct udevice *periph)
+{
+	int func;
+
+	func = rk3066_pinctrl_get_periph_id(dev, periph);
+	if (func < 0)
+		return func;
+	return rk3066_pinctrl_request(dev, func, 0);
+}
+
+static struct pinctrl_ops rk3066_pinctrl_ops = {
+	.set_state_simple	= rk3066_pinctrl_set_state_simple,
+	.request	= rk3066_pinctrl_request,
+	.get_periph_id	= rk3066_pinctrl_get_periph_id,
+};
+
+static int rk3066_pinctrl_probe(struct udevice *dev)
+{
+	struct rk3066_pinctrl_priv *priv = dev_get_priv(dev);
+
+	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	if (IS_ERR(priv->grf))
+		debug("%s: grf=%p\n", __func__, priv->grf);
+	return 0;
+}
+
+static const struct udevice_id rk3066_pinctrl_ids[] = {
+	{ .compatible = "rockchip,rk3066a-pinctrl" },
+	{ }
+};
+
+U_BOOT_DRIVER(rockchip_rk3066a_pinctrl) = {
+	.name		= "rockchip_rk3066a_pinctrl",
+	.id		= UCLASS_PINCTRL,
+	.of_match	= rk3066_pinctrl_ids,
+	.priv_auto_alloc_size = sizeof(struct rk3066_pinctrl_priv),
+	.ops		= &rk3066_pinctrl_ops,
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	.bind           = dm_scan_fdt_dev,
+#endif
+	.probe		= rk3066_pinctrl_probe,
+};

commit fa3921912286c331398515972e59384085d581a8
Author: Paweł Jarosz <paweljarosz3691@gmail.com>
Date:   Thu Aug 17 15:11:54 2017 +0200

    rockchip: rk3066: add grf header file
    
    grf is needed by various drivers for rk3066 soc.
    
    Change-Id: Id605feb6491eab73c2db9a0acba6e096e519e4ba
    Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3066.h b/arch/arm/include/asm/arch-rockchip/grf_rk3066.h
new file mode 100644
index 0000000000..be40884985
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3066.h
@@ -0,0 +1,621 @@
+/*
+ * Copyright (c) 2017 Paweł Jarosz <paweljarosz3691@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#ifndef _ASM_ARCH_GRF_RK3066_H
+#define _ASM_ARCH_GRF_RK3066_H
+
+struct rk3066_grf_gpio_lh {
+	u32 l;
+	u32 h;
+};
+
+struct rk3066_grf {
+	struct rk3066_grf_gpio_lh gpio_dir[7];
+	struct rk3066_grf_gpio_lh gpio_do[7];
+	struct rk3066_grf_gpio_lh gpio_en[7];
+
+	u32 gpio0a_iomux;
+	u32 gpio0b_iomux;
+	u32 gpio0c_iomux;
+	u32 gpio0d_iomux;
+
+	u32 gpio1a_iomux;
+	u32 gpio1b_iomux;
+	u32 gpio1c_iomux;
+	u32 gpio1d_iomux;
+
+	u32 gpio2a_iomux;
+	u32 gpio2b_iomux;
+	u32 gpio2c_iomux;
+	u32 gpio2d_iomux;
+
+	u32 gpio3a_iomux;
+	u32 gpio3b_iomux;
+	u32 gpio3c_iomux;
+	u32 gpio3d_iomux;
+
+	u32 gpio4a_iomux;
+	u32 gpio4b_iomux;
+	u32 gpio4c_iomux;
+	u32 gpio4d_iomux;
+
+	u32 reserved0[5];
+
+	u32 gpio6b_iomux;
+
+	u32 reserved1[2];
+
+	struct rk3066_grf_gpio_lh gpio_pull[7];
+
+	u32 soc_con0;
+	u32 soc_con1;
+	u32 soc_con2;
+
+	u32 soc_status0;
+
+	u32 dmac1_con[3];
+	u32 dmac2_con[4];
+
+	u32 uoc0_con[3];
+	u32 uoc1_con[4];
+	u32 ddrc_con;
+	u32 ddrc_stat;
+
+	u32 reserved2[10];
+
+	u32 os_reg[4];
+};
+check_member(rk3066_grf, os_reg[3], 0x01d4);
+
+/* GRF_GPIO0A_IOMUX */
+enum {
+	GPIO0A6_SHIFT		= 12,
+	GPIO0A6_MASK		= 1 << GPIO0A6_SHIFT,
+	GPIO0A6_GPIO		= 0,
+	GPIO0A6_HOST_DRV_VBUS,
+
+	GPIO0A5_SHIFT		= 10,
+	GPIO0A5_MASK		= 1 << GPIO0A5_SHIFT,
+	GPIO0A5_GPIO		= 0,
+	GPIO0A5_OTG_DRV_VBUS,
+
+	GPIO0A4_SHIFT		= 8,
+	GPIO0A4_MASK		= 1 << GPIO0A4_SHIFT,
+	GPIO0A4_GPIO		= 0,
+	GPIO0A4_PWM1,
+
+	GPIO0A3_SHIFT		= 6,
+	GPIO0A3_MASK		= 1 << GPIO0A3_SHIFT,
+	GPIO0A3_GPIO		= 0,
+	GPIO0A3_PWM0
+};
+
+/* GRF_GPIO0D_IOMUX */
+enum {
+	GPIO0D7_SHIFT		= 14,
+	GPIO0D7_MASK		= 1 << GPIO0D7_SHIFT,
+	GPIO0D7_GPIO		= 0,
+	GPIO0D7_PWM3,
+
+	GPIO0D6_SHIFT		= 12,
+	GPIO0D6_MASK		= 1 << GPIO0D6_SHIFT,
+	GPIO0D6_GPIO		= 0,
+	GPIO0D6_PWM2
+};
+
+/* GRF_GPIO1A_IOMUX */
+enum {
+	GPIO1A7_SHIFT		= 14,
+	GPIO1A7_MASK		= 3 << GPIO1A7_SHIFT,
+	GPIO1A7_GPIO		= 0,
+	GPIO1A7_UART1_RTS_N,
+	GPIO1A7_SPI0_TXD,
+
+	GPIO1A6_SHIFT		= 12,
+	GPIO1A6_MASK		= 3 << GPIO1A6_SHIFT,
+	GPIO1A6_GPIO		= 0,
+	GPIO1A6_UART1_CTS_N,
+	GPIO1A6_SPI0_RXD,
+
+	GPIO1A5_SHIFT		= 10,
+	GPIO1A5_MASK		= 3 << GPIO1A5_SHIFT,
+	GPIO1A5_GPIO		= 0,
+	GPIO1A5_UART1_SOUT,
+	GPIO1A5_SPI0_CLK,
+
+	GPIO1A4_SHIFT		= 8,
+	GPIO1A4_MASK		= 3 << GPIO1A4_SHIFT,
+	GPIO1A4_GPIO		= 0,
+	GPIO1A4_UART1_SIN,
+	GPIO1A4_SPI0_CSN0,
+
+	GPIO1A3_SHIFT		= 6,
+	GPIO1A3_MASK		= 1 << GPIO1A3_SHIFT,
+	GPIO1A3_GPIO		= 0,
+	GPIO1A3_UART0_RTS_N,
+
+	GPIO1A2_SHIFT		= 4,
+	GPIO1A2_MASK		= 1 << GPIO1A2_SHIFT,
+	GPIO1A2_GPIO		= 0,
+	GPIO1A2_UART0_CTS_N,
+
+	GPIO1A1_SHIFT		= 2,
+	GPIO1A1_MASK		= 1 << GPIO1A1_SHIFT,
+	GPIO1A1_GPIO		= 0,
+	GPIO1A1_UART0_SOUT,
+
+	GPIO1A0_SHIFT		= 0,
+	GPIO1A0_MASK		= 1 << GPIO1A0_SHIFT,
+	GPIO1A0_GPIO		= 0,
+	GPIO1A0_UART0_SIN
+};
+
+/* GRF_GPIO1B_IOMUX */
+enum {
+	GPIO1B1_SHIFT		= 2,
+	GPIO1B1_MASK		= 1 << GPIO1B1_SHIFT,
+	GPIO1B1_GPIO		= 0,
+	GPIO1B1_UART2_SOUT,
+
+	GPIO1B0_SHIFT		= 0,
+	GPIO1B0_MASK		= 1 << GPIO1B0_SHIFT,
+	GPIO1B0_GPIO		= 0,
+	GPIO1B0_UART2_SIN
+};
+
+/* GRF_GPIO2C_IOMUX */
+enum {
+	GPIO2C7_SHIFT		= 14,
+	GPIO2C7_MASK		= 3 << GPIO2C7_SHIFT,
+	GPIO2C7_GPIO		= 0,
+	GPIO2C7_LCDC1_DATA23,
+	GPIO2C7_SPI1_CSN1,
+	GPIO2C7_HSADC_DATA4,
+
+	GPIO2C6_SHIFT		= 12,
+	GPIO2C6_MASK		= 3 << GPIO2C6_SHIFT,
+	GPIO2C6_GPIO		= 0,
+	GPIO2C6_LCDC1_DATA22,
+	GPIO2C6_SPI1_RXD,
+	GPIO2C6_HSADC_DATA3,
+
+	GPIO2C5_SHIFT		= 10,
+	GPIO2C5_MASK		= 3 << GPIO2C5_SHIFT,
+	GPIO2C5_GPIO		= 0,
+	GPIO2C5_LCDC1_DATA21,
+	GPIO2C5_SPI1_TXD,
+	GPIO2C5_HSADC_DATA2,
+
+	GPIO2C4_SHIFT		= 8,
+	GPIO2C4_MASK		= 3 << GPIO2C4_SHIFT,
+	GPIO2C4_GPIO		= 0,
+	GPIO2C4_LCDC1_DATA20,
+	GPIO2C4_SPI1_CSN0,
+	GPIO2C4_HSADC_DATA1,
+
+	GPIO2C3_SHIFT		= 6,
+	GPIO2C3_MASK		= 3 << GPIO2C3_SHIFT,
+	GPIO2C3_GPIO		= 0,
+	GPIO2C3_LCDC1_DATA19,
+	GPIO2C3_SPI1_CLK,
+	GPIO2C3_HSADC_DATA0
+};
+
+/* GRF_GPIO2D_IOMUX */
+enum {
+	GPIO2D7_SHIFT		= 14,
+	GPIO2D7_MASK		= 1 << GPIO2D7_SHIFT,
+	GPIO2D7_GPIO		= 0,
+	GPIO2D7_I2C1_SCL,
+
+	GPIO2D6_SHIFT		= 12,
+	GPIO2D6_MASK		= 1 << GPIO2D6_SHIFT,
+	GPIO2D6_GPIO		= 0,
+	GPIO2D6_I2C1_SDA,
+
+	GPIO2D5_SHIFT		= 10,
+	GPIO2D5_MASK		= 1 << GPIO2D5_SHIFT,
+	GPIO2D5_GPIO		= 0,
+	GPIO2D5_I2C0_SCL,
+
+	GPIO2D4_SHIFT		= 8,
+	GPIO2D4_MASK		= 1 << GPIO2D4_SHIFT,
+	GPIO2D4_GPIO		= 0,
+	GPIO2D4_I2C0_SDA
+
+};
+
+/* GRF_GPIO3A_IOMUX */
+enum {
+	GPIO3A7_SHIFT		= 14,
+	GPIO3A7_MASK		= 1 << GPIO3A7_SHIFT,
+	GPIO3A7_GPIO		= 0,
+	GPIO3A7_SDMMC0_WRITE_PRT,
+
+	GPIO3A6_SHIFT		= 12,
+	GPIO3A6_MASK		= 1 << GPIO3A6_SHIFT,
+	GPIO3A6_GPIO		= 0,
+	GPIO3A6_SDMMC0_RSTN_OUT,
+
+	GPIO3A5_SHIFT		= 10,
+	GPIO3A5_MASK		= 1 << GPIO3A5_SHIFT,
+	GPIO3A5_GPIO		= 0,
+	GPIO3A5_I2C4_SCL,
+
+	GPIO3A4_SHIFT		= 8,
+	GPIO3A4_MASK		= 1 << GPIO3A4_SHIFT,
+	GPIO3A4_GPIO		= 0,
+	GPIO3A4_I2C4_SDA,
+
+	GPIO3A3_SHIFT		= 6,
+	GPIO3A3_MASK		= 1 << GPIO3A3_SHIFT,
+	GPIO3A3_GPIO		= 0,
+	GPIO3A3_I2C3_SCL,
+
+	GPIO3A2_SHIFT		= 4,
+	GPIO3A2_MASK		= 1 << GPIO3A2_SHIFT,
+	GPIO3A2_GPIO		= 0,
+	GPIO3A2_I2C3_SDA,
+
+	GPIO3A1_SHIFT		= 2,
+	GPIO3A1_MASK		= 1 << GPIO3A1_SHIFT,
+	GPIO3A1_GPIO		= 0,
+	GPIO3A1_I2C2_SCL,
+
+	GPIO3A0_SHIFT		= 0,
+	GPIO3A0_MASK		= 1 << GPIO3A0_SHIFT,
+	GPIO3A0_GPIO		= 0,
+	GPIO3A0_I2C2_SDA,
+};
+
+/* GRF_GPIO3B_IOMUX */
+enum {
+	GPIO3B7_SHIFT		= 14,
+	GPIO3B7_MASK		= 1 << GPIO3B7_SHIFT,
+	GPIO3B7_GPIO		= 0,
+	GPIO3B7_SDMMC0_WRITE_PRT,
+
+	GPIO3B6_SHIFT		= 12,
+	GPIO3B6_MASK		= 1 << GPIO3B6_SHIFT,
+	GPIO3B6_GPIO		= 0,
+	GPIO3B6_SDMMC0_DETECT_N,
+
+	GPIO3B5_SHIFT		= 10,
+	GPIO3B5_MASK		= 1 << GPIO3B5_SHIFT,
+	GPIO3B5_GPIO		= 0,
+	GPIO3B5_SDMMC0_DATA3,
+
+	GPIO3B4_SHIFT		= 8,
+	GPIO3B4_MASK		= 1 << GPIO3B4_SHIFT,
+	GPIO3B4_GPIO		= 0,
+	GPIO3B4_SDMMC0_DATA2,
+
+	GPIO3B3_SHIFT		= 6,
+	GPIO3B3_MASK		= 1 << GPIO3B3_SHIFT,
+	GPIO3B3_GPIO		= 0,
+	GPIO3B3_SDMMC0_DATA1,
+
+	GPIO3B2_SHIFT		= 4,
+	GPIO3B2_MASK		= 1 << GPIO3B2_SHIFT,
+	GPIO3B2_GPIO		= 0,
+	GPIO3B2_SDMMC0_DATA0,
+
+	GPIO3B1_SHIFT		= 2,
+	GPIO3B1_MASK		= 1 << GPIO3B1_SHIFT,
+	GPIO3B1_GPIO		= 0,
+	GPIO3B1_SDMMC0_CMD,
+
+	GPIO3B0_SHIFT		= 0,
+	GPIO3B0_MASK		= 1 << GPIO3B0_SHIFT,
+	GPIO3B0_GPIO		= 0,
+	GPIO3B0_SDMMC0_CLKOUT
+
+};
+
+/* GRF_GPIO3C_IOMUX */
+enum {
+	GPIO3C7_SHIFT		= 14,
+	GPIO3C7_MASK		= 1 << GPIO3C7_SHIFT,
+	GPIO3C7_GPIO		= 0,
+	GPIO3C7_SDMMC1_WRITE_PRT,
+
+	GPIO3C6_SHIFT		= 12,
+	GPIO3C6_MASK		= 1 << GPIO3C6_SHIFT,
+	GPIO3C6_GPIO		= 0,
+	GPIO3C6_SDMMC1_DETECT_N,
+
+	GPIO3C5_SHIFT		= 10,
+	GPIO3C5_MASK		= 1 << GPIO3C5_SHIFT,
+	GPIO3C5_GPIO		= 0,
+	GPIO3C5_SDMMC1_CLKOUT,
+
+	GPIO3C4_SHIFT		= 8,
+	GPIO3C4_MASK		= 1 << GPIO3C4_SHIFT,
+	GPIO3C4_GPIO		= 0,
+	GPIO3C4_SDMMC1_DATA3,
+
+	GPIO3C3_SHIFT		= 6,
+	GPIO3C3_MASK		= 1 << GPIO3C3_SHIFT,
+	GPIO3C3_GPIO		= 0,
+	GPIO3C3_SDMMC1_DATA2,
+
+	GPIO3C2_SHIFT		= 4,
+	GPIO3C2_MASK		= 1 << GPIO3C2_SHIFT,
+	GPIO3C2_GPIO		= 0,
+	GPIO3C2_SDMMC1_DATA1,
+
+	GPIO3C1_SHIFT		= 2,
+	GPIO3C1_MASK		= 1 << GPIO3C1_SHIFT,
+	GPIO3C1_GPIO		= 0,
+	GPIO3C1_SDMMC1_DATA0,
+
+	GPIO3C0_SHIFT		= 0,
+	GPIO3C0_MASK		= 1 << GPIO3C0_SHIFT,
+	GPIO3C0_GPIO		= 0,
+	GPIO3C0_SMMC1_CMD
+};
+
+/* GRF_GPIO3D_IOMUX */
+enum {
+	GPIO3D7_SHIFT		= 14,
+	GPIO3D7_MASK		= 3 << GPIO3D7_SHIFT,
+	GPIO3D7_GPIO		= 0,
+	GPIO3D7_FLASH_DQS,
+	GPIO3D7_EMMC_CLKOUT,
+
+	GPIO3D6_SHIFT		= 12,
+	GPIO3D6_MASK		= 1 << GPIO3D6_SHIFT,
+	GPIO3D6_GPIO		= 0,
+	GPIO3D6_UART3_RTS_N,
+
+	GPIO3D5_SHIFT		= 10,
+	GPIO3D5_MASK		= 1 << GPIO3D5_SHIFT,
+	GPIO3D5_GPIO		= 0,
+	GPIO3D5_UART3_CTS_N,
+
+	GPIO3D4_SHIFT		= 8,
+	GPIO3D4_MASK		= 1 << GPIO3D4_SHIFT,
+	GPIO3D4_GPIO		= 0,
+	GPIO3D4_UART3_SOUT,
+
+	GPIO3D3_SHIFT		= 6,
+	GPIO3D3_MASK		= 1 << GPIO3D3_SHIFT,
+	GPIO3D3_GPIO		= 0,
+	GPIO3D3_UART3_SIN,
+
+	GPIO3D2_SHIFT		= 4,
+	GPIO3D2_MASK		= 1 << GPIO3D2_SHIFT,
+	GPIO3D2_GPIO		= 0,
+	GPIO3D2_SDMMC1_INT_N,
+
+	GPIO3D1_SHIFT		= 2,
+	GPIO3D1_MASK		= 1 << GPIO3D1_SHIFT,
+	GPIO3D1_GPIO		= 0,
+	GPIO3D1_SDMMC1_BACKEND_PWR,
+
+	GPIO3D0_SHIFT		= 0,
+	GPIO3D0_MASK		= 1 << GPIO3D0_SHIFT,
+	GPIO3D0_GPIO		= 0,
+	GPIO3D0_SDMMC1_PWR_EN
+
+};
+
+/* GRF_GPIO4A_IOMUX */
+enum {
+	GPIO4A7_SHIFT		= 14,
+	GPIO4A7_MASK		= 1 << GPIO4A7_SHIFT,
+	GPIO4A7_GPIO		= 0,
+	GPIO4A7_FLASH_DATA15,
+
+	GPIO4A6_SHIFT		= 12,
+	GPIO4A6_MASK		= 1 << GPIO4A6_SHIFT,
+	GPIO4A6_GPIO		= 0,
+	GPIO4A6_FLASH_DATA14,
+
+	GPIO4A5_SHIFT		= 10,
+	GPIO4A5_MASK		= 1 << GPIO4A5_SHIFT,
+	GPIO4A5_GPIO		= 0,
+	GPIO4A5_FLASH_DATA13,
+
+	GPIO4A4_SHIFT		= 8,
+	GPIO4A4_MASK		= 1 << GPIO4A4_SHIFT,
+	GPIO4A4_GPIO		= 0,
+	GPIO4A4_FLASH_DATA12,
+
+	GPIO4A3_SHIFT		= 6,
+	GPIO4A3_MASK		= 1 << GPIO4A3_SHIFT,
+	GPIO4A3_GPIO		= 0,
+	GPIO4A3_FLASH_DATA11,
+
+	GPIO4A2_SHIFT		= 4,
+	GPIO4A2_MASK		= 1 << GPIO4A2_SHIFT,
+	GPIO4A2_GPIO		= 0,
+	GPIO4A2_FLASH_DATA10,
+
+	GPIO4A1_SHIFT		= 2,
+	GPIO4A1_MASK		= 1 << GPIO4A1_SHIFT,
+	GPIO4A1_GPIO		= 0,
+	GPIO4A1_FLASH_DATA9,
+
+	GPIO4A0_SHIFT		= 0,
+	GPIO4A0_MASK		= 1 << GPIO4A0_SHIFT,
+	GPIO4A0_GPIO		= 0,
+	GPIO4A0_FLASH_DATA8
+
+};
+
+/* GRF_GPIO4B_IOMUX */
+enum {
+	GPIO4B7_SHIFT		= 14,
+	GPIO4B7_MASK		= 1 << GPIO4B7_SHIFT,
+	GPIO4B7_GPIO		= 0,
+	GPIO4B7_SPI0_CSN1,
+
+	GPIO4B6_SHIFT		= 12,
+	GPIO4B6_MASK		= 1 << GPIO4B6_SHIFT,
+	GPIO4B6_GPIO		= 0,
+	GPIO4B6_FLASH_CSN7,
+
+	GPIO4B5_SHIFT		= 10,
+	GPIO4B5_MASK		= 1 << GPIO4B5_SHIFT,
+	GPIO4B5_GPIO		= 0,
+	GPIO4B5_FLASH_CSN6,
+
+	GPIO4B4_SHIFT		= 8,
+	GPIO4B4_MASK		= 1 << GPIO4B4_SHIFT,
+	GPIO4B4_GPIO		= 0,
+	GPIO4B4_FLASH_CSN5,
+
+	GPIO4B3_SHIFT		= 6,
+	GPIO4B3_MASK		= 1 << GPIO4B3_SHIFT,
+	GPIO4B3_GPIO		= 0,
+	GPIO4B3_FLASH_CSN4,
+
+	GPIO4B2_SHIFT		= 4,
+	GPIO4B2_MASK		= 3 << GPIO4B2_SHIFT,
+	GPIO4B2_GPIO		= 0,
+	GPIO4B2_FLASH_CSN3,
+	GPIO4B2_EMMC_RSTN_OUT,
+
+	GPIO4B1_SHIFT		= 2,
+	GPIO4B1_MASK		= 3 << GPIO4B1_SHIFT,
+	GPIO4B1_GPIO		= 0,
+	GPIO4B1_FLASH_CSN2,
+	GPIO4B1_EMMC_CMD,
+
+	GPIO4B0_SHIFT		= 0,
+	GPIO4B0_MASK		= 1 << GPIO4B0_SHIFT,
+	GPIO4B0_GPIO		= 0,
+	GPIO4B0_FLASH_CSN1
+};
+
+/* GRF_SOC_CON0 */
+enum {
+	SMC_MUX_CON_SHIFT	= 13,
+	SMC_MUX_CON_MASK	= 1 << SMC_MUX_CON_SHIFT,
+
+	NOC_REMAP_SHIFT		= 12,
+	NOC_REMAP_MASK		= 1 << NOC_REMAP_SHIFT,
+
+	EMMC_FLASH_SEL_SHIFT	= 11,
+	EMMC_FLASH_SEL_MASK	= 1 << EMMC_FLASH_SEL_SHIFT,
+
+	TZPC_REVISION_SHIFT	= 7,
+	TZPC_REVISION_MASK	= 0xf << TZPC_REVISION_SHIFT,
+
+	L2CACHE_ACC_SHIFT	= 5,
+	L2CACHE_ACC_MASK	= 3 << L2CACHE_ACC_SHIFT,
+
+	L2RD_WAIT_SHIFT		= 3,
+	L2RD_WAIT_MASK		= 3 << L2RD_WAIT_SHIFT,
+
+	IMEMRD_WAIT_SHIFT	= 1,
+	IMEMRD_WAIT_MASK	= 3 << IMEMRD_WAIT_SHIFT,
+	
+	SOC_REMAP_SHIFT		= 0,
+	SOC_REMAP_MASK		= 1 << SOC_REMAP_SHIFT,
+};
+
+/* GRF_SOC_CON1 */
+enum {
+	RKI2C4_SEL_SHIFT	= 15,
+	RKI2C4_SEL_MASK		= 1 << RKI2C4_SEL_SHIFT,
+
+	RKI2C3_SEL_SHIFT	= 14,
+	RKI2C3_SEL_MASK		= 1 << RKI2C3_SEL_SHIFT,
+
+	RKI2C2_SEL_SHIFT	= 13,
+	RKI2C2_SEL_MASK		= 1 << RKI2C2_SEL_SHIFT,
+
+	RKI2C1_SEL_SHIFT	= 12,
+	RKI2C1_SEL_MASK		= 1 << RKI2C1_SEL_SHIFT,
+
+	RKI2C0_SEL_SHIFT	= 11,
+	RKI2C0_SEL_MASK		= 1 << RKI2C0_SEL_SHIFT,
+
+	VCODEC_SEL_SHIFT	= 10,
+	VCODEC_SEL_MASK		= 1 << VCODEC_SEL_SHIFT,
+
+	PERI_EMEM_PAUSE_SHIFT	= 9,
+	PERI_EMEM_PAUSE_MASK	= 1 << PERI_EMEM_PAUSE_SHIFT,
+
+	PERI_USB_PAUSE_SHIFT	= 8,
+	PERI_USB_PAUSE_MASK	= 1 << PERI_USB_PAUSE_SHIFT,
+
+	SMC_MUX_MODE_0_SHIFT	= 6,
+	SMC_MUX_MODE_0_MASK	= 1 << SMC_MUX_MODE_0_SHIFT,
+
+	SMC_SRAM_MW_0_SHIFT	= 4,
+	SMC_SRAM_MW_0_MASK	= 3 << SMC_SRAM_MW_0_SHIFT,
+
+	SMC_REMAP_0_SHIFT	= 3,
+	SMC_REMAP_0_MASK	= 1 << SMC_REMAP_0_SHIFT,
+
+	SMC_A_GT_M0_SYNC_SHIFT	= 2,
+	SMC_A_GT_M0_SYNC_MASK	= 1 << SMC_A_GT_M0_SYNC_SHIFT,
+
+	EMAC_SPEED_SHIFT	= 1,
+	EMAC_SPEEC_MASK		= 1 << EMAC_SPEED_SHIFT,
+
+	EMAC_MODE_SHIFT		= 0,
+	EMAC_MODE_MASK		= 1 << EMAC_MODE_SHIFT,
+};
+
+/* GRF_SOC_CON2 */
+enum {
+
+	MSCH4_MAINDDR3_SHIFT	= 7,
+	MSCH4_MAINDDR3_MASK	= 1 << MSCH4_MAINDDR3_SHIFT,
+	MSCH4_MAINDDR3_DDR3	= 1,
+
+	EMAC_NEWRCV_EN_SHIFT	= 6,
+	EMAC_NEWRCV_EN_MASK	= 1 << EMAC_NEWRCV_EN_SHIFT,
+
+	SW_ADDR15_EN_SHIFT	= 5,
+	SW_ADDR15_EN_MASK	= 1 << SW_ADDR15_EN_SHIFT,
+
+	SW_ADDR16_EN_SHIFT	= 4,
+	SW_ADDR16_EN_MASK	= 1 << SW_ADDR16_EN_SHIFT,
+
+	SW_ADDR17_EN_SHIFT	= 3,
+	SW_ADDR17_EN_MASK	= 1 << SW_ADDR17_EN_SHIFT,
+
+	BANK2_TO_RANK_EN_SHIFT	= 2,
+	BANK2_TO_RANK_EN_MASK	= 1 << BANK2_TO_RANK_EN_SHIFT,
+
+	RANK_TO_ROW15_EN_SHIFT	= 1,
+	RANK_TO_ROW15_EN_MASK	= 1 << RANK_TO_ROW15_EN_SHIFT,
+
+	UPCTL_C_ACTIVE_IN_SHIFT = 0,
+	UPCTL_C_ACTIVE_IN_MASK	= 1 << UPCTL_C_ACTIVE_IN_SHIFT,
+	UPCTL_C_ACTIVE_IN_MAY	= 0,
+	UPCTL_C_ACTIVE_IN_WILL,
+};
+
+/* GRF_DDRC_CON0 */
+enum {
+	DTO_LB_SHIFT		= 11,
+	DTO_LB_MASK		= 3 << DTO_LB_SHIFT,
+
+	DTO_TE_SHIFT		= 9,
+	DTO_TE_MASK		= 3 << DTO_TE_SHIFT,
+
+	DTO_PDR_SHIFT		= 7,
+	DTO_PDR_MASK		= 3 << DTO_PDR_SHIFT,
+
+	DTO_PDD_SHIFT		= 5,
+	DTO_PDD_MASK		= 3 << DTO_PDD_SHIFT,
+
+	DTO_IOM_SHIFT		= 3,
+	DTO_IOM_MASK		= 3 << DTO_IOM_SHIFT,
+
+	DTO_OE_SHIFT		= 1,
+	DTO_OE_MASK		= 3 << DTO_OE_SHIFT,
+
+	ATO_AE_SHIFT		= 0,
+	ATO_AE_MASK		= 1 << ATO_AE_SHIFT,
+};
+#endif

commit b5d6c3ee6999fa924c56257d5cfaa57df3777699
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Nov 3 10:08:48 2017 +0800

    armv8: update gd after relocate
    
    We need to update gd in assamble code after relocate,
    this is a fix to:
    adc421e arm: move gd handling outside of C code
    
    Change-Id: I2730d6e7a8f0ee2a2fb44d63dfc7991aaae733b7
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/lib/crt0_64.S b/arch/arm/lib/crt0_64.S
index 62fad452b2..2008b76bed 100644
--- a/arch/arm/lib/crt0_64.S
+++ b/arch/arm/lib/crt0_64.S
@@ -113,6 +113,8 @@ relocation_return:
 #endif /* !CONFIG_SPL_BUILD */
 #if defined(CONFIG_SPL_BUILD)
 	bl	spl_relocate_stack_gd           /* may return NULL */
+	/* set up gd here, outside any C code */
+	mov	x18, x0
 	/*
 	 * Perform 'sp = (x0 != NULL) ? x0 : sp' while working
 	 * around the constraint that conditional moves can not

commit 430b01462bf3f24aaf7920ae2587a6943c39ab5d
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Oct 26 14:33:14 2017 +0800

    rockchip: Kconfig: enable TPL/SPL support for rk3328
    
    Enable TPL/SPL support and some related option in Kconfig.
    
    Change-Id: Ifde2835d06cfd69933487a66ebce63956b12407e
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index ec6522b89a..41a7363d3a 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -79,6 +79,18 @@ config ROCKCHIP_RK3328
 	bool "Support Rockchip RK3328"
 	select ARM64
 	select GICV2
+	select SUPPORT_SPL
+	select SUPPORT_TPL
+	select SPL
+	select TPL
+	select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
+	select TPL_NEEDS_SEPARATE_STACK if TPL
+	imply SPL_SERIAL_SUPPORT
+	imply TPL_SERIAL_SUPPORT
+	imply SPL_SEPARATE_BSS
+	select ENABLE_ARM_SOC_BOOT0_HOOK
+	select DEBUG_UART_BOARD_INIT
+	select SYS_NS16550
 	help
 	  The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
 	  including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
@@ -86,6 +98,22 @@ config ROCKCHIP_RK3328
 	  and video codec support. Peripherals include Gigabit Ethernet,
 	  USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
 
+if ROCKCHIP_RK3328
+
+config TPL_LDSCRIPT
+	default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
+
+config TPL_TEXT_BASE
+        default 0xff091000
+
+config TPL_MAX_SIZE
+        default 28672
+
+config TPL_STACK
+        default 0xff098000
+
+endif
+
 config ROCKCHIP_RK3368
 	bool "Support Rockchip RK3368"
 	select ARM64
@@ -165,7 +193,7 @@ config SPL_ROCKCHIP_BACK_TO_BROM
 
 config TPL_ROCKCHIP_BACK_TO_BROM
 	bool "TPL returns to bootrom"
-	default y if ROCKCHIP_RK3368
+	default y if ROCKCHIP_RK3368 || ROCKCHIP_RK3328
 	select ROCKCHIP_BROM_HELPER
 	depends on TPL
 	help

commit df4f40acb449815384e397dcaf5b618bbc6cd855
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Oct 26 14:36:50 2017 +0800

    rockchip: evb-rk3328: enable defconfig options for TPL/SPL
    
    Enable driver options for TPL/SPL in evb-rk3328_defconfig.
    
    Change-Id: I8f9e378b3d459d976e2522884b607b68b0fdf9fd
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index 8b8a835d33..d4a00718c5 100644
--- a/configs/evb-rk3328_defconfig
+++ b/configs/evb-rk3328_defconfig
@@ -1,11 +1,33 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 CONFIG_ROCKCHIP_RK3328=y
+CONFIG_TPL_SERIAL_PRESENT=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
 CONFIG_DEFAULT_DEVICE_TREE="rk3328-evb"
 CONFIG_DEBUG_UART=y
 # CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_GENERATOR="board/rockchip/evb_rk3328/mk_fit_atf.sh"
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_TPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_ATF_SUPPORT=y
+CONFIG_TPL=y
+CONFIG_TPL_BOOTROM_SUPPORT=y
+CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_TPL_SERIAL_PRESENT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=1
@@ -13,14 +35,23 @@ CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
 CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_TIME=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_TPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_TPL_OF_PLATDATA=y
 CONFIG_ENV_IS_IN_MMC=y
+CONFIG_TPL_DM=y
 CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_TPL_REGMAP=y
 CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_TPL_SYSCON=y
 CONFIG_CLK=y
+CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y
@@ -29,22 +60,27 @@ CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
 CONFIG_PINCTRL_ROCKCHIP_RK3328=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
-CONFIG_DM_REGULATOR=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_DM_RESET=y
+CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF130000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
+CONFIG_SPL_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
@@ -61,4 +97,5 @@ CONFIG_G_DNL_MANUFACTURER="Rockchip"
 CONFIG_G_DNL_VENDOR_NUM=0x2207
 CONFIG_G_DNL_PRODUCT_NUM=0x330a
 CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y

commit cb2b7a1bc75ebb116b1eb9b0ae0223e84d86fc4b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Oct 26 14:37:50 2017 +0800

    rockchip: rk3328: add config option for TPL/SPL
    
    Enable SPL_FRAMEWORK and TPL/SPL related base addr and size.
    
    Change-Id: I59ee5675b66ec63c531931be7ba43606718c527f
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index ecc0219cd7..c5aba94508 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -13,12 +13,18 @@
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
+#define CONFIG_SPL_FRAMEWORK
+
 #define CONFIG_SYS_NS16550_MEM32
 
 #define CONFIG_SYS_TEXT_BASE		0x00200000
 #define CONFIG_SYS_INIT_SP_ADDR		0x00300000
 #define CONFIG_SYS_LOAD_ADDR		0x00800800
-
+#define CONFIG_SPL_STACK		0x00400000
+#define CONFIG_SPL_TEXT_BASE		0x00000000
+#define CONFIG_SPL_MAX_SIZE             0x10000
+#define CONFIG_SPL_BSS_START_ADDR	0x2000000
+#define CONFIG_SPL_BSS_MAX_SIZE         0x2000
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */
 
 #define GICD_BASE			0xFF811000

commit 664225d1610d77ef64ed9a4f42d36474362592cc
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Oct 26 11:50:24 2017 +0800

    rockchip: dts: rk3328: enable the drivers need by tpl/spl
    
    Enable the drivers need by TPL/SPL with 'u-boot,dm-pre-reloc'.
    
    Change-Id: I7a3900379085e134631f390032fc974b25e46a08
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts
index 3bac4e4415..4b13a8da64 100644
--- a/arch/arm/dts/rk3328-evb.dts
+++ b/arch/arm/dts/rk3328-evb.dts
@@ -48,6 +48,7 @@
 };
 
 &uart2 {
+	u-boot,dm-pre-reloc;
 	status = "okay";
 };
 
@@ -64,6 +65,7 @@
 };
 
 &emmc {
+	u-boot,dm-pre-reloc;
 	bus-width = <8>;
 	cap-mmc-highspeed;
 	supports-emmc;
diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi
index b821c4c979..2a4c4929d7 100644
--- a/arch/arm/dts/rk3328.dtsi
+++ b/arch/arm/dts/rk3328.dtsi
@@ -366,6 +366,7 @@
 	};
 
 	cru: clock-controller@ff440000 {
+		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3328-cru", "rockchip,cru", "syscon";
 		reg = <0x0 0xff440000 0x0 0x1000>;
 		rockchip,grf = <&grf>;

commit 0d85fb9b23c0694807c22c869cd91ad700fd8145
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Oct 26 11:58:03 2017 +0800

    rockchip: rk3328-evb: add script for atf fit
    
    Add a script to generate binaries from bl31.elf, and generate
    u-boot.its file for FIT image including u-boot, dtb and atf
    binaries.
    
    Change-Id: Ife016da5468b3c618c619354fb280b6951aed94b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/board/rockchip/evb_rk3328/mk_fit_atf.sh b/board/rockchip/evb_rk3328/mk_fit_atf.sh
new file mode 100755
index 0000000000..192c303af0
--- /dev/null
+++ b/board/rockchip/evb_rk3328/mk_fit_atf.sh
@@ -0,0 +1,108 @@
+#!/bin/sh
+#
+# script to generate FIT image source for rk3399 boards with
+# ARM Trusted Firmware and multiple device trees (given on the command line)
+#
+# usage: $0 <dt_name> [<dt_name> [<dt_name] ...]
+
+[ -z "$BL31" ] && BL31="bl31.elf"
+
+if [ ! -f $BL31 ]; then
+	echo "WARNING: BL31 file $BL31 NOT found, resulting binary is non-functional" >&2
+	BL31=/dev/null
+fi
+
+cat << __HEADER_EOF
+/dts-v1/;
+
+/ {
+	description = "Configuration to load ATF before U-Boot";
+	#address-cells = <1>;
+
+	images {
+		uboot@1 {
+			description = "U-Boot (64-bit)";
+			data = /incbin/("u-boot-nodtb.bin");
+			type = "standalone";
+			arch = "arm64";
+			compression = "none";
+			load = <0x00200000>;
+		};
+__HEADER_EOF
+
+atf_cnt=1
+
+for l in `readelf -l $BL31 | grep -A1 LOAD | gawk --non-decimal-data \
+	'{if (NR % 2) {printf "%d:0x%x:", $2,$4} else {printf "%d\n", $1}}'`
+do
+	offset=${l%%:*}
+	ll=${l#*:}
+	phy_offset=${ll%:*}
+	filesz=${ll##*:}
+
+	#echo "$offset/$phy_offset/$filesz"
+
+	of=bl31_${phy_offset}.bin
+	dd if=$BL31 of=$of bs=1 skip=$offset count=$filesz
+
+	out_string="${out_string}:${phy_offset}"
+
+	cat << __ATF1_EOF
+		atf@$atf_cnt {
+			description = "ARM Trusted Firmware";
+			data = /incbin/("$of");
+			type = "firmware";
+			arch = "arm64";
+			compression = "none";
+			load = <$phy_offset>;
+__ATF1_EOF
+	if [ "$atf_cnt" -eq 1 ]; then
+		cat << __ATF2_EOF
+			entry = <$phy_offset>;
+__ATF2_EOF
+		fi
+	cat << __ATF3_EOF
+		};
+__ATF3_EOF
+	atf_cnt=$((atf_cnt + 1))
+done
+
+cnt=1
+for dtname in $*
+do
+	cat << __FDT_IMAGE_EOF
+		fdt@$cnt {
+			description = "$(basename $dtname .dtb)";
+			data = /incbin/("$dtname");
+			type = "flat_dt";
+			compression = "none";
+		};
+__FDT_IMAGE_EOF
+	cnt=$((cnt+1))
+done
+
+cat << __CONF_HEADER_EOF
+	};
+	configurations {
+		default = "config@1";
+
+__CONF_HEADER_EOF
+
+cnt=1
+for dtname in $*
+do
+	cat << __CONF_SECTION_EOF
+		config@$cnt {
+			description = "$(basename $dtname .dtb)";
+			firmware = "uboot@1";
+			loadables = "atf@1","atf@2";
+			fdt = "fdt@1";
+		};
+__CONF_SECTION_EOF
+	cnt=$((cnt+1))
+done
+
+cat << __ITS_EOF
+	};
+};
+__ITS_EOF

commit 6c73d5e78d627fcbd9d4349dfebcd6a1b0abf84c
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Oct 26 11:43:22 2017 +0800

    rockchip: add a link file for armv8 tpl
    
    Rockchip TPL is not going to use both sram and dram, so
    we will use a separate link file.
    
    Change-Id: I336bdff8033ca2d49521a3639fbf182c293463b5
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/u-boot-tpl-v8.lds b/arch/arm/mach-rockchip/u-boot-tpl-v8.lds
new file mode 100644
index 0000000000..3fd50fd86c
--- /dev/null
+++ b/arch/arm/mach-rockchip/u-boot-tpl-v8.lds
@@ -0,0 +1,91 @@
+/*
+ * (C) Copyright 2013
+ * David Feng <fenghua@phytium.com.cn>
+ *
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
+ *
+ * (C) Copyright 2010
+ * Texas Instruments, <www.ti.com>
+ *	Aneesh V <aneesh@ti.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+OUTPUT_FORMAT("elf64-littleaarch64", "elf64-littleaarch64", "elf64-littleaarch64")
+OUTPUT_ARCH(aarch64)
+ENTRY(_start)
+SECTIONS
+{
+	. = 0x00000000;
+
+	.text : {
+		. = ALIGN(8);
+		*(.__image_copy_start)
+		CPUDIR/start.o (.text*)
+		*(.text*)
+	}
+
+	.rodata : {
+		. = ALIGN(8);
+		*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
+	}
+
+	.data : {
+		. = ALIGN(8);
+		*(.data*)
+	}
+
+	.u_boot_list : {
+		. = ALIGN(8);
+		KEEP(*(SORT(.u_boot_list*)));
+	}
+
+	.image_copy_end : {
+		. = ALIGN(8);
+		*(.__image_copy_end)
+	}
+
+	.end : {
+		. = ALIGN(8);
+		*(.__end)
+	}
+
+	_image_binary_end = .;
+
+	.bss_start (NOLOAD) : {
+		. = ALIGN(8);
+		KEEP(*(.__bss_start));
+	}
+
+	.bss (NOLOAD) : {
+		*(.bss*)
+		 . = ALIGN(8);
+	}
+
+	.bss_end (NOLOAD) : {
+		KEEP(*(.__bss_end));
+	}
+
+	/DISCARD/ : { *(.dynsym) }
+	/DISCARD/ : { *(.dynstr*) }
+	/DISCARD/ : { *(.dynamic*) }
+	/DISCARD/ : { *(.plt*) }
+	/DISCARD/ : { *(.interp*) }
+	/DISCARD/ : { *(.gnu*) }
+}
+
+#if defined(CONFIG_TPL_MAX_SIZE)
+ASSERT(__image_copy_end - __image_copy_start < (CONFIG_TPL_MAX_SIZE), \
+	"TPL image too big");
+#endif
+
+#if defined(CONFIG_TPL_BSS_MAX_SIZE)
+ASSERT(__bss_end - __bss_start < (CONFIG_TPL_BSS_MAX_SIZE), \
+	"TPL image BSS too big");
+#endif
+
+#if defined(CONFIG_TPL_MAX_FOOTPRINT)
+ASSERT(__bss_end - _start < (CONFIG_TPL_MAX_FOOTPRINT), \
+	"TPL image plus BSS too big");
+#endif

commit 4ebe3968b683190cb8e5741aa7227b4fa7497874
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Oct 26 11:48:09 2017 +0800

    rockchip: rk3328: add spl board file support
    
    rk3328 spl is locate at dram, so do not have strict size limit,
    suppose to enable storage media controller driver, load ATF and
    U-Boot, then boot into ATF.
    
    Change-Id: I60d0e2b278dc09b04bd098f682c06bd5fb6cecf7
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 35cc55fff3..dbaaf7d527 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -20,6 +20,7 @@ obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o
 obj-spl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-spl.o
 obj-spl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-spl.o spl-boot-order.o
 obj-spl-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-spl.o
+obj-spl-$(CONFIG_ROCKCHIP_RK3328) += rk3328-board-spl.o
 obj-spl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-spl.o spl-boot-order.o
 obj-spl-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board-spl.o spl-boot-order.o
 
diff --git a/arch/arm/mach-rockchip/rk3328-board-spl.c b/arch/arm/mach-rockchip/rk3328-board-spl.c
new file mode 100644
index 0000000000..1f7274a8d0
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3328-board-spl.c
@@ -0,0 +1,64 @@
+/*
+ * (C) Copyright 2016 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <debug_uart.h>
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <ram.h>
+#include <spl.h>
+#include <asm/io.h>
+#include <asm/arch/cru_rk3328.h>
+#include <asm/arch/grf_rk3328.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/periph.h>
+#include <asm/arch/timer.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+void board_debug_uart_init(void)
+{
+}
+
+void board_init_f(ulong dummy)
+{
+	struct udevice *dev;
+	int ret;
+
+	ret = spl_early_init();
+	if (ret) {
+		debug("spl_early_init() failed: %d\n", ret);
+		hang();
+	}
+
+	preloader_console_init();
+
+	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
+	if (ret) {
+		debug("DRAM init failed: %d\n", ret);
+		return;
+	}
+}
+
+u32 spl_boot_mode(const u32 boot_device)
+{
+	return MMCSD_MODE_RAW;
+}
+
+u32 spl_boot_device(void)
+{
+	return BOOT_DEVICE_MMC1;
+}
+
+#ifdef CONFIG_SPL_LOAD_FIT
+int board_fit_config_name_match(const char *name)
+{
+	/* Just empty function now - can't decide what to choose */
+	debug("%s: %s\n", __func__, name);
+
+	return 0;
+}
+#endif

commit d9cab26c621433b26b50d1f9ca43c69787fcbd4d
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Oct 26 11:46:54 2017 +0800

    rockchip: rk3328: add tpl board file support
    
    rk3328 tpl suppose to init ddr sdram and then back to bootrom.
    
    Change-Id: I05ec83e32650b5aca88940d725586ffabf28322e
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 52eb04645f..35cc55fff3 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -14,6 +14,7 @@ obj-tpl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o save_boot_param.o
 obj-tpl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-tpl.o
 obj-tpl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-tpl.o
 obj-tpl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-tpl.o
+obj-tpl-$(CONFIG_ROCKCHIP_RK3328) += rk3328-board-tpl.o
 
 obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o
 obj-spl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-spl.o
diff --git a/arch/arm/mach-rockchip/rk3328-board-tpl.c b/arch/arm/mach-rockchip/rk3328-board-tpl.c
new file mode 100644
index 0000000000..1c74ff29ea
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3328-board-tpl.c
@@ -0,0 +1,114 @@
+/*
+ * (C) Copyright 2016 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <debug_uart.h>
+#include <dm.h>
+#include <fdtdec.h>
+#include <led.h>
+#include <malloc.h>
+#include <mmc.h>
+#include <ram.h>
+#include <spl.h>
+#include <asm/gpio.h>
+#include <asm/io.h>
+#include <asm/arch/bootrom.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/periph.h>
+#include <asm/arch/sdram.h>
+#include <asm/arch/timer.h>
+#include <dm/pinctrl.h>
+#include <dm/root.h>
+#include <dm/test.h>
+#include <dm/util.h>
+#include <power/regulator.h>
+#include <asm/arch/grf_rk3328.h>
+#include <asm/arch/uart.h>
+
+#define CRU_BASE		0xFF440000
+#define GRF_BASE		0xFF100000
+#define UART2_BASE		0xFF130000
+#define STIMER_BASE_ADDR		0xFF1d0000
+#define CPU_TIMER_BASE			(STIMER_BASE_ADDR + 0x20)
+
+void board_timer_init(void)
+{
+	/* Initialize CNTFRQ */
+	__asm__ volatile ("LDR x0,=24000000");
+	__asm__ volatile ("MSR CNTFRQ_EL0, x0");
+
+	/* Enable STimer1 for core */
+	writel(0x0, CPU_TIMER_BASE + 0x0010);
+	writel(0xffffffff, CPU_TIMER_BASE + 0x0000);
+	writel(0xffffffff, CPU_TIMER_BASE + 0x0004);
+	writel(0x1, CPU_TIMER_BASE + 0x0010);
+}
+
+void board_debug_uart_init(void)
+{
+	struct rk3328_grf_regs * const grf = (void *)GRF_BASE;
+	struct rk_uart * const uart = (void *)UART2_BASE;
+
+	/* uart_sel_clk default select 24MHz */
+	writel((3 << (8 + 16)) | (2 << 8), CRU_BASE + 0x148);
+
+	/* init uart baud rate 1500000 */
+	writel(0x83, &uart->lcr);
+	writel(0x1, &uart->rbr);
+	writel(0x3, &uart->lcr);
+
+	/* Enable early UART2 */
+	rk_clrsetreg(&grf->com_iomux,
+		     IOMUX_SEL_UART2_MASK,
+		     IOMUX_SEL_UART2_M1 << IOMUX_SEL_UART2_SHIFT);
+	rk_clrsetreg(&grf->gpio2a_iomux,
+		     GPIO2A0_SEL_MASK,
+		     GPIO2A0_UART2_TX_M1 << GPIO2A0_SEL_SHIFT);
+	rk_clrsetreg(&grf->gpio2a_iomux,
+		     GPIO2A1_SEL_MASK,
+		     GPIO2A1_UART2_RX_M1 << GPIO2A1_SEL_SHIFT);
+
+	/* enable FIFO */
+	writel(0x1, &uart->sfe);
+}
+
+void board_return_to_bootrom(void)
+{
+	back_to_bootrom();
+}
+
+u32 spl_boot_device(void)
+{
+	return BOOT_DEVICE_BOOTROM;
+}
+
+
+void board_init_f(ulong dummy)
+{
+	struct udevice *dev;
+	int ret;
+
+#define EARLY_UART
+#ifdef EARLY_UART
+	debug_uart_init();
+	printascii("U-Boot TPL board init\n");
+#endif
+
+	board_timer_init();
+
+	ret = spl_early_init();
+	if (ret) {
+		printf("spl_early_init() failed: %d\n", ret);
+		hang();
+	}
+
+	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
+	if (ret) {
+		printf("DRAM init failed: %d\n", ret);
+		return;
+	}
+}

commit 9fb0777ec3cc6a89af9d2e0969c3bfe58306a88d
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Oct 26 11:17:07 2017 +0800

    rockchip: ram: add full feature rk3328 dram driver
    
    This driver supports ddr3/lpddr3/ddr4 sdram initialization.
    
    Since we are going to merge the common part in dram driver for all
    Rockchip SoCs, this patch become a RFC and can be used for people
    who need it.
    
    Change-Id: I255411e02089b461fdc384842e23ec2e092f87fb
    Signed-off-by: YouMin Chen <cym@rock-chips.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rk3328.h b/arch/arm/include/asm/arch-rockchip/sdram_rk3328.h
new file mode 100644
index 0000000000..951d4fab18
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/sdram_rk3328.h
@@ -0,0 +1,535 @@
+/*
+ * Copyright (C) 2016-2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _ASM_ARCH_SDRAM_RK3328_H
+#define _ASM_ARCH_SDRAM_RK3328_H
+
+enum {
+	DDR4 = 0,
+	DDR3 = 3,
+	LPDDR2 = 5,
+	LPDDR3 = 6,
+	LPDDR4 = 7,
+	UNUSED = 0xFF
+};
+
+#define SR_IDLE		93
+#define PD_IDLE		13
+#define SDRAM_ADDR	0x00000000
+#define PATTERN		(0x5aa5f00f)
+
+/* ddr pctl registers define */
+#define DDR_PCTL2_MSTR			0x0
+#define DDR_PCTL2_STAT			0x4
+#define DDR_PCTL2_MSTR1			0x8
+#define DDR_PCTL2_MRCTRL0		0x10
+#define DDR_PCTL2_MRCTRL1		0x14
+#define DDR_PCTL2_MRSTAT		0x18
+#define DDR_PCTL2_MRCTRL2		0x1c
+#define DDR_PCTL2_DERATEEN		0x20
+#define DDR_PCTL2_DERATEINT		0x24
+#define DDR_PCTL2_PWRCTL		0x30
+#define DDR_PCTL2_PWRTMG		0x34
+#define DDR_PCTL2_HWLPCTL		0x38
+#define DDR_PCTL2_RFSHCTL0		0x50
+#define DDR_PCTL2_RFSHCTL1		0x54
+#define DDR_PCTL2_RFSHCTL2		0x58
+#define DDR_PCTL2_RFSHCTL4		0x5c
+#define DDR_PCTL2_RFSHCTL3		0x60
+#define DDR_PCTL2_RFSHTMG		0x64
+#define DDR_PCTL2_RFSHTMG1		0x68
+#define DDR_PCTL2_RFSHCTL5		0x6c
+#define DDR_PCTL2_INIT0			0xd0
+#define DDR_PCTL2_INIT1			0xd4
+#define DDR_PCTL2_INIT2			0xd8
+#define DDR_PCTL2_INIT3			0xdc
+#define DDR_PCTL2_INIT4			0xe0
+#define DDR_PCTL2_INIT5			0xe4
+#define DDR_PCTL2_INIT6			0xe8
+#define DDR_PCTL2_INIT7			0xec
+#define DDR_PCTL2_DIMMCTL		0xf0
+#define DDR_PCTL2_RANKCTL		0xf4
+#define DDR_PCTL2_CHCTL			0xfc
+#define DDR_PCTL2_DRAMTMG0		0x100
+#define DDR_PCTL2_DRAMTMG1		0x104
+#define DDR_PCTL2_DRAMTMG2		0x108
+#define DDR_PCTL2_DRAMTMG3		0x10c
+#define DDR_PCTL2_DRAMTMG4		0x110
+#define DDR_PCTL2_DRAMTMG5		0x114
+#define DDR_PCTL2_DRAMTMG6		0x118
+#define DDR_PCTL2_DRAMTMG7		0x11c
+#define DDR_PCTL2_DRAMTMG8		0x120
+#define DDR_PCTL2_DRAMTMG9		0x124
+#define DDR_PCTL2_DRAMTMG10		0x128
+#define DDR_PCTL2_DRAMTMG11		0x12c
+#define DDR_PCTL2_DRAMTMG12		0x130
+#define DDR_PCTL2_DRAMTMG13		0x134
+#define DDR_PCTL2_DRAMTMG14		0x138
+#define DDR_PCTL2_DRAMTMG15		0x13c
+#define DDR_PCTL2_DRAMTMG16		0x140
+#define DDR_PCTL2_ZQCTL0		0x180
+#define DDR_PCTL2_ZQCTL1		0x184
+#define DDR_PCTL2_ZQCTL2		0x188
+#define DDR_PCTL2_ZQSTAT		0x18c
+#define DDR_PCTL2_DFITMG0		0x190
+#define DDR_PCTL2_DFITMG1		0x194
+#define DDR_PCTL2_DFILPCFG0		0x198
+#define DDR_PCTL2_DFILPCFG1		0x19c
+#define DDR_PCTL2_DFIUPD0		0x1a0
+#define DDR_PCTL2_DFIUPD1		0x1a4
+#define DDR_PCTL2_DFIUPD2		0x1a8
+#define DDR_PCTL2_DFIMISC		0x1b0
+#define DDR_PCTL2_DFITMG2		0x1b4
+#define DDR_PCTL2_DFITMG3		0x1b8
+#define DDR_PCTL2_DFISTAT		0x1bc
+#define DDR_PCTL2_DBICTL		0x1c0
+#define DDR_PCTL2_ADDRMAP0		0x200
+#define DDR_PCTL2_ADDRMAP1		0x204
+#define DDR_PCTL2_ADDRMAP2		0x208
+#define DDR_PCTL2_ADDRMAP3		0x20c
+#define DDR_PCTL2_ADDRMAP4		0x210
+#define DDR_PCTL2_ADDRMAP5		0x214
+#define DDR_PCTL2_ADDRMAP6		0x218
+#define DDR_PCTL2_ADDRMAP7		0x21c
+#define DDR_PCTL2_ADDRMAP8		0x220
+#define DDR_PCTL2_ADDRMAP9		0x224
+#define DDR_PCTL2_ADDRMAP10		0x228
+#define DDR_PCTL2_ADDRMAP11		0x22c
+#define DDR_PCTL2_ODTCFG		0x240
+#define DDR_PCTL2_ODTMAP		0x244
+#define DDR_PCTL2_SCHED			0x250
+#define DDR_PCTL2_SCHED1		0x254
+#define DDR_PCTL2_PERFHPR1		0x25c
+#define DDR_PCTL2_PERFLPR1		0x264
+#define DDR_PCTL2_PERFWR1		0x26c
+#define DDR_PCTL2_DQMAP0		0x280
+#define DDR_PCTL2_DQMAP1		0x284
+#define DDR_PCTL2_DQMAP2		0x288
+#define DDR_PCTL2_DQMAP3		0x28c
+#define DDR_PCTL2_DQMAP4		0x290
+#define DDR_PCTL2_DQMAP5		0x294
+#define DDR_PCTL2_DBG0			0x300
+#define DDR_PCTL2_DBG1			0x304
+#define DDR_PCTL2_DBGCAM		0x308
+#define DDR_PCTL2_DBGCMD		0x30c
+#define DDR_PCTL2_DBGSTAT		0x310
+#define DDR_PCTL2_SWCTL			0x320
+#define DDR_PCTL2_SWSTAT		0x324
+#define DDR_PCTL2_POISONCFG		0x36c
+#define DDR_PCTL2_POISONSTAT		0x370
+#define DDR_PCTL2_ADVECCINDEX		0x374
+#define DDR_PCTL2_ADVECCSTAT		0x378
+#define DDR_PCTL2_PSTAT			0x3fc
+#define DDR_PCTL2_PCCFG			0x400
+#define DDR_PCTL2_PCFGR_n		0x404
+#define DDR_PCTL2_PCFGW_n		0x408
+#define DDR_PCTL2_PCTRL_n		0x490
+
+/* PCTL2_MRSTAT */
+#define MR_WR_BUSY			BIT(0)
+
+/* PHY_REG0 */
+#define DIGITAL_DERESET			BIT(3)
+#define ANALOG_DERESET			BIT(2)
+#define DIGITAL_RESET			(0 << 3)
+#define ANALOG_RESET			(0 << 2)
+
+/* PHY_REG1 */
+#define PHY_DDR2			(0)
+#define PHY_LPDDR2			(1)
+#define PHY_DDR3			(2)
+#define PHY_LPDDR3			(3)
+#define PHY_DDR4			(4)
+#define PHY_BL_4			(0 << 2)
+#define PHY_BL_8			BIT(2)
+
+/* PHY_REG2 */
+#define PHY_DTT_EN			BIT(0)
+#define PHY_DTT_DISB			(0 << 0)
+#define PHY_WRITE_LEVELING_EN		BIT(2)
+#define PHY_WRITE_LEVELING_DISB		(0 << 2)
+#define PHY_SELECT_CS0			(2)
+#define PHY_SELECT_CS1			(1)
+#define PHY_SELECT_CS0_1		(0)
+#define PHY_WRITE_LEVELING_SELECTCS(n)	(n << 6)
+#define PHY_DATA_TRAINING_SELECTCS(n)	(n << 4)
+
+#define PHY_DDR3_RON_RTT_DISABLE	(0)
+#define PHY_DDR3_RON_RTT_451ohm		(1)
+#define PHY_DDR3_RON_RTT_225ohm		(2)
+#define PHY_DDR3_RON_RTT_150ohm		(3)
+#define PHY_DDR3_RON_RTT_112ohm		(4)
+#define PHY_DDR3_RON_RTT_90ohm		(5)
+#define PHY_DDR3_RON_RTT_75ohm		(6)
+#define PHY_DDR3_RON_RTT_64ohm		(7)
+#define PHY_DDR3_RON_RTT_56ohm		(16)
+#define PHY_DDR3_RON_RTT_50ohm		(17)
+#define PHY_DDR3_RON_RTT_45ohm		(18)
+#define PHY_DDR3_RON_RTT_41ohm		(19)
+#define PHY_DDR3_RON_RTT_37ohm		(20)
+#define PHY_DDR3_RON_RTT_34ohm		(21)
+#define PHY_DDR3_RON_RTT_33ohm		(22)
+#define PHY_DDR3_RON_RTT_30ohm		(23)
+#define PHY_DDR3_RON_RTT_28ohm		(24)
+#define PHY_DDR3_RON_RTT_26ohm		(25)
+#define PHY_DDR3_RON_RTT_25ohm		(26)
+#define PHY_DDR3_RON_RTT_23ohm		(27)
+#define PHY_DDR3_RON_RTT_22ohm		(28)
+#define PHY_DDR3_RON_RTT_21ohm		(29)
+#define PHY_DDR3_RON_RTT_20ohm		(30)
+#define PHY_DDR3_RON_RTT_19ohm		(31)
+
+#define PHY_DDR4_LPDDR3_RON_RTT_DISABLE	(0)
+#define PHY_DDR4_LPDDR3_RON_RTT_480ohm	(1)
+#define PHY_DDR4_LPDDR3_RON_RTT_240ohm	(2)
+#define PHY_DDR4_LPDDR3_RON_RTT_160ohm	(3)
+#define PHY_DDR4_LPDDR3_RON_RTT_120ohm	(4)
+#define PHY_DDR4_LPDDR3_RON_RTT_96ohm	(5)
+#define PHY_DDR4_LPDDR3_RON_RTT_80ohm	(6)
+#define PHY_DDR4_LPDDR3_RON_RTT_68ohm	(7)
+#define PHY_DDR4_LPDDR3_RON_RTT_60ohm	(16)
+#define PHY_DDR4_LPDDR3_RON_RTT_53ohm	(17)
+#define PHY_DDR4_LPDDR3_RON_RTT_48ohm	(18)
+#define PHY_DDR4_LPDDR3_RON_RTT_43ohm	(19)
+#define PHY_DDR4_LPDDR3_RON_RTT_40ohm	(20)
+#define PHY_DDR4_LPDDR3_RON_RTT_37ohm	(21)
+#define PHY_DDR4_LPDDR3_RON_RTT_34ohm	(22)
+#define PHY_DDR4_LPDDR3_RON_RTT_32ohm	(23)
+#define PHY_DDR4_LPDDR3_RON_RTT_30ohm	(24)
+#define PHY_DDR4_LPDDR3_RON_RTT_28ohm	(25)
+#define PHY_DDR4_LPDDR3_RON_RTT_26ohm	(26)
+#define PHY_DDR4_LPDDR3_RON_RTT_25ohm	(27)
+#define PHY_DDR4_LPDDR3_RON_RTT_24ohm	(28)
+#define PHY_DDR4_LPDDR3_RON_RTT_22ohm	(29)
+#define PHY_DDR4_LPDDR3_RON_RTT_21ohm	(30)
+#define PHY_DDR4_LPDDR3_RON_RTT_20ohm	(31)
+
+/* noc registers define */
+#define DDRCONF				0x8
+#define DDRTIMING			0xc
+#define DDRMODE				0x10
+#define READLATENCY			0x14
+#define AGING0				0x18
+#define AGING1				0x1c
+#define AGING2				0x20
+#define AGING3				0x24
+#define AGING4				0x28
+#define AGING5				0x2c
+#define ACTIVATE			0x38
+#define DEVTODEV			0x3c
+#define DDR4TIMING			0x40
+
+/* DDR GRF */
+#define DDR_GRF_CON(n)		(0 + (n) * 4)
+#define DDR_GRF_STATUS_BASE	(0X100)
+#define DDR_GRF_STATUS(n)	(DDR_GRF_STATUS_BASE + (n) * 4)
+
+/*
+ * sys_reg bitfield struct
+ * [31]		row_3_4_ch1
+ * [30]		row_3_4_ch0
+ * [29:28]	chinfo
+ * [27]		rank_ch1
+ * [26:25]	col_ch1
+ * [24]		bk_ch1
+ * [23:22]	cs0_row_ch1
+ * [21:20]	cs1_row_ch1
+ * [19:18]	bw_ch1
+ * [17:16]	dbw_ch1;
+ * [15:13]	ddrtype
+ * [12]		channelnum
+ * [11]		rank_ch0
+ * [10:9]	col_ch0
+ * [8]		bk_ch0
+ * [7:6]	cs0_row_ch0
+ * [5:4]	cs1_row_ch0
+ * [3:2]	bw_ch0
+ * [1:0]	dbw_ch0
+*/
+#define SYS_REG_ENC_ROW_3_4(n)	((n) << 30)
+#define SYS_REG_DEC_ROW_3_4(n)	((n >> 30) & 0x1)
+#define SYS_REG_ENC_CHINFO()		(1 << 28)
+#define SYS_REG_ENC_DDRTYPE(n)		((n) << 13)
+#define SYS_REG_ENC_NUM_CH(n)		(((n) - 1) << 12)
+#define SYS_REG_DEC_NUM_CH(n)		(1 + ((n >> 12) & 0x1))
+#define SYS_REG_ENC_RANK(n)		(((n) - 1) << 11)
+#define SYS_REG_DEC_RANK(n)		(1 + ((n >> 11) & 0x1))
+#define SYS_REG_ENC_COL(n)		(((n) - 9) << 9)
+#define SYS_REG_DEC_COL(n)		(9 + ((n >> 9) & 0x3))
+#define SYS_REG_ENC_BK(n)		(((n) == 3 ? 0 : 1) << 8)
+#define SYS_REG_DEC_BK(n)		(3 - ((n >> 8) & 0x1))
+#define SYS_REG_ENC_CS0_ROW(n)		(((n) - 13) << 6)
+#define SYS_REG_DEC_CS0_ROW(n)		(13 + ((n >> 6) & 0x3))
+#define SYS_REG_ENC_CS1_ROW(n)		(((n) - 13) << 4)
+#define SYS_REG_DEC_CS1_ROW(n)		(13 + ((n >> 4) & 0x3))
+#define SYS_REG_ENC_BW(n)		((2 >> (n)) << 2)
+#define SYS_REG_DEC_BW(n)		(2 >> ((n >> 2) & 0x3))
+#define SYS_REG_ENC_DBW(n)		((2 >> (n)) << 0)
+#define SYS_REG_DEC_DBW(n)		(2 >> ((n >> 0) & 0x3))
+
+/* CRU_SOFTRESET_CON5 */
+#define ddrphy_psrstn_req(n)    (((0x1 << 15) << 16) | (n << 15))
+#define ddrphy_srstn_req(n)     (((0x1 << 14) << 16) | (n << 14))
+#define ddrctrl_psrstn_req(n)	(((0x1 << 13) << 16) | (n << 13))
+#define ddrctrl_srstn_req(n)	(((0x1 << 12) << 16) | (n << 12))
+#define ddrmsch_srstn_req(n)	(((0x1 << 11) << 16) | (n << 11))
+#define msch_srstn_req(n)		(((0x1 << 9) << 16) | (n << 9))
+#define dfimon_srstn_req(n)		(((0x1 << 8) << 16) | (n << 8))
+#define grf_ddr_srstn_req(n)	(((0x1 << 7) << 16) | (n << 7))
+/* CRU_SOFTRESET_CON9 */
+#define ddrctrl_asrstn_req(n)		(((0x1 << 9) << 16) | (n << 9))
+
+/* CRU register */
+#define CRU_PLL_CON(pll_id, n)	((pll_id)  * 0x20 + (n) * 4)
+#define CRU_MODE				(0x80)
+#define CRU_GLB_CNT_TH			(0x90)
+#define CRU_CLKSEL_CON_BASE		0x100
+#define CRU_CLKSELS_CON(i)		(CRU_CLKSEL_CON_BASE + ((i) * 4))
+#define CRU_CLKGATE_CON_BASE		0x200
+#define CRU_CLKGATE_CON(i)		(CRU_CLKGATE_CON_BASE + ((i) * 4))
+#define CRU_CLKSFTRST_CON_BASE	0x300
+#define CRU_CLKSFTRST_CON(i)	(CRU_CLKSFTRST_CON_BASE + ((i) * 4))
+
+/* CRU_PLL_CON0 */
+#define PB(n)         ((0x1 << (15 + 16)) | ((n) << 15))
+#define POSTDIV1(n)   ((0x7 << (12 + 16)) | ((n) << 12))
+#define FBDIV(n)      ((0xFFF << 16) | (n))
+
+/* CRU_PLL_CON1 */
+#define RSTMODE(n)    ((0x1 << (15 + 16)) | ((n) << 15))
+#define RST(n)        ((0x1 << (14 + 16)) | ((n) << 14))
+#define PD(n)         ((0x1 << (13 + 16)) | ((n) << 13))
+#define DSMPD(n)      ((0x1 << (12 + 16)) | ((n) << 12))
+#define LOCK(n)       (((n) >> 10) & 0x1)
+#define POSTDIV2(n)   ((0x7 << (6 + 16)) | ((n) << 6))
+#define REFDIV(n)     ((0x3F << 16) | (n))
+
+union noc_ddrtiming {
+	u32 d32;
+	struct {
+		unsigned acttoact:6;
+		unsigned rdtomiss:6;
+		unsigned wrtomiss:6;
+		unsigned burstlen:3;
+		unsigned rdtowr:5;
+		unsigned wrtord:5;
+		unsigned bwratio:1;
+	} b;
+} NOC_TIMING_T;
+
+union noc_activate {
+	u32 d32;
+	struct {
+		unsigned rrd:4;
+		unsigned faw:6;
+		unsigned fawbank:1;
+		unsigned reserved1:21;
+	} b;
+};
+
+union noc_devtodev {
+	u32 d32;
+	struct {
+		unsigned busrdtord:2;
+		unsigned busrdtowr:2;
+		unsigned buswrtord:2;
+		unsigned reserved2:26;
+	} b;
+};
+
+union noc_ddr4timing {
+	u32 d32;
+	struct {
+		unsigned ccdl:3;
+		unsigned wrtordl:5;
+		unsigned rrdl:4;
+		unsigned reserved2:20;
+	} b;
+};
+
+union noc_ddrmode {
+	u32 d32;
+	struct {
+		unsigned autoprecharge:1;
+		unsigned bwratioextended:1;
+		unsigned reserved3:30;
+	} b;
+};
+
+u16 ddr_cfg_2_rbc[] = {
+	/***************************
+	* [5:4]  row(13+n)
+	* [3]    cs(0:0 cs, 1:2 cs)
+	* [2]  bank(0:0bank,1:8bank)
+	* [1:0]    col(11+n)
+	****************************/
+	/* row,        cs,       bank,   col */
+	((3 << 4) | (0 << 3) | (1 << 2) | 0),
+	((3 << 4) | (0 << 3) | (1 << 2) | 1),
+	((2 << 4) | (0 << 3) | (1 << 2) | 2),
+	((3 << 4) | (0 << 3) | (1 << 2) | 2),
+	((2 << 4) | (0 << 3) | (1 << 2) | 3),
+	((3 << 4) | (1 << 3) | (1 << 2) | 0),
+	((3 << 4) | (1 << 3) | (1 << 2) | 1),
+	((2 << 4) | (1 << 3) | (1 << 2) | 2),
+	((3 << 4) | (0 << 3) | (0 << 2) | 1),
+	((2 << 4) | (0 << 3) | (1 << 2) | 1),
+};
+
+u16 ddr4_cfg_2_rbc[] = {
+	/***************************
+	 * [6]	cs 0:0cs 1:2 cs
+	 * [5:3]  row(13+n)
+	 * [2]  cs(0:0 cs, 1:2 cs)
+	 * [1]  bw    0: 16bit 1:32bit
+	 * [0]  diebw 0:8bit 1:16bit
+	 ***************************/
+	/*  cs,       row,        cs,       bw,   diebw */
+	((0 << 6) | (3 << 3) | (0 << 2) | (1 << 1) | 0),
+	((1 << 6) | (2 << 3) | (0 << 2) | (1 << 1) | 0),
+	((0 << 6) | (4 << 3) | (0 << 2) | (0 << 1) | 0),
+	((1 << 6) | (3 << 3) | (0 << 2) | (0 << 1) | 0),
+	((0 << 6) | (4 << 3) | (0 << 2) | (1 << 1) | 1),
+	((1 << 6) | (3 << 3) | (0 << 2) | (1 << 1) | 1),
+	((1 << 6) | (4 << 3) | (0 << 2) | (0 << 1) | 1),
+	((0 << 6) | (2 << 3) | (1 << 2) | (1 << 1) | 0),
+	((0 << 6) | (3 << 3) | (1 << 2) | (0 << 1) | 0),
+	((0 << 6) | (3 << 3) | (1 << 2) | (1 << 1) | 1),
+	((0 << 6) | (4 << 3) | (1 << 2) | (0 << 1) | 1),
+};
+
+u32 addrmap[21][9] = {
+	/* map0  map1  map2  map3  map4  map5  map6  map7  map8 */
+	{22, 0x00070707, 0x00000000, 0x1f000000, 0x00001f1f, 0x06060606,
+		0x06060606, 0x00000f0f, 0x3f3f},
+	{23, 0x00080808, 0x00000000, 0x00000000, 0x00001f1f, 0x07070707,
+		0x07070707, 0x00000f0f, 0x3f3f},
+	{23, 0x00090909, 0x00000000, 0x00000000, 0x00001f00, 0x08080808,
+		0x0f080808, 0x00000f0f, 0x3f3f},
+	{24, 0x00090909, 0x00000000, 0x00000000, 0x00001f00, 0x08080808,
+		0x08080808, 0x00000f0f, 0x3f3f},
+	{24, 0x000a0a0a, 0x00000000, 0x00000000, 0x00000000, 0x09090909,
+		0x0f090909, 0x00000f0f, 0x3f3f},
+	{6, 0x00070707, 0x00000000, 0x1f000000, 0x00001f1f, 0x07070707,
+		0x07070707, 0x00000f0f, 0x3f3f},
+	{7, 0x00080808, 0x00000000, 0x00000000, 0x00001f1f, 0x08080808,
+		0x08080808, 0x00000f0f, 0x3f3f},
+	{8, 0x00090909, 0x00000000, 0x00000000, 0x00001f00, 0x09090909,
+		0x0f090909, 0x00000f0f, 0x3f3f},
+	{22, 0x001f0808, 0x00000000, 0x00000000, 0x00001f1f, 0x06060606,
+		0x06060606, 0x00000f0f, 0x3f3f},
+	{23, 0x00080808, 0x00000000, 0x00000000, 0x00001f1f, 0x07070707,
+		0x0f070707, 0x00000f0f, 0x3f3f},
+
+	{24, 0x003f0a0a, 0x01010100, 0x01010101, 0x00001f1f, 0x08080808,
+		0x08080808, 0x00000f0f, 0x0801},
+	{23, 0x003f0a0a, 0x01010100, 0x01010101, 0x00001f1f, 0x08080808,
+		0x0f080808, 0x00000f0f, 0x0801},
+	{24, 0x003f0909, 0x00000007, 0x1f000000, 0x00001f1f, 0x07070707,
+		0x07070707, 0x00000f07, 0x0700},
+	{23, 0x003f0909, 0x00000007, 0x1f000000, 0x00001f1f, 0x07070707,
+		0x07070707, 0x00000f0f, 0x0700},
+	{24, 0x003f0909, 0x01010100, 0x01010101, 0x00001f1f, 0x07070707,
+		0x07070707, 0x00000f07, 0x3f01},
+	{23, 0x003f0909, 0x01010100, 0x01010101, 0x00001f1f, 0x07070707,
+		0x07070707, 0x00000f0f, 0x3f01},
+	{24, 0x003f0808, 0x00000007, 0x1f000000, 0x00001f1f, 0x06060606,
+		0x06060606, 0x00000f06, 0x3f00},
+	{8, 0x003f0a0a, 0x01010100, 0x01010101, 0x00001f1f, 0x09090909,
+		0x0f090909, 0x00000f0f, 0x0801},
+	{7, 0x003f0909, 0x00000007, 0x1f000000, 0x00001f1f, 0x08080808,
+		0x08080808, 0x00000f0f, 0x0700},
+	{7, 0x003f0909, 0x01010100, 0x01010101, 0x00001f1f, 0x08080808,
+		0x08080808, 0x00000f0f, 0x3f01},
+
+	{6, 0x003f0808, 0x00000007, 0x1f000000, 0x00001f1f, 0x07070707,
+		0x07070707, 0x00000f07, 0x3f00}
+};
+
+struct rk3328_msch_timings {
+	union noc_ddrtiming ddrtiming;
+	union noc_ddrmode ddrmode;
+	u32 readlatency;
+	union noc_activate activate;
+	union noc_devtodev devtodev;
+	union noc_ddr4timing ddr4timing;
+	u32 agingx0;
+};
+
+struct rk3328_msch_regs {
+	u32 coreid;
+	u32 revisionid;
+	u32 ddrconf;
+	u32 ddrtiming;
+	u32 ddrmode;
+	u32 readlatency;
+	u32 aging0;
+	u32 aging1;
+	u32 aging2;
+	u32 aging3;
+	u32 aging4;
+	u32 aging5;
+	u32 reserved[2];
+	u32 activate;
+	u32 devtodev;
+	u32 ddr4_timing;
+};
+
+struct rk3328_ddr_grf_regs {
+	u32 ddr_grf_con[4];
+	u32 reserved[(0x100 - 0x10) / 4];
+	u32 ddr_grf_status[11];
+};
+
+struct rk3328_ddr_pctl_regs {
+	u32 pctl[30][2];
+};
+
+struct rk3328_ddr_phy_regs {
+	u32 phy[5][2];
+};
+
+struct rk3328_ddr_skew {
+	u32 a0_a1_skew[15];
+	u32 cs0_dm0_skew[11];
+	u32 cs0_dm1_skew[11];
+	u32 cs0_dm2_skew[11];
+	u32 cs0_dm3_skew[11];
+	u32 cs1_dm0_skew[11];
+	u32 cs1_dm1_skew[11];
+	u32 cs1_dm2_skew[11];
+	u32 cs1_dm3_skew[11];
+};
+
+struct rk3328_sdram_channel {
+	unsigned int rank;
+	unsigned int col;
+	/* 3:8bank, 2:4bank */
+	unsigned int bk;
+	/* channel buswidth, 2:32bit, 1:16bit, 0:8bit */
+	unsigned int bw;
+	/* die buswidth, 2:32bit, 1:16bit, 0:8bit */
+	unsigned int dbw;
+	unsigned int row_3_4;
+	unsigned int cs0_row;
+	unsigned int cs1_row;
+	unsigned int ddrconfig;
+	struct rk3328_msch_timings noc_timings;
+};
+
+struct rk3328_sdram_params {
+	struct rk3328_sdram_channel ch;
+	unsigned int ddr_freq;
+	unsigned int dramtype;
+	unsigned int odt;
+	struct rk3328_ddr_pctl_regs pctl_regs;
+	struct rk3328_ddr_phy_regs phy_regs;
+	struct rk3328_ddr_skew skew;
+};
+
+#define PHY_REG(base, n)		(base + 4 * (n))
+
+#endif
diff --git a/drivers/ram/rockchip/sdram_rk3328.c b/drivers/ram/rockchip/sdram_rk3328.c
index 9637a35e23..863b1202b7 100644
--- a/drivers/ram/rockchip/sdram_rk3328.c
+++ b/drivers/ram/rockchip/sdram_rk3328.c
@@ -3,23 +3,988 @@
  *
  * SPDX-License-Identifier:     GPL-2.0
  */
-
 #include <common.h>
+#include <clk.h>
+#include <debug_uart.h>
 #include <dm.h>
+#include <dt-structs.h>
 #include <ram.h>
+#include <regmap.h>
 #include <syscon.h>
+#include <asm/io.h>
 #include <asm/arch/clock.h>
+#include <asm/arch/cru_rk3328.h>
 #include <asm/arch/grf_rk3328.h>
 #include <asm/arch/sdram_common.h>
+#include <asm/arch/sdram_rk3328.h>
+#include <asm/arch/uart.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 struct dram_info {
+#ifdef CONFIG_TPL_BUILD
+	struct rk3328_ddr_pctl_regs *pctl;
+	struct rk3328_ddr_phy_regs *phy;
+	struct clk ddr_clk;
+	struct rk3328_cru *cru;
+	struct rk3328_msch_regs *msch;
+	struct rk3328_ddr_grf_regs *ddr_grf;
+#endif
 	struct ram_info info;
 	struct rk3328_grf_regs *grf;
 };
 
+#ifdef CONFIG_TPL_BUILD
+
+struct rk3328_sdram_channel sdram_ch;
+
+struct rockchip_dmc_plat {
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+	struct dtd_rockchip_rk3328_dmc dtplat;
+#else
+	struct rk3328_sdram_params sdram_params;
+#endif
+	struct regmap *map;
+};
+
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+static int conv_of_platdata(struct udevice *dev)
+{
+	struct rockchip_dmc_plat *plat = dev_get_platdata(dev);
+	struct dtd_rockchip_rk3328_dmc *dtplat = &plat->dtplat;
+	int ret;
+
+	ret = regmap_init_mem_platdata(dev, dtplat->reg,
+				       ARRAY_SIZE(dtplat->reg) / 2,
+				       &plat->map);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+#endif
+
+static void rkclk_ddr_reset(struct dram_info *dram,
+			    u32 ctl_srstn, u32 ctl_psrstn,
+			    u32 phy_srstn, u32 phy_psrstn)
+{
+	writel(ddrctrl_srstn_req(ctl_srstn) | ddrctrl_psrstn_req(ctl_psrstn) |
+		ddrphy_srstn_req(phy_srstn) | ddrphy_psrstn_req(phy_psrstn),
+		&dram->cru->softrst_con[5]);
+	writel(ddrctrl_asrstn_req(ctl_srstn), &dram->cru->softrst_con[9]);
+}
+
+static void rkclk_set_dpll(struct dram_info *dram, unsigned int mhz)
+{
+	unsigned int refdiv, postdiv1, postdiv2, fbdiv;
+	int delay = 1000;
+
+	refdiv = 1;
+	if (mhz <= 300) {
+		postdiv1 = 4;
+		postdiv2 = 2;
+	} else if (mhz <= 400) {
+		postdiv1 = 6;
+		postdiv2 = 1;
+	} else if (mhz <= 600) {
+		postdiv1 = 4;
+		postdiv2 = 1;
+	} else if (mhz <= 800) {
+		postdiv1 = 3;
+		postdiv2 = 1;
+	} else if (mhz <= 1600) {
+		postdiv1 = 2;
+		postdiv2 = 1;
+	} else {
+		postdiv1 = 1;
+		postdiv2 = 1;
+	}
+	fbdiv = (mhz * refdiv * postdiv1 * postdiv2) / 24;
+
+	writel(((0x1 << 4) << 16) | (0 << 4), &dram->cru->mode_con);
+	writel(POSTDIV1(postdiv1) | FBDIV(fbdiv), &dram->cru->dpll_con[0]);
+	writel(DSMPD(1) | POSTDIV2(postdiv2) | REFDIV(refdiv),
+	       &dram->cru->dpll_con[1]);
+
+	while (delay > 0) {
+		udelay(1);
+		if (LOCK(readl(&dram->cru->dpll_con[1])))
+			break;
+		delay--;
+	}
+
+	writel(((0x1 << 4) << 16) | (1 << 4), &dram->cru->mode_con);
+}
+
+static void rkclk_configure_ddr(struct dram_info *dram,
+				struct rk3328_sdram_params *sdram_params)
+{
+	void __iomem *phy_base = dram->phy;
+
+	/* choose DPLL for ddr clk source */
+	clrbits_le32(PHY_REG(phy_base, 0xef), 1 << 7);
+
+	/* for inno ddr phy need 2*freq */
+	rkclk_set_dpll(dram,  sdram_params->ddr_freq * 2);
+}
+
+static void phy_soft_reset(struct dram_info *dram)
+{
+	void __iomem *phy_base = dram->phy;
+
+	clrbits_le32(PHY_REG(phy_base, 0), 0x3 << 2);
+	udelay(1);
+	setbits_le32(PHY_REG(phy_base, 0), ANALOG_DERESET);
+	udelay(5);
+	setbits_le32(PHY_REG(phy_base, 0), DIGITAL_DERESET);
+	udelay(1);
+}
+
+static int pctl_cfg(struct dram_info *dram,
+		    struct rk3328_sdram_params *sdram_params)
+{
+	u32 i;
+	void __iomem *pctl_base = dram->pctl;
+
+	for (i = 0; sdram_params->pctl_regs.pctl[i][0] != 0xFFFFFFFF; i++) {
+		writel(sdram_params->pctl_regs.pctl[i][1],
+		       pctl_base + sdram_params->pctl_regs.pctl[i][0]);
+	}
+	clrsetbits_le32(pctl_base + DDR_PCTL2_PWRTMG,
+			(0xff << 16) | 0x1f,
+			((SR_IDLE & 0xff) << 16) | (PD_IDLE & 0x1f));
+	/*
+	 * dfi_lp_en_pd=1,dfi_lp_wakeup_pd=2
+	 * hw_lp_idle_x32=1
+	 */
+	if (sdram_params->dramtype == LPDDR3) {
+		setbits_le32(pctl_base + DDR_PCTL2_DFILPCFG0, 1);
+		clrsetbits_le32(pctl_base + DDR_PCTL2_DFILPCFG0,
+				0xf << 4,
+				2 << 4);
+	}
+	clrsetbits_le32(pctl_base + DDR_PCTL2_HWLPCTL,
+			0xfff << 16,
+			1 << 16);
+	/* disable zqcs */
+	setbits_le32(pctl_base + DDR_PCTL2_ZQCTL0, 1u << 31);
+	setbits_le32(pctl_base + 0x2000 + DDR_PCTL2_ZQCTL0, 1u << 31);
+
+	return 0;
+}
+
+/* return ddrconfig value
+ *       (-1), find ddrconfig fail
+ *       other, the ddrconfig value
+ * only support cs0_row >= cs1_row
+ */
+static unsigned int calculate_ddrconfig(
+	struct rk3328_sdram_params *sdram_params)
+{
+	u32 cs, bw, die_bw, col, row, bank;
+	u32 i, tmp;
+	u32 ddrconf = -1;
+
+	cs = sdram_ch.rank;
+	bw = sdram_ch.bw;
+	die_bw = sdram_ch.dbw;
+	col = sdram_ch.col;
+	row = sdram_ch.cs0_row;
+	bank = sdram_ch.bk;
+
+	if (sdram_params->dramtype == DDR4) {
+		tmp = ((cs - 1) << 6) | ((row - 13) << 3) | (bw & 0x2) | die_bw;
+		for (i = 10; i < 17; i++) {
+			if (((tmp & 0x7) == (ddr4_cfg_2_rbc[i - 10] & 0x7)) &&
+			    ((tmp & 0x3c) <= (ddr4_cfg_2_rbc[i - 10] & 0x3c)) &&
+			    ((tmp & 0x40) <= (ddr4_cfg_2_rbc[i - 10] & 0x40))) {
+				ddrconf = i;
+				goto out;
+			}
+		}
+	} else {
+		if (bank == 2) {
+			ddrconf = 8;
+			goto out;
+		}
+
+		tmp = ((row - 13) << 4) | (1 << 2) | ((bw + col - 11) << 0);
+		for (i = 0; i < 5; i++)
+			if (((tmp & 0xf) == (ddr_cfg_2_rbc[i] & 0xf)) &&
+			    ((tmp & 0x30) <= (ddr_cfg_2_rbc[i] & 0x30))) {
+				ddrconf = i;
+				goto out;
+			}
+	}
+
+out:
+	if (ddrconf > 20)
+		printf("calculate_ddrconfig error\n");
+
+	return ddrconf;
+}
+
+/* n: Unit bytes */
+static void copy_to_reg(u32 *dest, u32 *src, u32 n)
+{
+	int i;
+
+	for (i = 0; i < n / sizeof(u32); i++) {
+		writel(*src, dest);
+		src++;
+		dest++;
+	}
+}
+
+/*******
+ * calculate controller dram address map, and setting to register.
+ * argument sdram_ch.ddrconf must be right value before
+ * call this function.
+ *******/
+static void set_ctl_address_map(struct dram_info *dram,
+				struct rk3328_sdram_params *sdram_params)
+{
+	void __iomem *pctl_base = dram->pctl;
+
+	copy_to_reg((u32 *)(pctl_base + DDR_PCTL2_ADDRMAP0),
+		    &addrmap[sdram_ch.ddrconfig][0], 9 * 4);
+	if ((sdram_params->dramtype == LPDDR3) && (sdram_ch.row_3_4))
+		setbits_le32(pctl_base + DDR_PCTL2_ADDRMAP6, 1 << 31);
+	if ((sdram_params->dramtype == DDR4) && (sdram_ch.bw == 0x1))
+		setbits_le32(pctl_base + DDR_PCTL2_PCCFG, 1 << 8);
+
+	if (sdram_ch.rank == 1)
+		clrsetbits_le32(pctl_base + DDR_PCTL2_ADDRMAP0, 0x1f, 0x1f);
+}
+
+static void phy_dll_bypass_set(struct dram_info *dram, u32 freq)
+{
+	u32 tmp;
+	void __iomem *phy_base = dram->phy;
+
+	setbits_le32(PHY_REG(phy_base, 0x13), 1 << 4);
+	clrbits_le32(PHY_REG(phy_base, 0x14), 1 << 3);
+	setbits_le32(PHY_REG(phy_base, 0x26), 1 << 4);
+	clrbits_le32(PHY_REG(phy_base, 0x27), 1 << 3);
+	setbits_le32(PHY_REG(phy_base, 0x36), 1 << 4);
+	clrbits_le32(PHY_REG(phy_base, 0x37), 1 << 3);
+	setbits_le32(PHY_REG(phy_base, 0x46), 1 << 4);
+	clrbits_le32(PHY_REG(phy_base, 0x47), 1 << 3);
+	setbits_le32(PHY_REG(phy_base, 0x56), 1 << 4);
+	clrbits_le32(PHY_REG(phy_base, 0x57), 1 << 3);
+
+	if (freq <= (400 * MHz))
+		/* DLL bypass */
+		setbits_le32(PHY_REG(phy_base, 0xa4), 0x1f);
+	else
+		clrbits_le32(PHY_REG(phy_base, 0xa4), 0x1f);
+	if (freq <= (680 * MHz))
+		tmp = 2;
+	else
+		tmp = 1;
+	writel(tmp, PHY_REG(phy_base, 0x28));
+	writel(tmp, PHY_REG(phy_base, 0x38));
+	writel(tmp, PHY_REG(phy_base, 0x48));
+	writel(tmp, PHY_REG(phy_base, 0x58));
+}
+
+static void set_ds_odt(struct dram_info *dram,
+		       struct rk3328_sdram_params *sdram_params)
+{
+	u32 cmd_drv, clk_drv, dqs_drv, dqs_odt;
+	void __iomem *phy_base = dram->phy;
+
+	if (sdram_params->dramtype == DDR3) {
+		cmd_drv = PHY_DDR3_RON_RTT_34ohm;
+		clk_drv = PHY_DDR3_RON_RTT_45ohm;
+		dqs_drv = PHY_DDR3_RON_RTT_34ohm;
+		dqs_odt = PHY_DDR3_RON_RTT_225ohm;
+	} else {
+		cmd_drv = PHY_DDR4_LPDDR3_RON_RTT_34ohm;
+		clk_drv = PHY_DDR4_LPDDR3_RON_RTT_43ohm;
+		dqs_drv = PHY_DDR4_LPDDR3_RON_RTT_34ohm;
+		dqs_odt = PHY_DDR4_LPDDR3_RON_RTT_240ohm;
+	}
+	/* DS */
+	writel(cmd_drv, PHY_REG(phy_base, 0x11));
+	clrsetbits_le32(PHY_REG(phy_base, 0x12), 0x1f << 3, cmd_drv << 3);
+	writel(clk_drv, PHY_REG(phy_base, 0x16));
+	writel(clk_drv, PHY_REG(phy_base, 0x18));
+	writel(dqs_drv, PHY_REG(phy_base, 0x20));
+	writel(dqs_drv, PHY_REG(phy_base, 0x2f));
+	writel(dqs_drv, PHY_REG(phy_base, 0x30));
+	writel(dqs_drv, PHY_REG(phy_base, 0x3f));
+	writel(dqs_drv, PHY_REG(phy_base, 0x40));
+	writel(dqs_drv, PHY_REG(phy_base, 0x4f));
+	writel(dqs_drv, PHY_REG(phy_base, 0x50));
+	writel(dqs_drv, PHY_REG(phy_base, 0x5f));
+	/* ODT */
+	writel(dqs_odt, PHY_REG(phy_base, 0x21));
+	writel(dqs_odt, PHY_REG(phy_base, 0x2e));
+	writel(dqs_odt, PHY_REG(phy_base, 0x31));
+	writel(dqs_odt, PHY_REG(phy_base, 0x3e));
+	writel(dqs_odt, PHY_REG(phy_base, 0x41));
+	writel(dqs_odt, PHY_REG(phy_base, 0x4e));
+	writel(dqs_odt, PHY_REG(phy_base, 0x51));
+	writel(dqs_odt, PHY_REG(phy_base, 0x5e));
+}
+
+static void phy_cfg(struct dram_info *dram,
+		    struct rk3328_sdram_params *sdram_params)
+{
+	u32 i;
+	void __iomem *phy_base = dram->phy;
+
+	phy_dll_bypass_set(dram, sdram_params->ddr_freq);
+	for (i = 0; sdram_params->phy_regs.phy[i][0] != 0xFFFFFFFF; i++) {
+		writel(sdram_params->phy_regs.phy[i][1],
+		       phy_base + sdram_params->phy_regs.phy[i][0]);
+	}
+	if (sdram_ch.bw == 2) {
+		clrsetbits_le32(PHY_REG(phy_base, 0), 0xf << 4, 0xf << 4);
+	} else {
+		clrsetbits_le32(PHY_REG(phy_base, 0), 0xf << 4, 3 << 4);
+		/* disable DQS2,DQS3 tx dll  for saving power */
+		clrbits_le32(PHY_REG(phy_base, 0x46), 1 << 3);
+		clrbits_le32(PHY_REG(phy_base, 0x56), 1 << 3);
+	}
+	set_ds_odt(dram, sdram_params);
+	/* deskew */
+	setbits_le32(PHY_REG(phy_base, 2), 8);
+	copy_to_reg(PHY_REG(phy_base, 0xb0),
+		    &sdram_params->skew.a0_a1_skew[0], 15 * 4);
+	copy_to_reg(PHY_REG(phy_base, 0x70),
+		    &sdram_params->skew.cs0_dm0_skew[0], 44 * 4);
+	copy_to_reg(PHY_REG(phy_base, 0xc0),
+		    &sdram_params->skew.cs0_dm1_skew[0], 44 * 4);
+}
+
+static int update_refresh_reg(struct dram_info *dram)
+{
+	void __iomem *pctl_base = dram->pctl;
+	u32 ret;
+
+	ret = readl(pctl_base + DDR_PCTL2_RFSHCTL3) ^ (1 << 1);
+	writel(ret, pctl_base + DDR_PCTL2_RFSHCTL3);
+
+	return 0;
+}
+
+static int data_training(struct dram_info *dram, u32 cs, u32 dramtype)
+{
+	u32 ret;
+	u32 dis_auto_zq = 0;
+	void __iomem *pctl_base = dram->pctl;
+	void __iomem *phy_base = dram->phy;
+
+	/* disable zqcs */
+	if (!(readl(pctl_base + DDR_PCTL2_ZQCTL0) &
+		(1ul << 31))) {
+		dis_auto_zq = 1;
+		setbits_le32(pctl_base + DDR_PCTL2_ZQCTL0, 1 << 31);
+	}
+	/* disable auto refresh */
+	setbits_le32(pctl_base + DDR_PCTL2_RFSHCTL3, 1);
+	update_refresh_reg(dram);
+
+	if (dramtype == DDR4) {
+		clrsetbits_le32(PHY_REG(phy_base, 0x29), 0x3, 0);
+		clrsetbits_le32(PHY_REG(phy_base, 0x39), 0x3, 0);
+		clrsetbits_le32(PHY_REG(phy_base, 0x49), 0x3, 0);
+		clrsetbits_le32(PHY_REG(phy_base, 0x59), 0x3, 0);
+	}
+	/* choose training cs */
+	clrsetbits_le32(PHY_REG(phy_base, 2), 0x33, (0x20 >> cs));
+	/* enable gate training */
+	clrsetbits_le32(PHY_REG(phy_base, 2), 0x33, (0x20 >> cs) | 1);
+	udelay(50);
+	ret = readl(PHY_REG(phy_base, 0xff));
+	/* disable gate training */
+	clrsetbits_le32(PHY_REG(phy_base, 2), 0x33, (0x20 >> cs) | 0);
+	/* restore zqcs */
+	if (dis_auto_zq)
+		clrbits_le32(pctl_base + DDR_PCTL2_ZQCTL0, 1 << 31);
+	/* restore auto refresh */
+	clrbits_le32(pctl_base + DDR_PCTL2_RFSHCTL3, 1);
+	update_refresh_reg(dram);
+
+	if (dramtype == DDR4) {
+		clrsetbits_le32(PHY_REG(phy_base, 0x29), 0x3, 0x2);
+		clrsetbits_le32(PHY_REG(phy_base, 0x39), 0x3, 0x2);
+		clrsetbits_le32(PHY_REG(phy_base, 0x49), 0x3, 0x2);
+		clrsetbits_le32(PHY_REG(phy_base, 0x59), 0x3, 0x2);
+	}
+
+	if (ret & 0x10) {
+		ret = -1;
+	} else {
+		ret = (ret & 0xf) ^ (readl(PHY_REG(phy_base, 0)) >> 4);
+		ret = (ret == 0) ? 0 : -1;
+	}
+	return ret;
+}
+
+/* rank = 1: cs0
+ * rank = 2: cs1
+ * rank = 3: cs0 & cs1
+ * note: be careful of keep mr original val
+ */
+static int write_mr(struct dram_info *dram, u32 rank, u32 mr_num, u32 arg,
+		    u32 dramtype)
+{
+	void __iomem *pctl_base = dram->pctl;
+
+	while (readl(pctl_base + DDR_PCTL2_MRSTAT) & MR_WR_BUSY)
+		continue;
+	if ((dramtype == DDR3) || (dramtype == DDR4)) {
+		writel((mr_num << 12) | (rank << 4) | (0 << 0),
+		       pctl_base + DDR_PCTL2_MRCTRL0);
+		writel(arg, pctl_base + DDR_PCTL2_MRCTRL1);
+	} else {
+		writel((rank << 4) | (0 << 0),
+		       pctl_base + DDR_PCTL2_MRCTRL0);
+		writel((mr_num << 8) | (arg & 0xff),
+		       pctl_base + DDR_PCTL2_MRCTRL1);
+	}
+
+	setbits_le32(pctl_base + DDR_PCTL2_MRCTRL0, 1u << 31);
+	while (readl(pctl_base + DDR_PCTL2_MRCTRL0) & (1u << 31))
+		continue;
+	while (readl(pctl_base + DDR_PCTL2_MRSTAT) & MR_WR_BUSY)
+		continue;
+
+	return 0;
+}
+
+/*
+ * rank : 1:cs0, 2:cs1, 3:cs0&cs1
+ * vrefrate: 4500: 45%,
+ */
+static int write_vrefdq(struct dram_info *dram, u32 rank, u32 vrefrate,
+			u32 dramtype)
+{
+	u32 tccd_l, value;
+	u32 dis_auto_zq = 0;
+	void __iomem *pctl_base = dram->pctl;
+
+	if ((dramtype != DDR4) || (vrefrate < 4500) ||
+	    (vrefrate > 9200))
+		return -1;
+
+	tccd_l = (readl(pctl_base + DDR_PCTL2_DRAMTMG4) >> 16) & 0xf;
+	tccd_l = (tccd_l - 4) << 10;
+
+	if (vrefrate > 7500) {
+		/* range 1 */
+		value = ((vrefrate - 6000) / 65) | tccd_l;
+	} else {
+		/* range 2 */
+		value = ((vrefrate - 4500) / 65) | tccd_l | (1 << 6);
+	}
+
+	/* disable zqcs */
+	if (!(readl(pctl_base + DDR_PCTL2_ZQCTL0) &
+		(1ul << 31))) {
+		dis_auto_zq = 1;
+		setbits_le32(pctl_base + DDR_PCTL2_ZQCTL0, 1 << 31);
+	}
+	/* disable auto refresh */
+	setbits_le32(pctl_base + DDR_PCTL2_RFSHCTL3, 1);
+	update_refresh_reg(dram);
+
+	/* enable vrefdq calibratin */
+	write_mr(dram, rank, 6, value | (1 << 7), dramtype);
+	udelay(1);/* tvrefdqe */
+	/* write vrefdq value */
+	write_mr(dram, rank, 6, value | (1 << 7), dramtype);
+	udelay(1);/* tvref_time */
+	write_mr(dram, rank, 6, value | (0 << 7), dramtype);
+	udelay(1);/* tvrefdqx */
+
+	/* restore zqcs */
+	if (dis_auto_zq)
+		clrbits_le32(pctl_base + DDR_PCTL2_ZQCTL0, 1 << 31);
+	/* restore auto refresh */
+	clrbits_le32(pctl_base + DDR_PCTL2_RFSHCTL3, 1);
+	update_refresh_reg(dram);
+
+	return 0;
+}
+
+#define _MAX_(x, y) (x > y ? x : y)
+
+static void rx_deskew_switch_adjust(struct dram_info *dram)
+{
+	u32 i, deskew_val;
+	u32 gate_val = 0;
+	void __iomem *phy_base = dram->phy;
+
+	for (i = 0; i < 4; i++)
+		gate_val = _MAX_(readl(PHY_REG(phy_base, 0xfb + i)), gate_val);
+
+	deskew_val = (gate_val >> 3) + 1;
+	deskew_val = (deskew_val > 0x1f) ? 0x1f : deskew_val;
+	clrsetbits_le32(PHY_REG(phy_base, 0x6e), 0xc, (deskew_val & 0x3) << 2);
+	clrsetbits_le32(PHY_REG(phy_base, 0x6f), 0x7 << 4,
+			(deskew_val & 0x1c) << 2);
+}
+
+static void tx_deskew_switch_adjust(struct dram_info *dram)
+{
+	void __iomem *phy_base = dram->phy;
+
+	clrsetbits_le32(PHY_REG(phy_base, 0x6e), 0x3, 1);
+}
+
+static void set_ddrconfig(struct dram_info *dram, u32 ddrconfig)
+{
+	writel(ddrconfig, &dram->msch->ddrconf);
+}
+
+static void dram_all_config(struct dram_info *dram,
+			    struct rk3328_sdram_params *sdram_params)
+{
+	u32 sys_reg = 0;
+
+	set_ddrconfig(dram, sdram_ch.ddrconfig);
+
+	sys_reg |= SYS_REG_ENC_DDRTYPE(sdram_params->dramtype);
+	sys_reg |= SYS_REG_ENC_ROW_3_4(sdram_ch.row_3_4);
+	sys_reg |= SYS_REG_ENC_RANK(sdram_ch.rank);
+	sys_reg |= SYS_REG_ENC_COL(sdram_ch.col);
+	sys_reg |= SYS_REG_ENC_BK(sdram_ch.bk);
+	sys_reg |= SYS_REG_ENC_CS0_ROW(sdram_ch.cs0_row);
+	if (sdram_ch.cs1_row)
+		sys_reg |= SYS_REG_ENC_CS1_ROW(sdram_ch.cs1_row);
+	sys_reg |= SYS_REG_ENC_BW(sdram_ch.bw);
+	sys_reg |= SYS_REG_ENC_DBW(sdram_ch.dbw);
+
+	writel(sys_reg, &dram->grf->os_reg[2]);
+
+	writel(sdram_ch.noc_timings.ddrtiming.d32, &dram->msch->ddrtiming);
+
+	writel(sdram_ch.noc_timings.ddrmode.d32, &dram->msch->ddrmode);
+	writel(sdram_ch.noc_timings.readlatency, &dram->msch->readlatency);
+
+	writel(sdram_ch.noc_timings.activate.d32, &dram->msch->activate);
+	writel(sdram_ch.noc_timings.devtodev.d32, &dram->msch->devtodev);
+	writel(sdram_ch.noc_timings.ddr4timing.d32, &dram->msch->ddr4_timing);
+	writel(sdram_ch.noc_timings.agingx0, &dram->msch->aging0);
+	writel(sdram_ch.noc_timings.agingx0, &dram->msch->aging1);
+	writel(sdram_ch.noc_timings.agingx0, &dram->msch->aging2);
+	writel(sdram_ch.noc_timings.agingx0, &dram->msch->aging3);
+	writel(sdram_ch.noc_timings.agingx0, &dram->msch->aging4);
+	writel(sdram_ch.noc_timings.agingx0, &dram->msch->aging5);
+}
+
+static void enable_low_power(struct dram_info *dram,
+			     struct rk3328_sdram_params *sdram_params)
+{
+	void __iomem *pctl_base = dram->pctl;
+
+	/* enable upctl2 axi clock auto gating */
+	writel(0x00800000, &dram->ddr_grf->ddr_grf_con[0]);
+	writel(0x20012001, &dram->ddr_grf->ddr_grf_con[2]);
+	/* enable upctl2 core clock auto gating */
+	writel(0x001e001a, &dram->ddr_grf->ddr_grf_con[2]);
+	/* enable sr, pd */
+	if (PD_IDLE == 0)
+		clrbits_le32(pctl_base + DDR_PCTL2_PWRCTL, (1 << 1));
+	else
+		setbits_le32(pctl_base + DDR_PCTL2_PWRCTL, (1 << 1));
+	if (SR_IDLE == 0)
+		clrbits_le32(pctl_base + DDR_PCTL2_PWRCTL,	1);
+	else
+		setbits_le32(pctl_base + DDR_PCTL2_PWRCTL, 1);
+	setbits_le32(pctl_base + DDR_PCTL2_PWRCTL, (1 << 3));
+}
+
+static int sdram_init(struct dram_info *dram,
+		      struct rk3328_sdram_params *sdram_params, u32 pre_init)
+{
+	void __iomem *pctl_base = dram->pctl;
+
+	rkclk_ddr_reset(dram, 1, 1, 1, 1);
+	udelay(10);
+	/*
+	 * dereset ddr phy psrstn to config pll,
+	 * if using phy pll psrstn must be dereset
+	 * before config pll
+	 */
+	rkclk_ddr_reset(dram, 1, 1, 1, 0);
+	rkclk_configure_ddr(dram, sdram_params);
+	if (pre_init == 0) {
+		switch (sdram_params->dramtype) {
+		case DDR3:
+			printf("DDR3\n");
+			break;
+		case DDR4:
+			printf("DDR4\n");
+			break;
+		case LPDDR3:
+		default:
+			printf("LPDDR3\n");
+			break;
+		}
+	}
+	/* release phy srst to provide clk to ctrl */
+	rkclk_ddr_reset(dram, 1, 1, 0, 0);
+	udelay(10);
+	phy_soft_reset(dram);
+	/* release ctrl presetn, and config ctl registers */
+	rkclk_ddr_reset(dram, 1, 0, 0, 0);
+	pctl_cfg(dram, sdram_params);
+	sdram_ch.ddrconfig = calculate_ddrconfig(sdram_params);
+	set_ctl_address_map(dram, sdram_params);
+	phy_cfg(dram, sdram_params);
+
+	/* enable dfi_init_start to init phy after ctl srstn deassert */
+	setbits_le32(pctl_base + DDR_PCTL2_DFIMISC, (1 << 5) | (1 << 4));
+	rkclk_ddr_reset(dram, 0, 0, 0, 0);
+	/* wait for dfi_init_done and dram init complete */
+	while ((readl(pctl_base + DDR_PCTL2_STAT) & 0x7) == 0)
+		continue;
+
+	/* do ddr gate training */
+	if (data_training(dram, 0, sdram_params->dramtype) != 0) {
+		printf("data training error\n");
+		return -1;
+	}
+
+	if (sdram_params->dramtype == DDR4)
+		write_vrefdq(dram, 0x3, 5670, sdram_params->dramtype);
+
+	if (pre_init == 0) {
+		rx_deskew_switch_adjust(dram);
+		tx_deskew_switch_adjust(dram);
+	}
+
+	dram_all_config(dram, sdram_params);
+	enable_low_power(dram, sdram_params);
+
+	return 0;
+}
+
+static u64 dram_detect_cap(struct dram_info *dram,
+			   struct rk3328_sdram_params *sdram_params,
+			   unsigned char channel)
+{
+	void __iomem *pctl_base = dram->pctl;
+
+	/*
+	 * for ddr3: ddrconf = 3
+	 * for ddr4: ddrconf = 12
+	 * for lpddr3: ddrconf = 3
+	 * default bw = 1
+	 */
+	u32 bk, bktmp;
+	u32 col, coltmp;
+	u32 row, rowtmp, row_3_4;
+	void __iomem *test_addr, *test_addr1;
+	u32 dbw;
+	u32 cs;
+	u32 bw = 1;
+	u64 cap = 0;
+	u32 dram_type = sdram_params->dramtype;
+	u32 pwrctl;
+
+	if (dram_type != DDR4) {
+		/* detect col and bk for ddr3/lpddr3 */
+		coltmp = 12;
+		bktmp = 3;
+		rowtmp = 16;
+
+		for (col = coltmp; col >= 9; col -= 1) {
+			writel(0, SDRAM_ADDR);
+			test_addr = (void __iomem *)(SDRAM_ADDR +
+					(1ul << (col + bw - 1ul)));
+			writel(PATTERN, test_addr);
+			if ((readl(test_addr) == PATTERN) &&
+			    (readl(SDRAM_ADDR) == 0))
+				break;
+		}
+		if (col == 8) {
+			printf("col error\n");
+			goto cap_err;
+		}
+
+		test_addr = (void __iomem *)(SDRAM_ADDR +
+				(1ul << (coltmp + bktmp + bw - 1ul)));
+		writel(0, SDRAM_ADDR);
+		writel(PATTERN, test_addr);
+		if ((readl(test_addr) == PATTERN) &&
+		    (readl(SDRAM_ADDR) == 0))
+			bk = 3;
+		else
+			bk = 2;
+		if (dram_type == LPDDR3)
+			dbw = 2;
+		else
+			dbw = 1;
+	} else {
+		/* detect bg for ddr4 */
+		coltmp = 10;
+		bktmp = 4;
+		rowtmp = 17;
+
+		col = 10;
+		bk = 2;
+		test_addr = (void __iomem *)(SDRAM_ADDR +
+				(1ul << (coltmp + bw + 1ul)));
+		writel(0, SDRAM_ADDR);
+		writel(PATTERN, test_addr);
+		if ((readl(test_addr) == PATTERN) &&
+		    (readl(SDRAM_ADDR) == 0))
+			dbw = 0;
+		else
+			dbw = 1;
+	}
+	/* detect row */
+	for (row = rowtmp; row > 12; row--) {
+		writel(0, SDRAM_ADDR);
+		test_addr = (void __iomem *)(SDRAM_ADDR +
+				(1ul << (row + bktmp + coltmp + bw - 1ul)));
+		writel(PATTERN, test_addr);
+		if ((readl(test_addr) == PATTERN) &&
+		    (readl(SDRAM_ADDR) == 0))
+			break;
+	}
+	if (row == 12) {
+		printf("row error");
+		goto cap_err;
+	}
+	/* detect row_3_4 */
+	test_addr = SDRAM_ADDR;
+	test_addr1 = (void __iomem *)(SDRAM_ADDR +
+			(0x3ul << (row + bktmp + coltmp + bw - 1ul - 1ul)));
+
+	writel(0, test_addr);
+	writel(PATTERN, test_addr1);
+	if ((readl(test_addr) == 0) &&
+	    (readl(test_addr1) == PATTERN))
+		row_3_4 = 0;
+	else
+		row_3_4 = 1;
+
+	/* disable auto low-power */
+	pwrctl = readl(pctl_base + DDR_PCTL2_PWRCTL);
+	writel(0, pctl_base + DDR_PCTL2_PWRCTL);
+
+	/* bw and cs detect using phy read gate training */
+	if (data_training(dram, 1, dram_type) == 0)
+		cs = 1;
+	else
+		cs = 0;
+
+	bw = 2;
+
+	/* restore auto low-power */
+	writel(pwrctl, pctl_base + DDR_PCTL2_PWRCTL);
+
+	sdram_ch.rank = cs + 1;
+	sdram_ch.col = col;
+	sdram_ch.bk = bk;
+	sdram_ch.dbw = dbw;
+	sdram_ch.bw = bw;
+	sdram_ch.cs0_row = row;
+	if (cs)
+		sdram_ch.cs1_row = row;
+	else
+		sdram_ch.cs1_row = 0;
+	sdram_ch.row_3_4 = row_3_4;
+
+	if (dram_type == DDR4)
+		cap = 1llu << (cs + row + bk + col + ((dbw == 0) ? 2 : 1) + bw);
+	else
+		cap = 1llu << (cs + row + bk + col + bw);
+
+	return cap;
+
+cap_err:
+	return 0;
+}
+
+static u32 remodify_sdram_params(struct rk3328_sdram_params *sdram_params)
+{
+	u32 tmp = 0, tmp_adr = 0, i;
+
+	for (i = 0; sdram_params->pctl_regs.pctl[i][0] != 0xFFFFFFFF; i++) {
+		if (sdram_params->pctl_regs.pctl[i][0] == 0) {
+			tmp = sdram_params->pctl_regs.pctl[i][1];/* MSTR */
+			tmp_adr = i;
+		}
+	}
+
+	tmp &= ~((3ul << 30) | (3ul << 24) | (3ul << 12));
+
+	switch (sdram_ch.dbw) {
+	case 2:
+		tmp |= (3ul << 30);
+		break;
+	case 1:
+		tmp |= (2ul << 30);
+		break;
+	case 0:
+	default:
+		tmp |= (1ul << 30);
+		break;
+	}
+
+	if (sdram_ch.rank == 2)
+		tmp |= 3 << 24;
+	else
+		tmp |= 1 << 24;
+
+	tmp |= (2 - sdram_ch.bw) << 12;
+
+	sdram_params->pctl_regs.pctl[tmp_adr][1] = tmp;
+
+	if (sdram_ch.bw == 2)
+		sdram_ch.noc_timings.ddrtiming.b.bwratio = 0;
+	else
+		sdram_ch.noc_timings.ddrtiming.b.bwratio = 1;
+
+	return 0;
+}
+
+static int dram_detect_cs1_row(struct rk3328_sdram_params *sdram_params,
+			       unsigned char channel)
+{
+	u32 ret = 0;
+	u32 cs1_bit;
+	void __iomem *test_addr, *cs1_addr;
+	u32 row, bktmp, coltmp, bw;
+	u32 ddrconf = sdram_ch.ddrconfig;
+
+	if (sdram_ch.rank == 2) {
+		cs1_bit = addrmap[ddrconf][0] + 8;
+
+		if (cs1_bit > 31)
+			goto out;
+
+		cs1_addr = (void __iomem *)(1ul << cs1_bit);
+		if (cs1_bit < 20)
+			cs1_bit = 1;
+		else
+			cs1_bit = 0;
+
+		if (sdram_params->dramtype == DDR4) {
+			if (sdram_ch.dbw == 0)
+				bktmp = sdram_ch.bk + 2;
+			else
+				bktmp = sdram_ch.bk + 1;
+		} else {
+			bktmp = sdram_ch.bk;
+		}
+		bw = sdram_ch.bw;
+		coltmp = sdram_ch.col;
+
+		/* detect cs1 row */
+		for (row = sdram_ch.cs0_row; row > 12; row--) {
+			test_addr = (void __iomem *)(SDRAM_ADDR + cs1_addr +
+					(1ul << (row + cs1_bit + bktmp +
+					 coltmp + bw - 1ul)));
+			writel(0, SDRAM_ADDR + cs1_addr);
+			writel(PATTERN, test_addr);
+			if ((readl(test_addr) == PATTERN) &&
+			    (readl(SDRAM_ADDR + cs1_addr) == 0)) {
+				ret = row;
+				break;
+			}
+		}
+	}
+
+out:
+	return ret;
+}
+
+static int sdram_init_detect(struct dram_info *dram,
+			     struct rk3328_sdram_params *sdram_params)
+{
+	debug("Starting SDRAM initialization...\n");
+
+	memcpy(&sdram_ch, &sdram_params->ch,
+	       sizeof(struct rk3328_sdram_channel));
+
+	sdram_init(dram, sdram_params, 1);
+	dram_detect_cap(dram, sdram_params, 0);
+
+	/* modify bw, cs related timing */
+	remodify_sdram_params(sdram_params);
+	/* reinit sdram by real dram cap */
+	sdram_init(dram, sdram_params, 0);
+
+	/* redetect cs1 row */
+	sdram_ch.cs1_row =
+		dram_detect_cs1_row(sdram_params, 0);
+
+	return 0;
+}
+
+static int rk3328_dmc_init(struct udevice *dev)
+{
+	struct dram_info *priv = dev_get_priv(dev);
+	struct rockchip_dmc_plat *plat = dev_get_platdata(dev);
+	int ret;
+
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	struct rk3328_sdram_params *params = &plat->sdram_params;
+#else
+	struct dtd_rockchip_rk3328_dmc *dtplat = &plat->dtplat;
+	struct rk3328_sdram_params *params =
+					(void *)dtplat->rockchip_sdram_params;
+
+	ret = conv_of_platdata(dev);
+	if (ret)
+		return ret;
+#endif
+	priv->phy = regmap_get_range(plat->map, 0);
+	priv->pctl = regmap_get_range(plat->map, 1);
+	priv->grf = regmap_get_range(plat->map, 2);
+	priv->cru = regmap_get_range(plat->map, 3);
+	priv->msch = regmap_get_range(plat->map, 4);
+	priv->ddr_grf = regmap_get_range(plat->map, 5);
+
+	debug("%s phy %p pctrl %p grf %p cru %p msch %p ddr_grf %p\n",
+	      __func__, priv->phy, priv->pctl, priv->grf, priv->cru,
+	      priv->msch, priv->ddr_grf);
+	ret = sdram_init_detect(priv, params);
+	if (ret < 0) {
+		printf("%s DRAM init failed%d\n", __func__, ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int rk3328_dmc_ofdata_to_platdata(struct udevice *dev)
+{
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	struct rockchip_dmc_plat *plat = dev_get_platdata(dev);
+	int ret;
+
+	ret = dev_read_u32_array(dev, "rockchip,sdram-params",
+				 (u32 *)&plat->sdram_params,
+				 sizeof(plat->sdram_params) / sizeof(u32));
+	if (ret) {
+		printf("%s: Cannot read rockchip,sdram-params %d\n",
+		       __func__, ret);
+		return ret;
+	}
+	ret = regmap_init_mem(dev, &plat->map);
+	if (ret)
+		printf("%s: regmap failed %d\n", __func__, ret);
+#endif
+	return 0;
+}
+
+#endif
+
 static int rk3328_dmc_probe(struct udevice *dev)
 {
+#ifdef CONFIG_TPL_BUILD
+	if (rk3328_dmc_init(dev))
+		return 0;
+#else
 	struct dram_info *priv = dev_get_priv(dev);
 
 	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
@@ -27,7 +992,7 @@ static int rk3328_dmc_probe(struct udevice *dev)
 	priv->info.base = CONFIG_SYS_SDRAM_BASE;
 	priv->info.size = rockchip_sdram_size(
 				(phys_addr_t)&priv->grf->os_reg[2]);
-
+#endif
 	return 0;
 }
 
@@ -44,7 +1009,6 @@ static struct ram_ops rk3328_dmc_ops = {
 	.get_info = rk3328_dmc_get_info,
 };
 
-
 static const struct udevice_id rk3328_dmc_ids[] = {
 	{ .compatible = "rockchip,rk3328-dmc" },
 	{ }
@@ -55,6 +1019,12 @@ U_BOOT_DRIVER(dmc_rk3328) = {
 	.id = UCLASS_RAM,
 	.of_match = rk3328_dmc_ids,
 	.ops = &rk3328_dmc_ops,
+#ifdef CONFIG_TPL_BUILD
+	.ofdata_to_platdata = rk3328_dmc_ofdata_to_platdata,
+#endif
 	.probe = rk3328_dmc_probe,
 	.priv_auto_alloc_size = sizeof(struct dram_info),
+#ifdef CONFIG_TPL_BUILD
+	.platdata_auto_alloc_size = sizeof(struct rockchip_dmc_plat),
+#endif
 };

commit 1e1495636574c78ea9d3af3e0aae95d5204612d6
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Oct 26 11:08:22 2017 +0800

    rockchip: dts: rk3328: update dmc node for driver
    
    Update dmc node for full feature driver.
    
    Change-Id: Ie75b738a00c3f77ae5033d75ae21fe80238c119b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts
index 5147795915..3bac4e4415 100644
--- a/arch/arm/dts/rk3328-evb.dts
+++ b/arch/arm/dts/rk3328-evb.dts
@@ -6,6 +6,7 @@
 
 /dts-v1/;
 #include "rk3328.dtsi"
+#include "rk3328-sdram-ddr3-666.dtsi"
 
 / {
 	model = "Rockchip RK3328 EVB";
diff --git a/arch/arm/dts/rk3328-sdram-ddr3-666.dtsi b/arch/arm/dts/rk3328-sdram-ddr3-666.dtsi
new file mode 100644
index 0000000000..d99e7e0352
--- /dev/null
+++ b/arch/arm/dts/rk3328-sdram-ddr3-666.dtsi
@@ -0,0 +1,215 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+&dmc {
+	rockchip,sdram-params = <
+		0x1
+		0xC
+		0x3
+		0x1
+		0x0
+		0x0
+		0x10
+		0x10
+		0
+
+		0x9028b189
+		0x00000000
+		0x00000021
+		0x00000482
+		0x00000015
+		0x00000222
+		0x000000ff
+
+		333
+		3
+		0
+
+		0x00000000
+		0x43041001
+		0x00000064
+		0x0028003b
+		0x000000d0
+		0x00020053
+		0x000000d4
+		0x00020000
+		0x000000d8
+		0x00000100
+		0x000000dc
+		0x03200000
+		0x000000e0
+		0x00000000
+		0x000000e4
+		0x00090000
+		0x000000f4
+		0x000f011f
+		0x00000100
+		0x07090b06
+		0x00000104
+		0x00050209
+		0x00000108
+		0x03030407
+		0x0000010c
+		0x00202006
+		0x00000110
+		0x03020204
+		0x00000114
+		0x03030202
+		0x00000120
+		0x00000903
+		0x00000180
+		0x00800020
+		0x00000184
+		0x00000000
+		0x00000190
+		0x07010001
+		0x00000198
+		0x05001100
+		0x000001a0
+		0xc0400003
+		0x00000240
+		0x06000604
+		0x00000244
+		0x00000201
+		0x00000250
+		0x00000f00
+		0x00000490
+		0x00000001
+		0xffffffff
+		0xffffffff
+		0xffffffff
+		0xffffffff
+		0xffffffff
+		0xffffffff
+		0xffffffff
+		0xffffffff
+		0xffffffff
+		0xffffffff
+
+		0x00000004
+		0x0000000a
+		0x00000028
+		0x00000006
+		0x0000002c
+		0x00000000
+		0x00000030
+		0x00000005
+		0xffffffff
+		0xffffffff
+
+		0x77
+		0x88
+		0x79
+		0x79
+		0x87
+		0x97
+		0x87
+		0x78
+		0x77
+		0x78
+		0x87
+		0x88
+		0x87
+		0x87
+		0x77
+
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x69
+		0x9
+
+		0x77
+		0x78
+		0x77
+		0x78
+		0x77
+		0x78
+		0x77
+		0x78
+		0x77
+		0x79
+		0x9
+
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x69
+		0x9
+
+		0x77
+		0x78
+		0x77
+		0x77
+		0x77
+		0x77
+		0x77
+		0x77
+		0x77
+		0x79
+		0x9
+
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x69
+		0x9
+
+		0x77
+		0x78
+		0x77
+		0x78
+		0x77
+		0x78
+		0x77
+		0x78
+		0x77
+		0x79
+		0x9
+
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x69
+		0x9
+
+		0x77
+		0x78
+		0x77
+		0x77
+		0x77
+		0x77
+		0x77
+		0x77
+		0x77
+		0x79
+		0x9
+	>;
+};
diff --git a/arch/arm/dts/rk3328-sdram-lpddr3-666.dtsi b/arch/arm/dts/rk3328-sdram-lpddr3-666.dtsi
new file mode 100644
index 0000000000..62d809e833
--- /dev/null
+++ b/arch/arm/dts/rk3328-sdram-lpddr3-666.dtsi
@@ -0,0 +1,215 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+&dmc {
+	rockchip,sdram-params = <
+		0x1
+		0xC
+		0x3
+		0x1
+		0x0
+		0x0
+		0x10
+		0x10
+		0
+
+		0x0c48a18a
+		0x00000000
+		0x00000021
+		0x00000482
+		0x00000015
+		0x0000021a
+		0x000000ff
+
+		333
+		6
+		0
+
+		0x00000000
+		0xc3040008
+		0x00000064
+		0x00140023
+		0x000000d0
+		0x00220002
+		0x000000d4
+		0x00010000
+		0x000000d8
+		0x00000703
+		0x000000dc
+		0x00830004
+		0x000000e0
+		0x00010000
+		0x000000e4
+		0x00070003
+		0x00000100
+		0x06090b07
+		0x00000104
+		0x0002020b
+		0x00000108
+		0x02030506
+		0x0000010c
+		0x00505000
+		0x00000110
+		0x03020204
+		0x00000114
+		0x01010303
+		0x00000118
+		0x02020003
+		0x00000120
+		0x00000303
+		0x00000138
+		0x00000025
+		0x00000180
+		0x003c000f
+		0x00000184
+		0x00900000
+		0x00000190
+		0x07020000
+		0x00000198
+		0x05001100
+		0x000001a0
+		0xc0400003
+		0x00000240
+		0x0900090c
+		0x00000244
+		0x00000101
+		0x00000250
+		0x00000f00
+		0x00000490
+		0x00000001
+		0xffffffff
+		0xffffffff
+		0xffffffff
+		0xffffffff
+		0xffffffff
+		0xffffffff
+		0xffffffff
+		0xffffffff
+
+		0x00000004
+		0x0000000b
+		0x00000028
+		0x00000006
+		0x0000002c
+		0x00000000
+		0x00000030
+		0x00000003
+		0xffffffff
+		0xffffffff
+
+		0x77
+		0x88
+		0x79
+		0x79
+		0x87
+		0x97
+		0x87
+		0x78
+		0x77
+		0x78
+		0x87
+		0x88
+		0x87
+		0x87
+		0x77
+
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x69
+		0x9
+
+		0x77
+		0x78
+		0x77
+		0x78
+		0x77
+		0x78
+		0x77
+		0x78
+		0x77
+		0x79
+		0x9
+
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x69
+		0x9
+
+		0x77
+		0x78
+		0x77
+		0x77
+		0x77
+		0x77
+		0x77
+		0x77
+		0x77
+		0x79
+		0x9
+
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x69
+		0x9
+
+		0x77
+		0x78
+		0x77
+		0x78
+		0x77
+		0x78
+		0x77
+		0x78
+		0x77
+		0x79
+		0x9
+
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x69
+		0x9
+
+		0x77
+		0x78
+		0x77
+		0x77
+		0x77
+		0x77
+		0x77
+		0x77
+		0x77
+		0x79
+		0x9
+	>;
+};
diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi
index 51da1e9ab7..b821c4c979 100644
--- a/arch/arm/dts/rk3328.dtsi
+++ b/arch/arm/dts/rk3328.dtsi
@@ -354,10 +354,15 @@
 		status = "disabled";
 	};
 
-	dmc: dmc@ff400000 {
+	dmc: dmc {
 		u-boot,dm-pre-reloc;
-		compatible = "rockchip,rk3328-dmc", "syscon";
-		reg = <0x0 0xff400000 0x0 0x1000>;
+		compatible = "rockchip,rk3328-dmc";
+		reg = <0x0 0xff400000 0x0 0x1000
+		       0x0 0xff780000 0x0 0x3000
+		       0x0 0xff100000 0x0 0x1000
+		       0x0 0xff440000 0x0 0x1000
+		       0x0 0xff720000 0x0 0x1000
+		       0x0 0xff798000 0x0 0x1000>;
 	};
 
 	cru: clock-controller@ff440000 {

commit 7c2f4ca09fd3102cb87d3abd8e00c5b3b23f7504
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Oct 26 10:54:32 2017 +0800

    rockchip: tool: update rk3328 spl_boot0
    
    rk3328 is a 64bit SoC, do have spl_boot0.
    
    Change-Id: I26a472213f7f9a66a2fc6167d7ff4986de5e3a33
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index 1a24e16589..9fae9bc2c6 100644
--- a/tools/rkcommon.c
+++ b/tools/rkcommon.c
@@ -77,7 +77,7 @@ static struct spl_info spl_infos[] = {
 	{ "rk3188", "RK31", 0x8000 - 0x800, true, false },
 	{ "rk322x", "RK32", 0x8000 - 0x1000, false, false },
 	{ "rk3288", "RK32", 0x8000, false, false },
-	{ "rk3328", "RK32", 0x8000 - 0x1000, false, false },
+	{ "rk3328", "RK32", 0x8000 - 0x1000, false, true },
 	{ "rk3368", "RK33", 0x8000 - 0x1000, false, true },
 	{ "rk3399", "RK33", 0x30000 - 0x2000, false, true },
 	{ "rv1108", "RK11", 0x1800, false, false},

commit 62f9d1a3c8186064624cf05cc7e32a3c1aa35558
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Nov 2 15:07:58 2017 +0800

    rockchip: remove SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR from defconfig
    
    Use default value 0x4000 for SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR instead
    of define a new one.
    
    Change-Id: Icfaf22554f3dd3581b1ad92dc0529b9ff6c352d1
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index a91ad2fc22..ffe7ee27e9 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -23,7 +23,6 @@ CONFIG_SPL_FIT_SOURCE="board/rockchip/evb_rk3229/fit_spl_optee.its"
 # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x4000
 CONFIG_SPL_OPTEE_SUPPORT=y
 CONFIG_FASTBOOT=y
 CONFIG_USB_FUNCTION_FASTBOOT=y
diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index 05b269956c..b39c38f399 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -13,7 +13,6 @@ CONFIG_SPL_FIT_GENERATOR="board/rockchip/evb_rk3399/mk_fit_atf.sh"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
 CONFIG_SPL_ATF_SUPPORT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x00800800
 CONFIG_FASTBOOT_BUF_SIZE=0x08000000
diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
index 3c8b32e283..da9741c292 100644
--- a/configs/firefly-rk3399_defconfig
+++ b/configs/firefly-rk3399_defconfig
@@ -13,7 +13,6 @@ CONFIG_SPL_FIT_GENERATOR="board/rockchip/evb_rk3399/mk_fit_atf.sh"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
 CONFIG_SPL_ATF_SUPPORT=y
 CONFIG_FASTBOOT=y
 CONFIG_USB_FUNCTION_FASTBOOT=y

commit 29daf81101ccd164e3bce1ed7b8eefff621f2d2c
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Nov 2 15:06:16 2017 +0800

    rockchip: doc: update U-Boot location info
    
    Update rockchip U-Boot location to 0x4000/16384.
    
    Change-Id: I0801911a7baca9a7d374c0e1b5b1dddb194fb622
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/doc/README.rockchip b/doc/README.rockchip
index 12fec38139..07cc727e98 100644
--- a/doc/README.rockchip
+++ b/doc/README.rockchip
@@ -99,13 +99,13 @@ To write an image that boots from an SD card (assumed to be /dev/sdc):
    ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \
 	firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
    sudo dd if=out of=/dev/sdc seek=64 && \
-   sudo dd if=firefly-rk3288/u-boot-dtb.img of=/dev/sdc seek=256
+   sudo dd if=firefly-rk3288/u-boot-dtb.img of=/dev/sdc seek=16384
 
 This puts the Rockchip header and SPL image first and then places the U-Boot
-image at block 256 (i.e. 128KB from the start of the SD card). This
+image at block 16384 (i.e. 4MB from the start of the SD card). This
 corresponds with this setting in U-Boot:
 
-   #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	256
+   #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x4000
 
 Put this SD (or micro-SD) card into your board and reset it. You should see
 something like:

commit b24d32f4784cd731ef64509edcece2911b07873b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Nov 2 14:55:23 2017 +0800

    spl: set SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR to 0x4000 for rockchip
    
    Rockchip use a 'loader2' partition for U-Boot, so u-boot.bin or
    u-boot.itb load by SPL need to locate at0x4000. Detail here:
    http://opensource.rock-chips.com/wiki_Boot_option
    
    Change-Id: I3375346d04538cef1ce797bd2da5480c9ed50674
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 6174084d84..2115b58b35 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -141,11 +141,12 @@ config SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR
 	default 0x50 if ARCH_SUNXI
 	default 0x75 if ARCH_DAVINCI
 	default 0x8a if ARCH_MX6
-	default 0x100 if ARCH_ROCKCHIP || ARCH_UNIPHIER
+	default 0x100 if ARCH_UNIPHIER
 	default 0x140 if ARCH_MVEBU
 	default 0x200 if ARCH_SOCFPGA || ARCH_AT91
 	default 0x300 if ARCH_ZYNQ || ARCH_KEYSTONE || OMAP34XX || OMAP44XX || \
 		         OMAP54XX || AM33XX || AM43XX
+	default 0x4000 if ARCH_ROCKCHIP
 	help
 	  Address on the MMC to load U-Boot from, when the MMC is being used
 	  in raw mode. Units: MMC sectors (1 sector = 512 bytes).

commit 32040464ebe7253def76300f030e02ca9b9ff71b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Oct 31 16:25:16 2017 +0800

    rockchip: config: update partition table
    
    User do not need to access the reserved part in system, remove them
    from partition table.
    Rename atf to trust as generic name for armv7 do not use ATF.
    
    Change-Id: Iadf98fca8ec8887e4bca8f5feef9cf0071b1813f
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index bcb1a91b8e..a6a6096341 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -37,10 +37,8 @@
 #define PARTS_DEFAULT \
 	"uuid_disk=${uuid_gpt_disk};" \
 	"name=loader1,start=32K,size=4000K,uuid=${uuid_gpt_loader1};" \
-	"name=reserved1,size=64K,uuid=${uuid_gpt_reserved1};" \
-	"name=reserved2,size=4M,uuid=${uuid_gpt_reserved2};" \
-	"name=loader2,size=4MB,uuid=${uuid_gpt_loader2};" \
-	"name=atf,size=4M,uuid=${uuid_gpt_atf};" \
+	"name=loader2,start=8MB,size=4MB,uuid=${uuid_gpt_loader2};" \
+	"name=trust,size=4M,uuid=${uuid_gpt_atf};" \
 	"name=boot,size=112M,bootable,uuid=${uuid_gpt_boot};" \
 	"name=rootfs,size=-,uuid="ROOT_UUID
 

commit c95e05fb816cbf867bc2052239bff4b7e56b9faa
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Nov 3 16:07:02 2017 +0800

    rockchip: rock: remove CONFIG_ENV_OFFSEt
    
    We use the same default ENV setting in rockchip_common.h for all SoC.
    
    Change-Id: Icd3e9a56c42254bc727cb683cb0736fe7c7997b0
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rock.h b/include/configs/rock.h
index 8d845d95e3..468dfdbff9 100644
--- a/include/configs/rock.h
+++ b/include/configs/rock.h
@@ -12,18 +12,4 @@
 
 #define CONFIG_SYS_MMC_ENV_DEV 0
 
-#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
-/* SPL @ 32k for 34k
- * u-boot directly after @ 68k for 400k or so
- * ENV @ 992k
- */
-#define CONFIG_ENV_OFFSET ((1024-32) * 1024)
-#else
-/* SPL @ 32k for ~36k
- * ENV @ 96k
- * u-boot @ 128K
- */
-#define CONFIG_ENV_OFFSET (96 * 1024)
-#endif
-
 #endif

commit cc14d0843e62574bdfe03dccd691d705cfbafbaf
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Nov 2 15:18:51 2017 +0800

    rockchip: configs: enable DM_RESET config by default
    
    Change-Id: Iff8e5ff45a1acc6255ca1ca41892c837891a9ac0
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-px5_defconfig b/configs/evb-px5_defconfig
index 4323b77768..a93dae0928 100644
--- a/configs/evb-px5_defconfig
+++ b/configs/evb-px5_defconfig
@@ -19,6 +19,7 @@ CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_ROCKCHIP_RK3368=y
 CONFIG_RAM=y
+CONFIG_DM_RESET=y
 CONFIG_DEBUG_UART_BASE=0xFF1c0000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
diff --git a/configs/evb-rk3036_defconfig b/configs/evb-rk3036_defconfig
index 5a53951314..5f45c87b20 100644
--- a/configs/evb-rk3036_defconfig
+++ b/configs/evb-rk3036_defconfig
@@ -37,6 +37,7 @@ CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_ROCKCHIP_RK3036=y
+CONFIG_DM_RESET=y
 # CONFIG_SPL_DM_SERIAL is not set
 CONFIG_DEBUG_UART_BASE=0x20068000
 CONFIG_DEBUG_UART_CLOCK=24000000
diff --git a/configs/evb-rk3126_defconfig b/configs/evb-rk3126_defconfig
index 950308875a..e8d78868d3 100644
--- a/configs/evb-rk3126_defconfig
+++ b/configs/evb-rk3126_defconfig
@@ -46,6 +46,7 @@ CONFIG_DM_CHARGE_DISPLAY=y
 CONFIG_CHARGE_ANIMATION=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
+CONFIG_DM_RESET=y
 CONFIG_DEBUG_UART_BASE=0x20068000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
diff --git a/configs/evb-rk3128_defconfig b/configs/evb-rk3128_defconfig
index 6c83f68f0d..7c2a607e90 100644
--- a/configs/evb-rk3128_defconfig
+++ b/configs/evb-rk3128_defconfig
@@ -33,6 +33,7 @@ CONFIG_PINCTRL_ROCKCHIP_RK3128=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_RAM=y
+CONFIG_DM_RESET=y
 CONFIG_DEBUG_UART_BASE=0x20068000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index caa806ba77..a91ad2fc22 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -64,6 +64,7 @@ CONFIG_PINCTRL_ROCKCHIP_RK322X=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
+CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0x11030000
 CONFIG_DEBUG_UART_CLOCK=24000000
diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig
index 5294ba9f5f..04f6a064e3 100644
--- a/configs/evb-rk3288_defconfig
+++ b/configs/evb-rk3288_defconfig
@@ -59,6 +59,7 @@ CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
+CONFIG_DM_RESET=y
 CONFIG_DEBUG_UART_BASE=0xff690000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index 01a503de66..8b8a835d33 100644
--- a/configs/evb-rk3328_defconfig
+++ b/configs/evb-rk3328_defconfig
@@ -38,6 +38,7 @@ CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
+CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF130000
 CONFIG_DEBUG_UART_CLOCK=24000000
diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index 1c337fdc15..05b269956c 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -61,6 +61,7 @@ CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
+CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF1A0000
 CONFIG_DEBUG_UART_CLOCK=24000000
diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig
index 3df3d97664..1713cc6468 100644
--- a/configs/evb-rv1108_defconfig
+++ b/configs/evb-rv1108_defconfig
@@ -37,6 +37,7 @@ CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_ROCKCHIP_RV1108=y
 CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 # CONFIG_SPL_SERIAL_PRESENT is not set
 CONFIG_DEBUG_UART_BASE=0x10210000
diff --git a/configs/fennec-rk3288_defconfig b/configs/fennec-rk3288_defconfig
index 96a07defce..d9c4d30e05 100644
--- a/configs/fennec-rk3288_defconfig
+++ b/configs/fennec-rk3288_defconfig
@@ -60,6 +60,7 @@ CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
+CONFIG_DM_RESET=y
 CONFIG_DEBUG_UART_BASE=0xff690000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig
index 82da6016e6..40d7393859 100644
--- a/configs/firefly-rk3288_defconfig
+++ b/configs/firefly-rk3288_defconfig
@@ -64,6 +64,7 @@ CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
+CONFIG_DM_RESET=y
 CONFIG_DEBUG_UART_BASE=0xff690000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
index e193ccbe0d..3c8b32e283 100644
--- a/configs/firefly-rk3399_defconfig
+++ b/configs/firefly-rk3399_defconfig
@@ -63,6 +63,7 @@ CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
+CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF1A0000
 CONFIG_DEBUG_UART_CLOCK=24000000

commit 3d555d7522498fbf1c92c370b7fa22ca076194e2
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Oct 10 15:23:57 2017 +0800

    rockchip: clk: add device_bind_driver_to_node for reset driver
    
    all rockchip socs add device_bind_driver_to_node,
    to bound device rockchip reset to clock-controller.
    
    Change-Id: I03c2a798d211fb4181d5fc0fd6db8609c6db04d2
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/clock.h b/arch/arm/include/asm/arch-rockchip/clock.h
index 7deea147fd..783f6f29a1 100644
--- a/arch/arm/include/asm/arch-rockchip/clock.h
+++ b/arch/arm/include/asm/arch-rockchip/clock.h
@@ -45,6 +45,12 @@ struct sysreset_reg {
 	unsigned int glb_srst_snd_value;
 };
 
+struct softreset_reg {
+	void __iomem *base;
+	unsigned int sf_reset_offset;
+	unsigned int sf_reset_num;
+};
+
 /**
  * clk_get_divisor() - Calculate the required clock divisior
  *
diff --git a/drivers/clk/rockchip/clk_rk3036.c b/drivers/clk/rockchip/clk_rk3036.c
index 280ebb9ba2..32b250f97c 100644
--- a/drivers/clk/rockchip/clk_rk3036.c
+++ b/drivers/clk/rockchip/clk_rk3036.c
@@ -330,8 +330,9 @@ static int rk3036_clk_probe(struct udevice *dev)
 static int rk3036_clk_bind(struct udevice *dev)
 {
 	int ret;
-	struct udevice *sys_child;
+	struct udevice *sys_child, *sf_child;
 	struct sysreset_reg *priv;
+	struct softreset_reg *sf_priv;
 
 	/* The reset driver does not have a device node, so bind it here */
 	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
@@ -347,6 +348,18 @@ static int rk3036_clk_bind(struct udevice *dev)
 		sys_child->priv = priv;
 	}
 
+	ret = device_bind_driver_to_node(dev, "rockchip_reset", "reset",
+					 dev_ofnode(dev), &sf_child);
+	if (ret) {
+		debug("Warning: No rockchip reset driver: ret=%d\n", ret);
+	} else {
+		sf_priv = malloc(sizeof(struct softreset_reg));
+		sf_priv->sf_reset_offset = offsetof(struct rk3036_cru,
+						    cru_softrst_con[0]);
+		sf_priv->sf_reset_num = 9;
+		sf_child->priv = sf_priv;
+	}
+
 	return 0;
 }
 
diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c
index dcff3c3264..038c34a1da 100644
--- a/drivers/clk/rockchip/clk_rk3128.c
+++ b/drivers/clk/rockchip/clk_rk3128.c
@@ -556,8 +556,9 @@ static int rk3128_clk_probe(struct udevice *dev)
 static int rk3128_clk_bind(struct udevice *dev)
 {
 	int ret;
-	struct udevice *sys_child;
+	struct udevice *sys_child, *sf_child;
 	struct sysreset_reg *priv;
+	struct softreset_reg *sf_priv;
 
 	/* The reset driver does not have a device node, so bind it here */
 	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
@@ -573,6 +574,18 @@ static int rk3128_clk_bind(struct udevice *dev)
 		sys_child->priv = priv;
 	}
 
+	ret = device_bind_driver_to_node(dev, "rockchip_reset", "reset",
+					 dev_ofnode(dev), &sf_child);
+	if (ret) {
+		debug("Warning: No rockchip reset driver: ret=%d\n", ret);
+	} else {
+		sf_priv = malloc(sizeof(struct softreset_reg));
+		sf_priv->sf_reset_offset = offsetof(struct rk3128_cru,
+						    cru_softrst_con[0]);
+		sf_priv->sf_reset_num = 9;
+		sf_child->priv = sf_priv;
+	}
+
 	return 0;
 }
 
diff --git a/drivers/clk/rockchip/clk_rk3188.c b/drivers/clk/rockchip/clk_rk3188.c
index bafda1a3c1..ad00d6e0e1 100644
--- a/drivers/clk/rockchip/clk_rk3188.c
+++ b/drivers/clk/rockchip/clk_rk3188.c
@@ -603,8 +603,9 @@ static int rk3188_clk_probe(struct udevice *dev)
 static int rk3188_clk_bind(struct udevice *dev)
 {
 	int ret;
-	struct udevice *sys_child;
+	struct udevice *sys_child, *sf_child;
 	struct sysreset_reg *priv;
+	struct softreset_reg *sf_priv;
 
 	/* The reset driver does not have a device node, so bind it here */
 	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
@@ -620,6 +621,18 @@ static int rk3188_clk_bind(struct udevice *dev)
 		sys_child->priv = priv;
 	}
 
+	ret = device_bind_driver_to_node(dev, "rockchip_reset", "reset",
+					 dev_ofnode(dev), &sf_child);
+	if (ret) {
+		debug("Warning: No rockchip reset driver: ret=%d\n", ret);
+	} else {
+		sf_priv = malloc(sizeof(struct softreset_reg));
+		sf_priv->sf_reset_offset = offsetof(struct rk3188_cru,
+						    cru_softrst_con[0]);
+		sf_priv->sf_reset_num = 9;
+		sf_child->priv = sf_priv;
+	}
+
 	return 0;
 }
 
diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c
index e59272dffc..ce7d62a0e4 100644
--- a/drivers/clk/rockchip/clk_rk322x.c
+++ b/drivers/clk/rockchip/clk_rk322x.c
@@ -413,8 +413,9 @@ static int rk322x_clk_probe(struct udevice *dev)
 static int rk322x_clk_bind(struct udevice *dev)
 {
 	int ret;
-	struct udevice *sys_child;
+	struct udevice *sys_child, *sf_child;
 	struct sysreset_reg *priv;
+	struct softreset_reg *sf_priv;
 
 	/* The reset driver does not have a device node, so bind it here */
 	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
@@ -430,6 +431,18 @@ static int rk322x_clk_bind(struct udevice *dev)
 		sys_child->priv = priv;
 	}
 
+	ret = device_bind_driver_to_node(dev, "rockchip_reset", "reset",
+					 dev_ofnode(dev), &sf_child);
+	if (ret) {
+		debug("Warning: No rockchip reset driver: ret=%d\n", ret);
+	} else {
+		sf_priv = malloc(sizeof(struct softreset_reg));
+		sf_priv->sf_reset_offset = offsetof(struct rk322x_cru,
+						    cru_softrst_con[0]);
+		sf_priv->sf_reset_num = 9;
+		sf_child->priv = sf_priv;
+	}
+
 	return 0;
 }
 
diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index 92a45e6078..431ff89e21 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -983,8 +983,9 @@ static int rk3288_clk_probe(struct udevice *dev)
 static int rk3288_clk_bind(struct udevice *dev)
 {
 	int ret;
-	struct udevice *sys_child;
+	struct udevice *sys_child, *sf_child;
 	struct sysreset_reg *priv;
+	struct softreset_reg *sf_priv;
 
 	/* The reset driver does not have a device node, so bind it here */
 	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
@@ -1000,6 +1001,18 @@ static int rk3288_clk_bind(struct udevice *dev)
 		sys_child->priv = priv;
 	}
 
+	ret = device_bind_driver_to_node(dev, "rockchip_reset", "reset",
+					 dev_ofnode(dev), &sf_child);
+	if (ret) {
+		debug("Warning: No rockchip reset driver: ret=%d\n", ret);
+	} else {
+		sf_priv = malloc(sizeof(struct softreset_reg));
+		sf_priv->sf_reset_offset = offsetof(struct rk3288_cru,
+						    cru_softrst_con[0]);
+		sf_priv->sf_reset_num = 12;
+		sf_child->priv = sf_priv;
+	}
+
 	return 0;
 }
 
diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c
index 4d522a7816..1388b44d98 100644
--- a/drivers/clk/rockchip/clk_rk3328.c
+++ b/drivers/clk/rockchip/clk_rk3328.c
@@ -597,8 +597,9 @@ static int rk3328_clk_ofdata_to_platdata(struct udevice *dev)
 static int rk3328_clk_bind(struct udevice *dev)
 {
 	int ret;
-	struct udevice *sys_child;
+	struct udevice *sys_child, *sf_child;
 	struct sysreset_reg *priv;
+	struct softreset_reg *sf_priv;
 
 	/* The reset driver does not have a device node, so bind it here */
 	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
@@ -614,6 +615,18 @@ static int rk3328_clk_bind(struct udevice *dev)
 		sys_child->priv = priv;
 	}
 
+	ret = device_bind_driver_to_node(dev, "rockchip_reset", "reset",
+					 dev_ofnode(dev), &sf_child);
+	if (ret) {
+		debug("Warning: No rockchip reset driver: ret=%d\n", ret);
+	} else {
+		sf_priv = malloc(sizeof(struct softreset_reg));
+		sf_priv->sf_reset_offset = offsetof(struct rk3328_cru,
+						    softrst_con[0]);
+		sf_priv->sf_reset_num = 12;
+		sf_child->priv = sf_priv;
+	}
+
 	return ret;
 }
 
diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c
index 1fce2e7ee4..4a37bc9556 100644
--- a/drivers/clk/rockchip/clk_rk3368.c
+++ b/drivers/clk/rockchip/clk_rk3368.c
@@ -526,8 +526,9 @@ static int rk3368_clk_ofdata_to_platdata(struct udevice *dev)
 static int rk3368_clk_bind(struct udevice *dev)
 {
 	int ret;
-	struct udevice *sys_child;
+	struct udevice *sys_child, *sf_child;
 	struct sysreset_reg *priv;
+	struct softreset_reg *sf_priv;
 
 	/* The reset driver does not have a device node, so bind it here */
 	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
@@ -543,6 +544,18 @@ static int rk3368_clk_bind(struct udevice *dev)
 		sys_child->priv = priv;
 	}
 
+	ret = device_bind_driver_to_node(dev, "rockchip_reset", "reset",
+					 dev_ofnode(dev), &sf_child);
+	if (ret) {
+		debug("Warning: No rockchip reset driver: ret=%d\n", ret);
+	} else {
+		sf_priv = malloc(sizeof(struct softreset_reg));
+		sf_priv->sf_reset_offset = offsetof(struct rk3368_cru,
+						    softrst_con[0]);
+		sf_priv->sf_reset_num = 15;
+		sf_child->priv = sf_priv;
+	}
+
 	return ret;
 }
 
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index d4109d278f..231c94fe70 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -1018,8 +1018,9 @@ static int rk3399_clk_ofdata_to_platdata(struct udevice *dev)
 static int rk3399_clk_bind(struct udevice *dev)
 {
 	int ret;
-	struct udevice *sys_child;
+	struct udevice *sys_child, *sf_child;
 	struct sysreset_reg *priv;
+	struct softreset_reg *sf_priv;
 
 	/* The reset driver does not have a device node, so bind it here */
 	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
@@ -1035,6 +1036,18 @@ static int rk3399_clk_bind(struct udevice *dev)
 		sys_child->priv = priv;
 	}
 
+	ret = device_bind_driver_to_node(dev, "rockchip_reset", "reset",
+					 dev_ofnode(dev), &sf_child);
+	if (ret) {
+		debug("Warning: No rockchip reset driver: ret=%d\n", ret);
+	} else {
+		sf_priv = malloc(sizeof(struct softreset_reg));
+		sf_priv->sf_reset_offset = offsetof(struct rk3399_cru,
+						    softrst_con[0]);
+		sf_priv->sf_reset_num = 21;
+		sf_child->priv = sf_priv;
+	}
+
 	return 0;
 }
 
@@ -1210,6 +1223,26 @@ static int rk3399_pmuclk_ofdata_to_platdata(struct udevice *dev)
 	return 0;
 }
 
+static int rk3399_pmuclk_bind(struct udevice *dev)
+{
+	int ret = 0;
+	struct udevice *sf_child;
+	struct softreset_reg *sf_priv = malloc(sizeof(struct softreset_reg));
+
+	ret = device_bind_driver_to_node(dev, "rockchip_reset",
+					 "reset", dev_ofnode(dev),
+					 &sf_child);
+	if (ret)
+		debug("Warning: No rockchip reset driver: ret=%d\n", ret);
+
+	sf_priv->sf_reset_offset = offsetof(struct rk3399_pmucru,
+					    pmucru_softrst_con[0]);
+	sf_priv->sf_reset_num = 2;
+	sf_child->priv = sf_priv;
+
+	return ret;
+}
+
 static const struct udevice_id rk3399_pmuclk_ids[] = {
 	{ .compatible = "rockchip,rk3399-pmucru" },
 	{ }
@@ -1223,6 +1256,7 @@ U_BOOT_DRIVER(rockchip_rk3399_pmuclk) = {
 	.ofdata_to_platdata = rk3399_pmuclk_ofdata_to_platdata,
 	.ops		= &rk3399_pmuclk_ops,
 	.probe		= rk3399_pmuclk_probe,
+	.bind		= rk3399_pmuclk_bind,
 #if CONFIG_IS_ENABLED(OF_PLATDATA)
 	.platdata_auto_alloc_size = sizeof(struct rk3399_pmuclk_plat),
 #endif
diff --git a/drivers/clk/rockchip/clk_rv1108.c b/drivers/clk/rockchip/clk_rv1108.c
index a1195486a9..a6c5c47ad8 100644
--- a/drivers/clk/rockchip/clk_rv1108.c
+++ b/drivers/clk/rockchip/clk_rv1108.c
@@ -223,8 +223,9 @@ static int rv1108_clk_probe(struct udevice *dev)
 static int rv1108_clk_bind(struct udevice *dev)
 {
 	int ret;
-	struct udevice *sys_child;
+	struct udevice *sys_child, *sf_child;
 	struct sysreset_reg *priv;
+	struct softreset_reg *sf_priv;
 
 	/* The reset driver does not have a device node, so bind it here */
 	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
@@ -240,6 +241,18 @@ static int rv1108_clk_bind(struct udevice *dev)
 		sys_child->priv = priv;
 	}
 
+	ret = device_bind_driver_to_node(dev, "rockchip_reset", "reset",
+					 dev_ofnode(dev), &sf_child);
+	if (ret) {
+		debug("Warning: No rockchip reset driver: ret=%d\n", ret);
+	} else {
+		sf_priv = malloc(sizeof(struct softreset_reg));
+		sf_priv->sf_reset_offset = offsetof(struct rv1108_cru,
+						    softrst_con[0]);
+		sf_priv->sf_reset_num = 13;
+		sf_child->priv = sf_priv;
+	}
+
 	return 0;
 }
 

commit 5754b8c90d015fc03621bb60be9865b4dc276bc4
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Oct 10 15:04:07 2017 +0800

    drivers/reset: support rockchip reset drivers
    
    Create driver to support all Rockchip SoCs soft reset.
    Example of usage:
    i2c driver:
            ret = reset_get_by_name(dev, "i2c", &reset_ctl);
            if (ret) {
                    error("reset_get_by_name() failed: %d\n", ret);
            }
    
            reset_assert(&reset_ctl);
            udelay(50);
            reset_deassert(&reset_ctl);
    
    i2c dts node:
    resets = <&cru SRST_P_I2C1>, <&cru SRST_I2C1>;
    reset-names = "p_i2c", "i2c";
    
    Change-Id: I7db97619e33447d6130e349e90799cd398e29d72
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index e6af7da8fe..1121166bbf 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -67,4 +67,12 @@ config AST2500_RESET
 	  resets that are supported by watchdog. The main limitation though
 	  is that some reset signals, like I2C or MISC reset multiple devices.
 
+config RESET_ROCKCHIP
+	bool "Reset controller driver for Rockchip SoCs"
+	depends on DM_RESET && CLK
+	default y
+	help
+	  Support for reset controller on rockchip SoC. The main limitation though
+	  is that some reset signals, like I2C or MISC reset multiple devices.
+
 endmenu
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index d5e06c2241..40caba5d8f 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -11,3 +11,4 @@ obj-$(CONFIG_TEGRA186_RESET) += tegra186-reset.o
 obj-$(CONFIG_RESET_BCM6345) += reset-bcm6345.o
 obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o
 obj-$(CONFIG_AST2500_RESET) += ast2500-reset.o
+obj-$(CONFIG_RESET_ROCKCHIP) += reset-rockchip.o
diff --git a/drivers/reset/reset-rockchip.c b/drivers/reset/reset-rockchip.c
new file mode 100644
index 0000000000..322ac27762
--- /dev/null
+++ b/drivers/reset/reset-rockchip.c
@@ -0,0 +1,104 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <reset-uclass.h>
+#include <linux/io.h>
+
+struct rockchip_reset_priv {
+	void __iomem *base;
+	unsigned int sf_reset_offset;
+	unsigned int sf_reset_num;
+};
+
+static int rockchip_reset_request(struct reset_ctl *reset_ctl)
+{
+	struct rockchip_reset_priv *priv = dev_get_priv(reset_ctl->dev);
+
+	debug("%s(reset_ctl=%p) (dev=%p, id=%lu) (sf_reset_num=%d)\n", __func__,
+	      reset_ctl, reset_ctl->dev, reset_ctl->id, priv->sf_reset_num);
+
+	if (reset_ctl->id / 16 >= priv->sf_reset_num)
+		return -EINVAL;
+
+	return 0;
+}
+
+static int rockchip_reset_free(struct reset_ctl *reset_ctl)
+{
+	debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl,
+	      reset_ctl->dev, reset_ctl->id);
+
+	return 0;
+}
+
+static int rockchip_reset_assert(struct reset_ctl *reset_ctl)
+{
+	struct rockchip_reset_priv *priv = dev_get_priv(reset_ctl->dev);
+	int bank =  reset_ctl->id / 16;
+	int offset =  reset_ctl->id % 16;
+
+	debug("%s(reset_ctl=%p) (dev=%p, id=%lu) (reg_addr=%p)\n", __func__,
+	      reset_ctl, reset_ctl->dev, reset_ctl->id,
+	      priv->base + (bank * 4));
+
+	writel(BIT(offset) | (BIT(offset) << 16), priv->base + (bank * 4));
+
+	return 0;
+}
+
+static int rockchip_reset_deassert(struct reset_ctl *reset_ctl)
+{
+	struct rockchip_reset_priv *priv = dev_get_priv(reset_ctl->dev);
+	int bank =  reset_ctl->id / 16;
+	int offset =  reset_ctl->id % 16;
+
+	debug("%s(reset_ctl=%p) (dev=%p, id=%lu) (reg_addr=%p)\n", __func__,
+	      reset_ctl, reset_ctl->dev, reset_ctl->id,
+	      priv->base + (bank * 4));
+
+	writel((BIT(offset) << 16), priv->base + (bank * 4));
+
+	return 0;
+}
+
+struct reset_ops rockchip_reset_ops = {
+	.request = rockchip_reset_request,
+	.free = rockchip_reset_free,
+	.rst_assert = rockchip_reset_assert,
+	.rst_deassert = rockchip_reset_deassert,
+};
+
+static int rockchip_reset_probe(struct udevice *dev)
+{
+	struct rockchip_reset_priv *priv = dev_get_priv(dev);
+	fdt_addr_t addr;
+	fdt_size_t size;
+
+	addr = devfdt_get_addr_size_index(dev, 0, &size);
+	if (addr == FDT_ADDR_T_NONE)
+		return -EINVAL;
+
+	if ((priv->sf_reset_offset == 0) && (priv->sf_reset_num == 0))
+		return -EINVAL;
+
+	addr += priv->sf_reset_offset;
+	priv->base = ioremap(addr, size);
+
+	debug("%s(base=%p) (sf_reset_offset=%x, sf_reset_num=%d)\n", __func__,
+	      priv->base, priv->sf_reset_offset, priv->sf_reset_num);
+
+	return 0;
+}
+
+U_BOOT_DRIVER(rockchip_reset) = {
+	.name = "rockchip_reset",
+	.id = UCLASS_RESET,
+	.probe = rockchip_reset_probe,
+	.ops = &rockchip_reset_ops,
+	.priv_auto_alloc_size = sizeof(struct rockchip_reset_priv),
+};

commit 39507926d56515114fb92329210898931b750a09
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Oct 27 09:45:54 2017 +0800

    rockchip: sysreset: use fst reset for ARM64 SOC
    
    Rockchip ARM64 SOC will change cpu entry, only fst reset can reset it.
    
    Change-Id: I9172dae79ced3128f6a11fb0f4029685c6662dfd
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/sysreset/sysreset_rockchip.c b/drivers/sysreset/sysreset_rockchip.c
index 894975f3fe..be00fefb3a 100644
--- a/drivers/sysreset/sysreset_rockchip.c
+++ b/drivers/sysreset/sysreset_rockchip.c
@@ -24,7 +24,12 @@ int rockchip_sysreset_request(struct udevice *dev, enum sysreset_t type)
 
 	switch (type) {
 	case SYSRESET_WARM:
+#ifdef CONFIG_ARM64
+		/* Rockchip 64bit SOC need fst reset for cpu reset entry */
+		writel(0xfdb9, cru_base + offset->glb_srst_fst_value);
+#else
 		writel(0xeca8, cru_base + offset->glb_srst_snd_value);
+#endif
 		break;
 	case SYSRESET_COLD:
 		writel(0xfdb9, cru_base + offset->glb_srst_fst_value);

commit 4f7772c4580b22bbd1702dc0dfeb990ea9c3a794
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Oct 26 15:51:42 2017 +0800

    rockchip: sysreset: do not enable driver in TPL
    
    Sysreset do not help much in TPL, let's disable it to save code
    space.
    
    Change-Id: I51714e00284315767d874ecb85e56cb2c5ee2fe8
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
index 50a0de9c92..3b100df3b9 100644
--- a/drivers/sysreset/Makefile
+++ b/drivers/sysreset/Makefile
@@ -14,4 +14,6 @@ obj-$(CONFIG_ARCH_SNAPDRAGON) += sysreset_snapdragon.o
 obj-$(CONFIG_ARCH_STI) += sysreset_sti.o
 obj-$(CONFIG_TARGET_XTFPGA) += sysreset_xtfpga.o
 obj-$(CONFIG_ARCH_ASPEED) += sysreset_ast.o
+ifndef CONFIG_TPL_BUILD
 obj-$(CONFIG_ARCH_ROCKCHIP) += sysreset_rockchip.o
+endif

commit fbdd155836a4e674ef6c9e123d0e39400d5ee4df
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Oct 25 16:04:19 2017 +0800

    rockchip: clock: update sysreset driver bingding
    
    Using priv for new sysreset driver binding.
    
    Change-Id: I7ecc0a922086272651a6c7923afd2186c1cfeb7a
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3036.c b/drivers/clk/rockchip/clk_rk3036.c
index 83f4ae6ca3..280ebb9ba2 100644
--- a/drivers/clk/rockchip/clk_rk3036.c
+++ b/drivers/clk/rockchip/clk_rk3036.c
@@ -330,11 +330,22 @@ static int rk3036_clk_probe(struct udevice *dev)
 static int rk3036_clk_bind(struct udevice *dev)
 {
 	int ret;
+	struct udevice *sys_child;
+	struct sysreset_reg *priv;
 
 	/* The reset driver does not have a device node, so bind it here */
-	ret = device_bind_driver(gd->dm_root, "rk3036_sysreset", "reset", &dev);
-	if (ret)
-		debug("Warning: No RK3036 reset driver: ret=%d\n", ret);
+	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
+				 &sys_child);
+	if (ret) {
+		debug("Warning: No sysreset driver: ret=%d\n", ret);
+	} else {
+		priv = malloc(sizeof(struct sysreset_reg));
+		priv->glb_srst_fst_value = offsetof(struct rk3036_cru,
+						    cru_glb_srst_fst_value);
+		priv->glb_srst_snd_value = offsetof(struct rk3036_cru,
+						    cru_glb_srst_snd_value);
+		sys_child->priv = priv;
+	}
 
 	return 0;
 }
diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c
index f4c6ebc70e..dcff3c3264 100644
--- a/drivers/clk/rockchip/clk_rk3128.c
+++ b/drivers/clk/rockchip/clk_rk3128.c
@@ -556,11 +556,22 @@ static int rk3128_clk_probe(struct udevice *dev)
 static int rk3128_clk_bind(struct udevice *dev)
 {
 	int ret;
+	struct udevice *sys_child;
+	struct sysreset_reg *priv;
 
 	/* The reset driver does not have a device node, so bind it here */
-	ret = device_bind_driver(gd->dm_root, "rk3128_sysreset", "reset", &dev);
-	if (ret)
-		debug("Warning: No RK3128 reset driver: ret=%d\n", ret);
+	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
+				 &sys_child);
+	if (ret) {
+		debug("Warning: No sysreset driver: ret=%d\n", ret);
+	} else {
+		priv = malloc(sizeof(struct sysreset_reg));
+		priv->glb_srst_fst_value = offsetof(struct rk3128_cru,
+						    cru_glb_srst_fst_value);
+		priv->glb_srst_snd_value = offsetof(struct rk3128_cru,
+						    cru_glb_srst_snd_value);
+		sys_child->priv = priv;
+	}
 
 	return 0;
 }
diff --git a/drivers/clk/rockchip/clk_rk3188.c b/drivers/clk/rockchip/clk_rk3188.c
index 7bf308dd42..bafda1a3c1 100644
--- a/drivers/clk/rockchip/clk_rk3188.c
+++ b/drivers/clk/rockchip/clk_rk3188.c
@@ -603,11 +603,22 @@ static int rk3188_clk_probe(struct udevice *dev)
 static int rk3188_clk_bind(struct udevice *dev)
 {
 	int ret;
+	struct udevice *sys_child;
+	struct sysreset_reg *priv;
 
 	/* The reset driver does not have a device node, so bind it here */
-	ret = device_bind_driver(gd->dm_root, "rk3188_sysreset", "reset", &dev);
-	if (ret)
-		debug("Warning: No rk3188 reset driver: ret=%d\n", ret);
+	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
+				 &sys_child);
+	if (ret) {
+		debug("Warning: No sysreset driver: ret=%d\n", ret);
+	} else {
+		priv = malloc(sizeof(struct sysreset_reg));
+		priv->glb_srst_fst_value = offsetof(struct rk3188_cru,
+						    cru_glb_srst_fst_value);
+		priv->glb_srst_snd_value = offsetof(struct rk3188_cru,
+						    cru_glb_srst_snd_value);
+		sys_child->priv = priv;
+	}
 
 	return 0;
 }
diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c
index 354883ae9d..e59272dffc 100644
--- a/drivers/clk/rockchip/clk_rk322x.c
+++ b/drivers/clk/rockchip/clk_rk322x.c
@@ -413,11 +413,22 @@ static int rk322x_clk_probe(struct udevice *dev)
 static int rk322x_clk_bind(struct udevice *dev)
 {
 	int ret;
+	struct udevice *sys_child;
+	struct sysreset_reg *priv;
 
 	/* The reset driver does not have a device node, so bind it here */
-	ret = device_bind_driver(gd->dm_root, "rk322x_sysreset", "reset", &dev);
-	if (ret)
-		debug("Warning: No RK322x reset driver: ret=%d\n", ret);
+	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
+				 &sys_child);
+	if (ret) {
+		debug("Warning: No sysreset driver: ret=%d\n", ret);
+	} else {
+		priv = malloc(sizeof(struct sysreset_reg));
+		priv->glb_srst_fst_value = offsetof(struct rk322x_cru,
+						    cru_glb_srst_fst_value);
+		priv->glb_srst_snd_value = offsetof(struct rk322x_cru,
+						    cru_glb_srst_snd_value);
+		sys_child->priv = priv;
+	}
 
 	return 0;
 }
diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index 204a54787e..92a45e6078 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -983,11 +983,22 @@ static int rk3288_clk_probe(struct udevice *dev)
 static int rk3288_clk_bind(struct udevice *dev)
 {
 	int ret;
+	struct udevice *sys_child;
+	struct sysreset_reg *priv;
 
 	/* The reset driver does not have a device node, so bind it here */
-	ret = device_bind_driver(gd->dm_root, "rk3288_sysreset", "reset", &dev);
-	if (ret)
-		debug("Warning: No RK3288 reset driver: ret=%d\n", ret);
+	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
+				 &sys_child);
+	if (ret) {
+		debug("Warning: No sysreset driver: ret=%d\n", ret);
+	} else {
+		priv = malloc(sizeof(struct sysreset_reg));
+		priv->glb_srst_fst_value = offsetof(struct rk3288_cru,
+						    cru_glb_srst_fst_value);
+		priv->glb_srst_snd_value = offsetof(struct rk3288_cru,
+						    cru_glb_srst_snd_value);
+		sys_child->priv = priv;
+	}
 
 	return 0;
 }
diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c
index 540d9104c3..4d522a7816 100644
--- a/drivers/clk/rockchip/clk_rk3328.c
+++ b/drivers/clk/rockchip/clk_rk3328.c
@@ -597,11 +597,22 @@ static int rk3328_clk_ofdata_to_platdata(struct udevice *dev)
 static int rk3328_clk_bind(struct udevice *dev)
 {
 	int ret;
+	struct udevice *sys_child;
+	struct sysreset_reg *priv;
 
 	/* The reset driver does not have a device node, so bind it here */
-	ret = device_bind_driver(gd->dm_root, "rk3328_sysreset", "reset", &dev);
-	if (ret)
-		printf("Warning: No RK3328 reset driver: ret=%d\n", ret);
+	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
+				 &sys_child);
+	if (ret) {
+		debug("Warning: No sysreset driver: ret=%d\n", ret);
+	} else {
+		priv = malloc(sizeof(struct sysreset_reg));
+		priv->glb_srst_fst_value = offsetof(struct rk3328_cru,
+						    glb_srst_fst_value);
+		priv->glb_srst_snd_value = offsetof(struct rk3328_cru,
+						    glb_srst_snd_value);
+		sys_child->priv = priv;
+	}
 
 	return ret;
 }
diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c
index cd3ab248fb..1fce2e7ee4 100644
--- a/drivers/clk/rockchip/clk_rk3368.c
+++ b/drivers/clk/rockchip/clk_rk3368.c
@@ -526,11 +526,22 @@ static int rk3368_clk_ofdata_to_platdata(struct udevice *dev)
 static int rk3368_clk_bind(struct udevice *dev)
 {
 	int ret;
+	struct udevice *sys_child;
+	struct sysreset_reg *priv;
 
 	/* The reset driver does not have a device node, so bind it here */
-	ret = device_bind_driver(gd->dm_root, "rk3368_sysreset", "reset", &dev);
-	if (ret)
-		error("bind RK3368 reset driver failed: ret=%d\n", ret);
+	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
+				 &sys_child);
+	if (ret) {
+		debug("Warning: No sysreset driver: ret=%d\n", ret);
+	} else {
+		priv = malloc(sizeof(struct sysreset_reg));
+		priv->glb_srst_fst_value = offsetof(struct rk3368_cru,
+						    glb_srst_fst_val);
+		priv->glb_srst_snd_value = offsetof(struct rk3368_cru,
+						    glb_srst_snd_val);
+		sys_child->priv = priv;
+	}
 
 	return ret;
 }
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index b31446e276..d4109d278f 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -1018,11 +1018,22 @@ static int rk3399_clk_ofdata_to_platdata(struct udevice *dev)
 static int rk3399_clk_bind(struct udevice *dev)
 {
 	int ret;
+	struct udevice *sys_child;
+	struct sysreset_reg *priv;
 
 	/* The reset driver does not have a device node, so bind it here */
-	ret = device_bind_driver(gd->dm_root, "rk3399_sysreset", "reset", &dev);
-	if (ret)
-		printf("Warning: No RK3399 reset driver: ret=%d\n", ret);
+	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
+				 &sys_child);
+	if (ret) {
+		debug("Warning: No sysreset driver: ret=%d\n", ret);
+	} else {
+		priv = malloc(sizeof(struct sysreset_reg));
+		priv->glb_srst_fst_value = offsetof(struct rk3399_cru,
+						    glb_srst_fst_value);
+		priv->glb_srst_snd_value = offsetof(struct rk3399_cru,
+						    glb_srst_snd_value);
+		sys_child->priv = priv;
+	}
 
 	return 0;
 }
diff --git a/drivers/clk/rockchip/clk_rv1108.c b/drivers/clk/rockchip/clk_rv1108.c
index 86e73e414c..a1195486a9 100644
--- a/drivers/clk/rockchip/clk_rv1108.c
+++ b/drivers/clk/rockchip/clk_rv1108.c
@@ -223,11 +223,22 @@ static int rv1108_clk_probe(struct udevice *dev)
 static int rv1108_clk_bind(struct udevice *dev)
 {
 	int ret;
+	struct udevice *sys_child;
+	struct sysreset_reg *priv;
 
 	/* The reset driver does not have a device node, so bind it here */
-	ret = device_bind_driver(gd->dm_root, "rv1108_sysreset", "reset", &dev);
-	if (ret)
-		error("No Rv1108 reset driver: ret=%d\n", ret);
+	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
+				 &sys_child);
+	if (ret) {
+		debug("Warning: No sysreset driver: ret=%d\n", ret);
+	} else {
+		priv = malloc(sizeof(struct sysreset_reg));
+		priv->glb_srst_fst_value = offsetof(struct rv1108_cru,
+						    glb_srst_fst_val);
+		priv->glb_srst_snd_value = offsetof(struct rv1108_cru,
+						    glb_srst_snd_val);
+		sys_child->priv = priv;
+	}
 
 	return 0;
 }

commit 116397d63e76e60b087053cc821c23fdd8774517
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Oct 25 15:50:22 2017 +0800

    rockchip: sysreset: merge into one common driver
    
    Use a common driver for all Rockchip SOC instead of one for each SoC.
    Use driver_data for reg offset.
    
    Change-Id: Ie4a246e53052db47aab9cb3b0105d44a484db484
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/clock.h b/arch/arm/include/asm/arch-rockchip/clock.h
index c6256c0dd8..7deea147fd 100644
--- a/arch/arm/include/asm/arch-rockchip/clock.h
+++ b/arch/arm/include/asm/arch-rockchip/clock.h
@@ -40,6 +40,11 @@ static inline int rk_pll_id(enum rk_clk_id clk_id)
 	return clk_id - 1;
 }
 
+struct sysreset_reg {
+	unsigned int glb_srst_fst_value;
+	unsigned int glb_srst_snd_value;
+};
+
 /**
  * clk_get_divisor() - Calculate the required clock divisior
  *
diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
index e3a0ab1718..50a0de9c92 100644
--- a/drivers/sysreset/Makefile
+++ b/drivers/sysreset/Makefile
@@ -9,19 +9,9 @@ obj-$(CONFIG_SYSRESET_PSCI) += sysreset_psci.o
 obj-$(CONFIG_SYSRESET_SYSCON) += sysreset_syscon.o
 obj-$(CONFIG_SYSRESET_WATCHDOG) += sysreset_watchdog.o
 
-ifndef CONFIG_SPL_BUILD
-obj-$(CONFIG_ROCKCHIP_RK3036) += sysreset_rk3036.o
-endif
-obj-$(CONFIG_ROCKCHIP_RK3128) += sysreset_rk3128.o
-obj-$(CONFIG_ROCKCHIP_RK3188) += sysreset_rk3188.o
-obj-$(CONFIG_ROCKCHIP_RK322X) += sysreset_rk322x.o
-obj-$(CONFIG_ROCKCHIP_RK3288) += sysreset_rk3288.o
-obj-$(CONFIG_ROCKCHIP_RK3328) += sysreset_rk3328.o
-obj-$(CONFIG_ROCKCHIP_RK3368) += sysreset_rk3368.o
-obj-$(CONFIG_ROCKCHIP_RK3399) += sysreset_rk3399.o
-obj-$(CONFIG_ROCKCHIP_RV1108) += sysreset_rv1108.o
 obj-$(CONFIG_SANDBOX) += sysreset_sandbox.o
 obj-$(CONFIG_ARCH_SNAPDRAGON) += sysreset_snapdragon.o
 obj-$(CONFIG_ARCH_STI) += sysreset_sti.o
 obj-$(CONFIG_TARGET_XTFPGA) += sysreset_xtfpga.o
 obj-$(CONFIG_ARCH_ASPEED) += sysreset_ast.o
+obj-$(CONFIG_ARCH_ROCKCHIP) += sysreset_rockchip.o
diff --git a/drivers/sysreset/sysreset_rk3036.c b/drivers/sysreset/sysreset_rk3036.c
deleted file mode 100644
index b3d2113239..0000000000
--- a/drivers/sysreset/sysreset_rk3036.c
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * (C) Copyright 2015 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <sysreset.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/cru_rk3036.h>
-#include <asm/arch/hardware.h>
-#include <linux/err.h>
-
-int rk3036_sysreset_request(struct udevice *dev, enum sysreset_t type)
-{
-	struct rk3036_cru *cru = rockchip_get_cru();
-
-	if (IS_ERR(cru))
-		return PTR_ERR(cru);
-	switch (type) {
-	case SYSRESET_WARM:
-		writel(0xeca8, &cru->cru_glb_srst_snd_value);
-		break;
-	case SYSRESET_COLD:
-		writel(0xfdb9, &cru->cru_glb_srst_fst_value);
-		break;
-	default:
-		return -EPROTONOSUPPORT;
-	}
-
-	return -EINPROGRESS;
-}
-
-static struct sysreset_ops rk3036_sysreset = {
-	.request	= rk3036_sysreset_request,
-};
-
-U_BOOT_DRIVER(sysreset_rk3036) = {
-	.name	= "rk3036_sysreset",
-	.id	= UCLASS_SYSRESET,
-	.ops	= &rk3036_sysreset,
-};
diff --git a/drivers/sysreset/sysreset_rk3128.c b/drivers/sysreset/sysreset_rk3128.c
deleted file mode 100644
index 5aab8ec50b..0000000000
--- a/drivers/sysreset/sysreset_rk3128.c
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <sysreset.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/cru_rk3128.h>
-#include <asm/arch/hardware.h>
-#include <linux/err.h>
-
-int rk3128_sysreset_request(struct udevice *dev, enum sysreset_t type)
-{
-	struct rk3128_cru *cru = rockchip_get_cru();
-
-	if (IS_ERR(cru))
-		return PTR_ERR(cru);
-	switch (type) {
-	case SYSRESET_WARM:
-		writel(0xeca8, &cru->cru_glb_srst_snd_value);
-		break;
-	case SYSRESET_COLD:
-		writel(0xfdb9, &cru->cru_glb_srst_fst_value);
-		break;
-	default:
-		return -EPROTONOSUPPORT;
-	}
-
-	return -EINPROGRESS;
-}
-
-static struct sysreset_ops rk3128_sysreset = {
-	.request	= rk3128_sysreset_request,
-};
-
-U_BOOT_DRIVER(sysreset_rk3128) = {
-	.name	= "rk3128_sysreset",
-	.id	= UCLASS_SYSRESET,
-	.ops	= &rk3128_sysreset,
-};
diff --git a/drivers/sysreset/sysreset_rk3188.c b/drivers/sysreset/sysreset_rk3188.c
deleted file mode 100644
index 053a6344f5..0000000000
--- a/drivers/sysreset/sysreset_rk3188.c
+++ /dev/null
@@ -1,62 +0,0 @@
-/*
- * (C) Copyright 2015 Google, Inc
- *
- * SPDX-License-Identifier:	GPL-2.0
- */
-
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <syscon.h>
-#include <sysreset.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/cru_rk3188.h>
-#include <asm/arch/grf_rk3188.h>
-#include <asm/arch/hardware.h>
-#include <linux/err.h>
-
-int rk3188_sysreset_request(struct udevice *dev, enum sysreset_t type)
-{
-	struct rk3188_cru *cru = rockchip_get_cru();
-	struct rk3188_grf *grf;
-
-	if (IS_ERR(cru))
-		return PTR_ERR(cru);
-	switch (type) {
-	case SYSRESET_WARM:
-		grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-		if (IS_ERR(grf))
-			return -EPROTONOSUPPORT;
-
-		/*
-		 * warm-reset keeps the remap value,
-		 * so make sure it's disabled.
-		 */
-		rk_clrsetreg(&grf->soc_con0,
-			NOC_REMAP_MASK << NOC_REMAP_SHIFT,
-			0 << NOC_REMAP_SHIFT);
-
-		rk_clrreg(&cru->cru_mode_con, 0xffff);
-		writel(0xeca8, &cru->cru_glb_srst_snd_value);
-		break;
-	case SYSRESET_COLD:
-		rk_clrreg(&cru->cru_mode_con, 0xffff);
-		writel(0xfdb9, &cru->cru_glb_srst_fst_value);
-		break;
-	default:
-		return -EPROTONOSUPPORT;
-	}
-
-	return -EINPROGRESS;
-}
-
-static struct sysreset_ops rk3188_sysreset = {
-	.request	= rk3188_sysreset_request,
-};
-
-U_BOOT_DRIVER(sysreset_rk3188) = {
-	.name	= "rk3188_sysreset",
-	.id	= UCLASS_SYSRESET,
-	.ops	= &rk3188_sysreset,
-};
diff --git a/drivers/sysreset/sysreset_rk322x.c b/drivers/sysreset/sysreset_rk322x.c
deleted file mode 100644
index 5fce79b685..0000000000
--- a/drivers/sysreset/sysreset_rk322x.c
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <sysreset.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/cru_rk322x.h>
-#include <asm/arch/hardware.h>
-#include <linux/err.h>
-
-int rk322x_sysreset_request(struct udevice *dev, enum sysreset_t type)
-{
-	struct rk322x_cru *cru = rockchip_get_cru();
-
-	if (IS_ERR(cru))
-		return PTR_ERR(cru);
-	switch (type) {
-	case SYSRESET_WARM:
-		writel(0xeca8, &cru->cru_glb_srst_snd_value);
-		break;
-	case SYSRESET_COLD:
-		writel(0xfdb9, &cru->cru_glb_srst_fst_value);
-		break;
-	default:
-		return -EPROTONOSUPPORT;
-	}
-
-	return -EINPROGRESS;
-}
-
-static struct sysreset_ops rk322x_sysreset = {
-	.request	= rk322x_sysreset_request,
-};
-
-U_BOOT_DRIVER(sysreset_rk322x) = {
-	.name	= "rk322x_sysreset",
-	.id	= UCLASS_SYSRESET,
-	.ops	= &rk322x_sysreset,
-};
diff --git a/drivers/sysreset/sysreset_rk3288.c b/drivers/sysreset/sysreset_rk3288.c
deleted file mode 100644
index 0aad1c2160..0000000000
--- a/drivers/sysreset/sysreset_rk3288.c
+++ /dev/null
@@ -1,47 +0,0 @@
-/*
- * (C) Copyright 2015 Google, Inc
- *
- * SPDX-License-Identifier:	GPL-2.0
- */
-
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <sysreset.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/cru_rk3288.h>
-#include <asm/arch/hardware.h>
-#include <linux/err.h>
-
-int rk3288_sysreset_request(struct udevice *dev, enum sysreset_t type)
-{
-	struct rk3288_cru *cru = rockchip_get_cru();
-
-	if (IS_ERR(cru))
-		return PTR_ERR(cru);
-	switch (type) {
-	case SYSRESET_WARM:
-		rk_clrreg(&cru->cru_mode_con, 0xffff);
-		writel(0xeca8, &cru->cru_glb_srst_snd_value);
-		break;
-	case SYSRESET_COLD:
-		rk_clrreg(&cru->cru_mode_con, 0xffff);
-		writel(0xfdb9, &cru->cru_glb_srst_fst_value);
-		break;
-	default:
-		return -EPROTONOSUPPORT;
-	}
-
-	return -EINPROGRESS;
-}
-
-static struct sysreset_ops rk3288_sysreset = {
-	.request	= rk3288_sysreset_request,
-};
-
-U_BOOT_DRIVER(sysreset_rk3288) = {
-	.name	= "rk3288_sysreset",
-	.id	= UCLASS_SYSRESET,
-	.ops	= &rk3288_sysreset,
-};
diff --git a/drivers/sysreset/sysreset_rk3328.c b/drivers/sysreset/sysreset_rk3328.c
deleted file mode 100644
index 7b9af0925b..0000000000
--- a/drivers/sysreset/sysreset_rk3328.c
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * (C) Copyright 2016 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:	GPL-2.0
- */
-
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <sysreset.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/cru_rk3328.h>
-#include <asm/arch/hardware.h>
-#include <asm/io.h>
-#include <linux/err.h>
-
-int rk3328_sysreset_request(struct udevice *dev, enum sysreset_t type)
-{
-	struct rk3328_cru *cru = rockchip_get_cru();
-
-	if (IS_ERR(cru))
-		return PTR_ERR(cru);
-	switch (type) {
-	case SYSRESET_WARM:
-		writel(0xeca8, &cru->glb_srst_snd_value);
-		break;
-	case SYSRESET_COLD:
-		writel(0xfdb9, &cru->glb_srst_fst_value);
-		break;
-	default:
-		return -EPROTONOSUPPORT;
-	}
-
-	return -EINPROGRESS;
-}
-
-static struct sysreset_ops rk3328_sysreset = {
-	.request	= rk3328_sysreset_request,
-};
-
-U_BOOT_DRIVER(sysreset_rk3328) = {
-	.name	= "rk3328_sysreset",
-	.id	= UCLASS_SYSRESET,
-	.ops	= &rk3328_sysreset,
-};
diff --git a/drivers/sysreset/sysreset_rk3368.c b/drivers/sysreset/sysreset_rk3368.c
deleted file mode 100644
index de62921b78..0000000000
--- a/drivers/sysreset/sysreset_rk3368.c
+++ /dev/null
@@ -1,62 +0,0 @@
-/*
- * (C) Copyright Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:	GPL-2.0
- */
-
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <sysreset.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/cru_rk3368.h>
-#include <asm/arch/hardware.h>
-#include <linux/err.h>
-
-static void rk3368_pll_enter_slow_mode(struct rk3368_cru *cru)
-{
-	struct rk3368_pll *pll;
-	int i;
-
-	for (i = 0; i < 6; i++) {
-		pll = &cru->pll[i];
-		rk_clrreg(&pll->con3, PLL_MODE_MASK);
-	}
-}
-
-static int rk3368_sysreset_request(struct udevice *dev, enum sysreset_t type)
-{
-	struct rk3368_cru *cru = rockchip_get_cru();
-
-	if (IS_ERR(cru))
-		return PTR_ERR(cru);
-	switch (type) {
-	case SYSRESET_WARM:
-		rk3368_pll_enter_slow_mode(cru);
-		rk_clrsetreg(&cru->glb_rst_con, PMU_GLB_SRST_CTRL_MASK,
-			     PMU_RST_BY_SND_GLB_SRST << PMU_GLB_SRST_CTRL_SHIFT);
-		writel(0xeca8, &cru->glb_srst_snd_val);
-		break;
-	case SYSRESET_COLD:
-		rk3368_pll_enter_slow_mode(cru);
-		rk_clrsetreg(&cru->glb_rst_con, PMU_GLB_SRST_CTRL_MASK,
-			     PMU_RST_BY_FST_GLB_SRST << PMU_GLB_SRST_CTRL_SHIFT);
-		writel(0xfdb9, &cru->glb_srst_fst_val);
-		break;
-	default:
-		return -EPROTONOSUPPORT;
-	}
-
-	return -EINPROGRESS;
-}
-
-static struct sysreset_ops rk3368_sysreset = {
-	.request	= rk3368_sysreset_request,
-};
-
-U_BOOT_DRIVER(sysreset_rk3368) = {
-	.name	= "rk3368_sysreset",
-	.id	= UCLASS_SYSRESET,
-	.ops	= &rk3368_sysreset,
-};
diff --git a/drivers/sysreset/sysreset_rk3399.c b/drivers/sysreset/sysreset_rk3399.c
deleted file mode 100644
index 9a555464c6..0000000000
--- a/drivers/sysreset/sysreset_rk3399.c
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * (C) Copyright 2016 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:	GPL-2.0
- */
-
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <sysreset.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/cru_rk3399.h>
-#include <asm/arch/hardware.h>
-#include <linux/err.h>
-
-int rk3399_sysreset_request(struct udevice *dev, enum sysreset_t type)
-{
-	struct rk3399_cru *cru = rockchip_get_cru();
-
-	if (IS_ERR(cru))
-		return PTR_ERR(cru);
-	switch (type) {
-	case SYSRESET_WARM:
-		writel(0xeca8, &cru->glb_srst_snd_value);
-		break;
-	case SYSRESET_COLD:
-		writel(0xfdb9, &cru->glb_srst_fst_value);
-		break;
-	default:
-		return -EPROTONOSUPPORT;
-	}
-
-	return -EINPROGRESS;
-}
-
-static struct sysreset_ops rk3399_sysreset = {
-	.request	= rk3399_sysreset_request,
-};
-
-U_BOOT_DRIVER(sysreset_rk3399) = {
-	.name	= "rk3399_sysreset",
-	.id	= UCLASS_SYSRESET,
-	.ops	= &rk3399_sysreset,
-};
diff --git a/drivers/sysreset/sysreset_rockchip.c b/drivers/sysreset/sysreset_rockchip.c
new file mode 100644
index 0000000000..894975f3fe
--- /dev/null
+++ b/drivers/sysreset/sysreset_rockchip.c
@@ -0,0 +1,47 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <sysreset.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk3328.h>
+#include <asm/arch/hardware.h>
+#include <linux/err.h>
+
+int rockchip_sysreset_request(struct udevice *dev, enum sysreset_t type)
+{
+	struct sysreset_reg *offset = dev_get_priv(dev);
+	unsigned long cru_base = (unsigned long)rockchip_get_cru();
+
+	if (IS_ERR_VALUE(cru_base))
+		return (int)cru_base;
+
+	switch (type) {
+	case SYSRESET_WARM:
+		writel(0xeca8, cru_base + offset->glb_srst_snd_value);
+		break;
+	case SYSRESET_COLD:
+		writel(0xfdb9, cru_base + offset->glb_srst_fst_value);
+		break;
+	default:
+		return -EPROTONOSUPPORT;
+	}
+
+	return -EINPROGRESS;
+}
+
+static struct sysreset_ops rockchip_sysreset = {
+	.request	= rockchip_sysreset_request,
+};
+
+U_BOOT_DRIVER(sysreset_rockchip) = {
+	.name	= "rockchip_sysreset",
+	.id	= UCLASS_SYSRESET,
+	.ops	= &rockchip_sysreset,
+};
diff --git a/drivers/sysreset/sysreset_rv1108.c b/drivers/sysreset/sysreset_rv1108.c
deleted file mode 100644
index 9d8e9f7ade..0000000000
--- a/drivers/sysreset/sysreset_rv1108.c
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * (C) Copyright 2015 Rockchip Electronics Co., Ltd
- * Author: Andy Yan <andy.yan@rock-chips.com>
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <sysreset.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/cru_rv1108.h>
-#include <asm/arch/hardware.h>
-#include <linux/err.h>
-
-int rv1108_sysreset_request(struct udevice *dev, enum sysreset_t type)
-{
-	struct rv1108_cru *cru = rockchip_get_cru();
-
-	if (IS_ERR(cru))
-		return PTR_ERR(cru);
-
-	switch (type) {
-	case SYSRESET_WARM:
-		writel(0xeca8, &cru->glb_srst_snd_val);
-		break;
-	case SYSRESET_COLD:
-		writel(0xfdb9, &cru->glb_srst_fst_val);
-		break;
-	default:
-		return -EPROTONOSUPPORT;
-	}
-
-	return -EINPROGRESS;
-}
-
-static struct sysreset_ops rv1108_sysreset = {
-	.request	= rv1108_sysreset_request,
-};
-
-U_BOOT_DRIVER(sysreset_rv1108) = {
-	.name	= "rv1108_sysreset",
-	.id	= UCLASS_SYSRESET,
-	.ops	= &rv1108_sysreset,
-};

commit 6a43f0b024d2ae72f4554cf7d0f9a06bd6eb5b2d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 31 15:16:53 2017 +0800

    configs: evb-rk3126: enable CONFIG_CMD_CHARGE_DISPLAY
    
    Change-Id: I1bab5ca35b41428530881005cb12c0eddccb54a3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-rk3126_defconfig b/configs/evb-rk3126_defconfig
index 20fe8e98ea..950308875a 100644
--- a/configs/evb-rk3126_defconfig
+++ b/configs/evb-rk3126_defconfig
@@ -23,6 +23,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_BMP=y
 CONFIG_CMD_TIME=y
+CONFIG_CMD_CHARGE_DISPLAY=y
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_CLK=y

commit c0b38c6cdf99398b3a7a178a5409c2d45e1b1ea5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 30 18:03:56 2017 +0800

    cmd: add 'charge' cmd support
    
    It calls charge display.
    
    Change-Id: Iced07ec388b48f6849516cc67715b6a50860bc9c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 7b16720d88..87b56e2c92 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1219,6 +1219,11 @@ config CMD_REGULATOR
 	  the limits, which are found in device-tree and are kept in regulator's
 	  uclass platdata structure.
 
+config CMD_CHARGE_DISPLAY
+	bool "Enable Driver Model Charge Display command"
+	help
+	  Support U-Boot charge display.
+
 endmenu
 
 menu "Security commands"
diff --git a/cmd/Makefile b/cmd/Makefile
index c91a8e8b34..868113eab2 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -33,6 +33,7 @@ obj-$(CONFIG_CMD_CLK) += clk.o
 obj-$(CONFIG_CMD_CONFIG) += config.o
 obj-$(CONFIG_CMD_CONSOLE) += console.o
 obj-$(CONFIG_CMD_CPU) += cpu.o
+obj-$(CONFIG_CMD_CHARGE_DISPLAY) += charge.o
 obj-$(CONFIG_DATAFLASH_MMC_SELECT) += dataflash_mmc_mux.o
 obj-$(CONFIG_CMD_DATE) += date.o
 obj-$(CONFIG_CMD_DEMO) += demo.o
diff --git a/cmd/charge.c b/cmd/charge.c
new file mode 100644
index 0000000000..805fdb30f7
--- /dev/null
+++ b/cmd/charge.c
@@ -0,0 +1,38 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <command.h>
+#include <dm.h>
+#include <power/charge_display.h>
+
+static int charge_display(cmd_tbl_t *cmdtp, int flag, int argc,
+			  char *const argv[])
+{
+	int ret;
+	struct udevice *dev;
+
+	if (argc != 1)
+		return CMD_RET_USAGE;
+
+	ret = uclass_get_device(UCLASS_CHARGE_DISPLAY, 0, &dev);
+	if (ret) {
+		if (ret != -ENODEV) {
+			printf("Get UCLASS CHARGE DISPLAY failed: %d\n", ret);
+			return ret;
+		}
+
+		return 0;
+	}
+
+	return charge_display_show(dev);
+}
+
+U_BOOT_CMD(
+	charge, 1, 0, charge_display,
+	"Charge display",
+	""
+);

commit 37cb087dbc758e57a0750a6a68e9dea099b1f29e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 2 09:47:17 2017 +0800

    rockchip: rk3128: select BOARD_LATE_INIT
    
    Change-Id: I3d695600bb72bad27d64a8b30411e223a7034747
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3128/Kconfig b/arch/arm/mach-rockchip/rk3128/Kconfig
index a6e8722daf..40655a22b5 100644
--- a/arch/arm/mach-rockchip/rk3128/Kconfig
+++ b/arch/arm/mach-rockchip/rk3128/Kconfig
@@ -5,6 +5,7 @@ choice
 
 config TARGET_EVB_RK3128
 	bool "RK3128 evaluation board"
+	select BOARD_LATE_INIT
 	help
 	  RK3128evb is a evaluation board for Rockchip rk3128,
 	  with full function and phisical connectors support like

commit cffae0b6f6a4adf7194b5197cbac988a78cec9b6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 1 11:53:13 2017 +0800

    rk3128: add charge display and logo show in board late init
    
    Change-Id: I1a377f7e62465715b84386ebfd3be3abbc2f769f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3128-board.c b/arch/arm/mach-rockchip/rk3128-board.c
index fbd026aee4..55ea7f1836 100644
--- a/arch/arm/mach-rockchip/rk3128-board.c
+++ b/arch/arm/mach-rockchip/rk3128-board.c
@@ -14,7 +14,9 @@
 #include <asm/arch/grf_rk3128.h>
 #include <asm/arch/boot_mode.h>
 #include <asm/arch/timer.h>
+#include <power/charge_display.h>
 #include <power/regulator.h>
+#include <video_rockchip.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -46,6 +48,25 @@ static void setup_boot_mode(void)
 	}
 }
 
+#ifdef CONFIG_CHARGE_DISPLAY
+static int charge_display(void)
+{
+	int ret;
+	struct udevice *dev;
+
+	ret = uclass_get_device(UCLASS_CHARGE_DISPLAY, 0, &dev);
+	if (ret) {
+		if (ret != -ENODEV) {
+			printf("Get UCLASS CHARGE DISPLAY failed: %d\n", ret);
+			return ret;
+		}
+		return 0;
+	}
+
+	return charge_display_show(dev);
+}
+#endif
+
 __weak int rk_board_late_init(void)
 {
 	return 0;
@@ -55,6 +76,14 @@ int board_late_init(void)
 {
 	setup_boot_mode();
 
+#ifdef CONFIG_CHARGE_DISPLAY
+	charge_display();
+#endif
+
+#ifdef CONFIG_DRM_ROCKCHIP
+	rockchip_show_logo();
+#endif
+
 	return rk_board_late_init();
 }
 

commit 1bbb461d5b3c25c0860ea93247591ba2789bcf79
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 31 16:14:00 2017 +0800

    dm: add note for UCLASS_FG and UCLASS_KEY id
    
    Change-Id: I977f39d3f8e3c58be6f2b9e90128fb476f431af0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 255fdbd285..e74fcdd38a 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -91,8 +91,8 @@ enum uclass_id {
 	UCLASS_VIDEO_CONSOLE,	/* Text console driver for video device */
 	UCLASS_VIDEO_CRTC,	/* Display Controller */
 	UCLASS_WDT,		/* Watchdot Timer driver */
-	UCLASS_FG,
-	UCLASS_KEY,
+	UCLASS_FG,		/* Fuel gauge */
+	UCLASS_KEY,		/* Key */
 	UCLASS_RC,		/* Remote Controller */
 	UCLASS_CHARGE_DISPLAY,	/* Charge display */
 

commit e40c3d7feedc814f7c02543ffe10653c5bc1d8a7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 31 14:55:31 2017 +0800

    configs: evb-rk3126: enable charge animation
    
    Change-Id: I2ff56fd22fe6dcd05012882496ce09155cb7ad19
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-rk3126_defconfig b/configs/evb-rk3126_defconfig
index bb2c7bcbb7..20fe8e98ea 100644
--- a/configs/evb-rk3126_defconfig
+++ b/configs/evb-rk3126_defconfig
@@ -41,6 +41,8 @@ CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_REGULATOR_RK8XX=y
+CONFIG_DM_CHARGE_DISPLAY=y
+CONFIG_CHARGE_ANIMATION=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_DEBUG_UART_BASE=0x20068000

commit 1cada0aa9bb05a3d50eb62e18a8d000a81ae03d5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 31 15:30:03 2017 +0800

    ARM: dts: rk3126-evb: add charge animation node
    
    Change-Id: I16dfffb0c41d1ba20a31778918522bf8078616ea
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3126-evb.dts b/arch/arm/dts/rk3126-evb.dts
index 5c3eb378e9..ab96432cbc 100644
--- a/arch/arm/dts/rk3126-evb.dts
+++ b/arch/arm/dts/rk3126-evb.dts
@@ -148,6 +148,14 @@
 			press-threshold-microvolt = <1650000>;
 		};
 	};
+
+	charge-animation {
+		compatible = "charge-animation";
+		screen-on-voltage-threshold = <3350>;
+		power-on-voltage-threshold = <3450>;
+		power-on-soc-threshold = <0>;
+		status = "okay";
+	};
 };
 
 &i2c1 {

commit f1c8eccefa013f79019efacc657ed34b39d3f581
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 31 11:55:56 2017 +0800

    power: add charge animation support
    
    Change-Id: I3a8c3f90e4e743b06c7cd0613ac6b5863238c6a4
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index f0b6b40d3f..d6fe1af5b3 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -75,6 +75,12 @@ config SY8106A_POWER
 
 endchoice
 
+config CHARGE_ANIMATION
+	bool "Enable charge animation"
+	depends on DM_CHARGE_DISPLAY && DM_FUEL_GAUGE
+	help
+	  This adds a simple function for charge animation display.
+
 config AXP_DCDC1_VOLT
 	int "axp pmic dcdc1 voltage"
 	depends on AXP221_POWER || AXP809_POWER || AXP818_POWER
diff --git a/drivers/power/Makefile b/drivers/power/Makefile
index 0e957eb201..a80457bc37 100644
--- a/drivers/power/Makefile
+++ b/drivers/power/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_AXP209_POWER)	+= axp209.o
 obj-$(CONFIG_AXP221_POWER)	+= axp221.o
 obj-$(CONFIG_AXP809_POWER)	+= axp809.o
 obj-$(CONFIG_AXP818_POWER)	+= axp818.o
+obj-$(CONFIG_CHARGE_ANIMATION)	+= charge_animation.o
 obj-$(CONFIG_EXYNOS_TMU)	+= exynos-tmu.o
 obj-$(CONFIG_FTPMU010_POWER)	+= ftpmu010.o
 obj-$(CONFIG_SY8106A_POWER)	+= sy8106a.o
diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
new file mode 100644
index 0000000000..c68a04aa92
--- /dev/null
+++ b/drivers/power/charge_animation.c
@@ -0,0 +1,501 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <key.h>
+#include <linux/input.h>
+#include <pwm.h>
+#include <power/charge_display.h>
+#include <power/fuel_gauge.h>
+#include <power/pmic.h>
+#include <power/rk8xx_pmic.h>
+#include <power/regulator.h>
+#include <video_rockchip.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define LONG_PRESSED_TIME			2000 /* 2s */
+#define IMAGE_SHOW_RESET			-1
+
+enum key_event {
+	KEY_NOT_PRESSED = 0,
+	KEY_SHORT_PRESSED,
+	KEY_LONG_PRESSED,
+};
+
+struct charge_image {
+	const char *name;
+	int soc;
+	int period;	/* ms */
+};
+
+struct charge_animation_priv {
+	struct udevice *pmic;
+	struct udevice *fg;
+	struct udevice *pwrkey;
+	const struct charge_image *image;
+	int image_num;
+};
+
+struct charge_animation_pdata {
+	int screen_on_voltage_threshold;
+	int power_on_voltage_threshold;
+	int power_on_soc_threshold;
+	bool suspend_to_sram;
+	bool auto_start_kernel;
+};
+
+static int charge_animation_threshold_soc(struct udevice *dev)
+{
+	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
+
+	if (!pdata)
+		return -ENOSYS;
+
+	return pdata->power_on_soc_threshold;
+}
+
+static int charge_animation_threshold_voltage(struct udevice *dev)
+{
+	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
+
+	if (!pdata)
+		return -ENOSYS;
+
+	return pdata->power_on_voltage_threshold;
+}
+
+/*
+ * IF you want to use your own charge images, please:
+ *
+ * 1. Update the following 'image[]' to point to your own images;
+ * 2. You must set the failed image as last one and soc = -1 !!!
+ */
+static const struct charge_image image[] = {
+	{ .name = "battery_0.bmp", .soc = 5, .period = 600 },
+	{ .name = "battery_1.bmp", .soc = 20, .period = 600 },
+	{ .name = "battery_2.bmp", .soc = 40, .period = 600 },
+	{ .name = "battery_3.bmp", .soc = 60, .period = 600 },
+	{ .name = "battery_4.bmp", .soc = 80, .period = 600 },
+	{ .name = "battery_5.bmp", .soc = 100, .period = 600 },
+	{ .name = "battery_fail.bmp", .soc = -1, .period = 1000 },
+};
+
+static int charge_animation_ofdata_to_platdata(struct udevice *dev)
+{
+	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
+
+	if (dev_read_bool(dev, "charge,suspend-to-sram"))
+		pdata->suspend_to_sram = true;
+	else
+		pdata->suspend_to_sram = false;
+
+	if (dev_read_bool(dev, "charge,auto-start-kernel"))
+		pdata->auto_start_kernel = true;
+	else
+		pdata->auto_start_kernel = false;
+
+	pdata->power_on_soc_threshold =
+		dev_read_u32_default(dev, "power-on-soc-threshold", 0);
+	pdata->power_on_voltage_threshold =
+		dev_read_u32_default(dev, "power-on-voltage-threshold", 0);
+	pdata->screen_on_voltage_threshold =
+		dev_read_u32_default(dev, "screen-on-voltage-threshold", 0);
+
+	if (pdata->screen_on_voltage_threshold >
+	    pdata->power_on_voltage_threshold)
+		pdata->screen_on_voltage_threshold =
+					pdata->power_on_voltage_threshold;
+
+	debug("threshold soc=%d%%, voltage=%dmv, screen_on=%dmv, suspend=%d\n",
+	      pdata->power_on_soc_threshold, pdata->power_on_voltage_threshold,
+	      pdata->screen_on_voltage_threshold, pdata->suspend_to_sram);
+
+	return 0;
+}
+
+static int check_key_press(struct udevice *dev, bool restar_time)
+{
+	static unsigned long pressed_time;
+	static int old_state;
+	int report = KEY_NOT_PRESSED;
+	int state;
+
+	/* just for restart time */
+	if (restar_time) {
+		pressed_time = get_timer(0);
+		goto out;
+	}
+
+	state = key_read(dev);
+	if (state < 0) {
+		printf("read power key failed: %d\n", state);
+		goto out;
+	}
+
+	/* Start time is not initialized, let's do it */
+	if (!pressed_time && (state == KEY_PRESS_DOWN)) {
+		pressed_time = get_timer(0);
+		return KEY_NOT_PRESSED;
+	} else {
+		debug("key state = %d\n", state);
+
+		if (state == KEY_PRESS_DOWN) {
+			if (get_timer(pressed_time) >= LONG_PRESSED_TIME) {
+				report = KEY_LONG_PRESSED;
+				pressed_time = 0;
+				old_state = KEY_LONG_PRESSED;
+				printf("power key long pressed...\n");
+			}
+		/*
+		 * If you don't check 'old_state != KEY_LONG_PRESSED', it will
+		 * treat 'key long pressed' release as a 'short key pressed'
+		 * release.
+		 */
+		} else if ((state == KEY_PRESS_UP) &&
+			   (old_state != KEY_LONG_PRESSED)) {
+			report = KEY_SHORT_PRESSED;
+			old_state = report;
+			pressed_time = 0;
+			printf("power key short pressed...\n");
+		} else {
+			report = KEY_NOT_PRESSED;
+			old_state = report;
+			pressed_time = 0;
+			debug("power key Not pressed...\n");
+		}
+	}
+
+out:
+	return report;
+}
+
+static int charge_animation_show(struct udevice *dev)
+{
+	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
+	struct charge_animation_priv *priv = dev_get_priv(dev);
+	const struct charge_image *image = priv->image;
+	struct udevice *pwrkey = priv->pwrkey;
+	struct udevice *pmic = priv->pmic;
+	struct udevice *fg = priv->fg;
+	int image_num = priv->image_num;
+	bool ever_lowpower_screen_off = false;
+	bool screen_on = true;
+	ulong show_start = 0, charge_start = 0, debug_start = 0;
+	ulong ms = 0, sec = 0;
+	int start_idx = 0, show_idx = -1;
+	int soc, voltage, key_state;
+	int i, charging = 1;
+
+	/* Not charger online, exit */
+	charging = fuel_gauge_get_chrg_online(fg);
+	if (charging <= 0)
+		return 0;
+
+	voltage = fuel_gauge_get_voltage(fg);
+	if (voltage < 0) {
+		printf("get voltage failed: %d\n", voltage);
+		return -EINVAL;
+	}
+
+	/* If low power, turn off screen */
+	if (voltage <= pdata->screen_on_voltage_threshold + 50) {
+		screen_on = false;
+		ever_lowpower_screen_off = true;
+		rockchip_show_bmp(NULL);
+	}
+
+	charge_start = get_timer(0);
+
+	/* Charging ! */
+	while (1) {
+		debug("step1 (%d)... \n", screen_on);
+
+		/* Step1: Is charging now ? */
+		charging = fuel_gauge_get_chrg_online(fg);
+		if (charging <= 0) {
+			printf("Not charging, online=%d. Shutdown...\n",
+			       charging);
+
+			/* wait uart flush before shutdown */
+			mdelay(500);
+
+			/* PMIC shutdown */
+			pmic_shutdown(pmic);
+
+			printf("Cpu should never reach here, shutdown failed !\n");
+			continue;
+		}
+
+		debug("step2 (%d)... show_idx=%d\n", screen_on, show_idx);
+
+		/* Step2: get soc and voltage */
+		soc = fuel_gauge_get_soc(fg);
+		if (soc < 0 || soc > 100) {
+			printf("get soc failed: %d\n", soc);
+			continue;
+		}
+
+		voltage = fuel_gauge_get_voltage(fg);
+		if (voltage < 0) {
+			printf("get voltage failed: %d\n", voltage);
+			continue;
+		}
+
+		/*
+		 * Just for debug, otherwise there will be nothing output which
+		 * is not good to know what happen.
+		 */
+		if (!debug_start)
+			debug_start = get_timer(0);
+		if (get_timer(debug_start) > 20000) {
+			debug_start = get_timer(0);
+			printf("soc=%d, vol=%d, online=%d, screen_on=%d, show_idx=%d, ever_off=%d\n",
+			       soc, voltage, charging, screen_on, show_idx,
+			       ever_lowpower_screen_off);
+		}
+
+		/*
+		 * If ever lowpower screen off, force screen on false, which
+		 * means key event can't modify screen_on, only voltage higher
+		 * then threshold can update screen_on=true;
+		 */
+		if (ever_lowpower_screen_off)
+			screen_on = false;
+
+		/*
+		 * Auto turn on screen when voltage higher than Vol screen on.
+		 * 'ever_lowpower_screen_off' means enter while loop with
+		 * screen off.
+		 */
+		if ((ever_lowpower_screen_off) &&
+		    (voltage > pdata->screen_on_voltage_threshold)) {
+			ever_lowpower_screen_off = false;
+			screen_on = true;
+			show_idx = IMAGE_SHOW_RESET;
+		}
+
+		/*
+		 * IMAGE_SHOW_RESET means show_idx show be update by start_idx.
+		 * When short key pressed event trigged, we will set show_idx
+		 * as IMAGE_SHOW_RESET which updates images index from start_idx
+		 * that calculate by current soc.
+		 */
+		if (show_idx == IMAGE_SHOW_RESET) {
+			for (i = 0; i < image_num - 2; i++) {
+				/* Find out which image we start to show */
+				if ((soc >= image[i].soc) &&
+				    (soc < image[i + 1].soc)) {
+					start_idx = i;
+					break;
+				}
+
+				if (soc >= 100) {
+					start_idx = image_num - 2;
+					break;
+				}
+			}
+
+			debug("%s: show_idx=%d, screen_on=%d\n",
+			      __func__, show_idx, screen_on);
+
+			/* Mark start index and start time */
+			show_idx = start_idx;
+			show_start = get_timer(0);
+		}
+
+		debug("step3 (%d)... show_idx=%d\n", screen_on, show_idx);
+
+		/* Step3: show images */
+		if (screen_on) {
+			debug("SHOW: %s\n", image[show_idx].name);
+			rockchip_show_bmp(image[show_idx].name);
+		} else {
+			/*
+			 * TODO: enter low power mode:
+			 *
+			 * 1. cut off some regualtors;
+			 * 2. set 24MHZ for some PLLs;
+			 * 3. auto turn off screen when timout;
+			 * 4. power key wakeup;
+			 * 5. timer period wakeup for pmic fg ?
+			 */
+		}
+
+		mdelay(5);
+
+		/* Every image shows period */
+		if (get_timer(show_start) > image[show_idx].period) {
+			show_start = get_timer(0);
+			/* Update to next image */
+			show_idx++;
+			if (show_idx > (image_num - 2))
+				show_idx = IMAGE_SHOW_RESET;
+		}
+
+		debug("step4 (%d)... \n", screen_on);
+
+		/*
+		 * Step4: check key event.
+		 *
+		 * Short key event: turn on/off screen;
+		 * Long key event: show logo and boot system or still charging.
+		 */
+		key_state = check_key_press(pwrkey, false);
+		if (key_state == KEY_SHORT_PRESSED) {
+			/* NULL means show nothing, ie. turn off screen */
+			if (screen_on)
+				rockchip_show_bmp(NULL);
+
+			/*
+			 * Clear current image index, and show image
+			 * from start_idx
+			 */
+			show_idx = IMAGE_SHOW_RESET;
+
+			/*
+			 * We turn off screen by rockchip_show_bmp(NULL), so we
+			 * should tell while loop to stop show images any more.
+			 *
+			 * If screen_on=false, means this short key pressed
+			 * event turn on the screen and we need show images.
+			 *
+			 * If screen_on=true, means this short key pressed
+			 * event turn off the screen and we never show images.
+			 */
+			if (screen_on)
+				screen_on = false;
+			else
+				screen_on = true;
+		} else if (key_state == KEY_LONG_PRESSED) {
+			/* Only long pressed while screen off needs screen_on true */
+			if (!screen_on)
+				screen_on = true;
+
+			/* Is able to boot now ? */
+			if (soc < pdata->power_on_soc_threshold) {
+				printf("soc=%d%%, threshold soc=%d%%\n",
+				       soc, pdata->power_on_soc_threshold);
+				printf("Low power, unable to boot, charging...\n");
+				/* 'true': just for clear time of check key */
+				check_key_press(pwrkey, true);
+				show_idx = image_num - 1;
+				continue;
+			}
+
+			if (voltage < pdata->power_on_voltage_threshold) {
+				printf("voltage=%dmv, threshold voltage=%dmv\n",
+				       voltage, pdata->power_on_voltage_threshold);
+				printf("Low power, unable to boot, charging...\n");
+				/* 'true': just for clear time of check key */
+				check_key_press(pwrkey, true);
+				show_idx = image_num - 1;
+				continue;
+			}
+
+			/* Success exit charging */
+			printf("Exit charge animation...\n");
+			rockchip_show_logo();
+			break;
+		} else {
+			/* Do nothing */
+		}
+
+		debug("step5 (%d)... \n", screen_on);
+
+		/*
+		 * Step5: Check auto start kernel
+		 */
+		if (pdata->auto_start_kernel) {
+			if ((voltage >= pdata->power_on_voltage_threshold) &&
+			    (soc >= pdata->power_on_soc_threshold)) {
+				printf("Auto start, exit charge animation..\n");
+				rockchip_show_logo();
+				break;
+			}
+		}
+	}
+
+	ms = get_timer(charge_start);
+	if (ms >= 1000) {
+		sec = ms / 1000;
+		ms = ms % 1000;
+	}
+
+	printf("charging time total: %lu.%lus, soc=%d%%, vol=%dmv\n",
+	       sec, ms, soc, voltage);
+
+	return 0;
+}
+
+static const struct dm_charge_display_ops charge_animation_ops = {
+	.get_power_on_soc = charge_animation_threshold_soc,
+	.get_power_on_voltage = charge_animation_threshold_voltage,
+	.show = charge_animation_show,
+};
+
+static int charge_animation_probe(struct udevice *dev)
+{
+	struct charge_animation_priv *priv = dev_get_priv(dev);
+	struct udevice *pwrkey, *fg, *pmic;
+	int ret;
+
+	/* Get PMIC */
+	ret = uclass_get_device(UCLASS_PMIC, 0, &pmic);
+	if (ret) {
+		printf("Get UCLASS PMIC failed: %d\n", ret);
+		return ret;
+	}
+	priv->pmic = pmic;
+
+	/* Get power key */
+	for (uclass_first_device(UCLASS_KEY, &pwrkey);
+	     pwrkey;
+	     uclass_next_device(&pwrkey)) {
+		if (key_type(pwrkey) == KEY_POWER) {
+			priv->pwrkey = pwrkey;
+			break;
+		}
+	}
+	if (!priv->pwrkey) {
+		printf("Can't find any power key\n");
+		return -ENOSYS;
+	}
+
+	/* Get fuel gauge */
+	ret = uclass_get_device(UCLASS_FG, 0, &fg);
+	if (ret) {
+		printf("Get UCLASS FG failed: %d\n", ret);
+		return ret;
+	}
+	priv->fg = fg;
+
+	/* Get image */
+	priv->image = image;
+	priv->image_num = ARRAY_SIZE(image);
+
+	printf("Enable charge animation display\n");
+
+	return 0;
+}
+
+static const struct udevice_id charge_animation_ids[] = {
+	{ .compatible = "charge-animation" },
+	{ },
+};
+
+U_BOOT_DRIVER(charge_animation) = {
+	.name = "charge-animation",
+	.id = UCLASS_CHARGE_DISPLAY,
+	.probe = charge_animation_probe,
+	.of_match = charge_animation_ids,
+	.ops = &charge_animation_ops,
+	.ofdata_to_platdata = charge_animation_ofdata_to_platdata,
+	.platdata_auto_alloc_size = sizeof(struct charge_animation_pdata),
+	.priv_auto_alloc_size = sizeof(struct charge_animation_priv),
+};

commit 87b6d138dd43b3b66683694f83bd2a35cc47e8a7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 31 10:40:32 2017 +0800

    fuel gauge: rk816: do some adjustment to fit charge display framework
    
    1. fix return charger type error;
    2. initialize rsoc only when soc and voltage are beyond threshold.
    
    Change-Id: I154d205b0a2dbab84bcb26451c73f83ef0b0ac40
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk816.c b/drivers/power/fuel_gauge/fg_rk816.c
index c58df8a6c4..c98546484f 100644
--- a/drivers/power/fuel_gauge/fg_rk816.c
+++ b/drivers/power/fuel_gauge/fg_rk816.c
@@ -13,6 +13,8 @@
 #include <asm/gpio.h>
 #include <common.h>
 #include <power/pmic.h>
+#include <dm/uclass-internal.h>
+#include <power/charge_display.h>
 #include <power/fuel_gauge.h>
 #include <power/rk8xx_pmic.h>
 #include <linux/usb/phy-rockchip-inno-usb2.h>
@@ -179,9 +181,6 @@ enum dc_type {
 
 static struct udevice *g_pmic_dev;
 
-/* TODO */
-#define CONFIG_SCREEN_ON_VOL_THRESD	3400
-
 static const u32 CHRG_VOL_SEL[] = {
 	4050, 4100, 4150, 4200, 4250, 4300, 4350
 };
@@ -797,18 +796,6 @@ static bool rk816_bat_ocv_sw_reset(struct battery_info *di)
 	}
 }
 
-void rk816_bat_init_rsoc(struct battery_info *di)
-{
-	di->pwroff_min = rk816_bat_get_pwroff_min(di);
-	di->is_first_power_on = is_rk816_bat_first_poweron(di);
-	di->is_sw_reset = rk816_bat_ocv_sw_reset(di);
-
-	if (di->is_first_power_on || di->is_sw_reset)
-		rk816_bat_first_pwron(di);
-	else
-		rk816_bat_not_first_pwron(di);
-}
-
 static int rk816_bat_calc_linek(struct battery_info *di)
 {
 	int linek, diff, delta;
@@ -857,38 +844,6 @@ static void rk816_bat_init_poffset(struct battery_info *di)
 	di->poffset = coffset - ioffset;
 }
 
-static int rk816_fg_init(struct battery_info *di)
-{
-	rk816_bat_enable_gauge(di);
-	rk816_bat_set_vol_instant_mode(di);
-	rk816_bat_init_voltage_kb(di);
-	rk816_bat_init_poffset(di);
-	rk816_bat_clr_initialized_state(di);
-	di->dsoc = rk816_bat_get_dsoc(di);
-
-	/* it's better to init fg in kernel,
-	 * so avoid init in uboot as far as possible
-	 */
-	if (rk816_bat_get_usb_state(di) != NO_CHARGER) {
-		if (rk816_bat_get_est_voltage(di) < CONFIG_SCREEN_ON_VOL_THRESD)
-			rk816_bat_init_rsoc(di);
-#ifdef CONFIG_UBOOT_CHARGE
-		else
-			rk816_bat_init_rsoc(di);
-#endif
-	}
-
-	rk816_bat_init_chrg_config(di);
-	di->voltage_avg = rk816_bat_get_avg_voltage(di);
-	di->voltage_ocv = rk816_bat_get_ocv_voltage(di);
-	di->current_avg = rk816_bat_get_avg_current(di);
-	di->sm_linek = rk816_bat_calc_linek(di);
-	di->finish_chrg_base = get_timer(0);
-	di->pwr_vol = di->voltage_avg;
-
-	return 0;
-}
-
 static bool is_rk816_bat_exist(struct  battery_info *di)
 {
 	return (rk816_bat_read(SUP_STS_REG) & BAT_EXS) ? true : false;
@@ -966,6 +921,63 @@ static int rk816_bat_get_charger_type(struct battery_info *di)
 	return rk816_bat_get_usb_state(di);
 }
 
+void rk816_bat_init_rsoc(struct battery_info *di)
+{
+#ifdef CONFIG_DM_CHARGE_DISPLAY
+	struct udevice *dev;
+	int soc, voltage, est_voltage;
+	int ret;
+
+	ret = uclass_find_first_device(UCLASS_CHARGE_DISPLAY, &dev);
+	if (!ret) {
+		est_voltage = rk816_bat_get_avg_voltage(di);
+		soc = charge_display_get_power_on_soc(dev);
+		voltage = charge_display_get_power_on_voltage(dev);
+		DBG("threshold: %d%%, %dmv; now: %d%%, %dmv\n",
+		    soc, voltage, di->dsoc, est_voltage);
+		if ((di->dsoc >= soc) && (est_voltage >= voltage))
+			return;
+	}
+#endif
+
+	if (rk816_bat_get_charger_type(di) == NO_CHARGER)
+		return;
+
+	di->pwroff_min = rk816_bat_get_pwroff_min(di);
+	di->is_first_power_on = is_rk816_bat_first_poweron(di);
+	di->is_sw_reset = rk816_bat_ocv_sw_reset(di);
+
+	if (di->is_first_power_on || di->is_sw_reset)
+		rk816_bat_first_pwron(di);
+	else
+		rk816_bat_not_first_pwron(di);
+}
+
+static int rk816_fg_init(struct battery_info *di)
+{
+	rk816_bat_enable_gauge(di);
+	rk816_bat_set_vol_instant_mode(di);
+	rk816_bat_init_voltage_kb(di);
+	rk816_bat_init_poffset(di);
+	rk816_bat_clr_initialized_state(di);
+	di->dsoc = rk816_bat_get_dsoc(di);
+
+	/*
+	 * It's better to init fg in kernel,
+	 * so avoid init in uboot as far as possible.
+	 */
+	rk816_bat_init_rsoc(di);
+	rk816_bat_init_chrg_config(di);
+	di->voltage_avg = rk816_bat_get_avg_voltage(di);
+	di->voltage_ocv = rk816_bat_get_ocv_voltage(di);
+	di->current_avg = rk816_bat_get_avg_current(di);
+	di->sm_linek = rk816_bat_calc_linek(di);
+	di->finish_chrg_base = get_timer(0);
+	di->pwr_vol = di->voltage_avg;
+
+	return 0;
+}
+
 static void rk816_bat_save_dsoc(struct  battery_info *di, u8 save_soc)
 {
 	static int old_soc = -1;
@@ -1275,7 +1287,9 @@ static int rk816_bat_update_get_voltage(struct udevice *dev)
 
 static bool rk816_bat_update_get_chrg_online(struct udevice *dev)
 {
-	return rk816_bat_dwc_otg_check_dpdm();
+	struct battery_info *di = dev_get_priv(dev);
+
+	return rk816_bat_get_charger_type(di);
 }
 
 static struct dm_fuel_gauge_ops fg_ops = {

commit d38403e47b2a64c4c7a82740200f92219cf4ffe3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 1 11:54:49 2017 +0800

    video: dram: remove rockchip logo show from probe
    
    Because charge animation requires screen off when system
    power is extrem low. Logo show should be behind after
    charge animation, so remove it from probe.
    
    Change-Id: I136416de96acc09b5f3a477890ec3489d8dde96b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 1c1c2e10a6..5a746d579f 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -984,8 +984,6 @@ static int rockchip_display_probe(struct udevice *dev)
 	#ifdef CONFIG_DRM_ROCKCHIP_VIDEO_FRAMEBUFFER
 	rockchip_show_fbbase(plat->base);
 	video_set_flush_dcache(dev, true);
-	#else
-	rockchip_show_logo();
 	#endif
 
 	return 0;

commit 55b6f88e0e1645500f4c2389e3c7378f34c5e71a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 31 11:50:36 2017 +0800

    dm: add charge display uclass
    
    This is mainly used for charge animation.
    
    Change-Id: Iac4ffe76b1985abfa44181a797a15df74e5bcf14
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index 0f4ca0ea40..f0b6b40d3f 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -8,6 +8,12 @@ source "drivers/power/pmic/Kconfig"
 
 source "drivers/power/regulator/Kconfig"
 
+config DM_CHARGE_DISPLAY
+	bool "Enable driver model for charge display support"
+	depends on DM
+	help
+	  This adds a simple uclass for charge display.
+
 choice
 	prompt "Select Sunxi PMIC Variant"
 	depends on ARCH_SUNXI
diff --git a/drivers/power/Makefile b/drivers/power/Makefile
index 90a3b00a7c..0e957eb201 100644
--- a/drivers/power/Makefile
+++ b/drivers/power/Makefile
@@ -5,6 +5,8 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
 
+obj-$(CONFIG_DM_CHARGE_DISPLAY)	+= charge-display-uclass.o
+
 obj-$(CONFIG_AXP152_POWER)	+= axp152.o
 obj-$(CONFIG_AXP209_POWER)	+= axp209.o
 obj-$(CONFIG_AXP221_POWER)	+= axp221.o
diff --git a/drivers/power/charge-display-uclass.c b/drivers/power/charge-display-uclass.c
new file mode 100644
index 0000000000..41bed07ce8
--- /dev/null
+++ b/drivers/power/charge-display-uclass.c
@@ -0,0 +1,45 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <command.h>
+#include <common.h>
+#include <dm.h>
+#include <power/charge_display.h>
+
+int charge_display_get_power_on_soc(struct udevice *dev)
+{
+	const struct dm_charge_display_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->get_power_on_soc)
+		return -ENOSYS;
+
+	return ops->get_power_on_soc(dev);
+}
+
+int charge_display_get_power_on_voltage(struct udevice *dev)
+{
+	const struct dm_charge_display_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->get_power_on_voltage)
+		return -ENOSYS;
+
+	return ops->get_power_on_voltage(dev);
+}
+
+int charge_display_show(struct udevice *dev)
+{
+	const struct dm_charge_display_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->show)
+		return -ENOSYS;
+
+	return ops->show(dev);
+}
+
+UCLASS_DRIVER(charge_display) = {
+	.id	= UCLASS_CHARGE_DISPLAY,
+	.name	= "charge_display",
+};
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index fabdc849c6..255fdbd285 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -94,6 +94,7 @@ enum uclass_id {
 	UCLASS_FG,
 	UCLASS_KEY,
 	UCLASS_RC,		/* Remote Controller */
+	UCLASS_CHARGE_DISPLAY,	/* Charge display */
 
 	UCLASS_COUNT,
 	UCLASS_INVALID = -1,
diff --git a/include/power/charge_display.h b/include/power/charge_display.h
new file mode 100644
index 0000000000..9c3486ea52
--- /dev/null
+++ b/include/power/charge_display.h
@@ -0,0 +1,20 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _CHARGE_DISPLAY_H_
+#define _CHARGE_DISPLAY_H_
+
+struct dm_charge_display_ops {
+	int (*get_power_on_soc)(struct udevice *dev);
+	int (*get_power_on_voltage)(struct udevice *dev);
+	int (*show)(struct udevice *dev);
+};
+
+int charge_display_get_power_on_soc(struct udevice *dev);
+int charge_display_get_power_on_voltage(struct udevice *dev);
+int charge_display_show(struct udevice *dev);
+
+#endif

commit 7569b0b9426cbc3753852f90e432cfdc2437f5f1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 31 10:41:28 2017 +0800

    video: remove regulator set in panel_simple_unprepare
    
    Change-Id: I7c9515cb0bdd720af8e143bea1a9cc4bb2772ae2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/video/drm/panel_simple.c b/drivers/video/drm/panel_simple.c
index eda3493c3c..318d347098 100644
--- a/drivers/video/drm/panel_simple.c
+++ b/drivers/video/drm/panel_simple.c
@@ -69,15 +69,7 @@ static int panel_simple_unprepare(struct display_state *state)
 {
 	struct panel_state *panel_state = &state->panel_state;
 	struct panel_simple *panel = panel_state->private;
-	int ret;
 
-	if (panel->power_supply) {
-		ret = regulator_set_enable(panel->power_supply,
-					   !panel->power_invert);
-		if (ret)
-			printf("%s: failed to disable power_supply",
-			       __func__);
-	}
 	dm_gpio_set_value(&panel->enable, 0);
 	mdelay(panel->delay_unprepare);
 

commit aa9b1b59c9e943799d4e2c17a3aa622019ebc48f
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Wed Oct 25 18:10:38 2017 +0800

    cmd: rockusb: add rockusb command support
    
    This patch add a new rockusb command support.
    
    Rockusb command provides a way to upgrade firmware for Rockchip SoC
    based devices, its design make use of USB Bulk-Only Transport based
    on USB Mass Storage framework.
    
    Change-Id: Idb04c62a8f6fb7ba84641bd4ee00f67920a7cfc8
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 473dc7cf88..7b16720d88 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -831,6 +831,14 @@ config CMD_REMOTEPROC
 	help
 	  Support for Remote Processor control
 
+config CMD_ROCKUSB
+	bool "rockusb - Command to upgrade Rockchip device"
+	depends on USB_GADGET
+	help
+	  Rockusb command provides a way to upgrade firmware for
+	  Rockchip SoC based devices, its design make use of USB
+	  Bulk-Only Transport based on UMS framework.
+
 config CMD_RKNAND
 	bool "rknand"
 	depends on RKNAND
diff --git a/cmd/Makefile b/cmd/Makefile
index a8f9da7c93..c91a8e8b34 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -107,6 +107,7 @@ obj-$(CONFIG_CMD_REMOTEPROC) += remoteproc.o
 obj-$(CONFIG_SANDBOX) += host.o
 obj-$(CONFIG_CMD_SATA) += sata.o
 obj-$(CONFIG_CMD_NVME) += nvme.o
+obj-$(CONFIG_CMD_ROCKUSB) += rockusb.o
 obj-$(CONFIG_CMD_RKNAND) += rknand.o
 obj-$(CONFIG_CMD_SF) += sf.o
 obj-$(CONFIG_CMD_SCSI) += scsi.o disk.o
diff --git a/cmd/rockusb.c b/cmd/rockusb.c
new file mode 100644
index 0000000000..177f71ad21
--- /dev/null
+++ b/cmd/rockusb.c
@@ -0,0 +1,239 @@
+/*
+ * Copyright 2017 Rockchip Electronics Co., Ltd
+ * Frank Wang <frank.wang@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <errno.h>
+#include <common.h>
+#include <command.h>
+#include <console.h>
+#include <g_dnl.h>
+#include <part.h>
+#include <usb.h>
+#include <usb_mass_storage.h>
+#include <rockusb.h>
+
+static struct rockusb rkusb;
+static struct rockusb *g_rkusb;
+
+static int rkusb_read_sector(struct ums *ums_dev,
+			     ulong start, lbaint_t blkcnt, void *buf)
+{
+	struct blk_desc *block_dev = &ums_dev->block_dev;
+	lbaint_t blkstart = start + ums_dev->start_sector;
+
+	return blk_dread(block_dev, blkstart, blkcnt, buf);
+}
+
+static int rkusb_write_sector(struct ums *ums_dev,
+			      ulong start, lbaint_t blkcnt, const void *buf)
+{
+	struct blk_desc *block_dev = &ums_dev->block_dev;
+	lbaint_t blkstart = start + ums_dev->start_sector;
+
+	return blk_dwrite(block_dev, blkstart, blkcnt, buf);
+}
+
+static int rkusb_erase_sector(struct ums *ums_dev,
+			      ulong start, lbaint_t blkcnt)
+{
+	struct blk_desc *block_dev = &ums_dev->block_dev;
+	lbaint_t blkstart = start + ums_dev->start_sector;
+
+	return blk_derase(block_dev, blkstart, blkcnt);
+}
+
+static void rkusb_fini(void)
+{
+	int i;
+
+	for (i = 0; i < g_rkusb->ums_cnt; i++)
+		free((void *)g_rkusb->ums[i].name);
+	free(g_rkusb->ums);
+	g_rkusb->ums = NULL;
+	g_rkusb = NULL;
+	g_rkusb->ums_cnt = 0;
+}
+
+#define RKUSB_NAME_LEN 16
+
+static int rkusb_init(const char *devtype, const char *devnums_part_str)
+{
+	char *s, *t, *devnum_part_str, *name;
+	struct blk_desc *block_dev;
+	disk_partition_t info;
+	int partnum, cnt;
+	int ret = -1;
+	struct ums *ums_new;
+
+	s = strdup(devnums_part_str);
+	if (!s)
+		return -1;
+
+	t = s;
+	g_rkusb->ums_cnt = 0;
+
+	for (;;) {
+		devnum_part_str = strsep(&t, ",");
+		if (!devnum_part_str)
+			break;
+
+		partnum = blk_get_device_part_str(devtype, devnum_part_str,
+					&block_dev, &info, 1);
+		if (partnum < 0)
+			goto cleanup;
+
+		/* f_mass_storage.c assumes SECTOR_SIZE sectors */
+		if (block_dev->blksz != SECTOR_SIZE)
+			goto cleanup;
+
+		ums_new = realloc(g_rkusb->ums, (g_rkusb->ums_cnt + 1) *
+				  sizeof(*g_rkusb->ums));
+		if (!ums_new)
+			goto cleanup;
+		g_rkusb->ums = ums_new;
+		cnt = g_rkusb->ums_cnt;
+
+		/* if partnum = 0, expose all partitions */
+		if (partnum == 0) {
+			g_rkusb->ums[cnt].start_sector = 0;
+			g_rkusb->ums[cnt].num_sectors = block_dev->lba;
+		} else {
+			g_rkusb->ums[cnt].start_sector = info.start;
+			g_rkusb->ums[cnt].num_sectors = info.size;
+		}
+
+		g_rkusb->ums[cnt].read_sector = rkusb_read_sector;
+		g_rkusb->ums[cnt].write_sector = rkusb_write_sector;
+		g_rkusb->ums[cnt].erase_sector = rkusb_erase_sector;
+
+		name = malloc(RKUSB_NAME_LEN);
+		if (!name)
+			goto cleanup;
+		snprintf(name, RKUSB_NAME_LEN, "rkusb disk %d", cnt);
+		g_rkusb->ums[cnt].name = name;
+		g_rkusb->ums[cnt].block_dev = *block_dev;
+
+		printf("RKUSB: LUN %d, dev %d, hwpart %d, sector %#x, count %#x\n",
+		       g_rkusb->ums_cnt,
+		       g_rkusb->ums[cnt].block_dev.devnum,
+		       g_rkusb->ums[cnt].block_dev.hwpart,
+		       g_rkusb->ums[cnt].start_sector,
+		       g_rkusb->ums[cnt].num_sectors);
+
+		g_rkusb->ums_cnt++;
+	}
+
+	if (g_rkusb->ums_cnt)
+		ret = 0;
+
+cleanup:
+	free(s);
+	if (ret < 0)
+		rkusb_fini();
+
+	return ret;
+}
+
+static int do_rkusb(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+{
+	const char *usb_controller;
+	const char *devtype;
+	const char *devnum;
+	unsigned int controller_index;
+	int rc;
+	int cable_ready_timeout __maybe_unused;
+
+	if (argc != 4)
+		return CMD_RET_USAGE;
+
+	usb_controller = argv[1];
+	devtype = argv[2];
+	devnum	= argv[3];
+
+	g_rkusb = &rkusb;
+	rc = rkusb_init(devtype, devnum);
+	if (rc < 0)
+		return CMD_RET_FAILURE;
+
+	controller_index = (unsigned int)(simple_strtoul(
+				usb_controller,	NULL, 0));
+	if (board_usb_init(controller_index, USB_INIT_DEVICE)) {
+		error("Couldn't init USB controller.");
+		rc = CMD_RET_FAILURE;
+		goto cleanup_rkusb;
+	}
+
+	rc = fsg_init(g_rkusb->ums, g_rkusb->ums_cnt);
+	if (rc) {
+		error("fsg_init failed");
+		rc = CMD_RET_FAILURE;
+		goto cleanup_board;
+	}
+
+	rc = g_dnl_register("rkusb_ums_dnl");
+	if (rc) {
+		error("g_dnl_register failed");
+		rc = CMD_RET_FAILURE;
+		goto cleanup_board;
+	}
+
+	/* Timeout unit: seconds */
+	cable_ready_timeout = UMS_CABLE_READY_TIMEOUT;
+
+	if (!g_dnl_board_usb_cable_connected()) {
+		puts("Please connect USB cable.\n");
+
+		while (!g_dnl_board_usb_cable_connected()) {
+			if (ctrlc()) {
+				puts("\rCTRL+C - Operation aborted.\n");
+				rc = CMD_RET_SUCCESS;
+				goto cleanup_register;
+			}
+			if (!cable_ready_timeout) {
+				puts("\rUSB cable not detected.\nCommand exit.\n");
+				rc = CMD_RET_SUCCESS;
+				goto cleanup_register;
+			}
+
+			printf("\rAuto exit in: %.2d s.", cable_ready_timeout);
+			mdelay(1000);
+			cable_ready_timeout--;
+		}
+		puts("\r\n");
+	}
+
+	while (1) {
+		usb_gadget_handle_interrupts(controller_index);
+
+		rc = fsg_main_thread(NULL);
+		if (rc) {
+			/* Check I/O error */
+			if (rc == -EIO)
+				printf("\rCheck USB cable connection\n");
+
+			/* Check CTRL+C */
+			if (rc == -EPIPE)
+				printf("\rCTRL+C - Operation aborted\n");
+
+			rc = CMD_RET_SUCCESS;
+			goto cleanup_register;
+		}
+	}
+
+cleanup_register:
+	g_dnl_unregister();
+cleanup_board:
+	board_usb_cleanup(controller_index, USB_INIT_DEVICE);
+cleanup_rkusb:
+	rkusb_fini();
+
+	return rc;
+}
+
+U_BOOT_CMD(rockusb, 4, 1, do_rkusb,
+	   "Use the rockusb Protocol",
+	   "<USB_controller> <devtype> <dev[:part]>  e.g. rockusb 0 mmc 0\n"
+);
diff --git a/include/rockusb.h b/include/rockusb.h
index 6e8647b7dd..fefe24c98c 100644
--- a/include/rockusb.h
+++ b/include/rockusb.h
@@ -69,4 +69,13 @@ static inline int rkusb_cmd_process(struct fsg_common *common,
 }
 #endif
 
+/* Wait at maximum 60 seconds for cable connection */
+#define RKUSB_CABLE_READY_TIMEOUT	60
+#define SECTOR_SIZE			0x200
+
+struct rockusb {
+	struct ums *ums;
+	int ums_cnt;
+};
+
 #endif /* __ROCKUSB_H__ */

commit f16e43f88dac0a4388778d4548e1482b04c353b1
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Wed Oct 25 17:19:44 2017 +0800

    usb: gadget: add a new rockusb gadget driver
    
    This patch add a new rockusb gadget driver function.
    
    For the design, simply embeding rockusb code into USB Mass Storage
    function as using UMS framework can prominently improve upgrade speed
    and devices stability.
    
    This change does not affect the original USB Mass Storage function,
    the rockusb process are just checked by IS_RKUSB_UMS_DNL macro which
    only run when CONFIG_CMD_ROCKUSB was defined and rkusb_ums_dnl
    composite driver was registed.
    
    Change-Id: I9c2723200c7e02d947587037abcd7d3badf4256c
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/gadget/f_mass_storage.c b/drivers/usb/gadget/f_mass_storage.c
index 1ecb92ac6b..ce8a70bcb3 100644
--- a/drivers/usb/gadget/f_mass_storage.c
+++ b/drivers/usb/gadget/f_mass_storage.c
@@ -250,6 +250,7 @@
 #include <linux/usb/ch9.h>
 #include <linux/usb/gadget.h>
 #include <usb_mass_storage.h>
+#include <rockusb.h>
 
 #include <asm/unaligned.h>
 #include <linux/usb/gadget.h>
@@ -1670,6 +1671,9 @@ static int send_status(struct fsg_common *common)
 
 
 /*-------------------------------------------------------------------------*/
+#ifdef CONFIG_CMD_ROCKUSB
+#include "f_rockusb.c"
+#endif
 
 /* Check whether the command is properly formed and whether its data size
  * and direction agree with the values we already have. */
@@ -1795,6 +1799,7 @@ static int do_scsi_command(struct fsg_common *common)
 	int			i;
 	static char		unknown[16];
 	struct fsg_lun		*curlun = &common->luns[common->lun];
+	const char		*cdev_name __maybe_unused;
 
 	dump_cdb(common);
 
@@ -1810,6 +1815,16 @@ static int do_scsi_command(struct fsg_common *common)
 	common->short_packet_received = 0;
 
 	down_read(&common->filesem);	/* We're using the backing file */
+
+	cdev_name = common->fsg->function.config->cdev->driver->name;
+	if (IS_RKUSB_UMS_DNL(cdev_name)) {
+		rc = rkusb_cmd_process(common, bh, &reply);
+		if (rc == RKUSB_RC_FINISHED || rc == RKUSB_RC_ERROR)
+			goto finish;
+		else if (rc == RKUSB_RC_UNKNOWN_CMND)
+			goto unknown_cmnd;
+	}
+
 	switch (common->cmnd[0]) {
 
 	case SC_INQUIRY:
@@ -2038,6 +2053,8 @@ unknown_cmnd:
 		}
 		break;
 	}
+
+finish:
 	up_read(&common->filesem);
 
 	if (reply == -EINTR)
@@ -2693,7 +2710,10 @@ static int fsg_bind(struct usb_configuration *c, struct usb_function *f)
 	fsg->bulk_out = ep;
 
 	/* Copy descriptors */
-	f->descriptors = usb_copy_descriptors(fsg_fs_function);
+	if (IS_RKUSB_UMS_DNL(c->cdev->driver->name))
+		f->descriptors = usb_copy_descriptors(rkusb_fs_function);
+	else
+		f->descriptors = usb_copy_descriptors(fsg_fs_function);
 	if (unlikely(!f->descriptors))
 		return -ENOMEM;
 
@@ -2703,7 +2723,13 @@ static int fsg_bind(struct usb_configuration *c, struct usb_function *f)
 			fsg_fs_bulk_in_desc.bEndpointAddress;
 		fsg_hs_bulk_out_desc.bEndpointAddress =
 			fsg_fs_bulk_out_desc.bEndpointAddress;
-		f->hs_descriptors = usb_copy_descriptors(fsg_hs_function);
+
+		if (IS_RKUSB_UMS_DNL(c->cdev->driver->name))
+			f->hs_descriptors =
+				usb_copy_descriptors(rkusb_hs_function);
+		else
+			f->hs_descriptors =
+				usb_copy_descriptors(fsg_hs_function);
 		if (unlikely(!f->hs_descriptors)) {
 			free(f->descriptors);
 			return -ENOMEM;
diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
new file mode 100644
index 0000000000..b5d350a975
--- /dev/null
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -0,0 +1,332 @@
+/*
+ * Copyright 2017 Rockchip Electronics Co., Ltd
+ * Frank Wang <frank.wang@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <rockusb.h>
+
+#define ROCKUSB_INTERFACE_CLASS	0xff
+#define ROCKUSB_INTERFACE_SUB_CLASS	0x06
+#define ROCKUSB_INTERFACE_PROTOCOL	0x05
+
+static struct usb_interface_descriptor rkusb_intf_desc = {
+	.bLength		= USB_DT_INTERFACE_SIZE,
+	.bDescriptorType	= USB_DT_INTERFACE,
+	.bInterfaceNumber	= 0x00,
+	.bAlternateSetting	= 0x00,
+	.bNumEndpoints		= 0x02,
+	.bInterfaceClass	= ROCKUSB_INTERFACE_CLASS,
+	.bInterfaceSubClass	= ROCKUSB_INTERFACE_SUB_CLASS,
+	.bInterfaceProtocol	= ROCKUSB_INTERFACE_PROTOCOL,
+};
+
+static struct usb_descriptor_header *rkusb_fs_function[] = {
+	(struct usb_descriptor_header *)&rkusb_intf_desc,
+	(struct usb_descriptor_header *)&fsg_fs_bulk_in_desc,
+	(struct usb_descriptor_header *)&fsg_fs_bulk_out_desc,
+	NULL,
+};
+
+static struct usb_descriptor_header *rkusb_hs_function[] = {
+	(struct usb_descriptor_header *)&rkusb_intf_desc,
+	(struct usb_descriptor_header *)&fsg_hs_bulk_in_desc,
+	(struct usb_descriptor_header *)&fsg_hs_bulk_out_desc,
+	NULL,
+};
+
+struct rk_flash_info {
+	u32	flash_size;
+	u16	block_size;
+	u8	page_size;
+	u8	ecc_bits;
+	u8	access_time;
+	u8	manufacturer;
+	u8	flash_mask;
+} __packed;
+
+int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
+{
+	/* Enumerate as a loader device */
+	if (IS_RKUSB_UMS_DNL(name))
+		dev->bcdUSB = cpu_to_le16(0x0201);
+
+	return 0;
+}
+
+__maybe_unused
+static inline void dump_cbw(struct fsg_bulk_cb_wrap *cbw)
+{
+	assert(!cbw);
+
+	debug("%s:\n", __func__);
+	debug("Signature %x\n", cbw->Signature);
+	debug("Tag %x\n", cbw->Tag);
+	debug("DataTransferLength %x\n", cbw->DataTransferLength);
+	debug("Flags %x\n", cbw->Flags);
+	debug("LUN %x\n", cbw->Lun);
+	debug("Length %x\n", cbw->Length);
+	debug("OptionCode %x\n", cbw->CDB[0]);
+	debug("SubCode %x\n", cbw->CDB[1]);
+	debug("SectorAddr %x\n", get_unaligned_be32(&cbw->CDB[2]));
+	debug("BlkSectors %x\n\n", get_unaligned_be16(&cbw->CDB[7]));
+}
+
+static int rkusb_check_lun(struct fsg_common *common)
+{
+	struct fsg_lun *curlun;
+
+	/* Check the LUN */
+	if (common->lun >= 0 && common->lun < common->nluns) {
+		curlun = &common->luns[common->lun];
+		if (common->cmnd[0] != SC_REQUEST_SENSE) {
+			curlun->sense_data = SS_NO_SENSE;
+			curlun->info_valid = 0;
+		}
+	} else {
+		curlun = NULL;
+		common->bad_lun_okay = 0;
+
+		/*
+		 * INQUIRY and REQUEST SENSE commands are explicitly allowed
+		 * to use unsupported LUNs; all others may not.
+		 */
+		if (common->cmnd[0] != SC_INQUIRY &&
+		    common->cmnd[0] != SC_REQUEST_SENSE) {
+			debug("unsupported LUN %d\n", common->lun);
+			return -EINVAL;
+		}
+	}
+
+	return 0;
+}
+
+static void __do_reset(struct usb_ep *ep, struct usb_request *req)
+{
+	do_reset(NULL, 0, 0, NULL);
+}
+
+static int rkusb_do_reset(struct fsg_common *common,
+			  struct fsg_buffhd *bh)
+{
+	common->data_size_from_cmnd = common->cmnd[4];
+	common->residue = 0;
+	bh->inreq->complete = __do_reset;
+	bh->state = BUF_STATE_EMPTY;
+
+	return 0;
+}
+
+static int rkusb_do_test_unit_ready(struct fsg_common *common,
+				    struct fsg_buffhd *bh)
+{
+	common->residue = 0x06 << 24; /* Max block xfer support from host */
+	common->data_dir = DATA_DIR_NONE;
+	bh->state = BUF_STATE_EMPTY;
+
+	return 0;
+}
+
+static int rkusb_do_read_flash_id(struct fsg_common *common,
+				  struct fsg_buffhd *bh)
+{
+	u8 *buf = (u8 *)bh->buf;
+	u32 len = common->data_size;
+
+	memcpy((void *)&buf[0], "EMMC ", 5);
+
+	/* Set data xfer size */
+	common->residue = common->data_size_from_cmnd = len;
+
+	return len;
+}
+
+static int rkusb_do_test_bad_block(struct fsg_common *common,
+				   struct fsg_buffhd *bh)
+{
+	u8 *buf = (u8 *)bh->buf;
+	u32 len = common->data_size;
+
+	memset((void *)&buf[0], 0, len);
+
+	/* Set data xfer size */
+	common->residue = common->data_size_from_cmnd = len;
+
+	return len;
+}
+
+static int rkusb_do_read_flash_info(struct fsg_common *common,
+				    struct fsg_buffhd *bh)
+{
+	u8 *buf = (u8 *)bh->buf;
+	u32 len = common->data_size;
+	struct rk_flash_info finfo = {
+		.block_size = 1024,
+		.ecc_bits = 0,
+		.page_size = 4,
+		.access_time = 40,
+		.manufacturer = 0,
+		.flash_mask = 0
+	};
+
+	finfo.flash_size = (u32)ums[common->lun].block_dev.lba;
+	if (finfo.flash_size)
+		finfo.flash_mask = 1;
+
+	memset((void *)&buf[0], 0, len);
+	memcpy((void *)&buf[0], (void *)&finfo, len);
+
+	/* Set data xfer size */
+	common->residue = common->data_size_from_cmnd = len;
+
+	return len;
+}
+
+static int rkusb_do_lba_erase(struct fsg_common *common,
+			      struct fsg_buffhd *bh)
+{
+	struct fsg_lun *curlun = &common->luns[common->lun];
+	u32 lba, amount;
+	loff_t file_offset;
+	int rc;
+
+	lba = get_unaligned_be32(&common->cmnd[2]);
+	if (lba >= curlun->num_sectors) {
+		curlun->sense_data = SS_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE;
+		rc = -EINVAL;
+		goto out;
+	}
+
+	file_offset = ((loff_t) lba) << 9;
+	amount = get_unaligned_be16(&common->cmnd[7]) << 9;
+	if (unlikely(amount == 0)) {
+		curlun->sense_data = SS_INVALID_FIELD_IN_CDB;
+		rc = -EIO;
+		goto out;
+	}
+
+	/* Perform the erase */
+	rc = ums[common->lun].erase_sector(&ums[common->lun],
+			       file_offset / SECTOR_SIZE,
+			       amount / SECTOR_SIZE);
+	if (!rc) {
+		curlun->sense_data = SS_MEDIUM_NOT_PRESENT;
+		rc = -EIO;
+	}
+
+out:
+	common->data_dir = DATA_DIR_NONE;
+	bh->state = BUF_STATE_EMPTY;
+
+	return rc;
+}
+
+static int rkusb_do_read_capacity(struct fsg_common *common,
+				    struct fsg_buffhd *bh)
+{
+	u8 *buf = (u8 *)bh->buf;
+	u32 len = common->data_size;
+
+	/*
+	 * bit[0]: Direct LBA, 0: Disabled;
+	 * bit[1:63}: Reserved.
+	 */
+	memset((void *)&buf[0], 0, len);
+
+	/* Set data xfer size */
+	common->residue = common->data_size_from_cmnd = len;
+
+	return len;
+}
+
+static int rkusb_cmd_process(struct fsg_common *common,
+			     struct fsg_buffhd *bh, int *reply)
+{
+	struct usb_request	*req = bh->outreq;
+	struct fsg_bulk_cb_wrap	*cbw = req->buf;
+	int rc;
+
+	dump_cbw(cbw);
+
+	if (rkusb_check_lun(common)) {
+		*reply = -EINVAL;
+		return RKUSB_RC_ERROR;
+	}
+
+	switch (common->cmnd[0]) {
+	case RKUSB_TEST_UNIT_READY:
+		*reply = rkusb_do_test_unit_ready(common, bh);
+		rc = RKUSB_RC_FINISHED;
+		break;
+
+	case RKUSB_READ_FLASH_ID:
+		*reply = rkusb_do_read_flash_id(common, bh);
+		rc = RKUSB_RC_FINISHED;
+		break;
+
+	case RKUSB_TEST_BAD_BLOCK:
+		*reply = rkusb_do_test_bad_block(common, bh);
+		rc = RKUSB_RC_FINISHED;
+		break;
+
+	case RKUSB_LBA_READ_10:
+		common->cmnd[0] = SC_READ_10;
+		common->cmnd[1] = 0; /* Not support */
+		rc = RKUSB_RC_CONTINUE;
+		break;
+
+	case RKUSB_LBA_WRITE_10:
+		common->cmnd[0] = SC_WRITE_10;
+		common->cmnd[1] = 0; /* Not support */
+		rc = RKUSB_RC_CONTINUE;
+		break;
+
+	case RKUSB_READ_FLASH_INFO:
+		*reply = rkusb_do_read_flash_info(common, bh);
+		rc = RKUSB_RC_FINISHED;
+		break;
+
+	case RKUSB_LBA_ERASE:
+		*reply = rkusb_do_lba_erase(common, bh);
+		rc = RKUSB_RC_FINISHED;
+		break;
+
+	case RKUSB_READ_CAPACITY:
+		*reply = rkusb_do_read_capacity(common, bh);
+		rc = RKUSB_RC_FINISHED;
+		break;
+
+	case RKUSB_RESET:
+		*reply = rkusb_do_reset(common, bh);
+		rc = RKUSB_RC_FINISHED;
+		break;
+
+	case RKUSB_SET_DEVICE_ID:
+	case RKUSB_READ_10:
+	case RKUSB_WRITE_10:
+	case RKUSB_ERASE_10:
+	case RKUSB_WRITE_SPARE:
+	case RKUSB_READ_SPARE:
+	case RKUSB_ERASE_10_FORCE:
+	case RKUSB_GET_VERSION:
+	case RKUSB_ERASE_SYS_DISK:
+	case RKUSB_SDRAM_READ_10:
+	case RKUSB_SDRAM_WRITE_10:
+	case RKUSB_SDRAM_EXECUTE:
+	case RKUSB_GET_CHIP_VER:
+	case RKUSB_LOW_FORMAT:
+	case RKUSB_SET_RESET_FLAG:
+	case RKUSB_SPI_READ_10:
+	case RKUSB_SPI_WRITE_10:
+	case RKUSB_SESSION:
+		/* Fall through */
+	default:
+		rc = RKUSB_RC_UNKNOWN_CMND;
+		break;
+	}
+
+	return rc;
+}
+
+DECLARE_GADGET_BIND_CALLBACK(rkusb_ums_dnl, fsg_add);
diff --git a/include/rockusb.h b/include/rockusb.h
new file mode 100644
index 0000000000..6e8647b7dd
--- /dev/null
+++ b/include/rockusb.h
@@ -0,0 +1,72 @@
+/*
+ * Copyright 2017 Rockchip Electronics Co., Ltd
+ * Frank Wang <frank.wang@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __ROCKUSB_H__
+#define __ROCKUSB_H__
+
+#include <common.h>
+#include <part.h>
+#include <linux/usb/composite.h>
+
+enum rkusb_cmd {
+	RKUSB_TEST_UNIT_READY	= 0x00,
+	RKUSB_READ_FLASH_ID	= 0x01,
+	RKUSB_SET_DEVICE_ID	= 0x02,
+	RKUSB_TEST_BAD_BLOCK	= 0x03,
+	RKUSB_READ_10		= 0x04,
+	RKUSB_WRITE_10		= 0x05,
+	RKUSB_ERASE_10		= 0x06,
+	RKUSB_WRITE_SPARE	= 0x07,
+	RKUSB_READ_SPARE	= 0x08,
+	RKUSB_ERASE_10_FORCE	= 0x0B,
+	RKUSB_GET_VERSION	= 0x0C,
+	RKUSB_LBA_READ_10	= 0x14,
+	RKUSB_LBA_WRITE_10	= 0x15,
+	RKUSB_ERASE_SYS_DISK	= 0x16,
+	RKUSB_SDRAM_READ_10	= 0x17,
+	RKUSB_SDRAM_WRITE_10	= 0x18,
+	RKUSB_SDRAM_EXECUTE	= 0x19,
+	RKUSB_READ_FLASH_INFO	= 0x1A,
+	RKUSB_GET_CHIP_VER	= 0x1B,
+	RKUSB_LOW_FORMAT	= 0x1C,
+	RKUSB_SET_RESET_FLAG	= 0x1E,
+	RKUSB_SPI_READ_10	= 0x21,
+	RKUSB_SPI_WRITE_10	= 0x22,
+	RKUSB_LBA_ERASE		= 0x25,
+	RKUSB_SESSION		= 0x30,
+	RKUSB_READ_CAPACITY	= 0xAA,
+	RKUSB_RESET		= 0xFF,
+};
+
+enum rkusb_rc {
+	RKUSB_RC_ERROR		= -1,
+	RKUSB_RC_CONTINUE	= 0,
+	RKUSB_RC_FINISHED	= 1,
+	RKUSB_RC_UNKNOWN_CMND	= 2,
+};
+
+#ifdef CONFIG_CMD_ROCKUSB
+#define IS_RKUSB_UMS_DNL(name)	(!strncmp((name), "rkusb_ums_dnl", 13))
+#else
+#define IS_RKUSB_UMS_DNL(name)	0
+
+struct fsg_buffhd;
+struct fsg_dev;
+struct fsg_common;
+struct fsg_config;
+
+static struct usb_descriptor_header *rkusb_fs_function[];
+static struct usb_descriptor_header *rkusb_hs_function[];
+
+static inline int rkusb_cmd_process(struct fsg_common *common,
+				    struct fsg_buffhd *bh, int *reply)
+{
+	return -EPERM;
+}
+#endif
+
+#endif /* __ROCKUSB_H__ */
diff --git a/include/usb_mass_storage.h b/include/usb_mass_storage.h
index 8229f62b97..dc2b85e029 100644
--- a/include/usb_mass_storage.h
+++ b/include/usb_mass_storage.h
@@ -20,6 +20,9 @@ struct ums {
 			   ulong start, lbaint_t blkcnt, void *buf);
 	int (*write_sector)(struct ums *ums_dev,
 			    ulong start, lbaint_t blkcnt, const void *buf);
+#ifdef CONFIG_CMD_ROCKUSB
+	int (*erase_sector)(struct ums *ums_dev, ulong start, lbaint_t blkcnt);
+#endif
 	unsigned int start_sector;
 	unsigned int num_sectors;
 	const char *name;

commit b3032eb3f0e591cff72a8c2034d27917298e05de
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Fri Oct 27 11:11:27 2017 +0800

    arm: rockchip: add the dependence for CMD_ROCKUSB
    
    The rockusb command must work in USB gadget download framework,
    this change adds USB_GADGET_DOWNLOAD dependence for CMD_ROCKUSB.
    
    Change-Id: I27246588a427b2ca958225c992265e053e90b3da
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index ded670dde3..194394ec4f 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1112,8 +1112,8 @@ config ARCH_ROCKCHIP
 	select DM_USB if USB
 	select DM_PWM
 	select DM_REGULATOR
+	select CMD_ROCKUSB if USB_GADGET_DOWNLOAD
 	imply CMD_FASTBOOT
-	imply CMD_ROCKUSB
 	imply FASTBOOT
 	imply FAT_WRITE
 	imply USB_FUNCTION_FASTBOOT

commit 8f3e6817094a330bba98b4f3ee845f97aed68783
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Mon Oct 30 14:50:44 2017 +0800

    rockchip: add usb mass storage gadget for common functions
    
    The rockusb command implementation depend on USB mass storage gadget,
    so enable it for all rockchip common files as default.
    
    Change-Id: I5c2cd8aaf44af077b38f70099b1bea033b0a3e34
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h
index cfa5364710..7bd67e9ef5 100644
--- a/include/configs/rk3188_common.h
+++ b/include/configs/rk3188_common.h
@@ -69,6 +69,10 @@
 #define CONFIG_SF_DEFAULT_SPEED 20000000
 
 #ifndef CONFIG_SPL_BUILD
+
+/* usb mass storage */
+#define CONFIG_USB_FUNCTION_MASS_STORAGE
+
 /* usb otg */
 #define CONFIG_ROCKCHIP_USB2_PHY
 
diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index f8884c9511..ecc0219cd7 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -45,6 +45,9 @@
 
 #ifndef CONFIG_SPL_BUILD
 
+/* usb mass storage */
+#define CONFIG_USB_FUNCTION_MASS_STORAGE
+
 #define ENV_MEM_LAYOUT_SETTINGS \
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h
index b414553565..86d1a1c808 100644
--- a/include/configs/rk3368_common.h
+++ b/include/configs/rk3368_common.h
@@ -40,6 +40,10 @@
 #define CONFIG_BOUNCE_BUFFER
 
 #ifndef CONFIG_SPL_BUILD
+
+/* usb mass storage */
+#define CONFIG_USB_FUNCTION_MASS_STORAGE
+
 #define ENV_MEM_LAYOUT_SETTINGS \
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h
index 549839d4d6..bfb11ffdff 100644
--- a/include/configs/rv1108_common.h
+++ b/include/configs/rv1108_common.h
@@ -27,6 +27,9 @@
 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_TEXT_BASE + 0x100000)
 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x2000000)
 
+/* usb mass storage */
+#define CONFIG_USB_FUNCTION_MASS_STORAGE
+
 /* rockchip ohci host driver */
 #define CONFIG_USB_OHCI_NEW
 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	1

commit d5c4b898d3e5f36286b27634c234963347585494
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Wed Oct 25 17:10:51 2017 +0800

    Revert "usb: rockchip: add rockusb command"
    
    Will make use of UMS framework to support rockusb command.
    
    This reverts commit 301fce6(usb: rockchip: add rockusb command).
    
    Change-Id: Iec2ed64212851a85e8570dcfaa5507a5b55c29c5
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/cmd/Kconfig b/cmd/Kconfig
index dfc11a49a9..473dc7cf88 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -838,15 +838,6 @@ config CMD_RKNAND
 	help
 	  Rockchip NAND FLASH device support
 
-config CMD_ROCKUSB
-	bool "rockusb"
-	depends on USB_FUNCTION_ROCKUSB
-	help
-	  Rockusb protocol is widely used by Rockchip SoC based devices. It can
-	  read/write info, image to/from devices. This enable rockusb command
-	  support to comunication with rockusb device. for more detail about
-	  this command, please read doc/README.rockusb.
-
 config CMD_SATA
 	bool "sata - Access SATA subsystem"
 	select SATA
diff --git a/cmd/Makefile b/cmd/Makefile
index 17ae86dd77..a8f9da7c93 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -104,7 +104,6 @@ obj-$(CONFIG_CMD_READ) += read.o
 obj-$(CONFIG_CMD_REGINFO) += reginfo.o
 obj-$(CONFIG_CMD_REISER) += reiser.o
 obj-$(CONFIG_CMD_REMOTEPROC) += remoteproc.o
-obj-$(CONFIG_CMD_ROCKUSB) += rockusb.o
 obj-$(CONFIG_SANDBOX) += host.o
 obj-$(CONFIG_CMD_SATA) += sata.o
 obj-$(CONFIG_CMD_NVME) += nvme.o
diff --git a/cmd/rockusb.c b/cmd/rockusb.c
deleted file mode 100644
index ae2baa672b..0000000000
--- a/cmd/rockusb.c
+++ /dev/null
@@ -1,74 +0,0 @@
-/*
- * Copyright (C) 2017 Eddie Cai <eddie.cai.linux@gmail.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <command.h>
-#include <console.h>
-#include <g_dnl.h>
-#include <usb.h>
-#include <asm/arch/f_rockusb.h>
-
-static int do_rockusb(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
-{
-	int controller_index, dev_index;
-	char *usb_controller;
-	char *devtype;
-	char *devnum;
-	int ret;
-
-	if (argc < 2)
-		return CMD_RET_USAGE;
-
-	usb_controller = argv[1];
-	controller_index = simple_strtoul(usb_controller, NULL, 0);
-
-	if (argc >= 4) {
-		devtype = argv[2];
-		devnum  = argv[3];
-	} else {
-		return CMD_RET_USAGE;
-	}
-	dev_index = simple_strtoul(devnum, NULL, 0);
-	rockusb_dev_init(devtype, dev_index);
-
-	ret = board_usb_init(controller_index, USB_INIT_DEVICE);
-	if (ret) {
-		error("USB init failed: %d", ret);
-		return CMD_RET_FAILURE;
-	}
-
-	g_dnl_clear_detach();
-	ret = g_dnl_register("usb_dnl_rockusb");
-	if (ret)
-		return CMD_RET_FAILURE;
-
-	if (!g_dnl_board_usb_cable_connected()) {
-		puts("\rUSB cable not detected, Command exit.\n");
-		ret = CMD_RET_FAILURE;
-		goto exit;
-	}
-
-	while (1) {
-		if (g_dnl_detach())
-			break;
-		if (ctrlc())
-			break;
-		usb_gadget_handle_interrupts(controller_index);
-	}
-	ret = CMD_RET_SUCCESS;
-
-exit:
-	g_dnl_unregister();
-	g_dnl_clear_detach();
-	board_usb_cleanup(controller_index, USB_INIT_DEVICE);
-
-	return ret;
-}
-
-U_BOOT_CMD(rockusb, 4, 1, do_rockusb,
-	   "use the rockusb protocol",
-	   "<USB_controller> <devtype> <dev[:part]>  e.g. rockusb 0 mmc 0\n"
-);

commit 7a4b7544d78e017ef53d126bc443bb9713626586
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Wed Oct 25 16:47:45 2017 +0800

    Revert "usb: rockchip: add the rockusb gadget"
    
    Instead of using fastboot framework it is better to use ums framework
    to improve firmware upgrade speed. Will add a new rockusb driver next.
    
    This reverts commit c7cd0ba("usb: rockchip: add the rockusb gadget").
    
    Change-Id: Ie578ee94e247780d6f9b56156b0ccf737fa18cb9
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/f_rockusb.h b/arch/arm/include/asm/arch-rockchip/f_rockusb.h
deleted file mode 100644
index c207a787f9..0000000000
--- a/arch/arm/include/asm/arch-rockchip/f_rockusb.h
+++ /dev/null
@@ -1,132 +0,0 @@
-/*
- * (C) Copyright 2017
- *
- * Eddie Cai <eddie.cai.linux@gmail.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef _F_ROCKUSB_H_
-#define _F_ROCKUSB_H_
-#include <blk.h>
-
-#define ROCKUSB_VERSION		"0.1"
-
-#define ROCKUSB_INTERFACE_CLASS	0xff
-#define ROCKUSB_INTERFACE_SUB_CLASS	0x06
-#define ROCKUSB_INTERFACE_PROTOCOL	0x05
-
-#define RX_ENDPOINT_MAXIMUM_PACKET_SIZE_2_0  (0x0200)
-#define RX_ENDPOINT_MAXIMUM_PACKET_SIZE_1_1  (0x0040)
-#define TX_ENDPOINT_MAXIMUM_PACKET_SIZE      (0x0040)
-
-#define EP_BUFFER_SIZE			4096
-/*
- * EP_BUFFER_SIZE must always be an integral multiple of maxpacket size
- * (64 or 512 or 1024), else we break on certain controllers like DWC3
- * that expect bulk OUT requests to be divisible by maxpacket size.
- */
-
-#define CONFIG_ROCKUSB_BUF_ADDR		CONFIG_SYS_LOAD_ADDR
-#define CONFIG_ROCKUSB_BUF_SIZE		0x08000000
-
-#define RKUSB_STATUS_IDLE			0
-#define RKUSB_STATUS_CMD			1
-#define RKUSB_STATUS_RXDATA			2
-#define RKUSB_STATUS_TXDATA			3
-#define RKUSB_STATUS_CSW			4
-#define RKUSB_STATUS_RXDATA_PREPARE		5
-#define RKUSB_STATUS_TXDATA_PREPARE		6
-
-enum rkusb_command {
-K_FW_TEST_UNIT_READY	= 0x00,
-K_FW_READ_FLASH_ID = 0x01,
-K_FW_SET_DEVICE_ID = 0x02,
-K_FW_TEST_BAD_BLOCK = 0x03,
-K_FW_READ_10 = 0x04,
-K_FW_WRITE_10 = 0x05,
-K_FW_ERASE_10 = 0x06,
-K_FW_WRITE_SPARE = 0x07,
-K_FW_READ_SPARE = 0x08,
-
-K_FW_ERASE_10_FORCE = 0x0b,
-K_FW_GET_VERSION = 0x0c,
-
-K_FW_LBA_READ_10 = 0x14,
-K_FW_LBA_WRITE_10 = 0x15,
-K_FW_ERASE_SYS_DISK = 0x16,
-K_FW_SDRAM_READ_10 = 0x17,
-K_FW_SDRAM_WRITE_10 = 0x18,
-K_FW_SDRAM_EXECUTE = 0x19,
-K_FW_READ_FLASH_INFO = 0x1A,
-K_FW_GET_CHIP_VER = 0x1B,
-K_FW_LOW_FORMAT = 0x1C,
-K_FW_SET_RESET_FLAG = 0x1E,
-K_FW_SPI_READ_10 = 0x21,
-K_FW_SPI_WRITE_10 = 0x22,
-
-K_FW_SESSION = 0X30,
-K_FW_RESET = 0xff,
-};
-
-#define CBW_DIRECTION_OUT		0x00
-#define CBW_DIRECTION_IN		0x80
-
-struct cmd_dispatch_info {
-	enum rkusb_command cmd;
-	/* call back function to handle rockusb command */
-	void (*cb)(struct usb_ep *ep, struct usb_request *req);
-};
-
-/* Bulk-only data structures */
-
-/* Command Block Wrapper */
-struct fsg_bulk_cb_wrap {
-	__le32  signature;              /* Contains 'USBC' */
-	u32     tag;                    /* Unique per command id */
-	__le32  data_transfer_length;   /* Size of the data */
-	u8      flags;                  /* Direction in bit 7 */
-	u8      lun;                    /* lun (normally 0) */
-	u8      length;                 /* Of the CDB, <= MAX_COMMAND_SIZE */
-	u8      CDB[16];                /* Command Data Block */
-};
-
-#define USB_BULK_CB_WRAP_LEN    31
-#define USB_BULK_CB_SIG         0x43425355      /* Spells out USBC */
-#define USB_BULK_IN_FLAG        0x80
-
-/* Command status Wrapper */
-struct bulk_cs_wrap {
-	__le32  signature;              /* Should = 'USBS' */
-	u32     tag;                    /* Same as original command */
-	__le32  residue;                /* Amount not transferred */
-	u8      status;                 /* See below */
-};
-
-#define USB_BULK_CS_WRAP_LEN    13
-#define USB_BULK_CS_SIG         0x53425355      /* Spells out 'USBS' */
-#define USB_STATUS_PASS         0
-#define USB_STATUS_FAIL         1
-#define USB_STATUS_PHASE_ERROR  2
-
-#define CSW_GOOD                0x00
-#define CSW_FAIL                0x01
-
-struct f_rockusb {
-	struct usb_function usb_function;
-	struct usb_ep *in_ep, *out_ep;
-	struct usb_request *in_req, *out_req;
-	char *rockusb_dev_type;
-	unsigned int rockusb_dev_index;
-	unsigned int download_tag;
-	unsigned int download_lba;
-	unsigned int download_size;
-	unsigned int download_bytes;
-	struct blk_desc *download_desc;
-	int reboot_flag;
-};
-
-/* init rockusb device, tell rockusb which device you want to read/write*/
-void rockusb_dev_init(char *dev_type, int dev_index);
-#endif /* _F_ROCKUSB_H_ */
-
diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index 8e3a886536..e065c5aeb3 100644
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -1123,7 +1123,7 @@ static int dwc3_gadget_ep_dequeue(struct usb_ep *ep,
 			dwc3_stop_active_transfer(dwc, dep->number, true);
 			goto out1;
 		}
-		dev_vdbg(dwc->dev, "request %p was not queued to %s\n",
+		dev_err(dwc->dev, "request %p was not queued to %s\n",
 				request, ep->name);
 		ret = -EINVAL;
 		goto out0;
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index 423d1f248e..225b66bc95 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -119,14 +119,6 @@ config G_DNL_VENDOR_NUM
 config G_DNL_PRODUCT_NUM
 	hex "Product ID of USB device"
 
-config USB_FUNCTION_ROCKUSB
-	bool "Enable USB rockusb gadget"
-	help
-	  Rockusb protocol is widely used by Rockchip SoC based devices. It can
-	  read/write info, image to/from devices. This enables the USB part of
-	  the rockusb gadget.for more detail about Rockusb protocol, please see
-	  doc/README.rockusb
-
 config USBNET_DEVADDR
 	string "USB Gadget Ethernet device mac address"
 	default "de:ad:be:ef:00:01"
diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile
index 691f373aeb..7258099c1c 100644
--- a/drivers/usb/gadget/Makefile
+++ b/drivers/usb/gadget/Makefile
@@ -29,7 +29,6 @@ obj-$(CONFIG_USB_FUNCTION_THOR) += f_thor.o
 obj-$(CONFIG_USB_FUNCTION_DFU) += f_dfu.o
 obj-$(CONFIG_USB_FUNCTION_MASS_STORAGE) += f_mass_storage.o
 obj-$(CONFIG_USB_FUNCTION_FASTBOOT) += f_fastboot.o
-obj-$(CONFIG_USB_FUNCTION_ROCKUSB) += f_rockusb.o
 obj-$(CONFIG_USB_FUNCTION_SDP) += f_sdp.o
 endif
 endif
diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
deleted file mode 100644
index d218b6da8f..0000000000
--- a/drivers/usb/gadget/f_rockusb.c
+++ /dev/null
@@ -1,691 +0,0 @@
-/*
- * (C) Copyright 2017
- *
- * Eddie Cai <eddie.cai.linux@gmail.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <config.h>
-#include <common.h>
-#include <errno.h>
-#include <malloc.h>
-#include <memalign.h>
-#include <linux/usb/ch9.h>
-#include <linux/usb/gadget.h>
-#include <linux/usb/composite.h>
-#include <linux/compiler.h>
-#include <version.h>
-#include <g_dnl.h>
-#include <asm/arch/f_rockusb.h>
-
-static inline struct f_rockusb *func_to_rockusb(struct usb_function *f)
-{
-	return container_of(f, struct f_rockusb, usb_function);
-}
-
-static struct usb_endpoint_descriptor fs_ep_in = {
-	.bLength            = USB_DT_ENDPOINT_SIZE,
-	.bDescriptorType    = USB_DT_ENDPOINT,
-	.bEndpointAddress   = USB_DIR_IN,
-	.bmAttributes       = USB_ENDPOINT_XFER_BULK,
-	.wMaxPacketSize     = cpu_to_le16(64),
-};
-
-static struct usb_endpoint_descriptor fs_ep_out = {
-	.bLength		= USB_DT_ENDPOINT_SIZE,
-	.bDescriptorType	= USB_DT_ENDPOINT,
-	.bEndpointAddress	= USB_DIR_OUT,
-	.bmAttributes		= USB_ENDPOINT_XFER_BULK,
-	.wMaxPacketSize		= cpu_to_le16(64),
-};
-
-static struct usb_endpoint_descriptor hs_ep_in = {
-	.bLength		= USB_DT_ENDPOINT_SIZE,
-	.bDescriptorType	= USB_DT_ENDPOINT,
-	.bEndpointAddress	= USB_DIR_IN,
-	.bmAttributes		= USB_ENDPOINT_XFER_BULK,
-	.wMaxPacketSize		= cpu_to_le16(512),
-};
-
-static struct usb_endpoint_descriptor hs_ep_out = {
-	.bLength		= USB_DT_ENDPOINT_SIZE,
-	.bDescriptorType	= USB_DT_ENDPOINT,
-	.bEndpointAddress	= USB_DIR_OUT,
-	.bmAttributes		= USB_ENDPOINT_XFER_BULK,
-	.wMaxPacketSize		= cpu_to_le16(512),
-};
-
-static struct usb_interface_descriptor interface_desc = {
-	.bLength		= USB_DT_INTERFACE_SIZE,
-	.bDescriptorType	= USB_DT_INTERFACE,
-	.bInterfaceNumber	= 0x00,
-	.bAlternateSetting	= 0x00,
-	.bNumEndpoints		= 0x02,
-	.bInterfaceClass	= ROCKUSB_INTERFACE_CLASS,
-	.bInterfaceSubClass	= ROCKUSB_INTERFACE_SUB_CLASS,
-	.bInterfaceProtocol	= ROCKUSB_INTERFACE_PROTOCOL,
-};
-
-static struct usb_descriptor_header *rkusb_fs_function[] = {
-	(struct usb_descriptor_header *)&interface_desc,
-	(struct usb_descriptor_header *)&fs_ep_in,
-	(struct usb_descriptor_header *)&fs_ep_out,
-};
-
-static struct usb_descriptor_header *rkusb_hs_function[] = {
-	(struct usb_descriptor_header *)&interface_desc,
-	(struct usb_descriptor_header *)&hs_ep_in,
-	(struct usb_descriptor_header *)&hs_ep_out,
-	NULL,
-};
-
-static const char rkusb_name[] = "Rockchip Rockusb";
-
-static struct usb_string rkusb_string_defs[] = {
-	[0].s = rkusb_name,
-	{  }			/* end of list */
-};
-
-static struct usb_gadget_strings stringtab_rkusb = {
-	.language	= 0x0409,	/* en-us */
-	.strings	= rkusb_string_defs,
-};
-
-static struct usb_gadget_strings *rkusb_strings[] = {
-	&stringtab_rkusb,
-	NULL,
-};
-
-static struct f_rockusb *rockusb_func;
-static void rx_handler_command(struct usb_ep *ep, struct usb_request *req);
-static int rockusb_tx_write_csw(u32 tag, int residue, u8 status, int size);
-
-struct f_rockusb *get_rkusb(void)
-{
-	struct f_rockusb *f_rkusb = rockusb_func;
-	if (!f_rkusb) {
-		f_rkusb = memalign(CONFIG_SYS_CACHELINE_SIZE, sizeof(*f_rkusb));
-		if (!f_rkusb)
-			return 0;
-
-		rockusb_func = f_rkusb;
-		memset(f_rkusb, 0, sizeof(*f_rkusb));
-	}
-	return f_rkusb;
-}
-
-static struct usb_endpoint_descriptor *rkusb_ep_desc(
-struct usb_gadget *g,
-struct usb_endpoint_descriptor *fs,
-struct usb_endpoint_descriptor *hs)
-{
-	if (gadget_is_dualspeed(g) && g->speed == USB_SPEED_HIGH)
-		return hs;
-	return fs;
-}
-
-static void rockusb_complete(struct usb_ep *ep, struct usb_request *req)
-{
-	int status = req->status;
-	if (!status)
-		return;
-	debug("status: %d ep '%s' trans: %d\n", status, ep->name, req->actual);
-}
-
-/* config the rockusb device*/
-static int rockusb_bind(struct usb_configuration *c, struct usb_function *f)
-{
-	int id;
-	struct usb_gadget *gadget = c->cdev->gadget;
-	struct f_rockusb *f_rkusb = func_to_rockusb(f);
-	const char *s;
-
-	id = usb_interface_id(c, f);
-	if (id < 0)
-		return id;
-	interface_desc.bInterfaceNumber = id;
-
-	id = usb_string_id(c->cdev);
-	if (id < 0)
-		return id;
-
-	rkusb_string_defs[0].id = id;
-	interface_desc.iInterface = id;
-
-	f_rkusb->in_ep = usb_ep_autoconfig(gadget, &fs_ep_in);
-	if (!f_rkusb->in_ep)
-		return -ENODEV;
-	f_rkusb->in_ep->driver_data = c->cdev;
-
-	f_rkusb->out_ep = usb_ep_autoconfig(gadget, &fs_ep_out);
-	if (!f_rkusb->out_ep)
-		return -ENODEV;
-	f_rkusb->out_ep->driver_data = c->cdev;
-
-	f->descriptors = rkusb_fs_function;
-
-	if (gadget_is_dualspeed(gadget)) {
-		hs_ep_in.bEndpointAddress = fs_ep_in.bEndpointAddress;
-		hs_ep_out.bEndpointAddress = fs_ep_out.bEndpointAddress;
-		f->hs_descriptors = rkusb_hs_function;
-	}
-
-	s = env_get("serial#");
-	if (s)
-		g_dnl_set_serialnumber((char *)s);
-
-	return 0;
-}
-
-static void rockusb_unbind(struct usb_configuration *c, struct usb_function *f)
-{
-	/* clear the configuration*/
-	memset(rockusb_func, 0, sizeof(*rockusb_func));
-}
-
-static void rockusb_disable(struct usb_function *f)
-{
-	struct f_rockusb *f_rkusb = func_to_rockusb(f);
-
-	usb_ep_disable(f_rkusb->out_ep);
-	usb_ep_disable(f_rkusb->in_ep);
-
-	if (f_rkusb->out_req) {
-		free(f_rkusb->out_req->buf);
-		usb_ep_free_request(f_rkusb->out_ep, f_rkusb->out_req);
-		f_rkusb->out_req = NULL;
-	}
-	if (f_rkusb->in_req) {
-		free(f_rkusb->in_req->buf);
-		usb_ep_free_request(f_rkusb->in_ep, f_rkusb->in_req);
-		f_rkusb->in_req = NULL;
-	}
-}
-
-static struct usb_request *rockusb_start_ep(struct usb_ep *ep)
-{
-	struct usb_request *req;
-
-	req = usb_ep_alloc_request(ep, 0);
-	if (!req)
-		return NULL;
-
-	req->length = EP_BUFFER_SIZE;
-	req->buf = memalign(CONFIG_SYS_CACHELINE_SIZE, EP_BUFFER_SIZE);
-	if (!req->buf) {
-		usb_ep_free_request(ep, req);
-		return NULL;
-	}
-	memset(req->buf, 0, req->length);
-
-	return req;
-}
-
-static int rockusb_set_alt(struct usb_function *f,
-			    unsigned interface, unsigned alt)
-{
-	int ret;
-	struct usb_composite_dev *cdev = f->config->cdev;
-	struct usb_gadget *gadget = cdev->gadget;
-	struct f_rockusb *f_rkusb = func_to_rockusb(f);
-	const struct usb_endpoint_descriptor *d;
-
-	debug("%s: func: %s intf: %d alt: %d\n",
-	      __func__, f->name, interface, alt);
-
-	d = rkusb_ep_desc(gadget, &fs_ep_out, &hs_ep_out);
-	ret = usb_ep_enable(f_rkusb->out_ep, d);
-	if (ret) {
-		printf("failed to enable out ep\n");
-		return ret;
-	}
-
-	f_rkusb->out_req = rockusb_start_ep(f_rkusb->out_ep);
-	if (!f_rkusb->out_req) {
-		printf("failed to alloc out req\n");
-		ret = -EINVAL;
-		goto err;
-	}
-	f_rkusb->out_req->complete = rx_handler_command;
-
-	d = rkusb_ep_desc(gadget, &fs_ep_in, &hs_ep_in);
-	ret = usb_ep_enable(f_rkusb->in_ep, d);
-	if (ret) {
-		printf("failed to enable in ep\n");
-		goto err;
-	}
-
-	f_rkusb->in_req = rockusb_start_ep(f_rkusb->in_ep);
-	if (!f_rkusb->in_req) {
-		printf("failed alloc req in\n");
-		ret = -EINVAL;
-		goto err;
-	}
-	f_rkusb->in_req->complete = rockusb_complete;
-
-	ret = usb_ep_queue(f_rkusb->out_ep, f_rkusb->out_req, 0);
-	if (ret)
-		goto err;
-
-	return 0;
-err:
-	rockusb_disable(f);
-	return ret;
-}
-
-static int rockusb_add(struct usb_configuration *c)
-{
-	struct f_rockusb *f_rkusb = get_rkusb();
-	int status;
-
-	debug("%s: cdev: 0x%p\n", __func__, c->cdev);
-
-	f_rkusb->usb_function.name = "f_rockusb";
-	f_rkusb->usb_function.bind = rockusb_bind;
-	f_rkusb->usb_function.unbind = rockusb_unbind;
-	f_rkusb->usb_function.set_alt = rockusb_set_alt;
-	f_rkusb->usb_function.disable = rockusb_disable;
-	f_rkusb->usb_function.strings = rkusb_strings;
-
-	status = usb_add_function(c, &f_rkusb->usb_function);
-	if (status) {
-		free(f_rkusb);
-		rockusb_func = f_rkusb;
-	}
-	return status;
-}
-
-void rockusb_dev_init(char *dev_type, int dev_index)
-{
-	struct f_rockusb *f_rkusb = get_rkusb();
-	f_rkusb->rockusb_dev_type = dev_type;
-	f_rkusb->rockusb_dev_index = dev_index;
-}
-
-DECLARE_GADGET_BIND_CALLBACK(usb_dnl_rockusb, rockusb_add);
-
-static int rockusb_tx_write(const char *buffer, unsigned int buffer_size)
-{
-	struct usb_request *in_req = rockusb_func->in_req;
-	int ret;
-
-	memcpy(in_req->buf, buffer, buffer_size);
-	in_req->length = buffer_size;
-	usb_ep_dequeue(rockusb_func->in_ep, in_req);
-	ret = usb_ep_queue(rockusb_func->in_ep, in_req, 0);
-	if (ret)
-		printf("Error %d on queue\n", ret);
-	return 0;
-}
-
-static int rockusb_tx_write_str(const char *buffer)
-{
-	return rockusb_tx_write(buffer, strlen(buffer));
-}
-
-#ifdef DEBUG
-static void printcbw(char *buf)
-{
-	ALLOC_CACHE_ALIGN_BUFFER(struct fsg_bulk_cb_wrap, cbw,
-				 sizeof(struct fsg_bulk_cb_wrap));
-
-	memcpy((char *)cbw, buf, USB_BULK_CB_WRAP_LEN);
-
-	debug("cbw: signature:%x\n", cbw->signature);
-	debug("cbw: tag=%x\n", cbw->tag);
-	debug("cbw: data_transfer_length=%d\n", cbw->data_transfer_length);
-	debug("cbw: flags=%x\n", cbw->flags);
-	debug("cbw: lun=%d\n", cbw->lun);
-	debug("cbw: length=%d\n", cbw->length);
-	debug("cbw: ucOperCode=%x\n", cbw->CDB[0]);
-	debug("cbw: ucReserved=%x\n", cbw->CDB[1]);
-	debug("cbw: dwAddress:%x %x %x %x\n", cbw->CDB[5], cbw->CDB[4],
-	      cbw->CDB[3], cbw->CDB[2]);
-	debug("cbw: ucReserved2=%x\n", cbw->CDB[6]);
-	debug("cbw: uslength:%x %x\n", cbw->CDB[8], cbw->CDB[7]);
-}
-
-static void printcsw(char *buf)
-{
-	ALLOC_CACHE_ALIGN_BUFFER(struct bulk_cs_wrap, csw,
-				 sizeof(struct bulk_cs_wrap));
-	memcpy((char *)csw, buf, USB_BULK_CS_WRAP_LEN);
-	debug("csw: signature:%x\n", csw->signature);
-	debug("csw: tag:%x\n", csw->tag);
-	debug("csw: residue:%x\n", csw->residue);
-	debug("csw: status:%x\n", csw->status);
-}
-#endif
-
-static int rockusb_tx_write_csw(u32 tag, int residue, u8 status, int size)
-{
-	ALLOC_CACHE_ALIGN_BUFFER(struct bulk_cs_wrap, csw,
-				 sizeof(struct bulk_cs_wrap));
-	csw->signature = cpu_to_le32(USB_BULK_CS_SIG);
-	csw->tag = tag;
-	csw->residue = cpu_to_be32(residue);
-	csw->status = status;
-#ifdef DEBUG
-	printcsw((char *)&csw);
-#endif
-	return rockusb_tx_write((char *)csw, size);
-}
-
-static unsigned int rx_bytes_expected(struct usb_ep *ep)
-{
-	struct f_rockusb *f_rkusb = get_rkusb();
-	int rx_remain = f_rkusb->download_size - f_rkusb->download_bytes;
-	unsigned int rem;
-	unsigned int maxpacket = ep->maxpacket;
-
-	if (rx_remain <= 0)
-		return 0;
-	else if (rx_remain > EP_BUFFER_SIZE)
-		return EP_BUFFER_SIZE;
-
-	rem = rx_remain % maxpacket;
-	if (rem > 0)
-		rx_remain = rx_remain + (maxpacket - rem);
-
-	return rx_remain;
-}
-
-/* usb_request complete call back to handle down load image */
-static void rx_handler_dl_image(struct usb_ep *ep, struct usb_request *req)
-{
-	struct f_rockusb *f_rkusb = get_rkusb();
-	unsigned int transfer_size = 0;
-	const unsigned char *buffer = req->buf;
-	unsigned int buffer_size = req->actual;
-
-	transfer_size = f_rkusb->download_size - f_rkusb->download_bytes;
-	if (!f_rkusb->download_desc) {
-		printf("rx_handler_dl_image blk_get_dev\n");
-		f_rkusb->download_desc = blk_get_dev(f_rkusb->rockusb_dev_type,
-				f_rkusb->rockusb_dev_index);
-		if (!f_rkusb->download_desc ||
-		    f_rkusb->download_desc->type == DEV_TYPE_UNKNOWN) {
-			error("invalid mmc device\n");
-			rockusb_tx_write_csw(f_rkusb->download_tag, 0, CSW_FAIL,
-					     USB_BULK_CS_WRAP_LEN);
-			return;
-		}
-	}
-
-	if (req->status != 0) {
-		printf("Bad status: %d\n", req->status);
-		rockusb_tx_write_csw(f_rkusb->download_tag, 0,
-				     CSW_FAIL, USB_BULK_CS_WRAP_LEN);
-		return;
-	}
-
-	if (buffer_size < transfer_size)
-		transfer_size = buffer_size;
-
-	memcpy((void *)CONFIG_ROCKUSB_BUF_ADDR + f_rkusb->download_bytes,
-	       buffer, transfer_size);
-	f_rkusb->download_bytes += transfer_size;
-
-	/* Check if transfer is done */
-	if (f_rkusb->download_bytes >= f_rkusb->download_size) {
-		int blks = 0, blkcnt = f_rkusb->download_size/512;
-		debug("download %d bytes finished, start writing to lba %x\n",
-		       f_rkusb->download_bytes, f_rkusb->download_lba);
-		blks = blk_dwrite(f_rkusb->download_desc,
-				  f_rkusb->download_lba, blkcnt,
-					(char *)CONFIG_ROCKUSB_BUF_ADDR);
-		if (blks != blkcnt) {
-			error("failed writing to device %s: %d\n",
-			      f_rkusb->rockusb_dev_type,
-			      f_rkusb->rockusb_dev_index);
-			rockusb_tx_write_csw(f_rkusb->download_tag, 0,
-					     CSW_FAIL, USB_BULK_CS_WRAP_LEN);
-			return;
-		}
-
-		req->complete = rx_handler_command;
-		req->length = EP_BUFFER_SIZE;
-		f_rkusb->download_size = 0;
-		debug("done\n");
-		rockusb_tx_write_csw(f_rkusb->download_tag, 0, CSW_GOOD,
-				     USB_BULK_CS_WRAP_LEN);
-	} else {
-		req->length = rx_bytes_expected(ep);
-	}
-
-	req->actual = 0;
-	usb_ep_queue(ep, req, 0);
-}
-
-static void cb_test_unit_ready(struct usb_ep *ep, struct usb_request *req)
-{
-	ALLOC_CACHE_ALIGN_BUFFER(struct fsg_bulk_cb_wrap, cbw,
-				 sizeof(struct fsg_bulk_cb_wrap));
-
-	memcpy((char *)cbw, req->buf, USB_BULK_CB_WRAP_LEN);
-
-	rockusb_tx_write_csw(cbw->tag, cbw->data_transfer_length,
-			     CSW_GOOD, USB_BULK_CS_WRAP_LEN);
-}
-
-static void cb_read_storage_id(struct usb_ep *ep, struct usb_request *req)
-{
-	ALLOC_CACHE_ALIGN_BUFFER(struct fsg_bulk_cb_wrap, cbw,
-				 sizeof(struct fsg_bulk_cb_wrap));
-	char emmc_id[] = "EMMC ";
-
-	printf("cb_read_storage_id\n");
-	memcpy((char *)cbw, req->buf, USB_BULK_CB_WRAP_LEN);
-	rockusb_tx_write_str(emmc_id);
-	rockusb_tx_write_csw(cbw->tag, cbw->data_transfer_length, CSW_GOOD,
-			     USB_BULK_CS_WRAP_LEN);
-}
-
-static void cb_write_lba(struct usb_ep *ep, struct usb_request *req)
-{
-	ALLOC_CACHE_ALIGN_BUFFER(struct fsg_bulk_cb_wrap, cbw,
-				 sizeof(struct fsg_bulk_cb_wrap));
-	int sector_count;
-	struct f_rockusb *f_rkusb = get_rkusb();
-
-	memcpy((char *)cbw, req->buf, USB_BULK_CB_WRAP_LEN);
-	sector_count = (int)get_unaligned_be16(&cbw->CDB[7]);
-	f_rkusb->download_lba = get_unaligned_be32(&cbw->CDB[2]);
-	f_rkusb->download_size = sector_count * 512;
-	f_rkusb->download_bytes = 0;
-	f_rkusb->download_tag = cbw->tag;
-	if ((0 == f_rkusb->download_size) ||
-	    (f_rkusb->download_size > CONFIG_ROCKUSB_BUF_SIZE)) {
-		rockusb_tx_write_csw(cbw->tag, cbw->data_transfer_length,
-				     CSW_FAIL, USB_BULK_CS_WRAP_LEN);
-	} else {
-		req->complete = rx_handler_dl_image;
-		req->length = rx_bytes_expected(ep);
-	}
-}
-
-int __weak rkusb_set_reboot_flag(int flag)
-{
-	struct f_rockusb *f_rkusb = get_rkusb();
-
-	printf("rkusb_set_reboot_flag: %d\n", f_rkusb->reboot_flag);
-	return -ENOSYS;
-}
-
-static void compl_do_reset(struct usb_ep *ep, struct usb_request *req)
-{
-	struct f_rockusb *f_rkusb = get_rkusb();
-
-	rkusb_set_reboot_flag(f_rkusb->reboot_flag);
-	do_reset(NULL, 0, 0, NULL);
-}
-
-static void cb_reboot(struct usb_ep *ep, struct usb_request *req)
-{
-	ALLOC_CACHE_ALIGN_BUFFER(struct fsg_bulk_cb_wrap, cbw,
-				 sizeof(struct fsg_bulk_cb_wrap));
-	struct f_rockusb *f_rkusb = get_rkusb();
-
-	f_rkusb->reboot_flag = 0;
-	memcpy((char *)cbw, req->buf, USB_BULK_CB_WRAP_LEN);
-	f_rkusb->reboot_flag = cbw->CDB[1];
-	rockusb_func->in_req->complete = compl_do_reset;
-	rockusb_tx_write_csw(cbw->tag, cbw->data_transfer_length, CSW_GOOD,
-			     USB_BULK_CS_WRAP_LEN);
-}
-
-static void cb_not_support(struct usb_ep *ep, struct usb_request *req)
-{
-	ALLOC_CACHE_ALIGN_BUFFER(struct fsg_bulk_cb_wrap, cbw,
-				 sizeof(struct fsg_bulk_cb_wrap));
-
-	memcpy((char *)cbw, req->buf, USB_BULK_CB_WRAP_LEN);
-	printf("Rockusb command %x not support yet\n", cbw->CDB[0]);
-	rockusb_tx_write_csw(cbw->tag, 0, CSW_FAIL, USB_BULK_CS_WRAP_LEN);
-}
-
-static const struct cmd_dispatch_info cmd_dispatch_info[] = {
-	{
-		.cmd = K_FW_TEST_UNIT_READY,
-		.cb = cb_test_unit_ready,
-	},
-	{
-		.cmd = K_FW_READ_FLASH_ID,
-		.cb = cb_read_storage_id,
-	},
-	{
-		.cmd = K_FW_SET_DEVICE_ID,
-		.cb = cb_not_support,
-	},
-	{
-		.cmd = K_FW_TEST_BAD_BLOCK,
-		.cb = cb_not_support,
-	},
-	{
-		.cmd = K_FW_READ_10,
-		.cb = cb_not_support,
-	},
-	{
-		.cmd = K_FW_WRITE_10,
-		.cb = cb_not_support,
-	},
-	{
-		.cmd = K_FW_ERASE_10,
-		.cb = cb_not_support,
-	},
-	{
-		.cmd = K_FW_WRITE_SPARE,
-		.cb = cb_not_support,
-	},
-	{
-		.cmd = K_FW_READ_SPARE,
-		.cb = cb_not_support,
-	},
-	{
-		.cmd = K_FW_ERASE_10_FORCE,
-		.cb = cb_not_support,
-	},
-	{
-		.cmd = K_FW_GET_VERSION,
-		.cb = cb_not_support,
-	},
-	{
-		.cmd = K_FW_LBA_READ_10,
-		.cb = cb_not_support,
-	},
-	{
-		.cmd = K_FW_LBA_WRITE_10,
-		.cb = cb_write_lba,
-	},
-	{
-		.cmd = K_FW_ERASE_SYS_DISK,
-		.cb = cb_not_support,
-	},
-	{
-		.cmd = K_FW_SDRAM_READ_10,
-		.cb = cb_not_support,
-	},
-	{
-		.cmd = K_FW_SDRAM_WRITE_10,
-		.cb = cb_not_support,
-	},
-	{
-		.cmd = K_FW_SDRAM_EXECUTE,
-		.cb = cb_not_support,
-	},
-	{
-		.cmd = K_FW_READ_FLASH_INFO,
-		.cb = cb_not_support,
-	},
-	{
-		.cmd = K_FW_GET_CHIP_VER,
-		.cb = cb_not_support,
-	},
-	{
-		.cmd = K_FW_LOW_FORMAT,
-		.cb = cb_not_support,
-	},
-	{
-		.cmd = K_FW_SET_RESET_FLAG,
-		.cb = cb_not_support,
-	},
-	{
-		.cmd = K_FW_SPI_READ_10,
-		.cb = cb_not_support,
-	},
-	{
-		.cmd = K_FW_SPI_WRITE_10,
-		.cb = cb_not_support,
-	},
-	{
-		.cmd = K_FW_SESSION,
-		.cb = cb_not_support,
-	},
-	{
-		.cmd = K_FW_RESET,
-		.cb = cb_reboot,
-	},
-};
-
-static void rx_handler_command(struct usb_ep *ep, struct usb_request *req)
-{
-	void (*func_cb)(struct usb_ep *ep, struct usb_request *req) = NULL;
-	ALLOC_CACHE_ALIGN_BUFFER(struct fsg_bulk_cb_wrap, cbw,
-				 sizeof(struct fsg_bulk_cb_wrap));
-	char *cmdbuf = req->buf;
-	int i;
-
-	if (req->status || req->length == 0)
-		return;
-
-	memcpy((char *)cbw, req->buf, USB_BULK_CB_WRAP_LEN);
-#ifdef DEBUG
-	printcbw(req->buf);
-#endif
-
-	for (i = 0; i < ARRAY_SIZE(cmd_dispatch_info); i++) {
-		if (cmd_dispatch_info[i].cmd == cbw->CDB[0]) {
-			func_cb = cmd_dispatch_info[i].cb;
-			break;
-		}
-	}
-
-	if (!func_cb) {
-		error("unknown command: %s", (char *)req->buf);
-		rockusb_tx_write_str("FAILunknown command");
-	} else {
-		if (req->actual < req->length) {
-			u8 *buf = (u8 *)req->buf;
-			buf[req->actual] = 0;
-			func_cb(ep, req);
-		} else {
-			error("buffer overflow");
-			rockusb_tx_write_str("FAILbuffer overflow");
-		}
-	}
-
-	*cmdbuf = '\0';
-	req->actual = 0;
-	usb_ep_queue(ep, req, 0);
-}

commit 08af5e362f4275b15f5deeff47fae8ef828629fc
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Fri Oct 27 17:35:04 2017 +0800

    rockchip: test: support ir test
    
    Change-Id: I066eeca4fb7e2971ceee8419cbc2b8d00821397f
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/test/rockchip/Makefile b/test/rockchip/Makefile
index d616a2f570..e0c18d728b 100644
--- a/test/rockchip/Makefile
+++ b/test/rockchip/Makefile
@@ -10,3 +10,4 @@ obj-y += test-key.o
 obj-y += test-emmc.o
 obj-y += test-regulator.o
 obj-y += test-rknand.o
+obj-$(CONFIG_RK_IR) += test-ir.o
diff --git a/test/rockchip/test-ir.c b/test/rockchip/test-ir.c
new file mode 100644
index 0000000000..e84bad8732
--- /dev/null
+++ b/test/rockchip/test-ir.c
@@ -0,0 +1,64 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <linux/input.h>
+#include <rc.h>
+
+#include "test-rockchip.h"
+
+static int ir_test(void)
+{
+	int ret;
+	ulong start;
+	int last_keycode, last_repeat;
+	int keycode, repeat;
+	struct udevice *dev;
+
+	printf("\nYou have 30s to test ir, press them, start!\n");
+
+	ret = uclass_get_device(UCLASS_RC, 0, &dev);
+	if (ret) {
+		printf("get rc device failed: %d\n", ret);
+		goto out;
+	}
+
+	keycode = rc_get_keycode(dev);
+	if (keycode == -ENOSYS) {
+		printf("ir_test: failed to bind driver\n");
+		goto out;
+	}
+
+	last_keycode = KEY_RESERVED;
+	last_repeat = KEY_RESERVED;
+	start = get_timer(0);
+	while (get_timer(start) <= 30000) {
+		mdelay(100);
+
+		keycode = rc_get_keycode(dev);
+		repeat = rc_get_repeat(dev);
+		if (keycode == KEY_RESERVED)
+			continue;
+
+		if (keycode != last_keycode || repeat != last_repeat) {
+			printf("ir_test: press key:0x%x repeat:%d\n",
+			       keycode, repeat);
+			last_keycode = keycode;
+			last_repeat = repeat;
+		}
+	}
+
+	return 0;
+
+out:
+	return -EINVAL;
+}
+
+int board_ir_test(int argc, char * const argv[])
+{
+	return ir_test();
+}
diff --git a/test/rockchip/test-rockchip.c b/test/rockchip/test-rockchip.c
index 2d862501b8..f9310b46f7 100644
--- a/test/rockchip/test-rockchip.c
+++ b/test/rockchip/test-rockchip.c
@@ -19,6 +19,9 @@ static board_module_t g_board_modules[] = {
 	{ .name = "emmc",	.test = board_emmc_test },
 	{ .name = "regulator",	.test = board_regulator_test },
 	{ .name = "rknand",	.test = board_rknand_test },
+#if defined(CONFIG_RK_IR)
+	{ .name = "ir",		.test = board_ir_test },
+#endif
 };
 
 static int do_rockchip_test(cmd_tbl_t *cmdtp, int flag,
diff --git a/test/rockchip/test-rockchip.h b/test/rockchip/test-rockchip.h
index ed95353391..5287b2d35f 100644
--- a/test/rockchip/test-rockchip.h
+++ b/test/rockchip/test-rockchip.h
@@ -13,4 +13,8 @@ int board_emmc_test(int argc, char * const argv[]);
 int board_regulator_test(int argc, char * const argv[]);
 int board_rknand_test(int argc, char * const argv[]);
 
+#if defined(CONFIG_RK_IR)
+int board_ir_test(int argc, char * const argv[]);
+#endif
+
 #endif /* _TEST_ROCKCHIP_H */

commit 5c0bf2193c3deb8a9b4ceb5dc2fbf76dd0828156
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Oct 31 15:42:22 2017 +0800

    rockchip: config: use common CONFIG_ENV_SIZE for all SoCs
    
    All Rockchip SoCs use 32KB as CONFIG_ENV_SIZE.
    
    Change-Id: I4e7bb94be70ece871fa339feb90a591f889e833d
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/evb_rk3229.h b/include/configs/evb_rk3229.h
index b0efb47802..129b4a53ba 100644
--- a/include/configs/evb_rk3229.h
+++ b/include/configs/evb_rk3229.h
@@ -11,8 +11,6 @@
 
 
 /* Store env in emmc */
-#undef CONFIG_ENV_SIZE
-#define CONFIG_ENV_SIZE                 (32 << 10)
 #define CONFIG_SYS_MMC_ENV_DEV          0
 #define CONFIG_SYS_MMC_ENV_PART         0
 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
diff --git a/include/configs/kylin_rk3036.h b/include/configs/kylin_rk3036.h
index 36009b8599..d2d630d610 100644
--- a/include/configs/kylin_rk3036.h
+++ b/include/configs/kylin_rk3036.h
@@ -13,8 +13,6 @@
 #ifndef CONFIG_SPL_BUILD
 
 /* Store env in emmc */
-#undef CONFIG_ENV_SIZE
-#define CONFIG_ENV_SIZE			SZ_32K
 #define CONFIG_SYS_MMC_ENV_DEV		0 /* emmc */
 #define CONFIG_SYS_MMC_ENV_PART		0 /* user area */
 
diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index 9ac0df57de..4ed8f5a6c7 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -10,7 +10,6 @@
 #include "rockchip-common.h"
 
 #define CONFIG_NR_DRAM_BANKS		1
-#define CONFIG_ENV_SIZE			0x2000
 #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h
index 1fbcd4b629..ade2594f1e 100644
--- a/include/configs/rk3128_common.h
+++ b/include/configs/rk3128_common.h
@@ -9,7 +9,6 @@
 
 #include "rockchip-common.h"
 
-#define CONFIG_ENV_SIZE			0x2000
 #define CONFIG_SYS_MAXARGS		16
 #define CONFIG_BAUDRATE			115200
 #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h
index 5e462346be..cfa5364710 100644
--- a/include/configs/rk3188_common.h
+++ b/include/configs/rk3188_common.h
@@ -14,7 +14,6 @@
 
 #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
 #define CONFIG_NR_DRAM_BANKS		1
-#define CONFIG_ENV_SIZE			0x2000
 #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 
diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h
index 432a1c2a24..62cb1b557f 100644
--- a/include/configs/rk322x_common.h
+++ b/include/configs/rk322x_common.h
@@ -10,7 +10,6 @@
 #include "rockchip-common.h"
 
 #define CONFIG_SKIP_LOWLEVEL_INIT
-#define CONFIG_ENV_SIZE			0x2000
 #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/*  64M */
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index 3ec97817eb..707febecbb 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -12,7 +12,6 @@
 
 #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
 #define CONFIG_NR_DRAM_BANKS		1
-#define CONFIG_ENV_SIZE			0x2000
 #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 
diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index e87985c54c..f8884c9511 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -9,7 +9,6 @@
 
 #include "rockchip-common.h"
 
-#define CONFIG_ENV_SIZE			0x2000
 #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index 377d1fc769..9873131be8 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -10,7 +10,6 @@
 #include "rockchip-common.h"
 
 #define CONFIG_NR_DRAM_BANKS		1
-#define CONFIG_ENV_SIZE			0x2000
 #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index 80fc9278d5..bcb1a91b8e 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -50,6 +50,7 @@
  * Rockchip SoCs use fixed ENV 32KB@(4MB-32KB)
  */
 #define CONFIG_ENV_OFFSET	(SZ_4M - SZ_32K)
+#define CONFIG_ENV_SIZE		SZ_32K
 
 #define CONFIG_DISPLAY_BOARDINFO_LATE
 
diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h
index 5ee45594a3..549839d4d6 100644
--- a/include/configs/rv1108_common.h
+++ b/include/configs/rv1108_common.h
@@ -9,7 +9,6 @@
 #include <asm/arch/hardware.h>
 #include "rockchip-common.h"
 
-#define CONFIG_ENV_SIZE			0x2000
 #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT

commit 60cc9f538b03e5c1dc1163192d338a8f78e44141
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Oct 31 15:35:24 2017 +0800

    rockchip: config: sync the ENV offset from rockchip legacy U-Boot
    
    Using the ENV offset from rockchip legacy U-Boot for all SoCs,
    the offset is 4MB-32KB
    
    Change-Id: Ic63d24c2089ff325df312759a78cbea20097b1a5
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index b3986c28af..80fc9278d5 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -46,19 +46,10 @@
 
 #endif
 
-#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
-/* SPL @ 32k for 34k
- * u-boot directly after @ 68k for 400k or so
- * ENV @ 992k
- */
-#define CONFIG_ENV_OFFSET ((1024-32) * 1024)
-#else
-/* SPL @ 32k for ~36k
- * ENV @ 96k
- * u-boot @ 128K
+/*
+ * Rockchip SoCs use fixed ENV 32KB@(4MB-32KB)
  */
-#define CONFIG_ENV_OFFSET (96 * 1024)
-#endif
+#define CONFIG_ENV_OFFSET	(SZ_4M - SZ_32K)
 
 #define CONFIG_DISPLAY_BOARDINFO_LATE
 

commit 6b22cb8c04b4a91be97bf05796146ec7889a5d73
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Oct 31 15:29:57 2017 +0800

    rockchip: remove separate define for CONFIG_ENV_OFFSET
    
    All Rockchip SoC use CONFIG_ENV_OFFSET defined in rockchip_common.h
    
    Change-Id: I3bfcdb78df3ba487b1e99fba83343afd57be0755
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/evb_rk3128.h b/include/configs/evb_rk3128.h
index 1c131760f0..69e300605f 100644
--- a/include/configs/evb_rk3128.h
+++ b/include/configs/evb_rk3128.h
@@ -14,13 +14,7 @@
 #define CONFIG_BMP_32BPP
 
 #define CONFIG_ENV_IS_IN_MMC
-#define CONFIG_SYS_MMC_ENV_DEV 1
-/*
- * SPL @ 32k for ~36k
- * ENV @ 96k
- * u-boot @ 128K
- */
-#define CONFIG_ENV_OFFSET (96 * 1024)
+#define CONFIG_SYS_MMC_ENV_DEV 0
 
 #define ROCKCHIP_DEVICE_SETTINGS \
 		"stdout=serial,vidconsole\0" \
diff --git a/include/configs/evb_rk3399.h b/include/configs/evb_rk3399.h
index 8ae1c4ee32..9e2c2e5c13 100644
--- a/include/configs/evb_rk3399.h
+++ b/include/configs/evb_rk3399.h
@@ -11,13 +11,6 @@
 
 #define CONFIG_MMC_SDHCI_SDMA
 #define CONFIG_SYS_MMC_ENV_DEV 0
-/*
- * SPL @ 32k for ~128k
- * ENV @ 240k
- * u-boot @ 256K
- */
-#undef CONFIG_ENV_OFFSET
-#define CONFIG_ENV_OFFSET (240 * 1024)
 
 #define SDRAM_BANK_SIZE			(2UL << 30)
 #define CONFIG_MISC_INIT_R
diff --git a/include/configs/puma_rk3399.h b/include/configs/puma_rk3399.h
index 7fe47e0d84..cfc31f4e77 100644
--- a/include/configs/puma_rk3399.h
+++ b/include/configs/puma_rk3399.h
@@ -9,14 +9,6 @@
 
 #include <configs/rk3399_common.h>
 
-/*
- * SPL @ 32kB for ~130kB
- * ENV @ 240KB for 8kB
- * FIT payload (ATF, U-Boot, FDT) @ 256kB
- */
-#undef CONFIG_ENV_OFFSET
-#define CONFIG_ENV_OFFSET (240 * 1024)
-
 #define CONFIG_SYS_MMC_ENV_DEV 1
 
 #define SDRAM_BANK_SIZE			(2UL << 30)

commit e131d8225b47db0c603433887da686a9f4803696
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Oct 26 14:43:53 2017 +0800

    rockchip: evb-rk3328: remove CONFIG_ENV_OFFSET
    
    Remove CONFIG_ENV_OFFSET for there already have one in rockchip_common.h
    
    Change-Id: I2cbc1e94ea0ddb3923b019ed1e2337877eb59222
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/evb_rk3328.h b/include/configs/evb_rk3328.h
index c792ce55c1..93b18b8c46 100644
--- a/include/configs/evb_rk3328.h
+++ b/include/configs/evb_rk3328.h
@@ -10,12 +10,6 @@
 #include <configs/rk3328_common.h>
 
 #define CONFIG_SYS_MMC_ENV_DEV 1
-/*
- * SPL @ 32k for ~36k
- * ENV @ 96k
- * u-boot @ 128K
- */
-#define CONFIG_ENV_OFFSET (96 * 1024)
 
 #define SDRAM_BANK_SIZE			(2UL << 30)
 

commit 49c4b9c1c085023918d689327dee14c3f88556ec
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 30 17:45:57 2017 +0800

    video: drm: add backlight disable
    
    Change-Id: Ie3b5b3cb303ca1f9733fe7e17a6e71472b84c0e0
    signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/video/drm/panel_simple.c b/drivers/video/drm/panel_simple.c
index 273009d732..eda3493c3c 100644
--- a/drivers/video/drm/panel_simple.c
+++ b/drivers/video/drm/panel_simple.c
@@ -88,20 +88,28 @@ static int panel_simple_enable(struct display_state *state)
 {
 	struct panel_state *panel_state = &state->panel_state;
 	struct panel_simple *panel = panel_state->private;
+	int ret;
 
-	if (panel->backlight)
-		backlight_enable(panel->backlight);
-
-	mdelay(panel->delay_enable);
+	if (panel->backlight) {
+		ret = backlight_enable(panel->backlight);
+		mdelay(panel->delay_enable);
+		return ret;
+	}
 
 	return 0;
 }
 
 static int panel_simple_disable(struct display_state *state)
 {
-	/* TODO: backlight_disable:
-	 * presently uboot not support backlight disable.
-	 */
+	struct panel_state *panel_state = &state->panel_state;
+	struct panel_simple *panel = panel_state->private;
+	int ret;
+
+	if (panel->backlight) {
+		ret = backlight_disable(panel->backlight);
+		mdelay(panel->delay_disable);
+		return ret;
+	}
 
 	return 0;
 }
diff --git a/drivers/video/drm/rockchip_dsi_panel.c b/drivers/video/drm/rockchip_dsi_panel.c
index e96e58e4a9..c1d4128eaf 100644
--- a/drivers/video/drm/rockchip_dsi_panel.c
+++ b/drivers/video/drm/rockchip_dsi_panel.c
@@ -226,20 +226,28 @@ static int rockchip_dsi_panel_enable(struct display_state *state)
 {
 	struct panel_state *panel_state = &state->panel_state;
 	struct rockchip_dsi_panel *panel = panel_state->private;
+	int ret;
 
-	msleep(panel->delay_enable);
+	if (panel->backlight) {
+		ret = backlight_enable(panel->backlight);
+		mdelay(panel->delay_enable);
+		return ret;
+	}
 
-	return backlight_enable(panel->backlight);
+	return 0;
 }
 
 static int rockchip_dsi_panel_disable(struct display_state *state)
 {
 	struct panel_state *panel_state = &state->panel_state;
 	struct rockchip_dsi_panel *panel = panel_state->private;
+	int ret;
 
-	/* TODO: backlight_disable:
-	 * presently uboot not support backlight disable.
-	 */
+	if (panel->backlight) {
+		ret = backlight_disable(panel->backlight);
+		mdelay(panel->delay_disable);
+		return ret;
+	}
 
 	return 0;
 }

commit 2727548dfd307916262383321fb4bb7a6edf643f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 31 15:43:39 2017 +0800

    ARM: dts: rk3126-evb: add power-supply phandle for backlight
    
    power-supply property is necessary for backlight.
    
    Change-Id: Ie59b8648da060acc89a41ad4194d642054b38e40
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3126-evb.dts b/arch/arm/dts/rk3126-evb.dts
index b6370a8d66..5c3eb378e9 100644
--- a/arch/arm/dts/rk3126-evb.dts
+++ b/arch/arm/dts/rk3126-evb.dts
@@ -38,6 +38,14 @@
 		regulator-always-on;
 	};
 
+	vcc_backlight: vcc-backlight {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_backlight";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+	};
+
 	backlight: backlight {
 		compatible = "pwm-backlight";
 		brightness-levels = <
@@ -76,6 +84,7 @@
 		default-brightness-level = <128>;
 		pwms = <&pwm0 0 1000000 1>;
 		enable-gpios = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>;
+		power-supply = <&vcc_backlight>;
 		status = "okay";
 	};
 

commit 55519f246506ad5302e3b85a3b12d468116d4c99
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 30 17:44:39 2017 +0800

    video: pwm backlight: add backlight_disable() implement
    
    Change-Id: Ib574feedf431e34e5da49aae24a7ae0361945ac9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/video/pwm_backlight.c b/drivers/video/pwm_backlight.c
index fbd7bf7838..5f7ea88db8 100644
--- a/drivers/video/pwm_backlight.c
+++ b/drivers/video/pwm_backlight.c
@@ -58,6 +58,40 @@ static int pwm_backlight_enable(struct udevice *dev)
 	return 0;
 }
 
+static int pwm_backlight_disable(struct udevice *dev)
+{
+	struct pwm_backlight_priv *priv = dev_get_priv(dev);
+	struct dm_regulator_uclass_platdata *plat;
+	uint duty_cycle;
+	int ret;
+
+	duty_cycle = priv->period_ns * (priv->default_level - priv->min_level) /
+		(priv->max_level - priv->min_level + 1);
+	ret = pwm_set_config(priv->pwm, priv->channel, priv->period_ns,
+			     duty_cycle);
+	if (ret)
+		return ret;
+
+	ret = pwm_set_enable(priv->pwm, priv->channel, false);
+	if (ret)
+		return ret;
+
+	mdelay(10);
+	dm_gpio_set_value(&priv->enable, 0);
+
+	plat = dev_get_uclass_platdata(priv->reg);
+	printf("%s: Disable '%s', regulator '%s'/'%s'\n", __func__, dev->name,
+	      priv->reg->name, plat->name);
+	ret = regulator_set_enable(priv->reg, false);
+	if (ret) {
+		debug("%s: Cannot enable regulator for PWM '%s'\n", __func__,
+		      dev->name);
+	}
+	mdelay(120);
+
+	return 0;
+}
+
 static int pwm_backlight_ofdata_to_platdata(struct udevice *dev)
 {
 	struct pwm_backlight_priv *priv = dev_get_priv(dev);
@@ -118,6 +152,7 @@ static int pwm_backlight_probe(struct udevice *dev)
 
 static const struct backlight_ops pwm_backlight_ops = {
 	.enable	= pwm_backlight_enable,
+	.disable = pwm_backlight_disable,
 };
 
 static const struct udevice_id pwm_backlight_ids[] = {

commit 91d246a3ae4b1c47c3f8343566e2b57b276dd8ed
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 30 17:44:02 2017 +0800

    dm: backlight: add backlight_disable() interface
    
    Change-Id: I3b3d1e961b31ac0d4e4bf4656da1ae063e3b5a72
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/video/backlight-uclass.c b/drivers/video/backlight-uclass.c
index 0238289d1b..d7041227d8 100644
--- a/drivers/video/backlight-uclass.c
+++ b/drivers/video/backlight-uclass.c
@@ -19,6 +19,16 @@ int backlight_enable(struct udevice *dev)
 	return ops->enable(dev);
 }
 
+int backlight_disable(struct udevice *dev)
+{
+	const struct backlight_ops *ops = backlight_get_ops(dev);
+
+	if (!ops->disable)
+		return -ENOSYS;
+
+	return ops->disable(dev);
+}
+
 UCLASS_DRIVER(backlight) = {
 	.id		= UCLASS_PANEL_BACKLIGHT,
 	.name		= "backlight",
diff --git a/include/backlight.h b/include/backlight.h
index 90e1d981e1..c3e1a9d194 100644
--- a/include/backlight.h
+++ b/include/backlight.h
@@ -16,6 +16,14 @@ struct backlight_ops {
 	 * @return 0 if OK, -ve on error
 	 */
 	int (*enable)(struct udevice *dev);
+
+	/**
+	 * disable() - Disable a backlight
+	 *
+	 * @dev:	Backlight device to disable
+	 * @return 0 if OK, -ve on error
+	 */
+	int (*disable)(struct udevice *dev);
 };
 
 #define backlight_get_ops(dev)	((struct backlight_ops *)(dev)->driver->ops)
@@ -28,4 +36,12 @@ struct backlight_ops {
  */
 int backlight_enable(struct udevice *dev);
 
+/**
+ * backlight_disable() - Disable a backlight
+ *
+ * @dev:	Backlight device to disable
+ * @return 0 if OK, -ve on error
+ */
+int backlight_disable(struct udevice *dev);
+
 #endif

commit 282d550a6124cdbd583691ba2ca6628f18575d40
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 30 11:14:50 2017 +0800

    power: pmic: rk8xx: add pmic_shutdown() implement
    
    Change-Id: Ib6f175e5b38f54fc41c608ee40166a0875989f3b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index 4d8149849c..0f7771f7b3 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -65,6 +65,44 @@ static int rk8xx_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
 	return 0;
 }
 
+static int rk8xx_shutdown(struct udevice *dev)
+{
+	struct rk8xx_priv *priv = dev_get_priv(dev);
+	u8 val, dev_off;
+	int ret = 0;
+
+	switch (priv->variant) {
+	case RK808_ID:
+		dev_off = BIT(3);
+		break;
+	case RK805_ID:
+	case RK816_ID:
+	case RK818_ID:
+		dev_off = BIT(0);
+		break;
+	default:
+		printf("Unknown PMIC: RK%x\n", priv->variant);
+		return -EINVAL;
+	}
+
+	ret = dm_i2c_read(dev, REG_DEVCTRL, &val, 1);
+	if (ret) {
+		printf("read error from device: %p register: %#x!",
+		       dev, REG_DEVCTRL);
+		return ret;
+	}
+
+	val |= dev_off;
+	ret = dm_i2c_write(dev, REG_DEVCTRL, &val, 1);
+	if (ret) {
+		printf("write error to device: %p register: %#x!",
+		       dev, REG_DEVCTRL);
+		return ret;
+	}
+
+	return 0;
+}
+
 #if CONFIG_IS_ENABLED(PMIC_CHILDREN)
 static int rk8xx_bind(struct udevice *dev)
 {
@@ -115,6 +153,7 @@ static struct dm_pmic_ops rk8xx_ops = {
 	.reg_count = rk8xx_reg_count,
 	.read = rk8xx_read,
 	.write = rk8xx_write,
+	.shutdown = rk8xx_shutdown,
 };
 
 static const struct udevice_id rk8xx_ids[] = {

commit c8d15c437519477dbcc2c5e909619aed3ae9df30
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 30 11:13:46 2017 +0800

    dm: pmic: add pmic_shutdown() interface
    
    Change-Id: I9bed8de6d3733ab90175f26f68160ddd8f12e295
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/pmic/pmic-uclass.c b/drivers/power/pmic/pmic-uclass.c
index 953bbe5026..9b8d8571e2 100644
--- a/drivers/power/pmic/pmic-uclass.c
+++ b/drivers/power/pmic/pmic-uclass.c
@@ -163,6 +163,17 @@ int pmic_clrsetbits(struct udevice *dev, uint reg, uint clr, uint set)
 	return pmic_reg_write(dev, reg, byte);
 }
 
+
+int pmic_shutdown(struct udevice *dev)
+{
+	const struct dm_pmic_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->shutdown)
+		return -ENOSYS;
+
+	return ops->shutdown(dev);
+}
+
 UCLASS_DRIVER(pmic) = {
 	.id		= UCLASS_PMIC,
 	.name		= "pmic",
diff --git a/include/power/pmic.h b/include/power/pmic.h
index 4b34316427..980fd3e67d 100644
--- a/include/power/pmic.h
+++ b/include/power/pmic.h
@@ -164,6 +164,7 @@ struct dm_pmic_ops {
 	int (*read)(struct udevice *dev, uint reg, uint8_t *buffer, int len);
 	int (*write)(struct udevice *dev, uint reg, const uint8_t *buffer,
 		     int len);
+	int (*shutdown)(struct udevice *dev);
 };
 
 /**
@@ -297,6 +298,14 @@ int pmic_reg_write(struct udevice *dev, uint reg, uint value);
  */
 int pmic_clrsetbits(struct udevice *dev, uint reg, uint clr, uint set);
 
+/**
+ * pmic_shutdown() - power off supplies of PMIC
+ *
+ * @dev:	PMIC device to update
+ * @return 0 on success or negative value of errno.
+ */
+int pmic_shutdown(struct udevice *dev);
+
 #endif /* CONFIG_DM_PMIC */
 
 #ifdef CONFIG_POWER

commit 0849a734fefefb7ef04fbf5c55a11d301bfc9653
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Oct 27 17:48:27 2017 +0800

    video: lvds: fix iomux setting error
    
    1. GPIO2_B2 is LCD_EN;
    2. GPIO2_B1 is SPK_CTL;
    3. GPIO2_C5, GPIO2_C4 are I2C2.
    
    Change-Id: Ic3b0ffce0cd15caaffe5ed9994b41f8d0a580d26
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index 01282829c3..48cb756f13 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -244,9 +244,8 @@ static void rk3126_output_ttl(struct display_state *state)
 	u32 val = 0;
 
 	/* iomux to lcdc */
-	writel(0xffff5555, lvds->grf + RK3126_GRF_GPIO2B_IOMUX);
+	writel(0xffc35541, lvds->grf + RK3126_GRF_GPIO2B_IOMUX);
 	writel(0xffff5555, lvds->grf + RK3126_GRF_GPIO2C_IOMUX);
-	writel(0x00ff0055, lvds->grf + RK3126_GRF_GPIO2C_IOMUX2);
 	writel(0x700c1004, lvds->grf + RK3126_GRF_GPIO2D_IOMUX);
 
 	/* enable lvds mode */

commit 9c4c00b2b43aac73b856458c892457e6406206d4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Oct 27 17:47:06 2017 +0800

    phy: rockchip-inno-usb2: use debug for charger info output
    
    Change-Id: Ib204ef3dab245ce312eb07e7d75bce6ca5241320
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index e071ff80a9..168f2da817 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -394,7 +394,7 @@ int rockchip_chg_get_type(void)
 		chg_type = POWER_SUPPLY_TYPE_USB_CDP;
 
 out:
-	printf("charger is %s\n", chg_to_string(chg_type));
+	debug("charger is %s\n", chg_to_string(chg_type));
 
 	return chg_type;
 }

commit f8a3e58740b95bc1af6a489690ce031087ee4cb7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Oct 27 17:45:11 2017 +0800

    include: add video_rockchip.h
    
    export interfaces for other driver.
    
    Change-Id: Iaad51ec77a4427ff94d45d2ae32fff8060d72f7b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 6a4cdd55f7..1c1c2e10a6 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -16,6 +16,7 @@
 #include <linux/media-bus-format.h>
 #include <malloc.h>
 #include <video.h>
+#include <video_rockchip.h>
 #include <dm/device.h>
 #include <dm/uclass-internal.h>
 #include <asm/arch-rockchip/resource_img.h>
diff --git a/include/video_rockchip.h b/include/video_rockchip.h
new file mode 100644
index 0000000000..4538e54463
--- /dev/null
+++ b/include/video_rockchip.h
@@ -0,0 +1,13 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef VIDEO_ROCKCHIP_H
+#define VIDEO_ROCKCHIP_H
+
+void rockchip_show_bmp(const char *bmp);
+void rockchip_show_logo(void);
+
+#endif

commit 65543e0cc15db3d1c7a4bafd656ce7f6ffeda96e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Oct 27 17:43:22 2017 +0800

    dm: fuel gauge: fix typo of uclass driver name
    
    Change-Id: Ib58046d6f7e148ea747f49509b69e44bac806ca1
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fuel_gauge_uclass.c b/drivers/power/fuel_gauge/fuel_gauge_uclass.c
index a1c4f65854..9b6720eb5b 100644
--- a/drivers/power/fuel_gauge/fuel_gauge_uclass.c
+++ b/drivers/power/fuel_gauge/fuel_gauge_uclass.c
@@ -40,7 +40,7 @@ bool fuel_gauge_get_chrg_online(struct udevice *dev)
 	return ops->get_chrg_online(dev);
 }
 
-UCLASS_DRIVER(fuelxguage) = {
+UCLASS_DRIVER(fuel_guage) = {
 	.id		= UCLASS_FG,
 	.name		= "fuel_gauge",
 };

commit 9745ade23b1aed7e425e34635081c01bbecbab35
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Oct 27 17:42:39 2017 +0800

    input: rk8xx pwrkey: add some optimization
    
    1. add key name and type;
    2. clear both fall and rise interrupt when detect rise.
    
    Change-Id: I0698f3decc4b92cf32ce564a1827eedb5ee19a01
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/rk8xx_pwrkey.c b/drivers/input/rk8xx_pwrkey.c
index 530a57370b..cabdd3ce2c 100644
--- a/drivers/input/rk8xx_pwrkey.c
+++ b/drivers/input/rk8xx_pwrkey.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <dm.h>
 #include <key.h>
+#include <linux/input.h>
 #include <power/pmic.h>
 #include <power/rk8xx_pmic.h>
 
@@ -39,23 +40,14 @@ static int rk8xx_pwrkey_read(struct udevice *dev)
 		return val;
 	}
 
-	if (val & key->pwron_fall_int) {
-		/* Clear rise when detect fall */
-		ret = pmic_reg_write(dev->parent, key->int_sts_reg,
-				     key->pwron_rise_int);
-		if (ret < 0) {
-			printf("%s: i2c write failed, ret=%d\n", __func__, val);
-			return ret;
-		}
-
+	if (val & key->pwron_fall_int)
 		status = KEY_PRESS_DOWN;
-	}
 
 	/* Must check pwron rise behind of fall !! */
 	if (val & key->pwron_rise_int) {
 		/* Clear fall when detect rise */
 		ret = pmic_reg_write(dev->parent, key->int_sts_reg,
-				     key->pwron_fall_int);
+				     key->pwron_fall_int | key->pwron_rise_int);
 		if (ret < 0) {
 			printf("%s: i2c write failed, ret=%d\n", __func__, val);
 			return ret;
@@ -64,10 +56,16 @@ static int rk8xx_pwrkey_read(struct udevice *dev)
 		status = KEY_PRESS_UP;
 	}
 
+	debug("%s: int sts = 0x%x msk = 0x%x\n",
+	      __func__, pmic_reg_read(dev->parent, key->int_sts_reg),
+	      pmic_reg_read(dev->parent, key->int_msk_reg));
+
 	return status;
 }
 
 static const struct dm_key_ops key_ops = {
+	.type = KEY_POWER,
+	.name = "pmic-pwrkey",
 	.read = rk8xx_pwrkey_read,
 };
 
@@ -111,6 +109,7 @@ static int rk8xx_pwrkey_probe(struct udevice *dev)
 	}
 
 	/* enable fall and rise interrupt */
+	val = 0xff;
 	val &= ~(key->pwron_rise_int | key->pwron_fall_int);
 	ret = pmic_reg_write(dev->parent, key->int_msk_reg, val);
 	if (ret < 0) {

commit 6e14addfbc2a739744a5de1c76dfc07172824175
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Oct 27 17:42:18 2017 +0800

    dm: key: add key type and key name interface
    
    Change-Id: Ifd054c609d92557b15acb8e53580dddd72325ff8
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/key-uclass.c b/drivers/input/key-uclass.c
index 0d38fbda81..6abd1cf3c0 100644
--- a/drivers/input/key-uclass.c
+++ b/drivers/input/key-uclass.c
@@ -17,6 +17,26 @@ int key_read(struct udevice *dev)
 	return ops->read(dev);
 }
 
+int key_type(struct udevice *dev)
+{
+	const struct dm_key_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->type)
+		return -ENOSYS;
+
+	return ops->type;
+}
+
+const char *key_name(struct udevice *dev)
+{
+	const struct dm_key_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->name)
+		return NULL;
+
+	return ops->name;
+}
+
 UCLASS_DRIVER(key) = {
 	.id		= UCLASS_KEY,
 	.name		= "key",
diff --git a/include/key.h b/include/key.h
index 56ae16681f..16bf4cac5b 100644
--- a/include/key.h
+++ b/include/key.h
@@ -14,9 +14,13 @@ enum key_state {
 };
 
 struct dm_key_ops {
+	int type;
+	const char *name;
 	int (*read)(struct udevice *dev);
 };
 
 int key_read(struct udevice *dev);
+int key_type(struct udevice *dev);
+const char *key_label(struct udevice *dev);
 
 #endif

commit f1f9ed82326366dc75c1655650a2f49d8437e869
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Oct 27 17:31:19 2017 +0800

    configs: evb-rk3126: enable CONFIG_TEST_ROCKCHIP
    
    Change-Id: If12acf51b7a166ebab86f2fe76e5a10d21e48ab9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-rk3126_defconfig b/configs/evb-rk3126_defconfig
index b9d5c53940..bb2c7bcbb7 100644
--- a/configs/evb-rk3126_defconfig
+++ b/configs/evb-rk3126_defconfig
@@ -68,3 +68,4 @@ CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_ERRNO_STR=y
+CONFIG_TEST_ROCKCHIP=y

commit 9dd6ea8e8e8c6e9bd99b81fc7d867fe75e56a48c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Oct 27 17:29:31 2017 +0800

    test: fix test-rknand.c compile error
    
    Change-Id: Ib3ad1f217c004f56790691128f739a95feaf2349
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/test/rockchip/Makefile b/test/rockchip/Makefile
index c104de6fc7..d616a2f570 100644
--- a/test/rockchip/Makefile
+++ b/test/rockchip/Makefile
@@ -9,4 +9,4 @@ obj-y += test-timer.o
 obj-y += test-key.o
 obj-y += test-emmc.o
 obj-y += test-regulator.o
-obj-y += test-rknand.c
\ No newline at end of file
+obj-y += test-rknand.o

commit 57cf0cf16e2e1223257abb97f7d8106205c0a079
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Oct 25 11:45:29 2017 +0800

    rockchip: rk3328: fix rockchip_get_cru api
    
    The API for get priv pointer is wrong, fix it.
    
    Change-Id: I78be059363f25d6202ff7c60f1e076bfe8b2e4fb
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3328/clk_rk3328.c b/arch/arm/mach-rockchip/rk3328/clk_rk3328.c
index 4dcac27cc7..013d777a02 100644
--- a/arch/arm/mach-rockchip/rk3328/clk_rk3328.c
+++ b/arch/arm/mach-rockchip/rk3328/clk_rk3328.c
@@ -25,7 +25,7 @@ void *rockchip_get_cru(void)
 	if (ret)
 		return ERR_PTR(ret);
 
-	priv = devfdt_get_addr_ptr(dev);
+	priv = dev_get_priv(dev);
 
 	return priv->cru;
 }

commit 4723704fa3eb5aeaa0f759c3b068e56bc4b2607f
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Oct 12 09:43:57 2017 +0800

    rockchip: rk3399-evb: update defconfig
    
    Change-Id: If6b0fc9a64f23e2fcbd1e016d90574674e34dc08
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index 770c9287fb..1c337fdc15 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -9,21 +9,28 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_GENERATOR="board/rockchip/evb_rk3399/mk_fit_atf.sh"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
+CONFIG_SPL_ATF_SUPPORT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x00800800
+CONFIG_FASTBOOT_BUF_SIZE=0x08000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=1
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_BMP=y
 CONFIG_CMD_TIME=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
-CONFIG_SPL_OF_PLATDATA=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_REGMAP=y
@@ -34,7 +41,10 @@ CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_ROCKCHIP_EFUSE=y
 CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ROCKCHIP=y
 CONFIG_DM_ETH=y
@@ -62,7 +72,14 @@ CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x330a
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_ETHER_ASIX88179=y
@@ -71,31 +88,8 @@ CONFIG_USB_ETHER_RTL8152=y
 CONFIG_USB_ETHER_SMSC95XX=y
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
-CONFIG_USE_TINY_PRINTF=y
-CONFIG_ERRNO_STR=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_DUALSPEED=y
-CONFIG_USB_GADGET_VBUS_DRAW=0
-CONFIG_USB_DWC3=y
-CONFIG_USB_DWC3_GADGET=y
-CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x330a
-CONFIG_FASTBOOT=y
-CONFIG_CMD_FASTBOOT=y
-CONFIG_USB_FUNCTION_FASTBOOT=y
-CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=1
-CONFIG_FASTBOOT_BUF_ADDR=0x00800800
-CONFIG_FASTBOOT_BUF_SIZE=0x08000000
-CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_LCD=y
-CONFIG_VIDEO=y
-CONFIG_CONSOLE_NORMAL=y
-CONFIG_CMD_BMP=y
 CONFIG_DRM_ROCKCHIP=y
-CONFIG_DRM_ROCKCHIP_VOP=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
-CONFIG_DRM_ROCKCHIP_PANEL=y
-CONFIG_DRM_ROCKCHIP_MIPI_DSI=y
+CONFIG_LCD=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_ERRNO_STR=y

commit 711f6f4020cfdb3fe30ce45d393872ce5ccb9b60
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Fri Oct 13 14:42:06 2017 +0800

    rockchip: dts: rk322x: add ir device node
    
    Change-Id: I2c8838f542cff65fbbbb2cefa2320baef4684dd2
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/arch/arm/dts/rk3229-evb.dts b/arch/arm/dts/rk3229-evb.dts
index fe4abe9d6c..66619689a6 100644
--- a/arch/arm/dts/rk3229-evb.dts
+++ b/arch/arm/dts/rk3229-evb.dts
@@ -7,6 +7,7 @@
 /dts-v1/;
 
 #include "rk322x.dtsi"
+#include <dt-bindings/input/input.h>
 
 / {
 	model = "Rockchip RK3229 Evaluation board";
@@ -90,3 +91,102 @@
 &usb20_otg {
        status = "okay";
 };
+
+&pwm3 {
+	status = "okay";
+	compatible = "rockchip,remotectl-pwm";
+
+	ir_key1 {
+		rockchip,usercode = <0x4040>;
+		rockchip,key_table =
+			<0xf2	KEY_REPLY>,
+			<0xba	KEY_BACK>,
+			<0xf4	KEY_UP>,
+			<0xf1	KEY_DOWN>,
+			<0xef	KEY_LEFT>,
+			<0xee	KEY_RIGHT>,
+			<0xbd	KEY_HOME>,
+			<0xea	KEY_VOLUMEUP>,
+			<0xe3	KEY_VOLUMEDOWN>,
+			<0xe2	KEY_SEARCH>,
+			<0xb2	KEY_POWER>,
+			<0xbc	KEY_MUTE>,
+			<0xec	KEY_MENU>,
+			<0xbf	0x190>,
+			<0xe0	0x191>,
+			<0xe1	0x192>,
+			<0xe9	183>,
+			<0xe6	248>,
+			<0xe8	185>,
+			<0xe7	186>,
+			<0xf0	388>,
+			<0xbe	0x175>;
+	};
+
+	ir_key2 {
+		rockchip,usercode = <0xff00>;
+		rockchip,key_table =
+			<0xf9	KEY_HOME>,
+			<0xbf	KEY_BACK>,
+			<0xfb	KEY_MENU>,
+			<0xaa	KEY_REPLY>,
+			<0xb9	KEY_UP>,
+			<0xe9	KEY_DOWN>,
+			<0xb8	KEY_LEFT>,
+			<0xea	KEY_RIGHT>,
+			<0xeb	KEY_VOLUMEDOWN>,
+			<0xef	KEY_VOLUMEUP>,
+			<0xf7	KEY_MUTE>,
+			<0xe7	KEY_POWER>,
+			<0xfc	KEY_POWER>,
+			<0xa9	KEY_VOLUMEDOWN>,
+			<0xa8	KEY_VOLUMEDOWN>,
+			<0xe0	KEY_VOLUMEDOWN>,
+			<0xa5	KEY_VOLUMEDOWN>,
+			<0xab	183>,
+			<0xb7	388>,
+			<0xe8	388>,
+			<0xf8	184>,
+			<0xaf	185>,
+			<0xed	KEY_VOLUMEDOWN>,
+			<0xee	186>,
+			<0xb3	KEY_VOLUMEDOWN>,
+			<0xf1	KEY_VOLUMEDOWN>,
+			<0xf2	KEY_VOLUMEDOWN>,
+			<0xf3	KEY_SEARCH>,
+			<0xb4	KEY_VOLUMEDOWN>,
+			<0xbe	KEY_SEARCH>;
+	};
+
+	ir_key3 {
+		rockchip,usercode = <0x1dcc>;
+		rockchip,key_table =
+			<0xee	KEY_REPLY>,
+			<0xf0	KEY_BACK>,
+			<0xf8	KEY_UP>,
+			<0xbb	KEY_DOWN>,
+			<0xef	KEY_LEFT>,
+			<0xed	KEY_RIGHT>,
+			<0xfc	KEY_HOME>,
+			<0xf1	KEY_VOLUMEUP>,
+			<0xfd	KEY_VOLUMEDOWN>,
+			<0xb7	KEY_SEARCH>,
+			<0xff	KEY_POWER>,
+			<0xf3	KEY_MUTE>,
+			<0xbf	KEY_MENU>,
+			<0xf9	0x191>,
+			<0xf5	0x192>,
+			<0xb3	388>,
+			<0xbe	KEY_1>,
+			<0xba	KEY_2>,
+			<0xb2	KEY_3>,
+			<0xbd	KEY_4>,
+			<0xf9	KEY_5>,
+			<0xb1	KEY_6>,
+			<0xfc	KEY_7>,
+			<0xf8	KEY_8>,
+			<0xb0	KEY_9>,
+			<0xb6	KEY_0>,
+			<0xb5	KEY_BACKSPACE>;
+	};
+};

commit bdbf80c83291311d12133a899e14351bd675a49c
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Sat Sep 30 17:51:27 2017 +0800

    input: Add RK remote control driver
    
    This patch adds support to RK RC driver, which is basically a IR
    receiver. This IP (PWM) is common across all the RK parts for
    settop box platforms.
    It implements a simple NEC protocol decoder.
    
    Change-Id: I057a341acaeb14d0165bd6187c4074dd230b079f
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig
index 02933f7027..69fea3cb0d 100644
--- a/drivers/input/Kconfig
+++ b/drivers/input/Kconfig
@@ -20,6 +20,13 @@ config DM_RC
 	  This adds a uclass for Remote Controllers. This is needed
 	  in order to support standalone IR receivers.
 
+config RK_IR
+	bool "Enable rk ir support"
+	depends on DM_RC
+	select BITREVERSE
+	help
+	  This adds a driver for the rockchip IR controller.
+
 config CROS_EC_KEYB
 	bool "Enable Chrome OS EC keyboard support"
 	help
diff --git a/drivers/input/Makefile b/drivers/input/Makefile
index fe8fa640f5..510c4d1cef 100644
--- a/drivers/input/Makefile
+++ b/drivers/input/Makefile
@@ -8,6 +8,7 @@
 obj-$(CONFIG_DM_KEYBOARD) += keyboard-uclass.o
 obj-$(CONFIG_DM_KEY) += key-uclass.o
 obj-$(CONFIG_DM_RC) += rc-uclass.o
+obj-$(CONFIG_RK_IR) += rockchip_ir.o
 
 obj-$(CONFIG_I8042_KEYB) += i8042.o
 obj-$(CONFIG_TEGRA_KEYBOARD) += tegra-kbc.o
diff --git a/drivers/input/rockchip_ir.c b/drivers/input/rockchip_ir.c
new file mode 100644
index 0000000000..6579284b9e
--- /dev/null
+++ b/drivers/input/rockchip_ir.c
@@ -0,0 +1,342 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <clk.h>
+#include <common.h>
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <errno.h>
+#include <rc.h>
+#include <rockchip_ir.h>
+#include <irq-generic.h>
+#include <irq-platform.h>
+
+#include <linux/bitrev.h>
+#include <linux/input.h>
+
+#include <asm/arch/periph.h>
+#include <asm/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static struct nec_dec nec;
+static struct rc_map *rc_map;
+
+static int rockchip_ir_get_keycode(struct udevice *dev)
+{
+	struct rockchip_ir_priv *priv = dev_get_priv(dev);
+
+	return priv->keycode;
+}
+
+static int rockchip_ir_get_repeat(struct udevice *dev)
+{
+	struct rockchip_ir_priv *priv = dev_get_priv(dev);
+
+	return priv->repeat;
+}
+
+static int ir_lookup_by_scancode(struct rockchip_ir_priv *priv,
+				 u32 usercode,
+				 u32 scancode)
+{
+	int i, j;
+
+	for (i = 0; i < priv->num; i++) {
+		if (rc_map[i].usercode == usercode)
+			break;
+	}
+	for (j = 0; i < priv->num && j < rc_map[i].nbuttons; j++) {
+		if (rc_map[i].scan[j].scancode == scancode) {
+			if (priv->keycode == rc_map[i].scan[j].keycode)
+				priv->repeat++;
+			else
+				priv->repeat = 0;
+			priv->keycode = rc_map[i].scan[j].keycode;
+			return 0;
+		}
+	}
+
+	priv->keycode = KEY_RESERVED;
+	priv->repeat = 0;
+
+	return -1;
+}
+
+static int ir_parse_keys(struct udevice *dev)
+{
+	int i, j;
+	int len;
+	int ret;
+	int subnode;
+	int node = dev_of_offset(dev);
+	const void *blob = gd->fdt_blob;
+
+	i = 0;
+	fdt_for_each_subnode(subnode, blob, node) {
+		rc_map[i].usercode = fdtdec_get_uint(blob, subnode,
+						     "rockchip,usercode",
+						     1234u);
+		if (rc_map[i].usercode == 1234u) {
+			debug("missing usercode property in the dts\n");
+			return -1;
+		}
+		debug("add new usercode:0x%x\n", rc_map[i].usercode);
+		fdt_get_property(blob, subnode, "rockchip,key_table", &len);
+		len /= sizeof(u32);
+		debug("len:%d\n", len);
+		rc_map[i].nbuttons = len / 2;
+		ret = fdtdec_get_int_array(blob, subnode, "rockchip,key_table",
+					   (u32 *)rc_map[i].scan, len);
+		if (ret) {
+			debug("missing key_table property in the dts\n");
+			return -1;
+		}
+		for (j = 0; j < (len / 2); j++) {
+			debug("[%d],usercode=0x%x scancode=0x%x keycode=0x%x\n",
+			      i,
+			      rc_map[i].usercode,
+			      rc_map[i].scan[j].scancode,
+			      rc_map[i].scan[j].keycode);
+		}
+		i++;
+	}
+
+	return 0;
+}
+
+/**
+ * ir_nec_decode() - Decode one NEC pulse or space
+ * @duration:   the struct ir_raw_event descriptor of the pulse/space
+ */
+static int ir_nec_decode(struct rockchip_ir_priv *priv, struct ir_raw_event *ev)
+{
+	int ret;
+	u32 usercode;
+	u32 scancode;
+	u8 __maybe_unused address, not_address, command, not_command;
+	struct nec_dec *data = &nec;
+
+	debug("NEC decode started at state %d (%uus %s)\n",
+	      data->state, TO_US(ev->duration), TO_STR(ev->pulse));
+
+	switch (data->state) {
+	case STATE_INACTIVE:
+		if (!ev->pulse)
+			break;
+
+		if (!eq_margin(ev->duration, NEC_HEADER_PULSE, NEC_UNIT * 2))
+			break;
+
+		data->count = 0;
+		data->state = STATE_HEADER_SPACE;
+		return 0;
+
+	case STATE_HEADER_SPACE:
+		if (ev->pulse)
+			break;
+
+		if (eq_margin(ev->duration, NEC_HEADER_SPACE, NEC_UNIT)) {
+			data->state = STATE_BIT_PULSE;
+			return 0;
+		}
+
+		break;
+
+	case STATE_BIT_PULSE:
+		if (!ev->pulse)
+			break;
+
+		if (!eq_margin(ev->duration, NEC_BIT_PULSE, NEC_UNIT / 2))
+			break;
+
+		data->state = STATE_BIT_SPACE;
+		return 0;
+
+	case STATE_BIT_SPACE:
+		if (ev->pulse)
+			break;
+
+		data->bits <<= 1;
+		if (eq_margin(ev->duration, NEC_BIT_1_SPACE, NEC_UNIT / 2))
+			data->bits |= 1;
+		else if (!eq_margin(ev->duration, NEC_BIT_0_SPACE,
+				    NEC_UNIT / 2))
+			break;
+		data->count++;
+
+		if (data->count == NEC_NBITS) {
+			address     = ((data->bits >> 24) & 0xff);
+			not_address = ((data->bits >> 16) & 0xff);
+			command	    = ((data->bits >>  8) & 0xff);
+			not_command = ((data->bits >>  0) & 0xff);
+
+			if ((command ^ not_command) != 0xff) {
+				debug("NEC checksum error: received 0x%08x\n",
+				      data->bits);
+			}
+			usercode = address << 8 | not_address;
+			scancode = command << 8 | not_command;
+			debug("raw usercode 0x%04x scancode 0x%04x\n",
+			      usercode, scancode);
+			/* change to dts format */
+			usercode = bitrev16(usercode);
+			scancode = (bitrev16(scancode) >> 8) & 0xFF;
+
+			data->state = STATE_INACTIVE;
+			ret = ir_lookup_by_scancode(priv, usercode, scancode);
+			if (!ret)
+				debug("keycode 0x%02x repeat 0x%x\n",
+				      priv->keycode, priv->repeat);
+			else
+				debug("ir lookup by scancode failed\n");
+		} else {
+			data->state = STATE_BIT_PULSE;
+		}
+
+		return 0;
+	}
+
+	debug("NEC decode failed at count %d state %d (%uus %s)\n",
+	      data->count, data->state, TO_US(ev->duration), TO_STR(ev->pulse));
+	data->state = STATE_INACTIVE;
+
+	return -1;
+}
+
+static void rockchip_ir_irq(int irq, void *data)
+{
+	u32 val;
+	u32 cycle_hpr, cycle_lpr, cycle;
+	struct ir_raw_event ev;
+	struct rockchip_ir_priv *priv = (struct rockchip_ir_priv *)data;
+
+	val = readl(priv->base + PWM_STA_REG(priv->id));
+	cycle_hpr = readl(priv->base + PWM_HPR_REG);
+	cycle_lpr = readl(priv->base + PWM_LPR_REG);
+	if (val & PWM_CH_POL(priv->id)) {
+		cycle = cycle_hpr;
+		ev.pulse = 0;
+	} else {
+		cycle = cycle_lpr;
+		ev.pulse = 1;
+	}
+	writel(PWM_CH_INT(priv->id),
+	       priv->base + PWM_STA_REG(priv->id));
+	ev.duration = cycle * priv->period;
+	ir_nec_decode(priv, &ev);
+}
+
+static void rockchip_ir_hw_init(struct udevice *dev)
+{
+	unsigned long tmp;
+	struct rockchip_ir_priv *priv = dev_get_priv(dev);
+
+	/* Enable capture mode, non-scaled clock, prescale 1 */
+	writel(REG_CTL_MD, priv->base + PWM_CTL_REG);
+
+	/* Clear Interrupt Status */
+	writel(PWM_CH_INT(priv->id),
+	       priv->base + PWM_STA_REG(priv->id));
+
+	/* Enable IRQ */
+	writel(PWM_CH_INT(priv->id),
+	       priv->base + PWM_INT_REG(priv->id));
+
+	/* Enable IR Module */
+	tmp = readl(priv->base + PWM_CTL_REG);
+	writel(tmp | REG_CTL_EN, priv->base + PWM_CTL_REG);
+}
+
+static int rockchip_ir_ofdata_to_platdata(struct udevice *dev)
+{
+	int node = dev_of_offset(dev);
+	const void *blob = gd->fdt_blob;
+	struct rockchip_ir_priv *priv = dev_get_priv(dev);
+
+	priv->num = fdtdec_get_child_count(blob, node);
+	if (priv->num == 0) {
+		debug("no ir map in dts\n");
+		return -1;
+	}
+	priv->base = devfdt_get_addr(dev);
+	priv->id = (priv->base >> 4) & 0xF;
+
+	return 0;
+}
+
+static int rockchip_ir_probe(struct udevice *dev)
+{
+	int ret;
+	struct clk clk;
+	struct udevice *pinctrl;
+	struct rockchip_ir_priv *priv = dev_get_priv(dev);
+
+	rc_map = calloc(1, priv->num * sizeof(struct rc_map));
+	if (!rc_map) {
+		debug("%s: failed to calloc\n", __func__);
+		return -EINVAL;
+	}
+
+	ret = ir_parse_keys(dev);
+	if (ret) {
+		debug("%s: failed to parse keys\n", __func__);
+		return -EINVAL;
+	}
+
+	/*
+	 * The PWM does not have decicated interrupt number in dts and can
+	 * not get periph_id by pinctrl framework, so let's init then here.
+	 */
+	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
+	if (ret) {
+		debug("%s: can't find pinctrl device\n", __func__);
+		return -EINVAL;
+	}
+
+	ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_PWM0 + priv->id);
+	if (ret) {
+		debug("%s pwm%d pinctrl init fail\n", __func__, priv->id);
+		return -EINVAL;
+	}
+
+	ret = clk_get_by_index(dev, 0, &clk);
+	if (ret) {
+		debug("%s get clock fail!\n", __func__);
+		return -EINVAL;
+	}
+	priv->freq = clk_get_rate(&clk);
+	debug("%s pwm clk = %lu\n", __func__, priv->freq);
+	priv->period = 1000000000 / priv->freq;
+
+	irq_install_handler(IRQ_PWM,
+			    (interrupt_handler_t *)rockchip_ir_irq, priv);
+	irq_handler_enable(IRQ_PWM);
+
+	rockchip_ir_hw_init(dev);
+
+	return ret;
+}
+
+static const struct dm_rc_ops rockchip_ir_ops = {
+	.get_keycode = rockchip_ir_get_keycode,
+	.get_repeat = rockchip_ir_get_repeat,
+};
+
+static const struct udevice_id rockchip_ir_ids[] = {
+	{ .compatible = "rockchip,remotectl-pwm" },
+	{ }
+};
+
+U_BOOT_DRIVER(rockchip_ir) = {
+	.name	= "rockchip_ir",
+	.id	= UCLASS_RC,
+	.of_match = rockchip_ir_ids,
+	.ofdata_to_platdata     = rockchip_ir_ofdata_to_platdata,
+	.probe = rockchip_ir_probe,
+	.ops	= &rockchip_ir_ops,
+	.priv_auto_alloc_size = sizeof(struct rockchip_ir_priv),
+};
diff --git a/include/rockchip_ir.h b/include/rockchip_ir.h
new file mode 100644
index 0000000000..093234dad0
--- /dev/null
+++ b/include/rockchip_ir.h
@@ -0,0 +1,92 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#ifndef __ROCKCHIP_IR_H__
+#define __ROCKCHIP_IR_H__
+
+#include <linux/bitops.h>
+
+/* Registers */
+/* High polarity cycles */
+#define PWM_HPR_REG	0x04
+
+/* Low polarity cycles */
+#define PWM_LPR_REG	0x08
+
+/* PWM Control */
+#define PWM_CTL_REG	0x0c
+/* Enable */
+#define REG_CTL_EN	BIT(0)
+/* capture mode */
+#define REG_CTL_MD	BIT(2)
+
+/* Interrupt Status */
+#define PWM_STA_REG(id)	((4 - (id)) * 0x10)
+#define PWM_CH_POL(id)	BIT(id + 8)
+
+/* Interrupt Enable */
+#define PWM_INT_REG(id)	((4 - (id)) * 0x14)
+#define PWM_CH_INT(id)	BIT(id)
+
+/* NEC IR Pulse/Space protocol */
+#define NEC_NBITS		32
+#define NEC_UNIT		562500	/* ns */
+#define NEC_HEADER_PULSE	(16 * NEC_UNIT)
+#define NEC_HEADER_SPACE	(8  * NEC_UNIT)
+#define NEC_BIT_PULSE		(1  * NEC_UNIT)
+#define NEC_BIT_0_SPACE		(1  * NEC_UNIT)
+#define NEC_BIT_1_SPACE		(3  * NEC_UNIT)
+
+#define TO_US(duration)		((duration) / 1000)
+#define TO_STR(is_pulse)	((is_pulse) ? "pulse" : "space")
+
+#define MAX_NUM_KEYS	60
+
+enum nec_state {
+	STATE_INACTIVE,
+	STATE_HEADER_SPACE,
+	STATE_BIT_PULSE,
+	STATE_BIT_SPACE,
+};
+
+struct rockchip_ir_priv {
+	fdt_addr_t base;
+	ulong freq;
+	ulong period;
+	int id;
+	int num;
+	int keycode;
+	int repeat;
+};
+
+struct ir_raw_event {
+	u32 duration;
+	unsigned pulse:1;
+};
+
+struct nec_dec {
+	int state;
+	unsigned count;
+	u32 bits;
+};
+
+struct rc_map_table {
+	u32 scancode;
+	u32 keycode;
+};
+
+struct rc_map {
+	u32 usercode;
+	u32 nbuttons;
+	struct rc_map_table scan[MAX_NUM_KEYS];
+};
+
+/* macros for IR decoders */
+static inline bool eq_margin(unsigned d1, unsigned d2, unsigned margin)
+{
+	return ((d1 > (d2 - margin)) && (d1 < (d2 + margin)));
+}
+
+#endif /* __ROCKCHIP_IR_H__ */

commit b0deaf684103fb778ee2b9da1f9115fce4d811a9
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Sat Sep 30 18:17:24 2017 +0800

    irq: rockchip: add pwm hardware irq number
    
    Change-Id: Idfb344703cc842a6d41a69771bd2a36065b01aaf
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/include/irq-platform.h b/include/irq-platform.h
index ab907c4f3b..6694b5f7eb 100644
--- a/include/irq-platform.h
+++ b/include/irq-platform.h
@@ -38,6 +38,7 @@
 #define GPIO_BANK_PINS			32
 
 #define IRQ_TIMER1			76
+#define IRQ_PWM				82
 #define IRQ_GPIO0			83
 #define IRQ_GPIO1			84
 #define IRQ_GPIO2			85
@@ -61,6 +62,7 @@
 #define GPIO_BANK_PINS			32
 
 #define IRQ_TIMER1			99
+#define IRQ_PWM				110
 #define IRQ_GPIO0			113
 #define IRQ_GPIO1			114
 #define IRQ_GPIO2			115
@@ -84,6 +86,7 @@
 #define GPIO_BANK_PINS			32
 
 #define IRQ_TIMER1			76
+#define IRQ_PWM				82
 #define IRQ_GPIO0			83
 #define IRQ_GPIO1			84
 #define IRQ_GPIO2			85
@@ -102,6 +105,7 @@
 #define GPIO_BANK_PINS			32
 
 #define IRQ_TIMER1			79
+#define IRQ_PWM				110
 #define IRQ_GPIO0			113
 #define IRQ_GPIO1			114
 #define IRQ_GPIO2			115
@@ -119,6 +123,7 @@
 #define IRQ_GPIO2			48
 #define IRQ_GPIO3			49
 #define IRQ_GPIO4			50
+#define IRQ_PWM				93
 #define IRQ_TIMER1			114	/* non-secure */
 
 #define GIC_IRQS_NR			(6 * 32)

commit eecd6f34aec4e117fe54976a792ac1aa20d32ad8
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Fri Oct 13 11:52:39 2017 +0800

    rockchip: clk: Add rk322x bus pclk clock support
    
    Change-Id: I63fcd3527ac2d4447b0f49f4665ca99caa90d6e5
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c
index 9e7e047a4e..354883ae9d 100644
--- a/drivers/clk/rockchip/clk_rk322x.c
+++ b/drivers/clk/rockchip/clk_rk322x.c
@@ -314,6 +314,29 @@ static int rk322x_ddr_set_clk(struct rk322x_cru *cru, unsigned int set_rate)
 
 	return set_rate;
 }
+
+static ulong rk322x_get_bus_aclk(struct rk322x_cru *cru, ulong gclk_rate)
+{
+	u32 con;
+	u32 aclk_div;
+
+	con = readl(&cru->cru_clksel_con[0]);
+	aclk_div = ((con & BUS_ACLK_DIV_MASK) >> BUS_ACLK_DIV_SHIFT) + 1;
+
+	return gclk_rate / aclk_div;
+}
+
+static ulong rk322x_get_bus_pclk(struct rk322x_cru *cru, ulong gclk_rate)
+{
+	u32 con;
+	u32 pclk_div;
+
+	con = readl(&cru->cru_clksel_con[1]);
+	pclk_div = ((con & BUS_PCLK_DIV_MASK) >> BUS_PCLK_DIV_SHIFT) + 1;
+
+	return rk322x_get_bus_aclk(cru, gclk_rate) / pclk_div;
+}
+
 static ulong rk322x_clk_get_rate(struct clk *clk)
 {
 	struct rk322x_clk_priv *priv = dev_get_priv(clk->dev);
@@ -330,6 +353,9 @@ static ulong rk322x_clk_get_rate(struct clk *clk)
 	case SCLK_SDMMC:
 		rate = rockchip_mmc_get_clk(priv->cru, gclk_rate, clk->id);
 		break;
+	case PCLK_GPIO0 ... PCLK_TIMER:
+		rate = rk322x_get_bus_pclk(priv->cru, gclk_rate);
+		break;
 	default:
 		return -ENOENT;
 	}

commit c634813016a443a98f2d310347d0f02e80eaf7ec
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Fri Oct 13 09:11:57 2017 +0800

    lib: add bit reverse library config
    
    Change-Id: Ib3d72274b07fb088d320f751a8a576338f3a4d0b
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/lib/Kconfig b/lib/Kconfig
index 3fb1f12012..4554bb28ea 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -80,6 +80,9 @@ config TPL_TINY_MEMSET
 config RBTREE
 	bool
 
+config BITREVERSE
+	bool
+
 source lib/dhry/Kconfig
 
 menu "Security support"

commit 0f1d0337a14088bf15f48a853daa0e2b1652c98a
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Fri Oct 13 08:50:32 2017 +0800

    configs: evb-rk3229: enable CONFIG_DM_RC
    
    Change-Id: I8d02fb4ee2c7c07aacd74f86114e9cca10c61f46
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index df5a36855c..caa806ba77 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -56,6 +56,7 @@ CONFIG_SPL_CLK=y
 CONFIG_TPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_RC=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y

commit 6faa29c665388b16d672dfb640356643b83481ff
Author: Zhaoyifeng <zyf@rock-chips.com>
Date:   Tue Oct 24 11:36:00 2017 +0800

    test: add modular test for rknand on Rockchip platform
    
    Write assigned data payload into rknand device and read back. Then
    verify the context by comparing the write_buffer with read_buffer
    one by one.
    
    => rktest rknand 30000
    ***********************************************************
    Rockchip Board Module [rknand] Test start.
    ***********************************************************
    
    Device 0: Vendor: 0x2207 Rev: V1.00 Prod: rknand
                Type: Hard Disk
                Capacity: 7304.0 MB = 7.1 GB (14958592 x 512)
    ... is now current device
    
    rknand write: device 0 block # 4096, count 30000 ... 30000 blocks written: OK
    rknand write: size 14MB, used 2196ms, speed 6MB/s
    
    rknand read: device 0 block # 4096, count 30000 ... 30000 blocks read: OK
    rknand read: size 14MB, used 941ms, speed 15MB/s
    -----------------------------------------------------------
    Rockchip Board Module [rknand] Test end <PASS>.. Total: 8.347s
    -----------------------------------------------------------
    
    Change-Id: Iedc8d4c3d30a488770c24eabcc81649f8bdecaf2
    Signed-off-by: Zhaoyifeng <zyf@rock-chips.com>

diff --git a/test/rockchip/Makefile b/test/rockchip/Makefile
index fb6876ee21..c104de6fc7 100644
--- a/test/rockchip/Makefile
+++ b/test/rockchip/Makefile
@@ -9,3 +9,4 @@ obj-y += test-timer.o
 obj-y += test-key.o
 obj-y += test-emmc.o
 obj-y += test-regulator.o
+obj-y += test-rknand.c
\ No newline at end of file
diff --git a/test/rockchip/test-rknand.c b/test/rockchip/test-rknand.c
new file mode 100644
index 0000000000..de38b0d508
--- /dev/null
+++ b/test/rockchip/test-rknand.c
@@ -0,0 +1,119 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <asm/io.h>
+#include <cli.h>
+#include <common.h>
+#include <linux/compat.h>
+#include <irq-generic.h>
+#include <irq-platform.h>
+#include <malloc.h>
+#include "test-rockchip.h"
+
+int board_rknand_test(int argc, char * const argv[])
+{
+	u8 *write_buffer, *read_buffer;
+	u32 i, blocks = 0;
+	unsigned long ts;
+	int err = 0;
+	char cmd_rknand[512] = {0};
+
+	blocks = simple_strtoul(argv[2], NULL, 0);
+	if (!blocks) {
+		printf("Usage: rktest rknand blocks\n");
+		printf("8129 <= blocks <= 30000\n");
+		err = -EINVAL;
+		goto err_wb;
+	} 
+
+	if (blocks % 2) {
+		/* Round up */
+		blocks += 1;
+	}
+
+	if (blocks < 8192) {
+		printf("Round up to 8192 blocks compulsively\n");
+		blocks = 8192;
+	}
+
+	if (blocks > 30000) {
+		printf("Round down to 30000 blocks compulsively\n");
+		blocks = 30000;
+	}
+
+	/* 1. Prepare memory */
+
+	write_buffer = (u8 *)kmalloc(sizeof(u8) * blocks * 512, 0);
+	if (!write_buffer) {
+		printf("No memory for write_buffer!\n");
+		err = -ENOMEM;
+		goto err_wb;
+	}
+
+	read_buffer = (u8 *)kmalloc(sizeof(u8) * blocks * 512, 0);
+	if (!read_buffer) {
+		printf("No memory for read_buffer!\n");
+		err = -ENOMEM;
+		goto err_rb;
+	}
+
+	for (i = 0; i < blocks * 512; i++) {
+		write_buffer[i] = i;
+		read_buffer[i] = 0;
+	}
+
+	/* 2. Select device */
+
+	snprintf(cmd_rknand, sizeof(cmd_rknand), "rknand dev 0");
+	err = cli_simple_run_command(cmd_rknand, 0);
+	if (!err)
+		goto err_mw;
+
+	/* 3. Prepare and start cli command */
+
+	snprintf(cmd_rknand, sizeof(cmd_rknand),
+		 "rknand write 0x%x 0x1000 0x%x",
+		 (u32)write_buffer, blocks);
+	ts = get_timer(0);
+	err = cli_simple_run_command(cmd_rknand, 0);
+	ts = get_timer(0) - ts;
+	if (!err)
+		goto err_mw;
+
+	printf("rknand write: size %dMB, used %ldms, speed %ldMB/s\n",
+		blocks / 2048, ts, (blocks >> 1) / ts);
+
+	snprintf(cmd_rknand, sizeof(cmd_rknand),
+		 "rknand read 0x%x 0x1000 0x%x",
+		 (u32)read_buffer, blocks);
+	ts = get_timer(0);
+	err = cli_simple_run_command(cmd_rknand, 0);
+	ts = get_timer(0) - ts;
+	if (!err)
+		goto err_mw;
+
+	printf("rknand read: size %dMB, used %ldms, speed %ldMB/s\n",
+		blocks / 2048, ts, (blocks >> 1) / ts);
+	/* 4. Verify the context */
+
+	err = 0;
+	for (i = 0; i < blocks * 512; i++) {
+		if (write_buffer[i] != read_buffer[i]) {
+			printf("rknand context compare err!\n");
+			err = -EINVAL;
+			goto err_mw;
+		}
+	}
+
+err_mw:
+	kfree(read_buffer);
+	read_buffer = NULL;
+err_rb:
+	kfree(write_buffer);
+	write_buffer = NULL;
+err_wb:
+	return err;
+}
diff --git a/test/rockchip/test-rockchip.c b/test/rockchip/test-rockchip.c
index 463802d3a9..2d862501b8 100644
--- a/test/rockchip/test-rockchip.c
+++ b/test/rockchip/test-rockchip.c
@@ -18,6 +18,7 @@ static board_module_t g_board_modules[] = {
 	{ .name = "key",	.test = board_key_test },
 	{ .name = "emmc",	.test = board_emmc_test },
 	{ .name = "regulator",	.test = board_regulator_test },
+	{ .name = "rknand",	.test = board_rknand_test },
 };
 
 static int do_rockchip_test(cmd_tbl_t *cmdtp, int flag,
diff --git a/test/rockchip/test-rockchip.h b/test/rockchip/test-rockchip.h
index 556175476a..ed95353391 100644
--- a/test/rockchip/test-rockchip.h
+++ b/test/rockchip/test-rockchip.h
@@ -11,5 +11,6 @@ int board_timer_test(int argc, char * const argv[]);
 int board_key_test(int argc, char * const argv[]);
 int board_emmc_test(int argc, char * const argv[]);
 int board_regulator_test(int argc, char * const argv[]);
+int board_rknand_test(int argc, char * const argv[]);
 
 #endif /* _TEST_ROCKCHIP_H */

commit 4b81300eb83290d63af054b224a90b4c631cf665
Author: Shawn Lin <shawn.lin@rock-chips.com>
Date:   Tue Oct 24 17:31:36 2017 +0800

    test: improve the code of test-emmc
    
    Firstly, we use simple_strtoul to simplify the code,
    and it could even supports hexadecimal number as parameter.
    Then we use kmalloc so that could ensure we get aligned
    address for transfer. Finally correct the code logic for
    blocks restriction.
    
    Change-Id: I0bcee1170f642b47bff0b94883061c1a3645c5eb
    Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

diff --git a/test/rockchip/test-emmc.c b/test/rockchip/test-emmc.c
index d0407aa94b..a7b301e91e 100644
--- a/test/rockchip/test-emmc.c
+++ b/test/rockchip/test-emmc.c
@@ -12,21 +12,6 @@
 #include <malloc.h>
 #include "test-rockchip.h"
 
-static u32 atoi(const char *str)
-{
-	u32 s=0;
-
-	while(*str == ' ')
-		str++;
-
-	while(*str >= '0' && *str <= '9') {
-		s = s * 10 + *str - '0';
-		str++;
-	}
-
-	return s;
-}
-
 int board_emmc_test(int argc, char * const argv[])
 {
 	u8 *write_buffer, *read_buffer;
@@ -35,33 +20,38 @@ int board_emmc_test(int argc, char * const argv[])
 	int err = 0;
 	char cmd_mmc[512] = {0};
 
-	blocks = atoi(argv[2]);
+	blocks = simple_strtoul(argv[2], NULL, 0);
 	if (!blocks) {
 		printf("Usage: rktest emmc blocks\n");
 		printf("8129 <= blocks <= 30000\n");
 		err = -EINVAL;
 		goto err_wb;
-	} else if (blocks % 2) {
+	}
+
+	if (blocks % 2)
 		/* Round up */
 		blocks += 1;
-	} else if (blocks < 8192) {
+
+	if (blocks < 8192) {
 		printf("Round up to 8192 blocks compulsively\n");
 		blocks = 8192;
-	} else if (blocks > 30000) {
+	}
+
+	if (blocks > 30000) {
 		printf("Round down to 30000 blocks compulsively\n");
 		blocks = 30000;
 	}
 
 	/* 1. Prepare memory */
 
-	write_buffer = (u8 *)malloc(sizeof(u8) * blocks * 512);
+	write_buffer = (u8 *)kmalloc(sizeof(u8) * blocks * 512);
 	if (!write_buffer) {
 		printf("No memory for write_buffer!\n");
 		err = -ENOMEM;
 		goto err_wb;
 	}
 
-	read_buffer = (u8 *)malloc(sizeof(u8) * blocks * 512);
+	read_buffer = (u8 *)kmalloc(sizeof(u8) * blocks * 512);
 	if (!read_buffer) {
 		printf("No memory for read_buffer!\n");
 		err = -ENOMEM;

commit 0948688932e5c5d6ee3bc76628bcd87a81ae1a59
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Thu Oct 12 18:26:53 2017 +0800

    dm: input: add driver model rc uclass
    
    Change-Id: I1e9b067d49e81bd09c2d1e6c9612f0831480ce73
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig
index 1a4c5a357f..02933f7027 100644
--- a/drivers/input/Kconfig
+++ b/drivers/input/Kconfig
@@ -13,6 +13,13 @@ config DM_KEY
 	help
 	  This adds a simple uclass for key.
 
+config DM_RC
+	bool "Enable driver model Remote Controller support"
+	depends on DM
+	help
+	  This adds a uclass for Remote Controllers. This is needed
+	  in order to support standalone IR receivers.
+
 config CROS_EC_KEYB
 	bool "Enable Chrome OS EC keyboard support"
 	help
diff --git a/drivers/input/Makefile b/drivers/input/Makefile
index bf2d6e3642..fe8fa640f5 100644
--- a/drivers/input/Makefile
+++ b/drivers/input/Makefile
@@ -7,6 +7,7 @@
 
 obj-$(CONFIG_DM_KEYBOARD) += keyboard-uclass.o
 obj-$(CONFIG_DM_KEY) += key-uclass.o
+obj-$(CONFIG_DM_RC) += rc-uclass.o
 
 obj-$(CONFIG_I8042_KEYB) += i8042.o
 obj-$(CONFIG_TEGRA_KEYBOARD) += tegra-kbc.o
diff --git a/drivers/input/rc-uclass.c b/drivers/input/rc-uclass.c
new file mode 100644
index 0000000000..3504e48cf4
--- /dev/null
+++ b/drivers/input/rc-uclass.c
@@ -0,0 +1,33 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <dm.h>
+#include <rc.h>
+
+int rc_get_keycode(struct udevice *dev)
+{
+	const struct dm_rc_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->get_keycode)
+		return -ENOSYS;
+
+	return ops->get_keycode(dev);
+}
+
+int rc_get_repeat(struct udevice *dev)
+{
+	const struct dm_rc_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->get_repeat)
+		return -ENOSYS;
+
+	return ops->get_repeat(dev);
+}
+
+UCLASS_DRIVER(key) = {
+	.id		= UCLASS_RC,
+	.name		= "rc",
+};
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 779daa80f6..fabdc849c6 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -93,6 +93,7 @@ enum uclass_id {
 	UCLASS_WDT,		/* Watchdot Timer driver */
 	UCLASS_FG,
 	UCLASS_KEY,
+	UCLASS_RC,		/* Remote Controller */
 
 	UCLASS_COUNT,
 	UCLASS_INVALID = -1,
diff --git a/include/rc.h b/include/rc.h
new file mode 100644
index 0000000000..dbaac9e21c
--- /dev/null
+++ b/include/rc.h
@@ -0,0 +1,18 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _RC_H_
+#define _RC_H_
+
+struct dm_rc_ops {
+	int (*get_keycode)(struct udevice *dev);
+	int (*get_repeat)(struct udevice *dev);
+};
+
+int rc_get_keycode(struct udevice *dev);
+int rc_get_repeat(struct udevice *dev);
+
+#endif

commit 91441457b34909b43a4f7b377b10207bc066606c
Author: francis.fan <francis.fan@rock-chips.com>
Date:   Fri Oct 20 10:40:37 2017 +0800

    rockchip: add vendor storage api
    
    support read/write configuration data from/to vendor partition
    that allocated on emmc/nand/spi nor storage devices.
    
    Change-Id: Ie9aaf882f43d78f0baeeafec0c681c7c9e82ca97
    Signed-off-by: Francis Fan <francis.fan@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/vendor.h b/arch/arm/include/asm/arch-rockchip/vendor.h
new file mode 100644
index 0000000000..fdeafefd0a
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/vendor.h
@@ -0,0 +1,17 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#ifndef __ROCKCHIP_VENDOR_
+#define __ROCKCHIP_VENDOR_
+
+#define VENDOR_SN_ID		1 /* serialno */
+#define VENDOR_WIFI_MAC_ID	2 /* wifi mac */
+#define VENDOR_LAN_MAC_ID	3 /* lan mac */
+#define VENDOR_BLUETOOTH_ID	4 /* bluetooth mac */
+
+int vendor_storage_read(u16 id, void *pbuf, u16 size);
+int vendor_storage_write(u16 id, void *pbuf, u16 size);
+
+#endif /* _ROCKCHIP_VENDOR_ */
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index aa418c35b1..ec6522b89a 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -213,6 +213,13 @@ config ROCKCHIP_PARTITION_BOOT
 	help
 	  This enables support for bootimg system from rockchip format partition
 
+config ROCKCHIP_VENDOR_PARTITION
+        bool "Rockchip vendor partition support"
+        depends on ROCKCHIP_BLOCK_API
+        help
+          This enable support to read/write vendor configuration data from/to
+	  this partition
+
 config GICV2
 	bool "ARM GICv2"
 
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index cc3a63e3ec..52eb04645f 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -24,6 +24,7 @@ obj-spl-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board-spl.o spl-boot-order.o
 
 ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
 obj-$(CONFIG_ROCKCHIP_BLOCK_API) += blk.o
+obj-$(CONFIG_ROCKCHIP_VENDOR_PARTITION) += vendor.o
 obj-$(CONFIG_ROCKCHIP_PARAM) += rockchip_parameter.o
 obj-$(CONFIG_ROCKCHIP_RESOURCE_IMAGE) += resource_img.o
 obj-$(CONFIG_ROCKCHIP_PARTITION_BOOT) += bootrkp.o
diff --git a/arch/arm/mach-rockchip/vendor.c b/arch/arm/mach-rockchip/vendor.c
new file mode 100644
index 0000000000..b1c08e2d43
--- /dev/null
+++ b/arch/arm/mach-rockchip/vendor.c
@@ -0,0 +1,604 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <malloc.h>
+#include <asm/arch/vendor.h>
+
+#include "rockchip_blk.h"
+
+/* tag for vendor check */
+#define VENDOR_TAG		0x524B5644
+/* The Vendor partition contains the number of Vendor blocks */
+#define VENDOR_PART_NUM		4
+/* align to 64 bytes */
+#define VENDOR_BTYE_ALIGN	0x3F
+#define VENDOR_BLOCK_SIZE	512
+
+/* --- Emmc define --- */
+/* Starting address of the Vendor in memory. */
+#define EMMC_VENDOR_PART_OFFSET		(1024 * 7)
+/*
+ * The number of memory blocks used by each
+ * Vendor structure(128 * 512B = 64KB)
+ */
+#define EMMC_VENDOR_PART_BLKS		128
+/* The maximum number of items in each Vendor block */
+#define EMMC_VENDOR_ITEM_NUM		126
+
+/* --- Spi/Spi Nand/SLC/MLC define --- */
+/* The Vendor partition contains the number of Vendor blocks */
+#define	FLASH_VENDOR_PART_OFFSET	8
+/*
+ * The number of memory blocks used by each
+ * Vendor structure(8 * 512B = 4KB)
+ */
+#define FLASH_VENDOR_PART_BLKS		8
+/* The maximum number of items in each Vendor block */
+#define FLASH_VENDOR_ITEM_NUM		62
+
+/* Vendor uinit test define */
+/* #define VENDOR_STORAGE_TEST */
+#ifdef VENDOR_STORAGE_TEST
+int vendor_storage_test(void);
+#endif /* VENDOR_STORAGE_TEST */
+
+struct vendor_item {
+	u16  id;
+	u16  offset;
+	u16  size;
+	u16  flag;
+};
+
+struct vendor_hdr {
+	u32	tag;
+	u32	version;
+	u16	next_index;
+	u16	item_num;
+	u16	free_offset; /* Free space offset */
+	u16	free_size; /* Free space size */
+};
+
+/*
+ * Different types of Flash vendor info are different.
+ * EMMC:EMMC_VENDOR_PART_BLKS * BLOCK_SIZE(512) = 64KB;
+ * Spi Nor/Spi Nand/SLC/MLC: FLASH_VENDOR_PART_BLKS *
+ * BLOCK_SIZE(512) = 4KB.
+ * hash: For future expansion.
+ * version2: Together with hdr->version, it is used to
+ * ensure the current Vendor block content integrity.
+ *   (version2 == hdr->version):Data valid;
+ *   (version2 != hdr->version):Data invalid.
+ */
+struct vendor_info {
+	struct vendor_hdr *hdr;
+	struct vendor_item *item;
+	u8 *data;
+	u32 *hash;
+	u32 *version2;
+};
+/*
+ * Calculate the offset of each field for emmc.
+ * Emmc vendor info size: 64KB
+ */
+#define EMMC_VENDOR_INFO_SIZE	(EMMC_VENDOR_PART_BLKS * VENDOR_BLOCK_SIZE)
+#define EMMC_VENDOR_DATA_OFFSET	(sizeof(struct vendor_hdr) + EMMC_VENDOR_ITEM_NUM * sizeof(struct vendor_item))
+#define EMMC_VENDOR_HASH_OFFSET (EMMC_VENDOR_INFO_SIZE - 8)
+#define EMMC_VENDOR_VERSION2_OFFSET (EMMC_VENDOR_INFO_SIZE - 4)
+/*
+ * Calculate the offset of each field for spi nor/spi nand/slc/mlc.
+ * Flash vendor info size: 4KB
+ */
+#define FLASH_VENDOR_INFO_SIZE	(FLASH_VENDOR_PART_BLKS * VENDOR_BLOCK_SIZE)
+#define FLASH_VENDOR_DATA_OFFSET	(sizeof(struct vendor_hdr) + FLASH_VENDOR_ITEM_NUM * sizeof(struct vendor_item))
+#define FLASH_VENDOR_HASH_OFFSET (FLASH_VENDOR_INFO_SIZE - 8)
+#define FLASH_VENDOR_VERSION2_OFFSET (FLASH_VENDOR_INFO_SIZE - 4)
+
+/* vendor info */
+static struct vendor_info vendor_info;
+/* The storage type of the device */
+static int bootdev_type;
+
+/**********************************************************/
+/*              vendor API implementation                 */
+/**********************************************************/
+static int vendor_ops(u8 *buffer, u32 addr, u32 n_sec, int write)
+{
+	unsigned int lba = 0;
+	int ret = 0;
+
+	/* Get the offset address according to the device type */
+	switch (bootdev_type) {
+	case BOOT_FROM_EMMC:
+		/*
+		 * The location of VendorStorage in Flash is shown in the
+		 * following figure. The starting address of the VendorStorage
+		 * partition is 3.5MB(EMMC_VENDOR_PART_OFFSET*BLOCK_SIZE(512)),
+		 * and the partition size is 256KB.
+		 * ----------------------------------------------------
+		 * |   3.5MB    |  VendorStorage  |                   |
+		 * ----------------------------------------------------
+		 */
+		lba = EMMC_VENDOR_PART_OFFSET;
+		debug("[Vednor INFO]:VendorStorage offset address=0x%x\n", lba);
+		break;
+	case BOOT_FROM_FLASH:
+	case BOOT_FROM_SPI_NOR:
+	case BOOT_FROM_SPI_NAND:
+		/*
+		 * The location of VendorStorage in Flash is shown in the
+		 * following figure. The starting address of the VendorStorage
+		 * partition is 4KB (FLASH_VENDOR_PART_OFFSET * BLOCK_SIZE),
+		 * and the partition size is 16KB.
+		 * ----------------------------------------------------
+		 * |   4KB    |  VendorStorage  |                     |
+		 * ----------------------------------------------------
+		 */
+		lba = FLASH_VENDOR_PART_OFFSET;
+		debug("[Vednor INFO]:VendorStorage offset address=0x%x\n", lba);
+		break;
+	default:
+		debug("[Vednor ERROR]:Boot device type is invalid!\n");
+		ret = -ENODEV;
+		break;
+	}
+	if (!ret) {
+		if (write)
+			ret = blkdev_write(buffer, lba + addr, n_sec);
+		else
+			ret = blkdev_read(buffer, lba + addr, n_sec);
+	}
+	debug("[Vednor INFO]:op=%s, ret=%d\n", write ? "write" : "read", ret);
+
+	return ret;
+}
+
+/*
+ * The VendorStorage partition is divided into four parts
+ * (vendor 0-3) and its structure is shown in the following figure.
+ * The init function is used to select the latest and valid vendor.
+ *
+ * |******************** FLASH ********************|
+ * -------------------------------------------------
+ * |  vendor0  |  vendor1  |  vendor2  |  vendor3  |
+ * -------------------------------------------------
+ * Notices:
+ *   1. "version" and "version2" are used to verify that the vendor
+ *      is valid (equal is valid).
+ *   2. the "version" value is larger, indicating that the current
+ *      verndor data is new.
+ */
+int vendor_storage_init(void)
+{
+	int ret = 0;
+	u8 *buffer;
+	u32 size, i;
+	u32 max_ver = 0;
+	u32 max_index = 0;
+	u16 data_offset, hash_offset;
+	u16 version2_offset, part_size;
+
+	bootdev_type = get_bootdev_type();
+	if (!bootdev_type) {
+		printf("[Vednor ERROR]:Invalid boot device type(%d)\n",
+		       bootdev_type);
+		return -ENODEV;
+	}
+
+	switch (bootdev_type) {
+	case BOOT_FROM_EMMC:
+		size = EMMC_VENDOR_INFO_SIZE;
+		part_size = EMMC_VENDOR_PART_BLKS;
+		data_offset = EMMC_VENDOR_DATA_OFFSET;
+		hash_offset = EMMC_VENDOR_HASH_OFFSET;
+		version2_offset = EMMC_VENDOR_VERSION2_OFFSET;
+		break;
+	case BOOT_FROM_FLASH:
+	case BOOT_FROM_SPI_NOR:
+	case BOOT_FROM_SPI_NAND:
+		size = FLASH_VENDOR_INFO_SIZE;
+		part_size = FLASH_VENDOR_PART_BLKS;
+		data_offset = FLASH_VENDOR_DATA_OFFSET;
+		hash_offset = FLASH_VENDOR_HASH_OFFSET;
+		version2_offset = FLASH_VENDOR_VERSION2_OFFSET;
+		break;
+	default:
+		debug("[Vednor ERROR]:Boot device type is invalid!\n");
+		ret = -ENODEV;
+		break;
+	}
+	/* Invalid bootdev type */
+	if (ret)
+		return ret;
+	/* Always use, no need to release */
+	buffer = (u8 *)malloc(size);
+	if (!buffer) {
+		printf("[Vednor ERROR]:Malloc failed!\n");
+		return -ENOMEM;
+	}
+	/* Pointer initialization */
+	vendor_info.hdr = (struct vendor_hdr *)buffer;
+	vendor_info.item = (struct vendor_item *)(buffer + sizeof(struct vendor_hdr));
+	vendor_info.data = buffer + data_offset;
+	vendor_info.hash = (u32 *)(buffer + hash_offset);
+	vendor_info.version2 = (u32 *)(buffer + version2_offset);
+
+	/* Find valid and up-to-date one from (vendor0 - vendor3) */
+	for (i = 0; i < VENDOR_PART_NUM; i++) {
+		ret = vendor_ops((u8 *)vendor_info.hdr, part_size * i, part_size, 0);
+		if (ret)
+			return ret;
+
+		if ((vendor_info.hdr->tag == VENDOR_TAG) &&
+		    (*(vendor_info.version2) == vendor_info.hdr->version)) {
+			if (max_ver < vendor_info.hdr->version) {
+				max_index = i;
+				max_ver = vendor_info.hdr->version;
+			}
+		}
+	}
+	if (max_ver) {
+		debug("[Vednor INFO]:max_ver=%d, vendor_id=%d.\n", max_ver, max_index);
+		/*
+		 * Keep vendor_info the same as the largest
+		 * version of vendor
+		 */
+		if (max_index != (VENDOR_PART_NUM - 1))
+			ret = vendor_ops((u8 *)vendor_info.hdr, part_size * max_index, part_size, 0);
+	} else {
+		debug("[Vednor INFO]:Reset vendor info...\n");
+		memset((u8 *)vendor_info.hdr, 0, size);
+		vendor_info.hdr->version = 1;
+		vendor_info.hdr->tag = VENDOR_TAG;
+		/* data field length */
+		vendor_info.hdr->free_size = ((u32)vendor_info.hash - (u32)vendor_info.data);
+		*(vendor_info.version2) = vendor_info.hdr->version;
+	}
+	debug("[Vednor INFO]:ret=%d.\n", ret);
+
+#ifdef VENDOR_STORAGE_TEST
+	if (vendor_storage_test())
+		printf("[Vendor ERROR]:Vendor test result:failure\n");
+#endif
+
+	return ret;
+}
+
+int vendor_storage_read(u16 id, void *pbuf, u16 size)
+{
+	int ret = 0;
+	u32 i;
+	u16 offset;
+	struct vendor_item *item;
+
+	/* init vendor storage */
+	if (!bootdev_type) {
+		ret = vendor_storage_init();
+		if (ret)
+			return ret;
+	}
+
+	item = vendor_info.item;
+	for (i = 0; i < vendor_info.hdr->item_num; i++) {
+		if ((item + i)->id == id) {
+			debug("[Vednor INFO]:Find the matching item, id=%d\n", id);
+			/* Correct the size value */
+			if (size > (item + i)->size)
+				size = (item + i)->size;
+			offset = (item + i)->offset;
+			memcpy(pbuf, (vendor_info.data + offset), size);
+			return size;
+		}
+	}
+	debug("[Vednor ERROR]:No matching item, id=%d\n", id);
+
+	return -EINVAL;
+}
+
+int vendor_storage_write(u16 id, void *pbuf, u16 size)
+{
+	int ret = 0;
+	u32 i, next_index, align_size;
+	struct vendor_item *item;
+	u16 part_size, max_item_num, offset;
+
+	/* init vendor storage */
+	if (!bootdev_type) {
+		ret = vendor_storage_init();
+		if (ret)
+			return ret;
+	}
+
+	switch (bootdev_type) {
+	case BOOT_FROM_EMMC:
+		part_size = EMMC_VENDOR_PART_BLKS;
+		max_item_num = EMMC_VENDOR_ITEM_NUM;
+		break;
+	case BOOT_FROM_FLASH:
+	case BOOT_FROM_SPI_NOR:
+	case BOOT_FROM_SPI_NAND:
+		part_size = FLASH_VENDOR_PART_BLKS;
+		max_item_num = FLASH_VENDOR_ITEM_NUM;
+		break;
+	default:
+		ret = -ENODEV;
+		break;
+	}
+	/* Invalid bootdev? */
+	if (ret)
+		return ret;
+
+	next_index = vendor_info.hdr->next_index;
+	/* algin to 64 bytes*/
+	align_size = (size + VENDOR_BTYE_ALIGN) & (~VENDOR_BTYE_ALIGN);
+	if (size > align_size)
+		return -EINVAL;
+
+	item = vendor_info.item;
+	/* If item already exist, update the item data */
+	for (i = 0; i < vendor_info.hdr->item_num; i++) {
+		if ((item + i)->id == id) {
+			debug("[Vednor INFO]:Find the matching item, id=%d\n", id);
+			offset = (item + i)->offset;
+			memcpy((vendor_info.data + offset), pbuf, size);
+			(item + i)->size = size;
+			vendor_info.hdr->version++;
+			*(vendor_info.version2) = vendor_info.hdr->version;
+			vendor_info.hdr->next_index++;
+			if (vendor_info.hdr->next_index >= VENDOR_PART_NUM)
+				vendor_info.hdr->next_index = 0;
+			return vendor_ops((u8 *)vendor_info.hdr, part_size * next_index, part_size, 1);
+		}
+	}
+	/*
+	 * If item does not exist, and free size is enough,
+	 * creat a new one
+	 */
+	if ((vendor_info.hdr->item_num < max_item_num) &&
+	    (vendor_info.hdr->free_size >= align_size)) {
+		debug("[Vednor INFO]:Create new Item, id=%d\n", id);
+		item = vendor_info.item + vendor_info.hdr->item_num;
+		item->id = id;
+		item->offset = vendor_info.hdr->free_offset;
+		item->size = size;
+
+		vendor_info.hdr->free_offset += align_size;
+		vendor_info.hdr->free_size -= align_size;
+		memcpy((vendor_info.data + item->offset), pbuf, size);
+		vendor_info.hdr->item_num++;
+		vendor_info.hdr->version++;
+		vendor_info.hdr->next_index++;
+		*(vendor_info.version2) = vendor_info.hdr->version;
+		if (vendor_info.hdr->next_index >= VENDOR_PART_NUM)
+			vendor_info.hdr->next_index = 0;
+
+		return vendor_ops((u8 *)vendor_info.hdr, part_size * next_index, part_size, 1);
+	}
+	debug("[Vednor ERROR]:Vendor has no space left!\n");
+
+	return -ENOMEM;
+}
+
+/**********************************************************/
+/*              vendor API uinit test                      */
+/**********************************************************/
+#ifdef VENDOR_STORAGE_TEST
+/* Reset the vendor storage space to the initial state */
+void vendor_test_reset(void)
+{
+	u16 i, part_size;
+	u32 size;
+
+	switch (bootdev_type) {
+	case BOOT_FROM_EMMC:
+		size = EMMC_VENDOR_INFO_SIZE;
+		part_size = EMMC_VENDOR_PART_BLKS;
+		break;
+	case BOOT_FROM_FLASH:
+	case BOOT_FROM_SPI_NOR:
+	case BOOT_FROM_SPI_NAND:
+		size = FLASH_VENDOR_INFO_SIZE;
+		part_size = FLASH_VENDOR_PART_BLKS;
+		break;
+	default:
+		size = 0;
+		part_size = 0;
+		break;
+	}
+	/* Invalid bootdev? */
+	if (!size)
+		return;
+
+	memset((u8 *)vendor_info.hdr, 0, size);
+	vendor_info.hdr->version = 1;
+	vendor_info.hdr->tag = VENDOR_TAG;
+	/* data field length */
+	vendor_info.hdr->free_size =
+		((u32)vendor_info.hash - (u32)vendor_info.data);
+	*(vendor_info.version2) = vendor_info.hdr->version;
+	/* write to flash. */
+	for (i = 0; i < VENDOR_PART_NUM; i++)
+		vendor_ops((u8 *)vendor_info.hdr, part_size * i, part_size, 1);
+}
+
+/*
+ * A total of four tests
+ * 1.All items test.
+ * 2.Overrides the maximum number of items test.
+ * 3.Single Item memory overflow test.
+ * 4.Total memory overflow test.
+ */
+int vendor_storage_test(void)
+{
+	u16 id, size, j, item_num;
+	u32 total_size;
+	u8 *buffer = NULL;
+	int ret = 0;
+
+	/*
+	 * Calculate the maximum number of items and the maximum
+	 * allocable memory for each item.
+	 */
+	switch (bootdev_type) {
+	case BOOT_FROM_EMMC:
+		item_num = EMMC_VENDOR_ITEM_NUM;
+		total_size = (u32)vendor_info.hash - (u32)vendor_info.data;
+		size = total_size/item_num;
+		break;
+	case BOOT_FROM_FLASH:
+	case BOOT_FROM_SPI_NOR:
+	case BOOT_FROM_SPI_NAND:
+		item_num = FLASH_VENDOR_ITEM_NUM;
+		total_size = (u32)vendor_info.hash - (u32)vendor_info.data;
+		size = total_size/item_num;
+		break;
+	default:
+		total_size = 0;
+		break;
+	}
+	/* Invalid bootdev? */
+	if (!total_size)
+		return -ENODEV;
+	/* 64 bytes are aligned and rounded down */
+	size = (size/64)*64;
+	/* malloc memory */
+	buffer = (u8 *)malloc(size);
+	if (!buffer) {
+		printf("[Vendor Test]:Malloc failed(size=%d)!\n", size);
+		return -ENOMEM;
+	}
+	printf("[Vendor Test]:Test Start...\n");
+	printf("[Vendor Test]:Before Test, Vendor Resetting.\n");
+	vendor_test_reset();
+
+	/* FIRST TEST: test all items can be used correctly */
+	printf("[Vendor Test]:<All Items Used> Test Start...\n");
+	printf("[Vendor Test]:item_num=%d, size=%d.\n",
+	       item_num, size);
+	/*
+	 * Write data, then read the data, and compare the
+	 * data consistency
+	 */
+	for (id = 0; id < item_num; id++) {
+		memset(buffer, id, size);
+		ret = vendor_storage_write(id, buffer, size);
+		if (ret) {
+			printf("[Vendor Test]:vendor write failed(id=%d)!\n", id);
+			free(buffer);
+			return ret;
+		}
+	}
+	/* Read data */
+	for (id = 0; id < item_num; id++) {
+		memset(buffer, 0, size);
+		ret = vendor_storage_read(id, buffer, size);
+		if (ret != size) {
+			printf("[Vendor Test]:vendor read failed(id=%d)!\n", id);
+			free(buffer);
+			return ret;
+		}
+		/* check data Correctness */
+		for (j = 0; j < size; j++) {
+			if (*(buffer + j) != id) {
+				printf("[Vendor Test]:Unexpected error occurs(id=%d)\n", id);
+				printf("the data content is:\n");
+				print_buffer(0, buffer, 1, size, 16);
+
+				free(buffer);
+				return -1;
+			}
+		}
+		debug("\t#id=%03d success,data=0x%02x,size=%d.\n", id, *buffer, size);
+	}
+	printf("[Vendor Test]:<All Items Used> Test End,States:OK\n");
+
+	/*
+	 * SECOND TEST: Overrides the maximum number of items to see if the
+	 * return value matches the expectation
+	 */
+	printf("[Vendor Test]:<Overflow Items Cnt> Test Start...\n");
+	/* Any id value that was not used before */
+	id = item_num;
+	printf("[Vendor Test]:id=%d, size=%d.\n", id, size);
+	ret = vendor_storage_write(id, buffer, size);
+	if (ret == -ENOMEM)
+		printf("[Vendor Test]:<Overflow Items Cnt> Test End,States:OK\n");
+	else
+		printf("[Vendor Test]:<Overflow Items Cnt> Test End,States:Failed\n");
+
+	/* free buffer, remalloc later */
+	free(buffer);
+	buffer = NULL;
+	/*
+	 * remalloc memory and recalculate size to test memory overflow
+	 * (1) item_num > 10: Memory is divided into 10 blocks,
+	 * 11th memory will overflow.
+	 * (2) 10 > item_num > 1: Memory is divided into item_num-1
+	 * blocks. item_num block, memory will overflow.
+	 * (3) item_num = 1: size = total_size + 512 Bytes, The first
+	 * block, memory will overflow.
+	 * The reason to do so is to minimize the size of the memory,
+	 * making malloc easier to perform successfully.
+	 */
+	item_num = (item_num > 10) ? 10 : (item_num - 1);
+	size = item_num ? (total_size / item_num) : (total_size + 512);
+	size = (size + VENDOR_BTYE_ALIGN) & (~VENDOR_BTYE_ALIGN);
+	/* Find item_num value that can make the memory overflow */
+	for (id = 0; id <= item_num; id++) {
+		if (((id + 1) * size) > total_size) {
+			item_num = id;
+			break;
+		}
+	}
+	/* malloc */
+	buffer = (u8 *)malloc(size);
+	if (buffer == NULL) {
+		printf("[Vendor Test]:Malloc failed(size=%d)!\n", size);
+		return -ENOMEM;
+	}
+
+	/* THIRD TEST: Single Item memory overflow test */
+	printf("[Vendor Test]:<Single Item Memory Overflow> Test Start...\n");
+	/* The value can be arbitrary */
+	memset(buffer, 'a', size);
+	/* Any id value that was used before */
+	id = 0;
+	printf("[Vendor Test]:id=%d, size=%d.\n", id, size);
+	ret = vendor_storage_write(id, buffer, size);
+	if (!ret)
+		printf("[Vendor Test]:<Single Item Memory Overflow> Test End, States:OK\n");
+	else
+		printf("[Vendor Test]:<Single Item Memory Overflow> Test End, States:Failed\n");
+
+	/* FORTH TEST: Total memory overflow test */
+	printf("[Vendor Test]:<Total memory overflow> Test Start...\n");
+	printf("[Vendor Test]:item_num=%d, size=%d.\n", item_num, size);
+
+	vendor_test_reset();
+	for (id = 0; id <= item_num; id++) {
+		memset(buffer, id, size);
+		ret = vendor_storage_write(id, buffer, size);
+		if (ret) {
+			if ((id == item_num) && (ret == -ENOMEM)) {
+				printf("[Vendor Test]:<Total memory overflow> Test End, States:OK\n");
+				break;
+			} else {
+				printf("[Vendor Test]:<Total memory overflow> Test End, States:Failed\n");
+				break;
+			}
+		}
+		debug("\t#id=%03d success,data=0x%02x,size=%d.\n", id, *buffer, size);
+	}
+
+	/* Test end */
+	printf("[Vendor Test]:After Test, Vendor Resetting...\n");
+	vendor_test_reset();
+	printf("[Vendor Test]:Test End.\n");
+	free(buffer);
+
+	return 0;
+}
+#endif /* VENDOR_STORAGE_TEST */

commit 5d86b08ce2b6fb8cfa407b40b282e41b17ebc7e8
Author: francis.fan <francis.fan@rock-chips.com>
Date:   Fri Oct 20 10:24:22 2017 +0800

    rockchip: add get_bootdev_type api
    
    Change-Id: Iebba25e824881a107615674f0700a39e03823949
    Signed-off-by: Francis Fan <francis.fan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/blk.c b/arch/arm/mach-rockchip/blk.c
index a8c4488c3a..2ffc8119a1 100644
--- a/arch/arm/mach-rockchip/blk.c
+++ b/arch/arm/mach-rockchip/blk.c
@@ -77,3 +77,28 @@ int blkdev_write(void *buffer, u32 blk, u32 cnt)
 	return mmcblk_write(mmc, buffer, blk, cnt);
 }
 
+/* Gets the storage type of the current device */
+int get_bootdev_type(void)
+{
+	int type = 0;
+
+	#ifdef CONFIG_EMMC_BOOT
+		type = BOOT_FROM_EMMC;
+	#endif /* CONFIG_EMMC_BOOT */
+	#ifdef CONFIG_QSPI_BOOT
+		type = BOOT_FROM_SPI_NAND;
+	#endif /* CONFIG_QSPI_BOOT */
+	#ifdef CONFIG_NAND_BOOT
+		typpe = BOOT_FROM_FLASH;
+	#endif /* CONFIG_NAND_BOOT */
+	#ifdef CONFIG_NOR_BOOT
+		type = BOOT_FROM_SPI_NOR;
+	#endif /* CONFIG_NOR_BOOT */
+
+	/* For current use(Only EMMC support!) */
+	if (!type)
+		type = BOOT_FROM_EMMC;
+
+	return type;
+}
+
diff --git a/arch/arm/mach-rockchip/rockchip_blk.h b/arch/arm/mach-rockchip/rockchip_blk.h
index 0539771d46..f6040d0b7b 100644
--- a/arch/arm/mach-rockchip/rockchip_blk.h
+++ b/arch/arm/mach-rockchip/rockchip_blk.h
@@ -1,7 +1,20 @@
 #ifndef __RK_BLK_H_
 #define __RK_BLK_H_
 
+/*
+ * boot device type define
+ * 1:flash 2:emmc 4:sdcard0 8:sdcard1
+ */
+#define BOOT_FROM_FLASH		(1 << 0)
+#define BOOT_FROM_EMMC		(1 << 1)
+#define BOOT_FROM_SD0		(1 << 2)
+#define BOOT_FROM_SD1		(1 << 3)
+#define BOOT_FROM_SPI_NOR	(1 << 4)
+#define BOOT_FROM_RAM		(1 << 5)
+#define BOOT_FROM_SPI_NAND	(1 << 6)
+
 int blkdev_read(void *buffer, u32 blk, u32 cnt);
 int blkdev_write(void *buffer, u32 blk, u32 cnt);
+int get_bootdev_type(void);
 
 #endif

commit ed5ce517739a2041dc32bb2c8aa2437f7889c5ce
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 23 18:06:55 2017 +0800

    rockchip: test: support regualtor test
    
    1. test current regulator state matches fdt config or not;
    2. test accuracy and correctness of voltage adjustment;
    3. the test command: "rktest regulator".
    
    Change-Id: I184ce36d4da7648a3c3052edbafb37f37c3a29be
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/test/rockchip/Makefile b/test/rockchip/Makefile
index f3c68c942a..fb6876ee21 100644
--- a/test/rockchip/Makefile
+++ b/test/rockchip/Makefile
@@ -8,3 +8,4 @@ obj-y += test-rockchip.o
 obj-y += test-timer.o
 obj-y += test-key.o
 obj-y += test-emmc.o
+obj-y += test-regulator.o
diff --git a/test/rockchip/test-regulator.c b/test/rockchip/test-regulator.c
new file mode 100644
index 0000000000..53fddfed51
--- /dev/null
+++ b/test/rockchip/test-regulator.c
@@ -0,0 +1,154 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <asm/io.h>
+#include <common.h>
+#include <common.h>
+#include <dm.h>
+#include <power/pmic.h>
+#include <power/regulator.h>
+#include "test-rockchip.h"
+
+static void regulator_show_dt(struct udevice *dev)
+{
+	struct dm_regulator_uclass_platdata *uc_pdata;
+
+	uc_pdata = dev_get_uclass_platdata(dev);
+
+	printf("\t%s@%s: \t[", dev->name, uc_pdata->name);
+	if (uc_pdata->flags & REGULATOR_FLAG_AUTOSET_UV)
+		printf("%d uV", uc_pdata->min_uV);
+	else
+		printf("%d ~ %d uV", uc_pdata->min_uV, uc_pdata->max_uV);
+
+	printf("; %s]\n", uc_pdata->boot_on ? "enable" : "disabled");
+}
+
+static void regulator_show_state(struct udevice *dev)
+{
+	struct dm_regulator_uclass_platdata *uc_pdata;
+	int enable, uV;
+	int same = 1;
+
+	uc_pdata = dev_get_uclass_platdata(dev);
+	enable = regulator_get_enable(dev);
+	uV = regulator_get_value(dev);
+
+	if (uc_pdata->flags & REGULATOR_FLAG_AUTOSET_UV)
+		same = (enable == uc_pdata->boot_on) &&
+		       (uV == uc_pdata->min_uV);
+
+	printf("\t%s@%s: \t[", dev->name, uc_pdata->name);
+	printf("%d uV", uV);
+	printf("; %s] <%s>\n", enable ? "enable" : "disabled",
+	       same ? "same" : "Not same");
+}
+
+static int regulator_confirm_dt(void)
+{
+	struct udevice *dev;
+	struct uclass *uc;
+	int ret;
+
+	ret = uclass_get(UCLASS_REGULATOR, &uc);
+	if (ret)
+		return ret;
+
+	printf("<FDT config>:\n");
+	for (uclass_first_device(UCLASS_REGULATOR, &dev);
+	     dev;
+	     uclass_next_device(&dev)) {
+		regulator_show_dt(dev);
+	}
+
+	printf("\n\n\n<NOW state>:\n");
+	for (uclass_first_device(UCLASS_REGULATOR, &dev);
+	     dev;
+	     uclass_next_device(&dev)) {
+		regulator_show_state(dev);
+	}
+
+	printf("\n\n\n");
+	printf("1. Please compare <NOW state> and <FDT config>.\n");
+	printf("2. Please measure the volatge of all regulators "
+	       "and compare with <Now state> voltage.\n\n");
+	printf("After above done, you can hit any key to continue test case2...\n\n\n\n");
+
+	while (!getc())
+		;
+
+	return 0;
+}
+
+static int regulator_adjust_voltage(struct udevice *dev)
+{
+	struct dm_regulator_uclass_platdata *uc_pdata;
+	int i, uV, save_uV, step_uV = 12500;
+
+	uc_pdata = dev_get_uclass_platdata(dev);
+
+	/* only not fix voltage regulator will be tested! */
+	if ((uc_pdata->max_uV == uc_pdata->min_uV) ||
+	    !regulator_get_enable(dev))
+		return 0;
+
+	/* save for restore after test done */
+	save_uV = regulator_get_value(dev);
+
+	for (i = 1; i < 4; i++) {
+		uV = regulator_get_value(dev);
+		printf("[%s] ", uc_pdata->name);
+		printf("Try: %d uV --> %d uV;  ", uV, uV + step_uV * i);
+		uV += (step_uV * i);
+		regulator_set_value(dev, uV);
+		printf("Now: %d uV.\n\n", regulator_get_value(dev));
+		printf("Please measure voltage of [%s].\n"
+		       "After done, hit any key to continue...\n\n\n\n",
+		       uc_pdata->name);
+
+		while (!getc())
+			;
+	}
+
+	/* restore voltage */
+	regulator_set_value(dev, save_uV);
+
+	return 0;
+}
+
+static int regulator_confirm_voltage_accuracy(void)
+{
+	struct udevice *dev;
+	struct uclass *uc;
+	int ret;
+
+	ret = uclass_get(UCLASS_REGULATOR, &uc);
+	if (ret)
+		return ret;
+
+	for (uclass_first_device(UCLASS_REGULATOR, &dev);
+	     dev;
+	     uclass_next_device(&dev)) {
+		regulator_adjust_voltage(dev);
+	}
+
+	return 0;
+}
+
+int board_regulator_test(int argc, char * const argv[])
+{
+	printf("----------------------------------------------------\n");
+	printf("REGULATOR test case 1: regulator fdt config confirm\n");
+	printf("----------------------------------------------------\n\n");
+	regulator_confirm_dt();
+
+	printf("----------------------------------------------------\n");
+	printf("REGULATOR test case 2: regulator voltage accuracy confirm\n");
+	printf("----------------------------------------------------\n\n");
+	regulator_confirm_voltage_accuracy();
+
+	return 0;
+}
diff --git a/test/rockchip/test-rockchip.c b/test/rockchip/test-rockchip.c
index b709dfc928..463802d3a9 100644
--- a/test/rockchip/test-rockchip.c
+++ b/test/rockchip/test-rockchip.c
@@ -17,6 +17,7 @@ static board_module_t g_board_modules[] = {
 	{ .name = "timer",	.test = board_timer_test },
 	{ .name = "key",	.test = board_key_test },
 	{ .name = "emmc",	.test = board_emmc_test },
+	{ .name = "regulator",	.test = board_regulator_test },
 };
 
 static int do_rockchip_test(cmd_tbl_t *cmdtp, int flag,
diff --git a/test/rockchip/test-rockchip.h b/test/rockchip/test-rockchip.h
index ad86257c1c..556175476a 100644
--- a/test/rockchip/test-rockchip.h
+++ b/test/rockchip/test-rockchip.h
@@ -10,5 +10,6 @@
 int board_timer_test(int argc, char * const argv[]);
 int board_key_test(int argc, char * const argv[]);
 int board_emmc_test(int argc, char * const argv[]);
+int board_regulator_test(int argc, char * const argv[]);
 
 #endif /* _TEST_ROCKCHIP_H */

commit 895be89479e60417e9d3c0aa76d7406f78224f26
Author: Shawn Lin <shawn.lin@rock-chips.com>
Date:   Tue Oct 24 09:46:26 2017 +0800

    rockchip: test: add modular test for eMMC on Rockchip platform
    
    Write assigned data payload into eMMC and read back. Then
    verify the context by comparing the write_buffer with read_buffer
    one by one.
    
    => rktest emmc 20000
    ***********************************************************
    Rockchip Board Module [emmc] Test start.
    ***********************************************************
    
    MMC write: dev # 0, block # 4096, count 20000 ... 20000 blocks written: OK
    eMMC write: size 9MB, used 313ms, speed 31MB/s
    
    MMC read: dev # 0, block # 4096, count 20000 ... 20000 blocks read: OK
    eMMC read: size 9MB, used 234ms, speed 42MB/s
    
    -----------------------------------------------------------
    Rockchip Board Module [emmc] Test end <PASS>.. Total: 4.389s
    -----------------------------------------------------------
    
    Change-Id: Ia8e6e559a41e8b52169326d3cd408ac7d5a02e97
    Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

diff --git a/test/rockchip/Makefile b/test/rockchip/Makefile
index fd5544479a..f3c68c942a 100644
--- a/test/rockchip/Makefile
+++ b/test/rockchip/Makefile
@@ -7,3 +7,4 @@
 obj-y += test-rockchip.o
 obj-y += test-timer.o
 obj-y += test-key.o
+obj-y += test-emmc.o
diff --git a/test/rockchip/test-emmc.c b/test/rockchip/test-emmc.c
new file mode 100644
index 0000000000..d0407aa94b
--- /dev/null
+++ b/test/rockchip/test-emmc.c
@@ -0,0 +1,119 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <asm/io.h>
+#include <cli.h>
+#include <common.h>
+#include <irq-generic.h>
+#include <irq-platform.h>
+#include <malloc.h>
+#include "test-rockchip.h"
+
+static u32 atoi(const char *str)
+{
+	u32 s=0;
+
+	while(*str == ' ')
+		str++;
+
+	while(*str >= '0' && *str <= '9') {
+		s = s * 10 + *str - '0';
+		str++;
+	}
+
+	return s;
+}
+
+int board_emmc_test(int argc, char * const argv[])
+{
+	u8 *write_buffer, *read_buffer;
+	u32 i, blocks = 0;
+	unsigned long ts;
+	int err = 0;
+	char cmd_mmc[512] = {0};
+
+	blocks = atoi(argv[2]);
+	if (!blocks) {
+		printf("Usage: rktest emmc blocks\n");
+		printf("8129 <= blocks <= 30000\n");
+		err = -EINVAL;
+		goto err_wb;
+	} else if (blocks % 2) {
+		/* Round up */
+		blocks += 1;
+	} else if (blocks < 8192) {
+		printf("Round up to 8192 blocks compulsively\n");
+		blocks = 8192;
+	} else if (blocks > 30000) {
+		printf("Round down to 30000 blocks compulsively\n");
+		blocks = 30000;
+	}
+
+	/* 1. Prepare memory */
+
+	write_buffer = (u8 *)malloc(sizeof(u8) * blocks * 512);
+	if (!write_buffer) {
+		printf("No memory for write_buffer!\n");
+		err = -ENOMEM;
+		goto err_wb;
+	}
+
+	read_buffer = (u8 *)malloc(sizeof(u8) * blocks * 512);
+	if (!read_buffer) {
+		printf("No memory for read_buffer!\n");
+		err = -ENOMEM;
+		goto err_rb;
+	}
+
+	for (i = 0; i < blocks * 512; i++) {
+		write_buffer[i] = i;
+		read_buffer[i] = 0;
+	}
+
+	/* 2. Prepare and start cli command */
+
+	snprintf(cmd_mmc, sizeof(cmd_mmc), "mmc write 0x%x 0x1000 0x%x",
+		 (u32)write_buffer, blocks);
+	ts = get_timer(0);
+	err = cli_simple_run_command(cmd_mmc, 0);
+	ts = get_timer(0) - ts;
+	if (!err)
+		goto err_mw;
+
+	printf("eMMC write: size %dMB, used %ldms, speed %ldMB/s\n",
+		blocks / 2048, ts, (blocks >> 1) / ts);
+
+	snprintf(cmd_mmc, sizeof(cmd_mmc), "mmc read 0x%x 0x1000 0x%x",
+		 (u32)read_buffer, blocks);
+	ts = get_timer(0);
+	err = cli_simple_run_command(cmd_mmc, 0);
+	ts = get_timer(0) - ts;
+	if (!err)
+		goto err_mw;
+
+	printf("eMMC read: size %dMB, used %ldms, speed %ldMB/s\n",
+		blocks / 2048, ts, (blocks >> 1) / ts);
+
+	/* 3. Verify the context */
+
+	err = 0;
+	for (i = 0; i < blocks * 512; i++) {
+		if (write_buffer[i] != read_buffer[i]) {
+			printf("eMMC context compare err!\n");
+			err = -EINVAL;
+			goto err_mw;
+		}
+	}
+
+err_mw:
+	free(read_buffer);
+	read_buffer = NULL;
+err_rb:
+	free(write_buffer);
+	write_buffer = NULL;
+err_wb:
+	return err;
+}
diff --git a/test/rockchip/test-rockchip.c b/test/rockchip/test-rockchip.c
index 7fc5e724c6..b709dfc928 100644
--- a/test/rockchip/test-rockchip.c
+++ b/test/rockchip/test-rockchip.c
@@ -16,6 +16,7 @@ typedef struct board_module {
 static board_module_t g_board_modules[] = {
 	{ .name = "timer",	.test = board_timer_test },
 	{ .name = "key",	.test = board_key_test },
+	{ .name = "emmc",	.test = board_emmc_test },
 };
 
 static int do_rockchip_test(cmd_tbl_t *cmdtp, int flag,
diff --git a/test/rockchip/test-rockchip.h b/test/rockchip/test-rockchip.h
index cf1468c383..ad86257c1c 100644
--- a/test/rockchip/test-rockchip.h
+++ b/test/rockchip/test-rockchip.h
@@ -9,5 +9,6 @@
 
 int board_timer_test(int argc, char * const argv[]);
 int board_key_test(int argc, char * const argv[]);
+int board_emmc_test(int argc, char * const argv[]);
 
 #endif /* _TEST_ROCKCHIP_H */

commit 19d1b8c5dc42ff641461e08f34f7d2f2a3f3c995
Author: francis.fan <francis.fan@rock-chips.com>
Date:   Fri Oct 20 10:20:15 2017 +0800

    rockchip: add blkdev_write api
    
    Change-Id: I8adc1d01ec3e294dedbdf467d664b7c267e333dd
    Signed-off-by: Francis Fan <francis.fan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/blk.c b/arch/arm/mach-rockchip/blk.c
index beeb63719f..a8c4488c3a 100644
--- a/arch/arm/mach-rockchip/blk.c
+++ b/arch/arm/mach-rockchip/blk.c
@@ -52,3 +52,28 @@ int blkdev_read(void *buffer, u32 blk, u32 cnt)
 
 	return mmcblk_read(mmc, buffer, blk, cnt);
 }
+
+static int mmcblk_write(struct mmc *mmcdev, void *buffer, u32 blk, u32 cnt)
+{
+	u32 n;
+
+	debug("\nMMC write: block # 0x%x, count 0x%x  from %p... ",
+	      blk, cnt, buffer);
+
+	n = blk_dwrite(mmc_get_blk_desc(mmcdev), blk, cnt, buffer);
+	debug("%d blocks write: %s\n", n, (n == cnt) ? "OK" : "ERROR");
+
+	return (n == cnt) ? 0 : -EIO;
+}
+
+int blkdev_write(void *buffer, u32 blk, u32 cnt)
+{
+	if (!mmc) {
+		mmc = mmcblk_dev_init(env_get_ulong("mmcdev", 10, 0));
+		if (!mmc)
+			return -ENODEV;
+	}
+
+	return mmcblk_write(mmc, buffer, blk, cnt);
+}
+
diff --git a/arch/arm/mach-rockchip/rockchip_blk.h b/arch/arm/mach-rockchip/rockchip_blk.h
index 3e1483e708..0539771d46 100644
--- a/arch/arm/mach-rockchip/rockchip_blk.h
+++ b/arch/arm/mach-rockchip/rockchip_blk.h
@@ -2,5 +2,6 @@
 #define __RK_BLK_H_
 
 int blkdev_read(void *buffer, u32 blk, u32 cnt);
+int blkdev_write(void *buffer, u32 blk, u32 cnt);
 
 #endif

commit 9648c394760ed91799a1ffdc99d39d6186da13e9
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Thu Oct 19 10:46:18 2017 +0800

    configs: rockchip: enable usb-phy support for evb_rk3128
    
    This change enables usb-phy support for evb_rk3128_defconfig.
    
    Change-Id: Ic23b31690fe9ad9e4d89e31a925c021922d28d94
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/configs/evb-rk3128_defconfig b/configs/evb-rk3128_defconfig
index 3004f5d7d8..6c83f68f0d 100644
--- a/configs/evb-rk3128_defconfig
+++ b/configs/evb-rk3128_defconfig
@@ -26,6 +26,8 @@ CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_ROCKCHIP_RK3128=y
 CONFIG_REGULATOR_PWM=y

commit 0b27963c7b3b8e2506af7e2124ca215e3e616793
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Tue Oct 17 14:31:40 2017 +0800

    configs: rockchip: enable usb-phy support for evb_rk3126
    
    This change enables usb-phy support for evb_rk3126_defconfig.
    
    Change-Id: I5bc417c056d5f30aeaecf8d79cd1a57df5d79614
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/configs/evb-rk3126_defconfig b/configs/evb-rk3126_defconfig
index 4568031ece..b9d5c53940 100644
--- a/configs/evb-rk3126_defconfig
+++ b/configs/evb-rk3126_defconfig
@@ -31,6 +31,8 @@ CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_ROCKCHIP_RK3128=y
 CONFIG_DM_FUEL_GAUGE=y

commit a0c2c8528d105a0e4582fac0487b2c261078cce3
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Thu Oct 19 10:44:26 2017 +0800

    ARM: dts: rockchip: enabe usb-phy support for rk3128-evb
    
    This change enables usb-phy support for rk3128-evb board.
    
    Change-Id: I71029cd2b8a916bf474f3b31ba3a1b554eccbfd2
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/arch/arm/dts/rk3128-evb.dts b/arch/arm/dts/rk3128-evb.dts
index 9170d1e87d..e8ba419ed5 100644
--- a/arch/arm/dts/rk3128-evb.dts
+++ b/arch/arm/dts/rk3128-evb.dts
@@ -50,6 +50,18 @@
 	};
 };
 
+&u2phy {
+	status = "okay";
+};
+
+&u2phy_otg {
+	status = "okay";
+};
+
+&u2phy_host {
+	status = "okay";
+};
+
 &usb_host_ehci {
 	status = "okay";
 };

commit 14fda4434d8c7b1bab8645a5829fd1fba108b072
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Tue Oct 17 14:29:54 2017 +0800

    ARM: dts: rockchip: enabe usb-phy support for rk3126-evb
    
    This change enables usb-phy support for rk3126-evb board.
    
    Change-Id: I9df0e31688ce86683821a1dae0d0832d8c8dba1d
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/arch/arm/dts/rk3126-evb.dts b/arch/arm/dts/rk3126-evb.dts
index 062d57db63..b6370a8d66 100644
--- a/arch/arm/dts/rk3126-evb.dts
+++ b/arch/arm/dts/rk3126-evb.dts
@@ -321,6 +321,18 @@
 	};
 };
 
+&u2phy {
+	status = "okay";
+};
+
+&u2phy_otg {
+	status = "okay";
+};
+
+&u2phy_host {
+	status = "okay";
+};
+
 &usb_host_ehci {
 	status = "okay";
 };

commit ed03aa52c27371436d92960335071aa3f3631d55
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Tue Oct 17 14:28:24 2017 +0800

    ARM: dts: rockchip: add usb-phy nodes for rk3128
    
    This change adds usb-phy nodes support for rk3128 SoCs.
    
    Change-Id: I33a3a648efe1bb8c022534c0c0d41f310f8e3723
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/arch/arm/dts/rk3128.dtsi b/arch/arm/dts/rk3128.dtsi
index 91ce5ebe0e..bed21b4bf8 100644
--- a/arch/arm/dts/rk3128.dtsi
+++ b/arch/arm/dts/rk3128.dtsi
@@ -416,6 +416,35 @@
 		interrupts = <GIC_PPI 9 0xf04>;
 	};
 
+	u2phy: usb2-phy {
+		compatible = "rockchip,rk3128-usb2phy";
+		reg = <0x017c 0x0c>;
+		rockchip,grf = <&grf>;
+		clocks = <&cru SCLK_OTGPHY0>;
+		clock-names = "phyclk";
+		#clock-cells = <0>;
+		clock-output-names = "usb480m_phy";
+		#phy-cells = <1>;
+		status = "disabled";
+
+		u2phy_otg: otg-port {
+			#phy-cells = <0>;
+			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "otg-bvalid", "otg-id",
+					  "linestate";
+			status = "disabled";
+		};
+
+		u2phy_host: host-port {
+			#phy-cells = <0>;
+			interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "linestate";
+			status = "disabled";
+		};
+	};
+
 	usb_otg: usb@10180000 {
 		compatible = "rockchip,rk3128-usb", "rockchip,rk3288-usb",
 			     "snps,dwc2";
@@ -424,6 +453,8 @@
 		dr_mode = "otg";
 		g-use-dma;
 		hnp-srp-disable;
+		phys = <&u2phy 0>;
+		phy-names = "usb";
 		status = "disabled";
 	};
 
@@ -431,6 +462,8 @@
 		compatible = "generic-ehci";
 		reg = <0x101c0000 0x20000>;
 		interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+		phys = <&u2phy 1>;
+		phy-names = "usb";
 		status = "disabled";
 	};
 
@@ -438,6 +471,8 @@
 		compatible = "generic-ohci";
 		reg = <0x101e0000 0x20000>;
 		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+		phys = <&u2phy 1>;
+		phy-names = "usb";
 		status = "disabled";
 	};
 

commit c86f0a42bb1b92ca1e0da0fea9b6b356c34ff5fc
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Tue Oct 17 14:33:34 2017 +0800

    phy: rockchip-inno-usb2: fixup grf_base get method
    
    Since the parent of udevice is always exist, the previous logic
    would be failed to get grf_base when usb-phy nodes was as a child
    node of root_driver. This patch fixup it.
    
    Change-Id: I8cb9ee2f4b703a030ec8e129d4d947f11006fe3c
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index 1f56976980..e071ff80a9 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -451,34 +451,22 @@ static int rockchip_usb2phy_exit(struct phy *phy)
 static int rockchip_usb2phy_probe(struct udevice *dev)
 {
 	const struct rockchip_usb2phy_cfg *phy_cfgs;
-	struct rockchip_usb2phy *rphy;
-	struct udevice *parent;
+	struct rockchip_usb2phy *rphy = dev_get_priv(dev);
+	struct udevice *parent = dev->parent;
 	u32 reg, index;
 
-	rphy = dev_get_priv(dev);
-
-	parent = dev_get_parent(dev);
-	if (!parent) {
-		dev_dbg(dev, "could not find u2phy parent\n");
-		if (ofnode_read_bool(dev_ofnode(dev), "rockchip,grf"))
-			rphy->usbgrf_base =
-				syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	} else {
-		rphy->grf_base =
-			(void __iomem *)((uintptr_t)dev_read_addr(parent));
-	}
+	if (!strncmp(parent->name, "root_driver", 11) &&
+	    dev_read_bool(dev, "rockchip,grf"))
+		rphy->grf_base = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	else
+		rphy->grf_base = (void __iomem *)dev_read_addr(parent);
 
 	if (rphy->grf_base <= 0) {
 		dev_err(dev, "get syscon grf failed\n");
 		return -EINVAL;
 	}
 
-	if (ofnode_read_u32(dev_ofnode(dev), "reg", &reg)) {
-		dev_err(dev, "could not read reg\n");
-		return -EINVAL;
-	}
-
-	if (ofnode_read_bool(dev_ofnode(dev), "rockchip,usbgrf")) {
+	if (dev_read_bool(dev, "rockchip,usbgrf")) {
 		rphy->usbgrf_base =
 			syscon_get_first_range(ROCKCHIP_SYSCON_USBGRF);
 		if (rphy->usbgrf_base <= 0) {
@@ -489,6 +477,11 @@ static int rockchip_usb2phy_probe(struct udevice *dev)
 		rphy->usbgrf_base = NULL;
 	}
 
+	if (ofnode_read_u32(dev_ofnode(dev), "reg", &reg)) {
+		dev_err(dev, "could not read reg\n");
+		return -EINVAL;
+	}
+
 	phy_cfgs =
 		(const struct rockchip_usb2phy_cfg *)dev_get_driver_data(dev);
 	if (!phy_cfgs) {

commit ee4e2fd1d0b13e6aeb8365796916e828a9ec5188
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Thu Oct 19 10:42:39 2017 +0800

    configs: rockchip: enable ehci/ohci support for evb-rk3128
    
    This change enables usb ehci/ohci support for evb-rk3128 board.
    
    Change-Id: I26b7b92779a9f3754fd3b7b92524f6ad069a185b
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/configs/evb-rk3128_defconfig b/configs/evb-rk3128_defconfig
index 52b43442f9..3004f5d7d8 100644
--- a/configs/evb-rk3128_defconfig
+++ b/configs/evb-rk3128_defconfig
@@ -37,7 +37,12 @@ CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
 CONFIG_USB_DWC2=y
+CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y

commit 2578e62ae3e11ce0b24135a78fad076493656fb2
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Mon Oct 16 18:10:55 2017 +0800

    configs: rockchip: enable ehci/ohci support for evb-rk3126
    
    This change enables usb ehci/ohci support for evb-rk3126 and configure
    max number ports of the root hub for ohci driver.
    
    Change-Id: Ic48964c00400b00f3602f009ce32b3cc9fcb8fa0
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/configs/evb-rk3126_defconfig b/configs/evb-rk3126_defconfig
index ebb961135a..4568031ece 100644
--- a/configs/evb-rk3126_defconfig
+++ b/configs/evb-rk3126_defconfig
@@ -47,7 +47,12 @@ CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
 CONFIG_USB_DWC2=y
+CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h
index fc37ac4908..1fbcd4b629 100644
--- a/include/configs/rk3128_common.h
+++ b/include/configs/rk3128_common.h
@@ -70,4 +70,8 @@
 
 #endif
 
+/* rockchip ohci host driver */
+#define CONFIG_USB_OHCI_NEW
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	1
+
 #endif

commit 0633c67a49ba77ae387ee1fd0594d7cf37168933
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Thu Oct 19 10:41:04 2017 +0800

    configs: rockchip: enable fastboot for evb-rk3128
    
    This change enables fastboot support for evb-rk3128 board.
    
    Change-Id: Ic1bf2556e78376a8fac2e1b38fd206c8ecbb1db5
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/configs/evb-rk3128_defconfig b/configs/evb-rk3128_defconfig
index e704305698..52b43442f9 100644
--- a/configs/evb-rk3128_defconfig
+++ b/configs/evb-rk3128_defconfig
@@ -5,7 +5,13 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3128-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_FASTBOOT=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_CMD_FASTBOOT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x60800800
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
 CONFIG_CMD_MMC=y

commit 6942ad29e76b01d555f09f19caaddc75fb55d75a
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Mon Oct 16 08:55:40 2017 +0800

    configs: rockchip: enable fastboot for evb-rk3126
    
    This change enables fastboot support for evb-rk3126 board.
    
    Change-Id: I1bc38ce106bbcb3164f6c0f07ef55813341c80a1
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/configs/evb-rk3126_defconfig b/configs/evb-rk3126_defconfig
index 01654d3d79..ebb961135a 100644
--- a/configs/evb-rk3126_defconfig
+++ b/configs/evb-rk3126_defconfig
@@ -8,7 +8,13 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3126-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_FASTBOOT=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_CMD_FASTBOOT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x60800800
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
 CONFIG_CMD_MMC=y

commit 642aba94af51b80ef50aadbbda2d3cebf350563c
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Thu Oct 19 10:38:05 2017 +0800

    ARM: dts: rockchip: enable usb host for rk3128-evb
    
    This patch enables usb ehci/ohci host for rk3128-evb board.
    
    Change-Id: Ibc1a43a437c5ad0bdfaf17f2e424ca6b5689fbf8
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/arch/arm/dts/rk3128-evb.dts b/arch/arm/dts/rk3128-evb.dts
index 0397d2f82b..9170d1e87d 100644
--- a/arch/arm/dts/rk3128-evb.dts
+++ b/arch/arm/dts/rk3128-evb.dts
@@ -50,7 +50,16 @@
 	};
 };
 
+&usb_host_ehci {
+	status = "okay";
+};
+
+&usb_host_ohci {
+	status = "okay";
+};
+
 &usb_otg {
+	vbus-supply = <&vcc5v0_otg>;
 	status = "okay";
 };
 

commit 163744ea5b1657b4352c290c598628df56c2a0d9
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Mon Oct 16 18:09:23 2017 +0800

    ARM: dts: rockchip: enable usb host for rk3126-evb
    
    This patch enables usb ehci/ohci host for rk3126-evb board.
    
    Change-Id: I1571a6cd4751b208a74bba01ae01e9940bf1eecc
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/arch/arm/dts/rk3126-evb.dts b/arch/arm/dts/rk3126-evb.dts
index c9ccfecde0..062d57db63 100644
--- a/arch/arm/dts/rk3126-evb.dts
+++ b/arch/arm/dts/rk3126-evb.dts
@@ -321,6 +321,14 @@
 	};
 };
 
+&usb_host_ehci {
+	status = "okay";
+};
+
+&usb_host_ohci {
+	status = "okay";
+};
+
 &usb_otg {
 	vbus-supply = <&vcc5v0_otg>;
 	status = "okay";

commit 06c9506f6f34ca140c2c41fd8ff6b2e5cb496232
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Mon Oct 16 18:07:47 2017 +0800

    ARM: dts: rockchip: add usb host nodes for rk3128
    
    This change adds usb ehci/ohci host nodes for rk3128 SoCs.
    
    Change-Id: Ia45eea69185dbe1b82b6bb234f2f7a097359d3ea
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/arch/arm/dts/rk3128.dtsi b/arch/arm/dts/rk3128.dtsi
index 348feaeef1..91ce5ebe0e 100644
--- a/arch/arm/dts/rk3128.dtsi
+++ b/arch/arm/dts/rk3128.dtsi
@@ -427,6 +427,20 @@
 		status = "disabled";
 	};
 
+	usb_host_ehci: usb@101c0000 {
+		compatible = "generic-ehci";
+		reg = <0x101c0000 0x20000>;
+		interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+		status = "disabled";
+	};
+
+	usb_host_ohci: usb@101e0000 {
+		compatible = "generic-ohci";
+		reg = <0x101e0000 0x20000>;
+		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+		status = "disabled";
+	};
+
 	sdmmc: dwmmc@10214000 {
 		compatible = "rockchip,rk312x-dw-mshc", "rockchip,rk3288-dw-mshc";
 		reg = <0x10214000 0x4000>;

commit f0f5810719deb85647b17aa63b91c8e4c587ac52
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Mon Oct 16 16:03:24 2017 +0800

    ARM: dts: rockchip: fixup usb otg nodes for rk312x
    
    This patch deletes incorrect usb host nodes and fixup usb otg nodes
    for rk312x SoCs.
    
    Change-Id: I0bb0e35c79e712e4d1ef4342b456e955260978c2
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/arch/arm/dts/rk3126-evb.dts b/arch/arm/dts/rk3126-evb.dts
index 3dc2cab6b2..c9ccfecde0 100644
--- a/arch/arm/dts/rk3126-evb.dts
+++ b/arch/arm/dts/rk3126-evb.dts
@@ -321,11 +321,8 @@
 	};
 };
 
-&usb_host {
-	status = "okay";
-};
-
 &usb_otg {
+	vbus-supply = <&vcc5v0_otg>;
 	status = "okay";
 };
 
diff --git a/arch/arm/dts/rk3128-evb.dts b/arch/arm/dts/rk3128-evb.dts
index 321e9004bd..0397d2f82b 100644
--- a/arch/arm/dts/rk3128-evb.dts
+++ b/arch/arm/dts/rk3128-evb.dts
@@ -50,10 +50,6 @@
 	};
 };
 
-&usb_host {
-	status = "okay";
-};
-
 &usb_otg {
 	status = "okay";
 };
diff --git a/arch/arm/dts/rk3128.dtsi b/arch/arm/dts/rk3128.dtsi
index 254388dc11..348feaeef1 100644
--- a/arch/arm/dts/rk3128.dtsi
+++ b/arch/arm/dts/rk3128.dtsi
@@ -417,26 +417,14 @@
 	};
 
 	usb_otg: usb@10180000 {
-		compatible = "rockchip,rk3288-usb", "rockchip,rk3066-usb", "snps,dwc2";
+		compatible = "rockchip,rk3128-usb", "rockchip,rk3288-usb",
+			     "snps,dwc2";
 		reg = <0x10180000 0x40000>;
 		interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru HCLK_OTG0>;
-		clock-names = "otg";
 		dr_mode = "otg";
-		g-np-tx-fifo-size = <16>;
-		g-rx-fifo-size = <275>;
-		g-tx-fifo-size = <256 128 128 64 64 32>;
 		g-use-dma;
-	};
-
-	usb_host: usb@101c0000 {
-		compatible = "rockchip,rk3288-usb", "rockchip,rk3066-usb",
-				"snps,dwc2";
-		reg = <0x101c0000 0x40000>;
-		interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru HCLK_OTG1>;
-		clock-names = "otg";
-		dr_mode = "host";
+		hnp-srp-disable;
+		status = "disabled";
 	};
 
 	sdmmc: dwmmc@10214000 {

commit 631e2524ffc385bce3b9be2c7eb60794d6f3c661
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 23 17:24:41 2017 +0800

    rockchip: rk3126-evb: add adc-keys node
    
    Change-Id: I050094a70f23edd3f55d2bc497ae9cafa8d0a8a3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3126-evb.dts b/arch/arm/dts/rk3126-evb.dts
index 6020a9df67..3dc2cab6b2 100644
--- a/arch/arm/dts/rk3126-evb.dts
+++ b/arch/arm/dts/rk3126-evb.dts
@@ -7,6 +7,7 @@
 /dts-v1/;
 
 #include "rk3128.dtsi"
+#include <dt-bindings/input/input.h>
 
 / {
 	model = "Rockchip RK3126 Evaluation board";
@@ -118,6 +119,26 @@
 			};
 		};
 	};
+
+	adc-keys {
+		compatible = "adc-keys";
+		io-channels = <&saradc 2>;
+		io-channel-names = "buttons";
+		poll-interval = <100>;
+		keyup-threshold-microvolt = <3300000>;
+
+		button-up {
+			label = "Volume Up";
+			linux,code = <KEY_VOLUMEUP>;
+			press-threshold-microvolt = <0>;
+		};
+
+		button-down {
+			label = "Volume Down";
+			linux,code = <KEY_VOLUMEDOWN>;
+			press-threshold-microvolt = <1650000>;
+		};
+	};
 };
 
 &i2c1 {

commit 1dc7864b9b15e2ddbe18cd7e35a874d4fbef9b97
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 17 20:22:35 2017 +0800

    test: add rockchip board module test
    
    1. add U-boot cmd "rktest", the cmd format:
            "rktest [module_name] [args...]"
    
    2. add timer and key module test, the cmd are:
            "rktest timer", "rktest key"
    
    Change-Id: I7056b7462925d3693a0e6101d83247f3f38736f8
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/test/Kconfig b/test/Kconfig
index 3643761bc6..b53d2d948c 100644
--- a/test/Kconfig
+++ b/test/Kconfig
@@ -15,6 +15,12 @@ config UT_TIME
 	  problems. But if you are having problems with udelay() and the like,
 	  this is a good place to start.
 
+config TEST_ROCKCHIP
+	bool "test Rockchip board modules"
+	depends on ARCH_ROCKCHIP
+	help
+	  This enables the test function for rockchip board modules.
+
 source "test/dm/Kconfig"
 source "test/env/Kconfig"
 source "test/overlay/Kconfig"
diff --git a/test/Makefile b/test/Makefile
index 6305afb211..d4e86ff967 100644
--- a/test/Makefile
+++ b/test/Makefile
@@ -10,3 +10,4 @@ obj-$(CONFIG_SANDBOX) += command_ut.o
 obj-$(CONFIG_SANDBOX) += compression.o
 obj-$(CONFIG_SANDBOX) += print_ut.o
 obj-$(CONFIG_UT_TIME) += time_ut.o
+obj-$(CONFIG_TEST_ROCKCHIP) += rockchip/
diff --git a/test/rockchip/Makefile b/test/rockchip/Makefile
new file mode 100644
index 0000000000..fd5544479a
--- /dev/null
+++ b/test/rockchip/Makefile
@@ -0,0 +1,9 @@
+#
+# (C) Copyright 2017 Rockchip Electronics Co., Ltd.
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y += test-rockchip.o
+obj-y += test-timer.o
+obj-y += test-key.o
diff --git a/test/rockchip/test-key.c b/test/rockchip/test-key.c
new file mode 100644
index 0000000000..8a3cf6348f
--- /dev/null
+++ b/test/rockchip/test-key.c
@@ -0,0 +1,373 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <asm/io.h>
+#include <adc.h>
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <fdtdec.h>
+#include <malloc.h>
+#include <irq-generic.h>
+#include <irq-platform.h>
+#include <key.h>
+#include "test-rockchip.h"
+
+enum {
+	INVAL_KEY = 0,
+	ADC_KEY,
+	GPIO_KEY,
+	PMIC_KEY,
+};
+
+struct adc_key {
+	u8 channel;
+	int value;
+	int microvolt;
+	int margin;
+	int vref;
+};
+
+struct gpio_key {
+	int irq;
+};
+
+struct key_info {
+	const char *name;
+	int type;
+	struct adc_key adc;
+	struct gpio_key gpio;
+};
+
+#define ADC_MARGIN		30
+#define PMIC_PWRKEY_CNT		1
+
+static int g_key_count;
+
+static void gpio_irq_handler(int irq, void *data)
+{
+	struct key_info *key = data;
+
+	printf("gpio_irq_handler: irq=%d, key name=%s\n", irq, key->name);
+}
+
+static struct key_info *parse_dt_adc_key_node(const void *blob,
+					      int adc_key_node,
+					      struct key_info *keys)
+{
+	struct key_info *key = keys;
+	u32 adc_channels[2];
+	int node, vref, err;
+
+	/* Get vref */
+	vref = fdtdec_get_int(blob, adc_key_node,
+			      "keyup-threshold-microvolt", -1);
+	if (vref < 0) {
+		printf("failed read 'keyup-threshold-microvolt', ret=%d\n", vref);
+		return NULL;
+	}
+
+	/* Get io channel */
+	err = fdtdec_get_int_array(blob, adc_key_node, "io-channels",
+				   adc_channels, 2);
+	if (err) {
+		printf("failed read 'io-channels' of %s key, ret=%d\n", key->name, err);
+		return NULL;
+	}
+
+	/* Parse every adc key data */
+	for (node = fdt_first_subnode(blob, adc_key_node);
+	     node >= 0;
+	     node = fdt_next_subnode(blob, node), key++) {
+		key->name = fdt_getprop(blob, node, "label", NULL);
+		key->type = ADC_KEY;
+		key->adc.vref = vref;
+		key->adc.margin = ADC_MARGIN;
+		key->adc.channel = adc_channels[1];
+		key->adc.microvolt = fdtdec_get_int(blob, node,
+				      "press-threshold-microvolt", -1);
+		if (key->adc.microvolt < 0) {
+			printf("failed read 'press-threshold-microvolt' of %s key, ret=%d\n",
+			       key->name, key->adc.microvolt);
+			return NULL;
+		}
+		/* Convert microvolt to adc value */
+		key->adc.value = key->adc.microvolt / (key->adc.vref / 1024);
+	}
+
+	return key;
+}
+
+static struct key_info *parse_dt_rockchip_key_node(const void *blob,
+						   int rockchip_key_node,
+						   struct key_info *keys)
+{
+	struct key_info *key = keys;
+	u32 gpios[2], adc_channels[2];
+	int node, err, adcval, irq;
+
+	/* Get io channel */
+	err = fdtdec_get_int_array(blob, rockchip_key_node, "io-channels",
+				   adc_channels, 2);
+	if (err) {
+		printf("failed read 'io-channels' of %s key, ret=%d\n", key->name, err);
+		return NULL;
+	}
+
+	/* Parse every adc/gpio key data */
+	for (node = fdt_first_subnode(blob, rockchip_key_node);
+	     node >= 0;
+	     node = fdt_next_subnode(blob, node), key++) {
+		adcval = fdtdec_get_int(blob, node,
+					"rockchip,adc_value", -1);
+		/* This is a adc key */
+		if (adcval >= 0) {
+			key->name = fdt_getprop(blob, node, "label", NULL);
+			key->type = ADC_KEY;
+			key->adc.value = adcval;
+			key->adc.margin = ADC_MARGIN;
+			key->adc.channel = adc_channels[1];
+		/* This is a gpio key */
+		} else {
+			key->name = fdt_getprop(blob, node, "label", NULL);
+			key->type = GPIO_KEY;
+			err = fdtdec_get_int_array(blob, node, "gpios", gpios, 2);
+			if (err) {
+				printf("failed read 'gpios' of %s key, ret=%d\n", key->name, err);
+				return NULL;
+			}
+			irq = phandle_gpio_to_irq(gpios[0], gpios[1]);
+			key->gpio.irq = irq;
+			irq_install_handler(irq, gpio_irq_handler, key);
+			irq_handler_enable(irq);
+			irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);
+		}
+	}
+
+	return key;
+}
+
+static struct key_info *parse_dt_gpio_key_node(const void *blob,
+					       int gpio_key_node,
+					       struct key_info *keys)
+{
+	struct key_info *key = keys;
+	u32 gpios[2];
+	int node, irq, err;
+
+	for (node = fdt_first_subnode(blob, gpio_key_node);
+	     node >= 0;
+	     node = fdt_next_subnode(blob, node), key++) {
+		key->name = fdt_getprop(blob, node, "label", NULL);
+		key->type = GPIO_KEY;
+		err = fdtdec_get_int_array(blob, node, "gpios", gpios, 2);
+		if (err) {
+			printf("failed read 'gpios' of %s key, ret=%d\n", key->name, err);
+			return NULL;
+		}
+		irq = phandle_gpio_to_irq(gpios[0], gpios[1]);
+		key->gpio.irq = irq;
+		irq_install_handler(irq, gpio_irq_handler, key);
+		irq_handler_enable(irq);
+		irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);
+	}
+
+	return key;
+}
+
+static struct key_info *keys_init(void)
+{
+	const char *key_name = "pmic-power";
+	const void *blob = gd->fdt_blob;
+	struct key_info *key, *keys;
+	struct udevice *dev;
+	int adc_key_node, rockchip_key_node, gpio_key_node, i;
+	int adc_key_compat = 0, rockchip_key_compat = 0, gpio_key_compat = 0;
+	int count = 0;
+	const char *label[4] = { "INVAL", "ADC", "GPIO", "PMIC", };
+	/*
+	 * "rockchip,key": rockchip inner version;
+	 * "adc-keys": upsteam version;
+	 */
+	adc_key_node = fdt_node_offset_by_compatible(blob, 0, "adc-keys");
+	if (adc_key_node >= 0) {
+		if (!fdtdec_get_is_enabled(blob, adc_key_node)) {
+			printf("'adc-keys' node is disabled\n");
+		} else {
+			adc_key_compat = 1;
+			count += fdtdec_get_child_count(blob, adc_key_node);
+			printf("find 'adc-keys', board total %d keys\n", count);
+		}
+	}
+
+	rockchip_key_node = fdt_node_offset_by_compatible(blob, 0, "rockchip,key");
+	if (rockchip_key_node >= 0) {
+		if (!fdtdec_get_is_enabled(blob, rockchip_key_node)) {
+			printf("'rockchip,key' node is disabled\n");
+		} else {
+			rockchip_key_compat = 1;
+			count += fdtdec_get_child_count(blob, rockchip_key_node);
+			printf("find 'rockchip,key', board total %d keys\n", count);
+		}
+	}
+
+	gpio_key_node = fdt_node_offset_by_compatible(blob, 0, "gpio-keys");
+	if (gpio_key_node >= 0) {
+		if (!fdtdec_get_is_enabled(blob, gpio_key_node)) {
+			printf("'gpio-keys' node is disabled\n");
+		} else {
+			gpio_key_compat = 1;
+			count += fdtdec_get_child_count(blob, gpio_key_node);
+			printf("find 'gpio-key', board total %d keys\n", count);
+		}
+	}
+
+	/* reserve more for pmic pwrkey or gpio pwrkey */
+	g_key_count = count + PMIC_PWRKEY_CNT;
+	keys = calloc(g_key_count, sizeof(*key));
+	if (!keys) {
+		printf("calloc for key failed\n");
+		return NULL;
+	}
+
+	key = keys;
+
+	/* Parse adc_key_compat node */
+	if (adc_key_compat) {
+		key = parse_dt_adc_key_node(blob, adc_key_node, key);
+		if (!key) {
+			printf("parse_dt_adc_key_node failed\n");
+			goto out;
+		}
+	}
+	/* Parse rockchip_key_compat node */
+	if (rockchip_key_compat) {
+		key = parse_dt_rockchip_key_node(blob, rockchip_key_node, key);
+		if (!key) {
+			printf("parse_dt_rockchip_key_node failed\n");
+			goto out;
+		}
+	}
+	/* Parse gpio_key_compat node */
+	if (gpio_key_compat) {
+		key = parse_dt_gpio_key_node(blob, gpio_key_node, key);
+		if (!key) {
+			printf("parse_dt_gpio_key_node failed\n");
+			goto out;
+		}
+	}
+
+	/* Parse PMIC pwrkey */
+	if (uclass_get_device_by_name(UCLASS_KEY, "pwrkey", &dev)) {
+		/* PMIC pwrkey not included */
+		g_key_count -= PMIC_PWRKEY_CNT;
+		printf("PMIC pwrkey not found, and will not be tested\n");
+	} else {
+		key->name = key_name;
+		key->type = PMIC_KEY;
+		printf("find 'pmic-power', board total %d keys\n", g_key_count);
+	}
+
+	printf("Support %d keys are:\n", g_key_count);
+	for (i = 0; i < g_key_count; i++) {
+		printf("\tkey-%d: name=%s, type=%s, "
+		       "[ADC]: channel=%d, vref=%d, "
+		       "microvolt=%d, value=%d, margin=%d "
+		       "[GPIO]: IRQ=%d:\n",
+		       i, keys[i].name, label[keys[i].type],
+		       keys[i].adc.channel, keys[i].adc.vref,
+		       keys[i].adc.microvolt, keys[i].adc.value,
+		       keys[i].adc.margin, keys[i].gpio.irq);
+	}
+
+	return keys;
+
+out:
+	free(keys);
+
+	return NULL;
+}
+
+static int key_test(struct key_info *keys)
+{
+	struct udevice *dev = NULL;
+	struct key_info *key;
+	unsigned int adcval;
+	int adc_h, adc_l;
+	int err, i;
+	ulong start;
+
+	if (g_key_count == 0) {
+		printf("Find total 0 keys, finish test\n");
+		goto out;
+	}
+
+	printf("\nYou have 30s to test keys, press or release them, start!\n");
+
+	start = get_timer(0);
+	while (get_timer(start) <= 30000) {
+		mdelay(100);
+		for (i = 0, key = keys; i < g_key_count; i++, key++) {
+			if (key->type == ADC_KEY) {
+				err = adc_channel_single_shot("saradc",
+						key->adc.channel, &adcval);
+				if (err) {
+					printf("\t%s: read saradc value failed\n", key->name);
+				} else {
+					adc_h = key->adc.value + key->adc.margin;
+					if (key->adc.value > key->adc.margin)
+						adc_l = key->adc.value - key->adc.margin;
+					else
+						adc_l = key->adc.value;
+
+					if ((adcval <= adc_h) && (adcval >= adc_l))
+						printf("\t%s: pressed down\n", key->name);
+				}
+			} else if (key->type == GPIO_KEY) {
+				/* it is a irq, so nothing to do */
+			} else if (key->type == PMIC_KEY) {
+				if (!dev) {
+					err = uclass_get_device_by_name(UCLASS_KEY, "pwrkey", &dev);
+					if (err) {
+						printf("get %s key failed\n", key->name);
+						goto out;
+					}
+				}
+				if (key_read(dev) == KEY_PRESS_DOWN)
+					printf("\t%s: pressed down\n", key->name);
+			} else {
+				printf("%s: Unknown key type!\n", key->name);
+			}
+		}
+	}
+
+	for (i = 0, key = keys; i < g_key_count; i++, key++) {
+		if (key->type == GPIO_KEY) {
+			printf("release irq of %s key\n", key->name);
+			irq_free_handler(key->gpio.irq);
+		}
+	}
+
+	return 0;
+
+out:
+	free(keys);
+
+	return -EINVAL;
+}
+
+int board_key_test(int argc, char * const argv[])
+{
+	struct key_info *keys;
+
+	keys = keys_init();
+	if (!keys) {
+		printf("%s: keys init failed\n", __func__);
+		return -EINVAL;
+	}
+
+	return key_test(keys);
+}
diff --git a/test/rockchip/test-rockchip.c b/test/rockchip/test-rockchip.c
new file mode 100644
index 0000000000..7fc5e724c6
--- /dev/null
+++ b/test/rockchip/test-rockchip.c
@@ -0,0 +1,70 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <command.h>
+#include "test-rockchip.h"
+
+typedef struct board_module {
+	char *name;
+	int (*test)(int argc, char * const argv[]);
+} board_module_t;
+
+static board_module_t g_board_modules[] = {
+	{ .name = "timer",	.test = board_timer_test },
+	{ .name = "key",	.test = board_key_test },
+};
+
+static int do_rockchip_test(cmd_tbl_t *cmdtp, int flag,
+			    int argc, char * const argv[])
+{
+	ulong ms_start = 0, ms = 0, sec = 0;
+	board_module_t *module = NULL;
+	char *module_name = NULL;
+	int index = 0, err = 0;
+
+	if (argc >= 2) {
+		module_name = argv[1];
+	} else {
+		printf("cmd format: test_rockchip [module_name] [args...]\n");
+		return 0;
+	}
+
+	if (!module_name)
+		return 0;
+
+	printf("***********************************************************\n");
+	printf("Rockchip Board Module [%s] Test start.\n", module_name);
+	printf("***********************************************************\n");
+
+	for (index = 0; index < ARRAY_SIZE(g_board_modules); index++) {
+		module = &g_board_modules[index];
+		if (module && !strcmp(module->name, module_name)) {
+			ms_start = get_timer(0);
+
+			err = module->test(argc, argv);
+
+			ms = get_timer(ms_start);
+			if (ms >= 1000) {
+				sec = ms / 1000;
+				ms = ms % 1000;
+			}
+		}
+	}
+
+	printf("-----------------------------------------------------------\n");
+	printf("Rockchip Board Module [%s] Test end <%s>.. Total: %lu.%lus\n",
+	       module->name, err ? "FAILED" : "PASS", sec, ms);
+	printf("-----------------------------------------------------------\n\n\n");
+
+	return 0;
+}
+
+U_BOOT_CMD(
+	rktest, 10, 0, do_rockchip_test,
+	"Rockchip Board Module Test",
+	""
+);
diff --git a/test/rockchip/test-rockchip.h b/test/rockchip/test-rockchip.h
new file mode 100644
index 0000000000..cf1468c383
--- /dev/null
+++ b/test/rockchip/test-rockchip.h
@@ -0,0 +1,13 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _TEST_ROCKCHIP_H
+#define _TEST_ROCKCHIP_H
+
+int board_timer_test(int argc, char * const argv[]);
+int board_key_test(int argc, char * const argv[]);
+
+#endif /* _TEST_ROCKCHIP_H */
diff --git a/test/rockchip/test-timer.c b/test/rockchip/test-timer.c
new file mode 100644
index 0000000000..f7b7db0cb6
--- /dev/null
+++ b/test/rockchip/test-timer.c
@@ -0,0 +1,141 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <asm/io.h>
+#include <common.h>
+#include <irq-generic.h>
+#include <irq-platform.h>
+#include "test-rockchip.h"
+
+#define TIMER_LOAD_COUNT0	0x00
+#define TIMER_LOAD_COUNT1	0x04
+#define TIMER_CTRL		0x10
+#define TIMER_INTSTATUS		0x18
+
+#define SYS_COUNTER_FREQ0	24000000
+#define SYS_COUNTER_FREQ1	0
+
+#define TIMER_EN		BIT(0)
+#define TIMER_INT_EN		BIT(2)
+#define TIMER_CLR_INT		BIT(0)
+
+#if defined(CONFIG_ROCKCHIP_RK3128)
+#define TIMER_BASE		(0x20044000 + 0x20)	/* TIMER 1 */
+#define TIMER_IRQ		IRQ_TIMER1
+#elif defined(CONFIG_ROCKCHIP_RK322X)
+#define TIMER_BASE		(0x110C0000 + 0x20)	/* TIMER 1 */
+#define TIMER_IRQ		IRQ_TIMER1
+#elif defined(CONFIG_ROCKCHIP_RK3288)
+#define TIMER_BASE		(0xFF6B0000 + 0x20)	/* TIMER 1 */
+#define TIMER_IRQ		IRQ_TIMER1
+#elif defined(CONFIG_ROCKCHIP_RK3328)
+#define TIMER_BASE		(0xFF1C0000 + 0x20)	/* TIMER 1 */
+#define TIMER_IRQ		IRQ_TIMER1
+#elif defined(CONFIG_ROCKCHIP_RK3368)
+#define TIMER_BASE		(0xFF810000 + 0x20)	/* TIMER 1 */
+#define TIMER_IRQ		IRQ_TIMER1
+#elif defined(CONFIG_ROCKCHIP_RK3399)
+#define TIMER_BASE		(0xFF850000 + 0x20)	/* TIMER 1 */
+#define TIMER_IRQ		IRQ_TIMER1
+#else
+"Missing definitions of timer module test"
+#endif
+
+/*************************** timer irq test ***********************************/
+static ulong seconds;
+
+/* must use volatile to avoid being optimized by complier */
+static int volatile exit;
+
+static void timer_irq_handler(int irq, void *data)
+{
+	static int count;
+	int period;
+
+	writel(TIMER_CLR_INT, TIMER_BASE + TIMER_INTSTATUS);
+
+	period = get_timer(seconds);
+	printf("timer_irq_handler: round-%d, irq=%d, period=%dms\n",
+	       count++, irq, period);
+	seconds = get_timer(0);
+
+	if (count >= 5) {
+		exit = 1;
+		irq_free_handler(TIMER_IRQ);
+		printf("timer_irq_handler: irq test finish.\n");
+	}
+}
+
+static int soc_timer_irq_test_init(void)
+{
+	writel(SYS_COUNTER_FREQ0, TIMER_BASE + TIMER_LOAD_COUNT0);
+	writel(SYS_COUNTER_FREQ1, TIMER_BASE + TIMER_LOAD_COUNT1);
+	writel(TIMER_CLR_INT, TIMER_BASE + TIMER_INTSTATUS);
+	writel(TIMER_EN | TIMER_INT_EN, TIMER_BASE + TIMER_CTRL);
+
+	irq_install_handler(TIMER_IRQ, timer_irq_handler, NULL);
+	irq_handler_enable(TIMER_IRQ);
+
+	seconds = get_timer(0);
+
+	while (!exit)
+		;
+
+	return 0;
+}
+
+/*************************** timer delay test *********************************/
+static inline uint64_t arch_counter_get_cntpct(void)
+{
+	uint64_t cval;
+
+	isb();
+	asm volatile("mrrc p15, 0, %Q0, %R0, c14" : "=r" (cval));
+	return cval;
+}
+
+static void sys_timer_delay_test_init(void)
+{
+	ulong delay_t = 100, cost_t;
+	u64 tick_start;
+	int i;
+
+	for (i = 0; i < 5; i++) {
+		printf("sys timer delay test, round-%d\n", i);
+
+		/* us delay */
+		tick_start = arch_counter_get_cntpct();
+		udelay(delay_t);
+		cost_t = (arch_counter_get_cntpct() - tick_start) / 24;
+		printf("\tdesire delay %luus, actually delay %luus\n",
+		       delay_t, cost_t);
+
+		/* ms delay */
+		tick_start = arch_counter_get_cntpct();
+		mdelay(delay_t);
+		cost_t = (arch_counter_get_cntpct() - tick_start) / 24000;
+
+		printf("\tdesire delay %lums, actually delay: %lums\n",
+		       delay_t, cost_t);
+
+		/* ms delay */
+		tick_start = arch_counter_get_cntpct();
+		mdelay(delay_t * 10);
+		cost_t = (arch_counter_get_cntpct() - tick_start) / 24000;
+
+		printf("\tdesire delay %lums, actually delay: %lums\n",
+		       delay_t * 10, cost_t);
+	}
+}
+
+int board_timer_test(int argc, char * const argv[])
+{
+	sys_timer_delay_test_init();
+
+	soc_timer_irq_test_init();
+
+	return 0;
+}

commit 533c9f30f7a98163be985e74d8483ec0ddfe6ceb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Oct 19 20:48:18 2017 +0800

    env: set env_update() parameter 'varvalue' as 'const char *'
    
    Change-Id: I1591fd507363545af5f56a83e0932c317ae7b915
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/cmd/nvedit.c b/cmd/nvedit.c
index 060e38dbb0..f6213bd30f 100644
--- a/cmd/nvedit.c
+++ b/cmd/nvedit.c
@@ -399,7 +399,7 @@ static int env_replace(const char *varname, const char *substr,
 
 #define ARGS_ITEM_NUM	50
 
-int env_update(const char *varname, char *varvalue)
+int env_update(const char *varname, const char *varvalue)
 {
 	/* 'a_' means "varargs_'; 'v_' means 'varvalue_' */
 	char *varargs;
diff --git a/include/common.h b/include/common.h
index 501646fed9..d5067cd1d0 100644
--- a/include/common.h
+++ b/include/common.h
@@ -391,7 +391,7 @@ int env_set(const char *varname, const char *value);
  * @valude: Value to append/replace
  * @return 0 if OK, 1 on error
  */
-int env_update(const char *varname, char *varvalue);
+int env_update(const char *varname, const char *varvalue);
 
 /**
  * env_set_ulong() - set an environment variable to an integer

commit bdf9542acdc083040e7a589eff7a15d6e2dd95d0
Author: Mark Yao <mark.yao@rock-chips.com>
Date:   Thu Oct 19 18:40:52 2017 +0800

    configs: evb-rk3126: enable display relate config
    
    Change-Id: I65e6f028eafa9422647d249ba53e9cee740b39c8
    Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

diff --git a/configs/evb-rk3126_defconfig b/configs/evb-rk3126_defconfig
index 152dfbe201..01654d3d79 100644
--- a/configs/evb-rk3126_defconfig
+++ b/configs/evb-rk3126_defconfig
@@ -1,6 +1,9 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_ROCKCHIP_RK3128=y
+CONFIG_ROCKCHIP_BLOCK_API=y
+CONFIG_ROCKCHIP_PARAM=y
+CONFIG_ROCKCHIP_RESOURCE_IMAGE=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3126-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
@@ -12,6 +15,7 @@ CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_BMP=y
 CONFIG_CMD_TIME=y
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
@@ -24,12 +28,12 @@ CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_ROCKCHIP_RK3128=y
 CONFIG_DM_FUEL_GAUGE=y
-CONFIG_POWER_FG_RK816=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_DEBUG_UART_BASE=0x20068000
 CONFIG_DEBUG_UART_CLOCK=24000000
@@ -44,5 +48,10 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Rockchip"
 CONFIG_G_DNL_VENDOR_NUM=0x2207
 CONFIG_G_DNL_PRODUCT_NUM=0x310c
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_LVDS=y
+CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_ERRNO_STR=y

commit dd495b6446bde15cf3c34a05a0491bdc595b4158
Author: Mark Yao <mark.yao@rock-chips.com>
Date:   Thu Oct 19 18:39:03 2017 +0800

    rockchip: rk3128: fix compile warning
    
    fix warning:
      warning: "CONFIG_CONSOLE_SCROLL_LINES" redefined
     #define CONFIG_CONSOLE_SCROLL_LINES  10
    include/generated/autoconf.h:154:0: note:
     this is the location of the previous definition
     #define CONFIG_CONSOLE_SCROLL_LINES 1
    
    Change-Id: Iaee1b670724451dc21a5aacbccc10fc298bf301a
    Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

diff --git a/include/configs/evb_rk3128.h b/include/configs/evb_rk3128.h
index c60ddb0dcd..1c131760f0 100644
--- a/include/configs/evb_rk3128.h
+++ b/include/configs/evb_rk3128.h
@@ -22,8 +22,6 @@
  */
 #define CONFIG_ENV_OFFSET (96 * 1024)
 
-#define CONFIG_CONSOLE_SCROLL_LINES		10
-
 #define ROCKCHIP_DEVICE_SETTINGS \
 		"stdout=serial,vidconsole\0" \
 		"stderr=serial,vidconsole\0"

commit 13137280cf47e76db1426b20d7d96897ebad8276
Author: Mark Yao <mark.yao@rock-chips.com>
Date:   Thu Oct 19 18:37:12 2017 +0800

    rockchip: rk3128: add display relate configs
    
    Change-Id: I45fcdde06e2a66ef8ef6de6bbb1cb5ab154b01b5
    Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

diff --git a/include/configs/evb_rk3128.h b/include/configs/evb_rk3128.h
index f60e22c80a..c60ddb0dcd 100644
--- a/include/configs/evb_rk3128.h
+++ b/include/configs/evb_rk3128.h
@@ -9,6 +9,10 @@
 
 #include <configs/rk3128_common.h>
 
+#define CONFIG_BMP_16BPP
+#define CONFIG_BMP_24BPP
+#define CONFIG_BMP_32BPP
+
 #define CONFIG_ENV_IS_IN_MMC
 #define CONFIG_SYS_MMC_ENV_DEV 1
 /*
@@ -20,4 +24,8 @@
 
 #define CONFIG_CONSOLE_SCROLL_LINES		10
 
+#define ROCKCHIP_DEVICE_SETTINGS \
+		"stdout=serial,vidconsole\0" \
+		"stderr=serial,vidconsole\0"
+
 #endif
diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h
index b9f01cb5aa..fc37ac4908 100644
--- a/include/configs/rk3128_common.h
+++ b/include/configs/rk3128_common.h
@@ -65,6 +65,7 @@
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	ENV_MEM_LAYOUT_SETTINGS \
 	"partitions=" PARTS_DEFAULT \
+	ROCKCHIP_DEVICE_SETTINGS \
 	BOOTENV
 
 #endif

commit 3150246f25648c29d1227a83d74ff9e1c15b5c5d
Author: Mark Yao <mark.yao@rock-chips.com>
Date:   Thu Oct 19 18:36:04 2017 +0800

    rockchip: dts: rk3126-evb: add display node
    
    Change-Id: Id67bfffa32a3946ac9bc9cbcecc1cb01ce44138d
    Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

diff --git a/arch/arm/dts/rk3126-evb.dts b/arch/arm/dts/rk3126-evb.dts
index 37d906f94b..6020a9df67 100644
--- a/arch/arm/dts/rk3126-evb.dts
+++ b/arch/arm/dts/rk3126-evb.dts
@@ -36,6 +36,88 @@
 		regulator-max-microvolt = <5000000>;
 		regulator-always-on;
 	};
+
+	backlight: backlight {
+		compatible = "pwm-backlight";
+		brightness-levels = <
+			0   1   2   3   4   5   6   7
+			8   9  10  11  12  13  14  15
+			16  17  18  19  20  21  22  23
+			24  25  26  27  28  29  30  31
+			32  33  34  35  36  37  38  39
+			40  41  42  43  44  45  46  47
+			48  49  50  51  52  53  54  55
+			56  57  58  59  60  61  62  63
+			64  65  66  67  68  69  70  71
+			72  73  74  75  76  77  78  79
+			80  81  82  83  84  85  86  87
+			88  89  90  91  92  93  94  95
+			96  97  98  99 100 101 102 103
+			104 105 106 107 108 109 110 111
+			112 113 114 115 116 117 118 119
+			120 121 122 123 124 125 126 127
+			128 129 130 131 132 133 134 135
+			136 137 138 139 140 141 142 143
+			144 145 146 147 148 149 150 151
+			152 153 154 155 156 157 158 159
+			160 161 162 163 164 165 166 167
+			168 169 170 171 172 173 174 175
+			176 177 178 179 180 181 182 183
+			184 185 186 187 188 189 190 191
+			192 193 194 195 196 197 198 199
+			200 201 202 203 204 205 206 207
+			208 209 210 211 212 213 214 215
+			216 217 218 219 220 221 222 223
+			224 225 226 227 228 229 230 231
+			232 233 234 235 236 237 238 239
+			240 241 242 243 244 245 246 247
+			248 249 250 251 252 253 254 255>;
+		default-brightness-level = <128>;
+		pwms = <&pwm0 0 1000000 1>;
+		enable-gpios = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>;
+		status = "okay";
+	};
+
+	lvds_panel: lvds-panel {
+		u-boot,dm-pre-reloc;
+		compatible ="simple-panel";
+		backlight = <&backlight>;
+		bus-format = <0x1009>;
+		/* enable-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
+		 * delay,disable = <10>;
+		 * power-supply = <&vcc_lcd>;
+		 */
+		power-supply = <&ldo6>;
+		power-invert = <1>;
+		rockchip,data-mapping = "jeida";
+		rockchip,data-width = <18>;
+		rockchip,output = "rgb";
+
+		display-timings {
+			native-mode = <&timing0>;
+			timing0: timing0 {
+				clock-frequency = <60000000>;
+				hactive = <1024>;
+				vactive = <600>;
+				hback-porch = <100>;
+				hfront-porch = <120>;
+				vback-porch = <10>;
+				vfront-porch = <15>;
+				hsync-len = <100>;
+				vsync-len = <10>;
+				hsync-active = <0>;
+				vsync-active = <0>;
+				de-active = <0>;
+				pixelclk-active = <0>;
+			};
+		};
+
+		ports {
+			panel_in_lvds: endpoint {
+				remote-endpoint = <&lvds_out_panel>;
+			};
+		};
+	};
 };
 
 &i2c1 {
@@ -231,6 +313,22 @@
 	status = "okay";
 };
 
+&lvds {
+	status = "okay";
+	ports {
+		lvds_out: endpoint@0 {
+			reg = <0>;
+			lvds_out_panel: endpoint {
+				remote-endpoint = <&panel_in_lvds>;
+			};
+		};
+	};
+};
+
+&vop {
+	status = "okay";
+};
+
 &pinctrl {
 	usb_otg {
 		otg_vbus_drv: host-vbus-drv {

commit 7f2c582aa4b75af0400e213f663684c546819169
Author: Mark Yao <mark.yao@rock-chips.com>
Date:   Thu Oct 19 18:29:18 2017 +0800

    rockchip: dts: rk3128: add display relate nodes
    
    Change-Id: Ic1b978bf02dbc1e8b6889d5526e60109ecb313b5
    Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

diff --git a/arch/arm/dts/rk3128.dtsi b/arch/arm/dts/rk3128.dtsi
index 03fc221408..254388dc11 100644
--- a/arch/arm/dts/rk3128.dtsi
+++ b/arch/arm/dts/rk3128.dtsi
@@ -367,6 +367,43 @@
 		#size-cells = <1>;
 	};
 
+	vop: vop@1010e000 {
+		u-boot,dm-pre-reloc;
+		compatible = "rockchip,rk3126-vop";
+		reg = <0x1010e000 0x100>, <0x1010ec00 0x400>;
+		reg-names = "regs", "gamma_lut";
+		interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_VIO0>, <&cru DCLK_LCDC>, <&cru HCLK_LCDC>;
+		clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
+		status = "disabled";
+
+		vop_out: port {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			vop_out_lvds: endpoint@1 {
+				reg = <1>;
+				remote-endpoint = <&lvds_in_vop>;
+			};
+		};
+	};
+
+	display_subsystem: display-subsystem {
+		u-boot,dm-pre-reloc;
+		compatible = "rockchip,display-subsystem";
+		ports = <&vop_out>;
+
+		route {
+			route_lvds: route-lvds {
+				logo,uboot = "logo.bmp";
+				logo,kernel = "logo_kernel.bmp";
+				logo,mode = "fullscreen";
+				charge_logo,mode = "center";
+				connect = <&vop_out_lvds>;
+			};
+		};
+	};
+
 	gic: interrupt-controller@10139000 {
 		compatible = "arm,gic-400";
 		interrupt-controller;
@@ -436,6 +473,27 @@
 		status = "disabled";
 	};
 
+	lvds: lvds@20038000 {
+		u-boot,dm-pre-reloc;
+		compatible = "rockchip,rk3126-lvds";
+		reg = <0x20038000 0x4000>, <0x10110000 0x100>;
+		reg-names = "mipi_lvds_phy", "mipi_lvds_ctl";
+		rockchip,grf = <&grf>;
+		status = "disabled";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			lvds_in: port@0 {
+				reg = <0>;
+				lvds_in_vop: endpoint {
+					remote-endpoint = <&vop_out_lvds>;
+				};
+			};
+		};
+	};
+
 	i2c0: i2c0@20072000 {
 		compatible = "rockchip,rk3128-i2c", "rockchip,rk3288-i2c";
 		reg = <20072000 0x1000>;

commit 4b8c2ef13c2665367459bcaa0a836815775fb021
Author: Mark Yao <mark.yao@rock-chips.com>
Date:   Thu Oct 19 18:22:10 2017 +0800

    drm/rockchip: update: some fixes and new features
    
    Change-Id: Ief38022bda85fb0e7e0d1024be7aea279428329d
    Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

diff --git a/drivers/video/drm/Kconfig b/drivers/video/drm/Kconfig
index 598d4c0265..3f262e6e8a 100644
--- a/drivers/video/drm/Kconfig
+++ b/drivers/video/drm/Kconfig
@@ -12,6 +12,9 @@ menuconfig DRM_ROCKCHIP
 config DRM_ROCKCHIP_PANEL
 	bool
 
+config DRM_ROCKCHIP_DSI_PANEL
+	bool
+
 config DRM_ROCKCHIP_MIPI_DSI
 	bool
 
@@ -19,7 +22,7 @@ config DRM_ROCKCHIP_DW_MIPI_DSI
 	tristate "Rockchip specific extensions for Synopsys DW MIPI DSI"
 	depends on DRM_ROCKCHIP
 	select DRM_ROCKCHIP_MIPI_DSI
-	select DRM_ROCKCHIP_PANEL
+	select DRM_ROCKCHIP_DSI_PANEL
 	help
 	 This selects support for Rockchip SoC specific extensions
 	 for the Synopsys DesignWare HDMI driver. If you want to
diff --git a/drivers/video/drm/Makefile b/drivers/video/drm/Makefile
index d9c0b1c7a2..8ecbad06d8 100755
--- a/drivers/video/drm/Makefile
+++ b/drivers/video/drm/Makefile
@@ -5,11 +5,13 @@
 #
 
 obj-y += rockchip_display.o rockchip_crtc.o rockchip_phy.o \
-		rockchip_vop.o rockchip_vop_reg.o bmp_helper.o
+		rockchip_vop.o rockchip_vop_reg.o bmp_helper.o \
+		rockchip_panel.o
 
 obj-$(CONFIG_DRM_ROCKCHIP_MIPI_DSI)	+= rockchip_mipi_dsi.o
-obj-$(CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI) += rockchip-dw-mipi-dsi.o rockchip-inno-mipi-dphy.o
+obj-$(CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI) += rockchip-dw-mipi-dsi.o \
+			rockchip-inno-mipi-dphy.o rockchip_dsi_panel.o
 obj-$(CONFIG_DRM_ROCKCHIP_ANALOGIX_DP) += rockchip_analogix_dp.o rockchip_analogix_dp_reg.o
 obj-$(CONFIG_DRM_ROCKCHIP_LVDS) += rockchip_lvds.o
-obj-$(CONFIG_DRM_ROCKCHIP_PANEL) += rockchip_panel.o panel_simple.o \
-					rockchip_dsi_panel.o
+obj-$(CONFIG_DRM_ROCKCHIP_PANEL) += panel_simple.o
+obj-$(CONFIG_DRM_ROCKCHIP_DSI_PANEL) += rockchip_dsi_panel.o
diff --git a/drivers/video/drm/panel_simple.c b/drivers/video/drm/panel_simple.c
index 8047ebc636..273009d732 100644
--- a/drivers/video/drm/panel_simple.c
+++ b/drivers/video/drm/panel_simple.c
@@ -17,6 +17,7 @@
 #include <dm/uclass-id.h>
 #include <asm/gpio.h>
 #include <backlight.h>
+#include <power/regulator.h>
 
 #include "rockchip_display.h"
 #include "rockchip_crtc.h"
@@ -33,6 +34,8 @@ struct panel_simple {
 	const struct drm_display_mode *mode;
 	int bus_format;
 
+	struct udevice *power_supply;
+	bool power_invert;
 	struct udevice *backlight;
 	struct gpio_desc enable;
 
@@ -46,6 +49,15 @@ static int panel_simple_prepare(struct display_state *state)
 {
 	struct panel_state *panel_state = &state->panel_state;
 	struct panel_simple *panel = panel_state->private;
+	int ret;
+
+	if (panel->power_supply) {
+		ret = regulator_set_enable(panel->power_supply,
+					   panel->power_invert);
+		if (ret)
+			printf("%s: failed to enable power_supply",
+			       __func__);
+	}
 
 	dm_gpio_set_value(&panel->enable, 1);
 	mdelay(panel->delay_prepare);
@@ -57,7 +69,15 @@ static int panel_simple_unprepare(struct display_state *state)
 {
 	struct panel_state *panel_state = &state->panel_state;
 	struct panel_simple *panel = panel_state->private;
+	int ret;
 
+	if (panel->power_supply) {
+		ret = regulator_set_enable(panel->power_supply,
+					   !panel->power_invert);
+		if (ret)
+			printf("%s: failed to disable power_supply",
+			       __func__);
+	}
 	dm_gpio_set_value(&panel->enable, 0);
 	mdelay(panel->delay_unprepare);
 
@@ -69,7 +89,9 @@ static int panel_simple_enable(struct display_state *state)
 	struct panel_state *panel_state = &state->panel_state;
 	struct panel_simple *panel = panel_state->private;
 
-	backlight_enable(panel->backlight);
+	if (panel->backlight)
+		backlight_enable(panel->backlight);
+
 	mdelay(panel->delay_enable);
 
 	return 0;
@@ -91,7 +113,7 @@ static int panel_simple_parse_dt(const void *blob, int node,
 
 	ret = gpio_request_by_name(panel->dev, "enable-gpios", 0,
 				   &panel->enable, GPIOD_IS_OUT);
-	if (ret != -ENOENT) {
+	if (ret && ret != -ENOENT) {
 		printf("%s: Warning: cannot get enable GPIO: ret=%d\n",
 		      __func__, ret);
 		return ret;
@@ -99,11 +121,21 @@ static int panel_simple_parse_dt(const void *blob, int node,
 
 	ret = uclass_get_device_by_phandle(UCLASS_PANEL_BACKLIGHT, panel->dev,
 					   "backlight", &panel->backlight);
-	if (ret) {
+	if (ret && ret != -ENOENT) {
 		printf("%s: Cannot get backlight: ret=%d\n", __func__, ret);
 		return ret;
 	}
 
+	ret = uclass_get_device_by_phandle(UCLASS_REGULATOR, panel->dev,
+					   "power-supply",
+					   &panel->power_supply);
+	if (ret && ret != -ENOENT) {
+		printf("%s: Cannot get power supply: ret=%d\n", __func__, ret);
+		return ret;
+	}
+
+	panel->power_invert = !!fdtdec_get_int(blob, node, "power_invert", 0);
+
 	panel->delay_prepare = fdtdec_get_int(blob, node, "delay,prepare", 0);
 	panel->delay_unprepare = fdtdec_get_int(blob, node, "delay,unprepare", 0);
 	panel->delay_enable = fdtdec_get_int(blob, node, "delay,enable", 0);
@@ -134,6 +166,7 @@ static int panel_simple_init(struct display_state *state)
 	if (!panel)
 		return -ENOMEM;
 
+	memset(panel, 0, sizeof(*panel));
 	panel->blob = blob;
 	panel->node = node;
 	panel->mode = mode;
diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index d305e575f0..6a4cdd55f7 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -18,6 +18,7 @@
 #include <video.h>
 #include <dm/device.h>
 #include <dm/uclass-internal.h>
+#include <asm/arch-rockchip/resource_img.h>
 
 #include "bmp_helper.h"
 #include "rockchip_display.h"
@@ -26,34 +27,32 @@
 #include "rockchip_phy.h"
 #include "rockchip_panel.h"
 
+#define RK_BLK_SIZE 512
+
 DECLARE_GLOBAL_DATA_PTR;
 static LIST_HEAD(rockchip_display_list);
 static LIST_HEAD(logo_cache_list);
 
-#define DRM_ROCKCHIP_FB_WIDTH 1920
-#define DRM_ROCKCHIP_FB_HEIGHT 1080
-
-#define MEMORY_POOL_SIZE 32 * 1024 * 1024
-static unsigned long memory_start;
-static unsigned long memory_end;
-
-#ifdef CONFIG_RK_PWM_BL
-extern int rk_pwm_bl_config(int brightness);
+#ifdef CONFIG_DRM_ROCKCHIP_VIDEO_FRAMEBUFFER
+ #define DRM_ROCKCHIP_FB_WIDTH		1920
+ #define DRM_ROCKCHIP_FB_HEIGHT		1080
+ #define DRM_ROCKCHIP_FB_BPP		VIDEO_BPP32
+#else
+ #define DRM_ROCKCHIP_FB_WIDTH		0
+ #define DRM_ROCKCHIP_FB_HEIGHT		0
+ #define DRM_ROCKCHIP_FB_BPP		VIDEO_BPP32
 #endif
 
-struct bmp_header *get_bmp_header(const char *bmp_name)
-{
-	printf("%s %d TODO\n", __func__, __LINE__);
-}
+#define MEMORY_POOL_SIZE	32 * 1024 * 1024
+#define DRM_ROCKCHIP_FB_SIZE \
+	VNBYTES(DRM_ROCKCHIP_FB_BPP) * DRM_ROCKCHIP_FB_WIDTH * DRM_ROCKCHIP_FB_HEIGHT
 
-int load_bmp_content(const char *logo, void *bmp, int size)
-{
-	printf("%s %d TODO\n", __func__, __LINE__);
-}
+static unsigned long memory_start;
+static unsigned long memory_end;
 
-static void init_display_buffer(void)
+static void init_display_buffer(ulong base)
 {
-	memory_start = gd->fb_base;
+	memory_start = base + DRM_ROCKCHIP_FB_SIZE;
 	memory_end = memory_start;
 }
 
@@ -73,28 +72,53 @@ static void *get_display_buffer(int size)
 	return buf;
 }
 
+#if 0
 static unsigned long get_display_size(void)
 {
 	return memory_end - memory_start;
 }
+#endif
 
 static bool can_direct_logo(int bpp)
 {
 	return bpp == 24 || bpp == 32;
 }
 
-static int get_panel_node(struct display_state *state, int conn_node)
+static struct udevice *find_panel_device_by_node(const void *blob,
+						 int panel_node)
+{
+	struct udevice *dev;
+	int ret;
+
+	ret = uclass_find_device_by_of_offset(UCLASS_PANEL, panel_node, &dev);
+	if (ret) {
+		printf("Warn: %s: can't find panel driver\n",
+		       fdt_get_name(blob, panel_node, NULL));
+		return NULL;
+	}
+
+	return dev;
+}
+
+static struct udevice *get_panel_device(struct display_state *state, int conn_node)
 {
+	struct panel_state *panel_state = &state->panel_state;
 	const void *blob = state->blob;
 	int panel, ports, port, ep, remote, ph, nodedepth;
+	struct udevice *dev;
 
 	panel = fdt_subnode_offset(blob, conn_node, "panel");
-	if (panel > 0)
-		return panel;
+	if (panel > 0 && fdt_device_is_available(blob, panel)) {
+		dev = find_panel_device_by_node(blob, panel);
+		if (dev) {
+			panel_state->node = panel;
+			return dev;
+		}
+	}
 
 	ports = fdt_subnode_offset(blob, conn_node, "ports");
 	if (ports < 0)
-		return -ENODEV;
+		return NULL;
 
 	fdt_for_each_subnode(port, blob, ports) {
 		fdt_for_each_subnode(ep, blob, port) {
@@ -112,11 +136,20 @@ static int get_panel_node(struct display_state *state, int conn_node)
 			panel = fdt_supernode_atdepth_offset(blob, remote,
 							     nodedepth - 2,
 							     NULL);
-			break;
+			if (!fdt_device_is_available(blob, panel)) {
+				debug("[%s]: panel is disabled\n",
+				      fdt_get_name(blob, panel, NULL));
+				continue;
+			}
+			dev = find_panel_device_by_node(blob, panel);
+			if (dev) {
+				panel_state->node = panel;
+				return dev;
+			}
 		}
 	}
 
-	return panel;
+	return NULL;
 }
 
 static int connector_phy_init(struct display_state *state)
@@ -126,6 +159,8 @@ static int connector_phy_init(struct display_state *state)
 	const void *blob = state->blob;
 	const struct rockchip_phy *phy;
 	int phy_node, phandle;
+	struct udevice *dev;
+	int ret;
 
 	phandle = fdt_getprop_u32_default_node(blob, conn_node, 0,
 					       "phys", -1);
@@ -138,12 +173,19 @@ static int connector_phy_init(struct display_state *state)
 		return phy_node;
 	}
 
-	phy = rockchip_get_phy(blob, phy_node);
+	ret = uclass_find_device_by_of_offset(UCLASS_PHY, phy_node, &dev);
+	if (ret) {
+		printf("Warn: %s: can't find phy driver\n",
+		       fdt_get_name(blob, phy_node, NULL));
+		return ret;
+	}
+	phy = (const struct rockchip_phy *)dev_get_driver_data(dev);
 	if (!phy) {
 		printf("failed to find phy driver\n");
 		return 0;
 	}
 
+	conn_state->phy_dev = dev;
 	conn_state->phy_node = phy_node;
 
 	if (!phy->funcs || !phy->funcs->init ||
@@ -164,30 +206,16 @@ static int connector_panel_init(struct display_state *state)
 	const void *blob = state->blob;
 	int conn_node = conn_state->node;
 	const struct rockchip_panel *panel;
-	int panel_node, dsp_lut_node;
+	int dsp_lut_node;
 	int ret, len;
 
-	panel_node = get_panel_node(state, conn_node);
-	if (panel_node < 0) {
-		printf("failed to find panel node\n");
-		return -ENODEV;
-	}
-
-	if (!fdt_device_is_available(blob, panel_node)) {
-		printf("panel is disabled\n");
-		return -ENODEV;
-	}
-
 	dm_scan_fdt_dev(conn_state->dev);
 
-	panel_state->node = panel_node;
-
-	ret = uclass_find_device_by_of_offset(UCLASS_PANEL, panel_node, &dev);
-	if (ret) {
-		printf("Warn: %s: can't find panel driver\n",
-		       fdt_get_name(blob, panel_node, NULL));
-		return -ENODEV;
+	dev = get_panel_device(state, conn_node);
+	if (!dev) {
+		return 0;
 	}
+
 	panel = (const struct rockchip_panel *)dev_get_driver_data(dev);
 	if (!panel) {
 		printf("failed to find panel driver\n");
@@ -203,7 +231,7 @@ static int connector_panel_init(struct display_state *state)
 		return ret;
 	}
 
-	dsp_lut_node = fdt_subnode_offset(blob, panel_node, "dsp-lut");
+	dsp_lut_node = fdt_subnode_offset(blob, panel_state->node, "dsp-lut");
 	fdt_getprop(blob, dsp_lut_node, "gamma-lut", &len);
 	if (len > 0) {
 		conn_state->gamma.size  = len / sizeof(u32);
@@ -320,16 +348,10 @@ static int display_get_timing(struct display_state *state)
 	struct drm_display_mode *mode = &conn_state->mode;
 	const struct drm_display_mode *m;
 	const void *blob = state->blob;
-	int conn_node = conn_state->node;
-	int panel;
-
-	panel = get_panel_node(state, conn_node);
-	if (panel < 0) {
-		printf("failed to find panel node\n");
-		return -ENODEV;
-	}
+	struct panel_state *panel_state = &state->panel_state;
+	int panel = panel_state->node;
 
-	if (!display_get_timing_from_dts(panel, blob, mode)) {
+	if (panel > 0 && !display_get_timing_from_dts(panel, blob, mode)) {
 		printf("Using display timing dts\n");
 		goto done;
 	}
@@ -393,7 +415,7 @@ static int display_init(struct display_state *state)
 	if (conn_funcs->init) {
 		ret = conn_funcs->init(state);
 		if (ret)
-			goto deinit_panel;
+			goto deinit;
 	}
 	/*
 	 * support hotplug, but not connect;
@@ -427,8 +449,6 @@ static int display_init(struct display_state *state)
 deinit:
 	if (conn_funcs->deinit)
 		conn_funcs->deinit(state);
-deinit_panel:
-	rockchip_panel_deinit(state);
 	return ret;
 }
 
@@ -580,7 +600,7 @@ static int display_logo(struct display_state *state)
 	crtc_state->src_y = 0;
 	crtc_state->ymirror = logo->ymirror;
 
-	crtc_state->dma_addr = logo->mem + logo->offset;
+	crtc_state->dma_addr = (u32)(unsigned long)logo->mem + logo->offset;
 	crtc_state->xvir = ALIGN(crtc_state->src_w * logo->bpp, 32) >> 5;
 
 	if (logo->mode == ROCKCHIP_DISPLAY_FULLSCREEN) {
@@ -686,10 +706,12 @@ struct rockchip_logo_cache *find_or_alloc_logo_cache(const char *bmp)
 
 static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 {
+#ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
 	struct rockchip_logo_cache *logo_cache;
 	struct bmp_header *header;
 	void *dst = NULL, *pdst;
-	int size;
+	int size, len;
+	int ret = 0;
 
 	if (!logo || !bmp_name)
 		return -EINVAL;
@@ -702,9 +724,15 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 		return 0;
 	}
 
-	header = get_bmp_header(bmp_name);
+	header = malloc(RK_BLK_SIZE);
 	if (!header)
-		return -EINVAL;
+		return -ENOMEM;
+
+	len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE);
+	if (len != RK_BLK_SIZE) {
+		ret = -EINVAL;
+		goto free_header;
+	}
 
 	logo->bpp = get_unaligned_le16(&header->bit_count);
 	logo->width = get_unaligned_le32(&header->width);
@@ -713,18 +741,21 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 	if (!can_direct_logo(logo->bpp)) {
 		if (size > MEMORY_POOL_SIZE) {
 			printf("failed to use boot buf as temp bmp buffer\n");
-			return -ENOMEM;
+			ret = -ENOMEM;
+			goto free_header;
 		}
-		pdst = (void *)gd->video_top;
+		pdst = get_display_buffer(size);
 
 	} else {
 		pdst = get_display_buffer(size);
 		dst = pdst;
 	}
 
-	if (load_bmp_content(bmp_name, pdst, size)) {
+	len = rockchip_read_resource_file(pdst, bmp_name, 0, size);
+	if (len != size) {
 		printf("failed to load bmp %s\n", bmp_name);
-		return 0;
+		ret = -ENOENT;
+		goto free_header;
 	}
 
 	if (!can_direct_logo(logo->bpp)) {
@@ -736,23 +767,37 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 		dst_size = logo->width * logo->height * logo->bpp >> 3;
 
 		dst = get_display_buffer(dst_size);
-		if (!dst)
-			return -ENOMEM;
+		if (!dst) {
+			ret = -ENOMEM;
+			goto free_header;
+		}
 		if (bmpdecoder(pdst, dst, logo->bpp)) {
 			printf("failed to decode bmp %s\n", bmp_name);
-			return 0;
+			ret = -EINVAL;
+			goto free_header;
 		}
+		flush_dcache_range((ulong)dst,
+				   ALIGN((ulong)dst + dst_size,
+					 CONFIG_SYS_CACHELINE_SIZE));
+
 		logo->offset = 0;
 		logo->ymirror = 0;
 	} else {
 		logo->offset = get_unaligned_le32(&header->data_offset);
 		logo->ymirror = 1;
 	}
-	logo->mem = (u32)(unsigned long)dst;
+	logo->mem = dst;
 
 	memcpy(&logo_cache->logo, logo, sizeof(*logo));
 
-	return 0;
+free_header:
+
+	free(header);
+
+	return ret;
+#else
+	return -EINVAL;
+#endif
 }
 
 void rockchip_show_fbbase(ulong fbbase)
@@ -761,7 +806,7 @@ void rockchip_show_fbbase(ulong fbbase)
 
 	list_for_each_entry(s, &rockchip_display_list, head) {
 		s->logo.mode = ROCKCHIP_DISPLAY_FULLSCREEN;
-		s->logo.mem = fbbase;
+		s->logo.mem = (char *)fbbase;
 		s->logo.width = DRM_ROCKCHIP_FB_WIDTH;
 		s->logo.height = DRM_ROCKCHIP_FB_HEIGHT;
 		s->logo.bpp = 32;
@@ -804,7 +849,6 @@ void rockchip_show_logo(void)
 	}
 }
 
-extern const struct rockchip_connector rk3399_mipi_dsi_data;
 static int rockchip_display_probe(struct udevice *dev)
 {
 	struct video_priv *uc_priv = dev_get_uclass_priv(dev);
@@ -831,7 +875,7 @@ static int rockchip_display_probe(struct udevice *dev)
 	if (!fdt_device_is_available(blob, route))
 		return -ENODEV;
 
-	init_display_buffer();
+	init_display_buffer(plat->base);
 
 	fdt_for_each_subnode(child, blob, route) {
 		if (!fdt_device_is_available(blob, child))
@@ -883,11 +927,12 @@ static int rockchip_display_probe(struct udevice *dev)
 
 		s = malloc(sizeof(*s));
 		if (!s)
-			goto err_free;
+			continue;
 
 		memset(s, 0, sizeof(*s));
 
 		INIT_LIST_HEAD(&s->head);
+		s->ulogo_name = fdt_stringlist_get(blob, child, "logo,uboot", 0, NULL);
 		s->klogo_name = fdt_stringlist_get(blob, child, "logo,kernel", 0, NULL);
 		name = fdt_stringlist_get(blob, child, "logo,mode", 0, NULL);
 		if (!strcmp(name, "fullscreen"))
@@ -910,27 +955,41 @@ static int rockchip_display_probe(struct udevice *dev)
 		s->crtc_state.crtc_id = get_crtc_id(blob, connect);
 		s->node = child;
 
-		connector_phy_init(s);
-		connector_panel_init(s);
+		if (connector_phy_init(s)) {
+			printf("Warn: %s: Failed to init phy drivers\n",
+			       fdt_get_name(blob, child, NULL));
+			free(s);
+			continue;
+		}
+
+		if (connector_panel_init(s)) {
+			printf("Warn: %s: Failed to init panel drivers\n",
+			       fdt_get_name(blob, child, NULL));
+			free(s);
+			continue;
+		}
 		list_add_tail(&s->head, &rockchip_display_list);
 	}
 
+	if (list_empty(&rockchip_display_list)) {
+		printf("Failed to found available display route\n");
+		return -ENODEV;
+	}
+
 	uc_priv->xsize = DRM_ROCKCHIP_FB_WIDTH;
 	uc_priv->ysize = DRM_ROCKCHIP_FB_HEIGHT;
 	uc_priv->bpix = VIDEO_BPP32;
 
+	#ifdef CONFIG_DRM_ROCKCHIP_VIDEO_FRAMEBUFFER
 	rockchip_show_fbbase(plat->base);
 	video_set_flush_dcache(dev, true);
+	#else
+	rockchip_show_logo();
+	#endif
 
 	return 0;
-
-err_free:
-	list_for_each_entry(s, &rockchip_display_list, head) {
-		list_del(&s->head);
-		free(s);
-	}
-	return -ENODEV;
 }
+
 #if 0
 void rockchip_display_fixup(void *blob)
 {
@@ -1010,7 +1069,7 @@ int rockchip_display_bind(struct udevice *dev)
 {
 	struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
 
-	plat->size = 4 * DRM_ROCKCHIP_FB_WIDTH * DRM_ROCKCHIP_FB_HEIGHT;
+	plat->size = DRM_ROCKCHIP_FB_SIZE + MEMORY_POOL_SIZE;
 
 	return 0;
 }
@@ -1027,3 +1086,37 @@ U_BOOT_DRIVER(rockchip_display) = {
 	.bind	= rockchip_display_bind,
 	.probe	= rockchip_display_probe,
 };
+
+static int do_rockchip_logo_show(cmd_tbl_t *cmdtp, int flag, int argc,
+			char *const argv[])
+{
+	if (argc != 1)
+		return CMD_RET_USAGE;
+
+	rockchip_show_logo();
+
+	return 0;
+}
+
+static int do_rockchip_show_bmp(cmd_tbl_t *cmdtp, int flag, int argc,
+				char *const argv[])
+{
+	if (argc != 2)
+		return CMD_RET_USAGE;
+
+	rockchip_show_bmp(argv[1]);
+
+	return 0;
+}
+
+U_BOOT_CMD(
+	rockchip_show_logo, 1, 1, do_rockchip_logo_show,
+	"load and display log from resource partition",
+	NULL
+);
+
+U_BOOT_CMD(
+	rockchip_show_bmp, 2, 1, do_rockchip_show_bmp,
+	"load and display bmp from resource partition",
+	"    <bmp_name>"
+);
diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index c80a76f4d5..d1826da186 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -71,6 +71,7 @@ struct panel_state {
 struct connector_state {
 	struct udevice *dev;
 	const struct rockchip_connector *connector;
+	struct udevice *phy_dev;
 	const struct rockchip_phy *phy;
 	int node;
 	int phy_node;
@@ -109,20 +110,23 @@ struct rockchip_logo_cache {
 
 struct display_state {
 	struct list_head head;
+
 	const void *blob;
 	int node;
+
+	struct crtc_state crtc_state;
+	struct connector_state conn_state;
+	struct panel_state panel_state;
+
 	const char *ulogo_name;
 	const char *klogo_name;
+
+	struct logo_info logo;
 	int logo_mode;
 	int charge_logo_mode;
-	struct bmp_image *ubmp;
-	struct bmp_image *kbmp;
 	void *mem_base;
 	int mem_size;
-	struct logo_info logo;
-	struct crtc_state crtc_state;
-	struct connector_state conn_state;
-	struct panel_state panel_state;
+
 	int enable;
 	int is_init;
 	int is_enable;
diff --git a/drivers/video/drm/rockchip_dsi_panel.c b/drivers/video/drm/rockchip_dsi_panel.c
index 96ef2e9eb7..e96e58e4a9 100644
--- a/drivers/video/drm/rockchip_dsi_panel.c
+++ b/drivers/video/drm/rockchip_dsi_panel.c
@@ -297,15 +297,15 @@ static int rockchip_dsi_panel_parse_dt(const void *blob, int node, struct rockch
 
 	ret = gpio_request_by_name(panel->dev, "enable-gpios", 0,
 				   &panel->enable, GPIOD_IS_OUT);
-	if (ret != -ENOENT) {
+	if (ret && ret != -ENOENT) {
 		printf("%s: Warning: cannot get enable GPIO: ret=%d\n",
 		      __func__, ret);
 		return ret;
 	}
 
 	ret = gpio_request_by_name(panel->dev, "reset-gpios", 0,
-				   &panel->enable, GPIOD_IS_OUT);
-	if (ret != -ENOENT) {
+				   &panel->reset, GPIOD_IS_OUT);
+	if (ret && ret != -ENOENT) {
 		printf("%s: Warning: cannot get reset GPIO: ret=%d\n",
 		      __func__, ret);
 		return ret;
diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index 629fbe6adf..01282829c3 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -18,7 +18,6 @@
 #include <asm/arch-rockchip/clock.h>
 #include <asm/gpio.h>
 
-
 #include "rockchip_display.h"
 #include "rockchip_crtc.h"
 #include "rockchip_connector.h"
@@ -513,7 +512,7 @@ static int rockchip_lvds_init(struct display_state *state)
 	int lvds_node = conn_state->node;
 	struct rockchip_lvds_device *lvds;
 	const char *name;
-	int i,width;
+	int i, width;
 	struct fdt_resource lvds_phy, lvds_ctrl;
 	struct panel_state *panel_state = &state->panel_state;
 	int panel_node = panel_state->node;
diff --git a/drivers/video/drm/rockchip_panel.c b/drivers/video/drm/rockchip_panel.c
index aabce7aba0..b69e263af4 100644
--- a/drivers/video/drm/rockchip_panel.c
+++ b/drivers/video/drm/rockchip_panel.c
@@ -4,21 +4,20 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
+#include <asm/unaligned.h>
 #include <config.h>
 #include <common.h>
 #include <errno.h>
-#include <malloc.h>
+#include <dm/device.h>
 #include <fdtdec.h>
 #include <fdt_support.h>
-#include <asm/unaligned.h>
-#include <linux/list.h>
-#include <dm/device.h>
 
 #include "rockchip_display.h"
 #include "rockchip_crtc.h"
 #include "rockchip_connector.h"
 #include "rockchip_panel.h"
 
+#ifdef CONFIG_DRM_ROCKCHIP_PANEL
 static const struct drm_display_mode auo_b125han03_mode = {
 	.clock = 146900,
 	.hdisplay = 1920,
@@ -46,16 +45,11 @@ static const struct drm_display_mode lg_lp079qx1_sp0v_mode = {
 	.vrefresh = 60,
 	.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
 };
-#if 0
+
 static const struct rockchip_panel simple_panel_data = {
 	.funcs = &panel_simple_funcs,
 };
-#endif
 
-static const struct rockchip_panel simple_panel_dsi_data = {
-	.funcs = &rockchip_dsi_panel_funcs,
-};
-#if 0
 static const struct rockchip_panel lg_lp079qx1_sp0v_data = {
 	.funcs = &panel_simple_funcs,
 	.data = &lg_lp079qx1_sp0v_mode,
@@ -67,42 +61,44 @@ static const struct rockchip_panel auo_b125han03_data = {
 };
 #endif
 
+#ifdef CONFIG_DRM_ROCKCHIP_DSI_PANEL
+static const struct rockchip_panel simple_panel_dsi_data = {
+	.funcs = &rockchip_dsi_panel_funcs,
+};
+#endif
+
 static const struct udevice_id rockchip_panel_ids[] = {
-#if 0
-	}, {
+#ifdef CONFIG_DRM_ROCKCHIP_PANEL
+	{
 		.compatible = "simple-panel",
-		.funcs = &simple_panel_data,
+		.data = (ulong)&simple_panel_data,
+	}, {
+		.compatible = "lg,lp079qx1-sp0v",
+		.data = (ulong)&lg_lp079qx1_sp0v_data,
+	}, {
+		.compatible = "auo,b125han03",
+		.data = (ulong)&auo_b125han03_data,
 	},
 #endif
- {
+#ifdef CONFIG_DRM_ROCKCHIP_DSI_PANEL
+	{
 		.compatible = "simple-panel-dsi",
 		.data = (ulong)&simple_panel_dsi_data,
 	},
-#if 0
-{
-		.compatible = "lg,lp079qx1-sp0v",
-		.funcs = &lg_lp079qx1_sp0v_data,
-	}, {
-		.compatible = "auo,b125han03",
-		.funcs = &auo_b125han03_data,
-	},
 #endif
- {}
+	{}
 };
 
 static int rockchip_panel_probe(struct udevice *dev)
 {
-	printf("--->yzq %s %d\n", __func__, __LINE__);
 	return 0;
 }
 
 static int rockchip_panel_bind(struct udevice *dev)
 {
-	printf("--->yzq %s %d\n", __func__, __LINE__);
 	return 0;
 }
 
-
 U_BOOT_DRIVER(rockchip_panel) = {
 	.name = "rockchip_panel",
 	.id = UCLASS_PANEL,
@@ -123,25 +119,6 @@ rockchip_get_display_mode_from_panel(struct display_state *state)
 	return (const struct drm_display_mode *)panel->data;
 }
 
-#if 0
-const struct rockchip_panel *rockchip_get_panel(const void *blob, int node)
-{
-	const char *name;
-	int i;
-
-	name = fdt_stringlist_get(blob, node, "compatible", 0, NULL);
-
-	for (i = 0; i < ARRAY_SIZE(g_panel); i++)
-		if (!strcmp(name, g_panel[i].compatible))
-			break;
-
-	if (i >= ARRAY_SIZE(g_panel))
-		return NULL;
-
-	return &g_panel[i];
-}
-#endif
-
 int rockchip_panel_init(struct display_state *state)
 {
 	struct panel_state *panel_state = &state->panel_state;
@@ -173,15 +150,10 @@ int rockchip_panel_prepare(struct display_state *state)
 	struct panel_state *panel_state = &state->panel_state;
 	const struct rockchip_panel *panel = panel_state->panel;
 
-printf("--->yzq %s %d\n", __func__, __LINE__);
 	if (!panel || !panel->funcs || !panel->funcs->prepare) {
-printf("--->yzq %s %d panel=%p\n", __func__, __LINE__, panel);
-printf("--->yzq %s %d panel->funcs=%p\n", __func__, __LINE__, panel->funcs);
-printf("--->yzq %s %d panel->funcs->prepare=%p\n", __func__, __LINE__, panel->funcs->prepare);
 		printf("%s: failed to find panel prepare funcs\n", __func__);
 		return -ENODEV;
 	}
-printf("--->yzq %s %d\n", __func__, __LINE__);
 
 	return panel->funcs->prepare(state);
 }
diff --git a/drivers/video/drm/rockchip_panel.h b/drivers/video/drm/rockchip_panel.h
index 699128d7cc..1f4163ddff 100644
--- a/drivers/video/drm/rockchip_panel.h
+++ b/drivers/video/drm/rockchip_panel.h
@@ -21,8 +21,6 @@ struct rockchip_panel {
 	const void *data;
 };
 
-
-#ifdef CONFIG_DRM_ROCKCHIP_PANEL
 const struct rockchip_panel *rockchip_get_panel(const void *blob, int node);
 const struct drm_display_mode *
 rockchip_get_display_mode_from_panel(struct display_state *state);
@@ -32,49 +30,11 @@ int rockchip_panel_enable(struct display_state *state);
 int rockchip_panel_disable(struct display_state *state);
 int rockchip_panel_prepare(struct display_state *state);
 int rockchip_panel_unprepare(struct display_state *state);
-#else
-static inline struct rockchip_panel *rockchip_get_panel(const void *blob, int node)
-{
-	return NULL;
-}
-
-static inline const struct drm_display_mode *
-rockchip_get_display_mode_from_panel(struct display_state *state)
-{
-	return NULL;
-}
-
-static inline int rockchip_panel_init(struct display_state *state)
-{
-	return -ENODEV;
-}
-
-static inline void rockchip_panel_deinit(struct display_state *state)
-{
-	return;
-}
-
-static inline int rockchip_panel_enable(struct display_state *state)
-{
-	return -ENODEV;
-}
-
-static inline int rockchip_panel_disable(struct display_state *state)
-{
-	return -ENODEV;
-}
-
-static inline int rockchip_panel_prepare(struct display_state *state)
-{
-	return -ENODEV;
-}
-
-static inline int rockchip_panel_unprepare(struct display_state *state)
-{
-	return -ENODEV;
-}
-#endif
 
+#ifdef CONFIG_DRM_ROCKCHIP_PANEL
 extern const struct rockchip_panel_funcs panel_simple_funcs;
+#endif
+#ifdef CONFIG_DRM_ROCKCHIP_DSI_PANEL
 extern const struct rockchip_panel_funcs rockchip_dsi_panel_funcs;
+#endif
 #endif	/* _ROCKCHIP_PANEL_H_ */
diff --git a/drivers/video/drm/rockchip_phy.c b/drivers/video/drm/rockchip_phy.c
index dfa8e17bd3..6572735ab0 100644
--- a/drivers/video/drm/rockchip_phy.c
+++ b/drivers/video/drm/rockchip_phy.c
@@ -6,8 +6,8 @@
 
 #include <config.h>
 #include <common.h>
+#include <dm/device.h>
 #include <errno.h>
-#include <malloc.h>
 #include <fdtdec.h>
 #include <fdt_support.h>
 #include <asm/unaligned.h>
@@ -18,36 +18,48 @@
 #include "rockchip_connector.h"
 #include "rockchip_phy.h"
 
-static const struct rockchip_phy g_phy[] = {
-#ifdef CONFIG_ROCKCHIP_DW_MIPI_DSI
+#ifdef CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI
+static const struct rockchip_phy rockchip_rk3366_mipi_dphy_data = {
+	 .funcs = &inno_mipi_dphy_funcs,
+};
+
+static const struct rockchip_phy rockchip_rk3368_mipi_dphy_data = {
+	 .funcs = &inno_mipi_dphy_funcs,
+};
+#endif
+
+static const struct udevice_id rockchip_phy_ids[] = {
+#ifdef CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI
 	{
 	 .compatible = "rockchip,rk3366-mipi-dphy",
-	 .funcs = &inno_mipi_dphy_funcs,
+	 .data = (ulong)&rockchip_rk3366_mipi_dphy_data,
 	},
 	{
 	 .compatible = "rockchip,rk3368-mipi-dphy",
-	 .funcs = &inno_mipi_dphy_funcs,
+	 .data = (ulong)&rockchip_rk3368_mipi_dphy_data,
 	},
 #endif
+	{}
 };
 
-const struct rockchip_phy *rockchip_get_phy(const void *blob, int phy_node)
+static int rockchip_phy_probe(struct udevice *dev)
 {
-	const char *name;
-	int i;
-
-	name = fdt_stringlist_get(blob, phy_node, "compatible", 0, NULL);
-
-	for (i = 0; i < ARRAY_SIZE(g_phy); i++) {
-		if (!strcmp(name, g_phy[i].compatible))
-			break;
-	}
-	if (i >= ARRAY_SIZE(g_phy))
-		return NULL;
+	return 0;
+}
 
-	return &g_phy[i];
+static int rockchip_phy_bind(struct udevice *dev)
+{
+	return 0;
 }
 
+U_BOOT_DRIVER(rockchip_phy) = {
+	.name = "rockchip_phy",
+	.id = UCLASS_PHY,
+	.of_match = rockchip_phy_ids,
+	.bind	= rockchip_phy_bind,
+	.probe	= rockchip_phy_probe,
+};
+
 int rockchip_phy_power_on(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
diff --git a/drivers/video/drm/rockchip_phy.h b/drivers/video/drm/rockchip_phy.h
index 62fff2b1ce..70e9c820b7 100644
--- a/drivers/video/drm/rockchip_phy.h
+++ b/drivers/video/drm/rockchip_phy.h
@@ -16,7 +16,6 @@ struct rockchip_phy_funcs {
 };
 
 struct rockchip_phy {
-	char compatible[30];
 	const struct rockchip_phy_funcs *funcs;
 	const void *data;
 };
@@ -28,7 +27,7 @@ int rockchip_phy_power_on(struct display_state *state);
 unsigned long rockchip_phy_set_pll(struct display_state *state,
 				   unsigned long rate);
 
-#ifdef CONFIG_ROCKCHIP_DW_MIPI_DSI
+#ifdef CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI
 extern const struct rockchip_phy_funcs inno_mipi_dphy_funcs;
 #endif
 #endif
diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index fda346e8e8..7518e8c14d 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -27,7 +27,7 @@ static inline int us_to_vertical_line(struct drm_display_mode *mode, int us)
 {
 	return us * mode->clock / mode->htotal / 1000;
 }
-#if 0
+
 static int rockchip_vop_init_gamma(struct vop *vop, struct display_state *state)
 {
 	struct crtc_state *crtc_state = &state->crtc_state;
@@ -41,14 +41,14 @@ static int rockchip_vop_init_gamma(struct vop *vop, struct display_state *state)
 	if (!conn_state->gamma.lut)
 		return 0;
 
-	i = fdt_find_string(state->blob, node, "reg-names", "gamma_lut");
+	i = fdt_stringlist_search(state->blob, node, "reg-names", "gamma_lut");
 	if (i < 0) {
 		printf("Warning: vop not support gamma\n");
 		return 0;
 	}
 	lut_regs = (u32 *)fdtdec_get_addr_size_auto_noparent(state->blob,
-							     node, "reg",
-							     i, &lut_size);
+							     node, "reg", i,
+							     &lut_size, false);
 	if (lut_regs == (u32 *)FDT_ADDR_T_NONE) {
 		printf("failed to get gamma lut register\n");
 		return 0;
@@ -82,7 +82,6 @@ static int rockchip_vop_init_gamma(struct vop *vop, struct display_state *state)
 
 	return 0;
 }
-#endif
 
 static int rockchip_vop_init(struct display_state *state)
 {
@@ -102,10 +101,9 @@ static int rockchip_vop_init(struct display_state *state)
 	u16 vsync_len = mode->vsync_end - mode->vsync_start;
 	u16 vact_st = mode->vtotal - mode->vsync_start;
 	u16 vact_end = vact_st + vdisplay;
-	struct clk aclk, hclk, dclk;
+	struct clk dclk, aclk;
 	u32 val;
-	int i, ret;
-	int rate;
+	int ret;
 
 	vop = malloc(sizeof(*vop));
 	if (!vop)
@@ -122,56 +120,28 @@ static int rockchip_vop_init(struct display_state *state)
 	vop->line_flag = vop_data->line_flag;
 	vop->version = vop_data->version;
 
-	ret = clk_get_by_name(crtc_state->dev, "aclk_vop", &aclk);
-	if (IS_ERR_VALUE(ret)) {
-		printf("%s: Failed to get aclk: ret=%d\n", __func__, ret);
-		return ret;
-	}
-#if 0
-	ret = clk_set_rate(&aclk, 384 * 1000 * 1000);
-	if (IS_ERR_VALUE(ret)) {
-		printf("%s: Failed to set aclk: ret=%d\n", __func__, ret);
-		return ret;
-	}
-#endif
-#if 0
+	/*
+	 * TODO:
+	 * Set Dclk pll parent
+	 */
 
-	ret = clk_get_by_name(crtc_state->dev, "hclk_vop", &hclk);
+	ret = clk_get_by_name(crtc_state->dev, "dclk_vop", &dclk);
 	if (!ret)
-		ret = clk_set_rate(&hclk, 100 * 1000 * 1000);
+		ret = clk_set_rate(&dclk, mode->clock * 1000);
 	if (IS_ERR_VALUE(ret)) {
-		printf("%s: Failed to set aclk: ret=%d\n", __func__, ret);
+		printf("%s: Failed to set dclk: ret=%d\n", __func__, ret);
 		return ret;
 	}
-#endif
 
-	ret = clk_get_by_name(crtc_state->dev, "dclk_vop", &dclk);
+	ret = clk_get_by_name(crtc_state->dev, "aclk_vop", &aclk);
 	if (!ret)
-		ret = clk_set_rate(&dclk, mode->clock * 1000);
-	if (IS_ERR_VALUE(ret)) {
+		ret = clk_set_rate(&aclk, 400 * 1000 * 1000);
+	if (IS_ERR_VALUE(ret))
 		printf("%s: Failed to set aclk: ret=%d\n", __func__, ret);
-		return ret;
-	}
 
-#if 0
-#ifdef CONFIG_RKCHIP_RK3399
-	/* Set Dclk pll parent */
-	if (conn_state->type == DRM_MODE_CONNECTOR_HDMIA)
-		rkclk_lcdc_dclk_pll_sel(crtc_state->crtc_id, 0);
-	else
-		rkclk_lcdc_dclk_pll_sel(crtc_state->crtc_id, 1);
-#endif
-
-	/* Set aclk hclk and dclk */
-	rate = rkclk_lcdc_clk_set(crtc_state->crtc_id, mode->clock * 1000);
-	if (rate != mode->clock * 1000) {
-		printf("Warn: vop clk request %dhz, but real clock is %dhz",
-		       mode->clock * 1000, rate);
-	}
-#endif
 	memcpy(vop->regsbak, vop->regs, vop_data->reg_len);
 
-	//rockchip_vop_init_gamma(vop, state);
+	rockchip_vop_init_gamma(vop, state);
 
 	VOP_CTRL_SET(vop, global_regdone_en, 1);
 	VOP_CTRL_SET(vop, win_gate[0], 1);

commit 457a6c0b2455439e8d52a3329f46a2cde1547ce8
Author: Mark Yao <mark.yao@rock-chips.com>
Date:   Thu Oct 19 18:05:43 2017 +0800

    drm/rockchip: add rk3126 lvds support
    
    Change-Id: I88b097f7baedf6998adb6eb2c61724bd36a71275
    Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index 85e5e85be9..629fbe6adf 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -28,6 +28,7 @@ enum rockchip_lvds_sub_devtype {
 	RK3288_LVDS,
 	RK3366_LVDS,
 	RK3368_LVDS,
+	RK3126_LVDS,
 };
 
 struct rockchip_lvds_chip_data {
@@ -41,9 +42,9 @@ struct rockchip_lvds_chip_data {
 };
 
 struct rockchip_lvds_device {
-	u32	regbase;
+	void	*regbase;
 	void	*grf;
-	u32	ctrl_reg;
+	void	*ctrl_reg;
 	u32	channel;
 	u32	output;
 	u32	format;
@@ -111,20 +112,19 @@ static inline void lvds_ctrl_writel(struct rockchip_lvds_device *lvds,
 
 static inline u32 lvds_pmugrf_readl(u32 offset)
 {
-	return readl(LVDS_PMUGRF_BASE + offset);
+	return readl((void *)LVDS_PMUGRF_BASE + offset);
 }
 
 static inline void lvds_pmugrf_writel(u32 offset, u32 val)
 {
-	writel(val, LVDS_PMUGRF_BASE + offset);
+	writel(val, (void *)LVDS_PMUGRF_BASE + offset);
 }
 
 static inline u32 lvds_phy_lock(struct rockchip_lvds_device *lvds)
 {
 	u32 val = 0;
-	val = readl(lvds->ctrl_reg + 0x10);
-	val &= 0x1;
-	return val;
+	val = readl(lvds->ctrl_reg + MIPIC_PHY_STATUS);
+	return (val & m_PHY_LOCK_STATUS) ? 1 : 0;
 }
 
 static int rockchip_lvds_clk_enable(struct rockchip_lvds_device *lvds)
@@ -132,6 +132,13 @@ static int rockchip_lvds_clk_enable(struct rockchip_lvds_device *lvds)
 	return 0;
 }
 
+const struct rockchip_lvds_chip_data rk3126_lvds_drv_data = {
+	.chip_type = RK3126_LVDS,
+	.grf_soc_con7  = RK3126_GRF_LVDS_CON0,
+	.grf_soc_con15 = RK3126_GRF_CON1,
+	.has_vop_sel = true,
+};
+
 const struct rockchip_lvds_chip_data rk3366_lvds_drv_data = {
 	.chip_type = RK3366_LVDS,
 	.grf_soc_con7  = RK3366_GRF_SOC_CON5,
@@ -231,6 +238,41 @@ static int rk336x_lvds_pwr_on(struct display_state *state)
 	return 0;
 }
 
+static void rk3126_output_ttl(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct rockchip_lvds_device *lvds = conn_state->private;
+	u32 val = 0;
+
+	/* iomux to lcdc */
+	writel(0xffff5555, lvds->grf + RK3126_GRF_GPIO2B_IOMUX);
+	writel(0xffff5555, lvds->grf + RK3126_GRF_GPIO2C_IOMUX);
+	writel(0x00ff0055, lvds->grf + RK3126_GRF_GPIO2C_IOMUX2);
+	writel(0x700c1004, lvds->grf + RK3126_GRF_GPIO2D_IOMUX);
+
+	/* enable lvds mode */
+	val = v_RK3126_LVDSMODE_EN(0) |
+		v_RK3126_MIPIPHY_TTL_EN(1) |
+		v_RK3126_MIPIPHY_LANE0_EN(1) |
+		v_RK3126_MIPIDPI_FORCEX_EN(1);
+	writel(val, lvds->grf + lvds->pdata->grf_soc_con7);
+	val = v_RK3126_MIPITTL_CLK_EN(1) |
+		v_RK3126_MIPITTL_LANE0_EN(1) |
+		v_RK3126_MIPITTL_LANE1_EN(1) |
+		v_RK3126_MIPITTL_LANE2_EN(1) |
+		v_RK3126_MIPITTL_LANE3_EN(1);
+	writel(val, lvds->grf + lvds->pdata->grf_soc_con15);
+	/* enable lane */
+	lvds_writel(lvds, MIPIPHY_REG0, 0x7f);
+	val = v_LANE0_EN(1) | v_LANE1_EN(1) | v_LANE2_EN(1) | v_LANE3_EN(1) |
+		v_LANECLK_EN(1) | v_PLL_PWR_OFF(1);
+	lvds_writel(lvds, MIPIPHY_REGEB, val);
+	/* set ttl mode and reset phy config */
+	val = v_LVDS_MODE_EN(0) | v_TTL_MODE_EN(1) | v_MIPI_MODE_EN(0) |
+		v_MSB_SEL(1) | v_DIG_INTER_RST(1);
+	lvds_writel(lvds, MIPIPHY_REGE0, val);
+	rk336x_lvds_pwr_on(state);
+}
 
 static void rk336x_output_ttl(struct display_state *state)
 {
@@ -279,6 +321,41 @@ static void rk336x_output_ttl(struct display_state *state)
 	rk336x_lvds_pwr_on(state);
 }
 
+static void rk3126_output_lvds(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct rockchip_lvds_device *lvds = conn_state->private;
+	u32 val = 0;
+
+	/* enable lvds mode */
+	val = v_RK3126_LVDSMODE_EN(1) |
+	      v_RK3126_MIPIPHY_TTL_EN(0);
+	/* config lvds_format */
+	val |= v_RK3126_LVDS_OUTPUT_FORMAT(lvds->format);
+	/* LSB receive mode */
+	val |= v_RK3126_LVDS_MSBSEL(LVDS_MSB_D7);
+	val |= v_RK3126_MIPIPHY_LANE0_EN(1) |
+	       v_RK3126_MIPIDPI_FORCEX_EN(1);
+	writel(val, lvds->grf + lvds->pdata->grf_soc_con7);
+
+	/* digital internal disable */
+	lvds_msk_reg(lvds, MIPIPHY_REGE1, m_DIG_INTER_EN, v_DIG_INTER_EN(0));
+
+	/* set pll prediv and fbdiv */
+	lvds_writel(lvds, MIPIPHY_REG3, v_PREDIV(2) | v_FBDIV_MSB(0));
+	lvds_writel(lvds, MIPIPHY_REG4, v_FBDIV_LSB(28));
+
+	lvds_writel(lvds, MIPIPHY_REGE8, 0xfc);
+
+	/* set lvds mode and reset phy config */
+	lvds_msk_reg(lvds, MIPIPHY_REGE0,
+		     m_MSB_SEL | m_DIG_INTER_RST,
+		     v_MSB_SEL(1) | v_DIG_INTER_RST(1));
+
+	rk336x_lvds_pwr_on(state);
+	lvds_msk_reg(lvds, MIPIPHY_REGE1, m_DIG_INTER_EN, v_DIG_INTER_EN(1));
+}
+
 static void rk336x_output_lvds(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
@@ -436,7 +513,7 @@ static int rockchip_lvds_init(struct display_state *state)
 	int lvds_node = conn_state->node;
 	struct rockchip_lvds_device *lvds;
 	const char *name;
-	int i;
+	int i,width;
 	struct fdt_resource lvds_phy, lvds_ctrl;
 	struct panel_state *panel_state = &state->panel_state;
 	int panel_node = panel_state->node;
@@ -447,7 +524,7 @@ static int rockchip_lvds_init(struct display_state *state)
 	lvds->pdata = pdata;
 
 	if (pdata->chip_type == RK3288_LVDS) {
-		lvds->regbase = (u32)fdtdec_get_addr_size_auto_noparent(state->blob,
+		lvds->regbase = (void *)fdtdec_get_addr_size_auto_noparent(state->blob,
 						lvds_node, "reg", 0, NULL, false);
 	} else {
 		i = fdt_get_named_resource(state->blob, lvds_node, "reg", "reg-names",
@@ -466,8 +543,8 @@ static int rockchip_lvds_init(struct display_state *state)
 			return -ENOMEM;
 		}
 
-		lvds->regbase = lvds_phy.start;
-		lvds->ctrl_reg = lvds_ctrl.start;
+		lvds->regbase = (void *)lvds_phy.start;
+		lvds->ctrl_reg = (void *)lvds_ctrl.start;
 	}
 
 	lvds->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
@@ -500,21 +577,26 @@ static int rockchip_lvds_init(struct display_state *state)
 		free(lvds);
 		return lvds->format;
 	}
-	i = fdtdec_get_int(state->blob, panel_node, "rockchip,data-width", 24);
-	if (i == 24) {
+	width = fdtdec_get_int(state->blob, panel_node, "rockchip,data-width", 24);
+	if (width == 24) {
 		lvds->format |= LVDS_24BIT;
-	} else if (i == 18) {
+	} else if (width == 18) {
 		lvds->format |= LVDS_18BIT;
 	} else {
-		printf("rockchip-lvds unsupport data-width[%d]\n", i);
+		printf("rockchip-lvds unsupport data-width[%d]\n", width);
 		free(lvds);
 		return -EINVAL;
 	}
+
 	printf("LVDS: data mapping: %s, data-width:%d, format:%d,\n",
-		name, i, lvds->format);
+		name, width, lvds->format);
 	conn_state->private = lvds;
 	conn_state->type = DRM_MODE_CONNECTOR_LVDS;
-	conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
+
+	if ((lvds->output == DISPLAY_OUTPUT_RGB) && (width == 18))
+		conn_state->output_mode = ROCKCHIP_OUT_MODE_P666;
+	else
+		conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
 
 	return 0;
 }
@@ -571,11 +653,15 @@ static int rockchip_lvds_enable(struct display_state *state)
 	if (lvds->output == DISPLAY_OUTPUT_LVDS) {
 		if (lvds->pdata->chip_type == RK3288_LVDS)
 			rk3288_output_lvds(state);
+		else if (lvds->pdata->chip_type == RK3126_LVDS)
+			rk3126_output_lvds(state);
 		else
 			rk336x_output_lvds(state);
 	} else {
 		if (lvds->pdata->chip_type == RK3288_LVDS)
 			rk3288_output_ttl(state);
+		else if (lvds->pdata->chip_type == RK3126_LVDS)
+			rk3126_output_ttl(state);
 		else
 			rk336x_output_ttl(state);
 	}
@@ -605,7 +691,7 @@ const struct rockchip_connector_funcs rockchip_lvds_funcs = {
 };
 
 static const struct rockchip_connector rk3366_lvds_data = {
-	 .funcs = &rockchip_analogix_dp_funcs,
+	 .funcs = &rockchip_lvds_funcs,
 	 .data = &rk3366_lvds_drv_data,
 };
 
@@ -619,6 +705,11 @@ static const struct rockchip_connector rk3288_lvds_data = {
 	 .data = &rk3288_lvds_drv_data,
 };
 
+static const struct rockchip_connector rk3126_lvds_data = {
+	 .funcs = &rockchip_lvds_funcs,
+	 .data = &rk3126_lvds_drv_data,
+};
+
 static const struct udevice_id rockchip_lvds_ids[] = {
 	{
 	 .compatible = "rockchip,rk3366-lvds",
@@ -629,6 +720,9 @@ static const struct udevice_id rockchip_lvds_ids[] = {
 	}, {
 	 .compatible = "rockchip,rk3288-lvds",
 	 .data = (ulong)&rk3288_lvds_data,
+	}, {
+	 .compatible = "rockchip,rk3126-lvds",
+	 .data = (ulong)&rk3126_lvds_data,
 	}, {}
 };
 
diff --git a/drivers/video/drm/rockchip_lvds.h b/drivers/video/drm/rockchip_lvds.h
index 416eacef87..d06ed18b3b 100644
--- a/drivers/video/drm/rockchip_lvds.h
+++ b/drivers/video/drm/rockchip_lvds.h
@@ -111,12 +111,39 @@
 #define RK3368_GRF_SOC_CON7	0x041c
 #define RK3368_GRF_SOC_CON15	0x043c
 
+#define RK3126_GRF_LVDS_CON0	0x0150
+#define RK3126_GRF_CON1		0x0144
+#define RK3126_GRF_GPIO2B_IOMUX	0x00cc  /* dclk sync vsync den d10 d11 d12 d13*/
+#define RK3126_GRF_GPIO2C_IOMUX	0x00d0  /* d14 d15 d16 d17 */
+#define RK3126_GRF_GPIO2C_IOMUX2	0x00e8  /* d18 d19 d20 d21 */
+#define RK3126_GRF_GPIO2D_IOMUX	0x00d4  /* d22 d23 0x700c1004*/
+
+
 #define v_RK336X_LVDS_OUTPUT_FORMAT(x) (BITS_MASK(x, 3, 13) | BITS_EN(3, 13))
 #define v_RK336X_LVDS_MSBSEL(x)        (BITS_MASK(x, 1, 11) | BITS_EN(1, 11))
 #define v_RK336X_LVDSMODE_EN(x)        (BITS_MASK(x, 1, 12) | BITS_EN(1, 12))
 #define v_RK336X_MIPIPHY_TTL_EN(x)     (BITS_MASK(x, 1, 15) | BITS_EN(1, 15))
 #define v_RK336X_MIPIPHY_LANE0_EN(x)   (BITS_MASK(x, 1, 5) | BITS_EN(1, 5))
 #define v_RK336X_MIPIDPI_FORCEX_EN(x)  (BITS_MASK(x, 1, 6) | BITS_EN(1, 6))
+
+#define v_RK3126_LVDS_OUTPUT_FORMAT(x)	(BITS_MASK(x, 3, 1) | BITS_EN(3, 1))
+#define v_RK3126_LVDS_MSBSEL(x)		(BITS_MASK(x, 1, 3) | BITS_EN(1, 3))
+#define v_RK3126_LVDSMODE_EN(x)		(BITS_MASK(x, 1, 6) | BITS_EN(1, 6))
+#define v_RK3126_MIPIPHY_TTL_EN(x)	(BITS_MASK(x, 1, 7) | BITS_EN(1, 7))
+#define v_RK3126_MIPIPHY_LANE0_EN(x)	(BITS_MASK(x, 1, 8) | BITS_EN(1, 8))
+#define v_RK3126_MIPIDPI_FORCEX_EN(x)	(BITS_MASK(x, 1, 9) | BITS_EN(1, 9))
+
+#define v_RK3126_MIPITTL_CLK_EN(x)     (BITS_MASK(x, 1, 7) | BITS_EN(1, 7))
+#define v_RK3126_MIPITTL_LANE0_EN(x)   (BITS_MASK(x, 1, 11) | BITS_EN(1, 11))
+#define v_RK3126_MIPITTL_LANE1_EN(x)   (BITS_MASK(x, 1, 12) | BITS_EN(1, 12))
+#define v_RK3126_MIPITTL_LANE2_EN(x)   (BITS_MASK(x, 1, 13) | BITS_EN(1, 13))
+#define v_RK3126_MIPITTL_LANE3_EN(x)   (BITS_MASK(x, 1, 14) | BITS_EN(1, 14))
+
+#define MIPIC_PHY_RSTZ		0x00a0
+#define m_PHY_ENABLE_CLK	BIT(2)
+#define MIPIC_PHY_STATUS	0x00b0
+#define m_PHY_LOCK_STATUS	BIT(0)
+
 enum {
 	LVDS_DATA_FROM_LCDC = 0,
 	LVDS_DATA_FORM_EBC,

commit 03a9cc7b3ba1b593d307beeaec93ad5b167e874e
Author: Mark Yao <mark.yao@rock-chips.com>
Date:   Thu Oct 19 17:42:44 2017 +0800

    drm/rockhcip: vop: add rk3126 vop support
    
    Change-Id: Ib0e1b5ce9d603fa2d6019017f63fab9c3dbbd85a
    Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_crtc.c b/drivers/video/drm/rockchip_crtc.c
index b392f92ac7..03118acc75 100644
--- a/drivers/video/drm/rockchip_crtc.c
+++ b/drivers/video/drm/rockchip_crtc.c
@@ -63,6 +63,9 @@ static const struct udevice_id rockchip_vop_ids[] = {
 	{
 		.compatible = "rockchip,rk3036-vop",
 		.data = (ulong)&rk3036_vop_data,
+	}, {
+		.compatible = "rockchip,rk3126-vop",
+		.data = (ulong)&rk3036_vop_data,
 	}, {
 		.compatible = "rockchip,rk3288-vop",
 		.data = (ulong)&rk3288_vop_data,

commit 3e3a3170d1aa42b995b36e7e505a0e9e5dba73ca
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Fri Oct 20 10:47:26 2017 +0800

    clk: rockchip: rk3128: support dclk_lcdc and aclk_vio setting
    
    support vop clk setting freq, for uboot logo display.
    
    Change-Id: I766bdc2c3a13d0ee92f81fbd7a30b7cc87c2dceb
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3128.h b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
index 11d3692c22..9f5d864673 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
@@ -96,6 +96,10 @@ enum {
 	GPLL_MODE_SLOW		= 0,
 	GPLL_MODE_NORM,
 	GPLL_MODE_DEEP,
+	CPLL_MODE_SHIFT		= 8,
+	CPLL_MODE_MASK		= 1 << CPLL_MODE_SHIFT,
+	CPLL_MODE_SLOW		= 0,
+	CPLL_MODE_NORM,
 	DPLL_MODE_SHIFT		= 4,
 	DPLL_MODE_MASK		= 1 << DPLL_MODE_SHIFT,
 	DPLL_MODE_SLOW		= 0,
@@ -179,6 +183,27 @@ enum {
 	SARADC_DIV_CON_MASK	= GENMASK(15, 8),
 	SARADC_DIV_CON_WIDTH	= 8,
 
+	/* CRU_CLKSEL27_CON*/
+	DCLK_VOP_SEL_SHIFT         = 0,
+	DCLK_VOP_SEL_MASK          = 1 << DCLK_VOP_SEL_SHIFT,
+	DCLK_VOP_PLL_SEL_CPLL           = 0,
+	DCLK_VOP_DIV_CON_SHIFT          = 8,
+	DCLK_VOP_DIV_CON_MASK           = 0xfff << DCLK_VOP_DIV_CON_SHIFT,
+
+	/* CRU_CLKSEL31_CON */
+	VIO0_PLL_SHIFT		= 5,
+	VIO0_PLL_MASK		= 7 << VIO0_PLL_SHIFT,
+	VI00_SEL_CPLL		= 0,
+	VIO0_SEL_GPLL,
+	VIO0_DIV_SHIFT		= 0,
+	VIO0_DIV_MASK		= 0x1f << VIO0_DIV_SHIFT,
+	VIO1_PLL_SHIFT		= 13,
+	VIO1_PLL_MASK		= 7 << VIO1_PLL_SHIFT,
+	VI01_SEL_CPLL		= 0,
+	VIO1_SEL_GPLL,
+	VIO1_DIV_SHIFT		= 8,
+	VIO1_DIV_MASK		= 0x1f << VIO1_DIV_SHIFT,
+
 	/* CRU_SOFTRST5_CON */
 	DDRCTRL_PSRST_SHIFT	= 11,
 	DDRCTRL_SRST_SHIFT	= 10,
diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c
index b9d8e78368..f4c6ebc70e 100644
--- a/drivers/clk/rockchip/clk_rk3128.c
+++ b/drivers/clk/rockchip/clk_rk3128.c
@@ -76,6 +76,70 @@ static int rkclk_set_pll(struct rk3128_cru *cru, enum rk_clk_id clk_id,
 	return 0;
 }
 
+static int pll_para_config(u32 freq_hz, struct pll_div *div)
+{
+	u32 ref_khz = OSC_HZ / 1000, refdiv, fbdiv = 0;
+	u32 postdiv1, postdiv2 = 1;
+	u32 fref_khz;
+	u32 diff_khz, best_diff_khz;
+	const u32 max_refdiv = 63, max_fbdiv = 3200, min_fbdiv = 16;
+	const u32 max_postdiv1 = 7, max_postdiv2 = 7;
+	u32 vco_khz;
+	u32 freq_khz = freq_hz / 1000;
+
+	if (!freq_hz) {
+		printf("%s: the frequency can't be 0 Hz\n", __func__);
+		return -1;
+	}
+
+	postdiv1 = DIV_ROUND_UP(VCO_MIN_HZ / 1000, freq_khz);
+	if (postdiv1 > max_postdiv1) {
+		postdiv2 = DIV_ROUND_UP(postdiv1, max_postdiv1);
+		postdiv1 = DIV_ROUND_UP(postdiv1, postdiv2);
+	}
+
+	vco_khz = freq_khz * postdiv1 * postdiv2;
+
+	if (vco_khz < (VCO_MIN_HZ / 1000) || vco_khz > (VCO_MAX_HZ / 1000) ||
+	    postdiv2 > max_postdiv2) {
+		printf("%s: Cannot find out a supported VCO for Freq (%uHz)\n",
+		       __func__, freq_hz);
+		return -1;
+	}
+
+	div->postdiv1 = postdiv1;
+	div->postdiv2 = postdiv2;
+
+	best_diff_khz = vco_khz;
+	for (refdiv = 1; refdiv < max_refdiv && best_diff_khz; refdiv++) {
+		fref_khz = ref_khz / refdiv;
+
+		fbdiv = vco_khz / fref_khz;
+		if ((fbdiv >= max_fbdiv) || (fbdiv <= min_fbdiv))
+			continue;
+		diff_khz = vco_khz - fbdiv * fref_khz;
+		if (fbdiv + 1 < max_fbdiv && diff_khz > fref_khz / 2) {
+			fbdiv++;
+			diff_khz = fref_khz - diff_khz;
+		}
+
+		if (diff_khz >= best_diff_khz)
+			continue;
+
+		best_diff_khz = diff_khz;
+		div->refdiv = refdiv;
+		div->fbdiv = fbdiv;
+	}
+
+	if (best_diff_khz > 4 * (1000)) {
+		printf("%s: Failed to match output frequency %u bestis %u Hz\n",
+		       __func__, freq_hz,
+		       best_diff_khz * 1000);
+		return -1;
+	}
+	return 0;
+}
+
 static void rkclk_init(struct rk3128_cru *cru)
 {
 	u32 aclk_div;
@@ -161,9 +225,10 @@ static void rkclk_init(struct rk3128_cru *cru)
 
 	/* PLL enter normal-mode */
 	rk_clrsetreg(&cru->cru_mode_con,
-		     GPLL_MODE_MASK | APLL_MODE_MASK,
+		     GPLL_MODE_MASK | APLL_MODE_MASK | CPLL_MODE_MASK,
 		     GPLL_MODE_NORM << GPLL_MODE_SHIFT |
-		     APLL_MODE_NORM << APLL_MODE_SHIFT);
+		     APLL_MODE_NORM << APLL_MODE_SHIFT |
+		     CPLL_MODE_NORM << CPLL_MODE_SHIFT);
 
 	/*fix NAND controller  working clock max to 150Mhz */
 	rk_clrsetreg(&cru->cru_clksel_con[2],
@@ -181,11 +246,11 @@ static uint32_t rkclk_pll_get_rate(struct rk3128_cru *cru,
 	int pll_id = rk_pll_id(clk_id);
 	struct rk3128_pll *pll = &cru->pll[pll_id];
 	static u8 clk_shift[CLK_COUNT] = {
-		0xff, APLL_MODE_SHIFT, DPLL_MODE_SHIFT, 0xff,
+		0xff, APLL_MODE_SHIFT, DPLL_MODE_SHIFT, CPLL_MODE_SHIFT,
 		GPLL_MODE_SHIFT, 0xff
 	};
 	static u32 clk_mask[CLK_COUNT] = {
-		0xff, APLL_MODE_MASK, DPLL_MODE_MASK, 0xff,
+		0xff, APLL_MODE_MASK, DPLL_MODE_MASK, CPLL_MODE_MASK,
 		GPLL_MODE_MASK, 0xff
 	};
 	uint shift;
@@ -350,6 +415,71 @@ static ulong rk3128_saradc_set_clk(struct rk3128_cru *cru, uint hz)
 	return rk3128_saradc_get_clk(cru);
 }
 
+static ulong rk3128_vop_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz)
+{
+	int src_clk_div;
+	struct pll_div cpll_config = {0};
+
+	src_clk_div = GPLL_HZ / hz;
+	assert(src_clk_div - 1 < 31);
+
+	switch (clk_id) {
+	case ACLK_VIO0:
+		rk_clrsetreg(&cru->cru_clksel_con[31],
+			     VIO0_PLL_MASK | VIO0_DIV_MASK,
+			     VIO0_SEL_GPLL << VIO0_PLL_SHIFT |
+			     (src_clk_div - 1) << VIO0_DIV_SHIFT);
+		break;
+	case ACLK_VIO1:
+		rk_clrsetreg(&cru->cru_clksel_con[31],
+			     VIO1_PLL_MASK | VIO1_DIV_MASK,
+			     VIO1_SEL_GPLL << VIO1_PLL_SHIFT |
+			     (src_clk_div - 1) << VIO1_DIV_SHIFT);
+		break;
+	case DCLK_LCDC:
+		if (pll_para_config(hz, &cpll_config))
+			return -1;
+		rkclk_set_pll(cru, CLK_CODEC, &cpll_config);
+
+		rk_clrsetreg(&cru->cru_clksel_con[27],
+			     DCLK_VOP_SEL_MASK | DCLK_VOP_DIV_CON_MASK,
+			     DCLK_VOP_PLL_SEL_CPLL << DCLK_VOP_SEL_SHIFT |
+			     (1 - 1) << DCLK_VOP_DIV_CON_SHIFT);
+		break;
+	default:
+		printf("do not support this vop freq\n");
+		return -EINVAL;
+	}
+
+	return hz;
+}
+
+static ulong rk3128_vop_get_rate(struct rk3128_cru *cru, ulong clk_id)
+{
+	u32 div, con, parent;
+
+	switch (clk_id) {
+	case ACLK_VIO0:
+		con = readl(&cru->cru_clksel_con[31]);
+		div = con  & 0x1f;
+		parent = GPLL_HZ;
+		break;
+	case ACLK_VIO1:
+		con = readl(&cru->cru_clksel_con[31]);
+		div = (con >> 8) & 0x1f;
+		parent = GPLL_HZ;
+		break;
+	case DCLK_LCDC:
+		con = readl(&cru->cru_clksel_con[27]);
+		div = (con >> 8) & 0xfff;
+		parent = rkclk_pll_get_rate(cru, CLK_CODEC);
+		break;
+	default:
+		return -ENOENT;
+	}
+	return DIV_TO_RATE(parent, div);
+}
+
 static ulong rk3128_clk_get_rate(struct clk *clk)
 {
 	struct rk3128_clk_priv *priv = dev_get_priv(clk->dev);
@@ -364,6 +494,10 @@ static ulong rk3128_clk_get_rate(struct clk *clk)
 		return rk3128_i2c_get_clk(priv->cru, clk->id);
 	case SCLK_SARADC:
                 return rk3128_saradc_get_clk(priv->cru);
+	case DCLK_LCDC:
+	case ACLK_VIO0:
+	case ACLK_VIO1:
+		return rk3128_vop_get_rate(priv->cru, clk->id);
 	default:
 		return -ENOENT;
 	}
@@ -378,6 +512,12 @@ static ulong rk3128_clk_set_rate(struct clk *clk, ulong rate)
 	switch (clk->id) {
 	case 0 ... 63:
 		return 0;
+	case DCLK_LCDC:
+	case ACLK_VIO0:
+	case ACLK_VIO1:
+		new_rate = rk3128_vop_set_clk(priv->cru,
+						clk->id, rate);
+		break;
 	case HCLK_EMMC:
 		new_rate = rockchip_mmc_set_clk(priv->cru, gclk_rate,
 						clk->id, rate);
diff --git a/include/dt-bindings/clock/rk3128-cru.h b/include/dt-bindings/clock/rk3128-cru.h
index 35e943575f..476268a78b 100644
--- a/include/dt-bindings/clock/rk3128-cru.h
+++ b/include/dt-bindings/clock/rk3128-cru.h
@@ -52,8 +52,8 @@
 
 /* aclk gates */
 #define ACLK_DMAC2		194
-#define ACLK_LCDC		197
-#define ACLK_VIO		203
+#define ACLK_VIO0		197
+#define ACLK_VIO1		203
 #define ACLK_VCODEC		208
 #define ACLK_CPU		209
 #define ACLK_PERI		210

commit d37af50d6d3fd90508443e69df6b0d18251989ab
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Wed Oct 18 16:32:55 2017 +0800

    rockchip: bootrkp: add compatible support for armv7 and armv8
    
    booti only can be used boot armv8 system, we call do_bootm_linux
    to boot armv7 here.
    
    Change-Id: Ic09c4a7818199b54b9eb37bc4da0171248ac9f8d
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/bootrkp.c b/arch/arm/mach-rockchip/bootrkp.c
index b9ef47fc6d..fe25c469b3 100644
--- a/arch/arm/mach-rockchip/bootrkp.c
+++ b/arch/arm/mach-rockchip/bootrkp.c
@@ -5,8 +5,9 @@
  */
 
 #include <common.h>
-#include <config.h>
+#include <bootm.h>
 #include <linux/list.h>
+#include <libfdt.h>
 #include <malloc.h>
 #include <asm/arch/resource_img.h>
 #include "rockchip_parameter.h"
@@ -66,6 +67,34 @@ struct rockchip_image {
 	uint32_t crc;
 };
 
+#if !defined(CONFIG_ARM64)
+#ifdef CONFIG_LMB
+static void boot_start_lmb(bootm_headers_t *images)
+{
+	ulong		mem_start;
+	phys_size_t	mem_size;
+
+	lmb_init(&images->lmb);
+
+	mem_start = env_get_bootm_low();
+	mem_size = env_get_bootm_size();
+
+	lmb_add(&images->lmb, (phys_addr_t)mem_start, mem_size);
+
+	arch_lmb_reserve(&images->lmb);
+	board_lmb_reserve(&images->lmb);
+}
+#else
+static inline void boot_start_lmb(bootm_headers_t *images) { }
+#endif
+
+static void boot_lmb_init(bootm_headers_t *images)
+{
+	boot_start_lmb(images);
+	images->state = BOOTM_STATE_OS_GO;
+}
+#endif
+
 static int read_boot_mode_from_misc(struct blk_part *misc)
 {
 	struct bootloader_message *bmsg;
@@ -115,7 +144,7 @@ static int read_rockchip_image(struct blk_part *part, void *dst)
 	if (ret < 0)
 		goto err;
 	if (img->tag != TAG_KERNEL) {
-		printf("%s: invalid image tag\n", part->name);
+		printf("%s: invalid image tag(0x%x)\n", part->name, img->tag);
 		goto err;
 	}
 
@@ -143,12 +172,11 @@ static int do_bootrkp(cmd_tbl_t *cmdtp, int flag, int argc,
 	struct blk_part *boot;
 	struct blk_part *kernel;
 	struct blk_part *misc;
-	int ramdisk_size;
-	int kernel_size;
-	int fdt_size;
+	ulong ramdisk_size;
+	ulong kernel_size;
+	ulong fdt_size;
 	int boot_mode;
 	int ret = 0;
-	char cmdbuf[64];
 
 	misc = rockchip_get_blk_part(PART_MISC);
 	if (misc)
@@ -185,10 +213,22 @@ static int do_bootrkp(cmd_tbl_t *cmdtp, int flag, int argc,
 		goto out;
 	}
 
-	printf("kernel_size:0x%ulx ramdisk_size:0x%x\n", kernel_size, ramdisk_size);
-	sprintf(cmdbuf, "booti 0x%lx 0x%lx:0x%x 0x%lx",
+	printf("kernel   @ 0x%08lx (0x%08lx)\n", kernel_addr_r, kernel_size);
+	printf("ramdisk  @ 0x%08lx (0x%08lx)\n", ramdisk_addr_r, ramdisk_size);
+#if defined(CONFIG_ARM64)
+	char cmdbuf[64];
+	sprintf(cmdbuf, "booti 0x%lx 0x%lx:0x%lx 0x%lx",
 		kernel_addr_r, ramdisk_addr_r, ramdisk_size, fdt_addr_r);
 	run_command(cmdbuf, 0);
+#else
+	boot_lmb_init(&images);
+	images.ep = kernel_addr_r;
+	images.initrd_start = ramdisk_addr_r;
+	images.initrd_end = ramdisk_addr_r + ramdisk_size;
+	images.ft_addr = (void *)fdt_addr_r;
+	images.ft_len = fdt_totalsize(fdt_addr_r);
+	do_bootm_linux(0, 0, NULL, &images);
+#endif
 out:
 	return ret;
 }

commit 3d6b39cb83c648649ed7a5fb0297cb1324078f23
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Thu Oct 12 20:36:19 2017 +0800

    rockchip: parameter: use env_update to update bootargs
    
    function env_update will update bootargs by a more
    appropriate way, so let's update bootargs by this api.
    
    Change-Id: I75b1627ceb59df00b82adc80d541027489abc1ea
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rockchip_parameter.c b/arch/arm/mach-rockchip/rockchip_parameter.c
index c33d10c925..ff26a4bfd5 100644
--- a/arch/arm/mach-rockchip/rockchip_parameter.c
+++ b/arch/arm/mach-rockchip/rockchip_parameter.c
@@ -24,6 +24,7 @@ static int rockchip_param_parse(char *param)
 {
 	struct blk_part *part;
 	const char *cmdline = strstr(param, "CMDLINE:");
+	char *cmdline_end = strstr(cmdline, "\n"); /* end by '\n' */
 	const char *blkdev_parts = strstr(cmdline, "mtdparts");
 	const char *blkdev_def = strchr(blkdev_parts, ':') + 1;
 	char *next = (char *)blkdev_def;
@@ -31,9 +32,15 @@ static int rockchip_param_parse(char *param)
 	int len;
 	unsigned long size, from;
 
-	debug("%s", cmdline);
+	if (!cmdline) {
+		printf("invalid parameter\n");
+		return -EINVAL;
+	}
 
-	env_set("bootargs", cmdline);
+	*cmdline_end = '\0';
+	debug("%s", cmdline);
+	/* skip "CMDLINE:" */
+	env_update("bootargs", cmdline + strlen("CMDLINE:"));
 
 	while (*next) {
 		if (*next == '-') {
@@ -79,9 +86,8 @@ static int rockchip_init_param(void)
 
 	blkdev_read(param, RK_BLK_OFFSET, MAX_PARAM_SIZE >> 9);
 
-	rockchip_param_parse(param->params);
+	return rockchip_param_parse(param->params);
 
-	return 0;
 }
 
 struct blk_part *rockchip_get_blk_part(const char *name)

commit 5db1153e4bcf62d696d150c11c67a464ede9baca
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Oct 19 20:33:39 2017 +0800

    drivers: irq: support convert gpio to irq by gpio fdt phandle
    
    add funtion: phandle_gpio_to_irq(u32 gpio_phandle, u32 pin)
    
    Change-Id: Iec2d1ed08138c2476bb13deb16ca06960fadd60d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/irq/irq-gpio-switch.c b/drivers/irq/irq-gpio-switch.c
index 18cab91f2a..c1529ef62d 100644
--- a/drivers/irq/irq-gpio-switch.c
+++ b/drivers/irq/irq-gpio-switch.c
@@ -8,6 +8,8 @@
 #include <irq-generic.h>
 #include "irq-gpio-switch.h"
 
+DECLARE_GLOBAL_DATA_PTR;
+
 static struct gpio_bank gpio_banks[GPIO_BANK_NUM] = {
 #if GPIO_BANK_NUM >= 1
 	GPIO_BANK_REGISTER(0, GPIO_BANK_PINS),
@@ -70,6 +72,64 @@ static int _hard_gpio_to_irq(u32 gpio)
 	return -EINVAL;
 }
 
+static int _phandle_gpio_to_irq(u32 gpio_phandle, u32 offset)
+{
+	int irq_gpio, bank, ret = EINVAL_GPIO;
+	bool found;
+	const char *name;
+	char *name_tok;
+	int node;
+
+	node = fdt_node_offset_by_phandle(gd->fdt_blob, gpio_phandle);
+	if (node < 0) {
+		printf("can't find node by gpio_phandle %d, ret=%d\n",
+		       gpio_phandle, node);
+		return EINVAL_GPIO;
+	}
+
+	name = fdt_get_name(gd->fdt_blob, node, NULL);
+	if (!name) {
+		printf("can't find device name for the gpio bank\n");
+		return EINVAL_GPIO;
+	}
+
+	name_tok = strdup(name);
+	if (!name_tok) {
+		printf("Error: strdup in %s failed!\n", __func__);
+		return -ENOMEM;
+	}
+
+	name = strtok(name_tok, "@");
+	if (!name) {
+		printf("can't find correct device name for the gpio bank\n");
+		goto out;
+	}
+
+	for (bank = 0; bank < ARRAY_SIZE(gpio_banks); bank++) {
+		if (!strcmp(gpio_banks[bank].name, name)) {
+			found = true;
+			break;
+		}
+	}
+
+	if (!found) {
+		printf("irq gpio framework can't find %s\n", name);
+		goto out;
+	}
+
+	debug("%s: gpio%d-%d\n", __func__, bank, offset);
+	irq_gpio = RK_IRQ_GPIO(bank, offset);
+	if (!gpio_is_valid(irq_gpio))
+		goto out;
+
+	free(name_tok);
+	return _hard_gpio_to_irq(irq_gpio);
+
+out:
+	free(name_tok);
+	return ret;
+}
+
 static int _irq_to_gpio(int irq)
 {
 	int bank, pin, idx;
@@ -142,6 +202,14 @@ int hard_gpio_to_irq(u32 gpio)
 	return _hard_gpio_to_irq(gpio);
 }
 
+int phandle_gpio_to_irq(u32 gpio_phandle, u32 pin)
+{
+	if (gpio_phandle < 0)
+		return EINVAL_GPIO;
+
+	return _phandle_gpio_to_irq(gpio_phandle, pin);
+}
+
 int irq_to_gpio(int irq)
 {
 	return _irq_to_gpio(irq);
diff --git a/include/irq-generic.h b/include/irq-generic.h
index 592c93bf55..f16c8e5ca0 100644
--- a/include/irq-generic.h
+++ b/include/irq-generic.h
@@ -76,6 +76,7 @@ int gpio_to_irq(struct gpio_desc *gpio);
 #define GPIO_BANK_SHIFT			8
 #define RK_IRQ_GPIO(bank, pin) 		(((bank) << GPIO_BANK_SHIFT) | (pin))
 int hard_gpio_to_irq(unsigned gpio);
+int phandle_gpio_to_irq(u32 gpio_phandle, u32 pin);
 
 /* only irq-gpio.c can use it */
 void _generic_gpio_handle_irq(int irq);

commit 0e508c4fef6fc071e3216d5aa537525f23529f1a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 17 11:11:28 2017 +0800

    drivers: irq: disable irq before free irq handler
    
    It makes irq handler free safely
    
    Change-Id: Id3af8956d5681881301e658a1adb9ca3aba97f79
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/irq/irq-generic.c b/drivers/irq/irq-generic.c
index 8dd09078d2..ab7d5493e5 100644
--- a/drivers/irq/irq-generic.c
+++ b/drivers/irq/irq-generic.c
@@ -173,7 +173,7 @@ void irq_install_handler(int irq, interrupt_handler_t *handler, void *data)
 
 void irq_free_handler(int irq)
 {
-	if (irq_bad(irq))
+	if (irq_handler_disable(irq))
 		return;
 
 	irqs_desc[irq].handle_irq = NULL;

commit b679e969976a36ab3f5ea03972294f6562e2bd9b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Oct 19 20:31:29 2017 +0800

    rockchip: rk3128: reserve 14MB for op-tee
    
    op-tee needs 14MB memory with TA enabled, otherwise 2MB.
    
    Change-Id: Id2b6c5d81a669a7572f3ac2944d438989f99fc8b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3128-board.c b/arch/arm/mach-rockchip/rk3128-board.c
index a650621558..fbd026aee4 100644
--- a/arch/arm/mach-rockchip/rk3128-board.c
+++ b/arch/arm/mach-rockchip/rk3128-board.c
@@ -77,9 +77,9 @@ int dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
 	gd->bd->bi_dram[0].size = 0x8400000;
-	/* Reserve 0x200000 for OPTEE */
+	/* Reserve 0xe00000(14MB) for OPTEE with TA enabled, otherwise 2MB */
 	gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE
-				+ gd->bd->bi_dram[0].size + 0x200000;
+				+ gd->bd->bi_dram[0].size + 0xe00000;
 	gd->bd->bi_dram[1].size = gd->bd->bi_dram[0].start
 				+ gd->ram_size - gd->bd->bi_dram[1].start;
 

commit 12ee84b17991eae46b50879000edaccfb6e75d45
Author: Shawn Lin <shawn.lin@rock-chips.com>
Date:   Thu Oct 19 09:39:58 2017 +0800

    mmc: dwmmc: fix wrong implementation of dwmci_memcpy_toio
    
    We should increase the buffer address instead of fifo for
    write case.
    
    Change-Id: Ifab8ab0480c7b6f5cd0f89c8cd67ed7b7005acad
    Fixes: bda599f7c7d1 ("mmc: dwmmc: Add stride PIO for better burst mode support")
    Reported-and-tested-by: Frank Wang <wmc@rock-chips.com>
    Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 9f279092b0..cae88ac08e 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -51,7 +51,27 @@ void noinline dwmci_memcpy_fromio(void *buffer, void *fifo_addr)
 
 void noinline dwmci_memcpy_toio(void *buffer, void *fifo_addr)
 {
-	dwmci_memcpy_fromio(fifo_addr, buffer);
+	__asm__ __volatile__ (
+		"push {r2, r3, r4, r5, r6, r7, r8, r9}\n"
+		"ldm r0!, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"stm r1, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"ldm r0!, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"stm r1, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"ldm r0!, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"stm r1, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"ldm r0!, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"stm r1, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"ldm r0!, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"stm r1, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"ldm r0!, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"stm r1, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"ldm r0!, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"stm r1, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"ldm r0!, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"stm r1, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"pop {r2, r3, r4, r5, r6,r7,r8,r9}\n"
+		:::"memory"
+	);
 }
 #else
 void dwmci_memcpy_fromio(void *buffer, void *fifo_addr) {};

commit 42b2f1bc60c14ede471c4cb54fb7f660c73669b2
Author: Zhaoyifeng <zyf@rock-chips.com>
Date:   Wed Oct 18 16:46:03 2017 +0800

    3128: clock: config nand controller working clock max 150Mhz
    
    nandc working clock div from gpll and max clock config 150Mhz
    while gpll config as 600Mhz.
    
    Change-Id: I893d453d031a0ddd0cd79111699d3600095c6e4f
    Signed-off-by: Zhaoyifeng <zyf@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3128.h b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
index 0f803ad93d..11d3692c22 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
@@ -131,6 +131,16 @@ enum {
 	CORE_PERI_DIV_SHIFT	= 0,
 	CORE_PERI_DIV_MASK	= 0xf << CORE_PERI_DIV_SHIFT,
 
+	/* CRU_CLK_SEL2_CON */
+	NANDC_PLL_SEL_SHIFT	= 14,
+	NANDC_PLL_SEL_MASK	= 7 << NANDC_PLL_SEL_SHIFT,
+	NANDC_PLL_SEL_CPLL	= 0,
+	NANDC_PLL_SEL_GPLL,
+	NANDC_CLK_DIV_SHIFT	= 8,
+	NANDC_CLK_DIV_MASK	= 0x1f << NANDC_CLK_DIV_SHIFT,
+	PVTM_CLK_DIV_SHIFT	= 0,
+	PVTM_CLK_DIV_MASK	= 0x3f << PVTM_CLK_DIV_SHIFT,
+
 	/* CRU_CLKSEL10_CON */
 	PERI_PLL_SEL_SHIFT	= 14,
 	PERI_PLL_SEL_MASK	= 1 << PERI_PLL_SEL_SHIFT,
diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c
index 925a2f3ea6..b9d8e78368 100644
--- a/drivers/clk/rockchip/clk_rk3128.c
+++ b/drivers/clk/rockchip/clk_rk3128.c
@@ -164,6 +164,12 @@ static void rkclk_init(struct rk3128_cru *cru)
 		     GPLL_MODE_MASK | APLL_MODE_MASK,
 		     GPLL_MODE_NORM << GPLL_MODE_SHIFT |
 		     APLL_MODE_NORM << APLL_MODE_SHIFT);
+
+	/*fix NAND controller  working clock max to 150Mhz */
+	rk_clrsetreg(&cru->cru_clksel_con[2],
+		     NANDC_PLL_SEL_MASK | NANDC_CLK_DIV_MASK,
+		     NANDC_PLL_SEL_GPLL << NANDC_PLL_SEL_SHIFT |
+		     3 << NANDC_CLK_DIV_SHIFT);
 }
 
 /* Get pll rate by id */

commit 441217e374e194c5ac7c2727e59d43af034ac7c0
Author: Zhaoyifeng <zyf@rock-chips.com>
Date:   Tue Oct 17 14:29:38 2017 +0800

    drivers: rknand: add nand flash drivers for Rockchip SoC
    
    This patch add the nand flash support for Rockchip Soc(RK3128, RK3126x,
    RK3188, Rk3229 etc).
    
    Change-Id: I35ea09f0714b303b247a97ed13cc6e0e56675a0e
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 30bf556fd2..dfc11a49a9 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -831,6 +831,13 @@ config CMD_REMOTEPROC
 	help
 	  Support for Remote Processor control
 
+config CMD_RKNAND
+	bool "rknand"
+	depends on RKNAND
+	default y if RKNAND
+	help
+	  Rockchip NAND FLASH device support
+
 config CMD_ROCKUSB
 	bool "rockusb"
 	depends on USB_FUNCTION_ROCKUSB
diff --git a/cmd/Makefile b/cmd/Makefile
index caabfd7528..17ae86dd77 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -108,6 +108,7 @@ obj-$(CONFIG_CMD_ROCKUSB) += rockusb.o
 obj-$(CONFIG_SANDBOX) += host.o
 obj-$(CONFIG_CMD_SATA) += sata.o
 obj-$(CONFIG_CMD_NVME) += nvme.o
+obj-$(CONFIG_CMD_RKNAND) += rknand.o
 obj-$(CONFIG_CMD_SF) += sf.o
 obj-$(CONFIG_CMD_SCSI) += scsi.o disk.o
 obj-$(CONFIG_CMD_SHA1SUM) += sha1sum.o
diff --git a/cmd/rknand.c b/cmd/rknand.c
new file mode 100644
index 0000000000..d0a70ac84f
--- /dev/null
+++ b/cmd/rknand.c
@@ -0,0 +1,41 @@
+/*
+ * Copyright (C) (C) Copyright 2016-2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <command.h>
+#include <dm.h>
+#include <rknand.h>
+
+static int rknand_curr_dev;
+static int do_rknand(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+	int ret;
+
+	if (argc == 2) {
+		if (strncmp(argv[1], "scan", 4) == 0) {
+			ret = rknand_scan_namespace();
+			if (ret)
+				return CMD_RET_FAILURE;
+
+			return ret;
+		}
+	}
+
+	return blk_common_cmd(argc, argv, IF_TYPE_RKNAND, &rknand_curr_dev);
+}
+
+U_BOOT_CMD(
+	rknand, 8, 1, do_rknand,
+	"rockchip nand flash sub-system",
+	"scan - scan Nand devices\n"
+	"rknand info - show all available Nand devices\n"
+	"rknand device [dev] - show or set current Nand device\n"
+	"rknand part [dev] - print partition table of one or all Nand devices\n"
+	"rknand read addr blk# cnt - read `cnt' blocks starting at block\n"
+	"     `blk#' to memory address `addr'\n"
+	"rknand write addr blk# cnt - write `cnt' blocks starting at block\n"
+	"     `blk#' from memory address `addr'"
+);
diff --git a/disk/part.c b/disk/part.c
index c67fdacc79..c04e91af20 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -133,6 +133,7 @@ void dev_print (struct blk_desc *dev_desc)
 	case IF_TYPE_MMC:
 	case IF_TYPE_USB:
 	case IF_TYPE_NVME:
+	case IF_TYPE_RKNAND:
 		printf ("Vendor: %s Rev: %s Prod: %s\n",
 			dev_desc->vendor,
 			dev_desc->revision,
@@ -269,6 +270,9 @@ static void print_part_header(const char *type, struct blk_desc *dev_desc)
 	case IF_TYPE_NVME:
 		puts ("NVMe");
 		break;
+	case IF_TYPE_RKNAND:
+		puts("RKNAND");
+		break;
 	default:
 		puts ("UNKNOWN");
 		break;
diff --git a/doc/README.rknand b/doc/README.rknand
new file mode 100644
index 0000000000..83bcab118c
--- /dev/null
+++ b/doc/README.rknand
@@ -0,0 +1,28 @@
+rknand (Rockchip NAND FLASH drivers with FTL)
+=====================================================
+
+Overview
+--------
+
+The rknand is used for Rockchip Soc NAND FLASH devices.
+
+Status
+------
+It supprot SLC and MLC NAND Flash with fully FTL.
+
+Usage in U-Boot
+---------------
+
+To list all of the rknand hard disks, try:
+
+  => rknand info
+  Device 0: Vendor: 0x2207 Rev: V1.00 Prod: rknand
+	    Type: Hard Disk
+	    Capacity: 7304.0 MB = 7.1 GB (14958592 x 512)
+
+To find and initialize nand devices, try:
+  => rknand dev 0
+  Device 0: Vendor: 0x2207 Rev: V1.00 Prod: rknand
+	    Type: Hard Disk
+	    Capacity: 7304.0 MB = 7.1 GB (14958592 x 512)
+... is now current device
diff --git a/drivers/Kconfig b/drivers/Kconfig
index baf2d5bac0..26348736fd 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -72,6 +72,8 @@ source "drivers/remoteproc/Kconfig"
 
 source "drivers/reset/Kconfig"
 
+source "drivers/rknand/Kconfig"
+
 source "drivers/rtc/Kconfig"
 
 source "drivers/scsi/Kconfig"
diff --git a/drivers/Makefile b/drivers/Makefile
index 5edf096a3a..9f961fd3ed 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -76,6 +76,7 @@ obj-$(CONFIG_FPGA) += fpga/
 obj-y += misc/
 obj-$(CONFIG_MMC) += mmc/
 obj-$(CONFIG_NVME) += nvme/
+obj-$(CONFIG_RKNAND) += rknand/
 obj-y += pcmcia/
 obj-y += dfu/
 obj-$(CONFIG_X86) += pch/
diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
index 3c5a87b60a..4485f8026c 100644
--- a/drivers/block/blk-uclass.c
+++ b/drivers/block/blk-uclass.c
@@ -23,6 +23,7 @@ static const char *if_typename_str[IF_TYPE_COUNT] = {
 	[IF_TYPE_HOST]		= "host",
 	[IF_TYPE_SYSTEMACE]	= "ace",
 	[IF_TYPE_NVME]		= "nvme",
+	[IF_TYPE_RKNAND]	= "rknand",
 };
 
 static enum uclass_id if_type_uclass_id[IF_TYPE_COUNT] = {
@@ -36,6 +37,7 @@ static enum uclass_id if_type_uclass_id[IF_TYPE_COUNT] = {
 	[IF_TYPE_SATA]		= UCLASS_AHCI,
 	[IF_TYPE_HOST]		= UCLASS_ROOT,
 	[IF_TYPE_NVME]		= UCLASS_NVME,
+	[IF_TYPE_RKNAND]	= UCLASS_RKNAND,
 	[IF_TYPE_SYSTEMACE]	= UCLASS_INVALID,
 };
 
diff --git a/drivers/rknand/Kconfig b/drivers/rknand/Kconfig
new file mode 100644
index 0000000000..ea2f21d484
--- /dev/null
+++ b/drivers/rknand/Kconfig
@@ -0,0 +1,12 @@
+#
+# Copyright (C) (C) Copyright 2016-2017 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+config RKNAND
+	bool "Rockchip NAND FLASH device support"
+	depends on BLK
+	help
+	  This option enables support for Rockchip NAND FLASH devices.
+	  It supports block interface(with rk ftl) to read and write NAND FLASH.
diff --git a/drivers/rknand/Makefile b/drivers/rknand/Makefile
new file mode 100644
index 0000000000..573462b851
--- /dev/null
+++ b/drivers/rknand/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (C) (C) Copyright 2016-2017 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y += rknand.o rk_ftl_arm_v7.o
diff --git a/drivers/rknand/rk_ftl_arm_v7.S b/drivers/rknand/rk_ftl_arm_v7.S
new file mode 100644
index 0000000000..dd234e0d3a
--- /dev/null
+++ b/drivers/rknand/rk_ftl_arm_v7.S
@@ -0,0 +1,23971 @@
+	.syntax unified
+	.arch armv7-a
+	.fpu softvfp
+	.eabi_attribute 20, 1
+	.eabi_attribute 21, 1
+	.eabi_attribute 23, 3
+	.eabi_attribute 24, 1
+	.eabi_attribute 25, 1
+	.eabi_attribute 26, 2
+	.eabi_attribute 30, 4
+	.eabi_attribute 34, 0
+	.eabi_attribute 18, 4
+	.thumb
+	.file	"rk_ftl_arm_v7.c"
+	.section	.text.FlashMemCmp8,"ax",%progbits
+	.align	1
+	.global	FlashMemCmp8
+	.thumb
+	.thumb_func
+	.type	FlashMemCmp8, %function
+FlashMemCmp8:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L10
+	push	{r4, r5, lr}
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L9
+	ldrb	r4, [r0, #1]	@ zero_extendqisi2
+	ldrb	r3, [r1, #1]	@ zero_extendqisi2
+	cmp	r4, r3
+	beq	.L8
+	movs	r3, #0
+	b	.L9
+.L6:
+	ldrb	r5, [r0, r3]	@ zero_extendqisi2
+	ldrb	r4, [r1, r3]	@ zero_extendqisi2
+	add	r3, r3, #1
+	cmp	r5, r4
+	beq	.L9
+	mov	r0, r3
+	pop	{r4, r5, pc}
+.L9:
+	cmp	r3, r2
+	bne	.L6
+	movs	r0, #0
+	pop	{r4, r5, pc}
+.L8:
+	movs	r0, #0
+	pop	{r4, r5, pc}
+.L11:
+	.align	2
+.L10:
+	.word	.LANCHOR0
+	.size	FlashMemCmp8, .-FlashMemCmp8
+	.section	.text.FlashRsvdBlkChk,"ax",%progbits
+	.align	1
+	.global	FlashRsvdBlkChk
+	.thumb
+	.thumb_func
+	.type	FlashRsvdBlkChk, %function
+FlashRsvdBlkChk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L15
+	ldr	r2, .L15+4
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	ldr	r2, [r2, #0]
+	muls	r3, r2, r3
+	cmp	r1, r3
+	bcs	.L14
+	adds	r0, r0, #0
+	it	ne
+	movne	r0, #1
+	bx	lr
+.L14:
+	movs	r0, #1
+	bx	lr
+.L16:
+	.align	2
+.L15:
+	.word	.LANCHOR1
+	.word	.LANCHOR2
+	.size	FlashRsvdBlkChk, .-FlashRsvdBlkChk
+	.section	.text.FlashGetRandomizer,"ax",%progbits
+	.align	1
+	.global	FlashGetRandomizer
+	.thumb
+	.thumb_func
+	.type	FlashGetRandomizer, %function
+FlashGetRandomizer:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L19
+	and	r2, r1, #127
+	push	{r4, lr}
+	ldrh	r4, [r3, r2, lsl #1]
+	ldr	r3, .L19+4
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L18
+	bl	FlashRsvdBlkChk
+	cbz	r0, .L18
+	orr	r4, r4, #-1073741824
+.L18:
+	mov	r0, r4
+	pop	{r4, pc}
+.L20:
+	.align	2
+.L19:
+	.word	.LANCHOR3
+	.word	.LANCHOR4
+	.size	FlashGetRandomizer, .-FlashGetRandomizer
+	.section	.text.FlashSetRandomizer,"ax",%progbits
+	.align	1
+	.global	FlashSetRandomizer
+	.thumb
+	.thumb_func
+	.type	FlashSetRandomizer, %function
+FlashSetRandomizer:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	and	r2, r1, #127
+	ldr	r3, .L23
+	mov	r5, r0
+	ldrh	r4, [r3, r2, lsl #1]
+	ldr	r3, .L23+4
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L22
+	bl	FlashRsvdBlkChk
+	cbz	r0, .L22
+	orr	r4, r4, #-1073741824
+.L22:
+	ldr	r3, .L23+8
+	ldr	r3, [r3, r5, lsl #3]
+	str	r4, [r3, #336]
+	pop	{r3, r4, r5, pc}
+.L24:
+	.align	2
+.L23:
+	.word	.LANCHOR3
+	.word	.LANCHOR4
+	.word	.LANCHOR5
+	.size	FlashSetRandomizer, .-FlashSetRandomizer
+	.section	.text.FlashReadCmd,"ax",%progbits
+	.align	1
+	.global	FlashReadCmd
+	.thumb
+	.thumb_func
+	.type	FlashReadCmd, %function
+FlashReadCmd:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	lsrs	r2, r1, #16
+	ldr	r4, .L26
+	mov	r5, r0
+	ldr	r6, [r4, r0, lsl #3]
+	add	r4, r4, r0, lsl #3
+	ldrb	r3, [r4, #4]	@ zero_extendqisi2
+	movs	r4, #0
+	adds	r3, r3, #8
+	add	r3, r6, r3, lsl #8
+	str	r4, [r3, #8]
+	str	r4, [r3, #4]
+	str	r4, [r3, #4]
+	uxtb	r4, r1
+	str	r4, [r3, #4]
+	lsrs	r4, r1, #8
+	str	r4, [r3, #4]
+	str	r2, [r3, #4]
+	movs	r2, #48
+	str	r2, [r3, #8]
+	pop	{r4, r5, r6, lr}
+	b	FlashSetRandomizer
+.L27:
+	.align	2
+.L26:
+	.word	.LANCHOR5
+	.size	FlashReadCmd, .-FlashReadCmd
+	.section	.text.FlashReadDpDataOutCmd,"ax",%progbits
+	.align	1
+	.global	FlashReadDpDataOutCmd
+	.thumb
+	.thumb_func
+	.type	FlashReadDpDataOutCmd, %function
+FlashReadDpDataOutCmd:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r2, .L32
+	push	{r4, lr}
+	ldr	r4, [r2, r0, lsl #3]
+	add	r2, r2, r0, lsl #3
+	ldrb	r3, [r2, #4]	@ zero_extendqisi2
+	ldr	r2, .L32+4
+	adds	r3, r3, #8
+	ldrb	r2, [r2, #16]	@ zero_extendqisi2
+	add	r3, r4, r3, lsl #8
+	cmp	r2, #1
+	mov	r2, #0
+	bne	.L29
+	movs	r4, #6
+	str	r4, [r3, #8]
+	str	r2, [r3, #4]
+	str	r2, [r3, #4]
+	uxtb	r2, r1
+	str	r2, [r3, #4]
+	lsrs	r2, r1, #8
+	str	r2, [r3, #4]
+	lsrs	r2, r1, #16
+	b	.L31
+.L29:
+	str	r2, [r3, #8]
+	uxtb	r4, r1
+	str	r2, [r3, #4]
+	str	r2, [r3, #4]
+	str	r4, [r3, #4]
+	lsrs	r4, r1, #8
+	str	r4, [r3, #4]
+	lsrs	r4, r1, #16
+	str	r4, [r3, #4]
+	movs	r4, #5
+	str	r4, [r3, #8]
+	str	r2, [r3, #4]
+.L31:
+	str	r2, [r3, #4]
+	movs	r2, #224
+	str	r2, [r3, #8]
+	pop	{r4, lr}
+	b	FlashSetRandomizer
+.L33:
+	.align	2
+.L32:
+	.word	.LANCHOR5
+	.word	.LANCHOR6
+	.size	FlashReadDpDataOutCmd, .-FlashReadDpDataOutCmd
+	.section	.text.flash_enter_slc_mode,"ax",%progbits
+	.align	1
+	.global	flash_enter_slc_mode
+	.thumb
+	.thumb_func
+	.type	flash_enter_slc_mode, %function
+flash_enter_slc_mode:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L36
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L34
+	ldr	r3, .L36+4
+	ldr	r2, [r3, r0, lsl #3]
+	add	r3, r3, r0, lsl #3
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+	adds	r3, r3, #8
+	add	r3, r2, r3, lsl #8
+	movs	r2, #218
+	str	r2, [r3, #8]
+.L34:
+	bx	lr
+.L37:
+	.align	2
+.L36:
+	.word	.LANCHOR7
+	.word	.LANCHOR5
+	.size	flash_enter_slc_mode, .-flash_enter_slc_mode
+	.section	.text.flash_exit_slc_mode,"ax",%progbits
+	.align	1
+	.global	flash_exit_slc_mode
+	.thumb
+	.thumb_func
+	.type	flash_exit_slc_mode, %function
+flash_exit_slc_mode:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L40
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L38
+	ldr	r3, .L40+4
+	ldr	r2, [r3, r0, lsl #3]
+	add	r3, r3, r0, lsl #3
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+	adds	r3, r3, #8
+	add	r3, r2, r3, lsl #8
+	movs	r2, #223
+	str	r2, [r3, #8]
+.L38:
+	bx	lr
+.L41:
+	.align	2
+.L40:
+	.word	.LANCHOR7
+	.word	.LANCHOR5
+	.size	flash_exit_slc_mode, .-flash_exit_slc_mode
+	.section	.text.FlashProgFirstCmd,"ax",%progbits
+	.align	1
+	.global	FlashProgFirstCmd
+	.thumb
+	.thumb_func
+	.type	FlashProgFirstCmd, %function
+FlashProgFirstCmd:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	lsrs	r2, r1, #16
+	ldr	r4, .L43
+	mov	r5, r0
+	ldr	r6, [r4, r0, lsl #3]
+	add	r4, r4, r0, lsl #3
+	ldrb	r3, [r4, #4]	@ zero_extendqisi2
+	movs	r4, #128
+	adds	r3, r3, #8
+	add	r3, r6, r3, lsl #8
+	str	r4, [r3, #8]
+	movs	r4, #0
+	str	r4, [r3, #4]
+	str	r4, [r3, #4]
+	uxtb	r4, r1
+	str	r4, [r3, #4]
+	lsrs	r4, r1, #8
+	str	r4, [r3, #4]
+	str	r2, [r3, #4]
+	pop	{r4, r5, r6, lr}
+	b	FlashSetRandomizer
+.L44:
+	.align	2
+.L43:
+	.word	.LANCHOR5
+	.size	FlashProgFirstCmd, .-FlashProgFirstCmd
+	.section	.text.FlashEraseCmd,"ax",%progbits
+	.align	1
+	.global	FlashEraseCmd
+	.thumb
+	.thumb_func
+	.type	FlashEraseCmd, %function
+FlashEraseCmd:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, lr}
+	ldr	r4, .L47
+	ldr	r5, [r4, r0, lsl #3]
+	add	r0, r4, r0, lsl #3
+	ldrb	r3, [r0, #4]	@ zero_extendqisi2
+	adds	r3, r3, #8
+	add	r3, r5, r3, lsl #8
+	cbz	r2, .L46
+	movs	r2, #96
+	str	r2, [r3, #8]
+	uxtb	r2, r1
+	str	r2, [r3, #4]
+	lsrs	r2, r1, #8
+	str	r2, [r3, #4]
+	lsrs	r2, r1, #16
+	str	r2, [r3, #4]
+	ldr	r2, .L47+4
+	ldr	r2, [r2, #0]
+	adds	r1, r1, r2
+.L46:
+	movs	r2, #96
+	str	r2, [r3, #8]
+	uxtb	r2, r1
+	str	r2, [r3, #4]
+	lsrs	r2, r1, #8
+	lsrs	r1, r1, #16
+	str	r2, [r3, #4]
+	movs	r2, #208
+	str	r1, [r3, #4]
+	str	r2, [r3, #8]
+	pop	{r4, r5, pc}
+.L48:
+	.align	2
+.L47:
+	.word	.LANCHOR5
+	.word	.LANCHOR2
+	.size	FlashEraseCmd, .-FlashEraseCmd
+	.section	.text.FlashProgDpSecondCmd,"ax",%progbits
+	.align	1
+	.global	FlashProgDpSecondCmd
+	.thumb
+	.thumb_func
+	.type	FlashProgDpSecondCmd, %function
+FlashProgDpSecondCmd:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	lsrs	r2, r1, #16
+	ldr	r4, .L50
+	mov	r5, r0
+	ldr	r6, [r4, r0, lsl #3]
+	add	r4, r4, r0, lsl #3
+	ldrb	r3, [r4, #4]	@ zero_extendqisi2
+	ldr	r4, .L50+4
+	adds	r3, r3, #8
+	ldrb	r4, [r4, #11]	@ zero_extendqisi2
+	add	r3, r6, r3, lsl #8
+	str	r4, [r3, #8]
+	movs	r4, #0
+	str	r4, [r3, #4]
+	str	r4, [r3, #4]
+	uxtb	r4, r1
+	str	r4, [r3, #4]
+	lsrs	r4, r1, #8
+	str	r4, [r3, #4]
+	str	r2, [r3, #4]
+	pop	{r4, r5, r6, lr}
+	b	FlashSetRandomizer
+.L51:
+	.align	2
+.L50:
+	.word	.LANCHOR5
+	.word	.LANCHOR6
+	.size	FlashProgDpSecondCmd, .-FlashProgDpSecondCmd
+	.section	.text.FlashProgSecondCmd,"ax",%progbits
+	.align	1
+	.global	FlashProgSecondCmd
+	.thumb
+	.thumb_func
+	.type	FlashProgSecondCmd, %function
+FlashProgSecondCmd:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L53
+	ldr	r2, [r3, r0, lsl #3]
+	add	r3, r3, r0, lsl #3
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+	adds	r3, r3, #8
+	add	r3, r2, r3, lsl #8
+	movs	r2, #16
+	str	r2, [r3, #8]
+	bx	lr
+.L54:
+	.align	2
+.L53:
+	.word	.LANCHOR5
+	.size	FlashProgSecondCmd, .-FlashProgSecondCmd
+	.section	.text.FlashProgDpFirstCmd,"ax",%progbits
+	.align	1
+	.global	FlashProgDpFirstCmd
+	.thumb
+	.thumb_func
+	.type	FlashProgDpFirstCmd, %function
+FlashProgDpFirstCmd:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L56
+	ldr	r2, [r3, r0, lsl #3]
+	add	r3, r3, r0, lsl #3
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+	adds	r3, r3, #8
+	add	r3, r2, r3, lsl #8
+	ldr	r2, .L56+4
+	ldrb	r2, [r2, #10]	@ zero_extendqisi2
+	str	r2, [r3, #8]
+	bx	lr
+.L57:
+	.align	2
+.L56:
+	.word	.LANCHOR5
+	.word	.LANCHOR6
+	.size	FlashProgDpFirstCmd, .-FlashProgDpFirstCmd
+	.section	.text.FlashReadStatus,"ax",%progbits
+	.align	1
+	.global	FlashReadStatus
+	.thumb
+	.thumb_func
+	.type	FlashReadStatus, %function
+FlashReadStatus:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	movs	r2, #112
+	ldr	r3, .L59
+	ldr	r5, [r3, r0, lsl #3]
+	add	r3, r3, r0, lsl #3
+	movs	r0, #80
+	ldrb	r4, [r3, #4]	@ zero_extendqisi2
+	adds	r4, r4, #8
+	lsls	r4, r4, #8
+	adds	r3, r5, r4
+	str	r2, [r3, #8]
+	bl	udelay
+	ldr	r0, [r5, r4]
+	pop	{r3, r4, r5, pc}
+.L60:
+	.align	2
+.L59:
+	.word	.LANCHOR5
+	.size	FlashReadStatus, .-FlashReadStatus
+	.section	.text.JSHash,"ax",%progbits
+	.align	1
+	.global	JSHash
+	.thumb
+	.thumb_func
+	.type	JSHash, %function
+JSHash:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	mov	r3, r0
+	movs	r2, #0
+	push	{r4, r5, lr}
+	ldr	r0, .L64
+	b	.L62
+.L63:
+	lsls	r4, r0, #5
+	ldrb	r5, [r3, r2]	@ zero_extendqisi2
+	add	r4, r4, r0, lsr #2
+	adds	r2, r2, #1
+	adds	r4, r4, r5
+	eors	r0, r0, r4
+.L62:
+	cmp	r2, r1
+	bne	.L63
+	pop	{r4, r5, pc}
+.L65:
+	.align	2
+.L64:
+	.word	1204201446
+	.size	JSHash, .-JSHash
+	.section	.text.FlashLoadIdbInfo,"ax",%progbits
+	.align	1
+	.global	FlashLoadIdbInfo
+	.thumb
+	.thumb_func
+	.type	FlashLoadIdbInfo, %function
+FlashLoadIdbInfo:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	movs	r0, #0
+	bx	lr
+	.size	FlashLoadIdbInfo, .-FlashLoadIdbInfo
+	.section	.text.BuildFlashLsbPageTable,"ax",%progbits
+	.align	1
+	.global	BuildFlashLsbPageTable
+	.thumb
+	.thumb_func
+	.type	BuildFlashLsbPageTable, %function
+BuildFlashLsbPageTable:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, lr}
+	mov	r4, r1
+	cbnz	r0, .L68
+	ldr	r3, .L107
+.L69:
+	strh	r0, [r3, #2]!	@ movhi
+	adds	r0, r0, #1
+	uxth	r0, r0
+	cmp	r0, #256
+	bne	.L69
+	b	.L70
+.L68:
+	cmp	r0, #1
+	bne	.L71
+	movs	r2, #0
+	ldr	r0, .L107+4
+	mov	r3, r2
+.L74:
+	uxth	r1, r3
+	cmp	r1, #3
+	bls	.L72
+	tst	r3, #1
+	ite	eq
+	moveq	r1, #2
+	movne	r1, #3
+	subs	r1, r2, r1
+	uxth	r1, r1
+.L72:
+	adds	r3, r3, #1
+	strh	r1, [r2, r0]	@ movhi
+	adds	r2, r2, #2
+	cmp	r3, #256
+	bne	.L74
+	b	.L70
+.L71:
+	cmp	r0, #2
+	bne	.L75
+	movs	r3, #0
+	ldr	r0, .L107
+	movw	r2, #65535
+	mov	r1, r3
+	b	.L106
+.L78:
+	cmp	r3, #1
+	ite	ls
+	movls	r1, r3
+	movhi	r1, r2
+.L106:
+	adds	r3, r3, #1
+	adds	r2, r2, #2
+	strh	r1, [r0, #2]!	@ movhi
+	uxth	r3, r3
+	uxth	r2, r2
+	cmp	r3, #256
+	bne	.L78
+	b	.L70
+.L75:
+	cmp	r0, #3
+	mov	r2, #0
+	bne	.L79
+	ldr	r0, .L107+4
+	mov	r3, r2
+.L82:
+	uxth	r1, r2
+	cmp	r1, #5
+	bls	.L80
+	tst	r2, #1
+	ite	eq
+	moveq	r1, #4
+	movne	r1, #5
+	subs	r1, r3, r1
+	uxth	r1, r1
+.L80:
+	adds	r2, r2, #1
+	strh	r1, [r3, r0]	@ movhi
+	adds	r3, r3, #2
+	cmp	r2, #256
+	bne	.L82
+	b	.L70
+.L79:
+	cmp	r0, #4
+	bne	.L83
+	ldr	r3, .L107+4
+	movs	r1, #16
+	strh	r2, [r3, #0]	@ movhi
+	movs	r2, #1
+	strh	r0, [r3, #8]	@ movhi
+	strh	r2, [r3, #2]	@ movhi
+	movs	r2, #2
+	strh	r2, [r3, #4]	@ movhi
+	movs	r2, #3
+	strh	r2, [r3, #6]	@ movhi
+	movs	r2, #5
+	strh	r2, [r3, #10]	@ movhi
+	movs	r2, #7
+	strh	r2, [r3, #12]	@ movhi
+	movs	r2, #8
+	strh	r2, [r3, #14]!	@ movhi
+.L85:
+	tst	r2, #1
+	ite	eq
+	moveq	r0, #6
+	movne	r0, #7
+	adds	r2, r2, #1
+	subs	r0, r1, r0
+	adds	r1, r1, #2
+	cmp	r2, #256
+	strh	r0, [r3, #2]!	@ movhi
+	uxth	r1, r1
+	bne	.L85
+	b	.L70
+.L83:
+	cmp	r0, #5
+	bne	.L86
+	ldr	r1, .L107
+	mov	r3, r2
+.L87:
+	strh	r3, [r1, #2]!	@ movhi
+	adds	r3, r3, #1
+	uxth	r3, r3
+	cmp	r3, #16
+	bne	.L87
+	ldr	r2, .L107+8
+.L88:
+	strh	r3, [r2, #2]!	@ movhi
+	adds	r3, r3, #2
+	uxth	r3, r3
+	cmp	r3, #496
+	bne	.L88
+	b	.L70
+.L86:
+	cmp	r0, #6
+	bne	.L70
+	ldr	r0, .L107
+	mov	r3, r2
+.L91:
+	uxth	r1, r3
+	cmp	r1, #5
+	bls	.L89
+	tst	r3, #1
+	ite	eq
+	moveq	r1, #10
+	movne	r1, #12
+	subs	r1, r2, r1
+	uxth	r1, r1
+.L89:
+	adds	r3, r3, #1
+	adds	r2, r2, #3
+	cmp	r3, #256
+	strh	r1, [r0, #2]!	@ movhi
+	uxth	r2, r2
+	bne	.L91
+.L70:
+	mov	r2, #1024
+	ldr	r0, .L107+12
+	movs	r1, #255
+	uxth	r4, r4
+	bl	memset
+	ldr	r2, .L107
+	movs	r3, #0
+	ldr	r0, .L107+12
+	b	.L92
+.L93:
+	adds	r3, r3, #1
+	ldrh	r1, [r2, #2]!
+	uxth	r3, r3
+	strh	r1, [r0, r1, lsl #1]	@ movhi
+.L92:
+	cmp	r3, r4
+	bcc	.L93
+	pop	{r4, pc}
+.L108:
+	.align	2
+.L107:
+	.word	.LANCHOR8-2
+	.word	.LANCHOR8
+	.word	.LANCHOR8+30
+	.word	.LANCHOR9
+	.size	BuildFlashLsbPageTable, .-BuildFlashLsbPageTable
+	.section	.text.FlashPrintInfo,"ax",%progbits
+	.align	1
+	.global	FlashPrintInfo
+	.thumb
+	.thumb_func
+	.type	FlashPrintInfo, %function
+FlashPrintInfo:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	FlashPrintInfo, .-FlashPrintInfo
+	.section	.text.ToshibaSetRRPara,"ax",%progbits
+	.align	1
+	.global	ToshibaSetRRPara
+	.thumb
+	.thumb_func
+	.type	ToshibaSetRRPara, %function
+ToshibaSetRRPara:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, r8, sl, lr}
+	add	r7, r1, r1, lsl #2
+	ldr	r3, .L118
+	mov	r4, r0
+	mov	r6, r1
+	movs	r5, #0
+	add	sl, r3, r7
+	b	.L111
+.L115:
+	ldr	r8, .L118+16
+	movs	r3, #85
+	str	r3, [r4, #8]
+	movs	r0, #200
+	ldrsb	r3, [r5, r8]
+	str	r3, [r4, #4]
+	bl	udelay
+	ldr	r3, .L118+4
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cmp	r3, #34
+	bne	.L112
+	add	r8, r8, r7
+	add	r3, r8, r5
+	b	.L117
+.L112:
+	cmp	r3, #35
+	bne	.L114
+	add	r3, sl, r5
+.L117:
+	ldrsb	r3, [r3, #5]
+	b	.L116
+.L114:
+	ldr	r3, .L118+8
+	ldrsb	r3, [r3, r6]
+.L116:
+	adds	r5, r5, #1
+	str	r3, [r4, #0]
+.L111:
+	ldr	r3, .L118+12
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cmp	r5, r3
+	bcc	.L115
+	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
+.L119:
+	.align	2
+.L118:
+	.word	.LANCHOR12
+	.word	.LANCHOR11
+	.word	.LANCHOR13
+	.word	.LANCHOR14
+	.word	.LANCHOR10
+	.size	ToshibaSetRRPara, .-ToshibaSetRRPara
+	.section	.text.SamsungSetRRPara,"ax",%progbits
+	.align	1
+	.global	SamsungSetRRPara
+	.thumb
+	.thumb_func
+	.type	SamsungSetRRPara, %function
+SamsungSetRRPara:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r5, r0
+	ldr	r6, .L123
+	movs	r4, #0
+	ldr	r7, .L123+4
+	add	r8, r6, r1, lsl #2
+	b	.L121
+.L122:
+	movs	r3, #161
+	str	r3, [r5, #8]
+	movs	r3, #0
+	str	r3, [r5, #0]
+	ldrsb	r3, [r4, r6]
+	mov	r0, #300
+	str	r3, [r5, #0]
+	add	r3, r8, r4
+	adds	r4, r4, #1
+	ldrsb	r3, [r3, #4]
+	str	r3, [r5, #0]
+	bl	udelay
+.L121:
+	ldrb	r3, [r7, #0]	@ zero_extendqisi2
+	cmp	r4, r3
+	bcc	.L122
+	pop	{r4, r5, r6, r7, r8, pc}
+.L124:
+	.align	2
+.L123:
+	.word	.LANCHOR15
+	.word	.LANCHOR14
+	.size	SamsungSetRRPara, .-SamsungSetRRPara
+	.section	.text.FlashDieInfoInit,"ax",%progbits
+	.align	1
+	.global	FlashDieInfoInit
+	.thumb
+	.thumb_func
+	.type	FlashDieInfoInit, %function
+FlashDieInfoInit:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r2, .L137
+	movs	r3, #0
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	strb	r3, [r2, #0]
+	ldr	r2, .L137+4
+	strb	r3, [r2, #0]
+	ldr	r3, .L137+8
+	ldrh	r2, [r3, #10]
+	ldr	r3, .L137+12
+	cmp	r2, #256
+	str	r2, [r3, #0]
+	bls	.L126
+	mov	r2, #512
+	b	.L136
+.L126:
+	cmp	r2, #128
+	bls	.L127
+	mov	r2, #256
+.L136:
+	str	r2, [r3, #0]
+.L127:
+	movs	r1, #0
+	movs	r2, #8
+	ldr	r0, .L137+16
+	movs	r5, #0
+	bl	memset
+	movs	r1, #0
+	movs	r2, #32
+	ldr	r0, .L137+20
+	bl	memset
+	ldr	r6, .L137+24
+	ldr	r0, .L137+28
+	movs	r1, #0
+	movs	r2, #128
+	ldr	sl, .L137+36
+	bl	memset
+	ldr	r8, .L137
+	ldr	r3, .L137+20
+	mov	r7, r6
+.L129:
+	ldr	r4, [sl, #0]
+	mov	r1, r7
+	mov	r0, r4
+	ldrb	fp, [r0], #1	@ zero_extendqisi2
+	str	r3, [sp, #4]
+	mov	r2, fp
+	bl	FlashMemCmp8
+	ldr	r3, [sp, #4]
+	cbnz	r0, .L128
+	ldrb	r2, [r8, #0]	@ zero_extendqisi2
+	ldr	r1, .L137+16
+	str	r0, [r3, r2, lsl #2]
+	strb	r5, [r1, r2]
+	adds	r2, r2, #1
+	strb	r2, [r8, #0]
+.L128:
+	adds	r5, r5, #1
+	adds	r7, r7, #8
+	cmp	r5, #4
+	bne	.L129
+	ldr	r2, .L137
+	ldr	r3, .L137+4
+	ldrb	r1, [r2, #0]	@ zero_extendqisi2
+	strb	r1, [r3, #0]
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	cmp	r3, #2
+	bne	.L130
+	ldr	r7, .L137+20
+	movs	r5, #0
+	ldr	r8, .L137+12
+	adds	r3, r4, #1
+	mov	sl, r2
+.L133:
+	mov	r0, r3
+	mov	r1, r6
+	mov	r2, fp
+	str	r3, [sp, #4]
+	bl	FlashMemCmp8
+	ldr	r3, [sp, #4]
+	cbnz	r0, .L131
+	ldrb	r2, [sl, #0]	@ zero_extendqisi2
+	ldrb	r1, [r4, #13]	@ zero_extendqisi2
+	ldr	r0, [r8, #0]
+	muls	r0, r1, r0
+	ldrh	r1, [r4, #14]
+	and	r1, r1, #65280
+	muls	r1, r0, r1
+	str	r1, [r7, r2, lsl #2]
+	ldrb	r0, [r4, #23]	@ zero_extendqisi2
+	cbz	r0, .L132
+	lsls	r1, r1, #1
+	str	r1, [r7, r2, lsl #2]
+.L132:
+	ldr	r1, .L137+16
+	strb	r5, [r1, r2]
+	adds	r2, r2, #1
+	ldr	r1, .L137
+	strb	r2, [r1, #0]
+.L131:
+	adds	r5, r5, #1
+	adds	r6, r6, #8
+	cmp	r5, #4
+	bne	.L133
+.L130:
+	ldr	r3, .L137
+	ldrb	r2, [r4, #13]	@ zero_extendqisi2
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	muls	r2, r3, r2
+	ldrh	r3, [r4, #14]
+	muls	r2, r3, r2
+	ldr	r3, .L137+32
+	strh	r2, [r3, #0]	@ movhi
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L138:
+	.align	2
+.L137:
+	.word	.LANCHOR16
+	.word	.LANCHOR17
+	.word	.LANCHOR18
+	.word	.LANCHOR2
+	.word	.LANCHOR19
+	.word	.LANCHOR20
+	.word	.LANCHOR22
+	.word	.LANCHOR21
+	.word	.LANCHOR24
+	.word	.LANCHOR23
+	.size	FlashDieInfoInit, .-FlashDieInfoInit
+	.section	.text.FlashReadIdbData,"ax",%progbits
+	.align	1
+	.global	FlashReadIdbData
+	.thumb
+	.thumb_func
+	.type	FlashReadIdbData, %function
+FlashReadIdbData:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	mov	r2, #2048
+	ldr	r1, .L140
+	bl	memcpy
+	movs	r0, #0
+	pop	{r3, pc}
+.L141:
+	.align	2
+.L140:
+	.word	.LANCHOR25
+	.size	FlashReadIdbData, .-FlashReadIdbData
+	.section	.text.FlashLoadPhyInfoInRam,"ax",%progbits
+	.align	1
+	.global	FlashLoadPhyInfoInRam
+	.thumb
+	.thumb_func
+	.type	FlashLoadPhyInfoInRam, %function
+FlashLoadPhyInfoInRam:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	movs	r5, #0
+	ldr	r6, .L154
+.L146:
+	lsls	r3, r5, #5
+	ldr	r1, .L154+4
+	adds	r4, r6, r3
+	adds	r0, r4, #1
+	ldrb	r2, [r6, r3]	@ zero_extendqisi2
+	bl	FlashMemCmp8
+	cbnz	r0, .L143
+	cbnz	r4, .L152
+	b	.L153
+.L143:
+	adds	r5, r5, #1
+	cmp	r5, #72
+	bne	.L146
+	mov	r0, #-1
+	pop	{r4, r5, r6, pc}
+.L152:
+	ldrb	r2, [r4, #22]	@ zero_extendqisi2
+	mov	r1, r0
+	ldr	r3, .L154+8
+.L148:
+	lsls	r0, r1, #5
+	ldrb	r0, [r0, r3]	@ zero_extendqisi2
+	cmp	r0, r2
+	beq	.L147
+	adds	r1, r1, #1
+	cmp	r1, #4
+	bne	.L148
+.L147:
+	ldr	r3, .L154+8
+	movs	r2, #32
+	ldr	r0, .L154+12
+	add	r1, r3, r1, lsl #5
+	bl	memcpy
+	ldr	r0, .L154+16
+	mov	r1, r4
+	movs	r2, #32
+	bl	memcpy
+	movs	r0, #0
+	pop	{r4, r5, r6, pc}
+.L153:
+	mov	r0, #-1
+	pop	{r4, r5, r6, pc}
+.L155:
+	.align	2
+.L154:
+	.word	.LANCHOR26
+	.word	.LANCHOR22
+	.word	.LANCHOR27
+	.word	.LANCHOR6
+	.word	.LANCHOR18
+	.size	FlashLoadPhyInfoInRam, .-FlashLoadPhyInfoInRam
+	.global	__aeabi_uidiv
+	.section	.text.LogAddr2PhyAddr,"ax",%progbits
+	.align	1
+	.global	LogAddr2PhyAddr
+	.thumb
+	.thumb_func
+	.type	LogAddr2PhyAddr, %function
+LogAddr2PhyAddr:
+	@ args = 4, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	fp, r3
+	ldr	r3, .L161
+	mov	r5, r2
+	mov	r4, r0
+	mov	ip, r1
+	ldrh	r2, [r3, #12]
+	ldrh	r8, [r3, #14]
+	ldr	r3, .L161+4
+	mul	r8, r8, r2
+	ldrh	r6, [r3, #0]
+	ldr	r3, .L161+8
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	uxth	r8, r8
+	cmp	r3, #1
+	bne	.L157
+	lsls	r6, r6, #1
+	uxth	r6, r6
+.L157:
+	ldr	r7, [r4, #4]
+	mov	r1, r8
+	str	ip, [sp, #4]
+	bic	r7, r7, #-2147483648
+	ubfx	sl, r7, #10, #16
+	mov	r0, sl
+	lsls	r7, r7, #22
+	bl	__aeabi_uidiv
+	ldr	ip, [sp, #4]
+	lsrs	r7, r7, #22
+	cmp	ip, #1
+	uxth	r0, r0
+	mls	r8, r8, r0, sl
+	uxth	r8, r8
+	bne	.L158
+	ldr	r3, .L161+12
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbnz	r3, .L158
+	ldr	r3, .L161+16
+	ldrh	r7, [r3, r7, lsl #1]
+.L158:
+	ldr	r3, .L161+20
+	ldr	r3, [r3, r0, lsl #2]
+	mla	r6, r6, r8, r3
+	ldrb	r3, [sp, #40]	@ zero_extendqisi2
+	cmp	r3, #1
+	add	r7, r6, r7
+	str	r7, [r5, #0]
+	str	r0, [fp, #0]
+	bls	.L160
+	ldr	r0, [r4, #4]
+	ldr	r3, [r4, #40]
+	add	r0, r0, #1024
+	subs	r3, r0, r3
+	rsbs	r0, r3, #0
+	adc	r0, r0, r3
+	b	.L159
+.L160:
+	movs	r0, #0
+.L159:
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L162:
+	.align	2
+.L161:
+	.word	.LANCHOR28
+	.word	.LANCHOR2
+	.word	.LANCHOR0
+	.word	.LANCHOR7
+	.word	.LANCHOR8
+	.word	.LANCHOR20
+	.size	LogAddr2PhyAddr, .-LogAddr2PhyAddr
+	.section	.text.FlashReadStatusEN,"ax",%progbits
+	.align	1
+	.global	FlashReadStatusEN
+	.thumb
+	.thumb_func
+	.type	FlashReadStatusEN, %function
+FlashReadStatusEN:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L172
+	push	{r4, r5, r6, lr}
+	ldr	r5, [r3, r0, lsl #3]
+	add	r0, r3, r0, lsl #3
+	ldrb	r4, [r0, #4]	@ zero_extendqisi2
+	ldr	r0, .L172+4
+	adds	r4, r4, #8
+	ldr	r0, [r0, #0]
+	lsls	r4, r4, #8
+	adds	r3, r5, r4
+	ldrb	r0, [r0, #8]	@ zero_extendqisi2
+	cmp	r0, #2
+	bne	.L164
+	ldr	r0, .L172+8
+	cbnz	r2, .L165
+	ldrb	r2, [r0, #13]	@ zero_extendqisi2
+	b	.L171
+.L165:
+	ldrb	r2, [r0, #14]	@ zero_extendqisi2
+.L171:
+	str	r2, [r3, #8]
+	ldrb	r0, [r0, #15]	@ zero_extendqisi2
+	cbnz	r0, .L170
+	b	.L168
+.L169:
+	lsls	r6, r2, #3
+	adds	r2, r2, #1
+	lsr	r6, r1, r6
+	uxtb	r6, r6
+	str	r6, [r3, #4]
+	b	.L167
+.L170:
+	movs	r2, #0
+.L167:
+	cmp	r2, r0
+	bcc	.L169
+	b	.L168
+.L164:
+	movs	r2, #112
+	str	r2, [r3, #8]
+.L168:
+	movs	r0, #80
+	bl	udelay
+	ldr	r0, [r5, r4]
+	uxtb	r0, r0
+	pop	{r4, r5, r6, pc}
+.L173:
+	.align	2
+.L172:
+	.word	.LANCHOR5
+	.word	.LANCHOR23
+	.word	.LANCHOR6
+	.size	FlashReadStatusEN, .-FlashReadStatusEN
+	.section	.text.FlashWaitReadyEN,"ax",%progbits
+	.align	1
+	.global	FlashWaitReadyEN
+	.thumb
+	.thumb_func
+	.type	FlashWaitReadyEN, %function
+FlashWaitReadyEN:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	mov	r6, r0
+	mov	r5, r1
+	mov	r4, r2
+.L178:
+	mov	r0, r6
+	mov	r1, r5
+	mov	r2, r4
+	bl	FlashReadStatusEN
+	cmp	r0, #255
+	beq	.L178
+	lsls	r2, r0, #25
+	bpl	.L178
+	pop	{r4, r5, r6, pc}
+	.size	FlashWaitReadyEN, .-FlashWaitReadyEN
+	.section	.text.ReadFlashInfo,"ax",%progbits
+	.align	1
+	.global	ReadFlashInfo
+	.thumb
+	.thumb_func
+	.type	ReadFlashInfo, %function
+ReadFlashInfo:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	movs	r1, #0
+	movs	r2, #11
+	mov	r4, r0
+	bl	memset
+	ldr	r3, .L182
+	ldr	r1, .L182+4
+	ldr	r3, [r3, #0]
+	ldr	r1, [r1, #0]
+	ldrb	r2, [r3, #9]	@ zero_extendqisi2
+	muls	r2, r1, r2
+	uxth	r2, r2
+	strb	r2, [r4, #4]
+	movs	r1, #0
+	lsrs	r0, r2, #8
+	strb	r0, [r4, #5]
+	ldr	r0, .L182+8
+	ldrb	r0, [r0, #0]	@ zero_extendqisi2
+	strb	r0, [r4, #7]
+	ldrb	r0, [r3, #13]	@ zero_extendqisi2
+	muls	r2, r0, r2
+	ldrh	r0, [r3, #14]
+	muls	r2, r0, r2
+	ldrb	r0, [r3, #8]	@ zero_extendqisi2
+	muls	r2, r0, r2
+	strb	r2, [r4, #0]
+	ubfx	r0, r2, #8, #8
+	strb	r0, [r4, #1]
+	ubfx	r0, r2, #16, #8
+	lsrs	r2, r2, #24
+	strb	r0, [r4, #2]
+	strb	r2, [r4, #3]
+	ldrb	r2, [r3, #9]	@ zero_extendqisi2
+	strb	r2, [r4, #6]
+	movs	r2, #32
+	strb	r2, [r4, #8]
+	movs	r2, #1
+	ldrb	r3, [r3, #7]	@ zero_extendqisi2
+	strb	r1, [r4, #10]
+	strb	r3, [r4, #9]
+	ldr	r3, .L182+12
+	ldrb	r0, [r3, #0]	@ zero_extendqisi2
+	mov	r3, r1
+	ldr	r1, .L182+16
+	b	.L180
+.L181:
+	ldrb	r5, [r3, r1]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	ldrb	r6, [r4, #10]	@ zero_extendqisi2
+	lsl	r5, r2, r5
+	orrs	r5, r5, r6
+	strb	r5, [r4, #10]
+.L180:
+	uxtb	r5, r3
+	cmp	r5, r0
+	bcc	.L181
+	pop	{r4, r5, r6, pc}
+.L183:
+	.align	2
+.L182:
+	.word	.LANCHOR23
+	.word	.LANCHOR2
+	.word	.LANCHOR29
+	.word	.LANCHOR16
+	.word	.LANCHOR19
+	.size	ReadFlashInfo, .-ReadFlashInfo
+	.section	.text.NandcReadDontCaseBusyEn,"ax",%progbits
+	.align	1
+	.global	NandcReadDontCaseBusyEn
+	.thumb
+	.thumb_func
+	.type	NandcReadDontCaseBusyEn, %function
+NandcReadDontCaseBusyEn:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	NandcReadDontCaseBusyEn, .-NandcReadDontCaseBusyEn
+	.section	.text.NandcGetChipIf,"ax",%progbits
+	.align	1
+	.global	NandcGetChipIf
+	.thumb
+	.thumb_func
+	.type	NandcGetChipIf, %function
+NandcGetChipIf:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L186
+	ldr	r2, [r3, r0, lsl #3]
+	add	r3, r3, r0, lsl #3
+	ldrb	r0, [r3, #4]	@ zero_extendqisi2
+	adds	r0, r0, #8
+	add	r0, r2, r0, lsl #8
+	bx	lr
+.L187:
+	.align	2
+.L186:
+	.word	.LANCHOR5
+	.size	NandcGetChipIf, .-NandcGetChipIf
+	.section	.text.NandcSetDdrPara,"ax",%progbits
+	.align	1
+	.global	NandcSetDdrPara
+	.thumb
+	.thumb_func
+	.type	NandcSetDdrPara, %function
+NandcSetDdrPara:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L189
+	lsls	r2, r0, #8
+	orr	r2, r2, r0, lsl #16
+	orr	r2, r2, #1
+	ldr	r3, [r3, #0]
+	str	r2, [r3, #304]
+	bx	lr
+.L190:
+	.align	2
+.L189:
+	.word	.LANCHOR30
+	.size	NandcSetDdrPara, .-NandcSetDdrPara
+	.section	.text.NandcSetDdrDiv,"ax",%progbits
+	.align	1
+	.global	NandcSetDdrDiv
+	.thumb
+	.thumb_func
+	.type	NandcSetDdrDiv, %function
+NandcSetDdrDiv:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L192
+	orr	r0, r0, #16640
+	ldr	r3, [r3, #0]
+	str	r0, [r3, #344]
+	bx	lr
+.L193:
+	.align	2
+.L192:
+	.word	.LANCHOR30
+	.size	NandcSetDdrDiv, .-NandcSetDdrDiv
+	.section	.text.NandcSetDdrMode,"ax",%progbits
+	.align	1
+	.global	NandcSetDdrMode
+	.thumb
+	.thumb_func
+	.type	NandcSetDdrMode, %function
+NandcSetDdrMode:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L196
+	ldr	r2, [r3, #0]
+	ldr	r3, [r2, #0]
+	bfc	r3, #13, #1
+	cbz	r0, .L195
+	orr	r3, r3, #253952
+.L195:
+	str	r3, [r2, #0]
+	bx	lr
+.L197:
+	.align	2
+.L196:
+	.word	.LANCHOR30
+	.size	NandcSetDdrMode, .-NandcSetDdrMode
+	.section	.text.NandcSetMode,"ax",%progbits
+	.align	1
+	.global	NandcSetMode
+	.thumb
+	.thumb_func
+	.type	NandcSetMode, %function
+NandcSetMode:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L202
+	ands	r1, r0, #6
+	ldr	r2, [r3, #0]
+	ldr	r3, [r2, #0]
+	beq	.L199
+	lsls	r1, r0, #29
+	orr	r3, r3, #24576
+	movw	r1, #16641
+	str	r1, [r2, #344]
+	ldr	r1, .L202+4
+	bfc	r3, #15, #1
+	orr	r3, r3, #196608
+	it	mi
+	orrmi	r3, r3, #32768
+	str	r1, [r2, #304]
+	movs	r1, #38
+	str	r1, [r2, #308]
+	movs	r1, #39
+	str	r1, [r2, #308]
+	b	.L201
+.L199:
+	bfi	r3, r1, #13, #1
+.L201:
+	str	r3, [r2, #0]
+	movs	r0, #0
+	bx	lr
+.L203:
+	.align	2
+.L202:
+	.word	.LANCHOR30
+	.word	1710595
+	.size	NandcSetMode, .-NandcSetMode
+	.section	.text.NandcFlashCs,"ax",%progbits
+	.align	1
+	.global	NandcFlashCs
+	.thumb
+	.thumb_func
+	.type	NandcFlashCs, %function
+NandcFlashCs:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r2, .L205
+	ldr	r3, [r2, r0, lsl #3]
+	add	r2, r2, r0, lsl #3
+	movs	r0, #1
+	ldrb	r1, [r2, #4]	@ zero_extendqisi2
+	ldr	r2, [r3, #0]
+	lsl	r1, r0, r1
+	bfi	r2, r1, #0, #8
+	str	r2, [r3, #0]
+	bx	lr
+.L206:
+	.align	2
+.L205:
+	.word	.LANCHOR5
+	.size	NandcFlashCs, .-NandcFlashCs
+	.section	.text.NandcFlashDeCs,"ax",%progbits
+	.align	1
+	.global	NandcFlashDeCs
+	.thumb
+	.thumb_func
+	.type	NandcFlashDeCs, %function
+NandcFlashDeCs:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L208
+	ldr	r2, [r3, r0, lsl #3]
+	ldr	r3, [r2, #0]
+	bfc	r3, #0, #8
+	bfc	r3, #17, #1
+	str	r3, [r2, #0]
+	bx	lr
+.L209:
+	.align	2
+.L208:
+	.word	.LANCHOR5
+	.size	NandcFlashDeCs, .-NandcFlashDeCs
+	.section	.text.FlashWaitCmdDone,"ax",%progbits
+	.align	1
+	.global	FlashWaitCmdDone
+	.thumb
+	.thumb_func
+	.type	FlashWaitCmdDone, %function
+FlashWaitCmdDone:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r2, .L213
+	lsls	r3, r0, #4
+	push	{r4, r5, r6, lr}
+	adds	r4, r2, r3
+	ldrb	r5, [r2, r3]	@ zero_extendqisi2
+	mov	r6, r0
+	ldr	r3, [r4, #8]
+	cbz	r3, .L211
+	mov	r0, r5
+	bl	NandcFlashCs
+	ldr	r3, .L213+4
+	ldr	r1, [r4, #4]
+	mov	r0, r5
+	ldr	r2, [r3, r6, lsl #2]
+	adds	r2, r2, #0
+	it	ne
+	movne	r2, #1
+	bl	FlashWaitReadyEN
+	mov	r6, r0
+	mov	r0, r5
+	bl	NandcFlashDeCs
+	ldr	r3, [r4, #8]
+	ldr	r2, [r4, #12]
+	ands	r6, r6, #1
+	it	ne
+	movne	r6, #-1
+	str	r6, [r3, #0]
+	movs	r3, #0
+	str	r3, [r4, #8]
+	cbz	r2, .L211
+	str	r6, [r2, #0]
+	str	r3, [r4, #12]
+.L211:
+	movs	r0, #0
+	pop	{r4, r5, r6, pc}
+.L214:
+	.align	2
+.L213:
+	.word	.LANCHOR21
+	.word	.LANCHOR20
+	.size	FlashWaitCmdDone, .-FlashWaitCmdDone
+	.section	.text.HynixSetRRPara,"ax",%progbits
+	.align	1
+	.global	HynixSetRRPara
+	.thumb
+	.thumb_func
+	.type	HynixSetRRPara, %function
+HynixSetRRPara:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r8, r3
+	ldr	r3, .L221
+	mov	r4, r0
+	mov	r5, r1
+	mov	r6, r2
+	sxth	fp, r0
+	ldr	r3, [r3, #0]
+	ldrb	r3, [r3, #19]	@ zero_extendqisi2
+	cmp	r3, #6
+	bne	.L216
+	ldr	r3, .L221+4
+	add	fp, r3, fp, lsl #6
+	add	fp, fp, r8, lsl #2
+	b	.L217
+.L216:
+	cmp	r3, #7
+	bne	.L218
+	lsl	r3, fp, #7
+	add	fp, r3, fp, lsl #5
+	ldr	r3, .L221+8
+	add	fp, r3, fp
+	sxth	r3, r8
+	lsls	r2, r3, #3
+	add	r3, r2, r3, lsl #1
+	add	fp, fp, r3
+	b	.L217
+.L218:
+	add	fp, r8, fp, lsl #3
+	ldr	r3, .L221+4
+	add	fp, r3, fp, lsl #3
+.L217:
+	ldr	r3, .L221+12
+	mov	r0, r4
+	movs	r7, #0
+	ldr	r2, [r3, r4, lsl #3]
+	add	r3, r3, r4, lsl #3
+	ldrb	sl, [r3, #4]	@ zero_extendqisi2
+	add	sl, sl, #8
+	add	sl, r2, sl, lsl #8
+	bl	NandcFlashCs
+	movs	r3, #54
+	str	r3, [sl, #8]
+	b	.L219
+.L220:
+	ldrb	r3, [r6, r7]	@ zero_extendqisi2
+	movs	r0, #200
+	str	r3, [sl, #4]
+	bl	udelay
+	ldrsb	r3, [fp, r7]
+	adds	r7, r7, #1
+	str	r3, [sl, #0]
+.L219:
+	uxtb	r3, r7
+	cmp	r3, r5
+	bcc	.L220
+	movs	r3, #22
+	mov	r0, r4
+	str	r3, [sl, #8]
+	bl	NandcFlashDeCs
+	ldr	r3, .L221+16
+	strb	r8, [r3, r4]
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L222:
+	.align	2
+.L221:
+	.word	.LANCHOR23
+	.word	.LANCHOR31+20
+	.word	.LANCHOR31+28
+	.word	.LANCHOR5
+	.word	.LANCHOR32
+	.size	HynixSetRRPara, .-HynixSetRRPara
+	.section	.text.FlashSetReadRetryDefault,"ax",%progbits
+	.align	1
+	.global	FlashSetReadRetryDefault
+	.thumb
+	.thumb_func
+	.type	FlashSetReadRetryDefault, %function
+FlashSetReadRetryDefault:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L228
+	push	{r4, r5, r6, lr}
+	ldr	r3, [r3, #0]
+	ldrb	r3, [r3, #19]	@ zero_extendqisi2
+	subs	r3, r3, #1
+	cmp	r3, #6
+	bhi	.L223
+	ldr	r6, .L228+4
+	movs	r4, #0
+	ldr	r5, .L228+8
+.L226:
+	ldrb	r3, [r6, r4, lsl #3]	@ zero_extendqisi2
+	uxtb	r0, r4
+	cmp	r3, #173
+	bne	.L225
+	ldrb	r1, [r5, #1]	@ zero_extendqisi2
+	movs	r3, #0
+	ldr	r2, .L228+12
+	bl	HynixSetRRPara
+.L225:
+	adds	r4, r4, #1
+	cmp	r4, #4
+	bne	.L226
+.L223:
+	pop	{r4, r5, r6, pc}
+.L229:
+	.align	2
+.L228:
+	.word	.LANCHOR23
+	.word	.LANCHOR22
+	.word	.LANCHOR31
+	.word	.LANCHOR31+4
+	.size	FlashSetReadRetryDefault, .-FlashSetReadRetryDefault
+	.section	.text.NandcDelayns,"ax",%progbits
+	.align	1
+	.global	NandcDelayns
+	.thumb
+	.thumb_func
+	.type	NandcDelayns, %function
+NandcDelayns:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	bl	udelay
+	movs	r0, #0
+	pop	{r3, pc}
+	.size	NandcDelayns, .-NandcDelayns
+	.section	.text.NandcWaitFlashReady,"ax",%progbits
+	.align	1
+	.global	NandcWaitFlashReady
+	.thumb
+	.thumb_func
+	.type	NandcWaitFlashReady, %function
+NandcWaitFlashReady:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L236
+	push	{r0, r1, r2, r4, r5, lr}
+	ldr	r5, [r3, r0, lsl #3]
+	ldr	r4, .L236+4
+.L233:
+	movs	r0, #100
+	bl	udelay
+	ldr	r3, [r5, #0]
+	str	r3, [sp, #4]
+	ldr	r3, [sp, #4]
+	lsls	r0, r3, #22
+	bmi	.L234
+	subs	r4, r4, #1
+	bne	.L233
+	mov	r0, #-1
+	b	.L232
+.L234:
+	movs	r0, #0
+.L232:
+	pop	{r1, r2, r3, r4, r5, pc}
+.L237:
+	.align	2
+.L236:
+	.word	.LANCHOR5
+	.word	100000
+	.size	NandcWaitFlashReady, .-NandcWaitFlashReady
+	.section	.text.FlashEraseSLc2KBlocks,"ax",%progbits
+	.align	1
+	.global	FlashEraseSLc2KBlocks
+	.thumb
+	.thumb_func
+	.type	FlashEraseSLc2KBlocks, %function
+FlashEraseSLc2KBlocks:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r6, r1
+	mov	r4, r0
+	movs	r5, #0
+	ldr	r7, .L246
+	ldr	sl, .L246+12
+	ldr	fp, .L246+16
+	b	.L239
+.L245:
+	subs	r3, r6, r5
+	movs	r1, #0
+	add	r2, sp, #8
+	mov	r0, r4
+	uxtb	r3, r3
+	str	r3, [sp, #0]
+	add	r3, sp, #12
+	bl	LogAddr2PhyAddr
+	ldr	r3, [sp, #12]
+	ldrb	r2, [r7, #0]	@ zero_extendqisi2
+	cmp	r3, r2
+	bcc	.L240
+	mov	r3, #-1
+	str	r3, [r4, #0]
+	b	.L241
+.L240:
+	ldrb	r8, [sl, r3]	@ zero_extendqisi2
+	lsls	r3, r3, #4
+	mov	r0, r8
+	strb	r8, [fp, r3]
+	bl	NandcWaitFlashReady
+	mov	r0, r8
+	bl	NandcFlashCs
+	movs	r2, #0
+	ldr	r1, [sp, #8]
+	mov	r0, r8
+	bl	FlashEraseCmd
+	mov	r0, r8
+	bl	NandcWaitFlashReady
+	ldr	r1, [sp, #8]
+	mov	r0, r8
+	bl	FlashReadStatus
+	ldr	r3, .L246+4
+	ldr	r1, [r3, #0]
+	ldr	r3, [sp, #8]
+	adds	r1, r1, r3
+	ands	r0, r0, #1
+	it	ne
+	movne	r0, #-1
+	movs	r2, #0
+	str	r0, [r4, #0]
+	mov	r0, r8
+	bl	FlashEraseCmd
+	mov	r0, r8
+	bl	NandcWaitFlashReady
+	mov	r0, r8
+	ldr	r1, [sp, #8]
+	bl	FlashReadStatus
+	lsls	r3, r0, #31
+	itt	mi
+	movmi	r3, #-1
+	strmi	r3, [r4, #0]
+	ldr	r3, [r4, #0]
+	adds	r3, r3, #1
+	bne	.L244
+	ldr	r0, .L246+8
+	ldr	r1, [sp, #8]
+	bl	printf
+.L244:
+	mov	r0, r8
+	bl	NandcFlashDeCs
+.L241:
+	adds	r5, r5, #1
+	adds	r4, r4, #36
+.L239:
+	cmp	r5, r6
+	bne	.L245
+	movs	r0, #0
+	add	sp, sp, #16
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L247:
+	.align	2
+.L246:
+	.word	.LANCHOR16
+	.word	.LANCHOR2
+	.word	.LC1
+	.word	.LANCHOR19
+	.word	.LANCHOR21
+	.size	FlashEraseSLc2KBlocks, .-FlashEraseSLc2KBlocks
+	.section	.text.FlashEraseBlocks,"ax",%progbits
+	.align	1
+	.global	FlashEraseBlocks
+	.thumb
+	.thumb_func
+	.type	FlashEraseBlocks, %function
+FlashEraseBlocks:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L264
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	sub	sp, sp, #24
+	ldrb	r4, [r3, #0]	@ zero_extendqisi2
+	mov	r5, r0
+	str	r1, [sp, #12]
+	mov	r6, r2
+	cmp	r4, #0
+	beq	.L262
+	mov	r1, r2
+	bl	FlashEraseSLc2KBlocks
+	b	.L250
+.L258:
+	rsb	r3, r4, r8
+	movs	r6, #36
+	muls	r6, r4, r6
+	add	fp, r5, r6
+	movs	r1, #0
+	uxtb	r3, r3
+	mov	r0, fp
+	str	r3, [sp, #0]
+	add	r2, sp, #16
+	add	r3, sp, #20
+	bl	LogAddr2PhyAddr
+	ldr	r1, .L264+4
+	ldrb	r3, [r1, #0]	@ zero_extendqisi2
+	mov	r7, r0
+	ldr	r0, [sp, #20]
+	cmp	r0, r3
+	bcc	.L251
+	mov	r3, #-1
+	str	r3, [r5, r6]
+	b	.L252
+.L251:
+	ldr	r3, .L264+8
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cmp	r3, #0
+	it	eq
+	moveq	r7, #0
+	add	r3, sl, r0, lsl #4
+	ldr	r3, [r3, #8]
+	cbz	r3, .L254
+	uxtb	r0, r0
+	bl	FlashWaitCmdDone
+.L254:
+	ldr	r2, [sp, #20]
+	ldr	r1, .L264+12
+	add	r3, r1, r2, lsl #4
+	movs	r1, #0
+	str	r1, [r3, #12]
+	ldr	r1, [sp, #16]
+	str	fp, [r3, #8]
+	str	r1, [r3, #4]
+	cbz	r7, .L255
+	adds	r1, r4, #1
+	movs	r0, #36
+	mla	r1, r0, r1, r5
+	str	r1, [r3, #12]
+.L255:
+	ldr	r3, .L264+16
+	ldrb	r6, [r3, r2]	@ zero_extendqisi2
+	lsls	r2, r2, #4
+	mov	r0, r6
+	strb	r6, [sl, r2]
+	bl	NandcFlashCs
+	ldr	r2, [sp, #12]
+	mov	r0, r6
+	cmp	r2, #1
+	bne	.L256
+	ldr	r3, .L264+20
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L256
+	bl	flash_enter_slc_mode
+	b	.L257
+.L256:
+	bl	flash_exit_slc_mode
+.L257:
+	ldr	r3, .L264+24
+	mov	r0, r6
+	ldr	r2, [sp, #20]
+	adds	r4, r4, r7
+	ldr	r1, [sp, #16]
+	ldr	r2, [r3, r2, lsl #2]
+	adds	r2, r2, #0
+	it	ne
+	movne	r2, #1
+	bl	FlashWaitReadyEN
+	mov	r0, r6
+	ldr	r1, [sp, #16]
+	mov	r2, r7
+	bl	FlashEraseCmd
+	mov	r0, r6
+	bl	NandcFlashDeCs
+.L252:
+	adds	r4, r4, #1
+	b	.L249
+.L262:
+	ldr	sl, .L264+12
+	mov	r8, r2
+.L249:
+	cmp	r4, r8
+	bcc	.L258
+	movs	r4, #0
+	ldr	r7, .L264+4
+	ldr	r6, .L264+20
+	ldr	r5, .L264+12
+	b	.L259
+.L261:
+	uxtb	r0, r4
+	bl	FlashWaitCmdDone
+	ldr	r3, [sp, #12]
+	cmp	r3, #1
+	bne	.L260
+	ldrb	r3, [r6, #0]	@ zero_extendqisi2
+	cbz	r3, .L260
+	lsls	r3, r4, #4
+	ldrb	r0, [r5, r3]	@ zero_extendqisi2
+	bl	flash_exit_slc_mode
+.L260:
+	adds	r4, r4, #1
+.L259:
+	ldrb	r3, [r7, #0]	@ zero_extendqisi2
+	cmp	r4, r3
+	bcc	.L261
+	movs	r0, #0
+.L250:
+	add	sp, sp, #24
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L265:
+	.align	2
+.L264:
+	.word	.LANCHOR0
+	.word	.LANCHOR16
+	.word	.LANCHOR33
+	.word	.LANCHOR21
+	.word	.LANCHOR19
+	.word	.LANCHOR7
+	.word	.LANCHOR20
+	.size	FlashEraseBlocks, .-FlashEraseBlocks
+	.section	.text.SandiskSetRRPara,"ax",%progbits
+	.align	1
+	.global	SandiskSetRRPara
+	.thumb
+	.thumb_func
+	.type	SandiskSetRRPara, %function
+SandiskSetRRPara:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	movs	r3, #239
+	mov	r4, r0
+	str	r3, [r0, #8]
+	movs	r3, #17
+	str	r3, [r0, #4]
+	movs	r0, #200
+	mov	r5, r1
+	bl	udelay
+	ldr	r3, .L272
+	ldr	r1, .L272+4
+	add	r5, r5, r5, lsl #2
+	ldr	r2, .L272+8
+	ldrb	r6, [r3, #0]	@ zero_extendqisi2
+	adds	r1, r1, r5
+	ldr	r3, .L272+12
+	adds	r5, r2, r5
+	ldrb	r0, [r3, #0]	@ zero_extendqisi2
+	movs	r3, #0
+	b	.L267
+.L270:
+	cmp	r0, #67
+	ite	eq
+	addeq	r2, r5, r3
+	addne	r2, r1, r3
+	adds	r3, r3, #1
+	ldrsb	r2, [r2, #5]
+	str	r2, [r4, #0]
+.L267:
+	cmp	r3, r6
+	bcc	.L270
+	movs	r0, #0
+	pop	{r4, r5, r6, lr}
+	b	NandcWaitFlashReady
+.L273:
+	.align	2
+.L272:
+	.word	.LANCHOR14
+	.word	.LANCHOR12
+	.word	.LANCHOR10
+	.word	.LANCHOR11
+	.size	SandiskSetRRPara, .-SandiskSetRRPara
+	.section	.text.FlashEraseBlock,"ax",%progbits
+	.align	1
+	.global	FlashEraseBlock
+	.thumb
+	.thumb_func
+	.type	FlashEraseBlock, %function
+FlashEraseBlock:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	mov	r4, r0
+	mov	r5, r1
+	mov	r6, r2
+	bl	NandcWaitFlashReady
+	mov	r0, r4
+	bl	NandcFlashCs
+	mov	r2, r6
+	mov	r1, r5
+	mov	r0, r4
+	bl	FlashEraseCmd
+	mov	r0, r4
+	bl	NandcWaitFlashReady
+	mov	r1, r5
+	mov	r0, r4
+	bl	FlashReadStatus
+	mov	r5, r0
+	mov	r0, r4
+	bl	NandcFlashDeCs
+	and	r0, r5, #1
+	pop	{r4, r5, r6, pc}
+	.size	FlashEraseBlock, .-FlashEraseBlock
+	.section	.text.FlashReset,"ax",%progbits
+	.align	1
+	.global	FlashReset
+	.thumb
+	.thumb_func
+	.type	FlashReset, %function
+FlashReset:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	mov	r4, r0
+	ldr	r3, .L276
+	ldr	r2, [r3, r0, lsl #3]
+	add	r3, r3, r0, lsl #3
+	ldrb	r5, [r3, #4]	@ zero_extendqisi2
+	adds	r5, r5, #8
+	add	r5, r2, r5, lsl #8
+	bl	NandcFlashCs
+	movs	r3, #255
+	mov	r0, r4
+	str	r3, [r5, #8]
+	bl	NandcWaitFlashReady
+	mov	r0, r4
+	pop	{r3, r4, r5, lr}
+	b	NandcFlashDeCs
+.L277:
+	.align	2
+.L276:
+	.word	.LANCHOR5
+	.size	FlashReset, .-FlashReset
+	.section	.text.FlashSetInterfaceMode,"ax",%progbits
+	.align	1
+	.global	FlashSetInterfaceMode
+	.thumb
+	.thumb_func
+	.type	FlashSetInterfaceMode, %function
+FlashSetInterfaceMode:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L292
+	mov	ip, #239
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	movs	r6, #0
+	ldr	r8, .L292+8
+	mov	r1, r6
+	ldrb	sl, [r3, #0]	@ zero_extendqisi2
+	mov	lr, #128
+	and	fp, sl, #1
+	and	sl, sl, #4
+	str	sl, [sp, #4]
+.L288:
+	add	r3, r8, r6
+	ldr	r7, .L292+4
+	ldr	r2, [r6, r8]
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+	ldrb	r5, [r6, r7]	@ zero_extendqisi2
+	adds	r3, r3, #8
+	lsls	r3, r3, #8
+	cmp	r5, #152
+	add	r4, r2, r3
+	beq	.L279
+	cmp	r5, #69
+	beq	.L279
+	cmp	r5, #173
+	beq	.L279
+	cmp	r5, #44
+	bne	.L280
+.L279:
+	cmp	r0, #1
+	bne	.L281
+	cmp	fp, #0
+	beq	.L280
+	cmp	r5, #173
+	str	ip, [r4, #8]
+	bne	.L282
+	str	r0, [r4, #4]
+	b	.L291
+.L282:
+	cmp	r5, #44
+	bne	.L284
+	str	r0, [r4, #4]
+	movs	r4, #5
+	str	r4, [r2, r3]
+	b	.L286
+.L284:
+	str	lr, [r4, #4]
+	str	r0, [r2, r3]
+	b	.L286
+.L281:
+	ldr	r7, [sp, #4]
+	cbz	r7, .L280
+	cmp	r5, #173
+	str	ip, [r4, #8]
+	bne	.L285
+	movs	r5, #1
+	movs	r7, #32
+	str	r5, [r4, #4]
+	b	.L290
+.L285:
+	cmp	r5, #44
+	bne	.L287
+	movs	r7, #35
+	movs	r5, #1
+	str	r5, [r4, #4]
+.L290:
+	str	r7, [r2, r3]
+	b	.L286
+.L287:
+	str	lr, [r4, #4]
+.L291:
+	str	r1, [r2, r3]
+.L286:
+	str	r1, [r2, r3]
+	str	r1, [r2, r3]
+	str	r1, [r2, r3]
+.L280:
+	adds	r6, r6, #8
+	cmp	r6, #32
+	bne	.L288
+	movs	r0, #0
+	bl	NandcWaitFlashReady
+	movs	r0, #0
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L293:
+	.align	2
+.L292:
+	.word	.LANCHOR34
+	.word	.LANCHOR22
+	.word	.LANCHOR5
+	.size	FlashSetInterfaceMode, .-FlashSetInterfaceMode
+	.section	.text.FlashReadDpCmd,"ax",%progbits
+	.align	1
+	.global	FlashReadDpCmd
+	.thumb
+	.thumb_func
+	.type	FlashReadDpCmd, %function
+FlashReadDpCmd:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L298
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r7, r2
+	ldr	r2, [r3, r0, lsl #3]
+	add	r3, r3, r0, lsl #3
+	mov	r4, r0
+	mov	r5, r1
+	ldrb	r6, [r3, #4]	@ zero_extendqisi2
+	ldr	r3, .L298+4
+	adds	r6, r6, #8
+	add	r6, r2, r6, lsl #8
+	ldrb	r2, [r3, #16]	@ zero_extendqisi2
+	cmp	r2, #1
+	ldrb	r2, [r3, #8]	@ zero_extendqisi2
+	str	r2, [r6, #8]
+	bne	.L295
+	mov	r8, #0
+	uxtb	r2, r1
+	str	r8, [r6, #4]
+	str	r8, [r6, #4]
+	str	r2, [r6, #4]
+	lsrs	r2, r1, #8
+	str	r2, [r6, #4]
+	lsrs	r2, r1, #16
+	str	r2, [r6, #4]
+	ldrb	r3, [r3, #9]	@ zero_extendqisi2
+	str	r3, [r6, #8]
+	bl	NandcWaitFlashReady
+	str	r8, [r6, #8]
+	str	r8, [r6, #4]
+	str	r8, [r6, #4]
+	b	.L297
+.L295:
+	uxtb	r2, r1
+	str	r2, [r6, #4]
+	lsrs	r2, r1, #8
+	str	r2, [r6, #4]
+	lsrs	r2, r1, #16
+	str	r2, [r6, #4]
+	ldrb	r3, [r3, #9]	@ zero_extendqisi2
+	str	r3, [r6, #8]
+.L297:
+	uxtb	r3, r7
+	mov	r0, r4
+	str	r3, [r6, #4]
+	mov	r1, r5
+	lsrs	r3, r7, #8
+	lsrs	r7, r7, #16
+	str	r3, [r6, #4]
+	movs	r3, #48
+	str	r7, [r6, #4]
+	str	r3, [r6, #8]
+	pop	{r4, r5, r6, r7, r8, lr}
+	b	FlashSetRandomizer
+.L299:
+	.align	2
+.L298:
+	.word	.LANCHOR5
+	.word	.LANCHOR6
+	.size	FlashReadDpCmd, .-FlashReadDpCmd
+	.section	.text.FlashDeInit,"ax",%progbits
+	.align	1
+	.global	FlashDeInit
+	.thumb
+	.thumb_func
+	.type	FlashDeInit, %function
+FlashDeInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, lr}
+	movs	r0, #0
+	ldr	r4, .L302
+	bl	NandcWaitFlashReady
+	bl	FlashSetReadRetryDefault
+	ldrb	r3, [r4, #0]	@ zero_extendqisi2
+	cbz	r3, .L301
+	ldr	r3, .L302+4
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	lsls	r2, r3, #31
+	bpl	.L301
+	movs	r0, #1
+	bl	FlashSetInterfaceMode
+	movs	r0, #1
+	bl	NandcSetMode
+	movs	r3, #0
+	strb	r3, [r4, #0]
+.L301:
+	ldr	r3, .L302+8
+	movs	r0, #0
+	ldr	r3, [r3, #0]
+	str	r0, [r3, #336]
+	pop	{r4, pc}
+.L303:
+	.align	2
+.L302:
+	.word	.LANCHOR35
+	.word	.LANCHOR34
+	.word	.LANCHOR5
+	.size	FlashDeInit, .-FlashDeInit
+	.section	.text.NandcRandmzSel,"ax",%progbits
+	.align	1
+	.global	NandcRandmzSel
+	.thumb
+	.thumb_func
+	.type	NandcRandmzSel, %function
+NandcRandmzSel:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L305
+	ldr	r3, [r3, r0, lsl #3]
+	str	r1, [r3, #336]
+	bx	lr
+.L306:
+	.align	2
+.L305:
+	.word	.LANCHOR5
+	.size	NandcRandmzSel, .-NandcRandmzSel
+	.section	.text.NandcTimeCfg,"ax",%progbits
+	.align	1
+	.global	NandcTimeCfg
+	.thumb
+	.thumb_func
+	.type	NandcTimeCfg, %function
+NandcTimeCfg:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L312
+	cmp	r0, #35
+	ldr	r3, [r3, #0]
+	bhi	.L308
+	movw	r2, #4193
+	b	.L311
+.L308:
+	cmp	r0, #99
+	ite	hi
+	movwhi	r2, #8322
+	movwls	r2, #4225
+.L311:
+	str	r2, [r3, #4]
+	bx	lr
+.L313:
+	.align	2
+.L312:
+	.word	.LANCHOR30
+	.size	NandcTimeCfg, .-NandcTimeCfg
+	.section	.text.FlashTimingCfg,"ax",%progbits
+	.align	1
+	.global	FlashTimingCfg
+	.thumb
+	.thumb_func
+	.type	FlashTimingCfg, %function
+FlashTimingCfg:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L315
+	ldrb	r0, [r3, #21]	@ zero_extendqisi2
+	b	NandcTimeCfg
+.L316:
+	.align	2
+.L315:
+	.word	.LANCHOR18
+	.size	FlashTimingCfg, .-FlashTimingCfg
+	.section	.text.NandcBchSel,"ax",%progbits
+	.align	1
+	.global	NandcBchSel
+	.thumb
+	.thumb_func
+	.type	NandcBchSel, %function
+NandcBchSel:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L322
+	movs	r1, #16
+	ldr	r2, [r3, #0]
+	movs	r3, #1
+	str	r3, [r2, #8]
+	ldr	r3, .L322+4
+	str	r0, [r3, #0]
+	movs	r3, #0
+	cmp	r0, r1
+	bfi	r3, r1, #8, #8
+	bfc	r3, #18, #1
+	beq	.L321
+.L318:
+	cmp	r0, #24
+	bne	.L320
+	orr	r3, r3, #16
+	b	.L319
+.L320:
+	cmp	r0, #40
+	orr	r3, r3, #262144
+	orr	r3, r3, #16
+	bne	.L319
+.L321:
+	bfc	r3, #4, #1
+.L319:
+	orr	r3, r3, #1
+	str	r3, [r2, #12]
+	bx	lr
+.L323:
+	.align	2
+.L322:
+	.word	.LANCHOR30
+	.word	.LANCHOR36
+	.size	NandcBchSel, .-NandcBchSel
+	.section	.text.FlashBchSel,"ax",%progbits
+	.align	1
+	.global	FlashBchSel
+	.thumb
+	.thumb_func
+	.type	FlashBchSel, %function
+FlashBchSel:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L325
+	strb	r0, [r3, #0]
+	b	NandcBchSel
+.L326:
+	.align	2
+.L325:
+	.word	.LANCHOR29
+	.size	FlashBchSel, .-FlashBchSel
+	.section	.text.NandCIrqEnable,"ax",%progbits
+	.align	1
+	.global	NandCIrqEnable
+	.thumb
+	.thumb_func
+	.type	NandCIrqEnable, %function
+NandCIrqEnable:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	NandCIrqEnable, .-NandCIrqEnable
+	.section	.text.NandCIrqDisable,"ax",%progbits
+	.align	1
+	.global	NandCIrqDisable
+	.thumb
+	.thumb_func
+	.type	NandCIrqDisable, %function
+NandCIrqDisable:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	NandCIrqDisable, .-NandCIrqDisable
+	.section	.text.rk_nandc_get_irq_status,"ax",%progbits
+	.align	1
+	.global	rk_nandc_get_irq_status
+	.thumb
+	.thumb_func
+	.type	rk_nandc_get_irq_status, %function
+rk_nandc_get_irq_status:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r0, [r0, #372]
+	bx	lr
+	.size	rk_nandc_get_irq_status, .-rk_nandc_get_irq_status
+	.section	.text.rk_nandc_flash_ready,"ax",%progbits
+	.align	1
+	.global	rk_nandc_flash_ready
+	.thumb
+	.thumb_func
+	.type	rk_nandc_flash_ready, %function
+rk_nandc_flash_ready:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	rk_nandc_flash_ready, .-rk_nandc_flash_ready
+	.section	.text.NandcIqrWaitFlashReady,"ax",%progbits
+	.align	1
+	.global	NandcIqrWaitFlashReady
+	.thumb
+	.thumb_func
+	.type	NandcIqrWaitFlashReady, %function
+NandcIqrWaitFlashReady:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	NandcIqrWaitFlashReady, .-NandcIqrWaitFlashReady
+	.section	.text.rk_nandc_flash_xfer_completed,"ax",%progbits
+	.align	1
+	.global	rk_nandc_flash_xfer_completed
+	.thumb
+	.thumb_func
+	.type	rk_nandc_flash_xfer_completed, %function
+rk_nandc_flash_xfer_completed:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	rk_nandc_flash_xfer_completed, .-rk_nandc_flash_xfer_completed
+	.section	.text.NandcSendDumpDataStart,"ax",%progbits
+	.align	1
+	.global	NandcSendDumpDataStart
+	.thumb
+	.thumb_func
+	.type	NandcSendDumpDataStart, %function
+NandcSendDumpDataStart:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r2, [r0, #16]
+	sub	sp, sp, #8
+	ldr	r3, .L334
+	str	r2, [sp, #4]
+	ldr	r2, [sp, #4]
+	bfc	r2, #2, #1
+	str	r2, [sp, #4]
+	ldr	r2, [sp, #4]
+	str	r2, [r0, #16]
+	str	r3, [r0, #8]
+	orr	r3, r3, #4
+	str	r3, [r0, #8]
+	add	sp, sp, #8
+	bx	lr
+.L335:
+	.align	2
+.L334:
+	.word	538969130
+	.size	NandcSendDumpDataStart, .-NandcSendDumpDataStart
+	.section	.text.NandcSendDumpDataDone,"ax",%progbits
+	.align	1
+	.global	NandcSendDumpDataDone
+	.thumb
+	.thumb_func
+	.type	NandcSendDumpDataDone, %function
+NandcSendDumpDataDone:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	sub	sp, sp, #8
+.L337:
+	ldr	r3, [r0, #8]
+	str	r3, [sp, #4]
+	ldr	r3, [sp, #4]
+	lsls	r1, r3, #11
+	bpl	.L337
+	add	sp, sp, #8
+	bx	lr
+	.size	NandcSendDumpDataDone, .-NandcSendDumpDataDone
+	.section	.text.NandcXferStart,"ax",%progbits
+	.align	1
+	.global	NandcXferStart
+	.thumb
+	.thumb_func
+	.type	NandcXferStart, %function
+NandcXferStart:
+	@ args = 8, pretend = 0, frame = 32
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	sub	sp, sp, #32
+	ldr	r4, [sp, #68]
+	ldr	r6, [sp, #64]
+	cbnz	r4, .L351
+	adds	r7, r6, #0
+	it	ne
+	movne	r7, #1
+	b	.L340
+.L351:
+	movs	r7, #1
+.L340:
+	ldr	r5, .L354
+	mov	r8, #16
+	ldr	r4, [r5, r0, lsl #3]
+	add	r0, r5, r0, lsl #3
+	ldrb	ip, [r0, #4]	@ zero_extendqisi2
+	movs	r0, #0
+	ldr	r5, [r4, #12]
+	bfi	r5, r8, #8, #8
+	bfi	r5, r0, #3, #1
+	bfi	r0, r1, #1, #1
+	bfi	r5, ip, #5, #3
+	orr	r0, r0, #8
+	mov	ip, #1
+	bfi	r0, ip, #5, #2
+	lsr	r3, r3, ip
+	orr	r0, r0, #536870912
+	orr	r0, r0, #1024
+	bfi	r0, r3, #4, #1
+	ldr	r3, .L354+4
+	ldr	r3, [r3, #0]
+	cmp	r3, #3
+	bls	.L341
+	ldr	r3, [r4, #16]
+	str	r3, [sp, #28]
+	ldr	r3, [sp, #28]
+	bfc	r3, #2, #1
+	str	r3, [sp, #28]
+	cmp	r7, #0
+	beq	.L342
+	cmp	r1, #0
+	beq	.L343
+	ldr	r3, .L354+8
+	str	r1, [sp, #8]
+	str	r2, [sp, #4]
+	ldr	r3, [r3, #0]
+	cmp	r3, #24
+	ite	hi
+	movhi	r3, #128
+	movls	r3, #64
+	str	r3, [sp, #16]
+	lsr	r3, r2, ip
+	str	r3, [sp, #20]
+	ldr	r3, .L354+12
+	ldr	ip, [sp, #68]
+	ldr	r3, [r3, #4]
+	str	r3, [sp, #12]
+	movs	r3, #0
+	mov	r7, r3
+	b	.L345
+.L348:
+	ldr	r1, [sp, #68]
+	lsr	fp, r3, #2
+	cbz	r1, .L346
+	ldrh	sl, [ip, #2]
+	ldr	r2, [sp, #12]
+	ldrh	r8, [ip], #4
+	orr	r8, r8, sl, lsl #16
+	str	r8, [r2, fp, lsl #2]
+	b	.L347
+.L346:
+	ldr	r2, [sp, #12]
+	mov	r1, #-1
+	str	r1, [r2, fp, lsl #2]
+.L347:
+	ldr	r1, [sp, #16]
+	adds	r7, r7, #1
+	adds	r3, r3, r1
+.L345:
+	ldr	r2, [sp, #20]
+	cmp	r7, r2
+	bcc	.L348
+	ldr	r1, [sp, #8]
+	ldr	r2, [sp, #4]
+.L343:
+	adds	r2, r2, #1
+	ldr	r3, .L354+12
+	asrs	r2, r2, #1
+	bfi	r0, r2, #22, #6
+	cbnz	r6, .L353
+	ldr	r2, [r3, #0]
+	b	.L349
+.L353:
+	mov	r2, r6
+.L349:
+	ldr	r7, [r3, #4]
+	mov	ip, #1
+	str	r2, [r3, #8]
+	str	ip, [r3, #24]
+	str	r2, [r3, #16]
+	str	r7, [r3, #20]
+	str	r7, [r3, #12]
+	movs	r3, #0
+	str	r2, [r4, #20]
+	movs	r2, #16
+	str	r7, [r4, #24]
+	str	r3, [sp, #28]
+	ldr	r3, [sp, #28]
+	bfi	r3, r2, #9, #5
+	str	r3, [sp, #28]
+	ldr	r3, [sp, #28]
+	orr	r3, r3, #448
+	str	r3, [sp, #28]
+	lsls	r3, r6, #30
+	bne	.L350
+	ldr	r3, [sp, #28]
+	movs	r2, #2
+	bfi	r3, r2, #3, #3
+	str	r3, [sp, #28]
+.L350:
+	ldr	r3, [sp, #28]
+	rsbs	r1, r1, #1
+	it	cc
+	movcc	r1, #0
+	orr	r3, r3, #4
+	str	r3, [sp, #28]
+	ldr	r3, [sp, #28]
+	bfi	r3, r1, #1, #1
+	str	r3, [sp, #28]
+	ldr	r3, [sp, #28]
+	orr	r3, r3, #1
+	str	r3, [sp, #28]
+.L342:
+	ldr	r3, [sp, #28]
+	str	r3, [r4, #16]
+.L341:
+	str	r5, [r4, #12]
+	str	r0, [r4, #8]
+	orr	r0, r0, #4
+	str	r0, [r4, #8]
+	add	sp, sp, #32
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L355:
+	.align	2
+.L354:
+	.word	.LANCHOR5
+	.word	.LANCHOR37
+	.word	.LANCHOR36
+	.word	.LANCHOR38
+	.size	NandcXferStart, .-NandcXferStart
+	.section	.text.NandcXferComp,"ax",%progbits
+	.align	1
+	.global	NandcXferComp
+	.thumb
+	.thumb_func
+	.type	NandcXferComp, %function
+NandcXferComp:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L372
+	push	{r0, r1, r2, r4, r5, lr}
+	ldr	r4, [r3, r0, lsl #3]
+	ldr	r3, .L372+4
+	ldr	r3, [r3, #0]
+	cmp	r3, #3
+	bls	.L368
+	ldr	r2, [r4, #16]
+	lsls	r0, r2, #29
+	bpl	.L368
+	ldr	r2, [r4, #16]
+	lsls	r1, r2, #30
+	bpl	.L364
+	ldr	r2, [r4, #8]
+	str	r2, [sp, #0]
+	b	.L371
+.L362:
+	cmp	r3, #5
+	bls	.L371
+	ldr	r2, [r4, #0]
+	str	r2, [sp, #4]
+	ldr	r2, [sp, #4]
+	lsls	r2, r2, #18
+	bpl	.L371
+	ldr	r2, [sp, #4]
+	lsls	r0, r2, #14
+	bmi	.L361
+.L371:
+	ldr	r1, [r4, #28]
+	ldr	r2, [sp, #0]
+	ubfx	r1, r1, #16, #5
+	ubfx	r2, r2, #22, #6
+	cmp	r1, r2
+	blt	.L362
+	b	.L361
+.L364:
+	ldr	r3, [r4, #8]
+	str	r3, [sp, #0]
+	ldr	r3, [sp, #0]
+	lsls	r1, r3, #11
+	bpl	.L364
+	ldr	r5, .L372+8
+	ldr	r3, [r5, #0]
+	cbz	r3, .L365
+	mov	r0, r4
+	bl	NandcSendDumpDataStart
+.L365:
+	ldr	r3, [r5, #0]
+	cbz	r3, .L361
+	mov	r0, r4
+	bl	NandcSendDumpDataDone
+.L361:
+	ldr	r3, .L372+12
+	movs	r2, #0
+	str	r2, [r3, #24]
+	b	.L356
+.L368:
+	ldr	r3, [r4, #8]
+	str	r3, [sp, #0]
+	ldr	r3, [sp, #0]
+	lsls	r2, r3, #11
+	bpl	.L368
+.L356:
+	pop	{r1, r2, r3, r4, r5, pc}
+.L373:
+	.align	2
+.L372:
+	.word	.LANCHOR5
+	.word	.LANCHOR37
+	.word	.LANCHOR39
+	.word	.LANCHOR38
+	.size	NandcXferComp, .-NandcXferComp
+	.section	.text.NandcCopy1KB,"ax",%progbits
+	.align	1
+	.global	NandcCopy1KB
+	.thumb
+	.thumb_func
+	.type	NandcCopy1KB, %function
+NandcCopy1KB:
+	@ args = 4, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	cmp	r1, #1
+	mov	r4, r2
+	add	r2, r0, #4096
+	ldr	r5, [sp, #16]
+	add	r6, r0, #512
+	add	r2, r2, r4, lsl #9
+	bne	.L375
+	cbz	r3, .L376
+	mov	r0, r2
+	mov	r1, r3
+	mov	r2, #1024
+	bl	memcpy
+.L376:
+	cbz	r5, .L374
+	lsrs	r4, r4, #1
+	ldrb	r2, [r5, #1]	@ zero_extendqisi2
+	lsls	r3, r4, #4
+	lsls	r4, r4, #6
+	subs	r4, r4, r3
+	ldrb	r3, [r5, #2]	@ zero_extendqisi2
+	lsls	r3, r3, #16
+	orr	r3, r3, r2, lsl #8
+	ldrb	r2, [r5, #0]	@ zero_extendqisi2
+	orrs	r3, r3, r2
+	ldrb	r2, [r5, #3]	@ zero_extendqisi2
+	orr	r3, r3, r2, lsl #24
+	str	r3, [r6, r4]
+	pop	{r4, r5, r6, pc}
+.L375:
+	cbz	r3, .L378
+	mov	r1, r2
+	mov	r0, r3
+	mov	r2, #1024
+	bl	memcpy
+.L378:
+	cbz	r5, .L374
+	lsrs	r4, r4, #1
+	lsls	r3, r4, #4
+	lsls	r4, r4, #6
+	subs	r4, r4, r3
+	ldr	r3, [r6, r4]
+	lsrs	r2, r3, #8
+	strb	r3, [r5, #0]
+	strb	r2, [r5, #1]
+	lsrs	r2, r3, #16
+	lsrs	r3, r3, #24
+	strb	r2, [r5, #2]
+	strb	r3, [r5, #3]
+.L374:
+	pop	{r4, r5, r6, pc}
+	.size	NandcCopy1KB, .-NandcCopy1KB
+	.section	.text.NandcXferData,"ax",%progbits
+	.align	1
+	.global	NandcXferData
+	.thumb
+	.thumb_func
+	.type	NandcXferData, %function
+NandcXferData:
+	@ args = 4, pretend = 0, frame = 80
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	sub	sp, sp, #88
+	mov	r4, r3
+	mov	fp, r3
+	ldr	r3, .L417
+	mov	r6, r0
+	str	r1, [sp, #12]
+	lsls	r1, r4, #26
+	mov	sl, r2
+	ldr	r5, [sp, #120]
+	ldr	r8, [r3, r0, lsl #3]
+	bne	.L380
+	cbnz	r5, .L381
+	add	r0, sp, #20
+	movs	r1, #255
+	movs	r2, #64
+	add	r5, sp, #20
+	bl	memset
+.L381:
+	movs	r3, #0
+	mov	r0, r6
+	ldr	r1, [sp, #12]
+	mov	r2, sl
+	stmia	sp, {r4, r5}
+	bl	NandcXferStart
+	mov	r0, r6
+	bl	NandcXferComp
+	ldr	r3, [sp, #12]
+	cmp	r3, #0
+	bne	.L404
+	ldr	r3, .L417+4
+	lsr	r0, sl, #1
+	ldr	r1, .L417+8
+	ldr	r4, [r3, #0]
+	ldr	r3, [sp, #12]
+	cmp	r4, #24
+	ite	hi
+	movhi	r4, #128
+	movls	r4, #64
+	mov	r2, r3
+	b	.L384
+.L385:
+	ldr	r7, [r1, #4]
+	lsrs	r3, r3, #2
+	adds	r2, r2, #1
+	ldr	r3, [r7, r3, lsl #2]
+	lsrs	r7, r3, #8
+	strb	r3, [r5, #0]
+	strb	r7, [r5, #1]
+	lsrs	r7, r3, #16
+	lsrs	r3, r3, #24
+	strb	r7, [r5, #2]
+	strb	r3, [r5, #3]
+	adds	r5, r5, #4
+	mov	r3, r6
+.L384:
+	cmp	r2, r0
+	add	r6, r3, r4
+	bcc	.L385
+	ldr	r3, .L417+4
+	lsr	sl, sl, #2
+	ldr	r0, [r3, #0]
+	ldr	r3, .L417+12
+	ldr	r1, [r3, #0]
+	movs	r3, #0
+	mov	r4, r3
+	b	.L386
+.L392:
+	add	r2, r3, #8
+	ldr	r2, [r8, r2, lsl #2]
+	str	r2, [sp, #84]
+	ldr	r2, [sp, #84]
+	lsls	r2, r2, #29
+	bmi	.L407
+	ldr	r2, [sp, #84]
+	ands	r2, r2, #32768
+	bne	.L407
+	cmp	r1, #5
+	bls	.L388
+	ldr	r7, [sp, #84]
+	ldr	r5, [sp, #84]
+	ldr	r6, [sp, #84]
+	ubfx	r7, r7, #3, #5
+	ldr	r2, [sp, #84]
+	ubfx	r5, r5, #27, #1
+	ubfx	r6, r6, #16, #5
+	ubfx	r2, r2, #29, #1
+	orr	r5, r7, r5, lsl #5
+	orr	r2, r6, r2, lsl #5
+	cmp	r5, r2
+	ldr	r5, [sp, #84]
+	bls	.L389
+	ldr	r2, [sp, #84]
+	ubfx	r5, r5, #3, #5
+	ubfx	r2, r2, #27, #1
+	b	.L416
+.L389:
+	ldr	r2, [sp, #84]
+	ubfx	r5, r5, #16, #5
+	ubfx	r2, r2, #29, #1
+	b	.L416
+.L388:
+	cmp	r1, #3
+	bls	.L390
+	ldr	r7, [sp, #84]
+	ldr	r5, [sp, #84]
+	ldr	r6, [sp, #84]
+	ubfx	r7, r7, #3, #5
+	ldr	r2, [sp, #84]
+	ubfx	r5, r5, #28, #1
+	ubfx	r6, r6, #16, #5
+	ubfx	r2, r2, #30, #1
+	orr	r5, r7, r5, lsl #5
+	orr	r2, r6, r2, lsl #5
+	cmp	r5, r2
+	ldr	r5, [sp, #84]
+	bls	.L391
+	ldr	r2, [sp, #84]
+	ubfx	r5, r5, #3, #5
+	ubfx	r2, r2, #28, #1
+	b	.L416
+.L391:
+	ldr	r2, [sp, #84]
+	ubfx	r5, r5, #16, #5
+	ubfx	r2, r2, #30, #1
+.L416:
+	orr	r2, r5, r2, lsl #5
+.L390:
+	cmp	r4, r2
+	it	cc
+	movcc	r4, r2
+	b	.L387
+.L407:
+	mov	r4, #-1
+.L387:
+	adds	r3, r3, #1
+.L386:
+	cmp	r3, sl
+	bcs	.L382
+	cmp	r0, #0
+	bne	.L392
+	b	.L382
+.L404:
+	movs	r4, #0
+.L382:
+	movs	r3, #0
+	str	r3, [r8, #16]
+	b	.L393
+.L380:
+	ldr	r3, [sp, #12]
+	mov	r7, #0
+	cmp	r3, #1
+	bne	.L414
+	b	.L394
+.L397:
+	cmp	r5, #0
+	ite	ne
+	movne	r3, #2
+	moveq	r3, #0
+	and	r4, r7, #3
+	mov	r0, r8
+	movs	r1, #1
+	mla	r3, r7, r3, r5
+	mov	r2, r4
+	adds	r7, r7, #2
+	str	r3, [sp, #0]
+	mov	r3, fp
+	bl	NandcCopy1KB
+	movs	r3, #0
+	mov	r0, r6
+	str	r3, [sp, #0]
+	str	r3, [sp, #4]
+	movs	r1, #1
+	movs	r2, #2
+	mov	r3, r4
+	bl	NandcXferStart
+	mov	r0, r6
+	bl	NandcXferComp
+	add	fp, fp, #1024
+.L394:
+	cmp	r7, sl
+	bcc	.L397
+	movs	r4, #0
+	b	.L393
+.L414:
+	mov	r1, r7
+	movs	r2, #2
+	mov	r3, r7
+	str	r7, [sp, #0]
+	str	r7, [sp, #4]
+	mov	r4, r7
+	bl	NandcXferStart
+	b	.L398
+.L402:
+	mov	r0, r6
+	bl	NandcXferComp
+	ldr	r3, [r8, #32]
+	add	ip, r7, #2
+	cmp	ip, sl
+	str	r3, [sp, #84]
+	bcs	.L399
+	movs	r3, #0
+	mov	r0, r6
+	str	r3, [sp, #0]
+	mov	r1, r3
+	str	r3, [sp, #4]
+	movs	r2, #2
+	and	r3, ip, #3
+	str	ip, [sp, #8]
+	bl	NandcXferStart
+	ldr	ip, [sp, #8]
+.L399:
+	ldr	r3, [sp, #84]
+	lsls	r3, r3, #29
+	bmi	.L411
+	ldr	r2, [sp, #84]
+	ldr	r3, [sp, #84]
+	ubfx	r2, r2, #3, #5
+	ubfx	r3, r3, #27, #1
+	orr	r3, r2, r3, lsl #5
+	cmp	r4, r3
+	it	cc
+	movcc	r4, r3
+	b	.L400
+.L411:
+	mov	r4, #-1
+.L400:
+	cmp	r5, #0
+	ite	ne
+	movne	r3, #2
+	moveq	r3, #0
+	sub	r2, ip, #2
+	mov	r0, r8
+	movs	r1, #0
+	mla	r7, r7, r3, r5
+	and	r2, r2, #3
+	mov	r3, fp
+	str	ip, [sp, #8]
+	add	fp, fp, #1024
+	str	r7, [sp, #0]
+	bl	NandcCopy1KB
+	ldr	ip, [sp, #8]
+	mov	r7, ip
+.L398:
+	cmp	r7, sl
+	bcc	.L402
+.L393:
+	ldr	r3, .L417+12
+	ldr	r3, [r3, #0]
+	cmp	r3, #5
+	bls	.L403
+	ldr	r3, [sp, #12]
+	cbnz	r3, .L403
+	ldr	r3, [r8, #0]
+	and	r2, r3, #139264
+	cmp	r2, #139264
+	bne	.L403
+	mov	r4, #-1
+	orr	r3, r3, #131072
+	str	r3, [r8, #0]
+.L403:
+	mov	r0, r4
+	add	sp, sp, #88
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L418:
+	.align	2
+.L417:
+	.word	.LANCHOR5
+	.word	.LANCHOR36
+	.word	.LANCHOR38
+	.word	.LANCHOR37
+	.size	NandcXferData, .-NandcXferData
+	.section	.text.FlashProgPage,"ax",%progbits
+	.align	1
+	.global	FlashProgPage
+	.thumb
+	.thumb_func
+	.type	FlashProgPage, %function
+FlashProgPage:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	mov	r8, r3
+	ldr	r3, .L422
+	mov	r5, r1
+	mov	r6, r2
+	mov	r4, r0
+	ldrb	r7, [r3, #9]	@ zero_extendqisi2
+	cbnz	r0, .L420
+	ldr	r3, .L422+4
+	ldr	r2, .L422+8
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	ldr	r2, [r2, #0]
+	muls	r3, r2, r3
+	cmp	r1, r3
+	bcs	.L420
+	ldr	r3, .L422+12
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbnz	r3, .L421
+	subs	r7, r7, #2
+	b	.L420
+.L421:
+	movs	r7, #4
+.L420:
+	mov	r0, r4
+	bl	NandcWaitFlashReady
+	mov	r0, r4
+	bl	NandcFlashCs
+	mov	r0, r4
+	mov	r1, r5
+	bl	FlashProgFirstCmd
+	uxtb	r2, r7
+	mov	r3, r6
+	movs	r1, #1
+	mov	r0, r4
+	str	r8, [sp, #0]
+	bl	NandcXferData
+	mov	r1, r5
+	mov	r0, r4
+	bl	FlashProgSecondCmd
+	mov	r0, r4
+	bl	NandcWaitFlashReady
+	mov	r1, r5
+	mov	r0, r4
+	bl	FlashReadStatus
+	mov	r5, r0
+	mov	r0, r4
+	bl	NandcFlashDeCs
+	and	r0, r5, #1
+	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
+.L423:
+	.align	2
+.L422:
+	.word	.LANCHOR18
+	.word	.LANCHOR1
+	.word	.LANCHOR2
+	.word	.LANCHOR0
+	.size	FlashProgPage, .-FlashProgPage
+	.section	.text.FlashPageProgMsbFFData,"ax",%progbits
+	.align	1
+	.global	FlashPageProgMsbFFData
+	.thumb
+	.thumb_func
+	.type	FlashPageProgMsbFFData, %function
+FlashPageProgMsbFFData:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L432
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r4, r2
+	ldr	r2, .L432+4
+	mov	r8, r0
+	ldr	r3, [r3, #0]
+	mov	r7, r1
+	ldrb	r2, [r2, #0]	@ zero_extendqisi2
+	ldrb	r3, [r3, #19]	@ zero_extendqisi2
+	cbz	r2, .L425
+	ldr	r2, .L432+8
+	ldr	r1, [r2, #0]
+	ldr	r2, .L432+12
+	cmp	r1, r2
+	beq	.L424
+.L425:
+	subs	r2, r3, #5
+	cmp	r2, #2
+	bls	.L429
+	cmp	r3, #68
+	beq	.L429
+	cmp	r3, #35
+	beq	.L429
+	cmp	r3, #19
+	bne	.L424
+	b	.L429
+.L430:
+	ldrh	r3, [sl, r4, lsl #1]
+	cmp	r3, fp
+	bne	.L424
+	movs	r1, #255
+	mov	r2, #32768
+	ldr	r0, [r5, #0]
+	bl	memset
+	adds	r1, r4, r7
+	adds	r4, r4, #1
+	mov	r0, r8
+	ldr	r2, [r5, #0]
+	movs	r3, #0
+	bl	FlashProgPage
+	uxth	r4, r4
+	b	.L431
+.L429:
+	ldr	r6, .L432
+	movw	fp, #65535
+	ldr	sl, .L432+20
+	ldr	r5, .L432+16
+.L431:
+	ldr	r3, [r6, #0]
+	ldrh	r3, [r3, #10]
+	cmp	r3, r4
+	bhi	.L430
+.L424:
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L433:
+	.align	2
+.L432:
+	.word	.LANCHOR23
+	.word	.LANCHOR7
+	.word	.LANCHOR40
+	.word	1446522928
+	.word	.LANCHOR41
+	.word	.LANCHOR9
+	.size	FlashPageProgMsbFFData, .-FlashPageProgMsbFFData
+	.section	.text.FlashReadRawPage,"ax",%progbits
+	.align	1
+	.global	FlashReadRawPage
+	.thumb
+	.thumb_func
+	.type	FlashReadRawPage, %function
+FlashReadRawPage:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	mov	r8, r3
+	ldr	r3, .L437
+	mov	r6, r1
+	mov	r5, r2
+	mov	r4, r0
+	ldrb	r7, [r3, #9]	@ zero_extendqisi2
+	cbnz	r0, .L435
+	ldr	r3, .L437+4
+	ldr	r2, .L437+8
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	ldr	r2, [r2, #0]
+	muls	r3, r2, r3
+	cmp	r1, r3
+	it	cc
+	movcc	r7, #4
+.L435:
+	mov	r0, r4
+	bl	NandcWaitFlashReady
+	mov	r0, r4
+	bl	NandcFlashCs
+	mov	r1, r6
+	mov	r0, r4
+	bl	FlashReadCmd
+	mov	r0, r4
+	bl	NandcWaitFlashReady
+	mov	r3, r5
+	movs	r1, #0
+	mov	r2, r7
+	mov	r0, r4
+	str	r8, [sp, #0]
+	bl	NandcXferData
+	mov	r5, r0
+	mov	r0, r4
+	bl	NandcFlashDeCs
+	mov	r0, r5
+	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
+.L438:
+	.align	2
+.L437:
+	.word	.LANCHOR18
+	.word	.LANCHOR1
+	.word	.LANCHOR2
+	.size	FlashReadRawPage, .-FlashReadRawPage
+	.section	.text.HynixReadRetrial,"ax",%progbits
+	.align	1
+	.global	HynixReadRetrial
+	.thumb
+	.thumb_func
+	.type	HynixReadRetrial, %function
+HynixReadRetrial:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	sl, r2
+	ldr	r2, .L454
+	mov	r7, r3
+	mov	r6, r0
+	str	r1, [sp, #4]
+	adds	r3, r2, r0
+	mov	r8, #0
+	ldrb	fp, [r2, #2]	@ zero_extendqisi2
+	mov	r5, #-1
+	ldr	r2, .L454+4
+	ldrb	r4, [r3, #12]	@ zero_extendqisi2
+	ldr	r2, [r2, #0]
+	ldrb	r2, [r2, #19]	@ zero_extendqisi2
+	cmp	r2, #7
+	it	eq
+	ldrbeq	r4, [r3, #20]	@ zero_extendqisi2
+	bl	NandcWaitFlashReady
+	b	.L441
+.L446:
+	adds	r4, r4, #1
+	ldr	r2, .L454
+	mov	r0, r6
+	uxtb	r4, r4
+	cmp	r4, fp
+	it	cs
+	movcs	r4, #0
+	ldrb	r1, [r2, #1]	@ zero_extendqisi2
+	mov	r3, r4
+	adds	r2, r2, #4
+	bl	HynixSetRRPara
+	mov	r3, r7
+	mov	r0, r6
+	ldr	r1, [sp, #4]
+	mov	r2, sl
+	bl	FlashReadRawPage
+	adds	r3, r0, #1
+	beq	.L443
+	ldr	r2, .L454+8
+	cmp	r5, #-1
+	it	eq
+	moveq	r5, r0
+	ldrb	r3, [r2, #0]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r0, r3, lsr #2
+	bcc	.L452
+	movs	r7, #0
+	mov	sl, r7
+.L443:
+	add	r8, r8, #1
+.L441:
+	cmp	r8, fp
+	bcc	.L446
+	b	.L445
+.L452:
+	mov	r5, r0
+.L445:
+	ldr	r3, .L454+4
+	ldr	r3, [r3, #0]
+	ldrb	r3, [r3, #19]	@ zero_extendqisi2
+	cmp	r3, #7
+	ldr	r3, .L454
+	add	r6, r3, r6
+	ldr	r3, .L454+8
+	it	eq
+	strbeq	r4, [r6, #20]
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	it	ne
+	strbne	r4, [r6, #12]
+	add	r3, r3, r3, lsl #1
+	cmp	r5, r3, lsr #2
+	bcc	.L449
+	cmp	r5, #-1
+	ite	eq
+	moveq	r5, #-1
+	movne	r5, #256
+.L449:
+	mov	r0, r5
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L455:
+	.align	2
+.L454:
+	.word	.LANCHOR31
+	.word	.LANCHOR23
+	.word	.LANCHOR29
+	.size	HynixReadRetrial, .-HynixReadRetrial
+	.section	.text.MicronReadRetrial,"ax",%progbits
+	.align	1
+	.global	MicronReadRetrial
+	.thumb
+	.thumb_func
+	.type	MicronReadRetrial, %function
+MicronReadRetrial:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	sub	sp, sp, #24
+	mov	fp, r3
+	ldr	r3, .L470
+	str	r2, [sp, #20]
+	mov	sl, r0
+	ldr	r2, .L470+4
+	str	r1, [sp, #16]
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	ldrb	r2, [r2, #0]	@ zero_extendqisi2
+	cbnz	r2, .L457
+	add	r3, r3, r3, lsl #1
+	ubfx	r3, r3, #2, #8
+	b	.L469
+.L457:
+	lsrs	r3, r3, #2
+.L469:
+	mov	r0, sl
+	str	r3, [sp, #12]
+	bl	NandcWaitFlashReady
+	ldr	r3, .L470+8
+	mov	r8, #0
+	mov	r4, #-1
+	ldr	r6, [r3, sl, lsl #3]
+	add	r3, r3, sl, lsl #3
+	ldrb	r7, [r3, #4]	@ zero_extendqisi2
+	adds	r7, r7, #8
+	lsls	r7, r7, #8
+	adds	r5, r6, r7
+	b	.L459
+.L463:
+	movs	r2, #239
+	movs	r3, #137
+	str	r2, [r5, #8]
+	movs	r0, #200
+	str	r3, [r5, #4]
+	bl	udelay
+	movs	r2, #0
+	add	ip, r8, #1
+	mov	r0, sl
+	str	ip, [r5, #0]
+	mov	r3, fp
+	str	r2, [r5, #0]
+	ldr	r1, [sp, #16]
+	str	r2, [r5, #0]
+	str	r2, [r5, #0]
+	ldr	r2, [sp, #20]
+	str	ip, [sp, #8]
+	bl	FlashReadRawPage
+	ldr	ip, [sp, #8]
+	adds	r2, r0, #1
+	beq	.L460
+	ldr	r3, [sp, #12]
+	cmp	r4, #-1
+	it	eq
+	moveq	r4, r0
+	cmp	r0, r3
+	bcc	.L467
+	mov	fp, #0
+	str	fp, [sp, #20]
+.L460:
+	mov	r8, ip
+.L459:
+	ldr	r2, .L470+12
+	ldrb	r3, [r2, #0]	@ zero_extendqisi2
+	cmp	r8, r3
+	bcc	.L463
+	b	.L462
+.L467:
+	mov	r4, r0
+.L462:
+	movs	r3, #239
+	movs	r0, #200
+	str	r3, [r5, #8]
+	movs	r3, #137
+	str	r3, [r5, #4]
+	bl	udelay
+	movs	r3, #0
+	str	r3, [r6, r7]
+	str	r3, [r6, r7]
+	str	r3, [r6, r7]
+	str	r3, [r6, r7]
+	ldr	r3, [sp, #12]
+	cmp	r4, r3
+	bcc	.L464
+	ldr	r0, .L470+16
+	mov	r1, r8
+	ldr	r2, [sp, #16]
+	mov	r3, r8
+	cmp	r4, #-1
+	ite	eq
+	moveq	r4, #-1
+	movne	r4, #256
+	str	r4, [sp, #0]
+	bl	printf
+.L464:
+	mov	r0, r4
+	add	sp, sp, #24
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L471:
+	.align	2
+.L470:
+	.word	.LANCHOR29
+	.word	.LANCHOR7
+	.word	.LANCHOR5
+	.word	.LANCHOR42
+	.word	.LC2
+	.size	MicronReadRetrial, .-MicronReadRetrial
+	.section	.text.SamsungReadRetrial,"ax",%progbits
+	.align	1
+	.global	SamsungReadRetrial
+	.thumb
+	.thumb_func
+	.type	SamsungReadRetrial, %function
+SamsungReadRetrial:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r7, r0
+	mov	r8, r2
+	mov	r6, r3
+	mov	fp, r1
+	bl	NandcWaitFlashReady
+	ldr	r3, .L482
+	movs	r5, #1
+	mov	r4, #-1
+	ldr	r2, [r3, r7, lsl #3]
+	add	r3, r3, r7, lsl #3
+	ldrb	sl, [r3, #4]	@ zero_extendqisi2
+	add	sl, sl, #8
+	add	sl, r2, sl, lsl #8
+	b	.L473
+.L477:
+	mov	r0, sl
+	uxtb	r1, r5
+	bl	SamsungSetRRPara
+	mov	r1, fp
+	mov	r0, r7
+	mov	r2, r8
+	mov	r3, r6
+	bl	FlashReadRawPage
+	adds	r1, r0, #1
+	beq	.L474
+	ldr	r2, .L482+4
+	cmp	r4, #-1
+	it	eq
+	moveq	r4, r0
+	ldrb	r3, [r2, #0]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r0, r3, lsr #2
+	bcc	.L480
+	movs	r6, #0
+	mov	r8, r6
+.L474:
+	adds	r5, r5, #1
+.L473:
+	ldr	r2, .L482+8
+	ldrb	r3, [r2, #0]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	cmp	r5, r3
+	bcc	.L477
+	b	.L476
+.L480:
+	mov	r4, r0
+.L476:
+	movs	r1, #0
+	mov	r0, sl
+	bl	SamsungSetRRPara
+	ldr	r3, .L482+4
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r4, r3, lsr #2
+	bcc	.L478
+	cmp	r4, #-1
+	ite	eq
+	moveq	r4, #-1
+	movne	r4, #256
+.L478:
+	mov	r0, r4
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L483:
+	.align	2
+.L482:
+	.word	.LANCHOR5
+	.word	.LANCHOR29
+	.word	.LANCHOR42
+	.size	SamsungReadRetrial, .-SamsungReadRetrial
+	.section	.text.ToshibaReadRetrial,"ax",%progbits
+	.align	1
+	.global	ToshibaReadRetrial
+	.thumb
+	.thumb_func
+	.type	ToshibaReadRetrial, %function
+ToshibaReadRetrial:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r7, r0
+	mov	fp, r2
+	mov	r8, r3
+	str	r1, [sp, #4]
+	bl	NandcWaitFlashReady
+	ldr	r3, .L506
+	ldr	r2, [r3, r7, lsl #3]
+	add	r3, r3, r7, lsl #3
+	ldrb	r4, [r3, #4]	@ zero_extendqisi2
+	ldr	r3, .L506+4
+	adds	r4, r4, #8
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	add	r4, r2, r4, lsl #8
+	subs	r3, r3, #67
+	cmp	r3, #1
+	bls	.L501
+	ldr	r3, .L506+8
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L502
+	movs	r0, #0
+	mov	sl, #1
+	bl	NandcSetDdrMode
+	b	.L486
+.L502:
+	mov	sl, r3
+.L486:
+	movs	r3, #92
+	str	r3, [r4, #8]
+	movs	r3, #197
+	str	r3, [r4, #8]
+	b	.L485
+.L501:
+	mov	sl, #0
+.L485:
+	movs	r6, #1
+	mov	r5, #-1
+	b	.L487
+.L496:
+	ldr	r1, .L506+4
+	mov	r0, r4
+	ldrb	r3, [r1, #0]	@ zero_extendqisi2
+	uxtb	r1, r6
+	subs	r3, r3, #67
+	cmp	r3, #1
+	bhi	.L488
+	bl	SandiskSetRRPara
+	b	.L489
+.L488:
+	bl	ToshibaSetRRPara
+.L489:
+	ldr	r2, .L506+4
+	ldrb	r3, [r2, #0]	@ zero_extendqisi2
+	cmp	r3, #34
+	bne	.L490
+	ldr	r1, .L506+12
+	ldrb	r3, [r1, #0]	@ zero_extendqisi2
+	subs	r3, r3, #3
+	cmp	r6, r3
+	bne	.L490
+	movs	r2, #179
+	str	r2, [r4, #8]
+.L490:
+	movs	r3, #38
+	str	r3, [r4, #8]
+	movs	r3, #93
+	str	r3, [r4, #8]
+	cmp	sl, #0
+	beq	.L491
+	movs	r0, #4
+	bl	NandcSetDdrMode
+	ldr	r1, [sp, #4]
+	mov	r2, fp
+	mov	r3, r8
+	mov	r0, r7
+	bl	FlashReadRawPage
+	mov	r3, r0
+	movs	r0, #0
+	str	r3, [sp, #0]
+	bl	NandcSetDdrMode
+	ldr	r3, [sp, #0]
+	b	.L492
+.L491:
+	mov	r3, r8
+	mov	r0, r7
+	ldr	r1, [sp, #4]
+	mov	r2, fp
+	bl	FlashReadRawPage
+	mov	r3, r0
+.L492:
+	adds	r0, r3, #1
+	beq	.L493
+	ldr	r1, .L506+16
+	cmp	r5, #-1
+	it	eq
+	moveq	r5, r3
+	ldrb	r2, [r1, #0]	@ zero_extendqisi2
+	add	r2, r2, r2, lsl #1
+	cmp	r3, r2, lsr #2
+	bcc	.L504
+	mov	r8, #0
+	mov	fp, r8
+.L493:
+	adds	r6, r6, #1
+.L487:
+	ldr	r2, .L506+12
+	ldrb	r3, [r2, #0]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	cmp	r6, r3
+	bcc	.L496
+	b	.L495
+.L504:
+	mov	r5, r3
+.L495:
+	ldr	r3, .L506+4
+	movs	r1, #0
+	mov	r0, r4
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	subs	r3, r3, #67
+	cmp	r3, #1
+	bhi	.L497
+	bl	SandiskSetRRPara
+	b	.L498
+.L497:
+	bl	ToshibaSetRRPara
+.L498:
+	movs	r3, #255
+	str	r3, [r4, #8]
+	ldr	r3, .L506+16
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r5, r3, lsr #2
+	bcc	.L499
+	cmp	r5, #-1
+	ite	eq
+	moveq	r5, #-1
+	movne	r5, #256
+.L499:
+	mov	r0, r7
+	bl	NandcWaitFlashReady
+	cmp	sl, #0
+	beq	.L500
+	movs	r0, #4
+	bl	NandcSetDdrMode
+.L500:
+	mov	r0, r5
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L507:
+	.align	2
+.L506:
+	.word	.LANCHOR5
+	.word	.LANCHOR11
+	.word	.LANCHOR35
+	.word	.LANCHOR42
+	.word	.LANCHOR29
+	.size	ToshibaReadRetrial, .-ToshibaReadRetrial
+	.section	.text.FlashSavePhyInfo,"ax",%progbits
+	.align	1
+	.global	FlashSavePhyInfo
+	.thumb
+	.thumb_func
+	.type	FlashSavePhyInfo, %function
+FlashSavePhyInfo:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	movs	r5, #0
+	ldr	r7, .L515
+	ldr	r8, .L515+60
+	ldr	sl, .L515+64
+	ldr	r3, [r7, #0]
+	ldr	fp, .L515+48
+	ldr	r6, .L515+4
+	str	r3, [r8, #0]
+	ldr	r3, .L515+8
+	ldrb	r0, [r3, #0]	@ zero_extendqisi2
+	bl	FlashBchSel
+	movs	r1, #0
+	mov	r2, #2048
+	ldr	r0, [r7, #0]
+	bl	memset
+	ldr	r0, [r8, #0]
+	ldr	r3, .L515+12
+	movs	r2, #32
+	ldr	r1, .L515+16
+	str	sl, [r0, #0]
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	strh	r3, [r0, #12]	@ movhi
+	ldr	r3, .L515+20
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	strh	r3, [r0, #14]	@ movhi
+	ldr	r3, .L515+24
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	str	r3, [r0, #1076]
+	adds	r0, r0, #16
+	bl	memcpy
+	ldr	r0, [r8, #0]
+	ldr	r1, .L515+28
+	movs	r2, #8
+	adds	r0, r0, #80
+	bl	memcpy
+	ldr	r0, [r8, #0]
+	ldr	r1, .L515+32
+	movs	r2, #32
+	adds	r0, r0, #96
+	bl	memcpy
+	ldr	r0, [r8, #0]
+	ldr	r1, .L515+36
+	movs	r2, #32
+	adds	r0, r0, #160
+	bl	memcpy
+	ldr	r0, [r8, #0]
+	ldr	r1, .L515+40
+	movs	r2, #32
+	adds	r0, r0, #192
+	bl	memcpy
+	ldr	r0, [r8, #0]
+	mov	r2, #852
+	ldr	r1, .L515+44
+	adds	r0, r0, #224
+	bl	memcpy
+	ldr	r4, [r8, #0]
+	movw	r1, #2036
+	add	r0, r4, #12
+	bl	JSHash
+	mov	r3, #1592
+	str	r3, [r4, #4]
+	ldr	r3, [fp, #0]
+	str	r3, [r8, #0]
+	str	r0, [r4, #8]
+	movs	r0, #0
+	bl	flash_enter_slc_mode
+	mov	r4, r5
+.L511:
+	movs	r0, #0
+	ldr	r1, [r6, #0]
+	mov	r2, r0
+	muls	r1, r4, r1
+	bl	FlashEraseBlock
+	movs	r0, #0
+	ldr	r1, [r6, #0]
+	mov	r3, r0
+	muls	r1, r4, r1
+	ldr	r2, [r7, #0]
+	bl	FlashProgPage
+	movs	r0, #0
+	ldr	r1, [r6, #0]
+	mov	r3, r0
+	muls	r1, r4, r1
+	ldr	r2, [r7, #0]
+	adds	r1, r1, #1
+	bl	FlashProgPage
+	ldr	r3, .L515+48
+	movs	r0, #0
+	ldr	r1, [r6, #0]
+	muls	r1, r4, r1
+	ldr	r2, [r3, #0]
+	mov	r3, r0
+	bl	FlashReadRawPage
+	adds	r0, r0, #1
+	beq	.L509
+	ldr	fp, [r8, #0]
+	ldr	r3, [fp, #0]
+	cmp	r3, sl
+	bne	.L509
+	add	r0, fp, #12
+	movw	r1, #2036
+	bl	JSHash
+	ldr	r3, [fp, #8]
+	cmp	r3, r0
+	bne	.L509
+	ldr	r3, .L515+52
+	adds	r2, r4, #1
+	adds	r5, r5, #1
+	str	r2, [r3, #0]
+	ldr	r3, .L515+56
+	ldr	r2, [r6, #0]
+	muls	r2, r4, r2
+	cmp	r5, #1
+	str	r2, [r3, #0]
+	bhi	.L510
+.L509:
+	adds	r4, r4, #1
+	cmp	r4, #4
+	bne	.L511
+.L510:
+	movs	r0, #0
+	bl	flash_exit_slc_mode
+	cmp	r5, #0
+	ite	eq
+	moveq	r0, #-1
+	movne	r0, #0
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L516:
+	.align	2
+.L515:
+	.word	.LANCHOR44
+	.word	.LANCHOR2
+	.word	.LANCHOR45
+	.word	.LANCHOR16
+	.word	.LANCHOR22
+	.word	.LANCHOR1
+	.word	.LANCHOR35
+	.word	.LANCHOR19
+	.word	.LANCHOR20
+	.word	.LANCHOR18
+	.word	.LANCHOR6
+	.word	.LANCHOR31
+	.word	.LANCHOR41
+	.word	.LANCHOR46
+	.word	.LANCHOR47
+	.word	.LANCHOR43
+	.word	1312902724
+	.size	FlashSavePhyInfo, .-FlashSavePhyInfo
+	.section	.text.FlashReadIdbDataRaw,"ax",%progbits
+	.align	1
+	.global	FlashReadIdbDataRaw
+	.thumb
+	.thumb_func
+	.type	FlashReadIdbDataRaw, %function
+FlashReadIdbDataRaw:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, lr}
+	movs	r2, #4
+	mov	r8, r0
+	ldr	r1, .L528
+	add	r0, sp, #12
+	bl	memcpy
+	ldr	r3, .L528+4
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	str	r3, [sp, #4]
+	ldr	r3, .L528+8
+	ldr	r2, [r3, #0]
+	ldr	r3, .L528+12
+	cmp	r2, r3
+	bne	.L518
+	movs	r0, #0
+	bl	flash_enter_slc_mode
+.L518:
+	mov	r0, r8
+	movs	r1, #0
+	mov	r2, #2048
+	mov	r7, #-1
+	bl	memset
+	movs	r4, #2
+	ldr	sl, .L528+32
+	ldr	fp, .L528+36
+	ldr	r6, .L528+16
+	b	.L519
+.L526:
+	movs	r5, #0
+.L521:
+	add	r3, sp, #12
+	ldrb	r0, [r3, r5]	@ zero_extendqisi2
+	bl	FlashBchSel
+	ldr	r3, .L528+16
+	movs	r0, #0
+	ldr	r1, [fp, #0]
+	muls	r1, r4, r1
+	ldr	r2, [r3, #0]
+	mov	r3, r0
+	bl	FlashReadRawPage
+	adds	r0, r0, #1
+	bne	.L520
+	adds	r5, r5, #1
+	cmp	r5, #4
+	bne	.L521
+	b	.L522
+.L520:
+	ldr	r3, [r6, #0]
+	ldr	r2, [r3, #0]
+	ldr	r3, .L528+20
+	cmp	r2, r3
+	bne	.L522
+	add	r3, sp, #16
+	ldr	r0, .L528+24
+	adds	r5, r3, r5
+	ldrb	r1, [r5, #-4]	@ zero_extendqisi2
+	bl	printf
+	mov	r2, #2048
+	mov	r0, r8
+	ldr	r1, [r6, #0]
+	bl	memcpy
+	ldr	r3, [r6, #0]
+	ldr	r3, [r3, #512]
+	strb	r3, [sl, #0]
+	ldr	r3, .L528+28
+	ldr	r2, [r3, #0]
+	cmp	r2, r4
+	bls	.L525
+	str	r4, [r3, #0]
+	movs	r7, #0
+	bl	FlashSavePhyInfo
+.L522:
+	adds	r4, r4, #1
+.L519:
+	ldrb	r3, [sl, #0]	@ zero_extendqisi2
+	cmp	r4, r3
+	bcc	.L526
+	b	.L523
+.L525:
+	movs	r7, #0
+.L523:
+	ldr	r0, [sp, #4]
+	bl	FlashBchSel
+	ldr	r3, .L528+8
+	ldr	r2, [r3, #0]
+	ldr	r3, .L528+12
+	cmp	r2, r3
+	bne	.L524
+	movs	r0, #0
+	bl	flash_exit_slc_mode
+.L524:
+	mov	r0, r7
+	add	sp, sp, #16
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L529:
+	.align	2
+.L528:
+	.word	.LANCHOR48
+	.word	.LANCHOR29
+	.word	.LANCHOR40
+	.word	1446522928
+	.word	.LANCHOR44
+	.word	-52655045
+	.word	.LC3
+	.word	.LANCHOR46
+	.word	.LANCHOR1
+	.word	.LANCHOR2
+	.size	FlashReadIdbDataRaw, .-FlashReadIdbDataRaw
+	.section	.text.FlashLoadPhyInfo,"ax",%progbits
+	.align	1
+	.global	FlashLoadPhyInfo
+	.thumb
+	.thumb_func
+	.type	FlashLoadPhyInfo, %function
+FlashLoadPhyInfo:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, lr}
+	movs	r2, #4
+	ldr	sl, .L542+40
+	add	r0, sp, #12
+	ldr	r1, .L542
+	movs	r4, #0
+	bl	memcpy
+	ldr	r5, .L542+4
+	ldr	r3, [sl, #0]
+	mov	r0, r4
+	ldr	r6, .L542+8
+	mov	r8, #4
+	mov	r7, #-1
+	str	r3, [r5, #0]
+	ldr	r3, .L542+12
+	ldrh	r2, [r6, #10]
+	str	r4, [r3, #0]
+	str	r2, [sp, #4]
+	bl	flash_enter_slc_mode
+	b	.L531
+.L533:
+	add	r3, sp, #12
+	ldrb	r0, [r3, r6]	@ zero_extendqisi2
+	bl	FlashBchSel
+	movs	r0, #0
+	mov	r1, r4
+	ldr	r2, [sl, #0]
+	mov	r3, r0
+	bl	FlashReadRawPage
+	adds	r0, r0, #1
+	bne	.L532
+	movs	r0, #0
+	mov	r1, fp
+	ldr	r2, [sl, #0]
+	mov	r3, r0
+	bl	FlashReadRawPage
+	adds	r0, r0, #1
+	bne	.L532
+	adds	r6, r6, #1
+	cmp	r6, #4
+	beq	.L534
+	b	.L533
+.L532:
+	ldr	r6, [r5, #0]
+	ldr	r2, .L542+16
+	ldr	r3, [r6, #0]
+	cmp	r3, r2
+	bne	.L534
+	cbnz	r7, .L535
+	ldr	r3, .L542+8
+	mov	r0, r4
+	ldrh	r1, [r3, #10]
+	bl	__aeabi_uidiv
+	ldr	r3, .L542+20
+	adds	r0, r0, #1
+	str	r0, [r3, #0]
+	mov	r0, r7
+	b	.L541
+.L535:
+	add	r0, r6, #12
+	movw	r1, #2036
+	bl	JSHash
+	ldr	r3, [r6, #8]
+	cmp	r3, r0
+	bne	.L534
+	add	r1, r6, #160
+	movs	r2, #32
+	ldr	r0, .L542+8
+	bl	memcpy
+	ldr	r1, [r5, #0]
+	movs	r2, #32
+	ldr	r0, .L542+24
+	adds	r1, r1, #192
+	bl	memcpy
+	ldr	r1, [r5, #0]
+	mov	r2, #852
+	ldr	r0, .L542+28
+	adds	r1, r1, #224
+	bl	memcpy
+	ldr	r6, [r5, #0]
+	ldr	r3, .L542+32
+	mov	r0, r4
+	ldr	r2, [r6, #1076]
+	strb	r2, [r3, #0]
+	ldr	r3, .L542+12
+	str	r4, [r3, #0]
+	ldr	r3, .L542+8
+	ldrh	r1, [r3, #10]
+	bl	__aeabi_uidiv
+	ldr	r3, .L542+20
+	adds	r0, r0, #1
+	str	r0, [r3, #0]
+	cmp	r0, #1
+	bne	.L537
+	movs	r2, #2
+	str	r2, [r3, #0]
+.L537:
+	ldrh	r2, [r6, #14]
+	movs	r7, #0
+	ldr	r3, .L542+36
+	strb	r2, [r3, #0]
+.L534:
+	ldr	r2, [sp, #4]
+	subs	r8, r8, #1
+	add	r4, r4, r2
+	beq	.L538
+.L531:
+	add	fp, r4, #1
+	movs	r6, #0
+	b	.L533
+.L538:
+	mov	r0, r8
+.L541:
+	bl	flash_exit_slc_mode
+	mov	r0, r7
+	add	sp, sp, #16
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L543:
+	.align	2
+.L542:
+	.word	.LANCHOR48
+	.word	.LANCHOR43
+	.word	.LANCHOR18
+	.word	.LANCHOR47
+	.word	1312902724
+	.word	.LANCHOR46
+	.word	.LANCHOR6
+	.word	.LANCHOR31
+	.word	.LANCHOR35
+	.word	.LANCHOR49
+	.word	.LANCHOR44
+	.size	FlashLoadPhyInfo, .-FlashLoadPhyInfo
+	.section	.text.FlashDdrTunningRead,"ax",%progbits
+	.align	1
+	.global	FlashDdrTunningRead
+	.thumb
+	.thumb_func
+	.type	FlashDdrTunningRead, %function
+FlashDdrTunningRead:
+	@ args = 4, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	sl, r3
+	ldr	r3, .L564
+	sub	sp, sp, #24
+	mov	fp, r2
+	str	r0, [sp, #8]
+	ldr	r3, [r3, #0]
+	str	r1, [sp, #12]
+	ldr	r3, [r3, #304]
+	str	r3, [sp, #20]
+	ldr	r3, .L564+4
+	ldr	r7, [r3, #0]
+	ldr	r3, [sp, #56]
+	cmp	r7, #7
+	ite	hi
+	movhi	r7, #12
+	movls	r7, #6
+	cbz	r3, .L556
+	movs	r0, #1
+	ldr	r4, .L564+8
+	bl	FlashSetInterfaceMode
+	movs	r0, #1
+	bl	NandcSetMode
+	ldr	r0, [sp, #8]
+	bl	FlashReset
+	ldr	r1, [sp, #12]
+	mov	r2, fp
+	mov	r3, sl
+	ldr	r0, [sp, #8]
+	bl	FlashReadRawPage
+	mov	r8, r0
+	ldrb	r0, [r4, #0]	@ zero_extendqisi2
+	bl	FlashSetInterfaceMode
+	ldrb	r0, [r4, #0]	@ zero_extendqisi2
+	bl	NandcSetMode
+	cmp	r8, #-1
+	beq	.L547
+	mov	r2, r8
+	ldr	r0, .L564+12
+	ldr	r1, [sp, #12]
+	bl	printf
+	ldr	r3, .L564+16
+	ldr	r2, [r3, #0]
+	adds	r2, r2, #1
+	str	r2, [r3, #0]
+	cmp	r2, #2048
+	bcc	.L547
+	movs	r2, #0
+	str	r2, [r3, #0]
+	mov	sl, r2
+	mov	fp, r2
+	b	.L546
+.L556:
+	mov	r8, #1024
+.L546:
+	movs	r4, #0
+	mov	r6, #-1
+	mov	ip, r4
+	mov	r5, r4
+	str	r4, [sp, #16]
+.L552:
+	uxtb	r0, r7
+	str	ip, [sp, #4]
+	bl	NandcSetDdrPara
+	mov	r3, sl
+	ldr	r0, [sp, #8]
+	mov	r2, fp
+	ldr	r1, [sp, #12]
+	bl	FlashReadRawPage
+	add	r3, r8, #1
+	ldr	ip, [sp, #4]
+	cmp	r0, r3
+	bhi	.L548
+	cmp	r0, #2
+	bhi	.L558
+	adds	r5, r5, #1
+	cmp	r5, #9
+	bls	.L558
+	subs	r4, r7, r5
+	mov	r8, r0
+	movs	r6, #0
+	b	.L550
+.L548:
+	cmp	ip, r5
+	bcs	.L559
+	cmp	r5, #7
+	rsb	r3, r5, r4
+	str	r3, [sp, #16]
+	bhi	.L551
+	mov	ip, r5
+	b	.L559
+.L558:
+	movs	r6, #0
+	mov	r4, r7
+	mov	r8, r0
+	mov	sl, r6
+	mov	fp, r6
+	b	.L549
+.L559:
+	movs	r5, #0
+.L549:
+	adds	r7, r7, #2
+	cmp	r7, #69
+	bls	.L552
+.L550:
+	cmp	ip, r5
+	bcc	.L553
+.L551:
+	ldr	r4, [sp, #16]
+.L553:
+	cbz	r4, .L554
+	ldr	r0, .L564+20
+	mov	r1, r4
+	bl	printf
+	uxtb	r0, r4
+	bl	NandcSetDdrPara
+.L554:
+	cbz	r6, .L547
+	ldr	r0, .L564+24
+	ldr	r1, [sp, #8]
+	ldr	r2, [sp, #12]
+	bl	printf
+	ldr	r3, [sp, #56]
+	cbz	r3, .L561
+	ldr	r3, [sp, #20]
+	ubfx	r0, r3, #8, #8
+	bl	NandcSetDdrPara
+	b	.L547
+.L561:
+	mov	r8, r6
+.L547:
+	mov	r0, r8
+	add	sp, sp, #24
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L565:
+	.align	2
+.L564:
+	.word	.LANCHOR30
+	.word	.LANCHOR37
+	.word	.LANCHOR34
+	.word	.LC4
+	.word	.LANCHOR50
+	.word	.LC5
+	.word	.LC6
+	.size	FlashDdrTunningRead, .-FlashDdrTunningRead
+	.section	.text.FlashDdrParaScan,"ax",%progbits
+	.align	1
+	.global	FlashDdrParaScan
+	.thumb
+	.thumb_func
+	.type	FlashDdrParaScan, %function
+FlashDdrParaScan:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	mov	r6, r0
+	ldr	r5, .L571
+	movs	r4, #0
+	mov	r7, r1
+	ldrb	r0, [r5, #0]	@ zero_extendqisi2
+	bl	FlashSetInterfaceMode
+	ldrb	r0, [r5, #0]	@ zero_extendqisi2
+	bl	NandcSetMode
+	mov	r1, r7
+	mov	r2, r4
+	mov	r3, r4
+	mov	r0, r6
+	str	r4, [sp, #0]
+	bl	FlashDdrTunningRead
+	mov	r1, r7
+	mov	r2, r4
+	mov	r3, r4
+	mov	r8, r0
+	mov	r0, r6
+	bl	FlashReadRawPage
+	adds	r0, r0, #1
+	beq	.L567
+	cmp	r8, #-1
+	bne	.L568
+.L567:
+	ldrb	r3, [r5, #0]	@ zero_extendqisi2
+	lsls	r3, r3, #31
+	bpl	.L568
+	movs	r0, #1
+	bl	FlashSetInterfaceMode
+	movs	r0, #1
+	bl	NandcSetMode
+	movs	r2, #0
+	b	.L570
+.L568:
+	movs	r2, #1
+.L570:
+	ldr	r3, .L571+4
+	movs	r0, #0
+	strb	r2, [r3, #0]
+	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
+.L572:
+	.align	2
+.L571:
+	.word	.LANCHOR34
+	.word	.LANCHOR35
+	.size	FlashDdrParaScan, .-FlashDdrParaScan
+	.section	.text.FlashReadPage,"ax",%progbits
+	.align	1
+	.global	FlashReadPage
+	.thumb
+	.thumb_func
+	.type	FlashReadPage, %function
+FlashReadPage:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	sl, r3
+	mov	r5, r0
+	mov	r7, r1
+	mov	r8, r2
+	bl	FlashReadRawPage
+	adds	r3, r0, #1
+	mov	r4, r0
+	bne	.L574
+	ldr	r6, .L579
+	ldrb	fp, [r6, #0]	@ zero_extendqisi2
+	cmp	fp, #0
+	beq	.L575
+	movs	r3, #0
+	mov	r0, r5
+	strb	r3, [r6, #0]
+	mov	r1, r7
+	mov	r2, r8
+	mov	r3, sl
+	bl	FlashReadRawPage
+	strb	fp, [r6, #0]
+	adds	r6, r0, #1
+	bne	.L578
+.L575:
+	ldr	r3, .L579+4
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L574
+	ldr	r3, .L579+8
+	mov	r0, r5
+	mov	r1, r7
+	mov	r2, r8
+	ldr	r3, [r3, #0]
+	ldr	r6, [r3, #304]
+	movs	r3, #1
+	str	r3, [sp, #0]
+	mov	r3, sl
+	bl	FlashDdrTunningRead
+	mov	r4, r0
+	adds	r0, r0, #1
+	beq	.L576
+	ldr	r3, .L579+12
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cmp	r4, r3, lsr #1
+	bls	.L574
+.L576:
+	ubfx	r0, r6, #8, #8
+	bl	NandcSetDdrPara
+	b	.L574
+.L578:
+	mov	r4, r0
+.L574:
+	ldr	fp, .L579+24
+	ldr	r6, [fp, #0]
+	cbz	r6, .L577
+	adds	r1, r4, #1
+	bne	.L577
+	mov	r1, r7
+	mov	r2, r8
+	mov	r3, sl
+	mov	r0, r5
+	blx	r6
+	mov	r2, r5
+	mov	r3, r7
+	mov	r4, r0
+	ldr	r0, .L579+16
+	mov	r1, r4
+	bl	printf
+	adds	r2, r4, #1
+	bne	.L577
+	ldr	r3, .L579+20
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L577
+	mov	r0, r5
+	bl	flash_enter_slc_mode
+	ldr	r4, [fp, #0]
+	mov	r0, r5
+	mov	r1, r7
+	mov	r2, r8
+	mov	r3, sl
+	blx	r4
+	mov	r4, r0
+.L577:
+	mov	r0, r4
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L580:
+	.align	2
+.L579:
+	.word	.LANCHOR4
+	.word	.LANCHOR35
+	.word	.LANCHOR30
+	.word	.LANCHOR29
+	.word	.LC7
+	.word	.LANCHOR7
+	.word	.LANCHOR51
+	.size	FlashReadPage, .-FlashReadPage
+	.section	.text.Ftl_log2,"ax",%progbits
+	.align	1
+	.global	Ftl_log2
+	.thumb
+	.thumb_func
+	.type	Ftl_log2, %function
+Ftl_log2:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	movs	r2, #1
+	movs	r3, #0
+	b	.L582
+.L583:
+	adds	r3, r3, #1
+	lsls	r2, r2, #1
+	uxth	r3, r3
+.L582:
+	cmp	r2, r0
+	bls	.L583
+	subs	r3, r3, #1
+	uxth	r0, r3
+	bx	lr
+	.size	Ftl_log2, .-Ftl_log2
+	.section	.text.FtlPrintInfo,"ax",%progbits
+	.align	1
+	.global	FtlPrintInfo
+	.thumb
+	.thumb_func
+	.type	FtlPrintInfo, %function
+FtlPrintInfo:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	FtlPrintInfo, .-FtlPrintInfo
+	.section	.text.FtlSysBlkNumInit,"ax",%progbits
+	.align	1
+	.global	FtlSysBlkNumInit
+	.thumb
+	.thumb_func
+	.type	FtlSysBlkNumInit, %function
+FtlSysBlkNumInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L588
+	cmp	r0, #23
+	it	ls
+	movls	r0, #24
+	ldr	r2, .L588+4
+	str	r0, [r3, #0]
+	ldr	r3, .L588+8
+	ldrh	r3, [r3, #0]
+	muls	r3, r0, r3
+	str	r3, [r2, #0]
+	ldr	r2, .L588+12
+	ldrh	r2, [r2, #0]
+	subs	r0, r2, r0
+	ldr	r2, .L588+16
+	strh	r0, [r2, #0]	@ movhi
+	movs	r0, #0
+	ldr	r2, .L588+20
+	ldr	r2, [r2, #0]
+	subs	r3, r2, r3
+	ldr	r2, .L588+24
+	str	r3, [r2, #0]
+	bx	lr
+.L589:
+	.align	2
+.L588:
+	.word	.LANCHOR52
+	.word	.LANCHOR54
+	.word	.LANCHOR53
+	.word	.LANCHOR56
+	.word	.LANCHOR55
+	.word	.LANCHOR58
+	.word	.LANCHOR57
+	.size	FtlSysBlkNumInit, .-FtlSysBlkNumInit
+	.global	__aeabi_idiv
+	.section	.text.FtlConstantsInit,"ax",%progbits
+	.align	1
+	.global	FtlConstantsInit
+	.thumb
+	.thumb_func
+	.type	FtlConstantsInit, %function
+FtlConstantsInit:
+	@ args = 0, pretend = 0, frame = 32
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r4, r0
+	ldrh	r7, [r0, #8]
+	sub	sp, sp, #32
+	ldr	r3, .L605
+	ldrh	r1, [r0, #10]
+	ldrh	r0, [r0, #12]
+	strh	r7, [r3, #0]	@ movhi
+	ldr	r3, .L605+4
+	ldrh	ip, [r4, #14]
+	ldr	r2, .L605+8
+	strh	r1, [r3, #0]	@ movhi
+	ldr	r3, .L605+12
+	strh	r0, [r3, #0]	@ movhi
+	ldr	r3, .L605+16
+	strh	ip, [r3, #0]	@ movhi
+	movs	r3, #0
+.L591:
+	strb	r3, [r3, r2]
+	adds	r3, r3, #1
+	cmp	r3, #32
+	bne	.L591
+	ldrh	r2, [r4, #14]
+	ldrh	r3, [r4, #20]
+	cmp	r3, r2, lsr #8
+	bcs	.L592
+	ldr	r3, .L605+8
+	uxtb	sl, r0
+	movs	r2, #0
+	subs	r6, r3, r0
+	str	r6, [sp, #24]
+	subs	r6, r1, #1
+	lsl	r8, sl, #1
+	mla	r6, r0, r6, r3
+	uxtb	r8, r8
+	rsb	r5, r8, #0
+	uxtb	r5, r5
+	str	r6, [sp, #28]
+	b	.L593
+.L594:
+	ldr	r2, [sp, #12]
+	add	fp, r6, r5
+	add	lr, lr, #1
+	strb	fp, [r2, r3]
+	ldr	r2, [sp, #20]
+	add	fp, r6, r2
+	ldr	r2, [sp, #16]
+	strb	fp, [r2, r3]
+	b	.L595
+.L603:
+	ldr	fp, [sp, #24]
+	movs	r3, #0
+	mov	r6, r3
+	mov	lr, r3
+	add	fp, fp, r2
+	str	fp, [sp, #12]
+	ldr	fp, [sp, #28]
+	str	r2, [sp, #4]
+	add	fp, fp, r2
+	str	fp, [sp, #16]
+	add	fp, r5, sl
+	str	fp, [sp, #20]
+.L595:
+	add	r6, r6, r8
+	cmp	lr, r1
+	add	r3, r3, r0
+	uxtb	r6, r6
+	bcc	.L594
+	ldr	r2, [sp, #4]
+	adds	r5, r5, #1
+	adds	r2, r2, #1
+	uxtb	r5, r5
+.L593:
+	cmp	r2, r0
+	bcc	.L603
+	ldr	r3, .L605+4
+	lsls	r1, r1, #1
+	lsr	ip, ip, #1
+	strh	r1, [r3, #0]	@ movhi
+	ldr	r3, .L605+16
+	strh	ip, [r3, #0]	@ movhi
+.L592:
+	ldr	r3, .L605+20
+	movs	r2, #5
+	movs	r1, #0
+	cmp	r7, #1
+	strh	r2, [r3, #0]	@ movhi
+	ldr	r2, .L605+24
+	it	eq
+	strheq	r7, [r3, #0]	@ movhi
+	ldr	r3, .L605+28
+	strh	r1, [r2, #0]	@ movhi
+	mov	r2, #4352
+	strh	r2, [r3, #0]	@ movhi
+	ldr	r2, .L605+32
+	ldrb	r8, [r2, #0]	@ zero_extendqisi2
+	cmp	r8, #0
+	beq	.L597
+	mov	r2, #384
+	strh	r2, [r3, #0]	@ movhi
+.L597:
+	ldr	r3, .L605+4
+	ldrh	r5, [r3, #0]
+	muls	r5, r0, r5
+	ldr	r3, .L605+36
+	uxth	r5, r5
+	strh	r5, [r3, #0]	@ movhi
+	ldr	r3, .L605+16
+	ldrh	r6, [r3, #0]
+	muls	r0, r6, r0
+	ldr	r3, .L605+40
+	uxth	r0, r0
+	strh	r0, [r3, #0]	@ movhi
+	bl	Ftl_log2
+	ldr	r3, .L605+44
+	ldrh	fp, [r4, #16]
+	ldrh	r1, [r4, #18]
+	ldrh	sl, [r4, #20]
+	mul	r2, fp, r5
+	strh	r0, [r3, #0]	@ movhi
+	mov	r0, sl
+	ldr	r3, .L605+48
+	strh	fp, [r3, #0]	@ movhi
+	ldr	r3, .L605+52
+	strh	r1, [r3, #0]	@ movhi
+	ldr	r3, .L605+56
+	strh	r2, [r3, #0]	@ movhi
+	ldr	r3, .L605+60
+	strh	sl, [r3, #0]	@ movhi
+	str	r1, [sp, #8]
+	bl	Ftl_log2
+	ldr	r3, .L605+64
+	ldr	r2, .L605+68
+	ldr	r1, [sp, #8]
+	mul	r1, r1, sl
+	strh	r0, [r3, #0]	@ movhi
+	lsl	r3, sl, #9
+	mov	r7, r0
+	uxth	r3, r3
+	strh	r3, [r2, #0]	@ movhi
+	ldr	r2, .L605+72
+	lsrs	r3, r3, #8
+	cmp	r6, #1024
+	strh	r3, [r2, #0]	@ movhi
+	ldrh	r2, [r4, #26]
+	ldr	r3, .L605+76
+	ldr	r4, .L605+28
+	strh	r2, [r3, #0]	@ movhi
+	mul	r2, r6, r5
+	ldr	r3, .L605+80
+	ldrh	r0, [r4, #0]
+	str	r2, [r3, #0]
+	it	hi
+	uxtbhi	r2, r6
+	ldr	r3, .L605+24
+	it	hi
+	strhhi	r2, [r3, #0]	@ movhi
+	lsls	r0, r0, #3
+	ldrh	r2, [r3, #0]
+	ldr	r3, .L605+84
+	subs	r2, r6, r2
+	muls	r2, r5, r2
+	mul	r2, sl, r2
+	mul	fp, fp, r2
+	asr	r2, fp, #11
+	str	r2, [r3, #0]
+	bl	__aeabi_idiv
+	ldr	r3, .L605+88
+	uxth	r0, r0
+	strh	r0, [r3, #0]	@ movhi
+	cmp	r0, #4
+	bhi	.L599
+	movs	r2, #4
+	strh	r2, [r3, #0]	@ movhi
+.L599:
+	cmp	r8, #0
+	beq	.L600
+	mov	r3, #640
+	strh	r3, [r4, #0]	@ movhi
+.L600:
+	ldrh	r2, [r4, #0]
+	lsls	r6, r6, #6
+	ldr	r3, .L605+92
+	mov	r1, r5
+	ldr	r4, .L605+96
+	asr	r2, r2, r7
+	adds	r7, r7, #9
+	asr	r6, r6, r7
+	adds	r2, r2, #2
+	strh	r2, [r3, #0]	@ movhi
+	uxth	r6, r6
+	ldr	r3, .L605+100
+	mul	r2, r5, r6
+	strh	r6, [r3, #0]	@ movhi
+	ldr	r3, .L605+104
+	adds	r6, r6, #8
+	str	r2, [r3, #0]
+	ldr	r3, .L605+88
+	ldrh	r0, [r3, #0]
+	bl	__aeabi_uidiv
+	cmp	r5, #1
+	uxtah	r6, r6, r0
+	str	r6, [r4, #0]
+	bne	.L601
+	adds	r6, r6, #4
+	str	r6, [r4, #0]
+.L601:
+	ldrh	r0, [r4, #0]
+	bl	FtlSysBlkNumInit
+	ldr	r2, [r4, #0]
+	ldr	r3, .L605+108
+	str	r2, [r3, #0]
+	ldr	r3, .L605+112
+	ldr	r2, [r3, #0]
+	ldr	r3, .L605+48
+	lsls	r2, r2, #2
+	ldrh	r3, [r3, #0]
+	muls	r2, r3, r2
+	ldr	r3, .L605+64
+	ldrh	r3, [r3, #0]
+	adds	r3, r3, #9
+	lsr	r2, r2, r3
+	ldr	r3, .L605+116
+	adds	r2, r2, #2
+	strh	r2, [r3, #0]	@ movhi
+	movs	r2, #24
+	ldr	r3, .L605+120
+	strh	r2, [r3, #0]	@ movhi
+	movs	r2, #0
+	ldr	r3, .L605+124
+	str	r2, [r3, #0]
+	ldr	r2, .L605+88
+	ldrh	r0, [r2, #0]
+	adds	r3, r0, #3
+	strh	r3, [r2, #0]	@ movhi
+	ldr	r3, .L605+104
+	ldr	r1, [r3, #0]
+	adds	r4, r1, #3
+	str	r4, [r3, #0]
+	ldr	r4, .L605+128
+	ldrb	r4, [r4, #0]	@ zero_extendqisi2
+	cbz	r4, .L602
+	adds	r0, r0, #4
+	adds	r1, r1, #5
+	strh	r0, [r2, #0]	@ movhi
+	str	r1, [r3, #0]
+.L602:
+	movs	r0, #0
+	add	sp, sp, #32
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L606:
+	.align	2
+.L605:
+	.word	.LANCHOR59
+	.word	.LANCHOR60
+	.word	.LANCHOR62
+	.word	.LANCHOR61
+	.word	.LANCHOR56
+	.word	.LANCHOR63
+	.word	.LANCHOR64
+	.word	.LANCHOR65
+	.word	.LANCHOR0
+	.word	.LANCHOR53
+	.word	.LANCHOR66
+	.word	.LANCHOR67
+	.word	.LANCHOR68
+	.word	.LANCHOR69
+	.word	.LANCHOR70
+	.word	.LANCHOR71
+	.word	.LANCHOR72
+	.word	.LANCHOR73
+	.word	.LANCHOR74
+	.word	.LANCHOR75
+	.word	.LANCHOR58
+	.word	.LANCHOR76
+	.word	.LANCHOR77
+	.word	.LANCHOR78
+	.word	.LANCHOR52
+	.word	.LANCHOR79
+	.word	.LANCHOR80
+	.word	.LANCHOR81
+	.word	.LANCHOR57
+	.word	.LANCHOR82
+	.word	.LANCHOR83
+	.word	.LANCHOR84
+	.word	.LANCHOR7
+	.size	FtlConstantsInit, .-FtlConstantsInit
+	.section	.text.IsBlkInVendorPart,"ax",%progbits
+	.align	1
+	.global	IsBlkInVendorPart
+	.thumb
+	.thumb_func
+	.type	IsBlkInVendorPart, %function
+IsBlkInVendorPart:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L614
+	push	{r4, lr}
+	ldrh	r3, [r3, #0]
+	cbz	r3, .L612
+	ldr	r3, .L614+4
+	ldrh	r1, [r3, #0]
+	ldr	r3, .L614+8
+	ldr	r2, [r3, #0]
+	movs	r3, #0
+	b	.L609
+.L611:
+	ldrh	r4, [r2], #2
+	cmp	r4, r0
+	beq	.L613
+	adds	r3, r3, #1
+	uxth	r3, r3
+.L609:
+	cmp	r3, r1
+	bne	.L611
+	movs	r0, #0
+	pop	{r4, pc}
+.L613:
+	movs	r0, #1
+	pop	{r4, pc}
+.L612:
+	mov	r0, r3
+	pop	{r4, pc}
+.L615:
+	.align	2
+.L614:
+	.word	.LANCHOR85
+	.word	.LANCHOR77
+	.word	.LANCHOR86
+	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
+	.section	.text.FtlGetCap,"ax",%progbits
+	.align	1
+	.global	FtlGetCap
+	.thumb
+	.thumb_func
+	.type	FtlGetCap, %function
+FtlGetCap:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L617
+	ldr	r0, [r3, #0]
+	bx	lr
+.L618:
+	.align	2
+.L617:
+	.word	.LANCHOR84
+	.size	FtlGetCap, .-FtlGetCap
+	.section	.text.FtlGetCapacity,"ax",%progbits
+	.align	1
+	.global	FtlGetCapacity
+	.thumb
+	.thumb_func
+	.type	FtlGetCapacity, %function
+FtlGetCapacity:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L620
+	ldr	r0, [r3, #0]
+	bx	lr
+.L621:
+	.align	2
+.L620:
+	.word	.LANCHOR84
+	.size	FtlGetCapacity, .-FtlGetCapacity
+	.section	.text.ftl_get_density,"ax",%progbits
+	.align	1
+	.global	ftl_get_density
+	.thumb
+	.thumb_func
+	.type	ftl_get_density, %function
+ftl_get_density:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L623
+	ldr	r0, [r3, #0]
+	bx	lr
+.L624:
+	.align	2
+.L623:
+	.word	.LANCHOR84
+	.size	ftl_get_density, .-ftl_get_density
+	.section	.text.FtlGetLpn,"ax",%progbits
+	.align	1
+	.global	FtlGetLpn
+	.thumb
+	.thumb_func
+	.type	FtlGetLpn, %function
+FtlGetLpn:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L626
+	ldr	r0, [r3, #0]
+	bx	lr
+.L627:
+	.align	2
+.L626:
+	.word	.LANCHOR87
+	.size	FtlGetLpn, .-FtlGetLpn
+	.section	.text.FtlGetCurEraseBlock,"ax",%progbits
+	.align	1
+	.global	FtlGetCurEraseBlock
+	.thumb
+	.thumb_func
+	.type	FtlGetCurEraseBlock, %function
+FtlGetCurEraseBlock:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r2, .L629
+	ldr	r3, .L629+4
+	ldr	r0, [r2, #0]
+	ldrh	r3, [r3, #0]
+	muls	r0, r3, r0
+	bx	lr
+.L630:
+	.align	2
+.L629:
+	.word	.LANCHOR88
+	.word	.LANCHOR53
+	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
+	.section	.text.FtlGetAllBlockNum,"ax",%progbits
+	.align	1
+	.global	FtlGetAllBlockNum
+	.thumb
+	.thumb_func
+	.type	FtlGetAllBlockNum, %function
+FtlGetAllBlockNum:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r2, .L632
+	ldr	r3, .L632+4
+	ldrh	r0, [r2, #0]
+	ldrh	r3, [r3, #0]
+	muls	r0, r3, r0
+	bx	lr
+.L633:
+	.align	2
+.L632:
+	.word	.LANCHOR53
+	.word	.LANCHOR56
+	.size	FtlGetAllBlockNum, .-FtlGetAllBlockNum
+	.section	.text.FtlBbmMapBadBlock,"ax",%progbits
+	.align	1
+	.global	FtlBbmMapBadBlock
+	.thumb
+	.thumb_func
+	.type	FtlBbmMapBadBlock, %function
+FtlBbmMapBadBlock:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L635
+	push	{r0, r1, r2, r4, r5, r6, r7, lr}
+	mov	r5, r0
+	ldrh	r4, [r3, #0]
+	movs	r7, #1
+	mov	r1, r4
+	bl	__aeabi_uidiv
+	uxth	r2, r0
+	mls	r3, r4, r2, r5
+	ldr	r4, .L635+4
+	add	r1, r4, r2, lsl #2
+	ldr	r0, [r1, #28]
+	uxth	r3, r3
+	and	r1, r3, #31
+	lsrs	r6, r3, #5
+	lsl	r1, r7, r1
+	ldr	r7, [r0, r6, lsl #2]
+	orrs	r1, r1, r7
+	str	r1, [r0, r6, lsl #2]
+	str	r1, [sp, #0]
+	mov	r1, r5
+	ldr	r0, .L635+8
+	bl	printf
+	ldrh	r3, [r4, #6]
+	movs	r0, #0
+	adds	r3, r3, #1
+	strh	r3, [r4, #6]	@ movhi
+	pop	{r1, r2, r3, r4, r5, r6, r7, pc}
+.L636:
+	.align	2
+.L635:
+	.word	.LANCHOR66
+	.word	.LANCHOR89
+	.word	.LC8
+	.size	FtlBbmMapBadBlock, .-FtlBbmMapBadBlock
+	.global	__aeabi_uidivmod
+	.section	.text.FtlBbmIsBadBlock,"ax",%progbits
+	.align	1
+	.global	FtlBbmIsBadBlock
+	.thumb
+	.thumb_func
+	.type	FtlBbmIsBadBlock, %function
+FtlBbmIsBadBlock:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L638
+	push	{r4, r5, r6, lr}
+	mov	r6, r0
+	ldrh	r5, [r3, #0]
+	mov	r1, r5
+	bl	__aeabi_uidivmod
+	mov	r0, r6
+	uxth	r4, r1
+	mov	r1, r5
+	bl	__aeabi_uidiv
+	ldr	r3, .L638+4
+	lsrs	r2, r4, #5
+	and	r4, r4, #31
+	uxth	r0, r0
+	add	r0, r3, r0, lsl #2
+	ldr	r3, [r0, #28]
+	ldr	r0, [r3, r2, lsl #2]
+	lsr	r0, r0, r4
+	and	r0, r0, #1
+	pop	{r4, r5, r6, pc}
+.L639:
+	.align	2
+.L638:
+	.word	.LANCHOR66
+	.word	.LANCHOR89
+	.size	FtlBbmIsBadBlock, .-FtlBbmIsBadBlock
+	.section	.text.FtlBbtInfoPrint,"ax",%progbits
+	.align	1
+	.global	FtlBbtInfoPrint
+	.thumb
+	.thumb_func
+	.type	FtlBbtInfoPrint, %function
+FtlBbtInfoPrint:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	FtlBbtInfoPrint, .-FtlBbtInfoPrint
+	.section	.text.FtlBbt2Bitmap,"ax",%progbits
+	.align	1
+	.global	FtlBbt2Bitmap
+	.thumb
+	.thumb_func
+	.type	FtlBbt2Bitmap, %function
+FtlBbt2Bitmap:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L646
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r6, r0
+	ldrh	r2, [r3, #0]
+	mov	r0, r1
+	mov	r5, r1
+	movs	r1, #0
+	ldr	r7, .L646+4
+	movs	r4, #0
+	lsls	r2, r2, #2
+	movw	r8, #65535
+	bl	memset
+.L644:
+	ldrh	r3, [r6, r4]
+	cmp	r3, r8
+	beq	.L641
+	ldrh	r2, [r7, #0]
+	cmp	r2, r3
+	bhi	.L643
+	ldr	r1, .L646+8
+	movs	r2, #79
+	ldr	r0, .L646+12
+	bl	printf
+	ldr	r0, .L646+16
+	ldr	r1, .L646+20
+	bl	printf
+.L643:
+	ldrh	r2, [r6, r4]
+	movs	r1, #1
+	adds	r4, r4, #2
+	lsrs	r3, r2, #5
+	and	r2, r2, #31
+	lsl	r2, r1, r2
+	cmp	r4, #1024
+	ldr	r1, [r5, r3, lsl #2]
+	orr	r2, r1, r2
+	str	r2, [r5, r3, lsl #2]
+	bne	.L644
+.L641:
+	pop	{r4, r5, r6, r7, r8, pc}
+.L647:
+	.align	2
+.L646:
+	.word	.LANCHOR90
+	.word	.LANCHOR66
+	.word	.LANCHOR91
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.size	FtlBbt2Bitmap, .-FtlBbt2Bitmap
+	.section	.text.FtlBbtMemInit,"ax",%progbits
+	.align	1
+	.global	FtlBbtMemInit
+	.thumb
+	.thumb_func
+	.type	FtlBbtMemInit, %function
+FtlBbtMemInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r0, .L649
+	movw	r3, #65535
+	movs	r1, #255
+	movs	r2, #16
+	strh	r3, [r0, #0]	@ movhi
+	movs	r3, #0
+	strh	r3, [r0, #6]	@ movhi
+	adds	r0, r0, #12
+	b	memset
+.L650:
+	.align	2
+.L649:
+	.word	.LANCHOR89
+	.size	FtlBbtMemInit, .-FtlBbtMemInit
+	.section	.text.V2P_block,"ax",%progbits
+	.align	1
+	.global	V2P_block
+	.thumb
+	.thumb_func
+	.type	V2P_block, %function
+V2P_block:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r7, r1
+	ldr	r3, .L652
+	mov	r6, r0
+	ldrh	r4, [r3, #0]
+	muls	r7, r4, r7
+	mov	r1, r4
+	bl	__aeabi_uidiv
+	ldr	r3, .L652+4
+	mov	r1, r4
+	ldrh	r5, [r3, #0]
+	mla	r5, r0, r5, r7
+	mov	r0, r6
+	bl	__aeabi_uidivmod
+	adds	r1, r5, r1
+	uxth	r0, r1
+	pop	{r3, r4, r5, r6, r7, pc}
+.L653:
+	.align	2
+.L652:
+	.word	.LANCHOR61
+	.word	.LANCHOR66
+	.size	V2P_block, .-V2P_block
+	.section	.text.P2V_plane,"ax",%progbits
+	.align	1
+	.global	P2V_plane
+	.thumb
+	.thumb_func
+	.type	P2V_plane, %function
+P2V_plane:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L655
+	push	{r4, r5, r6, lr}
+	mov	r6, r0
+	ldrh	r4, [r3, #0]
+	ldr	r3, .L655+4
+	ldrh	r1, [r3, #0]
+	bl	__aeabi_uidiv
+	mov	r1, r4
+	mul	r5, r0, r4
+	mov	r0, r6
+	bl	__aeabi_uidivmod
+	adds	r1, r5, r1
+	uxth	r0, r1
+	pop	{r4, r5, r6, pc}
+.L656:
+	.align	2
+.L655:
+	.word	.LANCHOR61
+	.word	.LANCHOR66
+	.size	P2V_plane, .-P2V_plane
+	.section	.text.P2V_block_in_plane,"ax",%progbits
+	.align	1
+	.global	P2V_block_in_plane
+	.thumb
+	.thumb_func
+	.type	P2V_block_in_plane, %function
+P2V_block_in_plane:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	ldr	r3, .L658
+	ldrh	r1, [r3, #0]
+	bl	__aeabi_uidivmod
+	ldr	r3, .L658+4
+	uxth	r0, r1
+	ldrh	r1, [r3, #0]
+	bl	__aeabi_uidiv
+	uxth	r0, r0
+	pop	{r3, pc}
+.L659:
+	.align	2
+.L658:
+	.word	.LANCHOR66
+	.word	.LANCHOR61
+	.size	P2V_block_in_plane, .-P2V_block_in_plane
+	.section	.text.ftl_cmp_data_ver,"ax",%progbits
+	.align	1
+	.global	ftl_cmp_data_ver
+	.thumb
+	.thumb_func
+	.type	ftl_cmp_data_ver, %function
+ftl_cmp_data_ver:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	cmp	r0, r1
+	bls	.L661
+	subs	r0, r0, r1
+	cmp	r0, #-2147483648
+	ite	hi
+	movhi	r0, #0
+	movls	r0, #1
+	bx	lr
+.L661:
+	subs	r0, r1, r0
+	cmp	r0, #-2147483648
+	ite	ls
+	movls	r0, #0
+	movhi	r0, #1
+	bx	lr
+	.size	ftl_cmp_data_ver, .-ftl_cmp_data_ver
+	.section	.text.FtlFreeSysBlkQueueInit,"ax",%progbits
+	.align	1
+	.global	FtlFreeSysBlkQueueInit
+	.thumb
+	.thumb_func
+	.type	FtlFreeSysBlkQueueInit, %function
+FtlFreeSysBlkQueueInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L664
+	mov	r2, #2048
+	push	{r4, lr}
+	movs	r4, #0
+	mov	r1, r4
+	strh	r4, [r3, #2]	@ movhi
+	strh	r4, [r3, #4]	@ movhi
+	strh	r4, [r3, #6]	@ movhi
+	strh	r0, [r3], #8	@ movhi
+	mov	r0, r3
+	bl	memset
+	mov	r0, r4
+	pop	{r4, pc}
+.L665:
+	.align	2
+.L664:
+	.word	.LANCHOR92
+	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
+	.section	.text.FtlFreeSysBlkQueueEmpty,"ax",%progbits
+	.align	1
+	.global	FtlFreeSysBlkQueueEmpty
+	.thumb
+	.thumb_func
+	.type	FtlFreeSysBlkQueueEmpty, %function
+FtlFreeSysBlkQueueEmpty:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L667
+	ldrh	r0, [r3, #6]
+	rsbs	r0, r0, #1
+	it	cc
+	movcc	r0, #0
+	bx	lr
+.L668:
+	.align	2
+.L667:
+	.word	.LANCHOR92
+	.size	FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty
+	.section	.text.FtlFreeSysBlkQueueFull,"ax",%progbits
+	.align	1
+	.global	FtlFreeSysBlkQueueFull
+	.thumb
+	.thumb_func
+	.type	FtlFreeSysBlkQueueFull, %function
+FtlFreeSysBlkQueueFull:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L670
+	ldrh	r0, [r3, #6]
+	sub	r2, r0, #1024
+	rsbs	r0, r2, #0
+	adc	r0, r0, r2
+	bx	lr
+.L671:
+	.align	2
+.L670:
+	.word	.LANCHOR92
+	.size	FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull
+	.section	.text.FtlFreeSysBlkQueueIn,"ax",%progbits
+	.align	1
+	.global	FtlFreeSysBlkQueueIn
+	.thumb
+	.thumb_func
+	.type	FtlFreeSysBlkQueueIn, %function
+FtlFreeSysBlkQueueIn:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	mov	r4, r0
+	ldr	r3, .L675
+	ldrh	r3, [r3, #6]
+	cmp	r3, #1024
+	beq	.L672
+	cbz	r1, .L674
+	bl	P2V_block_in_plane
+	ldr	r3, .L675+4
+	movs	r1, #1
+	mov	r2, r1
+	mov	r5, r0
+	ldr	r0, [r3, #0]
+	lsls	r3, r4, #10
+	str	r3, [r0, #4]
+	bl	FlashEraseBlocks
+	ldr	r3, .L675+8
+	ldr	r3, [r3, #0]
+	ldrh	r2, [r3, r5, lsl #1]
+	adds	r2, r2, #1
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	ldr	r3, .L675+12
+	ldr	r2, [r3, #0]
+	adds	r2, r2, #1
+	str	r2, [r3, #0]
+.L674:
+	ldr	r3, .L675
+	ldrh	r2, [r3, #6]
+	adds	r2, r2, #1
+	strh	r2, [r3, #6]	@ movhi
+	ldrh	r2, [r3, #4]
+	adds	r1, r2, #4
+	adds	r2, r2, #1
+	bic	r2, r2, #64512
+	strh	r2, [r3, #4]	@ movhi
+	strh	r4, [r3, r1, lsl #1]	@ movhi
+.L672:
+	pop	{r3, r4, r5, pc}
+.L676:
+	.align	2
+.L675:
+	.word	.LANCHOR92
+	.word	.LANCHOR93
+	.word	.LANCHOR94
+	.word	.LANCHOR95
+	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
+	.section	.text.FtlFreeSysBLkSort,"ax",%progbits
+	.align	1
+	.global	FtlFreeSysBLkSort
+	.thumb
+	.thumb_func
+	.type	FtlFreeSysBLkSort, %function
+FtlFreeSysBLkSort:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, r8, sl, lr}
+	movs	r4, #0
+	ldr	r5, .L687
+	ldr	r7, .L687+4
+	ldr	r6, .L687+8
+	b	.L678
+.L679:
+	add	r8, r4, r8
+	add	r8, r8, #4
+	ldrh	r0, [r5, r8, lsl #1]
+	bl	P2V_block_in_plane
+	ldr	r2, [r6, #0]
+	ldr	r3, [r7, #0]
+	ldrh	r2, [r2, r0, lsl #1]
+	str	r2, [r3, r4, lsl #2]
+	adds	r4, r4, #1
+	uxth	r4, r4
+.L678:
+	ldrh	ip, [r5, #6]
+	ldrh	r8, [r5, #2]
+	cmp	r4, ip
+	bcc	.L679
+	ldr	r3, .L687+4
+	add	r6, ip, #-1
+	ldr	r4, .L687
+	ldr	r1, [r3, #0]
+	movs	r3, #0
+	b	.L680
+.L685:
+	adds	r5, r3, #1
+	mov	r2, r3
+	uxth	r5, r5
+	mov	r0, r5
+	b	.L681
+.L683:
+	ldr	r7, [r1, r0, lsl #2]
+	ldr	sl, [r1, r2, lsl #2]
+	cmp	sl, r7
+	it	hi
+	movhi	r2, r0
+	adds	r0, r0, #1
+	uxth	r0, r0
+.L681:
+	cmp	r0, ip
+	bcc	.L683
+	cmp	r3, r2
+	beq	.L684
+	ldr	r0, [r1, r2, lsl #2]
+	ldr	r7, [r1, r3, lsl #2]
+	str	r7, [r1, r2, lsl #2]
+	add	r2, r8, r2
+	str	r0, [r1, r3, lsl #2]
+	add	r3, r8, r3
+	adds	r2, r2, #4
+	adds	r3, r3, #4
+	ldrh	r0, [r4, r2, lsl #1]
+	ldrh	r7, [r4, r3, lsl #1]
+	strh	r7, [r4, r2, lsl #1]	@ movhi
+	strh	r0, [r4, r3, lsl #1]	@ movhi
+.L684:
+	mov	r3, r5
+.L680:
+	cmp	r3, r6
+	blt	.L685
+	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
+.L688:
+	.align	2
+.L687:
+	.word	.LANCHOR92
+	.word	.LANCHOR96
+	.word	.LANCHOR94
+	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
+	.section	.text.IsInFreeQueue,"ax",%progbits
+	.align	1
+	.global	IsInFreeQueue
+	.thumb
+	.thumb_func
+	.type	IsInFreeQueue, %function
+IsInFreeQueue:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r2, .L695
+	push	{r4, r5, lr}
+	ldrh	r1, [r2, #6]
+	cmp	r1, #1024
+	beq	.L693
+	ldrh	r4, [r2, #2]
+	movs	r3, #0
+	b	.L691
+.L692:
+	adds	r5, r3, r4
+	lsls	r5, r5, #22
+	add	r5, r2, r5, lsr #21
+	ldrh	r5, [r5, #8]
+	cmp	r5, r0
+	beq	.L694
+	adds	r3, r3, #1
+.L691:
+	cmp	r3, r1
+	bcc	.L692
+.L693:
+	movs	r0, #0
+	pop	{r4, r5, pc}
+.L694:
+	movs	r0, #1
+	pop	{r4, r5, pc}
+.L696:
+	.align	2
+.L695:
+	.word	.LANCHOR92
+	.size	IsInFreeQueue, .-IsInFreeQueue
+	.section	.text.FtlFreeSysBlkQueueOut,"ax",%progbits
+	.align	1
+	.global	FtlFreeSysBlkQueueOut
+	.thumb
+	.thumb_func
+	.type	FtlFreeSysBlkQueueOut, %function
+FtlFreeSysBlkQueueOut:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	ldr	r3, .L700
+	ldrh	r1, [r3, #6]
+	cbz	r1, .L699
+	ldrh	r2, [r3, #2]
+	subs	r1, r1, #1
+	strh	r1, [r3, #6]	@ movhi
+	adds	r0, r2, #4
+	adds	r2, r2, #1
+	bic	r2, r2, #64512
+	strh	r2, [r3, #2]	@ movhi
+	ldrh	r4, [r3, r0, lsl #1]
+	ldr	r3, .L700+4
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L698
+	mov	r0, r4
+	bl	P2V_block_in_plane
+	ldr	r3, .L700+8
+	movs	r1, #1
+	mov	r2, r1
+	mov	r5, r0
+	ldr	r0, [r3, #0]
+	lsls	r3, r4, #10
+	str	r3, [r0, #4]
+	bl	FlashEraseBlocks
+	ldr	r3, .L700+12
+	ldr	r3, [r3, #0]
+	ldrh	r2, [r3, r5, lsl #1]
+	adds	r2, r2, #1
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	ldr	r3, .L700+16
+	ldr	r2, [r3, #0]
+	adds	r2, r2, #1
+	str	r2, [r3, #0]
+	b	.L698
+.L699:
+	movw	r4, #65535
+.L698:
+	mov	r0, r4
+	pop	{r3, r4, r5, pc}
+.L701:
+	.align	2
+.L700:
+	.word	.LANCHOR92
+	.word	.LANCHOR7
+	.word	.LANCHOR93
+	.word	.LANCHOR94
+	.word	.LANCHOR95
+	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
+	.section	.text.insert_data_list,"ax",%progbits
+	.align	1
+	.global	insert_data_list
+	.thumb
+	.thumb_func
+	.type	insert_data_list, %function
+insert_data_list:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L718
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	sub	sp, sp, #24
+	ldrh	fp, [r3, #0]
+	cmp	r0, fp
+	bcs	.L703
+	ldr	r3, .L718+4
+	movs	r6, #6
+	muls	r6, r0, r6
+	ldr	r1, [r3, #0]
+	movw	r3, #65535
+	adds	r2, r1, r6
+	strh	r3, [r1, r6]	@ movhi
+	strh	r3, [r2, #2]	@ movhi
+	ldr	r3, .L718+8
+	ldr	r5, [r3, #0]
+	cmp	r5, #0
+	beq	.L717
+.L704:
+	ldr	r3, .L718+12
+	ldrh	r4, [r2, #4]
+	ldr	ip, [r3, #0]
+	lsls	r3, r0, #1
+	ldrh	r7, [ip, r0, lsl #1]
+	cbz	r4, .L713
+	muls	r4, r7, r4
+	b	.L716
+.L713:
+	mov	r4, #-1
+.L716:
+	str	r4, [sp, #8]
+	subs	r4, r5, r1
+	ldr	r7, .L718+16
+	mov	sl, r2
+	asrs	r4, r4, #1
+	muls	r4, r7, r4
+	ldr	r7, .L718+20
+	uxth	r4, r4
+	str	ip, [sp, #4]
+	ldr	r7, [r7, #0]
+	adds	r3, r7, r3
+	str	r3, [sp, #20]
+	str	r7, [sp, #12]
+	mov	r3, r5
+	movs	r7, #0
+.L711:
+	adds	r7, r7, #1
+	uxth	r7, r7
+	cmp	r7, fp
+	bhi	.L703
+	cmp	r0, r4
+	beq	.L703
+	ldr	r2, [sp, #4]
+	lsl	r8, r4, #1
+	str	r8, [sp, #16]
+	ldrh	r8, [r2, r4, lsl #1]
+	ldrh	r2, [r3, #4]
+	cbz	r2, .L714
+	mul	r2, r2, r8
+	b	.L706
+.L714:
+	mov	r2, #-1
+.L706:
+	ldr	r8, [sp, #8]
+	cmp	r2, r8
+	bne	.L707
+	ldr	r2, [sp, #12]
+	ldr	ip, [sp, #16]
+	ldrh	r8, [r2, ip]
+	ldr	r2, [sp, #20]
+	ldrh	ip, [r2, #0]
+	cmp	r8, ip
+	bcc	.L709
+	b	.L715
+.L707:
+	bhi	.L715
+.L709:
+	ldrh	r2, [r3, #0]
+	movw	r8, #65535
+	cmp	r2, r8
+	bne	.L710
+	mov	r2, sl
+	strh	r0, [r3, #0]	@ movhi
+	ldr	r3, .L718+24
+	strh	r4, [r2, #2]	@ movhi
+	b	.L717
+.L710:
+	mov	ip, #6
+	mov	r4, r2
+	mla	r3, ip, r2, r1
+	b	.L711
+.L715:
+	strh	r4, [r1, r6]	@ movhi
+	mov	r2, sl
+	ldrh	r4, [r3, #2]
+	cmp	r3, r5
+	strh	r4, [r2, #2]	@ movhi
+	bne	.L712
+	strh	r0, [r3, #2]	@ movhi
+	ldr	r3, .L718+8
+.L717:
+	str	r2, [r3, #0]
+	b	.L703
+.L712:
+	ldrh	r2, [r3, #2]
+	movs	r4, #6
+	strh	r0, [r3, #2]	@ movhi
+	muls	r2, r4, r2
+	strh	r0, [r1, r2]	@ movhi
+.L703:
+	movs	r0, #0
+	add	sp, sp, #24
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L719:
+	.align	2
+.L718:
+	.word	.LANCHOR55
+	.word	.LANCHOR97
+	.word	.LANCHOR98
+	.word	.LANCHOR99
+	.word	-1431655765
+	.word	.LANCHOR94
+	.word	.LANCHOR100
+	.size	insert_data_list, .-insert_data_list
+	.section	.text.INSERT_DATA_LIST,"ax",%progbits
+	.align	1
+	.global	INSERT_DATA_LIST
+	.thumb
+	.thumb_func
+	.type	INSERT_DATA_LIST, %function
+INSERT_DATA_LIST:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	bl	insert_data_list
+	ldr	r2, .L722
+	ldrh	r3, [r2, #0]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	strh	r3, [r2, #0]	@ movhi
+	ldr	r2, .L722+4
+	ldrh	r2, [r2, #0]
+	cmp	r2, r3
+	bcs	.L720
+	ldr	r1, .L722+8
+	movs	r2, #196
+	ldr	r0, .L722+12
+	bl	printf
+	ldr	r0, .L722+16
+	ldr	r1, .L722+20
+	pop	{r3, lr}
+	b	printf
+.L720:
+	pop	{r3, pc}
+.L723:
+	.align	2
+.L722:
+	.word	.LANCHOR101
+	.word	.LANCHOR55
+	.word	.LANCHOR102
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
+	.section	.text.insert_free_list,"ax",%progbits
+	.align	1
+	.global	insert_free_list
+	.thumb
+	.thumb_func
+	.type	insert_free_list, %function
+insert_free_list:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	movw	r8, #65535
+	cmp	r0, r8
+	beq	.L725
+	ldr	r3, .L732
+	mov	fp, #6
+	mul	r6, fp, r0
+	ldr	r2, [r3, #0]
+	ldr	r3, .L732+4
+	adds	r1, r2, r6
+	ldr	r4, [r3, #0]
+	strh	r8, [r1, #2]	@ movhi
+	strh	r8, [r2, r6]	@ movhi
+	cbz	r4, .L731
+.L726:
+	ldr	r3, .L732+8
+	subs	r5, r4, r2
+	asrs	r5, r5, #1
+	ldr	ip, [r3, #0]
+	ldr	r3, .L732+12
+	muls	r5, r3, r5
+	mov	r3, r4
+	uxth	r5, r5
+	ldrh	sl, [ip, r0, lsl #1]
+.L729:
+	ldrh	r7, [ip, r5, lsl #1]
+	cmp	r7, sl
+	bcs	.L727
+	ldrh	r7, [r3, #0]
+	cmp	r7, r8
+	bne	.L728
+	strh	r5, [r1, #2]	@ movhi
+	strh	r0, [r3, #0]	@ movhi
+	b	.L725
+.L728:
+	mla	r3, fp, r7, r2
+	mov	r5, r7
+	b	.L729
+.L727:
+	ldrh	r7, [r3, #2]
+	cmp	r3, r4
+	strh	r5, [r2, r6]	@ movhi
+	strh	r7, [r1, #2]	@ movhi
+	bne	.L730
+	strh	r0, [r3, #2]	@ movhi
+	ldr	r3, .L732+4
+.L731:
+	str	r1, [r3, #0]
+	b	.L725
+.L730:
+	ldrh	r1, [r3, #2]
+	movs	r4, #6
+	strh	r0, [r3, #2]	@ movhi
+	muls	r1, r4, r1
+	strh	r0, [r2, r1]	@ movhi
+.L725:
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L733:
+	.align	2
+.L732:
+	.word	.LANCHOR97
+	.word	.LANCHOR103
+	.word	.LANCHOR94
+	.word	-1431655765
+	.size	insert_free_list, .-insert_free_list
+	.section	.text.INSERT_FREE_LIST,"ax",%progbits
+	.align	1
+	.global	INSERT_FREE_LIST
+	.thumb
+	.thumb_func
+	.type	INSERT_FREE_LIST, %function
+INSERT_FREE_LIST:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	bl	insert_free_list
+	ldr	r2, .L736
+	ldrh	r3, [r2, #0]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	strh	r3, [r2, #0]	@ movhi
+	ldr	r2, .L736+4
+	ldrh	r2, [r2, #0]
+	cmp	r2, r3
+	bcs	.L734
+	ldr	r1, .L736+8
+	movs	r2, #189
+	ldr	r0, .L736+12
+	bl	printf
+	ldr	r0, .L736+16
+	ldr	r1, .L736+20
+	pop	{r3, lr}
+	b	printf
+.L734:
+	pop	{r3, pc}
+.L737:
+	.align	2
+.L736:
+	.word	.LANCHOR104
+	.word	.LANCHOR55
+	.word	.LANCHOR105
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
+	.section	.text.List_remove_node,"ax",%progbits
+	.align	1
+	.global	List_remove_node
+	.thumb
+	.thumb_func
+	.type	List_remove_node, %function
+List_remove_node:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	movs	r6, #6
+	muls	r6, r1, r6
+	ldr	r3, .L744
+	mov	r5, r0
+	ldr	r7, [r3, #0]
+	movw	r3, #65535
+	adds	r4, r7, r6
+	ldrh	r2, [r4, #2]
+	cmp	r2, r3
+	bne	.L739
+	ldr	r3, [r0, #0]
+	cmp	r4, r3
+	beq	.L739
+	ldr	r1, .L744+4
+	mov	r2, #354
+	ldr	r0, .L744+8
+	bl	printf
+	ldr	r0, .L744+12
+	ldr	r1, .L744+16
+	bl	printf
+.L739:
+	ldr	r3, [r5, #0]
+	movw	r2, #65535
+	cmp	r4, r3
+	ldrh	r3, [r7, r6]
+	bne	.L740
+	cmp	r3, r2
+	bne	.L741
+	movs	r3, #0
+	str	r3, [r5, #0]
+	b	.L742
+.L741:
+	ldr	r1, .L744
+	movs	r0, #6
+	ldr	r1, [r1, #0]
+	mla	r3, r0, r3, r1
+	str	r3, [r5, #0]
+	strh	r2, [r3, #2]	@ movhi
+	b	.L742
+.L740:
+	cmp	r3, r2
+	ldrh	r2, [r4, #2]
+	bne	.L743
+	cmp	r2, r3
+	beq	.L742
+	ldr	r1, .L744
+	movs	r0, #6
+	muls	r2, r0, r2
+	ldr	r1, [r1, #0]
+	strh	r3, [r1, r2]	@ movhi
+	b	.L742
+.L743:
+	ldr	r1, .L744
+	movs	r0, #6
+	ldr	r1, [r1, #0]
+	mla	r5, r0, r3, r1
+	strh	r2, [r5, #2]	@ movhi
+	ldrh	r2, [r4, #2]
+	muls	r0, r2, r0
+	strh	r3, [r1, r0]	@ movhi
+.L742:
+	movw	r3, #65535
+	movs	r0, #0
+	strh	r3, [r7, r6]	@ movhi
+	strh	r3, [r4, #2]	@ movhi
+	pop	{r3, r4, r5, r6, r7, pc}
+.L745:
+	.align	2
+.L744:
+	.word	.LANCHOR97
+	.word	.LANCHOR106
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.size	List_remove_node, .-List_remove_node
+	.section	.text.List_pop_index_node,"ax",%progbits
+	.align	1
+	.global	List_pop_index_node
+	.thumb
+	.thumb_func
+	.type	List_pop_index_node, %function
+List_pop_index_node:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, [r0, #0]
+	push	{r4, r5, r6, lr}
+	cbz	r3, .L751
+	ldr	r2, .L752
+	movw	r6, #65535
+	movs	r5, #6
+	ldr	r4, [r2, #0]
+	b	.L748
+.L750:
+	mla	r3, r5, r2, r4
+	subs	r1, r1, #1
+	uxth	r1, r1
+.L748:
+	cbz	r1, .L749
+	ldrh	r2, [r3, #0]
+	cmp	r2, r6
+	bne	.L750
+.L749:
+	subs	r4, r3, r4
+	ldr	r3, .L752+4
+	asrs	r4, r4, #1
+	muls	r4, r3, r4
+	uxth	r4, r4
+	mov	r1, r4
+	bl	List_remove_node
+	mov	r0, r4
+	pop	{r4, r5, r6, pc}
+.L751:
+	movw	r0, #65535
+	pop	{r4, r5, r6, pc}
+.L753:
+	.align	2
+.L752:
+	.word	.LANCHOR97
+	.word	-1431655765
+	.size	List_pop_index_node, .-List_pop_index_node
+	.section	.text.List_pop_head_node,"ax",%progbits
+	.align	1
+	.global	List_pop_head_node
+	.thumb
+	.thumb_func
+	.type	List_pop_head_node, %function
+List_pop_head_node:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	movs	r1, #0
+	b	List_pop_index_node
+	.size	List_pop_head_node, .-List_pop_head_node
+	.section	.text.List_get_gc_head_node,"ax",%progbits
+	.align	1
+	.global	List_get_gc_head_node
+	.thumb
+	.thumb_func
+	.type	List_get_gc_head_node, %function
+List_get_gc_head_node:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L761
+	push	{r4, lr}
+	ldr	r3, [r3, #0]
+	cbz	r3, .L760
+	ldr	r2, .L761+4
+	movw	r1, #65535
+	movs	r4, #6
+	ldr	r2, [r2, #0]
+	b	.L757
+.L759:
+	mla	r3, r4, r3, r2
+	subs	r0, r0, #1
+	uxth	r0, r0
+.L757:
+	cbz	r0, .L758
+	ldrh	r3, [r3, #0]
+	cmp	r3, r1
+	bne	.L759
+	mov	r0, r1
+	pop	{r4, pc}
+.L758:
+	subs	r3, r3, r2
+	ldr	r0, .L761+8
+	asrs	r3, r3, #1
+	muls	r0, r3, r0
+	uxth	r0, r0
+	pop	{r4, pc}
+.L760:
+	movw	r0, #65535
+	pop	{r4, pc}
+.L762:
+	.align	2
+.L761:
+	.word	.LANCHOR98
+	.word	.LANCHOR97
+	.word	-1431655765
+	.size	List_get_gc_head_node, .-List_get_gc_head_node
+	.section	.text.List_update_data_list,"ax",%progbits
+	.align	1
+	.global	List_update_data_list
+	.thumb
+	.thumb_func
+	.type	List_update_data_list, %function
+List_update_data_list:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L772
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r4, r0
+	ldrh	r3, [r3, #0]
+	cmp	r3, r0
+	beq	.L764
+	ldr	r3, .L772+4
+	ldrh	r3, [r3, #0]
+	cmp	r3, r0
+	beq	.L764
+	ldr	r3, .L772+8
+	ldrh	r3, [r3, #0]
+	cmp	r3, r0
+	beq	.L764
+	ldr	r3, .L772+12
+	movs	r7, #6
+	muls	r7, r0, r7
+	ldr	r8, [r3, #0]
+	ldr	r3, .L772+16
+	add	r5, r8, r7
+	ldr	r3, [r3, #0]
+	cmp	r5, r3
+	beq	.L764
+	ldr	r3, .L772+20
+	movw	r2, #65535
+	ldrh	r6, [r5, #4]
+	ldr	r3, [r3, #0]
+	ldrh	r3, [r3, r0, lsl #1]
+	muls	r6, r3, r6
+	ldrh	r3, [r5, #2]
+	it	eq
+	moveq	r6, #-1
+	cmp	r3, r2
+	bne	.L766
+	ldrh	r2, [r8, r7]
+	cmp	r2, r3
+	bne	.L766
+	ldr	r1, .L772+24
+	movw	r2, #445
+	ldr	r0, .L772+28
+	bl	printf
+	ldr	r0, .L772+32
+	ldr	r1, .L772+36
+	bl	printf
+.L766:
+	ldrh	r3, [r5, #2]
+	movw	r2, #65535
+	cmp	r3, r2
+	bne	.L767
+	ldrh	r2, [r8, r7]
+	cmp	r2, r3
+	beq	.L764
+.L767:
+	ldr	r2, .L772+12
+	movs	r1, #6
+	ldr	r2, [r2, #0]
+	mla	r3, r1, r3, r2
+	ldr	r1, .L772+40
+	subs	r2, r3, r2
+	asrs	r2, r2, #1
+	muls	r2, r1, r2
+	ldr	r1, .L772+20
+	uxth	r2, r2
+	ldrh	r3, [r3, #4]
+	ldr	r1, [r1, #0]
+	ldrh	r2, [r1, r2, lsl #1]
+	muls	r3, r2, r3
+	it	eq
+	moveq	r3, #-1
+	cmp	r6, r3
+	bcs	.L764
+	ldr	r5, .L772+44
+	mov	r1, r4
+	ldr	r0, .L772+16
+	bl	List_remove_node
+	ldrh	r3, [r5, #0]
+	cbnz	r3, .L769
+	ldr	r1, .L772+24
+	mov	r2, #456
+	ldr	r0, .L772+28
+	bl	printf
+	ldr	r0, .L772+32
+	ldr	r1, .L772+36
+	bl	printf
+.L769:
+	ldrh	r3, [r5, #0]
+	mov	r0, r4
+	subs	r3, r3, #1
+	strh	r3, [r5, #0]	@ movhi
+	bl	INSERT_DATA_LIST
+.L764:
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, pc}
+.L773:
+	.align	2
+.L772:
+	.word	.LANCHOR107
+	.word	.LANCHOR108
+	.word	.LANCHOR109
+	.word	.LANCHOR97
+	.word	.LANCHOR98
+	.word	.LANCHOR99
+	.word	.LANCHOR110
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	-1431655765
+	.word	.LANCHOR101
+	.size	List_update_data_list, .-List_update_data_list
+	.section	.text.ftl_free_no_use_map_blk,"ax",%progbits
+	.align	1
+	.global	ftl_free_no_use_map_blk
+	.thumb
+	.thumb_func
+	.type	ftl_free_no_use_map_blk, %function
+ftl_free_no_use_map_blk:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldrh	r2, [r0, #10]
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r4, r0
+	ldr	r5, [r0, #20]
+	lsls	r2, r2, #1
+	ldr	r6, [r0, #12]
+	movs	r1, #0
+	ldr	r7, [r0, #24]
+	mov	r0, r5
+	bl	memset
+	movs	r2, #0
+	b	.L775
+.L779:
+	ldr	r1, [r7, r2, lsl #2]
+	movs	r3, #0
+	ubfx	r1, r1, #10, #16
+	b	.L776
+.L778:
+	ldrh	r0, [r6, r3, lsl #1]
+	cmp	r0, r1
+	bne	.L777
+	ldrh	r0, [r5, r3, lsl #1]
+	adds	r0, r0, #1
+	strh	r0, [r5, r3, lsl #1]	@ movhi
+.L777:
+	adds	r3, r3, #1
+	uxth	r3, r3
+.L776:
+	ldrh	r0, [r4, #10]
+	cmp	r0, r3
+	bhi	.L778
+	adds	r2, r2, #1
+	uxth	r2, r2
+.L775:
+	ldrh	r3, [r4, #6]
+	cmp	r3, r2
+	bhi	.L779
+	mov	sl, #0
+	ldrh	r3, [r5, #0]
+	mov	r7, sl
+	ldr	r2, .L785
+	b	.L780
+.L784:
+	ldrh	r1, [r4, #0]
+	cmp	r1, r7
+	bne	.L781
+	ldrh	r1, [r2, #0]
+	ldrh	r0, [r4, #2]
+	cmp	r0, r1
+	it	cc
+	strhcc	r1, [r5, r7, lsl #1]	@ movhi
+.L781:
+	ldrh	r8, [r5, r7, lsl #1]
+	lsl	fp, r7, #1
+	cmp	r3, r8
+	itt	hi
+	movhi	sl, r7
+	movhi	r3, r8
+	cmp	r8, #0
+	bne	.L783
+	ldrh	r0, [r6, fp]
+	cbz	r0, .L783
+	movs	r1, #1
+	stmia	sp, {r2, r3}
+	bl	FtlFreeSysBlkQueueIn
+	ldmia	sp, {r2, r3}
+	strh	r8, [r6, fp]	@ movhi
+	ldrh	r1, [r4, #8]
+	subs	r1, r1, #1
+	strh	r1, [r4, #8]	@ movhi
+.L783:
+	adds	r7, r7, #1
+	uxth	r7, r7
+.L780:
+	ldrh	r1, [r4, #10]
+	cmp	r1, r7
+	bhi	.L784
+	mov	r0, sl
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L786:
+	.align	2
+.L785:
+	.word	.LANCHOR69
+	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
+	.section	.text.ftl_map_blk_alloc_new_blk,"ax",%progbits
+	.align	1
+	.global	ftl_map_blk_alloc_new_blk
+	.thumb
+	.thumb_func
+	.type	ftl_map_blk_alloc_new_blk, %function
+ftl_map_blk_alloc_new_blk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r4, r0
+	ldrh	r2, [r0, #10]
+	movs	r5, #0
+	ldr	r3, [r0, #12]
+	b	.L788
+.L791:
+	mov	r7, r3
+	adds	r3, r3, #2
+	ldrh	r6, [r7, #0]
+	cbnz	r6, .L789
+	bl	FtlFreeSysBlkQueueOut
+	strh	r0, [r7, #0]	@ movhi
+	cbz	r0, .L790
+	ldr	r3, [r4, #28]
+	strh	r6, [r4, #2]	@ movhi
+	adds	r3, r3, #1
+	str	r3, [r4, #28]
+	ldrh	r3, [r4, #8]
+	strh	r5, [r4, #0]	@ movhi
+	adds	r3, r3, #1
+	strh	r3, [r4, #8]	@ movhi
+	b	.L790
+.L789:
+	adds	r5, r5, #1
+	uxth	r5, r5
+.L788:
+	cmp	r5, r2
+	bne	.L791
+.L790:
+	ldrh	r3, [r4, #10]
+	cmp	r3, r5
+	bhi	.L792
+	ldr	r1, .L793
+	movw	r2, #553
+	ldr	r0, .L793+4
+	bl	printf
+	ldr	r0, .L793+8
+	ldr	r1, .L793+12
+	bl	printf
+.L792:
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, pc}
+.L794:
+	.align	2
+.L793:
+	.word	.LANCHOR111
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
+	.section	.text.select_l2p_ram_region,"ax",%progbits
+	.align	1
+	.global	select_l2p_ram_region
+	.thumb
+	.thumb_func
+	.type	select_l2p_ram_region, %function
+select_l2p_ram_region:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r2, .L807
+	movw	r1, #65535
+	push	{r3, r4, r5, r6, r7, lr}
+	ldr	r3, .L807+4
+	ldr	r0, [r2, #0]
+	movs	r2, #0
+	mov	r4, r2
+	ldrh	r3, [r3, #0]
+	b	.L796
+.L798:
+	adds	r2, r2, #12
+	adds	r5, r0, r2
+	ldrh	r5, [r5, #-12]
+	cmp	r5, r1
+	beq	.L797
+	adds	r4, r4, #1
+	uxth	r4, r4
+.L796:
+	cmp	r4, r3
+	bne	.L798
+	movs	r1, #0
+	mov	r4, r3
+	mov	r6, #-2147483648
+	mov	r2, r1
+	b	.L799
+.L801:
+	adds	r5, r0, r1
+	ldr	r5, [r5, #4]
+	cmp	r5, #0
+	blt	.L800
+	cmp	r5, r6
+	itt	cc
+	movcc	r6, r5
+	movcc	r4, r2
+.L800:
+	adds	r2, r2, #1
+	adds	r1, r1, #12
+	uxth	r2, r2
+.L799:
+	cmp	r2, r3
+	bne	.L801
+	cmp	r4, r3
+	bcc	.L797
+	ldr	r2, .L807+8
+	movs	r1, #0
+	mov	r4, r3
+	mov	r5, #-1
+	ldrh	r7, [r2, #0]
+	mov	r2, r1
+	b	.L802
+.L804:
+	adds	r6, r0, r1
+	ldr	r6, [r6, #4]
+	cmp	r6, r5
+	bcs	.L803
+	ldrh	ip, [r0, r1]
+	cmp	ip, r7
+	it	ne
+	movne	r5, r6
+	it	ne
+	movne	r4, r2
+.L803:
+	adds	r2, r2, #1
+	adds	r1, r1, #12
+	uxth	r2, r2
+.L802:
+	cmp	r2, r3
+	bne	.L804
+	cmp	r4, r2
+	bcc	.L797
+	ldr	r1, .L807+12
+	mov	r2, #756
+	ldr	r0, .L807+16
+	bl	printf
+	ldr	r0, .L807+20
+	ldr	r1, .L807+24
+	bl	printf
+.L797:
+	mov	r0, r4
+	pop	{r3, r4, r5, r6, r7, pc}
+.L808:
+	.align	2
+.L807:
+	.word	.LANCHOR112
+	.word	.LANCHOR83
+	.word	.LANCHOR113
+	.word	.LANCHOR114
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.size	select_l2p_ram_region, .-select_l2p_ram_region
+	.section	.text.FtlUpdateVaildLpn,"ax",%progbits
+	.align	1
+	.global	FtlUpdateVaildLpn
+	.thumb
+	.thumb_func
+	.type	FtlUpdateVaildLpn, %function
+FtlUpdateVaildLpn:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L815
+	push	{r4, r5, lr}
+	ldrh	r2, [r3, #0]
+	adds	r1, r2, #1
+	cmp	r2, #4
+	strh	r1, [r3, #0]	@ movhi
+	mov	r2, r3
+	bhi	.L810
+	cbz	r0, .L809
+.L810:
+	movs	r3, #0
+	strh	r3, [r2, #0]	@ movhi
+	ldr	r2, .L815+4
+	movw	r4, #65535
+	ldrh	r5, [r2, #0]
+	ldr	r2, .L815+8
+	ldr	r1, [r2, #0]
+	mov	r2, r3
+	b	.L812
+.L814:
+	ldrh	r0, [r1], #2
+	cmp	r0, r4
+	it	ne
+	addne	r3, r3, r0
+	adds	r2, r2, #1
+	uxth	r2, r2
+.L812:
+	cmp	r2, r5
+	bne	.L814
+	ldr	r2, .L815+12
+	str	r3, [r2, #0]
+.L809:
+	pop	{r4, r5, pc}
+.L816:
+	.align	2
+.L815:
+	.word	.LANCHOR115
+	.word	.LANCHOR55
+	.word	.LANCHOR99
+	.word	.LANCHOR116
+	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
+	.section	.text.ftl_set_blk_mode,"ax",%progbits
+	.align	1
+	.global	ftl_set_blk_mode
+	.thumb
+	.thumb_func
+	.type	ftl_set_blk_mode, %function
+ftl_set_blk_mode:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L821
+	lsrs	r2, r0, #5
+	and	r0, r0, #31
+	uxth	r2, r2
+	ldr	r3, [r3, #0]
+	cbz	r1, .L818
+	movs	r1, #1
+	lsl	r0, r1, r0
+	ldr	r1, [r3, r2, lsl #2]
+	orrs	r0, r0, r1
+	b	.L820
+.L818:
+	movs	r1, #1
+	lsl	r0, r1, r0
+	ldr	r1, [r3, r2, lsl #2]
+	bic	r0, r1, r0
+.L820:
+	str	r0, [r3, r2, lsl #2]
+	bx	lr
+.L822:
+	.align	2
+.L821:
+	.word	.LANCHOR117
+	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
+	.section	.text.ftl_get_blk_mode,"ax",%progbits
+	.align	1
+	.global	ftl_get_blk_mode
+	.thumb
+	.thumb_func
+	.type	ftl_get_blk_mode, %function
+ftl_get_blk_mode:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L824
+	lsrs	r2, r0, #5
+	and	r0, r0, #31
+	ldr	r3, [r3, #0]
+	ldr	r3, [r3, r2, lsl #2]
+	lsr	r0, r3, r0
+	and	r0, r0, #1
+	bx	lr
+.L825:
+	.align	2
+.L824:
+	.word	.LANCHOR117
+	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
+	.section	.text.FtlL2PDataInit,"ax",%progbits
+	.align	1
+	.global	FtlL2PDataInit
+	.thumb
+	.thumb_func
+	.type	FtlL2PDataInit, %function
+FtlL2PDataInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L829
+	movs	r1, #0
+	push	{r4, r5, r6, r7, r8, lr}
+	ldr	r2, [r3, #0]
+	ldr	r3, .L829+4
+	ldr	r5, .L829+8
+	ldr	r4, .L829+12
+	lsls	r2, r2, #1
+	ldr	r6, .L829+16
+	ldr	r0, [r3, #0]
+	bl	memset
+	ldrh	r3, [r4, #0]
+	ldrh	r2, [r6, #0]
+	movs	r1, #255
+	muls	r2, r3, r2
+	ldr	r0, [r5, #0]
+	bl	memset
+	ldr	r3, .L829+20
+	ldrh	r7, [r6, #0]
+	ldr	ip, [r5, #0]
+	movw	r5, #65535
+	ldr	r2, [r3, #0]
+	movs	r3, #0
+	ldrh	r6, [r4, #0]
+	mov	r1, r3
+	mov	r4, r3
+	b	.L827
+.L828:
+	adds	r1, r1, #1
+	bic	r3, r3, #3
+	add	r3, ip, r3
+	str	r3, [r2, #-4]
+	uxth	r1, r1
+	mov	r3, r8
+	str	r4, [r2, #-8]
+	strh	r5, [r2, #-12]	@ movhi
+.L827:
+	adds	r2, r2, #12
+	cmp	r1, r7
+	add	r8, r3, r6
+	movw	r0, #65535
+	bne	.L828
+	ldr	r2, .L829
+	ldr	r3, .L829+24
+	ldr	r2, [r2, #0]
+	strh	r0, [r3, #2]	@ movhi
+	strh	r0, [r3, #0]	@ movhi
+	strh	r2, [r3, #10]	@ movhi
+	movw	r2, #61634
+	strh	r2, [r3, #4]	@ movhi
+	ldr	r2, .L829+28
+	ldrh	r2, [r2, #0]
+	strh	r2, [r3, #8]	@ movhi
+	ldr	r2, .L829+32
+	ldrh	r2, [r2, #0]
+	strh	r2, [r3, #6]	@ movhi
+	ldr	r2, .L829+36
+	ldr	r2, [r2, #0]
+	str	r2, [r3, #12]
+	ldr	r2, .L829+40
+	ldr	r2, [r2, #0]
+	str	r2, [r3, #16]
+	ldr	r2, .L829+4
+	ldr	r2, [r2, #0]
+	str	r2, [r3, #20]
+	ldr	r2, .L829+44
+	ldr	r2, [r2, #0]
+	str	r2, [r3, #24]
+	pop	{r4, r5, r6, r7, r8, pc}
+.L830:
+	.align	2
+.L829:
+	.word	.LANCHOR80
+	.word	.LANCHOR118
+	.word	.LANCHOR119
+	.word	.LANCHOR73
+	.word	.LANCHOR83
+	.word	.LANCHOR112
+	.word	.LANCHOR120
+	.word	.LANCHOR121
+	.word	.LANCHOR82
+	.word	.LANCHOR122
+	.word	.LANCHOR123
+	.word	.LANCHOR124
+	.size	FtlL2PDataInit, .-FtlL2PDataInit
+	.section	.text.ftl_sb_update_avl_pages,"ax",%progbits
+	.align	1
+	.global	ftl_sb_update_avl_pages
+	.thumb
+	.thumb_func
+	.type	ftl_sb_update_avl_pages, %function
+ftl_sb_update_avl_pages:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	movs	r3, #0
+	strh	r3, [r0, #4]	@ movhi
+	ldr	r3, .L838
+	push	{r4, r5, r6, r7, lr}
+	movw	r4, #65535
+	ldrh	r3, [r3, #0]
+	b	.L832
+.L834:
+	add	r5, r2, #8
+	ldrh	r5, [r0, r5, lsl #1]
+	cmp	r5, r4
+	beq	.L833
+	ldrh	r5, [r0, #4]
+	adds	r5, r5, #1
+	strh	r5, [r0, #4]	@ movhi
+.L833:
+	adds	r2, r2, #1
+	uxth	r2, r2
+.L832:
+	cmp	r2, r3
+	bcc	.L834
+	ldr	r2, .L838+4
+	mov	r4, r0
+	movw	r5, #65535
+	mvns	r1, r1
+	ldrh	r6, [r2, #0]
+	movs	r2, #0
+	b	.L835
+.L837:
+	ldrh	r7, [r4, #16]
+	cmp	r7, r5
+	beq	.L836
+	ldrh	r7, [r0, #4]
+	adds	r7, r6, r7
+	adds	r7, r7, r1
+	strh	r7, [r0, #4]	@ movhi
+.L836:
+	adds	r2, r2, #1
+	adds	r4, r4, #2
+	uxth	r2, r2
+.L835:
+	cmp	r2, r3
+	bne	.L837
+	pop	{r4, r5, r6, r7, pc}
+.L839:
+	.align	2
+.L838:
+	.word	.LANCHOR53
+	.word	.LANCHOR68
+	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
+	.section	.text.make_superblock,"ax",%progbits
+	.align	1
+	.global	make_superblock
+	.thumb
+	.thumb_func
+	.type	make_superblock, %function
+make_superblock:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L847
+	ldrh	r2, [r0, #0]
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r4, r0
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	bcc	.L841
+	ldr	r1, .L847+4
+	movw	r2, #2145
+	ldr	r0, .L847+8
+	bl	printf
+	ldr	r0, .L847+12
+	ldr	r1, .L847+16
+	bl	printf
+.L841:
+	movs	r5, #0
+	ldr	r8, .L847+40
+	strh	r5, [r4, #4]	@ movhi
+	movw	r6, #65535
+	strb	r5, [r4, #7]
+	ldr	r7, .L847+20
+	b	.L842
+.L844:
+	ldrb	r0, [r7, r5]	@ zero_extendqisi2
+	add	sl, r5, #8
+	ldrh	r1, [r4, #0]
+	bl	V2P_block
+	strh	r6, [r4, sl, lsl #1]	@ movhi
+	mov	fp, r0
+	bl	FtlBbmIsBadBlock
+	cbnz	r0, .L843
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	strh	fp, [r4, sl, lsl #1]	@ movhi
+	adds	r3, r3, #1
+	strb	r3, [r4, #7]
+.L843:
+	adds	r5, r5, #1
+	uxth	r5, r5
+.L842:
+	ldrh	r3, [r8, #0]
+	cmp	r3, r5
+	bhi	.L844
+	ldr	r2, .L847+24
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	ldrh	r2, [r2, #0]
+	muls	r3, r2, r3
+	strh	r3, [r4, #4]	@ movhi
+	movs	r3, #0
+	strb	r3, [r4, #9]
+	ldr	r3, .L847+28
+	ldr	r3, [r3, #0]
+	cbz	r3, .L845
+	ldr	r3, .L847+32
+	ldrh	r2, [r4, #0]
+	ldr	r3, [r3, #0]
+	ldrh	r3, [r3, r2, lsl #1]
+	cmp	r3, #59
+	bhi	.L845
+	movs	r3, #1
+	strb	r3, [r4, #9]
+.L845:
+	ldr	r3, .L847+36
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L846
+	movs	r3, #1
+	strb	r3, [r4, #9]
+.L846:
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L848:
+	.align	2
+.L847:
+	.word	.LANCHOR55
+	.word	.LANCHOR125
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR62
+	.word	.LANCHOR68
+	.word	.LANCHOR126
+	.word	.LANCHOR94
+	.word	.LANCHOR7
+	.word	.LANCHOR53
+	.size	make_superblock, .-make_superblock
+	.section	.text.SupperBlkListInit,"ax",%progbits
+	.align	1
+	.global	SupperBlkListInit
+	.thumb
+	.thumb_func
+	.type	SupperBlkListInit, %function
+SupperBlkListInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r2, .L860
+	movs	r1, #0
+	ldr	r3, .L860+4
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	movs	r6, #0
+	ldrh	r3, [r3, #0]
+	mov	r7, r6
+	ldr	r0, [r2, #0]
+	movs	r2, #6
+	muls	r2, r3, r2
+	mov	r4, r6
+	bl	memset
+	ldr	r3, .L860+8
+	ldr	sl, .L860+68
+	str	r6, [r3, #0]
+	ldr	r3, .L860+12
+	str	r6, [r3, #0]
+	ldr	r3, .L860+16
+	str	r6, [r3, #0]
+	ldr	r3, .L860+20
+	strh	r6, [r3, #0]	@ movhi
+	ldr	r3, .L860+24
+	strh	r6, [r3, #0]	@ movhi
+	b	.L850
+.L852:
+	ldr	r2, .L860+28
+	mov	r1, r4
+	ldrb	r0, [r2, r8]	@ zero_extendqisi2
+	bl	V2P_block
+	bl	FtlBbmIsBadBlock
+	cbnz	r0, .L851
+	ldrh	r3, [fp, #0]
+	adds	r5, r5, r3
+	uxth	r5, r5
+.L851:
+	add	r8, r8, #1
+	uxth	r8, r8
+	b	.L857
+.L859:
+	movs	r5, #0
+	ldr	fp, .L860+72
+	mov	r8, r5
+.L857:
+	ldr	r2, .L860+32
+	ldrh	r3, [r2, #0]
+	cmp	r3, r8
+	bhi	.L852
+	cbz	r5, .L853
+	mov	r1, r5
+	mov	r0, #32768
+	bl	__aeabi_idiv
+	uxth	r5, r0
+	b	.L854
+.L853:
+	ldr	r3, .L860+36
+	movw	r2, #65535
+	ldr	r3, [r3, #0]
+	strh	r2, [r3, r4, lsl #1]	@ movhi
+.L854:
+	ldr	r3, .L860
+	movs	r2, #6
+	ldr	r3, [r3, #0]
+	mla	r3, r2, r4, r3
+	strh	r5, [r3, #4]	@ movhi
+	ldr	r3, .L860+40
+	ldrh	r3, [r3, #0]
+	cmp	r3, r4
+	beq	.L855
+	ldr	r3, .L860+44
+	ldrh	r3, [r3, #0]
+	cmp	r3, r4
+	beq	.L855
+	ldr	r3, .L860+48
+	ldrh	r3, [r3, #0]
+	cmp	r3, r4
+	beq	.L855
+	ldr	r3, .L860+36
+	ldr	r3, [r3, #0]
+	ldrh	r3, [r3, r4, lsl #1]
+	cbnz	r3, .L856
+	adds	r6, r6, #1
+	mov	r0, r4
+	uxth	r6, r6
+	bl	INSERT_FREE_LIST
+	b	.L855
+.L856:
+	adds	r7, r7, #1
+	mov	r0, r4
+	uxth	r7, r7
+	bl	INSERT_DATA_LIST
+.L855:
+	adds	r4, r4, #1
+	uxth	r4, r4
+.L850:
+	ldrh	r3, [sl, #0]
+	cmp	r4, r3
+	bcc	.L859
+	ldr	r2, .L860+20
+	strh	r7, [r2, #0]	@ movhi
+	ldr	r2, .L860+24
+	strh	r6, [r2, #0]	@ movhi
+	adds	r6, r7, r6
+	cmp	r6, r3
+	ble	.L858
+	ldr	r1, .L860+52
+	movw	r2, #2209
+	ldr	r0, .L860+56
+	bl	printf
+	ldr	r0, .L860+60
+	ldr	r1, .L860+64
+	bl	printf
+.L858:
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L861:
+	.align	2
+.L860:
+	.word	.LANCHOR97
+	.word	.LANCHOR56
+	.word	.LANCHOR103
+	.word	.LANCHOR98
+	.word	.LANCHOR100
+	.word	.LANCHOR101
+	.word	.LANCHOR104
+	.word	.LANCHOR62
+	.word	.LANCHOR53
+	.word	.LANCHOR99
+	.word	.LANCHOR107
+	.word	.LANCHOR108
+	.word	.LANCHOR109
+	.word	.LANCHOR127
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR55
+	.word	.LANCHOR68
+	.size	SupperBlkListInit, .-SupperBlkListInit
+	.section	.text.update_multiplier_value,"ax",%progbits
+	.align	1
+	.global	update_multiplier_value
+	.thumb
+	.thumb_func
+	.type	update_multiplier_value, %function
+update_multiplier_value:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, r8, sl, lr}
+	movs	r4, #0
+	mov	r6, r0
+	mov	r5, r4
+	ldr	sl, .L867+8
+	ldr	r8, .L867+12
+	ldr	r7, .L867
+	b	.L863
+.L865:
+	mov	r1, r6
+	ldrb	r0, [r8, r5]	@ zero_extendqisi2
+	bl	V2P_block
+	bl	FtlBbmIsBadBlock
+	cbnz	r0, .L864
+	ldrh	r3, [r7, #0]
+	adds	r4, r4, r3
+	uxth	r4, r4
+.L864:
+	adds	r5, r5, #1
+	uxth	r5, r5
+.L863:
+	ldrh	r3, [sl, #0]
+	cmp	r3, r5
+	bhi	.L865
+	cbz	r4, .L866
+	mov	r1, r4
+	mov	r0, #32768
+	bl	__aeabi_idiv
+	uxth	r4, r0
+.L866:
+	ldr	r3, .L867+4
+	movs	r2, #6
+	movs	r0, #0
+	ldr	r3, [r3, #0]
+	mla	r6, r2, r6, r3
+	strh	r4, [r6, #4]	@ movhi
+	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
+.L868:
+	.align	2
+.L867:
+	.word	.LANCHOR68
+	.word	.LANCHOR97
+	.word	.LANCHOR53
+	.word	.LANCHOR62
+	.size	update_multiplier_value, .-update_multiplier_value
+	.section	.text.GetFreeBlockMinEraseCount,"ax",%progbits
+	.align	1
+	.global	GetFreeBlockMinEraseCount
+	.thumb
+	.thumb_func
+	.type	GetFreeBlockMinEraseCount, %function
+GetFreeBlockMinEraseCount:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L872
+	ldr	r0, [r3, #0]
+	cbz	r0, .L870
+	ldr	r3, .L872+4
+	ldr	r3, [r3, #0]
+	subs	r0, r0, r3
+	ldr	r3, .L872+8
+	asrs	r0, r0, #1
+	muls	r0, r3, r0
+	ldr	r3, .L872+12
+	uxth	r0, r0
+	ldr	r3, [r3, #0]
+	ldrh	r0, [r3, r0, lsl #1]
+.L870:
+	bx	lr
+.L873:
+	.align	2
+.L872:
+	.word	.LANCHOR103
+	.word	.LANCHOR97
+	.word	-1431655765
+	.word	.LANCHOR94
+	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
+	.section	.text.GetFreeBlockMaxEraseCount,"ax",%progbits
+	.align	1
+	.global	GetFreeBlockMaxEraseCount
+	.thumb
+	.thumb_func
+	.type	GetFreeBlockMaxEraseCount, %function
+GetFreeBlockMaxEraseCount:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L881
+	push	{r4, r5, r6, lr}
+	ldr	r3, [r3, #0]
+	cbz	r3, .L880
+	ldr	r2, .L881+4
+	movs	r1, #7
+	movw	r5, #65535
+	ldrh	r2, [r2, #0]
+	muls	r2, r1, r2
+	asrs	r2, r2, #3
+	cmp	r0, r2
+	it	gt
+	uxthgt	r0, r2
+	ldr	r2, .L881+8
+	movs	r6, #6
+	ldr	r1, [r2, #0]
+	ldr	r2, .L881+12
+	subs	r3, r3, r1
+	asrs	r3, r3, #1
+	muls	r3, r2, r3
+	movs	r2, #0
+	uxth	r3, r3
+	b	.L877
+.L879:
+	mul	r4, r6, r3
+	ldrh	r4, [r1, r4]
+	cmp	r4, r5
+	beq	.L878
+	adds	r2, r2, #1
+	mov	r3, r4
+	uxth	r2, r2
+.L877:
+	cmp	r2, r0
+	bne	.L879
+.L878:
+	ldr	r2, .L881+16
+	ldr	r2, [r2, #0]
+	ldrh	r0, [r2, r3, lsl #1]
+	pop	{r4, r5, r6, pc}
+.L880:
+	mov	r0, r3
+	pop	{r4, r5, r6, pc}
+.L882:
+	.align	2
+.L881:
+	.word	.LANCHOR103
+	.word	.LANCHOR104
+	.word	.LANCHOR97
+	.word	-1431655765
+	.word	.LANCHOR94
+	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
+	.section	.text.free_data_superblock,"ax",%progbits
+	.align	1
+	.global	free_data_superblock
+	.thumb
+	.thumb_func
+	.type	free_data_superblock, %function
+free_data_superblock:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	movw	r2, #65535
+	cmp	r0, r2
+	push	{r3, lr}
+	beq	.L884
+	ldr	r2, .L885
+	movs	r1, #0
+	ldr	r2, [r2, #0]
+	strh	r1, [r2, r0, lsl #1]	@ movhi
+	bl	INSERT_FREE_LIST
+.L884:
+	movs	r0, #0
+	pop	{r3, pc}
+.L886:
+	.align	2
+.L885:
+	.word	.LANCHOR99
+	.size	free_data_superblock, .-free_data_superblock
+	.section	.text.FtlGcBufInit,"ax",%progbits
+	.align	1
+	.global	FtlGcBufInit
+	.thumb
+	.thumb_func
+	.type	FtlGcBufInit, %function
+FtlGcBufInit:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L892
+	movs	r2, #0
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r4, r2
+	str	r2, [r3, #0]
+	ldr	r3, .L892+4
+	ldrh	ip, [r3, #0]
+	ldr	r3, .L892+8
+	ldr	r7, [r3, #0]
+	ldr	r3, .L892+12
+	ldr	r6, [r3, #0]
+	ldr	r3, .L892+16
+	ldr	r1, [r3, #0]
+	ldr	r3, .L892+20
+	ldrh	r5, [r3, #0]
+	ldr	r3, .L892+24
+	str	r5, [sp, #4]
+	ldrh	fp, [r3, #0]
+	ldr	r3, .L892+28
+	ldr	r0, [r3, #0]
+	mov	r3, r2
+	b	.L888
+.L889:
+	movs	r5, #1
+	bic	r4, r4, #3
+	adds	r3, r3, r5
+	bic	r2, r2, #3
+	adds	r4, r7, r4
+	adds	r2, r6, r2
+	str	r4, [r1, #-12]
+	uxth	r3, r3
+	str	r2, [r1, #-8]
+	str	r5, [r1, #-4]
+	str	r4, [r0, #-28]
+	mov	r4, r8
+	str	r2, [r0, #-24]
+	mov	r2, sl
+.L888:
+	adds	r1, r1, #12
+	ldr	r5, [sp, #4]
+	adds	r0, r0, #36
+	cmp	r3, ip
+	add	r8, r4, r5
+	add	sl, r2, fp
+	bne	.L889
+	ldr	r1, .L892+8
+	movs	r4, #12
+	ldr	r2, .L892+32
+	mov	fp, #0
+	ldr	ip, [r1, #0]
+	ldr	r1, .L892+20
+	ldr	r8, [r2, #0]
+	ldr	r2, .L892+16
+	ldrh	r7, [r1, #0]
+	ldr	r1, .L892+12
+	ldr	r2, [r2, #0]
+	ldr	r6, [r1, #0]
+	ldr	r1, .L892+24
+	ldrh	r5, [r1, #0]
+	b	.L890
+.L891:
+	mul	r1, r4, r3
+	mul	r0, r7, r3
+	add	sl, r2, r1
+	bic	r0, r0, #3
+	str	fp, [sl, #8]
+	add	r0, ip, r0
+	str	r0, [r2, r1]
+	mul	r1, r5, r3
+	adds	r3, r3, #1
+	uxth	r3, r3
+	bic	r1, r1, #3
+	adds	r1, r6, r1
+	str	r1, [sl, #4]
+.L890:
+	cmp	r3, r8
+	bcc	.L891
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L893:
+	.align	2
+.L892:
+	.word	.LANCHOR128
+	.word	.LANCHOR53
+	.word	.LANCHOR129
+	.word	.LANCHOR130
+	.word	.LANCHOR131
+	.word	.LANCHOR73
+	.word	.LANCHOR74
+	.word	.LANCHOR132
+	.word	.LANCHOR133
+	.size	FtlGcBufInit, .-FtlGcBufInit
+	.section	.text.FtlVariablesInit,"ax",%progbits
+	.align	1
+	.global	FtlVariablesInit
+	.thumb
+	.thumb_func
+	.type	FtlVariablesInit, %function
+FtlVariablesInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	movs	r4, #0
+	ldr	r3, .L895
+	movw	r2, #65535
+	ldr	r5, .L895+4
+	mov	r1, r4
+	str	r4, [r3, #0]
+	ldr	r3, .L895+8
+	strh	r2, [r3, #0]	@ movhi
+	mov	r2, #-1
+	ldr	r3, .L895+12
+	str	r4, [r3, #0]
+	ldr	r3, .L895+16
+	str	r4, [r3, #0]
+	ldr	r3, .L895+20
+	str	r2, [r3, #0]
+	ldr	r3, .L895+24
+	str	r4, [r3, #0]
+	ldr	r3, .L895+28
+	strh	r4, [r3, #0]	@ movhi
+	ldr	r3, .L895+32
+	ldrh	r2, [r3, #0]
+	ldr	r3, .L895+36
+	lsls	r2, r2, #1
+	ldr	r0, [r3, #0]
+	bl	memset
+	ldrh	r2, [r5, #0]
+	ldr	r3, .L895+40
+	mov	r1, r4
+	lsls	r2, r2, #1
+	ldr	r0, [r3, #0]
+	bl	memset
+	ldr	r3, .L895+44
+	ldrh	r2, [r5, #0]
+	mov	r1, r4
+	ldr	r0, [r3, #0]
+	lsls	r2, r2, #1
+	bl	memset
+	mov	r1, r4
+	movs	r2, #48
+	ldr	r0, .L895+48
+	bl	memset
+	mov	r1, r4
+	mov	r2, #512
+	ldr	r0, .L895+52
+	bl	memset
+	bl	FtlGcBufInit
+	bl	FtlL2PDataInit
+	mov	r0, r4
+	pop	{r3, r4, r5, pc}
+.L896:
+	.align	2
+.L895:
+	.word	.LANCHOR134
+	.word	.LANCHOR56
+	.word	.LANCHOR135
+	.word	.LANCHOR136
+	.word	.LANCHOR137
+	.word	.LANCHOR138
+	.word	.LANCHOR126
+	.word	.LANCHOR85
+	.word	.LANCHOR77
+	.word	.LANCHOR86
+	.word	.LANCHOR94
+	.word	.LANCHOR139
+	.word	.LANCHOR140
+	.word	.LANCHOR141
+	.size	FtlVariablesInit, .-FtlVariablesInit
+	.section	.text.FtlGcBufFree,"ax",%progbits
+	.align	1
+	.global	FtlGcBufFree
+	.thumb
+	.thumb_func
+	.type	FtlGcBufFree, %function
+FtlGcBufFree:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L904
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	movs	r5, #36
+	ldr	r6, [r3, #0]
+	ldr	r3, .L904+4
+	ldr	r4, [r3, #0]
+	movs	r3, #0
+	mov	fp, r3
+	b	.L898
+.L901:
+	mov	ip, #12
+	mul	r3, ip, r2
+	add	sl, r4, r3
+	ldr	ip, [r4, r3]
+	ldr	r3, [r7, #8]
+	cmp	ip, r3
+	bne	.L899
+	mov	r3, r8
+	str	fp, [sl, #8]
+	b	.L900
+.L899:
+	adds	r2, r2, #1
+	uxth	r2, r2
+.L903:
+	cmp	r2, r6
+	bcc	.L901
+	mov	r3, r8
+.L900:
+	adds	r3, r3, #1
+	uxth	r3, r3
+.L898:
+	cmp	r3, r1
+	bcs	.L897
+	mla	r7, r5, r3, r0
+	movs	r2, #0
+	mov	r8, r3
+	b	.L903
+.L897:
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L905:
+	.align	2
+.L904:
+	.word	.LANCHOR133
+	.word	.LANCHOR131
+	.size	FtlGcBufFree, .-FtlGcBufFree
+	.section	.text.FtlGcBufAlloc,"ax",%progbits
+	.align	1
+	.global	FtlGcBufAlloc
+	.thumb
+	.thumb_func
+	.type	FtlGcBufAlloc, %function
+FtlGcBufAlloc:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L913
+	push	{r4, r5, r6, r7, r8, sl, lr}
+	movs	r7, #12
+	ldr	r8, [r3, #0]
+	movs	r6, #1
+	ldr	r3, .L913+4
+	movs	r5, #36
+	ldr	ip, [r3, #0]
+	movs	r3, #0
+	b	.L907
+.L910:
+	mla	r4, r7, r2, ip
+	ldr	sl, [r4, #8]
+	cmp	sl, #0
+	bne	.L908
+	mla	r2, r5, r3, r0
+	str	r6, [r4, #8]
+	ldr	sl, [r4, #0]
+	ldr	r4, [r4, #4]
+	str	sl, [r2, #8]
+	str	r4, [r2, #12]
+	b	.L909
+.L908:
+	adds	r2, r2, #1
+	uxth	r2, r2
+	b	.L911
+.L912:
+	movs	r2, #0
+.L911:
+	cmp	r2, r8
+	bcc	.L910
+.L909:
+	adds	r3, r3, #1
+	uxth	r3, r3
+.L907:
+	cmp	r3, r1
+	bcc	.L912
+	pop	{r4, r5, r6, r7, r8, sl, pc}
+.L914:
+	.align	2
+.L913:
+	.word	.LANCHOR133
+	.word	.LANCHOR131
+	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
+	.section	.text.IsBlkInGcList,"ax",%progbits
+	.align	1
+	.global	IsBlkInGcList
+	.thumb
+	.thumb_func
+	.type	IsBlkInGcList, %function
+IsBlkInGcList:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L920
+	push	{r4, lr}
+	ldrh	r1, [r3, #0]
+	ldr	r3, .L920+4
+	ldr	r2, [r3, #0]
+	movs	r3, #0
+	b	.L916
+.L918:
+	ldrh	r4, [r2], #2
+	cmp	r4, r0
+	beq	.L919
+	adds	r3, r3, #1
+	uxth	r3, r3
+.L916:
+	cmp	r3, r1
+	bne	.L918
+	movs	r0, #0
+	pop	{r4, pc}
+.L919:
+	movs	r0, #1
+	pop	{r4, pc}
+.L921:
+	.align	2
+.L920:
+	.word	.LANCHOR142
+	.word	.LANCHOR143
+	.size	IsBlkInGcList, .-IsBlkInGcList
+	.section	.text.FtlGcUpdatePage,"ax",%progbits
+	.align	1
+	.global	FtlGcUpdatePage
+	.thumb
+	.thumb_func
+	.type	FtlGcUpdatePage, %function
+FtlGcUpdatePage:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r4, r0
+	ubfx	r0, r0, #10, #16
+	mov	r5, r1
+	mov	r6, r2
+	bl	P2V_block_in_plane
+	ldr	r3, .L926
+	ldrh	r7, [r3, #0]
+	ldr	r3, .L926+4
+	ldr	r2, [r3, #0]
+	movs	r3, #0
+	mov	r1, r2
+	b	.L923
+.L925:
+	ldrh	ip, [r1], #2
+	cmp	ip, r0
+	beq	.L924
+	adds	r3, r3, #1
+	uxth	r3, r3
+.L923:
+	cmp	r3, r7
+	bne	.L925
+	strh	r0, [r2, r3, lsl #1]	@ movhi
+	ldr	r3, .L926
+	ldrh	r2, [r3, #0]
+	adds	r2, r2, #1
+	strh	r2, [r3, #0]	@ movhi
+.L924:
+	ldr	r0, .L926+8
+	movs	r1, #12
+	ldr	r3, .L926+12
+	ldr	r0, [r0, #0]
+	ldrh	r2, [r3, #0]
+	muls	r1, r2, r1
+	adds	r7, r0, r1
+	str	r4, [r0, r1]
+	adds	r2, r2, #1
+	str	r5, [r7, #4]
+	str	r6, [r7, #8]
+	strh	r2, [r3, #0]	@ movhi
+	pop	{r3, r4, r5, r6, r7, pc}
+.L927:
+	.align	2
+.L926:
+	.word	.LANCHOR142
+	.word	.LANCHOR143
+	.word	.LANCHOR145
+	.word	.LANCHOR144
+	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
+	.section	.text.FtlGcPageVarInit,"ax",%progbits
+	.align	1
+	.global	FtlGcPageVarInit
+	.thumb
+	.thumb_func
+	.type	FtlGcPageVarInit, %function
+FtlGcPageVarInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r2, .L929
+	movs	r3, #0
+	push	{r4, lr}
+	movs	r1, #255
+	strh	r3, [r2, #0]	@ movhi
+	ldr	r4, .L929+4
+	ldr	r2, .L929+8
+	strh	r3, [r2, #0]	@ movhi
+	ldrh	r2, [r4, #0]
+	ldr	r3, .L929+12
+	lsls	r2, r2, #1
+	ldr	r0, [r3, #0]
+	bl	memset
+	ldr	r2, .L929+16
+	ldrh	r3, [r4, #0]
+	movs	r1, #255
+	ldr	r0, [r2, #0]
+	movs	r2, #12
+	muls	r2, r3, r2
+	bl	memset
+	pop	{r4, lr}
+	b	FtlGcBufInit
+.L930:
+	.align	2
+.L929:
+	.word	.LANCHOR142
+	.word	.LANCHOR70
+	.word	.LANCHOR144
+	.word	.LANCHOR143
+	.word	.LANCHOR145
+	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
+	.section	.text.FtlGcRefreshBlock,"ax",%progbits
+	.align	1
+	.global	FtlGcRefreshBlock
+	.thumb
+	.thumb_func
+	.type	FtlGcRefreshBlock, %function
+FtlGcRefreshBlock:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, lr}
+	ldr	r4, .L934
+	ldrh	r5, [r4, #0]
+	cmp	r5, r0
+	beq	.L932
+	ldr	r3, .L934+4
+	ldrh	r1, [r3, #0]
+	cmp	r1, r0
+	beq	.L932
+	movw	r2, #65535
+	cmp	r5, r2
+	bne	.L933
+	strh	r0, [r4, #0]	@ movhi
+	b	.L932
+.L933:
+	cmp	r1, r2
+	it	eq
+	strheq	r0, [r3, #0]	@ movhi
+.L932:
+	movs	r0, #0
+	pop	{r4, r5, pc}
+.L935:
+	.align	2
+.L934:
+	.word	.LANCHOR146
+	.word	.LANCHOR147
+	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
+	.section	.text.FtlGcMarkBadPhyBlk,"ax",%progbits
+	.align	1
+	.global	FtlGcMarkBadPhyBlk
+	.thumb
+	.thumb_func
+	.type	FtlGcMarkBadPhyBlk, %function
+FtlGcMarkBadPhyBlk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	mov	r4, r0
+	bl	P2V_block_in_plane
+	mov	r5, r0
+	bl	FtlGcRefreshBlock
+	ldr	r3, .L941
+	ldr	r3, [r3, #0]
+	cbz	r3, .L937
+	ldr	r3, .L941+4
+	ldr	r3, [r3, #0]
+	ldrh	r2, [r3, r5, lsl #1]
+	cmp	r2, #29
+	bls	.L937
+	subs	r2, r2, #30
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+.L937:
+	ldr	r3, .L941+8
+	ldr	r2, .L941+12
+	ldrh	r1, [r3, #0]
+	movs	r3, #0
+	b	.L938
+.L940:
+	ldrh	r0, [r2, #2]!
+	cmp	r0, r4
+	beq	.L939
+	adds	r3, r3, #1
+	uxth	r3, r3
+.L938:
+	cmp	r3, r1
+	bne	.L940
+	cmp	r3, #15
+	bhi	.L939
+	ldr	r2, .L941+16
+	strh	r4, [r2, r3, lsl #1]	@ movhi
+	adds	r3, r3, #1
+	ldr	r2, .L941+8
+	strh	r3, [r2, #0]	@ movhi
+.L939:
+	movs	r0, #0
+	pop	{r3, r4, r5, pc}
+.L942:
+	.align	2
+.L941:
+	.word	.LANCHOR126
+	.word	.LANCHOR94
+	.word	.LANCHOR148
+	.word	.LANCHOR149-2
+	.word	.LANCHOR149
+	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
+	.section	.text.FtlGcReFreshBadBlk,"ax",%progbits
+	.align	1
+	.global	FtlGcReFreshBadBlk
+	.thumb
+	.thumb_func
+	.type	FtlGcReFreshBadBlk, %function
+FtlGcReFreshBadBlk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L946
+	push	{r4, lr}
+	ldrh	r3, [r3, #0]
+	cbz	r3, .L944
+	ldr	r2, .L946+4
+	ldrh	r1, [r2, #0]
+	movw	r2, #65535
+	cmp	r1, r2
+	bne	.L944
+	ldr	r4, .L946+8
+	ldrh	r2, [r4, #0]
+	cmp	r2, r3
+	bcc	.L945
+	movs	r3, #0
+	strh	r3, [r4, #0]	@ movhi
+.L945:
+	ldr	r3, .L946+12
+	ldrh	r2, [r4, #0]
+	ldrh	r0, [r3, r2, lsl #1]
+	bl	P2V_block_in_plane
+	bl	FtlGcRefreshBlock
+	ldrh	r3, [r4, #0]
+	adds	r3, r3, #1
+	strh	r3, [r4, #0]	@ movhi
+.L944:
+	movs	r0, #0
+	pop	{r4, pc}
+.L947:
+	.align	2
+.L946:
+	.word	.LANCHOR148
+	.word	.LANCHOR146
+	.word	.LANCHOR150
+	.word	.LANCHOR149
+	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
+	.section	.text.ftl_memset,"ax",%progbits
+	.align	1
+	.global	ftl_memset
+	.thumb
+	.thumb_func
+	.type	ftl_memset, %function
+ftl_memset:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	memset
+	.size	ftl_memset, .-ftl_memset
+	.section	.text.ftl_memcpy,"ax",%progbits
+	.align	1
+	.global	ftl_memcpy
+	.thumb
+	.thumb_func
+	.type	ftl_memcpy, %function
+ftl_memcpy:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	memcpy
+	.size	ftl_memcpy, .-ftl_memcpy
+	.section	.text.ftl_memcmp,"ax",%progbits
+	.align	1
+	.global	ftl_memcmp
+	.thumb
+	.thumb_func
+	.type	ftl_memcmp, %function
+ftl_memcmp:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	memcmp
+	.size	ftl_memcmp, .-ftl_memcmp
+	.section	.text.rknand_get_clk_rate,"ax",%progbits
+	.align	1
+	.global	rknand_get_clk_rate
+	.thumb
+	.thumb_func
+	.type	rknand_get_clk_rate, %function
+rknand_get_clk_rate:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r0, .L952
+	bx	lr
+.L953:
+	.align	2
+.L952:
+	.word	148000000
+	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
+	.section	.text.ftl_malloc,"ax",%progbits
+	.align	1
+	.global	ftl_malloc
+	.thumb
+	.thumb_func
+	.type	ftl_malloc, %function
+ftl_malloc:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	movs	r1, #0
+	b	kmalloc
+	.size	ftl_malloc, .-ftl_malloc
+	.section	.text.FtlMemInit,"ax",%progbits
+	.align	1
+	.global	FtlMemInit
+	.thumb
+	.thumb_func
+	.type	FtlMemInit, %function
+FtlMemInit:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L960
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	movs	r1, #0
+	str	r1, [r3, #0]
+	movs	r5, #12
+	ldr	r3, .L960+4
+	ldr	r2, .L960+8
+	ldr	r4, .L960+12
+	str	r1, [r3, #0]
+	ldr	r3, .L960+16
+	ldrh	r0, [r4, #0]
+	ldr	r8, .L960+296
+	str	r1, [r3, #0]
+	ldr	r3, .L960+20
+	lsls	r0, r0, #1
+	ldr	r7, .L960+24
+	str	r1, [r3, #0]
+	ldr	r3, .L960+28
+	str	r1, [r3, #0]
+	ldr	r3, .L960+32
+	str	r1, [r3, #0]
+	ldr	r3, .L960+36
+	str	r1, [r3, #0]
+	ldr	r3, .L960+40
+	str	r1, [r3, #0]
+	ldr	r3, .L960+44
+	str	r1, [r3, #0]
+	ldr	r3, .L960+48
+	str	r1, [r3, #0]
+	ldr	r3, .L960+52
+	str	r1, [r3, #0]
+	ldr	r3, .L960+56
+	str	r1, [r3, #0]
+	ldr	r3, .L960+60
+	str	r1, [r3, #0]
+	ldr	r3, .L960+64
+	str	r1, [r3, #0]
+	ldr	r3, .L960+68
+	str	r1, [r3, #0]
+	ldr	r3, .L960+72
+	str	r1, [r3, #0]
+	ldr	r3, .L960+76
+	str	r1, [r3, #0]
+	movw	r3, #65535
+	str	r3, [r2, #0]
+	ldr	r2, .L960+80
+	str	r1, [r2, #0]
+	ldr	r2, .L960+84
+	str	r1, [r2, #0]
+	ldr	r2, .L960+88
+	str	r1, [r2, #0]
+	ldr	r2, .L960+92
+	strh	r3, [r2, #0]	@ movhi
+	ldr	r2, .L960+96
+	strh	r3, [r2, #0]	@ movhi
+	movs	r2, #32
+	ldr	r3, .L960+100
+	strh	r2, [r3, #0]	@ movhi
+	movs	r2, #128
+	ldr	r3, .L960+104
+	strh	r2, [r3, #0]	@ movhi
+	ldr	r3, .L960+108
+	strh	r1, [r3, #0]	@ movhi
+	ldr	r3, .L960+112
+	strh	r1, [r3, #0]	@ movhi
+	ldr	r3, .L960+116
+	strh	r1, [r3, #0]	@ movhi
+	str	r1, [sp, #4]
+	bl	ftl_malloc
+	ldr	r3, .L960+120
+	str	r0, [r3, #0]
+	ldrh	r0, [r4, #0]
+	muls	r0, r5, r0
+	bl	ftl_malloc
+	ldr	r3, .L960+124
+	movs	r4, #36
+	str	r0, [r3, #0]
+	ldrh	r3, [r8, #0]
+	muls	r4, r3, r4
+	lsls	r6, r4, #2
+	mov	r0, r6
+	bl	ftl_malloc
+	ldr	r3, .L960+128
+	str	r0, [r3, #0]
+	mov	r0, r4
+	bl	ftl_malloc
+	ldr	r3, .L960+132
+	str	r0, [r3, #0]
+	mov	r0, r6
+	bl	ftl_malloc
+	ldr	r3, .L960+136
+	ldr	r6, .L960+140
+	str	r0, [r3, #0]
+	mov	r0, r4
+	bl	ftl_malloc
+	ldr	r3, .L960+144
+	str	r0, [r3, #0]
+	mov	r0, r4
+	bl	ftl_malloc
+	ldr	r3, .L960+148
+	ldrh	r4, [r6, #0]
+	str	r0, [r3, #0]
+	mov	r0, r4
+	ldrh	r3, [r8, #0]
+	lsls	r3, r3, #1
+	adds	r3, r3, #1
+	str	r3, [r7, #0]
+	bl	ftl_malloc
+	ldr	r3, .L960+152
+	str	r0, [r3, #0]
+	mov	r0, r4
+	bl	ftl_malloc
+	ldr	r3, .L960+156
+	str	r0, [r3, #0]
+	mov	r0, r4
+	bl	ftl_malloc
+	ldr	r3, .L960+160
+	str	r0, [r3, #0]
+	ldr	r0, [r7, #0]
+	muls	r0, r4, r0
+	bl	ftl_malloc
+	ldr	r3, .L960+164
+	str	r0, [r3, #0]
+	mov	r0, r4
+	bl	ftl_malloc
+	ldr	r3, .L960+168
+	str	r0, [r3, #0]
+	mov	r0, r4
+	bl	ftl_malloc
+	ldr	r3, .L960+172
+	ldr	r4, .L960+176
+	str	r0, [r3, #0]
+	ldr	r0, [r7, #0]
+	muls	r0, r5, r0
+	bl	ftl_malloc
+	ldr	r3, .L960+180
+	ldrh	r8, [r8, #0]
+	str	r0, [r3, #0]
+	ldrh	r3, [r4, #0]
+	mul	r8, r8, r3
+	mov	r0, r8
+	bl	ftl_malloc
+	ldr	r3, .L960+184
+	str	r0, [r3, #0]
+	lsl	r0, r8, #2
+	bl	ftl_malloc
+	ldr	r3, .L960+188
+	str	r0, [r3, #0]
+	ldrh	r3, [r4, #0]
+	ldr	r0, [r7, #0]
+	muls	r0, r3, r0
+	bl	ftl_malloc
+	ldr	r4, .L960+192
+	ldr	r3, .L960+196
+	ldr	r7, .L960+200
+	str	r0, [r3, #0]
+	ldrh	r0, [r4, #0]
+	lsls	r0, r0, #1
+	uxth	r0, r0
+	strh	r0, [r7, #0]	@ movhi
+	bl	ftl_malloc
+	ldr	r3, .L960+204
+	str	r0, [r3, #0]
+	ldrh	r0, [r7, #0]
+	addw	r0, r0, #547
+	lsrs	r0, r0, #9
+	strh	r0, [r7, #0]	@ movhi
+	ldr	r7, .L960+208
+	lsls	r0, r0, #9
+	bl	ftl_malloc
+	ldr	r3, .L960+212
+	str	r0, [r3, #0]
+	adds	r0, r0, #32
+	ldr	r3, .L960+216
+	str	r0, [r3, #0]
+	ldrh	r0, [r4, #0]
+	lsls	r0, r0, #1
+	bl	ftl_malloc
+	ldr	r3, .L960+220
+	str	r0, [r3, #0]
+	ldr	r3, [r7, #0]
+	lsl	r8, r3, #1
+	mov	r0, r8
+	bl	ftl_malloc
+	ldr	r3, .L960+224
+	str	r0, [r3, #0]
+	mov	r0, r8
+	bl	ftl_malloc
+	ldr	r3, .L960+228
+	ldr	r8, .L960+300
+	str	r0, [r3, #0]
+	ldrh	r0, [r4, #0]
+	lsrs	r0, r0, #3
+	adds	r0, r0, #4
+	bl	ftl_malloc
+	ldr	r3, .L960+232
+	str	r0, [r3, #0]
+	ldrh	r0, [r8, #0]
+	lsls	r0, r0, #1
+	bl	ftl_malloc
+	ldr	r3, .L960+236
+	str	r0, [r3, #0]
+	ldrh	r0, [r8, #0]
+	lsls	r0, r0, #1
+	bl	ftl_malloc
+	ldr	r3, .L960+240
+	str	r0, [r3, #0]
+	ldrh	r0, [r8, #0]
+	ldr	r8, .L960+304
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L960+244
+	str	r0, [r3, #0]
+	ldrh	r0, [r8, #0]
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L960+248
+	ldrh	r2, [r8, #0]
+	ldr	r1, [sp, #4]
+	lsls	r2, r2, #2
+	str	r0, [r3, #0]
+	bl	memset
+	ldr	r3, .L960+252
+	ldrh	r0, [r3, #0]
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L960+256
+	str	r0, [r3, #0]
+	ldr	r0, [r7, #0]
+	ldr	r7, .L960+260
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L960+264
+	str	r0, [r3, #0]
+	ldrh	r0, [r7, #0]
+	muls	r0, r5, r0
+	bl	ftl_malloc
+	ldr	r3, .L960+268
+	ldr	r5, .L960+272
+	str	r0, [r3, #0]
+	ldrh	r3, [r7, #0]
+	ldrh	r0, [r6, #0]
+	muls	r0, r3, r0
+	bl	ftl_malloc
+	ldr	r3, .L960+276
+	str	r0, [r3, #0]
+	movs	r0, #6
+	ldrh	r3, [r4, #0]
+	muls	r0, r3, r0
+	bl	ftl_malloc
+	ldr	r3, .L960+280
+	ldr	r4, .L960+284
+	ldrh	r2, [r5, #0]
+	str	r0, [r3, #0]
+	ldr	r3, .L960+288
+	ldrh	r3, [r3, #0]
+	adds	r3, r3, #31
+	lsrs	r3, r3, #5
+	strh	r3, [r4, #0]	@ movhi
+	muls	r3, r2, r3
+	lsls	r0, r3, #2
+	bl	ftl_malloc
+	ldr	r2, .L960+292
+	ldrh	r4, [r4, #0]
+	movs	r1, #1
+	mov	r3, r2
+	ldrh	r5, [r5, #0]
+	lsls	r4, r4, #2
+	str	r0, [r3, #28]!
+	mov	r0, r4
+	b	.L956
+.L961:
+	.align	2
+.L960:
+	.word	.LANCHOR151
+	.word	.LANCHOR152
+	.word	.LANCHOR167
+	.word	.LANCHOR70
+	.word	.LANCHOR153
+	.word	.LANCHOR154
+	.word	.LANCHOR133
+	.word	.LANCHOR155
+	.word	.LANCHOR156
+	.word	.LANCHOR157
+	.word	.LANCHOR158
+	.word	.LANCHOR159
+	.word	.LANCHOR160
+	.word	.LANCHOR161
+	.word	.LANCHOR162
+	.word	.LANCHOR95
+	.word	.LANCHOR163
+	.word	.LANCHOR164
+	.word	.LANCHOR165
+	.word	.LANCHOR166
+	.word	.LANCHOR168
+	.word	.LANCHOR169
+	.word	.LANCHOR88
+	.word	.LANCHOR146
+	.word	.LANCHOR147
+	.word	.LANCHOR170
+	.word	.LANCHOR171
+	.word	.LANCHOR172
+	.word	.LANCHOR148
+	.word	.LANCHOR150
+	.word	.LANCHOR143
+	.word	.LANCHOR145
+	.word	.LANCHOR173
+	.word	.LANCHOR174
+	.word	.LANCHOR175
+	.word	.LANCHOR73
+	.word	.LANCHOR93
+	.word	.LANCHOR132
+	.word	.LANCHOR96
+	.word	.LANCHOR176
+	.word	.LANCHOR177
+	.word	.LANCHOR129
+	.word	.LANCHOR178
+	.word	.LANCHOR179
+	.word	.LANCHOR74
+	.word	.LANCHOR131
+	.word	.LANCHOR180
+	.word	.LANCHOR181
+	.word	.LANCHOR56
+	.word	.LANCHOR130
+	.word	.LANCHOR182
+	.word	.LANCHOR139
+	.word	.LANCHOR80
+	.word	.LANCHOR183
+	.word	.LANCHOR94
+	.word	.LANCHOR99
+	.word	.LANCHOR122
+	.word	.LANCHOR118
+	.word	.LANCHOR117
+	.word	.LANCHOR86
+	.word	.LANCHOR184
+	.word	.LANCHOR185
+	.word	.LANCHOR186
+	.word	.LANCHOR82
+	.word	.LANCHOR124
+	.word	.LANCHOR83
+	.word	.LANCHOR123
+	.word	.LANCHOR112
+	.word	.LANCHOR60
+	.word	.LANCHOR119
+	.word	.LANCHOR97
+	.word	.LANCHOR90
+	.word	.LANCHOR66
+	.word	.LANCHOR89
+	.word	.LANCHOR53
+	.word	.LANCHOR77
+	.word	.LANCHOR78
+.L957:
+	ldr	r6, [r2, #28]
+	adds	r1, r1, #1
+	adds	r6, r6, r0
+	adds	r0, r0, r4
+	str	r6, [r3, #4]!
+.L956:
+	cmp	r1, r5
+	bcc	.L957
+	ldr	r0, .L962
+	movs	r3, #0
+	mov	r2, r3
+	add	r0, r0, r1, lsl #2
+	b	.L958
+.L959:
+	adds	r4, r0, r3
+	adds	r1, r1, #1
+	adds	r3, r3, #4
+	str	r2, [r4, #28]
+.L958:
+	cmp	r1, #7
+	bls	.L959
+	movs	r0, #0
+	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
+.L963:
+	.align	2
+.L962:
+	.word	.LANCHOR89
+	.size	FtlMemInit, .-FtlMemInit
+	.section	.text.NandcInit,"ax",%progbits
+	.align	1
+	.global	NandcInit
+	.thumb
+	.thumb_func
+	.type	NandcInit, %function
+NandcInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	movs	r2, #1
+	ldr	r3, .L965
+	movs	r4, #0
+	ldr	r5, .L965+4
+	stmia	r3, {r0, r4}
+	str	r2, [r3, #12]
+	movs	r2, #2
+	str	r0, [r3, #8]
+	str	r2, [r3, #20]
+	movs	r2, #3
+	str	r0, [r3, #16]
+	str	r2, [r3, #28]
+	str	r0, [r3, #24]
+	str	r0, [r5, #0]
+	ldr	r2, .L965+8
+	ldr	r3, [r0, #0]
+	and	r3, r3, #253952
+	ubfx	r1, r3, #13, #1
+	str	r1, [r2, #0]
+	ldr	r2, .L965+12
+	and	r3, r3, #245760
+	ldr	r1, [r0, #352]
+	orr	r3, r3, #256
+	ubfx	r1, r1, #16, #4
+	str	r1, [r2, #0]
+	ldr	r1, [r0, #352]
+	ldr	r2, .L965+16
+	str	r1, [r2, #0]
+	str	r3, [r0, #0]
+	str	r4, [r0, #336]
+	movs	r0, #40
+	bl	NandcTimeCfg
+	ldr	r3, [r5, #0]
+	movw	r2, #8322
+	mov	r0, #36864
+	str	r2, [r3, #344]
+	ldr	r2, .L965+20
+	str	r2, [r3, #304]
+	bl	ftl_malloc
+	ldr	r3, .L965+24
+	str	r0, [r3, #0]
+	ldr	r3, .L965+28
+	str	r0, [r3, #0]
+	add	r0, r0, #32768
+	str	r4, [r3, #24]
+	str	r0, [r3, #4]
+	ldr	r3, .L965+32
+	str	r4, [r3, #0]
+	pop	{r3, r4, r5, pc}
+.L966:
+	.align	2
+.L965:
+	.word	.LANCHOR5
+	.word	.LANCHOR30
+	.word	.LANCHOR187
+	.word	.LANCHOR37
+	.word	.LANCHOR40
+	.word	1710593
+	.word	.LANCHOR188
+	.word	.LANCHOR38
+	.word	.LANCHOR39
+	.size	NandcInit, .-NandcInit
+	.section	.text.ftl_free,"ax",%progbits
+	.align	1
+	.global	ftl_free
+	.thumb
+	.thumb_func
+	.type	ftl_free, %function
+ftl_free:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	free
+	.size	ftl_free, .-ftl_free
+	.section	.text.StorageSysDataLoad,"ax",%progbits
+	.align	1
+	.global	StorageSysDataLoad
+	.thumb
+	.thumb_func
+	.type	StorageSysDataLoad, %function
+StorageSysDataLoad:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	mov	r2, #512
+	mov	r5, r0
+	mov	r4, r1
+	mov	r0, r1
+	movs	r1, #0
+	bl	memset
+	movs	r0, #16
+	add	r1, r5, #256
+	movs	r2, #1
+	mov	r3, r4
+	pop	{r4, r5, r6, lr}
+	b	FtlRead
+	.size	StorageSysDataLoad, .-StorageSysDataLoad
+	.section	.text.StorageSysDataStore,"ax",%progbits
+	.align	1
+	.global	StorageSysDataStore
+	.thumb
+	.thumb_func
+	.type	StorageSysDataStore, %function
+StorageSysDataStore:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r3, r1
+	movs	r2, #1
+	add	r1, r0, #256
+	movs	r0, #16
+	b	FtlWrite
+	.size	StorageSysDataStore, .-StorageSysDataStore
+	.section	.text.FlashCs123Init,"ax",%progbits
+	.align	1
+	.global	FlashCs123Init
+	.thumb
+	.thumb_func
+	.type	FlashCs123Init, %function
+FlashCs123Init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	FlashCs123Init, .-FlashCs123Init
+	.section	.text.rk_nand_de_init,"ax",%progbits
+	.align	1
+	.global	rk_nand_de_init
+	.thumb
+	.thumb_func
+	.type	rk_nand_de_init, %function
+rk_nand_de_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	FlashDeInit
+	.size	rk_nand_de_init, .-rk_nand_de_init
+	.section	.text.rk_ftl_get_capacity,"ax",%progbits
+	.align	1
+	.global	rk_ftl_get_capacity
+	.thumb
+	.thumb_func
+	.type	rk_ftl_get_capacity, %function
+rk_ftl_get_capacity:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L973
+	ldr	r0, [r3, #0]
+	bx	lr
+.L974:
+	.align	2
+.L973:
+	.word	.LANCHOR84
+	.size	rk_ftl_get_capacity, .-rk_ftl_get_capacity
+	.section	.text.rknand_print_hex,"ax",%progbits
+	.align	1
+	.global	rknand_print_hex
+	.thumb
+	.thumb_func
+	.type	rknand_print_hex, %function
+rknand_print_hex:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, r8, sl, lr}
+	movs	r7, #0
+	mov	sl, r0
+	mov	r4, r1
+	mov	r5, r2
+	mov	r8, r3
+	mov	r6, r7
+	b	.L976
+.L982:
+	cbnz	r7, .L977
+	ldr	r0, .L984
+	mov	r1, sl
+	mov	r2, r6
+	bl	printf
+.L977:
+	cmp	r5, #4
+	ldr	r0, .L984+4
+	bne	.L978
+	ldr	r1, [r4, r6, lsl #2]
+	b	.L983
+.L978:
+	cmp	r5, #2
+	ite	eq
+	ldrsheq	r1, [r4, r6, lsl #1]
+	ldrbne	r1, [r4, r6]	@ zero_extendqisi2
+.L983:
+	adds	r7, r7, #1
+	bl	printf
+	cmp	r7, #15
+	bls	.L981
+	ldr	r0, .L984+8
+	movs	r7, #0
+	ldr	r1, .L984+12
+	bl	printf
+.L981:
+	adds	r6, r6, #1
+.L976:
+	cmp	r6, r8
+	bne	.L982
+	ldr	r0, .L984+8
+	ldr	r1, .L984+12
+	pop	{r3, r4, r5, r6, r7, r8, sl, lr}
+	b	printf
+.L985:
+	.align	2
+.L984:
+	.word	.LC12
+	.word	.LC13
+	.word	.LC10
+	.word	.LC14
+	.size	rknand_print_hex, .-rknand_print_hex
+	.section	.text.FlashReadSlc2KPages,"ax",%progbits
+	.align	1
+	.global	FlashReadSlc2KPages
+	.thumb
+	.thumb_func
+	.type	FlashReadSlc2KPages, %function
+FlashReadSlc2KPages:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1000
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	sub	sp, sp, #24
+	mov	r7, r1
+	ldrb	r8, [r3, #9]	@ zero_extendqisi2
+	str	r2, [sp, #12]
+	mov	r4, r0
+	movs	r6, #0
+	ldr	sl, .L1000+28
+	b	.L987
+.L996:
+	subs	r3, r7, r6
+	ldr	r1, [sp, #12]
+	add	r2, sp, #20
+	mov	r0, r4
+	uxtb	r3, r3
+	str	r3, [sp, #0]
+	add	r3, sp, #16
+	bl	LogAddr2PhyAddr
+	ldr	r1, .L1000+4
+	ldr	r3, [sp, #16]
+	ldrb	r2, [r1, #0]	@ zero_extendqisi2
+	cmp	r3, r2
+	bcc	.L988
+	mov	r3, #-1
+	str	r3, [r4, #0]
+	b	.L989
+.L988:
+	ldr	r2, .L1000+8
+	ldrb	r5, [r2, r3]	@ zero_extendqisi2
+	mov	r0, r5
+	bl	NandcWaitFlashReady
+	mov	r0, r5
+	bl	NandcFlashCs
+	ldr	r1, [sp, #20]
+	mov	r0, r5
+	bl	FlashReadCmd
+	mov	r0, r5
+	bl	NandcWaitFlashReady
+	ldr	r3, [r4, #12]
+	movs	r1, #0
+	mov	r2, r8
+	mov	r0, r5
+	str	r3, [sp, #0]
+	ldr	r3, [r4, #8]
+	bl	NandcXferData
+	ldr	r3, [sp, #20]
+	ldr	r1, [sl, #0]
+	adds	r1, r1, r3
+	mov	fp, r0
+	mov	r0, r5
+	bl	FlashReadCmd
+	ldr	r3, [r4, #8]
+	cbz	r3, .L990
+	add	r3, r3, #2048
+.L990:
+	ldr	r2, [r4, #12]
+	cbz	r2, .L991
+	adds	r2, r2, #8
+.L991:
+	movs	r1, #0
+	str	r2, [sp, #0]
+	mov	r0, r5
+	mov	r2, r8
+	bl	NandcXferData
+	mov	r3, r0
+	mov	r0, r5
+	str	r3, [sp, #8]
+	bl	NandcFlashDeCs
+	ldr	r2, .L1000+12
+	ldr	r3, [sp, #8]
+	ldrb	r2, [r2, #0]	@ zero_extendqisi2
+	cmp	r3, fp
+	it	cc
+	movcc	r3, fp
+	add	r2, r2, r2, lsl #1
+	cmp	r3, r2, lsr #2
+	bls	.L992
+	cmp	r3, #-1
+	ite	eq
+	moveq	r3, #-1
+	movne	r3, #256
+.L992:
+	adds	r2, r3, #1
+	str	r3, [r4, #0]
+	beq	.L993
+	cmp	r3, #256
+	beq	.L993
+	movs	r3, #0
+	str	r3, [r4, #0]
+.L993:
+	ldr	r3, [r4, #12]
+	cbz	r3, .L994
+	ldr	r2, [r3, #8]
+	adds	r0, r2, #1
+	bne	.L994
+	ldr	r3, [r3, #0]
+	adds	r3, r3, #1
+	it	ne
+	strne	r2, [r4, #0]
+.L994:
+	ldr	r3, [r4, #0]
+	adds	r1, r3, #1
+	bne	.L989
+	ldr	r2, .L1000+12
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1000+16
+	ldrb	r2, [r2, #0]	@ zero_extendqisi2
+	bl	printf
+	ldr	r1, [r4, #8]
+	cbz	r1, .L995
+	ldr	r0, .L1000+20
+	movs	r2, #4
+	movs	r3, #8
+	bl	rknand_print_hex
+.L995:
+	ldr	r1, [r4, #12]
+	cbz	r1, .L989
+	movs	r2, #4
+	ldr	r0, .L1000+24
+	mov	r3, r2
+	bl	rknand_print_hex
+.L989:
+	adds	r6, r6, #1
+	adds	r4, r4, #36
+.L987:
+	cmp	r6, r7
+	bne	.L996
+	movs	r0, #0
+	add	sp, sp, #24
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L1001:
+	.align	2
+.L1000:
+	.word	.LANCHOR18
+	.word	.LANCHOR16
+	.word	.LANCHOR19
+	.word	.LANCHOR29
+	.word	.LC15
+	.word	.LC16
+	.word	.LC17
+	.word	.LANCHOR2
+	.size	FlashReadSlc2KPages, .-FlashReadSlc2KPages
+	.section	.text.FlashReadPages,"ax",%progbits
+	.align	1
+	.global	FlashReadPages
+	.thumb
+	.thumb_func
+	.type	FlashReadPages, %function
+FlashReadPages:
+	@ args = 0, pretend = 0, frame = 40
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1050
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	sub	sp, sp, #48
+	ldrb	r3, [r3, #9]	@ zero_extendqisi2
+	str	r0, [sp, #12]
+	str	r1, [sp, #32]
+	str	r3, [sp, #28]
+	ldr	r3, .L1050+4
+	str	r2, [sp, #20]
+	ldrb	r4, [r3, #0]	@ zero_extendqisi2
+	str	r4, [sp, #36]
+	ldr	r4, .L1050+8
+	ldrb	r4, [r4, #0]	@ zero_extendqisi2
+	cmp	r4, #0
+	beq	.L1036
+	bl	FlashReadSlc2KPages
+	b	.L1004
+.L1035:
+	movs	r3, #36
+	ldr	r4, [sp, #12]
+	add	r2, sp, #44
+	ldr	r1, [sp, #20]
+	mul	r3, r3, fp
+	adds	r7, r4, r3
+	ldr	r4, [sp, #32]
+	mov	r0, r7
+	str	r3, [sp, #16]
+	rsb	r3, fp, r4
+	ldr	r5, [r7, #4]
+	uxtb	r3, r3
+	str	r3, [sp, #0]
+	add	r3, sp, #40
+	bl	LogAddr2PhyAddr
+	ldr	r2, .L1050+12
+	ldr	r3, [sp, #40]
+	ldrb	r2, [r2, #0]	@ zero_extendqisi2
+	cmp	r3, r2
+	mov	r8, r0
+	bcc	.L1005
+	ldr	r1, [sp, #12]
+	mov	r3, #-1
+	ldr	r4, [sp, #16]
+	str	r3, [r1, r4]
+	b	.L1006
+.L1005:
+	ldr	r2, .L1050+16
+	ldrb	r4, [r2, r3]	@ zero_extendqisi2
+	ldr	r3, .L1050+20
+	mov	r0, r4
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cmp	r3, #0
+	it	eq
+	moveq	r8, #0
+	bl	NandcWaitFlashReady
+	ldr	r3, .L1050+24
+	ldr	r3, [r3, #0]
+	ldrb	r0, [r3, #19]	@ zero_extendqisi2
+	subs	r3, r0, #1
+	cmp	r3, #6
+	bhi	.L1008
+	ldr	r2, .L1050+28
+	cmp	r0, #7
+	add	r1, r2, r4
+	ldrb	r3, [r1, #12]	@ zero_extendqisi2
+	it	eq
+	ldrbeq	r3, [r1, #20]	@ zero_extendqisi2
+	ldr	r1, .L1050+32
+	ldrb	r1, [r1, r4]	@ zero_extendqisi2
+	cmp	r1, r3
+	beq	.L1008
+	ldrb	r1, [r2, #1]	@ zero_extendqisi2
+	mov	r0, r4
+	ldr	r2, .L1050+36
+	bl	HynixSetRRPara
+.L1008:
+	mov	r0, r4
+	and	r5, r5, #-2147483648
+	str	r5, [sp, #24]
+	bl	NandcFlashCs
+	ldr	r2, [sp, #20]
+	cmp	r2, #1
+	beq	.L1010
+	ldr	r5, [sp, #24]
+	cbz	r5, .L1011
+.L1010:
+	ldr	r3, .L1050+40
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L1011
+	mov	r0, r4
+	bl	flash_enter_slc_mode
+	b	.L1012
+.L1011:
+	mov	r0, r4
+	bl	flash_exit_slc_mode
+.L1012:
+	mov	r5, r7
+	movs	r6, #0
+	mov	r7, r8
+.L1049:
+	ldr	r1, [sp, #44]
+	adds	r2, r1, #1
+	bne	.L1014
+	cmp	r4, #255
+	beq	.L1038
+.L1014:
+	cbz	r7, .L1016
+	ldr	r3, .L1050+44
+	mov	r0, r4
+	ldr	r2, [r3, #0]
+	adds	r2, r1, r2
+	bl	FlashReadDpCmd
+	b	.L1017
+.L1016:
+	mov	r0, r4
+	bl	FlashReadCmd
+.L1017:
+	mov	r0, r4
+	bl	NandcWaitFlashReady
+	cbz	r7, .L1015
+	mov	r0, r4
+	ldr	r1, [sp, #44]
+	bl	FlashReadDpDataOutCmd
+	b	.L1015
+.L1038:
+	movs	r7, #0
+.L1015:
+	ldr	r3, [r5, #12]
+	movs	r1, #0
+	mov	r0, r4
+	ldr	r2, [sp, #28]
+	str	r3, [sp, #0]
+	ldr	r3, [r5, #8]
+	bl	NandcXferData
+	ldr	r1, .L1050+4
+	ldrb	r3, [r1, #0]	@ zero_extendqisi2
+	cbz	r3, .L1040
+	adds	r3, r0, #1
+	bne	.L1040
+	strb	r6, [r1, #0]
+	movs	r7, #0
+	b	.L1049
+.L1040:
+	mov	r8, r7
+	mov	r7, r5
+	mov	r6, r8
+	mov	r5, r0
+	cmp	r8, #0
+	beq	.L1019
+	ldr	r2, .L1050+44
+	mov	r0, r4
+	ldr	r3, [sp, #44]
+	ldr	r1, [r2, #0]
+	adds	r1, r1, r3
+	bl	FlashReadDpDataOutCmd
+	ldr	r1, [sp, #12]
+	movs	r2, #36
+	add	r3, fp, #1
+	mov	r0, r4
+	mla	r3, r2, r3, r1
+	movs	r1, #0
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #0]
+	ldr	r2, [sp, #28]
+	ldr	r3, [r3, #8]
+	bl	NandcXferData
+	mov	sl, r0
+	cmp	r0, #-1
+	ite	ne
+	movne	r6, r8
+	moveq	r6, #0
+.L1019:
+	mov	r0, r4
+	bl	NandcFlashDeCs
+	ldr	r3, [sp, #36]
+	ldr	r2, .L1050+4
+	adds	r0, r5, #1
+	strb	r3, [r2, #0]
+	bne	.L1023
+	ldr	r3, .L1050+48
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L1021
+	ldr	r3, .L1050+52
+	mov	r0, r4
+	ldr	r1, [sp, #44]
+	ldr	r3, [r3, #0]
+	ldr	r6, [r3, #304]
+	movs	r3, #1
+	str	r3, [sp, #0]
+	ldr	r2, [r7, #8]
+	ldr	r3, [r7, #12]
+	bl	FlashDdrTunningRead
+	adds	r1, r0, #1
+	mov	r5, r0
+	beq	.L1022
+	ldr	r3, .L1050+56
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cmp	r0, r3, lsr #1
+	bls	.L1043
+.L1022:
+	ubfx	r0, r6, #8, #8
+	bl	NandcSetDdrPara
+	adds	r2, r5, #1
+	bne	.L1043
+.L1021:
+	ldr	r3, .L1050+60
+	mov	r0, r4
+	ldr	r1, [sp, #44]
+	ldr	r2, [r7, #8]
+	ldr	r6, [r3, #0]
+	ldr	r3, [r7, #12]
+	cmp	r6, #0
+	beq	.L1024
+	blx	r6
+	adds	r3, r0, #1
+	mov	r5, r0
+	bne	.L1045
+	ldr	r3, .L1050+24
+	ldr	r3, [r3, #0]
+	ldrb	r3, [r3, #19]	@ zero_extendqisi2
+	subs	r3, r3, #1
+	cmp	r3, #6
+	bhi	.L1026
+	ldr	r2, .L1050+28
+	mov	r0, r4
+	movs	r3, #0
+	ldrb	r1, [r2, #1]	@ zero_extendqisi2
+	adds	r2, r2, #4
+	bl	HynixSetRRPara
+.L1026:
+	ldr	r1, [sp, #44]
+	mov	r0, r4
+	ldr	r2, [r7, #8]
+	ldr	r3, [r7, #12]
+	bl	FlashReadRawPage
+	ldr	r3, .L1050+56
+	ldr	r1, [r7, #4]
+	ldrb	r2, [r3, #0]	@ zero_extendqisi2
+	mov	r5, r0
+	ldr	r0, .L1050+64
+	mov	r3, r5
+	bl	printf
+	adds	r6, r5, #1
+	bne	.L1045
+	ldr	r3, .L1050+40
+	ldrb	r6, [r3, #0]	@ zero_extendqisi2
+	cmp	r6, #0
+	beq	.L1025
+	ldr	r1, [sp, #20]
+	mov	r0, r4
+	cmp	r1, #1
+	beq	.L1027
+	ldr	r2, [sp, #24]
+	cbz	r2, .L1028
+.L1027:
+	bl	flash_enter_slc_mode
+	b	.L1029
+.L1028:
+	bl	flash_exit_slc_mode
+.L1029:
+	ldr	r3, .L1050+60
+	mov	r0, r4
+	ldr	r1, [sp, #44]
+	ldr	r2, [r7, #8]
+	ldr	r5, [r3, #0]
+	ldr	r3, [r7, #12]
+	blx	r5
+	mov	r5, r0
+	b	.L1045
+.L1024:
+	bl	FlashReadRawPage
+	mov	r5, r0
+	b	.L1025
+.L1051:
+	.align	2
+.L1050:
+	.word	.LANCHOR18
+	.word	.LANCHOR4
+	.word	.LANCHOR0
+	.word	.LANCHOR16
+	.word	.LANCHOR19
+	.word	.LANCHOR189
+	.word	.LANCHOR23
+	.word	.LANCHOR31
+	.word	.LANCHOR32
+	.word	.LANCHOR31+4
+	.word	.LANCHOR7
+	.word	.LANCHOR2
+	.word	.LANCHOR35
+	.word	.LANCHOR30
+	.word	.LANCHOR29
+	.word	.LANCHOR51
+	.word	.LC18
+.L1043:
+	movs	r6, #0
+.L1023:
+	ldr	r3, .L1052
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r5, r3, lsr #2
+	bls	.L1025
+	ldr	r3, .L1052+4
+	ldr	r3, [r3, #0]
+	cmp	r3, #0
+	it	eq
+	moveq	r5, #256
+	b	.L1025
+.L1045:
+	movs	r6, #0
+.L1025:
+	ldr	r1, [sp, #12]
+	adds	r0, r5, #1
+	ldr	r3, [sp, #16]
+	str	r5, [r1, r3]
+	beq	.L1030
+	cmp	r5, #256
+	beq	.L1030
+	ldr	r2, [sp, #16]
+	movs	r3, #0
+	str	r3, [r1, r2]
+.L1030:
+	ldr	r1, [sp, #16]
+	ldr	r2, [sp, #12]
+	ldr	r3, [r2, r1]
+	adds	r1, r3, #1
+	bne	.L1031
+	ldr	r2, .L1052
+	ldr	r1, [r7, #4]
+	ldr	r0, .L1052+8
+	ldrb	r2, [r2, #0]	@ zero_extendqisi2
+	bl	printf
+	ldr	r1, [r7, #12]
+	cbz	r1, .L1031
+	movs	r2, #4
+	ldr	r0, .L1052+12
+	mov	r3, r2
+	bl	rknand_print_hex
+.L1031:
+	cbz	r6, .L1032
+	ldr	r3, .L1052
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	sl, r3, lsr #2
+	bls	.L1033
+	ldr	r3, .L1052+4
+	ldr	r3, [r3, #0]
+	cmp	r3, #0
+	it	eq
+	moveq	sl, #256
+.L1033:
+	ldr	r1, [sp, #12]
+	movs	r2, #36
+	add	r3, fp, #1
+	muls	r3, r2, r3
+	cmp	sl, #-1
+	str	sl, [r1, r3]
+	beq	.L1032
+	cmp	sl, #256
+	beq	.L1032
+	movs	r2, #0
+	str	r2, [r1, r3]
+.L1032:
+	ldr	r2, [sp, #20]
+	add	fp, fp, r6
+	cmp	r2, #1
+	beq	.L1034
+	ldr	r3, [sp, #24]
+	cbz	r3, .L1006
+.L1034:
+	ldr	r3, .L1052+16
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L1006
+	mov	r0, r4
+	bl	flash_exit_slc_mode
+.L1006:
+	add	fp, fp, #1
+	b	.L1003
+.L1036:
+	mov	sl, r4
+	mov	fp, r4
+.L1003:
+	ldr	r4, [sp, #32]
+	cmp	fp, r4
+	bcc	.L1035
+	movs	r0, #0
+.L1004:
+	add	sp, sp, #48
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L1053:
+	.align	2
+.L1052:
+	.word	.LANCHOR29
+	.word	.LANCHOR51
+	.word	.LC15
+	.word	.LC17
+	.word	.LANCHOR7
+	.size	FlashReadPages, .-FlashReadPages
+	.section	.text.FtlGcScanTempBlk,"ax",%progbits
+	.align	1
+	.global	FtlGcScanTempBlk
+	.thumb
+	.thumb_func
+	.type	FtlGcScanTempBlk, %function
+FtlGcScanTempBlk:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1078
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r5, r0
+	ldrh	r4, [r3, #0]
+	movw	r3, #65535
+	sub	sp, sp, #24
+	cmp	r4, r3
+	beq	.L1072
+	cbnz	r4, .L1055
+	b	.L1056
+.L1072:
+	movs	r4, #0
+.L1055:
+	ldr	r3, .L1078+4
+	ldrh	r3, [r3, #0]
+	cmp	r1, r3
+	bne	.L1057
+.L1056:
+	bl	FtlGcPageVarInit
+.L1057:
+	mov	sl, #-1
+	movw	r8, #65535
+.L1069:
+	ldrh	r3, [r5, #0]
+	movs	r2, #0
+	strb	r2, [r5, #8]
+	cmp	r3, r8
+	beq	.L1058
+.L1059:
+	mov	fp, sl
+.L1076:
+	ldr	r3, .L1078+8
+	ldr	r2, .L1078+12
+	ldr	r0, .L1078+16
+	ldr	lr, [r3, #0]
+	ldr	r3, .L1078+20
+	ldr	ip, [r2, #0]
+	mov	r2, r5
+	ldrh	sl, [r0, #0]
+	ldrh	r7, [r3, #0]
+	movs	r3, #0
+	mov	r6, r3
+	str	ip, [sp, #8]
+	str	r5, [sp, #4]
+	b	.L1060
+.L1062:
+	ldrh	r0, [r2, #16]
+	cmp	r0, r8
+	beq	.L1061
+	ldr	r5, [sp, #8]
+	mov	ip, #36
+	orr	r0, r4, r0, lsl #10
+	mla	r1, ip, r6, r5
+	str	r0, [r1, #4]
+	movs	r0, #0
+	str	r0, [r1, #8]
+	mul	r0, r7, r6
+	adds	r6, r6, #1
+	uxth	r6, r6
+	bic	r0, r0, #3
+	add	r0, lr, r0
+	str	r0, [r1, #12]
+.L1061:
+	adds	r3, r3, #1
+	adds	r2, r2, #2
+	uxth	r3, r3
+.L1060:
+	cmp	r3, sl
+	bne	.L1062
+	ldr	r2, .L1078+12
+	mov	r1, r6
+	movs	r7, #0
+	ldr	r5, [sp, #4]
+	mov	sl, r7
+	ldr	r0, [r2, #0]
+	movs	r2, #0
+	bl	FlashReadPages
+	b	.L1063
+.L1070:
+	ldr	r0, .L1078+12
+	ldr	r3, [r0, #0]
+	adds	r2, r3, r7
+	ldr	r1, [r2, #4]
+	str	r2, [sp, #20]
+	ubfx	r0, r1, #10, #16
+	str	r3, [sp, #16]
+	str	r1, [sp, #12]
+	bl	P2V_plane
+	ldr	r3, [sp, #16]
+	ldr	r1, [sp, #12]
+	ldr	r2, [sp, #20]
+	ldr	r3, [r3, r7]
+	cbnz	r3, .L1064
+	ldr	r3, [r2, #12]
+	adds	r7, r7, #36
+	ldrh	r2, [r3, #0]
+	cmp	r2, r8
+	bne	.L1065
+	ldr	r3, .L1078+24
+	movs	r1, #1
+	mov	r2, r0
+	mov	sl, fp
+	str	r1, [r3, #0]
+	b	.L1058
+.L1065:
+	add	sl, sl, #1
+	ldr	r0, [r3, #12]
+	ldr	r2, [r3, #8]
+	bl	FtlGcUpdatePage
+	uxth	sl, sl
+	b	.L1063
+.L1064:
+	ldr	r2, .L1078+28
+	mov	sl, fp
+	ldr	r2, [r2, #0]
+	cbnz	r2, .L1066
+	ldr	r2, .L1078+32
+	ldrb	r2, [r2, #0]	@ zero_extendqisi2
+	cbz	r2, .L1067
+.L1066:
+	ldr	r2, .L1078+36
+	ldrh	r0, [r5, #0]
+	ldr	r2, [r2, #0]
+	ldrh	r2, [r2, r0, lsl #1]
+	cmp	r2, #119
+	bls	.L1074
+.L1067:
+	cmp	r3, #-1
+	it	eq
+	moveq	sl, r1
+	b	.L1068
+.L1074:
+	mov	sl, r1
+.L1068:
+	ldr	r3, .L1078+40
+	movs	r4, #0
+	ldrh	r2, [r5, #0]
+	ldr	r3, [r3, #0]
+	strh	r4, [r3, r2, lsl #1]	@ movhi
+	ldrh	r0, [r5, #0]
+	bl	INSERT_FREE_LIST
+	strh	r8, [r5, #0]	@ movhi
+	bl	FtlGcPageVarInit
+	b	.L1069
+.L1063:
+	cmp	sl, r6
+	bne	.L1070
+	ldr	r3, .L1078+4
+	adds	r4, r4, #1
+	uxth	r4, r4
+	ldrh	r3, [r3, #0]
+	cmp	r3, r4
+	bhi	.L1076
+	mov	sl, fp
+	movs	r2, #0
+.L1058:
+	ldr	r3, .L1078
+	mov	r0, r5
+	movw	r1, #65535
+	strh	r4, [r5, #2]	@ movhi
+	strb	r2, [r5, #6]
+	strh	r1, [r3, #0]	@ movhi
+	mov	r1, r4
+	bl	ftl_sb_update_avl_pages
+	mov	r0, sl
+	add	sp, sp, #24
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L1079:
+	.align	2
+.L1078:
+	.word	.LANCHOR190
+	.word	.LANCHOR68
+	.word	.LANCHOR130
+	.word	.LANCHOR173
+	.word	.LANCHOR53
+	.word	.LANCHOR74
+	.word	.LANCHOR137
+	.word	.LANCHOR126
+	.word	.LANCHOR7
+	.word	.LANCHOR94
+	.word	.LANCHOR99
+	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
+	.section	.text.FtlScanSysBlk,"ax",%progbits
+	.align	1
+	.global	FtlScanSysBlk
+	.thumb
+	.thumb_func
+	.type	FtlScanSysBlk, %function
+FtlScanSysBlk:
+	@ args = 0, pretend = 0, frame = 40
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1141
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	movs	r4, #0
+	ldr	r5, .L1141+4
+	sub	sp, sp, #40
+	strh	r4, [r3, #0]	@ movhi
+	mov	r1, r4
+	ldr	r3, .L1141+8
+	ldr	r2, [r5, #0]
+	ldr	r7, .L1141+12
+	strh	r4, [r3, #0]	@ movhi
+	ldr	r3, .L1141+16
+	lsls	r2, r2, #2
+	ldr	r0, [r3, #0]
+	bl	memset
+	ldr	r2, [r5, #0]
+	ldr	r3, .L1141+20
+	mov	r1, r4
+	ldr	r5, .L1141+24
+	lsls	r2, r2, #1
+	ldr	r0, [r3, #0]
+	bl	memset
+	ldr	r3, .L1141+28
+	ldrh	r2, [r5, #0]
+	mov	r1, r4
+	ldr	r0, [r3, #0]
+	lsls	r2, r2, #2
+	bl	memset
+	ldr	r3, .L1141+32
+	ldrh	r2, [r5, #0]
+	mov	r1, r4
+	ldr	r0, [r3, #0]
+	lsls	r2, r2, #1
+	bl	memset
+	ldr	r0, .L1141+36
+	movs	r1, #255
+	movs	r2, #12
+	bl	memset
+	ldr	r3, .L1141+40
+	ldrh	r3, [r3, #0]
+	str	r3, [sp, #24]
+	b	.L1081
+.L1083:
+	ldrb	r0, [fp, r4]	@ zero_extendqisi2
+	ldr	r1, [sp, #24]
+	str	r3, [sp, #4]
+	bl	V2P_block
+	str	r0, [sp, #8]
+	bl	FtlBbmIsBadBlock
+	ldr	r2, [sp, #8]
+	ldr	r3, [sp, #4]
+	cbnz	r0, .L1082
+	ldr	r1, [r7, #0]
+	lsls	r2, r2, #10
+	ldr	r0, [r6, #0]
+	mla	r1, sl, r3, r1
+	str	r2, [r1, #4]
+	ldr	r2, [r8, #0]
+	str	r2, [r1, #8]
+	ldrh	r2, [r5, #0]
+	muls	r2, r3, r2
+	adds	r3, r3, #1
+	bic	r2, r2, #3
+	adds	r2, r0, r2
+	str	r2, [r1, #12]
+	uxth	r3, r3
+.L1082:
+	adds	r4, r4, #1
+	uxth	r4, r4
+	b	.L1118
+.L1130:
+	movs	r3, #0
+	ldr	fp, .L1141+76
+	ldr	r8, .L1141+80
+	mov	r4, r3
+	ldr	r6, .L1141+44
+	mov	sl, #36
+	ldr	r5, .L1141+48
+	str	r3, [sp, #20]
+.L1118:
+	ldr	r1, .L1141+52
+	ldrh	r2, [r1, #0]
+	cmp	r2, r4
+	bhi	.L1083
+	str	r3, [sp, #20]
+	cmp	r3, #0
+	beq	.L1084
+	ldr	r0, [r7, #0]
+	mov	r1, r3
+	movs	r2, #1
+	movs	r6, #0
+	bl	FlashReadPages
+	str	r6, [sp, #32]
+.L1117:
+	ldr	r3, [r7, #0]
+	adds	r2, r3, r6
+	ldr	r3, [r3, r6]
+	ldr	r5, [r2, #4]
+	adds	r3, r3, #1
+	ldr	r4, [r2, #12]
+	ubfx	r5, r5, #10, #16
+	bne	.L1085
+	mov	r8, #16
+.L1087:
+	ldr	r0, [r7, #0]
+	movs	r1, #1
+	mov	r2, r1
+	adds	r0, r0, r6
+	ldr	r3, [r0, #4]
+	adds	r3, r3, #1
+	str	r3, [r0, #4]
+	bl	FlashReadPages
+	ldrh	r3, [r4, #0]
+	movw	r2, #65535
+	cmp	r3, r2
+	bne	.L1086
+	ldr	r1, .L1141+12
+	mov	r2, #-1
+	ldr	r3, [r1, #0]
+	str	r2, [r3, r6]
+	b	.L1085
+.L1086:
+	ldr	r3, [r7, #0]
+	ldr	r3, [r3, r6]
+	adds	r3, r3, #1
+	bne	.L1085
+	add	r8, r8, #-1
+	uxth	r8, r8
+	cmp	r8, #0
+	bne	.L1087
+.L1085:
+	ldr	r3, [r7, #0]
+	ldr	r3, [r3, r6]
+	adds	r3, r3, #1
+	beq	.L1088
+	ldr	r2, .L1141+56
+	ldr	r3, [r4, #4]
+	ldr	r1, [r2, #0]
+	adds	r0, r1, #1
+	beq	.L1089
+	cmp	r1, r3
+	bhi	.L1090
+.L1089:
+	adds	r1, r3, #1
+	beq	.L1090
+	adds	r3, r3, #1
+	str	r3, [r2, #0]
+.L1090:
+	ldrh	r3, [r4, #0]
+	movw	r2, #61604
+	cmp	r3, r2
+	beq	.L1093
+	bhi	.L1096
+	movw	r2, #61574
+	cmp	r3, r2
+	bne	.L1091
+	b	.L1139
+.L1096:
+	movw	r2, #61634
+	cmp	r3, r2
+	beq	.L1094
+	movw	r2, #65535
+	cmp	r3, r2
+	bne	.L1091
+	b	.L1140
+.L1094:
+	ldr	r3, .L1141
+	ldr	r8, .L1141+4
+	ldrh	r2, [r3, #0]
+	ldr	r3, [r8, #0]
+	cmp	r2, r3
+	bls	.L1097
+	ldr	r1, .L1141+60
+	movw	r2, #1183
+	ldr	r0, .L1141+64
+	bl	printf
+	ldr	r0, .L1141+68
+	ldr	r1, .L1141+72
+	bl	printf
+.L1097:
+	ldr	r3, [r8, #0]
+	mov	ip, #0
+	ldr	r1, .L1141
+	uxth	r2, r3
+	str	r3, [sp, #12]
+	subs	r3, r2, #1
+	ldrh	r0, [r1, #0]
+	ldr	r1, .L1141+16
+	uxth	r3, r3
+	subs	r2, r2, r0
+	subs	r2, r2, #1
+	ldr	r1, [r1, #0]
+	sxth	fp, r3
+	sxth	r2, r2
+	str	r2, [sp, #36]
+	add	sl, r1, fp, lsl #2
+	str	sl, [sp, #16]
+	mov	sl, r5
+	b	.L1098
+.L1104:
+	rsb	r2, ip, fp
+	str	r2, [sp, #28]
+	ldr	r2, [sp, #16]
+	add	ip, ip, #1
+	ldr	r8, [r4, #4]
+	subs	r5, r2, #4
+	str	r5, [sp, #16]
+	ldr	r5, [r2, #0]
+	cmp	r8, r5
+	bls	.L1099
+	ldr	ip, [r1, #0]
+	mov	r5, sl
+	str	r2, [sp, #16]
+	cmp	ip, #0
+	bne	.L1100
+	ldr	r2, [sp, #12]
+	cmp	r0, r2
+	beq	.L1100
+	add	ip, r0, #1
+	ldr	r0, .L1141
+	strh	ip, [r0, #0]	@ movhi
+.L1100:
+	ldr	r0, .L1141+20
+	sxth	sl, r3
+	mov	fp, r3
+	str	sl, [sp, #12]
+	mov	r3, r1
+	ldr	ip, [r0, #0]
+	movs	r0, #0
+	mov	r8, ip
+	b	.L1101
+.L1102:
+	ldr	sl, [r1, #4]!
+	adds	r0, r0, #1
+	uxth	r0, r0
+	str	sl, [r3], #4
+	ldrh	sl, [ip, #2]!
+	strh	sl, [r8], #2	@ movhi
+.L1101:
+	ldr	r2, [sp, #12]
+	sxth	sl, r0
+	cmp	sl, r2
+	bne	.L1102
+	ldr	r1, [r4, #4]
+	mov	r3, fp
+	ldr	r2, [sp, #16]
+	ldr	sl, [sp, #28]
+	str	r1, [r2, #0]
+	ldr	r2, .L1141+20
+	ldr	r2, [r2, #0]
+	strh	r5, [r2, sl, lsl #1]	@ movhi
+	b	.L1103
+.L1099:
+	subs	r3, r3, #1
+	uxth	r3, r3
+.L1098:
+	ldr	r5, [sp, #36]
+	sxth	r2, r3
+	cmp	r2, r5
+	bgt	.L1104
+	mov	r5, sl
+.L1103:
+	sxth	r3, r3
+	cmp	r3, #0
+	blt	.L1091
+	ldr	r2, .L1141
+	ldr	r0, .L1141+4
+	ldrh	r1, [r2, #0]
+	ldr	r0, [r0, #0]
+	subs	r0, r0, r1
+	subs	r0, r0, #1
+	sxth	r0, r0
+	cmp	r3, r0
+	bgt	.L1091
+	adds	r1, r1, #1
+	strh	r1, [r2, #0]	@ movhi
+	ldr	r2, .L1141+16
+	ldr	r1, [r4, #4]
+	ldr	r2, [r2, #0]
+	str	r1, [r2, r3, lsl #2]
+	ldr	r2, .L1141+20
+	b	.L1137
+.L1142:
+	.align	2
+.L1141:
+	.word	.LANCHOR121
+	.word	.LANCHOR80
+	.word	.LANCHOR85
+	.word	.LANCHOR173
+	.word	.LANCHOR123
+	.word	.LANCHOR122
+	.word	.LANCHOR77
+	.word	.LANCHOR185
+	.word	.LANCHOR86
+	.word	.LANCHOR191
+	.word	.LANCHOR55
+	.word	.LANCHOR130
+	.word	.LANCHOR74
+	.word	.LANCHOR53
+	.word	.LANCHOR153
+	.word	.LANCHOR192
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR62
+	.word	.LANCHOR129
+.L1139:
+	ldr	r3, .L1143
+	ldr	r8, .L1143+28
+	ldrh	r2, [r3, #0]
+	ldrh	r3, [r8, #0]
+	cmp	r2, r3
+	bls	.L1105
+	ldr	r1, .L1143+4
+	movw	r2, #1230
+	ldr	r0, .L1143+8
+	bl	printf
+	ldr	r0, .L1143+12
+	ldr	r1, .L1143+16
+	bl	printf
+.L1105:
+	ldr	r1, .L1143
+	mov	ip, #0
+	ldrh	r8, [r8, #0]
+	ldrh	r0, [r1, #0]
+	add	r2, r8, #-1
+	str	r8, [sp, #16]
+	uxth	r3, r2
+	subs	r2, r2, r0
+	str	r2, [sp, #36]
+	ldr	r2, .L1143+20
+	sxth	fp, r3
+	ldr	r1, [r2, #0]
+	add	sl, r1, fp, lsl #2
+	str	sl, [sp, #28]
+	mov	sl, r5
+	b	.L1106
+.L1112:
+	ldr	r2, [sp, #28]
+	add	ip, ip, #1
+	ldr	r8, [r4, #4]
+	subs	r5, r2, #4
+	str	r5, [sp, #28]
+	ldr	r5, [r2, #0]
+	cmp	r8, r5
+	bls	.L1107
+	ldr	ip, [r1, #0]
+	mov	r5, sl
+	cmp	ip, #0
+	bne	.L1108
+	ldr	sl, [sp, #16]
+	cmp	r0, sl
+	beq	.L1108
+	add	ip, r0, #1
+	ldr	r0, .L1143
+	strh	ip, [r0, #0]	@ movhi
+.L1108:
+	ldr	r0, .L1143+24
+	sxth	sl, r3
+	mov	fp, r3
+	str	sl, [sp, #16]
+	str	r2, [sp, #28]
+	mov	r3, r1
+	ldr	ip, [r0, #0]
+	movs	r0, #0
+	mov	r8, ip
+	b	.L1109
+.L1110:
+	ldr	sl, [r1, #4]!
+	adds	r0, r0, #1
+	uxth	r0, r0
+	str	sl, [r3], #4
+	ldrh	sl, [r8, #2]!
+	strh	sl, [ip], #2	@ movhi
+.L1109:
+	ldr	r2, [sp, #16]
+	sxth	sl, r0
+	cmp	sl, r2
+	bne	.L1110
+	ldr	r2, [sp, #28]
+	mov	r3, fp
+	ldr	r1, [r4, #4]
+	ldr	sl, [sp, #12]
+	str	r1, [r2, #0]
+	ldr	r2, .L1143+24
+	ldr	r2, [r2, #0]
+	strh	r5, [r2, sl, lsl #1]	@ movhi
+	b	.L1111
+.L1107:
+	subs	r3, r3, #1
+	uxth	r3, r3
+.L1106:
+	ldr	r5, [sp, #36]
+	rsb	r2, ip, fp
+	str	r2, [sp, #12]
+	cmp	r2, r5
+	bgt	.L1112
+	mov	r5, sl
+.L1111:
+	sxth	r3, r3
+	cmp	r3, #0
+	blt	.L1091
+	ldr	r0, .L1143+28
+	ldr	r2, .L1143
+	ldrh	r0, [r0, #0]
+	ldrh	r1, [r2, #0]
+	subs	r0, r0, #1
+	subs	r0, r0, r1
+	sxth	r0, r0
+	cmp	r3, r0
+	bgt	.L1091
+	adds	r1, r1, #1
+	strh	r1, [r2, #0]	@ movhi
+	ldr	r2, .L1143+20
+	ldr	r1, [r4, #4]
+	ldr	r2, [r2, #0]
+	str	r1, [r2, r3, lsl #2]
+	ldr	r2, .L1143+24
+.L1137:
+	ldr	r2, [r2, #0]
+	strh	r5, [r2, r3, lsl #1]	@ movhi
+	b	.L1091
+.L1093:
+	ldr	r8, .L1143+32
+	movw	sl, #65535
+	ldrh	r3, [r8, #0]
+	cmp	r3, sl
+	bne	.L1113
+	ldr	r3, [r4, #4]
+	strh	r5, [r8, #0]	@ movhi
+	str	r3, [r8, #8]
+	b	.L1091
+.L1113:
+	ldrh	r0, [r8, #4]
+	movw	ip, #65535
+	cmp	r0, ip
+	beq	.L1114
+	movs	r1, #1
+	bl	FtlFreeSysBlkQueueIn
+.L1114:
+	ldr	r2, [r4, #4]
+	ldr	r1, [r8, #8]
+	ldr	r3, .L1143+32
+	cmp	r1, r2
+	bcs	.L1115
+	ldrh	r1, [r3, #0]
+	str	r2, [r3, #8]
+	strh	r5, [r3, #0]	@ movhi
+	strh	r1, [r3, #4]	@ movhi
+	b	.L1091
+.L1115:
+	strh	r5, [r3, #4]	@ movhi
+	b	.L1091
+.L1140:
+	mov	r0, r5
+	b	.L1138
+.L1088:
+	ldr	r1, .L1143+36
+	mov	r0, r5
+	ldrb	r3, [r1, #0]	@ zero_extendqisi2
+	cbz	r3, .L1116
+.L1138:
+	movs	r1, #0
+	b	.L1136
+.L1116:
+	movs	r1, #1
+.L1136:
+	bl	FtlFreeSysBlkQueueIn
+.L1091:
+	ldr	r5, [sp, #32]
+	adds	r6, r6, #36
+	adds	r3, r5, #1
+	ldr	r5, [sp, #20]
+	uxth	r3, r3
+	str	r3, [sp, #32]
+	cmp	r3, r5
+	bne	.L1117
+.L1084:
+	ldr	sl, [sp, #24]
+	add	r3, sl, #1
+	uxth	r3, r3
+	str	r3, [sp, #24]
+.L1081:
+	ldr	r3, .L1143+40
+	ldr	ip, [sp, #24]
+	ldrh	r3, [r3, #0]
+	cmp	r3, ip
+	bhi	.L1130
+	ldr	r3, .L1143+44
+	ldr	r1, [r3, #0]
+	ldrh	r3, [r1, #0]
+	cbnz	r3, .L1119
+	ldr	r2, .L1143+48
+	ldrh	r2, [r2, #0]
+	cbz	r2, .L1119
+	ldr	r2, .L1143+52
+	ldr	r4, [r2, #0]
+	mov	r2, r1
+	b	.L1120
+.L1123:
+	ldrh	r5, [r2], #2
+	adds	r3, r3, #1
+	cbz	r5, .L1120
+	ldr	r3, .L1143+56
+	sxth	r0, r0
+	ldr	ip, .L1143+52
+	mov	sl, r1
+	add	r6, r1, r0, lsl #1
+	ldr	r5, [r3, #0]
+	movs	r3, #0
+	mov	r2, r3
+	mov	r4, r3
+	add	r7, r5, r0, lsl #2
+	mov	fp, r3
+	b	.L1121
+.L1122:
+	ldrh	r1, [r6, r2]
+	strh	r1, [sl, r2]	@ movhi
+	ldr	r1, [r7, r3]
+	str	r1, [r5, r3]
+	adds	r3, r3, #4
+	strh	fp, [r6, r2]	@ movhi
+	adds	r2, r2, #2
+.L1121:
+	ldr	r1, [ip, #0]
+	add	r8, r4, r0
+	adds	r4, r4, #1
+	cmp	r8, r1
+	bcc	.L1122
+	b	.L1119
+.L1120:
+	cmp	r3, r4
+	uxth	r0, r3
+	bne	.L1123
+.L1119:
+	ldr	r3, .L1143+24
+	ldr	r0, [r3, #0]
+	ldrh	r3, [r0, #0]
+	cmp	r3, #0
+	bne	.L1124
+	ldr	r2, .L1143
+	ldrh	r2, [r2, #0]
+	cmp	r2, #0
+	beq	.L1124
+	ldr	r2, .L1143+28
+	ldrh	r4, [r2, #0]
+	mov	r2, r0
+	b	.L1125
+.L1128:
+	ldrh	r5, [r2], #2
+	adds	r3, r3, #1
+	cmp	r5, #0
+	beq	.L1125
+	ldr	r3, .L1143+20
+	sxth	r1, r1
+	subs	r6, r1, r6
+	add	r7, r0, r1, lsl #1
+	ldr	r5, [r3, #0]
+	movs	r3, #0
+	mov	r2, r3
+	mov	r4, r3
+	add	r0, r0, r6, lsl #1
+	add	ip, r5, r1, lsl #2
+	b	.L1126
+.L1127:
+	ldrh	r8, [r7, r2]
+	ldr	sl, [ip, r3]
+	strh	r8, [r0, r2]	@ movhi
+	add	r8, r5, r6, lsl #2
+	str	sl, [r8, r3]
+	mov	r8, #0
+	adds	r3, r3, #4
+	strh	r8, [r7, r2]	@ movhi
+	adds	r2, r2, #2
+.L1126:
+	ldr	r8, .L1143+28
+	add	sl, r4, r1
+	adds	r4, r4, #1
+	ldrh	r8, [r8, #0]
+	cmp	sl, r8
+	blt	.L1127
+	b	.L1124
+.L1144:
+	.align	2
+.L1143:
+	.word	.LANCHOR85
+	.word	.LANCHOR192
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR185
+	.word	.LANCHOR86
+	.word	.LANCHOR77
+	.word	.LANCHOR191
+	.word	.LANCHOR7
+	.word	.LANCHOR56
+	.word	.LANCHOR122
+	.word	.LANCHOR121
+	.word	.LANCHOR80
+	.word	.LANCHOR123
+.L1125:
+	cmp	r3, r4
+	uxth	r1, r3
+	mov	r6, r3
+	blt	.L1128
+.L1124:
+	ldr	r3, .L1145
+	ldrh	r2, [r3, #0]
+	ldr	r3, .L1145+4
+	ldr	r3, [r3, #0]
+	cmp	r2, r3
+	bls	.L1129
+	ldr	r1, .L1145+8
+	movw	r2, #1364
+	ldr	r0, .L1145+12
+	bl	printf
+	ldr	r0, .L1145+16
+	ldr	r1, .L1145+20
+	bl	printf
+.L1129:
+	movs	r0, #0
+	add	sp, sp, #40
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L1146:
+	.align	2
+.L1145:
+	.word	.LANCHOR121
+	.word	.LANCHOR80
+	.word	.LANCHOR192
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.size	FtlScanSysBlk, .-FtlScanSysBlk
+	.section	.text.FtlVendorPartRead,"ax",%progbits
+	.align	1
+	.global	FtlVendorPartRead
+	.thumb
+	.thumb_func
+	.type	FtlVendorPartRead, %function
+FtlVendorPartRead:
+	@ args = 0, pretend = 0, frame = 48
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1157
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r8, r2
+	ldrh	sl, [r3, #0]
+	adds	r2, r1, r0
+	ldr	r3, .L1157+4
+	sub	sp, sp, #48
+	mov	r6, r0
+	mov	r5, r1
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	bhi	.L1155
+	lsr	sl, r0, sl
+	movs	r7, #0
+	lsl	sl, sl, #2
+	b	.L1149
+.L1154:
+	ldr	r1, .L1157+8
+	mov	r0, r6
+	ldr	r2, .L1157+12
+	ldr	r3, [r1, #0]
+	ldrh	r4, [r2, #0]
+	mov	r1, r4
+	ldr	fp, [r3, sl]
+	bl	__aeabi_uidivmod
+	uxth	r3, r1
+	subs	r4, r4, r3
+	uxth	r4, r4
+	cmp	r4, r5
+	it	hi
+	uxthhi	r4, r5
+	cmp	fp, #0
+	beq	.L1151
+	ldr	r1, .L1157+16
+	add	r0, sp, #12
+	str	fp, [sp, #16]
+	ldr	r2, [r1, #0]
+	movs	r1, #1
+	str	r3, [sp, #4]
+	str	r2, [sp, #20]
+	movs	r2, #0
+	str	r2, [sp, #24]
+	mov	r2, r1
+	bl	FlashReadPages
+	ldr	r2, [sp, #12]
+	ldr	r3, [sp, #4]
+	mov	r0, r8
+	cmp	r2, #-1
+	it	eq
+	moveq	r7, #-1
+	ldr	r2, .L1157+16
+	ldr	r1, [r2, #0]
+	lsls	r2, r4, #9
+	add	r1, r1, r3, lsl #9
+	bl	memcpy
+	b	.L1153
+.L1151:
+	mov	r0, r8
+	mov	r1, fp
+	lsls	r2, r4, #9
+	bl	memset
+.L1153:
+	subs	r5, r5, r4
+	adds	r6, r6, r4
+	add	r8, r8, r4, lsl #9
+	add	sl, sl, #4
+.L1149:
+	cmp	r5, #0
+	bne	.L1154
+	b	.L1148
+.L1155:
+	mov	r7, #-1
+.L1148:
+	mov	r0, r7
+	add	sp, sp, #48
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L1158:
+	.align	2
+.L1157:
+	.word	.LANCHOR72
+	.word	.LANCHOR65
+	.word	.LANCHOR186
+	.word	.LANCHOR71
+	.word	.LANCHOR177
+	.size	FtlVendorPartRead, .-FtlVendorPartRead
+	.section	.text.Ftl_load_ext_data,"ax",%progbits
+	.align	1
+	.global	Ftl_load_ext_data
+	.thumb
+	.thumb_func
+	.type	Ftl_load_ext_data, %function
+Ftl_load_ext_data:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	movs	r0, #0
+	ldr	r4, .L1163
+	movs	r1, #1
+	ldr	r5, .L1163+4
+	mov	r2, r4
+	bl	FtlVendorPartRead
+	ldr	r3, [r4, #0]
+	cmp	r3, r5
+	beq	.L1160
+	mov	r0, r4
+	movs	r1, #0
+	mov	r2, #512
+	bl	memset
+	str	r5, [r4, #0]
+.L1160:
+	ldr	r2, [r4, #0]
+	ldr	r3, .L1163
+	cmp	r2, r5
+	bne	.L1161
+	ldr	r1, [r3, #88]
+	ldr	r2, .L1163+8
+	str	r1, [r2, #0]
+	ldr	r1, [r3, #92]
+	ldr	r2, .L1163+12
+	str	r1, [r2, #0]
+	ldr	r1, [r3, #8]
+	ldr	r2, .L1163+16
+	str	r1, [r2, #0]
+	ldr	r1, [r3, #12]
+	ldr	r2, .L1163+20
+	str	r1, [r2, #0]
+	ldr	r1, [r3, #16]
+	ldr	r2, .L1163+24
+	str	r1, [r2, #0]
+	ldr	r1, [r3, #20]
+	ldr	r2, .L1163+28
+	str	r1, [r2, #0]
+	ldr	r1, [r3, #28]
+	ldr	r2, .L1163+32
+	str	r1, [r2, #0]
+	ldr	r1, [r3, #32]
+	ldr	r2, .L1163+36
+	str	r1, [r2, #0]
+	ldr	r1, [r3, #36]
+	ldr	r2, .L1163+40
+	str	r1, [r2, #0]
+	ldr	r1, [r3, #40]
+	ldr	r2, .L1163+44
+	str	r1, [r2, #0]
+	ldr	r1, [r3, #44]
+	ldr	r2, .L1163+48
+	str	r1, [r2, #0]
+	ldr	r1, [r3, #48]
+	ldr	r2, .L1163+52
+	str	r1, [r2, #0]
+	ldr	r2, [r3, #60]
+	ldr	r3, .L1163+56
+	str	r2, [r3, #0]
+.L1161:
+	ldr	r3, .L1163+60
+	movs	r2, #0
+	str	r2, [r3, #0]
+	ldr	r3, .L1163
+	ldr	r2, [r3, #68]
+	ldr	r3, .L1163+64
+	cmp	r2, r3
+	bne	.L1162
+	ldr	r3, .L1163+68
+	movs	r2, #1
+	ldr	r0, .L1163+72
+	ldr	r1, .L1163+76
+	str	r2, [r3, #0]
+	bl	printf
+.L1162:
+	ldr	r3, .L1163+80
+	ldrh	r2, [r3, #0]
+	ldr	r3, .L1163+84
+	ldr	r0, [r3, #0]
+	ldr	r3, .L1163+32
+	ldr	r3, [r3, #0]
+	mla	r0, r0, r2, r3
+	ldr	r3, .L1163+88
+	ldrh	r1, [r3, #0]
+	bl	__aeabi_uidiv
+	ldr	r3, .L1163+92
+	str	r0, [r3, #0]
+	pop	{r3, r4, r5, pc}
+.L1164:
+	.align	2
+.L1163:
+	.word	.LANCHOR141
+	.word	1179929683
+	.word	.LANCHOR193
+	.word	.LANCHOR194
+	.word	.LANCHOR155
+	.word	.LANCHOR156
+	.word	.LANCHOR160
+	.word	.LANCHOR159
+	.word	.LANCHOR162
+	.word	.LANCHOR95
+	.word	.LANCHOR157
+	.word	.LANCHOR158
+	.word	.LANCHOR163
+	.word	.LANCHOR164
+	.word	.LANCHOR152
+	.word	.LANCHOR151
+	.word	305432421
+	.word	.LANCHOR126
+	.word	.LC10
+	.word	.LC19
+	.word	.LANCHOR63
+	.word	.LANCHOR161
+	.word	.LANCHOR55
+	.word	.LANCHOR195
+	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
+	.section	.text.FtlLoadEctTbl,"ax",%progbits
+	.align	1
+	.global	FtlLoadEctTbl
+	.thumb
+	.thumb_func
+	.type	FtlLoadEctTbl, %function
+FtlLoadEctTbl:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	movs	r0, #64
+	ldr	r4, .L1167
+	ldr	r5, .L1167+4
+	ldr	r2, [r4, #0]
+	ldrh	r1, [r5, #0]
+	bl	FtlVendorPartRead
+	ldr	r3, [r4, #0]
+	ldr	r2, [r3, #0]
+	ldr	r3, .L1167+8
+	cmp	r2, r3
+	beq	.L1166
+	ldr	r1, .L1167+12
+	ldr	r0, .L1167+16
+	bl	printf
+	ldrh	r2, [r5, #0]
+	ldr	r0, [r4, #0]
+	movs	r1, #0
+	lsls	r2, r2, #9
+	bl	memset
+.L1166:
+	movs	r0, #0
+	pop	{r3, r4, r5, pc}
+.L1168:
+	.align	2
+.L1167:
+	.word	.LANCHOR183
+	.word	.LANCHOR182
+	.word	1112818501
+	.word	.LC20
+	.word	.LC10
+	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
+	.section	.text.load_l2p_region,"ax",%progbits
+	.align	1
+	.global	load_l2p_region
+	.thumb
+	.thumb_func
+	.type	load_l2p_region, %function
+load_l2p_region:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1174
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r4, r0
+	ldrh	r3, [r3, #0]
+	mov	r8, r1
+	cmp	r3, r0
+	bcs	.L1170
+	ldr	r1, .L1174+4
+	movw	r2, #467
+	ldr	r0, .L1174+8
+	bl	printf
+	ldr	r0, .L1174+12
+	ldr	r1, .L1174+16
+	bl	printf
+.L1170:
+	ldr	r3, .L1174+20
+	ldr	r7, .L1174+24
+	ldr	r3, [r3, #0]
+	ldr	r6, [r3, r4, lsl #2]
+	movs	r3, #12
+	cbnz	r6, .L1171
+	mul	r5, r3, r8
+	ldr	r3, [r7, #0]
+	movs	r1, #255
+	adds	r3, r3, r5
+	ldr	r0, [r3, #8]
+	ldr	r3, .L1174+28
+	ldrh	r2, [r3, #0]
+	bl	memset
+	ldr	r3, [r7, #0]
+	adds	r2, r3, r5
+	strh	r4, [r3, r5]	@ movhi
+	str	r6, [r2, #4]
+	b	.L1172
+.L1171:
+	ldr	r5, .L1174+32
+	movs	r1, #1
+	mov	r2, r1
+	mov	r0, r5
+	str	r6, [r5, #4]
+	mul	r6, r3, r8
+	ldr	r3, [r7, #0]
+	adds	r3, r3, r6
+	ldr	r3, [r3, #8]
+	str	r3, [r5, #8]
+	ldr	r3, .L1174+36
+	ldr	r3, [r3, #0]
+	str	r3, [r5, #12]
+	bl	FlashReadPages
+	ldr	r3, [r5, #12]
+	ldrh	r3, [r3, #8]
+	cmp	r3, r4
+	beq	.L1173
+	ldr	r1, .L1174+4
+	mov	r2, #488
+	ldr	r0, .L1174+8
+	bl	printf
+	ldr	r0, .L1174+12
+	ldr	r1, .L1174+16
+	bl	printf
+.L1173:
+	ldr	r3, .L1174+24
+	movs	r1, #0
+	ldr	r3, [r3, #0]
+	adds	r2, r3, r6
+	strh	r4, [r3, r6]	@ movhi
+	str	r1, [r2, #4]
+.L1172:
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1175:
+	.align	2
+.L1174:
+	.word	.LANCHOR82
+	.word	.LANCHOR196
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR124
+	.word	.LANCHOR112
+	.word	.LANCHOR73
+	.word	.LANCHOR197
+	.word	.LANCHOR180
+	.size	load_l2p_region, .-load_l2p_region
+	.section	.text.FtlGetLastWrittenPage,"ax",%progbits
+	.align	1
+	.global	FtlGetLastWrittenPage
+	.thumb
+	.thumb_func
+	.type	FtlGetLastWrittenPage, %function
+FtlGetLastWrittenPage:
+	@ args = 0, pretend = 0, frame = 104
+	@ frame_needed = 0, uses_anonymous_args = 0
+	cmp	r1, #1
+	push	{r4, r5, r6, r7, r8, sl, lr}
+	sub	sp, sp, #108
+	it	eq
+	ldreq	r3, .L1187
+	mov	r5, r1
+	it	ne
+	ldrne	r3, .L1187+4
+	add	sl, sp, #68
+	lsl	r8, r0, #10
+	movs	r1, #1
+	mov	r0, sl
+	mov	r2, r5
+	ldrh	r4, [r3, #0]
+	add	r3, sp, #4
+	str	r3, [sp, #80]
+	movs	r7, #0
+	subs	r4, r4, #1
+	str	r7, [sp, #76]
+	uxth	r4, r4
+	sxth	r3, r4
+	orr	r3, r3, r8
+	str	r3, [sp, #72]
+	bl	FlashReadPages
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #1
+	bne	.L1180
+	b	.L1185
+.L1183:
+	adds	r6, r6, r3
+	movs	r1, #1
+	mov	r0, sl
+	mov	r2, r5
+	add	r6, r6, r6, lsr #31
+	ubfx	r6, r6, #1, #16
+	sxth	r3, r6
+	orr	r3, r3, r8
+	str	r3, [sp, #72]
+	bl	FlashReadPages
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #1
+	bne	.L1181
+	ldr	r3, [sp, #8]
+	adds	r3, r3, #1
+	bne	.L1181
+	ldr	r3, [sp, #68]
+	adds	r3, r3, #1
+	beq	.L1181
+	subs	r4, r6, #1
+	uxth	r4, r4
+	b	.L1185
+.L1181:
+	adds	r6, r6, #1
+	uxth	r7, r6
+.L1185:
+	sxth	r6, r7
+	sxth	r3, r4
+	cmp	r6, r3
+	ble	.L1183
+.L1180:
+	sxth	r0, r4
+	add	sp, sp, #108
+	pop	{r4, r5, r6, r7, r8, sl, pc}
+.L1188:
+	.align	2
+.L1187:
+	.word	.LANCHOR69
+	.word	.LANCHOR68
+	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
+	.section	.text.FtlLoadSysInfo,"ax",%progbits
+	.align	1
+	.global	FtlLoadSysInfo
+	.thumb
+	.thumb_func
+	.type	FtlLoadSysInfo, %function
+FtlLoadSysInfo:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	movs	r4, #0
+	ldr	r6, .L1209
+	mov	r1, r4
+	ldr	r5, .L1209+4
+	ldr	r8, .L1209+48
+	ldr	r3, [r6, #0]
+	str	r4, [r5, #8]
+	str	r3, [r5, #12]
+	ldr	r3, .L1209+8
+	ldrh	r2, [r3, #0]
+	ldr	r3, .L1209+12
+	lsls	r2, r2, #1
+	ldr	r0, [r3, #0]
+	bl	memset
+	ldrh	r0, [r8, #0]
+	movw	r3, #65535
+	cmp	r0, r3
+	beq	.L1205
+	movs	r1, #1
+	mov	fp, r8
+	bl	FtlGetLastWrittenPage
+	uxth	sl, r0
+	mov	r7, r0
+	add	r3, sl, #1
+	strh	r3, [r8, #2]	@ movhi
+	ldr	r8, .L1209+148
+	ldr	r3, .L1209+16
+	b	.L1191
+.L1194:
+	ldrh	r1, [fp, #0]
+	sxth	r2, sl
+	subs	r2, r2, r4
+	ldr	r0, .L1209+4
+	orr	r2, r2, r1, lsl #10
+	str	r2, [r5, #4]
+	ldr	r2, [r8, #0]
+	movs	r1, #1
+	str	r2, [r5, #8]
+	mov	r2, r1
+	str	r3, [sp, #4]
+	bl	FlashReadPages
+	ldr	r2, [r5, #0]
+	ldr	r3, [sp, #4]
+	adds	r2, r2, #1
+	beq	.L1192
+	ldr	r2, [r8, #0]
+	ldr	r2, [r2, #0]
+	cmp	r2, r3
+	bne	.L1192
+	ldr	r2, [r6, #0]
+	ldrh	r1, [r2, #0]
+	movw	r2, #61604
+	cmp	r1, r2
+	beq	.L1193
+.L1192:
+	adds	r4, r4, #1
+.L1191:
+	subs	r2, r7, r4
+	lsls	r2, r2, #16
+	bpl	.L1194
+	b	.L1208
+.L1193:
+	ldr	r3, .L1209+8
+	ldrh	r2, [r3, #0]
+	ldr	r3, .L1209+20
+	adds	r2, r2, #24
+	ldrh	r3, [r3, #0]
+	cmp	r3, r2, lsl #1
+	bcs	.L1196
+	ldr	r1, .L1209+24
+	movw	r2, #1426
+	ldr	r0, .L1209+28
+	bl	printf
+	ldr	r0, .L1209+32
+	ldr	r1, .L1209+36
+	bl	printf
+.L1196:
+	ldr	r5, .L1209+4
+	movs	r2, #48
+	ldr	r4, .L1209+40
+	ldr	r6, .L1209+8
+	ldr	r1, [r5, #8]
+	mov	r0, r4
+	bl	memcpy
+	ldr	r3, .L1209+12
+	ldrh	r2, [r6, #0]
+	ldr	r1, [r5, #8]
+	ldr	r0, [r3, #0]
+	adds	r1, r1, #48
+	lsls	r2, r2, #1
+	bl	memcpy
+	ldrh	r2, [r6, #0]
+	ldr	r0, .L1209+44
+	add	r1, r2, #24
+	ldr	r3, [r5, #8]
+	lsrs	r2, r2, #3
+	lsrs	r1, r1, #1
+	adds	r2, r2, #4
+	ldr	r0, [r0, #0]
+	add	r1, r3, r1, lsl #2
+	bl	memcpy
+	ldr	r2, [r4, #0]
+	ldr	r3, .L1209+16
+	cmp	r2, r3
+	bne	.L1205
+	ldr	r3, .L1209+48
+	ldrh	r5, [r4, #8]
+	ldrb	r2, [r4, #10]	@ zero_extendqisi2
+	strh	r5, [r3, #6]	@ movhi
+	ldr	r3, .L1209+52
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	bne	.L1205
+	ldr	r3, .L1209+56
+	ldr	r2, .L1209+60
+	str	r5, [r3, #0]
+	ldr	r3, .L1209+64
+	ldrh	r3, [r3, #0]
+	muls	r3, r5, r3
+	str	r3, [r2, #0]
+	ldr	r2, .L1209+68
+	ldrh	r2, [r2, #0]
+	muls	r3, r2, r3
+	ldr	r2, .L1209+72
+	str	r3, [r2, #0]
+	ldr	r3, .L1209+76
+	ldr	r4, [r3, #0]
+	ldr	r3, .L1209+80
+	ldrh	r0, [r3, #6]
+	ldr	r3, .L1209+84
+	subs	r0, r4, r0
+	subs	r0, r0, r5
+	ldrh	r1, [r3, #0]
+	bl	__aeabi_uidiv
+	ldr	r3, .L1209+88
+	cmp	r5, r4
+	strh	r0, [r3, #0]	@ movhi
+	bls	.L1197
+	ldr	r1, .L1209+24
+	mov	r2, #1448
+	ldr	r0, .L1209+28
+	bl	printf
+	ldr	r0, .L1209+32
+	ldr	r1, .L1209+36
+	bl	printf
+.L1197:
+	ldr	r3, .L1209+40
+	ldr	r2, .L1209+92
+	ldrh	r1, [r3, #16]
+	ldrh	r0, [r3, #14]
+	ldrh	r5, [r3, #18]
+	lsrs	r4, r1, #6
+	and	r1, r1, #63
+	strb	r1, [r2, #6]
+	ldrb	r1, [r3, #11]	@ zero_extendqisi2
+	strh	r4, [r2, #2]	@ movhi
+	movw	r4, #65535
+	strh	r0, [r2, #0]	@ movhi
+	strb	r1, [r2, #8]
+	movs	r2, #0
+	ldr	r1, .L1209+96
+	strh	r2, [r1, #2]	@ movhi
+	strh	r4, [r1, #0]	@ movhi
+	strb	r2, [r1, #6]
+	strb	r2, [r1, #8]
+	ldr	r1, .L1209+100
+	strh	r5, [r1, #0]	@ movhi
+	ldrh	r5, [r3, #20]
+	lsrs	r6, r5, #6
+	and	r5, r5, #63
+	strb	r5, [r1, #6]
+	ldrb	r5, [r3, #12]	@ zero_extendqisi2
+	strh	r6, [r1, #2]	@ movhi
+	strb	r5, [r1, #8]
+	ldr	r1, .L1209+104
+	ldrh	r5, [r3, #22]
+	strh	r5, [r1, #0]	@ movhi
+	ldrh	r5, [r3, #24]
+	lsrs	r6, r5, #6
+	and	r5, r5, #63
+	strb	r5, [r1, #6]
+	ldrb	r5, [r3, #13]	@ zero_extendqisi2
+	strh	r6, [r1, #2]	@ movhi
+	strb	r5, [r1, #8]
+	ldr	r1, .L1209+108
+	ldr	r5, [r3, #32]
+	str	r2, [r1, #0]
+	ldr	r1, .L1209+112
+	str	r2, [r1, #0]
+	ldr	r1, .L1209+116
+	str	r2, [r1, #0]
+	ldr	r1, .L1209+120
+	str	r2, [r1, #0]
+	ldr	r1, .L1209+124
+	str	r5, [r1, #0]
+	ldr	r1, .L1209+128
+	str	r2, [r1, #0]
+	ldr	r1, .L1209+132
+	str	r2, [r1, #0]
+	ldr	r1, .L1209+136
+	str	r2, [r1, #0]
+	ldr	r2, .L1209+140
+	ldr	r1, [r3, #40]
+	ldr	r5, [r2, #0]
+	cmp	r1, r5
+	it	hi
+	strhi	r1, [r2, #0]
+	ldr	r2, [r3, #36]
+	ldr	r3, .L1209+144
+	ldr	r1, [r3, #0]
+	cmp	r2, r1
+	it	hi
+	strhi	r2, [r3, #0]
+	cmp	r0, r4
+	beq	.L1200
+	ldr	r0, .L1209+92
+	bl	make_superblock
+.L1200:
+	ldr	r0, .L1209+100
+	movw	r4, #65535
+	ldrh	r3, [r0, #0]
+	cmp	r3, r4
+	beq	.L1201
+	bl	make_superblock
+.L1201:
+	ldr	r0, .L1209+104
+	ldrh	r3, [r0, #0]
+	cmp	r3, r4
+	beq	.L1202
+	bl	make_superblock
+.L1202:
+	ldr	r0, .L1209+96
+	movw	r3, #65535
+	ldrh	r2, [r0, #0]
+	cmp	r2, r3
+	beq	.L1206
+	bl	make_superblock
+	b	.L1206
+.L1205:
+	mov	r0, #-1
+	b	.L1190
+.L1206:
+	movs	r0, #0
+.L1190:
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L1208:
+	ldr	r1, .L1209+24
+	mov	r2, #1424
+	ldr	r0, .L1209+28
+	bl	printf
+	ldr	r1, .L1209+36
+	ldr	r0, .L1209+32
+	bl	printf
+	b	.L1193
+.L1210:
+	.align	2
+.L1209:
+	.word	.LANCHOR180
+	.word	.LANCHOR197
+	.word	.LANCHOR55
+	.word	.LANCHOR99
+	.word	1179929683
+	.word	.LANCHOR73
+	.word	.LANCHOR198
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR140
+	.word	.LANCHOR117
+	.word	.LANCHOR191
+	.word	.LANCHOR60
+	.word	.LANCHOR199
+	.word	.LANCHOR87
+	.word	.LANCHOR68
+	.word	.LANCHOR71
+	.word	.LANCHOR84
+	.word	.LANCHOR57
+	.word	.LANCHOR89
+	.word	.LANCHOR53
+	.word	.LANCHOR200
+	.word	.LANCHOR107
+	.word	.LANCHOR201
+	.word	.LANCHOR108
+	.word	.LANCHOR109
+	.word	.LANCHOR155
+	.word	.LANCHOR156
+	.word	.LANCHOR160
+	.word	.LANCHOR159
+	.word	.LANCHOR161
+	.word	.LANCHOR162
+	.word	.LANCHOR163
+	.word	.LANCHOR158
+	.word	.LANCHOR153
+	.word	.LANCHOR154
+	.word	.LANCHOR96
+	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
+	.section	.text.FtlLoadBbt,"ax",%progbits
+	.align	1
+	.global	FtlLoadBbt
+	.thumb
+	.thumb_func
+	.type	FtlLoadBbt, %function
+FtlLoadBbt:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	movs	r3, #0
+	ldr	r6, .L1230
+	movw	sl, #61649
+	str	r3, [r6, #8]
+	ldr	r3, .L1230+4
+	ldr	r4, [r3, #0]
+	str	r4, [r6, #12]
+	bl	FtlBbtMemInit
+	ldr	r3, .L1230+8
+	mov	r8, r3
+	ldrh	r5, [r3, #0]
+	subs	r5, r5, #1
+	uxth	r5, r5
+	b	.L1212
+.L1216:
+	movs	r1, #1
+	ldr	r0, .L1230
+	mov	r2, r1
+	lsls	r3, r5, #10
+	str	r3, [r6, #4]
+	bl	FlashReadPages
+	ldr	r3, [r6, #0]
+	ldr	r7, .L1230
+	adds	r3, r3, #1
+	bne	.L1213
+	ldr	r3, [r6, #4]
+	movs	r1, #1
+	mov	r0, r7
+	mov	r2, r1
+	adds	r3, r3, #1
+	str	r3, [r6, #4]
+	bl	FlashReadPages
+.L1213:
+	ldr	r3, [r7, #0]
+	adds	r3, r3, #1
+	beq	.L1214
+	ldrh	r3, [r4, #0]
+	cmp	r3, sl
+	bne	.L1214
+	ldr	r3, .L1230+12
+	ldr	r2, [r4, #4]
+	strh	r5, [r3, #0]	@ movhi
+	str	r2, [r3, #8]
+	ldrh	r2, [r4, #8]
+	strh	r2, [r3, #4]	@ movhi
+	b	.L1215
+.L1214:
+	subs	r5, r5, #1
+	uxth	r5, r5
+.L1212:
+	ldrh	r3, [r8, #0]
+	subs	r3, r3, #47
+	cmp	r3, r5
+	ble	.L1216
+.L1215:
+	ldr	r5, .L1230+12
+	movw	r3, #65535
+	ldrh	r2, [r5, #0]
+	cmp	r2, r3
+	beq	.L1227
+	ldrh	r2, [r5, #4]
+	cmp	r2, r3
+	beq	.L1218
+	ldr	r6, .L1230
+	movs	r1, #1
+	lsls	r2, r2, #10
+	mov	r0, r6
+	str	r2, [r6, #4]
+	mov	r2, r1
+	bl	FlashReadPages
+	ldr	r3, [r6, #0]
+	adds	r3, r3, #1
+	beq	.L1218
+	ldrh	r2, [r4, #0]
+	movw	r3, #61649
+	cmp	r2, r3
+	bne	.L1218
+	ldr	r3, [r4, #4]
+	ldr	r2, [r5, #8]
+	cmp	r3, r2
+	bls	.L1218
+	ldrh	r2, [r5, #4]
+	str	r3, [r5, #8]
+	ldrh	r3, [r4, #8]
+	strh	r2, [r5, #0]	@ movhi
+	strh	r3, [r5, #4]	@ movhi
+.L1218:
+	ldr	fp, .L1230+12
+	movs	r1, #1
+	movs	r5, #0
+	ldr	r6, .L1230
+	ldr	r8, .L1230+48
+	ldrh	r0, [fp, #0]
+	bl	FtlGetLastWrittenPage
+	uxth	sl, r0
+	mov	r7, r0
+	add	r3, sl, #1
+	strh	r3, [fp, #2]	@ movhi
+	sxth	sl, sl
+	movw	r3, #61649
+	b	.L1219
+.L1222:
+	ldrh	r1, [fp, #0]
+	rsb	r2, r5, sl
+	ldr	r0, .L1230
+	orr	r2, r2, r1, lsl #10
+	str	r2, [r6, #4]
+	ldr	r2, [r8, #0]
+	movs	r1, #1
+	str	r3, [sp, #4]
+	str	r2, [r6, #8]
+	mov	r2, r1
+	bl	FlashReadPages
+	ldr	r2, [r6, #0]
+	ldr	r3, [sp, #4]
+	adds	r2, r2, #1
+	beq	.L1220
+	ldrh	r2, [r4, #0]
+	cmp	r2, r3
+	beq	.L1221
+.L1220:
+	adds	r5, r5, #1
+.L1219:
+	subs	r2, r7, r5
+	lsls	r1, r2, #16
+	bpl	.L1222
+	b	.L1229
+.L1221:
+	ldr	r3, .L1230+12
+	ldrh	r2, [r4, #10]
+	ldrh	r0, [r4, #12]
+	strh	r2, [r3, #6]	@ movhi
+	movw	r3, #65535
+	cmp	r0, r3
+	beq	.L1224
+	ldr	r3, .L1230+16
+	ldr	r2, [r3, #0]
+	cmp	r0, r2
+	beq	.L1224
+	ldr	r3, .L1230+20
+	ldrh	r3, [r3, #0]
+	lsrs	r3, r3, #2
+	cmp	r2, r3
+	bcs	.L1224
+	cmp	r0, r3
+	bcs	.L1224
+	bl	FtlSysBlkNumInit
+.L1224:
+	ldr	r5, .L1230+24
+	movs	r4, #0
+	ldr	r8, .L1230+52
+	ldr	r7, .L1230+28
+	ldr	r6, .L1230
+	b	.L1225
+.L1226:
+	ldrh	r2, [r7, #0]
+	ldr	r1, [r6, #8]
+	ldr	r0, [r5, #4]!
+	lsls	r2, r2, #2
+	mla	r1, r4, r2, r1
+	bl	memcpy
+	adds	r4, r4, #1
+.L1225:
+	ldrh	r3, [r8, #0]
+	cmp	r4, r3
+	bcc	.L1226
+	movs	r0, #0
+	b	.L1217
+.L1227:
+	mov	r0, #-1
+.L1217:
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L1229:
+	ldr	r1, .L1230+32
+	mov	r2, #332
+	ldr	r0, .L1230+36
+	bl	printf
+	ldr	r1, .L1230+40
+	ldr	r0, .L1230+44
+	bl	printf
+	b	.L1221
+.L1231:
+	.align	2
+.L1230:
+	.word	.LANCHOR197
+	.word	.LANCHOR180
+	.word	.LANCHOR66
+	.word	.LANCHOR89
+	.word	.LANCHOR52
+	.word	.LANCHOR56
+	.word	.LANCHOR89+24
+	.word	.LANCHOR90
+	.word	.LANCHOR202
+	.word	.LC9
+	.word	.LC11
+	.word	.LC10
+	.word	.LANCHOR96
+	.word	.LANCHOR60
+	.size	FtlLoadBbt, .-FtlLoadBbt
+	.section	.text.FtlLoadFactoryBbt,"ax",%progbits
+	.align	1
+	.global	FtlLoadFactoryBbt
+	.thumb
+	.thumb_func
+	.type	FtlLoadFactoryBbt, %function
+FtlLoadFactoryBbt:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1239
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	movs	r5, #0
+	ldr	r7, .L1239+4
+	ldr	r3, [r3, #0]
+	ldr	r6, .L1239+8
+	ldr	r8, .L1239+20
+	str	r3, [r7, #8]
+	ldr	r3, .L1239+12
+	ldr	sl, [r3, #0]
+	ldr	r3, .L1239+16
+	str	sl, [r7, #12]
+	b	.L1233
+.L1238:
+	ldrh	r4, [r8, #0]
+	movw	r2, #65535
+	movw	fp, #61664
+	strh	r2, [r6], #2	@ movhi
+	subs	r4, r4, #1
+	uxth	r4, r4
+	b	.L1234
+.L1237:
+	mla	r2, r2, r5, r4
+	movs	r1, #1
+	ldr	r0, .L1239+4
+	lsls	r2, r2, #10
+	str	r2, [r7, #4]
+	mov	r2, r1
+	str	r3, [sp, #4]
+	bl	FlashReadPages
+	ldr	r2, [r7, #0]
+	ldr	r3, [sp, #4]
+	adds	r2, r2, #1
+	beq	.L1235
+	ldrh	r2, [sl, #0]
+	cmp	r2, fp
+	bne	.L1235
+	strh	r4, [r6, #-2]	@ movhi
+	b	.L1236
+.L1235:
+	subs	r4, r4, #1
+	uxth	r4, r4
+.L1234:
+	ldrh	r2, [r8, #0]
+	sub	r1, r2, #15
+	cmp	r1, r4
+	ble	.L1237
+.L1236:
+	adds	r5, r5, #1
+.L1233:
+	ldrh	r2, [r3, #0]
+	cmp	r5, r2
+	bcc	.L1238
+	movs	r0, #0
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L1240:
+	.align	2
+.L1239:
+	.word	.LANCHOR96
+	.word	.LANCHOR197
+	.word	.LANCHOR89+12
+	.word	.LANCHOR180
+	.word	.LANCHOR60
+	.word	.LANCHOR66
+	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
+	.section	.text.FlashProgSlc2KPages,"ax",%progbits
+	.align	1
+	.global	FlashProgSlc2KPages
+	.thumb
+	.thumb_func
+	.type	FlashProgSlc2KPages, %function
+FlashProgSlc2KPages:
+	@ args = 0, pretend = 0, frame = 56
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	sub	sp, sp, #64
+	mov	sl, r0
+	mov	fp, r1
+	str	r3, [sp, #12]
+	mov	r5, r0
+	ldr	r3, .L1259
+	movs	r6, #0
+	str	r2, [sp, #8]
+	ldr	r7, .L1259+4
+	ldrb	r8, [r3, #9]	@ zero_extendqisi2
+	b	.L1242
+.L1249:
+	rsb	r3, r6, fp
+	ldr	r1, [sp, #8]
+	add	r2, sp, #56
+	mov	r0, r5
+	uxtb	r3, r3
+	str	r3, [sp, #0]
+	add	r3, sp, #60
+	bl	LogAddr2PhyAddr
+	ldr	r1, .L1259+8
+	ldr	r3, [sp, #60]
+	ldrb	r2, [r1, #0]	@ zero_extendqisi2
+	cmp	r3, r2
+	bcc	.L1243
+	mov	r3, #-1
+	str	r3, [r5, #0]
+	b	.L1244
+.L1243:
+	ldr	r2, .L1259+12
+	ldrb	r4, [r2, r3]	@ zero_extendqisi2
+	mov	r0, r4
+	bl	NandcWaitFlashReady
+	mov	r0, r4
+	bl	NandcFlashCs
+	mov	r0, r4
+	ldr	r1, [sp, #56]
+	bl	FlashProgFirstCmd
+	ldr	r3, [r5, #12]
+	mov	r2, r8
+	movs	r1, #1
+	mov	r0, r4
+	str	r3, [sp, #0]
+	ldr	r3, [r5, #8]
+	bl	NandcXferData
+	ldr	r1, [sp, #56]
+	mov	r0, r4
+	bl	FlashProgSecondCmd
+	mov	r0, r4
+	bl	NandcWaitFlashReady
+	ldr	r1, [sp, #56]
+	mov	r0, r4
+	bl	FlashReadStatus
+	ldr	r3, [sp, #56]
+	ldr	r1, [r7, #0]
+	adds	r1, r1, r3
+	ands	r0, r0, #1
+	it	ne
+	movne	r0, #-1
+	str	r0, [r5, #0]
+	mov	r0, r4
+	bl	FlashProgFirstCmd
+	ldr	r3, [r5, #8]
+	cbz	r3, .L1246
+	add	r3, r3, #2048
+.L1246:
+	ldr	r2, [r5, #12]
+	cbz	r2, .L1247
+	adds	r2, r2, #8
+.L1247:
+	movs	r1, #1
+	str	r2, [sp, #0]
+	mov	r0, r4
+	mov	r2, r8
+	bl	NandcXferData
+	ldr	r3, [sp, #56]
+	ldr	r1, [r7, #0]
+	mov	r0, r4
+	adds	r1, r1, r3
+	bl	FlashProgSecondCmd
+	mov	r0, r4
+	bl	NandcWaitFlashReady
+	mov	r0, r4
+	ldr	r1, [sp, #56]
+	bl	FlashReadStatus
+	lsls	r3, r0, #31
+	mov	r0, r4
+	itt	mi
+	movmi	r3, #-1
+	strmi	r3, [r5, #0]
+	bl	NandcFlashDeCs
+.L1244:
+	adds	r6, r6, #1
+	adds	r5, r5, #36
+.L1242:
+	cmp	r6, fp
+	bne	.L1249
+	ldr	r3, [sp, #12]
+	cmp	r3, #0
+	beq	.L1250
+	movs	r5, #0
+	add	r4, sl, #8
+	ldr	r6, .L1259+16
+	mov	sl, r5
+	ldr	r8, .L1259+36
+	b	.L1251
+.L1256:
+	ldr	r3, [r4, #-8]
+	sub	r7, r4, #8
+	adds	r3, r3, #1
+	bne	.L1252
+	ldr	r1, [r4, #-4]
+	ldr	r0, .L1259+20
+	bl	printf
+	b	.L1253
+.L1252:
+	rsb	r3, sl, fp
+	mov	r0, r7
+	ldr	r1, [sp, #8]
+	add	r2, sp, #56
+	uxtb	r3, r3
+	str	r3, [sp, #0]
+	add	r3, sp, #60
+	add	r5, sp, #20
+	bl	LogAddr2PhyAddr
+	ldr	lr, [r6, #0]
+	ldr	ip, [r8, #0]
+	movs	r3, #0
+	str	r3, [lr, #0]
+	str	r3, [ip, #0]
+	ldmia	r7!, {r0, r1, r2, r3}
+	stmia	r5!, {r0, r1, r2, r3}
+	ldmia	r7!, {r0, r1, r2, r3}
+	str	lr, [sp, #28]
+	str	ip, [sp, #32]
+	stmia	r5!, {r0, r1, r2, r3}
+	movs	r1, #1
+	ldr	r3, [r7, #0]
+	add	r0, sp, #20
+	ldr	r2, [sp, #8]
+	str	r3, [r5, #0]
+	bl	FlashReadPages
+	ldr	r5, [sp, #20]
+	adds	r0, r5, #1
+	bne	.L1254
+	ldr	r0, .L1259+24
+	ldr	r1, [r4, #-4]
+	bl	printf
+	str	r5, [r4, #-8]
+.L1254:
+	ldr	r3, [r4, #4]
+	cbz	r3, .L1255
+	ldr	r2, [r3, #0]
+	ldr	r3, [r8, #0]
+	ldr	r3, [r3, #0]
+	cmp	r2, r3
+	beq	.L1255
+	ldr	r0, .L1259+28
+	ldr	r1, [r4, #-4]
+	bl	printf
+	mov	r3, #-1
+	str	r3, [r4, #-8]
+.L1255:
+	ldr	r3, [r4, #0]
+	cbz	r3, .L1253
+	ldr	r2, [r3, #0]
+	ldr	r3, [r6, #0]
+	ldr	r3, [r3, #0]
+	cmp	r2, r3
+	beq	.L1253
+	ldr	r0, .L1259+32
+	ldr	r1, [r4, #-4]
+	bl	printf
+	mov	r3, #-1
+	str	r3, [r4, #-8]
+.L1253:
+	add	sl, sl, #1
+	adds	r4, r4, #36
+.L1251:
+	cmp	sl, fp
+	bne	.L1256
+.L1250:
+	movs	r0, #0
+	add	sp, sp, #64
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L1260:
+	.align	2
+.L1259:
+	.word	.LANCHOR18
+	.word	.LANCHOR2
+	.word	.LANCHOR16
+	.word	.LANCHOR19
+	.word	.LANCHOR203
+	.word	.LC21
+	.word	.LC22
+	.word	.LC23
+	.word	.LC24
+	.word	.LANCHOR204
+	.size	FlashProgSlc2KPages, .-FlashProgSlc2KPages
+	.section	.text.FlashProgPages,"ax",%progbits
+	.align	1
+	.global	FlashProgPages
+	.thumb
+	.thumb_func
+	.type	FlashProgPages, %function
+FlashProgPages:
+	@ args = 0, pretend = 0, frame = 64
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	sub	sp, sp, #72
+	ldr	r4, .L1288
+	mov	r8, r0
+	str	r1, [sp, #8]
+	mov	fp, r2
+	str	r3, [sp, #16]
+	ldr	r4, [r4, #0]
+	ldrb	r4, [r4, #19]	@ zero_extendqisi2
+	str	r4, [sp, #20]
+	ldr	r4, .L1288+4
+	ldrb	r4, [r4, #9]	@ zero_extendqisi2
+	str	r4, [sp, #12]
+	ldr	r4, .L1288+8
+	ldrb	r5, [r4, #0]	@ zero_extendqisi2
+	cmp	r5, #0
+	beq	.L1285
+	bl	FlashProgSlc2KPages
+	b	.L1263
+.L1275:
+	ldr	r1, [sp, #8]
+	movs	r4, #36
+	muls	r4, r5, r4
+	add	r6, r8, r4
+	subs	r3, r1, r5
+	mov	r0, r6
+	mov	r1, fp
+	add	r2, sp, #64
+	uxtb	r3, r3
+	str	r3, [sp, #0]
+	add	r3, sp, #68
+	bl	LogAddr2PhyAddr
+	ldr	r3, .L1288+12
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	mov	r7, r0
+	ldr	r0, [sp, #68]
+	cmp	r0, r3
+	bcc	.L1264
+	mov	r3, #-1
+	str	r3, [r8, r4]
+	b	.L1265
+.L1264:
+	ldr	r3, .L1288+16
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cmp	r3, #0
+	it	eq
+	moveq	r7, #0
+	add	r3, sl, r0, lsl #4
+	ldr	r3, [r3, #8]
+	cbz	r3, .L1267
+	uxtb	r0, r0
+	bl	FlashWaitCmdDone
+.L1267:
+	ldr	r2, [sp, #68]
+	ldr	r1, .L1288+20
+	add	r3, r1, r2, lsl #4
+	movs	r1, #0
+	str	r1, [r3, #12]
+	ldr	r1, [sp, #64]
+	str	r6, [r3, #8]
+	str	r1, [r3, #4]
+	cbz	r7, .L1268
+	adds	r1, r5, #1
+	movs	r0, #36
+	mla	r1, r0, r1, r8
+	str	r1, [r3, #12]
+.L1268:
+	ldr	r3, .L1288+24
+	ldrb	r4, [r3, r2]	@ zero_extendqisi2
+	lsls	r2, r2, #4
+	ldr	r3, .L1288+12
+	mov	r0, r4
+	strb	r4, [sl, r2]
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cmp	r3, #1
+	bne	.L1269
+	bl	NandcWaitFlashReady
+	b	.L1270
+.L1269:
+	bl	NandcFlashCs
+	ldr	r2, [sp, #68]
+	ldr	r3, .L1288+28
+	mov	r0, r4
+	ldr	r1, [sp, #64]
+	ldr	r2, [r3, r2, lsl #2]
+	adds	r2, r2, #0
+	it	ne
+	movne	r2, #1
+	bl	FlashWaitReadyEN
+	mov	r0, r4
+	bl	NandcFlashDeCs
+.L1270:
+	ldr	r2, [sp, #20]
+	subs	r3, r2, #1
+	cmp	r3, #6
+	bhi	.L1271
+	ldr	r3, .L1288+32
+	ldrb	r3, [r3, r4]	@ zero_extendqisi2
+	cbz	r3, .L1271
+	ldr	r3, .L1288+36
+	mov	r0, r4
+	adds	r2, r3, #4
+	ldrb	r1, [r3, #1]	@ zero_extendqisi2
+	movs	r3, #0
+	bl	HynixSetRRPara
+.L1271:
+	mov	r0, r4
+	bl	NandcFlashCs
+	cmp	fp, #1
+	mov	r0, r4
+	bne	.L1272
+	ldr	r3, .L1288+40
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L1272
+	bl	flash_enter_slc_mode
+	b	.L1273
+.L1272:
+	bl	flash_exit_slc_mode
+.L1273:
+	mov	r0, r4
+	ldr	r1, [sp, #64]
+	bl	FlashProgFirstCmd
+	ldr	r3, [r6, #12]
+	mov	r0, r4
+	movs	r1, #1
+	ldr	r2, [sp, #12]
+	str	r3, [sp, #0]
+	ldr	r3, [r6, #8]
+	bl	NandcXferData
+	cbz	r7, .L1274
+	mov	r0, r4
+	ldr	r1, [sp, #64]
+	bl	FlashProgDpFirstCmd
+	ldr	r3, .L1288+28
+	ldr	r2, [sp, #68]
+	mov	r0, r4
+	ldr	r1, [sp, #64]
+	ldr	r2, [r3, r2, lsl #2]
+	adds	r2, r2, #0
+	it	ne
+	movne	r2, #1
+	bl	FlashWaitReadyEN
+	ldr	r3, .L1288+44
+	mov	r0, r4
+	ldr	r1, [r3, #0]
+	ldr	r3, [sp, #64]
+	adds	r1, r1, r3
+	bl	FlashProgDpSecondCmd
+	movs	r2, #36
+	adds	r3, r5, #1
+	mov	r0, r4
+	movs	r1, #1
+	mla	r3, r2, r3, r8
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #0]
+	ldr	r2, [sp, #12]
+	ldr	r3, [r3, #8]
+	bl	NandcXferData
+.L1274:
+	mov	r0, r4
+	ldr	r1, [sp, #64]
+	bl	FlashProgSecondCmd
+	mov	r0, r4
+	bl	NandcFlashDeCs
+	adds	r5, r5, r7
+.L1265:
+	adds	r5, r5, #1
+	b	.L1262
+.L1285:
+	ldr	sl, .L1288+20
+.L1262:
+	ldr	r1, [sp, #8]
+	cmp	r5, r1
+	bcc	.L1275
+	movs	r4, #0
+	ldr	r7, .L1288+12
+	ldr	r6, .L1288+40
+	ldr	r5, .L1288+20
+	b	.L1276
+.L1278:
+	uxtb	r0, r4
+	bl	FlashWaitCmdDone
+	cmp	fp, #1
+	bne	.L1277
+	ldrb	r3, [r6, #0]	@ zero_extendqisi2
+	cbz	r3, .L1277
+	lsls	r3, r4, #4
+	ldrb	r0, [r5, r3]	@ zero_extendqisi2
+	bl	flash_exit_slc_mode
+.L1277:
+	adds	r4, r4, #1
+.L1276:
+	ldrb	r3, [r7, #0]	@ zero_extendqisi2
+	cmp	r4, r3
+	bcc	.L1278
+	ldr	r2, [sp, #16]
+	cmp	r2, #0
+	beq	.L1287
+	movs	r5, #0
+	add	r4, r8, #8
+	ldr	r6, .L1288+48
+	mov	sl, r5
+	ldr	r8, .L1288+68
+	b	.L1279
+.L1284:
+	ldr	r3, [r4, #-8]
+	sub	r7, r4, #8
+	adds	r3, r3, #1
+	bne	.L1280
+	ldr	r1, [r4, #-4]
+	ldr	r0, .L1288+52
+	bl	printf
+	b	.L1281
+.L1280:
+	ldr	r1, [sp, #8]
+	mov	r0, r7
+	add	r2, sp, #64
+	add	r5, sp, #28
+	rsb	r3, sl, r1
+	mov	r1, fp
+	uxtb	r3, r3
+	str	r3, [sp, #0]
+	add	r3, sp, #68
+	bl	LogAddr2PhyAddr
+	ldr	lr, [r6, #0]
+	ldr	ip, [r8, #0]
+	movs	r3, #0
+	str	r3, [lr, #0]
+	str	r3, [ip, #0]
+	ldmia	r7!, {r0, r1, r2, r3}
+	stmia	r5!, {r0, r1, r2, r3}
+	ldmia	r7!, {r0, r1, r2, r3}
+	stmia	r5!, {r0, r1, r2, r3}
+	movs	r1, #1
+	ldr	r3, [r7, #0]
+	mov	r2, fp
+	add	r0, sp, #28
+	str	lr, [sp, #36]
+	str	ip, [sp, #40]
+	str	r3, [r5, #0]
+	bl	FlashReadPages
+	ldr	r5, [sp, #28]
+	adds	r2, r5, #1
+	bne	.L1282
+	ldr	r0, .L1288+56
+	ldr	r1, [r4, #-4]
+	bl	printf
+	str	r5, [r4, #-8]
+.L1282:
+	ldr	r3, [r4, #4]
+	cbz	r3, .L1283
+	ldr	r2, [r3, #0]
+	ldr	r3, [r8, #0]
+	ldr	r3, [r3, #0]
+	cmp	r2, r3
+	beq	.L1283
+	ldr	r0, .L1288+60
+	ldr	r1, [r4, #-4]
+	bl	printf
+	mov	r3, #-1
+	str	r3, [r4, #-8]
+.L1283:
+	ldr	r3, [r4, #0]
+	cbz	r3, .L1281
+	ldr	r2, [r3, #0]
+	ldr	r3, [r6, #0]
+	ldr	r3, [r3, #0]
+	cmp	r2, r3
+	beq	.L1281
+	ldr	r0, .L1288+64
+	ldr	r1, [r4, #-4]
+	bl	printf
+	mov	r3, #-1
+	str	r3, [r4, #-8]
+.L1281:
+	add	sl, sl, #1
+	adds	r4, r4, #36
+.L1279:
+	ldr	r2, [sp, #8]
+	cmp	sl, r2
+	bne	.L1284
+	movs	r0, #0
+	b	.L1263
+.L1289:
+	.align	2
+.L1288:
+	.word	.LANCHOR23
+	.word	.LANCHOR18
+	.word	.LANCHOR0
+	.word	.LANCHOR16
+	.word	.LANCHOR33
+	.word	.LANCHOR21
+	.word	.LANCHOR19
+	.word	.LANCHOR20
+	.word	.LANCHOR32
+	.word	.LANCHOR31
+	.word	.LANCHOR7
+	.word	.LANCHOR2
+	.word	.LANCHOR203
+	.word	.LC21
+	.word	.LC22
+	.word	.LC23
+	.word	.LC24
+	.word	.LANCHOR204
+.L1287:
+	ldr	r0, [sp, #16]
+.L1263:
+	add	sp, sp, #72
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+	.size	FlashProgPages, .-FlashProgPages
+	.section	.text.FtlVpcTblFlush,"ax",%progbits
+	.align	1
+	.global	FtlVpcTblFlush
+	.thumb
+	.thumb_func
+	.type	FtlVpcTblFlush, %function
+FtlVpcTblFlush:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r8, #0
+	ldr	r4, .L1302
+	ldr	sl, .L1302+88
+	ldr	fp, .L1302+92
+	ldr	r6, .L1302+4
+	ldr	r0, [sl, #0]
+	ldr	r5, [fp, #0]
+	ldrh	r3, [r4, #0]
+	str	r0, [r6, #8]
+	str	r5, [r6, #12]
+	strh	r3, [r5, #2]	@ movhi
+	movw	r3, #61604
+	strh	r3, [r5, #0]	@ movhi
+	ldr	r3, [r4, #8]
+	ldr	r7, .L1302+8
+	ldr	r1, .L1302+12
+	str	r3, [r5, #4]
+	ldr	r3, .L1302+16
+	str	r8, [r5, #8]
+	str	r8, [r5, #12]
+	stmia	r7, {r1, r3}
+	ldrh	r3, [r4, #6]
+	strh	r3, [r7, #8]	@ movhi
+	ldr	r3, .L1302+20
+	ldrh	r3, [r3, #0]
+	strb	r3, [r7, #10]
+	ldr	r3, .L1302+24
+	ldrh	r2, [r3, #0]
+	ldrh	r1, [r3, #2]
+	strh	r2, [r7, #14]	@ movhi
+	ldrb	r2, [r3, #6]	@ zero_extendqisi2
+	ldrb	r3, [r3, #8]	@ zero_extendqisi2
+	orr	r2, r2, r1, lsl #6
+	strh	r2, [r7, #16]	@ movhi
+	strb	r3, [r7, #11]
+	ldr	r3, .L1302+28
+	ldrh	r2, [r3, #0]
+	ldrh	r1, [r3, #2]
+	strh	r2, [r7, #18]	@ movhi
+	ldrb	r2, [r3, #6]	@ zero_extendqisi2
+	ldrb	r3, [r3, #8]	@ zero_extendqisi2
+	orr	r2, r2, r1, lsl #6
+	strh	r2, [r7, #20]	@ movhi
+	strb	r3, [r7, #12]
+	ldr	r3, .L1302+32
+	ldrh	r2, [r3, #0]
+	strh	r2, [r7, #22]	@ movhi
+	ldrh	r1, [r3, #2]
+	ldrb	r2, [r3, #6]	@ zero_extendqisi2
+	ldrb	r3, [r3, #8]	@ zero_extendqisi2
+	orr	r2, r2, r1, lsl #6
+	movs	r1, #255
+	strh	r2, [r7, #24]	@ movhi
+	strb	r3, [r7, #13]
+	ldr	r3, .L1302+36
+	ldr	r3, [r3, #0]
+	str	r3, [r7, #32]
+	ldr	r3, .L1302+40
+	ldr	r3, [r3, #0]
+	str	r3, [r7, #40]
+	ldr	r3, .L1302+44
+	ldr	r3, [r3, #0]
+	str	r3, [r7, #36]
+	ldr	r3, .L1302+48
+	ldrh	r2, [r3, #0]
+	bl	memset
+	mov	r1, r7
+	ldr	r7, .L1302+52
+	movs	r2, #48
+	ldr	r0, [r6, #8]
+	bl	memcpy
+	ldr	r3, .L1302+56
+	ldrh	r2, [r7, #0]
+	ldr	r0, [r6, #8]
+	ldr	r1, [r3, #0]
+	lsls	r2, r2, #1
+	adds	r0, r0, #48
+	bl	memcpy
+	ldrh	r2, [r7, #0]
+	ldr	r3, [r6, #8]
+	mov	r7, r8
+	add	r0, r2, #24
+	lsrs	r2, r2, #3
+	lsrs	r0, r0, #1
+	adds	r2, r2, #4
+	add	r0, r3, r0, lsl #2
+	ldr	r3, .L1302+60
+	ldr	r1, [r3, #0]
+	bl	memcpy
+	mov	r0, r8
+	bl	FtlUpdateVaildLpn
+	movw	r8, #65535
+.L1301:
+	ldr	r3, [sl, #0]
+	movs	r1, #1
+	ldrh	r2, [r4, #0]
+	ldr	r0, .L1302+4
+	str	r3, [r6, #8]
+	ldr	r3, [fp, #0]
+	str	r3, [r6, #12]
+	ldrh	r3, [r4, #2]
+	orr	r3, r3, r2, lsl #10
+	mov	r2, r1
+	str	r3, [r6, #4]
+	mov	r3, r1
+	bl	FlashProgPages
+	ldr	r3, .L1302+64
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3, #0]
+	subs	r3, r3, #1
+	cmp	r2, r3
+	blt	.L1292
+	ldrh	r3, [r4, #0]
+	ldrh	r8, [r4, #4]
+	strh	r3, [r4, #4]	@ movhi
+	movs	r3, #0
+	strh	r3, [r4, #2]	@ movhi
+	bl	FtlFreeSysBlkQueueOut
+	ldr	r2, .L1302+40
+	ldr	r3, [r2, #0]
+	adds	r1, r3, #1
+	str	r1, [r2, #0]
+	movs	r1, #1
+	str	r3, [r4, #8]
+	lsls	r2, r0, #10
+	strh	r0, [r4, #0]	@ movhi
+	str	r2, [r6, #4]
+	mov	r2, r1
+	str	r3, [r5, #4]
+	mov	r3, r1
+	strh	r0, [r5, #2]	@ movhi
+	ldr	r0, .L1302+4
+	bl	FlashProgPages
+.L1292:
+	ldrh	r3, [r4, #2]
+	ldr	r2, [r6, #0]
+	adds	r3, r3, #1
+	adds	r2, r2, #1
+	uxth	r3, r3
+	strh	r3, [r4, #2]	@ movhi
+	bne	.L1293
+	cmp	r3, #1
+	bne	.L1294
+	ldr	r1, .L1302+68
+	mov	r2, #1096
+	ldr	r0, .L1302+72
+	bl	printf
+	ldr	r0, .L1302+76
+	ldr	r1, .L1302+80
+	bl	printf
+.L1294:
+	ldr	r2, .L1302
+	ldrh	r3, [r2, #2]
+	cmp	r3, #1
+	bne	.L1295
+	ldr	r3, .L1302+64
+	ldrh	r3, [r3, #0]
+	subs	r3, r3, #1
+	strh	r3, [r4, #2]	@ movhi
+.L1295:
+	adds	r7, r7, #1
+	uxth	r7, r7
+	cmp	r7, #3
+	bls	.L1301
+	ldr	r3, .L1302+4
+	mov	r2, r7
+	ldr	r0, .L1302+84
+	ldr	r1, [r3, #4]
+	bl	printf
+.L1297:
+	b	.L1297
+.L1293:
+	cmp	r3, #1
+	beq	.L1301
+	movw	r3, #65535
+	cmp	r8, r3
+	beq	.L1298
+	mov	r0, r8
+	movs	r1, #1
+	bl	FtlFreeSysBlkQueueIn
+.L1298:
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L1303:
+	.align	2
+.L1302:
+	.word	.LANCHOR191
+	.word	.LANCHOR197
+	.word	.LANCHOR140
+	.word	1179929683
+	.word	1342177344
+	.word	.LANCHOR60
+	.word	.LANCHOR107
+	.word	.LANCHOR108
+	.word	.LANCHOR109
+	.word	.LANCHOR161
+	.word	.LANCHOR153
+	.word	.LANCHOR154
+	.word	.LANCHOR73
+	.word	.LANCHOR55
+	.word	.LANCHOR99
+	.word	.LANCHOR117
+	.word	.LANCHOR69
+	.word	.LANCHOR205
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LC25
+	.word	.LANCHOR96
+	.word	.LANCHOR180
+	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
+	.section	.text.FtlBbmTblFlush,"ax",%progbits
+	.align	1
+	.global	FtlBbmTblFlush
+	.thumb
+	.thumb_func
+	.type	FtlBbmTblFlush, %function
+FtlBbmTblFlush:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1316
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	movs	r1, #0
+	ldr	r0, [r3, #0]
+	movs	r4, #0
+	ldr	r3, .L1316+4
+	ldr	r7, .L1316+8
+	ldr	r5, .L1316+12
+	ldr	r3, [r3, #0]
+	str	r0, [r7, #8]
+	ldr	r8, .L1316+48
+	str	r3, [r7, #12]
+	ldr	r3, .L1316+16
+	ldr	sl, .L1316+52
+	ldrh	r2, [r3, #0]
+	bl	memset
+	b	.L1305
+.L1306:
+	ldrh	r2, [sl, #0]
+	ldr	r3, [r7, #8]
+	ldr	r1, [r5, #4]!
+	mul	r0, r2, r4
+	lsls	r2, r2, #2
+	adds	r4, r4, #1
+	add	r0, r3, r0, lsl #2
+	bl	memcpy
+.L1305:
+	ldrh	r3, [r8, #0]
+	ldr	r6, .L1316+8
+	cmp	r4, r3
+	blt	.L1306
+	ldr	r5, [r6, #12]
+	movs	r2, #16
+	movs	r1, #255
+	movs	r7, #0
+	mov	r0, r5
+	mov	r8, r7
+	bl	memset
+	movw	r3, #61649
+	strh	r3, [r5, #0]	@ movhi
+	ldr	r3, .L1316+20
+	ldr	sl, .L1316
+	ldr	fp, .L1316+4
+	ldr	r2, [r3, #8]
+	str	r2, [r5, #4]
+	ldrh	r2, [r3, #0]
+	strh	r2, [r5, #2]	@ movhi
+	ldrh	r2, [r3, #4]
+	ldrh	r3, [r3, #6]
+	strh	r2, [r5, #8]	@ movhi
+	strh	r3, [r5, #10]	@ movhi
+	ldr	r3, .L1316+24
+	ldr	r3, [r3, #0]
+	strh	r3, [r5, #12]	@ movhi
+	b	.L1315
+.L1312:
+	mov	r8, #1
+.L1315:
+	ldr	r3, [sl, #0]
+	movs	r1, #0
+	ldr	r4, .L1316+20
+	ldrh	r0, [r5, #10]
+	str	r3, [r6, #8]
+	str	r1, [r6, #0]
+	ldr	r3, [fp, #0]
+	ldrh	r1, [r4, #0]
+	ldrh	r2, [r4, #2]
+	str	r3, [r6, #12]
+	orr	r3, r2, r1, lsl #10
+	str	r3, [r6, #4]
+	ldrh	r3, [r4, #4]
+	str	r0, [sp, #0]
+	ldr	r0, .L1316+28
+	bl	printf
+	movs	r1, #1
+	mov	r2, r1
+	mov	r3, r1
+	ldr	r0, .L1316+8
+	bl	FlashProgPages
+	ldr	r3, .L1316+32
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3, #0]
+	subs	r3, r3, #1
+	cmp	r2, r3
+	blt	.L1308
+	ldrh	r2, [r4, #0]
+	movs	r1, #0
+	ldr	r3, [r4, #8]
+	strh	r1, [r4, #2]	@ movhi
+	movs	r1, #1
+	adds	r3, r3, #1
+	str	r3, [r4, #8]
+	str	r3, [r5, #4]
+	strh	r2, [r5, #8]	@ movhi
+	ldrh	r3, [r4, #4]
+	strh	r2, [r4, #4]	@ movhi
+	ldr	r2, .L1316+36
+	strh	r3, [r4, #0]	@ movhi
+	lsls	r3, r3, #10
+	str	r3, [r6, #4]
+	ldr	r0, [r2, #0]
+	mov	r2, r1
+	str	r3, [r0, #4]
+	bl	FlashEraseBlocks
+	movs	r1, #1
+	ldr	r0, .L1316+8
+	mov	r2, r1
+	mov	r3, r1
+	bl	FlashProgPages
+.L1308:
+	ldr	r3, .L1316+20
+	ldrh	r2, [r3, #2]
+	adds	r2, r2, #1
+	strh	r2, [r3, #2]	@ movhi
+	ldr	r3, [r6, #0]
+	adds	r3, r3, #1
+	bne	.L1309
+	adds	r7, r7, #1
+	ldr	r0, .L1316+40
+	ldr	r1, [r6, #4]
+	uxth	r7, r7
+	bl	printf
+	cmp	r7, #3
+	bls	.L1315
+	ldr	r3, .L1316+8
+	mov	r2, r7
+	ldr	r0, .L1316+44
+	ldr	r1, [r3, #4]
+	bl	printf
+.L1311:
+	b	.L1311
+.L1309:
+	cmp	r8, #0
+	beq	.L1312
+	movs	r0, #0
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L1317:
+	.align	2
+.L1316:
+	.word	.LANCHOR96
+	.word	.LANCHOR180
+	.word	.LANCHOR197
+	.word	.LANCHOR89+24
+	.word	.LANCHOR73
+	.word	.LANCHOR89
+	.word	.LANCHOR52
+	.word	.LC26
+	.word	.LANCHOR69
+	.word	.LANCHOR93
+	.word	.LC27
+	.word	.LC28
+	.word	.LANCHOR60
+	.word	.LANCHOR90
+	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
+	.section	.text.FtlGcFreeBadSuperBlk,"ax",%progbits
+	.align	1
+	.global	FtlGcFreeBadSuperBlk
+	.thumb
+	.thumb_func
+	.type	FtlGcFreeBadSuperBlk, %function
+FtlGcFreeBadSuperBlk:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	sl, r0
+	ldr	r5, .L1328
+	ldrh	r3, [r5, #0]
+	cbnz	r3, .L1327
+	b	.L1320
+.L1326:
+	ldr	r3, .L1328+4
+	mov	r1, sl
+	mov	fp, #0
+	ldrb	r0, [r3, r4]	@ zero_extendqisi2
+	bl	V2P_block
+	mov	r3, r0
+	b	.L1321
+.L1325:
+	ldrh	r2, [r7, fp, lsl #1]
+	cmp	r2, r3
+	bne	.L1322
+	mov	r0, r3
+	str	r3, [sp, #4]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	ldrh	r1, [r5, #0]
+	mov	r2, fp
+	ldr	r3, [sp, #4]
+	b	.L1323
+.L1324:
+	adds	r0, r2, #1
+	ldrh	lr, [r6, r0, lsl #1]
+	strh	lr, [r6, r2, lsl #1]	@ movhi
+	uxth	r2, r0
+.L1323:
+	cmp	r2, r1
+	bcc	.L1324
+	subs	r1, r1, #1
+	strh	r1, [r5, #0]	@ movhi
+.L1322:
+	add	fp, fp, #1
+	uxth	fp, fp
+.L1321:
+	ldrh	r2, [r5, #0]
+	cmp	r2, fp
+	bhi	.L1325
+	adds	r4, r4, #1
+	uxth	r4, r4
+	b	.L1319
+.L1327:
+	ldr	r7, .L1328+8
+	movs	r4, #0
+	ldr	r8, .L1328+12
+	mov	r6, r7
+.L1319:
+	ldrh	r3, [r8, #0]
+	cmp	r3, r4
+	bhi	.L1326
+	bl	FtlGcReFreshBadBlk
+.L1320:
+	movs	r0, #0
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L1329:
+	.align	2
+.L1328:
+	.word	.LANCHOR148
+	.word	.LANCHOR62
+	.word	.LANCHOR149
+	.word	.LANCHOR53
+	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
+	.section	.text.update_vpc_list,"ax",%progbits
+	.align	1
+	.global	update_vpc_list
+	.thumb
+	.thumb_func
+	.type	update_vpc_list, %function
+update_vpc_list:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	mov	r4, r0
+	ldr	r3, .L1340
+	ldr	r3, [r3, #0]
+	ldrh	r3, [r3, r0, lsl #1]
+	cmp	r3, #0
+	bne	.L1331
+	ldr	r2, .L1340+4
+	ldrh	r1, [r2, #0]
+	cmp	r1, r0
+	bne	.L1332
+	movw	r3, #65535
+	strh	r3, [r2, #0]	@ movhi
+	b	.L1333
+.L1332:
+	ldr	r2, .L1340+8
+	ldrh	r2, [r2, #0]
+	cmp	r2, r0
+	beq	.L1334
+	ldr	r2, .L1340+12
+	ldrh	r2, [r2, #0]
+	cmp	r2, r0
+	beq	.L1334
+	ldr	r2, .L1340+16
+	ldrh	r2, [r2, #0]
+	cmp	r2, r0
+	beq	.L1334
+.L1333:
+	ldr	r5, .L1340+20
+	mov	r1, r4
+	ldr	r0, .L1340+24
+	bl	List_remove_node
+	ldrh	r3, [r5, #0]
+	cbnz	r3, .L1335
+	ldr	r1, .L1340+28
+	movw	r2, #2809
+	ldr	r0, .L1340+32
+	bl	printf
+	ldr	r0, .L1340+36
+	ldr	r1, .L1340+40
+	bl	printf
+.L1335:
+	ldrh	r3, [r5, #0]
+	mov	r0, r4
+	subs	r3, r3, #1
+	strh	r3, [r5, #0]	@ movhi
+	bl	free_data_superblock
+	mov	r0, r4
+	bl	FtlGcFreeBadSuperBlk
+	ldr	r3, .L1340+44
+	ldrh	r2, [r3, #0]
+	ldrh	r3, [r5, #0]
+	adds	r2, r2, r3
+	ldr	r3, .L1340+48
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	ble	.L1339
+	ldr	r1, .L1340+28
+	movw	r2, #2812
+	ldr	r0, .L1340+32
+	bl	printf
+	ldr	r1, .L1340+40
+	ldr	r0, .L1340+36
+	bl	printf
+	b	.L1339
+.L1331:
+	bl	List_update_data_list
+	movs	r3, #0
+	b	.L1334
+.L1339:
+	movs	r3, #1
+.L1334:
+	mov	r0, r3
+	pop	{r3, r4, r5, pc}
+.L1341:
+	.align	2
+.L1340:
+	.word	.LANCHOR99
+	.word	.LANCHOR201
+	.word	.LANCHOR107
+	.word	.LANCHOR108
+	.word	.LANCHOR109
+	.word	.LANCHOR101
+	.word	.LANCHOR98
+	.word	.LANCHOR206
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR104
+	.word	.LANCHOR55
+	.size	update_vpc_list, .-update_vpc_list
+	.section	.text.decrement_vpc_count,"ax",%progbits
+	.align	1
+	.global	decrement_vpc_count
+	.thumb
+	.thumb_func
+	.type	decrement_vpc_count, %function
+decrement_vpc_count:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	movw	r3, #65535
+	cmp	r0, r3
+	push	{r4, r5, r6, lr}
+	mov	r4, r0
+	beq	.L1343
+	ldr	r6, .L1349
+	ldr	r3, [r6, #0]
+	ldrh	r5, [r3, r0, lsl #1]
+	cbnz	r5, .L1344
+	mov	r1, r4
+	ldr	r0, .L1349+4
+	mov	r2, r5
+	bl	printf
+	ldr	r3, [r6, #0]
+	ldrh	r4, [r3, r4, lsl #1]
+	cmp	r4, #0
+	bne	.L1345
+	ldr	r1, .L1349+8
+	movw	r2, #2827
+	ldr	r0, .L1349+12
+	mov	r5, r4
+	bl	printf
+	ldr	r0, .L1349+16
+	ldr	r1, .L1349+20
+	bl	printf
+	b	.L1345
+.L1344:
+	subs	r5, r5, #1
+	strh	r5, [r3, r0, lsl #1]	@ movhi
+.L1343:
+	ldr	r6, .L1349+24
+	movw	r3, #65535
+	ldrh	r0, [r6, #0]
+	cmp	r0, r3
+	bne	.L1346
+	strh	r4, [r6, #0]	@ movhi
+	b	.L1348
+.L1346:
+	cmp	r0, r4
+	beq	.L1348
+	bl	update_vpc_list
+	ldr	r3, .L1349+28
+	strh	r4, [r6, #0]	@ movhi
+	ldr	r2, [r3, #0]
+	ldr	r3, .L1349+32
+	ldr	r3, [r3, #0]
+	subs	r3, r2, r3
+	ldr	r2, .L1349+36
+	adds	r5, r0, #0
+	it	ne
+	movne	r5, #1
+	asrs	r3, r3, #1
+	muls	r3, r2, r3
+	ldr	r2, .L1349
+	uxth	r3, r3
+	ldr	r2, [r2, #0]
+	ldrh	r2, [r2, r3, lsl #1]
+	cbnz	r2, .L1345
+	cmp	r4, r3
+	beq	.L1345
+	ldr	r1, .L1349+8
+	movw	r2, #2843
+	ldr	r0, .L1349+12
+	bl	printf
+	ldr	r1, .L1349+20
+	ldr	r0, .L1349+16
+	bl	printf
+	b	.L1345
+.L1348:
+	movs	r5, #0
+.L1345:
+	mov	r0, r5
+	pop	{r4, r5, r6, pc}
+.L1350:
+	.align	2
+.L1349:
+	.word	.LANCHOR99
+	.word	.LC29
+	.word	.LANCHOR207
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR135
+	.word	.LANCHOR98
+	.word	.LANCHOR97
+	.word	-1431655765
+	.size	decrement_vpc_count, .-decrement_vpc_count
+	.section	.text.get_new_active_ppa,"ax",%progbits
+	.align	1
+	.global	get_new_active_ppa
+	.thumb
+	.thumb_func
+	.type	get_new_active_ppa, %function
+get_new_active_ppa:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldrh	r2, [r0, #0]
+	push	{r3, r4, r5, r6, r7, r8, sl, lr}
+	movw	r3, #65535
+	cmp	r2, r3
+	mov	r4, r0
+	bne	.L1352
+	ldr	r1, .L1367
+	movw	r2, #2749
+	ldr	r0, .L1367+4
+	bl	printf
+	ldr	r0, .L1367+8
+	ldr	r1, .L1367+12
+	bl	printf
+.L1352:
+	ldr	r3, .L1367+16
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	bne	.L1353
+	ldr	r1, .L1367
+	movw	r2, #2750
+	ldr	r0, .L1367+4
+	bl	printf
+	ldr	r0, .L1367+8
+	ldr	r1, .L1367+12
+	bl	printf
+.L1353:
+	ldrh	r3, [r4, #4]
+	cbnz	r3, .L1354
+	ldr	r1, .L1367
+	movw	r2, #2751
+	ldr	r0, .L1367+4
+	bl	printf
+	ldr	r0, .L1367+8
+	ldr	r1, .L1367+12
+	bl	printf
+.L1354:
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	movs	r7, #0
+	movw	r6, #65535
+	strb	r7, [r4, #10]
+	adds	r3, r3, #8
+	ldr	sl, .L1367+24
+	ldr	r8, .L1367+28
+	ldrh	r3, [r4, r3, lsl #1]
+	ldr	r5, .L1367+20
+	b	.L1355
+.L1356:
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	ldrh	r2, [r5, #0]
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	strb	r3, [r4, #6]
+	cmp	r2, r3
+	bne	.L1357
+	ldrh	r3, [r4, #2]
+	strb	r7, [r4, #6]
+	adds	r3, r3, #1
+	strh	r3, [r4, #2]	@ movhi
+.L1357:
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	adds	r3, r3, #8
+	ldrh	r3, [r4, r3, lsl #1]
+.L1355:
+	cmp	r3, r6
+	beq	.L1356
+	ldrb	r2, [r4, #8]	@ zero_extendqisi2
+	cmp	r2, #1
+	bne	.L1358
+	ldrb	r2, [sl, #0]	@ zero_extendqisi2
+	cbnz	r2, .L1358
+	ldrh	r2, [r4, #2]
+	ldrh	r2, [r8, r2, lsl #1]
+	cmp	r2, r6
+	bne	.L1358
+	ldrh	r3, [r4, #4]
+	ldrh	r0, [r4, #0]
+	subs	r3, r3, #1
+	strh	r3, [r4, #4]	@ movhi
+	bl	decrement_vpc_count
+	b	.L1356
+.L1358:
+	ldrh	r5, [r4, #2]
+	movw	r6, #65535
+	ldr	sl, .L1367+20
+	mov	r8, r6
+	ldr	r7, .L1367+24
+	orr	r5, r5, r3, lsl #10
+	ldrh	r3, [r4, #4]
+	subs	r3, r3, #1
+	strh	r3, [r4, #4]	@ movhi
+.L1363:
+	ldrh	r2, [sl, #0]
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+.L1360:
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	cmp	r3, r2
+	bne	.L1359
+	ldrh	r3, [r4, #2]
+	adds	r3, r3, #1
+	strh	r3, [r4, #2]	@ movhi
+	movs	r3, #0
+.L1359:
+	add	r1, r3, #8
+	ldrh	r1, [r4, r1, lsl #1]
+	cmp	r1, r6
+	beq	.L1360
+	strb	r3, [r4, #6]
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	cmp	r3, #1
+	bne	.L1361
+	ldrb	r2, [r7, #0]	@ zero_extendqisi2
+	ldrh	r3, [r4, #2]
+	cbnz	r2, .L1365
+	ldr	r2, .L1367+28
+	ldrh	r3, [r2, r3, lsl #1]
+	cmp	r3, r8
+	bne	.L1361
+	ldrh	r3, [r4, #4]
+	cbz	r3, .L1361
+	subs	r3, r3, #1
+	ldrh	r0, [r4, #0]
+	strh	r3, [r4, #4]	@ movhi
+	bl	decrement_vpc_count
+	b	.L1363
+.L1365:
+	ldr	r2, .L1367+32
+	ldrh	r2, [r2, #0]
+	cmp	r3, r2
+	bcc	.L1361
+	ldr	r3, .L1367+36
+	ldrh	r2, [r4, #0]
+	ldrh	r1, [r4, #4]
+	ldr	r3, [r3, #0]
+	ldrh	r0, [r3, r2, lsl #1]
+	subs	r1, r0, r1
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	movs	r3, #0
+	strh	r3, [r4, #4]	@ movhi
+	mov	r2, r3	@ movhi
+	ldr	r3, .L1367+16
+	strb	r2, [r4, #6]
+	ldrh	r3, [r3, #0]
+	strh	r3, [r4, #2]	@ movhi
+.L1361:
+	ldr	r3, .L1367+16
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	bne	.L1364
+	ldrh	r3, [r4, #4]
+	cbz	r3, .L1364
+	ldr	r1, .L1367
+	movw	r2, #2795
+	ldr	r0, .L1367+4
+	bl	printf
+	ldr	r0, .L1367+8
+	ldr	r1, .L1367+12
+	bl	printf
+.L1364:
+	mov	r0, r5
+	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
+.L1368:
+	.align	2
+.L1367:
+	.word	.LANCHOR208
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR68
+	.word	.LANCHOR53
+	.word	.LANCHOR7
+	.word	.LANCHOR9
+	.word	.LANCHOR69
+	.word	.LANCHOR99
+	.size	get_new_active_ppa, .-get_new_active_ppa
+	.section	.text.FtlSlcSuperblockCheck,"ax",%progbits
+	.align	1
+	.global	FtlSlcSuperblockCheck
+	.thumb
+	.thumb_func
+	.type	FtlSlcSuperblockCheck, %function
+FtlSlcSuperblockCheck:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, r8, sl, lr}
+	mov	r4, r0
+	ldrh	r3, [r0, #4]
+	cmp	r3, #0
+	beq	.L1369
+	ldrh	r3, [r0, #0]
+	movw	r5, #65535
+	cmp	r3, r5
+	beq	.L1369
+	ldrb	r3, [r0, #6]	@ zero_extendqisi2
+	movs	r6, #0
+	ldr	sl, .L1375+4
+	adds	r3, r3, #8
+	ldr	r8, .L1375+20
+	ldr	r7, .L1375
+	ldrh	r3, [r0, r3, lsl #1]
+	b	.L1371
+.L1372:
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	ldrh	r2, [r7, #0]
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	strb	r3, [r4, #6]
+	cmp	r2, r3
+	bne	.L1373
+	ldrh	r3, [r4, #2]
+	strb	r6, [r4, #6]
+	adds	r3, r3, #1
+	strh	r3, [r4, #2]	@ movhi
+.L1373:
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	adds	r3, r3, #8
+	ldrh	r3, [r4, r3, lsl #1]
+.L1371:
+	cmp	r3, r5
+	beq	.L1372
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	cmp	r3, #1
+	bne	.L1374
+	ldrb	r2, [sl, #0]	@ zero_extendqisi2
+	cbnz	r2, .L1374
+	ldrh	r2, [r4, #2]
+	ldrh	r2, [r8, r2, lsl #1]
+	cmp	r2, r5
+	bne	.L1374
+	ldrh	r3, [r4, #4]
+	ldrh	r0, [r4, #0]
+	subs	r3, r3, #1
+	strh	r3, [r4, #4]	@ movhi
+	bl	decrement_vpc_count
+	ldrh	r3, [r4, #4]
+	cmp	r3, #0
+	bne	.L1372
+	ldrh	r2, [r4, #2]
+	strb	r3, [r4, #6]
+	adds	r2, r2, #1
+	strh	r2, [r4, #2]	@ movhi
+	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
+.L1374:
+	ldr	r2, .L1375+4
+	ldrb	r2, [r2, #0]	@ zero_extendqisi2
+	cbz	r2, .L1369
+	cmp	r3, #1
+	bne	.L1369
+	ldr	r3, .L1375+8
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	bcc	.L1369
+	ldr	r3, .L1375+12
+	ldrh	r2, [r4, #0]
+	ldrh	r1, [r4, #4]
+	ldr	r3, [r3, #0]
+	ldrh	r0, [r3, r2, lsl #1]
+	subs	r1, r0, r1
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	movs	r3, #0
+	strh	r3, [r4, #4]	@ movhi
+	mov	r2, r3	@ movhi
+	ldr	r3, .L1375+16
+	strb	r2, [r4, #6]
+	ldrh	r3, [r3, #0]
+	strh	r3, [r4, #2]	@ movhi
+.L1369:
+	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
+.L1376:
+	.align	2
+.L1375:
+	.word	.LANCHOR53
+	.word	.LANCHOR7
+	.word	.LANCHOR69
+	.word	.LANCHOR99
+	.word	.LANCHOR68
+	.word	.LANCHOR9
+	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
+	.section	.text.allocate_data_superblock,"ax",%progbits
+	.align	1
+	.global	allocate_data_superblock
+	.thumb
+	.thumb_func
+	.type	allocate_data_superblock, %function
+allocate_data_superblock:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r4, r0
+	ldr	r7, .L1419
+	sub	sp, sp, #24
+	ldr	r8, .L1419+100
+.L1416:
+	ldr	r1, .L1419+4
+	ldrh	r2, [r7, #0]
+	ldrh	r3, [r1, #0]
+	adds	r2, r2, r3
+	ldr	r3, .L1419+8
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	ble	.L1379
+	ldr	r1, .L1419+12
+	movw	r2, #2594
+	ldr	r0, .L1419+16
+	bl	printf
+	ldr	r0, .L1419+20
+	ldr	r1, .L1419+24
+	bl	printf
+.L1379:
+	ldr	r3, .L1419+28
+	cmp	r4, r3
+	bne	.L1380
+	ldr	r3, .L1419+32
+	ldrh	r2, [r7, #0]
+	ldr	r3, [r3, #0]
+	lsrs	r1, r2, #1
+	adds	r0, r1, #1
+	mul	r5, r3, r2
+	add	r0, r0, r5, lsr #2
+	ldr	r5, .L1419+36
+	uxth	r0, r0
+	ldr	r5, [r5, #0]
+	cbz	r5, .L1408
+	ldr	r5, .L1419+40
+	ldr	r5, [r5, #0]
+	cmp	r5, #29
+	bhi	.L1408
+	cmp	r5, #2
+	bls	.L1413
+	lsls	r0, r2, #31
+	bpl	.L1381
+	cbz	r3, .L1410
+	b	.L1381
+.L1380:
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	cmp	r3, #1
+	bne	.L1413
+	ldr	r3, .L1419+44
+	ldrh	r3, [r3, #0]
+	cmp	r3, #1
+	beq	.L1413
+	ldr	r3, .L1419+48
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbnz	r3, .L1413
+	ldr	r2, .L1419+36
+	ldrh	r3, [r7, #0]
+	ldr	r2, [r2, #0]
+	lsrs	r1, r3, #3
+	cbz	r2, .L1381
+	ldr	r2, .L1419+40
+	ldr	r2, [r2, #0]
+	cmp	r2, #1
+	bhi	.L1381
+	movs	r1, #7
+	muls	r1, r3, r1
+	lsrs	r1, r1, #3
+	b	.L1381
+.L1408:
+	mov	r1, r0
+.L1381:
+	cbz	r1, .L1382
+	subs	r1, r1, #1
+	uxth	r1, r1
+	b	.L1382
+.L1410:
+	mov	r1, r3
+	b	.L1382
+.L1413:
+	movs	r1, #0
+.L1382:
+	ldr	r0, .L1419+52
+	bl	List_pop_index_node
+	ldrh	r3, [r7, #0]
+	uxth	r5, r0
+	cbnz	r3, .L1383
+	ldr	r1, .L1419+12
+	movw	r2, #2614
+	ldr	r0, .L1419+16
+	bl	printf
+	ldr	r0, .L1419+20
+	ldr	r1, .L1419+24
+	bl	printf
+.L1383:
+	ldr	r2, .L1419
+	mov	r0, r4
+	ldrh	r3, [r2, #0]
+	subs	r3, r3, #1
+	strh	r3, [r2, #0]	@ movhi
+	strh	r5, [r4, #0]	@ movhi
+	bl	make_superblock
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	cbnz	r3, .L1384
+	ldr	r3, .L1419+56
+	movw	r2, #65535
+	ldr	r1, .L1419+4
+	ldr	r3, [r3, #0]
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	ldrh	r3, [r1, #0]
+	ldrh	r2, [r7, #0]
+	adds	r2, r2, r3
+	ldr	r3, .L1419+8
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	ble	.L1416
+	ldr	r1, .L1419+12
+	movw	r2, #2625
+	ldr	r0, .L1419+16
+	bl	printf
+	ldr	r1, .L1419+24
+	ldr	r0, .L1419+20
+	bl	printf
+	b	.L1416
+.L1384:
+	ldr	r1, .L1419+4
+	ldrh	r2, [r7, #0]
+	ldrh	r3, [r1, #0]
+	adds	r2, r2, r3
+	ldr	r3, .L1419+8
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	ble	.L1386
+	ldr	r1, .L1419+12
+	movw	r2, #2628
+	ldr	r0, .L1419+16
+	bl	printf
+	ldr	r0, .L1419+20
+	ldr	r1, .L1419+24
+	bl	printf
+.L1386:
+	ldr	r3, .L1419+60
+	movs	r6, #0
+	ldr	lr, [r8, #0]
+	mov	sl, r4
+	mov	r1, r4
+	mov	r2, r6
+	ldrh	r3, [r3, #0]
+	mov	r0, r6
+	stmia	sp, {r4, lr}
+	str	r3, [sp, #20]
+	mov	r3, lr
+	b	.L1387
+.L1389:
+	str	r0, [r3, #8]
+	movw	r4, #65535
+	str	r0, [r3, #12]
+	ldrh	ip, [r1, #16]
+	cmp	ip, r4
+	beq	.L1388
+	ldr	r4, [sp, #4]
+	mov	lr, #36
+	lsl	ip, ip, #10
+	mla	fp, lr, r6, r4
+	adds	r6, r6, #1
+	uxth	r6, r6
+	str	ip, [fp, #4]
+.L1388:
+	adds	r2, r2, #1
+	adds	r3, r3, #36
+	adds	r1, r1, #2
+	uxth	r2, r2
+.L1387:
+	ldr	r4, [sp, #20]
+	cmp	r2, r4
+	bne	.L1389
+	ldr	r4, [sp, #0]
+	cbnz	r6, .L1390
+	ldr	r1, .L1419+12
+	mov	r2, #2640
+	ldr	r0, .L1419+16
+	bl	printf
+	ldr	r0, .L1419+20
+	ldr	r1, .L1419+24
+	bl	printf
+.L1390:
+	ldr	r3, .L1419+36
+	ldr	r3, [r3, #0]
+	cbz	r3, .L1391
+	ldr	r3, .L1419+64
+	cmp	r4, r3
+	bne	.L1391
+	ldr	r3, .L1419+68
+	ldr	r3, [r3, #0]
+	ldrh	r3, [r3, r5, lsl #1]
+	cmp	r3, #30
+	bls	.L1391
+	movs	r3, #0
+	strb	r3, [r4, #8]
+.L1391:
+	ldr	r3, .L1419+72
+	ldrh	r3, [r3, #0]
+	cmp	r3, r5
+	bne	.L1392
+	ldr	r1, .L1419+12
+	movw	r2, #2647
+	ldr	r0, .L1419+16
+	bl	printf
+	ldr	r0, .L1419+20
+	ldr	r1, .L1419+24
+	bl	printf
+.L1392:
+	ldr	r3, .L1419+68
+	ldrb	r2, [r4, #8]	@ zero_extendqisi2
+	ldr	r3, [r3, #0]
+	cbnz	r2, .L1393
+	ldrh	r2, [r3, r5, lsl #1]
+	cbz	r2, .L1394
+	ldr	r1, .L1419+76
+	ldrh	r1, [r1, #0]
+	adds	r2, r2, r1
+	b	.L1417
+.L1394:
+	movs	r2, #2
+.L1417:
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	mov	r0, r5
+	ldr	r3, .L1419+80
+	movs	r1, #0
+	ldr	r2, [r3, #0]
+	adds	r2, r2, #1
+	str	r2, [r3, #0]
+	b	.L1418
+.L1393:
+	ldrh	r2, [r3, r5, lsl #1]
+	mov	r0, r5
+	movs	r1, #1
+	adds	r2, r2, #1
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	ldr	r3, .L1419+84
+	ldr	r2, [r3, #0]
+	adds	r2, r2, #1
+	str	r2, [r3, #0]
+.L1418:
+	bl	ftl_set_blk_mode
+	ldr	r3, .L1419+68
+	lsl	fp, r5, #1
+	str	fp, [sp, #20]
+	ldr	r3, [r3, #0]
+	ldrh	r2, [r3, r5, lsl #1]
+	ldr	r3, .L1419+88
+	ldr	r1, [r3, #0]
+	cmp	r2, r1
+	it	hi
+	strhi	r2, [r3, #0]
+	ldr	r3, .L1419+76
+	ldrh	r2, [r3, #0]
+	ldr	r3, .L1419+80
+	ldr	r0, [r3, #0]
+	ldr	r3, .L1419+84
+	ldr	r3, [r3, #0]
+	mla	r0, r0, r2, r3
+	ldr	r3, .L1419+8
+	ldrh	r1, [r3, #0]
+	bl	__aeabi_uidiv
+	ldr	r3, .L1419+92
+	str	r0, [r3, #0]
+	ldr	r3, .L1419+96
+	ldr	r3, [r3, #0]
+	ldr	r2, [r3, #16]
+	adds	r2, r2, #1
+	str	r2, [r3, #16]
+	ldr	r3, [r8, #0]
+	movs	r2, #0
+	b	.L1398
+.L1420:
+	.align	2
+.L1419:
+	.word	.LANCHOR104
+	.word	.LANCHOR101
+	.word	.LANCHOR55
+	.word	.LANCHOR209
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR109
+	.word	.LANCHOR166
+	.word	.LANCHOR126
+	.word	.LANCHOR164
+	.word	.LANCHOR59
+	.word	.LANCHOR7
+	.word	.LANCHOR103
+	.word	.LANCHOR99
+	.word	.LANCHOR53
+	.word	.LANCHOR107
+	.word	.LANCHOR94
+	.word	.LANCHOR201
+	.word	.LANCHOR63
+	.word	.LANCHOR161
+	.word	.LANCHOR162
+	.word	.LANCHOR163
+	.word	.LANCHOR195
+	.word	.LANCHOR183
+	.word	.LANCHOR93
+.L1399:
+	adds	r2, r2, #1
+	ldr	r1, [r3, #-32]
+	uxth	r2, r2
+	bic	r1, r1, #1020
+	bic	r1, r1, #3
+	str	r1, [r3, #-32]
+.L1398:
+	adds	r3, r3, #36
+	cmp	r2, r6
+	bne	.L1399
+	ldrb	r1, [r4, #8]	@ zero_extendqisi2
+	mov	r2, r6
+	mov	fp, #0
+	ldr	r0, [r8, #0]
+	bl	FlashEraseBlocks
+	mov	ip, r5
+	mov	r3, r6
+	mov	r5, fp
+	mov	r6, r4
+	mov	r4, fp
+	b	.L1400
+.L1402:
+	ldr	r1, [r8, #0]
+	add	r0, r1, fp
+	ldr	r1, [r1, fp]
+	adds	r2, r1, #1
+	bne	.L1401
+	ldr	r0, [r0, #4]
+	adds	r5, r5, #1
+	str	r1, [sp, #16]
+	ubfx	r0, r0, #10, #16
+	str	r3, [sp, #12]
+	str	ip, [sp, #8]
+	bl	FtlBbmMapBadBlock
+	ldr	r1, [sp, #16]
+	strh	r1, [sl, #16]	@ movhi
+	ldrb	r1, [r6, #7]	@ zero_extendqisi2
+	subs	r1, r1, #1
+	strb	r1, [r6, #7]
+	ldr	ip, [sp, #8]
+	ldr	r3, [sp, #12]
+.L1401:
+	adds	r4, r4, #1
+	add	fp, fp, #36
+	add	sl, sl, #2
+	uxth	r4, r4
+.L1400:
+	cmp	r4, r3
+	bne	.L1402
+	mov	r3, r5
+	mov	r4, r6
+	mov	r5, ip
+	cbz	r3, .L1403
+	mov	r0, ip
+	bl	update_multiplier_value
+	bl	FtlBbmTblFlush
+.L1403:
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	cbnz	r3, .L1404
+	ldr	r3, .L1421
+	movw	r2, #65535
+	ldr	r3, [r3, #0]
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	b	.L1416
+.L1404:
+	ldr	r2, .L1421+4
+	ldr	fp, [sp, #20]
+	ldrh	r2, [r2, #0]
+	muls	r3, r2, r3
+	movs	r2, #0
+	strh	r2, [r4, #2]	@ movhi
+	strb	r2, [r4, #6]
+	uxth	r3, r3
+	ldr	r2, .L1421+8
+	strh	r5, [r4, #0]	@ movhi
+	strh	r3, [r4, #4]	@ movhi
+	ldr	r1, [r2, #0]
+	str	r1, [r4, #12]
+	adds	r1, r1, #1
+	str	r1, [r2, #0]
+	ldr	r2, .L1421
+	ldr	r2, [r2, #0]
+	strh	r3, [r2, fp]	@ movhi
+	ldrh	r3, [r4, #4]
+	cbz	r3, .L1405
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	cbnz	r3, .L1406
+.L1405:
+	ldr	r1, .L1421+12
+	movw	r2, #2700
+	ldr	r0, .L1421+16
+	bl	printf
+	ldr	r0, .L1421+20
+	ldr	r1, .L1421+24
+	bl	printf
+.L1406:
+	movs	r0, #0
+	add	sp, sp, #24
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L1422:
+	.align	2
+.L1421:
+	.word	.LANCHOR99
+	.word	.LANCHOR68
+	.word	.LANCHOR153
+	.word	.LANCHOR209
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.size	allocate_data_superblock, .-allocate_data_superblock
+	.section	.text.FtlSuperblockPowerLostFix,"ax",%progbits
+	.align	1
+	.global	FtlSuperblockPowerLostFix
+	.thumb
+	.thumb_func
+	.type	FtlSuperblockPowerLostFix, %function
+FtlSuperblockPowerLostFix:
+	@ args = 0, pretend = 0, frame = 40
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1430
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r4, r0
+	ldrb	r7, [r3, #0]	@ zero_extendqisi2
+	sub	sp, sp, #40
+	cbz	r7, .L1424
+	ldrb	r7, [r0, #8]	@ zero_extendqisi2
+	sub	r5, r7, #1
+	rsbs	r7, r5, #0
+	adc	r7, r7, r5
+.L1424:
+	mov	r8, #7
+	mov	r5, #-1
+	ldr	sl, .L1430+16
+	ldr	fp, .L1430+20
+	ldr	r6, .L1430+4
+	b	.L1425
+.L1428:
+	ldrh	r3, [r4, #4]
+	cbz	r3, .L1426
+	mov	r0, r4
+	bl	get_new_active_ppa
+	str	r0, [sp, #8]
+	adds	r0, r0, #1
+	beq	.L1426
+	ldr	r3, [sl, #0]
+	add	r0, sp, #4
+	ldr	r2, [fp, #0]
+	ldr	r1, [r6, #0]
+	str	r3, [sp, #12]
+	ldrh	r3, [r4, #0]
+	str	r2, [sp, #16]
+	str	r5, [sp, #20]
+	strh	r3, [r2, #2]	@ movhi
+	movs	r3, #0
+	str	r1, [r2, #4]
+	strh	r3, [r2, #0]	@ movhi
+	str	r5, [r2, #8]
+	str	r5, [r2, #12]
+	adds	r2, r1, #1
+	cmp	r2, #-1
+	it	eq
+	moveq	r2, r3
+	movs	r1, #1
+	str	r2, [r6, #0]
+	mov	r2, r7
+	bl	FlashProgPages
+	ldrh	r0, [r4, #0]
+	bl	decrement_vpc_count
+.L1425:
+	subs	r8, r8, #1
+	bne	.L1428
+.L1426:
+	ldr	r3, .L1430+8
+	ldrh	r2, [r4, #0]
+	ldrh	r1, [r4, #4]
+	ldr	r3, [r3, #0]
+	ldrh	r0, [r3, r2, lsl #1]
+	subs	r1, r0, r1
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	ldr	r3, .L1430+12
+	ldrh	r3, [r3, #0]
+	strh	r3, [r4, #2]	@ movhi
+	movs	r3, #0
+	strb	r3, [r4, #6]
+	strh	r3, [r4, #4]	@ movhi
+	add	sp, sp, #40
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L1431:
+	.align	2
+.L1430:
+	.word	.LANCHOR7
+	.word	.LANCHOR154
+	.word	.LANCHOR99
+	.word	.LANCHOR68
+	.word	.LANCHOR96
+	.word	.LANCHOR180
+	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
+	.section	.text.FtlLowFormatEraseBlock,"ax",%progbits
+	.align	1
+	.global	FtlLowFormatEraseBlock
+	.thumb
+	.thumb_func
+	.type	FtlLowFormatEraseBlock, %function
+FtlLowFormatEraseBlock:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1462
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	sub	sp, sp, #24
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	movs	r6, #0
+	str	r0, [sp, #12]
+	mov	r8, r1
+	mov	r4, r6
+	mov	r5, r6
+	str	r3, [sp, #8]
+	movs	r7, #36
+	ldr	r3, .L1462+4
+	ldr	sl, .L1462+24
+	str	r0, [r3, #0]
+	b	.L1433
+.L1437:
+	mul	r3, r7, r6
+	ldr	r1, .L1462+8
+	ldr	fp, [sl, #0]
+	movs	r0, #0
+	str	r0, [fp, r3]
+	ldrb	r0, [r1, r6]	@ zero_extendqisi2
+	ldr	r1, [sp, #12]
+	bl	V2P_block
+	str	r0, [sp, #4]
+	cmp	r8, #0
+	beq	.L1434
+	bl	IsBlkInVendorPart
+	cbnz	r0, .L1435
+.L1434:
+	ldr	r0, [sp, #4]
+	bl	FtlBbmIsBadBlock
+	cbnz	r0, .L1436
+	mul	r3, r7, r4
+	ldr	r2, [sl, #0]
+	ldr	ip, [sp, #4]
+	adds	r2, r2, r3
+	add	r3, fp, r3
+	lsl	r1, ip, #10
+	str	r0, [r3, #8]
+	ldr	r0, .L1462+12
+	str	r1, [r2, #4]
+	ldrh	r2, [r0, #0]
+	muls	r2, r4, r2
+	ldr	r0, .L1462+16
+	adds	r4, r4, #1
+	bic	r2, r2, #3
+	uxth	r4, r4
+	ldr	r1, [r0, #0]
+	adds	r2, r1, r2
+	str	r2, [r3, #12]
+	b	.L1435
+.L1436:
+	adds	r5, r5, #1
+	uxth	r5, r5
+.L1435:
+	adds	r6, r6, #1
+	uxth	r6, r6
+.L1433:
+	ldr	r1, .L1462+20
+	ldrh	r3, [r1, #0]
+	cmp	r3, r6
+	bhi	.L1437
+	cmp	r4, #0
+	beq	.L1439
+	ldr	r2, [sp, #8]
+	mov	sl, #0
+	ldr	r7, .L1462+24
+	mov	fp, sl
+	adds	r6, r2, #0
+	mov	r2, r4
+	it	ne
+	movne	r6, #1
+	ldr	r0, [r7, #0]
+	mov	r1, r6
+	bl	FlashEraseBlocks
+.L1441:
+	ldr	r3, [r7, #0]
+	add	r2, r3, sl
+	ldr	r3, [r3, sl]
+	adds	r3, r3, #1
+	bne	.L1440
+	ldr	r0, [r2, #4]
+	adds	r5, r5, #1
+	ubfx	r0, r0, #10, #16
+	uxth	r5, r5
+	bl	FtlBbmMapBadBlock
+.L1440:
+	add	fp, fp, #1
+	add	sl, sl, #36
+	uxth	fp, fp
+	cmp	fp, r4
+	bne	.L1441
+	cmp	r8, #0
+	beq	.L1455
+	ldr	r3, .L1462+28
+	ldrh	r3, [r3, #0]
+	str	r3, [sp, #8]
+	ldr	r3, .L1462
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbnz	r3, .L1456
+	ldr	ip, [sp, #8]
+	movs	r6, #1
+	lsr	ip, ip, #2
+	str	ip, [sp, #4]
+	b	.L1442
+.L1455:
+	mov	ip, #6
+	str	ip, [sp, #4]
+	mov	ip, #1
+	str	ip, [sp, #8]
+	b	.L1442
+.L1456:
+	movs	r6, #1
+	str	r6, [sp, #4]
+.L1442:
+	ldr	sl, .L1462+24
+	movs	r7, #0
+.L1450:
+	mov	fp, #0
+	mov	r4, fp
+	b	.L1443
+.L1446:
+	mov	ip, #36
+	ldr	r2, [sl, #0]
+	ldr	r1, .L1462+8
+	movs	r0, #0
+	mul	r3, ip, fp
+	str	r2, [sp, #16]
+	str	r0, [r2, r3]
+	ldrb	r0, [r1, fp]	@ zero_extendqisi2
+	ldr	r1, [sp, #12]
+	bl	V2P_block
+	str	r0, [sp, #20]
+	cmp	r8, #0
+	beq	.L1444
+	bl	IsBlkInVendorPart
+	cbnz	r0, .L1445
+.L1444:
+	ldr	r0, [sp, #20]
+	bl	FtlBbmIsBadBlock
+	cbnz	r0, .L1445
+	ldr	r2, [sp, #16]
+	mov	ip, #36
+	ldr	r1, [sp, #20]
+	ldr	r0, .L1462+32
+	mla	r3, ip, r4, r2
+	add	r2, r7, r1, lsl #10
+	ldr	r1, .L1462+12
+	str	r2, [r3, #4]
+	ldr	r2, [r0, #0]
+	ldr	r0, .L1462+36
+	str	r2, [r3, #8]
+	ldrh	r2, [r1, #0]
+	muls	r2, r4, r2
+	adds	r4, r4, #1
+	ldr	r1, [r0, #0]
+	bic	r2, r2, #3
+	uxth	r4, r4
+	adds	r2, r1, r2
+	str	r2, [r3, #12]
+.L1445:
+	add	fp, fp, #1
+	uxth	fp, fp
+.L1443:
+	ldr	r1, .L1462+20
+	ldrh	r3, [r1, #0]
+	cmp	r3, fp
+	bhi	.L1446
+	cmp	r4, #0
+	beq	.L1439
+	mov	r1, r4
+	mov	r2, r6
+	ldr	r0, [sl, #0]
+	movs	r3, #1
+	mov	fp, #0
+	bl	FlashProgPages
+	mov	ip, r8
+	mov	r8, r6
+	mov	r6, r4
+	mov	r4, fp
+.L1449:
+	ldr	r2, [sl, #0]
+	add	r1, r2, fp
+	ldr	r2, [r2, fp]
+	cbz	r2, .L1448
+	ldr	r0, [r1, #4]
+	adds	r5, r5, #1
+	str	ip, [sp, #0]
+	ubfx	r0, r0, #10, #16
+	uxth	r5, r5
+	bl	FtlBbmMapBadBlock
+	ldr	ip, [sp, #0]
+.L1448:
+	adds	r4, r4, #1
+	add	fp, fp, #36
+	uxth	r4, r4
+	cmp	r4, r6
+	bne	.L1449
+	mov	r4, r6
+	mov	r6, r8
+	mov	r8, ip
+	ldr	ip, [sp, #4]
+	add	r7, r7, ip
+	ldr	ip, [sp, #8]
+	uxth	r7, r7
+	cmp	r7, ip
+	bcc	.L1450
+	movs	r7, #0
+	ldr	fp, .L1462+24
+	mov	sl, r7
+.L1452:
+	cmp	r8, #0
+	beq	.L1451
+	ldr	r3, [fp, #0]
+	adds	r2, r3, r7
+	ldr	r3, [r3, r7]
+	cbnz	r3, .L1451
+	ldr	r0, [r2, #4]
+	movs	r1, #1
+	ubfx	r0, r0, #10, #16
+	bl	FtlFreeSysBlkQueueIn
+.L1451:
+	add	sl, sl, #1
+	adds	r7, r7, #36
+	uxth	sl, sl
+	cmp	sl, r4
+	bne	.L1452
+	ldr	r0, [sp, #12]
+	cmp	r0, #63
+	bls	.L1453
+	cmp	r8, #0
+	beq	.L1439
+.L1453:
+	ldr	r3, .L1462+24
+	mov	r1, r6
+	mov	r2, r4
+	ldr	r0, [r3, #0]
+	bl	FlashEraseBlocks
+.L1439:
+	mov	r0, r5
+	add	sp, sp, #24
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L1463:
+	.align	2
+.L1462:
+	.word	.LANCHOR7
+	.word	.LANCHOR88
+	.word	.LANCHOR62
+	.word	.LANCHOR74
+	.word	.LANCHOR181
+	.word	.LANCHOR53
+	.word	.LANCHOR93
+	.word	.LANCHOR69
+	.word	.LANCHOR178
+	.word	.LANCHOR179
+	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
+	.section	.text.FlashTestBlk,"ax",%progbits
+	.align	1
+	.global	FlashTestBlk
+	.thumb
+	.thumb_func
+	.type	FlashTestBlk, %function
+FlashTestBlk:
+	@ args = 0, pretend = 0, frame = 104
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1469
+	push	{r4, r5, lr}
+	mov	r4, r0
+	ldr	r3, [r3, #0]
+	sub	sp, sp, #108
+	cmp	r0, r3
+	bcc	.L1467
+.L1466:
+	ldr	r5, .L1469+4
+	add	r0, sp, #4
+	movs	r1, #165
+	movs	r2, #32
+	str	r0, [sp, #80]
+	lsls	r4, r4, #10
+	ldr	r3, [r5, #0]
+	str	r3, [sp, #76]
+	bl	memset
+	movs	r1, #90
+	movs	r2, #8
+	ldr	r0, [r5, #0]
+	bl	memset
+	movs	r1, #1
+	mov	r2, r1
+	add	r0, sp, #68
+	str	r4, [sp, #72]
+	bl	FlashEraseBlocks
+	movs	r1, #1
+	add	r0, sp, #68
+	mov	r2, r1
+	mov	r3, r1
+	bl	FlashProgPages
+	ldr	r4, [sp, #68]
+	add	r0, sp, #68
+	movs	r1, #0
+	movs	r2, #1
+	cmp	r4, #0
+	ite	ne
+	movne	r4, #-1
+	moveq	r4, #0
+	bl	FlashEraseBlocks
+	b	.L1465
+.L1467:
+	movs	r4, #0
+.L1465:
+	mov	r0, r4
+	add	sp, sp, #108
+	pop	{r4, r5, pc}
+.L1470:
+	.align	2
+.L1469:
+	.word	.LANCHOR46
+	.word	.LANCHOR41
+	.size	FlashTestBlk, .-FlashTestBlk
+	.section	.text.ftl_map_blk_gc,"ax",%progbits
+	.align	1
+	.global	ftl_map_blk_gc
+	.thumb
+	.thumb_func
+	.type	ftl_map_blk_gc, %function
+ftl_map_blk_gc:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r4, r0
+	ldr	r5, [r0, #12]
+	ldr	sl, [r0, #24]
+	bl	ftl_free_no_use_map_blk
+	ldrh	r3, [r4, #10]
+	ldrh	r2, [r4, #8]
+	subs	r3, r3, #4
+	cmp	r2, r3
+	blt	.L1472
+	uxth	r0, r0
+	ldrh	r7, [r5, r0, lsl #1]
+	cmp	r7, #0
+	beq	.L1472
+	ldr	r3, [r4, #32]
+	cmp	r3, #0
+	bne	.L1472
+	movs	r2, #1
+	str	r2, [r4, #32]
+	strh	r3, [r5, r0, lsl #1]	@ movhi
+	ldrh	r3, [r4, #8]
+	ldrh	r2, [r4, #2]
+	subs	r3, r3, #1
+	strh	r3, [r4, #8]	@ movhi
+	ldr	r3, .L1480
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	bcc	.L1473
+	mov	r0, r4
+	bl	ftl_map_blk_alloc_new_blk
+.L1473:
+	movs	r5, #0
+	ldr	r6, .L1480+4
+	ldr	fp, .L1480+28
+	mov	r8, r7
+	b	.L1474
+.L1478:
+	lsls	r3, r5, #2
+	str	r3, [sp, #4]
+	ldr	r3, [sl, r5, lsl #2]
+	cmp	r8, r3, lsr #10
+	bne	.L1475
+	ldr	r2, [fp, #0]
+	movs	r1, #1
+	ldr	r0, .L1480+4
+	str	r3, [r6, #4]
+	str	r2, [r6, #8]
+	ldr	r2, .L1480+8
+	ldr	r7, [r2, #0]
+	mov	r2, r1
+	str	r7, [r6, #12]
+	bl	FlashReadPages
+	ldrh	r3, [r7, #8]
+	cmp	r3, r5
+	beq	.L1476
+	ldr	r1, .L1480+12
+	movw	r2, #585
+	ldr	r0, .L1480+16
+	bl	printf
+	ldr	r0, .L1480+20
+	ldr	r1, .L1480+24
+	bl	printf
+.L1476:
+	ldr	r3, .L1480+4
+	ldr	r3, [r3, #0]
+	adds	r3, r3, #1
+	bne	.L1477
+	ldr	r2, [sp, #4]
+	movs	r3, #0
+	str	r3, [sl, r2]
+	b	.L1475
+.L1477:
+	mov	r0, r4
+	mov	r1, r5
+	ldr	r2, [r6, #8]
+	bl	FtlMapWritePage
+.L1475:
+	adds	r5, r5, #1
+	uxth	r5, r5
+.L1474:
+	ldrh	r3, [r4, #6]
+	cmp	r3, r5
+	bhi	.L1478
+	mov	r7, r8
+	mov	r0, r8
+	movs	r1, #1
+	bl	FtlFreeSysBlkQueueIn
+	movs	r3, #0
+	str	r3, [r4, #32]
+.L1472:
+	ldr	r3, .L1480
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	bcc	.L1479
+	mov	r0, r4
+	bl	ftl_map_blk_alloc_new_blk
+.L1479:
+	movs	r0, #0
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L1481:
+	.align	2
+.L1480:
+	.word	.LANCHOR69
+	.word	.LANCHOR197
+	.word	.LANCHOR180
+	.word	.LANCHOR210
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR176
+	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
+	.section	.text.Ftl_write_map_blk_to_last_page,"ax",%progbits
+	.align	1
+	.global	Ftl_write_map_blk_to_last_page
+	.thumb
+	.thumb_func
+	.type	Ftl_write_map_blk_to_last_page, %function
+Ftl_write_map_blk_to_last_page:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	movw	r2, #65535
+	ldrh	r3, [r0, #0]
+	mov	r4, r0
+	ldr	r5, [r0, #12]
+	cmp	r3, r2
+	ldr	r7, [r0, #24]
+	bne	.L1483
+	ldrh	r3, [r0, #8]
+	cbz	r3, .L1484
+	ldr	r1, .L1489
+	movw	r2, #613
+	ldr	r0, .L1489+4
+	bl	printf
+	ldr	r0, .L1489+8
+	ldr	r1, .L1489+12
+	bl	printf
+.L1484:
+	ldrh	r3, [r4, #8]
+	adds	r3, r3, #1
+	strh	r3, [r4, #8]	@ movhi
+	bl	FtlFreeSysBlkQueueOut
+	movs	r3, #0
+	strh	r0, [r5, #0]	@ movhi
+	strh	r3, [r4, #2]	@ movhi
+	strh	r3, [r4, #0]	@ movhi
+	ldr	r3, [r4, #28]
+	adds	r3, r3, #1
+	str	r3, [r4, #28]
+	b	.L1485
+.L1483:
+	ldrh	r5, [r5, r3, lsl #1]
+	movs	r1, #255
+	ldr	r2, .L1489+16
+	ldrh	r3, [r0, #2]
+	ldr	r6, .L1489+20
+	orr	r3, r3, r5, lsl #10
+	str	r3, [r2, #4]
+	ldr	r3, .L1489+24
+	ldr	r0, [r6, #0]
+	ldr	r3, [r3, #0]
+	str	r0, [r2, #8]
+	str	r3, [r2, #12]
+	ldr	r2, [r4, #28]
+	str	r2, [r3, #4]
+	movw	r2, #64245
+	strh	r2, [r3, #8]	@ movhi
+	ldrh	r2, [r4, #4]
+	strh	r5, [r3, #2]	@ movhi
+	strh	r2, [r3, #0]	@ movhi
+	ldr	r3, .L1489+28
+	ldrh	r2, [r3, #0]
+	lsls	r2, r2, #3
+	bl	memset
+	movs	r3, #0
+	ldrh	r0, [r4, #6]
+	mov	r2, r3
+	ldr	r1, [r6, #0]
+	b	.L1486
+.L1488:
+	ldr	r6, [r7], #4
+	cmp	r5, r6, lsr #10
+	bne	.L1487
+	adds	r2, r2, #1
+	uxth	r2, r2
+	str	r3, [r1, r2, lsl #3]
+	add	r6, r1, r2, lsl #3
+	ldr	lr, [r7, #-4]
+	str	lr, [r6, #4]
+.L1487:
+	adds	r3, r3, #1
+.L1486:
+	uxth	r6, r3
+	cmp	r6, r0
+	bcc	.L1488
+	movs	r1, #1
+	movs	r3, #0
+	ldr	r0, .L1489+16
+	mov	r2, r1
+	bl	FlashProgPages
+	ldrh	r3, [r4, #2]
+	mov	r0, r4
+	adds	r3, r3, #1
+	strh	r3, [r4, #2]	@ movhi
+	bl	ftl_map_blk_gc
+.L1485:
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, pc}
+.L1490:
+	.align	2
+.L1489:
+	.word	.LANCHOR211
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR197
+	.word	.LANCHOR96
+	.word	.LANCHOR180
+	.word	.LANCHOR69
+	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
+	.section	.text.FtlMapWritePage,"ax",%progbits
+	.align	1
+	.global	FtlMapWritePage
+	.thumb
+	.thumb_func
+	.type	FtlMapWritePage, %function
+FtlMapWritePage:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r4, r0
+	ldr	r7, .L1507
+	movs	r6, #0
+	ldr	r8, .L1507+32
+	ldr	r5, .L1507+4
+	ldr	fp, .L1507+36
+	stmia	sp, {r1, r2}
+.L1505:
+	ldr	r3, [r7, #0]
+	ldrh	r2, [r4, #2]
+	adds	r3, r3, #1
+	str	r3, [r7, #0]
+	ldrh	r3, [r8, #0]
+	subs	r3, r3, #1
+	cmp	r2, r3
+	bge	.L1493
+	ldrh	r3, [r4, #0]
+	movw	r1, #65535
+	cmp	r3, r1
+	bne	.L1494
+.L1493:
+	mov	r0, r4
+	bl	Ftl_write_map_blk_to_last_page
+.L1494:
+	ldrh	r2, [r4, #0]
+	ldr	r3, [r4, #12]
+	ldrh	r3, [r3, r2, lsl #1]
+	cbnz	r3, .L1495
+	ldr	r1, .L1507+8
+	movw	r2, #671
+	ldr	r0, .L1507+12
+	bl	printf
+	ldr	r0, .L1507+16
+	ldr	r1, .L1507+20
+	bl	printf
+.L1495:
+	ldrh	r2, [r4, #0]
+	ldrh	r3, [r4, #10]
+	cmp	r2, r3
+	bcc	.L1496
+	ldr	r1, .L1507+8
+	mov	r2, #672
+	ldr	r0, .L1507+12
+	bl	printf
+	ldr	r0, .L1507+16
+	ldr	r1, .L1507+20
+	bl	printf
+.L1496:
+	ldrh	r2, [r4, #0]
+	movs	r1, #0
+	ldr	r3, [r4, #12]
+	ldr	r0, [fp, #0]
+	ldrh	sl, [r3, r2, lsl #1]
+	ldr	r2, [sp, #4]
+	ldrh	r3, [r4, #2]
+	str	r0, [r5, #12]
+	str	r2, [r5, #8]
+	movs	r2, #16
+	orr	r3, r3, sl, lsl #10
+	str	r3, [r5, #4]
+	bl	memset
+	ldr	r3, [r5, #12]
+	ldr	r2, [r4, #28]
+	ldr	r1, [sp, #0]
+	ldr	r0, .L1507+4
+	str	r2, [r3, #4]
+	ldrh	r2, [r4, #4]
+	strh	r1, [r3, #8]	@ movhi
+	movs	r1, #1
+	strh	sl, [r3, #2]	@ movhi
+	strh	r2, [r3, #0]	@ movhi
+	mov	r2, r1
+	mov	r3, r1
+	bl	FlashProgPages
+	ldrh	r3, [r4, #2]
+	ldr	r2, [r5, #0]
+	adds	r3, r3, #1
+	adds	r2, r2, #1
+	uxth	r3, r3
+	strh	r3, [r4, #2]	@ movhi
+	bne	.L1497
+	ldr	r0, .L1507+24
+	adds	r6, r6, #1
+	ldr	r1, [r5, #4]
+	bl	printf
+	ldrh	r3, [r4, #2]
+	uxth	r6, r6
+	cmp	r3, #2
+	bhi	.L1498
+	ldrh	r3, [r8, #0]
+	subs	r3, r3, #1
+	strh	r3, [r4, #2]	@ movhi
+.L1498:
+	cmp	r6, #3
+	bls	.L1499
+	ldr	r3, .L1507+4
+	mov	r2, r6
+	ldr	r0, .L1507+28
+	ldr	r1, [r3, #4]
+	bl	printf
+.L1500:
+	b	.L1500
+.L1499:
+	ldr	r3, [r4, #32]
+	cmp	r3, #0
+	beq	.L1505
+.L1506:
+	b	.L1506
+.L1497:
+	cmp	r3, #1
+	beq	.L1505
+	ldr	r3, .L1507+4
+	movs	r0, #0
+	ldr	r1, [sp, #0]
+	ldr	r2, [r3, #4]
+	ldr	r3, [r4, #24]
+	str	r2, [r3, r1, lsl #2]
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L1508:
+	.align	2
+.L1507:
+	.word	.LANCHOR159
+	.word	.LANCHOR197
+	.word	.LANCHOR212
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LC30
+	.word	.LC31
+	.word	.LANCHOR69
+	.word	.LANCHOR180
+	.size	FtlMapWritePage, .-FtlMapWritePage
+	.section	.text.FtlMapBlkWriteDumpData,"ax",%progbits
+	.align	1
+	.global	FtlMapBlkWriteDumpData
+	.thumb
+	.thumb_func
+	.type	FtlMapBlkWriteDumpData, %function
+FtlMapBlkWriteDumpData:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, [r0, #36]
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r4, r0
+	ldrh	r6, [r0, #6]
+	ldr	r8, [r0, #24]
+	cmp	r3, #0
+	beq	.L1509
+	movs	r3, #0
+	str	r3, [r0, #36]
+	ldr	r3, .L1515
+	ldr	r5, .L1515+4
+	ldr	r3, [r3, #0]
+	str	r3, [r5, #8]
+	ldr	r3, .L1515+8
+	ldr	r7, [r3, #0]
+	ldrh	r3, [r0, #2]
+	str	r7, [r5, #12]
+	cbz	r3, .L1511
+	ldr	r2, .L1515+12
+	ldrh	r2, [r2, #0]
+	subs	r2, r2, #1
+	cmp	r3, r2
+	bge	.L1511
+	ldrh	r2, [r0, #0]
+	movw	r1, #65535
+	cmp	r2, r1
+	beq	.L1511
+	ldr	r1, [r0, #12]
+	subs	r3, r3, #1
+	mov	r0, r5
+	ldrh	r2, [r1, r2, lsl #1]
+	movs	r1, #1
+	orr	r3, r3, r2, lsl #10
+	mov	r2, r1
+	str	r3, [r5, #4]
+	bl	FlashReadPages
+	ldr	r3, [r5, #0]
+	adds	r3, r3, #1
+	beq	.L1511
+	ldr	r3, [r4, #24]
+	ldrh	r1, [r7, #8]
+	ldr	r2, [r3, r1, lsl #2]
+	ldr	r3, [r5, #4]
+	cmp	r2, r3
+	bne	.L1511
+	mov	r0, r4
+	b	.L1514
+.L1511:
+	subs	r6, r6, #1
+	ldr	r5, .L1515+4
+	uxth	r6, r6
+	ldr	r3, [r8, r6, lsl #2]
+	str	r3, [r5, #4]
+	cbz	r3, .L1512
+	movs	r1, #1
+	mov	r0, r5
+	mov	r2, r1
+	bl	FlashReadPages
+	b	.L1513
+.L1512:
+	ldr	r3, .L1515+16
+	movs	r1, #255
+	ldr	r0, [r5, #8]
+	ldrh	r2, [r3, #0]
+	bl	memset
+.L1513:
+	mov	r0, r4
+	mov	r1, r6
+.L1514:
+	ldr	r2, [r5, #8]
+	pop	{r4, r5, r6, r7, r8, lr}
+	b	FtlMapWritePage
+.L1509:
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1516:
+	.align	2
+.L1515:
+	.word	.LANCHOR176
+	.word	.LANCHOR197
+	.word	.LANCHOR180
+	.word	.LANCHOR69
+	.word	.LANCHOR73
+	.size	FtlMapBlkWriteDumpData, .-FtlMapBlkWriteDumpData
+	.section	.text.FtlVendorPartWrite,"ax",%progbits
+	.align	1
+	.global	FtlVendorPartWrite
+	.thumb
+	.thumb_func
+	.type	FtlVendorPartWrite, %function
+FtlVendorPartWrite:
+	@ args = 0, pretend = 0, frame = 56
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1527
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	sub	sp, sp, #56
+	ldrh	sl, [r3, #0]
+	mov	r6, r0
+	ldr	r3, .L1527+4
+	mov	r4, r1
+	str	r2, [sp, #8]
+	adds	r2, r1, r0
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	bhi	.L1525
+	lsr	sl, r0, sl
+	mov	fp, #0
+	ldr	r7, .L1527+8
+	lsl	r3, sl, #2
+	str	r3, [sp, #4]
+	b	.L1519
+.L1524:
+	ldr	r2, .L1527+12
+	mov	r0, r6
+	ldr	r3, [r2, #0]
+	ldr	r2, [sp, #4]
+	ldr	r3, [r3, r2]
+	ldr	r2, .L1527+16
+	ldrh	r8, [r2, #0]
+	str	r3, [sp, #0]
+	mov	r1, r8
+	bl	__aeabi_uidivmod
+	ldr	r3, [sp, #0]
+	uxth	r1, r1
+	str	r1, [sp, #12]
+	rsb	r5, r1, r8
+	uxth	r5, r5
+	cmp	r5, r4
+	it	hi
+	uxthhi	r5, r4
+	cbz	r3, .L1521
+	cmp	r5, r8
+	beq	.L1521
+	str	r3, [sp, #24]
+	movs	r1, #1
+	ldr	r3, [r7, #0]
+	add	r0, sp, #20
+	mov	r2, r1
+	str	r3, [sp, #28]
+	movs	r3, #0
+	str	r3, [sp, #32]
+	bl	FlashReadPages
+	b	.L1522
+.L1521:
+	ldr	r3, .L1527+20
+	movs	r1, #0
+	ldr	r0, [r7, #0]
+	ldrh	r2, [r3, #0]
+	bl	memset
+.L1522:
+	ldr	r3, [sp, #12]
+	lsl	r8, r5, #9
+	ldr	r0, [r7, #0]
+	mov	r2, r8
+	ldr	r1, [sp, #8]
+	subs	r4, r4, r5
+	add	r0, r0, r3, lsl #9
+	adds	r6, r6, r5
+	bl	memcpy
+	mov	r1, sl
+	ldr	r0, .L1527+24
+	add	sl, sl, #1
+	ldr	r2, [r7, #0]
+	bl	FtlMapWritePage
+	ldr	r3, [sp, #8]
+	add	r3, r3, r8
+	str	r3, [sp, #8]
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #4
+	str	r3, [sp, #4]
+	cmp	r0, #-1
+	it	eq
+	moveq	fp, #-1
+.L1519:
+	cmp	r4, #0
+	bne	.L1524
+	b	.L1518
+.L1525:
+	mov	fp, #-1
+.L1518:
+	mov	r0, fp
+	add	sp, sp, #56
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L1528:
+	.align	2
+.L1527:
+	.word	.LANCHOR72
+	.word	.LANCHOR65
+	.word	.LANCHOR177
+	.word	.LANCHOR186
+	.word	.LANCHOR71
+	.word	.LANCHOR73
+	.word	.LANCHOR213
+	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
+	.section	.text.Ftl_save_ext_data,"ax",%progbits
+	.align	1
+	.global	Ftl_save_ext_data
+	.thumb
+	.thumb_func
+	.type	Ftl_save_ext_data, %function
+Ftl_save_ext_data:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r2, .L1531
+	ldr	r3, .L1531+4
+	ldr	r1, [r2, #0]
+	cmp	r1, r3
+	bne	.L1529
+	ldr	r3, .L1531+8
+	movs	r0, #0
+	movs	r1, #1
+	str	r3, [r2, #4]
+	ldr	r3, .L1531+12
+	ldr	r3, [r3, #0]
+	str	r3, [r2, #88]
+	ldr	r3, .L1531+16
+	ldr	r3, [r3, #0]
+	str	r3, [r2, #92]
+	ldr	r3, .L1531+20
+	ldr	r3, [r3, #0]
+	str	r3, [r2, #8]
+	ldr	r3, .L1531+24
+	ldr	r3, [r3, #0]
+	str	r3, [r2, #12]
+	ldr	r3, .L1531+28
+	ldr	r3, [r3, #0]
+	str	r3, [r2, #16]
+	ldr	r3, .L1531+32
+	ldr	r3, [r3, #0]
+	str	r3, [r2, #20]
+	ldr	r3, .L1531+36
+	ldr	r3, [r3, #0]
+	str	r3, [r2, #28]
+	ldr	r3, .L1531+40
+	ldr	r3, [r3, #0]
+	str	r3, [r2, #32]
+	ldr	r3, .L1531+44
+	ldr	r3, [r3, #0]
+	str	r3, [r2, #36]
+	ldr	r3, .L1531+48
+	ldr	r3, [r3, #0]
+	str	r3, [r2, #40]
+	ldr	r3, .L1531+52
+	ldr	r3, [r3, #0]
+	str	r3, [r2, #44]
+	ldr	r3, .L1531+56
+	ldr	r3, [r3, #0]
+	str	r3, [r2, #48]
+	ldr	r3, .L1531+60
+	ldr	r3, [r3, #0]
+	str	r3, [r2, #60]
+	ldr	r3, .L1531+64
+	ldr	r3, [r3, #0]
+	str	r3, [r2, #64]
+	b	FtlVendorPartWrite
+.L1529:
+	bx	lr
+.L1532:
+	.align	2
+.L1531:
+	.word	.LANCHOR141
+	.word	1179929683
+	.word	1342177344
+	.word	.LANCHOR193
+	.word	.LANCHOR194
+	.word	.LANCHOR155
+	.word	.LANCHOR156
+	.word	.LANCHOR160
+	.word	.LANCHOR159
+	.word	.LANCHOR162
+	.word	.LANCHOR95
+	.word	.LANCHOR157
+	.word	.LANCHOR158
+	.word	.LANCHOR163
+	.word	.LANCHOR164
+	.word	.LANCHOR152
+	.word	.LANCHOR151
+	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
+	.section	.text.FtlEctTblFlush,"ax",%progbits
+	.align	1
+	.global	FtlEctTblFlush
+	.thumb
+	.thumb_func
+	.type	FtlEctTblFlush, %function
+FtlEctTblFlush:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	ldr	r3, .L1540
+	ldr	r3, [r3, #0]
+	cbz	r3, .L1538
+	ldr	r3, .L1540+4
+	ldr	r3, [r3, #0]
+	cmp	r3, #29
+	ite	ls
+	movls	r3, #4
+	movhi	r3, #32
+	b	.L1534
+.L1538:
+	movs	r3, #32
+.L1534:
+	ldr	r2, .L1540+8
+	ldrh	r1, [r2, #0]
+	cmp	r1, #31
+	bhi	.L1535
+	movs	r3, #1
+	adds	r1, r1, #1
+	strh	r1, [r2, #0]	@ movhi
+.L1535:
+	ldr	r2, .L1540+12
+	cbnz	r0, .L1536
+	ldr	r1, [r2, #0]
+	ldr	r0, [r1, #20]
+	ldr	r1, [r1, #16]
+	adds	r3, r3, r0
+	cmp	r1, r3
+	bcc	.L1537
+.L1536:
+	ldr	r2, [r2, #0]
+	movs	r0, #64
+	ldr	r3, [r2, #16]
+	str	r3, [r2, #20]
+	ldr	r3, .L1540+16
+	str	r3, [r2, #0]
+	ldr	r3, .L1540+20
+	ldrh	r1, [r3, #0]
+	lsls	r3, r1, #9
+	str	r3, [r2, #12]
+	ldr	r3, [r2, #8]
+	adds	r3, r3, #1
+	str	r3, [r2, #8]
+	movs	r3, #0
+	str	r3, [r2, #4]
+	bl	FtlVendorPartWrite
+	bl	Ftl_save_ext_data
+.L1537:
+	movs	r0, #0
+	pop	{r3, pc}
+.L1541:
+	.align	2
+.L1540:
+	.word	.LANCHOR126
+	.word	.LANCHOR164
+	.word	.LANCHOR214
+	.word	.LANCHOR183
+	.word	1112818501
+	.word	.LANCHOR182
+	.size	FtlEctTblFlush, .-FtlEctTblFlush
+	.section	.text.flush_l2p_region,"ax",%progbits
+	.align	1
+	.global	flush_l2p_region
+	.thumb
+	.thumb_func
+	.type	flush_l2p_region, %function
+flush_l2p_region:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	movs	r4, #12
+	muls	r4, r0, r4
+	ldr	r5, .L1543
+	ldr	r0, .L1543+4
+	ldr	r2, [r5, #0]
+	adds	r3, r2, r4
+	ldrh	r1, [r2, r4]
+	ldr	r2, [r3, #8]
+	bl	FtlMapWritePage
+	ldr	r3, [r5, #0]
+	movs	r0, #0
+	adds	r4, r3, r4
+	ldr	r3, [r4, #4]
+	bic	r3, r3, #-2147483648
+	str	r3, [r4, #4]
+	pop	{r3, r4, r5, pc}
+.L1544:
+	.align	2
+.L1543:
+	.word	.LANCHOR112
+	.word	.LANCHOR120
+	.size	flush_l2p_region, .-flush_l2p_region
+	.section	.text.log2phys,"ax",%progbits
+	.align	1
+	.global	log2phys
+	.thumb
+	.thumb_func
+	.type	log2phys, %function
+log2phys:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1555
+	push	{r4, r5, r6, r7, r8, lr}
+	movs	r5, #1
+	ldrh	r3, [r3, #0]
+	mov	r6, r1
+	mov	r7, r2
+	adds	r3, r3, #7
+	lsr	r4, r0, r3
+	lsl	r5, r5, r3
+	ldr	r3, .L1555+4
+	subs	r5, r5, #1
+	ands	r5, r5, r0
+	uxth	r4, r4
+	ldr	r3, [r3, #0]
+	uxth	r5, r5
+	cmp	r0, r3
+	bcc	.L1546
+	ldr	r1, .L1555+8
+	movw	r2, #781
+	ldr	r0, .L1555+12
+	bl	printf
+	ldr	r0, .L1555+16
+	ldr	r1, .L1555+20
+	bl	printf
+.L1546:
+	ldr	r3, .L1555+24
+	ldrh	r1, [r3, #0]
+	ldr	r3, .L1555+28
+	ldr	r2, [r3, #0]
+	movs	r3, #0
+	mov	r8, r3
+	b	.L1547
+.L1553:
+	adds	r3, r3, #12
+	adds	r0, r2, r3
+	ldrh	r0, [r0, #-12]
+	cmp	r0, r4
+	bne	.L1548
+.L1549:
+	ldr	r2, .L1555+28
+	movs	r3, #12
+	ldr	r2, [r2, #0]
+	mla	r3, r3, r8, r2
+	cbnz	r7, .L1550
+	ldr	r3, [r3, #8]
+	ldr	r3, [r3, r5, lsl #2]
+	str	r3, [r6, #0]
+	b	.L1551
+.L1550:
+	ldr	r1, [r6, #0]
+	ldr	r2, [r3, #8]
+	str	r1, [r2, r5, lsl #2]
+	ldr	r2, [r3, #4]
+	orr	r2, r2, #-2147483648
+	str	r2, [r3, #4]
+	ldr	r3, .L1555+32
+	strh	r4, [r3, #0]	@ movhi
+.L1551:
+	ldr	r3, .L1555+28
+	movs	r2, #12
+	ldr	r3, [r3, #0]
+	mla	r3, r2, r8, r3
+	ldr	r2, [r3, #4]
+	adds	r1, r2, #1
+	beq	.L1552
+	adds	r2, r2, #1
+	str	r2, [r3, #4]
+.L1552:
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1548:
+	add	r8, r8, #1
+	uxth	r8, r8
+.L1547:
+	cmp	r8, r1
+	bne	.L1553
+	bl	select_l2p_ram_region
+	movs	r3, #12
+	ldr	r2, .L1555+28
+	ldr	r2, [r2, #0]
+	mul	r3, r3, r0
+	mov	r8, r0
+	adds	r1, r2, r3
+	ldrh	r2, [r2, r3]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L1554
+	ldr	r3, [r1, #4]
+	cmp	r3, #0
+	bge	.L1554
+	bl	flush_l2p_region
+.L1554:
+	mov	r0, r4
+	mov	r1, r8
+	bl	load_l2p_region
+	b	.L1549
+.L1556:
+	.align	2
+.L1555:
+	.word	.LANCHOR72
+	.word	.LANCHOR87
+	.word	.LANCHOR215
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR83
+	.word	.LANCHOR112
+	.word	.LANCHOR113
+	.size	log2phys, .-log2phys
+	.section	.text.FtlReUsePrevPpa,"ax",%progbits
+	.align	1
+	.global	FtlReUsePrevPpa
+	.thumb
+	.thumb_func
+	.type	FtlReUsePrevPpa, %function
+FtlReUsePrevPpa:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r4, r5, r6, r7, lr}
+	mov	r6, r0
+	ubfx	r0, r1, #10, #16
+	str	r1, [sp, #4]
+	bl	P2V_block_in_plane
+	ldr	r3, .L1564
+	ldr	r3, [r3, #0]
+	ldrh	r2, [r3, r0, lsl #1]
+	mov	r4, r0
+	cmp	r2, #0
+	bne	.L1558
+	ldr	r3, .L1564+4
+	ldr	r3, [r3, #0]
+	cmp	r3, #0
+	beq	.L1559
+	ldr	r1, .L1564+8
+	movs	r5, #6
+	ldr	r0, .L1564+12
+	ldrh	r7, [r1, #0]
+	ldr	r1, .L1564+16
+	ldr	r1, [r1, #0]
+	subs	r3, r3, r1
+	asrs	r3, r3, #1
+	muls	r3, r0, r3
+	movw	r0, #65535
+	uxth	r3, r3
+	b	.L1560
+.L1563:
+	cmp	r3, r4
+	bne	.L1561
+	ldr	r5, .L1564+8
+	mov	r1, r4
+	ldr	r0, .L1564+4
+	bl	List_remove_node
+	ldrh	r3, [r5, #0]
+	cbnz	r3, .L1562
+	ldr	r1, .L1564+20
+	movw	r2, #1677
+	ldr	r0, .L1564+24
+	bl	printf
+	ldr	r0, .L1564+28
+	ldr	r1, .L1564+32
+	bl	printf
+.L1562:
+	ldrh	r3, [r5, #0]
+	mov	r0, r4
+	subs	r3, r3, #1
+	strh	r3, [r5, #0]	@ movhi
+	bl	INSERT_DATA_LIST
+	ldr	r3, .L1564
+	ldr	r3, [r3, #0]
+	ldrh	r2, [r3, r4, lsl #1]
+	b	.L1558
+.L1561:
+	muls	r3, r5, r3
+	ldrh	r3, [r1, r3]
+	cmp	r3, r0
+	beq	.L1559
+	adds	r2, r2, #1
+	uxth	r2, r2
+.L1560:
+	cmp	r2, r7
+	bne	.L1563
+	b	.L1559
+.L1558:
+	adds	r2, r2, #1
+	strh	r2, [r3, r4, lsl #1]	@ movhi
+.L1559:
+	mov	r0, r6
+	add	r1, sp, #4
+	movs	r2, #1
+	bl	log2phys
+	pop	{r1, r2, r3, r4, r5, r6, r7, pc}
+.L1565:
+	.align	2
+.L1564:
+	.word	.LANCHOR99
+	.word	.LANCHOR103
+	.word	.LANCHOR104
+	.word	-1431655765
+	.word	.LANCHOR97
+	.word	.LANCHOR216
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
+	.section	.text.l2p_flush,"ax",%progbits
+	.align	1
+	.global	l2p_flush
+	.thumb
+	.thumb_func
+	.type	l2p_flush, %function
+l2p_flush:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	movs	r4, #0
+	ldr	r7, .L1570
+	movs	r5, #12
+	ldr	r6, .L1570+4
+	b	.L1567
+.L1569:
+	ldr	r3, [r6, #0]
+	mla	r3, r5, r4, r3
+	ldr	r3, [r3, #4]
+	cmp	r3, #0
+	bge	.L1568
+	mov	r0, r4
+	bl	flush_l2p_region
+.L1568:
+	adds	r4, r4, #1
+	uxth	r4, r4
+.L1567:
+	ldrh	r3, [r7, #0]
+	cmp	r3, r4
+	bhi	.L1569
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, pc}
+.L1571:
+	.align	2
+.L1570:
+	.word	.LANCHOR83
+	.word	.LANCHOR112
+	.size	l2p_flush, .-l2p_flush
+	.section	.text.allocate_new_data_superblock,"ax",%progbits
+	.align	1
+	.global	allocate_new_data_superblock
+	.thumb
+	.thumb_func
+	.type	allocate_new_data_superblock, %function
+allocate_new_data_superblock:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1584
+	push	{r4, r5, r6, lr}
+	mov	r4, r0
+	ldrh	r5, [r0, #0]
+	ldrh	r3, [r3, #0]
+	cmp	r3, r5
+	bhi	.L1573
+	ldr	r1, .L1584+4
+	movw	r2, #2707
+	ldr	r0, .L1584+8
+	bl	printf
+	ldr	r0, .L1584+12
+	ldr	r1, .L1584+16
+	bl	printf
+.L1573:
+	movw	r3, #65535
+	cmp	r5, r3
+	beq	.L1574
+	ldr	r3, .L1584+20
+	mov	r0, r5
+	ldr	r3, [r3, #0]
+	ldrh	r3, [r3, r5, lsl #1]
+	cbz	r3, .L1575
+	bl	INSERT_DATA_LIST
+	b	.L1574
+.L1575:
+	bl	INSERT_FREE_LIST
+.L1574:
+	movs	r3, #0
+	strb	r3, [r4, #8]
+	ldr	r3, .L1584+24
+	cmp	r4, r3
+	beq	.L1576
+	ldr	r3, .L1584+28
+	ldrh	r3, [r3, #0]
+	cmp	r3, #1
+	beq	.L1576
+	ldr	r2, .L1584+32
+	ldrb	r2, [r2, #0]	@ zero_extendqisi2
+	cbz	r2, .L1577
+.L1576:
+	movs	r3, #1
+	strb	r3, [r4, #8]
+	b	.L1578
+.L1577:
+	ldr	r2, .L1584+36
+	cmp	r4, r2
+	bne	.L1578
+	cmp	r3, #3
+	beq	.L1579
+	ldr	r3, .L1584+40
+	ldr	r3, [r3, #0]
+	cmp	r3, #1
+	bne	.L1580
+.L1579:
+	movs	r3, #1
+	strb	r3, [r2, #8]
+.L1580:
+	ldr	r3, .L1584+44
+	ldr	r3, [r3, #0]
+	cbz	r3, .L1578
+	ldr	r3, .L1584+48
+	ldr	r3, [r3, #0]
+	cmp	r3, #29
+	bhi	.L1578
+	ldr	r3, .L1584+36
+	movs	r2, #1
+	strb	r2, [r3, #8]
+.L1578:
+	ldr	r6, .L1584+52
+	movw	r3, #65535
+	ldrh	r0, [r6, #0]
+	cmp	r0, r3
+	beq	.L1581
+	cmp	r5, r0
+	bne	.L1582
+	ldr	r3, .L1584+20
+	ldr	r3, [r3, #0]
+	ldrh	r3, [r3, r0, lsl #1]
+	cbz	r3, .L1583
+.L1582:
+	bl	update_vpc_list
+.L1583:
+	movw	r3, #65535
+	strh	r3, [r6, #0]	@ movhi
+.L1581:
+	mov	r0, r4
+	bl	allocate_data_superblock
+	bl	l2p_flush
+	movs	r0, #0
+	bl	FtlEctTblFlush
+	bl	FtlVpcTblFlush
+	movs	r0, #0
+	pop	{r4, r5, r6, pc}
+.L1585:
+	.align	2
+.L1584:
+	.word	.LANCHOR55
+	.word	.LANCHOR217
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR99
+	.word	.LANCHOR108
+	.word	.LANCHOR59
+	.word	.LANCHOR7
+	.word	.LANCHOR107
+	.word	.LANCHOR152
+	.word	.LANCHOR126
+	.word	.LANCHOR164
+	.word	.LANCHOR135
+	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
+	.section	.text.FtlProgPages,"ax",%progbits
+	.align	1
+	.global	FtlProgPages
+	.thumb
+	.thumb_func
+	.type	FtlProgPages, %function
+FtlProgPages:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r4, r3
+	ldr	r3, .L1602
+	mov	r5, r0
+	str	r1, [sp, #4]
+	ldrb	r7, [r3, #0]	@ zero_extendqisi2
+	cbz	r7, .L1587
+	ldrb	r7, [r4, #8]	@ zero_extendqisi2
+	sub	r2, r7, #1
+	rsbs	r7, r2, #0
+	adc	r7, r7, r2
+.L1587:
+	mov	r0, r5
+	ldr	r1, [sp, #4]
+	mov	r2, r7
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	bl	FlashProgPages
+	mov	sl, #0
+	ldr	r6, .L1602+4
+	ldr	fp, .L1602+36
+	b	.L1588
+.L1591:
+	ldr	r0, [r5, #4]
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	ldrh	r3, [r4, #0]
+	cmp	r3, r0
+	bne	.L1589
+	ldr	r2, [r6, #0]
+	ldrh	r1, [r4, #4]
+	ldrh	r0, [r2, r3, lsl #1]
+	subs	r1, r0, r1
+	strh	r1, [r2, r3, lsl #1]	@ movhi
+	ldr	r2, .L1602+8
+	strb	r8, [r4, #6]
+	strh	r8, [r4, #4]	@ movhi
+	ldrh	r3, [r2, #0]
+	strh	r3, [r4, #2]	@ movhi
+.L1589:
+	ldrh	r3, [r4, #4]
+	cbnz	r3, .L1590
+	mov	r0, r4
+	bl	allocate_new_data_superblock
+.L1590:
+	ldr	r0, [r5, #4]
+	ldr	r3, [fp, #96]
+	ubfx	r0, r0, #10, #16
+	adds	r3, r3, #1
+	str	r3, [fp, #96]
+	bl	FtlGcMarkBadPhyBlk
+	mov	r0, r4
+	bl	get_new_active_ppa
+	movs	r1, #1
+	mov	r2, r7
+	str	r0, [r5, #4]
+	str	r0, [sp, #12]
+	mov	r0, r5
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	bl	FlashProgPages
+	b	.L1600
+.L1601:
+	mov	r8, #0
+.L1600:
+	ldr	r3, [r5, #0]
+	adds	r3, r3, #1
+	beq	.L1591
+	ldr	r3, .L1602+12
+	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	bcc	.L1592
+	ldr	r1, .L1602+16
+	mov	r2, #1464
+	ldr	r0, .L1602+20
+	bl	printf
+	ldr	r0, .L1602+24
+	ldr	r1, .L1602+28
+	bl	printf
+.L1592:
+	ldr	r3, [r5, #4]
+	str	r3, [sp, #12]
+	cbz	r7, .L1593
+	orr	r3, r3, #-2147483648
+	str	r3, [sp, #12]
+.L1593:
+	movs	r2, #1
+	ldr	r0, [r5, #16]
+	add	r1, sp, #12
+	bl	log2phys
+	ldr	r3, [r5, #12]
+	ldr	r0, [r3, #12]
+	adds	r3, r0, #1
+	beq	.L1594
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	ldr	r3, [r6, #0]
+	ldrh	r2, [r3, r0, lsl #1]
+	mov	r8, r0
+	cbnz	r2, .L1595
+	ldr	r0, .L1602+32
+	mov	r1, r8
+	bl	printf
+.L1595:
+	mov	r0, r8
+	bl	decrement_vpc_count
+.L1594:
+	add	sl, sl, #1
+	adds	r5, r5, #36
+.L1588:
+	ldr	r3, [sp, #4]
+	cmp	sl, r3
+	bne	.L1601
+	ldr	r3, .L1602+12
+	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	bcc	.L1586
+	ldr	r1, .L1602+16
+	movw	r2, #1481
+	ldr	r0, .L1602+20
+	bl	printf
+	ldr	r0, .L1602+24
+	ldr	r1, .L1602+28
+	bl	printf
+.L1586:
+	pop	{r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L1603:
+	.align	2
+.L1602:
+	.word	.LANCHOR7
+	.word	.LANCHOR99
+	.word	.LANCHOR68
+	.word	.LANCHOR53
+	.word	.LANCHOR218
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LC32
+	.word	.LANCHOR141
+	.size	FtlProgPages, .-FtlProgPages
+	.section	.text.FtlCacheWriteBack,"ax",%progbits
+	.align	1
+	.global	FtlCacheWriteBack
+	.thumb
+	.thumb_func
+	.type	FtlCacheWriteBack, %function
+FtlCacheWriteBack:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, lr}
+	ldr	r4, .L1606
+	ldr	r0, [r4, #0]
+	cbz	r0, .L1605
+	ldr	r3, .L1606+4
+	movs	r1, #1
+	movs	r2, #0
+	ldr	r3, [r3, #0]
+	bl	FtlProgPages
+	movs	r3, #0
+	str	r3, [r4, #0]
+.L1605:
+	movs	r0, #0
+	pop	{r4, pc}
+.L1607:
+	.align	2
+.L1606:
+	.word	.LANCHOR134
+	.word	.LANCHOR219
+	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
+	.section	.text.FtlGcFreeTempBlock,"ax",%progbits
+	.align	1
+	.global	FtlGcFreeTempBlock
+	.thumb
+	.thumb_func
+	.type	FtlGcFreeTempBlock, %function
+FtlGcFreeTempBlock:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	ldr	r0, .L1624
+	ldr	r3, .L1624+4
+	ldrh	r4, [r0, #0]
+	ldrh	r1, [r3, #0]
+	movw	r3, #65535
+	cmp	r4, r3
+	beq	.L1609
+	bl	FtlGcScanTempBlk
+	str	r0, [sp, #4]
+	adds	r0, r0, #1
+	beq	.L1609
+	ldr	r3, .L1624+8
+	ldr	r3, [r3, #0]
+	ldrh	r2, [r3, r4, lsl #1]
+	cmp	r2, #4
+	bls	.L1610
+	subs	r2, r2, #5
+	movs	r0, #1
+	strh	r2, [r3, r4, lsl #1]	@ movhi
+	bl	FtlEctTblFlush
+.L1610:
+	ldr	r3, .L1624+12
+	ldr	r3, [r3, #0]
+	cbnz	r3, .L1611
+	ldr	r3, .L1624+16
+	ldr	r0, [sp, #4]
+	ldr	r2, [r3, #96]
+	ubfx	r0, r0, #10, #16
+	adds	r2, r2, #1
+	str	r2, [r3, #96]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+.L1611:
+	ldr	r3, .L1624+12
+	movs	r2, #0
+	movs	r4, #1
+	str	r2, [r3, #0]
+	b	.L1612
+.L1609:
+	ldr	r5, .L1624
+	movs	r4, #0
+	ldr	r3, .L1624+12
+	ldrh	r2, [r5, #0]
+	str	r4, [r3, #0]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L1612
+	bl	FtlCacheWriteBack
+	ldr	r3, .L1624+20
+	ldr	r1, .L1624+4
+	ldrh	r2, [r3, #0]
+	ldrh	r1, [r1, #0]
+	ldrb	r3, [r5, #7]	@ zero_extendqisi2
+	muls	r3, r1, r3
+	cmp	r2, r3
+	beq	.L1613
+	ldr	r1, .L1624+24
+	movs	r2, #161
+	ldr	r0, .L1624+28
+	bl	printf
+	ldr	r0, .L1624+32
+	ldr	r1, .L1624+36
+	bl	printf
+.L1613:
+	ldr	r3, .L1624
+	movs	r5, #0
+	ldr	r2, .L1624+40
+	ldr	r4, .L1624+4
+	ldrh	r1, [r3, #0]
+	ldr	r2, [r2, #0]
+	ldrh	r4, [r4, #0]
+	ldrb	r0, [r3, #7]	@ zero_extendqisi2
+	muls	r0, r4, r0
+	strh	r0, [r2, r1, lsl #1]	@ movhi
+	ldr	r1, .L1624+44
+	ldr	r2, .L1624+20
+	ldr	fp, .L1624+68
+	ldr	r0, [r1, #0]
+	mov	sl, r2
+	ldrh	r4, [r2, #0]
+	ldr	r8, .L1624+72
+	adds	r0, r4, r0
+	str	r0, [r1, #0]
+	b	.L1614
+.L1618:
+	ldr	r7, [fp, #0]
+	movs	r6, #12
+	muls	r6, r5, r6
+	ldr	r3, [r8, #0]
+	adds	r4, r7, r6
+	ldr	r2, [r4, #8]
+	cmp	r2, r3
+	bcc	.L1615
+	ldr	r1, .L1624+24
+	movs	r2, #166
+	ldr	r0, .L1624+28
+	bl	printf
+	ldr	r0, .L1624+32
+	ldr	r1, .L1624+36
+	bl	printf
+.L1615:
+	movs	r2, #0
+	ldr	r0, [r4, #8]
+	add	r1, sp, #4
+	bl	log2phys
+	ldr	r0, [sp, #4]
+	ldr	r3, [r7, r6]
+	cmp	r0, r3
+	bne	.L1616
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	adds	r1, r4, #4
+	movs	r2, #1
+	mov	r6, r0
+	ldr	r0, [r4, #8]
+	bl	log2phys
+	mov	r0, r6
+	b	.L1623
+.L1616:
+	ldr	r3, [r4, #4]
+	cmp	r0, r3
+	beq	.L1617
+	ldr	r3, .L1624
+	ldrh	r0, [r3, #0]
+.L1623:
+	bl	decrement_vpc_count
+.L1617:
+	adds	r5, r5, #1
+	uxth	r5, r5
+.L1614:
+	ldrh	r3, [sl, #0]
+	cmp	r3, r5
+	bhi	.L1618
+	movw	r0, #65535
+	ldr	r4, .L1624
+	bl	decrement_vpc_count
+	ldr	r3, .L1624+40
+	ldrh	r0, [r4, #0]
+	ldr	r3, [r3, #0]
+	ldrh	r3, [r3, r0, lsl #1]
+	cbz	r3, .L1619
+	bl	INSERT_DATA_LIST
+	b	.L1620
+.L1619:
+	bl	INSERT_FREE_LIST
+.L1620:
+	ldr	r3, .L1624+20
+	movw	r5, #65535
+	strh	r5, [r4, #0]	@ movhi
+	movs	r4, #0
+	strh	r4, [r3, #0]	@ movhi
+	ldr	r3, .L1624+48
+	strh	r4, [r3, #0]	@ movhi
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	ldr	r3, .L1624+52
+	ldr	r2, .L1624+56
+	movs	r1, #3
+	ldrh	r3, [r3, #0]
+	ldrh	r2, [r2, #0]
+	muls	r2, r1, r2
+	cmp	r3, r2, lsr #2
+	ble	.L1612
+	ldr	r3, .L1624+60
+	movs	r2, #20
+	strh	r5, [r3, #0]	@ movhi
+	ldr	r3, .L1624+64
+	strh	r2, [r3, #0]	@ movhi
+.L1612:
+	mov	r0, r4
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L1625:
+	.align	2
+.L1624:
+	.word	.LANCHOR109
+	.word	.LANCHOR68
+	.word	.LANCHOR94
+	.word	.LANCHOR137
+	.word	.LANCHOR141
+	.word	.LANCHOR144
+	.word	.LANCHOR220
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR99
+	.word	.LANCHOR155
+	.word	.LANCHOR142
+	.word	.LANCHOR104
+	.word	.LANCHOR200
+	.word	.LANCHOR201
+	.word	.LANCHOR170
+	.word	.LANCHOR145
+	.word	.LANCHOR87
+	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
+	.section	.text.Ftl_gc_temp_data_write_back,"ax",%progbits
+	.align	1
+	.global	Ftl_gc_temp_data_write_back
+	.thumb
+	.thumb_func
+	.type	Ftl_gc_temp_data_write_back, %function
+Ftl_gc_temp_data_write_back:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	ldr	r3, .L1635
+	ldrb	r2, [r3, #0]	@ zero_extendqisi2
+	ldr	r3, .L1635+4
+	cbz	r2, .L1627
+	ldr	r2, [r3, #0]
+	lsls	r2, r2, #31
+	bpl	.L1627
+	ldr	r2, .L1635+8
+	ldrh	r2, [r2, #4]
+	cmp	r2, #0
+	bne	.L1632
+.L1627:
+	ldr	r4, .L1635+12
+	movs	r2, #0
+	ldr	r1, [r3, #0]
+	mov	r3, r2
+	movs	r5, #0
+	ldr	r7, .L1635+4
+	ldr	r0, [r4, #0]
+	movs	r6, #36
+	bl	FlashProgPages
+	b	.L1629
+.L1631:
+	mul	r3, r6, r5
+	ldr	r1, [r4, #0]
+	adds	r2, r1, r3
+	ldr	r1, [r1, r3]
+	adds	r0, r1, #1
+	bne	.L1630
+	ldr	r3, .L1635+8
+	movs	r5, #0
+	ldr	r0, .L1635+16
+	ldrh	r4, [r3, #0]
+	ldr	r0, [r0, #0]
+	strh	r5, [r0, r4, lsl #1]	@ movhi
+	strh	r1, [r3, #0]	@ movhi
+	ldr	r3, .L1635+20
+	ldr	r0, [r2, #4]
+	ldr	r1, [r3, #96]
+	ubfx	r0, r0, #10, #16
+	adds	r1, r1, #1
+	str	r1, [r3, #96]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	bl	FtlGcPageVarInit
+	b	.L1634
+.L1630:
+	ldr	r3, [r2, #12]
+	adds	r5, r5, #1
+	ldr	r1, [r2, #4]
+	uxth	r5, r5
+	ldr	r0, [r3, #12]
+	ldr	r2, [r3, #8]
+	bl	FtlGcUpdatePage
+.L1629:
+	ldr	r1, [r7, #0]
+	cmp	r5, r1
+	bcc	.L1631
+	ldr	r3, .L1635+12
+	ldr	r0, [r3, #0]
+	bl	FtlGcBufFree
+	ldr	r3, .L1635+4
+	movs	r0, #0
+	str	r0, [r3, #0]
+	ldr	r3, .L1635+8
+	ldrh	r3, [r3, #4]
+	cbnz	r3, .L1628
+	movs	r0, #1
+	bl	FtlGcFreeTempBlock
+.L1634:
+	movs	r0, #1
+	pop	{r3, r4, r5, r6, r7, pc}
+.L1632:
+	movs	r0, #0
+.L1628:
+	pop	{r3, r4, r5, r6, r7, pc}
+.L1636:
+	.align	2
+.L1635:
+	.word	.LANCHOR7
+	.word	.LANCHOR128
+	.word	.LANCHOR109
+	.word	.LANCHOR174
+	.word	.LANCHOR99
+	.word	.LANCHOR141
+	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
+	.section	.text.FtlGcPageRecovery,"ax",%progbits
+	.align	1
+	.global	FtlGcPageRecovery
+	.thumb
+	.thumb_func
+	.type	FtlGcPageRecovery, %function
+FtlGcPageRecovery:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	ldr	r4, .L1639
+	ldr	r5, .L1639+4
+	ldrh	r1, [r4, #0]
+	mov	r0, r5
+	bl	FtlGcScanTempBlk
+	ldrh	r2, [r5, #2]
+	ldrh	r3, [r4, #0]
+	cmp	r2, r3
+	bcc	.L1637
+	ldr	r0, .L1639+8
+	bl	FtlMapBlkWriteDumpData
+	movs	r0, #0
+	bl	FtlGcFreeTempBlock
+	ldr	r3, .L1639+12
+	movs	r2, #0
+	str	r2, [r3, #0]
+.L1637:
+	pop	{r3, r4, r5, pc}
+.L1640:
+	.align	2
+.L1639:
+	.word	.LANCHOR68
+	.word	.LANCHOR109
+	.word	.LANCHOR120
+	.word	.LANCHOR137
+	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
+	.section	.text.Ftl_get_new_temp_ppa,"ax",%progbits
+	.align	1
+	.global	Ftl_get_new_temp_ppa
+	.thumb
+	.thumb_func
+	.type	Ftl_get_new_temp_ppa, %function
+Ftl_get_new_temp_ppa:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	movw	r3, #65535
+	ldr	r5, .L1644
+	ldrh	r2, [r5, #0]
+	cmp	r2, r3
+	beq	.L1642
+	ldrh	r3, [r5, #4]
+	cbnz	r3, .L1643
+.L1642:
+	bl	FtlCacheWriteBack
+	movs	r0, #0
+	bl	FtlGcFreeTempBlock
+	ldr	r0, .L1644
+	movs	r4, #0
+	strb	r4, [r5, #8]
+	bl	allocate_data_superblock
+	ldr	r3, .L1644+4
+	strh	r4, [r3, #0]	@ movhi
+	ldr	r3, .L1644+8
+	strh	r4, [r3, #0]	@ movhi
+	bl	l2p_flush
+	mov	r0, r4
+	bl	FtlEctTblFlush
+	bl	FtlVpcTblFlush
+.L1643:
+	ldr	r0, .L1644
+	pop	{r3, r4, r5, lr}
+	b	get_new_active_ppa
+.L1645:
+	.align	2
+.L1644:
+	.word	.LANCHOR109
+	.word	.LANCHOR142
+	.word	.LANCHOR144
+	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
+	.section	.text.ftl_discard,"ax",%progbits
+	.align	1
+	.global	ftl_discard
+	.thumb
+	.thumb_func
+	.type	ftl_discard, %function
+ftl_discard:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1655
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	mov	r4, r2
+	ldr	r3, [r3, #0]
+	adds	r2, r2, r1
+	mov	r6, r1
+	cmp	r2, r3
+	bhi	.L1652
+	cmp	r4, #31
+	bls	.L1653
+	bl	FtlCacheWriteBack
+	ldr	r3, .L1655+4
+	mov	r0, r6
+	ldrh	r7, [r3, #0]
+	mov	r1, r7
+	bl	__aeabi_uidiv
+	mls	r6, r0, r7, r6
+	mov	r5, r0
+	uxth	r6, r6
+	cbz	r6, .L1648
+	subs	r6, r7, r6
+	adds	r5, r0, #1
+	cmp	r6, r4
+	it	cs
+	movcs	r6, r4
+	uxth	r6, r6
+	subs	r4, r4, r6
+.L1648:
+	mov	r3, #-1
+	ldr	r8, .L1655+4
+	str	r3, [sp, #4]
+	ldr	r7, .L1655+8
+	ldr	r6, .L1655+12
+	b	.L1649
+.L1651:
+	movs	r2, #0
+	mov	r0, r5
+	mov	r1, sp
+	bl	log2phys
+	ldr	r3, [sp, #0]
+	adds	r3, r3, #1
+	beq	.L1650
+	ldr	r3, [r7, #0]
+	add	r1, sp, #4
+	movs	r2, #1
+	mov	r0, r5
+	adds	r3, r3, #1
+	str	r3, [r7, #0]
+	ldr	r3, [r6, #0]
+	adds	r3, r3, #1
+	str	r3, [r6, #0]
+	bl	log2phys
+	ldr	r0, [sp, #0]
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	bl	decrement_vpc_count
+.L1650:
+	ldrh	r3, [r8, #0]
+	adds	r5, r5, #1
+	subs	r4, r4, r3
+.L1649:
+	ldrh	r3, [r8, #0]
+	cmp	r4, r3
+	bcs	.L1651
+	ldr	r3, .L1655+8
+	mov	r4, #0
+	ldr	r2, [r3, #0]
+	cmp	r2, #32
+	bls	.L1654
+	str	r4, [r3, #0]
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	b	.L1654
+.L1652:
+	mov	r0, #-1
+	b	.L1647
+.L1653:
+	movs	r0, #0
+	b	.L1647
+.L1654:
+	mov	r0, r4
+.L1647:
+	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
+.L1656:
+	.align	2
+.L1655:
+	.word	.LANCHOR84
+	.word	.LANCHOR71
+	.word	.LANCHOR221
+	.word	.LANCHOR157
+	.size	ftl_discard, .-ftl_discard
+	.section	.text.FtlSysFlush,"ax",%progbits
+	.align	1
+	.global	FtlSysFlush
+	.thumb
+	.thumb_func
+	.type	FtlSysFlush, %function
+FtlSysFlush:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	bl	FtlCacheWriteBack
+	bl	l2p_flush
+	movs	r0, #1
+	bl	FtlEctTblFlush
+	bl	FtlVpcTblFlush
+	movs	r0, #0
+	pop	{r3, pc}
+	.size	FtlSysFlush, .-FtlSysFlush
+	.section	.text.FtlDeInit,"ax",%progbits
+	.align	1
+	.global	FtlDeInit
+	.thumb
+	.thumb_func
+	.type	FtlDeInit, %function
+FtlDeInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	ldr	r3, .L1660
+	ldr	r3, [r3, #0]
+	cmp	r3, #1
+	bne	.L1659
+	bl	FtlSysFlush
+.L1659:
+	movs	r0, #0
+	pop	{r3, pc}
+.L1661:
+	.align	2
+.L1660:
+	.word	.LANCHOR222
+	.size	FtlDeInit, .-FtlDeInit
+	.section	.text.rk_ftl_de_init,"ax",%progbits
+	.align	1
+	.global	rk_ftl_de_init
+	.thumb
+	.thumb_func
+	.type	rk_ftl_de_init, %function
+rk_ftl_de_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	bl	rk_nand_de_init
+	bl	FtlDeInit
+	pop	{r3, lr}
+	b	rk_nand_de_init
+	.size	rk_ftl_de_init, .-rk_ftl_de_init
+	.section	.text.FtlMapTblRecovery,"ax",%progbits
+	.align	1
+	.global	FtlMapTblRecovery
+	.thumb
+	.thumb_func
+	.type	FtlMapTblRecovery, %function
+FtlMapTblRecovery:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r4, r0
+	ldr	r3, [r0, #12]
+	movs	r1, #0
+	ldrh	sl, [r0, #6]
+	ldr	fp, [r0, #24]
+	str	r3, [sp, #8]
+	ldr	r3, [r0, #16]
+	lsl	r2, sl, #2
+	ldr	r6, .L1683
+	str	r3, [sp, #12]
+	ldrh	r3, [r0, #8]
+	mov	r0, fp
+	str	r3, [sp, #4]
+	bl	memset
+	ldr	r1, .L1683+4
+	movs	r2, #0
+	mov	r8, r2
+	str	r2, [r4, #32]
+	str	r2, [r4, #28]
+	ldr	r3, [r1, #0]
+	str	r3, [r6, #8]
+	ldr	r3, .L1683+8
+	ldr	r5, [r3, #0]
+	movw	r3, #65535
+	str	r5, [r6, #12]
+	strh	r3, [r4, #0]	@ movhi
+	strh	r3, [r4, #2]	@ movhi
+	movs	r3, #1
+	str	r3, [r4, #36]
+	ldr	r3, [sp, #8]
+	mov	r7, r3
+	mov	r3, fp
+	mov	fp, sl
+	mov	sl, r4
+	b	.L1664
+.L1677:
+	ldr	r0, [sp, #4]
+	subs	r2, r0, #1
+	cmp	r8, r2
+	bne	.L1665
+	sxth	r6, r1
+	mov	r4, sl
+	mov	sl, fp
+	mov	fp, r3
+	ldr	r3, [sp, #8]
+	mov	r7, r1
+	movs	r1, #1
+	add	r3, r3, r6, lsl #1
+	str	r3, [sp, #4]
+	ldr	r3, [sp, #8]
+	ldrh	r0, [r3, r6, lsl #1]
+	bl	FtlGetLastWrittenPage
+	ldr	r1, [sp, #12]
+	strh	r7, [r4, #0]	@ movhi
+	ldr	r7, .L1683
+	uxth	r0, r0
+	adds	r3, r0, #1
+	strh	r3, [r4, #2]	@ movhi
+	ldr	r3, [r1, r6, lsl #2]
+	sxth	r8, r0
+	movs	r6, #0
+	str	r3, [r4, #28]
+	b	.L1666
+.L1668:
+	ldr	r2, [sp, #4]
+	movs	r1, #1
+	ldr	r0, .L1683
+	ldrh	r3, [r2, #0]
+	mov	r2, r1
+	orr	r3, r6, r3, lsl #10
+	str	r3, [r7, #4]
+	bl	FlashReadPages
+	ldr	r3, [r7, #0]
+	adds	r3, r3, #1
+	beq	.L1667
+	ldrh	r3, [r5, #8]
+	cmp	r3, sl
+	bcs	.L1667
+	ldrh	r2, [r4, #4]
+	ldrh	r1, [r5, #0]
+	cmp	r1, r2
+	itt	eq
+	ldreq	r2, [r7, #4]
+	streq	r2, [fp, r3, lsl #2]
+.L1667:
+	adds	r6, r6, #1
+.L1666:
+	sxth	r3, r6
+	cmp	r8, r3
+	bge	.L1668
+	b	.L1669
+.L1665:
+	ldr	r0, .L1683+4
+	ldrh	r1, [r7], #2
+	ldr	r2, [r0, #0]
+	ldr	r0, .L1683+12
+	str	r2, [r6, #8]
+	ldrh	r2, [r0, #0]
+	ldr	r0, .L1683
+	subs	r2, r2, #1
+	orr	r2, r2, r1, lsl #10
+	movs	r1, #1
+	str	r2, [r6, #4]
+	mov	r2, r1
+	str	r3, [sp, #0]
+	bl	FlashReadPages
+	ldr	r2, [r6, #0]
+	ldr	r3, [sp, #0]
+	adds	r2, r2, #1
+	beq	.L1681
+	ldrh	r1, [r5, #0]
+	ldrh	r2, [sl, #4]
+	cmp	r1, r2
+	bne	.L1681
+	ldrh	r2, [r5, #8]
+	movw	r1, #64245
+	cmp	r2, r1
+	bne	.L1681
+	ldr	r2, .L1683+12
+	movs	r1, #0
+	ldr	r0, .L1683+4
+	mov	lr, r3
+	ldrh	r4, [r2, #0]
+	ldr	r2, [r0, #0]
+	subs	r4, r4, #1
+	b	.L1671
+.L1673:
+	ldrh	r0, [r2, #0]
+	cmp	r0, fp
+	itt	cc
+	ldrcc	r3, [r2, #4]
+	strcc	r3, [lr, r0, lsl #2]
+	adds	r1, r1, #1
+	adds	r2, r2, #8
+.L1671:
+	cmp	r1, r4
+	blt	.L1673
+	mov	r3, lr
+	b	.L1674
+.L1676:
+	ldrh	r2, [r7, #-2]
+	movs	r1, #1
+	ldr	r0, .L1683
+	orr	r2, r4, r2, lsl #10
+	str	r2, [r6, #4]
+	mov	r2, r1
+	str	ip, [sp, #0]
+	bl	FlashReadPages
+	ldr	r2, [r6, #0]
+	ldr	ip, [sp, #0]
+	adds	r2, r2, #1
+	beq	.L1675
+	ldrh	r2, [r5, #8]
+	cmp	r2, fp
+	bcs	.L1675
+	ldrh	r1, [sl, #4]
+	ldrh	r0, [r5, #0]
+	cmp	r0, r1
+	itt	eq
+	ldreq	r1, [r6, #4]
+	streq	r1, [r8, r2, lsl #2]
+.L1675:
+	adds	r4, r4, #1
+	b	.L1682
+.L1681:
+	mov	ip, r8
+	movs	r4, #0
+	mov	r8, r3
+.L1682:
+	ldr	r1, .L1683+12
+	ldrh	r2, [r1, #0]
+	cmp	r4, r2
+	blt	.L1676
+	mov	r3, r8
+	mov	r8, ip
+.L1674:
+	add	r8, r8, #1
+.L1664:
+	ldr	r2, [sp, #4]
+	uxth	r1, r8
+	cmp	r8, r2
+	blt	.L1677
+	mov	r4, sl
+.L1669:
+	mov	r0, r4
+	bl	ftl_free_no_use_map_blk
+	ldr	r3, .L1683+12
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	bne	.L1678
+	mov	r0, r4
+	bl	ftl_map_blk_alloc_new_blk
+.L1678:
+	mov	r0, r4
+	bl	ftl_map_blk_gc
+	mov	r0, r4
+	bl	ftl_map_blk_gc
+	movs	r0, #0
+	add	sp, sp, #16
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L1684:
+	.align	2
+.L1683:
+	.word	.LANCHOR197
+	.word	.LANCHOR96
+	.word	.LANCHOR180
+	.word	.LANCHOR69
+	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
+	.section	.text.FtlLoadMapInfo,"ax",%progbits
+	.align	1
+	.global	FtlLoadMapInfo
+	.thumb
+	.thumb_func
+	.type	FtlLoadMapInfo, %function
+FtlLoadMapInfo:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	bl	FtlL2PDataInit
+	ldr	r0, .L1686
+	bl	FtlMapTblRecovery
+	movs	r0, #0
+	pop	{r3, pc}
+.L1687:
+	.align	2
+.L1686:
+	.word	.LANCHOR120
+	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
+	.section	.text.FtlLoadVonderInfo,"ax",%progbits
+	.align	1
+	.global	FtlLoadVonderInfo
+	.thumb
+	.thumb_func
+	.type	FtlLoadVonderInfo, %function
+FtlLoadVonderInfo:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	ldr	r3, .L1689
+	ldr	r0, .L1689+4
+	ldrh	r3, [r3, #0]
+	strh	r3, [r0, #10]	@ movhi
+	movw	r3, #61574
+	strh	r3, [r0, #4]	@ movhi
+	ldr	r3, .L1689+8
+	ldrh	r3, [r3, #0]
+	strh	r3, [r0, #8]	@ movhi
+	ldr	r3, .L1689+12
+	ldrh	r3, [r3, #0]
+	strh	r3, [r0, #6]	@ movhi
+	ldr	r3, .L1689+16
+	ldr	r3, [r3, #0]
+	str	r3, [r0, #12]
+	ldr	r3, .L1689+20
+	ldr	r3, [r3, #0]
+	str	r3, [r0, #16]
+	ldr	r3, .L1689+24
+	ldr	r3, [r3, #0]
+	str	r3, [r0, #20]
+	ldr	r3, .L1689+28
+	ldr	r3, [r3, #0]
+	str	r3, [r0, #24]
+	bl	FtlMapTblRecovery
+	movs	r0, #0
+	pop	{r3, pc}
+.L1690:
+	.align	2
+.L1689:
+	.word	.LANCHOR77
+	.word	.LANCHOR213
+	.word	.LANCHOR85
+	.word	.LANCHOR78
+	.word	.LANCHOR86
+	.word	.LANCHOR185
+	.word	.LANCHOR184
+	.word	.LANCHOR186
+	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
+	.section	.text.FtlRecoverySuperblock,"ax",%progbits
+	.align	1
+	.global	FtlRecoverySuperblock
+	.thumb
+	.thumb_func
+	.type	FtlRecoverySuperblock, %function
+FtlRecoverySuperblock:
+	@ args = 0, pretend = 0, frame = 72
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldrh	r2, [r0, #0]
+	movw	r3, #65535
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	cmp	r2, r3
+	sub	sp, sp, #72
+	mov	r4, r0
+	beq	.L1692
+	ldrh	r5, [r0, #2]
+	ldr	r2, .L1784
+	str	r5, [sp, #24]
+	ldrb	r5, [r0, #6]	@ zero_extendqisi2
+	ldrh	r2, [r2, #0]
+	str	r5, [sp, #36]
+	ldr	r5, [sp, #24]
+	cmp	r2, r5
+	mov	r5, #0
+	bne	.L1693
+	mov	r3, r5	@ movhi
+	strh	r5, [r0, #4]	@ movhi
+	b	.L1781
+.L1693:
+	ldrh	r0, [r0, #16]
+	b	.L1694
+.L1695:
+	adds	r5, r5, #1
+	uxth	r5, r5
+	add	r2, r5, #8
+	ldrh	r0, [r4, r2, lsl #1]
+.L1694:
+	cmp	r0, r3
+	beq	.L1695
+	ldrb	r1, [r4, #8]	@ zero_extendqisi2
+	cmp	r1, #1
+	bne	.L1696
+	bl	FtlGetLastWrittenPage
+	adds	r3, r0, #1
+	mov	r6, r0
+	beq	.L1697
+	ldr	r3, .L1784+4
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbnz	r3, .L1776
+	ldr	r3, .L1784+8
+	ldrh	r7, [r3, r0, lsl #1]
+	b	.L1766
+.L1696:
+	movs	r1, #0
+	bl	FtlGetLastWrittenPage
+	mov	r6, r0
+	adds	r0, r0, #1
+	beq	.L1697
+.L1776:
+	mov	r7, r6
+.L1766:
+	ldr	r3, .L1784+12
+	movs	r5, #0
+	str	r4, [sp, #48]
+	mov	r2, r4
+	ldrh	fp, [r3, #0]
+	ldr	r3, .L1784+16
+	ldr	sl, [r3, #0]
+	ldr	r3, .L1784+20
+	ldr	r8, [r3, #0]
+	ldr	r3, .L1784+24
+	ldrh	ip, [r3, #0]
+	mov	r3, r5
+	b	.L1699
+.L1697:
+	ldr	r3, [sp, #24]
+	cbz	r3, .L1700
+	ldr	r1, .L1784+28
+	movw	r2, #1748
+	ldr	r0, .L1784+32
+	bl	printf
+	ldr	r0, .L1784+36
+	ldr	r1, .L1784+40
+	bl	printf
+.L1700:
+	ldr	r3, [sp, #36]
+	cbz	r3, .L1701
+	cmp	r3, r5
+	beq	.L1701
+	ldr	r1, .L1784+28
+	movw	r2, #1749
+	ldr	r0, .L1784+32
+	bl	printf
+	ldr	r0, .L1784+36
+	ldr	r1, .L1784+40
+	bl	printf
+.L1701:
+	movs	r3, #0
+	strh	r3, [r4, #2]	@ movhi
+	strb	r3, [r4, #6]
+	b	.L1692
+.L1703:
+	ldrh	r0, [r2, #16]
+	movw	lr, #65535
+	cmp	r0, lr
+	beq	.L1702
+	mov	lr, #36
+	orr	r0, r7, r0, lsl #10
+	mla	r1, lr, r5, sl
+	str	r0, [r1, #4]
+	movs	r0, #0
+	str	r0, [r1, #8]
+	mul	r0, ip, r5
+	adds	r5, r5, #1
+	uxth	r5, r5
+	bic	r0, r0, #3
+	add	r0, r8, r0
+	str	r0, [r1, #12]
+.L1702:
+	adds	r3, r3, #1
+	adds	r2, r2, #2
+	uxth	r3, r3
+.L1699:
+	cmp	r3, fp
+	bne	.L1703
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	cmp	r3, #1
+	bne	.L1768
+	ldr	r3, .L1784+4
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	adds	r3, r3, #0
+	it	ne
+	movne	r3, #1
+	b	.L1777
+.L1768:
+	movs	r3, #0
+.L1777:
+	ldr	r8, .L1784+16
+	mov	r1, r5
+	str	r3, [sp, #32]
+	mov	fp, r7
+	ldr	r2, [sp, #32]
+	ldr	r0, [r8, #0]
+	bl	FlashReadPages
+	ldr	r2, .L1784+44
+	ldr	sl, [r8, #0]
+	uxth	ip, r7
+	movw	r8, #65535
+	str	r8, [sp, #16]
+	ldr	r3, [r2, #0]
+	mov	r8, #0
+	str	r3, [sp, #20]
+	mov	r3, r6
+	mov	r6, sl
+	mov	sl, ip
+	b	.L1705
+.L1710:
+	ldr	r1, [r6, #0]
+	cbnz	r1, .L1706
+	ldr	ip, [r6, #12]
+	ldr	r7, [ip, #4]
+	adds	r1, r7, #1
+	beq	.L1707
+	ldr	r1, [r2, #0]
+	mov	r0, r7
+	str	r2, [sp, #12]
+	str	r3, [sp, #4]
+	str	ip, [sp, #8]
+	bl	ftl_cmp_data_ver
+	ldr	r2, [sp, #12]
+	ldr	r3, [sp, #4]
+	ldr	ip, [sp, #8]
+	cbz	r0, .L1707
+	adds	r7, r7, #1
+	str	r7, [r2, #0]
+.L1707:
+	ldr	r1, [ip, #0]
+	adds	r1, r1, #1
+	bne	.L1708
+	uxth	r6, r3
+	ldr	r3, .L1784+16
+	movs	r2, #36
+	mov	r7, fp
+	ldr	r3, [r3, #0]
+	mla	r3, r2, r8, r3
+	b	.L1778
+.L1706:
+	str	sl, [sp, #16]
+.L1708:
+	add	r8, r8, #1
+	adds	r6, r6, #36
+	uxth	r8, r8
+.L1705:
+	cmp	r8, r5
+	bne	.L1710
+	adds	r6, r3, #1
+	ldr	r3, .L1784+16
+	mov	r7, fp
+	uxth	r6, r6
+	ldr	r3, [r3, #0]
+.L1778:
+	ldr	r0, [r3, #4]
+	ubfx	r0, r0, #10, #16
+	bl	P2V_plane
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	cmp	r3, #1
+	str	r0, [sp, #28]
+	bne	.L1711
+	ldr	r2, .L1784+4
+	ldrb	r2, [r2, #0]	@ zero_extendqisi2
+	cbnz	r2, .L1711
+	ldr	r2, .L1784+8
+	ldrh	r6, [r2, r6, lsl #1]
+.L1711:
+	ldr	r2, .L1784
+	ldrh	r2, [r2, #0]
+	cmp	r2, r6
+	bne	.L1712
+	movs	r2, #0
+	strh	r6, [r4, #2]	@ movhi
+	strb	r2, [r4, #6]
+	strh	r2, [r4, #4]	@ movhi
+.L1712:
+	ldr	r5, [sp, #24]
+	cmp	r6, r5
+	bne	.L1713
+	ldr	r8, [sp, #28]
+	ldr	r5, [sp, #36]
+	cmp	r8, r5
+	bne	.L1713
+	mov	r0, r4
+	mov	r1, r6
+	mov	r2, r8
+	b	.L1782
+.L1713:
+	ldr	r2, [sp, #20]
+	ldr	r8, [sp, #16]
+	subs	r5, r2, #1
+	movw	r2, #65535
+	cmp	r8, r2
+	bne	.L1714
+	cmp	r3, #0
+	bne	.L1715
+.L1714:
+	ldr	r2, .L1784+48
+	uxth	r3, r7
+	ldr	r0, [sp, #24]
+	ldr	r1, [r2, #0]
+	adds	r1, r1, #1
+	it	eq
+	streq	r5, [r2, #0]
+	ldr	r2, [r2, #0]
+	str	r2, [sp, #16]
+	adds	r2, r0, #7
+	cmp	r3, r2
+	ble	.L1769
+	subs	r7, r3, #7
+	uxth	r7, r7
+	b	.L1717
+.L1769:
+	ldr	r7, [sp, #24]
+.L1717:
+	mov	fp, #-1
+	mov	r8, r3
+	mov	sl, fp
+	mov	r3, r6
+	mov	r6, r5
+	b	.L1718
+.L1720:
+	ldrh	r0, [r1, #16]
+	movw	r3, #65535
+	cmp	r0, r3
+	beq	.L1719
+	ldr	r3, [sp, #20]
+	mov	lr, #36
+	orr	r0, r7, r0, lsl #10
+	mla	ip, lr, r5, r3
+	adds	r5, r5, #1
+	uxth	r5, r5
+	str	r0, [ip, #4]
+.L1719:
+	adds	r2, r2, #1
+	adds	r1, r1, #2
+	uxth	r2, r2
+.L1731:
+	ldr	r0, [sp, #44]
+	cmp	r2, r0
+	bne	.L1720
+	ldr	ip, .L1784+16
+	mov	r1, r5
+	ldr	r3, [sp, #40]
+	ldr	r2, [sp, #32]
+	ldr	r0, [ip, #0]
+	str	r3, [sp, #4]
+	str	ip, [sp, #8]
+	bl	FlashReadPages
+	ldr	r2, .L1784+4
+	movs	r0, #0
+	ldr	ip, [sp, #8]
+	ldr	r3, [sp, #4]
+	ldrb	r2, [r2, #0]	@ zero_extendqisi2
+	ldr	r1, [ip, #0]
+	mov	ip, r3
+	str	r5, [sp, #40]
+	str	r2, [sp, #20]
+	ldr	r2, .L1784+48
+	ldr	r2, [r2, #0]
+	b	.L1721
+.L1785:
+	.align	2
+.L1784:
+	.word	.LANCHOR68
+	.word	.LANCHOR7
+	.word	.LANCHOR8
+	.word	.LANCHOR53
+	.word	.LANCHOR173
+	.word	.LANCHOR130
+	.word	.LANCHOR74
+	.word	.LANCHOR223
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR154
+	.word	.LANCHOR138
+.L1729:
+	ldr	r3, [r1, #0]
+	cbnz	r3, .L1722
+	ldr	r3, [r1, #12]
+	movw	r5, #65535
+	ldrh	lr, [r3, #0]
+	cmp	lr, r5
+	beq	.L1771
+	ldr	r3, [r3, #4]
+	adds	r5, r3, #1
+	beq	.L1771
+	cmp	fp, #-1
+	bne	.L1723
+	ldr	r5, .L1786
+	ldrh	lr, [r5, r7, lsl #1]
+	movw	r5, #65535
+	cmp	lr, r5
+	bne	.L1724
+	ldr	r5, [sp, #20]
+	cbz	r5, .L1723
+.L1724:
+	cmp	r2, r6
+	ite	ne
+	movne	fp, r2
+	moveq	fp, #-1
+	b	.L1723
+.L1722:
+	ldr	r3, .L1786+4
+	mov	r5, r6
+	ldrb	r1, [r4, #8]	@ zero_extendqisi2
+	mov	r6, ip
+	str	r2, [r3, #0]
+	cmp	r1, #0
+	bne	.L1715
+	ldr	r1, .L1786
+	ldrh	r0, [r1, r7, lsl #1]
+	movw	r1, #65535
+	cmp	r0, r1
+	bne	.L1725
+	cmp	fp, #-1
+	beq	.L1726
+	str	fp, [r3, #0]
+	b	.L1715
+.L1726:
+	ldr	r0, [sp, #16]
+	cmp	r0, r5
+	beq	.L1783
+	str	r0, [r3, #0]
+	b	.L1715
+.L1725:
+	cmp	sl, r5
+	beq	.L1728
+	cmp	sl, #-1
+	beq	.L1715
+	str	sl, [r3, #0]
+	b	.L1715
+.L1728:
+	cmp	r2, r5
+	beq	.L1715
+.L1783:
+	subs	r2, r2, #1
+	b	.L1779
+.L1771:
+	mov	r3, r2
+	mov	r2, sl
+.L1723:
+	adds	r0, r0, #1
+	mov	sl, r2
+	adds	r1, r1, #36
+	mov	r2, r3
+	uxth	r0, r0
+.L1721:
+	ldr	r3, [sp, #40]
+	cmp	r0, r3
+	bne	.L1729
+	adds	r7, r7, #1
+	ldr	r1, .L1786+4
+	mov	r3, ip
+	uxth	r7, r7
+	str	r2, [r1, #0]
+.L1718:
+	cmp	r7, r8
+	bhi	.L1730
+	ldr	r5, .L1786+8
+	mov	r1, r4
+	ldr	r2, .L1786+12
+	str	r3, [sp, #40]
+	ldrh	lr, [r5, #0]
+	movs	r5, #0
+	ldr	r2, [r2, #0]
+	str	lr, [sp, #44]
+	str	r2, [sp, #20]
+	mov	r2, r5
+	b	.L1731
+.L1730:
+	mov	r5, r6
+	mov	r6, r3
+	ldr	r3, .L1786+4
+	mov	r2, #-1
+.L1779:
+	str	r2, [r3, #0]
+.L1715:
+	ldr	r3, .L1786+16
+	movs	r2, #1
+	ldr	r0, .L1786+20
+	ldr	r7, .L1786+12
+	strh	r2, [r3, #0]	@ movhi
+	bl	FtlMapBlkWriteDumpData
+	ldr	sl, [sp, #24]
+	str	r6, [sp, #20]
+.L1732:
+	ldr	r3, .L1786+24
+	movs	r6, #0
+	ldr	r0, .L1786+8
+	mov	r2, r4
+	ldr	lr, [r7, #0]
+	ldrb	fp, [r3, #0]	@ zero_extendqisi2
+	mov	r3, r6
+	ldrh	ip, [r0, #0]
+	b	.L1733
+.L1736:
+	ldrh	r0, [r2, #16]
+	movw	r1, #65535
+	cmp	r0, r1
+	beq	.L1734
+	mov	r8, #36
+	orr	r0, sl, r0, lsl #10
+	mla	r1, r8, r6, lr
+	str	r0, [r1, #4]
+	ldrb	r8, [r4, #8]	@ zero_extendqisi2
+	cmp	r8, #1
+	bne	.L1735
+	cmp	fp, #0
+	beq	.L1735
+	orr	r0, r0, #-2147483648
+	str	r0, [r1, #4]
+.L1735:
+	adds	r6, r6, #1
+	uxth	r6, r6
+.L1734:
+	adds	r3, r3, #1
+	adds	r2, r2, #2
+	uxth	r3, r3
+.L1733:
+	cmp	r3, ip
+	bne	.L1736
+	ldr	r0, [r7, #0]
+	mov	r1, r6
+	ldr	r2, [sp, #32]
+	mov	r8, #0
+	bl	FlashReadPages
+	movs	r3, #36
+	str	sl, [sp, #40]
+	muls	r3, r6, r3
+	str	r3, [sp, #52]
+	b	.L1737
+.L1761:
+	ldr	r3, [r7, #0]
+	add	sl, r3, r8
+	ldr	r6, [sl, #4]
+	ubfx	r0, r6, #10, #16
+	str	r6, [sp, #68]
+	bl	P2V_plane
+	ldr	ip, [sp, #40]
+	ldr	r3, [sp, #24]
+	cmp	ip, r3
+	bcc	.L1738
+	bne	.L1739
+	ldr	r3, [sp, #36]
+	cmp	r0, r3
+	bcc	.L1738
+.L1739:
+	ldr	ip, [sp, #40]
+	ldr	r3, [sp, #20]
+	cmp	ip, r3
+	bne	.L1740
+	ldr	ip, [sp, #28]
+	cmp	r0, ip
+	beq	.L1775
+.L1740:
+	ldr	r3, [sl, #0]
+	adds	r3, r3, #1
+	beq	.L1742
+	ldr	r6, [sl, #12]
+	movw	lr, #61589
+	ldrh	r3, [r6, #0]
+	cmp	r3, lr
+	bne	.L1749
+.L1743:
+	ldr	r5, [r6, #4]
+	adds	r3, r5, #1
+	beq	.L1744
+	ldr	sl, .L1786+28
+	mov	r0, r5
+	ldr	r1, [sl, #0]
+	bl	ftl_cmp_data_ver
+	cbz	r0, .L1744
+	adds	r3, r5, #1
+	str	r3, [sl, #0]
+.L1744:
+	ldr	sl, [r6, #8]
+	add	r1, sp, #64
+	ldr	r3, [r6, #12]
+	movs	r2, #0
+	mov	r0, sl
+	str	r3, [sp, #60]
+	bl	log2phys
+	ldr	r0, .L1786+4
+	ldr	r1, [r0, #0]
+	adds	r0, r1, #1
+	beq	.L1745
+	mov	r0, r5
+	bl	ftl_cmp_data_ver
+	cmp	r0, #0
+	beq	.L1745
+	ldr	r3, [sp, #60]
+	adds	r1, r3, #1
+	beq	.L1746
+	ldr	r0, [r7, #0]
+	movs	r2, #0
+	add	r0, r0, r8
+	ldr	r1, [r0, #12]
+	str	r3, [r0, #4]
+	str	r1, [sp, #16]
+	movs	r1, #1
+	bl	FlashReadPages
+	ldr	r3, [sp, #16]
+	ldr	r3, [r3, #4]
+	str	r3, [sp, #44]
+	ldr	r3, [r7, #0]
+	add	fp, r3, r8
+	ldr	r3, [r3, r8]
+	adds	r3, r3, #1
+	bne	.L1747
+	b	.L1748
+.L1746:
+	ldr	r3, [sp, #68]
+	ldr	r2, [sp, #64]
+	cmp	r2, r3
+	bne	.L1749
+	mov	r0, sl
+	add	r1, sp, #60
+	movs	r2, #1
+	bl	log2phys
+.L1749:
+	ldrh	r0, [r4, #0]
+	b	.L1780
+.L1747:
+	ldr	r3, [sp, #16]
+	ldr	r6, [r3, #8]
+	cmp	r6, sl
+	bne	.L1748
+	ldr	r1, .L1786+4
+	ldr	r0, [r1, #0]
+	ldr	r1, [sp, #44]
+	bl	ftl_cmp_data_ver
+	cbz	r0, .L1748
+	ldr	r3, [sp, #64]
+	ldr	r2, [sp, #68]
+	cmp	r3, r2
+	beq	.L1753
+.L1750:
+	ldr	r2, [sp, #60]
+	cmp	r3, r2
+	beq	.L1748
+	adds	r2, r3, #1
+	beq	.L1751
+	ldr	r2, [fp, #12]
+	mov	r0, fp
+	str	r3, [fp, #4]
+	movs	r1, #1
+	str	r2, [sp, #16]
+	movs	r2, #0
+	bl	FlashReadPages
+	b	.L1752
+.L1751:
+	str	r3, [fp, #0]
+.L1752:
+	ldr	r3, [r7, #0]
+	ldr	r3, [r3, r8]
+	adds	r3, r3, #1
+	beq	.L1753
+	ldr	r3, [sp, #16]
+	ldr	r1, .L1786+4
+	ldr	sl, [r3, #4]
+	ldr	r0, [r1, #0]
+	mov	r1, sl
+	bl	ftl_cmp_data_ver
+	cbz	r0, .L1753
+	ldr	r0, [sp, #44]
+	mov	r1, sl
+	bl	ftl_cmp_data_ver
+	cbz	r0, .L1748
+.L1753:
+	mov	r0, r6
+	ldr	r1, [sp, #60]
+	bl	FtlReUsePrevPpa
+.L1748:
+	ldrh	r0, [r4, #0]
+	mov	r3, #-1
+	str	r3, [sp, #60]
+	bl	decrement_vpc_count
+	b	.L1755
+.L1787:
+	.align	2
+.L1786:
+	.word	.LANCHOR9
+	.word	.LANCHOR138
+	.word	.LANCHOR53
+	.word	.LANCHOR173
+	.word	.LANCHOR224
+	.word	.LANCHOR120
+	.word	.LANCHOR7
+	.word	.LANCHOR154
+.L1745:
+	ldr	r3, [sp, #68]
+	ldr	r2, [sp, #64]
+	cmp	r2, r3
+	beq	.L1755
+	movs	r2, #1
+	mov	r0, sl
+	add	r1, sp, #68
+	bl	log2phys
+	ldr	fp, [sp, #64]
+	cmp	fp, #-1
+	beq	.L1755
+	ldr	r3, [sp, #60]
+	cmp	fp, r3
+	beq	.L1755
+	ubfx	r0, fp, #10, #16
+	bl	P2V_block_in_plane
+	ldr	r3, .L1788
+	ldrh	r3, [r3, #0]
+	cmp	r3, r0
+	beq	.L1756
+	ldr	r3, .L1788+4
+	ldrh	r3, [r3, #0]
+	cmp	r3, r0
+	beq	.L1756
+	ldr	r3, .L1788+8
+	ldrh	r3, [r3, #0]
+	cmp	r3, r0
+	bne	.L1755
+.L1756:
+	ldr	r0, [r7, #0]
+	movs	r1, #1
+	movs	r2, #0
+	str	fp, [r0, #4]
+	ldr	r6, [r0, #12]
+	bl	FlashReadPages
+	ldr	r3, [r7, #0]
+	ldr	r1, [r6, #4]
+	ldr	r3, [r3, #0]
+	adds	r3, r3, #1
+	beq	.L1755
+	mov	r0, r5
+	bl	ftl_cmp_data_ver
+	cbnz	r0, .L1755
+	mov	r0, sl
+	add	r1, sp, #64
+	movs	r2, #1
+	bl	log2phys
+.L1755:
+	ldr	r0, [sp, #60]
+	adds	r3, r0, #1
+	beq	.L1738
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	ldr	r3, .L1788+12
+	ldrh	r3, [r3, #0]
+	cmp	r3, r0
+	mov	r6, r0
+	bhi	.L1757
+	ldr	r1, .L1788+16
+	movw	r2, #2027
+	ldr	r0, .L1788+20
+	bl	printf
+	ldr	r0, .L1788+24
+	ldr	r1, .L1788+28
+	bl	printf
+.L1757:
+	ldr	r3, .L1788+32
+	ldr	r3, [r3, #0]
+	ldrh	r3, [r3, r6, lsl #1]
+	cbz	r3, .L1758
+	mov	r0, r6
+.L1780:
+	bl	decrement_vpc_count
+	b	.L1738
+.L1758:
+	mov	r1, r6
+	ldr	r0, .L1788+36
+	bl	printf
+	b	.L1738
+.L1742:
+	ldr	r2, .L1788+40
+	ldr	r3, [r2, #0]
+	cmp	r3, #31
+	bhi	.L1759
+	ldr	r0, .L1788+44
+	str	r6, [r0, r3, lsl #2]
+	adds	r3, r3, #1
+	str	r3, [r2, #0]
+.L1759:
+	ldrh	r0, [r4, #0]
+	bl	decrement_vpc_count
+	ldr	r1, .L1788+48
+	ldr	r3, [r1, #0]
+	adds	r0, r3, #1
+	bne	.L1760
+	str	r5, [r1, #0]
+	b	.L1738
+.L1760:
+	cmp	r3, r5
+	itt	hi
+	ldrhi	r2, .L1788+48
+	strhi	r5, [r2, #0]
+.L1738:
+	add	r8, r8, #36
+.L1737:
+	ldr	r3, [sp, #52]
+	cmp	r8, r3
+	bne	.L1761
+	ldr	sl, [sp, #40]
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	add	sl, sl, #1
+	cmp	r3, #1
+	uxth	sl, sl
+	bne	.L1762
+	ldr	r3, .L1788+52
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L1762
+	ldr	r3, .L1788+56
+	ldrh	r3, [r3, #0]
+	cmp	r3, sl
+	bne	.L1762
+	ldr	r8, [sp, #20]
+	cmp	r8, sl
+	beq	.L1775
+.L1762:
+	ldr	r3, .L1788+60
+	ldrh	r3, [r3, #0]
+	cmp	sl, r3
+	bne	.L1732
+	ldr	r2, .L1788+64
+	movs	r3, #0
+	strh	sl, [r4, #2]	@ movhi
+	strh	r3, [r4, #4]	@ movhi
+	ldrh	r1, [r2, #0]
+	movw	r2, #65535
+	ldr	r0, [sp, #48]
+	b	.L1763
+.L1765:
+	adds	r0, r0, #2
+	ldrh	r5, [r0, #14]
+	cmp	r5, r2
+	beq	.L1764
+.L1781:
+	strb	r3, [r4, #6]
+	b	.L1692
+.L1764:
+	adds	r3, r3, #1
+	uxth	r3, r3
+.L1763:
+	cmp	r3, r1
+	bne	.L1765
+	b	.L1692
+.L1775:
+.L1741:
+	ldr	r6, [sp, #20]
+	mov	r0, r4
+	ldr	r3, [sp, #28]
+	mov	r1, r6
+	mov	r2, r3
+	strh	r6, [r4, #2]	@ movhi
+	strb	r3, [r4, #6]
+.L1782:
+	bl	ftl_sb_update_avl_pages
+.L1692:
+	movs	r0, #0
+	add	sp, sp, #72
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L1789:
+	.align	2
+.L1788:
+	.word	.LANCHOR107
+	.word	.LANCHOR108
+	.word	.LANCHOR109
+	.word	.LANCHOR55
+	.word	.LANCHOR223
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR99
+	.word	.LC33
+	.word	.LANCHOR225
+	.word	.LANCHOR226
+	.word	.LANCHOR138
+	.word	.LANCHOR7
+	.word	.LANCHOR69
+	.word	.LANCHOR68
+	.word	.LANCHOR53
+	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
+	.section	.text.FtlPowerLostRecovery,"ax",%progbits
+	.align	1
+	.global	FtlPowerLostRecovery
+	.thumb
+	.thumb_func
+	.type	FtlPowerLostRecovery, %function
+FtlPowerLostRecovery:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	movs	r4, #0
+	ldr	r3, .L1791
+	ldr	r5, .L1791+4
+	str	r4, [r3, #0]
+	mov	r0, r5
+	bl	FtlRecoverySuperblock
+	mov	r0, r5
+	ldr	r5, .L1791+8
+	bl	FtlSlcSuperblockCheck
+	mov	r0, r5
+	bl	FtlRecoverySuperblock
+	mov	r0, r5
+	bl	FtlSlcSuperblockCheck
+	bl	FtlGcPageRecovery
+	movw	r0, #65535
+	bl	decrement_vpc_count
+	mov	r0, r4
+	pop	{r3, r4, r5, pc}
+.L1792:
+	.align	2
+.L1791:
+	.word	.LANCHOR225
+	.word	.LANCHOR107
+	.word	.LANCHOR108
+	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
+	.section	.text.FtlSysBlkInit,"ax",%progbits
+	.align	1
+	.global	FtlSysBlkInit
+	.thumb
+	.thumb_func
+	.type	FtlSysBlkInit, %function
+FtlSysBlkInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1803
+	movs	r2, #0
+	push	{r4, lr}
+	strh	r2, [r3, #0]	@ movhi
+	ldr	r3, .L1803+4
+	ldrh	r0, [r3, #0]
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlScanSysBlk
+	ldr	r3, .L1803+8
+	ldrh	r2, [r3, #0]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L1799
+	bl	FtlLoadSysInfo
+	mov	r4, r0
+	cmp	r0, #0
+	bne	.L1800
+	bl	FtlLoadMapInfo
+	bl	FtlLoadVonderInfo
+	bl	Ftl_load_ext_data
+	bl	FtlLoadEctTbl
+	bl	FtlFreeSysBLkSort
+	bl	SupperBlkListInit
+	bl	FtlPowerLostRecovery
+	movs	r0, #1
+	bl	FtlUpdateVaildLpn
+	ldr	r3, .L1803+12
+	ldrh	r1, [r3, #0]
+	ldr	r3, .L1803+16
+	ldr	r2, [r3, #0]
+	mov	r3, r4
+	b	.L1795
+.L1797:
+	adds	r0, r2, r4
+	adds	r4, r4, #12
+	ldr	r0, [r0, #4]
+	cmp	r0, #0
+	blt	.L1796
+	adds	r3, r3, #1
+.L1795:
+	cmp	r3, r1
+	blt	.L1797
+	b	.L1802
+.L1796:
+	ldr	r0, .L1803+20
+	bl	FtlSuperblockPowerLostFix
+	ldr	r0, .L1803+24
+	bl	FtlSuperblockPowerLostFix
+	ldr	r0, .L1803+28
+	bl	FtlMapBlkWriteDumpData
+	ldr	r0, .L1803+32
+	bl	FtlMapBlkWriteDumpData
+	ldr	r3, .L1803+36
+	ldrh	r2, [r3, #30]
+	adds	r2, r2, #1
+	strh	r2, [r3, #30]	@ movhi
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	bl	FtlVpcTblFlush
+	movs	r0, #0
+	pop	{r4, pc}
+.L1799:
+	mov	r0, #-1
+	pop	{r4, pc}
+.L1800:
+	mov	r0, #-1
+	pop	{r4, pc}
+.L1802:
+	ldr	r3, .L1803
+	ldrh	r0, [r3, #0]
+	cmp	r0, #0
+	bne	.L1796
+	pop	{r4, pc}
+.L1804:
+	.align	2
+.L1803:
+	.word	.LANCHOR224
+	.word	.LANCHOR54
+	.word	.LANCHOR191
+	.word	.LANCHOR83
+	.word	.LANCHOR112
+	.word	.LANCHOR107
+	.word	.LANCHOR108
+	.word	.LANCHOR120
+	.word	.LANCHOR213
+	.word	.LANCHOR140
+	.size	FtlSysBlkInit, .-FtlSysBlkInit
+	.section	.text.FtlInit,"ax",%progbits
+	.align	1
+	.global	FtlInit
+	.thumb
+	.thumb_func
+	.type	FtlInit, %function
+FtlInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, lr}
+	mov	r3, #-1
+	ldr	r4, .L1807
+	movs	r2, #0
+	str	r3, [r4, #0]
+	ldr	r3, .L1807+4
+	str	r2, [r3, #0]
+	bl	FtlConstantsInit
+	bl	FtlMemInit
+	bl	FtlVariablesInit
+	ldr	r3, .L1807+8
+	ldrh	r0, [r3, #0]
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlLoadBbt
+	cbnz	r0, .L1806
+	bl	FtlSysBlkInit
+	cbnz	r0, .L1806
+	movs	r3, #1
+	str	r3, [r4, #0]
+.L1806:
+	movs	r0, #0
+	pop	{r4, pc}
+.L1808:
+	.align	2
+.L1807:
+	.word	.LANCHOR222
+	.word	.LANCHOR227
+	.word	.LANCHOR54
+	.size	FtlInit, .-FtlInit
+	.section	.text.rk_ftl_garbage_collect,"ax",%progbits
+	.align	1
+	.global	rk_ftl_garbage_collect
+	.thumb
+	.thumb_func
+	.type	rk_ftl_garbage_collect, %function
+rk_ftl_garbage_collect:
+	@ args = 0, pretend = 0, frame = 32
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1871
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	sub	sp, sp, #32
+	ldr	r3, [r3, #0]
+	cmp	r3, #0
+	bne	.L1861
+	ldr	r2, .L1871+4
+	ldrh	r2, [r2, #0]
+	cmp	r2, #47
+	bls	.L1862
+	ldr	r3, .L1871+8
+	movw	r5, #65535
+	ldrh	r4, [r3, #0]
+	cmp	r4, r5
+	beq	.L1811
+	ldr	r1, .L1871+12
+	ldrh	r2, [r1, #0]
+	cmp	r2, r5
+	itt	eq
+	strheq	r4, [r1, #0]	@ movhi
+	strheq	r2, [r3, #0]	@ movhi
+.L1811:
+	cmp	r0, #0
+	bne	.L1863
+	ldr	r3, .L1871+16
+	ldrh	r3, [r3, #0]
+	cmp	r3, #24
+	bhi	.L1864
+	ldr	r2, .L1871+20
+	cmp	r3, #16
+	ldrh	r4, [r2, #0]
+	bls	.L1814
+	lsrs	r4, r4, #5
+	b	.L1813
+.L1814:
+	cmp	r3, #12
+	bls	.L1815
+	lsrs	r4, r4, #4
+	b	.L1813
+.L1815:
+	cmp	r3, #8
+	bls	.L1813
+	lsrs	r4, r4, #2
+	b	.L1813
+.L1864:
+	movs	r4, #1
+.L1813:
+	ldr	r2, .L1871+24
+	ldrh	r1, [r2, #0]
+	cmp	r1, r3
+	mov	r1, r2
+	bcs	.L1817
+	ldr	r3, .L1871+28
+	movw	r0, #65535
+	ldrh	r3, [r3, #0]
+	cmp	r3, r0
+	bne	.L1818
+	ldr	r0, .L1871+12
+	ldrh	r0, [r0, #0]
+	cmp	r0, r3
+	bne	.L1818
+	ldr	r3, .L1871+32
+	ldrh	r0, [r3, #0]
+	cbnz	r0, .L1819
+	ldr	r3, .L1871+36
+	movs	r1, #3
+	ldr	r3, [r3, #0]
+	muls	r1, r3, r1
+	ldr	r3, .L1871+40
+	ldr	r3, [r3, #0]
+	cmp	r3, r1, lsr #2
+	bcs	.L1820
+.L1819:
+	ldr	r3, .L1871+44
+	movs	r2, #3
+	ldrh	r3, [r3, #0]
+	muls	r2, r3, r2
+	ldr	r3, .L1871+24
+	asrs	r2, r2, #2
+	strh	r2, [r3, #0]	@ movhi
+	b	.L1821
+.L1820:
+	movs	r3, #18
+	strh	r3, [r2, #0]	@ movhi
+.L1821:
+	ldr	r3, .L1871+48
+	movs	r2, #0
+	str	r2, [r3, #0]
+	b	.L1810
+.L1818:
+	ldr	r3, .L1871+44
+	movs	r2, #3
+	ldrh	r3, [r3, #0]
+	muls	r3, r2, r3
+	asrs	r3, r3, #2
+	strh	r3, [r1, #0]	@ movhi
+.L1817:
+	ldr	r3, .L1871+52
+	ldrh	r3, [r3, #0]
+	cbz	r3, .L1812
+	adds	r4, r4, #32
+	uxth	r4, r4
+	b	.L1812
+.L1863:
+	movs	r4, #1
+.L1812:
+	ldr	r3, .L1871+56
+	ldrh	r2, [r3, #0]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L1823
+	ldr	r3, .L1871+12
+	ldrh	r1, [r3, #0]
+	cmp	r1, r2
+	beq	.L1824
+	ldr	r0, .L1871+60
+	ldr	r0, [r0, #0]
+	ldrh	r1, [r0, r1, lsl #1]
+	cbnz	r1, .L1825
+	strh	r2, [r3, #0]	@ movhi
+.L1825:
+	ldrh	r1, [r3, #0]
+	ldr	r2, .L1871+56
+	strh	r1, [r2, #0]	@ movhi
+	movw	r2, #65535
+	strh	r2, [r3, #0]	@ movhi
+.L1824:
+	ldr	r5, .L1871+56
+	movw	r6, #65535
+	movs	r3, #0
+	ldrh	r0, [r5, #0]
+	strb	r3, [r5, #8]
+	cmp	r0, r6
+	beq	.L1823
+	bl	IsBlkInGcList
+	cbz	r0, .L1826
+	strh	r6, [r5, #0]	@ movhi
+.L1826:
+	ldr	r3, .L1871+64
+	ldr	r6, .L1871+56
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L1827
+	ldrh	r0, [r6, #0]
+	bl	ftl_get_blk_mode
+	strb	r0, [r6, #8]
+.L1827:
+	ldrh	r2, [r6, #0]
+	movw	r3, #65535
+	ldr	r5, .L1871+56
+	cmp	r2, r3
+	beq	.L1823
+	mov	r0, r5
+	bl	make_superblock
+	ldr	r2, .L1871+68
+	movs	r3, #0
+	strh	r3, [r5, #2]	@ movhi
+	strb	r3, [r5, #6]
+	strh	r3, [r2, #0]	@ movhi
+	ldr	r3, .L1871+60
+	ldrh	r2, [r5, #0]
+	ldr	r3, [r3, #0]
+	ldrh	r2, [r3, r2, lsl #1]
+	ldr	r3, .L1871+72
+	strh	r2, [r3, #0]	@ movhi
+.L1823:
+	ldr	r2, .L1871+56
+	ldr	r1, .L1871+76
+	ldrh	r3, [r2, #0]
+	ldrh	r1, [r1, #0]
+	cmp	r1, r3
+	beq	.L1828
+	ldr	r1, .L1871+80
+	ldrh	r1, [r1, #0]
+	cmp	r1, r3
+	bne	.L1865
+.L1829:
+.L1828:
+	movw	r3, #65535
+	strh	r3, [r2, #0]	@ movhi
+	b	.L1870
+.L1865:
+	ldr	r6, .L1871+84
+	ldr	r7, .L1871+88
+.L1867:
+	ldr	r3, .L1871+56
+	movw	r2, #65535
+	ldrh	r8, [r3, #0]
+	cmp	r8, r2
+	bne	.L1831
+	ldr	r2, .L1871+48
+	mov	sl, r3
+	ldr	fp, .L1871+60
+	movs	r1, #0
+	str	r1, [r2, #0]
+.L1866:
+	ldrh	r1, [r6, #0]
+	mov	r0, r1
+	str	r1, [sp, #8]
+	bl	List_get_gc_head_node
+	uxth	r5, r0
+	strh	r5, [sl, #0]	@ movhi
+	cmp	r5, r8
+	bne	.L1833
+	ldr	r3, .L1871+84
+	movs	r2, #0
+	movs	r0, #8
+	strh	r2, [r3, #0]	@ movhi
+	b	.L1810
+.L1833:
+	mov	r0, r5
+	bl	IsBlkInGcList
+	ldr	r2, [sp, #8]
+	adds	r3, r2, #1
+	cbnz	r0, .L1868
+.L1834:
+	ldr	r1, .L1871+20
+	uxth	r0, r3
+	ldr	r3, [fp, #0]
+	strh	r0, [r6, #0]	@ movhi
+	ldrh	ip, [r1, #0]
+	ldr	r1, .L1871+92
+	ldrh	r2, [r3, r5, lsl #1]
+	ldrh	r1, [r1, #0]
+	mul	r1, r1, ip
+	cmp	r2, r1, asr #1
+	bgt	.L1836
+	cmp	r0, #48
+	bls	.L1837
+	cmp	r2, #8
+	bls	.L1837
+	ldr	r2, .L1871+96
+	ldrh	r2, [r2, #0]
+	cmp	r2, #35
+	bhi	.L1837
+.L1836:
+	movs	r2, #0
+	strh	r2, [r6, #0]	@ movhi
+.L1837:
+	ldrh	r2, [r3, r5, lsl #1]
+	ldr	r3, .L1871+56
+	cmp	r2, r1
+	blt	.L1838
+	movw	r2, #65535
+	strh	r2, [r3, #0]	@ movhi
+	ldr	r3, .L1871+84
+	movs	r2, #0
+	strh	r2, [r3, #0]	@ movhi
+	b	.L1870
+.L1838:
+	cbnz	r2, .L1839
+	movw	r0, #65535
+	bl	decrement_vpc_count
+	ldrh	r3, [r6, #0]
+	adds	r3, r3, #1
+.L1868:
+	strh	r3, [r6, #0]	@ movhi
+	b	.L1866
+.L1872:
+	.align	2
+.L1871:
+	.word	.LANCHOR165
+	.word	.LANCHOR101
+	.word	.LANCHOR147
+	.word	.LANCHOR146
+	.word	.LANCHOR104
+	.word	.LANCHOR68
+	.word	.LANCHOR170
+	.word	.LANCHOR109
+	.word	.LANCHOR228
+	.word	.LANCHOR87
+	.word	.LANCHOR116
+	.word	.LANCHOR200
+	.word	.LANCHOR166
+	.word	.LANCHOR148
+	.word	.LANCHOR201
+	.word	.LANCHOR99
+	.word	.LANCHOR7
+	.word	.LANCHOR229
+	.word	.LANCHOR230
+	.word	.LANCHOR107
+	.word	.LANCHOR108
+	.word	.LANCHOR172
+	.word	.LANCHOR132
+	.word	.LANCHOR53
+	.word	.LANCHOR142
+.L1839:
+	movs	r2, #0
+	strb	r2, [r3, #8]
+	ldr	r2, .L1873
+	ldrb	r2, [r2, #0]	@ zero_extendqisi2
+	cbz	r2, .L1840
+	mov	r0, r5
+	str	r3, [sp, #4]
+	bl	ftl_get_blk_mode
+	ldr	r3, [sp, #4]
+	strb	r0, [r3, #8]
+.L1840:
+	ldr	r5, .L1873+4
+	ldr	r3, .L1873+8
+	ldrh	r2, [r5, #0]
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	bne	.L1841
+	ldr	r1, .L1873+12
+	mov	r2, #772
+	ldr	r0, .L1873+16
+	bl	printf
+	ldr	r0, .L1873+20
+	ldr	r1, .L1873+24
+	bl	printf
+.L1841:
+	ldr	r3, .L1873+28
+	ldrh	r2, [r5, #0]
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	bne	.L1842
+	ldr	r1, .L1873+12
+	movw	r2, #773
+	ldr	r0, .L1873+16
+	bl	printf
+	ldr	r0, .L1873+20
+	ldr	r1, .L1873+24
+	bl	printf
+.L1842:
+	ldr	r5, .L1873+4
+	ldr	r3, .L1873+32
+	ldrh	r2, [r5, #0]
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	bne	.L1843
+	ldr	r1, .L1873+12
+	movw	r2, #774
+	ldr	r0, .L1873+16
+	bl	printf
+	ldr	r0, .L1873+20
+	ldr	r1, .L1873+24
+	bl	printf
+.L1843:
+	ldr	r0, .L1873+4
+	bl	make_superblock
+	ldr	r1, .L1873+36
+	movs	r3, #0
+	ldrh	r0, [r5, #0]
+	strh	r3, [r1, #0]	@ movhi
+	ldr	r1, .L1873+40
+	ldr	r1, [r1, #0]
+	ldrh	r0, [r1, r0, lsl #1]
+	ldr	r1, .L1873+44
+	strh	r3, [r5, #2]	@ movhi
+	strb	r3, [r5, #6]
+	strh	r0, [r1, #0]	@ movhi
+.L1831:
+	ldr	r3, .L1873+48
+	movs	r2, #1
+	str	r2, [r3, #0]
+	ldr	r3, .L1873+52
+	ldrh	r3, [r3, #0]
+	str	r3, [sp, #8]
+	ldr	r3, .L1873
+	ldrb	r2, [r3, #0]	@ zero_extendqisi2
+	ldr	r3, .L1873+4
+	cbz	r2, .L1844
+	ldrb	r2, [r3, #8]	@ zero_extendqisi2
+	cmp	r2, #1
+	bne	.L1844
+	ldr	r2, .L1873+56
+	ldrh	r2, [r2, #0]
+	str	r2, [sp, #8]
+.L1844:
+	ldrh	r3, [r3, #2]
+	ldr	r8, [sp, #8]
+	adds	r2, r3, r4
+	cmp	r2, r8
+	itt	gt
+	rsbgt	r4, r3, r8
+	uxthgt	r4, r4
+	movs	r3, #0
+	str	r4, [sp, #20]
+	str	r3, [sp, #12]
+	b	.L1846
+.L1848:
+	ldrh	r1, [r2, #2]!
+	movw	r8, #65535
+	cmp	r1, r8
+	beq	.L1847
+	mla	r8, r0, r5, lr
+	adds	r5, r5, #1
+	orr	r1, r4, r1, lsl #10
+	uxth	r5, r5
+	str	r1, [r8, #4]
+.L1847:
+	adds	r3, r3, #1
+	uxth	r3, r3
+.L1855:
+	cmp	r3, ip
+	bne	.L1848
+	ldr	r3, .L1873+4
+	mov	r1, r5
+	ldr	r0, [r7, #0]
+	movs	r4, #0
+	mov	sl, r5
+	ldrb	r2, [r3, #8]	@ zero_extendqisi2
+	bl	FlashReadPages
+	str	r4, [sp, #16]
+	b	.L1849
+.L1853:
+	ldr	r3, [r7, #0]
+	adds	r2, r3, r4
+	ldr	r3, [r3, r4]
+	ldr	r5, [r2, #12]
+	adds	r3, r3, #1
+	beq	.L1850
+	ldrh	r3, [r5, #0]
+	movw	r8, #61589
+	cmp	r3, r8
+	bne	.L1850
+	ldr	r8, [r5, #8]
+	cmp	r8, #-1
+	bne	.L1851
+	ldr	r1, .L1873+12
+	mov	r2, #812
+	ldr	r0, .L1873+16
+	bl	printf
+	ldr	r0, .L1873+20
+	ldr	r1, .L1873+24
+	bl	printf
+.L1851:
+	movs	r2, #0
+	add	r1, sp, #28
+	mov	r0, r8
+	bl	log2phys
+	ldr	r2, [r7, #0]
+	ldr	r1, [sp, #28]
+	adds	r2, r2, r4
+	bic	r1, r1, #-2147483648
+	ldr	r3, [r2, #4]
+	cmp	r1, r3
+	bne	.L1850
+	ldr	r0, .L1873+36
+	mov	fp, #36
+	ldr	r8, .L1873+72
+	ldr	r2, [r2, #16]
+	ldrh	r3, [r0, #0]
+	ldr	r1, [r8, #0]
+	adds	r3, r3, #1
+	strh	r3, [r0, #0]	@ movhi
+	ldr	r0, .L1873+60
+	ldr	r3, [r0, #0]
+	mla	r3, fp, r1, r3
+	str	r2, [r3, #16]
+	str	r3, [sp, #4]
+	bl	Ftl_get_new_temp_ppa
+	ldr	r3, [sp, #4]
+	ldr	r1, .L1873+60
+	ldr	r2, [r1, #0]
+	str	r0, [r3, #4]
+	ldr	r3, [r8, #0]
+	ldr	r0, [r7, #0]
+	mla	r2, fp, r3, r2
+	adds	r0, r0, r4
+	ldr	fp, .L1873+32
+	adds	r3, r3, #1
+	ldr	r1, [r0, #8]
+	str	r1, [r2, #8]
+	ldr	r1, [r0, #12]
+	str	r1, [r2, #12]
+	movs	r1, #1
+	ldr	r2, [sp, #28]
+	str	r2, [r5, #12]
+	ldrh	r2, [fp, #0]
+	strh	r2, [r5, #2]	@ movhi
+	ldr	r2, .L1873+64
+	str	r3, [r8, #0]
+	ldr	r2, [r2, #0]
+	str	r2, [r5, #4]
+	bl	FtlGcBufAlloc
+	ldr	r3, .L1873
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbnz	r3, .L1852
+	ldrb	r3, [fp, #7]	@ zero_extendqisi2
+	ldr	r2, [r8, #0]
+	cmp	r2, r3
+	beq	.L1852
+	ldrh	r3, [fp, #4]
+	cbnz	r3, .L1850
+.L1852:
+	bl	Ftl_gc_temp_data_write_back
+	cmp	r0, #0
+	bne	.L1869
+.L1850:
+	ldr	r8, [sp, #16]
+	adds	r4, r4, #36
+	add	r3, r8, #1
+	uxth	r3, r3
+	str	r3, [sp, #16]
+.L1849:
+	ldr	r3, [sp, #16]
+	cmp	r3, sl
+	bne	.L1853
+	ldr	r8, [sp, #12]
+	add	r8, r8, #1
+	str	r8, [sp, #12]
+.L1846:
+	ldr	r8, [sp, #12]
+	ldr	r2, .L1873+4
+	uxth	r3, r8
+	ldr	r8, [sp, #20]
+	cmp	r3, r8
+	bcs	.L1854
+	ldr	r3, .L1873+68
+	movs	r5, #0
+	ldrh	r4, [r2, #2]
+	movs	r0, #36
+	ldr	lr, [r7, #0]
+	adds	r2, r2, #14
+	ldrh	ip, [r3, #0]
+	ldr	r3, [sp, #12]
+	adds	r4, r4, r3
+	mov	r3, r5
+	b	.L1855
+.L1854:
+	ldrh	r3, [r2, #2]
+	ldr	r4, [sp, #20]
+	ldr	r8, [sp, #8]
+	adds	r4, r4, r3
+	uxth	r4, r4
+	strh	r4, [r2, #2]	@ movhi
+	cmp	r4, r8
+	bcs	.L1856
+	ldr	r3, .L1873+36
+	ldrh	r2, [r3, #0]
+	ldr	r3, .L1873+44
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	bne	.L1857
+.L1856:
+	ldr	r3, .L1873+72
+	ldr	r3, [r3, #0]
+	cbz	r3, .L1858
+	bl	Ftl_gc_temp_data_write_back
+	cbz	r0, .L1858
+.L1869:
+	ldr	r3, .L1873+48
+	movs	r2, #0
+	str	r2, [r3, #0]
+.L1870:
+	ldr	r3, .L1873+76
+	ldrh	r0, [r3, #0]
+	b	.L1810
+.L1874:
+	.align	2
+.L1873:
+	.word	.LANCHOR7
+	.word	.LANCHOR201
+	.word	.LANCHOR107
+	.word	.LANCHOR231
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR108
+	.word	.LANCHOR109
+	.word	.LANCHOR229
+	.word	.LANCHOR99
+	.word	.LANCHOR230
+	.word	.LANCHOR165
+	.word	.LANCHOR68
+	.word	.LANCHOR69
+	.word	.LANCHOR174
+	.word	.LANCHOR154
+	.word	.LANCHOR53
+	.word	.LANCHOR128
+	.word	.LANCHOR228
+.L1858:
+	ldr	r3, .L1875
+	ldrh	r0, [r3, #0]
+	cbnz	r0, .L1859
+	ldr	r3, .L1875+4
+	ldr	r2, .L1875+8
+	ldrh	r1, [r3, #0]
+	ldr	r2, [r2, #0]
+	ldrh	r4, [r2, r1, lsl #1]
+	cbz	r4, .L1859
+	strh	r0, [r2, r1, lsl #1]	@ movhi
+	ldrh	r0, [r3, #0]
+	bl	update_vpc_list
+	bl	FtlCacheWriteBack
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+.L1859:
+	ldr	r3, .L1875+4
+	movw	r2, #65535
+	strh	r2, [r3, #0]	@ movhi
+.L1857:
+	ldr	r3, .L1875+12
+	ldrh	r0, [r3, #0]
+	cmp	r0, #2
+	bhi	.L1860
+	ldr	r3, .L1875+16
+	ldrh	r4, [r3, #0]
+	b	.L1867
+.L1860:
+	ldr	r3, .L1875+20
+	movs	r2, #0
+	adds	r0, r0, #1
+	str	r2, [r3, #0]
+	b	.L1810
+.L1861:
+	movs	r0, #0
+	b	.L1810
+.L1862:
+	mov	r0, r3
+.L1810:
+	add	sp, sp, #32
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L1876:
+	.align	2
+.L1875:
+	.word	.LANCHOR229
+	.word	.LANCHOR201
+	.word	.LANCHOR99
+	.word	.LANCHOR104
+	.word	.LANCHOR68
+	.word	.LANCHOR165
+	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
+	.section	.text.ftl_write,"ax",%progbits
+	.align	1
+	.global	ftl_write
+	.thumb
+	.thumb_func
+	.type	ftl_write, %function
+ftl_write:
+	@ args = 0, pretend = 0, frame = 80
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	cmp	r0, #16
+	sub	sp, sp, #80
+	mov	r5, r1
+	str	r2, [sp, #12]
+	str	r3, [sp, #4]
+	bne	.L1878
+	add	r0, r1, #256
+	mov	r1, r2
+	mov	r2, r3
+	bl	FtlVendorPartWrite
+	b	.L1879
+.L1878:
+	ldr	r3, .L1920
+	ldr	r0, [sp, #12]
+	ldr	r3, [r3, #0]
+	adds	r7, r0, r1
+	cmp	r7, r3
+	bhi	.L1910
+	ldr	r3, .L1920+4
+	ldr	r0, [r3, #0]
+	adds	r1, r0, #1
+	beq	.L1879
+	ldr	r3, .L1920+8
+	mov	r2, #2048
+	mov	r0, r5
+	str	r2, [r3, #0]
+	ldr	r3, .L1920+12
+	ldrh	r6, [r3, #0]
+	mov	r1, r6
+	bl	__aeabi_uidiv
+	mov	r1, r6
+	mov	sl, r0
+	subs	r0, r7, #1
+	bl	__aeabi_uidiv
+	ldr	r3, .L1920+16
+	ldr	r2, [r3, #0]
+	rsb	r4, sl, r0
+	str	r0, [sp, #24]
+	adds	r1, r4, #1
+	str	r1, [sp, #0]
+	adds	r2, r1, r2
+	str	r2, [r3, #0]
+	ldr	r3, .L1920+20
+	ldr	r7, [r3, #0]
+	cbz	r7, .L1880
+	ldr	r3, [r7, #16]
+	cmp	sl, r3
+	beq	.L1881
+	bl	FtlCacheWriteBack
+	b	.L1880
+.L1881:
+	ldr	r3, .L1920+24
+	mov	r1, r6
+	mov	r0, r5
+	ldr	r2, [r3, #0]
+	adds	r2, r2, #1
+	str	r2, [r3, #0]
+	bl	__aeabi_uidivmod
+	ldr	r2, [sp, #12]
+	ldr	r0, [r7, #8]
+	subs	r6, r6, r1
+	add	r0, r0, r1, lsl #9
+	cmp	r6, r2
+	it	cs
+	movcs	r6, r2
+	ldr	r1, [sp, #4]
+	lsl	r8, r6, #9
+	mov	r2, r8
+	bl	memcpy
+	cmp	r4, #0
+	beq	.L1912
+	ldr	r3, [sp, #12]
+	adds	r5, r5, r6
+	ldr	r0, [sp, #4]
+	add	sl, sl, #1
+	subs	r3, r3, r6
+	str	r3, [sp, #12]
+	add	r0, r0, r8
+	str	r0, [sp, #4]
+	bl	FtlCacheWriteBack
+	str	r4, [sp, #0]
+.L1880:
+	mov	r4, sl
+	str	sl, [sp, #20]
+	ldr	r6, .L1920+28
+	mov	sl, r5
+	b	.L1882
+.L1909:
+	ldr	r1, .L1920+32
+	ldrb	r2, [r6, #6]	@ zero_extendqisi2
+	ldrh	r3, [r1, #0]
+	cmp	r2, r3
+	bcc	.L1883
+	ldr	r1, .L1920+36
+	mov	r2, #1544
+	ldr	r0, .L1920+40
+	bl	printf
+	ldr	r0, .L1920+44
+	ldr	r1, .L1920+48
+	bl	printf
+.L1883:
+	ldr	r2, .L1920+28
+	ldrh	r3, [r2, #4]
+	cbnz	r3, .L1884
+	bl	FtlCacheWriteBack
+	ldr	r0, .L1920+28
+	bl	allocate_new_data_superblock
+.L1884:
+	ldrb	r3, [r6, #7]	@ zero_extendqisi2
+	ldrh	r2, [r6, #4]
+	ldr	r1, .L1920+32
+	lsls	r3, r3, #2
+	ldr	r0, [sp, #0]
+	cmp	r3, r2
+	it	cs
+	movcs	r3, r2
+	ldrb	r2, [r6, #6]	@ zero_extendqisi2
+	cmp	r3, r0
+	it	cc
+	movcc	r0, r3
+	ldrh	r3, [r1, #0]
+	str	r0, [sp, #8]
+	cmp	r2, r3
+	bcc	.L1885
+	ldr	r1, .L1920+36
+	movw	r2, #1577
+	ldr	r0, .L1920+40
+	bl	printf
+	ldr	r0, .L1920+44
+	ldr	r1, .L1920+48
+	bl	printf
+.L1885:
+	movs	r3, #0
+	ldr	r5, .L1920+52
+	str	r3, [sp, #16]
+	b	.L1886
+.L1905:
+	ldrh	r3, [r6, #4]
+	cmp	r3, #0
+	beq	.L1913
+	movs	r2, #0
+	add	r1, sp, #76
+	mov	r0, r4
+	movs	r7, #36
+	bl	log2phys
+	ldr	r0, .L1920+28
+	bl	get_new_active_ppa
+	ldr	r3, [sp, #16]
+	muls	r7, r3, r7
+	ldr	r3, [r5, #0]
+	adds	r3, r3, r7
+	str	r4, [r3, #16]
+	str	r0, [r3, #4]
+	ldr	r0, .L1920+56
+	ldrh	r2, [r0, #0]
+	ldr	r0, [sp, #16]
+	mul	r1, r2, r0
+	lsrs	r1, r1, #2
+	str	r1, [sp, #32]
+	ldr	r1, .L1920+60
+	ldr	r0, [sp, #32]
+	ldr	r1, [r1, #0]
+	add	r8, r1, r0, lsl #2
+	str	r8, [r3, #12]
+	str	r1, [sp, #36]
+	mov	r0, r8
+	movs	r1, #0
+	bl	memset
+	ldr	r1, [sp, #20]
+	ldr	r3, .L1920+12
+	cmp	r4, r1
+	beq	.L1888
+	ldr	r2, [sp, #24]
+	cmp	r4, r2
+	bne	.L1915
+	b	.L1919
+.L1888:
+	ldrh	fp, [r3, #0]
+	mov	r0, sl
+	mov	r1, fp
+	bl	__aeabi_uidivmod
+	ldr	r3, [sp, #12]
+	rsb	fp, r1, fp
+	str	r1, [sp, #28]
+	cmp	fp, r3
+	it	cs
+	movcs	fp, r3
+	b	.L1891
+.L1919:
+	ldr	r0, [sp, #12]
+	ldrh	fp, [r3, #0]
+	movs	r3, #0
+	add	r2, sl, r0
+	str	r3, [sp, #28]
+	mls	fp, r4, fp, r2
+	uxth	fp, fp
+.L1891:
+	ldr	r3, .L1920+12
+	ldrh	r3, [r3, #0]
+	cmp	fp, r3
+	bne	.L1892
+	ldr	r0, [sp, #20]
+	ldr	r3, [r5, #0]
+	cmp	r4, r0
+	add	r7, r3, r7
+	bne	.L1893
+	ldr	r1, [sp, #4]
+	str	r1, [r7, #8]
+	b	.L1894
+.L1893:
+	mul	r3, fp, r4
+	ldr	r2, [sp, #4]
+	rsb	r3, sl, r3
+	add	r3, r2, r3, lsl #9
+	b	.L1918
+.L1892:
+	ldr	r3, [sp, #20]
+	cmp	r4, r3
+	ldr	r3, [r5, #0]
+	it	eq
+	ldreq	r2, .L1920+64
+	add	r3, r3, r7
+	it	ne
+	ldrne	r2, .L1920+68
+	ldr	r2, [r2, #0]
+	str	r2, [r3, #8]
+	ldr	r3, [sp, #76]
+	adds	r2, r3, #1
+	beq	.L1897
+	str	r3, [sp, #44]
+	movs	r1, #1
+	ldr	r3, [r5, #0]
+	add	r0, sp, #40
+	str	r4, [sp, #56]
+	adds	r3, r3, r7
+	ldr	r2, [r3, #8]
+	ldr	r3, [r3, #12]
+	str	r2, [sp, #48]
+	movs	r2, #0
+	str	r3, [sp, #52]
+	bl	FlashReadPages
+	ldr	r3, [sp, #40]
+	adds	r3, r3, #1
+	bne	.L1898
+	ldr	r3, .L1920+72
+	ldr	r2, [r3, #72]
+	adds	r2, r2, #1
+	str	r2, [r3, #72]
+	b	.L1899
+.L1898:
+	ldr	r1, [r8, #8]
+	cmp	r1, r4
+	beq	.L1900
+	ldr	r3, .L1920+72
+	ldr	r0, .L1920+76
+	ldr	r2, [r3, #72]
+	adds	r2, r2, #1
+	str	r2, [r3, #72]
+	mov	r2, r4
+	bl	printf
+.L1900:
+	ldr	r3, [r8, #8]
+	cmp	r3, r4
+	beq	.L1899
+	ldr	r1, .L1920+36
+	movw	r2, #1630
+	ldr	r0, .L1920+40
+	bl	printf
+	ldr	r1, .L1920+48
+	ldr	r0, .L1920+44
+	bl	printf
+	b	.L1899
+.L1897:
+	ldr	r3, [r5, #0]
+	movs	r1, #0
+	adds	r3, r3, r7
+	ldr	r0, [r3, #8]
+	ldr	r3, .L1920+80
+	ldrh	r2, [r3, #0]
+	bl	memset
+.L1899:
+	ldr	r0, [sp, #20]
+	ldr	r3, [r5, #0]
+	cmp	r4, r0
+	add	r3, r3, r7
+	bne	.L1901
+	ldr	r0, [r3, #8]
+	ldr	r3, [sp, #28]
+	ldr	r1, [sp, #4]
+	add	r0, r0, r3, lsl #9
+	b	.L1917
+.L1921:
+	.align	2
+.L1920:
+	.word	.LANCHOR84
+	.word	.LANCHOR222
+	.word	.LANCHOR232
+	.word	.LANCHOR71
+	.word	.LANCHOR156
+	.word	.LANCHOR134
+	.word	.LANCHOR158
+	.word	.LANCHOR107
+	.word	.LANCHOR53
+	.word	.LANCHOR233
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR175
+	.word	.LANCHOR74
+	.word	.LANCHOR181
+	.word	.LANCHOR178
+	.word	.LANCHOR179
+	.word	.LANCHOR141
+	.word	.LC34
+	.word	.LANCHOR73
+.L1901:
+	ldr	r2, .L1922
+	ldr	r0, [r3, #8]
+	ldrh	r1, [r2, #0]
+	muls	r1, r4, r1
+	ldr	r2, [sp, #4]
+	rsb	r1, sl, r1
+	add	r1, r2, r1, lsl #9
+.L1917:
+	lsl	r2, fp, #9
+	bl	memcpy
+	ldr	r3, [sp, #24]
+	cmp	r4, r3
+	bne	.L1894
+	ldrh	r3, [r6, #4]
+	cbz	r3, .L1894
+	ldr	r3, [r5, #0]
+	adds	r7, r3, r7
+	ldr	r3, .L1922+4
+	str	r7, [r3, #0]
+	ldr	r3, .L1922+8
+	str	r6, [r3, #0]
+	b	.L1894
+.L1915:
+	ldr	r2, [r5, #0]
+	ldrh	r3, [r3, #0]
+	muls	r3, r4, r3
+	ldr	r0, [sp, #4]
+	rsb	r3, sl, r3
+	adds	r7, r2, r7
+	add	r3, r0, r3, lsl #9
+.L1918:
+	str	r3, [r7, #8]
+.L1894:
+	ldr	r1, .L1922+12
+	ldrb	r2, [r6, #6]	@ zero_extendqisi2
+	ldrh	r3, [r1, #0]
+	cmp	r2, r3
+	bcc	.L1903
+	ldr	r1, .L1922+16
+	movw	r2, #1651
+	ldr	r0, .L1922+20
+	bl	printf
+	ldr	r0, .L1922+24
+	ldr	r1, .L1922+28
+	bl	printf
+.L1903:
+	ldr	r2, [sp, #36]
+	movw	r3, #61589
+	ldr	r0, [sp, #32]
+	strh	r3, [r2, r0, lsl #2]	@ movhi
+	ldr	r3, .L1922+32
+	ldr	r2, [r3, #0]
+	str	r2, [r8, #4]
+	adds	r2, r2, #1
+	str	r2, [r3, #0]
+	adds	r2, r2, #1
+	bne	.L1904
+	movs	r2, #0
+	str	r2, [r3, #0]
+.L1904:
+	ldr	r3, [sp, #76]
+	str	r4, [r8, #8]
+	adds	r4, r4, #1
+	str	r3, [r8, #12]
+	ldrh	r3, [r6, #0]
+	strh	r3, [r8, #2]	@ movhi
+	ldr	r3, [sp, #16]
+	adds	r3, r3, #1
+	str	r3, [sp, #16]
+.L1886:
+	ldr	r3, [sp, #16]
+	ldr	r0, [sp, #8]
+	cmp	r3, r0
+	bne	.L1905
+	b	.L1887
+.L1913:
+	ldr	r3, [sp, #16]
+	str	r3, [sp, #8]
+.L1887:
+	ldr	r3, .L1922+4
+	ldr	r3, [r3, #0]
+	cbz	r3, .L1906
+	ldr	r0, [sp, #8]
+	subs	r0, r0, #1
+	str	r0, [sp, #8]
+	beq	.L1907
+	ldr	r1, [sp, #0]
+	subs	r1, r1, #1
+	str	r1, [sp, #0]
+.L1906:
+	ldr	r3, .L1922+36
+	movs	r2, #0
+	ldr	r1, [sp, #8]
+	ldr	r0, [r3, #0]
+	ldr	r3, .L1922+40
+	bl	FtlProgPages
+	ldr	r2, [sp, #0]
+	ldr	r3, [sp, #8]
+	cmp	r2, r3
+	bcs	.L1908
+	ldr	r1, .L1922+16
+	movw	r2, #1666
+	ldr	r0, .L1922+20
+	bl	printf
+	ldr	r0, .L1922+24
+	ldr	r1, .L1922+28
+	bl	printf
+.L1908:
+	ldr	r0, [sp, #0]
+	ldr	r1, [sp, #8]
+	subs	r0, r0, r1
+	str	r0, [sp, #0]
+.L1882:
+	ldr	r2, [sp, #0]
+	cmp	r2, #0
+	bne	.L1909
+.L1907:
+	ldr	sl, [sp, #20]
+	movs	r0, #0
+	ldr	r3, [sp, #24]
+	rsb	r1, sl, r3
+	bl	rk_ftl_garbage_collect
+	movs	r0, #0
+	b	.L1879
+.L1910:
+	mov	r0, #-1
+	b	.L1879
+.L1912:
+	mov	r0, r4
+.L1879:
+	add	sp, sp, #80
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L1923:
+	.align	2
+.L1922:
+	.word	.LANCHOR71
+	.word	.LANCHOR134
+	.word	.LANCHOR219
+	.word	.LANCHOR53
+	.word	.LANCHOR233
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR154
+	.word	.LANCHOR175
+	.word	.LANCHOR107
+	.size	ftl_write, .-ftl_write
+	.section	.text.ftl_read,"ax",%progbits
+	.align	1
+	.global	ftl_read
+	.thumb
+	.thumb_func
+	.type	ftl_read, %function
+ftl_read:
+	@ args = 0, pretend = 0, frame = 72
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	cmp	r0, #16
+	sub	sp, sp, #72
+	mov	r4, r1
+	mov	r7, r3
+	str	r2, [sp, #36]
+	bne	.L1925
+	add	r0, r1, #256
+	mov	r1, r2
+	mov	r2, r3
+	bl	FtlVendorPartRead
+	str	r0, [sp, #12]
+	b	.L1926
+.L1925:
+	ldr	r3, [sp, #36]
+	adds	r3, r3, r1
+	str	r3, [sp, #16]
+	ldr	r3, .L1958
+	ldr	r1, [sp, #16]
+	ldr	r3, [r3, #0]
+	cmp	r1, r3
+	bhi	.L1946
+	ldr	r3, .L1958+4
+	ldr	r3, [r3, #0]
+	adds	r2, r3, #1
+	beq	.L1947
+	ldr	fp, .L1958+48
+	bl	FtlCacheWriteBack
+	mov	r0, r4
+	mov	sl, #0
+	mov	r8, r4
+	ldrh	r5, [fp, #0]
+	mov	r1, r5
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #16]
+	mov	r1, r5
+	mov	r5, sl
+	str	r0, [sp, #20]
+	subs	r0, r3, #1
+	bl	__aeabi_uidiv
+	ldr	r1, [sp, #20]
+	ldr	r6, [sp, #20]
+	rsb	r3, r1, #1
+	str	sl, [sp, #32]
+	str	sl, [sp, #12]
+	adds	r3, r3, r0
+	str	r3, [sp, #8]
+	ldr	r3, .L1958+8
+	ldr	r1, [sp, #8]
+	str	r0, [sp, #24]
+	ldr	r2, [r3, #0]
+	adds	r2, r1, r2
+	str	r2, [r3, #0]
+	b	.L1953
+.L1945:
+	movs	r2, #0
+	mov	r0, r6
+	add	r1, sp, #68
+	bl	log2phys
+	ldr	r3, [sp, #68]
+	adds	r4, r3, #1
+	bne	.L1954
+	b	.L1957
+.L1931:
+	mla	r0, r0, r6, r4
+	cmp	r0, r8
+	bcc	.L1930
+	ldr	r3, [sp, #16]
+	cmp	r0, r3
+	bcs	.L1930
+	rsb	r0, r8, r0
+	movs	r1, #0
+	mov	r2, #512
+	add	r0, r7, r0, lsl #9
+	bl	memset
+.L1930:
+	adds	r4, r4, #1
+	b	.L1928
+.L1957:
+	movs	r4, #0
+.L1928:
+	ldrh	r0, [fp, #0]
+	cmp	r4, r0
+	bcc	.L1931
+	b	.L1932
+.L1954:
+	ldr	r2, .L1958+12
+	movs	r4, #36
+	ldr	r2, [r2, #0]
+	mla	r4, r4, r5, r2
+	str	r3, [r4, #4]
+	ldr	r3, [sp, #20]
+	cmp	r6, r3
+	bne	.L1933
+	ldr	r3, .L1958+16
+	mov	r0, r8
+	ldr	r3, [r3, #0]
+	str	r3, [r4, #8]
+	ldrh	r3, [fp, #0]
+	mov	r1, r3
+	str	r3, [sp, #4]
+	bl	__aeabi_uidivmod
+	ldr	r3, [sp, #4]
+	str	r1, [sp, #40]
+	subs	r2, r3, r1
+	ldr	r1, [sp, #36]
+	cmp	r2, r1
+	it	cc
+	movcc	r1, r2
+	str	r1, [sp, #32]
+	cmp	r1, r3
+	bne	.L1934
+	str	r7, [r4, #8]
+	b	.L1934
+.L1933:
+	ldr	r3, [sp, #24]
+	cmp	r6, r3
+	bne	.L1935
+	ldr	r3, .L1958+20
+	ldrh	r2, [fp, #0]
+	ldr	r1, [sp, #16]
+	ldr	r3, [r3, #0]
+	str	r3, [r4, #8]
+	mul	r3, r2, r6
+	rsb	sl, r3, r1
+	cmp	sl, r2
+	bne	.L1934
+	b	.L1955
+.L1935:
+	ldrh	r3, [fp, #0]
+	muls	r3, r6, r3
+.L1955:
+	rsb	r3, r8, r3
+	add	r3, r7, r3, lsl #9
+	str	r3, [r4, #8]
+.L1934:
+	ldr	r3, .L1958+24
+	ldr	r2, .L1958+28
+	str	r6, [r4, #16]
+	ldrh	r3, [r3, #0]
+	muls	r3, r5, r3
+	ldr	r2, [r2, #0]
+	adds	r5, r5, #1
+	bic	r3, r3, #3
+	adds	r3, r2, r3
+	str	r3, [r4, #12]
+.L1932:
+	ldr	r3, [sp, #8]
+	adds	r6, r6, #1
+	subs	r3, r3, #1
+	str	r3, [sp, #8]
+	beq	.L1936
+	ldr	r3, .L1958+32
+	ldrh	r3, [r3, #0]
+	cmp	r5, r3, lsl #2
+	bne	.L1953
+.L1936:
+	cmp	r5, #0
+	beq	.L1953
+	ldr	r4, .L1958+12
+	mov	r1, r5
+	movs	r2, #0
+	ldr	r0, [r4, #0]
+	bl	FlashReadPages
+	ldr	r3, [sp, #40]
+	str	r6, [sp, #60]
+	lsls	r3, r3, #9
+	str	r3, [sp, #44]
+	ldr	r3, [sp, #32]
+	lsls	r3, r3, #9
+	str	r3, [sp, #48]
+	lsl	r3, sl, #9
+	str	r3, [sp, #52]
+	movs	r3, #0
+	str	r3, [sp, #28]
+.L1944:
+	movs	r6, #36
+	ldr	r3, [sp, #28]
+	muls	r6, r3, r6
+	ldr	r3, [r4, #0]
+	ldr	r1, [sp, #20]
+	adds	r3, r3, r6
+	ldr	r2, [r3, #16]
+	cmp	r2, r1
+	bne	.L1938
+	ldr	r1, [r3, #8]
+	ldr	r3, .L1958+16
+	ldr	r3, [r3, #0]
+	cmp	r1, r3
+	bne	.L1939
+	ldr	r3, [sp, #44]
+	mov	r0, r7
+	ldr	r2, [sp, #48]
+	adds	r1, r1, r3
+	b	.L1956
+.L1938:
+	ldr	r1, [sp, #24]
+	cmp	r2, r1
+	bne	.L1939
+	ldr	r2, .L1958+20
+	ldr	r1, [r3, #8]
+	ldr	r3, [r2, #0]
+	cmp	r1, r3
+	bne	.L1939
+	ldrh	r0, [fp, #0]
+	ldr	r3, [sp, #24]
+	muls	r0, r3, r0
+	rsb	r0, r8, r0
+	ldr	r2, [sp, #52]
+	add	r0, r7, r0, lsl #9
+.L1956:
+	bl	memcpy
+.L1939:
+	ldr	r3, [r4, #0]
+	adds	r2, r3, r6
+	ldr	r3, [r3, r6]
+	adds	r0, r3, #1
+	bne	.L1940
+	ldr	r2, .L1958+36
+	str	r3, [sp, #12]
+	ldr	r1, [r2, #72]
+	adds	r1, r1, #1
+	str	r1, [r2, #72]
+	b	.L1941
+.L1940:
+	cmp	r3, #256
+	bne	.L1941
+	ldr	r0, [r2, #4]
+	movw	r6, #2049
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	str	r0, [sp, #56]
+	bl	FtlGcRefreshBlock
+.L1943:
+	subs	r6, r6, #1
+	beq	.L1942
+	movs	r0, #1
+	mov	r1, r0
+	bl	rk_ftl_garbage_collect
+	ldr	r1, .L1958+40
+	ldr	r2, [sp, #56]
+	ldrh	r3, [r1, #0]
+	cmp	r3, r2
+	beq	.L1943
+.L1942:
+	bl	FtlSysFlush
+.L1941:
+	ldr	r3, [sp, #28]
+	adds	r3, r3, #1
+	str	r3, [sp, #28]
+	cmp	r3, r5
+	bne	.L1944
+	ldr	r6, [sp, #60]
+	movs	r5, #0
+.L1953:
+	ldr	r3, [sp, #8]
+	cmp	r3, #0
+	bne	.L1945
+	ldr	r3, .L1958+44
+	ldrh	r3, [r3, #0]
+	cbz	r3, .L1926
+	ldr	r0, [sp, #8]
+	movs	r1, #1
+	bl	rk_ftl_garbage_collect
+	b	.L1926
+.L1946:
+	mov	r3, #-1
+.L1947:
+	str	r3, [sp, #12]
+.L1926:
+	ldr	r0, [sp, #12]
+	add	sp, sp, #72
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L1959:
+	.align	2
+.L1958:
+	.word	.LANCHOR84
+	.word	.LANCHOR222
+	.word	.LANCHOR160
+	.word	.LANCHOR173
+	.word	.LANCHOR178
+	.word	.LANCHOR179
+	.word	.LANCHOR74
+	.word	.LANCHOR181
+	.word	.LANCHOR53
+	.word	.LANCHOR141
+	.word	.LANCHOR201
+	.word	.LANCHOR148
+	.word	.LANCHOR71
+	.size	ftl_read, .-ftl_read
+	.section	.text.FlashReadFacBbtData,"ax",%progbits
+	.align	1
+	.global	FlashReadFacBbtData
+	.thumb
+	.thumb_func
+	.type	FlashReadFacBbtData, %function
+FlashReadFacBbtData:
+	@ args = 0, pretend = 0, frame = 48
+	@ frame_needed = 0, uses_anonymous_args = 0
+	mov	r3, r2
+	ldr	r2, .L1969
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r6, r1
+	ldrh	sl, [r2, #14]
+	sub	sp, sp, #48
+	ldrh	r1, [r2, #12]
+	mov	r4, r0
+	ldr	r2, .L1969+4
+	movw	fp, #61664
+	ldr	r7, .L1969+8
+	mul	sl, sl, r1
+	ldr	r2, [r2, #0]
+	str	r2, [sp, #20]
+	ldr	r2, [r7, #0]
+	uxth	sl, sl
+	add	r5, sl, #-1
+	mul	r8, sl, r6
+	str	r2, [sp, #24]
+	uxth	r5, r5
+	sub	sl, sl, #15
+	b	.L1961
+.L1967:
+	add	r2, r5, r8
+	movs	r1, #1
+	add	r0, sp, #12
+	str	r3, [sp, #4]
+	lsls	r2, r2, #10
+	str	r2, [sp, #16]
+	mov	r2, r1
+	bl	FlashReadPages
+	ldr	r2, [sp, #12]
+	ldr	r3, [sp, #4]
+	adds	r2, r2, #1
+	beq	.L1962
+	ldr	r2, [r7, #0]
+	ldrh	r2, [r2, #0]
+	cmp	r2, fp
+	bne	.L1962
+	cbz	r4, .L1968
+	cbnz	r6, .L1964
+	ldr	r2, .L1969+4
+	movs	r0, #1
+	ldr	r5, .L1969+12
+	ldr	r2, [r2, #0]
+	b	.L1965
+.L1966:
+	ubfx	r1, r6, #5, #16
+	and	r7, r6, #31
+	adds	r6, r6, #1
+	lsl	r7, r0, r7
+	ldr	lr, [r2, r1, lsl #2]
+	uxth	r6, r6
+	orr	r7, lr, r7
+	str	r7, [r2, r1, lsl #2]
+.L1965:
+	ldr	r1, [r5, #0]
+	cmp	r6, r1
+	bcc	.L1966
+.L1964:
+	ldr	r2, .L1969+4
+	mov	r0, r4
+	ldr	r1, [r2, #0]
+	mov	r2, r3
+	bl	memcpy
+	movs	r2, #4
+	ldr	r0, .L1969+16
+	mov	r1, r4
+	mov	r3, r2
+	bl	rknand_print_hex
+	movs	r0, #0
+	b	.L1963
+.L1962:
+	subs	r5, r5, #1
+	uxth	r5, r5
+.L1961:
+	cmp	sl, r5
+	ble	.L1967
+	mov	r0, #-1
+	b	.L1963
+.L1968:
+	mov	r0, r4
+.L1963:
+	add	sp, sp, #48
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L1970:
+	.align	2
+.L1969:
+	.word	.LANCHOR28
+	.word	.LANCHOR44
+	.word	.LANCHOR234
+	.word	.LANCHOR46
+	.word	.LC35
+	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
+	.section	.text.FlashGetBadBlockList,"ax",%progbits
+	.align	1
+	.global	FlashGetBadBlockList
+	.thumb
+	.thumb_func
+	.type	FlashGetBadBlockList, %function
+FlashGetBadBlockList:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r5, r0
+	ldr	r3, .L1978
+	ldr	r6, .L1978+4
+	ldr	r3, [r3, #0]
+	ldr	r0, [r6, #0]
+	ldrb	r2, [r3, #13]	@ zero_extendqisi2
+	ldrh	r4, [r3, #14]
+	muls	r4, r2, r4
+	uxth	r4, r4
+	adds	r2, r4, #7
+	lsrs	r2, r2, #3
+	bl	FlashReadFacBbtData
+	adds	r0, r0, #1
+	beq	.L1977
+	movs	r2, #0
+	lsrs	r0, r4, #4
+	ldr	r6, [r6, #0]
+	mov	r3, r2
+	subs	r4, r4, #1
+	movs	r1, #1
+	b	.L1973
+.L1975:
+	lsrs	r7, r2, #5
+	and	ip, r2, #31
+	lsl	ip, r1, ip
+	ldr	r7, [r6, r7, lsl #2]
+	tst	ip, r7
+	beq	.L1974
+	strh	r2, [r5, r3, lsl #1]	@ movhi
+	adds	r3, r3, #1
+	uxth	r3, r3
+.L1974:
+	cmp	r3, r0
+	bcs	.L1977
+	adds	r2, r2, #1
+	uxth	r2, r2
+.L1973:
+	cmp	r2, r4
+	blt	.L1975
+	b	.L1972
+.L1977:
+	movs	r3, #0
+.L1972:
+	movw	r2, #65535
+	movs	r0, #0
+	strh	r2, [r5, r3, lsl #1]	@ movhi
+	pop	{r3, r4, r5, r6, r7, pc}
+.L1979:
+	.align	2
+.L1978:
+	.word	.LANCHOR23
+	.word	.LANCHOR41
+	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
+	.section	.text.FtlMakeBbt,"ax",%progbits
+	.align	1
+	.global	FtlMakeBbt
+	.thumb
+	.thumb_func
+	.type	FtlMakeBbt, %function
+FtlMakeBbt:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	bl	FtlBbtMemInit
+	movs	r4, #0
+	ldr	r5, .L1998
+	bl	FtlLoadFactoryBbt
+	ldr	r6, .L1998+4
+	add	r2, r5, #12
+	str	r2, [sp, #4]
+	b	.L1981
+.L1987:
+	ldr	r3, .L1998+8
+	ldr	r2, [sp, #4]
+	ldr	r8, .L1998+20
+	ldr	r0, [r3, #0]
+	ldr	r3, .L1998+12
+	str	r0, [r8, #8]
+	ldr	sl, [r3, #0]
+	ldrh	r3, [r2], #2
+	str	sl, [r8, #12]
+	str	r2, [sp, #4]
+	movw	r2, #65535
+	cmp	r3, r2
+	beq	.L1982
+	ldrh	r7, [r6, #0]
+	movs	r1, #1
+	mov	r2, r1
+	mov	r0, r8
+	mla	r7, r7, r4, r3
+	lsls	r3, r7, #10
+	str	r3, [r8, #4]
+	bl	FlashReadPages
+	ldrh	r2, [r6, #0]
+	ldr	r0, [r5, #28]
+	adds	r2, r2, #7
+	ldr	r1, [r8, #8]
+	lsrs	r2, r2, #3
+	bl	memcpy
+	b	.L1983
+.L1982:
+	mov	r1, r4
+	bl	FlashGetBadBlockList
+	ldr	r1, [r5, #28]
+	ldr	r0, [r8, #8]
+	bl	FtlBbt2Bitmap
+	ldrh	fp, [r6, #0]
+	mov	r3, r5
+	mov	r5, r4
+	add	fp, fp, #-1
+	mov	r4, sl
+	mov	sl, r3
+	uxth	fp, fp
+	b	.L1996
+.L1985:
+	add	fp, fp, #-1
+	uxth	fp, fp
+.L1996:
+	ldrh	r0, [r6, #0]
+	mla	r0, r5, r0, fp
+	uxth	r0, r0
+	bl	FtlBbmIsBadBlock
+	cmp	r0, #1
+	beq	.L1985
+	ldr	r3, [sp, #4]
+	movs	r1, #0
+	ldr	r2, .L1998+12
+	strh	fp, [r3, #-2]	@ movhi
+	ldr	r0, [r2, #0]
+	movs	r2, #16
+	bl	memset
+	ldr	r2, [sp, #4]
+	movw	r3, 61664	@ movhi
+	ldrh	r7, [r6, #0]
+	strh	r3, [r4, #0]	@ movhi
+	movs	r3, #0
+	str	r3, [r4, #4]
+	ldrh	r3, [r2, #-2]
+	ldr	r0, [r8, #8]
+	mla	r7, r7, r5, r3
+	strh	r3, [r4, #2]	@ movhi
+	ldr	r1, [sl, #28]
+	lsls	r3, r7, #10
+	str	r3, [r8, #4]
+	ldr	r3, .L1998+16
+	ldrh	r2, [r3, #0]
+	lsls	r2, r2, #2
+	bl	memcpy
+	movs	r1, #1
+	mov	r2, r1
+	ldr	r0, .L1998+20
+	bl	FlashEraseBlocks
+	movs	r1, #1
+	mov	r3, r1
+	ldr	r0, .L1998+20
+	mov	r2, r1
+	bl	FlashProgPages
+	ldr	r3, [r8, #0]
+	adds	r3, r3, #1
+	bne	.L1997
+	uxth	r0, r7
+	bl	FtlBbmMapBadBlock
+	b	.L1996
+.L1997:
+	mov	r4, r5
+	mov	r5, sl
+.L1983:
+	uxth	r0, r7
+	adds	r4, r4, #1
+	bl	FtlBbmMapBadBlock
+	adds	r5, r5, #4
+.L1981:
+	ldr	r2, .L1998+24
+	ldrh	r3, [r2, #0]
+	cmp	r4, r3
+	bcc	.L1987
+	movs	r4, #0
+	ldr	r5, .L1998+28
+	b	.L1988
+.L1989:
+	mov	r0, r4
+	adds	r4, r4, #1
+	bl	FtlBbmMapBadBlock
+	uxth	r4, r4
+.L1988:
+	ldrh	r3, [r5, #0]
+	cmp	r3, r4
+	bhi	.L1989
+	ldr	r5, .L1998
+	movw	r6, #65535
+	ldrh	r4, [r5, #12]
+	subs	r4, r4, #1
+	uxth	r4, r4
+	b	.L1990
+.L1995:
+	mov	r0, r4
+	bl	FtlBbmIsBadBlock
+	cmp	r0, #1
+	beq	.L1991
+	mov	r0, r4
+	bl	FlashTestBlk
+	cbz	r0, .L1992
+	mov	r0, r4
+	bl	FtlBbmMapBadBlock
+	b	.L1991
+.L1992:
+	ldrh	r3, [r5, #0]
+	cmp	r3, r6
+	bne	.L1993
+	strh	r4, [r5, #0]	@ movhi
+	b	.L1991
+.L1993:
+	ldr	r3, .L1998
+	strh	r4, [r3, #4]	@ movhi
+	b	.L1994
+.L1991:
+	subs	r4, r4, #1
+	uxth	r4, r4
+.L1990:
+	ldrh	r3, [r5, #12]
+	subs	r3, r3, #47
+	cmp	r3, r4
+	ble	.L1995
+.L1994:
+	ldr	r4, .L1998
+	movs	r5, #0
+	ldr	r3, .L1998+32
+	movs	r1, #1
+	movs	r2, #2
+	str	r5, [r4, #8]
+	ldr	r0, [r3, #0]
+	ldrh	r3, [r4, #0]
+	strh	r5, [r4, #2]	@ movhi
+	lsls	r3, r3, #10
+	str	r3, [r0, #4]
+	ldrh	r3, [r4, #4]
+	lsls	r3, r3, #10
+	str	r3, [r0, #40]
+	bl	FlashEraseBlocks
+	ldrh	r0, [r4, #0]
+	bl	FtlBbmMapBadBlock
+	ldrh	r0, [r4, #4]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	ldr	r3, [r4, #8]
+	ldrh	r2, [r4, #4]
+	adds	r3, r3, #1
+	str	r3, [r4, #8]
+	ldrh	r3, [r4, #0]
+	strh	r5, [r4, #2]	@ movhi
+	strh	r2, [r4, #0]	@ movhi
+	strh	r3, [r4, #4]	@ movhi
+	bl	FtlBbmTblFlush
+	mov	r0, r5
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L1999:
+	.align	2
+.L1998:
+	.word	.LANCHOR89
+	.word	.LANCHOR66
+	.word	.LANCHOR96
+	.word	.LANCHOR180
+	.word	.LANCHOR90
+	.word	.LANCHOR197
+	.word	.LANCHOR60
+	.word	.LANCHOR75
+	.word	.LANCHOR93
+	.size	FtlMakeBbt, .-FtlMakeBbt
+	.section	.text.FtlLowFormat,"ax",%progbits
+	.align	1
+	.global	FtlLowFormat
+	.thumb
+	.thumb_func
+	.type	FtlLowFormat, %function
+FtlLowFormat:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r2, .L2021
+	movs	r3, #0
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	str	r3, [r2, #0]
+	ldr	r2, .L2021+4
+	str	r3, [r2, #0]
+	ldr	r3, .L2021+8
+	ldrh	r0, [r3, #0]
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlLoadBbt
+	cbz	r0, .L2001
+	bl	FtlMakeBbt
+.L2001:
+	ldr	r3, .L2021+12
+	ldr	r2, .L2021+16
+	ldrh	r4, [r3, #0]
+	ldr	r3, .L2021+20
+	lsls	r4, r4, #7
+	ldr	r0, [r3, #0]
+	ldr	r3, .L2021+24
+	ldr	r1, [r3, #0]
+	movs	r3, #0
+	b	.L2002
+.L2003:
+	mvns	r5, r3
+	orr	r5, r3, r5, lsl #16
+	str	r5, [r0, r3, lsl #2]
+	str	r2, [r1, r3, lsl #2]
+	adds	r3, r3, #1
+	uxth	r3, r3
+.L2002:
+	cmp	r3, r4
+	blt	.L2003
+	ldr	r3, .L2021+28
+	movs	r4, #0
+	ldr	r6, .L2021+32
+	ldrh	r5, [r3, #0]
+	b	.L2004
+.L2005:
+	mov	r0, r5
+	movs	r1, #1
+	bl	FtlLowFormatEraseBlock
+	adds	r5, r5, #1
+	uxth	r5, r5
+	adds	r4, r4, r0
+	uxth	r4, r4
+.L2004:
+	ldrh	r3, [r6, #0]
+	cmp	r3, r5
+	bhi	.L2005
+	ldr	r3, .L2021+36
+	ldrh	r1, [r3, #0]
+	subs	r3, r4, #2
+	cmp	r3, r1, lsl #1
+	bgt	.L2006
+.L2010:
+	movs	r4, #0
+	ldr	r6, .L2021+28
+	mov	r5, r4
+	b	.L2007
+.L2006:
+	mov	r0, r4
+	ldr	r5, .L2021+32
+	bl	__aeabi_uidiv
+	ldr	r3, .L2021+40
+	ldr	r3, [r3, #0]
+	adds	r0, r0, r3
+	uxth	r0, r0
+	bl	FtlSysBlkNumInit
+	ldr	r3, .L2021+8
+	ldrh	r0, [r3, #0]
+	bl	FtlFreeSysBlkQueueInit
+	ldr	r3, .L2021+28
+	ldrh	r4, [r3, #0]
+	b	.L2008
+.L2009:
+	mov	r0, r4
+	movs	r1, #1
+	bl	FtlLowFormatEraseBlock
+	adds	r4, r4, #1
+	uxth	r4, r4
+.L2008:
+	ldrh	r3, [r5, #0]
+	cmp	r3, r4
+	bhi	.L2009
+	b	.L2010
+.L2011:
+	mov	r0, r5
+	movs	r1, #0
+	bl	FtlLowFormatEraseBlock
+	adds	r5, r5, #1
+	uxth	r5, r5
+	adds	r4, r4, r0
+	uxth	r4, r4
+.L2007:
+	ldrh	r3, [r6, #0]
+	cmp	r3, r5
+	bhi	.L2011
+	ldr	r3, .L2021+32
+	ldr	r8, .L2021+64
+	ldr	sl, .L2021+68
+	ldrh	r2, [r3, #0]
+	ldr	r3, .L2021+44
+	str	r2, [r3, #0]
+	ldr	r3, .L2021+48
+	ldr	fp, [r3, #0]
+	ldr	r3, .L2021+36
+	mov	r0, fp
+	ldrh	r5, [r3, #0]
+	mov	r1, r5
+	bl	__aeabi_uidiv
+	ubfx	r7, r0, #5, #16
+	mov	r6, r0
+	add	r3, r7, #36
+	strh	r3, [r8, #0]	@ movhi
+	movs	r3, #24
+	muls	r3, r5, r3
+	cmp	r4, r3
+	str	r0, [sl, #0]
+	ble	.L2012
+	rsb	r0, r4, fp
+	mov	r1, r5
+	bl	__aeabi_uidiv
+	str	r0, [sl, #0]
+	lsrs	r0, r0, #5
+	adds	r0, r0, #24
+	strh	r0, [r8, #0]	@ movhi
+.L2012:
+	ldr	r3, .L2021+52
+	ldr	r3, [r3, #0]
+	cmp	r3, #1
+	bne	.L2013
+	mov	r0, r4
+	mov	r1, r5
+	bl	__aeabi_uidiv
+	ldr	r8, .L2021+64
+	ldrh	sl, [r8, #0]
+	uxtah	r0, sl, r0
+	add	sl, sl, r0, lsr #2
+	strh	sl, [r8, #0]	@ movhi
+.L2013:
+	ldr	r3, .L2021+56
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L2014
+	mov	r0, r4
+	mov	r1, r5
+	bl	__aeabi_uidiv
+	ldr	r8, .L2021+64
+	ldrh	sl, [r8, #0]
+	uxtah	r0, sl, r0
+	add	sl, sl, r0, lsr #2
+	strh	sl, [r8, #0]	@ movhi
+.L2014:
+	ldr	r3, .L2021+60
+	ldrh	r3, [r3, #0]
+	cbz	r3, .L2015
+	ldr	r2, .L2021+64
+	ldrh	r1, [r2, #0]
+	add	r1, r1, r3, lsr #1
+	strh	r1, [r2, #0]	@ movhi
+	mul	r1, r5, r3
+	cmp	r1, r4
+	ble	.L2015
+	ldr	r1, .L2021+68
+	adds	r3, r3, #32
+	adds	r7, r7, r3
+	strh	r7, [r2, #0]	@ movhi
+	str	r6, [r1, #0]
+.L2015:
+	ldr	r3, .L2021+68
+	ldr	r2, .L2021+64
+	ldr	r6, .L2021+72
+	ldr	r1, [r3, #0]
+	ldrh	r2, [r2, #0]
+	ldr	r4, .L2021+76
+	subs	r2, r1, r2
+	muls	r5, r2, r5
+	ldr	r2, .L2021+80
+	str	r5, [r2, #0]
+	ldr	r2, .L2021+84
+	ldrh	r2, [r2, #0]
+	muls	r5, r2, r5
+	str	r5, [r3, #0]
+	ldr	r3, .L2021+12
+	ldrh	r3, [r3, #0]
+	muls	r5, r3, r5
+	ldr	r3, .L2021+88
+	str	r5, [r3, #0]
+	movw	r5, #65535
+	bl	FtlBbmTblFlush
+	ldr	r3, .L2021+32
+	movs	r1, #0
+	ldr	r0, [r6, #0]
+	ldrh	r2, [r3, #0]
+	lsls	r2, r2, #1
+	bl	memset
+	ldr	r2, .L2021+92
+	movs	r3, #0
+	strh	r3, [r4, #2]	@ movhi
+	strb	r3, [r4, #6]
+	movs	r1, #255
+	str	r3, [r2, #0]
+	ldr	r2, .L2021+96
+	strh	r3, [r4, #0]	@ movhi
+	strh	r3, [r2, #2]	@ movhi
+	strb	r3, [r2, #6]
+	strb	r3, [r2, #8]
+	movs	r3, #1
+	strb	r3, [r4, #8]
+	ldr	r3, .L2021+28
+	strh	r5, [r2, #0]	@ movhi
+	ldrh	r2, [r3, #0]
+	ldr	r3, .L2021+100
+	lsrs	r2, r2, #3
+	ldr	r0, [r3, #0]
+	bl	memset
+.L2016:
+	ldr	r7, .L2021+76
+	mov	r0, r7
+	bl	make_superblock
+	ldrb	r2, [r4, #7]	@ zero_extendqisi2
+	ldr	r3, .L2021+72
+	cbnz	r2, .L2017
+	ldrh	r2, [r4, #0]
+	ldr	r3, [r6, #0]
+	strh	r5, [r3, r2, lsl #1]	@ movhi
+	ldrh	r3, [r4, #0]
+	adds	r3, r3, #1
+	strh	r3, [r4, #0]	@ movhi
+	b	.L2016
+.L2017:
+	ldr	r2, .L2021
+	movw	r6, #65535
+	ldr	r4, .L2021+104
+	ldrh	r0, [r7, #4]
+	ldr	r1, [r2, #0]
+	str	r1, [r7, #12]
+	adds	r1, r1, #1
+	str	r1, [r2, #0]
+	ldrh	r1, [r7, #0]
+	ldr	r2, [r3, #0]
+	strh	r0, [r2, r1, lsl #1]	@ movhi
+	movs	r2, #0
+	strh	r2, [r4, #2]	@ movhi
+	strb	r2, [r4, #6]
+	ldrh	r2, [r7, #0]
+	mov	r7, r3
+	adds	r2, r2, #1
+	strh	r2, [r4, #0]	@ movhi
+	movs	r2, #1
+	strb	r2, [r4, #8]
+.L2018:
+	ldr	r5, .L2021+104
+	mov	r0, r5
+	bl	make_superblock
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L2019
+	ldrh	r2, [r4, #0]
+	ldr	r3, [r7, #0]
+	strh	r6, [r3, r2, lsl #1]	@ movhi
+	ldrh	r3, [r4, #0]
+	adds	r3, r3, #1
+	strh	r3, [r4, #0]	@ movhi
+	b	.L2018
+.L2022:
+	.align	2
+.L2021:
+	.word	.LANCHOR153
+	.word	.LANCHOR154
+	.word	.LANCHOR54
+	.word	.LANCHOR71
+	.word	168778952
+	.word	.LANCHOR178
+	.word	.LANCHOR179
+	.word	.LANCHOR55
+	.word	.LANCHOR56
+	.word	.LANCHOR53
+	.word	.LANCHOR81
+	.word	.LANCHOR88
+	.word	.LANCHOR57
+	.word	.LANCHOR126
+	.word	.LANCHOR7
+	.word	.LANCHOR64
+	.word	.LANCHOR200
+	.word	.LANCHOR87
+	.word	.LANCHOR99
+	.word	.LANCHOR107
+	.word	.LANCHOR199
+	.word	.LANCHOR68
+	.word	.LANCHOR84
+	.word	.LANCHOR116
+	.word	.LANCHOR201
+	.word	.LANCHOR117
+	.word	.LANCHOR108
+.L2019:
+	ldr	r4, .L2023
+	ldrh	r1, [r5, #4]
+	ldrh	r2, [r5, #0]
+	ldr	r3, [r4, #0]
+	str	r3, [r5, #12]
+	adds	r3, r3, #1
+	str	r3, [r4, #0]
+	movw	r5, #65535
+	ldr	r3, .L2023+4
+	ldr	r3, [r3, #0]
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	ldr	r3, .L2023+8
+	strh	r5, [r3, #0]	@ movhi
+	bl	FtlFreeSysBlkQueueOut
+	ldr	r3, .L2023+12
+	movs	r2, #0
+	strh	r2, [r3, #2]	@ movhi
+	ldr	r2, .L2023+16
+	strh	r5, [r3, #4]	@ movhi
+	ldr	r2, [r2, #0]
+	strh	r2, [r3, #6]	@ movhi
+	ldr	r2, [r4, #0]
+	str	r2, [r3, #8]
+	adds	r2, r2, #1
+	str	r2, [r4, #0]
+	strh	r0, [r3, #0]	@ movhi
+	bl	FtlVpcTblFlush
+	bl	FtlSysBlkInit
+	cbnz	r0, .L2020
+	ldr	r3, .L2023+20
+	movs	r2, #1
+	str	r2, [r3, #0]
+.L2020:
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L2024:
+	.align	2
+.L2023:
+	.word	.LANCHOR153
+	.word	.LANCHOR99
+	.word	.LANCHOR109
+	.word	.LANCHOR191
+	.word	.LANCHOR199
+	.word	.LANCHOR222
+	.size	FtlLowFormat, .-FtlLowFormat
+	.section	.text.HynixGetReadRetryDefault,"ax",%progbits
+	.align	1
+	.global	HynixGetReadRetryDefault
+	.thumb
+	.thumb_func
+	.type	HynixGetReadRetryDefault, %function
+HynixGetReadRetryDefault:
+	@ args = 0, pretend = 0, frame = 64
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2114
+	movs	r2, #172
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r4, r0
+	movs	r1, #174
+	strb	r0, [r3, #0]
+	strb	r2, [r3, #4]
+	movs	r0, #173
+	movs	r2, #175
+	cmp	r4, #2
+	sub	sp, sp, #64
+	strb	r0, [r3, #5]
+	strb	r1, [r3, #6]
+	strb	r2, [r3, #7]
+	bne	.L2026
+	movs	r2, #167
+	strb	r2, [r3, #4]
+	ldr	r3, .L2114+4
+	movs	r2, #247
+	strb	r2, [r3, #17]
+	b	.L2081
+.L2026:
+	cmp	r4, #3
+	bne	.L2028
+	movs	r2, #176
+	strb	r2, [r3, #4]
+	movs	r2, #177
+	strb	r2, [r3, #5]
+	movs	r2, #178
+	strb	r2, [r3, #6]
+	movs	r2, #179
+	strb	r2, [r3, #7]
+	movs	r2, #180
+	strb	r2, [r3, #8]
+	movs	r2, #181
+	strb	r2, [r3, #9]
+	movs	r2, #182
+	strb	r2, [r3, #10]
+	movs	r2, #183
+	b	.L2108
+.L2028:
+	cmp	r4, #4
+	bne	.L2029
+	movs	r5, #204
+	strb	r0, [r3, #9]
+	strb	r5, [r3, #4]
+	movs	r5, #191
+	strb	r1, [r3, #10]
+	strb	r5, [r3, #5]
+	movs	r5, #170
+	strb	r5, [r3, #6]
+	movs	r5, #171
+	strb	r5, [r3, #7]
+	movs	r5, #205
+	strb	r5, [r3, #8]
+.L2108:
+	movs	r6, #8
+	strb	r2, [r3, #11]
+	mov	r5, r6
+	b	.L2027
+.L2029:
+	cmp	r4, #5
+	bne	.L2030
+	movs	r2, #56
+	movs	r6, #8
+	strb	r2, [r3, #4]
+	movs	r2, #57
+	strb	r2, [r3, #5]
+	movs	r2, #58
+	strb	r2, [r3, #6]
+	movs	r2, #59
+	strb	r2, [r3, #7]
+	b	.L2107
+.L2030:
+	cmp	r4, #6
+	bne	.L2031
+	movs	r2, #14
+	movs	r6, #12
+	strb	r2, [r3, #4]
+	movs	r2, #15
+	strb	r2, [r3, #5]
+	movs	r2, #16
+	strb	r2, [r3, #6]
+	movs	r2, #17
+	strb	r2, [r3, #7]
+	b	.L2107
+.L2031:
+	cmp	r4, #7
+	bne	.L2081
+	movs	r2, #176
+	movs	r6, #12
+	strb	r2, [r3, #4]
+	movs	r5, #10
+	movs	r2, #177
+	strb	r2, [r3, #5]
+	movs	r2, #178
+	strb	r2, [r3, #6]
+	movs	r2, #179
+	strb	r2, [r3, #7]
+	movs	r2, #180
+	strb	r2, [r3, #8]
+	movs	r2, #181
+	strb	r2, [r3, #9]
+	movs	r2, #182
+	strb	r2, [r3, #10]
+	movs	r2, #183
+	strb	r2, [r3, #11]
+	movs	r2, #212
+	strb	r2, [r3, #12]
+	movs	r2, #213
+	strb	r2, [r3, #13]
+	b	.L2027
+.L2081:
+	movs	r6, #7
+.L2107:
+	movs	r5, #4
+.L2027:
+	subs	r3, r4, #1
+	cmp	r3, #1
+	bhi	.L2103
+	b	.L2112
+.L2038:
+	ldr	r3, .L2114+8
+	mov	sl, #0
+	ldr	r1, .L2114+12
+	ldr	r4, .L2114+16
+	ldrb	r2, [r3, r7]	@ zero_extendqisi2
+	ldr	r0, [r1, r2, lsl #3]
+	add	r4, r4, r2, lsl #6
+	add	r2, r1, r2, lsl #3
+	ldrb	r3, [r2, #4]	@ zero_extendqisi2
+	movs	r2, #55
+	adds	r3, r3, #8
+	add	r3, r0, r3, lsl #8
+.L2034:
+	add	r1, r8, sl
+	str	r2, [r3, #8]
+	movs	r0, #80
+	ldrb	r1, [r1, #4]	@ zero_extendqisi2
+	str	r1, [r3, #4]
+	str	r2, [sp, #8]
+	str	r3, [sp, #12]
+	bl	udelay
+	ldr	r3, [sp, #12]
+	ldr	r1, [r3, #0]
+	strb	r1, [r4, sl]
+	add	sl, sl, #1
+	ldr	r2, [sp, #8]
+	uxtb	r1, sl
+	cmp	r1, r5
+	bcc	.L2034
+	movs	r3, #0
+	b	.L2035
+.L2036:
+	ldrb	ip, [sl, r2, lsl #2]	@ zero_extendqisi2
+	ldrb	r0, [r4, r3]	@ zero_extendqisi2
+	add	r0, ip, r0
+	strb	r0, [r1, r2, lsl #3]
+	adds	r2, r2, #1
+	cmp	r2, #7
+	bne	.L2036
+	adds	r3, r3, #1
+	cmp	r3, #4
+	beq	.L2037
+.L2035:
+	movs	r2, #1
+	adds	r1, r4, r3
+	add	sl, fp, r3
+	b	.L2036
+.L2037:
+	adds	r7, r7, #1
+	movs	r3, #0
+	strb	r3, [r4, #16]
+	strb	r3, [r4, #24]
+	uxtb	r7, r7
+	strb	r3, [r4, #32]
+	strb	r3, [r4, #40]
+	strb	r3, [r4, #48]
+	strb	r3, [r4, #41]
+	strb	r3, [r4, #49]
+	b	.L2032
+.L2112:
+	ldr	r8, .L2114
+	movs	r7, #0
+	ldr	fp, .L2114+4
+.L2032:
+	ldr	r3, .L2114+20
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cmp	r3, r7
+	bhi	.L2038
+	b	.L2039
+.L2103:
+	subs	r3, r4, #3
+	cmp	r3, #4
+	bhi	.L2039
+	smulbb	r3, r5, r6
+	str	r6, [sp, #48]
+	asrs	r2, r3, #2
+	lsls	r3, r3, #4
+	str	r3, [sp, #52]
+	movs	r3, #0
+	str	r3, [sp, #20]
+	subs	r3, r5, #1
+	str	r2, [sp, #24]
+	uxtb	r3, r3
+	str	r3, [sp, #56]
+	b	.L2040
+.L2080:
+	ldr	r3, .L2114+8
+	ldr	fp, [sp, #20]
+	ldrb	r6, [r3, fp]	@ zero_extendqisi2
+	ldr	r3, .L2114+12
+	mov	r0, r6
+	ldr	sl, [r3, r6, lsl #3]
+	add	r3, r3, r6, lsl #3
+	ldrb	r8, [r3, #4]	@ zero_extendqisi2
+	movs	r3, #255
+	add	r8, r8, #8
+	lsl	r8, r8, #8
+	add	r7, sl, r8
+	str	r3, [r7, #8]
+	bl	NandcWaitFlashReady
+	cmp	r4, #7
+	sxth	r3, r6
+	beq	.L2041
+	ldr	r1, .L2114+16
+	add	r3, r1, r3, lsl #6
+	b	.L2109
+.L2041:
+	lsls	r1, r3, #7
+	add	r3, r1, r3, lsl #5
+	ldr	r1, .L2114+24
+	adds	r3, r1, r3
+.L2109:
+	str	r3, [sp, #32]
+	movs	r3, #54
+	cmp	r4, #4
+	str	r3, [r7, #8]
+	bne	.L2043
+	movs	r3, #255
+	str	r3, [r7, #4]
+	movs	r3, #64
+	str	r3, [sl, r8]
+	movs	r3, #204
+	b	.L2110
+.L2043:
+	subs	r3, r4, #5
+	cmp	r3, #1
+	bhi	.L2045
+	ldr	r3, .L2114
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+	str	r3, [r7, #4]
+	movs	r3, #82
+	b	.L2111
+.L2045:
+	movs	r3, #174
+	str	r3, [r7, #4]
+	movs	r3, #0
+	str	r3, [sl, r8]
+	movs	r3, #176
+.L2110:
+	str	r3, [r7, #4]
+	movs	r3, #77
+.L2111:
+	str	r3, [sl, r8]
+	movs	r3, #22
+	str	r3, [r7, #8]
+	movs	r3, #23
+	str	r3, [r7, #8]
+	movs	r3, #4
+	str	r3, [r7, #8]
+	movs	r3, #25
+	str	r3, [r7, #8]
+	movs	r3, #0
+	cmp	r4, #6
+	str	r3, [r7, #8]
+	mov	r0, r6
+	str	r3, [r7, #4]
+	str	r3, [r7, #4]
+	it	eq
+	moveq	r3, #31
+	str	r3, [r7, #4]
+	movs	r3, #2
+	str	r3, [r7, #4]
+	movs	r3, #0
+	str	r3, [r7, #4]
+	movs	r3, #48
+	str	r3, [r7, #8]
+	bl	NandcWaitFlashReady
+	sub	ip, r4, #5
+	mov	r1, ip
+	str	ip, [sp, #36]
+	cmp	r1, #1
+	bls	.L2083
+	cmp	r4, #7
+	ite	eq
+	moveq	r1, #32
+	movne	r1, #2
+	b	.L2049
+.L2083:
+	movs	r1, #16
+.L2049:
+	ldr	r3, .L2114+28
+	ldr	r2, [r3, #0]
+	movs	r3, #0
+.L2050:
+	ldr	r0, [r7, #0]
+	strb	r0, [r2, r3]
+	adds	r3, r3, #1
+	uxtb	r0, r3
+	cmp	r0, r1
+	bcc	.L2050
+	cmp	r4, #7
+	bne	.L2051
+	movs	r3, #0
+.L2053:
+	ldrb	r1, [r2, #0]	@ zero_extendqisi2
+	cmp	r1, #12
+	beq	.L2052
+	ldrb	r1, [r2, #1]	@ zero_extendqisi2
+	cmp	r1, #10
+	beq	.L2052
+	adds	r3, r3, #1
+	adds	r2, r2, #4
+	uxtb	r3, r3
+	cmp	r3, #8
+	bne	.L2053
+	b	.L2054
+.L2052:
+	cmp	r3, #6
+	bls	.L2055
+.L2054:
+	ldr	r0, .L2114+32
+	movs	r1, #0
+	bl	printf
+.L2056:
+	b	.L2056
+.L2051:
+	cmp	r4, #6
+	bne	.L2055
+	movs	r3, #0
+.L2057:
+	ldrb	r1, [r2], #1	@ zero_extendqisi2
+	cmp	r1, #12
+	beq	.L2055
+	ldrb	r1, [r2, #7]	@ zero_extendqisi2
+	cmp	r1, #4
+	beq	.L2055
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	cmp	r3, #8
+	bne	.L2057
+	b	.L2113
+.L2059:
+	b	.L2059
+.L2115:
+	.align	2
+.L2114:
+	.word	.LANCHOR31
+	.word	.LANCHOR235
+	.word	.LANCHOR19
+	.word	.LANCHOR5
+	.word	.LANCHOR31+20
+	.word	.LANCHOR16
+	.word	.LANCHOR31+28
+	.word	.LANCHOR44
+	.word	.LC36
+.L2055:
+	ldr	r0, .L2116
+	movs	r3, #0
+	ldr	r0, [r0, #0]
+	str	r0, [sp, #40]
+.L2060:
+	ldr	r2, [r7, #0]
+	ldr	r1, [sp, #40]
+	strb	r2, [r1, r3]
+	adds	r3, r3, #1
+	ldr	r2, [sp, #52]
+	cmp	r3, r2
+	blt	.L2060
+	ldr	r3, .L2116
+	movs	r2, #8
+	ldr	ip, [sp, #24]
+	ldr	r1, [r3, #0]
+	lsl	r0, ip, #2
+	lsl	fp, ip, #3
+	str	r0, [sp, #44]
+	adds	r0, r1, r0
+.L2062:
+	movs	r3, #0
+	mov	lr, r3
+.L2061:
+	ldr	ip, [r0, r3]
+	add	lr, lr, #1
+	mvn	ip, ip
+	str	ip, [r0, r3]
+	ldr	ip, [sp, #24]
+	adds	r3, r3, #4
+	cmp	lr, ip
+	blt	.L2061
+	subs	r2, r2, #1
+	add	r0, r0, fp
+	bne	.L2062
+	mov	lr, r1
+	str	r2, [sp, #16]
+	str	r5, [sp, #60]
+	b	.L2063
+.L2067:
+	movs	r0, #1
+	mov	fp, #16
+	str	r3, [sp, #4]
+	lsl	r5, r0, r3
+	movs	r0, #0
+	mov	ip, r0
+	str	fp, [sp, #28]
+.L2065:
+	ldr	fp, [lr, r0]
+	ldr	r3, [sp, #44]
+	and	fp, r5, fp
+	adds	r0, r0, r3
+	ldr	r3, [sp, #28]
+	cmp	fp, r5
+	it	eq
+	addeq	ip, ip, #1
+	subs	r3, r3, #1
+	str	r3, [sp, #28]
+	bne	.L2065
+	ldr	r3, [sp, #4]
+	cmp	ip, #8
+	it	hi
+	orrhi	r2, r2, r5
+	adds	r3, r3, #1
+	cmp	r3, #32
+	bne	.L2067
+	ldr	fp, [sp, #16]
+	ldr	ip, [sp, #24]
+	add	fp, fp, #1
+	str	r2, [lr], #4
+	cmp	fp, ip
+	str	fp, [sp, #16]
+	bge	.L2085
+.L2063:
+	movs	r2, #0
+	mov	r3, r2
+	b	.L2067
+.L2085:
+	movs	r3, #0
+	ldr	r5, [sp, #60]
+	mov	r2, r3
+.L2068:
+	ldr	r0, [r1, r3]
+	cbnz	r0, .L2069
+	adds	r2, r2, #1
+.L2069:
+	adds	r3, r3, #4
+	cmp	r3, #32
+	bne	.L2068
+	cmp	r2, #7
+	ble	.L2070
+	ldr	r0, .L2116+4
+	movs	r2, #1
+	mov	r3, #1024
+	bl	rknand_print_hex
+	ldr	r0, .L2116+8
+	movs	r1, #0
+	bl	printf
+.L2071:
+	b	.L2071
+.L2070:
+	cmp	r4, #6
+	beq	.L2086
+	cmp	r4, #7
+	ite	eq
+	moveq	r0, #10
+	movne	r0, #8
+	str	r0, [sp, #16]
+	b	.L2072
+.L2086:
+	movs	r1, #4
+	str	r1, [sp, #16]
+.L2072:
+	cbz	r5, .L2073
+	ldr	r2, [sp, #56]
+	add	lr, r2, #1
+	b	.L2074
+.L2073:
+	mov	lr, #1
+.L2074:
+	ldr	r0, [sp, #40]
+	movs	r2, #0
+	ldr	r1, [sp, #32]
+	mov	fp, r4
+	b	.L2075
+.L2076:
+	ldrb	ip, [r4], #1	@ zero_extendqisi2
+	strb	ip, [r1, r3]
+	adds	r3, r3, #1
+	uxtb	ip, r3
+	cmp	ip, r5
+	bcc	.L2076
+	ldr	ip, [sp, #48]
+	adds	r2, r2, #1
+	ldr	r3, [sp, #16]
+	add	r0, r0, lr
+	cmp	r2, ip
+	add	r1, r1, r3
+	bge	.L2077
+.L2075:
+	mov	r4, r0
+	movs	r3, #0
+	b	.L2076
+.L2077:
+	movs	r3, #255
+	mov	r0, r6
+	str	r3, [r7, #8]
+	mov	r4, fp
+	bl	NandcWaitFlashReady
+	ldr	r1, [sp, #36]
+	cmp	r1, #1
+	bhi	.L2078
+	movs	r3, #54
+	str	r3, [r7, #8]
+	ldr	r3, .L2116+12
+	mov	r1, #-1
+	ldr	r0, [sp, #20]
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+	str	r3, [r7, #4]
+	movs	r3, #0
+	str	r3, [sl, r8]
+	movs	r3, #22
+	str	r3, [r7, #8]
+	bl	FlashReadCmd
+	b	.L2079
+.L2078:
+	movs	r3, #56
+	str	r3, [r7, #8]
+.L2079:
+	mov	r0, r6
+	bl	NandcWaitFlashReady
+	ldr	r2, [sp, #20]
+	adds	r3, r2, #1
+	uxtb	r3, r3
+	str	r3, [sp, #20]
+.L2040:
+	ldr	r0, .L2116+16
+	ldr	r2, [sp, #20]
+	ldrb	r3, [r0, #0]	@ zero_extendqisi2
+	cmp	r3, r2
+	bhi	.L2080
+	ldr	r6, [sp, #48]
+.L2039:
+	ldr	r3, .L2116+12
+	strb	r5, [r3, #1]
+	strb	r6, [r3, #2]
+	add	sp, sp, #64
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L2113:
+	movs	r1, #0
+	ldr	r0, .L2116+8
+	bl	printf
+	b	.L2059
+.L2117:
+	.align	2
+.L2116:
+	.word	.LANCHOR44
+	.word	.LC37
+	.word	.LC36
+	.word	.LANCHOR31
+	.word	.LANCHOR16
+	.size	HynixGetReadRetryDefault, .-HynixGetReadRetryDefault
+	.section	.text.FlashGetReadRetryDefault,"ax",%progbits
+	.align	1
+	.global	FlashGetReadRetryDefault
+	.thumb
+	.thumb_func
+	.type	FlashGetReadRetryDefault, %function
+FlashGetReadRetryDefault:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r3, r0
+	cmp	r0, #0
+	beq	.L2118
+	subs	r2, r0, #1
+	cmp	r2, #6
+	bhi	.L2120
+	b	HynixGetReadRetryDefault
+.L2120:
+	cmp	r0, #49
+	bne	.L2121
+	ldr	r0, .L2129
+	movs	r2, #64
+	ldr	r1, .L2129+4
+	strb	r3, [r0, #0]
+	movs	r3, #4
+	strb	r3, [r0, #1]
+	movs	r3, #15
+	strb	r3, [r0, #2]
+	adds	r0, r0, #4
+	b	.L2127
+.L2121:
+	cmp	r0, #33
+	beq	.L2122
+	cmp	r0, #65
+	beq	.L2122
+	cmp	r0, #66
+	bne	.L2123
+.L2122:
+	ldr	r0, .L2129
+	strb	r3, [r0, #0]
+	movs	r3, #4
+	b	.L2128
+.L2123:
+	cmp	r0, #34
+	beq	.L2124
+	cmp	r0, #67
+	bne	.L2125
+.L2124:
+	ldr	r0, .L2129
+	strb	r3, [r0, #0]
+	movs	r3, #5
+.L2128:
+	strb	r3, [r0, #1]
+	movs	r2, #45
+	movs	r3, #7
+	ldr	r1, .L2129+8
+	strb	r3, [r0, #2]
+	adds	r0, r0, #4
+	b	.L2127
+.L2125:
+	cmp	r0, #35
+	beq	.L2126
+	cmp	r0, #68
+	bne	.L2118
+.L2126:
+	ldr	r0, .L2129
+	movs	r2, #95
+	ldr	r1, .L2129+12
+	strb	r3, [r0, #0]
+	movs	r3, #5
+	strb	r3, [r0, #1]
+	movs	r3, #17
+	strb	r3, [r0, #2]
+	adds	r0, r0, #4
+.L2127:
+	b	memcpy
+.L2118:
+	bx	lr
+.L2130:
+	.align	2
+.L2129:
+	.word	.LANCHOR31
+	.word	.LANCHOR15
+	.word	.LANCHOR10
+	.word	.LANCHOR12
+	.size	FlashGetReadRetryDefault, .-FlashGetReadRetryDefault
+	.section	.text.FlashInit,"ax",%progbits
+	.align	1
+	.global	FlashInit
+	.thumb
+	.thumb_func
+	.type	FlashInit, %function
+FlashInit:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r4, r0
+	sub	sp, sp, #24
+	mov	r0, #32768
+	bl	ftl_malloc
+	ldr	r3, .L2180
+	movs	r5, #0
+	ldr	r8, .L2180+84
+	mov	r6, r5
+	str	r0, [r3, #0]
+	mov	r0, #32768
+	bl	ftl_malloc
+	ldr	r3, .L2180+4
+	str	r0, [r3, #0]
+	mov	r0, #4096
+	bl	ftl_malloc
+	ldr	r3, .L2180+8
+	str	r0, [r3, #0]
+	mov	r0, #32768
+	bl	ftl_malloc
+	ldr	r3, .L2180+12
+	str	r0, [r3, #0]
+	mov	r0, #4096
+	bl	ftl_malloc
+	ldr	r3, .L2180+16
+	ldr	r2, .L2180+20
+	str	r0, [r3, #0]
+	movs	r3, #50
+	strb	r3, [r2, #0]
+	mov	r0, r4
+	ldr	r2, .L2180+24
+	ldr	r4, .L2180+28
+	strb	r3, [r2, #0]
+	movs	r2, #128
+	ldr	r3, .L2180+32
+	mov	r7, r4
+	str	r5, [r3, #0]
+	ldr	r3, .L2180+36
+	str	r2, [r3, #0]
+	movs	r2, #60
+	ldr	r3, .L2180+40
+	strb	r5, [r3, #0]
+	ldr	r3, .L2180+44
+	str	r5, [r3, #0]
+	ldr	r3, .L2180+48
+	strb	r5, [r3, #0]
+	ldr	r3, .L2180+52
+	strb	r2, [r3, #0]
+	bl	NandcInit
+.L2136:
+	uxtb	r3, r6
+	str	r3, [sp, #16]
+	mov	r0, r3
+	bl	FlashReset
+	add	r2, r8, r5
+	ldr	r3, [sp, #16]
+	ldrb	sl, [r2, #4]	@ zero_extendqisi2
+	ldr	fp, [r5, r8]
+	mov	r0, r3
+	add	sl, sl, #8
+	lsl	sl, sl, #8
+	add	r2, fp, sl
+	str	r2, [sp, #20]
+	bl	NandcFlashCs
+	ldr	r2, [sp, #20]
+	movs	r1, #144
+	movs	r0, #200
+	str	r1, [r2, #8]
+	movs	r1, #0
+	str	r1, [r2, #4]
+	bl	udelay
+	ldr	r2, [fp, sl]
+	strb	r2, [r5, r7]
+	ldr	r2, [fp, sl]
+	strb	r2, [r4, #1]
+	ldr	r2, [fp, sl]
+	strb	r2, [r4, #2]
+	ldr	r2, [fp, sl]
+	strb	r2, [r4, #3]
+	ldr	r2, [fp, sl]
+	strb	r2, [r4, #4]
+	ldr	r2, [fp, sl]
+	strb	r2, [r4, #5]
+	ldr	r3, [sp, #16]
+	mov	r0, r3
+	bl	NandcFlashDeCs
+	ldrb	r2, [r5, r7]	@ zero_extendqisi2
+	subs	r3, r2, #1
+	uxtb	r3, r3
+	cmp	r3, #253
+	bhi	.L2132
+	ldrb	r1, [r4, #2]	@ zero_extendqisi2
+	ldrb	r3, [r4, #1]	@ zero_extendqisi2
+	ldr	r0, .L2180+56
+	str	r1, [sp, #0]
+	ldrb	r1, [r4, #3]	@ zero_extendqisi2
+	str	r1, [sp, #4]
+	ldrb	r1, [r4, #4]	@ zero_extendqisi2
+	str	r1, [sp, #8]
+	ldrb	r1, [r4, #5]	@ zero_extendqisi2
+	str	r1, [sp, #12]
+	adds	r1, r6, #1
+	bl	printf
+.L2132:
+	cbnz	r6, .L2133
+	ldrb	r3, [r7, #0]	@ zero_extendqisi2
+	subs	r3, r3, #1
+	uxtb	r3, r3
+	cmp	r3, #253
+	bhi	.L2172
+	ldrb	r3, [r7, #1]	@ zero_extendqisi2
+	cmp	r3, #255
+	beq	.L2172
+.L2133:
+	ldrb	r3, [r5, r7]	@ zero_extendqisi2
+	cmp	r3, #181
+	bne	.L2135
+	movs	r3, #44
+	strb	r3, [r5, r7]
+.L2135:
+	adds	r6, r6, #1
+	adds	r5, r5, #8
+	adds	r4, r4, #8
+	cmp	r6, #4
+	bne	.L2136
+	ldr	r3, .L2180+28
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cmp	r3, #173
+	beq	.L2137
+	ldr	r3, .L2180+60
+	ldr	r0, [r3, #0]
+	bl	NandcSetDdrMode
+.L2137:
+	movs	r1, #0
+	mov	r2, #852
+	ldr	r0, .L2180+64
+	bl	memset
+	ldr	r2, .L2180+68
+	ldr	r3, .L2180+72
+	str	r2, [r3, #0]
+	movs	r2, #0
+	ldr	r3, .L2180+76
+	strb	r2, [r3, #0]
+	ldr	r3, .L2180+28
+	ldrb	r3, [r3, #1]	@ zero_extendqisi2
+	cmp	r3, #241
+	beq	.L2138
+	cmp	r3, #218
+	beq	.L2138
+	cmp	r3, #220
+	bne	.L2139
+.L2138:
+	ldr	r2, .L2180+48
+	movs	r1, #1
+	ldr	r0, .L2180+28
+	strb	r1, [r2, #0]
+	movs	r2, #16
+	ldr	r1, .L2180+20
+	ldrb	r4, [r0, #0]	@ zero_extendqisi2
+	strb	r2, [r1, #0]
+	cmp	r4, #152
+	ldr	r1, .L2180+52
+	strb	r2, [r1, #0]
+	ldr	r2, .L2180+80
+	strb	r4, [r2, #1]
+	bne	.L2140
+	ldrsb	r0, [r0, #4]
+	cmp	r0, #0
+	blt	.L2140
+	movs	r0, #24
+	strb	r0, [r1, #0]
+.L2140:
+	cmp	r3, #218
+	bne	.L2141
+	mov	r1, #2048
+	b	.L2177
+.L2181:
+	.align	2
+.L2180:
+	.word	.LANCHOR44
+	.word	.LANCHOR41
+	.word	.LANCHOR234
+	.word	.LANCHOR203
+	.word	.LANCHOR204
+	.word	.LANCHOR1
+	.word	.LANCHOR49
+	.word	.LANCHOR22
+	.word	.LANCHOR46
+	.word	.LANCHOR2
+	.word	.LANCHOR35
+	.word	.LANCHOR50
+	.word	.LANCHOR0
+	.word	.LANCHOR45
+	.word	.LC38
+	.word	.LANCHOR187
+	.word	.LANCHOR31
+	.word	.LANCHOR18
+	.word	.LANCHOR23
+	.word	.LANCHOR4
+	.word	.LANCHOR236
+	.word	.LANCHOR5
+.L2141:
+	cmp	r3, #220
+	bne	.L2142
+	mov	r1, #4096
+.L2177:
+	strh	r1, [r2, #14]	@ movhi
+	strb	r3, [r2, #2]
+.L2142:
+	ldr	r1, .L2182
+	movs	r2, #32
+	ldr	r0, .L2182+4
+	bl	memcpy
+	ldr	r0, .L2182+8
+	ldr	r1, .L2182+12
+	movs	r2, #32
+	bl	memcpy
+.L2139:
+	ldr	r3, .L2182+16
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L2143
+	bl	FlashLoadPhyInfoInRam
+	cbnz	r0, .L2144
+	ldr	r3, .L2182+20
+	ldr	r4, .L2182+24
+	ldr	r3, [r3, #0]
+	ldrh	r0, [r3, #16]
+	ubfx	r0, r0, #8, #3
+	strb	r0, [r4, #0]
+	lsls	r2, r0, #31
+	bmi	.L2144
+	ldr	r3, .L2182+28
+	movs	r2, #1
+	strb	r2, [r3, #0]
+	bl	FlashSetInterfaceMode
+	ldrb	r0, [r4, #0]	@ zero_extendqisi2
+	bl	NandcSetMode
+.L2144:
+	ldr	r4, .L2182+20
+	ldr	r3, [r4, #0]
+	ldrb	r2, [r3, #26]	@ zero_extendqisi2
+	ldr	r3, .L2182+32
+	strb	r2, [r3, #0]
+	bl	FlashLoadPhyInfo
+	cmp	r0, #0
+	beq	.L2143
+	ldr	r3, [r4, #0]
+	ldr	r0, .L2182+36
+	ldrh	r1, [r3, #14]
+	bl	printf
+	bl	FlashLoadPhyInfoInRam
+	adds	r3, r0, #1
+	beq	.L2134
+	bl	FlashDieInfoInit
+	ldr	r3, [r4, #0]
+	ldrb	r0, [r3, #19]	@ zero_extendqisi2
+	bl	FlashGetReadRetryDefault
+	ldr	r1, .L2182+40
+	ldr	r3, [r4, #0]
+	ldrh	r1, [r1, #0]
+	ldrb	r2, [r3, #9]	@ zero_extendqisi2
+	addw	r1, r1, #4095
+	cmp	r2, r1, lsr #12
+	blt	.L2145
+	ldrh	r1, [r3, #14]
+	adds	r1, r1, #255
+	cmp	r2, r1, lsr #8
+	bge	.L2146
+.L2145:
+	ldrh	r2, [r3, #14]
+	bic	r2, r2, #255
+	strh	r2, [r3, #14]	@ movhi
+.L2146:
+	ldr	r3, .L2182+24
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	tst	r3, #6
+	beq	.L2147
+	bl	FlashSavePhyInfo
+	ldr	r3, .L2182+44
+	movs	r0, #0
+	ldr	r1, [r3, #0]
+	bl	FlashDdrParaScan
+.L2147:
+	bl	FlashSavePhyInfo
+.L2143:
+	ldr	r5, .L2182+20
+	ldr	r2, .L2182+32
+	ldr	r4, .L2182+48
+	ldr	r3, [r5, #0]
+	ldrb	r1, [r3, #26]	@ zero_extendqisi2
+	ldrb	r6, [r3, #18]	@ zero_extendqisi2
+	strb	r1, [r2, #0]
+	ldr	r1, .L2182+52
+	ldrh	r2, [r3, #16]
+	ubfx	r0, r2, #7, #1
+	strb	r0, [r1, #0]
+	ldr	r1, .L2182+56
+	ubfx	r0, r2, #3, #1
+	strb	r0, [r1, #0]
+	ubfx	r0, r2, #4, #1
+	ldr	r1, .L2182+60
+	ubfx	r2, r2, #8, #3
+	strb	r0, [r1, #0]
+	ldr	r1, .L2182+24
+	ldrh	r0, [r3, #10]
+	strb	r2, [r1, #0]
+	movs	r2, #0
+	ldrb	r1, [r3, #12]	@ zero_extendqisi2
+	str	r2, [r4, #0]
+	bl	__aeabi_idiv
+	mov	r1, r0
+	mov	r0, r6
+	bl	BuildFlashLsbPageTable
+	bl	FlashDieInfoInit
+	ldr	r3, [r5, #0]
+	ldrh	r2, [r3, #16]
+	lsls	r0, r2, #25
+	bpl	.L2148
+	ldrb	r0, [r3, #19]	@ zero_extendqisi2
+	ldr	r2, .L2182+64
+	ldr	r3, .L2182+68
+	ldrb	r1, [r2, #1]	@ zero_extendqisi2
+	strb	r0, [r3, #0]
+	ldr	r3, .L2182+72
+	strb	r1, [r3, #0]
+	ldrb	r1, [r2, #2]	@ zero_extendqisi2
+	ldr	r3, .L2182+76
+	strb	r1, [r3, #0]
+	subs	r1, r0, #1
+	cmp	r1, #6
+	bhi	.L2149
+	ldr	r3, .L2182+80
+	str	r3, [r4, #0]
+	subs	r3, r0, #5
+	cmp	r3, #1
+	bhi	.L2150
+	ldr	r3, .L2182+84
+	movs	r2, #1
+	str	r2, [r3, #0]
+	b	.L2151
+.L2150:
+	cmp	r0, #7
+	beq	.L2174
+.L2151:
+	ldr	r1, .L2182+88
+	b	.L2152
+.L2174:
+	add	r1, r2, #28
+.L2152:
+	movs	r3, #0
+	mov	r2, r3
+.L2154:
+	ldrsb	r4, [r1, r2]
+	cbnz	r4, .L2153
+	adds	r3, r3, #1
+.L2153:
+	adds	r2, r2, #1
+	cmp	r2, #32
+	bne	.L2154
+	cmp	r3, #27
+	bls	.L2148
+	bl	FlashGetReadRetryDefault
+	bl	FlashSavePhyInfo
+	b	.L2148
+.L2149:
+	sub	r2, r0, #17
+	cmp	r2, #2
+	bhi	.L2155
+	ldr	r2, .L2182+92
+	str	r2, [r4, #0]
+	movs	r2, #7
+	cmp	r0, #19
+	strb	r2, [r3, #0]
+	bne	.L2148
+	movs	r2, #15
+	b	.L2178
+.L2155:
+	cmp	r0, #33
+	beq	.L2156
+	cmp	r0, #65
+	beq	.L2156
+	cmp	r0, #66
+	bne	.L2157
+.L2156:
+	ldr	r2, .L2182+96
+	ldr	r3, .L2182+48
+	str	r2, [r3, #0]
+	movs	r2, #4
+	ldr	r3, .L2182+72
+	strb	r2, [r3, #0]
+	movs	r2, #7
+	ldr	r3, .L2182+76
+	b	.L2178
+.L2157:
+	cmp	r0, #67
+	beq	.L2158
+	cmp	r0, #34
+	beq	.L2158
+	cmp	r0, #35
+	beq	.L2158
+	cmp	r0, #68
+	bne	.L2159
+.L2158:
+	ldr	r2, .L2182+96
+	ldr	r3, .L2182+48
+	str	r2, [r3, #0]
+	movs	r2, #7
+	ldr	r3, .L2182+76
+	cmp	r0, #35
+	strb	r2, [r3, #0]
+	beq	.L2160
+	cmp	r0, #68
+	bne	.L2161
+.L2160:
+	movs	r2, #17
+	strb	r2, [r3, #0]
+.L2161:
+	subs	r0, r0, #67
+	ldr	r3, .L2182+72
+	cmp	r0, #1
+	bhi	.L2162
+	movs	r2, #4
+.L2178:
+	strb	r2, [r3, #0]
+	b	.L2148
+.L2162:
+	movs	r2, #5
+	b	.L2178
+.L2159:
+	cmp	r0, #49
+	bne	.L2148
+	ldr	r2, .L2182+100
+	ldr	r3, .L2182+48
+	str	r2, [r3, #0]
+.L2148:
+	ldr	r3, .L2182+104
+	ldr	r2, [r3, #0]
+	ldr	r3, .L2182+108
+	cmp	r2, r3
+	bne	.L2163
+	ldr	r3, .L2182+32
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L2163
+	ldr	r3, .L2182+20
+	movs	r2, #0
+	ldr	r3, [r3, #0]
+	strb	r2, [r3, #18]
+.L2163:
+	ldr	r3, .L2182+112
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cmp	r3, #44
+	bne	.L2164
+	ldr	r3, .L2182+28
+	ldrb	r2, [r3, #0]	@ zero_extendqisi2
+	cbz	r2, .L2164
+	movs	r2, #0
+	movs	r0, #1
+	strb	r2, [r3, #0]
+	bl	FlashSetInterfaceMode
+	movs	r0, #1
+	bl	NandcSetMode
+.L2164:
+	movs	r0, #0
+	bl	flash_enter_slc_mode
+	ldr	r3, .L2182+24
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	tst	r3, #6
+	beq	.L2165
+	ldr	r2, .L2182+28
+	ldrb	r2, [r2, #0]	@ zero_extendqisi2
+	cbnz	r2, .L2166
+	lsls	r1, r3, #31
+	bmi	.L2165
+.L2166:
+	ldr	r3, .L2182+44
+	movs	r0, #0
+	ldr	r1, [r3, #0]
+	bl	FlashDdrParaScan
+.L2165:
+	movs	r0, #0
+	bl	flash_exit_slc_mode
+	ldr	r3, .L2182+20
+	ldr	r3, [r3, #0]
+	ldrb	r0, [r3, #20]	@ zero_extendqisi2
+	bl	FlashBchSel
+	ldr	r0, .L2182+116
+	bl	FlashReadIdbDataRaw
+	ldr	r3, .L2182+120
+	cmp	r0, #0
+	bne	.L2167
+	ldr	r2, .L2182+124
+	ldrb	r1, [r3, #0]	@ zero_extendqisi2
+	ldrb	r2, [r2, #0]	@ zero_extendqisi2
+	cmp	r1, r2
+	it	hi
+	strbhi	r2, [r3, #0]
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cmp	r3, #15
+	bhi	.L2169
+	movs	r2, #16
+	ldr	r3, .L2182+120
+	b	.L2179
+.L2183:
+	.align	2
+.L2182:
+	.word	.LANCHOR27+32
+	.word	.LANCHOR6
+	.word	.LANCHOR18
+	.word	.LANCHOR236
+	.word	.LANCHOR0
+	.word	.LANCHOR23
+	.word	.LANCHOR34
+	.word	.LANCHOR35
+	.word	.LANCHOR7
+	.word	.LC39
+	.word	.LANCHOR24
+	.word	.LANCHOR47
+	.word	.LANCHOR51
+	.word	.LANCHOR4
+	.word	.LANCHOR189
+	.word	.LANCHOR33
+	.word	.LANCHOR31
+	.word	.LANCHOR11
+	.word	.LANCHOR14
+	.word	.LANCHOR42
+	.word	HynixReadRetrial
+	.word	.LANCHOR39
+	.word	.LANCHOR31+20
+	.word	MicronReadRetrial
+	.word	ToshibaReadRetrial
+	.word	SamsungReadRetrial
+	.word	.LANCHOR40
+	.word	1446522928
+	.word	.LANCHOR22
+	.word	.LANCHOR25
+	.word	.LANCHOR1
+	.word	.LANCHOR49
+.L2167:
+	movs	r2, #16
+.L2179:
+	strb	r2, [r3, #0]
+.L2169:
+	ldr	r3, .L2184
+	ldr	r4, .L2184+4
+	ldr	r5, [r3, #0]
+	ldrb	r1, [r5, #12]	@ zero_extendqisi2
+	ldrh	r6, [r5, #10]
+	ldrh	r7, [r5, #14]
+	strh	r1, [r4, #8]	@ movhi
+	mov	r0, r6
+	ldrb	r3, [r5, #7]	@ zero_extendqisi2
+	str	r3, [r4, #4]
+	ldr	r3, .L2184+8
+	ldr	r3, [r3, #0]
+	str	r3, [r4, #0]
+	ldr	r3, .L2184+12
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	strh	r3, [r4, #10]	@ movhi
+	ldrb	r3, [r5, #13]	@ zero_extendqisi2
+	strh	r6, [r4, #16]	@ movhi
+	strh	r7, [r4, #14]	@ movhi
+	strh	r3, [r4, #12]	@ movhi
+	bl	__aeabi_idiv
+	mov	r2, #512
+	strh	r0, [r4, #18]	@ movhi
+	ldrb	r3, [r5, #9]	@ zero_extendqisi2
+	muls	r6, r3, r6
+	strh	r2, [r4, #24]	@ movhi
+	uxth	r6, r6
+	ldr	r2, .L2184+16
+	strh	r3, [r4, #20]	@ movhi
+	strh	r6, [r4, #22]	@ movhi
+	ldrb	r1, [r2, #0]	@ zero_extendqisi2
+	strh	r1, [r4, #26]	@ movhi
+	ldr	r1, .L2184+20
+	ldrb	r1, [r1, #0]	@ zero_extendqisi2
+	cmp	r1, #1
+	bne	.L2170
+	lsls	r3, r3, #1
+	movs	r1, #16
+	lsrs	r7, r7, #1
+	strh	r3, [r4, #20]	@ movhi
+	lsls	r6, r6, #1
+	movs	r3, #8
+	strb	r1, [r2, #0]
+	strh	r7, [r4, #14]	@ movhi
+	strh	r6, [r4, #22]	@ movhi
+	strh	r3, [r4, #26]	@ movhi
+.L2170:
+	ldrb	r0, [r5, #20]	@ zero_extendqisi2
+	bl	FlashBchSel
+	movs	r0, #0
+	b	.L2134
+.L2172:
+	mvn	r0, #1
+.L2134:
+	add	sp, sp, #24
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L2185:
+	.align	2
+.L2184:
+	.word	.LANCHOR23
+	.word	.LANCHOR28
+	.word	.LANCHOR22
+	.word	.LANCHOR16
+	.word	.LANCHOR1
+	.word	.LANCHOR0
+	.size	FlashInit, .-FlashInit
+	.section	.text.rk_ftl_init,"ax",%progbits
+	.align	1
+	.global	rk_ftl_init
+	.thumb
+	.thumb_func
+	.type	rk_ftl_init, %function
+rk_ftl_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, lr}
+	bl	FlashInit
+	mov	r4, r0
+	cbnz	r0, .L2187
+	ldr	r0, .L2188
+	bl	FtlInit
+.L2187:
+	mov	r1, r4
+	ldr	r0, .L2188+4
+	bl	printf
+	mov	r0, r4
+	pop	{r4, pc}
+.L2189:
+	.align	2
+.L2188:
+	.word	.LANCHOR28
+	.word	.LC40
+	.size	rk_ftl_init, .-rk_ftl_init
+	.global	gc_ink_free_return_value
+	.global	FtlUpdateVaildLpnCount
+	.global	g_ect_tbl_power_up_flush
+	.global	power_up_flag
+	.global	g_LowFormat
+	.global	gFtlInitStatus
+	.global	DeviceCapacity
+	.global	ToshibaRefValue
+	.global	Toshiba15RefValue
+	.global	ToshibaA19RefValue
+	.global	SamsungRefValue
+	.global	refValueDefault
+	.global	random_seed
+	.global	gSlcNandParaInfo
+	.global	gNandParaInfo
+	.global	NandFlashParaTbl
+	.global	g_power_lost_recovery_flag
+	.global	c_mlc_erase_count_value
+	.global	g_recovery_ppa_tbl
+	.global	g_recovery_page_min_ver
+	.global	g_recovery_page_num
+	.global	g_cur_erase_blk
+	.global	g_gc_skip_write_count
+	.global	g_gc_head_data_block_count
+	.global	g_gc_head_data_block
+	.global	g_ftl_nand_free_count
+	.global	g_in_swl_replace
+	.global	g_in_gc_progress
+	.global	g_all_blk_used_slc_mode
+	.global	g_max_erase_count
+	.global	g_totle_sys_slc_erase_count
+	.global	g_totle_slc_erase_count
+	.global	g_min_erase_count
+	.global	g_totle_avg_erase_count
+	.global	g_totle_mlc_erase_count
+	.global	g_totle_l2p_write_count
+	.global	g_totle_cache_write_count
+	.global	g_tmp_data_superblock_id
+	.global	g_totle_read_page_count
+	.global	g_totle_discard_page_count
+	.global	g_totle_read_sector
+	.global	g_totle_write_sector
+	.global	g_totle_write_page_count
+	.global	g_totle_gc_page_count
+	.global	g_gc_blk_index
+	.global	g_gc_merge_free_blk_threshold
+	.global	g_gc_free_blk_threshold
+	.global	g_gc_bad_block_temp_tbl
+	.global	g_gc_bad_block_gc_index
+	.global	g_gc_bad_block_temp_num
+	.global	g_gc_next_blk_1
+	.global	g_gc_next_blk
+	.global	g_gc_cur_blk_max_valid_pages
+	.global	g_gc_cur_blk_valid_pages
+	.global	g_gc_page_offset
+	.global	g_gc_blk_num
+	.global	p_gc_blk_tbl
+	.global	p_gc_page_info
+	.global	g_sys_ext_data
+	.global	g_sys_save_data
+	.global	gp_last_act_superblock
+	.global	g_gc_superblock
+	.global	g_gc_temp_superblock
+	.global	g_buffer_superblock
+	.global	g_active_superblock
+	.global	g_num_data_superblocks
+	.global	g_num_free_superblocks
+	.global	p_data_block_list_tail
+	.global	p_data_block_list_head
+	.global	p_free_data_block_list_head
+	.global	p_data_block_list_table
+	.global	g_l2p_last_update_region_id
+	.global	p_l2p_map_buf
+	.global	p_l2p_ram_map
+	.global	g_totle_vendor_block
+	.global	p_vendor_region_ppn_table
+	.global	p_vendor_block_ver_table
+	.global	p_vendor_block_valid_page_count
+	.global	p_vendor_block_table
+	.global	g_totle_map_block
+	.global	p_map_region_ppn_table
+	.global	p_map_block_ver_table
+	.global	p_map_block_valid_page_count
+	.global	p_map_block_table
+	.global	p_blk_mode_table
+	.global	p_valid_page_count_check_table
+	.global	p_valid_page_count_table
+	.global	g_totle_swl_count
+	.global	p_swl_mul_table
+	.global	p_erase_count_table
+	.global	g_ect_tbl_info_size
+	.global	gp_ect_tbl_info
+	.global	g_gc_num_req
+	.global	c_gc_page_buf_num
+	.global	gp_gc_page_buf_info
+	.global	p_gc_data_buf
+	.global	p_gc_spare_buf
+	.global	p_io_spare_buf
+	.global	p_io_data_buf_1
+	.global	p_io_data_buf_0
+	.global	p_sys_spare_buf
+	.global	p_vendor_data_buf
+	.global	p_sys_data_buf_1
+	.global	p_sys_data_buf
+	.global	p_plane_order_table
+	.global	g_req_cache
+	.global	req_gc_dst
+	.global	req_gc
+	.global	req_erase
+	.global	req_prgm
+	.global	req_read
+	.global	req_sys
+	.global	gVendorBlkInfo
+	.global	gL2pMapInfo
+	.global	gSysFreeQueue
+	.global	gSysInfo
+	.global	gBbtInfo
+	.global	g_inkDie_check_enable
+	.global	g_SlcPartLbaEndSector
+	.global	g_MaxLbn
+	.global	g_VaildLpn
+	.global	g_MaxLpn
+	.global	g_MaxLbaSector
+	.global	g_GlobalDataVersion
+	.global	g_GlobalSysVersion
+	.global	ftl_gc_temp_power_lost_recovery_flag
+	.global	c_ftl_nand_max_data_blks
+	.global	c_ftl_nand_data_op_blks_per_plane
+	.global	c_ftl_nand_data_blks_per_plane
+	.global	c_ftl_nand_max_sys_blks
+	.global	c_ftl_nand_init_sys_blks_per_plane
+	.global	c_ftl_nand_sys_blks_per_plane
+	.global	c_ftl_vendor_part_size
+	.global	c_ftl_nand_max_vendor_blks
+	.global	c_ftl_nand_max_map_blks
+	.global	c_ftl_nand_map_blks_per_plane
+	.global	c_ftl_nand_vendor_region_num
+	.global	c_ftl_nand_l2pmap_ram_region_num
+	.global	c_ftl_nand_map_region_num
+	.global	c_ftl_nand_totle_phy_blks
+	.global	c_ftl_nand_reserved_blks
+	.global	c_ftl_nand_byte_pre_oob
+	.global	c_ftl_nand_byte_pre_page
+	.global	c_ftl_nand_sec_pre_page_shift
+	.global	c_ftl_nand_sec_pre_page
+	.global	c_ftl_nand_page_pre_super_blk
+	.global	c_ftl_nand_page_pre_slc_blk
+	.global	c_ftl_nand_page_pre_blk
+	.global	c_ftl_nand_bbm_buf_size
+	.global	c_ftl_nand_ext_blk_pre_plane
+	.global	c_ftl_nand_blk_pre_plane
+	.global	c_ftl_nand_planes_num
+	.global	c_ftl_nand_blks_per_die_shift
+	.global	c_ftl_nand_blks_per_die
+	.global	c_ftl_nand_planes_per_die
+	.global	c_ftl_nand_die_num
+	.global	c_ftl_nand_type
+	.global	gMasterTempBuf
+	.global	gMasterInfo
+	.global	gNandcDumpWriteEn
+	.global	gToggleModeClkDiv
+	.global	gBootDdrMode
+	.global	gNandcEccBits
+	.global	gpNandc1
+	.global	gpNandc
+	.global	g_nandc_version_data
+	.global	gNandcVer
+	.global	gNandChipMap
+	.global	gNandIDataBuf
+	.global	FlashDdrTunningReadCount
+	.global	FlashWaitBusyScheduleEn
+	.global	gNandPhyInfo
+	.global	gFlashProgCheckSpareBuffer
+	.global	gFlashProgCheckBuffer
+	.global	gFlashSpareBuffer
+	.global	gFlashPageBuffer1
+	.global	gFlashPageBuffer0
+	.global	gpFlashSaveInfo
+	.global	gReadRetryInfo
+	.global	gpNandParaInfo
+	.global	gNandOptPara
+	.global	g_slc2KBNand
+	.global	g_maxRetryCount
+	.global	g_maxRegNum
+	.global	g_retryMode
+	.global	gNandIDBResBlkNumSaveInFlash
+	.global	gNandIDBResBlkNum
+	.global	gNandFlashResEndPageAddr
+	.global	gNandFlashInfoBlockAddr
+	.global	gNandFlashIdbBlockAddr
+	.global	gNandFlashInfoBlockEcc
+	.global	gNandFlashIDBEccBits
+	.global	gNandFlashEccBits
+	.global	gNandRandomizer
+	.global	gBlockPageAlignSize
+	.global	gTotleBlock
+	.global	gNandMaxChip
+	.global	gNandMaxDie
+	.global	gFlashInterfaceMode
+	.global	gFlashSlcMode
+	.global	gFlashOnfiModeEn
+	.global	gFlashToggleModeEn
+	.global	gFlashSdrModeEn
+	.global	gMultiPageProgEn
+	.global	gMultiPageReadEn
+	.global	gpReadRetrial
+	.global	mlcPageToSlcPageTbl
+	.global	slcPageToMlcPageTbl
+	.global	DieAddrs
+	.global	gDieOp
+	.global	DieCsIndex
+	.global	IDByte
+	.global	read_retry_cur_offset
+	.section	.rodata
+.LANCHOR48 = . + 0
+.LC0:
+	.byte	60
+	.byte	40
+	.byte	24
+	.byte	16
+	.section	.bss.g_recovery_ppa_tbl,"aw",%nobits
+	.align	2
+.LANCHOR226 = . + 0
+	.type	g_recovery_ppa_tbl, %object
+	.size	g_recovery_ppa_tbl, 128
+g_recovery_ppa_tbl:
+	.space	128
+	.section	.bss.p_blk_mode_table,"aw",%nobits
+	.align	2
+.LANCHOR117 = . + 0
+	.type	p_blk_mode_table, %object
+	.size	p_blk_mode_table, 4
+p_blk_mode_table:
+	.space	4
+	.section	.rodata.__func__.8224,"a",%progbits
+.LANCHOR220 = . + 0
+	.type	__func__.8224, %object
+	.size	__func__.8224, 19
+__func__.8224:
+	.ascii	"FtlGcFreeTempBlock\000"
+	.section	.bss.p_gc_blk_tbl,"aw",%nobits
+	.align	2
+.LANCHOR143 = . + 0
+	.type	p_gc_blk_tbl, %object
+	.size	p_gc_blk_tbl, 4
+p_gc_blk_tbl:
+	.space	4
+	.section	.bss.g_ect_tbl_power_up_flush,"aw",%nobits
+	.align	1
+.LANCHOR214 = . + 0
+	.type	g_ect_tbl_power_up_flush, %object
+	.size	g_ect_tbl_power_up_flush, 2
+g_ect_tbl_power_up_flush:
+	.space	2
+	.section	.bss.gFlashSlcMode,"aw",%nobits
+.LANCHOR7 = . + 0
+	.type	gFlashSlcMode, %object
+	.size	gFlashSlcMode, 1
+gFlashSlcMode:
+	.space	1
+	.section	.data.gNandParaInfo,"aw",%progbits
+	.align	1
+.LANCHOR18 = . + 0
+	.type	gNandParaInfo, %object
+	.size	gNandParaInfo, 32
+gNandParaInfo:
+	.byte	0
+	.byte	0
+	.space	5
+	.byte	0
+	.byte	1
+	.byte	8
+	.short	128
+	.byte	2
+	.byte	1
+	.short	2048
+	.short	0
+	.byte	1
+	.byte	0
+	.byte	24
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.section	.bss.gNandRandomizer,"aw",%nobits
+.LANCHOR4 = . + 0
+	.type	gNandRandomizer, %object
+	.size	gNandRandomizer, 1
+gNandRandomizer:
+	.space	1
+	.section	.bss.gDieOp,"aw",%nobits
+	.align	2
+.LANCHOR21 = . + 0
+	.type	gDieOp, %object
+	.size	gDieOp, 128
+gDieOp:
+	.space	128
+	.section	.data.refValueDefault,"aw",%progbits
+.LANCHOR235 = . + 0
+	.type	refValueDefault, %object
+	.size	refValueDefault, 28
+refValueDefault:
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	6
+	.byte	10
+	.byte	6
+	.byte	0
+	.byte	-3
+	.byte	-7
+	.byte	-8
+	.byte	0
+	.byte	-6
+	.byte	-13
+	.byte	-15
+	.byte	0
+	.byte	-11
+	.byte	-20
+	.byte	-23
+	.byte	0
+	.byte	0
+	.byte	-26
+	.byte	-30
+	.byte	0
+	.byte	0
+	.byte	-32
+	.byte	-37
+	.section	.bss.gFlashToggleModeEn,"aw",%nobits
+.LANCHOR35 = . + 0
+	.type	gFlashToggleModeEn, %object
+	.size	gFlashToggleModeEn, 1
+gFlashToggleModeEn:
+	.space	1
+	.section	.bss.g_sys_ext_data,"aw",%nobits
+	.align	2
+.LANCHOR141 = . + 0
+	.type	g_sys_ext_data, %object
+	.size	g_sys_ext_data, 512
+g_sys_ext_data:
+	.space	512
+	.section	.rodata.__func__.8120,"a",%progbits
+.LANCHOR209 = . + 0
+	.type	__func__.8120, %object
+	.size	__func__.8120, 25
+__func__.8120:
+	.ascii	"allocate_data_superblock\000"
+	.section	.bss.c_ftl_nand_page_pre_super_blk,"aw",%nobits
+	.align	1
+.LANCHOR70 = . + 0
+	.type	c_ftl_nand_page_pre_super_blk, %object
+	.size	c_ftl_nand_page_pre_super_blk, 2
+c_ftl_nand_page_pre_super_blk:
+	.space	2
+	.section	.bss.g_inkDie_check_enable,"aw",%nobits
+	.align	2
+.LANCHOR126 = . + 0
+	.type	g_inkDie_check_enable, %object
+	.size	g_inkDie_check_enable, 4
+g_inkDie_check_enable:
+	.space	4
+	.section	.bss.gNandFlashEccBits,"aw",%nobits
+.LANCHOR29 = . + 0
+	.type	gNandFlashEccBits, %object
+	.size	gNandFlashEccBits, 1
+gNandFlashEccBits:
+	.space	1
+	.section	.bss.c_ftl_nand_data_op_blks_per_plane,"aw",%nobits
+	.align	1
+.LANCHOR200 = . + 0
+	.type	c_ftl_nand_data_op_blks_per_plane, %object
+	.size	c_ftl_nand_data_op_blks_per_plane, 2
+c_ftl_nand_data_op_blks_per_plane:
+	.space	2
+	.section	.bss.p_sys_data_buf_1,"aw",%nobits
+	.align	2
+.LANCHOR176 = . + 0
+	.type	p_sys_data_buf_1, %object
+	.size	p_sys_data_buf_1, 4
+p_sys_data_buf_1:
+	.space	4
+	.section	.bss.g_maxRetryCount,"aw",%nobits
+.LANCHOR42 = . + 0
+	.type	g_maxRetryCount, %object
+	.size	g_maxRetryCount, 1
+g_maxRetryCount:
+	.space	1
+	.section	.rodata.__func__.7721,"a",%progbits
+.LANCHOR212 = . + 0
+	.type	__func__.7721, %object
+	.size	__func__.7721, 16
+__func__.7721:
+	.ascii	"FtlMapWritePage\000"
+	.section	.bss.gMultiPageProgEn,"aw",%nobits
+.LANCHOR33 = . + 0
+	.type	gMultiPageProgEn, %object
+	.size	gMultiPageProgEn, 1
+gMultiPageProgEn:
+	.space	1
+	.section	.bss.gMasterInfo,"aw",%nobits
+	.align	2
+.LANCHOR38 = . + 0
+	.type	gMasterInfo, %object
+	.size	gMasterInfo, 32
+gMasterInfo:
+	.space	32
+	.section	.bss.gReadRetryInfo,"aw",%nobits
+.LANCHOR31 = . + 0
+	.type	gReadRetryInfo, %object
+	.size	gReadRetryInfo, 852
+gReadRetryInfo:
+	.space	852
+	.section	.bss.c_ftl_nand_die_num,"aw",%nobits
+	.align	1
+.LANCHOR60 = . + 0
+	.type	c_ftl_nand_die_num, %object
+	.size	c_ftl_nand_die_num, 2
+c_ftl_nand_die_num:
+	.space	2
+	.section	.bss.gToggleModeClkDiv,"aw",%nobits
+	.align	2
+	.type	gToggleModeClkDiv, %object
+	.size	gToggleModeClkDiv, 4
+gToggleModeClkDiv:
+	.space	4
+	.section	.bss.p_valid_page_count_table,"aw",%nobits
+	.align	2
+.LANCHOR99 = . + 0
+	.type	p_valid_page_count_table, %object
+	.size	p_valid_page_count_table, 4
+p_valid_page_count_table:
+	.space	4
+	.section	.bss.req_erase,"aw",%nobits
+	.align	2
+.LANCHOR93 = . + 0
+	.type	req_erase, %object
+	.size	req_erase, 4
+req_erase:
+	.space	4
+	.section	.bss.c_ftl_nand_max_data_blks,"aw",%nobits
+	.align	2
+.LANCHOR57 = . + 0
+	.type	c_ftl_nand_max_data_blks, %object
+	.size	c_ftl_nand_max_data_blks, 4
+c_ftl_nand_max_data_blks:
+	.space	4
+	.section	.bss.gNandFlashInfoBlockEcc,"aw",%nobits
+	.type	gNandFlashInfoBlockEcc, %object
+	.size	gNandFlashInfoBlockEcc, 1
+gNandFlashInfoBlockEcc:
+	.space	1
+	.section	.bss.g_nandc_version_data,"aw",%nobits
+	.align	2
+.LANCHOR40 = . + 0
+	.type	g_nandc_version_data, %object
+	.size	g_nandc_version_data, 4
+g_nandc_version_data:
+	.space	4
+	.section	.bss.gNandIDBResBlkNumSaveInFlash,"aw",%nobits
+.LANCHOR49 = . + 0
+	.type	gNandIDBResBlkNumSaveInFlash, %object
+	.size	gNandIDBResBlkNumSaveInFlash, 1
+gNandIDBResBlkNumSaveInFlash:
+	.space	1
+	.section	.bss.g_MaxLbn,"aw",%nobits
+	.align	2
+.LANCHOR199 = . + 0
+	.type	g_MaxLbn, %object
+	.size	g_MaxLbn, 4
+g_MaxLbn:
+	.space	4
+	.section	.bss.g_retryMode,"aw",%nobits
+.LANCHOR11 = . + 0
+	.type	g_retryMode, %object
+	.size	g_retryMode, 1
+g_retryMode:
+	.space	1
+	.section	.bss.gMasterTempBuf,"aw",%nobits
+	.align	2
+.LANCHOR188 = . + 0
+	.type	gMasterTempBuf, %object
+	.size	gMasterTempBuf, 4
+gMasterTempBuf:
+	.space	4
+	.section	.rodata.__func__.7617,"a",%progbits
+.LANCHOR106 = . + 0
+	.type	__func__.7617, %object
+	.size	__func__.7617, 17
+__func__.7617:
+	.ascii	"List_remove_node\000"
+	.section	.bss.gpFlashSaveInfo,"aw",%nobits
+	.align	2
+.LANCHOR43 = . + 0
+	.type	gpFlashSaveInfo, %object
+	.size	gpFlashSaveInfo, 4
+gpFlashSaveInfo:
+	.space	4
+	.section	.bss.g_GlobalSysVersion,"aw",%nobits
+	.align	2
+.LANCHOR153 = . + 0
+	.type	g_GlobalSysVersion, %object
+	.size	g_GlobalSysVersion, 4
+g_GlobalSysVersion:
+	.space	4
+	.section	.rodata.__func__.7840,"a",%progbits
+.LANCHOR192 = . + 0
+	.type	__func__.7840, %object
+	.size	__func__.7840, 14
+__func__.7840:
+	.ascii	"FtlScanSysBlk\000"
+	.section	.bss.gpReadRetrial,"aw",%nobits
+	.align	2
+.LANCHOR51 = . + 0
+	.type	gpReadRetrial, %object
+	.size	gpReadRetrial, 4
+gpReadRetrial:
+	.space	4
+	.section	.rodata.str1.1,"aMS",%progbits,1
+.LC1:
+	.ascii	"FlashEraseBlocks pageAddr error %x\012\000"
+.LC2:
+	.ascii	"micron RR %d row=%x,count %d,status=%d\012\000"
+.LC3:
+	.ascii	"ECC:%d\012\000"
+.LC4:
+	.ascii	"sdr read ok %x ecc=%d\012\000"
+.LC5:
+	.ascii	"sync para %d\012\000"
+.LC6:
+	.ascii	"TOG mode Read error %x %x\012\000"
+.LC7:
+	.ascii	"read retry status %x %x %x\012\000"
+.LC8:
+	.ascii	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\012"
+	.ascii	"\000"
+.LC9:
+	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
+.LC10:
+	.ascii	"%s\012\000"
+.LC11:
+	.ascii	"!!!!! FTL sys Error !!!!!\000"
+.LC12:
+	.ascii	"%s 0x%x:\000"
+.LC13:
+	.ascii	"%x \000"
+.LC14:
+	.ascii	"\000"
+.LC15:
+	.ascii	"Read pageadd=%x  ecc=%x err=%x\012\000"
+.LC16:
+	.ascii	"data:\000"
+.LC17:
+	.ascii	"spare:\000"
+.LC18:
+	.ascii	"ReadRetry pageadd=%x ecc=%x err=%x\012\000"
+.LC19:
+	.ascii	"slc mode\000"
+.LC20:
+	.ascii	"no ect\000"
+.LC21:
+	.ascii	"prog error: = %x\012\000"
+.LC22:
+	.ascii	"prog read error: = %x\012\000"
+.LC23:
+	.ascii	"prog read s error: = %x %x %x\012\000"
+.LC24:
+	.ascii	"prog read d error: = %x %x %x\012\000"
+.LC25:
+	.ascii	"FtlVpcTblFlush error = %x error count = %d\012\000"
+.LC26:
+	.ascii	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\012\000"
+.LC27:
+	.ascii	"FtlBbmTblFlush error:%x\012\000"
+.LC28:
+	.ascii	"FtlBbmTblFlush error = %x error count = %d\012\000"
+.LC29:
+	.ascii	"decrement_vpc_count %x = %d\012\000"
+.LC30:
+	.ascii	"FtlMapWritePage error = %x \012\000"
+.LC31:
+	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
+.LC32:
+	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
+.LC33:
+	.ascii	"spuer block %x vpn is 0\012 \000"
+.LC34:
+	.ascii	"FtlWrite: lpa error:%x %x\012\000"
+.LC35:
+	.ascii	"BBT:\000"
+.LC36:
+	.ascii	"otp error! %d\000"
+.LC37:
+	.ascii	"rr\000"
+.LC38:
+	.ascii	"No.%d FLASH ID:%x %x %x %x %x %x\012\000"
+.LC39:
+	.ascii	"FlashLoadPhyInfo fail %x!!\012\000"
+.LC40:
+	.ascii	"FtlInit %x\012\000"
+	.section	.bss.gNandFlashIdbBlockAddr,"aw",%nobits
+	.align	2
+.LANCHOR46 = . + 0
+	.type	gNandFlashIdbBlockAddr, %object
+	.size	gNandFlashIdbBlockAddr, 4
+gNandFlashIdbBlockAddr:
+	.space	4
+	.section	.bss.req_sys,"aw",%nobits
+	.align	2
+.LANCHOR197 = . + 0
+	.type	req_sys, %object
+	.size	req_sys, 36
+req_sys:
+	.space	36
+	.section	.bss.gFlashSpareBuffer,"aw",%nobits
+	.align	2
+.LANCHOR234 = . + 0
+	.type	gFlashSpareBuffer, %object
+	.size	gFlashSpareBuffer, 4
+gFlashSpareBuffer:
+	.space	4
+	.section	.bss.p_vendor_block_ver_table,"aw",%nobits
+	.align	2
+.LANCHOR185 = . + 0
+	.type	p_vendor_block_ver_table, %object
+	.size	p_vendor_block_ver_table, 4
+p_vendor_block_ver_table:
+	.space	4
+	.section	.bss.g_gc_next_blk,"aw",%nobits
+	.align	1
+.LANCHOR146 = . + 0
+	.type	g_gc_next_blk, %object
+	.size	g_gc_next_blk, 2
+g_gc_next_blk:
+	.space	2
+	.section	.bss.mlcPageToSlcPageTbl,"aw",%nobits
+	.align	2
+.LANCHOR9 = . + 0
+	.type	mlcPageToSlcPageTbl, %object
+	.size	mlcPageToSlcPageTbl, 1024
+mlcPageToSlcPageTbl:
+	.space	1024
+	.section	.bss.c_ftl_nand_sec_pre_page_shift,"aw",%nobits
+	.align	1
+.LANCHOR72 = . + 0
+	.type	c_ftl_nand_sec_pre_page_shift, %object
+	.size	c_ftl_nand_sec_pre_page_shift, 2
+c_ftl_nand_sec_pre_page_shift:
+	.space	2
+	.section	.rodata.__func__.8134,"a",%progbits
+.LANCHOR217 = . + 0
+	.type	__func__.8134, %object
+	.size	__func__.8134, 29
+__func__.8134:
+	.ascii	"allocate_new_data_superblock\000"
+	.section	.bss.read_retry_cur_offset,"aw",%nobits
+.LANCHOR32 = . + 0
+	.type	read_retry_cur_offset, %object
+	.size	read_retry_cur_offset, 4
+read_retry_cur_offset:
+	.space	4
+	.section	.bss.p_vendor_block_valid_page_count,"aw",%nobits
+	.align	2
+.LANCHOR184 = . + 0
+	.type	p_vendor_block_valid_page_count, %object
+	.size	p_vendor_block_valid_page_count, 4
+p_vendor_block_valid_page_count:
+	.space	4
+	.section	.bss.gNandcVer,"aw",%nobits
+	.align	2
+.LANCHOR37 = . + 0
+	.type	gNandcVer, %object
+	.size	gNandcVer, 4
+gNandcVer:
+	.space	4
+	.section	.bss.g_num_free_superblocks,"aw",%nobits
+	.align	1
+.LANCHOR104 = . + 0
+	.type	g_num_free_superblocks, %object
+	.size	g_num_free_superblocks, 2
+g_num_free_superblocks:
+	.space	2
+	.section	.bss.p_data_block_list_table,"aw",%nobits
+	.align	2
+.LANCHOR97 = . + 0
+	.type	p_data_block_list_table, %object
+	.size	p_data_block_list_table, 4
+p_data_block_list_table:
+	.space	4
+	.section	.rodata.__func__.7894,"a",%progbits
+.LANCHOR198 = . + 0
+	.type	__func__.7894, %object
+	.size	__func__.7894, 15
+__func__.7894:
+	.ascii	"FtlLoadSysInfo\000"
+	.section	.bss.g_gc_skip_write_count,"aw",%nobits
+	.align	2
+.LANCHOR169 = . + 0
+	.type	g_gc_skip_write_count, %object
+	.size	g_gc_skip_write_count, 4
+g_gc_skip_write_count:
+	.space	4
+	.section	.bss.c_ftl_nand_data_blks_per_plane,"aw",%nobits
+	.align	1
+.LANCHOR55 = . + 0
+	.type	c_ftl_nand_data_blks_per_plane, %object
+	.size	c_ftl_nand_data_blks_per_plane, 2
+c_ftl_nand_data_blks_per_plane:
+	.space	2
+	.section	.bss.gc_ink_free_return_value,"aw",%nobits
+	.align	1
+.LANCHOR228 = . + 0
+	.type	gc_ink_free_return_value, %object
+	.size	gc_ink_free_return_value, 2
+gc_ink_free_return_value:
+	.space	2
+	.section	.rodata.__func__.7583,"a",%progbits
+.LANCHOR105 = . + 0
+	.type	__func__.7583, %object
+	.size	__func__.7583, 17
+__func__.7583:
+	.ascii	"INSERT_FREE_LIST\000"
+	.section	.bss.DieAddrs,"aw",%nobits
+	.align	2
+.LANCHOR20 = . + 0
+	.type	DieAddrs, %object
+	.size	DieAddrs, 32
+DieAddrs:
+	.space	32
+	.section	.bss.g_totle_mlc_erase_count,"aw",%nobits
+	.align	2
+.LANCHOR161 = . + 0
+	.type	g_totle_mlc_erase_count, %object
+	.size	g_totle_mlc_erase_count, 4
+g_totle_mlc_erase_count:
+	.space	4
+	.section	.rodata.__func__.7587,"a",%progbits
+.LANCHOR102 = . + 0
+	.type	__func__.7587, %object
+	.size	__func__.7587, 17
+__func__.7587:
+	.ascii	"INSERT_DATA_LIST\000"
+	.section	.data.gSlcNandParaInfo,"aw",%progbits
+	.align	1
+.LANCHOR236 = . + 0
+	.type	gSlcNandParaInfo, %object
+	.size	gSlcNandParaInfo, 32
+gSlcNandParaInfo:
+	.byte	2
+	.byte	-104
+	.byte	-15
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	1
+	.byte	1
+	.byte	4
+	.short	64
+	.byte	1
+	.byte	1
+	.short	1024
+	.short	256
+	.byte	0
+	.byte	0
+	.byte	16
+	.byte	40
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.section	.bss.p_sys_spare_buf,"aw",%nobits
+	.align	2
+.LANCHOR180 = . + 0
+	.type	p_sys_spare_buf, %object
+	.size	p_sys_spare_buf, 4
+p_sys_spare_buf:
+	.space	4
+	.section	.bss.g_gc_bad_block_gc_index,"aw",%nobits
+	.align	1
+.LANCHOR150 = . + 0
+	.type	g_gc_bad_block_gc_index, %object
+	.size	g_gc_bad_block_gc_index, 2
+g_gc_bad_block_gc_index:
+	.space	2
+	.section	.bss.gNandFlashResEndPageAddr,"aw",%nobits
+	.align	2
+	.type	gNandFlashResEndPageAddr, %object
+	.size	gNandFlashResEndPageAddr, 4
+gNandFlashResEndPageAddr:
+	.space	4
+	.section	.bss.gp_gc_page_buf_info,"aw",%nobits
+	.align	2
+.LANCHOR131 = . + 0
+	.type	gp_gc_page_buf_info, %object
+	.size	gp_gc_page_buf_info, 4
+gp_gc_page_buf_info:
+	.space	4
+	.section	.bss.g_gc_cur_blk_max_valid_pages,"aw",%nobits
+	.align	1
+.LANCHOR230 = . + 0
+	.type	g_gc_cur_blk_max_valid_pages, %object
+	.size	g_gc_cur_blk_max_valid_pages, 2
+g_gc_cur_blk_max_valid_pages:
+	.space	2
+	.section	.rodata.__func__.7474,"a",%progbits
+.LANCHOR202 = . + 0
+	.type	__func__.7474, %object
+	.size	__func__.7474, 11
+__func__.7474:
+	.ascii	"FtlLoadBbt\000"
+	.section	.bss.g_totle_write_sector,"aw",%nobits
+	.align	2
+.LANCHOR193 = . + 0
+	.type	g_totle_write_sector, %object
+	.size	g_totle_write_sector, 4
+g_totle_write_sector:
+	.space	4
+	.section	.bss.c_ftl_nand_ext_blk_pre_plane,"aw",%nobits
+	.align	1
+.LANCHOR64 = . + 0
+	.type	c_ftl_nand_ext_blk_pre_plane, %object
+	.size	c_ftl_nand_ext_blk_pre_plane, 2
+c_ftl_nand_ext_blk_pre_plane:
+	.space	2
+	.section	.bss.gpNandc1,"aw",%nobits
+	.align	2
+	.type	gpNandc1, %object
+	.size	gpNandc1, 4
+gpNandc1:
+	.space	4
+	.section	.bss.g_in_swl_replace,"aw",%nobits
+	.align	2
+.LANCHOR166 = . + 0
+	.type	g_in_swl_replace, %object
+	.size	g_in_swl_replace, 4
+g_in_swl_replace:
+	.space	4
+	.section	.bss.FlashDdrTunningReadCount,"aw",%nobits
+	.align	2
+.LANCHOR50 = . + 0
+	.type	FlashDdrTunningReadCount, %object
+	.size	FlashDdrTunningReadCount, 4
+FlashDdrTunningReadCount:
+	.space	4
+	.section	.bss.gBootDdrMode,"aw",%nobits
+	.align	2
+.LANCHOR187 = . + 0
+	.type	gBootDdrMode, %object
+	.size	gBootDdrMode, 4
+gBootDdrMode:
+	.space	4
+	.section	.bss.gNandMaxChip,"aw",%nobits
+.LANCHOR17 = . + 0
+	.type	gNandMaxChip, %object
+	.size	gNandMaxChip, 1
+gNandMaxChip:
+	.space	1
+	.section	.bss.c_mlc_erase_count_value,"aw",%nobits
+	.align	1
+.LANCHOR63 = . + 0
+	.type	c_mlc_erase_count_value, %object
+	.size	c_mlc_erase_count_value, 2
+c_mlc_erase_count_value:
+	.space	2
+	.section	.bss.p_map_block_table,"aw",%nobits
+	.align	2
+.LANCHOR122 = . + 0
+	.type	p_map_block_table, %object
+	.size	p_map_block_table, 4
+p_map_block_table:
+	.space	4
+	.section	.data.SamsungRefValue,"aw",%progbits
+.LANCHOR15 = . + 0
+	.type	SamsungRefValue, %object
+	.size	SamsungRefValue, 64
+SamsungRefValue:
+	.byte	-89
+	.byte	-92
+	.byte	-91
+	.byte	-90
+	.byte	0
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+	.byte	0
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+	.byte	-26
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+	.byte	-24
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+	.byte	-5
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+	.byte	10
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+	.byte	-48
+	.byte	-62
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+	.byte	15
+	.byte	-5
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+	.byte	-24
+	.byte	-5
+	.byte	-24
+	.byte	-36
+	.byte	30
+	.byte	20
+	.byte	-5
+	.byte	-20
+	.byte	-5
+	.byte	-1
+	.byte	-5
+	.byte	-8
+	.byte	7
+	.byte	12
+	.byte	2
+	.byte	0
+	.section	.rodata.__func__.8140,"a",%progbits
+.LANCHOR208 = . + 0
+	.type	__func__.8140, %object
+	.size	__func__.8140, 19
+__func__.8140:
+	.ascii	"get_new_active_ppa\000"
+	.section	.data.NandOptPara,"aw",%progbits
+.LANCHOR27 = . + 0
+	.type	NandOptPara, %object
+	.size	NandOptPara, 128
+NandOptPara:
+	.byte	1
+	.byte	0
+	.byte	49
+	.byte	63
+	.byte	0
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+	.byte	-128
+	.byte	21
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+	.byte	112
+	.byte	120
+	.byte	120
+	.byte	3
+	.byte	1
+	.byte	0
+	.space	14
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+	.byte	49
+	.byte	63
+	.byte	0
+	.byte	49
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+	.byte	-127
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+	.byte	0
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+	.space	14
+	.byte	3
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+	.byte	63
+	.byte	0
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+	.byte	21
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+	.byte	-127
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+	.byte	-15
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+	.byte	0
+	.byte	0
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+	.byte	4
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+	.byte	0
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+	.byte	21
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+	.byte	-127
+	.byte	112
+	.byte	112
+	.byte	112
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	14
+	.section	.bss.c_ftl_nand_blks_per_die,"aw",%nobits
+	.align	1
+.LANCHOR66 = . + 0
+	.type	c_ftl_nand_blks_per_die, %object
+	.size	c_ftl_nand_blks_per_die, 2
+c_ftl_nand_blks_per_die:
+	.space	2
+	.section	.rodata.__func__.7364,"a",%progbits
+.LANCHOR233 = . + 0
+	.type	__func__.7364, %object
+	.size	__func__.7364, 10
+__func__.7364:
+	.ascii	"ftl_write\000"
+	.section	.bss.g_totle_read_sector,"aw",%nobits
+	.align	2
+.LANCHOR194 = . + 0
+	.type	g_totle_read_sector, %object
+	.size	g_totle_read_sector, 4
+g_totle_read_sector:
+	.space	4
+	.section	.bss.c_ftl_nand_max_sys_blks,"aw",%nobits
+	.align	2
+.LANCHOR54 = . + 0
+	.type	c_ftl_nand_max_sys_blks, %object
+	.size	c_ftl_nand_max_sys_blks, 4
+c_ftl_nand_max_sys_blks:
+	.space	4
+	.section	.bss.g_slc2KBNand,"aw",%nobits
+.LANCHOR0 = . + 0
+	.type	g_slc2KBNand, %object
+	.size	g_slc2KBNand, 1
+g_slc2KBNand:
+	.space	1
+	.section	.rodata.__func__.7743,"a",%progbits
+.LANCHOR114 = . + 0
+	.type	__func__.7743, %object
+	.size	__func__.7743, 22
+__func__.7743:
+	.ascii	"select_l2p_ram_region\000"
+	.section	.data.Toshiba15RefValue,"aw",%progbits
+.LANCHOR12 = . + 0
+	.type	Toshiba15RefValue, %object
+	.size	Toshiba15RefValue, 95
+Toshiba15RefValue:
+	.byte	4
+	.byte	5
+	.byte	6
+	.byte	7
+	.byte	13
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+	.byte	0
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+	.byte	112
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+	.byte	2
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+	.byte	120
+	.byte	0
+	.byte	124
+	.byte	118
+	.byte	116
+	.byte	114
+	.byte	0
+	.section	.bss.g_gc_next_blk_1,"aw",%nobits
+	.align	1
+.LANCHOR147 = . + 0
+	.type	g_gc_next_blk_1, %object
+	.size	g_gc_next_blk_1, 2
+g_gc_next_blk_1:
+	.space	2
+	.section	.rodata.__func__.7820,"a",%progbits
+.LANCHOR205 = . + 0
+	.type	__func__.7820, %object
+	.size	__func__.7820, 15
+__func__.7820:
+	.ascii	"FtlVpcTblFlush\000"
+	.section	.bss.c_ftl_nand_map_region_num,"aw",%nobits
+	.align	1
+.LANCHOR82 = . + 0
+	.type	c_ftl_nand_map_region_num, %object
+	.size	c_ftl_nand_map_region_num, 2
+c_ftl_nand_map_region_num:
+	.space	2
+	.section	.bss.req_gc,"aw",%nobits
+	.align	2
+.LANCHOR132 = . + 0
+	.type	req_gc, %object
+	.size	req_gc, 4
+req_gc:
+	.space	4
+	.section	.bss.gpNandc,"aw",%nobits
+	.align	2
+.LANCHOR30 = . + 0
+	.type	gpNandc, %object
+	.size	gpNandc, 4
+gpNandc:
+	.space	4
+	.section	.bss.g_totle_vendor_block,"aw",%nobits
+	.align	1
+.LANCHOR85 = . + 0
+	.type	g_totle_vendor_block, %object
+	.size	g_totle_vendor_block, 2
+g_totle_vendor_block:
+	.space	2
+	.section	.bss.p_l2p_ram_map,"aw",%nobits
+	.align	2
+.LANCHOR112 = . + 0
+	.type	p_l2p_ram_map, %object
+	.size	p_l2p_ram_map, 4
+p_l2p_ram_map:
+	.space	4
+	.section	.bss.FlashWaitBusyScheduleEn,"aw",%nobits
+	.align	2
+	.type	FlashWaitBusyScheduleEn, %object
+	.size	FlashWaitBusyScheduleEn, 4
+FlashWaitBusyScheduleEn:
+	.space	4
+	.section	.bss.p_plane_order_table,"aw",%nobits
+.LANCHOR62 = . + 0
+	.type	p_plane_order_table, %object
+	.size	p_plane_order_table, 32
+p_plane_order_table:
+	.space	32
+	.section	.bss.DieCsIndex,"aw",%nobits
+	.align	2
+.LANCHOR19 = . + 0
+	.type	DieCsIndex, %object
+	.size	DieCsIndex, 8
+DieCsIndex:
+	.space	8
+	.section	.bss.g_totle_cache_write_count,"aw",%nobits
+	.align	2
+.LANCHOR158 = . + 0
+	.type	g_totle_cache_write_count, %object
+	.size	g_totle_cache_write_count, 4
+g_totle_cache_write_count:
+	.space	4
+	.section	.bss.g_gc_num_req,"aw",%nobits
+	.align	2
+.LANCHOR128 = . + 0
+	.type	g_gc_num_req, %object
+	.size	g_gc_num_req, 4
+g_gc_num_req:
+	.space	4
+	.section	.bss.c_ftl_nand_byte_pre_oob,"aw",%nobits
+	.align	1
+.LANCHOR74 = . + 0
+	.type	c_ftl_nand_byte_pre_oob, %object
+	.size	c_ftl_nand_byte_pre_oob, 2
+c_ftl_nand_byte_pre_oob:
+	.space	2
+	.section	.bss.g_gc_bad_block_temp_tbl,"aw",%nobits
+	.align	1
+.LANCHOR149 = . + 0
+	.type	g_gc_bad_block_temp_tbl, %object
+	.size	g_gc_bad_block_temp_tbl, 34
+g_gc_bad_block_temp_tbl:
+	.space	34
+	.section	.bss.gFlashSdrModeEn,"aw",%nobits
+	.type	gFlashSdrModeEn, %object
+	.size	gFlashSdrModeEn, 1
+gFlashSdrModeEn:
+	.space	1
+	.section	.bss.p_data_block_list_tail,"aw",%nobits
+	.align	2
+.LANCHOR100 = . + 0
+	.type	p_data_block_list_tail, %object
+	.size	p_data_block_list_tail, 4
+p_data_block_list_tail:
+	.space	4
+	.section	.bss.gFlashInterfaceMode,"aw",%nobits
+.LANCHOR34 = . + 0
+	.type	gFlashInterfaceMode, %object
+	.size	gFlashInterfaceMode, 1
+gFlashInterfaceMode:
+	.space	1
+	.section	.bss.p_map_block_ver_table,"aw",%nobits
+	.align	2
+.LANCHOR123 = . + 0
+	.type	p_map_block_ver_table, %object
+	.size	p_map_block_ver_table, 4
+p_map_block_ver_table:
+	.space	4
+	.section	.bss.gNandcEccBits,"aw",%nobits
+	.align	2
+.LANCHOR36 = . + 0
+	.type	gNandcEccBits, %object
+	.size	gNandcEccBits, 4
+gNandcEccBits:
+	.space	4
+	.section	.data.ToshibaA19RefValue,"aw",%progbits
+.LANCHOR10 = . + 0
+	.type	ToshibaA19RefValue, %object
+	.size	ToshibaA19RefValue, 45
+ToshibaA19RefValue:
+	.byte	4
+	.byte	5
+	.byte	6
+	.byte	7
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+	.byte	112
+	.byte	0
+	.byte	2
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+	.byte	126
+	.byte	124
+	.byte	0
+	.section	.bss.g_totle_swl_count,"aw",%nobits
+	.align	2
+.LANCHOR136 = . + 0
+	.type	g_totle_swl_count, %object
+	.size	g_totle_swl_count, 4
+g_totle_swl_count:
+	.space	4
+	.section	.bss.gBbtInfo,"aw",%nobits
+	.align	2
+.LANCHOR89 = . + 0
+	.type	gBbtInfo, %object
+	.size	gBbtInfo, 60
+gBbtInfo:
+	.space	60
+	.section	.bss.c_ftl_nand_byte_pre_page,"aw",%nobits
+	.align	1
+.LANCHOR73 = . + 0
+	.type	c_ftl_nand_byte_pre_page, %object
+	.size	c_ftl_nand_byte_pre_page, 2
+c_ftl_nand_byte_pre_page:
+	.space	2
+	.section	.bss.g_power_lost_recovery_flag,"aw",%nobits
+	.align	1
+.LANCHOR224 = . + 0
+	.type	g_power_lost_recovery_flag, %object
+	.size	g_power_lost_recovery_flag, 2
+g_power_lost_recovery_flag:
+	.space	2
+	.section	.bss.gNandIDBResBlkNum,"aw",%nobits
+.LANCHOR1 = . + 0
+	.type	gNandIDBResBlkNum, %object
+	.size	gNandIDBResBlkNum, 1
+gNandIDBResBlkNum:
+	.space	1
+	.section	.bss.gNandcDumpWriteEn,"aw",%nobits
+	.align	2
+.LANCHOR39 = . + 0
+	.type	gNandcDumpWriteEn, %object
+	.size	gNandcDumpWriteEn, 4
+gNandcDumpWriteEn:
+	.space	4
+	.section	.bss.gFlashProgCheckSpareBuffer,"aw",%nobits
+	.align	2
+.LANCHOR204 = . + 0
+	.type	gFlashProgCheckSpareBuffer, %object
+	.size	gFlashProgCheckSpareBuffer, 4
+gFlashProgCheckSpareBuffer:
+	.space	4
+	.section	.bss.g_tmp_data_superblock_id,"aw",%nobits
+	.align	1
+.LANCHOR135 = . + 0
+	.type	g_tmp_data_superblock_id, %object
+	.size	g_tmp_data_superblock_id, 2
+g_tmp_data_superblock_id:
+	.space	2
+	.section	.bss.c_ftl_nand_totle_phy_blks,"aw",%nobits
+	.align	2
+.LANCHOR58 = . + 0
+	.type	c_ftl_nand_totle_phy_blks, %object
+	.size	c_ftl_nand_totle_phy_blks, 4
+c_ftl_nand_totle_phy_blks:
+	.space	4
+	.section	.bss.p_map_region_ppn_table,"aw",%nobits
+	.align	2
+.LANCHOR124 = . + 0
+	.type	p_map_region_ppn_table, %object
+	.size	p_map_region_ppn_table, 4
+p_map_region_ppn_table:
+	.space	4
+	.section	.bss.g_gc_cur_blk_valid_pages,"aw",%nobits
+	.align	1
+.LANCHOR229 = . + 0
+	.type	g_gc_cur_blk_valid_pages, %object
+	.size	g_gc_cur_blk_valid_pages, 2
+g_gc_cur_blk_valid_pages:
+	.space	2
+	.section	.bss.p_gc_page_info,"aw",%nobits
+	.align	2
+.LANCHOR145 = . + 0
+	.type	p_gc_page_info, %object
+	.size	p_gc_page_info, 4
+p_gc_page_info:
+	.space	4
+	.section	.bss.c_ftl_nand_l2pmap_ram_region_num,"aw",%nobits
+	.align	1
+.LANCHOR83 = . + 0
+	.type	c_ftl_nand_l2pmap_ram_region_num, %object
+	.size	c_ftl_nand_l2pmap_ram_region_num, 2
+c_ftl_nand_l2pmap_ram_region_num:
+	.space	2
+	.section	.bss.gc_discard_updated,"aw",%nobits
+	.align	2
+.LANCHOR221 = . + 0
+	.type	gc_discard_updated, %object
+	.size	gc_discard_updated, 4
+gc_discard_updated:
+	.space	4
+	.section	.rodata.__func__.7759,"a",%progbits
+.LANCHOR215 = . + 0
+	.type	__func__.7759, %object
+	.size	__func__.7759, 9
+__func__.7759:
+	.ascii	"log2phys\000"
+	.section	.bss.g_ect_tbl_info_size,"aw",%nobits
+	.align	1
+.LANCHOR182 = . + 0
+	.type	g_ect_tbl_info_size, %object
+	.size	g_ect_tbl_info_size, 2
+g_ect_tbl_info_size:
+	.space	2
+	.section	.bss.g_all_blk_used_slc_mode,"aw",%nobits
+	.align	2
+.LANCHOR152 = . + 0
+	.type	g_all_blk_used_slc_mode, %object
+	.size	g_all_blk_used_slc_mode, 4
+g_all_blk_used_slc_mode:
+	.space	4
+	.section	.rodata.__func__.8040,"a",%progbits
+.LANCHOR125 = . + 0
+	.type	__func__.8040, %object
+	.size	__func__.8040, 16
+__func__.8040:
+	.ascii	"make_superblock\000"
+	.section	.bss.c_ftl_nand_vendor_region_num,"aw",%nobits
+	.align	1
+.LANCHOR78 = . + 0
+	.type	c_ftl_nand_vendor_region_num, %object
+	.size	c_ftl_nand_vendor_region_num, 2
+c_ftl_nand_vendor_region_num:
+	.space	2
+	.section	.bss.g_ftl_nand_free_count,"aw",%nobits
+	.align	2
+.LANCHOR232 = . + 0
+	.type	g_ftl_nand_free_count, %object
+	.size	g_ftl_nand_free_count, 4
+g_ftl_nand_free_count:
+	.space	4
+	.section	.data.ToshibaRefValue,"aw",%progbits
+.LANCHOR13 = . + 0
+	.type	ToshibaRefValue, %object
+	.size	ToshibaRefValue, 8
+ToshibaRefValue:
+	.byte	0
+	.byte	4
+	.byte	124
+	.byte	120
+	.byte	116
+	.byte	8
+	.byte	12
+	.byte	112
+	.section	.bss.g_l2p_last_update_region_id,"aw",%nobits
+	.align	1
+.LANCHOR113 = . + 0
+	.type	g_l2p_last_update_region_id, %object
+	.size	g_l2p_last_update_region_id, 2
+g_l2p_last_update_region_id:
+	.space	2
+	.section	.bss.g_gc_page_offset,"aw",%nobits
+	.align	1
+.LANCHOR144 = . + 0
+	.type	g_gc_page_offset, %object
+	.size	g_gc_page_offset, 2
+g_gc_page_offset:
+	.space	2
+	.section	.rodata.__func__.8060,"a",%progbits
+.LANCHOR127 = . + 0
+	.type	__func__.8060, %object
+	.size	__func__.8060, 18
+__func__.8060:
+	.ascii	"SupperBlkListInit\000"
+	.section	.bss.g_gc_blk_num,"aw",%nobits
+	.align	1
+.LANCHOR142 = . + 0
+	.type	g_gc_blk_num, %object
+	.size	g_gc_blk_num, 2
+g_gc_blk_num:
+	.space	2
+	.section	.bss.c_ftl_nand_max_map_blks,"aw",%nobits
+	.align	2
+.LANCHOR80 = . + 0
+	.type	c_ftl_nand_max_map_blks, %object
+	.size	c_ftl_nand_max_map_blks, 4
+c_ftl_nand_max_map_blks:
+	.space	4
+	.section	.bss.g_totle_read_page_count,"aw",%nobits
+	.align	2
+.LANCHOR160 = . + 0
+	.type	g_totle_read_page_count, %object
+	.size	g_totle_read_page_count, 4
+g_totle_read_page_count:
+	.space	4
+	.section	.rodata.__func__.7648,"a",%progbits
+.LANCHOR110 = . + 0
+	.type	__func__.7648, %object
+	.size	__func__.7648, 22
+__func__.7648:
+	.ascii	"List_update_data_list\000"
+	.section	.bss.p_swl_mul_table,"aw",%nobits
+	.align	2
+.LANCHOR139 = . + 0
+	.type	p_swl_mul_table, %object
+	.size	p_swl_mul_table, 4
+p_swl_mul_table:
+	.space	4
+	.section	.bss.ftl_gc_temp_power_lost_recovery_flag,"aw",%nobits
+	.align	2
+.LANCHOR137 = . + 0
+	.type	ftl_gc_temp_power_lost_recovery_flag, %object
+	.size	ftl_gc_temp_power_lost_recovery_flag, 4
+ftl_gc_temp_power_lost_recovery_flag:
+	.space	4
+	.section	.bss.p_vendor_data_buf,"aw",%nobits
+	.align	2
+.LANCHOR177 = . + 0
+	.type	p_vendor_data_buf, %object
+	.size	p_vendor_data_buf, 4
+p_vendor_data_buf:
+	.space	4
+	.section	.data.gc_tmp_blk_bops_scan_addr,"aw",%progbits
+	.align	1
+.LANCHOR190 = . + 0
+	.type	gc_tmp_blk_bops_scan_addr, %object
+	.size	gc_tmp_blk_bops_scan_addr, 2
+gc_tmp_blk_bops_scan_addr:
+	.short	-1
+	.section	.rodata.__func__.8315,"a",%progbits
+.LANCHOR231 = . + 0
+	.type	__func__.8315, %object
+	.size	__func__.8315, 23
+__func__.8315:
+	.ascii	"rk_ftl_garbage_collect\000"
+	.section	.bss.p_vendor_region_ppn_table,"aw",%nobits
+	.align	2
+.LANCHOR186 = . + 0
+	.type	p_vendor_region_ppn_table, %object
+	.size	p_vendor_region_ppn_table, 4
+p_vendor_region_ppn_table:
+	.space	4
+	.section	.bss.p_map_block_valid_page_count,"aw",%nobits
+	.align	2
+.LANCHOR118 = . + 0
+	.type	p_map_block_valid_page_count, %object
+	.size	p_map_block_valid_page_count, 4
+p_map_block_valid_page_count:
+	.space	4
+	.section	.bss.req_prgm,"aw",%nobits
+	.align	2
+.LANCHOR175 = . + 0
+	.type	req_prgm, %object
+	.size	req_prgm, 4
+req_prgm:
+	.space	4
+	.section	.bss.g_totle_l2p_write_count,"aw",%nobits
+	.align	2
+.LANCHOR159 = . + 0
+	.type	g_totle_l2p_write_count, %object
+	.size	g_totle_l2p_write_count, 4
+g_totle_l2p_write_count:
+	.space	4
+	.section	.bss.g_num_data_superblocks,"aw",%nobits
+	.align	1
+.LANCHOR101 = . + 0
+	.type	g_num_data_superblocks, %object
+	.size	g_num_data_superblocks, 2
+g_num_data_superblocks:
+	.space	2
+	.section	.bss.c_ftl_nand_blk_pre_plane,"aw",%nobits
+	.align	1
+.LANCHOR56 = . + 0
+	.type	c_ftl_nand_blk_pre_plane, %object
+	.size	c_ftl_nand_blk_pre_plane, 2
+c_ftl_nand_blk_pre_plane:
+	.space	2
+	.section	.bss.g_gc_head_data_block,"aw",%nobits
+	.align	2
+.LANCHOR167 = . + 0
+	.type	g_gc_head_data_block, %object
+	.size	g_gc_head_data_block, 4
+g_gc_head_data_block:
+	.space	4
+	.section	.bss.g_totle_slc_erase_count,"aw",%nobits
+	.align	2
+.LANCHOR162 = . + 0
+	.type	g_totle_slc_erase_count, %object
+	.size	g_totle_slc_erase_count, 4
+g_totle_slc_erase_count:
+	.space	4
+	.section	.rodata.__func__.7685,"a",%progbits
+.LANCHOR111 = . + 0
+	.type	__func__.7685, %object
+	.size	__func__.7685, 26
+__func__.7685:
+	.ascii	"ftl_map_blk_alloc_new_blk\000"
+	.section	.bss.req_gc_dst,"aw",%nobits
+	.align	2
+.LANCHOR174 = . + 0
+	.type	req_gc_dst, %object
+	.size	req_gc_dst, 4
+req_gc_dst:
+	.space	4
+	.section	.bss.req_read,"aw",%nobits
+	.align	2
+.LANCHOR173 = . + 0
+	.type	req_read, %object
+	.size	req_read, 4
+req_read:
+	.space	4
+	.section	.bss.g_totle_avg_erase_count,"aw",%nobits
+	.align	2
+.LANCHOR195 = . + 0
+	.type	g_totle_avg_erase_count, %object
+	.size	g_totle_avg_erase_count, 4
+g_totle_avg_erase_count:
+	.space	4
+	.section	.bss.c_ftl_nand_planes_per_die,"aw",%nobits
+	.align	1
+.LANCHOR61 = . + 0
+	.type	c_ftl_nand_planes_per_die, %object
+	.size	c_ftl_nand_planes_per_die, 2
+c_ftl_nand_planes_per_die:
+	.space	2
+	.section	.rodata.__func__.7427,"a",%progbits
+.LANCHOR91 = . + 0
+	.type	__func__.7427, %object
+	.size	__func__.7427, 14
+__func__.7427:
+	.ascii	"FtlBbt2Bitmap\000"
+	.section	.bss.g_gc_merge_free_blk_threshold,"aw",%nobits
+	.align	1
+.LANCHOR171 = . + 0
+	.type	g_gc_merge_free_blk_threshold, %object
+	.size	g_gc_merge_free_blk_threshold, 2
+g_gc_merge_free_blk_threshold:
+	.space	2
+	.section	.rodata.__func__.7986,"a",%progbits
+.LANCHOR223 = . + 0
+	.type	__func__.7986, %object
+	.size	__func__.7986, 22
+__func__.7986:
+	.ascii	"FtlRecoverySuperblock\000"
+	.section	.bss.g_MaxLpn,"aw",%nobits
+	.align	2
+.LANCHOR87 = . + 0
+	.type	g_MaxLpn, %object
+	.size	g_MaxLpn, 4
+g_MaxLpn:
+	.space	4
+	.section	.bss.gpNandParaInfo,"aw",%nobits
+	.align	2
+.LANCHOR23 = . + 0
+	.type	gpNandParaInfo, %object
+	.size	gpNandParaInfo, 4
+gpNandParaInfo:
+	.space	4
+	.section	.bss.g_LowFormat,"aw",%nobits
+	.align	2
+.LANCHOR227 = . + 0
+	.type	g_LowFormat, %object
+	.size	g_LowFormat, 4
+g_LowFormat:
+	.space	4
+	.section	.bss.c_ftl_nand_type,"aw",%nobits
+	.align	1
+.LANCHOR59 = . + 0
+	.type	c_ftl_nand_type, %object
+	.size	c_ftl_nand_type, 2
+c_ftl_nand_type:
+	.space	2
+	.section	.bss.gSysFreeQueue,"aw",%nobits
+	.align	1
+.LANCHOR92 = . + 0
+	.type	gSysFreeQueue, %object
+	.size	gSysFreeQueue, 2056
+gSysFreeQueue:
+	.space	2056
+	.section	.bss.slcPageToMlcPageTbl,"aw",%nobits
+	.align	2
+.LANCHOR8 = . + 0
+	.type	slcPageToMlcPageTbl, %object
+	.size	slcPageToMlcPageTbl, 512
+slcPageToMlcPageTbl:
+	.space	512
+	.section	.bss.c_ftl_nand_sys_blks_per_plane,"aw",%nobits
+	.align	2
+.LANCHOR52 = . + 0
+	.type	c_ftl_nand_sys_blks_per_plane, %object
+	.size	c_ftl_nand_sys_blks_per_plane, 4
+c_ftl_nand_sys_blks_per_plane:
+	.space	4
+	.section	.bss.g_buffer_superblock,"aw",%nobits
+	.align	2
+.LANCHOR108 = . + 0
+	.type	g_buffer_superblock, %object
+	.size	g_buffer_superblock, 48
+g_buffer_superblock:
+	.space	48
+	.section	.bss.p_sys_data_buf,"aw",%nobits
+	.align	2
+.LANCHOR96 = . + 0
+	.type	p_sys_data_buf, %object
+	.size	p_sys_data_buf, 4
+p_sys_data_buf:
+	.space	4
+	.section	.bss.c_ftl_nand_reserved_blks,"aw",%nobits
+	.align	1
+.LANCHOR75 = . + 0
+	.type	c_ftl_nand_reserved_blks, %object
+	.size	c_ftl_nand_reserved_blks, 2
+c_ftl_nand_reserved_blks:
+	.space	2
+	.section	.bss.g_maxRegNum,"aw",%nobits
+.LANCHOR14 = . + 0
+	.type	g_maxRegNum, %object
+	.size	g_maxRegNum, 1
+g_maxRegNum:
+	.space	1
+	.section	.bss.p_gc_spare_buf,"aw",%nobits
+	.align	2
+.LANCHOR130 = . + 0
+	.type	p_gc_spare_buf, %object
+	.size	p_gc_spare_buf, 4
+p_gc_spare_buf:
+	.space	4
+	.section	.bss.gFlashProgCheckBuffer,"aw",%nobits
+	.align	2
+.LANCHOR203 = . + 0
+	.type	gFlashProgCheckBuffer, %object
+	.size	gFlashProgCheckBuffer, 4
+gFlashProgCheckBuffer:
+	.space	4
+	.section	.bss.gNandFlashInfoBlockAddr,"aw",%nobits
+	.align	2
+.LANCHOR47 = . + 0
+	.type	gNandFlashInfoBlockAddr, %object
+	.size	gNandFlashInfoBlockAddr, 4
+gNandFlashInfoBlockAddr:
+	.space	4
+	.section	.bss.p_valid_page_count_check_table,"aw",%nobits
+	.align	2
+	.type	p_valid_page_count_check_table, %object
+	.size	p_valid_page_count_check_table, 4
+p_valid_page_count_check_table:
+	.space	4
+	.section	.bss.p_io_spare_buf,"aw",%nobits
+	.align	2
+.LANCHOR181 = . + 0
+	.type	p_io_spare_buf, %object
+	.size	p_io_spare_buf, 4
+p_io_spare_buf:
+	.space	4
+	.section	.bss.c_ftl_vendor_part_size,"aw",%nobits
+	.align	1
+.LANCHOR65 = . + 0
+	.type	c_ftl_vendor_part_size, %object
+	.size	c_ftl_vendor_part_size, 2
+c_ftl_vendor_part_size:
+	.space	2
+	.section	.bss.c_ftl_nand_planes_num,"aw",%nobits
+	.align	1
+.LANCHOR53 = . + 0
+	.type	c_ftl_nand_planes_num, %object
+	.size	c_ftl_nand_planes_num, 2
+c_ftl_nand_planes_num:
+	.space	2
+	.section	.bss.p_io_data_buf_0,"aw",%nobits
+	.align	2
+.LANCHOR178 = . + 0
+	.type	p_io_data_buf_0, %object
+	.size	p_io_data_buf_0, 4
+p_io_data_buf_0:
+	.space	4
+	.section	.bss.p_io_data_buf_1,"aw",%nobits
+	.align	2
+.LANCHOR179 = . + 0
+	.type	p_io_data_buf_1, %object
+	.size	p_io_data_buf_1, 4
+p_io_data_buf_1:
+	.space	4
+	.section	.data.power_up_flag,"aw",%progbits
+	.align	2
+	.type	power_up_flag, %object
+	.size	power_up_flag, 4
+power_up_flag:
+	.word	1
+	.section	.bss.gFlashOnfiModeEn,"aw",%nobits
+	.type	gFlashOnfiModeEn, %object
+	.size	gFlashOnfiModeEn, 1
+gFlashOnfiModeEn:
+	.space	1
+	.section	.bss.g_totle_write_page_count,"aw",%nobits
+	.align	2
+.LANCHOR156 = . + 0
+	.type	g_totle_write_page_count, %object
+	.size	g_totle_write_page_count, 4
+g_totle_write_page_count:
+	.space	4
+	.section	.bss.g_totle_gc_page_count,"aw",%nobits
+	.align	2
+.LANCHOR155 = . + 0
+	.type	g_totle_gc_page_count, %object
+	.size	g_totle_gc_page_count, 4
+g_totle_gc_page_count:
+	.space	4
+	.section	.bss.g_min_erase_count,"aw",%nobits
+	.align	2
+.LANCHOR164 = . + 0
+	.type	g_min_erase_count, %object
+	.size	g_min_erase_count, 4
+g_min_erase_count:
+	.space	4
+	.section	.bss.FtlUpdateVaildLpnCount,"aw",%nobits
+	.align	1
+.LANCHOR115 = . + 0
+	.type	FtlUpdateVaildLpnCount, %object
+	.size	FtlUpdateVaildLpnCount, 2
+FtlUpdateVaildLpnCount:
+	.space	2
+	.section	.bss.g_cur_erase_blk,"aw",%nobits
+	.align	2
+.LANCHOR88 = . + 0
+	.type	g_cur_erase_blk, %object
+	.size	g_cur_erase_blk, 4
+g_cur_erase_blk:
+	.space	4
+	.section	.bss.g_in_gc_progress,"aw",%nobits
+	.align	2
+.LANCHOR165 = . + 0
+	.type	g_in_gc_progress, %object
+	.size	g_in_gc_progress, 4
+g_in_gc_progress:
+	.space	4
+	.section	.bss.gNandChipMap,"aw",%nobits
+	.align	2
+.LANCHOR5 = . + 0
+	.type	gNandChipMap, %object
+	.size	gNandChipMap, 32
+gNandChipMap:
+	.space	32
+	.section	.bss.gFlashPageBuffer1,"aw",%nobits
+	.align	2
+.LANCHOR41 = . + 0
+	.type	gFlashPageBuffer1, %object
+	.size	gFlashPageBuffer1, 4
+gFlashPageBuffer1:
+	.space	4
+	.section	.bss.c_ftl_nand_init_sys_blks_per_plane,"aw",%nobits
+	.align	2
+.LANCHOR81 = . + 0
+	.type	c_ftl_nand_init_sys_blks_per_plane, %object
+	.size	c_ftl_nand_init_sys_blks_per_plane, 4
+c_ftl_nand_init_sys_blks_per_plane:
+	.space	4
+	.section	.rodata.__func__.8151,"a",%progbits
+.LANCHOR206 = . + 0
+	.type	__func__.8151, %object
+	.size	__func__.8151, 16
+__func__.8151:
+	.ascii	"update_vpc_list\000"
+	.section	.bss.p_free_data_block_list_head,"aw",%nobits
+	.align	2
+.LANCHOR103 = . + 0
+	.type	p_free_data_block_list_head, %object
+	.size	p_free_data_block_list_head, 4
+p_free_data_block_list_head:
+	.space	4
+	.section	.bss.gNandIDataBuf,"aw",%nobits
+	.align	2
+.LANCHOR25 = . + 0
+	.type	gNandIDataBuf, %object
+	.size	gNandIDataBuf, 2048
+gNandIDataBuf:
+	.space	2048
+	.section	.bss.gNandFlashIDBEccBits,"aw",%nobits
+.LANCHOR45 = . + 0
+	.type	gNandFlashIDBEccBits, %object
+	.size	gNandFlashIDBEccBits, 1
+gNandFlashIDBEccBits:
+	.space	1
+	.section	.bss.gNandPhyInfo,"aw",%nobits
+	.align	2
+.LANCHOR28 = . + 0
+	.type	gNandPhyInfo, %object
+	.size	gNandPhyInfo, 28
+gNandPhyInfo:
+	.space	28
+	.section	.bss.gSysInfo,"aw",%nobits
+	.align	2
+.LANCHOR191 = . + 0
+	.type	gSysInfo, %object
+	.size	gSysInfo, 12
+gSysInfo:
+	.space	12
+	.section	.bss.gMultiPageReadEn,"aw",%nobits
+.LANCHOR189 = . + 0
+	.type	gMultiPageReadEn, %object
+	.size	gMultiPageReadEn, 1
+gMultiPageReadEn:
+	.space	1
+	.section	.bss.g_gc_blk_index,"aw",%nobits
+	.align	1
+.LANCHOR172 = . + 0
+	.type	g_gc_blk_index, %object
+	.size	g_gc_blk_index, 2
+g_gc_blk_index:
+	.space	2
+	.section	.bss.g_gc_free_blk_threshold,"aw",%nobits
+	.align	1
+.LANCHOR170 = . + 0
+	.type	g_gc_free_blk_threshold, %object
+	.size	g_gc_free_blk_threshold, 2
+g_gc_free_blk_threshold:
+	.space	2
+	.section	.bss.g_max_erase_count,"aw",%nobits
+	.align	2
+.LANCHOR163 = . + 0
+	.type	g_max_erase_count, %object
+	.size	g_max_erase_count, 4
+g_max_erase_count:
+	.space	4
+	.section	.bss.gVendorBlkInfo,"aw",%nobits
+	.align	2
+.LANCHOR213 = . + 0
+	.type	gVendorBlkInfo, %object
+	.size	gVendorBlkInfo, 40
+gVendorBlkInfo:
+	.space	40
+	.section	.bss.g_GlobalDataVersion,"aw",%nobits
+	.align	2
+.LANCHOR154 = . + 0
+	.type	g_GlobalDataVersion, %object
+	.size	g_GlobalDataVersion, 4
+g_GlobalDataVersion:
+	.space	4
+	.section	.bss.gp_last_act_superblock,"aw",%nobits
+	.align	2
+.LANCHOR219 = . + 0
+	.type	gp_last_act_superblock, %object
+	.size	gp_last_act_superblock, 4
+gp_last_act_superblock:
+	.space	4
+	.section	.bss.c_ftl_nand_max_vendor_blks,"aw",%nobits
+	.align	1
+.LANCHOR77 = . + 0
+	.type	c_ftl_nand_max_vendor_blks, %object
+	.size	c_ftl_nand_max_vendor_blks, 2
+c_ftl_nand_max_vendor_blks:
+	.space	2
+	.section	.data.random_seed,"aw",%progbits
+	.align	1
+.LANCHOR3 = . + 0
+	.type	random_seed, %object
+	.size	random_seed, 256
+random_seed:
+	.short	22378
+	.short	1512
+	.short	25245
+	.short	17827
+	.short	25756
+	.short	19440
+	.short	9026
+	.short	10030
+	.short	29528
+	.short	20467
+	.short	29676
+	.short	24432
+	.short	31328
+	.short	6872
+	.short	13426
+	.short	13842
+	.short	8783
+	.short	1108
+	.short	782
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+	.short	30729
+	.short	9505
+	.short	18676
+	.short	23085
+	.short	18730
+	.short	1085
+	.short	32609
+	.short	14697
+	.short	20858
+	.short	15170
+	.short	30365
+	.short	1607
+	.short	32298
+	.short	4995
+	.short	18905
+	.short	1976
+	.short	9592
+	.short	20204
+	.short	17443
+	.short	13615
+	.short	23330
+	.short	29369
+	.short	13947
+	.short	9398
+	.short	32398
+	.short	8984
+	.short	27600
+	.short	21785
+	.short	6019
+	.short	6311
+	.short	31598
+	.short	30210
+	.short	19327
+	.short	13896
+	.short	11347
+	.short	27545
+	.short	3107
+	.short	26575
+	.short	32270
+	.short	19852
+	.short	20601
+	.short	8349
+	.short	9290
+	.short	29819
+	.short	13579
+	.short	3661
+	.short	28676
+	.short	27331
+	.short	32574
+	.short	8693
+	.short	31253
+	.short	9081
+	.short	5399
+	.short	6842
+	.short	20087
+	.short	5537
+	.short	1274
+	.short	11617
+	.short	9530
+	.short	4866
+	.short	8035
+	.short	23219
+	.short	1178
+	.short	23272
+	.short	7383
+	.short	18944
+	.short	12488
+	.short	12871
+	.short	29340
+	.short	20532
+	.short	11022
+	.short	22514
+	.short	228
+	.short	22363
+	.short	24978
+	.short	14584
+	.short	12138
+	.short	3092
+	.short	17916
+	.short	16863
+	.short	14554
+	.short	31457
+	.short	29474
+	.short	25311
+	.short	24121
+	.short	3684
+	.short	28037
+	.short	22865
+	.short	22839
+	.short	25217
+	.short	13217
+	.short	27186
+	.short	14938
+	.short	11180
+	.short	29754
+	.short	24180
+	.short	15150
+	.short	32455
+	.short	20434
+	.short	23848
+	.short	29983
+	.short	16120
+	.short	14769
+	.short	20041
+	.short	29803
+	.short	28406
+	.short	17598
+	.short	28087
+	.section	.bss.c_ftl_nand_sec_pre_page,"aw",%nobits
+	.align	1
+.LANCHOR71 = . + 0
+	.type	c_ftl_nand_sec_pre_page, %object
+	.size	c_ftl_nand_sec_pre_page, 2
+c_ftl_nand_sec_pre_page:
+	.space	2
+	.section	.bss.gNandMaxDie,"aw",%nobits
+.LANCHOR16 = . + 0
+	.type	gNandMaxDie, %object
+	.size	gNandMaxDie, 1
+gNandMaxDie:
+	.space	1
+	.section	.rodata.__func__.7708,"a",%progbits
+.LANCHOR211 = . + 0
+	.type	__func__.7708, %object
+	.size	__func__.7708, 31
+__func__.7708:
+	.ascii	"Ftl_write_map_blk_to_last_page\000"
+	.section	.bss.p_gc_data_buf,"aw",%nobits
+	.align	2
+.LANCHOR129 = . + 0
+	.type	p_gc_data_buf, %object
+	.size	p_gc_data_buf, 4
+p_gc_data_buf:
+	.space	4
+	.section	.rodata.__func__.7953,"a",%progbits
+.LANCHOR216 = . + 0
+	.type	__func__.7953, %object
+	.size	__func__.7953, 16
+__func__.7953:
+	.ascii	"FtlReUsePrevPpa\000"
+	.section	.bss.g_MaxLbaSector,"aw",%nobits
+	.align	2
+.LANCHOR84 = . + 0
+	.type	g_MaxLbaSector, %object
+	.size	g_MaxLbaSector, 4
+g_MaxLbaSector:
+	.space	4
+	.section	.bss.p_erase_count_table,"aw",%nobits
+	.align	2
+.LANCHOR94 = . + 0
+	.type	p_erase_count_table, %object
+	.size	p_erase_count_table, 4
+p_erase_count_table:
+	.space	4
+	.section	.bss.p_vendor_block_table,"aw",%nobits
+	.align	2
+.LANCHOR86 = . + 0
+	.type	p_vendor_block_table, %object
+	.size	p_vendor_block_table, 4
+p_vendor_block_table:
+	.space	4
+	.section	.bss.p_data_block_list_head,"aw",%nobits
+	.align	2
+.LANCHOR98 = . + 0
+	.type	p_data_block_list_head, %object
+	.size	p_data_block_list_head, 4
+p_data_block_list_head:
+	.space	4
+	.section	.bss.gNandOptPara,"aw",%nobits
+.LANCHOR6 = . + 0
+	.type	gNandOptPara, %object
+	.size	gNandOptPara, 32
+gNandOptPara:
+	.space	32
+	.section	.bss.g_sys_save_data,"aw",%nobits
+	.align	2
+.LANCHOR140 = . + 0
+	.type	g_sys_save_data, %object
+	.size	g_sys_save_data, 48
+g_sys_save_data:
+	.space	48
+	.section	.bss.g_VaildLpn,"aw",%nobits
+	.align	2
+.LANCHOR116 = . + 0
+	.type	g_VaildLpn, %object
+	.size	g_VaildLpn, 4
+g_VaildLpn:
+	.space	4
+	.section	.bss.g_recovery_page_num,"aw",%nobits
+	.align	2
+.LANCHOR225 = . + 0
+	.type	g_recovery_page_num, %object
+	.size	g_recovery_page_num, 4
+g_recovery_page_num:
+	.space	4
+	.section	.bss.gTotleBlock,"aw",%nobits
+	.align	1
+.LANCHOR24 = . + 0
+	.type	gTotleBlock, %object
+	.size	gTotleBlock, 2
+gTotleBlock:
+	.space	2
+	.section	.rodata.__func__.7695,"a",%progbits
+.LANCHOR210 = . + 0
+	.type	__func__.7695, %object
+	.size	__func__.7695, 15
+__func__.7695:
+	.ascii	"ftl_map_blk_gc\000"
+	.section	.bss.IDByte,"aw",%nobits
+	.align	2
+.LANCHOR22 = . + 0
+	.type	IDByte, %object
+	.size	IDByte, 32
+IDByte:
+	.space	32
+	.section	.bss.g_gc_temp_superblock,"aw",%nobits
+	.align	2
+.LANCHOR109 = . + 0
+	.type	g_gc_temp_superblock, %object
+	.size	g_gc_temp_superblock, 48
+g_gc_temp_superblock:
+	.space	48
+	.section	.bss.c_ftl_nand_page_pre_slc_blk,"aw",%nobits
+	.align	1
+.LANCHOR69 = . + 0
+	.type	c_ftl_nand_page_pre_slc_blk, %object
+	.size	c_ftl_nand_page_pre_slc_blk, 2
+c_ftl_nand_page_pre_slc_blk:
+	.space	2
+	.section	.bss.gBlockPageAlignSize,"aw",%nobits
+	.align	2
+.LANCHOR2 = . + 0
+	.type	gBlockPageAlignSize, %object
+	.size	gBlockPageAlignSize, 4
+gBlockPageAlignSize:
+	.space	4
+	.section	.bss.g_gc_superblock,"aw",%nobits
+	.align	2
+.LANCHOR201 = . + 0
+	.type	g_gc_superblock, %object
+	.size	g_gc_superblock, 48
+g_gc_superblock:
+	.space	48
+	.section	.bss.g_totle_sys_slc_erase_count,"aw",%nobits
+	.align	2
+.LANCHOR95 = . + 0
+	.type	g_totle_sys_slc_erase_count, %object
+	.size	g_totle_sys_slc_erase_count, 4
+g_totle_sys_slc_erase_count:
+	.space	4
+	.section	.bss.c_ftl_nand_blks_per_die_shift,"aw",%nobits
+	.align	1
+.LANCHOR67 = . + 0
+	.type	c_ftl_nand_blks_per_die_shift, %object
+	.size	c_ftl_nand_blks_per_die_shift, 2
+c_ftl_nand_blks_per_die_shift:
+	.space	2
+	.section	.rodata.__func__.8156,"a",%progbits
+.LANCHOR207 = . + 0
+	.type	__func__.8156, %object
+	.size	__func__.8156, 20
+__func__.8156:
+	.ascii	"decrement_vpc_count\000"
+	.section	.bss.g_SlcPartLbaEndSector,"aw",%nobits
+	.align	2
+.LANCHOR151 = . + 0
+	.type	g_SlcPartLbaEndSector, %object
+	.size	g_SlcPartLbaEndSector, 4
+g_SlcPartLbaEndSector:
+	.space	4
+	.section	.bss.g_totle_discard_page_count,"aw",%nobits
+	.align	2
+.LANCHOR157 = . + 0
+	.type	g_totle_discard_page_count, %object
+	.size	g_totle_discard_page_count, 4
+g_totle_discard_page_count:
+	.space	4
+	.section	.bss.c_ftl_nand_bbm_buf_size,"aw",%nobits
+	.align	1
+.LANCHOR90 = . + 0
+	.type	c_ftl_nand_bbm_buf_size, %object
+	.size	c_ftl_nand_bbm_buf_size, 2
+c_ftl_nand_bbm_buf_size:
+	.space	2
+	.section	.bss.gL2pMapInfo,"aw",%nobits
+	.align	2
+.LANCHOR120 = . + 0
+	.type	gL2pMapInfo, %object
+	.size	gL2pMapInfo, 40
+gL2pMapInfo:
+	.space	40
+	.section	.bss.g_gc_head_data_block_count,"aw",%nobits
+	.align	2
+.LANCHOR168 = . + 0
+	.type	g_gc_head_data_block_count, %object
+	.size	g_gc_head_data_block_count, 4
+g_gc_head_data_block_count:
+	.space	4
+	.section	.rodata.__func__.7338,"a",%progbits
+.LANCHOR218 = . + 0
+	.type	__func__.7338, %object
+	.size	__func__.7338, 13
+__func__.7338:
+	.ascii	"FtlProgPages\000"
+	.section	.bss.gFlashPageBuffer0,"aw",%nobits
+	.align	2
+.LANCHOR44 = . + 0
+	.type	gFlashPageBuffer0, %object
+	.size	gFlashPageBuffer0, 4
+gFlashPageBuffer0:
+	.space	4
+	.section	.bss.g_req_cache,"aw",%nobits
+	.align	2
+.LANCHOR134 = . + 0
+	.type	g_req_cache, %object
+	.size	g_req_cache, 4
+g_req_cache:
+	.space	4
+	.section	.data.gFtlInitStatus,"aw",%progbits
+	.align	2
+.LANCHOR222 = . + 0
+	.type	gFtlInitStatus, %object
+	.size	gFtlInitStatus, 4
+gFtlInitStatus:
+	.word	-1
+	.section	.bss.c_gc_page_buf_num,"aw",%nobits
+	.align	2
+.LANCHOR133 = . + 0
+	.type	c_gc_page_buf_num, %object
+	.size	c_gc_page_buf_num, 4
+c_gc_page_buf_num:
+	.space	4
+	.section	.data.NandFlashParaTbl,"aw",%progbits
+	.align	1
+.LANCHOR26 = . + 0
+	.type	NandFlashParaTbl, %object
+	.size	NandFlashParaTbl, 2304
+NandFlashParaTbl:
+	.byte	6
+	.byte	44
+	.byte	100
+	.byte	68
+	.byte	75
+	.byte	-87
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	16
+	.short	256
+	.byte	2
+	.byte	2
+	.short	2048
+	.short	479
+	.byte	3
+	.byte	17
+	.byte	40
+	.byte	32
+	.byte	1
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+	.byte	68
+	.byte	75
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+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	16
+	.short	256
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+	.short	1064
+	.short	479
+	.byte	3
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+	.byte	8
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+	.short	2048
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+	.short	2048
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+	.short	2048
+	.short	287
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+	.short	1497
+	.byte	2
+	.byte	35
+	.byte	40
+	.byte	32
+	.byte	3
+	.byte	1
+	.byte	4
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	6
+	.byte	-104
+	.byte	58
+	.byte	-108
+	.byte	-109
+	.byte	118
+	.byte	81
+	.byte	1
+	.byte	1
+	.byte	32
+	.short	256
+	.byte	2
+	.byte	2
+	.short	2106
+	.short	1497
+	.byte	2
+	.byte	35
+	.byte	40
+	.byte	32
+	.byte	3
+	.byte	1
+	.byte	4
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	6
+	.byte	-104
+	.byte	-41
+	.byte	-124
+	.byte	-109
+	.byte	114
+	.byte	81
+	.byte	1
+	.byte	1
+	.byte	32
+	.short	256
+	.byte	2
+	.byte	1
+	.short	1056
+	.short	1497
+	.byte	2
+	.byte	35
+	.byte	40
+	.byte	32
+	.byte	3
+	.byte	1
+	.byte	4
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	6
+	.byte	69
+	.byte	-34
+	.byte	-108
+	.byte	-109
+	.byte	118
+	.byte	87
+	.byte	8
+	.byte	1
+	.byte	32
+	.short	256
+	.byte	2
+	.byte	2
+	.short	1058
+	.short	1497
+	.byte	2
+	.byte	66
+	.byte	40
+	.byte	32
+	.byte	3
+	.byte	1
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	6
+	.byte	69
+	.byte	-41
+	.byte	-124
+	.byte	-109
+	.byte	114
+	.byte	87
+	.byte	8
+	.byte	1
+	.byte	32
+	.short	256
+	.byte	2
+	.byte	1
+	.short	1060
+	.short	1473
+	.byte	2
+	.byte	66
+	.byte	40
+	.byte	32
+	.byte	2
+	.byte	1
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	6
+	.byte	69
+	.byte	-34
+	.byte	-92
+	.byte	-126
+	.byte	118
+	.byte	86
+	.byte	8
+	.byte	1
+	.byte	16
+	.short	256
+	.byte	2
+	.byte	2
+	.short	2082
+	.short	473
+	.byte	1
+	.byte	65
+	.byte	40
+	.byte	32
+	.byte	3
+	.byte	1
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	6
+	.byte	69
+	.byte	-34
+	.byte	-108
+	.byte	-109
+	.byte	118
+	.byte	80
+	.byte	8
+	.byte	1
+	.byte	32
+	.short	256
+	.byte	2
+	.byte	2
+	.short	1066
+	.short	1497
+	.byte	2
+	.byte	67
+	.byte	40
+	.byte	32
+	.byte	3
+	.byte	1
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	6
+	.byte	69
+	.byte	-41
+	.byte	-124
+	.byte	-109
+	.byte	114
+	.byte	80
+	.byte	8
+	.byte	1
+	.byte	32
+	.short	256
+	.byte	2
+	.byte	1
+	.short	1060
+	.short	1473
+	.byte	2
+	.byte	67
+	.byte	40
+	.byte	32
+	.byte	3
+	.byte	1
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	6
+	.byte	69
+	.byte	-34
+	.byte	-92
+	.byte	-126
+	.byte	118
+	.byte	-41
+	.byte	8
+	.byte	1
+	.byte	16
+	.short	256
+	.byte	2
+	.byte	2
+	.short	2090
+	.short	1241
+	.byte	1
+	.byte	66
+	.byte	40
+	.byte	32
+	.byte	3
+	.byte	1
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	6
+	.byte	69
+	.byte	-34
+	.byte	-124
+	.byte	-109
+	.byte	114
+	.byte	87
+	.byte	8
+	.byte	1
+	.byte	32
+	.short	256
+	.byte	2
+	.byte	1
+	.short	2092
+	.short	1473
+	.byte	2
+	.byte	66
+	.byte	40
+	.byte	32
+	.byte	3
+	.byte	1
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	6
+	.byte	69
+	.byte	58
+	.byte	-108
+	.byte	-109
+	.byte	118
+	.byte	81
+	.byte	8
+	.byte	1
+	.byte	32
+	.short	256
+	.byte	2
+	.byte	2
+	.short	2106
+	.short	1497
+	.byte	2
+	.byte	68
+	.byte	40
+	.byte	32
+	.byte	3
+	.byte	1
+	.byte	4
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	6
+	.byte	69
+	.byte	-34
+	.byte	-108
+	.byte	-109
+	.byte	118
+	.byte	81
+	.byte	8
+	.byte	1
+	.byte	32
+	.short	256
+	.byte	2
+	.byte	2
+	.short	1074
+	.short	1497
+	.byte	2
+	.byte	68
+	.byte	40
+	.byte	32
+	.byte	3
+	.byte	1
+	.byte	4
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	6
+	.byte	69
+	.byte	58
+	.byte	-92
+	.byte	-109
+	.byte	122
+	.byte	80
+	.byte	8
+	.byte	1
+	.byte	32
+	.short	256
+	.byte	2
+	.byte	2
+	.short	2138
+	.short	1497
+	.byte	2
+	.byte	0
+	.byte	40
+	.byte	32
+	.byte	3
+	.byte	1
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	6
+	.byte	69
+	.byte	-34
+	.byte	-108
+	.byte	-126
+	.byte	118
+	.byte	86
+	.byte	8
+	.byte	1
+	.byte	16
+	.short	256
+	.byte	2
+	.byte	2
+	.short	2062
+	.short	473
+	.byte	1
+	.byte	0
+	.byte	40
+	.byte	32
+	.byte	3
+	.byte	1
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	6
+	.byte	69
+	.byte	-34
+	.byte	-108
+	.byte	-109
+	.byte	118
+	.byte	-41
+	.byte	8
+	.byte	1
+	.byte	32
+	.short	256
+	.byte	2
+	.byte	2
+	.short	1058
+	.short	1497
+	.byte	2
+	.byte	66
+	.byte	40
+	.byte	32
+	.byte	3
+	.byte	1
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	6
+	.byte	-20
+	.byte	-41
+	.byte	-108
+	.byte	126
+	.byte	100
+	.byte	68
+	.byte	0
+	.byte	1
+	.byte	16
+	.short	128
+	.byte	2
+	.byte	2
+	.short	2048
+	.short	473
+	.byte	2
+	.byte	49
+	.byte	60
+	.byte	36
+	.byte	3
+	.byte	0
+	.byte	3
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	6
+	.byte	-20
+	.byte	-34
+	.byte	-43
+	.byte	126
+	.byte	104
+	.byte	68
+	.byte	0
+	.byte	2
+	.byte	16
+	.short	128
+	.byte	2
+	.byte	2
+	.short	2048
+	.short	505
+	.byte	2
+	.byte	49
+	.byte	60
+	.byte	36
+	.byte	3
+	.byte	0
+	.byte	3
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	6
+	.byte	-20
+	.byte	-41
+	.byte	-108
+	.byte	122
+	.byte	84
+	.byte	67
+	.byte	0
+	.byte	1
+	.byte	16
+	.short	128
+	.byte	2
+	.byte	2
+	.short	2076
+	.short	409
+	.byte	2
+	.byte	0
+	.byte	40
+	.byte	36
+	.byte	3
+	.byte	1
+	.byte	3
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	6
+	.byte	-20
+	.byte	-34
+	.byte	-43
+	.byte	122
+	.byte	88
+	.byte	67
+	.byte	0
+	.byte	2
+	.byte	16
+	.short	128
+	.byte	2
+	.byte	2
+	.short	2076
+	.short	441
+	.byte	2
+	.byte	0
+	.byte	40
+	.byte	36
+	.byte	3
+	.byte	1
+	.byte	3
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	6
+	.byte	-20
+	.byte	-43
+	.byte	-108
+	.byte	118
+	.byte	84
+	.byte	67
+	.byte	0
+	.byte	1
+	.byte	16
+	.short	128
+	.byte	2
+	.byte	2
+	.short	1038
+	.short	281
+	.byte	2
+	.byte	0
+	.byte	24
+	.byte	36
+	.byte	3
+	.byte	1
+	.byte	3
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	6
+	.byte	-20
+	.byte	-41
+	.byte	20
+	.byte	118
+	.byte	84
+	.byte	-62
+	.byte	0
+	.byte	1
+	.byte	16
+	.short	128
+	.byte	2
+	.byte	2
+	.short	2076
+	.short	1169
+	.byte	2
+	.byte	0
+	.byte	24
+	.byte	40
+	.byte	3
+	.byte	1
+	.byte	3
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.section	.bss.c_ftl_nand_page_pre_blk,"aw",%nobits
+	.align	1
+.LANCHOR68 = . + 0
+	.type	c_ftl_nand_page_pre_blk, %object
+	.size	c_ftl_nand_page_pre_blk, 2
+c_ftl_nand_page_pre_blk:
+	.space	2
+	.section	.bss.g_totle_map_block,"aw",%nobits
+	.align	1
+.LANCHOR121 = . + 0
+	.type	g_totle_map_block, %object
+	.size	g_totle_map_block, 2
+g_totle_map_block:
+	.space	2
+	.section	.bss.DeviceCapacity,"aw",%nobits
+	.align	2
+.LANCHOR76 = . + 0
+	.type	DeviceCapacity, %object
+	.size	DeviceCapacity, 4
+DeviceCapacity:
+	.space	4
+	.section	.bss.gp_ect_tbl_info,"aw",%nobits
+	.align	2
+.LANCHOR183 = . + 0
+	.type	gp_ect_tbl_info, %object
+	.size	gp_ect_tbl_info, 4
+gp_ect_tbl_info:
+	.space	4
+	.section	.rodata.__func__.7655,"a",%progbits
+.LANCHOR196 = . + 0
+	.type	__func__.7655, %object
+	.size	__func__.7655, 16
+__func__.7655:
+	.ascii	"load_l2p_region\000"
+	.section	.bss.c_ftl_nand_map_blks_per_plane,"aw",%nobits
+	.align	1
+.LANCHOR79 = . + 0
+	.type	c_ftl_nand_map_blks_per_plane, %object
+	.size	c_ftl_nand_map_blks_per_plane, 2
+c_ftl_nand_map_blks_per_plane:
+	.space	2
+	.section	.bss.p_l2p_map_buf,"aw",%nobits
+	.align	2
+.LANCHOR119 = . + 0
+	.type	p_l2p_map_buf, %object
+	.size	p_l2p_map_buf, 4
+p_l2p_map_buf:
+	.space	4
+	.section	.bss.g_recovery_page_min_ver,"aw",%nobits
+	.align	2
+.LANCHOR138 = . + 0
+	.type	g_recovery_page_min_ver, %object
+	.size	g_recovery_page_min_ver, 4
+g_recovery_page_min_ver:
+	.space	4
+	.section	.bss.g_active_superblock,"aw",%nobits
+	.align	2
+.LANCHOR107 = . + 0
+	.type	g_active_superblock, %object
+	.size	g_active_superblock, 48
+g_active_superblock:
+	.space	48
+	.section	.bss.g_gc_bad_block_temp_num,"aw",%nobits
+	.align	1
+.LANCHOR148 = . + 0
+	.type	g_gc_bad_block_temp_num, %object
+	.size	g_gc_bad_block_temp_num, 2
+g_gc_bad_block_temp_num:
+	.space	2
+	.hidden	free
+	.ident	"GCC: (Ubuntu/Linaro 4.6.3-1ubuntu5) 4.6.3"
+	.section	.note.GNU-stack,"",%progbits
diff --git a/drivers/rknand/rknand.c b/drivers/rknand/rknand.c
new file mode 100644
index 0000000000..06d31cef72
--- /dev/null
+++ b/drivers/rknand/rknand.c
@@ -0,0 +1,205 @@
+/*
+ * Copyright (C) (C) Copyright 2016-2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/device-internal.h>
+#include <dm/lists.h>
+#include <dm/root.h>
+#include "rknand.h"
+
+struct blk_desc *rknand_get_blk_desc(struct rknand_dev *ndev)
+{
+	struct blk_desc *desc;
+	struct udevice *dev;
+
+	device_find_first_child(ndev->dev, &dev);
+	if (!dev)
+		return NULL;
+	desc = dev_get_uclass_platdata(dev);
+
+	return desc;
+}
+
+ulong rknand_bread(struct udevice *udev, lbaint_t start,
+		       lbaint_t blkcnt, void *dst)
+{
+	struct blk_desc *block_dev = dev_get_uclass_platdata(udev);
+	struct rknand_dev *ndev = dev_get_priv(udev->parent);
+	int err;
+
+	if (blkcnt == 0)
+		return 0;
+
+	if ((start + blkcnt) > block_dev->lba)
+		return 0;
+
+	if (ndev->read == NULL)
+		return 0;
+
+	err = ndev->read(0, (u32)start, (u32)blkcnt, dst);
+	if (err)
+		return err;
+
+	return blkcnt;
+}
+
+ulong rknand_bwrite(struct udevice *udev, lbaint_t start,
+		       lbaint_t blkcnt, const void *src)
+{
+	struct blk_desc *block_dev = dev_get_uclass_platdata(udev);
+	struct rknand_dev *ndev = dev_get_priv(udev->parent);
+	int err;
+
+	if (blkcnt == 0)
+		return 0;
+
+	if ((start + blkcnt) > block_dev->lba)
+		return 0;
+
+	if (ndev->write == NULL)
+		return 0;
+
+	err = ndev->write(0, (u32)start, (u32)blkcnt, src);
+	if (err)
+		return err;
+
+	return blkcnt;
+}
+
+ulong rknand_berase(struct udevice *udev, lbaint_t start,
+			lbaint_t blkcnt)
+{
+	struct blk_desc *block_dev = dev_get_uclass_platdata(udev);
+	struct rknand_dev *ndev = dev_get_priv(udev->parent);
+	int err;
+
+	if (blkcnt == 0)
+		return 0;
+
+	if ((start + blkcnt) > block_dev->lba)
+		return 0;
+
+	if (ndev->erase == NULL)
+		return 0;
+
+	err = ndev->erase(0, (u32)start, (u32)blkcnt);
+	if (err)
+		return err;
+
+	return blkcnt;
+}
+
+int rknand_scan_namespace(void)
+{
+	struct uclass *uc;
+	struct udevice *dev;
+	int ret;
+
+	ret = uclass_get(UCLASS_RKNAND, &uc);
+	if (ret)
+		return ret;
+
+	uclass_foreach_dev(dev, uc) {
+		debug("%s %d %p\n", __func__, __LINE__, dev);
+		ret = device_probe(dev);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+static int rknand_blk_bind(struct udevice *udev)
+{
+	struct udevice *bdev;
+	int ret;
+
+	ret = blk_create_devicef(udev, "rknand_blk", "blk",
+				 IF_TYPE_RKNAND,
+			0, 512, 0, &bdev);
+	if (ret) {
+		debug("Cannot create block device\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+static int rknand_blk_probe(struct udevice *udev)
+{
+	struct rknand_dev *ndev = dev_get_priv(udev->parent);
+	struct blk_desc *desc = dev_get_uclass_platdata(udev);
+
+	debug("%s %d %p ndev = %p %p\n", __func__, __LINE__,
+	      udev, ndev, udev->parent);
+	ndev->dev = udev;
+	desc->if_type = IF_TYPE_RKNAND;
+	desc->lba = ndev->density;
+	desc->log2blksz = 9;
+	desc->blksz = 512;
+	desc->bdev = udev;
+	desc->devnum = 0;
+	sprintf(desc->vendor, "0x%.4x", 0x2207);
+	memcpy(desc->product, "rknand", sizeof("rknand"));
+	memcpy(desc->revision, "V1.00", sizeof("V1.00"));
+	/* part_init(desc); */
+	return 0;
+}
+
+static int rockchip_nand_probe(struct udevice *udev)
+{
+	int ret;
+	struct rknand_dev *ndev = dev_get_priv(udev);
+
+	ndev->ioaddr = (void *)devfdt_get_addr(udev);
+	ret = rk_ftl_init(ndev->ioaddr);
+	if (!ret) {
+		ndev->density = ftl_get_density(0);
+		ndev->read = ftl_read;
+		ndev->write = ftl_write;
+		ndev->erase = ftl_discard;
+	}
+
+	return ret;
+}
+
+static const struct blk_ops rknand_blk_ops = {
+	.read	= rknand_bread,
+#ifndef CONFIG_SPL_BUILD
+	.write	= rknand_bwrite,
+	.erase	= rknand_berase,
+#endif
+};
+
+static const struct udevice_id rockchip_nand_ids[] = {
+	{ .compatible = "rockchip,rk-nandc" },
+	{ }
+};
+
+U_BOOT_DRIVER(rknand_blk) = {
+	.name		= "rknand_blk",
+	.id		= UCLASS_BLK,
+	.ops		= &rknand_blk_ops,
+	.probe		= rknand_blk_probe,
+};
+
+UCLASS_DRIVER(rknand) = {
+	.id		= UCLASS_RKNAND,
+	.name		= "rknand",
+	.flags		= DM_UC_FLAG_SEQ_ALIAS,
+	.per_device_auto_alloc_size = sizeof(struct rknand_uclass_priv),
+};
+
+U_BOOT_DRIVER(rknand) = {
+	.name		= "rknand",
+	.id		= UCLASS_RKNAND,
+	.of_match	= rockchip_nand_ids,
+	.bind		= rknand_blk_bind,
+	.probe		= rockchip_nand_probe,
+	.priv_auto_alloc_size = sizeof(struct rknand_dev),
+};
+
diff --git a/drivers/rknand/rknand.h b/drivers/rknand/rknand.h
new file mode 100644
index 0000000000..5ab9940b39
--- /dev/null
+++ b/drivers/rknand/rknand.h
@@ -0,0 +1,62 @@
+/*
+ * Copyright (C) (C) Copyright 2016-2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __DRIVER_RKNAND_H__
+#define __DRIVER_RKNAND_H__
+
+#include <asm/io.h>
+#include <clk.h>
+#include <asm/arch/clock.h>
+
+/* Represents an NVM Express device. Each nvme_dev is a PCI function. */
+struct rknand_dev {
+	void *ioaddr;
+	struct clk nandc_clk;
+	struct clk nandc_hclk;
+	u32 density;
+	struct udevice *dev;
+
+	/*
+	 * read() - read from a block device
+	 *
+	 * @start:	Start block number to read (0=first)
+	 * @blkcnt:	Number of blocks to read
+	 * @buffer:	Destination buffer for data read
+	 * @return 0 is OK, -1 is error.
+	 */
+	u32 (*read)(u8 lun, u32 start, u32 blkcnt, void *buffer);
+	/*
+	 * write() - write to a block device
+	 *
+	 * @dev:	Device to write to
+	 * @start:	Start block number to write (0=first)
+	 * @blkcnt:	Number of blocks to write
+	 * @buffer:	Source buffer for data to write
+	 * @return 0 is OK, -1 is error.
+	 */
+	u32 (*write)(u8 lun, u32 start, u32 blkcnt, const void *buffer);
+	/*
+	 * erase() - erase a section of a block device
+	 *
+	 * @dev:	Device to (partially) erase
+	 * @start:	Start block number to erase (0=first)
+	 * @blkcnt:	Number of blocks to erase
+	 * @return 0 is OK, -1 is error.
+	 */
+	u32 (*erase)(u8 lun, u32 start, u32 blkcnt);
+};
+
+struct rknand_uclass_priv {
+	struct rknand_dev *ndev;
+};
+
+u32 ftl_write(u8 lun, u32 start, u32 blkcnt, const void *buffer);
+u32 ftl_read(u8 lun, u32 start, u32 blkcnt, void *buffer);
+u32 ftl_discard(u8 lun, u32 start, u32 blkcnt);
+u32 ftl_get_density(u8 lun);
+int rk_ftl_init(u32 *reg_base);
+
+#endif /* __DRIVER_RKNAND_H__ */
diff --git a/include/blk.h b/include/blk.h
index 27abfddb94..25a6bcd1c6 100644
--- a/include/blk.h
+++ b/include/blk.h
@@ -32,6 +32,7 @@ enum if_type {
 	IF_TYPE_HOST,
 	IF_TYPE_SYSTEMACE,
 	IF_TYPE_NVME,
+	IF_TYPE_RKNAND,
 
 	IF_TYPE_COUNT,			/* Number of interface types */
 };
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index c2d8ab7768..779daa80f6 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -70,6 +70,7 @@ enum uclass_id {
 	UCLASS_REGULATOR,	/* Regulator device */
 	UCLASS_REMOTEPROC,	/* Remote Processor device */
 	UCLASS_RESET,		/* Reset controller device */
+	UCLASS_RKNAND,		/* Rockchip nand device with ftl */
 	UCLASS_RTC,		/* Real time clock device */
 	UCLASS_SCSI,		/* SCSI device */
 	UCLASS_SERIAL,		/* Serial UART */
diff --git a/include/rknand.h b/include/rknand.h
new file mode 100644
index 0000000000..7357febefd
--- /dev/null
+++ b/include/rknand.h
@@ -0,0 +1,20 @@
+/*
+ * Copyright (C) (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __RKNAND_H__
+#define __RKNAND_H__
+/**
+ * rknand_scan_namespace - scan all namespaces attached to RK NAND
+ * controllers
+ *
+ * This probes all registered RK NAND uclass device drivers in the
+ * system,and tries to find all namespaces attached to the RK NAND
+ * controllers.
+ *
+ * @return:	0 on success, -ve on error
+ */
+int rknand_scan_namespace(void);
+#endif /* __RKNAND_H__ */

commit afabcf8d2f6268702a1355811ef46f98ef9a851b
Author: David Wu <david.wu@rock-chips.com>
Date:   Mon Oct 16 14:59:44 2017 +0800

    arm: dts: Enable SARADC for rk3188-radxarock
    
    Change-Id: I8a7ab42d532c1b2d8043e7904881f90920044e4f
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/dts/rk3188-radxarock.dts b/arch/arm/dts/rk3188-radxarock.dts
index 5f5b5e9a1f..2930f81320 100644
--- a/arch/arm/dts/rk3188-radxarock.dts
+++ b/arch/arm/dts/rk3188-radxarock.dts
@@ -344,6 +344,10 @@
 	};
 };
 
+&saradc {
+	status = "okay";
+};
+
 &spdif {
 	status = "okay";
 };

commit 93e4b4f16c55ecc9d96fc92255d802b7f486e5fd
Author: David Wu <david.wu@rock-chips.com>
Date:   Mon Oct 16 14:57:28 2017 +0800

    arm: dts: rk3188: Add SARADC node at dtsi level
    
    Change-Id: If2c16764a6623213c1be95f4c3ad2132c3135a96
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/dts/rk3188.dtsi b/arch/arm/dts/rk3188.dtsi
index f4d438eb66..518469cf97 100644
--- a/arch/arm/dts/rk3188.dtsi
+++ b/arch/arm/dts/rk3188.dtsi
@@ -124,6 +124,16 @@
 		};
 	};
 
+	saradc: saradc@2006c000 {
+		compatible = "rockchip,saradc";
+		reg = <0x2006c000 0x100>;
+		interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+		#io-channel-cells = <1>;
+		clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
+		clock-names = "saradc", "pclk_saradc";
+		status = "disabled";
+	};
+
 	usbphy: phy {
 		compatible = "rockchip,rk3188-usb-phy", "rockchip,rk3288-usb-phy";
 		rockchip,grf = <&grf>;

commit dcb51bfed1fa3950f9f561b08f5d9b667999fafc
Author: David Wu <david.wu@rock-chips.com>
Date:   Mon Oct 16 14:56:21 2017 +0800

    clk: rockchip: Add rk3188 SARADC clock support
    
    The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1).
    SARADC integer divider control register is 8-bits width.
    
    Change-Id: I1869cd06615e037548e77eae65df4acdf666a058
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3188.h b/arch/arm/include/asm/arch-rockchip/cru_rk3188.h
index f5d6420d04..850b0a7af5 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3188.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3188.h
@@ -138,6 +138,13 @@ enum {
 	SDIO_DIV_MASK		= 0x3f,
 };
 
+/* CRU_CLKSEL24_CON */
+enum {
+	SARADC_DIV_SHIFT	= 8,
+	SARADC_DIV_MASK		=GENMASK(15, 8),
+	SARADC_DIV_WIDTH	= 8,
+};
+
 /* CRU_CLKSEL25_CON */
 enum {
 	SPI1_DIV_SHIFT		= 8,
diff --git a/drivers/clk/rockchip/clk_rk3188.c b/drivers/clk/rockchip/clk_rk3188.c
index 8c2c9bc1d8..7bf308dd42 100644
--- a/drivers/clk/rockchip/clk_rk3188.c
+++ b/drivers/clk/rockchip/clk_rk3188.c
@@ -17,6 +17,7 @@
 #include <asm/arch/cru_rk3188.h>
 #include <asm/arch/grf_rk3188.h>
 #include <asm/arch/hardware.h>
+#include <bitfield.h>
 #include <dt-bindings/clock/rk3188-cru.h>
 #include <dm/device-internal.h>
 #include <dm/lists.h>
@@ -371,6 +372,30 @@ static ulong rockchip_spi_set_clk(struct rk3188_cru *cru, uint gclk_rate,
 	return rockchip_spi_get_clk(cru, gclk_rate, periph);
 }
 
+static ulong rk3188_saradc_get_clk(struct rk3188_cru *cru)
+{
+	u32 div, val;
+
+	val = readl(&cru->cru_clksel_con[24]);
+	div = bitfield_extract(val, SARADC_DIV_SHIFT, SARADC_DIV_WIDTH);
+
+	return DIV_TO_RATE(OSC_HZ, div);
+}
+
+static ulong rk3188_saradc_set_clk(struct rk3188_cru *cru, uint hz)
+{
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1;
+	assert(src_clk_div < 128);
+
+	rk_clrsetreg(&cru->cru_clksel_con[24],
+		     SARADC_DIV_MASK,
+		     src_clk_div << SARADC_DIV_SHIFT);
+
+	return rk3188_saradc_get_clk(cru);
+}
+
 #ifdef CONFIG_SPL_BUILD
 static void rkclk_init(struct rk3188_cru *cru, struct rk3188_grf *grf,
 		       bool has_bwadj)
@@ -488,6 +513,8 @@ static ulong rk3188_clk_get_rate(struct clk *clk)
 	case PCLK_I2C3:
 	case PCLK_I2C4:
 		return gclk_rate;
+	case SCLK_SARADC:
+                new_rate =  rk3188_saradc_get_clk(priv->cru);
 	default:
 		return -ENOENT;
 	}
@@ -524,6 +551,9 @@ static ulong rk3188_clk_set_rate(struct clk *clk, ulong rate)
 		new_rate = rockchip_spi_set_clk(cru, PERI_PCLK_HZ,
 						clk->id, rate);
 		break;
+	case SCLK_SARADC:
+		new_rate = rk3188_saradc_set_clk(priv->cru, rate);
+		break;
 	default:
 		return -ENOENT;
 	}

commit f972b1726d5d35072671533f05775a7ace129159
Author: David Wu <david.wu@rock-chips.com>
Date:   Mon Oct 16 14:52:59 2017 +0800

    arm: dts: Enable SARADC for rk3128-evb
    
    Change-Id: Ic11fdea352520ae63850ff36be6bc74a80e6aada
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/dts/rk3126-evb.dts b/arch/arm/dts/rk3126-evb.dts
index 6ac6a35f5c..37d906f94b 100644
--- a/arch/arm/dts/rk3126-evb.dts
+++ b/arch/arm/dts/rk3126-evb.dts
@@ -249,3 +249,7 @@
 				<0 2 RK_FUNC_GPIO &pcfg_pull_none>;
 	};
 };
+
+&saradc {
+	status = "okay";
+};

commit eb4fc8a10985fdeaa0010e60db8a713fb5a4c104
Author: David Wu <david.wu@rock-chips.com>
Date:   Mon Oct 16 14:49:44 2017 +0800

    clk: rockchip: Add rk3128 SARADC clock support
    
    The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1).
    SARADC integer divider control register is 8-bits width.
    
    Change-Id: I973b5f50b81559f054ca552ab69ec176cbe3abaa
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3128.h b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
index 8d6b166631..0f803ad93d 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
@@ -164,6 +164,11 @@ enum {
 	EMMC_DIV_SHIFT		= 8,
 	EMMC_DIV_MASK		= 0x3f << EMMC_DIV_SHIFT,
 
+	/* CLKSEL_CON24 */
+	SARADC_DIV_CON_SHIFT	= 8,
+	SARADC_DIV_CON_MASK	= GENMASK(15, 8),
+	SARADC_DIV_CON_WIDTH	= 8,
+
 	/* CRU_SOFTRST5_CON */
 	DDRCTRL_PSRST_SHIFT	= 11,
 	DDRCTRL_SRST_SHIFT	= 10,
diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c
index f344047a6c..925a2f3ea6 100644
--- a/drivers/clk/rockchip/clk_rk3128.c
+++ b/drivers/clk/rockchip/clk_rk3128.c
@@ -13,6 +13,7 @@
 #include <asm/arch/clock.h>
 #include <asm/arch/cru_rk3128.h>
 #include <asm/arch/hardware.h>
+#include <bitfield.h>
 #include <dm/lists.h>
 #include <dt-bindings/clock/rk3128-cru.h>
 #include <linux/log2.h>
@@ -317,6 +318,32 @@ static ulong rk3128_i2c_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz)
 
 	return DIV_TO_RATE(PERI_ACLK_HZ, src_clk_div);
 }
+
+static ulong rk3128_saradc_get_clk(struct rk3128_cru *cru)
+{
+	u32 div, val;
+
+	val = readl(&cru->cru_clksel_con[24]);
+	div = bitfield_extract(val, SARADC_DIV_CON_SHIFT,
+			       SARADC_DIV_CON_WIDTH);
+
+	return DIV_TO_RATE(OSC_HZ, div);
+}
+
+static ulong rk3128_saradc_set_clk(struct rk3128_cru *cru, uint hz)
+{
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1;
+	assert(src_clk_div < 128);
+
+	rk_clrsetreg(&cru->cru_clksel_con[24],
+		     SARADC_DIV_CON_MASK,
+		     src_clk_div << SARADC_DIV_CON_SHIFT);
+
+	return rk3128_saradc_get_clk(cru);
+}
+
 static ulong rk3128_clk_get_rate(struct clk *clk)
 {
 	struct rk3128_clk_priv *priv = dev_get_priv(clk->dev);
@@ -329,7 +356,8 @@ static ulong rk3128_clk_get_rate(struct clk *clk)
 	case PCLK_I2C2:
 	case PCLK_I2C3:
 		return rk3128_i2c_get_clk(priv->cru, clk->id);
-		break;
+	case SCLK_SARADC:
+                return rk3128_saradc_get_clk(priv->cru);
 	default:
 		return -ENOENT;
 	}
@@ -354,6 +382,9 @@ static ulong rk3128_clk_set_rate(struct clk *clk, ulong rate)
 	case PCLK_I2C3:
 		new_rate = rk3128_i2c_set_clk(priv->cru, clk->id, rate);
 		break;
+	case SCLK_SARADC:
+		new_rate = rk3128_saradc_set_clk(priv->cru, rate);
+		break;
 	default:
 		return -ENOENT;
 	}

commit c95ecb1990068c2a41887eb3aaa6338d24e33887
Author: David Wu <david.wu@rock-chips.com>
Date:   Mon Oct 16 14:42:05 2017 +0800

    rockchip: dts: rk3128: Add SARADC at dtsi level
    
    Change-Id: Ifcbda377d5b0eff50bd41cfc6141eb1f76211dc2
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/dts/rk3128.dtsi b/arch/arm/dts/rk3128.dtsi
index 0c59adad02..03fc221408 100644
--- a/arch/arm/dts/rk3128.dtsi
+++ b/arch/arm/dts/rk3128.dtsi
@@ -301,6 +301,18 @@
 		#dma-cells = <2>;
 	};
 
+	saradc: saradc@2006c000 {
+		compatible = "rockchip,saradc";
+		reg = <0x2006c000 0x100>;
+		interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+		#io-channel-cells = <1>;
+		clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
+		clock-names = "saradc", "apb_pclk";
+		resets = <&cru SRST_SARADC>;
+		reset-names = "saradc-apb";
+		status = "disabled";
+	};
+
 	pwm0: pwm0@20050000 {
 		compatible = "rockchip,rk3128-pwm", "rockchip,rk3288-pwm";
 		reg = <0x20050000 0x10>;
diff --git a/include/dt-bindings/clock/rk3128-cru.h b/include/dt-bindings/clock/rk3128-cru.h
index 36c8006bd2..35e943575f 100644
--- a/include/dt-bindings/clock/rk3128-cru.h
+++ b/include/dt-bindings/clock/rk3128-cru.h
@@ -29,6 +29,7 @@
 #define SCLK_TIMER1		86
 #define SCLK_TIMER2		87
 #define SCLK_TIMER3		88
+#define SCLK_SARADC		91
 #define SCLK_OTGPHY0		93
 #define SCLK_LCDC		100
 #define SCLK_HDMI		109
@@ -58,6 +59,7 @@
 #define ACLK_PERI		210
 
 /* pclk gates */
+#define PCLK_SARADC		318
 #define PCLK_GPIO0		320
 #define PCLK_GPIO1		321
 #define PCLK_GPIO2		322
@@ -160,6 +162,7 @@
 #define SRST_EMMC		83
 #define SRST_SPI0		84
 #define SRST_WDT		86
+#define SRST_SARADC		87
 #define SRST_DDRPHY		88
 #define SRST_DDRPHY_P		89
 #define SRST_DDRCTRL		90

commit f3d84b4a519345e539aa88707fa3ccc76f9de9b5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 16 19:48:29 2017 +0800

    rockchip: rk3128: enable GICv2 irq support
    
    Change-Id: I5bfffa770ca04d7077031cd25345f93d58ba5c6e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index d59dad320a..aa418c35b1 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -14,6 +14,7 @@ config ROCKCHIP_RK3036
 config ROCKCHIP_RK3128
 	bool "Support Rockchip RK3128"
 	select CPU_V7
+	select GICV2
 	help
 	  The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
 	  including NEON and GPU, Mali-400 graphics, several DDR3 options
diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h
index af901322ad..b9f01cb5aa 100644
--- a/include/configs/rk3128_common.h
+++ b/include/configs/rk3128_common.h
@@ -26,6 +26,8 @@
 #define CONFIG_SYS_INIT_SP_ADDR		0x60100000
 #define CONFIG_SYS_LOAD_ADDR		0x60800800
 
+#define GICC_BASE			0x1013A000
+#define GICD_BASE			0x10139000
 
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */
 

commit 6d0f6303ecb42b2b984b593861d6d188d274cf00
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 16 19:24:46 2017 +0800

    irq-platform.h: add timer1 irq number definition
    
    Change-Id: I866f0aac9561a8cbe56d87a746aef259883be28e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/irq-platform.h b/include/irq-platform.h
index f1055a6834..ab907c4f3b 100644
--- a/include/irq-platform.h
+++ b/include/irq-platform.h
@@ -19,6 +19,7 @@
 #define GPIO_BANK_NUM			4
 #define GPIO_BANK_PINS			32
 
+#define IRQ_TIMER1			61
 #define IRQ_GPIO0			68
 #define IRQ_GPIO1			69
 #define IRQ_GPIO2			79
@@ -36,6 +37,7 @@
 #define GPIO_BANK_NUM			4
 #define GPIO_BANK_PINS			32
 
+#define IRQ_TIMER1			76
 #define IRQ_GPIO0			83
 #define IRQ_GPIO1			84
 #define IRQ_GPIO2			85
@@ -58,6 +60,7 @@
 #define GPIO_BANK_NUM			9
 #define GPIO_BANK_PINS			32
 
+#define IRQ_TIMER1			99
 #define IRQ_GPIO0			113
 #define IRQ_GPIO1			114
 #define IRQ_GPIO2			115
@@ -80,6 +83,7 @@
 #define GPIO_BANK_NUM			4
 #define GPIO_BANK_PINS			32
 
+#define IRQ_TIMER1			76
 #define IRQ_GPIO0			83
 #define IRQ_GPIO1			84
 #define IRQ_GPIO2			85
@@ -97,6 +101,7 @@
 #define GPIO_BANK_NUM			4
 #define GPIO_BANK_PINS			32
 
+#define IRQ_TIMER1			79
 #define IRQ_GPIO0			113
 #define IRQ_GPIO1			114
 #define IRQ_GPIO2			115
@@ -114,6 +119,7 @@
 #define IRQ_GPIO2			48
 #define IRQ_GPIO3			49
 #define IRQ_GPIO4			50
+#define IRQ_TIMER1			114	/* non-secure */
 
 #define GIC_IRQS_NR			(6 * 32)
 #define GPIO_IRQS_NR			(5 * 32)

commit 778da45f0b4c4e0c9c2664dcd4a6d9d02335bdba
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 16 19:14:29 2017 +0800

    irq-platform.h: rk3128: add irq numbers definition
    
    Change-Id: Idf3f3f1342bc1339d9e5efbe70d9ae7e059f50af
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/irq-platform.h b/include/irq-platform.h
index e3d16429ac..f1055a6834 100644
--- a/include/irq-platform.h
+++ b/include/irq-platform.h
@@ -7,7 +7,24 @@
 #ifndef _ROCKCHIP_PLAT_IRQ_H_
 #define _ROCKCHIP_PLAT_IRQ_H_
 
-#if defined(CONFIG_ROCKCHIP_RK322X)
+#if defined(CONFIG_ROCKCHIP_RK3128)
+#define GPIO0_PHYS			0x2007C000
+#define GPIO1_PHYS			0x20080000
+#define GPIO2_PHYS			0x20084000
+#define GPIO3_PHYS			0x20088000
+
+#define GIC_IRQS_NR			(4 * 32)
+#define GPIO_IRQS_NR			(4 * 32)
+
+#define GPIO_BANK_NUM			4
+#define GPIO_BANK_PINS			32
+
+#define IRQ_GPIO0			68
+#define IRQ_GPIO1			69
+#define IRQ_GPIO2			79
+#define IRQ_GPIO3			71
+
+#elif defined(CONFIG_ROCKCHIP_RK322X)
 #define GPIO0_PHYS			0x11110000
 #define GPIO1_PHYS			0x11120000
 #define GPIO2_PHYS			0x11130000

commit f960b24c88fc28e535d2c64836b91e38bd7148bc
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 16 17:44:23 2017 +0800

    configs: evb-rk3126: enable rk816 fuel gauge
    
    Change-Id: Ica59f1a0c6d4a91aee2f27bd8dad24ecf27bd171
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-rk3126_defconfig b/configs/evb-rk3126_defconfig
index b00cdcf4e6..152dfbe201 100644
--- a/configs/evb-rk3126_defconfig
+++ b/configs/evb-rk3126_defconfig
@@ -23,6 +23,8 @@ CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_ROCKCHIP_RK3128=y
+CONFIG_DM_FUEL_GAUGE=y
+CONFIG_POWER_FG_RK816=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y

commit 8c08c1e2598a2bac3e4fadc91ae452f018b229f2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 16 17:32:34 2017 +0800

    configs: evb-rk3126: enable CONFIG_DM_KEY
    
    Change-Id: I7b352b596934fd9ef98ccc86e082ff89b76ac67e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-rk3126_defconfig b/configs/evb-rk3126_defconfig
index 58a6571dc6..b00cdcf4e6 100644
--- a/configs/evb-rk3126_defconfig
+++ b/configs/evb-rk3126_defconfig
@@ -18,6 +18,7 @@ CONFIG_SYSCON=y
 CONFIG_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y

commit 00579f814fcd335511cd9c1931708561ed92ed69
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 16 17:28:36 2017 +0800

    rockchip: dts: rk3126-evb: add battery node of rk816
    
    Change-Id: I185a6110ba1bb0f415e9d7c0263524ae6ae27baa
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3126-evb.dts b/arch/arm/dts/rk3126-evb.dts
index d478953165..6ac6a35f5c 100644
--- a/arch/arm/dts/rk3126-evb.dts
+++ b/arch/arm/dts/rk3126-evb.dts
@@ -80,6 +80,29 @@
 			status = "okay";
 		};
 
+		battery {
+			compatible = "rk816-battery";
+			ocv_table = < 3400 3654 3686 3710 3744 3775 3803
+						  3825 3843 3858 3870 3886 3916 3955
+						  3988 4010 4023 4032 4049 4080 4151 >;
+			design_capacity = <2000>;
+			design_qmax = <2200>;
+			bat_res = <120>;
+			max_input_current = <2000>;
+			max_chrg_current = <1000>;
+			max_chrg_voltage = <4200>;
+			sleep_enter_current = <300>;
+			sleep_exit_current = <300>;
+			sleep_filter_current = <100>;
+			power_off_thresd = <3500>;
+			zero_algorithm_vol = <3800>;
+			max_soc_offset = <60>;
+			monitor_sec = <5>;
+			virtual_power = <0>;
+			power_dc2otg = <0>;
+			dc_det_adc = <0>;
+		};
+
 		regulators {
 
 			vdd_arm: DCDC_REG1{

commit 7bde6e15181d05b8b038e345f9cfb0b87284c265
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 16 17:41:16 2017 +0800

    fuel gauge: rk816: default enabled when PMIC_RK8XX selected
    
    Change-Id: I56c882bbb3023f56380d2c19acbcb98ccced43ba
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/Kconfig b/drivers/power/fuel_gauge/Kconfig
index 2299e2c397..3be00c67a3 100644
--- a/drivers/power/fuel_gauge/Kconfig
+++ b/drivers/power/fuel_gauge/Kconfig
@@ -13,5 +13,6 @@ config POWER_FG_RK818
 config POWER_FG_RK816
 	bool "RK816 Fuel gauge support"
 	depends on DM_FUEL_GAUGE && PMIC_RK8XX
+	default y
 	help
 	  This adds support for RK816 fuel gauge support.
diff --git a/drivers/power/fuel_gauge/fg_rk816.c b/drivers/power/fuel_gauge/fg_rk816.c
index 20a54d03c0..c58df8a6c4 100644
--- a/drivers/power/fuel_gauge/fg_rk816.c
+++ b/drivers/power/fuel_gauge/fg_rk816.c
@@ -206,7 +206,12 @@ static void rk816_bat_write(u8 reg, u8 buf)
 
 static int rk816_bat_dwc_otg_check_dpdm(void)
 {
+#ifdef CONFIG_PHY_ROCKCHIP_INNO_USB2
 	return rockchip_chg_get_type();
+#else
+	BAT_INFO("rockchip_chg_get_type() is not implement\n");
+	return NO_CHARGER;
+#endif
 }
 
 static int rk816_bat_get_rsoc(struct battery_info *di)

commit 2c62abd17cc890f79a9802680717ba4e2186b487
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Mon Oct 16 11:23:13 2017 +0800

    rockchip: rk3128: add regulators_enable_boot_on for pmic init
    
    add regulators_enable_boot_on to init pmic which have boot on flags.
    
    Change-Id: I17de4452c6d2fd30903cb0e8807fed96c12a26f6
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3128-board.c b/arch/arm/mach-rockchip/rk3128-board.c
index 70eda6fe2b..a650621558 100644
--- a/arch/arm/mach-rockchip/rk3128-board.c
+++ b/arch/arm/mach-rockchip/rk3128-board.c
@@ -14,6 +14,7 @@
 #include <asm/arch/grf_rk3128.h>
 #include <asm/arch/boot_mode.h>
 #include <asm/arch/timer.h>
+#include <power/regulator.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -59,8 +60,16 @@ int board_late_init(void)
 
 int board_init(void)
 {
+	int ret = 0;
+
 	rockchip_timer_init();
 
+	ret = regulators_enable_boot_on(false);
+	if (ret) {
+		debug("%s: Cannot enable boot on regulator\n", __func__);
+		return ret;
+	}
+
 	return 0;
 }
 

commit 56b13c4690641776eaa869a4b2d41cd324a0ff1e
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Mon Oct 16 11:20:23 2017 +0800

    rk3126: config: enable pmic rk816 config by default
    
    Change-Id: I792141962901ff38c24d4cb8928bfb4562e01670
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/configs/evb-rk3126_defconfig b/configs/evb-rk3126_defconfig
index a547546de5..58a6571dc6 100644
--- a/configs/evb-rk3126_defconfig
+++ b/configs/evb-rk3126_defconfig
@@ -22,8 +22,11 @@ CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_ROCKCHIP_RK3128=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
 CONFIG_RAM=y
 CONFIG_DEBUG_UART_BASE=0x20068000
 CONFIG_DEBUG_UART_CLOCK=24000000

commit 31a12144ebd927b9a68f3532441d7a39e4a5361a
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Mon Oct 16 11:19:17 2017 +0800

    rockchip: rk3126-evb: add i2c2 and rk816 nodes
    
    Change-Id: Ie032fd363e71633fbdca676e6e57ac9932ccc817
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/dts/rk3126-evb.dts b/arch/arm/dts/rk3126-evb.dts
index 2e6ca8762b..d478953165 100644
--- a/arch/arm/dts/rk3126-evb.dts
+++ b/arch/arm/dts/rk3126-evb.dts
@@ -50,6 +50,151 @@
 	};
 };
 
+&i2c2 {
+	clock-frequency = <100000>;
+	status = "okay";
+
+	rk816: pmic@1a {
+		compatible = "rockchip,rk816";
+		reg = <0x1a>;
+		interrupt-parent = <&gpio0>;
+		interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pmic_int_l>;
+		rockchip,system-power-controller;
+		wakeup-source;
+		gpio-controller;
+		#gpio-cells = <2>;
+		#clock-cells = <1>;
+		clock-output-names = "xin32k", "rk816-clkout2";
+
+		gpio {
+			status = "okay";
+		};
+
+		pwrkey {
+			status = "okay";
+		};
+
+		rtc {
+			status = "okay";
+		};
+
+		regulators {
+
+			vdd_arm: DCDC_REG1{
+				regulator-name= "vdd_arm";
+				regulator-min-microvolt = <750000>;
+				regulator-max-microvolt = <1500000>;
+				regulator-ramp-delay = <6001>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <900000>;
+				};
+			};
+
+			vdd_log: DCDC_REG2 {
+				regulator-name= "vdd_logic";
+				regulator-min-microvolt = <750000>;
+				regulator-max-microvolt = <1500000>;
+				regulator-ramp-delay = <6001>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1000000>;
+				};
+			};
+
+			vcc_ddr: DCDC_REG3 {
+				regulator-name = "vcc_ddr";
+				regulator-always-on;
+				regulator-boot-on;
+			};
+
+			vcc_io: DCDC_REG4 {
+				regulator-name = "vcc_io";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3000000>;
+				};
+			};
+
+			vcc28_cif: LDO_REG1 {
+				regulator-name = "vcc28_cif";
+				regulator-min-microvolt = <2800000>;
+				regulator-max-microvolt = <2800000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcc18_cif: LDO_REG2 {
+				regulator-name = "vcc18_cif";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vdd_11: LDO_REG3 {
+				regulator-name = "vdd_11";
+				regulator-min-microvolt = <1100000>;
+				regulator-max-microvolt = <1100000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1100000>;
+				};
+			};
+
+			ldo4: LDO_REG4 {
+				regulator-name= "ldo4";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			ldo5: LDO_REG5 {
+				regulator-name= "ldo5";
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3000000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			ldo6: LDO_REG6 {
+				regulator-name= "ldo6";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3300000>;
+				};
+			};
+		};
+	};
+};
+
 &usb_host {
 	status = "okay";
 };
@@ -75,4 +220,9 @@
 			rockchip,pins = <2 23 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
 	};
+
+	pmic_int_l: pmic-int-l {
+			rockchip,pins =
+				<0 2 RK_FUNC_GPIO &pcfg_pull_none>;
+	};
 };

commit 9ac6f4797ca1f9a9c5c1f4bdb8414fefa85f8bd3
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Mon Oct 16 11:17:19 2017 +0800

    rockchip: rk3128: fix up the i2c addr base and pinctrl define error
    
    Change-Id: I3dbb3f7b36ed4f48c3bdf475efe1f1735cbc33b8
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/dts/rk3128.dtsi b/arch/arm/dts/rk3128.dtsi
index e7710b7e12..0c59adad02 100644
--- a/arch/arm/dts/rk3128.dtsi
+++ b/arch/arm/dts/rk3128.dtsi
@@ -424,9 +424,9 @@
 		status = "disabled";
 	};
 
-	i2c0: i2c0@20070000 {
+	i2c0: i2c0@20072000 {
 		compatible = "rockchip,rk3128-i2c", "rockchip,rk3288-i2c";
-		reg = <0x20070000 0x1000>;
+		reg = <20072000 0x1000>;
 		interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
 		#address-cells = <1>;
 		#size-cells = <0>;
@@ -436,9 +436,9 @@
 		pinctrl-0 = <&i2c0_xfer>;
 	};
 
-	i2c1: i2c1@20054000 {
+	i2c1: i2c1@20056000 {
 		compatible = "rockchip,rk3128-i2c", "rockchip,rk3288-i2c";
-		reg = <0x20054000 0x1000>;
+		reg = <0x20056000 0x1000>;
 		interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
 		#address-cells = <1>;
 		#size-cells = <0>;
@@ -448,28 +448,28 @@
 		pinctrl-0 = <&i2c1_xfer>;
 	};
 
-	i2c2: i2c2@20058000 {
+	i2c2: i2c2@2005a000 {
 		compatible = "rockchip,rk3128-i2c", "rockchip,rk3288-i2c";
-		reg = <0x20058000 0x1000>;
+		reg = <0x2005a000 0x1000>;
 		interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
 		#address-cells = <1>;
 		#size-cells = <0>;
 		clock-names = "i2c";
 		clocks = <&cru PCLK_I2C2>;
 		pinctrl-names = "default";
-		pinctrl-0 = <&i2c0_xfer>;
+		pinctrl-0 = <&i2c2_xfer>;
 	};
 
-	i2c3: i2c3@2005c000 {
+	i2c3: i2c3@2005e000 {
 		compatible = "rockchip,rk3128-i2c", "rockchip,rk3288-i2c";
-		reg = <0x2005c000 0x1000>;
+		reg = <0x2005e000 0x1000>;
 		interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
 		#address-cells = <1>;
 		#size-cells = <0>;
 		clock-names = "i2c";
 		clocks = <&cru PCLK_I2C3>;
 		pinctrl-names = "default";
-		pinctrl-0 = <&i2c0_xfer>;
+		pinctrl-0 = <&i2c3_xfer>;
 	};
 
 	spi0: spi@20074000 {
@@ -704,8 +704,8 @@
 
 		i2c0 {
 			i2c0_xfer: i2c0-xfer {
-				rockchip,pins = <0 2 RK_FUNC_1 &pcfg_pull_none>,
-						<0 3 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <0 0 RK_FUNC_1 &pcfg_pull_none>,
+						<0 1 RK_FUNC_1 &pcfg_pull_none>;
 			};
 		};
 
@@ -718,15 +718,15 @@
 
 		i2c2 {
 			i2c2_xfer: i2c2-xfer {
-				rockchip,pins = <0 2 RK_FUNC_1 &pcfg_pull_none>,
-						<0 3 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <2 20 3 &pcfg_pull_none>,
+						<2 21 3 &pcfg_pull_none>;
 			};
 		};
 
 		i2c3 {
 			i2c3_xfer: i2c3-xfer {
-				rockchip,pins = <0 2 RK_FUNC_1 &pcfg_pull_none>,
-						<0 3 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <0 6 RK_FUNC_1 &pcfg_pull_none>,
+						<0 7 RK_FUNC_1 &pcfg_pull_none>;
 			};
 		};
 

commit 19d1aa3c9c413f45f8f215ca851aa05c6142e047
Author: Mark Yao <mark.yao@rock-chips.com>
Date:   Fri Sep 15 16:33:05 2017 +0800

    rockchip: rk3399: default enable bmp display
    
    Change-Id: Ia8f2db14e4423407bfc267cb9d9080b05ca993da
    Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

diff --git a/include/configs/evb_rk3399.h b/include/configs/evb_rk3399.h
index e9143c92db..8ae1c4ee32 100644
--- a/include/configs/evb_rk3399.h
+++ b/include/configs/evb_rk3399.h
@@ -24,6 +24,10 @@
 #define CONFIG_SERIAL_TAG
 #define CONFIG_ENV_OVERWRITE
 
+#define CONFIG_BMP_16BPP
+#define CONFIG_BMP_24BPP
+#define CONFIG_BMP_32BPP
+
 #define ROCKCHIP_DEVICE_SETTINGS \
 		"stdout=serial,vidconsole\0" \
 		"stderr=serial,vidconsole\0"

commit 5174e4ff732e2791a223d681870ff517073713a5
Author: Mark Yao <mark.yao@rock-chips.com>
Date:   Fri Sep 15 16:29:08 2017 +0800

    rk3399: config: evb: enable drm display related configs
    
    Change-Id: I3abdf6caf533f6dbc7bc979718adff0302676e78
    Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index cbdfdda503..770c9287fb 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -71,9 +71,6 @@ CONFIG_USB_ETHER_RTL8152=y
 CONFIG_USB_ETHER_SMSC95XX=y
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
-CONFIG_VIDEO_ROCKCHIP=y
-CONFIG_VIDEO_ROCKCHIP_MAX_YRES=1200
-CONFIG_DISPLAY_ROCKCHIP_MIPI=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_ERRNO_STR=y
 CONFIG_USB_GADGET=y
@@ -93,3 +90,12 @@ CONFIG_FASTBOOT_FLASH_MMC_DEV=1
 CONFIG_FASTBOOT_BUF_ADDR=0x00800800
 CONFIG_FASTBOOT_BUF_SIZE=0x08000000
 CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_LCD=y
+CONFIG_VIDEO=y
+CONFIG_CONSOLE_NORMAL=y
+CONFIG_CMD_BMP=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_VOP=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_DRM_ROCKCHIP_PANEL=y
+CONFIG_DRM_ROCKCHIP_MIPI_DSI=y

commit 9a87226564e717dca81a862f364fcfe2f3c696fe
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Mon Oct 16 11:16:26 2017 +0800

    clk: rockchip: rk3128: support i2c clk get and set rate
    
    Change-Id: I16af8297918b677165244330a4a39d3f041d5ee4
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c
index 830848ea24..f344047a6c 100644
--- a/drivers/clk/rockchip/clk_rk3128.c
+++ b/drivers/clk/rockchip/clk_rk3128.c
@@ -275,6 +275,48 @@ static ulong rockchip_mmc_set_clk(struct rk3128_cru *cru, uint clk_general_rate,
 	return rockchip_mmc_get_clk(cru, clk_general_rate, periph);
 }
 
+static ulong rk3128_i2c_get_clk(struct rk3128_cru *cru, ulong clk_id)
+{
+	u32 div, con;
+
+	switch (clk_id) {
+	case PCLK_I2C0:
+	case PCLK_I2C1:
+	case PCLK_I2C2:
+	case PCLK_I2C3:
+		con = readl(&cru->cru_clksel_con[10]);
+		div = con >> 12 & 0x3;
+		break;
+	default:
+		printf("do not support this i2c bus\n");
+		return -EINVAL;
+	}
+
+	return DIV_TO_RATE(PERI_ACLK_HZ, div);
+}
+
+static ulong rk3128_i2c_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz)
+{
+	int src_clk_div;
+
+	src_clk_div = PERI_ACLK_HZ / hz;
+	assert(src_clk_div - 1 < 4);
+
+	switch (clk_id) {
+	case PCLK_I2C0:
+	case PCLK_I2C1:
+	case PCLK_I2C2:
+	case PCLK_I2C3:
+		rk_setreg(&cru->cru_clksel_con[10],
+			  ((src_clk_div - 1) << 12));
+		break;
+	default:
+		printf("do not support this i2c bus\n");
+		return -EINVAL;
+	}
+
+	return DIV_TO_RATE(PERI_ACLK_HZ, src_clk_div);
+}
 static ulong rk3128_clk_get_rate(struct clk *clk)
 {
 	struct rk3128_clk_priv *priv = dev_get_priv(clk->dev);
@@ -282,6 +324,12 @@ static ulong rk3128_clk_get_rate(struct clk *clk)
 	switch (clk->id) {
 	case 0 ... 63:
 		return rkclk_pll_get_rate(priv->cru, clk->id);
+	case PCLK_I2C0:
+	case PCLK_I2C1:
+	case PCLK_I2C2:
+	case PCLK_I2C3:
+		return rk3128_i2c_get_clk(priv->cru, clk->id);
+		break;
 	default:
 		return -ENOENT;
 	}
@@ -300,6 +348,12 @@ static ulong rk3128_clk_set_rate(struct clk *clk, ulong rate)
 		new_rate = rockchip_mmc_set_clk(priv->cru, gclk_rate,
 						clk->id, rate);
 		break;
+	case PCLK_I2C0:
+	case PCLK_I2C1:
+	case PCLK_I2C2:
+	case PCLK_I2C3:
+		new_rate = rk3128_i2c_set_clk(priv->cru, clk->id, rate);
+		break;
 	default:
 		return -ENOENT;
 	}

commit 9f9d01585cb94be301305b8f50f41a28e46ac336
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 16 16:33:38 2017 +0800

    rockchip: clk: rk3128: fix GPIO2C4_SHIFT and GPIO2C5_SHIFT define error
    
    The other I2C definitions are all correct.
    
    Change-Id: I24559cae054db39a203ae44de1519c14ed543b64
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3128.h b/arch/arm/include/asm/arch-rockchip/grf_rk3128.h
index 5da6cd2351..68c23ec6d0 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rk3128.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3128.h
@@ -536,13 +536,13 @@ enum {
 	GPIO2C6_GPIO		= 0,
 	GPIO2C6_GMAC_TXD2	= 4,
 
-	GPIO2C5_SHIFT		= 12,
+	GPIO2C5_SHIFT		= 4,
 	GPIO2C5_MASK		= 7 << GPIO2C5_SHIFT,
 	GPIO2C5_GPIO		= 0,
 	GPIO2C5_I2C2_SCL	= 3,
 	GPIO2C5_GMAC_RXD2,
 
-	GPIO2C4_SHIFT		= 12,
+	GPIO2C4_SHIFT		= 0,
 	GPIO2C4_MASK		= 7 << GPIO2C4_SHIFT,
 	GPIO2C4_GPIO		= 0,
 	GPIO2C4_I2C2_SDA	= 3,

commit 186f85721af2c81d74566143f7ec69d2655d02e4
Author: Mark Yao <mark.yao@rock-chips.com>
Date:   Fri Sep 15 16:23:03 2017 +0800

    drm/rockhcip: add drm rockchip display support
    
    Change-Id: I5ef0e29d1e0855a7aa47bd0737835b79c53bf25a
    Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 082cc4a528..48b77eb8d7 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -426,6 +426,7 @@ config VIDEO_FSL_DCU_MAX_FB_SIZE_MB
 	 Controller Unit (DCU4).
 
 source "drivers/video/rockchip/Kconfig"
+source "drivers/video/drm/Kconfig"
 
 config VIDEO_SANDBOX_SDL
 	bool "Enable sandbox video console using SDL"
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 5cf8909295..52a7aa0e62 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -57,6 +57,7 @@ obj-$(CONFIG_VIDEO_DW_HDMI) += dw_hdmi.o
 obj-${CONFIG_VIDEO_TEGRA124} += tegra124/
 obj-${CONFIG_EXYNOS_FB} += exynos/
 obj-${CONFIG_VIDEO_ROCKCHIP} += rockchip/
+obj-${CONFIG_DRM_ROCKCHIP} += drm/
 
 obj-y += bridge/
 obj-y += sunxi/
diff --git a/drivers/video/drm/Kconfig b/drivers/video/drm/Kconfig
new file mode 100644
index 0000000000..598d4c0265
--- /dev/null
+++ b/drivers/video/drm/Kconfig
@@ -0,0 +1,46 @@
+menuconfig DRM_ROCKCHIP
+	bool "Rockchip DRM Support"
+	depends on DM_VIDEO
+	help
+	  Rockchip SoCs provide video output capabilities for High-Definition
+	  Multimedia Interface (HDMI), Low-voltage Differential Signalling
+	  (LVDS), embedded DisplayPort (eDP) and Display Serial Interface (DSI).
+
+	  This driver supports the on-chip video output device, and targets the
+	  Rockchip RK3288 and RK3399.
+
+config DRM_ROCKCHIP_PANEL
+	bool
+
+config DRM_ROCKCHIP_MIPI_DSI
+	bool
+
+config DRM_ROCKCHIP_DW_MIPI_DSI
+	tristate "Rockchip specific extensions for Synopsys DW MIPI DSI"
+	depends on DRM_ROCKCHIP
+	select DRM_ROCKCHIP_MIPI_DSI
+	select DRM_ROCKCHIP_PANEL
+	help
+	 This selects support for Rockchip SoC specific extensions
+	 for the Synopsys DesignWare HDMI driver. If you want to
+	 enable MIPI DSI on RK3288 based SoC, you should selet this
+	 option.
+
+config DRM_ROCKCHIP_ANALOGIX_DP
+	bool "Rockchip specific extensions for Analogix DP driver"
+	depends on DRM_ROCKCHIP
+	select DRM_ROCKCHIP_PANEL
+	help
+	  This selects support for Rockchip SoC specific extensions
+	  for the Analogix Core DP driver. If you want to enable DP
+	  on RK3288 based SoC, you should selet this option.
+
+config DRM_ROCKCHIP_LVDS
+	bool "Rockchip LVDS Support"
+	depends on DRM_ROCKCHIP
+	select DRM_ROCKCHIP_PANEL
+	help
+	  Choose this option to enable support for Rockchip LVDS controllers.
+	  Rockchip rk3288 SoC has LVDS TX Controller can be used, and it
+	  support LVDS, rgb, dual LVDS output mode. say Y to enable its
+	  driver.
diff --git a/drivers/video/drm/Makefile b/drivers/video/drm/Makefile
new file mode 100755
index 0000000000..d9c0b1c7a2
--- /dev/null
+++ b/drivers/video/drm/Makefile
@@ -0,0 +1,15 @@
+#
+# (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y += rockchip_display.o rockchip_crtc.o rockchip_phy.o \
+		rockchip_vop.o rockchip_vop_reg.o bmp_helper.o
+
+obj-$(CONFIG_DRM_ROCKCHIP_MIPI_DSI)	+= rockchip_mipi_dsi.o
+obj-$(CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI) += rockchip-dw-mipi-dsi.o rockchip-inno-mipi-dphy.o
+obj-$(CONFIG_DRM_ROCKCHIP_ANALOGIX_DP) += rockchip_analogix_dp.o rockchip_analogix_dp_reg.o
+obj-$(CONFIG_DRM_ROCKCHIP_LVDS) += rockchip_lvds.o
+obj-$(CONFIG_DRM_ROCKCHIP_PANEL) += rockchip_panel.o panel_simple.o \
+					rockchip_dsi_panel.o
diff --git a/drivers/video/drm/bmp_helper.c b/drivers/video/drm/bmp_helper.c
new file mode 100755
index 0000000000..a95fe88147
--- /dev/null
+++ b/drivers/video/drm/bmp_helper.c
@@ -0,0 +1,239 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ * Author: Mark Yao <mark.yao@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#include <config.h>
+#include <common.h>
+#include <malloc.h>
+#include <asm/unaligned.h>
+#include <bmp_layout.h>
+
+#define BMP_RLE8_ESCAPE		0
+#define BMP_RLE8_EOL		0
+#define BMP_RLE8_EOBMP		1
+#define BMP_RLE8_DELTA		2
+
+static void draw_unencoded_bitmap(uint16_t **dst, uint8_t *bmap, uint16_t *cmap,
+				  uint32_t cnt)
+{
+	while (cnt > 0) {
+		*(*dst)++ = cmap[*bmap++];
+		cnt--;
+	}
+}
+
+static void draw_encoded_bitmap(uint16_t **dst, uint16_t c, uint32_t cnt)
+{
+	uint16_t *fb = *dst;
+	int cnt_8copy = cnt >> 3;
+
+	cnt -= cnt_8copy << 3;
+	while (cnt_8copy > 0) {
+		*fb++ = c;
+		*fb++ = c;
+		*fb++ = c;
+		*fb++ = c;
+		*fb++ = c;
+		*fb++ = c;
+		*fb++ = c;
+		*fb++ = c;
+		cnt_8copy--;
+	}
+	while (cnt > 0) {
+		*fb++ = c;
+		cnt--;
+	}
+	*dst = fb;
+}
+
+static void decode_rle8_bitmap(void *psrc, void *pdst, uint16_t *cmap,
+			       int width, int height, int bits, int x_off,
+			       int y_off, bool flip)
+{
+	uint32_t cnt, runlen;
+	int x = 0, y = 0;
+	int decode = 1;
+	int linesize = width * 2;
+	uint8_t *bmap = psrc;
+	uint8_t *dst = pdst;
+
+	if (flip) {
+		y = height - 1;
+		dst = pdst + y * linesize;
+	}
+
+	while (decode) {
+		if (bmap[0] == BMP_RLE8_ESCAPE) {
+			switch (bmap[1]) {
+			case BMP_RLE8_EOL:
+				/* end of line */
+				bmap += 2;
+				x = 0;
+				if (flip) {
+					y--;
+					dst -= linesize * 2;
+				} else {
+					y++;
+				}
+				break;
+			case BMP_RLE8_EOBMP:
+				/* end of bitmap */
+				decode = 0;
+				break;
+			case BMP_RLE8_DELTA:
+				/* delta run */
+				x += bmap[2];
+				if (flip) {
+					y -= bmap[3];
+					dst -= bmap[3] * linesize;
+					dst += bmap[2] * 2;
+				} else {
+					y += bmap[3];
+					dst += bmap[3] * linesize;
+					dst += bmap[2] * 2;
+				}
+				bmap += 4;
+				break;
+			default:
+				/* unencoded run */
+				runlen = bmap[1];
+				bmap += 2;
+				if (y >= height || x >= width) {
+					decode = 0;
+					break;
+				}
+				if (x + runlen > width)
+					cnt = width - x;
+				else
+					cnt = runlen;
+				draw_unencoded_bitmap((uint16_t **)&dst, bmap,
+						      cmap, cnt);
+				x += runlen;
+				bmap += runlen;
+				if (runlen & 1)
+					bmap++;
+			}
+		} else {
+			/* encoded run */
+			if (y < height) {
+				runlen = bmap[0];
+				if (x < width) {
+					/* aggregate the same code */
+					while (bmap[0] == 0xff &&
+					       bmap[2] != BMP_RLE8_ESCAPE &&
+					       bmap[1] == bmap[3]) {
+						runlen += bmap[2];
+						bmap += 2;
+					}
+					if (x + runlen > width)
+						cnt = width - x;
+					else
+						cnt = runlen;
+					draw_encoded_bitmap((uint16_t **)&dst,
+							    cmap[bmap[1]], cnt);
+				}
+				x += runlen;
+			}
+			bmap += 2;
+		}
+	}
+}
+
+int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp)
+{
+	int stride, padded_width, bpp, i, width, height;
+	struct bmp_image *bmp = bmp_addr;
+	uint8_t *src = bmp_addr;
+	uint8_t *dst = pdst;
+	bool flip = false;
+	uint16_t *cmap;
+	uint8_t *cmap_base;
+
+	if (!bmp || !(bmp->header.signature[0] == 'B' &&
+	    bmp->header.signature[1] == 'M')) {
+		printf("cat not find bmp file\n");
+		return -1;
+	}
+	width = get_unaligned_le32(&bmp->header.width);
+	height = get_unaligned_le32(&bmp->header.height);
+	bpp = get_unaligned_le16(&bmp->header.bit_count);
+	padded_width = width & 0x3 ? (width & ~0x3) + 4 : width;
+
+	if (height < 0)
+		height = 0 - height;
+	else
+		flip = true;
+
+	cmap_base = src + sizeof(bmp->header);
+	src = bmp_addr + get_unaligned_le32(&bmp->header.data_offset);
+
+	switch (bpp) {
+	case 8:
+		if (dst_bpp != 16) {
+			printf("can't support covert bmap to bit[%d]\n",
+			       dst_bpp);
+			return -1;
+		}
+		cmap = malloc(sizeof(cmap) * 256);
+
+		/* Set color map */
+		for (i = 0; i < 256; i++) {
+			ushort colreg = ((cmap_base[0] << 8) & 0xf800) |
+					((cmap_base[1] << 3) & 0x07e0) |
+					((cmap_base[2] >> 3) & 0x001f) ;
+			cmap_base += 4;
+			cmap[i] = colreg;
+		}
+		/*
+		 * only support convert 8bit bmap file to RGB565.
+		 */
+		if (get_unaligned_le32(&bmp->header.compression)) {
+			decode_rle8_bitmap(src, dst, cmap, width, height,
+					   bpp, 0, 0, flip);
+		} else {
+			int j;
+			stride = width * 2;
+
+			if (flip)
+				dst += stride * (height - 1);
+
+			for (i = 0; i < height; ++i) {
+				for (j = 0; j < width; j++) {
+					*(uint16_t *)dst = cmap[*(src++)];
+					dst += sizeof(uint16_t) / sizeof(*dst);
+				}
+				src += (padded_width - width);
+				if (flip)
+					dst -= stride * 2;
+			}
+		}
+		free(cmap);
+		break;
+	case 24:
+		if (get_unaligned_le32(&bmp->header.compression)) {
+			printf("can't not support compression for 24bit bmap");
+			return -1;
+		}
+		stride = ALIGN(width * 3, 4);
+		if (flip)
+			src += stride * (height - 1);
+
+		for (i = 0; i < height; i++) {
+			memcpy(dst, src, 3 * width);
+			dst += stride;
+			src += stride;
+			if (flip)
+				src -= stride * 2;
+		}
+		break;
+	case 16:
+	case 32:
+	default:
+		printf("unsupport bit=%d now\n", bpp);
+		return -1;
+	}
+
+	return 0;
+}
diff --git a/drivers/video/drm/bmp_helper.h b/drivers/video/drm/bmp_helper.h
new file mode 100644
index 0000000000..5e125004d2
--- /dev/null
+++ b/drivers/video/drm/bmp_helper.h
@@ -0,0 +1,19 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ * Author: Mark Yao <mark.yao@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _BMP_HELPER_H_
+#define _BMP_HELPER_H_
+
+#define BMP_RLE8_ESCAPE		0
+#define BMP_RLE8_EOL		0
+#define BMP_RLE8_EOBMP		1
+#define BMP_RLE8_DELTA		2
+
+#define range(x, min, max) ((x) < (min)) ? (min) : (((x) > (max)) ? (max) : (x))
+
+int bmpdecoder(void *bmp_addr, void *dst, int dst_bpp);
+#endif /* _BMP_HELPER_H_ */
diff --git a/drivers/video/drm/panel_simple.c b/drivers/video/drm/panel_simple.c
new file mode 100644
index 0000000000..8047ebc636
--- /dev/null
+++ b/drivers/video/drm/panel_simple.c
@@ -0,0 +1,170 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <config.h>
+#include <common.h>
+#include <errno.h>
+#include <malloc.h>
+#include <fdtdec.h>
+#include <fdt_support.h>
+#include <asm/unaligned.h>
+#include <linux/list.h>
+#include <linux/media-bus-format.h>
+#include <dm/uclass.h>
+#include <dm/uclass-id.h>
+#include <asm/gpio.h>
+#include <backlight.h>
+
+#include "rockchip_display.h"
+#include "rockchip_crtc.h"
+#include "rockchip_connector.h"
+#include "rockchip_panel.h"
+
+#define msleep(a)	udelay(a * 1000)
+
+struct panel_simple {
+	struct udevice *dev;
+	const void *blob;
+	int node;
+
+	const struct drm_display_mode *mode;
+	int bus_format;
+
+	struct udevice *backlight;
+	struct gpio_desc enable;
+
+	int delay_prepare;
+	int delay_unprepare;
+	int delay_enable;
+	int delay_disable;
+};
+
+static int panel_simple_prepare(struct display_state *state)
+{
+	struct panel_state *panel_state = &state->panel_state;
+	struct panel_simple *panel = panel_state->private;
+
+	dm_gpio_set_value(&panel->enable, 1);
+	mdelay(panel->delay_prepare);
+
+	return 0;
+}
+
+static int panel_simple_unprepare(struct display_state *state)
+{
+	struct panel_state *panel_state = &state->panel_state;
+	struct panel_simple *panel = panel_state->private;
+
+	dm_gpio_set_value(&panel->enable, 0);
+	mdelay(panel->delay_unprepare);
+
+	return 0;
+}
+
+static int panel_simple_enable(struct display_state *state)
+{
+	struct panel_state *panel_state = &state->panel_state;
+	struct panel_simple *panel = panel_state->private;
+
+	backlight_enable(panel->backlight);
+	mdelay(panel->delay_enable);
+
+	return 0;
+}
+
+static int panel_simple_disable(struct display_state *state)
+{
+	/* TODO: backlight_disable:
+	 * presently uboot not support backlight disable.
+	 */
+
+	return 0;
+}
+
+static int panel_simple_parse_dt(const void *blob, int node,
+				 struct panel_simple *panel)
+{
+	int ret;
+
+	ret = gpio_request_by_name(panel->dev, "enable-gpios", 0,
+				   &panel->enable, GPIOD_IS_OUT);
+	if (ret != -ENOENT) {
+		printf("%s: Warning: cannot get enable GPIO: ret=%d\n",
+		      __func__, ret);
+		return ret;
+	}
+
+	ret = uclass_get_device_by_phandle(UCLASS_PANEL_BACKLIGHT, panel->dev,
+					   "backlight", &panel->backlight);
+	if (ret) {
+		printf("%s: Cannot get backlight: ret=%d\n", __func__, ret);
+		return ret;
+	}
+
+	panel->delay_prepare = fdtdec_get_int(blob, node, "delay,prepare", 0);
+	panel->delay_unprepare = fdtdec_get_int(blob, node, "delay,unprepare", 0);
+	panel->delay_enable = fdtdec_get_int(blob, node, "delay,enable", 0);
+	panel->delay_disable = fdtdec_get_int(blob, node, "delay,disable", 0);
+	panel->bus_format = fdtdec_get_int(blob, node, "bus-format", MEDIA_BUS_FMT_RBG888_1X24);
+
+	printf("delay prepare[%d] unprepare[%d] enable[%d] disable[%d]\n",
+	       panel->delay_prepare, panel->delay_unprepare,
+	       panel->delay_enable, panel->delay_disable);
+
+	/* keep panel blank on init. */
+	dm_gpio_set_value(&panel->enable, 0);
+
+	return 0;
+}
+
+static int panel_simple_init(struct display_state *state)
+{
+	const void *blob = state->blob;
+	struct connector_state *conn_state = &state->conn_state;
+	struct panel_state *panel_state = &state->panel_state;
+	int node = panel_state->node;
+	const struct drm_display_mode *mode = panel_state->panel->data;
+	struct panel_simple *panel;
+	int ret;
+
+	panel = malloc(sizeof(*panel));
+	if (!panel)
+		return -ENOMEM;
+
+	panel->blob = blob;
+	panel->node = node;
+	panel->mode = mode;
+	panel->dev = panel_state->dev;
+	panel_state->private = panel;
+
+	ret = panel_simple_parse_dt(blob, node, panel);
+	if (ret) {
+		printf("%s: failed to parse DT\n", __func__);
+		free(panel);
+		return ret;
+	}
+
+	conn_state->bus_format = panel->bus_format;
+
+	return 0;
+}
+
+static void panel_simple_deinit(struct display_state *state)
+{
+	struct panel_state *panel_state = &state->panel_state;
+	struct panel_simple *panel = panel_state->private;
+
+	free(panel);
+}
+
+const struct rockchip_panel_funcs panel_simple_funcs = {
+	.init		= panel_simple_init,
+	.deinit		= panel_simple_deinit,
+	.prepare	= panel_simple_prepare,
+	.unprepare	= panel_simple_unprepare,
+	.enable		= panel_simple_enable,
+	.disable	= panel_simple_disable,
+};
diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
new file mode 100644
index 0000000000..ab1d7042df
--- /dev/null
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -0,0 +1,1025 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <config.h>
+#include <common.h>
+#include <errno.h>
+#include <malloc.h>
+#include <fdtdec.h>
+#include <fdt_support.h>
+#include <asm/unaligned.h>
+#include <asm/io.h>
+#include <linux/list.h>
+#include <dm/device.h>
+#include <syscon.h>
+#include <asm/arch-rockchip/clock.h>
+
+#include "rockchip_display.h"
+#include "rockchip_crtc.h"
+#include "rockchip_connector.h"
+#include "rockchip_phy.h"
+#include "rockchip_mipi_dsi.h"
+
+#define MSEC_PER_SEC    1000L
+#define USEC_PER_SEC	1000000L
+
+#define readx_poll_timeout(op, addr, val, cond, sleep_us, timeout_us)	\
+({ \
+	int try = 100; \
+	for (;;) { \
+		(val) = op(addr); \
+		if (cond) \
+			break; \
+		try--; \
+		if (!try) \
+			break; \
+		if (sleep_us) \
+			udelay(sleep_us >> 2); \
+	} \
+	(cond) ? 0 : -ETIMEDOUT; \
+})
+
+#define RK3288_GRF_SOC_CON6		0x025c
+#define RK3288_DSI0_SEL_VOP_LIT		BIT(6)
+#define RK3288_DSI1_SEL_VOP_LIT		BIT(9)
+
+#define RK3399_GRF_SOC_CON19		0x6250
+#define RK3399_DSI0_SEL_VOP_LIT		BIT(0)
+#define RK3399_DSI1_SEL_VOP_LIT		BIT(4)
+
+/* disable turnrequest, turndisable, forcetxstopmode, forcerxmode */
+#define RK3399_GRF_SOC_CON22		0x6258
+#define RK3399_GRF_DSI_MODE		0xffff0000
+
+#define DSI_VERSION			0x00
+#define DSI_PWR_UP			0x04
+#define RESET				0
+#define POWERUP				BIT(0)
+
+#define DSI_CLKMGR_CFG			0x08
+#define TO_CLK_DIVIDSION(div)		(((div) & 0xff) << 8)
+#define TX_ESC_CLK_DIVIDSION(div)	(((div) & 0xff) << 0)
+
+#define DSI_DPI_VCID			0x0c
+#define DPI_VID(vid)			(((vid) & 0x3) << 0)
+
+#define DSI_DPI_COLOR_CODING		0x10
+#define EN18_LOOSELY			BIT(8)
+#define DPI_COLOR_CODING_16BIT_1	0x0
+#define DPI_COLOR_CODING_16BIT_2	0x1
+#define DPI_COLOR_CODING_16BIT_3	0x2
+#define DPI_COLOR_CODING_18BIT_1	0x3
+#define DPI_COLOR_CODING_18BIT_2	0x4
+#define DPI_COLOR_CODING_24BIT		0x5
+
+#define DSI_DPI_CFG_POL			0x14
+#define COLORM_ACTIVE_LOW		BIT(4)
+#define SHUTD_ACTIVE_LOW		BIT(3)
+#define HSYNC_ACTIVE_LOW		BIT(2)
+#define VSYNC_ACTIVE_LOW		BIT(1)
+#define DATAEN_ACTIVE_LOW		BIT(0)
+
+#define DSI_DPI_LP_CMD_TIM		0x18
+#define OUTVACT_LPCMD_TIME(p)		(((p) & 0xff) << 16)
+#define INVACT_LPCMD_TIME(p)		((p) & 0xff)
+
+#define DSI_DBI_CFG			0x20
+#define DSI_DBI_CMDSIZE			0x28
+
+#define DSI_PCKHDL_CFG			0x2c
+#define EN_CRC_RX			BIT(4)
+#define EN_ECC_RX			BIT(3)
+#define EN_BTA				BIT(2)
+#define EN_EOTP_RX			BIT(1)
+#define EN_EOTP_TX			BIT(0)
+
+#define DSI_MODE_CFG			0x34
+#define ENABLE_VIDEO_MODE		0
+#define ENABLE_CMD_MODE			BIT(0)
+
+#define DSI_VID_MODE_CFG		0x38
+#define FRAME_BTA_ACK			BIT(14)
+#define ENABLE_LOW_POWER		(0x3f << 8)
+#define ENABLE_LOW_POWER_MASK		(0x3f << 8)
+#define VID_MODE_TYPE_BURST_SYNC_PULSES		0x2
+#define VID_MODE_TYPE_MASK			0x3
+
+#define DSI_VID_PKT_SIZE		0x3c
+#define VID_PKT_SIZE(p)			(((p) & 0x3fff) << 0)
+#define VID_PKT_MAX_SIZE		0x3fff
+
+#define DSI_VID_HSA_TIME		0x48
+#define DSI_VID_HBP_TIME		0x4c
+#define DSI_VID_HLINE_TIME		0x50
+#define DSI_VID_VSA_LINES		0x54
+#define DSI_VID_VBP_LINES		0x58
+#define DSI_VID_VFP_LINES		0x5c
+#define DSI_VID_VACTIVE_LINES		0x60
+#define DSI_CMD_MODE_CFG		0x68
+#define MAX_RD_PKT_SIZE_LP		BIT(24)
+#define DCS_LW_TX_LP			BIT(19)
+#define DCS_SR_0P_TX_LP			BIT(18)
+#define DCS_SW_1P_TX_LP			BIT(17)
+#define DCS_SW_0P_TX_LP			BIT(16)
+#define GEN_LW_TX_LP			BIT(14)
+#define GEN_SR_2P_TX_LP			BIT(13)
+#define GEN_SR_1P_TX_LP			BIT(12)
+#define GEN_SR_0P_TX_LP			BIT(11)
+#define GEN_SW_2P_TX_LP			BIT(10)
+#define GEN_SW_1P_TX_LP			BIT(9)
+#define GEN_SW_0P_TX_LP			BIT(8)
+#define EN_ACK_RQST			BIT(1)
+#define EN_TEAR_FX			BIT(0)
+
+#define CMD_MODE_ALL_LP			(MAX_RD_PKT_SIZE_LP | \
+					 DCS_LW_TX_LP | \
+					 DCS_SR_0P_TX_LP | \
+					 DCS_SW_1P_TX_LP | \
+					 DCS_SW_0P_TX_LP | \
+					 GEN_LW_TX_LP | \
+					 GEN_SR_2P_TX_LP | \
+					 GEN_SR_1P_TX_LP | \
+					 GEN_SR_0P_TX_LP | \
+					 GEN_SW_2P_TX_LP | \
+					 GEN_SW_1P_TX_LP | \
+					 GEN_SW_0P_TX_LP)
+
+#define DSI_GEN_HDR			0x6c
+#define GEN_HDATA(data)			(((data) & 0xffff) << 8)
+#define GEN_HDATA_MASK			(0xffff << 8)
+#define GEN_HTYPE(type)			(((type) & 0xff) << 0)
+#define GEN_HTYPE_MASK			0xff
+
+#define DSI_GEN_PLD_DATA		0x70
+
+#define DSI_CMD_PKT_STATUS		0x74
+#define GEN_CMD_EMPTY			BIT(0)
+#define GEN_CMD_FULL			BIT(1)
+#define GEN_PLD_W_EMPTY			BIT(2)
+#define GEN_PLD_W_FULL			BIT(3)
+#define GEN_PLD_R_EMPTY			BIT(4)
+#define GEN_PLD_R_FULL			BIT(5)
+#define GEN_RD_CMD_BUSY			BIT(6)
+
+#define DSI_TO_CNT_CFG			0x78
+#define HSTX_TO_CNT(p)			(((p) & 0xffff) << 16)
+#define LPRX_TO_CNT(p)			((p) & 0xffff)
+
+#define DSI_BTA_TO_CNT			0x8c
+#define DSI_LPCLK_CTRL			0x94
+#define AUTO_CLKLANE_CTRL		BIT(1)
+#define PHY_TXREQUESTCLKHS		BIT(0)
+
+#define DSI_PHY_TMR_LPCLK_CFG		0x98
+#define PHY_CLKHS2LP_TIME(lbcc)		(((lbcc) & 0x3ff) << 16)
+#define PHY_CLKLP2HS_TIME(lbcc)		((lbcc) & 0x3ff)
+
+#define DSI_PHY_TMR_CFG			0x9c
+#define PHY_HS2LP_TIME(lbcc)		(((lbcc) & 0xff) << 24)
+#define PHY_LP2HS_TIME(lbcc)		(((lbcc) & 0xff) << 16)
+#define MAX_RD_TIME(lbcc)		((lbcc) & 0x7fff)
+
+#define DSI_PHY_RSTZ			0xa0
+#define PHY_DISFORCEPLL			0
+#define PHY_ENFORCEPLL			BIT(3)
+#define PHY_DISABLECLK			0
+#define PHY_ENABLECLK			BIT(2)
+#define PHY_RSTZ			0
+#define PHY_UNRSTZ			BIT(1)
+#define PHY_SHUTDOWNZ			0
+#define PHY_UNSHUTDOWNZ			BIT(0)
+
+#define DSI_PHY_IF_CFG			0xa4
+#define N_LANES(n)			((((n) - 1) & 0x3) << 0)
+#define PHY_STOP_WAIT_TIME(cycle)	(((cycle) & 0xff) << 8)
+
+#define DSI_PHY_STATUS			0xb0
+#define LOCK				BIT(0)
+#define STOP_STATE_CLK_LANE		BIT(2)
+
+#define DSI_PHY_TST_CTRL0		0xb4
+#define PHY_TESTCLK			BIT(1)
+#define PHY_UNTESTCLK			0
+#define PHY_TESTCLR			BIT(0)
+#define PHY_UNTESTCLR			0
+
+#define DSI_PHY_TST_CTRL1		0xb8
+#define PHY_TESTEN			BIT(16)
+#define PHY_UNTESTEN			0
+#define PHY_TESTDOUT(n)			(((n) & 0xff) << 8)
+#define PHY_TESTDIN(n)			(((n) & 0xff) << 0)
+
+#define DSI_INT_ST0			0xbc
+#define DSI_INT_ST1			0xc0
+#define DSI_INT_MSK0			0xc4
+#define DSI_INT_MSK1			0xc8
+
+#define PHY_STATUS_TIMEOUT_US		10000
+#define CMD_PKT_STATUS_TIMEOUT_US	20000
+
+#define BYPASS_VCO_RANGE	BIT(7)
+#define VCO_RANGE_CON_SEL(val)	(((val) & 0x7) << 3)
+#define VCO_IN_CAP_CON_DEFAULT	(0x0 << 1)
+#define VCO_IN_CAP_CON_LOW	(0x1 << 1)
+#define VCO_IN_CAP_CON_HIGH	(0x2 << 1)
+#define REF_BIAS_CUR_SEL	BIT(0)
+
+#define CP_CURRENT_3MA		BIT(3)
+#define CP_PROGRAM_EN		BIT(7)
+#define LPF_PROGRAM_EN		BIT(6)
+#define LPF_RESISTORS_20_KOHM	0
+
+#define HSFREQRANGE_SEL(val)	(((val) & 0x3f) << 1)
+
+#define INPUT_DIVIDER(val)	((val - 1) & 0x7f)
+#define LOW_PROGRAM_EN		0
+#define HIGH_PROGRAM_EN		BIT(7)
+#define LOOP_DIV_LOW_SEL(val)	((val - 1) & 0x1f)
+#define LOOP_DIV_HIGH_SEL(val)	(((val - 1) >> 5) & 0x1f)
+#define PLL_LOOP_DIV_EN		BIT(5)
+#define PLL_INPUT_DIV_EN	BIT(4)
+
+#define POWER_CONTROL		BIT(6)
+#define INTERNAL_REG_CURRENT	BIT(3)
+#define BIAS_BLOCK_ON		BIT(2)
+#define BANDGAP_ON		BIT(0)
+
+#define TER_RESISTOR_HIGH	BIT(7)
+#define	TER_RESISTOR_LOW	0
+#define LEVEL_SHIFTERS_ON	BIT(6)
+#define TER_CAL_DONE		BIT(5)
+#define SETRD_MAX		(0x7 << 2)
+#define POWER_MANAGE		BIT(1)
+#define TER_RESISTORS_ON	BIT(0)
+
+#define BIASEXTR_SEL(val)	((val) & 0x7)
+#define BANDGAP_SEL(val)	((val) & 0x7)
+#define TLP_PROGRAM_EN		BIT(7)
+#define THS_PRE_PROGRAM_EN	BIT(7)
+#define THS_ZERO_PROGRAM_EN	BIT(6)
+
+enum {
+	BANDGAP_97_07,
+	BANDGAP_98_05,
+	BANDGAP_99_02,
+	BANDGAP_100_00,
+	BANDGAP_93_17,
+	BANDGAP_94_15,
+	BANDGAP_95_12,
+	BANDGAP_96_10,
+};
+
+enum {
+	BIASEXTR_87_1,
+	BIASEXTR_91_5,
+	BIASEXTR_95_9,
+	BIASEXTR_100,
+	BIASEXTR_105_94,
+	BIASEXTR_111_88,
+	BIASEXTR_118_8,
+	BIASEXTR_127_7,
+};
+
+struct dw_mipi_dsi_plat_data {
+	u32 dsi0_en_bit;
+	u32 dsi1_en_bit;
+	u32 grf_switch_reg;
+	u32 grf_dsi0_mode;
+	u32 grf_dsi0_mode_reg;
+	unsigned int max_data_lanes;
+	u32 max_bit_rate_per_lane;
+	bool has_vop_sel;
+};
+
+struct dw_mipi_dsi {
+	void *base;
+	void *grf;
+
+	unsigned int lane_mbps; /* per lane */
+	u32 channel;
+	u32 lanes;
+	u32 format;
+	u32 mode_flags;
+	u16 input_div;
+	u16 feedback_div;
+	struct drm_display_mode *mode;
+
+	const struct dw_mipi_dsi_plat_data *pdata;
+};
+
+enum dw_mipi_dsi_mode {
+	DW_MIPI_DSI_CMD_MODE,
+	DW_MIPI_DSI_VID_MODE,
+};
+
+struct dphy_pll_testdin_map {
+	unsigned int max_mbps;
+	u8 testdin;
+};
+
+/* The table is based on 27MHz DPHY pll reference clock. */
+static const struct dphy_pll_testdin_map dptdin_map[] = {
+	{  90, 0x00}, { 100, 0x10}, { 110, 0x20}, { 130, 0x01},
+	{ 140, 0x11}, { 150, 0x21}, { 170, 0x02}, { 180, 0x12},
+	{ 200, 0x22}, { 220, 0x03}, { 240, 0x13}, { 250, 0x23},
+	{ 270, 0x04}, { 300, 0x14}, { 330, 0x05}, { 360, 0x15},
+	{ 400, 0x25}, { 450, 0x06}, { 500, 0x16}, { 550, 0x07},
+	{ 600, 0x17}, { 650, 0x08}, { 700, 0x18}, { 750, 0x09},
+	{ 800, 0x19}, { 850, 0x29}, { 900, 0x39}, { 950, 0x0a},
+	{1000, 0x1a}, {1050, 0x2a}, {1100, 0x3a}, {1150, 0x0b},
+	{1200, 0x1b}, {1250, 0x2b}, {1300, 0x3b}, {1350, 0x0c},
+	{1400, 0x1c}, {1450, 0x2c}, {1500, 0x3c}
+};
+
+static int max_mbps_to_testdin(unsigned int max_mbps)
+{
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(dptdin_map); i++)
+		if (dptdin_map[i].max_mbps > max_mbps)
+			return dptdin_map[i].testdin;
+
+	return -EINVAL;
+}
+
+/*
+ * The controller should generate 2 frames before
+ * preparing the peripheral.
+ */
+static void dw_mipi_dsi_wait_for_two_frames(struct dw_mipi_dsi *dsi)
+{
+	int refresh, two_frames;
+
+	refresh = drm_mode_vrefresh(dsi->mode);
+	two_frames = DIV_ROUND_UP(MSEC_PER_SEC, refresh) * 2;
+	mdelay(two_frames);
+}
+
+static inline void dsi_write(struct dw_mipi_dsi *dsi, u32 reg, u32 val)
+{
+	writel(val, dsi->base + reg);
+}
+
+static inline u32 dsi_read(struct dw_mipi_dsi *dsi, u32 reg)
+{
+	return readl(dsi->base + reg);
+}
+
+static void dw_mipi_dsi_phy_write(struct dw_mipi_dsi *dsi, u8 test_code,
+				 u8 test_data)
+{
+	/*
+	 * With the falling edge on TESTCLK, the TESTDIN[7:0] signal content
+	 * is latched internally as the current test code. Test data is
+	 * programmed internally by rising edge on TESTCLK.
+	 */
+	dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_TESTCLK | PHY_UNTESTCLR);
+
+	dsi_write(dsi, DSI_PHY_TST_CTRL1, PHY_TESTEN | PHY_TESTDOUT(0) |
+					  PHY_TESTDIN(test_code));
+
+	dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_UNTESTCLK | PHY_UNTESTCLR);
+
+	dsi_write(dsi, DSI_PHY_TST_CTRL1, PHY_UNTESTEN | PHY_TESTDOUT(0) |
+					  PHY_TESTDIN(test_data));
+
+	dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_TESTCLK | PHY_UNTESTCLR);
+}
+
+static int dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi)
+{
+	int ret, testdin, vco, val;
+
+	vco = (dsi->lane_mbps < 200) ? 0 : (dsi->lane_mbps + 100) / 200;
+
+	testdin = max_mbps_to_testdin(dsi->lane_mbps);
+	if (testdin < 0) {
+		printf("failed to get testdin for %dmbps lane clock\n",
+		       dsi->lane_mbps);
+		return testdin;
+	}
+
+	dsi_write(dsi, DSI_PWR_UP, POWERUP);
+
+	dw_mipi_dsi_phy_write(dsi, 0x10, BYPASS_VCO_RANGE |
+					 VCO_RANGE_CON_SEL(vco) |
+					 VCO_IN_CAP_CON_LOW |
+					 REF_BIAS_CUR_SEL);
+
+	dw_mipi_dsi_phy_write(dsi, 0x11, CP_CURRENT_3MA);
+	dw_mipi_dsi_phy_write(dsi, 0x12, CP_PROGRAM_EN | LPF_PROGRAM_EN |
+					 LPF_RESISTORS_20_KOHM);
+
+	dw_mipi_dsi_phy_write(dsi, 0x44, HSFREQRANGE_SEL(testdin));
+
+	dw_mipi_dsi_phy_write(dsi, 0x19, PLL_LOOP_DIV_EN | PLL_INPUT_DIV_EN);
+	dw_mipi_dsi_phy_write(dsi, 0x17, INPUT_DIVIDER(dsi->input_div));
+	dw_mipi_dsi_phy_write(dsi, 0x18, LOOP_DIV_LOW_SEL(dsi->feedback_div) |
+					 LOW_PROGRAM_EN);
+	dw_mipi_dsi_phy_write(dsi, 0x18, LOOP_DIV_HIGH_SEL(dsi->feedback_div) |
+					 HIGH_PROGRAM_EN);
+
+	dw_mipi_dsi_phy_write(dsi, 0x20, POWER_CONTROL | INTERNAL_REG_CURRENT |
+					 BIAS_BLOCK_ON | BANDGAP_ON);
+
+	dw_mipi_dsi_phy_write(dsi, 0x21, TER_RESISTOR_LOW | TER_CAL_DONE |
+					 SETRD_MAX | TER_RESISTORS_ON);
+	dw_mipi_dsi_phy_write(dsi, 0x21, TER_RESISTOR_HIGH | LEVEL_SHIFTERS_ON |
+					 SETRD_MAX | POWER_MANAGE |
+					 TER_RESISTORS_ON);
+
+	dw_mipi_dsi_phy_write(dsi, 0x22, LOW_PROGRAM_EN |
+					 BIASEXTR_SEL(BIASEXTR_127_7));
+	dw_mipi_dsi_phy_write(dsi, 0x22, HIGH_PROGRAM_EN |
+					 BANDGAP_SEL(BANDGAP_96_10));
+
+	dw_mipi_dsi_phy_write(dsi, 0x70, TLP_PROGRAM_EN | 0xf);
+	dw_mipi_dsi_phy_write(dsi, 0x71, THS_PRE_PROGRAM_EN | 0x55);
+	dw_mipi_dsi_phy_write(dsi, 0x72, THS_ZERO_PROGRAM_EN | 0xa);
+
+	dsi_write(dsi, DSI_PHY_RSTZ, PHY_ENFORCEPLL | PHY_ENABLECLK |
+				     PHY_UNRSTZ | PHY_UNSHUTDOWNZ);
+
+	ret = readx_poll_timeout(readl, dsi->base + DSI_PHY_STATUS,
+				 val, val & LOCK, 1000, PHY_STATUS_TIMEOUT_US);
+	if (ret < 0) {
+		printf("failed to wait for phy lock state\n");
+		return ret;
+	}
+
+	ret = readx_poll_timeout(readl, dsi->base + DSI_PHY_STATUS,
+				 val, val & STOP_STATE_CLK_LANE, 1000,
+				 PHY_STATUS_TIMEOUT_US);
+	if (ret < 0)
+		printf("failed to wait for phy clk lane stop state\n");
+
+	return ret;
+}
+
+static unsigned long dw_mipi_dsi_set_pll(struct dw_mipi_dsi *dsi,
+					 unsigned long rate)
+{
+	unsigned int i, pre;
+	unsigned long pllref, tmp;
+	unsigned int m = 1, n = 1;
+
+	pllref = 24000000;
+	tmp = pllref;
+
+	for (i = 1; i < 6; i++) {
+		pre = pllref / i;
+		if ((tmp > (rate % pre)) && (rate / pre < 512)) {
+			tmp = rate % pre;
+			n = i;
+			m = rate / pre;
+		}
+		if (tmp == 0)
+			break;
+	}
+
+	dsi->input_div = n;
+	dsi->feedback_div = m;
+
+	return pllref * m / n;
+}
+
+static unsigned long dw_mipi_dsi_calc_link_bandwidth(struct dw_mipi_dsi *dsi)
+{
+	unsigned long mpclk, tmp;
+	unsigned int target_mbps = 1000, max_mbps;
+	int bpp;
+
+	max_mbps = dsi->pdata->max_bit_rate_per_lane / USEC_PER_SEC;
+
+	bpp = mipi_dsi_pixel_format_to_bpp(dsi->format);
+	if (bpp < 0) {
+		printf("failed to get bpp for pixel format %d\n", dsi->format);
+		return bpp;
+	}
+
+	mpclk = DIV_ROUND_UP(dsi->mode->clock, MSEC_PER_SEC);
+	if (mpclk) {
+		/* take 1 / 0.9, since mbps must big than bandwidth of RGB */
+		tmp = mpclk * (bpp / dsi->lanes) * 10 / 9;
+		if (tmp < max_mbps)
+			target_mbps = tmp;
+		else
+			printf("DPHY clock frequency is out of range\n");
+	}
+
+	return target_mbps * USEC_PER_SEC;
+}
+
+static int dw_mipi_dsi_gen_pkt_hdr_write(struct dw_mipi_dsi *dsi, u32 val)
+{
+	int ret;
+	int sts = 0;
+
+	ret = readx_poll_timeout(readl, dsi->base + DSI_CMD_PKT_STATUS,
+				 sts, !(sts & GEN_CMD_FULL), 1000,
+				 CMD_PKT_STATUS_TIMEOUT_US);
+	if (ret < 0) {
+		printf("failed to get available command FIFO\n");
+		return ret;
+	}
+
+	dsi_write(dsi, DSI_GEN_HDR, val);
+
+	ret = readx_poll_timeout(readl, dsi->base + DSI_CMD_PKT_STATUS,
+				 sts, sts & (GEN_CMD_EMPTY | GEN_PLD_W_EMPTY),
+				 1000, CMD_PKT_STATUS_TIMEOUT_US);
+	if (ret < 0) {
+		printf("failed to write command FIFO\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+static int dw_mipi_dsi_short_write(struct dw_mipi_dsi *dsi,
+				   const struct mipi_dsi_msg *msg)
+{
+	const u16 *tx_buf = msg->tx_buf;
+	u32 val = GEN_HDATA(*tx_buf) | GEN_HTYPE(msg->type);
+
+	if (msg->tx_len > 2) {
+		printf("too long tx buf length %zu for short write\n",
+		       msg->tx_len);
+		return -EINVAL;
+	}
+
+	return dw_mipi_dsi_gen_pkt_hdr_write(dsi, val);
+}
+
+static int dw_mipi_dsi_long_write(struct dw_mipi_dsi *dsi,
+				  const struct mipi_dsi_msg *msg)
+{
+	const u32 *tx_buf = msg->tx_buf;
+	int len = msg->tx_len, pld_data_bytes = sizeof(*tx_buf), ret;
+	u32 val = GEN_HDATA(msg->tx_len) | GEN_HTYPE(msg->type);
+	u32 remainder = 0;
+	u32 sts = 0;
+
+	if (msg->tx_len < 3) {
+		printf("wrong tx buf length %zu for long write\n",
+		       msg->tx_len);
+		return -EINVAL;
+	}
+
+	while (DIV_ROUND_UP(len, pld_data_bytes)) {
+		if (len < pld_data_bytes) {
+			memcpy(&remainder, tx_buf, len);
+			dsi_write(dsi, DSI_GEN_PLD_DATA, remainder);
+			len = 0;
+		} else {
+			dsi_write(dsi, DSI_GEN_PLD_DATA, *tx_buf);
+			tx_buf++;
+			len -= pld_data_bytes;
+		}
+
+		ret = readx_poll_timeout(readl, dsi->base + DSI_CMD_PKT_STATUS,
+					 sts, !(sts & GEN_PLD_W_FULL), 1000,
+					 CMD_PKT_STATUS_TIMEOUT_US);
+		if (ret < 0) {
+			printf("failed to get available write payload FIFO\n");
+			return ret;
+		}
+	}
+
+	return dw_mipi_dsi_gen_pkt_hdr_write(dsi, val);
+}
+
+static ssize_t rockchip_dw_mipi_dsi_transfer(struct display_state *state,
+					     const struct mipi_dsi_msg *msg)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct dw_mipi_dsi *dsi = conn_state->private;
+	int ret;
+
+	switch (msg->type) {
+	case MIPI_DSI_DCS_SHORT_WRITE:
+	case MIPI_DSI_DCS_SHORT_WRITE_PARAM:
+	case MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM:
+	case MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM:
+	case MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM:
+	case MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE:
+		ret = dw_mipi_dsi_short_write(dsi, msg);
+		break;
+	case MIPI_DSI_DCS_LONG_WRITE:
+	case MIPI_DSI_GENERIC_LONG_WRITE:
+		ret = dw_mipi_dsi_long_write(dsi, msg);
+		break;
+	default:
+		printf("unsupport packet data type: %d\n", msg->type);
+		ret = -EINVAL;
+		break;
+	}
+
+	return ret;
+}
+
+static void dw_mipi_dsi_video_mode_config(struct dw_mipi_dsi *dsi)
+{
+	u32 val;
+
+	val = VID_MODE_TYPE_BURST_SYNC_PULSES | ENABLE_LOW_POWER;
+
+	dsi_write(dsi, DSI_VID_MODE_CFG, val);
+}
+
+static void dw_mipi_dsi_set_mode(struct dw_mipi_dsi *dsi,
+				 enum dw_mipi_dsi_mode mode)
+{
+	if (mode == DW_MIPI_DSI_CMD_MODE) {
+		dsi_write(dsi, DSI_PWR_UP, RESET);
+		dsi_write(dsi, DSI_MODE_CFG, ENABLE_CMD_MODE);
+		dsi_write(dsi, DSI_PWR_UP, POWERUP);
+	} else {
+		dsi_write(dsi, DSI_PWR_UP, RESET);
+		dsi_write(dsi, DSI_MODE_CFG, ENABLE_VIDEO_MODE);
+		dw_mipi_dsi_video_mode_config(dsi);
+		dsi_write(dsi, DSI_PWR_UP, POWERUP);
+	}
+}
+
+static void dw_mipi_dsi_disable(struct dw_mipi_dsi *dsi)
+{
+	dsi_write(dsi, DSI_PWR_UP, RESET);
+	dsi_write(dsi, DSI_PHY_RSTZ, PHY_RSTZ);
+}
+
+static void dw_mipi_dsi_init(struct dw_mipi_dsi *dsi)
+{
+	dsi_write(dsi, DSI_PWR_UP, RESET);
+	dsi_write(dsi, DSI_PHY_RSTZ, PHY_DISFORCEPLL | PHY_DISABLECLK
+		  | PHY_RSTZ | PHY_SHUTDOWNZ);
+	dsi_write(dsi, DSI_CLKMGR_CFG, TO_CLK_DIVIDSION(10) |
+		  TX_ESC_CLK_DIVIDSION(7));
+	dsi_write(dsi, DSI_LPCLK_CTRL, PHY_TXREQUESTCLKHS);
+}
+
+static void dw_mipi_dsi_dpi_config(struct dw_mipi_dsi *dsi,
+				   struct drm_display_mode *mode)
+{
+	u32 val = 0, color = 0;
+
+	switch (dsi->format) {
+	case MIPI_DSI_FMT_RGB888:
+		color = DPI_COLOR_CODING_24BIT;
+		break;
+	case MIPI_DSI_FMT_RGB666:
+		color = DPI_COLOR_CODING_18BIT_2 | EN18_LOOSELY;
+		break;
+	case MIPI_DSI_FMT_RGB666_PACKED:
+		color = DPI_COLOR_CODING_18BIT_1;
+		break;
+	case MIPI_DSI_FMT_RGB565:
+		color = DPI_COLOR_CODING_16BIT_1;
+		break;
+	}
+
+	if (!(mode->flags & DRM_MODE_FLAG_PVSYNC))
+		val |= VSYNC_ACTIVE_LOW;
+	if (!(mode->flags & DRM_MODE_FLAG_PHSYNC))
+		val |= HSYNC_ACTIVE_LOW;
+
+	dsi_write(dsi, DSI_DPI_VCID, DPI_VID(dsi->channel));
+	dsi_write(dsi, DSI_DPI_COLOR_CODING, color);
+	dsi_write(dsi, DSI_DPI_CFG_POL, val);
+	dsi_write(dsi, DSI_DPI_LP_CMD_TIM, OUTVACT_LPCMD_TIME(4)
+		  | INVACT_LPCMD_TIME(4));
+}
+
+static void dw_mipi_dsi_packet_handler_config(struct dw_mipi_dsi *dsi)
+{
+	dsi_write(dsi, DSI_PCKHDL_CFG, EN_CRC_RX | EN_ECC_RX | EN_BTA);
+}
+
+static void dw_mipi_dsi_video_packet_config(struct dw_mipi_dsi *dsi,
+					    struct drm_display_mode *mode)
+{
+	dsi_write(dsi, DSI_VID_PKT_SIZE, VID_PKT_SIZE(mode->hdisplay));
+}
+
+static void dw_mipi_dsi_command_mode_config(struct dw_mipi_dsi *dsi)
+{
+	dsi_write(dsi, DSI_TO_CNT_CFG, HSTX_TO_CNT(1000) | LPRX_TO_CNT(1000));
+	dsi_write(dsi, DSI_BTA_TO_CNT, 0xd00);
+	dsi_write(dsi, DSI_CMD_MODE_CFG, CMD_MODE_ALL_LP);
+	dsi_write(dsi, DSI_MODE_CFG, ENABLE_CMD_MODE);
+}
+
+/* Get lane byte clock cycles. */
+static u32 dw_mipi_dsi_get_hcomponent_lbcc(struct dw_mipi_dsi *dsi,
+					   u32 hcomponent)
+{
+	u32 frac, lbcc;
+
+	lbcc = hcomponent * dsi->lane_mbps * MSEC_PER_SEC / 8;
+
+	frac = lbcc % dsi->mode->clock;
+	lbcc = lbcc / dsi->mode->clock;
+	if (frac)
+		lbcc++;
+
+	return lbcc;
+}
+
+static void dw_mipi_dsi_line_timer_config(struct dw_mipi_dsi *dsi)
+{
+	u32 htotal, hsa, hbp, lbcc;
+	struct drm_display_mode *mode = dsi->mode;
+
+	htotal = mode->htotal;
+	hsa = mode->hsync_end - mode->hsync_start;
+	hbp = mode->htotal - mode->hsync_end;
+
+	lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, htotal);
+	dsi_write(dsi, DSI_VID_HLINE_TIME, lbcc);
+
+	lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, hsa);
+	dsi_write(dsi, DSI_VID_HSA_TIME, lbcc);
+
+	lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, hbp);
+	dsi_write(dsi, DSI_VID_HBP_TIME, lbcc);
+}
+
+static void dw_mipi_dsi_vertical_timing_config(struct dw_mipi_dsi *dsi)
+{
+	u32 vactive, vsa, vfp, vbp;
+	struct drm_display_mode *mode = dsi->mode;
+
+	vactive = mode->vdisplay;
+	vsa = mode->vsync_end - mode->vsync_start;
+	vfp = mode->vsync_start - mode->vdisplay;
+	vbp = mode->vtotal - mode->vsync_end;
+
+	dsi_write(dsi, DSI_VID_VACTIVE_LINES, vactive);
+	dsi_write(dsi, DSI_VID_VSA_LINES, vsa);
+	dsi_write(dsi, DSI_VID_VFP_LINES, vfp);
+	dsi_write(dsi, DSI_VID_VBP_LINES, vbp);
+}
+
+static void dw_mipi_dsi_dphy_timing_config(struct dw_mipi_dsi *dsi)
+{
+	dsi_write(dsi, DSI_PHY_TMR_CFG, PHY_HS2LP_TIME(0x14)
+		  | PHY_LP2HS_TIME(0x10) | MAX_RD_TIME(10000));
+
+	dsi_write(dsi, DSI_PHY_TMR_LPCLK_CFG, PHY_CLKHS2LP_TIME(0x40)
+		  | PHY_CLKLP2HS_TIME(0x40));
+}
+
+static void dw_mipi_dsi_dphy_interface_config(struct dw_mipi_dsi *dsi)
+{
+	dsi_write(dsi, DSI_PHY_IF_CFG, PHY_STOP_WAIT_TIME(0x20) |
+		  N_LANES(dsi->lanes));
+}
+
+static void dw_mipi_dsi_clear_err(struct dw_mipi_dsi *dsi)
+{
+	dsi_read(dsi, DSI_INT_ST0);
+	dsi_read(dsi, DSI_INT_ST1);
+	dsi_write(dsi, DSI_INT_MSK0, 0);
+	dsi_write(dsi, DSI_INT_MSK1, 0);
+}
+
+const struct dw_mipi_dsi_plat_data rk3288_mipi_dsi_drv_data = {
+	.dsi0_en_bit = RK3288_DSI0_SEL_VOP_LIT,
+	.dsi1_en_bit = RK3288_DSI1_SEL_VOP_LIT,
+	.grf_switch_reg = RK3288_GRF_SOC_CON6,
+	.max_data_lanes = 4,
+	.max_bit_rate_per_lane = 1500000000,
+	.has_vop_sel = true,
+};
+
+const struct dw_mipi_dsi_plat_data rk3366_mipi_dsi_drv_data = {
+	.dsi0_en_bit = BIT(2),
+	.grf_switch_reg = 0x0400,
+	.max_data_lanes = 4,
+	.max_bit_rate_per_lane = 1000000000,
+	.has_vop_sel = true,
+};
+
+const struct dw_mipi_dsi_plat_data rk3368_mipi_dsi_drv_data = {
+	.max_bit_rate_per_lane = 1000000000,
+	.max_data_lanes = 4,
+};
+
+const struct dw_mipi_dsi_plat_data rk3399_mipi_dsi_drv_data = {
+	.dsi0_en_bit = RK3399_DSI0_SEL_VOP_LIT,
+	.dsi1_en_bit = RK3399_DSI1_SEL_VOP_LIT,
+	.grf_switch_reg = RK3399_GRF_SOC_CON19,
+	.grf_dsi0_mode = RK3399_GRF_DSI_MODE,
+	.grf_dsi0_mode_reg = RK3399_GRF_SOC_CON22,
+	.max_data_lanes = 4,
+	.max_bit_rate_per_lane = 1500000000,
+	.has_vop_sel = true,
+};
+
+static int dw_mipi_dsi_clk_enable(struct dw_mipi_dsi *dsi)
+{
+	return 0;
+}
+
+static int rockchip_dw_mipi_dsi_init(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	const struct rockchip_connector *connector = conn_state->connector;
+	const struct dw_mipi_dsi_plat_data *pdata = connector->data;
+	int mipi_node = conn_state->node;
+	struct dw_mipi_dsi *dsi;
+	int panel;
+
+	dsi = malloc(sizeof(*dsi));
+	if (!dsi)
+		return -ENOMEM;
+
+	dsi->base = (void *)fdtdec_get_addr_size_auto_noparent(state->blob,
+						mipi_node, "reg", 0, NULL, false);
+	dsi->pdata = pdata;
+	conn_state->private = dsi;
+	conn_state->type = DRM_MODE_CONNECTOR_DSI;
+	conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
+
+	panel = fdt_subnode_offset(state->blob, mipi_node, "panel");
+	if (panel < 0) {
+		printf("failed to find panel node\n");
+		return -1;
+	}
+
+#define FDT_GET_INT(val, name) \
+	val = fdtdec_get_int(state->blob, panel, name, -1); \
+	if (val < 0) { \
+		printf("Can't get %s\n", name); \
+		return -1; \
+	}
+
+	FDT_GET_INT(dsi->lanes, "dsi,lanes");
+	FDT_GET_INT(dsi->format, "dsi,format");
+	FDT_GET_INT(dsi->mode_flags, "dsi,mode_flags");
+	FDT_GET_INT(dsi->channel, "reg");
+
+	dsi->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	if (dsi->grf <= 0) {
+		printf("%s: Get syscon grf failed (ret=%p)\n",
+		      __func__, dsi->grf);
+		return  -ENXIO;
+	}
+
+	return 0;
+}
+
+static void rockchip_dw_mipi_dsi_deinit(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct dw_mipi_dsi *dsi = conn_state->private;
+
+	free(dsi);
+}
+
+static int rockchip_dw_mipi_dsi_prepare(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct dw_mipi_dsi *dsi = conn_state->private;
+	unsigned long bw, rate;
+
+	dsi->mode = &conn_state->mode;
+
+	dw_mipi_dsi_clk_enable(dsi);
+
+	rockchip_phy_power_on(state);
+
+	bw = dw_mipi_dsi_calc_link_bandwidth(dsi);
+
+	if (conn_state->phy)
+		rate = rockchip_phy_set_pll(state, bw);
+	else
+		rate = dw_mipi_dsi_set_pll(dsi, bw);
+
+	dsi->lane_mbps = rate / USEC_PER_SEC;
+
+	printf("final DSI-Link bandwidth: %u Mbps x %d\n",
+	       dsi->lane_mbps, dsi->lanes);
+
+	dw_mipi_dsi_init(dsi);
+	dw_mipi_dsi_dpi_config(dsi, dsi->mode);
+	dw_mipi_dsi_packet_handler_config(dsi);
+	dw_mipi_dsi_video_mode_config(dsi);
+	dw_mipi_dsi_video_packet_config(dsi, dsi->mode);
+	dw_mipi_dsi_command_mode_config(dsi);
+	dw_mipi_dsi_line_timer_config(dsi);
+	dw_mipi_dsi_vertical_timing_config(dsi);
+	dw_mipi_dsi_dphy_timing_config(dsi);
+	dw_mipi_dsi_dphy_interface_config(dsi);
+	dw_mipi_dsi_clear_err(dsi);
+
+	return 0;
+}
+
+static int rockchip_dw_mipi_dsi_enable(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct crtc_state *crtc_state = &state->crtc_state;
+	const struct rockchip_connector *connector = conn_state->connector;
+	const struct dw_mipi_dsi_plat_data *pdata = connector->data;
+	struct dw_mipi_dsi *dsi = conn_state->private;
+	u32 val;
+
+	if (pdata->grf_dsi0_mode_reg)
+		writel(pdata->grf_dsi0_mode,
+		       dsi->grf + pdata->grf_dsi0_mode_reg);
+
+	if (!conn_state->phy)
+		dw_mipi_dsi_phy_init(dsi);
+	dw_mipi_dsi_wait_for_two_frames(dsi);
+
+	dw_mipi_dsi_set_mode(dsi, DW_MIPI_DSI_VID_MODE);
+
+	if (!pdata->has_vop_sel)
+		return 0;
+
+	if (pdata->grf_switch_reg) {
+		if (crtc_state->crtc_id)
+			val = pdata->dsi0_en_bit | (pdata->dsi0_en_bit << 16);
+		else
+			val = pdata->dsi0_en_bit << 16;
+
+		writel(val, dsi->grf + pdata->grf_switch_reg);
+	}
+	debug("vop %s output to dsi0\n", (crtc_state->crtc_id) ? "LIT" : "BIG");
+
+	return 0;
+}
+
+static int rockchip_dw_mipi_dsi_disable(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct dw_mipi_dsi *dsi = conn_state->private;
+
+	dw_mipi_dsi_set_mode(dsi, DW_MIPI_DSI_CMD_MODE);
+	dw_mipi_dsi_set_mode(dsi, DW_MIPI_DSI_VID_MODE);
+
+	/*
+	 * This is necessary to make sure the peripheral will be driven
+	 * normally when the display is enabled again later.
+	 */
+	mdelay(120);
+
+	dw_mipi_dsi_set_mode(dsi, DW_MIPI_DSI_CMD_MODE);
+	dw_mipi_dsi_disable(dsi);
+	return 0;
+}
+
+const struct rockchip_connector_funcs rockchip_dw_mipi_dsi_funcs = {
+	.init = rockchip_dw_mipi_dsi_init,
+	.deinit = rockchip_dw_mipi_dsi_deinit,
+	.prepare = rockchip_dw_mipi_dsi_prepare,
+	.enable = rockchip_dw_mipi_dsi_enable,
+	.disable = rockchip_dw_mipi_dsi_disable,
+	.transfer = rockchip_dw_mipi_dsi_transfer,
+};
+
+static const struct rockchip_connector rk3288_mipi_dsi_data = {
+	 .funcs = &rockchip_dw_mipi_dsi_funcs,
+	 .data = &rk3288_mipi_dsi_drv_data,
+};
+
+static const struct rockchip_connector rk3366_mipi_dsi_data = {
+	 .funcs = &rockchip_dw_mipi_dsi_funcs,
+	 .data = &rk3366_mipi_dsi_drv_data,
+};
+
+static const struct rockchip_connector rk3368_mipi_dsi_data = {
+	 .funcs = &rockchip_dw_mipi_dsi_funcs,
+	 .data = &rk3368_mipi_dsi_drv_data,
+};
+
+const struct rockchip_connector rk3399_mipi_dsi_data = {
+	 .funcs = &rockchip_dw_mipi_dsi_funcs,
+	 .data = &rk3399_mipi_dsi_drv_data,
+};
+
+static const struct udevice_id rockchip_mipi_dsi_ids[] = {
+	{
+	 .compatible = "rockchip,rk3288-mipi-dsi",
+	 .data = (ulong)&rk3288_mipi_dsi_data,
+	},{
+	 .compatible = "rockchip,rk3366-mipi-dsi",
+	 .data = (ulong)&rk3366_mipi_dsi_data,
+	},{
+	 .compatible = "rockchip,rk3368-mipi-dsi",
+	 .data = (ulong)&rk3368_mipi_dsi_data,
+	},{
+	 .compatible = "rockchip,rk3399-mipi-dsi",
+	 .data = (ulong)&rk3399_mipi_dsi_data,
+	}, {}
+};
+
+U_BOOT_DRIVER(rockchip_mipi_dsi) = {
+	.name = "rockchip_mipi_dsi",
+	.id = UCLASS_DISPLAY,
+	.of_match = rockchip_mipi_dsi_ids,
+};
diff --git a/drivers/video/drm/rockchip-inno-mipi-dphy.c b/drivers/video/drm/rockchip-inno-mipi-dphy.c
new file mode 100644
index 0000000000..9b0c073e61
--- /dev/null
+++ b/drivers/video/drm/rockchip-inno-mipi-dphy.c
@@ -0,0 +1,583 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <config.h>
+#include <common.h>
+#include <errno.h>
+#include <malloc.h>
+#include <fdtdec.h>
+#include <fdt_support.h>
+#include <asm/unaligned.h>
+#include <asm/io.h>
+#include <linux/list.h>
+#include <div64.h>
+
+#include "rockchip_display.h"
+#include "rockchip_crtc.h"
+#include "rockchip_connector.h"
+#include "rockchip_phy.h"
+#include "rockchip_mipi_dsi.h"
+
+/* Innosilicon MIPI D-PHY registers */
+#define INNO_PHY_LANE_CTRL	0x00000
+#define CLK_LANE_EN_MASK	BIT(6)
+#define DATA_LANE_3_EN_MASK	BIT(5)
+#define DATA_LANE_2_EN_MASK	BIT(4)
+#define DATA_LANE_1_EN_MASK	BIT(3)
+#define DATA_LANE_0_EN_MASK	BIT(2)
+#define CLK_LANE_EN		BIT(6)
+#define DATA_LANE_3_EN		BIT(5)
+#define DATA_LANE_2_EN		BIT(4)
+#define DATA_LANE_1_EN		BIT(3)
+#define DATA_LANE_0_EN		BIT(2)
+#define INNO_PHY_POWER_CTRL	0x00004
+#define ANALOG_RESET_MASK	BIT(2)
+#define ANALOG_RESET		BIT(2)
+#define ANALOG_NORMAL		0
+#define LDO_POWER_MASK		BIT(1)
+#define LDO_POWER_DOWN		BIT(1)
+#define LDO_POWER_ON		0
+#define PLL_POWER_MASK		BIT(0)
+#define PLL_POWER_DOWN		BIT(0)
+#define PLL_POWER_ON		0
+#define INNO_PHY_PLL_CTRL_0	0x0000c
+#define FBDIV_HI_MASK		BIT(5)
+#define FBDIV_HI(x)		UPDATE(x, 5, 5)
+#define PREDIV_MASK		GENMASK(4, 0)
+#define PREDIV(x)		UPDATE(x, 4, 0)
+#define INNO_PHY_PLL_CTRL_1	0x00010
+#define FBDIV_LO_MASK		GENMASK(7, 0)
+#define FBDIV_LO(x)		UPDATE(x, 7, 0)
+#define INNO_PHY_DIG_CTRL	0x00080
+#define DIGITAL_RESET_MASK	BIT(0)
+#define DIGITAL_NORMAL		BIT(0)
+#define DIGITAL_RESET		0
+
+#define INNO_CLOCK_LANE_REG_BASE	0x00100
+#define INNO_DATA_LANE_0_REG_BASE	0x00180
+#define INNO_DATA_LANE_1_REG_BASE	0x00200
+#define INNO_DATA_LANE_2_REG_BASE	0x00280
+#define INNO_DATA_LANE_3_REG_BASE	0x00300
+
+#define T_LPX_OFFSET		0x00014
+#define T_HS_PREPARE_OFFSET	0x00018
+#define T_HS_ZERO_OFFSET	0x0001c
+#define T_HS_TRAIL_OFFSET	0x00020
+#define T_HS_EXIT_OFFSET	0x00024
+#define T_CLK_POST_OFFSET	0x00028
+#define T_WAKUP_H_OFFSET	0x00030
+#define T_WAKUP_L_OFFSET	0x00034
+#define T_CLK_PRE_OFFSET	0x00038
+#define T_TA_GO_OFFSET		0x00040
+#define T_TA_SURE_OFFSET	0x00044
+#define T_TA_WAIT_OFFSET	0x00048
+
+#define T_LPX_MASK		GENMASK(5, 0)
+#define T_LPX(x)		UPDATE(x, 5, 0)
+#define T_HS_PREPARE_MASK	GENMASK(6, 0)
+#define T_HS_PREPARE(x)		UPDATE(x, 6, 0)
+#define T_HS_ZERO_MASK		GENMASK(5, 0)
+#define T_HS_ZERO(x)		UPDATE(x, 5, 0)
+#define T_HS_TRAIL_MASK		GENMASK(6, 0)
+#define T_HS_TRAIL(x)		UPDATE(x, 6, 0)
+#define T_HS_EXIT_MASK		GENMASK(4, 0)
+#define T_HS_EXIT(x)		UPDATE(x, 4, 0)
+#define T_CLK_POST_MASK		GENMASK(3, 0)
+#define T_CLK_POST(x)		UPDATE(x, 3, 0)
+#define T_WAKUP_H_MASK		GENMASK(1, 0)
+#define T_WAKUP_H(x)		UPDATE(x, 1, 0)
+#define T_WAKUP_L_MASK		GENMASK(7, 0)
+#define T_WAKUP_L(x)		UPDATE(x, 7, 0)
+#define T_CLK_PRE_MASK		GENMASK(3, 0)
+#define T_CLK_PRE(x)		UPDATE(x, 3, 0)
+#define T_TA_GO_MASK		GENMASK(5, 0)
+#define T_TA_GO(x)		UPDATE(x, 5, 0)
+#define T_TA_SURE_MASK		GENMASK(5, 0)
+#define T_TA_SURE(x)		UPDATE(x, 5, 0)
+#define T_TA_WAIT_MASK		GENMASK(5, 0)
+#define T_TA_WAIT(x)		UPDATE(x, 5, 0)
+
+enum lane_type {
+	CLOCK_LANE,
+	DATA_LANE_0,
+	DATA_LANE_1,
+	DATA_LANE_2,
+	DATA_LANE_3,
+};
+
+struct inno_mipi_dphy_timing {
+	u8 lpx;
+	u8 hs_prepare;
+	u8 hs_zero;
+	u8 hs_trail;
+	u8 hs_exit;
+	u8 clk_post;
+	u8 wakup_h;
+	u8 wakup_l;
+	u8 clk_pre;
+	u8 ta_go;
+	u8 ta_sure;
+	u8 ta_wait;
+};
+
+struct inno_mipi_dphy {
+	const void *blob;
+	int node;
+	u32 regs;
+
+	unsigned int lane_mbps;
+	int lanes;
+	int bpp;
+};
+
+static const u32 lane_reg_offset[] = {
+	[CLOCK_LANE] = INNO_CLOCK_LANE_REG_BASE,
+	[DATA_LANE_0] = INNO_DATA_LANE_0_REG_BASE,
+	[DATA_LANE_1] = INNO_DATA_LANE_1_REG_BASE,
+	[DATA_LANE_2] = INNO_DATA_LANE_2_REG_BASE,
+	[DATA_LANE_3] = INNO_DATA_LANE_3_REG_BASE,
+};
+
+#define FIXED_PARAM(_freq, _prepare, _clk_zero, _data_zero, _trail)	\
+{	\
+	.max_freq = _freq,	\
+	.hs_prepare = _prepare,	\
+	.clk_lane = {	\
+		.hs_zero = _clk_zero,	\
+	},	\
+	.data_lane = {	\
+		.hs_zero = _data_zero,	\
+	},	\
+	.hs_trail = _trail,	\
+}
+
+struct fixed_param {
+	unsigned int max_freq;
+	u8 hs_prepare;
+	struct {
+		u8 hs_zero;
+	} clk_lane;
+	struct {
+		u8 hs_zero;
+	} data_lane;
+	u8 hs_trail;
+};
+
+static const struct fixed_param fixed_param_table[] = {
+	FIXED_PARAM( 110, 0x20, 0x16, 0x02, 0x22),
+	FIXED_PARAM( 150, 0x06, 0x16, 0x03, 0x45),
+	FIXED_PARAM( 200, 0x18, 0x17, 0x04, 0x0b),
+	FIXED_PARAM( 250, 0x05, 0x17, 0x05, 0x16),
+	FIXED_PARAM( 300, 0x51, 0x18, 0x06, 0x2c),
+	FIXED_PARAM( 400, 0x64, 0x19, 0x07, 0x33),
+	FIXED_PARAM( 500, 0x20, 0x1b, 0x07, 0x4e),
+	FIXED_PARAM( 600, 0x6a, 0x1d, 0x08, 0x3a),
+	FIXED_PARAM( 700, 0x3e, 0x1e, 0x08, 0x6a),
+	FIXED_PARAM( 800, 0x21, 0x1f, 0x09, 0x29),
+	FIXED_PARAM(1000, 0x09, 0x20, 0x09, 0x27)
+};
+
+static inline void inno_write(struct inno_mipi_dphy *inno, u32 reg, u32 val)
+{
+	writel(val, inno->regs + reg);
+}
+
+static inline u32 inno_read(struct inno_mipi_dphy *inno, u32 reg)
+{
+	return readl(inno->regs + reg);
+}
+
+static inline void inno_update_bits(struct inno_mipi_dphy *inno, u32 reg,
+				    u32 mask, u32 val)
+{
+	u32 tmp, orig;
+
+	orig = inno_read(inno, reg);
+	tmp = orig & ~mask;
+	tmp |= val & mask;
+	inno_write(inno, reg, tmp);
+}
+
+static void inno_mipi_dphy_timing_update(struct inno_mipi_dphy *inno,
+					 enum lane_type lane_type,
+					 struct inno_mipi_dphy_timing *t)
+{
+	u32 base = lane_reg_offset[lane_type];
+	u32 m, v;
+
+	m = T_HS_PREPARE_MASK;
+	v = T_HS_PREPARE(t->hs_prepare);
+	inno_update_bits(inno, base + T_HS_PREPARE_OFFSET, m, v);
+
+	m = T_HS_ZERO_MASK;
+	v = T_HS_ZERO(t->hs_zero);
+	inno_update_bits(inno, base + T_HS_ZERO_OFFSET, m, v);
+
+	m = T_HS_TRAIL_MASK;
+	v = T_HS_TRAIL(t->hs_trail);
+	inno_update_bits(inno, base + T_HS_TRAIL_OFFSET, m, v);
+
+	m = T_HS_EXIT_MASK;
+	v = T_HS_EXIT(t->hs_exit);
+	inno_update_bits(inno, base + T_HS_EXIT_OFFSET, m, v);
+
+	if (lane_type == CLOCK_LANE) {
+		m = T_CLK_POST_MASK;
+		v = T_CLK_POST(t->clk_post);
+		inno_update_bits(inno, base + T_CLK_POST_OFFSET, m, v);
+
+		m = T_CLK_PRE_MASK;
+		v = T_CLK_PRE(t->clk_pre);
+		inno_update_bits(inno, base + T_CLK_PRE_OFFSET, m, v);
+	}
+
+	m = T_WAKUP_H_MASK;
+	v = T_WAKUP_H(t->wakup_h);
+	inno_update_bits(inno, base + T_WAKUP_H_OFFSET, m, v);
+
+	m = T_WAKUP_L_MASK;
+	v = T_WAKUP_L(t->wakup_l);
+	inno_update_bits(inno, base + T_WAKUP_L_OFFSET, m, v);
+
+	m = T_LPX_MASK;
+	v = T_LPX(t->lpx);
+	inno_update_bits(inno, base + T_LPX_OFFSET, m, v);
+
+	m = T_TA_GO_MASK;
+	v = T_TA_GO(t->ta_go);
+	inno_update_bits(inno, base + T_TA_GO_OFFSET, m, v);
+
+	m = T_TA_SURE_MASK;
+	v = T_TA_SURE(t->ta_sure);
+	inno_update_bits(inno, base + T_TA_SURE_OFFSET, m, v);
+
+	m = T_TA_WAIT_MASK;
+	v = T_TA_WAIT(t->ta_wait);
+	inno_update_bits(inno, base + T_TA_WAIT_OFFSET, m, v);
+}
+
+static void inno_mipi_dphy_get_fixed_param(struct inno_mipi_dphy_timing *t,
+					   unsigned int freq,
+					   enum lane_type lane_type)
+{
+	const struct fixed_param *param;
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(fixed_param_table); i++)
+		if (freq <= fixed_param_table[i].max_freq)
+			break;
+
+	if (i == ARRAY_SIZE(fixed_param_table))
+		--i;
+
+	param = &fixed_param_table[i];
+
+	if (lane_type == CLOCK_LANE)
+		t->hs_zero = param->clk_lane.hs_zero;
+	else
+		t->hs_zero = param->data_lane.hs_zero;
+
+	t->hs_prepare = param->hs_prepare;
+	t->hs_trail = param->hs_trail;
+}
+
+static void inno_mipi_dphy_lane_timing_init(struct inno_mipi_dphy *inno,
+					    enum lane_type lane_type)
+{
+	struct mipi_dphy_timing timing;
+	struct inno_mipi_dphy_timing data;
+	unsigned long txbyteclk, txclkesc, UI;
+	unsigned int esc_clk_div;
+
+	memset(&timing, 0, sizeof(timing));
+	memset(&data, 0, sizeof(data));
+
+	txbyteclk = inno->lane_mbps * USEC_PER_SEC / 8;
+	esc_clk_div = DIV_ROUND_UP(txbyteclk, 20000000);
+	txclkesc = txbyteclk / esc_clk_div;
+	UI = DIV_ROUND_CLOSEST(NSEC_PER_USEC, inno->lane_mbps);
+
+	debug("txbyteclk=%lu, txclkesc=%lu, esc_clk_div=%u, UI=%lu\n",
+	      txbyteclk, txclkesc, esc_clk_div, UI);
+
+	mipi_dphy_timing_get_default(&timing, UI);
+	inno_mipi_dphy_get_fixed_param(&data, inno->lane_mbps, lane_type);
+
+	/*
+	 * Ttxbyteclk * val >= Ths-exit
+	 * Ttxbyteclk * val >= Tclk-post
+	 * Ttxbyteclk * val >= Tclk-pre
+	 * Ttxbyteclk * (2 + val) >= Tlpx
+	 */
+	data.hs_exit = DIV_ROUND_UP(timing.hsexit * txbyteclk, NSEC_PER_SEC);
+	data.clk_post = DIV_ROUND_UP(timing.clkpost * txbyteclk, NSEC_PER_SEC);
+	data.clk_pre = DIV_ROUND_UP(timing.clkpre * txbyteclk, NSEC_PER_SEC);
+	data.wakup_h = 0x3;
+	data.wakup_l = 0xff;
+	data.lpx = DIV_ROUND_UP(txbyteclk * timing.lpx, NSEC_PER_SEC);
+	if (data.lpx > 2)
+		data.lpx -= 2;
+
+	/*
+	 * Ttxclkesc * val >= Tta-go
+	 * Ttxclkesc * val >= Tta-sure
+	 * Ttxclkesc * val >= Tta-wait
+	 */
+	data.ta_go = DIV_ROUND_UP(timing.tago * txclkesc, NSEC_PER_SEC);
+	data.ta_sure = DIV_ROUND_UP(timing.tasure * txclkesc, NSEC_PER_SEC);
+	data.ta_wait = DIV_ROUND_UP(timing.taget * txclkesc, NSEC_PER_SEC);
+
+	inno_mipi_dphy_timing_update(inno, lane_type, &data);
+
+#define TIMING_NS(x, freq) (((x) * (DIV_ROUND_CLOSEST(NSEC_PER_SEC, freq))))
+	debug("hs-exit=%lu, clk-post=%lu, clk-pre=%lu, lpx=%lu\n",
+	      TIMING_NS(data.hs_exit, txbyteclk),
+	      TIMING_NS(data.clk_post, txbyteclk),
+	      TIMING_NS(data.clk_pre, txbyteclk),
+	      TIMING_NS(data.lpx + 2, txbyteclk));
+	debug("ta-go=%lu, ta-sure=%lu, ta-wait=%lu\n",
+	      TIMING_NS(data.ta_go, txclkesc),
+	      TIMING_NS(data.ta_sure, txclkesc),
+	      TIMING_NS(data.ta_wait, txclkesc));
+}
+
+static unsigned long inno_mipi_dphy_pll_round_rate(unsigned long fin,
+						   unsigned long fout,
+						   u8 *prediv, u16 *fbdiv)
+{
+	unsigned long best_freq = 0;
+	u8 min_prediv, max_prediv;
+	u8 _prediv, best_prediv = 0;
+	u16 _fbdiv, best_fbdiv = 0;
+	u32 min_delta = 0xffffffff;
+
+	fout *= 2;
+
+	min_prediv = DIV_ROUND_UP(fin, 40000000);
+	max_prediv = fin / 5000000;
+
+	for (_prediv = min_prediv; _prediv <= max_prediv; _prediv++) {
+		u64 tmp;
+		u32 delta;
+		tmp = (u64)fout * _prediv;
+		do_div(tmp, fin);
+		_fbdiv = tmp;
+		if ((_fbdiv == 15) || (_fbdiv < 12) || (_fbdiv > 511))
+			continue;
+		tmp = (u64)_fbdiv * fin;
+		do_div(tmp, _prediv);
+
+		delta = abs(fout - tmp);
+		if (delta < min_delta) {
+			best_prediv = _prediv;
+			best_fbdiv = _fbdiv;
+			min_delta = delta;
+			best_freq = tmp;
+		}
+	}
+
+	if (best_freq) {
+		*prediv = best_prediv;
+		*fbdiv = best_fbdiv;
+	}
+
+	return best_freq / 2;
+}
+
+static inline void inno_mipi_dphy_reset(struct inno_mipi_dphy *inno)
+{
+	/* Reset analog */
+	inno_update_bits(inno, INNO_PHY_POWER_CTRL,
+			 ANALOG_RESET_MASK, ANALOG_RESET);
+	udelay(1);
+	inno_update_bits(inno, INNO_PHY_POWER_CTRL,
+			 ANALOG_RESET_MASK, ANALOG_NORMAL);
+	/* Reset digital */
+	inno_update_bits(inno, INNO_PHY_DIG_CTRL,
+			 DIGITAL_RESET_MASK, DIGITAL_RESET);
+	udelay(1);
+	inno_update_bits(inno, INNO_PHY_DIG_CTRL,
+			 DIGITAL_RESET_MASK, DIGITAL_NORMAL);
+}
+
+static void inno_mipi_dphy_timing_init(struct inno_mipi_dphy *inno)
+{
+	switch (inno->lanes) {
+	case 4:
+		inno_mipi_dphy_lane_timing_init(inno, DATA_LANE_3);
+		/* Fall through */
+	case 3:
+		inno_mipi_dphy_lane_timing_init(inno, DATA_LANE_2);
+		/* Fall through */
+	case 2:
+		inno_mipi_dphy_lane_timing_init(inno, DATA_LANE_1);
+		/* Fall through */
+	case 1:
+	default:
+		inno_mipi_dphy_lane_timing_init(inno, DATA_LANE_0);
+		inno_mipi_dphy_lane_timing_init(inno, CLOCK_LANE);
+		break;
+	}
+}
+
+static inline void inno_mipi_dphy_lane_enable(struct inno_mipi_dphy *inno)
+{
+	u32 m = 0, v = 0;
+
+	switch (inno->lanes) {
+	case 4:
+		m |= DATA_LANE_3_EN_MASK;
+		v |= DATA_LANE_3_EN;
+		/* Fall through */
+	case 3:
+		m |= DATA_LANE_2_EN_MASK;
+		v |= DATA_LANE_2_EN;
+		/* Fall through */
+	case 2:
+		m |= DATA_LANE_1_EN_MASK;
+		v |= DATA_LANE_1_EN;
+		/* Fall through */
+	default:
+	case 1:
+		m |= DATA_LANE_0_EN_MASK | CLK_LANE_EN_MASK;
+		v |= DATA_LANE_0_EN | CLK_LANE_EN;
+		break;
+	}
+
+	inno_update_bits(inno, INNO_PHY_LANE_CTRL, m, v);
+}
+
+static inline void inno_mipi_dphy_pll_ldo_disable(struct inno_mipi_dphy *inno)
+{
+	inno_update_bits(inno, INNO_PHY_POWER_CTRL,
+			 PLL_POWER_MASK | LDO_POWER_MASK,
+			 PLL_POWER_DOWN | LDO_POWER_DOWN);
+}
+
+static inline void inno_mipi_dphy_pll_ldo_enable(struct inno_mipi_dphy *inno)
+{
+	inno_update_bits(inno, INNO_PHY_POWER_CTRL,
+			 PLL_POWER_MASK | LDO_POWER_MASK,
+			 PLL_POWER_ON | LDO_POWER_ON);
+}
+
+static int inno_mipi_dphy_power_on(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct inno_mipi_dphy *inno = conn_state->phy_private;
+
+	inno_mipi_dphy_pll_ldo_enable(inno);
+	inno_mipi_dphy_lane_enable(inno);
+	inno_mipi_dphy_reset(inno);
+	inno_mipi_dphy_timing_init(inno);
+	udelay(1);
+
+	return 0;
+}
+
+static inline void inno_mipi_dphy_lane_disable(struct inno_mipi_dphy *inno)
+{
+	inno_update_bits(inno, INNO_PHY_LANE_CTRL, 0x7c, 0x00);
+}
+
+static int inno_mipi_dphy_power_off(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct inno_mipi_dphy *inno = conn_state->phy_private;
+
+	inno_mipi_dphy_lane_disable(inno);
+	inno_mipi_dphy_pll_ldo_disable(inno);
+
+	return 0;
+}
+
+static unsigned long inno_mipi_dphy_set_pll(struct display_state *state,
+					    unsigned long rate)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct inno_mipi_dphy *inno = conn_state->phy_private;
+	unsigned long fin, fout;
+	u16 fbdiv = 0;
+	u8 prediv = 0;
+	u32 m, v;
+
+	fin = 24000000;
+	fout = inno_mipi_dphy_pll_round_rate(fin, rate, &prediv, &fbdiv);
+
+	printf("%s: fin=%lu, fout=%lu, prediv=%u, fbdiv=%u\n",
+	       __func__, fin, fout, prediv, fbdiv);
+
+	m = FBDIV_HI_MASK | PREDIV_MASK;
+	v = FBDIV_HI(fbdiv >> 8) | PREDIV(prediv);
+	inno_update_bits(inno, INNO_PHY_PLL_CTRL_0, m, v);
+
+	m = FBDIV_LO_MASK;
+	v = FBDIV_LO(fbdiv);
+	inno_update_bits(inno, INNO_PHY_PLL_CTRL_1, m, v);
+
+	inno->lane_mbps = fout / USEC_PER_SEC;
+
+	return fout;
+}
+
+static int inno_mipi_dphy_parse_dt(int panel_node, struct inno_mipi_dphy *inno)
+{
+	const void *blob = inno->blob;
+	int format;
+
+	inno->lanes = fdtdec_get_int(blob, panel_node, "dsi,lanes", -1);
+	if (inno->lanes < 0)
+		inno->lanes = 4;
+
+	format = fdtdec_get_int(blob, panel_node, "dsi,format", -1);
+	inno->bpp = mipi_dsi_pixel_format_to_bpp(format);
+	if (inno->bpp < 0)
+		inno->bpp = 24;
+
+	return 0;
+}
+
+static int inno_mipi_dphy_init(struct display_state *state)
+{
+	const void *blob = state->blob;
+	struct connector_state *conn_state = &state->conn_state;
+	struct panel_state *panel_state = &state->panel_state;
+	int node = conn_state->phy_node;
+	int panel_node = panel_state->node;
+	struct inno_mipi_dphy *inno;
+	int ret;
+
+	inno = malloc(sizeof(*inno));
+	if (!inno)
+		return -ENOMEM;
+
+	inno->blob = blob;
+	inno->node = node;
+
+	ret = inno_mipi_dphy_parse_dt(panel_node, inno);
+	if (ret) {
+		printf("%s: failed to parse DT\n", __func__);
+		return ret;
+	}
+
+	inno->regs = fdtdec_get_addr_size_auto_noparent(blob, node, "reg",
+							0, NULL, false);
+	if (inno->regs == FDT_ADDR_T_NONE) {
+		printf("%s: failed to get mipi phy address\n", __func__);
+		return -ENOMEM;
+	}
+
+	conn_state->phy_private = inno;
+
+	return 0;
+}
+
+const struct rockchip_phy_funcs inno_mipi_dphy_funcs = {
+	.init = inno_mipi_dphy_init,
+	.power_on = inno_mipi_dphy_power_on,
+	.power_off = inno_mipi_dphy_power_off,
+	.set_pll = inno_mipi_dphy_set_pll,
+};
diff --git a/drivers/video/drm/rockchip_analogix_dp.c b/drivers/video/drm/rockchip_analogix_dp.c
new file mode 100644
index 0000000000..2ba56fce84
--- /dev/null
+++ b/drivers/video/drm/rockchip_analogix_dp.c
@@ -0,0 +1,1045 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <config.h>
+#include <common.h>
+#include <errno.h>
+#include <malloc.h>
+#include <fdtdec.h>
+#include <fdt_support.h>
+#include <asm/unaligned.h>
+#include <asm/io.h>
+#include <dm/device.h>
+#include <linux/list.h>
+#include <syscon.h>
+#include <asm/arch-rockchip/clock.h>
+#include <asm/gpio.h>
+
+#include "rockchip_display.h"
+#include "rockchip_crtc.h"
+#include "rockchip_connector.h"
+#include "rockchip_analogix_dp.h"
+
+/**
+ * struct rockchip_dp_chip_data - splite the grf setting of kind of chips
+ * @lcdsel_grf_reg: grf register offset of lcdc select
+ * @lcdsel_big: reg value of selecting vop big for eDP
+ * @lcdsel_lit: reg value of selecting vop little for eDP
+ */
+struct rockchip_dp_chip_data {
+	u32	lcdsel_grf_reg;
+	u32	lcdsel_big;
+	u32	lcdsel_lit;
+	u32	chip_type;
+	bool	has_vop_sel;
+};
+
+static void
+analogix_dp_enable_rx_to_enhanced_mode(struct analogix_dp_device *dp,
+				       bool enable)
+{
+	u8 data;
+
+	analogix_dp_read_byte_from_dpcd(dp, DP_LANE_COUNT_SET, &data);
+
+	if (enable)
+		analogix_dp_write_byte_to_dpcd(dp, DP_LANE_COUNT_SET,
+					       DP_LANE_COUNT_ENHANCED_FRAME_EN |
+					       DPCD_LANE_COUNT_SET(data));
+	else
+		analogix_dp_write_byte_to_dpcd(dp, DP_LANE_COUNT_SET,
+					       DPCD_LANE_COUNT_SET(data));
+}
+
+static int analogix_dp_is_enhanced_mode_available(struct analogix_dp_device *dp)
+{
+	u8 data;
+	int retval;
+
+	analogix_dp_read_byte_from_dpcd(dp, DP_MAX_LANE_COUNT, &data);
+	retval = DPCD_ENHANCED_FRAME_CAP(data);
+
+	return retval;
+}
+
+static void analogix_dp_set_enhanced_mode(struct analogix_dp_device *dp)
+{
+	u8 data;
+
+	data = analogix_dp_is_enhanced_mode_available(dp);
+	analogix_dp_enable_rx_to_enhanced_mode(dp, data);
+	analogix_dp_enable_enhanced_mode(dp, data);
+}
+
+static void analogix_dp_training_pattern_dis(struct analogix_dp_device *dp)
+{
+	analogix_dp_set_training_pattern(dp, DP_NONE);
+
+	analogix_dp_write_byte_to_dpcd(dp, DP_TRAINING_PATTERN_SET,
+				       DP_TRAINING_PATTERN_DISABLE);
+}
+
+static void
+analogix_dp_set_lane_lane_pre_emphasis(struct analogix_dp_device *dp,
+				       int pre_emphasis, int lane)
+{
+	switch (lane) {
+	case 0:
+		analogix_dp_set_lane0_pre_emphasis(dp, pre_emphasis);
+		break;
+	case 1:
+		analogix_dp_set_lane1_pre_emphasis(dp, pre_emphasis);
+		break;
+
+	case 2:
+		analogix_dp_set_lane2_pre_emphasis(dp, pre_emphasis);
+		break;
+
+	case 3:
+		analogix_dp_set_lane3_pre_emphasis(dp, pre_emphasis);
+		break;
+	}
+}
+
+static int analogix_dp_link_start(struct analogix_dp_device *dp)
+{
+	u8 buf[4];
+	int lane, lane_count, pll_tries, retval;
+
+	lane_count = dp->link_train.lane_count;
+
+	dp->link_train.lt_state = CLOCK_RECOVERY;
+	dp->link_train.eq_loop = 0;
+
+	for (lane = 0; lane < lane_count; lane++)
+		dp->link_train.cr_loop[lane] = 0;
+
+	/* Set link rate and count as you want to establish*/
+	analogix_dp_set_link_bandwidth(dp, dp->link_train.link_rate);
+	analogix_dp_set_lane_count(dp, dp->link_train.lane_count);
+
+	/* Setup RX configuration */
+	buf[0] = dp->link_train.link_rate;
+	buf[1] = dp->link_train.lane_count;
+	retval = analogix_dp_write_bytes_to_dpcd(dp, DP_LINK_BW_SET, 2, buf);
+	if (retval)
+		return retval;
+
+	/* Set TX pre-emphasis to minimum */
+	for (lane = 0; lane < lane_count; lane++)
+		analogix_dp_set_lane_lane_pre_emphasis(dp,
+			PRE_EMPHASIS_LEVEL_0, lane);
+
+	/* Wait for PLL lock */
+	pll_tries = 0;
+	while (analogix_dp_get_pll_lock_status(dp) == PLL_UNLOCKED) {
+		if (pll_tries == DP_TIMEOUT_LOOP_COUNT) {
+			pr_err("Wait for PLL lock timed out\n");
+			return -ETIMEDOUT;
+		}
+
+		pll_tries++;
+		udelay(120);
+	}
+
+	/* Set training pattern 1 */
+	analogix_dp_set_training_pattern(dp, TRAINING_PTN1);
+
+	/* Set RX training pattern */
+	retval = analogix_dp_write_byte_to_dpcd(dp,
+			DP_TRAINING_PATTERN_SET,
+			DP_LINK_SCRAMBLING_DISABLE | DP_TRAINING_PATTERN_1);
+	if (retval)
+		return retval;
+
+	for (lane = 0; lane < lane_count; lane++)
+		buf[lane] = DP_TRAIN_PRE_EMPH_LEVEL_0 |
+			    DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
+
+	retval = analogix_dp_write_bytes_to_dpcd(dp, DP_TRAINING_LANE0_SET,
+						 lane_count, buf);
+
+	return retval;
+}
+
+static unsigned char analogix_dp_get_lane_status(u8 link_status[2], int lane)
+{
+	int shift = (lane & 1) * 4;
+	u8 link_value = link_status[lane >> 1];
+
+	return (link_value >> shift) & 0xf;
+}
+
+static int analogix_dp_clock_recovery_ok(u8 link_status[2], int lane_count)
+{
+	int lane;
+	u8 lane_status;
+
+	for (lane = 0; lane < lane_count; lane++) {
+		lane_status = analogix_dp_get_lane_status(link_status, lane);
+		if ((lane_status & DP_LANE_CR_DONE) == 0)
+			return -EINVAL;
+	}
+	return 0;
+}
+
+static int analogix_dp_channel_eq_ok(u8 link_status[2], u8 link_align,
+				     int lane_count)
+{
+	int lane;
+	u8 lane_status;
+
+	if ((link_align & DP_INTERLANE_ALIGN_DONE) == 0)
+		return -EINVAL;
+
+	for (lane = 0; lane < lane_count; lane++) {
+		lane_status = analogix_dp_get_lane_status(link_status, lane);
+		lane_status &= DP_CHANNEL_EQ_BITS;
+		if (lane_status != DP_CHANNEL_EQ_BITS)
+			return -EINVAL;
+	}
+
+	return 0;
+}
+
+static unsigned char
+analogix_dp_get_adjust_request_voltage(u8 adjust_request[2], int lane)
+{
+	int shift = (lane & 1) * 4;
+	u8 link_value = adjust_request[lane >> 1];
+
+	return (link_value >> shift) & 0x3;
+}
+
+static unsigned char analogix_dp_get_adjust_request_pre_emphasis(
+					u8 adjust_request[2],
+					int lane)
+{
+	int shift = (lane & 1) * 4;
+	u8 link_value = adjust_request[lane >> 1];
+
+	return ((link_value >> shift) & 0xc) >> 2;
+}
+
+static void analogix_dp_set_lane_link_training(struct analogix_dp_device *dp,
+					       u8 training_lane_set, int lane)
+{
+	switch (lane) {
+	case 0:
+		analogix_dp_set_lane0_link_training(dp, training_lane_set);
+		break;
+	case 1:
+		analogix_dp_set_lane1_link_training(dp, training_lane_set);
+		break;
+
+	case 2:
+		analogix_dp_set_lane2_link_training(dp, training_lane_set);
+		break;
+
+	case 3:
+		analogix_dp_set_lane3_link_training(dp, training_lane_set);
+		break;
+	}
+}
+
+static unsigned int
+analogix_dp_get_lane_link_training(struct analogix_dp_device *dp,
+				   int lane)
+{
+	u32 reg;
+
+	switch (lane) {
+	case 0:
+		reg = analogix_dp_get_lane0_link_training(dp);
+		break;
+	case 1:
+		reg = analogix_dp_get_lane1_link_training(dp);
+		break;
+	case 2:
+		reg = analogix_dp_get_lane2_link_training(dp);
+		break;
+	case 3:
+		reg = analogix_dp_get_lane3_link_training(dp);
+		break;
+	default:
+		WARN_ON(1);
+		return 0;
+	}
+
+	return reg;
+}
+
+static void analogix_dp_reduce_link_rate(struct analogix_dp_device *dp)
+{
+	analogix_dp_training_pattern_dis(dp);
+	analogix_dp_set_enhanced_mode(dp);
+
+	dp->link_train.lt_state = FAILED;
+}
+
+static void analogix_dp_get_adjust_training_lane(struct analogix_dp_device *dp,
+						 u8 adjust_request[2])
+{
+	int lane, lane_count;
+	u8 voltage_swing, pre_emphasis, training_lane;
+
+	lane_count = dp->link_train.lane_count;
+	for (lane = 0; lane < lane_count; lane++) {
+		voltage_swing = analogix_dp_get_adjust_request_voltage(
+						adjust_request, lane);
+		pre_emphasis = analogix_dp_get_adjust_request_pre_emphasis(
+						adjust_request, lane);
+		training_lane = DPCD_VOLTAGE_SWING_SET(voltage_swing) |
+				DPCD_PRE_EMPHASIS_SET(pre_emphasis);
+
+		if (voltage_swing == VOLTAGE_LEVEL_3)
+			training_lane |= DP_TRAIN_MAX_SWING_REACHED;
+		if (pre_emphasis == PRE_EMPHASIS_LEVEL_3)
+			training_lane |= DP_TRAIN_MAX_PRE_EMPHASIS_REACHED;
+
+		dp->link_train.training_lane[lane] = training_lane;
+	}
+}
+
+static int analogix_dp_process_clock_recovery(struct analogix_dp_device *dp)
+{
+	int lane, lane_count, retval;
+	u8 voltage_swing, pre_emphasis, training_lane;
+	u8 link_status[2], adjust_request[2];
+
+	udelay(101);
+
+	lane_count = dp->link_train.lane_count;
+
+	retval =  analogix_dp_read_bytes_from_dpcd(dp,
+			DP_LANE0_1_STATUS, 2, link_status);
+	if (retval)
+		return retval;
+
+	retval =  analogix_dp_read_bytes_from_dpcd(dp,
+			DP_ADJUST_REQUEST_LANE0_1, 2, adjust_request);
+	if (retval)
+		return retval;
+
+	if (analogix_dp_clock_recovery_ok(link_status, lane_count) == 0) {
+		/* set training pattern 2 for EQ */
+		analogix_dp_set_training_pattern(dp, TRAINING_PTN2);
+
+		retval = analogix_dp_write_byte_to_dpcd(dp,
+				DP_TRAINING_PATTERN_SET,
+				DP_LINK_SCRAMBLING_DISABLE |
+				DP_TRAINING_PATTERN_2);
+		if (retval)
+			return retval;
+
+		pr_info("Link Training Clock Recovery success\n");
+		dp->link_train.lt_state = EQUALIZER_TRAINING;
+	} else {
+		for (lane = 0; lane < lane_count; lane++) {
+			training_lane = analogix_dp_get_lane_link_training(
+							dp, lane);
+			voltage_swing = analogix_dp_get_adjust_request_voltage(
+							adjust_request, lane);
+			pre_emphasis = analogix_dp_get_adjust_request_pre_emphasis(
+							adjust_request, lane);
+
+			if (DPCD_VOLTAGE_SWING_GET(training_lane) ==
+					voltage_swing &&
+			    DPCD_PRE_EMPHASIS_GET(training_lane) ==
+					pre_emphasis)
+				dp->link_train.cr_loop[lane]++;
+
+			if (dp->link_train.cr_loop[lane] == MAX_CR_LOOP ||
+			    voltage_swing == VOLTAGE_LEVEL_3 ||
+			    pre_emphasis == PRE_EMPHASIS_LEVEL_3) {
+				pr_err("CR Max reached (%d,%d,%d)\n",
+					dp->link_train.cr_loop[lane],
+					voltage_swing, pre_emphasis);
+				analogix_dp_reduce_link_rate(dp);
+				return -EIO;
+			}
+		}
+	}
+
+	analogix_dp_get_adjust_training_lane(dp, adjust_request);
+
+	for (lane = 0; lane < lane_count; lane++)
+		analogix_dp_set_lane_link_training(dp,
+			dp->link_train.training_lane[lane], lane);
+
+	retval = analogix_dp_write_bytes_to_dpcd(dp,
+			DP_TRAINING_LANE0_SET, lane_count,
+			dp->link_train.training_lane);
+	if (retval)
+		return retval;
+
+	return retval;
+}
+
+static int analogix_dp_process_equalizer_training(struct analogix_dp_device *dp)
+{
+	int lane, lane_count, retval;
+	u32 reg;
+	u8 link_align, link_status[2], adjust_request[2];
+
+	udelay(401);
+
+	lane_count = dp->link_train.lane_count;
+
+	retval = analogix_dp_read_bytes_from_dpcd(dp,
+			DP_LANE0_1_STATUS, 2, link_status);
+	if (retval)
+		return retval;
+
+	if (analogix_dp_clock_recovery_ok(link_status, lane_count)) {
+		analogix_dp_reduce_link_rate(dp);
+		return -EIO;
+	}
+
+	retval = analogix_dp_read_bytes_from_dpcd(dp,
+			DP_ADJUST_REQUEST_LANE0_1, 2, adjust_request);
+	if (retval)
+		return retval;
+
+	retval = analogix_dp_read_byte_from_dpcd(dp,
+			DP_LANE_ALIGN_STATUS_UPDATED, &link_align);
+	if (retval)
+		return retval;
+
+	analogix_dp_get_adjust_training_lane(dp, adjust_request);
+
+	if (!analogix_dp_channel_eq_ok(link_status, link_align, lane_count)) {
+		/* traing pattern Set to Normal */
+		analogix_dp_training_pattern_dis(dp);
+
+		pr_info("Link Training success!\n");
+
+		analogix_dp_get_link_bandwidth(dp, &reg);
+		dp->link_train.link_rate = reg;
+		pr_debug("final bandwidth = %.2x\n",
+			dp->link_train.link_rate);
+
+		analogix_dp_get_lane_count(dp, &reg);
+		dp->link_train.lane_count = reg;
+		pr_debug("final lane count = %.2x\n",
+			dp->link_train.lane_count);
+
+		/* set enhanced mode if available */
+		analogix_dp_set_enhanced_mode(dp);
+		dp->link_train.lt_state = FINISHED;
+
+		return 0;
+	}
+
+	/* not all locked */
+	dp->link_train.eq_loop++;
+
+	if (dp->link_train.eq_loop > MAX_EQ_LOOP) {
+		pr_err("EQ Max loop\n");
+		analogix_dp_reduce_link_rate(dp);
+		return -EIO;
+	}
+
+	for (lane = 0; lane < lane_count; lane++)
+		analogix_dp_set_lane_link_training(dp,
+			dp->link_train.training_lane[lane], lane);
+
+	retval = analogix_dp_write_bytes_to_dpcd(dp, DP_TRAINING_LANE0_SET,
+			lane_count, dp->link_train.training_lane);
+
+	return retval;
+}
+
+static void analogix_dp_get_max_rx_bandwidth(struct analogix_dp_device *dp,
+					     u8 *bandwidth)
+{
+	u8 data;
+
+	/*
+	 * For DP rev.1.1, Maximum link rate of Main Link lanes
+	 * 0x06 = 1.62 Gbps, 0x0a = 2.7 Gbps
+	 * For DP rev.1.2, Maximum link rate of Main Link lanes
+	 * 0x06 = 1.62 Gbps, 0x0a = 2.7 Gbps, 0x14 = 5.4Gbps
+	 */
+	analogix_dp_read_byte_from_dpcd(dp, DP_MAX_LINK_RATE, &data);
+	*bandwidth = data;
+}
+
+static void analogix_dp_get_max_rx_lane_count(struct analogix_dp_device *dp,
+					      u8 *lane_count)
+{
+	u8 data;
+
+	/*
+	 * For DP rev.1.1, Maximum number of Main Link lanes
+	 * 0x01 = 1 lane, 0x02 = 2 lanes, 0x04 = 4 lanes
+	 */
+	analogix_dp_read_byte_from_dpcd(dp, DP_MAX_LANE_COUNT, &data);
+	*lane_count = DPCD_MAX_LANE_COUNT(data);
+}
+
+static void analogix_dp_init_training(struct analogix_dp_device *dp,
+				      enum link_lane_count_type max_lane,
+				      int max_rate)
+{
+	/*
+	 * MACRO_RST must be applied after the PLL_LOCK to avoid
+	 * the DP inter pair skew issue for at least 10 us
+	 */
+	analogix_dp_reset_macro(dp);
+
+	/* Initialize by reading RX's DPCD */
+	analogix_dp_get_max_rx_bandwidth(dp, &dp->link_train.link_rate);
+	analogix_dp_get_max_rx_lane_count(dp, &dp->link_train.lane_count);
+
+	if ((dp->link_train.link_rate != DP_LINK_BW_1_62) &&
+	    (dp->link_train.link_rate != DP_LINK_BW_2_7) &&
+	    (dp->link_train.link_rate != DP_LINK_BW_5_4)) {
+		pr_err("Rx Max Link Rate is abnormal :%x !\n",
+			dp->link_train.link_rate);
+		dp->link_train.link_rate = DP_LINK_BW_1_62;
+	}
+
+	if (dp->link_train.lane_count == 0) {
+		pr_err("Rx Max Lane count is abnormal :%x !\n",
+			dp->link_train.lane_count);
+		dp->link_train.lane_count = (u8)LANE_COUNT1;
+	}
+
+	/* Setup TX lane count & rate */
+	if (dp->link_train.lane_count > max_lane)
+		dp->link_train.lane_count = max_lane;
+	if (dp->link_train.link_rate > max_rate)
+		dp->link_train.link_rate = max_rate;
+
+	/* All DP analog module power up */
+	analogix_dp_set_analog_power_down(dp, POWER_ALL, 0);
+}
+
+static int analogix_dp_sw_link_training(struct analogix_dp_device *dp)
+{
+	int retval = 0, training_finished = 0;
+
+	dp->link_train.lt_state = START;
+
+	/* Process here */
+	while (!retval && !training_finished) {
+		switch (dp->link_train.lt_state) {
+		case START:
+			retval = analogix_dp_link_start(dp);
+			if (retval)
+				pr_err("LT link start failed!\n");
+			break;
+		case CLOCK_RECOVERY:
+			retval = analogix_dp_process_clock_recovery(dp);
+			if (retval)
+				pr_err("LT CR failed!\n");
+			break;
+		case EQUALIZER_TRAINING:
+			retval = analogix_dp_process_equalizer_training(dp);
+			if (retval)
+				pr_err("LT EQ failed!\n");
+			break;
+		case FINISHED:
+			training_finished = 1;
+			break;
+		case FAILED:
+			return -EREMOTEIO;
+		}
+	}
+	if (retval)
+		pr_err("eDP link training failed (%d)\n", retval);
+
+	return retval;
+}
+
+static int analogix_dp_set_link_train(struct analogix_dp_device *dp,
+				      u32 count, u32 bwtype)
+{
+	int i;
+	int retval;
+
+	for (i = 0; i < DP_TIMEOUT_LOOP_COUNT; i++) {
+		analogix_dp_init_training(dp, count, bwtype);
+		retval = analogix_dp_sw_link_training(dp);
+		if (retval == 0)
+			break;
+
+		udelay(110);
+	}
+
+	return retval;
+}
+
+static int analogix_dp_config_video(struct analogix_dp_device *dp)
+{
+	int retval = 0;
+	int timeout_loop = 0;
+	int done_count = 0;
+
+	analogix_dp_config_video_slave_mode(dp);
+
+	analogix_dp_set_video_color_format(dp);
+
+	if (analogix_dp_get_pll_lock_status(dp) == PLL_UNLOCKED) {
+		pr_err("PLL is not locked yet.\n");
+		return -EINVAL;
+	}
+
+	for (;;) {
+		timeout_loop++;
+		if (analogix_dp_is_slave_video_stream_clock_on(dp) == 0)
+			break;
+		if (timeout_loop > DP_TIMEOUT_LOOP_COUNT) {
+			pr_err("Timeout of video streamclk ok\n");
+			return -ETIMEDOUT;
+		}
+
+		udelay(2);
+	}
+
+	/* Set to use the register calculated M/N video */
+	analogix_dp_set_video_cr_mn(dp, CALCULATED_M, 0, 0);
+
+	/* For video bist, Video timing must be generated by register */
+	analogix_dp_set_video_timing_mode(dp, VIDEO_TIMING_FROM_CAPTURE);
+
+	/* Disable video mute */
+	analogix_dp_enable_video_mute(dp, 0);
+
+	/* Configure video slave mode */
+	analogix_dp_enable_video_master(dp, 0);
+
+	timeout_loop = 0;
+
+	for (;;) {
+		timeout_loop++;
+		if (analogix_dp_is_video_stream_on(dp) == 0) {
+			done_count++;
+			if (done_count > 10)
+				break;
+		} else if (done_count) {
+			done_count = 0;
+		}
+		if (timeout_loop > DP_TIMEOUT_LOOP_COUNT) {
+			pr_err("Timeout of video streamclk ok\n");
+			return -ETIMEDOUT;
+		}
+
+		udelay(1001);
+	}
+
+	if (retval != 0)
+		pr_err("Video stream is not detected!\n");
+
+	return retval;
+}
+
+static void analogix_dp_enable_scramble(struct analogix_dp_device *dp,
+					bool enable)
+{
+	u8 data;
+
+	if (enable) {
+		analogix_dp_enable_scrambling(dp);
+
+		analogix_dp_read_byte_from_dpcd(dp, DP_TRAINING_PATTERN_SET,
+						&data);
+		analogix_dp_write_byte_to_dpcd(dp,
+			DP_TRAINING_PATTERN_SET,
+			(u8)(data & ~DP_LINK_SCRAMBLING_DISABLE));
+	} else {
+		analogix_dp_disable_scrambling(dp);
+
+		analogix_dp_read_byte_from_dpcd(dp, DP_TRAINING_PATTERN_SET,
+						&data);
+		analogix_dp_write_byte_to_dpcd(dp,
+			DP_TRAINING_PATTERN_SET,
+			(u8)(data | DP_LINK_SCRAMBLING_DISABLE));
+	}
+}
+
+static void analogix_dp_init_dp(struct analogix_dp_device *dp)
+{
+	analogix_dp_reset(dp);
+
+	analogix_dp_swreset(dp);
+
+	analogix_dp_init_analog_param(dp);
+	analogix_dp_init_interrupt(dp);
+
+	/* SW defined function Normal operation */
+	analogix_dp_enable_sw_function(dp);
+
+	analogix_dp_config_interrupt(dp);
+	analogix_dp_init_analog_func(dp);
+
+	analogix_dp_init_hpd(dp);
+	analogix_dp_init_aux(dp);
+}
+
+static unsigned char analogix_dp_calc_edid_check_sum(unsigned char *edid_data)
+{
+	int i;
+	unsigned char sum = 0;
+
+	for (i = 0; i < EDID_BLOCK_LENGTH; i++)
+		sum = sum + edid_data[i];
+
+	return sum;
+}
+
+static int analogix_dp_read_edid(struct analogix_dp_device *dp)
+{
+	unsigned char *edid = dp->edid;
+	unsigned int extend_block = 0;
+	unsigned char sum;
+	unsigned char test_vector;
+	int retval;
+
+	/*
+	 * EDID device address is 0x50.
+	 * However, if necessary, you must have set upper address
+	 * into E-EDID in I2C device, 0x30.
+	 */
+
+	/* Read Extension Flag, Number of 128-byte EDID extension blocks */
+	retval = analogix_dp_read_byte_from_i2c(dp, I2C_EDID_DEVICE_ADDR,
+						EDID_EXTENSION_FLAG,
+						&extend_block);
+	if (retval)
+		return retval;
+
+	if (extend_block > 0) {
+		debug("EDID data includes a single extension!\n");
+
+		/* Read EDID data */
+		retval = analogix_dp_read_bytes_from_i2c(dp,
+						I2C_EDID_DEVICE_ADDR,
+						EDID_HEADER_PATTERN,
+						EDID_BLOCK_LENGTH,
+						&edid[EDID_HEADER_PATTERN]);
+		if (retval != 0) {
+			pr_err("EDID Read failed!\n");
+			return -EIO;
+		}
+		sum = analogix_dp_calc_edid_check_sum(edid);
+		if (sum != 0) {
+			pr_err("EDID bad checksum!\n");
+			return -EIO;
+		}
+
+		/* Read additional EDID data */
+		retval = analogix_dp_read_bytes_from_i2c(dp,
+				I2C_EDID_DEVICE_ADDR,
+				EDID_BLOCK_LENGTH,
+				EDID_BLOCK_LENGTH,
+				&edid[EDID_BLOCK_LENGTH]);
+		if (retval != 0) {
+			pr_err("EDID Read failed!\n");
+			return -EIO;
+		}
+		sum = analogix_dp_calc_edid_check_sum(&edid[EDID_BLOCK_LENGTH]);
+		if (sum != 0) {
+			pr_err("EDID bad checksum!\n");
+			return -EIO;
+		}
+
+		analogix_dp_read_byte_from_dpcd(dp, DP_TEST_REQUEST,
+						&test_vector);
+		if (test_vector & DP_TEST_LINK_EDID_READ) {
+			analogix_dp_write_byte_to_dpcd(dp,
+				DP_TEST_EDID_CHECKSUM,
+				edid[EDID_BLOCK_LENGTH + EDID_CHECKSUM]);
+			analogix_dp_write_byte_to_dpcd(dp,
+				DP_TEST_RESPONSE,
+				DP_TEST_EDID_CHECKSUM_WRITE);
+		}
+	} else {
+		pr_info("EDID data does not include any extensions.\n");
+
+		/* Read EDID data */
+		retval = analogix_dp_read_bytes_from_i2c(dp,
+				I2C_EDID_DEVICE_ADDR, EDID_HEADER_PATTERN,
+				EDID_BLOCK_LENGTH, &edid[EDID_HEADER_PATTERN]);
+		if (retval != 0) {
+			pr_err("EDID Read failed!\n");
+			return -EIO;
+		}
+		sum = analogix_dp_calc_edid_check_sum(edid);
+		if (sum != 0) {
+			pr_err("EDID bad checksum!\n");
+			return -EIO;
+		}
+
+		analogix_dp_read_byte_from_dpcd(dp, DP_TEST_REQUEST,
+						&test_vector);
+		if (test_vector & DP_TEST_LINK_EDID_READ) {
+			analogix_dp_write_byte_to_dpcd(dp,
+				DP_TEST_EDID_CHECKSUM, edid[EDID_CHECKSUM]);
+			analogix_dp_write_byte_to_dpcd(dp,
+				DP_TEST_RESPONSE, DP_TEST_EDID_CHECKSUM_WRITE);
+		}
+	}
+
+	debug("EDID Read success!\n");
+	return 0;
+}
+
+static int analogix_dp_handle_edid(struct analogix_dp_device *dp)
+{
+	u8 buf[12];
+	int i, try = 5;
+	int retval;
+
+retry:
+	/* Read DPCD DP_DPCD_REV~RECEIVE_PORT1_CAP_1 */
+	retval = analogix_dp_read_bytes_from_dpcd(dp, DP_DPCD_REV, 12, buf);
+
+	if (retval && try--) {
+		mdelay(10);
+		goto retry;
+	}
+
+	if (retval)
+		return retval;
+
+	/* Read EDID */
+	for (i = 0; i < 3; i++) {
+		retval = analogix_dp_read_edid(dp);
+		if (!retval)
+			break;
+	}
+
+	return retval;
+}
+
+const struct rockchip_dp_chip_data rk3399_analogix_edp_drv_data = {
+	.lcdsel_grf_reg = 0x6250,
+	.lcdsel_big = 0 | BIT(21),
+	.lcdsel_lit = BIT(5) | BIT(21),
+	.chip_type = RK3399_EDP,
+	.has_vop_sel = true,
+};
+
+const struct rockchip_dp_chip_data rk3288_analogix_dp_drv_data = {
+	.lcdsel_grf_reg = 0x025c,
+	.lcdsel_big = 0 | BIT(21),
+	.lcdsel_lit = BIT(5) | BIT(21),
+	.chip_type = RK3288_DP,
+	.has_vop_sel = true,
+};
+
+const struct rockchip_dp_chip_data rk3368_analogix_edp_drv_data = {
+	.chip_type = RK3368_EDP,
+	.has_vop_sel = false,
+};
+
+static int rockchip_analogix_dp_init(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	const struct rockchip_connector *connector = conn_state->connector;
+	const struct rockchip_dp_chip_data *pdata = connector->data;
+	int dp_node = conn_state->node;
+	struct analogix_dp_device *dp;
+	struct analogix_dp_plat_data *plat_data;
+	int ret;
+
+	dp = malloc(sizeof(*dp));
+	if (!dp)
+		return -ENOMEM;
+
+	memset(dp, 0, sizeof(*dp));
+	plat_data = malloc(sizeof(*pdata));
+	if (!plat_data)
+		return -ENOMEM;
+	dp->reg_base = (void *)fdtdec_get_addr_size_auto_noparent(state->blob,
+						dp_node, "reg", 0, NULL, false);
+	dp->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	if (dp->grf <= 0) {
+		printf("%s: Get syscon grf failed (ret=%p)\n",
+		      __func__, dp->grf);
+		return  -ENXIO;
+	}
+
+	ret = gpio_request_by_name(conn_state->dev, "hpd-gpios", 0,
+				   &dp->hpd_gpio, GPIOD_IS_IN);
+	if (ret != -ENOENT) {
+		printf("%s: Warning: cannot get hpd GPIO: ret=%d\n",
+		      __func__, ret);
+		return ret;
+	}
+
+	dp->plat_data = plat_data;
+	dp->plat_data->dev_type = ROCKCHIP_DP;
+	dp->plat_data->subdev_type = pdata->chip_type;
+	/*
+	 * Like Rockchip DisplayPort TRM indicate that "Main link
+	 * containing 4 physical lanes of 2.7/1.62 Gbps/lane".
+	 */
+	dp->video_info.max_link_rate = 0x0A;
+	dp->video_info.max_lane_count = 0x04;
+
+	conn_state->private = dp;
+	conn_state->type = DRM_MODE_CONNECTOR_eDP;
+	conn_state->output_mode = ROCKCHIP_OUT_MODE_AAAA;
+
+#if 0
+	if (pdata->chip_type == RK3399_EDP) {
+		/*
+		 * reset edp controller.
+		 */
+		writel(0x20002000, RKIO_CRU_PHYS + 0x444);
+		mdelay(10);
+		writel(0x20000000, RKIO_CRU_PHYS + 0x444);
+		mdelay(10);
+	} else if (pdata->chip_type == RK3368_EDP) {
+		/* edp ref clk sel */
+		writel(0x00010001, RKIO_GRF_PHYS + 0x410);
+		/* edp 24m clock domain software reset */
+		writel(0x80008000, RKIO_CRU_PHYS + 0x318);
+		udelay(20);
+		writel(0x80000000, RKIO_CRU_PHYS + 0x318);
+		/* edp ctrl apb bus software reset */
+		writel(0x04000400, RKIO_CRU_PHYS + 0x31c);
+		udelay(20);
+		writel(0x04000000, RKIO_CRU_PHYS + 0x31c);
+	} else if (pdata->chip_type == RK3288_DP) {
+		/* edp ref clk sel */
+		writel(0x00100010, RKIO_GRF_PHYS + 0x274);
+		/* edp 24m clock domain software reset */
+		writel(0x80008000, RKIO_CRU_PHYS + 0x1d0);
+		udelay(20);
+		writel(0x80000000, RKIO_CRU_PHYS + 0x1d0);
+		udelay(20);
+	}
+#endif
+
+	analogix_dp_init_dp(dp);
+
+	return 0;
+}
+
+static void rockchip_analogix_dp_deinit(struct display_state *state)
+{
+	/* TODO */
+}
+
+static int rockchip_analogix_dp_get_edid(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct analogix_dp_device *dp = conn_state->private;
+	int ret;
+
+	ret = analogix_dp_handle_edid(dp);
+	if (ret)
+		return ret;
+	memcpy(&conn_state->edid, &dp->edid, sizeof(dp->edid));
+
+	return 0;
+}
+
+static int rockchip_analogix_dp_prepare(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct crtc_state *crtc_state = &state->crtc_state;
+	const struct rockchip_connector *connector = conn_state->connector;
+	const struct rockchip_dp_chip_data *pdata = connector->data;
+	struct analogix_dp_device *dp = conn_state->private;
+	u32 val;
+
+	if (!pdata->has_vop_sel)
+		return 0;
+
+	if (crtc_state->crtc_id)
+		val = pdata->lcdsel_lit;
+	else
+		val = pdata->lcdsel_big;
+
+	writel(val, dp->grf + pdata->lcdsel_grf_reg);
+
+	debug("vop %s output to edp\n", (crtc_state->crtc_id) ? "LIT" : "BIG");
+
+	return 0;
+}
+
+static int rockchip_analogix_dp_enable(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct analogix_dp_device *dp = conn_state->private;
+	int ret;
+
+	ret = analogix_dp_set_link_train(dp, dp->video_info.max_lane_count,
+					 dp->video_info.max_link_rate);
+	if (ret) {
+		pr_err("unable to do link train\n");
+		return 0;
+	}
+
+	analogix_dp_enable_scramble(dp, 1);
+	analogix_dp_enable_rx_to_enhanced_mode(dp, 1);
+	analogix_dp_enable_enhanced_mode(dp, 1);
+
+	analogix_dp_init_video(dp);
+	ret = analogix_dp_config_video(dp);
+	if (ret)
+		pr_err("unable to config video\n");
+
+	/* Enable video */
+	analogix_dp_start_video(dp);
+
+	return 0;
+}
+
+static int rockchip_analogix_dp_disable(struct display_state *state)
+{
+	/* TODO */
+
+	return 0;
+}
+
+const struct rockchip_connector_funcs rockchip_analogix_dp_funcs = {
+	.init = rockchip_analogix_dp_init,
+	.deinit = rockchip_analogix_dp_deinit,
+	.get_edid = rockchip_analogix_dp_get_edid,
+	.prepare = rockchip_analogix_dp_prepare,
+	.enable = rockchip_analogix_dp_enable,
+	.disable = rockchip_analogix_dp_disable,
+};
+
+static const struct rockchip_connector rk3288_analogix_dp_data = {
+	 .funcs = &rockchip_analogix_dp_funcs,
+	 .data = &rk3288_analogix_dp_drv_data,
+};
+
+static const struct rockchip_connector rk3399_analogix_edp_data = {
+	 .funcs = &rockchip_analogix_dp_funcs,
+	 .data = &rk3399_analogix_edp_drv_data,
+};
+
+static const struct rockchip_connector rk3368_analogix_edp_data = {
+	 .funcs = &rockchip_analogix_dp_funcs,
+	 .data = &rk3368_analogix_edp_drv_data,
+};
+
+static const struct udevice_id rockchip_analogix_dp_ids[] = {
+	{
+	 .compatible = "rockchip,rk3288-dp",
+	 .data = (ulong)&rk3288_analogix_dp_data,
+	},{
+	 .compatible = "rockchip,rk3399-edp",
+	 .data = (ulong)&rk3399_analogix_edp_data,
+	},{
+	 .compatible = "rockchip,rk3368-edp",
+	 .data = (ulong)&rk3368_analogix_edp_data,
+	}, {}
+};
+
+U_BOOT_DRIVER(rockchip_analogix_dp) = {
+	.name = "rockchip_analogix_dp",
+	.id = UCLASS_DISPLAY,
+	.of_match = rockchip_analogix_dp_ids,
+};
diff --git a/drivers/video/drm/rockchip_analogix_dp.h b/drivers/video/drm/rockchip_analogix_dp.h
new file mode 100644
index 0000000000..aa3add0554
--- /dev/null
+++ b/drivers/video/drm/rockchip_analogix_dp.h
@@ -0,0 +1,1183 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __DRM_ANALOGIX_DP_H__
+#define __DRM_ANALOGIX_DP_H__
+
+#define pr_err printf
+#define pr_info printf
+#define pr_debug debug
+
+/*
+ * Unless otherwise noted, all values are from the DP 1.1a spec.  Note that
+ * DP and DPCD versions are independent.  Differences from 1.0 are not noted,
+ * 1.0 devices basically don't exist in the wild.
+ *
+ * Abbreviations, in chronological order:
+ *
+ * eDP: Embedded DisplayPort version 1
+ * DPI: DisplayPort Interoperability Guideline v1.1a
+ * 1.2: DisplayPort 1.2
+ * MST: Multistream Transport - part of DP 1.2a
+ *
+ * 1.2 formally includes both eDP and DPI definitions.
+ */
+
+#define DP_AUX_MAX_PAYLOAD_BYTES	16
+
+#define DP_AUX_I2C_WRITE		0x0
+#define DP_AUX_I2C_READ			0x1
+#define DP_AUX_I2C_WRITE_STATUS_UPDATE	0x2
+#define DP_AUX_I2C_MOT			0x4
+#define DP_AUX_NATIVE_WRITE		0x8
+#define DP_AUX_NATIVE_READ		0x9
+
+#define DP_AUX_NATIVE_REPLY_ACK		(0x0 << 0)
+#define DP_AUX_NATIVE_REPLY_NACK	(0x1 << 0)
+#define DP_AUX_NATIVE_REPLY_DEFER	(0x2 << 0)
+#define DP_AUX_NATIVE_REPLY_MASK	(0x3 << 0)
+
+#define DP_AUX_I2C_REPLY_ACK		(0x0 << 2)
+#define DP_AUX_I2C_REPLY_NACK		(0x1 << 2)
+#define DP_AUX_I2C_REPLY_DEFER		(0x2 << 2)
+#define DP_AUX_I2C_REPLY_MASK		(0x3 << 2)
+
+/* AUX CH addresses */
+/* DPCD */
+#define DP_DPCD_REV                         0x000
+
+#define DP_MAX_LINK_RATE                    0x001
+
+#define DP_MAX_LANE_COUNT                   0x002
+# define DP_MAX_LANE_COUNT_MASK		    0x1f
+# define DP_TPS3_SUPPORTED		    (1 << 6) /* 1.2 */
+# define DP_ENHANCED_FRAME_CAP		    (1 << 7)
+
+#define DP_MAX_DOWNSPREAD                   0x003
+# define DP_NO_AUX_HANDSHAKE_LINK_TRAINING  (1 << 6)
+
+#define DP_NORP                             0x004
+
+#define DP_DOWNSTREAMPORT_PRESENT           0x005
+# define DP_DWN_STRM_PORT_PRESENT           (1 << 0)
+# define DP_DWN_STRM_PORT_TYPE_MASK         0x06
+# define DP_DWN_STRM_PORT_TYPE_DP           (0 << 1)
+# define DP_DWN_STRM_PORT_TYPE_ANALOG       (1 << 1)
+# define DP_DWN_STRM_PORT_TYPE_TMDS         (2 << 1)
+# define DP_DWN_STRM_PORT_TYPE_OTHER        (3 << 1)
+# define DP_FORMAT_CONVERSION               (1 << 3)
+# define DP_DETAILED_CAP_INFO_AVAILABLE	    (1 << 4) /* DPI */
+
+#define DP_MAIN_LINK_CHANNEL_CODING         0x006
+
+#define DP_DOWN_STREAM_PORT_COUNT	    0x007
+# define DP_PORT_COUNT_MASK		    0x0f
+# define DP_MSA_TIMING_PAR_IGNORED	    (1 << 6) /* eDP */
+# define DP_OUI_SUPPORT			    (1 << 7)
+
+#define DP_RECEIVE_PORT_0_CAP_0		    0x008
+# define DP_LOCAL_EDID_PRESENT		    (1 << 1)
+# define DP_ASSOCIATED_TO_PRECEDING_PORT    (1 << 2)
+
+#define DP_RECEIVE_PORT_0_BUFFER_SIZE	    0x009
+
+#define DP_RECEIVE_PORT_1_CAP_0		    0x00a
+#define DP_RECEIVE_PORT_1_BUFFER_SIZE       0x00b
+
+#define DP_I2C_SPEED_CAP		    0x00c    /* DPI */
+# define DP_I2C_SPEED_1K		    0x01
+# define DP_I2C_SPEED_5K		    0x02
+# define DP_I2C_SPEED_10K		    0x04
+# define DP_I2C_SPEED_100K		    0x08
+# define DP_I2C_SPEED_400K		    0x10
+# define DP_I2C_SPEED_1M		    0x20
+
+#define DP_EDP_CONFIGURATION_CAP            0x00d   /* XXX 1.2? */
+# define DP_ALTERNATE_SCRAMBLER_RESET_CAP   (1 << 0)
+# define DP_FRAMING_CHANGE_CAP		    (1 << 1)
+# define DP_DPCD_DISPLAY_CONTROL_CAPABLE     (1 << 3) /* edp v1.2 or higher */
+
+#define DP_TRAINING_AUX_RD_INTERVAL         0x00e   /* XXX 1.2? */
+
+#define DP_ADAPTER_CAP			    0x00f   /* 1.2 */
+# define DP_FORCE_LOAD_SENSE_CAP	    (1 << 0)
+# define DP_ALTERNATE_I2C_PATTERN_CAP	    (1 << 1)
+
+#define DP_SUPPORTED_LINK_RATES		    0x010 /* eDP 1.4 */
+# define DP_MAX_SUPPORTED_RATES		     8	    /* 16-bit little-endian */
+
+/* Multiple stream transport */
+#define DP_FAUX_CAP			    0x020   /* 1.2 */
+# define DP_FAUX_CAP_1			    (1 << 0)
+
+#define DP_MSTM_CAP			    0x021   /* 1.2 */
+# define DP_MST_CAP			    (1 << 0)
+
+#define DP_NUMBER_OF_AUDIO_ENDPOINTS	    0x022   /* 1.2 */
+
+/* AV_SYNC_DATA_BLOCK                                  1.2 */
+#define DP_AV_GRANULARITY		    0x023
+# define DP_AG_FACTOR_MASK		    (0xf << 0)
+# define DP_AG_FACTOR_3MS		    (0 << 0)
+# define DP_AG_FACTOR_2MS		    (1 << 0)
+# define DP_AG_FACTOR_1MS		    (2 << 0)
+# define DP_AG_FACTOR_500US		    (3 << 0)
+# define DP_AG_FACTOR_200US		    (4 << 0)
+# define DP_AG_FACTOR_100US		    (5 << 0)
+# define DP_AG_FACTOR_10US		    (6 << 0)
+# define DP_AG_FACTOR_1US		    (7 << 0)
+# define DP_VG_FACTOR_MASK		    (0xf << 4)
+# define DP_VG_FACTOR_3MS		    (0 << 4)
+# define DP_VG_FACTOR_2MS		    (1 << 4)
+# define DP_VG_FACTOR_1MS		    (2 << 4)
+# define DP_VG_FACTOR_500US		    (3 << 4)
+# define DP_VG_FACTOR_200US		    (4 << 4)
+# define DP_VG_FACTOR_100US		    (5 << 4)
+
+#define DP_AUD_DEC_LAT0			    0x024
+#define DP_AUD_DEC_LAT1			    0x025
+
+#define DP_AUD_PP_LAT0			    0x026
+#define DP_AUD_PP_LAT1			    0x027
+
+#define DP_VID_INTER_LAT		    0x028
+
+#define DP_VID_PROG_LAT			    0x029
+
+#define DP_REP_LAT			    0x02a
+
+#define DP_AUD_DEL_INS0			    0x02b
+#define DP_AUD_DEL_INS1			    0x02c
+#define DP_AUD_DEL_INS2			    0x02d
+/* End of AV_SYNC_DATA_BLOCK */
+
+#define DP_RECEIVER_ALPM_CAP		    0x02e   /* eDP 1.4 */
+# define DP_ALPM_CAP			    (1 << 0)
+
+#define DP_SINK_DEVICE_AUX_FRAME_SYNC_CAP   0x02f   /* eDP 1.4 */
+# define DP_AUX_FRAME_SYNC_CAP		    (1 << 0)
+
+#define DP_GUID				    0x030   /* 1.2 */
+
+#define DP_PSR_SUPPORT                      0x070   /* XXX 1.2? */
+# define DP_PSR_IS_SUPPORTED                1
+# define DP_PSR2_IS_SUPPORTED		    2	    /* eDP 1.4 */
+
+#define DP_PSR_CAPS                         0x071   /* XXX 1.2? */
+# define DP_PSR_NO_TRAIN_ON_EXIT            1
+# define DP_PSR_SETUP_TIME_330              (0 << 1)
+# define DP_PSR_SETUP_TIME_275              (1 << 1)
+# define DP_PSR_SETUP_TIME_220              (2 << 1)
+# define DP_PSR_SETUP_TIME_165              (3 << 1)
+# define DP_PSR_SETUP_TIME_110              (4 << 1)
+# define DP_PSR_SETUP_TIME_55               (5 << 1)
+# define DP_PSR_SETUP_TIME_0                (6 << 1)
+# define DP_PSR_SETUP_TIME_MASK             (7 << 1)
+# define DP_PSR_SETUP_TIME_SHIFT            1
+
+/*
+ * 0x80-0x8f describe downstream port capabilities, but there are two layouts
+ * based on whether DP_DETAILED_CAP_INFO_AVAILABLE was set.  If it was not,
+ * each port's descriptor is one byte wide.  If it was set, each port's is
+ * four bytes wide, starting with the one byte from the base info.  As of
+ * DP interop v1.1a only VGA defines additional detail.
+ */
+
+/* offset 0 */
+#define DP_DOWNSTREAM_PORT_0		    0x80
+# define DP_DS_PORT_TYPE_MASK		    (7 << 0)
+# define DP_DS_PORT_TYPE_DP		    0
+# define DP_DS_PORT_TYPE_VGA		    1
+# define DP_DS_PORT_TYPE_DVI		    2
+# define DP_DS_PORT_TYPE_HDMI		    3
+# define DP_DS_PORT_TYPE_NON_EDID	    4
+# define DP_DS_PORT_HPD			    (1 << 3)
+/* offset 1 for VGA is maximum megapixels per second / 8 */
+/* offset 2 */
+# define DP_DS_VGA_MAX_BPC_MASK		    (3 << 0)
+# define DP_DS_VGA_8BPC			    0
+# define DP_DS_VGA_10BPC		    1
+# define DP_DS_VGA_12BPC		    2
+# define DP_DS_VGA_16BPC		    3
+
+/* link configuration */
+#define	DP_LINK_BW_SET		            0x100
+# define DP_LINK_RATE_TABLE		    0x00    /* eDP 1.4 */
+# define DP_LINK_BW_1_62		    0x06
+# define DP_LINK_BW_2_7			    0x0a
+# define DP_LINK_BW_5_4			    0x14    /* 1.2 */
+
+#define DP_LANE_COUNT_SET	            0x101
+# define DP_LANE_COUNT_MASK		    0x0f
+# define DP_LANE_COUNT_ENHANCED_FRAME_EN    (1 << 7)
+
+#define DP_TRAINING_PATTERN_SET	            0x102
+# define DP_TRAINING_PATTERN_DISABLE	    0
+# define DP_TRAINING_PATTERN_1		    1
+# define DP_TRAINING_PATTERN_2		    2
+# define DP_TRAINING_PATTERN_3		    3	    /* 1.2 */
+# define DP_TRAINING_PATTERN_MASK	    0x3
+
+/* DPCD 1.1 only. For DPCD >= 1.2 see per-lane DP_LINK_QUAL_LANEn_SET */
+# define DP_LINK_QUAL_PATTERN_11_DISABLE    (0 << 2)
+# define DP_LINK_QUAL_PATTERN_11_D10_2	    (1 << 2)
+# define DP_LINK_QUAL_PATTERN_11_ERROR_RATE (2 << 2)
+# define DP_LINK_QUAL_PATTERN_11_PRBS7	    (3 << 2)
+# define DP_LINK_QUAL_PATTERN_11_MASK	    (3 << 2)
+
+# define DP_RECOVERED_CLOCK_OUT_EN	    (1 << 4)
+# define DP_LINK_SCRAMBLING_DISABLE	    (1 << 5)
+
+# define DP_SYMBOL_ERROR_COUNT_BOTH	    (0 << 6)
+# define DP_SYMBOL_ERROR_COUNT_DISPARITY    (1 << 6)
+# define DP_SYMBOL_ERROR_COUNT_SYMBOL	    (2 << 6)
+# define DP_SYMBOL_ERROR_COUNT_MASK	    (3 << 6)
+
+#define DP_TRAINING_LANE0_SET		    0x103
+#define DP_TRAINING_LANE1_SET		    0x104
+#define DP_TRAINING_LANE2_SET		    0x105
+#define DP_TRAINING_LANE3_SET		    0x106
+
+# define DP_TRAIN_VOLTAGE_SWING_MASK	    0x3
+# define DP_TRAIN_VOLTAGE_SWING_SHIFT	    0
+# define DP_TRAIN_MAX_SWING_REACHED	    (1 << 2)
+# define DP_TRAIN_VOLTAGE_SWING_LEVEL_0 (0 << 0)
+# define DP_TRAIN_VOLTAGE_SWING_LEVEL_1 (1 << 0)
+# define DP_TRAIN_VOLTAGE_SWING_LEVEL_2 (2 << 0)
+# define DP_TRAIN_VOLTAGE_SWING_LEVEL_3 (3 << 0)
+
+# define DP_TRAIN_PRE_EMPHASIS_MASK	    (3 << 3)
+# define DP_TRAIN_PRE_EMPH_LEVEL_0		(0 << 3)
+# define DP_TRAIN_PRE_EMPH_LEVEL_1		(1 << 3)
+# define DP_TRAIN_PRE_EMPH_LEVEL_2		(2 << 3)
+# define DP_TRAIN_PRE_EMPH_LEVEL_3		(3 << 3)
+
+# define DP_TRAIN_PRE_EMPHASIS_SHIFT	    3
+# define DP_TRAIN_MAX_PRE_EMPHASIS_REACHED  (1 << 5)
+
+#define DP_DOWNSPREAD_CTRL		    0x107
+# define DP_SPREAD_AMP_0_5		    (1 << 4)
+# define DP_MSA_TIMING_PAR_IGNORE_EN	    (1 << 7) /* eDP */
+
+#define DP_MAIN_LINK_CHANNEL_CODING_SET	    0x108
+# define DP_SET_ANSI_8B10B		    (1 << 0)
+
+#define DP_I2C_SPEED_CONTROL_STATUS	    0x109   /* DPI */
+/* bitmask as for DP_I2C_SPEED_CAP */
+
+#define DP_EDP_CONFIGURATION_SET            0x10a   /* XXX 1.2? */
+# define DP_ALTERNATE_SCRAMBLER_RESET_ENABLE (1 << 0)
+# define DP_FRAMING_CHANGE_ENABLE	    (1 << 1)
+# define DP_PANEL_SELF_TEST_ENABLE	    (1 << 7)
+
+#define DP_LINK_QUAL_LANE0_SET		    0x10b   /* DPCD >= 1.2 */
+#define DP_LINK_QUAL_LANE1_SET		    0x10c
+#define DP_LINK_QUAL_LANE2_SET		    0x10d
+#define DP_LINK_QUAL_LANE3_SET		    0x10e
+# define DP_LINK_QUAL_PATTERN_DISABLE	    0
+# define DP_LINK_QUAL_PATTERN_D10_2	    1
+# define DP_LINK_QUAL_PATTERN_ERROR_RATE    2
+# define DP_LINK_QUAL_PATTERN_PRBS7	    3
+# define DP_LINK_QUAL_PATTERN_80BIT_CUSTOM  4
+# define DP_LINK_QUAL_PATTERN_HBR2_EYE      5
+# define DP_LINK_QUAL_PATTERN_MASK	    7
+
+#define DP_TRAINING_LANE0_1_SET2	    0x10f
+#define DP_TRAINING_LANE2_3_SET2	    0x110
+# define DP_LANE02_POST_CURSOR2_SET_MASK    (3 << 0)
+# define DP_LANE02_MAX_POST_CURSOR2_REACHED (1 << 2)
+# define DP_LANE13_POST_CURSOR2_SET_MASK    (3 << 4)
+# define DP_LANE13_MAX_POST_CURSOR2_REACHED (1 << 6)
+
+#define DP_MSTM_CTRL			    0x111   /* 1.2 */
+# define DP_MST_EN			    (1 << 0)
+# define DP_UP_REQ_EN			    (1 << 1)
+# define DP_UPSTREAM_IS_SRC		    (1 << 2)
+
+#define DP_AUDIO_DELAY0			    0x112   /* 1.2 */
+#define DP_AUDIO_DELAY1			    0x113
+#define DP_AUDIO_DELAY2			    0x114
+
+#define DP_LINK_RATE_SET		    0x115   /* eDP 1.4 */
+# define DP_LINK_RATE_SET_SHIFT		    0
+# define DP_LINK_RATE_SET_MASK		    (7 << 0)
+
+#define DP_RECEIVER_ALPM_CONFIG		    0x116   /* eDP 1.4 */
+# define DP_ALPM_ENABLE			    (1 << 0)
+# define DP_ALPM_LOCK_ERROR_IRQ_HPD_ENABLE  (1 << 1)
+
+#define DP_SINK_DEVICE_AUX_FRAME_SYNC_CONF  0x117   /* eDP 1.4 */
+# define DP_AUX_FRAME_SYNC_ENABLE	    (1 << 0)
+# define DP_IRQ_HPD_ENABLE		    (1 << 1)
+
+#define DP_UPSTREAM_DEVICE_DP_PWR_NEED	    0x118   /* 1.2 */
+# define DP_PWR_NOT_NEEDED		    (1 << 0)
+
+#define DP_AUX_FRAME_SYNC_VALUE		    0x15c   /* eDP 1.4 */
+# define DP_AUX_FRAME_SYNC_VALID	    (1 << 0)
+
+#define DP_PSR_EN_CFG			    0x170   /* XXX 1.2? */
+# define DP_PSR_ENABLE			    (1 << 0)
+# define DP_PSR_MAIN_LINK_ACTIVE	    (1 << 1)
+# define DP_PSR_CRC_VERIFICATION	    (1 << 2)
+# define DP_PSR_FRAME_CAPTURE		    (1 << 3)
+# define DP_PSR_SELECTIVE_UPDATE	    (1 << 4)
+# define DP_PSR_IRQ_HPD_WITH_CRC_ERRORS     (1 << 5)
+
+#define DP_ADAPTER_CTRL			    0x1a0
+# define DP_ADAPTER_CTRL_FORCE_LOAD_SENSE   (1 << 0)
+
+#define DP_BRANCH_DEVICE_CTRL		    0x1a1
+# define DP_BRANCH_DEVICE_IRQ_HPD	    (1 << 0)
+
+#define DP_PAYLOAD_ALLOCATE_SET		    0x1c0
+#define DP_PAYLOAD_ALLOCATE_START_TIME_SLOT 0x1c1
+#define DP_PAYLOAD_ALLOCATE_TIME_SLOT_COUNT 0x1c2
+
+#define DP_SINK_COUNT			    0x200
+/* prior to 1.2 bit 7 was reserved mbz */
+# define DP_GET_SINK_COUNT(x)		    ((((x) & 0x80) >> 1) | ((x) & 0x3f))
+# define DP_SINK_CP_READY		    (1 << 6)
+
+#define DP_DEVICE_SERVICE_IRQ_VECTOR	    0x201
+# define DP_REMOTE_CONTROL_COMMAND_PENDING  (1 << 0)
+# define DP_AUTOMATED_TEST_REQUEST	    (1 << 1)
+# define DP_CP_IRQ			    (1 << 2)
+# define DP_MCCS_IRQ			    (1 << 3)
+# define DP_DOWN_REP_MSG_RDY		    (1 << 4) /* 1.2 MST */
+# define DP_UP_REQ_MSG_RDY		    (1 << 5) /* 1.2 MST */
+# define DP_SINK_SPECIFIC_IRQ		    (1 << 6)
+
+#define DP_LANE0_1_STATUS		    0x202
+#define DP_LANE2_3_STATUS		    0x203
+# define DP_LANE_CR_DONE		    (1 << 0)
+# define DP_LANE_CHANNEL_EQ_DONE	    (1 << 1)
+# define DP_LANE_SYMBOL_LOCKED		    (1 << 2)
+
+#define DP_CHANNEL_EQ_BITS (DP_LANE_CR_DONE |		\
+			    DP_LANE_CHANNEL_EQ_DONE |	\
+			    DP_LANE_SYMBOL_LOCKED)
+
+#define DP_LANE_ALIGN_STATUS_UPDATED	    0x204
+
+#define DP_INTERLANE_ALIGN_DONE		    (1 << 0)
+#define DP_DOWNSTREAM_PORT_STATUS_CHANGED   (1 << 6)
+#define DP_LINK_STATUS_UPDATED		    (1 << 7)
+
+#define DP_SINK_STATUS			    0x205
+
+#define DP_RECEIVE_PORT_0_STATUS	    (1 << 0)
+#define DP_RECEIVE_PORT_1_STATUS	    (1 << 1)
+
+#define DP_ADJUST_REQUEST_LANE0_1	    0x206
+#define DP_ADJUST_REQUEST_LANE2_3	    0x207
+# define DP_ADJUST_VOLTAGE_SWING_LANE0_MASK  0x03
+# define DP_ADJUST_VOLTAGE_SWING_LANE0_SHIFT 0
+# define DP_ADJUST_PRE_EMPHASIS_LANE0_MASK   0x0c
+# define DP_ADJUST_PRE_EMPHASIS_LANE0_SHIFT  2
+# define DP_ADJUST_VOLTAGE_SWING_LANE1_MASK  0x30
+# define DP_ADJUST_VOLTAGE_SWING_LANE1_SHIFT 4
+# define DP_ADJUST_PRE_EMPHASIS_LANE1_MASK   0xc0
+# define DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT  6
+
+#define DP_TEST_REQUEST			    0x218
+# define DP_TEST_LINK_TRAINING		    (1 << 0)
+# define DP_TEST_LINK_VIDEO_PATTERN	    (1 << 1)
+# define DP_TEST_LINK_EDID_READ		    (1 << 2)
+# define DP_TEST_LINK_PHY_TEST_PATTERN	    (1 << 3) /* DPCD >= 1.1 */
+# define DP_TEST_LINK_FAUX_PATTERN	    (1 << 4) /* DPCD >= 1.2 */
+
+#define DP_TEST_LINK_RATE		    0x219
+# define DP_LINK_RATE_162		    (0x6)
+# define DP_LINK_RATE_27		    (0xa)
+
+#define DP_TEST_LANE_COUNT		    0x220
+
+#define DP_TEST_PATTERN			    0x221
+
+#define DP_TEST_CRC_R_CR		    0x240
+#define DP_TEST_CRC_G_Y			    0x242
+#define DP_TEST_CRC_B_CB		    0x244
+
+#define DP_TEST_SINK_MISC		    0x246
+# define DP_TEST_CRC_SUPPORTED		    (1 << 5)
+# define DP_TEST_COUNT_MASK		    0xf
+
+#define DP_TEST_RESPONSE		    0x260
+# define DP_TEST_ACK			    (1 << 0)
+# define DP_TEST_NAK			    (1 << 1)
+# define DP_TEST_EDID_CHECKSUM_WRITE	    (1 << 2)
+
+#define DP_TEST_EDID_CHECKSUM		    0x261
+
+#define DP_TEST_SINK			    0x270
+# define DP_TEST_SINK_START		    (1 << 0)
+
+#define DP_PAYLOAD_TABLE_UPDATE_STATUS      0x2c0   /* 1.2 MST */
+# define DP_PAYLOAD_TABLE_UPDATED           (1 << 0)
+# define DP_PAYLOAD_ACT_HANDLED             (1 << 1)
+
+#define DP_VC_PAYLOAD_ID_SLOT_1             0x2c1   /* 1.2 MST */
+/* up to ID_SLOT_63 at 0x2ff */
+
+#define DP_SOURCE_OUI			    0x300
+#define DP_SINK_OUI			    0x400
+#define DP_BRANCH_OUI			    0x500
+
+#define DP_SET_POWER                        0x600
+# define DP_SET_POWER_D0                    0x1
+# define DP_SET_POWER_D3                    0x2
+# define DP_SET_POWER_MASK                  0x3
+
+#define DP_EDP_DPCD_REV			    0x700    /* eDP 1.2 */
+# define DP_EDP_11			    0x00
+# define DP_EDP_12			    0x01
+# define DP_EDP_13			    0x02
+# define DP_EDP_14			    0x03
+
+#define DP_EDP_GENERAL_CAP_1		    0x701
+
+#define DP_EDP_BACKLIGHT_ADJUSTMENT_CAP     0x702
+
+#define DP_EDP_GENERAL_CAP_2		    0x703
+
+#define DP_EDP_GENERAL_CAP_3		    0x704    /* eDP 1.4 */
+
+#define DP_EDP_DISPLAY_CONTROL_REGISTER     0x720
+
+#define DP_EDP_BACKLIGHT_MODE_SET_REGISTER  0x721
+
+#define DP_EDP_BACKLIGHT_BRIGHTNESS_MSB     0x722
+#define DP_EDP_BACKLIGHT_BRIGHTNESS_LSB     0x723
+
+#define DP_EDP_PWMGEN_BIT_COUNT             0x724
+#define DP_EDP_PWMGEN_BIT_COUNT_CAP_MIN     0x725
+#define DP_EDP_PWMGEN_BIT_COUNT_CAP_MAX     0x726
+
+#define DP_EDP_BACKLIGHT_CONTROL_STATUS     0x727
+
+#define DP_EDP_BACKLIGHT_FREQ_SET           0x728
+
+#define DP_EDP_BACKLIGHT_FREQ_CAP_MIN_MSB   0x72a
+#define DP_EDP_BACKLIGHT_FREQ_CAP_MIN_MID   0x72b
+#define DP_EDP_BACKLIGHT_FREQ_CAP_MIN_LSB   0x72c
+
+#define DP_EDP_BACKLIGHT_FREQ_CAP_MAX_MSB   0x72d
+#define DP_EDP_BACKLIGHT_FREQ_CAP_MAX_MID   0x72e
+#define DP_EDP_BACKLIGHT_FREQ_CAP_MAX_LSB   0x72f
+
+#define DP_EDP_DBC_MINIMUM_BRIGHTNESS_SET   0x732
+#define DP_EDP_DBC_MAXIMUM_BRIGHTNESS_SET   0x733
+
+#define DP_EDP_REGIONAL_BACKLIGHT_BASE      0x740    /* eDP 1.4 */
+#define DP_EDP_REGIONAL_BACKLIGHT_0	    0x741    /* eDP 1.4 */
+
+#define DP_SIDEBAND_MSG_DOWN_REQ_BASE	    0x1000   /* 1.2 MST */
+#define DP_SIDEBAND_MSG_UP_REP_BASE	    0x1200   /* 1.2 MST */
+#define DP_SIDEBAND_MSG_DOWN_REP_BASE	    0x1400   /* 1.2 MST */
+#define DP_SIDEBAND_MSG_UP_REQ_BASE	    0x1600   /* 1.2 MST */
+
+#define DP_SINK_COUNT_ESI		    0x2002   /* 1.2 */
+/* 0-5 sink count */
+# define DP_SINK_COUNT_CP_READY             (1 << 6)
+
+#define DP_DEVICE_SERVICE_IRQ_VECTOR_ESI0   0x2003   /* 1.2 */
+
+#define DP_DEVICE_SERVICE_IRQ_VECTOR_ESI1   0x2004   /* 1.2 */
+
+#define DP_LINK_SERVICE_IRQ_VECTOR_ESI0     0x2005   /* 1.2 */
+
+#define DP_PSR_ERROR_STATUS                 0x2006  /* XXX 1.2? */
+# define DP_PSR_LINK_CRC_ERROR              (1 << 0)
+# define DP_PSR_RFB_STORAGE_ERROR           (1 << 1)
+# define DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR (1 << 2) /* eDP 1.4 */
+
+#define DP_PSR_ESI                          0x2007  /* XXX 1.2? */
+# define DP_PSR_CAPS_CHANGE                 (1 << 0)
+
+#define DP_PSR_STATUS                       0x2008  /* XXX 1.2? */
+# define DP_PSR_SINK_INACTIVE               0
+# define DP_PSR_SINK_ACTIVE_SRC_SYNCED      1
+# define DP_PSR_SINK_ACTIVE_RFB             2
+# define DP_PSR_SINK_ACTIVE_SINK_SYNCED     3
+# define DP_PSR_SINK_ACTIVE_RESYNC          4
+# define DP_PSR_SINK_INTERNAL_ERROR         7
+# define DP_PSR_SINK_STATE_MASK             0x07
+
+#define DP_RECEIVER_ALPM_STATUS		    0x200b  /* eDP 1.4 */
+# define DP_ALPM_LOCK_TIMEOUT_ERROR	    (1 << 0)
+
+/* DP 1.2 Sideband message defines */
+/* peer device type - DP 1.2a Table 2-92 */
+#define DP_PEER_DEVICE_NONE		0x0
+#define DP_PEER_DEVICE_SOURCE_OR_SST	0x1
+#define DP_PEER_DEVICE_MST_BRANCHING	0x2
+#define DP_PEER_DEVICE_SST_SINK		0x3
+#define DP_PEER_DEVICE_DP_LEGACY_CONV	0x4
+
+/* DP 1.2 MST sideband request names DP 1.2a Table 2-80 */
+#define DP_LINK_ADDRESS			0x01
+#define DP_CONNECTION_STATUS_NOTIFY	0x02
+#define DP_ENUM_PATH_RESOURCES		0x10
+#define DP_ALLOCATE_PAYLOAD		0x11
+#define DP_QUERY_PAYLOAD		0x12
+#define DP_RESOURCE_STATUS_NOTIFY	0x13
+#define DP_CLEAR_PAYLOAD_ID_TABLE	0x14
+#define DP_REMOTE_DPCD_READ		0x20
+#define DP_REMOTE_DPCD_WRITE		0x21
+#define DP_REMOTE_I2C_READ		0x22
+#define DP_REMOTE_I2C_WRITE		0x23
+#define DP_POWER_UP_PHY			0x24
+#define DP_POWER_DOWN_PHY		0x25
+#define DP_SINK_EVENT_NOTIFY		0x30
+#define DP_QUERY_STREAM_ENC_STATUS	0x38
+
+/* DP 1.2 MST sideband nak reasons - table 2.84 */
+#define DP_NAK_WRITE_FAILURE		0x01
+#define DP_NAK_INVALID_READ		0x02
+#define DP_NAK_CRC_FAILURE		0x03
+#define DP_NAK_BAD_PARAM		0x04
+#define DP_NAK_DEFER			0x05
+#define DP_NAK_LINK_FAILURE		0x06
+#define DP_NAK_NO_RESOURCES		0x07
+#define DP_NAK_DPCD_FAIL		0x08
+#define DP_NAK_I2C_NAK			0x09
+#define DP_NAK_ALLOCATE_FAIL		0x0a
+
+#define ANALOGIX_DP_TX_SW_RESET			0x14
+#define ANALOGIX_DP_FUNC_EN_1			0x18
+#define ANALOGIX_DP_FUNC_EN_2			0x1C
+#define ANALOGIX_DP_VIDEO_CTL_1			0x20
+#define ANALOGIX_DP_VIDEO_CTL_2			0x24
+#define ANALOGIX_DP_VIDEO_CTL_3			0x28
+
+#define ANALOGIX_DP_VIDEO_CTL_8			0x3C
+#define ANALOGIX_DP_VIDEO_CTL_10		0x44
+
+#define ANALOGIX_DP_PLL_REG_1			0xfc
+#define ANALOGIX_DP_PLL_REG_2			0x9e4
+#define ANALOGIX_DP_PLL_REG_3			0x9e8
+#define ANALOGIX_DP_PLL_REG_4			0x9ec
+#define ANALOGIX_DP_PLL_REG_5			0xa00
+
+#define ANALOGIX_DP_PD				0x12c
+
+#define ANALOGIX_DP_LANE_MAP			0x35C
+
+#define ANALOGIX_DP_ANALOG_CTL_1		0x370
+#define ANALOGIX_DP_ANALOG_CTL_2		0x374
+#define ANALOGIX_DP_ANALOG_CTL_3		0x378
+#define ANALOGIX_DP_PLL_FILTER_CTL_1		0x37C
+#define ANALOGIX_DP_TX_AMP_TUNING_CTL		0x380
+
+#define ANALOGIX_DP_AUX_HW_RETRY_CTL		0x390
+
+#define ANALOGIX_DP_COMMON_INT_STA_1		0x3C4
+#define ANALOGIX_DP_COMMON_INT_STA_2		0x3C8
+#define ANALOGIX_DP_COMMON_INT_STA_3		0x3CC
+#define ANALOGIX_DP_COMMON_INT_STA_4		0x3D0
+#define ANALOGIX_DP_INT_STA			0x3DC
+#define ANALOGIX_DP_COMMON_INT_MASK_1		0x3E0
+#define ANALOGIX_DP_COMMON_INT_MASK_2		0x3E4
+#define ANALOGIX_DP_COMMON_INT_MASK_3		0x3E8
+#define ANALOGIX_DP_COMMON_INT_MASK_4		0x3EC
+#define ANALOGIX_DP_INT_STA_MASK		0x3F8
+#define ANALOGIX_DP_INT_CTL			0x3FC
+
+#define ANALOGIX_DP_SYS_CTL_1			0x600
+#define ANALOGIX_DP_SYS_CTL_2			0x604
+#define ANALOGIX_DP_SYS_CTL_3			0x608
+#define ANALOGIX_DP_SYS_CTL_4			0x60C
+
+#define ANALOGIX_DP_PKT_SEND_CTL		0x640
+#define ANALOGIX_DP_HDCP_CTL			0x648
+
+#define ANALOGIX_DP_LINK_BW_SET			0x680
+#define ANALOGIX_DP_LANE_COUNT_SET		0x684
+#define ANALOGIX_DP_TRAINING_PTN_SET		0x688
+#define ANALOGIX_DP_LN0_LINK_TRAINING_CTL	0x68C
+#define ANALOGIX_DP_LN1_LINK_TRAINING_CTL	0x690
+#define ANALOGIX_DP_LN2_LINK_TRAINING_CTL	0x694
+#define ANALOGIX_DP_LN3_LINK_TRAINING_CTL	0x698
+
+#define ANALOGIX_DP_DEBUG_CTL			0x6C0
+#define ANALOGIX_DP_HPD_DEGLITCH_L		0x6C4
+#define ANALOGIX_DP_HPD_DEGLITCH_H		0x6C8
+#define ANALOGIX_DP_LINK_DEBUG_CTL		0x6E0
+
+#define ANALOGIX_DP_M_VID_0			0x700
+#define ANALOGIX_DP_M_VID_1			0x704
+#define ANALOGIX_DP_M_VID_2			0x708
+#define ANALOGIX_DP_N_VID_0			0x70C
+#define ANALOGIX_DP_N_VID_1			0x710
+#define ANALOGIX_DP_N_VID_2			0x714
+
+#define ANALOGIX_DP_PLL_CTL			0x71C
+#define ANALOGIX_DP_PHY_PD			0x720
+#define ANALOGIX_DP_PHY_TEST			0x724
+
+#define ANALOGIX_DP_VIDEO_FIFO_THRD		0x730
+#define ANALOGIX_DP_AUDIO_MARGIN		0x73C
+
+#define ANALOGIX_DP_M_VID_GEN_FILTER_TH		0x764
+#define ANALOGIX_DP_M_AUD_GEN_FILTER_TH		0x778
+#define ANALOGIX_DP_AUX_CH_STA			0x780
+#define ANALOGIX_DP_AUX_CH_DEFER_CTL		0x788
+#define ANALOGIX_DP_AUX_RX_COMM			0x78C
+#define ANALOGIX_DP_BUFFER_DATA_CTL		0x790
+#define ANALOGIX_DP_AUX_CH_CTL_1		0x794
+#define ANALOGIX_DP_AUX_ADDR_7_0		0x798
+#define ANALOGIX_DP_AUX_ADDR_15_8		0x79C
+#define ANALOGIX_DP_AUX_ADDR_19_16		0x7A0
+#define ANALOGIX_DP_AUX_CH_CTL_2		0x7A4
+
+#define ANALOGIX_DP_BUF_DATA_0			0x7C0
+
+#define ANALOGIX_DP_SOC_GENERAL_CTL		0x800
+
+/* ANALOGIX_DP_TX_SW_RESET */
+#define RESET_DP_TX				(0x1 << 0)
+
+/* ANALOGIX_DP_FUNC_EN_1 */
+#define MASTER_VID_FUNC_EN_N			(0x1 << 7)
+#define SLAVE_VID_FUNC_EN_N			(0x1 << 5)
+#define AUD_FIFO_FUNC_EN_N			(0x1 << 4)
+#define AUD_FUNC_EN_N				(0x1 << 3)
+#define HDCP_FUNC_EN_N				(0x1 << 2)
+#define CRC_FUNC_EN_N				(0x1 << 1)
+#define SW_FUNC_EN_N				(0x1 << 0)
+
+/* ANALOGIX_DP_FUNC_EN_2 */
+#define SSC_FUNC_EN_N				(0x1 << 7)
+#define AUX_FUNC_EN_N				(0x1 << 2)
+#define SERDES_FIFO_FUNC_EN_N			(0x1 << 1)
+#define LS_CLK_DOMAIN_FUNC_EN_N			(0x1 << 0)
+
+/* ANALOGIX_DP_VIDEO_CTL_1 */
+#define VIDEO_EN				(0x1 << 7)
+#define HDCP_VIDEO_MUTE				(0x1 << 6)
+
+/* ANALOGIX_DP_VIDEO_CTL_1 */
+#define IN_D_RANGE_MASK				(0x1 << 7)
+#define IN_D_RANGE_SHIFT			(7)
+#define IN_D_RANGE_CEA				(0x1 << 7)
+#define IN_D_RANGE_VESA				(0x0 << 7)
+#define IN_BPC_MASK				(0x7 << 4)
+#define IN_BPC_SHIFT				(4)
+#define IN_BPC_12_BITS				(0x3 << 4)
+#define IN_BPC_10_BITS				(0x2 << 4)
+#define IN_BPC_8_BITS				(0x1 << 4)
+#define IN_BPC_6_BITS				(0x0 << 4)
+#define IN_COLOR_F_MASK				(0x3 << 0)
+#define IN_COLOR_F_SHIFT			(0)
+#define IN_COLOR_F_YCBCR444			(0x2 << 0)
+#define IN_COLOR_F_YCBCR422			(0x1 << 0)
+#define IN_COLOR_F_RGB				(0x0 << 0)
+
+/* ANALOGIX_DP_VIDEO_CTL_3 */
+#define IN_YC_COEFFI_MASK			(0x1 << 7)
+#define IN_YC_COEFFI_SHIFT			(7)
+#define IN_YC_COEFFI_ITU709			(0x1 << 7)
+#define IN_YC_COEFFI_ITU601			(0x0 << 7)
+#define VID_CHK_UPDATE_TYPE_MASK		(0x1 << 4)
+#define VID_CHK_UPDATE_TYPE_SHIFT		(4)
+#define VID_CHK_UPDATE_TYPE_1			(0x1 << 4)
+#define VID_CHK_UPDATE_TYPE_0			(0x0 << 4)
+
+/* ANALOGIX_DP_VIDEO_CTL_8 */
+#define VID_HRES_TH(x)				(((x) & 0xf) << 4)
+#define VID_VRES_TH(x)				(((x) & 0xf) << 0)
+
+/* ANALOGIX_DP_VIDEO_CTL_10 */
+#define FORMAT_SEL				(0x1 << 4)
+#define INTERACE_SCAN_CFG			(0x1 << 2)
+#define VSYNC_POLARITY_CFG			(0x1 << 1)
+#define HSYNC_POLARITY_CFG			(0x1 << 0)
+
+/* ANALOGIX_DP_PLL_REG_1 */
+#define REF_CLK_24M				(0x1 << 0)
+#define REF_CLK_27M				(0x0 << 0)
+#define REF_CLK_MASK				(0x1 << 0)
+
+/* ANALOGIX_DP_LANE_MAP */
+#define LANE3_MAP_LOGIC_LANE_0			(0x0 << 6)
+#define LANE3_MAP_LOGIC_LANE_1			(0x1 << 6)
+#define LANE3_MAP_LOGIC_LANE_2			(0x2 << 6)
+#define LANE3_MAP_LOGIC_LANE_3			(0x3 << 6)
+#define LANE2_MAP_LOGIC_LANE_0			(0x0 << 4)
+#define LANE2_MAP_LOGIC_LANE_1			(0x1 << 4)
+#define LANE2_MAP_LOGIC_LANE_2			(0x2 << 4)
+#define LANE2_MAP_LOGIC_LANE_3			(0x3 << 4)
+#define LANE1_MAP_LOGIC_LANE_0			(0x0 << 2)
+#define LANE1_MAP_LOGIC_LANE_1			(0x1 << 2)
+#define LANE1_MAP_LOGIC_LANE_2			(0x2 << 2)
+#define LANE1_MAP_LOGIC_LANE_3			(0x3 << 2)
+#define LANE0_MAP_LOGIC_LANE_0			(0x0 << 0)
+#define LANE0_MAP_LOGIC_LANE_1			(0x1 << 0)
+#define LANE0_MAP_LOGIC_LANE_2			(0x2 << 0)
+#define LANE0_MAP_LOGIC_LANE_3			(0x3 << 0)
+
+/* ANALOGIX_DP_ANALOG_CTL_1 */
+#define TX_TERMINAL_CTRL_50_OHM			(0x1 << 4)
+
+/* ANALOGIX_DP_ANALOG_CTL_2 */
+#define SEL_24M					(0x1 << 3)
+#define TX_DVDD_BIT_1_0625V			(0x4 << 0)
+
+/* ANALOGIX_DP_ANALOG_CTL_3 */
+#define DRIVE_DVDD_BIT_1_0625V			(0x4 << 5)
+#define VCO_BIT_600_MICRO			(0x5 << 0)
+
+/* ANALOGIX_DP_PLL_FILTER_CTL_1 */
+#define PD_RING_OSC				(0x1 << 6)
+#define AUX_TERMINAL_CTRL_50_OHM		(0x2 << 4)
+#define TX_CUR1_2X				(0x1 << 2)
+#define TX_CUR_16_MA				(0x3 << 0)
+
+/* ANALOGIX_DP_TX_AMP_TUNING_CTL */
+#define CH3_AMP_400_MV				(0x0 << 24)
+#define CH2_AMP_400_MV				(0x0 << 16)
+#define CH1_AMP_400_MV				(0x0 << 8)
+#define CH0_AMP_400_MV				(0x0 << 0)
+
+/* ANALOGIX_DP_AUX_HW_RETRY_CTL */
+#define AUX_BIT_PERIOD_EXPECTED_DELAY(x)	(((x) & 0x7) << 8)
+#define AUX_HW_RETRY_INTERVAL_MASK		(0x3 << 3)
+#define AUX_HW_RETRY_INTERVAL_600_MICROSECONDS	(0x0 << 3)
+#define AUX_HW_RETRY_INTERVAL_800_MICROSECONDS	(0x1 << 3)
+#define AUX_HW_RETRY_INTERVAL_1000_MICROSECONDS	(0x2 << 3)
+#define AUX_HW_RETRY_INTERVAL_1800_MICROSECONDS	(0x3 << 3)
+#define AUX_HW_RETRY_COUNT_SEL(x)		(((x) & 0x7) << 0)
+
+/* ANALOGIX_DP_COMMON_INT_STA_1 */
+#define VSYNC_DET				(0x1 << 7)
+#define PLL_LOCK_CHG				(0x1 << 6)
+#define SPDIF_ERR				(0x1 << 5)
+#define SPDIF_UNSTBL				(0x1 << 4)
+#define VID_FORMAT_CHG				(0x1 << 3)
+#define AUD_CLK_CHG				(0x1 << 2)
+#define VID_CLK_CHG				(0x1 << 1)
+#define SW_INT					(0x1 << 0)
+
+/* ANALOGIX_DP_COMMON_INT_STA_2 */
+#define ENC_EN_CHG				(0x1 << 6)
+#define HW_BKSV_RDY				(0x1 << 3)
+#define HW_SHA_DONE				(0x1 << 2)
+#define HW_AUTH_STATE_CHG			(0x1 << 1)
+#define HW_AUTH_DONE				(0x1 << 0)
+
+/* ANALOGIX_DP_COMMON_INT_STA_3 */
+#define AFIFO_UNDER				(0x1 << 7)
+#define AFIFO_OVER				(0x1 << 6)
+#define R0_CHK_FLAG				(0x1 << 5)
+
+/* ANALOGIX_DP_COMMON_INT_STA_4 */
+#define PSR_ACTIVE				(0x1 << 7)
+#define PSR_INACTIVE				(0x1 << 6)
+#define SPDIF_BI_PHASE_ERR			(0x1 << 5)
+#define HOTPLUG_CHG				(0x1 << 2)
+#define HPD_LOST				(0x1 << 1)
+#define PLUG					(0x1 << 0)
+
+/* ANALOGIX_DP_INT_STA */
+#define INT_HPD					(0x1 << 6)
+#define HW_TRAINING_FINISH			(0x1 << 5)
+#define RPLY_RECEIV				(0x1 << 1)
+#define AUX_ERR					(0x1 << 0)
+
+/* ANALOGIX_DP_INT_CTL */
+#define SOFT_INT_CTRL				(0x1 << 2)
+#define INT_POL1				(0x1 << 1)
+#define INT_POL0				(0x1 << 0)
+
+/* ANALOGIX_DP_SYS_CTL_1 */
+#define DET_STA					(0x1 << 2)
+#define FORCE_DET				(0x1 << 1)
+#define DET_CTRL				(0x1 << 0)
+
+/* ANALOGIX_DP_SYS_CTL_2 */
+#define CHA_CRI(x)				(((x) & 0xf) << 4)
+#define CHA_STA					(0x1 << 2)
+#define FORCE_CHA				(0x1 << 1)
+#define CHA_CTRL				(0x1 << 0)
+
+/* ANALOGIX_DP_SYS_CTL_3 */
+#define HPD_STATUS				(0x1 << 6)
+#define F_HPD					(0x1 << 5)
+#define HPD_CTRL				(0x1 << 4)
+#define HDCP_RDY				(0x1 << 3)
+#define STRM_VALID				(0x1 << 2)
+#define F_VALID					(0x1 << 1)
+#define VALID_CTRL				(0x1 << 0)
+
+/* ANALOGIX_DP_SYS_CTL_4 */
+#define FIX_M_AUD				(0x1 << 4)
+#define ENHANCED				(0x1 << 3)
+#define FIX_M_VID				(0x1 << 2)
+#define M_VID_UPDATE_CTRL			(0x3 << 0)
+
+/* ANALOGIX_DP_TRAINING_PTN_SET */
+#define SCRAMBLER_TYPE				(0x1 << 9)
+#define HW_LINK_TRAINING_PATTERN		(0x1 << 8)
+#define SCRAMBLING_DISABLE			(0x1 << 5)
+#define SCRAMBLING_ENABLE			(0x0 << 5)
+#define LINK_QUAL_PATTERN_SET_MASK		(0x3 << 2)
+#define LINK_QUAL_PATTERN_SET_PRBS7		(0x3 << 2)
+#define LINK_QUAL_PATTERN_SET_D10_2		(0x1 << 2)
+#define LINK_QUAL_PATTERN_SET_DISABLE		(0x0 << 2)
+#define SW_TRAINING_PATTERN_SET_MASK		(0x3 << 0)
+#define SW_TRAINING_PATTERN_SET_PTN2		(0x2 << 0)
+#define SW_TRAINING_PATTERN_SET_PTN1		(0x1 << 0)
+#define SW_TRAINING_PATTERN_SET_NORMAL		(0x0 << 0)
+
+/* ANALOGIX_DP_LN0_LINK_TRAINING_CTL */
+#define PRE_EMPHASIS_SET_MASK			(0x3 << 3)
+#define PRE_EMPHASIS_SET_SHIFT			(3)
+
+/* ANALOGIX_DP_DEBUG_CTL */
+#define PLL_LOCK				(0x1 << 4)
+#define F_PLL_LOCK				(0x1 << 3)
+#define PLL_LOCK_CTRL				(0x1 << 2)
+#define PN_INV					(0x1 << 0)
+
+/* ANALOGIX_DP_PLL_CTL */
+#define DP_PLL_PD				(0x1 << 7)
+#define DP_PLL_RESET				(0x1 << 6)
+#define DP_PLL_LOOP_BIT_DEFAULT			(0x1 << 4)
+#define DP_PLL_REF_BIT_1_1250V			(0x5 << 0)
+#define DP_PLL_REF_BIT_1_2500V			(0x7 << 0)
+
+/* ANALOGIX_DP_PHY_PD */
+#define DP_PHY_PD				(0x1 << 5)
+#define AUX_PD					(0x1 << 4)
+#define CH3_PD					(0x1 << 3)
+#define CH2_PD					(0x1 << 2)
+#define CH1_PD					(0x1 << 1)
+#define CH0_PD					(0x1 << 0)
+
+/* ANALOGIX_DP_PHY_TEST */
+#define MACRO_RST				(0x1 << 5)
+#define CH1_TEST				(0x1 << 1)
+#define CH0_TEST				(0x1 << 0)
+
+/* ANALOGIX_DP_AUX_CH_STA */
+#define AUX_BUSY				(0x1 << 4)
+#define AUX_STATUS_MASK				(0xf << 0)
+
+/* ANALOGIX_DP_AUX_CH_DEFER_CTL */
+#define DEFER_CTRL_EN				(0x1 << 7)
+#define DEFER_COUNT(x)				(((x) & 0x7f) << 0)
+
+/* ANALOGIX_DP_AUX_RX_COMM */
+#define AUX_RX_COMM_I2C_DEFER			(0x2 << 2)
+#define AUX_RX_COMM_AUX_DEFER			(0x2 << 0)
+
+/* ANALOGIX_DP_BUFFER_DATA_CTL */
+#define BUF_CLR					(0x1 << 7)
+#define BUF_DATA_COUNT(x)			(((x) & 0x1f) << 0)
+
+/* ANALOGIX_DP_AUX_CH_CTL_1 */
+#define AUX_LENGTH(x)				(((x - 1) & 0xf) << 4)
+#define AUX_TX_COMM_MASK			(0xf << 0)
+#define AUX_TX_COMM_DP_TRANSACTION		(0x1 << 3)
+#define AUX_TX_COMM_I2C_TRANSACTION		(0x0 << 3)
+#define AUX_TX_COMM_MOT				(0x1 << 2)
+#define AUX_TX_COMM_WRITE			(0x0 << 0)
+#define AUX_TX_COMM_READ			(0x1 << 0)
+
+/* ANALOGIX_DP_AUX_ADDR_7_0 */
+#define AUX_ADDR_7_0(x)				(((x) >> 0) & 0xff)
+
+/* ANALOGIX_DP_AUX_ADDR_15_8 */
+#define AUX_ADDR_15_8(x)			(((x) >> 8) & 0xff)
+
+/* ANALOGIX_DP_AUX_ADDR_19_16 */
+#define AUX_ADDR_19_16(x)			(((x) >> 16) & 0x0f)
+
+/* ANALOGIX_DP_AUX_CH_CTL_2 */
+#define ADDR_ONLY				(0x1 << 1)
+#define AUX_EN					(0x1 << 0)
+
+/* ANALOGIX_DP_SOC_GENERAL_CTL */
+#define AUDIO_MODE_SPDIF_MODE			(0x1 << 8)
+#define AUDIO_MODE_MASTER_MODE			(0x0 << 8)
+#define MASTER_VIDEO_INTERLACE_EN		(0x1 << 4)
+#define VIDEO_MASTER_CLK_SEL			(0x1 << 2)
+#define VIDEO_MASTER_MODE_EN			(0x1 << 1)
+#define VIDEO_MODE_MASK				(0x1 << 0)
+#define VIDEO_MODE_SLAVE_MODE			(0x1 << 0)
+#define VIDEO_MODE_MASTER_MODE			(0x0 << 0)
+
+#define DP_TIMEOUT_LOOP_COUNT 100
+#define MAX_CR_LOOP 5
+#define MAX_EQ_LOOP 5
+
+/* I2C EDID Chip ID, Slave Address */
+#define I2C_EDID_DEVICE_ADDR			0x50
+#define I2C_E_EDID_DEVICE_ADDR			0x30
+
+#define EDID_BLOCK_LENGTH			0x80
+#define EDID_HEADER_PATTERN			0x00
+#define EDID_EXTENSION_FLAG			0x7e
+#define EDID_CHECKSUM				0x7f
+
+/* DP_MAX_LANE_COUNT */
+#define DPCD_ENHANCED_FRAME_CAP(x)		(((x) >> 7) & 0x1)
+#define DPCD_MAX_LANE_COUNT(x)			((x) & 0x1f)
+
+/* DP_LANE_COUNT_SET */
+#define DPCD_LANE_COUNT_SET(x)			((x) & 0x1f)
+
+/* DP_TRAINING_LANE0_SET */
+#define DPCD_PRE_EMPHASIS_SET(x)		(((x) & 0x3) << 3)
+#define DPCD_PRE_EMPHASIS_GET(x)		(((x) >> 3) & 0x3)
+#define DPCD_VOLTAGE_SWING_SET(x)		(((x) & 0x3) << 0)
+#define DPCD_VOLTAGE_SWING_GET(x)		(((x) >> 0) & 0x3)
+
+enum link_lane_count_type {
+	LANE_COUNT1 = 1,
+	LANE_COUNT2 = 2,
+	LANE_COUNT4 = 4
+};
+
+enum link_training_state {
+	START,
+	CLOCK_RECOVERY,
+	EQUALIZER_TRAINING,
+	FINISHED,
+	FAILED
+};
+
+enum voltage_swing_level {
+	VOLTAGE_LEVEL_0,
+	VOLTAGE_LEVEL_1,
+	VOLTAGE_LEVEL_2,
+	VOLTAGE_LEVEL_3,
+};
+
+enum pre_emphasis_level {
+	PRE_EMPHASIS_LEVEL_0,
+	PRE_EMPHASIS_LEVEL_1,
+	PRE_EMPHASIS_LEVEL_2,
+	PRE_EMPHASIS_LEVEL_3,
+};
+
+enum pattern_set {
+	PRBS7,
+	D10_2,
+	TRAINING_PTN1,
+	TRAINING_PTN2,
+	DP_NONE
+};
+
+enum color_space {
+	COLOR_RGB,
+	COLOR_YCBCR422,
+	COLOR_YCBCR444
+};
+
+enum color_depth {
+	COLOR_6,
+	COLOR_8,
+	COLOR_10,
+	COLOR_12
+};
+
+enum color_coefficient {
+	COLOR_YCBCR601,
+	COLOR_YCBCR709
+};
+
+enum dynamic_range {
+	VESA,
+	CEA
+};
+
+enum pll_status {
+	PLL_UNLOCKED,
+	PLL_LOCKED
+};
+
+enum clock_recovery_m_value_type {
+	CALCULATED_M,
+	REGISTER_M
+};
+
+enum video_timing_recognition_type {
+	VIDEO_TIMING_FROM_CAPTURE,
+	VIDEO_TIMING_FROM_REGISTER
+};
+
+enum analog_power_block {
+	AUX_BLOCK,
+	CH0_BLOCK,
+	CH1_BLOCK,
+	CH2_BLOCK,
+	CH3_BLOCK,
+	ANALOG_TOTAL,
+	POWER_ALL
+};
+
+enum dp_irq_type {
+	DP_IRQ_TYPE_HP_CABLE_IN  = BIT(0),
+	DP_IRQ_TYPE_HP_CABLE_OUT = BIT(1),
+	DP_IRQ_TYPE_HP_CHANGE    = BIT(2),
+	DP_IRQ_TYPE_UNKNOWN      = BIT(3),
+};
+
+struct video_info {
+	char *name;
+
+	bool h_sync_polarity;
+	bool v_sync_polarity;
+	bool interlaced;
+
+	enum color_space color_space;
+	enum dynamic_range dynamic_range;
+	enum color_coefficient ycbcr_coeff;
+	enum color_depth color_depth;
+
+	int max_link_rate;
+	enum link_lane_count_type max_lane_count;
+};
+
+struct link_train {
+	int eq_loop;
+	int cr_loop[4];
+
+	u8 link_rate;
+	u8 lane_count;
+	u8 training_lane[4];
+
+	enum link_training_state lt_state;
+};
+
+enum analogix_dp_devtype {
+	EXYNOS_DP,
+	ROCKCHIP_DP,
+};
+
+enum analogix_dp_sub_devtype {
+	RK3288_DP,
+	RK3368_EDP,
+	RK3399_EDP,
+};
+
+struct analogix_dp_plat_data {
+	enum analogix_dp_devtype dev_type;
+	enum analogix_dp_sub_devtype subdev_type;
+};
+
+struct analogix_dp_device {
+	void *reg_base;
+	void *grf;
+	struct gpio_desc hpd_gpio;
+	struct video_info	video_info;
+	struct link_train	link_train;
+	struct drm_display_mode *mode;
+	struct analogix_dp_plat_data *plat_data;
+	unsigned char edid[EDID_BLOCK_LENGTH * 2];
+};
+
+/* analogix_dp_reg.c */
+void analogix_dp_enable_video_mute(struct analogix_dp_device *dp, bool enable);
+void analogix_dp_stop_video(struct analogix_dp_device *dp);
+void analogix_dp_lane_swap(struct analogix_dp_device *dp, bool enable);
+void analogix_dp_init_analog_param(struct analogix_dp_device *dp);
+void analogix_dp_init_interrupt(struct analogix_dp_device *dp);
+void analogix_dp_reset(struct analogix_dp_device *dp);
+void analogix_dp_swreset(struct analogix_dp_device *dp);
+void analogix_dp_config_interrupt(struct analogix_dp_device *dp);
+void analogix_dp_mute_hpd_interrupt(struct analogix_dp_device *dp);
+void analogix_dp_unmute_hpd_interrupt(struct analogix_dp_device *dp);
+enum pll_status analogix_dp_get_pll_lock_status(struct analogix_dp_device *dp);
+void analogix_dp_set_pll_power_down(struct analogix_dp_device *dp, bool enable);
+void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
+				       enum analog_power_block block,
+				       bool enable);
+void analogix_dp_init_analog_func(struct analogix_dp_device *dp);
+void analogix_dp_init_hpd(struct analogix_dp_device *dp);
+void analogix_dp_force_hpd(struct analogix_dp_device *dp);
+enum dp_irq_type analogix_dp_get_irq_type(struct analogix_dp_device *dp);
+void analogix_dp_clear_hotplug_interrupts(struct analogix_dp_device *dp);
+void analogix_dp_reset_aux(struct analogix_dp_device *dp);
+void analogix_dp_init_aux(struct analogix_dp_device *dp);
+int analogix_dp_get_plug_in_status(struct analogix_dp_device *dp);
+void analogix_dp_enable_sw_function(struct analogix_dp_device *dp);
+int analogix_dp_start_aux_transaction(struct analogix_dp_device *dp);
+int analogix_dp_write_byte_to_dpcd(struct analogix_dp_device *dp,
+				   unsigned int reg_addr,
+				   unsigned char data);
+int analogix_dp_read_byte_from_dpcd(struct analogix_dp_device *dp,
+				    unsigned int reg_addr,
+				    unsigned char *data);
+int analogix_dp_write_bytes_to_dpcd(struct analogix_dp_device *dp,
+				    unsigned int reg_addr,
+				    unsigned int count,
+				    unsigned char data[]);
+int analogix_dp_read_bytes_from_dpcd(struct analogix_dp_device *dp,
+				     unsigned int reg_addr,
+				     unsigned int count,
+				     unsigned char data[]);
+int analogix_dp_select_i2c_device(struct analogix_dp_device *dp,
+				  unsigned int device_addr,
+				  unsigned int reg_addr);
+int analogix_dp_read_byte_from_i2c(struct analogix_dp_device *dp,
+				   unsigned int device_addr,
+				   unsigned int reg_addr,
+				   unsigned int *data);
+int analogix_dp_read_bytes_from_i2c(struct analogix_dp_device *dp,
+				    unsigned int device_addr,
+				    unsigned int reg_addr,
+				    unsigned int count,
+				    unsigned char edid[]);
+void analogix_dp_set_link_bandwidth(struct analogix_dp_device *dp, u32 bwtype);
+void analogix_dp_get_link_bandwidth(struct analogix_dp_device *dp, u32 *bwtype);
+void analogix_dp_set_lane_count(struct analogix_dp_device *dp, u32 count);
+void analogix_dp_get_lane_count(struct analogix_dp_device *dp, u32 *count);
+void analogix_dp_enable_enhanced_mode(struct analogix_dp_device *dp,
+				      bool enable);
+void analogix_dp_set_training_pattern(struct analogix_dp_device *dp,
+				      enum pattern_set pattern);
+void analogix_dp_set_lane0_pre_emphasis(struct analogix_dp_device *dp,
+					u32 level);
+void analogix_dp_set_lane1_pre_emphasis(struct analogix_dp_device *dp,
+					u32 level);
+void analogix_dp_set_lane2_pre_emphasis(struct analogix_dp_device *dp,
+					u32 level);
+void analogix_dp_set_lane3_pre_emphasis(struct analogix_dp_device *dp,
+					u32 level);
+void analogix_dp_set_lane0_link_training(struct analogix_dp_device *dp,
+					 u32 training_lane);
+void analogix_dp_set_lane1_link_training(struct analogix_dp_device *dp,
+					 u32 training_lane);
+void analogix_dp_set_lane2_link_training(struct analogix_dp_device *dp,
+					 u32 training_lane);
+void analogix_dp_set_lane3_link_training(struct analogix_dp_device *dp,
+					 u32 training_lane);
+u32 analogix_dp_get_lane0_link_training(struct analogix_dp_device *dp);
+u32 analogix_dp_get_lane1_link_training(struct analogix_dp_device *dp);
+u32 analogix_dp_get_lane2_link_training(struct analogix_dp_device *dp);
+u32 analogix_dp_get_lane3_link_training(struct analogix_dp_device *dp);
+void analogix_dp_reset_macro(struct analogix_dp_device *dp);
+void analogix_dp_init_video(struct analogix_dp_device *dp);
+
+void analogix_dp_set_video_color_format(struct analogix_dp_device *dp);
+int analogix_dp_is_slave_video_stream_clock_on(struct analogix_dp_device *dp);
+void analogix_dp_set_video_cr_mn(struct analogix_dp_device *dp,
+				 enum clock_recovery_m_value_type type,
+				 u32 m_value,
+				 u32 n_value);
+void analogix_dp_set_video_timing_mode(struct analogix_dp_device *dp, u32 type);
+void analogix_dp_enable_video_master(struct analogix_dp_device *dp,
+				     bool enable);
+void analogix_dp_start_video(struct analogix_dp_device *dp);
+int analogix_dp_is_video_stream_on(struct analogix_dp_device *dp);
+void analogix_dp_config_video_slave_mode(struct analogix_dp_device *dp);
+void analogix_dp_enable_scrambling(struct analogix_dp_device *dp);
+void analogix_dp_disable_scrambling(struct analogix_dp_device *dp);
+
+#endif /* __DRM_ANALOGIX_DP__ */
diff --git a/drivers/video/drm/rockchip_analogix_dp_reg.c b/drivers/video/drm/rockchip_analogix_dp_reg.c
new file mode 100644
index 0000000000..7e6c638972
--- /dev/null
+++ b/drivers/video/drm/rockchip_analogix_dp_reg.c
@@ -0,0 +1,1334 @@
+/*
+ * Analogix DP (Display port) core register interface driver.
+ *
+ * Copyright (C) 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ * Copyright (C) 2012 Samsung Electronics Co., Ltd.
+ * Author: Jingoo Han <jg1.han@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <config.h>
+#include <common.h>
+#include <errno.h>
+#include <malloc.h>
+#include <fdtdec.h>
+#include <fdt_support.h>
+#include <asm/unaligned.h>
+#include <linux/list.h>
+#include <dm/device.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <asm/gpio.h>
+
+#include "rockchip_display.h"
+#include "rockchip_crtc.h"
+#include "rockchip_connector.h"
+#include "rockchip_analogix_dp.h"
+
+#define COMMON_INT_MASK_1	0
+#define COMMON_INT_MASK_2	0
+#define COMMON_INT_MASK_3	0
+#define COMMON_INT_MASK_4	(HOTPLUG_CHG | HPD_LOST | PLUG)
+#define INT_STA_MASK		INT_HPD
+
+void analogix_dp_enable_video_mute(struct analogix_dp_device *dp, bool enable)
+{
+	u32 reg;
+
+	if (enable) {
+		reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1);
+		reg |= HDCP_VIDEO_MUTE;
+		writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1);
+	} else {
+		reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1);
+		reg &= ~HDCP_VIDEO_MUTE;
+		writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1);
+	}
+}
+
+void analogix_dp_stop_video(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1);
+	reg &= ~VIDEO_EN;
+	writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1);
+}
+
+void analogix_dp_lane_swap(struct analogix_dp_device *dp, bool enable)
+{
+	u32 reg;
+
+	if (enable)
+		reg = LANE3_MAP_LOGIC_LANE_0 | LANE2_MAP_LOGIC_LANE_1 |
+		      LANE1_MAP_LOGIC_LANE_2 | LANE0_MAP_LOGIC_LANE_3;
+	else
+		reg = LANE3_MAP_LOGIC_LANE_3 | LANE2_MAP_LOGIC_LANE_2 |
+		      LANE1_MAP_LOGIC_LANE_1 | LANE0_MAP_LOGIC_LANE_0;
+
+	writel(reg, dp->reg_base + ANALOGIX_DP_LANE_MAP);
+}
+
+void analogix_dp_init_analog_param(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	reg = TX_TERMINAL_CTRL_50_OHM;
+	writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_1);
+
+	reg = SEL_24M | TX_DVDD_BIT_1_0625V;
+	writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_2);
+
+	if (dp->plat_data && (dp->plat_data->dev_type == ROCKCHIP_DP)) {
+		reg = REF_CLK_24M;
+		if (dp->plat_data->subdev_type == RK3288_DP ||
+		    dp->plat_data->subdev_type == RK3368_EDP)
+			reg ^= REF_CLK_MASK;
+
+		writel(reg, dp->reg_base + ANALOGIX_DP_PLL_REG_1);
+		writel(0x95, dp->reg_base + ANALOGIX_DP_PLL_REG_2);
+		writel(0x40, dp->reg_base + ANALOGIX_DP_PLL_REG_3);
+		writel(0x58, dp->reg_base + ANALOGIX_DP_PLL_REG_4);
+		writel(0x22, dp->reg_base + ANALOGIX_DP_PLL_REG_5);
+	}
+
+	reg = DRIVE_DVDD_BIT_1_0625V | VCO_BIT_600_MICRO;
+	writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_3);
+
+	reg = PD_RING_OSC | AUX_TERMINAL_CTRL_50_OHM |
+		TX_CUR1_2X | TX_CUR_16_MA;
+	writel(reg, dp->reg_base + ANALOGIX_DP_PLL_FILTER_CTL_1);
+
+	reg = CH3_AMP_400_MV | CH2_AMP_400_MV |
+		CH1_AMP_400_MV | CH0_AMP_400_MV;
+	writel(reg, dp->reg_base + ANALOGIX_DP_TX_AMP_TUNING_CTL);
+}
+
+void analogix_dp_init_interrupt(struct analogix_dp_device *dp)
+{
+	/* Set interrupt pin assertion polarity as high */
+	writel(INT_POL1 | INT_POL0, dp->reg_base + ANALOGIX_DP_INT_CTL);
+
+	/* Clear pending regisers */
+	writel(0xff, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_1);
+	writel(0x4f, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_2);
+	writel(0xe0, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_3);
+	writel(0xe7, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_4);
+	writel(0x63, dp->reg_base + ANALOGIX_DP_INT_STA);
+
+	/* 0:mask,1: unmask */
+	writel(0x00, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_1);
+	writel(0x00, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_2);
+	writel(0x00, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_3);
+	writel(0x00, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4);
+	writel(0x00, dp->reg_base + ANALOGIX_DP_INT_STA_MASK);
+}
+
+void analogix_dp_reset(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	analogix_dp_stop_video(dp);
+	analogix_dp_enable_video_mute(dp, 0);
+
+	reg = MASTER_VID_FUNC_EN_N | SLAVE_VID_FUNC_EN_N |
+		AUD_FIFO_FUNC_EN_N | AUD_FUNC_EN_N |
+		HDCP_FUNC_EN_N | SW_FUNC_EN_N;
+	writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_1);
+
+	reg = SSC_FUNC_EN_N | AUX_FUNC_EN_N |
+		SERDES_FIFO_FUNC_EN_N |
+		LS_CLK_DOMAIN_FUNC_EN_N;
+	writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_2);
+
+	udelay(30);
+
+	analogix_dp_lane_swap(dp, 0);
+
+	writel(0x0, dp->reg_base + ANALOGIX_DP_SYS_CTL_1);
+	writel(0x40, dp->reg_base + ANALOGIX_DP_SYS_CTL_2);
+	writel(0x0, dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
+	writel(0x0, dp->reg_base + ANALOGIX_DP_SYS_CTL_4);
+
+	writel(0x0, dp->reg_base + ANALOGIX_DP_PKT_SEND_CTL);
+	writel(0x0, dp->reg_base + ANALOGIX_DP_HDCP_CTL);
+
+	writel(0x5e, dp->reg_base + ANALOGIX_DP_HPD_DEGLITCH_L);
+	writel(0x1a, dp->reg_base + ANALOGIX_DP_HPD_DEGLITCH_H);
+
+	writel(0x10, dp->reg_base + ANALOGIX_DP_LINK_DEBUG_CTL);
+
+	writel(0x0, dp->reg_base + ANALOGIX_DP_PHY_TEST);
+
+	writel(0x0, dp->reg_base + ANALOGIX_DP_VIDEO_FIFO_THRD);
+	writel(0x20, dp->reg_base + ANALOGIX_DP_AUDIO_MARGIN);
+
+	writel(0x4, dp->reg_base + ANALOGIX_DP_M_VID_GEN_FILTER_TH);
+	writel(0x2, dp->reg_base + ANALOGIX_DP_M_AUD_GEN_FILTER_TH);
+
+	writel(0x00000101, dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL);
+}
+
+void analogix_dp_swreset(struct analogix_dp_device *dp)
+{
+	writel(RESET_DP_TX, dp->reg_base + ANALOGIX_DP_TX_SW_RESET);
+}
+
+void analogix_dp_config_interrupt(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	/* 0: mask, 1: unmask */
+	reg = COMMON_INT_MASK_1;
+	writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_1);
+
+	reg = COMMON_INT_MASK_2;
+	writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_2);
+
+	reg = COMMON_INT_MASK_3;
+	writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_3);
+
+	reg = COMMON_INT_MASK_4;
+	writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4);
+
+	reg = INT_STA_MASK;
+	writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA_MASK);
+}
+
+void analogix_dp_mute_hpd_interrupt(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	/* 0: mask, 1: unmask */
+	reg = readl(dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4);
+	reg &= ~COMMON_INT_MASK_4;
+	writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4);
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA_MASK);
+	reg &= ~INT_STA_MASK;
+	writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA_MASK);
+}
+
+void analogix_dp_unmute_hpd_interrupt(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	/* 0: mask, 1: unmask */
+	reg = COMMON_INT_MASK_4;
+	writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4);
+
+	reg = INT_STA_MASK;
+	writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA_MASK);
+}
+
+enum pll_status analogix_dp_get_pll_lock_status(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_DEBUG_CTL);
+	if (reg & PLL_LOCK)
+		return PLL_LOCKED;
+	else
+		return PLL_UNLOCKED;
+}
+
+void analogix_dp_set_pll_power_down(struct analogix_dp_device *dp, bool enable)
+{
+	u32 reg;
+
+	if (enable) {
+		reg = readl(dp->reg_base + ANALOGIX_DP_PLL_CTL);
+		reg |= DP_PLL_PD;
+		writel(reg, dp->reg_base + ANALOGIX_DP_PLL_CTL);
+	} else {
+		reg = readl(dp->reg_base + ANALOGIX_DP_PLL_CTL);
+		reg &= ~DP_PLL_PD;
+		writel(reg, dp->reg_base + ANALOGIX_DP_PLL_CTL);
+	}
+}
+
+void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
+				       enum analog_power_block block,
+				       bool enable)
+{
+	u32 reg;
+	u32 phy_pd_addr = ANALOGIX_DP_PHY_PD;
+
+	if (dp->plat_data && (dp->plat_data->dev_type == ROCKCHIP_DP))
+		phy_pd_addr = ANALOGIX_DP_PD;
+
+	switch (block) {
+	case AUX_BLOCK:
+		if (enable) {
+			reg = readl(dp->reg_base + phy_pd_addr);
+			reg |= AUX_PD;
+			writel(reg, dp->reg_base + phy_pd_addr);
+		} else {
+			reg = readl(dp->reg_base + phy_pd_addr);
+			reg &= ~AUX_PD;
+			writel(reg, dp->reg_base + phy_pd_addr);
+		}
+		break;
+	case CH0_BLOCK:
+		if (enable) {
+			reg = readl(dp->reg_base + phy_pd_addr);
+			reg |= CH0_PD;
+			writel(reg, dp->reg_base + phy_pd_addr);
+		} else {
+			reg = readl(dp->reg_base + phy_pd_addr);
+			reg &= ~CH0_PD;
+			writel(reg, dp->reg_base + phy_pd_addr);
+		}
+		break;
+	case CH1_BLOCK:
+		if (enable) {
+			reg = readl(dp->reg_base + phy_pd_addr);
+			reg |= CH1_PD;
+			writel(reg, dp->reg_base + phy_pd_addr);
+		} else {
+			reg = readl(dp->reg_base + phy_pd_addr);
+			reg &= ~CH1_PD;
+			writel(reg, dp->reg_base + phy_pd_addr);
+		}
+		break;
+	case CH2_BLOCK:
+		if (enable) {
+			reg = readl(dp->reg_base + phy_pd_addr);
+			reg |= CH2_PD;
+			writel(reg, dp->reg_base + phy_pd_addr);
+		} else {
+			reg = readl(dp->reg_base + phy_pd_addr);
+			reg &= ~CH2_PD;
+			writel(reg, dp->reg_base + phy_pd_addr);
+		}
+		break;
+	case CH3_BLOCK:
+		if (enable) {
+			reg = readl(dp->reg_base + phy_pd_addr);
+			reg |= CH3_PD;
+			writel(reg, dp->reg_base + phy_pd_addr);
+		} else {
+			reg = readl(dp->reg_base + phy_pd_addr);
+			reg &= ~CH3_PD;
+			writel(reg, dp->reg_base + phy_pd_addr);
+		}
+		break;
+	case ANALOG_TOTAL:
+		if (enable) {
+			reg = readl(dp->reg_base + phy_pd_addr);
+			reg |= DP_PHY_PD;
+			writel(reg, dp->reg_base + phy_pd_addr);
+		} else {
+			reg = readl(dp->reg_base + phy_pd_addr);
+			reg &= ~DP_PHY_PD;
+			writel(reg, dp->reg_base + phy_pd_addr);
+		}
+		break;
+	case POWER_ALL:
+		if (enable) {
+			reg = DP_PHY_PD | AUX_PD | CH3_PD | CH2_PD |
+				CH1_PD | CH0_PD;
+			writel(reg, dp->reg_base + phy_pd_addr);
+		} else {
+			writel(0x00, dp->reg_base + phy_pd_addr);
+		}
+		break;
+	default:
+		break;
+	}
+}
+
+void analogix_dp_init_analog_func(struct analogix_dp_device *dp)
+{
+	u32 reg;
+	int timeout_loop = 0;
+
+	analogix_dp_set_analog_power_down(dp, POWER_ALL, 0);
+
+	reg = PLL_LOCK_CHG;
+	writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_1);
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_DEBUG_CTL);
+	reg &= ~(F_PLL_LOCK | PLL_LOCK_CTRL);
+	writel(reg, dp->reg_base + ANALOGIX_DP_DEBUG_CTL);
+
+	/* Power up PLL */
+	if (analogix_dp_get_pll_lock_status(dp) == PLL_UNLOCKED) {
+		analogix_dp_set_pll_power_down(dp, 0);
+
+		while (analogix_dp_get_pll_lock_status(dp) == PLL_UNLOCKED) {
+			timeout_loop++;
+			if(DP_TIMEOUT_LOOP_COUNT < timeout_loop) {
+				pr_err("failed to get pll lock status\n");
+				return;
+			}
+			udelay(20);
+		}
+	}
+
+	/* Enable Serdes FIFO function and Link symbol clock domain module */
+	reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_2);
+	reg &= ~(SERDES_FIFO_FUNC_EN_N | LS_CLK_DOMAIN_FUNC_EN_N
+		| AUX_FUNC_EN_N);
+	writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_2);
+}
+
+void analogix_dp_clear_hotplug_interrupts(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	if (dm_gpio_is_valid(&dp->hpd_gpio))
+		return;
+
+	reg = HOTPLUG_CHG | HPD_LOST | PLUG;
+	writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_4);
+
+	reg = INT_HPD;
+	writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA);
+}
+
+void analogix_dp_init_hpd(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	if (dm_gpio_is_valid(&dp->hpd_gpio))
+		return;
+
+	analogix_dp_clear_hotplug_interrupts(dp);
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
+	reg &= ~(F_HPD | HPD_CTRL);
+	writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
+}
+
+void analogix_dp_force_hpd(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
+	reg = (F_HPD | HPD_CTRL);
+	writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
+}
+
+enum dp_irq_type analogix_dp_get_irq_type(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	if (dm_gpio_is_valid(&dp->hpd_gpio)) {
+		reg = dm_gpio_get_value(&dp->hpd_gpio);
+		if (reg)
+			return DP_IRQ_TYPE_HP_CABLE_IN;
+		else
+			return DP_IRQ_TYPE_HP_CABLE_OUT;
+	} else {
+		/* Parse hotplug interrupt status register */
+		reg = readl(dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_4);
+
+		if (reg & PLUG)
+			return DP_IRQ_TYPE_HP_CABLE_IN;
+
+		if (reg & HPD_LOST)
+			return DP_IRQ_TYPE_HP_CABLE_OUT;
+
+		if (reg & HOTPLUG_CHG)
+			return DP_IRQ_TYPE_HP_CHANGE;
+
+		return DP_IRQ_TYPE_UNKNOWN;
+	}
+}
+
+void analogix_dp_reset_aux(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	/* Disable AUX channel module */
+	reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_2);
+	reg |= AUX_FUNC_EN_N;
+	writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_2);
+}
+
+void analogix_dp_init_aux(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	/* Clear inerrupts related to AUX channel */
+	reg = RPLY_RECEIV | AUX_ERR;
+	writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA);
+
+	analogix_dp_reset_aux(dp);
+
+	/* Disable AUX transaction H/W retry */
+	if (dp->plat_data && (dp->plat_data->dev_type == ROCKCHIP_DP))
+		reg = AUX_BIT_PERIOD_EXPECTED_DELAY(0) |
+		      AUX_HW_RETRY_COUNT_SEL(3) |
+		      AUX_HW_RETRY_INTERVAL_600_MICROSECONDS;
+	else
+		reg = AUX_BIT_PERIOD_EXPECTED_DELAY(3) |
+		      AUX_HW_RETRY_COUNT_SEL(0) |
+		      AUX_HW_RETRY_INTERVAL_600_MICROSECONDS;
+	writel(reg, dp->reg_base + ANALOGIX_DP_AUX_HW_RETRY_CTL);
+
+	/* Receive AUX Channel DEFER commands equal to DEFFER_COUNT*64 */
+	reg = DEFER_CTRL_EN | DEFER_COUNT(1);
+	writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_DEFER_CTL);
+
+	/* Enable AUX channel module */
+	reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_2);
+	reg &= ~AUX_FUNC_EN_N;
+	writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_2);
+}
+
+int analogix_dp_get_plug_in_status(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	if (dm_gpio_is_valid(&dp->hpd_gpio)) {
+		if (dm_gpio_get_value(&dp->hpd_gpio))
+			return 0;
+	} else {
+		reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
+		if (reg & HPD_STATUS)
+			return 0;
+	}
+
+	return -EINVAL;
+}
+
+void analogix_dp_enable_sw_function(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_1);
+	reg &= ~SW_FUNC_EN_N;
+	writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_1);
+}
+
+int analogix_dp_start_aux_transaction(struct analogix_dp_device *dp)
+{
+	int reg;
+	int retval = 0;
+	int timeout_loop = 0;
+
+	/* Enable AUX CH operation */
+	reg = readl(dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_2);
+	reg |= AUX_EN;
+	writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_2);
+
+	/* Is AUX CH command reply received? */
+	reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA);
+	while (!(reg & RPLY_RECEIV)) {
+		timeout_loop++;
+		if (DP_TIMEOUT_LOOP_COUNT < timeout_loop) {
+			pr_err("AUX CH command reply failed!\n");
+			return -ETIMEDOUT;
+		}
+		reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA);
+		udelay(11);
+	}
+
+	/* Clear interrupt source for AUX CH command reply */
+	writel(RPLY_RECEIV, dp->reg_base + ANALOGIX_DP_INT_STA);
+
+	/* Clear interrupt source for AUX CH access error */
+	reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA);
+	if (reg & AUX_ERR) {
+		writel(AUX_ERR, dp->reg_base + ANALOGIX_DP_INT_STA);
+		return -EREMOTEIO;
+	}
+
+	/* Check AUX CH error access status */
+	reg = readl(dp->reg_base + ANALOGIX_DP_AUX_CH_STA);
+	if ((reg & AUX_STATUS_MASK) != 0) {
+		pr_err("AUX CH error happens: %d\n\n",
+			reg & AUX_STATUS_MASK);
+		return -EREMOTEIO;
+	}
+
+	return retval;
+}
+
+int analogix_dp_write_byte_to_dpcd(struct analogix_dp_device *dp,
+				   unsigned int reg_addr,
+				   unsigned char data)
+{
+	u32 reg;
+	int i;
+	int retval;
+
+	for (i = 0; i < 3; i++) {
+		/* Clear AUX CH data buffer */
+		reg = BUF_CLR;
+		writel(reg, dp->reg_base + ANALOGIX_DP_BUFFER_DATA_CTL);
+
+		/* Select DPCD device address */
+		reg = AUX_ADDR_7_0(reg_addr);
+		writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_7_0);
+		reg = AUX_ADDR_15_8(reg_addr);
+		writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_15_8);
+		reg = AUX_ADDR_19_16(reg_addr);
+		writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_19_16);
+
+		/* Write data buffer */
+		reg = (unsigned int)data;
+		writel(reg, dp->reg_base + ANALOGIX_DP_BUF_DATA_0);
+
+		/*
+		 * Set DisplayPort transaction and write 1 byte
+		 * If bit 3 is 1, DisplayPort transaction.
+		 * If Bit 3 is 0, I2C transaction.
+		 */
+		reg = AUX_TX_COMM_DP_TRANSACTION | AUX_TX_COMM_WRITE;
+		writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_1);
+
+		/* Start AUX transaction */
+		retval = analogix_dp_start_aux_transaction(dp);
+		if (retval == 0)
+			break;
+
+		pr_debug("%s: Aux Transaction fail!\n", __func__);
+	}
+
+	return retval;
+}
+
+int analogix_dp_read_byte_from_dpcd(struct analogix_dp_device *dp,
+				    unsigned int reg_addr,
+				    unsigned char *data)
+{
+	u32 reg;
+	int i;
+	int retval;
+
+	for (i = 0; i < 3; i++) {
+		/* Clear AUX CH data buffer */
+		reg = BUF_CLR;
+		writel(reg, dp->reg_base + ANALOGIX_DP_BUFFER_DATA_CTL);
+
+		/* Select DPCD device address */
+		reg = AUX_ADDR_7_0(reg_addr);
+		writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_7_0);
+		reg = AUX_ADDR_15_8(reg_addr);
+		writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_15_8);
+		reg = AUX_ADDR_19_16(reg_addr);
+		writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_19_16);
+
+		/*
+		 * Set DisplayPort transaction and read 1 byte
+		 * If bit 3 is 1, DisplayPort transaction.
+		 * If Bit 3 is 0, I2C transaction.
+		 */
+		reg = AUX_TX_COMM_DP_TRANSACTION | AUX_TX_COMM_READ;
+		writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_1);
+
+		/* Start AUX transaction */
+		retval = analogix_dp_start_aux_transaction(dp);
+		if (retval == 0)
+			break;
+
+		pr_info("%s: Aux Transaction fail!\n", __func__);
+	}
+
+	/* Read data buffer */
+	reg = readl(dp->reg_base + ANALOGIX_DP_BUF_DATA_0);
+	*data = (unsigned char)(reg & 0xff);
+
+	return retval;
+}
+
+int analogix_dp_write_bytes_to_dpcd(struct analogix_dp_device *dp,
+				    unsigned int reg_addr,
+				    unsigned int count,
+				    unsigned char data[])
+{
+	u32 reg;
+	unsigned int start_offset;
+	unsigned int cur_data_count;
+	unsigned int cur_data_idx;
+	int i;
+	int retval = 0;
+
+	/* Clear AUX CH data buffer */
+	reg = BUF_CLR;
+	writel(reg, dp->reg_base + ANALOGIX_DP_BUFFER_DATA_CTL);
+
+	start_offset = 0;
+	while (start_offset < count) {
+		/* Buffer size of AUX CH is 16 * 4bytes */
+		if ((count - start_offset) > 16)
+			cur_data_count = 16;
+		else
+			cur_data_count = count - start_offset;
+
+		for (i = 0; i < 3; i++) {
+			/* Select DPCD device address */
+			reg = AUX_ADDR_7_0(reg_addr + start_offset);
+			writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_7_0);
+			reg = AUX_ADDR_15_8(reg_addr + start_offset);
+			writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_15_8);
+			reg = AUX_ADDR_19_16(reg_addr + start_offset);
+			writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_19_16);
+
+			for (cur_data_idx = 0; cur_data_idx < cur_data_count;
+			     cur_data_idx++) {
+				reg = data[start_offset + cur_data_idx];
+				writel(reg, dp->reg_base +
+				       ANALOGIX_DP_BUF_DATA_0 +
+				       4 * cur_data_idx);
+			}
+
+			/*
+			 * Set DisplayPort transaction and write
+			 * If bit 3 is 1, DisplayPort transaction.
+			 * If Bit 3 is 0, I2C transaction.
+			 */
+			reg = AUX_LENGTH(cur_data_count) |
+				AUX_TX_COMM_DP_TRANSACTION | AUX_TX_COMM_WRITE;
+			writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_1);
+
+			/* Start AUX transaction */
+			retval = analogix_dp_start_aux_transaction(dp);
+			if (retval == 0)
+				break;
+
+			pr_debug("%s: Aux Transaction fail!\n",
+				__func__);
+		}
+
+		start_offset += cur_data_count;
+	}
+
+	return retval;
+}
+
+int analogix_dp_read_bytes_from_dpcd(struct analogix_dp_device *dp,
+				     unsigned int reg_addr,
+				     unsigned int count,
+				     unsigned char data[])
+{
+	u32 reg;
+	unsigned int start_offset;
+	unsigned int cur_data_count;
+	unsigned int cur_data_idx;
+	int i;
+	int retval = 0;
+
+	/* Clear AUX CH data buffer */
+	reg = BUF_CLR;
+	writel(reg, dp->reg_base + ANALOGIX_DP_BUFFER_DATA_CTL);
+
+	start_offset = 0;
+	while (start_offset < count) {
+		/* Buffer size of AUX CH is 16 * 4bytes */
+		if ((count - start_offset) > 16)
+			cur_data_count = 16;
+		else
+			cur_data_count = count - start_offset;
+
+		/* AUX CH Request Transaction process */
+		for (i = 0; i < 3; i++) {
+			/* Select DPCD device address */
+			reg = AUX_ADDR_7_0(reg_addr + start_offset);
+			writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_7_0);
+			reg = AUX_ADDR_15_8(reg_addr + start_offset);
+			writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_15_8);
+			reg = AUX_ADDR_19_16(reg_addr + start_offset);
+			writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_19_16);
+
+			/*
+			 * Set DisplayPort transaction and read
+			 * If bit 3 is 1, DisplayPort transaction.
+			 * If Bit 3 is 0, I2C transaction.
+			 */
+			reg = AUX_LENGTH(cur_data_count) |
+				AUX_TX_COMM_DP_TRANSACTION | AUX_TX_COMM_READ;
+			writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_1);
+
+			/* Start AUX transaction */
+			retval = analogix_dp_start_aux_transaction(dp);
+			if (retval == 0)
+				break;
+
+			pr_debug("%s: Aux Transaction fail!\n",
+				__func__);
+		}
+
+		for (cur_data_idx = 0; cur_data_idx < cur_data_count;
+		    cur_data_idx++) {
+			reg = readl(dp->reg_base + ANALOGIX_DP_BUF_DATA_0
+						 + 4 * cur_data_idx);
+			data[start_offset + cur_data_idx] =
+				(unsigned char)reg;
+		}
+
+		start_offset += cur_data_count;
+	}
+
+	return retval;
+}
+
+int analogix_dp_select_i2c_device(struct analogix_dp_device *dp,
+				  unsigned int device_addr,
+				  unsigned int reg_addr)
+{
+	u32 reg;
+	int retval;
+
+	/* Set EDID device address */
+	reg = device_addr;
+	writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_7_0);
+	writel(0x0, dp->reg_base + ANALOGIX_DP_AUX_ADDR_15_8);
+	writel(0x0, dp->reg_base + ANALOGIX_DP_AUX_ADDR_19_16);
+
+	/* Set offset from base address of EDID device */
+	writel(reg_addr, dp->reg_base + ANALOGIX_DP_BUF_DATA_0);
+
+	/*
+	 * Set I2C transaction and write address
+	 * If bit 3 is 1, DisplayPort transaction.
+	 * If Bit 3 is 0, I2C transaction.
+	 */
+	reg = AUX_TX_COMM_I2C_TRANSACTION | AUX_TX_COMM_MOT |
+		AUX_TX_COMM_WRITE;
+	writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_1);
+
+	/* Start AUX transaction */
+	retval = analogix_dp_start_aux_transaction(dp);
+	if (retval != 0)
+		pr_debug("%s: Aux Transaction fail!\n", __func__);
+
+	return retval;
+}
+
+int analogix_dp_read_byte_from_i2c(struct analogix_dp_device *dp,
+				   unsigned int device_addr,
+				   unsigned int reg_addr,
+				   unsigned int *data)
+{
+	u32 reg;
+	int i;
+	int retval;
+
+	for (i = 0; i < 3; i++) {
+		/* Clear AUX CH data buffer */
+		reg = BUF_CLR;
+		writel(reg, dp->reg_base + ANALOGIX_DP_BUFFER_DATA_CTL);
+
+		/* Select EDID device */
+		retval = analogix_dp_select_i2c_device(dp, device_addr,
+						       reg_addr);
+		if (retval != 0)
+			continue;
+
+		/*
+		 * Set I2C transaction and read data
+		 * If bit 3 is 1, DisplayPort transaction.
+		 * If Bit 3 is 0, I2C transaction.
+		 */
+		reg = AUX_TX_COMM_I2C_TRANSACTION |
+			AUX_TX_COMM_READ;
+		writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_1);
+
+		/* Start AUX transaction */
+		retval = analogix_dp_start_aux_transaction(dp);
+		if (retval == 0)
+			break;
+
+		pr_debug("%s: Aux Transaction fail!\n", __func__);
+	}
+
+	/* Read data */
+	if (retval == 0)
+		*data = readl(dp->reg_base + ANALOGIX_DP_BUF_DATA_0);
+
+	return retval;
+}
+
+int analogix_dp_read_bytes_from_i2c(struct analogix_dp_device *dp,
+				    unsigned int device_addr,
+				    unsigned int reg_addr,
+				    unsigned int count,
+				    unsigned char edid[])
+{
+	u32 reg;
+	unsigned int i, j;
+	unsigned int cur_data_idx;
+	unsigned int defer = 0;
+	int retval = 0;
+
+	for (i = 0; i < count; i += 16) {
+		for (j = 0; j < 3; j++) {
+			/* Clear AUX CH data buffer */
+			reg = BUF_CLR;
+			writel(reg, dp->reg_base + ANALOGIX_DP_BUFFER_DATA_CTL);
+
+			/* Set normal AUX CH command */
+			reg = readl(dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_2);
+			reg &= ~ADDR_ONLY;
+			writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_2);
+
+			/*
+			 * If Rx sends defer, Tx sends only reads
+			 * request without sending address
+			 */
+			if (!defer)
+				retval = analogix_dp_select_i2c_device(dp,
+						device_addr, reg_addr + i);
+			else
+				defer = 0;
+
+			if (retval == 0) {
+				/*
+				 * Set I2C transaction and write data
+				 * If bit 3 is 1, DisplayPort transaction.
+				 * If Bit 3 is 0, I2C transaction.
+				 */
+				reg = AUX_LENGTH(16) |
+					AUX_TX_COMM_I2C_TRANSACTION |
+					AUX_TX_COMM_READ;
+				writel(reg, dp->reg_base +
+					ANALOGIX_DP_AUX_CH_CTL_1);
+
+				/* Start AUX transaction */
+				retval = analogix_dp_start_aux_transaction(dp);
+				if (retval == 0)
+					break;
+
+				pr_debug("%s: Aux Transaction fail!\n",
+					__func__);
+			}
+			/* Check if Rx sends defer */
+			reg = readl(dp->reg_base + ANALOGIX_DP_AUX_RX_COMM);
+			if (reg == AUX_RX_COMM_AUX_DEFER ||
+			    reg == AUX_RX_COMM_I2C_DEFER) {
+				pr_err("Defer: %d\n\n", reg);
+				defer = 1;
+			}
+		}
+
+		for (cur_data_idx = 0; cur_data_idx < 16; cur_data_idx++) {
+			reg = readl(dp->reg_base + ANALOGIX_DP_BUF_DATA_0
+						 + 4 * cur_data_idx);
+			edid[i + cur_data_idx] = (unsigned char)reg;
+		}
+	}
+
+	return retval;
+}
+
+void analogix_dp_set_link_bandwidth(struct analogix_dp_device *dp, u32 bwtype)
+{
+	u32 reg;
+
+	reg = bwtype;
+	if ((bwtype == DP_LINK_BW_2_7) || (bwtype == DP_LINK_BW_1_62))
+		writel(reg, dp->reg_base + ANALOGIX_DP_LINK_BW_SET);
+}
+
+void analogix_dp_get_link_bandwidth(struct analogix_dp_device *dp, u32 *bwtype)
+{
+	u32 reg;
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_LINK_BW_SET);
+	*bwtype = reg;
+}
+
+void analogix_dp_set_lane_count(struct analogix_dp_device *dp, u32 count)
+{
+	u32 reg;
+
+	reg = count;
+	writel(reg, dp->reg_base + ANALOGIX_DP_LANE_COUNT_SET);
+}
+
+void analogix_dp_get_lane_count(struct analogix_dp_device *dp, u32 *count)
+{
+	u32 reg;
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_LANE_COUNT_SET);
+	*count = reg;
+}
+
+void analogix_dp_enable_enhanced_mode(struct analogix_dp_device *dp,
+				      bool enable)
+{
+	u32 reg;
+
+	if (enable) {
+		reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_4);
+		reg |= ENHANCED;
+		writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_4);
+	} else {
+		reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_4);
+		reg &= ~ENHANCED;
+		writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_4);
+	}
+}
+
+void analogix_dp_set_training_pattern(struct analogix_dp_device *dp,
+				      enum pattern_set pattern)
+{
+	u32 reg;
+
+	switch (pattern) {
+	case PRBS7:
+		reg = SCRAMBLING_ENABLE | LINK_QUAL_PATTERN_SET_PRBS7;
+		writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET);
+		break;
+	case D10_2:
+		reg = SCRAMBLING_ENABLE | LINK_QUAL_PATTERN_SET_D10_2;
+		writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET);
+		break;
+	case TRAINING_PTN1:
+		reg = SCRAMBLING_DISABLE | SW_TRAINING_PATTERN_SET_PTN1;
+		writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET);
+		break;
+	case TRAINING_PTN2:
+		reg = SCRAMBLING_DISABLE | SW_TRAINING_PATTERN_SET_PTN2;
+		writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET);
+		break;
+	case DP_NONE:
+		reg = SCRAMBLING_ENABLE |
+			LINK_QUAL_PATTERN_SET_DISABLE |
+			SW_TRAINING_PATTERN_SET_NORMAL;
+		writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET);
+		break;
+	default:
+		break;
+	}
+}
+
+void analogix_dp_set_lane0_pre_emphasis(struct analogix_dp_device *dp,
+					u32 level)
+{
+	u32 reg;
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_LN0_LINK_TRAINING_CTL);
+	reg &= ~PRE_EMPHASIS_SET_MASK;
+	reg |= level << PRE_EMPHASIS_SET_SHIFT;
+	writel(reg, dp->reg_base + ANALOGIX_DP_LN0_LINK_TRAINING_CTL);
+}
+
+void analogix_dp_set_lane1_pre_emphasis(struct analogix_dp_device *dp,
+					u32 level)
+{
+	u32 reg;
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_LN1_LINK_TRAINING_CTL);
+	reg &= ~PRE_EMPHASIS_SET_MASK;
+	reg |= level << PRE_EMPHASIS_SET_SHIFT;
+	writel(reg, dp->reg_base + ANALOGIX_DP_LN1_LINK_TRAINING_CTL);
+}
+
+void analogix_dp_set_lane2_pre_emphasis(struct analogix_dp_device *dp,
+					u32 level)
+{
+	u32 reg;
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_LN2_LINK_TRAINING_CTL);
+	reg &= ~PRE_EMPHASIS_SET_MASK;
+	reg |= level << PRE_EMPHASIS_SET_SHIFT;
+	writel(reg, dp->reg_base + ANALOGIX_DP_LN2_LINK_TRAINING_CTL);
+}
+
+void analogix_dp_set_lane3_pre_emphasis(struct analogix_dp_device *dp,
+					u32 level)
+{
+	u32 reg;
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_LN3_LINK_TRAINING_CTL);
+	reg &= ~PRE_EMPHASIS_SET_MASK;
+	reg |= level << PRE_EMPHASIS_SET_SHIFT;
+	writel(reg, dp->reg_base + ANALOGIX_DP_LN3_LINK_TRAINING_CTL);
+}
+
+void analogix_dp_set_lane0_link_training(struct analogix_dp_device *dp,
+					 u32 training_lane)
+{
+	u32 reg;
+
+	reg = training_lane;
+	writel(reg, dp->reg_base + ANALOGIX_DP_LN0_LINK_TRAINING_CTL);
+}
+
+void analogix_dp_set_lane1_link_training(struct analogix_dp_device *dp,
+					 u32 training_lane)
+{
+	u32 reg;
+
+	reg = training_lane;
+	writel(reg, dp->reg_base + ANALOGIX_DP_LN1_LINK_TRAINING_CTL);
+}
+
+void analogix_dp_set_lane2_link_training(struct analogix_dp_device *dp,
+					 u32 training_lane)
+{
+	u32 reg;
+
+	reg = training_lane;
+	writel(reg, dp->reg_base + ANALOGIX_DP_LN2_LINK_TRAINING_CTL);
+}
+
+void analogix_dp_set_lane3_link_training(struct analogix_dp_device *dp,
+					 u32 training_lane)
+{
+	u32 reg;
+
+	reg = training_lane;
+	writel(reg, dp->reg_base + ANALOGIX_DP_LN3_LINK_TRAINING_CTL);
+}
+
+u32 analogix_dp_get_lane0_link_training(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_LN0_LINK_TRAINING_CTL);
+	return reg;
+}
+
+u32 analogix_dp_get_lane1_link_training(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_LN1_LINK_TRAINING_CTL);
+	return reg;
+}
+
+u32 analogix_dp_get_lane2_link_training(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_LN2_LINK_TRAINING_CTL);
+	return reg;
+}
+
+u32 analogix_dp_get_lane3_link_training(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_LN3_LINK_TRAINING_CTL);
+	return reg;
+}
+
+void analogix_dp_reset_macro(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_PHY_TEST);
+	reg |= MACRO_RST;
+	writel(reg, dp->reg_base + ANALOGIX_DP_PHY_TEST);
+
+	/* 10 us is the minimum reset time. */
+	udelay(20);
+
+	reg &= ~MACRO_RST;
+	writel(reg, dp->reg_base + ANALOGIX_DP_PHY_TEST);
+}
+
+void analogix_dp_init_video(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	reg = VSYNC_DET | VID_FORMAT_CHG | VID_CLK_CHG;
+	writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_1);
+
+	reg = 0x0;
+	writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_1);
+
+	reg = CHA_CRI(4) | CHA_CTRL;
+	writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_2);
+
+	reg = 0x0;
+	writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
+
+	reg = VID_HRES_TH(2) | VID_VRES_TH(0);
+	writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_8);
+}
+
+void analogix_dp_set_video_color_format(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	/* Configure the input color depth, color space, dynamic range */
+	reg = (dp->video_info.dynamic_range << IN_D_RANGE_SHIFT) |
+		(dp->video_info.color_depth << IN_BPC_SHIFT) |
+		(dp->video_info.color_space << IN_COLOR_F_SHIFT);
+	writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_2);
+
+	/* Set Input Color YCbCr Coefficients to ITU601 or ITU709 */
+	reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_3);
+	reg &= ~IN_YC_COEFFI_MASK;
+	if (dp->video_info.ycbcr_coeff)
+		reg |= IN_YC_COEFFI_ITU709;
+	else
+		reg |= IN_YC_COEFFI_ITU601;
+	writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_3);
+}
+
+int analogix_dp_is_slave_video_stream_clock_on(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_1);
+	writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_1);
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_1);
+
+	if (!(reg & DET_STA)) {
+		pr_debug("Input stream clock not detected.\n");
+		return -EINVAL;
+	}
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_2);
+	writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_2);
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_2);
+	pr_debug("wait SYS_CTL_2.\n");
+
+	if (reg & CHA_STA) {
+		pr_debug("Input stream clk is changing\n");
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+void analogix_dp_set_video_cr_mn(struct analogix_dp_device *dp,
+				 enum clock_recovery_m_value_type type,
+				 u32 m_value, u32 n_value)
+{
+	u32 reg;
+
+	if (type == REGISTER_M) {
+		reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_4);
+		reg |= FIX_M_VID;
+		writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_4);
+		reg = m_value & 0xff;
+		writel(reg, dp->reg_base + ANALOGIX_DP_M_VID_0);
+		reg = (m_value >> 8) & 0xff;
+		writel(reg, dp->reg_base + ANALOGIX_DP_M_VID_1);
+		reg = (m_value >> 16) & 0xff;
+		writel(reg, dp->reg_base + ANALOGIX_DP_M_VID_2);
+
+		reg = n_value & 0xff;
+		writel(reg, dp->reg_base + ANALOGIX_DP_N_VID_0);
+		reg = (n_value >> 8) & 0xff;
+		writel(reg, dp->reg_base + ANALOGIX_DP_N_VID_1);
+		reg = (n_value >> 16) & 0xff;
+		writel(reg, dp->reg_base + ANALOGIX_DP_N_VID_2);
+	} else  {
+		reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_4);
+		reg &= ~FIX_M_VID;
+		writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_4);
+
+		writel(0x00, dp->reg_base + ANALOGIX_DP_N_VID_0);
+		writel(0x80, dp->reg_base + ANALOGIX_DP_N_VID_1);
+		writel(0x00, dp->reg_base + ANALOGIX_DP_N_VID_2);
+	}
+}
+
+void analogix_dp_set_video_timing_mode(struct analogix_dp_device *dp, u32 type)
+{
+	u32 reg;
+
+	if (type == VIDEO_TIMING_FROM_CAPTURE) {
+		reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
+		reg &= ~FORMAT_SEL;
+		writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
+	} else {
+		reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
+		reg |= FORMAT_SEL;
+		writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
+	}
+}
+
+void analogix_dp_enable_video_master(struct analogix_dp_device *dp, bool enable)
+{
+	u32 reg;
+
+	if (enable) {
+		reg = readl(dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL);
+		reg &= ~VIDEO_MODE_MASK;
+		reg |= VIDEO_MASTER_MODE_EN | VIDEO_MODE_MASTER_MODE;
+		writel(reg, dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL);
+	} else {
+		reg = readl(dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL);
+		reg &= ~VIDEO_MODE_MASK;
+		reg |= VIDEO_MODE_SLAVE_MODE;
+		writel(reg, dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL);
+	}
+}
+
+void analogix_dp_start_video(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1);
+	reg |= VIDEO_EN;
+	writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1);
+}
+
+int analogix_dp_is_video_stream_on(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
+	writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
+	if (!(reg & STRM_VALID)) {
+		pr_debug("Input video stream is not detected.\n");
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+void analogix_dp_config_video_slave_mode(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_1);
+	reg &= ~(MASTER_VID_FUNC_EN_N | SLAVE_VID_FUNC_EN_N);
+	reg |= MASTER_VID_FUNC_EN_N;
+	writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_1);
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
+	reg &= ~INTERACE_SCAN_CFG;
+	reg |= (dp->video_info.interlaced << 2);
+	writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
+	reg &= ~VSYNC_POLARITY_CFG;
+	reg |= (dp->video_info.v_sync_polarity << 1);
+	writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
+	reg &= ~HSYNC_POLARITY_CFG;
+	reg |= (dp->video_info.h_sync_polarity << 0);
+	writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
+
+	reg = AUDIO_MODE_SPDIF_MODE | VIDEO_MODE_SLAVE_MODE;
+	writel(reg, dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL);
+}
+
+void analogix_dp_enable_scrambling(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET);
+	reg &= ~SCRAMBLING_DISABLE;
+	writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET);
+}
+
+void analogix_dp_disable_scrambling(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET);
+	reg |= SCRAMBLING_DISABLE;
+	writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET);
+}
diff --git a/drivers/video/drm/rockchip_connector.h b/drivers/video/drm/rockchip_connector.h
new file mode 100644
index 0000000000..bec485baec
--- /dev/null
+++ b/drivers/video/drm/rockchip_connector.h
@@ -0,0 +1,91 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _ROCKCHIP_CONNECTOR_H_
+#define _ROCKCHIP_CONNECTOR_H_
+
+#include "rockchip_mipi_dsi.h"
+
+struct rockchip_connector {
+	const struct rockchip_connector_funcs *funcs;
+
+	const void *data;
+};
+
+struct rockchip_connector_funcs {
+	/*
+	 * init connector, prepare resource to ensure
+	 * detect and get_timing can works
+	 */
+	int (*init)(struct display_state *state);
+
+	void (*deinit)(struct display_state *state);
+	/*
+	 * Optional, if connector not support hotplug,
+	 * Returns:
+	 *   0 means disconnected, else means connected
+	 */
+	int (*detect)(struct display_state *state);
+	/*
+	 * Optional, if implement it, need fill the timing data:
+	 *     state->conn_state->mode
+	 * you can refer to the rockchip_display: display_get_timing(),
+	 * Returns:
+	 *   0 means success, else means failed
+	 */
+	int (*get_timing)(struct display_state *state);
+	/*
+	 * Optional, if implement it, need fill the edid data:
+	 *     state->conn_state->edid
+	 * Returns:
+	 *   0 means success, else means failed
+	 */
+	int (*get_edid)(struct display_state *state);
+	/*
+	 * call before crtc enable.
+	 */
+	int (*prepare)(struct display_state *state);
+	/*
+	 * call after crtc enable
+	 */
+	int (*enable)(struct display_state *state);
+	int (*disable)(struct display_state *state);
+	void (*unprepare)(struct display_state *state);
+	/*
+	 * Save data to dts, then you can share data to kernel space.
+	 */
+	int (*fixup_dts)(struct display_state *state, void *blob);
+	/* transmit a DSI packet */
+	ssize_t (*transfer)(struct display_state *state,
+			    const struct mipi_dsi_msg *msg);
+};
+
+const struct rockchip_connector *
+rockchip_get_connector(const void *blob, int connector_node);
+
+#ifdef CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI
+struct dw_mipi_dsi_plat_data;
+extern const struct rockchip_connector_funcs rockchip_dw_mipi_dsi_funcs;
+extern const struct dw_mipi_dsi_plat_data rk3288_mipi_dsi_drv_data;
+extern const struct dw_mipi_dsi_plat_data rk3366_mipi_dsi_drv_data;
+extern const struct dw_mipi_dsi_plat_data rk3368_mipi_dsi_drv_data;
+extern const struct dw_mipi_dsi_plat_data rk3399_mipi_dsi_drv_data;
+#endif
+#ifdef CONFIG_DRM_ROCKCHIP_ANALOGIX_DP
+struct rockchip_dp_chip_data;
+extern const struct rockchip_connector_funcs rockchip_analogix_dp_funcs;
+extern const struct rockchip_dp_chip_data rk3399_analogix_edp_drv_data;
+extern const struct rockchip_dp_chip_data rk3368_analogix_edp_drv_data;
+extern const struct rockchip_dp_chip_data rk3288_analogix_dp_drv_data;
+#endif
+#ifdef CONFIG_DRM_ROCKCHIP_LVDS
+struct rockchip_lvds_chip_data;
+extern const struct rockchip_connector_funcs rockchip_lvds_funcs;
+extern const struct rockchip_lvds_chip_data rk3366_lvds_drv_data;
+extern const struct rockchip_lvds_chip_data rk3368_lvds_drv_data;
+extern const struct rockchip_lvds_chip_data rk3288_lvds_drv_data;
+#endif
+#endif
diff --git a/drivers/video/drm/rockchip_crtc.c b/drivers/video/drm/rockchip_crtc.c
new file mode 100644
index 0000000000..b392f92ac7
--- /dev/null
+++ b/drivers/video/drm/rockchip_crtc.c
@@ -0,0 +1,111 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <config.h>
+#include <common.h>
+#include <errno.h>
+#include <malloc.h>
+#include <fdtdec.h>
+#include <fdt_support.h>
+#include <asm/unaligned.h>
+#include <linux/list.h>
+#include <dm/device.h>
+#include <dm.h>
+
+#include "rockchip_display.h"
+#include "rockchip_crtc.h"
+#include "rockchip_connector.h"
+
+static const struct rockchip_crtc rk3036_vop_data = {
+	.funcs = &rockchip_vop_funcs,
+	.data = &rk3036_vop,
+};
+
+static const struct rockchip_crtc rk3288_vop_data = {
+	.funcs = &rockchip_vop_funcs,
+	.data = &rk3288_vop,
+};
+
+static const struct rockchip_crtc rk3368_vop_data = {
+	.funcs = &rockchip_vop_funcs,
+	.data = &rk3368_vop,
+};
+
+static const struct rockchip_crtc rk3366_vop_data = {
+	.funcs = &rockchip_vop_funcs,
+	.data = &rk3366_vop,
+};
+
+static const struct rockchip_crtc rk3399_vop_big_data = {
+	.funcs = &rockchip_vop_funcs,
+	.data = &rk3399_vop_big,
+};
+
+static const struct rockchip_crtc rk3399_vop_lit_data = {
+	.funcs = &rockchip_vop_funcs,
+	.data = &rk3399_vop_lit,
+};
+
+static const struct rockchip_crtc rk322x_vop_data = {
+	.funcs = &rockchip_vop_funcs,
+	.data = &rk322x_vop,
+};
+
+static const struct rockchip_crtc rk3328_vop_data = {
+	.funcs = &rockchip_vop_funcs,
+	.data = &rk3328_vop,
+};
+
+static const struct udevice_id rockchip_vop_ids[] = {
+	{
+		.compatible = "rockchip,rk3036-vop",
+		.data = (ulong)&rk3036_vop_data,
+	}, {
+		.compatible = "rockchip,rk3288-vop",
+		.data = (ulong)&rk3288_vop_data,
+	}, {
+		.compatible = "rockchip,rk3368-vop",
+		.data = (ulong)&rk3368_vop_data,
+	}, {
+		.compatible = "rockchip,rk3366-vop",
+		.data = (ulong)&rk3366_vop_data,
+	}, {
+		.compatible = "rockchip,rk3399-vop-big",
+		.data = (ulong)&rk3399_vop_big_data,
+	}, {
+		.compatible = "rockchip,rk3399-vop-lit",
+		.data = (ulong)&rk3399_vop_lit_data,
+	}, {
+		.compatible = "rockchip,rk322x-vop",
+		.data = (ulong)&rk322x_vop_data,
+	}, {
+		.compatible = "rockchip,rk3328-vop",
+		.data = (ulong)&rk3328_vop_data,
+	}, { }
+};
+
+static int rockchip_vop_probe(struct udevice *dev)
+{
+	return 0;
+}
+
+static int rockchip_vop_bind(struct udevice *dev)
+{
+	return 0;
+}
+
+U_BOOT_DRIVER(rockchip_vop) = {
+	.name	= "rockchip-vop",
+	.id	= UCLASS_VIDEO_CRTC,
+	.of_match = rockchip_vop_ids,
+	.bind	= rockchip_vop_bind,
+	.probe	= rockchip_vop_probe,
+};
+
+UCLASS_DRIVER(rockchip_crtc) = {
+	.id		= UCLASS_VIDEO_CRTC,
+	.name		= "CRTC",
+};
diff --git a/drivers/video/drm/rockchip_crtc.h b/drivers/video/drm/rockchip_crtc.h
new file mode 100644
index 0000000000..087a84cd98
--- /dev/null
+++ b/drivers/video/drm/rockchip_crtc.h
@@ -0,0 +1,36 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _ROCKCHIP_CRTC_H_
+#define _ROCKCHIP_CRTC_H_
+
+struct rockchip_crtc {
+	const struct rockchip_crtc_funcs *funcs;
+	const void *data;
+};
+
+struct rockchip_crtc_funcs {
+	int (*init)(struct display_state *state);
+	void (*deinit)(struct display_state *state);
+	int (*set_plane)(struct display_state *state);
+	int (*prepare)(struct display_state *state);
+	int (*enable)(struct display_state *state);
+	int (*disable)(struct display_state *state);
+	void (*unprepare)(struct display_state *state);
+	int (*fixup_dts)(struct display_state *state, void *blob);
+};
+
+struct vop_data;
+extern const struct rockchip_crtc_funcs rockchip_vop_funcs;
+extern const struct vop_data rk3036_vop;
+extern const struct vop_data rk3288_vop;
+extern const struct vop_data rk3368_vop;
+extern const struct vop_data rk3366_vop;
+extern const struct vop_data rk3399_vop_big;
+extern const struct vop_data rk3399_vop_lit;
+extern const struct vop_data rk322x_vop;
+extern const struct vop_data rk3328_vop;
+#endif
diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
new file mode 100644
index 0000000000..d305e575f0
--- /dev/null
+++ b/drivers/video/drm/rockchip_display.c
@@ -0,0 +1,1029 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <asm/unaligned.h>
+#include <config.h>
+#include <common.h>
+#include <errno.h>
+#include <libfdt.h>
+#include <fdtdec.h>
+#include <fdt_support.h>
+#include <linux/list.h>
+#include <linux/compat.h>
+#include <linux/media-bus-format.h>
+#include <malloc.h>
+#include <video.h>
+#include <dm/device.h>
+#include <dm/uclass-internal.h>
+
+#include "bmp_helper.h"
+#include "rockchip_display.h"
+#include "rockchip_crtc.h"
+#include "rockchip_connector.h"
+#include "rockchip_phy.h"
+#include "rockchip_panel.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+static LIST_HEAD(rockchip_display_list);
+static LIST_HEAD(logo_cache_list);
+
+#define DRM_ROCKCHIP_FB_WIDTH 1920
+#define DRM_ROCKCHIP_FB_HEIGHT 1080
+
+#define MEMORY_POOL_SIZE 32 * 1024 * 1024
+static unsigned long memory_start;
+static unsigned long memory_end;
+
+#ifdef CONFIG_RK_PWM_BL
+extern int rk_pwm_bl_config(int brightness);
+#endif
+
+struct bmp_header *get_bmp_header(const char *bmp_name)
+{
+	printf("%s %d TODO\n", __func__, __LINE__);
+}
+
+int load_bmp_content(const char *logo, void *bmp, int size)
+{
+	printf("%s %d TODO\n", __func__, __LINE__);
+}
+
+static void init_display_buffer(void)
+{
+	memory_start = gd->fb_base;
+	memory_end = memory_start;
+}
+
+static void *get_display_buffer(int size)
+{
+	unsigned long roundup_memory = roundup(memory_end, PAGE_SIZE);
+	void *buf;
+
+	if (roundup_memory + size > memory_start + MEMORY_POOL_SIZE) {
+		printf("failed to alloc %dbyte memory to display\n", size);
+		return NULL;
+	}
+	buf = (void *)roundup_memory;
+
+	memory_end = roundup_memory + size;
+
+	return buf;
+}
+
+static unsigned long get_display_size(void)
+{
+	return memory_end - memory_start;
+}
+
+static bool can_direct_logo(int bpp)
+{
+	return bpp == 24 || bpp == 32;
+}
+
+static int get_panel_node(struct display_state *state, int conn_node)
+{
+	const void *blob = state->blob;
+	int panel, ports, port, ep, remote, ph, nodedepth;
+
+	panel = fdt_subnode_offset(blob, conn_node, "panel");
+	if (panel > 0)
+		return panel;
+
+	ports = fdt_subnode_offset(blob, conn_node, "ports");
+	if (ports < 0)
+		return -ENODEV;
+
+	fdt_for_each_subnode(port, blob, ports) {
+		fdt_for_each_subnode(ep, blob, port) {
+			ph = fdt_getprop_u32_default_node(blob, ep, 0,
+							  "remote-endpoint", 0);
+			if (!ph)
+				continue;
+
+			remote = fdt_node_offset_by_phandle(blob, ph);
+
+			nodedepth = fdt_node_depth(blob, remote);
+			if (nodedepth < 2)
+				continue;
+
+			panel = fdt_supernode_atdepth_offset(blob, remote,
+							     nodedepth - 2,
+							     NULL);
+			break;
+		}
+	}
+
+	return panel;
+}
+
+static int connector_phy_init(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	int conn_node = conn_state->node;
+	const void *blob = state->blob;
+	const struct rockchip_phy *phy;
+	int phy_node, phandle;
+
+	phandle = fdt_getprop_u32_default_node(blob, conn_node, 0,
+					       "phys", -1);
+	if (phandle < 0)
+		return 0;
+
+	phy_node = fdt_node_offset_by_phandle(blob, phandle);
+	if (phy_node < 0) {
+		printf("failed to find phy node\n");
+		return phy_node;
+	}
+
+	phy = rockchip_get_phy(blob, phy_node);
+	if (!phy) {
+		printf("failed to find phy driver\n");
+		return 0;
+	}
+
+	conn_state->phy_node = phy_node;
+
+	if (!phy->funcs || !phy->funcs->init ||
+	    phy->funcs->init(state)) {
+		printf("failed to init phy driver\n");
+		return -EINVAL;
+	}
+
+	conn_state->phy = phy;
+	return 0;
+}
+
+static int connector_panel_init(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct panel_state *panel_state = &state->panel_state;
+	struct udevice *dev;
+	const void *blob = state->blob;
+	int conn_node = conn_state->node;
+	const struct rockchip_panel *panel;
+	int panel_node, dsp_lut_node;
+	int ret, len;
+
+	panel_node = get_panel_node(state, conn_node);
+	if (panel_node < 0) {
+		printf("failed to find panel node\n");
+		return -ENODEV;
+	}
+
+	if (!fdt_device_is_available(blob, panel_node)) {
+		printf("panel is disabled\n");
+		return -ENODEV;
+	}
+
+	dm_scan_fdt_dev(conn_state->dev);
+
+	panel_state->node = panel_node;
+
+	ret = uclass_find_device_by_of_offset(UCLASS_PANEL, panel_node, &dev);
+	if (ret) {
+		printf("Warn: %s: can't find panel driver\n",
+		       fdt_get_name(blob, panel_node, NULL));
+		return -ENODEV;
+	}
+	panel = (const struct rockchip_panel *)dev_get_driver_data(dev);
+	if (!panel) {
+		printf("failed to find panel driver\n");
+		return 0;
+	}
+
+	panel_state->dev = dev;
+	panel_state->panel = panel;
+
+	ret = rockchip_panel_init(state);
+	if (ret) {
+		printf("failed to init panel driver\n");
+		return ret;
+	}
+
+	dsp_lut_node = fdt_subnode_offset(blob, panel_node, "dsp-lut");
+	fdt_getprop(blob, dsp_lut_node, "gamma-lut", &len);
+	if (len > 0) {
+		conn_state->gamma.size  = len / sizeof(u32);
+		conn_state->gamma.lut = malloc(len);
+		if (!conn_state->gamma.lut) {
+			printf("malloc gamma lut failed\n");
+			return -ENOMEM;
+		}
+		if (fdtdec_get_int_array(blob, dsp_lut_node, "gamma-lut",
+					 conn_state->gamma.lut,
+					 conn_state->gamma.size)) {
+			printf("Cannot decode gamma_lut\n");
+			conn_state->gamma.lut = NULL;
+			return -EINVAL;
+		}
+		panel_state->dsp_lut_node = dsp_lut_node;
+	}
+
+	return 0;
+}
+
+int drm_mode_vrefresh(const struct drm_display_mode *mode)
+{
+	int refresh = 0;
+	unsigned int calc_val;
+
+	if (mode->vrefresh > 0) {
+		refresh = mode->vrefresh;
+	} else if (mode->htotal > 0 && mode->vtotal > 0) {
+		int vtotal;
+
+		vtotal = mode->vtotal;
+		/* work out vrefresh the value will be x1000 */
+		calc_val = (mode->clock * 1000);
+		calc_val /= mode->htotal;
+		refresh = (calc_val + vtotal / 2) / vtotal;
+
+		if (mode->flags & DRM_MODE_FLAG_INTERLACE)
+			refresh *= 2;
+		if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
+			refresh /= 2;
+		if (mode->vscan > 1)
+			refresh /= mode->vscan;
+	}
+	return refresh;
+}
+
+static int display_get_timing_from_dts(int panel, const void *blob,
+				       struct drm_display_mode *mode)
+{
+	int timing, phandle, native_mode;
+	int hactive, vactive, pixelclock;
+	int hfront_porch, hback_porch, hsync_len;
+	int vfront_porch, vback_porch, vsync_len;
+	int val, flags = 0;
+
+	timing = fdt_subnode_offset(blob, panel, "display-timings");
+	if (timing < 0)
+		return -ENODEV;
+
+	native_mode = fdt_subnode_offset(blob, timing, "timing");
+	if (native_mode < 0) {
+		phandle = fdt_getprop_u32_default_node(blob, timing, 0,
+						       "native-mode", -1);
+		native_mode = fdt_node_offset_by_phandle_node(blob, timing, phandle);
+		if (native_mode <= 0) {
+			printf("failed to get display timings from DT\n");
+			return -ENXIO;
+		}
+	}
+
+#define FDT_GET_INT(val, name) \
+	val = fdtdec_get_int(blob, native_mode, name, -1); \
+	if (val < 0) { \
+		printf("Can't get %s\n", name); \
+		return -ENXIO; \
+	}
+
+	FDT_GET_INT(hactive, "hactive");
+	FDT_GET_INT(vactive, "vactive");
+	FDT_GET_INT(pixelclock, "clock-frequency");
+	FDT_GET_INT(hsync_len, "hsync-len");
+	FDT_GET_INT(hfront_porch, "hfront-porch");
+	FDT_GET_INT(hback_porch, "hback-porch");
+	FDT_GET_INT(vsync_len, "vsync-len");
+	FDT_GET_INT(vfront_porch, "vfront-porch");
+	FDT_GET_INT(vback_porch, "vback-porch");
+	FDT_GET_INT(val, "hsync-active");
+	flags |= val ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
+	FDT_GET_INT(val, "vsync-active");
+	flags |= val ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
+
+	mode->hdisplay = hactive;
+	mode->hsync_start = mode->hdisplay + hfront_porch;
+	mode->hsync_end = mode->hsync_start + hsync_len;
+	mode->htotal = mode->hsync_end + hback_porch;
+
+	mode->vdisplay = vactive;
+	mode->vsync_start = mode->vdisplay + vfront_porch;
+	mode->vsync_end = mode->vsync_start + vsync_len;
+	mode->vtotal = mode->vsync_end + vback_porch;
+
+	mode->clock = pixelclock / 1000;
+	mode->flags = flags;
+
+	return 0;
+}
+
+static int display_get_timing(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	const struct rockchip_connector *conn = conn_state->connector;
+	const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
+	struct drm_display_mode *mode = &conn_state->mode;
+	const struct drm_display_mode *m;
+	const void *blob = state->blob;
+	int conn_node = conn_state->node;
+	int panel;
+
+	panel = get_panel_node(state, conn_node);
+	if (panel < 0) {
+		printf("failed to find panel node\n");
+		return -ENODEV;
+	}
+
+	if (!display_get_timing_from_dts(panel, blob, mode)) {
+		printf("Using display timing dts\n");
+		goto done;
+	}
+
+	m = rockchip_get_display_mode_from_panel(state);
+	if (m) {
+		printf("Using display timing from compatible panel driver\n");
+		memcpy(mode, m, sizeof(*m));
+		goto done;
+	}
+
+	rockchip_panel_prepare(state);
+
+	if (conn_funcs->get_edid && !conn_funcs->get_edid(state)) {
+		int panel_bits_per_colourp;
+
+		if (!edid_get_drm_mode((void *)&conn_state->edid,
+				     sizeof(conn_state->edid), mode,
+				     &panel_bits_per_colourp)) {
+			printf("Using display timing from edid\n");
+			edid_print_info((void *)&conn_state->edid);
+			goto done;
+		}
+	}
+
+	printf("failed to find display timing\n");
+	return -ENODEV;
+done:
+	printf("Detailed mode clock %u kHz, flags[%x]\n"
+	       "    H: %04d %04d %04d %04d\n"
+	       "    V: %04d %04d %04d %04d\n"
+	       "bus_format: %x\n",
+	       mode->clock, mode->flags,
+	       mode->hdisplay, mode->hsync_start,
+	       mode->hsync_end, mode->htotal,
+	       mode->vdisplay, mode->vsync_start,
+	       mode->vsync_end, mode->vtotal,
+	       conn_state->bus_format);
+
+	return 0;
+}
+
+static int display_init(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	const struct rockchip_connector *conn = conn_state->connector;
+	const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
+	struct crtc_state *crtc_state = &state->crtc_state;
+	const struct rockchip_crtc *crtc = crtc_state->crtc;
+	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
+	int ret = 0;
+
+	if (state->is_init)
+		return 0;
+
+	if (!conn_funcs || !crtc_funcs) {
+		printf("failed to find connector or crtc functions\n");
+		return -ENXIO;
+	}
+
+	if (conn_funcs->init) {
+		ret = conn_funcs->init(state);
+		if (ret)
+			goto deinit_panel;
+	}
+	/*
+	 * support hotplug, but not connect;
+	 */
+	if (conn_funcs->detect) {
+		ret = conn_funcs->detect(state);
+		if (!ret)
+			goto deinit;
+	}
+
+	if (conn_funcs->get_timing) {
+		ret = conn_funcs->get_timing(state);
+		if (ret)
+			goto deinit;
+	} else {
+		ret = display_get_timing(state);
+		if (ret)
+			goto deinit;
+	}
+
+	if (crtc_funcs->init) {
+		ret = crtc_funcs->init(state);
+		if (ret)
+			goto deinit;
+	}
+
+	state->is_init = 1;
+
+	return 0;
+
+deinit:
+	if (conn_funcs->deinit)
+		conn_funcs->deinit(state);
+deinit_panel:
+	rockchip_panel_deinit(state);
+	return ret;
+}
+
+static int display_set_plane(struct display_state *state)
+{
+	struct crtc_state *crtc_state = &state->crtc_state;
+	const struct rockchip_crtc *crtc = crtc_state->crtc;
+	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
+	int ret;
+
+	if (!state->is_init)
+		return -EINVAL;
+
+	if (crtc_funcs->set_plane) {
+		ret = crtc_funcs->set_plane(state);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+static int display_enable(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	const struct rockchip_connector *conn = conn_state->connector;
+	const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
+	struct crtc_state *crtc_state = &state->crtc_state;
+	const struct rockchip_crtc *crtc = crtc_state->crtc;
+	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
+	int ret = 0;
+
+	display_init(state);
+
+	if (!state->is_init)
+		return -EINVAL;
+
+	if (state->is_enable)
+		return 0;
+
+	if (crtc_funcs->prepare) {
+		ret = crtc_funcs->prepare(state);
+		if (ret)
+			return ret;
+	}
+
+	if (conn_funcs->prepare) {
+		ret = conn_funcs->prepare(state);
+		if (ret)
+			goto unprepare_crtc;
+	}
+
+	rockchip_panel_prepare(state);
+
+	if (crtc_funcs->enable) {
+		ret = crtc_funcs->enable(state);
+		if (ret)
+			goto unprepare_conn;
+	}
+
+	if (conn_funcs->enable) {
+		ret = conn_funcs->enable(state);
+		if (ret)
+			goto disable_crtc;
+	}
+
+	rockchip_panel_enable(state);
+
+	state->is_enable = true;
+
+	return 0;
+unprepare_crtc:
+	if (crtc_funcs->unprepare)
+		crtc_funcs->unprepare(state);
+unprepare_conn:
+	if (conn_funcs->unprepare)
+		conn_funcs->unprepare(state);
+disable_crtc:
+	if (crtc_funcs->disable)
+		crtc_funcs->disable(state);
+	return ret;
+}
+
+static int display_disable(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	const struct rockchip_connector *conn = conn_state->connector;
+	const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
+	struct crtc_state *crtc_state = &state->crtc_state;
+	const struct rockchip_crtc *crtc = crtc_state->crtc;
+	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
+
+	if (!state->is_init)
+		return 0;
+
+	if (!state->is_enable)
+		return 0;
+
+	rockchip_panel_disable(state);
+
+	if (crtc_funcs->disable)
+		crtc_funcs->disable(state);
+
+	if (conn_funcs->disable)
+		conn_funcs->disable(state);
+
+	rockchip_panel_unprepare(state);
+
+	if (conn_funcs->unprepare)
+		conn_funcs->unprepare(state);
+
+	state->is_enable = 0;
+	state->is_init = 0;
+
+	return 0;
+}
+
+static int display_logo(struct display_state *state)
+{
+	struct crtc_state *crtc_state = &state->crtc_state;
+	struct connector_state *conn_state = &state->conn_state;
+	struct logo_info *logo = &state->logo;
+	int hdisplay, vdisplay;
+
+	display_init(state);
+	if (!state->is_init)
+		return -ENODEV;
+
+	switch (logo->bpp) {
+	case 16:
+		crtc_state->format = ROCKCHIP_FMT_RGB565;
+		break;
+	case 24:
+		crtc_state->format = ROCKCHIP_FMT_RGB888;
+		break;
+	case 32:
+		crtc_state->format = ROCKCHIP_FMT_ARGB8888;
+		break;
+	default:
+		printf("can't support bmp bits[%d]\n", logo->bpp);
+		return -EINVAL;
+	}
+	crtc_state->rb_swap = logo->bpp != 32;
+	hdisplay = conn_state->mode.hdisplay;
+	vdisplay = conn_state->mode.vdisplay;
+	crtc_state->src_w = logo->width;
+	crtc_state->src_h = logo->height;
+	crtc_state->src_x = 0;
+	crtc_state->src_y = 0;
+	crtc_state->ymirror = logo->ymirror;
+
+	crtc_state->dma_addr = logo->mem + logo->offset;
+	crtc_state->xvir = ALIGN(crtc_state->src_w * logo->bpp, 32) >> 5;
+
+	if (logo->mode == ROCKCHIP_DISPLAY_FULLSCREEN) {
+		crtc_state->crtc_x = 0;
+		crtc_state->crtc_y = 0;
+		crtc_state->crtc_w = hdisplay;
+		crtc_state->crtc_h = vdisplay;
+	} else {
+		if (crtc_state->src_w >= hdisplay) {
+			crtc_state->crtc_x = 0;
+			crtc_state->crtc_w = hdisplay;
+		} else {
+			crtc_state->crtc_x = (hdisplay - crtc_state->src_w) / 2;
+			crtc_state->crtc_w = crtc_state->src_w;
+		}
+
+		if (crtc_state->src_h >= vdisplay) {
+			crtc_state->crtc_y = 0;
+			crtc_state->crtc_h = vdisplay;
+		} else {
+			crtc_state->crtc_y = (vdisplay - crtc_state->src_h) / 2;
+			crtc_state->crtc_h = crtc_state->src_h;
+		}
+	}
+
+	display_set_plane(state);
+	display_enable(state);
+
+	return 0;
+}
+
+static int get_crtc_id(const void *blob, int connect)
+{
+	int phandle, remote;
+	int val;
+
+	phandle = fdt_getprop_u32_default_node(blob, connect, 0,
+					       "remote-endpoint", -1);
+	if (phandle < 0)
+		goto err;
+	remote = fdt_node_offset_by_phandle(blob, phandle);
+
+	val = fdtdec_get_int(blob, remote, "reg", -1);
+	if (val < 0)
+		goto err;
+
+	return val;
+err:
+	printf("Can't get crtc id, default set to id = 0\n");
+	return 0;
+}
+
+static int find_crtc_node(const void *blob, int node)
+{
+	int nodedepth = fdt_node_depth(blob, node);
+
+	if (nodedepth < 2)
+		return -EINVAL;
+
+	return fdt_supernode_atdepth_offset(blob, node,
+					    nodedepth - 2, NULL);
+}
+
+static int find_connector_node(const void *blob, int node)
+{
+	int phandle, remote;
+	int nodedepth;
+
+	phandle = fdt_getprop_u32_default_node(blob, node, 0,
+					       "remote-endpoint", -1);
+	remote = fdt_node_offset_by_phandle(blob, phandle);
+	nodedepth = fdt_node_depth(blob, remote);
+
+	return fdt_supernode_atdepth_offset(blob, remote,
+					    nodedepth - 3, NULL);
+}
+
+struct rockchip_logo_cache *find_or_alloc_logo_cache(const char *bmp)
+{
+	struct rockchip_logo_cache *tmp, *logo_cache = NULL;
+
+	list_for_each_entry(tmp, &logo_cache_list, head) {
+		if (!strcmp(tmp->name, bmp)) {
+			logo_cache = tmp;
+			break;
+		}
+	}
+
+	if (!logo_cache) {
+		logo_cache = malloc(sizeof(*logo_cache));
+		if (!logo_cache) {
+			printf("failed to alloc memory for logo cache\n");
+			return NULL;
+		}
+		memset(logo_cache, 0, sizeof(*logo_cache));
+		strcpy(logo_cache->name, bmp);
+		INIT_LIST_HEAD(&logo_cache->head);
+		list_add_tail(&logo_cache->head, &logo_cache_list);
+	}
+
+	return logo_cache;
+}
+
+static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
+{
+	struct rockchip_logo_cache *logo_cache;
+	struct bmp_header *header;
+	void *dst = NULL, *pdst;
+	int size;
+
+	if (!logo || !bmp_name)
+		return -EINVAL;
+	logo_cache = find_or_alloc_logo_cache(bmp_name);
+	if (!logo_cache)
+		return -ENOMEM;
+
+	if (logo_cache->logo.mem) {
+		memcpy(logo, &logo_cache->logo, sizeof(*logo));
+		return 0;
+	}
+
+	header = get_bmp_header(bmp_name);
+	if (!header)
+		return -EINVAL;
+
+	logo->bpp = get_unaligned_le16(&header->bit_count);
+	logo->width = get_unaligned_le32(&header->width);
+	logo->height = get_unaligned_le32(&header->height);
+	size = get_unaligned_le32(&header->file_size);
+	if (!can_direct_logo(logo->bpp)) {
+		if (size > MEMORY_POOL_SIZE) {
+			printf("failed to use boot buf as temp bmp buffer\n");
+			return -ENOMEM;
+		}
+		pdst = (void *)gd->video_top;
+
+	} else {
+		pdst = get_display_buffer(size);
+		dst = pdst;
+	}
+
+	if (load_bmp_content(bmp_name, pdst, size)) {
+		printf("failed to load bmp %s\n", bmp_name);
+		return 0;
+	}
+
+	if (!can_direct_logo(logo->bpp)) {
+		int dst_size;
+		/*
+		 * TODO: force use 16bpp if bpp less than 16;
+		 */
+		logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp;
+		dst_size = logo->width * logo->height * logo->bpp >> 3;
+
+		dst = get_display_buffer(dst_size);
+		if (!dst)
+			return -ENOMEM;
+		if (bmpdecoder(pdst, dst, logo->bpp)) {
+			printf("failed to decode bmp %s\n", bmp_name);
+			return 0;
+		}
+		logo->offset = 0;
+		logo->ymirror = 0;
+	} else {
+		logo->offset = get_unaligned_le32(&header->data_offset);
+		logo->ymirror = 1;
+	}
+	logo->mem = (u32)(unsigned long)dst;
+
+	memcpy(&logo_cache->logo, logo, sizeof(*logo));
+
+	return 0;
+}
+
+void rockchip_show_fbbase(ulong fbbase)
+{
+	struct display_state *s;
+
+	list_for_each_entry(s, &rockchip_display_list, head) {
+		s->logo.mode = ROCKCHIP_DISPLAY_FULLSCREEN;
+		s->logo.mem = fbbase;
+		s->logo.width = DRM_ROCKCHIP_FB_WIDTH;
+		s->logo.height = DRM_ROCKCHIP_FB_HEIGHT;
+		s->logo.bpp = 32;
+		s->logo.ymirror = 0;
+
+		display_logo(s);
+	}
+}
+
+void rockchip_show_bmp(const char *bmp)
+{
+	struct display_state *s;
+
+	if (!bmp) {
+		list_for_each_entry(s, &rockchip_display_list, head)
+			display_disable(s);
+		return;
+	}
+
+	list_for_each_entry(s, &rockchip_display_list, head) {
+		s->logo.mode = s->charge_logo_mode;
+		if (load_bmp_logo(&s->logo, bmp))
+			continue;
+		display_logo(s);
+	}
+}
+
+void rockchip_show_logo(void)
+{
+	struct display_state *s;
+
+	list_for_each_entry(s, &rockchip_display_list, head) {
+		s->logo.mode = s->logo_mode;
+		if (load_bmp_logo(&s->logo, s->ulogo_name))
+			printf("failed to display uboot logo\n");
+		else
+			display_logo(s);
+		if (load_bmp_logo(&s->logo, s->klogo_name))
+			printf("failed to display kernel logo\n");
+	}
+}
+
+extern const struct rockchip_connector rk3399_mipi_dsi_data;
+static int rockchip_display_probe(struct udevice *dev)
+{
+	struct video_priv *uc_priv = dev_get_uclass_priv(dev);
+	struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
+	const void *blob = gd->fdt_blob;
+	int route, child, phandle, connect, crtc_node, conn_node;
+	struct udevice *crtc_dev, *conn_dev;
+	const struct rockchip_crtc *crtc;
+	const struct rockchip_connector *conn;
+	struct display_state *s;
+	const char *name;
+	int ret;
+
+	/* Before relocation we don't need to do anything */
+	if (!(gd->flags & GD_FLG_RELOC))
+		return 0;
+
+	route = fdt_path_offset(blob, "/display-subsystem/route");
+	if (route < 0) {
+		printf("Can't find display display route node\n");
+		return -ENODEV;
+	}
+
+	if (!fdt_device_is_available(blob, route))
+		return -ENODEV;
+
+	init_display_buffer();
+
+	fdt_for_each_subnode(child, blob, route) {
+		if (!fdt_device_is_available(blob, child))
+			continue;
+
+		phandle = fdt_getprop_u32_default_node(blob, child, 0,
+						       "connect", -1);
+		if (phandle < 0) {
+			printf("Warn: %s: can't find connect node's handle\n",
+			       fdt_get_name(blob, child, NULL));
+			continue;
+		}
+
+		connect = fdt_node_offset_by_phandle(blob, phandle);
+		if (connect < 0) {
+			printf("Warn: %s: can't find connect node\n",
+			       fdt_get_name(blob, child, NULL));
+			continue;
+		}
+
+		crtc_node = find_crtc_node(blob, connect);
+		if (!fdt_device_is_available(blob, crtc_node)) {
+			printf("Warn: %s: crtc node is not available\n",
+			       fdt_get_name(blob, child, NULL));
+			continue;
+		}
+		ret = uclass_find_device_by_of_offset(UCLASS_VIDEO_CRTC, crtc_node, &crtc_dev);
+		if (ret) {
+			printf("Warn: %s: can't find crtc driver\n",
+			       fdt_get_name(blob, child, NULL));
+			continue;
+		}
+
+		crtc = (const struct rockchip_crtc *)dev_get_driver_data(crtc_dev);
+
+		conn_node = find_connector_node(blob, connect);
+		if (!fdt_device_is_available(blob, conn_node)) {
+			printf("Warn: %s: connector node is not available\n",
+			       fdt_get_name(blob, child, NULL));
+			continue;
+		}
+		ret = uclass_find_device_by_of_offset(UCLASS_DISPLAY, conn_node, &conn_dev);
+		if (ret) {
+			printf("Warn: %s: can't find connector driver\n",
+			       fdt_get_name(blob, child, NULL));
+			continue;
+		}
+		conn = (const struct rockchip_connector *)dev_get_driver_data(conn_dev);
+
+		s = malloc(sizeof(*s));
+		if (!s)
+			goto err_free;
+
+		memset(s, 0, sizeof(*s));
+
+		INIT_LIST_HEAD(&s->head);
+		s->klogo_name = fdt_stringlist_get(blob, child, "logo,kernel", 0, NULL);
+		name = fdt_stringlist_get(blob, child, "logo,mode", 0, NULL);
+		if (!strcmp(name, "fullscreen"))
+			s->logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN;
+		else
+			s->logo_mode = ROCKCHIP_DISPLAY_CENTER;
+		name = fdt_stringlist_get(blob, child, "charge_logo,mode", 0, NULL);
+		if (!strcmp(name, "fullscreen"))
+			s->charge_logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN;
+		else
+			s->charge_logo_mode = ROCKCHIP_DISPLAY_CENTER;
+
+		s->blob = blob;
+		s->conn_state.node = conn_node;
+		s->conn_state.dev = conn_dev;
+		s->conn_state.connector = conn;
+		s->crtc_state.node = crtc_node;
+		s->crtc_state.dev = crtc_dev;
+		s->crtc_state.crtc = crtc;
+		s->crtc_state.crtc_id = get_crtc_id(blob, connect);
+		s->node = child;
+
+		connector_phy_init(s);
+		connector_panel_init(s);
+		list_add_tail(&s->head, &rockchip_display_list);
+	}
+
+	uc_priv->xsize = DRM_ROCKCHIP_FB_WIDTH;
+	uc_priv->ysize = DRM_ROCKCHIP_FB_HEIGHT;
+	uc_priv->bpix = VIDEO_BPP32;
+
+	rockchip_show_fbbase(plat->base);
+	video_set_flush_dcache(dev, true);
+
+	return 0;
+
+err_free:
+	list_for_each_entry(s, &rockchip_display_list, head) {
+		list_del(&s->head);
+		free(s);
+	}
+	return -ENODEV;
+}
+#if 0
+void rockchip_display_fixup(void *blob)
+{
+	const struct rockchip_connector_funcs *conn_funcs;
+	const struct rockchip_crtc_funcs *crtc_funcs;
+	const struct rockchip_connector *conn;
+	const struct rockchip_crtc *crtc;
+	struct display_state *s;
+	u32 offset;
+	int node;
+	char path[100];
+	int ret;
+
+	if (!get_display_size())
+		return;
+
+	node = fdt_update_reserved_memory(blob, "rockchip,drm-logo",
+					       (u64)memory_start,
+					       (u64)get_display_size());
+	if (node < 0) {
+		printf("failed to add drm-loader-logo memory\n");
+		return;
+	}
+
+	list_for_each_entry(s, &rockchip_display_list, head) {
+		conn = s->conn_state.connector;
+		if (!conn)
+			continue;
+		conn_funcs = conn->funcs;
+		if (!conn_funcs) {
+			printf("failed to get exist connector\n");
+			continue;
+		}
+
+		crtc = s->crtc_state.crtc;
+		if (!crtc)
+			continue;
+
+		crtc_funcs = crtc->funcs;
+		if (!crtc_funcs) {
+			printf("failed to get exist crtc\n");
+			continue;
+		}
+
+		if (crtc_funcs->fixup_dts)
+			crtc_funcs->fixup_dts(s, blob);
+
+		if (conn_funcs->fixup_dts)
+			conn_funcs->fixup_dts(s, blob);
+
+		ret = fdt_get_path(s->blob, s->node, path, sizeof(path));
+		if (ret < 0) {
+			printf("failed to get route path[%s], ret=%d\n",
+			       path, ret);
+			continue;
+		}
+
+#define FDT_SET_U32(name, val) \
+		do_fixup_by_path_u32(blob, path, name, val, 1);
+
+		offset = s->logo.offset + s->logo.mem - memory_start;
+		FDT_SET_U32("logo,offset", offset);
+		FDT_SET_U32("logo,width", s->logo.width);
+		FDT_SET_U32("logo,height", s->logo.height);
+		FDT_SET_U32("logo,bpp", s->logo.bpp);
+		FDT_SET_U32("logo,ymirror", s->logo.ymirror);
+		FDT_SET_U32("video,hdisplay", s->conn_state.mode.hdisplay);
+		FDT_SET_U32("video,vdisplay", s->conn_state.mode.vdisplay);
+		FDT_SET_U32("video,vrefresh",
+			    drm_mode_vrefresh(&s->conn_state.mode));
+#undef FDT_SET_U32
+	}
+}
+#endif
+
+int rockchip_display_bind(struct udevice *dev)
+{
+	struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
+
+	plat->size = 4 * DRM_ROCKCHIP_FB_WIDTH * DRM_ROCKCHIP_FB_HEIGHT;
+
+	return 0;
+}
+
+static const struct udevice_id rockchip_display_ids[] = {
+	{ .compatible = "rockchip,display-subsystem" },
+	{ }
+};
+
+U_BOOT_DRIVER(rockchip_display) = {
+	.name	= "rockchip_display",
+	.id	= UCLASS_VIDEO,
+	.of_match = rockchip_display_ids,
+	.bind	= rockchip_display_bind,
+	.probe	= rockchip_display_probe,
+};
diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
new file mode 100644
index 0000000000..c80a76f4d5
--- /dev/null
+++ b/drivers/video/drm/rockchip_display.h
@@ -0,0 +1,133 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _ROCKCHIP_DISPLAY_H
+#define _ROCKCHIP_DISPLAY_H
+
+#include <bmp_layout.h>
+#include <drm_modes.h>
+#include <edid.h>
+
+#define ROCKCHIP_OUTPUT_DSI_DUAL_CHANNEL	BIT(0)
+#define ROCKCHIP_OUTPUT_DSI_DUAL_LINK		BIT(1)
+
+enum data_format {
+	ROCKCHIP_FMT_ARGB8888 = 0,
+	ROCKCHIP_FMT_RGB888,
+	ROCKCHIP_FMT_RGB565,
+	ROCKCHIP_FMT_YUV420SP = 4,
+	ROCKCHIP_FMT_YUV422SP,
+	ROCKCHIP_FMT_YUV444SP,
+};
+
+enum display_mode {
+	ROCKCHIP_DISPLAY_FULLSCREEN,
+	ROCKCHIP_DISPLAY_CENTER,
+};
+
+/*
+ * display output interface supported by rockchip lcdc
+ */
+#define ROCKCHIP_OUT_MODE_P888	0
+#define ROCKCHIP_OUT_MODE_P666	1
+#define ROCKCHIP_OUT_MODE_P565	2
+/* for use special outface */
+#define ROCKCHIP_OUT_MODE_AAAA	15
+
+struct crtc_state {
+	struct udevice *dev;
+	const struct rockchip_crtc *crtc;
+	void *private;
+	int node;
+	int crtc_id;
+
+	int format;
+	u32 dma_addr;
+	int ymirror;
+	int rb_swap;
+	int xvir;
+	int src_x;
+	int src_y;
+	int src_w;
+	int src_h;
+	int crtc_x;
+	int crtc_y;
+	int crtc_w;
+	int crtc_h;
+};
+
+struct panel_state {
+	struct udevice *dev;
+	int node;
+	int dsp_lut_node;
+
+	const struct rockchip_panel *panel;
+	void *private;
+};
+
+struct connector_state {
+	struct udevice *dev;
+	const struct rockchip_connector *connector;
+	const struct rockchip_phy *phy;
+	int node;
+	int phy_node;
+
+	void *private;
+	void *phy_private;
+
+	struct drm_display_mode mode;
+	u8 edid[EDID_SIZE * 4];
+	int bus_format;
+	int output_mode;
+	int type;
+	int output_type;
+
+	struct {
+		u32 *lut;
+		int size;
+	} gamma;
+};
+
+struct logo_info {
+	int mode;
+	char *mem;
+	bool ymirror;
+	u32 offset;
+	u32 width;
+	u32 height;
+	u32 bpp;
+};
+
+struct rockchip_logo_cache {
+	struct list_head head;
+	char name[20];
+	struct logo_info logo;
+};
+
+struct display_state {
+	struct list_head head;
+	const void *blob;
+	int node;
+	const char *ulogo_name;
+	const char *klogo_name;
+	int logo_mode;
+	int charge_logo_mode;
+	struct bmp_image *ubmp;
+	struct bmp_image *kbmp;
+	void *mem_base;
+	int mem_size;
+	struct logo_info logo;
+	struct crtc_state crtc_state;
+	struct connector_state conn_state;
+	struct panel_state panel_state;
+	int enable;
+	int is_init;
+	int is_enable;
+};
+
+int drm_mode_vrefresh(const struct drm_display_mode *mode);
+
+#endif
diff --git a/drivers/video/drm/rockchip_dsi_panel.c b/drivers/video/drm/rockchip_dsi_panel.c
new file mode 100644
index 0000000000..96ef2e9eb7
--- /dev/null
+++ b/drivers/video/drm/rockchip_dsi_panel.c
@@ -0,0 +1,384 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <config.h>
+#include <common.h>
+#include <errno.h>
+#include <malloc.h>
+#include <fdtdec.h>
+#include <fdt_support.h>
+#include <asm/unaligned.h>
+#include <linux/list.h>
+#include <linux/media-bus-format.h>
+#include <dm/uclass.h>
+#include <dm/uclass-id.h>
+#include <video.h>
+#include <dm/device.h>
+#include <dm/uclass-internal.h>
+#include <backlight.h>
+#include <asm/gpio.h>
+
+#include "rockchip_display.h"
+#include "rockchip_crtc.h"
+#include "rockchip_connector.h"
+#include "rockchip_panel.h"
+#include "rockchip_mipi_dsi.h"
+
+#define msleep(a)	udelay(a * 1000)
+
+struct dsi_ctrl_hdr {
+	u8 dtype;	/* data type */
+	u8 wait;	/* ms */
+	u8 dlen;	/* payload len */
+} __packed;
+
+struct dsi_cmd_desc {
+	struct dsi_ctrl_hdr dchdr;
+	u8 *payload;
+};
+
+struct dsi_panel_cmds {
+	u8 *buf;
+	int blen;
+	struct dsi_cmd_desc *cmds;
+	int cmd_cnt;
+};
+
+struct rockchip_dsi_panel {
+	struct udevice *dev;
+	const void *blob;
+	int node;
+
+	int bus_format;
+
+	struct udevice *backlight;
+	struct gpio_desc enable;
+	struct gpio_desc reset;
+
+	unsigned int delay_reset;
+	unsigned int delay_prepare;
+	unsigned int delay_unprepare;
+	unsigned int delay_enable;
+	unsigned int delay_disable;
+	unsigned int delay_init;
+
+	struct dsi_panel_cmds *on_cmds;
+	struct dsi_panel_cmds *off_cmds;
+};
+
+static int rockchip_dsi_panel_parse_cmds(const void *blob, int node,
+					 const u8 *data, int blen,
+					 struct dsi_panel_cmds *pcmds)
+{
+	int len;
+	u8 *buf, *bp;
+	struct dsi_ctrl_hdr *dchdr;
+	int i, cnt;
+
+	if (!pcmds)
+		return -EINVAL;
+
+	buf = malloc(sizeof(char) * blen);
+	if (!buf)
+		return -ENOMEM;
+
+	memcpy(buf, data, blen);
+
+	/* scan dcs commands */
+	bp = buf;
+	len = blen;
+	cnt = 0;
+	while (len > sizeof(*dchdr)) {
+		dchdr = (struct dsi_ctrl_hdr *)bp;
+		if (dchdr->dlen > len) {
+			printf("%s: dtsi cmd=%x error, len=%d",
+			       __func__, dchdr->dtype, dchdr->dlen);
+			free(buf);
+			return -ENOMEM;
+		}
+
+		bp += sizeof(*dchdr);
+		len -= sizeof(*dchdr);
+		bp += dchdr->dlen;
+		len -= dchdr->dlen;
+		cnt++;
+	}
+
+	if (len != 0) {
+		printf("%s: dcs_cmd=%x len=%d error!", __func__, buf[0], blen);
+		free(buf);
+		return -ENOMEM;
+	}
+
+	pcmds->cmds = malloc(cnt * sizeof(struct dsi_cmd_desc));
+	if (!pcmds->cmds) {
+		free(buf);
+		return -ENOMEM;
+	}
+
+	pcmds->cmd_cnt = cnt;
+	pcmds->buf = buf;
+	pcmds->blen = blen;
+
+	bp = buf;
+	len = blen;
+	for (i = 0; i < cnt; i++) {
+		dchdr = (struct dsi_ctrl_hdr *)bp;
+		len -= sizeof(*dchdr);
+		bp += sizeof(*dchdr);
+		pcmds->cmds[i].dchdr = *dchdr;
+		pcmds->cmds[i].payload = bp;
+		bp += dchdr->dlen;
+		len -= dchdr->dlen;
+	}
+
+	debug("%s: total_len=%d, cmd_cnt=%d\n",
+	      __func__, pcmds->blen, pcmds->cmd_cnt);
+	return 0;
+}
+
+static int rockchip_dsi_panel_send_cmds(struct display_state *state,
+					struct dsi_panel_cmds *cmds)
+{
+	int i, ret;
+
+	if (!cmds)
+		return -EINVAL;
+
+	for (i = 0; i < cmds->cmd_cnt; i++) {
+		switch (cmds->cmds[i].dchdr.dtype) {
+		case MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM:
+		case MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM:
+		case MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM:
+		case MIPI_DSI_GENERIC_LONG_WRITE:
+			ret = mipi_dsi_generic_write(state, cmds->cmds[i].payload,
+						     cmds->cmds[i].dchdr.dlen);
+			break;
+		case MIPI_DSI_DCS_SHORT_WRITE:
+		case MIPI_DSI_DCS_SHORT_WRITE_PARAM:
+		case MIPI_DSI_DCS_LONG_WRITE:
+			ret = mipi_dsi_dcs_write(state, cmds->cmds[i].payload,
+						 cmds->cmds[i].dchdr.dlen);
+			break;
+		default:
+			return -EINVAL;
+		}
+
+		if (ret)
+			printf("failed to write cmd%d: %d\n", i, ret);
+
+		if (cmds->cmds[i].dchdr.wait)
+			msleep(cmds->cmds[i].dchdr.wait);
+	}
+
+	return 0;
+}
+
+static int rockchip_dsi_panel_prepare(struct display_state *state)
+{
+	struct panel_state *panel_state = &state->panel_state;
+	struct rockchip_dsi_panel *panel = panel_state->private;
+	int ret;
+
+	dm_gpio_set_value(&panel->enable, 1);
+	msleep(panel->delay_prepare);
+
+	dm_gpio_set_value(&panel->reset, 1);
+	msleep(panel->delay_reset);
+	dm_gpio_set_value(&panel->reset, 0);
+
+	msleep(panel->delay_init);
+
+	if (panel->on_cmds) {
+		ret = rockchip_dsi_panel_send_cmds(state, panel->on_cmds);
+		if (ret)
+			printf("failed to send on cmds: %d\n", ret);
+	}
+
+	return 0;
+}
+
+static int rockchip_dsi_panel_unprepare(struct display_state *state)
+{
+	struct panel_state *panel_state = &state->panel_state;
+	struct rockchip_dsi_panel *panel = panel_state->private;
+	int ret;
+
+	if (panel->off_cmds) {
+		ret = rockchip_dsi_panel_send_cmds(state, panel->off_cmds);
+		if (ret)
+			printf("failed to send on cmds: %d\n", ret);
+	}
+
+	dm_gpio_set_value(&panel->reset, 0);
+
+	mdelay(panel->delay_unprepare);
+
+	dm_gpio_set_value(&panel->enable, 0);
+
+	return 0;
+}
+
+static int rockchip_dsi_panel_enable(struct display_state *state)
+{
+	struct panel_state *panel_state = &state->panel_state;
+	struct rockchip_dsi_panel *panel = panel_state->private;
+
+	msleep(panel->delay_enable);
+
+	return backlight_enable(panel->backlight);
+}
+
+static int rockchip_dsi_panel_disable(struct display_state *state)
+{
+	struct panel_state *panel_state = &state->panel_state;
+	struct rockchip_dsi_panel *panel = panel_state->private;
+
+	/* TODO: backlight_disable:
+	 * presently uboot not support backlight disable.
+	 */
+
+	return 0;
+}
+
+static int rockchip_dsi_panel_parse_dt(const void *blob, int node, struct rockchip_dsi_panel *panel)
+{
+	const void *data;
+	int len = 0;
+	int ret = 0;
+
+	panel->delay_prepare = fdtdec_get_int(blob, node, "prepare-delay-ms", 0);
+	panel->delay_unprepare = fdtdec_get_int(blob, node, "unprepare-delay-ms", 0);
+	panel->delay_enable = fdtdec_get_int(blob, node, "enable-delay-ms", 0);
+	panel->delay_disable = fdtdec_get_int(blob, node, "disable-delay-ms", 0);
+	panel->delay_init = fdtdec_get_int(blob, node, "init-delay-ms", 0);
+	panel->delay_reset = fdtdec_get_int(blob, node, "reset-delay-ms", 0);
+	panel->bus_format = fdtdec_get_int(blob, node, "bus-format", MEDIA_BUS_FMT_RBG888_1X24);
+
+	data = fdt_getprop(blob, node, "panel-init-sequence", &len);
+	if (data) {
+		panel->on_cmds = malloc(sizeof(*panel->on_cmds));
+		if (!panel->on_cmds)
+			return -ENOMEM;
+
+		ret = rockchip_dsi_panel_parse_cmds(blob, node, data, len,
+						    panel->on_cmds);
+		if (ret) {
+			printf("failed to parse panel init sequence\n");
+			goto free_on_cmds;
+		}
+	}
+
+	data = fdt_getprop(blob, node, "panel-exit-sequence", &len);
+	if (data) {
+		panel->off_cmds = malloc(sizeof(*panel->off_cmds));
+		if (!panel->off_cmds) {
+			ret = -ENOMEM;
+			goto free_on_cmds;
+		}
+
+		ret = rockchip_dsi_panel_parse_cmds(blob, node, data, len,
+						    panel->off_cmds);
+		if (ret) {
+			printf("failed to parse panel exit sequence\n");
+			goto free_cmds;
+		}
+	}
+
+	ret = uclass_get_device_by_phandle(UCLASS_PANEL_BACKLIGHT, panel->dev,
+					   "backlight", &panel->backlight);
+	if (ret) {
+		printf("%s: Cannot get backlight: ret=%d\n", __func__, ret);
+		return ret;
+	}
+
+	ret = gpio_request_by_name(panel->dev, "enable-gpios", 0,
+				   &panel->enable, GPIOD_IS_OUT);
+	if (ret != -ENOENT) {
+		printf("%s: Warning: cannot get enable GPIO: ret=%d\n",
+		      __func__, ret);
+		return ret;
+	}
+
+	ret = gpio_request_by_name(panel->dev, "reset-gpios", 0,
+				   &panel->enable, GPIOD_IS_OUT);
+	if (ret != -ENOENT) {
+		printf("%s: Warning: cannot get reset GPIO: ret=%d\n",
+		      __func__, ret);
+		return ret;
+	}
+
+	/* keep panel blank on init. */
+	dm_gpio_set_value(&panel->enable, 0);
+	dm_gpio_set_value(&panel->reset, 0);
+
+	return 0;
+
+free_cmds:
+	free(panel->off_cmds);
+free_on_cmds:
+	free(panel->on_cmds);
+	return ret;
+}
+
+static int rockchip_dsi_panel_init(struct display_state *state)
+{
+	const void *blob = state->blob;
+	struct connector_state *conn_state = &state->conn_state;
+	struct panel_state *panel_state = &state->panel_state;
+	int node = panel_state->node;
+	struct rockchip_dsi_panel *panel;
+	int ret;
+
+	panel = malloc(sizeof(*panel));
+	if (!panel)
+		return -ENOMEM;
+
+	memset(panel, 0, sizeof(*panel));
+
+	panel->blob = blob;
+	panel->node = node;
+	panel->dev = panel_state->dev;
+	panel_state->private = panel;
+
+	ret = rockchip_dsi_panel_parse_dt(blob, node, panel);
+	if (ret) {
+		printf("%s: failed to parse DT\n", __func__);
+		free(panel);
+		return ret;
+	}
+
+	conn_state->bus_format = panel->bus_format;
+
+	return 0;
+}
+
+static void rockchip_dsi_panel_deinit(struct display_state *state)
+{
+	struct panel_state *panel_state = &state->panel_state;
+	struct rockchip_dsi_panel *panel = panel_state->private;
+
+	if (panel->on_cmds) {
+		free(panel->on_cmds->buf);
+		free(panel->on_cmds->cmds);
+	}
+
+	if (panel->off_cmds) {
+		free(panel->off_cmds->buf);
+		free(panel->off_cmds->cmds);
+	}
+
+	free(panel);
+}
+
+const struct rockchip_panel_funcs rockchip_dsi_panel_funcs = {
+	.init		= rockchip_dsi_panel_init,
+	.deinit		= rockchip_dsi_panel_deinit,
+	.prepare	= rockchip_dsi_panel_prepare,
+	.unprepare	= rockchip_dsi_panel_unprepare,
+	.enable		= rockchip_dsi_panel_enable,
+	.disable	= rockchip_dsi_panel_disable,
+};
diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
new file mode 100644
index 0000000000..85e5e85be9
--- /dev/null
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -0,0 +1,639 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <config.h>
+#include <common.h>
+#include <errno.h>
+#include <malloc.h>
+#include <fdtdec.h>
+#include <fdt_support.h>
+#include <asm/unaligned.h>
+#include <linux/list.h>
+#include <asm/io.h>
+#include <dm/device.h>
+#include <syscon.h>
+#include <asm/arch-rockchip/clock.h>
+#include <asm/gpio.h>
+
+
+#include "rockchip_display.h"
+#include "rockchip_crtc.h"
+#include "rockchip_connector.h"
+#include "rockchip_lvds.h"
+
+enum rockchip_lvds_sub_devtype {
+	RK3288_LVDS,
+	RK3366_LVDS,
+	RK3368_LVDS,
+};
+
+struct rockchip_lvds_chip_data {
+	u32	chip_type;
+	bool	has_vop_sel;
+	u32	grf_soc_con5;
+	u32	grf_soc_con6;
+	u32	grf_soc_con7;
+	u32	grf_soc_con15;
+	u32	grf_gpio1d_iomux;
+};
+
+struct rockchip_lvds_device {
+	u32	regbase;
+	void	*grf;
+	u32	ctrl_reg;
+	u32	channel;
+	u32	output;
+	u32	format;
+	struct drm_display_mode *mode;
+	const struct rockchip_lvds_chip_data *pdata;
+};
+
+static inline int lvds_name_to_format(const char *s)
+{
+	if (!s)
+		return -EINVAL;
+
+	if (strncmp(s, "jeida", 6) == 0)
+		return LVDS_FORMAT_JEIDA;
+	else if (strncmp(s, "vesa", 5) == 0)
+		return LVDS_FORMAT_VESA;
+
+	return -EINVAL;
+}
+
+static inline int lvds_name_to_output(const char *s)
+{
+	if (!s)
+		return -EINVAL;
+
+	if (strncmp(s, "rgb", 3) == 0)
+		return DISPLAY_OUTPUT_RGB;
+	else if (strncmp(s, "lvds", 4) == 0)
+		return DISPLAY_OUTPUT_LVDS;
+	else if (strncmp(s, "duallvds", 8) == 0)
+		return DISPLAY_OUTPUT_DUAL_LVDS;
+
+	return -EINVAL;
+}
+
+static inline void lvds_writel(struct rockchip_lvds_device *lvds,
+			      u32 offset, u32 val)
+{
+	writel(val, lvds->regbase + offset);
+
+	if ((lvds->pdata->chip_type == RK3288_LVDS) &&
+	    (lvds->output == DISPLAY_OUTPUT_DUAL_LVDS))
+		writel(val, lvds->regbase + offset + 0x100);
+}
+
+static inline void lvds_msk_reg(struct rockchip_lvds_device *lvds, u32 offset,
+			       u32 msk, u32 val)
+{
+	u32 temp;
+
+	temp = readl(lvds->regbase + offset) & (0xFF - (msk));
+	writel(temp | ((val) & (msk)), lvds->regbase + offset);
+}
+
+static inline u32 lvds_readl(struct rockchip_lvds_device *lvds, u32 offset)
+{
+	return readl(lvds->regbase + offset);
+}
+
+static inline void lvds_ctrl_writel(struct rockchip_lvds_device *lvds,
+				   u32 offset, u32 val)
+{
+	writel(val, lvds->ctrl_reg + offset);
+}
+
+static inline u32 lvds_pmugrf_readl(u32 offset)
+{
+	return readl(LVDS_PMUGRF_BASE + offset);
+}
+
+static inline void lvds_pmugrf_writel(u32 offset, u32 val)
+{
+	writel(val, LVDS_PMUGRF_BASE + offset);
+}
+
+static inline u32 lvds_phy_lock(struct rockchip_lvds_device *lvds)
+{
+	u32 val = 0;
+	val = readl(lvds->ctrl_reg + 0x10);
+	val &= 0x1;
+	return val;
+}
+
+static int rockchip_lvds_clk_enable(struct rockchip_lvds_device *lvds)
+{
+	return 0;
+}
+
+const struct rockchip_lvds_chip_data rk3366_lvds_drv_data = {
+	.chip_type = RK3366_LVDS,
+	.grf_soc_con7  = RK3366_GRF_SOC_CON5,
+	.grf_soc_con15 = RK3366_GRF_SOC_CON6,
+	.has_vop_sel = true,
+};
+
+const struct rockchip_lvds_chip_data rk3368_lvds_drv_data = {
+	.chip_type = RK3368_LVDS,
+	.grf_soc_con7  = RK3368_GRF_SOC_CON7,
+	.grf_soc_con15 = RK3368_GRF_SOC_CON15,
+	.has_vop_sel = false,
+};
+
+const struct rockchip_lvds_chip_data rk3288_lvds_drv_data = {
+	.chip_type = RK3288_LVDS,
+	.has_vop_sel = true,
+	.grf_soc_con6 = 0x025c,
+	.grf_soc_con7 = 0x0260,
+	.grf_gpio1d_iomux = 0x000c,
+};
+
+static int rk336x_lvds_pwr_off(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct rockchip_lvds_device *lvds = conn_state->private;
+
+	/* disable lvds lane and power off pll */
+	lvds_writel(lvds, MIPIPHY_REGEB,
+		    v_LANE0_EN(0) | v_LANE1_EN(0) | v_LANE2_EN(0) |
+		    v_LANE3_EN(0) | v_LANECLK_EN(0) | v_PLL_PWR_OFF(1));
+
+	/* power down lvds pll and bandgap */
+	lvds_msk_reg(lvds, MIPIPHY_REG1,
+		     m_SYNC_RST | m_LDO_PWR_DOWN | m_PLL_PWR_DOWN,
+		     v_SYNC_RST(1) | v_LDO_PWR_DOWN(1) | v_PLL_PWR_DOWN(1));
+
+	/* disable lvds */
+	lvds_msk_reg(lvds, MIPIPHY_REGE3, m_LVDS_EN | m_TTL_EN,
+		     v_LVDS_EN(0) | v_TTL_EN(0));
+
+	return 0;
+}
+
+static int rk3288_lvds_pwr_off(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct rockchip_lvds_device *lvds = conn_state->private;
+
+	lvds_writel(lvds, RK3288_LVDS_CFG_REG21, RK3288_LVDS_CFG_REG21_TX_DISABLE);
+	lvds_writel(lvds, RK3288_LVDS_CFG_REGC, RK3288_LVDS_CFG_REGC_PLL_DISABLE);
+
+	writel(0xffff8000, lvds->grf + lvds->pdata->grf_soc_con7);
+
+	return 0;
+}
+
+static int rk336x_lvds_pwr_on(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct rockchip_lvds_device *lvds = conn_state->private;
+	u32 delay_times = 20;
+
+	if (lvds->output == DISPLAY_OUTPUT_LVDS) {
+		/* set VOCM 900 mv and V-DIFF 350 mv */
+		lvds_msk_reg(lvds, MIPIPHY_REGE4, m_VOCM | m_DIFF_V,
+			     v_VOCM(0) | v_DIFF_V(2));
+		/* power up lvds pll and ldo */
+		lvds_msk_reg(lvds, MIPIPHY_REG1,
+			     m_SYNC_RST | m_LDO_PWR_DOWN | m_PLL_PWR_DOWN,
+			     v_SYNC_RST(0) | v_LDO_PWR_DOWN(0) |
+			     v_PLL_PWR_DOWN(0));
+		/* enable lvds lane and power on pll */
+		lvds_writel(lvds, MIPIPHY_REGEB,
+			    v_LANE0_EN(1) | v_LANE1_EN(1) | v_LANE2_EN(1) |
+			    v_LANE3_EN(1) | v_LANECLK_EN(1) | v_PLL_PWR_OFF(0));
+
+		/* enable lvds */
+		lvds_msk_reg(lvds, MIPIPHY_REGE3,
+			     m_MIPI_EN | m_LVDS_EN | m_TTL_EN,
+			     v_MIPI_EN(0) | v_LVDS_EN(1) | v_TTL_EN(0));
+	} else {
+		lvds_msk_reg(lvds, MIPIPHY_REGE3,
+			     m_MIPI_EN | m_LVDS_EN | m_TTL_EN,
+			     v_MIPI_EN(0) | v_LVDS_EN(0) | v_TTL_EN(1));
+	}
+	/* delay for waitting pll lock on */
+	while (delay_times--) {
+		if (lvds_phy_lock(lvds))
+			break;
+		udelay(100);
+	}
+
+	if (delay_times <= 0)
+		printf("wait lvds phy lock failed, please check the hardware!\n");
+
+	return 0;
+}
+
+
+static void rk336x_output_ttl(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct rockchip_lvds_device *lvds = conn_state->private;
+	u32 val = 0;
+
+	/* iomux to lcdc */
+	if (lvds->pdata->chip_type == RK3368_LVDS) {
+		/* lcdc data 11 10 */
+		lvds_pmugrf_writel(0x04, 0xf0005000);
+		/* lcdc data 12 13 14 15 16 17 18 19 */
+		lvds_pmugrf_writel(0x08, 0xFFFF5555);
+		/* lcdc data 20 21 22 23 HSYNC VSYNC DEN DCLK */
+		lvds_pmugrf_writel(0x0c, 0xFFFF5555);
+		/* set clock lane enable */
+		lvds_ctrl_writel(lvds, 0x0, 0x4);
+	} else {
+		/* lcdc data 15 ... 10, vsync, hsync */
+		lvds_pmugrf_writel(0x0c, 0xffff555a);
+		/* lcdc data 23 ... 16 */
+		lvds_pmugrf_writel(0x30, 0xffff5555);
+		/* lcdc dclk, den */
+		lvds_pmugrf_writel(0x34, 0x000f0005);
+	}
+
+	/* enable lvds mode */
+	val = v_RK336X_LVDSMODE_EN(0) | v_RK336X_MIPIPHY_TTL_EN(1) |
+		v_RK336X_MIPIPHY_LANE0_EN(1) |
+		v_RK336X_MIPIDPI_FORCEX_EN(1);
+	writel(val, lvds->grf + lvds->pdata->grf_soc_con7);
+	val = v_RK336X_FORCE_JETAG(0);
+	writel(val, lvds->grf + lvds->pdata->grf_soc_con15);
+
+	/* enable lane */
+	lvds_writel(lvds, MIPIPHY_REG0, 0x7f);
+	val = v_LANE0_EN(1) | v_LANE1_EN(1) | v_LANE2_EN(1) | v_LANE3_EN(1) |
+		v_LANECLK_EN(1) | v_PLL_PWR_OFF(1);
+	lvds_writel(lvds, MIPIPHY_REGEB, val);
+
+	/* set ttl mode and reset phy config */
+	val = v_LVDS_MODE_EN(0) | v_TTL_MODE_EN(1) | v_MIPI_MODE_EN(0) |
+		v_MSB_SEL(1) | v_DIG_INTER_RST(1);
+	lvds_writel(lvds, MIPIPHY_REGE0, val);
+
+	rk336x_lvds_pwr_on(state);
+}
+
+static void rk336x_output_lvds(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct rockchip_lvds_device *lvds = conn_state->private;
+	u32 val = 0;
+
+	/* enable lvds mode */
+	val |= v_RK336X_LVDSMODE_EN(1) | v_RK336X_MIPIPHY_TTL_EN(0);
+	/* config lvds_format */
+	val |= v_RK336X_LVDS_OUTPUT_FORMAT(lvds->format);
+	/* LSB receive mode */
+	val |= v_RK336X_LVDS_MSBSEL(LVDS_MSB_D7);
+	val |= v_RK336X_MIPIPHY_LANE0_EN(1) |
+	       v_RK336X_MIPIDPI_FORCEX_EN(1);
+	writel(val, lvds->grf + lvds->pdata->grf_soc_con7);
+	/* digital internal disable */
+	lvds_msk_reg(lvds, MIPIPHY_REGE1, m_DIG_INTER_EN, v_DIG_INTER_EN(0));
+
+	/* set pll prediv and fbdiv */
+	lvds_writel(lvds, MIPIPHY_REG3, v_PREDIV(2) | v_FBDIV_MSB(0));
+	lvds_writel(lvds, MIPIPHY_REG4, v_FBDIV_LSB(28));
+
+	lvds_writel(lvds, MIPIPHY_REGE8, 0xfc);
+
+	/* set lvds mode and reset phy config */
+	lvds_msk_reg(lvds, MIPIPHY_REGE0,
+		     m_MSB_SEL | m_DIG_INTER_RST,
+		     v_MSB_SEL(1) | v_DIG_INTER_RST(1));
+
+	rk336x_lvds_pwr_on(state);
+	lvds_msk_reg(lvds, MIPIPHY_REGE1, m_DIG_INTER_EN, v_DIG_INTER_EN(1));
+}
+
+static int rk3288_lvds_pwr_on(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct rockchip_lvds_device *lvds = conn_state->private;
+	struct drm_display_mode *mode = &conn_state->mode;
+	u32 val;
+	u32 h_bp = mode->htotal - mode->hsync_start;
+	u8 pin_hsync = (mode->flags & DRM_MODE_FLAG_PHSYNC) ? 1 : 0;
+	u8 pin_dclk = (mode->flags & DRM_MODE_FLAG_PCSYNC) ? 1 : 0;
+
+	val = lvds->format;
+	if (lvds->output == DISPLAY_OUTPUT_DUAL_LVDS)
+		val |= LVDS_DUAL | LVDS_CH0_EN | LVDS_CH1_EN;
+	else if (lvds->output == DISPLAY_OUTPUT_LVDS)
+		val |= LVDS_CH0_EN;
+	else if (lvds->output == DISPLAY_OUTPUT_RGB)
+		val |= LVDS_TTL_EN | LVDS_CH0_EN | LVDS_CH1_EN;
+
+	if (h_bp & 0x01)
+		val |= LVDS_START_PHASE_RST_1;
+
+	val |= (pin_dclk << 8) | (pin_hsync << 9);
+	val |= (0xffff << 16);
+	writel(val, lvds->grf + lvds->pdata->grf_soc_con7);
+
+	return 0;
+}
+
+static void rk3288_output_ttl(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct rockchip_lvds_device *lvds = conn_state->private;
+
+	rk3288_lvds_pwr_on(state);
+	/* iomux: dclk den hsync vsync */
+	writel(0x00550055, lvds->grf + lvds->pdata->grf_gpio1d_iomux);
+	lvds_writel(lvds, RK3288_LVDS_CH0_REG0,
+		    RK3288_LVDS_CH0_REG0_TTL_EN |
+		    RK3288_LVDS_CH0_REG0_LANECK_EN |
+		    RK3288_LVDS_CH0_REG0_LANE4_EN |
+		    RK3288_LVDS_CH0_REG0_LANE3_EN |
+		    RK3288_LVDS_CH0_REG0_LANE2_EN |
+		    RK3288_LVDS_CH0_REG0_LANE1_EN |
+		    RK3288_LVDS_CH0_REG0_LANE0_EN);
+	lvds_writel(lvds, RK3288_LVDS_CH0_REG2,
+		    RK3288_LVDS_PLL_FBDIV_REG2(0x46));
+
+	lvds_writel(lvds, RK3288_LVDS_CH0_REG3,
+		    RK3288_LVDS_PLL_FBDIV_REG3(0x46));
+	lvds_writel(lvds, RK3288_LVDS_CH0_REG4,
+		    RK3288_LVDS_CH0_REG4_LANECK_TTL_MODE |
+		    RK3288_LVDS_CH0_REG4_LANE4_TTL_MODE |
+		    RK3288_LVDS_CH0_REG4_LANE3_TTL_MODE |
+		    RK3288_LVDS_CH0_REG4_LANE2_TTL_MODE |
+		    RK3288_LVDS_CH0_REG4_LANE1_TTL_MODE |
+		    RK3288_LVDS_CH0_REG4_LANE0_TTL_MODE);
+	lvds_writel(lvds, RK3288_LVDS_CH0_REG5,
+		    RK3288_LVDS_CH0_REG5_LANECK_TTL_DATA |
+		    RK3288_LVDS_CH0_REG5_LANE4_TTL_DATA |
+		    RK3288_LVDS_CH0_REG5_LANE3_TTL_DATA |
+		    RK3288_LVDS_CH0_REG5_LANE2_TTL_DATA |
+		    RK3288_LVDS_CH0_REG5_LANE1_TTL_DATA |
+		    RK3288_LVDS_CH0_REG5_LANE0_TTL_DATA);
+	lvds_writel(lvds, RK3288_LVDS_CH0_REGD,
+		    RK3288_LVDS_PLL_PREDIV_REGD(0x0a));
+	lvds_writel(lvds, RK3288_LVDS_CH0_REG20,
+		    RK3288_LVDS_CH0_REG20_LSB);
+
+	lvds_writel(lvds, RK3288_LVDS_CFG_REGC, RK3288_LVDS_CFG_REGC_PLL_ENABLE);
+	lvds_writel(lvds, RK3288_LVDS_CFG_REG21, RK3288_LVDS_CFG_REG21_TX_ENABLE);
+}
+
+static void rk3288_output_lvds(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct rockchip_lvds_device *lvds = conn_state->private;
+
+	rk3288_lvds_pwr_on(state);
+
+	lvds_writel(lvds, RK3288_LVDS_CH0_REG0,
+		    RK3288_LVDS_CH0_REG0_LVDS_EN |
+		    RK3288_LVDS_CH0_REG0_LANECK_EN |
+		    RK3288_LVDS_CH0_REG0_LANE4_EN |
+		    RK3288_LVDS_CH0_REG0_LANE3_EN |
+		    RK3288_LVDS_CH0_REG0_LANE2_EN |
+		    RK3288_LVDS_CH0_REG0_LANE1_EN |
+		    RK3288_LVDS_CH0_REG0_LANE0_EN);
+	lvds_writel(lvds, RK3288_LVDS_CH0_REG1,
+		    RK3288_LVDS_CH0_REG1_LANECK_BIAS |
+		    RK3288_LVDS_CH0_REG1_LANE4_BIAS |
+		    RK3288_LVDS_CH0_REG1_LANE3_BIAS |
+		    RK3288_LVDS_CH0_REG1_LANE2_BIAS |
+		    RK3288_LVDS_CH0_REG1_LANE1_BIAS |
+		    RK3288_LVDS_CH0_REG1_LANE0_BIAS);
+	lvds_writel(lvds, RK3288_LVDS_CH0_REG2,
+		    RK3288_LVDS_CH0_REG2_RESERVE_ON |
+		    RK3288_LVDS_CH0_REG2_LANECK_LVDS_MODE |
+		    RK3288_LVDS_CH0_REG2_LANE4_LVDS_MODE |
+		    RK3288_LVDS_CH0_REG2_LANE3_LVDS_MODE |
+		    RK3288_LVDS_CH0_REG2_LANE2_LVDS_MODE |
+		    RK3288_LVDS_CH0_REG2_LANE1_LVDS_MODE |
+		    RK3288_LVDS_CH0_REG2_LANE0_LVDS_MODE |
+		    RK3288_LVDS_PLL_FBDIV_REG2(0x46));
+	lvds_writel(lvds, RK3288_LVDS_CH0_REG3,
+		    RK3288_LVDS_PLL_FBDIV_REG3(0x46));
+	lvds_writel(lvds, RK3288_LVDS_CH0_REG4, 0x00);
+	lvds_writel(lvds, RK3288_LVDS_CH0_REG5, 0x00);
+	lvds_writel(lvds, RK3288_LVDS_CH0_REGD,
+		    RK3288_LVDS_PLL_PREDIV_REGD(0x0a));
+	lvds_writel(lvds, RK3288_LVDS_CH0_REG20,
+		    RK3288_LVDS_CH0_REG20_LSB);
+
+	lvds_writel(lvds, RK3288_LVDS_CFG_REGC, RK3288_LVDS_CFG_REGC_PLL_ENABLE);
+	lvds_writel(lvds, RK3288_LVDS_CFG_REG21, RK3288_LVDS_CFG_REG21_TX_ENABLE);
+}
+
+static int rockchip_lvds_init(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	const struct rockchip_connector *connector = conn_state->connector;
+	const struct rockchip_lvds_chip_data *pdata = connector->data;
+	int lvds_node = conn_state->node;
+	struct rockchip_lvds_device *lvds;
+	const char *name;
+	int i;
+	struct fdt_resource lvds_phy, lvds_ctrl;
+	struct panel_state *panel_state = &state->panel_state;
+	int panel_node = panel_state->node;
+
+	lvds = malloc(sizeof(*lvds));
+	if (!lvds)
+		return -ENOMEM;
+	lvds->pdata = pdata;
+
+	if (pdata->chip_type == RK3288_LVDS) {
+		lvds->regbase = (u32)fdtdec_get_addr_size_auto_noparent(state->blob,
+						lvds_node, "reg", 0, NULL, false);
+	} else {
+		i = fdt_get_named_resource(state->blob, lvds_node, "reg", "reg-names",
+					   "mipi_lvds_phy", &lvds_phy);
+		if (i) {
+			printf("can't get regs lvds_phy addresses!\n");
+			free(lvds);
+			return -ENOMEM;
+		}
+
+		i = fdt_get_named_resource(state->blob, lvds_node, "reg", "reg-names",
+					   "mipi_lvds_ctl", &lvds_ctrl);
+		if (i) {
+			printf("can't get regs lvds_ctrl addresses!\n");
+			free(lvds);
+			return -ENOMEM;
+		}
+
+		lvds->regbase = lvds_phy.start;
+		lvds->ctrl_reg = lvds_ctrl.start;
+	}
+
+	lvds->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	if (lvds->grf <= 0) {
+		printf("%s: Get syscon grf failed (ret=%p)\n",
+		      __func__, lvds->grf);
+		return  -ENXIO;
+	}
+
+	name = fdt_stringlist_get(state->blob, panel_node, "rockchip,output", 0, NULL);
+	if (!name)
+		/* default set it as output rgb */
+		lvds->output = DISPLAY_OUTPUT_RGB;
+	else
+		lvds->output = lvds_name_to_output(name);
+	if (lvds->output < 0) {
+		printf("invalid output type [%s]\n", name);
+		free(lvds);
+		return lvds->output;
+	}
+	name = fdt_stringlist_get(state->blob, panel_node, "rockchip,data-mapping", 0, NULL);
+	if (!name)
+		/* default set it as format jeida */
+		lvds->format = LVDS_FORMAT_JEIDA;
+	else
+		lvds->format = lvds_name_to_format(name);
+
+	if (lvds->format < 0) {
+		printf("invalid data-mapping format [%s]\n", name);
+		free(lvds);
+		return lvds->format;
+	}
+	i = fdtdec_get_int(state->blob, panel_node, "rockchip,data-width", 24);
+	if (i == 24) {
+		lvds->format |= LVDS_24BIT;
+	} else if (i == 18) {
+		lvds->format |= LVDS_18BIT;
+	} else {
+		printf("rockchip-lvds unsupport data-width[%d]\n", i);
+		free(lvds);
+		return -EINVAL;
+	}
+	printf("LVDS: data mapping: %s, data-width:%d, format:%d,\n",
+		name, i, lvds->format);
+	conn_state->private = lvds;
+	conn_state->type = DRM_MODE_CONNECTOR_LVDS;
+	conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
+
+	return 0;
+}
+
+static void rockchip_lvds_deinit(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct rockchip_lvds_device *lvds = conn_state->private;
+
+	free(lvds);
+}
+
+static int rockchip_lvds_prepare(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct rockchip_lvds_device *lvds = conn_state->private;
+	lvds->mode = &conn_state->mode;
+
+	rockchip_lvds_clk_enable(lvds);
+
+	return 0;
+}
+
+static void rockchip_lvds_vop_routing(struct rockchip_lvds_device *lvds, int pipe)
+{
+	u32 val;
+
+	if (lvds->pdata->chip_type == RK3288_LVDS) {
+		if (pipe)
+			val = RK3288_LVDS_SOC_CON6_SEL_VOP_LIT |
+				(RK3288_LVDS_SOC_CON6_SEL_VOP_LIT << 16);
+		else
+			val = RK3288_LVDS_SOC_CON6_SEL_VOP_LIT << 16;
+		writel(val, lvds->grf + lvds->pdata->grf_soc_con6);
+	} else {
+		if (pipe)
+			val = RK3366_LVDS_VOP_SEL_LIT;
+		else
+			val = RK3366_LVDS_VOP_SEL_BIG;
+
+		writel(val, lvds->grf + RK3366_GRF_SOC_CON0);
+	}
+}
+
+static int rockchip_lvds_enable(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct rockchip_lvds_device *lvds = conn_state->private;
+	struct crtc_state *crtc_state = &state->crtc_state;
+
+	if (lvds->pdata->has_vop_sel)
+		rockchip_lvds_vop_routing(lvds, crtc_state->crtc_id);
+
+	if (lvds->output == DISPLAY_OUTPUT_LVDS) {
+		if (lvds->pdata->chip_type == RK3288_LVDS)
+			rk3288_output_lvds(state);
+		else
+			rk336x_output_lvds(state);
+	} else {
+		if (lvds->pdata->chip_type == RK3288_LVDS)
+			rk3288_output_ttl(state);
+		else
+			rk336x_output_ttl(state);
+	}
+
+	return 0;
+}
+
+static int rockchip_lvds_disable(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct rockchip_lvds_device *lvds = conn_state->private;
+
+	if (lvds->pdata->chip_type == RK3288_LVDS)
+		rk3288_lvds_pwr_off(state);
+	else
+		rk336x_lvds_pwr_off(state);
+
+	return 0;
+}
+
+const struct rockchip_connector_funcs rockchip_lvds_funcs = {
+	.init = rockchip_lvds_init,
+	.deinit = rockchip_lvds_deinit,
+	.prepare = rockchip_lvds_prepare,
+	.enable = rockchip_lvds_enable,
+	.disable = rockchip_lvds_disable,
+};
+
+static const struct rockchip_connector rk3366_lvds_data = {
+	 .funcs = &rockchip_analogix_dp_funcs,
+	 .data = &rk3366_lvds_drv_data,
+};
+
+static const struct rockchip_connector rk3368_lvds_data = {
+	 .funcs = &rockchip_lvds_funcs,
+	 .data = &rk3368_lvds_drv_data,
+};
+
+static const struct rockchip_connector rk3288_lvds_data = {
+	 .funcs = &rockchip_lvds_funcs,
+	 .data = &rk3288_lvds_drv_data,
+};
+
+static const struct udevice_id rockchip_lvds_ids[] = {
+	{
+	 .compatible = "rockchip,rk3366-lvds",
+	 .data = (ulong)&rk3366_lvds_data,
+	}, {
+	 .compatible = "rockchip,rk3368-lvds",
+	 .data = (ulong)&rk3368_lvds_data,
+	}, {
+	 .compatible = "rockchip,rk3288-lvds",
+	 .data = (ulong)&rk3288_lvds_data,
+	}, {}
+};
+
+U_BOOT_DRIVER(rockchip_lvds) = {
+	.name = "rockchip_lvds",
+	.id = UCLASS_DISPLAY,
+	.of_match = rockchip_lvds_ids,
+};
diff --git a/drivers/video/drm/rockchip_lvds.h b/drivers/video/drm/rockchip_lvds.h
new file mode 100644
index 0000000000..416eacef87
--- /dev/null
+++ b/drivers/video/drm/rockchip_lvds.h
@@ -0,0 +1,203 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _ROCKCHIP_LVDS_H_
+#define _ROCKCHIP_LVDS_H_
+#define RK3288_LVDS_CH0_REG0			0x00
+#define RK3288_LVDS_CH0_REG0_LVDS_EN		BIT(7)
+#define RK3288_LVDS_CH0_REG0_TTL_EN		BIT(6)
+#define RK3288_LVDS_CH0_REG0_LANECK_EN		BIT(5)
+#define RK3288_LVDS_CH0_REG0_LANE4_EN		BIT(4)
+#define RK3288_LVDS_CH0_REG0_LANE3_EN		BIT(3)
+#define RK3288_LVDS_CH0_REG0_LANE2_EN		BIT(2)
+#define RK3288_LVDS_CH0_REG0_LANE1_EN		BIT(1)
+#define RK3288_LVDS_CH0_REG0_LANE0_EN		BIT(0)
+
+#define RK3288_LVDS_CH0_REG1			0x04
+#define RK3288_LVDS_CH0_REG1_LANECK_BIAS	BIT(5)
+#define RK3288_LVDS_CH0_REG1_LANE4_BIAS		BIT(4)
+#define RK3288_LVDS_CH0_REG1_LANE3_BIAS		BIT(3)
+#define RK3288_LVDS_CH0_REG1_LANE2_BIAS		BIT(2)
+#define RK3288_LVDS_CH0_REG1_LANE1_BIAS		BIT(1)
+#define RK3288_LVDS_CH0_REG1_LANE0_BIAS		BIT(0)
+
+#define RK3288_LVDS_CH0_REG2			0x08
+#define RK3288_LVDS_CH0_REG2_RESERVE_ON		BIT(7)
+#define RK3288_LVDS_CH0_REG2_LANECK_LVDS_MODE	BIT(6)
+#define RK3288_LVDS_CH0_REG2_LANE4_LVDS_MODE	BIT(5)
+#define RK3288_LVDS_CH0_REG2_LANE3_LVDS_MODE	BIT(4)
+#define RK3288_LVDS_CH0_REG2_LANE2_LVDS_MODE	BIT(3)
+#define RK3288_LVDS_CH0_REG2_LANE1_LVDS_MODE	BIT(2)
+#define RK3288_LVDS_CH0_REG2_LANE0_LVDS_MODE	BIT(1)
+#define RK3288_LVDS_CH0_REG2_PLL_FBDIV8		BIT(0)
+
+#define RK3288_LVDS_CH0_REG3			0x0c
+#define RK3288_LVDS_CH0_REG3_PLL_FBDIV_MASK	0xff
+
+#define RK3288_LVDS_CH0_REG4			0x10
+#define RK3288_LVDS_CH0_REG4_LANECK_TTL_MODE	BIT(5)
+#define RK3288_LVDS_CH0_REG4_LANE4_TTL_MODE	BIT(4)
+#define RK3288_LVDS_CH0_REG4_LANE3_TTL_MODE	BIT(3)
+#define RK3288_LVDS_CH0_REG4_LANE2_TTL_MODE	BIT(2)
+#define RK3288_LVDS_CH0_REG4_LANE1_TTL_MODE	BIT(1)
+#define RK3288_LVDS_CH0_REG4_LANE0_TTL_MODE	BIT(0)
+
+#define RK3288_LVDS_CH0_REG5			0x14
+#define RK3288_LVDS_CH0_REG5_LANECK_TTL_DATA	BIT(5)
+#define RK3288_LVDS_CH0_REG5_LANE4_TTL_DATA	BIT(4)
+#define RK3288_LVDS_CH0_REG5_LANE3_TTL_DATA	BIT(3)
+#define RK3288_LVDS_CH0_REG5_LANE2_TTL_DATA	BIT(2)
+#define RK3288_LVDS_CH0_REG5_LANE1_TTL_DATA	BIT(1)
+#define RK3288_LVDS_CH0_REG5_LANE0_TTL_DATA	BIT(0)
+
+#define RK3288_LVDS_CFG_REGC			0x30
+#define RK3288_LVDS_CFG_REGC_PLL_ENABLE		0x00
+#define RK3288_LVDS_CFG_REGC_PLL_DISABLE	0xff
+
+#define RK3288_LVDS_CH0_REGD			0x34
+#define RK3288_LVDS_CH0_REGD_PLL_PREDIV_MASK	0x1f
+
+#define RK3288_LVDS_CH0_REG20			0x80
+#define RK3288_LVDS_CH0_REG20_MSB		0x45
+#define RK3288_LVDS_CH0_REG20_LSB		0x44
+
+#define RK3288_LVDS_CFG_REG21			0x84
+#define RK3288_LVDS_CFG_REG21_TX_ENABLE		0x92
+#define RK3288_LVDS_CFG_REG21_TX_DISABLE	0x00
+
+/* fbdiv value is split over 2 registers, with bit8 in reg2 */
+#define RK3288_LVDS_PLL_FBDIV_REG2(_fbd) \
+		(_fbd & BIT(8) ? RK3288_LVDS_CH0_REG2_PLL_FBDIV8 : 0)
+#define RK3288_LVDS_PLL_FBDIV_REG3(_fbd) \
+		(_fbd & RK3288_LVDS_CH0_REG3_PLL_FBDIV_MASK)
+#define RK3288_LVDS_PLL_PREDIV_REGD(_pd) \
+		(_pd & RK3288_LVDS_CH0_REGD_PLL_PREDIV_MASK)
+
+#define RK3288_LVDS_SOC_CON6_SEL_VOP_LIT	BIT(3)
+
+#define LVDS_FMT_MASK				(0x07 << 16)
+#define LVDS_MSB				BIT(3)
+#define LVDS_DUAL				BIT(4)
+#define LVDS_FMT_1				BIT(5)
+#define LVDS_TTL_EN				BIT(6)
+#define LVDS_START_PHASE_RST_1			BIT(7)
+#define LVDS_DCLK_INV				BIT(8)
+#define LVDS_CH0_EN				BIT(11)
+#define LVDS_CH1_EN				BIT(12)
+#define LVDS_PWRDN				BIT(15)
+
+#define LVDS_24BIT				(0 << 1)
+#define LVDS_18BIT				(1 << 1)
+#define LVDS_FORMAT_VESA			(0 << 0)
+#define LVDS_FORMAT_JEIDA			(1 << 0)
+
+#define DISPLAY_OUTPUT_RGB		0
+#define DISPLAY_OUTPUT_LVDS		1
+#define DISPLAY_OUTPUT_DUAL_LVDS	2
+
+#define BITS(x, bit)            ((x) << (bit))
+#define BITS_MASK(x, mask, bit)  BITS((x) & (mask), bit)
+#define BITS_EN(mask, bit)       BITS(mask, bit + 16)
+
+#define RK3366_GRF_SOC_CON0	0x0400
+#define RK3366_LVDS_VOP_SEL_LIT	(BITS_MASK(1, 1, 0) | BITS_EN(1, 0))
+#define RK3366_LVDS_VOP_SEL_BIG	(BITS_MASK(0, 1, 0) | BITS_EN(1, 0))
+#define RK3366_GRF_SOC_CON5	0x0414
+#define RK3366_GRF_SOC_CON6	0x0418
+
+#define RK3368_GRF_SOC_CON7	0x041c
+#define RK3368_GRF_SOC_CON15	0x043c
+
+#define v_RK336X_LVDS_OUTPUT_FORMAT(x) (BITS_MASK(x, 3, 13) | BITS_EN(3, 13))
+#define v_RK336X_LVDS_MSBSEL(x)        (BITS_MASK(x, 1, 11) | BITS_EN(1, 11))
+#define v_RK336X_LVDSMODE_EN(x)        (BITS_MASK(x, 1, 12) | BITS_EN(1, 12))
+#define v_RK336X_MIPIPHY_TTL_EN(x)     (BITS_MASK(x, 1, 15) | BITS_EN(1, 15))
+#define v_RK336X_MIPIPHY_LANE0_EN(x)   (BITS_MASK(x, 1, 5) | BITS_EN(1, 5))
+#define v_RK336X_MIPIDPI_FORCEX_EN(x)  (BITS_MASK(x, 1, 6) | BITS_EN(1, 6))
+enum {
+	LVDS_DATA_FROM_LCDC = 0,
+	LVDS_DATA_FORM_EBC,
+};
+
+enum {
+	LVDS_MSB_D0 = 0,
+	LVDS_MSB_D7,
+};
+
+#define MIPIPHY_REG0            0x0000
+#define m_LANE_EN_0             BITS(1, 2)
+#define m_LANE_EN_1             BITS(1, 3)
+#define m_LANE_EN_2             BITS(1, 4)
+#define m_LANE_EN_3             BITS(1, 5)
+#define m_LANE_EN_CLK           BITS(1, 5)
+#define v_LANE_EN_0(x)          BITS(1, 2)
+#define v_LANE_EN_1(x)          BITS(1, 3)
+#define v_LANE_EN_2(x)          BITS(1, 4)
+#define v_LANE_EN_3(x)          BITS(1, 5)
+#define v_LANE_EN_CLK(x)        BITS(1, 5)
+
+#define MIPIPHY_REG1            0x0004
+#define m_SYNC_RST              BITS(1, 0)
+#define m_LDO_PWR_DOWN          BITS(1, 1)
+#define m_PLL_PWR_DOWN          BITS(1, 2)
+#define v_SYNC_RST(x)           BITS_MASK(x, 1, 0)
+#define v_LDO_PWR_DOWN(x)       BITS_MASK(x, 1, 1)
+#define v_PLL_PWR_DOWN(x)       BITS_MASK(x, 1, 2)
+
+#define MIPIPHY_REG3		0x000c
+#define m_PREDIV                BITS(0x1f, 0)
+#define m_FBDIV_MSB             BITS(1, 5)
+#define v_PREDIV(x)             BITS_MASK(x, 0x1f, 0)
+#define v_FBDIV_MSB(x)          BITS_MASK(x, 1, 5)
+
+#define MIPIPHY_REG4		0x0010
+#define v_FBDIV_LSB(x)          BITS_MASK(x, 0xff, 0)
+
+#define MIPIPHY_REGE0		0x0380
+#define m_MSB_SEL               BITS(1, 0)
+#define m_DIG_INTER_RST         BITS(1, 2)
+#define m_LVDS_MODE_EN          BITS(1, 5)
+#define m_TTL_MODE_EN           BITS(1, 6)
+#define m_MIPI_MODE_EN          BITS(1, 7)
+#define v_MSB_SEL(x)            BITS_MASK(x, 1, 0)
+#define v_DIG_INTER_RST(x)      BITS_MASK(x, 1, 2)
+#define v_LVDS_MODE_EN(x)       BITS_MASK(x, 1, 5)
+#define v_TTL_MODE_EN(x)        BITS_MASK(x, 1, 6)
+#define v_MIPI_MODE_EN(x)       BITS_MASK(x, 1, 7)
+
+#define MIPIPHY_REGE1           0x0384
+#define m_DIG_INTER_EN          BITS(1, 7)
+#define v_DIG_INTER_EN(x)       BITS_MASK(x, 1, 7)
+
+#define MIPIPHY_REGE3           0x038c
+#define m_MIPI_EN               BITS(1, 0)
+#define m_LVDS_EN               BITS(1, 1)
+#define m_TTL_EN                BITS(1, 2)
+#define v_MIPI_EN(x)            BITS_MASK(x, 1, 0)
+#define v_LVDS_EN(x)            BITS_MASK(x, 1, 1)
+#define v_TTL_EN(x)             BITS_MASK(x, 1, 2)
+
+#define MIPIPHY_REGE4		0x0390
+#define m_VOCM			BITS(3, 4)
+#define m_DIFF_V		BITS(3, 6)
+
+#define v_VOCM(x)		BITS_MASK(x, 3, 4)
+#define v_DIFF_V(x)		BITS_MASK(x, 3, 6)
+
+#define MIPIPHY_REGE8           0x03a0
+
+#define MIPIPHY_REGEB           0x03ac
+#define v_PLL_PWR_OFF(x)        BITS_MASK(x, 1, 2)
+#define v_LANECLK_EN(x)         BITS_MASK(x, 1, 3)
+#define v_LANE3_EN(x)           BITS_MASK(x, 1, 4)
+#define v_LANE2_EN(x)           BITS_MASK(x, 1, 5)
+#define v_LANE1_EN(x)           BITS_MASK(x, 1, 6)
+#define v_LANE0_EN(x)           BITS_MASK(x, 1, 7)
+
+#define LVDS_PMUGRF_BASE         0xff738000
+#define v_RK336X_FORCE_JETAG(x) (BITS_MASK(x, 1, 13) | BITS_EN(1, 13))
+
+#endif
diff --git a/drivers/video/drm/rockchip_mipi_dsi.c b/drivers/video/drm/rockchip_mipi_dsi.c
new file mode 100644
index 0000000000..c07d385ffa
--- /dev/null
+++ b/drivers/video/drm/rockchip_mipi_dsi.c
@@ -0,0 +1,262 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <config.h>
+#include <common.h>
+#include <errno.h>
+#include <malloc.h>
+#include <fdtdec.h>
+#include <fdt_support.h>
+#include <asm/unaligned.h>
+#include <linux/list.h>
+
+#include "rockchip_display.h"
+#include "rockchip_crtc.h"
+#include "rockchip_connector.h"
+#include "rockchip_mipi_dsi.h"
+
+void mipi_dphy_timing_get_default(struct mipi_dphy_timing *timing,
+				  unsigned long period)
+{
+	/* Global Operation Timing Parameters */
+	timing->clkmiss = 0;
+	timing->clkpost = 70 + 52 * period;
+	timing->clkpre = 8 * period;
+	timing->clkprepare = 65;
+	timing->clksettle = 95;
+	timing->clktermen = 0;
+	timing->clktrail = 80;
+	timing->clkzero = 260;
+	timing->dtermen = 0;
+	timing->eot = 0;
+	timing->hsexit = 120;
+	timing->hsprepare = 65 + 4 * period;
+	timing->hszero = 145 + 6 * period;
+	timing->hssettle = 85 + 6 * period;
+	timing->hsskip = 40;
+	timing->hstrail = max(8 * period, 60 + 4 * period);
+	timing->init = 100000;
+	timing->lpx = 60;
+	timing->taget = 5 * timing->lpx;
+	timing->tago = 4 * timing->lpx;
+	timing->tasure = 2 * timing->lpx;
+	timing->wakeup = 1000000;
+}
+
+ssize_t mipi_dsi_generic_write(struct display_state *state,
+			       const void *payload, size_t size)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	const struct rockchip_connector *connector = conn_state->connector;
+	struct mipi_dsi_msg msg;
+
+	if (!connector || !connector->funcs || !connector->funcs->transfer) {
+		printf("%s: failed to find connector transfer funcs\n", __func__);
+		return -ENODEV;
+	}
+
+	memset(&msg, 0, sizeof(msg));
+	msg.channel = 0;
+	msg.tx_buf = payload;
+	msg.tx_len = size;
+	msg.flags |= MIPI_DSI_MSG_USE_LPM;
+
+	switch (size) {
+	case 0:
+		msg.type = MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM;
+		break;
+	case 1:
+		msg.type = MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM;
+		break;
+	case 2:
+		msg.type = MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM;
+		break;
+	default:
+		msg.type = MIPI_DSI_GENERIC_LONG_WRITE;
+		break;
+	}
+
+	return connector->funcs->transfer(state, &msg);
+}
+
+ssize_t mipi_dsi_dcs_write(struct display_state *state,
+			   const void *payload, size_t size)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	const struct rockchip_connector *connector = conn_state->connector;
+	struct mipi_dsi_msg msg;
+
+	if (!connector || !connector->funcs || !connector->funcs->transfer) {
+		printf("%s: failed to find connector transfer funcs\n", __func__);
+		return -ENODEV;
+	}
+
+	memset(&msg, 0, sizeof(msg));
+	msg.channel = 0;
+	msg.tx_buf = payload;
+	msg.tx_len = size;
+	msg.flags |= MIPI_DSI_MSG_USE_LPM;
+
+	switch (size) {
+	case 0:
+		return -EINVAL;
+	case 1:
+		msg.type = MIPI_DSI_DCS_SHORT_WRITE;
+		break;
+	case 2:
+		msg.type = MIPI_DSI_DCS_SHORT_WRITE_PARAM;
+		break;
+	default:
+		msg.type = MIPI_DSI_DCS_LONG_WRITE;
+		break;
+	}
+
+	return connector->funcs->transfer(state, &msg);
+}
+
+ssize_t mipi_dsi_generic_read(struct display_state *state, const void *params,
+			      size_t num_params, void *data, size_t size)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	const struct rockchip_connector *connector = conn_state->connector;
+	struct mipi_dsi_msg msg;
+
+	if (!connector || !connector->funcs || !connector->funcs->transfer) {
+		printf("%s: failed to find connector transfer funcs\n", __func__);
+		return -ENODEV;
+	}
+
+	memset(&msg, 0, sizeof(msg));
+	msg.channel = 0;
+	msg.tx_buf = params;
+	msg.tx_len = num_params;
+	msg.rx_len = size;
+	msg.rx_buf = data;
+	msg.flags |= MIPI_DSI_MSG_USE_LPM;
+
+	switch (num_params) {
+	case 0:
+		msg.type = MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM;
+		break;
+	case 1:
+		msg.type = MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM;
+		break;
+	case 2:
+		msg.type = MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return connector->funcs->transfer(state, &msg);
+}
+
+ssize_t mipi_dsi_dcs_read(struct display_state *state, u8 cmd, void *data,
+			  size_t len)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	const struct rockchip_connector *connector = conn_state->connector;
+	struct mipi_dsi_msg msg;
+
+	if (!connector || !connector->funcs || !connector->funcs->transfer) {
+		printf("%s: failed to find connector transfer funcs\n", __func__);
+		return -ENODEV;
+	}
+
+	memset(&msg, 0, sizeof(msg));
+	msg.channel = 0;
+	msg.type = MIPI_DSI_DCS_READ;
+	msg.tx_buf = &cmd;
+	msg.tx_len = 1;
+	msg.rx_len = len;
+	msg.rx_buf = data;
+	msg.flags |= MIPI_DSI_MSG_USE_LPM;
+
+	return connector->funcs->transfer(state, &msg);
+}
+
+static bool mipi_dsi_packet_format_is_short(u8 type)
+{
+	switch (type) {
+	case MIPI_DSI_V_SYNC_START:
+	case MIPI_DSI_V_SYNC_END:
+	case MIPI_DSI_H_SYNC_START:
+	case MIPI_DSI_H_SYNC_END:
+	case MIPI_DSI_END_OF_TRANSMISSION:
+	case MIPI_DSI_COLOR_MODE_OFF:
+	case MIPI_DSI_COLOR_MODE_ON:
+	case MIPI_DSI_SHUTDOWN_PERIPHERAL:
+	case MIPI_DSI_TURN_ON_PERIPHERAL:
+	case MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM:
+	case MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM:
+	case MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM:
+	case MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM:
+	case MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM:
+	case MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM:
+	case MIPI_DSI_DCS_SHORT_WRITE:
+	case MIPI_DSI_DCS_SHORT_WRITE_PARAM:
+	case MIPI_DSI_DCS_READ:
+	case MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE:
+		return true;
+	}
+
+	return false;
+}
+
+static bool mipi_dsi_packet_format_is_long(u8 type)
+{
+	switch (type) {
+	case MIPI_DSI_NULL_PACKET:
+	case MIPI_DSI_BLANKING_PACKET:
+	case MIPI_DSI_GENERIC_LONG_WRITE:
+	case MIPI_DSI_DCS_LONG_WRITE:
+	case MIPI_DSI_LOOSELY_PACKED_PIXEL_STREAM_YCBCR20:
+	case MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR24:
+	case MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16:
+	case MIPI_DSI_PACKED_PIXEL_STREAM_30:
+	case MIPI_DSI_PACKED_PIXEL_STREAM_36:
+	case MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR12:
+	case MIPI_DSI_PACKED_PIXEL_STREAM_16:
+	case MIPI_DSI_PACKED_PIXEL_STREAM_18:
+	case MIPI_DSI_PIXEL_STREAM_3BYTE_18:
+	case MIPI_DSI_PACKED_PIXEL_STREAM_24:
+		return true;
+	}
+
+	return false;
+}
+
+int mipi_dsi_create_packet(struct mipi_dsi_packet *packet,
+			   const struct mipi_dsi_msg *msg)
+{
+	if (!packet || !msg)
+		return -EINVAL;
+
+	/* do some minimum sanity checking */
+	if (!mipi_dsi_packet_format_is_short(msg->type) &&
+	    !mipi_dsi_packet_format_is_long(msg->type))
+		return -EINVAL;
+
+	if (msg->channel > 3)
+		return -EINVAL;
+
+	memset(packet, 0, sizeof(*packet));
+	packet->header[0] = ((msg->channel & 0x3) << 6) | (msg->type & 0x3f);
+	if (mipi_dsi_packet_format_is_long(msg->type)) {
+		packet->header[1] = (msg->tx_len >> 0) & 0xff;
+		packet->header[2] = (msg->tx_len >> 8) & 0xff;
+		packet->payload_length = msg->tx_len;
+		packet->payload = msg->tx_buf;
+	} else {
+		const u8 *tx = msg->tx_buf;
+		packet->header[1] = (msg->tx_len > 0) ? tx[0] : 0;
+		packet->header[2] = (msg->tx_len > 1) ? tx[1] : 0;
+	}
+
+	packet->size = sizeof(packet->header) + packet->payload_length;
+
+	return 0;
+}
diff --git a/drivers/video/drm/rockchip_mipi_dsi.h b/drivers/video/drm/rockchip_mipi_dsi.h
new file mode 100644
index 0000000000..44a66618fe
--- /dev/null
+++ b/drivers/video/drm/rockchip_mipi_dsi.h
@@ -0,0 +1,243 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __ROCKCHIP_MIPI_DSI_H__
+#define __ROCKCHIP_MIPI_DSI_H__
+
+#define MSEC_PER_SEC	1000L
+#define USEC_PER_MSEC	1000L
+#define NSEC_PER_USEC	1000L
+#define NSEC_PER_MSEC	1000000L
+#define USEC_PER_SEC	1000000L
+#define NSEC_PER_SEC	1000000000L
+#define FSEC_PER_SEC	1000000000000000LL
+
+#define GENMASK(h, l)	(((~0UL) << (l)) & (~0UL >> (BITS_PER_LONG - 1 - (h))))
+#define UPDATE(v, h, l)	(((v) << (l)) & GENMASK((h), (l)))
+#define HIWORD_UPDATE(v, h, l)	(((v) << (l)) | (GENMASK(h, l) << 16))
+
+#define readl_poll_timeout(addr, val, cond, sleep_us, timeout_us)	\
+({ \
+	int try = 100; \
+	for (;;) { \
+		(val) = readl(addr); \
+		if (cond) \
+			break; \
+		try--; \
+		if (!try) \
+			break; \
+		if (sleep_us) \
+			udelay(sleep_us >> 2); \
+	} \
+	(cond) ? 0 : -ETIMEDOUT; \
+})
+
+/* MIPI DSI Processor-to-Peripheral transaction types */
+enum {
+	MIPI_DSI_V_SYNC_START				= 0x01,
+	MIPI_DSI_V_SYNC_END				= 0x11,
+	MIPI_DSI_H_SYNC_START				= 0x21,
+	MIPI_DSI_H_SYNC_END				= 0x31,
+
+	MIPI_DSI_COLOR_MODE_OFF				= 0x02,
+	MIPI_DSI_COLOR_MODE_ON				= 0x12,
+	MIPI_DSI_SHUTDOWN_PERIPHERAL			= 0x22,
+	MIPI_DSI_TURN_ON_PERIPHERAL			= 0x32,
+
+	MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM		= 0x03,
+	MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM		= 0x13,
+	MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM		= 0x23,
+
+	MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM		= 0x04,
+	MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM		= 0x14,
+	MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM		= 0x24,
+
+	MIPI_DSI_DCS_SHORT_WRITE			= 0x05,
+	MIPI_DSI_DCS_SHORT_WRITE_PARAM			= 0x15,
+
+	MIPI_DSI_DCS_READ				= 0x06,
+
+	MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE		= 0x37,
+
+	MIPI_DSI_END_OF_TRANSMISSION			= 0x08,
+
+	MIPI_DSI_NULL_PACKET				= 0x09,
+	MIPI_DSI_BLANKING_PACKET			= 0x19,
+	MIPI_DSI_GENERIC_LONG_WRITE			= 0x29,
+	MIPI_DSI_DCS_LONG_WRITE				= 0x39,
+
+	MIPI_DSI_LOOSELY_PACKED_PIXEL_STREAM_YCBCR20	= 0x0c,
+	MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR24		= 0x1c,
+	MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16		= 0x2c,
+
+	MIPI_DSI_PACKED_PIXEL_STREAM_30			= 0x0d,
+	MIPI_DSI_PACKED_PIXEL_STREAM_36			= 0x1d,
+	MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR12		= 0x3d,
+
+	MIPI_DSI_PACKED_PIXEL_STREAM_16			= 0x0e,
+	MIPI_DSI_PACKED_PIXEL_STREAM_18			= 0x1e,
+	MIPI_DSI_PIXEL_STREAM_3BYTE_18			= 0x2e,
+	MIPI_DSI_PACKED_PIXEL_STREAM_24			= 0x3e,
+};
+
+/* request ACK from peripheral */
+#define MIPI_DSI_MSG_REQ_ACK	BIT(0)
+/* use Low Power Mode to transmit message */
+#define MIPI_DSI_MSG_USE_LPM	BIT(1)
+
+/**
+ * struct mipi_dsi_msg - read/write DSI buffer
+ * @channel: virtual channel id
+ * @type: payload data type
+ * @flags: flags controlling this message transmission
+ * @tx_len: length of @tx_buf
+ * @tx_buf: data to be written
+ * @rx_len: length of @rx_buf
+ * @rx_buf: data to be read, or NULL
+ */
+struct mipi_dsi_msg {
+	u8 channel;
+	u8 type;
+	u16 flags;
+
+	size_t tx_len;
+	const void *tx_buf;
+
+	size_t rx_len;
+	void *rx_buf;
+};
+
+/**
+ * struct mipi_dsi_packet - represents a MIPI DSI packet in protocol format
+ * @size: size (in bytes) of the packet
+ * @header: the four bytes that make up the header (Data ID, Word Count or
+ *     Packet Data, and ECC)
+ * @payload_length: number of bytes in the payload
+ * @payload: a pointer to a buffer containing the payload, if any
+ */
+struct mipi_dsi_packet {
+	size_t size;
+	u8 header[4];
+	size_t payload_length;
+	const u8 *payload;
+};
+
+
+/* DSI mode flags */
+
+/* video mode */
+#define MIPI_DSI_MODE_VIDEO		BIT(0)
+/* video burst mode */
+#define MIPI_DSI_MODE_VIDEO_BURST	BIT(1)
+/* video pulse mode */
+#define MIPI_DSI_MODE_VIDEO_SYNC_PULSE	BIT(2)
+/* enable auto vertical count mode */
+#define MIPI_DSI_MODE_VIDEO_AUTO_VERT	BIT(3)
+/* enable hsync-end packets in vsync-pulse and v-porch area */
+#define MIPI_DSI_MODE_VIDEO_HSE		BIT(4)
+/* disable hfront-porch area */
+#define MIPI_DSI_MODE_VIDEO_HFP		BIT(5)
+/* disable hback-porch area */
+#define MIPI_DSI_MODE_VIDEO_HBP		BIT(6)
+/* disable hsync-active area */
+#define MIPI_DSI_MODE_VIDEO_HSA		BIT(7)
+/* flush display FIFO on vsync pulse */
+#define MIPI_DSI_MODE_VSYNC_FLUSH	BIT(8)
+/* disable EoT packets in HS mode */
+#define MIPI_DSI_MODE_EOT_PACKET	BIT(9)
+/* device supports non-continuous clock behavior (DSI spec 5.6.1) */
+#define MIPI_DSI_CLOCK_NON_CONTINUOUS	BIT(10)
+/* transmit data in low power */
+#define MIPI_DSI_MODE_LPM		BIT(11)
+
+enum mipi_dsi_pixel_format {
+	MIPI_DSI_FMT_RGB888,
+	MIPI_DSI_FMT_RGB666,
+	MIPI_DSI_FMT_RGB666_PACKED,
+	MIPI_DSI_FMT_RGB565,
+};
+
+/**
+ * mipi_dsi_pixel_format_to_bpp - obtain the number of bits per pixel for any
+ *                                given pixel format defined by the MIPI DSI
+ *                                specification
+ * @fmt: MIPI DSI pixel format
+ *
+ * Returns: The number of bits per pixel of the given pixel format.
+ */
+static inline int mipi_dsi_pixel_format_to_bpp(enum mipi_dsi_pixel_format fmt)
+{
+	switch (fmt) {
+	case MIPI_DSI_FMT_RGB888:
+	case MIPI_DSI_FMT_RGB666:
+		return 24;
+
+	case MIPI_DSI_FMT_RGB666_PACKED:
+		return 18;
+
+	case MIPI_DSI_FMT_RGB565:
+		return 16;
+	}
+
+	return -EINVAL;
+}
+
+/**
+ * enum mipi_dsi_dcs_tear_mode - Tearing Effect Output Line mode
+ * @MIPI_DSI_DCS_TEAR_MODE_VBLANK: the TE output line consists of V-Blanking
+ *    information only
+ * @MIPI_DSI_DCS_TEAR_MODE_VHBLANK : the TE output line consists of both
+ *    V-Blanking and H-Blanking information
+ */
+enum mipi_dsi_dcs_tear_mode {
+	MIPI_DSI_DCS_TEAR_MODE_VBLANK,
+	MIPI_DSI_DCS_TEAR_MODE_VHBLANK,
+};
+
+#define MIPI_DSI_DCS_POWER_MODE_DISPLAY (1 << 2)
+#define MIPI_DSI_DCS_POWER_MODE_NORMAL  (1 << 3)
+#define MIPI_DSI_DCS_POWER_MODE_SLEEP   (1 << 4)
+#define MIPI_DSI_DCS_POWER_MODE_PARTIAL (1 << 5)
+#define MIPI_DSI_DCS_POWER_MODE_IDLE    (1 << 6)
+
+struct mipi_dphy_timing {
+	unsigned int clkmiss;
+	unsigned int clkpost;
+	unsigned int clkpre;
+	unsigned int clkprepare;
+	unsigned int clksettle;
+	unsigned int clktermen;
+	unsigned int clktrail;
+	unsigned int clkzero;
+	unsigned int dtermen;
+	unsigned int eot;
+	unsigned int hsexit;
+	unsigned int hsprepare;
+	unsigned int hszero;
+	unsigned int hssettle;
+	unsigned int hsskip;
+	unsigned int hstrail;
+	unsigned int init;
+	unsigned int lpx;
+	unsigned int taget;
+	unsigned int tago;
+	unsigned int tasure;
+	unsigned int wakeup;
+};
+
+void mipi_dphy_timing_get_default(struct mipi_dphy_timing *timing,
+				  unsigned long period);
+ssize_t mipi_dsi_dcs_write(struct display_state *state,
+			   const void *payload, size_t size);
+ssize_t mipi_dsi_generic_write(struct display_state *state,
+			       const void *payload, size_t size);
+int mipi_dsi_create_packet(struct mipi_dsi_packet *packet,
+			   const struct mipi_dsi_msg *msg);
+ssize_t mipi_dsi_dcs_read(struct display_state *state, u8 cmd, void *data,
+			  size_t len);
+ssize_t mipi_dsi_generic_read(struct display_state *state, const void *params,
+			      size_t num_params, void *data, size_t size);
+#endif /* __ROCKCHIP_MIPI_DSI__ */
diff --git a/drivers/video/drm/rockchip_panel.c b/drivers/video/drm/rockchip_panel.c
new file mode 100644
index 0000000000..aabce7aba0
--- /dev/null
+++ b/drivers/video/drm/rockchip_panel.c
@@ -0,0 +1,226 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <config.h>
+#include <common.h>
+#include <errno.h>
+#include <malloc.h>
+#include <fdtdec.h>
+#include <fdt_support.h>
+#include <asm/unaligned.h>
+#include <linux/list.h>
+#include <dm/device.h>
+
+#include "rockchip_display.h"
+#include "rockchip_crtc.h"
+#include "rockchip_connector.h"
+#include "rockchip_panel.h"
+
+static const struct drm_display_mode auo_b125han03_mode = {
+	.clock = 146900,
+	.hdisplay = 1920,
+	.hsync_start = 1920 + 48,
+	.hsync_end = 1920 + 48 + 32,
+	.htotal = 1920 + 48 + 32 + 140,
+	.vdisplay = 1080,
+	.vsync_start = 1080 + 2,
+	.vsync_end = 1080 + 2 + 5,
+	.vtotal = 1080 + 2 + 5 + 57,
+	.vrefresh = 60,
+	.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
+};
+
+static const struct drm_display_mode lg_lp079qx1_sp0v_mode = {
+	.clock = 200000,
+	.hdisplay = 1536,
+	.hsync_start = 1536 + 12,
+	.hsync_end = 1536 + 12 + 16,
+	.htotal = 1536 + 12 + 16 + 48,
+	.vdisplay = 2048,
+	.vsync_start = 2048 + 8,
+	.vsync_end = 2048 + 8 + 4,
+	.vtotal = 2048 + 8 + 4 + 8,
+	.vrefresh = 60,
+	.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
+};
+#if 0
+static const struct rockchip_panel simple_panel_data = {
+	.funcs = &panel_simple_funcs,
+};
+#endif
+
+static const struct rockchip_panel simple_panel_dsi_data = {
+	.funcs = &rockchip_dsi_panel_funcs,
+};
+#if 0
+static const struct rockchip_panel lg_lp079qx1_sp0v_data = {
+	.funcs = &panel_simple_funcs,
+	.data = &lg_lp079qx1_sp0v_mode,
+};
+
+static const struct rockchip_panel auo_b125han03_data = {
+	.funcs = &panel_simple_funcs,
+	.data = &auo_b125han03_mode,
+};
+#endif
+
+static const struct udevice_id rockchip_panel_ids[] = {
+#if 0
+	}, {
+		.compatible = "simple-panel",
+		.funcs = &simple_panel_data,
+	},
+#endif
+ {
+		.compatible = "simple-panel-dsi",
+		.data = (ulong)&simple_panel_dsi_data,
+	},
+#if 0
+{
+		.compatible = "lg,lp079qx1-sp0v",
+		.funcs = &lg_lp079qx1_sp0v_data,
+	}, {
+		.compatible = "auo,b125han03",
+		.funcs = &auo_b125han03_data,
+	},
+#endif
+ {}
+};
+
+static int rockchip_panel_probe(struct udevice *dev)
+{
+	printf("--->yzq %s %d\n", __func__, __LINE__);
+	return 0;
+}
+
+static int rockchip_panel_bind(struct udevice *dev)
+{
+	printf("--->yzq %s %d\n", __func__, __LINE__);
+	return 0;
+}
+
+
+U_BOOT_DRIVER(rockchip_panel) = {
+	.name = "rockchip_panel",
+	.id = UCLASS_PANEL,
+	.of_match = rockchip_panel_ids,
+	.bind	= rockchip_panel_bind,
+	.probe	= rockchip_panel_probe,
+};
+
+const struct drm_display_mode *
+rockchip_get_display_mode_from_panel(struct display_state *state)
+{
+	struct panel_state *panel_state = &state->panel_state;
+	const struct rockchip_panel *panel = panel_state->panel;
+
+	if (!panel || !panel->data)
+		return NULL;
+
+	return (const struct drm_display_mode *)panel->data;
+}
+
+#if 0
+const struct rockchip_panel *rockchip_get_panel(const void *blob, int node)
+{
+	const char *name;
+	int i;
+
+	name = fdt_stringlist_get(blob, node, "compatible", 0, NULL);
+
+	for (i = 0; i < ARRAY_SIZE(g_panel); i++)
+		if (!strcmp(name, g_panel[i].compatible))
+			break;
+
+	if (i >= ARRAY_SIZE(g_panel))
+		return NULL;
+
+	return &g_panel[i];
+}
+#endif
+
+int rockchip_panel_init(struct display_state *state)
+{
+	struct panel_state *panel_state = &state->panel_state;
+	const struct rockchip_panel *panel = panel_state->panel;
+
+	if (!panel || !panel->funcs || !panel->funcs->init) {
+		printf("%s: failed to find panel init funcs\n", __func__);
+		return -ENODEV;
+	}
+
+	return panel->funcs->init(state);
+}
+
+void rockchip_panel_deinit(struct display_state *state)
+{
+	struct panel_state *panel_state = &state->panel_state;
+	const struct rockchip_panel *panel = panel_state->panel;
+
+	if (!panel || !panel->funcs || !panel->funcs->deinit) {
+		printf("%s: failed to find panel deinit funcs\n", __func__);
+		return;
+	}
+
+	panel->funcs->deinit(state);
+}
+
+int rockchip_panel_prepare(struct display_state *state)
+{
+	struct panel_state *panel_state = &state->panel_state;
+	const struct rockchip_panel *panel = panel_state->panel;
+
+printf("--->yzq %s %d\n", __func__, __LINE__);
+	if (!panel || !panel->funcs || !panel->funcs->prepare) {
+printf("--->yzq %s %d panel=%p\n", __func__, __LINE__, panel);
+printf("--->yzq %s %d panel->funcs=%p\n", __func__, __LINE__, panel->funcs);
+printf("--->yzq %s %d panel->funcs->prepare=%p\n", __func__, __LINE__, panel->funcs->prepare);
+		printf("%s: failed to find panel prepare funcs\n", __func__);
+		return -ENODEV;
+	}
+printf("--->yzq %s %d\n", __func__, __LINE__);
+
+	return panel->funcs->prepare(state);
+}
+
+int rockchip_panel_unprepare(struct display_state *state)
+{
+	struct panel_state *panel_state = &state->panel_state;
+	const struct rockchip_panel *panel = panel_state->panel;
+
+	if (!panel || !panel->funcs || !panel->funcs->unprepare) {
+		printf("%s: failed to find panel unprepare funcs\n", __func__);
+		return -ENODEV;
+	}
+
+	return panel->funcs->unprepare(state);
+}
+
+int rockchip_panel_enable(struct display_state *state)
+{
+	struct panel_state *panel_state = &state->panel_state;
+	const struct rockchip_panel *panel = panel_state->panel;
+
+	if (!panel || !panel->funcs || !panel->funcs->enable) {
+		printf("%s: failed to find panel prepare funcs\n", __func__);
+		return -ENODEV;
+	}
+
+	return panel->funcs->enable(state);
+}
+
+int rockchip_panel_disable(struct display_state *state)
+{
+	struct panel_state *panel_state = &state->panel_state;
+	const struct rockchip_panel *panel = panel_state->panel;
+
+	if (!panel || !panel->funcs || !panel->funcs->disable) {
+		printf("%s: failed to find panel disable funcs\n", __func__);
+		return -ENODEV;
+	}
+
+	return panel->funcs->disable(state);
+}
diff --git a/drivers/video/drm/rockchip_panel.h b/drivers/video/drm/rockchip_panel.h
new file mode 100644
index 0000000000..699128d7cc
--- /dev/null
+++ b/drivers/video/drm/rockchip_panel.h
@@ -0,0 +1,80 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _ROCKCHIP_PANEL_H_
+#define _ROCKCHIP_PANEL_H_
+
+struct rockchip_panel_funcs {
+	int (*init)(struct display_state *state);
+	void (*deinit)(struct display_state *state);
+	int (*prepare)(struct display_state *state);
+	int (*unprepare)(struct display_state *state);
+	int (*enable)(struct display_state *state);
+	int (*disable)(struct display_state *state);
+};
+
+struct rockchip_panel {
+	const struct rockchip_panel_funcs *funcs;
+	const void *data;
+};
+
+
+#ifdef CONFIG_DRM_ROCKCHIP_PANEL
+const struct rockchip_panel *rockchip_get_panel(const void *blob, int node);
+const struct drm_display_mode *
+rockchip_get_display_mode_from_panel(struct display_state *state);
+int rockchip_panel_init(struct display_state *state);
+void rockchip_panel_deinit(struct display_state *state);
+int rockchip_panel_enable(struct display_state *state);
+int rockchip_panel_disable(struct display_state *state);
+int rockchip_panel_prepare(struct display_state *state);
+int rockchip_panel_unprepare(struct display_state *state);
+#else
+static inline struct rockchip_panel *rockchip_get_panel(const void *blob, int node)
+{
+	return NULL;
+}
+
+static inline const struct drm_display_mode *
+rockchip_get_display_mode_from_panel(struct display_state *state)
+{
+	return NULL;
+}
+
+static inline int rockchip_panel_init(struct display_state *state)
+{
+	return -ENODEV;
+}
+
+static inline void rockchip_panel_deinit(struct display_state *state)
+{
+	return;
+}
+
+static inline int rockchip_panel_enable(struct display_state *state)
+{
+	return -ENODEV;
+}
+
+static inline int rockchip_panel_disable(struct display_state *state)
+{
+	return -ENODEV;
+}
+
+static inline int rockchip_panel_prepare(struct display_state *state)
+{
+	return -ENODEV;
+}
+
+static inline int rockchip_panel_unprepare(struct display_state *state)
+{
+	return -ENODEV;
+}
+#endif
+
+extern const struct rockchip_panel_funcs panel_simple_funcs;
+extern const struct rockchip_panel_funcs rockchip_dsi_panel_funcs;
+#endif	/* _ROCKCHIP_PANEL_H_ */
diff --git a/drivers/video/drm/rockchip_phy.c b/drivers/video/drm/rockchip_phy.c
new file mode 100644
index 0000000000..dfa8e17bd3
--- /dev/null
+++ b/drivers/video/drm/rockchip_phy.c
@@ -0,0 +1,89 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <config.h>
+#include <common.h>
+#include <errno.h>
+#include <malloc.h>
+#include <fdtdec.h>
+#include <fdt_support.h>
+#include <asm/unaligned.h>
+#include <linux/list.h>
+
+#include "rockchip_display.h"
+#include "rockchip_crtc.h"
+#include "rockchip_connector.h"
+#include "rockchip_phy.h"
+
+static const struct rockchip_phy g_phy[] = {
+#ifdef CONFIG_ROCKCHIP_DW_MIPI_DSI
+	{
+	 .compatible = "rockchip,rk3366-mipi-dphy",
+	 .funcs = &inno_mipi_dphy_funcs,
+	},
+	{
+	 .compatible = "rockchip,rk3368-mipi-dphy",
+	 .funcs = &inno_mipi_dphy_funcs,
+	},
+#endif
+};
+
+const struct rockchip_phy *rockchip_get_phy(const void *blob, int phy_node)
+{
+	const char *name;
+	int i;
+
+	name = fdt_stringlist_get(blob, phy_node, "compatible", 0, NULL);
+
+	for (i = 0; i < ARRAY_SIZE(g_phy); i++) {
+		if (!strcmp(name, g_phy[i].compatible))
+			break;
+	}
+	if (i >= ARRAY_SIZE(g_phy))
+		return NULL;
+
+	return &g_phy[i];
+}
+
+int rockchip_phy_power_on(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	const struct rockchip_phy *phy = conn_state->phy;
+
+	if (!phy || !phy->funcs || !phy->funcs->power_on) {
+		printf("%s: failed to find phy power on funcs\n", __func__);
+		return -ENODEV;
+	}
+
+	return phy->funcs->power_on(state);
+}
+
+int rockchip_phy_power_off(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	const struct rockchip_phy *phy = conn_state->phy;
+
+	if (!phy || !phy->funcs || !phy->funcs->power_off) {
+		printf("%s: failed to find phy power_off funcs\n", __func__);
+		return -ENODEV;
+	}
+
+	return phy->funcs->power_off(state);
+}
+
+unsigned long rockchip_phy_set_pll(struct display_state *state,
+				   unsigned long rate)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	const struct rockchip_phy *phy = conn_state->phy;
+
+	if (!phy || !phy->funcs || !phy->funcs->set_pll) {
+		printf("%s: failed to find phy set_pll funcs\n", __func__);
+		return -ENODEV;
+	}
+
+	return phy->funcs->set_pll(state, rate);
+}
diff --git a/drivers/video/drm/rockchip_phy.h b/drivers/video/drm/rockchip_phy.h
new file mode 100644
index 0000000000..62fff2b1ce
--- /dev/null
+++ b/drivers/video/drm/rockchip_phy.h
@@ -0,0 +1,34 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _ROCKCHIP_PHY_H_
+#define _ROCKCHIP_PHY_H_
+
+struct rockchip_phy_funcs {
+	int (*init)(struct display_state *state);
+	int (*power_on)(struct display_state *state);
+	int (*power_off)(struct display_state *state);
+	unsigned long (*set_pll)(struct display_state *state,
+				 unsigned long rate);
+};
+
+struct rockchip_phy {
+	char compatible[30];
+	const struct rockchip_phy_funcs *funcs;
+	const void *data;
+};
+
+const struct rockchip_phy *
+rockchip_get_phy(const void *blob, int phy_node);
+int rockchip_phy_power_off(struct display_state *state);
+int rockchip_phy_power_on(struct display_state *state);
+unsigned long rockchip_phy_set_pll(struct display_state *state,
+				   unsigned long rate);
+
+#ifdef CONFIG_ROCKCHIP_DW_MIPI_DSI
+extern const struct rockchip_phy_funcs inno_mipi_dphy_funcs;
+#endif
+#endif
diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
new file mode 100644
index 0000000000..fda346e8e8
--- /dev/null
+++ b/drivers/video/drm/rockchip_vop.c
@@ -0,0 +1,515 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <config.h>
+#include <common.h>
+#include <errno.h>
+#include <malloc.h>
+#include <fdtdec.h>
+#include <fdt_support.h>
+#include <asm/unaligned.h>
+#include <asm/io.h>
+#include <linux/list.h>
+#include <linux/media-bus-format.h>
+#include <clk.h>
+#include <asm/arch/clock.h>
+#include <linux/err.h>
+
+#include "rockchip_display.h"
+#include "rockchip_crtc.h"
+#include "rockchip_connector.h"
+#include "rockchip_vop.h"
+
+static inline int us_to_vertical_line(struct drm_display_mode *mode, int us)
+{
+	return us * mode->clock / mode->htotal / 1000;
+}
+#if 0
+static int rockchip_vop_init_gamma(struct vop *vop, struct display_state *state)
+{
+	struct crtc_state *crtc_state = &state->crtc_state;
+	struct connector_state *conn_state = &state->conn_state;
+	u32 *lut = conn_state->gamma.lut;
+	int node = crtc_state->node;
+	fdt_size_t lut_size;
+	int i, lut_len;
+	u32 *lut_regs;
+
+	if (!conn_state->gamma.lut)
+		return 0;
+
+	i = fdt_find_string(state->blob, node, "reg-names", "gamma_lut");
+	if (i < 0) {
+		printf("Warning: vop not support gamma\n");
+		return 0;
+	}
+	lut_regs = (u32 *)fdtdec_get_addr_size_auto_noparent(state->blob,
+							     node, "reg",
+							     i, &lut_size);
+	if (lut_regs == (u32 *)FDT_ADDR_T_NONE) {
+		printf("failed to get gamma lut register\n");
+		return 0;
+	}
+	lut_len = lut_size / 4;
+	if (lut_len != 256 && lut_len != 1024) {
+		printf("Warning: unsupport gamma lut table[%d]\n", lut_len);
+		return 0;
+	}
+
+	if (conn_state->gamma.size != lut_len) {
+		int size = conn_state->gamma.size;
+		u32 j, r, g, b, color;
+
+		for (i = 0; i < lut_len; i++) {
+			j = i * size / lut_len;
+			r = lut[j] / size / size * lut_len / size;
+			g = lut[j] / size % size * lut_len / size;
+			b = lut[j] % size * lut_len / size;
+			color = r * lut_len * lut_len + g * lut_len + b;
+
+			writel(color, lut_regs + (i << 2));
+		}
+	} else {
+		for (i = 0; i < lut_len; i++)
+			writel(lut[i], lut_regs + (i << 2));
+	}
+
+	VOP_CTRL_SET(vop, dsp_lut_en, 1);
+	VOP_CTRL_SET(vop, update_gamma_lut, 1);
+
+	return 0;
+}
+#endif
+
+static int rockchip_vop_init(struct display_state *state)
+{
+	struct crtc_state *crtc_state = &state->crtc_state;
+	struct connector_state *conn_state = &state->conn_state;
+	struct drm_display_mode *mode = &conn_state->mode;
+	const struct rockchip_crtc *crtc = crtc_state->crtc;
+	const struct vop_data *vop_data = crtc->data;
+	struct vop *vop;
+	u16 hsync_len = mode->hsync_end - mode->hsync_start;
+	u16 hdisplay = mode->hdisplay;
+	u16 htotal = mode->htotal;
+	u16 hact_st = mode->htotal - mode->hsync_start;
+	u16 hact_end = hact_st + hdisplay;
+	u16 vdisplay = mode->vdisplay;
+	u16 vtotal = mode->vtotal;
+	u16 vsync_len = mode->vsync_end - mode->vsync_start;
+	u16 vact_st = mode->vtotal - mode->vsync_start;
+	u16 vact_end = vact_st + vdisplay;
+	struct clk aclk, hclk, dclk;
+	u32 val;
+	int i, ret;
+	int rate;
+
+	vop = malloc(sizeof(*vop));
+	if (!vop)
+		return -ENOMEM;
+	memset(vop, 0, sizeof(*vop));
+
+	crtc_state->private = vop;
+	vop->regs = (void *)fdtdec_get_addr_size_auto_noparent(state->blob,
+					crtc_state->node, "reg", 0, NULL, false);
+	vop->regsbak = malloc(vop_data->reg_len);
+	vop->win = vop_data->win;
+	vop->win_offset = vop_data->win_offset;
+	vop->ctrl = vop_data->ctrl;
+	vop->line_flag = vop_data->line_flag;
+	vop->version = vop_data->version;
+
+	ret = clk_get_by_name(crtc_state->dev, "aclk_vop", &aclk);
+	if (IS_ERR_VALUE(ret)) {
+		printf("%s: Failed to get aclk: ret=%d\n", __func__, ret);
+		return ret;
+	}
+#if 0
+	ret = clk_set_rate(&aclk, 384 * 1000 * 1000);
+	if (IS_ERR_VALUE(ret)) {
+		printf("%s: Failed to set aclk: ret=%d\n", __func__, ret);
+		return ret;
+	}
+#endif
+#if 0
+
+	ret = clk_get_by_name(crtc_state->dev, "hclk_vop", &hclk);
+	if (!ret)
+		ret = clk_set_rate(&hclk, 100 * 1000 * 1000);
+	if (IS_ERR_VALUE(ret)) {
+		printf("%s: Failed to set aclk: ret=%d\n", __func__, ret);
+		return ret;
+	}
+#endif
+
+	ret = clk_get_by_name(crtc_state->dev, "dclk_vop", &dclk);
+	if (!ret)
+		ret = clk_set_rate(&dclk, mode->clock * 1000);
+	if (IS_ERR_VALUE(ret)) {
+		printf("%s: Failed to set aclk: ret=%d\n", __func__, ret);
+		return ret;
+	}
+
+#if 0
+#ifdef CONFIG_RKCHIP_RK3399
+	/* Set Dclk pll parent */
+	if (conn_state->type == DRM_MODE_CONNECTOR_HDMIA)
+		rkclk_lcdc_dclk_pll_sel(crtc_state->crtc_id, 0);
+	else
+		rkclk_lcdc_dclk_pll_sel(crtc_state->crtc_id, 1);
+#endif
+
+	/* Set aclk hclk and dclk */
+	rate = rkclk_lcdc_clk_set(crtc_state->crtc_id, mode->clock * 1000);
+	if (rate != mode->clock * 1000) {
+		printf("Warn: vop clk request %dhz, but real clock is %dhz",
+		       mode->clock * 1000, rate);
+	}
+#endif
+	memcpy(vop->regsbak, vop->regs, vop_data->reg_len);
+
+	//rockchip_vop_init_gamma(vop, state);
+
+	VOP_CTRL_SET(vop, global_regdone_en, 1);
+	VOP_CTRL_SET(vop, win_gate[0], 1);
+	VOP_CTRL_SET(vop, win_gate[1], 1);
+	VOP_CTRL_SET(vop, dsp_blank, 0);
+
+	val = 0x8;
+	val |= (mode->flags & DRM_MODE_FLAG_NHSYNC) ? 0 : 1;
+	val |= (mode->flags & DRM_MODE_FLAG_NVSYNC) ? 0 : (1 << 1);
+	VOP_CTRL_SET(vop, pin_pol, val);
+
+	switch (conn_state->type) {
+	case DRM_MODE_CONNECTOR_LVDS:
+		VOP_CTRL_SET(vop, rgb_en, 1);
+		VOP_CTRL_SET(vop, rgb_pin_pol, val);
+		break;
+	case DRM_MODE_CONNECTOR_eDP:
+		VOP_CTRL_SET(vop, edp_en, 1);
+		VOP_CTRL_SET(vop, edp_pin_pol, val);
+		break;
+	case DRM_MODE_CONNECTOR_HDMIA:
+		VOP_CTRL_SET(vop, hdmi_en, 1);
+		VOP_CTRL_SET(vop, hdmi_pin_pol, val);
+		break;
+	case DRM_MODE_CONNECTOR_DSI:
+		VOP_CTRL_SET(vop, mipi_en, 1);
+		VOP_CTRL_SET(vop, mipi_pin_pol, val);
+		VOP_CTRL_SET(vop, mipi_dual_channel_en,
+			!!(conn_state->output_type & ROCKCHIP_OUTPUT_DSI_DUAL_CHANNEL));
+		VOP_CTRL_SET(vop, data01_swap,
+			!!(conn_state->output_type & ROCKCHIP_OUTPUT_DSI_DUAL_LINK));
+		break;
+	default:
+		printf("unsupport connector_type[%d]\n", conn_state->type);
+	}
+
+	if (conn_state->output_mode == ROCKCHIP_OUT_MODE_AAAA &&
+	    !(vop_data->feature & VOP_FEATURE_OUTPUT_10BIT))
+		conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
+
+	switch (conn_state->bus_format) {
+	case MEDIA_BUS_FMT_RGB565_1X16:
+		val = DITHER_DOWN_EN(1) | DITHER_DOWN_MODE(RGB888_TO_RGB565);
+		break;
+	case MEDIA_BUS_FMT_RGB666_1X18:
+	case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
+		val = DITHER_DOWN_EN(1) | DITHER_DOWN_MODE(RGB888_TO_RGB666);
+		break;
+	case MEDIA_BUS_FMT_RGB888_1X24:
+	default:
+		val = DITHER_DOWN_EN(0) | PRE_DITHER_DOWN_EN(0);
+		break;
+	}
+	if (conn_state->output_mode == ROCKCHIP_OUT_MODE_AAAA)
+		val |= PRE_DITHER_DOWN_EN(0);
+	else
+		val |= PRE_DITHER_DOWN_EN(1);
+	val |= DITHER_DOWN_MODE_SEL(DITHER_DOWN_ALLEGRO);
+	VOP_CTRL_SET(vop, dither_down, val);
+
+	VOP_CTRL_SET(vop, out_mode, conn_state->output_mode);
+	VOP_CTRL_SET(vop, htotal_pw, (htotal << 16) | hsync_len);
+	val = hact_st << 16;
+	val |= hact_end;
+	VOP_CTRL_SET(vop, hact_st_end, val);
+	VOP_CTRL_SET(vop, hpost_st_end, val);
+	VOP_CTRL_SET(vop, vtotal_pw, (vtotal << 16) | vsync_len);
+	val = vact_st << 16;
+	val |= vact_end;
+	VOP_CTRL_SET(vop, vact_st_end, val);
+	VOP_CTRL_SET(vop, vpost_st_end, val);
+	VOP_CTRL_SET(vop, standby, 1);
+	VOP_LINE_FLAG_SET(vop, line_flag_num[0], vact_end - 3);
+	VOP_LINE_FLAG_SET(vop, line_flag_num[1],
+			  vact_end - us_to_vertical_line(mode, 1000));
+	vop_cfg_done(vop);
+
+	return 0;
+}
+
+static uint16_t scl_vop_cal_scale(enum scale_mode mode, uint32_t src,
+				  uint32_t dst, bool is_horizontal,
+				  int vsu_mode, int *vskiplines)
+{
+	uint16_t val = 1 << SCL_FT_DEFAULT_FIXPOINT_SHIFT;
+
+	if (is_horizontal) {
+		if (mode == SCALE_UP)
+			val = GET_SCL_FT_BIC(src, dst);
+		else if (mode == SCALE_DOWN)
+			val = GET_SCL_FT_BILI_DN(src, dst);
+	} else {
+		if (mode == SCALE_UP) {
+			if (vsu_mode == SCALE_UP_BIL)
+				val = GET_SCL_FT_BILI_UP(src, dst);
+			else
+				val = GET_SCL_FT_BIC(src, dst);
+		} else if (mode == SCALE_DOWN) {
+			if (vskiplines) {
+				*vskiplines = scl_get_vskiplines(src, dst);
+				val = scl_get_bili_dn_vskip(src, dst,
+							    *vskiplines);
+			} else {
+				val = GET_SCL_FT_BILI_DN(src, dst);
+			}
+		}
+	}
+
+	return val;
+}
+
+static void scl_vop_cal_scl_fac(struct vop *vop,
+				uint32_t src_w, uint32_t src_h, uint32_t dst_w,
+				uint32_t dst_h, uint32_t pixel_format)
+{
+	uint16_t yrgb_hor_scl_mode, yrgb_ver_scl_mode;
+	uint16_t cbcr_hor_scl_mode = SCALE_NONE;
+	uint16_t cbcr_ver_scl_mode = SCALE_NONE;
+	int hsub = drm_format_horz_chroma_subsampling(pixel_format);
+	int vsub = drm_format_vert_chroma_subsampling(pixel_format);
+	bool is_yuv = false;
+	uint16_t cbcr_src_w = src_w / hsub;
+	uint16_t cbcr_src_h = src_h / vsub;
+	uint16_t vsu_mode;
+	uint16_t lb_mode;
+	uint32_t val;
+	int vskiplines = 0;
+
+	if (!vop->win->scl)
+		return;
+
+	if (dst_w > 3840) {
+		printf("Maximum destination width (3840) exceeded\n");
+		return;
+	}
+
+	if (!vop->win->scl->ext) {
+		VOP_SCL_SET(vop, scale_yrgb_x,
+			    scl_cal_scale2(src_w, dst_w));
+		VOP_SCL_SET(vop, scale_yrgb_y,
+			    scl_cal_scale2(src_h, dst_h));
+		if (is_yuv) {
+			VOP_SCL_SET(vop, scale_cbcr_x,
+				    scl_cal_scale2(src_w, dst_w));
+			VOP_SCL_SET(vop, scale_cbcr_y,
+				    scl_cal_scale2(src_h, dst_h));
+		}
+		return;
+	}
+
+	yrgb_hor_scl_mode = scl_get_scl_mode(src_w, dst_w);
+	yrgb_ver_scl_mode = scl_get_scl_mode(src_h, dst_h);
+
+	if (is_yuv) {
+		cbcr_hor_scl_mode = scl_get_scl_mode(cbcr_src_w, dst_w);
+		cbcr_ver_scl_mode = scl_get_scl_mode(cbcr_src_h, dst_h);
+		if (cbcr_hor_scl_mode == SCALE_DOWN)
+			lb_mode = scl_vop_cal_lb_mode(dst_w, true);
+		else
+			lb_mode = scl_vop_cal_lb_mode(cbcr_src_w, true);
+	} else {
+		if (yrgb_hor_scl_mode == SCALE_DOWN)
+			lb_mode = scl_vop_cal_lb_mode(dst_w, false);
+		else
+			lb_mode = scl_vop_cal_lb_mode(src_w, false);
+	}
+
+	VOP_SCL_SET_EXT(vop, lb_mode, lb_mode);
+	if (lb_mode == LB_RGB_3840X2) {
+		if (yrgb_ver_scl_mode != SCALE_NONE) {
+			printf("ERROR : not allow yrgb ver scale\n");
+			return;
+		}
+		if (cbcr_ver_scl_mode != SCALE_NONE) {
+			printf("ERROR : not allow cbcr ver scale\n");
+			return;
+		}
+		vsu_mode = SCALE_UP_BIL;
+	} else if (lb_mode == LB_RGB_2560X4) {
+		vsu_mode = SCALE_UP_BIL;
+	} else {
+		vsu_mode = SCALE_UP_BIC;
+	}
+
+	val = scl_vop_cal_scale(yrgb_hor_scl_mode, src_w, dst_w,
+				true, 0, NULL);
+	VOP_SCL_SET(vop, scale_yrgb_x, val);
+	val = scl_vop_cal_scale(yrgb_ver_scl_mode, src_h, dst_h,
+				false, vsu_mode, &vskiplines);
+	VOP_SCL_SET(vop, scale_yrgb_y, val);
+
+	VOP_SCL_SET_EXT(vop, vsd_yrgb_gt4, vskiplines == 4);
+	VOP_SCL_SET_EXT(vop, vsd_yrgb_gt2, vskiplines == 2);
+
+	VOP_SCL_SET_EXT(vop, yrgb_hor_scl_mode, yrgb_hor_scl_mode);
+	VOP_SCL_SET_EXT(vop, yrgb_ver_scl_mode, yrgb_ver_scl_mode);
+	VOP_SCL_SET_EXT(vop, yrgb_hsd_mode, SCALE_DOWN_BIL);
+	VOP_SCL_SET_EXT(vop, yrgb_vsd_mode, SCALE_DOWN_BIL);
+	VOP_SCL_SET_EXT(vop, yrgb_vsu_mode, vsu_mode);
+	if (is_yuv) {
+		val = scl_vop_cal_scale(cbcr_hor_scl_mode, cbcr_src_w,
+					dst_w, true, 0, NULL);
+		VOP_SCL_SET(vop, scale_cbcr_x, val);
+		val = scl_vop_cal_scale(cbcr_ver_scl_mode, cbcr_src_h,
+					dst_h, false, vsu_mode, &vskiplines);
+		VOP_SCL_SET(vop, scale_cbcr_y, val);
+
+		VOP_SCL_SET_EXT(vop, vsd_cbcr_gt4, vskiplines == 4);
+		VOP_SCL_SET_EXT(vop, vsd_cbcr_gt2, vskiplines == 2);
+		VOP_SCL_SET_EXT(vop, cbcr_hor_scl_mode, cbcr_hor_scl_mode);
+		VOP_SCL_SET_EXT(vop, cbcr_ver_scl_mode, cbcr_ver_scl_mode);
+		VOP_SCL_SET_EXT(vop, cbcr_hsd_mode, SCALE_DOWN_BIL);
+		VOP_SCL_SET_EXT(vop, cbcr_vsd_mode, SCALE_DOWN_BIL);
+		VOP_SCL_SET_EXT(vop, cbcr_vsu_mode, vsu_mode);
+	}
+}
+
+static int rockchip_vop_set_plane(struct display_state *state)
+{
+	struct crtc_state *crtc_state = &state->crtc_state;
+	struct connector_state *conn_state = &state->conn_state;
+	struct drm_display_mode *mode = &conn_state->mode;
+	u32 act_info, dsp_info, dsp_st, dsp_stx, dsp_sty;
+	struct vop *vop = crtc_state->private;
+	int src_w = crtc_state->src_w;
+	int src_h = crtc_state->src_h;
+	int crtc_x = crtc_state->crtc_x;
+	int crtc_y = crtc_state->crtc_y;
+	int crtc_w = crtc_state->crtc_w;
+	int crtc_h = crtc_state->crtc_h;
+	int xvir = crtc_state->xvir;
+
+	act_info = (src_h - 1) << 16;
+	act_info |= (src_w - 1) & 0xffff;
+
+	dsp_info = (crtc_h - 1) << 16;
+	dsp_info |= (crtc_w - 1) & 0xffff;
+
+	dsp_stx = crtc_x + mode->htotal - mode->hsync_start;
+	dsp_sty = crtc_y + mode->vtotal - mode->vsync_start;
+	dsp_st = dsp_sty << 16 | (dsp_stx & 0xffff);
+
+	if (crtc_state->ymirror)
+		crtc_state->dma_addr += (src_h - 1) * xvir * 4;
+	VOP_WIN_SET(vop, ymirror, crtc_state->ymirror);
+	VOP_WIN_SET(vop, format, crtc_state->format);
+	VOP_WIN_SET(vop, yrgb_vir, xvir);
+	VOP_WIN_SET(vop, yrgb_mst, crtc_state->dma_addr);
+
+	scl_vop_cal_scl_fac(vop, src_w, src_h, crtc_w, crtc_h,
+			    crtc_state->format);
+
+	VOP_WIN_SET(vop, act_info, act_info);
+	VOP_WIN_SET(vop, dsp_info, dsp_info);
+	VOP_WIN_SET(vop, dsp_st, dsp_st);
+	VOP_WIN_SET(vop, rb_swap, crtc_state->rb_swap);
+
+	VOP_WIN_SET(vop, src_alpha_ctl, 0);
+
+	VOP_WIN_SET(vop, enable, 1);
+	vop_cfg_done(vop);
+
+	return 0;
+}
+
+static int rockchip_vop_prepare(struct display_state *state)
+{
+	return 0;
+}
+
+static int rockchip_vop_enable(struct display_state *state)
+{
+	struct crtc_state *crtc_state = &state->crtc_state;
+	struct vop *vop = crtc_state->private;
+
+	VOP_CTRL_SET(vop, standby, 0);
+	vop_cfg_done(vop);
+
+	return 0;
+}
+
+static int rockchip_vop_disable(struct display_state *state)
+{
+	struct crtc_state *crtc_state = &state->crtc_state;
+	struct vop *vop = crtc_state->private;
+
+	VOP_CTRL_SET(vop, standby, 1);
+	vop_cfg_done(vop);
+	return 0;
+}
+
+static int rockchip_vop_fixup_dts(struct display_state *state, void *blob)
+{
+	struct crtc_state *crtc_state = &state->crtc_state;
+	struct panel_state *pstate = &state->panel_state;
+	uint32_t phandle;
+	char path[100];
+	int ret, dsp_lut_node;
+
+	if (!pstate->dsp_lut_node)
+		return 0;
+
+	ret = fdt_get_path(state->blob, pstate->dsp_lut_node, path, sizeof(path));
+	if (ret < 0) {
+		printf("failed to get dsp_lut path[%s], ret=%d\n",
+			path, ret);
+		return ret;
+	}
+
+	dsp_lut_node = fdt_path_offset(blob, path);
+	phandle = fdt_get_phandle(blob, dsp_lut_node);
+	if (!phandle) {
+		phandle = fdt_alloc_phandle(blob);
+		if (!phandle) {
+			printf("failed to alloc phandle\n");
+			return -ENOMEM;
+		}
+
+		fdt_set_phandle(blob, dsp_lut_node, phandle);
+	}
+
+	ret = fdt_get_path(state->blob, crtc_state->node, path, sizeof(path));
+	if (ret < 0) {
+		printf("failed to get route path[%s], ret=%d\n",
+			path, ret);
+		return ret;
+	}
+
+	do_fixup_by_path_u32(blob, path, "dsp-lut", phandle, 1);
+
+	return 0;
+}
+
+const struct rockchip_crtc_funcs rockchip_vop_funcs = {
+	.init = rockchip_vop_init,
+	.set_plane = rockchip_vop_set_plane,
+	.prepare = rockchip_vop_prepare,
+	.enable = rockchip_vop_enable,
+	.disable = rockchip_vop_disable,
+	.fixup_dts = rockchip_vop_fixup_dts,
+};
diff --git a/drivers/video/drm/rockchip_vop.h b/drivers/video/drm/rockchip_vop.h
new file mode 100644
index 0000000000..387632ea75
--- /dev/null
+++ b/drivers/video/drm/rockchip_vop.h
@@ -0,0 +1,427 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _ROCKCHIP_VOP_H_
+#define _ROCKCHIP_VOP_H_
+
+/*
+ * major: IP major vertion, used for IP structure
+ * minor: big feature change under same structure
+ */
+#define VOP_VERSION(major, minor)	((major) << 8 | (minor))
+#define VOP_MAJOR(version) 	((version) >> 8)
+#define VOP_MINOR(version) 	((version) & 0xff)
+
+#define VOP_REG_SUPPORT(vop, reg) \
+		(!reg.major || (reg.major == VOP_MAJOR(vop->version) && \
+		reg.begin_minor <= VOP_MINOR(vop->version) && \
+		reg.end_minor >= VOP_MINOR(vop->version) && \
+		reg.mask))
+
+#define VOP_WIN_SUPPORT(vop, win, name) \
+		VOP_REG_SUPPORT(vop, win->phy->name)
+
+#define VOP_CTRL_SUPPORT(vop, name) \
+		VOP_REG_SUPPORT(vop, vop->ctrl->name)
+
+#define __REG_SET(x, off, mask, shift, v, write_mask) \
+		vop_mask_write(x, off, mask, shift, v, write_mask)
+
+#define _REG_SET(vop, name, off, reg, mask, v) \
+	do { \
+		if (VOP_REG_SUPPORT(vop, reg)) \
+			__REG_SET(vop, off + reg.offset, mask, reg.shift, \
+				  v, reg.write_mask); \
+		else \
+			debug("Warning: not support "#name"\n"); \
+	} while(0)
+
+#define REG_SET(x, name, off, reg, v) \
+		_REG_SET(x, name, off, reg, reg.mask, v)
+#define REG_SET_MASK(x, name, off, reg, mask, v, relaxed) \
+		_REG_SET(x, name, off, reg, reg.mask & mask, v)
+
+#define VOP_WIN_SET(x, name, v) \
+		REG_SET(x, name, x->win_offset, x->win->name, v)
+#define VOP_WIN_SET_EXT(x, ext, name, v) \
+		REG_SET(x, name, x->win_offset, x->win->ext->name, v)
+#define VOP_SCL_SET(x, name, v) \
+		REG_SET(x, name, x->win_offset, x->win->scl->name, v)
+#define VOP_SCL_SET_EXT(x, name, v) \
+		REG_SET(x, name, x->win_offset, x->win->scl->ext->name, v)
+
+#define VOP_CTRL_SET(x, name, v) \
+		REG_SET(x, name, 0, (x)->ctrl->name, v)
+#define VOP_LINE_FLAG_SET(x, name, v) \
+		REG_SET(x, name, 0, (x)->line_flag->name, v)
+
+#define VOP_CTRL_GET(x, name) \
+		vop_read_reg(x, 0, &vop->ctrl->name)
+
+#define VOP_WIN_GET(x, name) \
+		vop_read_reg(x, vop->win->offset, &vop->win->name)
+
+enum alpha_mode {
+	ALPHA_STRAIGHT,
+	ALPHA_INVERSE,
+};
+
+enum global_blend_mode {
+	ALPHA_GLOBAL,
+	ALPHA_PER_PIX,
+	ALPHA_PER_PIX_GLOBAL,
+};
+
+enum alpha_cal_mode {
+	ALPHA_SATURATION,
+	ALPHA_NO_SATURATION,
+};
+
+enum color_mode {
+	ALPHA_SRC_PRE_MUL,
+	ALPHA_SRC_NO_PRE_MUL,
+};
+
+enum factor_mode {
+	ALPHA_ZERO,
+	ALPHA_ONE,
+	ALPHA_SRC,
+	ALPHA_SRC_INVERSE,
+	ALPHA_SRC_GLOBAL,
+};
+
+enum scale_mode {
+	SCALE_NONE = 0x0,
+	SCALE_UP   = 0x1,
+	SCALE_DOWN = 0x2
+};
+
+enum lb_mode {
+	LB_YUV_3840X5 = 0x0,
+	LB_YUV_2560X8 = 0x1,
+	LB_RGB_3840X2 = 0x2,
+	LB_RGB_2560X4 = 0x3,
+	LB_RGB_1920X5 = 0x4,
+	LB_RGB_1280X8 = 0x5
+};
+
+enum sacle_up_mode {
+	SCALE_UP_BIL = 0x0,
+	SCALE_UP_BIC = 0x1
+};
+
+enum scale_down_mode {
+	SCALE_DOWN_BIL = 0x0,
+	SCALE_DOWN_AVG = 0x1
+};
+
+enum dither_down_mode {
+	RGB888_TO_RGB565 = 0x0,
+	RGB888_TO_RGB666 = 0x1
+};
+
+enum dither_down_mode_sel {
+	DITHER_DOWN_ALLEGRO = 0x0,
+	DITHER_DOWN_FRC = 0x1
+};
+
+#define PRE_DITHER_DOWN_EN(x)	((x) << 0)
+#define DITHER_DOWN_EN(x)	((x) << 1)
+#define DITHER_DOWN_MODE(x)	((x) << 2)
+#define DITHER_DOWN_MODE_SEL(x)	((x) << 3)
+
+#define FRAC_16_16(mult, div)    (((mult) << 16) / (div))
+#define SCL_FT_DEFAULT_FIXPOINT_SHIFT	12
+#define SCL_MAX_VSKIPLINES		4
+#define MIN_SCL_FT_AFTER_VSKIP		1
+
+static inline uint16_t scl_cal_scale(int src, int dst, int shift)
+{
+	return ((src * 2 - 3) << (shift - 1)) / (dst - 1);
+}
+
+static inline uint16_t scl_cal_scale2(int src, int dst)
+{
+	return ((src - 1) << 12) / (dst - 1);
+}
+
+#define GET_SCL_FT_BILI_DN(src, dst)	scl_cal_scale(src, dst, 12)
+#define GET_SCL_FT_BILI_UP(src, dst)	scl_cal_scale(src, dst, 16)
+#define GET_SCL_FT_BIC(src, dst)	scl_cal_scale(src, dst, 16)
+
+static inline uint16_t scl_get_bili_dn_vskip(int src_h, int dst_h,
+					     int vskiplines)
+{
+	int act_height;
+
+	act_height = (src_h + vskiplines - 1) / vskiplines;
+
+	return GET_SCL_FT_BILI_DN(act_height, dst_h);
+}
+
+static inline enum scale_mode scl_get_scl_mode(int src, int dst)
+{
+	if (src < dst)
+		return SCALE_UP;
+	else if (src > dst)
+		return SCALE_DOWN;
+
+	return SCALE_NONE;
+}
+
+static inline int scl_get_vskiplines(uint32_t srch, uint32_t dsth)
+{
+	uint32_t vskiplines;
+
+	for (vskiplines = SCL_MAX_VSKIPLINES; vskiplines > 1; vskiplines /= 2)
+		if (srch >= vskiplines * dsth * MIN_SCL_FT_AFTER_VSKIP)
+			break;
+
+	return vskiplines;
+}
+
+static inline int scl_vop_cal_lb_mode(int width, bool is_yuv)
+{
+	int lb_mode;
+
+	if (width > 2560)
+		lb_mode = LB_RGB_3840X2;
+	else if (width > 1920)
+		lb_mode = LB_RGB_2560X4;
+	else if (!is_yuv)
+		lb_mode = LB_RGB_1920X5;
+	else if (width > 1280)
+		lb_mode = LB_YUV_3840X5;
+	else
+		lb_mode = LB_YUV_2560X8;
+
+	return lb_mode;
+}
+
+struct vop_reg_data {
+	uint32_t offset;
+	uint32_t value;
+};
+
+struct vop_reg {
+	uint32_t mask;
+	uint32_t offset:12;
+	uint32_t shift:5;
+	uint32_t begin_minor:4;
+	uint32_t end_minor:4;
+	uint32_t major:3;
+	uint32_t write_mask:1;
+};
+
+struct vop_ctrl {
+	struct vop_reg standby;
+	struct vop_reg htotal_pw;
+	struct vop_reg hact_st_end;
+	struct vop_reg vtotal_pw;
+	struct vop_reg vact_st_end;
+	struct vop_reg vact_st_end_f1;
+	struct vop_reg vs_st_end_f1;
+	struct vop_reg hpost_st_end;
+	struct vop_reg vpost_st_end;
+	struct vop_reg vpost_st_end_f1;
+	struct vop_reg post_scl_factor;
+	struct vop_reg post_scl_ctrl;
+	struct vop_reg dsp_interlace;
+	struct vop_reg global_regdone_en;
+	struct vop_reg auto_gate_en;
+	struct vop_reg post_lb_mode;
+	struct vop_reg dsp_layer_sel;
+	struct vop_reg overlay_mode;
+	struct vop_reg core_dclk_div;
+	struct vop_reg dclk_ddr;
+	struct vop_reg p2i_en;
+	struct vop_reg rgb_en;
+	struct vop_reg edp_en;
+	struct vop_reg hdmi_en;
+	struct vop_reg mipi_en;
+	struct vop_reg data01_swap;
+	struct vop_reg mipi_dual_channel_en;
+	struct vop_reg dp_en;
+	struct vop_reg pin_pol;
+	struct vop_reg rgb_pin_pol;
+	struct vop_reg hdmi_pin_pol;
+	struct vop_reg edp_pin_pol;
+	struct vop_reg mipi_pin_pol;
+	struct vop_reg dp_pin_pol;
+
+	struct vop_reg dither_up;
+	struct vop_reg dither_down;
+
+	struct vop_reg dsp_out_yuv;
+	struct vop_reg dsp_data_swap;
+	struct vop_reg dsp_ccir656_avg;
+	struct vop_reg dsp_black;
+	struct vop_reg dsp_blank;
+	struct vop_reg dsp_outzero;
+	struct vop_reg dsp_lut_en;
+	struct vop_reg update_gamma_lut;
+
+	struct vop_reg out_mode;
+
+	struct vop_reg xmirror;
+	struct vop_reg ymirror;
+	struct vop_reg dsp_background;
+
+	struct vop_reg win_gate[4];
+	struct vop_reg cfg_done;
+};
+
+struct vop_scl_extension {
+	struct vop_reg cbcr_vsd_mode;
+	struct vop_reg cbcr_vsu_mode;
+	struct vop_reg cbcr_hsd_mode;
+	struct vop_reg cbcr_ver_scl_mode;
+	struct vop_reg cbcr_hor_scl_mode;
+	struct vop_reg yrgb_vsd_mode;
+	struct vop_reg yrgb_vsu_mode;
+	struct vop_reg yrgb_hsd_mode;
+	struct vop_reg yrgb_ver_scl_mode;
+	struct vop_reg yrgb_hor_scl_mode;
+	struct vop_reg line_load_mode;
+	struct vop_reg cbcr_axi_gather_num;
+	struct vop_reg yrgb_axi_gather_num;
+	struct vop_reg vsd_cbcr_gt2;
+	struct vop_reg vsd_cbcr_gt4;
+	struct vop_reg vsd_yrgb_gt2;
+	struct vop_reg vsd_yrgb_gt4;
+	struct vop_reg bic_coe_sel;
+	struct vop_reg cbcr_axi_gather_en;
+	struct vop_reg yrgb_axi_gather_en;
+	struct vop_reg lb_mode;
+};
+
+struct vop_scl_regs {
+	const struct vop_scl_extension *ext;
+
+	struct vop_reg scale_yrgb_x;
+	struct vop_reg scale_yrgb_y;
+	struct vop_reg scale_cbcr_x;
+	struct vop_reg scale_cbcr_y;
+};
+
+struct vop_win {
+	const struct vop_scl_regs *scl;
+
+	struct vop_reg enable;
+	struct vop_reg format;
+	struct vop_reg ymirror;
+	struct vop_reg rb_swap;
+	struct vop_reg act_info;
+	struct vop_reg dsp_info;
+	struct vop_reg dsp_st;
+	struct vop_reg yrgb_mst;
+	struct vop_reg uv_mst;
+	struct vop_reg yrgb_vir;
+	struct vop_reg uv_vir;
+	struct vop_reg alpha_mode;
+	struct vop_reg alpha_en;
+
+	struct vop_reg dst_alpha_ctl;
+	struct vop_reg src_alpha_ctl;
+};
+
+struct vop_line_flag {
+	struct vop_reg line_flag_num[2];
+};
+
+#define VOP_FEATURE_OUTPUT_10BIT	BIT(0)
+
+struct vop_data {
+	uint32_t version;
+	const struct vop_ctrl *ctrl;
+	const struct vop_win *win;
+	const struct vop_line_flag *line_flag;
+	int win_offset;
+	int reg_len;
+	u64 feature;
+};
+
+struct vop {
+	u32 *regsbak;
+	void *regs;
+
+	uint32_t version;
+	const struct vop_ctrl *ctrl;
+	const struct vop_win *win;
+	const struct vop_line_flag *line_flag;
+	int win_offset;
+};
+
+static inline void vop_writel(struct vop *vop, uint32_t offset, uint32_t v)
+{
+	writel(v, vop->regs + offset);
+	vop->regsbak[offset >> 2] = v;
+}
+
+static inline uint32_t vop_readl(struct vop *vop, uint32_t offset)
+{
+	return readl(vop->regs + offset);
+}
+
+static inline uint32_t vop_read_reg(struct vop *vop, uint32_t base,
+				    const struct vop_reg *reg)
+{
+	return (vop_readl(vop, base + reg->offset) >> reg->shift) & reg->mask;
+}
+
+static inline void vop_mask_write(struct vop *vop, uint32_t offset,
+				  uint32_t mask, uint32_t shift, uint32_t v,
+				  bool write_mask)
+{
+	if (!mask)
+		return;
+
+	if (write_mask) {
+		v = ((v & mask) << shift) | (mask << (shift + 16));
+	} else {
+		uint32_t cached_val = vop->regsbak[offset >> 2];
+
+		v = (cached_val & ~(mask << shift)) | ((v & mask) << shift);
+		vop->regsbak[offset >> 2] = v;
+	}
+
+	writel(v, vop->regs + offset);
+}
+
+static inline void vop_cfg_done(struct vop *vop)
+{
+	VOP_CTRL_SET(vop, cfg_done, 1);
+}
+
+/**
+ * drm_format_horz_chroma_subsampling - get the horizontal chroma subsampling factor
+ * @format: pixel format (DRM_FORMAT_*)
+ *
+ * Returns:
+ * The horizontal chroma subsampling factor for the
+ * specified pixel format.
+ */
+static inline int drm_format_horz_chroma_subsampling(uint32_t format)
+{
+	/* uboot only support RGB format */
+	return 1;
+}
+
+/**
+ * drm_format_vert_chroma_subsampling - get the vertical chroma subsampling factor
+ * @format: pixel format (DRM_FORMAT_*)
+ *
+ * Returns:
+ * The vertical chroma subsampling factor for the
+ * specified pixel format.
+ */
+static inline int drm_format_vert_chroma_subsampling(uint32_t format)
+{
+	/* uboot only support RGB format */
+	return 1;
+}
+
+#endif
diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
new file mode 100644
index 0000000000..c8730cf22c
--- /dev/null
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -0,0 +1,319 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <config.h>
+#include <common.h>
+#include <errno.h>
+#include <malloc.h>
+#include <fdtdec.h>
+#include <fdt_support.h>
+#include <asm/unaligned.h>
+#include <asm/io.h>
+#include <linux/list.h>
+
+#include "rockchip_vop.h"
+#include "rockchip_vop_reg.h"
+
+#define VOP_REG_VER_MASK(off, _mask, s, _write_mask, _major, \
+		         _begin_minor, _end_minor) \
+		{.offset = off, \
+		 .mask = _mask, \
+		 .shift = s, \
+		 .write_mask = _write_mask, \
+		 .major = _major, \
+		 .begin_minor = _begin_minor, \
+		 .end_minor = _end_minor,}
+
+#define VOP_REG(off, _mask, s) \
+		VOP_REG_VER_MASK(off, _mask, s, false, 0, 0, -1)
+
+#define VOP_REG_MASK(off, _mask, s) \
+		VOP_REG_VER_MASK(off, _mask, s, true, 0, 0, -1)
+
+#define VOP_REG_VER(off, _mask, s, _major, _begin_minor, _end_minor) \
+		VOP_REG_VER_MASK(off, _mask, s, false, \
+				 _major, _begin_minor, _end_minor)
+
+static const struct vop_scl_extension rk3288_win_full_scl_ext = {
+	.cbcr_vsd_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 31),
+	.cbcr_vsu_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 30),
+	.cbcr_hsd_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 28),
+	.cbcr_ver_scl_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 26),
+	.cbcr_hor_scl_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 24),
+	.yrgb_vsd_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 23),
+	.yrgb_vsu_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 22),
+	.yrgb_hsd_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 20),
+	.yrgb_ver_scl_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 18),
+	.yrgb_hor_scl_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 16),
+	.line_load_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 15),
+	.cbcr_axi_gather_num = VOP_REG(RK3288_WIN0_CTRL1, 0x7, 12),
+	.yrgb_axi_gather_num = VOP_REG(RK3288_WIN0_CTRL1, 0xf, 8),
+	.vsd_cbcr_gt2 = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 7),
+	.vsd_cbcr_gt4 = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 6),
+	.vsd_yrgb_gt2 = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 5),
+	.vsd_yrgb_gt4 = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 4),
+	.bic_coe_sel = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 2),
+	.cbcr_axi_gather_en = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 1),
+	.yrgb_axi_gather_en = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 0),
+	.lb_mode = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 5),
+};
+
+static const struct vop_scl_regs rk3288_win_full_scl = {
+	.ext = &rk3288_win_full_scl_ext,
+	.scale_yrgb_x = VOP_REG(RK3288_WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0),
+	.scale_yrgb_y = VOP_REG(RK3288_WIN0_SCL_FACTOR_YRGB, 0xffff, 16),
+	.scale_cbcr_x = VOP_REG(RK3288_WIN0_SCL_FACTOR_CBR, 0xffff, 0x0),
+	.scale_cbcr_y = VOP_REG(RK3288_WIN0_SCL_FACTOR_CBR, 0xffff, 16),
+};
+
+static const struct vop_win rk3288_win01_data = {
+	.scl = &rk3288_win_full_scl,
+	.enable = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 0),
+	.format = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 1),
+	.rb_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 12),
+	.ymirror = VOP_REG_VER(RK3368_WIN0_CTRL0, 0x1, 22, 3, 2, -1),
+	.act_info = VOP_REG(RK3288_WIN0_ACT_INFO, 0x1fff1fff, 0),
+	.dsp_info = VOP_REG(RK3288_WIN0_DSP_INFO, 0x0fff0fff, 0),
+	.dsp_st = VOP_REG(RK3288_WIN0_DSP_ST, 0x1fff1fff, 0),
+	.yrgb_mst = VOP_REG(RK3288_WIN0_YRGB_MST, 0xffffffff, 0),
+	.uv_mst = VOP_REG(RK3288_WIN0_CBR_MST, 0xffffffff, 0),
+	.yrgb_vir = VOP_REG(RK3288_WIN0_VIR, 0x3fff, 0),
+	.uv_vir = VOP_REG(RK3288_WIN0_VIR, 0x3fff, 16),
+	.src_alpha_ctl = VOP_REG(RK3288_WIN0_SRC_ALPHA_CTRL, 0xffffffff, 0),
+	.dst_alpha_ctl = VOP_REG(RK3288_WIN0_DST_ALPHA_CTRL, 0xffffffff, 0),
+};
+
+static const struct vop_ctrl rk3288_ctrl_data = {
+	.standby = VOP_REG(RK3288_SYS_CTRL, 0x1, 22),
+	.htotal_pw = VOP_REG(RK3288_DSP_HTOTAL_HS_END, 0x1fff1fff, 0),
+	.hact_st_end = VOP_REG(RK3288_DSP_HACT_ST_END, 0x1fff1fff, 0),
+	.vtotal_pw = VOP_REG(RK3288_DSP_VTOTAL_VS_END, 0x1fff1fff, 0),
+	.vact_st_end = VOP_REG(RK3288_DSP_VACT_ST_END, 0x1fff1fff, 0),
+	.vact_st_end_f1 = VOP_REG(RK3288_DSP_VACT_ST_END_F1, 0x1fff1fff, 0),
+	.vs_st_end_f1 = VOP_REG(RK3288_DSP_VS_ST_END_F1, 0x1fff1fff, 0),
+	.hpost_st_end = VOP_REG(RK3288_POST_DSP_HACT_INFO, 0x1fff1fff, 0),
+	.vpost_st_end = VOP_REG(RK3288_POST_DSP_VACT_INFO, 0x1fff1fff, 0),
+	.vpost_st_end_f1 = VOP_REG(RK3288_POST_DSP_VACT_INFO_F1, 0x1fff1fff, 0),
+	.post_scl_factor = VOP_REG(RK3288_POST_SCL_FACTOR_YRGB, 0xffffffff, 0),
+	.post_scl_ctrl = VOP_REG(RK3288_POST_SCL_CTRL, 0x3, 0),
+
+	.dsp_interlace = VOP_REG(RK3288_DSP_CTRL0, 0x1, 10),
+	.auto_gate_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 23),
+	.dsp_layer_sel = VOP_REG(RK3288_DSP_CTRL1, 0xff, 8),
+	.post_lb_mode = VOP_REG_VER(RK3288_SYS_CTRL, 0x1, 18, 3, 2, -1),
+	.global_regdone_en = VOP_REG_VER(RK3288_SYS_CTRL, 0x1, 11, 3, 2, -1),
+	.overlay_mode = VOP_REG_VER(RK3288_SYS_CTRL, 0x1, 16, 3, 2, -1),
+	.core_dclk_div = VOP_REG_VER(RK3399_DSP_CTRL0, 0x1, 4, 3, 4, -1),
+	.p2i_en = VOP_REG_VER(RK3399_DSP_CTRL0, 0x1, 5, 3, 4, -1),
+	.dclk_ddr = VOP_REG_VER(RK3399_DSP_CTRL0, 0x1, 8, 3, 4, -1),
+	.dp_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 11),
+	.rgb_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 12),
+	.hdmi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 13),
+	.edp_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 14),
+	.mipi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 15),
+	.mipi_dual_channel_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 3),
+	.data01_swap = VOP_REG_VER(RK3288_SYS_CTRL, 0x1, 17, 3, 5, -1),
+	.pin_pol = VOP_REG_VER(RK3288_DSP_CTRL0, 0xf, 4, 3, 0, 1),
+	.dp_pin_pol = VOP_REG_VER(RK3368_DSP_CTRL1, 0xf, 16, 3, 2, -1),
+	.rgb_pin_pol = VOP_REG_VER(RK3368_DSP_CTRL1, 0xf, 16, 3, 2, -1),
+	.hdmi_pin_pol = VOP_REG_VER(RK3368_DSP_CTRL1, 0xf, 20, 3, 2, -1),
+	.edp_pin_pol = VOP_REG_VER(RK3368_DSP_CTRL1, 0xf, 24, 3, 2, -1),
+	.mipi_pin_pol = VOP_REG_VER(RK3368_DSP_CTRL1, 0xf, 28, 3, 2, -1),
+
+	.dither_down = VOP_REG(RK3288_DSP_CTRL1, 0xf, 1),
+	.dither_up = VOP_REG(RK3288_DSP_CTRL1, 0x1, 6),
+
+	.dsp_out_yuv = VOP_REG_VER(RK3399_POST_SCL_CTRL, 0x1, 2, 3, 5, -1),
+	.dsp_data_swap = VOP_REG(RK3288_DSP_CTRL0, 0x1f, 12),
+	.dsp_ccir656_avg = VOP_REG(RK3288_DSP_CTRL0, 0x1, 20),
+	.dsp_blank = VOP_REG(RK3288_DSP_CTRL0, 0x3, 18),
+	.dsp_lut_en = VOP_REG(RK3288_DSP_CTRL1, 0x1, 0),
+	.update_gamma_lut = VOP_REG_VER(RK3288_DSP_CTRL1, 0x1, 7, 3, 5, -1),
+	.out_mode = VOP_REG(RK3288_DSP_CTRL0, 0xf, 0),
+
+	.xmirror = VOP_REG(RK3288_DSP_CTRL0, 0x1, 22),
+	.ymirror = VOP_REG(RK3288_DSP_CTRL0, 0x1, 23),
+
+	.dsp_background = VOP_REG(RK3288_DSP_BG, 0xffffffff, 0),
+
+	.cfg_done = VOP_REG(RK3288_REG_CFG_DONE, 0x1, 0),
+	.win_gate[0] = VOP_REG(RK3288_WIN2_CTRL0, 0x1, 0),
+	.win_gate[1] = VOP_REG(RK3288_WIN3_CTRL0, 0x1, 0),
+};
+
+static const struct vop_line_flag rk3288_vop_line_flag = {
+	.line_flag_num[0] = VOP_REG(RK3288_INTR_CTRL0, 0x1fff, 12),
+};
+
+const struct vop_data rk3288_vop = {
+	.version = VOP_VERSION(3, 1),
+	.feature = VOP_FEATURE_OUTPUT_10BIT,
+	.ctrl = &rk3288_ctrl_data,
+	.win = &rk3288_win01_data,
+	.line_flag = &rk3288_vop_line_flag,
+	.reg_len = RK3288_DSP_VACT_ST_END_F1 * 4,
+};
+
+static const struct vop_line_flag rk3368_vop_line_flag = {
+	.line_flag_num[0] = VOP_REG(RK3368_LINE_FLAG, 0xffff, 0),
+	.line_flag_num[1] = VOP_REG(RK3368_LINE_FLAG, 0xffff, 16),
+};
+
+const struct vop_data rk3368_vop = {
+	.version = VOP_VERSION(3, 2),
+	.ctrl = &rk3288_ctrl_data,
+	.win = &rk3288_win01_data,
+	.line_flag = &rk3368_vop_line_flag,
+	.reg_len = RK3368_DSP_VACT_ST_END_F1 * 4,
+};
+
+static const struct vop_line_flag rk3366_vop_line_flag = {
+	.line_flag_num[0] = VOP_REG(RK3366_LINE_FLAG, 0xffff, 0),
+	.line_flag_num[1] = VOP_REG(RK3366_LINE_FLAG, 0xffff, 16),
+};
+
+const struct vop_data rk3366_vop = {
+	.version = VOP_VERSION(3, 4),
+	.ctrl = &rk3288_ctrl_data,
+	.win = &rk3288_win01_data,
+	.line_flag = &rk3366_vop_line_flag,
+	.reg_len = RK3366_DSP_VACT_ST_END_F1 * 4,
+};
+
+const struct vop_data rk3399_vop_big = {
+	.version = VOP_VERSION(3, 5),
+	.feature = VOP_FEATURE_OUTPUT_10BIT,
+	.ctrl = &rk3288_ctrl_data,
+	.win = &rk3288_win01_data,
+	.line_flag = &rk3366_vop_line_flag,
+	.reg_len = RK3399_DSP_VACT_ST_END_F1 * 4,
+};
+
+const struct vop_data rk3399_vop_lit = {
+	.version = VOP_VERSION(3, 6),
+	.ctrl = &rk3288_ctrl_data,
+	.win = &rk3288_win01_data,
+	.line_flag = &rk3366_vop_line_flag,
+	.reg_len = RK3399_DSP_VACT_ST_END_F1 * 4,
+};
+
+const struct vop_data rk322x_vop = {
+	.version = VOP_VERSION(3, 7),
+	.feature = VOP_FEATURE_OUTPUT_10BIT,
+	.ctrl = &rk3288_ctrl_data,
+	.win = &rk3288_win01_data,
+	.line_flag = &rk3366_vop_line_flag,
+	.reg_len = RK3399_DSP_VACT_ST_END_F1 * 4,
+};
+
+static const struct vop_ctrl rk3328_ctrl_data = {
+	.standby = VOP_REG(RK3328_SYS_CTRL, 0x1, 22),
+	.auto_gate_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 23),
+	.htotal_pw = VOP_REG(RK3328_DSP_HTOTAL_HS_END, 0x1fff1fff, 0),
+	.hact_st_end = VOP_REG(RK3328_DSP_HACT_ST_END, 0x1fff1fff, 0),
+	.vtotal_pw = VOP_REG(RK3328_DSP_VTOTAL_VS_END, 0x1fff1fff, 0),
+	.vact_st_end = VOP_REG(RK3328_DSP_VACT_ST_END, 0x1fff1fff, 0),
+	.vact_st_end_f1 = VOP_REG(RK3328_DSP_VACT_ST_END_F1, 0x1fff1fff, 0),
+	.vs_st_end_f1 = VOP_REG(RK3328_DSP_VS_ST_END_F1, 0x1fff1fff, 0),
+	.hpost_st_end = VOP_REG(RK3328_POST_DSP_HACT_INFO, 0x1fff1fff, 0),
+	.vpost_st_end = VOP_REG(RK3328_POST_DSP_VACT_INFO, 0x1fff1fff, 0),
+	.vpost_st_end_f1 = VOP_REG(RK3328_POST_DSP_VACT_INFO_F1, 0x1fff1fff, 0),
+	.dsp_interlace = VOP_REG(RK3328_DSP_CTRL0, 0x1, 10),
+	.dsp_layer_sel = VOP_REG(RK3328_DSP_CTRL1, 0xff, 8),
+	.post_lb_mode = VOP_REG(RK3328_SYS_CTRL, 0x1, 18),
+	.global_regdone_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 11),
+	.overlay_mode = VOP_REG(RK3328_SYS_CTRL, 0x1, 16),
+	.core_dclk_div = VOP_REG(RK3328_DSP_CTRL0, 0x1, 4),
+	.p2i_en = VOP_REG(RK3328_DSP_CTRL0, 0x1, 5),
+	.rgb_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 12),
+	.hdmi_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 13),
+	.edp_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 14),
+	.mipi_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 15),
+	.rgb_pin_pol = VOP_REG(RK3328_DSP_CTRL1, 0xf, 16),
+	.hdmi_pin_pol = VOP_REG(RK3328_DSP_CTRL1, 0xf, 20),
+	.edp_pin_pol = VOP_REG(RK3328_DSP_CTRL1, 0xf, 24),
+	.mipi_pin_pol = VOP_REG(RK3328_DSP_CTRL1, 0xf, 28),
+
+	.dither_down = VOP_REG(RK3328_DSP_CTRL1, 0xf, 1),
+	.dither_up = VOP_REG(RK3328_DSP_CTRL1, 0x1, 6),
+
+	.dsp_data_swap = VOP_REG(RK3328_DSP_CTRL0, 0x1f, 12),
+	.dsp_ccir656_avg = VOP_REG(RK3328_DSP_CTRL0, 0x1, 20),
+	.dsp_blank = VOP_REG(RK3328_DSP_CTRL0, 0x3, 18),
+	.dsp_lut_en = VOP_REG(RK3328_DSP_CTRL1, 0x1, 0),
+	.out_mode = VOP_REG(RK3328_DSP_CTRL0, 0xf, 0),
+
+	.xmirror = VOP_REG(RK3328_DSP_CTRL0, 0x1, 22),
+	.ymirror = VOP_REG(RK3328_DSP_CTRL0, 0x1, 23),
+
+	.dsp_background = VOP_REG(RK3328_DSP_BG, 0xffffffff, 0),
+
+	.cfg_done = VOP_REG(RK3328_REG_CFG_DONE, 0x1, 0),
+};
+
+
+static const struct vop_line_flag rk3328_vop_line_flag = {
+	.line_flag_num[0] = VOP_REG(RK3328_LINE_FLAG, 0xffff, 0),
+	.line_flag_num[1] = VOP_REG(RK3328_LINE_FLAG, 0xffff, 16),
+};
+
+const struct vop_data rk3328_vop = {
+	.version = VOP_VERSION(3, 8),
+	.feature = VOP_FEATURE_OUTPUT_10BIT,
+	.ctrl = &rk3328_ctrl_data,
+	.win = &rk3288_win01_data,
+	.win_offset = 0xd0,
+	.line_flag = &rk3328_vop_line_flag,
+	.reg_len = RK3328_DSP_VACT_ST_END_F1 * 4,
+};
+
+static const struct vop_scl_regs rk3036_win_scl = {
+	.scale_yrgb_x = VOP_REG(RK3036_WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0),
+	.scale_yrgb_y = VOP_REG(RK3036_WIN0_SCL_FACTOR_YRGB, 0xffff, 16),
+	.scale_cbcr_x = VOP_REG(RK3036_WIN0_SCL_FACTOR_CBR, 0xffff, 0x0),
+	.scale_cbcr_y = VOP_REG(RK3036_WIN0_SCL_FACTOR_CBR, 0xffff, 16),
+};
+
+static const struct vop_win rk3036_win0_data = {
+	.scl = &rk3036_win_scl,
+	.enable = VOP_REG(RK3036_SYS_CTRL, 0x1, 0),
+	.format = VOP_REG(RK3036_SYS_CTRL, 0x7, 3),
+	.rb_swap = VOP_REG(RK3036_SYS_CTRL, 0x1, 15),
+	.act_info = VOP_REG(RK3036_WIN0_ACT_INFO, 0x1fff1fff, 0),
+	.dsp_info = VOP_REG(RK3036_WIN0_DSP_INFO, 0x0fff0fff, 0),
+	.dsp_st = VOP_REG(RK3036_WIN0_DSP_ST, 0x1fff1fff, 0),
+	.yrgb_mst = VOP_REG(RK3036_WIN0_YRGB_MST, 0xffffffff, 0),
+	.uv_mst = VOP_REG(RK3036_WIN0_CBR_MST, 0xffffffff, 0),
+	.yrgb_vir = VOP_REG(RK3036_WIN0_VIR, 0xffff, 0),
+	.uv_vir = VOP_REG(RK3036_WIN0_VIR, 0x1fff, 16),
+	.alpha_mode = VOP_REG(RK3036_DSP_CTRL0, 0x1, 18),
+	.alpha_en = VOP_REG(RK3036_ALPHA_CTRL, 0x1, 0)
+};
+
+static const struct vop_ctrl rk3036_ctrl_data = {
+	.standby = VOP_REG(RK3036_SYS_CTRL, 0x1, 30),
+	.out_mode = VOP_REG(RK3036_DSP_CTRL0, 0xf, 0),
+	.dsp_blank = VOP_REG(RK3036_DSP_CTRL1, 0x1, 24),
+	.pin_pol = VOP_REG(RK3036_DSP_CTRL0, 0xf, 4),
+	.dsp_layer_sel = VOP_REG(RK3036_DSP_CTRL0, 0x1, 8),
+	.htotal_pw = VOP_REG(RK3036_DSP_HTOTAL_HS_END, 0x1fff1fff, 0),
+	.hact_st_end = VOP_REG(RK3036_DSP_HACT_ST_END, 0x1fff1fff, 0),
+	.vtotal_pw = VOP_REG(RK3036_DSP_VTOTAL_VS_END, 0x1fff1fff, 0),
+	.vact_st_end = VOP_REG(RK3036_DSP_VACT_ST_END, 0x1fff1fff, 0),
+	.cfg_done = VOP_REG(RK3036_REG_CFG_DONE, 0x1, 0),
+};
+
+static const struct vop_line_flag rk3036_vop_line_flag = {
+	.line_flag_num[0] = VOP_REG(RK3036_INT_STATUS, 0xfff, 12),
+};
+
+const struct vop_data rk3036_vop = {
+	.version = VOP_VERSION(2, 2),
+	.ctrl = &rk3036_ctrl_data,
+	.win = &rk3036_win0_data,
+	.line_flag = &rk3036_vop_line_flag,
+	.reg_len = RK3036_DSP_VACT_ST_END_F1 * 4,
+};
diff --git a/drivers/video/drm/rockchip_vop_reg.h b/drivers/video/drm/rockchip_vop_reg.h
new file mode 100644
index 0000000000..ed0c22e21e
--- /dev/null
+++ b/drivers/video/drm/rockchip_vop_reg.h
@@ -0,0 +1,872 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _ROCKCHIP_VOP_REG_H
+#define _ROCKCHIP_VOP_REG_H
+
+/* rk3288 register definition */
+#define RK3288_REG_CFG_DONE			0x0000
+#define RK3288_VERSION_INFO			0x0004
+#define RK3288_SYS_CTRL				0x0008
+#define RK3288_SYS_CTRL1			0x000c
+#define RK3288_DSP_CTRL0			0x0010
+#define RK3288_DSP_CTRL1			0x0014
+#define RK3288_DSP_BG				0x0018
+#define RK3288_MCU_CTRL				0x001c
+#define RK3288_INTR_CTRL0			0x0020
+#define RK3288_INTR_CTRL1			0x0024
+#define RK3288_WIN0_CTRL0			0x0030
+#define RK3288_WIN0_CTRL1			0x0034
+#define RK3288_WIN0_COLOR_KEY			0x0038
+#define RK3288_WIN0_VIR				0x003c
+#define RK3288_WIN0_YRGB_MST			0x0040
+#define RK3288_WIN0_CBR_MST			0x0044
+#define RK3288_WIN0_ACT_INFO			0x0048
+#define RK3288_WIN0_DSP_INFO			0x004c
+#define RK3288_WIN0_DSP_ST			0x0050
+#define RK3288_WIN0_SCL_FACTOR_YRGB		0x0054
+#define RK3288_WIN0_SCL_FACTOR_CBR		0x0058
+#define RK3288_WIN0_SCL_OFFSET			0x005c
+#define RK3288_WIN0_SRC_ALPHA_CTRL		0x0060
+#define RK3288_WIN0_DST_ALPHA_CTRL		0x0064
+#define RK3288_WIN0_FADING_CTRL			0x0068
+
+/* win1 register */
+#define RK3288_WIN1_CTRL0			0x0070
+#define RK3288_WIN1_CTRL1			0x0074
+#define RK3288_WIN1_COLOR_KEY			0x0078
+#define RK3288_WIN1_VIR				0x007c
+#define RK3288_WIN1_YRGB_MST			0x0080
+#define RK3288_WIN1_CBR_MST			0x0084
+#define RK3288_WIN1_ACT_INFO			0x0088
+#define RK3288_WIN1_DSP_INFO			0x008c
+#define RK3288_WIN1_DSP_ST			0x0090
+#define RK3288_WIN1_SCL_FACTOR_YRGB		0x0094
+#define RK3288_WIN1_SCL_FACTOR_CBR		0x0098
+#define RK3288_WIN1_SCL_OFFSET			0x009c
+#define RK3288_WIN1_SRC_ALPHA_CTRL		0x00a0
+#define RK3288_WIN1_DST_ALPHA_CTRL		0x00a4
+#define RK3288_WIN1_FADING_CTRL			0x00a8
+/* win2 register */
+#define RK3288_WIN2_CTRL0			0x00b0
+#define RK3288_WIN2_CTRL1			0x00b4
+#define RK3288_WIN2_VIR0_1			0x00b8
+#define RK3288_WIN2_VIR2_3			0x00bc
+#define RK3288_WIN2_MST0			0x00c0
+#define RK3288_WIN2_DSP_INFO0			0x00c4
+#define RK3288_WIN2_DSP_ST0			0x00c8
+#define RK3288_WIN2_COLOR_KEY			0x00cc
+#define RK3288_WIN2_MST1			0x00d0
+#define RK3288_WIN2_DSP_INFO1			0x00d4
+#define RK3288_WIN2_DSP_ST1			0x00d8
+#define RK3288_WIN2_SRC_ALPHA_CTRL		0x00dc
+#define RK3288_WIN2_MST2			0x00e0
+#define RK3288_WIN2_DSP_INFO2			0x00e4
+#define RK3288_WIN2_DSP_ST2			0x00e8
+#define RK3288_WIN2_DST_ALPHA_CTRL		0x00ec
+#define RK3288_WIN2_MST3			0x00f0
+#define RK3288_WIN2_DSP_INFO3			0x00f4
+#define RK3288_WIN2_DSP_ST3			0x00f8
+#define RK3288_WIN2_FADING_CTRL			0x00fc
+/* win3 register */
+#define RK3288_WIN3_CTRL0			0x0100
+#define RK3288_WIN3_CTRL1			0x0104
+#define RK3288_WIN3_VIR0_1			0x0108
+#define RK3288_WIN3_VIR2_3			0x010c
+#define RK3288_WIN3_MST0			0x0110
+#define RK3288_WIN3_DSP_INFO0			0x0114
+#define RK3288_WIN3_DSP_ST0			0x0118
+#define RK3288_WIN3_COLOR_KEY			0x011c
+#define RK3288_WIN3_MST1			0x0120
+#define RK3288_WIN3_DSP_INFO1			0x0124
+#define RK3288_WIN3_DSP_ST1			0x0128
+#define RK3288_WIN3_SRC_ALPHA_CTRL		0x012c
+#define RK3288_WIN3_MST2			0x0130
+#define RK3288_WIN3_DSP_INFO2			0x0134
+#define RK3288_WIN3_DSP_ST2			0x0138
+#define RK3288_WIN3_DST_ALPHA_CTRL		0x013c
+#define RK3288_WIN3_MST3			0x0140
+#define RK3288_WIN3_DSP_INFO3			0x0144
+#define RK3288_WIN3_DSP_ST3			0x0148
+#define RK3288_WIN3_FADING_CTRL			0x014c
+/* hwc register */
+#define RK3288_HWC_CTRL0			0x0150
+#define RK3288_HWC_CTRL1			0x0154
+#define RK3288_HWC_MST				0x0158
+#define RK3288_HWC_DSP_ST			0x015c
+#define RK3288_HWC_SRC_ALPHA_CTRL		0x0160
+#define RK3288_HWC_DST_ALPHA_CTRL		0x0164
+#define RK3288_HWC_FADING_CTRL			0x0168
+/* post process register */
+#define RK3288_POST_DSP_HACT_INFO		0x0170
+#define RK3288_POST_DSP_VACT_INFO		0x0174
+#define RK3288_POST_SCL_FACTOR_YRGB		0x0178
+#define RK3288_POST_SCL_CTRL			0x0180
+#define RK3288_POST_DSP_VACT_INFO_F1		0x0184
+#define RK3288_DSP_HTOTAL_HS_END		0x0188
+#define RK3288_DSP_HACT_ST_END			0x018c
+#define RK3288_DSP_VTOTAL_VS_END		0x0190
+#define RK3288_DSP_VACT_ST_END			0x0194
+#define RK3288_DSP_VS_ST_END_F1			0x0198
+#define RK3288_DSP_VACT_ST_END_F1		0x019c
+/* register definition end */
+
+/* rk3368 register definition */
+#define RK3368_REG_CFG_DONE			0x0000
+#define RK3368_VERSION_INFO			0x0004
+#define RK3368_SYS_CTRL				0x0008
+#define RK3368_SYS_CTRL1			0x000c
+#define RK3368_DSP_CTRL0			0x0010
+#define RK3368_DSP_CTRL1			0x0014
+#define RK3368_DSP_BG				0x0018
+#define RK3368_MCU_CTRL				0x001c
+#define RK3368_LINE_FLAG			0x0020
+#define RK3368_INTR_EN				0x0024
+#define RK3368_INTR_CLEAR			0x0028
+#define RK3368_INTR_STATUS			0x002c
+#define RK3368_WIN0_CTRL0			0x0030
+#define RK3368_WIN0_CTRL1			0x0034
+#define RK3368_WIN0_COLOR_KEY			0x0038
+#define RK3368_WIN0_VIR				0x003c
+#define RK3368_WIN0_YRGB_MST			0x0040
+#define RK3368_WIN0_CBR_MST			0x0044
+#define RK3368_WIN0_ACT_INFO			0x0048
+#define RK3368_WIN0_DSP_INFO			0x004c
+#define RK3368_WIN0_DSP_ST			0x0050
+#define RK3368_WIN0_SCL_FACTOR_YRGB		0x0054
+#define RK3368_WIN0_SCL_FACTOR_CBR		0x0058
+#define RK3368_WIN0_SCL_OFFSET			0x005c
+#define RK3368_WIN0_SRC_ALPHA_CTRL		0x0060
+#define RK3368_WIN0_DST_ALPHA_CTRL		0x0064
+#define RK3368_WIN0_FADING_CTRL			0x0068
+#define RK3368_WIN0_CTRL2			0x006c
+#define RK3368_WIN1_CTRL0			0x0070
+#define RK3368_WIN1_CTRL1			0x0074
+#define RK3368_WIN1_COLOR_KEY			0x0078
+#define RK3368_WIN1_VIR				0x007c
+#define RK3368_WIN1_YRGB_MST			0x0080
+#define RK3368_WIN1_CBR_MST			0x0084
+#define RK3368_WIN1_ACT_INFO			0x0088
+#define RK3368_WIN1_DSP_INFO			0x008c
+#define RK3368_WIN1_DSP_ST			0x0090
+#define RK3368_WIN1_SCL_FACTOR_YRGB		0x0094
+#define RK3368_WIN1_SCL_FACTOR_CBR		0x0098
+#define RK3368_WIN1_SCL_OFFSET			0x009c
+#define RK3368_WIN1_SRC_ALPHA_CTRL		0x00a0
+#define RK3368_WIN1_DST_ALPHA_CTRL		0x00a4
+#define RK3368_WIN1_FADING_CTRL			0x00a8
+#define RK3368_WIN1_CTRL2			0x00ac
+#define RK3368_WIN2_CTRL0			0x00b0
+#define RK3368_WIN2_CTRL1			0x00b4
+#define RK3368_WIN2_VIR0_1			0x00b8
+#define RK3368_WIN2_VIR2_3			0x00bc
+#define RK3368_WIN2_MST0			0x00c0
+#define RK3368_WIN2_DSP_INFO0			0x00c4
+#define RK3368_WIN2_DSP_ST0			0x00c8
+#define RK3368_WIN2_COLOR_KEY			0x00cc
+#define RK3368_WIN2_MST1			0x00d0
+#define RK3368_WIN2_DSP_INFO1			0x00d4
+#define RK3368_WIN2_DSP_ST1			0x00d8
+#define RK3368_WIN2_SRC_ALPHA_CTRL		0x00dc
+#define RK3368_WIN2_MST2			0x00e0
+#define RK3368_WIN2_DSP_INFO2			0x00e4
+#define RK3368_WIN2_DSP_ST2			0x00e8
+#define RK3368_WIN2_DST_ALPHA_CTRL		0x00ec
+#define RK3368_WIN2_MST3			0x00f0
+#define RK3368_WIN2_DSP_INFO3			0x00f4
+#define RK3368_WIN2_DSP_ST3			0x00f8
+#define RK3368_WIN2_FADING_CTRL			0x00fc
+#define RK3368_WIN3_CTRL0			0x0100
+#define RK3368_WIN3_CTRL1			0x0104
+#define RK3368_WIN3_VIR0_1			0x0108
+#define RK3368_WIN3_VIR2_3			0x010c
+#define RK3368_WIN3_MST0			0x0110
+#define RK3368_WIN3_DSP_INFO0			0x0114
+#define RK3368_WIN3_DSP_ST0			0x0118
+#define RK3368_WIN3_COLOR_KEY			0x011c
+#define RK3368_WIN3_MST1			0x0120
+#define RK3368_WIN3_DSP_INFO1			0x0124
+#define RK3368_WIN3_DSP_ST1			0x0128
+#define RK3368_WIN3_SRC_ALPHA_CTRL		0x012c
+#define RK3368_WIN3_MST2			0x0130
+#define RK3368_WIN3_DSP_INFO2			0x0134
+#define RK3368_WIN3_DSP_ST2			0x0138
+#define RK3368_WIN3_DST_ALPHA_CTRL		0x013c
+#define RK3368_WIN3_MST3			0x0140
+#define RK3368_WIN3_DSP_INFO3			0x0144
+#define RK3368_WIN3_DSP_ST3			0x0148
+#define RK3368_WIN3_FADING_CTRL			0x014c
+#define RK3368_HWC_CTRL0			0x0150
+#define RK3368_HWC_CTRL1			0x0154
+#define RK3368_HWC_MST				0x0158
+#define RK3368_HWC_DSP_ST			0x015c
+#define RK3368_HWC_SRC_ALPHA_CTRL		0x0160
+#define RK3368_HWC_DST_ALPHA_CTRL		0x0164
+#define RK3368_HWC_FADING_CTRL			0x0168
+#define RK3368_HWC_RESERVED1			0x016c
+#define RK3368_POST_DSP_HACT_INFO		0x0170
+#define RK3368_POST_DSP_VACT_INFO		0x0174
+#define RK3368_POST_SCL_FACTOR_YRGB		0x0178
+#define RK3368_POST_RESERVED			0x017c
+#define RK3368_POST_SCL_CTRL			0x0180
+#define RK3368_POST_DSP_VACT_INFO_F1		0x0184
+#define RK3368_DSP_HTOTAL_HS_END		0x0188
+#define RK3368_DSP_HACT_ST_END			0x018c
+#define RK3368_DSP_VTOTAL_VS_END		0x0190
+#define RK3368_DSP_VACT_ST_END			0x0194
+#define RK3368_DSP_VS_ST_END_F1			0x0198
+#define RK3368_DSP_VACT_ST_END_F1		0x019c
+#define RK3368_PWM_CTRL				0x01a0
+#define RK3368_PWM_PERIOD_HPR			0x01a4
+#define RK3368_PWM_DUTY_LPR			0x01a8
+#define RK3368_PWM_CNT				0x01ac
+#define RK3368_BCSH_COLOR_BAR			0x01b0
+#define RK3368_BCSH_BCS				0x01b4
+#define RK3368_BCSH_H				0x01b8
+#define RK3368_BCSH_CTRL			0x01bc
+#define RK3368_CABC_CTRL0			0x01c0
+#define RK3368_CABC_CTRL1			0x01c4
+#define RK3368_CABC_CTRL2			0x01c8
+#define RK3368_CABC_CTRL3			0x01cc
+#define RK3368_CABC_GAUSS_LINE0_0		0x01d0
+#define RK3368_CABC_GAUSS_LINE0_1		0x01d4
+#define RK3368_CABC_GAUSS_LINE1_0		0x01d8
+#define RK3368_CABC_GAUSS_LINE1_1		0x01dc
+#define RK3368_CABC_GAUSS_LINE2_0		0x01e0
+#define RK3368_CABC_GAUSS_LINE2_1		0x01e4
+#define RK3368_FRC_LOWER01_0			0x01e8
+#define RK3368_FRC_LOWER01_1			0x01ec
+#define RK3368_FRC_LOWER10_0			0x01f0
+#define RK3368_FRC_LOWER10_1			0x01f4
+#define RK3368_FRC_LOWER11_0			0x01f8
+#define RK3368_FRC_LOWER11_1			0x01fc
+#define RK3368_IFBDC_CTRL			0x0200
+#define RK3368_IFBDC_TILES_NUM			0x0204
+#define RK3368_IFBDC_FRAME_RST_CYCLE		0x0208
+#define RK3368_IFBDC_BASE_ADDR			0x020c
+#define RK3368_IFBDC_MB_SIZE			0x0210
+#define RK3368_IFBDC_CMP_INDEX_INIT		0x0214
+#define RK3368_IFBDC_VIR			0x0220
+#define RK3368_IFBDC_DEBUG0			0x0230
+#define RK3368_IFBDC_DEBUG1			0x0234
+#define RK3368_LATENCY_CTRL0			0x0250
+#define RK3368_RD_MAX_LATENCY_NUM0		0x0254
+#define RK3368_RD_LATENCY_THR_NUM0		0x0258
+#define RK3368_RD_LATENCY_SAMP_NUM0		0x025c
+#define RK3368_WIN0_DSP_BG			0x0260
+#define RK3368_WIN1_DSP_BG			0x0264
+#define RK3368_WIN2_DSP_BG			0x0268
+#define RK3368_WIN3_DSP_BG			0x026c
+#define RK3368_SCAN_LINE_NUM			0x0270
+#define RK3368_CABC_DEBUG0			0x0274
+#define RK3368_CABC_DEBUG1			0x0278
+#define RK3368_CABC_DEBUG2			0x027c
+#define RK3368_DBG_REG_000			0x0280
+#define RK3368_DBG_REG_001			0x0284
+#define RK3368_DBG_REG_002			0x0288
+#define RK3368_DBG_REG_003			0x028c
+#define RK3368_DBG_REG_004			0x0290
+#define RK3368_DBG_REG_005			0x0294
+#define RK3368_DBG_REG_006			0x0298
+#define RK3368_DBG_REG_007			0x029c
+#define RK3368_DBG_REG_008			0x02a0
+#define RK3368_DBG_REG_016			0x02c0
+#define RK3368_DBG_REG_017			0x02c4
+#define RK3368_DBG_REG_018			0x02c8
+#define RK3368_DBG_REG_019			0x02cc
+#define RK3368_DBG_REG_020			0x02d0
+#define RK3368_DBG_REG_021			0x02d4
+#define RK3368_DBG_REG_022			0x02d8
+#define RK3368_DBG_REG_023			0x02dc
+#define RK3368_DBG_REG_028			0x02f0
+#define RK3368_MMU_DTE_ADDR			0x0300
+#define RK3368_MMU_STATUS			0x0304
+#define RK3368_MMU_COMMAND			0x0308
+#define RK3368_MMU_PAGE_FAULT_ADDR		0x030c
+#define RK3368_MMU_ZAP_ONE_LINE			0x0310
+#define RK3368_MMU_INT_RAWSTAT			0x0314
+#define RK3368_MMU_INT_CLEAR			0x0318
+#define RK3368_MMU_INT_MASK			0x031c
+#define RK3368_MMU_INT_STATUS			0x0320
+#define RK3368_MMU_AUTO_GATING			0x0324
+#define RK3368_WIN2_LUT_ADDR			0x0400
+#define RK3368_WIN3_LUT_ADDR			0x0800
+#define RK3368_HWC_LUT_ADDR			0x0c00
+#define RK3368_GAMMA_LUT_ADDR			0x1000
+#define RK3368_CABC_GAMMA_LUT_ADDR		0x1800
+#define RK3368_MCU_BYPASS_WPORT			0x2200
+#define RK3368_MCU_BYPASS_RPORT			0x2300
+/* rk3368 register definition end */
+
+#define RK3366_REG_CFG_DONE			0x0000
+#define RK3366_VERSION_INFO			0x0004
+#define RK3366_SYS_CTRL				0x0008
+#define RK3366_SYS_CTRL1			0x000c
+#define RK3366_DSP_CTRL0			0x0010
+#define RK3366_DSP_CTRL1			0x0014
+#define RK3366_DSP_BG				0x0018
+#define RK3366_MCU_CTRL				0x001c
+#define RK3366_WB_CTRL0				0x0020
+#define RK3366_WB_CTRL1				0x0024
+#define RK3366_WB_YRGB_MST			0x0028
+#define RK3366_WB_CBR_MST			0x002c
+#define RK3366_WIN0_CTRL0			0x0030
+#define RK3366_WIN0_CTRL1			0x0034
+#define RK3366_WIN0_COLOR_KEY			0x0038
+#define RK3366_WIN0_VIR				0x003c
+#define RK3366_WIN0_YRGB_MST			0x0040
+#define RK3366_WIN0_CBR_MST			0x0044
+#define RK3366_WIN0_ACT_INFO			0x0048
+#define RK3366_WIN0_DSP_INFO			0x004c
+#define RK3366_WIN0_DSP_ST			0x0050
+#define RK3366_WIN0_SCL_FACTOR_YRGB		0x0054
+#define RK3366_WIN0_SCL_FACTOR_CBR		0x0058
+#define RK3366_WIN0_SCL_OFFSET			0x005c
+#define RK3366_WIN0_SRC_ALPHA_CTRL		0x0060
+#define RK3366_WIN0_DST_ALPHA_CTRL		0x0064
+#define RK3366_WIN0_FADING_CTRL			0x0068
+#define RK3366_WIN0_CTRL2			0x006c
+#define RK3366_WIN1_CTRL0			0x0070
+#define RK3366_WIN1_CTRL1			0x0074
+#define RK3366_WIN1_COLOR_KEY			0x0078
+#define RK3366_WIN1_VIR				0x007c
+#define RK3366_WIN1_YRGB_MST			0x0080
+#define RK3366_WIN1_CBR_MST			0x0084
+#define RK3366_WIN1_ACT_INFO			0x0088
+#define RK3366_WIN1_DSP_INFO			0x008c
+#define RK3366_WIN1_DSP_ST			0x0090
+#define RK3366_WIN1_SCL_FACTOR_YRGB		0x0094
+#define RK3366_WIN1_SCL_FACTOR_CBR		0x0098
+#define RK3366_WIN1_SCL_OFFSET			0x009c
+#define RK3366_WIN1_SRC_ALPHA_CTRL		0x00a0
+#define RK3366_WIN1_DST_ALPHA_CTRL		0x00a4
+#define RK3366_WIN1_FADING_CTRL			0x00a8
+#define RK3366_WIN1_CTRL2			0x00ac
+#define RK3366_WIN2_CTRL0			0x00b0
+#define RK3366_WIN2_CTRL1			0x00b4
+#define RK3366_WIN2_VIR0_1			0x00b8
+#define RK3366_WIN2_VIR2_3			0x00bc
+#define RK3366_WIN2_MST0			0x00c0
+#define RK3366_WIN2_DSP_INFO0			0x00c4
+#define RK3366_WIN2_DSP_ST0			0x00c8
+#define RK3366_WIN2_COLOR_KEY			0x00cc
+#define RK3366_WIN2_MST1			0x00d0
+#define RK3366_WIN2_DSP_INFO1			0x00d4
+#define RK3366_WIN2_DSP_ST1			0x00d8
+#define RK3366_WIN2_SRC_ALPHA_CTRL		0x00dc
+#define RK3366_WIN2_MST2			0x00e0
+#define RK3366_WIN2_DSP_INFO2			0x00e4
+#define RK3366_WIN2_DSP_ST2			0x00e8
+#define RK3366_WIN2_DST_ALPHA_CTRL		0x00ec
+#define RK3366_WIN2_MST3			0x00f0
+#define RK3366_WIN2_DSP_INFO3			0x00f4
+#define RK3366_WIN2_DSP_ST3			0x00f8
+#define RK3366_WIN2_FADING_CTRL			0x00fc
+#define RK3366_WIN3_CTRL0			0x0100
+#define RK3366_WIN3_CTRL1			0x0104
+#define RK3366_WIN3_VIR0_1			0x0108
+#define RK3366_WIN3_VIR2_3			0x010c
+#define RK3366_WIN3_MST0			0x0110
+#define RK3366_WIN3_DSP_INFO0			0x0114
+#define RK3366_WIN3_DSP_ST0			0x0118
+#define RK3366_WIN3_COLOR_KEY			0x011c
+#define RK3366_WIN3_MST1			0x0120
+#define RK3366_WIN3_DSP_INFO1			0x0124
+#define RK3366_WIN3_DSP_ST1			0x0128
+#define RK3366_WIN3_SRC_ALPHA_CTRL		0x012c
+#define RK3366_WIN3_MST2			0x0130
+#define RK3366_WIN3_DSP_INFO2			0x0134
+#define RK3366_WIN3_DSP_ST2			0x0138
+#define RK3366_WIN3_DST_ALPHA_CTRL		0x013c
+#define RK3366_WIN3_MST3			0x0140
+#define RK3366_WIN3_DSP_INFO3			0x0144
+#define RK3366_WIN3_DSP_ST3			0x0148
+#define RK3366_WIN3_FADING_CTRL			0x014c
+#define RK3366_HWC_CTRL0			0x0150
+#define RK3366_HWC_CTRL1			0x0154
+#define RK3366_HWC_MST				0x0158
+#define RK3366_HWC_DSP_ST			0x015c
+#define RK3366_HWC_SRC_ALPHA_CTRL		0x0160
+#define RK3366_HWC_DST_ALPHA_CTRL		0x0164
+#define RK3366_HWC_FADING_CTRL			0x0168
+#define RK3366_HWC_RESERVED1			0x016c
+#define RK3366_POST_DSP_HACT_INFO		0x0170
+#define RK3366_POST_DSP_VACT_INFO		0x0174
+#define RK3366_POST_SCL_FACTOR_YRGB		0x0178
+#define RK3366_POST_RESERVED			0x017c
+#define RK3366_POST_SCL_CTRL			0x0180
+#define RK3366_POST_DSP_VACT_INFO_F1		0x0184
+#define RK3366_DSP_HTOTAL_HS_END		0x0188
+#define RK3366_DSP_HACT_ST_END			0x018c
+#define RK3366_DSP_VTOTAL_VS_END		0x0190
+#define RK3366_DSP_VACT_ST_END			0x0194
+#define RK3366_DSP_VS_ST_END_F1			0x0198
+#define RK3366_DSP_VACT_ST_END_F1		0x019c
+#define RK3366_PWM_CTRL				0x01a0
+#define RK3366_PWM_PERIOD_HPR			0x01a4
+#define RK3366_PWM_DUTY_LPR			0x01a8
+#define RK3366_PWM_CNT				0x01ac
+#define RK3366_BCSH_COLOR_BAR			0x01b0
+#define RK3366_BCSH_BCS				0x01b4
+#define RK3366_BCSH_H				0x01b8
+#define RK3366_BCSH_CTRL			0x01bc
+#define RK3366_CABC_CTRL0			0x01c0
+#define RK3366_CABC_CTRL1			0x01c4
+#define RK3366_CABC_CTRL2			0x01c8
+#define RK3366_CABC_CTRL3			0x01cc
+#define RK3366_CABC_GAUSS_LINE0_0		0x01d0
+#define RK3366_CABC_GAUSS_LINE0_1		0x01d4
+#define RK3366_CABC_GAUSS_LINE1_0		0x01d8
+#define RK3366_CABC_GAUSS_LINE1_1		0x01dc
+#define RK3366_CABC_GAUSS_LINE2_0		0x01e0
+#define RK3366_CABC_GAUSS_LINE2_1		0x01e4
+#define RK3366_FRC_LOWER01_0			0x01e8
+#define RK3366_FRC_LOWER01_1			0x01ec
+#define RK3366_FRC_LOWER10_0			0x01f0
+#define RK3366_FRC_LOWER10_1			0x01f4
+#define RK3366_FRC_LOWER11_0			0x01f8
+#define RK3366_FRC_LOWER11_1			0x01fc
+#define RK3366_INTR_EN0				0x0280
+#define RK3366_INTR_CLEAR0			0x0284
+#define RK3366_INTR_STATUS0			0x0288
+#define RK3366_INTR_RAW_STATUS0			0x028c
+#define RK3366_INTR_EN1				0x0290
+#define RK3366_INTR_CLEAR1			0x0294
+#define RK3366_INTR_STATUS1			0x0298
+#define RK3366_INTR_RAW_STATUS1			0x029c
+#define RK3366_LINE_FLAG			0x02a0
+#define RK3366_VOP_STATUS			0x02a4
+#define RK3366_BLANKING_VALUE			0x02a8
+#define RK3366_WIN0_DSP_BG			0x02b0
+#define RK3366_WIN1_DSP_BG			0x02b4
+#define RK3366_WIN2_DSP_BG			0x02b8
+#define RK3366_WIN3_DSP_BG			0x02bc
+#define RK3366_WIN2_LUT_ADDR			0x0400
+#define RK3366_WIN3_LUT_ADDR			0x0800
+#define RK3366_HWC_LUT_ADDR			0x0c00
+#define RK3366_GAMMA0_LUT_ADDR			0x1000
+#define RK3366_GAMMA1_LUT_ADDR			0x1400
+#define RK3366_CABC_GAMMA_LUT_ADDR		0x1800
+#define RK3366_MCU_BYPASS_WPORT			0x2200
+#define RK3366_MCU_BYPASS_RPORT			0x2300
+#define RK3366_MMU_DTE_ADDR			0x2400
+#define RK3366_MMU_STATUS			0x2404
+#define RK3366_MMU_COMMAND			0x2408
+#define RK3366_MMU_PAGE_FAULT_ADDR		0x240c
+#define RK3366_MMU_ZAP_ONE_LINE 		0x2410
+#define RK3366_MMU_INT_RAWSTAT			0x2414
+#define RK3366_MMU_INT_CLEAR			0x2418
+#define RK3366_MMU_INT_MASK			0x241c
+#define RK3366_MMU_INT_STATUS			0x2420
+#define RK3366_MMU_AUTO_GATING			0x2424
+
+/* rk3399 register definition */
+#define RK3399_REG_CFG_DONE			0x0000
+#define RK3399_VERSION_INFO			0x0004
+#define RK3399_SYS_CTRL				0x0008
+#define RK3399_SYS_CTRL1			0x000c
+#define RK3399_DSP_CTRL0			0x0010
+#define RK3399_DSP_CTRL1			0x0014
+#define RK3399_DSP_BG				0x0018
+#define RK3399_MCU_CTRL				0x001c
+#define RK3399_WB_CTRL0				0x0020
+#define RK3399_WB_CTRL1				0x0024
+#define RK3399_WB_YRGB_MST			0x0028
+#define RK3399_WB_CBR_MST			0x002c
+#define RK3399_WIN0_CTRL0			0x0030
+#define RK3399_WIN0_CTRL1			0x0034
+#define RK3399_WIN0_COLOR_KEY			0x0038
+#define RK3399_WIN0_VIR				0x003c
+#define RK3399_WIN0_YRGB_MST			0x0040
+#define RK3399_WIN0_CBR_MST			0x0044
+#define RK3399_WIN0_ACT_INFO			0x0048
+#define RK3399_WIN0_DSP_INFO			0x004c
+#define RK3399_WIN0_DSP_ST			0x0050
+#define RK3399_WIN0_SCL_FACTOR_YRGB		0x0054
+#define RK3399_WIN0_SCL_FACTOR_CBR		0x0058
+#define RK3399_WIN0_SCL_OFFSET			0x005c
+#define RK3399_WIN0_SRC_ALPHA_CTRL		0x0060
+#define RK3399_WIN0_DST_ALPHA_CTRL		0x0064
+#define RK3399_WIN0_FADING_CTRL			0x0068
+#define RK3399_WIN0_CTRL2			0x006c
+#define RK3399_WIN1_CTRL0			0x0070
+#define RK3399_WIN1_CTRL1			0x0074
+#define RK3399_WIN1_COLOR_KEY			0x0078
+#define RK3399_WIN1_VIR				0x007c
+#define RK3399_WIN1_YRGB_MST			0x0080
+#define RK3399_WIN1_CBR_MST			0x0084
+#define RK3399_WIN1_ACT_INFO			0x0088
+#define RK3399_WIN1_DSP_INFO			0x008c
+#define RK3399_WIN1_DSP_ST			0x0090
+#define RK3399_WIN1_SCL_FACTOR_YRGB		0x0094
+#define RK3399_WIN1_SCL_FACTOR_CBR		0x0098
+#define RK3399_WIN1_SCL_OFFSET			0x009c
+#define RK3399_WIN1_SRC_ALPHA_CTRL		0x00a0
+#define RK3399_WIN1_DST_ALPHA_CTRL		0x00a4
+#define RK3399_WIN1_FADING_CTRL			0x00a8
+#define RK3399_WIN1_CTRL2			0x00ac
+#define RK3399_WIN2_CTRL0			0x00b0
+#define RK3399_WIN2_CTRL1			0x00b4
+#define RK3399_WIN2_VIR0_1			0x00b8
+#define RK3399_WIN2_VIR2_3			0x00bc
+#define RK3399_WIN2_MST0			0x00c0
+#define RK3399_WIN2_DSP_INFO0			0x00c4
+#define RK3399_WIN2_DSP_ST0			0x00c8
+#define RK3399_WIN2_COLOR_KEY			0x00cc
+#define RK3399_WIN2_MST1			0x00d0
+#define RK3399_WIN2_DSP_INFO1			0x00d4
+#define RK3399_WIN2_DSP_ST1			0x00d8
+#define RK3399_WIN2_SRC_ALPHA_CTRL		0x00dc
+#define RK3399_WIN2_MST2			0x00e0
+#define RK3399_WIN2_DSP_INFO2			0x00e4
+#define RK3399_WIN2_DSP_ST2			0x00e8
+#define RK3399_WIN2_DST_ALPHA_CTRL		0x00ec
+#define RK3399_WIN2_MST3			0x00f0
+#define RK3399_WIN2_DSP_INFO3			0x00f4
+#define RK3399_WIN2_DSP_ST3			0x00f8
+#define RK3399_WIN2_FADING_CTRL			0x00fc
+#define RK3399_WIN3_CTRL0			0x0100
+#define RK3399_WIN3_CTRL1			0x0104
+#define RK3399_WIN3_VIR0_1			0x0108
+#define RK3399_WIN3_VIR2_3			0x010c
+#define RK3399_WIN3_MST0			0x0110
+#define RK3399_WIN3_DSP_INFO0			0x0114
+#define RK3399_WIN3_DSP_ST0			0x0118
+#define RK3399_WIN3_COLOR_KEY			0x011c
+#define RK3399_WIN3_MST1			0x0120
+#define RK3399_WIN3_DSP_INFO1			0x0124
+#define RK3399_WIN3_DSP_ST1			0x0128
+#define RK3399_WIN3_SRC_ALPHA_CTRL		0x012c
+#define RK3399_WIN3_MST2			0x0130
+#define RK3399_WIN3_DSP_INFO2			0x0134
+#define RK3399_WIN3_DSP_ST2			0x0138
+#define RK3399_WIN3_DST_ALPHA_CTRL		0x013c
+#define RK3399_WIN3_MST3			0x0140
+#define RK3399_WIN3_DSP_INFO3			0x0144
+#define RK3399_WIN3_DSP_ST3			0x0148
+#define RK3399_WIN3_FADING_CTRL			0x014c
+#define RK3399_HWC_CTRL0			0x0150
+#define RK3399_HWC_CTRL1			0x0154
+#define RK3399_HWC_MST				0x0158
+#define RK3399_HWC_DSP_ST			0x015c
+#define RK3399_HWC_SRC_ALPHA_CTRL		0x0160
+#define RK3399_HWC_DST_ALPHA_CTRL		0x0164
+#define RK3399_HWC_FADING_CTRL			0x0168
+#define RK3399_HWC_RESERVED1			0x016c
+#define RK3399_POST_DSP_HACT_INFO		0x0170
+#define RK3399_POST_DSP_VACT_INFO		0x0174
+#define RK3399_POST_SCL_FACTOR_YRGB		0x0178
+#define RK3399_POST_RESERVED			0x017c
+#define RK3399_POST_SCL_CTRL			0x0180
+#define RK3399_POST_DSP_VACT_INFO_F1		0x0184
+#define RK3399_DSP_HTOTAL_HS_END		0x0188
+#define RK3399_DSP_HACT_ST_END			0x018c
+#define RK3399_DSP_VTOTAL_VS_END		0x0190
+#define RK3399_DSP_VACT_ST_END			0x0194
+#define RK3399_DSP_VS_ST_END_F1			0x0198
+#define RK3399_DSP_VACT_ST_END_F1		0x019c
+#define RK3399_PWM_CTRL				0x01a0
+#define RK3399_PWM_PERIOD_HPR			0x01a4
+#define RK3399_PWM_DUTY_LPR			0x01a8
+#define RK3399_PWM_CNT				0x01ac
+#define RK3399_BCSH_COLOR_BAR			0x01b0
+#define RK3399_BCSH_BCS				0x01b4
+#define RK3399_BCSH_H				0x01b8
+#define RK3399_BCSH_CTRL			0x01bc
+#define RK3399_CABC_CTRL0			0x01c0
+#define RK3399_CABC_CTRL1			0x01c4
+#define RK3399_CABC_CTRL2			0x01c8
+#define RK3399_CABC_CTRL3			0x01cc
+#define RK3399_CABC_GAUSS_LINE0_0		0x01d0
+#define RK3399_CABC_GAUSS_LINE0_1		0x01d4
+#define RK3399_CABC_GAUSS_LINE1_0		0x01d8
+#define RK3399_CABC_GAUSS_LINE1_1		0x01dc
+#define RK3399_CABC_GAUSS_LINE2_0		0x01e0
+#define RK3399_CABC_GAUSS_LINE2_1		0x01e4
+#define RK3399_FRC_LOWER01_0			0x01e8
+#define RK3399_FRC_LOWER01_1			0x01ec
+#define RK3399_FRC_LOWER10_0			0x01f0
+#define RK3399_FRC_LOWER10_1			0x01f4
+#define RK3399_FRC_LOWER11_0			0x01f8
+#define RK3399_FRC_LOWER11_1			0x01fc
+#define RK3399_AFBCD0_CTRL			0x0200
+#define RK3399_AFBCD0_HDR_PTR			0x0204
+#define RK3399_AFBCD0_PIC_SIZE			0x0208
+#define RK3399_AFBCD0_STATUS			0x020c
+#define RK3399_AFBCD1_CTRL			0x0220
+#define RK3399_AFBCD1_HDR_PTR			0x0224
+#define RK3399_AFBCD1_PIC_SIZE			0x0228
+#define RK3399_AFBCD1_STATUS			0x022c
+#define RK3399_AFBCD2_CTRL			0x0240
+#define RK3399_AFBCD2_HDR_PTR			0x0244
+#define RK3399_AFBCD2_PIC_SIZE			0x0248
+#define RK3399_AFBCD2_STATUS			0x024c
+#define RK3399_AFBCD3_CTRL			0x0260
+#define RK3399_AFBCD3_HDR_PTR			0x0264
+#define RK3399_AFBCD3_PIC_SIZE			0x0268
+#define RK3399_AFBCD3_STATUS			0x026c
+#define RK3399_INTR_EN0				0x0280
+#define RK3399_INTR_CLEAR0			0x0284
+#define RK3399_INTR_STATUS0			0x0288
+#define RK3399_INTR_RAW_STATUS0			0x028c
+#define RK3399_INTR_EN1				0x0290
+#define RK3399_INTR_CLEAR1			0x0294
+#define RK3399_INTR_STATUS1			0x0298
+#define RK3399_INTR_RAW_STATUS1			0x029c
+#define RK3399_LINE_FLAG			0x02a0
+#define RK3399_VOP_STATUS			0x02a4
+#define RK3399_BLANKING_VALUE			0x02a8
+#define RK3399_MCU_BYPASS_PORT			0x02ac
+#define RK3399_WIN0_DSP_BG			0x02b0
+#define RK3399_WIN1_DSP_BG			0x02b4
+#define RK3399_WIN2_DSP_BG			0x02b8
+#define RK3399_WIN3_DSP_BG			0x02bc
+#define RK3399_YUV2YUV_WIN			0x02c0
+#define RK3399_YUV2YUV_POST			0x02c4
+#define RK3399_AUTO_GATING_EN			0x02cc
+#define RK3399_WIN0_CSC_COE			0x03a0
+#define RK3399_WIN1_CSC_COE			0x03c0
+#define RK3399_WIN2_CSC_COE			0x03e0
+#define RK3399_WIN3_CSC_COE			0x0400
+#define RK3399_HWC_CSC_COE			0x0420
+#define RK3399_BCSH_R2Y_CSC_COE			0x0440
+#define RK3399_BCSH_Y2R_CSC_COE			0x0460
+#define RK3399_POST_YUV2YUV_Y2R_COE		0x0480
+#define RK3399_POST_YUV2YUV_3X3_COE		0x04a0
+#define RK3399_POST_YUV2YUV_R2Y_COE		0x04c0
+#define RK3399_WIN0_YUV2YUV_Y2R			0x04e0
+#define RK3399_WIN0_YUV2YUV_3X3			0x0500
+#define RK3399_WIN0_YUV2YUV_R2Y			0x0520
+#define RK3399_WIN1_YUV2YUV_Y2R			0x0540
+#define RK3399_WIN1_YUV2YUV_3X3			0x0560
+#define RK3399_WIN1_YUV2YUV_R2Y			0x0580
+#define RK3399_WIN2_YUV2YUV_Y2R			0x05a0
+#define RK3399_WIN2_YUV2YUV_3X3			0x05c0
+#define RK3399_WIN2_YUV2YUV_R2Y			0x05e0
+#define RK3399_WIN3_YUV2YUV_Y2R			0x0600
+#define RK3399_WIN3_YUV2YUV_3X3			0x0620
+#define RK3399_WIN3_YUV2YUV_R2Y			0x0640
+#define RK3399_WIN2_LUT_ADDR			0x1000
+#define RK3399_WIN3_LUT_ADDR			0x1400
+#define RK3399_HWC_LUT_ADDR			0x1800
+#define RK3399_CABC_GAMMA_LUT_ADDR		0x1c00
+#define RK3399_GAMMA_LUT_ADDR			0x2000
+/* rk3399 register definition end */
+
+/* rk3328 register definition end */
+#define RK3328_REG_CFG_DONE			0x00000000
+#define RK3328_VERSION_INFO			0x00000004
+#define RK3328_SYS_CTRL				0x00000008
+#define RK3328_SYS_CTRL1			0x0000000c
+#define RK3328_DSP_CTRL0			0x00000010
+#define RK3328_DSP_CTRL1			0x00000014
+#define RK3328_DSP_BG				0x00000018
+#define RK3328_AUTO_GATING_EN			0x0000003c
+#define RK3328_LINE_FLAG			0x00000040
+#define RK3328_VOP_STATUS			0x00000044
+#define RK3328_BLANKING_VALUE			0x00000048
+#define RK3328_WIN0_DSP_BG			0x00000050
+#define RK3328_WIN1_DSP_BG			0x00000054
+#define RK3328_DBG_PERF_LATENCY_CTRL0		0x000000c0
+#define RK3328_DBG_PERF_RD_MAX_LATENCY_NUM0	0x000000c4
+#define RK3328_DBG_PERF_RD_LATENCY_THR_NUM0	0x000000c8
+#define RK3328_DBG_PERF_RD_LATENCY_SAMP_NUM0	0x000000cc
+#define RK3328_INTR_EN0				0x000000e0
+#define RK3328_INTR_CLEAR0			0x000000e4
+#define RK3328_INTR_STATUS0			0x000000e8
+#define RK3328_INTR_RAW_STATUS0			0x000000ec
+#define RK3328_INTR_EN1				0x000000f0
+#define RK3328_INTR_CLEAR1			0x000000f4
+#define RK3328_INTR_STATUS1			0x000000f8
+#define RK3328_INTR_RAW_STATUS1			0x000000fc
+#define RK3328_WIN0_CTRL0			0x00000100
+#define RK3328_WIN0_CTRL1			0x00000104
+#define RK3328_WIN0_COLOR_KEY			0x00000108
+#define RK3328_WIN0_VIR				0x0000010c
+#define RK3328_WIN0_YRGB_MST			0x00000110
+#define RK3328_WIN0_CBR_MST			0x00000114
+#define RK3328_WIN0_ACT_INFO			0x00000118
+#define RK3328_WIN0_DSP_INFO			0x0000011c
+#define RK3328_WIN0_DSP_ST			0x00000120
+#define RK3328_WIN0_SCL_FACTOR_YRGB		0x00000124
+#define RK3328_WIN0_SCL_FACTOR_CBR		0x00000128
+#define RK3328_WIN0_SCL_OFFSET			0x0000012c
+#define RK3328_WIN0_SRC_ALPHA_CTRL		0x00000130
+#define RK3328_WIN0_DST_ALPHA_CTRL		0x00000134
+#define RK3328_WIN0_FADING_CTRL			0x00000138
+#define RK3328_WIN0_CTRL2			0x0000013c
+#define RK3328_DBG_WIN0_REG0			0x000001f0
+#define RK3328_DBG_WIN0_REG1			0x000001f4
+#define RK3328_DBG_WIN0_REG2			0x000001f8
+#define RK3328_DBG_WIN0_RESERVED		0x000001fc
+#define RK3328_WIN1_CTRL0			0x00000200
+#define RK3328_WIN1_CTRL1			0x00000204
+#define RK3328_WIN1_COLOR_KEY			0x00000208
+#define RK3328_WIN1_VIR				0x0000020c
+#define RK3328_WIN1_YRGB_MST			0x00000210
+#define RK3328_WIN1_CBR_MST			0x00000214
+#define RK3328_WIN1_ACT_INFO			0x00000218
+#define RK3328_WIN1_DSP_INFO			0x0000021c
+#define RK3328_WIN1_DSP_ST			0x00000220
+#define RK3328_WIN1_SCL_FACTOR_YRGB		0x00000224
+#define RK3328_WIN1_SCL_FACTOR_CBR		0x00000228
+#define RK3328_WIN1_SCL_OFFSET			0x0000022c
+#define RK3328_WIN1_SRC_ALPHA_CTRL		0x00000230
+#define RK3328_WIN1_DST_ALPHA_CTRL		0x00000234
+#define RK3328_WIN1_FADING_CTRL			0x00000238
+#define RK3328_WIN1_CTRL2			0x0000023c
+#define RK3328_DBG_WIN1_REG0			0x000002f0
+#define RK3328_DBG_WIN1_REG1			0x000002f4
+#define RK3328_DBG_WIN1_REG2			0x000002f8
+#define RK3328_DBG_WIN1_RESERVED		0x000002fc
+#define RK3328_WIN2_CTRL0			0x00000300
+#define RK3328_WIN2_CTRL1			0x00000304
+#define RK3328_WIN2_COLOR_KEY			0x00000308
+#define RK3328_WIN2_VIR				0x0000030c
+#define RK3328_WIN2_YRGB_MST			0x00000310
+#define RK3328_WIN2_CBR_MST			0x00000314
+#define RK3328_WIN2_ACT_INFO			0x00000318
+#define RK3328_WIN2_DSP_INFO			0x0000031c
+#define RK3328_WIN2_DSP_ST			0x00000320
+#define RK3328_WIN2_SCL_FACTOR_YRGB		0x00000324
+#define RK3328_WIN2_SCL_FACTOR_CBR		0x00000328
+#define RK3328_WIN2_SCL_OFFSET			0x0000032c
+#define RK3328_WIN2_SRC_ALPHA_CTRL		0x00000330
+#define RK3328_WIN2_DST_ALPHA_CTRL		0x00000334
+#define RK3328_WIN2_FADING_CTRL			0x00000338
+#define RK3328_WIN2_CTRL2			0x0000033c
+#define RK3328_DBG_WIN2_REG0			0x000003f0
+#define RK3328_DBG_WIN2_REG1			0x000003f4
+#define RK3328_DBG_WIN2_REG2			0x000003f8
+#define RK3328_DBG_WIN2_RESERVED		0x000003fc
+#define RK3328_WIN3_CTRL0			0x00000400
+#define RK3328_WIN3_CTRL1			0x00000404
+#define RK3328_WIN3_COLOR_KEY			0x00000408
+#define RK3328_WIN3_VIR				0x0000040c
+#define RK3328_WIN3_YRGB_MST			0x00000410
+#define RK3328_WIN3_CBR_MST			0x00000414
+#define RK3328_WIN3_ACT_INFO			0x00000418
+#define RK3328_WIN3_DSP_INFO			0x0000041c
+#define RK3328_WIN3_DSP_ST			0x00000420
+#define RK3328_WIN3_SCL_FACTOR_YRGB		0x00000424
+#define RK3328_WIN3_SCL_FACTOR_CBR		0x00000428
+#define RK3328_WIN3_SCL_OFFSET			0x0000042c
+#define RK3328_WIN3_SRC_ALPHA_CTRL		0x00000430
+#define RK3328_WIN3_DST_ALPHA_CTRL		0x00000434
+#define RK3328_WIN3_FADING_CTRL			0x00000438
+#define RK3328_WIN3_CTRL2			0x0000043c
+#define RK3328_DBG_WIN3_REG0			0x000004f0
+#define RK3328_DBG_WIN3_REG1			0x000004f4
+#define RK3328_DBG_WIN3_REG2			0x000004f8
+#define RK3328_DBG_WIN3_RESERVED		0x000004fc
+
+#define RK3328_HWC_CTRL0			0x00000500
+#define RK3328_HWC_CTRL1			0x00000504
+#define RK3328_HWC_MST				0x00000508
+#define RK3328_HWC_DSP_ST			0x0000050c
+#define RK3328_HWC_SRC_ALPHA_CTRL		0x00000510
+#define RK3328_HWC_DST_ALPHA_CTRL		0x00000514
+#define RK3328_HWC_FADING_CTRL			0x00000518
+#define RK3328_HWC_RESERVED1			0x0000051c
+#define RK3328_POST_DSP_HACT_INFO		0x00000600
+#define RK3328_POST_DSP_VACT_INFO		0x00000604
+#define RK3328_POST_SCL_FACTOR_YRGB		0x00000608
+#define RK3328_POST_RESERVED			0x0000060c
+#define RK3328_POST_SCL_CTRL			0x00000610
+#define RK3328_POST_DSP_VACT_INFO_F1		0x00000614
+#define RK3328_DSP_HTOTAL_HS_END		0x00000618
+#define RK3328_DSP_HACT_ST_END			0x0000061c
+#define RK3328_DSP_VTOTAL_VS_END		0x00000620
+#define RK3328_DSP_VACT_ST_END			0x00000624
+#define RK3328_DSP_VS_ST_END_F1			0x00000628
+#define RK3328_DSP_VACT_ST_END_F1		0x0000062c
+#define RK3328_BCSH_COLOR_BAR			0x00000640
+#define RK3328_BCSH_BCS				0x00000644
+#define RK3328_BCSH_H				0x00000648
+#define RK3328_BCSH_CTRL			0x0000064c
+#define RK3328_FRC_LOWER01_0			0x00000678
+#define RK3328_FRC_LOWER01_1			0x0000067c
+#define RK3328_FRC_LOWER10_0			0x00000680
+#define RK3328_FRC_LOWER10_1			0x00000684
+#define RK3328_FRC_LOWER11_0			0x00000688
+#define RK3328_FRC_LOWER11_1			0x0000068c
+#define RK3328_DBG_POST_REG0			0x000006e8
+#define RK3328_DBG_POST_RESERVED		0x000006ec
+#define RK3328_DBG_DATAO			0x000006f0
+#define RK3328_DBG_DATAO_2			0x000006f4
+
+/* sdr to hdr */
+#define RK3328_SDR2HDR_CTRL			0x00000700
+#define RK3328_EOTF_OETF_Y0			0x00000704
+#define RK3328_RESERVED0001			0x00000708
+#define RK3328_RESERVED0002			0x0000070c
+#define RK3328_EOTF_OETF_Y1			0x00000710
+#define RK3328_EOTF_OETF_Y64			0x0000080c
+#define RK3328_OETF_DX_DXPOW1			0x00000810
+#define RK3328_OETF_DX_DXPOW64			0x0000090c
+#define RK3328_OETF_XN1				0x00000910
+#define RK3328_OETF_XN63			0x00000a08
+
+/* hdr to sdr */
+#define RK3328_HDR2SDR_CTRL			0x00000a10
+#define RK3328_HDR2SDR_SRC_RANGE		0x00000a14
+#define RK3328_HDR2SDR_NORMFACEETF		0x00000a18
+#define RK3328_RESERVED0003			0x00000a1c
+#define RK3328_HDR2SDR_DST_RANGE		0x00000a20
+#define RK3328_HDR2SDR_NORMFACCGAMMA		0x00000a24
+#define RK3328_EETF_OETF_Y0			0x00000a28
+#define RK3328_SAT_Y0				0x00000a2c
+#define RK3328_EETF_OETF_Y1			0x00000a30
+#define RK3328_SAT_Y1				0x00000ab0
+#define RK3328_SAT_Y8				0x00000acc
+
+#define RK3328_HWC_LUT_ADDR			0x00000c00
+
+/* rk3036 register definition */
+#define RK3036_SYS_CTRL			0x00
+#define RK3036_DSP_CTRL0		0x04
+#define RK3036_DSP_CTRL1		0x08
+#define RK3036_INT_STATUS		0x10
+#define RK3036_ALPHA_CTRL		0x14
+#define RK3036_WIN0_COLOR_KEY		0x18
+#define RK3036_WIN1_COLOR_KEY		0x1c
+#define RK3036_WIN0_YRGB_MST		0x20
+#define RK3036_WIN0_CBR_MST		0x24
+#define RK3036_WIN1_VIR			0x28
+#define RK3036_AXI_BUS_CTRL		0x2c
+#define RK3036_WIN0_VIR			0x30
+#define RK3036_WIN0_ACT_INFO		0x34
+#define RK3036_WIN0_DSP_INFO		0x38
+#define RK3036_WIN0_DSP_ST		0x3c
+#define RK3036_WIN0_SCL_FACTOR_YRGB	0x40
+#define RK3036_WIN0_SCL_FACTOR_CBR	0x44
+#define RK3036_WIN0_SCL_OFFSET		0x48
+#define RK3036_HWC_MST			0x58
+#define RK3036_HWC_DSP_ST		0x5c
+#define RK3036_DSP_HTOTAL_HS_END	0x6c
+#define RK3036_DSP_HACT_ST_END		0x70
+#define RK3036_DSP_VTOTAL_VS_END	0x74
+#define RK3036_DSP_VACT_ST_END		0x78
+#define RK3036_DSP_VS_ST_END_F1		0x7c
+#define RK3036_DSP_VACT_ST_END_F1	0x80
+#define RK3036_GATHER_TRANSFER		0x84
+#define RK3036_VERSION_INFO		0x94
+#define RK3036_REG_CFG_DONE		0x90
+#define RK3036_WIN1_MST			0xa0
+#define RK3036_WIN1_ACT_INFO		0xb4
+#define RK3036_WIN1_DSP_INFO		0xb8
+#define RK3036_WIN1_DSP_ST		0xbc
+#define RK3036_WIN1_SCL_FACTOR_YRGB	0xc0
+#define RK3036_WIN1_SCL_OFFSET		0xc8
+#define RK3036_BCSH_CTRL		0xd0
+#define RK3036_BCSH_COLOR_BAR		0xd4
+#define RK3036_BCSH_BCS			0xd8
+#define RK3036_BCSH_H			0xdc
+#define RK3036_WIN1_LUT_ADDR		0x400
+#define RK3036_HWC_LUT_ADDR		0x800
+/* rk3036 register definition end */
+
+#endif /* _ROCKCHIP_VOP_REG_H */
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index e3b9e5b0c9..c2d8ab7768 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -88,6 +88,7 @@ enum uclass_id {
 	UCLASS_VIDEO,		/* Video or LCD device */
 	UCLASS_VIDEO_BRIDGE,	/* Video bridge, e.g. DisplayPort to LVDS */
 	UCLASS_VIDEO_CONSOLE,	/* Text console driver for video device */
+	UCLASS_VIDEO_CRTC,	/* Display Controller */
 	UCLASS_WDT,		/* Watchdot Timer driver */
 	UCLASS_FG,
 	UCLASS_KEY,
diff --git a/include/dt-bindings/media/rockchip_mipi_dsi.h b/include/dt-bindings/media/rockchip_mipi_dsi.h
new file mode 100644
index 0000000000..469d8c4358
--- /dev/null
+++ b/include/dt-bindings/media/rockchip_mipi_dsi.h
@@ -0,0 +1,48 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __ROCKCHIP_MIPI_DSI_H__
+#define __ROCKCHIP_MIPI_DSI_H__
+
+/* request ACK from peripheral */
+#define MIPI_DSI_MSG_REQ_ACK	BIT(0)
+/* use Low Power Mode to transmit message */
+#define MIPI_DSI_MSG_USE_LPM	BIT(1)
+
+/* DSI mode flags */
+
+/* video mode */
+#define MIPI_DSI_MODE_VIDEO		BIT(0)
+/* video burst mode */
+#define MIPI_DSI_MODE_VIDEO_BURST	BIT(1)
+/* video pulse mode */
+#define MIPI_DSI_MODE_VIDEO_SYNC_PULSE	BIT(2)
+/* enable auto vertical count mode */
+#define MIPI_DSI_MODE_VIDEO_AUTO_VERT	BIT(3)
+/* enable hsync-end packets in vsync-pulse and v-porch area */
+#define MIPI_DSI_MODE_VIDEO_HSE		BIT(4)
+/* disable hfront-porch area */
+#define MIPI_DSI_MODE_VIDEO_HFP		BIT(5)
+/* disable hback-porch area */
+#define MIPI_DSI_MODE_VIDEO_HBP		BIT(6)
+/* disable hsync-active area */
+#define MIPI_DSI_MODE_VIDEO_HSA		BIT(7)
+/* flush display FIFO on vsync pulse */
+#define MIPI_DSI_MODE_VSYNC_FLUSH	BIT(8)
+/* disable EoT packets in HS mode */
+#define MIPI_DSI_MODE_EOT_PACKET	BIT(9)
+/* device supports non-continuous clock behavior (DSI spec 5.6.1) */
+#define MIPI_DSI_CLOCK_NON_CONTINUOUS	BIT(10)
+/* transmit data in low power */
+#define MIPI_DSI_MODE_LPM		BIT(11)
+
+#define MIPI_DSI_DCS_POWER_MODE_DISPLAY (1 << 2)
+#define MIPI_DSI_DCS_POWER_MODE_NORMAL  (1 << 3)
+#define MIPI_DSI_DCS_POWER_MODE_SLEEP   (1 << 4)
+#define MIPI_DSI_DCS_POWER_MODE_PARTIAL (1 << 5)
+#define MIPI_DSI_DCS_POWER_MODE_IDLE    (1 << 6)
+
+#endif /* __ROCKCHIP_MIPI_DSI__ */
diff --git a/include/linux/media-bus-format.h b/include/linux/media-bus-format.h
new file mode 100644
index 0000000000..190d491d5b
--- /dev/null
+++ b/include/linux/media-bus-format.h
@@ -0,0 +1,137 @@
+/*
+ * Media Bus API header
+ *
+ * Copyright (C) 2009, Guennadi Liakhovetski <g.liakhovetski@gmx.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __LINUX_MEDIA_BUS_FORMAT_H
+#define __LINUX_MEDIA_BUS_FORMAT_H
+
+/*
+ * These bus formats uniquely identify data formats on the data bus. Format 0
+ * is reserved, MEDIA_BUS_FMT_FIXED shall be used by host-client pairs, where
+ * the data format is fixed. Additionally, "2X8" means that one pixel is
+ * transferred in two 8-bit samples, "BE" or "LE" specify in which order those
+ * samples are transferred over the bus: "LE" means that the least significant
+ * bits are transferred first, "BE" means that the most significant bits are
+ * transferred first, and "PADHI" and "PADLO" define which bits - low or high,
+ * in the incomplete high byte, are filled with padding bits.
+ *
+ * The bus formats are grouped by type, bus_width, bits per component, samples
+ * per pixel and order of subsamples. Numerical values are sorted using generic
+ * numerical sort order (8 thus comes before 10).
+ *
+ * As their value can't change when a new bus format is inserted in the
+ * enumeration, the bus formats are explicitly given a numerical value. The next
+ * free values for each category are listed below, update them when inserting
+ * new pixel codes.
+ */
+
+#define MEDIA_BUS_FMT_FIXED			0x0001
+
+/* RGB - next is	0x1018 */
+#define MEDIA_BUS_FMT_RGB444_1X12		0x1016
+#define MEDIA_BUS_FMT_RGB444_2X8_PADHI_BE	0x1001
+#define MEDIA_BUS_FMT_RGB444_2X8_PADHI_LE	0x1002
+#define MEDIA_BUS_FMT_RGB555_2X8_PADHI_BE	0x1003
+#define MEDIA_BUS_FMT_RGB555_2X8_PADHI_LE	0x1004
+#define MEDIA_BUS_FMT_RGB565_1X16		0x1017
+#define MEDIA_BUS_FMT_BGR565_2X8_BE		0x1005
+#define MEDIA_BUS_FMT_BGR565_2X8_LE		0x1006
+#define MEDIA_BUS_FMT_RGB565_2X8_BE		0x1007
+#define MEDIA_BUS_FMT_RGB565_2X8_LE		0x1008
+#define MEDIA_BUS_FMT_RGB666_1X18		0x1009
+#define MEDIA_BUS_FMT_RBG888_1X24		0x100e
+#define MEDIA_BUS_FMT_RGB666_1X24_CPADHI	0x1015
+#define MEDIA_BUS_FMT_RGB666_1X7X3_SPWG		0x1010
+#define MEDIA_BUS_FMT_BGR888_1X24		0x1013
+#define MEDIA_BUS_FMT_GBR888_1X24		0x1014
+#define MEDIA_BUS_FMT_RGB888_1X24		0x100a
+#define MEDIA_BUS_FMT_RGB888_2X12_BE		0x100b
+#define MEDIA_BUS_FMT_RGB888_2X12_LE		0x100c
+#define MEDIA_BUS_FMT_RGB888_1X7X4_SPWG		0x1011
+#define MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA	0x1012
+#define MEDIA_BUS_FMT_ARGB8888_1X32		0x100d
+#define MEDIA_BUS_FMT_RGB888_1X32_PADHI		0x100f
+
+/* YUV (including grey) - next is	0x2026 */
+#define MEDIA_BUS_FMT_Y8_1X8			0x2001
+#define MEDIA_BUS_FMT_UV8_1X8			0x2015
+#define MEDIA_BUS_FMT_UYVY8_1_5X8		0x2002
+#define MEDIA_BUS_FMT_VYUY8_1_5X8		0x2003
+#define MEDIA_BUS_FMT_YUYV8_1_5X8		0x2004
+#define MEDIA_BUS_FMT_YVYU8_1_5X8		0x2005
+#define MEDIA_BUS_FMT_UYVY8_2X8			0x2006
+#define MEDIA_BUS_FMT_VYUY8_2X8			0x2007
+#define MEDIA_BUS_FMT_YUYV8_2X8			0x2008
+#define MEDIA_BUS_FMT_YVYU8_2X8			0x2009
+#define MEDIA_BUS_FMT_Y10_1X10			0x200a
+#define MEDIA_BUS_FMT_UYVY10_2X10		0x2018
+#define MEDIA_BUS_FMT_VYUY10_2X10		0x2019
+#define MEDIA_BUS_FMT_YUYV10_2X10		0x200b
+#define MEDIA_BUS_FMT_YVYU10_2X10		0x200c
+#define MEDIA_BUS_FMT_Y12_1X12			0x2013
+#define MEDIA_BUS_FMT_UYVY12_2X12		0x201c
+#define MEDIA_BUS_FMT_VYUY12_2X12		0x201d
+#define MEDIA_BUS_FMT_YUYV12_2X12		0x201e
+#define MEDIA_BUS_FMT_YVYU12_2X12		0x201f
+#define MEDIA_BUS_FMT_UYVY8_1X16		0x200f
+#define MEDIA_BUS_FMT_VYUY8_1X16		0x2010
+#define MEDIA_BUS_FMT_YUYV8_1X16		0x2011
+#define MEDIA_BUS_FMT_YVYU8_1X16		0x2012
+#define MEDIA_BUS_FMT_YDYUYDYV8_1X16		0x2014
+#define MEDIA_BUS_FMT_UYVY10_1X20		0x201a
+#define MEDIA_BUS_FMT_VYUY10_1X20		0x201b
+#define MEDIA_BUS_FMT_YUYV10_1X20		0x200d
+#define MEDIA_BUS_FMT_YVYU10_1X20		0x200e
+#define MEDIA_BUS_FMT_VUY8_1X24			0x2024
+#define MEDIA_BUS_FMT_YUV8_1X24			0x2025
+#define MEDIA_BUS_FMT_UYVY12_1X24		0x2020
+#define MEDIA_BUS_FMT_VYUY12_1X24		0x2021
+#define MEDIA_BUS_FMT_YUYV12_1X24		0x2022
+#define MEDIA_BUS_FMT_YVYU12_1X24		0x2023
+#define MEDIA_BUS_FMT_YUV10_1X30		0x2016
+#define MEDIA_BUS_FMT_AYUV8_1X32		0x2017
+
+/* Bayer - next is	0x3019 */
+#define MEDIA_BUS_FMT_SBGGR8_1X8		0x3001
+#define MEDIA_BUS_FMT_SGBRG8_1X8		0x3013
+#define MEDIA_BUS_FMT_SGRBG8_1X8		0x3002
+#define MEDIA_BUS_FMT_SRGGB8_1X8		0x3014
+#define MEDIA_BUS_FMT_SBGGR10_ALAW8_1X8		0x3015
+#define MEDIA_BUS_FMT_SGBRG10_ALAW8_1X8		0x3016
+#define MEDIA_BUS_FMT_SGRBG10_ALAW8_1X8		0x3017
+#define MEDIA_BUS_FMT_SRGGB10_ALAW8_1X8		0x3018
+#define MEDIA_BUS_FMT_SBGGR10_DPCM8_1X8		0x300b
+#define MEDIA_BUS_FMT_SGBRG10_DPCM8_1X8		0x300c
+#define MEDIA_BUS_FMT_SGRBG10_DPCM8_1X8		0x3009
+#define MEDIA_BUS_FMT_SRGGB10_DPCM8_1X8		0x300d
+#define MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_BE	0x3003
+#define MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE	0x3004
+#define MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_BE	0x3005
+#define MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_LE	0x3006
+#define MEDIA_BUS_FMT_SBGGR10_1X10		0x3007
+#define MEDIA_BUS_FMT_SGBRG10_1X10		0x300e
+#define MEDIA_BUS_FMT_SGRBG10_1X10		0x300a
+#define MEDIA_BUS_FMT_SRGGB10_1X10		0x300f
+#define MEDIA_BUS_FMT_SBGGR12_1X12		0x3008
+#define MEDIA_BUS_FMT_SGBRG12_1X12		0x3010
+#define MEDIA_BUS_FMT_SGRBG12_1X12		0x3011
+#define MEDIA_BUS_FMT_SRGGB12_1X12		0x3012
+
+/* JPEG compressed formats - next is	0x4002 */
+#define MEDIA_BUS_FMT_JPEG_1X8			0x4001
+
+/* Vendor specific formats - next is	0x5002 */
+
+/* S5C73M3 sensor specific interleaved UYVY and JPEG */
+#define MEDIA_BUS_FMT_S5C_UYVY_JPEG_1X8		0x5001
+
+/* HSV - next is	0x6002 */
+#define MEDIA_BUS_FMT_AHSV8888_1X32		0x6001
+
+#endif /* __LINUX_MEDIA_BUS_FORMAT_H */

commit bda599f7c7d1023a9629cecf3fcb9d90c159c5f0
Author: Shawn Lin <shawn.lin@rock-chips.com>
Date:   Mon Oct 9 17:51:29 2017 +0800

    mmc: dwmmc: Add stride PIO for better burst mode support
    
    This patch enables stride PIO for better burst mode
    support on some rockchip platforms, for instance rk3128,
    etc. It uses ldm and stm to make multiple accessing from
    CPU under some ARM architecture.
    
    Design Note:
    1) Carefully test it beyond the armv7(m) core since I don't
    test them! If you disassemble the code, dwmci_memcpy_fromio
    may be changed to use ldmia.w and stmia.w, as well as some
    other optimization for push/pop stack operation, but they
    are all fine!
    2) Do *NOT* remove noinline and __volatile attributes as
    you could fall into trouble by the optimization of GCC.
    And please invent new attributes if you use *OTHER* compilers
    which have their own keywords claiming the function to be a
    "plase don't inline the function and please don't reorder the
    groups".
    3) If you want to use this feature for other rockchip platforms,
    you could append new config in rockchip_dw_mmc.c. But now we only
    have CONFIG_ROCKCHIP_RK3128 which means we just enable it for
    rk312x platforms.
    4) Stride PIO is determined by both of host->stride_pio and
    the data payload. The intention of it is to make the block
    accessing faster. So now only enable it for who's data payload
    is larger(or equal to)than 512 Bytes.
    5) MAX_STRIDE means we support burst MAX_STRIDE * 4 Bytes per
    stride. Of course you could change that, but please read the
    comment before it in the code and do it carefully.
    
    How to test?
    1) Prepare a memory, for instance, 0x70000000 on RK3126c.
    
    => mw 0x70000000 0x55aa55aa 0x200
    
    2) Check it to see if 0x70000000 ~ 0x700000200 are all 0x55aa55aa
    
    => md 0x70000000 0x200
    70000000: 55aa55aa 55aa55aa 55aa55aa 55aa55aa    .U.U.U.U.U.U.U.U
    70000010: 55aa55aa 55aa55aa 55aa55aa 55aa55aa    .U.U.U.U.U.U.U.U
    70000020: 55aa55aa 55aa55aa 55aa55aa 55aa55aa    .U.U.U.U.U.U.U.U
    70000030: 55aa55aa 55aa55aa 55aa55aa 55aa55aa    .U.U.U.U.U.U.U.U
    ....
    
    3) Fetch data of 0x70000000 ~ 0x700000200 and wrrite them to eMMC,
    for instance, LBA 0x10000, and blk count is 1 as one blk means 0x200
    bytes.
    
    => mmc write 0x70000000 0x10000 1
    
    MMC write: dev # 0, block # 65536, count 1 ... 1 blocks written: OK
    
    4) Clean the merory buffer and double check it
    
    => mw 0x70000000 0x0 0x200
    => md 0x70000000 0x200
    70000000: 00000000 00000000 00000000 00000000    ................
    70000010: 00000000 00000000 00000000 00000000    ................
    70000020: 00000000 00000000 00000000 00000000    ................
    ....
    
    5) Well, now let's read back the data from eMMC from the LBA
    we wrote before.
    
    => mmc read 0x70000000 0x10000 1
    
    MMC read: dev # 0, block # 65536, count 1 ... 1 blocks read: OK
    
    6) We expect the 0x70000000 ~ 0x700000200 should be 0x55aa55aa instead
    of 0x0 which is cleared by step 4).
    
    => md 0x70000000 0x200
    70000000: 55aa55aa 55aa55aa 55aa55aa 55aa55aa    .U.U.U.U.U.U.U.U
    70000010: 55aa55aa 55aa55aa 55aa55aa 55aa55aa    .U.U.U.U.U.U.U.U
    70000020: 55aa55aa 55aa55aa 55aa55aa 55aa55aa    .U.U.U.U.U.U.U.U
    70000030: 55aa55aa 55aa55aa 55aa55aa 55aa55aa    .U.U.U.U.U.U.U.U
    ....
    
    Great, we see that the write and read eMMC are finished well and
    the data payload is correct as expected!
    
    Change-Id: I9b68c335449550b95f1a8f5841d46821346e45af
    Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index c94ed6e576..9f279092b0 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -16,6 +16,47 @@
 
 #define PAGE_SIZE 4096
 
+/*
+ * Currently it supports read/write up to 8*8*4 Bytes per
+ * stride as a burst mode. Please note that if you change
+ * MAX_STRIDE, you should also update dwmci_memcpy_fromio
+ * to augment the groups of {ldm, stm}.
+ */
+#define MAX_STRIDE 64
+#if CONFIG_ARM && CONFIG_CPU_V7
+void noinline dwmci_memcpy_fromio(void *buffer, void *fifo_addr)
+{
+	__asm__ __volatile__ (
+		"push {r2, r3, r4, r5, r6, r7, r8, r9}\n"
+		"ldm r1, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"stm r0!, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"ldm r1, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"stm r0!, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"ldm r1, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"stm r0!, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"ldm r1, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"stm r0!, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"ldm r1, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"stm r0!, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"ldm r1, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"stm r0!, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"ldm r1, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"stm r0!, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"ldm r1, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"stm r0!, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"pop {r2, r3, r4, r5, r6,r7,r8,r9}\n"
+		:::"memory"
+	);
+}
+
+void noinline dwmci_memcpy_toio(void *buffer, void *fifo_addr)
+{
+	dwmci_memcpy_fromio(fifo_addr, buffer);
+}
+#else
+void dwmci_memcpy_fromio(void *buffer, void *fifo_addr) {};
+void dwmci_memcpy_toio(void *buffer, void *fifo_addr) {};
+#endif
 static int dwmci_wait_reset(struct dwmci_host *host, u32 value)
 {
 	unsigned long timeout = 1000;
@@ -102,8 +143,11 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data)
 	ulong start = get_timer(0);
 	u32 fifo_depth = (((host->fifoth_val & RX_WMARK_MASK) >>
 			    RX_WMARK_SHIFT) + 1) * 2;
+	bool stride;
 
 	size = data->blocksize * data->blocks / 4;
+	/* Still use legacy PIO mode if size < 512(128 * 4) Bytes */
+	stride = host->stride_pio && size > 128;
 	if (data->flags == MMC_DATA_READ)
 		buf = (unsigned int *)data->dest;
 	else
@@ -144,9 +188,24 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data)
 					len = (len >> DWMCI_FIFO_SHIFT) &
 						    DWMCI_FIFO_MASK;
 					len = min(size, len);
-					for (i = 0; i < len; i++)
-						*buf++ =
-						dwmci_readl(host, DWMCI_DATA);
+					if (!stride) {
+						/* Legacy pio mode */
+						for (i = 0; i < len; i++)
+							*buf++ = dwmci_readl(host, DWMCI_DATA);
+						goto read_again;
+					}
+
+					/* dwmci_memcpy_fromio now bursts 256 Bytes once */
+					if (len < MAX_STRIDE)
+						continue;
+
+					for (i = 0; i < len / MAX_STRIDE; i++) {
+						dwmci_memcpy_fromio(buf, host->ioaddr + DWMCI_DATA);
+						buf += MAX_STRIDE;
+					}
+
+					len = i * MAX_STRIDE;
+read_again:
 					size = size > len ? (size - len) : 0;
 				}
 				dwmci_writel(host, DWMCI_RINTSTS,
@@ -159,9 +218,23 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data)
 						   DWMCI_FIFO_SHIFT) &
 						   DWMCI_FIFO_MASK);
 					len = min(size, len);
-					for (i = 0; i < len; i++)
-						dwmci_writel(host, DWMCI_DATA,
-							     *buf++);
+					if (!stride) {
+						for (i = 0; i < len; i++)
+							dwmci_writel(host, DWMCI_DATA,
+								     *buf++);
+						goto write_again;
+					}
+					/* dwmci_memcpy_toio now bursts 256 Bytes once */
+					if (len < MAX_STRIDE)
+						continue;
+
+					for (i = 0; i < len / MAX_STRIDE; i++) {
+						dwmci_memcpy_toio(buf, host->ioaddr + DWMCI_DATA);
+						buf += MAX_STRIDE;
+					}
+
+					len = i * MAX_STRIDE;
+write_again:
 					size = size > len ? (size - len) : 0;
 				}
 				dwmci_writel(host, DWMCI_RINTSTS,
diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index 6027642f44..4e607bfec4 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -260,6 +260,12 @@ static int rockchip_dwmmc_probe(struct udevice *dev)
 
 	host->fifo_mode = priv->fifo_mode;
 
+#ifdef CONFIG_ROCKCHIP_RK3128
+	host->stride_pio = true;
+#else
+	host->stride_pio = false;
+#endif
+
 #ifdef CONFIG_PWRSEQ
 	/* Enable power if needed */
 	ret = uclass_get_device_by_phandle(UCLASS_PWRSEQ, dev, "mmc-pwrseq",
diff --git a/include/dwmmc.h b/include/dwmmc.h
index 374a67d39c..9edbdf65c5 100644
--- a/include/dwmmc.h
+++ b/include/dwmmc.h
@@ -146,6 +146,7 @@
  * @fifoth_val:	Value for FIFOTH register (or 0 to leave unset)
  * @mmc:	Pointer to generic MMC structure for this device
  * @priv:	Private pointer for use by controller
+ * @stride_pio: Provide the ability of accessing fifo with burst mode
  */
 struct dwmci_host {
 	const char *name;
@@ -162,6 +163,7 @@ struct dwmci_host {
 	u32 fifoth_val;
 	struct mmc *mmc;
 	void *priv;
+	bool stride_pio;
 
 	void (*clksel)(struct dwmci_host *host);
 	void (*board_init)(struct dwmci_host *host);

commit 3d363c8dd846d1b63137f7f24d6e07445fdfd522
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Wed Sep 20 13:50:13 2017 +0200

    rockchip: imply ADC and SARADC_ROCKCHIP for Rockchip SOCs
    
    Enable the Rockchip SARADC driver for all Rockchip SoCs.
    
    Note that the SARADC peripheral is available on all SoCs except the
    RK3036 and RK3228.  However, as this is a DM-driver, enabling by
    default will not cause any function problems (and can always be
    changed from defconfig, if size is a concern).
    
    Change-Id: I79f921256d986a22e37174c003d49f7423676e28
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: David Wu <david.wu@rock-chips.com>
    (cherry picked from commit 8e8bcccc1830723ead3eaa9fdbf9579f09973f39)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 6ef2db3188..ded670dde3 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1119,6 +1119,8 @@ config ARCH_ROCKCHIP
 	imply USB_FUNCTION_FASTBOOT
 	imply SPL_SYSRESET
 	imply TPL_SYSRESET
+	imply ADC
+	imply SARADC_ROCKCHIP
 
 config TARGET_THUNDERX_88XX
 	bool "Support ThunderX 88xx"

commit cba1291691d1b3ebf56d794478632287acba5581
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Sep 20 14:47:19 2017 +0800

    rockchip: dts: Enable SARADC for rk3399-evb
    
    Enable the SARADC for download key pressed detect.
    
    Change-Id: Ia74bafb3c1e92570bc385102288831b934e53598
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    (cherry picked from commit 3b4cab15acd83aa468e809a300797253d8f66818)

diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts
index be0c6d98bd..0e5d8d79a1 100644
--- a/arch/arm/dts/rk3399-evb.dts
+++ b/arch/arm/dts/rk3399-evb.dts
@@ -149,6 +149,10 @@
 	status = "okay";
 };
 
+&saradc {
+	status = "okay";
+};
+
 &sdmmc {
 	bus-width = <4>;
 	status = "okay";

commit ea9be535651e890c71d1e49e8371c190202d7fbd
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Sep 20 14:46:19 2017 +0800

    rockchip: dts: Enable SARADC for rk3368-sheep
    
    Enable the SARADC for download key pressed detect.
    
    Change-Id: I82d03c9a468e4166a37f62c66937ac28463d1574
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    (cherry picked from commit 6333a3bad91153c9183060624de190709076eb48)

diff --git a/arch/arm/dts/rk3368-sheep.dts b/arch/arm/dts/rk3368-sheep.dts
index 7c190f7456..27befadd67 100644
--- a/arch/arm/dts/rk3368-sheep.dts
+++ b/arch/arm/dts/rk3368-sheep.dts
@@ -260,6 +260,10 @@
 	};
 };
 
+&saradc {
+	status = "okay";
+};
+
 &tsadc {
 	status = "okay";
 	rockchip,hw-tshut-mode = <0>; /* CRU */

commit 648b218ee6b89ba20c349365759c9f9f8f70e3b2
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Sep 20 14:45:21 2017 +0800

    rockchip: dts: Enable SARADC for rk3368-px5-evb
    
    Enable the SARADC for download key pressed detect.
    
    Change-Id: I98f3e32d907c48705943012408bf6570e0ad13a2
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    (cherry picked from commit 0ac1ae65eae072b56928f17b4a2abf79d2d1c477)

diff --git a/arch/arm/dts/rk3368-px5-evb.dts b/arch/arm/dts/rk3368-px5-evb.dts
index c7478f7ddb..e9c5ebad47 100644
--- a/arch/arm/dts/rk3368-px5-evb.dts
+++ b/arch/arm/dts/rk3368-px5-evb.dts
@@ -296,6 +296,10 @@
 	};
 };
 
+&saradc {
+	status = "okay";
+};
+
 &tsadc {
 	status = "okay";
 	rockchip,hw-tshut-mode = <0>; /* CRU */

commit 2bca1182c1c1a4ba96c4f3ab39fde7b9c5e1d2c6
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Sep 20 14:44:23 2017 +0800

    rockchip: dts: Enable SARADC for rk3328-evb
    
    Enable the SARADC for download key pressed detect.
    
    Change-Id: I68f8dab9383e5e23e355daaeeb61c14e11c410f1
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    (cherry picked from commit f957dec682dc2fa0363e09bfb5f41f008569245b)

diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts
index c0716de30e..5147795915 100644
--- a/arch/arm/dts/rk3328-evb.dts
+++ b/arch/arm/dts/rk3328-evb.dts
@@ -42,6 +42,10 @@
 	};
 };
 
+&saradc {
+	status = "okay";
+};
+
 &uart2 {
 	status = "okay";
 };

commit 3d50e68bd36f79ce2b14f157a04275721f648e15
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Sep 20 14:43:08 2017 +0800

    rockchip: dts: Enable SARADC for rk3288-popmetal
    
    Enable the SARADC for download key pressed detect.
    
    Change-Id: Ib1dd53196f6fb4c585a70c4cd0af3d04c32eb792
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    (cherry picked from commit 0eaf58bfaa0cffe822e216e260c1d36284d8bf10)

diff --git a/arch/arm/dts/rk3288-popmetal.dtsi b/arch/arm/dts/rk3288-popmetal.dtsi
index dd6ce8b69e..63785eb55e 100644
--- a/arch/arm/dts/rk3288-popmetal.dtsi
+++ b/arch/arm/dts/rk3288-popmetal.dtsi
@@ -491,6 +491,10 @@
 	};
 };
 
+&saradc {
+	status = "okay";
+};
+
 &tsadc {
 	rockchip,hw-tshut-mode = <0>;
 	rockchip,hw-tshut-polarity = <0>;

commit dfe9d5ec84ecad2afd18445139974f2c8c484c80
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Sep 20 14:41:38 2017 +0800

    rockchip: dts: Enable SARADC for rv1108-evb
    
    Enable the SARADC for download key pressed detect.
    
    Change-Id: Ia02f90a2a7b7a8f1154f6ef9ba0abf736d03c699
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    (cherry picked from commit 679276bde6f0aebb207053b5f11012f20577ce37)

diff --git a/arch/arm/dts/rv1108-evb.dts b/arch/arm/dts/rv1108-evb.dts
index 42dc7a1c62..71bdcd2207 100644
--- a/arch/arm/dts/rv1108-evb.dts
+++ b/arch/arm/dts/rv1108-evb.dts
@@ -39,6 +39,10 @@
 	snps,reset-gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_LOW>;
 };
 
+&saradc {
+	status = "okay";
+};
+
 &sfc {
 	status = "okay";
 	flash@0 {

commit a0898465dd46d958220c01f4fb10cb2c263394bf
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Sep 20 14:40:11 2017 +0800

    rockchip: dts: rv1108: Add SARADC node at dtsi level
    
    Change-Id: I36e463e74d1fd17a3870de566fde63ac99a41755
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    (cherry picked from commit fdc1eccbd19e8ea45e527d2b199917c075b6a4cd)

diff --git a/arch/arm/dts/rv1108.dtsi b/arch/arm/dts/rv1108.dtsi
index 5fc8eb6ac1..e7863e239f 100644
--- a/arch/arm/dts/rv1108.dtsi
+++ b/arch/arm/dts/rv1108.dtsi
@@ -149,6 +149,17 @@
 		};
 	};
 
+	saradc: saradc@1038c000 {
+		compatible = "rockchip,rv1108-saradc", "rockchip,rk3399-saradc";
+		reg = <0x1038c000 0x100>;
+		interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+		#io-channel-cells = <1>;
+		clock-frequency = <1000000>;
+		clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
+		clock-names = "saradc", "apb_pclk";
+		status = "disabled";
+	};
+
 	pmugrf: syscon@20060000 {
 		compatible = "rockchip,rv1108-pmugrf", "syscon";
 		reg = <0x20060000 0x1000>;

commit e78991bff6c180cd013fbf57297d2e2e3ffb1bd2
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Sep 20 14:38:58 2017 +0800

    rockchip: clk: Add rk3399 SARADC clock support
    
    The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1).
    SARADC integer divider control register is 8-bits width.
    
    Change-Id: Ifff2c9716ea409eee76cbeaf0a0878df05f304d2
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    (cherry picked from commit 364fc7315aa0e6e20f604bb8b369b4bdc0dd8e8a)

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index d4a5f3ba53..b31446e276 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -12,6 +12,7 @@
 #include <errno.h>
 #include <mapmem.h>
 #include <syscon.h>
+#include <bitfield.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/cru_rk3399.h>
@@ -181,7 +182,8 @@ enum {
 
 	/* CLKSEL_CON26 */
 	CLK_SARADC_DIV_CON_SHIFT	= 8,
-	CLK_SARADC_DIV_CON_MASK		= 0xff << CLK_SARADC_DIV_CON_SHIFT,
+	CLK_SARADC_DIV_CON_MASK		= GENMASK(15, 8),
+	CLK_SARADC_DIV_CON_WIDTH	= 8,
 
 	/* CLKSEL_CON27 */
 	CLK_TSADC_SEL_X24M		= 0x0,
@@ -861,6 +863,32 @@ static ulong rk3399_ddr_set_clk(struct rk3399_cru *cru,
 
 	return set_rate;
 }
+
+static ulong rk3399_saradc_get_clk(struct rk3399_cru *cru)
+{
+	u32 div, val;
+
+	val = readl(&cru->clksel_con[26]);
+	div = bitfield_extract(val, CLK_SARADC_DIV_CON_SHIFT,
+			       CLK_SARADC_DIV_CON_WIDTH);
+
+	return DIV_TO_RATE(OSC_HZ, div);
+}
+
+static ulong rk3399_saradc_set_clk(struct rk3399_cru *cru, uint hz)
+{
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1;
+	assert(src_clk_div < 128);
+
+	rk_clrsetreg(&cru->clksel_con[26],
+		     CLK_SARADC_DIV_CON_MASK,
+		     src_clk_div << CLK_SARADC_DIV_CON_SHIFT);
+
+	return rk3399_saradc_get_clk(cru);
+}
+
 static ulong rk3399_clk_get_rate(struct clk *clk)
 {
 	struct rk3399_clk_priv *priv = dev_get_priv(clk->dev);
@@ -896,6 +924,9 @@ static ulong rk3399_clk_get_rate(struct clk *clk)
 		break;
 	case PCLK_EFUSE1024NS:
 		break;
+	case SCLK_SARADC:
+		rate = rk3399_saradc_get_clk(priv->cru);
+		break;
 	default:
 		return -ENOENT;
 	}
@@ -944,6 +975,9 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate)
 		break;
 	case PCLK_EFUSE1024NS:
 		break;
+	case SCLK_SARADC:
+		ret = rk3399_saradc_set_clk(priv->cru, rate);
+		break;
 	default:
 		return -ENOENT;
 	}

commit 73e16df2e83b818e119b404283e6b2c49d3cafb3
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Sep 20 14:37:50 2017 +0800

    rockchip: clk: Add rk3368 SARADC clock support
    
    The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1).
    SARADC integer divider control register is 8-bits width.
    
    Change-Id: I47cc95d7e2cbf026bc34042cef4c2fe636bae674
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    (cherry picked from commit 615514c16dee4d43bd584ea326a5a56ebcb89c85)

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3368.h b/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
index 2b1197fd46..5f6a5fbe4c 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
@@ -89,6 +89,11 @@ enum {
 	MCU_CLK_DIV_SHIFT		= 0,
 	MCU_CLK_DIV_MASK		= GENMASK(4, 0),
 
+	/* CLKSEL_CON25 */
+	CLK_SARADC_DIV_CON_SHIFT	= 8,
+	CLK_SARADC_DIV_CON_MASK		= GENMASK(15, 8),
+	CLK_SARADC_DIV_CON_WIDTH	= 8,
+
 	/* CLKSEL43_CON */
 	GMAC_MUX_SEL_EXTCLK             = BIT(8),
 
diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c
index 0160d50c03..cd3ab248fb 100644
--- a/drivers/clk/rockchip/clk_rk3368.c
+++ b/drivers/clk/rockchip/clk_rk3368.c
@@ -12,6 +12,7 @@
 #include <errno.h>
 #include <mapmem.h>
 #include <syscon.h>
+#include <bitfield.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/cru_rk3368.h>
 #include <asm/arch/hardware.h>
@@ -397,6 +398,31 @@ static ulong rk3368_spi_set_clk(struct rk3368_cru *cru, ulong clk_id, uint hz)
 	return rk3368_spi_get_clk(cru, clk_id);
 }
 
+static ulong rk3368_saradc_get_clk(struct rk3368_cru *cru)
+{
+	u32 div, val;
+
+	val = readl(&cru->clksel_con[25]);
+	div = bitfield_extract(val, CLK_SARADC_DIV_CON_SHIFT,
+			       CLK_SARADC_DIV_CON_WIDTH);
+
+	return DIV_TO_RATE(OSC_HZ, div);
+}
+
+static ulong rk3368_saradc_set_clk(struct rk3368_cru *cru, uint hz)
+{
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1;
+	assert(src_clk_div < 128);
+
+	rk_clrsetreg(&cru->clksel_con[25],
+		     CLK_SARADC_DIV_CON_MASK,
+		     src_clk_div << CLK_SARADC_DIV_CON_SHIFT);
+
+	return rk3368_saradc_get_clk(cru);
+}
+
 static ulong rk3368_clk_get_rate(struct clk *clk)
 {
 	struct rk3368_clk_priv *priv = dev_get_priv(clk->dev);
@@ -419,6 +445,9 @@ static ulong rk3368_clk_get_rate(struct clk *clk)
 		rate = rk3368_mmc_get_clk(priv->cru, clk->id);
 		break;
 #endif
+	case SCLK_SARADC:
+		rate = rk3368_saradc_get_clk(priv->cru);
+		break;
 	default:
 		return -ENOENT;
 	}
@@ -453,6 +482,9 @@ static ulong rk3368_clk_set_rate(struct clk *clk, ulong rate)
 		ret = rk3368_gmac_set_clk(priv->cru, clk->id, rate);
 		break;
 #endif
+	case SCLK_SARADC:
+		ret =  rk3368_saradc_set_clk(priv->cru, rate);
+		break;
 	default:
 		return -ENOENT;
 	}

commit ae74d3d5ad3cffadf8908d726eb8f5e7d70126d4
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Sep 20 14:35:44 2017 +0800

    rockchip: clk: Add rk3328 SARADC clock support
    
    The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1).
    SARADC integer divider control register is 10-bits width.
    
    Change-Id: I73608db35c926470692eb982e881b01e52fcf2d9
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    (cherry picked from commit b375d84135e26d5ec5034a515af4df5981785f37)

diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c
index c3a6650de0..540d9104c3 100644
--- a/drivers/clk/rockchip/clk_rk3328.c
+++ b/drivers/clk/rockchip/clk_rk3328.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <bitfield.h>
 #include <clk-uclass.h>
 #include <dm.h>
 #include <errno.h>
@@ -114,7 +115,8 @@ enum {
 
 	/* CLKSEL_CON23 */
 	CLK_SARADC_DIV_CON_SHIFT	= 0,
-	CLK_SARADC_DIV_CON_MASK		= 0x3ff << CLK_SARADC_DIV_CON_SHIFT,
+	CLK_SARADC_DIV_CON_MASK		= GENMASK(9, 0),
+	CLK_SARADC_DIV_CON_WIDTH	= 10,
 
 	/* CLKSEL_CON24 */
 	CLK_PWM_PLL_SEL_CPLL		= 0,
@@ -478,6 +480,31 @@ static ulong rk3328_pwm_set_clk(struct rk3328_cru *cru, uint hz)
 	return DIV_TO_RATE(GPLL_HZ, div);
 }
 
+static ulong rk3328_saradc_get_clk(struct rk3328_cru *cru)
+{
+	u32 div, val;
+
+	val = readl(&cru->clksel_con[23]);
+	div = bitfield_extract(val, CLK_SARADC_DIV_CON_SHIFT,
+			       CLK_SARADC_DIV_CON_WIDTH);
+
+	return DIV_TO_RATE(OSC_HZ, div);
+}
+
+static ulong rk3328_saradc_set_clk(struct rk3328_cru *cru, uint hz)
+{
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1;
+	assert(src_clk_div < 128);
+
+	rk_clrsetreg(&cru->clksel_con[23],
+		     CLK_SARADC_DIV_CON_MASK,
+		     src_clk_div << CLK_SARADC_DIV_CON_SHIFT);
+
+	return rk3328_saradc_get_clk(cru);
+}
+
 static ulong rk3328_clk_get_rate(struct clk *clk)
 {
 	struct rk3328_clk_priv *priv = dev_get_priv(clk->dev);
@@ -501,6 +528,9 @@ static ulong rk3328_clk_get_rate(struct clk *clk)
 	case SCLK_PWM:
 		rate = rk3328_pwm_get_clk(priv->cru);
 		break;
+	case SCLK_SARADC:
+		rate = rk3328_saradc_get_clk(priv->cru);
+		break;
 	default:
 		return -ENOENT;
 	}
@@ -531,6 +561,9 @@ static ulong rk3328_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_PWM:
 		ret = rk3328_pwm_set_clk(priv->cru, rate);
 		break;
+	case SCLK_SARADC:
+		ret = rk3328_saradc_set_clk(priv->cru, rate);
+		break;
 	default:
 		return -ENOENT;
 	}

commit b6e52402c4623753f3761c6c8d43016be50aeb88
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Sep 20 14:28:19 2017 +0800

    rockchip: clk: Add SARADC clock support for rk3288
    
    The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1).
    SARADC integer divider control register is 8-bits width.
    
    Change-Id: Icb41bbf2a719ab7b2c1c70e1227408d3abb625db
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    (cherry picked from commit ef4cf5ae393e4adf532f536d6da97c87f88db230)

diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index bd05379c44..204a54787e 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <bitfield.h>
 #include <clk-uclass.h>
 #include <dm.h>
 #include <dt-structs.h>
@@ -111,6 +112,15 @@ enum {
 	PERI_ACLK_DIV_SHIFT	= 0,
 	PERI_ACLK_DIV_MASK	= 0x1f << PERI_ACLK_DIV_SHIFT,
 
+	/*
+	 * CLKSEL24
+	 * saradc_div_con:
+	 * clk_saradc=24MHz/(saradc_div_con+1)
+	 */
+	CLK_SARADC_DIV_CON_SHIFT	= 8,
+	CLK_SARADC_DIV_CON_MASK		= GENMASK(15, 8),
+	CLK_SARADC_DIV_CON_WIDTH	= 8,
+
 	SOCSTS_DPLL_LOCK	= 1 << 5,
 	SOCSTS_APLL_LOCK	= 1 << 6,
 	SOCSTS_CPLL_LOCK	= 1 << 7,
@@ -635,6 +645,31 @@ static ulong rockchip_spi_set_clk(struct rk3288_cru *cru, uint gclk_rate,
 	return rockchip_spi_get_clk(cru, gclk_rate, periph);
 }
 
+static ulong rockchip_saradc_get_clk(struct rk3288_cru *cru)
+{
+	u32 div, val;
+
+	val = readl(&cru->cru_clksel_con[24]);
+	div = bitfield_extract(val, CLK_SARADC_DIV_CON_SHIFT,
+			       CLK_SARADC_DIV_CON_WIDTH);
+
+	return DIV_TO_RATE(OSC_HZ, div);
+}
+
+static ulong rockchip_saradc_set_clk(struct rk3288_cru *cru, uint hz)
+{
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1;
+	assert(src_clk_div < 128);
+
+	rk_clrsetreg(&cru->cru_clksel_con[24],
+		     CLK_SARADC_DIV_CON_MASK,
+		     src_clk_div << CLK_SARADC_DIV_CON_SHIFT);
+
+	return rockchip_saradc_get_clk(cru);
+}
+
 static ulong rk3288_clk_get_rate(struct clk *clk)
 {
 	struct rk3288_clk_priv *priv = dev_get_priv(clk->dev);
@@ -669,6 +704,9 @@ static ulong rk3288_clk_get_rate(struct clk *clk)
 		return gclk_rate;
 	case PCLK_PWM:
 		return PD_BUS_PCLK_HZ;
+	case SCLK_SARADC:
+		new_rate = rockchip_saradc_get_clk(priv->cru);
+		break;
 	default:
 		return -ENOENT;
 	}
@@ -759,6 +797,9 @@ static ulong rk3288_clk_set_rate(struct clk *clk, ulong rate)
 		new_rate = rate;
 		break;
 #endif
+	case SCLK_SARADC:
+		new_rate = rockchip_saradc_set_clk(priv->cru, rate);
+		break;
 	default:
 		return -ENOENT;
 	}

commit befbd723c2c9eadcfa6e9ae1dca845f05d3c29c8
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Sep 20 14:28:18 2017 +0800

    rockchip: clk: Add rv1108 SARADC clock support
    
    The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1).
    SARADC integer divider control register is 10-bits width.
    
    Change-Id: I1ff152b72a75680601f22c5b621de8b2198a6778
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    (cherry picked from commit 2e4ce50d1aca35d13944f48a7e15d0b63e86eb38)

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rv1108.h b/arch/arm/include/asm/arch-rockchip/cru_rv1108.h
index 2a1ae692be..ad2dc96467 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rv1108.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rv1108.h
@@ -90,6 +90,11 @@ enum {
 	CORE_CLK_DIV_SHIFT	= 0,
 	CORE_CLK_DIV_MASK	= 0x1f << CORE_CLK_DIV_SHIFT,
 
+	/* CLKSEL_CON22 */
+	CLK_SARADC_DIV_CON_SHIFT= 0,
+	CLK_SARADC_DIV_CON_MASK	= GENMASK(9, 0),
+	CLK_SARADC_DIV_CON_WIDTH= 10,
+
 	/* CLKSEL24_CON */
 	MAC_PLL_SEL_SHIFT	= 12,
 	MAC_PLL_SEL_MASK	= 1 << MAC_PLL_SEL_SHIFT,
diff --git a/drivers/clk/rockchip/clk_rv1108.c b/drivers/clk/rockchip/clk_rv1108.c
index cf966bbdc3..86e73e414c 100644
--- a/drivers/clk/rockchip/clk_rv1108.c
+++ b/drivers/clk/rockchip/clk_rv1108.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <bitfield.h>
 #include <clk-uclass.h>
 #include <dm.h>
 #include <errno.h>
@@ -36,7 +37,7 @@ enum {
 			 #hz "Hz cannot be hit with PLL "\
 			 "divisors on line " __stringify(__LINE__));
 
-/* use interge mode*/
+/* use integer mode */
 static inline int rv1108_pll_id(enum rk_clk_id clk_id)
 {
 	int id = 0;
@@ -130,6 +131,31 @@ static int rv1108_sfc_set_clk(struct rv1108_cru *cru, uint rate)
 	return DIV_TO_RATE(pll_rate, div);
 }
 
+static ulong rv1108_saradc_get_clk(struct rv1108_cru *cru)
+{
+	u32 div, val;
+
+	val = readl(&cru->clksel_con[22]);
+	div = bitfield_extract(val, CLK_SARADC_DIV_CON_SHIFT,
+			       CLK_SARADC_DIV_CON_WIDTH);
+
+	return DIV_TO_RATE(OSC_HZ, div);
+}
+
+static ulong rv1108_saradc_set_clk(struct rv1108_cru *cru, uint hz)
+{
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1;
+	assert(src_clk_div < 128);
+
+	rk_clrsetreg(&cru->clksel_con[22],
+		     CLK_SARADC_DIV_CON_MASK,
+		     src_clk_div << CLK_SARADC_DIV_CON_SHIFT);
+
+	return rv1108_saradc_get_clk(cru);
+}
+
 static ulong rv1108_clk_get_rate(struct clk *clk)
 {
 	struct rv1108_clk_priv *priv = dev_get_priv(clk->dev);
@@ -137,6 +163,8 @@ static ulong rv1108_clk_get_rate(struct clk *clk)
 	switch (clk->id) {
 	case 0 ... 63:
 		return rkclk_pll_get_rate(priv->cru, clk->id);
+	case SCLK_SARADC:
+		return rv1108_saradc_get_clk(priv->cru);
 	default:
 		return -ENOENT;
 	}
@@ -154,6 +182,9 @@ static ulong rv1108_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_SFC:
 		new_rate = rv1108_sfc_set_clk(priv->cru, rate);
 		break;
+	case SCLK_SARADC:
+		new_rate = rv1108_saradc_set_clk(priv->cru, rate);
+		break;
 	default:
 		return -ENOENT;
 	}
diff --git a/include/dt-bindings/clock/rv1108-cru.h b/include/dt-bindings/clock/rv1108-cru.h
index d2ad3bb52d..7defc6b282 100644
--- a/include/dt-bindings/clock/rv1108-cru.h
+++ b/include/dt-bindings/clock/rv1108-cru.h
@@ -39,6 +39,7 @@
 #define SCLK_MAC_TX			88
 #define SCLK_MACREF			89
 #define SCLK_MACREF_OUT			90
+#define SCLK_SARADC			91
 
 
 /* aclk gates */
@@ -67,6 +68,7 @@
 #define PCLK_TIMER			270
 #define PCLK_PERI			271
 #define PCLK_GMAC			272
+#define PCLK_SARADC			273
 
 /* hclk gates */
 #define HCLK_I2S0_8CH			320

commit ae6cbe8a11c7df7096b4db01fd29fbda04beff23
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Sep 20 14:28:16 2017 +0800

    dm: adc: Add driver for Rockchip SARADC
    
    The ADC can support some channels signal-ended some bits Successive Approximation
    Register (SAR) A/D Converter, like 6-channel and 10-bit. It converts the analog
    input signal into some bits binary digital codes.
    
    Change-Id: I073d00a739df142ddb4b93cc6a0a48b47008d3f0
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    (cherry picked from commit ae3ed042ed31d1acbdd56938b45bd6c5076bebe3)

diff --git a/drivers/adc/Kconfig b/drivers/adc/Kconfig
index e5335f7234..8094420548 100644
--- a/drivers/adc/Kconfig
+++ b/drivers/adc/Kconfig
@@ -28,3 +28,12 @@ config ADC_SANDBOX
 	  - 4 analog input channels
 	  - 16-bit resolution
 	  - single and multi-channel conversion mode
+
+config SARADC_ROCKCHIP
+	bool "Enable Rockchip SARADC driver"
+	help
+	  This enables driver for Rockchip SARADC.
+	  It provides:
+	  - 2~6 analog input channels
+	  - 1O or 12 bits resolution
+	  - Up to 1MSPS of sample rate
diff --git a/drivers/adc/Makefile b/drivers/adc/Makefile
index cebf26de07..4b5aa693ec 100644
--- a/drivers/adc/Makefile
+++ b/drivers/adc/Makefile
@@ -8,3 +8,4 @@
 obj-$(CONFIG_ADC) += adc-uclass.o
 obj-$(CONFIG_ADC_EXYNOS) += exynos-adc.o
 obj-$(CONFIG_ADC_SANDBOX) += sandbox.o
+obj-$(CONFIG_SARADC_ROCKCHIP) += rockchip-saradc.o
diff --git a/drivers/adc/rockchip-saradc.c b/drivers/adc/rockchip-saradc.c
new file mode 100644
index 0000000000..0e6271d097
--- /dev/null
+++ b/drivers/adc/rockchip-saradc.c
@@ -0,0 +1,183 @@
+/*
+ * (C) Copyright 2017, Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ *
+ * Rockchip SARADC driver for U-Boot
+ */
+
+#include <common.h>
+#include <adc.h>
+#include <clk.h>
+#include <dm.h>
+#include <errno.h>
+#include <asm/io.h>
+
+#define SARADC_CTRL_CHN_MASK		GENMASK(2, 0)
+#define SARADC_CTRL_POWER_CTRL		BIT(3)
+#define SARADC_CTRL_IRQ_ENABLE		BIT(5)
+#define SARADC_CTRL_IRQ_STATUS		BIT(6)
+
+#define SARADC_TIMEOUT			(100 * 1000)
+
+struct rockchip_saradc_regs {
+	unsigned int data;
+	unsigned int stas;
+	unsigned int ctrl;
+	unsigned int dly_pu_soc;
+};
+
+struct rockchip_saradc_data {
+	int				num_bits;
+	int				num_channels;
+	unsigned long			clk_rate;
+};
+
+struct rockchip_saradc_priv {
+	struct rockchip_saradc_regs		*regs;
+	int					active_channel;
+	const struct rockchip_saradc_data	*data;
+};
+
+int rockchip_saradc_channel_data(struct udevice *dev, int channel,
+				 unsigned int *data)
+{
+	struct rockchip_saradc_priv *priv = dev_get_priv(dev);
+	struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
+
+	if (channel != priv->active_channel) {
+		error("Requested channel is not active!");
+		return -EINVAL;
+	}
+
+	if ((readl(&priv->regs->ctrl) & SARADC_CTRL_IRQ_STATUS) !=
+	    SARADC_CTRL_IRQ_STATUS)
+		return -EBUSY;
+
+	/* Read value */
+	*data = readl(&priv->regs->data);
+	*data &= uc_pdata->data_mask;
+
+	/* Power down adc */
+	writel(0, &priv->regs->ctrl);
+
+	return 0;
+}
+
+int rockchip_saradc_start_channel(struct udevice *dev, int channel)
+{
+	struct rockchip_saradc_priv *priv = dev_get_priv(dev);
+
+	if (channel < 0 || channel >= priv->data->num_channels) {
+		error("Requested channel is invalid!");
+		return -EINVAL;
+	}
+
+	/* 8 clock periods as delay between power up and start cmd */
+	writel(8, &priv->regs->dly_pu_soc);
+
+	/* Select the channel to be used and trigger conversion */
+	writel(SARADC_CTRL_POWER_CTRL | (channel & SARADC_CTRL_CHN_MASK) |
+	       SARADC_CTRL_IRQ_ENABLE, &priv->regs->ctrl);
+
+	priv->active_channel = channel;
+
+	return 0;
+}
+
+int rockchip_saradc_stop(struct udevice *dev)
+{
+	struct rockchip_saradc_priv *priv = dev_get_priv(dev);
+
+	/* Power down adc */
+	writel(0, &priv->regs->ctrl);
+
+	priv->active_channel = -1;
+
+	return 0;
+}
+
+int rockchip_saradc_probe(struct udevice *dev)
+{
+	struct rockchip_saradc_priv *priv = dev_get_priv(dev);
+	struct clk clk;
+	int ret;
+
+	ret = clk_get_by_index(dev, 0, &clk);
+	if (ret)
+		return ret;
+
+	ret = clk_set_rate(&clk, priv->data->clk_rate);
+	if (IS_ERR_VALUE(ret))
+		return ret;
+
+	priv->active_channel = -1;
+
+	return 0;
+}
+
+int rockchip_saradc_ofdata_to_platdata(struct udevice *dev)
+{
+	struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
+	struct rockchip_saradc_priv *priv = dev_get_priv(dev);
+	struct rockchip_saradc_data *data;
+
+	data = (struct rockchip_saradc_data *)dev_get_driver_data(dev);
+	priv->regs = (struct rockchip_saradc_regs *)dev_read_addr(dev);
+	if (priv->regs == (struct rockchip_saradc_regs *)FDT_ADDR_T_NONE) {
+		error("Dev: %s - can't get address!", dev->name);
+		return -ENODATA;
+	}
+
+	priv->data = data;
+	uc_pdata->data_mask = (1 << priv->data->num_bits) - 1;;
+	uc_pdata->data_format = ADC_DATA_FORMAT_BIN;
+	uc_pdata->data_timeout_us = SARADC_TIMEOUT / 5;
+	uc_pdata->channel_mask = (1 << priv->data->num_channels) - 1;
+
+	return 0;
+}
+
+static const struct adc_ops rockchip_saradc_ops = {
+	.start_channel = rockchip_saradc_start_channel,
+	.channel_data = rockchip_saradc_channel_data,
+	.stop = rockchip_saradc_stop,
+};
+
+static const struct rockchip_saradc_data saradc_data = {
+	.num_bits = 10,
+	.num_channels = 3,
+	.clk_rate = 1000000,
+};
+
+static const struct rockchip_saradc_data rk3066_tsadc_data = {
+	.num_bits = 12,
+	.num_channels = 2,
+	.clk_rate = 50000,
+};
+
+static const struct rockchip_saradc_data rk3399_saradc_data = {
+	.num_bits = 10,
+	.num_channels = 6,
+	.clk_rate = 1000000,
+};
+
+static const struct udevice_id rockchip_saradc_ids[] = {
+	{ .compatible = "rockchip,saradc",
+	  .data = (ulong)&saradc_data },
+	{ .compatible = "rockchip,rk3066-tsadc",
+	  .data = (ulong)&rk3066_tsadc_data },
+	{ .compatible = "rockchip,rk3399-saradc",
+	  .data = (ulong)&rk3399_saradc_data },
+	{ }
+};
+
+U_BOOT_DRIVER(rockchip_saradc) = {
+	.name		= "rockchip_saradc",
+	.id		= UCLASS_ADC,
+	.of_match	= rockchip_saradc_ids,
+	.ops		= &rockchip_saradc_ops,
+	.probe		= rockchip_saradc_probe,
+	.ofdata_to_platdata = rockchip_saradc_ofdata_to_platdata,
+	.priv_auto_alloc_size = sizeof(struct rockchip_saradc_priv),
+};

commit 114fbf71bcf3c055c0499f0dea6deda8e370603f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Oct 11 10:42:37 2017 +0800

    configs: add evb-rk3126_defconfig
    
    Change-Id: Ic66c588e1659e1ba87b2116d130bc9e4326bb437
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-rk3126_defconfig b/configs/evb-rk3126_defconfig
new file mode 100644
index 0000000000..a547546de5
--- /dev/null
+++ b/configs/evb-rk3126_defconfig
@@ -0,0 +1,42 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_ROCKCHIP_RK3128=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3126-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_FASTBOOT_BUF_ADDR=0x60800800
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_ROCKCHIP_RK3128=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_RAM=y
+CONFIG_DEBUG_UART_BASE=0x20068000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x310c
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_ERRNO_STR=y

commit d3bcd7237efa4f1965e94ab6db3238ffe0a7582d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Oct 11 10:42:22 2017 +0800

    rockchip: dts: add rk3126-evb.dts
    
    Change-Id: I4a088342ac370ccf58ddcac84c390a24638b4ac2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 9fc8127317..fcf0f71e5a 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -29,6 +29,7 @@ dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \
 dtb-$(CONFIG_EXYNOS7420) += exynos7420-espresso7420.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += \
 	rk3036-sdk.dtb \
+	rk3126-evb.dtb \
 	rk3128-evb.dtb \
 	rk3188-radxarock.dtb \
 	rk3288-evb.dtb \
diff --git a/arch/arm/dts/rk3126-evb.dts b/arch/arm/dts/rk3126-evb.dts
new file mode 100644
index 0000000000..2e6ca8762b
--- /dev/null
+++ b/arch/arm/dts/rk3126-evb.dts
@@ -0,0 +1,78 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include "rk3128.dtsi"
+
+/ {
+	model = "Rockchip RK3126 Evaluation board";
+	compatible = "rockchip,rk3128-evb", "rockchip,rk3128";
+
+	chosen {
+		stdout-path = &uart2;
+	};
+
+	vcc5v0_otg: vcc5v0-otg-drv {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc5v0_otg";
+		gpio = <&gpio0 26 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&otg_vbus_drv>;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+	};
+
+	vcc5v0_host: vcc5v0-host-drv {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc5v0_host";
+		gpio = <&gpio2 23 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&host_vbus_drv>;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+	};
+};
+
+&i2c1 {
+	status = "okay";
+
+        hym8563: hym8563@51 {
+		compatible = "haoyu,hym8563";
+		reg = <0x51>;
+		#clock-cells = <0>;
+		clock-frequency = <32768>;
+		clock-output-names = "xin32k";
+	};
+};
+
+&usb_host {
+	status = "okay";
+};
+
+&usb_otg {
+	status = "okay";
+};
+
+&emmc {
+	fifo-mode;
+	status = "okay";
+};
+
+&pinctrl {
+	usb_otg {
+		otg_vbus_drv: host-vbus-drv {
+			rockchip,pins = <0 26 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	usb_host {
+		host_vbus_drv: host-vbus-drv {
+			rockchip,pins = <2 23 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};

commit 6cab9ef35ce2dbd2284fcf4e31e3d120f4647d5b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 10 19:19:48 2017 +0800

    power: pmic: rk8xx: bind rk816 fuel gauge
    
    Change-Id: I81962bc8fa2e11585dead8b32f7b46a6882275aa
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index 8358549014..4d8149849c 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -29,6 +29,7 @@ static const struct pmic_child_info power_key_info[] = {
 
 static const struct pmic_child_info fuel_gauge_info[] = {
 	{ .prefix = "battery", .driver = "rk818_fg"},
+	{ .prefix = "battery", .driver = "rk816_fg"},
 	{ },
 };
 

commit 6a367335743118ba7c38d91108c40043ed123397
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Sep 18 20:22:29 2017 +0800

    power: pmic: rk8xx: bind rk818 fuel gauge
    
    Change-Id: Iad4d6f66d48e824a2020ba78fa81e30cf52230ca
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index 0d32410149..8358549014 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -27,6 +27,11 @@ static const struct pmic_child_info power_key_info[] = {
 	{ },
 };
 
+static const struct pmic_child_info fuel_gauge_info[] = {
+	{ .prefix = "battery", .driver = "rk818_fg"},
+	{ },
+};
+
 static int rk8xx_reg_count(struct udevice *dev)
 {
 	return RK808_NUM_OF_REGS;
@@ -82,6 +87,10 @@ static int rk8xx_bind(struct udevice *dev)
 	if (!children)
 		debug("%s: %s - no child found\n", __func__, dev->name);
 
+	children = pmic_bind_children(dev, dev->node, fuel_gauge_info);
+	if (!children)
+		debug("%s: %s - no child found\n", __func__, dev->name);
+
 	/* Always return success for this device */
 	return 0;
 }

commit ab5c5d85514c4680f6b48fc96fcad528e3a1c387
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Sep 14 20:28:51 2017 +0800

    power: fuel gauge: add rk816 support
    
    Change-Id: I282045cf1bcefa3bc18278a86b568de3703e095a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/Kconfig b/drivers/power/fuel_gauge/Kconfig
index 78b5963536..2299e2c397 100644
--- a/drivers/power/fuel_gauge/Kconfig
+++ b/drivers/power/fuel_gauge/Kconfig
@@ -9,3 +9,9 @@ config POWER_FG_RK818
 	depends on DM_FUEL_GAUGE && PMIC_RK8XX
 	help
 	  This adds support for RK818 fuel gauge support.
+
+config POWER_FG_RK816
+	bool "RK816 Fuel gauge support"
+	depends on DM_FUEL_GAUGE && PMIC_RK8XX
+	help
+	  This adds support for RK816 fuel gauge support.
diff --git a/drivers/power/fuel_gauge/Makefile b/drivers/power/fuel_gauge/Makefile
index 0b84981222..5e9d2c6126 100644
--- a/drivers/power/fuel_gauge/Makefile
+++ b/drivers/power/fuel_gauge/Makefile
@@ -9,3 +9,4 @@ obj-$(CONFIG_DM_FUEL_GAUGE) += fuel_gauge_uclass.o
 
 obj-$(CONFIG_POWER_FG_MAX17042) += fg_max17042.o
 obj-$(CONFIG_POWER_FG_RK818) += fg_rk818.o
+obj-$(CONFIG_POWER_FG_RK816) += fg_rk816.o
diff --git a/drivers/power/fuel_gauge/fg_rk816.c b/drivers/power/fuel_gauge/fg_rk816.c
new file mode 100644
index 0000000000..20a54d03c0
--- /dev/null
+++ b/drivers/power/fuel_gauge/fg_rk816.c
@@ -0,0 +1,1399 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+/* #include <adc.h> */
+#include <dm.h>
+#include <errno.h>
+#include <common.h>
+#include <malloc.h>
+#include <fdtdec.h>
+#include <asm/gpio.h>
+#include <common.h>
+#include <power/pmic.h>
+#include <power/fuel_gauge.h>
+#include <power/rk8xx_pmic.h>
+#include <linux/usb/phy-rockchip-inno-usb2.h>
+#include "fg_regs.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static int dbg_enable = 0;
+#define DBG(args...) \
+	do { \
+		if (dbg_enable) { \
+			printf(args); \
+		} \
+	} while (0)
+
+#define BAT_INFO(fmt, args...) printf("rk816-bat: "fmt, ##args)
+
+#define DRIVER_VERSION		"2.0"
+
+/* THERMAL_REG */
+#define TEMP_115C		(0x03 << 2)
+#define FB_TEMP_MSK		0x0c
+
+/* CHRG_CTRL_REG2*/
+#define FINISH_100MA		(0x00 << 6)
+#define FINISH_150MA		(0x01 << 6)
+#define FINISH_200MA		(0x02 << 6)
+#define FINISH_250MA		(0x03 << 6)
+#define FINISH_CUR_MSK		0xc7
+
+/* CHRG_CTRL_REG3*/
+#define CHRG_TERM_DIG_SIGNAL	(1 << 5)
+#define CHRG_TIMER_CCCV_EN	(1 << 2)
+
+/* CHRG_CTRL_REG */
+#define ILIM_450MA		(0x00)
+#define ILIM_2000MA		(0x07)
+#define CHRG_CT_EN		(1 << 7)
+
+/* USB_CTRL_REG */
+#define INPUT_CUR_MSK		0x0f
+
+/* VB_MON_REG */
+#define PLUG_IN_STS		(1 << 6)
+
+/* GGSTS */
+#define BAT_CON			(1 << 4)
+#define VOL_INSTANT		(1 << 0)
+#define VOL_AVG			(0 << 0)
+
+/* TS_CTRL_REG */
+#define GG_EN			(1 << 7)
+
+/* CHRG_USB_CTRL*/
+#define CHRG_EN			(1 << 7)
+
+/*SUP_STS_REG*/
+#define BAT_EXS			(1 << 7)
+#define USB_EXIST		(1 << 1)
+#define USB_EFF			(1 << 0)
+#define CHARGE_OFF		(0x00 << 4)
+#define DEAD_CHARGE		(0x01 << 4)
+#define TRICKLE_CHARGE		(0x02 << 4)
+#define CC_OR_CV		(0x03 << 4)
+#define CHARGE_FINISH		(0x04 << 4)
+#define USB_OVER_VOL		(0x05 << 4)
+#define BAT_TMP_ERR		(0x06 << 4)
+#define TIMER_ERR		(0x07 << 4)
+#define USB_VLIMIT_EN		(1 << 3)
+#define USB_CLIMIT_EN		(1 << 2)
+#define BAT_STATUS_MSK		0x70
+
+/* GGCON */
+#define ADC_CUR_MODE		(1 << 1)
+
+/* CALI PARAM */
+#define FINISH_CALI_CURR	1500
+#define TERM_CALI_CURR		600
+#define	VIRTUAL_POWER_VOL	4200
+#define	VIRTUAL_POWER_SOC	66
+#define SECONDS(n)		((n) * 1000)
+
+/* CALC PARAM */
+#define MAX_PERCENTAGE		100
+#define MAX_INTERPOLATE		1000
+#define MAX_INT			0x7fff
+#define MIN_FCC			500
+
+/* DC ADC */
+#define FG_INIT			(1 << 3)
+#define FG_RESET_LATE		(1 << 1)
+#define FG_RESET_NOW		(1 << 0)
+#define CHRG_TERM_DSOC		90
+#define CHRG_TERM_K		650
+#define CHRG_FULL_K		400
+#define ADC_CALIB_THRESHOLD	4
+#define DC_ADC_TRIGGER		150
+#define DIV(x)			((x) ? (x) : 1)
+
+/***********************************************************/
+struct battery_info {
+	int		chrg_type;
+	int		poffset;
+	int		bat_res;
+	int		current_avg;
+	int		voltage_avg;
+	int		voltage_ocv;
+	int		voltage_k;
+	int		voltage_b;
+	int		dsoc;
+	int		rsoc;
+	int		fcc;
+	int		qmax;
+	int		remain_cap;
+	int		design_cap;
+	int		nac;
+	u32		*ocv_table;
+	u32		ocv_size;
+	int		virtual_power;
+	int		pwroff_min;
+	int		sm_old_cap;
+	int		sm_linek;
+	int		sm_chrg_dsoc;
+	int		adc_allow_update;
+	int		chrg_vol_sel;
+	int		chrg_cur_input;
+	int		chrg_cur_sel;
+	int		dts_vol_sel;
+	int		dts_cur_input;
+	int		dts_cur_sel;
+	int		max_soc_offset;
+	struct gpio_desc *dc_det;
+	int		dc_type;
+	int		dc_det_adc;
+	ulong		vol_mode_base;
+	ulong		finish_chrg_base;
+	u8		calc_dsoc;
+	u8		calc_rsoc;
+	int		sm_meet_soc;
+	u8		halt_cnt;
+	bool		is_halt;
+	bool		is_ocv_calib;
+	bool		is_max_soc_offset;
+	bool		is_first_power_on;
+	bool		is_sw_reset;
+	int		pwr_dsoc;
+	int		pwr_rsoc;
+	int		pwr_vol;
+};
+
+enum charger_type {
+	NO_CHARGER = 0,
+	USB_CHARGER,
+	AC_CHARGER,
+	DC_CHARGER,
+	UNDEF_CHARGER,
+};
+
+enum dc_type {
+	DC_TYPE_OF_NONE = 0,
+	DC_TYPE_OF_GPIO,
+	DC_TYPE_OF_ADC,
+};
+
+static struct udevice *g_pmic_dev;
+
+/* TODO */
+#define CONFIG_SCREEN_ON_VOL_THRESD	3400
+
+static const u32 CHRG_VOL_SEL[] = {
+	4050, 4100, 4150, 4200, 4250, 4300, 4350
+};
+
+static const u32 CHRG_CUR_SEL[] = {
+	1000, 1200, 1400, 1600, 1800, 2000, 2250, 2400
+};
+
+static const u32 CHRG_CUR_INPUT[] = {
+	450, 800, 850, 1000, 1250, 1500, 1750, 2000
+};
+
+static int rk816_bat_read(u8 reg)
+{
+	return pmic_reg_read(g_pmic_dev, reg);
+}
+
+static void rk816_bat_write(u8 reg, u8 buf)
+{
+	pmic_reg_write(g_pmic_dev, reg, buf);
+}
+
+static int rk816_bat_dwc_otg_check_dpdm(void)
+{
+	return rockchip_chg_get_type();
+}
+
+static int rk816_bat_get_rsoc(struct battery_info *di)
+{
+	return (di->remain_cap + di->fcc / 200) * 100 / DIV(di->fcc);
+}
+
+static int rk816_bat_get_dsoc(struct  battery_info *di)
+{
+	return rk816_bat_read(SOC_REG);
+}
+
+static void rk816_bat_enable_gauge(struct battery_info *di)
+{
+	u8 val;
+
+	val = rk816_bat_read(TS_CTRL_REG);
+	val |= GG_EN;
+	rk816_bat_write(TS_CTRL_REG, val);
+}
+
+static void rk816_bat_set_vol_instant_mode(struct battery_info *di)
+{
+	u8 val;
+
+	val = rk816_bat_read(GGSTS_REG);
+	val |= VOL_INSTANT;
+	rk816_bat_write(GGSTS_REG, val);
+}
+
+static void rk816_bat_set_vol_avg_mode(struct battery_info *di)
+{
+	u8 val;
+
+	val = rk816_bat_read(GGSTS_REG);
+	val &= ~0x01;
+	val |= VOL_AVG;
+	rk816_bat_write(GGSTS_REG, val);
+}
+
+static int rk816_bat_get_vcalib0(struct battery_info *di)
+{
+	int val = 0;
+
+	val |= rk816_bat_read(VCALIB0_REGL) << 0;
+	val |= rk816_bat_read(VCALIB0_REGH) << 8;
+
+	return val;
+}
+
+static int rk816_bat_get_vcalib1(struct battery_info *di)
+{
+	int val = 0;
+
+	val |= rk816_bat_read(VCALIB1_REGL) << 0;
+	val |= rk816_bat_read(VCALIB1_REGH) << 8;
+
+	DBG("<%s>. coffset: 0x%x\n", __func__, val);
+	return val;
+}
+
+static void rk816_bat_set_coffset(struct battery_info *di, int val)
+{
+	u8 buf;
+
+	buf = (val >> 0) & 0xff;
+	rk816_bat_write(CAL_OFFSET_REGL, buf);
+	buf = (val >> 8) & 0xff;
+	rk816_bat_write(CAL_OFFSET_REGH, buf);
+
+	DBG("<%s>. set coffset: 0x%x\n", __func__, val);
+}
+
+static int rk816_bat_get_ioffset(struct battery_info *di)
+{
+	int val = 0;
+
+	val |= rk816_bat_read(IOFFSET_REGL) << 0;
+	val |= rk816_bat_read(IOFFSET_REGH) << 8;
+
+	return val;
+}
+
+static void rk816_bat_init_voltage_kb(struct battery_info *di)
+{
+	int vcalib0, vcalib1;
+
+	vcalib0 = rk816_bat_get_vcalib0(di);
+	vcalib1 = rk816_bat_get_vcalib1(di);
+	di->voltage_k = (4200 - 3000) * 1000 / DIV(vcalib1 - vcalib0);
+	di->voltage_b = 4200 - (di->voltage_k * vcalib1) / 1000;
+	DBG("%s. vk=%d, vb=%d\n", __func__, di->voltage_k, di->voltage_b);
+}
+
+static int rk816_bat_get_ocv_voltage(struct battery_info *di)
+{
+	int vol, val = 0;
+
+	val |= rk816_bat_read(BAT_OCV_REGL) << 0;
+	val |= rk816_bat_read(BAT_OCV_REGH) << 8;
+	vol = di->voltage_k * val / 1000 + di->voltage_b;
+	vol = vol * 1100 / 1000;
+
+	return vol;
+}
+
+static int rk816_bat_get_avg_current(struct battery_info *di)
+{
+	int val = 0;
+
+	val |= rk816_bat_read(BAT_CUR_AVG_REGL) << 0;
+	val |= rk816_bat_read(BAT_CUR_AVG_REGH) << 8;
+
+	if (val & 0x800)
+		val -= 4096;
+	val = val * 1506 / 1000;
+
+	return val;
+}
+
+static int rk816_bat_get_avg_voltage(struct battery_info *di)
+{
+	int vol, val = 0;
+
+	val |= rk816_bat_read(BAT_VOL_REGL) << 0;
+	val |= rk816_bat_read(BAT_VOL_REGH) << 8;
+	vol = di->voltage_k * val / 1000 + di->voltage_b;
+	vol = vol * 1100 / 1000;
+
+	return vol;
+}
+
+static int rk816_bat_get_est_voltage(struct battery_info *di)
+{
+	int est_vol, vol, curr;
+
+	vol = rk816_bat_get_avg_voltage(di);
+	curr = rk816_bat_get_avg_current(di);
+	est_vol = vol - (di->bat_res * curr / 1000);
+
+	return (est_vol > 2800) ? est_vol : vol;
+}
+
+static u8 rk816_bat_finish_ma(int fcc)
+{
+	u8 ma;
+
+	if (fcc > 5000)
+		ma = FINISH_250MA;
+	else if (fcc >= 4000)
+		ma = FINISH_200MA;
+	else if (fcc >= 3000)
+		ma = FINISH_150MA;
+	else
+		ma = FINISH_100MA;
+
+	return ma;
+}
+
+static void rk816_bat_select_chrg_cv(struct battery_info *di)
+{
+	int index, chrg_vol_sel, chrg_cur_sel, chrg_cur_input;
+
+	chrg_vol_sel = di->dts_vol_sel;
+	chrg_cur_sel = di->dts_cur_sel;
+	chrg_cur_input = di->dts_cur_input;
+
+	for (index = 0; index < ARRAY_SIZE(CHRG_VOL_SEL); index++) {
+		if (chrg_vol_sel < CHRG_VOL_SEL[index])
+			break;
+		di->chrg_vol_sel = (index << 4);
+	}
+
+	for (index = 0; index < ARRAY_SIZE(CHRG_CUR_INPUT); index++) {
+		if (chrg_cur_input < CHRG_CUR_INPUT[index])
+			break;
+		di->chrg_cur_input = (index << 0);
+	}
+
+	for (index = 0; index < ARRAY_SIZE(CHRG_CUR_SEL); index++) {
+		if (chrg_cur_sel < CHRG_CUR_SEL[index])
+			break;
+		di->chrg_cur_sel = (index << 0);
+	}
+
+	DBG("<%s>. vol=0x%x, input=0x%x, sel=0x%x\n",
+	    __func__, di->chrg_vol_sel, di->chrg_cur_input, di->chrg_cur_sel);
+}
+
+static void rk816_bat_init_chrg_config(struct battery_info *di)
+{
+	u8 chrg_ctrl1, usb_ctrl, chrg_ctrl2, chrg_ctrl3;
+	u8 sup_sts, ggcon, thermal, finish_ma;
+
+	rk816_bat_select_chrg_cv(di);
+	finish_ma = rk816_bat_finish_ma(di->fcc);
+
+	ggcon = rk816_bat_read(GGCON_REG);
+	sup_sts = rk816_bat_read(SUP_STS_REG);
+	usb_ctrl = rk816_bat_read(USB_CTRL_REG);
+	thermal = rk816_bat_read(THERMAL_REG);
+	chrg_ctrl2 = rk816_bat_read(CHRG_CTRL_REG2);
+	chrg_ctrl3 = rk816_bat_read(CHRG_CTRL_REG3);
+
+	/* set charge current and voltage */
+	usb_ctrl &= ~INPUT_CUR_MSK;
+	usb_ctrl |= di->chrg_cur_input;
+	chrg_ctrl1 = (CHRG_EN | di->chrg_vol_sel | di->chrg_cur_sel);
+
+	/* digital signal and finish current*/
+	chrg_ctrl3 |= CHRG_TERM_DIG_SIGNAL;
+	chrg_ctrl2 &= ~FINISH_CUR_MSK;
+	chrg_ctrl2 |= finish_ma;
+
+	/* cccv mode */
+	chrg_ctrl3 &= ~CHRG_TIMER_CCCV_EN;
+
+	/* enable voltage limit and enable input current limit */
+	sup_sts |= USB_VLIMIT_EN;
+	sup_sts |= USB_CLIMIT_EN;
+
+	/* set feedback temperature */
+	usb_ctrl |= CHRG_CT_EN;
+	thermal &= ~FB_TEMP_MSK;
+	thermal |= TEMP_115C;
+
+	/* adc current mode */
+	ggcon |= ADC_CUR_MODE;
+
+	rk816_bat_write(GGCON_REG, ggcon);
+	rk816_bat_write(SUP_STS_REG, sup_sts);
+	rk816_bat_write(USB_CTRL_REG, usb_ctrl);
+	rk816_bat_write(THERMAL_REG, thermal);
+	rk816_bat_write(CHRG_CTRL_REG1, chrg_ctrl1);
+	rk816_bat_write(CHRG_CTRL_REG2, chrg_ctrl2);
+	rk816_bat_write(CHRG_CTRL_REG3, chrg_ctrl3);
+}
+
+static u32 interpolate(int value, u32 *table, int size)
+{
+	uint8_t i;
+	uint16_t d;
+
+	for (i = 0; i < size; i++) {
+		if (value < table[i])
+			break;
+	}
+
+	if ((i > 0) && (i < size)) {
+		d = (value - table[i - 1]) * (MAX_INTERPOLATE / (size - 1));
+		d /= table[i] - table[i - 1];
+		d = d + (i - 1) * (MAX_INTERPOLATE / (size - 1));
+	} else {
+		d = i * ((MAX_INTERPOLATE + size / 2) / size);
+	}
+
+	if (d > 1000)
+		d = 1000;
+
+	return d;
+}
+
+/* returns (a * b) / c */
+static int32_t ab_div_c(u32 a, u32 b, u32 c)
+{
+	bool sign;
+	u32 ans = MAX_INT;
+	int32_t tmp;
+
+	sign = ((((a ^ b) ^ c) & 0x80000000) != 0);
+
+	if (c != 0) {
+		if (sign)
+			c = -c;
+		tmp = ((int32_t)a * b + (c >> 1)) / c;
+		if (tmp < MAX_INT)
+			ans = tmp;
+	}
+
+	if (sign)
+		ans = -ans;
+
+	return ans;
+}
+
+static int rk816_bat_vol_to_cap(struct battery_info *di, int voltage)
+{
+	u32 *ocv_table, tmp;
+	int ocv_size, ocv_cap;
+
+	ocv_table = di->ocv_table;
+	ocv_size = di->ocv_size;
+	tmp = interpolate(voltage, ocv_table, ocv_size);
+	ocv_cap = ab_div_c(tmp, di->fcc, MAX_INTERPOLATE);
+
+	return ocv_cap;
+}
+
+static int rk816_bat_vol_to_soc(struct battery_info *di, int voltage)
+{
+	u32 *ocv_table, tmp;
+	int ocv_size, ocv_soc;
+
+	ocv_table = di->ocv_table;
+	ocv_size = di->ocv_size;
+	tmp = interpolate(voltage, ocv_table, ocv_size);
+	ocv_soc = ab_div_c(tmp, MAX_PERCENTAGE, MAX_INTERPOLATE);
+
+	return ocv_soc;
+}
+
+static int rk816_bat_get_prev_cap(struct battery_info *di)
+{
+	int val = 0;
+
+	val |= rk816_bat_read(REMAIN_CAP_REG3) << 24;
+	val |= rk816_bat_read(REMAIN_CAP_REG2) << 16;
+	val |= rk816_bat_read(REMAIN_CAP_REG1) << 8;
+	val |= rk816_bat_read(REMAIN_CAP_REG0) << 0;
+
+	return val;
+}
+
+static void rk816_bat_save_fcc(struct battery_info *di, u32 cap)
+{
+	u8 buf;
+
+	buf = (cap >> 24) & 0xff;
+	rk816_bat_write(NEW_FCC_REG3, buf);
+	buf = (cap >> 16) & 0xff;
+	rk816_bat_write(NEW_FCC_REG2, buf);
+	buf = (cap >> 8) & 0xff;
+	rk816_bat_write(NEW_FCC_REG1, buf);
+	buf = (cap >> 0) & 0xff;
+	rk816_bat_write(NEW_FCC_REG0, buf);
+}
+
+static int rk816_bat_get_fcc(struct battery_info *di)
+{
+	int val = 0;
+
+	val |= rk816_bat_read(NEW_FCC_REG3) << 24;
+	val |= rk816_bat_read(NEW_FCC_REG2) << 16;
+	val |= rk816_bat_read(NEW_FCC_REG1) << 8;
+	val |= rk816_bat_read(NEW_FCC_REG0) << 0;
+
+	if (val < MIN_FCC)
+		val = di->design_cap;
+	else if (val > di->qmax)
+		val = di->qmax;
+
+	return val;
+}
+
+static u8 rk816_bat_get_pwroff_min(struct battery_info *di)
+{
+	u8 cur, last;
+
+	cur = rk816_bat_read(NON_ACT_TIMER_CNT_REG);
+	last = rk816_bat_read(NON_ACT_TIMER_CNT_SAVE_REG);
+	rk816_bat_write(NON_ACT_TIMER_CNT_SAVE_REG, cur);
+
+	return (cur != last) ? cur : 0;
+}
+
+static int rk816_bat_get_coulomb_cap(struct battery_info *di)
+{
+	int val = 0;
+
+	val |= rk816_bat_read(GASCNT_REG3) << 24;
+	val |= rk816_bat_read(GASCNT_REG2) << 16;
+	val |= rk816_bat_read(GASCNT_REG1) << 8;
+	val |= rk816_bat_read(GASCNT_REG0) << 0;
+	val /= 2390;
+
+	return val;
+}
+
+static void rk816_bat_init_capacity(struct battery_info *di, u32 capacity)
+{
+	u8 buf;
+	u32 cap;
+	int delta;
+
+	delta = capacity - di->remain_cap;
+	if (!delta)
+		return;
+
+	cap = capacity * 2390;
+	buf = (cap >> 24) & 0xff;
+	rk816_bat_write(GASCNT_CAL_REG3, buf);
+	buf = (cap >> 16) & 0xff;
+	rk816_bat_write(GASCNT_CAL_REG2, buf);
+	buf = (cap >> 8) & 0xff;
+	rk816_bat_write(GASCNT_CAL_REG1, buf);
+	buf = (cap >> 0) & 0xff;
+	rk816_bat_write(GASCNT_CAL_REG0, buf);
+
+	di->remain_cap = rk816_bat_get_coulomb_cap(di);
+	di->rsoc = rk816_bat_get_rsoc(di);
+}
+
+static bool is_rk816_bat_ocv_valid(struct battery_info *di)
+{
+	return di->pwroff_min >= 30 ? true : false;
+}
+
+static int rk816_bat_get_usb_state(struct battery_info *di)
+{
+	int charger_type;
+
+	switch (rk816_bat_dwc_otg_check_dpdm()) {
+	case 0:
+		if ((rk816_bat_read(VB_MON_REG) & PLUG_IN_STS) != 0)
+			charger_type = DC_CHARGER;
+		else
+			charger_type = NO_CHARGER;
+		break;
+	case 1:
+	case 3:
+		charger_type = USB_CHARGER;
+		break;
+	case 2:
+		charger_type = AC_CHARGER;
+		break;
+	default:
+		charger_type = NO_CHARGER;
+	}
+
+	return charger_type;
+}
+
+static void rk816_bat_clr_initialized_state(struct battery_info *di)
+{
+	u8 val;
+
+	val = rk816_bat_read(MISC_MARK_REG);
+	val &= ~FG_INIT;
+	rk816_bat_write(MISC_MARK_REG, val);
+}
+
+static bool rk816_bat_is_initialized(struct battery_info *di)
+{
+	return (rk816_bat_read(MISC_MARK_REG) & FG_INIT) ? true : false;
+}
+
+static void rk816_bat_set_initialized_state(struct battery_info *di)
+{
+	u8 val;
+
+	val = rk816_bat_read(MISC_MARK_REG);
+	if (rk816_bat_get_usb_state(di) != NO_CHARGER) {
+		val |= FG_INIT;
+		rk816_bat_write(MISC_MARK_REG, val);
+		BAT_INFO("fuel gauge initialized... estv=%d, ch=%d\n",
+			 rk816_bat_get_est_voltage(di),
+			 rk816_bat_get_usb_state(di));
+	}
+}
+
+static void rk816_bat_first_pwron(struct battery_info *di)
+{
+	int ocv_vol;
+
+	rk816_bat_save_fcc(di, di->design_cap);
+	ocv_vol = rk816_bat_get_ocv_voltage(di);
+	di->fcc = rk816_bat_get_fcc(di);
+	di->nac = rk816_bat_vol_to_cap(di, ocv_vol);
+	di->rsoc = rk816_bat_vol_to_soc(di, ocv_vol);
+	di->dsoc = di->rsoc;
+	rk816_bat_init_capacity(di, di->nac);
+	rk816_bat_set_initialized_state(di);
+
+	BAT_INFO("first power on: soc=%d\n", di->dsoc);
+}
+
+static u8 rk816_bat_get_halt_cnt(struct battery_info *di)
+{
+	return rk816_bat_read(HALT_CNT_REG);
+}
+
+static void rk816_bat_inc_halt_cnt(struct battery_info *di)
+{
+	u8 cnt;
+
+	cnt = rk816_bat_read(HALT_CNT_REG);
+	rk816_bat_write(HALT_CNT_REG, ++cnt);
+}
+
+static bool is_rk816_bat_last_halt(struct battery_info *di)
+{
+	int pre_cap = rk816_bat_get_prev_cap(di);
+	int now_cap = rk816_bat_get_coulomb_cap(di);
+
+	/* over 5%: system halt last time */
+	if (abs(now_cap - pre_cap) > (di->fcc / 20)) {
+		rk816_bat_inc_halt_cnt(di);
+		return true;
+	} else {
+		return false;
+	}
+}
+
+static void rk816_bat_not_first_pwron(struct battery_info *di)
+{
+	int pre_soc, pre_cap, ocv_cap, ocv_soc, ocv_vol, now_cap;
+
+	di->fcc = rk816_bat_get_fcc(di);
+	pre_soc = rk816_bat_get_dsoc(di);
+	pre_cap = rk816_bat_get_prev_cap(di);
+	now_cap = rk816_bat_get_coulomb_cap(di);
+	di->pwr_dsoc = pre_soc;
+	di->pwr_rsoc = (now_cap + di->fcc / 200) * 100 / DIV(di->fcc);
+	di->is_halt = is_rk816_bat_last_halt(di);
+	di->halt_cnt = rk816_bat_get_halt_cnt(di);
+	di->is_ocv_calib = is_rk816_bat_ocv_valid(di);
+
+	if (di->is_halt) {
+		BAT_INFO("system halt last time... cap: pre=%d, now=%d\n",
+			 pre_cap, now_cap);
+		if (now_cap < 0)
+			now_cap = 0;
+		rk816_bat_init_capacity(di, now_cap);
+		pre_cap = di->remain_cap;
+		pre_soc = di->rsoc;
+		goto finish;
+	} else if (di->is_ocv_calib) {
+		ocv_vol = rk816_bat_get_ocv_voltage(di);
+		ocv_soc = rk816_bat_vol_to_soc(di, ocv_vol);
+		ocv_cap = rk816_bat_vol_to_cap(di, ocv_vol);
+		pre_cap = ocv_cap;
+		BAT_INFO("do ocv calib.. rsoc=%d\n", ocv_soc);
+
+		if (abs(ocv_soc - pre_soc) >= di->max_soc_offset) {
+			BAT_INFO("trigger max soc offset, soc: %d -> %d\n",
+				 pre_soc, ocv_soc);
+			pre_soc = ocv_soc;
+			di->is_max_soc_offset = true;
+		}
+		BAT_INFO("OCV calib: cap=%d, rsoc=%d\n", ocv_cap, ocv_soc);
+	}
+finish:
+	di->dsoc = pre_soc;
+	di->nac = pre_cap;
+	rk816_bat_init_capacity(di, di->nac);
+	rk816_bat_set_initialized_state(di);
+	BAT_INFO("dl=%d rl=%d cap=%d m=%d v=%d ov=%d c=%d pl=%d ch=%d Ver=%s\n",
+		 di->dsoc, di->rsoc, di->remain_cap, di->pwroff_min,
+		 rk816_bat_get_avg_voltage(di), rk816_bat_get_ocv_voltage(di),
+		 rk816_bat_get_avg_current(di), rk816_bat_get_dsoc(di),
+		 rk816_bat_get_usb_state(di), DRIVER_VERSION
+		 );
+}
+
+static bool is_rk816_bat_first_poweron(struct battery_info *di)
+{
+	u8 buf;
+
+	buf = rk816_bat_read(GGSTS_REG);
+	if (buf & BAT_CON) {
+		buf &= ~BAT_CON;
+		rk816_bat_write(GGSTS_REG, buf);
+		return true;
+	}
+
+	return false;
+}
+
+static bool rk816_bat_ocv_sw_reset(struct battery_info *di)
+{
+	u8 buf;
+
+	buf = rk816_bat_read(MISC_MARK_REG);
+	if (((buf & FG_RESET_LATE) && di->pwroff_min >= 30) ||
+	    (buf & FG_RESET_NOW)) {
+		buf &= ~FG_RESET_LATE;
+		buf &= ~FG_RESET_NOW;
+		rk816_bat_write(MISC_MARK_REG, buf);
+		BAT_INFO("manual reset fuel gauge\n");
+		return true;
+	} else {
+		return false;
+	}
+}
+
+void rk816_bat_init_rsoc(struct battery_info *di)
+{
+	di->pwroff_min = rk816_bat_get_pwroff_min(di);
+	di->is_first_power_on = is_rk816_bat_first_poweron(di);
+	di->is_sw_reset = rk816_bat_ocv_sw_reset(di);
+
+	if (di->is_first_power_on || di->is_sw_reset)
+		rk816_bat_first_pwron(di);
+	else
+		rk816_bat_not_first_pwron(di);
+}
+
+static int rk816_bat_calc_linek(struct battery_info *di)
+{
+	int linek, diff, delta;
+
+	di->calc_dsoc = di->dsoc;
+	di->calc_rsoc = di->rsoc;
+	di->sm_old_cap = di->remain_cap;
+
+	delta = abs(di->dsoc - di->rsoc);
+	diff = delta * 3;
+	di->sm_meet_soc = (di->dsoc >= di->rsoc) ?
+			   (di->dsoc + diff) : (di->rsoc + diff);
+
+	if (di->dsoc < di->rsoc)
+		linek = 1000 * (delta + diff) / DIV(diff);
+	else if (di->dsoc > di->rsoc)
+		linek = 1000 * diff / DIV(delta + diff);
+	else
+		linek = 1000;
+
+	di->sm_chrg_dsoc = di->dsoc * 1000;
+
+	DBG("<%s>. meet=%d, diff=%d, link=%d, calc: dsoc=%d, rsoc=%d\n",
+	    __func__, di->sm_meet_soc, diff, linek,
+	    di->calc_dsoc, di->calc_rsoc);
+
+	return linek;
+}
+
+static int rk816_bat_get_coffset(struct battery_info *di)
+{
+	int val = 0;
+
+	val |= rk816_bat_read(CAL_OFFSET_REGL) << 0;
+	val |= rk816_bat_read(CAL_OFFSET_REGH) << 8;
+
+	return val;
+}
+
+static void rk816_bat_init_poffset(struct battery_info *di)
+{
+	int coffset, ioffset;
+
+	coffset = rk816_bat_get_coffset(di);
+	ioffset = rk816_bat_get_ioffset(di);
+	di->poffset = coffset - ioffset;
+}
+
+static int rk816_fg_init(struct battery_info *di)
+{
+	rk816_bat_enable_gauge(di);
+	rk816_bat_set_vol_instant_mode(di);
+	rk816_bat_init_voltage_kb(di);
+	rk816_bat_init_poffset(di);
+	rk816_bat_clr_initialized_state(di);
+	di->dsoc = rk816_bat_get_dsoc(di);
+
+	/* it's better to init fg in kernel,
+	 * so avoid init in uboot as far as possible
+	 */
+	if (rk816_bat_get_usb_state(di) != NO_CHARGER) {
+		if (rk816_bat_get_est_voltage(di) < CONFIG_SCREEN_ON_VOL_THRESD)
+			rk816_bat_init_rsoc(di);
+#ifdef CONFIG_UBOOT_CHARGE
+		else
+			rk816_bat_init_rsoc(di);
+#endif
+	}
+
+	rk816_bat_init_chrg_config(di);
+	di->voltage_avg = rk816_bat_get_avg_voltage(di);
+	di->voltage_ocv = rk816_bat_get_ocv_voltage(di);
+	di->current_avg = rk816_bat_get_avg_current(di);
+	di->sm_linek = rk816_bat_calc_linek(di);
+	di->finish_chrg_base = get_timer(0);
+	di->pwr_vol = di->voltage_avg;
+
+	return 0;
+}
+
+static bool is_rk816_bat_exist(struct  battery_info *di)
+{
+	return (rk816_bat_read(SUP_STS_REG) & BAT_EXS) ? true : false;
+}
+
+static void rk816_bat_set_current(int input_current)
+{
+	u8 usb_ctrl;
+
+	usb_ctrl = rk816_bat_read(USB_CTRL_REG);
+	usb_ctrl &= ~INPUT_CUR_MSK;
+	usb_ctrl |= (input_current);
+	rk816_bat_write(USB_CTRL_REG, usb_ctrl);
+}
+
+static void rk816_bat_charger_setting(struct battery_info *di, int charger)
+{
+	static u8 old_charger = UNDEF_CHARGER;
+
+	/*charger changed*/
+	if (old_charger != charger) {
+		if (charger == NO_CHARGER)
+			rk816_bat_set_current(ILIM_450MA);
+		else if (charger == USB_CHARGER)
+			rk816_bat_set_current(ILIM_450MA);
+		else if (charger == DC_CHARGER || charger == AC_CHARGER)
+			rk816_bat_set_current(di->chrg_cur_input);
+		else
+			BAT_INFO("charger setting error %d\n", charger);
+
+		old_charger = charger;
+	}
+}
+
+static int rk816_bat_get_dc_state(struct battery_info *di)
+{
+	/* struct adc_channel val; */
+
+	if (di->dc_type == DC_TYPE_OF_NONE) {
+		return NO_CHARGER;
+	} else if (di->dc_type == DC_TYPE_OF_ADC) {
+		/*
+		if (adc_channels_single_shot("saradc", 0, &val)) {
+			printf("read saradc value failed\n");
+			return NO_CHARGER;
+		}
+
+		return (val.data >= DC_ADC_TRIGGER) ? DC_CHARGER : NO_CHARGER;
+		*/
+		return NO_CHARGER;
+	} else {
+		return (dm_gpio_get_value(di->dc_det)) ?
+			DC_CHARGER : NO_CHARGER;
+	}
+}
+
+static int rk816_bat_get_charger_type(struct battery_info *di)
+{
+	int charger_type = NO_CHARGER;
+
+	/* check by ic hardware: this check make check work safer */
+	if ((rk816_bat_read(VB_MON_REG) & PLUG_IN_STS) == 0)
+		return NO_CHARGER;
+
+	/* virtual or bat not exist */
+	if (di->virtual_power)
+		return DC_CHARGER;
+
+	/* check DC first */
+	charger_type = rk816_bat_get_dc_state(di);
+	if (charger_type == DC_CHARGER)
+		return charger_type;
+
+	/* check USB second */
+	return rk816_bat_get_usb_state(di);
+}
+
+static void rk816_bat_save_dsoc(struct  battery_info *di, u8 save_soc)
+{
+	static int old_soc = -1;
+
+	if (old_soc != save_soc) {
+		old_soc = save_soc;
+		rk816_bat_write(SOC_REG, save_soc);
+	}
+}
+
+static void rk816_bat_save_cap(struct battery_info *di, int cap)
+{
+	u8 buf;
+	static int old_cap;
+
+	if (old_cap == cap)
+		return;
+
+	if (cap >= di->qmax)
+		cap = di->qmax;
+
+	old_cap = cap;
+	buf = (cap >> 24) & 0xff;
+	rk816_bat_write(REMAIN_CAP_REG3, buf);
+	buf = (cap >> 16) & 0xff;
+	rk816_bat_write(REMAIN_CAP_REG2, buf);
+	buf = (cap >> 8) & 0xff;
+	rk816_bat_write(REMAIN_CAP_REG1, buf);
+	buf = (cap >> 0) & 0xff;
+	rk816_bat_write(REMAIN_CAP_REG0, buf);
+}
+
+static u8 rk816_bat_get_chrg_status(struct battery_info *di)
+{
+	u8 status;
+
+	status = rk816_bat_read(SUP_STS_REG) & BAT_STATUS_MSK;
+	switch (status) {
+	case CHARGE_OFF:
+		DBG("CHARGE-OFF...\n");
+		break;
+	case DEAD_CHARGE:
+		DBG("DEAD CHARGE...\n");
+		break;
+	case  TRICKLE_CHARGE:
+		DBG("TRICKLE CHARGE...\n ");
+		break;
+	case  CC_OR_CV:
+		DBG("CC or CV...\n");
+		break;
+	case  CHARGE_FINISH:
+		DBG("CHARGE FINISH...\n");
+		break;
+	case  USB_OVER_VOL:
+		DBG("USB OVER VOL...\n");
+		break;
+	case  BAT_TMP_ERR:
+		DBG("BAT TMP ERROR...\n");
+		break;
+	case  TIMER_ERR:
+		DBG("TIMER ERROR...\n");
+		break;
+	case  USB_EXIST:
+		DBG("USB EXIST...\n");
+		break;
+	case  USB_EFF:
+		DBG(" USB EFF...\n");
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return status;
+}
+
+static void rk816_bat_finish_chrg(struct battery_info *di)
+{
+	u32 tgt_sec = 0;
+
+	if (di->dsoc < 100) {
+		tgt_sec = di->fcc * 3600 / 100 / FINISH_CALI_CURR;
+		if (get_timer(di->finish_chrg_base) > SECONDS(tgt_sec)) {
+			di->finish_chrg_base = get_timer(0);
+			di->dsoc++;
+		}
+	}
+	DBG("<%s>. sec=%d, finish_sec=%lu\n", __func__, SECONDS(tgt_sec),
+	    get_timer(di->finish_chrg_base));
+}
+
+static void rk816_bat_debug_info(struct battery_info *di)
+{
+	u8 sup_sts, ggcon, ggsts, vb_mod, rtc, thermal, misc;
+	u8 usb_ctrl, chrg_ctrl1, chrg_ctrl2, chrg_ctrl3;
+	static const char *name[] = {"NONE", "USB", "AC", "DC", "UNDEF"};
+
+	if (!dbg_enable)
+		return;
+	ggcon = rk816_bat_read(GGCON_REG);
+	ggsts = rk816_bat_read(GGSTS_REG);
+	sup_sts = rk816_bat_read(SUP_STS_REG);
+	usb_ctrl = rk816_bat_read(USB_CTRL_REG);
+	thermal = rk816_bat_read(THERMAL_REG);
+	vb_mod = rk816_bat_read(VB_MON_REG);
+	misc = rk816_bat_read(MISC_MARK_REG);
+	rtc = rk816_bat_read(SECONDS_REG);
+	chrg_ctrl1 = rk816_bat_read(CHRG_CTRL_REG1);
+	chrg_ctrl2 = rk816_bat_read(CHRG_CTRL_REG2);
+	chrg_ctrl3 = rk816_bat_read(CHRG_CTRL_REG3);
+
+	DBG("\n---------------------- DEBUG REGS ------------------------\n"
+	    "GGCON=0x%2x, GGSTS=0x%2x, RTC=0x%2x, SUP_STS= 0x%2x\n"
+	    "VB_MOD=0x%2x, USB_CTRL=0x%2x, THERMAL=0x%2x, MISC=0x%2x\n"
+	    "CHRG_CTRL:REG1=0x%2x, REG2=0x%2x, REG3=0x%2x\n",
+	    ggcon, ggsts, rtc, sup_sts, vb_mod, usb_ctrl,
+	    thermal, misc, chrg_ctrl1, chrg_ctrl2, chrg_ctrl3
+	    );
+	DBG("----------------------------------------------------------\n"
+	    "Dsoc=%d, Rsoc=%d, Vavg=%d, Iavg=%d, Cap=%d, Fcc=%d, d=%d\n"
+	    "K=%d, old_cap=%d, charger=%s, Is=%d, Ip=%d, Vs=%d\n"
+	    "min=%d, meet: soc=%d, calc: dsoc=%d, rsoc=%d, Vocv=%d\n"
+	    "off: i=0x%x, c=0x%x, max=%d, ocv_c=%d, halt: st=%d, cnt=%d\n"
+	    "pwr: dsoc=%d, rsoc=%d, vol=%d, exist=%d\n",
+	    di->dsoc, rk816_bat_get_rsoc(di), rk816_bat_get_avg_voltage(di),
+	    rk816_bat_get_avg_current(di), di->remain_cap, di->fcc,
+	    di->rsoc - di->dsoc,
+	    di->sm_linek, di->sm_old_cap, name[di->chrg_type],
+	    CHRG_CUR_SEL[chrg_ctrl1 & 0x0f],
+	    CHRG_CUR_INPUT[usb_ctrl & 0x0f],
+	    CHRG_VOL_SEL[(chrg_ctrl1 & 0x70) >> 4],  di->pwroff_min,
+	    di->sm_meet_soc, di->calc_dsoc, di->calc_rsoc,
+	    rk816_bat_get_ocv_voltage(di), rk816_bat_get_ioffset(di),
+	    rk816_bat_get_coffset(di), di->is_max_soc_offset,
+	    di->is_ocv_calib, di->is_halt, di->halt_cnt, di->pwr_dsoc,
+	    di->pwr_rsoc, di->pwr_vol, is_rk816_bat_exist(di)
+	    );
+	rk816_bat_get_chrg_status(di);
+	DBG("###########################################################\n");
+}
+
+static void rk816_bat_linek_algorithm(struct battery_info *di)
+{
+	int delta_cap, ydsoc, tmp;
+	u8 chg_st = rk816_bat_get_chrg_status(di);
+
+	/* slow down */
+	if (di->dsoc == 99)
+		di->sm_linek = CHRG_FULL_K;
+	else if (di->dsoc >= CHRG_TERM_DSOC && di->current_avg > TERM_CALI_CURR)
+		di->sm_linek = CHRG_TERM_K;
+
+	delta_cap = di->remain_cap - di->sm_old_cap;
+	ydsoc = di->sm_linek * delta_cap * 100 / DIV(di->fcc);
+	if (ydsoc > 0) {
+		tmp = (di->sm_chrg_dsoc + 1) / 1000;
+		if (tmp != di->dsoc)
+			di->sm_chrg_dsoc = di->dsoc * 1000;
+		di->sm_chrg_dsoc += ydsoc;
+		di->dsoc = (di->sm_chrg_dsoc + 1) / 1000;
+		di->sm_old_cap = di->remain_cap;
+		if (di->dsoc == di->rsoc && di->sm_linek != CHRG_FULL_K &&
+		    di->sm_linek != CHRG_TERM_K)
+			di->sm_linek = 1000;
+	}
+
+	if ((di->sm_linek == 1000 || di->dsoc >= 100) &&
+	    (chg_st != CHARGE_FINISH)) {
+		if (di->sm_linek == 1000)
+			di->dsoc = di->rsoc;
+		di->sm_chrg_dsoc = di->dsoc * 1000;
+	}
+
+	DBG("linek=%d, sm_dsoc=%d, delta_cap=%d, ydsoc=%d, old_cap=%d\n"
+	    "calc: dsoc=%d, rsoc=%d, meet=%d\n",
+	    di->sm_linek, di->sm_chrg_dsoc, delta_cap, ydsoc, di->sm_old_cap,
+	    di->calc_dsoc, di->calc_rsoc, di->sm_meet_soc);
+}
+
+static int rk816_bat_get_iadc(struct battery_info *di)
+{
+	int val = 0;
+
+	val |= rk816_bat_read(BAT_CUR_AVG_REGL) << 0;
+	val |= rk816_bat_read(BAT_CUR_AVG_REGH) << 8;
+	if (val > 2047)
+		val -= 4096;
+
+	return val;
+}
+
+static bool rk816_bat_adc_calib(struct battery_info *di)
+{
+	int i, ioffset, coffset, adc;
+
+	if (abs(di->current_avg) < ADC_CALIB_THRESHOLD)
+		return false;
+
+	for (i = 0; i < 5; i++) {
+		adc = rk816_bat_get_iadc(di);
+		coffset = rk816_bat_get_coffset(di);
+		rk816_bat_set_coffset(di, coffset + adc);
+		mdelay(200);
+		adc = rk816_bat_get_iadc(di);
+		if (abs(adc) < ADC_CALIB_THRESHOLD) {
+			coffset = rk816_bat_get_coffset(di);
+			ioffset = rk816_bat_get_ioffset(di);
+			di->poffset = coffset - ioffset;
+			rk816_bat_write(POFFSET_REG, di->poffset);
+			BAT_INFO("new offset:c=0x%x, i=0x%x, p=0x%x\n",
+				 coffset, ioffset, di->poffset);
+			return true;
+		} else {
+			BAT_INFO("coffset calib again %d..\n", i);
+			rk816_bat_set_coffset(di, coffset);
+			mdelay(200);
+		}
+	}
+
+	return false;
+}
+
+static void rk816_bat_smooth_charge(struct battery_info *di)
+{
+	u8 chg_st = rk816_bat_get_chrg_status(di);
+
+	if (di->vol_mode_base && get_timer(di->vol_mode_base) > SECONDS(10)) {
+		rk816_bat_set_vol_avg_mode(di);
+		di->vol_mode_base = 0;
+	}
+
+	/* not charge mode and not keep in uboot charge: exit */
+	if ((di->chrg_type == NO_CHARGER) ||
+	    !rk816_bat_is_initialized(di)) {
+		DBG("chrg=%d, initialized=%d\n", di->chrg_type,
+		    rk816_bat_is_initialized(di));
+		goto out;
+	}
+
+	/* update rsoc and remain cap */
+	di->remain_cap = rk816_bat_get_coulomb_cap(di);
+	di->rsoc = rk816_bat_get_rsoc(di);
+	if (di->remain_cap > di->fcc) {
+		di->sm_old_cap -= (di->remain_cap - di->fcc);
+		rk816_bat_init_capacity(di, di->fcc);
+	}
+
+	/* finish charge step */
+	if (chg_st == CHARGE_FINISH) {
+		DBG("finish charge step...\n");
+		if (di->adc_allow_update)
+			di->adc_allow_update = !rk816_bat_adc_calib(di);
+		rk816_bat_finish_chrg(di);
+		rk816_bat_init_capacity(di, di->fcc);
+	} else {
+		DBG("smooth charge step...\n");
+		di->adc_allow_update = true;
+		di->finish_chrg_base = get_timer(0);
+		rk816_bat_linek_algorithm(di);
+	}
+
+	/* dsoc limit */
+	if (di->dsoc > 100)
+		di->dsoc = 100;
+	else if (di->dsoc < 0)
+		di->dsoc = 0;
+
+	rk816_bat_save_dsoc(di, di->dsoc);
+	rk816_bat_save_cap(di, di->remain_cap);
+out:
+	rk816_bat_debug_info(di);
+}
+
+static int rk816_bat_update_get_soc(struct udevice *dev)
+{
+	struct battery_info *di = dev_get_priv(dev);
+	static ulong seconds;
+
+	/* set charge current */
+	di->chrg_type =
+		rk816_bat_get_charger_type(di);
+	rk816_bat_charger_setting(di, di->chrg_type);
+
+	/* fg calc every 5 seconds */
+	if (!seconds)
+		seconds = get_timer(0);
+	if (get_timer(seconds) >= SECONDS(5)) {
+		seconds = get_timer(0);
+		rk816_bat_smooth_charge(di);
+	}
+
+	/* bat exist, fg init success(dts pass) and uboot charge: report data */
+	if (!di->virtual_power && di->voltage_k)
+		return di->dsoc;
+	else
+		return VIRTUAL_POWER_SOC;
+}
+
+static int rk816_bat_update_get_voltage(struct udevice *dev)
+{
+	struct battery_info *di = dev_get_priv(dev);
+
+	if (!di->virtual_power && di->voltage_k)
+		return rk816_bat_get_est_voltage(di);
+	else
+		return VIRTUAL_POWER_VOL;
+}
+
+static bool rk816_bat_update_get_chrg_online(struct udevice *dev)
+{
+	return rk816_bat_dwc_otg_check_dpdm();
+}
+
+static struct dm_fuel_gauge_ops fg_ops = {
+	.get_soc = rk816_bat_update_get_soc,
+	.get_voltage = rk816_bat_update_get_voltage,
+	.get_chrg_online = rk816_bat_update_get_chrg_online,
+};
+
+static int rk816_bat_parse_dt(struct battery_info *di, void const *blob)
+{
+	int node, parent, len, err;
+	const char *prop;
+
+	parent = fdt_node_offset_by_compatible(blob, 0, "rockchip,rk816");
+	if (parent < 0) {
+		printf("can't find rockchip,rk816 node\n");
+		return -ENODEV;
+	}
+
+	if (!fdtdec_get_is_enabled(blob, parent)) {
+		DBG("rk816 node disabled\n");
+		return -ENODEV;
+	}
+
+	node = fdt_subnode_offset_namelen(blob, parent, "battery", 7);
+	if (node < 0) {
+		debug("can't find battery node\n");
+		di->chrg_cur_input = ILIM_2000MA;
+		return -EINVAL;
+	}
+
+	prop = fdt_getprop(blob, node, "ocv_table", &len);
+	if (!prop) {
+		printf("can't find ocv_table prop\n");
+		return -EINVAL;
+	}
+
+	di->ocv_table = calloc(len, 1);
+	if (!di->ocv_table) {
+		printf("can't calloc ocv_table\n");
+		return -ENOMEM;
+	}
+
+	di->ocv_size = len / 4;
+	err = fdtdec_get_int_array(blob, node, "ocv_table",
+				   di->ocv_table, di->ocv_size);
+	if (err < 0) {
+		printf("read ocv_table error\n");
+		free(di->ocv_table);
+		return -EINVAL;
+	}
+
+	di->design_cap = fdtdec_get_int(blob, node, "design_capacity", -1);
+	if (di->design_cap < 0) {
+		printf("read design_capacity error\n");
+		return -EINVAL;
+	}
+
+	di->qmax = fdtdec_get_int(blob, node, "design_qmax", -1);
+	if (di->qmax < 0) {
+		printf("read design_qmax error\n");
+		return -EINVAL;
+	}
+
+	di->dts_vol_sel = fdtdec_get_int(blob, node, "max_chrg_voltage", 4200);
+	di->dts_cur_input = fdtdec_get_int(blob, node,
+					   "max_input_current", 2000);
+	di->dts_cur_sel = fdtdec_get_int(blob, node, "max_chrg_current", 1200);
+	di->max_soc_offset = fdtdec_get_int(blob, node, "max_soc_offset", 70);
+	di->virtual_power = fdtdec_get_int(blob, node, "virtual_power", 0);
+	di->bat_res = fdtdec_get_int(blob, node, "bat_res", 135);
+	di->dc_det_adc = fdtdec_get_int(blob, node, "dc_det_adc", 0);
+	if (di->dc_det_adc <= 0) {
+		if (!gpio_request_by_name_nodev(offset_to_ofnode(node),
+						"dc_det_gpio",
+						0, di->dc_det, GPIOD_IS_IN)) {
+			di->dc_type = DC_TYPE_OF_GPIO;
+		} else {
+			di->dc_type = DC_TYPE_OF_NONE;
+		}
+	} else {
+		di->dc_type = DC_TYPE_OF_ADC;
+	}
+
+	if (!is_rk816_bat_exist(di))
+		di->virtual_power = 1;
+
+	DBG("-------------------------------:\n");
+	DBG("max_input_current:%d\n", di->dts_cur_input);
+	DBG("max_chrg_current:%d\n", di->dts_cur_sel);
+	DBG("max_chrg_voltage:%d\n", di->dts_vol_sel);
+	DBG("design_capacity :%d\n", di->design_cap);
+	DBG("design_qmax:%d\n", di->qmax);
+	DBG("max_soc_offset:%d\n", di->max_soc_offset);
+	DBG("dc_det_adc:%d\n", di->dc_det_adc);
+
+	return 0;
+}
+
+static int rk816_fg_probe(struct udevice *dev)
+{
+	struct rk8xx_priv *priv = dev_get_priv(dev->parent);
+	struct battery_info *di = dev_get_priv(dev);
+	int ret;
+
+	if (priv->variant != 0x8160) {
+		debug("Not support pmic variant: rk%x\n", priv->variant);
+		return -EINVAL;
+	}
+
+	g_pmic_dev = dev->parent;
+	ret = rk816_bat_parse_dt(di, gd->fdt_blob);
+	if (ret)
+		return ret;
+
+	return rk816_fg_init(di);
+}
+
+U_BOOT_DRIVER(rk816_fg) = {
+	.name = "rk816_fg",
+	.id = UCLASS_FG,
+	.probe = rk816_fg_probe,
+	.ops = &fg_ops,
+	.priv_auto_alloc_size = sizeof(struct battery_info),
+};
+

commit a00c88f53292ac0cd3d3df288004b663371d7645
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Sep 14 20:27:52 2017 +0800

    power: fuel gauge: add rk818 support
    
    Change-Id: I73dced9e62dd247a886868a320d3488f02755265
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/Kconfig b/drivers/power/fuel_gauge/Kconfig
index 8b08a90f99..78b5963536 100644
--- a/drivers/power/fuel_gauge/Kconfig
+++ b/drivers/power/fuel_gauge/Kconfig
@@ -4,3 +4,8 @@ config DM_FUEL_GAUGE
 	help
 	  This adds a simple uclass for fuel gauge.
 
+config POWER_FG_RK818
+	bool "RK818 Fuel gauge support"
+	depends on DM_FUEL_GAUGE && PMIC_RK8XX
+	help
+	  This adds support for RK818 fuel gauge support.
diff --git a/drivers/power/fuel_gauge/Makefile b/drivers/power/fuel_gauge/Makefile
index 75d762e01f..0b84981222 100644
--- a/drivers/power/fuel_gauge/Makefile
+++ b/drivers/power/fuel_gauge/Makefile
@@ -8,3 +8,4 @@
 obj-$(CONFIG_DM_FUEL_GAUGE) += fuel_gauge_uclass.o
 
 obj-$(CONFIG_POWER_FG_MAX17042) += fg_max17042.o
+obj-$(CONFIG_POWER_FG_RK818) += fg_rk818.o
diff --git a/drivers/power/fuel_gauge/fg_regs.h b/drivers/power/fuel_gauge/fg_regs.h
new file mode 100644
index 0000000000..cbbceb7060
--- /dev/null
+++ b/drivers/power/fuel_gauge/fg_regs.h
@@ -0,0 +1,95 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _FG_RK8XX_H_
+#define _FG_RK8XX_H_
+
+/* register definition */
+#define SECONDS_REG		0X00
+#define VB_MON_REG		0x21
+#define THERMAL_REG		0x22
+#define SUP_STS_REG		0xA0
+#define USB_CTRL_REG		0xA1
+#define CHRG_CTRL_REG1		0xA3
+#define CHRG_CTRL_REG2		0xA4
+#define CHRG_CTRL_REG3		0xA5
+#define BAT_CTRL_REG		0xA6
+#define BAT_HTS_TS_REG		0xA8
+#define BAT_LTS_TS_REG		0xA9
+#define TS_CTRL_REG		0xAC
+#define ADC_CTRL_REG		0xAD
+#define GGCON_REG		0xB0
+#define GGSTS_REG		0xB1
+#define ZERO_CUR_ADC_REGH	0xB2
+#define ZERO_CUR_ADC_REGL	0xB3
+#define GASCNT_CAL_REG3		0xB4
+#define GASCNT_CAL_REG2		0xB5
+#define GASCNT_CAL_REG1		0xB6
+#define GASCNT_CAL_REG0		0xB7
+#define GASCNT_REG3		0xB8
+#define GASCNT_REG2		0xB9
+#define GASCNT_REG1		0xBA
+#define GASCNT_REG0		0xBB
+#define BAT_CUR_AVG_REGH	0xBC
+#define BAT_CUR_AVG_REGL	0xBD
+#define TS_ADC_REGH		0xBE
+#define TS_ADC_REGL		0xBF
+#define RK818_TS2_ADC_REGH	0xC0
+#define RK818_TS2_ADC_REGL	0xC1
+#define RK816_USB_ADC_REGH	0xC0
+#define RK816_USB_ADC_REGL	0xC1
+#define BAT_OCV_REGH		0xC2
+#define BAT_OCV_REGL		0xC3
+#define BAT_VOL_REGH		0xC4
+#define BAT_VOL_REGL		0xC5
+#define RELAX_ENTRY_THRES_REGH	0xC6
+#define RELAX_ENTRY_THRES_REGL	0xC7
+#define RELAX_EXIT_THRES_REGH	0xC8
+#define RELAX_EXIT_THRES_REGL	0xC9
+#define RELAX_VOL1_REGH		0xCA
+#define RELAX_VOL1_REGL		0xCB
+#define RELAX_VOL2_REGH		0xCC
+#define RELAX_VOL2_REGL		0xCD
+#define RELAX_CUR1_REGH		0xCE
+#define RELAX_CUR1_REGL		0xCF
+#define RELAX_CUR2_REGH		0xD0
+#define RELAX_CUR2_REGL		0xD1
+#define CAL_OFFSET_REGH		0xD2
+#define CAL_OFFSET_REGL		0xD3
+#define NON_ACT_TIMER_CNT_REG	0xD4
+#define VCALIB0_REGH		0xD5
+#define VCALIB0_REGL		0xD6
+#define VCALIB1_REGH		0xD7
+#define VCALIB1_REGL		0xD8
+#define FCC_GASCNT_REG3		0xD9
+#define FCC_GASCNT_REG2		0xDA
+#define FCC_GASCNT_REG1		0xDB
+#define FCC_GASCNT_REG0		0xDC
+#define IOFFSET_REGH		0xDD
+#define IOFFSET_REGL		0xDE
+#define SLEEP_CON_SAMP_CUR_REG	0xDF
+#define SOC_REG			0xE0
+#define	REMAIN_CAP_REG3		0xE1
+#define	REMAIN_CAP_REG2		0xE2
+#define	REMAIN_CAP_REG1		0xE3
+#define	REMAIN_CAP_REG0		0xE4
+#define	UPDAT_LEVE_REG		0xE5
+#define	NEW_FCC_REG3		0xE6
+#define	NEW_FCC_REG2		0xE7
+#define	NEW_FCC_REG1		0xE8
+#define	NEW_FCC_REG0		0xE9
+#define NON_ACT_TIMER_CNT_SAVE_REG 0xEA
+#define OCV_VOL_VALID_REG	0xEB
+#define REBOOT_CNT_REG		0xEC
+#define POFFSET_REG		0xED
+#define MISC_MARK_REG		0xEE
+#define HALT_CNT_REG          	0xEF
+#define DATA15_REG		0xEF
+#define DATA16_REG		0xF0
+#define DATA17_REG		0xF1
+#define DATA18_REG		0xF2
+
+#endif
diff --git a/drivers/power/fuel_gauge/fg_rk818.c b/drivers/power/fuel_gauge/fg_rk818.c
new file mode 100644
index 0000000000..b05a2100da
--- /dev/null
+++ b/drivers/power/fuel_gauge/fg_rk818.c
@@ -0,0 +1,1514 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <dm.h>
+#include <errno.h>
+#include <common.h>
+#include <malloc.h>
+#include <fdtdec.h>
+#include <asm/gpio.h>
+#include <common.h>
+#include <power/pmic.h>
+#include <power/fuel_gauge.h>
+#include <power/rk8xx_pmic.h>
+#include <linux/usb/phy-rockchip-inno-usb2.h>
+#include "fg_regs.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static int dbg_enable = 0;
+#define DBG(args...) \
+	do { \
+		if (dbg_enable) { \
+			printf(args); \
+		} \
+	} while (0)
+
+#define BAT_INFO(fmt, args...) printf("rk818-bat: "fmt, ##args)
+
+#define DRIVER_VERSION		"2.0"
+
+/* THERMAL_REG */
+#define TEMP_105C		(0x02 << 2)
+#define TEMP_115C		(0x03 << 2)
+#define FB_TEMP_MSK		0x0c
+
+/* CHRG_CTRL_REG2 */
+#define FINISH_100MA		(0x00 << 6)
+#define FINISH_150MA		(0x01 << 6)
+#define FINISH_200MA		(0x02 << 6)
+#define FINISH_250MA		(0x03 << 6)
+#define FINISH_CUR_MSK		0xc7
+
+/* CHRG_CTRL_REG3 */
+#define CHRG_TERM_DIG_SIGNAL	(1 << 5)
+#define CHRG_TERM_ANA_SIGNAL	(0 << 5)
+#define CHRG_TIMER_CCCV_EN	(1 << 2)
+#define CHRG_TERM_SIG_MSK	(1 << 5)
+
+/* CHRG_CTRL_REG */
+#define ILIM_450MA		(0x00)
+#define ILIM_80MA		(0x01)
+#define ILIM_850MA		(0x02)
+#define ILIM_2000MA		(0x07)
+#define CHRG_CT_EN		(1 << 7)
+
+/* USB_CTRL_REG */
+#define INPUT_CUR_MSK		0x0f
+
+/* VB_MON_REG */
+#define PLUG_IN_STS		(1 << 6)
+
+/* GGSTS */
+#define BAT_CON			(1 << 4)
+#define VOL_INSTANT		(1 << 0)
+#define VOL_AVG			(0 << 0)
+
+/* TS_CTRL_REG */
+#define GG_EN			(1 << 7)
+
+/* CHRG_USB_CTRL */
+#define CHRG_EN			(1 << 7)
+
+#define ADC_TS2_EN		(1 << 4)
+#define TS2_ADC_MODE		(1 << 5)
+
+/* SUP_STS_REG */
+#define BAT_EXS			(1 << 7)
+#define USB_EXIST		(1 << 1)
+#define USB_EFF			(1 << 0)
+#define CHARGE_OFF		(0x00 << 4)
+#define DEAD_CHARGE		(0x01 << 4)
+#define TRICKLE_CHARGE		(0x02 << 4)
+#define CC_OR_CV		(0x03 << 4)
+#define CHARGE_FINISH		(0x04 << 4)
+#define USB_OVER_VOL		(0x05 << 4)
+#define BAT_TMP_ERR		(0x06 << 4)
+#define TIMER_ERR		(0x07 << 4)
+#define USB_VLIMIT_EN		(1 << 3)
+#define USB_CLIMIT_EN		(1 << 2)
+#define BAT_STATUS_MSK		0x70
+
+/* GGCON */
+#define ADC_CUR_MODE		(1 << 1)
+
+/* CALI PARAM */
+#define FINISH_CALI_CURR	1500
+#define TERM_CALI_CURR		600
+#define	VIRTUAL_POWER_VOL	4200
+#define	VIRTUAL_POWER_SOC	66
+#define SECONDS(n)		((n) * 1000)
+
+/* CALC PARAM */
+#define MAX_PERCENTAGE		100
+#define MAX_INTERPOLATE		1000
+#define MAX_INT			0x7fff
+#define MIN_FCC			500
+
+/* sample resistor and division */
+#define SAMPLE_RES_10mR		10
+#define SAMPLE_RES_20mR		20
+#define SAMPLE_RES_DIV1		1
+#define SAMPLE_RES_DIV2		2
+
+#define FG_INIT			(1 << 5)
+#define FG_RESET_LATE		(1 << 4)
+#define FG_RESET_NOW		(1 << 3)
+
+#define DEFAULT_POFFSET		42
+#define DEFAULT_COFFSET		0x832
+#define INVALID_COFFSET_MIN	0x780
+#define INVALID_COFFSET_MAX	0x980
+
+#define CHRG_TERM_DSOC		90
+#define CHRG_TERM_K		650
+#define CHRG_FULL_K		400
+#define ADC_CALIB_THRESHOLD	4
+
+#define TS2_THRESHOLD_VOL	4350
+#define TS2_VALID_VOL		1000
+#define TS2_VOL_MULTI		0
+#define TS2_CHECK_CNT		5
+
+#define DIV(x)			((x) ? (x) : 1)
+
+/* charger type definition */
+enum charger_type {
+	NO_CHARGER = 0,
+	USB_CHARGER,
+	AC_CHARGER,
+	DC_CHARGER,
+	UNDEF_CHARGER,
+};
+
+struct battery_info {
+	int		chrg_type;
+	int		poffset;
+	int		bat_res;
+	int		current_avg;
+	int		voltage_avg;
+	int		voltage_ocv;
+	int		voltage_k;
+	int		voltage_b;
+	int		dsoc;
+	int		rsoc;
+	int		fcc;
+	int		qmax;
+	int		remain_cap;
+	int		design_cap;
+	int		nac;
+	u32		*ocv_table;
+	u32		ocv_size;
+	int		virtual_power;
+	int		ts2_vol_multi;
+	int		pwroff_min;
+	int		sm_old_cap;
+	int		sm_linek;
+	int		sm_chrg_dsoc;
+	int		adc_allow_update;
+	int		chrg_vol_sel;
+	int		chrg_cur_input;
+	int		chrg_cur_sel;
+	int		dts_vol_sel;
+	int		dts_cur_input;
+	int		dts_cur_sel;
+	int		max_soc_offset;
+	int		sample_res;
+	int		res_div;
+	struct gpio_desc *dc_det;
+	int		dc_det_adc;
+	ulong		finish_chrg_base;
+	ulong		term_sig_base;
+	u8		calc_dsoc;
+	u8		calc_rsoc;
+	int		sm_meet_soc;
+	u8		halt_cnt;
+	u8		dc_active_level;
+	bool		dc_is_valid;
+	bool		is_halt;
+	bool		is_ocv_calib;
+	bool		is_max_soc_offset;
+	bool		is_first_power_on;
+	bool		is_sw_reset;
+	int		pwr_dsoc;
+	int		pwr_rsoc;
+	int		pwr_vol;
+};
+
+static struct udevice *g_pmic_dev;
+
+/* TODO */
+#define CONFIG_SCREEN_ON_VOL_THRESD	3400
+
+static const u32 CHRG_VOL_SEL[] = {
+	4050, 4100, 4150, 4200, 4250, 4300, 4350
+};
+
+static const u32 CHRG_CUR_SEL[] = {
+	1000, 1200, 1400, 1600, 1800, 2000, 2250, 2400, 2600, 2800, 3000
+};
+
+static const u32 CHRG_CUR_INPUT[] = {
+	450, 800, 850, 1000, 1250, 1500, 1750, 2000, 2250, 2500, 2750, 3000
+};
+
+static int rk818_bat_read(u8 reg)
+{
+	return pmic_reg_read(g_pmic_dev, reg);
+}
+
+static void rk818_bat_write(u8 reg, u8 buf)
+{
+	pmic_reg_write(g_pmic_dev, reg, buf);
+}
+
+static int rk818_bat_dwc_otg_check_dpdm(void)
+{
+	return rockchip_chg_get_type();
+}
+
+static int rk818_bat_get_rsoc(struct battery_info *di)
+{
+	return (di->remain_cap + di->fcc / 200) * 100 / DIV(di->fcc);
+}
+
+static int rk818_bat_get_dsoc(struct  battery_info *di)
+{
+	return rk818_bat_read(SOC_REG);
+}
+
+static void rk818_bat_enable_gauge(struct battery_info *di)
+{
+	u8 val;
+
+	val = rk818_bat_read(TS_CTRL_REG);
+	val |= GG_EN;
+	rk818_bat_write(TS_CTRL_REG, val);
+}
+
+static int rk818_bat_get_vcalib0(struct battery_info *di)
+{
+	int val = 0;
+
+	val |= rk818_bat_read(VCALIB0_REGL) << 0;
+	val |= rk818_bat_read(VCALIB0_REGH) << 8;
+
+	return val;
+}
+
+static int rk818_bat_get_vcalib1(struct battery_info *di)
+{
+	int val = 0;
+
+	val |= rk818_bat_read(VCALIB1_REGL) << 0;
+	val |= rk818_bat_read(VCALIB1_REGH) << 8;
+
+	return val;
+}
+
+static int rk818_bat_get_coffset(struct battery_info *di)
+{
+	int val = 0;
+
+	val |= rk818_bat_read(CAL_OFFSET_REGL) << 0;
+	val |= rk818_bat_read(CAL_OFFSET_REGH) << 8;
+
+	DBG("<%s>. coffset: 0x%x\n", __func__, val);
+	return val;
+}
+
+static void rk818_bat_set_coffset(struct battery_info *di, int val)
+{
+	u8 buf;
+
+	buf = (val >> 0) & 0xff;
+	rk818_bat_write(CAL_OFFSET_REGL, buf);
+	buf = (val >> 8) & 0xff;
+	rk818_bat_write(CAL_OFFSET_REGH, buf);
+
+	DBG("<%s>. set coffset: 0x%x\n", __func__, val);
+}
+
+static int rk818_bat_get_ioffset(struct battery_info *di)
+{
+	int val = 0;
+
+	val |= rk818_bat_read(IOFFSET_REGL) << 0;
+	val |= rk818_bat_read(IOFFSET_REGH) << 8;
+
+	DBG("<%s>. ioffset: 0x%x\n", __func__, val);
+	return val;
+}
+
+static void rk818_bat_init_coffset(struct battery_info *di)
+{
+	int ioffset, coffset;
+
+	ioffset = rk818_bat_get_ioffset(di);
+
+	di->poffset = rk818_bat_read(POFFSET_REG);
+	if (!di->poffset)
+		di->poffset = DEFAULT_POFFSET;
+
+	coffset = di->poffset + ioffset;
+	if (coffset < INVALID_COFFSET_MIN || coffset > INVALID_COFFSET_MAX)
+		coffset = DEFAULT_COFFSET;
+
+	rk818_bat_set_coffset(di, coffset);
+}
+
+static void rk818_bat_init_voltage_kb(struct battery_info *di)
+{
+	int vcalib0, vcalib1;
+
+	vcalib0 = rk818_bat_get_vcalib0(di);
+	vcalib1 = rk818_bat_get_vcalib1(di);
+	di->voltage_k = (4200 - 3000) * 1000 / DIV(vcalib1 - vcalib0);
+	di->voltage_b = 4200 - (di->voltage_k * vcalib1) / 1000;
+	DBG("%s. vk=%d, vb=%d\n", __func__, di->voltage_k, di->voltage_b);
+}
+
+static int rk818_bat_get_ocv_voltage(struct battery_info *di)
+{
+	int vol, val = 0;
+
+	val |= rk818_bat_read(BAT_OCV_REGL) << 0;
+	val |= rk818_bat_read(BAT_OCV_REGH) << 8;
+	vol = di->voltage_k * val / 1000 + di->voltage_b;
+
+	return vol;
+}
+
+static int rk818_bat_get_avg_current(struct battery_info *di)
+{
+	int val = 0;
+
+	val |= rk818_bat_read(BAT_CUR_AVG_REGL) << 0;
+	val |= rk818_bat_read(BAT_CUR_AVG_REGH) << 8;
+
+	if (val & 0x800)
+		val -= 4096;
+	val = val * di->res_div * 1506 / 1000;
+
+	return val;
+}
+
+static int rk818_bat_get_avg_voltage(struct battery_info *di)
+{
+	int vol, val = 0;
+
+	val |= rk818_bat_read(BAT_VOL_REGL) << 0;
+	val |= rk818_bat_read(BAT_VOL_REGH) << 8;
+	vol = di->voltage_k * val / 1000 + di->voltage_b;
+
+	return vol;
+}
+
+static int rk818_bat_get_est_voltage(struct battery_info *di)
+{
+	int est_vol, vol, curr;
+
+	vol = rk818_bat_get_avg_voltage(di);
+	curr = rk818_bat_get_avg_current(di);
+	est_vol = vol - (di->bat_res * curr / 1000);
+
+	return (est_vol > 2800) ? est_vol : vol;
+}
+
+static u8 rk818_bat_finish_ma(struct battery_info *di, int fcc)
+{
+	u8 ma;
+
+	if (di->res_div == 2)
+		ma = FINISH_100MA;
+	else if (fcc > 5000)
+		ma = FINISH_250MA;
+	else if (fcc >= 4000)
+		ma = FINISH_200MA;
+	else if (fcc >= 3000)
+		ma = FINISH_150MA;
+	else
+		ma = FINISH_100MA;
+
+	return ma;
+}
+
+static void rk818_bat_select_chrg_cv(struct battery_info *di)
+{
+	int index, chrg_vol_sel, chrg_cur_sel, chrg_cur_input;
+
+	chrg_vol_sel = di->dts_vol_sel;
+	chrg_cur_sel = di->dts_cur_sel;
+	chrg_cur_input = di->dts_cur_input;
+	if (di->sample_res == SAMPLE_RES_10mR) {
+		if (chrg_cur_sel > 2000)
+			chrg_cur_sel /= di->res_div;
+		else
+			chrg_cur_sel = 1000;
+	}
+
+	for (index = 0; index < ARRAY_SIZE(CHRG_VOL_SEL); index++) {
+		if (chrg_vol_sel < CHRG_VOL_SEL[index])
+			break;
+		di->chrg_vol_sel = (index << 4);
+	}
+
+	for (index = 0; index < ARRAY_SIZE(CHRG_CUR_INPUT); index++) {
+		if (chrg_cur_input < CHRG_CUR_INPUT[index])
+			break;
+		di->chrg_cur_input = (index << 0);
+	}
+
+	for (index = 0; index < ARRAY_SIZE(CHRG_CUR_SEL); index++) {
+		if (chrg_cur_sel < CHRG_CUR_SEL[index])
+			break;
+		di->chrg_cur_sel = (index << 0);
+	}
+
+	DBG("<%s>. vol=0x%x, input=0x%x, sel=0x%x\n",
+	    __func__, di->chrg_vol_sel, di->chrg_cur_input, di->chrg_cur_sel);
+}
+
+static void rk818_bat_init_chrg_config(struct battery_info *di)
+{
+	u8 chrg_ctrl1, usb_ctrl, chrg_ctrl2, chrg_ctrl3;
+	u8 sup_sts, ggcon, thermal, finish_ma;
+
+	rk818_bat_select_chrg_cv(di);
+	finish_ma = rk818_bat_finish_ma(di, di->fcc);
+
+	ggcon = rk818_bat_read(GGCON_REG);
+	sup_sts = rk818_bat_read(SUP_STS_REG);
+	usb_ctrl = rk818_bat_read(USB_CTRL_REG);
+	thermal = rk818_bat_read(THERMAL_REG);
+	chrg_ctrl2 = rk818_bat_read(CHRG_CTRL_REG2);
+	chrg_ctrl3 = rk818_bat_read(CHRG_CTRL_REG3);
+
+	/* set charge current and voltage */
+	usb_ctrl &= ~INPUT_CUR_MSK;
+	usb_ctrl |= di->chrg_cur_input;
+	chrg_ctrl1 = (CHRG_EN | di->chrg_vol_sel | di->chrg_cur_sel);
+
+	/* digital signal and finish current*/
+	chrg_ctrl3 &= ~CHRG_TERM_SIG_MSK;
+	chrg_ctrl3 |= CHRG_TERM_ANA_SIGNAL;
+	chrg_ctrl2 &= ~FINISH_CUR_MSK;
+	chrg_ctrl2 |= finish_ma;
+
+	/* cccv mode */
+	chrg_ctrl3 &= ~CHRG_TIMER_CCCV_EN;
+
+	/* enable voltage limit and enable input current limit */
+	sup_sts &= ~USB_VLIMIT_EN;
+	sup_sts |= USB_CLIMIT_EN;
+
+	/* set feedback temperature */
+	usb_ctrl |= CHRG_CT_EN;
+	thermal &= ~FB_TEMP_MSK;
+	thermal |= TEMP_105C;
+
+	/* adc current mode */
+	ggcon |= ADC_CUR_MODE;
+
+	rk818_bat_write(GGCON_REG, ggcon);
+	rk818_bat_write(SUP_STS_REG, sup_sts);
+	rk818_bat_write(USB_CTRL_REG, usb_ctrl);
+	rk818_bat_write(THERMAL_REG, thermal);
+	rk818_bat_write(CHRG_CTRL_REG1, chrg_ctrl1);
+	rk818_bat_write(CHRG_CTRL_REG2, chrg_ctrl2);
+	rk818_bat_write(CHRG_CTRL_REG3, chrg_ctrl3);
+}
+
+static u32 interpolate(int value, u32 *table, int size)
+{
+	uint8_t i;
+	uint16_t d;
+
+	for (i = 0; i < size; i++) {
+		if (value < table[i])
+			break;
+	}
+
+	if ((i > 0) && (i < size)) {
+		d = (value - table[i - 1]) * (MAX_INTERPOLATE / (size - 1));
+		d /= table[i] - table[i - 1];
+		d = d + (i - 1) * (MAX_INTERPOLATE / (size - 1));
+	} else {
+		d = i * ((MAX_INTERPOLATE + size / 2) / size);
+	}
+
+	if (d > 1000)
+		d = 1000;
+
+	return d;
+}
+
+/* returns (a * b) / c */
+static int32_t ab_div_c(u32 a, u32 b, u32 c)
+{
+	bool sign;
+	u32 ans = MAX_INT;
+	int32_t tmp;
+
+	sign = ((((a ^ b) ^ c) & 0x80000000) != 0);
+
+	if (c != 0) {
+		if (sign)
+			c = -c;
+		tmp = ((int32_t)a * b + (c >> 1)) / c;
+		if (tmp < MAX_INT)
+			ans = tmp;
+	}
+
+	if (sign)
+		ans = -ans;
+
+	return ans;
+}
+
+static int rk818_bat_vol_to_cap(struct battery_info *di, int voltage)
+{
+	u32 *ocv_table, tmp;
+	int ocv_size, ocv_cap;
+
+	ocv_table = di->ocv_table;
+	ocv_size = di->ocv_size;
+	tmp = interpolate(voltage, ocv_table, ocv_size);
+	ocv_cap = ab_div_c(tmp, di->fcc, MAX_INTERPOLATE);
+
+	return ocv_cap;
+}
+
+static int rk818_bat_vol_to_soc(struct battery_info *di, int voltage)
+{
+	u32 *ocv_table, tmp;
+	int ocv_size, ocv_soc;
+
+	ocv_table = di->ocv_table;
+	ocv_size = di->ocv_size;
+	tmp = interpolate(voltage, ocv_table, ocv_size);
+	ocv_soc = ab_div_c(tmp, MAX_PERCENTAGE, MAX_INTERPOLATE);
+
+	return ocv_soc;
+}
+
+static int rk818_bat_get_prev_cap(struct battery_info *di)
+{
+	int val = 0;
+
+	val |= rk818_bat_read(REMAIN_CAP_REG3) << 24;
+	val |= rk818_bat_read(REMAIN_CAP_REG2) << 16;
+	val |= rk818_bat_read(REMAIN_CAP_REG1) << 8;
+	val |= rk818_bat_read(REMAIN_CAP_REG0) << 0;
+
+	return val;
+}
+
+static void rk818_bat_save_fcc(struct battery_info *di, u32 cap)
+{
+	u8 buf;
+
+	buf = (cap >> 24) & 0xff;
+	rk818_bat_write(NEW_FCC_REG3, buf);
+	buf = (cap >> 16) & 0xff;
+	rk818_bat_write(NEW_FCC_REG2, buf);
+	buf = (cap >> 8) & 0xff;
+	rk818_bat_write(NEW_FCC_REG1, buf);
+	buf = (cap >> 0) & 0xff;
+	rk818_bat_write(NEW_FCC_REG0, buf);
+}
+
+static int rk818_bat_get_fcc(struct battery_info *di)
+{
+	int val = 0;
+
+	val |= rk818_bat_read(NEW_FCC_REG3) << 24;
+	val |= rk818_bat_read(NEW_FCC_REG2) << 16;
+	val |= rk818_bat_read(NEW_FCC_REG1) << 8;
+	val |= rk818_bat_read(NEW_FCC_REG0) << 0;
+
+	if (val < MIN_FCC)
+		val = di->design_cap;
+	else if (val > di->qmax)
+		val = di->qmax;
+
+	return val;
+}
+
+static int rk818_bat_get_pwroff_min(struct battery_info *di)
+{
+	u8 cur, last;
+
+	cur = rk818_bat_read(NON_ACT_TIMER_CNT_REG);
+	last = rk818_bat_read(NON_ACT_TIMER_CNT_SAVE_REG);
+	rk818_bat_write(NON_ACT_TIMER_CNT_SAVE_REG, cur);
+
+	return (cur != last) ? cur : 0;
+}
+
+static int rk818_bat_get_coulomb_cap(struct battery_info *di)
+{
+	int val = 0;
+
+	val |= rk818_bat_read(GASCNT_REG3) << 24;
+	val |= rk818_bat_read(GASCNT_REG2) << 16;
+	val |= rk818_bat_read(GASCNT_REG1) << 8;
+	val |= rk818_bat_read(GASCNT_REG0) << 0;
+	val /= 2390;
+
+	return val * di->res_div;
+}
+
+static void rk818_bat_init_capacity(struct battery_info *di, u32 capacity)
+{
+	u8 buf;
+	u32 cap;
+	int delta;
+
+	delta = capacity - di->remain_cap;
+	if (!delta)
+		return;
+
+	cap = capacity * 2390 / di->res_div;
+	buf = (cap >> 24) & 0xff;
+	rk818_bat_write(GASCNT_CAL_REG3, buf);
+	buf = (cap >> 16) & 0xff;
+	rk818_bat_write(GASCNT_CAL_REG2, buf);
+	buf = (cap >> 8) & 0xff;
+	rk818_bat_write(GASCNT_CAL_REG1, buf);
+	buf = (cap >> 0) & 0xff;
+	rk818_bat_write(GASCNT_CAL_REG0, buf);
+
+	di->remain_cap = rk818_bat_get_coulomb_cap(di);
+	di->rsoc = rk818_bat_get_rsoc(di);
+}
+
+static bool is_rk818_bat_ocv_valid(struct battery_info *di)
+{
+	return di->pwroff_min >= 30 ? true : false;
+}
+
+static int rk818_bat_get_usb_state(struct battery_info *di)
+{
+	int charger_type;
+
+	switch (rk818_bat_dwc_otg_check_dpdm()) {
+	case 0:
+		if ((rk818_bat_read(VB_MON_REG) & PLUG_IN_STS) != 0)
+			charger_type = DC_CHARGER;
+		else
+			charger_type = NO_CHARGER;
+		break;
+	case 1:
+	case 3:
+		charger_type = USB_CHARGER;
+		break;
+	case 2:
+		charger_type = AC_CHARGER;
+		break;
+	default:
+		charger_type = NO_CHARGER;
+	}
+
+	return charger_type;
+}
+
+static void rk818_bat_clr_initialized_state(struct battery_info *di)
+{
+	u8 val;
+
+	val = rk818_bat_read(MISC_MARK_REG);
+	val &= ~FG_INIT;
+	rk818_bat_write(MISC_MARK_REG, val);
+}
+
+static bool rk818_bat_is_initialized(struct battery_info *di)
+{
+	return (rk818_bat_read(MISC_MARK_REG) & FG_INIT) ? true : false;
+}
+
+static void rk818_bat_set_initialized_state(struct battery_info *di)
+{
+	u8 val;
+
+	val = rk818_bat_read(MISC_MARK_REG);
+	if (rk818_bat_get_usb_state(di) != NO_CHARGER) {
+		val |= FG_INIT;
+		rk818_bat_write(MISC_MARK_REG, val);
+		BAT_INFO("fuel gauge initialized... estv=%d, ch=%d\n",
+			 rk818_bat_get_est_voltage(di),
+			 rk818_bat_get_usb_state(di));
+	}
+}
+
+static void rk818_bat_first_pwron(struct battery_info *di)
+{
+	int ocv_vol;
+
+	rk818_bat_save_fcc(di, di->design_cap);
+	ocv_vol = rk818_bat_get_ocv_voltage(di);
+	di->fcc = rk818_bat_get_fcc(di);
+	di->nac = rk818_bat_vol_to_cap(di, ocv_vol);
+	di->rsoc = rk818_bat_vol_to_soc(di, ocv_vol);
+	di->dsoc = di->rsoc;
+	rk818_bat_init_capacity(di, di->nac);
+	rk818_bat_set_initialized_state(di);
+	BAT_INFO("first power on: soc=%d\n", di->dsoc);
+}
+
+static u8 rk818_bat_get_halt_cnt(struct battery_info *di)
+{
+	return rk818_bat_read(HALT_CNT_REG);
+}
+
+static void rk818_bat_inc_halt_cnt(struct battery_info *di)
+{
+	u8 cnt;
+
+	cnt = rk818_bat_read(HALT_CNT_REG);
+	rk818_bat_write(HALT_CNT_REG, ++cnt);
+}
+
+static bool is_rk818_bat_last_halt(struct battery_info *di)
+{
+	int pre_cap = rk818_bat_get_prev_cap(di);
+	int now_cap = rk818_bat_get_coulomb_cap(di);
+
+	/* over 5%: system halt last time */
+	if (abs(now_cap - pre_cap) > (di->fcc / 20)) {
+		rk818_bat_inc_halt_cnt(di);
+		return true;
+	} else {
+		return false;
+	}
+}
+
+static void rk818_bat_not_first_pwron(struct battery_info *di)
+{
+	int pre_soc, pre_cap, ocv_cap, ocv_soc, ocv_vol, now_cap;
+
+	di->fcc = rk818_bat_get_fcc(di);
+	pre_soc = rk818_bat_get_dsoc(di);
+	pre_cap = rk818_bat_get_prev_cap(di);
+	now_cap = rk818_bat_get_coulomb_cap(di);
+	di->pwr_dsoc = pre_soc;
+	di->pwr_rsoc = (now_cap + di->fcc / 200) * 100 / DIV(di->fcc);
+	di->is_halt = is_rk818_bat_last_halt(di);
+	di->halt_cnt = rk818_bat_get_halt_cnt(di);
+	di->is_ocv_calib = is_rk818_bat_ocv_valid(di);
+
+	if (di->is_halt) {
+		BAT_INFO("system halt last time... cap: pre=%d, now=%d\n",
+			 pre_cap, now_cap);
+		if (now_cap < 0)
+			now_cap = 0;
+		rk818_bat_init_capacity(di, now_cap);
+		pre_cap = di->remain_cap;
+		pre_soc = di->rsoc;
+		goto finish;
+	} else if (di->is_ocv_calib) {
+		ocv_vol = rk818_bat_get_ocv_voltage(di);
+		ocv_soc = rk818_bat_vol_to_soc(di, ocv_vol);
+		ocv_cap = rk818_bat_vol_to_cap(di, ocv_vol);
+		pre_cap = ocv_cap;
+		BAT_INFO("do ocv calib.. rsoc=%d\n", ocv_soc);
+
+		if (abs(ocv_soc - pre_soc) >= di->max_soc_offset) {
+			BAT_INFO("trigger max soc offset, soc: %d -> %d\n",
+				 pre_soc, ocv_soc);
+			pre_soc = ocv_soc;
+			di->is_max_soc_offset = true;
+		}
+		BAT_INFO("OCV calib: cap=%d, rsoc=%d\n", ocv_cap, ocv_soc);
+	}
+finish:
+	di->dsoc = pre_soc;
+	di->nac = pre_cap;
+	rk818_bat_init_capacity(di, di->nac);
+	rk818_bat_set_initialized_state(di);
+	BAT_INFO("dl=%d rl=%d cap=%d m=%d v=%d ov=%d c=%d pl=%d ch=%d Ver=%s\n",
+		 di->dsoc, di->rsoc, di->remain_cap, di->pwroff_min,
+		 rk818_bat_get_avg_voltage(di), rk818_bat_get_ocv_voltage(di),
+		 rk818_bat_get_avg_current(di), rk818_bat_get_dsoc(di),
+		 rk818_bat_get_usb_state(di), DRIVER_VERSION
+		 );
+}
+
+static bool is_rk818_bat_first_poweron(struct battery_info *di)
+{
+	u8 buf;
+
+	buf = rk818_bat_read(GGSTS_REG);
+	if (buf & BAT_CON) {
+		buf &= ~BAT_CON;
+		rk818_bat_write(GGSTS_REG, buf);
+		return true;
+	}
+
+	return false;
+}
+
+static bool rk818_bat_ocv_sw_reset(struct battery_info *di)
+{
+	u8 buf;
+
+	buf = rk818_bat_read(MISC_MARK_REG);
+	if (((buf & FG_RESET_LATE) && di->pwroff_min >= 30) ||
+	    (buf & FG_RESET_NOW)) {
+		buf &= ~FG_RESET_LATE;
+		buf &= ~FG_RESET_NOW;
+		rk818_bat_write(MISC_MARK_REG, buf);
+		BAT_INFO("manual reset fuel gauge\n");
+		return true;
+	} else {
+		return false;
+	}
+}
+
+void rk818_bat_init_rsoc(struct battery_info *di)
+{
+	di->pwroff_min = rk818_bat_get_pwroff_min(di);
+	di->is_first_power_on = is_rk818_bat_first_poweron(di);
+	di->is_sw_reset = rk818_bat_ocv_sw_reset(di);
+
+	if (di->is_first_power_on || di->is_sw_reset)
+		rk818_bat_first_pwron(di);
+	else
+		rk818_bat_not_first_pwron(di);
+}
+
+static int rk818_bat_calc_linek(struct battery_info *di)
+{
+	int linek, diff, delta;
+
+	di->calc_dsoc = di->dsoc;
+	di->calc_rsoc = di->rsoc;
+	di->sm_old_cap = di->remain_cap;
+
+	delta = abs(di->dsoc - di->rsoc);
+	diff = delta * 3;
+	di->sm_meet_soc = (di->dsoc >= di->rsoc) ?
+			   (di->dsoc + diff) : (di->rsoc + diff);
+
+	if (di->dsoc < di->rsoc)
+		linek = 1000 * (delta + diff) / DIV(diff);
+	else if (di->dsoc > di->rsoc)
+		linek = 1000 * diff / DIV(delta + diff);
+	else
+		linek = 1000;
+
+	di->sm_chrg_dsoc = di->dsoc * 1000;
+
+	DBG("<%s>. meet=%d, diff=%d, link=%d, calc: dsoc=%d, rsoc=%d\n",
+	    __func__, di->sm_meet_soc, diff, linek,
+	    di->calc_dsoc, di->calc_rsoc);
+
+	return linek;
+}
+
+static void rk818_bat_init_ts2(struct battery_info *di)
+{
+	u8 buf;
+
+	if (!di->ts2_vol_multi)
+		return;
+
+	/* TS2 adc mode */
+	buf = rk818_bat_read(TS_CTRL_REG);
+	buf |= TS2_ADC_MODE;
+	rk818_bat_write(TS_CTRL_REG, buf);
+
+	/* TS2 adc enable */
+	buf = rk818_bat_read(ADC_CTRL_REG);
+	buf |= ADC_TS2_EN;
+	rk818_bat_write(ADC_CTRL_REG, buf);
+}
+
+static int rk818_fg_init(struct battery_info *di)
+{
+	rk818_bat_enable_gauge(di);
+	rk818_bat_init_voltage_kb(di);
+	rk818_bat_init_coffset(di);
+	rk818_bat_init_ts2(di);
+	rk818_bat_clr_initialized_state(di);
+	di->dsoc = rk818_bat_get_dsoc(di);
+
+	/*
+	 * it's better to init fg in kernel,
+	 * so avoid init in uboot as far as possible
+	 */
+	if (rk818_bat_get_usb_state(di) != NO_CHARGER) {
+		if (rk818_bat_get_est_voltage(di) < CONFIG_SCREEN_ON_VOL_THRESD)
+			rk818_bat_init_rsoc(di);
+#ifdef CONFIG_UBOOT_CHARGE
+		else
+			rk818_bat_init_rsoc(di);
+#endif
+	}
+
+	rk818_bat_init_chrg_config(di);
+	di->voltage_avg = rk818_bat_get_avg_voltage(di);
+	di->voltage_ocv = rk818_bat_get_ocv_voltage(di);
+	di->current_avg = rk818_bat_get_avg_current(di);
+	di->sm_linek = rk818_bat_calc_linek(di);
+	di->finish_chrg_base = get_timer(0);
+	di->term_sig_base = get_timer(0);
+	di->pwr_vol = di->voltage_avg;
+
+	return 0;
+}
+
+static bool is_rk818_bat_exist(struct  battery_info *di)
+{
+	return (rk818_bat_read(SUP_STS_REG) & BAT_EXS) ? true : false;
+}
+
+static void rk818_bat_set_current(int input_current)
+{
+	u8 usb_ctrl;
+
+	usb_ctrl = rk818_bat_read(USB_CTRL_REG);
+	usb_ctrl &= ~INPUT_CUR_MSK;
+	usb_ctrl |= (input_current);
+	rk818_bat_write(USB_CTRL_REG, usb_ctrl);
+}
+
+static int rk818_bat_get_ts2_voltage(struct battery_info *di)
+{
+	u32 val = 0;
+
+	val |= rk818_bat_read(RK818_TS2_ADC_REGL) << 0;
+	val |= rk818_bat_read(RK818_TS2_ADC_REGH) << 8;
+
+	/* refer voltage 2.2V, 12bit adc accuracy */
+	val = val * 2200 * di->ts2_vol_multi / 4095;
+	DBG("<%s>. ts2 voltage=%d\n", __func__, val);
+
+	return val;
+}
+
+static void rk818_bat_ts2_update_current(struct battery_info *di)
+{
+	int ts2_vol, input_current, invalid_cnt = 0, confirm_cnt = 0;
+
+	rk818_bat_set_current(ILIM_450MA);
+	input_current = ILIM_850MA;
+	while (input_current < di->chrg_cur_input) {
+		mdelay(100);
+		ts2_vol = rk818_bat_get_ts2_voltage(di);
+		DBG("******** ts2 vol=%d\n", ts2_vol);
+		/* filter invalid voltage */
+		if (ts2_vol <= TS2_VALID_VOL) {
+			invalid_cnt++;
+			DBG("%s: invalid ts2 voltage: %d\n, cnt=%d",
+			    __func__, ts2_vol, invalid_cnt);
+			if (invalid_cnt < TS2_CHECK_CNT)
+				continue;
+
+			/* if fail, set max input current as default */
+			input_current = di->chrg_cur_input;
+			rk818_bat_set_current(input_current);
+			break;
+		}
+
+		/* update input current */
+		if (ts2_vol >= TS2_THRESHOLD_VOL) {
+			/* update input current */
+			input_current++;
+			rk818_bat_set_current(input_current);
+			DBG("********* input=%d\n",
+			    CHRG_CUR_INPUT[input_current & 0x0f]);
+		} else {
+			/* confirm lower threshold voltage */
+			confirm_cnt++;
+			if (confirm_cnt < TS2_CHECK_CNT) {
+				DBG("%s: confirm ts2 voltage: %d\n, cnt=%d",
+				    __func__, ts2_vol, confirm_cnt);
+				continue;
+			}
+
+			/* trigger threshold, so roll back 1 step */
+			input_current--;
+			if (input_current == ILIM_80MA ||
+			    input_current < 0)
+				input_current = ILIM_450MA;
+			rk818_bat_set_current(input_current);
+			break;
+		}
+	}
+
+	BAT_INFO("DC_CHARGER charge_cur_input=%d\n",
+		 CHRG_CUR_INPUT[input_current]);
+}
+
+static void rk818_bat_charger_setting(struct battery_info *di, int charger)
+{
+	static u8 old_charger = UNDEF_CHARGER;
+
+	/* charger changed */
+	if (old_charger != charger) {
+		if (charger == NO_CHARGER) {
+			BAT_INFO("NO_CHARGER\n");
+			rk818_bat_set_current(ILIM_450MA);
+		} else if (charger == USB_CHARGER) {
+			BAT_INFO("USB_CHARGER\n");
+			rk818_bat_set_current(ILIM_450MA);
+		} else if (charger == DC_CHARGER || charger == AC_CHARGER) {
+#ifdef CONFIG_UBOOT_CHARGE
+			if (di->ts2_vol_multi) {
+#else
+			if ((rk818_bat_get_est_voltage(di) <
+			     CONFIG_SCREEN_ON_VOL_THRESD) &&
+			    (di->ts2_vol_multi)) {
+#endif
+				rk818_bat_ts2_update_current(di);
+			} else {
+				rk818_bat_set_current(di->chrg_cur_input);
+				BAT_INFO("DC_CHARGER charge_cur_input=%d\n",
+					 CHRG_CUR_INPUT[di->chrg_cur_input]);
+			}
+		} else {
+			BAT_INFO("charger setting error %d\n", charger);
+		}
+
+		old_charger = charger;
+	}
+}
+
+static int rk818_bat_get_dc_state(struct battery_info *di)
+{
+	if (!di->dc_is_valid)
+		return NO_CHARGER;
+
+	return dm_gpio_get_value(di->dc_det) ? DC_CHARGER : NO_CHARGER;
+}
+
+static int rk818_bat_get_charger_type(struct battery_info *di)
+{
+	int charger_type = NO_CHARGER;
+
+	/* check by ic hardware: this check make check work safer */
+	if ((rk818_bat_read(VB_MON_REG) & PLUG_IN_STS) == 0)
+		return NO_CHARGER;
+
+	/* virtual or bat not exist */
+	if (di->virtual_power)
+		return DC_CHARGER;
+
+	/* check DC firstly */
+	charger_type = rk818_bat_get_dc_state(di);
+	if (charger_type == DC_CHARGER)
+		return charger_type;
+
+	/* check USB secondly */
+	return rk818_bat_get_usb_state(di);
+}
+
+static void rk818_bat_save_dsoc(struct battery_info *di, u8 save_soc)
+{
+	static int old_soc = -1;
+
+	if (old_soc != save_soc) {
+		old_soc = save_soc;
+		rk818_bat_write(SOC_REG, save_soc);
+	}
+}
+
+static void rk818_bat_save_cap(struct battery_info *di, int cap)
+{
+	u8 buf;
+	static int old_cap;
+
+	if (old_cap == cap)
+		return;
+
+	if (cap >= di->qmax)
+		cap = di->qmax;
+
+	old_cap = cap;
+	buf = (cap >> 24) & 0xff;
+	rk818_bat_write(REMAIN_CAP_REG3, buf);
+	buf = (cap >> 16) & 0xff;
+	rk818_bat_write(REMAIN_CAP_REG2, buf);
+	buf = (cap >> 8) & 0xff;
+	rk818_bat_write(REMAIN_CAP_REG1, buf);
+	buf = (cap >> 0) & 0xff;
+	rk818_bat_write(REMAIN_CAP_REG0, buf);
+}
+
+static u8 rk818_bat_get_chrg_status(struct battery_info *di)
+{
+	u8 status;
+
+	status = rk818_bat_read(SUP_STS_REG) & BAT_STATUS_MSK;
+	switch (status) {
+	case CHARGE_OFF:
+		DBG("CHARGE-OFF...\n");
+		break;
+	case DEAD_CHARGE:
+		DBG("DEAD CHARGE...\n");
+		break;
+	case  TRICKLE_CHARGE:
+		DBG("TRICKLE CHARGE...\n ");
+		break;
+	case  CC_OR_CV:
+		DBG("CC or CV...\n");
+		break;
+	case  CHARGE_FINISH:
+		DBG("CHARGE FINISH...\n");
+		break;
+	case  USB_OVER_VOL:
+		DBG("USB OVER VOL...\n");
+		break;
+	case  BAT_TMP_ERR:
+		DBG("BAT TMP ERROR...\n");
+		break;
+	case  TIMER_ERR:
+		DBG("TIMER ERROR...\n");
+		break;
+	case  USB_EXIST:
+		DBG("USB EXIST...\n");
+		break;
+	case  USB_EFF:
+		DBG("USB EFF...\n");
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return status;
+}
+
+static void rk818_bat_finish_chrg(struct battery_info *di)
+{
+	u32 tgt_sec = 0;
+
+	if (di->dsoc < 100) {
+		tgt_sec = di->fcc * 3600 / 100 / FINISH_CALI_CURR;
+		if (get_timer(di->finish_chrg_base) > SECONDS(tgt_sec)) {
+			di->finish_chrg_base = get_timer(0);
+			di->dsoc++;
+		}
+	}
+	DBG("<%s>. sec=%d, finish_sec=%lu\n", __func__, SECONDS(tgt_sec),
+	    get_timer(di->finish_chrg_base));
+}
+
+static void rk818_bat_debug_info(struct battery_info *di)
+{
+	u8 sup_sts, ggcon, ggsts, vb_mod, rtc, thermal, misc;
+	u8 usb_ctrl, chrg_ctrl1, chrg_ctrl2, chrg_ctrl3;
+	static const char *name[] = {"NONE", "USB", "AC", "DC", "UNDEF"};
+
+	if (!dbg_enable)
+		return;
+	ggcon = rk818_bat_read(GGCON_REG);
+	ggsts = rk818_bat_read(GGSTS_REG);
+	sup_sts = rk818_bat_read(SUP_STS_REG);
+	usb_ctrl = rk818_bat_read(USB_CTRL_REG);
+	thermal = rk818_bat_read(THERMAL_REG);
+	vb_mod = rk818_bat_read(VB_MON_REG);
+	misc = rk818_bat_read(MISC_MARK_REG);
+	rtc = rk818_bat_read(SECONDS_REG);
+	chrg_ctrl1 = rk818_bat_read(CHRG_CTRL_REG1);
+	chrg_ctrl2 = rk818_bat_read(CHRG_CTRL_REG2);
+	chrg_ctrl3 = rk818_bat_read(CHRG_CTRL_REG3);
+
+	DBG("\n---------------------- DEBUG REGS ------------------------\n"
+	    "GGCON=0x%2x, GGSTS=0x%2x, RTC=0x%2x, SUP_STS= 0x%2x\n"
+	    "VB_MOD=0x%2x, USB_CTRL=0x%2x, THERMAL=0x%2x, MISC=0x%2x\n"
+	    "CHRG_CTRL:REG1=0x%2x, REG2=0x%2x, REG3=0x%2x\n",
+	    ggcon, ggsts, rtc, sup_sts, vb_mod, usb_ctrl,
+	    thermal, misc, chrg_ctrl1, chrg_ctrl2, chrg_ctrl3
+	    );
+	DBG("----------------------------------------------------------\n"
+	    "Dsoc=%d, Rsoc=%d, Vavg=%d, Iavg=%d, Cap=%d, Fcc=%d, d=%d\n"
+	    "K=%d, old_cap=%d, charger=%s, Is=%d, Ip=%d, Vs=%d\n"
+	    "min=%d, meet: soc=%d, calc: dsoc=%d, rsoc=%d, Vocv=%d\n"
+	    "off: i=0x%x, c=0x%x, max=%d, ocv_c=%d, halt: st=%d, cnt=%d\n"
+	    "pwr: dsoc=%d, rsoc=%d, vol=%d, Res=%d, exist=%d\n",
+	    di->dsoc, rk818_bat_get_rsoc(di), rk818_bat_get_avg_voltage(di),
+	    rk818_bat_get_avg_current(di), di->remain_cap, di->fcc,
+	    di->rsoc - di->dsoc,
+	    di->sm_linek, di->sm_old_cap, name[di->chrg_type],
+	    di->res_div * CHRG_CUR_SEL[chrg_ctrl1 & 0x0f],
+	    CHRG_CUR_INPUT[usb_ctrl & 0x0f],
+	    CHRG_VOL_SEL[(chrg_ctrl1 & 0x70) >> 4],  di->pwroff_min,
+	    di->sm_meet_soc, di->calc_dsoc, di->calc_rsoc,
+	    rk818_bat_get_ocv_voltage(di), rk818_bat_get_ioffset(di),
+	    rk818_bat_get_coffset(di), di->is_max_soc_offset,
+	    di->is_ocv_calib, di->is_halt, di->halt_cnt, di->pwr_dsoc,
+	    di->pwr_rsoc, di->pwr_vol, di->sample_res, is_rk818_bat_exist(di)
+	    );
+	rk818_bat_get_chrg_status(di);
+	DBG("###########################################################\n");
+}
+
+static void rk818_bat_linek_algorithm(struct battery_info *di)
+{
+	int delta_cap, ydsoc, tmp;
+	u8 chg_st = rk818_bat_get_chrg_status(di);
+
+	/* slow down */
+	if (di->dsoc == 99)
+		di->sm_linek = CHRG_FULL_K;
+	else if (di->dsoc >= CHRG_TERM_DSOC && di->current_avg > TERM_CALI_CURR)
+		di->sm_linek = CHRG_TERM_K;
+
+	delta_cap = di->remain_cap - di->sm_old_cap;
+	ydsoc = di->sm_linek * delta_cap * 100 / DIV(di->fcc);
+	if (ydsoc > 0) {
+		tmp = (di->sm_chrg_dsoc + 1) / 1000;
+		if (tmp != di->dsoc)
+			di->sm_chrg_dsoc = di->dsoc * 1000;
+		di->sm_chrg_dsoc += ydsoc;
+		di->dsoc = (di->sm_chrg_dsoc + 1) / 1000;
+		di->sm_old_cap = di->remain_cap;
+		if (di->dsoc == di->rsoc && di->sm_linek != CHRG_FULL_K &&
+		    di->sm_linek != CHRG_TERM_K)
+			di->sm_linek = 1000;
+	}
+
+	if ((di->sm_linek == 1000 || di->dsoc >= 100) &&
+	    (chg_st != CHARGE_FINISH)) {
+		if (di->sm_linek == 1000)
+			di->dsoc = di->rsoc;
+		di->sm_chrg_dsoc = di->dsoc * 1000;
+	}
+
+	DBG("linek=%d, sm_dsoc=%d, delta_cap=%d, ydsoc=%d, old_cap=%d\n"
+	    "calc: dsoc=%d, rsoc=%d, meet=%d\n",
+	    di->sm_linek, di->sm_chrg_dsoc, delta_cap, ydsoc, di->sm_old_cap,
+	    di->calc_dsoc, di->calc_rsoc, di->sm_meet_soc);
+}
+
+static void rk818_bat_set_term_mode(struct battery_info *di, int mode)
+{
+	u8 buf;
+
+	buf = rk818_bat_read(CHRG_CTRL_REG3);
+	buf &= ~CHRG_TERM_SIG_MSK;
+	buf |= mode;
+	rk818_bat_write(CHRG_CTRL_REG3, buf);
+
+	DBG("set charge to %s term mode\n", mode ? "digital" : "analog");
+}
+
+static int rk818_bat_get_iadc(struct battery_info *di)
+{
+	int val = 0;
+
+	val |= rk818_bat_read(BAT_CUR_AVG_REGL) << 0;
+	val |= rk818_bat_read(BAT_CUR_AVG_REGH) << 8;
+	if (val > 2047)
+		val -= 4096;
+
+	return val;
+}
+
+static bool rk818_bat_adc_calib(struct battery_info *di)
+{
+	int i, ioffset, coffset, adc;
+
+	if (abs(di->current_avg) < ADC_CALIB_THRESHOLD)
+		return false;
+
+	for (i = 0; i < 5; i++) {
+		adc = rk818_bat_get_iadc(di);
+		coffset = rk818_bat_get_coffset(di);
+		rk818_bat_set_coffset(di, coffset + adc);
+		mdelay(200);
+		adc = rk818_bat_get_iadc(di);
+		if (abs(adc) < ADC_CALIB_THRESHOLD) {
+			coffset = rk818_bat_get_coffset(di);
+			ioffset = rk818_bat_get_ioffset(di);
+			di->poffset = coffset - ioffset;
+			rk818_bat_write(POFFSET_REG, di->poffset);
+			BAT_INFO("new offset:c=0x%x, i=0x%x, p=0x%x\n",
+				 coffset, ioffset, di->poffset);
+			return true;
+		} else {
+			BAT_INFO("coffset calib again %d..\n", i);
+			rk818_bat_set_coffset(di, coffset);
+			mdelay(200);
+		}
+	}
+
+	return false;
+}
+
+static void rk818_bat_smooth_charge(struct battery_info *di)
+{
+	u8 chg_st = rk818_bat_get_chrg_status(di);
+
+	/* set terminal charge mode */
+	if (di->term_sig_base && get_timer(di->term_sig_base) > SECONDS(1)) {
+		rk818_bat_set_term_mode(di, CHRG_TERM_DIG_SIGNAL);
+		di->term_sig_base = 0;
+	}
+
+	/* not charge mode and not keep in uboot charge: exit */
+	if ((di->chrg_type == NO_CHARGER) ||
+	    !rk818_bat_is_initialized(di)) {
+		DBG("chrg=%d, initialized=%d\n", di->chrg_type,
+		    rk818_bat_is_initialized(di));
+		goto out;
+	}
+
+	/* update rsoc and remain cap */
+	di->remain_cap = rk818_bat_get_coulomb_cap(di);
+	di->rsoc = rk818_bat_get_rsoc(di);
+	if (di->remain_cap > di->fcc) {
+		di->sm_old_cap -= (di->remain_cap - di->fcc);
+		rk818_bat_init_capacity(di, di->fcc);
+	}
+
+	/* finish charge step */
+	if (chg_st == CHARGE_FINISH) {
+		DBG("finish charge step...\n");
+		if (di->adc_allow_update)
+			di->adc_allow_update = !rk818_bat_adc_calib(di);
+		rk818_bat_finish_chrg(di);
+		rk818_bat_init_capacity(di, di->fcc);
+	} else {
+		DBG("smooth charge step...\n");
+		di->adc_allow_update = true;
+		di->finish_chrg_base = get_timer(0);
+		rk818_bat_linek_algorithm(di);
+	}
+
+	/* dsoc limit */
+	if (di->dsoc > 100)
+		di->dsoc = 100;
+	else if (di->dsoc < 0)
+		di->dsoc = 0;
+
+	rk818_bat_save_dsoc(di, di->dsoc);
+	rk818_bat_save_cap(di, di->remain_cap);
+out:
+	rk818_bat_debug_info(di);
+}
+
+static int rk818_bat_update_get_soc(struct udevice *dev)
+{
+	struct battery_info *di = dev_get_priv(dev);
+	static ulong seconds;
+
+	/* set charge current */
+	di->chrg_type =
+		rk818_bat_get_charger_type(di);
+	rk818_bat_charger_setting(di, di->chrg_type);
+
+	/* fg calc every 5 seconds */
+	if (!seconds)
+		seconds = get_timer(0);
+	if (get_timer(seconds) >= SECONDS(5)) {
+		seconds = get_timer(0);
+		rk818_bat_smooth_charge(di);
+	}
+
+	/* bat exist, fg init success(dts pass) and uboot charge: report data */
+	if (!di->virtual_power && di->voltage_k)
+		return di->dsoc;
+	else
+		return VIRTUAL_POWER_SOC;
+}
+
+static int rk818_bat_update_get_voltage(struct udevice *dev)
+{
+	struct battery_info *di = dev_get_priv(dev);
+
+	if (!di->virtual_power && di->voltage_k)
+		return rk818_bat_get_est_voltage(di);
+	else
+		return VIRTUAL_POWER_VOL;
+}
+
+static bool rk818_bat_update_get_chrg_online(struct udevice *dev)
+{
+	return rk818_bat_dwc_otg_check_dpdm();
+}
+
+static struct dm_fuel_gauge_ops fg_ops = {
+	.get_soc = rk818_bat_update_get_soc,
+	.get_voltage = rk818_bat_update_get_voltage,
+	.get_chrg_online = rk818_bat_update_get_chrg_online,
+};
+
+static int rk818_bat_parse_dt(struct battery_info *di, void const *blob)
+{
+	int node, parent, len, err;
+	const char *prop;
+
+	parent = fdt_node_offset_by_compatible(blob, 0, "rockchip,rk818");
+	if (parent < 0) {
+		printf("can't find rockchip,rk818 node\n");
+		return -ENODEV;
+	}
+
+	if (!fdtdec_get_is_enabled(blob, parent)) {
+		DBG("rk818 node disabled\n");
+		return -ENODEV;
+	}
+
+	node = fdt_subnode_offset_namelen(blob, parent, "battery", 7);
+	if (node < 0) {
+		printf("can't find battery node\n");
+		di->chrg_cur_input = ILIM_2000MA;
+		return -EINVAL;
+	}
+
+	prop = fdt_getprop(blob, node, "ocv_table", &len);
+	if (!prop) {
+		printf("can't find ocv_table prop\n");
+		return -EINVAL;
+	}
+
+	di->ocv_table = calloc(len, 1);
+	if (!di->ocv_table) {
+		printf("can't calloc ocv_table\n");
+		return -ENOMEM;
+	}
+
+	di->ocv_size = len / 4;
+	err = fdtdec_get_int_array(blob, node, "ocv_table",
+				   di->ocv_table, di->ocv_size);
+	if (err < 0) {
+		printf("read ocv_table error\n");
+		free(di->ocv_table);
+		return -EINVAL;
+	}
+
+	di->design_cap = fdtdec_get_int(blob, node, "design_capacity", -1);
+	if (di->design_cap < 0) {
+		printf("read design_capacity error\n");
+		return -EINVAL;
+	}
+
+	di->qmax = fdtdec_get_int(blob, node, "design_qmax", -1);
+	if (di->qmax < 0) {
+		printf("read design_qmax error\n");
+		return -EINVAL;
+	}
+
+	di->dts_vol_sel = fdtdec_get_int(blob, node, "max_chrg_voltage", 4200);
+	di->dts_cur_input = fdtdec_get_int(blob, node,
+					   "max_input_current", 2000);
+	di->dts_cur_sel = fdtdec_get_int(blob, node, "max_chrg_current", 1200);
+	di->sample_res = fdtdec_get_int(blob, node, "sample_res",
+					SAMPLE_RES_20mR);
+	di->res_div = (di->sample_res == SAMPLE_RES_20mR) ?
+		       SAMPLE_RES_DIV1 : SAMPLE_RES_DIV2;
+	di->max_soc_offset = fdtdec_get_int(blob, node, "max_soc_offset", 70);
+	di->virtual_power = fdtdec_get_int(blob, node, "virtual_power", 0);
+	di->ts2_vol_multi = fdtdec_get_int(blob, node, "ts2_vol_multi", 0);
+	di->bat_res = fdtdec_get_int(blob, node, "bat_res", 135);
+	if (!gpio_request_by_name_nodev(offset_to_ofnode(node), "dc_det_gpio",
+					0, di->dc_det, GPIOD_IS_IN)) {
+		di->dc_is_valid = true;
+	}
+
+	if (!is_rk818_bat_exist(di))
+		di->virtual_power = 1;
+
+	DBG("-------------------------------:\n");
+	DBG("max_input_current:%d\n", di->dts_cur_input);
+	DBG("max_chrg_current:%d\n", di->dts_cur_sel);
+	DBG("max_chrg_voltage:%d\n", di->dts_vol_sel);
+	DBG("design_capacity :%d\n", di->design_cap);
+	DBG("design_qmax:%d\n", di->qmax);
+	DBG("max_soc_offset:%d\n", di->max_soc_offset);
+	DBG("sample_res:%d\n", di->sample_res);
+
+	return 0;
+}
+
+static int rk818_fg_probe(struct udevice *dev)
+{
+	struct rk8xx_priv *priv = dev_get_priv(dev->parent);
+	struct battery_info *di = dev_get_priv(dev);
+	int ret;
+
+	if (priv->variant != 0x8180) {
+		debug("Not support pmic variant: rk%x\n", priv->variant);
+		return -EINVAL;
+	}
+
+	g_pmic_dev = dev->parent;
+	ret = rk818_bat_parse_dt(di, gd->fdt_blob);
+	if (ret)
+		return ret;
+
+	return rk818_fg_init(di);
+}
+
+U_BOOT_DRIVER(rk818_fg) = {
+	.name = "rk818_fg",
+	.id = UCLASS_FG,
+	.probe = rk818_fg_probe,
+	.ops = &fg_ops,
+	.priv_auto_alloc_size = sizeof(struct battery_info),
+};

commit 1ccc17a74d7a8097cb0c501a70c401947e20ae1f
Author: Wu Liang feng <wulf@rock-chips.com>
Date:   Fri Sep 29 14:22:27 2017 +0800

    include: usb: add phy rockchip inno usb2 header file
    
    The rockchip USB 2.0 PHY can support USB BC1.2, but for the
    time being, the framework doesn't provide a method to get
    the USB charger type for the power module, so this header
    file provides an rockchip_chg_get_type() API to get the USB
    charger type.
    
    Change-Id: I2076981e75fac7b129b17188be49188693294ef1
    Signed-off-by: Wu Liang feng <wulf@rock-chips.com>

diff --git a/include/linux/usb/phy-rockchip-inno-usb2.h b/include/linux/usb/phy-rockchip-inno-usb2.h
new file mode 100644
index 0000000000..d56c9ff6c1
--- /dev/null
+++ b/include/linux/usb/phy-rockchip-inno-usb2.h
@@ -0,0 +1,12 @@
+/*
+ * Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef _PHY_ROCKCHIP_INNO_USB2_H
+#define _PHY_ROCKCHIP_INNO_USB2_H
+
+extern int rockchip_chg_get_type(void);
+
+#endif /* _PHY_ROCKCHIP_INNO_USB2_H */

commit 1ffcaf06aab7f41ac1aef0de04ee281e50a9a8d3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Sep 20 11:11:11 2017 +0800

    configs: evb-rk3328: enable CONFIG_DM_KEY
    
    So that we can use rk805 power key function
    
    Change-Id: Ic737b9a030f4218504051a17955e4e7b36d1b14c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index ddcc868d74..01a503de66 100644
--- a/configs/evb-rk3328_defconfig
+++ b/configs/evb-rk3328_defconfig
@@ -23,6 +23,7 @@ CONFIG_SYSCON=y
 CONFIG_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PHY=y

commit f9e5337ac21b288cd6ec6c4c0ced344c8b2cdcd9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Sep 27 14:55:26 2017 +0800

    rockchip: dts: rk3328-evb: add pwrkey node for rk805
    
    Change-Id: Iace8687e0192a7b1058c098ea3026864c8b54748
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts
index 36c0c0097d..c0716de30e 100644
--- a/arch/arm/dts/rk3328-evb.dts
+++ b/arch/arm/dts/rk3328-evb.dts
@@ -121,6 +121,10 @@
 		#clock-cells = <1>;
 		clock-output-names = "xin32k", "rk805-clkout2";
 
+		pwrkey {
+			status = "okay";
+		};
+
 		regulators {
 			vdd_logic: DCDC_REG1 {
 				regulator-name = "vdd_logic";

commit 6d747531ae712b6e19fddc2a65eceb1effccacf6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Sep 18 20:21:09 2017 +0800

    power: pmic: rk8xx: bind power key
    
    Change-Id: I629e46abcf5da694c37517c64da7d02918b44705
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index f2a2f07de7..0d32410149 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -22,6 +22,11 @@ static const struct pmic_child_info pmic_children_info[] = {
 	{ },
 };
 
+static const struct pmic_child_info power_key_info[] = {
+	{ .prefix = "pwrkey", .driver = "rk8xx_pwrkey"},
+	{ },
+};
+
 static int rk8xx_reg_count(struct udevice *dev)
 {
 	return RK808_NUM_OF_REGS;
@@ -73,6 +78,10 @@ static int rk8xx_bind(struct udevice *dev)
 	if (!children)
 		debug("%s: %s - no child found\n", __func__, dev->name);
 
+	children = pmic_bind_children(dev, dev->node, power_key_info);
+	if (!children)
+		debug("%s: %s - no child found\n", __func__, dev->name);
+
 	/* Always return success for this device */
 	return 0;
 }

commit 436d684c023d358797e3ff743d13062787564222
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Sep 18 19:02:05 2017 +0800

    input: add rk8xx pwrkey support
    
    RK805/816 provide pwrkey function while RK808/818 is not.
    
    Change-Id: Ia6cd9fcb0a360d81cff54cf49a1f1c9c653488e6
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig
index 1ea90bf9d9..1a4c5a357f 100644
--- a/drivers/input/Kconfig
+++ b/drivers/input/Kconfig
@@ -30,3 +30,10 @@ config I8042_KEYB
 	  driver handles English and German keyboards - set the environment
 	  variable 'keymap' to "de" to select German. Keyboard repeat is
 	  handled by the keyboard itself.
+
+config RK8XX_PWRKEY
+	bool "Enable RK805/816 pwrkey support"
+	depends on DM_KEY && PMIC_RK8XX
+	default y
+	help
+	  This adds a driver for the RK805/816 pwrkey support.
diff --git a/drivers/input/Makefile b/drivers/input/Makefile
index dfe46a037d..bf2d6e3642 100644
--- a/drivers/input/Makefile
+++ b/drivers/input/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_TEGRA_KEYBOARD) += tegra-kbc.o
 obj-$(CONFIG_TWL4030_INPUT) += twl4030.o
 obj-$(CONFIG_TWL6030_INPUT) += twl6030.o
 obj-$(CONFIG_CROS_EC_KEYB) += cros_ec_keyb.o
+obj-$(CONFIG_RK8XX_PWRKEY) += rk8xx_pwrkey.o
 ifdef CONFIG_PS2KBD
 obj-y += keyboard.o pc_keyb.o
 obj-$(CONFIG_PS2MULT) += ps2mult.o ps2ser.o
diff --git a/drivers/input/rk8xx_pwrkey.c b/drivers/input/rk8xx_pwrkey.c
new file mode 100644
index 0000000000..530a57370b
--- /dev/null
+++ b/drivers/input/rk8xx_pwrkey.c
@@ -0,0 +1,130 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <key.h>
+#include <power/pmic.h>
+#include <power/rk8xx_pmic.h>
+
+#define	RK816_INT_STS_REG1	0x49
+#define	RK816_INT_MSK_REG1	0x4a
+#define RK816_PWRON_RISE_INT	(1 << 6)
+#define RK816_PWRON_FALL_INT	(1 << 5)
+
+#define	RK805_INT_STS_REG	0x4c
+#define	RK805_INT_MSK_REG	0x4d
+#define RK805_PWRON_RISE_INT	(1 << 0)
+#define RK805_PWRON_FALL_INT	(1 << 7)
+
+struct key_data {
+	u8 int_sts_reg;
+	u8 int_msk_reg;
+	u8 pwron_rise_int;
+	u8 pwron_fall_int;
+};
+
+static int rk8xx_pwrkey_read(struct udevice *dev)
+{
+	struct key_data *key = dev_get_priv(dev);
+	int status = KEY_PRESS_NONE;
+	int ret, val;
+
+	val = pmic_reg_read(dev->parent, key->int_sts_reg);
+	if (val < 0) {
+		printf("%s: i2c read failed, ret=%d\n", __func__, val);
+		return val;
+	}
+
+	if (val & key->pwron_fall_int) {
+		/* Clear rise when detect fall */
+		ret = pmic_reg_write(dev->parent, key->int_sts_reg,
+				     key->pwron_rise_int);
+		if (ret < 0) {
+			printf("%s: i2c write failed, ret=%d\n", __func__, val);
+			return ret;
+		}
+
+		status = KEY_PRESS_DOWN;
+	}
+
+	/* Must check pwron rise behind of fall !! */
+	if (val & key->pwron_rise_int) {
+		/* Clear fall when detect rise */
+		ret = pmic_reg_write(dev->parent, key->int_sts_reg,
+				     key->pwron_fall_int);
+		if (ret < 0) {
+			printf("%s: i2c write failed, ret=%d\n", __func__, val);
+			return ret;
+		}
+
+		status = KEY_PRESS_UP;
+	}
+
+	return status;
+}
+
+static const struct dm_key_ops key_ops = {
+	.read = rk8xx_pwrkey_read,
+};
+
+static int rk8xx_pwrkey_probe(struct udevice *dev)
+{
+	struct rk8xx_priv *rk8xx = dev_get_priv(dev->parent);
+	struct key_data *key = dev_get_priv(dev);
+	int ret, val;
+
+	switch (rk8xx->variant) {
+	case RK805_ID:
+		key->int_sts_reg = RK805_INT_STS_REG;
+		key->int_msk_reg = RK805_INT_MSK_REG;
+		key->pwron_rise_int = RK805_PWRON_RISE_INT;
+		key->pwron_fall_int = RK805_PWRON_FALL_INT;
+		break;
+
+	case RK816_ID:
+		key->int_sts_reg = RK816_INT_STS_REG1;
+		key->int_msk_reg = RK816_INT_MSK_REG1;
+		key->pwron_rise_int = RK816_PWRON_RISE_INT;
+		key->pwron_fall_int = RK816_PWRON_FALL_INT;
+		break;
+
+	default:
+		return -EINVAL;
+	}
+
+	/* Clear states */
+	ret = pmic_reg_write(dev->parent, key->int_sts_reg,
+			     key->pwron_rise_int | key->pwron_fall_int);
+	if (ret < 0) {
+		printf("%s: i2c write failed, ret=%d\n", __func__, ret);
+		return ret;
+	}
+
+	val = pmic_reg_read(dev->parent, key->int_msk_reg);
+	if (val < 0) {
+		printf("%s: i2c read failed, ret=%d\n", __func__, val);
+		return val;
+	}
+
+	/* enable fall and rise interrupt */
+	val &= ~(key->pwron_rise_int | key->pwron_fall_int);
+	ret = pmic_reg_write(dev->parent, key->int_msk_reg, val);
+	if (ret < 0) {
+		printf("%s: i2c write failed, ret=%d\n", __func__, val);
+		return ret;
+	}
+
+	return 0;
+}
+
+U_BOOT_DRIVER(rk8xx_pwrkey) = {
+	.name   = "rk8xx_pwrkey",
+	.id     = UCLASS_KEY,
+	.probe  = rk8xx_pwrkey_probe,
+	.ops	= &key_ops,
+	.priv_auto_alloc_size = sizeof(struct key_data),
+};

commit 42865eb5adf4d0ae92999d96b7ef0f6e7005a62b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 9 09:10:45 2017 +0800

    drivers: irq: deliver both irq and private data to irq handler
    
    gic irq handler only need private data, while gpio irq(parent bank)
    handler needs private data and irq number for getting gpio bank and
    pin information. So we need deliver both of them to the irq handler.
    
    This patch fixes the legacy code issue.
    
    Change-Id: I1917b588a867e807cbd15e2e4101ae259cf4a40f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/irq/irq-generic.c b/drivers/irq/irq-generic.c
index 93a557f857..8dd09078d2 100644
--- a/drivers/irq/irq-generic.c
+++ b/drivers/irq/irq-generic.c
@@ -13,7 +13,8 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 struct irq_desc {
-	void (*handle_irq)(void *data);
+	interrupt_handler_t *handle_irq;
+	void *data;
 };
 
 static struct irq_desc irqs_desc[PLATFORM_MAX_IRQS_NR];
@@ -37,7 +38,7 @@ static int irq_bad(int irq)
 }
 
 /* general interrupt handler for gpio chip */
-void _generic_gpio_handle_irq(int irq, void *data)
+void _generic_gpio_handle_irq(int irq)
 {
 	if (irq_bad(irq))
 		return;
@@ -48,7 +49,7 @@ void _generic_gpio_handle_irq(int irq, void *data)
 	}
 
 	if (irqs_desc[irq].handle_irq)
-		irqs_desc[irq].handle_irq(data);
+		irqs_desc[irq].handle_irq(irq, irqs_desc[irq].data);
 }
 
 void _do_generic_irq_handler(void)
@@ -57,7 +58,7 @@ void _do_generic_irq_handler(void)
 
 	if (irq < PLATFORM_GIC_IRQS_NR) {
 		if (irqs_desc[irq].handle_irq)
-			irqs_desc[irq].handle_irq((void *)(unsigned long)irq);
+			irqs_desc[irq].handle_irq(irq, irqs_desc[irq].data);
 	}
 
 	gic_irq_chip->irq_eoi(irq);
@@ -91,8 +92,10 @@ static int _do_arch_irq_init(void)
 	 */
 	initialized = true;
 
-	for (irq = 0; irq < PLATFORM_MAX_IRQS_NR; irq++)
+	for (irq = 0; irq < PLATFORM_MAX_IRQS_NR; irq++) {
 		irqs_desc[irq].handle_irq = NULL;
+		irqs_desc[irq].data = NULL;
+	}
 
 	gic_irq_chip = arch_gic_irq_init();
 	if (chip_irq_bad(gic_irq_chip)) {
@@ -165,6 +168,7 @@ void irq_install_handler(int irq, interrupt_handler_t *handler, void *data)
 		return;
 
 	irqs_desc[irq].handle_irq = handler;
+	irqs_desc[irq].data = data;
 }
 
 void irq_free_handler(int irq)
@@ -173,6 +177,7 @@ void irq_free_handler(int irq)
 		return;
 
 	irqs_desc[irq].handle_irq = NULL;
+	irqs_desc[irq].data = NULL;
 }
 
 #ifdef CONFIG_ARM64
diff --git a/drivers/irq/irq-gpio.c b/drivers/irq/irq-gpio.c
index b331ffeb7f..d80ae116c4 100644
--- a/drivers/irq/irq-gpio.c
+++ b/drivers/irq/irq-gpio.c
@@ -77,7 +77,7 @@ static void gpio_irq_ack(void __iomem *regbase, unsigned int bit)
 	gpio_bit_op(regbase, GPIO_PORTS_EOI, bit, 1);
 }
 
-static void generic_gpio_handle_irq(int irq)
+static void generic_gpio_handle_irq(int irq, void *data __always_unused)
 {
 	struct gpio_bank *bank = gpio_id_to_bank(irq - IRQ_GPIO0);
 	unsigned gpio_irq, pin, unmasked = 0;
@@ -104,7 +104,7 @@ static void generic_gpio_handle_irq(int irq)
 			gpio_irq_unmask(bank->regbase, offset_to_bit(pin));
 		}
 
-		_generic_gpio_handle_irq(gpio_irq + pin, NULL);
+		_generic_gpio_handle_irq(gpio_irq + pin);
 
 		isr &= ~(1 << pin);
 
diff --git a/include/common.h b/include/common.h
index 0f386e9db2..501646fed9 100644
--- a/include/common.h
+++ b/include/common.h
@@ -106,7 +106,11 @@ void __assert_fail(const char *assertion, const char *file, unsigned line,
 #define BUG_ON(condition) do { if (unlikely((condition)!=0)) BUG(); } while(0)
 #endif /* BUG */
 
+#ifndef CONFIG_IRQ
 typedef void (interrupt_handler_t)(void *);
+#else
+typedef void (interrupt_handler_t)(int, void *);
+#endif
 
 #include <asm/u-boot.h> /* boot information for Linux kernel */
 #include <asm/global_data.h>	/* global data used for startup functions */
diff --git a/include/irq-generic.h b/include/irq-generic.h
index 6dfed10095..592c93bf55 100644
--- a/include/irq-generic.h
+++ b/include/irq-generic.h
@@ -78,6 +78,6 @@ int gpio_to_irq(struct gpio_desc *gpio);
 int hard_gpio_to_irq(unsigned gpio);
 
 /* only irq-gpio.c can use it */
-void _generic_gpio_handle_irq(int irq, void *data);
+void _generic_gpio_handle_irq(int irq);
 
 #endif /* _IRQ_GENERIC_H */

commit dbcd1484759f8c50fdc61bdc8fc48cf8294a1ae8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Sep 29 09:14:20 2017 +0800

    drivers: irq: malloc a temporary string for strtok
    
    strtok will update original input string.
    
    Change-Id: I9c81a72045f057c8a7d17f688e2d9f70dd849880
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/irq/irq-gpio-switch.c b/drivers/irq/irq-gpio-switch.c
index 79c78034cf..18cab91f2a 100644
--- a/drivers/irq/irq-gpio-switch.c
+++ b/drivers/irq/irq-gpio-switch.c
@@ -89,19 +89,25 @@ static int _irq_to_gpio(int irq)
 
 int gpio_to_irq(struct gpio_desc *gpio)
 {
-	int irq_gpio, bank;
+	int irq_gpio, bank, ret = EINVAL_GPIO;
 	bool found;
-	char *name;
+	char *name, *name_tok;
 
 	if (!gpio->dev->name) {
 		printf("can't find device name for the gpio bank\n");
 		return EINVAL_GPIO;
 	}
 
-	name = strtok((char *)gpio->dev->name, "@");
+	name_tok = strdup(gpio->dev->name);
+	if (!name_tok) {
+		printf("Error: strdup in %s failed!\n", __func__);
+		return -ENOMEM;
+	}
+
+	name = strtok(name_tok, "@");
 	if (!name) {
 		printf("can't find correct device name for the gpio bank\n");
-		return EINVAL_GPIO;
+		goto out;
 	}
 
 	for (bank = 0; bank < ARRAY_SIZE(gpio_banks); bank++) {
@@ -113,14 +119,19 @@ int gpio_to_irq(struct gpio_desc *gpio)
 
 	if (!found) {
 		printf("irq gpio framework can't find %s\n", name);
-		return EINVAL_GPIO;
+		goto out;
 	}
 
 	irq_gpio = RK_IRQ_GPIO(bank, gpio->offset);
 	if (!gpio_is_valid(irq_gpio))
-		return EINVAL_GPIO;
+		goto out;
 
+	free(name_tok);
 	return _hard_gpio_to_irq(irq_gpio);
+
+out:
+	free(name_tok);
+	return ret;
 }
 
 int hard_gpio_to_irq(u32 gpio)

commit 64c74e0b2d26a51a23fadc7fca5bed7febb0d022
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Sep 27 14:23:25 2017 +0800

    env: add env_update()
    
    This add/append/replace the sub value of an environment variable.
    
    Change-Id: I0fcda0a1c631013eb9458a04a09546ba1c643db3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/cmd/nvedit.c b/cmd/nvedit.c
index 4033d90c8e..060e38dbb0 100644
--- a/cmd/nvedit.c
+++ b/cmd/nvedit.c
@@ -297,6 +297,222 @@ int env_set(const char *varname, const char *varvalue)
 		return _do_env_set(0, 3, (char * const *)argv, H_PROGRAMMATIC);
 }
 
+static int env_append(const char *varname, const char *varvalue)
+{
+	int len = 0;
+	char *oldvalue, *newvalue;
+
+	/* before import into hashtable */
+	if (!(gd->flags & GD_FLG_ENV_READY) || !varname)
+		return 1;
+
+	if (varvalue)
+		len += strlen(varvalue);
+
+	oldvalue = env_get(varname);
+	if (oldvalue) {
+		len += strlen(oldvalue);
+		/* Exist ! */
+		if (strstr(oldvalue, varvalue))
+			return 0;
+	}
+
+	newvalue = malloc(len + 2);
+	if (!newvalue) {
+		printf("Error: malloc in %s failed!\n", __func__);
+		return 1;
+	}
+
+	*newvalue = '\0';
+
+	if (oldvalue) {
+		strcpy(newvalue, oldvalue);
+		strcat(newvalue, " ");
+	}
+
+	if (varvalue)
+		strcat(newvalue, varvalue);
+
+	env_set(varname, newvalue);
+	free(newvalue);
+
+	return 0;
+}
+
+static int env_replace(const char *varname, const char *substr,
+		       const char *replacement)
+{
+	char *oldvalue, *newvalue, *dst, *sub;
+	int substr_len, replace_len, oldvalue_len, len;
+
+	/* before import into hashtable */
+	if (!(gd->flags & GD_FLG_ENV_READY) || !varname)
+		return 1;
+
+	oldvalue = env_get(varname);
+	if (!oldvalue)
+		return 1;
+
+	sub = strstr(oldvalue, substr);
+	if (!sub)
+		return 1;
+
+	oldvalue_len = strlen(oldvalue) + 1;
+	substr_len = strlen(substr);
+	replace_len = strlen(replacement);
+
+	if (replace_len >= substr_len)
+		len = oldvalue_len + replace_len - substr_len;
+	else
+		len = oldvalue_len + substr_len - replace_len;
+
+	newvalue = malloc(len);
+	if (!newvalue) {
+		printf("Error: malloc in %s failed!\n", __func__);
+		return 1;
+	}
+
+	*newvalue = '\0';
+
+	/*
+	 * Orignal string is splited like format: [str1.. substr str2..]
+	 */
+
+	/* str1.. */
+	dst = newvalue;
+	dst = strncat(dst, oldvalue, sub - oldvalue);
+
+	/* substr */
+	dst += sub - oldvalue;
+	dst = strncat(dst, replacement, replace_len);
+
+	/* str2.. */
+	dst += replace_len;
+	len = oldvalue_len - substr_len - (sub - oldvalue);
+	dst = strncat(dst, sub + substr_len, len);
+
+	env_set(varname, newvalue);
+	free(newvalue);
+
+	return 0;
+}
+
+#define ARGS_ITEM_NUM	50
+
+int env_update(const char *varname, char *varvalue)
+{
+	/* 'a_' means "varargs_'; 'v_' means 'varvalue_' */
+	char *varargs;
+	char *a_title, *v_title;
+	char *a_string_tok, *a_item_tok = NULL;
+	char *v_string_tok, *v_item_tok = NULL;
+	char *a_item, *a_items[ARGS_ITEM_NUM] = { NULL };
+	char *v_item, *v_items[ARGS_ITEM_NUM] = { NULL };
+	bool match = false;
+	int i = 0, j = 0;
+
+	/* Before import into hashtable */
+	if (!(gd->flags & GD_FLG_ENV_READY) || !varname)
+		return 1;
+
+	/* If varname doesn't exist, create it and set varvalue */
+	varargs = env_get(varname);
+	if (!varargs) {
+		env_set(varname, varvalue);
+		return 0;
+	}
+
+	/* Malloc a temporary varargs for strtok */
+	a_string_tok = strdup(varargs);
+	if (!a_string_tok) {
+		printf("Error: strdup in failed, line=%d\n", __LINE__);
+		return 1;
+	}
+
+	/* Malloc a temporary varvalue for strtok */
+	v_string_tok = strdup(varvalue);
+	if (!v_string_tok) {
+		free(a_string_tok);
+		printf("Error: strdup in failed, line=%d\n", __LINE__);
+		return 1;
+	}
+
+	/* Splite varargs into items containing "=" by the blank */
+	a_item = strtok(a_string_tok, " ");
+	while (a_item && i < ARGS_ITEM_NUM) {
+		debug("%s: [a_item %d]: %s\n", __func__, i, a_item);
+		if (strstr(a_item, "="))
+			a_items[i++] = a_item;
+		a_item = strtok(NULL, " ");
+	}
+
+	/*
+	 * Splite varvalue into items containing "=" by the blank.
+	 * parse varvalue title, eg: "bootmode=emmc", title is "bootmode"
+	 */
+	v_item = strtok(v_string_tok, " ");
+	while (v_item && j < ARGS_ITEM_NUM) {
+		debug("%s: <v_item %d>: %s\n", __func__, j, v_item);
+		if (strstr(v_item, "="))
+			v_items[j++] = v_item;
+		else
+			env_append(varname, v_item);
+		v_item = strtok(NULL, " ");
+	}
+
+	/* For every v_item, search its title */
+	for (j = 0; j < ARGS_ITEM_NUM && v_items[j]; j++) {
+		v_item = v_items[j];
+		/* Malloc a temporary a_item for strtok */
+		v_item_tok = strdup(v_item);
+		if (!v_item_tok) {
+			printf("Error: strdup in failed, line=%d\n", __LINE__);
+			free(a_string_tok);
+			free(v_string_tok);
+			return 1;
+		}
+		v_title = strtok(v_item_tok, "=");
+		debug("%s: <v_title>: %s\n", __func__, v_title);
+
+		/* For every a_item, search its title */
+		for (i = 0; i < ARGS_ITEM_NUM && a_items[i]; i++) {
+			a_item = a_items[i];
+			/* Malloc a temporary a_item for strtok */
+			a_item_tok = strdup(a_item);
+			if (!a_item_tok) {
+				printf("Error: strdup in failed, line=%d\n", __LINE__);
+				free(a_string_tok);
+				free(v_string_tok);
+				free(v_item_tok);
+				return 1;
+			}
+
+			a_title = strtok(a_item_tok, "=");
+			debug("%s: [a_title]: %s\n", __func__, a_title);
+			if (!strcmp(a_title, v_title)) {
+				/* Find! replace it */
+				env_replace(varname, a_item, v_item);
+				free(a_item_tok);
+				match = true;
+				break;
+			}
+			free(a_item_tok);
+		}
+
+		/* Not find, just append */
+		if (!match)
+			env_append(varname, v_item);
+
+		match = false;
+		free(v_item_tok);
+	}
+
+	free(v_string_tok);
+	free(a_string_tok);
+
+	return 0;
+}
+
 /**
  * Set an environment variable to an integer value
  *
diff --git a/include/common.h b/include/common.h
index aaed131671..0f386e9db2 100644
--- a/include/common.h
+++ b/include/common.h
@@ -378,6 +378,17 @@ int env_get_yesno(const char *var);
  */
 int env_set(const char *varname, const char *value);
 
+/**
+ * env_update() - update sub value of an environment variable
+ *
+ * This add/append/replace the sub value of an environment variable.
+ *
+ * @varname: Variable to adjust
+ * @valude: Value to append/replace
+ * @return 0 if OK, 1 on error
+ */
+int env_update(const char *varname, char *varvalue);
+
 /**
  * env_set_ulong() - set an environment variable to an integer
  *

commit fafee76a04ce54858faf55967c02ae62396a493b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Oct 10 14:45:54 2017 +0800

    rockchip: rk3128: enable fifo-mode for emmc
    
    rk3128 dwmmc controller do not have internal DMA, since we don't
    support external DMA for mmc driver now, we need enable fifo-mode
    in dts.
    
    Change-Id: Ibec30cde8d2d419a5f1db59b60aa7dc1fd6c3c9c
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3128-evb.dts b/arch/arm/dts/rk3128-evb.dts
index 5ef51c9b79..321e9004bd 100644
--- a/arch/arm/dts/rk3128-evb.dts
+++ b/arch/arm/dts/rk3128-evb.dts
@@ -59,6 +59,7 @@
 };
 
 &emmc {
+	fifo-mode;
 	status = "okay";
 };
 

commit b9e63a962a36aac486c684be5f240a53cc85d44a
Author: Mark Yao <mark.yao@rock-chips.com>
Date:   Fri Sep 15 15:01:09 2017 +0800

    edid: support decode edid to drm modes
    
    Change-Id: I38f82586d81177a4e6f5c20815af5480b40d2ff8
    Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

diff --git a/common/edid.c b/common/edid.c
index 3d0809ad11..9de7e2f92d 100644
--- a/common/edid.c
+++ b/common/edid.c
@@ -16,6 +16,7 @@
 #include <fdtdec.h>
 #include <linux/ctype.h>
 #include <linux/string.h>
+#include <drm_modes.h>
 
 int edid_check_info(struct edid1_info *edid_info)
 {
@@ -136,6 +137,62 @@ static void decode_timing(u8 *buf, struct display_timing *timing)
 	      va + vbl, vborder);
 }
 
+/**
+ * decode_mode() - Decoding an 18-byte detailed timing record
+ *
+ * @buf:	Pointer to EDID detailed timing record
+ * @timing:	Place to put timing
+ */
+static void decode_mode(u8 *buf, struct drm_display_mode *mode)
+{
+	uint x_mm, y_mm;
+	unsigned int ha, hbl, hso, hspw, hborder;
+	unsigned int va, vbl, vso, vspw, vborder;
+	struct edid_detailed_timing *t = (struct edid_detailed_timing *)buf;
+
+	x_mm = (buf[12] + ((buf[14] & 0xf0) << 4));
+	y_mm = (buf[13] + ((buf[14] & 0x0f) << 8));
+	ha = (buf[2] + ((buf[4] & 0xf0) << 4));
+	hbl = (buf[3] + ((buf[4] & 0x0f) << 8));
+	hso = (buf[8] + ((buf[11] & 0xc0) << 2));
+	hspw = (buf[9] + ((buf[11] & 0x30) << 4));
+	hborder = buf[15];
+	va = (buf[5] + ((buf[7] & 0xf0) << 4));
+	vbl = (buf[6] + ((buf[7] & 0x0f) << 8));
+	vso = ((buf[10] >> 4) + ((buf[11] & 0x0c) << 2));
+	vspw = ((buf[10] & 0x0f) + ((buf[11] & 0x03) << 4));
+	vborder = buf[16];
+
+	/* Edid contains pixel clock in terms of 10KHz */
+	mode->clock = (buf[0] + (buf[1] << 8)) * 10;
+	mode->hdisplay = ha;
+	mode->hsync_start = ha + hso;
+	mode->hsync_end = ha + hso + hspw;
+	mode->htotal = ha + hbl;
+	mode->vdisplay = va;
+	mode->vsync_start = va + vso;
+	mode->vsync_end = va + vso + vspw;
+	mode->vtotal = va + vbl;
+
+	mode->flags = EDID_DETAILED_TIMING_FLAG_HSYNC_POLARITY(*t) ?
+		DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
+	mode->flags |= EDID_DETAILED_TIMING_FLAG_VSYNC_POLARITY(*t) ?
+		DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
+
+	if (EDID_DETAILED_TIMING_FLAG_HSYNC_POLARITY(*t))
+		mode->flags |= DRM_MODE_FLAG_INTERLACE;
+
+	debug("Detailed mode clock %u kHz, %d mm x %d mm, flags[%x]\n"
+	      "     %04d %04d %04d %04d hborder %d\n"
+	      "     %04d %04d %04d %04d vborder %d\n",
+	      mode->clock,
+	      x_mm, y_mm, mode->flags,
+	      mode->hdisplay, mode->hsync_start, mode->hsync_end,
+	      mode->htotal, hborder,
+	      mode->vdisplay, mode->vsync_start, mode->vsync_end,
+	      mode->vtotal, vborder);
+}
+
 /**
  * Check if HDMI vendor specific data block is present in CEA block
  * @param info	CEA extension block
@@ -169,6 +226,54 @@ static bool cea_is_hdmi_vsdb_present(struct edid_cea861_info *info)
 	return false;
 }
 
+int edid_get_drm_mode(u8 *buf, int buf_size, struct drm_display_mode *mode,
+		      int *panel_bits_per_colourp)
+{
+	struct edid1_info *edid = (struct edid1_info *)buf;
+	bool timing_done;
+	int i;
+
+	if (buf_size < sizeof(*edid) || edid_check_info(edid)) {
+		debug("%s: Invalid buffer\n", __func__);
+		return -EINVAL;
+	}
+
+	if (!EDID1_INFO_FEATURE_PREFERRED_TIMING_MODE(*edid)) {
+		debug("%s: No preferred timing\n", __func__);
+		return -ENOENT;
+	}
+
+	/* Look for detailed timing */
+	timing_done = false;
+	for (i = 0; i < 4; i++) {
+		struct edid_monitor_descriptor *desc;
+
+		desc = &edid->monitor_details.descriptor[i];
+		if (desc->zero_flag_1 != 0) {
+			decode_mode((u8 *)desc, mode);
+			timing_done = true;
+			break;
+		}
+	}
+	if (!timing_done)
+		return -EINVAL;
+
+	if (!EDID1_INFO_VIDEO_INPUT_DIGITAL(*edid)) {
+		debug("%s: Not a digital display\n", __func__);
+		return -ENOSYS;
+	}
+	if (edid->version != 1 || edid->revision < 4) {
+		debug("%s: EDID version %d.%d does not have required info\n",
+		      __func__, edid->version, edid->revision);
+		*panel_bits_per_colourp = -1;
+	} else  {
+		*panel_bits_per_colourp =
+			((edid->video_input_definition & 0x70) >> 3) + 4;
+	}
+
+	return 0;
+}
+
 int edid_get_timing(u8 *buf, int buf_size, struct display_timing *timing,
 		    int *panel_bits_per_colourp)
 {
@@ -226,6 +331,7 @@ int edid_get_timing(u8 *buf, int buf_size, struct display_timing *timing,
 	return 0;
 }
 
+
 /**
  * Snip the tailing whitespace/return of a string.
  *
diff --git a/include/drm_modes.h b/include/drm_modes.h
new file mode 100644
index 0000000000..6e9121a0c8
--- /dev/null
+++ b/include/drm_modes.h
@@ -0,0 +1,67 @@
+/*
+ * (C) Copyright 2008-2016 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _DRM_MODES_H
+#define _DRM_MODES_H
+
+/* Video mode flags */
+/* bit compatible with the xorg definitions. */
+#define DRM_MODE_FLAG_PHSYNC			(1 << 0)
+#define DRM_MODE_FLAG_NHSYNC			(1 << 1)
+#define DRM_MODE_FLAG_PVSYNC			(1 << 2)
+#define DRM_MODE_FLAG_NVSYNC			(1 << 3)
+#define DRM_MODE_FLAG_INTERLACE			(1 << 4)
+#define DRM_MODE_FLAG_DBLSCAN			(1 << 5)
+#define DRM_MODE_FLAG_CSYNC			(1 << 6)
+#define DRM_MODE_FLAG_PCSYNC			(1 << 7)
+#define DRM_MODE_FLAG_NCSYNC			(1 << 8)
+#define DRM_MODE_FLAG_HSKEW			(1 << 9) /* hskew provided */
+#define DRM_MODE_FLAG_BCAST			(1 << 10)
+#define DRM_MODE_FLAG_PIXMUX			(1 << 11)
+#define DRM_MODE_FLAG_DBLCLK			(1 << 12)
+#define DRM_MODE_FLAG_CLKDIV2			(1 << 13)
+
+#define DRM_MODE_CONNECTOR_Unknown	0
+#define DRM_MODE_CONNECTOR_VGA		1
+#define DRM_MODE_CONNECTOR_DVII		2
+#define DRM_MODE_CONNECTOR_DVID		3
+#define DRM_MODE_CONNECTOR_DVIA		4
+#define DRM_MODE_CONNECTOR_Composite	5
+#define DRM_MODE_CONNECTOR_SVIDEO	6
+#define DRM_MODE_CONNECTOR_LVDS		7
+#define DRM_MODE_CONNECTOR_Component	8
+#define DRM_MODE_CONNECTOR_9PinDIN	9
+#define DRM_MODE_CONNECTOR_DisplayPort	10
+#define DRM_MODE_CONNECTOR_HDMIA	11
+#define DRM_MODE_CONNECTOR_HDMIB	12
+#define DRM_MODE_CONNECTOR_TV		13
+#define DRM_MODE_CONNECTOR_eDP		14
+#define DRM_MODE_CONNECTOR_VIRTUAL      15
+#define DRM_MODE_CONNECTOR_DSI		16
+
+#define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1)
+#define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2)
+#define DRM_EDID_PT_SEPARATE_SYNC  (3 << 3)
+#define DRM_EDID_PT_STEREO         (1 << 5)
+#define DRM_EDID_PT_INTERLACED     (1 << 7)
+
+struct drm_display_mode {
+	/* Proposed mode values */
+	int clock;		/* in kHz */
+	int hdisplay;
+	int hsync_start;
+	int hsync_end;
+	int htotal;
+	int vdisplay;
+	int vsync_start;
+	int vsync_end;
+	int vtotal;
+	int vrefresh;
+	int vscan;
+	unsigned int flags;
+};
+
+#endif
diff --git a/include/edid.h b/include/edid.h
index a9f2f3d3ab..9f3276c080 100644
--- a/include/edid.h
+++ b/include/edid.h
@@ -305,6 +305,7 @@ int edid_get_ranges(struct edid1_info *edid, unsigned int *hmin,
 		    unsigned int *hmax, unsigned int *vmin,
 		    unsigned int *vmax);
 
+struct drm_display_mode;
 struct display_timing;
 
 /**
@@ -320,5 +321,7 @@ struct display_timing;
  */
 int edid_get_timing(u8 *buf, int buf_size, struct display_timing *timing,
 		    int *panel_bits_per_colourp);
+int edid_get_drm_mode(u8 *buf, int buf_size, struct drm_display_mode *mode,
+		      int *panel_bits_per_colourp);
 
 #endif /* __EDID_H_ */

commit d807358c867e6c2ce845161c70097719e754c33a
Author: cwz <cwz@rock-chips.com>
Date:   Tue Mar 17 16:59:02 2015 +0800

    libfdt: add api fdt_node_offset_by_phandle_node() find node with phandle and start node.
    
    Change-Id: I3d7c710367005510ed936e75863f9d3685cb4bc5
    Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
    Signed-off-by: cwz <cwz@rock-chips.com>

diff --git a/lib/libfdt/fdt_ro.c b/lib/libfdt/fdt_ro.c
index 9994d17e56..49c3cddc6f 100755
--- a/lib/libfdt/fdt_ro.c
+++ b/lib/libfdt/fdt_ro.c
@@ -526,6 +526,29 @@ int fdt_node_offset_by_phandle(const void *fdt, uint32_t phandle)
 	return offset; /* error from fdt_next_node() */
 }
 
+int fdt_node_offset_by_phandle_node(const void *fdt, int node, uint32_t phandle)
+{
+	int offset;
+
+	if ((phandle == 0) || (phandle == -1) || (node < 0))
+		return -FDT_ERR_BADPHANDLE;
+
+	FDT_CHECK_HEADER(fdt);
+
+	offset = node;
+	if (fdt_get_phandle(fdt, offset) == phandle)
+		return offset;
+
+	for (offset = fdt_next_node(fdt, offset, NULL);
+	     offset >= 0;
+	     offset = fdt_next_node(fdt, offset, NULL)) {
+		if (fdt_get_phandle(fdt, offset) == phandle)
+			return offset;
+	}
+
+	return offset; /* error from fdt_next_node() */
+}
+
 int fdt_stringlist_contains(const char *strlist, int listlen, const char *str)
 {
 	int len = strlen(str);
diff --git a/lib/libfdt/libfdt.h b/lib/libfdt/libfdt.h
index 210bc855e9..cb533f4275 100644
--- a/lib/libfdt/libfdt.h
+++ b/lib/libfdt/libfdt.h
@@ -2166,6 +2166,27 @@ int fdt_next_region(const void *fdt,
 int fdt_add_alias_regions(const void *fdt, struct fdt_region *region, int count,
 			  int max_regions, struct fdt_region_state *info);
 int fdt_device_is_available(const void *blob, int node);
+/**
+ * fdt_node_offset_by_phandle_node - find the node with a given phandle and node
+ * @fdt: pointer to the device tree blob
+ * @phandle: phandle value
+ * @node: start node value
+ *
+ * fdt_node_offset_by_phandle_node() returns the offset of the node
+ * which has the given phandle value.  If there is more than one node
+ * in the tree with the given phandle (an invalid tree), results are
+ * undefined.
+ *
+ * returns:
+ *	structure block offset of the located node (>= 0), on success
+ *	-FDT_ERR_NOTFOUND, no node with that phandle exists
+ *	-FDT_ERR_BADPHANDLE, given phandle value was invalid (0 or -1)
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE, standard meanings
+ */
+int fdt_node_offset_by_phandle_node(const void *fdt, int node, uint32_t phandle);
 #endif /* SWIG */
 
 #endif /* _LIBFDT_H */

commit f82d121178c3f14d3846d92fe8d998c105d9e299
Author: yxj <yxj@rock-chips.com>
Date:   Thu Jun 19 16:11:24 2014 +0800

    libfdt: add function  fdt_device_is_available
    
    Change-Id: Ia6c727e246339107c280f715d0e35edd54ce6dc3
    Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
    Signed-off-by: yxj <yxj@rock-chips.com>

diff --git a/include/libfdt.h b/include/libfdt.h
old mode 100644
new mode 100755
diff --git a/lib/libfdt/fdt_ro.c b/lib/libfdt/fdt_ro.c
old mode 100644
new mode 100755
index 1be9538fd2..9994d17e56
--- a/lib/libfdt/fdt_ro.c
+++ b/lib/libfdt/fdt_ro.c
@@ -680,3 +680,26 @@ int fdt_node_offset_by_compatible(const void *fdt, int startoffset,
 
 	return offset; /* error from fdt_next_node() */
 }
+
+
+/**
+ *  of_device_is_available - check if a device is available for use
+ *
+ *  @device: Node to check for availability
+ *
+ *  Returns 1 if the status property is absent or set to "okay" or "ok",
+ *  0 otherwise
+ */
+int fdt_device_is_available(const void *blob, int node)
+{
+	const char *cell;
+	cell = fdt_getprop(blob, node, "status", NULL);
+	if (cell) {
+		if (!strcmp(cell, "okay") || !strcmp(cell, "ok"))
+			return 1;
+	} else {
+		return 1;
+	}
+	return 0;
+}
+
diff --git a/lib/libfdt/libfdt.h b/lib/libfdt/libfdt.h
index 6af94cb3f7..210bc855e9 100644
--- a/lib/libfdt/libfdt.h
+++ b/lib/libfdt/libfdt.h
@@ -2165,6 +2165,7 @@ int fdt_next_region(const void *fdt,
  */
 int fdt_add_alias_regions(const void *fdt, struct fdt_region *region, int count,
 			  int max_regions, struct fdt_region_state *info);
+int fdt_device_is_available(const void *blob, int node);
 #endif /* SWIG */
 
 #endif /* _LIBFDT_H */

commit d4bafcc8339af546de6330fc50662705732bdbef
Author: Mark Yao <mark.yao@rock-chips.com>
Date:   Mon Sep 4 10:41:16 2017 +0800

    video: do video_sync with lcdputs
    
    Change-Id: I7d239c86b314e693bf97ec25cbab3e6b132b4fc3
    Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

diff --git a/drivers/video/vidconsole-uclass.c b/drivers/video/vidconsole-uclass.c
index b5afd72227..53f4eddd42 100644
--- a/drivers/video/vidconsole-uclass.c
+++ b/drivers/video/vidconsole-uclass.c
@@ -259,6 +259,7 @@ static int do_video_puts(cmd_tbl_t *cmdtp, int flag, int argc,
 		return CMD_RET_FAILURE;
 	for (s = argv[1]; *s; s++)
 		vidconsole_put_char(dev, *s);
+	video_sync(dev->parent);
 
 	return 0;
 }

commit 4cfbff4dd7dc025503963f2ffc7ba2f8db9e5452
Author: Mark Yao <mark.yao@rock-chips.com>
Date:   Mon Sep 4 10:37:50 2017 +0800

    rockchip: rk3399: default enable vidconsole display
    
    Change-Id: I934ed8c2fe579d800e0287ba680c2490641bf743
    Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

diff --git a/include/configs/evb_rk3399.h b/include/configs/evb_rk3399.h
index cab940e7c0..e9143c92db 100644
--- a/include/configs/evb_rk3399.h
+++ b/include/configs/evb_rk3399.h
@@ -24,4 +24,8 @@
 #define CONFIG_SERIAL_TAG
 #define CONFIG_ENV_OVERWRITE
 
+#define ROCKCHIP_DEVICE_SETTINGS \
+		"stdout=serial,vidconsole\0" \
+		"stderr=serial,vidconsole\0"
+
 #endif
diff --git a/include/configs/puma_rk3399.h b/include/configs/puma_rk3399.h
index e481a28ae9..7fe47e0d84 100644
--- a/include/configs/puma_rk3399.h
+++ b/include/configs/puma_rk3399.h
@@ -29,4 +29,8 @@
 #define CONFIG_BMP_24BPP
 #define CONFIG_BMP_32BPP
 
+#define ROCKCHIP_DEVICE_SETTINGS \
+		"stdout=serial,vidconsole\0" \
+		"stderr=serial,vidconsole\0"
+
 #endif
diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index eda6ed7071..377d1fc769 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -72,6 +72,7 @@
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	ENV_MEM_LAYOUT_SETTINGS \
 	"partitions=" PARTS_DEFAULT \
+	ROCKCHIP_DEVICE_SETTINGS \
 	BOOTENV
 
 #endif

commit f04b6e2961435a7fe118946317661d017d9b1ccc
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Sep 28 18:20:43 2017 +0800

    rockchip: rk322x: fix pd_bus hclk/pclk
    
    The pd_bus hclk/pclk source is pd_bus aclk, not the PLL.
    
    Change-Id: I3e83f05f6b5423decb264f917adc91c6b40a6e46
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c
index 6bbfde47f8..9e7e047a4e 100644
--- a/drivers/clk/rockchip/clk_rk322x.c
+++ b/drivers/clk/rockchip/clk_rk322x.c
@@ -117,16 +117,16 @@ static void rkclk_init(struct rk322x_cru *cru)
 		     pclk_div << CORE_PERI_DIV_SHIFT);
 
 	/*
-	 * select apll as pd_bus bus clock source and
+	 * select gpll as pd_bus bus clock source and
 	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
 	 */
 	aclk_div = GPLL_HZ / BUS_ACLK_HZ - 1;
 	assert((aclk_div + 1) * BUS_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
 
-	pclk_div = GPLL_HZ / BUS_PCLK_HZ - 1;
+	pclk_div = BUS_ACLK_HZ / BUS_PCLK_HZ - 1;
 	assert((pclk_div + 1) * BUS_PCLK_HZ == GPLL_HZ && pclk_div <= 0x7);
 
-	hclk_div = GPLL_HZ / BUS_HCLK_HZ - 1;
+	hclk_div = BUS_ACLK_HZ / BUS_HCLK_HZ - 1;
 	assert((hclk_div + 1) * BUS_HCLK_HZ == GPLL_HZ && hclk_div <= 0x3);
 
 	rk_clrsetreg(&cru->cru_clksel_con[0],

commit 7e8f60663f0eae1cbf443a722bb837749a45637a
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 27 17:53:24 2017 +0800

    rockchip: rk3128: add sdram driver
    
    RK3128 support up to 2GB DDR3 sdram, one channel, 32bit data width.
    
    This patch is only used for U-Boot, but not for SPL which will
    comes later, maybe after we merge all the common code into a common
    file.
    
    Cover-letter:
    rockchip: add new SoC support for RK3128
    
    RK3128 is a quad-core ARM Cortex-A7 SoC, this patch set add basic
    support for it, it does not support SPL/TPL now, and the sdram driver
    only support get dram size from sysreg in U-Boot stage. Most of basic
    driver like clock, pinctrl, sysreset have been implement, and more
    drivers like mac and display will be later.
    
    END
    
    Change-Id: I8756d6acf7b085e25edb8c6f3e56b7bc8a33353c
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index 45b5fe7247..1a1e5578ca 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -5,6 +5,7 @@
 #
 
 obj-$(CONFIG_ROCKCHIP_RK3368) = dmc-rk3368.o
+obj-$(CONFIG_ROCKCHIP_RK3128) = sdram_rk3128.o
 obj-$(CONFIG_ROCKCHIP_RK3188) = sdram_rk3188.o
 obj-$(CONFIG_ROCKCHIP_RK322X) = sdram_rk322x.o
 obj-$(CONFIG_ROCKCHIP_RK3288) = sdram_rk3288.o
diff --git a/drivers/ram/rockchip/sdram_rk3128.c b/drivers/ram/rockchip/sdram_rk3128.c
new file mode 100644
index 0000000000..04ad2bbb8c
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_rk3128.c
@@ -0,0 +1,60 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:     GPL-2.0
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <ram.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/grf_rk3128.h>
+#include <asm/arch/sdram_common.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+struct dram_info {
+	struct ram_info info;
+	struct rk3128_grf *grf;
+};
+
+static int rk3128_dmc_probe(struct udevice *dev)
+{
+	struct dram_info *priv = dev_get_priv(dev);
+
+	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	printf("%s: grf=%p\n", __func__, priv->grf);
+	priv->info.base = CONFIG_SYS_SDRAM_BASE;
+	priv->info.size = rockchip_sdram_size(
+				(phys_addr_t)&priv->grf->os_reg[1]);
+
+	return 0;
+}
+
+static int rk3128_dmc_get_info(struct udevice *dev, struct ram_info *info)
+{
+	struct dram_info *priv = dev_get_priv(dev);
+
+	*info = priv->info;
+
+	return 0;
+}
+
+static struct ram_ops rk3128_dmc_ops = {
+	.get_info = rk3128_dmc_get_info,
+};
+
+
+static const struct udevice_id rk3128_dmc_ids[] = {
+	{ .compatible = "rockchip,rk3128-dmc" },
+	{ }
+};
+
+U_BOOT_DRIVER(dmc_rk3128) = {
+	.name = "rockchip_rk3128_dmc",
+	.id = UCLASS_RAM,
+	.of_match = rk3128_dmc_ids,
+	.ops = &rk3128_dmc_ops,
+	.probe = rk3128_dmc_probe,
+	.priv_auto_alloc_size = sizeof(struct dram_info),
+};

commit 8286a720ace5164e821495eefcaf66fedddd5a6b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Mar 10 15:21:00 2017 +0800

    rockchip: rk3128: add defconfig for evb-rk3128
    
    Enable board config for evb-rk3128.
    Serial output and eMMC works in this version.
    
    Change-Id: I010fcdef35b745d6a93558a9382e4d020576eeeb
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3128_defconfig b/configs/evb-rk3128_defconfig
new file mode 100644
index 0000000000..e704305698
--- /dev/null
+++ b/configs/evb-rk3128_defconfig
@@ -0,0 +1,42 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_ROCKCHIP_RK3128=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3128-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_FASTBOOT_BUF_ADDR=0x60800800
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_ROCKCHIP_RK3128=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_RAM=y
+CONFIG_DEBUG_UART_BASE=0x20068000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x310c
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_ERRNO_STR=y

commit 5e5397cbae97f271b8119bf17091641291066f67
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Mar 10 15:19:49 2017 +0800

    rockchip: rk3128: add evb-rk3128 support
    
    evb-rk3128 is an evb from Rockchip based on rk3128 SoC:
    - 2 USB2.0 Host port;
    - 1 HDMI port;
    - 2 10/100M eth port;
    - 2GB ddr;
    - 16GB eMMC;
    - UART to USB debug port;
    
    Change-Id: Icfc8b74449678e0e2488f7bf394ec217e52c15b6
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3128/Kconfig b/arch/arm/mach-rockchip/rk3128/Kconfig
index e69de29bb2..a6e8722daf 100644
--- a/arch/arm/mach-rockchip/rk3128/Kconfig
+++ b/arch/arm/mach-rockchip/rk3128/Kconfig
@@ -0,0 +1,23 @@
+if ROCKCHIP_RK3128
+
+choice
+	prompt "RK3128 board select"
+
+config TARGET_EVB_RK3128
+	bool "RK3128 evaluation board"
+	help
+	  RK3128evb is a evaluation board for Rockchip rk3128,
+	  with full function and phisical connectors support like
+	  usb2.0 host ports, LVDS, JTAG, MAC, SDcard, HDMI, USB-2-serial...
+
+endchoice
+
+config SYS_SOC
+	default "rockchip"
+
+config SYS_MALLOC_F_LEN
+	default 0x0800
+
+source "board/rockchip/evb_rk3128/Kconfig"
+
+endif
diff --git a/board/rockchip/evb_rk3128/Kconfig b/board/rockchip/evb_rk3128/Kconfig
new file mode 100644
index 0000000000..5b3095ade9
--- /dev/null
+++ b/board/rockchip/evb_rk3128/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_EVB_RK3128
+
+config SYS_BOARD
+	default "evb_rk3128"
+
+config SYS_VENDOR
+	default "rockchip"
+
+config SYS_CONFIG_NAME
+	default "evb_rk3128"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+
+endif
diff --git a/board/rockchip/evb_rk3128/MAINTAINERS b/board/rockchip/evb_rk3128/MAINTAINERS
new file mode 100644
index 0000000000..f5145d1f04
--- /dev/null
+++ b/board/rockchip/evb_rk3128/MAINTAINERS
@@ -0,0 +1,6 @@
+EVB-RK3128
+M:      Kever Yang <kever.yang@rock-chips.com>
+S:      Maintained
+F:      board/rockchip/evb_rk3128
+F:      include/configs/evb_rk3128.h
+F:      configs/evb-rk3128_defconfig
diff --git a/board/rockchip/evb_rk3128/Makefile b/board/rockchip/evb_rk3128/Makefile
new file mode 100644
index 0000000000..6040891075
--- /dev/null
+++ b/board/rockchip/evb_rk3128/Makefile
@@ -0,0 +1,7 @@
+#
+# (C) Copyright 2017 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y	+= evb-rk3128.o
diff --git a/board/rockchip/evb_rk3128/evb-rk3128.c b/board/rockchip/evb_rk3128/evb-rk3128.c
new file mode 100644
index 0000000000..bf36e25a7c
--- /dev/null
+++ b/board/rockchip/evb_rk3128/evb-rk3128.c
@@ -0,0 +1,9 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+
+DECLARE_GLOBAL_DATA_PTR;
diff --git a/include/configs/evb_rk3128.h b/include/configs/evb_rk3128.h
new file mode 100644
index 0000000000..f60e22c80a
--- /dev/null
+++ b/include/configs/evb_rk3128.h
@@ -0,0 +1,23 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __EVB_RK3128_H
+#define __EVB_RK3128_H
+
+#include <configs/rk3128_common.h>
+
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SYS_MMC_ENV_DEV 1
+/*
+ * SPL @ 32k for ~36k
+ * ENV @ 96k
+ * u-boot @ 128K
+ */
+#define CONFIG_ENV_OFFSET (96 * 1024)
+
+#define CONFIG_CONSOLE_SCROLL_LINES		10
+
+#endif

commit 65217512a6ba041e9f74f8994135f57133943af5
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Mar 10 14:48:15 2017 +0800

    rockchip: rk3128: add sysreset driver
    
    Add rk3128 sysreset driver.
    
    Change-Id: I69e0aa7e8ea7f8ef98a097d037d755b52a724844
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
index ce161a7165..e3a0ab1718 100644
--- a/drivers/sysreset/Makefile
+++ b/drivers/sysreset/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_SYSRESET_WATCHDOG) += sysreset_watchdog.o
 ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_ROCKCHIP_RK3036) += sysreset_rk3036.o
 endif
+obj-$(CONFIG_ROCKCHIP_RK3128) += sysreset_rk3128.o
 obj-$(CONFIG_ROCKCHIP_RK3188) += sysreset_rk3188.o
 obj-$(CONFIG_ROCKCHIP_RK322X) += sysreset_rk322x.o
 obj-$(CONFIG_ROCKCHIP_RK3288) += sysreset_rk3288.o
diff --git a/drivers/sysreset/sysreset_rk3128.c b/drivers/sysreset/sysreset_rk3128.c
new file mode 100644
index 0000000000..5aab8ec50b
--- /dev/null
+++ b/drivers/sysreset/sysreset_rk3128.c
@@ -0,0 +1,45 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <sysreset.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk3128.h>
+#include <asm/arch/hardware.h>
+#include <linux/err.h>
+
+int rk3128_sysreset_request(struct udevice *dev, enum sysreset_t type)
+{
+	struct rk3128_cru *cru = rockchip_get_cru();
+
+	if (IS_ERR(cru))
+		return PTR_ERR(cru);
+	switch (type) {
+	case SYSRESET_WARM:
+		writel(0xeca8, &cru->cru_glb_srst_snd_value);
+		break;
+	case SYSRESET_COLD:
+		writel(0xfdb9, &cru->cru_glb_srst_fst_value);
+		break;
+	default:
+		return -EPROTONOSUPPORT;
+	}
+
+	return -EINPROGRESS;
+}
+
+static struct sysreset_ops rk3128_sysreset = {
+	.request	= rk3128_sysreset_request,
+};
+
+U_BOOT_DRIVER(sysreset_rk3128) = {
+	.name	= "rk3128_sysreset",
+	.id	= UCLASS_SYSRESET,
+	.ops	= &rk3128_sysreset,
+};

commit 2241bfd6de8c7d3c6a1aef886b4bba71cae89060
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Mar 10 14:40:33 2017 +0800

    rockchip: rk3128: add pinctrl driver
    
    Add rk3128 pinctrl driver and grf/iomux structure definition.
    
    Change-Id: I0bf2f29fc28274f3d7a67beeacdb4f5a57210ba5
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3128.h b/arch/arm/include/asm/arch-rockchip/grf_rk3128.h
new file mode 100644
index 0000000000..5da6cd2351
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3128.h
@@ -0,0 +1,551 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#ifndef _ASM_ARCH_GRF_RK3128_H
+#define _ASM_ARCH_GRF_RK3128_H
+
+#include <common.h>
+
+struct rk3128_grf {
+	unsigned int reserved[0x2a];
+	unsigned int gpio0a_iomux;
+	unsigned int gpio0b_iomux;
+	unsigned int gpio0c_iomux;
+	unsigned int gpio0d_iomux;
+	unsigned int gpio1a_iomux;
+	unsigned int gpio1b_iomux;
+	unsigned int gpio1c_iomux;
+	unsigned int gpio1d_iomux;
+	unsigned int gpio2a_iomux;
+	unsigned int gpio2b_iomux;
+	unsigned int gpio2c_iomux;
+	unsigned int gpio2d_iomux;
+	unsigned int gpio3a_iomux;
+	unsigned int gpio3b_iomux;
+	unsigned int gpio3c_iomux;
+	unsigned int gpio3d_iomux;
+	unsigned int gpio2c_iomux2;
+	unsigned int grf_cif_iomux;
+	unsigned int grf_cif_iomux1;
+	unsigned int reserved1[(0x118 - 0xf0) / 4 - 1];
+	unsigned int gpio0l_pull;
+	unsigned int gpio0h_pull;
+	unsigned int gpio1l_pull;
+	unsigned int gpio1h_pull;
+	unsigned int gpio2l_pull;
+	unsigned int gpio2h_pull;
+	unsigned int gpio3l_pull;
+	unsigned int gpio3h_pull;
+	unsigned int reserved2;
+	unsigned int soc_con0;
+	unsigned int soc_con1;
+	unsigned int soc_con2;
+	unsigned int soc_status0;
+	unsigned int reserved3[6];
+	unsigned int mac_con0;
+	unsigned int mac_con1;
+	unsigned int reserved4[4];
+	unsigned int uoc0_con0;
+	unsigned int reserved5;
+	unsigned int uoc1_con1;
+	unsigned int uoc1_con2;
+	unsigned int uoc1_con3;
+	unsigned int uoc1_con4;
+	unsigned int uoc1_con5;
+	unsigned int reserved6;
+	unsigned int ddrc_stat;
+	unsigned int reserved9;
+	unsigned int soc_status1;
+	unsigned int cpu_con0;
+	unsigned int cpu_con1;
+	unsigned int cpu_con2;
+	unsigned int cpu_con3;
+	unsigned int reserved10;
+	unsigned int reserved11;
+	unsigned int cpu_status0;
+	unsigned int cpu_status1;
+	unsigned int os_reg[8];
+	unsigned int reserved12[(0x280 - 0x1e4) / 4 - 1];
+	unsigned int usbphy0_con[8];
+	unsigned int usbphy1_con[8];
+	unsigned int uoc_status0;
+	unsigned int reserved13[(0x300 - 0x2c0) / 4 - 1];
+	unsigned int chip_tag;
+	unsigned int sdmmc_det_cnt;
+};
+check_member(rk3128_grf, sdmmc_det_cnt, 0x304);
+
+struct rk3128_pmu {
+	unsigned int wakeup_cfg;
+	unsigned int pwrdn_con;
+	unsigned int pwrdn_st;
+	unsigned int idle_req;
+	unsigned int idle_st;
+	unsigned int pwrmode_con;
+	unsigned int pwr_state;
+	unsigned int osc_cnt;
+	unsigned int core_pwrdwn_cnt;
+	unsigned int core_pwrup_cnt;
+	unsigned int sft_con;
+	unsigned int ddr_sref_st;
+	unsigned int int_con;
+	unsigned int int_st;
+	unsigned int sys_reg[4];
+};
+check_member(rk3128_pmu, int_st, 0x34);
+
+/* GRF_GPIO0A_IOMUX */
+enum {
+	GPIO0A7_SHIFT		= 14,
+	GPIO0A7_MASK		= 3 << GPIO0A7_SHIFT,
+	GPIO0A7_GPIO		= 0,
+	GPIO0A7_I2C3_SDA,
+
+	GPIO0A6_SHIFT		= 12,
+	GPIO0A6_MASK		= 3 << GPIO0A6_SHIFT,
+	GPIO0A6_GPIO		= 0,
+	GPIO0A6_I2C3_SCL,
+
+	GPIO0A3_SHIFT		= 6,
+	GPIO0A3_MASK		= 3 << GPIO0A3_SHIFT,
+	GPIO0A3_GPIO		= 0,
+	GPIO0A3_I2C1_SDA,
+
+	GPIO0A2_SHIFT		= 4,
+	GPIO0A2_MASK		= 1 << GPIO0A2_SHIFT,
+	GPIO0A2_GPIO		= 0,
+	GPIO0A2_I2C1_SCL,
+
+	GPIO0A1_SHIFT		= 2,
+	GPIO0A1_MASK		= 1 << GPIO0A1_SHIFT,
+	GPIO0A1_GPIO		= 0,
+	GPIO0A1_I2C0_SDA,
+
+	GPIO0A0_SHIFT		= 0,
+	GPIO0A0_MASK		= 1 << GPIO0A0_SHIFT,
+	GPIO0A0_GPIO		= 0,
+	GPIO0A0_I2C0_SCL,
+};
+
+/* GRF_GPIO0B_IOMUX */
+enum {
+	GPIO0B6_SHIFT		= 12,
+	GPIO0B6_MASK		= 3 << GPIO0B6_SHIFT,
+	GPIO0B6_GPIO		= 0,
+	GPIO0B6_I2S_SDI,
+	GPIO0B6_SPI_CSN0,
+
+	GPIO0B5_SHIFT		= 10,
+	GPIO0B5_MASK		= 3 << GPIO0B5_SHIFT,
+	GPIO0B5_GPIO		= 0,
+	GPIO0B5_I2S_SDO,
+	GPIO0B5_SPI_RXD,
+
+	GPIO0B4_SHIFT		= 8,
+	GPIO0B4_MASK		= 1 << GPIO0B4_SHIFT,
+	GPIO0B4_GPIO		= 0,
+	GPIO0B4_I2S_LRCKTX,
+
+	GPIO0B3_SHIFT		= 6,
+	GPIO0B3_MASK		= 3 << GPIO0B3_SHIFT,
+	GPIO0B3_GPIO		= 0,
+	GPIO0B3_I2S_LRCKRX,
+	GPIO0B3_SPI_TXD,
+
+	GPIO0B1_SHIFT		= 2,
+	GPIO0B1_MASK		= 3,
+	GPIO0B1_GPIO		= 0,
+	GPIO0B1_I2S_SCLK,
+	GPIO0B1_SPI_CLK,
+
+	GPIO0B0_SHIFT		= 0,
+	GPIO0B0_MASK		= 3,
+	GPIO0B0_GPIO		= 0,
+	GPIO0B0_I2S1_MCLK,
+};
+
+/* GRF_GPIO0D_IOMUX */
+enum {
+	GPIO0D4_SHIFT		= 8,
+	GPIO0D4_MASK		= 1 << GPIO0D4_SHIFT,
+	GPIO0D4_GPIO		= 0,
+	GPIO0D4_PWM2,
+
+	GPIO0D3_SHIFT		= 6,
+	GPIO0D3_MASK		= 1 << GPIO0D3_SHIFT,
+	GPIO0D3_GPIO		= 0,
+	GPIO0D3_PWM1,
+
+	GPIO0D2_SHIFT		= 4,
+	GPIO0D2_MASK		= 1 << GPIO0D2_SHIFT,
+	GPIO0D2_GPIO		= 0,
+	GPIO0D2_PWM0,
+
+	GPIO0D1_SHIFT		= 2,
+	GPIO0D1_MASK		= 1 << GPIO0D1_SHIFT,
+	GPIO0D1_GPIO		= 0,
+	GPIO0D1_UART2_CTSN,
+
+	GPIO0D0_SHIFT		= 0,
+	GPIO0D0_MASK		= 3 << GPIO0D0_SHIFT,
+	GPIO0D0_GPIO		= 0,
+	GPIO0D0_UART2_RTSN,
+	GPIO0D0_PMIC_SLEEP,
+};
+
+/* GRF_GPIO1A_IOMUX */
+enum {
+	GPIO1A5_SHIFT		= 10,
+	GPIO1A5_MASK		= 3 << GPIO1A5_SHIFT,
+	GPIO1A5_GPIO		= 0,
+	GPIO1A5_I2S_SDI,
+	GPIO1A5_SDMMC_DATA3,
+
+	GPIO1A4_SHIFT		= 8,
+	GPIO1A4_MASK		= 3 << GPIO1A4_SHIFT,
+	GPIO1A4_GPIO		= 0,
+	GPIO1A4_I2S_SD0,
+	GPIO1A4_SDMMC_DATA2,
+
+	GPIO1A3_SHIFT		= 6,
+	GPIO1A3_MASK		= 1 << GPIO1A3_SHIFT,
+	GPIO1A3_GPIO		= 0,
+	GPIO1A3_I2S_LRCKTX,
+
+	GPIO1A2_SHIFT		= 4,
+	GPIO1A2_MASK		= 3 << GPIO1A2_SHIFT,
+	GPIO1A2_GPIO		= 0,
+	GPIO1A2_I2S_LRCKRX,
+	GPIO1A2_SDMMC_DATA1,
+
+	GPIO1A1_SHIFT		= 2,
+	GPIO1A1_MASK		= 3 << GPIO1A1_SHIFT,
+	GPIO1A1_GPIO		= 0,
+	GPIO1A1_I2S_SCLK,
+	GPIO1A1_SDMMC_DATA0,
+	GPIO1A1_PMIC_SLEEP,
+
+	GPIO1A0_SHIFT		= 0,
+	GPIO1A0_MASK		= 3,
+	GPIO1A0_GPIO		= 0,
+	GPIO1A0_I2S_MCLK,
+	GPIO1A0_SDMMC_CLKOUT,
+	GPIO1A0_XIN32K,
+
+};
+
+/* GRF_GPIO1B_IOMUX */
+enum {
+	GPIO1B7_SHIFT		= 14,
+	GPIO1B7_MASK		= 1 << GPIO1B7_SHIFT,
+	GPIO1B7_GPIO		= 0,
+	GPIO1B7_MMC0_CMD,
+
+	GPIO1B6_SHIFT		= 12,
+	GPIO1B6_MASK		= 1 << GPIO1B6_SHIFT,
+	GPIO1B6_GPIO		= 0,
+	GPIO1B6_MMC_PWREN,
+
+	GPIO1B2_SHIFT		= 4,
+	GPIO1B2_MASK		= 3 << GPIO1B2_SHIFT,
+	GPIO1B2_GPIO		= 0,
+	GPIO1B2_SPI_RXD,
+	GPIO1B2_UART1_SIN,
+
+	GPIO1B1_SHIFT		= 2,
+	GPIO1B1_MASK		= 3 << GPIO1B1_SHIFT,
+	GPIO1B1_GPIO		= 0,
+	GPIO1B1_SPI_TXD,
+	GPIO1B1_UART1_SOUT,
+
+	GPIO1B0_SHIFT		= 0,
+	GPIO1B0_MASK		= 3 << GPIO1B0_SHIFT,
+	GPIO1B0_GPIO		= 0,
+	GPIO1B0_SPI_CLK,
+	GPIO1B0_UART1_CTSN
+};
+
+/* GRF_GPIO1C_IOMUX */
+enum {
+	GPIO1C6_SHIFT		= 12,
+	GPIO1C6_MASK		= 3 << GPIO1C6_SHIFT,
+	GPIO1C6_GPIO		= 0,
+	GPIO1C6_NAND_CS2,
+	GPIO1C6_EMMC_CMD,
+
+	GPIO1C5_SHIFT		= 10,
+	GPIO1C5_MASK		= 3 << GPIO1C5_SHIFT,
+	GPIO1C5_GPIO		= 0,
+	GPIO1C5_MMC0_D3,
+	GPIO1C5_JTAG_TMS,
+
+	GPIO1C4_SHIFT		= 8,
+	GPIO1C4_MASK		= 3 << GPIO1C4_SHIFT,
+	GPIO1C4_GPIO		= 0,
+	GPIO1C4_MMC0_D2,
+	GPIO1C4_JTAG_TCK,
+
+	GPIO1C3_SHIFT		= 6,
+	GPIO1C3_MASK		= 3 << GPIO1C3_SHIFT,
+	GPIO1C3_GPIO		= 0,
+	GPIO1C3_MMC0_D1,
+	GPIO1C3_UART2_RX,
+
+	GPIO1C2_SHIFT		= 4,
+	GPIO1C2_MASK		= 3 << GPIO1C2_SHIFT ,
+	GPIO1C2_GPIO		= 0,
+	GPIO1C2_MMC0_D0,
+	GPIO1C2_UART2_TX,
+
+	GPIO1C1_SHIFT		= 2,
+	GPIO1C1_MASK		= 1 << GPIO1C1_SHIFT,
+	GPIO1C1_GPIO		= 0,
+	GPIO1C1_MMC0_DETN,
+
+	GPIO1C0_SHIFT		= 0,
+	GPIO1C0_MASK		= 1 << GPIO1C0_SHIFT,
+	GPIO1C0_GPIO		= 0,
+	GPIO1C0_MMC0_CLKOUT,
+};
+
+/* GRF_GPIO1D_IOMUX */
+enum {
+	GPIO1D7_SHIFT		= 14,
+	GPIO1D7_MASK		= 3 << GPIO1D7_SHIFT,
+	GPIO1D7_GPIO		= 0,
+	GPIO1D7_NAND_D7,
+	GPIO1D7_EMMC_D7,
+	GPIO1D7_SPI_CSN1,
+
+	GPIO1D6_SHIFT		= 12,
+	GPIO1D6_MASK		= 3 << GPIO1D6_SHIFT,
+	GPIO1D6_GPIO		= 0,
+	GPIO1D6_NAND_D6,
+	GPIO1D6_EMMC_D6,
+	GPIO1D6_SPI_CSN0,
+
+	GPIO1D5_SHIFT		= 10,
+	GPIO1D5_MASK		= 3 << GPIO1D5_SHIFT,
+	GPIO1D5_GPIO		= 0,
+	GPIO1D5_NAND_D5,
+	GPIO1D5_EMMC_D5,
+	GPIO1D5_SPI_TXD1,
+
+	GPIO1D4_SHIFT		= 8,
+	GPIO1D4_MASK		= 3 << GPIO1D4_SHIFT,
+	GPIO1D4_GPIO		= 0,
+	GPIO1D4_NAND_D4,
+	GPIO1D4_EMMC_D4,
+	GPIO1D4_SPI_RXD1,
+
+	GPIO1D3_SHIFT		= 6,
+	GPIO1D3_MASK		= 3 << GPIO1D3_SHIFT,
+	GPIO1D3_GPIO		= 0,
+	GPIO1D3_NAND_D3,
+	GPIO1D3_EMMC_D3,
+	GPIO1D3_SFC_SIO3,
+
+	GPIO1D2_SHIFT		= 4,
+	GPIO1D2_MASK		= 3 << GPIO1D2_SHIFT,
+	GPIO1D2_GPIO		= 0,
+	GPIO1D2_NAND_D2,
+	GPIO1D2_EMMC_D2,
+	GPIO1D2_SFC_SIO2,
+
+	GPIO1D1_SHIFT		= 2,
+	GPIO1D1_MASK		= 3 << GPIO1D1_SHIFT,
+	GPIO1D1_GPIO		= 0,
+	GPIO1D1_NAND_D1,
+	GPIO1D1_EMMC_D1,
+	GPIO1D1_SFC_SIO1,
+
+	GPIO1D0_SHIFT		= 0,
+	GPIO1D0_MASK		= 3 << GPIO1D0_SHIFT,
+	GPIO1D0_GPIO		= 0,
+	GPIO1D0_NAND_D0,
+	GPIO1D0_EMMC_D0,
+	GPIO1D0_SFC_SIO0,
+};
+
+/* GRF_GPIO2A_IOMUX */
+enum {
+	GPIO2A7_SHIFT		= 14,
+	GPIO2A7_MASK		= 3 << GPIO2A7_SHIFT,
+	GPIO2A7_GPIO		= 0,
+	GPIO2A7_NAND_DQS,
+	GPIO2A7_EMMC_CLKOUT,
+
+	GPIO2A6_SHIFT		= 12,
+	GPIO2A6_MASK		= 1 << GPIO2A6_SHIFT,
+	GPIO2A6_GPIO		= 0,
+	GPIO2A6_NAND_CS0,
+
+	GPIO2A5_SHIFT		= 10,
+	GPIO2A5_MASK		= 3 << GPIO2A5_SHIFT,
+	GPIO2A5_GPIO		= 0,
+	GPIO2A5_NAND_WP,
+	GPIO2A5_EMMC_PWREN,
+
+	GPIO2A4_SHIFT		= 8,
+	GPIO2A4_MASK		= 3 << GPIO2A4_SHIFT,
+	GPIO2A4_GPIO		= 0,
+	GPIO2A4_NAND_RDY,
+	GPIO2A4_EMMC_CMD,
+	GPIO2A3_SFC_CLK,
+
+	GPIO2A3_SHIFT		= 6,
+	GPIO2A3_MASK		= 3 << GPIO2A3_SHIFT,
+	GPIO2A3_GPIO		= 0,
+	GPIO2A3_NAND_RDN,
+	GPIO2A4_SFC_CSN1,
+
+	GPIO2A2_SHIFT		= 4,
+	GPIO2A2_MASK		= 3 << GPIO2A2_SHIFT,
+	GPIO2A2_GPIO		= 0,
+	GPIO2A2_NAND_WRN,
+	GPIO2A4_SFC_CSN0,
+
+	GPIO2A1_SHIFT		= 2,
+	GPIO2A1_MASK		= 3 << GPIO2A1_SHIFT,
+	GPIO2A1_GPIO		= 0,
+	GPIO2A1_NAND_CLE,
+	GPIO2A1_EMMC_CLKOUT,
+
+	GPIO2A0_SHIFT		= 0,
+	GPIO2A0_MASK		= 3 << GPIO2A0_SHIFT,
+	GPIO2A0_GPIO		= 0,
+	GPIO2A0_NAND_ALE,
+	GPIO2A0_SPI_CLK,
+};
+
+/* GRF_GPIO2B_IOMUX */
+enum {
+	GPIO2B7_SHIFT		= 14,
+	GPIO2B7_MASK		= 3 << GPIO2B7_SHIFT,
+	GPIO2B7_GPIO		= 0,
+	GPIO2B7_LCDC0_D13,
+	GPIO2B7_EBC_SDCE5,
+	GPIO2B7_GMAC_RXER,
+
+	GPIO2B6_SHIFT		= 12,
+	GPIO2B6_MASK		= 3 << GPIO2B6_SHIFT,
+	GPIO2B6_GPIO		= 0,
+	GPIO2B6_LCDC0_D12,
+	GPIO2B6_EBC_SDCE4,
+	GPIO2B6_GMAC_CLK,
+
+	GPIO2B5_SHIFT		= 10,
+	GPIO2B5_MASK		= 3 << GPIO2B5_SHIFT,
+	GPIO2B5_GPIO		= 0,
+	GPIO2B5_LCDC0_D11,
+	GPIO2B5_EBC_SDCE3,
+	GPIO2B5_GMAC_TXEN,
+
+	GPIO2B4_SHIFT		= 8,
+	GPIO2B4_MASK		= 3 << GPIO2B4_SHIFT,
+	GPIO2B4_GPIO		= 0,
+	GPIO2B4_LCDC0_D10,
+	GPIO2B4_EBC_SDCE2,
+	GPIO2B4_GMAC_MDIO,
+
+	GPIO2B3_SHIFT		= 6,
+	GPIO2B3_MASK		= 3 << GPIO2B3_SHIFT,
+	GPIO2B3_GPIO		= 0,
+	GPIO2B3_LCDC0_DEN,
+	GPIO2B3_EBC_GDCLK,
+	GPIO2B3_GMAC_RXCLK,
+
+	GPIO2B2_SHIFT		= 4,
+	GPIO2B2_MASK		= 3 << GPIO2B2_SHIFT,
+	GPIO2B2_GPIO		= 0,
+	GPIO2B2_LCDC0_VSYNC,
+	GPIO2B2_EBC_SDOE,
+	GPIO2B2_GMAC_CRS,
+
+	GPIO2B1_SHIFT		= 2,
+	GPIO2B1_MASK		= 3 << GPIO2B1_SHIFT,
+	GPIO2B1_GPIO		= 0,
+	GPIO2B1_LCDC0_HSYNC,
+	GPIO2B1_EBC_SDLE,
+	GPIO2B1_GMAC_TXCLK,
+
+	GPIO2B0_SHIFT		= 0,
+	GPIO2B0_MASK		= 3 << GPIO2B0_SHIFT,
+	GPIO2B0_GPIO		= 0,
+	GPIO2B0_LCDC0_DCLK,
+	GPIO2B0_EBC_SDCLK,
+	GPIO2B0_GMAC_RXDV,
+};
+
+/* GRF_GPIO2C_IOMUX */
+enum {
+	GPIO2C3_SHIFT		= 6,
+	GPIO2C3_MASK		= 3 << GPIO2C3_SHIFT,
+	GPIO2C3_GPIO		= 0,
+	GPIO2C3_LCDC0_D17,
+	GPIO2C3_EBC_GDPWR0,
+	GPIO2C3_GMAC_TXD0,
+
+	GPIO2C2_SHIFT		= 4,
+	GPIO2C2_MASK		= 3 << GPIO2C2_SHIFT,
+	GPIO2C2_GPIO		= 0,
+	GPIO2C2_LCDC0_D16,
+	GPIO2C2_EBC_GDSP,
+	GPIO2C2_GMAC_TXD1,
+
+	GPIO2C1_SHIFT		= 2,
+	GPIO2C1_MASK		= 3 << GPIO2C1_SHIFT,
+	GPIO2C1_GPIO		= 0,
+	GPIO2C1_LCDC0_D15,
+	GPIO2C1_EBC_GDOE,
+	GPIO2C1_GMAC_RXD0,
+
+	GPIO2C0_SHIFT		= 0,
+	GPIO2C0_MASK		= 3 << GPIO2C0_SHIFT,
+	GPIO2C0_GPIO		= 0,
+	GPIO2C0_LCDC0_D14,
+	GPIO2C0_EBC_VCOM,
+	GPIO2C0_GMAC_RXD1,
+};
+
+/* GRF_GPIO2D_IOMUX */
+enum {
+	GPIO2D6_SHIFT		= 12,
+	GPIO2D6_MASK		= 3 << GPIO2D6_SHIFT,
+	GPIO2D6_GPIO		= 0,
+	GPIO2D6_LCDC0_D22,
+	GPIO2D6_GMAC_COL	= 4,
+
+	GPIO2D1_SHIFT		= 2,
+	GPIO2D1_MASK		= 3 << GPIO2D1_SHIFT,
+	GPIO2D1_GPIO		= 0,
+	GPIO2D1_GMAC_MDC	= 3,
+};
+
+/* GRF_GPIO2C_IOMUX2 */
+enum {
+	GPIO2C7_SHIFT		= 12,
+	GPIO2C7_MASK		= 7 << GPIO2C7_SHIFT,
+	GPIO2C7_GPIO		= 0,
+	GPIO2C7_GMAC_TXD3	= 4,
+
+	GPIO2C6_SHIFT		= 12,
+	GPIO2C6_MASK		= 7 << GPIO2C6_SHIFT,
+	GPIO2C6_GPIO		= 0,
+	GPIO2C6_GMAC_TXD2	= 4,
+
+	GPIO2C5_SHIFT		= 12,
+	GPIO2C5_MASK		= 7 << GPIO2C5_SHIFT,
+	GPIO2C5_GPIO		= 0,
+	GPIO2C5_I2C2_SCL	= 3,
+	GPIO2C5_GMAC_RXD2,
+
+	GPIO2C4_SHIFT		= 12,
+	GPIO2C4_MASK		= 7 << GPIO2C4_SHIFT,
+	GPIO2C4_GPIO		= 0,
+	GPIO2C4_I2C2_SDA	= 3,
+	GPIO2C4_GMAC_RXD2,
+};
+#endif
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index bcbe4a18c1..35a7c62963 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -168,6 +168,16 @@ config PINCTRL_ROCKCHIP_RK3036
 	  the GPIO definitions and pin control functions for each available
 	  multiplex function.
 
+config PINCTRL_ROCKCHIP_RK3128
+	bool "Rockchip rk3128 pin control driver"
+	depends on DM
+	help
+	  Support pin multiplexing control on Rockchip rk3128 SoCs.
+
+	  The driver is controlled by a device tree node which contains both
+	  the GPIO definitions and pin control functions for each available
+	  multiplex function.
+
 config PINCTRL_ROCKCHIP_RK3188
 	bool "Rockchip rk3188 pin control driver"
 	depends on DM
diff --git a/drivers/pinctrl/rockchip/Makefile b/drivers/pinctrl/rockchip/Makefile
index 5251771a10..f09c6e17b4 100644
--- a/drivers/pinctrl/rockchip/Makefile
+++ b/drivers/pinctrl/rockchip/Makefile
@@ -1,11 +1,11 @@
 #
-# Copyright (c) 2015 Google, Inc
-# Written by Simon Glass <sjg@chromium.org>
+# Copyright (c) 2017 Rockchip Electronics Co., Ltd
 #
 # SPDX-License-Identifier:	GPL-2.0+
 #
 
 obj-$(CONFIG_PINCTRL_ROCKCHIP_RK3036) += pinctrl_rk3036.o
+obj-$(CONFIG_PINCTRL_ROCKCHIP_RK3128) += pinctrl_rk3128.o
 obj-$(CONFIG_PINCTRL_ROCKCHIP_RK3188) += pinctrl_rk3188.o
 obj-$(CONFIG_PINCTRL_ROCKCHIP_RK322X) += pinctrl_rk322x.o
 obj-$(CONFIG_PINCTRL_ROCKCHIP_RK3288) += pinctrl_rk3288.o
diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3128.c b/drivers/pinctrl/rockchip/pinctrl_rk3128.c
new file mode 100644
index 0000000000..b1c32ac592
--- /dev/null
+++ b/drivers/pinctrl/rockchip/pinctrl_rk3128.c
@@ -0,0 +1,187 @@
+/*
+ * Pinctrl driver for Rockchip 3128 SoCs
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/grf_rk3128.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/periph.h>
+#include <dm/pinctrl.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct rk3128_pinctrl_priv {
+	struct rk3128_grf *grf;
+};
+
+static void pinctrl_rk3128_i2c_config(struct rk3128_grf *grf, int i2c_id)
+{
+	switch (i2c_id) {
+	case PERIPH_ID_I2C0:
+		rk_clrsetreg(&grf->gpio0a_iomux,
+			     GPIO0A1_MASK | GPIO0A0_MASK,
+			     GPIO0A1_I2C0_SDA << GPIO0A1_SHIFT |
+			     GPIO0A0_I2C0_SCL << GPIO0A0_SHIFT);
+
+		break;
+	case PERIPH_ID_I2C1:
+		rk_clrsetreg(&grf->gpio0a_iomux,
+			     GPIO0A3_MASK | GPIO0A2_MASK,
+			     GPIO0A3_I2C1_SDA << GPIO0A3_SHIFT |
+			     GPIO0A2_I2C1_SCL << GPIO0A2_SHIFT);
+		break;
+	case PERIPH_ID_I2C2:
+		rk_clrsetreg(&grf->gpio2c_iomux2,
+			     GPIO2C5_MASK | GPIO2C4_MASK,
+			     GPIO2C5_I2C2_SCL << GPIO2C5_SHIFT |
+			     GPIO2C4_I2C2_SDA << GPIO2C4_SHIFT);
+		break;
+	case PERIPH_ID_I2C3:
+		rk_clrsetreg(&grf->gpio0a_iomux,
+			     GPIO0A7_MASK | GPIO0A6_MASK,
+			     GPIO0A7_I2C3_SDA << GPIO0A7_SHIFT |
+			     GPIO0A6_I2C3_SCL << GPIO0A6_SHIFT);
+
+		break;
+	}
+}
+
+static void pinctrl_rk3128_sdmmc_config(struct rk3128_grf *grf, int mmc_id)
+{
+	switch (mmc_id) {
+	case PERIPH_ID_EMMC:
+		rk_clrsetreg(&grf->gpio1d_iomux, 0xffff,
+			     GPIO1D7_EMMC_D7 << GPIO1D7_SHIFT |
+			     GPIO1D6_EMMC_D6 << GPIO1D6_SHIFT |
+			     GPIO1D5_EMMC_D5 << GPIO1D5_SHIFT |
+			     GPIO1D4_EMMC_D4 << GPIO1D4_SHIFT |
+			     GPIO1D3_EMMC_D3 << GPIO1D3_SHIFT |
+			     GPIO1D2_EMMC_D2 << GPIO1D2_SHIFT |
+			     GPIO1D1_EMMC_D1 << GPIO1D1_SHIFT |
+			     GPIO1D0_EMMC_D0 << GPIO1D0_SHIFT);
+		rk_clrsetreg(&grf->gpio2a_iomux,
+			     GPIO2A5_MASK | GPIO2A7_MASK,
+			     GPIO2A5_EMMC_PWREN << GPIO2A5_SHIFT |
+			     GPIO2A7_EMMC_CLKOUT << GPIO2A7_SHIFT);
+		break;
+	case PERIPH_ID_SDCARD:
+		rk_clrsetreg(&grf->gpio1c_iomux, 0x0fff,
+			     GPIO1C5_MMC0_D3 << GPIO1C5_SHIFT |
+			     GPIO1C4_MMC0_D2 << GPIO1C4_SHIFT |
+			     GPIO1C3_MMC0_D1 << GPIO1C3_SHIFT |
+			     GPIO1C2_MMC0_D0 << GPIO1C2_SHIFT |
+			     GPIO1C1_MMC0_DETN << GPIO1C1_SHIFT |
+			     GPIO1C0_MMC0_CLKOUT << GPIO1C0_SHIFT);
+		break;
+	}
+}
+
+static int rk3128_pinctrl_request(struct udevice *dev, int func, int flags)
+{
+	struct rk3128_pinctrl_priv *priv = dev_get_priv(dev);
+
+	debug("%s: func=%x, flags=%x\n", __func__, func, flags);
+	switch (func) {
+	case PERIPH_ID_I2C0:
+	case PERIPH_ID_I2C1:
+	case PERIPH_ID_I2C2:
+	case PERIPH_ID_I2C3:
+		pinctrl_rk3128_i2c_config(priv->grf, func);
+		break;
+	case PERIPH_ID_SDMMC0:
+	case PERIPH_ID_SDMMC1:
+		pinctrl_rk3128_sdmmc_config(priv->grf, func);
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int rk3128_pinctrl_get_periph_id(struct udevice *dev,
+					struct udevice *periph)
+{
+	u32 cell[3];
+	int ret;
+
+	ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(periph),
+				   "interrupts", cell, ARRAY_SIZE(cell));
+	if (ret < 0)
+		return -EINVAL;
+
+	switch (cell[1]) {
+	case 14:
+		return PERIPH_ID_SDCARD;
+	case 16:
+		return PERIPH_ID_EMMC;
+	case 20:
+		return PERIPH_ID_UART0;
+	case 21:
+		return PERIPH_ID_UART1;
+	case 22:
+		return PERIPH_ID_UART2;
+	case 23:
+		return PERIPH_ID_SPI0;
+	case 24:
+		return PERIPH_ID_I2C0;
+	case 25:
+		return PERIPH_ID_I2C1;
+	case 26:
+		return PERIPH_ID_I2C2;
+	case 27:
+		return PERIPH_ID_I2C3;
+	case 30:
+		return PERIPH_ID_PWM0;
+	}
+	return -ENOENT;
+}
+
+static int rk3128_pinctrl_set_state_simple(struct udevice *dev,
+					   struct udevice *periph)
+{
+	int func;
+
+	func = rk3128_pinctrl_get_periph_id(dev, periph);
+	if (func < 0)
+		return func;
+	return rk3128_pinctrl_request(dev, func, 0);
+}
+
+static struct pinctrl_ops rk3128_pinctrl_ops = {
+	.set_state_simple	= rk3128_pinctrl_set_state_simple,
+	.request	= rk3128_pinctrl_request,
+	.get_periph_id	= rk3128_pinctrl_get_periph_id,
+};
+
+static int rk3128_pinctrl_probe(struct udevice *dev)
+{
+	struct rk3128_pinctrl_priv *priv = dev_get_priv(dev);
+
+	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	debug("%s: grf=%p\n", __func__, priv->grf);
+	return 0;
+}
+
+static const struct udevice_id rk3128_pinctrl_ids[] = {
+	{ .compatible = "rockchip,rk3128-pinctrl" },
+	{ }
+};
+
+U_BOOT_DRIVER(pinctrl_rk3128) = {
+	.name		= "pinctrl_rk3128",
+	.id		= UCLASS_PINCTRL,
+	.of_match	= rk3128_pinctrl_ids,
+	.priv_auto_alloc_size = sizeof(struct rk3128_pinctrl_priv),
+	.ops		= &rk3128_pinctrl_ops,
+	.bind		= dm_scan_fdt_dev,
+	.probe		= rk3128_pinctrl_probe,
+};

commit de4fa2432c987fd9f99e4fba36cdb768bdfd7475
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Mar 10 14:16:28 2017 +0800

    rockchip: rk3128: add clock driver
    
    Add rk3128 clock driver and cru structure definition.
    
    Change-Id: Ib6e17f56b2e7e6cc6cdf06f8d9ac44c062b5b6e3
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3128.h b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
new file mode 100644
index 0000000000..8d6b166631
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
@@ -0,0 +1,173 @@
+/*
+ * Copyright (c) 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _ASM_ARCH_CRU_RK3128_H
+#define _ASM_ARCH_CRU_RK3128_H
+
+#include <common.h>
+
+#define MHz		1000000
+#define OSC_HZ		(24 * MHz)
+
+#define APLL_HZ		(600 * MHz)
+#define GPLL_HZ		(594 * MHz)
+
+#define CORE_PERI_HZ	150000000
+#define CORE_ACLK_HZ	300000000
+
+#define BUS_ACLK_HZ	148500000
+#define BUS_HCLK_HZ	148500000
+#define BUS_PCLK_HZ	74250000
+
+#define PERI_ACLK_HZ	148500000
+#define PERI_HCLK_HZ	148500000
+#define PERI_PCLK_HZ	74250000
+
+/* Private data for the clock driver - used by rockchip_get_cru() */
+struct rk3128_clk_priv {
+	struct rk3128_cru *cru;
+	ulong rate;
+};
+
+struct rk3128_cru {
+	struct rk3128_pll {
+		unsigned int con0;
+		unsigned int con1;
+		unsigned int con2;
+		unsigned int con3;
+	} pll[4];
+	unsigned int cru_mode_con;
+	unsigned int cru_clksel_con[35];
+	unsigned int cru_clkgate_con[11];
+	unsigned int reserved;
+	unsigned int cru_glb_srst_fst_value;
+	unsigned int cru_glb_srst_snd_value;
+	unsigned int reserved1[2];
+	unsigned int cru_softrst_con[9];
+	unsigned int cru_misc_con;
+	unsigned int reserved2[2];
+	unsigned int cru_glb_cnt_th;
+	unsigned int reserved3[3];
+	unsigned int cru_glb_rst_st;
+	unsigned int reserved4[(0x1c0 - 0x150) / 4 - 1];
+	unsigned int cru_sdmmc_con[2];
+	unsigned int cru_sdio_con[2];
+	unsigned int reserved5[2];
+	unsigned int cru_emmc_con[2];
+	unsigned int reserved6[4];
+	unsigned int cru_pll_prg_en;
+};
+check_member(rk3128_cru, cru_pll_prg_en, 0x01f0);
+
+struct pll_div {
+	u32 refdiv;
+	u32 fbdiv;
+	u32 postdiv1;
+	u32 postdiv2;
+	u32 frac;
+};
+
+enum {
+	/* PLLCON0*/
+	PLL_POSTDIV1_SHIFT	= 12,
+	PLL_POSTDIV1_MASK	= 7 << PLL_POSTDIV1_SHIFT,
+	PLL_FBDIV_SHIFT		= 0,
+	PLL_FBDIV_MASK		= 0xfff,
+
+	/* PLLCON1 */
+	PLL_RST_SHIFT		= 14,
+	PLL_PD_SHIFT		= 13,
+	PLL_PD_MASK		= 1 << PLL_PD_SHIFT,
+	PLL_DSMPD_SHIFT		= 12,
+	PLL_DSMPD_MASK		= 1 << PLL_DSMPD_SHIFT,
+	PLL_LOCK_STATUS_SHIFT	= 10,
+	PLL_LOCK_STATUS_MASK	= 1 << PLL_LOCK_STATUS_SHIFT,
+	PLL_POSTDIV2_SHIFT	= 6,
+	PLL_POSTDIV2_MASK	= 7 << PLL_POSTDIV2_SHIFT,
+	PLL_REFDIV_SHIFT	= 0,
+	PLL_REFDIV_MASK		= 0x3f,
+
+	/* CRU_MODE */
+	GPLL_MODE_SHIFT		= 12,
+	GPLL_MODE_MASK		= 3 << GPLL_MODE_SHIFT,
+	GPLL_MODE_SLOW		= 0,
+	GPLL_MODE_NORM,
+	GPLL_MODE_DEEP,
+	DPLL_MODE_SHIFT		= 4,
+	DPLL_MODE_MASK		= 1 << DPLL_MODE_SHIFT,
+	DPLL_MODE_SLOW		= 0,
+	DPLL_MODE_NORM,
+	APLL_MODE_SHIFT		= 0,
+	APLL_MODE_MASK		= 1 << APLL_MODE_SHIFT,
+	APLL_MODE_SLOW		= 0,
+	APLL_MODE_NORM,
+
+	/* CRU_CLK_SEL0_CON */
+	BUS_ACLK_PLL_SEL_SHIFT	= 14,
+	BUS_ACLK_PLL_SEL_MASK	= 3 << BUS_ACLK_PLL_SEL_SHIFT,
+	BUS_ACLK_PLL_SEL_CPLL	= 0,
+	BUS_ACLK_PLL_SEL_GPLL,
+	BUS_ACLK_PLL_SEL_GPLL_DIV2,
+	BUS_ACLK_PLL_SEL_GPLL_DIV3,
+	BUS_ACLK_DIV_SHIFT	= 8,
+	BUS_ACLK_DIV_MASK	= 0x1f << BUS_ACLK_DIV_SHIFT,
+	CORE_CLK_PLL_SEL_SHIFT	= 7,
+	CORE_CLK_PLL_SEL_MASK	= 1 << CORE_CLK_PLL_SEL_SHIFT,
+	CORE_CLK_PLL_SEL_APLL	= 0,
+	CORE_CLK_PLL_SEL_GPLL_DIV2,
+	CORE_DIV_CON_SHIFT	= 0,
+	CORE_DIV_CON_MASK	= 0x1f << CORE_DIV_CON_SHIFT,
+
+	/* CRU_CLK_SEL1_CON */
+	BUS_PCLK_DIV_SHIFT	= 12,
+	BUS_PCLK_DIV_MASK	= 7 << BUS_PCLK_DIV_SHIFT,
+	BUS_HCLK_DIV_SHIFT	= 8,
+	BUS_HCLK_DIV_MASK	= 3 << BUS_HCLK_DIV_SHIFT,
+	CORE_ACLK_DIV_SHIFT	= 4,
+	CORE_ACLK_DIV_MASK	= 7 << CORE_ACLK_DIV_SHIFT,
+	CORE_PERI_DIV_SHIFT	= 0,
+	CORE_PERI_DIV_MASK	= 0xf << CORE_PERI_DIV_SHIFT,
+
+	/* CRU_CLKSEL10_CON */
+	PERI_PLL_SEL_SHIFT	= 14,
+	PERI_PLL_SEL_MASK	= 1 << PERI_PLL_SEL_SHIFT,
+	PERI_PLL_APLL		= 0,
+	PERI_PLL_DPLL,
+	PERI_PLL_GPLL,
+	PERI_PCLK_DIV_SHIFT	= 12,
+	PERI_PCLK_DIV_MASK	= 3 << PERI_PCLK_DIV_SHIFT,
+	PERI_HCLK_DIV_SHIFT	= 8,
+	PERI_HCLK_DIV_MASK	= 3 << PERI_HCLK_DIV_SHIFT,
+	PERI_ACLK_DIV_SHIFT	= 0,
+	PERI_ACLK_DIV_MASK	= 0x1f << PERI_ACLK_DIV_SHIFT,
+
+	/* CRU_CLKSEL11_CON */
+	MMC0_PLL_SHIFT		= 6,
+	MMC0_PLL_MASK		= 3 << MMC0_PLL_SHIFT,
+	MMC0_SEL_APLL		= 0,
+	MMC0_SEL_GPLL,
+	MMC0_SEL_GPLL_DIV2,
+	MMC0_SEL_24M,
+	MMC0_DIV_SHIFT		= 0,
+	MMC0_DIV_MASK		= 0x3f << MMC0_DIV_SHIFT,
+
+	/* CRU_CLKSEL12_CON */
+	EMMC_PLL_SHIFT		= 14,
+	EMMC_PLL_MASK		= 3 << EMMC_PLL_SHIFT,
+	EMMC_SEL_APLL		= 0,
+	EMMC_SEL_GPLL,
+	EMMC_SEL_GPLL_DIV2,
+	EMMC_SEL_24M,
+	EMMC_DIV_SHIFT		= 8,
+	EMMC_DIV_MASK		= 0x3f << EMMC_DIV_SHIFT,
+
+	/* CRU_SOFTRST5_CON */
+	DDRCTRL_PSRST_SHIFT	= 11,
+	DDRCTRL_SRST_SHIFT	= 10,
+	DDRPHY_PSRST_SHIFT	= 9,
+	DDRPHY_SRST_SHIFT	= 8,
+};
+#endif
diff --git a/arch/arm/mach-rockchip/rk3128/Makefile b/arch/arm/mach-rockchip/rk3128/Makefile
index 0f63d921de..50e1117542 100644
--- a/arch/arm/mach-rockchip/rk3128/Makefile
+++ b/arch/arm/mach-rockchip/rk3128/Makefile
@@ -6,3 +6,4 @@
 
 obj-y += rk3128.o
 obj-y += syscon_rk3128.o
+obj-y += clk_rk3128.o
diff --git a/arch/arm/mach-rockchip/rk3128/clk_rk3128.c b/arch/arm/mach-rockchip/rk3128/clk_rk3128.c
new file mode 100644
index 0000000000..7ca5fd3484
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3128/clk_rk3128.c
@@ -0,0 +1,32 @@
+/*
+ * Copyright (c) 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk3128.h>
+
+int rockchip_get_clk(struct udevice **devp)
+{
+	return uclass_get_device_by_driver(UCLASS_CLK,
+			DM_GET_DRIVER(rockchip_rk3128_cru), devp);
+}
+
+void *rockchip_get_cru(void)
+{
+	struct rk3128_clk_priv *priv;
+	struct udevice *dev;
+	int ret;
+
+	ret = rockchip_get_clk(&dev);
+	if (ret)
+		return ERR_PTR(ret);
+
+	priv = dev_get_priv(dev);
+
+	return priv->cru;
+}
diff --git a/drivers/clk/rockchip/Makefile b/drivers/clk/rockchip/Makefile
index c50aff2e93..eae0ef6a9f 100644
--- a/drivers/clk/rockchip/Makefile
+++ b/drivers/clk/rockchip/Makefile
@@ -1,10 +1,11 @@
 #
-# Copyright (c) 2016 Google, Inc
+# Copyright (c) 2017 Rockchip Electronics Co., Ltd
 #
 # SPDX-License-Identifier:      GPL-2.0+
 #
 
 obj-$(CONFIG_ROCKCHIP_RK3036) += clk_rk3036.o
+obj-$(CONFIG_ROCKCHIP_RK3128) += clk_rk3128.o
 obj-$(CONFIG_ROCKCHIP_RK3188) += clk_rk3188.o
 obj-$(CONFIG_ROCKCHIP_RK322X) += clk_rk322x.o
 obj-$(CONFIG_ROCKCHIP_RK3288) += clk_rk3288.o
diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c
new file mode 100644
index 0000000000..830848ea24
--- /dev/null
+++ b/drivers/clk/rockchip/clk_rk3128.c
@@ -0,0 +1,350 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#include <common.h>
+#include <clk-uclass.h>
+#include <dm.h>
+#include <errno.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk3128.h>
+#include <asm/arch/hardware.h>
+#include <dm/lists.h>
+#include <dt-bindings/clock/rk3128-cru.h>
+#include <linux/log2.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+enum {
+	VCO_MAX_HZ	= 2400U * 1000000,
+	VCO_MIN_HZ	= 600 * 1000000,
+	OUTPUT_MAX_HZ	= 2400U * 1000000,
+	OUTPUT_MIN_HZ	= 24 * 1000000,
+};
+
+#define DIV_TO_RATE(input_rate, div)	((input_rate) / ((div) + 1))
+
+#define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\
+	.refdiv = _refdiv,\
+	.fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ),\
+	.postdiv1 = _postdiv1, .postdiv2 = _postdiv2};
+
+/* use integer mode*/
+static const struct pll_div apll_init_cfg = PLL_DIVISORS(APLL_HZ, 1, 3, 1);
+static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 2, 1);
+
+static int rkclk_set_pll(struct rk3128_cru *cru, enum rk_clk_id clk_id,
+			 const struct pll_div *div)
+{
+	int pll_id = rk_pll_id(clk_id);
+	struct rk3128_pll *pll = &cru->pll[pll_id];
+
+	/* All PLLs have same VCO and output frequency range restrictions. */
+	uint vco_hz = OSC_HZ / 1000 * div->fbdiv / div->refdiv * 1000;
+	uint output_hz = vco_hz / div->postdiv1 / div->postdiv2;
+
+	debug("PLL at %p:fd=%d,rd=%d,pd1=%d,pd2=%d,vco=%uHz,output=%uHz\n",
+	      pll, div->fbdiv, div->refdiv, div->postdiv1,
+	      div->postdiv2, vco_hz, output_hz);
+	assert(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ &&
+	       output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ);
+
+	/* use integer mode */
+	rk_setreg(&pll->con1, 1 << PLL_DSMPD_SHIFT);
+	/* Power down */
+	rk_setreg(&pll->con1, 1 << PLL_PD_SHIFT);
+
+	rk_clrsetreg(&pll->con0,
+		     PLL_POSTDIV1_MASK | PLL_FBDIV_MASK,
+		     (div->postdiv1 << PLL_POSTDIV1_SHIFT) | div->fbdiv);
+	rk_clrsetreg(&pll->con1, PLL_POSTDIV2_MASK | PLL_REFDIV_MASK,
+		     (div->postdiv2 << PLL_POSTDIV2_SHIFT |
+		     div->refdiv << PLL_REFDIV_SHIFT));
+
+	/* Power Up */
+	rk_clrreg(&pll->con1, 1 << PLL_PD_SHIFT);
+
+	/* waiting for pll lock */
+	while (readl(&pll->con1) & (1 << PLL_LOCK_STATUS_SHIFT))
+		udelay(1);
+
+	return 0;
+}
+
+static void rkclk_init(struct rk3128_cru *cru)
+{
+	u32 aclk_div;
+	u32 hclk_div;
+	u32 pclk_div;
+
+	/* pll enter slow-mode */
+	rk_clrsetreg(&cru->cru_mode_con,
+		     GPLL_MODE_MASK | APLL_MODE_MASK,
+		     GPLL_MODE_SLOW << GPLL_MODE_SHIFT |
+		     APLL_MODE_SLOW << APLL_MODE_SHIFT);
+
+	/* init pll */
+	rkclk_set_pll(cru, CLK_ARM, &apll_init_cfg);
+	rkclk_set_pll(cru, CLK_GENERAL, &gpll_init_cfg);
+
+	/*
+	 * select apll as cpu/core clock pll source and
+	 * set up dependent divisors for PERI and ACLK clocks.
+	 * core hz : apll = 1:1
+	 */
+	aclk_div = APLL_HZ / CORE_ACLK_HZ - 1;
+	assert((aclk_div + 1) * CORE_ACLK_HZ == APLL_HZ && aclk_div < 0x7);
+
+	pclk_div = APLL_HZ / CORE_PERI_HZ - 1;
+	assert((pclk_div + 1) * CORE_PERI_HZ == APLL_HZ && pclk_div < 0xf);
+
+	rk_clrsetreg(&cru->cru_clksel_con[0],
+		     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK,
+		     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
+		     0 << CORE_DIV_CON_SHIFT);
+
+	rk_clrsetreg(&cru->cru_clksel_con[1],
+		     CORE_ACLK_DIV_MASK | CORE_PERI_DIV_MASK,
+		     aclk_div << CORE_ACLK_DIV_SHIFT |
+		     pclk_div << CORE_PERI_DIV_SHIFT);
+
+	/*
+	 * select gpll as pd_bus bus clock source and
+	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
+	 */
+	aclk_div = GPLL_HZ / BUS_ACLK_HZ - 1;
+	assert((aclk_div + 1) * BUS_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
+
+	pclk_div = BUS_ACLK_HZ / BUS_PCLK_HZ - 1;
+	assert((pclk_div + 1) * BUS_PCLK_HZ == GPLL_HZ && pclk_div <= 0x7);
+
+	hclk_div = BUS_ACLK_HZ / BUS_HCLK_HZ - 1;
+	assert((hclk_div + 1) * BUS_HCLK_HZ == GPLL_HZ && hclk_div <= 0x3);
+
+	rk_clrsetreg(&cru->cru_clksel_con[0],
+		     BUS_ACLK_PLL_SEL_MASK | BUS_ACLK_DIV_MASK,
+		     BUS_ACLK_PLL_SEL_GPLL << BUS_ACLK_PLL_SEL_SHIFT |
+		     aclk_div << BUS_ACLK_DIV_SHIFT);
+
+	rk_clrsetreg(&cru->cru_clksel_con[1],
+		     BUS_PCLK_DIV_MASK | BUS_HCLK_DIV_MASK,
+		     pclk_div << BUS_PCLK_DIV_SHIFT |
+		     hclk_div << BUS_HCLK_DIV_SHIFT);
+
+	/*
+	 * select gpll as pd_peri bus clock source and
+	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
+	 */
+	aclk_div = GPLL_HZ / PERI_ACLK_HZ - 1;
+	assert((aclk_div + 1) * PERI_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f);
+
+	hclk_div = ilog2(PERI_ACLK_HZ / PERI_HCLK_HZ);
+	assert((1 << hclk_div) * PERI_HCLK_HZ ==
+		PERI_ACLK_HZ && (hclk_div < 0x4));
+
+	pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ);
+	assert((1 << pclk_div) * PERI_PCLK_HZ ==
+		PERI_ACLK_HZ && pclk_div < 0x8);
+
+	rk_clrsetreg(&cru->cru_clksel_con[10],
+		     PERI_PLL_SEL_MASK | PERI_PCLK_DIV_MASK |
+		     PERI_HCLK_DIV_MASK | PERI_ACLK_DIV_MASK,
+		     PERI_PLL_GPLL << PERI_PLL_SEL_SHIFT |
+		     pclk_div << PERI_PCLK_DIV_SHIFT |
+		     hclk_div << PERI_HCLK_DIV_SHIFT |
+		     aclk_div << PERI_ACLK_DIV_SHIFT);
+
+	/* PLL enter normal-mode */
+	rk_clrsetreg(&cru->cru_mode_con,
+		     GPLL_MODE_MASK | APLL_MODE_MASK,
+		     GPLL_MODE_NORM << GPLL_MODE_SHIFT |
+		     APLL_MODE_NORM << APLL_MODE_SHIFT);
+}
+
+/* Get pll rate by id */
+static uint32_t rkclk_pll_get_rate(struct rk3128_cru *cru,
+				   enum rk_clk_id clk_id)
+{
+	uint32_t refdiv, fbdiv, postdiv1, postdiv2;
+	uint32_t con;
+	int pll_id = rk_pll_id(clk_id);
+	struct rk3128_pll *pll = &cru->pll[pll_id];
+	static u8 clk_shift[CLK_COUNT] = {
+		0xff, APLL_MODE_SHIFT, DPLL_MODE_SHIFT, 0xff,
+		GPLL_MODE_SHIFT, 0xff
+	};
+	static u32 clk_mask[CLK_COUNT] = {
+		0xff, APLL_MODE_MASK, DPLL_MODE_MASK, 0xff,
+		GPLL_MODE_MASK, 0xff
+	};
+	uint shift;
+	uint mask;
+
+	con = readl(&cru->cru_mode_con);
+	shift = clk_shift[clk_id];
+	mask = clk_mask[clk_id];
+
+	switch ((con & mask) >> shift) {
+	case GPLL_MODE_SLOW:
+		return OSC_HZ;
+	case GPLL_MODE_NORM:
+
+		/* normal mode */
+		con = readl(&pll->con0);
+		postdiv1 = (con & PLL_POSTDIV1_MASK) >> PLL_POSTDIV1_SHIFT;
+		fbdiv = (con & PLL_FBDIV_MASK) >> PLL_FBDIV_SHIFT;
+		con = readl(&pll->con1);
+		postdiv2 = (con & PLL_POSTDIV2_MASK) >> PLL_POSTDIV2_SHIFT;
+		refdiv = (con & PLL_REFDIV_MASK) >> PLL_REFDIV_SHIFT;
+		return (24 * fbdiv / (refdiv * postdiv1 * postdiv2)) * 1000000;
+	case GPLL_MODE_DEEP:
+	default:
+		return 32768;
+	}
+}
+
+static ulong rockchip_mmc_get_clk(struct rk3128_cru *cru, uint clk_general_rate,
+				  int periph)
+{
+	uint src_rate;
+	uint div, mux;
+	u32 con;
+
+	switch (periph) {
+	case HCLK_EMMC:
+	case SCLK_EMMC:
+	case SCLK_EMMC_SAMPLE:
+		con = readl(&cru->cru_clksel_con[12]);
+		mux = (con & EMMC_PLL_MASK) >> EMMC_PLL_SHIFT;
+		div = (con & EMMC_DIV_MASK) >> EMMC_DIV_SHIFT;
+		break;
+	case HCLK_SDMMC:
+	case SCLK_SDMMC:
+		con = readl(&cru->cru_clksel_con[11]);
+		mux = (con & MMC0_PLL_MASK) >> MMC0_PLL_SHIFT;
+		div = (con & MMC0_DIV_MASK) >> MMC0_DIV_SHIFT;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	src_rate = mux == EMMC_SEL_24M ? OSC_HZ : clk_general_rate;
+	return DIV_TO_RATE(src_rate, div);
+}
+
+static ulong rockchip_mmc_set_clk(struct rk3128_cru *cru, uint clk_general_rate,
+				  int periph, uint freq)
+{
+	int src_clk_div;
+	int mux;
+
+	debug("%s: clk_general_rate=%u\n", __func__, clk_general_rate);
+
+	/* mmc clock defaulg div 2 internal, need provide double in cru */
+	src_clk_div = DIV_ROUND_UP(clk_general_rate / 2, freq);
+
+	if (src_clk_div > 128) {
+		src_clk_div = DIV_ROUND_UP(OSC_HZ / 2, freq);
+		mux = EMMC_SEL_24M;
+	} else {
+		mux = EMMC_SEL_GPLL;
+	}
+
+	switch (periph) {
+	case HCLK_EMMC:
+		rk_clrsetreg(&cru->cru_clksel_con[12],
+			     EMMC_PLL_MASK | EMMC_DIV_MASK,
+			     mux << EMMC_PLL_SHIFT |
+			     (src_clk_div - 1) << EMMC_DIV_SHIFT);
+		break;
+	case HCLK_SDMMC:
+	case SCLK_SDMMC:
+		rk_clrsetreg(&cru->cru_clksel_con[11],
+			     MMC0_PLL_MASK | MMC0_DIV_MASK,
+			     mux << MMC0_PLL_SHIFT |
+			     (src_clk_div - 1) << MMC0_DIV_SHIFT);
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return rockchip_mmc_get_clk(cru, clk_general_rate, periph);
+}
+
+static ulong rk3128_clk_get_rate(struct clk *clk)
+{
+	struct rk3128_clk_priv *priv = dev_get_priv(clk->dev);
+
+	switch (clk->id) {
+	case 0 ... 63:
+		return rkclk_pll_get_rate(priv->cru, clk->id);
+	default:
+		return -ENOENT;
+	}
+}
+
+static ulong rk3128_clk_set_rate(struct clk *clk, ulong rate)
+{
+	struct rk3128_clk_priv *priv = dev_get_priv(clk->dev);
+	ulong new_rate, gclk_rate;
+
+	gclk_rate = rkclk_pll_get_rate(priv->cru, CLK_GENERAL);
+	switch (clk->id) {
+	case 0 ... 63:
+		return 0;
+	case HCLK_EMMC:
+		new_rate = rockchip_mmc_set_clk(priv->cru, gclk_rate,
+						clk->id, rate);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return new_rate;
+}
+
+static struct clk_ops rk3128_clk_ops = {
+	.get_rate	= rk3128_clk_get_rate,
+	.set_rate	= rk3128_clk_set_rate,
+};
+
+static int rk3128_clk_probe(struct udevice *dev)
+{
+	struct rk3128_clk_priv *priv = dev_get_priv(dev);
+
+	priv->cru = (struct rk3128_cru *)devfdt_get_addr(dev);
+	rkclk_init(priv->cru);
+
+	return 0;
+}
+
+static int rk3128_clk_bind(struct udevice *dev)
+{
+	int ret;
+
+	/* The reset driver does not have a device node, so bind it here */
+	ret = device_bind_driver(gd->dm_root, "rk3128_sysreset", "reset", &dev);
+	if (ret)
+		debug("Warning: No RK3128 reset driver: ret=%d\n", ret);
+
+	return 0;
+}
+
+static const struct udevice_id rk3128_clk_ids[] = {
+	{ .compatible = "rockchip,rk3128-cru" },
+	{ }
+};
+
+U_BOOT_DRIVER(rockchip_rk3128_cru) = {
+	.name		= "clk_rk3128",
+	.id		= UCLASS_CLK,
+	.of_match	= rk3128_clk_ids,
+	.priv_auto_alloc_size = sizeof(struct rk3128_clk_priv),
+	.ops		= &rk3128_clk_ops,
+	.bind		= rk3128_clk_bind,
+	.probe		= rk3128_clk_probe,
+};

commit 6a13bde3e49fb0a31c6d46fd27313d77fb559224
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Mar 10 11:01:51 2017 +0800

    rockchip: rk3128: add soc basic support
    
    RK3128 is a SoC from Rockchip with quad-core Cortex-A7 CPU
    and mali400 GPU. Support Nand flash, eMMC, SD card, USB 2.0 host
    and device, HDMI/LVDS/MIPI display.
    
    Change-Id: I8b1ded3cadddd7fb3aa6df6eebd882f6cb0c994b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 3c492a20ff..d59dad320a 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -11,6 +11,15 @@ config ROCKCHIP_RK3036
 	  and video codec support. Peripherals include Gigabit Ethernet,
 	  USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
 
+config ROCKCHIP_RK3128
+	bool "Support Rockchip RK3128"
+	select CPU_V7
+	help
+	  The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
+	  including NEON and GPU, Mali-400 graphics, several DDR3 options
+	  and video codec support. Peripherals include Gigabit Ethernet,
+	  USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
+
 config ROCKCHIP_RK3188
 	bool "Support Rockchip RK3188"
 	select CPU_V7
@@ -210,6 +219,7 @@ config GICV3
 	bool "ARM GICv3"
 
 source "arch/arm/mach-rockchip/rk3036/Kconfig"
+source "arch/arm/mach-rockchip/rk3128/Kconfig"
 source "arch/arm/mach-rockchip/rk3188/Kconfig"
 source "arch/arm/mach-rockchip/rk322x/Kconfig"
 source "arch/arm/mach-rockchip/rk3288/Kconfig"
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index aac2d4418d..cc3a63e3ec 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -28,6 +28,7 @@ obj-$(CONFIG_ROCKCHIP_PARAM) += rockchip_parameter.o
 obj-$(CONFIG_ROCKCHIP_RESOURCE_IMAGE) += resource_img.o
 obj-$(CONFIG_ROCKCHIP_PARTITION_BOOT) += bootrkp.o
 obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board.o
+obj-$(CONFIG_ROCKCHIP_RK3128) += rk3128-board.o
 obj-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board.o
 obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board.o
 obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board.o
@@ -40,6 +41,7 @@ obj-y += rk_timer.o
 endif
 
 obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036/
+obj-$(CONFIG_ROCKCHIP_RK3128) += rk3128/
 ifndef CONFIG_TPL_BUILD
 obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188/
 endif
diff --git a/arch/arm/mach-rockchip/rk3128-board.c b/arch/arm/mach-rockchip/rk3128-board.c
new file mode 100644
index 0000000000..70eda6fe2b
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3128-board.c
@@ -0,0 +1,146 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <ram.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/periph.h>
+#include <asm/arch/grf_rk3128.h>
+#include <asm/arch/boot_mode.h>
+#include <asm/arch/timer.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define PMU_BASE	0x100a0000
+
+static void setup_boot_mode(void)
+{
+	struct rk3128_pmu *const pmu = (void *)PMU_BASE;
+	int boot_mode = readl(&pmu->sys_reg[0]);
+
+	debug("boot mode %x.\n", boot_mode);
+
+	/* Clear boot mode */
+	writel(BOOT_NORMAL, &pmu->sys_reg[0]);
+
+	switch (boot_mode) {
+	case BOOT_FASTBOOT:
+		printf("enter fastboot!\n");
+		env_set("preboot", "setenv preboot; fastboot usb0");
+		break;
+	case BOOT_UMS:
+		printf("enter UMS!\n");
+		env_set("preboot", "setenv preboot; ums mmc 0");
+		break;
+	case BOOT_LOADER:
+		printf("enter Rockusb!\n");
+		env_set("preboot", "setenv preboot; rockusb 0 mmc 0");
+		break;
+	}
+}
+
+__weak int rk_board_late_init(void)
+{
+	return 0;
+}
+
+int board_late_init(void)
+{
+	setup_boot_mode();
+
+	return rk_board_late_init();
+}
+
+int board_init(void)
+{
+	rockchip_timer_init();
+
+	return 0;
+}
+
+int dram_init_banksize(void)
+{
+	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+	gd->bd->bi_dram[0].size = 0x8400000;
+	/* Reserve 0x200000 for OPTEE */
+	gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE
+				+ gd->bd->bi_dram[0].size + 0x200000;
+	gd->bd->bi_dram[1].size = gd->bd->bi_dram[0].start
+				+ gd->ram_size - gd->bd->bi_dram[1].start;
+
+	return 0;
+}
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+void enable_caches(void)
+{
+	/* Enable D-cache. I-cache is already enabled in start.S */
+	dcache_enable();
+}
+#endif
+
+#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
+#include <usb.h>
+#include <usb/dwc2_udc.h>
+
+static struct dwc2_plat_otg_data rk3128_otg_data = {
+	.rx_fifo_sz	= 512,
+	.np_tx_fifo_sz	= 16,
+	.tx_fifo_sz	= 128,
+};
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+	int node;
+	const char *mode;
+	bool matched = false;
+	const void *blob = gd->fdt_blob;
+
+	/* find the usb_otg node */
+	node = fdt_node_offset_by_compatible(blob, -1,
+					"rockchip,rk3288-usb");
+
+	while (node > 0) {
+		mode = fdt_getprop(blob, node, "dr_mode", NULL);
+		if (mode && strcmp(mode, "otg") == 0) {
+			matched = true;
+			break;
+		}
+
+		node = fdt_node_offset_by_compatible(blob, node,
+					"rockchip,rk3288-usb");
+	}
+	if (!matched) {
+		debug("Not found usb_otg device\n");
+		return -ENODEV;
+	}
+	rk3128_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
+
+	return dwc2_udc_probe(&rk3128_otg_data);
+}
+
+int board_usb_cleanup(int index, enum usb_init_type init)
+{
+	return 0;
+}
+#endif
+
+#if defined(CONFIG_USB_FUNCTION_FASTBOOT)
+int fb_set_reboot_flag(void)
+{
+	struct rk3128_grf *grf;
+
+	printf("Setting reboot to fastboot flag ...\n");
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	/* Set boot mode to fastboot */
+	writel(BOOT_FASTBOOT, &grf->os_reg[0]);
+
+	return 0;
+}
+#endif
diff --git a/arch/arm/mach-rockchip/rk3128/Kconfig b/arch/arm/mach-rockchip/rk3128/Kconfig
new file mode 100644
index 0000000000..e69de29bb2
diff --git a/arch/arm/mach-rockchip/rk3128/Makefile b/arch/arm/mach-rockchip/rk3128/Makefile
new file mode 100644
index 0000000000..0f63d921de
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3128/Makefile
@@ -0,0 +1,8 @@
+#
+# (C) Copyright 2017 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y += rk3128.o
+obj-y += syscon_rk3128.o
diff --git a/arch/arm/mach-rockchip/rk3128/rk3128.c b/arch/arm/mach-rockchip/rk3128/rk3128.c
new file mode 100644
index 0000000000..9d6e3b1ee1
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3128/rk3128.c
@@ -0,0 +1,12 @@
+/*
+ * Copyright (c) 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+int arch_cpu_init(void)
+{
+	/* We do some SoC one time setting here. */
+
+	return 0;
+}
diff --git a/arch/arm/mach-rockchip/rk3128/syscon_rk3128.c b/arch/arm/mach-rockchip/rk3128/syscon_rk3128.c
new file mode 100644
index 0000000000..0b636390ac
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3128/syscon_rk3128.c
@@ -0,0 +1,21 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+
+static const struct udevice_id rk3128_syscon_ids[] = {
+	{ .compatible = "rockchip,rk3128-grf", .data = ROCKCHIP_SYSCON_GRF },
+	{ }
+};
+
+U_BOOT_DRIVER(syscon_rk3128) = {
+	.name = "rk3128_syscon",
+	.id = UCLASS_SYSCON,
+	.of_match = rk3128_syscon_ids,
+};
diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h
new file mode 100644
index 0000000000..af901322ad
--- /dev/null
+++ b/include/configs/rk3128_common.h
@@ -0,0 +1,70 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __CONFIG_RK3128_COMMON_H
+#define __CONFIG_RK3128_COMMON_H
+
+#include "rockchip-common.h"
+
+#define CONFIG_ENV_SIZE			0x2000
+#define CONFIG_SYS_MAXARGS		16
+#define CONFIG_BAUDRATE			115200
+#define CONFIG_SYS_MALLOC_LEN		(32 << 20)
+#define CONFIG_SYS_CBSIZE		1024
+#define CONFIG_SKIP_LOWLEVEL_INIT
+
+#define CONFIG_SYS_TIMER_RATE		(24 * 1000 * 1000)
+#define CONFIG_SYS_TIMER_BASE		0x200440a0 /* TIMER5 */
+#define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMER_BASE + 8)
+
+#define CONFIG_SYS_NS16550_MEM32
+
+#define CONFIG_SYS_TEXT_BASE		0x60000000
+#define CONFIG_SYS_INIT_SP_ADDR		0x60100000
+#define CONFIG_SYS_LOAD_ADDR		0x60800800
+
+
+#define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */
+
+/* MMC/SD IP block */
+#define CONFIG_BOUNCE_BUFFER
+
+#define CONFIG_SUPPORT_VFAT
+#define CONFIG_FS_EXT4
+
+/* RAW SD card / eMMC locations. */
+#define CONFIG_SYS_SPI_U_BOOT_OFFS	(128 << 10)
+
+#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
+#define CONFIG_SYS_SDRAM_BASE		0x60000000
+#define CONFIG_NR_DRAM_BANKS		2
+#define SDRAM_MAX_SIZE			0x80000000
+
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI
+#define CONFIG_SF_DEFAULT_SPEED 20000000
+
+#ifndef CONFIG_SPL_BUILD
+
+/* usb mass storage */
+#define CONFIG_USB_FUNCTION_MASS_STORAGE
+
+#define ENV_MEM_LAYOUT_SETTINGS \
+	"scriptaddr=0x60500000\0" \
+	"pxefile_addr_r=0x60600000\0" \
+	"fdt_addr_r=0x61f00000\0" \
+	"kernel_addr_r=0x62000000\0" \
+	"ramdisk_addr_r=0x64000000\0"
+
+#include <config_distro_bootcmd.h>
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	ENV_MEM_LAYOUT_SETTINGS \
+	"partitions=" PARTS_DEFAULT \
+	BOOTENV
+
+#endif
+
+#endif

commit 40d96d0bb5c795db7e35d5487e6fbd15965473c2
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Mar 10 10:17:56 2017 +0800

    rockchip: rk3128: add device tree file
    
    Add dts binding header for rk3128, files origin from kernel.
    
    Change-Id: I56042f44f131aecee9d91bf381c74be0da6d5064
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 762429c463..9fc8127317 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -29,6 +29,7 @@ dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \
 dtb-$(CONFIG_EXYNOS7420) += exynos7420-espresso7420.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += \
 	rk3036-sdk.dtb \
+	rk3128-evb.dtb \
 	rk3188-radxarock.dtb \
 	rk3288-evb.dtb \
 	rk3288-fennec.dtb \
diff --git a/arch/arm/dts/rk3128-evb.dts b/arch/arm/dts/rk3128-evb.dts
new file mode 100644
index 0000000000..5ef51c9b79
--- /dev/null
+++ b/arch/arm/dts/rk3128-evb.dts
@@ -0,0 +1,77 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include "rk3128.dtsi"
+
+/ {
+	model = "Rockchip RK3128 Evaluation board";
+	compatible = "rockchip,rk3128-evb", "rockchip,rk3128";
+
+	chosen {
+		stdout-path = &uart2;
+	};
+
+	vcc5v0_otg: vcc5v0-otg-drv {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc5v0_otg";
+		gpio = <&gpio0 26 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&otg_vbus_drv>;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+	};
+
+	vcc5v0_host: vcc5v0-host-drv {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc5v0_host";
+		gpio = <&gpio2 23 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&host_vbus_drv>;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+	};
+};
+
+&i2c1 {
+	status = "okay";
+
+        hym8563: hym8563@51 {
+		compatible = "haoyu,hym8563";
+		reg = <0x51>;
+		#clock-cells = <0>;
+		clock-frequency = <32768>;
+		clock-output-names = "xin32k";
+	};
+};
+
+&usb_host {
+	status = "okay";
+};
+
+&usb_otg {
+	status = "okay";
+};
+
+&emmc {
+	status = "okay";
+};
+
+&pinctrl {
+	usb_otg {
+		otg_vbus_drv: host-vbus-drv {
+			rockchip,pins = <0 26 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	usb_host {
+		host_vbus_drv: host-vbus-drv {
+			rockchip,pins = <2 23 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};
diff --git a/arch/arm/dts/rk3128.dtsi b/arch/arm/dts/rk3128.dtsi
new file mode 100644
index 0000000000..e7710b7e12
--- /dev/null
+++ b/arch/arm/dts/rk3128.dtsi
@@ -0,0 +1,756 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/clock/rk3128-cru.h>
+#include "skeleton.dtsi"
+
+/ {
+	compatible = "rockchip,rk3128";
+	rockchip,sram = <&sram>;
+	interrupt-parent = <&gic>;
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	aliases {
+		gpio0 = &gpio0;
+		gpio1 = &gpio1;
+		gpio2 = &gpio2;
+		gpio3 = &gpio3;
+		i2c0 = &i2c0;
+		i2c1 = &i2c1;
+		i2c2 = &i2c2;
+		i2c3 = &i2c3;
+		spi0 = &spi0;
+		serial0 = &uart0;
+		serial1 = &uart1;
+		serial2 = &uart2;
+		mmc0 = &emmc;
+		mmc1 = &sdmmc;
+	};
+
+	memory {
+		device_type = "memory";
+		reg = <0x60000000 0x40000000>;
+	};
+
+        arm-pmu {
+                compatible = "arm,cortex-a7-pmu";
+                interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
+                             <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+        };
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		enable-method = "rockchip,rk3128-smp";
+
+		cpu0:cpu@0x000 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a7";
+			reg = <0x000>;
+			operating-points = <
+				/* KHz    uV */
+				 816000 1000000
+			>;
+			#cooling-cells = <2>; /* min followed by max */
+			clock-latency = <40000>;
+			clocks = <&cru ARMCLK>;
+		};
+
+		cpu1:cpu@0x001 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a7";
+			reg = <0x001>;
+		};
+
+		cpu2:cpu@0x002 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a7";
+			reg = <0x002>;
+		};
+
+		cpu3:cpu@0x003 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a7";
+			reg = <0x003>;
+		};
+	};
+
+	cpu_axi_bus: cpu_axi_bus {
+		compatible = "rockchip,cpu_axi_bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		qos {
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
+
+			crypto {
+				reg = <0x10128080 0x20>;
+			};
+
+			core {
+				reg = <0x1012a000 0x20>;
+			};
+
+			peri {
+				reg = <0x1012c000 0x20>;
+			};
+
+			gpu {
+				reg = <0x1012d000 0x20>;
+			};
+
+			vpu {
+				reg = <0x1012e000 0x20>;
+			};
+
+			rga {
+				reg = <0x1012f000 0x20>;
+			};
+			ebc {
+				reg = <0x1012f080 0x20>;
+			};
+
+			iep {
+				reg = <0x1012f100 0x20>;
+			};
+
+			lcdc {
+				reg = <0x1012f180 0x20>;
+				rockchip,priority = <3 3>;
+			};
+
+			vip {
+				reg = <0x1012f200 0x20>;
+				rockchip,priority = <3 3>;
+			};
+		};
+
+		msch {
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
+
+			msch@10128000 {
+				reg = <0x10128000 0x20>;
+				rockchip,read-latency = <0x3f>;
+			};
+		};
+	};
+
+	psci {
+		compatible      = "arm,psci";
+		method          = "smc";
+		cpu_suspend     = <0x84000001>;
+		cpu_off         = <0x84000002>;
+		cpu_on          = <0x84000003>;
+		migrate         = <0x84000005>;
+	};
+
+	amba {
+		compatible = "arm,amba-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		interrupt-parent = <&gic>;
+		ranges;
+
+                pdma: pdma@20078000 {
+                        compatible = "arm,pl330", "arm,primecell";
+                        reg = <0x20078000 0x4000>;
+                        arm,pl330-broken-no-flushp;//2
+                        interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+                        #dma-cells = <1>;
+                        clocks = <&cru ACLK_DMAC2>;
+                        clock-names = "apb_pclk";
+                };
+	};
+
+	xin24m: xin24m {
+		compatible = "fixed-clock";
+		clock-frequency = <24000000>;
+		clock-output-names = "xin24m";
+		#clock-cells = <0>;
+	};
+
+	xin12m: xin12m {
+		compatible = "fixed-clock";
+		clocks = <&xin24m>;
+		clock-frequency = <12000000>;
+		clock-output-names = "xin12m";
+		#clock-cells = <0>;
+	};
+
+
+	timer {
+		compatible = "arm,armv7-timer";
+		arm,cpu-registers-not-fw-configured;
+		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+		clock-frequency = <24000000>;
+	};
+
+	timer@20044000 {
+		compatible = "arm,armv7-timer";
+		reg = <0x20044000 0xb8>;
+		interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+		rockchip,broadcast = <1>;
+	};
+
+	watchdog: wdt@2004c000 {
+		compatible = "rockchip,watch dog";
+		reg = <0x2004c000 0x100>;
+		clock-names = "pclk_wdt";
+		interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+		rockchip,irq = <1>;
+		rockchip,timeout = <60>;
+		rockchip,atboot = <1>;
+		rockchip,debug = <0>;
+	};
+
+	reset: reset@20000110 {
+		compatible = "rockchip,reset";
+		reg = <0x20000110 0x24>;
+		#reset-cells = <1>;
+	};
+
+	nandc: nandc@10500000 {
+		compatible = "rockchip,rk-nandc";
+		reg = <0x10500000 0x4000>;
+		interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&nandc_ale &nandc_cle &nandc_wrn &nandc_rdn &nandc_rdy &nandc_cs0 &nandc_data>;
+		nandc_id = <0>;
+		clocks = <&cru SCLK_NANDC>,
+			 <&cru HCLK_NANDC>,
+			 <&cru SRST_NANDC>;
+		clock-names = "clk_nandc", "g_clk_nandc", "hclk_nandc";
+	};
+
+	dmc: dmc@20004000 {
+		u-boot,dm-pre-reloc;
+		compatible = "rockchip,rk3128-dmc", "syscon";
+		reg = <0x0 0x20004000 0x0 0x1000>;
+	};
+
+	cru: clock-controller@20000000 {
+		u-boot,dm-pre-reloc;
+		compatible = "rockchip,rk3128-cru";
+		reg = <0x20000000 0x1000>;
+		rockchip,grf = <&grf>;
+		#clock-cells = <1>;
+		#reset-cells = <1>;
+		assigned-clocks = <&cru PLL_GPLL>;
+		assigned-clock-rates = <594000000>;
+	};
+
+	uart0: serial0@20060000 {
+		compatible = "rockchip,rk3128-uart", "snps,dw-apb-uart";
+		reg = <0x20060000 0x100>;
+		interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		clock-frequency = <24000000>;
+		clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
+		clock-names = "baudclk", "apb_pclk";
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
+		dmas = <&pdma 2>, <&pdma 3>;
+		#dma-cells = <2>;
+	};
+
+	uart1: serial1@20064000 {
+		compatible = "rockchip,rk3128-uart", "snps,dw-apb-uart";
+		reg = <0x20064000 0x100>;
+		interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		clock-frequency = <24000000>;
+		clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
+		clock-names = "baudclk", "apb_pclk";
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart1_xfer>;
+		dmas = <&pdma 4>, <&pdma 5>;
+		#dma-cells = <2>;
+	};
+
+	uart2: serial2@20068000 {
+		compatible = "rockchip,rk3128-uart", "snps,dw-apb-uart";
+		reg = <0x20068000 0x100>;
+		interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		clock-frequency = <24000000>;
+		clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
+		clock-names = "baudclk", "apb_pclk";
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart2_xfer>;
+		dmas = <&pdma 6>, <&pdma 7>;
+		#dma-cells = <2>;
+	};
+
+	pwm0: pwm0@20050000 {
+		compatible = "rockchip,rk3128-pwm", "rockchip,rk3288-pwm";
+		reg = <0x20050000 0x10>;
+		#pwm-cells = <2>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwm0_pin>;
+		clocks = <&cru PCLK_PWM>;
+		clock-names = "pwm";
+	};
+
+	pwm1: pwm1@20050010 {
+		compatible = "rockchip,rk3128-pwm", "rockchip,rk3288-pwm";
+		reg = <0x20050010 0x10>;
+		#pwm-cells = <2>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwm1_pin>;
+		clocks = <&cru PCLK_PWM>;
+		clock-names = "pwm";
+	};
+
+	pwm2: pwm2@20050020 {
+		compatible = "rockchip,rk3128-pwm", "rockchip,rk3288-pwm";
+		reg = <0x20050020 0x10>;
+		#pwm-cells = <2>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwm2_pin>;
+		clocks = <&cru PCLK_PWM>;
+		clock-names = "pwm";
+	};
+
+	pwm3: pwm3@20050030 {
+		compatible = "rockchip,rk3128-pwm", "rockchip,rk3288-pwm";
+		reg = <0x20050030 0x10>;
+		#pwm-cells = <2>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwm3_pin>;
+		clocks = <&cru PCLK_PWM>;
+		clock-names = "pwm";
+	};
+
+	sram: sram@10080400 {
+		compatible = "rockchip,rk3128-smp-sram", "mmio-sram";
+		reg = <0x10080400 0x1C00>;
+		map-exec;
+		map-cacheable;
+	};
+
+	pmu: syscon@100a0000 {
+		compatible = "rockchip,rk3128-pmu", "syscon", "simple-mfd";
+		reg = <0x100a0000 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+	};
+
+	gic: interrupt-controller@10139000 {
+		compatible = "arm,gic-400";
+		interrupt-controller;
+		#interrupt-cells = <3>;
+		#address-cells = <0>;
+		reg = <0x10139000 0x1000>,
+		      <0x1013a000 0x1000>,
+		      <0x1013c000 0x2000>,
+		      <0x1013e000 0x2000>;
+		interrupts = <GIC_PPI 9 0xf04>;
+	};
+
+	usb_otg: usb@10180000 {
+		compatible = "rockchip,rk3288-usb", "rockchip,rk3066-usb", "snps,dwc2";
+		reg = <0x10180000 0x40000>;
+		interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_OTG0>;
+		clock-names = "otg";
+		dr_mode = "otg";
+		g-np-tx-fifo-size = <16>;
+		g-rx-fifo-size = <275>;
+		g-tx-fifo-size = <256 128 128 64 64 32>;
+		g-use-dma;
+	};
+
+	usb_host: usb@101c0000 {
+		compatible = "rockchip,rk3288-usb", "rockchip,rk3066-usb",
+				"snps,dwc2";
+		reg = <0x101c0000 0x40000>;
+		interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_OTG1>;
+		clock-names = "otg";
+		dr_mode = "host";
+	};
+
+	sdmmc: dwmmc@10214000 {
+		compatible = "rockchip,rk312x-dw-mshc", "rockchip,rk3288-dw-mshc";
+		reg = <0x10214000 0x4000>;
+		max-frequency = <150000000>;
+		interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
+			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
+		clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+		fifo-depth = <0x100>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
+		bus-width = <4>;
+		status = "disabled";
+	};
+
+	emmc: dwmmc@1021c000 {
+		compatible = "rockchip,rk3128-dw-mshc", "rockchip,rk3288-dw-mshc";
+		reg = <0x1021c000 0x4000>;
+		max-frequency = <150000000>;
+		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
+			 <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
+		clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+		bus-width = <8>;
+		default-sample-phase = <158>;
+		num-slots = <1>;
+		fifo-depth = <0x100>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
+		resets = <&cru SRST_EMMC>;
+		reset-names = "reset";
+		status = "disabled";
+	};
+
+	i2c0: i2c0@20070000 {
+		compatible = "rockchip,rk3128-i2c", "rockchip,rk3288-i2c";
+		reg = <0x20070000 0x1000>;
+		interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clock-names = "i2c";
+		clocks = <&cru PCLK_I2C0>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c0_xfer>;
+	};
+
+	i2c1: i2c1@20054000 {
+		compatible = "rockchip,rk3128-i2c", "rockchip,rk3288-i2c";
+		reg = <0x20054000 0x1000>;
+		interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clock-names = "i2c";
+		clocks = <&cru PCLK_I2C1>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c1_xfer>;
+	};
+
+	i2c2: i2c2@20058000 {
+		compatible = "rockchip,rk3128-i2c", "rockchip,rk3288-i2c";
+		reg = <0x20058000 0x1000>;
+		interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clock-names = "i2c";
+		clocks = <&cru PCLK_I2C2>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c0_xfer>;
+	};
+
+	i2c3: i2c3@2005c000 {
+		compatible = "rockchip,rk3128-i2c", "rockchip,rk3288-i2c";
+		reg = <0x2005c000 0x1000>;
+		interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clock-names = "i2c";
+		clocks = <&cru PCLK_I2C3>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c0_xfer>;
+	};
+
+	spi0: spi@20074000 {
+		compatible = "rockchip,rk3128-spi", "rockchip,rk3288-spi";
+		reg = <0x20074000 0x1000>;
+		interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&spi0_txd_mux0 &spi0_rxd_mux0 &spi0_clk_mux0 &spi0_cs0_mux0 &spi0_cs1_mux0>;
+		rockchip,spi-src-clk = <0>;
+		num-cs = <2>;
+		clocks =<&cru SCLK_SPI>, <&cru PCLK_SPI>;
+		clock-names = "spi","pclk_spi0";
+		dmas = <&pdma 8>, <&pdma 9>;
+		#dma-cells = <2>;
+		dma-names = "tx", "rx";
+	};
+
+	grf: syscon@20008000 {
+		u-boot,dm-pre-reloc;
+		compatible = "rockchip,rk3128-grf", "syscon";
+		reg = <0x20008000 0x1000>;
+	};
+
+	pinctrl: pinctrl@20008000 {
+		compatible = "rockchip,rk3128-pinctrl";
+		reg = <0x20008000 0xA8>,
+		      <0x200080A8 0x4C>,
+		      <0x20008118 0x20>,
+		      <0x20008100 0x04>;
+		reg-names = "base", "mux", "pull", "drv";
+		rockchip,grf = <&grf>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		gpio0: gpio0@2007c000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x2007c000 0x100>;
+			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru PCLK_GPIO0>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio1: gpio1@20080000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x20080000 0x100>;
+			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru PCLK_GPIO1>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio2: gpio2@20084000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x20084000 0x100>;
+			interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru PCLK_GPIO2>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio3: gpio2@20088000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x20088000 0x100>;
+			interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru PCLK_GPIO3>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		pcfg_pull_up: pcfg-pull-up {
+			bias-pull-up;
+		};
+
+		pcfg_pull_down: pcfg-pull-down {
+			bias-pull-down;
+		};
+
+		pcfg_pull_none: pcfg-pull-none {
+			bias-disable;
+		};
+
+		emmc {
+			/*
+			 * We run eMMC at max speed; bump up drive strength.
+			 * We also have external pulls, so disable the internal ones.
+			 */
+
+			emmc_clk: emmc-clk {
+				rockchip,pins = <2 7 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			emmc_cmd: emmc-cmd {
+				rockchip,pins = <2 4 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			emmc_pwren: emmc-pwren {
+				rockchip,pins = <2 5 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			emmc_bus8: emmc-bus8 {
+				rockchip,pins = <1 24 RK_FUNC_2 &pcfg_pull_none>,
+						<1 25 RK_FUNC_2 &pcfg_pull_none>,
+						<1 26 RK_FUNC_2 &pcfg_pull_none>,
+						<1 27 RK_FUNC_2 &pcfg_pull_none>,
+						<1 28 RK_FUNC_2 &pcfg_pull_none>,
+						<1 29 RK_FUNC_2 &pcfg_pull_none>,
+						<1 30 RK_FUNC_2 &pcfg_pull_none>,
+						<1 31 RK_FUNC_2 &pcfg_pull_none>;
+			};
+		};
+
+		nandc{
+			nandc_ale:nandc-ale {
+				rockchip,pins = <0 18 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			nandc_cle:nandc-cle {
+				rockchip,pins = <0 18 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			nandc_wrn:nandc-wrn {
+				rockchip,pins = <0 18 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			nandc_rdn:nandc-rdn {
+				rockchip,pins = <0 18 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			nandc_rdy:nandc-rdy {
+				rockchip,pins = <0 18 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			nandc_cs0:nandc-cs0 {
+				rockchip,pins = <0 18 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			nandc_data: nandc-data {
+				rockchip,pins = <0 18 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+
+		uart0 {
+			uart0_xfer: uart0-xfer {
+				rockchip,pins = <0 16 RK_FUNC_1 &pcfg_pull_none>,
+						<0 17 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			uart0_cts: uart0-cts {
+				rockchip,pins = <0 18 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			uart0_rts: uart0-rts {
+				rockchip,pins = <0 19 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		uart1 {
+			uart1_xfer: uart1-xfer {
+				rockchip,pins = <2 22 RK_FUNC_1 &pcfg_pull_none>,
+						<2 23 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+                uart2 {
+                        uart2_xfer: uart2-xfer {
+                                rockchip,pins = <1 18 RK_FUNC_2 &pcfg_pull_none>,
+                                                <1 19 RK_FUNC_2 &pcfg_pull_none>;
+                        };
+                };
+
+		sdmmc {
+			sdmmc_clk: sdmmc-clk {
+				rockchip,pins = <1 RK_PC0 1 &pcfg_pull_none>;
+			};
+
+			sdmmc_cmd: sdmmc-cmd {
+				rockchip,pins = <1 RK_PC1 1 &pcfg_pull_up>;
+			};
+
+			sdmmc_wp: sdmmc-wp {
+				rockchip,pins = <1 RK_PA7 1 &pcfg_pull_up>;
+			};
+
+			sdmmc_pwren: sdmmc-pwren {
+				rockchip,pins = <1 RK_PB6 1 &pcfg_pull_up>;
+			};
+
+			sdmmc_bus4: sdmmc-bus4 {
+				rockchip,pins = <1 RK_PC2 1 &pcfg_pull_up>,
+						<1 RK_PC3 1 &pcfg_pull_up>,
+						<1 RK_PC4 1 &pcfg_pull_up>,
+						<1 RK_PC5 1 &pcfg_pull_up>;
+			};
+		};
+
+		pwm0 {
+			pwm0_pin: pwm0-pin {
+				rockchip,pins = <0 0 RK_FUNC_2 &pcfg_pull_none>;
+			};
+		};
+
+		pwm1 {
+			pwm1_pin: pwm1-pin {
+				rockchip,pins = <0 1 RK_FUNC_2 &pcfg_pull_none>;
+			};
+		};
+
+		pwm2 {
+			pwm2_pin: pwm2-pin {
+				rockchip,pins = <0 1 2 &pcfg_pull_none>;
+			};
+		};
+
+		pwm3 {
+			pwm3_pin: pwm3-pin {
+				rockchip,pins = <0 27 1 &pcfg_pull_none>;
+			};
+		};
+
+		i2c0 {
+			i2c0_xfer: i2c0-xfer {
+				rockchip,pins = <0 2 RK_FUNC_1 &pcfg_pull_none>,
+						<0 3 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		i2c1 {
+			i2c1_xfer: i2c1-xfer {
+				rockchip,pins = <0 2 RK_FUNC_1 &pcfg_pull_none>,
+						<0 3 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		i2c2 {
+			i2c2_xfer: i2c2-xfer {
+				rockchip,pins = <0 2 RK_FUNC_1 &pcfg_pull_none>,
+						<0 3 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		i2c3 {
+			i2c3_xfer: i2c3-xfer {
+				rockchip,pins = <0 2 RK_FUNC_1 &pcfg_pull_none>,
+						<0 3 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		spi0 {
+			spi0_txd_mux0:spi0-txd-mux0 {
+				rockchip,pins = <2 4 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			spi0_rxd_mux0:spi0-rxd-mux0 {
+				rockchip,pins = <2 4 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			spi0_clk_mux0:spi0-clk-mux0 {
+				rockchip,pins = <2 4 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			spi0_cs0_mux0:spi0-cs0-mux0 {
+				rockchip,pins = <2 4 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			spi0_cs1_mux0:spi0-cs1-mux0 {
+				rockchip,pins = <2 4 RK_FUNC_2 &pcfg_pull_none>;
+			};
+		};
+
+	};
+};
diff --git a/include/dt-bindings/clock/rk3128-cru.h b/include/dt-bindings/clock/rk3128-cru.h
new file mode 100644
index 0000000000..36c8006bd2
--- /dev/null
+++ b/include/dt-bindings/clock/rk3128-cru.h
@@ -0,0 +1,187 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3128_H
+#define _DT_BINDINGS_CLK_ROCKCHIP_RK3128_H
+
+/* core clocks */
+#define PLL_APLL		1
+#define PLL_DPLL		2
+#define PLL_GPLL		3
+#define ARMCLK			4
+
+/* sclk gates (special clocks) */
+#define SCLK_GPU		64
+#define SCLK_SPI		65
+#define SCLK_SDMMC		68
+#define SCLK_SDIO		69
+#define SCLK_EMMC		71
+#define SCLK_NANDC		76
+#define SCLK_UART0		77
+#define SCLK_UART1		78
+#define SCLK_UART2		79
+#define SCLK_I2S		82
+#define SCLK_SPDIF		83
+#define SCLK_TIMER0		85
+#define SCLK_TIMER1		86
+#define SCLK_TIMER2		87
+#define SCLK_TIMER3		88
+#define SCLK_OTGPHY0		93
+#define SCLK_LCDC		100
+#define SCLK_HDMI		109
+#define SCLK_HEVC		111
+#define SCLK_I2S_OUT		113
+#define SCLK_SDMMC_DRV		114
+#define SCLK_SDIO_DRV		115
+#define SCLK_EMMC_DRV		117
+#define SCLK_SDMMC_SAMPLE	118
+#define SCLK_SDIO_SAMPLE	119
+#define SCLK_EMMC_SAMPLE	121
+#define SCLK_PVTM_CORE          123
+#define SCLK_PVTM_GPU           124
+#define SCLK_PVTM_VIDEO         125
+#define SCLK_MAC		151
+#define SCLK_MACREF		152
+#define SCLK_SFC		160
+
+#define DCLK_LCDC		190
+
+/* aclk gates */
+#define ACLK_DMAC2		194
+#define ACLK_LCDC		197
+#define ACLK_VIO		203
+#define ACLK_VCODEC		208
+#define ACLK_CPU		209
+#define ACLK_PERI		210
+
+/* pclk gates */
+#define PCLK_GPIO0		320
+#define PCLK_GPIO1		321
+#define PCLK_GPIO2		322
+#define PCLK_GPIO3		323
+#define PCLK_GRF		329
+#define PCLK_I2C0		332
+#define PCLK_I2C1		333
+#define PCLK_I2C2		334
+#define PCLK_I2C3		335
+#define PCLK_SPI		338
+#define PCLK_UART0		341
+#define PCLK_UART1		342
+#define PCLK_UART2		343
+#define PCLK_PWM		350
+#define PCLK_TIMER		353
+#define PCLK_HDMI		360
+#define PCLK_CPU		362
+#define PCLK_PERI		363
+#define PCLK_DDRUPCTL		364
+#define PCLK_WDT		368
+
+/* hclk gates */
+#define HCLK_OTG0		449
+#define HCLK_OTG1		450
+#define HCLK_NANDC		453
+#define HCLK_SDMMC		456
+#define HCLK_SDIO		457
+#define HCLK_EMMC		459
+#define HCLK_I2S		462
+#define HCLK_LCDC		465
+#define HCLK_ROM		467
+#define HCLK_VIO_BUS		472
+#define HCLK_VCODEC		476
+#define HCLK_CPU		477
+#define HCLK_PERI		478
+
+#define CLK_NR_CLKS		(HCLK_PERI + 1)
+
+/* soft-reset indices */
+#define SRST_CORE0		0
+#define SRST_CORE1		1
+#define SRST_CORE0_DBG		4
+#define SRST_CORE1_DBG		5
+#define SRST_CORE0_POR		8
+#define SRST_CORE1_POR		9
+#define SRST_L2C		12
+#define SRST_TOPDBG		13
+#define SRST_STRC_SYS_A		14
+#define SRST_PD_CORE_NIU	15
+
+#define SRST_TIMER2		16
+#define SRST_CPUSYS_H		17
+#define SRST_AHB2APB_H		19
+#define SRST_TIMER3		20
+#define SRST_INTMEM		21
+#define SRST_ROM		22
+#define SRST_PERI_NIU		23
+#define SRST_I2S		24
+#define SRST_DDR_PLL		25
+#define SRST_GPU_DLL		26
+#define SRST_TIMER0		27
+#define SRST_TIMER1		28
+#define SRST_CORE_DLL		29
+#define SRST_EFUSE_P		30
+#define SRST_ACODEC_P		31
+
+#define SRST_GPIO0		32
+#define SRST_GPIO1		33
+#define SRST_GPIO2		34
+#define SRST_UART0		39
+#define SRST_UART1		40
+#define SRST_UART2		41
+#define SRST_I2C0		43
+#define SRST_I2C1		44
+#define SRST_I2C2		45
+#define SRST_SFC		47
+
+#define SRST_PWM0		48
+#define SRST_DAP		51
+#define SRST_DAP_SYS		52
+#define SRST_GRF		55
+#define SRST_PERIPHSYS_A	57
+#define SRST_PERIPHSYS_H	58
+#define SRST_PERIPHSYS_P	59
+#define SRST_CPU_PERI		61
+#define SRST_EMEM_PERI		62
+#define SRST_USB_PERI		63
+
+#define SRST_DMA2		64
+#define SRST_MAC		66
+#define SRST_NANDC		68
+#define SRST_USBOTG0		69
+#define SRST_OTGC0		71
+#define SRST_USBOTG1		72
+#define SRST_OTGC1		74
+#define SRST_DDRMSCH		79
+
+#define SRST_MMC0		81
+#define SRST_SDIO		82
+#define SRST_EMMC		83
+#define SRST_SPI0		84
+#define SRST_WDT		86
+#define SRST_DDRPHY		88
+#define SRST_DDRPHY_P		89
+#define SRST_DDRCTRL		90
+#define SRST_DDRCTRL_P		91
+
+#define SRST_HDMI_P		96
+#define SRST_VIO_BUS_H		99
+#define SRST_UTMI0		103
+#define SRST_UTMI1		104
+#define SRST_USBPOR		105
+
+#define SRST_VCODEC_A		112
+#define SRST_VCODEC_H		113
+#define SRST_VIO1_A		114
+#define SRST_HEVC		115
+#define SRST_VCODEC_NIU_A	116
+#define SRST_LCDC1_A		117
+#define SRST_LCDC1_H		118
+#define SRST_LCDC1_D		119
+#define SRST_GPU		120
+#define SRST_GPU_NIU_A		122
+
+#define SRST_DBG_P		131
+
+#endif

commit 7336d5ed65203829a2da3e1e0b94f245b5384d36
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 27 17:56:57 2017 +0800

    rockchip: mkimage: add support for rk3128 soc
    
    Add support for rk3128 package header in mkimage tool.
    
    Change-Id: Ida30dda9c3bceccc81dad0780f2a46d97e13c38c
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index 04e8272fd5..1a24e16589 100644
--- a/tools/rkcommon.c
+++ b/tools/rkcommon.c
@@ -73,6 +73,7 @@ struct spl_info {
 
 static struct spl_info spl_infos[] = {
 	{ "rk3036", "RK30", 0x1000, false, false },
+	{ "rk3128", "RK31", 0x1800, false, false },
 	{ "rk3188", "RK31", 0x8000 - 0x800, true, false },
 	{ "rk322x", "RK32", 0x8000 - 0x1000, false, false },
 	{ "rk3288", "RK32", 0x8000, false, false },

commit 6c9bca3c0bb6c6793cb095ea18cfba3b815ca5c2
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 27 16:58:51 2017 +0800

    rockchip: clk: fix typo in rk322x clock driver
    
    Fix typo RK322X/RK3036 in rk322x clock driver.
    
    Change-Id: If06fc94761519c215c6a3ddc3de5f54c8b949c8f
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c
index 431972ef18..6bbfde47f8 100644
--- a/drivers/clk/rockchip/clk_rk322x.c
+++ b/drivers/clk/rockchip/clk_rk322x.c
@@ -391,7 +391,7 @@ static int rk322x_clk_bind(struct udevice *dev)
 	/* The reset driver does not have a device node, so bind it here */
 	ret = device_bind_driver(gd->dm_root, "rk322x_sysreset", "reset", &dev);
 	if (ret)
-		debug("Warning: No RK3036 reset driver: ret=%d\n", ret);
+		debug("Warning: No RK322x reset driver: ret=%d\n", ret);
 
 	return 0;
 }

commit f63defb363a973673bb3bd152f64271a9d9ba726
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 27 17:01:11 2017 +0800

    rockchip: rk3036: fix grf macro define
    
    Some of macros definition are not correct, fix them according to TRM.
    
    Change-Id: If3b7ec621425f1eb1c432b39bf826c896196130b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3036.h b/arch/arm/include/asm/arch-rockchip/grf_rk3036.h
index 7625f249bd..d995b7db14 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rk3036.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3036.h
@@ -209,10 +209,10 @@ enum {
 	GPIO1A3_I2S_LRCKTX,
 
 	GPIO1A2_SHIFT		= 4,
-	GPIO1A2_MASK		= 6 << GPIO1A2_SHIFT,
+	GPIO1A2_MASK		= 3 << GPIO1A2_SHIFT,
 	GPIO1A2_GPIO		= 0,
 	GPIO1A2_I2S_LRCKRX,
-	GPIO1A2_I2S_PWM1_0,
+	GPIO1A2_PWM1_0,
 
 	GPIO1A1_SHIFT		= 2,
 	GPIO1A1_MASK		= 1 << GPIO1A1_SHIFT,

commit 1e2dd4672e4eeb4379c367a5299c98a276a04ed5
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Sep 25 16:31:56 2017 +0800

    rockchip: rk3188: ram: add support for 16bit row address
    
    RK3188 using the same ddr_conf for both 15 bit and 16 bit row address.
    
    Change-Id: If78e4922d85250f6962dcb17e17cd3ac5e480673
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram_rk3188.c b/drivers/ram/rockchip/sdram_rk3188.c
index 9d8b225dfa..365d00ef54 100644
--- a/drivers/ram/rockchip/sdram_rk3188.c
+++ b/drivers/ram/rockchip/sdram_rk3188.c
@@ -682,11 +682,18 @@ out:
 
 static int sdram_get_niu_config(struct rk3188_sdram_params *sdram_params)
 {
-	int i, tmp, size, ret = 0;
+	int i, tmp, size, row, ret = 0;
 
+	row = sdram_params->ch[0].cs0_row;
+	/*
+	 * RK3188 share the rank and row bit15, we use same ddr config for 15bit
+	 * and 16bit row
+	 */
+	if (row == 16)
+		row = 15;
 	tmp = sdram_params->ch[0].col - 9;
 	tmp -= (sdram_params->ch[0].bw == 2) ? 0 : 1;
-	tmp |= ((sdram_params->ch[0].cs0_row - 13) << 4);
+	tmp |= ((row - 13) << 4);
 	size = sizeof(ddrconf_table)/sizeof(ddrconf_table[0]);
 	for (i = 0; i < size; i++)
 		if (tmp == ddrconf_table[i])

commit 010527dddb7e56aa77926f6e041142cd87b8b8de
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Sep 14 11:29:55 2017 +0800

    evb-rk3229: do not modify the boot cmd
    
    Change-Id: I50afc490de2faf58c92716cff5853245f9dcc0e2
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/evb_rk3229.h b/include/configs/evb_rk3229.h
index 8906c8f0b1..b0efb47802 100644
--- a/include/configs/evb_rk3229.h
+++ b/include/configs/evb_rk3229.h
@@ -19,34 +19,10 @@
 
 #ifndef CONFIG_SPL_BUILD
 /* Enable gpt partition table */
-#undef PARTS_DEFAULT
-#define PARTS_DEFAULT \
-	"uuid_disk=${uuid_gpt_disk};" \
-	"name=loader_a,start=4M,size=4M,uuid=${uuid_gpt_loader};" \
-	"name=loader_b,size=4M,uuid=${uuid_gpt_reserved};" \
-	"name=trust_a,size=4M,uuid=${uuid_gpt_reserved};" \
-	"name=trust_b,size=4M,uuid=${uuid_gpt_reserved};" \
-	"name=misc,size=4M,uuid=${uuid_gpt_misc};" \
-	"name=metadata,size=16M,uuid=${uuid_gpt_metadata};" \
-	"name=boot_a,size=32M,uuid=${uuid_gpt_boot_a};" \
-	"name=boot_b,size=32M,uuid=${uuid_gpt_boot_b};" \
-	"name=system_a,size=818M,uuid=${uuid_gpt_system_a};" \
-	"name=system_b,size=818M,uuid=${uuid_gpt_system_b};" \
-	"name=vendor_a,size=50M,uuid=${uuid_gpt_vendor_a};" \
-	"name=vendor_b,size=50M,uuid=${uuid_gpt_vendor_b};" \
-	"name=cache,size=100M,uuid=${uuid_gpt_cache};" \
-	"name=persist,size=4M,uuid=${uuid_gpt_persist};" \
-	"name=userdata,size=-,uuid=${uuid_gpt_userdata};\0" \
-
 #define CONFIG_PREBOOT
 
 #define CONFIG_SYS_BOOT_RAMDISK_HIGH
 
-#undef CONFIG_BOOTCOMMAND
-#define CONFIG_BOOTCOMMAND \
-	"mmc read 0x61000000 0x8000 0x5000;" \
-	"bootm 0x61000000" \
-
 /* Enable atags */
 #define CONFIG_SYS_BOOTPARAMS_LEN	(64*1024)
 #define CONFIG_INITRD_TAG

commit b398a9a7fa47edd24de23d1fa8f06a44b942891d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Sep 18 19:41:54 2017 +0800

    dm: input: add implementation of driver model key uclass
    
    Change-Id: I379b694dfaee14ed23cc7abfa05aff77933bb725
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig
index b3873c140d..1ea90bf9d9 100644
--- a/drivers/input/Kconfig
+++ b/drivers/input/Kconfig
@@ -7,6 +7,12 @@ config DM_KEYBOARD
 	  includes methods to start/stop the device, check for available
 	  input and update LEDs if the keyboard has them.
 
+config DM_KEY
+	bool "Enable driver model key support"
+	depends on DM
+	help
+	  This adds a simple uclass for key.
+
 config CROS_EC_KEYB
 	bool "Enable Chrome OS EC keyboard support"
 	help
diff --git a/drivers/input/Makefile b/drivers/input/Makefile
index 9109ac6dba..dfe46a037d 100644
--- a/drivers/input/Makefile
+++ b/drivers/input/Makefile
@@ -6,6 +6,7 @@
 #
 
 obj-$(CONFIG_DM_KEYBOARD) += keyboard-uclass.o
+obj-$(CONFIG_DM_KEY) += key-uclass.o
 
 obj-$(CONFIG_I8042_KEYB) += i8042.o
 obj-$(CONFIG_TEGRA_KEYBOARD) += tegra-kbc.o
diff --git a/drivers/input/key-uclass.c b/drivers/input/key-uclass.c
new file mode 100644
index 0000000000..0d38fbda81
--- /dev/null
+++ b/drivers/input/key-uclass.c
@@ -0,0 +1,23 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <dm.h>
+#include <key.h>
+
+int key_read(struct udevice *dev)
+{
+	const struct dm_key_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->read)
+		return -ENOSYS;
+
+	return ops->read(dev);
+}
+
+UCLASS_DRIVER(key) = {
+	.id		= UCLASS_KEY,
+	.name		= "key",
+};
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index d3d11c86de..e3b9e5b0c9 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -90,6 +90,7 @@ enum uclass_id {
 	UCLASS_VIDEO_CONSOLE,	/* Text console driver for video device */
 	UCLASS_WDT,		/* Watchdot Timer driver */
 	UCLASS_FG,
+	UCLASS_KEY,
 
 	UCLASS_COUNT,
 	UCLASS_INVALID = -1,
diff --git a/include/key.h b/include/key.h
new file mode 100644
index 0000000000..56ae16681f
--- /dev/null
+++ b/include/key.h
@@ -0,0 +1,22 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _KEY_H_
+#define _KEY_H_
+
+enum key_state {
+	KEY_PRESS_NONE,
+	KEY_PRESS_UP,
+	KEY_PRESS_DOWN,
+};
+
+struct dm_key_ops {
+	int (*read)(struct udevice *dev);
+};
+
+int key_read(struct udevice *dev);
+
+#endif

commit a7ca45e88e535311cd6ea86349f00ec90f5a4b61
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 19 17:54:40 2017 +0800

    dm: power: add implementation of driver model fuel gauge uclass
    
    Change-Id: I48fa0340d49cc1bc39c91223ac04e98790e0bee2
    Signed-off-by: shengfei Xu <xsf@rock-chips.com>

diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index d8c107e206..0f4ca0ea40 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -2,6 +2,8 @@ menu "Power"
 
 source "drivers/power/domain/Kconfig"
 
+source "drivers/power/fuel_gauge/Kconfig"
+
 source "drivers/power/pmic/Kconfig"
 
 source "drivers/power/regulator/Kconfig"
diff --git a/drivers/power/fuel_gauge/Kconfig b/drivers/power/fuel_gauge/Kconfig
new file mode 100644
index 0000000000..8b08a90f99
--- /dev/null
+++ b/drivers/power/fuel_gauge/Kconfig
@@ -0,0 +1,6 @@
+config DM_FUEL_GAUGE
+	bool "Enable driver model fuel gauge support"
+	depends on DM
+	help
+	  This adds a simple uclass for fuel gauge.
+
diff --git a/drivers/power/fuel_gauge/Makefile b/drivers/power/fuel_gauge/Makefile
index 3b349f939a..75d762e01f 100644
--- a/drivers/power/fuel_gauge/Makefile
+++ b/drivers/power/fuel_gauge/Makefile
@@ -5,4 +5,6 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
 
+obj-$(CONFIG_DM_FUEL_GAUGE) += fuel_gauge_uclass.o
+
 obj-$(CONFIG_POWER_FG_MAX17042) += fg_max17042.o
diff --git a/drivers/power/fuel_gauge/fuel_gauge_uclass.c b/drivers/power/fuel_gauge/fuel_gauge_uclass.c
new file mode 100644
index 0000000000..a1c4f65854
--- /dev/null
+++ b/drivers/power/fuel_gauge/fuel_gauge_uclass.c
@@ -0,0 +1,46 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <errno.h>
+#include <dm.h>
+#include <power/fuel_gauge.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int fuel_gauge_get_voltage(struct udevice *dev)
+{
+	const struct dm_fuel_gauge_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->get_voltage)
+		return -ENOSYS;
+
+	return ops->get_voltage(dev);
+}
+
+int fuel_gauge_get_soc(struct udevice *dev)
+{
+	const struct dm_fuel_gauge_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->get_soc)
+		return -ENOSYS;
+
+	return ops->get_soc(dev);
+}
+
+bool fuel_gauge_get_chrg_online(struct udevice *dev)
+{
+	const struct dm_fuel_gauge_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->get_chrg_online)
+		return -ENOSYS;
+
+	return ops->get_chrg_online(dev);
+}
+
+UCLASS_DRIVER(fuelxguage) = {
+	.id		= UCLASS_FG,
+	.name		= "fuel_gauge",
+};
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 3fc20834ae..d3d11c86de 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -89,6 +89,7 @@ enum uclass_id {
 	UCLASS_VIDEO_BRIDGE,	/* Video bridge, e.g. DisplayPort to LVDS */
 	UCLASS_VIDEO_CONSOLE,	/* Text console driver for video device */
 	UCLASS_WDT,		/* Watchdot Timer driver */
+	UCLASS_FG,
 
 	UCLASS_COUNT,
 	UCLASS_INVALID = -1,
diff --git a/include/power/fuel_gauge.h b/include/power/fuel_gauge.h
new file mode 100644
index 0000000000..14714c343d
--- /dev/null
+++ b/include/power/fuel_gauge.h
@@ -0,0 +1,20 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _FUEL_GAUGE_H_
+#define _FUEL_GAUGE_H_
+
+struct dm_fuel_gauge_ops {
+	int (*get_soc)(struct udevice *dev);
+	int (*get_voltage)(struct udevice *dev);
+	bool (*get_chrg_online)(struct udevice *dev);
+};
+
+int fuel_gauge_get_soc(struct udevice *dev);
+int fuel_gauge_get_voltage(struct udevice *dev);
+bool fuel_gauge_get_chrg_online(struct udevice *dev);
+
+#endif

commit 9e741d50b7d57696ee88200832d3d6759d25321f
Author: Wu Liang feng <wulf@rock-chips.com>
Date:   Wed Sep 20 10:35:48 2017 +0800

    rockchip: dts: rk3328: add usb2 phy nodes
    
    RK3328 has one USB 2.0 PHY consist of two usb ports,
    one port is used for DWC2 controller, the other port
    is shared between EHCI and OHCI controllers.
    
    Change-Id: Ie016fd4a7990f54b25de4523b2b762f0b399a729
    Signed-off-by: Wu Liang feng <wulf@rock-chips.com>

diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts
index f71690f643..36c0c0097d 100644
--- a/arch/arm/dts/rk3328-evb.dts
+++ b/arch/arm/dts/rk3328-evb.dts
@@ -70,6 +70,18 @@
 	status = "okay";
 };
 
+&u2phy {
+        status = "okay";
+};
+
+&u2phy_otg {
+        status = "okay";
+};
+
+&u2phy_host {
+        status = "okay";
+};
+
 &usb_host0_ehci {
 	status = "okay";
 };
diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi
index 0bab1e33cc..51da1e9ab7 100644
--- a/arch/arm/dts/rk3328.dtsi
+++ b/arch/arm/dts/rk3328.dtsi
@@ -422,6 +422,44 @@
 			<32768>, <32768>;
 	};
 
+	usb2phy_grf: syscon-usb@ff450000 {
+		compatible = "rockchip,rk3328-usb2phy-grf",
+			     "simple-mfd", "syscon";
+		reg = <0x0 0xff450000 0x0 0x10000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		u2phy: usb2-phy@100 {
+			compatible = "rockchip,rk3328-usb2phy";
+			reg = <0x100 0x10>;
+			clocks = <&xin24m>;
+			clock-names = "phyclk";
+			clock-output-names = "usb480m_phy";
+			#clock-cells = <0>;
+			assigned-clocks = <&cru USB480M>;
+			assigned-clock-parents = <&u2phy>;
+			#phy-cells = <1>;
+			status = "disabled";
+
+			u2phy_otg: otg-port {
+				#phy-cells = <0>;
+				interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
+					     <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
+					     <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
+				interrupt-names = "otg-bvalid", "otg-id",
+						  "linestate";
+				status = "disabled";
+			};
+
+			u2phy_host: host-port {
+				#phy-cells = <0>;
+				interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+				interrupt-names = "linestate";
+				status = "disabled";
+			};
+		};
+	};
+
 	sdmmc: rksdmmc@ff500000 {
 		compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
 		reg = <0x0 0xff500000 0x0 0x4000>;
@@ -460,6 +498,8 @@
 		compatible = "generic-ehci";
 		reg = <0x0 0xff5c0000 0x0 0x10000>;
 		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+		phys = <&u2phy 1>;
+		phy-names = "usb";
 		status = "disabled";
 	};
 
@@ -467,6 +507,8 @@
 		compatible = "generic-ohci";
 		reg = <0x0 0xff5d0000 0x0 0x10000>;
 		interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+		phys = <&u2phy 1>;
+		phy-names = "usb";
 		status = "disabled";
 	};
 
@@ -477,6 +519,8 @@
 		interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 		hnp-srp-disable;
 		dr_mode = "otg";
+		phys = <&u2phy 0>;
+		phy-names = "usb";
 		status = "disabled";
 	};
 

commit b125c7115c8de4b77304ae7027b1d2d7f7cf7e5b
Author: Wu Liang feng <wulf@rock-chips.com>
Date:   Mon Sep 25 22:11:43 2017 +0800

    configs: rv1108: enable usb2 phy driver
    
    Add defconfig to enable generic PHY framework and USB 2.0 PHY
    driver which used for DWC2, EHCI and OHCI usb controllers.
    
    Change-Id: Ib238269faa5046b8853590d6de3ade3ca38e6882
    Signed-off-by: Wu Liang feng <wulf@rock-chips.com>

diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig
index 7036f433ee..3df3d97664 100644
--- a/configs/evb-rv1108_defconfig
+++ b/configs/evb-rv1108_defconfig
@@ -23,6 +23,8 @@ CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y

commit 2e595678abed3336e738dd120daffd2b11bf04f9
Author: Wu Liang feng <wulf@rock-chips.com>
Date:   Wed Sep 20 10:26:06 2017 +0800

    configs: rk3328: enable usb2 phy driver
    
    Add defconfig to enable generic PHY framework and USB 2.0 PHY
    driver which used for DWC2, EHCI and OHCI usb controllers.
    
    Change-Id: I93fa29843f6f6d4d43e3e4939225bc2f79ad3131
    Signed-off-by: Wu Liang feng <wulf@rock-chips.com>

diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index 6d0f3af7a3..ddcc868d74 100644
--- a/configs/evb-rk3328_defconfig
+++ b/configs/evb-rk3328_defconfig
@@ -25,6 +25,8 @@ CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_ROCKCHIP_RK3328=y
 CONFIG_DM_PMIC=y

commit f0c40dcdc2ca7d6522efeee4bd2e42dc8e3e8ab2
Author: Wu Liang feng <wulf@rock-chips.com>
Date:   Wed Sep 20 10:06:30 2017 +0800

    phy: add a new driver for rockchip usb2 phy
    
    This phy driver supports for rockchip SoCs with USB 2.0
    PHY consist of Innosilicon PHY. It can be used for the
    PHY with two usb ports, typically, one port is used for
    DWC2, the other port is shared between the EHCI and OHCI
    controllers.
    
    Change-Id: I00634c5fcfd93ed55b8332e27d915ca587bd2783
    Signed-off-by: Wu Liang feng <wulf@rock-chips.com>

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 98f2a1b047..a5717a1e2a 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -59,6 +59,12 @@ config SPL_NOP_PHY
 	  This is useful when a driver uses the PHY framework but no real PHY
 	  hardware exists.
 
+config PHY_ROCKCHIP_INNO_USB2
+	bool "Support Rockchip INNO USB2PHY"
+	depends on PHY && ARCH_ROCKCHIP
+	help
+	  Support for Rockchip USB 2.0 PHY with Innosilicon IP block.
+
 config PIPE3_PHY
 	bool "Support omap's PIPE3 PHY"
 	depends on PHY && ARCH_OMAP2PLUS
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index ab56c46bb4..2b8f47eee4 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -7,5 +7,6 @@
 
 obj-$(CONFIG_$(SPL_)PHY) += phy-uclass.o
 obj-$(CONFIG_$(SPL_)NOP_PHY) += nop-phy.o
+obj-$(CONFIG_PHY_ROCKCHIP_INNO_USB2) += phy-rockchip-inno-usb2.o
 obj-$(CONFIG_PHY_SANDBOX) += sandbox-phy.o
 obj-$(CONFIG_$(SPL_)PIPE3_PHY) += ti-pipe3-phy.o
diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
new file mode 100644
index 0000000000..1f56976980
--- /dev/null
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -0,0 +1,680 @@
+/*
+ * Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <common.h>
+#include <dm.h>
+#include <generic-phy.h>
+#include <syscon.h>
+
+#define U2PHY_BIT_WRITEABLE_SHIFT	16
+#define CHG_DCD_MAX_RETRIES		6
+#define CHG_PRI_MAX_RETRIES		2
+#define CHG_DCD_POLL_TIME		100	/* millisecond */
+#define CHG_PRIMARY_DET_TIME		40	/* millisecond */
+#define CHG_SECONDARY_DET_TIME		40	/* millisecond */
+
+struct rockchip_usb2phy;
+
+enum power_supply_type {
+	POWER_SUPPLY_TYPE_UNKNOWN = 0,
+	POWER_SUPPLY_TYPE_USB,		/* Standard Downstream Port */
+	POWER_SUPPLY_TYPE_USB_DCP,	/* Dedicated Charging Port */
+	POWER_SUPPLY_TYPE_USB_CDP,	/* Charging Downstream Port */
+	POWER_SUPPLY_TYPE_USB_FLOATING,	/* DCP without shorting D+/D- */
+};
+
+enum rockchip_usb2phy_port_id {
+	USB2PHY_PORT_OTG,
+	USB2PHY_PORT_HOST,
+	USB2PHY_NUM_PORTS,
+};
+
+struct usb2phy_reg {
+	u32	offset;
+	u32	bitend;
+	u32	bitstart;
+	u32	disable;
+	u32	enable;
+};
+
+/**
+ * struct rockchip_chg_det_reg: usb charger detect registers
+ * @cp_det: charging port detected successfully.
+ * @dcp_det: dedicated charging port detected successfully.
+ * @dp_det: assert data pin connect successfully.
+ * @idm_sink_en: open dm sink curren.
+ * @idp_sink_en: open dp sink current.
+ * @idp_src_en: open dm source current.
+ * @rdm_pdwn_en: open dm pull down resistor.
+ * @vdm_src_en: open dm voltage source.
+ * @vdp_src_en: open dp voltage source.
+ * @opmode: utmi operational mode.
+ */
+struct rockchip_chg_det_reg {
+	struct usb2phy_reg	cp_det;
+	struct usb2phy_reg	dcp_det;
+	struct usb2phy_reg	dp_det;
+	struct usb2phy_reg	idm_sink_en;
+	struct usb2phy_reg	idp_sink_en;
+	struct usb2phy_reg	idp_src_en;
+	struct usb2phy_reg	rdm_pdwn_en;
+	struct usb2phy_reg	vdm_src_en;
+	struct usb2phy_reg	vdp_src_en;
+	struct usb2phy_reg	opmode;
+};
+
+/**
+ * struct rockchip_usb2phy_port_cfg: usb-phy port configuration.
+ * @phy_sus: phy suspend register.
+ * @bvalid_det_en: vbus valid rise detection enable register.
+ * @bvalid_det_st: vbus valid rise detection status register.
+ * @bvalid_det_clr: vbus valid rise detection clear register.
+ * @ls_det_en: linestate detection enable register.
+ * @ls_det_st: linestate detection state register.
+ * @ls_det_clr: linestate detection clear register.
+ * @iddig_output: iddig output from grf.
+ * @iddig_en: utmi iddig select between grf and phy,
+ *	      0: from phy; 1: from grf
+ * @idfall_det_en: id fall detection enable register.
+ * @idfall_det_st: id fall detection state register.
+ * @idfall_det_clr: id fall detection clear register.
+ * @idrise_det_en: id rise detection enable register.
+ * @idrise_det_st: id rise detection state register.
+ * @idrise_det_clr: id rise detection clear register.
+ * @utmi_avalid: utmi vbus avalid status register.
+ * @utmi_bvalid: utmi vbus bvalid status register.
+ * @utmi_iddig: otg port id pin status register.
+ * @utmi_ls: utmi linestate state register.
+ * @utmi_hstdet: utmi host disconnect register.
+ * @vbus_det_en: vbus detect function power down register.
+ */
+struct rockchip_usb2phy_port_cfg {
+	struct usb2phy_reg	phy_sus;
+	struct usb2phy_reg	bvalid_det_en;
+	struct usb2phy_reg	bvalid_det_st;
+	struct usb2phy_reg	bvalid_det_clr;
+	struct usb2phy_reg	ls_det_en;
+	struct usb2phy_reg	ls_det_st;
+	struct usb2phy_reg	ls_det_clr;
+	struct usb2phy_reg	iddig_output;
+	struct usb2phy_reg	iddig_en;
+	struct usb2phy_reg	idfall_det_en;
+	struct usb2phy_reg	idfall_det_st;
+	struct usb2phy_reg	idfall_det_clr;
+	struct usb2phy_reg	idrise_det_en;
+	struct usb2phy_reg	idrise_det_st;
+	struct usb2phy_reg	idrise_det_clr;
+	struct usb2phy_reg	utmi_avalid;
+	struct usb2phy_reg	utmi_bvalid;
+	struct usb2phy_reg	utmi_iddig;
+	struct usb2phy_reg	utmi_ls;
+	struct usb2phy_reg	utmi_hstdet;
+	struct usb2phy_reg	vbus_det_en;
+};
+
+/**
+ * struct rockchip_usb2phy_cfg: usb-phy configuration.
+ * @reg: the address offset of grf for usb-phy config.
+ * @num_ports: specify how many ports that the phy has.
+ * @phy_tuning: phy default parameters tunning.
+ * @clkout_ctl: keep on/turn off output clk of phy.
+ * @chg_det: charger detection registers.
+ */
+struct rockchip_usb2phy_cfg {
+	u32	reg;
+	u32	num_ports;
+	int (*phy_tuning)(struct rockchip_usb2phy *);
+	struct usb2phy_reg	clkout_ctl;
+	const struct rockchip_usb2phy_port_cfg	port_cfgs[USB2PHY_NUM_PORTS];
+	const struct rockchip_chg_det_reg	chg_det;
+};
+
+/**
+ * @dcd_retries: The retry count used to track Data contact
+ *		 detection process.
+ * @primary_retries: The retry count used to do usb bc detection
+ *		     primary stage.
+ * @grf: General Register Files register base.
+ * @usbgrf_base : USB General Register Files register base.
+ * @phy_cfg: phy register configuration, assigned by driver data.
+ */
+struct rockchip_usb2phy {
+	u8		dcd_retries;
+	u8		primary_retries;
+	void __iomem	*grf_base;
+	void __iomem	*usbgrf_base;
+	const struct rockchip_usb2phy_cfg	*phy_cfg;
+};
+
+static inline void __iomem *get_reg_base(struct rockchip_usb2phy *rphy)
+{
+	return !rphy->usbgrf_base ? rphy->grf_base : rphy->usbgrf_base;
+}
+
+static inline int property_enable(void __iomem *base,
+				  const struct usb2phy_reg *reg, bool en)
+{
+	u32 val, mask, tmp;
+
+	tmp = en ? reg->enable : reg->disable;
+	mask = GENMASK(reg->bitend, reg->bitstart);
+	val = (tmp << reg->bitstart) | (mask << U2PHY_BIT_WRITEABLE_SHIFT);
+
+	return writel(val, base + reg->offset);
+}
+
+static inline bool property_enabled(void __iomem *base,
+				    const struct usb2phy_reg *reg)
+{
+	u32 tmp, orig;
+	u32 mask = GENMASK(reg->bitend, reg->bitstart);
+
+	orig = readl(base + reg->offset);
+
+	tmp = (orig & mask) >> reg->bitstart;
+
+	return tmp == reg->enable;
+}
+
+static const char *chg_to_string(enum power_supply_type chg_type)
+{
+	switch (chg_type) {
+	case POWER_SUPPLY_TYPE_USB:
+		return "USB_SDP_CHARGER";
+	case POWER_SUPPLY_TYPE_USB_DCP:
+		return "USB_DCP_CHARGER";
+	case POWER_SUPPLY_TYPE_USB_CDP:
+		return "USB_CDP_CHARGER";
+	case POWER_SUPPLY_TYPE_USB_FLOATING:
+		return "USB_FLOATING_CHARGER";
+	default:
+		return "INVALID_CHARGER";
+	}
+}
+
+static void rockchip_chg_enable_dcd(struct rockchip_usb2phy *rphy,
+				    bool en)
+{
+	void __iomem *base = get_reg_base(rphy);
+
+	property_enable(base, &rphy->phy_cfg->chg_det.rdm_pdwn_en, en);
+	property_enable(base, &rphy->phy_cfg->chg_det.idp_src_en, en);
+}
+
+static void rockchip_chg_enable_primary_det(struct rockchip_usb2phy *rphy,
+					    bool en)
+{
+	void __iomem *base = get_reg_base(rphy);
+
+	property_enable(base, &rphy->phy_cfg->chg_det.vdp_src_en, en);
+	property_enable(base, &rphy->phy_cfg->chg_det.idm_sink_en, en);
+}
+
+static void rockchip_chg_enable_secondary_det(struct rockchip_usb2phy *rphy,
+					      bool en)
+{
+	void __iomem *base = get_reg_base(rphy);
+
+	property_enable(base, &rphy->phy_cfg->chg_det.vdm_src_en, en);
+	property_enable(base, &rphy->phy_cfg->chg_det.idp_sink_en, en);
+}
+
+static bool rockchip_chg_primary_det_retry(struct rockchip_usb2phy *rphy)
+{
+	bool vout = false;
+
+	while (rphy->primary_retries--) {
+		/* voltage source on DP, probe on DM */
+		rockchip_chg_enable_primary_det(rphy, true);
+		mdelay(CHG_PRIMARY_DET_TIME);
+		vout = property_enabled(rphy->grf_base,
+					&rphy->phy_cfg->chg_det.cp_det);
+		if (vout)
+			break;
+	}
+
+	return vout;
+}
+
+int rockchip_chg_get_type(void)
+{
+	const struct rockchip_usb2phy_cfg *phy_cfgs;
+	enum power_supply_type chg_type;
+	struct rockchip_usb2phy rphy;
+	struct udevice *dev;
+	ofnode u2phy_node, grf_node;
+	fdt_size_t size;
+	u32 reg, index;
+	bool is_dcd, vout;
+	int ret;
+
+	u2phy_node = ofnode_null();
+	grf_node = ofnode_null();
+
+	u2phy_node = ofnode_path("/usb2-phy");
+
+	if (!ofnode_valid(u2phy_node)) {
+		grf_node = ofnode_path("/syscon-usb");
+		if (ofnode_valid(grf_node))
+			u2phy_node = ofnode_find_subnode(grf_node,
+							 "usb2-phy");
+	}
+
+	if (!ofnode_valid(u2phy_node)) {
+		printf("%s: missing u2phy node\n", __func__);
+		return -EINVAL;
+	}
+
+	if (ofnode_valid(grf_node)) {
+		rphy.grf_base =
+			(void __iomem *)ofnode_get_addr_size(grf_node,
+							     "reg", &size);
+	} else {
+		if (ofnode_read_bool(u2phy_node, "rockchip,grf"))
+			rphy.grf_base =
+				syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	}
+
+	if (rphy.grf_base <= 0) {
+		dev_err(dev, "get syscon grf failed\n");
+		return -EINVAL;
+	}
+
+	if (ofnode_read_u32(u2phy_node, "reg", &reg)) {
+		printf("%s: could not read reg\n", __func__);
+		return -EINVAL;
+	}
+
+	if (ofnode_read_bool(u2phy_node, "rockchip,usbgrf")) {
+		rphy.usbgrf_base =
+			syscon_get_first_range(ROCKCHIP_SYSCON_USBGRF);
+		if (rphy.usbgrf_base <= 0) {
+			dev_err(dev, "get syscon usbgrf failed\n");
+			return -EINVAL;
+		}
+	} else {
+		rphy.usbgrf_base = NULL;
+	}
+
+	ret = uclass_get_device_by_ofnode(UCLASS_PHY, u2phy_node, &dev);
+	if (ret) {
+		printf("%s: uclass_get_device_by_ofnode failed: %d\n",
+		       __func__, ret);
+		return ret;
+	}
+
+	phy_cfgs =
+		(const struct rockchip_usb2phy_cfg *)dev_get_driver_data(dev);
+	if (!phy_cfgs) {
+		printf("%s: unable to get phy_cfgs\n", __func__);
+		return -EINVAL;
+	}
+
+	/* find out a proper config which can be matched with dt. */
+	index = 0;
+	while (phy_cfgs[index].reg) {
+		if (phy_cfgs[index].reg == reg) {
+			rphy.phy_cfg = &phy_cfgs[index];
+			break;
+		}
+		++index;
+	}
+
+	if (!rphy.phy_cfg) {
+		printf("%s: no phy-config can be matched\n", __func__);
+		return -EINVAL;
+	}
+
+	rphy.dcd_retries = CHG_DCD_MAX_RETRIES;
+	rphy.primary_retries = CHG_PRI_MAX_RETRIES;
+
+	/* stage 1, start DCD processing stage */
+	rockchip_chg_enable_dcd(&rphy, true);
+
+	while (rphy.dcd_retries--) {
+		mdelay(CHG_DCD_POLL_TIME);
+
+		/* get data contact detection status */
+		is_dcd = property_enabled(rphy.grf_base,
+					  &rphy.phy_cfg->chg_det.dp_det);
+
+		if (is_dcd || !rphy.dcd_retries) {
+			/*
+			 * stage 2, turn off DCD circuitry, then
+			 * voltage source on DP, probe on DM.
+			 */
+			rockchip_chg_enable_dcd(&rphy, false);
+			rockchip_chg_enable_primary_det(&rphy, true);
+			break;
+		}
+	}
+
+	mdelay(CHG_PRIMARY_DET_TIME);
+	vout = property_enabled(rphy.grf_base,
+				&rphy.phy_cfg->chg_det.cp_det);
+	rockchip_chg_enable_primary_det(&rphy, false);
+	if (vout) {
+		/* stage 3, voltage source on DM, probe on DP */
+		rockchip_chg_enable_secondary_det(&rphy, true);
+	} else {
+		if (!rphy.dcd_retries) {
+			/* floating charger found */
+			chg_type = POWER_SUPPLY_TYPE_USB_FLOATING;
+			goto out;
+		} else {
+			/*
+			 * Retry some times to make sure that it's
+			 * really a USB SDP charger.
+			 */
+			vout = rockchip_chg_primary_det_retry(&rphy);
+			if (vout) {
+				/* stage 3, voltage source on DM, probe on DP */
+				rockchip_chg_enable_secondary_det(&rphy, true);
+			} else {
+				/* USB SDP charger found */
+				chg_type = POWER_SUPPLY_TYPE_USB;
+				goto out;
+			}
+		}
+	}
+
+	mdelay(CHG_SECONDARY_DET_TIME);
+	vout = property_enabled(rphy.grf_base,
+				&rphy.phy_cfg->chg_det.dcp_det);
+	/* stage 4, turn off voltage source */
+	rockchip_chg_enable_secondary_det(&rphy, false);
+	if (vout)
+		chg_type = POWER_SUPPLY_TYPE_USB_DCP;
+	else
+		chg_type = POWER_SUPPLY_TYPE_USB_CDP;
+
+out:
+	printf("charger is %s\n", chg_to_string(chg_type));
+
+	return chg_type;
+}
+
+static int rockchip_usb2phy_init(struct phy *phy)
+{
+	struct rockchip_usb2phy *rphy;
+	const struct rockchip_usb2phy_port_cfg *port_cfg;
+	void __iomem *base;
+
+	rphy = dev_get_priv(phy->dev);
+	base = get_reg_base(rphy);
+
+	if (phy->id == USB2PHY_PORT_OTG) {
+		port_cfg = &rphy->phy_cfg->port_cfgs[USB2PHY_PORT_OTG];
+	} else if (phy->id == USB2PHY_PORT_HOST) {
+		port_cfg = &rphy->phy_cfg->port_cfgs[USB2PHY_PORT_HOST];
+	} else {
+		dev_err(phy->dev, "phy id %lu not support", phy->id);
+		return -EINVAL;
+	}
+
+	property_enable(base, &port_cfg->phy_sus, false);
+
+	/* waiting for the utmi_clk to become stable */
+	udelay(2000);
+
+	return 0;
+}
+
+static int rockchip_usb2phy_exit(struct phy *phy)
+{
+	struct rockchip_usb2phy *rphy;
+	const struct rockchip_usb2phy_port_cfg *port_cfg;
+	void __iomem *base;
+
+	rphy = dev_get_priv(phy->dev);
+	base = get_reg_base(rphy);
+
+	if (phy->id == USB2PHY_PORT_OTG) {
+		port_cfg = &rphy->phy_cfg->port_cfgs[USB2PHY_PORT_OTG];
+	} else if (phy->id == USB2PHY_PORT_HOST) {
+		port_cfg = &rphy->phy_cfg->port_cfgs[USB2PHY_PORT_HOST];
+	} else {
+		dev_err(phy->dev, "phy id %lu not support", phy->id);
+		return -EINVAL;
+	}
+
+	property_enable(base, &port_cfg->phy_sus, true);
+
+	return 0;
+}
+
+static int rockchip_usb2phy_probe(struct udevice *dev)
+{
+	const struct rockchip_usb2phy_cfg *phy_cfgs;
+	struct rockchip_usb2phy *rphy;
+	struct udevice *parent;
+	u32 reg, index;
+
+	rphy = dev_get_priv(dev);
+
+	parent = dev_get_parent(dev);
+	if (!parent) {
+		dev_dbg(dev, "could not find u2phy parent\n");
+		if (ofnode_read_bool(dev_ofnode(dev), "rockchip,grf"))
+			rphy->usbgrf_base =
+				syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	} else {
+		rphy->grf_base =
+			(void __iomem *)((uintptr_t)dev_read_addr(parent));
+	}
+
+	if (rphy->grf_base <= 0) {
+		dev_err(dev, "get syscon grf failed\n");
+		return -EINVAL;
+	}
+
+	if (ofnode_read_u32(dev_ofnode(dev), "reg", &reg)) {
+		dev_err(dev, "could not read reg\n");
+		return -EINVAL;
+	}
+
+	if (ofnode_read_bool(dev_ofnode(dev), "rockchip,usbgrf")) {
+		rphy->usbgrf_base =
+			syscon_get_first_range(ROCKCHIP_SYSCON_USBGRF);
+		if (rphy->usbgrf_base <= 0) {
+			dev_err(dev, "get syscon usbgrf failed\n");
+			return -EINVAL;
+		}
+	} else {
+		rphy->usbgrf_base = NULL;
+	}
+
+	phy_cfgs =
+		(const struct rockchip_usb2phy_cfg *)dev_get_driver_data(dev);
+	if (!phy_cfgs) {
+		dev_err(dev, "unable to get phy_cfgs\n");
+		return -EINVAL;
+	}
+
+	/* find out a proper config which can be matched with dt. */
+	index = 0;
+	while (phy_cfgs[index].reg) {
+		if (phy_cfgs[index].reg == reg) {
+			rphy->phy_cfg = &phy_cfgs[index];
+			break;
+		}
+		++index;
+	}
+
+	if (!rphy->phy_cfg) {
+		dev_err(dev, "no phy-config can be matched\n");
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static struct phy_ops rockchip_usb2phy_ops = {
+	.init = rockchip_usb2phy_init,
+	.exit = rockchip_usb2phy_exit,
+};
+
+static const struct rockchip_usb2phy_cfg rk312x_phy_cfgs[] = {
+	{
+		.reg = 0x17c,
+		.num_ports	= 2,
+		.clkout_ctl	= { 0x0190, 15, 15, 1, 0 },
+		.port_cfgs	= {
+			[USB2PHY_PORT_OTG] = {
+				.phy_sus	= { 0x017c, 8, 0, 0, 0x1d1 },
+				.bvalid_det_en	= { 0x017c, 14, 14, 0, 1 },
+				.bvalid_det_st	= { 0x017c, 15, 15, 0, 1 },
+				.bvalid_det_clr	= { 0x017c, 15, 15, 0, 1 },
+				.iddig_output	= { 0x017c, 10, 10, 0, 1 },
+				.iddig_en	= { 0x017c, 9, 9, 0, 1 },
+				.idfall_det_en  = { 0x01a0, 2, 2, 0, 1 },
+				.idfall_det_st  = { 0x01a0, 3, 3, 0, 1 },
+				.idfall_det_clr = { 0x01a0, 3, 3, 0, 1 },
+				.idrise_det_en  = { 0x01a0, 0, 0, 0, 1 },
+				.idrise_det_st  = { 0x01a0, 1, 1, 0, 1 },
+				.idrise_det_clr = { 0x01a0, 1, 1, 0, 1 },
+				.ls_det_en	= { 0x017c, 12, 12, 0, 1 },
+				.ls_det_st	= { 0x017c, 13, 13, 0, 1 },
+				.ls_det_clr	= { 0x017c, 13, 13, 0, 1 },
+				.utmi_bvalid	= { 0x014c, 5, 5, 0, 1 },
+				.utmi_iddig	= { 0x014c, 8, 8, 0, 1 },
+				.utmi_ls	= { 0x014c, 7, 6, 0, 1 },
+			},
+			[USB2PHY_PORT_HOST] = {
+				.phy_sus	= { 0x0194, 8, 0, 0, 0x1d1 },
+				.ls_det_en	= { 0x0194, 14, 14, 0, 1 },
+				.ls_det_st	= { 0x0194, 15, 15, 0, 1 },
+				.ls_det_clr	= { 0x0194, 15, 15, 0, 1 }
+			}
+		},
+		.chg_det = {
+			.opmode		= { 0x017c, 3, 0, 5, 1 },
+			.cp_det		= { 0x02c0, 6, 6, 0, 1 },
+			.dcp_det	= { 0x02c0, 5, 5, 0, 1 },
+			.dp_det		= { 0x02c0, 7, 7, 0, 1 },
+			.idm_sink_en	= { 0x0184, 8, 8, 0, 1 },
+			.idp_sink_en	= { 0x0184, 7, 7, 0, 1 },
+			.idp_src_en	= { 0x0184, 9, 9, 0, 1 },
+			.rdm_pdwn_en	= { 0x0184, 10, 10, 0, 1 },
+			.vdm_src_en	= { 0x0184, 12, 12, 0, 1 },
+			.vdp_src_en	= { 0x0184, 11, 11, 0, 1 },
+		},
+	},
+	{ /* sentinel */ }
+};
+
+static const struct rockchip_usb2phy_cfg rk3328_phy_cfgs[] = {
+	{
+		.reg = 0x100,
+		.num_ports	= 2,
+		.clkout_ctl	= { 0x108, 4, 4, 1, 0 },
+		.port_cfgs	= {
+			[USB2PHY_PORT_OTG] = {
+				.phy_sus	= { 0x0100, 8, 0, 0, 0x1d1 },
+				.bvalid_det_en	= { 0x0110, 2, 2, 0, 1 },
+				.bvalid_det_st	= { 0x0114, 2, 2, 0, 1 },
+				.bvalid_det_clr = { 0x0118, 2, 2, 0, 1 },
+				.iddig_output	= { 0x0100, 10, 10, 0, 1 },
+				.iddig_en	= { 0x0100, 9, 9, 0, 1 },
+				.idfall_det_en	= { 0x0110, 5, 5, 0, 1 },
+				.idfall_det_st	= { 0x0114, 5, 5, 0, 1 },
+				.idfall_det_clr = { 0x0118, 5, 5, 0, 1 },
+				.idrise_det_en	= { 0x0110, 4, 4, 0, 1 },
+				.idrise_det_st	= { 0x0114, 4, 4, 0, 1 },
+				.idrise_det_clr = { 0x0118, 4, 4, 0, 1 },
+				.ls_det_en	= { 0x0110, 0, 0, 0, 1 },
+				.ls_det_st	= { 0x0114, 0, 0, 0, 1 },
+				.ls_det_clr	= { 0x0118, 0, 0, 0, 1 },
+				.utmi_avalid	= { 0x0120, 10, 10, 0, 1 },
+				.utmi_bvalid	= { 0x0120, 9, 9, 0, 1 },
+				.utmi_iddig	= { 0x0120, 6, 6, 0, 1 },
+				.utmi_ls	= { 0x0120, 5, 4, 0, 1 },
+				.vbus_det_en	= { 0x001c, 15, 15, 1, 0 },
+			},
+			[USB2PHY_PORT_HOST] = {
+				.phy_sus	= { 0x104, 8, 0, 0, 0x1d1 },
+				.ls_det_en	= { 0x110, 1, 1, 0, 1 },
+				.ls_det_st	= { 0x114, 1, 1, 0, 1 },
+				.ls_det_clr	= { 0x118, 1, 1, 0, 1 },
+				.utmi_ls	= { 0x120, 17, 16, 0, 1 },
+				.utmi_hstdet	= { 0x120, 19, 19, 0, 1 }
+			}
+		},
+		.chg_det = {
+			.opmode		= { 0x0100, 3, 0, 5, 1 },
+			.cp_det		= { 0x0120, 24, 24, 0, 1 },
+			.dcp_det	= { 0x0120, 23, 23, 0, 1 },
+			.dp_det		= { 0x0120, 25, 25, 0, 1 },
+			.idm_sink_en	= { 0x0108, 8, 8, 0, 1 },
+			.idp_sink_en	= { 0x0108, 7, 7, 0, 1 },
+			.idp_src_en	= { 0x0108, 9, 9, 0, 1 },
+			.rdm_pdwn_en	= { 0x0108, 10, 10, 0, 1 },
+			.vdm_src_en	= { 0x0108, 12, 12, 0, 1 },
+			.vdp_src_en	= { 0x0108, 11, 11, 0, 1 },
+		},
+	},
+	{ /* sentinel */ }
+};
+
+static const struct rockchip_usb2phy_cfg rv1108_phy_cfgs[] = {
+	{
+		.reg = 0x100,
+		.num_ports	= 2,
+		.clkout_ctl	= { 0x108, 4, 4, 1, 0 },
+		.port_cfgs	= {
+			[USB2PHY_PORT_OTG] = {
+				.phy_sus	= { 0x0100, 8, 0, 0, 0x1d1 },
+				.bvalid_det_en	= { 0x0680, 3, 3, 0, 1 },
+				.bvalid_det_st	= { 0x0690, 3, 3, 0, 1 },
+				.bvalid_det_clr = { 0x06a0, 3, 3, 0, 1 },
+				.ls_det_en	= { 0x0680, 2, 2, 0, 1 },
+				.ls_det_st	= { 0x0690, 2, 2, 0, 1 },
+				.ls_det_clr	= { 0x06a0, 2, 2, 0, 1 },
+				.utmi_bvalid	= { 0x0804, 10, 10, 0, 1 },
+				.utmi_ls	= { 0x0804, 13, 12, 0, 1 },
+			},
+			[USB2PHY_PORT_HOST] = {
+				.phy_sus	= { 0x0104, 8, 0, 0, 0x1d1 },
+				.ls_det_en	= { 0x0680, 4, 4, 0, 1 },
+				.ls_det_st	= { 0x0690, 4, 4, 0, 1 },
+				.ls_det_clr	= { 0x06a0, 4, 4, 0, 1 },
+				.utmi_ls	= { 0x0804, 9, 8, 0, 1 },
+				.utmi_hstdet	= { 0x0804, 7, 7, 0, 1 }
+			}
+		},
+		.chg_det = {
+			.opmode		= { 0x0100, 3, 0, 5, 1 },
+			.cp_det		= { 0x0804, 1, 1, 0, 1 },
+			.dcp_det	= { 0x0804, 0, 0, 0, 1 },
+			.dp_det		= { 0x0804, 2, 2, 0, 1 },
+			.idm_sink_en	= { 0x0108, 8, 8, 0, 1 },
+			.idp_sink_en	= { 0x0108, 7, 7, 0, 1 },
+			.idp_src_en	= { 0x0108, 9, 9, 0, 1 },
+			.rdm_pdwn_en	= { 0x0108, 10, 10, 0, 1 },
+			.vdm_src_en	= { 0x0108, 12, 12, 0, 1 },
+			.vdp_src_en	= { 0x0108, 11, 11, 0, 1 },
+		},
+	},
+	{ /* sentinel */ }
+};
+
+static const struct udevice_id rockchip_usb2phy_ids[] = {
+	{ .compatible = "rockchip,rk3128-usb2phy", .data = (ulong)&rk312x_phy_cfgs },
+	{ .compatible = "rockchip,rk3328-usb2phy", .data = (ulong)&rk3328_phy_cfgs },
+	{ .compatible = "rockchip,rv1108-usb2phy", .data = (ulong)&rv1108_phy_cfgs },
+	{ }
+};
+
+U_BOOT_DRIVER(rockchip_usb2phy) = {
+	.name		= "rockchip_usb2phy",
+	.id		= UCLASS_PHY,
+	.of_match	= rockchip_usb2phy_ids,
+	.ops		= &rockchip_usb2phy_ops,
+	.probe		= rockchip_usb2phy_probe,
+	.priv_auto_alloc_size = sizeof(struct rockchip_usb2phy),
+};

commit e33aecafee38ba39ec54e0b528ede9b2e301819b
Author: Wu Liang feng <wulf@rock-chips.com>
Date:   Mon Sep 25 22:01:17 2017 +0800

    rockchip: dts: rv1108: add usb2 phy nodes
    
    rv1108 has one USB 2.0 PHY consist of two usb ports,
    one port is used for DWC2 controller, the other port
    is shared between EHCI and OHCI controllers.
    
    Change-Id: I9e272a16721e05a94a75adbcfbd538c122d1ca69
    Signed-off-by: Wu Liang feng <wulf@rock-chips.com>

diff --git a/arch/arm/dts/rv1108-evb.dts b/arch/arm/dts/rv1108-evb.dts
index 2b221b6d61..42dc7a1c62 100644
--- a/arch/arm/dts/rv1108-evb.dts
+++ b/arch/arm/dts/rv1108-evb.dts
@@ -50,6 +50,18 @@
 	};
 };
 
+&u2phy {
+	status = "okay";
+};
+
+&u2phy_otg {
+	status = "okay";
+};
+
+&u2phy_host {
+	status = "okay";
+};
+
 &uart0 {
 	status = "okay";
 };
diff --git a/arch/arm/dts/rv1108.dtsi b/arch/arm/dts/rv1108.dtsi
index 3153dfe658..5fc8eb6ac1 100644
--- a/arch/arm/dts/rv1108.dtsi
+++ b/arch/arm/dts/rv1108.dtsi
@@ -126,6 +126,29 @@
 		reg = <0x10300000 0x1000>;
 	};
 
+	u2phy: usb2-phy@10300100 {
+		compatible = "rockchip,rv1108-usb2phy";
+		reg = <0x100 0x0c>;
+		rockchip,grf = <&grf>;
+		rockchip,usbgrf = <&usbgrf>;
+		#phy-cells = <1>;
+		status = "disabled";
+
+		u2phy_otg: otg-port {
+			interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "otg-mux";
+			#phy-cells = <0>;
+			status = "disabled";
+		};
+
+		u2phy_host: host-port {
+			interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "linestate";
+			#phy-cells = <0>;
+			status = "disabled";
+		};
+	};
+
 	pmugrf: syscon@20060000 {
 		compatible = "rockchip,rv1108-pmugrf", "syscon";
 		reg = <0x20060000 0x1000>;
@@ -139,6 +162,11 @@
 		#reset-cells = <1>;
 	};
 
+	usbgrf: syscon@202a0000 {
+		compatible = "rockchip,rv1108-usbgrf", "syscon";
+		reg = <0x202a0000 0x1000>;
+	};
+
 	emmc: dwmmc@30110000 {
 		compatible = "rockchip,rv1108-dw-mshc", "rockchip,rk3288-dw-mshc";
 		clock-freq-min-max = <400000 150000000>;
@@ -179,6 +207,8 @@
 		compatible = "generic-ehci";
 		reg = <0x30140000 0x20000>;
 		interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+		phys = <&u2phy 1>;
+		phy-names = "usb";
 		status = "disabled";
 	};
 
@@ -186,6 +216,8 @@
 		compatible = "generic-ohci";
 		reg = <0x30160000 0x20000>;
 		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+		phys = <&u2phy 1>;
+		phy-names = "usb";
 		status = "disabled";
 	};
 
@@ -196,6 +228,8 @@
 		interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
 		hnp-srp-disable;
 		dr_mode = "otg";
+		phys = <&u2phy 0>;
+		phy-names = "usb";
 		status = "disabled";
 	};
 

commit 03e886f9855e708c6559c3acb9b088172cb4f1b2
Author: William Wu <william.wu@rock-chips.com>
Date:   Wed Aug 9 11:36:28 2017 +0800

    ARM: dts: rockchip: add USB nodes for evb-rv1108
    
    This patch adds USB OTG/EHCI/OHCI nodes for evb-rv1108 USB ports.
    
    Change-Id: Ia75a63dcfd8055b5112f421818b0c543960e798e
    Signed-off-by: William Wu <william.wu@rock-chips.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/arch/arm/dts/rv1108-evb.dts b/arch/arm/dts/rv1108-evb.dts
index 0128dd8b1d..2b221b6d61 100644
--- a/arch/arm/dts/rv1108-evb.dts
+++ b/arch/arm/dts/rv1108-evb.dts
@@ -20,6 +20,15 @@
 	chosen {
 		stdout-path = "serial2:1500000n8";
 	};
+
+	vcc5v0_otg: vcc5v0-otg-drv {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		regulator-name = "vcc5v0_otg";
+		gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+	};
 };
 
 &gmac {
@@ -52,3 +61,16 @@
 &uart2 {
 	status = "okay";
 };
+
+&usb20_otg {
+	vbus-supply = <&vcc5v0_otg>;
+	status = "okay";
+};
+
+&usb_host_ehci {
+	status = "okay";
+};
+
+&usb_host_ohci {
+	status = "okay";
+};
diff --git a/arch/arm/dts/rv1108.dtsi b/arch/arm/dts/rv1108.dtsi
index 77ca24e7f3..3153dfe658 100644
--- a/arch/arm/dts/rv1108.dtsi
+++ b/arch/arm/dts/rv1108.dtsi
@@ -175,6 +175,30 @@
 		status = "disabled";
 	};
 
+	usb_host_ehci: usb@30140000 {
+		compatible = "generic-ehci";
+		reg = <0x30140000 0x20000>;
+		interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+		status = "disabled";
+	};
+
+	usb_host_ohci: usb@30160000 {
+		compatible = "generic-ohci";
+		reg = <0x30160000 0x20000>;
+		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+		status = "disabled";
+	};
+
+	usb20_otg: usb@30180000 {
+		compatible = "rockchip,rv1108-usb", "rockchip,rk3288-usb",
+			     "snps,dwc2";
+		reg = <0x30180000 0x40000>;
+		interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
+		hnp-srp-disable;
+		dr_mode = "otg";
+		status = "disabled";
+	};
+
 	sfc: sfc@301c0000 {
 		compatible = "rockchip,sfc";
 		reg = <0x301c0000 0x200>;

commit 31d551b63d6bfa1a04299b7278a7b7283baec28d
Author: William Wu <william.wu@rock-chips.com>
Date:   Wed Aug 9 11:36:27 2017 +0800

    configs: rockchip: add USB configs for evb-rv1108 board
    
    This patch adds USB configs to support the USB OTG port(consist
    of DWC2 controller) and the USB Host port(consist of EHCI and OHCI
    controllers) on evb-rv1108 board, and also support fastboot over
    USB and USB mass storage.
    
    Change-Id: I80b1ff133a3e16ca0e8202fe737c93d18b6e5b08
    Signed-off-by: William Wu <william.wu@rock-chips.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig
index ab4276ac8c..7036f433ee 100644
--- a/configs/evb-rv1108_defconfig
+++ b/configs/evb-rv1108_defconfig
@@ -5,8 +5,16 @@ CONFIG_TARGET_EVB_RV1108=y
 CONFIG_DEFAULT_DEVICE_TREE="rv1108-evb"
 CONFIG_DEBUG_UART=y
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_FASTBOOT=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_CMD_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x62000000
+CONFIG_FASTBOOT_BUF_SIZE=0x08000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=1
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIME=y
@@ -26,6 +34,7 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_ROCKCHIP_RV1108=y
+CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_BAUDRATE=1500000
 # CONFIG_SPL_SERIAL_PRESENT is not set
 CONFIG_DEBUG_UART_BASE=0x10210000
@@ -33,4 +42,16 @@ CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYSRESET=y
 CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x110a
 CONFIG_ERRNO_STR=y
diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h
index 04779162d0..5ee45594a3 100644
--- a/include/configs/rv1108_common.h
+++ b/include/configs/rv1108_common.h
@@ -28,4 +28,7 @@
 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_TEXT_BASE + 0x100000)
 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x2000000)
 
+/* rockchip ohci host driver */
+#define CONFIG_USB_OHCI_NEW
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	1
 #endif

commit be82169b5cc561b6430b6ee412065ba83c825ceb
Author: Wu Liang feng <wulf@rock-chips.com>
Date:   Mon Sep 25 21:36:22 2017 +0800

    rockchip: rv1108: syscon: add support for usbgrf
    
    usbgrf is a independent module like grf which contain
    usb phy control registers.
    
    Change-Id: I5676cab33bcdd66b4033c9514b82cac26b6ce3e5
    Signed-off-by: Wu Liang feng <wulf@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/clock.h b/arch/arm/include/asm/arch-rockchip/clock.h
index 641df58ac2..c6256c0dd8 100644
--- a/arch/arm/include/asm/arch-rockchip/clock.h
+++ b/arch/arm/include/asm/arch-rockchip/clock.h
@@ -20,6 +20,7 @@ enum {
 	ROCKCHIP_SYSCON_PMUSGRF,
 	ROCKCHIP_SYSCON_CIC,
 	ROCKCHIP_SYSCON_MSCH,
+	ROCKCHIP_SYSCON_USBGRF,
 };
 
 /* Standard Rockchip clock numbers */
diff --git a/arch/arm/mach-rockchip/rv1108/syscon_rv1108.c b/arch/arm/mach-rockchip/rv1108/syscon_rv1108.c
index 8bb0ab89b8..d41cb8325a 100644
--- a/arch/arm/mach-rockchip/rv1108/syscon_rv1108.c
+++ b/arch/arm/mach-rockchip/rv1108/syscon_rv1108.c
@@ -11,6 +11,7 @@
 
 static const struct udevice_id rv1108_syscon_ids[] = {
 	{ .compatible = "rockchip,rv1108-grf", .data = ROCKCHIP_SYSCON_GRF },
+	{ .compatible = "rockchip,rv1108-usbgrf", .data = ROCKCHIP_SYSCON_USBGRF },
 	{ }
 };
 

commit 9790078035b7e04843ac92fc27cad1ba32bd0190
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 12 10:37:19 2017 +0800

    fdt: fdt_chosen: support merge uboot and kernel bootargs for Rockchip
    
    Change-Id: Id8a81d729a736d66301ca964f5b765a92f24c642
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/fdt_support.c b/common/fdt_support.c
index 916a448c11..7e6a6696b6 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -291,6 +291,7 @@ int fdt_chosen(void *fdt)
 
 	str = env_get("bootargs");
 	if (str) {
+#ifndef CONFIG_ARCH_ROCKCHIP
 		err = fdt_setprop(fdt, nodeoffset, "bootargs", str,
 				  strlen(str) + 1);
 		if (err < 0) {
@@ -298,6 +299,31 @@ int fdt_chosen(void *fdt)
 			       fdt_strerror(err));
 			return err;
 		}
+#else
+		const char *bootargs = NULL;
+		char buf[2048];
+
+		bootargs = fdt_getprop(fdt, nodeoffset, "bootargs", NULL);
+		if (bootargs) {
+			memset(buf, 0, sizeof(buf));
+			snprintf(buf, sizeof(buf), "%s %s", bootargs, str);
+			err = fdt_setprop(fdt, nodeoffset, "bootargs", buf,
+					  strlen(buf) + 1);
+			if (err < 0) {
+				printf("WARNING: could not set bootargs %s.\n",
+				       fdt_strerror(err));
+				return err;
+			}
+		} else {
+			err = fdt_setprop(fdt, nodeoffset, "bootargs", str,
+					  strlen(str) + 1);
+			if (err < 0) {
+				printf("WARNING: could not set bootargs %s.\n",
+				       fdt_strerror(err));
+				return err;
+			}
+		}
+#endif
 	}
 
 	return fdt_fixup_stdout(fdt, nodeoffset);

commit e8337a14b72803ab9f060746090d6b3a5e9831e6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 12 19:22:36 2017 +0800

    rk3368: add arch_cpu_init implementation
    
    1. add ddr read latency config;
    2. pwm select rkpwm source;
    3. pwm2 select 32KHz clock source;
    4. enable force jtag;
    5. add cpu axi qos config.
    
    Change-Id: I974c8c3084b6e6b07769bb3611ea1e97b4e132b4
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3368/rk3368.c b/arch/arm/mach-rockchip/rk3368/rk3368.c
index f62d91df74..ce9e62669f 100644
--- a/arch/arm/mach-rockchip/rk3368/rk3368.c
+++ b/arch/arm/mach-rockchip/rk3368/rk3368.c
@@ -30,6 +30,37 @@ DECLARE_GLOBAL_DATA_PTR;
 #define MCU_EXPERI_BASE_BIT31_BIT28       ((MCU_EXPERI_BASE & GENMASK(31, 28)) >> 28)
 #define MCU_EXPERI_BASE_BIT27_BIT12       ((MCU_EXPERI_BASE & GENMASK(27, 12)) >> 12)
 
+#define DDR_LATENCY_BASE		(0xffac0000 + 0x14)
+#define DDR_READ_LATENCY_VALUE		0x34
+
+#define CPU_AXI_QOS_PRIORITY_BASE	0xffad0300
+#define CPU_AXI_QOS_PRIORITY		0x08
+#define QOS_PRIORITY_LEVEL_H		2
+#define QOS_PRIORITY_LEVEL_L		2
+
+#define ISP_R0_QOS_BASE			0xffad0080
+#define QOS_ISP_R0_PRIORITY_LEVEL_H	1
+#define QOS_ISP_R0_PRIORITY_LEVEL_L	1
+
+#define ISP_R1_QOS_BASE			0xffad0100
+#define QOS_ISP_R1_PRIORITY_LEVEL_H	1
+#define QOS_ISP_R1_PRIORITY_LEVEL_L	1
+
+#define ISP_W0_QOS_BASE			0xffad0180
+#define QOS_ISP_W0_PRIORITY_LEVEL_H	3
+#define QOS_ISP_W0_PRIORITY_LEVEL_L	3
+
+#define ISP_W1_QOS_BASE			0xffad0200
+#define QOS_ISP_W1_PRIORITY_LEVEL_H	3
+#define QOS_ISP_W1_PRIORITY_LEVEL_L	3
+
+/* cpu axi qos priority */
+#define CPU_AXI_QOS_PRIORITY_LEVEL(h, l) \
+		((((h) & 3) << 8) | (((h) & 3) << 2) | ((l) & 3))
+
+#define GRF_SOC_CON15			0xff77043c
+#define PMU_GRF_SOC_CON0		0xff738100
+
 static struct mm_region rk3368_mem_map[] = {
 	{
 		.virt = 0x0UL,
@@ -92,6 +123,56 @@ static int mcu_init(void)
 	return 0;
 }
 
+static void cpu_axi_qos_prority_level_config(void)
+{
+	u32 level;
+
+	/* Set lcdc cpu axi qos priority level */
+	level = CPU_AXI_QOS_PRIORITY_LEVEL(QOS_PRIORITY_LEVEL_H,
+					   QOS_PRIORITY_LEVEL_L);
+	writel(level, CPU_AXI_QOS_PRIORITY_BASE + CPU_AXI_QOS_PRIORITY);
+
+	/* Set cpu isp r0 qos priority level */
+	level = CPU_AXI_QOS_PRIORITY_LEVEL(QOS_ISP_R0_PRIORITY_LEVEL_H,
+					   QOS_ISP_R0_PRIORITY_LEVEL_L);
+	writel(level, ISP_R0_QOS_BASE + CPU_AXI_QOS_PRIORITY);
+
+	/* Set cpu isp r1 qos priority level */
+	level = CPU_AXI_QOS_PRIORITY_LEVEL(QOS_ISP_R1_PRIORITY_LEVEL_H,
+					   QOS_ISP_R1_PRIORITY_LEVEL_L);
+	writel(level, ISP_R1_QOS_BASE + CPU_AXI_QOS_PRIORITY);
+
+	/* Set cpu isp w0 qos priority level */
+	level = CPU_AXI_QOS_PRIORITY_LEVEL(QOS_ISP_W0_PRIORITY_LEVEL_H,
+					   QOS_ISP_W0_PRIORITY_LEVEL_L);
+	writel(level, ISP_W0_QOS_BASE + CPU_AXI_QOS_PRIORITY);
+
+	/* Set cpu isp w1 qos priority level */
+	level = CPU_AXI_QOS_PRIORITY_LEVEL(QOS_ISP_W1_PRIORITY_LEVEL_H,
+					   QOS_ISP_W1_PRIORITY_LEVEL_L);
+	writel(level, ISP_W1_QOS_BASE + CPU_AXI_QOS_PRIORITY);
+}
+
+int arch_cpu_init(void)
+{
+	/* DDR read latency config */
+	writel(DDR_READ_LATENCY_VALUE, DDR_LATENCY_BASE);
+
+	/* PWMs select rkpwm clock source */
+	rk_setreg(GRF_SOC_CON15, 1 << 12);
+
+	/* PWM2 select 32KHz clock source */
+	rk_clrreg(PMU_GRF_SOC_CON0, 1 << 7);
+
+	/* Enable force jtag */
+	rk_setreg(GRF_SOC_CON15, 1 << 13);
+
+	/* Cpu axi qos config */
+	cpu_axi_qos_prority_level_config();
+
+	return 0;
+}
+
 int arch_early_init_r(void)
 {
 	return mcu_init();

commit bdeebcdf00ebe436321906d25106d1fecc2aa77d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 12 19:05:34 2017 +0800

    rk3399: arch_cpu_init: pwm3 select pwm3a io
    
    Change-Id: Ic6efea20d3815947775d843c0088e8bf1b5dcfab
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c
index a2810ec8b7..ea449c8f5a 100644
--- a/arch/arm/mach-rockchip/rk3399/rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
@@ -16,6 +16,7 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 #define GRF_EMMCCORE_CON11 0xff77f02c
+#define PMU_GRF_SOC_CON0   0xff320180
 
 static struct mm_region rk3399_mem_map[] = {
 	{
@@ -57,6 +58,9 @@ int arch_cpu_init(void)
 	/* Emmc clock generator: disable the clock multipilier */
 	rk_clrreg(GRF_EMMCCORE_CON11, 0x0ff);
 
+	/* PWM3 select pwm3a io */
+	rk_clrreg(PMU_GRF_SOC_CON0, 1 << 5);
+
 	return 0;
 }
 

commit 1cbfe65d1cc1e4f470be7732dbbfe21031788501
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 12 15:54:03 2017 +0800

    rk322x: add arch_cpu_init implementation
    
    1. pwm select rkpwm clock source;
    2. pwm0~3 io select;
    3. uart1~2 io select;
    4. HDMI phy clock source select HDMIPHY clock out;
    
    Change-Id: I7e59b4d50b2b10f1b3a9d832eaa1297288ebfeff
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk322x/Makefile b/arch/arm/mach-rockchip/rk322x/Makefile
index ecb3e8dfda..c2330499f9 100644
--- a/arch/arm/mach-rockchip/rk322x/Makefile
+++ b/arch/arm/mach-rockchip/rk322x/Makefile
@@ -7,3 +7,4 @@
 
 obj-y += clk_rk322x.o
 obj-y += syscon_rk322x.o
+obj-y += rk322x.o
diff --git a/arch/arm/mach-rockchip/rk322x/rk322x.c b/arch/arm/mach-rockchip/rk322x/rk322x.c
new file mode 100644
index 0000000000..dcc9f423c3
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk322x/rk322x.c
@@ -0,0 +1,32 @@
+/*
+ * Copyright (c) 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#include <asm/io.h>
+#include <asm/arch/hardware.h>
+
+#define GRF_SOC_CON2	0x11000408
+#define GRF_CON_IOMUX	0x11000050
+#define CRU_MISC_CON	0x110e0134
+
+int arch_cpu_init(void)
+{
+	/* We do some SoC one time setting here. */
+
+	/* PWMs select rkpwm clock source */
+	rk_setreg(GRF_SOC_CON2, 1 << 0);
+
+	/* PWM0~3 io select */
+	rk_setreg(GRF_CON_IOMUX, 0xf << 0);
+
+	/* UART1~2 io select */
+	rk_setreg(GRF_CON_IOMUX, (1 << 11) | (1 << 8));
+
+	/* HDMI phy clock source select HDMIPHY clock out */
+	rk_clrreg(CRU_MISC_CON, 1 << 13);
+
+	/* TODO: ECO version */
+
+	return 0;
+}

commit d35ebf985d12c74b10e53efcc54b1c0887c90b6b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 12 11:41:34 2017 +0800

    rk3328: arch_cpu_init: add some settings
    
    1. enable force jtag;
    2. HDMI phy clock source select HDMIPHY clock out.
    
    Change-Id: I7699093f96a7c75ce1c3e8fede8811651093bb24
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3328/rk3328.c b/arch/arm/mach-rockchip/rk3328/rk3328.c
index 6764494d3b..df5b190a1e 100644
--- a/arch/arm/mach-rockchip/rk3328/rk3328.c
+++ b/arch/arm/mach-rockchip/rk3328/rk3328.c
@@ -11,6 +11,9 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#define GRF_SOC_CON4		0xff100410
+#define CRU_MISC_CON		0xff440084
+
 static struct mm_region rk3328_mem_map[] = {
 	{
 		.virt = 0x0UL,
@@ -48,5 +51,13 @@ int arch_cpu_init(void)
 {
 	/* We do some SoC one time setting here. */
 
+	/* Enable force to jtag, jtag_tclk/tms iomuxed with sdmmc0_d2/d3 */
+	rk_setreg(GRF_SOC_CON4, 1 << 12);
+
+	/* HDMI phy clock source select HDMIPHY clock out */
+	rk_clrreg(CRU_MISC_CON, 1 << 13);
+
+	/* TODO: ECO version */
+
 	return 0;
 }

commit d1afae36a32b6b733bfa52bfe9ca2127c205dd3e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 12 11:31:04 2017 +0800

    rk3288: arch_cpu_init: add some settings
    
    1. disable lvds phy;
    2. select EDP clock source 24M;
    3. set read latency;
    4. set vop qos to highest priority.
    
    Change-Id: I374d4717b721b10d1d6eb20ad6ac5fbea7c7b467
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3288/rk3288.c b/arch/arm/mach-rockchip/rk3288/rk3288.c
index acc3b7932a..eee90cfd53 100644
--- a/arch/arm/mach-rockchip/rk3288/rk3288.c
+++ b/arch/arm/mach-rockchip/rk3288/rk3288.c
@@ -7,6 +7,18 @@
 #include <asm/arch/hardware.h>
 
 #define GRF_SOC_CON2 0xff77024c
+#define GRF_SOC_CON7 0xff770260
+
+#define VIO0_VOP_QOS_BASE	0xffad0408
+#define VIO1_VOP_QOS_BASE	0xffad0008
+#define BUS_MSCH0_QOS_BASE	0xffac0014
+#define BUS_MSCH1_QOS_BASE	0xffac0094
+
+#define READLATENCY_VAL		0x34
+#define CRU_CLKSEL_CON28	0Xff7600d0
+
+#define CPU_AXI_QOS_PRIORITY_LEVEL(h, l) \
+	((((h) & 3) << 8) | (((h) & 3) << 2) | ((l) & 3))
 
 int arch_cpu_init(void)
 {
@@ -15,5 +27,19 @@ int arch_cpu_init(void)
 	/* Use rkpwm by default */
 	rk_setreg(GRF_SOC_CON2, 1 << 0);
 
+	/* Disable LVDS phy */
+	rk_setreg(GRF_SOC_CON7, 1 << 15);
+
+	/* Select EDP clock source 24M */
+	rk_setreg(CRU_CLKSEL_CON28, 1 << 15);
+
+	/* Read latency configure */
+	writel(READLATENCY_VAL, BUS_MSCH0_QOS_BASE);
+	writel(READLATENCY_VAL, BUS_MSCH1_QOS_BASE);
+
+	/* Set vop qos to highest priority */
+	writel(CPU_AXI_QOS_PRIORITY_LEVEL(2, 2), VIO0_VOP_QOS_BASE);
+	writel(CPU_AXI_QOS_PRIORITY_LEVEL(2, 2), VIO1_VOP_QOS_BASE);
+
 	return 0;
 }

commit 86a31622597a3c3bb7d00bd0cc8b024c11ac5e56
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Sep 13 16:47:08 2017 +0800

    rockchip: rk3288: enable interrupt support
    
    Change-Id: Ia6697313d3c62532200bddf789a038f49963996c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index ecf2c35692..3c492a20ff 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -57,6 +57,7 @@ config ROCKCHIP_RK3288
 	select SPL_BOARD_INIT if SPL
 	select SUPPORT_SPL
 	select SPL
+	select GICV2
 	help
 	  The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
 	  including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index e9e3c4013c..3ec97817eb 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -34,6 +34,9 @@
 #define CONFIG_SPL_STACK		0xff718000
 #define CONFIG_SPL_TEXT_BASE		0xff704004
 
+#define GICD_BASE			0xffc01000
+#define GICC_BASE			0xffc02000
+
 /* MMC/SD IP block */
 #define CONFIG_BOUNCE_BUFFER
 

commit 503f955fe23d3884f6c9f622aa6a013cde07c52d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Sep 13 16:34:43 2017 +0800

    rockchip: rk3368: enable interrupt support
    
    Change-Id: I7031cf89b42b906dcd65c139042815105401ced5
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index ee52aadef1..ecf2c35692 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -88,6 +88,7 @@ config ROCKCHIP_RK3368
 	select ENABLE_ARM_SOC_BOOT0_HOOK
 	select DEBUG_UART_BOARD_INIT
 	select SYS_NS16550
+	select GICV2
 	help
 	  The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
 	  into a big and little cluster with 4 cores each) Cortex-A53 including
diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h
index 8cba92c56d..b414553565 100644
--- a/include/configs/rk3368_common.h
+++ b/include/configs/rk3368_common.h
@@ -34,6 +34,9 @@
 #define CONFIG_SPL_BSS_START_ADDR       0x400000
 #define CONFIG_SPL_BSS_MAX_SIZE         0x20000
 
+#define GICD_BASE			0xffB71000
+#define GICC_BASE			0xffB72000
+
 #define CONFIG_BOUNCE_BUFFER
 
 #ifndef CONFIG_SPL_BUILD

commit 8f557da16ac51da2410964bf6af926284929f8dc
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Sep 7 20:33:12 2017 +0800

    rockchip: rk3399: enable interrupt support
    
    Change-Id: Icbc73224c3da7fd1e0aebfabe302437ece2f83ad
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 8f730dbd17..ee52aadef1 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -125,6 +125,7 @@ config ROCKCHIP_RK3399
 	select SPL_DRIVERS_MISC_SUPPORT
 	select ENABLE_ARM_SOC_BOOT0_HOOK
 	select DEBUG_UART_BOARD_INIT
+	select GICV3
 	help
 	  The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
 	  and quad-core Cortex-A53.
diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index 4fd325eeb0..eda6ed7071 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -35,6 +35,10 @@
 
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */
 
+#define GICD_BASE			0xFEE00000
+#define GICR_BASE			0xFEF00000
+#define GICC_BASE			0xFFF00000
+
 /* MMC/SD IP block */
 #define CONFIG_BOUNCE_BUFFER
 #define CONFIG_ROCKCHIP_SDHCI_MAX_FREQ	200000000

commit 55da6f7382b4fe85bd0781902900a57631d7750e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Sep 7 19:08:29 2017 +0800

    rockchip: rk3328: enable interrupt support
    
    Change-Id: Ib579a37a82e1da469a2706b110ca653fc992d761
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 8c8751a4d0..8f730dbd17 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -67,6 +67,7 @@ config ROCKCHIP_RK3288
 config ROCKCHIP_RK3328
 	bool "Support Rockchip RK3328"
 	select ARM64
+	select GICV2
 	help
 	  The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
 	  including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index 9819b22ce2..e87985c54c 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -22,6 +22,9 @@
 
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */
 
+#define GICD_BASE			0xFF811000
+#define GICC_BASE			0xFF812000
+
 /* MMC/SD IP block */
 #define CONFIG_BOUNCE_BUFFER
 

commit d1d395d70d0d4482edbc2742016316ea2f24607e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Sep 7 19:07:30 2017 +0800

    rockchip: rk322x: enable interrupt support
    
    Change-Id: I587628af26073499e3dcc8814e016f9b5276fafd
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 8526d7d1ad..8c8751a4d0 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -44,6 +44,7 @@ config ROCKCHIP_RK322X
 	select DEBUG_UART_BOARD_INIT
 	select TPL_LIBCOMMON_SUPPORT
 	select TPL_LIBGENERIC_SUPPORT
+	select GICV2
 	help
 	  The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
 	  including NEON and GPU, Mali-400 graphics, several DDR3 options
diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h
index 6ebe7b7f5c..432a1c2a24 100644
--- a/include/configs/rk322x_common.h
+++ b/include/configs/rk322x_common.h
@@ -29,6 +29,9 @@
 #define CONFIG_TPL_STACK		0x10088000
 #define CONFIG_TPL_TEXT_BASE		0x10081004
 
+#define GICD_BASE                 	0x32011000
+#define GICC_BASE                  	0x32012000
+
 #define CONFIG_ROCKCHIP_MAX_INIT_SIZE	(28 << 10)
 #define CONFIG_ROCKCHIP_CHIP_TAG	"RK32"
 

commit a93252df4b8889072b30bb4c81676ac47442bcb3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Sep 25 15:24:33 2017 +0800

    rockchip: Kconfig: add CONFIG_GICV2 and CONFIG_GIV3 options
    
    Change-Id: I6c7aec8af2570e7de73a0002bb88f3818b09b266
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index bd58ed93b6..8526d7d1ad 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -198,6 +198,12 @@ config ROCKCHIP_PARTITION_BOOT
 	help
 	  This enables support for bootimg system from rockchip format partition
 
+config GICV2
+	bool "ARM GICv2"
+
+config GICV3
+	bool "ARM GICv3"
+
 source "arch/arm/mach-rockchip/rk3036/Kconfig"
 source "arch/arm/mach-rockchip/rk3188/Kconfig"
 source "arch/arm/mach-rockchip/rk322x/Kconfig"

commit fa40f8a0c4e1a304a22cb297b4faf59a4627a774
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Sep 25 15:22:49 2017 +0800

    ARM: add support for irq interrup framework
    
    both GICV2 and GICV3 are supported
    
    Change-Id: Ie928cc781c0e0830b98d12c4033e45a43befc2ff
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S
index 5c500be51d..7a21560416 100644
--- a/arch/arm/cpu/armv8/start.S
+++ b/arch/arm/cpu/armv8/start.S
@@ -246,6 +246,23 @@ WEAK(lowlevel_init)
 #endif
 #endif
 
+#if defined(CONFIG_IRQ)
+	/*
+	 * Setting HCR_EL2.TGE AMO IMO FMO for exception rounting to EL2
+	 */
+	mrs	x0, CurrentEL		/* check currentEL */
+	cmp	x0, 0x8
+	b.ne	end			/* currentEL != EL2 */
+
+	mrs	x9, hcr_el2
+	orr	x9, x9, #(7 << 3)	/* HCR_EL2.AMO IMO FMO set */
+	orr	x9, x9, #(1 << 27)	/* HCR_EL2.TGE set */
+	msr	hcr_el2, x9
+
+end:
+	nop
+#endif /* CONFIG_IRQ */
+
 #ifdef CONFIG_ARMV8_MULTIENTRY
 	branch_if_master x0, x1, 2f
 
diff --git a/arch/arm/lib/gic_64.S b/arch/arm/lib/gic_64.S
index 62d0022408..febd967e28 100644
--- a/arch/arm/lib/gic_64.S
+++ b/arch/arm/lib/gic_64.S
@@ -108,6 +108,50 @@ ENTRY(gic_init_secure_percpu)
 	mov	w11, #0x1		/* Enable SGI 0 */
 	str	w11, [x10, GICR_ISENABLERn]
 
+#ifdef CONFIG_IRQ
+	/* Rockchip: check elx */
+	switch_el x0, el3_sre, el2_sre, el1_sre
+
+	/* Initialize Cpu Interface */
+el3_sre:
+	mrs	x10, ICC_SRE_EL3
+	orr	x10, x10, #0xf		/* SRE & Disable IRQ/FIQ Bypass & */
+					/* Allow EL2 access to ICC_SRE_EL2 */
+	msr	ICC_SRE_EL3, x10
+	isb
+
+el2_sre:
+	mrs	x10, ICC_SRE_EL2
+	orr	x10, x10, #0xf		/* SRE & Disable IRQ/FIQ Bypass & */
+					/* Allow EL1 access to ICC_SRE_EL1 */
+	msr	ICC_SRE_EL2, x10
+	isb
+
+el1_sre:
+	mrs	x0, CurrentEL		/* check currentEL */
+	cmp	x0, 0xC
+	b.ne	el1_ctlr		/* currentEL != EL3 */
+
+el3_ctlr:
+	mov	x10, #0x3		/* EnableGrp1NS | EnableGrp1S */
+	msr	ICC_IGRPEN1_EL3, x10
+	isb
+
+	msr	ICC_CTLR_EL3, xzr
+	isb
+
+el1_ctlr:
+	mov	x10, #0x3		/* EnableGrp1NS | EnableGrp1S */
+	msr	ICC_IGRPEN1_EL1, x10
+	isb
+
+	msr	ICC_CTLR_EL1, xzr	/* NonSecure ICC_CTLR_EL1 */
+	isb
+
+	mov	x10, #0xf0		/* Non-Secure access to ICC_PMR_EL1 */
+	msr	ICC_PMR_EL1, x10
+	isb
+#else
 	/* Initialize Cpu Interface */
 	mrs	x10, ICC_SRE_EL3
 	orr	x10, x10, #0xf		/* SRE & Disable IRQ/FIQ Bypass & */
@@ -134,6 +178,8 @@ ENTRY(gic_init_secure_percpu)
 	mov	x10, #0x1 << 7		/* Non-Secure access to ICC_PMR_EL1 */
 	msr	ICC_PMR_EL1, x10
 	isb
+#endif
+
 #elif defined(CONFIG_GICV2)
 	/*
 	 * Initialize SGIs and PPIs
diff --git a/arch/arm/lib/interrupts.c b/arch/arm/lib/interrupts.c
index 80869adb61..6b8ec16776 100644
--- a/arch/arm/lib/interrupts.c
+++ b/arch/arm/lib/interrupts.c
@@ -26,6 +26,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#ifndef CONFIG_IRQ
 int interrupt_init (void)
 {
 	/*
@@ -44,6 +45,7 @@ int disable_interrupts (void)
 {
 	return 0;
 }
+#endif
 
 void bad_mode (void)
 {
@@ -154,6 +156,7 @@ void do_fiq (struct pt_regs *pt_regs)
 	bad_mode ();
 }
 
+#ifndef CONFIG_IRQ
 void do_irq (struct pt_regs *pt_regs)
 {
 	efi_restore_gd();
@@ -162,3 +165,4 @@ void do_irq (struct pt_regs *pt_regs)
 	show_regs (pt_regs);
 	bad_mode ();
 }
+#endif
diff --git a/arch/arm/lib/interrupts_64.c b/arch/arm/lib/interrupts_64.c
index 7c9cfce69f..e151f80625 100644
--- a/arch/arm/lib/interrupts_64.c
+++ b/arch/arm/lib/interrupts_64.c
@@ -9,7 +9,7 @@
 #include <linux/compiler.h>
 #include <efi_loader.h>
 
-
+#ifndef CONFIG_IRQ
 int interrupt_init(void)
 {
 	return 0;
@@ -24,6 +24,7 @@ int disable_interrupts(void)
 {
 	return 0;
 }
+#endif
 
 void show_regs(struct pt_regs *regs)
 {
@@ -92,6 +93,7 @@ void do_sync(struct pt_regs *pt_regs, unsigned int esr)
 	panic("Resetting CPU ...\n");
 }
 
+#ifndef CONFIG_IRQ
 /*
  * do_irq handles the Irq exception.
  */
@@ -102,6 +104,7 @@ void do_irq(struct pt_regs *pt_regs, unsigned int esr)
 	show_regs(pt_regs);
 	panic("Resetting CPU ...\n");
 }
+#endif
 
 /*
  * do_fiq handles the Fiq exception.
diff --git a/arch/arm/lib/stack.c b/arch/arm/lib/stack.c
index 737622d26f..5f15e34ed5 100644
--- a/arch/arm/lib/stack.c
+++ b/arch/arm/lib/stack.c
@@ -25,8 +25,16 @@ int arch_reserve_stacks(void)
 	gd->irq_sp = gd->start_addr_sp;
 
 # if !defined(CONFIG_ARM64)
+#ifdef CONFIG_IRQ
+#ifndef CONFIG_IRQ_STACK_SIZE
+#define CONFIG_IRQ_STACK_SIZE	8192
+#endif
+	gd->start_addr_sp -= CONFIG_IRQ_STACK_SIZE;
+
+#else
 	/* leave 3 words for abort-stack, plus 1 for alignment */
 	gd->start_addr_sp -= 16;
+#endif
 # endif
 #endif
 
diff --git a/arch/arm/lib/vectors.S b/arch/arm/lib/vectors.S
index 101909103e..d25cf4585c 100644
--- a/arch/arm/lib/vectors.S
+++ b/arch/arm/lib/vectors.S
@@ -131,6 +131,13 @@ IRQ_STACK_START_IN:
 	.word	0x0badc0de
 #endif
 
+#ifdef CONFIG_IRQ
+/* IRQ stack memory (calculated at run-time) */
+.globl IRQ_STACK_START
+IRQ_STACK_START:
+	.word	0x0badc0de
+#endif
+
 @
 @ IRQ stack frame.
 @
@@ -257,9 +264,16 @@ not_used:
 
 	.align	5
 irq:
+#ifdef CONFIG_IRQ
+	get_irq_stack
+	irq_save_user_regs
+	bl	do_irq
+	irq_restore_user_regs
+#else
 	get_bad_stack
 	bad_save_user_regs
 	bl	do_irq
+#endif
 
 	.align	5
 fiq:

commit 4e6670fe63b534b8dfcf07b7547078f9298dd574
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Sep 25 14:44:10 2017 +0800

    drivers: add irq interrupt framework support
    
    This patch add support for IRQ interrupt, FIQ not included.
    It will be enabled when you select CONFIG_GICV2 or CONFIG_GICV3.
    
    The framework support gic interrupt and gpio interrupt, relative APIs
    are provided in: ./include/irq-platform.h
    
    If you'd like to add a new platform support into interrupt framework,
    please follow the steps:
    1. add relative definitions in the file like other platforms:
            ./include/irq-platform.h
    
    2. add GICD, GICC and GICR(for GICV3) base address definitions in the
       rkxxx-common.h, they are needed in: arch/arm/cpu/armv8/start.S;
    
    3. enable CONFIG_GICV2 or CONFIG_GICV3.
    
    Notice:
    1. the framework is initialize in function 'interrupt_init()' of
       _sequence_r[]. So you should not request irqs too early.
    
    2. IRQ stack size is configured by CONFIG_IRQ_STACK_SIZE, the default
       value is 8KB when CONFIG_IRQ_STACK_SIZE is absent.
    
    Change-Id: I3d9e29873c9d64cd28aabd13a61111438c5902b0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/Kconfig b/drivers/Kconfig
index 613e60235d..baf2d5bac0 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -98,6 +98,8 @@ source "drivers/video/Kconfig"
 
 source "drivers/watchdog/Kconfig"
 
+source "drivers/irq/Kconfig"
+
 config PHYS_TO_BUS
 	bool "Custom physical to bus address mapping"
 	help
diff --git a/drivers/Makefile b/drivers/Makefile
index dab5c182c2..5edf096a3a 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -16,6 +16,7 @@ obj-$(CONFIG_$(SPL_TPL_)SERIAL_SUPPORT) += serial/
 obj-$(CONFIG_$(SPL_TPL_)SPI_FLASH_SUPPORT) += mtd/spi/
 obj-$(CONFIG_$(SPL_TPL_)SPI_SUPPORT) += spi/
 obj-$(CONFIG_$(SPL_TPL_)TIMER) += timer/
+obj-$(CONFIG_IRQ) += irq/
 
 ifndef CONFIG_TPL_BUILD
 ifdef CONFIG_SPL_BUILD
diff --git a/drivers/irq/Kconfig b/drivers/irq/Kconfig
new file mode 100644
index 0000000000..090b4e1ceb
--- /dev/null
+++ b/drivers/irq/Kconfig
@@ -0,0 +1,6 @@
+config IRQ
+	bool "IRQ support"
+	depends on GICV2 || GICV3
+	default y
+	help
+	  Provide IRQ support for platforms
diff --git a/drivers/irq/Makefile b/drivers/irq/Makefile
new file mode 100644
index 0000000000..244a65d123
--- /dev/null
+++ b/drivers/irq/Makefile
@@ -0,0 +1,10 @@
+#
+# (C) Copyright 2017 Rockchip Electronics Co., Ltd.
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y += irq-gic.o
+obj-y += irq-gpio.o
+obj-y += irq-generic.o
+obj-y += irq-gpio-switch.o
\ No newline at end of file
diff --git a/drivers/irq/irq-generic.c b/drivers/irq/irq-generic.c
new file mode 100644
index 0000000000..93a557f857
--- /dev/null
+++ b/drivers/irq/irq-generic.c
@@ -0,0 +1,268 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <asm/io.h>
+#include <asm/u-boot-arm.h>
+#include <irq-generic.h>
+#include "irq-gic.h"
+#include "irq-gpio.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct irq_desc {
+	void (*handle_irq)(void *data);
+};
+
+static struct irq_desc irqs_desc[PLATFORM_MAX_IRQS_NR];
+static struct irq_chip *gic_irq_chip, *gpio_irq_chip;
+static bool initialized;
+
+static int irq_bad(int irq)
+{
+	if (irq >= PLATFORM_MAX_IRQS_NR) {
+		printf("WARN: IRQ %d is out of max supported IRQ %d\n",
+		       irq, PLATFORM_MAX_IRQS_NR);
+		return -EINVAL;
+	}
+
+	if (!initialized) {
+		printf("WARN: Interrupt framework is not initialized\n");
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+/* general interrupt handler for gpio chip */
+void _generic_gpio_handle_irq(int irq, void *data)
+{
+	if (irq_bad(irq))
+		return;
+
+	if (irq < PLATFORM_GIC_IRQS_NR) {
+		printf("WRAN: IRQ %d is not a GPIO irq\n", irq);
+		return;
+	}
+
+	if (irqs_desc[irq].handle_irq)
+		irqs_desc[irq].handle_irq(data);
+}
+
+void _do_generic_irq_handler(void)
+{
+	u32 irq = gic_irq_chip->irq_get();
+
+	if (irq < PLATFORM_GIC_IRQS_NR) {
+		if (irqs_desc[irq].handle_irq)
+			irqs_desc[irq].handle_irq((void *)(unsigned long)irq);
+	}
+
+	gic_irq_chip->irq_eoi(irq);
+}
+
+static int chip_irq_bad(struct irq_chip *chip)
+{
+	if (!chip->name ||
+	    !chip->irq_init ||
+	    !chip->irq_enable ||
+	    !chip->irq_disable ||
+	    !chip->irq_set_type)
+		return -EINVAL;
+
+	return 0;
+}
+
+static int _do_arch_irq_init(void)
+{
+	int irq, err = -EINVAL;
+
+	/* After relocation done, bss data initialized */
+	if (!(gd->flags & GD_FLG_RELOC)) {
+		printf("WARN: interrupt should be init after reloc\n");
+		return -EINVAL;
+	}
+
+	/*
+	 * should set true before arch_gpio_irq_init(), otherwise
+	 *  can't request irqs for gpio banks.
+	 */
+	initialized = true;
+
+	for (irq = 0; irq < PLATFORM_MAX_IRQS_NR; irq++)
+		irqs_desc[irq].handle_irq = NULL;
+
+	gic_irq_chip = arch_gic_irq_init();
+	if (chip_irq_bad(gic_irq_chip)) {
+		printf("ERROR: bad gic irq chip\n");
+		goto out;
+	}
+
+	gpio_irq_chip = arch_gpio_irq_init();
+	if (chip_irq_bad(gpio_irq_chip)) {
+		printf("ERROR: bad gpio irq chip\n");
+		goto out;
+	}
+
+	err = gic_irq_chip->irq_init();
+	if (err) {
+		printf("ERROR: gic interrupt init failed\n");
+		goto out;
+	}
+
+	err = gpio_irq_chip->irq_init();
+	if (err) {
+		printf("ERROR: gpio interrupt init failed\n");
+		goto out;
+	}
+
+	return 0;
+
+out:
+	initialized = false;
+
+	return err;
+}
+
+int irq_handler_enable(int irq)
+{
+	if (irq_bad(irq))
+		return -EINVAL;
+
+	if (irq < PLATFORM_GIC_IRQS_NR)
+		return gic_irq_chip->irq_enable(irq);
+	else
+		return gpio_irq_chip->irq_enable(irq);
+}
+
+int irq_handler_disable(int irq)
+{
+	if (irq_bad(irq))
+		return -EINVAL;
+
+	if (irq < PLATFORM_GIC_IRQS_NR)
+		return gic_irq_chip->irq_disable(irq);
+	else
+		return gpio_irq_chip->irq_disable(irq);
+}
+
+int irq_set_irq_type(int irq, unsigned int type)
+{
+	if (irq_bad(irq))
+		return -EINVAL;
+
+	if (irq < PLATFORM_GIC_IRQS_NR)
+		return gic_irq_chip->irq_set_type(irq, type);
+	else
+		return gpio_irq_chip->irq_set_type(irq, type);
+}
+
+void irq_install_handler(int irq, interrupt_handler_t *handler, void *data)
+{
+	if (irq_bad(irq))
+		return;
+
+	irqs_desc[irq].handle_irq = handler;
+}
+
+void irq_free_handler(int irq)
+{
+	if (irq_bad(irq))
+		return;
+
+	irqs_desc[irq].handle_irq = NULL;
+}
+
+#ifdef CONFIG_ARM64
+static void cpu_local_irq_enable(void)
+{
+	asm volatile("msr daifclr, #0x02");
+}
+
+static int cpu_local_irq_disable(void)
+{
+	asm volatile("msr daifset, #0x02");
+
+	return 0;
+}
+
+void do_irq(struct pt_regs *pt_regs, unsigned int esr)
+{
+	_do_generic_irq_handler();
+}
+#else
+static void cpu_local_irq_enable(void)
+{
+	unsigned long cpsr;
+
+	__asm__ __volatile__("mrs %0, cpsr\n"
+			     "bic %0, %0, #0x80\n"
+			     "msr cpsr_c, %0"
+			     : "=r" (cpsr) : : "memory");
+}
+
+static int cpu_local_irq_disable(void)
+{
+	unsigned long old_cpsr, new_cpsr;
+
+	__asm__ __volatile__("mrs %0, cpsr\n"
+			     "orr %1, %0, #0xc0\n"
+			     "msr cpsr_c, %1"
+			     : "=r" (old_cpsr), "=r" (new_cpsr)
+			     :
+			     : "memory");
+
+	return (old_cpsr & 0x80) == 0;
+}
+
+void do_irq(struct pt_regs *pt_regs)
+{
+	_do_generic_irq_handler();
+}
+#endif
+
+int arch_interrupt_init(void)
+{
+#ifndef CONFIG_ARM64
+	unsigned long cpsr __maybe_unused;
+
+	/* stack has been reserved in: arch_reserve_stacks() */
+	IRQ_STACK_START = gd->irq_sp;
+
+	__asm__ __volatile__("mrs %0, cpsr\n"
+			     : "=r" (cpsr)
+			     :
+			     : "memory");
+
+	__asm__ __volatile__("msr cpsr_c, %0\n"
+			     "mov sp, %1\n"
+			     :
+			     : "r" (IRQ_MODE | I_BIT |
+				    F_BIT | (cpsr & ~FIQ_MODE)),
+			       "r" (IRQ_STACK_START)
+			     : "memory");
+
+	__asm__ __volatile__("msr cpsr_c, %0"
+			     :
+			     : "r" (cpsr)
+			     : "memory");
+#endif
+	return _do_arch_irq_init();
+}
+
+int interrupt_init(void)
+{
+	return arch_interrupt_init();
+}
+
+void enable_interrupts(void)
+{
+	cpu_local_irq_enable();
+}
+
+int disable_interrupts(void)
+{
+	return cpu_local_irq_disable();
+}
diff --git a/drivers/irq/irq-gic.c b/drivers/irq/irq-gic.c
new file mode 100644
index 0000000000..3b1c91db9d
--- /dev/null
+++ b/drivers/irq/irq-gic.c
@@ -0,0 +1,289 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <asm/io.h>
+#include <asm/gic.h>
+#include <config.h>
+#include <irq-generic.h>
+#include "irq-gic.h"
+
+typedef enum INT_TRIG {
+	INT_LEVEL_TRIGGER,
+	INT_EDGE_TRIGGER
+} eINT_TRIG;
+
+typedef enum INT_SECURE {
+	INT_SECURE,
+	INT_NOSECURE
+} eINT_SECURE;
+
+typedef enum INT_SIGTYPE {
+	INT_SIGTYPE_IRQ,
+	INT_SIGTYPE_FIQ
+} eINT_SIGTYPE;
+
+#define g_gicd		((pGICD_REG)GICD_BASE)
+#define g_gicc		((pGICC_REG)GICC_BASE)
+
+__maybe_unused static u8 g_gic_cpumask = 0x01;
+
+static inline void int_set_prio_filter(u32 nprio)
+{
+	g_gicc->iccpmr = (nprio & 0xff);
+}
+
+static inline void int_enable_distributor(void)
+{
+	g_gicd->icddcr = 0x01;
+}
+
+static inline void int_disable_distributor(void)
+{
+	g_gicd->icddcr = 0x00;
+}
+
+static inline void int_enable_secure_signal(void)
+{
+	g_gicc->iccicr |= 0x01;
+}
+
+static inline void int_disable_secure_signal(void)
+{
+	g_gicc->iccicr &= (~0x01);
+}
+
+static inline void int_enable_nosecure_signal(void)
+{
+	g_gicc->iccicr |= 0x02;
+}
+
+static inline void int_disable_nosecure_signal(void)
+{
+	g_gicc->iccicr &= (~0x02);
+}
+
+static int gic_irq_set_trigger(int irq, eINT_TRIG ntrig)
+{
+	u32 group, offset;
+
+	if (irq >= PLATFORM_GIC_IRQS_NR)
+		return -EINVAL;
+
+	group = irq / 16;
+	offset = irq % 16;
+
+	if (ntrig == INT_LEVEL_TRIGGER)
+		g_gicd->icdicfr[group] &= (~(1 << (2 * offset + 1)));
+	else
+		g_gicd->icdicfr[group] |= (1 << (2 * offset + 1));
+
+	return 0;
+}
+
+__maybe_unused static int gic_irq_set_pending(int irq)
+{
+	u32 group, offset;
+
+	if (irq >= PLATFORM_GIC_IRQS_NR)
+		return -EINVAL;
+
+	group = irq / 32;
+	offset = irq % 32;
+	g_gicd->icdispr[group] = (0x1 << offset);
+
+	return 0;
+}
+
+__maybe_unused static int gic_irq_clear_pending(int irq)
+{
+	u32 group, offset;
+
+	if (irq >= PLATFORM_GIC_IRQS_NR)
+		return -EINVAL;
+
+	group = irq / 32;
+	offset = irq % 32;
+	g_gicd->icdicpr[group] = (0x1 << offset);
+
+	return 0;
+}
+
+__maybe_unused static int gic_irq_set_secure(int irq, eINT_SECURE nsecure)
+{
+	u32 group, offset;
+
+	if (irq >= PLATFORM_GIC_IRQS_NR)
+		return -EINVAL;
+
+	group = irq / 32;
+	offset = irq % 32;
+	g_gicd->icdiser[group] |= nsecure << offset;
+
+	return 0;
+}
+
+__maybe_unused static u32 gic_get_cpumask(void)
+{
+	u32 mask = 0, i;
+
+	for (i = mask = 0; i < 32; i += 4) {
+		mask = g_gicd->itargetsr[i];
+		mask |= mask >> 16;
+		mask |= mask >> 8;
+		if (mask)
+			break;
+	}
+
+	if (!mask)
+		printf("GIC CPU mask not found.\n");
+
+	debug("GIC CPU mask = 0x%08x\n", mask);
+
+	return mask;
+}
+
+static int gic_irq_enable(int irq)
+{
+#ifdef CONFIG_GICV2
+	u32 shift = (irq % 4) * 8;
+	u32 offset = (irq / 4);
+	u32 M, N;
+
+	if (irq >= PLATFORM_GIC_IRQS_NR)
+		return -EINVAL;
+
+	M = irq / 32;
+	N = irq % 32;
+
+	g_gicc->iccicr &= (~0x08);
+	g_gicd->icdiser[M] = (0x1 << N);
+	g_gicd->itargetsr[offset] &= ~(0xFF << shift);
+	g_gicd->itargetsr[offset] |= (g_gic_cpumask << shift);
+#else
+	u32 M, N;
+
+	if (irq >= PLATFORM_GIC_IRQS_NR)
+		return -EINVAL;
+
+	M = irq / 32;
+	N = irq % 32;
+	g_gicd->icdiser[M] = (0x1 << N);
+#endif
+
+	return 0;
+}
+
+static int gic_irq_disable(int irq)
+{
+	u32 group, offset;
+
+	if (irq >= PLATFORM_GIC_IRQS_NR)
+		return -EINVAL;
+
+	group = irq / 32;
+	offset = irq % 32;
+	g_gicd->icdicer[group] = (0x1 << offset);
+
+	return 0;
+}
+
+/*
+ * irq_set_type - set the irq trigger type for an irq
+ *
+ * @irq: irq number
+ * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see asm/arch/irq.h
+ */
+static int gic_irq_set_type(int irq, unsigned int type)
+{
+	unsigned int int_type;
+
+	switch (type) {
+	case IRQ_TYPE_EDGE_RISING:
+	case IRQ_TYPE_EDGE_FALLING:
+		int_type = INT_EDGE_TRIGGER;
+		break;
+	case IRQ_TYPE_LEVEL_HIGH:
+	case IRQ_TYPE_LEVEL_LOW:
+		int_type = INT_LEVEL_TRIGGER;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	gic_irq_set_trigger(irq, int_type);
+
+	return 0;
+}
+
+static void gic_irq_eoi(int irq)
+{
+#ifdef CONFIG_GICV2
+	g_gicc->icceoir = irq;
+#else
+	asm volatile("msr " __stringify(ICC_EOIR1_EL1) ", %0"
+			: : "r" ((u64)irq));
+	asm volatile("msr " __stringify(ICC_DIR_EL1) ", %0"
+			: : "r" ((u64)irq));
+	isb();
+#endif
+}
+
+static int gic_irq_get(void)
+{
+#ifdef CONFIG_GICV2
+	return g_gicc->icciar & 0x3ff; /* bit9 - bit0 */
+#else
+	u64 irqstat;
+
+	asm volatile("mrs %0, " __stringify(ICC_IAR1_EL1) : "=r" (irqstat));
+	return (u32)irqstat & 0x3ff;
+#endif
+}
+
+static int gic_irq_init(void)
+{
+	/* GICV3 done in: arch/arm/cpu/armv8/start.S */
+#ifdef CONFIG_GICV2
+	/* end of interrupt */
+	g_gicc->icceoir = PLATFORM_GIC_IRQS_NR;
+
+	/* disable gicc and gicd */
+	g_gicc->iccicr = 0x00;
+	g_gicd->icddcr = 0x00;
+
+	/* enable interrupt */
+	g_gicd->icdicer[0] = 0xFFFFFFFF;
+	g_gicd->icdicer[1] = 0xFFFFFFFF;
+	g_gicd->icdicer[2] = 0xFFFFFFFF;
+	g_gicd->icdicer[3] = 0xFFFFFFFF;
+	g_gicd->icdicfr[3] &= ~(1 << 1);
+
+	/* set interrupt priority threhold min: 256 */
+	int_set_prio_filter(0xff);
+	int_enable_secure_signal();
+	int_enable_nosecure_signal();
+	int_enable_distributor();
+
+	g_gic_cpumask = gic_get_cpumask();
+#endif
+
+	return 0;
+}
+
+static struct irq_chip gic_irq_chip = {
+	.name		= "gic-irq-chip",
+	.irq_init	= gic_irq_init,
+	.irq_get	= gic_irq_get,
+	.irq_enable	= gic_irq_enable,
+	.irq_disable	= gic_irq_disable,
+	.irq_eoi	= gic_irq_eoi,
+	.irq_set_type	= gic_irq_set_type,
+};
+
+struct irq_chip *arch_gic_irq_init(void)
+{
+	return &gic_irq_chip;
+}
diff --git a/drivers/irq/irq-gic.h b/drivers/irq/irq-gic.h
new file mode 100644
index 0000000000..4bd53c2092
--- /dev/null
+++ b/drivers/irq/irq-gic.h
@@ -0,0 +1,60 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _IRQ_GIC_H_
+#define _IRQ_GIC_H_
+
+#include <irq-platform.h>
+
+/* INTC Registers */
+typedef volatile struct tagGICD_REG {
+	u32 icddcr;		/* 0x000 */
+	u32 icdictr;		/* 0x004 */
+	u32 icdiidr;		/* 0x008 */
+	u32 reserved0[29];
+	u32 icdisr[4];		/* 0x080 */
+	u32 reserved1[28];
+	u32 icdiser[4];		/* 0x100 */
+	u32 reserved2[28];
+	u32 icdicer[4];		/* 0x180: GICD_ISENABLERn */
+	u32 reserved3[28];
+	u32 icdispr[4];		/* 0x200 */
+	u32 reserved4[28];
+	u32 icdicpr[4];		/* 0x280 */
+	u32 reserved5[28];
+	u32 icdiabr[4];		/* 0x300 */
+	u32 reserved6[60];
+	u32 icdipr_sgi[4];	/* 0x400 */
+	u32 icdipr_ppi[4];	/* 0x410 */
+	u32 icdipr_spi[18];	/* 0x420 */
+	u32 reserved7[230];
+	u32 itargetsr[255];	/* 0x800 */
+	u32 reserved9[1];
+	u32 icdicfr[7];		/* 0xc00: GICD_ICFGRn: trigger level/edge */
+	u32 reserved8[185];
+	u32 icdsgir;		/* 0xf00 */
+} GICD_REG, *pGICD_REG;
+
+typedef volatile struct tagGICC_REG {
+	u32 iccicr;		/* 0x00 */
+	u32 iccpmr;		/* 0x04: GICC_PMR */
+	u32 iccbpr;		/* 0x08 */
+	u32 icciar;		/* 0x0c */
+	u32 icceoir;		/* 0x10 */
+	u32 iccrpr;		/* 0x14 */
+	u32 icchpir;		/* 0x18 */
+	u32 iccabpr;		/* 0x1c */
+	u32 reserved0[55];
+	u32 icciidr;		/* 0xfc */
+} GICC_REG, *pGICC_REG;
+
+#define PLATFORM_GIC_IRQS_NR		GIC_IRQS_NR
+#define PLATFORM_GPIO_IRQS_NR		GPIO_IRQS_NR
+#define PLATFORM_MAX_IRQS_NR		(GIC_IRQS_NR + GPIO_IRQS_NR)
+
+struct irq_chip *arch_gic_irq_init(void);
+
+#endif /* _IRQ_GIC_H_ */
diff --git a/drivers/irq/irq-gpio-switch.c b/drivers/irq/irq-gpio-switch.c
new file mode 100644
index 0000000000..79c78034cf
--- /dev/null
+++ b/drivers/irq/irq-gpio-switch.c
@@ -0,0 +1,161 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <dm.h>
+#include <irq-generic.h>
+#include "irq-gpio-switch.h"
+
+static struct gpio_bank gpio_banks[GPIO_BANK_NUM] = {
+#if GPIO_BANK_NUM >= 1
+	GPIO_BANK_REGISTER(0, GPIO_BANK_PINS),
+#endif
+#if GPIO_BANK_NUM >= 2
+	GPIO_BANK_REGISTER(1, GPIO_BANK_PINS),
+#endif
+#if GPIO_BANK_NUM >= 3
+	GPIO_BANK_REGISTER(2, GPIO_BANK_PINS),
+#endif
+#if GPIO_BANK_NUM >= 4
+	GPIO_BANK_REGISTER(3, GPIO_BANK_PINS),
+#endif
+#if GPIO_BANK_NUM >= 5
+	GPIO_BANK_REGISTER(4, GPIO_BANK_PINS),
+#endif
+#if GPIO_BANK_NUM >= 6
+	GPIO_BANK_REGISTER(5, GPIO_BANK_PINS),
+#endif
+#if GPIO_BANK_NUM >= 7
+	GPIO_BANK_REGISTER(6, GPIO_BANK_PINS),
+#endif
+#if GPIO_BANK_NUM >= 8
+	GPIO_BANK_REGISTER(7, GPIO_BANK_PINS),
+#endif
+#if GPIO_BANK_NUM >= 9
+	GPIO_BANK_REGISTER(8, GPIO_BANK_PINS),
+#endif
+#if GPIO_BANK_NUM >= 10
+	GPIO_BANK_REGISTER(9, GPIO_BANK_PINS),
+#endif
+};
+
+static int gpio_is_valid(u32 gpio)
+{
+	if ((gpio == EINVAL_GPIO) || !GPIO_BANK_VALID(gpio) ||
+	    !GPIO_PIN_VALID(gpio)) {
+		printf("gpio = 0x%x is not valid!\n", gpio);
+		return 0;
+	}
+
+	return 1;
+}
+
+static int _hard_gpio_to_irq(u32 gpio)
+{
+	int idx, bank = 0, pin = 0;
+
+	if (!gpio_is_valid(gpio))
+		return -EINVAL;
+
+	bank = (gpio & GPIO_BANK_MASK) >> GPIO_BANK_OFFSET;
+	pin = (gpio & GPIO_PIN_MASK) >> GPIO_PIN_OFFSET;
+
+	for (idx = 0; idx < ARRAY_SIZE(gpio_banks); idx++) {
+		if (gpio_banks[idx].id == bank)
+			return (gpio_banks[idx].irq_base + pin);
+	}
+
+	return -EINVAL;
+}
+
+static int _irq_to_gpio(int irq)
+{
+	int bank, pin, idx;
+
+	bank = (irq - PIN_BASE) / GPIO_BANK_PINS;
+	pin = (irq - PIN_BASE) % GPIO_BANK_PINS;
+
+	for (idx = 0; idx < ARRAY_SIZE(gpio_banks); idx++) {
+		if (gpio_banks[idx].id == bank) {
+			return (bank << GPIO_BANK_OFFSET) |
+				(pin << GPIO_PIN_OFFSET);
+		}
+	}
+
+	return -EINVAL;
+}
+
+int gpio_to_irq(struct gpio_desc *gpio)
+{
+	int irq_gpio, bank;
+	bool found;
+	char *name;
+
+	if (!gpio->dev->name) {
+		printf("can't find device name for the gpio bank\n");
+		return EINVAL_GPIO;
+	}
+
+	name = strtok((char *)gpio->dev->name, "@");
+	if (!name) {
+		printf("can't find correct device name for the gpio bank\n");
+		return EINVAL_GPIO;
+	}
+
+	for (bank = 0; bank < ARRAY_SIZE(gpio_banks); bank++) {
+		if (!strcmp(gpio_banks[bank].name, name)) {
+			found = true;
+			break;
+		}
+	}
+
+	if (!found) {
+		printf("irq gpio framework can't find %s\n", name);
+		return EINVAL_GPIO;
+	}
+
+	irq_gpio = RK_IRQ_GPIO(bank, gpio->offset);
+	if (!gpio_is_valid(irq_gpio))
+		return EINVAL_GPIO;
+
+	return _hard_gpio_to_irq(irq_gpio);
+}
+
+int hard_gpio_to_irq(u32 gpio)
+{
+	if (!gpio_is_valid(gpio))
+		return EINVAL_GPIO;
+
+	return _hard_gpio_to_irq(gpio);
+}
+
+int irq_to_gpio(int irq)
+{
+	return _irq_to_gpio(irq);
+}
+
+struct gpio_bank *gpio_id_to_bank(u32 id)
+{
+	int idx;
+
+	for (idx = 0; idx < ARRAY_SIZE(gpio_banks); idx++) {
+		if (gpio_banks[idx].id == id)
+			return &gpio_banks[idx];
+	}
+
+	return NULL;
+}
+
+struct gpio_bank *gpio_to_bank(u32 gpio)
+{
+	int id;
+
+	if (!gpio_is_valid(gpio))
+		return NULL;
+
+	id = (gpio & GPIO_BANK_MASK) >> GPIO_BANK_OFFSET;
+
+	return gpio_id_to_bank(id);
+}
diff --git a/drivers/irq/irq-gpio-switch.h b/drivers/irq/irq-gpio-switch.h
new file mode 100644
index 0000000000..1442825132
--- /dev/null
+++ b/drivers/irq/irq-gpio-switch.h
@@ -0,0 +1,52 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _IRQ_GPIO_SWITCH_H_
+#define _IRQ_GPIO_SWITCH_H_
+
+#include <asm/io.h>
+#include <common.h>
+#include <irq-platform.h>
+
+/* bank and pin bit mask */
+#define GPIO_BANK_MASK		0xFFFFFF00
+#define GPIO_BANK_OFFSET	8
+#define GPIO_PIN_MASK		0x000000FF
+#define GPIO_PIN_OFFSET		0
+
+#define EINVAL_GPIO		-1
+#define PIN_BASE		GIC_IRQS_NR
+
+struct gpio_bank {
+	char *name;
+	void __iomem *regbase;
+	int id;
+	int irq_base;
+	int ngpio;
+};
+
+#define GPIO_BANK_REGISTER(ID, GPIO_BANK_NUM)	\
+	{								\
+		.name	  = __stringify(gpio##ID),			\
+		.regbase  = (unsigned char __iomem *)GPIO##ID##_PHYS,	\
+		.id	  = ID,						\
+		.irq_base = PIN_BASE + (ID) * (GPIO_BANK_NUM),		\
+		.ngpio    = GPIO_BANK_NUM,				\
+	}
+
+/* gpio bank[31:8] and pin[7:0] */
+#define GPIO_BANK(gpio)		((gpio & GPIO_BANK_MASK) >> GPIO_BANK_OFFSET)
+#define GPIO_PIN(gpio)		((gpio & GPIO_PIN_MASK) >> GPIO_PIN_OFFSET)
+#define GPIO_BANK_VALID(gpio)	(GPIO_BANK(gpio) < GPIO_BANK_NUM)
+#define GPIO_PIN_VALID(gpio)	(GPIO_PIN(gpio) < GPIO_BANK_PINS)
+
+int hard_gpio_to_irq(u32 gpio);
+int irq_to_gpio(int irq);
+
+struct gpio_bank *gpio_id_to_bank(unsigned int id);
+struct gpio_bank *gpio_to_bank(unsigned gpio);
+
+#endif	/* _IRQ_GPIO_SWITCH_H_ */
diff --git a/drivers/irq/irq-gpio.c b/drivers/irq/irq-gpio.c
new file mode 100644
index 0000000000..b331ffeb7f
--- /dev/null
+++ b/drivers/irq/irq-gpio.c
@@ -0,0 +1,246 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <asm/io.h>
+#include <irq-generic.h>
+#include "irq-gpio.h"
+#include "irq-gpio-switch.h"
+
+typedef enum GPIOIntType {
+	GPIOLevelLow = 0,
+	GPIOLevelHigh,
+	GPIOEdgelFalling,
+	GPIOEdgelRising
+} eGPIOIntType_t;
+
+typedef enum eGPIOPinLevel {
+	GPIO_LOW = 0,
+	GPIO_HIGH
+} eGPIOPinLevel_t;
+
+typedef enum eGPIOPinDirection {
+	GPIO_IN = 0,
+	GPIO_OUT
+} eGPIOPinDirection_t;
+
+#define GPIO_SWPORT_DR		0x00
+#define GPIO_SWPORT_DDR		0x04
+#define GPIO_INTEN		0x30
+#define GPIO_INTMASK		0x34
+#define GPIO_INTTYPE_LEVEL	0x38
+#define GPIO_INT_POLARITY	0x3c
+#define GPIO_INT_STATUS		0x40
+#define GPIO_INT_RAWSTATUS	0x44
+#define GPIO_DEBOUNCE		0x48
+#define GPIO_PORTS_EOI		0x4c
+#define GPIO_EXT_PORT		0x50
+#define GPIO_LS_SYNC		0x60
+
+static inline unsigned pin_to_bit(unsigned pin)
+{
+	return (1 << pin);
+}
+
+static inline unsigned offset_to_bit(unsigned offset)
+{
+	return (1 << offset);
+}
+
+static void gpio_bit_op(void __iomem *regbase, unsigned int offset,
+			u32 bit, unsigned char flag)
+{
+	u32 val = readl(regbase + offset);
+
+	if (flag)
+		val |= bit;
+	else
+		val &= ~bit;
+
+	writel(val, regbase + offset);
+}
+
+static void gpio_irq_unmask(void __iomem *regbase, unsigned int bit)
+{
+	gpio_bit_op(regbase, GPIO_INTEN, bit, 1);
+}
+
+static void gpio_irq_mask(void __iomem *regbase, unsigned int bit)
+{
+	gpio_bit_op(regbase, GPIO_INTEN, bit, 0);
+}
+
+static void gpio_irq_ack(void __iomem *regbase, unsigned int bit)
+{
+	gpio_bit_op(regbase, GPIO_PORTS_EOI, bit, 1);
+}
+
+static void generic_gpio_handle_irq(int irq)
+{
+	struct gpio_bank *bank = gpio_id_to_bank(irq - IRQ_GPIO0);
+	unsigned gpio_irq, pin, unmasked = 0;
+	u32 isr, ilr;
+
+	isr = readl(bank->regbase + GPIO_INT_STATUS);
+	ilr = readl(bank->regbase + GPIO_INTTYPE_LEVEL);
+
+	gpio_irq = bank->irq_base;
+
+	while (isr) {
+		pin = fls(isr) - 1;
+
+		/* first mask and ack irq */
+		gpio_irq_mask(bank->regbase, offset_to_bit(pin));
+		gpio_irq_ack(bank->regbase, offset_to_bit(pin));
+
+		/*
+		 * if gpio is edge triggered, clear condition before executing
+		 * the handler so that we don't miss edges
+		 */
+		if (ilr & (1 << pin)) {
+			unmasked = 1;
+			gpio_irq_unmask(bank->regbase, offset_to_bit(pin));
+		}
+
+		_generic_gpio_handle_irq(gpio_irq + pin, NULL);
+
+		isr &= ~(1 << pin);
+
+		if (!unmasked)
+			gpio_irq_unmask(bank->regbase, offset_to_bit(pin));
+	}
+}
+
+static void gpio_set_intr_type(void __iomem *regbase,
+			       unsigned int bit,
+			       eGPIOIntType_t type)
+{
+	switch (type) {
+	case GPIOLevelLow:
+		gpio_bit_op(regbase, GPIO_INT_POLARITY, bit, 0);
+		gpio_bit_op(regbase, GPIO_INTTYPE_LEVEL, bit, 0);
+		break;
+	case GPIOLevelHigh:
+		gpio_bit_op(regbase, GPIO_INTTYPE_LEVEL, bit, 0);
+		gpio_bit_op(regbase, GPIO_INT_POLARITY, bit, 1);
+		break;
+	case GPIOEdgelFalling:
+		gpio_bit_op(regbase, GPIO_INTTYPE_LEVEL, bit, 1);
+		gpio_bit_op(regbase, GPIO_INT_POLARITY, bit, 0);
+		break;
+	case GPIOEdgelRising:
+		gpio_bit_op(regbase, GPIO_INTTYPE_LEVEL, bit, 1);
+		gpio_bit_op(regbase, GPIO_INT_POLARITY, bit, 1);
+		break;
+	}
+}
+
+static int gpio_irq_set_type(int gpio_irq, unsigned int type)
+{
+	int gpio = irq_to_gpio(gpio_irq);
+	struct gpio_bank *bank = gpio_to_bank(gpio);
+	eGPIOIntType_t int_type = 0;
+
+	if (!bank)
+		return -EINVAL;
+
+	gpio &= GPIO_PIN_MASK;
+	if (gpio >= bank->ngpio)
+		return -EINVAL;
+
+	switch (type) {
+	case IRQ_TYPE_EDGE_RISING:
+		int_type = GPIOEdgelRising;
+		break;
+	case IRQ_TYPE_EDGE_FALLING:
+		int_type = GPIOEdgelFalling;
+		break;
+	case IRQ_TYPE_LEVEL_HIGH:
+		int_type = GPIOLevelHigh;
+		break;
+	case IRQ_TYPE_LEVEL_LOW:
+		int_type = GPIOLevelLow;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	/* Before set interrupt type, gpio must set input */
+	gpio_bit_op(bank->regbase, GPIO_SWPORT_DDR,
+		    offset_to_bit(gpio), GPIO_IN);
+	gpio_set_intr_type(bank->regbase, offset_to_bit(gpio), int_type);
+
+	return 0;
+}
+
+static int gpio_irq_enable(int gpio_irq)
+{
+	int gpio = irq_to_gpio(gpio_irq);
+	struct gpio_bank *bank = gpio_to_bank(gpio);
+
+	if (!bank)
+		return -EINVAL;
+
+	gpio &= GPIO_PIN_MASK;
+	if (gpio >= bank->ngpio)
+		return -EINVAL;
+
+	gpio_irq_unmask(bank->regbase, offset_to_bit(gpio));
+
+	return 0;
+}
+
+static int gpio_irq_disable(int irq)
+{
+	int gpio = irq_to_gpio(irq);
+	struct gpio_bank *bank = gpio_to_bank(gpio);
+
+	if (!bank)
+		return -EINVAL;
+
+	gpio &= GPIO_PIN_MASK;
+	if (gpio >= bank->ngpio)
+		return -EINVAL;
+
+	gpio_irq_mask(bank->regbase, offset_to_bit(gpio));
+
+	return 0;
+}
+
+static int gpio_irq_init(void)
+{
+	struct gpio_bank *bank = NULL;
+	int i = 0;
+
+	for (i = 0; i < GPIO_BANK_NUM; i++) {
+		bank = gpio_id_to_bank(i);
+		if (bank) {
+			/* disable gpio pin interrupt */
+			writel(0, bank->regbase + GPIO_INTEN);
+
+			/* register gpio group irq handler */
+			irq_install_handler(IRQ_GPIO0 + bank->id,
+			(interrupt_handler_t *)generic_gpio_handle_irq, NULL);
+
+			/* default enable all gpio group interrupt */
+			irq_handler_enable(IRQ_GPIO0 + bank->id);
+		}
+	}
+
+	return 0;
+}
+
+static struct irq_chip gpio_irq_chip = {
+	.name		= "gpio-irq-chip",
+	.irq_init	= gpio_irq_init,
+	.irq_enable	= gpio_irq_enable,
+	.irq_disable	= gpio_irq_disable,
+	.irq_set_type	= gpio_irq_set_type,
+};
+
+struct irq_chip *arch_gpio_irq_init(void)
+{
+	return &gpio_irq_chip;
+}
diff --git a/drivers/irq/irq-gpio.h b/drivers/irq/irq-gpio.h
new file mode 100644
index 0000000000..78aa1e8adb
--- /dev/null
+++ b/drivers/irq/irq-gpio.h
@@ -0,0 +1,12 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _IRQ_GPIO_H_
+#define _IRQ_GPIO_H_
+
+struct irq_chip *arch_gpio_irq_init(void);
+
+#endif /* _IRQ_GPIO_H_ */
diff --git a/include/irq-generic.h b/include/irq-generic.h
new file mode 100644
index 0000000000..6dfed10095
--- /dev/null
+++ b/include/irq-generic.h
@@ -0,0 +1,83 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _IRQ_GENERIC_H
+#define _IRQ_GENERIC_H
+
+#include <asm-generic/gpio.h>
+#include <common.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+
+/*
+ * IRQ line status.
+ *
+ * IRQ_TYPE_NONE		- default, unspecified type
+ * IRQ_TYPE_EDGE_RISING		- rising edge triggered
+ * IRQ_TYPE_EDGE_FALLING	- falling edge triggered
+ * IRQ_TYPE_EDGE_BOTH		- rising and falling edge triggered
+ * IRQ_TYPE_LEVEL_HIGH		- high level triggered
+ * IRQ_TYPE_LEVEL_LOW		- low level triggered
+ * IRQ_TYPE_LEVEL_MASK		- mask to filter out the level bits
+ * IRQ_TYPE_SENSE_MASK		- mask for all the above bits
+ */
+enum {
+	IRQ_TYPE_NONE		= 0x00000000,
+	IRQ_TYPE_EDGE_RISING	= 0x00000001,
+	IRQ_TYPE_EDGE_FALLING	= 0x00000002,
+	IRQ_TYPE_EDGE_BOTH	= (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING),
+	IRQ_TYPE_LEVEL_HIGH	= 0x00000004,
+	IRQ_TYPE_LEVEL_LOW	= 0x00000008,
+	IRQ_TYPE_LEVEL_MASK	= (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH),
+	IRQ_TYPE_SENSE_MASK	= 0x0000000f,
+};
+
+/*
+ * struct irq_chip - hardware interrupt chip descriptor
+ *
+ * @name:		name for irq chip
+ * @irq_enable:		enable the interrupt (defaults to chip->unmask if NULL)
+ * @irq_disable:	disable the interrupt
+ * @irq_ack:		start of a new interrupt
+ * @irq_eoi:		end of interrupt
+ * @irq_set_type:	set the flow type (IRQ_TYPE_LEVEL/etc.) of an IRQ
+ */
+struct irq_chip {
+	const char	*name;
+	int		(*irq_init)(void);
+	int		(*irq_get)(void);
+	int		(*irq_enable)(int irq);
+	int		(*irq_disable)(int irq);
+	void		(*irq_ack)(int irq);
+	void		(*irq_eoi)(int irq);
+	int		(*irq_set_type)(int irq, unsigned int flow_type);
+};
+
+/* APIs for irqs */
+void irq_install_handler(int irq, interrupt_handler_t *handler, void *data);
+void irq_free_handler(int irq);
+int irq_set_irq_type(int irq, unsigned int type);
+int irq_handler_enable(int irq);
+int irq_handler_disable(int irq);
+int gpio_to_irq(struct gpio_desc *gpio);
+
+/*
+ * Assign gpio to irq directly. Don't use it without special reasons.
+ *
+ * Usage example:
+ *	int gpio0_a0, irq;
+ *
+ *	gpio = RK_IRQ_GPIO(RK_GPIO0, RK_PA0);
+ *	irq = hard_gpio_to_irq(gpio0_a0);
+ *	irq_install_handler(irq, ...);
+ */
+#define GPIO_BANK_SHIFT			8
+#define RK_IRQ_GPIO(bank, pin) 		(((bank) << GPIO_BANK_SHIFT) | (pin))
+int hard_gpio_to_irq(unsigned gpio);
+
+/* only irq-gpio.c can use it */
+void _generic_gpio_handle_irq(int irq, void *data);
+
+#endif /* _IRQ_GENERIC_H */
diff --git a/include/irq-platform.h b/include/irq-platform.h
new file mode 100644
index 0000000000..e3d16429ac
--- /dev/null
+++ b/include/irq-platform.h
@@ -0,0 +1,110 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _ROCKCHIP_PLAT_IRQ_H_
+#define _ROCKCHIP_PLAT_IRQ_H_
+
+#if defined(CONFIG_ROCKCHIP_RK322X)
+#define GPIO0_PHYS			0x11110000
+#define GPIO1_PHYS			0x11120000
+#define GPIO2_PHYS			0x11130000
+#define GPIO3_PHYS			0x11140000
+
+#define GIC_IRQS_NR			(4 * 32)
+#define GPIO_IRQS_NR			(4 * 32)
+
+#define GPIO_BANK_NUM			4
+#define GPIO_BANK_PINS			32
+
+#define IRQ_GPIO0			83
+#define IRQ_GPIO1			84
+#define IRQ_GPIO2			85
+#define IRQ_GPIO3			86
+
+#elif defined(CONFIG_ROCKCHIP_RK3288)
+#define GPIO0_PHYS			0xFF750000
+#define GPIO1_PHYS			0xFF780000
+#define GPIO2_PHYS			0xFF790000
+#define GPIO3_PHYS			0xFF7A0000
+#define GPIO4_PHYS			0xFF7B0000
+#define GPIO5_PHYS			0xFF7C0000
+#define GPIO6_PHYS			0xFF7D0000
+#define GPIO7_PHYS			0xFF7E0000
+#define GPIO8_PHYS			0xFF7F0000
+
+#define GIC_IRQS_NR			(5 * 32)
+#define GPIO_IRQS_NR			(9 * 32)
+
+#define GPIO_BANK_NUM			9
+#define GPIO_BANK_PINS			32
+
+#define IRQ_GPIO0			113
+#define IRQ_GPIO1			114
+#define IRQ_GPIO2			115
+#define IRQ_GPIO3			116
+#define IRQ_GPIO4			117
+#define IRQ_GPIO5			118
+#define IRQ_GPIO6			119
+#define IRQ_GPIO7			120
+#define IRQ_GPIO8			121
+
+#elif defined(CONFIG_ROCKCHIP_RK3328)
+#define	GPIO0_PHYS			0xFF210000
+#define	GPIO1_PHYS			0xFF220000
+#define	GPIO2_PHYS			0xFF230000
+#define	GPIO3_PHYS			0xFF240000
+
+#define GIC_IRQS_NR			(4 * 32)
+#define GPIO_IRQS_NR			(4 * 32)
+
+#define GPIO_BANK_NUM			4
+#define GPIO_BANK_PINS			32
+
+#define IRQ_GPIO0			83
+#define IRQ_GPIO1			84
+#define IRQ_GPIO2			85
+#define IRQ_GPIO3			86
+
+#elif defined(CONFIG_ROCKCHIP_RK3368)
+#define GPIO0_PHYS			0xFF750000
+#define GPIO1_PHYS			0xFF780000
+#define GPIO2_PHYS			0xFF790000
+#define GPIO3_PHYS			0xFF7A0000
+
+#define GIC_IRQS_NR                     (5 * 32)
+#define GPIO_IRQS_NR                    (4 * 32)
+
+#define GPIO_BANK_NUM			4
+#define GPIO_BANK_PINS			32
+
+#define IRQ_GPIO0			113
+#define IRQ_GPIO1			114
+#define IRQ_GPIO2			115
+#define IRQ_GPIO3			116
+
+#elif defined(CONFIG_ROCKCHIP_RK3399)
+#define GPIO0_PHYS			0xFF720000
+#define GPIO1_PHYS			0xFF730000
+#define GPIO2_PHYS			0xFF780000
+#define GPIO3_PHYS			0xFF788000
+#define GPIO4_PHYS			0xFF790000
+
+#define IRQ_GPIO0			46
+#define IRQ_GPIO1			47
+#define IRQ_GPIO2			48
+#define IRQ_GPIO3			49
+#define IRQ_GPIO4			50
+
+#define GIC_IRQS_NR			(6 * 32)
+#define GPIO_IRQS_NR			(5 * 32)
+
+#define GPIO_BANK_NUM			5
+#define GPIO_BANK_PINS			32
+#else
+"Missing define RIQ relative things"
+#endif
+
+#endif /* _ROCKCHIP_PLAT_IRQ_H_ */

commit 27a50c86bac5d9665af4654f7e1d291b59fd664a
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Tue Sep 5 15:28:15 2017 +0800

    rockchip: add a buid script
    
    This script assume that you have installed arm-linux-gnueabi for armv7
    and aarch64-linux-gnu for armv8, or you have android toolchain in ../prebuilts
    directory, otherwise please setting the correct TOOLCHAIN path that you have in
    this script.
    
    usage: ./make.sh board
    ./make.sh evb-rk3399     ---- build for evb-rk3399_defconfig
    ./make.sh firefly-rk3288 ---- build for firefly-rk3288_defconfig
    
    Change-Id: Id2b0cdee60897bd18f7d0e557429c868a83dfe49
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/make.sh b/make.sh
new file mode 100755
index 0000000000..7a355fc6ed
--- /dev/null
+++ b/make.sh
@@ -0,0 +1,30 @@
+#!/bin/sh
+BOARD=$1
+DIR=${BOARD#*-}
+DSTDIR=rockdev/${DIR}
+TOOLCHAIN=arm-linux-gnueabi-
+JOB=`sed -n "N;/processor/p" /proc/cpuinfo|wc -l`
+
+select_toolchain()
+{
+	local dst path
+	if grep  -q '^CONFIG_ARM64=y' ${DSTDIR}/out/.config ; then
+        	TOOLCHAIN=aarch64-linux-gnu-
+		dst=../prebuilts/gcc/linux-x86/aarch64/aarch64-linux-android-4.9/bin
+		if [ -d ${dst} ]; then
+			path=$(cd `dirname ${dst}`; pwd)
+			TOOLCHAIN=${path}/bin/aarch64-linux-android-
+		fi
+	else
+		dst=../prebuilts/gcc/linux-x86/arm/arm-linux-androideabi-4.9/bin
+		if [ -d ${dst} ]; then
+			path=$(cd `dirname ${dst}`; pwd)
+			TOOLCHAIN=${path}/bin/arm-linux-androideabi-
+		fi
+	fi
+	echo toolchain: ${TOOLCHAIN}
+}
+echo "make for ${BOARD}_defconfig by -j${JOB}"
+make ${BOARD}_defconfig O=${DSTDIR}/out
+select_toolchain
+make CROSS_COMPILE=${TOOLCHAIN}  all --jobs=${JOB} O=${DSTDIR}/out

commit 4d5d72683f48788fb2504b10bf6fc684055712c3
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Tue Aug 29 17:21:04 2017 +0800

    rockchip: add bootrkp command
    
    Add support for booting system from rockchip
    format partition.
    
    Change-Id: I513d2f2f53dcb1a578447c1ea112b2e4e7c9838a
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index d2b33cffb7..bd58ed93b6 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -192,6 +192,12 @@ config ROCKCHIP_RESOURCE_IMAGE
 	  This enables support to get dtb or logo files from
 	  rockchip resource image format partition.
 
+config ROCKCHIP_PARTITION_BOOT
+	bool "Enable support for booting system from rockchip format partition"
+	depends on ROCKCHIP_RESOURCE_IMAGE
+	help
+	  This enables support for bootimg system from rockchip format partition
+
 source "arch/arm/mach-rockchip/rk3036/Kconfig"
 source "arch/arm/mach-rockchip/rk3188/Kconfig"
 source "arch/arm/mach-rockchip/rk322x/Kconfig"
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index b55985f0fb..aac2d4418d 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -26,6 +26,7 @@ ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
 obj-$(CONFIG_ROCKCHIP_BLOCK_API) += blk.o
 obj-$(CONFIG_ROCKCHIP_PARAM) += rockchip_parameter.o
 obj-$(CONFIG_ROCKCHIP_RESOURCE_IMAGE) += resource_img.o
+obj-$(CONFIG_ROCKCHIP_PARTITION_BOOT) += bootrkp.o
 obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board.o
 obj-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board.o
 obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board.o
diff --git a/arch/arm/mach-rockchip/bootrkp.c b/arch/arm/mach-rockchip/bootrkp.c
new file mode 100644
index 0000000000..b9ef47fc6d
--- /dev/null
+++ b/arch/arm/mach-rockchip/bootrkp.c
@@ -0,0 +1,200 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <config.h>
+#include <linux/list.h>
+#include <malloc.h>
+#include <asm/arch/resource_img.h>
+#include "rockchip_parameter.h"
+#include "rockchip_blk.h"
+
+#define TAG_KERNEL			0x4C4E524B
+
+#define PART_MISC			"misc"
+#define PART_KERNEL			"kernel"
+#define PART_BOOT			"boot"
+#define PART_RECOVERY			"recovery"
+
+#define DTB_FILE			"rk-kernel.dtb"
+
+#define BOOTLOADER_MESSAGE_OFFSET_IN_MISC	(16 * 1024)
+#define BOOTLOADER_MESSAGE_BLK_OFFSET		(BOOTLOADER_MESSAGE_OFFSET_IN_MISC >> 9)
+
+enum android_boot_mode {
+	ANDROID_BOOT_MODE_NORMAL = 0,
+
+	/* "recovery" mode is triggered by the "reboot recovery" command or
+	 * equivalent adb/fastboot command. It can also be triggered by writing
+	 * "boot-recovery" in the BCB message. This mode should boot the
+	 * recovery kernel.
+	 */
+	ANDROID_BOOT_MODE_RECOVERY,
+
+	/* "bootloader" mode is triggered by the "reboot bootloader" command or
+	 * equivalent adb/fastboot command. It can also be triggered by writing
+	 * "bootonce-bootloader" in the BCB message. This mode should boot into
+	 * fastboot.
+	 */
+	ANDROID_BOOT_MODE_BOOTLOADER,
+};
+
+struct bootloader_message {
+	char command[32];
+	char status[32];
+	char recovery[768];
+
+	/*
+         * The 'recovery' field used to be 1024 bytes.  It has only ever
+	 * been used to store the recovery command line, so 768 bytes
+	 * should be plenty.  We carve off the last 256 bytes to store the
+	 * stage string (for multistage packages) and possible future
+	 * expansion.
+         */
+	char stage[32];
+	char slot_suffix[32];
+	char reserved[192];
+};
+
+struct rockchip_image {
+	uint32_t tag;
+	uint32_t size;
+	int8_t image[1];
+	uint32_t crc;
+};
+
+static int read_boot_mode_from_misc(struct blk_part *misc)
+{
+	struct bootloader_message *bmsg;
+	int size = DIV_ROUND_UP(sizeof(struct bootloader_message),
+				RK_BLK_SIZE) * RK_BLK_SIZE;
+	int ret = 0;
+
+	bmsg = memalign(ARCH_DMA_MINALIGN, size);
+	ret = blkdev_read(bmsg, misc->from + BOOTLOADER_MESSAGE_BLK_OFFSET,
+			  size >> 9);
+	if (ret < 0)
+		goto out;
+
+	if (!strcmp(bmsg->command, "boot-recovery")) {
+		printf("boot mode: recovery\n");
+		ret = ANDROID_BOOT_MODE_RECOVERY;
+	} else {
+		printf("boot mode: normal\n");
+		ret = ANDROID_BOOT_MODE_NORMAL;
+	}
+
+out:
+	free(bmsg);
+	return ret;
+}
+
+/*
+ * non-OTA packaged kernel.img & boot.img
+ * return the image size on success, and a
+ * negative value on error.
+ */
+static int read_rockchip_image(struct blk_part *part, void *dst)
+{
+	struct rockchip_image *img;
+	int header_len = 8;
+	int cnt;
+	int ret;
+
+	img = memalign(ARCH_DMA_MINALIGN, RK_BLK_SIZE);
+	if (!img) {
+		printf("out of memory\n");
+		return -ENOMEM;
+	}
+
+	/* read first block with header imformation */
+	ret = blkdev_read(img, part->from, 1);
+	if (ret < 0)
+		goto err;
+	if (img->tag != TAG_KERNEL) {
+		printf("%s: invalid image tag\n", part->name);
+		goto err;
+	}
+
+	memcpy(dst, img->image, RK_BLK_SIZE - header_len);
+	/*
+	 * read the rest blks
+	 * total size  = image size + 8 bytes header + 4 bytes crc32
+	 */
+	cnt = DIV_ROUND_UP(img->size + 8 + 4, RK_BLK_SIZE);
+	ret = blkdev_read(dst + RK_BLK_SIZE - header_len,
+			  part->from + 1, cnt - 1);
+	if (!ret)
+		ret = img->size;
+err:
+	free(img);
+	return ret;
+}
+
+static int do_bootrkp(cmd_tbl_t *cmdtp, int flag, int argc,
+		      char * const argv[])
+{
+	ulong fdt_addr_r = env_get_ulong("fdt_addr_r", 16, 0);
+	ulong ramdisk_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0);
+	ulong kernel_addr_r = env_get_ulong("kernel_addr_r", 16, 0x480000);
+	struct blk_part *boot;
+	struct blk_part *kernel;
+	struct blk_part *misc;
+	int ramdisk_size;
+	int kernel_size;
+	int fdt_size;
+	int boot_mode;
+	int ret = 0;
+	char cmdbuf[64];
+
+	misc = rockchip_get_blk_part(PART_MISC);
+	if (misc)
+		boot_mode = read_boot_mode_from_misc(misc);
+	else
+		boot_mode = ANDROID_BOOT_MODE_RECOVERY;
+
+	if (boot_mode == ANDROID_BOOT_MODE_RECOVERY)
+		boot = rockchip_get_blk_part(PART_RECOVERY);
+	else
+		boot = rockchip_get_blk_part(PART_BOOT);
+	kernel = rockchip_get_blk_part(PART_KERNEL);
+
+	if (!kernel || !boot) {
+		ret = CMD_RET_FAILURE;
+		goto out;
+	}
+
+	kernel_size = read_rockchip_image(kernel, (void *)kernel_addr_r);
+	if (kernel_size < 0) {
+		ret = CMD_RET_FAILURE;
+		goto out;
+	}
+
+	ramdisk_size = read_rockchip_image(boot, (void *)ramdisk_addr_r);
+	if (ramdisk_size < 0) {
+		ret = CMD_RET_FAILURE;
+		goto out;
+	}
+
+	fdt_size = rockchip_read_resource_file((void *)fdt_addr_r, DTB_FILE, 0, 0);
+	if (fdt_size < 0) {
+		ret = CMD_RET_FAILURE;
+		goto out;
+	}
+
+	printf("kernel_size:0x%ulx ramdisk_size:0x%x\n", kernel_size, ramdisk_size);
+	sprintf(cmdbuf, "booti 0x%lx 0x%lx:0x%x 0x%lx",
+		kernel_addr_r, ramdisk_addr_r, ramdisk_size, fdt_addr_r);
+	run_command(cmdbuf, 0);
+out:
+	return ret;
+}
+
+U_BOOT_CMD(
+	bootrkp,  CONFIG_SYS_MAXARGS,     1,      do_bootrkp,
+	"boot Linux Image image from rockchip partition storage",
+	""
+);

commit 08dcd37c063a8e4bf7d302c7b128af3d070b4e8b
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Sep 4 16:44:32 2017 +0800

    rockchip: add rockchip resource image support
    
    Rockchip resource image is used to store dtb
    and logos for different usages. This patch adds
    support to read the files(dtb or logo)stored in
    resource image format partition.
    
    Change-Id: I65982d340ff4573e5b543965d3857a2c66db8bb9
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/resource_img.h b/arch/arm/include/asm/arch-rockchip/resource_img.h
new file mode 100644
index 0000000000..af4596250a
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/resource_img.h
@@ -0,0 +1,19 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __RESC_IMG_H_
+#define __RESC_IMG_H_
+
+/*
+ * read file from resource partition
+ * @buf: destination buf to store file data;
+ * @name: file name
+ * @offset: blocks offset in the file, 1 block = 512 bytes
+ * @len: the size(by bytes) of file to read.
+ */
+int rockchip_read_resource_file(void *buf, const char *name,
+				int offset, int len);
+#endif
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index b122267cf6..d2b33cffb7 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -185,6 +185,13 @@ config ROCKCHIP_PARAM
 	  This enable support to get partition from rockchip
 	  parameter
 
+config ROCKCHIP_RESOURCE_IMAGE
+	bool "Enable support for rockchip resource image"
+	depends on ROCKCHIP_PARAM
+	help
+	  This enables support to get dtb or logo files from
+	  rockchip resource image format partition.
+
 source "arch/arm/mach-rockchip/rk3036/Kconfig"
 source "arch/arm/mach-rockchip/rk3188/Kconfig"
 source "arch/arm/mach-rockchip/rk322x/Kconfig"
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 91600eb52a..b55985f0fb 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -25,6 +25,7 @@ obj-spl-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board-spl.o spl-boot-order.o
 ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
 obj-$(CONFIG_ROCKCHIP_BLOCK_API) += blk.o
 obj-$(CONFIG_ROCKCHIP_PARAM) += rockchip_parameter.o
+obj-$(CONFIG_ROCKCHIP_RESOURCE_IMAGE) += resource_img.o
 obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board.o
 obj-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board.o
 obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board.o
diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
new file mode 100644
index 0000000000..9a5d46fff9
--- /dev/null
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -0,0 +1,242 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#include <common.h>
+#include <malloc.h>
+#include <linux/list.h>
+#include <asm/arch/resource_img.h>
+#include "rockchip_parameter.h"
+#include "rockchip_blk.h"
+
+#define PART_RESOURCE			"resource"
+#define RESOURCE_MAGIC			"RSCE"
+#define RESOURCE_MAGIC_SIZE		4
+#define RESOURCE_VERSION		0
+#define CONTENT_VERSION			0
+#define ENTRY_TAG			"ENTR"
+#define ENTRY_TAG_SIZE			4
+#define MAX_FILE_NAME_LEN		256
+
+/*
+ *         resource image structure
+ * ----------------------------------------------
+ * |                                            |
+ * |    header  (1 block)                       |
+ * |                                            |
+ * ---------------------------------------------|
+ * |                      |                     |
+ * |    entry0  (1 block) |                     |
+ * |                      |                     |
+ * ------------------------                     |
+ * |                      |                     |
+ * |    entry1  (1 block) | contents (n blocks) |
+ * |                      |                     |
+ * ------------------------                     |
+ * |    ......            |                     |
+ * ------------------------                     |
+ * |                      |                     |
+ * |    entryn  (1 block) |                     |
+ * |                      |                     |
+ * ----------------------------------------------
+ * |                                            |
+ * |    file0  (x blocks)                       |
+ * |                                            |
+ * ----------------------------------------------
+ * |                                            |
+ * |    file1  (y blocks)                       |
+ * |                                            |
+ * ----------------------------------------------
+ * |                   ......                   |
+ * |---------------------------------------------
+ * |                                            |
+ * |    filen  (z blocks)                       |
+ * |                                            |
+ * ----------------------------------------------
+ */
+
+/**
+ * struct resource_image_header
+ *
+ * @magic: should be "RSCE"
+ * @version: resource image version, current is 0
+ * @c_version: content version, current is 0
+ * @blks: the size of the header ( 1 block = 512 bytes)
+ * @c_offset: contents offset(by block) in the image
+ * @e_blks: the size(by block) of the entry in the contents
+ * @e_num: numbers of the entrys.
+ */
+
+struct resource_img_hdr {
+	char		magic[4];
+	uint16_t	version;
+	uint16_t	c_version;
+	uint8_t		blks;
+	uint8_t		c_offset;
+	uint8_t		e_blks;
+	uint32_t	e_nums;
+};
+
+struct resource_entry {
+	char		tag[4];
+	char		name[MAX_FILE_NAME_LEN];
+	uint32_t	f_offset;
+	uint32_t	f_size;
+};
+
+struct resource_file {
+	char		name[MAX_FILE_NAME_LEN];
+	uint32_t	f_offset;
+	uint32_t	f_size;
+	struct list_head link;
+};
+
+static struct blk_part *rsce_blk;
+
+static LIST_HEAD(entrys_head);
+
+static int resource_image_check_header(const struct resource_img_hdr *hdr)
+{
+	int ret;
+
+	ret = memcmp(RESOURCE_MAGIC, hdr->magic, RESOURCE_MAGIC_SIZE);
+	if (ret) {
+		printf("bad resource image magic\n");
+		ret = -EINVAL;
+	}
+	debug("resource image header:\n");
+	debug("magic:%s\n", hdr->magic);
+	debug("version:%d\n", hdr->version);
+	debug("c_version:%d\n", hdr->c_version);
+	debug("blks:%d\n", hdr->blks);
+	debug("c_offset:%d\n", hdr->c_offset);
+	debug("e_blks:%d\n", hdr->e_blks);
+	debug("e_num:%d\n", hdr->e_nums);
+
+	return ret;
+}
+
+static int add_file_to_list(struct resource_entry *entry)
+{
+	struct resource_file *file;
+
+	if (memcmp(entry->tag, ENTRY_TAG, ENTRY_TAG_SIZE)) {
+		printf("invalid entry tag\n");
+		return -ENOENT;
+	}
+	file = malloc(sizeof(*file));
+	if (!file) {
+		printf("out of memory\n");
+		return -ENOMEM;
+	}
+	strcpy(file->name, entry->name);
+	file->f_offset = entry->f_offset;
+	file->f_size = entry->f_size;
+	list_add_tail(&file->link, &entrys_head);
+	debug("entry:%p  %s offset:%d size:%d\n",
+	      entry, file->name, file->f_offset, file->f_size);
+
+	return 0;
+}
+
+static int read_file_info_from_blk_dev(void)
+{
+	struct resource_img_hdr *hdr;
+	struct resource_entry *entry;
+	void *content;
+	int size;
+	int ret;
+	int e_num;
+
+	rsce_blk = rockchip_get_blk_part(PART_RESOURCE);
+	if (!rsce_blk) {
+		printf("no resource partition found\n");
+		return  -ENODEV;
+	}
+
+	hdr = memalign(ARCH_DMA_MINALIGN, RK_BLK_SIZE);
+	if (!hdr) {
+		printf("out of memory!\n");
+		return -ENOMEM;
+	}
+
+	ret = blkdev_read(hdr, rsce_blk->from, 1);
+	if (ret < 0)
+		goto out;
+	ret = resource_image_check_header(hdr);
+	if (ret < 0)
+		goto out;
+	content = memalign(ARCH_DMA_MINALIGN,
+			   hdr->e_blks * hdr->e_nums * RK_BLK_SIZE);
+	if (!content) {
+		printf("alloc memory for content failed\n");
+		goto out;
+	}
+	ret = blkdev_read(content, rsce_blk->from + hdr->c_offset,
+			  hdr->e_blks * hdr->e_nums);
+	if (ret < 0)
+		goto err;
+
+	for (e_num = 0; e_num < hdr->e_nums; e_num++) {
+		size = e_num * hdr->e_blks * RK_BLK_SIZE;
+		entry = (struct resource_entry *)(content + size);
+		add_file_to_list(entry);
+	}
+
+err:
+	free(content);
+out:
+	free(hdr);
+
+	return 0;
+}
+
+static struct resource_file *get_file_info(struct resource_img_hdr *hdr,
+					   const void *content,
+					   const char *name)
+{
+	struct resource_file *file;
+	struct list_head *node;
+
+	if (list_empty(&entrys_head))
+		read_file_info_from_blk_dev();
+
+	list_for_each(node, &entrys_head) {
+		file = list_entry(node, struct resource_file, link);
+		if (!strcmp(file->name, name))
+			return file;
+	}
+
+	return NULL;
+}
+
+/*
+ * read file from resource partition
+ * @buf: destination buf to store file data;
+ * @name: file name
+ * @offset: blocks offset in the file, 1 block = 512 bytes
+ * @len: the size(by bytes) of file to read.
+ */
+int rockchip_read_resource_file(void *buf, const char *name,
+				int offset, int len)
+{
+	struct resource_file *file;
+	int ret = 0;
+	int blks;
+
+	file = get_file_info(NULL, NULL, name);
+	if (!file) {
+		printf("Can't find file:%s\n", name);
+		return -ENOENT;
+	}
+
+	if (len <= 0 || len > file->f_size)
+		len = file->f_size;
+	blks = DIV_ROUND_UP(len, RK_BLK_SIZE);
+	ret = blkdev_read(buf, rsce_blk->from + file->f_offset + offset, blks);
+	if (!ret)
+		ret = len;
+
+	return ret;
+}

commit fb11f32b79b7fcbac77e4d9fddb18aa94b37ecad
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Sep 18 20:28:14 2017 +0800

    rockchip: add support to parse partition from rockchip parameter
    
    This patch add support to parse block device partiton from
    rockchip parameter.
    
    Change-Id: I563211ba58cf333ae4a732dfa5432f30b8587c61
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index eb8dab3f94..b122267cf6 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -178,6 +178,13 @@ config ROCKCHIP_BLOCK_API
 	  This enable read access to block device on
 	  rockchip platform.
 
+config ROCKCHIP_PARAM
+	bool "Rockchip parameter support"
+	depends on ROCKCHIP_BLOCK_API
+	help
+	  This enable support to get partition from rockchip
+	  parameter
+
 source "arch/arm/mach-rockchip/rk3036/Kconfig"
 source "arch/arm/mach-rockchip/rk3188/Kconfig"
 source "arch/arm/mach-rockchip/rk322x/Kconfig"
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index dfce57a053..91600eb52a 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -24,6 +24,7 @@ obj-spl-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board-spl.o spl-boot-order.o
 
 ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
 obj-$(CONFIG_ROCKCHIP_BLOCK_API) += blk.o
+obj-$(CONFIG_ROCKCHIP_PARAM) += rockchip_parameter.o
 obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board.o
 obj-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board.o
 obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board.o
diff --git a/arch/arm/mach-rockchip/rockchip_parameter.c b/arch/arm/mach-rockchip/rockchip_parameter.c
new file mode 100644
index 0000000000..c33d10c925
--- /dev/null
+++ b/arch/arm/mach-rockchip/rockchip_parameter.c
@@ -0,0 +1,104 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <malloc.h>
+#include "rockchip_parameter.h"
+#include "rockchip_blk.h"
+
+#define MAX_PARAM_SIZE			(1024 * 64)
+
+struct rockchip_param {
+	u32 tag;
+	u32 length;
+	char params[1];
+	u32 crc;
+};
+
+static LIST_HEAD(parts_head);
+
+static int rockchip_param_parse(char *param)
+{
+	struct blk_part *part;
+	const char *cmdline = strstr(param, "CMDLINE:");
+	const char *blkdev_parts = strstr(cmdline, "mtdparts");
+	const char *blkdev_def = strchr(blkdev_parts, ':') + 1;
+	char *next = (char *)blkdev_def;
+	char *pend;
+	int len;
+	unsigned long size, from;
+
+	debug("%s", cmdline);
+
+	env_set("bootargs", cmdline);
+
+	while (*next) {
+		if (*next == '-') {
+			size = (~0UL);
+			next++;
+		} else {
+			size = simple_strtoul(next, &next, 16);
+		}
+		next++;
+		from = simple_strtoul(next, &next, 16);
+		next++;
+		pend =  strchr(next, ')');
+		if (!pend)
+			break;
+		len = min_t(int, pend - next, PART_NAME_SIZE);
+		part = malloc(sizeof(*part));
+		if (!part) {
+			printf("out of memory\n");
+			break;
+		}
+		part->from = from + RK_BLK_OFFSET;
+		part->size = size;
+		strncpy(part->name, next, len);
+		part->name[len] = '\0';
+		next = strchr(next, ',');
+		next++;
+		list_add_tail(&part->node, &parts_head);
+		debug("0x%lx@0x%lx(%s)\n", part->size, part->from, part->name);
+	}
+
+	return 0;
+}
+
+static int rockchip_init_param(void)
+{
+	struct rockchip_param *param;
+
+	param = memalign(ARCH_DMA_MINALIGN, MAX_PARAM_SIZE);
+	if (!param) {
+		printf("out of memory\n");
+		return -ENOMEM;
+	}
+
+	blkdev_read(param, RK_BLK_OFFSET, MAX_PARAM_SIZE >> 9);
+
+	rockchip_param_parse(param->params);
+
+	return 0;
+}
+
+struct blk_part *rockchip_get_blk_part(const char *name)
+{
+	struct blk_part *part;
+	struct list_head *node;
+
+	if (list_empty(&parts_head))
+		rockchip_init_param();
+
+	list_for_each(node, &parts_head) {
+		part = list_entry(node, struct blk_part, node);
+		if (!strcmp(part->name, name))
+			return part;
+	}
+
+	return NULL;
+}
+
+
diff --git a/arch/arm/mach-rockchip/rockchip_parameter.h b/arch/arm/mach-rockchip/rockchip_parameter.h
new file mode 100644
index 0000000000..b77a1599d9
--- /dev/null
+++ b/arch/arm/mach-rockchip/rockchip_parameter.h
@@ -0,0 +1,25 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _ROCKCHIP_PARAMS_H_
+#define _ROCKCHIP_PARAMS_H_
+
+#include <linux/list.h>
+
+#define RK_BLK_OFFSET			0x2000
+#define PART_NAME_SIZE			32
+#define RK_BLK_SIZE			(1 << 9)
+
+struct blk_part {
+	char name[PART_NAME_SIZE];
+	unsigned long from;
+	unsigned long size;
+	struct list_head node;
+};
+
+struct blk_part *rockchip_get_blk_part(const char *name);
+
+#endif

commit f4ee26b1d6a65437ac6bb2e3a8437f2cea6e8ec3
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Sep 18 20:27:10 2017 +0800

    rockchip: add blk read api
    
    Add api to read data from block device
    
    Change-Id: Ic5bf4410d826b188ff840a3ef053d0fde548e039
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index e1bc947d68..eb8dab3f94 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -172,6 +172,12 @@ config ROCKCHIP_BROM_HELPER
 config SPL_MMC_SUPPORT
 	default y if !SPL_ROCKCHIP_BACK_TO_BROM
 
+config ROCKCHIP_BLOCK_API
+	bool "Rockchip block device api support"
+	help
+	  This enable read access to block device on
+	  rockchip platform.
+
 source "arch/arm/mach-rockchip/rk3036/Kconfig"
 source "arch/arm/mach-rockchip/rk3188/Kconfig"
 source "arch/arm/mach-rockchip/rk322x/Kconfig"
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 5ef09383ac..dfce57a053 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -23,6 +23,7 @@ obj-spl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-spl.o spl-boot-order.o
 obj-spl-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board-spl.o spl-boot-order.o
 
 ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
+obj-$(CONFIG_ROCKCHIP_BLOCK_API) += blk.o
 obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board.o
 obj-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board.o
 obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board.o
diff --git a/arch/arm/mach-rockchip/blk.c b/arch/arm/mach-rockchip/blk.c
new file mode 100644
index 0000000000..beeb63719f
--- /dev/null
+++ b/arch/arm/mach-rockchip/blk.c
@@ -0,0 +1,54 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <mmc.h>
+#include "rockchip_blk.h"
+
+static struct mmc *mmc;
+
+struct mmc *mmcblk_dev_init(int dev)
+{
+	struct mmc *mmcdev;
+
+	mmcdev = find_mmc_device(dev);
+	if (!mmcdev) {
+		printf("no mmc device at slot %x\n", dev);
+		return NULL;
+	}
+
+	if (mmc_init(mmcdev))
+		return NULL;
+
+	return mmcdev;
+}
+
+static int mmcblk_read(struct mmc *mmcdev, void *buffer, u32 blk, u32 cnt)
+{
+	u32 n;
+	ulong start = (ulong)buffer;
+
+	debug("\nMMC read: block # 0x%x, count 0x%x  to %p... ", blk, cnt, buffer);
+
+	n = blk_dread(mmc_get_blk_desc(mmcdev), blk, cnt, buffer);
+	/* invalidate cache after read via dma */
+	invalidate_dcache_range(start, start + cnt * 512);
+	debug("%d blocks read: %s\n", n, (n == cnt) ? "OK" : "ERROR");
+
+	return (n == cnt) ? 0 : -EIO;
+}
+
+
+int blkdev_read(void *buffer, u32 blk, u32 cnt)
+{
+	if (!mmc) {
+		mmc = mmcblk_dev_init(env_get_ulong("mmcdev", 10, 0));
+		if (!mmc)
+			return -ENODEV;
+	}
+
+	return mmcblk_read(mmc, buffer, blk, cnt);
+}
diff --git a/arch/arm/mach-rockchip/rockchip_blk.h b/arch/arm/mach-rockchip/rockchip_blk.h
new file mode 100644
index 0000000000..3e1483e708
--- /dev/null
+++ b/arch/arm/mach-rockchip/rockchip_blk.h
@@ -0,0 +1,6 @@
+#ifndef __RK_BLK_H_
+#define __RK_BLK_H_
+
+int blkdev_read(void *buffer, u32 blk, u32 cnt);
+
+#endif

commit 46326550dc17cfbb1d003d726c8df4f152a77300
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Fri Sep 8 10:05:26 2017 +0800

    rockchip: dts: rk3328-evb: add i2c1 and rk805 nodes
    
    add i2c1 and rk805 nodes to support rk805 init setting.
    
    Change-Id: Ic5074f17d492af8a2b9cc08584592327c67a4466
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts
index 8a14c653e4..f71690f643 100644
--- a/arch/arm/dts/rk3328-evb.dts
+++ b/arch/arm/dts/rk3328-evb.dts
@@ -87,3 +87,121 @@
 	vbus-supply = <&vcc5v0_host_xhci>;
 	status = "okay";
 };
+
+&i2c1 {
+	clock-frequency = <400000>;
+	i2c-scl-rising-time-ns = <168>;
+	i2c-scl-falling-time-ns = <4>;
+	status = "okay";
+
+	rk805: pmic@18 {
+		compatible = "rockchip,rk805";
+		status = "okay";
+		reg = <0x18>;
+		interrupt-parent = <&gpio2>;
+		interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pmic_int_l>;
+		rockchip,system-power-controller;
+		wakeup-source;
+		gpio-controller;
+		#gpio-cells = <2>;
+		#clock-cells = <1>;
+		clock-output-names = "xin32k", "rk805-clkout2";
+
+		regulators {
+			vdd_logic: DCDC_REG1 {
+				regulator-name = "vdd_logic";
+				regulator-min-microvolt = <712500>;
+				regulator-max-microvolt = <1450000>;
+				regulator-ramp-delay = <6001>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1000000>;
+				};
+			};
+
+			vdd_arm: DCDC_REG2 {
+				regulator-name = "vdd_arm";
+				regulator-min-microvolt = <712500>;
+				regulator-max-microvolt = <1450000>;
+				regulator-ramp-delay = <6001>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1000000>;
+				};
+			};
+
+			vcc_ddr: DCDC_REG3 {
+				regulator-name = "vcc_ddr";
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+				};
+			};
+
+			vcc_io: DCDC_REG4 {
+				regulator-name = "vcc_io";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3300000>;
+				};
+			};
+
+			vdd_18: LDO_REG1 {
+				regulator-name = "vdd_18";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vcc_18emmc: LDO_REG2 {
+				regulator-name = "vcc_18emmc";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vdd_10: LDO_REG3 {
+				regulator-name = "vdd_10";
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1000000>;
+				};
+			};
+		};
+	};
+};
+
+&pinctrl {
+	pmic {
+		pmic_int_l: pmic-int-l {
+		rockchip,pins =
+			<2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;	/* gpio2_a6 */
+		};
+	};
+};
+

commit bb20e97e9ee1009edaec026d48f3e34c1a23ecfc
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Fri Sep 8 10:02:35 2017 +0800

    configs: rk3328: add support for pmic rk8xx and regulator and i2c driver
    
    Add defconfig for rk8xx and regulator and i2c controller.
    
    Change-Id: I3ea25c7f5c10ef952a3dd32a026d95e17ff3f536
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index 7bec001786..6d0f3af7a3 100644
--- a/configs/evb-rk3328_defconfig
+++ b/configs/evb-rk3328_defconfig
@@ -22,12 +22,18 @@ CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_ROCKCHIP_RK3328=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_DM_REGULATOR=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF130000

commit 4b6f5dc9ea3bf70bcbf9e58f158ff892fd2903bc
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Fri Sep 8 10:01:47 2017 +0800

    power: pmic: rk805: support rk805 pmic
    
    Change-Id: I2d757eb748e5903e0287557f3c6a64b8e3c89596
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index 0fdea95046..f2a2f07de7 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -99,6 +99,7 @@ static struct dm_pmic_ops rk8xx_ops = {
 };
 
 static const struct udevice_id rk8xx_ids[] = {
+	{ .compatible = "rockchip,rk805" },
 	{ .compatible = "rockchip,rk808" },
 	{ .compatible = "rockchip,rk816" },
 	{ .compatible = "rockchip,rk818" },
diff --git a/drivers/power/regulator/rk8xx.c b/drivers/power/regulator/rk8xx.c
index cf3566e2d8..6d4a243855 100644
--- a/drivers/power/regulator/rk8xx.c
+++ b/drivers/power/regulator/rk8xx.c
@@ -117,6 +117,7 @@ static const struct rk8xx_reg_info *get_buck_reg(struct udevice *pmic,
 	struct rk8xx_priv *priv = dev_get_priv(pmic);
 
 	switch (priv->variant) {
+	case RK805_ID:
 	case RK816_ID:
 		switch (num) {
 		case 0:
@@ -159,6 +160,7 @@ static int _buck_get_enable(struct udevice *pmic, int buck)
 	int ret = 0;
 
 	switch (priv->variant) {
+	case RK805_ID:
 	case RK816_ID:
 		if (buck >= 4) {
 			mask = 1 << (buck - 4);
@@ -187,6 +189,7 @@ static int _buck_set_enable(struct udevice *pmic, int buck, bool enable)
 	struct rk8xx_priv *priv = dev_get_priv(pmic);
 
 	switch (priv->variant) {
+	case RK805_ID:
 	case RK816_ID:
 		if (buck >= 4) {
 			buck -= 4;
@@ -231,6 +234,7 @@ static const struct rk8xx_reg_info *get_ldo_reg(struct udevice *pmic,
 	struct rk8xx_priv *priv = dev_get_priv(pmic);
 
 	switch (priv->variant) {
+	case RK805_ID:
 	case RK816_ID:
 		return &rk816_ldo[num];
 	case RK818_ID:
@@ -247,6 +251,7 @@ static int _ldo_get_enable(struct udevice *pmic, int ldo)
 	int ret = 0;
 
 	switch (priv->variant) {
+	case RK805_ID:
 	case RK816_ID:
 		if (ldo >= 4) {
 			mask = 1 << (ldo - 4);
@@ -275,6 +280,7 @@ static int _ldo_set_enable(struct udevice *pmic, int ldo, bool enable)
 	int ret = 0;
 
 	switch (priv->variant) {
+	case RK805_ID:
 	case RK816_ID:
 		if (ldo >= 4) {
 			ldo -= 4;
diff --git a/include/power/rk8xx_pmic.h b/include/power/rk8xx_pmic.h
index 8e821c3fc3..b1482b78ce 100644
--- a/include/power/rk8xx_pmic.h
+++ b/include/power/rk8xx_pmic.h
@@ -178,6 +178,7 @@ enum {
 };
 
 enum {
+	RK805_ID = 0x8050,
 	RK808_ID = 0x0000,
 	RK816_ID = 0x8160,
 	RK818_ID = 0x8180,

commit 5e1bceea9e1cc94db6d5b08b34f382aa47846da8
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Fri Sep 8 09:56:47 2017 +0800

    power: pmic: rk816: support rk816 pmic
    
    Change-Id: I609eef4efe25833d3d878a74931ca240365faa30
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index eb3ec0f601..0fdea95046 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -100,6 +100,7 @@ static struct dm_pmic_ops rk8xx_ops = {
 
 static const struct udevice_id rk8xx_ids[] = {
 	{ .compatible = "rockchip,rk808" },
+	{ .compatible = "rockchip,rk816" },
 	{ .compatible = "rockchip,rk818" },
 	{ }
 };
diff --git a/drivers/power/regulator/rk8xx.c b/drivers/power/regulator/rk8xx.c
index 76fc2eff60..cf3566e2d8 100644
--- a/drivers/power/regulator/rk8xx.c
+++ b/drivers/power/regulator/rk8xx.c
@@ -48,6 +48,21 @@ static const struct rk8xx_reg_info rk808_buck[] = {
 	{ 1800000, 100000, REG_BUCK4_ON_VSEL, RK808_BUCK4_VSEL_MASK, },
 };
 
+static const struct rk8xx_reg_info rk816_buck[] = {
+	/* buck 1 */
+	{ 712500, 12500, REG_BUCK1_ON_VSEL, RK818_BUCK_VSEL_MASK, },
+	{ 1800000, 200000, REG_BUCK1_ON_VSEL, RK818_BUCK_VSEL_MASK, },
+	{ 2300000, 0, REG_BUCK1_ON_VSEL, RK818_BUCK_VSEL_MASK, },
+	/* buck 2 */
+	{ 712500, 12500, REG_BUCK2_ON_VSEL, RK818_BUCK_VSEL_MASK, },
+	{ 1800000, 200000, REG_BUCK2_ON_VSEL, RK818_BUCK_VSEL_MASK, },
+	{ 2300000, 0, REG_BUCK2_ON_VSEL, RK818_BUCK_VSEL_MASK, },
+	/* buck 3 */
+	{ 712500, 12500, -1, RK818_BUCK_VSEL_MASK, },
+	/* buck 4 */
+	{ 800000, 100000, REG_BUCK4_ON_VSEL, RK818_BUCK4_VSEL_MASK, },
+};
+
 static const struct rk8xx_reg_info rk818_buck[] = {
 	{ 712500, 12500, REG_BUCK1_ON_VSEL, RK818_BUCK_VSEL_MASK, },
 	{ 712500, 12500, REG_BUCK2_ON_VSEL, RK818_BUCK_VSEL_MASK, },
@@ -67,6 +82,15 @@ static const struct rk8xx_reg_info rk808_ldo[] = {
 	{ 1800000, 100000, REG_LDO8_ON_VSEL, RK808_LDO_VSEL_MASK, },
 };
 
+static const struct rk8xx_reg_info rk816_ldo[] = {
+	{ 800000, 100000, REG_LDO1_ON_VSEL, RK818_LDO_VSEL_MASK, },
+	{ 800000, 100000, REG_LDO2_ON_VSEL, RK818_LDO_VSEL_MASK, },
+	{ 800000, 100000, REG_LDO3_ON_VSEL, RK818_LDO_VSEL_MASK, },
+	{ 800000, 100000, REG_LDO4_ON_VSEL, RK818_LDO_VSEL_MASK, },
+	{ 800000, 100000, REG_LDO5_ON_VSEL, RK818_LDO_VSEL_MASK, },
+	{ 800000, 100000, REG_LDO6_ON_VSEL, RK818_LDO_VSEL_MASK, },
+};
+
 static const struct rk8xx_reg_info rk818_ldo[] = {
 	{ 1800000, 100000, REG_LDO1_ON_VSEL, RK818_LDO_VSEL_MASK, },
 	{ 1800000, 100000, REG_LDO2_ON_VSEL, RK818_LDO_VSEL_MASK, },
@@ -88,10 +112,24 @@ static const uint rk818_chrg_shutdown_vsel_array[] = {
 };
 
 static const struct rk8xx_reg_info *get_buck_reg(struct udevice *pmic,
-					     int num)
+						 int num, int uvolt)
 {
 	struct rk8xx_priv *priv = dev_get_priv(pmic);
+
 	switch (priv->variant) {
+	case RK816_ID:
+		switch (num) {
+		case 0:
+		case 1:
+			if (uvolt <= 1450000)
+				return &rk816_buck[num * 3 + 0];
+			else if (uvolt <= 2200000)
+				return &rk816_buck[num * 3 + 1];
+			else
+				return &rk816_buck[num * 3 + 2];
+		default:
+			return &rk816_buck[num + 4];
+		}
 	case RK818_ID:
 		return &rk818_buck[num];
 	default:
@@ -101,7 +139,7 @@ static const struct rk8xx_reg_info *get_buck_reg(struct udevice *pmic,
 
 static int _buck_set_value(struct udevice *pmic, int buck, int uvolt)
 {
-	const struct rk8xx_reg_info *info = get_buck_reg(pmic, buck - 1);
+	const struct rk8xx_reg_info *info = get_buck_reg(pmic, buck, uvolt);
 	int mask = info->vsel_mask;
 	int val;
 
@@ -114,23 +152,76 @@ static int _buck_set_value(struct udevice *pmic, int buck, int uvolt)
 	return pmic_clrsetbits(pmic, info->vsel_reg, mask, val);
 }
 
+static int _buck_get_enable(struct udevice *pmic, int buck)
+{
+	struct rk8xx_priv *priv = dev_get_priv(pmic);
+	uint mask = 0;
+	int ret = 0;
+
+	switch (priv->variant) {
+	case RK816_ID:
+		if (buck >= 4) {
+			mask = 1 << (buck - 4);
+			ret = pmic_reg_read(pmic, RK816_REG_DCDC_EN2);
+		} else {
+			mask = 1 << buck;
+			ret = pmic_reg_read(pmic, RK816_REG_DCDC_EN1);
+		}
+		break;
+	case RK808_ID:
+	case RK818_ID:
+		mask = 1 << buck;
+		ret = pmic_reg_read(pmic, REG_DCDC_EN);
+		if (ret < 0)
+			return ret;
+		break;
+	}
+	return ret & mask ? true : false;
+}
+
+
 static int _buck_set_enable(struct udevice *pmic, int buck, bool enable)
 {
-	uint mask;
+	uint mask, value, en_reg;
 	int ret;
+	struct rk8xx_priv *priv = dev_get_priv(pmic);
 
-	buck--;
-	mask = 1 << buck;
-	if (enable) {
-		ret = pmic_clrsetbits(pmic, REG_DCDC_ILMAX, 0, 3 << (buck * 2));
-		if (ret)
-			return ret;
-		ret = pmic_clrsetbits(pmic, REG_DCDC_UV_ACT, 1 << buck, 0);
-		if (ret)
-			return ret;
+	switch (priv->variant) {
+	case RK816_ID:
+		if (buck >= 4) {
+			buck -= 4;
+			en_reg = RK816_REG_DCDC_EN2;
+		} else {
+			en_reg = RK816_REG_DCDC_EN1;
+		}
+		if (enable)
+			value = ((1 << buck) | (1 << (buck + 4)));
+		else
+			value = ((0 << buck) | (1 << (buck + 4)));
+		ret = pmic_reg_write(pmic, en_reg, value);
+		break;
+
+	case RK808_ID:
+	case RK818_ID:
+		mask = 1 << buck;
+		if (enable) {
+			ret = pmic_clrsetbits(pmic, REG_DCDC_ILMAX,
+					      0, 3 << (buck * 2));
+			if (ret)
+				return ret;
+			ret = pmic_clrsetbits(pmic, REG_DCDC_UV_ACT,
+					      1 << buck, 0);
+			if (ret)
+				return ret;
+		}
+		ret = pmic_clrsetbits(pmic, REG_DCDC_EN, mask,
+				      enable ? mask : 0);
+		break;
+	default:
+		ret = -EINVAL;
 	}
 
-	return pmic_clrsetbits(pmic, REG_DCDC_EN, mask, enable ? mask : 0);
+	return ret;
 }
 
 #ifdef ENABLE_DRIVER
@@ -138,7 +229,10 @@ static const struct rk8xx_reg_info *get_ldo_reg(struct udevice *pmic,
 					     int num)
 {
 	struct rk8xx_priv *priv = dev_get_priv(pmic);
+
 	switch (priv->variant) {
+	case RK816_ID:
+		return &rk816_ldo[num];
 	case RK818_ID:
 		return &rk818_ldo[num];
 	default:
@@ -146,10 +240,70 @@ static const struct rk8xx_reg_info *get_ldo_reg(struct udevice *pmic,
 	}
 }
 
+static int _ldo_get_enable(struct udevice *pmic, int ldo)
+{
+	struct rk8xx_priv *priv = dev_get_priv(pmic);
+	uint mask = 0;
+	int ret = 0;
+
+	switch (priv->variant) {
+	case RK816_ID:
+		if (ldo >= 4) {
+			mask = 1 << (ldo - 4);
+			ret = pmic_reg_read(pmic, RK816_REG_LDO_EN2);
+		} else {
+			mask = 1 << ldo;
+			ret = pmic_reg_read(pmic, RK816_REG_LDO_EN1);
+		}
+		break;
+	case RK808_ID:
+	case RK818_ID:
+		mask = 1 << ldo;
+		ret = pmic_reg_read(pmic, REG_LDO_EN);
+		if (ret < 0)
+			return ret;
+		break;
+	}
+	return ret & mask ? true : false;
+}
+
+
+static int _ldo_set_enable(struct udevice *pmic, int ldo, bool enable)
+{
+	struct rk8xx_priv *priv = dev_get_priv(pmic);
+	uint mask, value, en_reg;
+	int ret = 0;
+
+	switch (priv->variant) {
+	case RK816_ID:
+		if (ldo >= 4) {
+			ldo -= 4;
+			en_reg = RK816_REG_LDO_EN2;
+		} else {
+			en_reg = RK816_REG_LDO_EN1;
+		}
+		if (enable)
+			value = ((1 << ldo) | (1 << (ldo + 4)));
+		else
+			value = ((0 << ldo) | (1 << (ldo + 4)));
+
+		ret = pmic_reg_write(pmic, en_reg, value);
+		break;
+	case RK808_ID:
+	case RK818_ID:
+		mask = 1 << ldo;
+		ret = pmic_clrsetbits(pmic, REG_LDO_EN, mask,
+				       enable ? mask : 0);
+		break;
+	}
+
+	return ret;
+}
+
 static int buck_get_value(struct udevice *dev)
 {
 	int buck = dev->driver_data - 1;
-	const struct rk8xx_reg_info *info = get_buck_reg(dev->parent, buck);
+	const struct rk8xx_reg_info *info = get_buck_reg(dev->parent, buck, 0);
 	int mask = info->vsel_mask;
 	int ret, val;
 
@@ -165,14 +319,14 @@ static int buck_get_value(struct udevice *dev)
 
 static int buck_set_value(struct udevice *dev, int uvolt)
 {
-	int buck = dev->driver_data;
+	int buck = dev->driver_data - 1;
 
 	return _buck_set_value(dev->parent, buck, uvolt);
 }
 
 static int buck_set_enable(struct udevice *dev, bool enable)
 {
-	int buck = dev->driver_data;
+	int buck = dev->driver_data - 1;
 
 	return _buck_set_enable(dev->parent, buck, enable);
 }
@@ -180,16 +334,8 @@ static int buck_set_enable(struct udevice *dev, bool enable)
 static int buck_get_enable(struct udevice *dev)
 {
 	int buck = dev->driver_data - 1;
-	int ret;
-	uint mask;
-
-	mask = 1 << buck;
 
-	ret = pmic_reg_read(dev->parent, REG_DCDC_EN);
-	if (ret < 0)
-		return ret;
-
-	return ret & mask ? true : false;
+	return _buck_get_enable(dev->parent, buck);
 }
 
 static int ldo_get_value(struct udevice *dev)
@@ -228,27 +374,15 @@ static int ldo_set_value(struct udevice *dev, int uvolt)
 static int ldo_set_enable(struct udevice *dev, bool enable)
 {
 	int ldo = dev->driver_data - 1;
-	uint mask;
-
-	mask = 1 << ldo;
 
-	return pmic_clrsetbits(dev->parent, REG_LDO_EN, mask,
-			       enable ? mask : 0);
+	return _ldo_set_enable(dev->parent, ldo, enable);
 }
 
 static int ldo_get_enable(struct udevice *dev)
 {
 	int ldo = dev->driver_data - 1;
-	int ret;
-	uint mask;
-
-	mask = 1 << ldo;
 
-	ret = pmic_reg_read(dev->parent, REG_LDO_EN);
-	if (ret < 0)
-		return ret;
-
-	return ret & mask ? true : false;
+	return _ldo_get_enable(dev->parent, ldo);
 }
 
 static int switch_set_enable(struct udevice *dev, bool enable)
diff --git a/include/power/rk8xx_pmic.h b/include/power/rk8xx_pmic.h
index 47a6b36e7e..8e821c3fc3 100644
--- a/include/power/rk8xx_pmic.h
+++ b/include/power/rk8xx_pmic.h
@@ -171,8 +171,15 @@ enum {
 };
 
 enum {
-	RK805_ID = 0x8050,
+	RK816_REG_DCDC_EN1 = 0x23,
+	RK816_REG_DCDC_EN2,
+	RK816_REG_LDO_EN1 = 0x27,
+	RK816_REG_LDO_EN2,
+};
+
+enum {
 	RK808_ID = 0x0000,
+	RK816_ID = 0x8160,
 	RK818_ID = 0x8180,
 };
 

commit 4d786a237a928bdc25060dfff0cff4f68d2c18e1
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Fri Sep 8 09:52:12 2017 +0800

    rockchip: i2c: rk3328: support i2c for rk3328 SoC
    
    Change-Id: Ibef0a50ed34f8a38a6aada8b4bb703a8b1f794d7
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/i2c/rk_i2c.c b/drivers/i2c/rk_i2c.c
index 68e66536e4..a051893c4a 100644
--- a/drivers/i2c/rk_i2c.c
+++ b/drivers/i2c/rk_i2c.c
@@ -396,6 +396,7 @@ static const struct udevice_id rockchip_i2c_ids[] = {
 	{ .compatible = "rockchip,rk3066-i2c" },
 	{ .compatible = "rockchip,rk3188-i2c" },
 	{ .compatible = "rockchip,rk3288-i2c" },
+	{ .compatible = "rockchip,rk3328-i2c" },
 	{ .compatible = "rockchip,rk3399-i2c" },
 	{ }
 };

commit c3488198635ec48e03a0ec5c30f6a4bad5682f15
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 13 15:18:17 2017 +0800

    rockchip: rk3399: init CPU clock when rkclk_init()
    
    Init the CPU and its buses to speed up the boot time.
    
    Change-Id: Ib56f641eb789bb87a67b04f781e879b8dcd847a5
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 7232806724..d4a5f3ba53 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -403,6 +403,7 @@ static void rkclk_init(struct rk3399_cru *cru)
 	u32 hclk_div;
 	u32 pclk_div;
 
+	rk3399_configure_cpu(cru, APLL_L_600_MHZ);
 	/*
 	 * some cru registers changed by bootrom, we'd better reset them to
 	 * reset/default values described in TRM to avoid confusion in kernel.

commit b67be560b3e1231b3403faa7a6887499bdee4fa7
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 13 16:08:28 2017 +0800

    rockchip: rock-rk3188: do not use ARCH_MEMSET in TPL
    
    This patch is to fix error in build TPL:
    common/init/built-in.o: In function `board_init_f_init_reserve':
    common/init/board_init.c:111: undefined reference to `memset'
    
    Change-Id: I9893987e26a86927d1628519d257d62f3a9ceaf9
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/rock_defconfig b/configs/rock_defconfig
index aaf27751d4..cd7b36b5a7 100644
--- a/configs/rock_defconfig
+++ b/configs/rock_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 # CONFIG_SPL_USE_ARCH_MEMCPY is not set
 # CONFIG_SPL_USE_ARCH_MEMSET is not set
+# CONFIG_TPL_USE_ARCH_MEMSET is not set
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3188=y

commit f9c699b5c4dd8da61fd76b3483dcff14b6ee3230
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 13 09:32:35 2017 +0800

    rockchip: enable TPL_SYSRESET for all rockchip SoCs
    
    With Makefiles testing for $(SPL_TPL_)SYSRESET, we need TPL_SYSRESET
    for do_reset() in TPL for Rockchip SoCs.
    
    References: 87c16d4 "drivers: spl: consistently use the $(SPL_TPL_)
    macro"
    
    Change-Id: Ib4509b01e9efb4503552345efccc94e79fb0c12b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 69749d2806..6ef2db3188 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1118,6 +1118,7 @@ config ARCH_ROCKCHIP
 	imply FAT_WRITE
 	imply USB_FUNCTION_FASTBOOT
 	imply SPL_SYSRESET
+	imply TPL_SYSRESET
 
 config TARGET_THUNDERX_88XX
 	bool "Support ThunderX 88xx"

commit e6cf1f43f0547ef5eda4ce3bb2a4c8d4687e1238
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Sep 12 17:02:56 2017 +0800

    spl: optee: add support for Rockchip customize optee
    
    Rockchip change the parameter to r1 instead of lr.
    
    Change-Id: I675e3be2a8a80c548117e449f72f70888d1b4191
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/spl/spl_optee.S b/common/spl/spl_optee.S
index 4f7f8ba474..64b24956ee 100644
--- a/common/spl/spl_optee.S
+++ b/common/spl/spl_optee.S
@@ -9,5 +9,6 @@
 
 ENTRY(spl_optee_entry)
 	ldr lr, =CONFIG_SYS_TEXT_BASE
+	ldr r1, =CONFIG_SYS_TEXT_BASE
 	mov pc, r3
 ENDPROC(spl_optee_entry)

commit f3c945a623ee2bce3a79b0cc797897b04887b0ce
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Sep 12 16:07:00 2017 +0800

    rockchip: rk3288: add timer_init() for u-boot
    
    If we do not enable the SPL, we need enable the timer for U-Boot.
    
    Change-Id: I6d39f7a68e345ea36fbb624c43db5be630fa817b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3288-board.c b/arch/arm/mach-rockchip/rk3288-board.c
index 535f871799..9ec1d420a2 100644
--- a/arch/arm/mach-rockchip/rk3288-board.c
+++ b/arch/arm/mach-rockchip/rk3288-board.c
@@ -16,6 +16,7 @@
 #include <asm/arch/pmu_rk3288.h>
 #include <asm/arch/qos_rk3288.h>
 #include <asm/arch/boot_mode.h>
+#include <asm/arch/timer.h>
 #include <asm/gpio.h>
 #include <dm/pinctrl.h>
 #include <dt-bindings/clock/rk3288-cru.h>
@@ -162,6 +163,8 @@ int board_init(void)
 	struct udevice *pinctrl;
 	int ret;
 
+	rockchip_timer_init();
+
 	/*
 	 * We need to implement sdcard iomux here for the further
 	 * initlization, otherwise, it'll hit sdcard command sending

commit 1dd6e3818ac62e8566ac4c07e6c341180319d5ca
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Tue Sep 6 15:27:27 2016 +0800

    rockchip: provide CONFIG_ROCKCHIP_SPL macro for convenience
    
    Rockchip also provide some SPL binary for some SoCs, it's responsible
    for the SDRAM initialization, and load U-Boot to SDRAM.
    
    We can use CONFIG_ROCKCHIP_SPL in case want to use Rockchip's SPL
    binary.
    
    mkimage:
    
    dd if=tools/rk_tools/bin/rk32/rk3288_ddr_400MHz_v1.03.bin
    of=spl.bin bs=4 skip=1 && tools/mkimage -n rk3288 -T rksd -d spl.bin
    rk3288_uboot.img && cat u-boot-dtb.bin >> rk3288_uboot.img
    
    Change-Id: Icf918d02d5ae3fbbe3ddcb87e1b4930ec4cd141c
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig
index 53cc9a0dcd..9da8c8109d 100644
--- a/arch/arm/mach-rockchip/rk3288/Kconfig
+++ b/arch/arm/mach-rockchip/rk3288/Kconfig
@@ -129,6 +129,14 @@ config SPL_LIBGENERIC_SUPPORT
 config SPL_SERIAL_SUPPORT
 	default y
 
+config ROCKCHIP_SPL
+	bool "Use Rockchip's SPL binary"
+	select ROCKCHIP_SPL_BACK_TO_BROM
+	help
+	  Rockchip has provide a SPL binary to configure DDR device instead of
+	  open source u-boot-spl binary, which can autodetect DDR deivce type and
+	  initialize.
+
 source "board/chipspark/popmetal_rk3288/Kconfig"
 
 source "board/firefly/firefly-rk3288/Kconfig"

commit b7b8d0a683d7dec418c94b725f5fb09c009e24b9
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Sep 12 15:52:07 2017 +0800

    spl: stash bootstage info before jump to next stage
    
    Since we may jump to next stage like ATF/OP-TEE instead of U-Boot,
    we need to stash the bootstage info before it.
    
    Change-Id: I4de48f95291be638cc57be25c2bc27f526d9f9f0
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/spl/spl.c b/common/spl/spl.c
index 85e2e887c9..d156e74533 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -424,6 +424,15 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 	debug("SPL malloc() used %#lx bytes (%ld KB)\n", gd->malloc_ptr,
 	      gd->malloc_ptr / 1024);
 #endif
+#ifdef CONFIG_BOOTSTAGE_STASH
+	int ret;
+
+	bootstage_mark_name(BOOTSTAGE_ID_END_SPL, "end_spl");
+	ret = bootstage_stash((void *)CONFIG_BOOTSTAGE_STASH_ADDR,
+			      CONFIG_BOOTSTAGE_STASH_SIZE);
+	if (ret)
+		debug("Failed to stash bootstage: err=%d\n", ret);
+#endif
 
 	if (CONFIG_IS_ENABLED(ATF_SUPPORT)) {
 		debug("loaded - jumping to U-Boot via ATF BL31.\n");
@@ -436,15 +445,6 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 	}
 
 	debug("loaded - jumping to U-Boot...\n");
-#ifdef CONFIG_BOOTSTAGE_STASH
-	int ret;
-
-	bootstage_mark_name(BOOTSTAGE_ID_END_SPL, "end_spl");
-	ret = bootstage_stash((void *)CONFIG_BOOTSTAGE_STASH_ADDR,
-			      CONFIG_BOOTSTAGE_STASH_SIZE);
-	if (ret)
-		debug("Failed to stash bootstage: err=%d\n", ret);
-#endif
 	spl_board_prepare_for_boot();
 	jump_to_image_no_args(&spl_image);
 }

commit 9ff78ba88eb625534301cf3b7c49936bdf0671c1
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Sep 12 15:47:23 2017 +0800

    rockchip: rk3399: enable secure timer before spl_early_init()
    
    We need to enable the timer before spl_early_init(), when enable
    bootstage, the spl_early_init will get time mark from timer.
    
    Change-Id: I2e873e2655fd0145782643108afcafb84082ce2c
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3399-board-spl.c b/arch/arm/mach-rockchip/rk3399-board-spl.c
index a3708caa03..be3636f85b 100644
--- a/arch/arm/mach-rockchip/rk3399-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3399-board-spl.c
@@ -108,6 +108,8 @@ void board_init_f(ulong dummy)
 	/*  Emmc clock generator: disable the clock multipilier */
 	rk_clrreg(GRF_EMMCCORE_CON11, 0x0ff);
 
+	secure_timer_init();
+
 	ret = spl_early_init();
 	if (ret) {
 		debug("spl_early_init() failed: %d\n", ret);
@@ -126,8 +128,6 @@ void board_init_f(ulong dummy)
 	rk_clrsetreg(SGRF_DDR_RGN_CON16, 0x1FF, 0);
 	rk_clrreg(SGRF_SLV_SECURE_CON4, 0x2000);
 
-	secure_timer_init();
-
 	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
 	if (ret) {
 		debug("Pinctrl init failed: %d\n", ret);

commit f4c98a16321ddd923b404417fda90402f1226f89
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Sep 12 15:45:59 2017 +0800

    armv8: add timer_get_boot_us() for generic timer
    
    Rockchip use 24M for generic timer, count/24 is us.
    
    Change-Id: I89a38fdeb5fd4f6a54ec31926c2e120786be14de
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/cpu/armv8/generic_timer.c b/arch/arm/cpu/armv8/generic_timer.c
index a2dda333fe..8b13dd95ca 100644
--- a/arch/arm/cpu/armv8/generic_timer.c
+++ b/arch/arm/cpu/armv8/generic_timer.c
@@ -62,3 +62,10 @@ unsigned long usec2ticks(unsigned long usec)
 
 	return ticks;
 }
+
+ulong timer_get_boot_us(void)
+{
+	ulong count = timer_read_counter();
+
+	return count/24;
+}

commit 4214dda9435890a62b55fb1191ec4996b21a0293
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Sep 7 14:57:41 2017 +0800

    rockchip: remove CONFIG_SPL_ATF_TEXT_BASE for all boards
    
    After update bl31_entry(), we don't need CONFIG_SPL_ATF_TEXT_BASE.
    
    Change-Id: Ia64fdaa37242332a497077ecc7833c7c8d0b0d45
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
index d51687a680..e193ccbe0d 100644
--- a/configs/firefly-rk3399_defconfig
+++ b/configs/firefly-rk3399_defconfig
@@ -15,7 +15,6 @@ CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
 CONFIG_SPL_ATF_SUPPORT=y
-CONFIG_SPL_ATF_TEXT_BASE=0x00010000
 CONFIG_FASTBOOT=y
 CONFIG_USB_FUNCTION_FASTBOOT=y
 CONFIG_CMD_FASTBOOT=y
diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig
index 45a12a8b27..ca8eee57f1 100644
--- a/configs/lion-rk3368_defconfig
+++ b/configs/lion-rk3368_defconfig
@@ -29,7 +29,6 @@ CONFIG_TPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
 CONFIG_SPL_ATF_SUPPORT=y
-CONFIG_SPL_ATF_TEXT_BASE=0x10000
 CONFIG_TPL=y
 CONFIG_TPL_BOOTROM_SUPPORT=y
 CONFIG_TPL_DRIVERS_MISC_SUPPORT=y

commit 160ff8a6e2778537ca744b617e48e3a361b16520
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Sep 7 14:56:07 2017 +0800

    spl: remove SPL_ATF_TEXT_BASE config option
    
    We don't need SPL_ATF_TEXT_BASE since we can get the bl31 entry
    from spl_image.entry_point.
    
    Change-Id: I730ad6548e277527f1b07b40ffb7a3bc0a9d6d35
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 601d1262de..6174084d84 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -700,12 +700,6 @@ config SPL_ATF_SUPPORT
 	  is loaded by SPL(which is considered as BL2 in ATF terminology).
 	  More detail at: https://github.com/ARM-software/arm-trusted-firmware
 
-config SPL_ATF_TEXT_BASE
-	depends on SPL_ATF_SUPPORT
-	hex "ATF BL31 base address"
-	help
-	  This is the base address in memory for ATF BL31 text and entry point.
-
 config SPL_OPTEE_SUPPORT
 	bool "Support OP-TEE Trusted OS"
 	depends on ARM

commit 7940094c97d3636cb5a919bc62ba4817f1d9641d
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Sep 7 14:33:14 2017 +0800

    spl: update bl31_entry() with new name and parameter
    
    Rename the bl31_entry() function with 'spl_' prefix and add one
    parameter for bl31 entry address since we can get it from spl_image header.
    
    Change-Id: I4b6125f1d7138f26c2256ab86f449be4a6f1c4cc
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/spl/spl.c b/common/spl/spl.c
index d0459bec3f..85e2e887c9 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -427,7 +427,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 
 	if (CONFIG_IS_ENABLED(ATF_SUPPORT)) {
 		debug("loaded - jumping to U-Boot via ATF BL31.\n");
-		bl31_entry();
+		spl_bl31_entry((void *)spl_image.entry_point);
 	}
 
 	if (CONFIG_IS_ENABLED(OPTEE_SUPPORT)) {
diff --git a/common/spl/spl_atf.c b/common/spl/spl_atf.c
index 6e8f928044..2f6fff971a 100644
--- a/common/spl/spl_atf.c
+++ b/common/spl/spl_atf.c
@@ -82,13 +82,13 @@ void raw_write_daif(unsigned int daif)
 	__asm__ __volatile__("msr DAIF, %0\n\t" : : "r" (daif) : "memory");
 }
 
-void bl31_entry(void)
+void spl_bl31_entry(void *entry_addr)
 {
 	struct bl31_params *bl31_params;
 	void (*entry)(struct bl31_params *params, void *plat_params) = NULL;
 
 	bl31_params = bl2_plat_get_bl31_params();
-	entry = (void *)CONFIG_SPL_ATF_TEXT_BASE;
+	entry = entry_addr;
 
 	raw_write_daif(SPSR_EXCEPTION_MASK);
 	dcache_disable();
diff --git a/include/spl.h b/include/spl.h
index 13d46ed780..d21a3d21cb 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -267,7 +267,11 @@ int spl_dfu_cmd(int usbctrl, char *dfu_alt_info, char *interface, char *devstr);
 int spl_mmc_load_image(struct spl_image_info *spl_image,
 		       struct spl_boot_device *bootdev);
 
-void bl31_entry(void);
+/**
+ * spl_bl31_entry - entry function for ATF bl31
+ * @entry_addr - entry address of bl31 text
+ */
+void spl_bl31_entry(void *entry_addr);
 
 /**
  * spl_optee_entry - entry function for optee

commit 31e72715a91300637bf32724017bbe46f4c4e526
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Sep 7 11:25:05 2017 +0800

    rockchip: firefly-rk3399: enable SPL_SYSRESET config
    
    After the patch below, we need to add SPL_SYSRESET for do_reset()
    in SPL:
    87c16d4 drivers: spl: consistently use the $(SPL_TPL_) macro
    
    Change-Id: Id7be0a9ed6d4d522fe0941433e6f2b569eda0a00
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
index 3e88a37efd..d51687a680 100644
--- a/configs/firefly-rk3399_defconfig
+++ b/configs/firefly-rk3399_defconfig
@@ -70,6 +70,7 @@ CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
+CONFIG_SPL_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y

commit 7dfddccf7e99f7876aced2b8bfe4732ef9368a62
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Sep 7 11:18:58 2017 +0800

    rockchip: ram: rk3399: update reg map for of-platdata
    
    After Simon's patch, the dtoc can work with 64bit address,
    so we need to fix reg number for it.
    Depend on Simon's patch set:
    https://patchwork.ozlabs.org/cover/807266/
    
    Change-Id: Ifc715eeea82e412d2236f22a4d8885efc02aec40
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c
index 63342ab5c9..5ed4b03837 100644
--- a/drivers/ram/rockchip/sdram_rk3399.c
+++ b/drivers/ram/rockchip/sdram_rk3399.c
@@ -1115,7 +1115,7 @@ static int conv_of_platdata(struct udevice *dev)
 	int ret;
 
 	ret = regmap_init_mem_platdata(dev, dtplat->reg,
-			ARRAY_SIZE(dtplat->reg) / 4,
+			ARRAY_SIZE(dtplat->reg) / 2,
 			&plat->map);
 	if (ret)
 		return ret;

commit adcf6d062e7b7708255f1bdae994cd75008b1e27
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Sep 7 11:15:35 2017 +0800

    rockchip: sdhci: update reg map for of-platdata
    
    After Simon's patch, the dtoc can work with 64bit address,
    so we need to fix reg number for it.
    Depend on Simon's patch set:
    https://patchwork.ozlabs.org/cover/807266/
    
    Change-Id: Ibd3cda6d5891b1faccb23da94cd4200cb12dd514
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index fd3bb1042a..a05a422728 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -187,7 +187,7 @@ static int arasan_sdhci_probe(struct udevice *dev)
 	struct dtd_rockchip_rk3399_sdhci_5_1 *dtplat = &plat->dtplat;
 
 	host->name = dev->name;
-	host->ioaddr = map_sysmem(dtplat->reg[1], dtplat->reg[3]);
+	host->ioaddr = map_sysmem(dtplat->reg[0], dtplat->reg[1]);
 	host->host_caps |= MMC_MODE_8BIT;
 	max_frequency = dtplat->max_frequency;
 	ret = clk_get_by_index_platdata(dev, 0, dtplat->clocks, &clk);

commit 3b103c4e393dce7f7fad8887b5da35444be6f13f
Author: Simon Glass <sjg@chromium.org>
Date:   Tue Aug 29 14:16:01 2017 -0600

    dtoc: Add a header to the generated files
    
    Add a header that indicates that the files generated by dtoc should not be
    modified.
    
    Signed-off-by: Simon Glass <sjg@chromium.org>

diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py
index cfca45b0ac..dc9c0d9f45 100644
--- a/tools/dtoc/dtb_platdata.py
+++ b/tools/dtoc/dtb_platdata.py
@@ -190,6 +190,16 @@ class DtbPlatdata(object):
         self._lines = []
         return lines
 
+    def out_header(self):
+        """Output a message indicating that this is an auto-generated file"""
+        self.out('''/*
+ * DO NOT MODIFY
+ *
+ * This file was generated by dtoc from a .dtb (device tree binary) file.
+ */
+
+''')
+
     def get_phandle_argc(self, prop, node_name):
         """Check if a node contains phandles
 
@@ -410,6 +420,7 @@ class DtbPlatdata(object):
         definitions for node in self._valid_nodes. See the documentation in
         README.of-plat for more information.
         """
+        self.out_header()
         self.out('#include <stdbool.h>\n')
         self.out('#include <libfdt.h>\n')
 
@@ -512,6 +523,7 @@ class DtbPlatdata(object):
         See the documentation in doc/driver-model/of-plat.txt for more
         information.
         """
+        self.out_header()
         self.out('#include <common.h>\n')
         self.out('#include <dm.h>\n')
         self.out('#include <dt-structs.h>\n')

commit de97595a87479a65eb8634a52369202d587edd4c
Author: Simon Glass <sjg@chromium.org>
Date:   Tue Aug 29 14:16:00 2017 -0600

    dtoc: Rename the auto-generated dt-structs.h file
    
    The filename of the auto-generated file is the same as the file that
    includes it. Even though the form is in the generated/ subdirectory, this
    could be confused.
    
    Rename the generated file to something that makes it clear it is
    auto-generated.
    
    Signed-off-by: Simon Glass <sjg@chromium.org>

diff --git a/include/dt-structs.h b/include/dt-structs.h
index 76979e73e1..c0f56951b5 100644
--- a/include/dt-structs.h
+++ b/include/dt-structs.h
@@ -23,7 +23,7 @@ struct phandle_2_arg {
 	const void *node;
 	int arg[2];
 };
-#include <generated/dt-structs.h>
+#include <generated/dt-structs-gen.h>
 #endif
 
 #endif
diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index dd8065d87d..b86ea76bab 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -257,14 +257,15 @@ cmd_dtoch = $(pythonpath) $(srctree)/tools/dtoc/dtoc -d $(obj)/$(SPL_BIN).dtb -o
 quiet_cmd_plat = PLAT    $@
 cmd_plat = $(CC) $(c_flags) -c $< -o $@
 
-$(obj)/dts/dt-platdata.o: $(obj)/dts/dt-platdata.c include/generated/dt-structs.h
+$(obj)/dts/dt-platdata.o: $(obj)/dts/dt-platdata.c \
+		include/generated/dt-structs-gen.h
 	$(call if_changed,plat)
 
 PHONY += dts_dir
 dts_dir:
 	$(shell [ -d $(obj)/dts ] || mkdir -p $(obj)/dts)
 
-include/generated/dt-structs.h: $(obj)/$(SPL_BIN).dtb dts_dir checkdtoc
+include/generated/dt-structs-gen.h: $(obj)/$(SPL_BIN).dtb dts_dir checkdtoc
 	$(call if_changed,dtoch)
 
 $(obj)/dts/dt-platdata.c: $(obj)/$(SPL_BIN).dtb dts_dir checkdtoc

commit 54d1a4b76c2dfc54f524c9a49fe2777d7ea94fc4
Author: Simon Glass <sjg@chromium.org>
Date:   Tue Aug 29 14:15:59 2017 -0600

    dtoc: Support properties containing multiple phandle values
    
    At present dtoc has a very simplistic view of phandles. It assumes that
    a property has only a single phandle with a single argument (i.e. two
    cells per property).
    
    This is not true in many cases. Enhance the implementation to scan all
    phandles in a property and to use the correct number of arguments (which
    can be 0, 1, 2 or more) when generating the C code. For the struct
    definitions, use a struct which can hold the maximum number of arguments
    used by the property.
    
    Signed-off-by: Simon Glass <sjg@chromium.org>

diff --git a/include/dt-structs.h b/include/dt-structs.h
index 9ab4e2524d..76979e73e1 100644
--- a/include/dt-structs.h
+++ b/include/dt-structs.h
@@ -18,6 +18,11 @@ struct phandle_1_arg {
 	const void *node;
 	int arg[1];
 };
+
+struct phandle_2_arg {
+	const void *node;
+	int arg[2];
+};
 #include <generated/dt-structs.h>
 #endif
 
diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py
index 1920a59f82..cfca45b0ac 100644
--- a/tools/dtoc/dtb_platdata.py
+++ b/tools/dtoc/dtb_platdata.py
@@ -394,11 +394,13 @@ class DtbPlatdata(object):
                     if not isinstance(prop.value, list):
                         prop.value = [prop.value]
                     # Process the list as pairs of (phandle, id)
-                    value_it = iter(prop.value)
-                    for phandle_cell, _ in zip(value_it, value_it):
+                    pos = 0
+                    for args in info.args:
+                        phandle_cell = prop.value[pos]
                         phandle = fdt_util.fdt32_to_cpu(phandle_cell)
                         target_node = self._fdt.phandle_to_node[phandle]
                         node.phandles.add(target_node)
+                        pos += 1 + args
 
 
     def generate_structs(self, structs):
@@ -422,7 +424,7 @@ class DtbPlatdata(object):
                     struct_name = 'struct phandle_%d_arg' % info.max_args
                     self.out('\t%s%s[%d]' % (tab_to(2, struct_name),
                                              conv_name_to_c(prop.name),
-                                             len(prop.value) / 2))
+                                             len(info.args)))
                 else:
                     ptype = TYPE_NAMES[prop.type]
                     self.out('\t%s%s' % (tab_to(2, ptype),
@@ -461,13 +463,18 @@ class DtbPlatdata(object):
                 info = self.get_phandle_argc(prop, node.name)
                 if info:
                     # Process the list as pairs of (phandle, id)
-                    value_it = iter(prop.value)
-                    for phandle_cell, id_cell in zip(value_it, value_it):
+                    pos = 0
+                    for args in info.args:
+                        phandle_cell = prop.value[pos]
                         phandle = fdt_util.fdt32_to_cpu(phandle_cell)
-                        id_num = fdt_util.fdt32_to_cpu(id_cell)
                         target_node = self._fdt.phandle_to_node[phandle]
                         name = conv_name_to_c(target_node.name)
-                        vals.append('{&%s%s, {%d}}' % (VAL_PREFIX, name, id_num))
+                        arg_values = []
+                        for i in range(args):
+                            arg_values.append(str(fdt_util.fdt32_to_cpu(prop.value[pos + 1 + i])))
+                        pos += 1 + args
+                        vals.append('\t{&%s%s, {%s}}' % (VAL_PREFIX, name,
+                                                     ', '.join(arg_values)))
                     for val in vals:
                         self.buf('\n\t\t%s,' % val)
                 else:
diff --git a/tools/dtoc/dtoc_test_phandle.dts b/tools/dtoc/dtoc_test_phandle.dts
index c0a602f296..ba12b0fe65 100644
--- a/tools/dtoc/dtoc_test_phandle.dts
+++ b/tools/dtoc/dtoc_test_phandle.dts
@@ -10,15 +10,28 @@
 
 / {
 	phandle: phandle-target {
+		u-boot,dm-pre-reloc;
+		compatible = "target";
+		intval = <0>;
+                #clock-cells = <0>;
+	};
+
+	phandle_1: phandle2-target {
 		u-boot,dm-pre-reloc;
 		compatible = "target";
 		intval = <1>;
-                #clock-cells = <1>;
+		#clock-cells = <1>;
+	};
+	phandle_2: phandle3-target {
+		u-boot,dm-pre-reloc;
+		compatible = "target";
+		intval = <2>;
+		#clock-cells = <2>;
 	};
 
 	phandle-source {
 		u-boot,dm-pre-reloc;
 		compatible = "source";
-		clocks = <&phandle 1>;
+		clocks = <&phandle &phandle_1 11 &phandle_2 12 13 &phandle>;
 	};
 };
diff --git a/tools/dtoc/test_dtoc.py b/tools/dtoc/test_dtoc.py
index fbae927cf8..cc009b2a25 100644
--- a/tools/dtoc/test_dtoc.py
+++ b/tools/dtoc/test_dtoc.py
@@ -228,7 +228,7 @@ U_BOOT_DEVICE(pmic_at_9) = {
         self.assertEqual('''#include <stdbool.h>
 #include <libfdt.h>
 struct dtd_source {
-\tstruct phandle_1_arg clocks[1];
+\tstruct phandle_2_arg clocks[4];
 };
 struct dtd_target {
 \tfdt32_t\t\tintval;
@@ -243,7 +243,7 @@ struct dtd_target {
 #include <dt-structs.h>
 
 static struct dtd_target dtv_phandle_target = {
-\t.intval\t\t\t= 0x1,
+\t.intval\t\t\t= 0x0,
 };
 U_BOOT_DEVICE(phandle_target) = {
 \t.name\t\t= "target",
@@ -251,9 +251,30 @@ U_BOOT_DEVICE(phandle_target) = {
 \t.platdata_size\t= sizeof(dtv_phandle_target),
 };
 
+static struct dtd_target dtv_phandle2_target = {
+\t.intval\t\t\t= 0x1,
+};
+U_BOOT_DEVICE(phandle2_target) = {
+\t.name\t\t= "target",
+\t.platdata\t= &dtv_phandle2_target,
+\t.platdata_size\t= sizeof(dtv_phandle2_target),
+};
+
+static struct dtd_target dtv_phandle3_target = {
+\t.intval\t\t\t= 0x2,
+};
+U_BOOT_DEVICE(phandle3_target) = {
+\t.name\t\t= "target",
+\t.platdata\t= &dtv_phandle3_target,
+\t.platdata_size\t= sizeof(dtv_phandle3_target),
+};
+
 static struct dtd_source dtv_phandle_source = {
 \t.clocks\t\t\t= {
-\t\t{&dtv_phandle_target, {1}},},
+\t\t\t{&dtv_phandle_target, {}},
+\t\t\t{&dtv_phandle2_target, {11}},
+\t\t\t{&dtv_phandle3_target, {12, 13}},
+\t\t\t{&dtv_phandle_target, {}},},
 };
 U_BOOT_DEVICE(phandle_source) = {
 \t.name\t\t= "source",

commit f9faa23037379234c2c74cd66ff8e446e60ca81b
Author: Simon Glass <sjg@chromium.org>
Date:   Tue Aug 29 14:15:58 2017 -0600

    dtoc: Put phandle args in an array
    
    We want to support more than one phandle argument. It makes sense to use
    an array for this rather than discrete struct members. Adjust the code to
    support this. Rename the member to 'arg' instead of 'id'.
    
    Signed-off-by: Simon Glass <sjg@chromium.org>

diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index 2584b7ea34..e006b6bbab 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -32,7 +32,7 @@ int clk_get_by_index_platdata(struct udevice *dev, int index,
 	ret = uclass_get_device(UCLASS_CLK, 0, &clk->dev);
 	if (ret)
 		return ret;
-	clk->id = cells[0].id;
+	clk->id = cells[0].arg[0];
 
 	return 0;
 }
diff --git a/include/dt-structs.h b/include/dt-structs.h
index 2ed997115a..9ab4e2524d 100644
--- a/include/dt-structs.h
+++ b/include/dt-structs.h
@@ -11,12 +11,12 @@
 #if CONFIG_IS_ENABLED(OF_PLATDATA)
 struct phandle_0_arg {
 	const void *node;
-	int id[0];
+	int arg[0];
 };
 
 struct phandle_1_arg {
 	const void *node;
-	int id;
+	int arg[1];
 };
 #include <generated/dt-structs.h>
 #endif
diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py
index c0a3ae692b..1920a59f82 100644
--- a/tools/dtoc/dtb_platdata.py
+++ b/tools/dtoc/dtb_platdata.py
@@ -467,7 +467,7 @@ class DtbPlatdata(object):
                         id_num = fdt_util.fdt32_to_cpu(id_cell)
                         target_node = self._fdt.phandle_to_node[phandle]
                         name = conv_name_to_c(target_node.name)
-                        vals.append('{&%s%s, %d}' % (VAL_PREFIX, name, id_num))
+                        vals.append('{&%s%s, {%d}}' % (VAL_PREFIX, name, id_num))
                     for val in vals:
                         self.buf('\n\t\t%s,' % val)
                 else:
diff --git a/tools/dtoc/test_dtoc.py b/tools/dtoc/test_dtoc.py
index aa617a649c..fbae927cf8 100644
--- a/tools/dtoc/test_dtoc.py
+++ b/tools/dtoc/test_dtoc.py
@@ -253,7 +253,7 @@ U_BOOT_DEVICE(phandle_target) = {
 
 static struct dtd_source dtv_phandle_source = {
 \t.clocks\t\t\t= {
-\t\t{&dtv_phandle_target, 1},},
+\t\t{&dtv_phandle_target, {1}},},
 };
 U_BOOT_DEVICE(phandle_source) = {
 \t.name\t\t= "source",

commit 59e6856db08982e9d13a2d1cf3f4050e51ffdf03
Author: Simon Glass <sjg@chromium.org>
Date:   Tue Aug 29 14:15:57 2017 -0600

    dtoc: Put each phandle on a separate line
    
    When writing values from properties which contain phandles, dtoc currently
    writes 8 phandles per line. Change this to write one phandle per line.
    This helps reduce line length, since phandles are generally longer and may
    have arguments.
    
    Signed-off-by: Simon Glass <sjg@chromium.org>

diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py
index 0234f71b76..c0a3ae692b 100644
--- a/tools/dtoc/dtb_platdata.py
+++ b/tools/dtoc/dtb_platdata.py
@@ -468,15 +468,17 @@ class DtbPlatdata(object):
                         target_node = self._fdt.phandle_to_node[phandle]
                         name = conv_name_to_c(target_node.name)
                         vals.append('{&%s%s, %d}' % (VAL_PREFIX, name, id_num))
+                    for val in vals:
+                        self.buf('\n\t\t%s,' % val)
                 else:
                     for val in prop.value:
                         vals.append(get_value(prop.type, val))
 
-                # Put 8 values per line to avoid very long lines.
-                for i in xrange(0, len(vals), 8):
-                    if i:
-                        self.buf(',\n\t\t')
-                    self.buf(', '.join(vals[i:i + 8]))
+                    # Put 8 values per line to avoid very long lines.
+                    for i in xrange(0, len(vals), 8):
+                        if i:
+                            self.buf(',\n\t\t')
+                        self.buf(', '.join(vals[i:i + 8]))
                 self.buf('}')
             else:
                 self.buf(get_value(prop.type, prop.value))
diff --git a/tools/dtoc/test_dtoc.py b/tools/dtoc/test_dtoc.py
index 23c4439ed9..aa617a649c 100644
--- a/tools/dtoc/test_dtoc.py
+++ b/tools/dtoc/test_dtoc.py
@@ -252,7 +252,8 @@ U_BOOT_DEVICE(phandle_target) = {
 };
 
 static struct dtd_source dtv_phandle_source = {
-\t.clocks\t\t\t= {{&dtv_phandle_target, 1}},
+\t.clocks\t\t\t= {
+\t\t{&dtv_phandle_target, 1},},
 };
 U_BOOT_DEVICE(phandle_source) = {
 \t.name\t\t= "source",

commit 3a40acd42e66522b944d6f1a6aa3297771c9fa65
Author: Simon Glass <sjg@chromium.org>
Date:   Tue Aug 29 14:15:56 2017 -0600

    dtoc: Rename the phandle struct
    
    Rather than naming the phandle struct according to the number of cells it
    uses (e.g. struct phandle_2_cell) name it according to the number of
    arguments it has (e.g. struct phandle_1_arg). This is a more intuitive
    naming.
    
    Signed-off-by: Simon Glass <sjg@chromium.org>

diff --git a/doc/driver-model/of-plat.txt b/doc/driver-model/of-plat.txt
index 3ed8c759d6..732bc34f06 100644
--- a/doc/driver-model/of-plat.txt
+++ b/doc/driver-model/of-plat.txt
@@ -111,7 +111,7 @@ struct dtd_rockchip_rk3288_dw_mshc {
         bool            cap_sd_highspeed;
         fdt32_t         card_detect_delay;
         fdt32_t         clock_freq_min_max[2];
-        struct phandle_2_cell clocks[4];
+        struct phandle_1_arg clocks[4];
         bool            disable_wp;
         fdt32_t         fifo_depth;
         fdt32_t         interrupts[3];
diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index 4f9895b523..2584b7ea34 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -23,7 +23,7 @@ static inline struct clk_ops *clk_dev_ops(struct udevice *dev)
 #if CONFIG_IS_ENABLED(OF_CONTROL)
 # if CONFIG_IS_ENABLED(OF_PLATDATA)
 int clk_get_by_index_platdata(struct udevice *dev, int index,
-			      struct phandle_2_cell *cells, struct clk *clk)
+			      struct phandle_1_arg *cells, struct clk *clk)
 {
 	int ret;
 
diff --git a/include/clk.h b/include/clk.h
index 6769c3f8e8..13b157b59b 100644
--- a/include/clk.h
+++ b/include/clk.h
@@ -61,9 +61,9 @@ struct clk {
 };
 
 #if CONFIG_IS_ENABLED(OF_CONTROL) && CONFIG_IS_ENABLED(CLK)
-struct phandle_2_cell;
+struct phandle_1_arg;
 int clk_get_by_index_platdata(struct udevice *dev, int index,
-			      struct phandle_2_cell *cells, struct clk *clk);
+			      struct phandle_1_arg *cells, struct clk *clk);
 
 /**
  * clock_get_by_index - Get/request a clock by integer index.
diff --git a/include/dt-structs.h b/include/dt-structs.h
index 0732c442ff..2ed997115a 100644
--- a/include/dt-structs.h
+++ b/include/dt-structs.h
@@ -9,7 +9,12 @@
 
 /* These structures may only be used in SPL */
 #if CONFIG_IS_ENABLED(OF_PLATDATA)
-struct phandle_2_cell {
+struct phandle_0_arg {
+	const void *node;
+	int id[0];
+};
+
+struct phandle_1_arg {
 	const void *node;
 	int id;
 };
diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py
index 001bc4ea66..0234f71b76 100644
--- a/tools/dtoc/dtb_platdata.py
+++ b/tools/dtoc/dtb_platdata.py
@@ -419,7 +419,8 @@ class DtbPlatdata(object):
                 info = self.get_phandle_argc(prop, structs[name])
                 if info:
                     # For phandles, include a reference to the target
-                    self.out('\t%s%s[%d]' % (tab_to(2, 'struct phandle_2_cell'),
+                    struct_name = 'struct phandle_%d_arg' % info.max_args
+                    self.out('\t%s%s[%d]' % (tab_to(2, struct_name),
                                              conv_name_to_c(prop.name),
                                              len(prop.value) / 2))
                 else:
diff --git a/tools/dtoc/test_dtoc.py b/tools/dtoc/test_dtoc.py
index 62460acb7c..23c4439ed9 100644
--- a/tools/dtoc/test_dtoc.py
+++ b/tools/dtoc/test_dtoc.py
@@ -228,7 +228,7 @@ U_BOOT_DEVICE(pmic_at_9) = {
         self.assertEqual('''#include <stdbool.h>
 #include <libfdt.h>
 struct dtd_source {
-\tstruct phandle_2_cell clocks[1];
+\tstruct phandle_1_arg clocks[1];
 };
 struct dtd_target {
 \tfdt32_t\t\tintval;

commit cb3f9bf4b3fefc5dc35aaef5596cf092993625f3
Author: Simon Glass <sjg@chromium.org>
Date:   Tue Aug 29 14:15:55 2017 -0600

    dtoc: Rename is_phandle() and adjust it to return more detail
    
    Update this function to return more detail about a property that contains
    phandles. This will allow (in a future commit) more accurate handling of
    these properties.
    
    Signed-off-by: Simon Glass <sjg@chromium.org>

diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py
index a483d6c875..001bc4ea66 100644
--- a/tools/dtoc/dtb_platdata.py
+++ b/tools/dtoc/dtb_platdata.py
@@ -12,6 +12,7 @@ This supports converting device tree data to C structures definitions and
 static data.
 """
 
+import collections
 import copy
 import sys
 
@@ -44,6 +45,14 @@ TYPE_NAMES = {
 STRUCT_PREFIX = 'dtd_'
 VAL_PREFIX = 'dtv_'
 
+# This holds information about a property which includes phandles.
+#
+# max_args: integer: Maximum number or arguments that any phandle uses (int).
+# args: Number of args for each phandle in the property. The total number of
+#     phandles is len(args). This is a list of integers.
+PhandleInfo = collections.namedtuple('PhandleInfo', ['max_args', 'args'])
+
+
 def conv_name_to_c(name):
     """Convert a device-tree name to a C identifier
 
@@ -181,20 +190,42 @@ class DtbPlatdata(object):
         self._lines = []
         return lines
 
-    def is_phandle(self, prop):
-	"""Check if a node contains phandles
+    def get_phandle_argc(self, prop, node_name):
+        """Check if a node contains phandles
 
-	We have no reliable way of detecting whether a node uses a phandle
-	or not. As an interim measure, use a list of known property names.
+        We have no reliable way of detecting whether a node uses a phandle
+        or not. As an interim measure, use a list of known property names.
 
-	Args:
-	    prop: Prop object to check
-	Return:
-	    True if the object value contains phandles, else False
-	"""
-	if prop.name in ['clocks']:
-	    return True
-	return False
+        Args:
+            prop: Prop object to check
+        Return:
+            Number of argument cells is this is a phandle, else None
+        """
+        if prop.name in ['clocks']:
+            val = prop.value
+            if not isinstance(val, list):
+                val = [val]
+            i = 0
+
+            max_args = 0
+            args = []
+            while i < len(val):
+                phandle = fdt_util.fdt32_to_cpu(val[i])
+                target = self._fdt.phandle_to_node.get(phandle)
+                if not target:
+                    raise ValueError("Cannot parse '%s' in node '%s'" %
+                                     (prop.name, node_name))
+                prop_name = '#clock-cells'
+                cells = target.props.get(prop_name)
+                if not cells:
+                    raise ValueError("Node '%s' has no '%s' property" %
+                            (target.name, prop_name))
+                num_args = fdt_util.fdt32_to_cpu(cells.value)
+                max_args = max(max_args, num_args)
+                args.append(num_args)
+                i += 1 + num_args
+            return PhandleInfo(max_args, args)
+        return None
 
     def scan_dtb(self):
         """Scan the device tree to obtain a tree of nodes and properties
@@ -358,14 +389,16 @@ class DtbPlatdata(object):
             for pname, prop in node.props.items():
                 if pname in PROP_IGNORE_LIST or pname[0] == '#':
                     continue
-                if isinstance(prop.value, list):
-                    if self.is_phandle(prop):
-                        # Process the list as pairs of (phandle, id)
-                        value_it = iter(prop.value)
-                        for phandle_cell, _ in zip(value_it, value_it):
-                            phandle = fdt_util.fdt32_to_cpu(phandle_cell)
-                            target_node = self._fdt.phandle_to_node[phandle]
-                            node.phandles.add(target_node)
+                info = self.get_phandle_argc(prop, node.name)
+                if info:
+                    if not isinstance(prop.value, list):
+                        prop.value = [prop.value]
+                    # Process the list as pairs of (phandle, id)
+                    value_it = iter(prop.value)
+                    for phandle_cell, _ in zip(value_it, value_it):
+                        phandle = fdt_util.fdt32_to_cpu(phandle_cell)
+                        target_node = self._fdt.phandle_to_node[phandle]
+                        node.phandles.add(target_node)
 
 
     def generate_structs(self, structs):
@@ -383,7 +416,8 @@ class DtbPlatdata(object):
             self.out('struct %s%s {\n' % (STRUCT_PREFIX, name))
             for pname in sorted(structs[name]):
                 prop = structs[name][pname]
-                if self.is_phandle(prop):
+                info = self.get_phandle_argc(prop, structs[name])
+                if info:
                     # For phandles, include a reference to the target
                     self.out('\t%s%s[%d]' % (tab_to(2, 'struct phandle_2_cell'),
                                              conv_name_to_c(prop.name),
@@ -423,7 +457,8 @@ class DtbPlatdata(object):
                 vals = []
                 # For phandles, output a reference to the platform data
                 # of the target node.
-                if self.is_phandle(prop):
+                info = self.get_phandle_argc(prop, node.name)
+                if info:
                     # Process the list as pairs of (phandle, id)
                     value_it = iter(prop.value)
                     for phandle_cell, id_cell in zip(value_it, value_it):
diff --git a/tools/dtoc/dtoc_test_phandle.dts b/tools/dtoc/dtoc_test_phandle.dts
index e9828a695b..c0a602f296 100644
--- a/tools/dtoc/dtoc_test_phandle.dts
+++ b/tools/dtoc/dtoc_test_phandle.dts
@@ -13,6 +13,7 @@
 		u-boot,dm-pre-reloc;
 		compatible = "target";
 		intval = <1>;
+                #clock-cells = <1>;
 	};
 
 	phandle-source {

commit 7088d44b5d696d7e8eae1d830214e70280163811
Author: Simon Glass <sjg@chromium.org>
Date:   Tue Aug 29 14:15:54 2017 -0600

    dtoc: Make is_phandle() a member function
    
    This function will need to have access to class members once we enhance it
    to support multiple phandle values. In preparation for that, move it into
    the class.
    
    Signed-off-by: Simon Glass <sjg@chromium.org>

diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py
index 705ab27c86..a483d6c875 100644
--- a/tools/dtoc/dtb_platdata.py
+++ b/tools/dtoc/dtb_platdata.py
@@ -116,21 +116,6 @@ def get_compat_name(node):
         compat, aliases = compat[0], compat[1:]
     return conv_name_to_c(compat), [conv_name_to_c(a) for a in aliases]
 
-def is_phandle(prop):
-    """Check if a node contains phandles
-
-    We have no reliable way of detecting whether a node uses a phandle
-    or not. As an interim measure, use a list of known property names.
-
-    Args:
-        prop: Prop object to check
-    Return:
-        True if the object value contains phandles, else False
-    """
-    if prop.name in ['clocks']:
-        return True
-    return False
-
 
 class DtbPlatdata(object):
     """Provide a means to convert device tree binary data to platform data
@@ -196,6 +181,21 @@ class DtbPlatdata(object):
         self._lines = []
         return lines
 
+    def is_phandle(self, prop):
+	"""Check if a node contains phandles
+
+	We have no reliable way of detecting whether a node uses a phandle
+	or not. As an interim measure, use a list of known property names.
+
+	Args:
+	    prop: Prop object to check
+	Return:
+	    True if the object value contains phandles, else False
+	"""
+	if prop.name in ['clocks']:
+	    return True
+	return False
+
     def scan_dtb(self):
         """Scan the device tree to obtain a tree of nodes and properties
 
@@ -359,7 +359,7 @@ class DtbPlatdata(object):
                 if pname in PROP_IGNORE_LIST or pname[0] == '#':
                     continue
                 if isinstance(prop.value, list):
-                    if is_phandle(prop):
+                    if self.is_phandle(prop):
                         # Process the list as pairs of (phandle, id)
                         value_it = iter(prop.value)
                         for phandle_cell, _ in zip(value_it, value_it):
@@ -383,7 +383,7 @@ class DtbPlatdata(object):
             self.out('struct %s%s {\n' % (STRUCT_PREFIX, name))
             for pname in sorted(structs[name]):
                 prop = structs[name][pname]
-                if is_phandle(prop):
+                if self.is_phandle(prop):
                     # For phandles, include a reference to the target
                     self.out('\t%s%s[%d]' % (tab_to(2, 'struct phandle_2_cell'),
                                              conv_name_to_c(prop.name),
@@ -423,7 +423,7 @@ class DtbPlatdata(object):
                 vals = []
                 # For phandles, output a reference to the platform data
                 # of the target node.
-                if is_phandle(prop):
+                if self.is_phandle(prop):
                     # Process the list as pairs of (phandle, id)
                     value_it = iter(prop.value)
                     for phandle_cell, id_cell in zip(value_it, value_it):

commit 0ac13c2142456e3f7d76ce54875ff7f62f4710cb
Author: Simon Glass <sjg@chromium.org>
Date:   Tue Aug 29 14:15:53 2017 -0600

    dtoc: Use the Fdt's class's phandle map
    
    Now that the Fdt class can map phandles to the associated nodes, use that
    instead of a separate implementation.
    
    Signed-off-by: Simon Glass <sjg@chromium.org>

diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py
index 0c719310b1..705ab27c86 100644
--- a/tools/dtoc/dtb_platdata.py
+++ b/tools/dtoc/dtb_platdata.py
@@ -144,17 +144,14 @@ class DtbPlatdata(object):
         _dtb_fname: Filename of the input device tree binary file
         _valid_nodes: A list of Node object with compatible strings
         _include_disabled: true to include nodes marked status = "disabled"
-        _phandle_nodes: A dict of nodes indexed by phandle number (1, 2...)
         _outfile: The current output file (sys.stdout or a real file)
         _lines: Stashed list of output lines for outputting in the future
-        _phandle_nodes: A dict of Nodes indexed by phandle (an integer)
     """
     def __init__(self, dtb_fname, include_disabled):
         self._fdt = None
         self._dtb_fname = dtb_fname
         self._valid_nodes = None
         self._include_disabled = include_disabled
-        self._phandle_nodes = {}
         self._outfile = None
         self._lines = []
         self._aliases = {}
@@ -210,8 +207,7 @@ class DtbPlatdata(object):
     def scan_node(self, root):
         """Scan a node and subnodes to build a tree of node and phandle info
 
-        This adds each node to self._valid_nodes and each phandle to
-        self._phandle_nodes.
+        This adds each node to self._valid_nodes.
 
         Args:
             root: Root node for scan
@@ -222,10 +218,6 @@ class DtbPlatdata(object):
                 if (not self._include_disabled and not status or
                         status.value != 'disabled'):
                     self._valid_nodes.append(node)
-                    phandle_prop = node.props.get('phandle')
-                    if phandle_prop:
-                        phandle = phandle_prop.GetPhandle()
-                        self._phandle_nodes[phandle] = node
 
             # recurse to handle any subnodes
             self.scan_node(node)
@@ -234,11 +226,9 @@ class DtbPlatdata(object):
         """Scan the device tree for useful information
 
         This fills in the following properties:
-            _phandle_nodes: A dict of Nodes indexed by phandle (an integer)
             _valid_nodes: A list of nodes we wish to consider include in the
                 platform data
         """
-        self._phandle_nodes = {}
         self._valid_nodes = []
         return self.scan_node(self._fdt.GetRoot())
 
@@ -374,7 +364,7 @@ class DtbPlatdata(object):
                         value_it = iter(prop.value)
                         for phandle_cell, _ in zip(value_it, value_it):
                             phandle = fdt_util.fdt32_to_cpu(phandle_cell)
-                            target_node = self._phandle_nodes[phandle]
+                            target_node = self._fdt.phandle_to_node[phandle]
                             node.phandles.add(target_node)
 
 
@@ -439,7 +429,7 @@ class DtbPlatdata(object):
                     for phandle_cell, id_cell in zip(value_it, value_it):
                         phandle = fdt_util.fdt32_to_cpu(phandle_cell)
                         id_num = fdt_util.fdt32_to_cpu(id_cell)
-                        target_node = self._phandle_nodes[phandle]
+                        target_node = self._fdt.phandle_to_node[phandle]
                         name = conv_name_to_c(target_node.name)
                         vals.append('{&%s%s, %d}' % (VAL_PREFIX, name, id_num))
                 else:

commit 5a30597af76537e0d23456af5cf53699741f73b5
Author: Simon Glass <sjg@chromium.org>
Date:   Tue Aug 29 14:15:52 2017 -0600

    dtoc: Update the Fdt class to record phandles
    
    Add a map from phandles to nodes. This can be used by clients of the the
    class instead of maintaining this themselves.
    
    Signed-off-by: Simon Glass <sjg@chromium.org>

diff --git a/tools/dtoc/fdt.py b/tools/dtoc/fdt.py
index ffd42ce541..dbc338653b 100644
--- a/tools/dtoc/fdt.py
+++ b/tools/dtoc/fdt.py
@@ -212,6 +212,10 @@ class Node:
         searching into subnodes so that the entire tree is built.
         """
         self.props = self._fdt.GetProps(self)
+        phandle = self.props.get('phandle')
+        if phandle:
+            val = fdt_util.fdt32_to_cpu(phandle.value)
+            self._fdt.phandle_to_node[val] = self
 
         offset = libfdt.fdt_first_subnode(self._fdt.GetFdt(), self.Offset())
         while offset >= 0:
@@ -263,6 +267,7 @@ class Fdt:
     def __init__(self, fname):
         self._fname = fname
         self._cached_offsets = False
+        self.phandle_to_node = {}
         if self._fname:
             self._fname = fdt_util.EnsureCompiled(self._fname)
 

commit 4b26144b09a8993114d42c90b318948efc9fadb9
Author: Simon Glass <sjg@chromium.org>
Date:   Tue Aug 29 14:15:51 2017 -0600

    dtoc: Handle 'reg' properties with unusual sizes
    
    At present dtoc assumes that all 'reg' properties have both an address and
    a size. For I2C devices we do not have this. Adjust dtoc to cope.
    
    Reported-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Simon Glass <sjg@chromium.org>

diff --git a/tools/dtoc/dtoc_test_simple.dts b/tools/dtoc/dtoc_test_simple.dts
index c736686263..6afe674b1f 100644
--- a/tools/dtoc/dtoc_test_simple.dts
+++ b/tools/dtoc/dtoc_test_simple.dts
@@ -9,6 +9,8 @@
  /dts-v1/;
 
 / {
+	#address-cells = <1>;
+	#size-cells = <1>;
 	spl-test {
 		u-boot,dm-pre-reloc;
 		compatible = "sandbox,spl-test";
@@ -45,4 +47,16 @@
 		compatible = "sandbox,spl-test.2";
 	};
 
+	i2c@0 {
+		compatible = "sandbox,i2c-test";
+		u-boot,dm-pre-reloc;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		pmic@9 {
+			compatible = "sandbox,pmic-test";
+			u-boot,dm-pre-reloc;
+			reg = <9>;
+			low-power;
+		};
+	};
 };
diff --git a/tools/dtoc/test_dtoc.py b/tools/dtoc/test_dtoc.py
index 09cfddaaaa..62460acb7c 100644
--- a/tools/dtoc/test_dtoc.py
+++ b/tools/dtoc/test_dtoc.py
@@ -121,6 +121,12 @@ class TestDtoc(unittest.TestCase):
             data = infile.read()
         self.assertEqual('''#include <stdbool.h>
 #include <libfdt.h>
+struct dtd_sandbox_i2c_test {
+};
+struct dtd_sandbox_pmic_test {
+\tbool\t\tlow_power;
+\tfdt64_t\t\treg[2];
+};
 struct dtd_sandbox_spl_test {
 \tbool\t\tboolval;
 \tunsigned char\tbytearray[3];
@@ -192,6 +198,24 @@ U_BOOT_DEVICE(spl_test4) = {
 \t.platdata_size\t= sizeof(dtv_spl_test4),
 };
 
+static struct dtd_sandbox_i2c_test dtv_i2c_at_0 = {
+};
+U_BOOT_DEVICE(i2c_at_0) = {
+\t.name\t\t= "sandbox_i2c_test",
+\t.platdata\t= &dtv_i2c_at_0,
+\t.platdata_size\t= sizeof(dtv_i2c_at_0),
+};
+
+static struct dtd_sandbox_pmic_test dtv_pmic_at_9 = {
+\t.low_power\t\t= true,
+\t.reg\t\t\t= {0x9, 0x0},
+};
+U_BOOT_DEVICE(pmic_at_9) = {
+\t.name\t\t= "sandbox_pmic_test",
+\t.platdata\t= &dtv_pmic_at_9,
+\t.platdata_size\t= sizeof(dtv_pmic_at_9),
+};
+
 ''', data)
 
     def test_phandle(self):

commit a28bfcc35587bf3d3f86eb49fb81c9570ddfcc4b
Author: Simon Glass <sjg@chromium.org>
Date:   Tue Aug 29 14:15:50 2017 -0600

    dtoc: Add support for 32 or 64-bit addresses
    
    When using 32-bit addresses dtoc works correctly. For 64-bit addresses it
    does not since it ignores the #address-cells and #size-cells properties.
    
    Update the tool to use fdt64_t as the element type for reg properties when
    either the address or size is larger than one cell. Use the correct value
    so that C code can obtain the information from the device tree easily.
    
    Alos create a new type, fdt_val_t, which is defined to either fdt32_t or
    fdt64_t depending on the word size of the machine. This type corresponds
    to fdt_addr_t and fdt_size_t. Unfortunately we cannot just use those types
    since they are defined to phys_addr_t and phys_size_t which use
    'unsigned long' in the 32-bit case, rather than 'unsigned int'.
    
    Add tests for the four combinations of address and size values (32/32,
    64/64, 32/64, 64/32). Also update existing uses for rk3399 and rk3368
    which now need to use the new fdt_val_t type.
    
    Signed-off-by: Simon Glass <sjg@chromium.org>
    
    Suggested-by: Heiko Stuebner <heiko@sntech.de>
    Reported-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c
index 2be1f572d7..0160d50c03 100644
--- a/drivers/clk/rockchip/clk_rk3368.c
+++ b/drivers/clk/rockchip/clk_rk3368.c
@@ -471,7 +471,7 @@ static int rk3368_clk_probe(struct udevice *dev)
 #if CONFIG_IS_ENABLED(OF_PLATDATA)
 	struct rk3368_clk_plat *plat = dev_get_platdata(dev);
 
-	priv->cru = map_sysmem(plat->dtd.reg[1], plat->dtd.reg[3]);
+	priv->cru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);
 #endif
 #if IS_ENABLED(CONFIG_SPL_BUILD) || IS_ENABLED(CONFIG_TPL_BUILD)
 	rkclk_init(priv->cru);
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 3edafea140..7232806724 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -963,7 +963,7 @@ static int rk3399_clk_probe(struct udevice *dev)
 #if CONFIG_IS_ENABLED(OF_PLATDATA)
 	struct rk3399_clk_plat *plat = dev_get_platdata(dev);
 
-	priv->cru = map_sysmem(plat->dtd.reg[1], plat->dtd.reg[3]);
+	priv->cru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);
 #endif
 	rkclk_init(priv->cru);
 #endif
@@ -1145,7 +1145,7 @@ static int rk3399_pmuclk_probe(struct udevice *dev)
 #if CONFIG_IS_ENABLED(OF_PLATDATA)
 	struct rk3399_pmuclk_plat *plat = dev_get_platdata(dev);
 
-	priv->pmucru = map_sysmem(plat->dtd.reg[1], plat->dtd.reg[3]);
+	priv->pmucru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);
 #endif
 
 #ifndef CONFIG_SPL_BUILD
diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c
index d4e16a27ef..0f1d30820c 100644
--- a/drivers/core/regmap.c
+++ b/drivers/core/regmap.c
@@ -40,7 +40,7 @@ static struct regmap *regmap_alloc_count(int count)
 }
 
 #if CONFIG_IS_ENABLED(OF_PLATDATA)
-int regmap_init_mem_platdata(struct udevice *dev, u32 *reg, int count,
+int regmap_init_mem_platdata(struct udevice *dev, fdt_val_t *reg, int count,
 			     struct regmap **mapp)
 {
 	struct regmap_range *range;
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 4a0947c626..1ba02be8e1 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -27,10 +27,12 @@ typedef phys_size_t fdt_size_t;
 #define FDT_ADDR_T_NONE (-1ULL)
 #define fdt_addr_to_cpu(reg) be64_to_cpu(reg)
 #define fdt_size_to_cpu(reg) be64_to_cpu(reg)
+typedef fdt64_t fdt_val_t;
 #else
 #define FDT_ADDR_T_NONE (-1U)
 #define fdt_addr_to_cpu(reg) be32_to_cpu(reg)
 #define fdt_size_to_cpu(reg) be32_to_cpu(reg)
+typedef fdt32_t fdt_val_t;
 #endif
 
 /* Information obtained about memory from the FDT */
diff --git a/include/regmap.h b/include/regmap.h
index 1eed94e47a..493a5d8eff 100644
--- a/include/regmap.h
+++ b/include/regmap.h
@@ -69,7 +69,7 @@ int regmap_init_mem(struct udevice *dev, struct regmap **mapp);
  * @count:	Number of pairs (e.g. 1 if the regmap has a single entry)
  * @mapp:	Returns allocated map
  */
-int regmap_init_mem_platdata(struct udevice *dev, u32 *reg, int count,
+int regmap_init_mem_platdata(struct udevice *dev, fdt_val_t *reg, int count,
 			     struct regmap **mapp);
 
 /**
diff --git a/include/syscon.h b/include/syscon.h
index 34842aa470..5d52b1cc3c 100644
--- a/include/syscon.h
+++ b/include/syscon.h
@@ -8,6 +8,8 @@
 #ifndef __SYSCON_H
 #define __SYSCON_H
 
+#include <fdtdec.h>
+
 /**
  * struct syscon_uc_info - Information stored by the syscon UCLASS_UCLASS
  *
@@ -28,9 +30,11 @@ struct syscon_ops {
  * We don't support 64-bit machines. If they are so resource-contrained that
  * they need to use OF_PLATDATA, something is horribly wrong with the
  * education of our hardware engineers.
+ *
+ * Update: 64-bit is now supported and we have an education crisis.
  */
 struct syscon_base_platdata {
-	u32 reg[2];
+	fdt_val_t reg[2];
 };
 #endif
 
diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py
index 3243bccfe8..0c719310b1 100644
--- a/tools/dtoc/dtb_platdata.py
+++ b/tools/dtoc/dtb_platdata.py
@@ -242,6 +242,66 @@ class DtbPlatdata(object):
         self._valid_nodes = []
         return self.scan_node(self._fdt.GetRoot())
 
+    @staticmethod
+    def get_num_cells(node):
+        """Get the number of cells in addresses and sizes for this node
+
+        Args:
+            node: Node to check
+
+        Returns:
+            Tuple:
+                Number of address cells for this node
+                Number of size cells for this node
+        """
+        parent = node.parent
+        na, ns = 2, 2
+        if parent:
+            na_prop = parent.props.get('#address-cells')
+            ns_prop = parent.props.get('#size-cells')
+            if na_prop:
+                na = fdt_util.fdt32_to_cpu(na_prop.value)
+            if ns_prop:
+                ns = fdt_util.fdt32_to_cpu(ns_prop.value)
+        return na, ns
+
+    def scan_reg_sizes(self):
+        """Scan for 64-bit 'reg' properties and update the values
+
+        This finds 'reg' properties with 64-bit data and converts the value to
+        an array of 64-values. This allows it to be output in a way that the
+        C code can read.
+        """
+        for node in self._valid_nodes:
+            reg = node.props.get('reg')
+            if not reg:
+                continue
+            na, ns = self.get_num_cells(node)
+            total = na + ns
+
+            if reg.type != fdt.TYPE_INT:
+                raise ValueError("Node '%s' reg property is not an int")
+            if len(reg.value) % total:
+                raise ValueError("Node '%s' reg property has %d cells "
+                        'which is not a multiple of na + ns = %d + %d)' %
+                        (node.name, len(reg.value), na, ns))
+            reg.na = na
+            reg.ns = ns
+            if na != 1 or ns != 1:
+                reg.type = fdt.TYPE_INT64
+                i = 0
+                new_value = []
+                val = reg.value
+                if not isinstance(val, list):
+                    val = [val]
+                while i < len(val):
+                    addr = fdt_util.fdt_cells_to_cpu(val[i:], reg.na)
+                    i += na
+                    size = fdt_util.fdt_cells_to_cpu(val[i:], reg.ns)
+                    i += ns
+                    new_value += [addr, size]
+                reg.value = new_value
+
     def scan_structs(self):
         """Scan the device tree building up the C structures we will use.
 
@@ -450,6 +510,7 @@ def run_steps(args, dtb_file, include_disabled, output):
     plat = DtbPlatdata(dtb_file, include_disabled)
     plat.scan_dtb()
     plat.scan_tree()
+    plat.scan_reg_sizes()
     plat.setup_output(output)
     structs = plat.scan_structs()
     plat.scan_phandles()
diff --git a/tools/dtoc/dtoc_test_addr32.dts b/tools/dtoc/dtoc_test_addr32.dts
new file mode 100644
index 0000000000..bcfdcae10b
--- /dev/null
+++ b/tools/dtoc/dtoc_test_addr32.dts
@@ -0,0 +1,27 @@
+/*
+ * Test device tree file for dtoc
+ *
+ * Copyright 2017 Google, Inc
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+ /dts-v1/;
+
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	test1 {
+		u-boot,dm-pre-reloc;
+		compatible = "test1";
+		reg = <0x1234 0x5678>;
+	};
+
+	test2 {
+		u-boot,dm-pre-reloc;
+		compatible = "test2";
+		reg = <0x12345678 0x98765432 2 3>;
+	};
+
+};
diff --git a/tools/dtoc/dtoc_test_addr32_64.dts b/tools/dtoc/dtoc_test_addr32_64.dts
new file mode 100644
index 0000000000..1c96243310
--- /dev/null
+++ b/tools/dtoc/dtoc_test_addr32_64.dts
@@ -0,0 +1,33 @@
+/*
+ * Test device tree file for dtoc
+ *
+ * Copyright 2017 Google, Inc
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+ /dts-v1/;
+
+/ {
+	#address-cells = <1>;
+	#size-cells = <2>;
+
+	test1 {
+		u-boot,dm-pre-reloc;
+		compatible = "test1";
+		reg = <0x1234 0x5678 0x0>;
+	};
+
+	test2 {
+		u-boot,dm-pre-reloc;
+		compatible = "test2";
+		reg = <0x12345678 0x98765432 0x10987654>;
+	};
+
+	test3 {
+		u-boot,dm-pre-reloc;
+		compatible = "test3";
+		reg = <0x12345678 0x98765432 0x10987654 2 0 3>;
+	};
+
+};
diff --git a/tools/dtoc/dtoc_test_addr64.dts b/tools/dtoc/dtoc_test_addr64.dts
new file mode 100644
index 0000000000..4c0ad0ec36
--- /dev/null
+++ b/tools/dtoc/dtoc_test_addr64.dts
@@ -0,0 +1,33 @@
+/*
+ * Test device tree file for dtoc
+ *
+ * Copyright 2017 Google, Inc
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+ /dts-v1/;
+
+/ {
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	test1 {
+		u-boot,dm-pre-reloc;
+		compatible = "test1";
+		reg = /bits/ 64 <0x1234 0x5678>;
+	};
+
+	test2 {
+		u-boot,dm-pre-reloc;
+		compatible = "test2";
+		reg = /bits/ 64 <0x1234567890123456 0x9876543210987654>;
+	};
+
+	test3 {
+		u-boot,dm-pre-reloc;
+		compatible = "test3";
+		reg = /bits/ 64 <0x1234567890123456 0x9876543210987654 2 3>;
+	};
+
+};
diff --git a/tools/dtoc/dtoc_test_addr64_32.dts b/tools/dtoc/dtoc_test_addr64_32.dts
new file mode 100644
index 0000000000..c36f6b726e
--- /dev/null
+++ b/tools/dtoc/dtoc_test_addr64_32.dts
@@ -0,0 +1,33 @@
+/*
+ * Test device tree file for dtoc
+ *
+ * Copyright 2017 Google, Inc
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+ /dts-v1/;
+
+/ {
+	#address-cells = <2>;
+	#size-cells = <1>;
+
+	test1 {
+		u-boot,dm-pre-reloc;
+		compatible = "test1";
+		reg = <0x1234 0x0 0x5678>;
+	};
+
+	test2 {
+		u-boot,dm-pre-reloc;
+		compatible = "test2";
+		reg = <0x12345678 0x90123456 0x98765432>;
+	};
+
+	test3 {
+		u-boot,dm-pre-reloc;
+		compatible = "test3";
+		reg = <0x12345678 0x90123456 0x98765432 0 2 3>;
+	};
+
+};
diff --git a/tools/dtoc/fdt_util.py b/tools/dtoc/fdt_util.py
index bec6ee947a..338d47a5e1 100644
--- a/tools/dtoc/fdt_util.py
+++ b/tools/dtoc/fdt_util.py
@@ -38,6 +38,8 @@ def fdt_cells_to_cpu(val, cells):
     Return:
         A native-endian long value
     """
+    if not cells:
+        return 0
     out = long(fdt32_to_cpu(val[0]))
     if cells == 2:
         out = out << 32 | fdt32_to_cpu(val[1])
diff --git a/tools/dtoc/test_dtoc.py b/tools/dtoc/test_dtoc.py
index 5040f23325..09cfddaaaa 100644
--- a/tools/dtoc/test_dtoc.py
+++ b/tools/dtoc/test_dtoc.py
@@ -270,4 +270,216 @@ U_BOOT_DEVICE(spl_test) = {
 \t.platdata_size\t= sizeof(dtv_spl_test),
 };
 
+''', data)
+
+    def test_addresses64(self):
+        """Test output from a node with a 'reg' property with na=2, ns=2"""
+        dtb_file = get_dtb_file('dtoc_test_addr64.dts')
+        output = tools.GetOutputFilename('output')
+        dtb_platdata.run_steps(['struct'], dtb_file, False, output)
+        with open(output) as infile:
+            data = infile.read()
+        self.assertEqual('''#include <stdbool.h>
+#include <libfdt.h>
+struct dtd_test1 {
+\tfdt64_t\t\treg[2];
+};
+struct dtd_test2 {
+\tfdt64_t\t\treg[2];
+};
+struct dtd_test3 {
+\tfdt64_t\t\treg[4];
+};
+''', data)
+
+        dtb_platdata.run_steps(['platdata'], dtb_file, False, output)
+        with open(output) as infile:
+            data = infile.read()
+        self.assertEqual('''#include <common.h>
+#include <dm.h>
+#include <dt-structs.h>
+
+static struct dtd_test1 dtv_test1 = {
+\t.reg\t\t\t= {0x1234, 0x5678},
+};
+U_BOOT_DEVICE(test1) = {
+\t.name\t\t= "test1",
+\t.platdata\t= &dtv_test1,
+\t.platdata_size\t= sizeof(dtv_test1),
+};
+
+static struct dtd_test2 dtv_test2 = {
+\t.reg\t\t\t= {0x1234567890123456, 0x9876543210987654},
+};
+U_BOOT_DEVICE(test2) = {
+\t.name\t\t= "test2",
+\t.platdata\t= &dtv_test2,
+\t.platdata_size\t= sizeof(dtv_test2),
+};
+
+static struct dtd_test3 dtv_test3 = {
+\t.reg\t\t\t= {0x1234567890123456, 0x9876543210987654, 0x2, 0x3},
+};
+U_BOOT_DEVICE(test3) = {
+\t.name\t\t= "test3",
+\t.platdata\t= &dtv_test3,
+\t.platdata_size\t= sizeof(dtv_test3),
+};
+
+''', data)
+
+    def test_addresses32(self):
+        """Test output from a node with a 'reg' property with na=1, ns=1"""
+        dtb_file = get_dtb_file('dtoc_test_addr32.dts')
+        output = tools.GetOutputFilename('output')
+        dtb_platdata.run_steps(['struct'], dtb_file, False, output)
+        with open(output) as infile:
+            data = infile.read()
+        self.assertEqual('''#include <stdbool.h>
+#include <libfdt.h>
+struct dtd_test1 {
+\tfdt32_t\t\treg[2];
+};
+struct dtd_test2 {
+\tfdt32_t\t\treg[4];
+};
+''', data)
+
+        dtb_platdata.run_steps(['platdata'], dtb_file, False, output)
+        with open(output) as infile:
+            data = infile.read()
+        self.assertEqual('''#include <common.h>
+#include <dm.h>
+#include <dt-structs.h>
+
+static struct dtd_test1 dtv_test1 = {
+\t.reg\t\t\t= {0x1234, 0x5678},
+};
+U_BOOT_DEVICE(test1) = {
+\t.name\t\t= "test1",
+\t.platdata\t= &dtv_test1,
+\t.platdata_size\t= sizeof(dtv_test1),
+};
+
+static struct dtd_test2 dtv_test2 = {
+\t.reg\t\t\t= {0x12345678, 0x98765432, 0x2, 0x3},
+};
+U_BOOT_DEVICE(test2) = {
+\t.name\t\t= "test2",
+\t.platdata\t= &dtv_test2,
+\t.platdata_size\t= sizeof(dtv_test2),
+};
+
+''', data)
+
+    def test_addresses64_32(self):
+        """Test output from a node with a 'reg' property with na=2, ns=1"""
+        dtb_file = get_dtb_file('dtoc_test_addr64_32.dts')
+        output = tools.GetOutputFilename('output')
+        dtb_platdata.run_steps(['struct'], dtb_file, False, output)
+        with open(output) as infile:
+            data = infile.read()
+        self.assertEqual('''#include <stdbool.h>
+#include <libfdt.h>
+struct dtd_test1 {
+\tfdt64_t\t\treg[2];
+};
+struct dtd_test2 {
+\tfdt64_t\t\treg[2];
+};
+struct dtd_test3 {
+\tfdt64_t\t\treg[4];
+};
+''', data)
+
+        dtb_platdata.run_steps(['platdata'], dtb_file, False, output)
+        with open(output) as infile:
+            data = infile.read()
+        self.assertEqual('''#include <common.h>
+#include <dm.h>
+#include <dt-structs.h>
+
+static struct dtd_test1 dtv_test1 = {
+\t.reg\t\t\t= {0x123400000000, 0x5678},
+};
+U_BOOT_DEVICE(test1) = {
+\t.name\t\t= "test1",
+\t.platdata\t= &dtv_test1,
+\t.platdata_size\t= sizeof(dtv_test1),
+};
+
+static struct dtd_test2 dtv_test2 = {
+\t.reg\t\t\t= {0x1234567890123456, 0x98765432},
+};
+U_BOOT_DEVICE(test2) = {
+\t.name\t\t= "test2",
+\t.platdata\t= &dtv_test2,
+\t.platdata_size\t= sizeof(dtv_test2),
+};
+
+static struct dtd_test3 dtv_test3 = {
+\t.reg\t\t\t= {0x1234567890123456, 0x98765432, 0x2, 0x3},
+};
+U_BOOT_DEVICE(test3) = {
+\t.name\t\t= "test3",
+\t.platdata\t= &dtv_test3,
+\t.platdata_size\t= sizeof(dtv_test3),
+};
+
+''', data)
+
+    def test_addresses32_64(self):
+        """Test output from a node with a 'reg' property with na=1, ns=2"""
+        dtb_file = get_dtb_file('dtoc_test_addr32_64.dts')
+        output = tools.GetOutputFilename('output')
+        dtb_platdata.run_steps(['struct'], dtb_file, False, output)
+        with open(output) as infile:
+            data = infile.read()
+        self.assertEqual('''#include <stdbool.h>
+#include <libfdt.h>
+struct dtd_test1 {
+\tfdt64_t\t\treg[2];
+};
+struct dtd_test2 {
+\tfdt64_t\t\treg[2];
+};
+struct dtd_test3 {
+\tfdt64_t\t\treg[4];
+};
+''', data)
+
+        dtb_platdata.run_steps(['platdata'], dtb_file, False, output)
+        with open(output) as infile:
+            data = infile.read()
+        self.assertEqual('''#include <common.h>
+#include <dm.h>
+#include <dt-structs.h>
+
+static struct dtd_test1 dtv_test1 = {
+\t.reg\t\t\t= {0x1234, 0x567800000000},
+};
+U_BOOT_DEVICE(test1) = {
+\t.name\t\t= "test1",
+\t.platdata\t= &dtv_test1,
+\t.platdata_size\t= sizeof(dtv_test1),
+};
+
+static struct dtd_test2 dtv_test2 = {
+\t.reg\t\t\t= {0x12345678, 0x9876543210987654},
+};
+U_BOOT_DEVICE(test2) = {
+\t.name\t\t= "test2",
+\t.platdata\t= &dtv_test2,
+\t.platdata_size\t= sizeof(dtv_test2),
+};
+
+static struct dtd_test3 dtv_test3 = {
+\t.reg\t\t\t= {0x12345678, 0x9876543210987654, 0x2, 0x3},
+};
+U_BOOT_DEVICE(test3) = {
+\t.name\t\t= "test3",
+\t.platdata\t= &dtv_test3,
+\t.platdata_size\t= sizeof(dtv_test3),
+};
+
 ''', data)

commit 12a972efaa3df3275d89be656f68daf89c9d80c5
Author: Simon Glass <sjg@chromium.org>
Date:   Tue Aug 29 14:15:49 2017 -0600

    dtoc: Avoid very long lines in output
    
    Large arrays can result in lines with hundreds or thousands of characters
    which is not very editor-friendly. To avoid this, addjust the tool to
    group values 8 per line.
    
    Signed-off-by: Simon Glass <sjg@chromium.org>

diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py
index 4a1162a9fa..3243bccfe8 100644
--- a/tools/dtoc/dtb_platdata.py
+++ b/tools/dtoc/dtb_platdata.py
@@ -385,7 +385,12 @@ class DtbPlatdata(object):
                 else:
                     for val in prop.value:
                         vals.append(get_value(prop.type, val))
-                self.buf(', '.join(vals))
+
+                # Put 8 values per line to avoid very long lines.
+                for i in xrange(0, len(vals), 8):
+                    if i:
+                        self.buf(',\n\t\t')
+                    self.buf(', '.join(vals[i:i + 8]))
                 self.buf('}')
             else:
                 self.buf(get_value(prop.type, prop.value))
diff --git a/tools/dtoc/test_dtoc.py b/tools/dtoc/test_dtoc.py
index 8b95c4124f..5040f23325 100644
--- a/tools/dtoc/test_dtoc.py
+++ b/tools/dtoc/test_dtoc.py
@@ -146,7 +146,8 @@ static struct dtd_sandbox_spl_test dtv_spl_test = {
 \t.bytearray\t\t= {0x6, 0x0, 0x0},
 \t.byteval\t\t= 0x5,
 \t.intval\t\t\t= 0x1,
-\t.longbytearray\t\t= {0x9, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf, 0x10, 0x11},
+\t.longbytearray\t\t= {0x9, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf, 0x10,
+\t\t0x11},
 \t.stringval\t\t= "message",
 \t.boolval\t\t= true,
 \t.intarray\t\t= {0x2, 0x3, 0x4, 0x0},
@@ -162,7 +163,8 @@ static struct dtd_sandbox_spl_test dtv_spl_test2 = {
 \t.bytearray\t\t= {0x1, 0x23, 0x34},
 \t.byteval\t\t= 0x8,
 \t.intval\t\t\t= 0x3,
-\t.longbytearray\t\t= {0x9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0},
+\t.longbytearray\t\t= {0x9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
+\t\t0x0},
 \t.stringval\t\t= "message2",
 \t.intarray\t\t= {0x5, 0x0, 0x0, 0x0},
 \t.stringarray\t\t= {"another", "multi-word", "message"},

commit ef2715f40346912f83d23e5012e37341373f4af8
Author: Simon Glass <sjg@chromium.org>
Date:   Tue Aug 29 14:15:48 2017 -0600

    dtoc: Add a 64-bit type and a way to convert cells into 64 bits
    
    When dealing with multi-cell values we need a type that can hold this
    value. Add this and a function to process it from a list of cell values.
    
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py
index 041a33188f..4a1162a9fa 100644
--- a/tools/dtoc/dtb_platdata.py
+++ b/tools/dtoc/dtb_platdata.py
@@ -38,6 +38,7 @@ TYPE_NAMES = {
     fdt.TYPE_BYTE: 'unsigned char',
     fdt.TYPE_STRING: 'const char *',
     fdt.TYPE_BOOL: 'bool',
+    fdt.TYPE_INT64: 'fdt64_t',
 }
 
 STRUCT_PREFIX = 'dtd_'
@@ -95,6 +96,8 @@ def get_value(ftype, value):
         return '"%s"' % value
     elif ftype == fdt.TYPE_BOOL:
         return 'true'
+    elif ftype == fdt.TYPE_INT64:
+        return '%#x' % value
 
 def get_compat_name(node):
     """Get a node's first compatible string as a C identifier
diff --git a/tools/dtoc/fdt.py b/tools/dtoc/fdt.py
index 49409a62ec..ffd42ce541 100644
--- a/tools/dtoc/fdt.py
+++ b/tools/dtoc/fdt.py
@@ -21,7 +21,7 @@ import libfdt
 # so it is fairly efficient.
 
 # A list of types we support
-(TYPE_BYTE, TYPE_INT, TYPE_STRING, TYPE_BOOL) = range(4)
+(TYPE_BYTE, TYPE_INT, TYPE_STRING, TYPE_BOOL, TYPE_INT64) = range(5)
 
 def CheckErr(errnum, msg):
     if errnum:
diff --git a/tools/dtoc/fdt_util.py b/tools/dtoc/fdt_util.py
index b9dfae8d0e..bec6ee947a 100644
--- a/tools/dtoc/fdt_util.py
+++ b/tools/dtoc/fdt_util.py
@@ -29,6 +29,20 @@ def fdt32_to_cpu(val):
         val = val.encode('raw_unicode_escape')
     return struct.unpack('>I', val)[0]
 
+def fdt_cells_to_cpu(val, cells):
+    """Convert one or two cells to a long integer
+
+    Args:
+        Value to convert (array of one or more 4-character strings)
+
+    Return:
+        A native-endian long value
+    """
+    out = long(fdt32_to_cpu(val[0]))
+    if cells == 2:
+        out = out << 32 | fdt32_to_cpu(val[1])
+    return out
+
 def EnsureCompiled(fname):
     """Compile an fdt .dts source file into a .dtb binary blob if needed.
 

commit f08a0424b9ff3c735665fce37050a81d43c290f0
Author: Simon Glass <sjg@chromium.org>
Date:   Tue Aug 29 14:15:47 2017 -0600

    dtoc: Adjust Node to record its parent
    
    We need to be able to search back up the tree for #address-cells and
     #size-cells. Record the parent of each node to make this easier.
    
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/tools/dtoc/fdt.py b/tools/dtoc/fdt.py
index 63a32ea2d7..49409a62ec 100644
--- a/tools/dtoc/fdt.py
+++ b/tools/dtoc/fdt.py
@@ -174,8 +174,9 @@ class Node:
         props: A dict of properties for this node, each a Prop object.
             Keyed by property name
     """
-    def __init__(self, fdt, offset, name, path):
+    def __init__(self, fdt, parent, offset, name, path):
         self._fdt = fdt
+        self.parent = parent
         self._offset = offset
         self.name = name
         self.path = path
@@ -217,7 +218,7 @@ class Node:
             sep = '' if self.path[-1] == '/' else '/'
             name = self._fdt._fdt_obj.get_name(offset)
             path = self.path + sep + name
-            node = Node(self._fdt, offset, name, path)
+            node = Node(self._fdt, self, offset, name, path)
             self.subnodes.append(node)
 
             node.Scan()
@@ -279,7 +280,7 @@ class Fdt:
 
         TODO(sjg@chromium.org): Implement the 'root' parameter
         """
-        self._root = self.Node(self, 0, '/', '/')
+        self._root = self.Node(self, None, 0, '/', '/')
         self._root.Scan()
 
     def GetRoot(self):
@@ -386,7 +387,7 @@ class Fdt:
         return libfdt.fdt_off_dt_struct(self._fdt) + offset
 
     @classmethod
-    def Node(self, fdt, offset, name, path):
+    def Node(self, fdt, parent, offset, name, path):
         """Create a new node
 
         This is used by Fdt.Scan() to create a new node using the correct
@@ -394,11 +395,12 @@ class Fdt:
 
         Args:
             fdt: Fdt object
+            parent: Parent node, or None if this is the root node
             offset: Offset of node
             name: Node name
             path: Full path to node
         """
-        node = Node(fdt, offset, name, path)
+        node = Node(fdt, parent, offset, name, path)
         return node
 
 def FdtScan(fname):

commit 1b0ab182b451476d8a7cca9536707930e6ab6b4d
Author: Simon Glass <sjg@chromium.org>
Date:   Tue Aug 29 14:15:46 2017 -0600

    fdt: Sync libfdt up to upstream
    
    Add upstream changes to U-Boot:
    
    - new pylibfdt functions
    - fdt_setprop_placeholder()
    
    Signed-off-by: Simon Glass <sjg@chromium.org>

diff --git a/lib/libfdt/fdt_rw.c b/lib/libfdt/fdt_rw.c
index 80a3212141..3dc775261f 100644
--- a/lib/libfdt/fdt_rw.c
+++ b/lib/libfdt/fdt_rw.c
@@ -228,8 +228,8 @@ int fdt_set_name(void *fdt, int nodeoffset, const char *name)
 	return 0;
 }
 
-int fdt_setprop(void *fdt, int nodeoffset, const char *name,
-		const void *val, int len)
+int fdt_setprop_placeholder(void *fdt, int nodeoffset, const char *name,
+			    int len, void **prop_data)
 {
 	struct fdt_property *prop;
 	int err;
@@ -242,8 +242,22 @@ int fdt_setprop(void *fdt, int nodeoffset, const char *name,
 	if (err)
 		return err;
 
+	*prop_data = prop->data;
+	return 0;
+}
+
+int fdt_setprop(void *fdt, int nodeoffset, const char *name,
+		const void *val, int len)
+{
+	void *prop_data;
+	int err;
+
+	err = fdt_setprop_placeholder(fdt, nodeoffset, name, len, &prop_data);
+	if (err)
+		return err;
+
 	if (len)
-		memcpy(prop->data, val, len);
+		memcpy(prop_data, val, len);
 	return 0;
 }
 
diff --git a/lib/libfdt/libfdt.h b/lib/libfdt/libfdt.h
index f3f9cad184..6af94cb3f7 100644
--- a/lib/libfdt/libfdt.h
+++ b/lib/libfdt/libfdt.h
@@ -1404,6 +1404,37 @@ int fdt_set_name(void *fdt, int nodeoffset, const char *name);
 int fdt_setprop(void *fdt, int nodeoffset, const char *name,
 		const void *val, int len);
 
+/**
+ * fdt_setprop _placeholder - allocate space for a property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ * @len: length of the property value
+ * @prop_data: return pointer to property data
+ *
+ * fdt_setprop_placeholer() allocates the named property in the given node.
+ * If the property exists it is resized. In either case a pointer to the
+ * property data is returned.
+ *
+ * This function may insert or delete data from the blob, and will
+ * therefore change the offsets of some existing nodes.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
+ *		contain the new property value
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+int fdt_setprop_placeholder(void *fdt, int nodeoffset, const char *name,
+			    int len, void **prop_data);
+
 /**
  * fdt_setprop_u32 - set a property to a 32-bit integer
  * @fdt: pointer to the device tree blob
diff --git a/lib/libfdt/pylibfdt/libfdt.i b/lib/libfdt/pylibfdt/libfdt.i
index 3b11bb0c95..6c44996c31 100644
--- a/lib/libfdt/pylibfdt/libfdt.i
+++ b/lib/libfdt/pylibfdt/libfdt.i
@@ -128,6 +128,23 @@ class Fdt:
         self._fdt = bytearray(data)
         check_err(fdt_check_header(self._fdt));
 
+    def subnode_offset(self, parentoffset, name, quiet=()):
+        """Get the offset of a named subnode
+
+        Args:
+            parentoffset: Offset of the parent node to check
+            name: Name of the required subnode, e.g. 'subnode@1'
+            quiet: Errors to ignore (empty to raise on all errors)
+
+        Returns:
+            The node offset of the found node, if any
+
+        Raises
+            FdtException if there is no node with that name, or other error
+        """
+        return check_err(fdt_subnode_offset(self._fdt, parentoffset, name),
+                         quiet)
+
     def path_offset(self, path, quiet=()):
         """Get the offset for a given path
 
@@ -302,6 +319,47 @@ class Fdt:
             return pdata
         return bytearray(pdata[0])
 
+    def get_phandle(self, nodeoffset):
+        """Get the phandle of a node
+
+        Args:
+            nodeoffset: Node offset to check
+
+        Returns:
+            phandle of node, or 0 if the node has no phandle or another error
+            occurs
+        """
+        return fdt_get_phandle(self._fdt, nodeoffset)
+
+    def parent_offset(self, nodeoffset, quiet=()):
+        """Get the offset of a node's parent
+
+        Args:
+            nodeoffset: Node offset to check
+            quiet: Errors to ignore (empty to raise on all errors)
+
+        Returns:
+            The offset of the parent node, if any
+
+        Raises:
+            FdtException if no parent found or other error occurs
+        """
+        return check_err(fdt_parent_offset(self._fdt, nodeoffset), quiet)
+
+    def node_offset_by_phandle(self, phandle, quiet=()):
+        """Get the offset of a node with the given phandle
+
+        Args:
+            phandle: Phandle to search for
+            quiet: Errors to ignore (empty to raise on all errors)
+
+        Returns:
+            The offset of node with that phandle, if any
+
+        Raises:
+            FdtException if no node found or other error occurs
+        """
+        return check_err(fdt_node_offset_by_phandle(self._fdt, phandle), quiet)
 
 class Property:
     """Holds a device tree property name and value.

commit 9946fd65b27597d65138f554c9b2a2c4e81cf6a0
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 6 17:53:56 2017 +0800

    rockchip: rk3328: move sdram driver to driver/ram
    
    Since we have CONFIG_RAM framwork and its driver folder, move the driver
    into it.
    
    Cover-letter:
    move rockchip sdram driver to driver/ram
    
    move all the Rockchip sdram driver which support CONFIG_RAM into
    driver/ram folder
    END
    Change-Id: I21aafa8c85ff65e3cb3f318cfeaefed059424c56
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3328/Makefile b/arch/arm/mach-rockchip/rk3328/Makefile
index 72873e29e6..bbab036a12 100644
--- a/arch/arm/mach-rockchip/rk3328/Makefile
+++ b/arch/arm/mach-rockchip/rk3328/Makefile
@@ -6,5 +6,4 @@
 
 obj-y += clk_rk3328.o
 obj-y += rk3328.o
-obj-y += sdram_rk3328.o
 obj-y += syscon_rk3328.o
diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index bc76a2077b..45b5fe7247 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -8,4 +8,5 @@ obj-$(CONFIG_ROCKCHIP_RK3368) = dmc-rk3368.o
 obj-$(CONFIG_ROCKCHIP_RK3188) = sdram_rk3188.o
 obj-$(CONFIG_ROCKCHIP_RK322X) = sdram_rk322x.o
 obj-$(CONFIG_ROCKCHIP_RK3288) = sdram_rk3288.o
+obj-$(CONFIG_ROCKCHIP_RK3328) = sdram_rk3328.o
 obj-$(CONFIG_ROCKCHIP_RK3399) = sdram_rk3399.o
diff --git a/arch/arm/mach-rockchip/rk3328/sdram_rk3328.c b/drivers/ram/rockchip/sdram_rk3328.c
similarity index 100%
rename from arch/arm/mach-rockchip/rk3328/sdram_rk3328.c
rename to drivers/ram/rockchip/sdram_rk3328.c

commit a75d2fbe75e094b9f878d4208341ccc5cd12766f
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 6 17:52:08 2017 +0800

    rockchip: rk3288: move sdram driver to driver/ram
    
    Since we have CONFIG_RAM framwork and its driver folder, move the driver
    into it.
    
    Change-Id: I8196b81c7a05d2c041e7d1c7cdd38321b0dc38b8
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3288/Makefile b/arch/arm/mach-rockchip/rk3288/Makefile
index b5b28efbe8..a0033a0d84 100644
--- a/arch/arm/mach-rockchip/rk3288/Makefile
+++ b/arch/arm/mach-rockchip/rk3288/Makefile
@@ -6,5 +6,4 @@
 
 obj-y += clk_rk3288.o
 obj-y += rk3288.o
-obj-y += sdram_rk3288.o
 obj-y += syscon_rk3288.o
diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index 355384987e..bc76a2077b 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -7,4 +7,5 @@
 obj-$(CONFIG_ROCKCHIP_RK3368) = dmc-rk3368.o
 obj-$(CONFIG_ROCKCHIP_RK3188) = sdram_rk3188.o
 obj-$(CONFIG_ROCKCHIP_RK322X) = sdram_rk322x.o
+obj-$(CONFIG_ROCKCHIP_RK3288) = sdram_rk3288.o
 obj-$(CONFIG_ROCKCHIP_RK3399) = sdram_rk3399.o
diff --git a/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c b/drivers/ram/rockchip/sdram_rk3288.c
similarity index 100%
rename from arch/arm/mach-rockchip/rk3288/sdram_rk3288.c
rename to drivers/ram/rockchip/sdram_rk3288.c

commit 44af99509b810bb514be720a7632cad414135ae3
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 6 17:48:53 2017 +0800

    rockchip: rk3188: move sdram driver to driver/ram
    
    Since we have CONFIG_RAM framwork and its driver folder, move the driver
    into it.
    
    Change-Id: Icd3308c253646171d29a1a2295f528f95c623202
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3188/Makefile b/arch/arm/mach-rockchip/rk3188/Makefile
index 2dc9511de7..7fa010405b 100644
--- a/arch/arm/mach-rockchip/rk3188/Makefile
+++ b/arch/arm/mach-rockchip/rk3188/Makefile
@@ -6,6 +6,5 @@
 
 ifndef CONFIG_TPL_BUILD
 obj-y += clk_rk3188.o
-obj-y += sdram_rk3188.o
 obj-y += syscon_rk3188.o
 endif
diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index 52cc809379..355384987e 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -5,5 +5,6 @@
 #
 
 obj-$(CONFIG_ROCKCHIP_RK3368) = dmc-rk3368.o
+obj-$(CONFIG_ROCKCHIP_RK3188) = sdram_rk3188.o
 obj-$(CONFIG_ROCKCHIP_RK322X) = sdram_rk322x.o
 obj-$(CONFIG_ROCKCHIP_RK3399) = sdram_rk3399.o
diff --git a/arch/arm/mach-rockchip/rk3188/sdram_rk3188.c b/drivers/ram/rockchip/sdram_rk3188.c
similarity index 100%
rename from arch/arm/mach-rockchip/rk3188/sdram_rk3188.c
rename to drivers/ram/rockchip/sdram_rk3188.c

commit d0b1becdab1c3db806870f24f282b9b4063bf5e4
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 6 17:44:12 2017 +0800

    rockchip: rk3399: move sdram driver to driver/ram
    
    Since we have CONFIG_RAM framwork and its driver folder, move the driver
    into it.
    
    Change-Id: I53f9de99b2b1180b74cca948847105be66d540f2
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3399/Makefile b/arch/arm/mach-rockchip/rk3399/Makefile
index 793ce31c12..98ebeac340 100644
--- a/arch/arm/mach-rockchip/rk3399/Makefile
+++ b/arch/arm/mach-rockchip/rk3399/Makefile
@@ -6,5 +6,4 @@
 
 obj-y += clk_rk3399.o
 obj-y += rk3399.o
-obj-y += sdram_rk3399.o
 obj-y += syscon_rk3399.o
diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index 06ab2fd6a4..52cc809379 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -6,3 +6,4 @@
 
 obj-$(CONFIG_ROCKCHIP_RK3368) = dmc-rk3368.o
 obj-$(CONFIG_ROCKCHIP_RK322X) = sdram_rk322x.o
+obj-$(CONFIG_ROCKCHIP_RK3399) = sdram_rk3399.o
diff --git a/arch/arm/mach-rockchip/rk3399/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c
similarity index 100%
rename from arch/arm/mach-rockchip/rk3399/sdram_rk3399.c
rename to drivers/ram/rockchip/sdram_rk3399.c

commit 26b9591560b21019004b3b997a83fd50daddb0b4
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Jul 21 18:00:36 2017 +0800

    rockchip: dts: rk3229: remove dram channel info
    
    The dram channel info will be auto detect by the driver,
    we do not need it.
    
    Cover-letter:
    rockchip: rk3229: add sdram and sd support
    
    Add sdram driver for rk3229 and other fix like pinctrl and sd node.
    
    END
    Change-Id: I4cb96150fe3cf68278b9c1cb6585e1bf3d4df4b1
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3229-evb.dts b/arch/arm/dts/rk3229-evb.dts
index e66d6bf5fd..fe4abe9d6c 100644
--- a/arch/arm/dts/rk3229-evb.dts
+++ b/arch/arm/dts/rk3229-evb.dts
@@ -40,7 +40,6 @@
 };
 
 &dmc {
-	rockchip,sdram-channel = /bits/ 8 <1 10 3 2 1 0 15 15>;
 	rockchip,pctl-timing = <0x96 0xC8 0x1F3 0xF 0x8000004D 0x4 0x4E 0x6 0x3
 		0x0 0x6 0x5 0xC 0x10 0x6 0x4 0x4
 		0x5 0x4 0x200 0x3 0xA 0x40 0x0 0x1

commit 64da4a852bda5ac711b9c9bbdd89691ff87ff1ba
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Jun 9 17:33:41 2017 +0800

    rockchip: rk322x: add sdram driver
    
    Add driver for rk322x to support sdram initialize in SPL.
    
    Series-version: 3
    Series-changes: 3
    - move rk332x sdram driver to driver/ram
    - do the ram init in TPL instad of SPL
    
    Change-Id: I44f5fed275d65e7758efd38f1a5124a8d9698a7d
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rk322x.h b/arch/arm/include/asm/arch-rockchip/sdram_rk322x.h
new file mode 100644
index 0000000000..b10de76411
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/sdram_rk322x.h
@@ -0,0 +1,581 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#ifndef _ASM_ARCH_SDRAM_RK322X_H
+#define _ASM_ARCH_SDRAM_RK322X_H
+
+#include <common.h>
+
+enum {
+	DDR3		= 3,
+	LPDDR2		= 5,
+	LPDDR3		= 6,
+	UNUSED		= 0xFF,
+};
+
+struct rk322x_sdram_channel {
+	/*
+	 * bit width in address, eg:
+	 * 8 banks using 3 bit to address,
+	 * 2 cs using 1 bit to address.
+	 */
+	u8 rank;
+	u8 col;
+	u8 bk;
+	u8 bw;
+	u8 dbw;
+	u8 row_3_4;
+	u8 cs0_row;
+	u8 cs1_row;
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+	/*
+	 * For of-platdata, which would otherwise convert this into two
+	 * byte-swapped integers. With a size of 9 bytes, this struct will
+	 * appear in of-platdata as a byte array.
+	 *
+	 * If OF_PLATDATA enabled, need to add a dummy byte in dts.(i.e 0xff)
+	 */
+	u8 dummy;
+#endif
+};
+
+struct rk322x_ddr_pctl {
+	u32 scfg;
+	u32 sctl;
+	u32 stat;
+	u32 intrstat;
+	u32 reserved0[(0x40 - 0x10) / 4];
+	u32 mcmd;
+	u32 powctl;
+	u32 powstat;
+	u32 cmdtstat;
+	u32 cmdtstaten;
+	u32 reserved1[(0x60 - 0x54) / 4];
+	u32 mrrcfg0;
+	u32 mrrstat0;
+	u32 mrrstat1;
+	u32 reserved2[(0x7c - 0x6c) / 4];
+
+	u32 mcfg1;
+	u32 mcfg;
+	u32 ppcfg;
+	u32 mstat;
+	u32 lpddr2zqcfg;
+	u32 reserved3;
+
+	u32 dtupdes;
+	u32 dtuna;
+	u32 dtune;
+	u32 dtuprd0;
+	u32 dtuprd1;
+	u32 dtuprd2;
+	u32 dtuprd3;
+	u32 dtuawdt;
+	u32 reserved4[(0xc0 - 0xb4) / 4];
+
+	u32 togcnt1u;
+	u32 tinit;
+	u32 trsth;
+	u32 togcnt100n;
+	u32 trefi;
+	u32 tmrd;
+	u32 trfc;
+	u32 trp;
+	u32 trtw;
+	u32 tal;
+	u32 tcl;
+	u32 tcwl;
+	u32 tras;
+	u32 trc;
+	u32 trcd;
+	u32 trrd;
+	u32 trtp;
+	u32 twr;
+	u32 twtr;
+	u32 texsr;
+	u32 txp;
+	u32 txpdll;
+	u32 tzqcs;
+	u32 tzqcsi;
+	u32 tdqs;
+	u32 tcksre;
+	u32 tcksrx;
+	u32 tcke;
+	u32 tmod;
+	u32 trstl;
+	u32 tzqcl;
+	u32 tmrr;
+	u32 tckesr;
+	u32 tdpd;
+	u32 tref_mem_ddr3;
+	u32 reserved5[(0x180 - 0x14c) / 4];
+	u32 ecccfg;
+	u32 ecctst;
+	u32 eccclr;
+	u32 ecclog;
+	u32 reserved6[(0x200 - 0x190) / 4];
+	u32 dtuwactl;
+	u32 dturactl;
+	u32 dtucfg;
+	u32 dtuectl;
+	u32 dtuwd0;
+	u32 dtuwd1;
+	u32 dtuwd2;
+	u32 dtuwd3;
+	u32 dtuwdm;
+	u32 dturd0;
+	u32 dturd1;
+	u32 dturd2;
+	u32 dturd3;
+	u32 dtulfsrwd;
+	u32 dtulfsrrd;
+	u32 dtueaf;
+	/* dfi control registers */
+	u32 dfitctrldelay;
+	u32 dfiodtcfg;
+	u32 dfiodtcfg1;
+	u32 dfiodtrankmap;
+	/* dfi write data registers */
+	u32 dfitphywrdata;
+	u32 dfitphywrlat;
+	u32 reserved7[(0x260 - 0x258) / 4];
+	u32 dfitrddataen;
+	u32 dfitphyrdlat;
+	u32 reserved8[(0x270 - 0x268) / 4];
+	u32 dfitphyupdtype0;
+	u32 dfitphyupdtype1;
+	u32 dfitphyupdtype2;
+	u32 dfitphyupdtype3;
+	u32 dfitctrlupdmin;
+	u32 dfitctrlupdmax;
+	u32 dfitctrlupddly;
+	u32 reserved9;
+	u32 dfiupdcfg;
+	u32 dfitrefmski;
+	u32 dfitctrlupdi;
+	u32 reserved10[(0x2ac - 0x29c) / 4];
+	u32 dfitrcfg0;
+	u32 dfitrstat0;
+	u32 dfitrwrlvlen;
+	u32 dfitrrdlvlen;
+	u32 dfitrrdlvlgateen;
+	u32 dfiststat0;
+	u32 dfistcfg0;
+	u32 dfistcfg1;
+	u32 reserved11;
+	u32 dfitdramclken;
+	u32 dfitdramclkdis;
+	u32 dfistcfg2;
+	u32 dfistparclr;
+	u32 dfistparlog;
+	u32 reserved12[(0x2f0 - 0x2e4) / 4];
+
+	u32 dfilpcfg0;
+	u32 reserved13[(0x300 - 0x2f4) / 4];
+	u32 dfitrwrlvlresp0;
+	u32 dfitrwrlvlresp1;
+	u32 dfitrwrlvlresp2;
+	u32 dfitrrdlvlresp0;
+	u32 dfitrrdlvlresp1;
+	u32 dfitrrdlvlresp2;
+	u32 dfitrwrlvldelay0;
+	u32 dfitrwrlvldelay1;
+	u32 dfitrwrlvldelay2;
+	u32 dfitrrdlvldelay0;
+	u32 dfitrrdlvldelay1;
+	u32 dfitrrdlvldelay2;
+	u32 dfitrrdlvlgatedelay0;
+	u32 dfitrrdlvlgatedelay1;
+	u32 dfitrrdlvlgatedelay2;
+	u32 dfitrcmd;
+	u32 reserved14[(0x3f8 - 0x340) / 4];
+	u32 ipvr;
+	u32 iptr;
+};
+check_member(rk322x_ddr_pctl, iptr, 0x03fc);
+
+struct rk322x_ddr_phy {
+	u32 ddrphy_reg[0x100];
+};
+
+struct rk322x_pctl_timing {
+	u32 togcnt1u;
+	u32 tinit;
+	u32 trsth;
+	u32 togcnt100n;
+	u32 trefi;
+	u32 tmrd;
+	u32 trfc;
+	u32 trp;
+	u32 trtw;
+	u32 tal;
+	u32 tcl;
+	u32 tcwl;
+	u32 tras;
+	u32 trc;
+	u32 trcd;
+	u32 trrd;
+	u32 trtp;
+	u32 twr;
+	u32 twtr;
+	u32 texsr;
+	u32 txp;
+	u32 txpdll;
+	u32 tzqcs;
+	u32 tzqcsi;
+	u32 tdqs;
+	u32 tcksre;
+	u32 tcksrx;
+	u32 tcke;
+	u32 tmod;
+	u32 trstl;
+	u32 tzqcl;
+	u32 tmrr;
+	u32 tckesr;
+	u32 tdpd;
+	u32 trefi_mem_ddr3;
+};
+
+struct rk322x_phy_timing {
+	u32 mr[4];
+	u32 mr11;
+	u32 bl;
+	u32 cl_al;
+};
+
+struct rk322x_msch_timings {
+	u32 ddrtiming;
+	u32 ddrmode;
+	u32 readlatency;
+	u32 activate;
+	u32 devtodev;
+};
+
+struct rk322x_service_sys {
+	u32 id_coreid;
+	u32 id_revisionid;
+	u32 ddrconf;
+	u32 ddrtiming;
+	u32 ddrmode;
+	u32 readlatency;
+	u32 activate;
+	u32 devtodev;
+};
+
+struct rk322x_base_params {
+	struct rk322x_msch_timings noc_timing;
+	u32 ddrconfig;
+	u32 ddr_freq;
+	u32 dramtype;
+	/*
+	 * unused for rk322x
+	 */
+	u32 stride;
+	u32 odt;
+};
+
+/* PCT_DFISTCFG0 */
+#define DFI_INIT_START			(1 << 0)
+#define DFI_DATA_BYTE_DISABLE_EN	(1 << 2)
+
+/* PCT_DFISTCFG1 */
+#define DFI_DRAM_CLK_SR_EN		(1 << 0)
+#define DFI_DRAM_CLK_DPD_EN		(1 << 1)
+
+/* PCT_DFISTCFG2 */
+#define DFI_PARITY_INTR_EN		(1 << 0)
+#define DFI_PARITY_EN			(1 << 1)
+
+/* PCT_DFILPCFG0 */
+#define TLP_RESP_TIME_SHIFT		16
+#define LP_SR_EN			(1 << 8)
+#define LP_PD_EN			(1 << 0)
+
+/* PCT_DFITCTRLDELAY */
+#define TCTRL_DELAY_TIME_SHIFT		0
+
+/* PCT_DFITPHYWRDATA */
+#define TPHY_WRDATA_TIME_SHIFT		0
+
+/* PCT_DFITPHYRDLAT */
+#define TPHY_RDLAT_TIME_SHIFT		0
+
+/* PCT_DFITDRAMCLKDIS */
+#define TDRAM_CLK_DIS_TIME_SHIFT	0
+
+/* PCT_DFITDRAMCLKEN */
+#define TDRAM_CLK_EN_TIME_SHIFT		0
+
+/* PCTL_DFIODTCFG */
+#define RANK0_ODT_WRITE_SEL		(1 << 3)
+#define RANK1_ODT_WRITE_SEL		(1 << 11)
+
+/* PCTL_DFIODTCFG1 */
+#define ODT_LEN_BL8_W_SHIFT		16
+
+/* PUBL_ACDLLCR */
+#define ACDLLCR_DLLDIS			(1 << 31)
+#define ACDLLCR_DLLSRST			(1 << 30)
+
+/* PUBL_DXDLLCR */
+#define DXDLLCR_DLLDIS			(1 << 31)
+#define DXDLLCR_DLLSRST			(1 << 30)
+
+/* PUBL_DLLGCR */
+#define DLLGCR_SBIAS			(1 << 30)
+
+/* PUBL_DXGCR */
+#define DQSRTT				(1 << 9)
+#define DQRTT				(1 << 10)
+
+/* PIR */
+#define PIR_INIT			(1 << 0)
+#define PIR_DLLSRST			(1 << 1)
+#define PIR_DLLLOCK			(1 << 2)
+#define PIR_ZCAL			(1 << 3)
+#define PIR_ITMSRST			(1 << 4)
+#define PIR_DRAMRST			(1 << 5)
+#define PIR_DRAMINIT			(1 << 6)
+#define PIR_QSTRN			(1 << 7)
+#define PIR_RVTRN			(1 << 8)
+#define PIR_ICPC			(1 << 16)
+#define PIR_DLLBYP			(1 << 17)
+#define PIR_CTLDINIT			(1 << 18)
+#define PIR_CLRSR			(1 << 28)
+#define PIR_LOCKBYP			(1 << 29)
+#define PIR_ZCALBYP			(1 << 30)
+#define PIR_INITBYP			(1u << 31)
+
+/* PGCR */
+#define PGCR_DFTLMT_SHIFT		3
+#define PGCR_DFTCMP_SHIFT		2
+#define PGCR_DQSCFG_SHIFT		1
+#define PGCR_ITMDMD_SHIFT		0
+
+/* PGSR */
+#define PGSR_IDONE			(1 << 0)
+#define PGSR_DLDONE			(1 << 1)
+#define PGSR_ZCDONE			(1 << 2)
+#define PGSR_DIDONE			(1 << 3)
+#define PGSR_DTDONE			(1 << 4)
+#define PGSR_DTERR			(1 << 5)
+#define PGSR_DTIERR			(1 << 6)
+#define PGSR_DFTERR			(1 << 7)
+#define PGSR_RVERR			(1 << 8)
+#define PGSR_RVEIRR			(1 << 9)
+
+/* PTR0 */
+#define PRT_ITMSRST_SHIFT		18
+#define PRT_DLLLOCK_SHIFT		6
+#define PRT_DLLSRST_SHIFT		0
+
+/* PTR1 */
+#define PRT_DINIT0_SHIFT		0
+#define PRT_DINIT1_SHIFT		19
+
+/* PTR2 */
+#define PRT_DINIT2_SHIFT		0
+#define PRT_DINIT3_SHIFT		17
+
+/* DCR */
+#define DDRMD_LPDDR			0
+#define DDRMD_DDR			1
+#define DDRMD_DDR2			2
+#define DDRMD_DDR3			3
+#define DDRMD_LPDDR2_LPDDR3		4
+#define DDRMD_MASK			7
+#define DDRMD_SHIFT			0
+#define PDQ_MASK			7
+#define PDQ_SHIFT			4
+
+/* DXCCR */
+#define DQSNRES_MASK			0xf
+#define DQSNRES_SHIFT			8
+#define DQSRES_MASK			0xf
+#define DQSRES_SHIFT			4
+
+/* DTPR */
+#define TDQSCKMAX_SHIFT			27
+#define TDQSCKMAX_MASK			7
+#define TDQSCK_SHIFT			24
+#define TDQSCK_MASK			7
+
+/* DSGCR */
+#define DQSGX_SHIFT			5
+#define DQSGX_MASK			7
+#define DQSGE_SHIFT			8
+#define DQSGE_MASK			7
+
+/* SCTL */
+#define INIT_STATE			0
+#define CFG_STATE			1
+#define GO_STATE			2
+#define SLEEP_STATE			3
+#define WAKEUP_STATE			4
+
+/* STAT */
+#define LP_TRIG_SHIFT			4
+#define LP_TRIG_MASK			7
+#define PCTL_STAT_MASK			7
+#define INIT_MEM			0
+#define CONFIG				1
+#define CONFIG_REQ			2
+#define ACCESS				3
+#define ACCESS_REQ			4
+#define LOW_POWER			5
+#define LOW_POWER_ENTRY_REQ		6
+#define LOW_POWER_EXIT_REQ		7
+
+/* ZQCR*/
+#define PD_OUTPUT_SHIFT			0
+#define PU_OUTPUT_SHIFT			5
+#define PD_ONDIE_SHIFT			10
+#define PU_ONDIE_SHIFT			15
+#define ZDEN_SHIFT			28
+
+/* DDLGCR */
+#define SBIAS_BYPASS			(1 << 23)
+
+/* MCFG */
+#define MDDR_LPDDR2_CLK_STOP_IDLE_SHIFT	24
+#define PD_IDLE_SHIFT			8
+#define MDDR_EN				(2 << 22)
+#define LPDDR2_EN			(3 << 22)
+#define LPDDR3_EN			(1 << 22)
+#define DDR2_EN				(0 << 5)
+#define DDR3_EN				(1 << 5)
+#define LPDDR2_S2			(0 << 6)
+#define LPDDR2_S4			(1 << 6)
+#define MDDR_LPDDR2_BL_2		(0 << 20)
+#define MDDR_LPDDR2_BL_4		(1 << 20)
+#define MDDR_LPDDR2_BL_8		(2 << 20)
+#define MDDR_LPDDR2_BL_16		(3 << 20)
+#define DDR2_DDR3_BL_4			0
+#define DDR2_DDR3_BL_8			1
+#define TFAW_SHIFT			18
+#define PD_EXIT_SLOW			(0 << 17)
+#define PD_EXIT_FAST			(1 << 17)
+#define PD_TYPE_SHIFT			16
+#define BURSTLENGTH_SHIFT		20
+
+/* POWCTL */
+#define POWER_UP_START			(1 << 0)
+
+/* POWSTAT */
+#define POWER_UP_DONE			(1 << 0)
+
+/* MCMD */
+enum {
+	DESELECT_CMD			= 0,
+	PREA_CMD,
+	REF_CMD,
+	MRS_CMD,
+	ZQCS_CMD,
+	ZQCL_CMD,
+	RSTL_CMD,
+	MRR_CMD				= 8,
+	DPDE_CMD,
+};
+
+#define BANK_ADDR_MASK			7
+#define BANK_ADDR_SHIFT			17
+#define CMD_ADDR_MASK			0x1fff
+#define CMD_ADDR_SHIFT			4
+
+#define LPDDR23_MA_SHIFT		4
+#define LPDDR23_MA_MASK			0xff
+#define LPDDR23_OP_SHIFT		12
+#define LPDDR23_OP_MASK			0xff
+
+#define START_CMD			(1u << 31)
+
+/* DDRPHY REG */
+enum {
+	/* DDRPHY_REG0 */
+	SOFT_RESET_MASK				= 3,
+	SOFT_DERESET_ANALOG			= 1 << 2,
+	SOFT_DERESET_DIGITAL			= 1 << 3,
+	SOFT_RESET_SHIFT			= 2,
+
+	/* DDRPHY REG1 */
+	PHY_DDR3				= 0,
+	PHY_DDR2				= 1,
+	PHY_LPDDR3				= 2,
+	PHY_LPDDR2				= 3,
+
+	PHT_BL_8				= 1 << 2,
+	PHY_BL_4				= 0 << 2,
+
+	/* DDRPHY_REG2 */
+	MEMORY_SELECT_DDR3			= 0 << 0,
+	MEMORY_SELECT_LPDDR3			= 2 << 0,
+	MEMORY_SELECT_LPDDR2			= 3 << 0,
+	DQS_SQU_CAL_SEL_CS0_CS1			= 0 << 4,
+	DQS_SQU_CAL_SEL_CS1			= 1 << 4,
+	DQS_SQU_CAL_SEL_CS0			= 2 << 4,
+	DQS_SQU_CAL_NORMAL_MODE			= 0 << 1,
+	DQS_SQU_CAL_BYPASS_MODE			= 1 << 1,
+	DQS_SQU_CAL_START			= 1 << 0,
+	DQS_SQU_NO_CAL				= 0 << 0,
+};
+
+/* CK pull up/down driver strength control */
+enum {
+	PHY_RON_RTT_DISABLE = 0,
+	PHY_RON_RTT_451OHM = 1,
+	PHY_RON_RTT_225OHM,
+	PHY_RON_RTT_150OHM,
+	PHY_RON_RTT_112OHM,
+	PHY_RON_RTT_90OHM,
+	PHY_RON_RTT_75OHM,
+	PHY_RON_RTT_64OHM = 7,
+
+	PHY_RON_RTT_56OHM = 16,
+	PHY_RON_RTT_50OHM,
+	PHY_RON_RTT_45OHM,
+	PHY_RON_RTT_41OHM,
+	PHY_RON_RTT_37OHM,
+	PHY_RON_RTT_34OHM,
+	PHY_RON_RTT_33OHM,
+	PHY_RON_RTT_30OHM = 23,
+
+	PHY_RON_RTT_28OHM = 24,
+	PHY_RON_RTT_26OHM,
+	PHY_RON_RTT_25OHM,
+	PHY_RON_RTT_23OHM,
+	PHY_RON_RTT_22OHM,
+	PHY_RON_RTT_21OHM,
+	PHY_RON_RTT_20OHM,
+	PHY_RON_RTT_19OHM = 31,
+};
+
+/* DQS squelch DLL delay */
+enum {
+	DQS_DLL_NO_DELAY	= 0,
+	DQS_DLL_22P5_DELAY,
+	DQS_DLL_45_DELAY,
+	DQS_DLL_67P5_DELAY,
+	DQS_DLL_90_DELAY,
+	DQS_DLL_112P5_DELAY,
+	DQS_DLL_135_DELAY,
+	DQS_DLL_157P5_DELAY,
+};
+
+/* GRF_SOC_CON0 */
+#define GRF_DDR_16BIT_EN		(((0x1 << 0) << 16) | (0x1 << 0))
+#define GRF_DDR_32BIT_EN		(((0x1 << 0) << 16) | (0x0 << 0))
+#define GRF_MSCH_NOC_16BIT_EN		(((0x1 << 7) << 16) | (0x1 << 7))
+#define GRF_MSCH_NOC_32BIT_EN		(((0x1 << 7) << 16) | (0x0 << 7))
+
+#define GRF_DDRPHY_BUFFEREN_CORE_EN	(((0x1 << 8) << 16) | (0x0 << 8))
+#define GRF_DDRPHY_BUFFEREN_CORE_DIS	(((0x1 << 8) << 16) | (0x1 << 8))
+
+#define GRF_DDR3_EN			(((0x1 << 6) << 16) | (0x1 << 6))
+#define GRF_LPDDR2_3_EN			(((0x1 << 6) << 16) | (0x0 << 6))
+
+#define PHY_DRV_ODT_SET(n)		(((n) << 4) | (n))
+#define DDR3_DLL_RESET			(1 << 8)
+
+#endif /* _ASM_ARCH_SDRAM_RK322X_H */
diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index b09d03c2c9..06ab2fd6a4 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -5,3 +5,4 @@
 #
 
 obj-$(CONFIG_ROCKCHIP_RK3368) = dmc-rk3368.o
+obj-$(CONFIG_ROCKCHIP_RK322X) = sdram_rk322x.o
diff --git a/drivers/ram/rockchip/sdram_rk322x.c b/drivers/ram/rockchip/sdram_rk322x.c
new file mode 100644
index 0000000000..cc3138b21d
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_rk322x.c
@@ -0,0 +1,855 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0
+ */
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <dt-structs.h>
+#include <errno.h>
+#include <ram.h>
+#include <regmap.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk322x.h>
+#include <asm/arch/grf_rk322x.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/sdram_rk322x.h>
+#include <asm/arch/timer.h>
+#include <asm/arch/uart.h>
+#include <asm/arch/sdram_common.h>
+#include <asm/types.h>
+#include <linux/err.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+struct chan_info {
+	struct rk322x_ddr_pctl *pctl;
+	struct rk322x_ddr_phy *phy;
+	struct rk322x_service_sys *msch;
+};
+
+struct dram_info {
+	struct chan_info chan[1];
+	struct ram_info info;
+	struct clk ddr_clk;
+	struct rk322x_cru *cru;
+	struct rk322x_grf *grf;
+};
+
+struct rk322x_sdram_params {
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+		struct dtd_rockchip_rk3228_dmc of_plat;
+#endif
+		struct rk322x_sdram_channel ch[1];
+		struct rk322x_pctl_timing pctl_timing;
+		struct rk322x_phy_timing phy_timing;
+		struct rk322x_base_params base;
+		int num_channels;
+		struct regmap *map;
+};
+
+#ifdef CONFIG_TPL_BUILD
+/*
+ * [7:6]  bank(n:n bit bank)
+ * [5:4]  row(13+n)
+ * [3]    cs(0:1 cs, 1:2 cs)
+ * [2:1]  bank(n:n bit bank)
+ * [0]    col(10+n)
+ */
+const char ddr_cfg_2_rbc[] = {
+	((0 << 6) | (0 << 4) | (0 << 3) | (1 << 2) | 1),
+	((0 << 6) | (1 << 4) | (0 << 3) | (1 << 2) | 1),
+	((0 << 6) | (2 << 4) | (0 << 3) | (1 << 2) | 1),
+	((0 << 6) | (3 << 4) | (0 << 3) | (1 << 2) | 1),
+	((0 << 6) | (1 << 4) | (0 << 3) | (1 << 2) | 2),
+	((0 << 6) | (2 << 4) | (0 << 3) | (1 << 2) | 2),
+	((0 << 6) | (3 << 4) | (0 << 3) | (1 << 2) | 2),
+	((0 << 6) | (0 << 4) | (0 << 3) | (1 << 2) | 0),
+	((0 << 6) | (1 << 4) | (0 << 3) | (1 << 2) | 0),
+	((0 << 6) | (2 << 4) | (0 << 3) | (1 << 2) | 0),
+	((0 << 6) | (3 << 4) | (0 << 3) | (1 << 2) | 0),
+	((0 << 6) | (2 << 4) | (0 << 3) | (0 << 2) | 1),
+	((1 << 6) | (1 << 4) | (0 << 3) | (0 << 2) | 2),
+	((1 << 6) | (1 << 4) | (0 << 3) | (0 << 2) | 1),
+	((0 << 6) | (3 << 4) | (1 << 3) | (1 << 2) | 1),
+	((0 << 6) | (3 << 4) | (1 << 3) | (1 << 2) | 0),
+};
+
+static void copy_to_reg(u32 *dest, const u32 *src, u32 n)
+{
+	int i;
+
+	for (i = 0; i < n / sizeof(u32); i++) {
+		writel(*src, dest);
+		src++;
+		dest++;
+	}
+}
+
+void phy_pctrl_reset(struct rk322x_cru *cru,
+		     struct rk322x_ddr_phy *ddr_phy)
+{
+	rk_clrsetreg(&cru->cru_softrst_con[5], 1 << DDRCTRL_PSRST_SHIFT |
+			1 << DDRCTRL_SRST_SHIFT | 1 << DDRPHY_PSRST_SHIFT |
+			1 << DDRPHY_SRST_SHIFT,
+			1 << DDRCTRL_PSRST_SHIFT | 1 << DDRCTRL_SRST_SHIFT |
+			1 << DDRPHY_PSRST_SHIFT | 1 << DDRPHY_SRST_SHIFT);
+
+	rockchip_udelay(10);
+
+	rk_clrreg(&cru->cru_softrst_con[5], 1 << DDRPHY_PSRST_SHIFT |
+						  1 << DDRPHY_SRST_SHIFT);
+	rockchip_udelay(10);
+
+	rk_clrreg(&cru->cru_softrst_con[5], 1 << DDRCTRL_PSRST_SHIFT |
+						  1 << DDRCTRL_SRST_SHIFT);
+	rockchip_udelay(10);
+
+	clrbits_le32(&ddr_phy->ddrphy_reg[0],
+		     SOFT_RESET_MASK << SOFT_RESET_SHIFT);
+	rockchip_udelay(10);
+	setbits_le32(&ddr_phy->ddrphy_reg[0],
+		     SOFT_DERESET_ANALOG);
+	rockchip_udelay(5);
+	setbits_le32(&ddr_phy->ddrphy_reg[0],
+		     SOFT_DERESET_DIGITAL);
+
+	rockchip_udelay(1);
+}
+
+void phy_dll_bypass_set(struct rk322x_ddr_phy *ddr_phy, u32 freq)
+{
+	u32 tmp;
+
+	setbits_le32(&ddr_phy->ddrphy_reg[0x13], 0x10);
+	setbits_le32(&ddr_phy->ddrphy_reg[0x26], 0x10);
+	setbits_le32(&ddr_phy->ddrphy_reg[0x36], 0x10);
+	setbits_le32(&ddr_phy->ddrphy_reg[0x46], 0x10);
+	setbits_le32(&ddr_phy->ddrphy_reg[0x56], 0x10);
+
+	clrbits_le32(&ddr_phy->ddrphy_reg[0x14], 0x8);
+	clrbits_le32(&ddr_phy->ddrphy_reg[0x27], 0x8);
+	clrbits_le32(&ddr_phy->ddrphy_reg[0x37], 0x8);
+	clrbits_le32(&ddr_phy->ddrphy_reg[0x47], 0x8);
+	clrbits_le32(&ddr_phy->ddrphy_reg[0x57], 0x8);
+
+	if (freq <= 400)
+		setbits_le32(&ddr_phy->ddrphy_reg[0xa4], 0x1f);
+	else
+		clrbits_le32(&ddr_phy->ddrphy_reg[0xa4], 0x1f);
+
+	if (freq <= 680)
+		tmp = 3;
+	else
+		tmp = 2;
+
+	writel(tmp, &ddr_phy->ddrphy_reg[0x28]);
+	writel(tmp, &ddr_phy->ddrphy_reg[0x38]);
+	writel(tmp, &ddr_phy->ddrphy_reg[0x48]);
+	writel(tmp, &ddr_phy->ddrphy_reg[0x58]);
+}
+
+static void send_command(struct rk322x_ddr_pctl *pctl,
+			 u32 rank, u32 cmd, u32 arg)
+{
+	writel((START_CMD | (rank << 20) | arg | cmd), &pctl->mcmd);
+	rockchip_udelay(1);
+	while (readl(&pctl->mcmd) & START_CMD)
+		;
+}
+
+static void memory_init(struct chan_info *chan,
+			struct rk322x_sdram_params *sdram_params)
+{
+	struct rk322x_ddr_pctl *pctl = chan->pctl;
+	u32 dramtype = sdram_params->base.dramtype;
+
+	if (dramtype == DDR3) {
+		send_command(pctl, 3, DESELECT_CMD, 0);
+		rockchip_udelay(1);
+		send_command(pctl, 3, PREA_CMD, 0);
+		send_command(pctl, 3, MRS_CMD,
+			     (0x02 & BANK_ADDR_MASK) << BANK_ADDR_SHIFT |
+			     (sdram_params->phy_timing.mr[2] & CMD_ADDR_MASK) <<
+			     CMD_ADDR_SHIFT);
+
+		send_command(pctl, 3, MRS_CMD,
+			     (0x03 & BANK_ADDR_MASK) << BANK_ADDR_SHIFT |
+			     (sdram_params->phy_timing.mr[3] & CMD_ADDR_MASK) <<
+			     CMD_ADDR_SHIFT);
+
+		send_command(pctl, 3, MRS_CMD,
+			     (0x01 & BANK_ADDR_MASK) << BANK_ADDR_SHIFT |
+			     (sdram_params->phy_timing.mr[1] & CMD_ADDR_MASK) <<
+			     CMD_ADDR_SHIFT);
+
+		send_command(pctl, 3, MRS_CMD,
+			     (0x00 & BANK_ADDR_MASK) << BANK_ADDR_SHIFT |
+			     ((sdram_params->phy_timing.mr[0] |
+			       DDR3_DLL_RESET) &
+			     CMD_ADDR_MASK) << CMD_ADDR_SHIFT);
+
+		send_command(pctl, 3, ZQCL_CMD, 0);
+	} else {
+		send_command(pctl, 3, MRS_CMD,
+			     (0x63 & LPDDR23_MA_MASK) << LPDDR23_MA_SHIFT |
+			     (0 & LPDDR23_OP_MASK) <<
+			     LPDDR23_OP_SHIFT);
+		rockchip_udelay(10);
+		send_command(pctl, 3, MRS_CMD,
+			     (0x10 & LPDDR23_MA_MASK) << LPDDR23_MA_SHIFT |
+			     (0xff & LPDDR23_OP_MASK) <<
+			     LPDDR23_OP_SHIFT);
+		rockchip_udelay(1);
+		send_command(pctl, 3, MRS_CMD,
+			     (0x10 & LPDDR23_MA_MASK) << LPDDR23_MA_SHIFT |
+			     (0xff & LPDDR23_OP_MASK) <<
+			     LPDDR23_OP_SHIFT);
+		rockchip_udelay(1);
+		send_command(pctl, 3, MRS_CMD,
+			     (1 & LPDDR23_MA_MASK) << LPDDR23_MA_SHIFT |
+			     (sdram_params->phy_timing.mr[1] &
+			      LPDDR23_OP_MASK) << LPDDR23_OP_SHIFT);
+		send_command(pctl, 3, MRS_CMD,
+			     (2 & LPDDR23_MA_MASK) << LPDDR23_MA_SHIFT |
+			     (sdram_params->phy_timing.mr[2] &
+			      LPDDR23_OP_MASK) << LPDDR23_OP_SHIFT);
+		send_command(pctl, 3, MRS_CMD,
+			     (3 & LPDDR23_MA_MASK) << LPDDR23_MA_SHIFT |
+			     (sdram_params->phy_timing.mr[3] &
+			      LPDDR23_OP_MASK) << LPDDR23_OP_SHIFT);
+		if (dramtype == LPDDR3)
+			send_command(pctl, 3, MRS_CMD, (11 & LPDDR23_MA_MASK) <<
+				     LPDDR23_MA_SHIFT |
+				     (sdram_params->phy_timing.mr11 &
+				      LPDDR23_OP_MASK) << LPDDR23_OP_SHIFT);
+	}
+}
+
+static u32 data_training(struct chan_info *chan)
+{
+	struct rk322x_ddr_phy *ddr_phy = chan->phy;
+	struct rk322x_ddr_pctl *pctl = chan->pctl;
+	u32 value;
+	u32 bw = (readl(&ddr_phy->ddrphy_reg[0]) >> 4) & 0xf;
+	u32 ret;
+
+	/* disable auto refresh */
+	value = readl(&pctl->trefi) | (1 << 31);
+	writel(1 << 31, &pctl->trefi);
+
+	clrsetbits_le32(&ddr_phy->ddrphy_reg[2], 0x30,
+			DQS_SQU_CAL_SEL_CS0);
+	setbits_le32(&ddr_phy->ddrphy_reg[2], DQS_SQU_CAL_START);
+
+	rockchip_udelay(30);
+	ret = readl(&ddr_phy->ddrphy_reg[0xff]);
+
+	clrbits_le32(&ddr_phy->ddrphy_reg[2],
+		     DQS_SQU_CAL_START);
+
+	/*
+	 * since data training will take about 20us, so send some auto
+	 * refresh(about 7.8us) to complement the lost time
+	 */
+	send_command(pctl, 3, PREA_CMD, 0);
+	send_command(pctl, 3, REF_CMD, 0);
+
+	writel(value, &pctl->trefi);
+
+	if (ret & 0x10) {
+		ret = -1;
+	} else {
+		ret = (ret & 0xf) ^ bw;
+		ret = (ret == 0) ? 0 : -1;
+	}
+	return ret;
+}
+
+static void move_to_config_state(struct rk322x_ddr_pctl *pctl)
+{
+	unsigned int state;
+
+	while (1) {
+		state = readl(&pctl->stat) & PCTL_STAT_MASK;
+		switch (state) {
+		case LOW_POWER:
+			writel(WAKEUP_STATE, &pctl->sctl);
+			while ((readl(&pctl->stat) & PCTL_STAT_MASK)
+				!= ACCESS)
+				;
+			/*
+			 * If at low power state, need wakeup first, and then
+			 * enter the config, so fallthrough
+			 */
+		case ACCESS:
+			/* fallthrough */
+		case INIT_MEM:
+			writel(CFG_STATE, &pctl->sctl);
+			while ((readl(&pctl->stat) & PCTL_STAT_MASK) != CONFIG)
+				;
+			break;
+		case CONFIG:
+			return;
+		default:
+			break;
+		}
+	}
+}
+
+static void move_to_access_state(struct rk322x_ddr_pctl *pctl)
+{
+	unsigned int state;
+
+	while (1) {
+		state = readl(&pctl->stat) & PCTL_STAT_MASK;
+		switch (state) {
+		case LOW_POWER:
+			writel(WAKEUP_STATE, &pctl->sctl);
+			while ((readl(&pctl->stat) & PCTL_STAT_MASK) != ACCESS)
+				;
+			break;
+		case INIT_MEM:
+			writel(CFG_STATE, &pctl->sctl);
+			while ((readl(&pctl->stat) & PCTL_STAT_MASK) != CONFIG)
+				;
+			/* fallthrough */
+		case CONFIG:
+			writel(GO_STATE, &pctl->sctl);
+			while ((readl(&pctl->stat) & PCTL_STAT_MASK) != ACCESS)
+				;
+			break;
+		case ACCESS:
+			return;
+		default:
+			break;
+		}
+	}
+}
+
+static void move_to_lowpower_state(struct rk322x_ddr_pctl *pctl)
+{
+	unsigned int state;
+
+	while (1) {
+		state = readl(&pctl->stat) & PCTL_STAT_MASK;
+		switch (state) {
+		case INIT_MEM:
+			writel(CFG_STATE, &pctl->sctl);
+			while ((readl(&pctl->stat) & PCTL_STAT_MASK) != CONFIG)
+				;
+			/* fallthrough */
+		case CONFIG:
+			writel(GO_STATE, &pctl->sctl);
+			while ((readl(&pctl->stat) & PCTL_STAT_MASK) != ACCESS)
+				;
+			break;
+		case ACCESS:
+			writel(SLEEP_STATE, &pctl->sctl);
+			while ((readl(&pctl->stat) & PCTL_STAT_MASK) !=
+			       LOW_POWER)
+				;
+			break;
+		case LOW_POWER:
+			return;
+		default:
+			break;
+		}
+	}
+}
+
+/* pctl should in low power mode when call this function */
+static void phy_softreset(struct dram_info *dram)
+{
+	struct rk322x_ddr_phy *ddr_phy = dram->chan[0].phy;
+	struct rk322x_grf *grf = dram->grf;
+
+	writel(GRF_DDRPHY_BUFFEREN_CORE_EN, &grf->soc_con[0]);
+	clrbits_le32(&ddr_phy->ddrphy_reg[0], 0x3 << 2);
+	rockchip_udelay(1);
+	setbits_le32(&ddr_phy->ddrphy_reg[0], 1 << 2);
+	rockchip_udelay(5);
+	setbits_le32(&ddr_phy->ddrphy_reg[0], 1 << 3);
+	writel(GRF_DDRPHY_BUFFEREN_CORE_DIS, &grf->soc_con[0]);
+}
+
+/* bw: 2: 32bit, 1:16bit */
+static void set_bw(struct dram_info *dram, u32 bw)
+{
+	struct rk322x_ddr_pctl *pctl = dram->chan[0].pctl;
+	struct rk322x_ddr_phy *ddr_phy = dram->chan[0].phy;
+	struct rk322x_grf *grf = dram->grf;
+
+	if (bw == 1) {
+		setbits_le32(&pctl->ppcfg, 1);
+		clrbits_le32(&ddr_phy->ddrphy_reg[0], 0xc << 4);
+		writel(GRF_MSCH_NOC_16BIT_EN, &grf->soc_con[0]);
+		clrbits_le32(&ddr_phy->ddrphy_reg[0x46], 0x8);
+		clrbits_le32(&ddr_phy->ddrphy_reg[0x56], 0x8);
+	} else {
+		clrbits_le32(&pctl->ppcfg, 1);
+		setbits_le32(&ddr_phy->ddrphy_reg[0], 0xf << 4);
+		writel(GRF_DDR_32BIT_EN | GRF_MSCH_NOC_32BIT_EN,
+		       &grf->soc_con[0]);
+		setbits_le32(&ddr_phy->ddrphy_reg[0x46], 0x8);
+		setbits_le32(&ddr_phy->ddrphy_reg[0x56], 0x8);
+	}
+}
+
+static void pctl_cfg(struct rk322x_ddr_pctl *pctl,
+		     struct rk322x_sdram_params *sdram_params,
+		     struct rk322x_grf *grf)
+{
+	u32 burst_len;
+	u32 bw;
+	u32 dramtype = sdram_params->base.dramtype;
+
+	if (sdram_params->ch[0].bw == 2)
+		bw = GRF_DDR_32BIT_EN | GRF_MSCH_NOC_32BIT_EN;
+	else
+		bw = GRF_MSCH_NOC_16BIT_EN;
+
+	writel(DFI_INIT_START | DFI_DATA_BYTE_DISABLE_EN, &pctl->dfistcfg0);
+	writel(DFI_DRAM_CLK_SR_EN | DFI_DRAM_CLK_DPD_EN, &pctl->dfistcfg1);
+	writel(DFI_PARITY_INTR_EN | DFI_PARITY_EN, &pctl->dfistcfg2);
+	writel(0x51010, &pctl->dfilpcfg0);
+
+	writel(1, &pctl->dfitphyupdtype0);
+	writel(0x0d, &pctl->dfitphyrdlat);
+	writel(0, &pctl->dfitphywrdata);
+
+	writel(0, &pctl->dfiupdcfg);
+	copy_to_reg(&pctl->togcnt1u, &sdram_params->pctl_timing.togcnt1u,
+		    sizeof(struct rk322x_pctl_timing));
+	if (dramtype == DDR3) {
+		writel((1 << 3) | (1 << 11),
+		       &pctl->dfiodtcfg);
+		writel(7 << 16, &pctl->dfiodtcfg1);
+		writel((readl(&pctl->tcl) - 1) / 2 - 1, &pctl->dfitrddataen);
+		writel((readl(&pctl->tcwl) - 1) / 2 - 1, &pctl->dfitphywrlat);
+		writel(500, &pctl->trsth);
+		writel(0 << MDDR_LPDDR2_CLK_STOP_IDLE_SHIFT | DDR3_EN |
+		       DDR2_DDR3_BL_8 | (6 - 4) << TFAW_SHIFT | PD_EXIT_SLOW |
+		       1 << PD_TYPE_SHIFT | 0 << PD_IDLE_SHIFT,
+		       &pctl->mcfg);
+		writel(bw | GRF_DDR3_EN, &grf->soc_con[0]);
+	} else {
+		if (sdram_params->phy_timing.bl & PHT_BL_8)
+			burst_len = MDDR_LPDDR2_BL_8;
+		else
+			burst_len = MDDR_LPDDR2_BL_4;
+
+		writel(readl(&pctl->tcl) / 2 - 1, &pctl->dfitrddataen);
+		writel(readl(&pctl->tcwl) / 2 - 1, &pctl->dfitphywrlat);
+		writel(0, &pctl->trsth);
+		if (dramtype == LPDDR2) {
+			writel(0 << MDDR_LPDDR2_CLK_STOP_IDLE_SHIFT |
+			       LPDDR2_S4 | LPDDR2_EN | burst_len |
+			       (6 - 4) << TFAW_SHIFT | PD_EXIT_FAST |
+			       1 << PD_TYPE_SHIFT | 0 << PD_IDLE_SHIFT,
+			       &pctl->mcfg);
+			writel(0, &pctl->dfiodtcfg);
+			writel(0, &pctl->dfiodtcfg1);
+		} else {
+			writel(0 << MDDR_LPDDR2_CLK_STOP_IDLE_SHIFT |
+			       LPDDR2_S4 | LPDDR3_EN | burst_len |
+			       (6 - 4) << TFAW_SHIFT | PD_EXIT_FAST |
+			       1 << PD_TYPE_SHIFT | 0 << PD_IDLE_SHIFT,
+			       &pctl->mcfg);
+			writel((1 << 3) | (1 << 2), &pctl->dfiodtcfg);
+			writel((7 << 16) | 4, &pctl->dfiodtcfg1);
+		}
+		writel(bw | GRF_LPDDR2_3_EN, &grf->soc_con[0]);
+	}
+	setbits_le32(&pctl->scfg, 1);
+}
+
+static void phy_cfg(struct chan_info *chan,
+		    struct rk322x_sdram_params *sdram_params)
+{
+	struct rk322x_ddr_phy *ddr_phy = chan->phy;
+	struct rk322x_service_sys *axi_bus = chan->msch;
+	struct rk322x_msch_timings *noc_timing = &sdram_params->base.noc_timing;
+	struct rk322x_phy_timing *phy_timing = &sdram_params->phy_timing;
+	struct rk322x_pctl_timing *pctl_timing = &sdram_params->pctl_timing;
+	u32 cmd_drv, clk_drv, dqs_drv, dqs_odt;
+
+	writel(noc_timing->ddrtiming, &axi_bus->ddrtiming);
+	writel(noc_timing->ddrmode, &axi_bus->ddrmode);
+	writel(noc_timing->readlatency, &axi_bus->readlatency);
+	writel(noc_timing->activate, &axi_bus->activate);
+	writel(noc_timing->devtodev, &axi_bus->devtodev);
+
+	switch (sdram_params->base.dramtype) {
+	case DDR3:
+		writel(PHY_DDR3 | phy_timing->bl, &ddr_phy->ddrphy_reg[1]);
+		break;
+	case LPDDR2:
+		writel(PHY_LPDDR2 | phy_timing->bl, &ddr_phy->ddrphy_reg[1]);
+		break;
+	default:
+		writel(PHY_LPDDR2 | phy_timing->bl, &ddr_phy->ddrphy_reg[1]);
+		break;
+	}
+
+	writel(phy_timing->cl_al, &ddr_phy->ddrphy_reg[0xb]);
+	writel(pctl_timing->tcwl, &ddr_phy->ddrphy_reg[0xc]);
+
+	cmd_drv = PHY_RON_RTT_34OHM;
+	clk_drv = PHY_RON_RTT_45OHM;
+	dqs_drv = PHY_RON_RTT_34OHM;
+	if (sdram_params->base.dramtype == LPDDR2)
+		dqs_odt = PHY_RON_RTT_DISABLE;
+	else
+		dqs_odt = PHY_RON_RTT_225OHM;
+
+	writel(cmd_drv, &ddr_phy->ddrphy_reg[0x11]);
+	clrsetbits_le32(&ddr_phy->ddrphy_reg[0x12], (0x1f << 3), cmd_drv << 3);
+	writel(clk_drv, &ddr_phy->ddrphy_reg[0x16]);
+	writel(clk_drv, &ddr_phy->ddrphy_reg[0x18]);
+
+	writel(dqs_drv, &ddr_phy->ddrphy_reg[0x20]);
+	writel(dqs_drv, &ddr_phy->ddrphy_reg[0x2f]);
+	writel(dqs_drv, &ddr_phy->ddrphy_reg[0x30]);
+	writel(dqs_drv, &ddr_phy->ddrphy_reg[0x3f]);
+	writel(dqs_drv, &ddr_phy->ddrphy_reg[0x40]);
+	writel(dqs_drv, &ddr_phy->ddrphy_reg[0x4f]);
+	writel(dqs_drv, &ddr_phy->ddrphy_reg[0x50]);
+	writel(dqs_drv, &ddr_phy->ddrphy_reg[0x5f]);
+
+	writel(dqs_odt, &ddr_phy->ddrphy_reg[0x21]);
+	writel(dqs_odt, &ddr_phy->ddrphy_reg[0x2e]);
+	writel(dqs_odt, &ddr_phy->ddrphy_reg[0x31]);
+	writel(dqs_odt, &ddr_phy->ddrphy_reg[0x3e]);
+	writel(dqs_odt, &ddr_phy->ddrphy_reg[0x41]);
+	writel(dqs_odt, &ddr_phy->ddrphy_reg[0x4e]);
+	writel(dqs_odt, &ddr_phy->ddrphy_reg[0x51]);
+	writel(dqs_odt, &ddr_phy->ddrphy_reg[0x5e]);
+}
+
+void dram_cfg_rbc(struct chan_info *chan,
+		  struct rk322x_sdram_params *sdram_params)
+{
+	char noc_config;
+	int i = 0;
+	struct rk322x_sdram_channel *config = &sdram_params->ch[0];
+	struct rk322x_service_sys *axi_bus = chan->msch;
+
+	move_to_config_state(chan->pctl);
+
+	if ((config->rank == 2) && (config->cs1_row == config->cs0_row)) {
+		if ((config->col + config->bw) == 12) {
+			i = 14;
+			goto finish;
+		} else if ((config->col + config->bw) == 11) {
+			i = 15;
+			goto finish;
+		}
+	}
+	noc_config = ((config->cs0_row - 13) << 4) | ((config->bk - 2) << 2) |
+				(config->col + config->bw - 11);
+	for (i = 0; i < 11; i++) {
+		if (noc_config == ddr_cfg_2_rbc[i])
+			break;
+	}
+
+	if (i < 11)
+		goto finish;
+
+	noc_config = ((config->bk - 2) << 6) | ((config->cs0_row - 13) << 4) |
+				(config->col + config->bw - 11);
+
+	for (i = 11; i < 14; i++) {
+		if (noc_config == ddr_cfg_2_rbc[i])
+			break;
+	}
+	if (i < 14)
+		goto finish;
+	else
+		i = 0;
+
+finish:
+	writel(i, &axi_bus->ddrconf);
+	move_to_access_state(chan->pctl);
+}
+
+static void dram_all_config(const struct dram_info *dram,
+			    struct rk322x_sdram_params *sdram_params)
+{
+	struct rk322x_sdram_channel *info = &sdram_params->ch[0];
+	u32 sys_reg = 0;
+
+	sys_reg |= sdram_params->base.dramtype << SYS_REG_DDRTYPE_SHIFT;
+	sys_reg |= (1 - 1) << SYS_REG_NUM_CH_SHIFT;
+	sys_reg |= info->row_3_4 << SYS_REG_ROW_3_4_SHIFT(0);
+	sys_reg |= 1 << SYS_REG_CHINFO_SHIFT(0);
+	sys_reg |= (info->rank - 1) << SYS_REG_RANK_SHIFT(0);
+	sys_reg |= (info->col - 9) << SYS_REG_COL_SHIFT(0);
+	sys_reg |= info->bk == 3 ? 0 : 1 << SYS_REG_BK_SHIFT(0);
+	sys_reg |= (info->cs0_row - 13) << SYS_REG_CS0_ROW_SHIFT(0);
+	sys_reg |= (info->cs1_row - 13) << SYS_REG_CS1_ROW_SHIFT(0);
+	sys_reg |= (2 >> info->bw) << SYS_REG_BW_SHIFT(0);
+	sys_reg |= (2 >> info->dbw) << SYS_REG_DBW_SHIFT(0);
+
+	writel(sys_reg, &dram->grf->os_reg[2]);
+}
+
+#define TEST_PATTEN	0x5aa5f00f
+
+static int dram_cap_detect(struct dram_info *dram,
+			   struct rk322x_sdram_params *sdram_params)
+{
+	u32 bw, row, col, addr;
+	u32 ret = 0;
+	struct rk322x_service_sys *axi_bus = dram->chan[0].msch;
+
+	if (sdram_params->base.dramtype == DDR3)
+		sdram_params->ch[0].dbw = 1;
+	else
+		sdram_params->ch[0].dbw = 2;
+
+	move_to_config_state(dram->chan[0].pctl);
+	/* bw detect */
+	set_bw(dram, 2);
+	if (data_training(&dram->chan[0]) == 0) {
+		bw = 2;
+	} else {
+		bw = 1;
+		set_bw(dram, 1);
+		move_to_lowpower_state(dram->chan[0].pctl);
+		phy_softreset(dram);
+		move_to_config_state(dram->chan[0].pctl);
+		if (data_training(&dram->chan[0])) {
+			printf("BW detect error\n");
+			ret = -EINVAL;
+		}
+	}
+	sdram_params->ch[0].bw = bw;
+	sdram_params->ch[0].bk = 3;
+
+	if (bw == 2)
+		writel(6, &axi_bus->ddrconf);
+	else
+		writel(3, &axi_bus->ddrconf);
+	move_to_access_state(dram->chan[0].pctl);
+	for (col = 11; col >= 9; col--) {
+		writel(0, CONFIG_SYS_SDRAM_BASE);
+		addr = CONFIG_SYS_SDRAM_BASE +
+			(1 << (col + bw - 1));
+		writel(TEST_PATTEN, addr);
+		if ((readl(addr) == TEST_PATTEN) &&
+		    (readl(CONFIG_SYS_SDRAM_BASE) == 0))
+			break;
+	}
+	if (col == 8) {
+		printf("Col detect error\n");
+		ret = -EINVAL;
+		goto out;
+	} else {
+		sdram_params->ch[0].col = col;
+	}
+
+	writel(10, &axi_bus->ddrconf);
+
+	/* Detect row*/
+	for (row = 16; row >= 12; row--) {
+		writel(0, CONFIG_SYS_SDRAM_BASE);
+		addr = CONFIG_SYS_SDRAM_BASE + (1u << (row + 11 + 3 - 1));
+		writel(TEST_PATTEN, addr);
+		if ((readl(addr) == TEST_PATTEN) &&
+		    (readl(CONFIG_SYS_SDRAM_BASE) == 0))
+			break;
+	}
+	if (row == 11) {
+		printf("Row detect error\n");
+		ret = -EINVAL;
+	} else {
+		sdram_params->ch[0].cs1_row = row;
+		sdram_params->ch[0].row_3_4 = 0;
+		sdram_params->ch[0].cs0_row = row;
+	}
+	/* cs detect */
+	writel(0, CONFIG_SYS_SDRAM_BASE);
+	writel(TEST_PATTEN, CONFIG_SYS_SDRAM_BASE + (1u << 30));
+	writel(~TEST_PATTEN, CONFIG_SYS_SDRAM_BASE + (1u << 30) + 4);
+	if ((readl(CONFIG_SYS_SDRAM_BASE + (1u << 30)) == TEST_PATTEN) &&
+	    (readl(CONFIG_SYS_SDRAM_BASE) == 0))
+		sdram_params->ch[0].rank = 2;
+	else
+		sdram_params->ch[0].rank = 1;
+out:
+	return ret;
+}
+
+static int sdram_init(struct dram_info *dram,
+		      struct rk322x_sdram_params *sdram_params)
+{
+	int ret;
+
+	ret = clk_set_rate(&dram->ddr_clk,
+			   sdram_params->base.ddr_freq * MHz * 2);
+	if (ret < 0) {
+		printf("Could not set DDR clock\n");
+		return ret;
+	}
+
+	phy_pctrl_reset(dram->cru, dram->chan[0].phy);
+	phy_dll_bypass_set(dram->chan[0].phy, sdram_params->base.ddr_freq);
+	pctl_cfg(dram->chan[0].pctl, sdram_params, dram->grf);
+	phy_cfg(&dram->chan[0], sdram_params);
+	writel(POWER_UP_START, &dram->chan[0].pctl->powctl);
+	while (!(readl(&dram->chan[0].pctl->powstat) & POWER_UP_DONE))
+		;
+	memory_init(&dram->chan[0], sdram_params);
+	move_to_access_state(dram->chan[0].pctl);
+	ret = dram_cap_detect(dram, sdram_params);
+	if (ret)
+		goto out;
+	dram_cfg_rbc(&dram->chan[0], sdram_params);
+	dram_all_config(dram, sdram_params);
+out:
+	return ret;
+}
+
+static int rk322x_dmc_ofdata_to_platdata(struct udevice *dev)
+{
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	struct rk322x_sdram_params *params = dev_get_platdata(dev);
+	const void *blob = gd->fdt_blob;
+	int node = dev_of_offset(dev);
+	int ret;
+
+	params->num_channels = 1;
+
+	ret = fdtdec_get_int_array(blob, node, "rockchip,pctl-timing",
+				   (u32 *)&params->pctl_timing,
+				   sizeof(params->pctl_timing) / sizeof(u32));
+	if (ret) {
+		printf("%s: Cannot read rockchip,pctl-timing\n", __func__);
+		return -EINVAL;
+	}
+	ret = fdtdec_get_int_array(blob, node, "rockchip,phy-timing",
+				   (u32 *)&params->phy_timing,
+				   sizeof(params->phy_timing) / sizeof(u32));
+	if (ret) {
+		printf("%s: Cannot read rockchip,phy-timing\n", __func__);
+		return -EINVAL;
+	}
+	ret = fdtdec_get_int_array(blob, node, "rockchip,sdram-params",
+				   (u32 *)&params->base,
+				   sizeof(params->base) / sizeof(u32));
+	if (ret) {
+		printf("%s: Cannot read rockchip,sdram-params\n", __func__);
+		return -EINVAL;
+	}
+	ret = regmap_init_mem(dev, &params->map);
+	if (ret)
+		return ret;
+#endif
+
+	return 0;
+}
+#endif /* CONFIG_TPL_BUILD */
+
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+static int conv_of_platdata(struct udevice *dev)
+{
+	struct rk322x_sdram_params *plat = dev_get_platdata(dev);
+	struct dtd_rockchip_rk322x_dmc *of_plat = &plat->of_plat;
+	int ret;
+
+	memcpy(&plat->pctl_timing, of_plat->rockchip_pctl_timing,
+	       sizeof(plat->pctl_timing));
+	memcpy(&plat->phy_timing, of_plat->rockchip_phy_timing,
+	       sizeof(plat->phy_timing));
+	memcpy(&plat->base, of_plat->rockchip_sdram_params, sizeof(plat->base));
+
+	plat->num_channels = 1;
+	ret = regmap_init_mem_platdata(dev, of_plat->reg,
+				       ARRAY_SIZE(of_plat->reg) / 2,
+				       &plat->map);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+#endif
+
+static int rk322x_dmc_probe(struct udevice *dev)
+{
+#ifdef CONFIG_TPL_BUILD
+	struct rk322x_sdram_params *plat = dev_get_platdata(dev);
+	int ret;
+	struct udevice *dev_clk;
+#endif
+	struct dram_info *priv = dev_get_priv(dev);
+
+	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+#ifdef CONFIG_TPL_BUILD
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+	ret = conv_of_platdata(dev);
+	if (ret)
+		return ret;
+#endif
+
+	priv->chan[0].msch = syscon_get_first_range(ROCKCHIP_SYSCON_MSCH);
+	priv->chan[0].pctl = regmap_get_range(plat->map, 0);
+	priv->chan[0].phy = regmap_get_range(plat->map, 1);
+	ret = rockchip_get_clk(&dev_clk);
+	if (ret)
+		return ret;
+	priv->ddr_clk.id = CLK_DDR;
+	ret = clk_request(dev_clk, &priv->ddr_clk);
+	if (ret)
+		return ret;
+
+	priv->cru = rockchip_get_cru();
+	if (IS_ERR(priv->cru))
+		return PTR_ERR(priv->cru);
+	ret = sdram_init(priv, plat);
+	if (ret)
+		return ret;
+#else
+	priv->info.base = CONFIG_SYS_SDRAM_BASE;
+	priv->info.size = rockchip_sdram_size(
+			(phys_addr_t)&priv->grf->os_reg[2]);
+#endif
+
+	return 0;
+}
+
+static int rk322x_dmc_get_info(struct udevice *dev, struct ram_info *info)
+{
+	struct dram_info *priv = dev_get_priv(dev);
+
+	*info = priv->info;
+
+	return 0;
+}
+
+static struct ram_ops rk322x_dmc_ops = {
+	.get_info = rk322x_dmc_get_info,
+};
+
+static const struct udevice_id rk322x_dmc_ids[] = {
+	{ .compatible = "rockchip,rk3228-dmc" },
+	{ }
+};
+
+U_BOOT_DRIVER(dmc_rk322x) = {
+	.name = "rockchip_rk322x_dmc",
+	.id = UCLASS_RAM,
+	.of_match = rk322x_dmc_ids,
+	.ops = &rk322x_dmc_ops,
+#ifdef CONFIG_TPL_BUILD
+	.ofdata_to_platdata = rk322x_dmc_ofdata_to_platdata,
+#endif
+	.probe = rk322x_dmc_probe,
+	.priv_auto_alloc_size = sizeof(struct dram_info),
+#ifdef CONFIG_TPL_BUILD
+	.platdata_auto_alloc_size = sizeof(struct rk322x_sdram_params),
+#endif
+};
+

commit 95830dbaf7b37c1bbaf44c1e5d1b5d3990dd9b89
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 6 16:31:14 2017 +0800

    rockchip: pinctrl: use fdtdec_get_int_array() to get interrupt
    
    Not all the udevice have a available DT node, eg. rksdmmc@ff500000.blk
    which add by mmc_bind(), if we use dev_read_u32_array(), the interface
    will use the ofnode directly and end with:
            assert(ofnode_valid(node));
    
    Use fdtdec_get_int_array() instead.
    
    Change-Id: I1fc90ad0bd22451856e97be7728ba9996bf3bc0c
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3036.c b/drivers/pinctrl/rockchip/pinctrl_rk3036.c
index 94f6d7ad40..9215d6c96e 100644
--- a/drivers/pinctrl/rockchip/pinctrl_rk3036.c
+++ b/drivers/pinctrl/rockchip/pinctrl_rk3036.c
@@ -193,7 +193,8 @@ static int rk3036_pinctrl_get_periph_id(struct udevice *dev,
 	u32 cell[3];
 	int ret;
 
-	ret = dev_read_u32_array(periph, "interrupts", cell, ARRAY_SIZE(cell));
+	ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(periph),
+				   "interrupts", cell, ARRAY_SIZE(cell));
 	if (ret < 0)
 		return -EINVAL;
 
diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3188.c b/drivers/pinctrl/rockchip/pinctrl_rk3188.c
index 692d8e298d..65c1f665ea 100644
--- a/drivers/pinctrl/rockchip/pinctrl_rk3188.c
+++ b/drivers/pinctrl/rockchip/pinctrl_rk3188.c
@@ -370,7 +370,8 @@ static int rk3188_pinctrl_get_periph_id(struct udevice *dev,
 	u32 cell[3];
 	int ret;
 
-	ret = dev_read_u32_array(periph, "interrupts", cell, ARRAY_SIZE(cell));
+	ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(periph),
+				   "interrupts", cell, ARRAY_SIZE(cell));
 	if (ret < 0)
 		return -EINVAL;
 
diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3288.c b/drivers/pinctrl/rockchip/pinctrl_rk3288.c
index a21b64044b..721aeab966 100644
--- a/drivers/pinctrl/rockchip/pinctrl_rk3288.c
+++ b/drivers/pinctrl/rockchip/pinctrl_rk3288.c
@@ -597,7 +597,8 @@ static int rk3288_pinctrl_get_periph_id(struct udevice *dev,
 	u32 cell[3];
 	int ret;
 
-	ret = dev_read_u32_array(periph, "interrupts", cell, ARRAY_SIZE(cell));
+	ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(periph),
+				   "interrupts", cell, ARRAY_SIZE(cell));
 	if (ret < 0)
 		return -EINVAL;
 
diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3328.c b/drivers/pinctrl/rockchip/pinctrl_rk3328.c
index c74163e026..f3e7eec9e4 100644
--- a/drivers/pinctrl/rockchip/pinctrl_rk3328.c
+++ b/drivers/pinctrl/rockchip/pinctrl_rk3328.c
@@ -249,7 +249,8 @@ static int rk3328_pinctrl_get_periph_id(struct udevice *dev,
 	u32 cell[3];
 	int ret;
 
-	ret = dev_read_u32_array(periph, "interrupts", cell, ARRAY_SIZE(cell));
+	ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(periph),
+				   "interrupts", cell, ARRAY_SIZE(cell));
 	if (ret < 0)
 		return -EINVAL;
 
diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3399.c b/drivers/pinctrl/rockchip/pinctrl_rk3399.c
index cab268c7d6..d93b90310b 100644
--- a/drivers/pinctrl/rockchip/pinctrl_rk3399.c
+++ b/drivers/pinctrl/rockchip/pinctrl_rk3399.c
@@ -350,7 +350,8 @@ static int rk3399_pinctrl_get_periph_id(struct udevice *dev,
 	u32 cell[3];
 	int ret;
 
-	ret = dev_read_u32_array(periph, "interrupts", cell, ARRAY_SIZE(cell));
+	ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(periph),
+				   "interrupts", cell, ARRAY_SIZE(cell));
 	if (ret < 0)
 		return -EINVAL;
 
diff --git a/drivers/pinctrl/rockchip/pinctrl_rv1108.c b/drivers/pinctrl/rockchip/pinctrl_rv1108.c
index cda94f4957..bdf3910a88 100644
--- a/drivers/pinctrl/rockchip/pinctrl_rv1108.c
+++ b/drivers/pinctrl/rockchip/pinctrl_rv1108.c
@@ -108,7 +108,8 @@ static int rv1108_pinctrl_get_periph_id(struct udevice *dev,
 	u32 cell[3];
 	int ret;
 
-	ret = dev_read_u32_array(periph, "interrupts", cell, ARRAY_SIZE(cell));
+	ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(periph),
+				   "interrupts", cell, ARRAY_SIZE(cell));
 	if (ret < 0)
 		return -EINVAL;
 

commit cf5771bef769584ed72cab79014c2a58ec6715d7
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 6 09:38:22 2017 +0800

    rockchip: evb-rk3229: don't remove clock-names node in spl
    
    The SPL need 'ciu-sample' for dwmmc driver when enable higher
    speed.
    
    Change-Id: I1e24f2551e118edf3d175abc5514826ef988a148
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index 2fe2061535..df5a36855c 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -42,7 +42,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y
 CONFIG_CMD_TIME=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_TPL_OF_CONTROL=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_TPL_DM=y
 CONFIG_REGMAP=y

commit 6c639845dad3c58df6689dc6c3f8a34957d5402e
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 6 09:36:45 2017 +0800

    rockchip: rk322x: add CLK_EMMC_SAMPLE clock support
    
    Change-Id: I332e9ad79f8f9ce51108d3e914f8e439a5ff8b74
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c
index d7f6a3c313..431972ef18 100644
--- a/drivers/clk/rockchip/clk_rk322x.c
+++ b/drivers/clk/rockchip/clk_rk322x.c
@@ -220,6 +220,7 @@ static ulong rockchip_mmc_get_clk(struct rk322x_cru *cru, uint clk_general_rate,
 	switch (periph) {
 	case HCLK_EMMC:
 	case SCLK_EMMC:
+	case SCLK_EMMC_SAMPLE:
 		con = readl(&cru->cru_clksel_con[11]);
 		mux = (con & EMMC_PLL_MASK) >> EMMC_PLL_SHIFT;
 		con = readl(&cru->cru_clksel_con[12]);
@@ -261,6 +262,7 @@ static ulong rockchip_mmc_set_clk(struct rk322x_cru *cru, uint clk_general_rate,
 	switch (periph) {
 	case HCLK_EMMC:
 	case SCLK_EMMC:
+	case SCLK_EMMC_SAMPLE:
 		rk_clrsetreg(&cru->cru_clksel_con[11],
 			     EMMC_PLL_MASK,
 			     mux << EMMC_PLL_SHIFT);

commit a35feaca3c37f0f5e9e897cee8eae1dcecbca98e
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 6 09:33:22 2017 +0800

    rockchip: evb-rk322x: update defconfig with tpl and optee support
    
    Enable all the options for TPL/SPL and OPTEE.
    
    Cover-letter:
    rockchip: add tpl and OPTEE support for rk3229
    
    Add some generic options for TPL support for arm 32bit, and then
    and TPL support for rk3229(cortex-A7), and then add OPTEE support
    in SPL.
    
    END
    
    Change-Id: I8db693ccf552161a558a620261152908afb6dc56
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index 668e01a8e5..2fe2061535 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -4,14 +4,27 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x800
 CONFIG_ROCKCHIP_RK322X=y
-CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/rk322x/u-boot-tpl.lds"
+CONFIG_TPL_TEXT_BASE=0x10081004
+CONFIG_TPL_MAX_SIZE=28672
+CONFIG_TPL_STACK=0x10088000
+CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_TARGET_EVB_RK3229=y
-CONFIG_SPL_STACK_R_ADDR=0x80000
+CONFIG_SPL_STACK_R_ADDR=0x60600000
 CONFIG_DEFAULT_DEVICE_TREE="rk3229-evb"
 CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_SOURCE="board/rockchip/evb_rk3229/fit_spl_optee.its"
 # CONFIG_DISPLAY_CPUINFO is not set
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
 CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x4000
+CONFIG_SPL_OPTEE_SUPPORT=y
 CONFIG_FASTBOOT=y
 CONFIG_USB_FUNCTION_FASTBOOT=y
 CONFIG_CMD_FASTBOOT=y
@@ -28,14 +41,19 @@ CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_TIME=y
 CONFIG_SPL_OF_CONTROL=y
+CONFIG_TPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_ENV_IS_IN_MMC=y
+CONFIG_TPL_DM=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
+CONFIG_TPL_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_SPL_SYSCON=y
+CONFIG_TPL_SYSCON=y
 CONFIG_CLK=y
 CONFIG_SPL_CLK=y
+CONFIG_TPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MMC_DW=y
@@ -44,12 +62,14 @@ CONFIG_PINCTRL=y
 CONFIG_PINCTRL_ROCKCHIP_RK322X=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0x11030000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
+CONFIG_SPL_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_GADGET=y

commit afbbd4f78e8b3a347d408e4c4c7213b248922aec
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 6 10:01:06 2017 +0800

    rockchip: evb-rk3229: add README file for OP-TEE support
    
    Detail of step by step to bring up the board with OP-TEE support.
    
    Change-Id: If3156fa3fb3ede6270f871dcf0e518aced202443
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/board/rockchip/evb_rk3229/README b/board/rockchip/evb_rk3229/README
new file mode 100644
index 0000000000..93328c75b2
--- /dev/null
+++ b/board/rockchip/evb_rk3229/README
@@ -0,0 +1,72 @@
+Get the Source and prebuild binary
+==================================
+
+  > mkdir ~/evb_rk3229
+  > cd ~/evb_rk3229
+  > git clone git://git.denx.de/u-boot.git
+  > git clone https://github.com/OP-TEE/optee_os.git
+  > git clone https://github.com/rockchip-linux/rkbin.git
+  > git clone https://github.com/rockchip-linux/rkdeveloptool.git
+
+Compile the OP-TEE
+===============
+
+  > cd optee_os
+  > make clean
+  > make CROSS_COMPILE_ta_arm32=arm-none-eabi- PLATFORM=rockchip-rk322x
+  Get tee.bin in this step, copy it to U-Boot root dir:
+  > cp out/arm-plat-rockchip/core/tee-pager.bin ../u-boot/tee.bin
+
+Compile the U-Boot
+==================
+
+  > cd ../u-boot
+  > export CROSS_COMPILE=arm-linux-gnueabihf-
+  > export ARCH=arm
+  > make evb-rk3229_defconfig
+  > make
+  > make u-boot.itb
+
+  Get tpl/u-boot-tpl.bin, spl/u-boot-spl.bin and u-boot.itb in this step.
+
+Compile the rkdeveloptool
+=======================
+  Follow instructions in latest README
+  > cd ../rkflashtool
+  > autoreconf -i
+  > ./configure
+  > make
+  > sudo make install
+
+  Get rkdeveloptool in you Host in this step.
+
+Both origin binaries and Tool are ready now, choose either option 1 or
+option 2 to deploy U-Boot.
+
+Package the image
+=================
+
+  > cd ../u-boot
+  > tools/mkimage -n rk322x -T rksd -d tpl/u-boot-spl.bin idbloader.img
+  > cat spl/u-boot-spl.bin >> idbloader.img
+
+  Get idbloader.img in this step.
+
+Flash the image to eMMC
+=======================
+Power on(or reset with RESET KEY) with MASKROM KEY preesed, and then:
+  > cd ..
+  > rkdeveloptool db rkbin/rk32/rk322x_loader_v1.04.232.bin
+  > rkdeveloptool wl 64 u-boot/idbloader.img
+  > rkdeveloptool wl 0x4000 u-boot/u-boot.itb
+  > rkdeveloptool rd
+
+Flash the image to SD card
+==========================
+  > dd if=u-boot/idbloader.img of=/dev/sdb seek=64
+  > dd if=u-boot/u-boot.itb of=/dev/sdb seek=16384
+
+You should be able to get U-Boot log message with OP-TEE boot info.
+
+For more detail, please reference to:
+http://opensource.rock-chips.com/wiki_Boot_option

commit 3e3311d94f22271953949bf17e31d5b793c38b00
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 6 09:39:57 2017 +0800

    rockchip: evb-rk3229: add fit source file for itb
    
    We package U-Boot and OP-TEE into one itb file for SPL,
    so that we can support OP-TEE in SPL.
    
    Change-Id: I2c20333d6f3bb11ac1ec4bbb32c901028fb15d64
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/board/rockchip/evb_rk3229/fit_spl_optee.its b/board/rockchip/evb_rk3229/fit_spl_optee.its
new file mode 100644
index 0000000000..ed93d443f9
--- /dev/null
+++ b/board/rockchip/evb_rk3229/fit_spl_optee.its
@@ -0,0 +1,48 @@
+/*
+ * Copyright (C) 2017 Rockchip Electronic Co.,Ltd
+ *
+ * Simple U-boot fit source file containing U-Boot, dtb and optee
+ */
+
+/dts-v1/;
+
+/ {
+	description = "Simple image with OP-TEE support";
+	#address-cells = <1>;
+
+	images {
+		uboot@1 {
+			description = "U-Boot";
+			data = /incbin/("../../../u-boot-nodtb.bin");
+			type = "standalone";
+			arch = "arm";
+			compression = "none";
+			load = <0x61000000>;
+		};
+		optee@1 {
+			description = "ARM Trusted Firmware";
+			data = /incbin/("../../../tee.bin");
+			type = "firmware";
+			arch = "arm";
+			compression = "none";
+			load = <0x68400000>;
+			entry = <0x68400000>;
+		};
+		fdt@1 {
+			description = "rk3229 dtb";
+			data = /incbin/("../../../u-boot.dtb");
+			type = "flat_dt";
+			compression = "none";
+		};
+	};
+
+	configurations {
+		default = "conf@1";
+		conf@1 {
+			description = "RK3399 evb";
+			firmware = "uboot@1";
+			loadables = "optee@1";
+			fdt = "fdt@1";
+		};
+	};
+};

commit 821035d8ed28fc01b526002c2db261cf5a584f6b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 6 09:29:39 2017 +0800

    rockchip: rk322x: dts: enable uart2 for SPL/TPL
    
    When we use DM_SERIAL for serial driver, we need enable the
    dts node for the debug console.
    
    Change-Id: I02261a1b1851c57d5ce310beb1896cb8450aacc0
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3229-evb.dts b/arch/arm/dts/rk3229-evb.dts
index 64f1c2d7da..e66d6bf5fd 100644
--- a/arch/arm/dts/rk3229-evb.dts
+++ b/arch/arm/dts/rk3229-evb.dts
@@ -84,6 +84,7 @@
 };
 
 &uart2 {
+	u-boot,dm-pre-reloc;
 	status = "okay";
 };
 

commit 1bd2b131ff8c89a661ba9c192f30205bcad28163
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 6 09:22:42 2017 +0800

    spl: add support to booting with OP-TEE
    
    OP-TEE is an open source trusted OS, in armv7, its loading and
    running are like this:
    loading:
    - SPL load both OP-TEE and U-Boot
    running:
    - SPL run into OP-TEE in secure mode;
    - OP-TEE run into U-Boot in non-secure mode;
    
    More detail:
    https://github.com/OP-TEE/optee_os
    and search for 'boot arguments' for detail entry parameter in:
    core/arch/arm/kernel/generic_entry_a32.S
    
    Change-Id: I1344a35dd11bd69ca00e9b99909e1eb610648d86
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index b05ec21ed6..601d1262de 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -706,6 +706,13 @@ config SPL_ATF_TEXT_BASE
 	help
 	  This is the base address in memory for ATF BL31 text and entry point.
 
+config SPL_OPTEE_SUPPORT
+	bool "Support OP-TEE Trusted OS"
+	depends on ARM
+	help
+	  OP-TEE is an open source Trusted OS  which is loaded by SPL.
+	  More detail at: https://github.com/OP-TEE/optee_os
+
 config TPL
 	bool
 	depends on SUPPORT_TPL
diff --git a/common/spl/Makefile b/common/spl/Makefile
index e229947b53..8abd15c003 100644
--- a/common/spl/Makefile
+++ b/common/spl/Makefile
@@ -23,6 +23,7 @@ obj-$(CONFIG_$(SPL_TPL_)UBI) += spl_ubi.o
 obj-$(CONFIG_$(SPL_TPL_)NET_SUPPORT) += spl_net.o
 obj-$(CONFIG_$(SPL_TPL_)MMC_SUPPORT) += spl_mmc.o
 obj-$(CONFIG_$(SPL_TPL_)ATF_SUPPORT) += spl_atf.o
+obj-$(CONFIG_$(SPL_TPL_)OPTEE_SUPPORT) += spl_optee.o
 obj-$(CONFIG_$(SPL_TPL_)USB_SUPPORT) += spl_usb.o
 obj-$(CONFIG_$(SPL_TPL_)FAT_SUPPORT) += spl_fat.o
 obj-$(CONFIG_$(SPL_TPL_)EXT_SUPPORT) += spl_ext.o
diff --git a/common/spl/spl.c b/common/spl/spl.c
index 8b219ba690..d0459bec3f 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -430,6 +430,11 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 		bl31_entry();
 	}
 
+	if (CONFIG_IS_ENABLED(OPTEE_SUPPORT)) {
+		debug("loaded - jumping to U-Boot via OP-TEE.\n");
+		spl_optee_entry(0, 0, 0, (void *)spl_image.entry_point);
+	}
+
 	debug("loaded - jumping to U-Boot...\n");
 #ifdef CONFIG_BOOTSTAGE_STASH
 	int ret;
diff --git a/common/spl/spl_optee.S b/common/spl/spl_optee.S
new file mode 100644
index 0000000000..4f7f8ba474
--- /dev/null
+++ b/common/spl/spl_optee.S
@@ -0,0 +1,13 @@
+/*
+ * Copyright (C) 2017 Rockchip Electronic Co.,Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+
+ENTRY(spl_optee_entry)
+	ldr lr, =CONFIG_SYS_TEXT_BASE
+	mov pc, r3
+ENDPROC(spl_optee_entry)
diff --git a/include/spl.h b/include/spl.h
index ce4cf0abbe..13d46ed780 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -269,6 +269,15 @@ int spl_mmc_load_image(struct spl_image_info *spl_image,
 
 void bl31_entry(void);
 
+/**
+ * spl_optee_entry - entry function for optee
+ * entry arg0, pagestore
+ * entry arg1, (ARMv7 standard bootarg #1)
+ * entry arg2, device tree address, (ARMv7 standard bootarg #2)
+ * entry arg3, non-secure entry address (ARMv7 bootarg #0)
+ */
+void spl_optee_entry(void *arg0, void *arg1, void *arg2, void *arg3);
+
 /**
  * board_return_to_bootrom - allow for boards to continue with the boot ROM
  *

commit 4fe1bec3dce93d58393e8254fae706ff9a22d6e4
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 6 09:19:14 2017 +0800

    sysreset: enable driver support in SPL/TPL
    
    SPL/TPL also need use sysreset for some feature like panic callback.
    
    Change-Id: Icbca8b06d36c4dfd504950b566053fa3e2255050
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig
index a6d48e8a66..a61a7d37c6 100644
--- a/drivers/sysreset/Kconfig
+++ b/drivers/sysreset/Kconfig
@@ -13,6 +13,24 @@ config SYSRESET
 	  to effect a reset. The uclass will try all available drivers when
 	  reset_walk() is called.
 
+config SPL_SYSRESET
+	bool "Enable support for system reset drivers in SPL mode"
+	depends on SYSRESET && SPL_DM
+	help
+	  Enable system reset drivers which can be used to reset the CPU or
+	  board. Each driver can provide a reset method which will be called
+	  to effect a reset. The uclass will try all available drivers when
+	  reset_walk() is called.
+
+config TPL_SYSRESET
+	bool "Enable support for system reset drivers in TPL mode"
+	depends on SYSRESET && TPL_DM
+	help
+	  Enable system reset drivers which can be used to reset the CPU or
+	  board. Each driver can provide a reset method which will be called
+	  to effect a reset. The uclass will try all available drivers when
+	  reset_walk() is called.
+
 if SYSRESET
 
 config SYSRESET_PSCI
diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
index 476d361297..ce161a7165 100644
--- a/drivers/sysreset/Makefile
+++ b/drivers/sysreset/Makefile
@@ -4,7 +4,7 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
 
-obj-$(CONFIG_SYSRESET) += sysreset-uclass.o
+obj-$(CONFIG_$(SPL_TPL_)SYSRESET) += sysreset-uclass.o
 obj-$(CONFIG_SYSRESET_PSCI) += sysreset_psci.o
 obj-$(CONFIG_SYSRESET_SYSCON) += sysreset_syscon.o
 obj-$(CONFIG_SYSRESET_WATCHDOG) += sysreset_watchdog.o

commit 06d27531d0a219b6756b6049f369f3958e76d965
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 6 09:10:33 2017 +0800

    rockchip: rk322x: enable tpl support
    
    Move original spl to tpl, and add spl to load next stage firmware,
    adapt all the address and option for them.
    
    Change-Id: I3fd2b8305ba8fa9ea687ab7f3fd1ffd2fac9ece6
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index d9b25d5de4..e1bc947d68 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -32,9 +32,18 @@ config ROCKCHIP_RK322X
 	bool "Support Rockchip RK3228/RK3229"
 	select CPU_V7
 	select SUPPORT_SPL
+	select SUPPORT_TPL
 	select SPL
+	select TPL
+	select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
+	select TPL_NEEDS_SEPARATE_STACK if TPL
+	select SPL_DRIVERS_MISC_SUPPORT
+	imply SPL_SERIAL_SUPPORT
+	imply TPL_SERIAL_SUPPORT
 	select ROCKCHIP_BROM_HELPER
 	select DEBUG_UART_BOARD_INIT
+	select TPL_LIBCOMMON_SUPPORT
+	select TPL_LIBGENERIC_SUPPORT
 	help
 	  The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
 	  including NEON and GPU, Mali-400 graphics, several DDR3 options
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 79e9704a2c..5ef09383ac 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -13,10 +13,11 @@ obj-tpl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o save_boot_param.o
 
 obj-tpl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-tpl.o
 obj-tpl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-tpl.o
+obj-tpl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-tpl.o
 
 obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o
 obj-spl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-spl.o
-obj-spl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-spl.o
+obj-spl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-spl.o spl-boot-order.o
 obj-spl-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-spl.o
 obj-spl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-spl.o spl-boot-order.o
 obj-spl-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board-spl.o spl-boot-order.o
diff --git a/arch/arm/mach-rockchip/rk322x-board-spl.c b/arch/arm/mach-rockchip/rk322x-board-spl.c
index 4ddb8ba065..71e641ef33 100644
--- a/arch/arm/mach-rockchip/rk322x-board-spl.c
+++ b/arch/arm/mach-rockchip/rk322x-board-spl.c
@@ -5,77 +5,43 @@
  */
 
 #include <common.h>
-#include <debug_uart.h>
 #include <dm.h>
-#include <ram.h>
 #include <spl.h>
-#include <asm/io.h>
-#include <asm/arch/bootrom.h>
-#include <asm/arch/cru_rk322x.h>
-#include <asm/arch/grf_rk322x.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/timer.h>
-#include <asm/arch/uart.h>
+
+DECLARE_GLOBAL_DATA_PTR;
 
 u32 spl_boot_device(void)
 {
 	return BOOT_DEVICE_MMC1;
 }
-DECLARE_GLOBAL_DATA_PTR;
-
-#define GRF_BASE	0x11000000
-#define SGRF_BASE	0x10140000
 
-#define DEBUG_UART_BASE	0x11030000
+u32 spl_boot_mode(const u32 boot_device)
+{
+	return MMCSD_MODE_RAW;
+}
 
 void board_debug_uart_init(void)
 {
-static struct rk322x_grf * const grf = (void *)GRF_BASE;
-	/* Enable early UART2 channel 1 on the RK322x */
-	rk_clrsetreg(&grf->gpio1b_iomux,
-		     GPIO1B1_MASK | GPIO1B2_MASK,
-		     GPIO1B2_UART21_SIN << GPIO1B2_SHIFT |
-		     GPIO1B1_UART21_SOUT << GPIO1B1_SHIFT);
-	/* Set channel C as UART2 input */
-	rk_clrsetreg(&grf->con_iomux,
-		     CON_IOMUX_UART2SEL_MASK,
-		     CON_IOMUX_UART2SEL_21 << CON_IOMUX_UART2SEL_SHIFT);
 }
 
-#define SGRF_DDR_CON0 0x10150000
 void board_init_f(ulong dummy)
 {
-	struct udevice *dev;
 	int ret;
 
-	/*
-	 * Debug UART can be used from here if required:
-	 *
-	 * debug_uart_init();
-	 * printch('a');
-	 * printhex8(0x1234);
-	 * printascii("string");
-	 */
-	debug_uart_init();
-	printascii("SPL Init");
-
 	ret = spl_early_init();
 	if (ret) {
-		debug("spl_early_init() failed: %d\n", ret);
+		printf("spl_early_init() failed: %d\n", ret);
 		hang();
 	}
+	preloader_console_init();
+}
 
-	rockchip_timer_init();
-	printf("timer init done\n");
-	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
-	if (ret) {
-		printf("DRAM init failed: %d\n", ret);
-		return;
-	}
+#ifdef CONFIG_SPL_LOAD_FIT
+int board_fit_config_name_match(const char *name)
+{
+	/* Just empty function now - can't decide what to choose */
+	debug("%s: %s\n", __func__, name);
 
-	/* Disable the ddr secure region setting to make it non-secure */
-	rk_clrreg(SGRF_DDR_CON0, 0x4000);
-#if defined(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
-	back_to_bootrom();
-#endif
+	return 0;
 }
+#endif
diff --git a/arch/arm/mach-rockchip/rk322x-board-tpl.c b/arch/arm/mach-rockchip/rk322x-board-tpl.c
new file mode 100644
index 0000000000..5277dd6b9f
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk322x-board-tpl.c
@@ -0,0 +1,81 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <debug_uart.h>
+#include <dm.h>
+#include <ram.h>
+#include <spl.h>
+#include <asm/io.h>
+#include <asm/arch/bootrom.h>
+#include <asm/arch/cru_rk322x.h>
+#include <asm/arch/grf_rk322x.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/timer.h>
+#include <asm/arch/uart.h>
+
+u32 spl_boot_device(void)
+{
+	return BOOT_DEVICE_MMC1;
+}
+DECLARE_GLOBAL_DATA_PTR;
+
+#define GRF_BASE	0x11000000
+#define SGRF_BASE	0x10140000
+
+#define DEBUG_UART_BASE	0x11030000
+
+void board_debug_uart_init(void)
+{
+static struct rk322x_grf * const grf = (void *)GRF_BASE;
+	/* Enable early UART2 channel 1 on the RK322x */
+	rk_clrsetreg(&grf->gpio1b_iomux,
+		     GPIO1B1_MASK | GPIO1B2_MASK,
+		     GPIO1B2_UART21_SIN << GPIO1B2_SHIFT |
+		     GPIO1B1_UART21_SOUT << GPIO1B1_SHIFT);
+	/* Set channel C as UART2 input */
+	rk_clrsetreg(&grf->con_iomux,
+		     CON_IOMUX_UART2SEL_MASK,
+		     CON_IOMUX_UART2SEL_21 << CON_IOMUX_UART2SEL_SHIFT);
+}
+
+#define SGRF_DDR_CON0 0x10150000
+void board_init_f(ulong dummy)
+{
+	struct udevice *dev;
+	int ret;
+
+	/*
+	 * Debug UART can be used from here if required:
+	 *
+	 * debug_uart_init();
+	 * printch('a');
+	 * printhex8(0x1234);
+	 * printascii("string");
+	 */
+	debug_uart_init();
+	printascii("TPL Init");
+
+	ret = spl_early_init();
+	if (ret) {
+		debug("spl_early_init() failed: %d\n", ret);
+		hang();
+	}
+
+	rockchip_timer_init();
+	printf("timer init done\n");
+	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
+	if (ret) {
+		printf("DRAM init failed: %d\n", ret);
+		return;
+	}
+
+	/* Disable the ddr secure region setting to make it non-secure */
+	rk_clrreg(SGRF_DDR_CON0, 0x4000);
+#if defined(CONFIG_TPL_ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_TPL_BOARD_INIT)
+	back_to_bootrom();
+#endif
+}
diff --git a/arch/arm/mach-rockchip/rk322x/u-boot-tpl.lds b/arch/arm/mach-rockchip/rk322x/u-boot-tpl.lds
new file mode 100644
index 0000000000..841c803e73
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk322x/u-boot-tpl.lds
@@ -0,0 +1,13 @@
+/*
+ * Copyright (C) 2017 Rockchip Electronic Co.,Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#undef CONFIG_SPL_TEXT_BASE
+#define CONFIG_SPL_TEXT_BASE CONFIG_TPL_TEXT_BASE
+
+#undef CONFIG_SPL_MAX_SIZE
+#define CONFIG_SPL_MAX_SIZE CONFIG_TPL_MAX_SIZE
+
+#include "../../cpu/u-boot-spl.lds"
diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h
index cf7894dcb2..6ebe7b7f5c 100644
--- a/include/configs/rk322x_common.h
+++ b/include/configs/rk322x_common.h
@@ -21,11 +21,13 @@
 
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SYS_NS16550_MEM32
-#define CONFIG_SYS_TEXT_BASE		0x60000000
-#define CONFIG_SYS_INIT_SP_ADDR		0x60100000
-#define CONFIG_SYS_LOAD_ADDR		0x60800800
-#define CONFIG_SPL_STACK		0x10088000
-#define CONFIG_SPL_TEXT_BASE		0x10081004
+#define CONFIG_SYS_TEXT_BASE		0x61000000
+#define CONFIG_SYS_INIT_SP_ADDR		0x61100000
+#define CONFIG_SYS_LOAD_ADDR		0x61800800
+#define CONFIG_SPL_TEXT_BASE		0x60000000
+
+#define CONFIG_TPL_STACK		0x10088000
+#define CONFIG_TPL_TEXT_BASE		0x10081004
 
 #define CONFIG_ROCKCHIP_MAX_INIT_SIZE	(28 << 10)
 #define CONFIG_ROCKCHIP_CHIP_TAG	"RK32"

commit 2ca68684959f3e021035db6fa9221f552f6e8319
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 6 09:05:30 2017 +0800

    arm: add a separate stack for TPL
    
    TPL stack may different from SPL and sys stack, add support for
    separate one when the board defines it.
    
    Change-Id: I4e962e2e3a2c983892dd41397b2ac0622e3c3dc7
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S
index fa81317717..3c1c603039 100644
--- a/arch/arm/lib/crt0.S
+++ b/arch/arm/lib/crt0.S
@@ -70,7 +70,9 @@ ENTRY(_main)
  * Set up initial C runtime environment and call board_init_f(0).
  */
 
-#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK)
+#if defined(CONFIG_TPL_BUILD) && defined(CONFIG_TPL_NEEDS_SEPARATE_STACK)
+	ldr	r0, =(CONFIG_TPL_STACK)
+#elif defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK)
 	ldr	r0, =(CONFIG_SPL_STACK)
 #else
 	ldr	r0, =(CONFIG_SYS_INIT_SP_ADDR)

commit e4e8a0a71b52001f3467f6520c9baa2046b01027
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 6 09:01:51 2017 +0800

    arm: add option for TPL support in arm 32bit
    
    Some options like TPL_SYS_THUMB_BUILD, TPL_USE_ARCH_MEMCPY
    and TPL_USE_ARCH_MEMCPY are needed for TPL build in 32bit arm.
    
    Change-Id: I1bccdd91c56abc68d181d40ba3bf944e5f72d1c7
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index b84ecb7983..69749d2806 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -228,6 +228,17 @@ config SPL_SYS_THUMB_BUILD
 	   density. For ARM architectures that support Thumb2 this flag will
 	   result in Thumb2 code generated by GCC.
 
+config TPL_SYS_THUMB_BUILD
+	bool "Build TPL using the Thumb instruction set"
+	default y if SYS_THUMB_BUILD
+	depends on TPL && !ARM64
+	help
+	   Use this flag to build SPL using the Thumb instruction set for
+	   ARM architectures. Thumb instruction set provides better code
+	   density. For ARM architectures that support Thumb2 this flag will
+	   result in Thumb2 code generated by GCC.
+
+
 config SYS_L2CACHE_OFF
 	bool "L2cache off"
 	help
@@ -264,6 +275,15 @@ config SPL_USE_ARCH_MEMCPY
 	  Such implementation may be faster under some conditions
 	  but may increase the binary size.
 
+config TPL_USE_ARCH_MEMCPY
+	bool "Use an assembly optimized implementation of memcpy for TPL"
+	default y if USE_ARCH_MEMCPY
+	depends on !ARM64
+	help
+	  Enable the generation of an optimized version of memcpy.
+	  Such implementation may be faster under some conditions
+	  but may increase the binary size.
+
 config USE_ARCH_MEMSET
 	bool "Use an assembly optimized implementation of memset"
 	default y
@@ -282,6 +302,15 @@ config SPL_USE_ARCH_MEMSET
 	  Such implementation may be faster under some conditions
 	  but may increase the binary size.
 
+config TPL_USE_ARCH_MEMSET
+	bool "Use an assembly optimized implementation of memset for TPL"
+	default y if USE_ARCH_MEMSET
+	depends on !ARM64
+	help
+	  Enable the generation of an optimized version of memset.
+	  Such implementation may be faster under some conditions
+	  but may increase the binary size.
+
 config ARM64_SUPPORT_AARCH32
 	bool "ARM64 system support AArch32 execution state"
 	default y if ARM64 && !TARGET_THUNDERX_88XX

commit e2f2fb237ef0459b6a443366917e01c6e5d5d03d
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 6 08:57:08 2017 +0800

    lib: add TPL_OF_LIBFDT option for TPL
    
    TPL may need use libfdt for dt decode, add option for it.
    
    Change-Id: I20a7e7510cb3e10fbad68bd489fe1c5d03b012c3
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/lib/Kconfig b/lib/Kconfig
index fe337acaeb..3fb1f12012 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -211,6 +211,16 @@ config SPL_OF_LIBFDT
 	  particular compatible nodes. The library operates on a flattened
 	  version of the device tree.
 
+config TPL_OF_LIBFDT
+	bool "Enable the FDT library for TPL"
+	default y if TPL_OF_CONTROL
+	help
+	  This enables the FDT library (libfdt). It provides functions for
+	  accessing binary device tree images in memory, such as adding and
+	  removing nodes and properties, scanning through the tree and finding
+	  particular compatible nodes. The library operates on a flattened
+	  version of the device tree.
+
 config FDT_FIXUP_PARTITIONS
 	bool "overwrite MTD partitions in DTS through defined in 'mtdparts'"
 	depends on OF_LIBFDT

commit 80275b831bdbddf6c5963d48a2fcddc7a7263eee
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Aug 18 12:55:35 2017 +0800

    rockchip: evb-rk3399: update document for board bring up
    
    Since we support ATF in SPL and add script for it, let's make the
    document up to date.
    
    Change-Id: Ic6468825c61a8729ca38f7580dc728f0a753560a
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/board/rockchip/evb_rk3399/README b/board/rockchip/evb_rk3399/README
index fb8bb19763..7da7c848bd 100644
--- a/board/rockchip/evb_rk3399/README
+++ b/board/rockchip/evb_rk3399/README
@@ -18,8 +18,8 @@ evb key features:
 * PMIC: rk808
 * debug console: UART2
 
-In order to support Arm Trust Firmware(ATF), we need to use the
-miniloader from rockchip which:
+In order to support Arm Trust Firmware(ATF), we can use either SPL or
+miniloader from rockchip to do:
 * do DRAM init
 * load and verify ATF image
 * load and verify U-Boot image
@@ -32,8 +32,8 @@ Get the Source and prebuild binary
   > mkdir ~/evb_rk3399
   > cd ~/evb_rk3399
   > git clone https://github.com/ARM-software/arm-trusted-firmware.git
-  > git clone https://github.com/rockchip-linux/rkbin
-  > git clone https://github.com/rockchip-linux/rkflashtool
+  > git clone https://github.com/rockchip-linux/rkbin.git
+  > git clone https://github.com/rockchip-linux/rkdeveloptool.git
 
 Compile the ATF
 ===============
@@ -41,33 +41,76 @@ Compile the ATF
   > cd arm-trusted-firmware
   > make realclean
   > make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3399 bl31
+  Get bl31.elf in this step, copy it to U-Boot root dir:
+  > cp bl31.elf ../u-boot/
 
 Compile the U-Boot
 ==================
 
   > cd ../u-boot
-  > make CROSS_COMPILE=aarch64-linux-gnu- evb-rk3399_defconfig all
+  > export ARCH=arm64
+  > export CROSS_COMPILE=aarch64-linux-gnu-
+  > make evb-rk3399_defconfig
+  for firefly-rk3399, use below instead:
+  > make evb-firefly_defconfig
+  > make
+  > make u-boot.itb
 
-Compile the rkflashtool
-=======================
+  Get spl/u-boot-spl.bin and u-boot.itb in this step.
 
+Compile the rkdeveloptool
+=======================
+  Follow instructions in latest README
   > cd ../rkflashtool
+  > autoreconf -i
+  > ./configure
   > make
+  > sudo make install
+
+  Get rkdeveloptool in you Host in this step.
+
+Both origin binaries and Tool are ready now, choose either option 1 or
+option 2 to deploy U-Boot.
+
+Package the image
+=================
+
+Package the image for U-Boot SPL(option 1)
+--------------------------------
+  > cd ..
+  > tools/mkimage -n rk3399 -T rksd -d spl/u-boot-spl.bin idbspl.img
+
+  Get idbspl.img in this step.
 
-Package the image for miniloader
-================================
+Package the image for Rockchip miniloader(option 2)
+------------------------------------------
   > cd ..
-  > cp arm-trusted-firmware/build/rk3399/release/bl31.bin rkbin/rk33
+  > cp arm-trusted-firmware/build/rk3399/release/bl31.elf rkbin/rk33
   > ./rkbin/tools/trust_merger rkbin/tools/RK3399TRUST.ini
   > ./rkbin/tools/loaderimage --pack --uboot u-boot/u-boot-dtb.bin uboot.img
-  > mkdir image
-  > mv trust.img ./image/
-  > mv uboot.img ./image/rk3399evb-uboot.bin
 
-Flash the image
-===============
+  Get trust.img and uboot.img in this step.
+
+Flash the image to eMMC
+=======================
+
+Flash the image with U-Boot SPL(option 1)
+-------------------------------
 Power on(or reset with RESET KEY) with MASKROM KEY preesed, and then:
+  > rkdeveloptool db rkbin/rk33/rk3399_loader_v1.08.106.bin
+  > rkdeveloptool wl 64 u-boot/idbspl.img
+  > rkdeveloptool wl 512 u-boot/u-boot.itb
+  > rkdeveloptool rd
 
-  > ./rkflashtool/rkflashloader rk3399evb
+Flash the image with Rockchip miniloader(option 2)
+----------------------------------------
+Power on(or reset with RESET KEY) with MASKROM KEY preesed, and then:
+  > rkdeveloptool db rkbin/rk33/rk3399_loader_v1.08.106.bin
+  > rkdeveloptool ul rkbin/rk33/rk3399_loader_v1.08.106.bin
+  > rkdeveloptool wl 0x4000 u-boot/uboot.img
+  > rkdeveloptool wl 0x6000 u-boot/trust.img
+  > rkdeveloptool rd
 
 You should be able to get U-Boot log message in console/UART2 now.
+For more detail, please reference to:
+http://opensource.rock-chips.com/wiki_Boot_option

commit 8f1e1356e164a5d640612a3d1327c908f230b2f6
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Aug 18 11:46:35 2017 +0800

    rockchip: rk3399-evb: add script for atf fit
    
    Add a script to generate binaries from bl31.elf, and generate
    u-boot.its file for FIT image including u-boot, dtb and atf binaries.
    
    Change-Id: Iad47682119a8e1b382da913069a0771e32f9295d
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/board/rockchip/evb_rk3399/mk_fit_atf.sh b/board/rockchip/evb_rk3399/mk_fit_atf.sh
new file mode 100755
index 0000000000..146550aab3
--- /dev/null
+++ b/board/rockchip/evb_rk3399/mk_fit_atf.sh
@@ -0,0 +1,110 @@
+#!/bin/sh
+#
+# script to generate FIT image source for rk3399 boards with
+# ARM Trusted Firmware and multiple device trees (given on the command line)
+#
+# usage: $0 <dt_name> [<dt_name> [<dt_name] ...]
+
+[ -z "$BL31" ] && BL31="bl31.elf"
+
+if [ ! -f $BL31 ]; then
+	echo "WARNING: BL31 file $BL31 NOT found, resulting binary is non-functional" >&2
+	BL31=/dev/null
+fi
+
+#tools/mkimage -n rk3399 -T rksd -d spl/u-boot-spl.bin idbspl.img
+
+cat << __HEADER_EOF
+/dts-v1/;
+
+/ {
+	description = "Configuration to load ATF before U-Boot";
+	#address-cells = <1>;
+
+	images {
+		uboot@1 {
+			description = "U-Boot (64-bit)";
+			data = /incbin/("u-boot-nodtb.bin");
+			type = "standalone";
+			arch = "arm64";
+			compression = "none";
+			load = <0x00200000>;
+		};
+__HEADER_EOF
+
+atf_cnt=1
+
+for l in `readelf -l $BL31 | grep -A1 LOAD | gawk --non-decimal-data \
+	'{if (NR % 2) {printf "%d:0x%x:", $2,$4} else {printf "%d\n", $1}}'`
+do
+	offset=${l%%:*}
+	ll=${l#*:}
+	phy_offset=${ll%:*}
+	filesz=${ll##*:}
+
+	#echo "$offset/$phy_offset/$filesz"
+
+	of=rk3399bl31_${phy_offset}.bin
+	dd if=$BL31 of=$of bs=1 skip=$offset count=$filesz
+
+	out_string="${out_string}:${phy_offset}"
+
+	cat << __ATF1_EOF
+		atf@$atf_cnt {
+			description = "ARM Trusted Firmware";
+			data = /incbin/("$of");
+			type = "firmware";
+			arch = "arm64";
+			compression = "none";
+			load = <$phy_offset>;
+__ATF1_EOF
+	if [ "$atf_cnt" -eq 1 ]; then
+		cat << __ATF2_EOF
+			entry = <$phy_offset>;
+__ATF2_EOF
+		fi
+	cat << __ATF3_EOF
+		};
+__ATF3_EOF
+	atf_cnt=$((atf_cnt + 1))
+done
+
+cnt=1
+for dtname in $*
+do
+	cat << __FDT_IMAGE_EOF
+		fdt@$cnt {
+			description = "$(basename $dtname .dtb)";
+			data = /incbin/("$dtname");
+			type = "flat_dt";
+			compression = "none";
+		};
+__FDT_IMAGE_EOF
+	cnt=$((cnt+1))
+done
+
+cat << __CONF_HEADER_EOF
+	};
+	configurations {
+		default = "config@1";
+
+__CONF_HEADER_EOF
+
+cnt=1
+for dtname in $*
+do
+	cat << __CONF_SECTION_EOF
+		config@$cnt {
+			description = "$(basename $dtname .dtb)";
+			firmware = "uboot@1";
+			loadables = "atf@1","atf@2","atf@3";
+			fdt = "fdt@1";
+		};
+__CONF_SECTION_EOF
+	cnt=$((cnt+1))
+done
+
+cat << __ITS_EOF
+	};
+};
+__ITS_EOF

commit c460d3fb18a911ef5488fbbf7ca7733dcd7d31c8
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Aug 18 11:29:22 2017 +0800

    rockchip: firefly-rk3399: add FIT for rk3399
    
    Enable SPL_FIT_GENERATOR with path.
    
    Change-Id: I378f3d0cf9532279a3a9999d8343a9159521b56d
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
index 193e611460..3e88a37efd 100644
--- a/configs/firefly-rk3399_defconfig
+++ b/configs/firefly-rk3399_defconfig
@@ -9,6 +9,7 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3399-firefly"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_GENERATOR="board/rockchip/evb_rk3399/mk_fit_atf.sh"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000

commit dd866228e383a530a67334c462069b45d7866462
Author: David Wu <david.wu@rock-chips.com>
Date:   Mon Aug 14 15:04:28 2017 +0800

    rockchip: rk322x: Disable integrated macphy for saving power consuming
    
    Unfortunately, the integrated macphy default is enabled, which will
    increase power consuming, if we do not use this PHY. So let's disable
    it at first, which will save power consuming. If we really use it, then
    enable it in driver level.
    
    Change-Id: Ieafaf7e1e6fd74de2999fb3d27153e520968d13d
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk322x.h b/arch/arm/include/asm/arch-rockchip/grf_rk322x.h
index 26071c8ec8..c0c0d84cf1 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rk322x.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk322x.h
@@ -54,6 +54,32 @@ struct rk322x_grf {
 	unsigned int os_reg[8];
 	unsigned int reserved9[(0x604 - 0x5e4) / 4 - 1];
 	unsigned int ddrc_stat;
+	unsigned int reserved10[(0x680 - 0x604) / 4 - 1];
+	unsigned int sig_detect_con[2];
+	unsigned int reserved11[(0x690 - 0x684) / 4 - 1];
+	unsigned int sig_detect_status[2];
+	unsigned int reserved12[(0x6a0 - 0x694) / 4 - 1];
+	unsigned int sig_detect_clr[2];
+	unsigned int reserved13[(0x6b0 - 0x6a4) / 4 - 1];
+	unsigned int emmc_det;
+	unsigned int reserved14[(0x700 - 0x6b0) / 4 - 1];
+	unsigned int host0_con[3];
+	unsigned int reserved15;
+	unsigned int host1_con[3];
+	unsigned int reserved16;
+	unsigned int host2_con[3];
+	unsigned int reserved17[(0x760 - 0x728) / 4 - 1];
+	unsigned int usbphy0_con[27];
+	unsigned int reserved18[(0x800 - 0x7c8) / 4 - 1];
+	unsigned int usbphy1_con[27];
+	unsigned int reserved19[(0x880 - 0x868) / 4 - 1];
+	unsigned int otg_con0;
+	unsigned int uoc_status0;
+	unsigned int reserved20[(0x900 - 0x884) / 4 - 1];
+	unsigned int mac_con[2];
+	unsigned int reserved21[(0xb00 - 0x904) / 4 - 1];
+	unsigned int macphy_con[4];
+	unsigned int macphy_status;
 };
 check_member(rk322x_grf, ddrc_stat, 0x604);
 
@@ -516,4 +542,10 @@ enum {
 	CON_IOMUX_PWM0SEL_SHIFT	= 0,
 	CON_IOMUX_PWM0SEL_MASK	= 1 << CON_IOMUX_PWM0SEL_SHIFT,
 };
+
+/* GRF_MACPHY_CON0 */
+enum {
+	MACPHY_CFG_ENABLE_SHIFT = 0,
+	MACPHY_CFG_ENABLE_MASK  = 1 << MACPHY_CFG_ENABLE_SHIFT,
+};
 #endif
diff --git a/arch/arm/mach-rockchip/rk322x-board.c b/arch/arm/mach-rockchip/rk322x-board.c
index 2ef81bacf8..d97be336b6 100644
--- a/arch/arm/mach-rockchip/rk322x-board.c
+++ b/arch/arm/mach-rockchip/rk322x-board.c
@@ -72,7 +72,16 @@ int board_init(void)
 		     CON_IOMUX_UART2SEL_MASK,
 		     CON_IOMUX_UART2SEL_21 << CON_IOMUX_UART2SEL_SHIFT);
 
+	/*
+	* The integrated macphy is enabled by default, disable it
+	* for saving power consuming.
+	*/
+	rk_clrsetreg(&grf->macphy_con[0],
+		     MACPHY_CFG_ENABLE_MASK,
+		     0 << MACPHY_CFG_ENABLE_SHIFT);
+
 	rockchip_timer_init();
+
 	return 0;
 }
 

commit 0fb7615c973ca1470ae06fff4c05ce51b1b6ecbe
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Aug 9 19:26:05 2017 +0800

    rockchip: rk322x: enable fastboot to set boot mode tag
    
    To support fastboot "fastboot reboot-bootloader" cmd.
    
    Change-Id: Idf3055bdc86f851bfc68ee7f8b14fbdc21991dff
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk322x-board.c b/arch/arm/mach-rockchip/rk322x-board.c
index f5fe5235b4..2ef81bacf8 100644
--- a/arch/arm/mach-rockchip/rk322x-board.c
+++ b/arch/arm/mach-rockchip/rk322x-board.c
@@ -7,6 +7,7 @@
 #include <clk.h>
 #include <dm.h>
 #include <ram.h>
+#include <syscon.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/periph.h>
@@ -141,3 +142,17 @@ int board_usb_cleanup(int index, enum usb_init_type init)
 	return 0;
 }
 #endif
+
+#if defined(CONFIG_USB_FUNCTION_FASTBOOT)
+int fb_set_reboot_flag(void)
+{
+	struct rk322x_grf *grf;
+
+	printf("Setting reboot to fastboot flag ...\n");
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	/* Set boot mode to fastboot */
+	writel(BOOT_FASTBOOT, &grf->os_reg[0]);
+
+	return 0;
+}
+#endif

commit 21bd753785f618ef58f912c18333998cf2c2f578
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Aug 9 19:08:50 2017 +0800

    rockchip: enable rk322x sysreset driver
    
    The sysreset driver for rk322x is ready but not enabled,
    add it to Makefile to make sure it's enabled.
    
    Change-Id: If337fc0dca58367ea6f74e559c3cefcfc2c79115
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
index a5200d377d..476d361297 100644
--- a/drivers/sysreset/Makefile
+++ b/drivers/sysreset/Makefile
@@ -13,6 +13,7 @@ ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_ROCKCHIP_RK3036) += sysreset_rk3036.o
 endif
 obj-$(CONFIG_ROCKCHIP_RK3188) += sysreset_rk3188.o
+obj-$(CONFIG_ROCKCHIP_RK322X) += sysreset_rk322x.o
 obj-$(CONFIG_ROCKCHIP_RK3288) += sysreset_rk3288.o
 obj-$(CONFIG_ROCKCHIP_RK3328) += sysreset_rk3328.o
 obj-$(CONFIG_ROCKCHIP_RK3368) += sysreset_rk3368.o

commit 8a4ef50b80ee69aab1c3cbbe80fdba93284f7c94
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Aug 9 17:41:38 2017 +0800

    rockchip: rk3399: enable preboot for boot mode detect
    
    We need to get into preboot once we detect that we are not
    get into normal boot.
    
    Change-Id: I7e4b6eed990167b3b0fcca2fbc2beb0b5f40cd4b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index f342c29260..4fd325eeb0 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -72,6 +72,8 @@
 
 #endif
 
+#define CONFIG_PREBOOT
+
 /* enable usb config for usb ether */
 
 #endif

commit b24566395f6d47f594d42ceb3196496818e8cec6
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Aug 9 17:31:28 2017 +0800

    rockchip: rk3399: enable fastboot to set boot mode tag
    
    fastboot have a command "reboot-bootloader" which require the boot
    loader to reboot and get into fastboot mode again.
    
    Change-Id: Iac61c89fd3b93d771494287b738ac33d524cdc8a
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c
index dd5f8a87e0..a2810ec8b7 100644
--- a/arch/arm/mach-rockchip/rk3399/rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
@@ -95,3 +95,17 @@ int board_late_init(void)
 
 	return 0;
 }
+
+#if defined(CONFIG_USB_FUNCTION_FASTBOOT)
+int fb_set_reboot_flag(void)
+{
+	struct rk3399_pmugrf_regs *pmugrf;
+
+	printf("Setting reboot to fastboot flag ...\n");
+	pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
+	/* Clear boot mode */
+	writel(BOOT_FASTBOOT, &pmugrf->os_reg0);
+
+	return 0;
+}
+#endif

commit f9d5dc255d0cd7307a62fd3ec2ccbe621ea531da
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Aug 9 16:49:17 2017 +0800

    rockchip: rk3399: detect boot mode
    
    U-Boot fastboot, kernel may reboot with parameter which require
    bootloader to get into different boot mode, detect it and enter
    proper mode.
    
    Change-Id: I6d3596dc8862e69e489b8a1d8564f644de5ebdf5
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig b/arch/arm/mach-rockchip/rk3399/Kconfig
index 415466a49b..c4a6d46649 100644
--- a/arch/arm/mach-rockchip/rk3399/Kconfig
+++ b/arch/arm/mach-rockchip/rk3399/Kconfig
@@ -5,6 +5,7 @@ choice
 
 config TARGET_EVB_RK3399
 	bool "RK3399 evaluation board"
+	select BOARD_LATE_INIT
 	help
 	  RK3399evb is a evaluation board for Rockchp rk3399,
 	  with full function and phisical connectors support like type-C ports,
diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c
index dbc248f84a..dd5f8a87e0 100644
--- a/arch/arm/mach-rockchip/rk3399/rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
@@ -5,9 +5,13 @@
  */
 
 #include <common.h>
+#include <syscon.h>
 #include <asm/armv8/mmu.h>
-#include <asm/io.h>
+#include <asm/arch/boot_mode.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/grf_rk3399.h>
 #include <asm/arch/hardware.h>
+#include <asm/io.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -55,3 +59,39 @@ int arch_cpu_init(void)
 
 	return 0;
 }
+
+static void setup_boot_mode(void)
+{
+	struct rk3399_pmugrf_regs *pmugrf;
+	int boot_mode;
+
+	pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);;
+	boot_mode = readl(&pmugrf->os_reg0);
+	debug("boot mode %x\n", boot_mode);
+
+	/* Clear boot mode */
+	writel(BOOT_NORMAL, &pmugrf->os_reg0);
+
+	switch (boot_mode) {
+	case BOOT_FASTBOOT:
+		printf("enter fastboot!\n");
+		env_set("preboot", "setenv preboot; fastboot usb0");
+		break;
+	case BOOT_UMS:
+		printf("enter UMS!\n");
+		env_set("preboot", "setenv preboot; if mmc dev 0;"
+		       "then ums mmc 0; else ums mmc 1;fi");
+		break;
+	case BOOT_LOADER:
+		printf("enter Rockusb!\n");
+		env_set("preboot", "setenv preboot; rockusb 0 mmc 0");
+		break;
+	}
+}
+
+int board_late_init(void)
+{
+	setup_boot_mode();
+
+	return 0;
+}

commit 4c90d8abc4933e7e679e916756849bbd8712cffe
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Aug 4 15:03:45 2017 +0800

    rockchip: add BOOT_LOADER support for boot mode
    
    Rockchip using rockusb for flash emmc via USB, people
    use 'reboot loader' in kernel and then want to get a rockusb
    device in bootloader for firmware update.
    
    Change-Id: I16480f07761c2199443373aa54d458ca0851b708
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3036-board.c b/arch/arm/mach-rockchip/rk3036-board.c
index a3457f3914..1f11f8e6af 100644
--- a/arch/arm/mach-rockchip/rk3036-board.c
+++ b/arch/arm/mach-rockchip/rk3036-board.c
@@ -40,6 +40,10 @@ static void setup_boot_mode(void)
 		printf("enter UMS!\n");
 		env_set("preboot", "setenv preboot; ums mmc 0");
 		break;
+	case BOOT_LOADER:
+		printf("enter Rockusb!\n");
+		env_set("preboot", "setenv preboot; rockusb 0 mmc 0");
+		break;
 	}
 }
 
diff --git a/arch/arm/mach-rockchip/rk322x-board.c b/arch/arm/mach-rockchip/rk322x-board.c
index d57290da25..f5fe5235b4 100644
--- a/arch/arm/mach-rockchip/rk322x-board.c
+++ b/arch/arm/mach-rockchip/rk322x-board.c
@@ -36,6 +36,10 @@ static void setup_boot_mode(void)
 		printf("enter UMS!\n");
 		env_set("preboot", "setenv preboot; ums mmc 0");
 		break;
+	case BOOT_LOADER:
+		printf("enter Rockusb!\n");
+		env_set("preboot", "setenv preboot; rockusb 0 mmc 0");
+		break;
 	}
 }
 
diff --git a/arch/arm/mach-rockchip/rk3288-board.c b/arch/arm/mach-rockchip/rk3288-board.c
index 278bb406f0..535f871799 100644
--- a/arch/arm/mach-rockchip/rk3288-board.c
+++ b/arch/arm/mach-rockchip/rk3288-board.c
@@ -45,6 +45,10 @@ static void setup_boot_mode(void)
 		env_set("preboot", "setenv preboot; if mmc dev 0;"
 		       "then ums mmc 0; else ums mmc 1;fi");
 		break;
+	case BOOT_LOADER:
+		printf("enter Rockusb!\n");
+		env_set("preboot", "setenv preboot; rockusb 0 mmc 0");
+		break;
 	}
 }
 

commit a5a0ed380a40d18b733070cd05754133eb22c419
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Aug 4 14:36:25 2017 +0800

    rockchip: rk322x: update the sysreg number for boot mode
    
    The boot mode for rk322x is stored in sysreg 0, update it.
    
    Change-Id: I31babf99bdd7028c8ea1f068ed202c828f323391
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk322x-board.c b/arch/arm/mach-rockchip/rk322x-board.c
index f91043eec0..d57290da25 100644
--- a/arch/arm/mach-rockchip/rk322x-board.c
+++ b/arch/arm/mach-rockchip/rk322x-board.c
@@ -20,12 +20,12 @@ DECLARE_GLOBAL_DATA_PTR;
 static void setup_boot_mode(void)
 {
 	struct rk322x_grf *const grf = (void *)GRF_BASE;
-	int boot_mode = readl(&grf->os_reg[4]);
+	int boot_mode = readl(&grf->os_reg[0]);
 
 	debug("boot mode %x.\n", boot_mode);
 
 	/* Clear boot mode */
-	writel(BOOT_NORMAL, &grf->os_reg[4]);
+	writel(BOOT_NORMAL, &grf->os_reg[0]);
 
 	switch (boot_mode) {
 	case BOOT_FASTBOOT:

commit 398fe2d1cf91bf463be6bd984800f76f75397905
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Aug 4 14:22:00 2017 +0800

    rockchip: rk3229: move usb gadget into defconfig
    
    Use the defconfig for all usb gadget and function related
    option instead of define then in header file.
    
    Change-Id: Ibd21f6693ffb573c88eed69ddddeaa923cb9d8ea
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index 5a658a1495..668e01a8e5 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -12,11 +12,19 @@ CONFIG_DEBUG_UART=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200
+CONFIG_FASTBOOT=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_CMD_FASTBOOT=y
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_FASTBOOT_BUF_ADDR=0x60800800
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_TIME=y
 CONFIG_SPL_OF_CONTROL=y
@@ -43,6 +51,7 @@ CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
+CONFIG_USB_DWC2=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h
index fa9abc0a56..cf7894dcb2 100644
--- a/include/configs/rk322x_common.h
+++ b/include/configs/rk322x_common.h
@@ -39,11 +39,9 @@
 #define SDRAM_MAX_SIZE			0x80000000
 
 #ifndef CONFIG_SPL_BUILD
-/* usb otg */
 
 /* usb mass storage */
 #define CONFIG_USB_FUNCTION_MASS_STORAGE
-#define CONFIG_CMD_USB_MASS_STORAGE
 
 /* usb host */
 #define ENV_MEM_LAYOUT_SETTINGS \

commit bf50816db1ed4adf8e9a6cd01955376b6f971457
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Aug 4 14:19:49 2017 +0800

    rockchip: enable rockusb for all rockchip SoCs
    
    Rockusb will be used by all the rockchip SoCs, enable it by
    default in Kconfig, and it can be work if USB gadget is available.
    
    Change-Id: Iec93f12202b20dc8e1b4969bd69594014c30888e
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 53eae8953e..b84ecb7983 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1084,6 +1084,7 @@ config ARCH_ROCKCHIP
 	select DM_PWM
 	select DM_REGULATOR
 	imply CMD_FASTBOOT
+	imply CMD_ROCKUSB
 	imply FASTBOOT
 	imply FAT_WRITE
 	imply USB_FUNCTION_FASTBOOT

commit 8a3fd8428ed691fa47354b661fde0c468e69c059
Author: Eddie Cai <eddie.cai.linux@gmail.com>
Date:   Thu May 25 16:50:33 2017 +0800

    rockchip:usb: add a simple readme for rockusb
    
    add a simple readme to introduce rockusb and tell people how to use it
    
    Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    
    Changes in v7:
    -none
    
    Changes in v6:
    -none
    
    Changes in v5:
    -none
    
    Changes in v4:
    -add some blank line to make it look better
    
    Changes in v3:
    -fix checkpatch error

diff --git a/doc/README.rockusb b/doc/README.rockusb
new file mode 100644
index 0000000000..5405dc48c1
--- /dev/null
+++ b/doc/README.rockusb
@@ -0,0 +1,51 @@
+Rockusb (Rockchip USB protocol)
+=====================================================
+
+Overview
+--------
+
+Rockusb protocol is widely used by Rockchip SoC based devices. It can
+read/write info, image to/from devices. This document briefly describes how to
+use Rockusb for upgrading firmware (e.g. kernel, u-boot, rootfs, etc.).
+
+Tools
+--------
+There are many tools can support Rockusb protocol. rkdeveloptool
+(https://github.com/rockchip-linux/rkdeveloptool) is open source,
+It is maintained by Rockchip. People don't want to build from source
+can download from here
+(https://github.com/rockchip-linux/rkbin/blob/master/tools/rkdeveloptool)
+
+Usage
+--------
+The Usage of Rockusb command is:
+
+rockusb <USB_controller> <devtype> <dev[:part]>
+
+e.g. rockusb 0 mmc 0
+
+On your U-Boot console, type this command to enter rockusb mode.
+On your host PC. use lsusb command. you should see a usb device
+using 0x2207 as its USB verdor id.
+
+for more detail about the rkdeveloptool. please read the usage.
+
+rkdeveloptool -h
+
+use rkdeveloptool wl command to write lba. BeginSec is the lba on device
+you want to write.
+
+sudo rkdeveloptool wl  <BeginSec> <File>
+
+to flash U-Boot image use below command. U-Boot binary is made by mkimage.
+see doc/README.rockchip for more detail about how to get U-Boot binary.
+
+sudo rkdeveloptool wl  64 <U-Boot binary>
+
+There are plenty of Rockusb command. but wl(write lba) and
+rd(reboot) command. These two command can let people flash
+image to device.
+
+To do
+-----
+* Fully support Rockusb protocol

commit 301fce6d0e4d677efe092fe8ccc30d965500957a
Author: Eddie Cai <eddie.cai.linux@gmail.com>
Date:   Thu May 25 16:50:32 2017 +0800

    usb: rockchip: add rockusb command
    
    this patch add rockusb command. the usage is
    rockusb <USB_controller> <devtype> <dev[:part]>
    e.g. rockusb 0 mmc 0
    
    Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    
    Changes in v7:
    -none
    
    Changes in v6:
    -none
    
    Changes in v5:
    -none
    
    Changes in v4:
    -move USB_FUNCTION_ROCKUSB to drivers/usb/gadget/Kconfig
    -modify the dependence
    
    Changes in v3:
    -fix comment from Simon and Lukasz
    -fix checkpactch error

diff --git a/cmd/Kconfig b/cmd/Kconfig
index d6d130edfa..30bf556fd2 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -831,6 +831,15 @@ config CMD_REMOTEPROC
 	help
 	  Support for Remote Processor control
 
+config CMD_ROCKUSB
+	bool "rockusb"
+	depends on USB_FUNCTION_ROCKUSB
+	help
+	  Rockusb protocol is widely used by Rockchip SoC based devices. It can
+	  read/write info, image to/from devices. This enable rockusb command
+	  support to comunication with rockusb device. for more detail about
+	  this command, please read doc/README.rockusb.
+
 config CMD_SATA
 	bool "sata - Access SATA subsystem"
 	select SATA
diff --git a/cmd/Makefile b/cmd/Makefile
index 2a5b8ce825..caabfd7528 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -104,6 +104,7 @@ obj-$(CONFIG_CMD_READ) += read.o
 obj-$(CONFIG_CMD_REGINFO) += reginfo.o
 obj-$(CONFIG_CMD_REISER) += reiser.o
 obj-$(CONFIG_CMD_REMOTEPROC) += remoteproc.o
+obj-$(CONFIG_CMD_ROCKUSB) += rockusb.o
 obj-$(CONFIG_SANDBOX) += host.o
 obj-$(CONFIG_CMD_SATA) += sata.o
 obj-$(CONFIG_CMD_NVME) += nvme.o
diff --git a/cmd/rockusb.c b/cmd/rockusb.c
new file mode 100644
index 0000000000..ae2baa672b
--- /dev/null
+++ b/cmd/rockusb.c
@@ -0,0 +1,74 @@
+/*
+ * Copyright (C) 2017 Eddie Cai <eddie.cai.linux@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <command.h>
+#include <console.h>
+#include <g_dnl.h>
+#include <usb.h>
+#include <asm/arch/f_rockusb.h>
+
+static int do_rockusb(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+{
+	int controller_index, dev_index;
+	char *usb_controller;
+	char *devtype;
+	char *devnum;
+	int ret;
+
+	if (argc < 2)
+		return CMD_RET_USAGE;
+
+	usb_controller = argv[1];
+	controller_index = simple_strtoul(usb_controller, NULL, 0);
+
+	if (argc >= 4) {
+		devtype = argv[2];
+		devnum  = argv[3];
+	} else {
+		return CMD_RET_USAGE;
+	}
+	dev_index = simple_strtoul(devnum, NULL, 0);
+	rockusb_dev_init(devtype, dev_index);
+
+	ret = board_usb_init(controller_index, USB_INIT_DEVICE);
+	if (ret) {
+		error("USB init failed: %d", ret);
+		return CMD_RET_FAILURE;
+	}
+
+	g_dnl_clear_detach();
+	ret = g_dnl_register("usb_dnl_rockusb");
+	if (ret)
+		return CMD_RET_FAILURE;
+
+	if (!g_dnl_board_usb_cable_connected()) {
+		puts("\rUSB cable not detected, Command exit.\n");
+		ret = CMD_RET_FAILURE;
+		goto exit;
+	}
+
+	while (1) {
+		if (g_dnl_detach())
+			break;
+		if (ctrlc())
+			break;
+		usb_gadget_handle_interrupts(controller_index);
+	}
+	ret = CMD_RET_SUCCESS;
+
+exit:
+	g_dnl_unregister();
+	g_dnl_clear_detach();
+	board_usb_cleanup(controller_index, USB_INIT_DEVICE);
+
+	return ret;
+}
+
+U_BOOT_CMD(rockusb, 4, 1, do_rockusb,
+	   "use the rockusb protocol",
+	   "<USB_controller> <devtype> <dev[:part]>  e.g. rockusb 0 mmc 0\n"
+);

commit c7cd0ba49a960f25f65b00de957671d05dbe0dd9
Author: Eddie Cai <eddie.cai.linux@gmail.com>
Date:   Thu May 25 16:50:31 2017 +0800

    usb: rockchip: add the rockusb gadget
    
    this patch implement rockusb protocol on the device side. this is based on USB
    download gadget infrastructure. the rockusb function implements the rd, wl, rid
    commands. it can work with rkdeveloptool
    
    Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    
    Changes in v7:
    -none
    
    Changes in v6:
    -move some data to f_rockusb structure
    
    Changes in v5:
    -fix build error when build non-rockchip board
    -fix checkpatch error
    
    Changes in v4:
    -use enum instead of macro define
    -move some structure define and macro to f_rockusb.h
    -add some function comment as Simon required
    -address other comment from Simon
    -fix build error as Lukasz point out
    
    Changes in v3:
    -split the macro to f_rockusb.h
    -use ALLOC_CACHE_ALIGN_BUFFER to define cache safe struct inside the function.
    -fix checkpatch error

diff --git a/arch/arm/include/asm/arch-rockchip/f_rockusb.h b/arch/arm/include/asm/arch-rockchip/f_rockusb.h
new file mode 100644
index 0000000000..c207a787f9
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/f_rockusb.h
@@ -0,0 +1,132 @@
+/*
+ * (C) Copyright 2017
+ *
+ * Eddie Cai <eddie.cai.linux@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _F_ROCKUSB_H_
+#define _F_ROCKUSB_H_
+#include <blk.h>
+
+#define ROCKUSB_VERSION		"0.1"
+
+#define ROCKUSB_INTERFACE_CLASS	0xff
+#define ROCKUSB_INTERFACE_SUB_CLASS	0x06
+#define ROCKUSB_INTERFACE_PROTOCOL	0x05
+
+#define RX_ENDPOINT_MAXIMUM_PACKET_SIZE_2_0  (0x0200)
+#define RX_ENDPOINT_MAXIMUM_PACKET_SIZE_1_1  (0x0040)
+#define TX_ENDPOINT_MAXIMUM_PACKET_SIZE      (0x0040)
+
+#define EP_BUFFER_SIZE			4096
+/*
+ * EP_BUFFER_SIZE must always be an integral multiple of maxpacket size
+ * (64 or 512 or 1024), else we break on certain controllers like DWC3
+ * that expect bulk OUT requests to be divisible by maxpacket size.
+ */
+
+#define CONFIG_ROCKUSB_BUF_ADDR		CONFIG_SYS_LOAD_ADDR
+#define CONFIG_ROCKUSB_BUF_SIZE		0x08000000
+
+#define RKUSB_STATUS_IDLE			0
+#define RKUSB_STATUS_CMD			1
+#define RKUSB_STATUS_RXDATA			2
+#define RKUSB_STATUS_TXDATA			3
+#define RKUSB_STATUS_CSW			4
+#define RKUSB_STATUS_RXDATA_PREPARE		5
+#define RKUSB_STATUS_TXDATA_PREPARE		6
+
+enum rkusb_command {
+K_FW_TEST_UNIT_READY	= 0x00,
+K_FW_READ_FLASH_ID = 0x01,
+K_FW_SET_DEVICE_ID = 0x02,
+K_FW_TEST_BAD_BLOCK = 0x03,
+K_FW_READ_10 = 0x04,
+K_FW_WRITE_10 = 0x05,
+K_FW_ERASE_10 = 0x06,
+K_FW_WRITE_SPARE = 0x07,
+K_FW_READ_SPARE = 0x08,
+
+K_FW_ERASE_10_FORCE = 0x0b,
+K_FW_GET_VERSION = 0x0c,
+
+K_FW_LBA_READ_10 = 0x14,
+K_FW_LBA_WRITE_10 = 0x15,
+K_FW_ERASE_SYS_DISK = 0x16,
+K_FW_SDRAM_READ_10 = 0x17,
+K_FW_SDRAM_WRITE_10 = 0x18,
+K_FW_SDRAM_EXECUTE = 0x19,
+K_FW_READ_FLASH_INFO = 0x1A,
+K_FW_GET_CHIP_VER = 0x1B,
+K_FW_LOW_FORMAT = 0x1C,
+K_FW_SET_RESET_FLAG = 0x1E,
+K_FW_SPI_READ_10 = 0x21,
+K_FW_SPI_WRITE_10 = 0x22,
+
+K_FW_SESSION = 0X30,
+K_FW_RESET = 0xff,
+};
+
+#define CBW_DIRECTION_OUT		0x00
+#define CBW_DIRECTION_IN		0x80
+
+struct cmd_dispatch_info {
+	enum rkusb_command cmd;
+	/* call back function to handle rockusb command */
+	void (*cb)(struct usb_ep *ep, struct usb_request *req);
+};
+
+/* Bulk-only data structures */
+
+/* Command Block Wrapper */
+struct fsg_bulk_cb_wrap {
+	__le32  signature;              /* Contains 'USBC' */
+	u32     tag;                    /* Unique per command id */
+	__le32  data_transfer_length;   /* Size of the data */
+	u8      flags;                  /* Direction in bit 7 */
+	u8      lun;                    /* lun (normally 0) */
+	u8      length;                 /* Of the CDB, <= MAX_COMMAND_SIZE */
+	u8      CDB[16];                /* Command Data Block */
+};
+
+#define USB_BULK_CB_WRAP_LEN    31
+#define USB_BULK_CB_SIG         0x43425355      /* Spells out USBC */
+#define USB_BULK_IN_FLAG        0x80
+
+/* Command status Wrapper */
+struct bulk_cs_wrap {
+	__le32  signature;              /* Should = 'USBS' */
+	u32     tag;                    /* Same as original command */
+	__le32  residue;                /* Amount not transferred */
+	u8      status;                 /* See below */
+};
+
+#define USB_BULK_CS_WRAP_LEN    13
+#define USB_BULK_CS_SIG         0x53425355      /* Spells out 'USBS' */
+#define USB_STATUS_PASS         0
+#define USB_STATUS_FAIL         1
+#define USB_STATUS_PHASE_ERROR  2
+
+#define CSW_GOOD                0x00
+#define CSW_FAIL                0x01
+
+struct f_rockusb {
+	struct usb_function usb_function;
+	struct usb_ep *in_ep, *out_ep;
+	struct usb_request *in_req, *out_req;
+	char *rockusb_dev_type;
+	unsigned int rockusb_dev_index;
+	unsigned int download_tag;
+	unsigned int download_lba;
+	unsigned int download_size;
+	unsigned int download_bytes;
+	struct blk_desc *download_desc;
+	int reboot_flag;
+};
+
+/* init rockusb device, tell rockusb which device you want to read/write*/
+void rockusb_dev_init(char *dev_type, int dev_index);
+#endif /* _F_ROCKUSB_H_ */
+
diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index e065c5aeb3..8e3a886536 100644
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -1123,7 +1123,7 @@ static int dwc3_gadget_ep_dequeue(struct usb_ep *ep,
 			dwc3_stop_active_transfer(dwc, dep->number, true);
 			goto out1;
 		}
-		dev_err(dwc->dev, "request %p was not queued to %s\n",
+		dev_vdbg(dwc->dev, "request %p was not queued to %s\n",
 				request, ep->name);
 		ret = -EINVAL;
 		goto out0;
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index 225b66bc95..423d1f248e 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -119,6 +119,14 @@ config G_DNL_VENDOR_NUM
 config G_DNL_PRODUCT_NUM
 	hex "Product ID of USB device"
 
+config USB_FUNCTION_ROCKUSB
+	bool "Enable USB rockusb gadget"
+	help
+	  Rockusb protocol is widely used by Rockchip SoC based devices. It can
+	  read/write info, image to/from devices. This enables the USB part of
+	  the rockusb gadget.for more detail about Rockusb protocol, please see
+	  doc/README.rockusb
+
 config USBNET_DEVADDR
 	string "USB Gadget Ethernet device mac address"
 	default "de:ad:be:ef:00:01"
diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile
index 7258099c1c..691f373aeb 100644
--- a/drivers/usb/gadget/Makefile
+++ b/drivers/usb/gadget/Makefile
@@ -29,6 +29,7 @@ obj-$(CONFIG_USB_FUNCTION_THOR) += f_thor.o
 obj-$(CONFIG_USB_FUNCTION_DFU) += f_dfu.o
 obj-$(CONFIG_USB_FUNCTION_MASS_STORAGE) += f_mass_storage.o
 obj-$(CONFIG_USB_FUNCTION_FASTBOOT) += f_fastboot.o
+obj-$(CONFIG_USB_FUNCTION_ROCKUSB) += f_rockusb.o
 obj-$(CONFIG_USB_FUNCTION_SDP) += f_sdp.o
 endif
 endif
diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
new file mode 100644
index 0000000000..d218b6da8f
--- /dev/null
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -0,0 +1,691 @@
+/*
+ * (C) Copyright 2017
+ *
+ * Eddie Cai <eddie.cai.linux@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <config.h>
+#include <common.h>
+#include <errno.h>
+#include <malloc.h>
+#include <memalign.h>
+#include <linux/usb/ch9.h>
+#include <linux/usb/gadget.h>
+#include <linux/usb/composite.h>
+#include <linux/compiler.h>
+#include <version.h>
+#include <g_dnl.h>
+#include <asm/arch/f_rockusb.h>
+
+static inline struct f_rockusb *func_to_rockusb(struct usb_function *f)
+{
+	return container_of(f, struct f_rockusb, usb_function);
+}
+
+static struct usb_endpoint_descriptor fs_ep_in = {
+	.bLength            = USB_DT_ENDPOINT_SIZE,
+	.bDescriptorType    = USB_DT_ENDPOINT,
+	.bEndpointAddress   = USB_DIR_IN,
+	.bmAttributes       = USB_ENDPOINT_XFER_BULK,
+	.wMaxPacketSize     = cpu_to_le16(64),
+};
+
+static struct usb_endpoint_descriptor fs_ep_out = {
+	.bLength		= USB_DT_ENDPOINT_SIZE,
+	.bDescriptorType	= USB_DT_ENDPOINT,
+	.bEndpointAddress	= USB_DIR_OUT,
+	.bmAttributes		= USB_ENDPOINT_XFER_BULK,
+	.wMaxPacketSize		= cpu_to_le16(64),
+};
+
+static struct usb_endpoint_descriptor hs_ep_in = {
+	.bLength		= USB_DT_ENDPOINT_SIZE,
+	.bDescriptorType	= USB_DT_ENDPOINT,
+	.bEndpointAddress	= USB_DIR_IN,
+	.bmAttributes		= USB_ENDPOINT_XFER_BULK,
+	.wMaxPacketSize		= cpu_to_le16(512),
+};
+
+static struct usb_endpoint_descriptor hs_ep_out = {
+	.bLength		= USB_DT_ENDPOINT_SIZE,
+	.bDescriptorType	= USB_DT_ENDPOINT,
+	.bEndpointAddress	= USB_DIR_OUT,
+	.bmAttributes		= USB_ENDPOINT_XFER_BULK,
+	.wMaxPacketSize		= cpu_to_le16(512),
+};
+
+static struct usb_interface_descriptor interface_desc = {
+	.bLength		= USB_DT_INTERFACE_SIZE,
+	.bDescriptorType	= USB_DT_INTERFACE,
+	.bInterfaceNumber	= 0x00,
+	.bAlternateSetting	= 0x00,
+	.bNumEndpoints		= 0x02,
+	.bInterfaceClass	= ROCKUSB_INTERFACE_CLASS,
+	.bInterfaceSubClass	= ROCKUSB_INTERFACE_SUB_CLASS,
+	.bInterfaceProtocol	= ROCKUSB_INTERFACE_PROTOCOL,
+};
+
+static struct usb_descriptor_header *rkusb_fs_function[] = {
+	(struct usb_descriptor_header *)&interface_desc,
+	(struct usb_descriptor_header *)&fs_ep_in,
+	(struct usb_descriptor_header *)&fs_ep_out,
+};
+
+static struct usb_descriptor_header *rkusb_hs_function[] = {
+	(struct usb_descriptor_header *)&interface_desc,
+	(struct usb_descriptor_header *)&hs_ep_in,
+	(struct usb_descriptor_header *)&hs_ep_out,
+	NULL,
+};
+
+static const char rkusb_name[] = "Rockchip Rockusb";
+
+static struct usb_string rkusb_string_defs[] = {
+	[0].s = rkusb_name,
+	{  }			/* end of list */
+};
+
+static struct usb_gadget_strings stringtab_rkusb = {
+	.language	= 0x0409,	/* en-us */
+	.strings	= rkusb_string_defs,
+};
+
+static struct usb_gadget_strings *rkusb_strings[] = {
+	&stringtab_rkusb,
+	NULL,
+};
+
+static struct f_rockusb *rockusb_func;
+static void rx_handler_command(struct usb_ep *ep, struct usb_request *req);
+static int rockusb_tx_write_csw(u32 tag, int residue, u8 status, int size);
+
+struct f_rockusb *get_rkusb(void)
+{
+	struct f_rockusb *f_rkusb = rockusb_func;
+	if (!f_rkusb) {
+		f_rkusb = memalign(CONFIG_SYS_CACHELINE_SIZE, sizeof(*f_rkusb));
+		if (!f_rkusb)
+			return 0;
+
+		rockusb_func = f_rkusb;
+		memset(f_rkusb, 0, sizeof(*f_rkusb));
+	}
+	return f_rkusb;
+}
+
+static struct usb_endpoint_descriptor *rkusb_ep_desc(
+struct usb_gadget *g,
+struct usb_endpoint_descriptor *fs,
+struct usb_endpoint_descriptor *hs)
+{
+	if (gadget_is_dualspeed(g) && g->speed == USB_SPEED_HIGH)
+		return hs;
+	return fs;
+}
+
+static void rockusb_complete(struct usb_ep *ep, struct usb_request *req)
+{
+	int status = req->status;
+	if (!status)
+		return;
+	debug("status: %d ep '%s' trans: %d\n", status, ep->name, req->actual);
+}
+
+/* config the rockusb device*/
+static int rockusb_bind(struct usb_configuration *c, struct usb_function *f)
+{
+	int id;
+	struct usb_gadget *gadget = c->cdev->gadget;
+	struct f_rockusb *f_rkusb = func_to_rockusb(f);
+	const char *s;
+
+	id = usb_interface_id(c, f);
+	if (id < 0)
+		return id;
+	interface_desc.bInterfaceNumber = id;
+
+	id = usb_string_id(c->cdev);
+	if (id < 0)
+		return id;
+
+	rkusb_string_defs[0].id = id;
+	interface_desc.iInterface = id;
+
+	f_rkusb->in_ep = usb_ep_autoconfig(gadget, &fs_ep_in);
+	if (!f_rkusb->in_ep)
+		return -ENODEV;
+	f_rkusb->in_ep->driver_data = c->cdev;
+
+	f_rkusb->out_ep = usb_ep_autoconfig(gadget, &fs_ep_out);
+	if (!f_rkusb->out_ep)
+		return -ENODEV;
+	f_rkusb->out_ep->driver_data = c->cdev;
+
+	f->descriptors = rkusb_fs_function;
+
+	if (gadget_is_dualspeed(gadget)) {
+		hs_ep_in.bEndpointAddress = fs_ep_in.bEndpointAddress;
+		hs_ep_out.bEndpointAddress = fs_ep_out.bEndpointAddress;
+		f->hs_descriptors = rkusb_hs_function;
+	}
+
+	s = env_get("serial#");
+	if (s)
+		g_dnl_set_serialnumber((char *)s);
+
+	return 0;
+}
+
+static void rockusb_unbind(struct usb_configuration *c, struct usb_function *f)
+{
+	/* clear the configuration*/
+	memset(rockusb_func, 0, sizeof(*rockusb_func));
+}
+
+static void rockusb_disable(struct usb_function *f)
+{
+	struct f_rockusb *f_rkusb = func_to_rockusb(f);
+
+	usb_ep_disable(f_rkusb->out_ep);
+	usb_ep_disable(f_rkusb->in_ep);
+
+	if (f_rkusb->out_req) {
+		free(f_rkusb->out_req->buf);
+		usb_ep_free_request(f_rkusb->out_ep, f_rkusb->out_req);
+		f_rkusb->out_req = NULL;
+	}
+	if (f_rkusb->in_req) {
+		free(f_rkusb->in_req->buf);
+		usb_ep_free_request(f_rkusb->in_ep, f_rkusb->in_req);
+		f_rkusb->in_req = NULL;
+	}
+}
+
+static struct usb_request *rockusb_start_ep(struct usb_ep *ep)
+{
+	struct usb_request *req;
+
+	req = usb_ep_alloc_request(ep, 0);
+	if (!req)
+		return NULL;
+
+	req->length = EP_BUFFER_SIZE;
+	req->buf = memalign(CONFIG_SYS_CACHELINE_SIZE, EP_BUFFER_SIZE);
+	if (!req->buf) {
+		usb_ep_free_request(ep, req);
+		return NULL;
+	}
+	memset(req->buf, 0, req->length);
+
+	return req;
+}
+
+static int rockusb_set_alt(struct usb_function *f,
+			    unsigned interface, unsigned alt)
+{
+	int ret;
+	struct usb_composite_dev *cdev = f->config->cdev;
+	struct usb_gadget *gadget = cdev->gadget;
+	struct f_rockusb *f_rkusb = func_to_rockusb(f);
+	const struct usb_endpoint_descriptor *d;
+
+	debug("%s: func: %s intf: %d alt: %d\n",
+	      __func__, f->name, interface, alt);
+
+	d = rkusb_ep_desc(gadget, &fs_ep_out, &hs_ep_out);
+	ret = usb_ep_enable(f_rkusb->out_ep, d);
+	if (ret) {
+		printf("failed to enable out ep\n");
+		return ret;
+	}
+
+	f_rkusb->out_req = rockusb_start_ep(f_rkusb->out_ep);
+	if (!f_rkusb->out_req) {
+		printf("failed to alloc out req\n");
+		ret = -EINVAL;
+		goto err;
+	}
+	f_rkusb->out_req->complete = rx_handler_command;
+
+	d = rkusb_ep_desc(gadget, &fs_ep_in, &hs_ep_in);
+	ret = usb_ep_enable(f_rkusb->in_ep, d);
+	if (ret) {
+		printf("failed to enable in ep\n");
+		goto err;
+	}
+
+	f_rkusb->in_req = rockusb_start_ep(f_rkusb->in_ep);
+	if (!f_rkusb->in_req) {
+		printf("failed alloc req in\n");
+		ret = -EINVAL;
+		goto err;
+	}
+	f_rkusb->in_req->complete = rockusb_complete;
+
+	ret = usb_ep_queue(f_rkusb->out_ep, f_rkusb->out_req, 0);
+	if (ret)
+		goto err;
+
+	return 0;
+err:
+	rockusb_disable(f);
+	return ret;
+}
+
+static int rockusb_add(struct usb_configuration *c)
+{
+	struct f_rockusb *f_rkusb = get_rkusb();
+	int status;
+
+	debug("%s: cdev: 0x%p\n", __func__, c->cdev);
+
+	f_rkusb->usb_function.name = "f_rockusb";
+	f_rkusb->usb_function.bind = rockusb_bind;
+	f_rkusb->usb_function.unbind = rockusb_unbind;
+	f_rkusb->usb_function.set_alt = rockusb_set_alt;
+	f_rkusb->usb_function.disable = rockusb_disable;
+	f_rkusb->usb_function.strings = rkusb_strings;
+
+	status = usb_add_function(c, &f_rkusb->usb_function);
+	if (status) {
+		free(f_rkusb);
+		rockusb_func = f_rkusb;
+	}
+	return status;
+}
+
+void rockusb_dev_init(char *dev_type, int dev_index)
+{
+	struct f_rockusb *f_rkusb = get_rkusb();
+	f_rkusb->rockusb_dev_type = dev_type;
+	f_rkusb->rockusb_dev_index = dev_index;
+}
+
+DECLARE_GADGET_BIND_CALLBACK(usb_dnl_rockusb, rockusb_add);
+
+static int rockusb_tx_write(const char *buffer, unsigned int buffer_size)
+{
+	struct usb_request *in_req = rockusb_func->in_req;
+	int ret;
+
+	memcpy(in_req->buf, buffer, buffer_size);
+	in_req->length = buffer_size;
+	usb_ep_dequeue(rockusb_func->in_ep, in_req);
+	ret = usb_ep_queue(rockusb_func->in_ep, in_req, 0);
+	if (ret)
+		printf("Error %d on queue\n", ret);
+	return 0;
+}
+
+static int rockusb_tx_write_str(const char *buffer)
+{
+	return rockusb_tx_write(buffer, strlen(buffer));
+}
+
+#ifdef DEBUG
+static void printcbw(char *buf)
+{
+	ALLOC_CACHE_ALIGN_BUFFER(struct fsg_bulk_cb_wrap, cbw,
+				 sizeof(struct fsg_bulk_cb_wrap));
+
+	memcpy((char *)cbw, buf, USB_BULK_CB_WRAP_LEN);
+
+	debug("cbw: signature:%x\n", cbw->signature);
+	debug("cbw: tag=%x\n", cbw->tag);
+	debug("cbw: data_transfer_length=%d\n", cbw->data_transfer_length);
+	debug("cbw: flags=%x\n", cbw->flags);
+	debug("cbw: lun=%d\n", cbw->lun);
+	debug("cbw: length=%d\n", cbw->length);
+	debug("cbw: ucOperCode=%x\n", cbw->CDB[0]);
+	debug("cbw: ucReserved=%x\n", cbw->CDB[1]);
+	debug("cbw: dwAddress:%x %x %x %x\n", cbw->CDB[5], cbw->CDB[4],
+	      cbw->CDB[3], cbw->CDB[2]);
+	debug("cbw: ucReserved2=%x\n", cbw->CDB[6]);
+	debug("cbw: uslength:%x %x\n", cbw->CDB[8], cbw->CDB[7]);
+}
+
+static void printcsw(char *buf)
+{
+	ALLOC_CACHE_ALIGN_BUFFER(struct bulk_cs_wrap, csw,
+				 sizeof(struct bulk_cs_wrap));
+	memcpy((char *)csw, buf, USB_BULK_CS_WRAP_LEN);
+	debug("csw: signature:%x\n", csw->signature);
+	debug("csw: tag:%x\n", csw->tag);
+	debug("csw: residue:%x\n", csw->residue);
+	debug("csw: status:%x\n", csw->status);
+}
+#endif
+
+static int rockusb_tx_write_csw(u32 tag, int residue, u8 status, int size)
+{
+	ALLOC_CACHE_ALIGN_BUFFER(struct bulk_cs_wrap, csw,
+				 sizeof(struct bulk_cs_wrap));
+	csw->signature = cpu_to_le32(USB_BULK_CS_SIG);
+	csw->tag = tag;
+	csw->residue = cpu_to_be32(residue);
+	csw->status = status;
+#ifdef DEBUG
+	printcsw((char *)&csw);
+#endif
+	return rockusb_tx_write((char *)csw, size);
+}
+
+static unsigned int rx_bytes_expected(struct usb_ep *ep)
+{
+	struct f_rockusb *f_rkusb = get_rkusb();
+	int rx_remain = f_rkusb->download_size - f_rkusb->download_bytes;
+	unsigned int rem;
+	unsigned int maxpacket = ep->maxpacket;
+
+	if (rx_remain <= 0)
+		return 0;
+	else if (rx_remain > EP_BUFFER_SIZE)
+		return EP_BUFFER_SIZE;
+
+	rem = rx_remain % maxpacket;
+	if (rem > 0)
+		rx_remain = rx_remain + (maxpacket - rem);
+
+	return rx_remain;
+}
+
+/* usb_request complete call back to handle down load image */
+static void rx_handler_dl_image(struct usb_ep *ep, struct usb_request *req)
+{
+	struct f_rockusb *f_rkusb = get_rkusb();
+	unsigned int transfer_size = 0;
+	const unsigned char *buffer = req->buf;
+	unsigned int buffer_size = req->actual;
+
+	transfer_size = f_rkusb->download_size - f_rkusb->download_bytes;
+	if (!f_rkusb->download_desc) {
+		printf("rx_handler_dl_image blk_get_dev\n");
+		f_rkusb->download_desc = blk_get_dev(f_rkusb->rockusb_dev_type,
+				f_rkusb->rockusb_dev_index);
+		if (!f_rkusb->download_desc ||
+		    f_rkusb->download_desc->type == DEV_TYPE_UNKNOWN) {
+			error("invalid mmc device\n");
+			rockusb_tx_write_csw(f_rkusb->download_tag, 0, CSW_FAIL,
+					     USB_BULK_CS_WRAP_LEN);
+			return;
+		}
+	}
+
+	if (req->status != 0) {
+		printf("Bad status: %d\n", req->status);
+		rockusb_tx_write_csw(f_rkusb->download_tag, 0,
+				     CSW_FAIL, USB_BULK_CS_WRAP_LEN);
+		return;
+	}
+
+	if (buffer_size < transfer_size)
+		transfer_size = buffer_size;
+
+	memcpy((void *)CONFIG_ROCKUSB_BUF_ADDR + f_rkusb->download_bytes,
+	       buffer, transfer_size);
+	f_rkusb->download_bytes += transfer_size;
+
+	/* Check if transfer is done */
+	if (f_rkusb->download_bytes >= f_rkusb->download_size) {
+		int blks = 0, blkcnt = f_rkusb->download_size/512;
+		debug("download %d bytes finished, start writing to lba %x\n",
+		       f_rkusb->download_bytes, f_rkusb->download_lba);
+		blks = blk_dwrite(f_rkusb->download_desc,
+				  f_rkusb->download_lba, blkcnt,
+					(char *)CONFIG_ROCKUSB_BUF_ADDR);
+		if (blks != blkcnt) {
+			error("failed writing to device %s: %d\n",
+			      f_rkusb->rockusb_dev_type,
+			      f_rkusb->rockusb_dev_index);
+			rockusb_tx_write_csw(f_rkusb->download_tag, 0,
+					     CSW_FAIL, USB_BULK_CS_WRAP_LEN);
+			return;
+		}
+
+		req->complete = rx_handler_command;
+		req->length = EP_BUFFER_SIZE;
+		f_rkusb->download_size = 0;
+		debug("done\n");
+		rockusb_tx_write_csw(f_rkusb->download_tag, 0, CSW_GOOD,
+				     USB_BULK_CS_WRAP_LEN);
+	} else {
+		req->length = rx_bytes_expected(ep);
+	}
+
+	req->actual = 0;
+	usb_ep_queue(ep, req, 0);
+}
+
+static void cb_test_unit_ready(struct usb_ep *ep, struct usb_request *req)
+{
+	ALLOC_CACHE_ALIGN_BUFFER(struct fsg_bulk_cb_wrap, cbw,
+				 sizeof(struct fsg_bulk_cb_wrap));
+
+	memcpy((char *)cbw, req->buf, USB_BULK_CB_WRAP_LEN);
+
+	rockusb_tx_write_csw(cbw->tag, cbw->data_transfer_length,
+			     CSW_GOOD, USB_BULK_CS_WRAP_LEN);
+}
+
+static void cb_read_storage_id(struct usb_ep *ep, struct usb_request *req)
+{
+	ALLOC_CACHE_ALIGN_BUFFER(struct fsg_bulk_cb_wrap, cbw,
+				 sizeof(struct fsg_bulk_cb_wrap));
+	char emmc_id[] = "EMMC ";
+
+	printf("cb_read_storage_id\n");
+	memcpy((char *)cbw, req->buf, USB_BULK_CB_WRAP_LEN);
+	rockusb_tx_write_str(emmc_id);
+	rockusb_tx_write_csw(cbw->tag, cbw->data_transfer_length, CSW_GOOD,
+			     USB_BULK_CS_WRAP_LEN);
+}
+
+static void cb_write_lba(struct usb_ep *ep, struct usb_request *req)
+{
+	ALLOC_CACHE_ALIGN_BUFFER(struct fsg_bulk_cb_wrap, cbw,
+				 sizeof(struct fsg_bulk_cb_wrap));
+	int sector_count;
+	struct f_rockusb *f_rkusb = get_rkusb();
+
+	memcpy((char *)cbw, req->buf, USB_BULK_CB_WRAP_LEN);
+	sector_count = (int)get_unaligned_be16(&cbw->CDB[7]);
+	f_rkusb->download_lba = get_unaligned_be32(&cbw->CDB[2]);
+	f_rkusb->download_size = sector_count * 512;
+	f_rkusb->download_bytes = 0;
+	f_rkusb->download_tag = cbw->tag;
+	if ((0 == f_rkusb->download_size) ||
+	    (f_rkusb->download_size > CONFIG_ROCKUSB_BUF_SIZE)) {
+		rockusb_tx_write_csw(cbw->tag, cbw->data_transfer_length,
+				     CSW_FAIL, USB_BULK_CS_WRAP_LEN);
+	} else {
+		req->complete = rx_handler_dl_image;
+		req->length = rx_bytes_expected(ep);
+	}
+}
+
+int __weak rkusb_set_reboot_flag(int flag)
+{
+	struct f_rockusb *f_rkusb = get_rkusb();
+
+	printf("rkusb_set_reboot_flag: %d\n", f_rkusb->reboot_flag);
+	return -ENOSYS;
+}
+
+static void compl_do_reset(struct usb_ep *ep, struct usb_request *req)
+{
+	struct f_rockusb *f_rkusb = get_rkusb();
+
+	rkusb_set_reboot_flag(f_rkusb->reboot_flag);
+	do_reset(NULL, 0, 0, NULL);
+}
+
+static void cb_reboot(struct usb_ep *ep, struct usb_request *req)
+{
+	ALLOC_CACHE_ALIGN_BUFFER(struct fsg_bulk_cb_wrap, cbw,
+				 sizeof(struct fsg_bulk_cb_wrap));
+	struct f_rockusb *f_rkusb = get_rkusb();
+
+	f_rkusb->reboot_flag = 0;
+	memcpy((char *)cbw, req->buf, USB_BULK_CB_WRAP_LEN);
+	f_rkusb->reboot_flag = cbw->CDB[1];
+	rockusb_func->in_req->complete = compl_do_reset;
+	rockusb_tx_write_csw(cbw->tag, cbw->data_transfer_length, CSW_GOOD,
+			     USB_BULK_CS_WRAP_LEN);
+}
+
+static void cb_not_support(struct usb_ep *ep, struct usb_request *req)
+{
+	ALLOC_CACHE_ALIGN_BUFFER(struct fsg_bulk_cb_wrap, cbw,
+				 sizeof(struct fsg_bulk_cb_wrap));
+
+	memcpy((char *)cbw, req->buf, USB_BULK_CB_WRAP_LEN);
+	printf("Rockusb command %x not support yet\n", cbw->CDB[0]);
+	rockusb_tx_write_csw(cbw->tag, 0, CSW_FAIL, USB_BULK_CS_WRAP_LEN);
+}
+
+static const struct cmd_dispatch_info cmd_dispatch_info[] = {
+	{
+		.cmd = K_FW_TEST_UNIT_READY,
+		.cb = cb_test_unit_ready,
+	},
+	{
+		.cmd = K_FW_READ_FLASH_ID,
+		.cb = cb_read_storage_id,
+	},
+	{
+		.cmd = K_FW_SET_DEVICE_ID,
+		.cb = cb_not_support,
+	},
+	{
+		.cmd = K_FW_TEST_BAD_BLOCK,
+		.cb = cb_not_support,
+	},
+	{
+		.cmd = K_FW_READ_10,
+		.cb = cb_not_support,
+	},
+	{
+		.cmd = K_FW_WRITE_10,
+		.cb = cb_not_support,
+	},
+	{
+		.cmd = K_FW_ERASE_10,
+		.cb = cb_not_support,
+	},
+	{
+		.cmd = K_FW_WRITE_SPARE,
+		.cb = cb_not_support,
+	},
+	{
+		.cmd = K_FW_READ_SPARE,
+		.cb = cb_not_support,
+	},
+	{
+		.cmd = K_FW_ERASE_10_FORCE,
+		.cb = cb_not_support,
+	},
+	{
+		.cmd = K_FW_GET_VERSION,
+		.cb = cb_not_support,
+	},
+	{
+		.cmd = K_FW_LBA_READ_10,
+		.cb = cb_not_support,
+	},
+	{
+		.cmd = K_FW_LBA_WRITE_10,
+		.cb = cb_write_lba,
+	},
+	{
+		.cmd = K_FW_ERASE_SYS_DISK,
+		.cb = cb_not_support,
+	},
+	{
+		.cmd = K_FW_SDRAM_READ_10,
+		.cb = cb_not_support,
+	},
+	{
+		.cmd = K_FW_SDRAM_WRITE_10,
+		.cb = cb_not_support,
+	},
+	{
+		.cmd = K_FW_SDRAM_EXECUTE,
+		.cb = cb_not_support,
+	},
+	{
+		.cmd = K_FW_READ_FLASH_INFO,
+		.cb = cb_not_support,
+	},
+	{
+		.cmd = K_FW_GET_CHIP_VER,
+		.cb = cb_not_support,
+	},
+	{
+		.cmd = K_FW_LOW_FORMAT,
+		.cb = cb_not_support,
+	},
+	{
+		.cmd = K_FW_SET_RESET_FLAG,
+		.cb = cb_not_support,
+	},
+	{
+		.cmd = K_FW_SPI_READ_10,
+		.cb = cb_not_support,
+	},
+	{
+		.cmd = K_FW_SPI_WRITE_10,
+		.cb = cb_not_support,
+	},
+	{
+		.cmd = K_FW_SESSION,
+		.cb = cb_not_support,
+	},
+	{
+		.cmd = K_FW_RESET,
+		.cb = cb_reboot,
+	},
+};
+
+static void rx_handler_command(struct usb_ep *ep, struct usb_request *req)
+{
+	void (*func_cb)(struct usb_ep *ep, struct usb_request *req) = NULL;
+	ALLOC_CACHE_ALIGN_BUFFER(struct fsg_bulk_cb_wrap, cbw,
+				 sizeof(struct fsg_bulk_cb_wrap));
+	char *cmdbuf = req->buf;
+	int i;
+
+	if (req->status || req->length == 0)
+		return;
+
+	memcpy((char *)cbw, req->buf, USB_BULK_CB_WRAP_LEN);
+#ifdef DEBUG
+	printcbw(req->buf);
+#endif
+
+	for (i = 0; i < ARRAY_SIZE(cmd_dispatch_info); i++) {
+		if (cmd_dispatch_info[i].cmd == cbw->CDB[0]) {
+			func_cb = cmd_dispatch_info[i].cb;
+			break;
+		}
+	}
+
+	if (!func_cb) {
+		error("unknown command: %s", (char *)req->buf);
+		rockusb_tx_write_str("FAILunknown command");
+	} else {
+		if (req->actual < req->length) {
+			u8 *buf = (u8 *)req->buf;
+			buf[req->actual] = 0;
+			func_cb(ep, req);
+		} else {
+			error("buffer overflow");
+			rockusb_tx_write_str("FAILbuffer overflow");
+		}
+	}
+
+	*cmdbuf = '\0';
+	req->actual = 0;
+	usb_ep_queue(ep, req, 0);
+}

commit 5505cbac43eb300c9d98e02dce586585ab050af9
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Aug 1 14:51:17 2017 +0800

    rockchip: rk3399-firefly: enable usb device gadget
    
    ums and fastboot.
    
    Change-Id: Iba6fa6679fbafe7534aa563362b0831267895e39
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
index d4e3e6363a..193e611460 100644
--- a/configs/firefly-rk3399_defconfig
+++ b/configs/firefly-rk3399_defconfig
@@ -15,12 +15,21 @@ CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
 CONFIG_SPL_ATF_SUPPORT=y
 CONFIG_SPL_ATF_TEXT_BASE=0x00010000
+CONFIG_FASTBOOT=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_CMD_FASTBOOT=y
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_FASTBOOT_BUF_ADDR=0x00800800
+CONFIG_FASTBOOT_BUF_SIZE=0x08000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_TIME=y
 CONFIG_SPL_OF_CONTROL=y
@@ -65,6 +74,8 @@ CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
@@ -73,4 +84,9 @@ CONFIG_USB_ETHER_MCS7830=y
 CONFIG_USB_ETHER_RTL8152=y
 CONFIG_USB_ETHER_SMSC95XX=y
 CONFIG_USE_TINY_PRINTF=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x330c
 CONFIG_ERRNO_STR=y

commit 0c294d0696e107ce719271269896bb57c08f4a9b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Jul 27 20:03:31 2017 +0800

    rockchip: evb-rk3399: add ethaddr and serial# init
    
    Sync the code from puma-rk3399:
    8adc9d1 rockchip: board: puma_rk3399: derive ethaddr from cpuid
    9415b9a rockchip: board: puma_rk3399: add support for serial# and cpuid#
    via efuses
    
    Change-Id: Ib5528d0742b56a0e57431adaa01f411eee7e1ca1
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c b/board/rockchip/evb_rk3399/evb-rk3399.c
index 2d642a7a09..02c11e5946 100644
--- a/board/rockchip/evb_rk3399/evb-rk3399.c
+++ b/board/rockchip/evb_rk3399/evb-rk3399.c
@@ -5,25 +5,31 @@
  */
 #include <common.h>
 #include <dm.h>
+#include <misc.h>
 #include <ram.h>
 #include <dm/pinctrl.h>
 #include <dm/uclass-internal.h>
+#include <asm/setup.h>
 #include <asm/arch/periph.h>
 #include <power/regulator.h>
+#include <u-boot/sha256.h>
 #include <usb.h>
 #include <dwc3-uboot.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#define RK3399_CPUID_OFF  0x7
+#define RK3399_CPUID_LEN  0x10
+
 int board_init(void)
 {
 	struct udevice *pinctrl, *regulator;
 	int ret;
 
 	/*
-	 * The PWM do not have decicated interrupt number in dts and can
+	 * The PWM does not have decicated interrupt number in dts and can
 	 * not get periph_id by pinctrl framework, so let's init them here.
-	 * The PWM2 and PWM3 are for pwm regulater.
+	 * The PWM2 and PWM3 are for pwm regulators.
 	 */
 	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
 	if (ret) {
@@ -70,6 +76,119 @@ out:
 	return 0;
 }
 
+static void setup_macaddr(void)
+{
+#if CONFIG_IS_ENABLED(CMD_NET)
+	int ret;
+	const char *cpuid = env_get("cpuid#");
+	u8 hash[SHA256_SUM_LEN];
+	int size = sizeof(hash);
+	u8 mac_addr[6];
+
+	/* Only generate a MAC address, if none is set in the environment */
+	if (env_get("ethaddr"))
+		return;
+
+	if (!cpuid) {
+		debug("%s: could not retrieve 'cpuid#'\n", __func__);
+		return;
+	}
+
+	ret = hash_block("sha256", (void *)cpuid, strlen(cpuid), hash, &size);
+	if (ret) {
+		debug("%s: failed to calculate SHA256\n", __func__);
+		return;
+	}
+
+	/* Copy 6 bytes of the hash to base the MAC address on */
+	memcpy(mac_addr, hash, 6);
+
+	/* Make this a valid MAC address and set it */
+	mac_addr[0] &= 0xfe;  /* clear multicast bit */
+	mac_addr[0] |= 0x02;  /* set local assignment bit (IEEE802) */
+	eth_env_set_enetaddr("ethaddr", mac_addr);
+#endif
+
+	return;
+}
+
+static void setup_serial(void)
+{
+#if CONFIG_IS_ENABLED(ROCKCHIP_EFUSE)
+	struct udevice *dev;
+	int ret, i;
+	u8 cpuid[RK3399_CPUID_LEN];
+	u8 low[RK3399_CPUID_LEN/2], high[RK3399_CPUID_LEN/2];
+	char cpuid_str[RK3399_CPUID_LEN * 2 + 1];
+	u64 serialno;
+	char serialno_str[16];
+
+	/* retrieve the device */
+	ret = uclass_get_device_by_driver(UCLASS_MISC,
+					  DM_GET_DRIVER(rockchip_efuse), &dev);
+	if (ret) {
+		debug("%s: could not find efuse device\n", __func__);
+		return;
+	}
+
+	/* read the cpu_id range from the efuses */
+	ret = misc_read(dev, RK3399_CPUID_OFF, &cpuid, sizeof(cpuid));
+	if (ret) {
+		debug("%s: reading cpuid from the efuses failed\n",
+		      __func__);
+		return;
+	}
+
+	memset(cpuid_str, 0, sizeof(cpuid_str));
+	for (i = 0; i < 16; i++)
+		sprintf(&cpuid_str[i * 2], "%02x", cpuid[i]);
+
+	debug("cpuid: %s\n", cpuid_str);
+
+	/*
+	 * Mix the cpuid bytes using the same rules as in
+	 *   ${linux}/drivers/soc/rockchip/rockchip-cpuinfo.c
+	 */
+	for (i = 0; i < 8; i++) {
+		low[i] = cpuid[1 + (i << 1)];
+		high[i] = cpuid[i << 1];
+	}
+
+	serialno = crc32_no_comp(0, low, 8);
+	serialno |= (u64)crc32_no_comp(serialno, high, 8) << 32;
+	snprintf(serialno_str, sizeof(serialno_str), "%llx", serialno);
+
+	env_set("cpuid#", cpuid_str);
+	env_set("serial#", serialno_str);
+#endif
+
+	return;
+}
+
+int misc_init_r(void)
+{
+	setup_serial();
+	setup_macaddr();
+
+	return 0;
+}
+
+#ifdef CONFIG_SERIAL_TAG
+void get_board_serial(struct tag_serialnr *serialnr)
+{
+	char *serial_string;
+	u64 serial = 0;
+
+	serial_string = env_get("serial#");
+
+	if (serial_string)
+		serial = simple_strtoull(serial_string, NULL, 16);
+
+	serialnr->high = (u32)(serial >> 32);
+	serialnr->low = (u32)(serial & 0xffffffff);
+}
+#endif
+
 #ifdef CONFIG_USB_DWC3
 static struct dwc3_device dwc3_device_data = {
 	.maximum_speed = USB_SPEED_HIGH,

commit 44fe3794744a122b9612458c874d9ed5548cf7fa
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Jul 27 20:05:45 2017 +0800

    rockchip: firefly-rk3399: enable EFUSE drive
    
    Enable the EFUSE driver for get the cpuid and serial.
    
    Change-Id: Ic347b9edbb06da784f0788fc29d61c3003e2b69b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
index 94b9209cd7..d4e3e6363a 100644
--- a/configs/firefly-rk3399_defconfig
+++ b/configs/firefly-rk3399_defconfig
@@ -34,6 +34,8 @@ CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_ROCKCHIP_EFUSE=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MMC_SDHCI=y
diff --git a/include/configs/evb_rk3399.h b/include/configs/evb_rk3399.h
index 9c8638a08e..cab940e7c0 100644
--- a/include/configs/evb_rk3399.h
+++ b/include/configs/evb_rk3399.h
@@ -20,5 +20,8 @@
 #define CONFIG_ENV_OFFSET (240 * 1024)
 
 #define SDRAM_BANK_SIZE			(2UL << 30)
+#define CONFIG_MISC_INIT_R
+#define CONFIG_SERIAL_TAG
+#define CONFIG_ENV_OVERWRITE
 
 #endif

commit a576bbabf2ab94dc36ff6f47283a0c9d41ac5c03
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Jun 16 09:59:56 2017 +0800

    rockchip: rk322x: init rktimer in uboot
    
    rktimer is needed when not using SPL, we can only remove this after
    the rockchip pre-loader(miniloader) has init rktimer.
    
    Change-Id: I926cea6f6e1bfd81f4fe207ec43ddd4d490ddd25
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk322x-board.c b/arch/arm/mach-rockchip/rk322x-board.c
index c0ac2e9b56..f91043eec0 100644
--- a/arch/arm/mach-rockchip/rk322x-board.c
+++ b/arch/arm/mach-rockchip/rk322x-board.c
@@ -67,6 +67,7 @@ int board_init(void)
 		     CON_IOMUX_UART2SEL_MASK,
 		     CON_IOMUX_UART2SEL_21 << CON_IOMUX_UART2SEL_SHIFT);
 
+	rockchip_timer_init();
 	return 0;
 }
 

commit 1eccadd2678cde800539db52e71ab8ff03d48472
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Jul 19 19:56:37 2017 +0800

    rockchip: rk3399: correct the env setting
    
    The mmc0(emmc) is the default boot device, so let's use
    mmc device 0 as default env device.
    The SPL size in rk3399 is lager than other Rockchip SoC,
    we need to using a new offset and not to conflict with
    SPL memory space.
    
    Change-Id: I2b2738afda4f6e9340691fef7abb197550ce6fba
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/evb_rk3399.h b/include/configs/evb_rk3399.h
index 015f25a774..9c8638a08e 100644
--- a/include/configs/evb_rk3399.h
+++ b/include/configs/evb_rk3399.h
@@ -9,13 +9,15 @@
 
 #include <configs/rk3399_common.h>
 
-#define CONFIG_SYS_MMC_ENV_DEV 1
+#define CONFIG_MMC_SDHCI_SDMA
+#define CONFIG_SYS_MMC_ENV_DEV 0
 /*
- * SPL @ 32k for ~36k
- * ENV @ 96k
- * u-boot @ 128K
+ * SPL @ 32k for ~128k
+ * ENV @ 240k
+ * u-boot @ 256K
  */
-#define CONFIG_ENV_OFFSET (96 * 1024)
+#undef CONFIG_ENV_OFFSET
+#define CONFIG_ENV_OFFSET (240 * 1024)
 
 #define SDRAM_BANK_SIZE			(2UL << 30)
 

commit 73bcadf17670b3f174734b02c502fc160a797cd3
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Jun 14 16:54:15 2017 +0800

    rockchip: rk3399: dtsi: enable mmc_phy in SPL
    
    Change-Id: I741fb1416f176a64a792e6c35c1103bcdc9a5b27
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
index 25bd63ecfb..68221b47f7 100644
--- a/arch/arm/dts/rk3399.dtsi
+++ b/arch/arm/dts/rk3399.dtsi
@@ -1298,6 +1298,7 @@
 		};
 
 		emmc_phy: phy@f780 {
+		u-boot,dm-pre-reloc;
 			compatible = "rockchip,rk3399-emmc-phy";
 			reg = <0xf780 0x24>;
 			clocks = <&sdhci>;

commit a34fddcea912a1a6e4b33177aeb0ca3fa1b9a1b4
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:26 2017 +0800

    dts: rk3399: change the maximum eMMC clock frequency to 150MHz
    
    The rockchip mmc controllers don't support _the _odd__ divider,
    otherwise probably cause unpredictable error.
    
    The driver originally select gpll(594M) as the clock source, and we set
    div to 3 at 200MHz. We have to change the maximum eMMC clock frequency
    to 150MHz in U-Boot stage, so that the div will be 4.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
index 7f1fc50f38..25bd63ecfb 100644
--- a/arch/arm/dts/rk3399.dtsi
+++ b/arch/arm/dts/rk3399.dtsi
@@ -283,7 +283,7 @@
 		arasan,soc-ctl-syscon = <&grf>;
 		assigned-clocks = <&cru SCLK_EMMC>;
 		assigned-clock-rates = <200000000>;
-		max-frequency = <200000000>;
+		max-frequency = <150000000>;
 		clocks = <&cru SCLK_EMMC>, <&cru ACLK_EMMC>;
 		clock-names = "clk_xin", "clk_ahb";
 		clock-output-names = "emmc_cardclock";

commit b673f29a58f5996a9e943fcf782c3810e5108c0f
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:25 2017 +0800

    mmc: add support for HS400 mode of eMMC5.0
    
    This patch adds HS400 mode support for eMMC5.0 device. HS400 mode is
    high speed DDR interface timing from HS200. Clock frequency is up to
    200MHz and only 8-bit bus width is supported. In addition, tuning
    process of HS200 is required to synchronize the command response on the
    CMD line because CMD input timing for HS400 mode is the same as HS200
    mode.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 89a03babfc..2749c24d13 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -855,6 +855,45 @@ static int mmc_select_hs200(struct mmc *mmc)
 }
 #endif
 
+static int mmc_select_hs400(struct mmc *mmc)
+{
+	int ret;
+
+	/* Switch card to HS mode */
+	ret = __mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
+			   EXT_CSD_HS_TIMING, EXT_CSD_TIMING_HS, false);
+	if (ret)
+		return ret;
+
+	/* Set host controller to HS timing */
+	mmc_set_timing(mmc, MMC_TIMING_MMC_HS);
+
+	/* Reduce frequency to HS frequency */
+	mmc_set_clock(mmc, MMC_HIGH_52_MAX_DTR);
+
+	ret = mmc_send_status(mmc, 1000);
+	if (ret)
+		return ret;
+
+	/* Switch card to DDR */
+	ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
+			 EXT_CSD_BUS_WIDTH,
+			 EXT_CSD_DDR_BUS_WIDTH_8);
+	if (ret)
+		return ret;
+
+	/* Switch card to HS400 */
+	ret = __mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
+			   EXT_CSD_HS_TIMING, EXT_CSD_TIMING_HS400, false);
+	if (ret)
+		return ret;
+
+	/* Set host controller to HS400 timing and frequency */
+	mmc_set_timing(mmc, MMC_TIMING_MMC_HS400);
+
+	return ret;
+}
+
 static u32 mmc_select_card_type(struct mmc *mmc, u8 *ext_csd)
 {
 	u8 card_type;
@@ -960,9 +999,14 @@ static int mmc_change_freq(struct mmc *mmc)
 
 	mmc_set_bus_speed(mmc, avail_type);
 
-	if (mmc_card_hs200(mmc))
+	if (mmc_card_hs200(mmc)) {
 		err = mmc_hs200_tuning(mmc);
-	else if (!mmc_card_hs400es(mmc)) {
+		if (avail_type & EXT_CSD_CARD_TYPE_HS400 &&
+		    mmc->bus_width == MMC_BUS_WIDTH_8BIT) {
+			err = mmc_select_hs400(mmc);
+			mmc_set_bus_speed(mmc, avail_type);
+		}
+	} else if (!mmc_card_hs400es(mmc)) {
 		err = mmc_select_bus_width(mmc) > 0 ? 0 : err;
 		if (!err && avail_type & EXT_CSD_CARD_TYPE_DDR_52)
 			err = mmc_select_hs_ddr(mmc);

commit 7279e4870e5693d29cecb8ac10ba7588ff94f1a2
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:24 2017 +0800

    mmc: sdhci: add the support for tuning
    
    MMC framework has already implemented hs200 mode for eMMC devices,
    moreover the standard SDHC3.0 controller support tuning. We can set the
    corresponding flag in host->host_cpas.
    
    Host driver issue tuning command repeatedly until the host controller
    resets Execute Tuning to 0. Host controller resets Execute Tuning to 0
    when tuning is completed or tuning is not completed within 40 times.
    Host driver can abort this loop by 40 times CMD19/CMD21 issue or 150ms
    time-out. If tuning is completed successfully, driver set Sampling Clock
    Select to 1 and this means the host contorller start to use tuned
    sampling clcok. If tuning is failed, host controller keeps Sampling
    Clock Select to 0.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index 1815c2d6eb..f5ae3a6bdc 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -158,7 +158,10 @@ static int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd,
 	static unsigned int cmd_timeout = SDHCI_CMD_DEFAULT_TIMEOUT;
 
 	sdhci_writel(host, SDHCI_INT_ALL_MASK, SDHCI_INT_STATUS);
-	mask = SDHCI_CMD_INHIBIT | SDHCI_DATA_INHIBIT;
+	mask = SDHCI_CMD_INHIBIT;
+
+	if (data)
+		mask |= SDHCI_DATA_INHIBIT;
 
 	/* We shouldn't wait for data inihibit for stop commands, even
 	   though they might use busy signaling */
@@ -200,6 +203,13 @@ static int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd,
 	if (data)
 		flags |= SDHCI_CMD_DATA;
 
+	if (cmd->cmdidx == MMC_SEND_TUNING_BLOCK ||
+	    cmd->cmdidx == MMC_SEND_TUNING_BLOCK_HS200) {
+		mask &= ~SDHCI_INT_RESPONSE;
+		mask |= SDHCI_INT_DATA_AVAIL;
+		flags |= SDHCI_CMD_DATA;
+	}
+
 	/* Set Transfer mode regarding to data flag */
 	if (data != 0) {
 		sdhci_writeb(host, 0xe, SDHCI_TIMEOUT_CONTROL);
@@ -558,6 +568,108 @@ static int sdhci_init(struct mmc *mmc)
 	return 0;
 }
 
+static int sdhci_send_tuning(struct sdhci_host *host, u32 opcode)
+{
+	struct mmc_cmd cmd;
+
+	cmd.cmdidx = opcode;
+	cmd.resp_type = MMC_RSP_R1;
+	cmd.cmdarg = 0;
+	/*
+	 * In response to CMD19, the card sends 64 bytes of tuning
+	 * block to the Host Controller. So we set the block size
+	 * to 64 here.
+	 */
+	if (opcode == MMC_SEND_TUNING_BLOCK_HS200 &&
+	    host->mmc->bus_width == MMC_BUS_WIDTH_8BIT)
+		sdhci_writew(host, SDHCI_MAKE_BLKSZ(7, 128), SDHCI_BLOCK_SIZE);
+	else
+		sdhci_writew(host, SDHCI_MAKE_BLKSZ(7, 64), SDHCI_BLOCK_SIZE);
+
+	/*
+	 * The tuning block is sent by the card to the host controller.
+	 * So we set the TRNS_READ bit in the Transfer Mode register.
+	 * This also takes care of setting DMA Enable and Multi Block
+	 * Select in the same register to 0.
+	 */
+	sdhci_writew(host, SDHCI_TRNS_READ, SDHCI_TRANSFER_MODE);
+
+#ifdef CONFIG_DM_MMC
+	return sdhci_send_command(host->mmc->dev, &cmd, NULL);
+#else
+	return sdhci_send_command(host->mmc, &cmd, NULL);
+#endif
+}
+
+#define MAX_TUNING_LOOP 40
+static int __sdhci_execute_tuning(struct sdhci_host *host, u32 opcode)
+{
+	int i;
+	int ret;
+
+	/*
+	 * Issue opcode repeatedly till Execute Tuning is set to 0 or the number
+	 * of loops reaches 40 times.
+	 */
+	for (i = 0; i < MAX_TUNING_LOOP; i++) {
+		u16 ctrl;
+
+		ret = sdhci_send_tuning(host, opcode);
+
+		if (ret)
+			return ret;
+
+		ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2);
+		if (!(ctrl & SDHCI_CTRL_EXEC_TUNING)) {
+			if (ctrl & SDHCI_CTRL_TUNED_CLK)
+				/* Tuning successfully */
+				return 0;
+			break;
+		}
+	}
+
+	return -ETIMEDOUT;
+}
+
+#ifdef CONFIG_DM_MMC
+static int sdhci_execute_tuning(struct udevice *dev, u32 opcode)
+{
+	struct mmc *mmc = mmc_get_mmc_dev(dev);
+#else
+static int sdhci_execute_tuning(struct mmc *mmc, u32 opcode)
+{
+#endif
+	struct sdhci_host *host = mmc->priv;
+	u16 ctrl;
+
+	/*
+	 * The Host Controller needs tuning in case of SDR104 and DDR50
+	 * mode, and for SDR50 mode when Use Tuning for SDR50 is set in
+	 * the Capabilities register.
+	 * If the Host Controller supports the HS200 mode then the
+	 * tuning function has to be executed.
+	 */
+	switch (mmc->timing) {
+	/* HS400 tuning is done in HS200 mode */
+	case MMC_TIMING_MMC_HS400:
+		return -EINVAL;
+	case MMC_TIMING_MMC_HS200:
+		/*
+		 * Periodic re-tuning for HS400 is not expected to be needed, so
+		 * disable it here.
+		 */
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2);
+	ctrl |= SDHCI_CTRL_EXEC_TUNING;
+	sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2);
+
+	return __sdhci_execute_tuning(host, opcode);
+}
+
 #ifdef CONFIG_DM_MMC
 int sdhci_probe(struct udevice *dev)
 {
@@ -570,6 +682,7 @@ const struct dm_mmc_ops sdhci_ops = {
 	.card_busy	= sdhci_card_busy,
 	.send_cmd	= sdhci_send_command,
 	.set_ios	= sdhci_set_ios,
+	.execute_tuning = sdhci_execute_tuning,
 };
 #else
 static const struct mmc_ops sdhci_ops = {
@@ -577,6 +690,7 @@ static const struct mmc_ops sdhci_ops = {
 	.send_cmd	= sdhci_send_command,
 	.set_ios	= sdhci_set_ios,
 	.init		= sdhci_init,
+	.execute_tuning = sdhci_execute_tuning,
 };
 #endif
 

commit dce4cf740c5c4ccb435db3c6687252da4bf67c13
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:23 2017 +0800

    mmc: sdhci: rockchip: add phy support
    
    This patch gets phy phandle from dt-binding, and power
    cycle/re-configure phy whilst changing card clock.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index f4050b1c6f..fd3bb1042a 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -6,6 +6,7 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
+#include <asm/arch/hardware.h>
 #include <common.h>
 #include <dm.h>
 #include <dt-structs.h>
@@ -28,11 +29,151 @@ struct rockchip_sdhc_plat {
 	struct mmc mmc;
 };
 
+struct rockchip_emmc_phy {
+	u32 emmcphy_con[7];
+	u32 reserved;
+	u32 emmcphy_status;
+};
+
 struct rockchip_sdhc {
 	struct sdhci_host host;
 	void *base;
+	struct rockchip_emmc_phy *phy;
 };
 
+#define PHYCTRL_CALDONE_MASK		0x1
+#define PHYCTRL_CALDONE_SHIFT		0x6
+#define PHYCTRL_CALDONE_DONE		0x1
+
+#define PHYCTRL_DLLRDY_MASK		0x1
+#define PHYCTRL_DLLRDY_SHIFT		0x5
+#define PHYCTRL_DLLRDY_DONE		0x1
+
+#define PHYCTRL_FREQSEL_200M            0x0
+#define PHYCTRL_FREQSEL_50M             0x1
+#define PHYCTRL_FREQSEL_100M            0x2
+#define PHYCTRL_FREQSEL_150M            0x3
+
+#define KHz	(1000)
+#define MHz	(1000 * KHz)
+
+static void rk3399_emmc_phy_power_on(struct rockchip_emmc_phy *phy, u32 clock)
+{
+	u32 caldone, dllrdy, freqsel;
+	uint start;
+
+	writel(RK_CLRSETBITS(7 << 4, 0), &phy->emmcphy_con[6]);
+	writel(RK_CLRSETBITS(1 << 11, 1 << 11), &phy->emmcphy_con[0]);
+	writel(RK_CLRSETBITS(0xf << 7, 4 << 7), &phy->emmcphy_con[0]);
+
+	/*
+	 * According to the user manual, calpad calibration
+	 * cycle takes more than 2us without the minimal recommended
+	 * value, so we may need a little margin here
+	 */
+	udelay(3);
+	writel(RK_CLRSETBITS(1, 1), &phy->emmcphy_con[6]);
+
+	/*
+	 * According to the user manual, it asks driver to
+	 * wait 5us for calpad busy trimming
+	 */
+	udelay(5);
+	caldone = readl(&phy->emmcphy_status);
+	caldone = (caldone >> PHYCTRL_CALDONE_SHIFT) & PHYCTRL_CALDONE_MASK;
+	if (caldone != PHYCTRL_CALDONE_DONE) {
+		debug("%s: caldone timeout.\n", __func__);
+		return;
+	}
+
+	/* Set the frequency of the DLL operation */
+	if (clock < 75 * MHz)
+		freqsel = PHYCTRL_FREQSEL_50M;
+	else if (clock < 125 * MHz)
+		freqsel = PHYCTRL_FREQSEL_100M;
+	else if (clock < 175 * MHz)
+		freqsel = PHYCTRL_FREQSEL_150M;
+	else
+		freqsel = PHYCTRL_FREQSEL_200M;
+
+	/* Set the frequency of the DLL operation */
+	writel(RK_CLRSETBITS(3 << 12, freqsel << 12), &phy->emmcphy_con[0]);
+	writel(RK_CLRSETBITS(1 << 1, 1 << 1), &phy->emmcphy_con[6]);
+
+	start = get_timer(0);
+
+	do {
+		udelay(1);
+		dllrdy = readl(&phy->emmcphy_status);
+		dllrdy = (dllrdy >> PHYCTRL_DLLRDY_SHIFT) & PHYCTRL_DLLRDY_MASK;
+		if (dllrdy == PHYCTRL_DLLRDY_DONE)
+			break;
+	} while (get_timer(start) < 50000);
+
+	if (dllrdy != PHYCTRL_DLLRDY_DONE)
+		debug("%s: dllrdy timeout.\n", __func__);
+}
+
+static void rk3399_emmc_phy_power_off(struct rockchip_emmc_phy *phy)
+{
+	writel(RK_CLRSETBITS(1, 0), &phy->emmcphy_con[6]);
+	writel(RK_CLRSETBITS(1 << 1, 0), &phy->emmcphy_con[6]);
+}
+
+static int arasan_sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
+{
+	struct rockchip_sdhc *priv =
+			container_of(host, struct rockchip_sdhc, host);
+	int cycle_phy = host->clock != clock &&
+			clock > EMMC_MIN_FREQ;
+
+	if (cycle_phy)
+		rk3399_emmc_phy_power_off(priv->phy);
+
+	sdhci_set_clock(host, clock);
+
+	if (cycle_phy)
+		rk3399_emmc_phy_power_on(priv->phy, clock);
+
+	return 0;
+}
+
+static struct sdhci_ops arasan_sdhci_ops = {
+	.set_clock	= arasan_sdhci_set_clock,
+};
+
+static int arasan_get_phy(struct udevice *dev)
+{
+	struct rockchip_sdhc *priv = dev_get_priv(dev);
+
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+	priv->phy = (struct rockchip_emmc_phy *)0xff77f780;
+#else
+	int phy_node, grf_node;
+	fdt_addr_t grf_base, grf_phy_offset;
+
+	phy_node = fdtdec_lookup_phandle(gd->fdt_blob,
+					 dev_of_offset(dev), "phys");
+	if (phy_node <= 0) {
+		debug("Not found emmc phy device\n");
+		return -ENODEV;
+	}
+
+	grf_node = fdt_parent_offset(gd->fdt_blob, phy_node);
+	if (grf_node <= 0) {
+		debug("Not found usb phy device\n");
+		return -ENODEV;
+	}
+
+	grf_base = fdtdec_get_addr(gd->fdt_blob, grf_node, "reg");
+	grf_phy_offset = fdtdec_get_addr_size_auto_parent(gd->fdt_blob,
+				grf_node, phy_node, "reg", 0, NULL, false);
+
+	priv->phy = (struct rockchip_emmc_phy *)(grf_base + grf_phy_offset);
+#endif
+	return 0;
+}
+
 static int arasan_sdhci_probe(struct udevice *dev)
 {
 	struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
@@ -75,6 +216,12 @@ static int arasan_sdhci_probe(struct udevice *dev)
 		printf("%s fail to get clk\n", __func__);
 	}
 
+	ret = arasan_get_phy(dev);
+	if (ret)
+		return ret;
+
+	host->ops = &arasan_sdhci_ops;
+
 	host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD;
 	host->max_clk = max_frequency;
 

commit a15c58b2f9d2d083f1896a5a206f0cec6c46eb4e
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:22 2017 +0800

    mmc: sdhci: export sdhci_set_clock()
    
    For arasan-rk3399-sdhci controller, we should make sure the phy is in
    poweroff status before we configure the clock stuff. So that we need to
    export it for phy configuration.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index 67ecacbf2b..1815c2d6eb 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -301,9 +301,8 @@ static int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd,
 		return -ECOMM;
 }
 
-static int sdhci_set_clock(struct mmc *mmc, unsigned int clock)
+int sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
 {
-	struct sdhci_host *host = mmc->priv;
 	unsigned int div, clk = 0, timeout;
 
 	/* Wait max 20 ms */
@@ -319,12 +318,10 @@ static int sdhci_set_clock(struct mmc *mmc, unsigned int clock)
 		timeout--;
 		udelay(100);
 	}
-
 	sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
 
 	if (clock == 0)
 		return 0;
-
 	if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) {
 		/*
 		 * Check if the Host Controller supports Programmable Clock
@@ -364,7 +361,6 @@ static int sdhci_set_clock(struct mmc *mmc, unsigned int clock)
 		}
 		div >>= 1;
 	}
-
 	if (host->ops && host->ops->set_clock_ext)
 		host->ops->set_clock_ext(host, div);
 
@@ -386,12 +382,10 @@ static int sdhci_set_clock(struct mmc *mmc, unsigned int clock)
 		timeout--;
 		udelay(1000);
 	}
-
 	clk |= SDHCI_CLOCK_CARD_EN;
 	sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
 
 	host->clock = clock;
-
 	return 0;
 }
 
@@ -489,8 +483,12 @@ static int sdhci_set_ios(struct mmc *mmc)
 	if (host->ops && host->ops->set_control_reg)
 		host->ops->set_control_reg(host);
 
-	if (mmc->clock != host->clock)
-		sdhci_set_clock(mmc, mmc->clock);
+	if (mmc->clock != host->clock) {
+		if (host->ops && host->ops->set_clock)
+			host->ops->set_clock(host, mmc->clock);
+		else
+			sdhci_set_clock(host, mmc->clock);
+	}
 
 	/* Set bus width */
 	ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
diff --git a/include/sdhci.h b/include/sdhci.h
index b8b614d3e9..354f1e7099 100644
--- a/include/sdhci.h
+++ b/include/sdhci.h
@@ -254,7 +254,8 @@ struct sdhci_ops {
 	int	(*get_cd)(struct sdhci_host *host);
 	void	(*set_control_reg)(struct sdhci_host *host);
 	void	(*set_ios_post)(struct sdhci_host *host);
-	void	(*set_clock)(struct sdhci_host *host, u32 div);
+	int	(*set_clock)(struct sdhci_host *host, unsigned int clock);
+	void	(*set_clock_ext)(struct sdhci_host *host, u32 div);
 };
 
 struct sdhci_host {
@@ -279,6 +280,8 @@ struct sdhci_host {
 	struct mmc_config cfg;
 };
 
+int sdhci_set_clock(struct sdhci_host *host, unsigned int clock);
+
 #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS
 
 static inline void sdhci_writel(struct sdhci_host *host, u32 val, int reg)

commit 5de821224e8787b9ca6870c03796775d7de2093a
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:21 2017 +0800

    mmc: sdhci: rename set_clock callback
    
    In fact, the original name is unsuitable for its behavior. It's better
    to rename to set_clock_ext.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c
index 62817a0d07..95447310ab 100644
--- a/drivers/mmc/s5p_sdhci.c
+++ b/drivers/mmc/s5p_sdhci.c
@@ -73,14 +73,14 @@ static void s5p_sdhci_set_control_reg(struct sdhci_host *host)
 	sdhci_writel(host, ctrl, SDHCI_CONTROL2);
 }
 
-static void s5p_set_clock(struct sdhci_host *host, u32 div)
+static void s5p_set_clock_ext(struct sdhci_host *host, u32 div)
 {
 	/* ToDo : Use the Clock Framework */
 	set_mmc_clk(host->index, div);
 }
 
 static const struct sdhci_ops s5p_sdhci_ops = {
-	.set_clock	= &s5p_set_clock,
+	.set_clock_ext	= &s5p_set_clock_ext,
 	.set_control_reg = &s5p_sdhci_set_control_reg,
 };
 
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index 5c9459a8c3..67ecacbf2b 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -365,8 +365,8 @@ static int sdhci_set_clock(struct mmc *mmc, unsigned int clock)
 		div >>= 1;
 	}
 
-	if (host->ops && host->ops->set_clock)
-		host->ops->set_clock(host, div);
+	if (host->ops && host->ops->set_clock_ext)
+		host->ops->set_clock_ext(host, div);
 
 	clk |= (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT;
 	clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN)

commit 76194d8c2fabf723f8017ac4abcf8bb061b91b43
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:20 2017 +0800

    mmc: sdhci: add support for UHS timing
    
    To support UHS speed mode, controller should enable 1.8V signaling and
    select one of UHS modes.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index 0c5cf5cc86..5c9459a8c3 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -425,6 +425,39 @@ static void sdhci_set_power(struct sdhci_host *host, unsigned short power)
 	sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL);
 }
 
+static void sdhci_set_uhs_signaling(struct sdhci_host *host)
+{
+	u16 ctrl_2;
+	u32 timing = host->mmc->timing;
+
+	ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2);
+	/* Select Bus Speed Mode for host */
+	ctrl_2 &= ~SDHCI_CTRL_UHS_MASK;
+
+	if ((timing != MMC_TIMING_LEGACY) &&
+	    (timing != MMC_TIMING_MMC_HS) &&
+	    (timing != MMC_TIMING_SD_HS))
+		ctrl_2 |= SDHCI_CTRL_VDD_180;
+
+	if ((timing == MMC_TIMING_MMC_HS200) ||
+	    (timing == MMC_TIMING_UHS_SDR104))
+		ctrl_2 |= SDHCI_CTRL_UHS_SDR104 | SDHCI_CTRL_DRV_TYPE_A;
+	else if (timing == MMC_TIMING_UHS_SDR12)
+		ctrl_2 |= SDHCI_CTRL_UHS_SDR12;
+	else if (timing == MMC_TIMING_UHS_SDR25)
+		ctrl_2 |= SDHCI_CTRL_UHS_SDR25;
+	else if (timing == MMC_TIMING_UHS_SDR50)
+		ctrl_2 |= SDHCI_CTRL_UHS_SDR50;
+	else if ((timing == MMC_TIMING_UHS_DDR50) ||
+		 (timing == MMC_TIMING_MMC_DDR52))
+		ctrl_2 |= SDHCI_CTRL_UHS_DDR50;
+	else if (timing == MMC_TIMING_MMC_HS400 ||
+		 timing == MMC_TIMING_MMC_HS400ES)
+		ctrl_2 |= SDHCI_CTRL_HS400 | SDHCI_CTRL_DRV_TYPE_A;
+
+	sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2);
+}
+
 #ifdef CONFIG_DM_MMC
 static bool sdhci_card_busy(struct udevice *dev)
 {
@@ -484,6 +517,13 @@ static int sdhci_set_ios(struct mmc *mmc)
 
 	sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
 
+	if ((mmc->timing != MMC_TIMING_LEGACY) &&
+	    (mmc->timing != MMC_TIMING_MMC_HS) &&
+	    (mmc->timing != MMC_TIMING_SD_HS))
+		sdhci_set_power(host, MMC_VDD_165_195_SHIFT);
+
+	sdhci_set_uhs_signaling(host);
+
 	/* If available, call the driver specific "post" set_ios() function */
 	if (host->ops && host->ops->set_ios_post)
 		host->ops->set_ios_post(host);
diff --git a/include/mmc.h b/include/mmc.h
index 4a9bfb5ff8..75d2fbd453 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -138,6 +138,7 @@
 
 #define MMC_STATE_PRG		(7 << 9)
 
+#define MMC_VDD_165_195_SHIFT	7
 #define MMC_VDD_165_195		0x00000080	/* VDD voltage 1.65 - 1.95 */
 #define MMC_VDD_20_21		0x00000100	/* VDD voltage 2.0 ~ 2.1 */
 #define MMC_VDD_21_22		0x00000200	/* VDD voltage 2.1 ~ 2.2 */
diff --git a/include/sdhci.h b/include/sdhci.h
index 4348f1149d..b8b614d3e9 100644
--- a/include/sdhci.h
+++ b/include/sdhci.h
@@ -147,6 +147,23 @@
 #define SDHCI_ACMD12_ERR	0x3C
 
 /* 3E-3F reserved */
+#define SDHCI_HOST_CONTROL2		0x3E
+#define SDHCI_CTRL_UHS_MASK		0x0007
+#define SDHCI_CTRL_UHS_SDR12		0x0000
+#define SDHCI_CTRL_UHS_SDR25		0x0001
+#define SDHCI_CTRL_UHS_SDR50		0x0002
+#define SDHCI_CTRL_UHS_SDR104		0x0003
+#define SDHCI_CTRL_UHS_DDR50		0x0004
+#define SDHCI_CTRL_HS400		0x0005
+#define SDHCI_CTRL_VDD_180		0x0008
+#define SDHCI_CTRL_DRV_TYPE_MASK	0x0030
+#define SDHCI_CTRL_DRV_TYPE_B		0x0000
+#define SDHCI_CTRL_DRV_TYPE_A		0x0010
+#define SDHCI_CTRL_DRV_TYPE_C		0x0020
+#define SDHCI_CTRL_DRV_TYPE_D		0x0030
+#define SDHCI_CTRL_EXEC_TUNING		0x0040
+#define SDHCI_CTRL_TUNED_CLK		0x0080
+#define SDHCI_CTRL_PRESET_VAL_ENABLE	0x8000
 
 #define SDHCI_CAPABILITIES	0x40
 #define  SDHCI_TIMEOUT_CLK_MASK	0x0000003F

commit 31044c33dec7dea9ce253cf7d4f080fd17b8e596
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:19 2017 +0800

    mmc: sdhci: update host->clock after clock setting
    
    Overwrite host->clock after clock setting to avoid repetitive reset
    clock.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index 1b947dc7fc..0c5cf5cc86 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -389,6 +389,9 @@ static int sdhci_set_clock(struct mmc *mmc, unsigned int clock)
 
 	clk |= SDHCI_CLOCK_CARD_EN;
 	sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
+
+	host->clock = clock;
+
 	return 0;
 }
 

commit 2a62bae8ce411b681bdcb7654fb1566e690dee0e
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:18 2017 +0800

    mmc: sdhci: rockchip: fix bus width setting
    
    Rockchip sdhci controller capable of 8-bit transfer. The original can
    only run at 4 bit mode.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index f31d329c81..f4050b1c6f 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -47,10 +47,24 @@ static int arasan_sdhci_probe(struct udevice *dev)
 
 	host->name = dev->name;
 	host->ioaddr = map_sysmem(dtplat->reg[1], dtplat->reg[3]);
+	host->host_caps |= MMC_MODE_8BIT;
 	max_frequency = dtplat->max_frequency;
 	ret = clk_get_by_index_platdata(dev, 0, dtplat->clocks, &clk);
 #else
 	max_frequency = dev_read_u32_default(dev, "max-frequency", 0);
+	switch (dev_read_u32_default(dev, "bus-width", 4)) {
+	case 8:
+		host->host_caps |= MMC_MODE_8BIT;
+		break;
+	case 4:
+		host->host_caps |= MMC_MODE_4BIT;
+		break;
+	case 1:
+		break;
+	default:
+		printf("Invalid \"bus-width\" value\n");
+		return -EINVAL;
+	}
 	ret = clk_get_by_index(dev, 0, &clk);
 #endif
 	if (!ret) {

commit c1cfa99b4e425fdc084ebd7ddc28312a7d478cd3
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:17 2017 +0800

    mmc: dw_mmc: fix bus width setting
    
    Hosts capable of 8-bit transfers can also do 4 bits.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 0272bf50c3..c94ed6e576 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -559,8 +559,7 @@ void dwmci_setup_cfg(struct mmc_config *cfg, struct dwmci_host *host,
 	cfg->host_caps = host->caps;
 
 	if (host->buswidth == 8) {
-		cfg->host_caps |= MMC_MODE_8BIT;
-		cfg->host_caps &= ~MMC_MODE_4BIT;
+		cfg->host_caps |= MMC_MODE_8BIT | MMC_MODE_4BIT;
 	} else {
 		cfg->host_caps |= MMC_MODE_4BIT;
 		cfg->host_caps &= ~MMC_MODE_8BIT;

commit 24527ef9d051e3b1cdfce5119b66801c312c3c30
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:16 2017 +0800

    mmc: dw_mmc: rockchip: fix data crc error on ddr52 8bit mode
    
    The clk_divider must be set to 1 on ddr52 8bit mode for rockchip
    platform. Otherwise we will get a data crc error during data
    transmission.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index f2a3989c32..0272bf50c3 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -344,7 +344,7 @@ static int dwmci_setup_bus(struct dwmci_host *host, u32 freq)
 	int timeout = 10000;
 	unsigned long sclk;
 
-	if ((freq == host->clock) || (freq == 0))
+	if (freq == 0)
 		return 0;
 	/*
 	 * If host->get_mmc_clk isn't defined,
diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index f79e557ab1..6027642f44 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -43,6 +43,13 @@ static uint rockchip_dwmmc_get_mmc_clk(struct dwmci_host *host, uint freq)
 	struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
 	int ret;
 
+	/*
+	 * If DDR52 8bit mode(only emmc work in 8bit mode),
+	 * divider must be set 1
+	 */
+	if (mmc_card_ddr52(host->mmc) && host->mmc->bus_width == 8)
+		freq *= 2;
+
 	ret = clk_set_rate(&priv->clk, freq);
 	if (ret < 0) {
 		debug("%s: err=%d\n", __func__, ret);

commit 5545757f7791e4b522a775b3f495feb508f659a1
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:15 2017 +0800

    mmc: add DDR52 support for eMMC card
    
    4.41+ eMMC card devices can run at 52MHz on DDR 8-bit mode, it can
    improve write/read performance. Host driver can set MMC_MODE_DDR_52Mhz
    to enable this feature.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index c6938ba9ca..89a03babfc 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -795,6 +795,27 @@ static int mmc_select_hs(struct mmc *mmc)
 	return ret;
 }
 
+static int mmc_select_hs_ddr(struct mmc *mmc)
+{
+	u32 ext_csd_bits;
+	int err = 0;
+
+	if (mmc->bus_width == MMC_BUS_WIDTH_1BIT)
+		return 0;
+
+	ext_csd_bits = (mmc->bus_width == MMC_BUS_WIDTH_8BIT) ?
+			EXT_CSD_DDR_BUS_WIDTH_8 : EXT_CSD_DDR_BUS_WIDTH_4;
+
+	err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
+			 EXT_CSD_BUS_WIDTH, ext_csd_bits);
+	if (err)
+		return err;
+
+	mmc_set_timing(mmc, MMC_TIMING_MMC_DDR52);
+
+	return 0;
+}
+
 #ifndef CONFIG_SPL_BUILD
 static int mmc_select_hs200(struct mmc *mmc)
 {
@@ -941,8 +962,11 @@ static int mmc_change_freq(struct mmc *mmc)
 
 	if (mmc_card_hs200(mmc))
 		err = mmc_hs200_tuning(mmc);
-	else
+	else if (!mmc_card_hs400es(mmc)) {
 		err = mmc_select_bus_width(mmc) > 0 ? 0 : err;
+		if (!err && avail_type & EXT_CSD_CARD_TYPE_DDR_52)
+			err = mmc_select_hs_ddr(mmc);
+	}
 
 	return err;
 }

commit 0d797f1817b7b48099abdc659e661768bb1c1954
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:14 2017 +0800

    mmc: dw_mmc: reset controller after data error
    
    Per dw_mmc databook, it's recommend that reset the host contoller if
    some data-related error occurre during tuning progress.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 560a1ca4d4..f2a3989c32 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -97,7 +97,7 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data)
 {
 	int ret = 0;
 	u32 timeout = 240000;
-	u32 mask, size, i, len = 0;
+	u32 status, ctrl, mask, size, i, len = 0;
 	u32 *buf = NULL;
 	ulong start = get_timer(0);
 	u32 fifo_depth = (((host->fifoth_val & RX_WMARK_MASK) >>
@@ -114,6 +114,23 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data)
 		/* Error during data transfer. */
 		if (mask & (DWMCI_DATA_ERR | DWMCI_DATA_TOUT)) {
 			debug("%s: DATA ERROR!\n", __func__);
+
+			dwmci_wait_reset(host, DWMCI_RESET_ALL);
+			dwmci_writel(host, DWMCI_CMD, DWMCI_CMD_PRV_DAT_WAIT |
+				     DWMCI_CMD_UPD_CLK | DWMCI_CMD_START);
+
+			do {
+				status = dwmci_readl(host, DWMCI_CMD);
+				if (timeout-- < 0)
+					ret = -ETIMEDOUT;
+			} while (status & DWMCI_CMD_START);
+
+			if (!host->fifo_mode) {
+				ctrl = dwmci_readl(host, DWMCI_BMOD);
+				ctrl |= DWMCI_BMOD_IDMAC_RESET;
+				dwmci_writel(host, DWMCI_BMOD, ctrl);
+			}
+
 			ret = -EINVAL;
 			break;
 		}

commit 4455fdd99ce625d75f57206c32925e32754503d4
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:13 2017 +0800

    mmc: dw_mmc: rockchip: implement tuning with clock phase framework
    
    This algorithm will try 1 degree increment, since there's no way to tell
    what resolution the underlying phase code uses. As an added bonus, doing
    many tunings yields better results since some tests are run more than
    once (ex: if the underlying driver use 45 degree increments, the tuning
    code will try the same angle more than once).
    
    It will then construct a list of good phase ranges (even range that
    cross 270/0), will pick the biggest range then it will set the
    sample_clk to the middle of that range.
    
    Please notice that it tuning only 0-270 degree in U-Boot, but kernel
    tuning range is 0-360 degree. Below are two reasons about this:
    1. Expect data-related interrupt may miss during 270-360 degree on
    rockchip platform, dw_mmc driver will poll for data interrupt until
    240 seconds timeout afterwards. And the host controller will be left in
    an unpredictable state.
    2. The phase of a clock signal is shift by some delay elements on
    rockchip platform. And the delay element affected by logic voltage and
    temperature in runtime. These factors wouldn't have changed a lot in
    U-Boot stage.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index e7fcf89f73..f79e557ab1 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -30,6 +30,7 @@ struct rockchip_mmc_plat {
 
 struct rockchip_dwmmc_priv {
 	struct clk clk;
+	struct clk sample_clk;
 	struct dwmci_host host;
 	int fifo_depth;
 	bool fifo_mode;
@@ -95,6 +96,123 @@ static int rockchip_dwmmc_ofdata_to_platdata(struct udevice *dev)
 	return 0;
 }
 
+#define NUM_PHASES			270
+#define TUNING_ITERATION_TO_PHASE(i)	(DIV_ROUND_UP((i) * 270, NUM_PHASES))
+
+static int rockchip_dwmmc_execute_tuning(struct dwmci_host *host, u32 opcode)
+{
+	int ret = 0;
+	int i;
+	bool v, prev_v = 0, first_v;
+	struct range_t {
+		int start;
+		int end; /* inclusive */
+	};
+	struct range_t *ranges;
+	unsigned int range_count = 0;
+	int longest_range_len = -1;
+	int longest_range = -1;
+	int middle_phase;
+	struct udevice *dev = host->priv;
+	struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
+	struct mmc *mmc = host->mmc;
+
+	if (IS_ERR(&priv->sample_clk))
+		return -EIO;
+
+	ranges = calloc(sizeof(*ranges), NUM_PHASES / 2 + 1);
+	if (!ranges)
+		return -ENOMEM;
+
+	/* Try each phase and extract good ranges */
+	for (i = 0; i < NUM_PHASES; ) {
+		clk_set_phase(&priv->sample_clk, TUNING_ITERATION_TO_PHASE(i));
+
+		v = !mmc_send_tuning(mmc, opcode);
+
+		if (i == 0)
+			first_v = v;
+
+		if ((!prev_v) && v) {
+			range_count++;
+			ranges[range_count - 1].start = i;
+		}
+		if (v) {
+			ranges[range_count - 1].end = i;
+			i++;
+		} else if (i == NUM_PHASES - 1) {
+			/* No extra skipping rules if we're at the end */
+			i++;
+		} else {
+			/*
+			 * No need to check too close to an invalid
+			 * one since testing bad phases is slow.  Skip
+			 * 20 degrees.
+			 */
+			i += DIV_ROUND_UP(20 * NUM_PHASES, NUM_PHASES);
+
+			/* Always test the last one */
+			if (i >= NUM_PHASES)
+				i = NUM_PHASES - 1;
+		}
+
+		prev_v = v;
+	}
+
+	if (range_count == 0) {
+		debug("All phases bad!");
+		ret = -EIO;
+		goto free;
+	}
+
+	/* wrap around case, merge the end points */
+	if ((range_count > 1) && first_v && v) {
+		ranges[0].start = ranges[range_count - 1].start;
+		range_count--;
+	}
+
+	if (ranges[0].start == 0 && ranges[0].end == NUM_PHASES - 1) {
+		clk_set_phase(&priv->sample_clk,
+			      TUNING_ITERATION_TO_PHASE(NUM_PHASES / 2));
+		debug("All phases work, using middle phase.\n");
+		goto free;
+	}
+
+	/* Find the longest range */
+	for (i = 0; i < range_count; i++) {
+		int len = (ranges[i].end - ranges[i].start + 1);
+
+		if (len < 0)
+			len += NUM_PHASES;
+
+		if (longest_range_len < len) {
+			longest_range_len = len;
+			longest_range = i;
+		}
+
+		debug("Good phase range %d-%d (%d len)\n",
+		      TUNING_ITERATION_TO_PHASE(ranges[i].start),
+		      TUNING_ITERATION_TO_PHASE(ranges[i].end), len);
+	}
+
+	printf("Best phase range %d-%d (%d len)\n",
+	       TUNING_ITERATION_TO_PHASE(ranges[longest_range].start),
+	       TUNING_ITERATION_TO_PHASE(ranges[longest_range].end),
+	       longest_range_len);
+
+	middle_phase = ranges[longest_range].start + longest_range_len / 2;
+	middle_phase %= NUM_PHASES;
+	debug("Successfully tuned phase to %d\n",
+	      TUNING_ITERATION_TO_PHASE(middle_phase));
+
+	clk_set_phase(&priv->sample_clk,
+		      TUNING_ITERATION_TO_PHASE(middle_phase));
+
+free:
+	free(ranges);
+	return ret;
+}
+
 static int rockchip_dwmmc_probe(struct udevice *dev)
 {
 	struct rockchip_mmc_plat *plat = dev_get_platdata(dev);
@@ -111,6 +229,7 @@ static int rockchip_dwmmc_probe(struct udevice *dev)
 	host->ioaddr = map_sysmem(dtplat->reg[0], dtplat->reg[1]);
 	host->buswidth = dtplat->bus_width;
 	host->get_mmc_clk = rockchip_dwmmc_get_mmc_clk;
+	host->execute_tuning = rockchip_dwmmc_execute_tuning;
 	host->priv = dev;
 	host->dev_index = 0;
 	priv->fifo_depth = dtplat->fifo_depth;
@@ -125,6 +244,8 @@ static int rockchip_dwmmc_probe(struct udevice *dev)
 	ret = clk_get_by_index(dev, 0, &priv->clk);
 	if (ret < 0)
 		return ret;
+	clk_get_by_name(dev, "ciu_sample", &priv->sample_clk);
+	host->execute_tuning = rockchip_dwmmc_execute_tuning;
 #endif
 	host->fifoth_val = MSIZE(0x2) |
 		RX_WMARK(priv->fifo_depth / 2 - 1) |

commit 8c921dce85fe02b6276d9a170269718cb677e0f2
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:12 2017 +0800

    mmc: dw_mmc: add the support for the tuning scheme
    
    For the HS200/HS400/SDR104, tuning is needed to determine the optimal
    sampling point. Actual tuning procedure is provided by specific host
    controller driver.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 85696daaff..560a1ca4d4 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -403,6 +403,22 @@ static bool dwmci_card_busy(struct mmc *mmc)
 	return !!(status & DWMCI_BUSY);
 }
 
+#ifdef CONFIG_DM_MMC
+static int dwmci_execute_tuning(struct udevice *dev, u32 opcode)
+{
+	struct mmc *mmc = mmc_get_mmc_dev(dev);
+#else
+static int dwmci_execute_tuning(struct mmc *mmc, u32 opcode)
+{
+#endif
+	struct dwmci_host *host = (struct dwmci_host *)mmc->priv;
+
+	if (!host->execute_tuning)
+		return -EIO;
+
+	return host->execute_tuning(host, opcode);
+}
+
 #ifdef CONFIG_DM_MMC
 static int dwmci_set_ios(struct udevice *dev)
 {
@@ -498,6 +514,7 @@ const struct dm_mmc_ops dm_dwmci_ops = {
 	.card_busy	= dwmci_card_busy,
 	.send_cmd	= dwmci_send_cmd,
 	.set_ios	= dwmci_set_ios,
+	.execute_tuning	= dwmci_execute_tuning,
 };
 
 #else
@@ -506,6 +523,7 @@ static const struct mmc_ops dwmci_ops = {
 	.send_cmd	= dwmci_send_cmd,
 	.set_ios	= dwmci_set_ios,
 	.init		= dwmci_init,
+	.execute_tuning	= dwmci_execute_tuning,
 };
 #endif
 
diff --git a/include/dwmmc.h b/include/dwmmc.h
index a9058824e0..374a67d39c 100644
--- a/include/dwmmc.h
+++ b/include/dwmmc.h
@@ -180,6 +180,7 @@ struct dwmci_host {
 	 * @freq:	Frequency the host is trying to achieve
 	 */
 	unsigned int (*get_mmc_clk)(struct dwmci_host *host, uint freq);
+	int (*execute_tuning)(struct dwmci_host *host, u32 opcode);
 #ifndef CONFIG_BLK
 	struct mmc_config cfg;
 #endif

commit 11fbeef50c1bcee6aa4ff957a5eafab7b2bd788e
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:10 2017 +0800

    rockchip: clk: rk3288: add support for the clock phase
    
    This patch adds phase adjustment for mmc clock(ciu_sample), which is
    used to select the optimal sampling point of a data input.
    
    The phase shift is achieved through 255 delay elements(40-80
    picoseconds),  and calculate the number of delay element via clock
    frequency.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index 31ec327f86..bd05379c44 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -496,6 +496,7 @@ static ulong rockchip_mmc_get_clk(struct rk3288_cru *cru, uint gclk_rate,
 	switch (periph) {
 	case HCLK_EMMC:
 	case SCLK_EMMC:
+	case SCLK_EMMC_SAMPLE:
 		con = readl(&cru->cru_clksel_con[12]);
 		mux = (con & EMMC_PLL_MASK) >> EMMC_PLL_SHIFT;
 		div = (con & EMMC_DIV_MASK) >> EMMC_DIV_SHIFT;
@@ -648,7 +649,9 @@ static ulong rk3288_clk_get_rate(struct clk *clk)
 	case HCLK_SDMMC:
 	case HCLK_SDIO0:
 	case SCLK_EMMC:
+	case SCLK_EMMC_SAMPLE:
 	case SCLK_SDMMC:
+	case SCLK_SDMMC_SAMPLE:
 	case SCLK_SDIO0:
 		new_rate = rockchip_mmc_get_clk(priv->cru, gclk_rate, clk->id);
 		break;
@@ -763,9 +766,130 @@ static ulong rk3288_clk_set_rate(struct clk *clk, ulong rate)
 	return new_rate;
 }
 
+#define ROCKCHIP_MMC_DELAY_SEL		BIT(10)
+#define ROCKCHIP_MMC_DEGREE_MASK	0x3
+#define ROCKCHIP_MMC_DELAYNUM_OFFSET	2
+#define ROCKCHIP_MMC_DELAYNUM_MASK	(0xff << ROCKCHIP_MMC_DELAYNUM_OFFSET)
+
+#define PSECS_PER_SEC 1000000000000LL
+/*
+ * Each fine delay is between 44ps-77ps. Assume each fine delay is 60ps to
+ * simplify calculations. So 45degs could be anywhere between 33deg and 57.8deg.
+ */
+#define ROCKCHIP_MMC_DELAY_ELEMENT_PSEC 60
+
+int rockchip_mmc_get_phase(struct clk *clk)
+{
+	struct rk3288_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3288_cru *cru = priv->cru;
+	u32 raw_value, delay_num;
+	u16 degrees = 0;
+	ulong rate;
+
+	rate = rk3288_clk_get_rate(clk);
+
+	if (rate < 0)
+		return rate;
+
+	if (clk->id == SCLK_EMMC_SAMPLE)
+		raw_value = readl(&cru->cru_emmc_con[1]);
+	else
+		raw_value = readl(&cru->cru_sdmmc_con[1]);
+
+	degrees = (raw_value & ROCKCHIP_MMC_DEGREE_MASK) * 90;
+
+	if (raw_value & ROCKCHIP_MMC_DELAY_SEL) {
+		/* degrees/delaynum * 10000 */
+		unsigned long factor = (ROCKCHIP_MMC_DELAY_ELEMENT_PSEC / 10) *
+					36 * (rate / 1000000);
+
+		delay_num = (raw_value & ROCKCHIP_MMC_DELAYNUM_MASK);
+		delay_num >>= ROCKCHIP_MMC_DELAYNUM_OFFSET;
+		degrees += DIV_ROUND_CLOSEST(delay_num * factor, 10000);
+	}
+
+	return degrees % 360;
+}
+
+int rockchip_mmc_set_phase(struct clk *clk, u32 degrees)
+{
+	struct rk3288_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3288_cru *cru = priv->cru;
+	u8 nineties, remainder, delay_num;
+	u32 raw_value, delay;
+	ulong rate;
+
+	rate = rk3288_clk_get_rate(clk);
+
+	if (rate < 0)
+		return rate;
+
+	nineties = degrees / 90;
+	remainder = (degrees % 90);
+
+	/*
+	 * Convert to delay; do a little extra work to make sure we
+	 * don't overflow 32-bit / 64-bit numbers.
+	 */
+	delay = 10000000; /* PSECS_PER_SEC / 10000 / 10 */
+	delay *= remainder;
+	delay = DIV_ROUND_CLOSEST(delay, (rate / 1000) * 36 *
+				(ROCKCHIP_MMC_DELAY_ELEMENT_PSEC / 10));
+
+	delay_num = (u8)min_t(u32, delay, 255);
+
+	raw_value = delay_num ? ROCKCHIP_MMC_DELAY_SEL : 0;
+	raw_value |= delay_num << ROCKCHIP_MMC_DELAYNUM_OFFSET;
+	raw_value |= nineties;
+
+	if (clk->id == SCLK_EMMC_SAMPLE)
+		writel(raw_value | 0xffff0000, &cru->cru_emmc_con[1]);
+	else
+		writel(raw_value | 0xffff0000, &cru->cru_sdmmc_con[1]);
+
+	debug("mmc set_phase(%d) delay_nums=%u reg=%#x actual_degrees=%d\n",
+	      degrees, delay_num, raw_value, rockchip_mmc_get_phase(clk));
+
+	return 0;
+}
+
+static int rk3288_clk_get_phase(struct clk *clk)
+{
+	int ret;
+
+	switch (clk->id) {
+	case SCLK_EMMC_SAMPLE:
+	case SCLK_SDMMC_SAMPLE:
+		ret = rockchip_mmc_get_phase(clk);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+}
+
+static int rk3288_clk_set_phase(struct clk *clk, int degrees)
+{
+	int ret;
+
+	switch (clk->id) {
+	case SCLK_EMMC_SAMPLE:
+	case SCLK_SDMMC_SAMPLE:
+		ret = rockchip_mmc_set_phase(clk, degrees);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+}
+
 static struct clk_ops rk3288_clk_ops = {
 	.get_rate	= rk3288_clk_get_rate,
 	.set_rate	= rk3288_clk_set_rate,
+	.get_phase	= rk3288_clk_get_phase,
+	.set_phase	= rk3288_clk_set_phase,
 };
 
 static int rk3288_clk_ofdata_to_platdata(struct udevice *dev)

commit b2259b20377dc9475cb602dd473cf125e519e6af
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:09 2017 +0800

    rockchip: clk: rk3288: fix mmc clock setting
    
    Mmc clock automatically divide 2 in internal.
    
    Before this:
    gpll = 594MHz, clock = 148.5MHz
    div = 594/148.5-1 = 3
    output clock is 99MHz
    
    After this:
    gpll = 594MHz, clock = 148.5MHz
    div = 297+148.5-1/148.5 = 2
    output clock is 148.5Mhz
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index 478195b10b..31ec327f86 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -517,7 +517,7 @@ static ulong rockchip_mmc_get_clk(struct rk3288_cru *cru, uint gclk_rate,
 	}
 
 	src_rate = mux == EMMC_PLL_SELECT_24MHZ ? OSC_HZ : gclk_rate;
-	return DIV_TO_RATE(src_rate, div);
+	return DIV_TO_RATE(src_rate, div) / 2;
 }
 
 static ulong rockchip_mmc_set_clk(struct rk3288_cru *cru, uint gclk_rate,

commit 724f958711cb00e7bc38b286194101c69056c6f1
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:08 2017 +0800

    clk: introduce clk_phase get/set function & callback
    
    A common operation for a clock signal generator is to shift the phase of
    that signal. This patch introduces a new function to the clk.h API to
    dynamically adjust the phase of a clock signal. Additionally this patch
    introduces support for the new function in the clock framework via the
    .set_phase & .get_phase callback in struct clk_ops.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index e68d9279b9..4f9895b523 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -190,6 +190,26 @@ ulong clk_set_rate(struct clk *clk, ulong rate)
 	return ops->set_rate(clk, rate);
 }
 
+int clk_get_phase(struct clk *clk)
+{
+	struct clk_ops *ops = clk_dev_ops(clk->dev);
+
+	if (!ops->get_phase)
+		return -ENOSYS;
+
+	return ops->get_phase(clk);
+}
+
+int clk_set_phase(struct clk *clk, int degrees)
+{
+	struct clk_ops *ops = clk_dev_ops(clk->dev);
+
+	if (!ops->set_phase)
+		return -ENOSYS;
+
+	return ops->set_phase(clk, degrees);
+}
+
 int clk_enable(struct clk *clk)
 {
 	struct clk_ops *ops = clk_dev_ops(clk->dev);
diff --git a/include/clk-uclass.h b/include/clk-uclass.h
index e7ea334c60..a3eb3a987e 100644
--- a/include/clk-uclass.h
+++ b/include/clk-uclass.h
@@ -77,6 +77,23 @@ struct clk_ops {
 	 * @return new rate, or -ve error code.
 	 */
 	ulong (*set_rate)(struct clk *clk, ulong rate);
+	/**
+	 * clk_get_phase() - Get the phase shift of a clock signal.
+	 *
+	 * @clk:	The clock to manipulate.
+	 * @return the phase shift of a clock node in degrees,
+	 *		otherwise returns -ve error code.
+	 */
+	int (*get_phase)(struct clk *clk);
+
+	/**
+	 * clk_set_rate() - Adjust the phase shift of a clock signal.
+	 *
+	 * @clk:	The clock to manipulate.
+	 * @degrees:	Numberof degrees the signal is shifted.
+	 * @return 0 on success, or -ve error code.
+	 */
+	int (*set_phase)(struct clk *clk, int degrees);
 	/**
 	 * enable() - Enable a clock.
 	 *
diff --git a/include/clk.h b/include/clk.h
index c5988f78a8..6769c3f8e8 100644
--- a/include/clk.h
+++ b/include/clk.h
@@ -177,6 +177,26 @@ ulong clk_get_rate(struct clk *clk);
  */
 ulong clk_set_rate(struct clk *clk, ulong rate);
 
+/**
+ * clk_get_phase() - Get the phase shift of a clock signal.
+ *
+ * @clk:	A clock struct that was previously successfully requested by
+ *		clk_request/get_by_*().
+ * @return the phase shift of a clock node in degrees, otherwise returns
+ *		-ve error code.
+ */
+int clk_get_phase(struct clk *clk);
+
+/**
+ * clk_set_rate() - Adjust the phase shift of a clock signal.
+ *
+ * @clk:	A clock struct that was previously successfully requested by
+ *		clk_request/get_by_*().
+ * @degrees:	Numberof degrees the signal is shifted.
+ * @return 0 on success, or -ve error code.
+ */
+int clk_set_phase(struct clk *clk, int degrees);
+
 /**
  * clk_enable() - Enable (turn on) a clock.
  *

commit 3d4726e6b2cd97aafe2b4fe2c3b91d4eb658b61d
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:07 2017 +0800

    cmd: mmc: show the current speed mode
    
    So far mmc framework had support speed mode switch, it good to show the
    current speed mode from 'mmc info'.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/cmd/mmc.c b/cmd/mmc.c
index c635c50933..7b9d5fe991 100644
--- a/cmd/mmc.c
+++ b/cmd/mmc.c
@@ -15,6 +15,10 @@ static int curr_device = -1;
 static void print_mmcinfo(struct mmc *mmc)
 {
 	int i;
+	const char *timing[] = {
+		"Legacy", "High Speed", "High Speed", "SDR12",
+		"SDR25", "SDR50", "SDR104", "DDR50",
+		"DDR52", "HS200", "HS400", "HS400 Enhanced Strobe"};
 
 	printf("Device: %s\n", mmc->cfg->name);
 	printf("Manufacturer ID: %x\n", mmc->cid[0] >> 24);
@@ -23,6 +27,7 @@ static void print_mmcinfo(struct mmc *mmc)
 			(mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
 			(mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff);
 
+	printf("Timing Interface: %s\n", timing[mmc->timing]);
 	printf("Tran Speed: %d\n", mmc->clock);
 	printf("Rd Block Len: %d\n", mmc->read_bl_len);
 

commit 3e3ff0ac7798974e939459ad51ed1c8e58a3b9db
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:06 2017 +0800

    mmc: remove tran_speed from struct mmc
    
    The clock element is updated by mmc_set_clock every time, it denotes the
    current transfer speed.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/cmd/mmc.c b/cmd/mmc.c
index ea8adb248f..c635c50933 100644
--- a/cmd/mmc.c
+++ b/cmd/mmc.c
@@ -23,7 +23,7 @@ static void print_mmcinfo(struct mmc *mmc)
 			(mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
 			(mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff);
 
-	printf("Tran Speed: %d\n", mmc->tran_speed);
+	printf("Tran Speed: %d\n", mmc->clock);
 	printf("Rd Block Len: %d\n", mmc->read_bl_len);
 
 	printf("%s version %d.%d", IS_SD(mmc) ? "SD" : "MMC",
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 46f87c3dfe..c6938ba9ca 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -1449,7 +1449,7 @@ static bool mmc_can_card_busy(struct mmc *)
 static int mmc_startup(struct mmc *mmc)
 {
 	int err, i;
-	uint mult, freq;
+	uint mult, freq, tran_speed;
 	u64 cmult, csize, capacity;
 	struct mmc_cmd cmd;
 	ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
@@ -1545,7 +1545,7 @@ static int mmc_startup(struct mmc *mmc)
 	freq = fbase[(cmd.response[0] & 0x7)];
 	mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
 
-	mmc->tran_speed = freq * mult;
+	tran_speed = freq * mult;
 
 	mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1);
 	mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
@@ -1792,11 +1792,11 @@ static int mmc_startup(struct mmc *mmc)
 			return err;
 
 		if (mmc->card_caps & MMC_MODE_HS)
-			mmc->tran_speed = 50000000;
+			tran_speed = 50000000;
 		else
-			mmc->tran_speed = 25000000;
+			tran_speed = 25000000;
 
-		mmc_set_clock(mmc, mmc->tran_speed);
+		mmc_set_clock(mmc, tran_speed);
 	}
 
 	/* Fix the block length for DDR mode */
diff --git a/drivers/mmc/xenon_sdhci.c b/drivers/mmc/xenon_sdhci.c
index 06bbff1ff5..b9a3338666 100644
--- a/drivers/mmc/xenon_sdhci.c
+++ b/drivers/mmc/xenon_sdhci.c
@@ -318,7 +318,7 @@ static void xenon_mask_cmd_conflict_err(struct sdhci_host *host)
 static void xenon_sdhci_set_ios_post(struct sdhci_host *host)
 {
 	struct xenon_sdhci_priv *priv = host->mmc->priv;
-	uint speed = host->mmc->tran_speed;
+	uint speed = host->mmc->clock;
 	int pwr_18v = 0;
 
 	if ((sdhci_readb(host, SDHCI_POWER_CONTROL) & ~SDHCI_POWER_ON) ==
diff --git a/include/mmc.h b/include/mmc.h
index 18ef396b3d..4a9bfb5ff8 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -508,7 +508,6 @@ struct mmc {
 	u8 part_attr;
 	u8 wr_rel_set;
 	u8 part_config;
-	uint tran_speed;
 	uint read_bl_len;
 	uint write_bl_len;
 	uint erase_grp_size;	/* in 512-byte sectors */

commit caa21a21f1c85abdcf83060db76159fe85e8e540
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:05 2017 +0800

    mmc: rework ddr mode judgement with timing
    
    Since the card device is set the proper timing after speed mode switch
    is completed, host driver can get ddr_mode from timing parameter. So
    drop the antiquated ddr_mode.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/cmd/mmc.c b/cmd/mmc.c
index 00697fc1f2..ea8adb248f 100644
--- a/cmd/mmc.c
+++ b/cmd/mmc.c
@@ -38,7 +38,7 @@ static void print_mmcinfo(struct mmc *mmc)
 	print_size(mmc->capacity, "\n");
 
 	printf("Bus Width: %d-bit%s\n", mmc->bus_width,
-			mmc->ddr_mode ? " DDR" : "");
+			mmc_card_ddr(mmc) ? " DDR" : "");
 
 	puts("Erase Group Size: ");
 	print_size(((u64)mmc->erase_grp_size) << 9, "\n");
diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 3cdc5737d0..85696daaff 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -432,7 +432,7 @@ static int dwmci_set_ios(struct mmc *mmc)
 	dwmci_writel(host, DWMCI_CTYPE, ctype);
 
 	regs = dwmci_readl(host, DWMCI_UHS_REG);
-	if (mmc->ddr_mode)
+	if (mmc_card_ddr(mmc))
 		regs |= DWMCI_DDR_MODE;
 	else
 		regs &= ~DWMCI_DDR_MODE;
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index cc188c4260..e3d1f91c94 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -407,7 +407,7 @@ static int esdhc_send_cmd_common(struct fsl_esdhc_priv *priv, struct mmc *mmc,
 #if defined(CONFIG_FSL_USDHC)
 	esdhc_write32(&regs->mixctrl,
 	(esdhc_read32(&regs->mixctrl) & 0xFFFFFF80) | (xfertyp & 0x7F)
-			| (mmc->ddr_mode ? XFERTYP_DDREN : 0));
+			| (mmc_card_ddr(mmc) ? XFERTYP_DDREN : 0));
 	esdhc_write32(&regs->xfertyp, xfertyp & 0xFFFF0000);
 #else
 	esdhc_write32(&regs->xfertyp, xfertyp);
@@ -548,7 +548,7 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock)
 	while (sdhc_clk / (div * pre_div * ddr_pre_div) > clock && div < 16)
 		div++;
 
-	pre_div >>= 1;
+	pre_div >>= mmc_card_ddr(mmc) ? 2 : 1;
 	div -= 1;
 
 	clk = (pre_div << 8) | (div << 4);
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index f07f066099..46f87c3dfe 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -210,7 +210,7 @@ int mmc_set_blocklen(struct mmc *mmc, int len)
 {
 	struct mmc_cmd cmd;
 
-	if (mmc->ddr_mode)
+	if (mmc_card_ddr(mmc))
 		return 0;
 
 	cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
@@ -1933,7 +1933,6 @@ int mmc_start_init(struct mmc *mmc)
 	if (err)
 		return err;
 #endif
-	mmc->ddr_mode = 0;
 	mmc_set_bus_width(mmc, 1);
 	mmc_set_clock(mmc, 1);
 	mmc_set_timing(mmc, MMC_TIMING_LEGACY);
diff --git a/drivers/mmc/uniphier-sd.c b/drivers/mmc/uniphier-sd.c
index e272b14153..398bd5648a 100644
--- a/drivers/mmc/uniphier-sd.c
+++ b/drivers/mmc/uniphier-sd.c
@@ -532,7 +532,7 @@ static void uniphier_sd_set_ddr_mode(struct uniphier_sd_priv *priv,
 	u32 tmp;
 
 	tmp = readl(priv->regbase + UNIPHIER_SD_IF_MODE);
-	if (mmc->ddr_mode)
+	if (mmc_card_ddr(mmc))
 		tmp |= UNIPHIER_SD_IF_MODE_DDR;
 	else
 		tmp &= ~UNIPHIER_SD_IF_MODE_DDR;
@@ -599,7 +599,7 @@ static int uniphier_sd_set_ios(struct udevice *dev)
 	int ret;
 
 	dev_dbg(dev, "clock %uHz, DDRmode %d, width %u\n",
-		mmc->clock, mmc->ddr_mode, mmc->bus_width);
+		mmc->clock, mmc_card_ddr(mmc), mmc->bus_width);
 
 	ret = uniphier_sd_set_bus_width(priv, mmc);
 	if (ret)
diff --git a/drivers/mmc/xenon_sdhci.c b/drivers/mmc/xenon_sdhci.c
index 83037fe7ec..06bbff1ff5 100644
--- a/drivers/mmc/xenon_sdhci.c
+++ b/drivers/mmc/xenon_sdhci.c
@@ -237,7 +237,7 @@ static void xenon_mmc_phy_set(struct sdhci_host *host)
 	sdhci_writew(host, var, SDHCI_CLOCK_CONTROL);
 
 	var = sdhci_readl(host, EMMC_PHY_FUNC_CONTROL);
-	if (host->mmc->ddr_mode) {
+	if (mmc_card_ddr(host->mmc)) {
 		var |= (DQ_DDR_MODE_MASK << DQ_DDR_MODE_SHIFT) | CMD_DDR_MODE;
 	} else {
 		var &= ~((DQ_DDR_MODE_MASK << DQ_DDR_MODE_SHIFT) |
@@ -329,7 +329,7 @@ static void xenon_sdhci_set_ios_post(struct sdhci_host *host)
 	if (IS_SD(host->mmc)) {
 		/* SD/SDIO */
 		if (pwr_18v) {
-			if (host->mmc->ddr_mode)
+			if (mmc_card_ddr(host->mmc))
 				priv->timing = MMC_TIMING_UHS_DDR50;
 			else if (speed <= 25000000)
 				priv->timing = MMC_TIMING_UHS_SDR25;
@@ -343,7 +343,7 @@ static void xenon_sdhci_set_ios_post(struct sdhci_host *host)
 		}
 	} else {
 		/* eMMC */
-		if (host->mmc->ddr_mode)
+		if (mmc_card_ddr(host->mmc))
 			priv->timing = MMC_TIMING_MMC_DDR52;
 		else if (speed <= 26000000)
 			priv->timing = MMC_TIMING_LEGACY;
diff --git a/include/mmc.h b/include/mmc.h
index ba63405a03..18ef396b3d 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -527,7 +527,6 @@ struct mmc {
 	char op_cond_pending;	/* 1 if we are waiting on an op_cond command */
 	char init_in_progress;	/* 1 if we have done mmc_start_init() */
 	char preinit;		/* start init as early as possible */
-	int ddr_mode;
 #if CONFIG_IS_ENABLED(DM_MMC)
 	struct udevice *dev;	/* Device for this MMC controller */
 #endif

commit 49dba0331173456ba11eb71244199939c037004b
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:04 2017 +0800

    mmc: add support for HS200 mode of eMMC4.5
    
    Add the support of the HS200 mode for eMMC 4.5 devices. The eMMC 4.5
    device has support up to 200MHz bus speed, it can speed up the boot speed.
    
    We can enable this feature via MMC_MODE_HS200 if the host controller has
    the ability to support HS200 timing. Also the tuning feature required
    when the HS200 mode is selected.
    
    By the way, mmc card can only switch to high speed mode in SPL stage.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index c8043c898a..f07f066099 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -318,6 +318,26 @@ ulong mmc_bread(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt,
 	return blkcnt;
 }
 
+void mmc_set_clock(struct mmc *mmc, uint clock)
+{
+	if (clock > mmc->cfg->f_max)
+		clock = mmc->cfg->f_max;
+
+	if (clock < mmc->cfg->f_min)
+		clock = mmc->cfg->f_min;
+
+	mmc->clock = clock;
+
+	mmc_set_ios(mmc);
+}
+
+static void mmc_set_bus_width(struct mmc *mmc, uint width)
+{
+	mmc->bus_width = width;
+
+	mmc_set_ios(mmc);
+}
+
 static void mmc_set_timing(struct mmc *mmc, uint timing)
 {
 	mmc->timing = timing;
@@ -587,6 +607,181 @@ int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
 	return __mmc_switch(mmc, set, index, value, true);
 }
 
+static int mmc_select_bus_width(struct mmc *mmc)
+{
+	u32 ext_csd_bits[] = {
+		EXT_CSD_BUS_WIDTH_8,
+		EXT_CSD_BUS_WIDTH_4,
+	};
+	u32 bus_widths[] = {
+		MMC_BUS_WIDTH_8BIT,
+		MMC_BUS_WIDTH_4BIT,
+	};
+	ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
+	ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
+	u32 idx, bus_width = 0;
+	int err = 0;
+
+	if (mmc->version < MMC_VERSION_4 ||
+	    !(mmc->cfg->host_caps & (MMC_MODE_4BIT | MMC_MODE_8BIT)))
+		return 0;
+
+	err = mmc_send_ext_csd(mmc, ext_csd);
+
+	if (err)
+		return err;
+
+	idx = (mmc->cfg->host_caps & MMC_MODE_8BIT) ? 0 : 1;
+
+	/*
+	 * Unlike SD, MMC cards dont have a configuration register to notify
+	 * supported bus width. So bus test command should be run to identify
+	 * the supported bus width or compare the ext csd values of current
+	 * bus width and ext csd values of 1 bit mode read earlier.
+	 */
+	for (; idx < ARRAY_SIZE(bus_widths); idx++) {
+		/*
+		 * Host is capable of 8bit transfer, then switch
+		 * the device to work in 8bit transfer mode. If the
+		 * mmc switch command returns error then switch to
+		 * 4bit transfer mode. On success set the corresponding
+		 * bus width on the host.
+		 */
+		err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
+				 EXT_CSD_BUS_WIDTH, ext_csd_bits[idx]);
+		if (err)
+			continue;
+
+		bus_width = bus_widths[idx];
+		mmc_set_bus_width(mmc, bus_width);
+
+		err = mmc_send_ext_csd(mmc, test_csd);
+
+		if (err)
+			continue;
+
+		/* Only compare read only fields */
+		if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] ==
+			test_csd[EXT_CSD_PARTITIONING_SUPPORT]) &&
+		    (ext_csd[EXT_CSD_HC_WP_GRP_SIZE] ==
+			test_csd[EXT_CSD_HC_WP_GRP_SIZE]) &&
+		    (ext_csd[EXT_CSD_REV] == test_csd[EXT_CSD_REV]) &&
+			(ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] ==
+			test_csd[EXT_CSD_HC_ERASE_GRP_SIZE]) &&
+		    !memcmp(&ext_csd[EXT_CSD_SEC_CNT],
+			&test_csd[EXT_CSD_SEC_CNT], 4)) {
+			err = bus_width;
+			break;
+		} else {
+			err = -EBADMSG;
+		}
+	}
+
+	return err;
+}
+
+static const u8 tuning_blk_pattern_4bit[] = {
+	0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
+	0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
+	0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
+	0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
+	0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
+	0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
+	0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
+	0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
+};
+
+static const u8 tuning_blk_pattern_8bit[] = {
+	0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
+	0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
+	0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
+	0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
+	0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
+	0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
+	0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
+	0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
+	0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
+	0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
+	0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
+	0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
+	0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
+	0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
+	0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
+	0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
+};
+
+int mmc_send_tuning(struct mmc *mmc, u32 opcode)
+{
+	struct mmc_cmd cmd;
+	struct mmc_data data;
+	const u8 *tuning_block_pattern;
+	int size, err = 0;
+	u8 *data_buf;
+
+	if (mmc->bus_width == MMC_BUS_WIDTH_8BIT) {
+		tuning_block_pattern = tuning_blk_pattern_8bit;
+		size = sizeof(tuning_blk_pattern_8bit);
+	} else if (mmc->bus_width == MMC_BUS_WIDTH_4BIT) {
+		tuning_block_pattern = tuning_blk_pattern_4bit;
+		size = sizeof(tuning_blk_pattern_4bit);
+	} else {
+		return -EINVAL;
+	}
+
+	data_buf = calloc(1, size);
+	if (!data_buf)
+		return -ENOMEM;
+
+	cmd.cmdidx = opcode;
+	cmd.resp_type = MMC_RSP_R1;
+	cmd.cmdarg = 0;
+
+	data.dest = (char *)data_buf;
+	data.blocksize = size;
+	data.blocks = 1;
+	data.flags = MMC_DATA_READ;
+
+	err = mmc_send_cmd(mmc, &cmd, &data);
+	if (err)
+		goto out;
+
+	if (memcmp(data_buf, tuning_block_pattern, size))
+		err = -EIO;
+out:
+	free(data_buf);
+	return err;
+}
+
+static int mmc_execute_tuning(struct mmc *mmc)
+{
+#ifdef CONFIG_DM_MMC
+	struct dm_mmc_ops *ops = mmc_get_ops(mmc->dev);
+#endif
+	u32 opcode;
+
+	if (IS_SD(mmc))
+		opcode = MMC_SEND_TUNING_BLOCK;
+	else
+		opcode = MMC_SEND_TUNING_BLOCK_HS200;
+
+#ifndef CONFIG_DM_MMC
+	if (mmc->cfg->ops->execute_tuning) {
+		return mmc->cfg->ops->execute_tuning(mmc, opcode);
+#else
+	if (ops->execute_tuning) {
+		return ops->execute_tuning(mmc->dev, opcode);
+#endif
+	} else {
+		debug("Tuning feature required for HS200 mode.\n");
+		return -EIO;
+	}
+}
+
+static int mmc_hs200_tuning(struct mmc *mmc)
+{
+	return mmc_execute_tuning(mmc);
+}
+
 static int mmc_select_hs(struct mmc *mmc)
 {
 	int ret;
@@ -600,6 +795,45 @@ static int mmc_select_hs(struct mmc *mmc)
 	return ret;
 }
 
+#ifndef CONFIG_SPL_BUILD
+static int mmc_select_hs200(struct mmc *mmc)
+{
+	int ret;
+	struct mmc_cmd cmd;
+
+	/*
+	 * Set the bus width(4 or 8) with host's support and
+	 * switch to HS200 mode if bus width is set successfully.
+	 */
+	ret = mmc_select_bus_width(mmc);
+
+	if (ret > 0) {
+		ret = __mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
+				   EXT_CSD_HS_TIMING,
+				   EXT_CSD_TIMING_HS200, false);
+
+		if (ret)
+			return ret;
+
+		mmc_set_timing(mmc, MMC_TIMING_MMC_HS200);
+
+		cmd.cmdidx = MMC_CMD_SEND_STATUS;
+		cmd.resp_type = MMC_RSP_R1;
+		cmd.cmdarg = mmc->rca << 16;
+
+		ret = mmc_send_cmd(mmc, &cmd, NULL);
+
+		if (ret)
+			return ret;
+
+		if (cmd.response[0] & MMC_STATUS_SWITCH_ERROR)
+			return -EBADMSG;
+	}
+
+	return ret;
+}
+#endif
+
 static u32 mmc_select_card_type(struct mmc *mmc, u8 *ext_csd)
 {
 	u8 card_type;
@@ -651,10 +885,24 @@ static u32 mmc_select_card_type(struct mmc *mmc, u8 *ext_csd)
 	return avail_type;
 }
 
+static void mmc_set_bus_speed(struct mmc *mmc, u8 avail_type)
+{
+	int clock = 0;
+
+	if (mmc_card_hs(mmc))
+		clock = (avail_type & EXT_CSD_CARD_TYPE_52) ?
+			MMC_HIGH_52_MAX_DTR : MMC_HIGH_26_MAX_DTR;
+	else if (mmc_card_hs200(mmc) ||
+		 mmc_card_hs400(mmc) ||
+		 mmc_card_hs400es(mmc))
+		clock = MMC_HS200_MAX_DTR;
+
+	mmc_set_clock(mmc, clock);
+}
+
 static int mmc_change_freq(struct mmc *mmc)
 {
 	ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
-	char cardtype;
 	u32 avail_type;
 	int err;
 
@@ -674,9 +922,13 @@ static int mmc_change_freq(struct mmc *mmc)
 	if (err)
 		return err;
 
-	cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf;
 	avail_type = mmc_select_card_type(mmc, ext_csd);
 
+#ifndef CONFIG_SPL_BUILD
+	if (avail_type & EXT_CSD_CARD_TYPE_HS200)
+		err = mmc_select_hs200(mmc);
+	else
+#endif
 	if (avail_type & EXT_CSD_CARD_TYPE_HS)
 		err = mmc_select_hs(mmc);
 	else
@@ -685,26 +937,14 @@ static int mmc_change_freq(struct mmc *mmc)
 	if (err)
 		return err;
 
-	/* Now check to see that it worked */
-	err = mmc_send_ext_csd(mmc, ext_csd);
-
-	if (err)
-		return err;
+	mmc_set_bus_speed(mmc, avail_type);
 
-	/* No high-speed support */
-	if (!ext_csd[EXT_CSD_HS_TIMING])
-		return 0;
-
-	/* High Speed is set, there are two types: 52MHz and 26MHz */
-	if (cardtype & EXT_CSD_CARD_TYPE_52) {
-		if (cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V)
-			mmc->card_caps |= MMC_MODE_DDR_52MHz;
-		mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
-	} else {
-		mmc->card_caps |= MMC_MODE_HS;
-	}
+	if (mmc_card_hs200(mmc))
+		err = mmc_hs200_tuning(mmc);
+	else
+		err = mmc_select_bus_width(mmc) > 0 ? 0 : err;
 
-	return 0;
+	return err;
 }
 
 static int mmc_set_capacity(struct mmc *mmc, int part_num)
@@ -1206,26 +1446,6 @@ static bool mmc_can_card_busy(struct mmc *)
 }
 #endif
 
-void mmc_set_clock(struct mmc *mmc, uint clock)
-{
-	if (clock > mmc->cfg->f_max)
-		clock = mmc->cfg->f_max;
-
-	if (clock < mmc->cfg->f_min)
-		clock = mmc->cfg->f_min;
-
-	mmc->clock = clock;
-
-	mmc_set_ios(mmc);
-}
-
-static void mmc_set_bus_width(struct mmc *mmc, uint width)
-{
-	mmc->bus_width = width;
-
-	mmc_set_ios(mmc);
-}
-
 static int mmc_startup(struct mmc *mmc)
 {
 	int err, i;
@@ -1233,7 +1453,6 @@ static int mmc_startup(struct mmc *mmc)
 	u64 cmult, csize, capacity;
 	struct mmc_cmd cmd;
 	ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
-	ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
 	bool has_parts = false;
 	bool part_completed;
 	struct blk_desc *bdesc;
@@ -1576,102 +1795,12 @@ static int mmc_startup(struct mmc *mmc)
 			mmc->tran_speed = 50000000;
 		else
 			mmc->tran_speed = 25000000;
-	} else if (mmc->version >= MMC_VERSION_4) {
-		/* Only version 4 of MMC supports wider bus widths */
-		int idx;
-
-		/* An array of possible bus widths in order of preference */
-		static unsigned ext_csd_bits[] = {
-			EXT_CSD_DDR_BUS_WIDTH_8,
-			EXT_CSD_DDR_BUS_WIDTH_4,
-			EXT_CSD_BUS_WIDTH_8,
-			EXT_CSD_BUS_WIDTH_4,
-			EXT_CSD_BUS_WIDTH_1,
-		};
-
-		/* An array to map CSD bus widths to host cap bits */
-		static unsigned ext_to_hostcaps[] = {
-			[EXT_CSD_DDR_BUS_WIDTH_4] =
-				MMC_MODE_DDR_52MHz | MMC_MODE_4BIT,
-			[EXT_CSD_DDR_BUS_WIDTH_8] =
-				MMC_MODE_DDR_52MHz | MMC_MODE_8BIT,
-			[EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT,
-			[EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT,
-		};
-
-		/* An array to map chosen bus width to an integer */
-		static unsigned widths[] = {
-			8, 4, 8, 4, 1,
-		};
-
-		for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) {
-			unsigned int extw = ext_csd_bits[idx];
-			unsigned int caps = ext_to_hostcaps[extw];
-
-			/*
-			 * If the bus width is still not changed,
-			 * don't try to set the default again.
-			 * Otherwise, recover from switch attempts
-			 * by switching to 1-bit bus width.
-			 */
-			if (extw == EXT_CSD_BUS_WIDTH_1 &&
-					mmc->bus_width == 1) {
-				err = 0;
-				break;
-			}
-
-			/*
-			 * Check to make sure the card and controller support
-			 * these capabilities
-			 */
-			if ((mmc->card_caps & caps) != caps)
-				continue;
-
-			err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
-					EXT_CSD_BUS_WIDTH, extw);
-
-			if (err)
-				continue;
-
-			mmc->ddr_mode = (caps & MMC_MODE_DDR_52MHz) ? 1 : 0;
-			mmc_set_bus_width(mmc, widths[idx]);
 
-			err = mmc_send_ext_csd(mmc, test_csd);
-
-			if (err)
-				continue;
-
-			/* Only compare read only fields */
-			if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT]
-				== test_csd[EXT_CSD_PARTITIONING_SUPPORT] &&
-			    ext_csd[EXT_CSD_HC_WP_GRP_SIZE]
-				== test_csd[EXT_CSD_HC_WP_GRP_SIZE] &&
-			    ext_csd[EXT_CSD_REV]
-				== test_csd[EXT_CSD_REV] &&
-			    ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
-				== test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] &&
-			    memcmp(&ext_csd[EXT_CSD_SEC_CNT],
-				   &test_csd[EXT_CSD_SEC_CNT], 4) == 0)
-				break;
-			else
-				err = -EBADMSG;
-		}
-
-		if (err)
-			return err;
-
-		if (mmc->card_caps & MMC_MODE_HS) {
-			if (mmc->card_caps & MMC_MODE_HS_52MHz)
-				mmc->tran_speed = 52000000;
-			else
-				mmc->tran_speed = 26000000;
-		}
+		mmc_set_clock(mmc, mmc->tran_speed);
 	}
 
-	mmc_set_clock(mmc, mmc->tran_speed);
-
 	/* Fix the block length for DDR mode */
-	if (mmc->ddr_mode) {
+	if (mmc_card_ddr(mmc)) {
 		mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
 		mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
 	}
diff --git a/include/mmc.h b/include/mmc.h
index 075a1aad3b..ba63405a03 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -85,6 +85,8 @@
 #define MMC_CMD_SET_BLOCKLEN		16
 #define MMC_CMD_READ_SINGLE_BLOCK	17
 #define MMC_CMD_READ_MULTIPLE_BLOCK	18
+#define MMC_SEND_TUNING_BLOCK		19
+#define MMC_SEND_TUNING_BLOCK_HS200	21
 #define MMC_CMD_SET_BLOCK_COUNT         23
 #define MMC_CMD_WRITE_SINGLE_BLOCK	24
 #define MMC_CMD_WRITE_MULTIPLE_BLOCK	25
@@ -391,6 +393,17 @@ struct dm_mmc_ops {
 	 * @return 0 if write-enabled, 1 if write-protected, -ve on error
 	 */
 	int (*get_wp)(struct udevice *dev);
+
+	/**
+	 * execute_tuning() - Find the optimal sampling point of a data
+	 *			input signals.
+	 *
+	 * @dev:	Device to check
+	 * @opcode:	The tuning command opcode value is different
+	 *		for SD and eMMC cards
+	 * @return 0 if write-enabled, 1 if write-protected, -ve on error
+	 */
+	int (*execute_tuning)(struct udevice *dev, u32 opcode);
 };
 
 #define mmc_get_ops(dev)        ((struct dm_mmc_ops *)(dev)->driver->ops)
@@ -417,6 +430,7 @@ struct mmc_ops {
 	int (*init)(struct mmc *mmc);
 	int (*getcd)(struct mmc *mmc);
 	int (*getwp)(struct mmc *mmc);
+	int (*execute_tuning)(struct udevice *dev, u32 opcode);
 };
 #endif
 
@@ -455,6 +469,11 @@ struct mmc {
 	uint has_init;
 	int high_capacity;
 	uint bus_width;
+
+#define MMC_BUS_WIDTH_1BIT	1
+#define MMC_BUS_WIDTH_4BIT	4
+#define MMC_BUS_WIDTH_8BIT	8
+
 	uint timing;
 
 #define MMC_TIMING_LEGACY	0
@@ -471,6 +490,12 @@ struct mmc {
 #define MMC_TIMING_MMC_HS400ES	11
 
 	uint clock;
+
+#define MMC_HIGH_26_MAX_DTR	26000000
+#define MMC_HIGH_52_MAX_DTR	52000000
+#define MMC_HIGH_DDR_MAX_DTR	52000000
+#define MMC_HS200_MAX_DTR	200000000
+
 	uint card_caps;
 	uint ocr;
 	uint dsr;
@@ -563,6 +588,8 @@ static inline bool mmc_card_hs400es(struct mmc *mmc)
 	return mmc->timing == MMC_TIMING_MMC_HS400ES;
 }
 
+int mmc_send_tuning(struct mmc *mmc, u32 opcode);
+
 struct mmc *mmc_create(const struct mmc_config *cfg, void *priv);
 
 /**

commit 55e5defd207194cd5883c3f37ee40806ce624e1b
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:03 2017 +0800

    mmc: rework mmc_switch for non-send_status scenario
    
    Per JEDEC spec, it is not recommended to use cmd13 to get card status
    after speed mode switch. CMD13 can't be guaranteed due to the
    asynchronous operation.
    
    Besieds, if the host controller supports busy detection in HW, we use it
    instead of cmd13.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index e1e835849e..c8043c898a 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -523,10 +523,46 @@ static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
 	return err;
 }
 
-int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
+static int mmc_poll_for_busy(struct mmc *mmc)
 {
 	struct mmc_cmd cmd;
+	u8 busy = true;
+	uint start;
+	int ret;
 	int timeout = 1000;
+
+	cmd.cmdidx = MMC_CMD_SEND_STATUS;
+	cmd.resp_type = MMC_RSP_R1;
+	cmd.cmdarg = mmc->rca << 16;
+
+	start = get_timer(0);
+
+	do {
+		if (mmc_can_card_busy(mmc)) {
+			busy = mmc_card_busy(mmc);
+		} else {
+			ret = mmc_send_cmd(mmc, &cmd, NULL);
+
+			if (ret)
+				return ret;
+
+			if (cmd.response[0] & MMC_STATUS_SWITCH_ERROR)
+				return -EBADMSG;
+			busy = (cmd.response[0] & MMC_STATUS_CURR_STATE) ==
+				MMC_STATE_PRG;
+		}
+
+		if (get_timer(start) > timeout && busy)
+			return -ETIMEDOUT;
+	} while (busy);
+
+	return 0;
+}
+
+static int __mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value,
+			u8 send_status)
+{
+	struct mmc_cmd cmd;
 	int retries = 3;
 	int ret;
 
@@ -536,20 +572,19 @@ int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
 				 (index << 16) |
 				 (value << 8);
 
-	while (retries > 0) {
+	do {
 		ret = mmc_send_cmd(mmc, &cmd, NULL);
 
-		/* Waiting for the ready status */
-		if (!ret) {
-			ret = mmc_send_status(mmc, timeout);
-			return ret;
-		}
-
-		retries--;
-	}
+		if (!ret && send_status)
+			return mmc_poll_for_busy(mmc);
+	} while (--retries > 0 && ret);
 
 	return ret;
+}
 
+int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
+{
+	return __mmc_switch(mmc, set, index, value, true);
 }
 
 static int mmc_select_hs(struct mmc *mmc)

commit bdd003c0cb1d870daaf1cadfe524b2daa4192131
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:02 2017 +0800

    mmc: sdhci: implement card_busy detection
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index e79b98bd08..1b947dc7fc 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -422,6 +422,23 @@ static void sdhci_set_power(struct sdhci_host *host, unsigned short power)
 	sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL);
 }
 
+#ifdef CONFIG_DM_MMC
+static bool sdhci_card_busy(struct udevice *dev)
+{
+	struct mmc *mmc = mmc_get_mmc_dev(dev);
+#else
+static bool sdhci_card_busy(struct mmc *mmc)
+{
+#endif
+	struct sdhci_host *host = mmc->priv;
+	u32 present_state;
+
+	/* Check whether DAT[0] is 0 */
+	present_state = sdhci_readl(host, SDHCI_PRESENT_STATE);
+
+	return !(present_state & SDHCI_DATA_0_LVL);
+}
+
 #ifdef CONFIG_DM_MMC
 static int sdhci_set_ios(struct udevice *dev)
 {
@@ -509,11 +526,13 @@ int sdhci_probe(struct udevice *dev)
 }
 
 const struct dm_mmc_ops sdhci_ops = {
+	.card_busy	= sdhci_card_busy,
 	.send_cmd	= sdhci_send_command,
 	.set_ios	= sdhci_set_ios,
 };
 #else
 static const struct mmc_ops sdhci_ops = {
+	.card_busy	= sdhci_card_busy,
 	.send_cmd	= sdhci_send_command,
 	.set_ios	= sdhci_set_ios,
 	.init		= sdhci_init,
diff --git a/include/sdhci.h b/include/sdhci.h
index 7e84012f60..4348f1149d 100644
--- a/include/sdhci.h
+++ b/include/sdhci.h
@@ -64,6 +64,7 @@
 #define  SDHCI_CARD_STATE_STABLE	BIT(17)
 #define  SDHCI_CARD_DETECT_PIN_LEVEL	BIT(18)
 #define  SDHCI_WRITE_PROTECT	BIT(19)
+#define SDHCI_DATA_0_LVL	BIT(20)
 
 #define SDHCI_HOST_CONTROL	0x28
 #define  SDHCI_CTRL_LED		BIT(0)

commit ba0e56e1b7a9a529af8105ad005a730a7656d1ca
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:01 2017 +0800

    mmc: dw_mmc: implement card_busy detection
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 23f642980b..3cdc5737d0 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -383,6 +383,26 @@ static int dwmci_setup_bus(struct dwmci_host *host, u32 freq)
 	return 0;
 }
 
+#ifdef CONFIG_DM_MMC
+static bool dwmci_card_busy(struct udevice *dev)
+{
+	struct mmc *mmc = mmc_get_mmc_dev(dev);
+#else
+static bool dwmci_card_busy(struct mmc *mmc)
+{
+#endif
+	u32 status;
+	struct dwmci_host *host = (struct dwmci_host *)mmc->priv;
+
+	/*
+	 * Check the busy bit which is low when DAT[3:0]
+	 * (the data lines) are 0000
+	 */
+	status = dwmci_readl(host, DWMCI_STATUS);
+
+	return !!(status & DWMCI_BUSY);
+}
+
 #ifdef CONFIG_DM_MMC
 static int dwmci_set_ios(struct udevice *dev)
 {
@@ -475,12 +495,14 @@ int dwmci_probe(struct udevice *dev)
 }
 
 const struct dm_mmc_ops dm_dwmci_ops = {
+	.card_busy	= dwmci_card_busy,
 	.send_cmd	= dwmci_send_cmd,
 	.set_ios	= dwmci_set_ios,
 };
 
 #else
 static const struct mmc_ops dwmci_ops = {
+	.card_busy	= dwmci_card_busy,
 	.send_cmd	= dwmci_send_cmd,
 	.set_ios	= dwmci_set_ios,
 	.init		= dwmci_init,

commit ad77484a25657c67fa9e48ed7e125617670297bf
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:00 2017 +0800

    mmc: add card_busy to query card status
    
    Card devices get into busy status since host request speed mode
    switch, if host controller is able to query whether the device is busy,
    try it instead of sending cmd13.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/mmc-uclass.c b/drivers/mmc/mmc-uclass.c
index 5dda20cda5..1a11844cae 100644
--- a/drivers/mmc/mmc-uclass.c
+++ b/drivers/mmc/mmc-uclass.c
@@ -37,6 +37,22 @@ int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
 	return dm_mmc_send_cmd(mmc->dev, cmd, data);
 }
 
+bool mmc_card_busy(struct mmc *mmc)
+{
+	struct dm_mmc_ops *ops = mmc_get_ops(mmc->dev);
+
+	if (!ops->card_busy)
+		return -ENOSYS;
+	return ops->card_busy(mmc->dev);
+}
+
+bool mmc_can_card_busy(struct mmc *mmc)
+{
+	struct dm_mmc_ops *ops = mmc_get_ops(mmc->dev);
+
+	return !!ops->card_busy;
+}
+
 int dm_mmc_set_ios(struct udevice *dev)
 {
 	struct dm_mmc_ops *ops = mmc_get_ops(dev);
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index d3bc99abc9..e1e835849e 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -1156,6 +1156,19 @@ static void mmc_set_ios(struct mmc *mmc)
 	if (mmc->cfg->ops->set_ios)
 		mmc->cfg->ops->set_ios(mmc);
 }
+
+static bool mmc_card_busy(struct mmc *mmc)
+{
+	if (!mmc->cfg->ops->card_busy)
+		return -ENOSYS;
+
+	return mmc->cfg->ops->card_busy(mmc);
+}
+
+static bool mmc_can_card_busy(struct mmc *)
+{
+	return !!mmc->cfg->ops->card_busy;
+}
 #endif
 
 void mmc_set_clock(struct mmc *mmc, uint clock)
diff --git a/include/mmc.h b/include/mmc.h
index 418f842dd2..075a1aad3b 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -360,6 +360,14 @@ struct dm_mmc_ops {
 	int (*send_cmd)(struct udevice *dev, struct mmc_cmd *cmd,
 			struct mmc_data *data);
 
+	/**
+	 * card_busy() - Query the card device status
+	 *
+	 * @dev:	Device to update
+	 * @return true if card device is busy
+	 */
+	bool (*card_busy)(struct udevice *dev);
+
 	/**
 	 * set_ios() - Set the I/O speed/width for an MMC device
 	 *
@@ -394,12 +402,15 @@ int dm_mmc_get_cd(struct udevice *dev);
 int dm_mmc_get_wp(struct udevice *dev);
 
 /* Transition functions for compatibility */
+bool mmc_card_busy(struct mmc *mmc);
+bool mmc_can_card_busy(struct mmc *mmc);
 int mmc_set_ios(struct mmc *mmc);
 int mmc_getcd(struct mmc *mmc);
 int mmc_getwp(struct mmc *mmc);
 
 #else
 struct mmc_ops {
+	bool (*card_busy)(struct mmc *mmc);
 	int (*send_cmd)(struct mmc *mmc,
 			struct mmc_cmd *cmd, struct mmc_data *data);
 	int (*set_ios)(struct mmc *mmc);

commit 9f83e5c69a86e120991ff069c4d61f969593c182
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:06:59 2017 +0800

    mmc: sdhci: fix HISPD bit setting
    
    Configure HISPD bit field according to the timing parameter instead of
    the card clock frequency.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index 11d1f0c24c..e79b98bd08 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -456,14 +456,12 @@ static int sdhci_set_ios(struct mmc *mmc)
 			ctrl &= ~SDHCI_CTRL_4BITBUS;
 	}
 
-	if (mmc->clock > 26000000)
+	if (!(mmc->timing == MMC_TIMING_LEGACY) &&
+	    !(host->quirks & SDHCI_QUIRK_NO_HISPD_BIT))
 		ctrl |= SDHCI_CTRL_HISPD;
 	else
 		ctrl &= ~SDHCI_CTRL_HISPD;
 
-	if (host->quirks & SDHCI_QUIRK_NO_HISPD_BIT)
-		ctrl &= ~SDHCI_CTRL_HISPD;
-
 	sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
 
 	/* If available, call the driver specific "post" set_ios() function */

commit e61cd3d745c6ec050bffc7d1e9ba81c391984113
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:06:58 2017 +0800

    mmc: rework high speed mode selection
    
    Select timing parameter for the host since HS mode switch is completed.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 9a0f19b67f..d3bc99abc9 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -552,6 +552,19 @@ int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
 
 }
 
+static int mmc_select_hs(struct mmc *mmc)
+{
+	int ret;
+
+	ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
+			 EXT_CSD_HS_TIMING, EXT_CSD_TIMING_HS);
+
+	if (!ret)
+		mmc_set_timing(mmc, MMC_TIMING_MMC_HS);
+
+	return ret;
+}
+
 static u32 mmc_select_card_type(struct mmc *mmc, u8 *ext_csd)
 {
 	u8 card_type;
@@ -630,8 +643,7 @@ static int mmc_change_freq(struct mmc *mmc)
 	avail_type = mmc_select_card_type(mmc, ext_csd);
 
 	if (avail_type & EXT_CSD_CARD_TYPE_HS)
-		err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
-				 EXT_CSD_HS_TIMING, 1);
+		err = mmc_select_hs(mmc);
 	else
 		err = -EINVAL;
 
diff --git a/include/mmc.h b/include/mmc.h
index 441f3eb273..418f842dd2 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -228,6 +228,12 @@
 #define EXT_CSD_DDR_BUS_WIDTH_4	5	/* Card is in 4 bit DDR mode */
 #define EXT_CSD_DDR_BUS_WIDTH_8	6	/* Card is in 8 bit DDR mode */
 
+#define EXT_CSD_TIMING_BC	0	/* Backwards compatility */
+#define EXT_CSD_TIMING_HS	1	/* High speed */
+#define EXT_CSD_TIMING_HS200	2	/* HS200 */
+#define EXT_CSD_TIMING_HS400	3	/* HS400 */
+#define EXT_CSD_DRV_STR_SHIFT	4	/* Driver Strength shift */
+
 #define EXT_CSD_BOOT_ACK_ENABLE			(1 << 6)
 #define EXT_CSD_BOOT_PARTITION_ENABLE		(1 << 3)
 #define EXT_CSD_PARTITION_ACCESS_ENABLE		(1 << 0)

commit 543bfa6c21c2e4e265bee19592b660f9e840b3de
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:06:57 2017 +0800

    mmc: xenon_sdhci: drop redundant timing definitions
    
    Remove the redundant mmc timing definitions which have defined in mmc.h.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/xenon_sdhci.c b/drivers/mmc/xenon_sdhci.c
index 2b7cb7f6b6..83037fe7ec 100644
--- a/drivers/mmc/xenon_sdhci.c
+++ b/drivers/mmc/xenon_sdhci.c
@@ -94,18 +94,6 @@ DECLARE_GLOBAL_DATA_PTR;
 /* Hyperion only have one slot 0 */
 #define XENON_MMC_SLOT_ID_HYPERION		0
 
-#define MMC_TIMING_LEGACY	0
-#define MMC_TIMING_MMC_HS	1
-#define MMC_TIMING_SD_HS	2
-#define MMC_TIMING_UHS_SDR12	3
-#define MMC_TIMING_UHS_SDR25	4
-#define MMC_TIMING_UHS_SDR50	5
-#define MMC_TIMING_UHS_SDR104	6
-#define MMC_TIMING_UHS_DDR50	7
-#define MMC_TIMING_MMC_DDR52	8
-#define MMC_TIMING_MMC_HS200	9
-#define MMC_TIMING_MMC_HS400	10
-
 #define XENON_MMC_MAX_CLK	400000000
 
 enum soc_pad_ctrl_type {

commit 81db2d363c233b49c5ea7a305b0c75c1aa940b34
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:06:56 2017 +0800

    mmc: add set_timing entry for timing selection
    
    Some controller should do some configuration according to the selected
    timing.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index e49f292196..9a0f19b67f 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -318,6 +318,12 @@ ulong mmc_bread(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt,
 	return blkcnt;
 }
 
+static void mmc_set_timing(struct mmc *mmc, uint timing)
+{
+	mmc->timing = timing;
+	mmc_set_ios(mmc);
+}
+
 static int mmc_go_idle(struct mmc *mmc)
 {
 	struct mmc_cmd cmd;
@@ -1741,6 +1747,7 @@ int mmc_start_init(struct mmc *mmc)
 	mmc->ddr_mode = 0;
 	mmc_set_bus_width(mmc, 1);
 	mmc_set_clock(mmc, 1);
+	mmc_set_timing(mmc, MMC_TIMING_LEGACY);
 
 	/* Reset the Card */
 	err = mmc_go_idle(mmc);
diff --git a/include/mmc.h b/include/mmc.h
index 3c06cd596c..441f3eb273 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -438,6 +438,21 @@ struct mmc {
 	uint has_init;
 	int high_capacity;
 	uint bus_width;
+	uint timing;
+
+#define MMC_TIMING_LEGACY	0
+#define MMC_TIMING_MMC_HS	1
+#define MMC_TIMING_SD_HS	2
+#define MMC_TIMING_UHS_SDR12	3
+#define MMC_TIMING_UHS_SDR25	4
+#define MMC_TIMING_UHS_SDR50	5
+#define MMC_TIMING_UHS_SDR104	6
+#define MMC_TIMING_UHS_DDR50	7
+#define MMC_TIMING_MMC_DDR52	8
+#define MMC_TIMING_MMC_HS200	9
+#define MMC_TIMING_MMC_HS400	10
+#define MMC_TIMING_MMC_HS400ES	11
+
 	uint clock;
 	uint card_caps;
 	uint ocr;
@@ -497,6 +512,40 @@ enum mmc_hwpart_conf_mode {
 	MMC_HWPART_CONF_COMPLETE,
 };
 
+static inline bool mmc_card_hs(struct mmc *mmc)
+{
+	return (mmc->timing == MMC_TIMING_MMC_HS) ||
+		(mmc->timing == MMC_TIMING_SD_HS);
+}
+
+static inline bool mmc_card_ddr(struct mmc *mmc)
+{
+	return (mmc->timing == MMC_TIMING_UHS_DDR50) ||
+		(mmc->timing == MMC_TIMING_MMC_DDR52) ||
+		(mmc->timing == MMC_TIMING_MMC_HS400) ||
+		(mmc->timing == MMC_TIMING_MMC_HS400ES);
+}
+
+static inline bool mmc_card_hs200(struct mmc *mmc)
+{
+	return mmc->timing == MMC_TIMING_MMC_HS200;
+}
+
+static inline bool mmc_card_ddr52(struct mmc *mmc)
+{
+	return mmc->timing == MMC_TIMING_MMC_DDR52;
+}
+
+static inline bool mmc_card_hs400(struct mmc *mmc)
+{
+	return mmc->timing == MMC_TIMING_MMC_HS400;
+}
+
+static inline bool mmc_card_hs400es(struct mmc *mmc)
+{
+	return mmc->timing == MMC_TIMING_MMC_HS400ES;
+}
+
 struct mmc *mmc_create(const struct mmc_config *cfg, void *priv);
 
 /**

commit 227f658e55a6b1c7c219babd1bfd1130aac4568d
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:06:55 2017 +0800

    mmc: select the available type from host_caps and card_caps
    
    The original implementation select HS timing by default, add available
    type selection for higher speed mode compatibility, such as hs200,
    hs400, hs400es.
    
    By the way, we assume that card run at 1.8V or 1.2V I/O when its timing
    is ddr52/hs200/hs400(es).
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 38d2e07dd5..e49f292196 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -546,10 +546,62 @@ int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
 
 }
 
+static u32 mmc_select_card_type(struct mmc *mmc, u8 *ext_csd)
+{
+	u8 card_type;
+	u32 host_caps, avail_type = 0;
+
+	card_type = ext_csd[EXT_CSD_CARD_TYPE];
+	host_caps = mmc->cfg->host_caps;
+
+	if ((host_caps & MMC_MODE_HS) &&
+	    (card_type & EXT_CSD_CARD_TYPE_26))
+		avail_type |= EXT_CSD_CARD_TYPE_26;
+
+	if ((host_caps & MMC_MODE_HS) &&
+	    (card_type & EXT_CSD_CARD_TYPE_52))
+		avail_type |= EXT_CSD_CARD_TYPE_52;
+
+	/*
+	 * For the moment, u-boot doesn't support signal voltage
+	 * switch, therefor we assume that host support ddr52
+	 * at 1.8v or 3.3v I/O(1.2v I/O not supported, hs200 and
+	 * hs400 are the same).
+	 */
+	if ((host_caps & MMC_MODE_DDR_52MHz) &&
+	    (card_type & EXT_CSD_CARD_TYPE_DDR_1_8V))
+		avail_type |= EXT_CSD_CARD_TYPE_DDR_1_8V;
+
+	if ((host_caps & MMC_MODE_HS200) &&
+	    (card_type & EXT_CSD_CARD_TYPE_HS200_1_8V))
+		avail_type |= EXT_CSD_CARD_TYPE_HS200_1_8V;
+
+	/*
+	 * If host can support HS400, it means that host can also
+	 * support HS200.
+	 */
+	if ((host_caps & MMC_MODE_HS400) &&
+	    (host_caps & MMC_MODE_8BIT) &&
+	    (card_type & EXT_CSD_CARD_TYPE_HS400_1_8V))
+		avail_type |= EXT_CSD_CARD_TYPE_HS200_1_8V |
+				EXT_CSD_CARD_TYPE_HS400_1_8V;
+
+	if ((host_caps & MMC_MODE_HS400ES) &&
+	    (host_caps & MMC_MODE_8BIT) &&
+	    ext_csd[EXT_CSD_STROBE_SUPPORT] &&
+	    (avail_type & EXT_CSD_CARD_TYPE_HS400_1_8V))
+		avail_type |= EXT_CSD_CARD_TYPE_HS200_1_8V |
+				EXT_CSD_CARD_TYPE_HS400_1_8V |
+				EXT_CSD_CARD_TYPE_HS400ES;
+
+	return avail_type;
+}
+
 static int mmc_change_freq(struct mmc *mmc)
 {
 	ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
 	char cardtype;
+	u32 avail_type;
 	int err;
 
 	mmc->card_caps = 0;
@@ -569,8 +621,13 @@ static int mmc_change_freq(struct mmc *mmc)
 		return err;
 
 	cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf;
+	avail_type = mmc_select_card_type(mmc, ext_csd);
 
-	err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1);
+	if (avail_type & EXT_CSD_CARD_TYPE_HS)
+		err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
+				 EXT_CSD_HS_TIMING, 1);
+	else
+		err = -EINVAL;
 
 	if (err)
 		return err;
diff --git a/include/mmc.h b/include/mmc.h
index 010ebe048c..3c06cd596c 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -58,6 +58,9 @@
 #define MMC_MODE_8BIT		(1 << 3)
 #define MMC_MODE_SPI		(1 << 4)
 #define MMC_MODE_DDR_52MHz	(1 << 5)
+#define MMC_MODE_HS200		(1 << 6)
+#define MMC_MODE_HS400		(1 << 7)
+#define MMC_MODE_HS400ES	(1 << 8)
 
 #define SD_DATA_4BIT	0x00040000
 
@@ -182,6 +185,7 @@
 #define EXT_CSD_BOOT_BUS_WIDTH		177
 #define EXT_CSD_PART_CONF		179	/* R/W */
 #define EXT_CSD_BUS_WIDTH		183	/* R/W */
+#define EXT_CSD_STROBE_SUPPORT		184	/* RO */
 #define EXT_CSD_HS_TIMING		185	/* R/W */
 #define EXT_CSD_REV			192	/* RO */
 #define EXT_CSD_CARD_TYPE		196	/* RO */
@@ -201,6 +205,18 @@
 
 #define EXT_CSD_CARD_TYPE_26	(1 << 0)	/* Card can run at 26MHz */
 #define EXT_CSD_CARD_TYPE_52	(1 << 1)	/* Card can run at 52MHz */
+#define EXT_CSD_CARD_TYPE_HS	(EXT_CSD_CARD_TYPE_26 | \
+				 EXT_CSD_CARD_TYPE_52)
+#define EXT_CSD_CARD_TYPE_HS200_1_8V	BIT(4)	/* Card can run at 200MHz */
+#define EXT_CSD_CARD_TYPE_HS200_1_2V	BIT(5)	/* Card can run at 200MHz */
+#define EXT_CSD_CARD_TYPE_HS200		(EXT_CSD_CARD_TYPE_HS200_1_8V | \
+					 EXT_CSD_CARD_TYPE_HS200_1_2V)
+#define EXT_CSD_CARD_TYPE_HS400_1_8V	BIT(6)	/* Card can run at 200MHz DDR, 1.8V */
+#define EXT_CSD_CARD_TYPE_HS400_1_2V	BIT(7)	/* Card can run at 200MHz DDR, 1.2V */
+#define EXT_CSD_CARD_TYPE_HS400		(EXT_CSD_CARD_TYPE_HS400_1_8V | \
+					 EXT_CSD_CARD_TYPE_HS400_1_2V)
+#define EXT_CSD_CARD_TYPE_HS400ES	BIT(8)	/* Card can run at HS400ES */
+
 #define EXT_CSD_CARD_TYPE_DDR_1_8V	(1 << 2)
 #define EXT_CSD_CARD_TYPE_DDR_1_2V	(1 << 3)
 #define EXT_CSD_CARD_TYPE_DDR_52	(EXT_CSD_CARD_TYPE_DDR_1_8V \

commit 01637644e2b9c7365b1189bed6e3c8a0d4099057
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed May 17 11:11:35 2017 +0800

    rockchip: evb-rk3328: set uart2 and sdmmc io routing
    
    In rk3328, some function pin may have more than one choice, and muxed
    with more than one IO, for example, the UART2 controller IO,
    TX and RX, have 3 choice(setting in com_iomux):
    - M0 which mux with GPIO1A0/GPIO1A1
    - M1 which mux with GPIO2A0/GPIO2A1
    - usb2phy which mux with USB2.0 DP/DM pin.
    
    We should set these IO routing in board file.
    
    Change-Id: If6f6fd890d8e225cdb584a4025aac578198764e6
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/board/rockchip/evb_rk3328/evb-rk3328.c b/board/rockchip/evb_rk3328/evb-rk3328.c
index 99a73dacf1..d6fc57cd8e 100644
--- a/board/rockchip/evb_rk3328/evb-rk3328.c
+++ b/board/rockchip/evb_rk3328/evb-rk3328.c
@@ -5,7 +5,10 @@
  */
 
 #include <common.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/grf_rk3328.h>
 #include <asm/armv8/mmu.h>
+#include <asm/io.h>
 #include <dwc3-uboot.h>
 #include <power/regulator.h>
 #include <usb.h>
@@ -15,6 +18,14 @@ DECLARE_GLOBAL_DATA_PTR;
 int board_init(void)
 {
 	int ret;
+#define GRF_BASE	0xff100000
+	struct rk3328_grf_regs * const grf = (void *)GRF_BASE;
+
+	/* uart2 select m1, sdcard select m1*/
+	rk_clrsetreg(&grf->com_iomux,
+		     IOMUX_SEL_UART2_MASK | IOMUX_SEL_SDMMC_MASK,
+		     IOMUX_SEL_UART2_M1 << IOMUX_SEL_UART2_SHIFT |
+		     IOMUX_SEL_SDMMC_M1 << IOMUX_SEL_SDMMC_SHIFT);
 
 	ret = regulators_enable_boot_on(false);
 	if (ret)

commit 781954d5fd41dbe94bce20f227ac0ced1f72af31
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Apr 7 18:08:18 2017 +0800

    rk3399: set sram and ddr as non-secure region
    
    Some host like SD and eMMC may use DMA to transter data,
    set memory to non-secure to make sure the address can be accessed.
    
    Change-Id: Ieab393a316e3e88af98385c84daba44502bba62c
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3399-board-spl.c b/arch/arm/mach-rockchip/rk3399-board-spl.c
index d6bf74f7ad..a3708caa03 100644
--- a/arch/arm/mach-rockchip/rk3399-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3399-board-spl.c
@@ -103,6 +103,8 @@ void board_init_f(ulong dummy)
 	printascii("U-Boot SPL board init");
 #endif
 
+	rk_clrsetreg(SGRF_DDR_RGN_CON16, 0x1FF, 0x200);
+	rk_clrreg(SGRF_SLV_SECURE_CON4, 0x2000);
 	/*  Emmc clock generator: disable the clock multipilier */
 	rk_clrreg(GRF_EMMCCORE_CON11, 0x0ff);
 

commit 0f0669eabbf46c6814c82dbe3843a8cc7737e0c6
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Oct 8 15:01:50 2016 +0800

    rk3399: config: enable usb mass storage gadget
    
    Change-Id: I588e2260d8ce07ebd6cc1fd8e6809b2e960fd600
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index aa65cbd9ee..cbdfdda503 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -92,3 +92,4 @@ CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=1
 CONFIG_FASTBOOT_BUF_ADDR=0x00800800
 CONFIG_FASTBOOT_BUF_SIZE=0x08000000
+CONFIG_CMD_USB_MASS_STORAGE=y
diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index 1d7a87271c..f342c29260 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -42,6 +42,8 @@
 #define CONFIG_SUPPORT_VFAT
 #define CONFIG_FS_EXT4
 
+#define CONFIG_USB_FUNCTION_MASS_STORAGE
+
 /* RAW SD card / eMMC locations. */
 #define CONFIG_SYS_SPI_U_BOOT_OFFS	(128 << 10)
 

commit 02ef5c83a3f7b29c4c0de64c3a219e639aaf562f
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Aug 31 16:40:02 2016 +0800

    FROMLIST: config: rk3399: add support for dwc3 gadget
    
    To support fastboot, we need to enable the controller first.
    rk3399 is using dwc3 as usb device controller, this patch enable
    the configs for dwc3 gadget.
    
    Change-Id: I2726ed1c35897c2366c1c9766fdf460baab23975
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    
    Conflicts:
            configs/evb-rk3399_defconfig

diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index 7a0bd4aec9..aa65cbd9ee 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -76,3 +76,19 @@ CONFIG_VIDEO_ROCKCHIP_MAX_YRES=1200
 CONFIG_DISPLAY_ROCKCHIP_MIPI=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_ERRNO_STR=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DUALSPEED=y
+CONFIG_USB_GADGET_VBUS_DRAW=0
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x330a
+CONFIG_FASTBOOT=y
+CONFIG_CMD_FASTBOOT=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=1
+CONFIG_FASTBOOT_BUF_ADDR=0x00800800
+CONFIG_FASTBOOT_BUF_SIZE=0x08000000

commit da65ef61af2d5b0475a0deee4bf63000efd35eea
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Aug 31 16:40:00 2016 +0800

    FROMLIST: board: evb-rk3399: add api to support dwc3 gadget
    
    This patch add board_usb_init() and interrupt callback
    for dwc3 gadget.
    
    Change-Id: I1ea19c0ec7d3fd14904e7fcc97c6d19221206762
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c b/board/rockchip/evb_rk3399/evb-rk3399.c
index d50c59db8d..2d642a7a09 100644
--- a/board/rockchip/evb_rk3399/evb-rk3399.c
+++ b/board/rockchip/evb_rk3399/evb-rk3399.c
@@ -10,6 +10,8 @@
 #include <dm/uclass-internal.h>
 #include <asm/arch/periph.h>
 #include <power/regulator.h>
+#include <usb.h>
+#include <dwc3-uboot.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -67,3 +69,24 @@ int board_init(void)
 out:
 	return 0;
 }
+
+#ifdef CONFIG_USB_DWC3
+static struct dwc3_device dwc3_device_data = {
+	.maximum_speed = USB_SPEED_HIGH,
+	.base = 0xfe800000,
+	.dr_mode = USB_DR_MODE_PERIPHERAL,
+	.index = 0,
+	.dis_u2_susphy_quirk = 1,
+};
+
+int usb_gadget_handle_interrupts(void)
+{
+	dwc3_uboot_handle_interrupt(0);
+	return 0;
+}
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+	return dwc3_uboot_init(&dwc3_device_data);
+}
+#endif

commit 41933c04adca8c0bf3d02c4758932a44cad780d3
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Aug 31 16:40:01 2016 +0800

    FROMLIST: usb: dwc3: add support for 16 bit UTMI+ interface
    
    The dwc3 controller is using 8 bit UTMI+ interface for USB2.0 PHY,
    add one variable in dwc3/dwc3_device struct to support 16 bit
    UTMI+ interface on some SoCs like Rockchip rk3399.
    
    Change-Id: Ic5db5e9ee845b5f9d2848bb44fbf07c094b3b5a7
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 87b9c87edf..1cbf17967a 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -16,6 +16,7 @@
 
 #include <common.h>
 #include <malloc.h>
+#include <fdtdec.h>
 #include <dwc3-uboot.h>
 #include <asm/dma-mapping.h>
 #include <linux/ioport.h>
@@ -29,6 +30,8 @@
 
 #include "linux-compat.h"
 
+DECLARE_GLOBAL_DATA_PTR;
+
 static LIST_HEAD(dwc3_list);
 /* -------------------------------------------------------------------------- */
 
@@ -390,6 +393,11 @@ static void dwc3_phy_setup(struct dwc3 *dwc)
 	if (dwc->dis_u2_susphy_quirk)
 		reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
 
+	if (dwc->usb2_phyif_utmi_width == 16) {
+		reg &= ~DWC3_GUSB2PHYCFG_USBTRDTIM_MASK;
+		reg |= DWC3_GUSB2PHYCFG_USBTRDTIM_16BIT;
+		reg |= DWC3_GUSB2PHYCFG_PHYIF_16BIT;
+	}
 	dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
 
 	mdelay(100);
@@ -623,6 +631,8 @@ int dwc3_uboot_init(struct dwc3_device *dwc3_dev)
 	int			ret;
 
 	void			*mem;
+	const void *blob = gd->fdt_blob;
+	int node;
 
 	mem = devm_kzalloc(dev, sizeof(*dwc) + DWC3_ALIGN_MASK, GFP_KERNEL);
 	if (!mem)
@@ -684,6 +694,14 @@ int dwc3_uboot_init(struct dwc3_device *dwc3_dev)
 
 	dwc->index = dwc3_dev->index;
 
+	node = fdt_node_offset_by_compatible(blob, -1,
+			"rockchip,rk3399-xhci");
+	if (node < 0)
+		debug("%s dwc3 node not found\n", __func__);
+	else
+		dwc->usb2_phyif_utmi_width =
+			fdtdec_get_int(blob, node, "snps,phyif-utmi-bits", -1);
+
 	dwc3_cache_hwparams(dwc);
 
 	ret = dwc3_alloc_event_buffers(dwc, DWC3_EVENT_BUFFERS_SIZE);
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 72d2fcdd3f..0c61c51467 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -74,6 +74,7 @@
 #define DWC3_GCTL		0xc110
 #define DWC3_GEVTEN		0xc114
 #define DWC3_GSTS		0xc118
+#define DWC3_GUCTL1		0xc11c
 #define DWC3_GSNPSID		0xc120
 #define DWC3_GGPIO		0xc124
 #define DWC3_GUID		0xc128
@@ -162,7 +163,17 @@
 
 /* Global USB2 PHY Configuration Register */
 #define DWC3_GUSB2PHYCFG_PHYSOFTRST	(1 << 31)
+#define DWC3_GUSB2PHYCFG_ENBLSLPM   (1 << 8)
 #define DWC3_GUSB2PHYCFG_SUSPHY		(1 << 6)
+#define DWC3_GUSB2PHYCFG_PHYIF_8BIT	(0 << 3)
+#define DWC3_GUSB2PHYCFG_PHYIF_16BIT	(1 << 3)
+#define DWC3_GUSB2PHYCFG_USBTRDTIM_SHIFT	(10)
+#define DWC3_GUSB2PHYCFG_USBTRDTIM_MASK	(0xf << \
+		DWC3_GUSB2PHYCFG_USBTRDTIM_SHIFT)
+#define DWC3_GUSB2PHYCFG_USBTRDTIM_16BIT (0x5 << \
+		DWC3_GUSB2PHYCFG_USBTRDTIM_SHIFT)
+#define DWC3_GUSB2PHYCFG_USBTRDTIM_8BIT (0x9 << \
+		DWC3_GUSB2PHYCFG_USBTRDTIM_SHIFT)
 
 /* Global USB3 PIPE Control Register */
 #define DWC3_GUSB3PIPECTL_PHYSOFTRST	(1 << 31)
@@ -813,6 +824,7 @@ struct dwc3 {
 
 	unsigned		tx_de_emphasis_quirk:1;
 	unsigned		tx_de_emphasis:2;
+	unsigned		usb2_phyif_utmi_width:5;
 	int			index;
 	struct list_head        list;
 };

commit c98ac3487e413c71e5d36322ef3324b21c6f60f9
Author: Tom Rini <trini@konsulko.com>
Date:   Mon Sep 11 14:10:40 2017 -0400

    Prepare v2017.09
    
    Signed-off-by: Tom Rini <trini@konsulko.com>

diff --git a/Makefile b/Makefile
index 5bb3b09115..8086f3c93e 100644
--- a/Makefile
+++ b/Makefile
@@ -5,7 +5,7 @@
 VERSION = 2017
 PATCHLEVEL = 09
 SUBLEVEL =
-EXTRAVERSION = -rc4
+EXTRAVERSION =
 NAME =
 
 # *DOCUMENTATION*

commit bbfbdb5722ea3bc6f600d315ed3e539bb74615d5
Author: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Date:   Mon Sep 11 16:07:02 2017 +0200

    MAINTAINERS: board: qcom: db410c: Maintainer changed
    
    Replacing original author Mateusz Kulikowski
    <mateusz.kulikowski@gmail.com> as db410c maintainer
    
    Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>

diff --git a/board/qualcomm/dragonboard410c/MAINTAINERS b/board/qualcomm/dragonboard410c/MAINTAINERS
index 65cb47cb5d..f9ddc9dde1 100644
--- a/board/qualcomm/dragonboard410c/MAINTAINERS
+++ b/board/qualcomm/dragonboard410c/MAINTAINERS
@@ -1,5 +1,5 @@
 DRAGONBOARD410C BOARD
-M:	Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
+M:	Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
 S:	Maintained
 F:	board/qualcomm/dragonboard410c/
 F:	include/configs/dragonboard410c.h
